[ { "path": ".devcontainer/devcontainer.json", "content": "{\n\t\"name\": \"Open PineBuds Pro - VS Code Development Environment\",\n\t\"build\": {\n\t\t\"dockerfile\": \"../Dockerfile\",\n\t\t\"context\": \"..\"\n\t},\n\t\"extensions\": [\n\t\t\"ms-vscode.cmake-tools\",\n\t\t\"ms-vscode.cpptools\"\n\t],\n\t\"runArgs\": [\n\t\t\"--privileged\"\n\t],\n\t\"userEnvProbe\": \"loginInteractiveShell\",\n\t\"remoteUser\": \"root\"\n}" }, { "path": ".github/dependabot.yml", "content": "version: 2\nupdates:\n - package-ecosystem: \"docker\"\n directory: \"/\"\n schedule:\n interval: \"weekly\"\n commit-message:\n prefix: \"chore(deps)\"\n\n - package-ecosystem: \"github-actions\"\n directory: \"/\"\n schedule:\n interval: \"weekly\"\n commit-message:\n prefix: \"chore(ci)\"\n" }, { "path": ".github/workflows/build-and-push-to-registry.yml", "content": "name: Container image builder workflow\non:\n push:\n branches: [main]\n workflow_dispatch:\n\nconcurrency:\n group: gh-ref-${{ github.ref }}\n cancel-in-progress: true\n\njobs:\n build-and-push-images:\n if: ${{ github.repository == 'pine64/OpenPineBuds' }}\n name: Build and push container image for PineBuds Pro SDK to GHCR.io\n runs-on: ubuntu-latest\n steps:\n - name: Checkout sources\n uses: actions/checkout@v6\n\n - name: Install qemu dependency\n run: |\n sudo apt-get update\n sudo apt-get install -y qemu-user-static\n\n - name: Build images\n id: build\n uses: redhat-actions/buildah-build@v2\n with:\n image: ${{ github.repository }}\n platforms: linux/amd64, linux/arm64\n context: /\n tags: ${{ contains(github.ref_name, 'main') && 'latest' || github.ref_name }}-sdk\n containerfiles: /Dockerfile\n\n - name: Push container\n uses: redhat-actions/push-to-registry@v2\n with:\n image: ${{ steps.build.outputs.image }}\n tags: ${{ steps.build.outputs.tags }}\n registry: ghcr.io\n username: ${{ github.repository_owner }}\n password: ${{ secrets.GITHUB_TOKEN }}\n" }, { "path": ".github/workflows/build-firmware.yml", "content": "name: CI\n\non: [push, pull_request]\n\njobs:\n build-firmware:\n runs-on: ubuntu-latest\n container:\n image: ghcr.io/pine64/openpinebuds:latest-sdk\n steps:\n - name: Build the main firmware\n run: cd /usr/src/ && ./build.sh || cat /usr/src/log.txt\n\n - name: Archive produced firmware\n uses: actions/upload-artifact@v7\n with:\n path: /usr/src/out/open_source/open_source.bin\n" }, { "path": ".gitignore", "content": "#\n# NOTE! Don't add files that are generated in specific\n# subdirectories here. Add them in the \".gitignore\" file\n# in that subdirectory instead.\n#\n# NOTE! Please use 'git ls-files -i --exclude-standard'\n# command after changing this file, to see if there are\n# any tracked files which get ignored after the change.\n#\n# ('git ls-files -i --exclude-standard -ocs --directory'\n# command can show all the tracked and untracked files\n# which get ignored after the change.)\n#\n\n# Hidden files\n.*\n# Except for these hidden files\n!.gitignore\n!.gitattributes\n!.mailmap\n!.github\n!.devcontainer\n\n# Backup files\n*~\n*.bak\n*.BAK\n*.orig\n\\#*#\nfirmware-backups/\n\n# Tag files\n/tags\n/TAGS\n/cscope.*\n/ncscope.*\n/compile_commands.json\n\n# Object files\n*.o\n*.o.*\n*.ko\n*.obj\n*.lo\n*.slo\n*.py[co]\n\n# List files\n*.i\n*.lst\n\n# Precompiled Headers\n*.gch\n*.pch\n\n# Libraries\n*.lib\n*.a\n*.la\n*.lai\n*.pyd\n\n# Shared objects (inc. Windows DLLs)\n*.dll\n*.so\n*.so.*\n*.dylib\n\n# Executables\n*.exe\n*.out\n*.app\n*.elf\n*.i*86\n*.x86_64\n*.hex\n\n# Source insight project files\n/[sS][iI]/\n\n# Generated project files\n*.ncb\n*.idb\n*.pdb\n*.sdf\n*.suo\n*.opensdf\n#/Debug/\n#/Release/\nDebug/\nRelease/\n/ipch/\n\n# Library dir\n#lib/\n\n# Build dir\n/out/\n*.pre\n\n# configuration file\n# *.ini\nlog.txt\nlog.txt\n" }, { "path": "Dockerfile", "content": "FROM debian:bullseye-slim AS base\r\n\r\nFROM base AS rust_build\r\n\r\nLABEL org.opencontainers.image.authors = \"Ben V. Brown , Dom Rodriguez \"\r\n\r\nWORKDIR /usr/src\r\nENV PATH=\"/root/.cargo/bin:$PATH\"\r\n\r\nRUN apt-get update \\\r\n && apt-get install -y \\\r\n bc \\\r\n build-essential \\\r\n curl \\\r\n git \\\r\n libudev-dev \\\r\n pkg-config \\\r\n && curl https://sh.rustup.rs -sSf | bash -s -- -y \\\r\n && git clone https://github.com/Ralim/bestool.git \\\r\n && cd /usr/src/bestool/bestool/ \\\r\n && cargo build --release\r\n\r\nFROM base as dev_env\r\n\r\nWORKDIR /usr/src\r\n\r\nRUN apt-get update \\\r\n && apt-get install -y \\ \r\n bash \\\r\n bc \\\r\n bzip2 \\\r\n curl \\\r\n ffmpeg \\\r\n clang-format \\ \r\n git \\\r\n make \\\r\n tar \\\r\n xxd \\\r\n && git config --global --add safe.directory /src \\\r\n && mkdir -pv /src \\\r\n && curl \\\r\n https://armkeil.blob.core.windows.net/developer/Files/downloads/gnu-rm/9-2019q4/gcc-arm-none-eabi-9-2019-q4-major-$(arch)-linux.tar.bz2 | tar -xj -C /src/\r\n\r\nRUN apt-get update \\\r\n && apt-get install -y \\\r\n minicom \\\r\n sudo\r\n\r\nENV PATH=\"${PATH}:/src/gcc-arm-none-eabi-9-2019-q4-major/bin\"\r\nCOPY --from=rust_build /usr/src/bestool/bestool/target/release/bestool /usr/local/bin/bestool\r\nCOPY . /usr/src\r\n\r\nENTRYPOINT [\"/bin/bash\"]\r\n" }, { "path": "Makefile", "content": "\nCONFIG_CROSS_COMPILE := arm-none-eabi-\nCONFIG_STRICT_CFLAGS ?= y\nCONFIG_SAVE_TARGET ?= n\nCONFIG_FORCE_WIN_SHELL ?= y\n\nexport CONFIG_STRICT_CFLAGS CONFIG_SAVE_TARGET CONFIG_FORCE_WIN_SHELL\n\n# ---------------------------------------------------------------------------\n# Platform and shell detection\n\nexport WIN_PLAT := n\nifeq ($(OS),Windows_NT)\n# Detect Cygwin\nifneq ($(findstring /,$(PWD)),/)\n# also $(findstring /,$(HOME)) ?\nWIN_PLAT := y\nendif\nendif\n\nexport WIN_SHELL := n\nifeq ($(WIN_PLAT),y)\nifeq ($(CONFIG_FORCE_WIN_SHELL),y)\nWIN_SHELL := y\nelse\n# Detect Unix-style shell\nifeq ($(shell echo $$0),$$0)\nWIN_SHELL := y\nendif\nendif\nendif\n\nBACKSLASH := \\ # backslash\nBACKSLASH := $(strip $(BACKSLASH))\n\nTO_UNIX_PATH = $(subst $(BACKSLASH),/,$(1))\nTO_WIN_PATH = $(subst /,$(BACKSLASH),$(1))\nESC_WIN_PATH = $(subst $(BACKSLASH),$(BACKSLASH)$(BACKSLASH),$(1))\n\nifeq ($(WIN_PLAT),y)\nifeq ($(WIN_SHELL),y)\n# make will choose sh.exe as SHELL if it finds sh.exe in the directories of PATH, regardless of\n# the setting in environment or parent (e.g., when git.exe is in the PATH)\nSHELL := cmd.exe\nSHELL_CMD = $(call TO_WIN_PATH,$(1))\nelse\nSHELL_CMD = $(call ESC_WIN_PATH,$(call TO_WIN_PATH,$(1)))\nendif\nelse\nSHELL_CMD = $(1)\nendif\n\n# The Unix-style path is recognized by compiler toolchain, GNU utilities and windows redirection\n# operators, but not by windows native commands (e.g., mkdir) and applications.\n\n# End of platform and shell detection\n# ---------------------------------------------------------------------------\n\n# Do not use make's built-in rules and variables\n# (this increases performance and avoids hard-to-debug behaviour);\nMAKEFLAGS += -rR\n\n# Avoid funny character set dependencies\nunexport LC_ALL\nLC_COLLATE=C\nLC_NUMERIC=C\nexport LC_COLLATE LC_NUMERIC\n\n# Avoid interference with shell env settings\nunexport GREP_OPTIONS\n\n# Check if just to show the help content\nifeq ($(MAKECMDGOALS),help)\nifeq ($(T),)\nHELP_TARGET := 1\nendif\nendif\n\nifneq ($(HELP_TARGET),1)\n# We are using a recursive build, so we need to do a little thinking\n# to get the ordering right.\n#\n# Most importantly: sub-Makefiles should only ever modify files in\n# their own directory. If in some directory we have a dependency on\n# a file in another dir (which doesn't happen often, but it's often\n# unavoidable when linking the built-in.o targets which finally\n# turn into elf file), we will call a sub make in that other dir, and\n# after that we are sure that everything which is in that other dir\n# is now up to date.\n#\n# The only cases where we need to modify files which have global\n# effects are thus separated out and done before the recursive\n# descending is started. They are now explicitly listed as the\n# prepare rule.\n\n# Beautify output\n# ---------------------------------------------------------------------------\n#\n# Normally, we echo the whole command before executing it. By making\n# that echo $($(quiet)$(cmd)), we now have the possibility to set\n# $(quiet) to choose other forms of output instead, e.g.\n#\n# quiet_cmd_cc_o_c = Compiling $(RELDIR)/$@\n# cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<\n#\n# If $(quiet) is empty, the whole command will be printed.\n# If it is set to \"quiet_\", only the short version will be printed.\n# If it is set to \"silent_\", nothing will be printed at all, since\n# the variable $(silent_cmd_cc_o_c) doesn't exist.\n#\n# A simple variant is to prefix commands with $(Q) - that's useful\n# for commands that shall be hidden in non-verbose mode.\n#\n#\t$(Q)ln $@ :<\n#\n# If KBUILD_VERBOSE equals 0 then the above command will be hidden.\n# If KBUILD_VERBOSE equals 1 then the above command is displayed.\n#\n# To put more focus on warnings, be less verbose as default\n# Use 'make V=1' to see the full commands\n\nifeq (\"$(origin V)\",\"command line\")\n KBUILD_VERBOSE = $(V)\nendif\nifndef KBUILD_VERBOSE\n KBUILD_VERBOSE = 0\nendif\n\nifeq ($(KBUILD_VERBOSE),1)\n quiet :=\n Q :=\nelse\n quiet := quiet_\n Q := @\nendif\n\n# If the user is running make -s (silent mode), suppress echoing of\n# commands\n\nifneq ($(filter 4.%,$(MAKE_VERSION)),) # make-4\nifneq ($(filter %s ,$(firstword x$(MAKEFLAGS))),)\n quiet=silent_\nendif\nelse # make-3.8x\nifneq ($(filter s% -s%,$(MAKEFLAGS)),)\n quiet=silent_\nendif\nendif\n\nexport quiet Q KBUILD_VERBOSE\n\nTARGET_CFG_FILE = config/$(T)/target.mk\nTARGET_COMMON_FILE = config/common.mk\n\n# To locate output files in a separate directory two syntaxes are supported.\n# In both cases the working directory must be the root of the kernel src.\n# 1) O=\n# Use \"make O=dir/to/store/output/files/\"\n#\n# 2) Set KBUILD_OUTPUT\n# Set the environment variable KBUILD_OUTPUT to point to the directory\n# where the output files shall be placed.\n# export KBUILD_OUTPUT=dir/to/store/output/files/\n# make\n#\n# The O= assignment takes precedence over the KBUILD_OUTPUT environment\n# variable.\n\n# KBUILD_SRC is set on invocation of make in OBJ directory\n# KBUILD_SRC is not intended to be used by the regular user (for now)\nifeq ($(KBUILD_SRC),)\n\nexport KBUILD_ROOT := $(CURDIR)\n\n# OK, Make called in directory where kernel src resides\n# Do we want to locate output files in a separate directory?\n\nexport KBUILD_OUTPUT := $(CURDIR)/out\nifeq (\"$(origin O)\",\"command line\")\n KBUILD_OUTPUT := $(O)\nendif\n\n# Select target\nifeq ($(CONFIG_SAVE_TARGET),y)\nifeq ($(T),)\n-include $(KBUILD_OUTPUT)/.config\nT := $(strip $(T))\nendif\nendif\nifeq ($(T),)\n$(error Please specify the target in the command line: T=)\nendif\nifeq ($(wildcard $(TARGET_CFG_FILE)),)\n$(error Invalid target: T=$(T))\nendif\nexport T\n\n# Default audio source: en (English, config/_default_cfg_src_/res/en)\nAUDIO ?= en\nAUDIO := $(strip $(AUDIO))\n# Select audio source\nAUDIO_FOLDER = config/_default_cfg_src_/res/$(AUDIO)\nifeq ($(AUDIO),)\n$(error Please specify the sound language in the command line: AUDIO=)\nendif\nifeq ($(wildcard $(AUDIO_FOLDER)),)\n$(error Invalid target: AUDIO=$(AUDIO))\nendif\nexport AUDIO\n\nKBUILD_OUTPUT := $(KBUILD_OUTPUT)/$(T)\n\n# That's our default target when none is given on the command line\nPHONY := _all\n_all:\n\n# Cancel implicit rules on the config file\n$(KBUILD_OUTPUT)/.config: ;\n\nifneq ($(KBUILD_OUTPUT),)\n# Invoke a second make in the output directory, passing relevant variables\n# check that the output directory actually exists\nsaved-output := $(KBUILD_OUTPUT)\nifeq ($(WIN_PLAT),y)\nKBUILD_OUTPUT := $(subst /,\\,$(KBUILD_OUTPUT))\nKBUILD_OUTPUT := $(shell ( if not exist $(KBUILD_OUTPUT)\\ mkdir $(KBUILD_OUTPUT) ) \\\n && cd $(KBUILD_OUTPUT) && cd)\nKBUILD_OUTPUT := $(subst \\,/,$(KBUILD_OUTPUT))\nelse\nKBUILD_OUTPUT := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) \\\n && pwd)\nendif\n\n$(if $(KBUILD_OUTPUT),, \\\n $(error failed to create output directory \"$(saved-output)\"))\n\nifeq ($(CONFIG_SAVE_TARGET),y)\nifeq ($(WIN_PLAT),y)\n_dummy := $(shell echo T := $(T)> $(KBUILD_OUTPUT)/../.config)\nelse\n_dummy := $(shell echo \"T := $(T)\" > $(KBUILD_OUTPUT)/../.config)\nendif\nendif\n\nPHONY += $(MAKECMDGOALS) sub-make\n\n$(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make\n\t@:\n\ninclude $(CURDIR)/scripts/submods_init.mk\n\nifneq ($(filter allclean,$(MAKECMDGOALS)),)\nALLCLEAN := 1\nexport ALLCLEAN\nendif\n\n# Look for make include files relative to root of kernel src\nMAKEFLAGS += --include-dir=$(CURDIR)\n\nifeq ($(WIN_PLAT),y)\nSTART_TIME := $(shell echo %time%)\nSTART_DATE_TIME := $(shell echo %date% %time%)\nelse\nSTART_TIME := $(shell date +\"%s.%N\")\nSTART_DATE_TIME := $(shell date +\"%Y-%m-%d %T.%N\")\nendif\n\nsub-make: FORCE\n\t@echo MAKE START: $(START_DATE_TIME)\n\t$(Q)$(MAKE) -C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR) \\\n\t\t-f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS))\nifeq ($(WIN_PLAT),y)\n\t@echo MAKE END: %date% %time%\nifneq ($(wildcard tools/timediff.bat),)\n\t@tools/timediff.bat \"%time%\" \"$(START_TIME)\"\nendif\nelse\n\t@echo MAKE END: $$(date +\"%Y-%m-%d %T.%N\")\n\t@printf \"MAKE TIME: %.2f seconds\\n\" $$(echo \"$$(date +%s.%N) - $(START_TIME)\" | bc)\nendif\n\n# Leave processing to above invocation of make\nskip-makefile := 1\nendif # ifneq ($(KBUILD_OUTPUT),)\nendif # ifeq ($(KBUILD_SRC),)\n\n# We process the rest of the Makefile if this is the final invocation of make\nifeq ($(skip-makefile),)\n\n# Do not print \"Entering directory ...\",\n# but we want to display it when entering to the output directory\n# so that IDEs/editors are able to understand relative filenames.\nMAKEFLAGS += --no-print-directory\n\n# If building an external module we do not care about the all: rule\n# but instead _all depend on modules\nPHONY += all\n_all: all\n\nifeq ($(KBUILD_SRC),)\n # building in the source tree\n srctree := .\nelse\n ifeq ($(KBUILD_SRC)/,$(dir $(CURDIR)))\n # building in a subdirectory of the source tree\n srctree := ..\n else\n ifeq ($(KBUILD_SRC)/,$(dir $(patsubst %/,%,$(dir $(CURDIR)))))\n srctree := ../..\n else\n srctree := $(KBUILD_SRC)\n endif\n endif\nendif\nobjtree\t\t:= .\nsrc\t\t:= $(srctree)\nobj\t\t:= $(objtree)\n\nVPATH\t\t:= $(srctree)\n\nexport srctree objtree VPATH\n\n# Git revision\nifeq ($(WIN_PLAT),y)\nGIT_REVISION := $(shell (where git >nul 2>&1) && (git rev-parse --short HEAD 2>nul))\nelse\nGIT_REVISION := $(shell (which git >/dev/null 2>&1) && (git rev-parse --short HEAD 2>/dev/null))\nendif\n\nifneq ($(GIT_REVISION),)\nifeq ($(WIN_PLAT),y)\nGIT_REVISION := $(GIT_REVISION)$(shell (git diff --quiet && git diff --cached --quiet) >nul 2>&1 || echo -dirty)\nelse\nGIT_REVISION := $(GIT_REVISION)$(shell (git diff --quiet && git diff --cached --quiet) >/dev/null 2>&1 || echo -dirty)\nendif\nendif\n\n\n# Cross compiling and selecting different set of gcc/bin-utils\n# ---------------------------------------------------------------------------\n#\n# When performing cross compilation for other architectures ARCH shall be set\n# to the target architecture. (See arch/* for the possibilities).\n# ARCH can be set during invocation of make:\n# make ARCH=ia64\n# Another way is to have ARCH set in the environment.\n# The default ARCH is the host where make is executed.\n\n# CROSS_COMPILE specify the prefix used for all executables used\n# during compilation. Only gcc and related bin-utils executables\n# are prefixed with $(CROSS_COMPILE).\n# CROSS_COMPILE can be set on the command line\n# make CROSS_COMPILE=ia64-linux-\n# Alternatively CROSS_COMPILE can be set in the environment.\n# A third alternative is to store a setting in .config so that plain\n# \"make\" in the configured kernel build directory always uses that.\n# Default value for CROSS_COMPILE is not to prefix executables\n# Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile\nARCH\t\t?= arm\nCROSS_COMPILE\t?= $(CONFIG_CROSS_COMPILE:\"%\"=%)\n\n# SHELL used by kbuild\nifneq ($(WIN_PLAT),y)\nCONFIG_SHELL := $(shell if [ -x \"$$BASH\" ]; then echo $$BASH; \\\n else if [ -x /bin/bash ]; then echo /bin/bash; \\\n else echo sh; fi ; fi)\nendif\n\n# Make variables (CC, etc...)\nifeq ($(TOOLCHAIN),armclang)\nCC\t\t= armclang --target=arm-arm-none-eabi\nCPP\t\t= $(CC) -E\nAS\t\t= $(CC)\nC++\t\t= $(CC)\nLD\t\t= $(CC)\nAR\t\t= armar\nNM\t\t= fromelf\nSTRIP\t= fromelf\nOBJCOPY\t= fromelf\nOBJDUMP\t= fromelf\nelse\nAS\t\t= $(CROSS_COMPILE)as\nCC\t\t= $(CROSS_COMPILE)gcc\nCPP\t\t= $(CC) -E\nC++\t\t= $(CROSS_COMPILE)g++\nLD\t\t= $(CC)\n#LD\t\t= $(CROSS_COMPILE)ld\nAR\t\t= $(CROSS_COMPILE)ar\nNM\t\t= $(CROSS_COMPILE)nm\nSTRIP\t= $(CROSS_COMPILE)strip\nOBJCOPY\t= $(CROSS_COMPILE)objcopy\nOBJDUMP\t= $(CROSS_COMPILE)objdump\nendif\n\nAWK\t\t= awk\nPERL\t= perl\nPYTHON\t= python\n\nKBUILD_CPPFLAGS :=\n\nKBUILD_CFLAGS\t:= -fno-common -fmessage-length=0 -Wall \\\n\t\t -fno-exceptions -ffunction-sections \\\n\t\t -fdata-sections -fomit-frame-pointer\n\n# By default char on ARM platform is unsigned char, but char on x86 platform\n# is signed char. To avoid porting issues, force char to be signed char\n# on ARM platform.\nKBUILD_CFLAGS\t+= -fsigned-char\n\nifneq ($(TOOLCHAIN),armclang)\n# 1) Avoid checking out-of-bound array accesses in a loop\n# (and unrolling/peeling/exiting the loop based on the check)\n# 2) Avoid detecting paths dereferencing a NULL pointer\n# (and turning the problematic statement into a trap)\nKBUILD_CFLAGS\t+= -fno-aggressive-loop-optimizations \\\n\t\t -fno-isolate-erroneous-paths-dereference\nendif\n\n# Treat floating-point constants as float instead of double\nifeq ($(TOOLCHAIN),armclang)\nKBUILD_CFLAGS\t+= -cl-single-precision-constant -fshort-enums\nelse\nKBUILD_CFLAGS\t+= -fsingle-precision-constant\nendif\nKBUILD_CFLAGS\t+= -Wdouble-promotion -Wfloat-conversion\n\nKBUILD_CFLAGS\t+= -g\n\n#C_ONLY_FLAGS\t:= -std=gnu89\nC_ONLY_FLAGS\t:= -std=gnu99\n\nC++_ONLY_FLAGS\t:= -std=gnu++98 -fno-rtti\n\nKBUILD_AFLAGS := -D__ASSEMBLY__\n\nexport ARCH CROSS_COMPILE AS LD CC\nexport CPP C++ AR NM STRIP OBJCOPY OBJDUMP\nexport MAKE AWK PERL PYTHON\n\nexport KBUILD_CPPFLAGS NOSTDINC_FLAGS OBJCOPYFLAGS LDFLAGS\nexport KBUILD_CFLAGS\nexport KBUILD_AFLAGS\nexport KBUILD_ARFLAGS\nexport C_ONLY_FLAGS C++_ONLY_FLAGS\n\n# Files to ignore in find ... statements\n\nexport RCS_FIND_IGNORE := \\( -name SCCS -o -name BitKeeper -o -name .svn -o \\\n\t\t\t -name CVS -o -name .pc -o -name .hg -o -name .git \\) \\\n\t\t\t -prune -o\nexport RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn \\\n\t\t\t --exclude CVS --exclude .pc --exclude .hg --exclude .git\n\n# ===========================================================================\n# Build targets only.\n\n# Objects we will link into $(IMAGE_FILE) / subdirs we need to visit\ninit-y\t\t:= init/\ncore-y\t\t:= main/\n\nLDS_FILE\t:= best1000.lds\n\n# Link flags for all LD processes\nLINK_CFLAGS\t:=\nexport LINK_CFLAGS\n\n# Link flags for image only\nLIB_LDFLAGS\t\t:=\nCFLAGS_IMAGE\t:= -static\nifeq ($(TOOLCHAIN),armclang)\nLDFLAGS_IMAGE\t:= --no_locals\nelse\nLDFLAGS_IMAGE\t:= -X --no-wchar-size-warning\nendif\n\n# Include target definitions\ninclude $(srctree)/$(TARGET_CFG_FILE)\ninclude $(srctree)/$(TARGET_COMMON_FILE)\n\n$(srctree)/$(TARGET_CFG_FILE): ;\n$(srctree)/$(TARGET_COMMON_FILE): ;\n\nifneq ($(filter-out %/,$(init-y) $(core-y)),)\n$(error The object files cannot be linked at top level: $(filter-out %/,$(init-y) $(core-y)))\nendif\n\nifeq ($(TOOLCHAIN),armclang)\n# Entry objects\nifeq ($(entry-y),)\nentry-y\t\t+= utils/boot_struct/boot_struct.o\nifeq ($(ROM_BUILD),1)\nentry-y\t\t+= tests/rom/startup_ARMCM.o\nifneq ($(filter tests/rom/,$(core-y)),)\nentry-y\t\t+= tests/rom/export_fn_rom.o\nendif\nelse # !ROM_BUILD\nentry-y\t\t+= platform/cmsis/retarget_armclang_asm.o\nifeq ($(PROGRAMMER),1)\nentry-y\t\t+= tests/programmer/sys_api_programmer.o\nelse\nentry-y\t\t+= platform/main/startup_main.o\nendif\nendif # !ROM_BUILD\nendif\nifeq ($(filter %.o,$(entry-y)),)\n$(error Entry objects must be defined in entry-y in target.mk)\nendif\nBAD_ENTRY_OBJS := $(filter-out %.o,$(entry-y))\nifneq ($(BAD_ENTRY_OBJS),)\n$(error Only objects can be defined in entry-y in target.mk: $(BAD_ENTRY_OBJS))\nendif\nIMAGE_ENTRY := $(entry-y)\nifeq ($(ROM_BUILD),1)\nCFLAGS_IMAGE\t+= -e Reset_Handler\nelse ifeq ($(PROGRAMMER),1)\nCFLAGS_IMAGE\t+= -e programmer_start\nelse\nCFLAGS_IMAGE\t+= -e __main\nendif\nendif\n\nifneq ($(NO_BUILDID),1)\nifneq ($(TOOLCHAIN),armclang)\nLDFLAGS_IMAGE\t+= --build-id\nendif\nendif\nifeq ($(CROSS_REF),1)\nifeq ($(TOOLCHAIN),armclang)\nLDFLAGS_IMAGE\t+= --xref\nelse\nLDFLAGS_IMAGE\t+= --cref\nendif\nendif\n\nREAL_LDS_FILE := $(LDS_FILE)\nifeq ($(TOOLCHAIN),armclang)\nSCATTER_LDS_SUFFIX := _scat\nifeq ($(filter %$(SCATTER_LDS_SUFFIX),$(LDS_FILE)),)\nREAL_LDS_FILE := $(LDS_FILE)$(SCATTER_LDS_SUFFIX)\nendif\nendif\n\n# Generate REVISION_INFO (might be defined in target)\nifeq ($(REVISION_INFO),)\nifeq ($(CUST_TGT_INFO),)\nREVISION_INFO := $(GIT_REVISION):$(T)\nelse\nREVISION_INFO := $(GIT_REVISION):$(CUST_TGT_INFO)\nendif\nendif\n\ninclude $(srctree)/scripts/include.mk\n\nREVISION_INFO := $(subst $(space),-,$(strip $(REVISION_INFO)))\nSOFTWARE_VERSION := $(subst $(space),-,$(strip $(SOFTWARE_VERSION)))\n\n$(info -------------------------------)\n$(info REVISION_INFO: $(REVISION_INFO))\n$(info -------------------------------)\n\n# Build host and user info\nifeq ($(WIN_PLAT),y)\nexport BUILD_HOSTNAME := $(COMPUTERNAME)\nexport BUILD_USERNAME := $(USERNAME)\nelse\nexport BUILD_HOSTNAME := $(shell hostname -s)\nexport BUILD_USERNAME := $(shell id -un)\nendif\n\nBUILD_HOSTNAME := $(subst $(space),-,$(strip $(BUILD_HOSTNAME)))\nBUILD_USERNAME := $(subst $(space),-,$(strip $(BUILD_USERNAME)))\n\n# Default kernel image to build when no specific target is given.\n# IMAGE_FILE may be overruled on the command line or\n# set in the environment\nIMAGE_FILE ?= $(notdir $(T)).elf\n\nifneq ($(filter .map .bin .hex .lst,$(suffix $(IMAGE_FILE))),)\n$(error Invalid IMAGE_FILE (conflicted suffix): $(IMAGE_FILE))\nendif\n\nLST_SECTION_OPTS :=\nLST_SECTION_NAME :=\nifneq ($(LST_ONLY_SECTION),)\nifeq ($(TOOLCHAIN),armclang)\nLST_SECTION_OPTS += $(foreach m,$(subst $(comma),$(space),$(LST_ONLY_SECTION)),--only=$m )\nelse\nLST_SECTION_OPTS += $(foreach m,$(subst $(comma),$(space),$(LST_ONLY_SECTION)),-j $m )\nendif\nLST_SECTION_NAME := _$(subst *,+,$(subst !,-,$(LST_ONLY_SECTION)))\nendif\nifneq ($(LST_RM_SECTION),)\nifeq ($(TOOLCHAIN),armclang)\nLST_SECTION_OPTS += $(foreach m,$(subst $(comma),$(space),$(LST_RM_SECTION)),--ignore_section=$m )\nelse\nLST_SECTION_OPTS += $(foreach m,$(subst $(comma),$(space),$(LST_RM_SECTION)),-R $m )\nendif\nLST_SECTION_NAME := $(LST_SECTION_NAME)_no_$(subst *,+,$(subst !,-,$(LST_RM_SECTION)))\nendif\n\nIMAGE_MAP := $(addsuffix .map,$(basename $(IMAGE_FILE)))\nIMAGE_BIN := $(addsuffix .bin,$(basename $(IMAGE_FILE)))\nSTR_BIN := $(addsuffix .str,$(basename $(IMAGE_FILE)))\nIMAGE_HEX := $(addsuffix .hex,$(basename $(IMAGE_FILE)))\nifeq ($(LST_SECTION_OPTS),)\nIMAGE_LST := $(addsuffix .lst,$(basename $(IMAGE_FILE)))\nelse\nIMAGE_LST := $(addsuffix $(LST_SECTION_NAME).lst,$(basename $(IMAGE_FILE)))\nIMAGE_SEC := $(addsuffix $(LST_SECTION_NAME)$(suffix $(IMAGE_FILE)),$(basename $(IMAGE_FILE)))\nendif\n\nLDS_TARGET := _$(notdir $(REAL_LDS_FILE))\n\nIMAGE_VER := build_info.o\n\ntargets := $(LDS_TARGET) $(IMAGE_FILE) $(IMAGE_BIN) $(STR_BIN) $(IMAGE_LST) $(IMAGE_VER)\ncmd_files := $(wildcard $(foreach f,$(targets),$(call get_depfile_name,$(f))))\n\nifneq ($(cmd_files),)\ninclude $(cmd_files)\n$(cmd_files): ;\nendif\n\n# The all: target is the default when no target is given on the\n# command line.\n# This allow a user to issue only 'make' to build a kernel including modules\n# Defaults to $(IMAGE_BIN)\nifeq ($(TRACE_STR_SECTION),1)\nall: $(IMAGE_BIN) $(STR_BIN) ;\nelse\nall: $(IMAGE_BIN) ;\nendif\n\nifeq ($(TOOLCHAIN),armclang)\n cmd_gen-IMAGE_BIN = $(OBJCOPY) --bincombined -o $@ $<\nelse\n cmd_gen-IMAGE_BIN = $(OBJCOPY) -R .trc_str -O binary $< $@\nendif\nquiet_cmd_gen-IMAGE_BIN = GENBIN $@\n\n$(IMAGE_BIN): $(IMAGE_FILE)\nifneq ($(filter 1,$(COMPILE_ONLY) $(NO_BIN)),)\n\t@:\nelse\n\t+$(call if_changed,gen-IMAGE_BIN)\nendif\n\nifeq ($(TOOLCHAIN),armclang)\n cmd_gen-STR_BIN = $(OBJCOPY) --bincombined -o $@ $<\nelse\n cmd_gen-STR_BIN = $(OBJCOPY) -j .code_start_addr -j .rodata_str -j .trc_str \\\n --change-section-lma .code_start_addr=0x00000000 \\\n --change-section-lma .rodata_str=0x00000010 \\\n --change-section-lma .trc_str=0x00008000 \\\n -O binary $< $@\nendif\nquiet_cmd_gen-STR_BIN = GENBIN $@\n\n$(STR_BIN): $(IMAGE_FILE)\nifneq ($(filter 1,$(COMPILE_ONLY) $(NO_BIN)),)\n\t@:\nelse\n\t+$(call if_changed,gen-STR_BIN)\nendif\n\nifneq ($(TOOLCHAIN),armclang)\n cmd_gen-IMAGE_HEX = $(OBJCOPY) -O ihex $< $@\nquiet_cmd_gen-IMAGE_HEX = GENHEX $@\n\n$(IMAGE_HEX): $(IMAGE_FILE)\nifeq ($(COMPILE_ONLY),1)\n\t@:\nelse\n\t+$(call if_changed,gen-IMAGE_HEX)\nendif\nendif\n\nPHONY += lst lst_only\nlst lst_only: $(IMAGE_LST) ;\n\nifneq ($(filter lst_only,$(MAKECMDGOALS)),)\nNO_COMPILE := 1\nendif\n\nifeq ($(TOOLCHAIN),armclang)\n cmd_gen-IMAGE_LST = $(OBJDUMP) $(LST_SECTION_OPTS) --datasymbols --text -c -d --output=$@ $<\nelse\nifeq ($(LST_SECTION_OPTS),)\n cmd_gen-IMAGE_LST = $(OBJDUMP) -Sldx $< > $@\nelse\n cmd_gen-IMAGE_LST = $(OBJCOPY) $(LST_SECTION_OPTS) $< $(IMAGE_SEC) && $(OBJDUMP) -Sldx $(IMAGE_SEC) > $@\nendif\nendif\nquiet_cmd_gen-IMAGE_LST = GENLST $@\n\n$(IMAGE_LST): $(IMAGE_FILE)\n\t+$(call if_changed,gen-IMAGE_LST)\n\n\n# Flags\n\n# arch Makefile may override CC so keep this after arch Makefile is included\n#ifeq ($(CONFIG_STRICT_CFLAGS),y)\n#NOSTDINC_FLAGS += -nostdinc\n#endif\n#NOSTDINC_FLAGS += -isystem \"$(subst \\,/,$(shell $(CC) -print-file-name=include))\"\n\nifeq ($(CONFIG_STRICT_CFLAGS),y)\n# warn about C99 declaration after statement\n#C_ONLY_FLAGS += -Wdeclaration-after-statement\n\n# disallow errors like 'EXPORT_GPL(foo);' with missing header\nC_ONLY_FLAGS += -Werror=implicit-int\n\n# require functions to have arguments in prototypes, not empty 'int foo()'\n#C_ONLY_FLAGS += -Werror=strict-prototypes\n\nC_ONLY_FLAGS += -Werror-implicit-function-declaration\n\n# Prohibit date/time macros, which would make the build non-deterministic\nKBUILD_CFLAGS += $(call cc-option,-Werror=date-time)\n\nKBUILD_CFLAGS += $(call cc-option,-Wlogical-op)\n\n#KBUILD_CFLAGS += -Wno-address-of-packed-member\n\nKBUILD_CFLAGS\t+= -Wno-trigraphs \\\n\t\t -fno-strict-aliasing \\\n\t\t -Wno-format-security\n\n#KBUILD_CFLAGS\t+= Wundef\n\n# use the deterministic mode of AR if available\nKBUILD_ARFLAGS := D\n\ninclude $(srctree)/scripts/extrawarn.mk\nendif # CONFIG_STRICT_CFLAGS\n\nifeq ($(TOOLCHAIN),armclang)\nKBUILD_CFLAGS += -Wno-typedef-redefinition\nendif\n\n# Add user supplied CPPFLAGS, AFLAGS and CFLAGS as the last assignments\nKBUILD_CPPFLAGS += $(KCPPFLAGS)\nKBUILD_AFLAGS += $(KAFLAGS)\nKBUILD_CFLAGS += $(KCFLAGS)\n\nIMAGE-dirs\t:= $(patsubst %/,%,$(filter %/, $(init-y) $(core-y)))\n\nsubmodgoals =\nifneq ($(SUBMODS),)\ninclude $(srctree)/scripts/submods.mk\n\nIMAGE-builddirs\t:= $(call get_subdirs,$(IMAGE-dirs),$(SUBMODS))\nifeq ($(COMPILE_ONLY),1)\nsubmodgoals = $(call get_submodgoals,$@,$(SUBMODS))\nendif\nelse\nIMAGE-builddirs\t:= $(IMAGE-dirs)\nendif\n\nIMAGE-alldirs\t:= $(sort $(IMAGE-dirs) $(patsubst %/,%,$(filter %/, \\\n\t\t\t$(init-) $(core-) $(extra-))))\n\ninit-y\t\t:= $(patsubst %/, %/built-in$(built_in_suffix), $(init-y))\ncore-y\t\t:= $(patsubst %/, %/built-in$(built_in_suffix), $(core-y))\n\nIMAGE_INIT := $(init-y)\nIMAGE_MAIN := $(core-y)\n\nifeq ($(NO_COMPILE),1)\nIMAGE-deps :=\nelse\nIMAGE-deps := $(LDS_TARGET) $(IMAGE_INIT) $(IMAGE_MAIN) $(IMAGE_VER)\nendif\n\nBUILD_INFO_FLAGS := \\\n\t-DREVISION_INFO=$(REVISION_INFO) \\\n\t-DFLASH_SIZE=$(FLASH_SIZE) \\\n\t-DOTA_UPGRADE_CRC_LOG_SIZE=$(OTA_UPGRADE_CRC_LOG_SIZE) \\\n\t-DNV_REC_DEV_VER=$(NV_REC_DEV_VER) \\\n\t-I$(srctree)/platform/hal\n\nBUILD_INFO_FLAGS += $(LDS_SECTION_FLAGS)\nBUILD_INFO_FLAGS += -DCHIP=$(CHIP)\n\nifneq ($(CHIP_SUBTYPE),)\nBUILD_INFO_FLAGS += -DCHIP_SUBTYPE=$(CHIP_SUBTYPE)\nendif\nifneq ($(SOFTWARE_VERSION),)\nBUILD_INFO_FLAGS += -DSOFTWARE_VERSION=$(SOFTWARE_VERSION)\nendif\nifneq ($(OTA_BOOT_SIZE),0)\nBUILD_INFO_FLAGS += -DOTA_BOOT_SIZE=$(OTA_BOOT_SIZE)\nendif\nifneq ($(OTA_CODE_OFFSET),)\nBUILD_INFO_FLAGS += -DOTA_CODE_OFFSET=$(OTA_CODE_OFFSET)\nendif\nifneq ($(OTA_REMAP_OFFSET),)\nBUILD_INFO_FLAGS += -DOTA_REMAP_OFFSET=$(OTA_REMAP_OFFSET)\nendif\nifeq ($(CRC32_OF_IMAGE),1)\nBUILD_INFO_FLAGS += -DCRC32_OF_IMAGE\nendif\nifeq ($(TRACE_CRLF),1)\nBUILD_INFO_FLAGS += -DTRACE_CRLF\nendif\n\nBUILD_INFO_FLAGS += -DKERNEL=$(KERNEL)\n\nquiet_cmd_image_ver = CC $(IMAGE_VER)\n cmd_image_ver = $(CC) $(filter-out -Werror=date-time, \\\n $(call flags,KBUILD_CPPFLAGS) \\\n $(call flags,KBUILD_CFLAGS) \\\n $(call flags,C_ONLY_FLAGS) \\\n $(NOSTDINC_FLAGS)) \\\n $(BUILD_INFO_FLAGS) \\\n -MD -MP -MF $(depfile) -MT $@ \\\n -c -o $@ $<\n\nIMAGE_VER_SRC := $(src)/utils/build_info/build_info.c\n\n$(IMAGE_VER): $(IMAGE_VER_SRC) $(filter-out $(IMAGE_VER),$(IMAGE-deps)) FORCE\n\t$(call if_changed_dep,image_ver)\n\n# Linker scripts preprocessor (.lds.S -> .lds)\n# ---------------------------------------------------------------------------\nquiet_cmd_cpp_lds_S = LDS $@\n cmd_cpp_lds_S = $(CPP) $(call flags,KBUILD_CPPFLAGS) \\\n $(call flags,CPPFLAGS_$(LDS_FILE)) \\\n -MD -MP -MF $(depfile) -MT $@ \\\n $(NOSTDINC_FLAGS) \\\n -P -C -E -x c -o $@ $<\n\nLDS_SRC_STEM := $(src)/scripts/link/$(REAL_LDS_FILE)\nLDS_SRC := $(firstword $(wildcard $(LDS_SRC_STEM).S $(LDS_SRC_STEM).sx) $(LDS_SRC_STEM).S)\n\n$(LDS_TARGET): $(LDS_SRC) FORCE\n\t$(call if_changed_dep,cpp_lds_S)\n\nPHONY += lds\nlds: $(LDS_TARGET) ;\n\n\n# Final link of $(IMAGE_FILE)\n# ---------------------------------------------------------------------------\n#\n# 1) Link the archives twice to solve circular references between two or\n# more archives. Otherwise we should use --start-group and --end-group\n# options. Normally, an archive is searched only once in the order that\n# it is specified on the command line.\n# 2) Use --whole-archive option to solve weak symbol overriding issue.\n# It tells LD to include every object file in the archive in the link,\n# rather than searching the archive for the required object files.\n# By default the strong symbols defined in the archive will not override\n# any weak symbol, for LD only searches the archive if there is a undefined\n# symbol (and a weak symbol is considered as a defined symbol).\n#\nifeq ($(TOOLCHAIN),armclang)\n#LDFLAGS_IMAGE += --symbols --list_mapping_symbols\nifeq ($(KBUILD_VERBOSE),1)\nLDFLAGS_IMAGE += --verbose\nendif\n\n cmd_link-IMAGE_FILE = $(LD) -o $@ \\\n\t $(CFLAGS_IMAGE) \\\n\t -Wl,$(subst $(space),$(comma),$(strip \\\n\t $(LDFLAGS) $(LDFLAGS_IMAGE) \\\n\t --scatter=$(LDS_TARGET) \\\n\t --list=$(IMAGE_MAP) \\\n\t --info=summarysizes --info=summarystack --info=totals --info=unused \\\n\t --map --load_addr_map_info \\\n\t --remove --no_autoat \\\n\t --emit_debug_overlay_relocs --emit_debug_overlay_section \\\n\t --diag_style=gnu --diag_suppress=L6314 --diag_suppress=L6329)) \\\n\t $(IMAGE_ENTRY) $(IMAGE_INIT) $(IMAGE_MAIN) $(IMAGE_VER) \\\n\t $(LIB_LDFLAGS) $(LIB_LDFLAGS)\nelse\n cmd_link-IMAGE_FILE = $(LD) -o $@ \\\n\t\t $(LD_USE_PATCH_SYMBOL) \\\n\t -T $(LDS_TARGET) \\\n\t $(CFLAGS_IMAGE) \\\n\t -Wl,$(subst $(space),$(comma),$(strip \\\n\t $(LDFLAGS) $(LDFLAGS_IMAGE) \\\n\t -Map=$(IMAGE_MAP) \\\n\t --gc-sections \\\n\t --whole-archive)) \\\n\t $(IMAGE_INIT) $(IMAGE_MAIN) $(IMAGE_VER) \\\n\t -Wl,--no-whole-archive $(LIB_LDFLAGS) $(LIB_LDFLAGS)\n\t\t \nendif\nquiet_cmd_link-IMAGE_FILE = LINK $@\n\n\n# Include targets which we want to\n# execute if the rest of the kernel build went well.\n$(IMAGE_FILE): $(IMAGE-deps) FORCE\nifneq ($(filter 1,$(COMPILE_ONLY) $(NO_COMPILE)),)\n\t@:\nelse\n\t+$(call if_changed,link-IMAGE_FILE)\nendif\n\nifneq ($(IMAGE-deps),)\n# The actual objects are generated when descending,\n# make sure no implicit rule kicks in\n$(sort $(filter %/built-in$(built_in_suffix),$(IMAGE-deps))): $(IMAGE-builddirs) ;\nendif\n\n# Handle descending into subdirectories listed in $(IMAGE-dirs)\n# Preset locale variables to speed up the build process. Limit locale\n# tweaks to this spot to avoid wrong language settings when running\n# make menuconfig etc.\n# Error messages still appears in the original language\n\nPHONY += $(IMAGE-dirs)\n$(IMAGE-dirs): scripts\n\t$(Q)$(MAKE) $(build)=$@ $(submodgoals)\n\n# clean - Delete most, but leave enough to build external modules\n#\nclean: rm-dirs := $(CLEAN_DIRS)\nclean: rm-files := $(CLEAN_FILES)\nifneq ($(SUBMODS),)\nclean-dirs := $(addprefix _clean_, $(IMAGE-builddirs))\nelse\nclean-dirs := $(addprefix _clean_, $(IMAGE-alldirs))\nendif\n\nPHONY += $(clean-dirs) clean IMAGE-clean\n$(clean-dirs):\n\t$(Q)$(MAKE) $(clean)=$(patsubst _clean_%,%,$@)\n\nIMAGE-clean:\n\t$(Q)$(call CMDRMFILE,$(IMAGE_FILE) $(IMAGE_MAP) \\\n\t\t$(IMAGE_BIN) $(STR_BIN) $(IMAGE_HEX) $(IMAGE_LST) \\\n\t\t$(IMAGE_VER) $(LDS_TARGET))\n\nclean: IMAGE-clean\n\nclean: $(clean-dirs)\n\t$(call cmd,rmdirs)\n\t$(call cmd,rmfiles)\nifeq ($(SUBMODS),)\n\t$(Q)$(call CMDRMFILER,.,*.o *.a *.s *.d)\nendif\n\nPHONY += allclean\nifeq ($(KBUILD_OUTPUT),)\nallclean: clean ;\nelse\nifeq ($(SUBMODS),)\nquiet_cmd_clean = RMDIR $(KBUILD_OUTPUT)\n cmd_clean = $(call CMDRMDIR,$(KBUILD_OUTPUT))\n\nallclean:\n\t+$(call cmd,clean)\nelse\nallclean: clean ;\nendif\nendif\n\nquiet_cmd_predefined-macros = GEN $@\n cmd_predefined-macros = $(CPP) $(filter-out -I% -D% -include%,$(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(C_ONLY_FLAGS)) \\\n -x c -E -dM -o $@ $(devnull)\n\nPREDEF_MACRO_FILE := predefined-macros.txt\n\n$(PREDEF_MACRO_FILE): FORCE\n\t$(call cmd,predefined-macros)\n\nPHONY += predefined-macros\npredefined-macros: $(PREDEF_MACRO_FILE) ;\n\n# FIXME Should go into a make.lib or something\n# ===========================================================================\n\nquiet_cmd_rmdirs = $(if $(wildcard $(rm-dirs)),CLEAN $(wildcard $(rm-dirs)))\n cmd_rmdirs = $(if $(wildcard $(rm-dirs)),$(call CMDRMDIR,$(rm-dirs)))\n\nquiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN $(wildcard $(rm-files)))\n cmd_rmfiles = $(if $(wildcard $(rm-files)),$(call CMDRMFILE,$(rm-files)))\n\n# Shorthand for $(Q)$(MAKE) -f scripts/clean.mk obj=dir\n# Usage:\n# $(Q)$(MAKE) $(clean)=dir\nclean := -f $(srctree)/scripts/clean.mk obj\n\nifneq ($(WIN_PLAT),y)\n# Generate tags for editors\n# ---------------------------------------------------------------------------\nquiet_cmd_tags = GEN $@\n cmd_tags = $(CONFIG_SHELL) $(srctree)/tools/tags.sh $@\n\ntags TAGS cscope gtags: FORCE\n\t$(call cmd,tags)\nendif\n\nHELP_TARGET := 2\n\nendif # ifeq ($(skip-makefile),)\nendif # ifneq ($(HELP_TARGET),1)\n\n# Help target\nifneq ($(HELP_TARGET),)\nifeq ($(HELP_TARGET),1)\ninclude scripts/include.mk\nendif\n\nhelp: FORCE\n\t$(call echo-help,Mandatory options:)\n\t$(call echo-help, T= - Select a target board configuration in config/)\n\t$(call echo-help,)\n\t$(call echo-help,Cleaning targets:)\n\t$(call echo-help, clean - Remove most generated files)\n\t$(call echo-help, allclean - Remove all generated files and the output directory if possible)\n\t$(call echo-help,)\n\t$(call echo-help,Generic targets:)\n\t$(call echo-help, all - Build all targets marked with [*])\n\t$(call echo-help, lst - Build the mixed source/assembly file of the final image)\n\t$(call echo-help, lds - Build the linker script file)\nifeq ($(HELP_TARGET),2)\n\t$(call echo-help,* $(IMAGE_FILE))\n\t$(call echo-help, - Build the final image)\nendif\n\t$(call echo-help, dir/ - Build all files in dir and below)\n\t$(call echo-help, dir/file.[oisS] - Build specified target only)\n\t$(call echo-help, dir/file.lst - Build specified mixed source/assembly target only)\n\t$(call echo-help, (requires a recent binutils and recent build (System.map)))\n\t$(call echo-help,)\n\t$(call echo-help, make V=0|1 [targets] 0 => quiet build (default), 1 => verbose build)\n\t$(call echo-help, make V=2 [targets] 2 => give reason for rebuild of target)\n\t$(call echo-help, make O=dir [targets] Locate all output files in \"dir\", including .config)\n\t$(call echo-help, make W=n [targets] Enable extra gcc checks, n=1,2,3 where)\n\t$(call echo-help, 1: warnings which may be relevant and do not occur too often)\n\t$(call echo-help, 2: warnings which occur quite often but may still be relevant)\n\t$(call echo-help, 3: more obscure warnings, can most likely be ignored)\n\t$(call echo-help, Multiple levels can be combined with W=12 or W=123)\n\t$(call echo-help,)\n\t$(call echo-help,Execute \"make\" or \"make all\" to build all targets marked with [*])\n\nendif # ifneq ($(HELP_TARGET),)\n\n# Cancel implicit rules on top Makefile\nifeq ($(KBUILD_SRC),)\n$(CURDIR)/Makefile Makefile: ;\nelse\n$(KBUILD_SRC)/Makefile Makefile: ;\nendif\n\nPHONY += FORCE\nFORCE: ;\n### Formatting\nALL_SOURCE = $(shell find . \\( -type f \\( -name '*.c' -o -name '*.cpp' \\) \\) )\n\n\nstyle:\n\t@for src in $(ALL_SOURCE) $(ALL_INCLUDES); do \\\n\t\techo \"Formatting $$src...\" ; \\\n\t\tclang-format -i \"$$src\" ; \\\n\tdone\n\t@echo \"Done\"\n\ncheck-style:\n\t@for src in $(ALL_SOURCE) $(ALL_INCLUDES) ; do \\\n\t\tvar=`clang-format \"$$src\" | diff \"$$src\" - | wc -l` ; \\\n\t\tif [ $$var -ne 0 ] ; then \\\n\t\t\techo \"$$src does not respect the coding style (diff: $$var lines)\" ; \\\n\t\t\tclang-format \"$$src\" | diff \"$$src\" -; \\\n\t\t\texit 1 ; \\\n\t\tfi ; \\\n\tdone\n\t@echo \"Style check passed\"\n \n\nPHONY += style check-style\n\n# Declare the contents of the .PHONY variable as phony. We keep that\n# information in a variable so we can use it in if_changed and friends.\n.PHONY: $(PHONY)\n\n" }, { "path": "README.md", "content": "# PineBuds SDK\n\nThis is just the SDK from the wiki (so far), with dockerfile setup to make building easier, and my reverse engineered bestool integrated.\nThe docker image will build bestool for you first, then drop you into the dev container for building and flashing the buds.\n\nNOTE: Currently, the SDK is not licensed under an 'open source' license. We are working to resolve this issue, and will be reaching out to contributors and other parties soon. For now, consider this SDK as 'All Rights Reserved'/'shared source'.\n\n## Usage\n\nTo use this setup to build & flash your PineBuds you will need a system with docker setup at the minimum.\nDocker is used to (1) make this all much more reprodicible and easier to debug and (2) so that we dont mess with your host system at all.\nIn order to program the buds from inside of the docker container; privileged mode is used. So do be a tad more careful than usual.\n\n```bash\n\n./start_dev.sh # This will cause docker to start your working environment; this should take roughly 1-3 minutes depending on your network speed to the GCC hosting server\n\n# Now you will be inside of the container, and your prompt will look akin to \"root@ec5410d0a265:/usr/src#\"\n\n./build.sh # This will run make and build the output program. If you have weird build errors try running clean.sh or rm -rf'ing the out folder first\n\n# Now that the firmware has finished building; if there are no errors you can load it to your buds\n\n# You may want to back up the firmware currently on the buds - it will be deleted when the new firmware is loaded on:\n./backup.sh\n\n# You may need to take the buds out of the case, wait three seconds, place them back. This wakes them up and the programmer needs to catch this reboot.\n\n# You can try the helper script by running\n./download.sh\n\n# Or do it manually by :\n\n# Assuming that your serial ports are 0 and 1, run the following to commands to program each bud in series.\nbestool write-image out/open_source/open_source.bin --port /dev/ttyACM0\nbestool write-image out/open_source/open_source.bin --port /dev/ttyACM1\n```\n\n## Changelist from stock open source SDK\n\n- Long hold (5 ish seconds) the button on the back when buds are in the case to force a device reboot (so it can be programmed)\n- Use the resistor in the buds to pick Left/Right rather than TWS master/slave pairing\n- Pressing the button on the back while in the case no longer triggers DFU mode\n- Debugging baud rate raised to 2000000 to match stock firmware\n- Fixed TWS operation such that putting either bud into the case correctly switches to the other bud\n- Working (mostly) audio controls using the touch button on the buds\n- Turned off showing up as a HID keyboard, as not sure _why_ you would; but it stops android nagging me about a new keyboard\n\n## Current bud tap codes\n\n### Both pods active\n\n#### Right Ear:\n\n- Single tap : Play/Pause\n- Double tap : Next track\n- Hold : Toggle ANC(Currently non functional, WIP)\n- Triple tap : Volume Up\n\n#### Left Ear:\n\n- Single tap : Play/Pause\n- Double tap : Previous track\n- Hold : Toggle ANC(Currently non functional, WIP)\n- Triple tap : Volume Down\n\n### Single pod active\n\n- Single tap : Play/Pause\n- Double tap : Next track\n- Hold : Previous track\n- Triple tap : Volume Up\n- Quad tap : Volume Down\n\n## Changing audio alerts\n\nThe default audio alerts are stored in:\n\n`config/_default_cfg_src_/res/en/`\n\nIf you want to change the alert to a custom sound, just replace the sound file you'd like to change\n(ie `config/_default_cfg_src_/res/en/SOUND_POWER_ON.opus`) with your own audio file with the same base\nname (ie `config/_default_cfg_src_/res/en/SOUND_POWER_ON.mp3`) and recompile with `./build.sh`!\n\n### Language support\n\nThe `AUDIO` environment variable can be set when running the `build.sh` script to load sound files\nfor languages other than the default English. For example, running `AUDIO=cn ./build.sh` will load sounds files from\n`config/_default_cfg_src_/res/cn/` instead of the default `en/` folder.\n\nThe current languages supported with sound files are English (`en`) and Chinese (`cn`). Other languages\n(or other sets of custom sounds) may be added by adding all the correct sound files into a\n`config/_default_cfg_src_/res//` directory and building with `AUDIO= ./build.sh`.\n\n### Blue light when connected\n\nThe firmware can be configured to either have a blinking blue light when connected or not.\nBuild with `CONNECTED_BLUE_LIGHT=1 ./build.sh` to enable blinking when connected,\nor `CONNECTED_BLUE_LIGHT=0 ./build.sh` (or just the default `./build.sh`) to keep the LEDs off when connected.\n" }, { "path": "apps/Makefile", "content": "obj-y := audioplayers/ common/ main/ key/ pwl/ battery/ factory/\n\nifeq ($(APP_TEST_AUDIO),1)\nobj-y += apptester/\nendif\n\nifeq ($(BTUSB_AUDIO_MODE),1)\nobj-y += usbaudio/\nendif\nifeq ($(BT_USB_AUDIO_DUAL_MODE),1)\nobj-y += btusbaudio/\nobj-y += usbaudio/\nendif\n\n\nifeq ($(ANC_APP),1)\nobj-y += anc/\nendif\n\nifeq ($(WL_DET),1)\nobj-y += mic_alg/\nendif\n\nifeq ($(VOICE_DETECTOR_EN),1)\nobj-y += voice_detector/\nendif\n\nifeq ($(PC_CMD_UART),1)\nobj-y += cmd/\nendif\n\nsubdir-ccflags-y += -Iapps/apptester \\\n\t\t\t\t\t-Iapps/audioplayers \\\n\t\t\t\t\t-Iapps/common \\\n\t\t\t\t\t-Iapps/main \\\n\t\t\t\t\t-Iapps/cmd \\\n\t\t\t\t\t-Iapps/key \\\n\t\t\t\t\t-Iapps/pwl \\\n\t\t\t\t\t-Iapps/battery \\\n\t\t\t\t\t-Iservices/voicepath \\\n\t\t\t\t\t-Iservices/ble_app/app_datapath \\\n\t\t\t\t\t-Iutils/list \\\n\t\t\t\t\t-Iutils/heap \\\n\t\t\t\t\t-Iservices/multimedia/audio/process/filters/include\nifeq ($(BT_USB_AUDIO_DUAL_MODE),1)\nsubdir-ccflags-y += -Iapps/btusbaudio\nendif\n\nifeq ($(A2DP_LDAC_ON),1)\nsubdir-ccflags-y += -Ithirdparty/audio_codec_lib/ldac/inc\nendif\n\n" }, { "path": "apps/anc/Makefile", "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.cpp))\n\nifeq ($(ANC_APP),1)\nCFLAGS_app_anc.o += -DANC_APP\nendif\n\nifeq ($(ANC_FF_ENABLED),1)\nCFLAGS_app_anc.o += -DANC_FF_ENABLED\nendif\n\nifeq ($(ANC_FB_ENABLED),1)\nCFLAGS_app_anc.o += -DANC_FB_ENABLED\nendif\n\nifeq ($(ANC_WNR_ENABLED),1)\nCFLAGS_app_anc.o += -DANC_WNR_ENABLED\nendif\n\n\n\nifeq ($(ANC_ASSIST_ENABLED),1)\nCFLAGS_app_anc.o += -DANC_ASSIST_ENABLED\nCFLAGS_anc_assist.o += -DANC_ASSIST_ENABLED\n\nifeq ($(ANC_ASSIST_WNR_ENABLED),1)\nCFLAGS_anc_assist.o += -DANC_ASSIST_WNR_ENABLED\nendif\nifeq ($(ANC_ASSIST_PILOT_ENABLED),1)\nCFLAGS_anc_assist.o += -DANC_ASSIST_PILOT_ENABLED\nendif\nifeq ($(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED),1)\nCFLAGS_anc_assist.o += -DANC_ASSIST_NOISE_ADAPTIVE_ENABLED\nendif\nifeq ($(ANC_ASSIST_HESS_ENABLED),1)\nCFLAGS_anc_assist.o += -DANC_ASSIST_HESS_ENABLED\nendif\nifeq ($(ANC_ASSIST_PNC_ENABLED),1)\nCFLAGS_anc_assist.o += -DANC_ASSIST_PNC_ENABLED\nendif\nifeq ($(ANC_ASSIST_DEHOWLING_ENABLED),1)\nCFLAGS_anc_assist.o += -DANC_ASSIST_DEHOWLING_ENABLED\nendif\n\nelse\nobj_c := $(filter-out src/anc_assist.c ,$(obj_c))\nendif \n\n\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_app_anc.o += -D__AUDIO_RESAMPLE__\nendif\nifeq ($(SW_PLAYBACK_RESAMPLE),1)\nCFLAGS_app_anc.o += -DSW_PLAYBACK_RESAMPLE\nendif\nifeq ($(SW_CAPTURE_RESAMPLE),1)\nCFLAGS_app_anc.o += -DSW_CAPTURE_RESAMPLE\nendif\nifeq ($(AUDIO_SECTION_SUPPT),1)\nCFLAGS_app_anc.o += -D__AUDIO_SECTION_SUPPT__\nendif\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nsubdir-ccflags-y += \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/fs/fat/ChaN \\\n\t-Iservices/overlay \\\n\t-Iservices/nvrecord \\\n\t-Iservices/resources \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n -Iservices/multimedia/audio/process/anc/include \\\n -Iservices/multimedia/speech/inc \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/drivers/bt \\\n\t-Iutils/cqueue \\\n\t-Iservices/audioflinger \\\n\t-Iutils/lockcqueue \\\n\t-Iutils/intersyshci \\\n\t-Iapps/anc/inc \\\n\t-Iapps/key \\\n\t-Iapps/main \\\n\t-Iapps/common \\\n\t-Iapps/audioplayers \\\n\t-Iapps/factory \\\n\t-Iservices/ble_app \\\n\t-Iservices/bt_app \\\n\t-Iservices/anc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n -Iservices/nv_section/aud_section \\\n -Iservices/nv_section/include \\\n -Iutils/hwtimer_list \\\n -Iservices/ibrt_core/inc \\\n\t-Iservices/tota \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iservices/app_ibrt/inc \\\n\t-Iservices/ble_stack/common/api \\\n\t-Iservices/ble_stack/ble_ip \\\n\t-Iservices/ibrt_ui/inc \\\n\t-Iservices/audio_dump/include\n" }, { "path": "apps/anc/inc/anc_assist.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n\n#ifndef __ANC_ASSIT_H__\n#define __ANC_ASSIT_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\n//#define AF_ANC_DUMP_DATA\n\n\n#if defined(_24BITS_ENABLE)\n#define _SAMPLE_BITS (24)\ntypedef int ASSIST_PCM_T;\n#else\n#define _SAMPLE_BITS (16)\ntypedef short ASSIST_PCM_T;\n#endif\n\n\n#define ANC_ASSIST_FF1_MIC (1<<2)\n#define ANC_ASSIST_FF2_MIC (1<<1)\n#define ANC_ASSIST_FB_MIC (1<<0)\n\n\n\n\n\ntypedef enum{\n ANC_ASSIST_STANDALONE = 0,\n ANC_ASSIST_MUSIC,\n ANC_ASSIST_PHONE_8K,\n ANC_ASSIST_PHONE_16K,\n\n ANC_ASSIST_MODE_QTY\n\n}ANC_ASSIST_MODE_T;\n\n\nvoid anc_assist_open(ANC_ASSIST_MODE_T mode);\n\nvoid anc_assist_process(uint8_t * buf, int len);\nvoid anc_assist_close();\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif" }, { "path": "apps/anc/inc/anc_wnr.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ANC_WNR_H__\n#define __ANC_WNR_H__\n\n#include \n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum {\n ANC_WNR_OPEN_MODE_STANDALONE = 0,\n ANC_WNR_OPEN_MODE_CONFIGURE,\n\n ANC_WNR_OPEN_MODE_QTY\n} anc_wnr_open_mode_t;\n\nvoid anc_release_gain(void);\n\ntypedef enum {\n APP_WNR_NOTIFY_DETECT_RESULT,\n APP_WNR_REQUEST_DETECT_RESULT,\n APP_WNR_RESPONSE_DETECT_RESULT,\n APP_WNR_PROCESS_DETECT_RESULT,\n APP_WNR_SET_TRIGGER,\n APP_WNR_EXCUTE_TRIGGER,\n APP_WNR_SHARE_MODULE_INFO,\n} anc_wnr_sync_ctrl_internal_event_e;\n\nint32_t anc_wnr_ctrl(int32_t sample_rate, int32_t frame_len);\nint32_t anc_wnr_open(anc_wnr_open_mode_t mode);\nint32_t anc_wnr_close(void);\nint32_t anc_wnr_process(void *pcm_buf, uint32_t pcm_len);\nvoid app_wnr_sync_state(void);\nvoid app_wnr_cmd_receive_process(uint8_t *p_buff, uint16_t length);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n" }, { "path": "apps/anc/inc/app_anc.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_ANC_H__\n#define __APP_ANC_H__\n\n#include \"hal_aud.h\"\n#include \"app_key.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_anc_set_playback_samplerate(enum AUD_SAMPRATE_T sample_rate);\nvoid app_anc_init(enum AUD_IO_PATH_T input_path, enum AUD_SAMPRATE_T playback_rate, enum AUD_SAMPRATE_T capture_rate);\nvoid app_anc_close(void);\nvoid app_anc_enable(void);\nvoid app_anc_disable(void);\nbool anc_enabled(void);\nvoid test_anc(void);\nvoid app_anc_resample(uint32_t res_ratio, uint32_t *in, uint32_t *out, uint32_t samples);\n#ifdef __BT_ANC_KEY__\nvoid app_anc_key(APP_KEY_STATUS *status, void *param);\n#endif\nint app_anc_open_module(void);\nint app_anc_close_module(void);\nenum AUD_SAMPRATE_T app_anc_get_play_rate(void);\nbool app_anc_work_status(void);\nvoid app_anc_send_howl_evt(uint32_t howl);\nuint32_t app_anc_get_anc_status(void);\nbool app_pwr_key_monitor_get_val(void);\nbool app_anc_switch_get_val(void);\nvoid app_anc_ios_init(void);\nvoid app_anc_set_init_done(void);\nbool app_anc_set_reboot(void);\nvoid app_anc_status_post(uint8_t status);\nbool app_anc_is_on(void);\nuint32_t app_anc_get_sample_rate(void);\nvoid app_anc_set_coef_idx(uint8_t idx);\nuint8_t app_anc_get_coef_idx(void);\n\n#if defined(IBRT)\nvoid app_anc_cmd_receive_process(uint8_t *buf, uint16_t len);\nvoid app_anc_set_peer_coef_idx(uint8_t idx);\nuint8_t app_anc_get_peer_coef_idx(void);\nvoid app_anc_set_status_sync_flag(bool status);\nbool app_anc_get_status_sync_flag(void);\n#endif\n\n#ifndef __BT_ANC_KEY__\nint app_anc_start(void);\nint app_anc_switch_coef(uint8_t index);\nint app_anc_stop(void);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "apps/anc/inc/peak_detector.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PEAK_DETECTOR_H__\n#define __PEAK_DETECTOR_H__\n\n#include \"plat_types.h\"\n#include \"hal_aud.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n enum AUD_SAMPRATE_T fs;\n enum AUD_BITS_T bits;\n float factor_up;\n float factor_down;\n float reduce_dB;\n} PEAK_DETECTOR_CFG_T;\n\nvoid peak_detector_init(void);\nvoid peak_detector_setup(PEAK_DETECTOR_CFG_T *cfg);\nvoid peak_detector_run(uint8_t *buf, uint32_t len, float vol_multiple);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n" }, { "path": "apps/anc/src/anc_assist.c", "content": "\n\n/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"anc_assist.h\"\n#include \"anc_assist_algo.h\"\n#include \"anc_process.h\"\n#include \"arm_math.h\"\n#include \"audio_dump.h\"\n#include \"audioflinger.h\"\n#include \"hal_aud.h\"\n#include \"hal_codec.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"speech_cfg.h\"\n#include \"speech_memory.h\"\n#include \"speech_ssat.h\"\n#include \n#include \n#include \n\n#if defined(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED)\n#include \"main_classify.h\"\n#endif\n\nstatic void _close_mic_anc_assist();\nstatic void _open_mic_anc_assist();\n#define _SAMPLE_RATE (16000)\n\n#if defined(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED)\n#define _FRAME_LEN (128)\n#else\n#define _FRAME_LEN (160)\n#endif\n\n#define _CHANNEL_NUM_MAX (3)\n#define SAMPLE_BYTES (sizeof(ASSIST_PCM_T))\n#define AF_STREAM_BUFF_SIZE (_FRAME_LEN * SAMPLE_BYTES * _CHANNEL_NUM_MAX * 2)\n#define ANC_ADPT_STREAM_ID AUD_STREAM_ID_3\n\n#define _FRAME_LEN_MAX (160)\n#define _SAMPLE_BITS_MAX (32)\n\nstatic uint8_t __attribute__((aligned(4))) af_stream_buff[AF_STREAM_BUFF_SIZE];\nstatic ASSIST_PCM_T af_stream_mic1[_FRAME_LEN_MAX * (_SAMPLE_BITS_MAX / 8)];\nstatic ASSIST_PCM_T af_stream_mic2[_FRAME_LEN_MAX * (_SAMPLE_BITS_MAX / 8)];\nstatic ASSIST_PCM_T af_stream_mic3[_FRAME_LEN_MAX * (_SAMPLE_BITS_MAX / 8)];\nint MIC_NUM = 0;\nint MIC_MAP = 0;\n\n#if defined(ANC_ASSIST_PILOT_ENABLED)\n#define _PLAY_SAMPLE_RATE (8000)\n#define _PLAY_FRAME_LEN (80)\n#define AF_PLAY_STREAM_BUFF_SIZE (_PLAY_FRAME_LEN * SAMPLE_BYTES * 1 * 2)\nstatic uint8_t __attribute__((aligned(4)))\naf_play_stream_buff[AF_PLAY_STREAM_BUFF_SIZE];\n#endif\n\n#if defined(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED)\nClassifyState *NoiseClassify_st = NULL;\n#endif\n\n#if defined(ANC_ASSIST_PILOT_ENABLED) || defined(ANC_ASSIST_HESS_ENABLED) || \\\n defined(ANC_ASSIST_PNC_ENABLED) || \\\n defined(ANC_ASSIST_DEHOWLING_ENABLED) || \\\n defined(ANC_ASSIST_WNR_ENABLED) || \\\n defined(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED)\n\nextern const struct_anc_cfg *anc_coef_list_48k[1];\nvoid anc_assist_change_curve(int curve_id) {\n TRACE(2, \"[%s] change anc curve %d\", __func__, curve_id);\n anc_set_cfg(anc_coef_list_48k[0], ANC_FEEDFORWARD, ANC_GAIN_NO_DELAY);\n anc_set_cfg(anc_coef_list_48k[0], ANC_FEEDBACK, ANC_GAIN_NO_DELAY);\n}\nbool audio_engine_tt_is_on() { return 1; }\n\n#define _tgt_ff_gain (512)\nvoid anc_assist_set_anc_gain(float gain_ch_l, float gain_ch_r,\n enum ANC_TYPE_T anc_type) {\n\n TRACE(2, \"[%s] set anc gain %d\", __func__, (int)(100 * gain_ch_l));\n uint32_t tgt_ff_gain_l, tgt_ff_gain_r;\n tgt_ff_gain_l = (uint32_t)(_tgt_ff_gain * gain_ch_l);\n tgt_ff_gain_r = (uint32_t)(_tgt_ff_gain * gain_ch_r);\n anc_set_gain(tgt_ff_gain_l, tgt_ff_gain_r, anc_type);\n}\n#endif\n\n#if defined(ANC_ASSIST_PILOT_ENABLED)\nstatic LeakageDetectionState *pilot_st = NULL;\n\n#endif\n\n#if defined(ANC_ASSIST_HESS_ENABLED) || defined(ANC_ASSIST_PNC_ENABLED) || \\\n defined(ANC_ASSIST_DEHOWLING_ENABLED) || defined(ANC_ASSIST_WNR_ENABLED)\nstatic ANCAssistMultiState *anc_assist_multi_st = NULL;\n#endif\n\nANC_ASSIST_MODE_T g_anc_assist_mode = ANC_ASSIST_MODE_QTY;\nvoid anc_assist_open(ANC_ASSIST_MODE_T mode) {\n g_anc_assist_mode = mode;\n\n // normal init\n#if defined(ANC_ASSIST_PILOT_ENABLED)\n pilot_st = LeakageDetection_create(160, 0);\n#endif\n\n#if defined(ANC_ASSIST_HESS_ENABLED) || defined(ANC_ASSIST_PNC_ENABLED) || \\\n defined(ANC_ASSIST_DEHOWLING_ENABLED) || defined(ANC_ASSIST_WNR_ENABLED)\n anc_assist_multi_st = ANCAssistMulti_create(_SAMPLE_RATE, _FRAME_LEN, 128);\n#endif\n\n#if defined(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED)\n NoiseClassify_st = classify_create(_SAMPLE_RATE, _FRAME_LEN);\n#endif\n\n // audio_dump_init(160,sizeof(short),3);\n\n if (mode == ANC_ASSIST_MODE_QTY) {\n return;\n } else {\n if (mode == ANC_ASSIST_STANDALONE || mode == ANC_ASSIST_MUSIC) {\n _open_mic_anc_assist();\n }\n if (mode == ANC_ASSIST_PHONE_8K) {\n // normal init 8k\n } else if (mode == ANC_ASSIST_PHONE_16K) {\n // normal init 16k\n }\n }\n}\n\nvoid anc_assist_close() {\n\n#if defined(ANC_ASSIST_PILOT_ENABLED)\n LeakageDetection_destroy(pilot_st);\n#endif\n#if defined(ANC_ASSIST_HESS_ENABLED) || defined(ANC_ASSIST_PNC_ENABLED) || \\\n defined(ANC_ASSIST_DEHOWLING_ENABLED) || defined(ANC_ASSIST_WNR_ENABLED)\n ANCAssistMulti_destroy(anc_assist_multi_st);\n#endif\n\n#if defined(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED)\n classify_destroy(NoiseClassify_st);\n#endif\n\n // ext_heap_deinit();\n\n if (g_anc_assist_mode == ANC_ASSIST_MODE_QTY) {\n return;\n } else {\n if (g_anc_assist_mode == ANC_ASSIST_STANDALONE ||\n g_anc_assist_mode == ANC_ASSIST_MUSIC) {\n _close_mic_anc_assist();\n }\n if (g_anc_assist_mode == ANC_ASSIST_PHONE_8K) {\n // normal init 8k\n } else if (g_anc_assist_mode == ANC_ASSIST_PHONE_16K) {\n // normal init 16k\n }\n }\n}\n\nextern ASSIST_PCM_T ref_buf_data[80];\nvoid anc_assist_process(uint8_t *buf, int len) {\n\n int32_t frame_len = len / SAMPLE_BYTES / MIC_NUM;\n ASSERT(frame_len == _FRAME_LEN, \"[%s] frame len(%d) is invalid.\", __func__,\n frame_len);\n ASSIST_PCM_T *pcm_buf = (ASSIST_PCM_T *)buf;\n\n ASSIST_PCM_T *mic1 = (ASSIST_PCM_T *)af_stream_mic1;\n ASSIST_PCM_T *mic2 = (ASSIST_PCM_T *)af_stream_mic2;\n ASSIST_PCM_T *mic3 = (ASSIST_PCM_T *)af_stream_mic3;\n\n for (int32_t i = 0; i < frame_len; i++) {\n mic1[i] = pcm_buf[MIC_NUM * i + 0];\n mic2[i] = pcm_buf[MIC_NUM * i + 1];\n mic3[i] = pcm_buf[MIC_NUM * i + 2];\n }\n // audio_dump_clear_up();\n // audio_dump_add_channel_data(0,mic1,160);\n // audio_dump_add_channel_data(1,mic2,160);\n // audio_dump_add_channel_data(2,mic3,160);\n // audio_dump_run();\n // TRACE(2,\"in callback\");\n#if defined(ANC_ASSIST_PILOT_ENABLED)\n LeakageDetection_process(pilot_st, AF_ANC_OFF, mic3, ref_buf_data, frame_len);\n#endif\n\n#if defined(ANC_ASSIST_HESS_ENABLED) || defined(ANC_ASSIST_PNC_ENABLED) || \\\n defined(ANC_ASSIST_DEHOWLING_ENABLED) || defined(ANC_ASSIST_WNR_ENABLED)\n ANCAssistMulti_process(anc_assist_multi_st, mic1, mic2, mic3, frame_len);\n#endif\n\n#if defined(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED)\n static int last_classify_res = -1;\n classify_process(NoiseClassify_st, mic1, last_classify_res);\n#endif\n\n if (g_anc_assist_mode == ANC_ASSIST_PHONE_16K) {\n // down sample\n }\n\n // process fft\n\n // wnr\n\n // pnc\n\n // hess\n\n // pilot adpt\n}\n\nstatic uint32_t anc_assist_callback(uint8_t *buf, uint32_t len) {\n#ifdef TEST_MIPS\n start_ticks = hal_fast_sys_timer_get();\n#endif\n anc_assist_process(buf, len);\n\n#ifdef TEST_MIPS\n end_ticks = hal_fast_sys_timer_get();\n used_mips = (end_ticks - start_ticks) * 1000 / (start_ticks - pre_ticks);\n TRACE(2, \"[%s] Usage: %d in a thousand (MIPS).\", __func__, used_mips);\n // wnr_ticks = start_ticks;\n // TRACE(2,\"[%s] WNR frame takes %d ms.\", __func__,\n // FAST_TICKS_TO_MS((start_ticks - pre_ticks)*100));\n pre_ticks = start_ticks;\n#endif\n return 0;\n}\n\n#if defined(ANC_ASSIST_PILOT_ENABLED)\nstatic uint32_t anc_assist_playback_callback(uint8_t *buf, uint32_t len) {\n get_pilot_data(buf, len);\n // TRACE(2,\"playing data %d\",len);\n return 0;\n}\n#endif\n\nstatic void _open_mic_anc_assist(void) {\n\n int anc_assist_mic_num = 0;\n\n#if defined(ANC_ASSIST_PILOT_ENABLED)\n anc_assist_mic_num = anc_assist_mic_num | ANC_ASSIST_FB_MIC;\n#endif\n\n#if defined(ANC_ASSIST_HESS_ENABLED) || \\\n defined(ANC_ASSIST_NOISE_ADAPTIVE_ENABLED)\n anc_assist_mic_num = anc_assist_mic_num | ANC_ASSIST_FF1_MIC;\n#endif\n\n#if defined(ANC_ASSIST_PNC_ENABLED)\n anc_assist_mic_num =\n anc_assist_mic_num | ANC_ASSIST_FF1_MIC | ANC_ASSIST_FB_MIC;\n#endif\n\n#if defined(ANC_ASSIST_DEHOWLING_ENABLED)\n anc_assist_mic_num =\n anc_assist_mic_num | ANC_ASSIST_FF1_MIC | ANC_ASSIST_FB_MIC;\n#endif\n\n#if defined(ANC_ASSIST_WNR_ENABLED)\n anc_assist_mic_num =\n anc_assist_mic_num | ANC_ASSIST_FF1_MIC | ANC_ASSIST_FF2_MIC;\n#endif\n\n switch (anc_assist_mic_num) {\n case (0): {\n TRACE(2, \"[%s] no mic is used\", __func__);\n return;\n } break;\n case (1): {\n TRACE(2, \"[%s] use fb mic only\", __func__);\n MIC_NUM = 3;\n MIC_MAP = AUD_INPUT_PATH_AF_ANC;\n\n } break;\n case (4): {\n TRACE(2, \"[%s] use ff mic only\", __func__);\n MIC_NUM = 3;\n MIC_MAP = AUD_INPUT_PATH_ANC_WNR;\n\n } break;\n case (5): {\n TRACE(2, \"[%s] use ff mic and fb mic\", __func__);\n MIC_NUM = 3;\n MIC_MAP = AUD_INPUT_PATH_ANC_WNR;\n\n } break;\n case (6): {\n TRACE(2, \"[%s] use ff1 mic and ff2 mic\", __func__);\n MIC_NUM = 2;\n MIC_MAP = AUD_INPUT_PATH_AF_ANC;\n\n } break;\n case (7): {\n TRACE(2, \"[%s] use ff1 mic and ff2 mic and fb mic\", __func__);\n MIC_NUM = 2;\n MIC_MAP = AUD_INPUT_PATH_AF_ANC;\n\n } break;\n\n default: {\n TRACE(2, \"[%s] invalid mic order is used\", __func__);\n } break;\n }\n\n MIC_NUM = 3;\n MIC_MAP = AUD_INPUT_PATH_AF_ANC;\n struct AF_STREAM_CONFIG_T stream_cfg;\n TRACE(1, \"[%s] ...\", __func__);\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n stream_cfg.channel_num = (enum AUD_CHANNEL_NUM_T)MIC_NUM;\n stream_cfg.sample_rate = (enum AUD_SAMPRATE_T)_SAMPLE_RATE;\n stream_cfg.bits = (enum AUD_BITS_T)_SAMPLE_BITS;\n stream_cfg.vol = 12;\n stream_cfg.chan_sep_buf = false;\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = (enum AUD_IO_PATH_T)MIC_MAP;\n stream_cfg.handler = anc_assist_callback;\n stream_cfg.data_size = _FRAME_LEN * SAMPLE_BYTES * 2 * MIC_NUM;\n stream_cfg.data_ptr = af_stream_buff;\n ASSERT(stream_cfg.channel_num == MIC_NUM,\n \"[%s] channel number(%d) is invalid.\", __func__,\n stream_cfg.channel_num);\n TRACE(2, \"[%s] sample_rate:%d, data_size:%d\", __func__,\n stream_cfg.sample_rate, stream_cfg.data_size);\n TRACE(2, \"[%s] af_stream_buff = %p\", __func__, af_stream_buff);\n\n af_stream_open(ANC_ADPT_STREAM_ID, AUD_STREAM_CAPTURE, &stream_cfg);\n af_stream_start(ANC_ADPT_STREAM_ID, AUD_STREAM_CAPTURE);\n\n#if defined(ANC_ASSIST_PILOT_ENABLED)\n // struct AF_STREAM_CONFIG_T stream_cfg;\n TRACE(1, \"[%s] set play ...\", __func__);\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n stream_cfg.bits = (enum AUD_BITS_T)_SAMPLE_BITS;\n stream_cfg.channel_num = AUD_CHANNEL_NUM_1;\n stream_cfg.sample_rate = (enum AUD_SAMPRATE_T)_PLAY_SAMPLE_RATE;\n\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n stream_cfg.vol = 15;\n\n stream_cfg.handler = anc_assist_playback_callback;\n stream_cfg.data_ptr = af_play_stream_buff;\n stream_cfg.data_size = sizeof(af_play_stream_buff);\n\n af_stream_open(ANC_ADPT_STREAM_ID, AUD_STREAM_PLAYBACK, &stream_cfg);\n af_stream_start(ANC_ADPT_STREAM_ID, AUD_STREAM_PLAYBACK);\n#endif\n}\n\nstatic void _close_mic_anc_assist() {\n TRACE(1, \"[%s] ...\", __func__);\n\n af_stream_stop(ANC_ADPT_STREAM_ID, AUD_STREAM_CAPTURE);\n af_stream_close(ANC_ADPT_STREAM_ID, AUD_STREAM_CAPTURE);\n if (g_anc_assist_mode == ANC_ASSIST_STANDALONE ||\n g_anc_assist_mode == ANC_ASSIST_MUSIC) {\n // close capture\n }\n // destroy\n}\n" }, { "path": "apps/anc/src/anc_wnr.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_utils.h\"\n#include \"string.h\"\n\n#include \"anc_process.h\"\n#include \"audioflinger.h\"\n#include \"hal_aud.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hwtimer_list.h\"\n//#include \"audio_dump.h\"\n//#include \"anc_usb_app.h\"\n\n#include \"anc_wnr.h\"\n#include \"app_ibrt_keyboard.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_thread.h\"\n#include \"bt_drv_interface.h\"\n#include \"cmsis_os.h\"\n#include \"speech_cfg.h\"\n#include \"wind_detection_2mic.h\"\n\n#if defined(SPEECH_TX_24BIT)\n#define _24BITS_ENABLE\n#endif\n\n// Wind detection algorithm\n#define _SAMPLE_RATE (8000)\n#define _FRAME_LEN (60)\n#define _CHANNEL_NUM (2)\n\n#if defined(_24BITS_ENABLE)\n#define _SAMPLE_BITS (24)\ntypedef int WNR_PCM_T;\n#else\n#define _SAMPLE_BITS (16)\ntypedef short WNR_PCM_T;\n#endif\n\n#define SAMPLE_BYTES sizeof(WNR_PCM_T)\n\n#define _FRAME_LEN_MAX (128)\n#define _SAMPLE_BITS_MAX (32)\n#define WINDINDICATOR_SIZE (10)\n#define _LOOP_CNT (3)\n\n// ff gain coefficient tunning\n#define _NO_WIND_FF_GAIN_COEF (1.0)\n#define _SMALL_WIND_FF_GAIN_COEF (0.5)\n#define _STRONG_WIND_FF_GAIN_COEF (0.0)\n#define _STRONG2SMALL_WIND_FF_MID_GAIN_COEF (0.25)\n#define _SMALL2NO_WIND_FF_MID_GAIN_COEF (0.75)\n\n// wind indictor threshold\n#define _NO_WIND_THD (0.75)\n#define _SMALL_WIND_THD (0.55)\n#define _STRONG_WIND_THD (0.45)\n\n// energy threshold\n#define _POWER_THD (0.1)\n\n// ff close time\n#define _PERIOD (12)\n#define _TARGET_TIME (4)\n\n//#define TEST_MIPS\n#ifdef TEST_MIPS\nstatic uint32_t pre_ticks = 0;\nstatic uint32_t start_ticks = 0;\nstatic uint32_t end_ticks = 0;\nstatic uint32_t used_mips = 0;\n#endif\n\nWindDetection2MicState *wind_st = NULL;\n\nstatic WindDetection2MicConfig wind_cfg = {\n .bypass = 0,\n .power_thd = _POWER_THD,\n};\n// static uint8_t heap_buf[1024 * 12];\n\n// Wind factor process\n\nextern bool app_anc_work_status(void);\n\n// Mic operation\n#define ANC_WNR_STREAM_ID AUD_STREAM_ID_0\nstatic anc_wnr_open_mode_t g_open_mode = ANC_WNR_OPEN_MODE_QTY;\n// 2ch, pingpong\n#define AF_STREAM_BUFF_SIZE (_FRAME_LEN * SAMPLE_BYTES * 2 * 2)\nstatic uint8_t __attribute__((aligned(4)))\naf_stream_buff[AF_STREAM_BUFF_SIZE * _LOOP_CNT];\nstatic uint8_t __attribute__((aligned(4)))\naf_stream_mic1[_FRAME_LEN_MAX * (_SAMPLE_BITS_MAX / 8)];\nstatic uint8_t __attribute__((aligned(4)))\naf_stream_mic2[_FRAME_LEN_MAX * (_SAMPLE_BITS_MAX / 8)];\n\nstatic int32_t g_sample_rate = _SAMPLE_RATE;\nstatic int32_t g_frame_len = _FRAME_LEN;\n\nstatic void _open_mic(void);\nstatic void _close_mic(void);\n\n#define WNR_SYNC_COUNTER_THRESHOLD_FOR_SCO 18 // talk:180ms * 18 = 3240ms\n#define WNR_SYNC_COUNTER_THRESHOLD_FOR_NORMAL 35 // normal:90ms * 35 = 3150ms\n\n// if not need to set ANC FF GAIN by trigger delay way, set macro to 0.\n#define WNR_SYNC_TRIGGER_DELAY 300 // unit:ms\n\n// if not need to printf information about sync, set macro to 0.\n#define WNR_SYNC_DEBUG_LOG 1\n\n// default disable twostage mode so that reduce delay to set ANC FF GAIN, also\n// to simplify code. in order to avoid pop voice, recommend to enable twostage\n// mode if chip is based on 1303 lower platform. if need to use twostage mode to\n// set ANC FF GAIN, set macro to 1.\n#define WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE 0\n\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n#define WNR_SYNC_TWOSTAGE_DELAY 300 // unit:tick\nuint8_t Twostage = 0;\nuint8_t FFstate = 0;\n#endif\n\nstatic void app_wnr_sync_timer_handler(void const *param);\nosTimerDef(APP_WNR_SYNC_TIMER, app_wnr_sync_timer_handler);\nstatic osTimerId app_wnr_sync_timer = NULL;\n\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\nstatic void app_wnr_twostage_handler(void const *param);\nosTimerDef(APP_WNR_TWOSTAGE_TIMER, app_wnr_twostage_handler);\nstatic osTimerId app_wnr_twostage_timer = NULL;\n#endif\n\nuint8_t g_wind_st = 0;\nuint8_t cnt = 0;\nuint8_t period = 12;\nfloat windsum = 0.0;\nfloat wind_indictor = 0.0;\nstatic uint8_t g_set_Windstate = 0;\nstatic uint8_t g_local_Windstate = 0;\nstatic uint8_t g_peer_Windstate = 0;\nstatic bool g_local_Wind_module_onoff = false;\nstatic bool g_peer_Wind_module_onoff = false;\nstatic uint8_t wnr_sync_counter_for_sco = 0;\nstatic uint8_t wnr_sync_counter_for_normal = 0;\nstatic anc_wnr_open_mode_t g_wnr_open_mode = ANC_WNR_OPEN_MODE_QTY;\nstatic bool g_wnr_notify_flag = false;\nstatic bool g_wnr_request_flag = false;\nstatic bool g_wnr_sync_flag = false;\n\nstruct anc_wnr_state_queue_t {\n uint8_t buf_for_sco[WNR_SYNC_COUNTER_THRESHOLD_FOR_SCO];\n uint8_t buf_for_normal[WNR_SYNC_COUNTER_THRESHOLD_FOR_NORMAL];\n uint8_t index_for_sco;\n uint8_t index_for_normal;\n uint8_t number_for_sco;\n uint8_t number_for_normal;\n} g_anc_wnr_state_queue;\nfloat windindicator[WINDINDICATOR_SIZE] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1};\nfloat windthd[3] = {\n _NO_WIND_THD, _SMALL_WIND_THD,\n _STRONG_WIND_THD}; //{0.75,0.35,0.30};//{0.75,0.40,0.35};{0.75,0.45,0.40};{0.75,0.50,0.45};\n\n#ifndef HW_SUPPORT_SMOOOTHING_GAIN\n#define ANC_TCTRL_NUM 2\n#define ANC_TIMER_PERIOD_GAIN 50\n#define TIMER_CNT 20\n\nstruct anc_tuning_ctrl {\n uint8_t timer_init;\n uint8_t timer_ff_gain_run;\n const struct_anc_cfg *cfg;\n enum ANC_TYPE_T type;\n HWTIMER_ID timer_ff_gain_id;\n};\n\nstatic struct anc_tuning_ctrl anc_tctrl;\n\nstatic uint32_t timer_cnt = 0;\nstatic bool ff_smoothing_flag = false;\n#endif\n\nstatic int32_t anc_ff_gain_l = 512;\nstatic int32_t anc_ff_gain_r = 512;\nstatic int32_t tgt_ff_gain_l, tgt_ff_gain_r;\nstatic int32_t pre_ff_gain_l, pre_ff_gain_r;\n\n#ifndef HW_SUPPORT_SMOOOTHING_GAIN\nstatic int32_t delta_ff_gain_l, delta_ff_gain_r;\n#endif\n\n#ifndef HW_SUPPORT_SMOOOTHING_GAIN\nvoid anc_gain_tuning_init(void) {\n timer_cnt = 0;\n ff_smoothing_flag = false;\n}\n\nstatic void anc_tuning_ff_gain_timer_timeout(void *param) {\n timer_cnt++;\n int32_t ff_gain_l = 0;\n int32_t ff_gain_r = 0;\n if ((timer_cnt < delta_ff_gain_l) || (timer_cnt < delta_ff_gain_r)) {\n if (pre_ff_gain_l < tgt_ff_gain_l) {\n pre_ff_gain_l = pre_ff_gain_l + 1;\n ff_gain_l = pre_ff_gain_l;\n } else if (pre_ff_gain_l > tgt_ff_gain_l) {\n pre_ff_gain_l = pre_ff_gain_l - 1;\n ff_gain_l = pre_ff_gain_l;\n }\n\n if (pre_ff_gain_r < tgt_ff_gain_r) {\n pre_ff_gain_r = pre_ff_gain_r + 1;\n ff_gain_r = pre_ff_gain_r;\n } else if (pre_ff_gain_r > tgt_ff_gain_r) {\n pre_ff_gain_r = pre_ff_gain_r - 1;\n ff_gain_r = pre_ff_gain_r;\n }\n\n anc_set_gain(ff_gain_l, ff_gain_r, ANC_FEEDFORWARD);\n TRACE(3, \"[%s] ff_gain_l = %d, ff_gain_r = %d\", __func__, ff_gain_l,\n ff_gain_r);\n\n struct anc_tuning_ctrl *c = (struct anc_tuning_ctrl *)param;\n hwtimer_start(c->timer_ff_gain_id, US_TO_TICKS(ANC_TIMER_PERIOD_GAIN));\n ff_smoothing_flag = 1;\n } else {\n anc_set_gain(tgt_ff_gain_l, tgt_ff_gain_r, ANC_FEEDFORWARD);\n ff_smoothing_flag = 0;\n }\n}\n#endif\n\nstatic void _set_anc_ff_gain(bool update_anc_gain, float gain_coef,\n enum ANC_TYPE_T type) {\n\n#ifdef HW_SUPPORT_SMOOOTHING_GAIN\n if (update_anc_gain) {\n anc_get_gain(&pre_ff_gain_l, &pre_ff_gain_r, ANC_FEEDFORWARD);\n anc_ff_gain_l = pre_ff_gain_l;\n anc_ff_gain_r = pre_ff_gain_r;\n TRACE(3, \"[%s] Update anc_gain_l = %d, anc_gain_r = %d.\", __func__,\n anc_ff_gain_l, anc_ff_gain_r);\n }\n tgt_ff_gain_l = (int32_t)(anc_ff_gain_l * gain_coef);\n tgt_ff_gain_r = (int32_t)(anc_ff_gain_r * gain_coef);\n TRACE(3, \"[%s] tgt_ff_gain_l = %d, tgt_ff_gain_r = %d.\", __func__,\n tgt_ff_gain_l, tgt_ff_gain_r);\n anc_set_gain(tgt_ff_gain_l, tgt_ff_gain_r, ANC_FEEDFORWARD);\n#else\n struct anc_tuning_ctrl *c = &anc_tctrl;\n // uint32_t cur_time = TICKS_TO_MS(hal_sys_timer_get());\n\n // reset timer\n if (c->timer_ff_gain_run) {\n hwtimer_stop(c->timer_ff_gain_id);\n }\n anc_get_gain(&pre_ff_gain_l, &pre_ff_gain_r, ANC_FEEDFORWARD);\n TRACE(3, \"[%s] pre_ff_gain_l = %d, pre_ff_gain_r = %d.\", __func__,\n pre_ff_gain_l, pre_ff_gain_r);\n if (update_anc_gain && !ff_smoothing_flag) {\n anc_ff_gain_l = pre_ff_gain_l;\n anc_ff_gain_r = pre_ff_gain_r;\n TRACE(3, \"[%s] Update anc_gain_l = %d, anc_gain_r = %d.\", __func__,\n anc_ff_gain_l, anc_ff_gain_r);\n }\n tgt_ff_gain_l = (int32_t)(anc_ff_gain_l * gain_coef);\n tgt_ff_gain_r = (int32_t)(anc_ff_gain_r * gain_coef);\n delta_ff_gain_l = abs(tgt_ff_gain_l - pre_ff_gain_l);\n delta_ff_gain_r = abs(tgt_ff_gain_r - pre_ff_gain_r);\n TRACE(3, \"[%s] tgt_ff_gain_l = %d, tgt_ff_gain_r = %d.\", __func__,\n tgt_ff_gain_l, tgt_ff_gain_r);\n\n timer_cnt = 0;\n\n // timer restart\n hwtimer_start(c->timer_ff_gain_id, MS_TO_TICKS(ANC_TIMER_PERIOD_GAIN));\n c->timer_ff_gain_run = 1;\n // set gain directly\n // anc_set_gain(gain_ch_l, gain_ch_r, type);\n\n // AUD_TRACE(TRACE_MASK_INFO, \"set anc gain :[%d], gain_ch_l=%d, gian_ch_r=%d,\n // type=%d\", cur_time, gain_ch_l, gain_ch_r, (int)type);\n#endif\n}\n\nvoid anc_release_gain(void) {\n TRACE(1, \"[%s] ...Release FF gain\", __func__);\n\n _set_anc_ff_gain(false, 1, ANC_FEEDFORWARD);\n}\n\nint32_t anc_wnr_ctrl(int32_t sample_rate, int32_t frame_len) {\n TRACE(3, \"[%s] sample_rate = %d, frame_len = %d\", __func__, sample_rate,\n frame_len);\n\n g_sample_rate = sample_rate;\n g_frame_len = frame_len;\n\n if (g_sample_rate == 16000) {\n g_frame_len >>= 1;\n }\n\n return 0;\n}\n\nstatic void app_wnr_reset_state_queue(void) {\n g_anc_wnr_state_queue.index_for_normal = 0;\n g_anc_wnr_state_queue.index_for_sco = 0;\n g_anc_wnr_state_queue.number_for_normal = 0;\n g_anc_wnr_state_queue.number_for_sco = 0;\n memset(g_anc_wnr_state_queue.buf_for_normal, 0,\n WNR_SYNC_COUNTER_THRESHOLD_FOR_NORMAL);\n memset(g_anc_wnr_state_queue.buf_for_sco, 0,\n WNR_SYNC_COUNTER_THRESHOLD_FOR_SCO);\n}\nstatic void app_wnr_push_state_to_queue(uint8_t open_mode, uint8_t arg0) {\n if (open_mode == ANC_WNR_OPEN_MODE_STANDALONE) // normal mode...\n {\n g_anc_wnr_state_queue\n .buf_for_normal[g_anc_wnr_state_queue.index_for_normal] = arg0;\n\n if (++g_anc_wnr_state_queue.index_for_normal >=\n WNR_SYNC_COUNTER_THRESHOLD_FOR_NORMAL) {\n g_anc_wnr_state_queue.index_for_normal = 0;\n }\n\n if (g_anc_wnr_state_queue.number_for_normal <\n WNR_SYNC_COUNTER_THRESHOLD_FOR_NORMAL) {\n g_anc_wnr_state_queue.number_for_normal++;\n }\n } else // sco mode...\n {\n g_anc_wnr_state_queue.buf_for_sco[g_anc_wnr_state_queue.index_for_sco] =\n arg0;\n\n if (++g_anc_wnr_state_queue.index_for_sco >=\n WNR_SYNC_COUNTER_THRESHOLD_FOR_SCO) {\n g_anc_wnr_state_queue.index_for_sco = 0;\n }\n\n if (g_anc_wnr_state_queue.number_for_sco <\n WNR_SYNC_COUNTER_THRESHOLD_FOR_SCO) {\n g_anc_wnr_state_queue.number_for_sco++;\n }\n }\n}\nstatic uint8_t app_wnr_get_state_from_queue(uint8_t open_mode) {\n uint8_t counter0 = 0;\n uint8_t counter1 = 0;\n uint8_t counter2 = 0;\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(2, \"[%s] open_mode:%d\", __func__, open_mode);\n TRACE(2, \"[%s] index_for_normal:%d\", __func__,\n g_anc_wnr_state_queue.index_for_normal);\n TRACE(2, \"[%s] index_for_sco:%d\", __func__,\n g_anc_wnr_state_queue.index_for_sco);\n TRACE(2, \"[%s] number_for_normal:%d\", __func__,\n g_anc_wnr_state_queue.number_for_normal);\n TRACE(2, \"[%s] number_for_sco:%d\", __func__,\n g_anc_wnr_state_queue.number_for_sco);\n TRACE(1, \"[%s] buf_for_normal:\", __func__);\n DUMP8(\"%d \", g_anc_wnr_state_queue.buf_for_normal,\n g_anc_wnr_state_queue.number_for_normal);\n TRACE(1, \"[%s] buf_for_sco:\", __func__);\n DUMP8(\"%d \", g_anc_wnr_state_queue.buf_for_sco,\n g_anc_wnr_state_queue.number_for_sco);\n#endif\n\n if (open_mode == ANC_WNR_OPEN_MODE_STANDALONE) // normal mode...\n {\n for (uint8_t i = 0; i < g_anc_wnr_state_queue.number_for_normal; i++) {\n if (g_anc_wnr_state_queue.buf_for_normal[i] == 0) {\n counter0++;\n continue;\n }\n if (g_anc_wnr_state_queue.buf_for_normal[i] == 1) {\n counter1++;\n continue;\n }\n if (g_anc_wnr_state_queue.buf_for_normal[i] == 2) {\n counter2++;\n continue;\n }\n }\n } else // sco mode...\n {\n for (uint8_t i = 0; i < g_anc_wnr_state_queue.number_for_sco; i++) {\n if (g_anc_wnr_state_queue.buf_for_sco[i] == 0) {\n counter0++;\n continue;\n }\n if (g_anc_wnr_state_queue.buf_for_sco[i] == 1) {\n counter1++;\n continue;\n }\n if (g_anc_wnr_state_queue.buf_for_sco[i] == 2) {\n counter2++;\n continue;\n }\n }\n }\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(3, \"counter0:%d counter1:%d counter2:%d\", counter0, counter1, counter2);\n#endif\n\n if (counter0 >= counter1) {\n if (counter0 >= counter2) {\n return 0;\n } else {\n return 2;\n }\n } else {\n if (counter1 >= counter2) {\n return 1;\n } else {\n return 2;\n }\n }\n}\nstatic void app_wnr_trigger_internal_event(uint32_t evt, uint32_t arg0,\n uint32_t arg1, uint32_t arg2) {\n APP_MESSAGE_BLOCK msg;\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(5, \"[%s] evt:%d arg0:%d arg1:%d arg2:%d\", __func__, evt, arg0, arg1,\n arg2);\n#endif\n msg.mod_id = APP_MODUAL_WNR;\n msg.msg_body.message_id = evt;\n msg.msg_body.message_Param0 = arg0;\n msg.msg_body.message_Param1 = arg1;\n msg.msg_body.message_Param2 = arg2;\n app_mailbox_put(&msg);\n}\nstatic void app_wnr_share_module_info(void) {\n uint8_t buf[3] = {0};\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(2, \"[%s] local_module_onoff:%d\", __func__, g_local_Wind_module_onoff);\n#endif\n\n buf[0] = IBRT_ACTION_SYNC_WNR;\n buf[1] = (uint8_t)APP_WNR_SHARE_MODULE_INFO;\n buf[2] = (uint8_t)g_local_Wind_module_onoff;\n\n app_ibrt_ui_send_user_action(buf, 3);\n}\nvoid app_wnr_sync_state(void) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] enter...\", __func__);\n#endif\n\n wnr_sync_counter_for_sco = 0;\n wnr_sync_counter_for_normal = 0;\n g_wnr_notify_flag = false;\n g_wnr_request_flag = false;\n g_peer_Wind_module_onoff = false;\n g_peer_Windstate = 0;\n\n if (g_local_Wind_module_onoff == true) {\n g_wnr_sync_flag = true;\n }\n}\n\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\nstatic void app_wnr_twostage_handler(void const *param) {\n float gain_coef = 0.0;\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] enter...\", __func__);\n#endif\n\n if ((Twostage == 1) && (FFstate == 7)) {\n FFstate = 1; // 25%->50%\n Twostage = 0;\n gain_coef = _SMALL_WIND_FF_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n\n TRACE(1, \"[%s] Enable 0.5 FF ANC.\", __func__);\n } else if ((Twostage == 1) && (FFstate == 6)) {\n FFstate = 0; // 75%->100%\n Twostage = 0;\n gain_coef = _NO_WIND_FF_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n TRACE(1, \"[%s] Enable FF ANC.\", __func__);\n }\n}\n#endif\n\nstatic void app_wnr_sync_timer_handler(void const *param) {\n uint8_t temp = *((uint8_t *)param);\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(2, \"[%s] arg0:%d\", __func__, temp);\n#endif\n\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_EXCUTE_TRIGGER, (uint32_t)temp, 0,\n 0);\n}\nstatic void app_wnr_notify_detect_result(void) {\n uint8_t buf[3] = {0};\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(2, \"[%s] local_Windstate:%d\", __func__, g_local_Windstate);\n#endif\n g_wnr_sync_flag = false;\n g_wnr_notify_flag = true;\n\n buf[0] = IBRT_ACTION_SYNC_WNR;\n buf[1] = (uint8_t)APP_WNR_NOTIFY_DETECT_RESULT;\n buf[2] = g_local_Windstate;\n\n app_ibrt_ui_send_user_action(buf, 3);\n}\nstatic void app_wnr_request_detect_result(void) {\n uint8_t buf[3] = {0};\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(2, \"[%s] local_Windstate:%d\", __func__, g_local_Windstate);\n#endif\n g_wnr_sync_flag = false;\n g_wnr_request_flag = true;\n\n buf[0] = IBRT_ACTION_SYNC_WNR;\n buf[1] = (uint8_t)APP_WNR_REQUEST_DETECT_RESULT;\n buf[2] = g_local_Windstate;\n\n app_ibrt_ui_send_user_action(buf, 3);\n}\nstatic void app_wnr_response_detect_result(uint32_t arg0) {\n uint8_t buf[3] = {0};\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] enter...\", __func__);\n#endif\n\n if (g_wnr_notify_flag == true) {\n g_wnr_notify_flag = false;\n return;\n }\n\n g_wnr_sync_flag = false;\n g_local_Windstate = app_wnr_get_state_from_queue(g_wnr_open_mode);\n g_peer_Windstate = (uint8_t)arg0;\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(3, \"[%s] local_Windstate:%d peer_Windstate:%d\", __func__,\n g_local_Windstate, g_peer_Windstate);\n#endif\n\n buf[0] = IBRT_ACTION_SYNC_WNR;\n buf[1] = (uint8_t)APP_WNR_RESPONSE_DETECT_RESULT;\n buf[2] = g_local_Windstate;\n\n app_ibrt_ui_send_user_action(buf, 3);\n}\nstatic void app_wnr_process_detect_result(uint32_t arg0) {\n if (g_wnr_request_flag == false) {\n g_local_Windstate = app_wnr_get_state_from_queue(g_wnr_open_mode);\n }\n\n g_wnr_sync_flag = false;\n g_wnr_request_flag = false;\n g_peer_Windstate = (uint8_t)arg0;\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(3, \"[%s] local_Windstate:%d peer_wnr_state:%d\", __func__,\n g_local_Windstate, arg0);\n#endif\n\n if (g_local_Windstate >= g_peer_Windstate) {\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_SET_TRIGGER,\n (uint32_t)g_local_Windstate, 0, 0);\n } else {\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_SET_TRIGGER,\n (uint32_t)g_peer_Windstate, 0, 0);\n }\n}\nstatic void app_wnr_set_trigger(uint32_t arg0, uint32_t arg1) {\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n uint32_t current_ticks = 0;\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(2, \"[%s] set_Windstate:%d\", __func__, arg0);\n#endif\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER) &&\n (g_peer_Wind_module_onoff == true)) {\n uint8_t buf[7] = {0};\n current_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->tws_conhandle);\n uint32_t tg_ticks = current_ticks + MS_TO_TICKS(WNR_SYNC_TRIGGER_DELAY);\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(3, \"[%s] current_ticks:%d tg_ticks:%d\", __func__, current_ticks,\n tg_ticks);\n#endif\n\n buf[0] = IBRT_ACTION_SYNC_WNR;\n buf[1] = (uint8_t)APP_WNR_SET_TRIGGER;\n buf[2] = (uint8_t)arg0;\n buf[3] = (uint8_t)((tg_ticks & 0xff000000) >> 24);\n buf[4] = (uint8_t)((tg_ticks & 0x00ff0000) >> 16);\n buf[5] = (uint8_t)((tg_ticks & 0x0000ff00) >> 8);\n buf[6] = (uint8_t)(tg_ticks & 0x000000ff);\n\n app_ibrt_ui_send_user_action(buf, 7);\n\n if ((app_wnr_sync_timer != NULL) && (tg_ticks != current_ticks)) {\n g_set_Windstate = (uint8_t)arg0;\n osTimerStop(app_wnr_sync_timer);\n osTimerStart(app_wnr_sync_timer, WNR_SYNC_TRIGGER_DELAY);\n } else {\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_EXCUTE_TRIGGER, arg0, 0, 0);\n }\n return;\n }\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE) &&\n (g_peer_Wind_module_onoff == true)) {\n g_wnr_notify_flag = false;\n current_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->tws_conhandle);\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(3, \"[%s] current_ticks:%d tg_ticks:%d\", __func__, current_ticks,\n arg1);\n#endif\n\n if (arg1 > current_ticks) {\n uint32_t diff_ticks = arg1 - current_ticks;\n\n g_set_Windstate = (uint8_t)arg0;\n if (app_wnr_sync_timer != NULL) {\n osTimerStop(app_wnr_sync_timer);\n osTimerStart(app_wnr_sync_timer, TICKS_TO_MS(diff_ticks));\n }\n } else {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] tg_ticks < current_ticks...\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_EXCUTE_TRIGGER, arg0, 0, 0);\n }\n return;\n }\n\n if ((app_tws_ibrt_tws_link_connected() == false) ||\n (g_peer_Wind_module_onoff == false)) {\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_EXCUTE_TRIGGER, arg0, 0, 0);\n return;\n }\n}\n\nstatic void app_wnr_excute_trigger(uint32_t arg0) {\n uint8_t t_Windstate = (uint8_t)arg0;\n float gain_coef = 0.0;\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(3, \"[%s] last_Windstate:%d set_Windstate:%d\", __func__, g_wind_st,\n t_Windstate);\n#endif\n\n if ((t_Windstate != g_wind_st) && (app_anc_work_status())) {\n if (g_wind_st > t_Windstate) {\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n Twostage = 1;\n#endif\n if (t_Windstate == 1) {\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n FFstate = 7; // 25%\n gain_coef = _STRONG2SMALL_WIND_FF_MID_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n TRACE(1, \"[%s] Enable 0.25 FF ANC.\", __func__);\n#else\n gain_coef = _SMALL_WIND_FF_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n TRACE(1, \"[%s] Enable 0.5 FF ANC.\", __func__);\n#endif\n } // 2->1 0%->25%->50%\n else if (t_Windstate == 0) {\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n FFstate = 6; // 75%\n gain_coef = _SMALL2NO_WIND_FF_MID_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n TRACE(1, \"[%s] Enable 0.75 FF ANC.\", __func__);\n#else\n gain_coef = _NO_WIND_FF_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n TRACE(1, \"[%s] Enable FF ANC.\", __func__);\n#endif\n } // 1->0 50%->75%->100%\n } else {\n if (t_Windstate == 2) // 0%\n {\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n FFstate = 2;\n#endif\n gain_coef = _STRONG_WIND_FF_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n TRACE(1, \"[%s] Disable FF ANC.\", __func__);\n } else if (t_Windstate == 1) // 50%\n {\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n FFstate = 1;\n#endif\n gain_coef = _SMALL_WIND_FF_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n TRACE(1, \"[%s] Enable 0.5 FF ANC.\", __func__);\n } else {\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n FFstate = 0;\n#endif\n gain_coef = _NO_WIND_FF_GAIN_COEF;\n _set_anc_ff_gain(false, gain_coef, ANC_FEEDFORWARD);\n TRACE(1, \"[%s] Enable FF ANC.\", __func__);\n }\n }\n\n g_wind_st = t_Windstate;\n }\n\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n if (((Twostage == 1) && (FFstate == 7)) ||\n ((Twostage == 1) && (FFstate == 6))) {\n if (app_wnr_twostage_timer != NULL) {\n osTimerStop(app_wnr_twostage_timer);\n osTimerStart(app_wnr_twostage_timer, WNR_SYNC_TWOSTAGE_DELAY);\n }\n }\n#endif\n}\n\nstatic int app_wnr_internal_event_process(APP_MESSAGE_BODY *msg_body) {\n uint32_t evt = msg_body->message_id;\n uint32_t arg0 = msg_body->message_Param0;\n uint32_t arg1 = msg_body->message_Param1;\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(4, \"[%s] evt:%d arg0:%d arg1:%d\", __func__, evt, arg0, arg1);\n#endif\n\n wnr_sync_counter_for_sco = 0;\n wnr_sync_counter_for_normal = 0;\n\n switch (evt) {\n case APP_WNR_NOTIFY_DETECT_RESULT:\n app_wnr_notify_detect_result();\n break;\n case APP_WNR_REQUEST_DETECT_RESULT:\n app_wnr_request_detect_result();\n break;\n case APP_WNR_RESPONSE_DETECT_RESULT:\n app_wnr_response_detect_result(arg0);\n break;\n case APP_WNR_PROCESS_DETECT_RESULT:\n app_wnr_process_detect_result(arg0);\n break;\n case APP_WNR_SET_TRIGGER:\n app_wnr_set_trigger(arg0, arg1);\n break;\n case APP_WNR_EXCUTE_TRIGGER:\n app_wnr_excute_trigger(arg0);\n break;\n default:\n TRACE(2, \"[%s] invalid evt:%d\", __func__, evt);\n break;\n }\n\n return 0;\n}\n\nvoid app_wnr_cmd_receive_process(uint8_t *p_buff, uint16_t length) {\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] enter...\", __func__);\n#endif\n\n if ((p_buff[0] == IBRT_ACTION_SYNC_WNR) &&\n (p_buff[1] == APP_WNR_NOTIFY_DETECT_RESULT) &&\n (app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"NOTIFY_DETECT_RESULT peer_wnr_state:%d\", p_buff[2]);\n#endif\n g_peer_Wind_module_onoff = true;\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_PROCESS_DETECT_RESULT,\n (uint32_t)p_buff[2], 0, 0);\n return;\n }\n\n if ((p_buff[0] == IBRT_ACTION_SYNC_WNR) &&\n (p_buff[1] == APP_WNR_REQUEST_DETECT_RESULT) &&\n (app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"REQUEST_DETECT_RESULT peer_wnr_state:%d\", p_buff[2]);\n#endif\n g_peer_Wind_module_onoff = true;\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_RESPONSE_DETECT_RESULT,\n (uint32_t)p_buff[2], 0, 0);\n return;\n }\n\n if ((p_buff[0] == IBRT_ACTION_SYNC_WNR) &&\n (p_buff[1] == APP_WNR_RESPONSE_DETECT_RESULT) &&\n (app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"RESPONSE_DETECT_RESULT peer_wnr_state:%d\", p_buff[2]);\n#endif\n g_peer_Wind_module_onoff = true;\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_PROCESS_DETECT_RESULT,\n (uint32_t)p_buff[2], 0, 0);\n return;\n }\n\n if ((p_buff[0] == IBRT_ACTION_SYNC_WNR) &&\n (p_buff[1] == APP_WNR_SET_TRIGGER) &&\n (app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"SET_TRIGGER set_Windstate:%d\", p_buff[2]);\n#endif\n uint32_t tg_ticks = 0;\n tg_ticks += p_buff[3];\n tg_ticks = tg_ticks << 8;\n tg_ticks += p_buff[4];\n tg_ticks = tg_ticks << 8;\n tg_ticks += p_buff[5];\n tg_ticks = tg_ticks << 8;\n tg_ticks += p_buff[6];\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_SET_TRIGGER, (uint32_t)p_buff[2],\n tg_ticks, 0);\n return;\n }\n\n if ((p_buff[0] == IBRT_ACTION_SYNC_WNR) &&\n (p_buff[1] == APP_WNR_SHARE_MODULE_INFO)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"APP_WNR_SHARE_MODULE_INFO peer_module_onoff:%d\", p_buff[2]);\n#endif\n g_peer_Wind_module_onoff = (bool)p_buff[2];\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER) &&\n (g_local_Wind_module_onoff == true) &&\n (g_peer_Wind_module_onoff == true)) {\n wnr_sync_counter_for_normal = 0;\n wnr_sync_counter_for_sco = 0;\n if (g_local_Wind_module_onoff == true) {\n g_wnr_sync_flag = true;\n }\n return;\n }\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE) &&\n (g_local_Wind_module_onoff == true) &&\n (g_peer_Wind_module_onoff == true)) {\n wnr_sync_counter_for_normal = 0;\n wnr_sync_counter_for_sco = 0;\n if (g_local_Wind_module_onoff == true) {\n g_wnr_sync_flag = true;\n }\n return;\n }\n return;\n }\n}\n\nstatic bool wnr_open_flg = 0;\nint32_t anc_wnr_open(anc_wnr_open_mode_t mode) {\n if (wnr_open_flg == 1) {\n return 0;\n }\n TRACE(4, \"[%s] mode = %d, g_sample_rate = %d, g_frame_len = %d\", __func__,\n mode, g_sample_rate, g_frame_len);\n\n hal_sysfreq_req(APP_SYSFREQ_USER_ANC_WNR, HAL_CMU_FREQ_26M);\n TRACE(2, \"[%s] Sys freq: %d\", __func__, hal_sys_timer_calc_cpu_freq(5, 0));\n\n app_wnr_reset_state_queue();\n app_set_threadhandle(APP_MODUAL_WNR, app_wnr_internal_event_process);\n g_local_Wind_module_onoff = true;\n if (app_wnr_sync_timer == NULL) {\n app_wnr_sync_timer = osTimerCreate(osTimer(APP_WNR_SYNC_TIMER), osTimerOnce,\n &g_set_Windstate);\n }\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n if (app_wnr_twostage_timer == NULL) {\n app_wnr_twostage_timer =\n osTimerCreate(osTimer(APP_WNR_TWOSTAGE_TIMER), osTimerOnce, NULL);\n }\n#endif\n g_set_Windstate = 0;\n g_local_Windstate = 0;\n g_peer_Windstate = 0;\n g_wnr_notify_flag = false;\n g_wnr_request_flag = false;\n g_wnr_sync_flag = false;\n g_wind_st = 0;\n anc_ff_gain_l = 512;\n anc_ff_gain_r = 512;\n app_wnr_share_module_info();\n if (mode == ANC_WNR_OPEN_MODE_STANDALONE) {\n g_wnr_open_mode = ANC_WNR_OPEN_MODE_STANDALONE; // normal mode...\n wnr_sync_counter_for_normal = 0;\n wnr_sync_counter_for_sco = 0;\n g_sample_rate = _SAMPLE_RATE;\n g_frame_len = _FRAME_LEN;\n wind_st = WindDetection2Mic_create(_SAMPLE_RATE, _SAMPLE_BITS, _FRAME_LEN,\n &wind_cfg);\n\n _open_mic();\n\n // audio_dump_init(_FRAME_LEN, sizeof(short), 2);\n\n } else if (mode == ANC_WNR_OPEN_MODE_CONFIGURE) {\n g_wnr_open_mode = ANC_WNR_OPEN_MODE_CONFIGURE; // sco mode...\n wnr_sync_counter_for_sco = 0;\n wnr_sync_counter_for_normal = 0;\n ASSERT(g_sample_rate == 8000 || g_sample_rate == 16000,\n \"[%s] g_sample_rate(%d) is invalid.\", __func__, g_sample_rate);\n ASSERT(g_frame_len == 60 || g_frame_len == 120,\n \"[%s] g_frame_len(%d) is invalid.\", __func__, g_frame_len);\n\n wind_st = WindDetection2Mic_create(_SAMPLE_RATE, _SAMPLE_BITS, g_frame_len,\n &wind_cfg);\n\n // audio_dump_init(g_frame_len, sizeof(int), 2);\n\n } else {\n ASSERT(0, \"[%s] mode(%d) is invalid.\", __func__, mode);\n }\n\n#ifndef HW_SUPPORT_SMOOOTHING_GAIN\n anc_gain_tuning_init();\n\n struct anc_tuning_ctrl *c = &anc_tctrl;\n\n if (!c->timer_init) {\n c->timer_ff_gain_id =\n hwtimer_alloc(anc_tuning_ff_gain_timer_timeout, (void *)c);\n c->timer_ff_gain_run = 0;\n c->timer_init = 1;\n }\n#endif\n\n g_open_mode = mode;\n\n TRACE(1, \"[%s] End...\", __func__);\n wnr_open_flg = 1;\n return 0;\n}\n\nint32_t anc_wnr_close(void) {\n TRACE(1, \"[%s] ...\", __func__);\n\n#ifndef HW_SUPPORT_SMOOOTHING_GAIN\n struct anc_tuning_ctrl *c = &anc_tctrl;\n if (c->timer_ff_gain_run) {\n hwtimer_stop(c->timer_ff_gain_id);\n }\n hwtimer_free(c->timer_ff_gain_id);\n c->timer_init = 0;\n#endif\n\n if (g_open_mode == ANC_WNR_OPEN_MODE_STANDALONE) {\n _close_mic();\n g_open_mode = ANC_WNR_OPEN_MODE_QTY;\n }\n\n WindDetection2Mic_destroy(wind_st);\n\n // size_t total = 0, used = 0, max_used = 0;\n // speech_memory_info(&total, &used, &max_used);\n // TRACE(3,\"ANC WNR MALLOC MEM: total - %d, used - %d, max_used - %d.\", total,\n // used, max_used); ASSERT(used == 0, \"[%s] used != 0\", __func__);\n app_wnr_reset_state_queue();\n app_set_threadhandle(APP_MODUAL_WNR, NULL);\n g_local_Wind_module_onoff = false;\n if (app_wnr_sync_timer != NULL) {\n osTimerStop(app_wnr_sync_timer);\n }\n#if (WNR_SYNC_SET_ANC_FF_GAIN_TWOSTAGE == 1)\n if (app_wnr_twostage_timer != NULL) {\n osTimerStop(app_wnr_twostage_timer);\n }\n#endif\n g_wnr_open_mode = ANC_WNR_OPEN_MODE_QTY;\n wnr_sync_counter_for_normal = 0;\n wnr_sync_counter_for_sco = 0;\n g_set_Windstate = 0;\n g_local_Windstate = 0;\n g_peer_Windstate = 0;\n g_wnr_notify_flag = false;\n g_wnr_request_flag = false;\n g_wnr_sync_flag = false;\n g_wind_st = 0;\n anc_ff_gain_l = 512;\n anc_ff_gain_r = 512;\n app_wnr_share_module_info();\n\n hal_sysfreq_req(APP_SYSFREQ_USER_ANC_WNR, HAL_CMU_FREQ_32K);\n wnr_open_flg = 0;\n return 0;\n}\n\n// TODO: Provide API to configure performance\nstatic int32_t anc_wnr_process_frame(WNR_PCM_T *inF, WNR_PCM_T *inR,\n uint32_t frame_len) {\n // static short mutetimer = 0;\n // short targettimer = _TARGET_TIME;\n float windictor = 0.0;\n float wind_power;\n\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n if (cnt <= _PERIOD) {\n#if _SAMPLE_BITS == 16\n windictor = WindDetection2Mic_process_16bit(wind_st, inF, inR, frame_len,\n &wind_power);\n#else\n windictor = WindDetection2Mic_process_24bit(wind_st, inF, inR, frame_len,\n &wind_power);\n#endif\n\n // TRACE(2,\"[%s] wind_power = %d.\", __func__, (int)(wind_power*10000));\n windsum = windsum + windictor;\n cnt = cnt + 1;\n // TRACE(2,\"[%s] cnt = %d, windsum = %d.\", __func__, cnt, (int)windsum);\n }\n if (cnt == period) {\n cnt = 0;\n wind_indictor = 0.8 * wind_indictor + 0.2 * windsum / period;\n windsum = 0.0;\n\n // TRACE(2,\"[%s] wind_indictor = %d.\", __func__, (int)(wind_indictor*1000));\n\n // float gain_coef;\n\n static uint8_t Windstate = 0;\n // Windstate = wind_state_detect(g_wind_st, wind_indictor);\n // TRACE(2,\"[%s] windstate = %d.\", __func__, Windstate);\n // mutetimer = mutetimer + 1;\n wind_state_detect(g_wind_st, wind_indictor, windindicator, windthd,\n &Windstate);\n\n for (int i = WINDINDICATOR_SIZE - 1; i > 0; i--) {\n windindicator[i] = windindicator[i - 1];\n }\n windindicator[0] = wind_indictor;\n\n // TRACE(2,\"[%s] windstate = %d.\", __func__, Windstate);\n\n app_wnr_push_state_to_queue(g_wnr_open_mode, Windstate);\n\n if (g_wnr_open_mode == ANC_WNR_OPEN_MODE_STANDALONE) {\n if (++wnr_sync_counter_for_normal >=\n WNR_SYNC_COUNTER_THRESHOLD_FOR_NORMAL) {\n wnr_sync_counter_for_normal = 0;\n wnr_sync_counter_for_sco = 0;\n g_local_Windstate = app_wnr_get_state_from_queue(g_wnr_open_mode);\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] OPEN_MODE_STANDALONE\", __func__);\n TRACE(2, \"[%s] local_Windstate:%d\", __func__, g_local_Windstate);\n TRACE(2, \"[%s] last_Windstate:%d\", __func__, g_wind_st);\n#endif\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER) &&\n (g_wnr_sync_flag == true)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] REQUEST_DETECT_RESULT\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_REQUEST_DETECT_RESULT, 0, 0,\n 0);\n return 0;\n }\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE) && (g_wnr_sync_flag == true)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] NOTIFY_DETECT_RESULT\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_NOTIFY_DETECT_RESULT, 0, 0,\n 0);\n return 0;\n }\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER) &&\n (g_local_Windstate != g_wind_st) &&\n (g_peer_Wind_module_onoff == true)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] REQUEST_DETECT_RESULT\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_REQUEST_DETECT_RESULT, 0, 0,\n 0);\n return 0;\n }\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE) &&\n (g_local_Windstate != g_wind_st) &&\n (g_peer_Wind_module_onoff == true)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] NOTIFY_DETECT_RESULT\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_NOTIFY_DETECT_RESULT, 0, 0,\n 0);\n return 0;\n }\n\n if (((app_tws_ibrt_tws_link_connected() == false) ||\n (g_peer_Wind_module_onoff == false)) &&\n (g_local_Windstate != g_wind_st)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] SET_TRIGGER\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_SET_TRIGGER,\n (uint32_t)g_local_Windstate, 0, 0);\n return 0;\n }\n }\n } else {\n if (++wnr_sync_counter_for_sco >= WNR_SYNC_COUNTER_THRESHOLD_FOR_SCO) {\n wnr_sync_counter_for_sco = 0;\n wnr_sync_counter_for_normal = 0;\n g_local_Windstate = app_wnr_get_state_from_queue(g_wnr_open_mode);\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] OPEN_MODE_CONFIGURE\", __func__);\n TRACE(2, \"[%s] local_Windstate:%d\", __func__, g_local_Windstate);\n TRACE(2, \"[%s] last_Windstate:%d\", __func__, g_wind_st);\n#endif\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER) &&\n (g_wnr_sync_flag == true)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] REQUEST_DETECT_RESULT\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_REQUEST_DETECT_RESULT, 0, 0,\n 0);\n return 0;\n }\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE) && (g_wnr_sync_flag == true)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] NOTIFY_DETECT_RESULT\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_NOTIFY_DETECT_RESULT, 0, 0,\n 0);\n return 0;\n }\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER) &&\n (g_local_Windstate != g_wind_st) &&\n (g_peer_Wind_module_onoff == true)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] REQUEST_DETECT_RESULT\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_REQUEST_DETECT_RESULT, 0, 0,\n 0);\n return 0;\n }\n\n if ((app_tws_ibrt_tws_link_connected() == true) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE) &&\n (g_local_Windstate != g_wind_st) &&\n (g_peer_Wind_module_onoff == true)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] NOTIFY_DETECT_RESULT\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_NOTIFY_DETECT_RESULT, 0, 0,\n 0);\n return 0;\n }\n\n if (((app_tws_ibrt_tws_link_connected() == false) ||\n (g_peer_Wind_module_onoff == false)) &&\n (g_local_Windstate != g_wind_st)) {\n#if (WNR_SYNC_DEBUG_LOG == 1)\n TRACE(1, \"[%s] SET_TRIGGER\", __func__);\n#endif\n if (g_local_Wind_module_onoff == true)\n app_wnr_trigger_internal_event(APP_WNR_SET_TRIGGER,\n (uint32_t)g_local_Windstate, 0, 0);\n return 0;\n }\n }\n }\n }\n return 0;\n}\n\nstatic void inline stereo_resample_16k(WNR_PCM_T *pcm_buf, uint32_t pcm_len,\n WNR_PCM_T *mic1, WNR_PCM_T *mic2) {\n uint32_t frame_len = pcm_len / _CHANNEL_NUM;\n\n const float num[3] = {0.020083, 0.040166, 0.020083};\n const float den[3] = {1.000000, -1.561018, 0.641351};\n\n static float y0 = 0, y1 = 0, y2 = 0, x0 = 0, x1 = 0, x2 = 0;\n static float Y0 = 0, Y1 = 0, Y2 = 0, X0 = 0, X1 = 0, X2 = 0;\n\n for (uint32_t i = 0; i < frame_len; i++) {\n x0 = pcm_buf[_CHANNEL_NUM * i + 0];\n X0 = pcm_buf[_CHANNEL_NUM * i + 1];\n\n y0 = x0 * num[0] + x1 * num[1] + x2 * num[2] - y1 * den[1] - y2 * den[2];\n Y0 = X0 * num[0] + X1 * num[1] + X2 * num[2] - Y1 * den[1] - Y2 * den[2];\n\n y2 = y1;\n y1 = y0;\n x2 = x1;\n x1 = x0;\n\n Y2 = Y1;\n Y1 = Y0;\n X2 = X1;\n X1 = X0;\n\n if (i % 2 == 0) {\n#if defined(_24BITS_ENABLE)\n mic1[i / 2] = speech_ssat_int24((int32_t)y0);\n mic2[i / 2] = speech_ssat_int24((int32_t)Y0);\n#else\n mic1[i / 2] = speech_ssat_int16((int32_t)y0);\n mic2[i / 2] = speech_ssat_int16((int32_t)Y0);\n#endif\n }\n }\n}\n\nint32_t anc_wnr_process(void *pcm_buf, uint32_t pcm_len) {\n if (wnr_open_flg == 0) {\n TRACE(2, \"[%s] WARNING: wnr_open_flg = %d\", __func__, wnr_open_flg);\n return 0;\n }\n TRACE(2, \"[%s] pcm_len = %d\", __func__, pcm_len);\n\n // audio_dump_clear_up();\n\n WNR_PCM_T *tmp_buf = (WNR_PCM_T *)pcm_buf;\n if (g_open_mode != ANC_WNR_OPEN_MODE_CONFIGURE) {\n return 1;\n }\n\n // resample 16k-->8k\n if (g_sample_rate == 16000) {\n stereo_resample_16k(tmp_buf, pcm_len, (WNR_PCM_T *)af_stream_mic1,\n (WNR_PCM_T *)af_stream_mic2);\n // 2ch --> 1ch, 16k --> 8k\n pcm_len = pcm_len / _CHANNEL_NUM / 2;\n } else {\n\n WNR_PCM_T *mic1 = (WNR_PCM_T *)af_stream_mic1;\n WNR_PCM_T *mic2 = (WNR_PCM_T *)af_stream_mic2;\n pcm_len = pcm_len / _CHANNEL_NUM;\n for (uint32_t i = 0; i < pcm_len; i++) {\n mic1[i] = tmp_buf[2 * i];\n mic2[i] = tmp_buf[2 * i + 1];\n }\n }\n\n // TRACE(2,\"[%s] new pcm_len = %d\", __func__, pcm_len);\n\n anc_wnr_process_frame((WNR_PCM_T *)af_stream_mic1,\n (WNR_PCM_T *)af_stream_mic2, pcm_len);\n\n return 0;\n}\n\n// uint32_t wnr_ticks;\n\nstatic uint32_t anc_wnr_callback(uint8_t *buf, uint32_t len) {\n\n // TRACE(2,\"[%s] len = %d\", __func__, len);\n // audio_dump_clear_up();\n#ifdef TEST_MIPS\n start_ticks = hal_fast_sys_timer_get();\n#endif\n int32_t frame_len = len / SAMPLE_BYTES / _CHANNEL_NUM / _LOOP_CNT;\n ASSERT(frame_len == _FRAME_LEN, \"[%s] frame len(%d) is invalid.\", __func__,\n frame_len);\n WNR_PCM_T *pcm_buf = (WNR_PCM_T *)buf;\n\n WNR_PCM_T *mic1 = (WNR_PCM_T *)af_stream_mic1;\n WNR_PCM_T *mic2 = (WNR_PCM_T *)af_stream_mic2;\n\n for (int32_t j = 0; j < _LOOP_CNT; j++) {\n for (int32_t i = 0; i < frame_len; i++) {\n mic1[i] = pcm_buf[_CHANNEL_NUM * i + 0];\n mic2[i] = pcm_buf[_CHANNEL_NUM * i + 1];\n }\n\n anc_wnr_process_frame((WNR_PCM_T *)mic1, (WNR_PCM_T *)mic2, frame_len);\n pcm_buf += _FRAME_LEN * _CHANNEL_NUM;\n }\n\n#ifdef TEST_MIPS\n end_ticks = hal_fast_sys_timer_get();\n used_mips = (end_ticks - start_ticks) * 1000 / (start_ticks - pre_ticks);\n TRACE(2, \"[%s] Usage: %d in a thousand (MIPS).\", __func__, used_mips);\n // wnr_ticks = start_ticks;\n // TRACE(2,\"[%s] WNR frame takes %d ms.\", __func__,\n // FAST_TICKS_TO_MS((start_ticks - pre_ticks)*100));\n pre_ticks = start_ticks;\n#endif\n\n return len;\n}\n\nstatic void _open_mic(void) {\n struct AF_STREAM_CONFIG_T stream_cfg;\n\n TRACE(1, \"[%s] ...\", __func__);\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n stream_cfg.channel_num = (enum AUD_CHANNEL_NUM_T)_CHANNEL_NUM;\n stream_cfg.sample_rate = (enum AUD_SAMPRATE_T)_SAMPLE_RATE;\n stream_cfg.bits = (enum AUD_BITS_T)_SAMPLE_BITS;\n stream_cfg.vol = 12;\n stream_cfg.chan_sep_buf = false;\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = AUD_INPUT_PATH_ANC_WNR;\n stream_cfg.handler = anc_wnr_callback;\n stream_cfg.data_size = sizeof(af_stream_buff);\n stream_cfg.data_ptr = af_stream_buff;\n ASSERT(stream_cfg.channel_num == 2, \"[%s] channel number(%d) is invalid.\",\n __func__, stream_cfg.channel_num);\n TRACE(3, \"[%s] sample_rate:%d, data_size:%d\", __func__,\n stream_cfg.sample_rate, stream_cfg.data_size);\n TRACE(2, \"[%s] af_stream_buff = %p\", __func__, af_stream_buff);\n\n af_stream_open(ANC_WNR_STREAM_ID, AUD_STREAM_CAPTURE, &stream_cfg);\n af_stream_start(ANC_WNR_STREAM_ID, AUD_STREAM_CAPTURE);\n}\n\nstatic void _close_mic(void) {\n TRACE(1, \"[%s] ...\", __func__);\n\n af_stream_stop(ANC_WNR_STREAM_ID, AUD_STREAM_CAPTURE);\n af_stream_close(ANC_WNR_STREAM_ID, AUD_STREAM_CAPTURE);\n}\n" }, { "path": "apps/anc/src/app_anc.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_anc.h\"\n#include \"anc_assist.h\"\n#include \"anc_process.h\"\n#include \"anc_wnr.h\"\n#include \"app_ibrt_keyboard.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_thread.h\"\n#include \"apps.h\"\n#include \"aud_section.h\"\n#include \"audioflinger.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_codec.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hwtimer_list.h\"\n#include \"plat_types.h\"\n#include \"pmu.h\"\n#include \"tgt_hardware.h\"\n\n#include \"app_status_ind.h\"\n#ifdef __SIMPLE_INTERNAL_PLAYER_SUPPORT__\n#include \"simple_internal_player.h\"\n#endif\n#include \"hal_aud.h\"\n#ifdef IBRT\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#endif\n\n#include \"co_math.h\"\n// #define ANC_MODE_SWITCH_WITHOUT_FADE //Comment this line if you need fade\n// function between anc mode\n\n#ifndef _ANC_FADE_STACK_SIZE\n#define _ANC_FADE_STACK_SIZE (1 * 1024)\n#endif\n\nstatic osThreadId anc_fade_thread_tid;\n\n#define FADE_IN 0x0001\n#define FADE_OUT 0x0002\n#define CHANGE_FROM_ANC_TO_TT_DIRECTLY 0x0003\n\nstatic void anc_fade_thread(void const *argument);\nosThreadDef(anc_fade_thread, osPriorityBelowNormal, 1, _ANC_FADE_STACK_SIZE,\n \"anc_fade_thread\");\n\nextern uint8_t app_poweroff_flag;\nuint32_t app_anc_get_anc_status(void);\n\nvoid app_anc_disable(void);\nvoid app_anc_close_anc(void);\nosStatus osDelay(uint32_t millisec);\nvoid app_anc_timer_set(uint32_t request, uint32_t delay);\nvoid app_anc_timer_close(void);\nextern bool app_mode_is_usbaudio(void); // 96k 384k\nextern bool app_mode_is_i2s(void); // 96k 384k\nvoid app_anc_init_timer(void);\nextern void i2s_player_send_stop(void);\nextern void fb_anti_howl_start(void);\nextern void fb_anti_howl_stop(void);\nextern void hal_codec_reconfig_pll_freq(enum AUD_SAMPRATE_T dac_rate,\n enum AUD_SAMPRATE_T adc_rate);\nextern void anc_status_sync(void);\nextern void anc_status_sync_init(void);\n\nextern uint8_t is_sbc_mode(void);\nextern uint8_t is_sco_mode(void);\n\nvoid app_anc_switch_set_edge(uint8_t down_edge);\n\n#ifdef __ANC_STICK_SWITCH_USE_GPIO__\ntypedef void (*ANC_KEY_CALLBACK)(uint8_t status);\nstatic ANC_KEY_CALLBACK app_switch_callback;\n#endif\n\nextern int app_shutdown(void);\nextern int app_reset(void);\n\nextern void analog_aud_codec_speaker_enable(bool en);\n\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\nextern bool anc_single_mode_is_on(void);\n#endif\nenum {\n ANC_STATUS_OFF = 0,\n ANC_STATUS_ON,\n ANC_STATUS_WAITING_ON,\n ANC_STATUS_WAITING_OFF,\n ANC_STATUS_INIT_ON,\n ANC_STATUS_NONE\n};\n\nenum {\n ANC_EVENT_INIT = 0,\n ANC_EVENT_OPEN,\n ANC_EVENT_CLOSE,\n ANC_EVENT_FADE_IN,\n ANC_EVENT_FADE_OUT,\n ANC_EVENT_CHANGE_SAMPLERATE,\n ANC_EVENT_CHANGE_STATUS,\n ANC_EVENT_HOWL_PROCESS,\n ANC_EVENT_SYNC_STATUS,\n ANC_EVENT_SYNC_INIT,\n ANC_EVENT_PWR_KEY_MONITOR,\n ANC_EVENT_PWR_KEY_MONITOR_REBOOT,\n ANC_EVENT_SWITCH_KEY_DEBONCE,\n SIMPLE_PLAYER_CLOSE_CODEC_EVT,\n SIMPLE_PLAYER_DELAY_STOP_EVT,\n ANC_EVENT_NONE\n};\n\nstatic uint32_t anc_work_status = ANC_STATUS_OFF;\nstatic uint32_t anc_timer_request = ANC_EVENT_NONE;\n\nstatic enum AUD_SAMPRATE_T anc_sample_rate[AUD_STREAM_NUM];\n\nstatic HWTIMER_ID anc_timerid = NULL;\n#define anc_gain_adjust_gap (60)\n\n#define anc_init_switch_off_time (MS_TO_TICKS(1000 * 60 * 2))\n#define anc_auto_power_off_time (MS_TO_TICKS(1000 * 60 * 60))\n#define anc_switch_on_time (MS_TO_TICKS(600))\n#define anc_close_delay_time (MS_TO_TICKS(1000 * 20))\n#define anc_pwr_key_monitor_time (MS_TO_TICKS(1500))\n#define anc_switch_key_debonce_time (MS_TO_TICKS(40))\n\n#if 0 // def ANC_FB_CHECK\nuint32_t app_fb_check_threshold_vale=0x4000000;\nenum ANC_TYPE_T app_anc_check_type = ANC_FEEDBACK;\nuint32_t app_fb_check_delay_time=((MS_TO_TICKS(5000)));\n#endif\n\n#ifdef ANC_FB_CHECK\nuint32_t app_fb_check_threshold_vale = 0x4000000;\nenum ANC_TYPE_T app_anc_check_type = ANC_FEEDFORWARD;\nuint32_t app_fb_check_decrease_resume_delay_time = (MS_TO_TICKS(400));\nuint8_t app_fb_check_decrease_value = 18;\nuint32_t app_fb_check_delay_time = (MS_TO_TICKS(3000));\nuint8_t app_fb_check_delay_time_flag = 0;\nuint32_t app_fb_check_delay_time2 = (MS_TO_TICKS(3000));\nuint32_t app_fb_check_threshold_count = 20;\nuint8_t app_gain_resume_status = 1;\n#endif\n\nenum {\n APP_ANC_IDLE = 0,\n APP_ANC_FADE_IN,\n APP_ANC_FADE_OUT,\n};\n\nuint32_t app_anc_fade_status = APP_ANC_IDLE;\n\nstatic bool app_init_done = false;\n#ifdef ANC_SWITCH_PIN\nstatic bool app_anc_shutdown = false;\n#endif\nbool anc_set_dac_pa_delay = false;\nstatic enum ANC_INDEX anc_coef_idx = 0;\n\nextern void analog_aud_enable_dac_pa(uint8_t dac);\n\nbool app_anc_is_on(void) { return (ANC_STATUS_ON == anc_work_status); }\n\nuint32_t app_anc_get_sample_rate(void) {\n return (uint32_t)anc_sample_rate[AUD_STREAM_CAPTURE];\n}\n\nvoid app_anc_set_coef_idx(uint8_t idx) { anc_coef_idx = idx; }\n\nuint8_t app_anc_get_coef_idx(void) { return anc_coef_idx; }\n\n#if defined(IBRT)\n\nstatic enum ANC_INDEX anc_peer_coef_idx = 0;\nstatic bool anc_status_sync_flag = false;\n\nvoid app_anc_set_peer_coef_idx(uint8_t idx) { anc_peer_coef_idx = idx; }\n\nuint8_t app_anc_get_peer_coef_idx(void) { return anc_peer_coef_idx; }\n\nvoid app_anc_set_status_sync_flag(bool status) {\n anc_status_sync_flag = status;\n}\n\nbool app_anc_get_status_sync_flag(void) { return anc_status_sync_flag; }\n\n#endif\n\nvoid app_anc_set_init_done(void) { app_init_done = true; }\n\nvoid app_anc_switch_turnled(bool on);\n\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n\nstatic ANC_KEY_CALLBACK app_pwr_key_monitor_callback;\n\nstatic void app_pwr_key_monitor_handler(enum HAL_GPIO_PIN_T pin) {\n uint8_t gpio_val = hal_gpio_pin_get_val(pin);\n\n TRACE(2, \" %s :%d \", __func__, gpio_val);\n if (app_pwr_key_monitor_callback)\n app_pwr_key_monitor_callback(gpio_val);\n}\n\nbool app_pwr_key_monitor_get_val(void) {\n return (bool)hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)PWR_KEY_MONITOR_PIN);\n}\n\nvoid app_pwr_key_monitor_set_int_edge(uint8_t down_edge) {\n struct HAL_GPIO_IRQ_CFG_T gpiocfg;\n gpiocfg.irq_enable = true;\n gpiocfg.irq_debounce = true;\n gpiocfg.irq_type = HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE;\n gpiocfg.irq_polarity = (down_edge == 1) ? HAL_GPIO_IRQ_POLARITY_LOW_FALLING\n : HAL_GPIO_IRQ_POLARITY_HIGH_RISING;\n gpiocfg.irq_handler = app_pwr_key_monitor_handler;\n TRACE(2, \" %s :%d \", __func__, down_edge);\n hal_gpio_setup_irq((enum HAL_GPIO_PIN_T)PWR_KEY_MONITOR_PIN, &gpiocfg);\n}\n\nvoid app_pwr_key_monitor_init(ANC_KEY_CALLBACK callback) {\n app_pwr_key_monitor_callback = callback;\n}\n#endif\n\n#ifdef ANC_LED_PIN\nvoid app_anc_switch_turnled(bool on) {\n TRACE(2, \" %s on %d \", __func__, on);\n\n if (cfg_anc_led.pin != HAL_IOMUX_PIN_NUM) {\n if (on) {\n TRACE(0, \"on\\n\");\n hal_gpio_pin_set((enum HAL_GPIO_PIN_T)cfg_anc_led.pin);\n } else {\n TRACE(0, \"off\\n\");\n hal_gpio_pin_clr((enum HAL_GPIO_PIN_T)cfg_anc_led.pin);\n }\n }\n}\n#endif\n\n#ifdef __ANC_STICK_SWITCH_USE_GPIO__\n\nstatic void app_anc_switch_int_handler(enum HAL_GPIO_PIN_T pin) {\n // uint8_t gpio_val;\n uint8_t gpio_val = hal_gpio_pin_get_val(pin);\n TRACE(3, \" %s ,pin %d,status %d\", __func__, pin, gpio_val);\n#ifdef ANC_LED_PIN\n if (gpio_val)\n app_anc_switch_turnled(true);\n else\n app_anc_switch_turnled(false);\n#endif\n app_anc_switch_set_edge(gpio_val);\n\n app_anc_timer_set(ANC_EVENT_SWITCH_KEY_DEBONCE, anc_switch_key_debonce_time);\n // if (app_switch_callback)\n // app_switch_callback(gpio_val);\n // app_anc_key_handler();\n}\n\nvoid app_anc_switch_init(ANC_KEY_CALLBACK callback) {\n app_switch_callback = callback;\n}\n#endif\n\n#ifdef ANC_SWITCH_PIN\nbool app_anc_set_reboot(void) {\n return (app_anc_shutdown &&\n hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)ANC_SWITCH_PIN));\n}\n\nbool app_anc_switch_get_val(void) {\n return (bool)hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)ANC_SWITCH_PIN);\n}\n\nvoid app_anc_switch_set_edge(uint8_t down_edge) {\n struct HAL_GPIO_IRQ_CFG_T gpiocfg;\n gpiocfg.irq_enable = true;\n gpiocfg.irq_debounce = true;\n gpiocfg.irq_type = HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE;\n gpiocfg.irq_polarity = (down_edge == 1) ? HAL_GPIO_IRQ_POLARITY_LOW_FALLING\n : HAL_GPIO_IRQ_POLARITY_HIGH_RISING;\n gpiocfg.irq_handler = app_anc_switch_int_handler;\n TRACE(2, \" %s :%d \", __func__, down_edge);\n hal_gpio_setup_irq((enum HAL_GPIO_PIN_T)ANC_SWITCH_PIN, &gpiocfg);\n}\n#endif\n\nint __anc_usb_app_fadein(enum ANC_TYPE_T type) {\n int32_t gain0_curr, gain1_curr;\n int32_t gain0_tg, gain1_tg;\n\n anc_get_gain(&gain0_curr, &gain1_curr, type);\n anc_get_cfg_gain(&gain0_tg, &gain1_tg, type);\n\n if (gain0_tg > 0) {\n if (gain0_curr < gain0_tg) {\n gain0_curr++;\n }\n } else {\n if (gain0_curr > gain0_tg) {\n gain0_curr--;\n }\n }\n\n if (gain1_tg > 0) {\n if (gain1_curr < gain1_tg) {\n gain1_curr++;\n }\n } else {\n if (gain1_curr > gain1_tg) {\n gain1_curr--;\n }\n }\n hal_sys_timer_delay_us(25);\n\n anc_set_gain(gain0_curr, gain1_curr, type);\n\n if ((gain0_curr == gain0_tg) && (gain1_curr == gain1_tg)) {\n TRACE(3, \"[%s] cur gain: %d %d\", __func__, gain0_curr, gain1_curr);\n return 0;\n }\n\n return 1;\n}\n\nint __anc_usb_app_fadeout(enum ANC_TYPE_T type) {\n int32_t gain0_curr, gain1_curr;\n\n anc_get_gain(&gain0_curr, &gain1_curr, type);\n\n if (gain0_curr > 0) {\n gain0_curr--;\n } else if (gain0_curr < 0) {\n gain0_curr++;\n }\n\n if (gain1_curr > 0) {\n gain1_curr--;\n } else if (gain1_curr < 0) {\n gain1_curr++;\n }\n\n // gain0_curr = gain1_curr = 0 ;\n hal_sys_timer_delay_us(25);\n\n anc_set_gain(gain0_curr, gain1_curr, type);\n\n if ((gain0_curr == 0) && (gain1_curr == 0)) {\n TRACE(3, \"[%s] gain: %d, %d\", __func__, gain0_curr, gain1_curr);\n return 0;\n }\n\n return 1;\n}\n\n#if defined(ANC_FF_ENABLED) && defined(ANC_FB_ENABLED)\nint __anc_usb_app_fadein_ff_fb(void) {\n int32_t gain0_curr, gain1_curr;\n int32_t gain2_curr, gain3_curr;\n\n int32_t gain0_tg, gain1_tg;\n int32_t gain2_tg, gain3_tg;\n\n anc_get_gain(&gain0_curr, &gain1_curr, ANC_FEEDFORWARD);\n anc_get_gain(&gain2_curr, &gain3_curr, ANC_FEEDBACK);\n anc_get_cfg_gain(&gain0_tg, &gain1_tg, ANC_FEEDFORWARD);\n anc_get_cfg_gain(&gain2_tg, &gain3_tg, ANC_FEEDBACK);\n\n uint32_t random_factor = rand();\n random_factor %= 5;\n if (random_factor == 0)\n random_factor++;\n\n uint32_t random_factor_inverse = 5 - random_factor;\n if (random_factor_inverse == 0)\n random_factor_inverse++;\n\n random_factor_inverse = 1;\n\n if (is_sbc_mode() || is_sco_mode()) {\n if (gain0_tg > 0) {\n if (gain0_curr < gain0_tg) {\n gain0_curr = MIN(gain0_curr + random_factor_inverse, gain0_tg);\n }\n } else {\n if (gain0_curr > gain0_tg) {\n gain0_curr = MAX(gain0_curr - random_factor_inverse, gain0_tg);\n }\n }\n\n if (gain1_tg > 0) {\n if (gain1_curr < gain1_tg) {\n gain1_curr = MIN(gain1_curr + random_factor_inverse, gain1_tg);\n }\n } else {\n if (gain1_curr > gain1_tg) {\n gain1_curr = MAX(gain1_curr - random_factor_inverse, gain1_tg);\n }\n }\n\n if (gain2_tg > 0) {\n if (gain2_curr < gain2_tg) {\n gain2_curr = MIN(gain2_curr + random_factor_inverse, gain2_tg);\n }\n } else {\n if (gain2_curr > gain2_tg) {\n gain2_curr = MAX(gain2_curr - random_factor_inverse, gain2_tg);\n }\n }\n\n if (gain3_tg > 0) {\n if (gain3_curr < gain3_tg) {\n gain3_curr = MIN(gain3_curr + random_factor_inverse, gain3_tg);\n }\n } else {\n if (gain3_curr > gain3_tg) {\n gain3_curr = MAX(gain3_curr - random_factor_inverse, gain3_tg);\n }\n }\n } else {\n if (gain0_tg > 0) {\n if (gain0_curr < gain0_tg) {\n gain0_curr = MIN(gain0_curr + random_factor_inverse, gain0_tg);\n }\n } else {\n if (gain0_curr > gain0_tg) {\n gain0_curr = MAX(gain0_curr - random_factor_inverse, gain0_tg);\n }\n }\n\n if (gain1_tg > 0) {\n if (gain1_curr < gain1_tg) {\n gain1_curr = MIN(gain1_curr + random_factor_inverse, gain1_tg);\n }\n } else {\n if (gain1_curr > gain1_tg) {\n gain1_curr = MAX(gain1_curr - random_factor_inverse, gain1_tg);\n }\n }\n\n if (gain2_tg > 0) {\n if (gain2_curr < gain2_tg) {\n gain2_curr = MIN(gain2_curr + random_factor_inverse, gain2_tg);\n }\n } else {\n if (gain2_curr > gain2_tg) {\n gain2_curr = MAX(gain2_curr - random_factor_inverse, gain2_tg);\n }\n }\n\n if (gain3_tg > 0) {\n if (gain3_curr < gain3_tg) {\n gain3_curr = MIN(gain3_curr + random_factor_inverse, gain3_tg);\n }\n } else {\n if (gain3_curr > gain3_tg) {\n gain3_curr = MAX(gain3_curr - random_factor_inverse, gain3_tg);\n }\n }\n }\n\n anc_set_gain(gain0_curr, gain1_curr, ANC_FEEDFORWARD);\n anc_set_gain(gain2_curr, gain3_curr, ANC_FEEDBACK);\n\n // TRACE(5,\"[%s] cur gain: %d %d %d %d\", __func__, gain0_curr, gain1_curr,\n // gain2_curr, gain3_curr);\n\n // osDelay(random_factor);\n\n hal_sys_timer_delay_us(40);\n if (gain0_curr % 40 == 0) {\n // osDelay(random_factor);\n }\n\n if ((gain0_curr == gain0_tg) && (gain1_curr == gain1_tg) &&\n (gain2_curr == gain2_tg) && (gain3_curr == gain3_tg)) {\n anc_disable_gain_updated_when_pass0(1);\n\n anc_set_gain(gain0_curr, gain1_curr, ANC_FEEDFORWARD);\n anc_set_gain(gain2_curr, gain3_curr, ANC_FEEDBACK);\n TRACE(5, \"[%s] end cur gain: %d, %d, %d, %d\", __func__, gain0_curr,\n gain1_curr, gain2_curr, gain3_curr);\n return 0;\n }\n return 1;\n}\n\nint __anc_usb_app_fadeout_ff_fb(void) {\n int32_t gain0_curr, gain1_curr;\n int32_t gain2_curr, gain3_curr;\n anc_get_gain(&gain0_curr, &gain1_curr, ANC_FEEDFORWARD);\n anc_get_gain(&gain2_curr, &gain3_curr, ANC_FEEDBACK);\n\n uint32_t random_factor = rand();\n random_factor = random_factor % 5;\n if (random_factor == 0)\n random_factor++;\n\n uint32_t random_factor_inverse = 5 - random_factor;\n if (random_factor_inverse == 0)\n random_factor_inverse++;\n\n random_factor_inverse = 1;\n\n if (is_sbc_mode() || is_sco_mode()) {\n if (gain0_curr > 0) {\n gain0_curr = MAX(gain0_curr - random_factor_inverse, 0);\n } else if (gain0_curr < 0) {\n gain0_curr = MIN(gain0_curr + random_factor_inverse, 0);\n }\n\n if (gain1_curr > 0) {\n gain1_curr = MAX(gain1_curr - random_factor_inverse, 0);\n } else if (gain1_curr < 0) {\n gain1_curr = MIN(gain1_curr + random_factor_inverse, 0);\n }\n\n if (gain2_curr > 0) {\n gain2_curr = MAX(gain2_curr - random_factor_inverse, 0);\n } else if (gain2_curr < 0) {\n gain2_curr = MIN(gain2_curr + random_factor_inverse, 0);\n }\n\n if (gain3_curr > 0) {\n gain3_curr = MAX(gain3_curr - random_factor_inverse, 0);\n } else if (gain3_curr < 0) {\n gain3_curr = MIN(gain3_curr + random_factor_inverse, 0);\n }\n } else {\n if (gain0_curr > 0) {\n gain0_curr = MAX(gain0_curr - random_factor_inverse, 0);\n } else if (gain0_curr < 0) {\n gain0_curr = MIN(gain0_curr + random_factor_inverse, 0);\n }\n\n if (gain1_curr > 0) {\n gain1_curr = MAX(gain1_curr - random_factor_inverse, 0);\n } else if (gain1_curr < 0) {\n gain1_curr = MIN(gain1_curr + random_factor_inverse, 0);\n }\n\n if (gain2_curr > 0) {\n gain2_curr = MAX(gain2_curr - random_factor_inverse, 0);\n } else if (gain2_curr < 0) {\n gain2_curr = MIN(gain2_curr + random_factor_inverse, 0);\n }\n\n if (gain3_curr > 0) {\n gain3_curr = MAX(gain3_curr - random_factor_inverse, 0);\n } else if (gain3_curr < 0) {\n gain3_curr = MIN(gain3_curr + random_factor_inverse, 0);\n }\n }\n\n anc_set_gain(gain0_curr, gain1_curr, ANC_FEEDFORWARD);\n anc_set_gain(gain2_curr, gain3_curr, ANC_FEEDBACK);\n // TRACE(5,\"[%s] cur gain: %d %d %d %d\", __func__, gain0_curr, gain1_curr,\n // gain2_curr, gain3_curr);\n\n // osDelay(random_factor);\n\n hal_sys_timer_delay_us(40);\n if (gain0_curr % 40 == 0) {\n // osDelay(random_factor);\n }\n\n if ((gain0_curr == 0) && (gain1_curr == 0) && (gain2_curr == 0) &&\n (gain3_curr == 0)) {\n anc_disable_gain_updated_when_pass0(1);\n\n anc_set_gain(gain0_curr, gain1_curr, ANC_FEEDFORWARD);\n anc_set_gain(gain2_curr, gain3_curr, ANC_FEEDBACK);\n TRACE(5, \"[%s] end cur gain: %d, %d, %d, %d\", __func__, gain0_curr,\n gain1_curr, gain2_curr, gain3_curr);\n return 0;\n }\n\n return 1;\n}\n#endif\n\nvoid anc_gain_fade_handle(void) {\n TRACE(2, \" %s %d \", __func__, app_anc_fade_status);\n if (app_anc_fade_status == APP_ANC_FADE_OUT) {\n osSignalSet(anc_fade_thread_tid, FADE_OUT);\n }\n\n if (app_anc_fade_status == APP_ANC_FADE_IN) {\n#ifdef ANC_LED_PIN\n app_anc_switch_turnled(true);\n#endif\n\n osSignalSet(anc_fade_thread_tid, FADE_IN);\n\n if (anc_set_dac_pa_delay) {\n anc_set_dac_pa_delay = false;\n // osDelay(600);\n // analog_aud_enable_dac_pa(48);\n }\n }\n}\n\nvoid anc_fade_thread(void const *argument) {\n\n osEvent evt;\n evt.status = 0;\n uint32_t singles = 0;\n\n while (1) {\n evt = osSignalWait(0, osWaitForever);\n\n singles = evt.value.signals;\n TRACE(2, \"anc_fade_thread. %d\", singles);\n\n if (evt.status == osEventSignal) {\n\n switch (singles) {\n\n case FADE_IN:\n#if defined(ANC_FF_ENABLED) && defined(ANC_FB_ENABLED)\n anc_disable_gain_updated_when_pass0(0);\n while (__anc_usb_app_fadein_ff_fb())\n ;\n#else\n#ifdef ANC_FF_ENABLED\n while (__anc_usb_app_fadein(ANC_FEEDFORWARD))\n ;\n#endif\n#ifdef ANC_FB_ENABLED\n while (__anc_usb_app_fadein(ANC_FEEDBACK))\n ;\n#endif\n#endif\n app_anc_fade_status = APP_ANC_IDLE;\n\n break;\n case FADE_OUT:\n\n#if defined(ANC_FF_ENABLED) && defined(ANC_FB_ENABLED)\n anc_disable_gain_updated_when_pass0(0);\n while (__anc_usb_app_fadeout_ff_fb())\n ;\n#else\n#ifdef ANC_FF_ENABLED\n while (__anc_usb_app_fadeout(ANC_FEEDFORWARD))\n ;\n#endif\n#ifdef ANC_FB_ENABLED\n while (__anc_usb_app_fadeout(ANC_FEEDBACK))\n ;\n#endif\n#endif\n\n app_anc_fade_status = APP_ANC_IDLE;\n\n#ifdef ANC_FB_CHECK\n hal_codec_anc_fb_check_set_irq_handler(anc_fb_check_irq_handler);\n\n anc_fb_check_param();\n#endif\n break;\n case CHANGE_FROM_ANC_TO_TT_DIRECTLY:\n#if defined(ANC_FF_ENABLED) && defined(ANC_FB_ENABLED)\n anc_disable_gain_updated_when_pass0(0);\n while (__anc_usb_app_fadeout_ff_fb())\n ;\n#else\n#ifdef ANC_FF_ENABLED\n while (__anc_usb_app_fadeout(ANC_FEEDFORWARD))\n ;\n#endif\n\n#ifdef ANC_FB_ENABLED\n while (__anc_usb_app_fadeout(ANC_FEEDBACK))\n ;\n#endif\n#endif\n\n#if defined(ANC_FF_ENABLED) && defined(ANC_FB_ENABLED)\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDFORWARD, ANC_GAIN_DELAY);\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDBACK, ANC_GAIN_DELAY);\n#ifdef AUDIO_ANC_FB_MC_HW\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_MUSICCANCLE, ANC_GAIN_DELAY);\n#endif\n#else\n#ifdef ANC_FF_ENABLED\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDFORWARD, ANC_GAIN_DELAY);\n#endif\n\n#ifdef ANC_FB_ENABLED\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDBACK, ANC_GAIN_DELAY);\n#endif\n#endif\n\n#if defined(ANC_FF_ENABLED) && defined(ANC_FB_ENABLED)\n anc_disable_gain_updated_when_pass0(0);\n while (__anc_usb_app_fadein_ff_fb())\n ;\n#else\n#ifdef ANC_FF_ENABLED\n while (__anc_usb_app_fadein(ANC_FEEDFORWARD))\n ;\n#endif\n\n#ifdef ANC_FB_ENABLED\n while (__anc_usb_app_fadein(ANC_FEEDBACK))\n ;\n#endif\n#endif\n\n app_anc_fade_status = APP_ANC_IDLE;\n\n // recommand to play \"ANC SWITCH\" prompt here...\n\n break;\n default:\n break;\n }\n\n } else {\n TRACE(2, \"anc fade thread evt error\");\n continue;\n }\n }\n}\n\nvoid app_anc_gain_fadein(void) {\n APP_MESSAGE_BLOCK msg;\n TRACE(1, \" %s \", __func__);\n if (app_poweroff_flag)\n return;\n\n app_anc_fade_status = APP_ANC_FADE_IN;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = ANC_EVENT_FADE_IN;\n app_mailbox_put(&msg);\n}\n\nvoid app_anc_post_anc_codec_close(void) {\n APP_MESSAGE_BLOCK msg;\n TRACE(1, \" %s \", __func__);\n if (app_poweroff_flag)\n return;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = SIMPLE_PLAYER_CLOSE_CODEC_EVT;\n app_mailbox_put(&msg);\n}\n\nvoid app_anc_gain_fadeout(void) {\n APP_MESSAGE_BLOCK msg;\n TRACE(1, \" %s \", __func__);\n if (app_poweroff_flag)\n return;\n\n app_anc_fade_status = APP_ANC_FADE_OUT;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = ANC_EVENT_FADE_OUT;\n app_mailbox_put(&msg);\n}\n\nvoid app_anc_status_post(uint8_t status) {\n APP_MESSAGE_BLOCK msg;\n TRACE(2, \" %s status %d\", __func__, status);\n if (app_poweroff_flag)\n return;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = ANC_EVENT_CHANGE_STATUS;\n msg.msg_body.message_Param0 = status;\n app_mailbox_put(&msg);\n}\n\nvoid app_anc_status_sync(uint8_t status) {\n APP_MESSAGE_BLOCK msg;\n TRACE(2, \" %s status %d\", __func__, status);\n if (app_poweroff_flag)\n return;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = ANC_EVENT_SYNC_STATUS;\n msg.msg_body.message_Param0 = status;\n app_mailbox_put(&msg);\n}\n\nvoid app_anc_status_sync_init(void) {\n APP_MESSAGE_BLOCK msg;\n TRACE(1, \" %s \", __func__);\n if (app_poweroff_flag)\n return;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = ANC_EVENT_SYNC_INIT;\n app_mailbox_put(&msg);\n}\n\nvoid app_anc_do_init(void) {\n APP_MESSAGE_BLOCK msg;\n TRACE(1, \" %s DO INIT\", __func__);\n if (app_poweroff_flag)\n return;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = ANC_EVENT_INIT;\n app_mailbox_put(&msg);\n}\n\nvoid app_anc_send_howl_evt(uint32_t howl) {\n APP_MESSAGE_BLOCK msg;\n TRACE(2, \" %s %d\", __func__, howl);\n if (app_poweroff_flag)\n return;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = ANC_EVENT_HOWL_PROCESS;\n msg.msg_body.message_Param0 = howl;\n app_mailbox_put(&msg);\n}\n\nvoid app_anc_send_pwr_key_monitor_evt(uint8_t level) {\n APP_MESSAGE_BLOCK msg;\n TRACE(2, \" %s %d\", __func__, level);\n if (app_poweroff_flag)\n return;\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = ANC_EVENT_PWR_KEY_MONITOR;\n msg.msg_body.message_Param0 = level;\n app_mailbox_put(&msg);\n}\n\nextern void simple_player_delay_stop(void);\n\nvoid app_anc_post_simplayer_stop_evt(void) {\n APP_MESSAGE_BLOCK msg;\n TRACE(1, \" %s d\", __func__);\n\n msg.mod_id = APP_MODUAL_ANC;\n msg.msg_body.message_id = SIMPLE_PLAYER_DELAY_STOP_EVT;\n msg.msg_body.message_Param0 = 0;\n app_mailbox_put(&msg);\n}\n\nbool anc_enabled(void) { return (anc_work_status == ANC_STATUS_ON); }\n\nvoid app_anc_resample(uint32_t res_ratio, uint32_t *in, uint32_t *out,\n uint32_t samples) {\n uint32_t flag = int_lock();\n for (int i = samples; i > 0; i--) {\n for (int j = 0; j < res_ratio; j++) {\n *(out + (i - 1) * res_ratio + j) = *(in + i - 1);\n }\n }\n int_unlock(flag);\n}\n\nvoid app_anc_select_coef(void) {\n TRACE(2, \"enter %s %d\\n\", __FUNCTION__, __LINE__);\n\n#ifdef ANC_FF_ENABLED\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDFORWARD, ANC_GAIN_DELAY);\n#endif\n\n#ifdef ANC_FB_ENABLED\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDBACK, ANC_GAIN_DELAY);\n#endif\n\n#ifdef AUDIO_ANC_FB_MC_HW\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_MUSICCANCLE, ANC_GAIN_NO_DELAY);\n#endif\n\n TRACE(2, \"exit %s %d\\n\", __FUNCTION__, __LINE__);\n}\n\nvoid app_anc_enable(void) {\n TRACE(2, \"enter %s %d\\n\", __FUNCTION__, __LINE__);\n// anc_active_codec();\n#ifndef __SIMPLE_INTERNAL_PLAYER_SUPPORT__\n analog_aud_codec_speaker_enable(true);\n#endif\n#ifdef ANC_FF_ENABLED\n anc_open(ANC_FEEDFORWARD);\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDFORWARD, ANC_GAIN_DELAY);\n#endif\n\n#ifdef ANC_FB_ENABLED\n anc_open(ANC_FEEDBACK);\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDBACK, ANC_GAIN_DELAY);\n#endif\n\n#ifdef AUDIO_ANC_FB_MC_HW\n anc_open(ANC_MUSICCANCLE);\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_MUSICCANCLE, ANC_GAIN_NO_DELAY);\n#endif\n\n#ifdef AUDIO_ANC_FB_MC_HW\n int32_t gain_ch_l = 0;\n int32_t gain_ch_r = 0;\n\n anc_get_cfg_gain(&gain_ch_l, &gain_ch_r, ANC_MUSICCANCLE);\n anc_set_gain(gain_ch_l, gain_ch_r, ANC_MUSICCANCLE);\n#endif\n\n#if defined(ANC_WNR_ENABLED)\n if (is_sco_mode()) {\n anc_wnr_open(ANC_WNR_OPEN_MODE_CONFIGURE);\n } else {\n anc_wnr_open(ANC_WNR_OPEN_MODE_STANDALONE);\n }\n#endif\n\n#if defined(ANC_ASSIST_ENABLED)\n anc_assist_open(ANC_ASSIST_STANDALONE);\n#endif\n\n TRACE(2, \"exit %s %d\\n\", __FUNCTION__, __LINE__);\n}\n\nvoid app_anc_disable(void) {\n TRACE(2, \"enter %s %d\\n\", __FUNCTION__, __LINE__);\n\n#if defined(ANC_WNR_ENABLED)\n anc_wnr_close();\n#endif\n\n#if defined(ANC_ASSIST_ENABLED)\n anc_assist_close();\n#endif\n\n#ifdef AUDIO_ANC_FB_MC_HW\n anc_close(ANC_MUSICCANCLE);\n#endif\n\n#ifdef ANC_FF_ENABLED\n anc_close(ANC_FEEDFORWARD);\n#endif\n\n#ifdef ANC_FB_ENABLED\n anc_close(ANC_FEEDBACK);\n#endif\n\n TRACE(2, \"exit %s %d\\n\", __FUNCTION__, __LINE__);\n}\n\nstatic void anc_sample_rate_change(enum AUD_STREAM_T stream,\n enum AUD_SAMPRATE_T rate,\n enum AUD_SAMPRATE_T *new_play,\n enum AUD_SAMPRATE_T *new_cap) {\n enum AUD_SAMPRATE_T play_rate, cap_rate;\n\n if (anc_sample_rate[stream] != rate) {\n#ifdef CHIP_BEST1000\n if (stream == AUD_STREAM_PLAYBACK) {\n play_rate = rate;\n cap_rate = rate * (anc_sample_rate[AUD_STREAM_CAPTURE] /\n anc_sample_rate[AUD_STREAM_PLAYBACK]);\n } else {\n play_rate = rate / (anc_sample_rate[AUD_STREAM_CAPTURE] /\n anc_sample_rate[AUD_STREAM_PLAYBACK]);\n cap_rate = rate;\n }\n#else\n play_rate = rate;\n cap_rate = rate;\n#ifdef ANC_FF_ENABLED\n anc_select_coef(play_rate, anc_coef_idx, ANC_FEEDFORWARD,\n ANC_GAIN_NO_DELAY);\n#endif\n\n#ifdef ANC_FB_ENABLED\n anc_select_coef(play_rate, anc_coef_idx, ANC_FEEDBACK, ANC_GAIN_NO_DELAY);\n#endif\n\n#ifdef AUDIO_ANC_FB_MC_HW\n anc_select_coef(play_rate, anc_coef_idx, ANC_MUSICCANCLE,\n ANC_GAIN_NO_DELAY);\n#endif\n\n#endif // CHIP_BEST1000\n\n TRACE(5, \"%s: Update anc sample rate from %u/%u to %u/%u\", __func__,\n anc_sample_rate[AUD_STREAM_PLAYBACK],\n anc_sample_rate[AUD_STREAM_CAPTURE], play_rate, cap_rate);\n\n if (new_play) {\n *new_play = play_rate;\n }\n if (new_cap) {\n *new_cap = cap_rate;\n }\n\n anc_sample_rate[AUD_STREAM_PLAYBACK] = play_rate;\n anc_sample_rate[AUD_STREAM_CAPTURE] = cap_rate;\n }\n}\n\nvoid app_anc_open_anc(void) {\n enum AUD_SAMPRATE_T playback_rate;\n enum AUD_SAMPRATE_T capture_rate;\n AF_ANC_HANDLER handler;\n\n TRACE(2, \"enter %s %d\\n\", __FUNCTION__, __LINE__);\n\n handler = anc_sample_rate_change;\n\n#ifdef __SIMPLE_INTERNAL_PLAYER_SUPPORT__\n app_start_player_by_anc();\n#endif\n\n if (anc_sample_rate[AUD_STREAM_PLAYBACK] == AUD_SAMPRATE_NULL) {\n#ifdef CHIP_BEST1000\n anc_sample_rate[AUD_STREAM_PLAYBACK] = AUD_SAMPRATE_96000;\n anc_sample_rate[AUD_STREAM_CAPTURE] = AUD_SAMPRATE_384000;\n#else // !CHIP_BEST1000\n anc_sample_rate[AUD_STREAM_PLAYBACK] = AUD_SAMPRATE_48000;\n anc_sample_rate[AUD_STREAM_CAPTURE] = AUD_SAMPRATE_48000;\n#endif\n anc_sample_rate[AUD_STREAM_PLAYBACK] =\n hal_codec_anc_convert_rate(anc_sample_rate[AUD_STREAM_PLAYBACK]);\n anc_sample_rate[AUD_STREAM_CAPTURE] =\n hal_codec_anc_convert_rate(anc_sample_rate[AUD_STREAM_CAPTURE]);\n }\n\n playback_rate = anc_sample_rate[AUD_STREAM_PLAYBACK];\n capture_rate = anc_sample_rate[AUD_STREAM_CAPTURE];\n\n pmu_anc_config(1);\n int result = 0;\n#ifdef ANC_FF_ENABLED\n result = af_anc_open(ANC_FEEDFORWARD, playback_rate, capture_rate, handler);\n TRACE(2, \"af_anc_open %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n result = anc_open(ANC_FEEDFORWARD);\n TRACE(2, \"anc_open %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n result = anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDFORWARD, ANC_GAIN_DELAY);\n TRACE(2, \"anc_select_coef %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n#endif\n\n#ifdef ANC_FB_ENABLED\n result = af_anc_open(ANC_FEEDBACK, playback_rate, capture_rate, handler);\n TRACE(2, \"anc_open %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n result = anc_open(ANC_FEEDBACK);\n TRACE(2, \"anc_open %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n result = anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDBACK, ANC_GAIN_DELAY);\n TRACE(2, \"anc_select_coef %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n#endif\n\n#ifdef AUDIO_ANC_FB_MC_HW\n result = anc_open(ANC_MUSICCANCLE);\n TRACE(2, \"anc_open %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n result = anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_MUSICCANCLE, ANC_GAIN_NO_DELAY);\n TRACE(2, \"anc_select_coef %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n#endif\n\n#if defined(AUDIO_ANC_TT_HW)\n anc_open(ANC_TALKTHRU);\n TRACE(2, \"anc_open %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n result = anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_TALKTHRU, ANC_GAIN_NO_DELAY);\n TRACE(2, \"anc_select_coef %s %d -> %d\\n\", __FUNCTION__, __LINE__, result);\n#endif\n\n#ifdef AUDIO_ANC_FB_MC_HW\n int32_t gain_ch_l = 0;\n int32_t gain_ch_r = 0;\n\n anc_get_cfg_gain(&gain_ch_l, &gain_ch_r, ANC_MUSICCANCLE);\n anc_set_gain(gain_ch_l, gain_ch_r, ANC_MUSICCANCLE);\n#endif\n\n#if defined(ANC_WNR_ENABLED)\n if (is_sco_mode()) {\n anc_wnr_open(ANC_WNR_OPEN_MODE_CONFIGURE);\n } else {\n anc_wnr_open(ANC_WNR_OPEN_MODE_STANDALONE);\n }\n#endif\n\n#if defined(ANC_ASSIST_ENABLED)\n anc_assist_open(ANC_ASSIST_STANDALONE);\n#endif\n\n TRACE(2, \"exit %s %d\\n\", __FUNCTION__, __LINE__);\n}\n\nvoid app_anc_close_anc(void) {\n TRACE(2, \"enter %s %d\\n\", __FUNCTION__, __LINE__);\n anc_set_dac_pa_delay = false;\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n if (anc_single_mode_is_on()) {\n analog_aud_codec_speaker_enable(false);\n }\n#endif\n\n#ifdef ANC_WNR_ENABLED\n anc_wnr_close();\n#endif\n\n#if defined(ANC_ASSIST_ENABLED)\n anc_assist_close();\n#endif\n\n#if defined(AUDIO_ANC_TT_HW)\n anc_close(ANC_TALKTHRU);\n#endif\n\n#ifdef ANC_FF_ENABLED\n anc_close(ANC_FEEDFORWARD);\n af_anc_close(ANC_FEEDFORWARD);\n#endif\n\n#ifdef ANC_FB_ENABLED\n#if defined(AUDIO_ANC_FB_MC_HW)\n anc_close(ANC_MUSICCANCLE);\n#endif\n anc_close(ANC_FEEDBACK);\n af_anc_close(ANC_FEEDBACK);\n#endif\n\n pmu_anc_config(0);\n#ifdef __SIMPLE_INTERNAL_PLAYER_SUPPORT__\n app_stop_player_by_anc();\n#endif\n TRACE(2, \"exit %s %d\\n\", __FUNCTION__, __LINE__);\n}\n\nvoid app_anc_bitrate_reopen(void) {\n TRACE(2, \" %s status %d\", __func__, anc_work_status);\n if (anc_work_status == ANC_STATUS_INIT_ON) {\n // hal_codec_reconfig_pll_freq(playback_rate, capture_rate);\n } else if (anc_work_status == ANC_STATUS_ON) {\n // hal_codec_reconfig_pll_freq(playback_rate, capture_rate);\n } else if (anc_work_status == ANC_STATUS_WAITING_ON) {\n } else {\n TRACE(0, \"no deal situation.\");\n }\n}\n\nvoid app_anc_status_change(void) {\n#if defined(IBRT)\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n anc_coef_idx = anc_peer_coef_idx;\n }\n#endif\n\n TRACE(3, \"%s anc_work_status: %d anc_coef_idx: %d\", __func__, anc_work_status,\n anc_coef_idx);\n\n switch (anc_work_status) {\n case ANC_STATUS_OFF:\n anc_work_status = ANC_STATUS_WAITING_ON;\n app_anc_timer_set(ANC_EVENT_OPEN, anc_switch_on_time);\n app_anc_open_anc();\n break;\n case ANC_STATUS_ON:\n\n#if (ANC_COEF_LIST_NUM > 1)\n\n#ifdef __BT_ANC_KEY__\n if (anc_status_sync_flag == false) {\n anc_coef_idx++;\n }\n#endif\n\n if (anc_coef_idx < ANC_COEF_LIST_NUM) {\n TRACE(2, \" %s set coef idx: %d \", __func__, anc_coef_idx);\n\n#ifdef ANC_MODE_SWITCH_WITHOUT_FADE\n\n#ifdef ANC_FF_ENABLED\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDFORWARD, ANC_GAIN_NO_DELAY);\n#endif\n#ifdef ANC_FB_ENABLED\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDBACK, ANC_GAIN_NO_DELAY);\n#endif\n#ifdef AUDIO_ANC_FB_MC_HW\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_MUSICCANCLE, ANC_GAIN_NO_DELAY);\n#endif\n\n // recommand to play \"ANC SWITCH\" prompt here...\n\n#else\n osSignalSet(anc_fade_thread_tid, CHANGE_FROM_ANC_TO_TT_DIRECTLY);\n#endif\n } else {\n anc_coef_idx = 0;\n app_anc_timer_set(ANC_EVENT_CLOSE, anc_close_delay_time);\n app_anc_gain_fadeout();\n anc_work_status = ANC_STATUS_WAITING_OFF;\n }\n#else\n anc_coef_idx = 0;\n app_anc_timer_set(ANC_EVENT_CLOSE, anc_close_delay_time);\n app_anc_gain_fadeout();\n anc_work_status = ANC_STATUS_WAITING_OFF;\n#endif\n break;\n case ANC_STATUS_INIT_ON:\n app_anc_select_coef();\n app_anc_gain_fadein();\n anc_work_status = ANC_STATUS_WAITING_ON;\n app_anc_timer_close();\n break;\n default:\n break;\n }\n if (anc_status_sync_flag == true)\n anc_status_sync_flag = false;\n}\n\nstatic int app_anc_handle_process(APP_MESSAGE_BODY *msg_body) {\n uint32_t evt = msg_body->message_id;\n uint32_t arg0 = msg_body->message_Param0;\n\n TRACE(4, \" %s evt: %d, arg0: %d , anc status :%d\", __func__, evt, arg0,\n anc_work_status);\n\n switch (evt) {\n case ANC_EVENT_INIT:\n // init anc_timer\n app_anc_init_timer();\n // init anc&open codec\n#ifdef __AUDIO_SECTION_SUPPT__\n anc_load_cfg();\n#endif\n\n#ifdef __ANC_INIT_ON__\n app_anc_open_anc();\n anc_work_status = ANC_STATUS_INIT_ON;\n app_anc_timer_set(ANC_EVENT_CLOSE, anc_init_switch_off_time);\n#else\n anc_work_status = ANC_STATUS_OFF;\n#endif\n#ifdef __ANC_STICK_SWITCH_USE_GPIO__\n if (app_anc_switch_get_val() == ANC_SWITCH_ON_LEVEL) {\n app_anc_switch_set_edge(ANC_SWITCH_ON_LEVEL);\n app_anc_status_post(ANC_SWITCH_ON_LEVEL);\n } else {\n app_anc_switch_set_edge(!(bool)ANC_SWITCH_ON_LEVEL);\n }\n#endif\n // anc_coef_idx = 0;\n anc_fade_thread_tid = osThreadCreate(osThread(anc_fade_thread), NULL);\n break;\n case ANC_EVENT_FADE_IN:\n case ANC_EVENT_FADE_OUT:\n anc_gain_fade_handle();\n if (evt == ANC_EVENT_FADE_IN) {\n anc_work_status = ANC_STATUS_ON;\n // recommand to play \"ANC ON\" prompt here...\n app_voice_report(APP_STATUS_INDICATION_ALEXA_START,\n 0); // close latlatency mode\n }\n if (evt == ANC_EVENT_FADE_OUT) {\n anc_work_status = ANC_STATUS_INIT_ON;\n // recommand to play \"ANC OFF\" prompt here...\n app_voice_report(APP_STATUS_INDICATION_ALEXA_STOP,\n 0); // close latlatency mode\n }\n break;\n case ANC_EVENT_CHANGE_SAMPLERATE:\n app_anc_bitrate_reopen();\n break;\n case ANC_EVENT_CHANGE_STATUS:\n\n#ifdef __ANC_STICK_SWITCH_USE_GPIO__\n osDelay(10);\n if (app_anc_switch_get_val() != (bool)arg0) { // debonce\n TRACE(0, \"io level not equeue exit\");\n break;\n }\n\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n if (anc_single_mode_is_on()) {\n if (arg0 != ANC_SWITCH_ON_LEVEL) {\n TRACE(1, \" Anc ON but exit %d \", app_init_done);\n if (app_init_done) {\n app_anc_shutdown = true;\n app_shutdown();\n } else {\n app_anc_timer_set(ANC_EVENT_SWITCH_KEY_DEBONCE,\n anc_switch_key_debonce_time);\n }\n return 0;\n }\n }\n#endif\n if (arg0 != ANC_SWITCH_ON_LEVEL)\n app_anc_switch_set_edge((!(bool)ANC_SWITCH_ON_LEVEL));\n else\n app_anc_switch_set_edge(ANC_SWITCH_ON_LEVEL);\n\n if (((arg0 == ANC_SWITCH_ON_LEVEL) && (anc_work_status == ANC_STATUS_ON)) ||\n ((arg0 != ANC_SWITCH_ON_LEVEL) &&\n (anc_work_status == ANC_STATUS_OFF))) {\n // status same, no handle\n TRACE(0, \" Anc NOT ON, exit\");\n return 0;\n }\n#endif\n\n#if defined(IBRT)\n if (((BOOL)arg0 == false) && (app_anc_work_status() == false)) {\n anc_coef_idx = 0;\n anc_peer_coef_idx = 0;\n anc_status_sync_flag = 0;\n return 0;\n }\n\n if (((BOOL)arg0 == true) && (app_anc_work_status() == true) &&\n (anc_coef_idx == anc_peer_coef_idx)) {\n anc_status_sync_flag = 0;\n return 0;\n }\n#endif\n app_anc_status_change();\n\n break;\n case ANC_EVENT_SYNC_STATUS:\n#if defined(IBRT)\n TRACE(4, \"%s anc_work_status %d--->%d anc_coef_idx:%d \", __func__,\n anc_work_status, arg0, anc_coef_idx);\n\n if (ANC_STATUS_ON == arg0) {\n arg0 = 1;\n } else {\n arg0 = 0;\n }\n\n uint8_t buf[3] = {0};\n buf[0] = (uint8_t)arg0;\n buf[1] = (uint8_t)anc_coef_idx;\n buf[2] = false; // set peer anc_status_sync_flag = false\n tws_ctrl_send_cmd(APP_TWS_CMD_SYNC_ANC_STATUS, buf, 3);\n#endif\n break;\n case ANC_EVENT_SYNC_INIT:\n break;\n case ANC_EVENT_HOWL_PROCESS:\n // disable anc,set max gain,enable anc\n {\n // uint32_t howl = arg0;\n if (anc_work_status == ANC_STATUS_ON) {\n //__anc_usb_app_howl_set_gain(howl);\n }\n }\n break;\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n case ANC_EVENT_PWR_KEY_MONITOR:\n osDelay(10);\n\n if (app_pwr_key_monitor_get_val() != (bool)arg0) // debonce\n return 0;\n\n if ((bool)arg0) {\n app_anc_timer_set(ANC_EVENT_PWR_KEY_MONITOR_REBOOT,\n anc_pwr_key_monitor_time);\n app_pwr_key_monitor_set_int_edge(1);\n } else {\n hwtimer_stop(anc_timerid);\n app_pwr_key_monitor_set_int_edge(0);\n }\n\n break;\n#endif\n case SIMPLE_PLAYER_DELAY_STOP_EVT:\n#ifdef __SIMPLE_INTERNAL_PLAYER_SUPPORT__\n simple_player_delay_stop();\n#endif\n break;\n case SIMPLE_PLAYER_CLOSE_CODEC_EVT:\n app_anc_close_anc();\n anc_work_status = ANC_STATUS_OFF;\n break;\n default:\n break;\n }\n\n return 0;\n}\n\nstatic void anc_gain_fade_timer_handler(void *p) {\n TRACE(2, \" %s , request %d \", __func__, anc_timer_request);\n switch (anc_timer_request) {\n case ANC_EVENT_OPEN:\n app_anc_gain_fadein();\n break;\n case ANC_EVENT_CLOSE:\n // real close\n // app_anc_close_anc();\n // anc_work_status = ANC_STATUS_OFF;\n app_anc_post_anc_codec_close();\n\n break;\n case ANC_EVENT_PWR_KEY_MONITOR_REBOOT:\n TRACE(0, \" reboot !\");\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT);\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT_ANC_ON);\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_REBOOT_BT_ON);\n app_reset();\n break;\n case ANC_EVENT_SWITCH_KEY_DEBONCE:\n TRACE(0, \" ANC SWITCH KEY \");\n#ifdef __ANC_STICK_SWITCH_USE_GPIO__\n if (app_switch_callback)\n app_switch_callback(\n hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)ANC_SWITCH_PIN));\n#endif\n break;\n default:\n break;\n }\n anc_timer_request = ANC_EVENT_NONE;\n hwtimer_stop(anc_timerid);\n}\n\nvoid app_anc_init_timer(void) {\n if (anc_timerid == NULL)\n anc_timerid = hwtimer_alloc((HWTIMER_CALLBACK_T)anc_gain_fade_timer_handler,\n &anc_timer_request);\n}\n\nvoid app_anc_timer_set(uint32_t request, uint32_t delay) {\n TRACE(3, \" %s request %d , delay %ds \", __func__, request,\n (TICKS_TO_MS(delay) / 1000));\n if (anc_timerid == NULL)\n return;\n anc_timer_request = request;\n hwtimer_stop(anc_timerid);\n hwtimer_start(anc_timerid, delay);\n}\n\nvoid app_anc_timer_close(void) {\n TRACE(3, \" %s enter...\", __func__);\n if (anc_timerid == NULL) {\n return;\n }\n\n anc_timer_request = ANC_EVENT_NONE;\n hwtimer_stop(anc_timerid);\n}\n\n#if defined(IBRT)\nvoid app_anc_cmd_receive_process(uint8_t *buf, uint16_t len) {\n TRACE(1, \"[%s] enter...\", __func__);\n\n if (buf[0] == IBRT_ACTION_ANC_NOTIRY_MASTER_EXCHANGE_COEF) {\n switch (buf[1]) {\n#ifdef __BT_ANC_KEY__\n case 0:\n app_anc_key(NULL, NULL);\n break; // slave invoke app_anc_key();\n#endif\n#ifndef __BT_ANC_KEY__\n case 1:\n app_anc_start();\n break; // slave invoke app_anc_start();\n case 2:\n app_anc_switch_coef(buf[2]);\n break; // slave invoke app_anc_switch_coef();\n case 3:\n app_anc_stop();\n break; // slave invoke app_anc_stop();\n#endif\n default:\n TRACE(1, \"[%s] cmd invalid...\", __func__);\n break;\n }\n }\n}\n\nstatic void app_anc_notify_master_to_exchange_coef(uint8_t arg0, uint8_t arg1) {\n uint8_t buf[3] = {0};\n\n TRACE(3, \"[%s] arg0:%d arg1:%d\", __func__, arg0, arg1);\n\n buf[0] = IBRT_ACTION_ANC_NOTIRY_MASTER_EXCHANGE_COEF;\n buf[1] = arg0;\n buf[2] = arg1;\n\n app_ibrt_ui_send_user_action(buf, 3);\n}\n#endif\n\n#ifdef __BT_ANC_KEY__\nvoid app_anc_key(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s anc_work_st:%d , timer:%d\", __func__, anc_work_status,\n anc_timer_request);\n bool flag = app_anc_work_status();\n\n#if defined(IBRT)\n app_anc_status_sync(!flag);\n#endif\n app_anc_status_post(!flag);\n}\n#endif\n\n#ifndef __BT_ANC_KEY__\nint app_anc_start(void) {\n TRACE(1, \"[%s] enter...\", __func__);\n bool flag = app_anc_work_status();\n\n if (flag == true) {\n TRACE(1, \"[%s] anc has been on...\", __func__);\n return -1;\n }\n\n#if defined(IBRT)\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n TRACE(2, \"[%s] current_role: %d\", __func__, p_ibrt_ctrl->current_role);\n if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n app_anc_notify_master_to_exchange_coef(1, 0);\n return -1;\n }\n anc_coef_idx = 0;\n app_anc_status_sync(!flag);\n#endif\n anc_coef_idx = 0;\n app_anc_status_post(!flag);\n\n return 0;\n}\n\nint app_anc_switch_coef(uint8_t index) {\n TRACE(1, \"[%s] enter...\", __func__);\n bool flag = app_anc_work_status();\n\n if (flag == false) {\n TRACE(1, \"[%s] anc has been off...\", __func__);\n return -1;\n }\n\n if (index == anc_coef_idx) {\n TRACE(1, \"[%s] anc coef has been load...\", __func__);\n return -1;\n }\n\n#if defined(IBRT)\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n TRACE(2, \"[%s] current_role: %d\", __func__, p_ibrt_ctrl->current_role);\n if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n app_anc_notify_master_to_exchange_coef(2, index);\n return -1;\n }\n anc_coef_idx = index;\n app_anc_status_sync(!flag);\n#endif\n anc_coef_idx = index;\n app_anc_status_post(!flag);\n\n return 0;\n}\n\nint app_anc_stop(void) {\n TRACE(1, \"[%s] enter...\", __func__);\n bool flag = app_anc_work_status();\n\n if (flag == false) {\n TRACE(1, \"[%s] anc has been off...\", __func__);\n return -1;\n }\n\n#if defined(IBRT)\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n TRACE(2, \"[%s] current_role: %d\", __func__, p_ibrt_ctrl->current_role);\n if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n app_anc_notify_master_to_exchange_coef(3, 0);\n return -1;\n }\n anc_coef_idx = ANC_COEF_NUM;\n app_anc_status_sync(!flag);\n#endif\n anc_coef_idx = ANC_COEF_NUM;\n app_anc_status_post(!flag);\n\n return 0;\n}\n#endif\n\nvoid app_anc_ios_init(void) {\n#ifdef __ANC_STICK_SWITCH_USE_GPIO__\n if (cfg_anc_switch.pin != HAL_IOMUX_PIN_NUM) {\n hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)&cfg_anc_switch, 1);\n hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)cfg_anc_switch.pin,\n HAL_GPIO_DIR_IN, 0);\n }\n#endif\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n if (cfg_pwr_key_monitor.pin != HAL_IOMUX_PIN_NUM) {\n hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)&cfg_pwr_key_monitor,\n 1);\n hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)cfg_pwr_key_monitor.pin,\n HAL_GPIO_DIR_IN, 0);\n }\n if (cfg_anc_led.pin != HAL_IOMUX_PIN_NUM) {\n hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)&cfg_anc_led, 1);\n hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)cfg_anc_led.pin, HAL_GPIO_DIR_OUT,\n 0);\n }\n\n#endif\n#ifdef ANC_SWITCH_PIN\n uint8_t gpio_val = hal_gpio_pin_get_val(ANC_SWITCH_PIN);\n if (gpio_val) {\n app_anc_switch_turnled(true);\n TRACE(1, \" %s turn on led\", __func__);\n } else {\n app_anc_switch_turnled(false);\n TRACE(1, \" %s turn off led\", __func__);\n }\n#endif\n}\n\nint app_anc_open_module(void) {\n TRACE(1, \"%s \", __func__);\n // set app module\n app_set_threadhandle(APP_MODUAL_ANC, app_anc_handle_process);\n app_anc_do_init();\n#ifdef __ANC_STICK_SWITCH_USE_GPIO__\n app_anc_switch_init(app_anc_status_post);\n app_anc_switch_set_edge(app_anc_switch_get_val());\n#endif\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n if (anc_single_mode_is_on()) {\n // app_pwr_key_monitor_init(app_anc_send_pwr_key_monitor_evt);\n // app_pwr_key_monitor_set_int_edge(app_pwr_key_monitor_get_val());\n }\n#endif\n\n return 0;\n}\n\nint app_anc_close_module(void) {\n TRACE(1, \" %s \", __func__);\n\n anc_timer_request = ANC_EVENT_NONE;\n if (anc_timerid) {\n hwtimer_stop(anc_timerid);\n hwtimer_free(anc_timerid);\n anc_timerid = NULL;\n }\n if (app_anc_get_anc_status() != ANC_STATUS_OFF) {\n anc_work_status = ANC_STATUS_OFF;\n app_anc_disable();\n app_anc_close_anc();\n }\n app_set_threadhandle(APP_MODUAL_ANC, NULL);\n return 0;\n}\n\nenum AUD_SAMPRATE_T app_anc_get_play_rate(void) {\n return anc_sample_rate[AUD_STREAM_PLAYBACK];\n}\n\nbool app_anc_work_status(void) {\n // TRACE(2,\" %s st %d\", __func__, anc_work_status);\n return (anc_work_status == ANC_STATUS_ON ||\n anc_work_status == ANC_STATUS_WAITING_ON);\n}\n\nuint32_t app_anc_get_anc_status(void) { return anc_work_status; }\n\nvoid test_anc(void) {\n app_anc_open_anc();\n app_anc_enable();\n}\n\nvoid test_anc_switch_coef(void) {\n anc_coef_idx++;\n\n TRACE(2, \" %s set coef idx: %d \", __func__, anc_coef_idx);\n\n if (ANC_STATUS_OFF == anc_work_status ||\n ANC_STATUS_INIT_ON == anc_work_status) {\n app_anc_status_change();\n anc_coef_idx = 0;\n return;\n }\n if (anc_coef_idx < (ANC_COEF_LIST_NUM)) {\n#ifdef ANC_FF_ENABLED\n while (__anc_usb_app_fadeout(ANC_FEEDFORWARD))\n ;\n#endif\n#ifdef ANC_FB_ENABLED\n while (__anc_usb_app_fadeout(ANC_FEEDBACK))\n ;\n#endif\n\n app_anc_disable();\n anc_select_coef(anc_sample_rate[AUD_STREAM_PLAYBACK], anc_coef_idx,\n ANC_FEEDFORWARD, ANC_GAIN_DELAY);\n app_anc_enable();\n\n#ifdef ANC_FF_ENABLED\n while (__anc_usb_app_fadein(ANC_FEEDFORWARD))\n ;\n#endif\n#ifdef ANC_FB_ENABLED\n while (__anc_usb_app_fadein(ANC_FEEDBACK))\n ;\n#endif\n } else {\n anc_coef_idx = 0;\n app_anc_timer_set(ANC_EVENT_CLOSE, anc_close_delay_time);\n app_anc_gain_fadeout();\n anc_work_status = ANC_STATUS_WAITING_OFF;\n }\n}\n\n#if defined(IBRT)\nvoid app_anc_sync_status(void) {\n uint8_t buf[3] = {0};\n\n bool flag = app_anc_work_status();\n\n buf[0] = (uint8_t)flag;\n\n if (flag == true) {\n buf[1] = (uint8_t)anc_coef_idx;\n } else {\n buf[1] = (uint8_t)ANC_COEF_NUM;\n }\n\n buf[2] = true; // set peer anc_status_sync_flag = true\n\n anc_peer_coef_idx = 0;\n\n TRACE(4, \"%s anc_work_status:%d, anc_coef_idx:%d, anc_sync_status_flag:%d\",\n __func__, buf[0], buf[1], buf[2]);\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n tws_ctrl_send_cmd(APP_TWS_CMD_SYNC_ANC_STATUS, buf, 3);\n }\n}\n#endif\n" }, { "path": "apps/anc/src/peak_detector.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"peak_detector.h\"\n#include \"math.h\"\n\n// #define PKD_FACTOR_UP (0.6)\n// #define PKD_FACTOR_DOWN (2.0)\n// #define PKD_REDUCE_RATE (0.0335) // -30dB\n\nstatic enum AUD_BITS_T pkd_samp_bits;\nstatic float pkd_alphaR = 0.0f;\nstatic float pkd_alphaA = 0.0f;\nstatic float pkd_factor1 = 0.0f;\nstatic float pkd_factor2 = 0.0f;\nstatic float pkd_reduce_rate = 1.0f;\n\n#define FABS(x) ((x) >= 0.f ? (x) : -(x))\n#define Max(a, b) ((a) > (b) ? (a) : (b))\n\n// Depend on codec_dac_vol\n// const float pkd_vol_multiple[18] = {0.089125, 0.0, 0.005623, 0.007943,\n// 0.011220, 0.015849, 0.022387, 0.031623, 0.044668, 0.063096, 0.089125,\n// 0.125893, 0.177828, 0.251189, 0.354813, 0.501187, 0.707946, 1.000000};\n\n// static uint32_t test_num = 0;\n\n// int app_bt_stream_local_volume_get(void);\n\n// y = 20log(x)\nstatic inline float convert_multiple_to_db(float multiple) {\n return 20 * (float)log10(multiple);\n}\n\n// x = 10^(y/20)\nstatic inline float convert_db_to_multiple(float db) {\n return (float)pow(10, db / 20);\n}\n\nvoid peak_detector_init(void) {\n pkd_alphaR = 0.0f;\n pkd_alphaA = 0.0f;\n pkd_factor1 = 0.0f;\n pkd_factor2 = 0.0f;\n pkd_reduce_rate = 1.0f;\n // TRACE(3,\"[%s] pkd_alphaR = %f, pkd_alphaA = %f\", __func__,\n // (double)pkd_alphaR, (double)pkd_alphaA);\n}\n\nvoid peak_detector_setup(PEAK_DETECTOR_CFG_T *cfg) {\n pkd_samp_bits = cfg->bits;\n pkd_alphaR = (float)exp(-1 / (cfg->factor_down * cfg->fs));\n pkd_alphaA = (float)exp(-1 / (cfg->factor_up * cfg->fs));\n pkd_reduce_rate = convert_db_to_multiple(cfg->reduce_dB);\n}\n\nstatic void peak_detector_run_16bits(int16_t *buf, uint32_t len,\n float vol_multiple) {\n float normal_rate = 1.0;\n float tgt_rate = 1.0;\n\n for (uint32_t i = 0; i < len; i++) {\n pkd_factor1 = Max(buf[i], pkd_alphaR * pkd_factor1);\n pkd_factor2 = pkd_alphaA * pkd_factor2 + (1 - pkd_alphaA) * pkd_factor1;\n\n normal_rate = pkd_factor2 / 32768;\n\n tgt_rate = pkd_reduce_rate / normal_rate / vol_multiple;\n\n if (tgt_rate > 1.0) {\n tgt_rate = 1.0;\n }\n\n // rate += (tgt_rate - rate) / 10000.0;\n\n // if(pkd_factor2>)\n // {\n // normal_rate = 0.25;\n // }\n // else\n // {\n // normal_rate = 0.25;\n // }\n // normal_rate *= 1.0 - pkd_factor2/32768;\n\n buf[i] = (int16_t)(buf[i] * tgt_rate);\n // buf[i] = 0;\n //\n // TRACE(2,\"%d, %d\", buf[i], pkd_factor2);\n }\n\n // if(test_num == 500)\n // {\n // test_num = 0;\n // TRACE(0,\"START>>>\");\n // TRACE(2,\"vol_level = %d, pkd_vol_multiple = %f\", vol_level,\n // pkd_vol_multiple[vol_level]); TRACE(3,\"buf = %d, pkd_alphaR = %f,\n // pkd_alphaA = %f\", buf[len-1], pkd_alphaR, pkd_alphaA);\n // TRACE(4,\"pkd_factor1 = %f, pkd_factor2 = %f, normal_rate = %f, tgt_rate =\n // %f\", pkd_factor1, pkd_factor2, normal_rate, tgt_rate); TRACE(0,\"END<<<\");\n // // TRACE(7,\"[%s] buf = %d, pkd_alphaR = %f, pkd_alphaA = %f, pkd_factor1 =\n // %f, pkd_factor2 = %f, normal_rate = %f\", __func__, buf[len-1], pkd_alphaR,\n // pkd_alphaA, pkd_factor1, pkd_factor2, (1.0 - pkd_factor2/32768));\n // }\n\n#if 0\n short sample;\n short sample_max = 0;\n short sample_min = 0;\n\n for (uint32_t i = 0; i < len; i++)\n {\n sample = buf[i];\n if(sample > sample_max)\n {\n sample_max = sample;\n }\n\n if(sample < sample_min)\n {\n sample_min = sample;\n }\n } \n\n\n TRACE(2,\"Max = %10d, Min = %10d\",sample_max, sample_min);\n#endif\n}\n\nstatic void peak_detector_run_24bits(int32_t *buf, uint32_t len,\n float vol_multiple) {\n float normal_rate = 1.0;\n float tgt_rate = 1.0;\n\n for (uint32_t i = 0; i < len; i++) {\n pkd_factor1 = Max(buf[i], pkd_alphaR * pkd_factor1);\n pkd_factor2 = pkd_alphaA * pkd_factor2 + (1 - pkd_alphaA) * pkd_factor1;\n\n normal_rate = pkd_factor2 / 32768;\n\n tgt_rate = pkd_reduce_rate / normal_rate / vol_multiple;\n\n if (tgt_rate > 1.0) {\n tgt_rate = 1.0;\n }\n\n // rate += (tgt_rate - rate) / 10000.0;\n\n // if(pkd_factor2>)\n // {\n // normal_rate = 0.25;\n // }\n // else\n // {\n // normal_rate = 0.25;\n // }\n // normal_rate *= 1.0 - pkd_factor2/32768;\n\n buf[i] = (int32_t)(buf[i] * tgt_rate);\n // buf[i] = 0;\n //\n // TRACE(2,\"%d, %d\", buf[i], pkd_factor2);\n }\n}\n\nvoid peak_detector_run(uint8_t *buf, uint32_t len, float vol_multiple) {\n // int vol_level = 0;\n\n if (pkd_samp_bits <= AUD_BITS_16) {\n len = len / sizeof(int16_t);\n peak_detector_run_16bits((int16_t *)buf, len, vol_multiple);\n } else {\n len = len / sizeof(int32_t);\n peak_detector_run_24bits((int32_t *)buf, len, vol_multiple);\n }\n\n // test_num++;\n\n // vol_level = app_bt_stream_local_volume_get();\n}\n" }, { "path": "apps/apptester/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nifeq ($(ANC_APP),1)\nobj-y += ../../tests/anc_usb/anc_usb_app.c\nendif\nobj-y += ../../tests/anc_usb/usb_audio_app.c\nobj-y += ../../tests/anc_usb/safe_queue.c\nobj-y += ../../tests/anc_usb/memutils.c\nobj-y += ../../tests/anc_usb/speech_process.c\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nsubdir-ccflags-y += \\\n\t-Iutils/cqueue \\\n\t-Iplatform/drivers/ana \\\n\t-Iservices/audio_process \\\n\t-Iservices/multimedia/rbcodec/inc \\\n\t-Iservices/multimedia/audio/process/anc/include \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\t-Iservices/multimedia/speech/inc \\\n -Iservices/nv_section/include \\\n -Iservices/nv_section/aud_section \\\n\t-Iutils/hwtimer_list\n\nCFLAGS_usb_audio_app.o += -DAUDIO_OUTPUT_VOLUME_DEFAULT=$(AUDIO_OUTPUT_VOLUME_DEFAULT)\nCFLAGS_adda_loop_app.o += -DAUDIO_OUTPUT_VOLUME_DEFAULT=$(AUDIO_OUTPUT_VOLUME_DEFAULT)\n\nifeq ($(APP_TEST_AUDIO),1)\nccflags-y += -DAPP_TEST_AUDIO\nendif\n\nANC_USB_CFG_FLAGS :=\n\n# ANC option\nifeq ($(ANC_APP),1)\nANC_USB_CFG_FLAGS += -DANC_APP\nendif\n\n# USB audio option\nifeq ($(USB_AUDIO_APP),1)\nANC_USB_CFG_FLAGS += -DUSB_AUDIO_APP\nendif\n\nifeq ($(USB_HIGH_SPEED),1)\nANC_USB_CFG_FLAGS += -DUSB_HIGH_SPEED\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\nANC_USB_CFG_FLAGS += -D__AUDIO_RESAMPLE__\nendif\n\nifeq ($(ADC_CH_SEP_BUFF),1)\nANC_USB_CFG_FLAGS += -DADC_CH_SEP_BUFF\nendif\n\n\nANC_USB_CFG_FLAGS += $(UAUD_CFG_FLAGS)\n\n# USB audio configuration\nifeq ($(USB_AUDIO_DYN_CFG),1)\nifneq ($(AUDIO_RESAMPLE),1)\nSW_CAPTURE_RESAMPLE ?= 1\nendif\nendif\n\nifeq ($(AUDIO_PLAYBACK_24BIT),1)\nANC_USB_CFG_FLAGS += -DAUDIO_PLAYBACK_24BIT\nendif\n\n# DSD configuration\nifeq ($(HW_FIR_DSD_PROCESS),1)\nANC_USB_CFG_FLAGS += -D__HW_FIR_DSD_PROCESS__\nendif\n\n# EQ configuration\nifeq ($(HW_FIR_EQ_PROCESS),1)\nANC_USB_CFG_FLAGS += -D__HW_FIR_EQ_PROCESS__\nendif\n\nifeq ($(HW_IIR_EQ_PROCESS),1)\nANC_USB_CFG_FLAGS += -D__HW_IIR_EQ_PROCESS__\nendif\n\nifeq ($(SW_IIR_EQ_PROCESS),1)\nANC_USB_CFG_FLAGS += -D__SW_IIR_EQ_PROCESS__\nendif\n\nifeq ($(SW_CAPTURE_RESAMPLE),1)\nANC_USB_CFG_FLAGS += -DSW_CAPTURE_RESAMPLE\nendif\n\nCFLAGS_app_audtest.o += $(ANC_USB_CFG_FLAGS)\nCFLAGS_usb_audio_app.o += $(ANC_USB_CFG_FLAGS)\nCFLAGS_anc_usb_app.o += $(ANC_USB_CFG_FLAGS)\n\nifeq ($(ANC_KEY_DOUBLE_CLICK_ON_OFF),1)\nCFLAGS_anc_usb_app.o += -DANC_KEY_DOUBLE_CLICK_ON_OFF\nendif\n\nifeq ($(ANC_FF_ENABLED),1)\nCFLAGS_anc_usb_app.o += -DANC_FF_ENABLED\nendif\n\nifeq ($(ANC_FB_ENABLED),1)\nCFLAGS_anc_usb_app.o += -DANC_FB_ENABLED\nendif\n\nifeq ($(AUDIO_SECTION_SUPPT),1)\nCFLAGS_anc_usb_app.o += -D__AUDIO_SECTION_SUPPT__\nendif\n\nifeq ($(ANC_INIT_OFF),1)\nCFLAGS_anc_usb_app.o += -DANC_INIT_OFF\nendif\n\nifeq ($(PC_CMD_UART),1)\nCFLAGS_app_audtest.o += -D__PC_CMD_UART__\nendif\n\nifeq ($(DELAY_STREAM_OPEN),1)\nCFLAGS_usb_audio_app.o += -DDELAY_STREAM_OPEN\nendif\n\nifeq ($(NOISE_GATING),1)\nCFLAGS_usb_audio_app.o += -DNOISE_GATING\nendif\n\nifeq ($(NOISE_REDUCTION),1)\nCFLAGS_usb_audio_app.o += -DNOISE_REDUCTION\nendif\n\nifeq ($(ANC_L_R_MISALIGN_WORKAROUND),1)\nCFLAGS_usb_audio_app.o += -DANC_L_R_MISALIGN_WORKAROUND\nendif\n\nifeq ($(ANDROID_ACCESSORY_SPEC),1)\nCFLAGS_usb_audio_app.o += -DANDROID_ACCESSORY_SPEC\nifeq ($(ANDROID_VOICE_CMD_KEY),1)\nCFLAGS_usb_audio_app.o += -DANDROID_VOICE_CMD_KEY\nendif\nendif\n\nifeq ($(DUAL_AUX_MIC_MORE_FILTER),1)\nCFLAGS_usb_audio_app.o += -DDUAL_AUX_MIC_MORE_FILTER\nendif\n\nifeq ($(FREQ_RESP_EQ),1)\nCFLAGS_usb_audio_app.o += -DFREQ_RESP_EQ\nendif\n\nifeq ($(KEEP_SAME_LATENCY),1)\nCFLAGS_usb_audio_app.o += -DKEEP_SAME_LATENCY\nendif\n\nifeq ($(USB_AUDIO_PWRKEY_TEST),1)\nCFLAGS_usb_audio_app.o += -DUSB_AUDIO_PWRKEY_TEST\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\n# If neither best1000 nor best2000\nifeq ($(filter best1000 best2000,$(CHIP)),)\nPLL_TUNE_SAMPLE_RATE ?= 1\nendif\nifeq ($(PLL_TUNE_SAMPLE_RATE),1)\nCFLAGS_usb_audio_app.o += -DPLL_TUNE_SAMPLE_RATE\nendif\nendif\n\n" }, { "path": "apps/apptester/app_audtest.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_thread.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n\n#include \"app_audtest_pattern.h\"\n#include \"hal_timer.h\"\n\n#include \"app_utils.h\"\n#include \"audiobuffer.h\"\n#include \"audioflinger.h\"\n#include \"eq_export.h\"\n#include \"hal_aud.h\"\n#include \"stdbool.h\"\n#include \n\n#if defined(APP_TEST_AUDIO) && defined(ANC_APP)\n#include \"anc_usb_app.h\"\n#include \"usb_audio_app.h\"\n#include \"usb_audio_frm_defs.h\"\n//#include \"dualadc_audio_app.h\"\n#endif\n\n#define USB_AUDIO_PLAYBACK_BUFF_SIZE (FRAME_SIZE_PLAYBACK * 4)\n#define USB_AUDIO_CAPTURE_BUFF_SIZE (FRAME_SIZE_CAPTURE * 4)\n\n#define USB_AUDIO_RECV_BUFF_SIZE (FRAME_SIZE_RECV * 8)\n#define USB_AUDIO_SEND_BUFF_SIZE (FRAME_SIZE_SEND * 8)\n\n#define APP_TEST_PLAYBACK_BUFF_SIZE (128 * 20)\n#define APP_TEST_CAPTURE_BUFF_SIZE (128 * 20)\n\n#if (USB_AUDIO_PLAYBACK_BUFF_SIZE > APP_TEST_PLAYBACK_BUFF_SIZE)\n#define REAL_PLAYBACK_BUFF_SIZE USB_AUDIO_PLAYBACK_BUFF_SIZE\n#else\n#define REAL_PLAYBACK_BUFF_SIZE APP_TEST_PLAYBACK_BUFF_SIZE\n#endif\n\n#if (USB_AUDIO_CAPTURE_BUFF_SIZE > APP_TEST_CAPTURE_BUFF_SIZE)\n#define REAL_CAPTURE_BUFF_SIZE USB_AUDIO_CAPTURE_BUFF_SIZE\n#else\n#define REAL_CAPTURE_BUFF_SIZE APP_TEST_CAPTURE_BUFF_SIZE\n#endif\n\n#define ALIGNED4 ALIGNED(4)\n\nstatic uint8_t ALIGNED4 app_test_playback_buff[REAL_PLAYBACK_BUFF_SIZE];\nstatic uint8_t ALIGNED4 app_test_capture_buff[REAL_CAPTURE_BUFF_SIZE];\n\n#if defined(APP_TEST_AUDIO) && defined(ANC_APP)\nstatic uint8_t ALIGNED4 app_test_recv_buff[USB_AUDIO_RECV_BUFF_SIZE];\nstatic uint8_t ALIGNED4 app_test_send_buff[USB_AUDIO_SEND_BUFF_SIZE];\n#endif\n\nuint32_t pcm_1ksin_more_data(uint8_t *buf, uint32_t len) {\n static uint32_t nextPbufIdx = 0;\n uint32_t remain_size = len;\n uint32_t curr_size = 0;\n static uint32_t pcm_preIrqTime = 0;\n ;\n uint32_t stime = 0;\n\n stime = hal_sys_timer_get();\n TRACE(3, \"pcm_1ksin_more_data irqDur:%d readbuff:0x%08x %d\\n \",\n TICKS_TO_MS(stime - pcm_preIrqTime), buf, len);\n pcm_preIrqTime = stime;\n\n // TRACE(2,\"[pcm_1ksin_more_data] len=%d nextBuf:%d\\n\", len, nextPbufIdx);\n if (remain_size > sizeof(sinwave)) {\n do {\n if (nextPbufIdx) {\n curr_size = sizeof(sinwave) - nextPbufIdx;\n memcpy(buf, &sinwave[nextPbufIdx / 2], curr_size);\n remain_size -= curr_size;\n nextPbufIdx = 0;\n } else if (remain_size > sizeof(sinwave)) {\n memcpy(buf + curr_size, sinwave, sizeof(sinwave));\n curr_size += sizeof(sinwave);\n remain_size -= sizeof(sinwave);\n } else {\n memcpy(buf + curr_size, sinwave, remain_size);\n nextPbufIdx = remain_size;\n remain_size = 0;\n }\n } while (remain_size);\n } else {\n if ((sizeof(sinwave) - nextPbufIdx) >= len) {\n memcpy(buf, &sinwave[nextPbufIdx / 2], len);\n nextPbufIdx += len;\n } else {\n curr_size = sizeof(sinwave) - nextPbufIdx;\n memcpy(buf, &sinwave[nextPbufIdx / 2], curr_size);\n nextPbufIdx = len - curr_size;\n memcpy(buf + curr_size, sinwave, nextPbufIdx);\n }\n }\n\n return 0;\n}\n\nuint32_t pcm_mute_more_data(uint8_t *buf, uint32_t len) {\n memset(buf, 0, len);\n return 0;\n}\n\nvoid da_output_sin1k(bool on) {\n static bool isRun = false;\n struct AF_STREAM_CONFIG_T stream_cfg;\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n if (isRun == on)\n return;\n else\n isRun = on;\n TRACE(2, \"%s %d\\n\", __func__, on);\n\n if (on) {\n stream_cfg.bits = AUD_BITS_16;\n stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n stream_cfg.sample_rate = AUD_SAMPRATE_44100;\n\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n stream_cfg.vol = 16;\n\n stream_cfg.handler = pcm_1ksin_more_data;\n stream_cfg.data_ptr = app_test_playback_buff;\n stream_cfg.data_size = APP_TEST_PLAYBACK_BUFF_SIZE;\n\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n } else {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n }\n}\n\nvoid da_tester(uint8_t on) { da_output_sin1k(on); }\n\nextern int voicecvsd_audio_init(void);\nextern uint32_t voicecvsd_audio_more_data(uint8_t *buf, uint32_t len);\nextern int get_voicecvsd_buffer_size(void);\nextern int store_voice_pcm2cvsd(unsigned char *buf, unsigned int len);\n\nstatic uint32_t pcm_data_capture(uint8_t *buf, uint32_t len) {\n uint32_t stime, etime;\n static uint32_t preIrqTime = 0;\n\n stime = hal_sys_timer_get();\n // audio_buffer_set_stereo2mono_16bits(buf, len, 1);\n audio_buffer_set(buf, len);\n etime = hal_sys_timer_get();\n TRACE(4, \"%s irqDur:%d fsSpend:%d, Len:%d\", __func__,\n TICKS_TO_MS(stime - preIrqTime), TICKS_TO_MS(etime - stime), len);\n preIrqTime = stime;\n return 0;\n}\n\nstatic uint32_t pcm_data_playback(uint8_t *buf, uint32_t len) {\n uint32_t stime, etime;\n static uint32_t preIrqTime = 0;\n stime = hal_sys_timer_get();\n // audio_buffer_get_mono2stereo_16bits(buf, len);\n audio_buffer_get(buf, len);\n etime = hal_sys_timer_get();\n TRACE(4, \"%s irqDur:%d fsSpend:%d, Len:%d\", __func__,\n TICKS_TO_MS(stime - preIrqTime), TICKS_TO_MS(etime - stime), len);\n preIrqTime = stime;\n return 0;\n}\n\nuint32_t pcm_cvsd_data_capture(uint8_t *buf, uint32_t len) {\n uint32_t stime, etime;\n static uint32_t preIrqTime = 0;\n\n // TRACE(1,\"%s enter\", __func__);\n stime = hal_sys_timer_get();\n len >>= 1;\n audio_stereo2mono_16bits(0, (uint16_t *)buf, (uint16_t *)buf, len);\n store_voice_pcm2cvsd(buf, len);\n etime = hal_sys_timer_get();\n TRACE(4, \"%s exit irqDur:%d fsSpend:%d, add:%d\", __func__,\n TICKS_TO_MS(stime - preIrqTime), TICKS_TO_MS(etime - stime), len);\n preIrqTime = stime;\n return 0;\n}\n\nuint32_t pcm_cvsd_data_playback(uint8_t *buf, uint32_t len) {\n int n;\n uint32_t stime, etime;\n static uint32_t preIrqTime = 0;\n\n // TRACE(1,\"%s enter\", __func__);\n stime = hal_sys_timer_get();\n pcm_1ksin_more_data(buf, len);\n voicecvsd_audio_more_data(buf, len);\n n = get_voicecvsd_buffer_size();\n etime = hal_sys_timer_get();\n TRACE(5, \"%s exit irqDur:%d fsSpend:%d, get:%d remain:%d\", __func__,\n TICKS_TO_MS(stime - preIrqTime), TICKS_TO_MS(etime - stime), len, n);\n preIrqTime = stime;\n return 0;\n}\n\nvoid adc_looptester(bool on, enum AUD_IO_PATH_T input_path,\n enum AUD_SAMPRATE_T sample_rate) {\n struct AF_STREAM_CONFIG_T stream_cfg;\n\n static bool isRun = false;\n\n if (isRun == on)\n return;\n else\n isRun = on;\n\n if (on) {\n audio_buffer_init();\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n stream_cfg.bits = AUD_BITS_16;\n stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n stream_cfg.sample_rate = sample_rate;\n\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = input_path;\n stream_cfg.vol = 0x03;\n\n stream_cfg.handler = pcm_data_capture;\n\n stream_cfg.data_ptr = app_test_capture_buff;\n stream_cfg.data_size = APP_TEST_CAPTURE_BUFF_SIZE;\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n\n stream_cfg.handler = pcm_data_playback;\n stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n\n stream_cfg.data_ptr = app_test_playback_buff;\n stream_cfg.data_size = APP_TEST_PLAYBACK_BUFF_SIZE;\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n } else {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n }\n}\n\n#if defined(APP_TEST_AUDIO) && defined(ANC_APP)\nvoid app_anc_usb_init(void) {\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_52M);\n\n anc_usb_app_init(AUD_INPUT_PATH_MAINMIC, AUD_SAMPRATE_96000,\n AUD_SAMPRATE_192000);\n\n struct USB_AUDIO_BUF_CFG cfg;\n\n memset(&cfg, 0, sizeof(cfg));\n cfg.play_buf = app_test_playback_buff;\n cfg.play_size = USB_AUDIO_PLAYBACK_BUFF_SIZE;\n cfg.cap_buf = app_test_capture_buff;\n cfg.cap_size = USB_AUDIO_CAPTURE_BUFF_SIZE;\n cfg.recv_buf = app_test_recv_buff;\n cfg.recv_size = USB_AUDIO_RECV_BUFF_SIZE;\n cfg.send_buf = app_test_send_buff;\n cfg.send_size = USB_AUDIO_SEND_BUFF_SIZE;\n\n usb_audio_app_init(&cfg);\n\n // dualadc_audio_app_init(app_test_playback_buff,\n // USB_AUDIO_PLAYBACK_BUFF_SIZE, app_test_capture_buff,\n // USB_AUDIO_CAPTURE_BUFF_SIZE);\n}\n#endif\n" }, { "path": "apps/apptester/app_audtest.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_AUDTEST_H__\n#define __APP_AUDTEST_H__\n\n#include \"audioflinger.h\"\nvoid da_output_sin1k(bool on);\nvoid adc_looptester(bool on, uint8_t mode, enum AUD_SAMPRATE_T sample_rate);\n\n#endif\n" }, { "path": "apps/apptester/app_audtest_pattern.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_AUDTEST_PATTERN_H__\n#define __APP_AUDTEST_PATTERN_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define CODEC_TESTMODE (1)\n#define CODEC_1KSIN (1)\n#define CODEC_WHITENOISE (2)\n\n#define CODEC_SAMPLERATE (44100)\n\n#if (CODEC_SAMPLERATE == 48000)\n\n#if (CODEC_TESTMODE == CODEC_1KSIN)\nconst int16_t sinwave[] = {\n\t0\t ,\n\t0\t ,\n\t4234 ,\n\t4234 ,\n\t8396 ,\n\t8396 ,\n\t12414 ,\n\t12414 ,\n\t16220 ,\n\t16220 ,\n\t19748 ,\n\t19748 ,\n\t22938 ,\n\t22938 ,\n\t25736 ,\n\t25736 ,\n\t28094 ,\n\t28094 ,\n\t29970 ,\n\t29970 ,\n\t31334 ,\n\t31334 ,\n\t32162 ,\n\t32162 ,\n\t32440 ,\n\t32440 ,\n\t32162 ,\n\t32162 ,\n\t31334 ,\n\t31334 ,\n\t29970 ,\n\t29970 ,\n\t28094 ,\n\t28094 ,\n\t25736 ,\n\t25736 ,\n\t22938 ,\n\t22938 ,\n\t19748 ,\n\t19748 ,\n\t16220 ,\n\t16220 ,\n\t12414 ,\n\t12414 ,\n\t8396 ,\n\t8396 ,\n\t4234 ,\n\t4234 ,\n\t0\t ,\n\t0\t ,\n\t-4234 ,\n\t-4234 ,\n\t-8396 ,\n\t-8396 ,\n\t-12414 ,\n\t-12414 ,\n\t-16220 ,\n\t-16220 ,\n\t-19748 ,\n\t-19748 ,\n\t-22938 ,\n\t-22938 ,\n\t-25736 ,\n\t-25736 ,\n\t-28094 ,\n\t-28094 ,\n\t-29970 ,\n\t-29970 ,\n\t-31334 ,\n\t-31334 ,\n\t-32162 ,\n\t-32162 ,\n\t-32440 ,\n\t-32440 ,\n\t-32162 ,\n\t-32162 ,\n\t-31334 ,\n\t-31334 ,\n\t-29970 ,\n\t-29970 ,\n\t-28094 ,\n\t-28094 ,\n\t-25736 ,\n\t-25736 ,\n\t-22938 ,\n\t-22938 ,\n\t-19748 ,\n\t-19748 ,\n\t-16220 ,\n\t-16220 ,\n\t-12414 ,\n\t-12414 ,\n\t-8396 ,\n\t-8396 ,\n\t-4234 ,\n\t-4234\n};\n#elif (CODEC_TESTMODE == CODEC_WHITENOISE)\nconst int16_t sinwave[] = {\n-15137 , \n5197 ,\n29897 ,\n7339 ,\n26187 ,\n-16625 ,\n1465 ,\n20867 ,\n5873 ,\n11597 ,\n-4271 ,\n11251 ,\n-2911 ,\n-4837 ,\n22165 ,\n-10965 ,\n23733 ,\n-31833 ,\n25389 ,\n23105 ,\n-8851 ,\n13419 ,\n-29179 ,\n16799 ,\n-18493 ,\n-19735 ,\n31841 ,\n14091 ,\n2509 ,\n-18723 ,\n-16523 ,\n1551 ,\n14723 ,\n-5375 ,\n20603 ,\n-25865 ,\n-18393 ,\n11831 ,\n8529 ,\n16975 ,\n-18917 ,\n-24759 ,\n-26227 ,\n-8495 ,\n-8403 ,\n27429 ,\n22549 ,\n19941 ,\n-18561 ,\n-10873 ,\n4407 ,\n-19825 ,\n-20269 ,\n29757 ,\n-7871 ,\n-8461 ,\n-28565 ,\n5343 ,\n-5221 ,\n-27577 ,\n15707 ,\n17663 ,\n-24995 ,\n-11955 ,\n-28831 ,\n-2841 ,\n29287 ,\n-6333 ,\n13895 ,\n11471 ,\n32764 ,\n-29337 ,\n20909 ,\n19607 ,\n-16431 ,\n-21783 ,\n-11927 ,\n-12805 ,\n20659 ,\n3939 ,\n13919 ,\n335 ,\n-26221 ,\n-11823 ,\n-13355 ,\n-17223 ,\n-24539 ,\n-29173 ,\n-3757 ,\n30173 ,\n27637 ,\n14519 ,\n-29459 ,\n-16859 ,\n-12805 ,\n-15927 ,\n15917 ,\n-26257 ,\n25791 ,\n15739 ,\n26967 ,\n-22713 ,\n13543 ,\n-13381 ,\n-19627 ,\n-26975 ,\n-20917 ,\n-2517 ,\n1537 ,\n-9203 ,\n30109 ,\n-17253 ,\n-19199 ,\n8819 ,\n-13709 ,\n2043 ,\n-9439 ,\n28235 ,\n-7709 ,\n-17451 ,\n-30677 ,\n27473 ,\n3485 ,\n7751 ,\n-10441 ,\n-9023 ,\n1919 ,\n-12681 ,\n-31341 ,\n-22517 ,\n14771 ,\n401 ,\n8715 ,\n29201 ,\n23363 ,\n15929 ,\n27847 ,\n18139 ,\n14637 ,\n20103 ,\n-87 ,\n17357 ,\n1029 ,\n-24453 ,\n-10471 ,\n-17309 ,\n-1529 ,\n-13063 ,\n-11417 ,\n-11929 ,\n-14935 ,\n32067 ,\n-13661 ,\n-3411 ,\n26819 ,\n26345 ,\n17127 ,\n17217 ,\n3095 ,\n-27069 ,\n27975 ,\n22569 ,\n-29839 ,\n-16523 ,\n30991 ,\n18843 ,\n5695 ,\n-12845 ,\n-10319 ,\n-29005 ,\n-17241 ,\n27115 ,\n-30451 ,\n-25687 ,\n16667 ,\n-21007 ,\n2131 ,\n-17779 ,\n1661 ,\n-16193 ,\n-3753 ,\n5757 ,\n29353 ,\n-28859 ,\n-2455 ,\n29021 ,\n-25189 ,\n23691 ,\n16047 ,\n31765 ,\n-23307 ,\n24609 ,\n-15115 ,\n18745 ,\n31787 ,\n11029 ,\n-12521 ,\n-11689 ,\n-28401 ,\n2937 ,\n5571 ,\n1947 ,\n7399 ,\n9801 ,\n-19231 ,\n25105 ,\n31245 ,\n32752 ,\n31843 ,\n28769 ,\n22021 ,\n-21703 ,\n-18013 ,\n22009 ,\n6163 ,\n22219 ,\n4401 ,\n-19243 ,\n21583 ,\n28961 ,\n-32453 ,\n-1619 ,\n-23735 ,\n6909 ,\n9297 ,\n-32083 ,\n-18927 ,\n8293 ,\n-13103 ,\n-26445 ,\n-291 ,\n12315 ,\n4269 ,\n-19713 ,\n-14819 ,\n-30319 ,\n-8749 ,\n-649 ,\n1037 ,\n22885 ,\n12023 ,\n-26289 ,\n-10541 ,\n31833 ,\n-1801 ,\n-28593 ,\n-4843 ,\n-7995 ,\n-5975 ,\n-3451 ,\n-17131 ,\n16023 ,\n2365 ,\n5755 ,\n-8127 ,\n24009 ,\n-5367 ,\n29683 ,\n27473 ,\n-23727 ,\n25323 ,\n4383 ,\n-25889 ,\n7335 ,\n31263 ,\n-1453 ,\n-21381 ,\n-15949 ,\n-22895 ,\n-17335 ,\n15433 ,\n9539 ,\n-7233 ,\n22729 ,\n-239 ,\n19469 ,\n-15355 ,\n-21011 ,\n12513 ,\n-7647 ,\n4739 ,\n-14373 ,\n-28647 ,\n-31009 ,\n7525 ,\n5357 ,\n15629 ,\n26483 ,\n16589 ,\n-2949 ,\n22043 ,\n-8245 ,\n-13799 ,\n-26613 ,\n-22463 ,\n23057 ,\n-13367 ,\n-20729 ,\n19505 ,\n9373 ,\n-1585 ,\n-11017 ,\n-30733 ,\n30329 ,\n9835 ,\n14907 ,\n-13067 ,\n23113 ,\n30589 ,\n32581 ,\n10917 ,\n-18477 ,\n-5013 ,\n14919 ,\n3467 ,\n13289 ,\n19557 ,\n8051 ,\n-23841 ,\n7919 ,\n5453 ,\n17335 ,\n-18271 ,\n10691 ,\n-31991 ,\n29161 ,\n29235 ,\n6469 ,\n18267 ,\n2695 ,\n-22163 ,\n12355 ,\n2619 ,\n26097 ,\n21561 ,\n-30731 ,\n19115 ,\n12571 ,\n-14677 ,\n3833 ,\n-18415 ,\n-17211 ,\n10643 ,\n26311 ,\n-25581 ,\n-18631 ,\n-611 ,\n22437 ,\n27881 ,\n18559 ,\n743 ,\n4905 ,\n8249 ,\n2325 ,\n23827 ,\n-727 ,\n22123 ,\n-13529 ,\n19431 ,\n13109 ,\n-2425 ,\n-20921 ,\n20577 ,\n-30063 ,\n21125 ,\n30121 ,\n5709 ,\n15529 ,\n27695 ,\n-26413 ,\n-1437 ,\n-1521 ,\n29293 ,\n1757 ,\n-31527 ,\n-25617 ,\n3883 ,\n5155 ,\n-20353 ,\n11267 ,\n-25179 ,\n-30081 ,\n22099 ,\n31507 ,\n-7871 ,\n21509 ,\n-27233 ,\n-533 ,\n21743 ,\n-18379 ,\n-28531 ,\n10449 ,\n-21767 ,\n-23625 ,\n21819 ,\n377 ,\n-27299 ,\n-3443 ,\n19295 ,\n8069 ,\n28327 ,\n13527 ,\n-433 ,\n-11397 ,\n-9403 ,\n-6659 ,\n-25687 ,\n-21447 ,\n-1179 ,\n-29069 ,\n-417 ,\n4849 ,\n17733 ,\n-14365 ,\n-25003 ,\n13725 ,\n-24555 ,\n-25607 ,\n15479 ,\n-2051 ,\n-10427 ,\n13701 ,\n-23725 ,\n8967 ,\n-413 ,\n23619 ,\n21549 ,\n-29973 ,\n-8845 ,\n-19697 ,\n30877 ,\n25465 ,\n-573 ,\n12437 ,\n-3937 ,\n31533 ,\n28485 ,\n-13673 ,\n-10959 ,\n-27495 ,\n-8595 ,\n-13415 ,\n18287 ,\n-27039 ,\n4733 ,\n-13539 ,\n-7141 ,\n-13897 ,\n27749 ,\n-16291 ,\n-19511 ,\n-8373 ,\n32285 ,\n10117 ,\n-4245 ,\n-3381 ,\n21111 ,\n-20129 ,\n29031 ,\n17621 ,\n32119 ,\n30109 ,\n11063 ,\n-7307 ,\n-29389 ,\n8063 ,\n30593 ,\n-1771 ,\n-3295 ,\n3353 ,\n-24413 ,\n-1541 ,\n-523 ,\n-9979 ,\n29661 ,\n26691 ,\n-1031 ,\n18075 ,\n14551 ,\n26191 ,\n7649 ,\n2215 ,\n-6713 ,\n-12345 ,\n12839 ,\n23205 ,\n-6141 ,\n4361 ,\n-12063 ,\n-7047 ,\n22807 ,\n29995 ,\n4121 ,\n-8025 ,\n-1951 ,\n8807 ,\n22695 ,\n-765 ,\n-16091 ,\n32033 ,\n29575 ,\n-4619 ,\n29999 ,\n10577 ,\n26543 ,\n11305 ,\n-3109 ,\n25223 ,\n16493 ,\n-11059 ,\n-19015 ,\n-7591 ,\n21563 ,\n9281 ,\n17569 ,\n3425 ,\n9237 ,\n-31913 ,\n2125 ,\n-24909 ,\n27477 ,\n-24829 ,\n16237 ,\n-30247 ,\n30731 ,\n-32099 ,\n32069 ,\n19265 ,\n25553 ,\n11409 ,\n-31809 ,\n24387 ,\n17703 ,\n-27241 ,\n-11773 ,\n6027 ,\n-3767 ,\n-23947 ,\n-16489 ,\n-30947 ,\n26247 ,\n-2011 ,\n31727 ,\n-17215 ,\n30495 ,\n10911 ,\n-13691 ,\n1031 ,\n-13165 ,\n15879 ,\n-11401 ,\n25785 ,\n-9345 ,\n-3477 ,\n-8035 ,\n6353 ,\n-8199 ,\n-11791 ,\n24345 ,\n12533 ,\n31325 ,\n31129 ,\n-645 ,\n8043 ,\n1199 ,\n5237 ,\n15953 ,\n24985 ,\n14449 ,\n-32427 ,\n22339 ,\n-13 ,\n15607 ,\n6929 ,\n-19287 ,\n7289 ,\n-18879 ,\n-25809 ,\n-1627 ,\n18349 ,\n-5037 ,\n3883 ,\n-11085 ,\n-11253 ,\n-23789 ,\n22561 ,\n-32559 ,\n-8189 ,\n-17771 ,\n11537 ,\n19207 ,\n20077 ,\n12287 ,\n6029 ,\n-2935 ,\n25993 ,\n-26925 ,\n25337 ,\n18759 ,\n19563 ,\n-23845 ,\n30269 ,\n-15601 ,\n7933 ,\n-9619 ,\n-28671 ,\n-28391 ,\n-12175 ,\n2381 ,\n23905 ,\n-9169 ,\n-27585 ,\n-29689 ,\n25389 ,\n-24783 ,\n1431 ,\n3007 ,\n-20073 ,\n-5057 ,\n-15011 ,\n-15727 ,\n-9619 ,\n-2491 ,\n-14689 ,\n-8093 ,\n-24101 ,\n-18661 ,\n397 ,\n10305 ,\n24983 ,\n-30185 ,\n-15121 ,\n24117 ,\n-26981 ,\n-27863 ,\n24103 ,\n-25191 ,\n-28315 ,\n19055 ,\n20377 ,\n12279 ,\n-16217 ,\n1107 ,\n-12881 ,\n-933 ,\n-29055 ,\n-12769 ,\n-17839 ,\n10035 ,\n18489 ,\n30483 ,\n-10541 ,\n-1383 ,\n2167 ,\n7679 ,\n25721 ,\n-20675 ,\n7155 ,\n7007 ,\n-5275 ,\n11689 ,\n-10051 ,\n-24593 ,\n24601 ,\n24623 ,\n24543 ,\n-8255 ,\n24419 ,\n11563 ,\n16815 ,\n8665 ,\n-18209 ,\n-19989 ,\n31855 ,\n-29627 ,\n-19 ,\n-10749 ,\n-12907 ,\n1199 ,\n23333 ,\n-12513 ,\n-12933 ,\n-643 ,\n19025 ,\n-21151 ,\n-12899 ,\n-30875 ,\n-25879 ,\n-30663 ,\n-3769 ,\n32647 ,\n17155 ,\n25531 ,\n30939 ,\n12801 ,\n23253 ,\n26233 ,\n-18565 ,\n18699 ,\n-4961 ,\n30675 ,\n-21683 ,\n24713 ,\n-11467 ,\n-8483 ,\n-20437 ,\n5681 ,\n24297 ,\n-1621 ,\n17627 ,\n-4593 ,\n-1787 ,\n-23245 ,\n23245 ,\n-7249 ,\n32201 ,\n28055 ,\n10319 ,\n-85 ,\n-31519 ,\n7947 ,\n-2747 ,\n-13885 ,\n20567 ,\n-12503 ,\n-9631 ,\n-4227 ,\n-26093 ,\n-2365 ,\n-5411 ,\n-2255 ,\n-2097 ,\n-19391 ,\n-16207 ,\n22447 ,\n3467 ,\n-12677 ,\n-7353 ,\n-13241 ,\n18065 ,\n-28665 ,\n191 ,\n15729 ,\n19681 ,\n4895 ,\n29085 ,\n5593 ,\n-2261 ,\n5609 ,\n-257 ,\n23547 ,\n-6831 ,\n-4255 ,\n25439 ,\n26689 ,\n-31919 ,\n-17249 ,\n32193 ,\n-28783 ,\n-21817 ,\n24253 ,\n-20617 ,\n-26007 ,\n-25889 ,\n24869 ,\n23623 ,\n24697 ,\n32465 ,\n24691 ,\n1335 ,\n24761 ,\n15063 ,\n2501 ,\n-2635 ,\n-20989 ,\n-18521 ,\n19091 ,\n-1189 ,\n2089 ,\n25703 ,\n-14069 ,\n8219 ,\n31115 ,\n10025 ,\n15595 ,\n-8447 ,\n20787 ,\n29665 ,\n-16177 ,\n-13461 ,\n-11923 ,\n-15905 ,\n-19433 ,\n8885 ,\n27359 ,\n6081 ,\n17713 ,\n16515 ,\n-9193 ,\n-6665 ,\n15481 ,\n28009 ,\n3511 ,\n-6229 ,\n8085 ,\n45 ,\n759 ,\n16971 ,\n17727 ,\n18807 ,\n-18737 ,\n-25747 ,\n-3669 ,\n16915 ,\n15749 ,\n23897 ,\n4953 ,\n29599 ,\n711 ,\n-7689 ,\n-18327 ,\n5067 ,\n31813 ,\n-17335 ,\n-11135 ,\n-13813 ,\n10435 ,\n-10139 ,\n28433 ,\n6101 ,\n13243 ,\n-22037 ,\n-11717 ,\n-9393 ,\n-27281 ,\n8445 ,\n-11737 ,\n-7019 ,\n1917 ,\n-25159 ,\n-15149 ,\n5475 ,\n-23041 ,\n-26069 ,\n17017 ,\n855 ,\n-27361 ,\n17103 ,\n18009 ,\n-27481 ,\n-31953 ,\n-19071 ,\n-14305 ,\n-28843 ,\n24387 ,\n7927 ,\n26027 ,\n-27927 ,\n7239 ,\n28347 ,\n13687 ,\n29865 ,\n-10091 ,\n-9823 ,\n22889 ,\n30295 ,\n16913 ,\n-7491 ,\n27179 ,\n20317 ,\n-28989 ,\n8931 ,\n21247 ,\n-32627 ,\n-7709 ,\n-31085 ,\n-18907 ,\n-5543 ,\n30085 ,\n14973 ,\n29087 ,\n7563 ,\n24731 ,\n-399 ,\n23709 ,\n24183 ,\n20893 ,\n5849 ,\n-10939 ,\n-11589 ,\n5531 ,\n-27469 ,\n14101 ,\n-11917 ,\n17363 ,\n11269 ,\n-11853 ,\n-12815 ,\n-6703 ,\n20699 ,\n30801 ,\n-11019 ,\n29689 ,\n-11591 ,\n16757 ,\n5221 ,\n-335 ,\n-20843 ,\n-28833 ,\n25991 ,\n-9241 ,\n20307 ,\n-1829 ,\n20921 ,\n-20167 ,\n-2889 ,\n10903 ,\n-30301 ,\n12927 ,\n30943 ,\n22785 ,\n18165 ,\n27885 ,\n11323 ,\n23191 ,\n-28509 ,\n-2393 ,\n9 ,\n713 ,\n-9841 ,\n-9511 ,\n-18619 ,\n-10935 ,\n-3633 ,\n-26031 ,\n22057 ,\n-22047 ,\n-15779 ,\n6293 ,\n-30687 ,\n22743 ,\n-13485 ,\n-12937 ,\n13377 ,\n1977 ,\n-9055 ,\n4921 ,\n-1981 ,\n11963 ,\n325 ,\n-5863 ,\n-15881 ,\n-4469 ,\n5383 ,\n621 ,\n16197 ,\n-12623 ,\n-859 ,\n31295 ,\n23707 ,\n31837 ,\n-1889 ,\n863 ,\n-30227 ,\n-24125 ,\n2647 ,\n-4869 ,\n-473 ,\n28149 ,\n-7197 ,\n-11329 ,\n-20185 ,\n-6851 ,\n23083 ,\n22373 ,\n17463 ,\n-28181 ,\n-11851 ,\n-21299 ,\n-28413 ,\n-21065 ,\n-25133 ,\n25757 ,\n5909 ,\n23447 ,\n-13731 ,\n15951 ,\n-63 ,\n2577 ,\n18413 ,\n24525 ,\n-3921 ,\n-27109 ,\n-3439 ,\n-13937 ,\n25795 ,\n18031 ,\n27395 ,\n24357 ,\n-15457 ,\n14179 ,\n14951 ,\n23649 ,\n-4203 ,\n20289 ,\n14463 ,\n-28961 ,\n-32221 ,\n21281 ,\n-21407 ,\n11301 ,\n28395 ,\n13375 ,\n8119 ,\n-25541 ,\n17701 ,\n11729 ,\n23659 ,\n4287 ,\n-14433 ,\n-13467 ,\n-29461 ,\n16513 ,\n4913 ,\n28597 ,\n-2347 ,\n8089 ,\n2999 ,\n29693 ,\n18493 ,\n-5119 ,\n18307 ,\n30679 ,\n-4263 ,\n26283 ,\n12637 ,\n-1645 ,\n29887 ,\n-28393 ,\n-26375 ,\n-12531 ,\n20505 ,\n-14481 ,\n27111 ,\n-26879 ,\n12133 ,\n-28895 ,\n-16103 ,\n-17683 ,\n10399 ,\n-3603 ,\n6351 ,\n6497 ,\n-12789 ,\n-17015 ,\n-15595 ,\n-3875 ,\n-25379 ,\n32687 ,\n27321 ,\n8989 ,\n-16775 ,\n-26945 ,\n-11581 ,\n26885 ,\n-27605 ,\n11979 ,\n-29585 ,\n-28955 ,\n1373 ,\n-31941 ,\n-9307 ,\n20827 ,\n2125 ,\n15581 ,\n-32279 ,\n-3411 ,\n23883 ,\n17537 ,\n-22559 ,\n8343 ,\n-2965 ,\n-7669 ,\n-25281 ,\n17075 ,\n-2623 ,\n-32748 ,\n-22713 ,\n-14017 ,\n-7145 ,\n-5119 ,\n-27209 ,\n-27519 ,\n-11739 ,\n27277 ,\n22095 ,\n3227 ,\n8779 ,\n30963 ,\n16059 ,\n483 ,\n-14137 ,\n-28035 ,\n17689 ,\n-4675 ,\n-30613 ,\n-11617 ,\n-8479 ,\n-21519 ,\n8665 ,\n-13431 ,\n-16789 ,\n17539 ,\n-4803 ,\n26953 ,\n9953 ,\n-8693 ,\n-10629 ,\n14679 ,\n3767 ,\n28813 ,\n13301 ,\n-4419 ,\n-14173 ,\n20693 ,\n28595 ,\n31387 ,\n27413 ,\n11337 ,\n-1237 ,\n-28335 ,\n-20943 ,\n-29375 ,\n-31379 ,\n-3059 ,\n30787 ,\n32742 ,\n-5149 ,\n22243 ,\n-12099 ,\n28545 ,\n-8831 ,\n15211 ,\n29099 ,\n-11169 ,\n-22395 ,\n-26667 ,\n-20569 ,\n-13799 ,\n10923 ,\n-23937 ,\n-4007 ,\n9849 ,\n23523 ,\n-26091 ,\n26477 ,\n10445 ,\n27537 ,\n-7653 ,\n21001 ,\n22973 ,\n-6087 ,\n19479 ,\n26815 ,\n-19541 ,\n-5695 ,\n-6887 ,\n-16361 ,\n-21631 ,\n-18907 ,\n8153 ,\n-12431 ,\n12811 ,\n-10063 ,\n-19627 ,\n-10611 ,\n17883 ,\n9139 ,\n1503 ,\n22907 ,\n11661 ,\n-27457 ,\n31931 ,\n-5349 ,\n-3407 ,\n-27819 ,\n-30665 ,\n-507 ,\n13589 ,\n-32209 ,\n-15299 ,\n-3049 ,\n-4437 ,\n6885 ,\n1395 ,\n9305 ,\n16341 ,\n-29647 ,\n-21807 ,\n3969 ,\n-9153 ,\n-11613 ,\n2995 ,\n31465 ,\n12353 ,\n17369 ,\n23161 ,\n-22013 ,\n-10585 ,\n-15303 ,\n-11367 ,\n28243 ,\n30487 ,\n-24793 ,\n-28355 ,\n17899 ,\n-23325 ,\n31163 ,\n-9387 ,\n16475 ,\n-10655 ,\n22525 ,\n19503 ,\n-7631 ,\n3265 ,\n11423 ,\n-24169 ,\n-16661 ,\n17515 ,\n-5331 ,\n-28057 ,\n371 ,\n17875 ,\n-27445 ,\n-32607 ,\n-25833 ,\n-4401 ,\n14187 ,\n24583 ,\n20733 ,\n-29581 ,\n22405 ,\n-22221 ,\n24605 ,\n23911 ,\n-17325 ,\n-20171 ,\n-4165 ,\n-11069 ,\n5761 ,\n15773 ,\n2653 ,\n-19105 ,\n31085 ,\n-21213 ,\n21829 ,\n-25169 ,\n7897 ,\n-29517 ,\n15975 ,\n7201 ,\n27943 ,\n-3829 ,\n-10019 ,\n-7189 ,\n-18419 ,\n27857 ,\n8171 ,\n14951 ,\n-19499 ,\n-1235 ,\n-10135 ,\n13551 ,\n4873 ,\n-18723 ,\n-14137 ,\n-8401 ,\n18101 ,\n-18991 ,\n32635 ,\n-7681 ,\n-9957 ,\n-7871 ,\n24575 ,\n-15683 ,\n23277 ,\n8775 ,\n11847 ,\n21285 ,\n23297 ,\n-17675 ,\n-12099 ,\n27045 ,\n24717 ,\n9195 ,\n-32593 ,\n31287 ,\n24539 ,\n18037 ,\n8533 ,\n10169 ,\n-24185 ,\n27419 ,\n-2757 ,\n26059 ,\n-27599 ,\n-19259 ,\n27203 ,\n17179 ,\n-32581 ,\n-32703 ,\n13337 ,\n-3001 ,\n-26375 ,\n-32655 ,\n27949 ,\n14127 ,\n22767 ,\n-4403 ,\n-2525 ,\n-22829 ,\n-19833 ,\n-22385 ,\n-13349 ,\n6055 ,\n-1073 ,\n-28615 ,\n-29735 ,\n-27547 ,\n6051 ,\n3003 ,\n-8381 ,\n4983 ,\n-12047 ,\n-2299 ,\n1119 ,\n31927 ,\n-8079 ,\n-7397 ,\n11905 ,\n6109 ,\n-27435 ,\n-1609 ,\n-2935 ,\n-1205 ,\n-27257 ,\n23899 ,\n-31271 ,\n-27805 ,\n-18465 ,\n24037 ,\n-8755 ,\n-9621 ,\n24285 ,\n22959 ,\n-21069 ,\n22743 ,\n23901 ,\n-23773 ,\n13641 ,\n-31191 ,\n-11563 ,\n17109 ,\n-15959 ,\n-23987 ,\n-1403 ,\n-4587 ,\n2759 ,\n-24733 ,\n25913 ,\n2577 ,\n10097 ,\n13351 ,\n-27275 ,\n4963 ,\n20407 ,\n-20805 ,\n30265 ,\n16943 ,\n9713 ,\n-24567 ,\n-23503 ,\n-15683 ,\n-16847 ,\n-2151 ,\n369 ,\n23175 ,\n7223 ,\n-22557 ,\n-29783 ,\n-11813 ,\n24561 ,\n27441 ,\n-4893 ,\n-1551 ,\n22643 ,\n-16147 ,\n-16719 ,\n-22655 ,\n-19101 ,\n-17535 ,\n-2059 ,\n31191 ,\n-28925 ,\n-18779 ,\n32009 ,\n-14733 ,\n31893 ,\n-29113 ,\n19069 ,\n-32479 ,\n-3735 ,\n28113 ,\n12885 ,\n30855 ,\n6207 ,\n-12273 ,\n-23629 ,\n-16571 ,\n-6829 ,\n-14463 ,\n29985 ,\n-26223 ,\n-26943 ,\n10029 ,\n10553 ,\n-14527 ,\n23443 ,\n-23543 ,\n-23065 ,\n-32139 ,\n22819 ,\n-31043 ,\n-10727 ,\n2715 ,\n-14555 ,\n1547 ,\n11777 ,\n5145 ,\n23059 ,\n-7777 ,\n-30267 ,\n-2979 ,\n-19411 ,\n21867 ,\n24247 ,\n-7567 ,\n5355 ,\n-641 ,\n-18667 ,\n9243 ,\n-265 ,\n-15781 ,\n-4041 ,\n32627 ,\n3241 ,\n26063 ,\n-19635 ,\n-14091 ,\n-21769 ,\n-14257 ,\n8341 ,\n-6623 ,\n-3337 ,\n32457 ,\n-23275 ,\n7309 ,\n22985 ,\n-12027 ,\n29391 ,\n1411 ,\n28449 ,\n-18317 ,\n4991 ,\n-493 ,\n25135 ,\n-2169 ,\n3531 ,\n27563 ,\n-31453 ,\n-7787 ,\n5381 ,\n-21191 ,\n-30953 ,\n-5341 ,\n-17575 ,\n4275 ,\n-25447 ,\n-25917 ,\n7817 ,\n-23237 ,\n20115 ,\n-3475 ,\n-30933 ,\n16823 ,\n10189 ,\n-5801 ,\n29269 ,\n-26655 ,\n-1825 ,\n3655 ,\n-543 ,\n-21533 ,\n-5457 ,\n-5517 ,\n12059 ,\n-30603 ,\n5983 ,\n15573 ,\n3071 ,\n-30871 ,\n-7723 ,\n-23035 ,\n-269 ,\n1741 ,\n-15457 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,\n-28005 ,\n31855 ,\n23263 ,\n17843 ,\n26595 ,\n16743 ,\n22599 ,\n9237 ,\n-27085 ,\n-4789 ,\n-21197 ,\n-2091 ,\n-22201 ,\n11611 ,\n13221 ,\n-10121 ,\n-29199 ,\n1815 ,\n5523 ,\n-20157 ,\n-17173 ,\n-30985 ,\n2295 ,\n587 ,\n-16839 ,\n-15971 ,\n-24463 ,\n-8235 ,\n-25351 ,\n-24685 ,\n-30637 ,\n-6051 ,\n25533 ,\n27525 ,\n2119 ,\n26889 ,\n14691 ,\n-25869 ,\n-24233 ,\n26785 ,\n13937 ,\n-13973 ,\n8339 ,\n-12025 ,\n-29979 ,\n24127 ,\n-475 ,\n28465 ,\n3221 ,\n-11065 ,\n24801 ,\n415 ,\n-14847 ,\n7947 ,\n-24981 ,\n3411 ,\n-25169 ,\n6915 ,\n-28735 ,\n-20149 ,\n-20991 ,\n-28083 ,\n-28067 ,\n12403 ,\n25997 ,\n-17303 ,\n-29239 ,\n27175 ,\n2041 ,\n-17557 ,\n-10823 ,\n-1759 ,\n-22711 ,\n2867 ,\n16543 ,\n12541 ,\n11715 ,\n23339 ,\n19139 ,\n-19939 ,\n-28609 ,\n-13701 ,\n-25115 ,\n-13253 ,\n-16127 ,\n-319 ,\n-10935 ,\n26441 ,\n31509 ,\n3401 ,\n-10671 ,\n-21765 ,\n32289 ,\n-20793 ,\n-27235 ,\n7345 ,\n21181 ,\n-19061 ,\n-24421 ,\n27643 ,\n12113 ,\n15933 ,\n17311 ,\n-23159 ,\n5483 ,\n-27883 ,\n-23423 ,\n1189 ,\n-16497 ,\n14733 ,\n-22095 ,\n6957 ,\n30623 ,\n8869 ,\n1487 ,\n-30713 ,\n28063 ,\n30091 ,\n16323 ,\n-3041 ,\n-22753 ,\n-4895 ,\n3923 ,\n-29225 ,\n7943 ,\n15983 ,\n-6587 ,\n-17653 ,\n11769 ,\n-31401 ,\n-535 ,\n14713 ,\n-11489 ,\n9945 ,\n-16071 ,\n26055 ,\n-2681 ,\n10623 ,\n-5265 ,\n-7951 ,\n13821 ,\n30423 ,\n13087 ,\n19531 ,\n26981 ,\n-77 ,\n-9779 ,\n21489 ,\n21383 ,\n15063 ,\n-2041 ,\n-16449 ,\n-17799 ,\n-2503 ,\n-8713 ,\n-15663 ,\n27239 ,\n-3403 ,\n24709 ,\n16749 ,\n16885 ,\n16961 ,\n27363 ,\n17805 ,\n-8433 ,\n-8015 ,\n-21323 ,\n22985 ,\n1101 ,\n32481 ,\n-17259 ,\n721 ,\n20155 ,\n-1929 ,\n-30917 ,\n3949 ,\n21569 ,\n27669 ,\n25361 ,\n-2325 ,\n-15763 ,\n28181 ,\n-24505 ,\n-481 ,\n-27177 ,\n19907 ,\n-4757 ,\n23251 ,\n495 ,\n-6903 ,\n26763 ,\n3529 ,\n8541 ,\n-5447 ,\n-19267 ,\n-21719 ,\n1749 ,\n16179 ,\n-5053 ,\n-13951 ,\n18029 ,\n11179 ,\n-14557 ,\n20277 ,\n-28807 ,\n3037 ,\n-12745 ,\n22145 ,\n28387 ,\n23099 ,\n-3381 ,\n-8219 ,\n-11777 ,\n-26953 ,\n25265 ,\n2861 ,\n25061 ,\n-21 ,\n-3871 ,\n3795 ,\n20303 ,\n-26915 ,\n-5497 ,\n-23025 ,\n-22811 ,\n25899 ,\n-20319 ,\n11581 ,\n-14817 ,\n32207 ,\n-4585 ,\n9439 ,\n2199 ,\n-20401 ,\n-15797 ,\n21261 ,\n17895 ,\n26233 ,\n-18367 ,\n15221 ,\n14331 ,\n-23401 ,\n-7639 ,\n9679\n};\n#endif\n#elif (CODEC_SAMPLERATE == 44100)\n#if (CODEC_TESTMODE == CODEC_1KSIN)\nconst int16_t sinwave[] = {\n\t0\t ,\n\t0\t ,\n\t4652 ,\n\t4652 ,\n\t9211 ,\n\t9211 ,\n\t13583 ,\n\t13583 ,\n\t17679 ,\n\t17679 ,\n\t21418 ,\n\t21418 ,\n\t24722 ,\n\t24722 ,\n\t27525 ,\n\t27525 ,\n\t29771 ,\n\t29771 ,\n\t31413 ,\n\t31413 ,\n\t32419 ,\n\t32419 ,\n\t32767 ,\n\t32767 ,\n\t32452 ,\n\t32452 ,\n\t31479 ,\n\t31479 ,\n\t29868 ,\n\t29868 ,\n\t27651 ,\n\t27651 ,\n\t24875 ,\n\t24875 ,\n\t21594 ,\n\t21594 ,\n\t17876 ,\n\t17876 ,\n\t13795 ,\n\t13795 ,\n\t9435 ,\n\t9435 ,\n\t4883 ,\n\t4883 ,\n\t233 ,\n\t233 ,\n\t-4421 ,\n\t-4421 ,\n\t-8987 ,\n\t-8987 ,\n\t-13370, \n\t-13370, \n\t-17483, \n\t-17483, \n\t-21241, \n\t-21241, \n\t-24568, \n\t-24568, \n\t-27398, \n\t-27398, \n\t-29673, \n\t-29673, \n\t-31346, \n\t-31346, \n\t-32384, \n\t-32384, \n\t-32766, \n\t-32766, \n\t-32483, \n\t-32483, \n\t-31543, \n\t-31543, \n\t-29963, \n\t-29963, \n\t-27776, \n\t-27776, \n\t-25026, \n\t-25026, \n\t-21769, \n\t-21769, \n\t-18071, \n\t-18071, \n\t-14006, \n\t-14006, \n\t-9658 ,\n\t-9658 ,\n\t-5114 ,\n\t-5114 ,\n\t-466 ,\n\t-466 ,\n\t4190 ,\n\t4190 ,\n\t8762 ,\n\t8762 ,\n\t13157 ,\n\t13157 ,\n\t17285 ,\n\t17285 ,\n\t21062 ,\n\t21062 ,\n\t24413 ,\n\t24413 ,\n\t27269 ,\n\t27269 ,\n\t29573 ,\n\t29573 ,\n\t31277 ,\n\t31277 ,\n\t32347 ,\n\t32347 ,\n\t32762 ,\n\t32762 ,\n\t32513 ,\n\t32513 ,\n\t31605 ,\n\t31605 ,\n\t30057 ,\n\t30057 ,\n\t27899 ,\n\t27899 ,\n\t25176 ,\n\t25176 ,\n\t21943 ,\n\t21943 ,\n\t18265 ,\n\t18265 ,\n\t14217 ,\n\t14217 ,\n\t9881 ,\n\t9881 ,\n\t5344 ,\n\t5344 ,\n\t700 ,\n\t700 ,\n\t-3958 ,\n\t-3958 ,\n\t-8537 ,\n\t-8537 ,\n\t-12943, \n\t-12943, \n\t-17086, \n\t-17086, \n\t-20883, \n\t-20883, \n\t-24257, \n\t-24257, \n\t-27139, \n\t-27139, \n\t-29472, \n\t-29472, \n\t-31207, \n\t-31207, \n\t-32309, \n\t-32309, \n\t-32757, \n\t-32757, \n\t-32541, \n\t-32541, \n\t-31666, \n\t-31666, \n\t-30149, \n\t-30149, \n\t-28021, \n\t-28021, \n\t-25325, \n\t-25325, \n\t-22116, \n\t-22116, \n\t-18458, \n\t-18458, \n\t-14427, \n\t-14427, \n\t-10103, \n\t-10103, \n\t-5575 ,\n\t-5575 ,\n\t-933 ,\n\t-933 ,\n\t3726 ,\n\t3726 ,\n\t8311 ,\n\t8311 ,\n\t12728 ,\n\t12728 ,\n\t16886 ,\n\t16886 ,\n\t20703 ,\n\t20703 ,\n\t24099 ,\n\t24099 ,\n\t27008 ,\n\t27008 ,\n\t29369 ,\n\t29369 ,\n\t31135 ,\n\t31135 ,\n\t32270 ,\n\t32270 ,\n\t32751 ,\n\t32751 ,\n\t32568 ,\n\t32568 ,\n\t31725 ,\n\t31725 ,\n\t30240 ,\n\t30240 ,\n\t28141 ,\n\t28141 ,\n\t25472 ,\n\t25472 ,\n\t22287 ,\n\t22287 ,\n\t18651 ,\n\t18651 ,\n\t14636 ,\n\t14636 ,\n\t10325 ,\n\t10325 ,\n\t5805 ,\n\t5805 ,\n\t1166 ,\n\t1166 ,\n\t-3494 ,\n\t-3494 ,\n\t-8085 ,\n\t-8085 ,\n\t-12512, \n\t-12512, \n\t-16686, \n\t-16686, \n\t-20521, \n\t-20521, \n\t-23941, \n\t-23941, \n\t-26875, \n\t-26875, \n\t-29265, \n\t-29265, \n\t-31061, \n\t-31061, \n\t-32228, \n\t-32228, \n\t-32742, \n\t-32742, \n\t-32593, \n\t-32593, \n\t-31783, \n\t-31783, \n\t-30329, \n\t-30329, \n\t-28260, \n\t-28260, \n\t-25619, \n\t-25619, \n\t-22458, \n\t-22458, \n\t-18842, \n\t-18842, \n\t-14845, \n\t-14845, \n\t-10546, \n\t-10546, \n\t-6034 ,\n\t-6034 ,\n\t-1400 ,\n\t-1400 ,\n\t3262 ,\n\t3262 ,\n\t7859 ,\n\t7859 ,\n\t12296 ,\n\t12296 ,\n\t16484 ,\n\t16484 ,\n\t20339 ,\n\t20339 ,\n\t23781 ,\n\t23781 ,\n\t26741 ,\n\t26741 ,\n\t29159 ,\n\t29159 ,\n\t30986 ,\n\t30986 ,\n\t32185 ,\n\t32185 ,\n\t32732 ,\n\t32732 ,\n\t32616 ,\n\t32616 ,\n\t31839 ,\n\t31839 ,\n\t30416 ,\n\t30416 ,\n\t28377 ,\n\t28377 ,\n\t25763 ,\n\t25763 ,\n\t22627 ,\n\t22627 ,\n\t19033 ,\n\t19033 ,\n\t15052 ,\n\t15052 ,\n\t10767 ,\n\t10767 ,\n\t6263 ,\n\t6263 ,\n\t1633 ,\n\t1633 ,\n\t-3030 ,\n\t-3030 ,\n\t-7632 ,\n\t-7632 ,\n\t-12080, \n\t-12080, \n\t-16282, \n\t-16282, \n\t-20155, \n\t-20155, \n\t-23619, \n\t-23619, \n\t-26605, \n\t-26605, \n\t-29052, \n\t-29052, \n\t-30909, \n\t-30909, \n\t-32141, \n\t-32141, \n\t-32721, \n\t-32721, \n\t-32638, \n\t-32638, \n\t-31893, \n\t-31893, \n\t-30502, \n\t-30502, \n\t-28493, \n\t-28493, \n\t-25907, \n\t-25907, \n\t-22796, \n\t-22796, \n\t-19222, \n\t-19222, \n\t-15259, \n\t-15259, \n\t-10987, \n\t-10987, \n\t-6492 ,\n\t-6492 ,\n\t-1866 ,\n\t-1866 ,\n\t2797 ,\n\t2797 ,\n\t7405 ,\n\t7405 ,\n\t11862 ,\n\t11862 ,\n\t16079 ,\n\t16079 ,\n\t19971 ,\n\t19971 ,\n\t23457 ,\n\t23457 ,\n\t26468 ,\n\t26468 ,\n\t28943 ,\n\t28943 ,\n\t30831 ,\n\t30831 ,\n\t32094 ,\n\t32094 ,\n\t32707 ,\n\t32707 ,\n\t32658 ,\n\t32658 ,\n\t31946 ,\n\t31946 ,\n\t30587 ,\n\t30587 ,\n\t28608 ,\n\t28608 ,\n\t26049 ,\n\t26049 ,\n\t22963 ,\n\t22963 ,\n\t19411 ,\n\t19411 ,\n\t15466 ,\n\t15466 ,\n\t11207 ,\n\t11207 ,\n\t6721 ,\n\t6721 ,\n\t2099 ,\n\t2099 ,\n\t-2565 ,\n\t-2565 ,\n\t-7177 ,\n\t-7177 ,\n\t-11644, \n\t-11644, \n\t-15876, \n\t-15876, \n\t-19785, \n\t-19785, \n\t-23293, \n\t-23293, \n\t-26330, \n\t-26330, \n\t-28833, \n\t-28833, \n\t-30751, \n\t-30751, \n\t-32047, \n\t-32047, \n\t-32692, \n\t-32692, \n\t-32676, \n\t-32676, \n\t-31997, \n\t-31997, \n\t-30670, \n\t-30670, \n\t-28721, \n\t-28721, \n\t-26190, \n\t-26190, \n\t-23129, \n\t-23129, \n\t-19598, \n\t-19598, \n\t-15671, \n\t-15671, \n\t-11426, \n\t-11426, \n\t-6949 ,\n\t-6949 ,\n\t-2332 ,\n\t-2332 ,\n\t2332 ,\n\t2332 ,\n\t6949 ,\n\t6949 ,\n\t11426 ,\n\t11426 ,\n\t15671 ,\n\t15671 ,\n\t19598 ,\n\t19598 ,\n\t23129 ,\n\t23129 ,\n\t26190 ,\n\t26190 ,\n\t28721 ,\n\t28721 ,\n\t30670 ,\n\t30670 ,\n\t31997 ,\n\t31997 ,\n\t32676 ,\n\t32676 ,\n\t32692 ,\n\t32692 ,\n\t32047 ,\n\t32047 ,\n\t30751 ,\n\t30751 ,\n\t28833 ,\n\t28833 ,\n\t26330 ,\n\t26330 ,\n\t23293 ,\n\t23293 ,\n\t19785 ,\n\t19785 ,\n\t15876 ,\n\t15876 ,\n\t11644 ,\n\t11644 ,\n\t7177 ,\n\t7177 ,\n\t2565 ,\n\t2565 ,\n\t-2099 ,\n\t-2099 ,\n\t-6721 ,\n\t-6721 ,\n\t-11207, \n\t-11207, \n\t-15466, \n\t-15466, \n\t-19411, \n\t-19411, \n\t-22963, \n\t-22963, \n\t-26049, \n\t-26049, \n\t-28608, \n\t-28608, \n\t-30587, \n\t-30587, \n\t-31946, \n\t-31946, \n\t-32658, \n\t-32658, \n\t-32707, \n\t-32707, \n\t-32094, \n\t-32094, \n\t-30831, \n\t-30831, \n\t-28943, \n\t-28943, \n\t-26468, \n\t-26468, \n\t-23457, \n\t-23457, \n\t-19971, \n\t-19971, \n\t-16079, \n\t-16079, \n\t-11862, \n\t-11862, \n\t-7405 ,\n\t-7405 ,\n\t-2797 ,\n\t-2797 ,\n\t1866 ,\n\t1866 ,\n\t6492 ,\n\t6492 ,\n\t10987 ,\n\t10987 ,\n\t15259 ,\n\t15259 ,\n\t19222 ,\n\t19222 ,\n\t22796 ,\n\t22796 ,\n\t25907 ,\n\t25907 ,\n\t28493 ,\n\t28493 ,\n\t30502 ,\n\t30502 ,\n\t31893 ,\n\t31893 ,\n\t32638 ,\n\t32638 ,\n\t32721 ,\n\t32721 ,\n\t32141 ,\n\t32141 ,\n\t30909 ,\n\t30909 ,\n\t29052 ,\n\t29052 ,\n\t26605 ,\n\t26605 ,\n\t23619 ,\n\t23619 ,\n\t20155 ,\n\t20155 ,\n\t16282 ,\n\t16282 ,\n\t12080 ,\n\t12080 ,\n\t7632 ,\n\t7632 ,\n\t3030 ,\n\t3030 ,\n\t-1633 ,\n\t-1633 ,\n\t-6263 ,\n\t-6263 ,\n\t-10767, \n\t-10767, \n\t-15052, \n\t-15052, \n\t-19033, \n\t-19033, \n\t-22627, \n\t-22627, \n\t-25763, \n\t-25763, \n\t-28377, \n\t-28377, \n\t-30416, \n\t-30416, \n\t-31839, \n\t-31839, \n\t-32616, \n\t-32616, \n\t-32732, \n\t-32732, \n\t-32185, \n\t-32185, \n\t-30986, \n\t-30986, \n\t-29159, \n\t-29159, \n\t-26741, \n\t-26741, \n\t-23781, \n\t-23781, \n\t-20339, \n\t-20339, \n\t-16484, \n\t-16484, \n\t-12296, \n\t-12296, \n\t-7859 ,\n\t-7859 ,\n\t-3262 ,\n\t-3262 ,\n\t1400 ,\n\t1400 ,\n\t6034 ,\n\t6034 ,\n\t10546 ,\n\t10546 ,\n\t14845 ,\n\t14845 ,\n\t18842 ,\n\t18842 ,\n\t22458 ,\n\t22458 ,\n\t25619 ,\n\t25619 ,\n\t28260 ,\n\t28260 ,\n\t30329 ,\n\t30329 ,\n\t31783 ,\n\t31783 ,\n\t32593 ,\n\t32593 ,\n\t32742 ,\n\t32742 ,\n\t32228 ,\n\t32228 ,\n\t31061 ,\n\t31061 ,\n\t29265 ,\n\t29265 ,\n\t26875 ,\n\t26875 ,\n\t23941 ,\n\t23941 ,\n\t20521 ,\n\t20521 ,\n\t16686 ,\n\t16686 ,\n\t12512 ,\n\t12512 ,\n\t8085 ,\n\t8085 ,\n\t3494 ,\n\t3494 ,\n\t-1166 ,\n\t-1166 ,\n\t-5805 ,\n\t-5805 ,\n\t-10325, \n\t-10325, \n\t-14636, \n\t-14636, \n\t-18651, \n\t-18651, \n\t-22287, \n\t-22287, \n\t-25472, \n\t-25472, \n\t-28141, \n\t-28141, \n\t-30240, \n\t-30240, \n\t-31725, \n\t-31725, \n\t-32568, \n\t-32568, \n\t-32751, \n\t-32751, \n\t-32270, \n\t-32270, \n\t-31135, \n\t-31135, \n\t-29369, \n\t-29369, \n\t-27008, \n\t-27008, \n\t-24099, \n\t-24099, \n\t-20703, \n\t-20703, \n\t-16886, \n\t-16886, \n\t-12728, \n\t-12728, \n\t-8311 ,\n\t-8311 ,\n\t-3726 ,\n\t-3726 ,\n\t933 ,\n\t933 ,\n\t5575 ,\n\t5575 ,\n\t10103 ,\n\t10103 ,\n\t14427 ,\n\t14427 ,\n\t18458 ,\n\t18458 ,\n\t22116 ,\n\t22116 ,\n\t25325 ,\n\t25325 ,\n\t28021 ,\n\t28021 ,\n\t30149 ,\n\t30149 ,\n\t31666 ,\n\t31666 ,\n\t32541 ,\n\t32541 ,\n\t32757 ,\n\t32757 ,\n\t32309 ,\n\t32309 ,\n\t31207 ,\n\t31207 ,\n\t29472 ,\n\t29472 ,\n\t27139 ,\n\t27139 ,\n\t24257 ,\n\t24257 ,\n\t20883 ,\n\t20883 ,\n\t17086 ,\n\t17086 ,\n\t12943 ,\n\t12943 ,\n\t8537 ,\n\t8537 ,\n\t3958 ,\n\t3958 ,\n\t-700 ,\n\t-700 ,\n\t-5344 ,\n\t-5344 ,\n\t-9881 ,\n\t-9881 ,\n\t-14217, \n\t-14217, \n\t-18265, \n\t-18265, \n\t-21943, \n\t-21943, \n\t-25176, \n\t-25176, \n\t-27899, \n\t-27899, \n\t-30057, \n\t-30057, \n\t-31605, \n\t-31605, \n\t-32513, \n\t-32513, \n\t-32762, \n\t-32762, \n\t-32347, \n\t-32347, \n\t-31277, \n\t-31277, \n\t-29573, \n\t-29573, \n\t-27269, \n\t-27269, \n\t-24413, \n\t-24413, \n\t-21062, \n\t-21062, \n\t-17285, \n\t-17285, \n\t-13157, \n\t-13157, \n\t-8762 ,\n\t-8762 ,\n\t-4190 ,\n\t-4190 ,\n\t466 ,\n\t466 ,\n\t5114 ,\n\t5114 ,\n\t9658 ,\n\t9658 ,\n\t14006 ,\n\t14006 ,\n\t18071 ,\n\t18071 ,\n\t21769 ,\n\t21769 ,\n\t25026 ,\n\t25026 ,\n\t27776 ,\n\t27776 ,\n\t29963 ,\n\t29963 ,\n\t31543 ,\n\t31543 ,\n\t32483 ,\n\t32483 ,\n\t32766 ,\n\t32766 ,\n\t32384 ,\n\t32384 ,\n\t31346 ,\n\t31346 ,\n\t29673 ,\n\t29673 ,\n\t27398 ,\n\t27398 ,\n\t24568 ,\n\t24568 ,\n\t21241 ,\n\t21241 ,\n\t17483 ,\n\t17483 ,\n\t13370 ,\n\t13370 ,\n\t8987 ,\n\t8987 ,\n\t4421 ,\n\t4421 ,\n\t-233 ,\n\t-233 ,\n\t-4883 ,\n\t-4883 ,\n\t-9435 ,\n\t-9435 ,\n\t-13795, \n\t-13795, \n\t-17876, \n\t-17876, \n\t-21594, \n\t-21594, \n\t-24875, \n\t-24875, \n\t-27651, \n\t-27651, \n\t-29868, \n\t-29868, \n\t-31479, \n\t-31479, \n\t-32452, \n\t-32452, \n\t-32767, \n\t-32767, \n\t-32419, \n\t-32419, \n\t-31413, \n\t-31413, \n\t-29771, \n\t-29771, \n\t-27525, \n\t-27525, \n\t-24722, \n\t-24722, \n\t-21418, \n\t-21418, \n\t-17679, \n\t-17679, \n\t-13583, \n\t-13583, \n\t-9211 ,\n\t-9211 ,\n\t-4652 ,\n\t-4652 ,\n};\n#elif (CODEC_TESTMODE == CODEC_WHITENOISE)\nconst int16_t sinwave[] = {\n-13279 , \n23249 ,\n-2387 ,\n-24403 ,\n30985 ,\n-403 ,\n-14925 ,\n-18617 ,\n21463 ,\n25395 ,\n4097 ,\n-21503 ,\n-16815 ,\n20875 ,\n-14167 ,\n31523 ,\n-4541 ,\n14695 ,\n-4055 ,\n-27691 ,\n18671 ,\n-19955 ,\n-9173 ,\n-16071 ,\n-2799 ,\n17023 ,\n-32331 ,\n-26623 ,\n-9401 ,\n2629 ,\n14815 ,\n16519 ,\n-13035 ,\n25297 ,\n-1769 ,\n-2715 ,\n2653 ,\n4429 ,\n28875 ,\n3729 ,\n-8883 ,\n8443 ,\n5039 ,\n-3861 ,\n-31517 ,\n-505 ,\n29795 ,\n-17821 ,\n9691 ,\n-5915 ,\n-2367 ,\n643 ,\n-1489 ,\n23073 ,\n19329 ,\n-30829 ,\n30475 ,\n28349 ,\n-20867 ,\n8231 ,\n-24253 ,\n-2807 ,\n24421 ,\n-14019 ,\n18511 ,\n12793 ,\n19705 ,\n10455 ,\n24517 ,\n-2307 ,\n27323 ,\n23815 ,\n12101 ,\n8283 ,\n-22225 ,\n28569 ,\n-28411 ,\n5121 ,\n2193 ,\n17949 ,\n-2383 ,\n22757 ,\n-16887 ,\n26243 ,\n27897 ,\n-8485 ,\n-7323 ,\n26675 ,\n21885 ,\n3817 ,\n-22189 ,\n27051 ,\n3909 ,\n15395 ,\n-31721 ,\n25223 ,\n17855 ,\n-29443 ,\n19139 ,\n-21967 ,\n7727 ,\n-2769 ,\n-16145 ,\n-29985 ,\n-1105 ,\n22527 ,\n-32011 ,\n14653 ,\n4517 ,\n27429 ,\n-13151 ,\n2179 ,\n31925 ,\n29207 ,\n4721 ,\n13059 ,\n6721 ,\n27119 ,\n-6841 ,\n3917 ,\n-10661 ,\n-16973 ,\n6309 ,\n2491 ,\n-22463 ,\n6975 ,\n-23709 ,\n14997 ,\n-2733 ,\n-32629 ,\n13029 ,\n-3933 ,\n-28019 ,\n6543 ,\n-5925 ,\n2115 ,\n7291 ,\n1691 ,\n15215 ,\n26375 ,\n-8779 ,\n-23771 ,\n28677 ,\n29637 ,\n-1065 ,\n25901 ,\n-22421 ,\n-7371 ,\n8947 ,\n-4855 ,\n-1383 ,\n-20213 ,\n26513 ,\n24013 ,\n-29981 ,\n-25207 ,\n-26845 ,\n-27121 ,\n8377 ,\n1941 ,\n-20739 ,\n24915 ,\n11729 ,\n31583 ,\n-20017 ,\n14801 ,\n-16403 ,\n-12951 ,\n-27751 ,\n-19747 ,\n21775 ,\n6693 ,\n29735 ,\n9139 ,\n2603 ,\n-32239 ,\n-8187 ,\n-21805 ,\n7269 ,\n-1463 ,\n20481 ,\n8669 ,\n13513 ,\n2465 ,\n-24815 ,\n6627 ,\n30335 ,\n-13757 ,\n-20771 ,\n30789 ,\n-14455 ,\n1977 ,\n-3411 ,\n-13309 ,\n19445 ,\n-11883 ,\n6373 ,\n-3165 ,\n-29801 ,\n23165 ,\n-29961 ,\n11125 ,\n14915 ,\n31687 ,\n-1049 ,\n7291 ,\n6787 ,\n-19049 ,\n-17101 ,\n955 ,\n-3377 ,\n877 ,\n4697 ,\n-30183 ,\n3399 ,\n23871 ,\n15051 ,\n25767 ,\n14823 ,\n15643 ,\n27231 ,\n21901 ,\n-13499 ,\n305 ,\n26707 ,\n-23217 ,\n-31295 ,\n-32141 ,\n3261 ,\n-21325 ,\n-1721 ,\n-18513 ,\n21641 ,\n-30957 ,\n15739 ,\n-17119 ,\n17381 ,\n-31441 ,\n-30595 ,\n6281 ,\n20301 ,\n30871 ,\n-26597 ,\n-28207 ,\n-32017 ,\n28523 ,\n25987 ,\n30739 ,\n8367 ,\n-1845 ,\n7053 ,\n-21697 ,\n-4967 ,\n-30309 ,\n-14501 ,\n16939 ,\n-8225 ,\n6629 ,\n-17497 ,\n9515 ,\n31307 ,\n-27979 ,\n7789 ,\n30001 ,\n27195 ,\n9319 ,\n-26327 ,\n5981 ,\n-15595 ,\n7553 ,\n-23669 ,\n15639 ,\n31301 ,\n23059 ,\n24757 ,\n16551 ,\n25263 ,\n-7289 ,\n-30993 ,\n-20913 ,\n24235 ,\n-9989 ,\n18909 ,\n-11807 ,\n121 ,\n14363 ,\n-16581 ,\n-24361 ,\n20799 ,\n-24971 ,\n-18923 ,\n22763 ,\n-2437 ,\n-25769 ,\n30841 ,\n-21709 ,\n28159 ,\n-21983 ,\n28601 ,\n-13391 ,\n-26523 ,\n27935 ,\n8987 ,\n15727 ,\n18955 ,\n16611 ,\n-30447 ,\n-19681 ,\n6795 ,\n-16357 ,\n8953 ,\n-9181 ,\n10929 ,\n20459 ,\n-9397 ,\n30257 ,\n6387 ,\n19649 ,\n7767 ,\n31591 ,\n-9113 ,\n-4177 ,\n9595 ,\n-15131 ,\n-16833 ,\n-31671 ,\n-4899 ,\n-1565 ,\n10691 ,\n1777 ,\n-13409 ,\n9031 ,\n-30013 ,\n-15433 ,\n9885 ,\n-17469 ,\n-3441 ,\n3507 ,\n13727 ,\n-27545 ,\n-17549 ,\n-22825 ,\n21267 ,\n26045 ,\n-7503 ,\n-4023 ,\n-12731 ,\n25949 ,\n20723 ,\n31545 ,\n-18403 ,\n-18421 ,\n-14013 ,\n4677 ,\n-23989 ,\n6217 ,\n-18809 ,\n-11461 ,\n-14073 ,\n-30349 ,\n-28805 ,\n29063 ,\n-24757 ,\n28501 ,\n2337 ,\n14589 ,\n13699 ,\n-7613 ,\n-12353 ,\n-5833 ,\n29389 ,\n-26703 ,\n-425 ,\n363 ,\n-26455 ,\n14157 ,\n3227 ,\n-27453 ,\n2365 ,\n29847 ,\n27499 ,\n16183 ,\n-14339 ,\n-15119 ,\n-30781 ,\n21219 ,\n-21261 ,\n2629 ,\n27715 ,\n-10787 ,\n-15767 ,\n2577 ,\n-18157 ,\n26771 ,\n-15061 ,\n2311 ,\n10863 ,\n-21345 ,\n16187 ,\n25373 ,\n25997 ,\n17437 ,\n13579 ,\n30763 ,\n17447 ,\n391 ,\n-8911 ,\n-15099 ,\n22111 ,\n24589 ,\n23201 ,\n-32499 ,\n-11445 ,\n-9111 ,\n-3735 ,\n-26549 ,\n-20517 ,\n17979 ,\n-21021 ,\n23051 ,\n5217 ,\n-24097 ,\n-2449 ,\n-19473 ,\n-6019 ,\n-19769 ,\n-81 ,\n20877 ,\n-21093 ,\n-14771 ,\n-25803 ,\n30849 ,\n24555 ,\n-10475 ,\n22729 ,\n-1785 ,\n-27183 ,\n-24357 ,\n29205 ,\n2837 ,\n-27155 ,\n-17195 ,\n30945 ,\n28657 ,\n-25727 ,\n24191 ,\n16335 ,\n-20409 ,\n377 ,\n-14083 ,\n-2677 ,\n-12599 ,\n-29739 ,\n5361 ,\n-5491 ,\n18237 ,\n-30807 ,\n24271 ,\n-1721 ,\n-19943 ,\n-1639 ,\n-2633 ,\n2275 ,\n-7007 ,\n-27965 ,\n-23857 ,\n-23943 ,\n-6795 ,\n-23481 ,\n-24297 ,\n4297 ,\n-29269 ,\n-14029 ,\n24011 ,\n623 ,\n11889 ,\n32513 ,\n-26327 ,\n9887 ,\n4887 ,\n25739 ,\n-37 ,\n-17315 ,\n14257 ,\n22411 ,\n-11067 ,\n-29645 ,\n3113 ,\n10375 ,\n-15523 ,\n17509 ,\n-25637 ,\n7509 ,\n29325 ,\n-20557 ,\n-3667 ,\n-1525 ,\n-4103 ,\n-16759 ,\n4259 ,\n-14215 ,\n-29715 ,\n-9541 ,\n22777 ,\n5667 ,\n15775 ,\n32185 ,\n-20033 ,\n-8009 ,\n10263 ,\n-32437 ,\n20201 ,\n-5885 ,\n22401 ,\n8905 ,\n27633 ,\n-23435 ,\n20231 ,\n12493 ,\n-11549 ,\n-31481 ,\n32547 ,\n23415 ,\n-30719 ,\n-12351 ,\n15487 ,\n7957 ,\n29139 ,\n-17999 ,\n20295 ,\n16745 ,\n21953 ,\n855 ,\n-19703 ,\n22875 ,\n301 ,\n-13651 ,\n-24831 ,\n22831 ,\n-2295 ,\n-13419 ,\n28409 ,\n-27839 ,\n31215 ,\n-14639 ,\n-31581 ,\n12603 ,\n19131 ,\n18305 ,\n-18071 ,\n-27185 ,\n-3169 ,\n32535 ,\n30925 ,\n-24339 ,\n-2115 ,\n28621 ,\n6973 ,\n20091 ,\n-16571 ,\n7587 ,\n-26263 ,\n-22645 ,\n-26621 ,\n-559 ,\n12317 ,\n32281 ,\n-23943 ,\n23745 ,\n3233 ,\n-5311 ,\n899 ,\n-3445 ,\n-26241 ,\n2033 ,\n12889 ,\n24037 ,\n-31763 ,\n-10201 ,\n-17603 ,\n-16989 ,\n4509 ,\n-8023 ,\n20103 ,\n8361 ,\n-8433 ,\n24377 ,\n29759 ,\n1129 ,\n-24969 ,\n-25263 ,\n-17359 ,\n-26157 ,\n-4341 ,\n21853 ,\n-15725 ,\n2261 ,\n-6949 ,\n-23961 ,\n-7923 ,\n27215 ,\n22831 ,\n29281 ,\n-7081 ,\n-20345 ,\n-25767 ,\n-3381 ,\n-25003 ,\n13869 ,\n-26093 ,\n-4101 ,\n-21335 ,\n11207 ,\n7503 ,\n-24889 ,\n19407 ,\n-25683 ,\n10391 ,\n-14135 ,\n-29005 ,\n15493 ,\n7645 ,\n-11507 ,\n-11575 ,\n-13775 ,\n-18209 ,\n-26801 ,\n-14169 ,\n7511 ,\n31471 ,\n-30795 ,\n-5865 ,\n-18107 ,\n-24741 ,\n5373 ,\n-20807 ,\n2173 ,\n12345 ,\n-12479 ,\n27669 ,\n-99 ,\n21443 ,\n14631 ,\n5679 ,\n24287 ,\n27187 ,\n-14947 ,\n-9305 ,\n18963 ,\n5139 ,\n-2035 ,\n-8113 ,\n28431 ,\n-18143 ,\n7961 ,\n-2755 ,\n29357 ,\n-22635 ,\n-24109 ,\n-23191 ,\n-9149 ,\n25613 ,\n22383 ,\n28361 ,\n14229 ,\n16853 ,\n-7803 ,\n32729 ,\n-23207 ,\n-9269 ,\n-32575 ,\n-11833 ,\n-28127 ,\n-31315 ,\n23581 ,\n-2307 ,\n-13349 ,\n19957 ,\n-19815 ,\n30271 ,\n-21045 ,\n-22473 ,\n-4235 ,\n2623 ,\n-25863 ,\n22511 ,\n6377 ,\n-25157 ,\n32567 ,\n-19491 ,\n-28329 ,\n23567 ,\n-29045 ,\n-9757 ,\n-23799 ,\n-20911 ,\n-1233 ,\n-5297 ,\n-12693 ,\n31973 ,\n-9715 ,\n-5695 ,\n21181 ,\n-29283 ,\n-4693 ,\n19583 ,\n-5813 ,\n22085 ,\n-28757 ,\n-6583 ,\n11053 ,\n7109 ,\n28867 ,\n13233 ,\n-26253 ,\n-19019 ,\n26419 ,\n-22023 ,\n-16405 ,\n-12685 ,\n957 ,\n7785 ,\n27211 ,\n-2107 ,\n9501 ,\n-8673 ,\n25585 ,\n27617 ,\n16899 ,\n-29067 ,\n-17891 ,\n-11505 ,\n-24183 ,\n28109 ,\n-1885 ,\n-6715 ,\n14891 ,\n3309 ,\n22817 ,\n17205 ,\n28479 ,\n6365 ,\n23751 ,\n21609 ,\n25839 ,\n19761 ,\n-14217 ,\n-27681 ,\n8877 ,\n9969 ,\n31631 ,\n4505 ,\n15409 ,\n28645 ,\n6431 ,\n-29765 ,\n14573 ,\n14965 ,\n-1127 ,\n-3161 ,\n29185 ,\n26107 ,\n27405 ,\n-18553 ,\n-24899 ,\n17307 ,\n-29213 ,\n-22415 ,\n-14449 ,\n29605 ,\n3089 ,\n-11009 ,\n-10363 ,\n-27809 ,\n-9001 ,\n12381 ,\n-31685 ,\n-11417 ,\n14061 ,\n24045 ,\n-15273 ,\n3715 ,\n6983 ,\n31063 ,\n-29565 ,\n30981 ,\n29253 ,\n13093 ,\n2791 ,\n-32621 ,\n13167 ,\n6613 ,\n6423 ,\n-2931 ,\n-28761 ,\n26491 ,\n7319 ,\n3807 ,\n-27155 ,\n11217 ,\n3531 ,\n30039 ,\n19081 ,\n10961 ,\n-8849 ,\n-13437 ,\n-22323 ,\n18385 ,\n-3943 ,\n-4861 ,\n-30903 ,\n-10989 ,\n-5345 ,\n26723 ,\n-10623 ,\n-24605 ,\n-32605 ,\n21109 ,\n12843 ,\n4397 ,\n-31747 ,\n2601 ,\n15587 ,\n15001 ,\n-4807 ,\n1247 ,\n-16801 ,\n10267 ,\n3595 ,\n15175 ,\n-973 ,\n19987 ,\n-21301 ,\n20147 ,\n17657 ,\n27613 ,\n15853 ,\n-265 ,\n9755 ,\n-17677 ,\n-3081 ,\n2229 ,\n17401 ,\n-15747 ,\n-8713 ,\n1087 ,\n19629 ,\n-22681 ,\n-13183 ,\n23785 ,\n-701 ,\n20743 ,\n13599 ,\n-1817 ,\n-20123 ,\n14885 ,\n-13229 ,\n-22115 ,\n30115 ,\n18073 ,\n3589 ,\n-895 ,\n5155 ,\n30057 ,\n27777 ,\n-31637 ,\n5075 ,\n-14509 ,\n24047 ,\n13163 ,\n8751 ,\n12789 ,\n73 ,\n-8915 ,\n-8339 ,\n-2213 ,\n-29745 ,\n31173 ,\n-31427 ,\n14873 ,\n19467 ,\n16655 ,\n24569 ,\n9699 ,\n22333 ,\n13949 ,\n-28057 ,\n-31575 ,\n-17321 ,\n15739 ,\n7141 ,\n6181 ,\n24439 ,\n20033 ,\n-26323 ,\n-28671 ,\n15581 ,\n-7381 ,\n-18555 ,\n29793 ,\n19045 ,\n13967 ,\n-11655 ,\n-8955 ,\n-20613 ,\n26909 ,\n-19433 ,\n19679 ,\n-29801 ,\n10409 ,\n-4193 ,\n-30171 ,\n821 ,\n-4203 ,\n-12605 ,\n-13583 ,\n-13497 ,\n29851 ,\n18775 ,\n3667 ,\n-5323 ,\n25383 ,\n-109 ,\n-1555 ,\n-4783 ,\n-3019 ,\n-20797 ,\n5131 ,\n13775 ,\n32677 ,\n6271 ,\n-19911 ,\n-18369 ,\n-25069 ,\n-11157 ,\n29781 ,\n-15489 ,\n-3279 ,\n1125 ,\n-23497 ,\n7231 ,\n14489 ,\n25411 ,\n20923 ,\n7659 ,\n-24273 ,\n-23029 ,\n-31905 ,\n6699 ,\n11505 ,\n-22619 ,\n21333 ,\n-20773 ,\n1361 ,\n22301 ,\n20771 ,\n19073 ,\n31245 ,\n-8109 ,\n-69 ,\n-26811 ,\n-18807 ,\n1843 ,\n-14327 ,\n1131 ,\n-14425 ,\n11635 ,\n14357 ,\n9797 ,\n2587 ,\n-1335 ,\n-6505 ,\n9397 ,\n-26299 ,\n8091 ,\n-11505 ,\n-4065 ,\n-10613 ,\n10821 ,\n-26019 ,\n29915 ,\n-24273 ,\n-6461 ,\n22493 ,\n-31427 ,\n22185 ,\n16629 ,\n-29961 ,\n-19973 ,\n13177 ,\n8525 ,\n-9923 ,\n-14029 ,\n11401 ,\n15375 ,\n1283 ,\n13275 ,\n-9987 ,\n19203 ,\n-3981 ,\n-5699 ,\n-31603 ,\n-22097 ,\n1321 ,\n13293 ,\n605 ,\n-13291 ,\n-10165 ,\n-2625 ,\n22617 ,\n-30753 ,\n25373 ,\n-19385 ,\n-9467 ,\n-22497 ,\n-22499 ,\n5191 ,\n-11811 ,\n-15479 ,\n7319 ,\n1707 ,\n15401 ,\n-13023 ,\n-20799 ,\n23429 ,\n-12719 ,\n22403 ,\n-16299 ,\n-3201 ,\n-16447 ,\n647 ,\n-4705 ,\n18391 ,\n-32461 ,\n2955 ,\n-1759 ,\n-32557 ,\n-3183 ,\n30753 ,\n-19549 ,\n-11585 ,\n14153 ,\n-11447 ,\n14543 ,\n22879 ,\n-21467 ,\n-2775 ,\n22595 ,\n10731 ,\n14753 ,\n-12983 ,\n-31949 ,\n-11389 ,\n30669 ,\n-22719 ,\n5753 ,\n1581 ,\n-12139 ,\n-7681 ,\n22833 ,\n-26553 ,\n12709 ,\n-28301 ,\n1995 ,\n-23935 ,\n26305 ,\n717 ,\n-15441 ,\n-5543 ,\n-19311 ,\n-25807 ,\n16199 ,\n21259 ,\n-13301 ,\n2293 ,\n32417 ,\n-29421 ,\n-20933 ,\n16211 ,\n1153 ,\n-17383 ,\n-26459 ,\n13477 ,\n17405 ,\n19315 ,\n-28139 ,\n-9445 ,\n11925 ,\n-22245 ,\n-20479 ,\n19445 ,\n14021 ,\n7969 ,\n-21413 ,\n-25291 ,\n-24793 ,\n-31827 ,\n-7197 ,\n23009 ,\n28163 ,\n-2193 ,\n21773 ,\n5299 ,\n-8857 ,\n27285 ,\n-18609 ,\n3409 ,\n-24635 ,\n8273 ,\n17147 ,\n24587 ,\n-12027 ,\n-5953 ,\n16789 ,\n-18417 ,\n-5083 ,\n18793 ,\n-335 ,\n-991 ,\n-25277 ,\n19517 ,\n12617 ,\n-4653 ,\n-14269 ,\n11521 ,\n30095 ,\n13119 ,\n-25631 ,\n-25269 ,\n-4275 ,\n-15557 ,\n2379 ,\n-10493 ,\n-21321 ,\n11287 ,\n30769 ,\n13645 ,\n-7739 ,\n-21299 ,\n3945 ,\n-29685 ,\n-27631 ,\n-26431 ,\n27137 ,\n-2607 ,\n-12509 ,\n-523 ,\n4313 ,\n20569 ,\n-1709 ,\n1473 ,\n-28491 ,\n8069 ,\n24859 ,\n2059 ,\n-31525 ,\n3795 ,\n-25867 ,\n-14081 ,\n28203 ,\n-14005 ,\n-14419 ,\n-9911 ,\n-20809 ,\n24585 ,\n23355 ,\n-28467 ,\n-32299 ,\n-2269 ,\n31775 ,\n-25639 ,\n18623 ,\n-3791 ,\n-27855 ,\n-27929 ,\n933 ,\n20795 ,\n9215 ,\n-27449 ,\n20299 ,\n-29905 ,\n-31321 ,\n23403 ,\n-16615 ,\n31461 ,\n-27609 ,\n-15607 ,\n-5189 ,\n-18039 ,\n-3527 ,\n15333 ,\n3637 ,\n2461 ,\n-3151 ,\n7805 ,\n32633 ,\n4461 ,\n-14261 ,\n23111 ,\n-2939 ,\n7175 ,\n-247 ,\n30439 ,\n-12555 ,\n6323 ,\n-1529 ,\n24553 ,\n23071 ,\n-28433 ,\n27355 ,\n-3337 ,\n19625 ,\n-13091 ,\n28511 ,\n-14193 ,\n26273 ,\n-8631 ,\n26397 ,\n12097 ,\n-31723 ,\n-13807 ,\n6415 ,\n-11933 ,\n-979 ,\n-30673 ,\n16909 ,\n-699 ,\n-23359 ,\n4641 ,\n9113 ,\n2035 ,\n21105 ,\n14311 ,\n11061 ,\n-15771 ,\n11581 ,\n29569 ,\n19015 ,\n31037 ,\n-20063 ,\n29405 ,\n5731 ,\n30451 ,\n-18907 ,\n-28589 ,\n18989 ,\n-32609 ,\n19835 ,\n-3677 ,\n-16725 ,\n17699 ,\n-8937 ,\n-31393 ,\n29989 ,\n14053 ,\n16451 ,\n-26893 ,\n-13969 ,\n-14319 ,\n20413 ,\n12565 ,\n25809 ,\n-32447 ,\n-23097 ,\n1717 ,\n2389 ,\n-5435 ,\n-2361 ,\n6795 ,\n-12897 ,\n-16307 ,\n-10663 ,\n-8973 ,\n-7863 ,\n26413 ,\n16621 ,\n-1919 ,\n29117 ,\n7945 ,\n-15911 ,\n-31519 ,\n-14459 ,\n-6885 ,\n-29197 ,\n-10143 ,\n13355 ,\n-32287 ,\n27305 ,\n-20517 ,\n-6009 ,\n-18093 ,\n-18019 ,\n-6857 ,\n19367 ,\n5539 ,\n-32583 ,\n27747 ,\n-5611 ,\n17525 ,\n-14655 ,\n-12609 ,\n-27201 ,\n32397 ,\n7289 ,\n-8923 ,\n-12737 ,\n-3567 ,\n-21965 ,\n-12203 ,\n2499 ,\n-22721 ,\n-26133 ,\n-28681 ,\n-2471 ,\n-10339 ,\n13783 ,\n22533 ,\n19407 ,\n12225 ,\n-27761 ,\n29905 ,\n17925 ,\n-3209 ,\n9109 ,\n19835 ,\n24519 ,\n31879 ,\n-651 ,\n29915 ,\n26153 ,\n3045 ,\n16477 ,\n-1777 ,\n31829 ,\n25963 ,\n24625 ,\n-22177 ,\n10225 ,\n11795 ,\n-18649 ,\n-30013 ,\n-531 ,\n-31571 ,\n13279 ,\n13009 ,\n2009 ,\n-13031 ,\n31733 ,\n16701 ,\n31173 ,\n9721 ,\n23331 ,\n-20533 ,\n-12135 ,\n-32527 ,\n-10543 ,\n12493 ,\n-3867 ,\n-10913 ,\n-16851 ,\n21523 ,\n24125 ,\n25989 ,\n3785 ,\n-21909 ,\n8981 ,\n-29097 ,\n1455 ,\n-24685 ,\n-32493 ,\n6561 ,\n13559 ,\n17079 ,\n489 ,\n-30009 ,\n30181 ,\n-19103 ,\n177 ,\n24059 ,\n3965 ,\n30969 ,\n17339 ,\n-19977 ,\n-5737 ,\n21175 ,\n-16651 ,\n21553 ,\n9345 ,\n-481 ,\n5807 ,\n-22633 ,\n-4849 ,\n26105 ,\n-1275 ,\n24007 ,\n-6857 ,\n-25661 ,\n-3155 ,\n31427 ,\n-1757 ,\n17841 ,\n-19373 ,\n-25811 ,\n-1835 ,\n-17629 ,\n-28309 ,\n-2819 ,\n-12753 ,\n-30825 ,\n11667 ,\n2743 ,\n-22627 ,\n-29657 ,\n-2207 ,\n-30421 ,\n-4327 ,\n30595 ,\n-28731 ,\n18341 ,\n26071 ,\n-13215 ,\n-20267 ,\n-7517 ,\n15437 ,\n11899 ,\n-21201 ,\n-5863 ,\n32469 ,\n11781 ,\n8141 ,\n5149 ,\n-20801 ,\n18857 ,\n-7071 ,\n-32475 ,\n-8209 ,\n24311 ,\n-4063 ,\n26299 ,\n13037 ,\n16739 ,\n9007 ,\n15291 ,\n901 ,\n-20549 ,\n-21913 ,\n-14073 ,\n-23589 ,\n24609 ,\n2491 ,\n7613 ,\n-1021 ,\n23171 ,\n26375 ,\n-8717 ,\n-6633 ,\n22923 ,\n11627 ,\n-7187 ,\n-24875 ,\n27173 ,\n-24281 ,\n-21545 ,\n8883 ,\n-32405 ,\n31723 ,\n-32263 ,\n-12425 ,\n16673 ,\n10683 ,\n-5259 ,\n8783 ,\n-23885 ,\n-16841 ,\n16761 ,\n-5527 ,\n-16223 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,\n-18849 ,\n-22541 ,\n-11143 ,\n-28885 ,\n-21081 ,\n-27377 ,\n4807 ,\n-30039 ,\n-7783 ,\n-21509 ,\n-8501 ,\n-10009 ,\n-16913 ,\n10735 ,\n-18889 ,\n-22429 ,\n-25747 ,\n-31681 ,\n-14535 ,\n-24477 ,\n20199 ,\n22609 ,\n11993 ,\n-26325 ,\n23783 ,\n27155 ,\n14277 ,\n28339 ,\n-22085 ,\n26873 ,\n-20043 ,\n-6685 ,\n-491 ,\n-19603 ,\n-1735 ,\n7245 ,\n14367 ,\n-12079 ,\n-14311 ,\n31325 ,\n-32495 ,\n-9749 ,\n26153 ,\n-24553 ,\n24401 ,\n-30739 ,\n21151 ,\n17483 ,\n-771 ,\n8665 ,\n-529 ,\n32343 ,\n31507 ,\n137 ,\n-21469 ,\n29263 ,\n-22271 ,\n-7901 ,\n6063 ,\n-10303 ,\n-1865 ,\n-16885 ,\n-4915 ,\n21227 ,\n1867 ,\n26209 ,\n-19117 ,\n6253 ,\n-28147 ,\n-29701 ,\n19723 ,\n-11379 ,\n12313 ,\n32725 ,\n30347 ,\n18143 ,\n-22413 ,\n21775 ,\n-22381 ,\n-24691 ,\n15527 ,\n-23963 ,\n-21545 ,\n-3327 ,\n-16433 ,\n-26077 ,\n8549 ,\n-8409 ,\n-11713 ,\n-20319 ,\n-30347 ,\n-15071 ,\n6541 ,\n-30407 ,\n-7481 ,\n-27007 ,\n-13005 ,\n25025 ,\n31347 ,\n-21251 ,\n28579 ,\n-19329 ,\n1097 ,\n-23383 ,\n3035 ,\n18597 ,\n-27741 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,\n-19407 ,\n29363 ,\n-13469 ,\n-8403 ,\n17101 ,\n-16655 ,\n-12283 ,\n-11431 ,\n2085 ,\n21723 ,\n11375 ,\n4527 ,\n-2869 ,\n-23719 ,\n4025 ,\n25189 ,\n8683 ,\n-27561 ,\n3647 ,\n75 ,\n-9921 ,\n-15599 ,\n12763 ,\n1119 ,\n11151 ,\n13037 ,\n-23391 ,\n-12821 ,\n-12889 ,\n-24869 ,\n-4591 ,\n-16615 ,\n29645 ,\n-1755 ,\n15059 ,\n9735 ,\n25525 ,\n13257 ,\n-22807 ,\n-21909 ,\n29953 ,\n-5805 ,\n627 ,\n6043 ,\n14391 ,\n-463 ,\n2265 ,\n-9419 ,\n31797 ,\n-11631 ,\n-32113 ,\n4139 ,\n-5587 ,\n7345 ,\n18751 ,\n28257 ,\n-4071 ,\n961 ,\n-22891 ,\n-2365 ,\n-20039 ,\n-27855 ,\n1377 ,\n-19489 ,\n14339 ,\n7823 ,\n27999 ,\n26361 ,\n-26841 ,\n-21025 ,\n-16021 ,\n31145 ,\n17141 ,\n2671 ,\n14385 ,\n3051 ,\n18921 ,\n-31695 ,\n1907 ,\n30397 ,\n-20843 ,\n1945 ,\n-17995 ,\n6971 ,\n-26723 ,\n-25623 ,\n9849 ,\n-10713 ,\n-29133 ,\n-7663 ,\n-31495 ,\n-4075 ,\n-31993 ,\n-21495 ,\n-28319 ,\n-7689 ,\n-11833 ,\n17571 ,\n15483 ,\n-14797 ,\n-1263 ,\n32740 ,\n-8711 ,\n-12733 ,\n19697 ,\n11231 ,\n24859 ,\n-27443 ,\n12753 ,\n-1523 ,\n25589 ,\n-23505 ,\n24055 ,\n31009 ,\n-16095 ,\n2473 ,\n-27777 ,\n14181 ,\n31735 ,\n19683 ,\n13515 ,\n-23155 ,\n-30909 ,\n-23533 ,\n23939 ,\n-11757 ,\n24193 ,\n-17265 ,\n-17915 ,\n-27379 ,\n-5739 ,\n-4125 ,\n-10905 ,\n17541 ,\n-23805 ,\n15725 ,\n5603 ,\n-30381 ,\n30879 ,\n-8079 ,\n8157 ,\n27763 ,\n24273 ,\n-9541 ,\n-10419 ,\n13531 ,\n3653 ,\n19367\n};\n#endif\n#endif\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "apps/apptester/audiobuffer.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"audiobuffer.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"string.h\"\n\n#ifndef _AUDIO_NO_THREAD_\nstatic osMutexId g_audio_queue_mutex_id = NULL;\nosMutexDef(g_audio_queue_mutex);\n#endif\n\nstatic CQueue audio_queue;\nstatic unsigned char\n audio_queue_buf[AUDIO_BUFFER_FRAME_SIZE * AUDIO_BUFFER_FRAME_NUM];\n\nvoid audio_mono2stereo_16bits(uint16_t *dst_buf, uint16_t *src_buf,\n uint32_t src_len) {\n uint32_t i = 0;\n for (i = 0; i < src_len; ++i) {\n dst_buf[i * 2 + 0] = dst_buf[i * 2 + 1] = src_buf[i];\n }\n}\n\nvoid audio_stereo2mono_16bits(uint8_t chnlsel, uint16_t *dst_buf,\n uint16_t *src_buf, uint32_t src_len) {\n uint32_t i = 0;\n for (i = 0; i < src_len; i += 2) {\n dst_buf[i / 2] = src_buf[i + chnlsel];\n }\n}\n\nvoid audio_buffer_init(void) {\n#ifndef _AUDIO_NO_THREAD_\n if (g_audio_queue_mutex_id == NULL)\n g_audio_queue_mutex_id = osMutexCreate((osMutex(g_audio_queue_mutex)));\n#endif\n InitCQueue(&audio_queue, sizeof(audio_queue_buf),\n (unsigned char *)&audio_queue_buf);\n memset(&audio_queue_buf, 0x00, sizeof(audio_queue_buf));\n}\n\nint audio_buffer_length(void) {\n int len;\n#ifndef _AUDIO_NO_THREAD_\n osMutexWait(g_audio_queue_mutex_id, osWaitForever);\n#endif\n len = LengthOfCQueue(&audio_queue);\n#ifndef _AUDIO_NO_THREAD_\n osMutexRelease(g_audio_queue_mutex_id);\n#endif\n return len;\n}\n\nint audio_buffer_set(uint8_t *buff, uint16_t len) {\n int status;\n\n#ifndef _AUDIO_NO_THREAD_\n osMutexWait(g_audio_queue_mutex_id, osWaitForever);\n#endif\n status = EnCQueue(&audio_queue, buff, len);\n#ifndef _AUDIO_NO_THREAD_\n osMutexRelease(g_audio_queue_mutex_id);\n#endif\n return status;\n}\n\nint audio_buffer_get(uint8_t *buff, uint16_t len) {\n uint8_t *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n int status;\n#ifndef _AUDIO_NO_THREAD_\n osMutexWait(g_audio_queue_mutex_id, osWaitForever);\n#endif\n status = PeekCQueue(&audio_queue, len, &e1, &len1, &e2, &len2);\n if (len == (len1 + len2)) {\n memcpy(buff, e1, len1);\n memcpy(buff + len1, e2, len2);\n DeCQueue(&audio_queue, 0, len);\n DeCQueue(&audio_queue, 0, len2);\n } else {\n memset(buff, 0x00, len);\n status = -1;\n }\n#ifndef _AUDIO_NO_THREAD_\n osMutexRelease(g_audio_queue_mutex_id);\n#endif\n return status;\n}\n\nint audio_buffer_set_stereo2mono_16bits(uint8_t *buff, uint16_t len,\n uint8_t chnlsel) {\n int status;\n\n#ifndef _AUDIO_NO_THREAD_\n osMutexWait(g_audio_queue_mutex_id, osWaitForever);\n#endif\n audio_stereo2mono_16bits(chnlsel, (uint16_t *)buff, (uint16_t *)buff,\n len >> 1);\n status = EnCQueue(&audio_queue, buff, len >> 1);\n#ifndef _AUDIO_NO_THREAD_\n osMutexRelease(g_audio_queue_mutex_id);\n#endif\n return status;\n}\n\nint audio_buffer_get_mono2stereo_16bits(uint8_t *buff, uint16_t len) {\n uint8_t *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n int status;\n\n#ifndef _AUDIO_NO_THREAD_\n osMutexWait(g_audio_queue_mutex_id, osWaitForever);\n#endif\n status = PeekCQueue(&audio_queue, len >> 1, &e1, &len1, &e2, &len2);\n if (len >> 1 == len1 + len2) {\n audio_mono2stereo_16bits((uint16_t *)buff, (uint16_t *)e1, len1 >> 1);\n audio_mono2stereo_16bits((uint16_t *)(buff + (len1 << 1)), (uint16_t *)e2,\n len2 >> 1);\n DeCQueue(&audio_queue, 0, len1);\n DeCQueue(&audio_queue, 0, len2);\n status = len;\n } else {\n memset(buff, 0x00, len);\n status = -1;\n }\n#ifndef _AUDIO_NO_THREAD_\n osMutexRelease(g_audio_queue_mutex_id);\n#endif\n return status;\n}\n" }, { "path": "apps/apptester/audiobuffer.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AUDIOBUFFER_H__\n#define __AUDIOBUFFER_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define AUDIO_BUFFER_FRAME_SIZE (4*1024)\n#define AUDIO_BUFFER_FRAME_NUM (1)\n#define AUDIO_BUFFER_TOTAL_SIZE (AUDIO_BUFFER_FRAME_SIZE*AUDIO_BUFFER_FRAME_NUM)\n\nvoid audio_mono2stereo_16bits(uint16_t *dst_buf, uint16_t *src_buf, uint32_t src_len);\n\nvoid audio_stereo2mono_16bits(uint8_t chnlsel, uint16_t *dst_buf, uint16_t *src_buf, uint32_t src_len);\n\nvoid audio_buffer_init(void);\n\nint audio_buffer_length(void);\n\nint audio_buffer_set(uint8_t *buff, uint16_t len);\n\nint audio_buffer_get(uint8_t *buff, uint16_t len);\n\nint audio_buffer_set_stereo2mono_16bits(uint8_t *buff, uint16_t len, uint8_t chnlsel);\n\nint audio_buffer_get_mono2stereo_16bits(uint8_t *buff, uint16_t len);\n\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif//__FMDEC_H__\n" }, { "path": "apps/audioplayers/Makefile", "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nifeq ($(A2DP_DECODER_VER),2)\nobj_cpp := $(filter-out a2dpplay.cpp,$(obj_cpp))\nobj_cpp += a2dp_decoder/\nendif\n\nbt_sco_chain_obj = bt_sco_chain.c bt_sco_chain_thirdparty.c bt_sco_chain_thirdparty_alango.c\nobj_c := $(filter-out $(bt_sco_chain_obj),$(obj_c))\n\nifeq ($(SPEECH_TX_THIRDPARTY_ALANGO),1)\nobj_c += bt_sco_chain_thirdparty_alango.c\nelse ifeq ($(SPEECH_TX_THIRDPARTY),1)\nobj_c += bt_sco_chain_thirdparty.c\nelse\nobj_c += bt_sco_chain.c\nendif\n\nifeq ($(SCO_DMA_SNAPSHOT),1)\nobj_cpp := $(filter-out voicebtpcmplay.cpp,$(obj_cpp))\nelse\nobj_cpp := $(filter-out voicebtpcmplay_sco_dma_snapshot.cpp,$(obj_cpp))\nendif\n\nifeq ($(RB_CODEC),1)\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)rbplay/*.cpp))\nendif\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nCFLAGS_a2dpplay.o += -O3\n\nifeq ($(A2DP_AAC_ON),1)\nAAC_INCLUDES = \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libAACdec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libAACenc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libFDK/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libMpegTPDec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libMpegTPEnc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libPCMutils/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSBRdec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSBRenc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSYS/include\nelse\nAAC_INCLUDES =\nendif\n\nccflags-y := \\\n\t$(AAC_INCLUDES) \\\n\t-Iservices/osif \\\n\t-Iservices/audio_process \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/resources \\\n\t-Iservices/fs/fat/ChaN \\\n\t-Iservices/bt_app \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iutils/cqueue \\\n\t-Iservices/audio_dump/include \\\n\t-Iservices/multimedia/speech/inc \\\n\t-Iservices/multimedia/rbcodec/inc \\\n\t-Iservices/multimedia/audio/process/eq/include \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/fm/inc \\\n\t-Iservices/nv_section/aud_section \\\n\t-Iservices/nv_section/include \\\n\t-Iservices/overlay \\\n\t-Iservices/norflash_api \\\n\t-Iservices/nvrecord \\\n\t-Iservices/nv_section/log_section \\\n\t-Iapps/main \\\n\t-Iapps/audioplayers/rbplay/ \\\n\t-Iapps/audioplayers/a2dp_decoder \\\n\t-Iutils/list \\\n\t-Iutils/heap \\\n\t-Iutils/intersyshci \\\n\t-Irtos/rtos \\\n\t-Iplatform/drivers/ana \\\n\t-Ithirdparty/audio_codec_lib/scalable/ \\\n\t-Ithirdparty/audio_codec_lib/liblhdc-dec/inc \\\n\t-Iapps/apptester \\\n\t-Iapps/key \\\n\t-Iplatform/drivers/bt \\\n\t-Iapps/anc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n\t-Iservices/bt_app/a2dp_codecs/include \\\n\t-Iservices/bt_profiles_enhanced/inc \\\n\t-Iservices/app_ai/inc\n\nifeq ($(IBRT),1)\nccflags-y += -Iservices/ibrt_ui/inc\nccflags-y += -Iservices/ibrt_core/inc\nccflags-y += -Iservices/app_ibrt/inc\nendif\n\nifeq ($(A2DP_LDAC_ON),1)\nccflags-y += -Ithirdparty/audio_codec_lib/ldac/inc\nendif\n\nifeq ($(A2DP_CP_ACCEL),1)\nccflags-y += -Iservices/cp_accel\nelse ifeq ($(SCO_CP_ACCEL),1)\nccflags-y += -Iservices/cp_accel\nendif\n\nifeq ($(APP_TEST_AUDIO),1)\nCFLAGS_app_audio.o += -DAPP_TEST_AUDIO\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_a2dpplay.o += -D__AUDIO_RESAMPLE__\nCFLAGS_voicebtpcmplay.o += -D__AUDIO_RESAMPLE__\nCFLAGS_voicebtpcmplay_sco_dma_snapshot.o += -D__AUDIO_RESAMPLE__\nendif\n\nifeq ($(SW_PLAYBACK_RESAMPLE),1)\nCFLAGS_a2dpplay.o += -DSW_PLAYBACK_RESAMPLE\nendif\n\nifeq ($(RESAMPLE_ANY_SAMPLE_RATE),1)\nCFLAGS_a2dpplay.o += -DRESAMPLE_ANY_SAMPLE_RATE\nendif\n\nifeq ($(SW_SCO_RESAMPLE),1)\nCFLAGS_voicebtpcmplay.o += -DSW_SCO_RESAMPLE\nCFLAGS_voicebtpcmplay_sco_dma_snapshot.o += -DSW_SCO_RESAMPLE\nendif\n\nifeq ($(SPEECH_TX_THIRDPARTY_ALANGO),1)\nCFLAGS_bt_sco_chain_thirdparty_alango.o += -Ithirdparty/alango_lib/include\nendif\n\nifeq ($(VOICE_PROMPT),1)\nCFLAGS_app_audio.o += -DMEDIA_PLAYER_SUPPORT\nendif\n\nifeq ($(AUDIO_QUEUE_SUPPORT),1)\nCFLAGS_app_audio.o += -D__AUDIO_QUEUE_SUPPORT__\nendif\n\nifeq ($(ANC_APP),1)\nCFLAGS_app_audio.o += -DANC_APP\nendif\n\nifeq ($(A2DP_EQ_24BIT),1)\nCFLAGS_app_audio.o += -DA2DP_EQ_24BIT\nCFLAGS_a2dpplay.o += -DA2DP_EQ_24BIT\nendif\n\nifeq ($(A2DP_TRACE_CP_ACCEL),1)\nCFLAGS_a2dpplay.o += -DA2DP_TRACE_CP_ACCEL\nendif\n\nifeq ($(A2DP_TRACE_DEC_TIME),1)\nCFLAGS_a2dpplay.o += -DA2DP_TRACE_DEC_TIME\nendif\n\nifeq ($(A2DP_TRACE_CP_DEC_TIME),1)\nCFLAGS_a2dpplay.o += -DA2DP_TRACE_CP_DEC_TIME\nendif\n\nifeq ($(SPEECH_TX_AEC_CODEC_REF),1)\nCFLAGS_voicebtpcmplay.o += -DSPEECH_TX_AEC_CODEC_REF\nCFLAGS_voicebtpcmplay_sco_dma_snapshot.o += -DSPEECH_TX_AEC_CODEC_REF\nendif\n\nifeq ($(SPEECH_RX_24BIT),1)\nCFLAGS_bt_sco_chain.o += -DSPEECH_RX_24BIT\nCFLAGS_voicebtpcmplay.o += -DSPEECH_RX_24BIT\nCFLAGS_voicebtpcmplay_sco_dma_snapshot.o += -DSPEECH_RX_24BIT\nendif\n\n" }, { "path": "apps/audioplayers/a2dp_decoder/Makefile", "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := a2dp_decoder.o\nobj-y += a2dp_decoder_sbc.o\nCFLAGS_a2dp_decoder_sbc.o += -O3\n\nifeq ($(A2DP_AAC_ON),1)\nobj-y += a2dp_decoder_aac_lc.o\nCFLAGS_a2dp_decoder_aac_lc.o += -O3\nAAC_INCLUDES = \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libAACdec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libAACenc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libFDK/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libMpegTPDec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libMpegTPEnc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libPCMutils/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSBRdec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSBRenc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSYS/include\nelse\nAAC_INCLUDES =\nendif\n\nifeq ($(A2DP_SCALABLE_ON),1)\nobj-y += a2dp_decoder_scalable.o\nCFLAGS_a2dp_decoder_scalable.o += -O3\nSCALABLE_INCLUDES = \\\n\t-Ithirdparty/audio_codec_lib/scalable\nelse\nSCALABLE_INCLUDES =\nendif\n\nifeq ($(A2DP_LHDC_ON),1)\nobj-y += a2dp_decoder_lhdc.o\nCFLAGS_a2dp_decoder_lhdc.o += -O3\nLHDC_INCLUDES = \\\n\t-Ithirdparty/audio_codec_lib/liblhdc-dec/inc\nelse\nLHDC_INCLUDES =\nendif\n\nifeq ($(A2DP_LDAC_ON),1)\nobj-y += a2dp_decoder_ldac.o\nCFLAGS_a2dp_decoder_ldac.o += -O3\nLDAC_INCLUDES = \\\n\t-Ithirdparty/audio_codec_lib/ldac/inc\nelse\nLDAC_INCLUDES =\nendif\n\nccflags-y := \\\n\t$(AAC_INCLUDES) \\\n\t$(SCALABLE_INCLUDES) \\\n\t$(LHDC_INCLUDES) \\\n\t$(LDAC_INCLUDES) \\\n\t-Iservices/audio_process \\\n\t-Iservices/app_ai/inc \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/resources \\\n\t-Iservices/fs/fat/ChaN \\\n\t-Iservices/bt_app \\\n\t-Iservices/bt_app/a2dp_codecs/include \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iutils/cqueue \\\n\t-Iservices/audio_dump/include \\\n\t-Iservices/multimedia/speech/inc \\\n\t-Iservices/multimedia/rbcodec/inc \\\n\t-Iservices/multimedia/audio/process/eq/include \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/fm/inc \\\n\t-Iservices/nv_section/aud_section \\\n\t-Iservices/nv_section/include \\\n\t-Iservices/overlay \\\n\t-Iservices/norflash_api \\\n\t-Iservices/nvrecord \\\n\t-Iservices/nv_section/log_section \\\n\t-Iapps/main \\\n\t-Iapps/audioplayers/rbplay/ \\\n\t-Iapps/audioplayers/a2dp_decoder \\\n\t-Iutils/list \\\n\t-Iutils/heap \\\n\t-Iplatform/drivers/ana \\\n\t-Iapps/apptester \\\n\t-Iapps/key \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n\t-Iplatform/drivers/bt \\\n\t-Iutils/crc32\n\nifeq ($(A2DP_LHDC_ON),1)\nccflags-y += -Iservices/bt_if_enhanced/lhdc_license\nendif\n\nifeq ($(IBRT),1)\nccflags-y += -Iservices/ibrt_core/inc\nccflags-y += -Iservices/ibrt_ui/inc\nccflags-y += -Iservices/app_ibrt/inc\nendif\n\nifeq ($(A2DP_CP_ACCEL),1)\nobj-y += a2dp_decoder_cp.o\nccflags-y += -Iservices/cp_accel\nendif\n\nifeq ($(A2DP_TRACE_CP_ACCEL),1)\nccflags-y += -DA2DP_TRACE_CP_ACCEL\nendif\n\nifeq ($(A2DP_TRACE_DEC_TIME),1)\nccflags-y += -DA2DP_TRACE_DEC_TIME\nendif\n\nifeq ($(A2DP_TRACE_CP_DEC_TIME),1)\nccflags-y += -DA2DP_TRACE_CP_DEC_TIME\nendif\n\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#define __STDC_LIMIT_MACROS\n#include \"a2dp_decoder.h\"\n#include \"a2dp_decoder_internal.h\"\n#include \"app_audio.h\"\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"audioflinger.h\"\n#include \"avdtp_api.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"codec_sbc.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"heap_api.h\"\n#include \"plat_types.h\"\n#include \n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_audio_analysis.h\"\n#include \"app_tws_ibrt_audio_sync.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"bt_drv_interface.h\"\n#include \"btapp.h\"\n#endif\n#include \"audio_prompt_sbc.h\"\n#include \"crc32.h\"\n\n#ifndef A2DP_AUDIO_MEMPOOL_SIZE\n#if defined(A2DP_LDAC_ON)\n#define A2DP_AUDIO_LDAC_MEMPOOL_SIZE (76 * 1024)\n#endif\n#define A2DP_AUDIO_MEMPOOL_SIZE (72 * 1024)\n#endif\n#define A2DP_AUDIO_WAIT_TIMEOUT_MS (500)\n#define A2DP_AUDIO_MUTE_FRAME_CNT_AFTER_NO_CACHE (25)\n#define A2DP_AUDIO_SKIP_FRAME_LIMIT_AFTER_NO_CACHE (50)\n\n#define A2DP_AUDIO_REFILL_AFTER_NO_CACHE (1)\n\n#ifdef __A2DP_AUDIO_SYNC_FIX_DIFF_NOPID__\n#define A2DP_AUDIO_SYNC_INTERVAL (25)\n#else\n#define A2DP_AUDIO_SYNC_INTERVAL (1000)\n#endif\n\n#define A2DP_AUDIO_LATENCY_LOW_FACTOR (1.0f)\n#define A2DP_AUDIO_LATENCY_HIGH_FACTOR (1.6f)\n#define A2DP_AUDIO_LATENCY_MORE_FACTOR (1.2f)\n\n#define A2DP_AUDIO_SYNC_FACTOR_REFERENCE (1.0f)\n#define A2DP_AUDIO_SYNC_FACTOR_FAST_LIMIT (0.00015f)\n#define A2DP_AUDIO_SYNC_FACTOR_SLOW_LIMIT (-0.00035f)\n#define A2DP_AUDIO_SYNC_FACTOR_NEED_FAST_CACHE (-0.001f)\n\n#define A2DP_AUDIO_UNDERFLOW_CAUSE_AUDIO_RETRIGGER (1)\n\nextern A2DP_AUDIO_DECODER_T a2dp_audio_sbc_decoder_config;\n#if defined(A2DP_AAC_ON)\nextern A2DP_AUDIO_DECODER_T a2dp_audio_aac_lc_decoder_config;\n#endif\n#if defined(A2DP_LHDC_ON)\nextern A2DP_AUDIO_DECODER_T a2dp_audio_lhdc_decoder_config;\n#endif\n\n#if defined(A2DP_LDAC_ON)\nextern A2DP_AUDIO_DECODER_T a2dp_audio_ldac_decoder_config;\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\nextern A2DP_AUDIO_DECODER_T a2dp_audio_scalable_decoder_config;\n#endif\n\nosSemaphoreDef(audio_buffer_semaphore);\nosMutexDef(audio_buffer_mutex);\nosMutexDef(audio_status_mutex);\nosMutexDef(audio_stop_mutex);\n\n#ifdef __A2DP_AUDIO_SYNC_FIX_DIFF_NOPID__\n//#define A2DP_AUDIO_SYNC_FIX_DIFF_INTERVA_PRINT_FLOAT (1)\n\n#define A2DP_AUDIO_SYNC_FIX_DIFF_INTERVAL (640)\n#define A2DP_AUDIO_SYNC_FIX_DIFF_FAST_LIMIT (0.003f)\n#define A2DP_AUDIO_SYNC_FIX_DIFF_SLOW_LIMIT (-0.003f)\n\nextern uint32_t app_bt_stream_get_dma_buffer_samples(void);\nstatic int a2dp_audio_sync_fix_diff_proc(uint32_t tick);\nstatic int a2dp_audio_sync_fix_diff_stop(uint32_t tick);\nstatic int32_t a2dp_audio_sync_fix_diff_reset(void);\nstatic int32_t a2dp_audio_sync_fix_diff_start(uint32_t tick);\n\ntypedef enum {\n A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_IDLE,\n A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_START,\n A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_STOP,\n} A2DP_AUDIO_SYNC_FIX_DIFF_STATUS;\n\ntypedef struct {\n int32_t tick;\n A2DP_AUDIO_SYNC_FIX_DIFF_STATUS status;\n} A2DP_AUDIO_SYNC_FIX_DIFF_T;\n\nstatic A2DP_AUDIO_SYNC_FIX_DIFF_T a2dp_audio_sync_fix_diff;\n#endif\n\nA2DP_AUDIO_CONTEXT_T a2dp_audio_context;\n\nstatic heap_handle_t a2dp_audio_heap;\n\nstatic A2DP_AUDIO_LASTFRAME_INFO_T a2dp_audio_lastframe_info;\n\nstatic A2DP_AUDIO_DETECT_NEXT_PACKET_CALLBACK\n a2dp_audio_detect_next_packet_callback = NULL;\nstatic A2DP_AUDIO_DETECT_NEXT_PACKET_CALLBACK a2dp_audio_store_packet_callback =\n NULL;\n\nstatic float a2dp_audio_latency_factor = A2DP_AUDIO_LATENCY_LOW_FACTOR;\nstatic float sync_tune_dest_ratio = 1.0f;\n\nstatic uint32_t store_packet_history_loctime = 0;\n\nstatic uint32_t check_sum_seed = 0;\n\nstatic int a2dp_audio_internal_lastframe_info_ptr_get(\n A2DP_AUDIO_LASTFRAME_INFO_T **lastframe_info);\n\nfloat a2dp_audio_get_sample_reference(void);\nint8_t a2dp_audio_get_current_buf_size(void);\n\nvoid a2dp_audio_heap_init(void *begin_addr, uint32_t size) {\n a2dp_audio_heap = heap_register(begin_addr, size);\n}\n\nvoid *a2dp_audio_heap_malloc(uint32_t size) {\n void *ptr = heap_malloc(a2dp_audio_heap, size);\n ASSERT_A2DP_DECODER(ptr, \"%s size:%d\", __func__, size);\n return ptr;\n}\n\nvoid *a2dp_audio_heap_cmalloc(uint32_t size) {\n void *ptr = heap_malloc(a2dp_audio_heap, size);\n ASSERT_A2DP_DECODER(ptr, \"%s size:%d\", __func__, size);\n memset(ptr, 0, size);\n return ptr;\n}\n\nvoid *a2dp_audio_heap_realloc(void *rmem, uint32_t newsize) {\n void *ptr = heap_realloc(a2dp_audio_heap, rmem, newsize);\n ASSERT_A2DP_DECODER(ptr, \"%s rmem:%p size:%d\", __func__, rmem, newsize);\n return ptr;\n}\n\nvoid a2dp_audio_heap_free(void *rmem) {\n ASSERT_A2DP_DECODER(rmem, \"%s rmem:%p\", __func__, rmem);\n heap_free(a2dp_audio_heap, rmem);\n}\n\nvoid a2dp_audio_heap_info(size_t *total, size_t *used, size_t *max_used) {\n multi_heap_info_t info;\n heap_get_info(a2dp_audio_heap, &info);\n\n if (total != NULL)\n *total = info.total_bytes;\n\n if (used != NULL)\n *used = info.total_allocated_bytes;\n\n if (max_used != NULL)\n *max_used = info.total_bytes - info.minimum_free_bytes;\n}\n\nint inline a2dp_audio_semaphore_init(void) {\n if (a2dp_audio_context.audio_semaphore.semaphore == NULL) {\n a2dp_audio_context.audio_semaphore.semaphore =\n osSemaphoreCreate(osSemaphore(audio_buffer_semaphore), 0);\n }\n a2dp_audio_context.audio_semaphore.enalbe = false;\n return 0;\n}\n\nint inline a2dp_audio_buffer_mutex_init(void) {\n if (a2dp_audio_context.audio_buffer_mutex == NULL) {\n a2dp_audio_context.audio_buffer_mutex =\n osMutexCreate((osMutex(audio_buffer_mutex)));\n }\n return 0;\n}\n\nint inline a2dp_audio_buffer_mutex_lock(void) {\n osMutexWait((osMutexId)a2dp_audio_context.audio_buffer_mutex, osWaitForever);\n return 0;\n}\n\nint inline a2dp_audio_buffer_mutex_unlock(void) {\n osMutexRelease((osMutexId)a2dp_audio_context.audio_buffer_mutex);\n return 0;\n}\n\nint inline a2dp_audio_status_mutex_init(void) {\n if (a2dp_audio_context.audio_status_mutex == NULL) {\n a2dp_audio_context.audio_status_mutex =\n osMutexCreate((osMutex(audio_status_mutex)));\n }\n return 0;\n}\n\nint inline a2dp_audio_status_mutex_lock(void) {\n osMutexWait((osMutexId)a2dp_audio_context.audio_status_mutex, osWaitForever);\n return 0;\n}\n\nint inline a2dp_audio_status_mutex_unlock(void) {\n osMutexRelease((osMutexId)a2dp_audio_context.audio_status_mutex);\n return 0;\n}\n\nint inline a2dp_audio_semaphore_wait(uint32_t timeout_ms) {\n osSemaphoreId semaphore_id =\n (osSemaphoreId)a2dp_audio_context.audio_semaphore.semaphore;\n\n a2dp_audio_buffer_mutex_lock();\n a2dp_audio_context.audio_semaphore.enalbe = true;\n a2dp_audio_buffer_mutex_unlock();\n\n int32_t nRet = osSemaphoreWait(semaphore_id, timeout_ms);\n if ((0 == nRet) || (-1 == nRet)) {\n TRACE_A2DP_DECODER_W(\"%s wait timerout\", __func__);\n return -1;\n }\n return 0;\n}\n\nint inline a2dp_audio_semaphore_release(void) {\n bool enalbe = false;\n\n a2dp_audio_buffer_mutex_lock();\n if (a2dp_audio_context.audio_semaphore.enalbe) {\n a2dp_audio_context.audio_semaphore.enalbe = false;\n enalbe = true;\n }\n a2dp_audio_buffer_mutex_unlock();\n\n if (enalbe) {\n osSemaphoreId semaphore_id =\n (osSemaphoreId)a2dp_audio_context.audio_semaphore.semaphore;\n osSemaphoreRelease(semaphore_id);\n }\n return 0;\n}\n\nlist_node_t *a2dp_audio_list_begin(const list_t *list) {\n a2dp_audio_buffer_mutex_lock();\n list_node_t *node = list_begin(list);\n a2dp_audio_buffer_mutex_unlock();\n return node;\n}\n\nlist_node_t *a2dp_audio_list_end(const list_t *list) {\n a2dp_audio_buffer_mutex_lock();\n list_node_t *node = list_end(list);\n a2dp_audio_buffer_mutex_unlock();\n return node;\n}\n\nuint32_t a2dp_audio_list_length(const list_t *list) {\n a2dp_audio_buffer_mutex_lock();\n uint32_t length = list_length(list);\n a2dp_audio_buffer_mutex_unlock();\n return length;\n}\n\nvoid *a2dp_audio_list_node(const list_node_t *node) {\n a2dp_audio_buffer_mutex_lock();\n void *data = list_node(node);\n a2dp_audio_buffer_mutex_unlock();\n return data;\n}\n\nlist_node_t *a2dp_audio_list_next(const list_node_t *node) {\n a2dp_audio_buffer_mutex_lock();\n list_node_t *next = list_next(node);\n a2dp_audio_buffer_mutex_unlock();\n return next;\n}\n\nbool a2dp_audio_list_remove(list_t *list, void *data) {\n a2dp_audio_buffer_mutex_lock();\n bool nRet = list_remove(list, data);\n a2dp_audio_buffer_mutex_unlock();\n return nRet;\n}\n\nbool a2dp_audio_list_append(list_t *list, void *data) {\n a2dp_audio_buffer_mutex_lock();\n bool nRet = list_append(list, data);\n a2dp_audio_buffer_mutex_unlock();\n return nRet;\n}\n\nvoid a2dp_audio_list_clear(list_t *list) {\n a2dp_audio_buffer_mutex_lock();\n list_clear(list);\n a2dp_audio_buffer_mutex_unlock();\n}\n\nvoid a2dp_audio_list_free(list_t *list) {\n a2dp_audio_buffer_mutex_lock();\n list_free(list);\n a2dp_audio_buffer_mutex_unlock();\n}\n\nlist_t *a2dp_audio_list_new(list_free_cb callback, list_mempool_zmalloc zmalloc,\n list_mempool_free free) {\n a2dp_audio_buffer_mutex_lock();\n list_t *list = list_new(callback, zmalloc, free);\n a2dp_audio_buffer_mutex_unlock();\n return list;\n}\n\nuint32_t a2dp_audio_get_passed(uint32_t curr_ticks, uint32_t prev_ticks,\n uint32_t max_ticks) {\n if (curr_ticks < prev_ticks)\n return ((max_ticks - prev_ticks + 1) + curr_ticks);\n else\n return (curr_ticks - prev_ticks);\n}\n\n#ifdef A2DP_CP_ACCEL\nextern \"C\" uint32_t get_in_cp_frame_cnt(void);\nextern \"C\" uint32_t get_in_cp_frame_delay(void);\n#else\nstatic uint32_t get_in_cp_frame_cnt(void) { return 0; }\n\nstatic uint32_t get_in_cp_frame_delay(void) { return 0; }\n#endif\n\nint inline a2dp_audio_set_status(\n enum A2DP_AUDIO_DECODER_STATUS decoder_status) {\n a2dp_audio_status_mutex_lock();\n a2dp_audio_context.audio_decoder_status = decoder_status;\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nenum A2DP_AUDIO_DECODER_STATUS inline a2dp_audio_get_status(void) {\n enum A2DP_AUDIO_DECODER_STATUS decoder_status;\n a2dp_audio_status_mutex_lock();\n decoder_status = a2dp_audio_context.audio_decoder_status;\n a2dp_audio_status_mutex_unlock();\n\n return decoder_status;\n}\n\nint inline a2dp_audio_set_store_packet_status(\n enum A2DP_AUDIO_DECODER_STORE_PACKET_STATUS store_packet_status) {\n a2dp_audio_status_mutex_lock();\n a2dp_audio_context.store_packet_status = store_packet_status;\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nenum A2DP_AUDIO_DECODER_STORE_PACKET_STATUS inline a2dp_audio_get_store_packet_status(\n void) {\n enum A2DP_AUDIO_DECODER_STORE_PACKET_STATUS store_packet_status;\n a2dp_audio_status_mutex_lock();\n store_packet_status = a2dp_audio_context.store_packet_status;\n a2dp_audio_status_mutex_unlock();\n\n return store_packet_status;\n}\n\nint inline a2dp_audio_set_playback_status(\n enum A2DP_AUDIO_DECODER_PLAYBACK_STATUS playback_status) {\n a2dp_audio_status_mutex_lock();\n a2dp_audio_context.playback_status = playback_status;\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nenum A2DP_AUDIO_DECODER_PLAYBACK_STATUS inline a2dp_audio_get_playback_status(\n void) {\n enum A2DP_AUDIO_DECODER_PLAYBACK_STATUS playback_status;\n a2dp_audio_status_mutex_lock();\n playback_status = a2dp_audio_context.playback_status;\n a2dp_audio_status_mutex_unlock();\n\n return playback_status;\n}\n\nstatic void a2dp_decoder_info_checker(void) {\n // app_bt_start_custom_function_in_app_thread(0, 0,\n // (uint32_t)bt_drv_reg_op_bt_info_checker);\n}\n\nint a2dp_audio_sync_pid_config(void) {\n A2DP_AUDIO_SYNC_T *audio_sync = &a2dp_audio_context.audio_sync;\n A2DP_AUDIO_SYNC_PID_T *pid = &audio_sync->pid;\n\n pid->proportiongain = 0.4f;\n pid->integralgain = 0.1f;\n pid->derivativegain = 0.6f;\n\n return 0;\n}\n\nint a2dp_audio_sync_reset_data(void) {\n A2DP_AUDIO_SYNC_T *audio_sync = &a2dp_audio_context.audio_sync;\n\n a2dp_audio_status_mutex_lock();\n audio_sync->tick = 0;\n audio_sync->cnt = 0;\n a2dp_audio_sync_pid_config();\n#ifdef __A2DP_AUDIO_SYNC_FIX_DIFF_NOPID__\n a2dp_audio_sync_fix_diff_reset();\n#endif\n a2dp_audio_status_mutex_unlock();\n\n TRACE_A2DP_DECODER_I(\"[SYNC]reset_data\");\n return 0;\n}\n\nint a2dp_audio_sync_init(double ratio) {\n#ifdef __A2DP_AUDIO_SYNC_FIX_DIFF_NOPID__\n a2dp_audio_sync_fix_diff_reset();\n#endif\n a2dp_audio_sync_reset_data();\n a2dp_audio_sync_tune_sample_rate(ratio);\n sync_tune_dest_ratio = (float)ratio;\n return 0;\n}\n\nint a2dp_audio_sync_tune_sample_rate(double ratio) {\n float resample_rate_ratio;\n bool need_tune = false;\n\n a2dp_audio_status_mutex_lock();\n if (a2dp_audio_context.output_cfg.factor_reference != (float)ratio) {\n a2dp_audio_context.output_cfg.factor_reference = (float)ratio;\n resample_rate_ratio = (float)(ratio - (double)1.0);\n need_tune = true;\n }\n // a2dp_audio_status_mutex_unlock();\n\n if (need_tune) {\n app_audio_manager_tune_samplerate_ratio(AUD_STREAM_PLAYBACK,\n resample_rate_ratio);\n TRACE_A2DP_DECODER_I(\"[SYNC] ppb:%d ratio:%08d\",\n (int32_t)(resample_rate_ratio * 10000000),\n (int32_t)(ratio * 10000000));\n }\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nint a2dp_audio_sync_direct_tune_sample_rate(double ratio) {\n float resample_rate_ratio;\n bool need_tune = false;\n\n a2dp_audio_status_mutex_lock();\n if (a2dp_audio_context.output_cfg.factor_reference != (float)ratio) {\n a2dp_audio_context.output_cfg.factor_reference = (float)ratio;\n resample_rate_ratio = (float)(ratio - (double)1.0);\n need_tune = true;\n }\n\n if (need_tune) {\n af_codec_direct_tune(AUD_STREAM_PLAYBACK, resample_rate_ratio);\n\n TRACE_A2DP_DECODER_I(\"[SYNC] ppb:%d ratio:%08d\",\n (int32_t)(resample_rate_ratio * 10000000),\n (int32_t)(ratio * 10000000));\n }\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nbool a2dp_audio_sync_tune_onprocess(void) {\n bool nRet = false;\n ;\n if (a2dp_audio_context.output_cfg.factor_reference != sync_tune_dest_ratio) {\n nRet = true;\n }\n return nRet;\n}\n\nint a2dp_audio_sync_tune(float ratio) {\n int nRet = 0;\n if (sync_tune_dest_ratio == ratio) {\n goto exit;\n }\n sync_tune_dest_ratio = ratio;\n#if defined(IBRT)\n if (app_ibrt_ui_is_profile_exchanged()) {\n if (app_tws_ibrt_mobile_link_connected()) {\n APP_TWS_IBRT_AUDIO_SYNC_TUNE_T sync_tune;\n sync_tune.factor_reference = ratio;\n if (!app_tws_ibrt_audio_sync_tune_need_skip()) {\n tws_ctrl_send_cmd(APP_TWS_CMD_SYNC_TUNE, (uint8_t *)&sync_tune,\n sizeof(APP_TWS_IBRT_AUDIO_SYNC_TUNE_T));\n } else {\n a2dp_audio_sync_tune_cancel();\n nRet = -1;\n }\n }\n } else {\n a2dp_audio_sync_tune_sample_rate(ratio);\n }\n#else\n a2dp_audio_sync_tune_sample_rate(ratio);\n#endif\nexit:\n return nRet;\n}\n\nint a2dp_audio_sync_tune_cancel(void) {\n sync_tune_dest_ratio = a2dp_audio_context.output_cfg.factor_reference;\n return 0;\n}\n\nfloat a2dp_audio_sync_pid_calc(A2DP_AUDIO_SYNC_PID_T *pid, float diff) {\n float increment;\n float pError, dError, iError;\n\n pid->error[0] = diff;\n pError = pid->error[0] - pid->error[1];\n iError = pid->error[0];\n dError = pid->error[0] - 2 * pid->error[1] + pid->error[2];\n\n increment = pid->proportiongain * pError + pid->integralgain * iError +\n pid->derivativegain * dError;\n\n pid->error[2] = pid->error[1];\n pid->error[1] = pid->error[0];\n\n pid->result += increment;\n\n return pid->result;\n}\n\n#ifdef __A2DP_AUDIO_SYNC_FIX_DIFF_NOPID__\nstatic int a2dp_audio_sync_fix_diff_proc(uint32_t tick) {\n if (a2dp_audio_sync_fix_diff.status ==\n A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_START) {\n if (a2dp_audio_sync_fix_diff.tick > 0) {\n a2dp_audio_sync_fix_diff.tick--;\n } else {\n a2dp_audio_sync_fix_diff_stop(0);\n }\n }\n return 0;\n}\n\nstatic int32_t a2dp_audio_sync_fix_diff_start(uint32_t tick) {\n TRACE_A2DP_DECODER_I(\"[SYNC] fix diff start\");\n\n a2dp_audio_sync_fix_diff.status = A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_START;\n a2dp_audio_sync_fix_diff.tick = tick;\n return 0;\n}\n\nstatic int a2dp_audio_sync_fix_diff_stop(uint32_t tick) {\n TRACE_A2DP_DECODER_I(\"[SYNC] fix diff stop\");\n\n a2dp_audio_sync_fix_diff.status = A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_STOP;\n a2dp_audio_sync_fix_diff.tick = 0;\n\n return 0;\n}\n\nstatic int32_t a2dp_audio_sync_fix_diff_reset(void) {\n TRACE_A2DP_DECODER_I(\"[SYNC] fix diff reset\");\n\n a2dp_audio_sync_fix_diff.status = A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_IDLE;\n a2dp_audio_sync_fix_diff.tick = 0;\n\n return 0;\n}\n\nstatic A2DP_AUDIO_SYNC_FIX_DIFF_STATUS\na2dp_audio_sync_fix_diff_status_get(void) {\n return a2dp_audio_sync_fix_diff.status;\n}\n\nint a2dp_audio_sync_handler(uint8_t *buffer, uint32_t buffer_bytes) {\n A2DP_AUDIO_LASTFRAME_INFO_T *lastframe_info = NULL;\n A2DP_AUDIO_SYNC_T *audio_sync = &a2dp_audio_context.audio_sync;\n float diff_mtu = 0;\n bool need_tune = false;\n bool force_slow = false;\n\n#if defined(IBRT)\n if (!app_tws_ibrt_mobile_link_connected()) {\n return -1;\n }\n#endif\n if (a2dp_audio_internal_lastframe_info_ptr_get(&lastframe_info) < 0) {\n return -1;\n }\n\n a2dp_audio_sync_fix_diff_proc(audio_sync->tick);\n if (a2dp_audio_sync_fix_diff_status_get() ==\n A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_STOP) {\n#if defined(IBRT)\n if (!app_tws_ibrt_audio_sync_tune_onprocess() &&\n !a2dp_audio_sync_tune_onprocess()\n#else\n if (!a2dp_audio_sync_tune_onprocess()\n#endif\n ) {\n int sync_tune_result = 0;\n if (a2dp_audio_context.output_cfg.factor_reference !=\n a2dp_audio_context.init_factor_reference) {\n sync_tune_result =\n a2dp_audio_sync_tune(a2dp_audio_context.init_factor_reference);\n }\n if (!sync_tune_result) {\n a2dp_audio_sync_fix_diff_reset();\n#ifdef A2DP_AUDIO_SYNC_FIX_DIFF_INTERVA_PRINT_FLOAT\n TRACE_A2DP_DECODER_I(\"[SYNC] tune ratio normal %f mut:%5.3f->%d\",\n (double)a2dp_audio_context.init_factor_reference,\n (double)a2dp_audio_context.average_packet_mut,\n a2dp_audio_context.dest_packet_mut);\n#else\n TRACE_A2DP_DECODER_I(\n \"[SYNC] tune ratio normal %d mut:%d->%d\",\n (int32_t)(a2dp_audio_context.init_factor_reference * 10000000),\n (int32_t)(a2dp_audio_context.average_packet_mut + 0.5f),\n a2dp_audio_context.dest_packet_mut);\n#endif\n } else {\n TRACE_A2DP_DECODER_I(\"[SYNC] tune ratio normal busy\");\n }\n\n } else {\n#ifdef A2DP_AUDIO_SYNC_FIX_DIFF_INTERVA_PRINT_FLOAT\n TRACE_A2DP_DECODER_I(\"[SYNC] tune ratio busy %f mut:%5.3f->%d\",\n (double)a2dp_audio_context.init_factor_reference,\n (double)a2dp_audio_context.average_packet_mut,\n a2dp_audio_context.dest_packet_mut);\n#else\n TRACE_A2DP_DECODER_I(\n \"[SYNC] tune ratio busy %d mut:%d->%d\",\n (int32_t)(a2dp_audio_context.init_factor_reference * 10000000),\n (int32_t)(a2dp_audio_context.average_packet_mut + 0.5f),\n a2dp_audio_context.dest_packet_mut);\n#endif\n }\n goto exit;\n }\n\n if (audio_sync->tick % A2DP_AUDIO_SYNC_INTERVAL == 0) {\n diff_mtu = a2dp_audio_context.average_packet_mut -\n (float)a2dp_audio_context.dest_packet_mut;\n if (ABS(diff_mtu) < 0.6f) {\n#ifdef A2DP_AUDIO_SYNC_FIX_DIFF_INTERVA_PRINT_FLOAT\n TRACE_A2DP_DECODER_I(\"[SYNC] skip mut:%5.3f\", (double)diff_mtu);\n#else\n TRACE_A2DP_DECODER_I(\"[SYNC] skip mut:0.%d\", (int32_t)(diff_mtu * 10));\n#endif\n goto exit;\n } else if (diff_mtu / a2dp_audio_context.dest_packet_mut < -0.2f) {\n float curr_ratio = a2dp_audio_context.output_cfg.factor_reference;\n float ref_ratio = a2dp_audio_context.init_factor_reference;\n if (curr_ratio != (ref_ratio + A2DP_AUDIO_SYNC_FIX_DIFF_SLOW_LIMIT)) {\n#ifdef A2DP_AUDIO_SYNC_FIX_DIFF_INTERVA_PRINT_FLOAT\n TRACE_A2DP_DECODER_I(\"[SYNC] force slow mut:%5.3f\", (double)diff_mtu);\n#else\n TRACE_A2DP_DECODER_I(\"[SYNC] force slow mut:0.%d\",\n (int32_t)(diff_mtu * 10));\n#endif\n force_slow = true;\n }\n }\n if (a2dp_audio_sync_fix_diff_status_get() ==\n A2DP_AUDIO_SYNC_FIX_DIFF_STATUS_IDLE ||\n force_slow) {\n uint32_t dma_buffer_samples, samples, dma_interval;\n double ratio = 1.0, limit_ratio = 1.0;\n float sampleRate, ref_ratio, curr_ratio;\n float ref_us = 0;\n float dest_us = 0;\n float sample_us = 0;\n\n dma_buffer_samples = app_bt_stream_get_dma_buffer_samples() / 2;\n dma_interval = A2DP_AUDIO_SYNC_FIX_DIFF_INTERVAL;\n\n ref_ratio = a2dp_audio_context.init_factor_reference;\n curr_ratio = a2dp_audio_context.output_cfg.factor_reference;\n\n samples = dma_interval * dma_buffer_samples;\n sampleRate = lastframe_info->stream_info.sample_rate * ref_ratio;\n\n sample_us = 1e6 / sampleRate;\n ref_us = sample_us * (float)samples;\n dest_us = sample_us * (float)(lastframe_info->frame_samples * diff_mtu);\n ratio = ref_us / (ref_us - dest_us) * curr_ratio;\n\n if (ratio > (double)(ref_ratio + A2DP_AUDIO_SYNC_FIX_DIFF_FAST_LIMIT)) {\n limit_ratio = ref_ratio + A2DP_AUDIO_SYNC_FIX_DIFF_FAST_LIMIT;\n } else if (ratio <\n double(ref_ratio + A2DP_AUDIO_SYNC_FIX_DIFF_SLOW_LIMIT)) {\n limit_ratio = ref_ratio + A2DP_AUDIO_SYNC_FIX_DIFF_SLOW_LIMIT;\n } else {\n limit_ratio = ratio;\n }\n TRACE_A2DP_DECODER_I(\n \"[SYNC] sampleRate:%d ref_ratio:%d samples:%d %d->%d\",\n (int32_t)sampleRate, (int32_t)(ref_ratio * 10000000), samples,\n (int32_t)ref_us, (int32_t)dest_us);\n need_tune = true;\n#if defined(IBRT)\n if (!app_tws_ibrt_audio_sync_tune_onprocess() &&\n !a2dp_audio_sync_tune_onprocess() &&\n#else\n if (!a2dp_audio_sync_tune_onprocess() &&\n#endif\n need_tune) {\n if (!a2dp_audio_sync_tune((float)limit_ratio)) {\n a2dp_audio_sync_fix_diff_start(dma_interval);\n#ifdef A2DP_AUDIO_SYNC_FIX_DIFF_INTERVA_PRINT_FLOAT\n TRACE_A2DP_DECODER_I(\"[SYNC] tune ratio %f mut:%5.3f->%d\",\n limit_ratio,\n (double)a2dp_audio_context.average_packet_mut,\n a2dp_audio_context.dest_packet_mut);\n#else\n TRACE_A2DP_DECODER_I(\n \"[SYNC] tune ratio %d mut:%d->%d\",\n (int32_t)(limit_ratio * 10000000),\n (int32_t)(a2dp_audio_context.average_packet_mut + 0.5f),\n a2dp_audio_context.dest_packet_mut);\n#endif\n } else {\n TRACE_A2DP_DECODER_I(\"[SYNC] tune ratio busy\");\n }\n }\n } else {\n TRACE_A2DP_DECODER_I(\n \"[SYNC] avg_mut:%d dest_mtu:%d\",\n (int32_t)(a2dp_audio_context.average_packet_mut + 0.5f),\n a2dp_audio_context.dest_packet_mut);\n }\n } else {\n }\nexit:\n audio_sync->tick++;\n return 0;\n}\n#else\nint a2dp_audio_sync_handler(uint8_t *buffer, uint32_t buffer_bytes) {\n A2DP_AUDIO_LASTFRAME_INFO_T *lastframe_info = NULL;\n A2DP_AUDIO_SYNC_T *audio_sync = &a2dp_audio_context.audio_sync;\n float dest_pid_result = .0f;\n float diff_mtu = 0;\n int32_t frame_mtu = 0;\n int32_t total_mtu = 0;\n float diff_factor = 0;\n\n#if defined(IBRT)\n if (!app_tws_ibrt_mobile_link_connected()) {\n return -1;\n }\n#endif\n if (a2dp_audio_internal_lastframe_info_ptr_get(&lastframe_info) < 0) {\n return -1;\n }\n\n if (audio_sync->tick++ % A2DP_AUDIO_SYNC_INTERVAL == 0) {\n list_t *list = a2dp_audio_context.audio_datapath.input_raw_packet_list;\n A2DP_AUDIO_SYNC_PID_T *pid = &audio_sync->pid;\n // valid limter 0x80000\n if (audio_sync->cnt < 0x80000) {\n audio_sync->cnt += A2DP_AUDIO_SYNC_INTERVAL;\n }\n frame_mtu = lastframe_info->stream_info.frame_samples /\n lastframe_info->frame_samples;\n total_mtu = audio_sync->cnt * frame_mtu;\n diff_mtu = a2dp_audio_context.average_packet_mut -\n (float)a2dp_audio_context.dest_packet_mut;\n#if 1\n TRACE_A2DP_DECODER_I(\n \"[SYNC] sample:%d/%d diff:%d/%d/%d/%d curr:%d\",\n lastframe_info->frame_samples,\n lastframe_info->stream_info.frame_samples, (int32_t)(diff_mtu + 0.5f),\n (int32_t)(a2dp_audio_context.average_packet_mut + 0.5f),\n a2dp_audio_context.dest_packet_mut, total_mtu,\n a2dp_audio_list_length(list) + get_in_cp_frame_cnt());\n#else\n TRACE_A2DP_DECODER_I(\n \"[SYNC] diff:%10.9f/%10.9f frame_mut:%d dest:%d total:%d curr:%d\",\n (double)diff_mtu, (double)a2dp_audio_context.average_packet_mut,\n frame_mtu, a2dp_audio_context.dest_packet_mut, total_mtu,\n a2dp_audio_list_length(list));\n TRACE_A2DP_DECODER_I(\"[SYNC] try tune:%d, %10.9f %10.9f\",\n diff_mtu != 0.f && audio_sync->tick != 1\n ? ABS(diff_mtu) > ((float)frame_mtu * 0.2f)\n : 0,\n (double)ABS(diff_mtu),\n (double)((float)frame_mtu * 0.2f));\n#endif\n // TRACE(2,\"audio_sync tune %d/%d tick\",\n // app_tws_ibrt_audio_sync_tune_onprocess(),\n // a2dp_audio_sync_tune_onprocess(), audio_sync->tick);\n\n#if defined(IBRT)\n if ((!app_tws_ibrt_audio_sync_tune_onprocess() &&\n !a2dp_audio_sync_tune_onprocess()) &&\n#else\n if (!a2dp_audio_sync_tune_onprocess() &&\n#endif\n diff_mtu != 0.f && audio_sync->tick != 1 &&\n ((ABS(diff_mtu) > ((float)frame_mtu * 0.25f) && diff_mtu > 0) ||\n (ABS(diff_mtu) > ((float)frame_mtu * 0.1f) && diff_mtu < 0))) {\n diff_factor = diff_mtu / a2dp_audio_context.average_packet_mut;\n if (a2dp_audio_sync_pid_calc(pid, diff_factor)) {\n dest_pid_result =\n a2dp_audio_context.output_cfg.factor_reference + pid->result;\n\n if (dest_pid_result > (A2DP_AUDIO_SYNC_FACTOR_REFERENCE +\n A2DP_AUDIO_SYNC_FACTOR_FAST_LIMIT)) {\n dest_pid_result = A2DP_AUDIO_SYNC_FACTOR_REFERENCE +\n A2DP_AUDIO_SYNC_FACTOR_FAST_LIMIT;\n } else if (dest_pid_result < (A2DP_AUDIO_SYNC_FACTOR_REFERENCE +\n A2DP_AUDIO_SYNC_FACTOR_SLOW_LIMIT)) {\n dest_pid_result = A2DP_AUDIO_SYNC_FACTOR_REFERENCE +\n A2DP_AUDIO_SYNC_FACTOR_SLOW_LIMIT;\n }\n\n if (a2dp_audio_context.output_cfg.factor_reference != dest_pid_result) {\n if (!a2dp_audio_sync_tune(dest_pid_result)) {\n audio_sync->cnt = 0;\n }\n TRACE_A2DP_DECODER_I(\n \"[SYNC] tune diff_factor:%10.9f pid:%10.9f tune:%10.9f\",\n (double)diff_factor, (double)pid->result,\n (double)dest_pid_result);\n } else {\n TRACE_A2DP_DECODER_I(\"[SYNC] tune skip same\");\n }\n }\n } else {\n /*\n TRACE_A2DP_DECODER_I(\"[SYNC] tune busy skip proc:%d/%d mtu:%d\n tick:%d >0:%d <0:%d tick:%d\", app_tws_ibrt_audio_sync_tune_onprocess(),\n a2dp_audio_sync_tune_onprocess(),\n diff_mtu != 0.f,\n audio_sync->tick != 1,\n (ABS(diff_mtu) >\n ((float)frame_mtu * 0.25f) && diff_mtu > 0), (ABS(diff_mtu) >\n ((float)frame_mtu * 0.1f) && diff_mtu < 0), audio_sync->tick);\n */\n }\n } else {\n bool need_tune = false;\n if (lastframe_info->undecode_min_frames * 10 <=\n a2dp_audio_context.dest_packet_mut * 10 / 3) {\n dest_pid_result = a2dp_audio_context.init_factor_reference +\n A2DP_AUDIO_SYNC_FACTOR_NEED_FAST_CACHE;\n need_tune = true;\n } else if (lastframe_info->undecode_min_frames * 10 <=\n a2dp_audio_context.dest_packet_mut * 20 / 3) {\n dest_pid_result = a2dp_audio_context.init_factor_reference +\n A2DP_AUDIO_SYNC_FACTOR_SLOW_LIMIT;\n need_tune = true;\n }\n#if defined(IBRT)\n if (!app_tws_ibrt_audio_sync_tune_onprocess() &&\n !a2dp_audio_sync_tune_onprocess() &&\n#else\n if (!a2dp_audio_sync_tune_onprocess() &&\n#endif\n\n need_tune) {\n if (a2dp_audio_context.output_cfg.factor_reference != dest_pid_result) {\n a2dp_audio_sync_reset_data();\n a2dp_audio_sync_tune(dest_pid_result);\n TRACE_A2DP_DECODER_I(\"[SYNC] tune ratio force slow %d/%d->%d\",\n lastframe_info->undecode_min_frames,\n lastframe_info->undecode_max_frames,\n a2dp_audio_context.dest_packet_mut);\n }\n }\n }\n return 0;\n}\n#endif\n\n#if A2DP_DECODER_HISTORY_SEQ_SAVE\nstatic int a2dp_audio_reset_history_seq(void) {\n a2dp_audio_status_mutex_lock();\n for (uint8_t i = 0; i < A2DP_DECODER_HISTORY_SEQ_SAVE; i++) {\n a2dp_audio_context.historySeq[i] = 0;\n#ifdef A2DP_DECODER_HISTORY_LOCTIME_SAVE\n a2dp_audio_context.historyLoctime[i] = 0;\n#endif\n#ifdef A2DP_DECODER_HISTORY_CHECK_SUM_SAVE\n a2dp_audio_context.historyChecksum[i] = 0;\n#endif\n }\n a2dp_audio_context.historySeq_idx = 0;\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nstatic int a2dp_audio_save_history_seq(btif_media_header_t *header,\n unsigned char *buf, unsigned int len) {\n uint16_t historySeqPre = 0;\n uint8_t historySeq_idx = 0;\n\n a2dp_audio_status_mutex_lock();\n historySeq_idx = a2dp_audio_context.historySeq_idx;\n if (historySeq_idx) {\n historySeq_idx = (historySeq_idx - 1) % A2DP_DECODER_HISTORY_SEQ_SAVE;\n historySeqPre = a2dp_audio_context.historySeq[historySeq_idx];\n if ((header->sequenceNumber - historySeqPre) != 1) {\n TRACE_A2DP_DECODER_W(\"[INPUT] SEQ ERR %d/%d\", historySeqPre,\n header->sequenceNumber);\n a2dp_audio_show_history_seq();\n }\n }\n historySeq_idx =\n a2dp_audio_context.historySeq_idx % A2DP_DECODER_HISTORY_SEQ_SAVE;\n a2dp_audio_context.historySeq[historySeq_idx] = header->sequenceNumber;\n#ifdef A2DP_DECODER_HISTORY_LOCTIME_SAVE\n a2dp_audio_context.historyLoctime[historySeq_idx] = hal_fast_sys_timer_get();\n#endif\n#ifdef A2DP_DECODER_HISTORY_CHECK_SUM_SAVE\n a2dp_audio_context.historyChecksum[historySeq_idx] = crc32(0, buf, len);\n#endif\n a2dp_audio_context.historySeq_idx++;\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nint a2dp_audio_show_history_seq(void) {\n uint8_t i = 0, j = 1;\n uint16_t reordHistorySeq[A2DP_DECODER_HISTORY_SEQ_SAVE];\n#ifdef A2DP_DECODER_HISTORY_LOCTIME_SAVE\n int32_t diff_max_idx = 0;\n int32_t diff_max_ms = 0;\n int64_t diff_avg_ms = 0;\n int32_t diff_avg_cnt = 0;\n uint32_t historyLoctime[A2DP_DECODER_HISTORY_SEQ_SAVE];\n#endif\n#ifdef A2DP_DECODER_HISTORY_CHECK_SUM_SAVE\n uint32_t historyChecksum[A2DP_DECODER_HISTORY_SEQ_SAVE];\n#endif\n\n a2dp_audio_status_mutex_lock();\n for (i = 0; i < A2DP_DECODER_HISTORY_SEQ_SAVE; i++) {\n reordHistorySeq[i] = a2dp_audio_context.historySeq[i];\n#ifdef A2DP_DECODER_HISTORY_LOCTIME_SAVE\n historyLoctime[i] = a2dp_audio_context.historyLoctime[i];\n#endif\n#ifdef A2DP_DECODER_HISTORY_CHECK_SUM_SAVE\n historyChecksum[i] = a2dp_audio_context.historyChecksum[i];\n#endif\n }\n\n for (i = 0; i < A2DP_DECODER_HISTORY_SEQ_SAVE - 1; i++) {\n for (j = 0; j < A2DP_DECODER_HISTORY_SEQ_SAVE - 1 - i; j++) {\n if (reordHistorySeq[j] > reordHistorySeq[j + 1]) {\n uint16_t temp_seq = reordHistorySeq[j];\n reordHistorySeq[j] = reordHistorySeq[j + 1];\n reordHistorySeq[j + 1] = temp_seq;\n#ifdef A2DP_DECODER_HISTORY_LOCTIME_SAVE\n uint32_t temp_Loctime = historyLoctime[j];\n historyLoctime[j] = historyLoctime[j + 1];\n historyLoctime[j + 1] = temp_Loctime;\n#endif\n#ifdef A2DP_DECODER_HISTORY_CHECK_SUM_SAVE\n uint32_t temp_Checksum = historyChecksum[j];\n historyChecksum[j] = historyChecksum[j + 1];\n historyChecksum[j + 1] = temp_Checksum;\n#endif\n }\n }\n }\n#ifdef A2DP_DECODER_HISTORY_LOCTIME_SAVE\n for (i = 0, j = 1; i < A2DP_DECODER_HISTORY_SEQ_SAVE - 1; i++, j++) {\n int32_t tmp_ms = historyLoctime[j] - historyLoctime[i];\n diff_avg_ms += tmp_ms;\n diff_avg_cnt++;\n if (tmp_ms > diff_max_ms) {\n diff_max_ms = tmp_ms;\n diff_max_idx = i;\n }\n if (tmp_ms > (int32_t)MS_TO_FAST_TICKS(50)) {\n TRACE_A2DP_DECODER_I(\"[INPUT] > 30ms seq:%d diff:%d :%d / %d\",\n reordHistorySeq[i], FAST_TICKS_TO_MS(tmp_ms),\n historyLoctime[i], historyLoctime[j]);\n }\n }\n diff_avg_ms /= diff_avg_cnt;\n TRACE_A2DP_DECODER_I(\"[INPUT] max_diff:%dms idx:%d avg:%dus\",\n FAST_TICKS_TO_MS(diff_max_ms), diff_max_idx,\n FAST_TICKS_TO_US(diff_avg_ms));\n#endif\n// DUMP16(\"%d \", reordHistorySeq, A2DP_DECODER_HISTORY_SEQ_SAVE);\n#ifdef A2DP_DECODER_HISTORY_LOCTIME_SAVE\n DUMP32(\"%x \", historyLoctime, A2DP_DECODER_HISTORY_SEQ_SAVE);\n#endif\n#ifdef A2DP_DECODER_HISTORY_CHECK_SUM_SAVE\n DUMP32(\"%x \", historyChecksum, A2DP_DECODER_HISTORY_SEQ_SAVE);\n#endif\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\n#endif\n\n/*\n1, 2^1\n3, 2^2\n7, 2^3\n15, 2^4\n31, 2^5\n*/\n#define AUDIO_ALPHA_PRAMS_1 (3)\n#define AUDIO_ALPHA_PRAMS_2 (4)\n\nstatic inline float a2dp_audio_alpha_filter(float y, float x) {\n if (y) {\n y = ((AUDIO_ALPHA_PRAMS_1 * y) + x) / AUDIO_ALPHA_PRAMS_2;\n } else {\n y = x;\n }\n return y;\n}\n\nstatic void inline a2dp_audio_convert_16bit_to_24bit(int32_t *out, int16_t *in,\n int len) {\n for (int i = len - 1; i >= 0; i--) {\n out[i] = ((int32_t)in[i] << 8);\n }\n}\n\nstatic void inline a2dp_audio_channel_select(\n A2DP_AUDIO_CHANNEL_SELECT_E chnl_sel, uint8_t *buffer,\n uint32_t buffer_bytes) {\n uint32_t samples;\n uint32_t i;\n\n ASSERT_A2DP_DECODER(a2dp_audio_context.output_cfg.num_channels == 2,\n \"%s num_channels:%d\", __func__,\n a2dp_audio_context.output_cfg.num_channels);\n\n if (a2dp_audio_context.output_cfg.bits_depth == 24) {\n int32_t *buf_l_p = (int32_t *)buffer;\n int32_t *buf_r_p = (int32_t *)buffer + 1;\n\n samples = buffer_bytes / 4 / 2;\n switch (chnl_sel) {\n case A2DP_AUDIO_CHANNEL_SELECT_LRMERGE:\n for (i = 0; i < samples; i++, buf_l_p += 2, buf_r_p += 2) {\n int32_t tmp_sample = (*buf_l_p + *buf_r_p) >> 1;\n *buf_l_p = tmp_sample;\n *buf_r_p = tmp_sample;\n }\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_LCHNL:\n for (i = 0; i < samples; i++, buf_l_p += 2, buf_r_p += 2) {\n *buf_r_p = *buf_l_p;\n }\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_RCHNL:\n for (i = 0; i < samples; i++, buf_l_p += 2, buf_r_p += 2) {\n *buf_l_p = *buf_r_p;\n }\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_STEREO:\n default:\n break;\n }\n } else {\n int16_t *buf_l_p = (int16_t *)buffer;\n int16_t *buf_r_p = (int16_t *)buffer + 1;\n\n samples = buffer_bytes / 2 / 2;\n switch (chnl_sel) {\n case A2DP_AUDIO_CHANNEL_SELECT_LRMERGE:\n for (i = 0; i < samples; i++, buf_l_p += 2, buf_r_p += 2) {\n int16_t tmp_sample = ((int32_t)*buf_l_p + (int32_t)*buf_r_p) >> 1;\n *buf_l_p = tmp_sample;\n *buf_r_p = tmp_sample;\n }\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_LCHNL:\n for (i = 0; i < samples; i++, buf_l_p += 2, buf_r_p += 2) {\n *buf_r_p = *buf_l_p;\n }\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_RCHNL:\n for (i = 0; i < samples; i++, buf_l_p += 2, buf_r_p += 2) {\n *buf_l_p = *buf_r_p;\n }\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_STEREO:\n default:\n break;\n }\n }\n}\n\n#ifdef A2DP_CP_ACCEL\nextern \"C\" bool is_cp_need_reset(void);\nextern uint32_t app_bt_stream_get_dma_buffer_samples(void);\n\nstatic uint32_t get_cp_frame_mtus(A2DP_AUDIO_LASTFRAME_INFO_T *info) {\n uint32_t cp_frame_mtus = app_bt_stream_get_dma_buffer_samples() / 2;\n if (cp_frame_mtus % (info->frame_samples)) {\n cp_frame_mtus = cp_frame_mtus / (info->frame_samples) + 1;\n } else {\n cp_frame_mtus = cp_frame_mtus / (info->frame_samples);\n }\n\n TRACE_A2DP_DECODER_I(\"[CP] cp_frame_mtus:%d\", cp_frame_mtus);\n\n return cp_frame_mtus;\n}\n\n#else\nbool is_cp_need_reset(void) { return false; }\n\n#endif\n\n#define A2DP_AUDIO_SYSFREQ_BOOST_RESUME_CNT (20)\nuint32_t a2dp_audio_sysfreq_cnt = UINT32_MAX;\nuint32_t a2dp_audio_sysfreq_dest_boost_cnt = 0;\nAPP_SYSFREQ_FREQ_T a2dp_audio_sysfreq_normalfreq = APP_SYSFREQ_52M;\n\nint a2dp_audio_sysfreq_boost_init(uint32_t normalfreq) {\n a2dp_audio_sysfreq_cnt = UINT32_MAX;\n a2dp_audio_sysfreq_dest_boost_cnt = 0;\n a2dp_audio_sysfreq_normalfreq = (APP_SYSFREQ_FREQ_T)normalfreq;\n TRACE_A2DP_DECODER_I(\"[BOOST] freq:%d\", normalfreq);\n return 0;\n}\n\nint a2dp_audio_sysfreq_boost_start(uint32_t boost_cnt) {\n enum APP_SYSFREQ_FREQ_T sysfreq = APP_SYSFREQ_104M;\n\n a2dp_audio_sysfreq_cnt = 0;\n a2dp_audio_sysfreq_dest_boost_cnt = boost_cnt;\n if (a2dp_audio_sysfreq_normalfreq >= APP_SYSFREQ_52M) {\n sysfreq = APP_SYSFREQ_104M;\n } else {\n sysfreq = APP_SYSFREQ_52M;\n }\n TRACE_A2DP_DECODER_I(\"[BOOST] freq:%d cnt:%d\", sysfreq, boost_cnt);\n app_sysfreq_req(APP_SYSFREQ_USER_BT_A2DP, sysfreq);\n return 0;\n}\n\nstatic int a2dp_audio_sysfreq_boost_porc(void) {\n if (a2dp_audio_sysfreq_cnt == UINT32_MAX) {\n // do nothing\n } else if (a2dp_audio_sysfreq_cnt >= a2dp_audio_sysfreq_dest_boost_cnt) {\n a2dp_audio_sysfreq_cnt = UINT32_MAX;\n TRACE_A2DP_DECODER_I(\"[BOOST] freq:%d\", a2dp_audio_sysfreq_normalfreq);\n app_sysfreq_req(APP_SYSFREQ_USER_BT_A2DP, a2dp_audio_sysfreq_normalfreq);\n } else {\n a2dp_audio_sysfreq_cnt++;\n }\n return 0;\n}\n\nint a2dp_audio_sysfreq_boost_running(void) {\n return a2dp_audio_sysfreq_cnt == UINT32_MAX ? 0 : 1;\n}\n\nint a2dp_audio_store_packet_checker_start(void) {\n store_packet_history_loctime = 0;\n return 0;\n}\n\nint a2dp_audio_store_packet_checker(btif_media_header_t *header) {\n bool show_info = false;\n uint32_t fast_sys_tick = hal_fast_sys_timer_get();\n int32_t tmp_ms = 0;\n\n if (store_packet_history_loctime) {\n tmp_ms = fast_sys_tick - store_packet_history_loctime;\n if (tmp_ms > (int32_t)MS_TO_FAST_TICKS(50)) {\n show_info = true;\n }\n }\n\n if (show_info) {\n // TRACE_A2DP_DECODER_I(\"[INPUT] >50ms seq:%d diff:%d\",\n // header->sequenceNumber, FAST_TICKS_TO_MS(tmp_ms));\n a2dp_decoder_info_checker();\n }\n\n store_packet_history_loctime = fast_sys_tick;\n\n if (a2dp_audio_context.historySeq_idx &&\n ((a2dp_audio_context.historySeq_idx - 1) %\n A2DP_DECODER_HISTORY_SEQ_SAVE ==\n 0)) {\n a2dp_audio_show_history_seq();\n }\n\n return 0;\n}\n//#define DECODER_ERR_TEST\nint a2dp_audio_store_packet(btif_media_header_t *header, unsigned char *buf,\n unsigned int len) {\n int nRet = A2DP_DECODER_NO_ERROR;\n\n if (a2dp_audio_get_status() ==\n A2DP_AUDIO_DECODER_STATUS_NULL) { // if mem deinit , drop data\n return nRet;\n }\n a2dp_audio_status_mutex_lock();\n\n#ifdef DECODER_ERR_TEST\n static uint16_t cnt = 0;\n static uint16_t limit = 500;\n cnt++;\n if (cnt % limit == 0) {\n cnt = 0;\n limit = rand() % 500;\n uint16_t len2 = rand() % len;\n memset(buf + len - len2, 0, len2);\n TRACE_A2DP_DECODER_I(\"[INPUT] Fill Err!!!! seq:%d\", header->sequenceNumber);\n }\n#endif\n#if A2DP_DECODER_HISTORY_SEQ_SAVE\n a2dp_audio_save_history_seq(header, buf, len);\n#endif\n a2dp_audio_set_store_packet_status(\n A2DP_AUDIO_DECODER_STORE_PACKET_STATUS_BUSY);\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n a2dp_audio_store_packet_checker(header);\n if (a2dp_audio_context.need_detect_first_packet) {\n a2dp_audio_context.need_detect_first_packet = false;\n a2dp_audio_context.audio_decoder.audio_decoder_preparse_packet(header,\n buf, len);\n }\n\n if (a2dp_audio_detect_next_packet_callback) {\n a2dp_audio_detect_next_packet_callback(header, buf, len);\n }\n\n nRet = a2dp_audio_context.audio_decoder.audio_decoder_store_packet(\n header, buf, len);\n#if defined(IBRT)\n if (is_cp_need_reset()) {\n TRACE_A2DP_DECODER_I(\"[CP] find cp error need restart\");\n app_ibrt_if_force_audio_retrigger();\n }\n if (nRet == A2DP_DECODER_MTU_LIMTER_ERROR) {\n if (app_tws_ibrt_mobile_link_connected()) {\n // try again\n // a2dp_audio_semaphore_wait(A2DP_AUDIO_WAIT_TIMEOUT_MS);\n nRet = a2dp_audio_context.audio_decoder.audio_decoder_store_packet(\n header, buf, len);\n }\n if (nRet == A2DP_DECODER_MTU_LIMTER_ERROR) {\n int dest_discards_samples = 0;\n ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n if (p_ibrt_ctrl == NULL) {\n return A2DP_DECODER_NOT_SUPPORT;\n }\n if (app_tws_ibrt_mobile_link_connected()) {\n bt_syn_trig_checker(p_ibrt_ctrl->mobile_conhandle);\n } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n bt_syn_trig_checker(p_ibrt_ctrl->ibrt_conhandle);\n }\n dest_discards_samples = app_bt_stream_get_dma_buffer_samples() / 2;\n a2dp_audio_discards_samples(dest_discards_samples * 2);\n a2dp_audio_context.audio_decoder.audio_decoder_store_packet(header, buf,\n len);\n TRACE_A2DP_DECODER_I(\"[INPUT] MTU_LIMTER so discards_packet\");\n }\n }\n#else\n if (is_cp_need_reset()) {\n TRACE_A2DP_DECODER_I(\"[CP] find cp error need restart\");\n app_audio_decode_err_force_trigger();\n }\n\n if (nRet == A2DP_DECODER_MTU_LIMTER_ERROR) {\n a2dp_audio_synchronize_dest_packet_mut(\n a2dp_audio_context.dest_packet_mut);\n a2dp_audio_context.audio_decoder.audio_decoder_store_packet(header, buf,\n len);\n TRACE_A2DP_DECODER_W(\"[INPUT] MTU_LIMTER so discards_packet\");\n }\n#endif\n } else {\n TRACE(2, \"[INPUT] skip packet status:%d\", a2dp_audio_get_status());\n }\n\n if (a2dp_audio_store_packet_callback) {\n a2dp_audio_store_packet_callback(header, buf, len);\n }\n\n a2dp_audio_set_store_packet_status(\n A2DP_AUDIO_DECODER_STORE_PACKET_STATUS_IDLE);\n a2dp_audio_status_mutex_unlock();\n return 0;\n}\n\nuint32_t a2dp_audio_playback_handler(uint8_t *buffer, uint32_t buffer_bytes) {\n uint32_t len = buffer_bytes;\n int nRet = A2DP_DECODER_NO_ERROR;\n A2DP_AUDIO_LASTFRAME_INFO_T *lastframe_info = NULL;\n list_t *list = a2dp_audio_context.audio_datapath.input_raw_packet_list;\n\n a2dp_audio_set_playback_status(A2DP_AUDIO_DECODER_PLAYBACK_STATUS_BUSY);\n if (a2dp_audio_get_status() != A2DP_AUDIO_DECODER_STATUS_START) {\n TRACE_A2DP_DECODER_W(\"[PLAYBACK] skip handler status:%d\",\n a2dp_audio_get_status());\n goto exit;\n }\n\n a2dp_audio_sysfreq_boost_porc();\n if (a2dp_audio_context.average_packet_mut == 0) {\n A2DP_AUDIO_HEADFRAME_INFO_T headframe_info;\n a2dp_audio_decoder_headframe_info_get(&headframe_info);\n a2dp_audio_context.average_packet_mut = a2dp_audio_list_length(list);\n TRACE_A2DP_DECODER_I(\n \"[PLAYBACK] init average_packet_mut:%d seq:%d\",\n (uint16_t)(a2dp_audio_context.average_packet_mut + 0.5f),\n headframe_info.sequenceNumber);\n } else {\n if (!a2dp_audio_refill_packet()) {\n uint16_t packet_mut = 0;\n if (!a2dp_audio_internal_lastframe_info_ptr_get(&lastframe_info)) {\n packet_mut = a2dp_audio_list_length(list) + get_in_cp_frame_cnt() +\n get_in_cp_frame_delay() * (lastframe_info->frame_samples /\n lastframe_info->list_samples);\n a2dp_audio_context.average_packet_mut = a2dp_audio_alpha_filter(\n (float)a2dp_audio_context.average_packet_mut, (float)packet_mut);\n a2dp_audio_sync_handler(buffer, buffer_bytes);\n }\n }\n }\n#if defined(A2DP_AUDIO_REFILL_AFTER_NO_CACHE)\n if (a2dp_audio_context.skip_frame_cnt_after_no_cache) {\n#if defined(A2DP_CP_ACCEL)\n uint32_t cp_delay_mtus = get_in_cp_frame_delay();\n cp_delay_mtus *= get_cp_frame_mtus(&a2dp_audio_lastframe_info);\n if (a2dp_audio_list_length(list) >=\n (a2dp_audio_context.dest_packet_mut - cp_delay_mtus)) {\n a2dp_audio_context.skip_frame_cnt_after_no_cache = 0;\n }\n#else\n if (a2dp_audio_list_length(list) >= a2dp_audio_context.dest_packet_mut) {\n a2dp_audio_context.skip_frame_cnt_after_no_cache = 0;\n }\n#endif\n\n memset(buffer, 0, buffer_bytes);\n TRACE_A2DP_DECODER_I(\"[PLAYBACK] decode refill skip_cnt:%d, list:%d\",\n a2dp_audio_context.skip_frame_cnt_after_no_cache,\n a2dp_audio_list_length(list));\n a2dp_decoder_info_checker();\n if (a2dp_audio_context.skip_frame_cnt_after_no_cache > 0) {\n a2dp_audio_context.skip_frame_cnt_after_no_cache--;\n } else {\n a2dp_audio_context.mute_frame_cnt_after_no_cache =\n A2DP_AUDIO_MUTE_FRAME_CNT_AFTER_NO_CACHE;\n }\n } else\n#endif\n {\n if (a2dp_audio_context.output_cfg.bits_depth == 24 &&\n 16 == bt_sbc_player_get_sample_bit()) {\n\n len = len / (sizeof(int32_t) / sizeof(int16_t));\n\n nRet = a2dp_audio_context.audio_decoder.audio_decoder_decode_frame(buffer,\n len);\n if (nRet < 0 || a2dp_audio_context.mute_frame_cnt_after_no_cache) {\n TRACE_A2DP_DECODER_I(\"[PLAYBACK] decode failed nRet=%d mute_cnt:%d\",\n nRet,\n a2dp_audio_context.mute_frame_cnt_after_no_cache);\n a2dp_decoder_info_checker();\n // mute frame\n memset(buffer, 0, len);\n }\n a2dp_audio_convert_16bit_to_24bit((int32_t *)buffer, (int16_t *)buffer,\n len / sizeof(int16_t));\n\n // Restore len to 24-bit sample buffer length\n len = len * (sizeof(int32_t) / sizeof(int16_t));\n\n } else if (a2dp_audio_context.output_cfg.bits_depth ==\n a2dp_audio_context.audio_decoder.stream_info.bits_depth) {\n\n nRet = a2dp_audio_context.audio_decoder.audio_decoder_decode_frame(buffer,\n len);\n if (nRet < 0 || a2dp_audio_context.mute_frame_cnt_after_no_cache) {\n // mute frame\n TRACE_A2DP_DECODER_I(\"[PLAYBACK] decode failed nRet=%d mute_cnt:%d\",\n nRet,\n a2dp_audio_context.mute_frame_cnt_after_no_cache);\n a2dp_decoder_info_checker();\n memset(buffer, 0, len);\n }\n }\n a2dp_audio_channel_select(a2dp_audio_context.chnl_sel, buffer,\n buffer_bytes);\n }\n a2dp_audio_semaphore_release();\n\n if (nRet == A2DP_DECODER_CACHE_UNDERFLOW_ERROR) {\n if (a2dp_audio_internal_lastframe_info_ptr_get(&lastframe_info) < 0) {\n goto exit;\n }\n TRACE(2, \"CACHE_UNDERFLOW lastseq:%d ftick:%d\",\n lastframe_info->sequenceNumber, hal_fast_sys_timer_get());\n a2dp_audio_show_history_seq();\n uint32_t mute_frames = A2DP_AUDIO_MUTE_FRAME_CNT_AFTER_NO_CACHE;\n uint32_t skip_frames =\n A2DP_AUDIO_SKIP_FRAME_LIMIT_AFTER_NO_CACHE - get_in_cp_frame_delay();\n a2dp_audio_context.mute_frame_cnt_after_no_cache =\n (uint32_t)((float)mute_frames * a2dp_audio_latency_factor_get());\n a2dp_audio_context.skip_frame_cnt_after_no_cache =\n (uint32_t)((float)skip_frames * a2dp_audio_latency_factor_get());\n\n a2dp_audio_context.average_packet_mut = 0;\n a2dp_audio_sync_reset_data();\n#if defined(IBRT)\n\n a2dp_audio_sync_tune_sample_rate(\n app_tws_ibrt_audio_sync_config_factor_reference_get());\n#else\n a2dp_audio_sync_tune_sample_rate(a2dp_audio_context.init_factor_reference);\n#endif\n a2dp_decoder_info_checker();\n } else {\n if (a2dp_audio_context.mute_frame_cnt_after_no_cache > 0) {\n a2dp_audio_context.mute_frame_cnt_after_no_cache--;\n a2dp_audio_context.average_packet_mut = 0;\n if (a2dp_audio_context.mute_frame_cnt_after_no_cache >= 1) {\n a2dp_audio_synchronize_dest_packet_mut(\n a2dp_audio_context.dest_packet_mut);\n }\n }\n }\n if (!a2dp_audio_internal_lastframe_info_ptr_get(&lastframe_info)) {\n lastframe_info->stream_info.factor_reference =\n a2dp_audio_context.output_cfg.factor_reference;\n lastframe_info->average_frames =\n (uint32_t)(a2dp_audio_context.average_packet_mut + 0.5f);\n }\nexit:\n a2dp_audio_set_playback_status(A2DP_AUDIO_DECODER_PLAYBACK_STATUS_IDLE);\n#if defined(IBRT)\n if (nRet == A2DP_DECODER_CACHE_UNDERFLOW_ERROR) {\n#if defined(A2DP_AUDIO_UNDERFLOW_CAUSE_AUDIO_RETRIGGER)\n bool force_audio_retrigger = true;\n#else\n bool force_audio_retrigger = false;\n#endif\n if (a2dp_audio_latency_factor_get() == A2DP_AUDIO_LATENCY_LOW_FACTOR &&\n app_tws_ibrt_mobile_link_connected()) {\n a2dp_audio_latency_factor_sethigh();\n if (app_tws_ibrt_tws_link_connected() &&\n app_ibrt_ui_is_profile_exchanged()) {\n float latency_factor = a2dp_audio_latency_factor_get();\n tws_ctrl_send_cmd(APP_TWS_CMD_SET_LATENCYFACTOR,\n (uint8_t *)&latency_factor, sizeof(latency_factor));\n force_audio_retrigger = true;\n }\n }\n if (force_audio_retrigger && !a2dp_audio_context.underflow_onporcess) {\n a2dp_audio_context.underflow_onporcess = true;\n app_ibrt_if_force_audio_retrigger();\n }\n }\n#else\n if (nRet == A2DP_DECODER_CACHE_UNDERFLOW_ERROR) {\n app_audio_decode_err_force_trigger();\n }\n#endif\n return len;\n}\n\nstatic void a2dp_audio_packet_free(void *packet) {\n if (a2dp_audio_context.audio_decoder.audio_decoder_packet_free) {\n a2dp_audio_context.audio_decoder.audio_decoder_packet_free(packet);\n } else {\n a2dp_audio_heap_free(packet);\n }\n}\n\nvoid a2dp_audio_clear_input_raw_packet_list(void) {\n // just clean the packet list to start receive ai data again\n if (a2dp_audio_context.audio_datapath.input_raw_packet_list)\n a2dp_audio_list_clear(\n a2dp_audio_context.audio_datapath.input_raw_packet_list);\n}\n\nint a2dp_audio_init(uint32_t sysfreq, A2DP_AUDIO_CODEC_TYPE codec_type,\n A2DP_AUDIO_OUTPUT_CONFIG_T *config,\n A2DP_AUDIO_CHANNEL_SELECT_E chnl_sel,\n uint16_t dest_packet_mut) {\n uint8_t *heap_buff = NULL;\n uint32_t heap_size = 0;\n double ratio = 0;\n\n A2DP_AUDIO_OUTPUT_CONFIG_T decoder_output_config;\n TRACE_A2DP_DECODER_I(\"[INIT] freq:%d codec:%d chnl:%d\", sysfreq, codec_type,\n chnl_sel);\n TRACE_A2DP_DECODER_I(\"[INIT] out:%d-%d-%d smp:%d dest:%d\",\n config->sample_rate, config->num_channels,\n config->bits_depth, config->frame_samples,\n dest_packet_mut);\n a2dp_audio_sysfreq_boost_init(sysfreq);\n a2dp_audio_sysfreq_boost_start(A2DP_AUDIO_SYSFREQ_BOOST_RESUME_CNT);\n a2dp_audio_semaphore_init();\n a2dp_audio_buffer_mutex_init();\n a2dp_audio_status_mutex_init();\n\n a2dp_audio_status_mutex_lock();\n\n a2dp_audio_detect_next_packet_callback_register(NULL);\n a2dp_audio_detect_store_packet_callback_register(NULL);\n\n#if defined(A2DP_LDAC_ON)\n if (bt_sbc_player_get_codec_type() == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n heap_size = A2DP_AUDIO_LDAC_MEMPOOL_SIZE;\n } else\n#endif\n {\n heap_size = A2DP_AUDIO_MEMPOOL_SIZE;\n }\n app_audio_mempool_get_buff(&heap_buff, heap_size);\n ASSERT_A2DP_DECODER(heap_buff, \"%s size:%d\", __func__, heap_size);\n a2dp_audio_heap_init(heap_buff, heap_size);\n\n memset(&a2dp_audio_lastframe_info, 0, sizeof(A2DP_AUDIO_LASTFRAME_INFO_T));\n\n a2dp_audio_context.audio_datapath.input_raw_packet_list = a2dp_audio_list_new(\n a2dp_audio_packet_free, (list_mempool_zmalloc)a2dp_audio_heap_cmalloc,\n (list_mempool_free)a2dp_audio_heap_free);\n\n a2dp_audio_context.audio_datapath.output_pcm_packet_list =\n a2dp_audio_list_new(a2dp_audio_packet_free,\n (list_mempool_zmalloc)a2dp_audio_heap_cmalloc,\n (list_mempool_free)a2dp_audio_heap_free);\n\n memcpy(&(a2dp_audio_context.output_cfg), config,\n sizeof(A2DP_AUDIO_OUTPUT_CONFIG_T));\n ratio = a2dp_audio_context.output_cfg.factor_reference;\n a2dp_audio_context.output_cfg.factor_reference = 0;\n\n a2dp_audio_context.init_factor_reference = config->factor_reference;\n a2dp_audio_context.chnl_sel = chnl_sel;\n a2dp_audio_context.dest_packet_mut = dest_packet_mut;\n a2dp_audio_context.average_packet_mut = 0;\n\n switch (codec_type) {\n case A2DP_AUDIO_CODEC_TYPE_SBC:\n decoder_output_config.sample_rate = config->sample_rate;\n decoder_output_config.num_channels = 2;\n decoder_output_config.bits_depth = 16;\n decoder_output_config.frame_samples = config->frame_samples;\n decoder_output_config.factor_reference = 1.0f;\n memcpy(&(a2dp_audio_context.audio_decoder), &a2dp_audio_sbc_decoder_config,\n sizeof(A2DP_AUDIO_DECODER_T));\n break;\n#if defined(A2DP_AAC_ON)\n case A2DP_AUDIO_CODEC_TYPE_MPEG2_4_AAC:\n decoder_output_config.sample_rate = config->sample_rate;\n decoder_output_config.num_channels = 2;\n decoder_output_config.bits_depth = 16;\n decoder_output_config.frame_samples = config->frame_samples;\n decoder_output_config.factor_reference = 1.0f;\n memcpy(&(a2dp_audio_context.audio_decoder),\n &a2dp_audio_aac_lc_decoder_config, sizeof(A2DP_AUDIO_DECODER_T));\n break;\n#endif\n#if defined(A2DP_SCALABLE_ON)\n case A2DP_AUDIO_CODEC_TYPE_SCALABL:\n decoder_output_config.sample_rate = config->sample_rate;\n decoder_output_config.num_channels = 2;\n decoder_output_config.bits_depth = config->curr_bits;\n decoder_output_config.frame_samples = config->frame_samples;\n decoder_output_config.factor_reference = 1.0f;\n memcpy(&(a2dp_audio_context.audio_decoder),\n &a2dp_audio_scalable_decoder_config, sizeof(A2DP_AUDIO_DECODER_T));\n break;\n#endif\n#if defined(A2DP_LHDC_ON)\n case A2DP_AUDIO_CODEC_TYPE_LHDC:\n decoder_output_config.sample_rate = config->sample_rate;\n decoder_output_config.num_channels = 2;\n decoder_output_config.bits_depth = config->curr_bits;\n decoder_output_config.frame_samples = config->frame_samples;\n decoder_output_config.factor_reference = 1.0f;\n memcpy(&(a2dp_audio_context.audio_decoder), &a2dp_audio_lhdc_decoder_config,\n sizeof(A2DP_AUDIO_DECODER_T));\n break;\n#endif\n#if defined(A2DP_LDAC_ON)\n case A2DP_AUDIO_CODEC_TYPE_LDAC:\n decoder_output_config.sample_rate = config->sample_rate;\n decoder_output_config.num_channels = 2;\n decoder_output_config.bits_depth = config->curr_bits;\n decoder_output_config.frame_samples = config->frame_samples;\n decoder_output_config.factor_reference = 1.0f;\n memcpy(&(a2dp_audio_context.audio_decoder), &a2dp_audio_ldac_decoder_config,\n sizeof(A2DP_AUDIO_DECODER_T));\n break;\n#endif\n default:\n ASSERT_A2DP_DECODER(0, \"%s invalid codec_type:%d\", __func__, codec_type);\n break;\n }\n\n a2dp_audio_context.audio_decoder.audio_decoder_init(\n &decoder_output_config, (void *)&a2dp_audio_context);\n a2dp_audio_context.need_detect_first_packet = true;\n a2dp_audio_context.underflow_onporcess = false;\n a2dp_audio_context.skip_frame_cnt_after_no_cache = 0;\n a2dp_audio_context.mute_frame_cnt_after_no_cache = 0;\n\n a2dp_audio_context.audio_decoder_status = A2DP_AUDIO_DECODER_STATUS_READY;\n\n a2dp_audio_context.store_packet_status =\n A2DP_AUDIO_DECODER_STORE_PACKET_STATUS_IDLE;\n a2dp_audio_context.playback_status = A2DP_AUDIO_DECODER_PLAYBACK_STATUS_IDLE;\n\n a2dp_audio_sync_init(ratio);\n\n#if A2DP_DECODER_HISTORY_SEQ_SAVE\n a2dp_audio_reset_history_seq();\n#endif\n a2dp_audio_store_packet_checker_start();\n\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nint a2dp_audio_deinit(void) {\n TRACE_A2DP_DECODER_I(\"[DEINIT]\");\n\n a2dp_audio_status_mutex_lock();\n\n a2dp_audio_detect_next_packet_callback_register(NULL);\n a2dp_audio_detect_store_packet_callback_register(NULL);\n\n a2dp_audio_context.audio_decoder.audio_decoder_deinit();\n memset(&(a2dp_audio_context.audio_decoder), 0, sizeof(A2DP_AUDIO_DECODER_T));\n memset(&(a2dp_audio_context.output_cfg), 0,\n sizeof(A2DP_AUDIO_OUTPUT_CONFIG_T));\n a2dp_audio_list_clear(\n a2dp_audio_context.audio_datapath.input_raw_packet_list);\n a2dp_audio_list_free(a2dp_audio_context.audio_datapath.input_raw_packet_list);\n a2dp_audio_context.audio_datapath.input_raw_packet_list = NULL;\n a2dp_audio_list_clear(\n a2dp_audio_context.audio_datapath.output_pcm_packet_list);\n a2dp_audio_list_free(\n a2dp_audio_context.audio_datapath.output_pcm_packet_list);\n a2dp_audio_context.audio_datapath.output_pcm_packet_list = NULL;\n\n size_t total = 0, used = 0, max_used = 0;\n a2dp_audio_heap_info(&total, &used, &max_used);\n TRACE_A2DP_DECODER_I(\n \"[DEINIT] heap info: total - %d, used - %d, max_used - %d.\", total, used,\n max_used);\n // ASSERT_A2DP_DECODER(used == 0, \"[%s] used != 0\", __func__);\n\n a2dp_audio_set_store_packet_status(\n A2DP_AUDIO_DECODER_STORE_PACKET_STATUS_IDLE);\n a2dp_audio_set_playback_status(A2DP_AUDIO_DECODER_PLAYBACK_STATUS_IDLE);\n a2dp_audio_set_status(A2DP_AUDIO_DECODER_STATUS_NULL);\n#if A2DP_DECODER_HISTORY_SEQ_SAVE\n a2dp_audio_reset_history_seq();\n#endif\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nint a2dp_audio_stop(void) {\n TRACE_A2DP_DECODER_I(\"[STOP]\");\n int cnt = 0;\n\n a2dp_audio_set_status(A2DP_AUDIO_DECODER_STATUS_STOP);\n a2dp_audio_semaphore_release();\n\n cnt = 50;\n do {\n if (a2dp_audio_get_playback_status() ==\n A2DP_AUDIO_DECODER_PLAYBACK_STATUS_IDLE) {\n TRACE_A2DP_DECODER_I(\"[DEINIT]PLAYBACK_STATUS_IDLE cnt:%d\", cnt);\n break;\n } else {\n osThreadYield();\n }\n } while (--cnt > 0);\n cnt = 50;\n do {\n if (a2dp_audio_get_store_packet_status() ==\n A2DP_AUDIO_DECODER_STORE_PACKET_STATUS_IDLE) {\n TRACE_A2DP_DECODER_I(\"[DEINIT] STORE_PACKET_STATUS_IDLE cnt:%d\", cnt);\n break;\n } else {\n osThreadYield();\n }\n } while (--cnt > 0);\n\n return 0;\n}\n\nint a2dp_audio_start(void) {\n TRACE_A2DP_DECODER_I(\"[START]\");\n a2dp_audio_status_mutex_lock();\n a2dp_audio_set_status(A2DP_AUDIO_DECODER_STATUS_START);\n a2dp_audio_status_mutex_unlock();\n return 0;\n}\n\nint a2dp_audio_detect_next_packet_callback_register(\n A2DP_AUDIO_DETECT_NEXT_PACKET_CALLBACK callback) {\n a2dp_audio_status_mutex_lock();\n a2dp_audio_detect_next_packet_callback = callback;\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nint a2dp_audio_detect_store_packet_callback_register(\n A2DP_AUDIO_DETECT_NEXT_PACKET_CALLBACK callback) {\n a2dp_audio_status_mutex_lock();\n a2dp_audio_store_packet_callback = callback;\n a2dp_audio_status_mutex_unlock();\n\n return 0;\n}\n\nint a2dp_audio_detect_first_packet(void) {\n a2dp_audio_status_mutex_lock();\n a2dp_audio_context.need_detect_first_packet = true;\n a2dp_audio_status_mutex_unlock();\n return 0;\n}\n\nint a2dp_audio_detect_first_packet_clear(void) {\n a2dp_audio_status_mutex_lock();\n a2dp_audio_context.need_detect_first_packet = false;\n a2dp_audio_status_mutex_unlock();\n return 0;\n}\n\nint a2dp_audio_discards_packet(uint32_t packets) {\n int nRet = 0;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n a2dp_audio_status_mutex_lock();\n nRet =\n a2dp_audio_context.audio_decoder.audio_decoder_discards_packet(packets);\n a2dp_audio_status_mutex_unlock();\n } else {\n nRet = -1;\n }\n\n return nRet;\n}\n\nint a2dp_audio_synchronize_dest_packet_mut(uint32_t mtu) {\n int nRet = 0;\n int cnt = 50;\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n do {\n if (a2dp_audio_get_playback_status() ==\n A2DP_AUDIO_DECODER_PLAYBACK_STATUS_IDLE) {\n nRet = a2dp_audio_context.audio_decoder\n .audio_decoder_synchronize_dest_packet_mut(mtu);\n break;\n } else {\n osThreadYield();\n }\n } while (--cnt > 0);\n } else {\n nRet = -1;\n }\n\n return nRet;\n}\n\nint a2dp_audio_discards_samples(uint32_t samples) {\n return a2dp_audio_context.audio_decoder.a2dp_audio_discards_samples(samples);\n}\n\nint a2dp_audio_convert_list_to_samples(uint32_t *samples) {\n return a2dp_audio_context.audio_decoder.a2dp_audio_convert_list_to_samples(\n samples);\n}\n\nint a2dp_audio_get_packet_samples(void) {\n A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info;\n uint32_t packet_samples = 0;\n uint16_t totalSubSequenceNumber = 1;\n\n a2dp_audio_lastframe_info_get(&lastframe_info);\n\n if (lastframe_info.totalSubSequenceNumber) {\n totalSubSequenceNumber = lastframe_info.totalSubSequenceNumber;\n }\n\n packet_samples = totalSubSequenceNumber * lastframe_info.frame_samples;\n\n return packet_samples;\n}\n\nstatic int a2dp_audio_internal_lastframe_info_ptr_get(\n A2DP_AUDIO_LASTFRAME_INFO_T **lastframe_info) {\n int nRet = 0;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n *lastframe_info = &a2dp_audio_lastframe_info;\n } else {\n *lastframe_info = NULL;\n nRet = -1;\n }\n\n return nRet;\n}\n\nint a2dp_audio_lastframe_info_get(A2DP_AUDIO_LASTFRAME_INFO_T *lastframe_info) {\n int nRet = 0;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n a2dp_audio_buffer_mutex_lock();\n memcpy(lastframe_info, &a2dp_audio_lastframe_info,\n sizeof(A2DP_AUDIO_LASTFRAME_INFO_T));\n a2dp_audio_buffer_mutex_unlock();\n } else {\n memset(lastframe_info, 0, sizeof(A2DP_AUDIO_LASTFRAME_INFO_T));\n nRet = -1;\n }\n\n return nRet;\n}\n\nint a2dp_audio_decoder_internal_check_sum_reset(void) {\n check_sum_seed = 0;\n return 0;\n}\n\nuint32_t a2dp_audio_decoder_internal_check_sum_generate(const uint8_t *buf,\n uint32_t len) {\n#if A2DP_DECODER_CHECKER\n check_sum_seed = crc32(check_sum_seed, buf, len);\n#else\n check_sum_seed = 0;\n#endif\n return check_sum_seed;\n}\n\nint a2dp_audio_lastframe_info_reset_undecodeframe(void) {\n int nRet = 0;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n a2dp_audio_buffer_mutex_lock();\n a2dp_audio_lastframe_info.undecode_frames = 0;\n a2dp_audio_lastframe_info.undecode_max_frames = 0;\n a2dp_audio_lastframe_info.undecode_min_frames = 0xffff;\n a2dp_audio_decoder_internal_check_sum_reset();\n a2dp_audio_lastframe_info.check_sum = 0;\n a2dp_audio_buffer_mutex_unlock();\n } else {\n nRet = -1;\n }\n\n return nRet;\n}\n\nint a2dp_audio_decoder_internal_lastframe_info_set(\n A2DP_AUDIO_DECODER_LASTFRAME_INFO_T *lastframe_info) {\n a2dp_audio_buffer_mutex_lock();\n a2dp_audio_lastframe_info.sequenceNumber = lastframe_info->sequenceNumber;\n a2dp_audio_lastframe_info.timestamp = lastframe_info->timestamp;\n a2dp_audio_lastframe_info.curSubSequenceNumber =\n lastframe_info->curSubSequenceNumber;\n a2dp_audio_lastframe_info.totalSubSequenceNumber =\n lastframe_info->totalSubSequenceNumber;\n a2dp_audio_lastframe_info.frame_samples = lastframe_info->frame_samples;\n a2dp_audio_lastframe_info.list_samples = lastframe_info->list_samples;\n a2dp_audio_lastframe_info.decoded_frames = lastframe_info->decoded_frames;\n a2dp_audio_lastframe_info.undecode_frames = lastframe_info->undecode_frames;\n\n a2dp_audio_lastframe_info.undecode_max_frames =\n MAX(a2dp_audio_lastframe_info.undecode_frames,\n a2dp_audio_lastframe_info.undecode_max_frames);\n a2dp_audio_lastframe_info.undecode_min_frames =\n MIN(a2dp_audio_lastframe_info.undecode_frames,\n a2dp_audio_lastframe_info.undecode_min_frames);\n\n a2dp_audio_lastframe_info.stream_info = lastframe_info->stream_info;\n a2dp_audio_lastframe_info.check_sum = lastframe_info->check_sum;\n a2dp_audio_buffer_mutex_unlock();\n\n return 0;\n}\n\nint a2dp_audio_synchronize_packet(A2DP_AUDIO_SYNCFRAME_INFO_T *sync_info,\n uint32_t mask) {\n int nRet = 0;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n a2dp_audio_status_mutex_lock();\n nRet = a2dp_audio_context.audio_decoder.audio_decoder_synchronize_packet(\n sync_info, mask);\n if (nRet == A2DP_DECODER_NOT_SUPPORT) {\n // can't support synchronize packet, so return fake val;\n nRet = A2DP_DECODER_NO_ERROR;\n }\n a2dp_audio_status_mutex_unlock();\n } else {\n nRet = -1;\n }\n\n return nRet;\n}\n\nint a2dp_audio_decoder_headframe_info_get(\n A2DP_AUDIO_HEADFRAME_INFO_T *headframe_info) {\n int nRet = 0;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n nRet = a2dp_audio_context.audio_decoder.audio_decoder_headframe_info_get(\n headframe_info);\n } else {\n memset(headframe_info, 0, sizeof(A2DP_AUDIO_HEADFRAME_INFO_T));\n nRet = -1;\n }\n\n return nRet;\n}\n\nint a2dp_audio_refill_packet(void) {\n int refill_cnt = 0;\n\n#if defined(A2DP_AUDIO_REFILL_AFTER_NO_CACHE)\n refill_cnt += a2dp_audio_context.skip_frame_cnt_after_no_cache;\n#endif\n refill_cnt += a2dp_audio_context.mute_frame_cnt_after_no_cache;\n\n return refill_cnt;\n}\n\nbool a2dp_audio_auto_synchronize_support(void) {\n bool nRet = 0;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n a2dp_audio_buffer_mutex_lock();\n nRet = a2dp_audio_context.audio_decoder.auto_synchronize_support > 0\n ? true\n : false;\n a2dp_audio_buffer_mutex_unlock();\n } else {\n nRet = 0;\n }\n\n return nRet;\n}\n\nA2DP_AUDIO_OUTPUT_CONFIG_T *a2dp_audio_get_output_config(void) {\n A2DP_AUDIO_OUTPUT_CONFIG_T *output_config = NULL;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n a2dp_audio_buffer_mutex_lock();\n output_config = &a2dp_audio_context.output_cfg;\n a2dp_audio_buffer_mutex_unlock();\n } else {\n output_config = NULL;\n }\n\n return output_config;\n}\n\nint a2dp_audio_latency_factor_setlow(void) {\n a2dp_audio_latency_factor = A2DP_AUDIO_LATENCY_LOW_FACTOR;\n return 0;\n}\n\nint a2dp_audio_latency_factor_sethigh(void) {\n a2dp_audio_latency_factor = A2DP_AUDIO_LATENCY_HIGH_FACTOR;\n return 0;\n}\n\nfloat a2dp_audio_latency_factor_get(void) { return a2dp_audio_latency_factor; }\n\nint a2dp_audio_latency_factor_set(float factor) {\n a2dp_audio_latency_factor = factor;\n return 0;\n}\n\nint a2dp_audio_latency_factor_status_get(\n A2DP_AUDIO_LATENCY_STATUS_E *latency_status, float *more_latency_factor) {\n if (a2dp_audio_latency_factor == A2DP_AUDIO_LATENCY_HIGH_FACTOR) {\n *latency_status = A2DP_AUDIO_LATENCY_STATUS_HIGH;\n *more_latency_factor = A2DP_AUDIO_LATENCY_MORE_FACTOR;\n } else {\n *latency_status = A2DP_AUDIO_LATENCY_STATUS_LOW;\n *more_latency_factor = 1.0f;\n }\n return 0;\n}\n\nint a2dp_audio_frame_delay_get(void) { return get_in_cp_frame_delay(); }\n\nint a2dp_audio_dest_packet_mut_get(void) {\n return a2dp_audio_context.dest_packet_mut;\n}\n\nint a2dp_audio_set_channel_select(A2DP_AUDIO_CHANNEL_SELECT_E chnl_sel) {\n int nRet = A2DP_DECODER_NO_ERROR;\n\n if (a2dp_audio_get_status() == A2DP_AUDIO_DECODER_STATUS_START) {\n a2dp_audio_context.chnl_sel = chnl_sel;\n if (a2dp_audio_context.audio_decoder.audio_decoder_channel_select) {\n nRet = a2dp_audio_context.audio_decoder.audio_decoder_channel_select(\n chnl_sel);\n }\n }\n\n return nRet;\n}\n\nfloat a2dp_audio_get_sample_reference(void) {\n TRACE(1, \"a2dp_audio_get_sample_reference:%d\",\n (int32_t)(a2dp_audio_context.output_cfg.factor_reference * 10000000));\n return a2dp_audio_context.output_cfg.factor_reference;\n}\n\nint8_t a2dp_audio_get_current_buf_size(void) {\n TRACE(1, \"a2dp_audio_get_current_buf_size:%d\",\n (int8_t)(a2dp_audio_context.average_packet_mut + 0.5f));\n return (int8_t)(a2dp_audio_context.average_packet_mut + 0.5f);\n}\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DPPLAY_H__\n#define __A2DPPLAY_H__\n\n#include \"app_utils.h\"\n#include \"avdtp_api.h\"\n#include \"plat_types.h\"\n\n#define A2DP_DECODER_HISTORY_SEQ_SAVE (25)\n//#define A2DP_DECODER_HISTORY_LOCTIME_SAVE (1)\n//#define A2DP_DECODER_HISTORY_CHECK_SUM_SAVE (1)\n\ntypedef uint16_t A2DP_AUDIO_CODEC_TYPE;\n\n#define A2DP_AUDIO_CODEC_TYPE_SBC (1u<<0)\n#define A2DP_AUDIO_CODEC_TYPE_MPEG2_4_AAC (1u<<1)\n#define A2DP_AUDIO_CODEC_TYPE_OPUS (1u<<2)\n#define A2DP_AUDIO_CODEC_TYPE_SCALABL (1u<<3)\n#define A2DP_AUDIO_CODEC_TYPE_LHDC (1u<<4)\n#define A2DP_AUDIO_CODEC_TYPE_LDAC (1u<<5)\n\n#define A2DP_AUDIO_SYNCFRAME_MASK_SEQ (1u<<0)\n#define A2DP_AUDIO_SYNCFRAME_MASK_TIMESTAMP (1u<<1)\n#define A2DP_AUDIO_SYNCFRAME_MASK_CURRSUBSEQ (1u<<2)\n#define A2DP_AUDIO_SYNCFRAME_MASK_TOTALSUBSEQ (1u<<3)\n\n#define A2DP_AUDIO_SYNCFRAME_MASK_ALL (A2DP_AUDIO_SYNCFRAME_MASK_SEQ | \\\n A2DP_AUDIO_SYNCFRAME_MASK_TIMESTAMP | \\\n A2DP_AUDIO_SYNCFRAME_MASK_CURRSUBSEQ | \\\n A2DP_AUDIO_SYNCFRAME_MASK_TOTALSUBSEQ)\n\n#define A2DP_AUDIO_SYNCFRAME_CHK(equ, mask_val, mask) (((equ)|!(mask_val&mask)))\n\ntypedef enum {\n A2DP_AUDIO_LATENCY_STATUS_LOW,\n A2DP_AUDIO_LATENCY_STATUS_HIGH,\n} A2DP_AUDIO_LATENCY_STATUS_E;\n\ntypedef struct {\n uint32_t sample_rate;\n uint8_t num_channels;\n uint8_t bits_depth;\n uint8_t curr_bits;\n uint32_t frame_samples; \n float factor_reference; \n} A2DP_AUDIO_OUTPUT_CONFIG_T;\n\ntypedef enum {\n A2DP_AUDIO_CHANNEL_SELECT_STEREO,\n A2DP_AUDIO_CHANNEL_SELECT_LRMERGE,\n A2DP_AUDIO_CHANNEL_SELECT_LCHNL,\n A2DP_AUDIO_CHANNEL_SELECT_RCHNL,\n} A2DP_AUDIO_CHANNEL_SELECT_E;\n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n uint32_t frame_samples;\n uint32_t list_samples;\n uint32_t decoded_frames;\n uint32_t undecode_frames; \n uint32_t undecode_min_frames;\n uint32_t undecode_max_frames;\n uint32_t average_frames;\n uint32_t check_sum;\n A2DP_AUDIO_OUTPUT_CONFIG_T stream_info;\n} A2DP_AUDIO_LASTFRAME_INFO_T;\n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n} A2DP_AUDIO_HEADFRAME_INFO_T;\n\ntypedef struct{ \n float proportiongain; \n float integralgain; \n float derivativegain; \n float error[3];\n float result;\n}A2DP_AUDIO_SYNC_PID_T;\n\ntypedef A2DP_AUDIO_LASTFRAME_INFO_T A2DP_AUDIO_SYNCFRAME_INFO_T;\n\ntypedef int(*A2DP_AUDIO_DETECT_NEXT_PACKET_CALLBACK)(btif_media_header_t *, unsigned char *, unsigned int len);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nuint32_t a2dp_audio_playback_handler(uint8_t *buffer, uint32_t buffer_bytes);\nfloat a2dp_audio_sync_pid_calc(A2DP_AUDIO_SYNC_PID_T *pid, float diff);\nint a2dp_audio_sync_init(double ratio);\nint a2dp_audio_sync_reset_data(void);\nint a2dp_audio_sync_tune_sample_rate(double ratio);\nint a2dp_audio_sync_direct_tune_sample_rate(double ratio);\nint a2dp_audio_sync_tune_cancel(void);\nint a2dp_audio_sysfreq_boost_start(uint32_t boost_cnt);\nint a2dp_audio_sysfreq_boost_running(void);\nint a2dp_audio_init(uint32_t sysfreq, A2DP_AUDIO_CODEC_TYPE codec_type, A2DP_AUDIO_OUTPUT_CONFIG_T *config, \n A2DP_AUDIO_CHANNEL_SELECT_E chnl_sel, uint16_t dest_packet_mut);\nint a2dp_audio_deinit(void);\nint a2dp_audio_start(void);\nint a2dp_audio_stop(void);\nint a2dp_audio_detect_next_packet_callback_register(A2DP_AUDIO_DETECT_NEXT_PACKET_CALLBACK callback);\nint a2dp_audio_detect_store_packet_callback_register(A2DP_AUDIO_DETECT_NEXT_PACKET_CALLBACK callback);\nint a2dp_audio_detect_first_packet(void);\nint a2dp_audio_detect_first_packet_clear(void);\nint a2dp_audio_store_packet(btif_media_header_t * header, unsigned char *buf, unsigned int len);\nint a2dp_audio_discards_packet(uint32_t packets);\nint a2dp_audio_synchronize_dest_packet_mut(uint32_t mtu);\nint a2dp_audio_discards_samples(uint32_t samples);\nint a2dp_audio_convert_list_to_samples(uint32_t *samples);\nint a2dp_audio_synchronize_packet(A2DP_AUDIO_SYNCFRAME_INFO_T *sync_info, uint32_t mask);\nint a2dp_audio_decoder_headframe_info_get(A2DP_AUDIO_HEADFRAME_INFO_T *headframe_info);\nint a2dp_audio_get_packet_samples(void);\nint a2dp_audio_lastframe_info_get(A2DP_AUDIO_LASTFRAME_INFO_T *lastframe_info);\nint a2dp_audio_lastframe_info_reset_undecodeframe(void);\nvoid a2dp_audio_clear_input_raw_packet_list(void);\nint a2dp_audio_refill_packet(void);\nbool a2dp_audio_auto_synchronize_support(void);\nA2DP_AUDIO_OUTPUT_CONFIG_T *a2dp_audio_get_output_config(void);\nint a2dp_audio_latency_factor_setlow(void);\nint a2dp_audio_latency_factor_sethigh(void);\nfloat a2dp_audio_latency_factor_get(void);\nint a2dp_audio_latency_factor_set(float factor);\nint a2dp_audio_frame_delay_get(void);\nint a2dp_audio_dest_packet_mut_get(void);\nint a2dp_audio_latency_factor_status_get(A2DP_AUDIO_LATENCY_STATUS_E *latency_status, float *more_latency_factor);\n#if A2DP_DECODER_HISTORY_SEQ_SAVE \nint a2dp_audio_show_history_seq(void);\n#endif\nint a2dp_audio_set_channel_select(A2DP_AUDIO_CHANNEL_SELECT_E chnl_sel);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif//__A2DPPLAY_H__\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_aac_lc.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#define __STDC_LIMIT_MACROS\n#include \n#include \"a2dp_decoder_internal.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"heap_api.h\"\n#include \"plat_types.h\"\n#include \n\n#if defined(A2DP_AAC_ON)\n#include \"aacdecoder_lib.h\"\n#include \"aacenc_lib.h\"\n#include \"heap_api.h\"\n\n#ifndef AAC_MTU_LIMITER\n#define AAC_MTU_LIMITER (32) /*must <= 23*/\n#endif\n#define AAC_OUTPUT_FRAME_SAMPLES (1024)\n#define DECODE_AAC_PCM_FRAME_LENGTH (2048)\n\n#define AAC_READBUF_SIZE (900)\n\n#define AAC_MEMPOOL_SIZE (40596)\n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint8_t *aac_buffer;\n uint32_t aac_buffer_len;\n} a2dp_audio_aac_decoder_frame_t;\n\nint a2dp_audio_aac_lc_reorder_init(void);\nint a2dp_audio_aac_lc_reorder_deinit(void);\n\nstatic A2DP_AUDIO_CONTEXT_T *a2dp_audio_context_p = NULL;\n\nstatic HANDLE_AACDECODER aacDec_handle = NULL;\nstatic uint8_t *aac_mempoll = NULL;\nheap_handle_t aac_memhandle = NULL;\n\nstatic A2DP_AUDIO_DECODER_LASTFRAME_INFO_T a2dp_audio_aac_lastframe_info;\n\nstatic uint16_t aac_mtu_limiter = AAC_MTU_LIMITER;\n\nstatic a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_reorder_p = NULL;\nstatic a2dp_audio_aac_decoder_frame_t aac_decoder_last_valid_frame = {\n 0,\n};\nstatic bool aac_decoder_last_valid_frame_ready = false;\n\nstatic void *a2dp_audio_aac_lc_frame_malloc(uint32_t packet_len) {\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n uint8_t *aac_buffer = NULL;\n\n aac_buffer = (uint8_t *)a2dp_audio_heap_malloc(AAC_READBUF_SIZE);\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_heap_malloc(\n sizeof(a2dp_audio_aac_decoder_frame_t));\n aac_decoder_frame_p->aac_buffer = aac_buffer;\n aac_decoder_frame_p->aac_buffer_len = packet_len;\n return (void *)aac_decoder_frame_p;\n}\n\nstatic void a2dp_audio_aac_lc_free(void *packet) {\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)packet;\n a2dp_audio_heap_free(aac_decoder_frame_p->aac_buffer);\n a2dp_audio_heap_free(aac_decoder_frame_p);\n}\n\nstatic void a2dp_audio_aac_lc_decoder_init(void) {\n if (aacDec_handle == NULL) {\n TRANSPORT_TYPE transportFmt = TT_MP4_LATM_MCP1;\n\n aacDec_handle = aacDecoder_Open(transportFmt, 1 /* nrOfLayers */);\n ASSERT_A2DP_DECODER(aacDec_handle, \"aacDecoder_Open failed\");\n\n aacDecoder_SetParam(aacDec_handle, AAC_PCM_LIMITER_ENABLE, 0);\n aacDecoder_SetParam(aacDec_handle, AAC_DRC_ATTENUATION_FACTOR, 0);\n aacDecoder_SetParam(aacDec_handle, AAC_DRC_BOOST_FACTOR, 0);\n }\n}\n\nstatic void a2dp_audio_aac_lc_decoder_deinit(void) {\n if (aacDec_handle) {\n aacDecoder_Close(aacDec_handle);\n aacDec_handle = NULL;\n }\n}\n\nstatic void a2dp_audio_aac_lc_decoder_reinit(void) {\n if (aacDec_handle) {\n a2dp_audio_aac_lc_decoder_deinit();\n }\n a2dp_audio_aac_lc_decoder_init();\n}\n\n#ifdef A2DP_CP_ACCEL\nstruct A2DP_CP_AAC_LC_IN_FRM_INFO_T {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n};\n\nstruct A2DP_CP_AAC_LC_OUT_FRM_INFO_T {\n struct A2DP_CP_AAC_LC_IN_FRM_INFO_T in_info;\n uint16_t frame_samples;\n uint16_t decoded_frames;\n uint16_t frame_idx;\n uint16_t pcm_len;\n};\n\nstatic bool cp_codec_reset;\n\nextern \"C\" uint32_t get_in_cp_frame_cnt(void);\nextern \"C\" unsigned int set_cp_reset_flag(uint8_t evt);\nextern uint32_t app_bt_stream_get_dma_buffer_samples(void);\n\nint a2dp_cp_aac_lc_cp_decode(void);\n\nstatic int TEXT_AAC_LOC a2dp_cp_aac_lc_after_cache_underflow(void) {\n#ifdef A2DP_CP_ACCEL\n cp_codec_reset = true;\n#endif\n return 0;\n}\n\nstatic int a2dp_cp_aac_lc_mcu_decode(uint8_t *buffer, uint32_t buffer_bytes) {\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n list_node_t *node = NULL;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int ret, dec_ret;\n struct A2DP_CP_AAC_LC_IN_FRM_INFO_T in_info;\n struct A2DP_CP_AAC_LC_OUT_FRM_INFO_T *p_out_info;\n uint8_t *out;\n uint32_t out_len;\n uint32_t out_frame_len;\n uint32_t check_sum = 0;\n\n uint32_t cp_buffer_frames_max = 0;\n cp_buffer_frames_max = app_bt_stream_get_dma_buffer_samples() / 2;\n if (cp_buffer_frames_max % (a2dp_audio_aac_lastframe_info.frame_samples)) {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (a2dp_audio_aac_lastframe_info.frame_samples) +\n 1;\n } else {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (a2dp_audio_aac_lastframe_info.frame_samples);\n }\n\n out_frame_len = sizeof(*p_out_info) + buffer_bytes;\n\n ret = a2dp_cp_decoder_init(out_frame_len, cp_buffer_frames_max * 2);\n if (ret) {\n TRACE_A2DP_DECODER_W(\"[MCU][AAC] cp_decoder_init failed: ret=%d\", ret);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n while ((node = a2dp_audio_list_begin(list)) != NULL) {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n\n in_info.sequenceNumber = aac_decoder_frame_p->sequenceNumber;\n in_info.timestamp = aac_decoder_frame_p->timestamp;\n\n ret = a2dp_cp_put_in_frame(&in_info, sizeof(in_info),\n aac_decoder_frame_p->aac_buffer,\n aac_decoder_frame_p->aac_buffer_len);\n if (ret) {\n TRACE_A2DP_DECODER_D(\"[MCU][AAC] piff !!!!!!ret: %d \", ret);\n break;\n }\n check_sum = a2dp_audio_decoder_internal_check_sum_generate(\n aac_decoder_frame_p->aac_buffer, aac_decoder_frame_p->aac_buffer_len);\n a2dp_audio_list_remove(list, aac_decoder_frame_p);\n }\n ret = a2dp_cp_get_full_out_frame((void **)&out, &out_len);\n if (ret) {\n if (!get_in_cp_frame_cnt()) {\n TRACE_A2DP_DECODER_I(\"[MCU][AAC] cp cache underflow list:%d in_cp:%d\",\n a2dp_audio_list_length(list), get_in_cp_frame_cnt());\n return A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n if (!a2dp_audio_sysfreq_boost_running()) {\n a2dp_audio_sysfreq_boost_start(1);\n }\n osDelay(12);\n ret = a2dp_cp_get_full_out_frame((void **)&out, &out_len);\n if (ret) {\n TRACE_A2DP_DECODER_I(\"[MCU][AAC] cp cache underflow list:%d in_cp:%d\",\n a2dp_audio_list_length(list), get_in_cp_frame_cnt());\n a2dp_cp_aac_lc_after_cache_underflow();\n return A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n }\n\n if (out_len == 0) {\n memset(buffer, 0, buffer_bytes);\n a2dp_cp_consume_full_out_frame();\n TRACE_A2DP_DECODER_I(\"[MCU][AAC] olz!!!%d \", __LINE__);\n return A2DP_DECODER_NO_ERROR;\n }\n if (out_len != out_frame_len) {\n TRACE_A2DP_DECODER_I(\"[MCU][AAC] Bad out len %u (should be %u)\", out_len,\n out_frame_len);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n p_out_info = (struct A2DP_CP_AAC_LC_OUT_FRM_INFO_T *)out;\n if (p_out_info->pcm_len) {\n a2dp_audio_aac_lastframe_info.sequenceNumber =\n p_out_info->in_info.sequenceNumber;\n a2dp_audio_aac_lastframe_info.timestamp = p_out_info->in_info.timestamp;\n a2dp_audio_aac_lastframe_info.curSubSequenceNumber = 0;\n a2dp_audio_aac_lastframe_info.totalSubSequenceNumber = 0;\n a2dp_audio_aac_lastframe_info.frame_samples = p_out_info->frame_samples;\n a2dp_audio_aac_lastframe_info.decoded_frames += p_out_info->decoded_frames;\n a2dp_audio_aac_lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) +\n a2dp_cp_get_in_frame_cnt_by_index(p_out_info->frame_idx) - 1;\n a2dp_audio_aac_lastframe_info.check_sum =\n check_sum ? check_sum : a2dp_audio_aac_lastframe_info.check_sum;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_aac_lastframe_info);\n }\n\n if (p_out_info->pcm_len == buffer_bytes) {\n memcpy(buffer, p_out_info + 1, p_out_info->pcm_len);\n dec_ret = A2DP_DECODER_NO_ERROR;\n } else {\n TRACE_A2DP_DECODER_I(\"[MCU][AAC] olne!!!%d \", __LINE__);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n\n ret = a2dp_cp_consume_full_out_frame();\n if (ret) {\n\n TRACE_A2DP_DECODER_I(\n \"[MCU][AAC] cp consume_full_out_frame() failed: ret=%d\", ret);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n return dec_ret;\n}\n\n#ifdef __CP_EXCEPTION_TEST__\nstatic bool _cp_assert = false;\nint cp_assert(void) {\n _cp_assert = true;\n return 0;\n}\n#endif\n\nTEXT_AAC_LOC\nint a2dp_cp_aac_lc_cp_decode(void) {\n int ret;\n enum CP_EMPTY_OUT_FRM_T out_frm_st;\n uint8_t *out;\n uint32_t out_len;\n bool need_refill = false;\n uint8_t *dec_start;\n uint32_t dec_len;\n struct A2DP_CP_AAC_LC_IN_FRM_INFO_T *p_in_info;\n struct A2DP_CP_AAC_LC_OUT_FRM_INFO_T *p_out_info;\n uint8_t *in_buf;\n uint32_t in_len;\n uint32_t dec_sum;\n int error;\n uint32_t aac_maxreadBytes = AAC_READBUF_SIZE;\n UINT bufferSize = 0, bytesValid = 0;\n AAC_DECODER_ERROR decoder_err = AAC_DEC_OK;\n CStreamInfo *stream_info = NULL;\n if (cp_codec_reset) {\n cp_codec_reset = false;\n a2dp_audio_aac_lc_decoder_init();\n }\n\n#ifdef __CP_EXCEPTION_TEST__\n if (_cp_assert) {\n _cp_assert = false;\n *(int *)0 = 1;\n // ASSERT_A2DP_DECODER(0, \"ASSERT_A2DP_DECODER %s %d\", __func__, __LINE__);\n }\n#endif\n out_frm_st = a2dp_cp_get_emtpy_out_frame((void **)&out, &out_len);\n if (out_frm_st != CP_EMPTY_OUT_FRM_OK &&\n out_frm_st != CP_EMPTY_OUT_FRM_WORKING) {\n return 1;\n }\n ASSERT_A2DP_DECODER(out_len > sizeof(*p_out_info),\n \"%s: Bad out_len %u (should > %u)\", __func__, out_len,\n sizeof(*p_out_info));\n\n p_out_info = (struct A2DP_CP_AAC_LC_OUT_FRM_INFO_T *)out;\n if (out_frm_st == CP_EMPTY_OUT_FRM_OK) {\n p_out_info->pcm_len = 0;\n p_out_info->decoded_frames = 0;\n }\n ASSERT_A2DP_DECODER(out_len > sizeof(*p_out_info) + p_out_info->pcm_len,\n \"%s: Bad out_len %u (should > %u + %u)\", __func__,\n out_len, sizeof(*p_out_info), p_out_info->pcm_len);\n\n dec_start = (uint8_t *)(p_out_info + 1) + p_out_info->pcm_len;\n dec_len = out_len - (dec_start - (uint8_t *)out);\n\n if (dec_len < DECODE_AAC_PCM_FRAME_LENGTH) {\n TRACE_A2DP_DECODER_W(\"[CP][AAC] aac_lc_decode pcm_len = %d \\n\", dec_len);\n return 2;\n }\n if (!aacDec_handle) {\n TRACE_A2DP_DECODER_W(\"[CP][AAC] aac_lc_decode not ready\");\n return 3;\n }\n\n dec_sum = 0;\n error = 0;\n\n while (dec_sum < dec_len && error == 0) {\n ret = a2dp_cp_get_in_frame((void **)&in_buf, &in_len);\n if (ret) {\n return 4;\n }\n ASSERT_A2DP_DECODER(in_len > sizeof(*p_in_info),\n \"[CP][AAC] Bad in_len %u (should > %u)\", in_len,\n sizeof(*p_in_info));\n\n p_in_info = (struct A2DP_CP_AAC_LC_IN_FRM_INFO_T *)in_buf;\n if (need_refill) {\n p_in_info->sequenceNumber = UINT16_MAX;\n }\n in_buf += sizeof(*p_in_info);\n in_len -= sizeof(*p_in_info);\n\n if (in_len < 64)\n aac_maxreadBytes = 64;\n else if (in_len < 128)\n aac_maxreadBytes = 128;\n else if (in_len < 256)\n aac_maxreadBytes = 256;\n else if (in_len < 512)\n aac_maxreadBytes = 512;\n else if (in_len < 1024)\n aac_maxreadBytes = 1024;\n\n bufferSize = aac_maxreadBytes;\n bytesValid = aac_maxreadBytes;\n decoder_err =\n aacDecoder_Fill(aacDec_handle, &in_buf, &bufferSize, &bytesValid);\n if (decoder_err != AAC_DEC_OK) {\n TRACE_A2DP_DECODER_W(\"[CP][AAC] decoder_Fill failed:0x%x\", decoder_err);\n // if aac failed reopen it again\n if (is_aacDecoder_Close(aacDec_handle)) {\n a2dp_audio_aac_lc_decoder_reinit();\n TRACE_A2DP_DECODER_I(\"[CP][AAC] aac_lc_decode reinin codec \\n\");\n }\n error = 1;\n goto end_decode;\n }\n\n /* decode one AAC frame */\n decoder_err =\n aacDecoder_DecodeFrame(aacDec_handle, (short *)(dec_start + dec_sum),\n (dec_len - dec_sum) / 2, 0 /* flags */);\n TRACE_A2DP_DECODER_D(\"[CP][AAC] decoder seq:%d len:%d err:%x\",\n p_in_info->sequenceNumber, (dec_len - dec_sum),\n decoder_err);\n if (decoder_err != AAC_DEC_OK) {\n TRACE_A2DP_DECODER_W(\"[CP][AAC] aac_lc_decode failed:0x%x seq:%d\",\n decoder_err, p_in_info->sequenceNumber);\n // if aac failed reopen it again\n a2dp_audio_aac_lc_decoder_reinit();\n TRACE_A2DP_DECODER_I(\"[CP][AAC]aac_lc_decode reinin codec \\n\");\n if (!need_refill) {\n need_refill = true;\n ret = a2dp_cp_consume_in_frame();\n ASSERT(ret == 0, \"%s: a2dp_cp_consume_in_frame() failed: ret=%d\",\n __func__, ret);\n continue;\n } else {\n need_refill = false;\n error = 1;\n goto end_decode;\n }\n }\n\n stream_info = aacDecoder_GetStreamInfo(aacDec_handle);\n if (!stream_info || stream_info->sampleRate <= 0) {\n TRACE_A2DP_DECODER_I(\"[CP][AAC]aac_lc_decode invalid stream info\");\n error = 1;\n goto end_decode;\n }\n\n bufferSize = stream_info->frameSize * stream_info->numChannels *\n 2; // sizeof(pcm_buffer[0]);\n ASSERT_A2DP_DECODER(AAC_OUTPUT_FRAME_SAMPLES == bufferSize / 4,\n \"aac_lc_decode output mismatch samples:%d\",\n bufferSize / 4);\n\n dec_sum += bufferSize;\n\n end_decode:\n memcpy(&p_out_info->in_info, p_in_info, sizeof(*p_in_info));\n p_out_info->decoded_frames++;\n p_out_info->frame_samples = AAC_OUTPUT_FRAME_SAMPLES;\n p_out_info->frame_idx = a2dp_cp_get_in_frame_index();\n if (need_refill) {\n TRACE_A2DP_DECODER_W(\"[CP][AAC] resume refill seq:%d\",\n p_in_info->sequenceNumber);\n } else {\n ret = a2dp_cp_consume_in_frame();\n ASSERT_A2DP_DECODER(\n ret == 0, \"[CP][AAC] a2dp_cp_consume_in_frame() failed: ret=%d\", ret);\n }\n }\n\n p_out_info->pcm_len += dec_sum;\n\n if (error || out_len <= sizeof(*p_out_info) + p_out_info->pcm_len) {\n ret = a2dp_cp_consume_emtpy_out_frame();\n ASSERT_A2DP_DECODER(\n ret == 0, \"[CP][AAC] a2dp_cp_consume_emtpy_out_frame() failed: ret=%d\",\n ret);\n }\n\n return error;\n}\n#endif\n\nstatic int a2dp_audio_aac_lc_list_checker(void) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n int cnt = 0;\n\n do {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_aac_lc_frame_malloc(0);\n if (aac_decoder_frame_p) {\n a2dp_audio_list_append(list, aac_decoder_frame_p);\n }\n cnt++;\n } while (aac_decoder_frame_p && cnt < AAC_MTU_LIMITER);\n\n do {\n if ((node = a2dp_audio_list_begin(list)) != NULL) {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, aac_decoder_frame_p);\n }\n } while (node);\n\n TRACE_A2DP_DECODER_I(\"[AAC][INIT] cnt:%d list:%d\", cnt,\n a2dp_audio_list_length(list));\n\n return 0;\n}\n\nint a2dp_audio_aac_lc_channel_select(A2DP_AUDIO_CHANNEL_SELECT_E chnl_sel) {\n AAC_DECODER_CHANNEL_SELECT_E aac_decoder_channel_select =\n AAC_DECODER_CHANNEL_SELECT_SELECT_STEREO;\n switch (chnl_sel) {\n case A2DP_AUDIO_CHANNEL_SELECT_STEREO:\n aac_decoder_channel_select = AAC_DECODER_CHANNEL_SELECT_SELECT_STEREO;\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_LRMERGE:\n aac_decoder_channel_select = AAC_DECODER_CHANNEL_SELECT_SELECT_LRMERGE;\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_LCHNL:\n aac_decoder_channel_select = AAC_DECODER_CHANNEL_SELECT_LCHNL;\n break;\n case A2DP_AUDIO_CHANNEL_SELECT_RCHNL:\n aac_decoder_channel_select = AAC_DECODER_CHANNEL_SELECT_RCHNL;\n default:\n break;\n }\n aacDecoder_DecodeFrame_Config(aac_decoder_channel_select);\n\n return 0;\n}\n\nint a2dp_audio_aac_lc_init(A2DP_AUDIO_OUTPUT_CONFIG_T *config, void *context) {\n TRACE_A2DP_DECODER_I(\"[AAC] init\");\n\n a2dp_audio_context_p = (A2DP_AUDIO_CONTEXT_T *)context;\n\n memset(&a2dp_audio_aac_lastframe_info, 0,\n sizeof(A2DP_AUDIO_DECODER_LASTFRAME_INFO_T));\n a2dp_audio_aac_lastframe_info.stream_info = *config;\n a2dp_audio_aac_lastframe_info.frame_samples = AAC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_aac_lastframe_info.list_samples = AAC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_aac_lastframe_info);\n\n ASSERT_A2DP_DECODER(a2dp_audio_context_p->dest_packet_mut < AAC_MTU_LIMITER,\n \"%s MTU OVERFLOW:%u/%u\", __func__,\n a2dp_audio_context_p->dest_packet_mut, AAC_MTU_LIMITER);\n\n aac_mempoll = (uint8_t *)a2dp_audio_heap_malloc(AAC_MEMPOOL_SIZE);\n ASSERT_A2DP_DECODER(aac_mempoll, \"aac_mempoll = NULL\");\n aac_memhandle = heap_register(aac_mempoll, AAC_MEMPOOL_SIZE);\n\n#ifdef A2DP_CP_ACCEL\n int ret;\n\n cp_codec_reset = true;\n ret = a2dp_cp_init(a2dp_cp_aac_lc_cp_decode, CP_PROC_DELAY_2_FRAMES);\n ASSERT_A2DP_DECODER(ret == 0, \"%s: a2dp_cp_init() failed: ret=%d\", __func__,\n ret);\n#else\n a2dp_audio_aac_lc_decoder_init();\n#endif\n a2dp_audio_aac_lc_reorder_init();\n a2dp_audio_aac_lc_list_checker();\n\n a2dp_audio_aac_lc_channel_select(a2dp_audio_context_p->chnl_sel);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_deinit(void) {\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_deinit();\n#endif\n a2dp_audio_aac_lc_decoder_deinit();\n a2dp_audio_aac_lc_reorder_deinit();\n size_t total = 0, used = 0, max_used = 0;\n heap_memory_info(aac_memhandle, &total, &used, &max_used);\n a2dp_audio_heap_free(aac_mempoll);\n TRACE_A2DP_DECODER_I(\n \"[AAC] deinit MEM: total - %d, used - %d, max_used - %d.\", total, used,\n max_used);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_mcu_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n\n UINT bufferSize = 0, bytesValid = 0;\n AAC_DECODER_ERROR decoder_err = AAC_DEC_OK;\n CStreamInfo *stream_info = NULL;\n\n bool cache_underflow = false;\n uint32_t aac_maxreadBytes = AAC_READBUF_SIZE;\n int output_byte = 0;\n\n if (buffer_bytes < DECODE_AAC_PCM_FRAME_LENGTH) {\n TRACE_A2DP_DECODER_W(\"[MCU][AAC] pcm_len = %d \\n\", buffer_bytes);\n return A2DP_DECODER_NO_ERROR;\n }\n if (!aacDec_handle) {\n TRACE_A2DP_DECODER_W(\"[MCU][AAC] aac_lc_decode not ready\");\n return A2DP_DECODER_NO_ERROR;\n }\n\n node = a2dp_audio_list_begin(list);\n if (!node) {\n TRACE_A2DP_DECODER_W(\"[MCU][AAC] cache underflow\");\n cache_underflow = true;\n goto exit;\n } else {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n\n if (aac_decoder_frame_p->aac_buffer_len < 64)\n aac_maxreadBytes = 64;\n else if (aac_decoder_frame_p->aac_buffer_len < 128)\n aac_maxreadBytes = 128;\n else if (aac_decoder_frame_p->aac_buffer_len < 256)\n aac_maxreadBytes = 256;\n else if (aac_decoder_frame_p->aac_buffer_len < 512)\n aac_maxreadBytes = 512;\n else if (aac_decoder_frame_p->aac_buffer_len < 1024)\n aac_maxreadBytes = 1024;\n\n bufferSize = aac_maxreadBytes;\n bytesValid = aac_maxreadBytes;\n decoder_err =\n aacDecoder_Fill(aacDec_handle, &(aac_decoder_frame_p->aac_buffer),\n &bufferSize, &bytesValid);\n if (decoder_err != AAC_DEC_OK) {\n TRACE_A2DP_DECODER_W(\"[MCU][AAC] aacDecoder_Fill failed:0x%x\",\n decoder_err);\n // if aac failed reopen it again\n if (is_aacDecoder_Close(aacDec_handle)) {\n a2dp_audio_aac_lc_decoder_reinit();\n TRACE_A2DP_DECODER_I(\"[MCU][AAC] aac_lc_decode reinin codec \\n\");\n }\n goto end_decode;\n }\n\n /* decode one AAC frame */\n decoder_err = aacDecoder_DecodeFrame(aacDec_handle, (short *)buffer,\n buffer_bytes / 2, 0 /* flags */);\n TRACE_A2DP_DECODER_D(\"[MCU][AAC] decoder seq:%d len:%d err:%x\",\n aac_decoder_frame_p->sequenceNumber,\n aac_decoder_frame_p->aac_buffer_len, decoder_err);\n if (decoder_err != AAC_DEC_OK) {\n TRACE_A2DP_DECODER_W(\"[MCU][AAC]aac_lc_decode failed:0x%x\", decoder_err);\n // if aac failed reopen it again\n if (is_aacDecoder_Close(aacDec_handle)) {\n a2dp_audio_aac_lc_decoder_reinit();\n TRACE_A2DP_DECODER_I(\"[MCU][AAC]aac_lc_decode reinin codec \\n\");\n }\n goto end_decode;\n }\n\n stream_info = aacDecoder_GetStreamInfo(aacDec_handle);\n if (!stream_info || stream_info->sampleRate <= 0) {\n TRACE_A2DP_DECODER_W(\"[MCU][AAC]aac_lc_decode invalid stream info\");\n goto end_decode;\n }\n\n output_byte = stream_info->frameSize * stream_info->numChannels *\n 2; // sizeof(pcm_buffer[0]);\n ASSERT_A2DP_DECODER(AAC_OUTPUT_FRAME_SAMPLES == output_byte / 4,\n \"aac_lc_decode output mismatch samples:%d\",\n output_byte / 4);\n end_decode:\n a2dp_audio_aac_lastframe_info.sequenceNumber =\n aac_decoder_frame_p->sequenceNumber;\n a2dp_audio_aac_lastframe_info.timestamp = aac_decoder_frame_p->timestamp;\n a2dp_audio_aac_lastframe_info.curSubSequenceNumber = 0;\n a2dp_audio_aac_lastframe_info.totalSubSequenceNumber = 0;\n a2dp_audio_aac_lastframe_info.frame_samples = AAC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_aac_lastframe_info.decoded_frames++;\n a2dp_audio_aac_lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) - 1;\n a2dp_audio_aac_lastframe_info.check_sum =\n a2dp_audio_decoder_internal_check_sum_generate(\n aac_decoder_frame_p->aac_buffer,\n aac_decoder_frame_p->aac_buffer_len);\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_aac_lastframe_info);\n a2dp_audio_list_remove(list, aac_decoder_frame_p);\n }\nexit:\n if (cache_underflow) {\n a2dp_audio_aac_lastframe_info.undecode_frames = 0;\n a2dp_audio_aac_lastframe_info.check_sum = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_aac_lastframe_info);\n output_byte = A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n return output_byte;\n}\n\nint a2dp_audio_aac_lc_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n#ifdef A2DP_CP_ACCEL\n return a2dp_cp_aac_lc_mcu_decode(buffer, buffer_bytes);\n#else\n return a2dp_audio_aac_lc_mcu_decode_frame(buffer, buffer_bytes);\n#endif\n}\n\nint a2dp_audio_aac_lc_preparse_packet(btif_media_header_t *header,\n uint8_t *buffer, uint32_t buffer_bytes) {\n a2dp_audio_aac_lastframe_info.sequenceNumber = header->sequenceNumber;\n a2dp_audio_aac_lastframe_info.timestamp = header->timestamp;\n a2dp_audio_aac_lastframe_info.curSubSequenceNumber = 0;\n a2dp_audio_aac_lastframe_info.totalSubSequenceNumber = 0;\n a2dp_audio_aac_lastframe_info.frame_samples = AAC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_aac_lastframe_info.list_samples = AAC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_aac_lastframe_info.decoded_frames = 0;\n a2dp_audio_aac_lastframe_info.undecode_frames = 0;\n a2dp_audio_aac_lastframe_info.check_sum = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_aac_lastframe_info);\n\n TRACE_A2DP_DECODER_I(\"[AAC][PRE] seq:%d timestamp:%08x\",\n header->sequenceNumber, header->timestamp);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_reorder_init(void) {\n aac_decoder_frame_reorder_p = NULL;\n aac_decoder_last_valid_frame_ready = false;\n aac_decoder_last_valid_frame.sequenceNumber = 0;\n aac_decoder_last_valid_frame.timestamp = 0;\n aac_decoder_last_valid_frame.aac_buffer = NULL;\n aac_decoder_last_valid_frame.aac_buffer_len = 0;\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_reorder_deinit(void) {\n aac_decoder_frame_reorder_p = NULL;\n aac_decoder_last_valid_frame_ready = false;\n aac_decoder_last_valid_frame.sequenceNumber = 0;\n aac_decoder_last_valid_frame.timestamp = 0;\n aac_decoder_last_valid_frame.aac_buffer = NULL;\n aac_decoder_last_valid_frame.aac_buffer_len = 0;\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_reorder_store_packet(\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p,\n btif_media_header_t *header, uint8_t *buffer, uint32_t buffer_bytes) {\n aac_decoder_frame_p->sequenceNumber = header->sequenceNumber;\n aac_decoder_frame_p->timestamp = header->timestamp;\n memcpy(aac_decoder_frame_p->aac_buffer, buffer, buffer_bytes);\n aac_decoder_frame_p->aac_buffer_len = buffer_bytes;\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_reorder_proc(\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p,\n btif_media_header_t *header, uint8_t *buffer, uint32_t buffer_bytes) {\n uint8_t *dest_buf = NULL;\n if ((aac_decoder_frame_p->aac_buffer_len + buffer_bytes) > AAC_READBUF_SIZE) {\n return A2DP_DECODER_NO_ERROR;\n }\n TRACE_A2DP_DECODER_W(\"[AAC][INPUT][REORDER] proc enter seq:%d len:%d\",\n aac_decoder_frame_p->sequenceNumber,\n aac_decoder_frame_p->aac_buffer_len);\n dest_buf =\n &aac_decoder_frame_p->aac_buffer[aac_decoder_frame_p->aac_buffer_len];\n memcpy(dest_buf, buffer, buffer_bytes);\n aac_decoder_frame_p->aac_buffer_len += buffer_bytes;\n TRACE_A2DP_DECODER_W(\"[AAC][INPUT][REORDER] proc exit seq:%d len:%d\",\n aac_decoder_frame_p->sequenceNumber,\n aac_decoder_frame_p->aac_buffer_len);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_packet_recover_save_last(\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame) {\n aac_decoder_last_valid_frame_ready = true;\n aac_decoder_last_valid_frame.sequenceNumber =\n aac_decoder_frame->sequenceNumber;\n aac_decoder_last_valid_frame.timestamp = aac_decoder_frame->timestamp;\n return 0;\n}\n\nint a2dp_audio_aac_lc_packet_recover_find_missing(\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame) {\n uint16_t diff_seq = 0;\n uint32_t diff_timestamp = 0;\n uint32_t diff = 0;\n float tmp_pkt_cnt = 0;\n uint32_t need_recover_pkt = 0;\n\n if (!aac_decoder_last_valid_frame_ready) {\n return need_recover_pkt;\n }\n\n diff_seq = a2dp_audio_get_passed(aac_decoder_frame->sequenceNumber,\n aac_decoder_last_valid_frame.sequenceNumber,\n UINT16_MAX);\n diff_timestamp =\n a2dp_audio_get_passed(aac_decoder_frame->timestamp,\n aac_decoder_last_valid_frame.timestamp, UINT32_MAX);\n\n if (diff_seq > 1) {\n TRACE_A2DP_DECODER_W(\"[AAC][INPUT][PLC] seq:%d/%d stmp:%d/%d\",\n aac_decoder_frame->sequenceNumber,\n aac_decoder_last_valid_frame.sequenceNumber,\n aac_decoder_frame->timestamp,\n aac_decoder_last_valid_frame.timestamp);\n diff = diff_timestamp / diff_seq;\n if (diff % AAC_OUTPUT_FRAME_SAMPLES == 0) {\n tmp_pkt_cnt = diff_timestamp / AAC_OUTPUT_FRAME_SAMPLES;\n } else {\n tmp_pkt_cnt =\n (float)diff_timestamp /\n ((1000.f / (float)a2dp_audio_context_p->output_cfg.sample_rate) *\n (float)AAC_OUTPUT_FRAME_SAMPLES);\n }\n need_recover_pkt = (uint32_t)(tmp_pkt_cnt + 0.5f);\n TRACE_A2DP_DECODER_W(\n \"[AAC][INPUT][PLC] diff_seq:%d diff_stmp:%d diff:%d missing:%d\",\n diff_seq, diff_timestamp, diff, need_recover_pkt);\n if (need_recover_pkt == diff_seq) {\n need_recover_pkt--;\n TRACE_A2DP_DECODER_W(\"[AAC][INPUT][PLC] need_recover_pkt seq:%d\",\n need_recover_pkt);\n } else {\n need_recover_pkt = 0;\n }\n }\n return need_recover_pkt;\n}\n\nint a2dp_audio_aac_lc_packet_recover_proc(\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int missing_pkt_cnt = 0;\n missing_pkt_cnt =\n a2dp_audio_aac_lc_packet_recover_find_missing(aac_decoder_frame);\n if (missing_pkt_cnt <= 4 &&\n a2dp_audio_list_length(list) + missing_pkt_cnt < aac_mtu_limiter) {\n for (uint8_t i = 0; i < missing_pkt_cnt; i++) {\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_aac_lc_frame_malloc(\n aac_decoder_frame->aac_buffer_len);\n aac_decoder_frame_p->sequenceNumber = UINT16_MAX;\n aac_decoder_frame_p->timestamp = UINT32_MAX;\n memcpy(aac_decoder_frame_p->aac_buffer, aac_decoder_frame->aac_buffer,\n aac_decoder_frame->aac_buffer_len);\n aac_decoder_frame_p->aac_buffer_len = aac_decoder_frame->aac_buffer_len;\n a2dp_audio_list_append(list, aac_decoder_frame_p);\n }\n }\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint inline a2dp_audio_aac_lc_packet_append(\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_aac_lc_packet_recover_proc(aac_decoder_frame);\n a2dp_audio_aac_lc_packet_recover_save_last(aac_decoder_frame);\n a2dp_audio_list_append(list, aac_decoder_frame);\n return 0;\n}\n\n#if 1\nint a2dp_audio_aac_lc_store_packet(btif_media_header_t *header, uint8_t *buffer,\n uint32_t buffer_bytes) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int nRet = A2DP_DECODER_NO_ERROR;\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n\n if (a2dp_audio_list_length(list) < aac_mtu_limiter &&\n buffer_bytes <= AAC_READBUF_SIZE) {\n if (aac_decoder_frame_reorder_p == NULL) {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_aac_lc_frame_malloc(\n buffer_bytes);\n aac_decoder_frame_reorder_p = aac_decoder_frame_p;\n TRACE_A2DP_DECODER_W(\"[AAC][INPUT][REORDER] start seq:%d len:%d\",\n header->sequenceNumber, buffer_bytes);\n a2dp_audio_aac_lc_reorder_store_packet(aac_decoder_frame_p, header,\n buffer, buffer_bytes);\n } else {\n if (aac_decoder_frame_reorder_p->aac_buffer[0] == buffer[0] &&\n aac_decoder_frame_reorder_p->aac_buffer[1] == buffer[1]) {\n a2dp_audio_aac_lc_packet_append(aac_decoder_frame_reorder_p);\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_aac_lc_frame_malloc(\n buffer_bytes);\n aac_decoder_frame_reorder_p = aac_decoder_frame_p;\n a2dp_audio_aac_lc_reorder_store_packet(aac_decoder_frame_p, header,\n buffer, buffer_bytes);\n } else {\n aac_decoder_frame_p = aac_decoder_frame_reorder_p;\n a2dp_audio_aac_lc_reorder_proc(aac_decoder_frame_p, header, buffer,\n buffer_bytes);\n a2dp_audio_aac_lc_packet_append(aac_decoder_frame_p);\n aac_decoder_frame_reorder_p = NULL;\n }\n }\n nRet = A2DP_DECODER_NO_ERROR;\n } else {\n TRACE_A2DP_DECODER_W(\n \"[AAC][INPUT] list full current list_len:%d buff_len:%d\",\n a2dp_audio_list_length(list), buffer_bytes);\n nRet = A2DP_DECODER_MTU_LIMTER_ERROR;\n }\n\n return nRet;\n}\n#else\nint a2dp_audio_aac_lc_store_packet(btif_media_header_t *header, uint8_t *buffer,\n uint32_t buffer_bytes) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int nRet = A2DP_DECODER_NO_ERROR;\n\n if (!a2dp_audio_aac_lc_reorder_valid(header, buffer, buffer_bytes)) {\n return A2DP_DECODER_NO_ERROR;\n }\n\n if (a2dp_audio_list_length(list) < aac_mtu_limiter &&\n buffer_bytes <= AAC_READBUF_SIZE) {\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_aac_lc_frame_malloc(\n buffer_bytes);\n TRACE_A2DP_DECODER_D(\"[AAC][INPUT]seq:%d len:%d\", header->sequenceNumber,\n buffer_bytes);\n aac_decoder_frame_p->sequenceNumber = header->sequenceNumber;\n aac_decoder_frame_p->timestamp = header->timestamp;\n memcpy(aac_decoder_frame_p->aac_buffer, buffer, buffer_bytes);\n aac_decoder_frame_p->aac_buffer_len = buffer_bytes;\n a2dp_audio_aac_lc_reorder_history(aac_decoder_frame_p);\n a2dp_audio_list_append(list, aac_decoder_frame_p);\n nRet = A2DP_DECODER_NO_ERROR;\n } else {\n TRACE_A2DP_DECODER_I(\n \"[AAC][INPUT] list full current list_len:%d buff_len:%d\",\n a2dp_audio_list_length(list), buffer_bytes);\n nRet = A2DP_DECODER_MTU_LIMTER_ERROR;\n }\n\n return nRet;\n}\n#endif\n\nint a2dp_audio_aac_lc_discards_packet(uint32_t packets) {\n int nRet = A2DP_DECODER_MEMORY_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n\n if (packets <= a2dp_audio_list_length(list)) {\n for (uint8_t i = 0; i < packets; i++) {\n if ((node = a2dp_audio_list_begin(list)) != NULL) {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, aac_decoder_frame_p);\n }\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n\n TRACE_A2DP_DECODER_I(\"[AAC][DISCARDS] packets:%d nRet:%d\", packets, nRet);\n return nRet;\n}\n\nint a2dp_audio_aac_lc_headframe_info_get(\n A2DP_AUDIO_HEADFRAME_INFO_T *headframe_info) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame = NULL;\n\n if (a2dp_audio_list_length(list) &&\n ((node = a2dp_audio_list_begin(list)) != NULL)) {\n aac_decoder_frame =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n headframe_info->sequenceNumber = aac_decoder_frame->sequenceNumber;\n headframe_info->timestamp = aac_decoder_frame->timestamp;\n headframe_info->curSubSequenceNumber = 0;\n headframe_info->totalSubSequenceNumber = 0;\n } else {\n memset(headframe_info, 0, sizeof(A2DP_AUDIO_HEADFRAME_INFO_T));\n }\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_info_get(void *info) { return A2DP_DECODER_NO_ERROR; }\n\nint a2dp_audio_aac_lc_synchronize_packet(A2DP_AUDIO_SYNCFRAME_INFO_T *sync_info,\n uint32_t mask) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n int list_len;\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n\n list_len = a2dp_audio_list_length(list);\n\n for (uint16_t i = 0; i < list_len; i++) {\n node = a2dp_audio_list_begin(list);\n if (node) {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n TRACE_A2DP_DECODER_D(\n \"[synchronize_packet]%d/%d %x/%x\",\n aac_decoder_frame_p->sequenceNumber, sync_info->sequenceNumber,\n aac_decoder_frame_p->timestamp, sync_info->timestamp);\n if (A2DP_AUDIO_SYNCFRAME_CHK(aac_decoder_frame_p->sequenceNumber ==\n sync_info->sequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_SEQ, mask) &&\n A2DP_AUDIO_SYNCFRAME_CHK(aac_decoder_frame_p->timestamp ==\n sync_info->timestamp,\n A2DP_AUDIO_SYNCFRAME_MASK_TIMESTAMP, mask)) {\n nRet = A2DP_DECODER_NO_ERROR;\n break;\n }\n a2dp_audio_list_remove(list, aac_decoder_frame_p);\n }\n }\n\n node = a2dp_audio_list_begin(list);\n if (node) {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n TRACE_A2DP_DECODER_I(\n \"[MCU][SYNC][AAC] sync pkt nRet:%d SEQ:%d timestamp:%d\", nRet,\n aac_decoder_frame_p->sequenceNumber, aac_decoder_frame_p->timestamp);\n } else {\n TRACE_A2DP_DECODER_I(\"[MCU][SYNC][AAC] sync pkt nRet:%d\", nRet);\n }\n\n return nRet;\n}\n\nint a2dp_audio_aac_lc_synchronize_dest_packet_mut(uint16_t packet_mut) {\n list_node_t *node = NULL;\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n\n list_len = a2dp_audio_list_length(list);\n if (list_len > packet_mut) {\n do {\n node = a2dp_audio_list_begin(list);\n if (node) {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, aac_decoder_frame_p);\n }\n } while (a2dp_audio_list_length(list) > packet_mut);\n }\n\n if (packet_mut == 0) {\n if (aac_decoder_frame_reorder_p) {\n a2dp_audio_aac_lc_free(aac_decoder_frame_reorder_p);\n a2dp_audio_aac_lc_reorder_init();\n }\n }\n\n TRACE_A2DP_DECODER_I(\"[MCU][SYNC][AAC] dest pkt list:%d\",\n a2dp_audio_list_length(list));\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_convert_list_to_samples(uint32_t *samples) {\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n\n list_len = a2dp_audio_list_length(list);\n *samples = AAC_OUTPUT_FRAME_SAMPLES * list_len;\n\n TRACE_A2DP_DECODER_I(\"AUD][DECODER][MCU][AAC] list:%d samples:%d\", list_len,\n *samples);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_aac_lc_discards_samples(uint32_t samples) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_aac_decoder_frame_t *aac_decoder_frame_p = NULL;\n list_node_t *node = NULL;\n int need_remove_list = 0;\n uint32_t list_samples = 0;\n ASSERT_A2DP_DECODER(!(samples % AAC_OUTPUT_FRAME_SAMPLES),\n \"%s samples err:%d\", __func__, samples);\n\n a2dp_audio_aac_lc_convert_list_to_samples(&list_samples);\n if (list_samples >= samples) {\n need_remove_list = samples / AAC_OUTPUT_FRAME_SAMPLES;\n for (int i = 0; i < need_remove_list; i++) {\n node = a2dp_audio_list_begin(list);\n if (node) {\n aac_decoder_frame_p =\n (a2dp_audio_aac_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, aac_decoder_frame_p);\n }\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n\n return nRet;\n}\n\nA2DP_AUDIO_DECODER_T a2dp_audio_aac_lc_decoder_config = {\n {44100, 2, 16},\n 1,\n a2dp_audio_aac_lc_init,\n a2dp_audio_aac_lc_deinit,\n a2dp_audio_aac_lc_decode_frame,\n a2dp_audio_aac_lc_preparse_packet,\n a2dp_audio_aac_lc_store_packet,\n a2dp_audio_aac_lc_discards_packet,\n a2dp_audio_aac_lc_synchronize_packet,\n a2dp_audio_aac_lc_synchronize_dest_packet_mut,\n a2dp_audio_aac_lc_convert_list_to_samples,\n a2dp_audio_aac_lc_discards_samples,\n a2dp_audio_aac_lc_headframe_info_get,\n a2dp_audio_aac_lc_info_get,\n a2dp_audio_aac_lc_free,\n a2dp_audio_aac_lc_channel_select,\n};\n#else\nA2DP_AUDIO_DECODER_T a2dp_audio_aac_lc_decoder_config = {\n 0,\n};\n#endif\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_cp.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef A2DP_CP_ACCEL\n\n#include \"a2dp_decoder_cp.h\"\n#include \"a2dp_decoder_internal.h\"\n#include \"cp_accel.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"heap_api.h\"\n#include \"norflash_api.h\"\n\n#define CP_IN_FRAME_CNT 100\n#define CP_OUT_FRAME_CNT 3\n\n#define CP_IN_CACHE_SIZE (1024 * 10)\n\n#if defined(A2DP_LHDC_V3)\n#define CP_HEAP_SIZE (1024 * 64)\n#else\n#define CP_HEAP_SIZE (1024 * 32)\n#endif\n\nenum CP_DEC_STATE_T {\n CP_DEC_STATE_IDLE,\n CP_DEC_STATE_WORKING,\n CP_DEC_STATE_DONE,\n CP_DEC_STATE_INIT_DONE,\n};\n\nstruct CP_IN_FRAME_INFO_T {\n uint32_t pos;\n uint32_t len;\n};\n\nstruct CP_OUT_FRAME_INFO_T {\n enum CP_DEC_STATE_T state;\n uint32_t pos;\n uint32_t len;\n};\n\nstatic CP_BSS_LOC uint32_t cp_heap_buf[CP_HEAP_SIZE / 4];\nstatic CP_BSS_LOC heap_handle_t cp_heap;\n\nstatic CP_BSS_LOC uint16_t cp_in_widx;\nstatic CP_BSS_LOC uint16_t cp_in_ridx;\n\nstatic CP_BSS_LOC uint8_t cp_out_widx;\nstatic CP_BSS_LOC uint8_t cp_out_ridx;\n\nstatic CP_BSS_LOC struct CP_IN_FRAME_INFO_T *in_frames;\nstatic CP_BSS_LOC struct CP_OUT_FRAME_INFO_T *out_frames;\n\nstatic CP_BSS_LOC uint8_t *cp_in_cache;\nstatic CP_BSS_LOC uint8_t *cp_out_cache;\n\nstatic CP_BSS_LOC bool reset_frames;\n\n#ifdef A2DP_TRACE_CP_DEC_TIME\nstatic CP_BSS_LOC uint32_t cp_last_dec_time;\n#endif\n\nstatic uint8_t max_buffer_frames = 2;\nstatic bool mcu_dec_inited;\nstatic A2DP_CP_DECODE_T decode_frame;\nstatic enum CP_PROC_DELAY_T proc_delay;\n\nstatic bool cp_need_reset;\n\nCP_TEXT_SRAM_LOC\nunsigned int set_cp_reset_flag(uint8_t evt) {\n cp_need_reset = true;\n return 0;\n}\n\nbool is_cp_need_reset(void) {\n bool ret = cp_need_reset;\n cp_need_reset = false;\n return ret;\n}\n\nbool is_cp_init_done(void) { return cp_accel_init_done(); }\n\nCP_TEXT_SRAM_LOC\nstatic void reset_frame_info(void) {\n uint32_t idle_cnt;\n int i;\n\n if (proc_delay == CP_PROC_DELAY_0_FRAME) {\n idle_cnt = CP_OUT_FRAME_CNT;\n } else if (proc_delay == CP_PROC_DELAY_1_FRAME) {\n idle_cnt = CP_OUT_FRAME_CNT - 1;\n } else {\n idle_cnt = CP_OUT_FRAME_CNT - 2;\n }\n\n for (i = 0; i < CP_OUT_FRAME_CNT; i++) {\n if (i < idle_cnt) {\n out_frames[i].state = CP_DEC_STATE_IDLE;\n } else {\n out_frames[i].state = CP_DEC_STATE_INIT_DONE;\n }\n }\n\n cp_in_widx = 0;\n cp_in_ridx = 0;\n cp_out_widx = 0;\n cp_out_ridx = idle_cnt;\n\n reset_frames = false;\n}\n\nCP_TEXT_SRAM_LOC\nstatic unsigned int cp_a2dp_main(uint8_t event) {\n int ret;\n#ifdef A2DP_TRACE_CP_DEC_TIME\n uint32_t stime;\n uint32_t etime;\n#endif\n\n if (!mcu_dec_inited) {\n return 0;\n }\n\n if (decode_frame) {\n do {\n#ifdef A2DP_TRACE_CP_DEC_TIME\n stime = hal_fast_sys_timer_get();\n#endif\n\n ret = decode_frame();\n\n#ifdef A2DP_TRACE_CP_DEC_TIME\n etime = hal_fast_sys_timer_get();\n TRACE_A2DP_DECODER_I(\"cp_decode: %5u us in %5u us\",\n FAST_TICKS_TO_US(etime - stime),\n FAST_TICKS_TO_US(etime - cp_last_dec_time));\n cp_last_dec_time = etime;\n#endif\n } while (ret == 0);\n }\n\n if (reset_frames) {\n reset_frame_info();\n#ifdef A2DP_TRACE_CP_ACCEL\n TRACE_A2DP_DECODER_I(\"%s: Reset frames\", __func__);\n#endif\n }\n\n return 0;\n}\n\nstatic struct cp_task_desc TASK_DESC_A2DP = {\n CP_ACCEL_STATE_CLOSED, cp_a2dp_main, NULL, NULL, set_cp_reset_flag};\nint a2dp_cp_init(A2DP_CP_DECODE_T decode_func, enum CP_PROC_DELAY_T delay) {\n if (delay >= CP_PROC_DELAY_QTY) {\n return 1;\n }\n mcu_dec_inited = false;\n decode_frame = decode_func;\n proc_delay = delay;\n#ifdef A2DP_TRACE_CP_DEC_TIME\n cp_last_dec_time = hal_fast_sys_timer_get();\n#endif\n\n norflash_api_flush_disable(NORFLASH_API_USER_CP,\n (uint32_t)cp_accel_init_done);\n cp_accel_open(CP_TASK_A2DP_DECODE, &TASK_DESC_A2DP);\n while (cp_accel_init_done() == false) {\n hal_sys_timer_delay_us(100);\n }\n norflash_api_flush_enable(NORFLASH_API_USER_CP);\n return 0;\n}\nint a2dp_cp_deinit(void) {\n cp_accel_close(CP_TASK_A2DP_DECODE);\n\n return 0;\n}\n\nSRAM_TEXT_LOC\nint a2dp_cp_decoder_init(uint32_t out_frame_len, uint8_t max_frames) {\n uint32_t i;\n max_buffer_frames = max_frames;\n if (!mcu_dec_inited) {\n#ifdef A2DP_TRACE_CP_ACCEL\n TRACE_A2DP_DECODER_I(\"%s: Decoder init\", __func__);\n#endif\n if (cp_accel_init_done() == false) {\n TRACE_A2DP_DECODER_I(\"%s: CP ACCEL not init yet\", __func__);\n return 6;\n }\n\n cp_heap = heap_register(cp_heap_buf, sizeof(cp_heap_buf));\n if (cp_heap == NULL) {\n return 1;\n }\n\n in_frames = heap_malloc(cp_heap, sizeof(in_frames[0]) * CP_IN_FRAME_CNT);\n if (in_frames == NULL) {\n return 2;\n }\n\n out_frames = heap_malloc(cp_heap, sizeof(out_frames[0]) * CP_OUT_FRAME_CNT);\n if (out_frames == NULL) {\n return 3;\n }\n\n cp_in_cache = heap_malloc(cp_heap, CP_IN_CACHE_SIZE);\n if (cp_in_cache == NULL) {\n return 4;\n }\n\n cp_out_cache = heap_malloc(cp_heap, out_frame_len * CP_OUT_FRAME_CNT);\n if (cp_out_cache == NULL) {\n return 5;\n }\n\n for (i = 0; i < CP_OUT_FRAME_CNT; i++) {\n out_frames[i].pos = out_frame_len * i;\n out_frames[i].len = out_frame_len;\n }\n reset_frame_info();\n\n mcu_dec_inited = true;\n }\n\n return 0;\n}\n\nCP_TEXT_SRAM_LOC\nstatic uint32_t get_in_frame_cnt(uint32_t in_widx, uint32_t in_ridx) {\n uint32_t cnt;\n\n if (in_widx >= in_ridx) {\n cnt = in_widx - in_ridx;\n } else {\n cnt = CP_IN_FRAME_CNT - in_ridx + in_widx;\n }\n\n return cnt;\n}\n\nuint32_t get_in_cp_frame_cnt(void) {\n return get_in_frame_cnt(cp_in_widx, cp_in_ridx);\n}\n\nuint32_t get_in_cp_frame_delay(void) { return proc_delay; }\n\nSRAM_TEXT_LOC\nstatic uint32_t get_in_frame_free_cnt(uint32_t in_widx, uint32_t in_ridx) {\n uint32_t free_cnt;\n\n if (in_widx >= in_ridx) {\n free_cnt = CP_IN_FRAME_CNT - in_widx + in_ridx;\n } else {\n free_cnt = in_ridx - in_widx;\n }\n free_cnt -= 1;\n\n return free_cnt;\n}\n\nSRAM_TEXT_LOC\nint a2dp_cp_put_in_frame(const void *buf1, uint32_t len1, const void *buf2,\n uint32_t len2) {\n uint16_t free_cnt;\n uint16_t in_widx;\n uint16_t in_ridx;\n uint16_t prev_in_widx;\n uint32_t free_len;\n uint32_t in_wpos;\n uint32_t in_rpos;\n uint32_t aligned_len;\n\n if (reset_frames) {\n return -1;\n }\n\n in_widx = cp_in_widx;\n in_ridx = cp_in_ridx;\n\n if (max_buffer_frames < get_in_cp_frame_cnt()) {\n return 1;\n }\n\n free_cnt = get_in_frame_free_cnt(in_widx, in_ridx);\n if (free_cnt == 0) {\n return 1;\n }\n\n if (in_widx == in_ridx) {\n in_wpos = 0;\n in_rpos = 0;\n } else {\n if (in_widx == 0) {\n prev_in_widx = CP_IN_FRAME_CNT - 1;\n } else {\n prev_in_widx = in_widx - 1;\n }\n in_wpos = in_frames[prev_in_widx].pos + in_frames[prev_in_widx].len;\n if (in_wpos >= CP_IN_CACHE_SIZE) {\n in_wpos -= CP_IN_CACHE_SIZE;\n }\n in_rpos = in_frames[in_ridx].pos;\n }\n\n // Align to word boundary\n in_wpos = (in_wpos + 3) & ~3;\n if (in_wpos >= CP_IN_CACHE_SIZE) {\n in_wpos -= CP_IN_CACHE_SIZE;\n }\n aligned_len = (len1 + len2 + 3) & ~3;\n\n if (in_wpos >= in_rpos) {\n free_len = CP_IN_CACHE_SIZE - in_wpos;\n if (in_rpos == 0) {\n free_len -= 1;\n }\n if (free_len < aligned_len) {\n free_len = (in_rpos > 0) ? (in_rpos - 1) : 0;\n if (free_len < aligned_len) {\n return 2;\n }\n in_wpos = 0;\n }\n } else {\n free_len = in_rpos - in_wpos - 1;\n if (free_len < aligned_len) {\n return 3;\n }\n }\n\n in_frames[in_widx].pos = in_wpos;\n in_frames[in_widx].len = len1 + len2;\n\n if (len1) {\n memcpy(&cp_in_cache[in_wpos], buf1, len1);\n in_wpos += len1;\n }\n if (len2) {\n memcpy(&cp_in_cache[in_wpos], buf2, len2);\n in_wpos += len2;\n }\n\n in_widx += 1;\n if (in_widx >= CP_IN_FRAME_CNT) {\n in_widx -= CP_IN_FRAME_CNT;\n }\n cp_in_widx = in_widx;\n\n return 0;\n}\n\nCP_TEXT_SRAM_LOC\nint a2dp_cp_get_in_frame(void **p_buf, uint32_t *p_len) {\n uint16_t in_widx;\n uint16_t in_ridx;\n uint32_t in_rpos;\n\n if (reset_frames) {\n return -1;\n }\n\n in_widx = cp_in_widx;\n in_ridx = cp_in_ridx;\n\n if (in_widx == in_ridx) {\n return 1;\n }\n\n in_rpos = in_frames[in_ridx].pos;\n\n if (p_buf) {\n *p_buf = &cp_in_cache[in_rpos];\n }\n if (p_len) {\n *p_len = in_frames[in_ridx].len;\n }\n\n return 0;\n}\n\nCP_TEXT_SRAM_LOC\nint a2dp_cp_consume_in_frame(void) {\n uint16_t in_widx;\n uint16_t in_ridx;\n\n if (reset_frames) {\n return 0;\n }\n\n in_widx = cp_in_widx;\n in_ridx = cp_in_ridx;\n\n if (in_widx == in_ridx) {\n return 1;\n }\n\n in_ridx += 1;\n if (in_ridx >= CP_IN_FRAME_CNT) {\n in_ridx -= CP_IN_FRAME_CNT;\n }\n cp_in_ridx = in_ridx;\n\n return 0;\n}\n\nCP_TEXT_SRAM_LOC\nuint32_t a2dp_cp_get_in_frame_index(void) { return cp_in_ridx; }\n\nSRAM_TEXT_LOC\nuint32_t a2dp_cp_get_in_frame_cnt_by_index(uint32_t ridx) {\n return get_in_frame_cnt(cp_in_widx, ridx);\n}\n\nSRAM_TEXT_LOC\nvoid a2dp_cp_reset_frame(void) {\n#ifdef A2DP_TRACE_CP_ACCEL\n TRACE_A2DP_DECODER_I(\"%s: Reset frames\", __func__);\n#endif\n\n reset_frames = true;\n\n // Notify CP to work again\n cp_accel_send_event_mcu2cp(1);\n}\n\nSRAM_TEXT_LOC\nbool a2dp_cp_get_frame_reset_status(void) { return reset_frames; }\n\nCP_TEXT_SRAM_LOC\nenum CP_EMPTY_OUT_FRM_T a2dp_cp_get_emtpy_out_frame(void **p_buf,\n uint32_t *p_len) {\n enum CP_EMPTY_OUT_FRM_T ret;\n uint8_t out_widx;\n uint32_t out_wpos;\n enum CP_DEC_STATE_T state;\n\n if (reset_frames) {\n return CP_EMPTY_OUT_FRM_ERR;\n }\n\n out_widx = cp_out_widx;\n state = out_frames[out_widx].state;\n\n if (state != CP_DEC_STATE_IDLE && state != CP_DEC_STATE_WORKING) {\n return CP_EMPTY_OUT_FRM_ERR;\n }\n\n if (state == CP_DEC_STATE_WORKING) {\n ret = CP_EMPTY_OUT_FRM_WORKING;\n } else {\n out_frames[out_widx].state = CP_DEC_STATE_WORKING;\n ret = CP_EMPTY_OUT_FRM_OK;\n }\n\n out_wpos = out_frames[out_widx].pos;\n\n if (p_buf) {\n *p_buf = &cp_out_cache[out_wpos];\n }\n if (p_len) {\n *p_len = out_frames[out_widx].len;\n }\n\n return ret;\n}\n\nCP_TEXT_SRAM_LOC\nint a2dp_cp_consume_emtpy_out_frame(void) {\n uint8_t out_widx;\n\n if (reset_frames) {\n return 0;\n }\n\n out_widx = cp_out_widx;\n\n if (out_frames[out_widx].state != CP_DEC_STATE_WORKING) {\n return 1;\n }\n\n out_frames[out_widx].state = CP_DEC_STATE_DONE;\n\n#ifdef A2DP_TRACE_CP_ACCEL\n TRACE_A2DP_DECODER_I(\"AD2P-CP out frame W[%d]\", out_widx);\n#endif\n\n out_widx += 1;\n if (out_widx >= CP_OUT_FRAME_CNT) {\n out_widx -= CP_OUT_FRAME_CNT;\n }\n cp_out_widx = out_widx;\n\n return 0;\n}\n\nSRAM_TEXT_LOC\nint a2dp_cp_get_full_out_frame(void **p_buf, uint32_t *p_len) {\n uint8_t out_ridx;\n uint32_t out_rpos;\n enum CP_DEC_STATE_T state;\n\n if (reset_frames) {\n return -1;\n }\n\n out_ridx = cp_out_ridx;\n state = out_frames[out_ridx].state;\n\n if (state != CP_DEC_STATE_DONE && state != CP_DEC_STATE_INIT_DONE) {\n // Notify CP to work again\n cp_accel_send_event_mcu2cp(\n CP_BUILD_ID(CP_TASK_A2DP_DECODE, CP_EVENT_A2DP_DECODE));\n if (state == CP_DEC_STATE_WORKING) {\n return CP_EMPTY_OUT_FRM_WORKING;\n } else {\n return (10 + state);\n }\n }\n\n out_rpos = out_frames[out_ridx].pos;\n\n if (state == CP_DEC_STATE_DONE) {\n if (p_buf) {\n *p_buf = &cp_out_cache[out_rpos];\n }\n if (p_len) {\n *p_len = out_frames[out_ridx].len;\n }\n } else {\n if (p_buf) {\n *p_buf = NULL;\n }\n if (p_len) {\n *p_len = 0;\n }\n }\n\n return 0;\n}\n\nSRAM_TEXT_LOC\nint a2dp_cp_consume_full_out_frame(void) {\n uint8_t out_ridx;\n enum CP_DEC_STATE_T state;\n\n if (reset_frames) {\n return 0;\n }\n\n out_ridx = cp_out_ridx;\n state = out_frames[out_ridx].state;\n\n if (state != CP_DEC_STATE_DONE && state != CP_DEC_STATE_INIT_DONE) {\n return 1;\n }\n\n#ifdef A2DP_TRACE_CP_ACCEL\n TRACE_A2DP_DECODER_I(\"AD2P-CP out frame R[%d]\", out_ridx);\n#endif\n\n out_frames[out_ridx].state = CP_DEC_STATE_IDLE;\n\n out_ridx += 1;\n if (out_ridx >= CP_OUT_FRAME_CNT) {\n out_ridx -= CP_OUT_FRAME_CNT;\n }\n cp_out_ridx = out_ridx;\n\n // Notify CP to work again\n cp_accel_send_event_mcu2cp(\n CP_BUILD_ID(CP_TASK_A2DP_DECODE, CP_EVENT_A2DP_DECODE));\n\n return 0;\n}\n\n#endif\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_cp.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_DECODER_CP_H__\n#define __A2DP_DECODER_CP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"stdbool.h\"\n#include \"plat_types.h\"\n\nenum CP_PROC_DELAY_T {\n CP_PROC_DELAY_0_FRAME = 0,\n CP_PROC_DELAY_1_FRAME,\n CP_PROC_DELAY_2_FRAMES,\n CP_PROC_DELAY_3_FRAMES,\n\n CP_PROC_DELAY_QTY,\n};\n\nenum CP_EMPTY_OUT_FRM_T {\n CP_EMPTY_OUT_FRM_OK,\n CP_EMPTY_OUT_FRM_WORKING,\n CP_EMPTY_OUT_FRM_ERR,\n};\n\ntypedef int (*A2DP_CP_DECODE_T)(void);\n\nint a2dp_cp_init(A2DP_CP_DECODE_T decode_func, enum CP_PROC_DELAY_T delay);\n\nint a2dp_cp_deinit(void);\n\nint a2dp_cp_decoder_init(uint32_t out_frame_len, uint8_t max_frames);\n\nint a2dp_cp_put_in_frame(const void *buf1, uint32_t len1, const void *buf2, uint32_t len2);\n\nint a2dp_cp_get_in_frame(void **p_buf, uint32_t *p_len);\n\nint a2dp_cp_consume_in_frame(void);\n\nuint32_t a2dp_cp_get_in_frame_index(void);\n\nuint32_t a2dp_cp_get_in_frame_cnt_by_index(uint32_t ridx);\n\nvoid a2dp_cp_reset_frame(void);\n\nbool a2dp_cp_get_in_frame_reset_status(void);\n\nenum CP_EMPTY_OUT_FRM_T a2dp_cp_get_emtpy_out_frame(void **p_buf, uint32_t *p_len);\n\nint a2dp_cp_consume_emtpy_out_frame(void);\n\nint a2dp_cp_get_full_out_frame(void **p_buf, uint32_t *p_len);\n\nint a2dp_cp_consume_full_out_frame(void);\n\nunsigned int set_cp_reset_flag(uint8_t evt);\n\nbool is_cp_need_reset(void);\n\nbool is_cp_init_done(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_example.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"a2dp_decoder_internal.h\"\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n#include \"heap_api.h\"\n#include \"plat_types.h\"\n#include \n\nstatic A2DP_AUDIO_CONTEXT_T *a2dp_audio_context_p = NULL;\nstatic A2DP_AUDIO_DECODER_LASTFRAME_INFO_T a2dp_audio_ldac_example_info;\nstatic A2DP_AUDIO_OUTPUT_CONFIG_T a2dp_audio_example_output_config;\n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint8_t *buffer;\n uint32_t buffer_len;\n} a2dp_audio_example_decoder_frame_t;\n\nint a2dp_audio_example_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_example_preparse_packet(btif_media_header_t *header,\n uint8_t *buffer, uint32_t buffer_bytes) {\n return A2DP_DECODER_NO_ERROR;\n}\n\nstatic void *a2dp_audio_example_frame_malloc(uint32_t packet_len) {\n a2dp_audio_example_decoder_frame_t *decoder_frame_p = NULL;\n uint8_t *buffer = NULL;\n\n buffer = (uint8_t *)a2dp_audio_heap_malloc(packet_len);\n decoder_frame_p =\n (a2dp_audio_example_decoder_frame_t *)a2dp_audio_heap_malloc(\n sizeof(a2dp_audio_example_decoder_frame_t));\n decoder_frame_p->buffer = buffer;\n decoder_frame_p->buffer_len = packet_len;\n return (void *)decoder_frame_p;\n}\n\nvoid a2dp_audio_example_free(void *packet) {\n a2dp_audio_example_decoder_frame_t *decoder_frame_p =\n (a2dp_audio_example_decoder_frame_t *)packet;\n a2dp_audio_heap_free(decoder_frame_p->buffer);\n a2dp_audio_heap_free(decoder_frame_p);\n}\n\nint a2dp_audio_example_store_packet(btif_media_header_t *header,\n uint8_t *buffer, uint32_t buffer_bytes) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_example_decoder_frame_t *decoder_frame_p =\n (a2dp_audio_example_decoder_frame_t *)a2dp_audio_example_frame_malloc(\n buffer_bytes);\n\n decoder_frame_p->sequenceNumber = header->sequenceNumber;\n decoder_frame_p->timestamp = header->timestamp;\n memcpy(decoder_frame_p->buffer, buffer, buffer_bytes);\n decoder_frame_p->buffer_len = buffer_bytes;\n a2dp_audio_list_append(list, decoder_frame_p);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_example_discards_packet(uint32_t packets) {\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_example_headframe_info_get(\n A2DP_AUDIO_HEADFRAME_INFO_T *headframe_info) {\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_example_info_get(void *info) { return A2DP_DECODER_NO_ERROR; }\n\nint a2dp_audio_example_init(A2DP_AUDIO_OUTPUT_CONFIG_T *config, void *context) {\n TRACE_A2DP_DECODER_D(\"%s\", __func__);\n a2dp_audio_context_p = (A2DP_AUDIO_CONTEXT_T *)context;\n\n memset(&a2dp_audio_ldac_example_info, 0,\n sizeof(A2DP_AUDIO_DECODER_LASTFRAME_INFO_T));\n memcpy(&a2dp_audio_example_output_config, config,\n sizeof(A2DP_AUDIO_OUTPUT_CONFIG_T));\n a2dp_audio_ldac_example_info.stream_info = &a2dp_audio_example_output_config;\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_example_deinit(void) { return A2DP_DECODER_NO_ERROR; }\n\nint a2dp_audio_example_synchronize_packet(\n A2DP_AUDIO_SYNCFRAME_INFO_T *sync_info, uint32_t mask) {\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_example_synchronize_dest_packet_mut(uint16_t packet_mut) {\n return A2DP_DECODER_NO_ERROR;\n}\n\nA2DP_AUDIO_DECODER_T a2dp_audio_example_decoder_config = {\n {44100, 2, 16},\n 0,\n a2dp_audio_example_init,\n a2dp_audio_example_deinit,\n a2dp_audio_example_decode_frame,\n a2dp_audio_example_preparse_packet,\n a2dp_audio_example_store_packet,\n a2dp_audio_example_discards_packet,\n a2dp_audio_example_synchronize_packet,\n a2dp_audio_example_synchronize_dest_packet_mut,\n a2dp_audio_example_headframe_info_get,\n a2dp_audio_example_info_get,\n a2dp_audio_example_free,\n};\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_internal.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_DECODER_INTERNAL_H__\n#define __A2DP_DECODER_INTERNAL_H__\n\n#include \"list.h\"\n#include \"a2dp_decoder.h\"\n#ifdef A2DP_CP_ACCEL\n#include \"a2dp_decoder_cp.h\"\n#include \"hal_location.h\"\n#endif\n#include \"a2dp_decoder_trace.h\"\n\n#define TEXT_A2DP_LOC_A(n, l) __attribute__((section(#n \".\" #l)))\n#define TEXT_A2DP_LOC(n, l) TEXT_A2DP_LOC_A(n, l)\n\n#define TEXT_SBC_LOC TEXT_A2DP_LOC(.overlay_a2dp_sbc, __LINE__)\n#define TEXT_AAC_LOC TEXT_A2DP_LOC(.overlay_a2dp_aac, __LINE__)\n#define TEXT_SSC_LOC TEXT_A2DP_LOC(.overlay_a2dp_ssc, __LINE__)\n#define TEXT_LDAC_LOC TEXT_A2DP_LOC(.overlay_a2dp_ldac, __LINE__)\n#define TEXT_LHDC_LOC TEXT_A2DP_LOC(.overlay_a2dp_lhdc, __LINE__)\n\n#define A2DP_DECODER_NO_ERROR (0)\n#define A2DP_DECODER_DECODE_ERROR (-1)\n#define A2DP_DECODER_BUSY_ERROR (-2)\n#define A2DP_DECODER_MEMORY_ERROR (-3)\n#define A2DP_DECODER_MTU_LIMTER_ERROR (-4)\n#define A2DP_DECODER_CACHE_UNDERFLOW_ERROR (-5)\n#define A2DP_DECODER_SYNC_ERROR (-6)\n#define A2DP_DECODER_NOT_SUPPORT (-128)\n\n#ifdef MIN\n#undef MIN\n#endif\n#define MIN(a,b) ((a)<(b) ? (a):(b))\n#ifdef MAX\n#undef MAX\n#endif\n#define MAX(a,b) ((a)>(b) ? (a):(b))\n\ntypedef A2DP_AUDIO_OUTPUT_CONFIG_T AUDIO_DECODER_STREAM_INFO_T;\n\ntypedef int (*AUDIO_DECODER_INIT)(A2DP_AUDIO_OUTPUT_CONFIG_T *, void *);\ntypedef int (*AUDIO_DECODER_DEINIT)(void);\ntypedef int (*AUDIO_DECODER_DECODE_FRAME)(uint8_t *, uint32_t);\ntypedef int (*AUDIO_DECODER_PREPARSE_PACKET)(btif_media_header_t *, uint8_t *, uint32_t);\ntypedef int (*AUDIO_DECODER_STORE_PACKET)(btif_media_header_t *, uint8_t *, uint32_t);\ntypedef int (*AUDIO_DECODER_DISCARDS_PACKET)(uint32_t);\ntypedef int (*AUDIO_DECODER_SYNCHRONIZE_PACKET)(A2DP_AUDIO_SYNCFRAME_INFO_T *, uint32_t);\ntypedef int (*AUDIO_DECODER_SYNCHRONIZE_DEST_PACKET_MUT)(uint16_t);\ntypedef int (*AUDIO_DECODER_HEADFRAME_INFO_GET)(A2DP_AUDIO_HEADFRAME_INFO_T*);\ntypedef int (*AUDIO_DECODER_INFO_GET)(void *);\ntypedef void(*AUDIO_DECODER_PACKET_FREE)(void *);\ntypedef int (*AUDIO_DECODER_SYNCHRONIZE_CONVERT_LIST_TO_SAMPLES)(uint32_t *);\ntypedef int (*AUDIO_DECODER_SYNCHRONIZE_DISCARDS_SAMPLES)(uint32_t);\ntypedef int (*AUDIO_DECODER_CHANNEL_SELECT)(A2DP_AUDIO_CHANNEL_SELECT_E);\n\ntypedef struct {\n AUDIO_DECODER_STREAM_INFO_T stream_info;\n uint32_t auto_synchronize_support;\n AUDIO_DECODER_INIT audio_decoder_init;\n AUDIO_DECODER_DEINIT audio_decoder_deinit;\n AUDIO_DECODER_DECODE_FRAME audio_decoder_decode_frame;\n AUDIO_DECODER_PREPARSE_PACKET audio_decoder_preparse_packet;\n AUDIO_DECODER_STORE_PACKET audio_decoder_store_packet;\n AUDIO_DECODER_DISCARDS_PACKET audio_decoder_discards_packet;\n AUDIO_DECODER_SYNCHRONIZE_PACKET audio_decoder_synchronize_packet;\n AUDIO_DECODER_SYNCHRONIZE_DEST_PACKET_MUT audio_decoder_synchronize_dest_packet_mut;\n AUDIO_DECODER_SYNCHRONIZE_CONVERT_LIST_TO_SAMPLES a2dp_audio_convert_list_to_samples;\n AUDIO_DECODER_SYNCHRONIZE_DISCARDS_SAMPLES a2dp_audio_discards_samples;\n AUDIO_DECODER_HEADFRAME_INFO_GET audio_decoder_headframe_info_get;\n AUDIO_DECODER_INFO_GET audio_decoder_info_get;\n AUDIO_DECODER_PACKET_FREE audio_decoder_packet_free;\n AUDIO_DECODER_CHANNEL_SELECT audio_decoder_channel_select;\n} A2DP_AUDIO_DECODER_T;\n\ntypedef struct { \n list_t *input_raw_packet_list;\n list_t *output_pcm_packet_list;\n} A2DP_AUDIO_DATAPATH_T;\n\ntypedef struct { \n bool enalbe;\n void *semaphore;\n} AUDIO_BUFFER_SEMAPHORE_T;\n\nenum A2DP_AUDIO_DECODER_STATUS {\n A2DP_AUDIO_DECODER_STATUS_NULL,\n A2DP_AUDIO_DECODER_STATUS_READY,\n A2DP_AUDIO_DECODER_STATUS_START,\n A2DP_AUDIO_DECODER_STATUS_STOP\n};\n\nenum A2DP_AUDIO_DECODER_STORE_PACKET_STATUS {\n A2DP_AUDIO_DECODER_STORE_PACKET_STATUS_IDLE,\n A2DP_AUDIO_DECODER_STORE_PACKET_STATUS_BUSY,\n};\n\nenum A2DP_AUDIO_DECODER_PLAYBACK_STATUS {\n A2DP_AUDIO_DECODER_PLAYBACK_STATUS_IDLE,\n A2DP_AUDIO_DECODER_PLAYBACK_STATUS_BUSY,\n};\n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n uint32_t frame_samples;\n uint32_t list_samples;\n uint32_t decoded_frames;\n uint32_t undecode_frames;\n uint32_t check_sum;\n A2DP_AUDIO_OUTPUT_CONFIG_T stream_info;\n} A2DP_AUDIO_DECODER_LASTFRAME_INFO_T;\n\ntypedef struct {\n A2DP_AUDIO_SYNC_PID_T pid;\n uint32_t tick;\n uint32_t cnt;\n} A2DP_AUDIO_SYNC_T;\n\ntypedef struct { \n A2DP_AUDIO_OUTPUT_CONFIG_T output_cfg;\n float init_factor_reference;\n A2DP_AUDIO_CHANNEL_SELECT_E chnl_sel;\n uint16_t dest_packet_mut;\n float average_packet_mut;\n A2DP_AUDIO_DECODER_T audio_decoder;\n A2DP_AUDIO_DATAPATH_T audio_datapath;\n list_t *input_raw_packet_list;\n list_t *output_pcm_packet_list;\n bool need_detect_first_packet;\n bool underflow_onporcess;\n uint32_t skip_frame_cnt_after_no_cache;\n uint32_t mute_frame_cnt_after_no_cache;\n AUDIO_BUFFER_SEMAPHORE_T audio_semaphore;\n void *audio_buffer_mutex;\n void *audio_status_mutex;\n void *audio_stop_mutex;\n enum A2DP_AUDIO_DECODER_STATUS audio_decoder_status;\n enum A2DP_AUDIO_DECODER_STORE_PACKET_STATUS store_packet_status;\n enum A2DP_AUDIO_DECODER_PLAYBACK_STATUS playback_status;\n A2DP_AUDIO_SYNC_T audio_sync;\n#if A2DP_DECODER_HISTORY_SEQ_SAVE\n uint16_t historySeq[A2DP_DECODER_HISTORY_SEQ_SAVE];\n#ifdef A2DP_DECODER_HISTORY_LOCTIME_SAVE\n uint32_t historyLoctime[A2DP_DECODER_HISTORY_SEQ_SAVE];\n#endif\n#ifdef A2DP_DECODER_HISTORY_CHECK_SUM_SAVE\n uint32_t historyChecksum[A2DP_DECODER_HISTORY_SEQ_SAVE];\n#endif\n uint8_t historySeq_idx;\n#endif\n} A2DP_AUDIO_CONTEXT_T;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid *a2dp_audio_heap_malloc(uint32_t size);\nvoid *a2dp_audio_heap_cmalloc(uint32_t size);\nvoid *a2dp_audio_heap_realloc(void *rmem, uint32_t newsize);\nvoid a2dp_audio_heap_free(void *rmem);\n\nlist_node_t *a2dp_audio_list_begin(const list_t *list);\nlist_node_t *a2dp_audio_list_end(const list_t *list);\nuint32_t a2dp_audio_list_length(const list_t *list);\nvoid *a2dp_audio_list_node(const list_node_t *node);\nlist_node_t *a2dp_audio_list_next(const list_node_t *node);\nbool a2dp_audio_list_remove(list_t *list, void *data);\nbool a2dp_audio_list_append(list_t *list, void *data);\nvoid a2dp_audio_list_clear(list_t *list);\nvoid a2dp_audio_list_free(list_t *list);\nlist_t *a2dp_audio_list_new(list_free_cb callback, list_mempool_zmalloc zmalloc, list_mempool_free free);\n\nint a2dp_audio_semaphore_wait(uint32_t timeout_ms);\nint a2dp_audio_semaphore_release(void);\nint a2dp_audio_decoder_internal_lastframe_info_set(A2DP_AUDIO_DECODER_LASTFRAME_INFO_T *lastframe_info);\nuint32_t a2dp_audio_get_passed(uint32_t curr_ticks, uint32_t prev_ticks, uint32_t max_ticks);\nuint32_t a2dp_audio_decoder_internal_check_sum_generate(const uint8_t *buf, uint32_t len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif//__A2DPPLAY_H__\n\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_ldac.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"a2dp_decoder_internal.h\"\n#include \"btapp.h\"\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n#include \"heap_api.h\"\n#include \"ldacBT.h\"\n#include \"plat_types.h\"\n#include \n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint32_t frame_samples;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n uint8_t *buffer;\n uint32_t buffer_len;\n} a2dp_audio_ldac_decoder_frame_t;\n\n#ifndef LDAC_MTU_LIMITER\n#define LDAC_MTU_LIMITER (200)\n#endif\n#define DECODE_LDAC_PCM_FRAME_LENGTH (256 * 4 * 2 * 2)\n\n#define LDAC_LIST_SAMPLES (256)\n\nstatic A2DP_AUDIO_CONTEXT_T *a2dp_audio_context_p = NULL;\nstatic A2DP_AUDIO_DECODER_LASTFRAME_INFO_T a2dp_audio_ldac_lastframe_info;\n\nstatic uint16_t ldac_mtu_limiter = LDAC_MTU_LIMITER;\n// static btif_media_header_t ldac_header_parser_header_prev = {0,};\n// static bool ldac_header_parser_ready = false;\n// static bool ldac_chnl_mode_mono = false;\n\nHANDLE_LDAC_BT LdacDecHandle = NULL;\n// static uint8_t *ldac_mempoll = NULL;\nheap_handle_t ldac_memhandle = NULL;\n\nstatic uint32_t l2cap_frame_samples = LDAC_LIST_SAMPLES;\n\n/* Convert LDAC Error Code to string */\n#define CASE_RETURN_STR(const) \\\n case const: \\\n return #const;\nstatic const char *ldac_ErrCode2Str(int ErrCode) {\n switch (ErrCode) {\n CASE_RETURN_STR(LDACBT_ERR_NONE);\n CASE_RETURN_STR(LDACBT_ERR_NON_FATAL);\n CASE_RETURN_STR(LDACBT_ERR_BIT_ALLOCATION);\n CASE_RETURN_STR(LDACBT_ERR_NOT_IMPLEMENTED);\n CASE_RETURN_STR(LDACBT_ERR_NON_FATAL_ENCODE);\n CASE_RETURN_STR(LDACBT_ERR_FATAL);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_BAND);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_A);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_B);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_C);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_D);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_E);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_IDSF);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_SPEC);\n CASE_RETURN_STR(LDACBT_ERR_BIT_PACKING);\n CASE_RETURN_STR(LDACBT_ERR_ALLOC_MEMORY);\n CASE_RETURN_STR(LDACBT_ERR_FATAL_HANDLE);\n CASE_RETURN_STR(LDACBT_ERR_ILL_SYNCWORD);\n CASE_RETURN_STR(LDACBT_ERR_ILL_SMPL_FORMAT);\n CASE_RETURN_STR(LDACBT_ERR_ILL_PARAM);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_SAMPLING_FREQ);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_SUP_SAMPLING_FREQ);\n CASE_RETURN_STR(LDACBT_ERR_CHECK_SAMPLING_FREQ);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_CHANNEL_CONFIG);\n CASE_RETURN_STR(LDACBT_ERR_CHECK_CHANNEL_CONFIG);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_FRAME_LENGTH);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_SUP_FRAME_LENGTH);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_FRAME_STATUS);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_NSHIFT);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_CHANNEL_MODE);\n CASE_RETURN_STR(LDACBT_ERR_ENC_INIT_ALLOC);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADMODE);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADPAR_A);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADPAR_B);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADPAR_C);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADPAR_D);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_NBANDS);\n CASE_RETURN_STR(LDACBT_ERR_PACK_BLOCK_FAILED);\n CASE_RETURN_STR(LDACBT_ERR_DEC_INIT_ALLOC);\n CASE_RETURN_STR(LDACBT_ERR_INPUT_BUFFER_SIZE);\n CASE_RETURN_STR(LDACBT_ERR_UNPACK_BLOCK_FAILED);\n CASE_RETURN_STR(LDACBT_ERR_UNPACK_BLOCK_ALIGN);\n CASE_RETURN_STR(LDACBT_ERR_UNPACK_FRAME_ALIGN);\n CASE_RETURN_STR(LDACBT_ERR_FRAME_LENGTH_OVER);\n CASE_RETURN_STR(LDACBT_ERR_FRAME_ALIGN_OVER);\n CASE_RETURN_STR(LDACBT_ERR_ALTER_EQMID_LIMITED);\n CASE_RETURN_STR(LDACBT_ERR_ILL_EQMID);\n CASE_RETURN_STR(LDACBT_ERR_ILL_SAMPLING_FREQ);\n CASE_RETURN_STR(LDACBT_ERR_ILL_NUM_CHANNEL);\n CASE_RETURN_STR(LDACBT_ERR_ILL_MTU_SIZE);\n CASE_RETURN_STR(LDACBT_ERR_HANDLE_NOT_INIT);\n default:\n return \"unknown-error-code\";\n }\n}\n\nchar a_ErrorCodeStr[128];\nconst char *get_error_code_string(int error_code) {\n int errApi, errHdl, errBlk;\n\n errApi = LDACBT_API_ERR(error_code);\n errHdl = LDACBT_HANDLE_ERR(error_code);\n errBlk = LDACBT_BLOCK_ERR(error_code);\n\n a_ErrorCodeStr[0] = '\\0';\n strcat(a_ErrorCodeStr, \"API:\");\n strcat(a_ErrorCodeStr, ldac_ErrCode2Str(errApi));\n strcat(a_ErrorCodeStr, \" Handle:\");\n strcat(a_ErrorCodeStr, ldac_ErrCode2Str(errHdl));\n strcat(a_ErrorCodeStr, \" Block:\");\n strcat(a_ErrorCodeStr, ldac_ErrCode2Str(errBlk));\n return a_ErrorCodeStr;\n}\n\n#define LDAC_FRAME_LEN_INDEX_106 106\n#define LDAC_FRAME_LEN_INDEX_128 128\n#define LDAC_FRAME_LEN_INDEX_160 160\n#define LDAC_FRAME_LEN_INDEX_216 216\n#define LDAC_FRAME_LEN_INDEX_326 326\n#define LDAC_FRAME_LEN_INDEX_161 161\n\nstatic uint8_t get_ldac_frame_num_by_rawdata(uint8_t *buffer,\n uint32_t buffer_bytes) {\n uint32_t frame_len = 0;\n uint32_t frame_len_with_head = 0;\n uint16_t data1 = 0;\n uint16_t data2 = 0;\n uint8_t frame_cnt = 0;\n for (uint32_t i = 0; i < buffer_bytes;\n i += frame_len_with_head, frame_cnt++) {\n // TRACE(4,\"buffer:%x %x %x %x\n // \",buffer[i],buffer[i+1],buffer[i+2],buffer[i+3]);\n data1 = (uint16_t)(buffer[i + 1] & 0x07);\n data2 = (uint16_t)buffer[i + 2];\n frame_len = ((data1 << 6 & 0xFFFF) | (data2 >> 2 & 0xFFFF));\n // TRACE(\"#frame len:%d\",frame_len);\n // for ldac head\n frame_len_with_head = frame_len + 4;\n }\n return frame_cnt;\n}\n\n#define LDAC_READBUF_SIZE \\\n 1024 /* pick something big enough to hold a bunch of frames */\n\n/**\n * Decode LDAC data...\n */\n//#include \"os_tcb.h\"\nextern const char *get_error_code_string(int error_code);\n\n#define DCODE_LDAC_PCM_FRAME_LENGTH 10224 * 2\n\nint check_ldac_header(uint8_t *buffer, uint32_t buff_len) {\n int channel_mode = 0;\n int sample_rate = 0;\n int ret = 0;\n if (buff_len < 2)\n ret = -1;\n sample_rate = bt_get_ladc_sample_rate();\n channel_mode = bt_ldac_player_get_channelmode();\n // TRACE(3,\"%s,%d,%d\",__func__,sample_rate,channel_mode);\n\n uint32_t i = 0;\n unsigned char sync2 = 0;\n unsigned char cci = 0;\n\n switch (channel_mode) {\n case LDACBT_CHANNEL_MODE_MONO:\n cci = LDAC_CCI_MONO;\n break;\n case LDACBT_CHANNEL_MODE_DUAL_CHANNEL:\n cci = LDAC_CCI_DUAL_CHANNEL;\n break;\n case LDACBT_CHANNEL_MODE_STEREO:\n default:\n cci = LDAC_CCI_STEREO;\n break;\n }\n\n if (sample_rate == 1 * 44100) {\n sync2 = (0 << 5) | (cci << 3);\n } else if (sample_rate == 1 * 48000) {\n sync2 = (1 << 5) | (cci << 3);\n } else if (sample_rate == 2 * 44100) {\n sync2 = (2 << 5) | (cci << 3);\n } else if (sample_rate == 2 * 48000) {\n sync2 = (3 << 5) | (cci << 3);\n } else {\n TRACE(0, \"sample rate not surpoort !\");\n ret = -2;\n return ret;\n }\n\n for (i = 0; i < buff_len; i++) {\n if (buffer[i] == 0xAA) {\n if ((buffer[i + 1] & 0xF8) == sync2) {\n // TRACE(0,\"find ldac header \");\n break;\n }\n }\n }\n if (i >= buff_len) {\n TRACE(0, \"no find ldac header \");\n ret = -3;\n }\n\n return ret;\n}\n\n#ifdef A2DP_CP_ACCEL\nstruct A2DP_CP_LDAC_IN_FRM_INFO_T {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n};\n\nstruct A2DP_CP_LDAC_OUT_FRM_INFO_T {\n struct A2DP_CP_LDAC_IN_FRM_INFO_T in_info;\n uint16_t frame_samples;\n uint16_t decoded_frames;\n uint16_t frame_idx;\n uint16_t pcm_len;\n};\n\nextern \"C\" uint32_t get_in_cp_frame_cnt(void);\nextern \"C\" unsigned int set_cp_reset_flag(uint8_t evt);\nextern uint32_t app_bt_stream_get_dma_buffer_samples(void);\n\nint a2dp_cp_ldac_cp_decode(void);\n\nTEXT_LDAC_LOC\nstatic int a2dp_cp_ldac_after_cache_underflow(void) {\n TRACE(1, \"%s\", __func__);\n int ret = 0;\n a2dp_cp_deinit();\n ret = a2dp_cp_init(a2dp_cp_ldac_cp_decode, CP_PROC_DELAY_2_FRAMES);\n ASSERT(ret == 0, \"%s: a2dp_cp_init() failed: ret=%d\", __func__, ret);\n\n return ret;\n}\n\nstatic int a2dp_cp_ldac_mcu_decode(uint8_t *buffer, uint32_t buffer_bytes) {\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame_p = NULL;\n list_node_t *node = NULL;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int ret, dec_ret;\n struct A2DP_CP_LDAC_IN_FRM_INFO_T in_info;\n struct A2DP_CP_LDAC_OUT_FRM_INFO_T *p_out_info;\n\n uint8_t *out;\n uint32_t out_len;\n uint32_t out_frame_len;\n // uint8_t count=0;\n\n uint32_t cp_buffer_frames_max = 0;\n\n if ((buffer_bytes < DECODE_LDAC_PCM_FRAME_LENGTH &&\n (LDACBT_CHANNEL_MODE_MONO != bt_ldac_player_get_channelmode())) ||\n (buffer_bytes < DECODE_LDAC_PCM_FRAME_LENGTH / 2 &&\n (LDACBT_CHANNEL_MODE_MONO == bt_ldac_player_get_channelmode()))) {\n TRACE(1, \"ldac_decode pcm_len = %d \\n\", buffer_bytes);\n return A2DP_DECODER_NO_ERROR;\n }\n\n if (!LdacDecHandle) {\n TRACE(0, \"ldac decode not ready\");\n return A2DP_DECODER_NO_ERROR;\n }\n\n cp_buffer_frames_max = app_bt_stream_get_dma_buffer_samples() / 2;\n\n if (cp_buffer_frames_max % (a2dp_audio_ldac_lastframe_info.frame_samples)) {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (a2dp_audio_ldac_lastframe_info.frame_samples) +\n 1;\n } else {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (a2dp_audio_ldac_lastframe_info.frame_samples);\n }\n\n out_frame_len = sizeof(*p_out_info) + buffer_bytes;\n\n ret = a2dp_cp_decoder_init(out_frame_len, cp_buffer_frames_max * 8);\n\n if (ret) {\n TRACE(2, \"%s: a2dp_cp_decoder_init() failed: ret=%d\", __func__, ret);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n\n while ((node = a2dp_audio_list_begin(list)) != NULL) {\n ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n\n in_info.sequenceNumber = ldac_decoder_frame_p->sequenceNumber;\n in_info.timestamp = ldac_decoder_frame_p->timestamp;\n in_info.curSubSequenceNumber = ldac_decoder_frame_p->curSubSequenceNumber;\n in_info.totalSubSequenceNumber =\n ldac_decoder_frame_p->totalSubSequenceNumber;\n ret = a2dp_cp_put_in_frame(&in_info, sizeof(in_info),\n ldac_decoder_frame_p->buffer,\n ldac_decoder_frame_p->buffer_len);\n\n if (ret) {\n // TRACE(2,\"%s piff !!!!!!ret: %d \",__func__, ret);\n break;\n }\n // count++;\n // TRACE(2,\"%s count !!!!!!: %d \",__func__,count);\n // TRACE(3,\"put seq:%d %d\n // %d\",in_info.sequenceNumber,in_info.curSubSequenceNumber,in_info.totalSubSequenceNumber);\n a2dp_audio_list_remove(list, ldac_decoder_frame_p);\n }\n\n ret = a2dp_cp_get_full_out_frame((void **)&out, &out_len);\n\n if (ret) {\n TRACE(0, \"%s %d cp find cache underflow\", __func__, __LINE__);\n TRACE(2, \"aud_list_len:%d. cp_get_in_frame:%d\",\n a2dp_audio_list_length(list), get_in_cp_frame_cnt());\n a2dp_cp_ldac_after_cache_underflow();\n return A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n\n if (out_len == 0) {\n memset(buffer, 0, buffer_bytes);\n a2dp_cp_consume_full_out_frame();\n TRACE(1, \"%s olz!!!\", __func__);\n return A2DP_DECODER_NO_ERROR;\n }\n if (out_len != out_frame_len) {\n TRACE(3, \"%s: Bad out len %u (should be %u)\", __func__, out_len,\n out_frame_len);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n p_out_info = (struct A2DP_CP_LDAC_OUT_FRM_INFO_T *)out;\n if (p_out_info->pcm_len) {\n a2dp_audio_ldac_lastframe_info.sequenceNumber =\n p_out_info->in_info.sequenceNumber;\n a2dp_audio_ldac_lastframe_info.timestamp = p_out_info->in_info.timestamp;\n a2dp_audio_ldac_lastframe_info.curSubSequenceNumber =\n p_out_info->in_info.curSubSequenceNumber;\n a2dp_audio_ldac_lastframe_info.totalSubSequenceNumber =\n p_out_info->in_info.totalSubSequenceNumber;\n a2dp_audio_ldac_lastframe_info.frame_samples = p_out_info->frame_samples;\n a2dp_audio_ldac_lastframe_info.decoded_frames += p_out_info->decoded_frames;\n a2dp_audio_ldac_lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) +\n a2dp_cp_get_in_frame_cnt_by_index(p_out_info->frame_idx) - 1;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_ldac_lastframe_info);\n }\n\n if (p_out_info->pcm_len == buffer_bytes) {\n memcpy(buffer, p_out_info + 1, p_out_info->pcm_len);\n dec_ret = A2DP_DECODER_NO_ERROR;\n } else {\n TRACE(2, \"%s %d cp decoder error !!!!!!\", __func__, __LINE__);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n\n ret = a2dp_cp_consume_full_out_frame();\n if (ret) {\n\n TRACE(2, \"%s: a2dp_cp_consume_full_out_frame() failed: ret=%d\", __func__,\n ret);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n return dec_ret;\n}\n\nTEXT_LDAC_LOC\nint a2dp_cp_ldac_cp_decode(void) {\n int ret;\n enum CP_EMPTY_OUT_FRM_T out_frm_st;\n uint8_t *out;\n uint32_t out_len;\n uint8_t *dec_start;\n uint32_t dec_len;\n struct A2DP_CP_LDAC_IN_FRM_INFO_T *p_in_info;\n struct A2DP_CP_LDAC_OUT_FRM_INFO_T *p_out_info;\n uint8_t *in_buf;\n uint32_t in_len;\n\n int32_t dec_sum;\n\n int used_bytes = 0;\n int wrote_bytes = 0;\n\n out_frm_st = a2dp_cp_get_emtpy_out_frame((void **)&out, &out_len);\n\n if (out_frm_st != CP_EMPTY_OUT_FRM_OK &&\n out_frm_st != CP_EMPTY_OUT_FRM_WORKING) {\n return out_frm_st;\n }\n\n ASSERT(out_len > sizeof(*p_out_info), \"%s: Bad out_len %u (should > %u)\",\n __func__, out_len, sizeof(*p_out_info));\n\n p_out_info = (struct A2DP_CP_LDAC_OUT_FRM_INFO_T *)out;\n if (out_frm_st == CP_EMPTY_OUT_FRM_OK) {\n p_out_info->pcm_len = 0;\n p_out_info->decoded_frames = 0;\n }\n\n ASSERT(out_len > sizeof(*p_out_info) + p_out_info->pcm_len,\n \"%s: Bad out_len %u (should > %u + %u)\", __func__, out_len,\n sizeof(*p_out_info), p_out_info->pcm_len);\n\n dec_start = (uint8_t *)(p_out_info + 1) + p_out_info->pcm_len;\n dec_len = out_len - (dec_start - (uint8_t *)out);\n\n dec_sum = 0;\n\n while (dec_sum < (int32_t)dec_len) {\n ret = a2dp_cp_get_in_frame((void **)&in_buf, &in_len);\n\n if (ret) {\n TRACE(1, \"cp_get_int_frame fail, ret=%d\", ret);\n return 4;\n }\n\n ASSERT(in_len > sizeof(*p_in_info), \"%s: Bad in_len %u (should > %u)\",\n __func__, in_len, sizeof(*p_in_info));\n\n p_in_info = (struct A2DP_CP_LDAC_IN_FRM_INFO_T *)in_buf;\n in_buf += sizeof(*p_in_info);\n in_len -= sizeof(*p_in_info);\n // TRACE(2,\"decode:seq %d %d %d\", p_in_info->sequenceNumber,\n // p_in_info->curSubSequenceNumber,p_in_info->totalSubSequenceNumber);\n\n if (in_buf[0] != 0xaa) {\n TRACE(2, \"decode:seq %d %d\", p_in_info->sequenceNumber,\n p_in_info->curSubSequenceNumber);\n DUMP8(\"%x \", in_buf, 30);\n }\n\n ret = ldacBT_decode(LdacDecHandle, in_buf, dec_start + dec_sum,\n LDACBT_SMPL_FMT_S16, in_len, &used_bytes, &wrote_bytes);\n // TRACE(\"%s wb:%d bb:%d pb:%d\",__func__,wrote_bytes,dec_len,dec_sum);\n dec_sum += wrote_bytes;\n if (ret != 0) {\n TRACE(1, \"ldac decode error %d\", ret);\n TRACE(1, \"LdacDecHandle error_code:%d\",\n ldacBT_get_error_code(LdacDecHandle));\n ret = A2DP_DECODER_DECODE_ERROR;\n return -1;\n }\n\n ret = a2dp_cp_consume_in_frame();\n\n if (ret != 0) {\n TRACE(2, \"%s: a2dp_cp_consume_in_frame() failed: ret=%d\", __func__, ret);\n }\n ASSERT(ret == 0, \"%s: a2dp_cp_consume_in_frame() failed: ret=%d\", __func__,\n ret);\n\n memcpy(&p_out_info->in_info, p_in_info, sizeof(*p_in_info));\n p_out_info->decoded_frames++;\n p_out_info->frame_samples = 256;\n p_out_info->frame_idx = a2dp_cp_get_in_frame_index();\n }\n\n if (dec_sum != (int32_t)dec_len) {\n TRACE(2, \"error!!! dec_sum:%d != dec_len:%d\", dec_sum, dec_len);\n ASSERT(0, \"%s\", __func__);\n }\n\n p_out_info->pcm_len += dec_sum;\n\n if (out_len <= sizeof(*p_out_info) + p_out_info->pcm_len) {\n ret = a2dp_cp_consume_emtpy_out_frame();\n ASSERT(ret == 0, \"%s: a2dp_cp_consume_emtpy_out_frame() failed: ret=%d\",\n __func__, ret);\n }\n\n return 0;\n}\n\n#endif\n\nint a2dp_audio_ldac_mcu_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n\n list_node_t *node = NULL;\n uint8_t *temp_buf_ptr1 = NULL;\n uint8_t *temp_buf_ptr2 = NULL;\n uint16_t pcm_output_bytes;\n uint32_t lock;\n\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame_p = NULL;\n int used_bytes = 0;\n int wrote_bytes = 0;\n bool cache_underflow = false;\n int output_count = 0;\n int result = 0;\n\n if ((buffer_bytes < DECODE_LDAC_PCM_FRAME_LENGTH &&\n (LDACBT_CHANNEL_MODE_MONO != bt_ldac_player_get_channelmode())) ||\n (buffer_bytes < DECODE_LDAC_PCM_FRAME_LENGTH / 2 &&\n (LDACBT_CHANNEL_MODE_MONO == bt_ldac_player_get_channelmode()))) {\n TRACE(1, \"ldac_decode pcm_len = %d \\n\", buffer_bytes);\n return A2DP_DECODER_NO_ERROR;\n }\n\n if (!LdacDecHandle) {\n TRACE(0, \"ldac decode not ready\");\n return A2DP_DECODER_NO_ERROR;\n }\n\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n\n // TRACE(\"jtx~~\");\n\n for (pcm_output_bytes = 0; pcm_output_bytes < buffer_bytes;\n pcm_output_bytes += wrote_bytes) {\n node = a2dp_audio_list_begin(list);\n if (!node) {\n TRACE(0, \"ldac decode cache underflow !\");\n cache_underflow = true;\n goto exit;\n } else {\n ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n temp_buf_ptr1 = ldac_decoder_frame_p->buffer;\n temp_buf_ptr2 = buffer + wrote_bytes * output_count;\n\n if (temp_buf_ptr1[0] != 0xaa) {\n TRACE(2, \"decode:seq %d %d\", ldac_decoder_frame_p->sequenceNumber,\n ldac_decoder_frame_p->curSubSequenceNumber);\n DUMP8(\"%x \", temp_buf_ptr1, 30);\n }\n\n lock = int_lock();\n result = ldacBT_decode(\n LdacDecHandle, temp_buf_ptr1, temp_buf_ptr2, LDACBT_SMPL_FMT_S16,\n ldac_decoder_frame_p->buffer_len, &used_bytes, &wrote_bytes);\n output_count++;\n int_unlock(lock);\n\n // TRACE(\"%s wb:%d bb:%d\n // pb:%d\",__func__,wrote_bytes,buffer_bytes,pcm_output_bytes);\n\n // DUMP8(\"%x \",temp_buf_ptr2,10);\n\n if (result != 0) {\n output_count = 0;\n TRACE(4, \"%s wb:%d bb:%d pb:%d\", __func__, wrote_bytes, buffer_bytes,\n pcm_output_bytes);\n TRACE(2, \"decode:seq %d %d\", ldac_decoder_frame_p->sequenceNumber,\n ldac_decoder_frame_p->curSubSequenceNumber);\n DUMP8(\"%x \", temp_buf_ptr1, 10);\n TRACE(1, \"ldac decode error %d\", result);\n result = A2DP_DECODER_DECODE_ERROR;\n goto exit;\n }\n }\n a2dp_audio_ldac_lastframe_info.sequenceNumber =\n ldac_decoder_frame_p->sequenceNumber;\n a2dp_audio_ldac_lastframe_info.timestamp = ldac_decoder_frame_p->timestamp;\n a2dp_audio_ldac_lastframe_info.curSubSequenceNumber =\n ldac_decoder_frame_p->curSubSequenceNumber;\n a2dp_audio_ldac_lastframe_info.totalSubSequenceNumber =\n ldac_decoder_frame_p->totalSubSequenceNumber;\n a2dp_audio_ldac_lastframe_info.frame_samples =\n ldac_decoder_frame_p->frame_samples;\n a2dp_audio_ldac_lastframe_info.decoded_frames++;\n a2dp_audio_ldac_lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) - 1;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_ldac_lastframe_info);\n a2dp_audio_list_remove(list, ldac_decoder_frame_p);\n }\n\nexit:\n if (cache_underflow) {\n a2dp_audio_ldac_lastframe_info.undecode_frames = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_ldac_lastframe_info);\n result = A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n return result;\n}\n\nint a2dp_audio_ldac_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n int ret = 0;\n if (bt_ldac_player_get_channelmode() == LDACBT_CHANNEL_MODE_MONO) {\n#ifdef A2DP_CP_ACCEL\n ret = a2dp_cp_ldac_mcu_decode(buffer, buffer_bytes / sizeof(int16_t));\n#else\n ret = a2dp_audio_ldac_mcu_decode_frame(buffer,\n buffer_bytes / sizeof(int16_t));\n#endif\n int16_t *out_int16 = (int16_t *)buffer;\n int16_t wrote_samples = buffer_bytes / sizeof(int16_t);\n for (int32_t i = wrote_samples - 1; i >= 0; i--) {\n out_int16[2 * i + 1] = out_int16[i];\n out_int16[2 * i] = out_int16[i];\n }\n } else\n#ifdef A2DP_CP_ACCEL\n ret = a2dp_cp_ldac_mcu_decode(buffer, buffer_bytes);\n#else\n ret = a2dp_audio_ldac_mcu_decode_frame(buffer, buffer_bytes);\n#endif\n return ret;\n}\n\nint a2dp_audio_ldac_preparse_packet(btif_media_header_t *header,\n uint8_t *buffer, uint32_t buffer_bytes) {\n a2dp_audio_ldac_lastframe_info.sequenceNumber = header->sequenceNumber;\n a2dp_audio_ldac_lastframe_info.timestamp = header->timestamp;\n a2dp_audio_ldac_lastframe_info.curSubSequenceNumber = 0;\n a2dp_audio_ldac_lastframe_info.totalSubSequenceNumber = 0;\n a2dp_audio_ldac_lastframe_info.frame_samples = LDAC_LIST_SAMPLES;\n a2dp_audio_ldac_lastframe_info.list_samples = LDAC_LIST_SAMPLES;\n a2dp_audio_ldac_lastframe_info.decoded_frames = 0;\n a2dp_audio_ldac_lastframe_info.undecode_frames = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_ldac_lastframe_info);\n\n TRACE(4, \"%s seq:%d timestamp:%d frame samples:%d\", __func__,\n header->sequenceNumber, header->timestamp,\n a2dp_audio_ldac_lastframe_info.frame_samples);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nstatic void *a2dp_audio_ldac_frame_malloc(uint32_t packet_len) {\n a2dp_audio_ldac_decoder_frame_t *decoder_frame_p = NULL;\n uint8_t *buffer = NULL;\n\n buffer = (uint8_t *)a2dp_audio_heap_malloc(packet_len);\n decoder_frame_p = (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_heap_malloc(\n sizeof(a2dp_audio_ldac_decoder_frame_t));\n decoder_frame_p->buffer = buffer;\n decoder_frame_p->buffer_len = packet_len;\n return (void *)decoder_frame_p;\n}\n\nvoid a2dp_audio_ldac_free(void *packet) {\n a2dp_audio_ldac_decoder_frame_t *decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)packet;\n a2dp_audio_heap_free(decoder_frame_p->buffer);\n a2dp_audio_heap_free(decoder_frame_p);\n}\n\nint a2dp_audio_ldac_header_parser(btif_media_header_t *header,\n uint32_t frame_num) {\n return 0;\n}\n\nint a2dp_audio_ldac_store_packet(btif_media_header_t *header, uint8_t *buffer,\n uint32_t buffer_bytes) {\n\n int nRet = A2DP_DECODER_NOT_SUPPORT;\n int check_header_status = 0;\n\n uint32_t frame_cnt = 0;\n uint32_t frame_num = 0;\n uint32_t frame_len = 0;\n uint32_t frame_len_with_head = 0;\n uint16_t data1 = 0;\n uint16_t data2 = 0;\n\n buffer++;\n buffer_bytes--;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n\n // TRACE(\"buffer:%x %x %x %x %x %x\n // %x\",buffer[0],buffer[1],buffer[2],buffer[3],buffer[4],buffer[5],buffer[6]);\n // TRACE(1,\"buffer:%x\",buffer[2]);\n\n data1 = (uint16_t)(buffer[1] & 0x07);\n data2 = (uint16_t)buffer[2];\n frame_len = ((data1 << 6 & 0xFFFF) | (data2 >> 2 & 0xFFFF));\n // TRACE(\"#frame len:%d\",frame_len);\n frame_num = get_ldac_frame_num_by_rawdata(buffer, buffer_bytes);\n\n if ((a2dp_audio_list_length(list) + frame_num) < ldac_mtu_limiter) {\n for (uint32_t i = 0; i < buffer_bytes;\n i += frame_len_with_head, frame_cnt++) {\n\n // TRACE(4,\"buffer:%x %x %x %x\n // \",buffer[i],buffer[i+1],buffer[i+2],buffer[i+3]);\n data1 = (uint16_t)(buffer[i + 1] & 0x07);\n data2 = (uint16_t)buffer[i + 2];\n frame_len = ((data1 << 6 & 0xFFFF) | (data2 >> 2 & 0xFFFF));\n // TRACE(\"#frame len:%d\",frame_len);\n // frame_num = get_ldac_frame_num(frame_len);\n // if (!frame_num)\n // {\n // TRACE(1,\"ERROR LDAC FRAME !!! frame_num:%d\", frame_num);\n // DUMP8(\"%02x \", buffer, 4);\n // return A2DP_DECODER_DECODE_ERROR;\n // }\n // for ldac head\n frame_len_with_head = frame_len + 4;\n // TRACE(2,\"frame len:%d num:%d\n // %d\",frame_len,frame_num,a2dp_audio_list_length(list));\n l2cap_frame_samples = 256 * frame_num;\n\n // TRACE(\"i %d buffer bytes:%d\",i,buffer_bytes);\n check_header_status = check_ldac_header(buffer + i, frame_len_with_head);\n if (!check_header_status) {\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_ldac_frame_malloc(\n frame_len_with_head);\n\n ldac_decoder_frame_p->sequenceNumber = header->sequenceNumber;\n ldac_decoder_frame_p->curSubSequenceNumber = frame_cnt;\n ldac_decoder_frame_p->totalSubSequenceNumber = frame_num;\n ldac_decoder_frame_p->timestamp = header->timestamp;\n ldac_decoder_frame_p->buffer_len = frame_len_with_head;\n ldac_decoder_frame_p->frame_samples = 256;\n memcpy(ldac_decoder_frame_p->buffer, buffer + i, frame_len_with_head);\n // TRACE(5,\"seq:%d len:%d i:%d buffer bytes:%d\n // data:%x\",header->sequenceNumber,\n // frame_len,i,buffer_bytes,ldac_decoder_frame_p->buffer[0]);\n // TRACE(5,\"store seq:%d %d\n // %d\",header->sequenceNumber,ldac_decoder_frame_p->curSubSequenceNumber,ldac_decoder_frame_p->totalSubSequenceNumber);\n a2dp_audio_list_append(list, ldac_decoder_frame_p);\n } else {\n TRACE(1, \"ERROR LDAC FRAME ret:%d\", check_header_status);\n DUMP8(\"%02x \", buffer + i, 6);\n break;\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n\n } else {\n\n#if 0\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame_p = NULL;\n do\n {\n ldac_decoder_frame_p = (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_back(list);\n TRACE(3,\"remov seq:%d %d %d\",ldac_decoder_frame_p->sequenceNumber,ldac_decoder_frame_p->curSubSequenceNumber,ldac_decoder_frame_p->totalSubSequenceNumber);\n a2dp_audio_list_remove(list, ldac_decoder_frame_p);\n }\n while(ldac_decoder_frame_p->curSubSequenceNumber!=0);\n#endif\n TRACE(3, \"%s list full current list_len step1:%d buff_len:%d\", __func__,\n a2dp_audio_list_length(list), buffer_bytes);\n nRet = A2DP_DECODER_MTU_LIMTER_ERROR;\n }\n\n return nRet;\n}\n\nint a2dp_audio_ldac_discards_packet(uint32_t packets) {\n int nRet = A2DP_DECODER_MEMORY_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame_p = NULL;\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n if (packets <= a2dp_audio_list_length(list)) {\n for (uint8_t i = 0; i < packets; i++) {\n node = a2dp_audio_list_begin(list);\n ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, ldac_decoder_frame_p);\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n TRACE(3, \"%s packets:%d nRet:%d\", __func__, packets, nRet);\n return nRet;\n}\n\nint a2dp_audio_ldac_info_get(void *info) { return A2DP_DECODER_NO_ERROR; }\n\nstatic int a2dp_audio_ldac_decoder_init(void) {\n\n int sample_rate = bt_get_ladc_sample_rate();\n int channel_mode = bt_ldac_player_get_channelmode();\n if (LdacDecHandle == NULL) {\n if ((LdacDecHandle = ldacBT_get_handle()) == (HANDLE_LDAC_BT)NULL) {\n TRACE(0, \"Error: Can not Get LDAC Handle!\\n\");\n return 1;\n }\n }\n\n TRACE(2, \"a2dp_audio_ldac_decoder_init sample Rate=%d, channel_mode = %d\\n\",\n sample_rate, channel_mode);\n // TRACE(1,\"sys freq calc : %d\\n\", hal_sys_timer_calc_cpu_freq(0));\n TRACE(0, \"ldac need init here!!!! \\n\");\n if ((LdacDecHandle = ldacBT_get_handle()) == (HANDLE_LDAC_BT)NULL) {\n TRACE(0, \"Error: Can not Get LDAC Handle!\\n\");\n return 1;\n }\n int result = ldacBT_init_handle_decode(LdacDecHandle, channel_mode,\n sample_rate, 0, 0, 0);\n if (result) {\n TRACE(1, \"[ERR] Initializing LDAC Handle for synthesis! Error code %s\\n\",\n get_error_code_string(ldacBT_get_error_code(LdacDecHandle)));\n return 2;\n }\n return 0;\n}\n\nstatic void a2dp_audio_ldac_decoder_deinit(void) {\n if (LdacDecHandle != NULL) {\n ldacBT_free_handle(LdacDecHandle);\n LdacDecHandle = NULL;\n }\n}\n\nstatic int a2dp_audio_ldac_list_checker(void) {\n\n // return 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame_p = NULL;\n int cnt = 0;\n\n do {\n\n // TRACE(1,\"cnt:%d\",cnt);\n ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_ldac_frame_malloc(216 +\n 4);\n if (ldac_decoder_frame_p) {\n a2dp_audio_list_append(list, ldac_decoder_frame_p);\n }\n cnt++;\n } while (ldac_decoder_frame_p && cnt < LDAC_MTU_LIMITER);\n\n do {\n node = a2dp_audio_list_begin(list);\n if (node) {\n ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, ldac_decoder_frame_p);\n }\n } while (node);\n\n TRACE(3, \"%s cnt:%d list:%d\", __func__, cnt, a2dp_audio_list_length(list));\n\n return 0;\n}\n\nint a2dp_audio_ldac_init(A2DP_AUDIO_OUTPUT_CONFIG_T *config, void *context) {\n TRACE(1, \"%s\", __func__);\n a2dp_audio_context_p = (A2DP_AUDIO_CONTEXT_T *)context;\n\n memset(&a2dp_audio_ldac_lastframe_info, 0,\n sizeof(A2DP_AUDIO_DECODER_LASTFRAME_INFO_T));\n a2dp_audio_ldac_lastframe_info.stream_info = *config;\n a2dp_audio_ldac_lastframe_info.frame_samples = 256;\n a2dp_audio_ldac_lastframe_info.list_samples = 256;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_ldac_lastframe_info);\n\n ASSERT(a2dp_audio_context_p->dest_packet_mut < LDAC_MTU_LIMITER,\n \"%s MTU OVERFLOW:%u/%u\", __func__,\n a2dp_audio_context_p->dest_packet_mut, LDAC_MTU_LIMITER);\n\n#ifdef A2DP_CP_ACCEL\n int ret;\n ret = a2dp_cp_init(a2dp_cp_ldac_cp_decode, CP_PROC_DELAY_2_FRAMES);\n ASSERT(ret == 0, \"%s: a2dp_cp_init() failed: ret=%d\", __func__, ret);\n#endif\n a2dp_audio_ldac_decoder_init();\n a2dp_audio_ldac_list_checker();\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_ldac_deinit(void) {\n\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_deinit();\n#endif\n a2dp_audio_ldac_decoder_deinit();\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_ldac_synchronize_packet(A2DP_AUDIO_SYNCFRAME_INFO_T *sync_info,\n uint32_t mask) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n int list_len;\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame_p = NULL;\n\n list_len = a2dp_audio_list_length(list);\n\n for (uint16_t i = 0; i < list_len; i++) {\n node = a2dp_audio_list_begin(list);\n ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n // if (A2DP_AUDIO_SYNCFRAME_CHK(ldac_decoder_frame_p->sequenceNumber ==\n // sync_info->sequenceNumber, A2DP_AUDIO_SYNCFRAME_MASK_SEQ, mask)&&\n // A2DP_AUDIO_SYNCFRAME_CHK(ldac_decoder_frame_p->timestamp ==\n // sync_info->timestamp, A2DP_AUDIO_SYNCFRAME_MASK_TIMESTAMP,\n // mask))\n\n if (A2DP_AUDIO_SYNCFRAME_CHK(ldac_decoder_frame_p->sequenceNumber ==\n sync_info->sequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_SEQ, mask) &&\n A2DP_AUDIO_SYNCFRAME_CHK(ldac_decoder_frame_p->curSubSequenceNumber ==\n sync_info->curSubSequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_CURRSUBSEQ, mask) &&\n A2DP_AUDIO_SYNCFRAME_CHK(ldac_decoder_frame_p->totalSubSequenceNumber ==\n sync_info->totalSubSequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_TOTALSUBSEQ, mask)) {\n nRet = A2DP_DECODER_NO_ERROR;\n break;\n }\n a2dp_audio_list_remove(list, ldac_decoder_frame_p);\n }\n\n node = a2dp_audio_list_begin(list);\n if (node) {\n ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n TRACE(4, \"%s nRet:%d SEQ:%d timestamp:%d\", __func__, nRet,\n ldac_decoder_frame_p->sequenceNumber,\n ldac_decoder_frame_p->timestamp);\n } else {\n TRACE(2, \"%s nRet:%d\", __func__, nRet);\n // TRACE(5,\"nRet:%d SEQ:%d timestamp:%d sync %d/%d\", nRet,\n // ldac_decoder_frame_p->sequenceNumber,\n // ldac_decoder_frame_p->timestamp,sync_info->sequenceNumber,sync_info->timestamp);\n }\n\n return nRet;\n}\n\nint a2dp_audio_ldac_synchronize_dest_packet_mut(uint16_t packet_mut) {\n list_node_t *node = NULL;\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame_p = NULL;\n\n list_len = a2dp_audio_list_length(list);\n if (list_len > packet_mut) {\n do {\n node = a2dp_audio_list_begin(list);\n ldac_decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, ldac_decoder_frame_p);\n } while (a2dp_audio_list_length(list) > packet_mut);\n }\n\n TRACE(2, \"%s list:%d\", __func__, a2dp_audio_list_length(list));\n return A2DP_DECODER_NO_ERROR;\n}\n\nstatic int a2dp_audio_ldac_headframe_info_get(\n A2DP_AUDIO_HEADFRAME_INFO_T *headframe_info) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_ldac_decoder_frame_t *decoder_frame_p = NULL;\n\n if (a2dp_audio_list_length(list)) {\n node = a2dp_audio_list_begin(list);\n decoder_frame_p =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n headframe_info->sequenceNumber = decoder_frame_p->sequenceNumber;\n headframe_info->timestamp = decoder_frame_p->timestamp;\n headframe_info->curSubSequenceNumber =\n decoder_frame_p->curSubSequenceNumber;\n headframe_info->totalSubSequenceNumber =\n decoder_frame_p->totalSubSequenceNumber;\n } else {\n memset(headframe_info, 0, sizeof(A2DP_AUDIO_HEADFRAME_INFO_T));\n }\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_ldac_convert_list_to_samples(uint32_t *samples) {\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n\n list_len = a2dp_audio_list_length(list);\n *samples = LDAC_LIST_SAMPLES * list_len;\n\n TRACE(3, \"%s list:%d samples:%d\", __func__, list_len, *samples);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_ldac_discards_samples(uint32_t samples) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_ldac_decoder_frame_t *ldac_decoder_frame = NULL;\n list_node_t *node = NULL;\n int need_remove_list = 0;\n uint32_t list_samples = 0;\n ASSERT(!(samples % LDAC_LIST_SAMPLES), \"%s samples err:%d\", __func__,\n samples);\n\n a2dp_audio_ldac_convert_list_to_samples(&list_samples);\n if (list_samples >= samples) {\n need_remove_list = samples / LDAC_LIST_SAMPLES;\n for (int i = 0; i < need_remove_list; i++) {\n node = a2dp_audio_list_begin(list);\n ldac_decoder_frame =\n (a2dp_audio_ldac_decoder_frame_t *)a2dp_audio_list_node(node);\n\n TRACE(1, \"discard seq:%d %d %d\", ldac_decoder_frame->sequenceNumber,\n ldac_decoder_frame->curSubSequenceNumber,\n ldac_decoder_frame->totalSubSequenceNumber);\n a2dp_audio_list_remove(list, ldac_decoder_frame);\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n\n return nRet;\n}\n\nA2DP_AUDIO_DECODER_T a2dp_audio_ldac_decoder_config = {\n {96000, 2, 16},\n 0,\n a2dp_audio_ldac_init,\n a2dp_audio_ldac_deinit,\n a2dp_audio_ldac_decode_frame,\n a2dp_audio_ldac_preparse_packet,\n a2dp_audio_ldac_store_packet,\n a2dp_audio_ldac_discards_packet,\n a2dp_audio_ldac_synchronize_packet,\n a2dp_audio_ldac_synchronize_dest_packet_mut,\n a2dp_audio_ldac_convert_list_to_samples,\n a2dp_audio_ldac_discards_samples,\n a2dp_audio_ldac_headframe_info_get,\n a2dp_audio_ldac_info_get,\n a2dp_audio_ldac_free,\n};\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_lhdc.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"a2dp_decoder_internal.h\"\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"heap_api.h\"\n#include \"plat_types.h\"\n#include \n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n uint8_t *buffer;\n uint32_t buffer_len;\n} a2dp_audio_lhdc_decoder_frame_t;\n\n#define LHDC_MTU_LIMITER (100)\n\n#if defined(A2DP_LHDC_V3)\n#define A2DP_LHDC_OUTPUT_FRAME_SAMPLES (256)\n#else\n#define A2DP_LHDC_OUTPUT_FRAME_SAMPLES (512)\n#endif\n\n#define A2DP_LHDC_DEFAULT_LATENCY (1)\n#if defined(A2DP_LHDC_V3)\n#define PACKET_BUFFER_LENGTH (2 * 1024)\n#else\n#define PACKET_BUFFER_LENGTH (4 * 1024)\n#endif\n\n#define LHDC_READBUF_SIZE (512)\n\n#define A2DP_LHDC_HDR_F_MSK 0x80\n#define A2DP_LHDC_HDR_S_MSK 0x40\n#define A2DP_LHDC_HDR_L_MSK 0x20\n#define A2DP_LHDC_HDR_FLAG_MSK \\\n (A2DP_LHDC_HDR_F_MSK | A2DP_LHDC_HDR_S_MSK | A2DP_LHDC_HDR_L_MSK)\n\n#define A2DP_LHDC_HDR_LATENCY_LOW 0x00\n#define A2DP_LHDC_HDR_LATENCY_MID 0x01\n#define A2DP_LHDC_HDR_LATENCY_HIGH 0x02\n#define A2DP_LHDC_HDR_LATENCY_MASK \\\n (A2DP_LHDC_HDR_LATENCY_MID | A2DP_LHDC_HDR_LATENCY_HIGH)\n\n#if defined(A2DP_LHDC_V3)\n#define A2DP_LHDC_HDR_FRAME_NO_MASK 0xfc\n#else\n#define A2DP_LHDC_HDR_FRAME_NO_MASK 0x1c\n#endif\n\ntypedef enum {\n ASM_PKT_WAT_STR,\n ASM_PKT_WAT_LST,\n} ASM_PKT_STATUS;\n\ntypedef enum { VERSION_2 = 200, VERSION_3 = 300 } lhdc_ver_t;\n\n/**\n * get lhdc frame header\n */\n\n/**\n LHDC frame\n*/\ntypedef struct _lhdc_frame_Info {\n uint32_t\n frame_len; // 该 frame 的长处，若是分离压缩，则表示单一声道的 frame 长度。\n uint32_t isSplit; // 是否为分离方式压缩\n uint32_t isLeft; // 左声道 == true， 右声道 == false\n\n} lhdc_frame_Info_t;\n\n#ifdef A2DP_CP_ACCEL\nstruct A2DP_CP_LHDC_IN_FRM_INFO_T {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n};\n\nstruct A2DP_CP_LHDC_OUT_FRM_INFO_T {\n struct A2DP_CP_LHDC_IN_FRM_INFO_T in_info;\n uint16_t frame_samples;\n uint16_t decoded_frames;\n uint16_t frame_idx;\n uint16_t pcm_len;\n};\n#endif\n\nextern \"C\" {\ntypedef struct bes_bt_local_info_t {\n uint8_t bt_addr[BTIF_BD_ADDR_SIZE];\n const char *bt_name;\n uint8_t bt_len;\n uint8_t ble_addr[BTIF_BD_ADDR_SIZE];\n const char *ble_name;\n uint8_t ble_len;\n} bes_bt_local_info;\n\ntypedef int (*LHDC_GET_BT_INFO)(bes_bt_local_info *bt_info);\n\nvoid lhdcInit(uint32_t bitPerSample, uint32_t sampleRate,\n uint32_t scaleTo16Bits, lhdc_ver_t version);\n// void lhdcInit(uint32_t bitPerSample, uint32_t sampleRate, uint32_t\n// scaleTo16Bits);\n#if defined(A2DP_LHDC_V3)\nuint32_t lhdcPutData(uint8_t *pIn, uint32_t len);\n#else\nuint32_t lhdcPutData(uint8_t *pIn, int32_t len);\n#endif\nuint32_t lhdcDecodeProcess(uint8_t *pOutBuf);\nvoid lhdcDestroy();\nbool lhdcSetLicenseKeyTable(uint8_t *licTable, LHDC_GET_BT_INFO pFunc);\nconst char *getVersionCode();\nbool larcIsEnabled();\n}\n\nstatic A2DP_AUDIO_CONTEXT_T *a2dp_audio_context_p = NULL;\nstatic A2DP_AUDIO_DECODER_LASTFRAME_INFO_T a2dp_audio_lhdc_lastframe_info;\nstatic A2DP_AUDIO_OUTPUT_CONFIG_T a2dp_audio_lhdc_output_config;\nstatic uint16_t lhdc_mtu_limiter = LHDC_MTU_LIMITER;\n\nstatic uint8_t serial_no;\nstatic bool is_synced;\nstatic ASM_PKT_STATUS asm_pkt_st;\nstatic uint8_t packet_buffer[PACKET_BUFFER_LENGTH];\nstatic uint32_t packet_buf_len = 0;\nstatic uint32_t lhdc_total_frame_nb = 0;\n\n#if defined(A2DP_LHDC_LARC)\nstatic uint32_t lhdc_drop_frame = 0;\nstatic uint32_t lhdc_last_time = 0;\nstatic struct A2DP_CP_LHDC_IN_FRM_INFO_T last_frame_info;\n// static uint16_t demo_frame_cnt = 0;\n#endif\n\nextern int bes_bt_local_info_get(bes_bt_local_info *local_info);\n\n// Local API declare\nvoid sav_lhdc_log_bytes_len(uint32_t bytes_len);\n\n#define STATISTICS_UPDATE_INTERVAL 1000 // in ms\n#define INTERVAL_TIMEBASE 1000 // in ms\ntypedef struct {\n uint32_t sum_bytes;\n uint32_t last_times; // in ms\n float last_avg_val;\n int32_t update_interval; // in ms\n} LHDC_TRACFIC_STATISTICS;\n\nLHDC_TRACFIC_STATISTICS statistic = {0, 0, 0, STATISTICS_UPDATE_INTERVAL};\n\nvoid sav_lhdc_log_bytes_len(uint32_t bytes_len) {\n uint32_t time_current = GET_CURRENT_MS();\n float time_diff = time_current - statistic.last_times;\n statistic.sum_bytes += bytes_len;\n if (time_diff >= statistic.update_interval) {\n\n statistic.last_avg_val = ((float)(statistic.sum_bytes * 8) / 1000) /\n (time_diff / INTERVAL_TIMEBASE);\n TRACE_A2DP_DECODER_I(\"Avarage rate about %d kbps\",\n (int)statistic.last_avg_val);\n\n statistic.sum_bytes = 0;\n statistic.last_times = time_current;\n }\n}\n\n#if defined(A2DP_LHDC_LARC) && defined(A2DP_LHDC_V3)\nstatic void sav_lhdc_save_last_info(struct A2DP_CP_LHDC_IN_FRM_INFO_T *f_info) {\n\n memcpy(&last_frame_info, f_info, sizeof(struct A2DP_CP_LHDC_IN_FRM_INFO_T));\n}\n\nstatic void sav_lhdc_get_next_info(struct A2DP_CP_LHDC_IN_FRM_INFO_T *f_info) {\n f_info->timestamp = last_frame_info.timestamp;\n f_info->sequenceNumber = last_frame_info.sequenceNumber;\n f_info->totalSubSequenceNumber = last_frame_info.totalSubSequenceNumber;\n f_info->curSubSequenceNumber = last_frame_info.curSubSequenceNumber + 1;\n if (f_info->curSubSequenceNumber > last_frame_info.totalSubSequenceNumber) {\n f_info->curSubSequenceNumber = 1;\n f_info->timestamp =\n last_frame_info.timestamp + (A2DP_LHDC_OUTPUT_FRAME_SAMPLES *\n last_frame_info.totalSubSequenceNumber);\n f_info->sequenceNumber = last_frame_info.sequenceNumber + 1;\n }\n}\n#endif\n\nstatic void *a2dp_audio_lhdc_frame_malloc(uint32_t packet_len) {\n a2dp_audio_lhdc_decoder_frame_t *decoder_frame_p = NULL;\n uint8_t *buffer = NULL;\n\n buffer = (uint8_t *)a2dp_audio_heap_malloc(packet_len);\n decoder_frame_p = (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_heap_malloc(\n sizeof(a2dp_audio_lhdc_decoder_frame_t));\n decoder_frame_p->buffer = buffer;\n decoder_frame_p->buffer_len = packet_len;\n return (void *)decoder_frame_p;\n}\n\nstatic void reset_lhdc_assmeble_packet(void) {\n is_synced = false;\n asm_pkt_st = ASM_PKT_WAT_STR;\n packet_buf_len = 0;\n}\n\nstatic void initial_lhdc_assemble_packet(bool splitFlg) {\n memset(packet_buffer, 0, PACKET_BUFFER_LENGTH);\n reset_lhdc_assmeble_packet();\n serial_no = 0xff;\n}\n\n/**\n * A2DP packet 组包\n */\n#if defined(A2DP_LHDC_V3)\nint assemble_lhdc_packet(uint8_t *input, uint32_t input_len, uint8_t **pLout,\n uint32_t *pLlen) {\n uint8_t hdr = 0, seqno = 0xff;\n int ret = -1;\n uint32_t status = 0;\n\n hdr = (*input);\n input++;\n seqno = (*input);\n input++;\n input_len -= 2;\n\n // Check latency and update value when changed.\n status = hdr & A2DP_LHDC_HDR_LATENCY_MASK;\n\n // Get number of frame in packet.\n status = (hdr & A2DP_LHDC_HDR_FRAME_NO_MASK) >> 2;\n if (status <= 0) {\n TRACE_A2DP_DECODER_I(\"No any frame in packet.\");\n return 0;\n }\n lhdc_total_frame_nb = status;\n if (seqno != serial_no) {\n TRACE_A2DP_DECODER_I(\"Packet lost! now(%d), expect(%d)\", seqno, serial_no);\n }\n serial_no = seqno + 1;\n\n sav_lhdc_log_bytes_len(input_len);\n\n if (pLlen && pLout) {\n *pLlen = input_len;\n *pLout = input;\n }\n ret = lhdc_total_frame_nb;\n\n return ret;\n}\n#else\nint assemble_lhdc_packet(uint8_t *input, uint32_t input_len, uint8_t **pLout,\n uint32_t *pLlen) {\n uint8_t hdr = 0, seqno = 0xff;\n int ret = -1;\n // uint32_t status = 0;\n\n hdr = (*input);\n input++;\n seqno = (*input);\n input++;\n input_len -= 2;\n\n if (is_synced) {\n if (seqno != serial_no) {\n reset_lhdc_assmeble_packet();\n if ((hdr & A2DP_LHDC_HDR_FLAG_MSK) == 0 ||\n (hdr & A2DP_LHDC_HDR_S_MSK) != 0) {\n goto lhdc_start;\n } else\n TRACE_A2DP_DECODER_I(\"drop packet No. %u\", seqno);\n return 0;\n }\n serial_no = seqno + 1;\n }\n\nlhdc_start:\n switch (asm_pkt_st) {\n case ASM_PKT_WAT_STR: {\n if ((hdr & A2DP_LHDC_HDR_FLAG_MSK) == 0) {\n memcpy(&packet_buffer[0], input, input_len);\n if (pLlen && pLout) {\n *pLlen = input_len;\n *pLout = packet_buffer;\n }\n // TRACE_A2DP_DECODER_I(\"Single payload size = %d\", *pLlen);\n asm_pkt_st = ASM_PKT_WAT_STR;\n packet_buf_len = 0; //= packet_buf_left_len = packet_buf_right_len = 0;\n lhdc_total_frame_nb = (hdr & A2DP_LHDC_HDR_FRAME_NO_MASK) >> 2;\n ;\n // TRACE_A2DP_DECODER_I(\"Single packet. total %d frames\",\n // lhdc_total_frame_nb);\n ret = lhdc_total_frame_nb;\n } else if (hdr & A2DP_LHDC_HDR_S_MSK) {\n ret = 0;\n if (packet_buf_len + input_len >= PACKET_BUFFER_LENGTH) {\n packet_buf_len = 0;\n asm_pkt_st = ASM_PKT_WAT_STR;\n TRACE_A2DP_DECODER_I(\"ASM_PKT_WAT_STR:Frame buffer overflow!(%d)\",\n packet_buf_len);\n break;\n }\n memcpy(&packet_buffer, input, input_len);\n packet_buf_len = input_len;\n asm_pkt_st = ASM_PKT_WAT_LST;\n lhdc_total_frame_nb = (hdr & A2DP_LHDC_HDR_FRAME_NO_MASK) >> 2;\n // TRACE_A2DP_DECODER_I(\"start of multi packet.\");\n } else\n ret = -1;\n\n if (ret >= 0) {\n if (!is_synced) {\n is_synced = true;\n serial_no = seqno + 1;\n }\n }\n break;\n }\n case ASM_PKT_WAT_LST: {\n if (packet_buf_len + input_len >= PACKET_BUFFER_LENGTH) {\n packet_buf_len = 0;\n asm_pkt_st = ASM_PKT_WAT_STR;\n TRACE_A2DP_DECODER_I(\"ASM_PKT_WAT_LST:Frame buffer overflow(%d)\",\n packet_buf_len);\n break;\n }\n memcpy(&packet_buffer[packet_buf_len], input, input_len);\n // TRACE_A2DP_DECODER_I(\"multi:payload size = %d\", input_len);\n packet_buf_len += input_len;\n ret = 0;\n\n if (hdr & A2DP_LHDC_HDR_L_MSK) {\n\n if (pLlen && pLout) {\n *pLlen = packet_buf_len;\n *pLout = packet_buffer;\n }\n // TRACE_A2DP_DECODER_I(\"end of multi packet. total %d frames.\",\n // lhdc_total_frame_nb);\n packet_buf_len = 0; // packet_buf_left_len = packet_buf_right_len = 0;\n ret = lhdc_total_frame_nb;\n asm_pkt_st = ASM_PKT_WAT_STR;\n }\n break;\n }\n default:\n ret = 0;\n break;\n }\n return ret;\n}\n#endif\n\nstatic int parse_lhdc_info(uint8_t *in, lhdc_frame_Info_t *h) {\n#define LHDC_HDR_LEN 4\n uint32_t hdr = 0;\n int ret = -1;\n memcpy(&hdr, in, LHDC_HDR_LEN);\n h->frame_len = (int)((hdr >> 8) & 0x1fff);\n h->isSplit = ((hdr & 0x00600000) == 0x00600000);\n h->isLeft = ((hdr & 0xf) == 0);\n\n if ((hdr & 0xff000000) != 0x4c000000) {\n } else {\n ret = 0;\n }\n return ret;\n}\n\n#ifdef A2DP_CP_ACCEL\n\nextern \"C\" uint32_t get_in_cp_frame_cnt(void);\nextern \"C\" unsigned int set_cp_reset_flag(uint8_t evt);\nextern uint32_t app_bt_stream_get_dma_buffer_samples(void);\n\nint a2dp_cp_lhdc_cp_decode(void);\n\nTEXT_LHDC_LOC\nstatic int a2dp_cp_lhdc_after_cache_underflow(void) {\n int ret = 0;\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_deinit();\n lhdcDestroy();\n ret = a2dp_cp_init(a2dp_cp_lhdc_cp_decode, CP_PROC_DELAY_2_FRAMES);\n ASSERT(ret == 0, \"%s: a2dp_cp_init() failed: ret=%d\", __func__, ret);\n#endif\n return ret;\n}\n\n// uint32_t demoTimer = 0;\nstatic int a2dp_cp_lhdc_mcu_decode(uint8_t *buffer, uint32_t buffer_bytes) {\n a2dp_audio_lhdc_decoder_frame_t *lhdc_decoder_frame_p = NULL;\n list_node_t *node = NULL;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int ret, dec_ret;\n struct A2DP_CP_LHDC_IN_FRM_INFO_T in_info;\n struct A2DP_CP_LHDC_OUT_FRM_INFO_T *p_out_info;\n\n uint8_t *out;\n uint32_t out_len;\n uint32_t out_frame_len;\n uint32_t cp_buffer_frames_max = 0;\n\n#if defined(A2DP_LHDC_LARC)\n // bool forceRecovery = false;\n bool larcEnabled = larcIsEnabled();\n uint32_t frame_number = 0;\n\n if (larcEnabled) {\n /* The LARC is enabled. */\n\n uint32_t time_diff = 0, time_now = GET_CURRENT_MS();\n\n if (lhdc_last_time == 0) {\n lhdc_last_time = time_now;\n }\n // if (demoTimer == 0) {\n // demoTimer = time_now;\n // }\n time_diff = time_now - lhdc_last_time;\n lhdc_last_time = time_now;\n\n frame_number = (uint32_t)((float)time_diff /\n ((A2DP_LHDC_OUTPUT_FRAME_SAMPLES * 1000) /\n a2dp_audio_lhdc_output_config.sample_rate));\n\n TRACE_A2DP_DECODER_I(\n \"%s:current total list len %d, need frames %d\", __func__,\n a2dp_audio_list_length(list) + get_in_cp_frame_cnt(), frame_number);\n // if (time_now - demoTimer >= (5 * 1000)) {\n // forceRecovery = true;\n // demoTimer = time_now;\n // demo_frame_cnt = (a2dp_audio_lhdc_output_config.sample_rate * 120) /\n // (A2DP_LHDC_OUTPUT_FRAME_SAMPLES * 1000);\n // }\n }\n#endif\n\n cp_buffer_frames_max = app_bt_stream_get_dma_buffer_samples() / 2;\n\n if (cp_buffer_frames_max % (a2dp_audio_lhdc_lastframe_info.frame_samples)) {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (a2dp_audio_lhdc_lastframe_info.frame_samples) +\n 1;\n } else {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (a2dp_audio_lhdc_lastframe_info.frame_samples);\n }\n\n out_frame_len = sizeof(*p_out_info) + buffer_bytes;\n\n ret = a2dp_cp_decoder_init(out_frame_len, cp_buffer_frames_max * 8);\n if (ret) {\n TRACE_A2DP_DECODER_I(\"%s: a2dp_cp_decoder_init() failed: ret=%d\", __func__,\n ret);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n\n#if defined(A2DP_LHDC_LARC)\n uint32_t put_cnt = 0;\n uint32_t drop_cnt = 0;\n while (larcEnabled && ((a2dp_audio_list_length(list) < frame_number &&\n get_in_cp_frame_cnt() == 0))) {\n sav_lhdc_get_next_info(&in_info);\n ret = a2dp_cp_put_in_frame(&in_info, sizeof(in_info), NULL, 0x55);\n if (ret) {\n // TRACE_A2DP_DECODER_I(\"%s piff !!!!!!ret: %d \",__func__, ret);\n break;\n }\n sav_lhdc_save_last_info(&in_info);\n lhdc_drop_frame++;\n frame_number--;\n // demo_frame_cnt--;\n put_cnt++;\n }\n // forceRecovery = false;\n TRACE_A2DP_DECODER_I(\"Recover %d frames\", put_cnt);\n put_cnt = 0;\n drop_cnt = 0;\n#endif\n while ((node = a2dp_audio_list_begin(list)) != NULL) {\n lhdc_decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n in_info.sequenceNumber = lhdc_decoder_frame_p->sequenceNumber;\n in_info.timestamp = lhdc_decoder_frame_p->timestamp;\n in_info.curSubSequenceNumber = lhdc_decoder_frame_p->curSubSequenceNumber;\n in_info.totalSubSequenceNumber =\n lhdc_decoder_frame_p->totalSubSequenceNumber;\n\n#if defined(A2DP_LHDC_LARC)\n if (!lhdc_drop_frame) {\n ret = a2dp_cp_put_in_frame(&in_info, sizeof(in_info),\n lhdc_decoder_frame_p->buffer,\n lhdc_decoder_frame_p->buffer_len);\n if (ret) {\n // TRACE_A2DP_DECODER_I(\"%s piff !!!!!!ret: %d \",__func__, ret);\n break;\n }\n sav_lhdc_save_last_info(&in_info);\n put_cnt++;\n } else {\n lhdc_drop_frame--;\n drop_cnt++;\n }\n#else\n ret = a2dp_cp_put_in_frame(&in_info, sizeof(in_info),\n lhdc_decoder_frame_p->buffer,\n lhdc_decoder_frame_p->buffer_len);\n if (ret) {\n // TRACE_A2DP_DECODER_I(\"%s piff !!!!!!ret: %d \",__func__, ret);\n break;\n }\n#endif\n a2dp_audio_list_remove(list, lhdc_decoder_frame_p);\n node = a2dp_audio_list_begin(list);\n }\n#if defined(A2DP_LHDC_LARC)\n TRACE_A2DP_DECODER_I(\"Put %d frames, drop %d frames\", put_cnt, drop_cnt);\n#endif\n\n ret = a2dp_cp_get_full_out_frame((void **)&out, &out_len);\n\n if (ret) {\n TRACE_A2DP_DECODER_I(\"%s %d cp find cache underflow\", __func__, ret);\n TRACE_A2DP_DECODER_I(\"aud_list_len:%d. cp_get_in_frame:%d\",\n a2dp_audio_list_length(list), get_in_cp_frame_cnt());\n a2dp_cp_lhdc_after_cache_underflow();\n return A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n\n if (out_len == 0) {\n memset(buffer, 0, buffer_bytes);\n a2dp_cp_consume_full_out_frame();\n TRACE_A2DP_DECODER_I(\"%s olz!!!%d \", __func__, __LINE__);\n return A2DP_DECODER_NO_ERROR;\n }\n if (out_len != out_frame_len) {\n TRACE_A2DP_DECODER_I(\"%s: Bad out len %u (should be %u)\", __func__, out_len,\n out_frame_len);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n p_out_info = (struct A2DP_CP_LHDC_OUT_FRM_INFO_T *)out;\n if (p_out_info->pcm_len) {\n a2dp_audio_lhdc_lastframe_info.sequenceNumber =\n p_out_info->in_info.sequenceNumber;\n a2dp_audio_lhdc_lastframe_info.timestamp = p_out_info->in_info.timestamp;\n a2dp_audio_lhdc_lastframe_info.curSubSequenceNumber =\n p_out_info->in_info.curSubSequenceNumber;\n a2dp_audio_lhdc_lastframe_info.totalSubSequenceNumber =\n p_out_info->in_info.totalSubSequenceNumber;\n a2dp_audio_lhdc_lastframe_info.frame_samples = p_out_info->frame_samples;\n a2dp_audio_lhdc_lastframe_info.decoded_frames += p_out_info->decoded_frames;\n a2dp_audio_lhdc_lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) +\n a2dp_cp_get_in_frame_cnt_by_index(p_out_info->frame_idx) - 1;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_lhdc_lastframe_info);\n\n TRACE_A2DP_DECODER_I(\n \"lhdc_decoder seq:%d cursub:%d ttlsub:%d decoded:%d/%d\",\n a2dp_audio_lhdc_lastframe_info.sequenceNumber,\n a2dp_audio_lhdc_lastframe_info.curSubSequenceNumber,\n a2dp_audio_lhdc_lastframe_info.totalSubSequenceNumber,\n a2dp_audio_lhdc_lastframe_info.decoded_frames,\n a2dp_audio_lhdc_lastframe_info.undecode_frames);\n }\n\n if (p_out_info->pcm_len == buffer_bytes) {\n memcpy(buffer, p_out_info + 1, p_out_info->pcm_len);\n dec_ret = A2DP_DECODER_NO_ERROR;\n } else {\n TRACE_A2DP_DECODER_I(\"%s %d cp decoder error !!!!!!\", __func__, __LINE__);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n\n ret = a2dp_cp_consume_full_out_frame();\n if (ret) {\n\n TRACE_A2DP_DECODER_I(\"%s: a2dp_cp_consume_full_out_frame() failed: ret=%d\",\n __func__, ret);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n return dec_ret;\n}\n\n#ifdef __CP_EXCEPTION_TEST__\nstatic bool _cp_assert = false;\nint cp_assert(void) {\n _cp_assert = true;\n return 0;\n}\n#endif\n\n#define LHDC_DECODED_FRAME_SIZE 1024\n\nTEXT_LHDC_LOC\nint a2dp_cp_lhdc_cp_decode(void) {\n int ret;\n enum CP_EMPTY_OUT_FRM_T out_frm_st;\n uint8_t *out;\n uint32_t out_len;\n uint8_t *dec_start;\n uint32_t dec_len;\n struct A2DP_CP_LHDC_IN_FRM_INFO_T *p_in_info;\n struct A2DP_CP_LHDC_OUT_FRM_INFO_T *p_out_info;\n uint8_t *in_buf;\n uint32_t in_len;\n\n int32_t dec_sum;\n uint32_t lhdc_out_len = 0;\n\n#ifdef __CP_EXCEPTION_TEST__\n if (_cp_assert) {\n _cp_assert = false;\n *(int *)0 = 1;\n // ASSERT(0, \"ASSERT %s %d\", __func__, __LINE__);\n }\n#endif\n out_frm_st = a2dp_cp_get_emtpy_out_frame((void **)&out, &out_len);\n\n if (out_frm_st != CP_EMPTY_OUT_FRM_OK &&\n out_frm_st != CP_EMPTY_OUT_FRM_WORKING) {\n return out_frm_st;\n }\n ASSERT(out_len > sizeof(*p_out_info), \"%s: Bad out_len %u (should > %u)\",\n __func__, out_len, sizeof(*p_out_info));\n\n p_out_info = (struct A2DP_CP_LHDC_OUT_FRM_INFO_T *)out;\n if (out_frm_st == CP_EMPTY_OUT_FRM_OK) {\n p_out_info->pcm_len = 0;\n p_out_info->decoded_frames = 0;\n }\n\n ASSERT(out_len > sizeof(*p_out_info) + p_out_info->pcm_len,\n \"%s: Bad out_len %u (should > %u + %u)\", __func__, out_len,\n sizeof(*p_out_info), p_out_info->pcm_len);\n\n dec_start = (uint8_t *)(p_out_info + 1) + p_out_info->pcm_len;\n dec_len = out_len - (dec_start - (uint8_t *)out);\n\n dec_sum = 0;\n\n while (dec_sum < (int32_t)dec_len) {\n uint32_t lhdc_decode_temp = 0;\n\n ret = a2dp_cp_get_in_frame((void **)&in_buf, &in_len);\n\n if (ret) {\n TRACE_A2DP_DECODER_I(\"cp_get_int_frame fail, ret=%d\", ret);\n return 4;\n }\n\n ASSERT(in_len > sizeof(*p_in_info), \"%s: Bad in_len %u (should > %u)\",\n __func__, in_len, sizeof(*p_in_info));\n\n p_in_info = (struct A2DP_CP_LHDC_IN_FRM_INFO_T *)in_buf;\n in_buf += sizeof(*p_in_info);\n in_len -= sizeof(*p_in_info);\n\n#if defined(A2DP_LHDC_V3)\n#if defined(A2DP_LHDC_LARC)\n if (in_len == 0x55 && larcIsEnabled()) {\n // TRACE_A2DP_DECODER_I(\"recover:sn(%d), tt(%d), csssn(%d), ttsssn(%d)\",\n // p_in_info->sequenceNumber, p_in_info->timestamp,\n // p_in_info->curSubSequenceNumber, p_in_info->totalSubSequenceNumber);\n in_len = 0;\n }\n#endif\n lhdcPutData(in_buf, in_len);\n // TRACE_A2DP_DECODER_I(\"%s:put length=%d, dec_len=%d\", __func__, in_len,\n // dec_len);\n#else\n lhdcPutData(in_buf, in_len);\n#endif\n uint32_t loop_cnt = 0;\n do {\n // TRACE_A2DP_DECODER_I(\"loop %d , dec_start %p, dec_sum %d,\n // lhdc_decode_temp %d\", loop_cnt, dec_start, dec_sum, lhdc_decode_temp);\n lhdc_out_len = lhdcDecodeProcess(dec_start + dec_sum + lhdc_decode_temp);\n if (lhdc_out_len > 0) {\n lhdc_decode_temp += lhdc_out_len;\n loop_cnt++;\n } else {\n // TRACE_A2DP_DECODER_I(\"decodeProcess error!!! ret=%d\", lhdc_out_len);\n break;\n }\n } while (lhdc_decode_temp < dec_len && lhdc_decode_temp > 0);\n\n // TRACE_A2DP_DECODER_I(\"lhdc_cp_decode seq:%d len:%d err:%d\",\n // p_in_info->sequenceNumber,\n // dec_len - dec_sum,\n // lhdc_out_len);\n\n // TRACE_A2DP_DECODER_I(\"%s:decode loop run times=%d, lhdc_decode_temp=%d\",\n // __func__, loop_cnt, lhdc_decode_temp);\n dec_sum += lhdc_decode_temp;\n\n if ((lhdc_decode_temp % LHDC_DECODED_FRAME_SIZE)) {\n TRACE_A2DP_DECODER_I(\"error!!! dec_sum: %d decode_temp: %d\", dec_sum,\n lhdc_decode_temp);\n return -1;\n }\n\n ret = a2dp_cp_consume_in_frame();\n\n if (ret != 0) {\n TRACE_A2DP_DECODER_I(\"%s: a2dp_cp_consume_in_frame() failed: ret=%d\",\n __func__, ret);\n }\n ASSERT(ret == 0, \"%s: a2dp_cp_consume_in_frame() failed: ret=%d\", __func__,\n ret);\n\n memcpy(&p_out_info->in_info, p_in_info, sizeof(*p_in_info));\n p_out_info->decoded_frames++;\n p_out_info->frame_samples = A2DP_LHDC_OUTPUT_FRAME_SAMPLES;\n p_out_info->frame_idx = a2dp_cp_get_in_frame_index();\n }\n\n if ((dec_sum % LHDC_DECODED_FRAME_SIZE)) {\n TRACE_A2DP_DECODER_I(\"error!!! dec_sum:%d != dec_len:%d\", dec_sum,\n dec_len);\n ASSERT(0, \"%s\", __func__);\n }\n\n p_out_info->pcm_len += dec_sum;\n\n if (out_len <= sizeof(*p_out_info) + p_out_info->pcm_len) {\n ret = a2dp_cp_consume_emtpy_out_frame();\n ASSERT(ret == 0, \"%s: a2dp_cp_consume_emtpy_out_frame() failed: ret=%d\",\n __func__, ret);\n }\n\n return 0;\n}\n#endif\n\n#if 1\nstatic int a2dp_audio_lhdc_list_checker(void) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_lhdc_decoder_frame_t *lhdc_decoder_frame_p = NULL;\n int cnt = 0;\n\n do {\n lhdc_decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_lhdc_frame_malloc(\n LHDC_READBUF_SIZE);\n if (lhdc_decoder_frame_p) {\n a2dp_audio_list_append(list, lhdc_decoder_frame_p);\n }\n cnt++;\n } while (lhdc_decoder_frame_p && cnt < LHDC_MTU_LIMITER);\n\n do {\n node = a2dp_audio_list_begin(list);\n if (node) {\n lhdc_decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, lhdc_decoder_frame_p);\n }\n } while (node);\n\n TRACE_A2DP_DECODER_I(\"%s cnt:%d list:%d\", __func__, cnt,\n a2dp_audio_list_length(list));\n\n return 0;\n}\n#endif\n\nint a2dp_audio_lhdc_mcu_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_lhdc_decoder_frame_t *lhdc_decoder_frame_p = NULL;\n\n bool cache_underflow = false;\n int output_byte = 0;\n\n uint32_t lhdc_out_len = 0;\n\n node = a2dp_audio_list_begin(list);\n if (!node) {\n TRACE_A2DP_DECODER_I(\"lhdc_decode cache underflow\");\n cache_underflow = true;\n goto exit;\n } else {\n lhdc_decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n#if defined(A2DP_LHDC_V3)\n lhdcPutData(lhdc_decoder_frame_p->buffer, lhdc_decoder_frame_p->buffer_len);\n#else\n lhdcPutData(lhdc_decoder_frame_p->buffer, lhdc_decoder_frame_p->buffer_len);\n#endif\n do {\n lhdc_out_len = lhdcDecodeProcess(buffer + output_byte);\n if (lhdc_out_len > 0) {\n output_byte += lhdc_out_len;\n } else {\n break;\n }\n } while (output_byte < (int)buffer_bytes && output_byte > 0);\n\n if (output_byte != (int)buffer_bytes) {\n TRACE_A2DP_DECODER_I(\"[warning] lhdc_decode_frame output_byte:%d \"\n \"lhdc_out_len:%d buffer_bytes:%d\",\n output_byte, lhdc_out_len, buffer_bytes);\n TRACE_A2DP_DECODER_I(\"[warning] lhdc_decode_frame frame_len:%d rtp \"\n \"seq:%d timestamp:%d decoder_frame:%d/%d \",\n lhdc_decoder_frame_p->buffer_len,\n lhdc_decoder_frame_p->sequenceNumber,\n lhdc_decoder_frame_p->timestamp,\n lhdc_decoder_frame_p->curSubSequenceNumber,\n lhdc_decoder_frame_p->totalSubSequenceNumber);\n output_byte = buffer_bytes;\n int32_t dump_byte = lhdc_decoder_frame_p->buffer_len;\n int32_t dump_offset = 0;\n while (1) {\n uint32_t dump_byte_output = 0;\n dump_byte_output = dump_byte > 32 ? 32 : dump_byte;\n DUMP8(\"%02x \", lhdc_decoder_frame_p->buffer + dump_offset,\n dump_byte_output);\n dump_offset += dump_byte_output;\n dump_byte -= dump_byte_output;\n if (dump_byte <= 0) {\n break;\n }\n }\n ASSERT(0, \"%s\", __func__);\n }\n\n a2dp_audio_lhdc_lastframe_info.sequenceNumber =\n lhdc_decoder_frame_p->sequenceNumber;\n a2dp_audio_lhdc_lastframe_info.timestamp = lhdc_decoder_frame_p->timestamp;\n a2dp_audio_lhdc_lastframe_info.curSubSequenceNumber =\n lhdc_decoder_frame_p->curSubSequenceNumber;\n a2dp_audio_lhdc_lastframe_info.totalSubSequenceNumber =\n lhdc_decoder_frame_p->totalSubSequenceNumber;\n a2dp_audio_lhdc_lastframe_info.frame_samples =\n A2DP_LHDC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_lhdc_lastframe_info.decoded_frames++;\n a2dp_audio_lhdc_lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) - 1;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_lhdc_lastframe_info);\n a2dp_audio_list_remove(list, lhdc_decoder_frame_p);\n }\nexit:\n if (cache_underflow) {\n reset_lhdc_assmeble_packet();\n a2dp_audio_lhdc_lastframe_info.undecode_frames = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_lhdc_lastframe_info);\n output_byte = A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n return output_byte;\n}\n\nint a2dp_audio_lhdc_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n#ifdef A2DP_CP_ACCEL\n return a2dp_cp_lhdc_mcu_decode(buffer, buffer_bytes);\n#else\n return a2dp_audio_lhdc_mcu_decode_frame(buffer, buffer_bytes);\n#endif\n}\n\nint a2dp_audio_lhdc_preparse_packet(btif_media_header_t *header,\n uint8_t *buffer, uint32_t buffer_bytes) {\n a2dp_audio_lhdc_lastframe_info.sequenceNumber = header->sequenceNumber;\n a2dp_audio_lhdc_lastframe_info.timestamp = header->timestamp;\n a2dp_audio_lhdc_lastframe_info.curSubSequenceNumber = 0;\n a2dp_audio_lhdc_lastframe_info.totalSubSequenceNumber = 0;\n a2dp_audio_lhdc_lastframe_info.frame_samples = A2DP_LHDC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_lhdc_lastframe_info.list_samples = A2DP_LHDC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_lhdc_lastframe_info.decoded_frames = 0;\n a2dp_audio_lhdc_lastframe_info.undecode_frames = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_lhdc_lastframe_info);\n\n TRACE_A2DP_DECODER_I(\"%s seq:%d timestamp:%08x\", __func__,\n header->sequenceNumber, header->timestamp);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nvoid a2dp_audio_lhdc_free(void *packet) {\n a2dp_audio_lhdc_decoder_frame_t *decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)packet;\n a2dp_audio_heap_free(decoder_frame_p->buffer);\n a2dp_audio_heap_free(decoder_frame_p);\n}\n\nint a2dp_audio_lhdc_store_packet(btif_media_header_t *header, uint8_t *buffer,\n uint32_t buffer_bytes) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int nRet = A2DP_DECODER_NO_ERROR;\n uint32_t frame_num = 0;\n uint32_t frame_cnt = 0;\n uint32_t lSize = 0;\n uint8_t *lPTR = NULL;\n lhdc_frame_Info_t lhdc_frame_Info;\n uint32_t ptr_offset = 0;\n\n if ((frame_num = assemble_lhdc_packet(buffer, buffer_bytes, &lPTR, &lSize)) >\n 0) {\n if (lPTR != NULL && lSize != 0) {\n ptr_offset = 0;\n // TRACE_A2DP_DECODER_I(\"%s: There are %d frames in packet\", __func__,\n // frame_num);\n while (parse_lhdc_info(lPTR + ptr_offset, &lhdc_frame_Info) == 0 &&\n ptr_offset < lSize && frame_cnt < frame_num) {\n a2dp_audio_lhdc_decoder_frame_t *decoder_frame_p = NULL;\n if (!lhdc_frame_Info.frame_len) {\n DUMP8(\"%02x \", lPTR + ptr_offset, 32);\n ASSERT(0,\n \"lhdc_frame_Info error frame_len:%d offset:%d ptr:%08x/%08x\",\n lhdc_frame_Info.frame_len, ptr_offset, (uint32_t)buffer,\n (uint32_t)lPTR);\n }\n ASSERT(lhdc_frame_Info.frame_len <= (lSize - ptr_offset),\n \"%s frame_len:%d ptr_offset:%d buffer_bytes:%d\", __func__,\n lhdc_frame_Info.frame_len, ptr_offset, lSize);\n uint32_t list_length = a2dp_audio_list_length(list);\n if (list_length < lhdc_mtu_limiter) {\n decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_lhdc_frame_malloc(\n lhdc_frame_Info.frame_len);\n } else {\n nRet = A2DP_DECODER_MTU_LIMTER_ERROR;\n break;\n }\n frame_cnt++;\n\n decoder_frame_p->sequenceNumber = header->sequenceNumber;\n decoder_frame_p->timestamp = header->timestamp;\n decoder_frame_p->curSubSequenceNumber = frame_cnt;\n decoder_frame_p->totalSubSequenceNumber = frame_num;\n memcpy(decoder_frame_p->buffer, lPTR + ptr_offset,\n lhdc_frame_Info.frame_len);\n decoder_frame_p->buffer_len = lhdc_frame_Info.frame_len;\n a2dp_audio_list_append(list, decoder_frame_p);\n\n ptr_offset += lhdc_frame_Info.frame_len;\n#if 0\n TRACE_A2DP_DECODER_I(\"lhdc_store_packet save seq:%d timestamp:%d len:%d lSize:%d list_length:%d frame_len:%d Split:%d/%d\",\n header->sequenceNumber,\n header->timestamp,\n buffer_bytes,\n lSize,\n list_length,\n lhdc_frame_Info.frame_len,\n lhdc_frame_Info.isSplit,\n lhdc_frame_Info.isLeft);\n#endif\n }\n }\n } else {\n // TRACE_A2DP_DECODER_I(\"lhdc_store_packet skip seq:%d timestamp:%d\n // len:%d l:%d\", header->sequenceNumber,\n // header->timestamp,buffer_bytes, lSize);\n }\n\n return nRet;\n}\n\nint a2dp_audio_lhdc_discards_packet(uint32_t packets) {\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n\n int nRet = a2dp_audio_context_p->audio_decoder\n .audio_decoder_synchronize_dest_packet_mut(\n a2dp_audio_context_p->dest_packet_mut);\n\n reset_lhdc_assmeble_packet();\n\n#if defined(A2DP_LHDC_LARC)\n lhdc_drop_frame = 0;\n#endif\n return nRet;\n}\n\nstatic int a2dp_audio_lhdc_headframe_info_get(\n A2DP_AUDIO_HEADFRAME_INFO_T *headframe_info) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_lhdc_decoder_frame_t *decoder_frame_p = NULL;\n\n if (a2dp_audio_list_length(list)) {\n node = a2dp_audio_list_begin(list);\n decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n headframe_info->sequenceNumber = decoder_frame_p->sequenceNumber;\n headframe_info->timestamp = decoder_frame_p->timestamp;\n headframe_info->curSubSequenceNumber = 0;\n headframe_info->totalSubSequenceNumber = 0;\n } else {\n memset(headframe_info, 0, sizeof(A2DP_AUDIO_HEADFRAME_INFO_T));\n }\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_lhdc_info_get(void *info) { return A2DP_DECODER_NO_ERROR; }\n\nextern uint32_t __lhdc_license_start[];\n\nint a2dp_audio_lhdc_init(A2DP_AUDIO_OUTPUT_CONFIG_T *config, void *context) {\n TRACE_A2DP_DECODER_I(\"%s %s ch:%d freq:%d bits:%d\", __func__,\n getVersionCode(), config->num_channels,\n config->sample_rate, config->bits_depth);\n\n uint8_t lhdc_license_key = 0;\n uint8_t *lhdc_license_data = (uint8_t *)__lhdc_license_start + 0x98;\n TRACE(5, \"lhdc_license_data:%p, lhdc license %02x %02x %02x %02x\",\n lhdc_license_data, lhdc_license_data[0], lhdc_license_data[1],\n lhdc_license_data[2], lhdc_license_data[3]);\n\n a2dp_audio_context_p = (A2DP_AUDIO_CONTEXT_T *)context;\n\n memset(&a2dp_audio_lhdc_lastframe_info, 0,\n sizeof(A2DP_AUDIO_DECODER_LASTFRAME_INFO_T));\n memcpy(&a2dp_audio_lhdc_output_config, config,\n sizeof(A2DP_AUDIO_OUTPUT_CONFIG_T));\n a2dp_audio_lhdc_lastframe_info.stream_info = a2dp_audio_lhdc_output_config;\n a2dp_audio_lhdc_lastframe_info.frame_samples = A2DP_LHDC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_lhdc_lastframe_info.list_samples = A2DP_LHDC_OUTPUT_FRAME_SAMPLES;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_lhdc_lastframe_info);\n\n lhdc_license_key =\n lhdcSetLicenseKeyTable(lhdc_license_data, bes_bt_local_info_get);\n\n TRACE_A2DP_DECODER_I(\"lhdc_license_key:%d\", lhdc_license_key);\n\n#if defined(A2DP_LHDC_V3)\n lhdcInit(config->bits_depth, config->sample_rate, 0, VERSION_3);\n#else\n lhdcInit(config->bits_depth, config->sample_rate, 0, VERSION_2);\n#endif\n initial_lhdc_assemble_packet(false);\n\n#ifdef A2DP_CP_ACCEL\n int ret;\n ret = a2dp_cp_init(a2dp_cp_lhdc_cp_decode, CP_PROC_DELAY_2_FRAMES);\n ASSERT(ret == 0, \"%s: a2dp_cp_init() failed: ret=%d\", __func__, ret);\n#endif\n a2dp_audio_lhdc_list_checker();\n\n#if defined(A2DP_LHDC_LARC)\n lhdc_last_time = 0;\n lhdc_drop_frame = 0;\n#endif\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_lhdc_deinit(void) {\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_deinit();\n#endif\n lhdcDestroy();\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_lhdc_synchronize_packet(A2DP_AUDIO_SYNCFRAME_INFO_T *sync_info,\n uint32_t mask) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n int list_len;\n a2dp_audio_lhdc_decoder_frame_t *lhdc_decoder_frame;\n\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n\n list_len = a2dp_audio_list_length(list);\n\n for (uint16_t i = 0; i < list_len; i++) {\n node = a2dp_audio_list_begin(list);\n lhdc_decoder_frame =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n if (A2DP_AUDIO_SYNCFRAME_CHK(lhdc_decoder_frame->sequenceNumber ==\n sync_info->sequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_SEQ, mask) &&\n A2DP_AUDIO_SYNCFRAME_CHK(lhdc_decoder_frame->curSubSequenceNumber ==\n sync_info->curSubSequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_CURRSUBSEQ, mask) &&\n A2DP_AUDIO_SYNCFRAME_CHK(lhdc_decoder_frame->totalSubSequenceNumber ==\n sync_info->totalSubSequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_TOTALSUBSEQ, mask)) {\n nRet = A2DP_DECODER_NO_ERROR;\n break;\n }\n a2dp_audio_list_remove(list, lhdc_decoder_frame);\n }\n\n node = a2dp_audio_list_begin(list);\n if (node) {\n lhdc_decoder_frame =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n TRACE_A2DP_DECODER_I(\"%s nRet:%d SEQ:%d timestamp:%d %d/%d\", __func__, nRet,\n lhdc_decoder_frame->sequenceNumber,\n lhdc_decoder_frame->timestamp,\n lhdc_decoder_frame->curSubSequenceNumber,\n lhdc_decoder_frame->totalSubSequenceNumber);\n } else {\n TRACE_A2DP_DECODER_I(\"%s nRet:%d\", __func__, nRet);\n }\n\n return nRet;\n}\n\nint a2dp_audio_lhdc_synchronize_dest_packet_mut(uint16_t packet_mut) {\n list_node_t *node = NULL;\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_lhdc_decoder_frame_t *lhdc_decoder_frame_p = NULL;\n\n list_len = a2dp_audio_list_length(list);\n if (list_len > packet_mut) {\n do {\n node = a2dp_audio_list_begin(list);\n lhdc_decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, lhdc_decoder_frame_p);\n } while (a2dp_audio_list_length(list) > packet_mut);\n }\n\n TRACE_A2DP_DECODER_I(\"%s list:%d\", __func__, a2dp_audio_list_length(list));\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_lhdc_convert_list_to_samples(uint32_t *samples) {\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n\n list_len = a2dp_audio_list_length(list);\n\n *samples = A2DP_LHDC_OUTPUT_FRAME_SAMPLES * list_len;\n\n TRACE_A2DP_DECODER_I(\"%s list:%d samples:%d\", __func__, list_len, *samples);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_lhdc_discards_samples(uint32_t samples) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_lhdc_decoder_frame_t *lhdc_decoder_frame_p = NULL;\n list_node_t *node = NULL;\n int need_remove_list = 0;\n uint32_t list_samples = 0;\n\n ASSERT(!(samples % A2DP_LHDC_OUTPUT_FRAME_SAMPLES), \"%s samples err:%d\",\n __func__, samples);\n\n a2dp_audio_lhdc_convert_list_to_samples(&list_samples);\n if (list_samples >= samples) {\n need_remove_list = samples / A2DP_LHDC_OUTPUT_FRAME_SAMPLES;\n for (int i = 0; i < need_remove_list; i++) {\n node = a2dp_audio_list_begin(list);\n lhdc_decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, lhdc_decoder_frame_p);\n }\n nRet = A2DP_DECODER_NO_ERROR;\n\n node = a2dp_audio_list_begin(list);\n lhdc_decoder_frame_p =\n (a2dp_audio_lhdc_decoder_frame_t *)a2dp_audio_list_node(node);\n TRACE_A2DP_DECODER_I(\"%s discard %d sample cur seq:%d\", __func__, samples,\n lhdc_decoder_frame_p->sequenceNumber);\n }\n\n return nRet;\n}\n\nA2DP_AUDIO_DECODER_T a2dp_audio_lhdc_decoder_config = {\n {96000, 2, 24},\n 1,\n a2dp_audio_lhdc_init,\n a2dp_audio_lhdc_deinit,\n a2dp_audio_lhdc_decode_frame,\n a2dp_audio_lhdc_preparse_packet,\n a2dp_audio_lhdc_store_packet,\n a2dp_audio_lhdc_discards_packet,\n a2dp_audio_lhdc_synchronize_packet,\n a2dp_audio_lhdc_synchronize_dest_packet_mut,\n a2dp_audio_lhdc_convert_list_to_samples,\n a2dp_audio_lhdc_discards_samples,\n a2dp_audio_lhdc_headframe_info_get,\n a2dp_audio_lhdc_info_get,\n a2dp_audio_lhdc_free,\n};\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_sbc.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#define __STDC_LIMIT_MACROS\n#include \n#include \"a2dp_decoder_internal.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"codec_sbc.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"heap_api.h\"\n#include \"plat_types.h\"\n#include \n\n#ifndef SBC_MTU_LIMITER\n#define SBC_MTU_LIMITER (250) /*must <= 332*/\n#endif\n#define SBC_PCMLEN_DEFAULT (512)\n\n#define SBC_LIST_SAMPLES (128)\n\nstatic A2DP_AUDIO_CONTEXT_T *a2dp_audio_context_p = NULL;\nextern A2DP_AUDIO_DECODER_T a2dp_audio_sbc_decoder_config;\n\ntypedef struct {\n btif_sbc_decoder_t *sbc_decoder;\n btif_sbc_pcm_data_t *pcm_data;\n} a2dp_audio_sbc_decoder_t;\n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n uint8_t *sbc_buffer;\n uint32_t sbc_buffer_len;\n} a2dp_audio_sbc_decoder_frame_t;\n\nstatic a2dp_audio_sbc_decoder_t a2dp_audio_sbc_decoder;\nstatic btif_sbc_decoder_t *a2dp_audio_sbc_decoder_preparse = NULL;\n\nstatic A2DP_AUDIO_DECODER_LASTFRAME_INFO_T a2dp_audio_sbc_lastframe_info;\n\nstatic uint16_t sbc_mtu_limiter = SBC_MTU_LIMITER;\n\nstatic btif_media_header_t sbc_decoder_last_valid_frame = {\n 0,\n};\nstatic bool sbc_decoder_last_valid_frame_ready = false;\nstatic bool sbc_chnl_mode_mono = false;\n\nstatic int a2dp_audio_sbc_header_parser_init(void);\n\nstatic void *a2dp_audio_sbc_subframe_malloc(uint32_t sbc_len) {\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame_p = NULL;\n uint8_t *sbc_buffer = NULL;\n\n sbc_buffer = (uint8_t *)a2dp_audio_heap_malloc(sbc_len);\n sbc_decoder_frame_p =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_heap_malloc(\n sizeof(a2dp_audio_sbc_decoder_frame_t));\n sbc_decoder_frame_p->sbc_buffer = sbc_buffer;\n sbc_decoder_frame_p->sbc_buffer_len = sbc_len;\n return (void *)sbc_decoder_frame_p;\n}\n\nstatic void a2dp_audio_sbc_subframe_free(void *packet) {\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame_p =\n (a2dp_audio_sbc_decoder_frame_t *)packet;\n a2dp_audio_heap_free(sbc_decoder_frame_p->sbc_buffer);\n a2dp_audio_heap_free(sbc_decoder_frame_p);\n}\n\nstatic void sbc_codec_init(void) {\n btif_sbc_init_decoder(a2dp_audio_sbc_decoder.sbc_decoder);\n a2dp_audio_sbc_decoder.sbc_decoder->maxPcmLen = SBC_PCMLEN_DEFAULT;\n a2dp_audio_sbc_decoder.pcm_data->data = NULL;\n a2dp_audio_sbc_decoder.pcm_data->dataLen = 0;\n}\n\n#ifdef A2DP_CP_ACCEL\nstruct A2DP_CP_SBC_IN_FRM_INFO_T {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint16_t curSubSequenceNumber;\n uint16_t totalSubSequenceNumber;\n};\n\nstruct A2DP_CP_SBC_OUT_FRM_INFO_T {\n struct A2DP_CP_SBC_IN_FRM_INFO_T in_info;\n uint16_t frame_samples;\n uint16_t decoded_frames;\n uint16_t frame_idx;\n uint16_t pcm_len;\n};\n\nstatic bool cp_codec_reset;\nextern \"C\" uint32_t get_in_cp_frame_cnt(void);\nextern \"C\" unsigned int set_cp_reset_flag(uint8_t evt);\n\nint a2dp_cp_sbc_cp_decode(void);\n\nextern uint32_t app_bt_stream_get_dma_buffer_samples(void);\n\nstatic int TEXT_SBC_LOC a2dp_cp_sbc_after_cache_underflow(void) {\n#ifdef A2DP_CP_ACCEL\n cp_codec_reset = true;\n#endif\n return 0;\n}\n\nstatic int a2dp_cp_sbc_mcu_decode(uint8_t *buffer, uint32_t buffer_bytes) {\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame = NULL;\n list_node_t *node = NULL;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int ret, dec_ret;\n struct A2DP_CP_SBC_IN_FRM_INFO_T in_info;\n struct A2DP_CP_SBC_OUT_FRM_INFO_T *p_out_info = NULL;\n uint8_t *out = NULL;\n uint32_t out_len;\n uint32_t out_frame_len;\n uint32_t cp_buffer_frames_max = 0;\n uint32_t check_sum = 0;\n\n cp_buffer_frames_max = app_bt_stream_get_dma_buffer_samples() / 2;\n if (cp_buffer_frames_max % (a2dp_audio_sbc_lastframe_info.frame_samples)) {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (a2dp_audio_sbc_lastframe_info.frame_samples) +\n 1;\n } else {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (a2dp_audio_sbc_lastframe_info.frame_samples);\n }\n\n out_frame_len = sizeof(*p_out_info) + buffer_bytes;\n ret = a2dp_cp_decoder_init(out_frame_len, cp_buffer_frames_max * 2);\n if (ret) {\n TRACE_A2DP_DECODER_W(\"[SBC][INIT] cp_decoder_init() failed: ret=%d\", ret);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n while ((node = a2dp_audio_list_begin(list)) != NULL) {\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n\n in_info.sequenceNumber = sbc_decoder_frame->sequenceNumber;\n in_info.timestamp = sbc_decoder_frame->timestamp;\n in_info.curSubSequenceNumber = sbc_decoder_frame->curSubSequenceNumber;\n in_info.totalSubSequenceNumber = sbc_decoder_frame->totalSubSequenceNumber;\n\n ret = a2dp_cp_put_in_frame(&in_info, sizeof(in_info),\n sbc_decoder_frame->sbc_buffer,\n sbc_decoder_frame->sbc_buffer_len);\n if (ret) {\n TRACE_A2DP_DECODER_D(\"[MCU][SBC] piff !!!!!!ret: %d \", ret);\n break;\n }\n check_sum = a2dp_audio_decoder_internal_check_sum_generate(\n sbc_decoder_frame->sbc_buffer, sbc_decoder_frame->sbc_buffer_len);\n a2dp_audio_list_remove(list, sbc_decoder_frame);\n }\n\n ret = a2dp_cp_get_full_out_frame((void **)&out, &out_len);\n if (ret) {\n if (!get_in_cp_frame_cnt()) {\n TRACE_A2DP_DECODER_I(\"[MCU][SBC] cp cache underflow list:%d in_cp:%d\",\n a2dp_audio_list_length(list), get_in_cp_frame_cnt());\n return A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n if (!a2dp_audio_sysfreq_boost_running()) {\n a2dp_audio_sysfreq_boost_start(1);\n }\n osDelay(8);\n ret = a2dp_cp_get_full_out_frame((void **)&out, &out_len);\n if (ret) {\n TRACE_A2DP_DECODER_I(\"[MCU][SBC] cp cache underflow list:%d in_cp:%d\",\n a2dp_audio_list_length(list), get_in_cp_frame_cnt());\n a2dp_cp_sbc_after_cache_underflow();\n return A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n }\n\n if (out_len == 0) {\n TRACE_A2DP_DECODER_I(\"[MCU][SBC] olz!!!%d \", __LINE__);\n memset(buffer, 0, buffer_bytes);\n a2dp_cp_consume_full_out_frame();\n return A2DP_DECODER_NO_ERROR;\n }\n if (out_len != out_frame_len) {\n TRACE_A2DP_DECODER_I(\"[MCU][SBC] Bad out len %u (should be %u)\", out_len,\n out_frame_len);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n p_out_info = (struct A2DP_CP_SBC_OUT_FRM_INFO_T *)out;\n if (p_out_info->pcm_len) {\n a2dp_audio_sbc_lastframe_info.sequenceNumber =\n p_out_info->in_info.sequenceNumber;\n a2dp_audio_sbc_lastframe_info.timestamp = p_out_info->in_info.timestamp;\n a2dp_audio_sbc_lastframe_info.curSubSequenceNumber =\n p_out_info->in_info.curSubSequenceNumber;\n a2dp_audio_sbc_lastframe_info.totalSubSequenceNumber =\n p_out_info->in_info.totalSubSequenceNumber;\n a2dp_audio_sbc_lastframe_info.frame_samples = p_out_info->frame_samples;\n a2dp_audio_sbc_lastframe_info.decoded_frames += p_out_info->decoded_frames;\n a2dp_audio_sbc_lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) +\n a2dp_cp_get_in_frame_cnt_by_index(p_out_info->frame_idx) - 1;\n a2dp_audio_sbc_lastframe_info.check_sum =\n check_sum ? check_sum : a2dp_audio_sbc_lastframe_info.check_sum;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_sbc_lastframe_info);\n }\n\n if (p_out_info->pcm_len == buffer_bytes) {\n memcpy(buffer, p_out_info + 1, p_out_info->pcm_len);\n dec_ret = A2DP_DECODER_NO_ERROR;\n } else {\n TRACE_A2DP_DECODER_I(\"[MCU][SBC] line:%d cp decoder error !!!!!!\",\n __LINE__);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n\n ret = a2dp_cp_consume_full_out_frame();\n if (ret) {\n TRACE_A2DP_DECODER_I(\"[MCU][SBC] cp_consume_full_out_frame failed: ret=%d\",\n ret);\n set_cp_reset_flag(true);\n return A2DP_DECODER_DECODE_ERROR;\n }\n return dec_ret;\n}\n\n#ifdef __CP_EXCEPTION_TEST__\nstatic bool _cp_assert = false;\nint cp_assert_sbc(void) {\n _cp_assert = true;\n return 0;\n}\n#endif\n\nTEXT_SBC_LOC\nint a2dp_cp_sbc_cp_decode(void) {\n int ret = 0;\n enum CP_EMPTY_OUT_FRM_T out_frm_st;\n uint8_t *out = NULL;\n uint32_t out_len = 0;\n uint8_t *dec_start = NULL;\n uint32_t dec_len = 0;\n struct A2DP_CP_SBC_IN_FRM_INFO_T *p_in_info = NULL;\n struct A2DP_CP_SBC_OUT_FRM_INFO_T *p_out_info = NULL;\n uint8_t *in_buf = NULL;\n uint32_t in_len = 0;\n uint16_t bytes_parsed = 0;\n float sbc_subbands_gain[8] = {1, 1, 1, 1, 1, 1, 1, 1};\n btif_sbc_decoder_t *sbc_decoder = NULL;\n btif_sbc_pcm_data_t *pcm_data = NULL;\n bt_status_t decoder_err = 0;\n int error = 0;\n\n if (cp_codec_reset) {\n cp_codec_reset = false;\n sbc_codec_init();\n }\n\n#ifdef __CP_EXCEPTION_TEST__\n if (_cp_assert) {\n _cp_assert = false;\n *(int *)0 = 1;\n // ASSERT_A2DP_DECODER(0, \"ASSERT_A2DP_DECODER %s %d\", __func__, __LINE__);\n }\n#endif\n\n sbc_decoder = a2dp_audio_sbc_decoder.sbc_decoder;\n pcm_data = a2dp_audio_sbc_decoder.pcm_data;\n\n out_frm_st = a2dp_cp_get_emtpy_out_frame((void **)&out, &out_len);\n if (out_frm_st != CP_EMPTY_OUT_FRM_OK &&\n out_frm_st != CP_EMPTY_OUT_FRM_WORKING) {\n return 1;\n }\n\n ASSERT_A2DP_DECODER(out_len > sizeof(*p_out_info),\n \"[CP][SBC] Bad out_len %u (should > %u)\", out_len,\n sizeof(*p_out_info));\n\n p_out_info = (struct A2DP_CP_SBC_OUT_FRM_INFO_T *)out;\n if (out_frm_st == CP_EMPTY_OUT_FRM_OK) {\n p_out_info->pcm_len = 0;\n p_out_info->decoded_frames = 0;\n }\n ASSERT_A2DP_DECODER(out_len > sizeof(*p_out_info) + p_out_info->pcm_len,\n \"[CP][SBC] Bad out_len %u (should > %u + %u)\", out_len,\n sizeof(*p_out_info), p_out_info->pcm_len);\n\n dec_start = (uint8_t *)(p_out_info + 1) + p_out_info->pcm_len;\n dec_len = out_len - (dec_start - (uint8_t *)out);\n\n pcm_data->data = dec_start;\n pcm_data->dataLen = 0;\n error = 0;\n\n while (pcm_data->dataLen < dec_len && error == 0) {\n ret = a2dp_cp_get_in_frame((void **)&in_buf, &in_len);\n if (ret) {\n p_out_info->pcm_len += pcm_data->dataLen;\n return 4;\n }\n ASSERT_A2DP_DECODER(in_len > sizeof(*p_in_info),\n \"%s: Bad in_len %u (should > %u)\", __func__, in_len,\n sizeof(*p_in_info));\n\n p_in_info = (struct A2DP_CP_SBC_IN_FRM_INFO_T *)in_buf;\n in_buf += sizeof(*p_in_info);\n in_len -= sizeof(*p_in_info);\n\n decoder_err =\n btif_sbc_decode_frames(sbc_decoder, in_buf, in_len, &bytes_parsed,\n pcm_data, dec_len, sbc_subbands_gain);\n switch (decoder_err) {\n case BT_STS_SUCCESS:\n case BT_STS_CONTINUE:\n break;\n case BT_STS_NO_RESOURCES:\n error = 1;\n ASSERT_A2DP_DECODER(0, \"sbc_decode BT_STS_NO_RESOURCES pcm has no more \"\n \"buffer, i think can't reach here\");\n break;\n case BT_STS_FAILED:\n default:\n error = 1;\n sbc_codec_init();\n break;\n }\n\n memcpy(&p_out_info->in_info, p_in_info, sizeof(*p_in_info));\n p_out_info->decoded_frames++;\n p_out_info->frame_samples = sbc_decoder->maxPcmLen / 4;\n p_out_info->frame_idx = a2dp_cp_get_in_frame_index();\n\n ret = a2dp_cp_consume_in_frame();\n ASSERT_A2DP_DECODER(ret == 0,\n \"%s: a2dp_cp_consume_in_frame() failed: ret=%d\",\n __func__, ret);\n }\n\n p_out_info->pcm_len += pcm_data->dataLen;\n\n if (error || out_len <= sizeof(*p_out_info) + p_out_info->pcm_len) {\n ret = a2dp_cp_consume_emtpy_out_frame();\n ASSERT_A2DP_DECODER(ret == 0,\n \"%s: a2dp_cp_consume_emtpy_out_frame() failed: ret=%d\",\n __func__, ret);\n }\n\n return error;\n}\n#endif\n\nstatic int a2dp_audio_sbc_list_checker(void) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame = NULL;\n int cnt = 0;\n\n do {\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_sbc_subframe_malloc(\n SBC_LIST_SAMPLES);\n if (sbc_decoder_frame) {\n a2dp_audio_list_append(list, sbc_decoder_frame);\n }\n cnt++;\n } while (sbc_decoder_frame && cnt < SBC_MTU_LIMITER);\n\n do {\n node = a2dp_audio_list_begin(list);\n if (node) {\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, sbc_decoder_frame);\n }\n } while (node);\n\n TRACE_A2DP_DECODER_I(\"[SBC][INIT] cnt:%d list:%d\", cnt,\n a2dp_audio_list_length(list));\n\n return 0;\n}\n\nint a2dp_audio_sbc_init(A2DP_AUDIO_OUTPUT_CONFIG_T *config, void *context) {\n TRACE_A2DP_DECODER_I(\"[SBC][INIT]\");\n\n a2dp_audio_context_p = (A2DP_AUDIO_CONTEXT_T *)context;\n\n a2dp_audio_sbc_header_parser_init();\n memset(&a2dp_audio_sbc_lastframe_info, 0,\n sizeof(A2DP_AUDIO_DECODER_LASTFRAME_INFO_T));\n a2dp_audio_sbc_lastframe_info.stream_info = *config;\n a2dp_audio_sbc_lastframe_info.frame_samples = SBC_LIST_SAMPLES;\n a2dp_audio_sbc_lastframe_info.list_samples = SBC_LIST_SAMPLES;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_sbc_lastframe_info);\n\n ASSERT_A2DP_DECODER(a2dp_audio_context_p->dest_packet_mut < SBC_MTU_LIMITER,\n \"%s MTU OVERFLOW:%u/%u\", __func__,\n a2dp_audio_context_p->dest_packet_mut, SBC_MTU_LIMITER);\n\n a2dp_audio_sbc_decoder.sbc_decoder =\n (btif_sbc_decoder_t *)a2dp_audio_heap_malloc(sizeof(btif_sbc_decoder_t));\n a2dp_audio_sbc_decoder.pcm_data =\n (btif_sbc_pcm_data_t *)a2dp_audio_heap_malloc(\n sizeof(btif_sbc_pcm_data_t));\n a2dp_audio_sbc_decoder_preparse =\n (btif_sbc_decoder_t *)a2dp_audio_heap_malloc(sizeof(btif_sbc_decoder_t));\n#ifdef A2DP_CP_ACCEL\n int ret;\n cp_codec_reset = true;\n ret = a2dp_cp_init(a2dp_cp_sbc_cp_decode, CP_PROC_DELAY_2_FRAMES);\n ASSERT_A2DP_DECODER(ret == 0, \"%s: a2dp_cp_init() failed: ret=%d\", __func__,\n ret);\n#else\n sbc_codec_init();\n#endif\n a2dp_audio_sbc_list_checker();\n sbc_chnl_mode_mono = false;\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_sbc_deinit(void) {\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_deinit();\n#endif\n a2dp_audio_heap_free(a2dp_audio_sbc_decoder_preparse);\n a2dp_audio_heap_free(a2dp_audio_sbc_decoder.sbc_decoder);\n a2dp_audio_heap_free(a2dp_audio_sbc_decoder.pcm_data);\n\n TRACE_A2DP_DECODER_I(\"[SBC][DEINIT]\");\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_sbc_mcu_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n bt_status_t ret = BT_STS_SUCCESS;\n uint16_t bytes_parsed = 0;\n float sbc_subbands_gain[8] = {1, 1, 1, 1, 1, 1, 1, 1};\n btif_sbc_decoder_t *sbc_decoder = NULL;\n btif_sbc_pcm_data_t *pcm_data = NULL;\n uint16_t frame_pcmbyte = 0;\n uint16_t pcm_output_byte = 0;\n bool cache_underflow = false;\n\n sbc_decoder = a2dp_audio_sbc_decoder.sbc_decoder;\n pcm_data = a2dp_audio_sbc_decoder.pcm_data;\n frame_pcmbyte = sbc_decoder->maxPcmLen;\n\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame = NULL;\n list_node_t *node = NULL;\n\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n\n pcm_data->data = buffer;\n pcm_data->dataLen = 0;\n\n TRACE_A2DP_DECODER_D(\"[MCU][SBC] size:%d\", a2dp_audio_list_length(list));\n\n for (pcm_output_byte = 0; pcm_output_byte < buffer_bytes;\n pcm_output_byte += frame_pcmbyte) {\n node = a2dp_audio_list_begin(list);\n\n if (node) {\n uint32_t lock;\n\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n\n lock = int_lock();\n ret = btif_sbc_decode_frames(sbc_decoder, sbc_decoder_frame->sbc_buffer,\n sbc_decoder_frame->sbc_buffer_len,\n &bytes_parsed, pcm_data, buffer_bytes,\n sbc_subbands_gain);\n int_unlock(lock);\n TRACE_A2DP_DECODER_D(\"[MCU][SBC] seq:%d/%d/%d len:%d ret:%d used:%d\",\n sbc_decoder_frame->curSubSequenceNumber,\n sbc_decoder_frame->totalSubSequenceNumber,\n sbc_decoder_frame->sequenceNumber,\n sbc_decoder_frame->sbc_buffer_len, ret,\n bytes_parsed);\n\n a2dp_audio_sbc_lastframe_info.sequenceNumber =\n sbc_decoder_frame->sequenceNumber;\n a2dp_audio_sbc_lastframe_info.timestamp = sbc_decoder_frame->timestamp;\n a2dp_audio_sbc_lastframe_info.curSubSequenceNumber =\n sbc_decoder_frame->curSubSequenceNumber;\n a2dp_audio_sbc_lastframe_info.totalSubSequenceNumber =\n sbc_decoder_frame->totalSubSequenceNumber;\n a2dp_audio_sbc_lastframe_info.frame_samples = sbc_decoder->maxPcmLen / 4;\n a2dp_audio_sbc_lastframe_info.decoded_frames++;\n a2dp_audio_sbc_lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) - 1;\n a2dp_audio_sbc_lastframe_info.check_sum =\n a2dp_audio_decoder_internal_check_sum_generate(\n sbc_decoder_frame->sbc_buffer, sbc_decoder_frame->sbc_buffer_len);\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_sbc_lastframe_info);\n a2dp_audio_list_remove(list, sbc_decoder_frame);\n switch (ret) {\n case BT_STS_SUCCESS:\n if (pcm_data->dataLen != buffer_bytes) {\n TRACE_A2DP_DECODER_W(\"[MCU][SBC] WARNING pcm buff mismatch %d/%d\",\n pcm_data->dataLen, buffer_bytes);\n }\n if (pcm_data->dataLen == buffer_bytes) {\n if (pcm_output_byte + frame_pcmbyte != buffer_bytes) {\n TRACE_A2DP_DECODER_W(\n \"[MCU][SBC]WARNING loop not break %d/%d frame_pcm:%d\",\n pcm_output_byte, buffer_bytes, frame_pcmbyte);\n goto exit;\n }\n }\n break;\n case BT_STS_CONTINUE:\n continue;\n break;\n case BT_STS_NO_RESOURCES:\n ASSERT_A2DP_DECODER(0, \"sbc_decode BT_STS_NO_RESOURCES pcm has no more \"\n \"buffer, i think can't reach here\");\n break;\n case BT_STS_FAILED:\n default:\n sbc_codec_init();\n goto exit;\n }\n } else {\n TRACE_A2DP_DECODER_W(\"[MCU][SBC] A2DP PACKET CACHE UNDERFLOW\");\n ret = BT_STS_FAILED;\n cache_underflow = true;\n goto exit;\n }\n }\nexit:\n if (cache_underflow) {\n TRACE_A2DP_DECODER_W(\n \"[MCU][SBC] A2DP PACKET CACHE UNDERFLOW need add some process\");\n a2dp_audio_sbc_lastframe_info.undecode_frames = 0;\n a2dp_audio_sbc_lastframe_info.check_sum = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_sbc_lastframe_info);\n ret = A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n return ret;\n}\n\nint a2dp_audio_sbc_decode_frame(uint8_t *buffer, uint32_t buffer_bytes) {\n int nRet = 0;\n if (sbc_chnl_mode_mono) {\n int i = 0;\n int16_t *src = NULL, *dest = NULL;\n#ifdef A2DP_CP_ACCEL\n nRet = a2dp_cp_sbc_mcu_decode(buffer, buffer_bytes / 2);\n#else\n nRet = a2dp_audio_sbc_mcu_decode_frame(buffer, buffer_bytes / 2);\n#endif\n i = buffer_bytes / 2;\n dest = (int16_t *)buffer + i - 1;\n i = i / 2;\n src = (int16_t *)buffer + i - 1;\n for (; i >= 0; i--) {\n *dest = *src;\n dest--;\n *dest = *src;\n dest--;\n src--;\n }\n } else {\n#ifdef A2DP_CP_ACCEL\n nRet = a2dp_cp_sbc_mcu_decode(buffer, buffer_bytes);\n#else\n nRet = a2dp_audio_sbc_mcu_decode_frame(buffer, buffer_bytes);\n#endif\n }\n return nRet;\n}\n\nint a2dp_audio_sbc_preparse_packet(btif_media_header_t *header, uint8_t *buffer,\n uint32_t buffer_bytes) {\n uint16_t bytes_parsed = 0;\n uint32_t frame_num = 0;\n uint8_t *parser_p = buffer;\n\n frame_num = *parser_p;\n parser_p++;\n buffer_bytes--;\n\n // TODO: Remove the following sbc init and decode codes. They might conflict\n // with the calls\n // during CP process. CP process is triggered by audioflinger PCM\n // callback.\n\n if (*parser_p != 0x9c) {\n TRACE_A2DP_DECODER_I(\"[SBC][PRE] ERROR SBC FRAME !!! frame_num:%d\",\n frame_num);\n DUMP8(\"%02x \", parser_p, 12);\n } else {\n btif_sbc_decode_frames_parser(a2dp_audio_sbc_decoder_preparse, parser_p,\n buffer_bytes, &bytes_parsed);\n TRACE_A2DP_DECODER_I(\n \"[SBC][PRE] seq:%d tStmp:%08x smpR:%d ch:%d len:%d\",\n header->sequenceNumber, header->timestamp,\n a2dp_audio_sbc_decoder_preparse->streamInfo.sampleFreq,\n a2dp_audio_sbc_decoder_preparse->streamInfo.channelMode,\n a2dp_audio_sbc_decoder_preparse->maxPcmLen);\n TRACE_A2DP_DECODER_I(\"[SBC][PRE] frmN:%d par:%d/%d\", frame_num,\n buffer_bytes, bytes_parsed);\n\n a2dp_audio_sbc_lastframe_info.sequenceNumber = header->sequenceNumber;\n a2dp_audio_sbc_lastframe_info.timestamp = header->timestamp;\n a2dp_audio_sbc_lastframe_info.curSubSequenceNumber = 0;\n a2dp_audio_sbc_lastframe_info.totalSubSequenceNumber = frame_num;\n a2dp_audio_sbc_lastframe_info.frame_samples =\n a2dp_audio_sbc_decoder_preparse->maxPcmLen / 4;\n a2dp_audio_sbc_lastframe_info.list_samples = SBC_LIST_SAMPLES;\n a2dp_audio_sbc_lastframe_info.decoded_frames = 0;\n a2dp_audio_sbc_lastframe_info.undecode_frames = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(\n &a2dp_audio_sbc_lastframe_info);\n }\n if (a2dp_audio_sbc_decoder_preparse->streamInfo.channelMode ==\n BTIF_SBC_CHNL_MODE_MONO) {\n sbc_chnl_mode_mono = true;\n }\n return A2DP_DECODER_NO_ERROR;\n}\n\nstatic int a2dp_audio_sbc_header_parser_init(void) {\n a2dp_audio_sbc_decoder_config.auto_synchronize_support = true;\n sbc_decoder_last_valid_frame_ready = false;\n memset(&sbc_decoder_last_valid_frame, 0,\n sizeof(sbc_decoder_last_valid_frame));\n return 0;\n}\n\nstatic int a2dp_audio_sbc_packet_recover_save_last(\n btif_media_header_t *sbc_decoder_frame) {\n sbc_decoder_last_valid_frame = *sbc_decoder_frame;\n sbc_decoder_last_valid_frame_ready = true;\n return 0;\n}\n\nstatic int a2dp_audio_sbc_packet_recover_find_missing(\n btif_media_header_t *sbc_decoder_frame, uint8_t frame_cnt) {\n uint16_t diff_seq = 0;\n uint32_t diff_timestamp = 0;\n uint32_t diff = 0;\n uint32_t need_recover_pkt = 0;\n\n if (!sbc_decoder_last_valid_frame_ready) {\n return need_recover_pkt;\n }\n\n diff_seq = a2dp_audio_get_passed(sbc_decoder_frame->sequenceNumber,\n sbc_decoder_last_valid_frame.sequenceNumber,\n UINT16_MAX);\n diff_timestamp =\n a2dp_audio_get_passed(sbc_decoder_frame->timestamp,\n sbc_decoder_last_valid_frame.timestamp, UINT32_MAX);\n if (diff_seq > 1) {\n diff = diff_timestamp / diff_seq;\n if (diff % SBC_LIST_SAMPLES == 0) {\n need_recover_pkt = diff_timestamp / SBC_LIST_SAMPLES;\n if (need_recover_pkt > frame_cnt) {\n need_recover_pkt -= frame_cnt;\n }\n } else {\n diff_seq--;\n need_recover_pkt = diff_seq * frame_cnt;\n }\n TRACE_A2DP_DECODER_W(\"[SBC][INPUT][PLC] seq:%d/%d stmp:%d/%d\",\n sbc_decoder_frame->sequenceNumber,\n sbc_decoder_last_valid_frame.sequenceNumber,\n sbc_decoder_frame->timestamp,\n sbc_decoder_last_valid_frame.timestamp);\n TRACE_A2DP_DECODER_W(\n \"[SBC][INPUT][PLC] diff_seq:%d diff_stmp:%d diff:%d missing:%d\",\n diff_seq, diff_timestamp, diff, need_recover_pkt);\n }\n\n return need_recover_pkt;\n}\n\nstatic int a2dp_audio_sbc_packet_recover_proc(\n btif_media_header_t *sbc_decoder_frame,\n a2dp_audio_sbc_decoder_frame_t *sbc_raw_frame, uint8_t frame_cnt) {\n int nRet = A2DP_DECODER_NO_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int missing_pkt_cnt = 0;\n missing_pkt_cnt =\n a2dp_audio_sbc_packet_recover_find_missing(sbc_decoder_frame, frame_cnt);\n if (missing_pkt_cnt && sbc_raw_frame &&\n (a2dp_audio_list_length(list) + missing_pkt_cnt) < sbc_mtu_limiter) {\n for (uint8_t i = 0; i < missing_pkt_cnt; i++) {\n a2dp_audio_sbc_decoder_frame_t *frame_p =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_sbc_subframe_malloc(\n sbc_raw_frame->sbc_buffer_len);\n if (!frame_p) {\n nRet = A2DP_DECODER_MEMORY_ERROR;\n goto exit;\n }\n frame_p->sequenceNumber = UINT16_MAX;\n frame_p->timestamp = UINT32_MAX;\n memcpy(frame_p->sbc_buffer, sbc_raw_frame->sbc_buffer,\n sbc_raw_frame->sbc_buffer_len);\n frame_p->sbc_buffer_len = sbc_raw_frame->sbc_buffer_len;\n a2dp_audio_list_append(list, frame_p);\n }\n }\nexit:\n return nRet;\n}\n\n#define FRAME_LIST_MAX (20)\nint a2dp_audio_sbc_store_packet(btif_media_header_t *header, uint8_t *buffer,\n uint32_t buffer_bytes) {\n int nRet = A2DP_DECODER_NO_ERROR;\n\n uint32_t frame_cnt = 0;\n uint32_t frame_num = 0;\n uint32_t frame_len = 0;\n uint8_t *parser_p = buffer;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n uint16_t bytes_parsed = 0;\n a2dp_audio_sbc_decoder_frame_t *frame_list[FRAME_LIST_MAX] = {\n 0,\n };\n uint8_t frame_list_idx = 0;\n bool find_err = false;\n uint32_t i = 0;\n\n frame_num = *parser_p;\n\n if (!frame_num) {\n TRACE_A2DP_DECODER_W(\"[SBC][INPUT] ERROR SBC FRAME !!! frame_num:%d\",\n frame_num);\n DUMP8(\"%02x \", parser_p, 12);\n return A2DP_DECODER_DECODE_ERROR;\n }\n\n parser_p++;\n buffer_bytes--;\n frame_len = buffer_bytes / frame_num;\n\n if ((a2dp_audio_list_length(list) + frame_num) < sbc_mtu_limiter) {\n for (i = 0; i < buffer_bytes; i += bytes_parsed, frame_cnt++) {\n bytes_parsed = 0;\n if (*(parser_p + i) == 0x9c) {\n if (btif_sbc_decode_frames_parser(a2dp_audio_sbc_decoder_preparse,\n parser_p + i, buffer_bytes,\n &bytes_parsed) != BT_STS_SUCCESS) {\n bytes_parsed = frame_len;\n TRACE_A2DP_DECODER_W(\"[SBC][INPUT] ERROR SBC FRAME PARSER !!!\");\n DUMP8(\"%02x \", parser_p + i, 12);\n find_err = true;\n break;\n }\n a2dp_audio_sbc_decoder_frame_t *frame_p =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_sbc_subframe_malloc(\n bytes_parsed);\n if (!frame_p) {\n nRet = A2DP_DECODER_MEMORY_ERROR;\n find_err = true;\n break;\n }\n frame_p->sequenceNumber = header->sequenceNumber;\n frame_p->timestamp = header->timestamp;\n frame_p->curSubSequenceNumber = frame_cnt;\n frame_p->totalSubSequenceNumber = frame_num;\n memcpy(frame_p->sbc_buffer, (parser_p + i), bytes_parsed);\n frame_p->sbc_buffer_len = bytes_parsed;\n frame_list[frame_list_idx++] = frame_p;\n if (frame_list_idx >= FRAME_LIST_MAX) {\n find_err = true;\n break;\n }\n } else {\n TRACE_A2DP_DECODER_W(\"[SBC][INPUT] ERROR SBC FRAME !!!\");\n DUMP8(\"%02x \", parser_p + i, 12);\n find_err = true;\n break;\n }\n }\n if (find_err) {\n TRACE_A2DP_DECODER_W(\"[SBC][INPUT] FIND ERR !!!\");\n for (i = 0; i < frame_list_idx; i++) {\n a2dp_audio_sbc_subframe_free(frame_list[i]);\n }\n nRet = A2DP_DECODER_DECODE_ERROR;\n } else {\n a2dp_audio_sbc_packet_recover_proc(header, frame_list[0], frame_num);\n a2dp_audio_sbc_packet_recover_save_last(header);\n for (i = 0; i < frame_list_idx; i++) {\n a2dp_audio_list_append(list, frame_list[i]);\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n } else {\n TRACE_A2DP_DECODER_W(\"[SBC][INPUT] OVERFLOW list:%d\",\n a2dp_audio_list_length(list));\n nRet = A2DP_DECODER_MTU_LIMTER_ERROR;\n }\n\n return nRet;\n}\n\nint a2dp_audio_sbc_discards_packet(uint32_t packets) {\n int nRet = A2DP_DECODER_MEMORY_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame = NULL;\n uint16_t totalSubSequenceNumber;\n uint8_t j = 0;\n\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n\n node = a2dp_audio_list_begin(list);\n if (!node) {\n goto exit;\n }\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n\n for (j = 0; j < a2dp_audio_list_length(list); j++) {\n node = a2dp_audio_list_begin(list);\n if (!node) {\n goto exit;\n }\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n if (sbc_decoder_frame->curSubSequenceNumber != 0) {\n a2dp_audio_list_remove(list, sbc_decoder_frame);\n } else {\n break;\n }\n }\n\n node = a2dp_audio_list_begin(list);\n if (!node) {\n goto exit;\n }\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n ASSERT_A2DP_DECODER(sbc_decoder_frame->curSubSequenceNumber == 0,\n \"sbc_discards_packet not align curSubSequenceNumber:%d\",\n sbc_decoder_frame->curSubSequenceNumber);\n\n totalSubSequenceNumber = sbc_decoder_frame->totalSubSequenceNumber;\n\n if (packets <= a2dp_audio_list_length(list) / totalSubSequenceNumber) {\n for (uint8_t i = 0; i < packets; i++) {\n for (j = 0; j < totalSubSequenceNumber; j++) {\n node = a2dp_audio_list_begin(list);\n if (!node) {\n goto exit;\n }\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, sbc_decoder_frame);\n }\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\nexit:\n TRACE_A2DP_DECODER_I(\"[SBC][DISCARDS] packets:%d nRet:%d\", packets, nRet);\n return nRet;\n}\n\nint a2dp_audio_sbc_headframe_info_get(\n A2DP_AUDIO_HEADFRAME_INFO_T *headframe_info) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame = NULL;\n\n if (a2dp_audio_list_length(list) &&\n ((node = a2dp_audio_list_begin(list)) != NULL)) {\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n headframe_info->sequenceNumber = sbc_decoder_frame->sequenceNumber;\n headframe_info->timestamp = sbc_decoder_frame->timestamp;\n headframe_info->curSubSequenceNumber =\n sbc_decoder_frame->curSubSequenceNumber;\n headframe_info->totalSubSequenceNumber =\n sbc_decoder_frame->totalSubSequenceNumber;\n } else {\n memset(headframe_info, 0, sizeof(A2DP_AUDIO_HEADFRAME_INFO_T));\n }\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_sbc_info_get(void *info) { return A2DP_DECODER_NO_ERROR; }\n\nint a2dp_audio_sbc_synchronize_packet(A2DP_AUDIO_SYNCFRAME_INFO_T *sync_info,\n uint32_t mask) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n int list_len;\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame = NULL;\n\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n\n list_len = a2dp_audio_list_length(list);\n\n for (uint16_t i = 0; i < list_len; i++) {\n node = a2dp_audio_list_begin(list);\n if (node) {\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n if (A2DP_AUDIO_SYNCFRAME_CHK(sbc_decoder_frame->sequenceNumber ==\n sync_info->sequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_SEQ, mask) &&\n A2DP_AUDIO_SYNCFRAME_CHK(sbc_decoder_frame->curSubSequenceNumber ==\n sync_info->curSubSequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_CURRSUBSEQ,\n mask) &&\n A2DP_AUDIO_SYNCFRAME_CHK(sbc_decoder_frame->totalSubSequenceNumber ==\n sync_info->totalSubSequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_TOTALSUBSEQ,\n mask)) {\n nRet = A2DP_DECODER_NO_ERROR;\n break;\n }\n a2dp_audio_list_remove(list, sbc_decoder_frame);\n }\n }\n\n node = a2dp_audio_list_begin(list);\n if (node) {\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n TRACE_A2DP_DECODER_I(\n \"[MCU][SYNC][SBC] sync pkt nRet:%d SEQ:%d timestamp:%d %d/%d\", nRet,\n sbc_decoder_frame->sequenceNumber, sbc_decoder_frame->timestamp,\n sbc_decoder_frame->curSubSequenceNumber,\n sbc_decoder_frame->totalSubSequenceNumber);\n } else {\n TRACE_A2DP_DECODER_I(\"[MCU][SYNC][SBC] sync pkt nRet:%d\", nRet);\n }\n\n return nRet;\n}\n\nint a2dp_audio_sbc_synchronize_dest_packet_mut(uint16_t packet_mut) {\n list_node_t *node = NULL;\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame = NULL;\n\n list_len = a2dp_audio_list_length(list);\n if (list_len > packet_mut) {\n do {\n node = a2dp_audio_list_begin(list);\n if (node) {\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, sbc_decoder_frame);\n }\n } while (a2dp_audio_list_length(list) > packet_mut);\n }\n\n TRACE_A2DP_DECODER_I(\"[MCU][SYNC][SBC] dest pkt list:%d\",\n a2dp_audio_list_length(list));\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_sbc_convert_list_to_samples(uint32_t *samples) {\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n\n list_len = a2dp_audio_list_length(list);\n *samples = SBC_LIST_SAMPLES * list_len;\n\n TRACE_A2DP_DECODER_I(\"[MCU][SBC] list:%d samples:%d\", list_len, *samples);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_sbc_discards_samples(uint32_t samples) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_sbc_decoder_frame_t *sbc_decoder_frame = NULL;\n list_node_t *node = NULL;\n int need_remove_list = 0;\n uint32_t list_samples = 0;\n ASSERT_A2DP_DECODER(!(samples % SBC_LIST_SAMPLES), \"%s samples err:%d\",\n __func__, samples);\n\n a2dp_audio_sbc_convert_list_to_samples(&list_samples);\n if (list_samples >= samples) {\n need_remove_list = samples / SBC_LIST_SAMPLES;\n for (int i = 0; i < need_remove_list; i++) {\n node = a2dp_audio_list_begin(list);\n if (node) {\n sbc_decoder_frame =\n (a2dp_audio_sbc_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, sbc_decoder_frame);\n }\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n\n return nRet;\n}\n\nint a2dp_audio_sbc_channel_select(A2DP_AUDIO_CHANNEL_SELECT_E chnl_sel) {\n return A2DP_DECODER_NO_ERROR;\n}\n\nA2DP_AUDIO_DECODER_T a2dp_audio_sbc_decoder_config = {\n {44100, 2, 16},\n 1,\n a2dp_audio_sbc_init,\n a2dp_audio_sbc_deinit,\n a2dp_audio_sbc_decode_frame,\n a2dp_audio_sbc_preparse_packet,\n a2dp_audio_sbc_store_packet,\n a2dp_audio_sbc_discards_packet,\n a2dp_audio_sbc_synchronize_packet,\n a2dp_audio_sbc_synchronize_dest_packet_mut,\n a2dp_audio_sbc_convert_list_to_samples,\n a2dp_audio_sbc_discards_samples,\n a2dp_audio_sbc_headframe_info_get,\n a2dp_audio_sbc_info_get,\n a2dp_audio_sbc_subframe_free,\n a2dp_audio_sbc_channel_select,\n};\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_scalable.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"a2dp_decoder_internal.h\"\n#include \"app_audio.h\"\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n#include \"heap_api.h\"\n#include \"plat_types.h\"\n#include \n#if defined(A2DP_SCALABLE_ON)\n#include \"heap_api.h\"\n#include \"ssc.h\"\n\n#define SCALABLE_MTU_LIMITER (32)\n#define SCALABLE_MEMPOOL_SIZE 1024\n\n#define SCALABLE_OUTPUT_FRAME_SAMPLES (SCALABLE_FRAME_SIZE)\n\ntypedef void *HANDLE_DECODER;\nstatic A2DP_AUDIO_CONTEXT_T *a2dp_audio_context_p = NULL;\nstatic A2DP_AUDIO_OUTPUT_CONFIG_T output_config;\n\nstatic unsigned char *scalable_decoder_place = NULL;\nstatic unsigned char *scalable_decoder_temp_buf = NULL;\nstatic short ss_pcm_buff[SCALABLE_FRAME_SIZE * 4];\nstatic int scalable_uhq_flag __attribute__((unused)) = 0;\n\nstatic HANDLE_DECODER scalableDec_handle = NULL;\n\nstatic A2DP_AUDIO_DECODER_LASTFRAME_INFO_T lastframe_info;\n\ntypedef struct {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n uint8_t *buffer;\n int buffer_len;\n} a2dp_audio_scalable_decoder_frame_t;\n\nstatic void ss_to_24bit_buf(int32_t *out, int32_t *in, int size) {\n for (int i = 0; i < size; i++) {\n out[i] = in[i];\n }\n}\n\nstatic void a2dp_audio_scalable_decoder_init(void) {\n if (scalableDec_handle == NULL) {\n scalableDec_handle = scalable_decoder_place;\n\n ssc_decoder_init(scalableDec_handle, output_config.num_channels,\n output_config.sample_rate);\n }\n}\n\nstatic int scalableDecoder_Close(HANDLE_DECODER handle) {\n if (handle) {\n a2dp_audio_heap_free(handle);\n a2dp_audio_heap_free(scalable_decoder_temp_buf);\n }\n\n return 0;\n}\n\nstatic void a2dp_audio_scalable_decoder_deinit(void) {\n if (scalableDec_handle) {\n scalableDecoder_Close(scalableDec_handle);\n scalableDec_handle = NULL;\n }\n}\n\nstatic void a2dp_audio_scalable_decoder_reinit(void) {\n if (scalableDec_handle) {\n a2dp_audio_scalable_decoder_deinit();\n }\n a2dp_audio_scalable_decoder_init();\n}\n\nstatic bool\nis_valid_frame(a2dp_audio_scalable_decoder_frame_t *decoder_frame_p) {\n int hw_tmp, len, bitrate_bps, frame_len, frame_size;\n\n int sampling_rate = 44100;\n unsigned char *input_buf = decoder_frame_p->buffer;\n if (decoder_frame_p->buffer_len < SCALABLE_HEAD_SIZE) {\n TRACE_A2DP_DECODER_E(\n \"invalid scalable a2dp frame, length < SCALABLE_HEAD_SIZE !!!!!!!\");\n return false;\n }\n\n scalable_uhq_flag = 0;\n\n switch ((input_buf[3] & 0xf7)) {\n case 0xF0:\n bitrate_bps = 88000;\n break;\n case 0xF1:\n bitrate_bps = 96000;\n break;\n case 0xF2:\n bitrate_bps = 128000;\n break;\n case 0xF3:\n bitrate_bps = 192000;\n break;\n case 0xF4:\n bitrate_bps = 229000;\n break;\n case 0xF5:\n scalable_uhq_flag = 1;\n bitrate_bps = 328000;\n sampling_rate = 96000;\n break;\n default:\n bitrate_bps = 192000;\n break;\n }\n\n frame_size = SCALABLE_FRAME_SIZE;\n\n len = bitrate_bps * frame_size / sampling_rate / 8;\n if (scalable_uhq_flag == 0) {\n hw_tmp = (len * 3) >> 7;\n len = hw_tmp + len;\n len = len + ((len & 1) ^ 1);\n } else {\n len = 369; // 744/2-4+1\n }\n TRACE_A2DP_DECODER_D(\n \"scalable a2dp frame, length:%d bitrate:%d sampling_rate:%d\",\n decoder_frame_p->buffer_len, bitrate_bps, sampling_rate);\n frame_len = SCALABLE_HEAD_SIZE + len - 1;\n\n if (decoder_frame_p->buffer_len < frame_len) {\n TRACE_A2DP_DECODER_E(\n \"invalid scalable a2dp frame, length:%d < %d !!!!!!!\",\n decoder_frame_p->buffer_len, frame_len);\n return false;\n }\n return true;\n}\n\n#ifdef A2DP_CP_ACCEL\nstruct A2DP_CP_scalable_IN_FRM_INFO_T {\n uint16_t sequenceNumber;\n uint32_t timestamp;\n};\n\nstruct A2DP_CP_scalable_OUT_FRM_INFO_T {\n struct A2DP_CP_scalable_IN_FRM_INFO_T in_info;\n uint16_t frame_samples;\n uint16_t decoded_frames;\n uint16_t frame_idx;\n uint16_t pcm_len;\n};\n\nstatic bool cp_codec_reset;\nextern uint32_t app_bt_stream_get_dma_buffer_samples(void);\n\nTEXT_SSC_LOC static int a2dp_cp_scalable_mcu_decode(uint8_t *buffer,\n uint32_t buffer_bytes) {\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p = NULL;\n list_node_t *node = NULL;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int ret, dec_ret;\n struct A2DP_CP_scalable_IN_FRM_INFO_T in_info;\n struct A2DP_CP_scalable_OUT_FRM_INFO_T *p_out_info;\n uint8_t *out;\n uint32_t out_len;\n uint32_t out_frame_len;\n uint32_t cp_buffer_frames_max = 0;\n\n cp_buffer_frames_max = app_bt_stream_get_dma_buffer_samples() / 2;\n if (cp_buffer_frames_max % (lastframe_info.frame_samples)) {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (lastframe_info.frame_samples) + 1;\n } else {\n cp_buffer_frames_max =\n cp_buffer_frames_max / (lastframe_info.frame_samples);\n }\n\n out_frame_len = sizeof(*p_out_info) + buffer_bytes;\n ret = a2dp_cp_decoder_init(out_frame_len, cp_buffer_frames_max * 2);\n\n ASSERT(ret == 0, \"%s: a2dp_cp_decoder_init() failed: ret=%d\", __func__, ret);\n\n while ((node = a2dp_audio_list_begin(list)) != NULL) {\n decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_list_node(node);\n\n if (false == is_valid_frame(decoder_frame_p)) {\n return A2DP_DECODER_DECODE_ERROR;\n }\n\n in_info.sequenceNumber = decoder_frame_p->sequenceNumber;\n in_info.timestamp = decoder_frame_p->timestamp;\n\n ret =\n a2dp_cp_put_in_frame(&in_info, sizeof(in_info), decoder_frame_p->buffer,\n decoder_frame_p->buffer_len);\n if (ret) {\n break;\n }\n\n a2dp_audio_list_remove(list, decoder_frame_p);\n }\n\n ret = a2dp_cp_get_full_out_frame((void **)&out, &out_len);\n if (ret) {\n return A2DP_DECODER_DECODE_ERROR;\n }\n if (out_len == 0) {\n memset(buffer, 0, buffer_bytes);\n a2dp_cp_consume_full_out_frame();\n return A2DP_DECODER_NO_ERROR;\n }\n ASSERT(out_len == out_frame_len, \"%s: Bad out len %u (should be %u)\",\n __func__, out_len, out_frame_len);\n\n p_out_info = (struct A2DP_CP_scalable_OUT_FRM_INFO_T *)out;\n if (p_out_info->pcm_len) {\n lastframe_info.sequenceNumber = p_out_info->in_info.sequenceNumber;\n lastframe_info.timestamp = p_out_info->in_info.timestamp;\n lastframe_info.curSubSequenceNumber = 0;\n lastframe_info.totalSubSequenceNumber = 0;\n lastframe_info.frame_samples = p_out_info->frame_samples;\n lastframe_info.decoded_frames += p_out_info->decoded_frames;\n lastframe_info.undecode_frames =\n a2dp_audio_list_length(list) +\n a2dp_cp_get_in_frame_cnt_by_index(p_out_info->frame_idx) - 1;\n a2dp_audio_decoder_internal_lastframe_info_set(&lastframe_info);\n }\n\n if (p_out_info->pcm_len == buffer_bytes) {\n memcpy(buffer, p_out_info + 1, p_out_info->pcm_len);\n dec_ret = A2DP_DECODER_NO_ERROR;\n } else {\n dec_ret = A2DP_DECODER_DECODE_ERROR;\n }\n\n ret = a2dp_cp_consume_full_out_frame();\n ASSERT(ret == 0, \"%s: a2dp_cp_consume_full_out_frame() failed: ret=%d\",\n __func__, ret);\n\n return dec_ret;\n}\n\nTEXT_SSC_LOC int a2dp_cp_scalable_cp_decode(void) {\n int ret;\n enum CP_EMPTY_OUT_FRM_T out_frm_st;\n uint8_t *out;\n uint32_t out_len;\n uint8_t *dec_start;\n uint32_t dec_len;\n struct A2DP_CP_scalable_IN_FRM_INFO_T *p_in_info;\n struct A2DP_CP_scalable_OUT_FRM_INFO_T *p_out_info;\n uint8_t *in_buf;\n uint32_t in_len;\n uint32_t dec_sum;\n int error, output_samples = 0, output_byte = 0;\n\n if (cp_codec_reset) {\n cp_codec_reset = false;\n a2dp_audio_scalable_decoder_init();\n }\n\n out_frm_st = a2dp_cp_get_emtpy_out_frame((void **)&out, &out_len);\n\n if (out_frm_st != CP_EMPTY_OUT_FRM_OK &&\n out_frm_st != CP_EMPTY_OUT_FRM_WORKING) {\n return 1;\n }\n\n ASSERT(out_len > sizeof(*p_out_info), \"%s: Bad out_len %u (should > %u)\",\n __func__, out_len, sizeof(*p_out_info));\n\n p_out_info = (struct A2DP_CP_scalable_OUT_FRM_INFO_T *)out;\n if (out_frm_st == CP_EMPTY_OUT_FRM_OK) {\n p_out_info->pcm_len = 0;\n p_out_info->decoded_frames = 0;\n }\n\n ASSERT(out_len > sizeof(*p_out_info) + p_out_info->pcm_len,\n \"%s: Bad out_len %u (should > %u + %u)\", __func__, out_len,\n sizeof(*p_out_info), p_out_info->pcm_len);\n\n dec_start = (uint8_t *)(p_out_info + 1) + p_out_info->pcm_len;\n dec_len = out_len - (dec_start - (uint8_t *)out);\n if (!scalableDec_handle) {\n TRACE(0, \"scalable_decode not ready\");\n return 3;\n }\n\n dec_sum = 0;\n error = 0;\n\n while (dec_sum < dec_len && error == 0) {\n ret = a2dp_cp_get_in_frame((void **)&in_buf, &in_len);\n\n if (ret) {\n break;\n }\n\n ASSERT(in_len > sizeof(*p_in_info), \"%s: Bad in_len %u (should > %u)\",\n __func__, in_len, sizeof(*p_in_info));\n p_in_info = (struct A2DP_CP_scalable_IN_FRM_INFO_T *)in_buf;\n in_buf += sizeof(*p_in_info);\n in_len -= sizeof(*p_in_info);\n /* decode one SSC frame */\n output_samples =\n ssc_decode(scalableDec_handle, (const unsigned char *)in_buf,\n ss_pcm_buff, SCALABLE_FRAME_SIZE, 0, 2);\n if (0 == output_samples) {\n a2dp_audio_scalable_decoder_reinit();\n TRACE(0, \"scalable_decode reinin codec \\n\");\n error = A2DP_DECODER_DECODE_ERROR;\n goto exit;\n }\n\n ss_to_24bit_buf((int32_t *)(dec_start + dec_sum), (int32_t *)ss_pcm_buff,\n output_samples);\n output_byte = output_samples * 4;\n dec_sum += output_byte;\n exit:\n memcpy(&p_out_info->in_info, ss_pcm_buff, sizeof(*p_in_info));\n p_out_info->decoded_frames++;\n p_out_info->frame_samples = SCALABLE_OUTPUT_FRAME_SAMPLES;\n p_out_info->frame_idx = a2dp_cp_get_in_frame_index();\n\n ret = a2dp_cp_consume_in_frame();\n ASSERT(ret == 0, \"%s: a2dp_cp_consume_in_frame() failed: ret=%d\", __func__,\n ret);\n }\n\n p_out_info->pcm_len += dec_sum;\n\n if (error || out_len <= sizeof(*p_out_info) + p_out_info->pcm_len) {\n ret = a2dp_cp_consume_emtpy_out_frame();\n ASSERT(ret == 0, \"%s: a2dp_cp_consume_emtpy_out_frame() failed: ret=%d\",\n __func__, ret);\n }\n\n return error;\n}\n#endif\n\nstatic int a2dp_audio_scalable_init(A2DP_AUDIO_OUTPUT_CONFIG_T *config,\n void *context) {\n TRACE_A2DP_DECODER_D(\"%s\", __func__);\n\n TRACE(0, \"\\n\\nA2DP SSC-LC INIT\\n\");\n\n a2dp_audio_context_p = (A2DP_AUDIO_CONTEXT_T *)context;\n\n memcpy(&output_config, config, sizeof(A2DP_AUDIO_OUTPUT_CONFIG_T));\n\n memset(&lastframe_info, 0, sizeof(A2DP_AUDIO_DECODER_LASTFRAME_INFO_T));\n lastframe_info.stream_info = output_config;\n lastframe_info.frame_samples = SCALABLE_FRAME_SIZE;\n lastframe_info.list_samples = SCALABLE_FRAME_SIZE;\n a2dp_audio_decoder_internal_lastframe_info_set(&lastframe_info);\n\n ASSERT(a2dp_audio_context_p->dest_packet_mut < SCALABLE_MTU_LIMITER,\n \"%s MTU OVERFLOW:%u/%u\", __func__,\n a2dp_audio_context_p->dest_packet_mut, SCALABLE_MTU_LIMITER);\n\n int decoder_size;\n\n decoder_size = ssc_decoder_get_size(\n output_config.num_channels); // todo: get size with codec capability\n\n TRACE(0, \"decoder size %d\", decoder_size);\n\n scalable_decoder_place =\n (unsigned char *)a2dp_audio_heap_malloc(decoder_size);\n ASSERT_A2DP_DECODER(scalable_decoder_place,\n \"no memory resource for scalable_decoder_place\");\n\n scalable_decoder_temp_buf =\n (unsigned char *)a2dp_audio_heap_malloc(SCALABLE_FRAME_SIZE * 16);\n ASSERT_A2DP_DECODER(scalable_decoder_temp_buf,\n \"no memory resource for scalable_decoder_temp_buf\");\n\n#ifdef A2DP_CP_ACCEL\n int ret;\n cp_codec_reset = true;\n ret = a2dp_cp_init(a2dp_cp_scalable_cp_decode, CP_PROC_DELAY_1_FRAME);\n ASSERT(ret == 0, \"%s: a2dp_cp_init() failed: ret=%d\", __func__, ret);\n#else\n a2dp_audio_scalable_decoder_init();\n#endif\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nstatic int a2dp_audio_scalable_deinit(void) {\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_deinit();\n#endif\n\n a2dp_audio_scalable_decoder_deinit();\n\n TRACE(0, \"\\n\\nA2DP SCALABLE DEINIT\\n\");\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_scalable_mcu_decode_frame(uint8_t *buffer,\n uint32_t buffer_bytes) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p = NULL;\n int ret = A2DP_DECODER_NO_ERROR;\n\n bool cache_underflow = false;\n int output_byte = 0, output_samples = 0;\n uint8_t *output = buffer;\n // TRACE(1,\"bbd %d\",buffer_bytes );\n if (buffer_bytes < (SCALABLE_FRAME_SIZE * output_config.num_channels *\n output_config.bits_depth / 8)) {\n TRACE(1, \"scalable_decode pcm_len = %d \\n\", buffer_bytes);\n return A2DP_DECODER_NO_ERROR;\n }\n if (!scalableDec_handle) {\n TRACE(0, \"scalable_decode not ready\");\n return A2DP_DECODER_NO_ERROR;\n }\n\n while (output < buffer + buffer_bytes) {\n node = a2dp_audio_list_begin(list);\n if (!node) {\n TRACE(0, \"scalable_decode cache underflow\");\n cache_underflow = true;\n goto exit;\n } else {\n decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_list_node(node);\n\n if (false == is_valid_frame(decoder_frame_p)) {\n TRACE_A2DP_DECODER_E(\"%s %d invalid a2dp frame\", __func__, __LINE__);\n ret = A2DP_DECODER_DECODE_ERROR;\n goto exit;\n }\n\n /* decode one SSC frame */\n output_samples = ssc_decode(scalableDec_handle, decoder_frame_p->buffer,\n ss_pcm_buff, SCALABLE_FRAME_SIZE, 0, 2);\n\n TRACE_A2DP_DECODER_D(\"scalable_decode seq:%d len:%d output_samples:%d\",\n decoder_frame_p->sequenceNumber,\n decoder_frame_p->buffer_len, output_samples);\n\n if (0 == output_samples) {\n TRACE(0, \"scalable_decode failed !!!!!!\");\n // if failed reopen it again\n a2dp_audio_scalable_decoder_reinit();\n TRACE(0, \"scalable_decode reinin codec \\n\");\n ret = A2DP_DECODER_DECODE_ERROR;\n goto exit;\n }\n ss_to_24bit_buf((int32_t *)output, (int32_t *)ss_pcm_buff,\n output_samples * 2);\n output_byte = output_samples * 8;\n\n output += output_byte;\n ASSERT(SCALABLE_FRAME_SIZE == output_samples,\n \"scalable_decode output mismatch samples:%d\", output_samples);\n lastframe_info.sequenceNumber = decoder_frame_p->sequenceNumber;\n lastframe_info.timestamp = decoder_frame_p->timestamp;\n lastframe_info.curSubSequenceNumber = 0;\n lastframe_info.totalSubSequenceNumber = 0;\n lastframe_info.frame_samples = SCALABLE_FRAME_SIZE;\n lastframe_info.decoded_frames++;\n lastframe_info.undecode_frames = a2dp_audio_list_length(list) - 1;\n a2dp_audio_decoder_internal_lastframe_info_set(&lastframe_info);\n a2dp_audio_list_remove(list, decoder_frame_p);\n }\n }\n\nexit:\n if (cache_underflow) {\n lastframe_info.undecode_frames = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(&lastframe_info);\n ret = A2DP_DECODER_CACHE_UNDERFLOW_ERROR;\n }\n // TRACE(0,\"abd\");\n return ret;\n}\n\nstatic int a2dp_audio_scalable_decode_frame(uint8_t *buffer,\n uint32_t buffer_bytes) {\n#ifdef A2DP_CP_ACCEL\n return a2dp_cp_scalable_mcu_decode(buffer, buffer_bytes);\n#else\n return a2dp_audio_scalable_mcu_decode_frame(buffer, buffer_bytes);\n#endif\n}\n\nstatic int a2dp_audio_scalable_preparse_packet(btif_media_header_t *header,\n uint8_t *buffer,\n uint32_t buffer_bytes) {\n lastframe_info.sequenceNumber = header->sequenceNumber;\n lastframe_info.timestamp = header->timestamp;\n lastframe_info.curSubSequenceNumber = 0;\n lastframe_info.totalSubSequenceNumber = 0;\n lastframe_info.frame_samples = SCALABLE_FRAME_SIZE;\n lastframe_info.list_samples = SCALABLE_FRAME_SIZE;\n lastframe_info.decoded_frames = 0;\n lastframe_info.undecode_frames = 0;\n a2dp_audio_decoder_internal_lastframe_info_set(&lastframe_info);\n\n TRACE(3, \"%s seq:%d timestamp:%08x\", __func__, header->sequenceNumber,\n header->timestamp);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nstatic void *a2dp_audio_scalable_frame_malloc(uint32_t packet_len) {\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p = NULL;\n uint8_t *buffer = NULL;\n\n buffer = (uint8_t *)a2dp_audio_heap_malloc(SCALABLE_READBUF_SIZE);\n decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_heap_malloc(\n sizeof(a2dp_audio_scalable_decoder_frame_t));\n decoder_frame_p->buffer = buffer;\n decoder_frame_p->buffer_len = packet_len;\n return (void *)decoder_frame_p;\n}\n\nstatic void a2dp_audio_scalable_free(void *packet) {\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)packet;\n a2dp_audio_heap_free(decoder_frame_p->buffer);\n a2dp_audio_heap_free(decoder_frame_p);\n}\n\nstatic int a2dp_audio_scalable_store_packet(btif_media_header_t *header,\n uint8_t *buffer,\n uint32_t buffer_bytes) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n int nRet = A2DP_DECODER_NO_ERROR;\n if (a2dp_audio_list_length(list) < SCALABLE_MTU_LIMITER) {\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_scalable_frame_malloc(\n buffer_bytes);\n TRACE_A2DP_DECODER_D(\"%s seq:%d len:%d\", __func__, header->sequenceNumber,\n buffer_bytes);\n decoder_frame_p->sequenceNumber = header->sequenceNumber;\n decoder_frame_p->timestamp = header->timestamp;\n memcpy(decoder_frame_p->buffer, buffer, buffer_bytes);\n decoder_frame_p->buffer_len = buffer_bytes;\n a2dp_audio_list_append(list, decoder_frame_p);\n nRet = A2DP_DECODER_NO_ERROR;\n } else {\n TRACE(2, \"%s list full current len:%d\", __func__,\n a2dp_audio_list_length(list));\n nRet = A2DP_DECODER_MTU_LIMTER_ERROR;\n }\n\n return nRet;\n}\n\nstatic int a2dp_audio_scalable_discards_packet(uint32_t packets) {\n int nRet = A2DP_DECODER_MEMORY_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p = NULL;\n\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n\n if (packets <= a2dp_audio_list_length(list)) {\n for (uint8_t i = 0; i < packets; i++) {\n if ((node = a2dp_audio_list_begin(list)) != NULL) {\n decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, decoder_frame_p);\n }\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n\n TRACE(3, \"%s packets:%d nRet:%d\", __func__, packets, nRet);\n return nRet;\n}\n\nstatic int a2dp_audio_scalable_headframe_info_get(\n A2DP_AUDIO_HEADFRAME_INFO_T *headframe_info) {\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p = NULL;\n\n if (a2dp_audio_list_length(list)) {\n if ((node = a2dp_audio_list_begin(list)) != NULL) {\n decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_list_node(node);\n headframe_info->sequenceNumber = decoder_frame_p->sequenceNumber;\n headframe_info->timestamp = decoder_frame_p->timestamp;\n headframe_info->curSubSequenceNumber = 0;\n headframe_info->totalSubSequenceNumber = 0;\n }\n } else {\n memset(headframe_info, 0, sizeof(A2DP_AUDIO_HEADFRAME_INFO_T));\n }\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nstatic int a2dp_audio_scalable_info_get(void *info) {\n return A2DP_DECODER_NO_ERROR;\n}\n\nstatic int\na2dp_audio_scalable_synchronize_packet(A2DP_AUDIO_SYNCFRAME_INFO_T *sync_info,\n uint32_t mask) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n list_node_t *node = NULL;\n int list_len;\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p = NULL;\n\n#ifdef A2DP_CP_ACCEL\n a2dp_cp_reset_frame();\n#endif\n\n list_len = a2dp_audio_list_length(list);\n\n for (uint16_t i = 0; i < list_len; i++) {\n if ((node = a2dp_audio_list_begin(list)) != NULL) {\n decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_list_node(node);\n if (A2DP_AUDIO_SYNCFRAME_CHK(decoder_frame_p->sequenceNumber ==\n sync_info->sequenceNumber,\n A2DP_AUDIO_SYNCFRAME_MASK_SEQ, mask) &&\n A2DP_AUDIO_SYNCFRAME_CHK(decoder_frame_p->timestamp ==\n sync_info->timestamp,\n A2DP_AUDIO_SYNCFRAME_MASK_TIMESTAMP, mask)) {\n nRet = A2DP_DECODER_NO_ERROR;\n break;\n }\n a2dp_audio_list_remove(list, decoder_frame_p);\n }\n }\n\n node = a2dp_audio_list_begin(list);\n if (node) {\n decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_list_node(node);\n TRACE(4, \"%s nRet:%d SEQ:%d timestamp:%d\", __func__, nRet,\n decoder_frame_p->sequenceNumber, decoder_frame_p->timestamp);\n } else {\n TRACE(2, \"%s nRet:%d\", __func__, nRet);\n }\n\n return nRet;\n}\n\nstatic int\na2dp_audio_scalable_synchronize_dest_packet_mut(uint16_t packet_mut) {\n list_node_t *node = NULL;\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_scalable_decoder_frame_t *decoder_frame_p = NULL;\n\n list_len = a2dp_audio_list_length(list);\n if (list_len > packet_mut) {\n do {\n node = a2dp_audio_list_begin(list);\n if (node) {\n decoder_frame_p =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, decoder_frame_p);\n }\n } while (a2dp_audio_list_length(list) > packet_mut);\n }\n\n TRACE(2, \"%s list:%d\", __func__, a2dp_audio_list_length(list));\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_scalable_convert_list_to_samples(uint32_t *samples) {\n uint32_t list_len = 0;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n\n list_len = a2dp_audio_list_length(list);\n *samples = SCALABLE_FRAME_SIZE * list_len;\n\n TRACE(3, \"%s list:%d samples:%d\", __func__, list_len, *samples);\n\n return A2DP_DECODER_NO_ERROR;\n}\n\nint a2dp_audio_scalable_discards_samples(uint32_t samples) {\n int nRet = A2DP_DECODER_SYNC_ERROR;\n list_t *list = a2dp_audio_context_p->audio_datapath.input_raw_packet_list;\n a2dp_audio_scalable_decoder_frame_t *scalable_decoder_frame = NULL;\n list_node_t *node = NULL;\n int need_remove_list = 0;\n uint32_t list_samples = 0;\n ASSERT(!(samples % SCALABLE_FRAME_SIZE), \"%s samples err:%d\", __func__,\n samples);\n\n a2dp_audio_scalable_convert_list_to_samples(&list_samples);\n if (list_samples >= samples) {\n need_remove_list = samples / SCALABLE_FRAME_SIZE;\n for (int i = 0; i < need_remove_list; i++) {\n node = a2dp_audio_list_begin(list);\n if (node) {\n scalable_decoder_frame =\n (a2dp_audio_scalable_decoder_frame_t *)a2dp_audio_list_node(node);\n a2dp_audio_list_remove(list, scalable_decoder_frame);\n }\n }\n nRet = A2DP_DECODER_NO_ERROR;\n }\n\n return nRet;\n}\nA2DP_AUDIO_DECODER_T a2dp_audio_scalable_decoder_config = {\n {44100, 2, 16},\n 1,\n a2dp_audio_scalable_init,\n a2dp_audio_scalable_deinit,\n a2dp_audio_scalable_decode_frame,\n a2dp_audio_scalable_preparse_packet,\n a2dp_audio_scalable_store_packet,\n a2dp_audio_scalable_discards_packet,\n a2dp_audio_scalable_synchronize_packet,\n a2dp_audio_scalable_synchronize_dest_packet_mut,\n a2dp_audio_scalable_convert_list_to_samples,\n a2dp_audio_scalable_discards_samples,\n a2dp_audio_scalable_headframe_info_get,\n a2dp_audio_scalable_info_get,\n a2dp_audio_scalable_free,\n};\n#else\nA2DP_AUDIO_DECODER_T a2dp_audio_scalable_decoder_config = {\n 0,\n};\n#endif\n" }, { "path": "apps/audioplayers/a2dp_decoder/a2dp_decoder_trace.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_DECODER_TRACE_H__\n#define __A2DP_DECODER_TRACE_H__\n\n#include \"hal_trace.h\"\n\n#ifdef ENABLE_COMPRESS_LOG\n#define TRACE_A2DP_DECODER_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), \"[AUD][DECODER][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_A2DP_DECODER_I(str, ...) LOG_INFO(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), \"[AUD][DECODER]\"str, ##__VA_ARGS__)\n#define TRACE_A2DP_DECODER_W(str, ...) LOG_WARN(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), \"[AUD][DECODER][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_A2DP_DECODER_E(str, ...) LOG_ERROR(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), \"[AUD][DECODER][ERR]\"str, ##__VA_ARGS__)\n#else\n#define TRACE_A2DP_DECODER_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_MOD(AUDFLG), \"[AUD][DECODER][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_A2DP_DECODER_I(str, ...) LOG_INFO(LOG_MOD(AUDFLG), \"[AUD][DECODER]\"str, ##__VA_ARGS__)\n#define TRACE_A2DP_DECODER_W(str, ...) LOG_WARN(LOG_MOD(AUDFLG), \"[AUD][DECODER][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_A2DP_DECODER_E(str, ...) LOG_ERROR(LOG_MOD(AUDFLG), \"[AUD][DECODER][ERR]\"str, ##__VA_ARGS__)\n#endif\n\n#define ASSERT_A2DP_DECODER(cond, str, ...) ASSERT(cond, str, ##__VA_ARGS__) \n\n#endif\n" }, { "path": "apps/audioplayers/a2dpplay.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if (A2DP_DECODER_VER < 2)\n\n#ifdef MBED\n#include \"mbed.h\"\n#include \"rtos.h\"\n#endif\n// Standard C Included Files\n#include \"tgt_hardware.h\"\n#include \n#include \n#include \n#include \n#include \n#ifdef MBED\n#include \"SDFileSystem.h\"\n#endif\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_overlay.h\"\n#include \"audioflinger.h\"\n#include \"cqueue.h\"\n#include \"hal_codec.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n\nextern \"C\" {\n#if defined(A2DP_LHDC_ON)\n#include \"hal_sysfreq.h\"\n#include \"lhdcUtil.h\"\n#endif\n}\n\nextern \"C\" {\n#if defined(A2DP_LDAC_ON)\n#include \"hal_sysfreq.h\"\n// #include \"speech_memory.h\"\n#include \"ldacBT.h\"\n#define MED_MEM_HEAP_SIZE (1024 * 20)\nHANDLE_LDAC_BT hLdacData = NULL;\n#endif\n}\n\n#include \"a2dp_api.h\"\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n#include \"audio_resample_ex.h\"\n#include \"hal_chipid.h\"\n#include \"hal_sysfreq.h\"\n#endif\n\n#include \"btapp.h\"\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n\n#define TEXT_A2DP_LOC_A(n, l) __attribute__((section(#n \".\" #l)))\n#define TEXT_A2DP_LOC(n, l) TEXT_A2DP_LOC_A(n, l)\n\n#define TEXT_SBC_LOC TEXT_A2DP_LOC(.overlay_a2dp_sbc, __LINE__)\n#define TEXT_AAC_LOC TEXT_A2DP_LOC(.overlay_a2dp_aac, __LINE__)\n#define TEXT_SSC_LOC TEXT_A2DP_LOC(.overlay_a2dp_ssc, __LINE__)\n#define TEXT_LDAC_LOC TEXT_A2DP_LOC(.overlay_a2dp_ldac, __LINE__)\n#define TEXT_LHDC_LOC TEXT_A2DP_LOC(.overlay_a2dp_lhdc, __LINE__)\n\n// #define A2DP_AUDIO_SYNC_WITH_LOCAL (1)\n\n#define A2DP_AUDIO_SYNC_TRACE(s, ...)\n// TRACE(s, ##__VA_ARGS__)\n\n#ifdef A2DP_AUDIO_SYNC_WITH_LOCAL\n#define A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_DEFAULT (0)\n#define A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_INC (2)\n#define A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_DEC (-2)\n#define A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_STEP (0.00005f)\n#define A2DPPLAY_SYNC_STATUS_SET (0x01)\n#define A2DPPLAY_SYNC_STATUS_RESET (0x02)\n#define A2DPPLAY_SYNC_STATUS_PROC (0x04)\n\nenum A2DP_AUDIO_SYNC_STATUS {\n A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEC,\n A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_INC,\n A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEFAULT,\n};\n#endif\n\n#define A2DPPLAY_CACHE_OK_THRESHOLD (sbc_frame_size << 6)\n\nenum A2DPPLAY_STRTEAM_T {\n A2DPPLAY_STRTEAM_PUT = 0,\n A2DPPLAY_STRTEAM_GET,\n A2DPPLAY_STRTEAM_QTY,\n};\n\n/* sbc queue */\n#define SBC_TEMP_BUFFER_SIZE 128\n#define SBC_QUEUE_SIZE_DEFAULT (SBC_TEMP_BUFFER_SIZE * 64)\n#define SBC_QUEUE_SIZE (1024 * 11)\n\n/* sbc decoder */\nstatic bool need_init_decoder = true;\nstatic btif_sbc_decoder_t *sbc_decoder = NULL;\n\nstatic float sbc_eq_band_gain[CFG_HW_AUD_EQ_NUM_BANDS];\n\nCQueue sbc_queue;\n\nstatic uint32_t g_sbc_queue_size = SBC_QUEUE_SIZE_DEFAULT;\nstatic uint16_t sbc_frame_size = SBC_TEMP_BUFFER_SIZE;\nstatic uint16_t sbc_frame_rev_len = 0;\nstatic uint16_t sbc_frame_num = 0;\nstatic uint32_t assumed_mtu_interval = 0;\n\nstatic uint32_t dec_start_time;\nstatic uint32_t last_dec_time;\n#ifdef A2DP_TRACE_DEC_TIME\nstatic const bool dec_trace_time = true;\n#else\nstatic bool dec_trace_time;\n#endif\nstatic bool dec_reset_queue;\n\nstatic enum APP_AUDIO_CACHE_T a2dp_cache_status = APP_AUDIO_CACHE_QTY;\n\n#define A2DP_SYNC_WITH_GET_MUTUX_TIMEROUT_CNT (5)\n#define A2DP_SYNC_WITH_GET_MUTUX_TIMEROUT_MS (20)\nstatic osThreadId a2dp_put_thread_tid = NULL;\nstatic bool a2dp_get_need_sync = false;\n\nextern enum AUD_SAMPRATE_T a2dp_sample_rate;\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n#ifdef CHIP_BEST1000\nstatic bool allow_resample = false;\n#else\nstatic const bool allow_resample = true;\n#endif\n#endif\n\nextern int a2dp_timestamp_parser_needsync(void);\n\n#define A2DP_SYNC_WITH_GET_MUTUX_ALLOC() \\\n do { \\\n if (a2dp_put_thread_tid == NULL) { \\\n a2dp_put_thread_tid = osThreadGetId(); \\\n } \\\n } while (0)\n\n#define A2DP_SYNC_WITH_GET_MUTUX_FREE() \\\n do { \\\n a2dp_put_thread_tid = NULL; \\\n } while (0)\n\n#define A2DP_SYNC_WITH_GET_MUTUX_WAIT() \\\n do { \\\n a2dp_get_need_sync = true; \\\n if (a2dp_put_thread_tid) { \\\n osSignalClear(a2dp_put_thread_tid, 0x80); \\\n osSignalWait(0x80, A2DP_SYNC_WITH_GET_MUTUX_TIMEROUT_MS); \\\n } \\\n } while (0)\n\n#define A2DP_SYNC_WITH_GET_MUTUX_SET() \\\n do { \\\n if (a2dp_get_need_sync) { \\\n a2dp_get_need_sync = false; \\\n if (a2dp_put_thread_tid) { \\\n osSignalSet(a2dp_put_thread_tid, 0x80); \\\n } \\\n } \\\n } while (0)\n\n// #define A2DP_SYNC_WITH_PUT_MUTUX (1)\n#define A2DP_SYNC_WITH_PUT_MUTUX_TIMEROUT_CNT (1)\n#define A2DP_SYNC_WITH_PUT_MUTUX_TIMEROUT_MS (3)\nstatic osThreadId a2dp_get_thread_tid = NULL;\nstatic bool a2dp_get_put_sync = false;\n\n#define A2DP_SYNC_WITH_PUT_MUTUX_ALLOC() \\\n do { \\\n if (a2dp_get_thread_tid == NULL) { \\\n a2dp_get_thread_tid = osThreadGetId(); \\\n } \\\n } while (0)\n\n#define A2DP_SYNC_WITH_PUT_MUTUX_FREE() \\\n do { \\\n a2dp_get_thread_tid = NULL; \\\n } while (0)\n\n#define A2DP_SYNC_WITH_PUT_MUTUX_WAIT() \\\n do { \\\n a2dp_get_put_sync = true; \\\n if (a2dp_get_thread_tid) { \\\n osSignalClear(a2dp_get_thread_tid, 0x80); \\\n osSignalWait(0x5, A2DP_SYNC_WITH_PUT_MUTUX_TIMEROUT_MS); \\\n } \\\n } while (0)\n\n#define A2DP_SYNC_WITH_PUT_MUTUX_SET() \\\n do { \\\n if (a2dp_get_put_sync) { \\\n a2dp_get_put_sync = false; \\\n if (a2dp_get_thread_tid) { \\\n osSignalSet(a2dp_get_thread_tid, 0x80); \\\n } \\\n } \\\n } while (0)\n\nint a2dp_audio_sbc_set_frame_info(int rcv_len, int frame_num) {\n if ((!rcv_len) || (!frame_num)) {\n return 0;\n }\n\n if (sbc_frame_rev_len != rcv_len || sbc_frame_num != frame_num) {\n sbc_frame_rev_len = rcv_len;\n sbc_frame_num = frame_num;\n sbc_frame_size = rcv_len / frame_num;\n }\n\n return 0;\n}\n\nextern struct BT_DEVICE_T app_bt_device;\nextern uint8_t a2dp_channel_num[BT_DEVICE_NUM];\nvoid expand_1_channel_to_2_channels_16bits(unsigned char *in,\n unsigned int in_len) {\n int cnt = 0;\n int len = in_len;\n short *ptr = (short *)in + in_len / 2;\n short *ptr_out = (short *)in + in_len;\n\n while (len > 0) {\n *(ptr_out - 2 * cnt - 1) = *(ptr - cnt);\n *(ptr_out - 2 * cnt - 2) = *(ptr - cnt);\n cnt += 1;\n len -= 2;\n }\n}\n\n#ifdef A2DP_AUDIO_SYNC_WITH_LOCAL\nstatic enum A2DP_AUDIO_SYNC_STATUS sync_status =\n A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEFAULT;\n\nstatic int a2dp_audio_sync_proc(uint8_t status, int shift) {\n#if !(defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE))\n struct AF_STREAM_CONFIG_T *cfg;\n\n bool need_shift = false;\n static int cur_shift = 0;\n static int dest_shift = 0;\n\n LOCK_APP_AUDIO_QUEUE();\n if (status & A2DPPLAY_SYNC_STATUS_RESET) {\n sync_status = A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEFAULT;\n cur_shift = 0;\n dest_shift = 0;\n }\n if (status & A2DPPLAY_SYNC_STATUS_SET) {\n dest_shift = shift;\n }\n if (cur_shift > dest_shift) {\n cur_shift--;\n need_shift = true;\n }\n if (cur_shift < dest_shift) {\n cur_shift++;\n need_shift = true;\n }\n if (need_shift) {\n A2DP_AUDIO_SYNC_TRACE(1, \"a2dp_audio_sync_proc shift:%d\\n\", cur_shift);\n uint32_t ret =\n af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &cfg, false);\n if (0 == ret) {\n af_codec_tune(AUD_STREAM_PLAYBACK,\n A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_STEP * cur_shift);\n }\n }\n UNLOCK_APP_AUDIO_QUEUE();\n#endif\n return 0;\n}\n#endif\n\nbool a2dp_audio_isrunning(enum A2DPPLAY_STRTEAM_T stream, bool run) {\n static bool stream_running[A2DPPLAY_STRTEAM_QTY] = {false, false};\n\n if (stream >= A2DPPLAY_STRTEAM_QTY)\n return false;\n\n stream_running[stream] = run;\n\n if (stream_running[A2DPPLAY_STRTEAM_PUT] &&\n stream_running[A2DPPLAY_STRTEAM_GET])\n return true;\n else\n return false;\n}\n\n#if defined(A2DP_AAC_ON)\n#define AAC_READBUF_SIZE (2048)\n\nuint32_t aac_maxreadBytes = AAC_READBUF_SIZE;\nuint32_t aac_frame_mute = 0;\n\nint decode_aac_frame(unsigned char *pcm_buffer, unsigned int pcm_len);\n#endif\n\n#if defined(A2DP_LHDC_ON)\n#include \"hal_timer.h\"\n#define A2DP_LHDC_DEFAULT_LATENCY 1\nuint8_t latencyIndex = 0;\nuint8_t latencyUpdated = 0;\n\nuint16_t latencyTable[] = {50, 150, 300};\n\nuint8_t magicTag[] = {'l', 'h', 'd', 'c'};\ntypedef struct {\n uint8_t tag[4];\n uint32_t packetLen;\n uint8_t dptr[0];\n} LHDC_HEADER;\n\ntypedef struct {\n uint16_t frame_len;\n bool isSplit;\n bool isLeft;\n} LHDC_FRAME_HDR;\n\n#define LHDC_READBUF_SIZE \\\n 1024 * 4 /* pick something big enough to hold a bunch of frames */\nuint8_t lhdcTempBuf[LHDC_READBUF_SIZE];\nuint8_t lhdc_input_mid_buf[LHDC_READBUF_SIZE];\n#define L2CAP_MTU 672\n#define PACKET_MTU_SIZE (L2CAP_MTU - 12)\n\nvoid initial_lhdc_assemble_packet(bool splitFlg);\n/**\n * get lhdc frame header\n */\nbool get_lhdc_header(uint8_t *in, LHDC_FRAME_HDR *h);\n\nuint32_t get_lhdc_frame(uint8_t *frame_q, size_t q_available_size,\n uint8_t *out_buf, uint32_t *out_size,\n uint32_t *out_frames);\n/**\n * Grabe lhdc data from queue\n */\nint get_lhdc_data(unsigned char *frame, unsigned int len);\nint assemble_lhdc_packet(uint8_t *input, uint32_t input_len, uint8_t **pLout,\n uint32_t *pLlen, uint8_t **pRout, uint32_t *pRlen);\n\n#endif\n#if defined(A2DP_LDAC_ON)\n#define LDAC_FRAME_LEN_INDEX_106 106\n#define LDAC_FRAME_LEN_INDEX_128 128\n#define LDAC_FRAME_LEN_INDEX_160 160\n#define LDAC_FRAME_LEN_INDEX_216 216\n#define LDAC_FRAME_LEN_INDEX_326 326\n\nuint8_t get_ldac_frame_num(uint16_t frame_length_index) {\n uint8_t frame_num = 0;\n switch (frame_length_index) {\n case LDAC_FRAME_LEN_INDEX_106:\n frame_num = 6;\n break;\n case LDAC_FRAME_LEN_INDEX_128:\n frame_num = 5;\n break;\n case LDAC_FRAME_LEN_INDEX_160:\n frame_num = 4;\n break;\n case LDAC_FRAME_LEN_INDEX_216:\n frame_num = 3;\n break;\n case LDAC_FRAME_LEN_INDEX_326:\n frame_num = 2;\n break;\n default:\n ASSERT(0, \"Unknown ldac frame format: %d !!!!!\", frame_length_index);\n break;\n }\n return frame_num;\n}\n#endif\n\n#define DELAY_MTU_LIMIT 8\n\nstatic volatile int delay_mtu_limit = DELAY_MTU_LIMIT;\nstatic volatile int mtu_count = 0;\nstatic volatile int delay_mtu_count = 0;\nbool app_bt_stream_trigger_onprocess(void);\nvoid app_bt_stream_trigger_start(uint8_t offset);\n\nvoid a2dp_audio_set_mtu_limit(uint8_t mut) { delay_mtu_limit = mut; }\n\nstatic uint32_t old_t = 0;\nstatic uint32_t ssb_err = 0;\nstatic uint32_t ssb_err_max = 0;\nstatic uint32_t ssb_err_min = 0xffffffff;\nstatic uint32_t lagest_mtu_in1s = 0;\nstatic uint32_t least_mtu_in1s = 0xffffffff;\nstatic uint32_t check_interval = 50;\n\nint store_sbc_buffer(unsigned char *buf, unsigned int len) {\n int POSSIBLY_UNUSED size;\n int cnt = 0;\n int nRet = 0;\n#if defined(A2DP_LHDC_ON)\n uint32_t newLen = 0;\n bool mtu_plus = false;\n#endif\n#if defined(A2DP_LDAC_ON)\n uint16_t frame_length_index = 0;\n#endif\n uint32_t now_t = TICKS_TO_MS(hal_sys_timer_get());\n ssb_err = now_t - old_t;\n old_t = now_t;\n\n if (ssb_err < 500) {\n if (ssb_err_max < ssb_err)\n ssb_err_max = ssb_err;\n if (ssb_err_min > ssb_err)\n ssb_err_min = ssb_err;\n }\n\n if (!a2dp_audio_isrunning(A2DPPLAY_STRTEAM_PUT, true)) {\n TRACE(3, \"%s not ready:%d cache_status:%d\", __func__, len,\n a2dp_cache_status);\n }\n uint8_t overlay_id = app_get_current_overlay();\n\n if (overlay_id == APP_OVERLAY_A2DP) {\n // TRACE(8,\"sbc %d %x %x %x %x mtu_count:%d\n // sbcqueue:%d,sbc_frame_rev_len=%d\", len, buf[0],\n // buf[1],buf[2],buf[3],mtu_count,APP_AUDIO_LengthOfCQueue(&sbc_queue),sbc_frame_rev_len);\n }\n#if defined(A2DP_LDAC_ON)\n else if (overlay_id == APP_OVERLAY_A2DP_LDAC) {\n uint16_t data1 = (uint16_t)(buf[1] & 0x07);\n uint16_t data2 = (uint16_t)buf[2];\n frame_length_index = ((data1 << 6 & 0xFFFF) | (data2 >> 2 & 0xFFFF));\n sbc_frame_num = get_ldac_frame_num(frame_length_index);\n // TRACE(10,\"ldac %d %d %x %x %x %x mtu_count:%d\n // sbcqueue:%d,sbc_frame_rev_len=%d,sbc_frame_num %d\", len,\n // sbc_frame_size,buf[0],\n // buf[1],buf[2],buf[3],mtu_count,APP_AUDIO_LengthOfCQueue(&sbc_queue),sbc_frame_rev_len,sbc_frame_num);\n }\n#endif\n else {\n // TRACE(8,\"AAC %d %x %x %x %x mtu_count:%d\n // sbcqueue:%d,sbc_frame_rev_len=%d\", len, buf[0],\n // buf[1],buf[2],buf[3],mtu_count,APP_AUDIO_LengthOfCQueue(&sbc_queue),sbc_frame_rev_len);\n }\n\n switch (a2dp_cache_status) {\n case APP_AUDIO_CACHE_CACHEING: {\n#if defined(A2DP_LHDC_ON)\n newLen = 0;\n if (overlay_id == APP_OVERLAY_A2DP_LHDC) {\n uint32_t lSize = 0, rSize = 0;\n uint8_t *lPTR = NULL, *rPTR = NULL;\n // TRACE(2,\"%s:APP_AUDIO_CACHE_CACHEING Enter len = %d\",__func__, len);\n // TRACE(2,\"%s: input len(%d)\",__func__, len);\n if (assemble_lhdc_packet(buf, len, &lPTR, &lSize, &rPTR, &rSize) > 0) {\n if (lPTR != NULL && lSize != 0) {\n newLen = lSize + sizeof(LHDC_HEADER);\n memcpy(lhdcTempBuf + sizeof(LHDC_HEADER), lPTR, lSize);\n memcpy(lhdcTempBuf, magicTag, sizeof(magicTag));\n memcpy(lhdcTempBuf + sizeof(magicTag), &lSize, sizeof(unsigned int));\n mtu_plus = true;\n }\n } else {\n nRet = 0;\n }\n }\n#endif\n\n LOCK_APP_AUDIO_QUEUE();\n#if defined(A2DP_LHDC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_LHDC) {\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, lhdcTempBuf, newLen);\n size = APP_AUDIO_LengthOfCQueue(&sbc_queue);\n } else\n#endif\n\n#if defined(A2DP_LDAC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_LDAC) {\n // if(bt_sbc_player_get_codec_type() == BTIF_AVDTP_CODEC_TYPE_NON_A2DP){\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, buf, len);\n size = APP_AUDIO_LengthOfCQueue(&sbc_queue);\n } else\n#endif\n\n#if defined(A2DP_AAC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_AAC) {\n nRet = AvailableOfCQueue(&sbc_queue);\n if (nRet >= (int)(len + 2)) {\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, (uint8_t *)&len, 2);\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, buf, len);\n } else\n nRet = CQ_ERR;\n } else\n#endif\n\n {\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, buf, len);\n }\n size = APP_AUDIO_LengthOfCQueue(&sbc_queue);\n#if defined(A2DP_LHDC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_LHDC) {\n if (mtu_plus) {\n if (delay_mtu_count == 0)\n mtu_count = 0;\n delay_mtu_count++;\n mtu_count++;\n mtu_plus = false;\n }\n } else {\n#endif\n if (overlay_id == APP_OVERLAY_A2DP\n#if defined(A2DP_LDAC_ON)\n || overlay_id == APP_OVERLAY_A2DP_LDAC\n#endif\n ) {\n if (delay_mtu_count == 0)\n mtu_count = 0;\n delay_mtu_count += sbc_frame_num;\n mtu_count += sbc_frame_num;\n //\t\t\t\t\tTRACE(1,\"+mtu_count =\n //%d\",mtu_count);\n } else {\n if (delay_mtu_count == 0)\n mtu_count = 0;\n delay_mtu_count++;\n mtu_count++;\n }\n#if defined(A2DP_LHDC_ON)\n }\n#endif\n UNLOCK_APP_AUDIO_QUEUE();\n bool flag = 0;\n#if defined(A2DP_AAC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_AAC)\n flag = 1;\n#endif\n#if defined(A2DP_SCALABLE_ON)\n if (overlay_id == APP_OVERLAY_A2DP_SCALABLE)\n flag = 1;\n#endif\n#if defined(A2DP_LHDC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_LHDC)\n flag = 1;\n#endif\n#if defined(A2DP_LDAC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_LDAC) {\n flag = 1;\n TRACE(0, \"y# ldac cache\");\n }\n#endif\n\n if (flag) {\n#ifdef __A2DP_PLAYER_USE_BT_TRIGGER__\n if (app_bt_stream_trigger_onprocess() && mtu_count) {\n TRACE(0, \"cache ok use dma trigger\\n\");\n a2dp_cache_status = APP_AUDIO_CACHE_OK;\n app_bt_stream_trigger_start(0);\n }\n#else\n if (delay_mtu_count >= delay_mtu_limit) {\n TRACE(2, \"aac cache ok:%d,mtu_count=%d\\n\", size, mtu_count);\n a2dp_cache_status = APP_AUDIO_CACHE_OK;\n }\n#endif\n } else {\n#ifdef __A2DP_PLAYER_USE_BT_TRIGGER__\n if (app_bt_stream_trigger_onprocess() && mtu_count) {\n TRACE(0, \"cache ok use dma trigger\\n\");\n a2dp_cache_status = APP_AUDIO_CACHE_OK;\n app_bt_stream_trigger_start(0);\n }\n#else\n if (delay_mtu_count >= delay_mtu_limit) {\n TRACE(4, \"cache ok:%d,%d,%d,mtu_count=%d\\n\", size, len, sbc_frame_size,\n mtu_count);\n a2dp_cache_status = APP_AUDIO_CACHE_OK;\n } else if (sbc_frame_size && (size >= A2DPPLAY_CACHE_OK_THRESHOLD)) {\n TRACE(2, \"cache ok:%d,mtu_count=%d\\n\", size, mtu_count);\n a2dp_cache_status = APP_AUDIO_CACHE_OK;\n } else {\n TRACE(1, \"cache add:%d\\n\", len);\n }\n#endif\n }\n\n if (nRet == CQ_ERR) {\n TRACE(0, \"cache add overflow\\n\");\n a2dp_cache_status = APP_AUDIO_CACHE_OK;\n }\n if (a2dp_cache_status == APP_AUDIO_CACHE_OK) {\n old_t = 0;\n ssb_err = 0;\n ssb_err_max = 0;\n ssb_err_min = 0xffffffff;\n lagest_mtu_in1s = 0;\n least_mtu_in1s = 0xffffffff;\n check_interval = 50;\n#ifdef __LOCK_AUDIO_THREAD__\n af_unlock_thread();\n#endif\n A2DP_SYNC_WITH_GET_MUTUX_ALLOC();\n A2DP_SYNC_WITH_GET_MUTUX_WAIT();\n#ifdef __LOCK_AUDIO_THREAD__\n af_lock_thread();\n#endif\n }\n break;\n }\n case APP_AUDIO_CACHE_OK: {\n delay_mtu_count = 0;\n#if defined(A2DP_LHDC_ON)\n newLen = 0;\n if (overlay_id == APP_OVERLAY_A2DP_LHDC) {\n uint32_t lSize = 0, rSize = 0;\n uint8_t *lPTR = NULL, *rPTR = NULL;\n // TRACE(2,\"%s: input len(%d)\",__func__, len);\n if (assemble_lhdc_packet(buf, len, &lPTR, &lSize, &rPTR, &rSize) > 0) {\n if (lPTR != NULL && lSize != 0) {\n newLen = lSize + sizeof(LHDC_HEADER);\n memcpy(lhdcTempBuf + sizeof(LHDC_HEADER), lPTR, lSize);\n memcpy(lhdcTempBuf, magicTag, sizeof(magicTag));\n memcpy(lhdcTempBuf + sizeof(magicTag), &lSize, sizeof(unsigned int));\n mtu_plus = true;\n }\n }\n }\n#endif\n do {\n LOCK_APP_AUDIO_QUEUE();\n#if defined(A2DP_LHDC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_LHDC) {\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, lhdcTempBuf, newLen);\n } else\n#endif\n#if defined(A2DP_AAC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_AAC) {\n nRet = AvailableOfCQueue(&sbc_queue);\n if (nRet >= (int)(len + 2)) {\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, (uint8_t *)&len, 2);\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, buf, len);\n } else\n nRet = CQ_ERR;\n } else\n#endif\n\n {\n nRet = APP_AUDIO_EnCQueue(&sbc_queue, buf, len);\n }\n if (CQ_OK == nRet) {\n#if defined(A2DP_LHDC_ON)\n if (overlay_id == APP_OVERLAY_A2DP_LHDC) {\n if (mtu_plus) {\n mtu_count++;\n mtu_plus = false;\n }\n } else {\n#endif\n if (overlay_id == APP_OVERLAY_A2DP\n#if defined(A2DP_LDAC_ON)\n || overlay_id == APP_OVERLAY_A2DP_LDAC\n#endif\n ) {\n mtu_count += sbc_frame_num;\n //\t\t\t\t\t\t\tTRACE(1,\"+mtu_count\n //= %d\",mtu_count);\n } else {\n mtu_count++;\n }\n#if defined(A2DP_LHDC_ON)\n }\n#endif\n }\n // size = APP_AUDIO_LengthOfCQueue(&sbc_queue);\n UNLOCK_APP_AUDIO_QUEUE();\n // TRACE(3,\"cache add:%d %d/%d \\n\", len, size,\n // g_sbc_queue_size);\n if (CQ_OK == nRet) {\n nRet = 0;\n break;\n } else {\n TRACE(1, \"cache flow control:%d\\n\", cnt);\n#ifdef A2DP_AUDIO_SYNC_WITH_LOCAL\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_SET, 0);\n#endif\n nRet = -1;\n#ifdef __LOCK_AUDIO_THREAD__\n af_unlock_thread();\n#endif\n A2DP_SYNC_WITH_GET_MUTUX_ALLOC();\n A2DP_SYNC_WITH_GET_MUTUX_WAIT();\n#ifdef __LOCK_AUDIO_THREAD__\n af_lock_thread();\n#endif\n }\n } while (cnt++ < A2DP_SYNC_WITH_GET_MUTUX_TIMEROUT_CNT);\n break;\n }\n case APP_AUDIO_CACHE_QTY:\n default:\n break;\n }\n#ifdef A2DP_SYNC_WITH_PUT_MUTUX\n A2DP_SYNC_WITH_PUT_MUTUX_SET();\n#endif\n\n if (nRet) {\n TRACE(0, \"cache overflow\\n\");\n }\n return 0;\n}\n\n#if defined(A2DP_LDAC_ON)\n\n#define LDAC_READBUF_SIZE \\\n 1024 /* pick something big enough to hold a bunch of frames */\nuint8_t ldac_input_mid_buf[LDAC_READBUF_SIZE + 2];\n\n/*\n * Grabe lhdc data from queue\n */\nTEXT_LDAC_LOC\nint get_ldac_data(unsigned char *frame, unsigned int len) {\n int status;\n unsigned int len1 = 0, len2 = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n LOCK_APP_AUDIO_QUEUE();\n unsigned int queu_len = (unsigned int)LengthOfCQueue(&sbc_queue);\n len = queu_len < len ? queu_len : len;\n status = PeekCQueue(&sbc_queue, len, &e1, &len1, &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n if (status != CQ_OK) {\n return 0;\n }\n\n if (e1) {\n memcpy(frame, e1, len1);\n }\n if (e2) {\n memcpy(frame + len1, e2, len2);\n }\n return len;\n}\n\n/**\n * Decode LDAC data...\n */\n// #include \"os_tcb.h\"\nextern const char *get_error_code_string(int error_code);\nextern int app_audio_mempool_force_set_buff_used(uint32_t size);\nextern uint32_t ldac_buffer_used;\nuint32_t skip_ldac_frame = 2;\nstatic bool ldac_recovery;\n\nTEXT_LDAC_LOC\nint ldac_dec_init(void) {\n if (hLdacData) {\n return 0;\n }\n\n int sample_rate = bt_get_ladc_sample_rate();\n int channel_mode = bt_ldac_player_get_channelmode();\n TRACE(2, \"a2dp_audio_init sample Rate=%d, channel_mode = %d\\n\", sample_rate,\n channel_mode);\n // TRACE(1,\"sys freq calc : %d\\n\", hal_sys_timer_calc_cpu_freq(0));\n TRACE(0, \"ldac need init here!!!! \\n\");\n if ((hLdacData = ldacBT_get_handle()) == (HANDLE_LDAC_BT)NULL) {\n TRACE(0, \"Error: Can not Get LDAC Handle!\\n\");\n return 1;\n }\n int result =\n ldacBT_init_handle_decode(hLdacData, channel_mode, sample_rate, 0, 0, 0);\n if (result) {\n TRACE(1, \"[ERR] Initializing LDAC Handle for synthesis! Error code %s\\n\",\n get_error_code_string(ldacBT_get_error_code(hLdacData)));\n return 2;\n }\n return 0;\n}\n\nTEXT_LDAC_LOC\nint ldac_dec_deinit(void) {\n ldacBT_free_handle(hLdacData);\n hLdacData = NULL;\n app_audio_mempool_force_set_buff_used(ldac_buffer_used);\n return 0;\n}\n\nTEXT_LDAC_LOC\nint ldac_seek_header(uint32_t n_read_bytes, uint32_t *p_parse_bytes) {\n int channel_mode = 0;\n int sample_rate = 0;\n\n if (p_parse_bytes) {\n *p_parse_bytes = 0;\n }\n\n if (n_read_bytes < 2) {\n return 1;\n }\n\n /* update used_bytes to skip current ldac frame */\n sample_rate = bt_get_ladc_sample_rate();\n channel_mode = bt_ldac_player_get_channelmode();\n\n if (1) {\n unsigned char *pStream, *p1st, *p2nd, *pTail;\n unsigned char sync2 = 0;\n unsigned char cci = 0;\n p1st = p2nd = NULL;\n pStream = ldac_input_mid_buf;\n pTail = ldac_input_mid_buf + n_read_bytes - 2;\n switch (channel_mode) {\n case LDACBT_CHANNEL_MODE_MONO:\n cci = LDAC_CCI_MONO;\n break;\n case LDACBT_CHANNEL_MODE_DUAL_CHANNEL:\n cci = LDAC_CCI_DUAL_CHANNEL;\n break;\n case LDACBT_CHANNEL_MODE_STEREO:\n default:\n cci = LDAC_CCI_STEREO;\n break;\n }\n if (0) {\n ;\n } else if (sample_rate == 1 * 44100) {\n sync2 = (0 << 5) | (cci << 3);\n } else if (sample_rate == 1 * 48000) {\n sync2 = (1 << 5) | (cci << 3);\n } else if (sample_rate == 2 * 44100) {\n sync2 = (2 << 5) | (cci << 3);\n } else if (sample_rate == 2 * 48000) {\n sync2 = (3 << 5) | (cci << 3);\n }\n while (pStream < pTail) {\n if (pStream[0] == 0xAA) { /* syncword */\n if ((pStream[1] & 0xF8) == sync2) {\n if (p1st == NULL) {\n p1st = pStream;\n } /* 1st syncword found */\n else { /* 2nd syncword found, this frame must decode next time */\n p2nd = pStream;\n if (p_parse_bytes) {\n *p_parse_bytes = pStream - ldac_input_mid_buf;\n }\n break;\n }\n }\n }\n ++pStream;\n }\n if (p2nd == NULL) {\n /* faild to find next frame header */\n TRACE(0, \"Error: Can not get next LDAC frame_header!\\n\");\n return 1;\n }\n }\n\n return 0;\n}\n\nTEXT_LDAC_LOC\nint load_ldac_frame(uint8_t **p_data, uint32_t *p_len) {\n#if 1\n uint8_t retry = 0;\n int len;\n int result = 0;\n\n if (hLdacData == NULL) {\n return 1;\n }\n\n while (true) {\n len = get_ldac_data(ldac_input_mid_buf, LDAC_READBUF_SIZE);\n if (len == 0) {\n if (retry++ >= A2DP_SYNC_WITH_PUT_MUTUX_TIMEROUT_CNT) {\n TRACE(0, \"ldac No Data return\");\n result = 1;\n break;\n }\n continue;\n }\n\n if (ldac_recovery) {\n uint32_t parse_bytes;\n\n result = ldac_seek_header(len, &parse_bytes);\n if (result == 0) {\n ldac_recovery = false;\n }\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&sbc_queue, 0, parse_bytes);\n UNLOCK_APP_AUDIO_QUEUE();\n continue;\n }\n\n break;\n }\n\n if (skip_ldac_frame > 0) {\n skip_ldac_frame--;\n }\n#endif\n\n return result;\n}\n\nTEXT_LDAC_LOC\nint decode_ldac_frame(uint8_t *out, uint32_t out_max, uint32_t *p_out_len,\n const uint8_t *in, uint32_t in_len,\n uint32_t *p_consume_len) {\n int result;\n int n_read_bytes, used_bytes, wrote_bytes;\n\n n_read_bytes = LDAC_READBUF_SIZE;\n\n result =\n ldacBT_decode(hLdacData, ldac_input_mid_buf, out, LDACBT_SMPL_FMT_S16,\n n_read_bytes, &used_bytes, &wrote_bytes);\n\n if (p_out_len) {\n *p_out_len = wrote_bytes;\n }\n if (p_consume_len) {\n *p_consume_len = used_bytes;\n }\n\n return result;\n}\n\nTEXT_LDAC_LOC\nint consume_ldac_frame(const uint8_t *data, uint32_t len) {\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&sbc_queue, 0, len);\n mtu_count--;\n UNLOCK_APP_AUDIO_QUEUE();\n\n return 0;\n}\n\nTEXT_LDAC_LOC\nvoid decode_ldac_end(uint32_t expect_out_len, uint32_t out_len,\n uint32_t in_len) {\n if (expect_out_len != out_len) {\n if (hLdacData) {\n int error_code;\n error_code = ldacBT_get_error_code(hLdacData);\n TRACE(6, \"error_code = %4d, %4d, %4d,FrameHeader[%02x:%02x:%02x]\\n\",\n LDACBT_API_ERR(error_code), LDACBT_HANDLE_ERR(error_code),\n LDACBT_BLOCK_ERR(error_code), ldac_input_mid_buf[0],\n ldac_input_mid_buf[1], ldac_input_mid_buf[2]);\n if (LDACBT_FATAL(error_code)) {\n ldac_dec_deinit();\n }\n }\n if (hLdacData == NULL) {\n /* Recovery Process */\n int result;\n result = ldac_dec_init();\n if (result) {\n ldac_dec_deinit();\n }\n ldac_recovery = true;\n }\n }\n}\n#endif\n\n#if defined(A2DP_AAC_ON)\n#include \"aacdecoder_lib.h\"\n#include \"aacenc_lib.h\"\n#include \"heap_api.h\"\n#define DECODE_AAC_PCM_FRAME_LENGTH (1024 * 4)\n\nHANDLE_AACDECODER aacDec_handle = NULL;\n#define AAC_MEMPOLL_SIZE (40596)\nheap_handle_t aac_memhandle = NULL;\nuint8_t *aac_mempoll = NULL;\n\nstatic unsigned char aac_input_mid_buf[AAC_READBUF_SIZE];\nSTATIC_ASSERT(sizeof(aac_input_mid_buf) >= 2048, \"aac_input_mid_buf too small\");\nstatic uint32_t byte_in_buffer = 0;\n\nint aac_meminit() {\n int ret = 1;\n if (aac_mempoll == NULL)\n ret =\n app_audio_mempool_get_buff((uint8_t **)&aac_mempoll, AAC_MEMPOLL_SIZE);\n if (ret > 0 && aac_memhandle == NULL) {\n aac_memhandle = heap_register(aac_mempoll, AAC_MEMPOLL_SIZE);\n }\n return ret;\n}\n\nvoid aac_memdeinit() {\n extern int total_calloc;\n aac_mempoll = 0;\n aac_memhandle = 0;\n total_calloc = 0;\n byte_in_buffer = 0;\n}\n\nvolatile int aac_slave_codec_patch_bytes = 0;\n\nint aacdec_init(void) {\n if (aacDec_handle == NULL) {\n TRANSPORT_TYPE transportFmt = TT_MP4_LATM_MCP1;\n aacDec_handle = aacDecoder_Open(transportFmt, 1 /* nrOfLayers */);\n\n if (!aacDec_handle) {\n TRACE(1, \"%s Error initializing AAC decoder\", __func__);\n return 1;\n }\n aacDecoder_SetParam(aacDec_handle, AAC_PCM_LIMITER_ENABLE, 0);\n aacDecoder_SetParam(aacDec_handle, AAC_DRC_ATTENUATION_FACTOR, 0);\n aacDecoder_SetParam(aacDec_handle, AAC_DRC_BOOST_FACTOR, 0);\n }\n return 0;\n}\n\nint aacdec_deinit(void) {\n if (aacDec_handle != NULL) {\n aacDecoder_Close(aacDec_handle);\n aacDec_handle = NULL;\n size_t total = 0, used = 0, max_used = 0;\n heap_memory_info(aac_memhandle, &total, &used, &max_used);\n TRACE(3, \"AAC MALLOC MEM: total - %d, used - %d, max_used - %d.\", total,\n used, max_used);\n }\n return 0;\n}\n\nTEXT_AAC_LOC\nstatic int pcm_buffer_read_no_protction(CQueue *queue, uint8_t *buff,\n uint16_t len) {\n uint8_t *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n int status;\n status = PeekCQueue(queue, len, &e1, &len1, &e2, &len2);\n // TRACE(5,\"pcm_buffer_read_no_protction\n // len=%d,len1=%d,len2=%d,e1=0x%x,e2=0x%x\",len,len1,len2,e1,e2);\n if (len == (len1 + len2)) {\n memcpy(buff, e1, len1);\n memcpy(buff + len1, e2, len2);\n DeCQueue(queue, 0, len);\n } else {\n memset(buff, 0x00, len);\n status = -1;\n }\n return status;\n}\n\nTEXT_AAC_LOC\nint load_aac_frame(uint8_t **p_data, uint32_t *p_len) {\n // uint32_t lock;\n unsigned short aac_len = 0;\n int status;\n\n LOCK_APP_AUDIO_QUEUE();\n status = pcm_buffer_read_no_protction(&sbc_queue, (uint8_t *)&aac_len, 2);\n if (status != CQ_OK) {\n UNLOCK_APP_AUDIO_QUEUE();\n // a2dp_cache_status = APP_AUDIO_CACHE_CACHEING;\n return 1;\n }\n\n if (aac_len < 64) {\n aac_maxreadBytes = 64;\n } else if (aac_len < 128) {\n aac_maxreadBytes = 128;\n } else if (aac_len < 256) {\n aac_maxreadBytes = 256;\n } else if (aac_len < 512) {\n aac_maxreadBytes = 512;\n } else if (aac_len < 1024) {\n aac_maxreadBytes = 1024;\n } else {\n if (aac_len >= 2048) {\n // Header is bad!\n dec_reset_queue = true;\n return 2;\n }\n aac_maxreadBytes = 2048;\n }\n\n status = pcm_buffer_read_no_protction(&sbc_queue, aac_input_mid_buf, aac_len);\n if (status != CQ_OK) {\n UNLOCK_APP_AUDIO_QUEUE();\n // a2dp_cache_status = APP_AUDIO_CACHE_CACHEING;\n return 1;\n }\n mtu_count--;\n UNLOCK_APP_AUDIO_QUEUE();\n\n // uint32_t a2dp_queue_bytes = LengthOfCQueue(&sbc_queue);\n // TRACE(3,\"d aac_len=%d, a2dp_bytes=%d, aac_maxreadBytes=%d\\n\", aac_len,\n // a2dp_queue_bytes, aac_maxreadBytes);\n\n if (p_data) {\n *p_data = (unsigned char *)aac_input_mid_buf;\n }\n if (p_len) {\n *p_len = aac_maxreadBytes;\n }\n\n return 0;\n}\n\nTEXT_AAC_LOC\nint decode_aac_frame(uint8_t *out, uint32_t out_max, uint32_t *p_out_len,\n const uint8_t *in, uint32_t in_len,\n uint32_t *p_consume_len) {\n unsigned int bufferSize = in_len;\n unsigned int bytesValid = in_len;\n AAC_DECODER_ERROR err = AAC_DEC_OK;\n CStreamInfo *info = NULL;\n\n // at leat should large than AAC_MAX_NSAMPS*2 (one channel)\n if (out_max < 2048) {\n TRACE(2, \"%s daac pcm_len = %d \\n\", __func__, out_max);\n return 1;\n }\n\n if (a2dp_channel_num[app_bt_device.curr_a2dp_stream_id] == 1) {\n out_max >>= 1;\n }\n\n // int tt = hal_sys_timer_get();\n err =\n aacDecoder_Fill(aacDec_handle, (uint8_t **)&in, &bufferSize, &bytesValid);\n if (err != AAC_DEC_OK) {\n TRACE(1, \"aacDecoder_Fill failed:0x%x\", err);\n // if aac failed reopen it again\n if (is_aacDecoder_Close(aacDec_handle)) {\n aacDec_handle = NULL;\n aacdec_init();\n TRACE(1, \"%s reopen aac codec \\n\", __func__);\n }\n return 2;\n }\n /* decode one AAC frame */\n err = aacDecoder_DecodeFrame(aacDec_handle, (short *)out, out_max / 2,\n 0 /* flags */);\n\n#if 0\n TRACE_IMM(0,\" \");\n for(uint32_t i=0;isampleRate <= 0) {\n TRACE(2, \"%s Invalid stream info %d\", __func__, info->sampleRate);\n return 4;\n }\n int frame_len =\n info->frameSize * info->numChannels * 2; // sizeof(pcm_buffer[0]);\n // TRACE(4,\"aac: %d,frameSize=%d,numChannels=%d use %d ms\\n\",\n // frame_len,info->frameSize,info->numChannels,TICKS_TO_MS(hal_sys_timer_get()-tt));\n\n if (p_out_len) {\n *p_out_len = frame_len;\n }\n if (p_consume_len) {\n *p_consume_len = in_len - bytesValid;\n }\n\n if (a2dp_channel_num[app_bt_device.curr_a2dp_stream_id] == 1) {\n expand_1_channel_to_2_channels_16bits(out, frame_len);\n *p_out_len = frame_len << 1;\n }\n return 0;\n}\n#endif\n\n#ifdef A2DP_EQ_24BIT\nstatic void convert_16bit_to_24bit(int32_t *out, int16_t *in, int len) {\n for (int i = len - 1; i >= 0; i--) {\n out[i] = ((int32_t)in[i] << 8);\n }\n}\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\n\nextern \"C\" {\n#include \"ssc.h\"\n}\n\nunsigned char *scalable_input_mid_buf = NULL;\nunsigned char *scalable_decoder_place = NULL;\nunsigned char *scalable_decoder_temp_buf = NULL;\nvoid *hSSDecoder = NULL;\n\n#if 0\nuint8_t ss_dump[484*10];\nuint32_t ss_dump_index = 0;\n#endif\nextern \"C\" int ssc_decoder_init(void *s, int channels, int Fs);\n\nTEXT_SSC_LOC\nvoid ss_to_24bit_buf(int32_t *out, int32_t *in, int size) {\n for (int i = 0; i < size; i++) {\n out[i] = in[i];\n }\n}\n\nTEXT_SSC_LOC\nvoid ss_to_16bit_buf(int16_t *out, int32_t *in, int size) {\n for (int i = 0; i < size; i++) {\n out[i] = in[i];\n }\n}\n\nstatic int ss_pcm_buff[SCALABLE_FRAME_SIZE << 1];\nstatic int scalable_uhq_flag = 0;\n\nTEXT_SSC_LOC\nint load_scalable_frame(uint8_t **p_data, uint32_t *p_len) {\n int hw_tmp, len, bitrate_bps, frame_size;\n int r = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n int sampling_rate = 44100;\n int extends_flag;\n\n TRACE(0, \"##decode_scalable_frame\");\n uint8_t head[4];\n\n LOCK_APP_AUDIO_QUEUE();\n len1 = len2 = 0;\n e1 = e2 = 0;\n r = PeekCQueue(&sbc_queue, SCALABLE_HEAD_SIZE, &e1, &len1, &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n if (r == CQ_ERR) {\n // osDelay(2);\n TRACE(2, \"no data head xxx %d/%d\", LengthOfCQueue(&sbc_queue),\n AvailableOfCQueue(&sbc_queue));\n // goto get_scalable_head_again;\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&sbc_queue, head, 4);\n UNLOCK_APP_AUDIO_QUEUE();\n hal_trace_dump(\"sss %01x\", 1, 4, head);\n return 1;\n } else {\n // normal\n if (e1) {\n memcpy(scalable_input_mid_buf, e1, len1);\n }\n if (e2) {\n memcpy(scalable_input_mid_buf + len1, e2, len2);\n }\n }\n\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&sbc_queue, 0, 4);\n UNLOCK_APP_AUDIO_QUEUE();\n\n scalable_uhq_flag = 0;\n\n extends_flag = ((scalable_input_mid_buf[3] >> 3) & 1);\n switch ((scalable_input_mid_buf[3] & 0xf7)) {\n case 0xF0:\n bitrate_bps = 88000;\n break;\n case 0xF1:\n bitrate_bps = 96000;\n break;\n case 0xF2:\n bitrate_bps = 128000;\n break;\n case 0xF3:\n bitrate_bps = 192000;\n break;\n case 0xF5:\n scalable_uhq_flag = 1;\n bitrate_bps = 328000;\n sampling_rate = 96000;\n break;\n default:\n bitrate_bps = 88000;\n break;\n }\n\n frame_size = SCALABLE_FRAME_SIZE;\n\n len = bitrate_bps * frame_size / sampling_rate / 8;\n if (scalable_uhq_flag == 0) {\n hw_tmp = (len * 3) >> 7;\n len = hw_tmp + len;\n len = len + ((len & 1) ^ 1);\n } else {\n len = 369; // 744/2-4+1\n }\n TRACE(4, \"len %d,uhq:%d ext:%d extbitrate_bps %d\", len, scalable_uhq_flag,\n extends_flag, bitrate_bps);\n\n LOCK_APP_AUDIO_QUEUE();\n len1 = len2 = 0;\n e1 = e2 = 0;\n r = PeekCQueue(&sbc_queue, len - 1, &e1, &len1, &e2, &len2);\n if (r == CQ_ERR) {\n // osDelay(2);\n TRACE(0, \"no data \");\n UNLOCK_APP_AUDIO_QUEUE();\n return 2;\n } else {\n // normal\n if (e1) {\n memcpy(scalable_input_mid_buf + 4, e1, len1);\n }\n if (e2) {\n memcpy(scalable_input_mid_buf + 4 + len1, e2, len2);\n }\n }\n //\tUNLOCK_APP_AUDIO_QUEUE();\n\n // LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&sbc_queue, 0, len - 1);\n UNLOCK_APP_AUDIO_QUEUE();\n // TRACE(2,\"len1 %d, len2 %d\\n\", len1, len2);\n\n if (p_data) {\n *p_data = scalable_input_mid_buf;\n }\n if (p_len) {\n *p_len = len - 1;\n }\n\n return 0;\n}\n\nTEXT_SSC_LOC\nint decode_scalable_frame(uint8_t *out, uint32_t out_max, uint32_t *p_out_len,\n const uint8_t *in, uint32_t in_len,\n uint32_t *p_consume_len) {\n uint32_t out_len;\n int decoder_size;\n int output_samples;\n int err;\n\n out_len = SCALABLE_FRAME_SIZE * 2;\n\n if (hSSDecoder == NULL) {\n hSSDecoder = (void *)scalable_decoder_place;\n // err = ssc_decoder_create(44100, 2, hSSDecoder);\n decoder_size = ssc_decoder_get_size(2, 96000);\n err = ssc_decoder_init(hSSDecoder, 2, 96000);\n TRACE(2, \"decoder_size %d init ret %d\\n\", decoder_size, err);\n }\n\n if (a2dp_channel_num[app_bt_device.curr_a2dp_stream_id] == 1) {\n ASSERT(0, \"UHQ should check audio channel number\");\n }\n output_samples =\n ssc_decode(hSSDecoder, scalable_input_mid_buf, (int *)ss_pcm_buff,\n SCALABLE_FRAME_SIZE, scalable_decoder_temp_buf);\n if (scalable_uhq_flag) {\n ss_to_24bit_buf((int32_t *)out, (int32_t *)ss_pcm_buff, out_len);\n out_len *= 4;\n } else {\n ss_to_16bit_buf((int16_t *)out, (int32_t *)ss_pcm_buff, out_len);\n out_len *= 2;\n }\n\n TRACE(2, \"pcm_len %d o:%d\", out_len, output_samples);\n\n if (p_out_len) {\n *p_out_len = out_len;\n }\n if (p_consume_len) {\n *p_consume_len = 0;\n }\n\n return 0;\n}\n#endif\n\nstatic unsigned int sbc_next_frame_size;\nstatic btif_sbc_pcm_data_t sbc_pcm_data;\nstatic uint8_t sbc_underflow;\n\nTEXT_SBC_LOC\nvoid decode_sbc_begin(void) { sbc_underflow = 0; }\n\nTEXT_SBC_LOC\nint load_sbc_frame(uint8_t **p_data, uint32_t *p_len) {\n unsigned char retry = 0;\n int r = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n\n if (!sbc_next_frame_size) {\n sbc_next_frame_size = sbc_frame_size;\n }\n\n if (need_init_decoder) {\n sbc_next_frame_size = sbc_frame_size;\n }\n\nget_again:\n LOCK_APP_AUDIO_QUEUE();\n len1 = len2 = 0;\n r = PeekCQueue(&sbc_queue, sbc_next_frame_size, &e1, &len1, &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n if (r == CQ_ERR) {\n#ifdef __LOCK_AUDIO_THREAD__\n TRACE(1, \"cache sbc_underflow retry:%d\\n\", retry);\n goto exit;\n#elif defined(A2DP_SYNC_WITH_PUT_MUTUX)\n int size;\n A2DP_SYNC_WITH_PUT_MUTUX_ALLOC();\n A2DP_SYNC_WITH_PUT_MUTUX_WAIT();\n if (retry++ < A2DP_SYNC_WITH_PUT_MUTUX_TIMEROUT_CNT) {\n goto get_again;\n } else {\n LOCK_APP_AUDIO_QUEUE();\n size = LengthOfCQueue(&sbc_queue);\n UNLOCK_APP_AUDIO_QUEUE();\n sbc_underflow = 1;\n TRACE(2, \"cache sbc_underflow size:%d retry:%d\\n\", size, retry);\n goto exit;\n }\n#else\n#if 1\n TRACE(1, \"cache sbc_underflow retry:%d\\n\", retry);\n goto exit;\n#else\n int size;\n osDelay(2);\n LOCK_APP_AUDIO_QUEUE();\n size = LengthOfCQueue(&sbc_queue);\n UNLOCK_APP_AUDIO_QUEUE();\n if (retry++ < 12) {\n goto get_again;\n } else {\n sbc_underflow = 1;\n TRACE(2, \"cache sbc_underflow size:%d retry:%d\\n\", size, retry);\n goto exit;\n }\n#endif\n#endif\n } else {\n retry = 0;\n }\n\n if (!len1) {\n TRACE(2, \"len1 sbc_underflow %d/%d\\n\", len1, len2);\n goto get_again;\n }\n\n if (p_data) {\n *p_data = e1;\n }\n if (p_len) {\n *p_len = len1;\n }\n\n return 0;\n\nexit:\n return 1;\n}\n\nTEXT_SBC_LOC\nint decode_sbc_frame(uint8_t *out, uint32_t out_max, uint32_t *p_out_len,\n const uint8_t *in, uint32_t in_len,\n uint32_t *p_consume_len) {\n uint16_t parse_len;\n static uint16_t parse_len_total_frame = 0;\n bt_status_t ret;\n\n if (need_init_decoder) {\n parse_len_total_frame = 0;\n btif_sbc_init_decoder(sbc_decoder);\n }\n\n need_init_decoder = false;\n\n sbc_pcm_data.data = out;\n sbc_pcm_data.dataLen = 0;\n\n if (a2dp_channel_num[app_bt_device.curr_a2dp_stream_id] == 1) {\n out_max >>= 1;\n }\n\n uint32_t lock = int_lock();\n ret = btif_sbc_decode_frames(sbc_decoder, (uint8_t *)in, in_len, &parse_len,\n &sbc_pcm_data, out_max, sbc_eq_band_gain);\n int_unlock(lock);\n parse_len_total_frame += parse_len;\n if (parse_len_total_frame >= sbc_frame_size) {\n mtu_count--;\n //\t\tTRACE(1,\"-mtu_count = %d\",mtu_count);\n parse_len_total_frame -= sbc_frame_size;\n }\n if (ret == BT_STS_SUCCESS) {\n sbc_next_frame_size = sbc_frame_size;\n } else {\n sbc_next_frame_size = (sbc_frame_size > parse_len)\n ? (sbc_frame_size - parse_len)\n : sbc_frame_size;\n\n if (ret == BT_STS_FAILED) {\n need_init_decoder = true;\n TRACE(1, \"err mutelen:%d\\n\", sbc_pcm_data.dataLen);\n } else if (ret == BT_STS_NO_RESOURCES) {\n TRACE(1, \"no_res mutelen:%d\\n\", sbc_pcm_data.dataLen);\n }\n }\n\n if (p_out_len) {\n *p_out_len = sbc_pcm_data.dataLen;\n }\n if (p_consume_len) {\n *p_consume_len = parse_len;\n }\n\n if (a2dp_channel_num[app_bt_device.curr_a2dp_stream_id] == 1) {\n expand_1_channel_to_2_channels_16bits(sbc_pcm_data.data,\n sbc_pcm_data.dataLen);\n sbc_pcm_data.dataLen <<= 1;\n *p_out_len = sbc_pcm_data.dataLen;\n }\n\n return (ret == BT_STS_CONTINUE || ret == BT_STS_SUCCESS) ? 0 : 1;\n}\n\nTEXT_SBC_LOC\nint consume_sbc_frame(const uint8_t *data, uint32_t len) {\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&sbc_queue, 0, len);\n UNLOCK_APP_AUDIO_QUEUE();\n\n return 0;\n}\n\nTEXT_SBC_LOC\nvoid decode_sbc_end(uint32_t expect_out_len, uint32_t out_len,\n uint32_t in_len) {\n#ifndef A2DP_TRACE_DEC_TIME\n if (sbc_underflow || need_init_decoder) {\n dec_trace_time = true;\n }\n#endif\n\n#ifdef A2DP_AUDIO_SYNC_WITH_LOCAL\n if (expect_out_len == out_len) {\n int size;\n LOCK_APP_AUDIO_QUEUE();\n size = LengthOfCQueue(&sbc_queue);\n UNLOCK_APP_AUDIO_QUEUE();\n // TRACE(2,\"decode_sbc_frame Queue remain size:%d\n // frame_size:%d\\n\",size, sbc_frame_size);\n A2DP_AUDIO_SYNC_TRACE(6,\n \"sync status:%d qsize:%d/%d fsize:%d, thr:%d used:%d\",\n sync_status, size, g_sbc_queue_size, sbc_frame_size,\n A2DPPLAY_CACHE_OK_THRESHOLD, in_len);\n /*\n nor:\n if (size>7488+1170*2)\n goto inc\n if (size<7488-1170)\n goto dec\n dec:\n if (size>=7488+1170)\n goto nor\n inc:\n if (size<=7488)\n goto nor\n */\n switch (sync_status) {\n case A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEC:\n if (size >= (A2DPPLAY_CACHE_OK_THRESHOLD + in_len)) {\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_SET,\n A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_DEFAULT);\n sync_status = A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEFAULT;\n A2DP_AUDIO_SYNC_TRACE(0, \"default pll freq\");\n } else {\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_PROC, 0);\n }\n break;\n case A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_INC:\n if (size <= (A2DPPLAY_CACHE_OK_THRESHOLD)) {\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_SET,\n A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_DEFAULT);\n sync_status = A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEFAULT;\n A2DP_AUDIO_SYNC_TRACE(0, \"default pll freq\");\n } else {\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_PROC, 0);\n }\n break;\n case A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEFAULT:\n default:\n if (size > (A2DPPLAY_CACHE_OK_THRESHOLD + (in_len << 1))) {\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_SET,\n A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_INC);\n sync_status = A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_INC;\n A2DP_AUDIO_SYNC_TRACE(0, \"inc pll freq\");\n } else if (size < (A2DPPLAY_CACHE_OK_THRESHOLD - in_len)) {\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_SET,\n A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_DEC);\n sync_status = A2DP_AUDIO_SYNC_STATUS_SAMPLERATE_DEC;\n A2DP_AUDIO_SYNC_TRACE(0, \"dec pll freq\");\n } else {\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_PROC, 0);\n }\n break;\n }\n }\n#endif\n}\n\n#if defined(A2DP_LHDC_ON)\n#define PACKET_BUFFER_LENGTH 4 * 1024\n\nuint8_t serial_no;\nbool is_synced;\nbool is_splited;\nASM_PKT_STATUS asm_pkt_st;\nuint8_t packet_buffer[PACKET_BUFFER_LENGTH];\nuint32_t packet_buf_len = 0;\nuint32_t frames_nb_in_buffer = 0;\nuint32_t total_frame_nb = 0;\nvoid reset_lhdc_assmeble_packet() {\n is_synced = false;\n asm_pkt_st = ASM_PKT_WAT_STR;\n packet_buf_len = 0;\n total_frame_nb = 0;\n}\n\nvoid initial_lhdc_assemble_packet(bool splitFlg) {\n memset(packet_buffer, 0, PACKET_BUFFER_LENGTH);\n reset_lhdc_assmeble_packet();\n serial_no = 0xff;\n is_splited = splitFlg;\n TRACE(1, \"is_splited = %s\\n\", splitFlg ? \"true\" : \"false\");\n}\n\n/**\n * get lhdc frame header\n */\nbool get_lhdc_header(uint8_t *in, LHDC_FRAME_HDR *h) {\n#define LHDC_HDR_LEN 4\n uint32_t hdr = 0;\n bool ret = false;\n memcpy(&hdr, in, LHDC_HDR_LEN);\n h->frame_len = (int)((hdr >> 8) & 0x1fff);\n h->isSplit = ((hdr & 0x00600000) == 0x00600000);\n h->isLeft = ((hdr & 0xf) == 0);\n\n if ((hdr & 0xff000000) != 0x4c000000) {\n TRACE(0, \"lhdc hdr err!\\n\");\n ret = false;\n } else {\n // TRACE(4,\"frame_len = %d, g_lhdc_split = %s, g_lhdc_channel = %s(%d)\",\n // h->frame_len, h->isSplit ? \"true\" : \"false\", h->isLeft ? \"left\" :\n // \"right\", (hdr & 0xf) );\n ret = true;\n }\n return ret;\n}\n\n/**\n *Get splited lhdc frames fit to MTU size\n */\nuint32_t get_lhdc_frame(uint8_t *frame_q, size_t q_available_size,\n uint8_t *out_buf, uint32_t *out_size,\n uint32_t *out_frames) {\n LHDC_FRAME_HDR hdr;\n size_t emptSize =\n q_available_size >= PACKET_MTU_SIZE ? PACKET_MTU_SIZE : q_available_size;\n uint32_t *offset = out_size;\n // uint32_t * frame_cnt = out_frames;\n bool start = TRUE;\n *offset = 0; // *frame_cnt = 0;\n while (start) {\n\n if (get_lhdc_header(frame_q + *offset, &hdr) == false) {\n start = false;\n continue;\n }\n\n if (emptSize < hdr.frame_len) {\n start = false;\n continue;\n }\n\n memcpy(out_buf + *offset, frame_q + *offset, hdr.frame_len);\n emptSize -= hdr.frame_len;\n *offset += hdr.frame_len;\n (*out_frames)++;\n }\n return *offset;\n}\n/**\n * Grabe lhdc data from queue\n */\nint get_lhdc_data(unsigned char *frame, unsigned int len) {\n int status;\n unsigned int len1 = 0, len2 = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n LOCK_APP_AUDIO_QUEUE();\n unsigned int queu_len = (unsigned int)LengthOfCQueue(&sbc_queue);\n len = queu_len < len ? queu_len : len;\n status = PeekCQueue(&sbc_queue, len, &e1, &len1, &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n if (status != CQ_OK) {\n return 0;\n }\n\n if (e1) {\n memcpy(frame, e1, len1);\n }\n if (e2) {\n memcpy(frame + len1, e2, len2);\n }\n return len;\n}\n\nint assemble_lhdc_packet(uint8_t *input, uint32_t input_len, uint8_t **pLout,\n uint32_t *pLlen, uint8_t **pRout, uint32_t *pRlen) {\n uint8_t hdr = 0, seqno = 0xff;\n int ret = -1;\n uint32_t status = 0;\n\n hdr = (*input);\n input++;\n seqno = (*input);\n input++;\n input_len -= 2;\n\n status = hdr & A2DP_LHDC_HDR_LATENCY_MASK;\n if (latencyUpdated != (uint8_t)status) {\n latencyUpdated = (uint8_t)status;\n TRACE(1, \"New latency setting = 0x%02x\", latencyUpdated);\n }\n\n if (is_synced) {\n if (seqno != serial_no) {\n reset_lhdc_assmeble_packet();\n if ((hdr & A2DP_LHDC_HDR_FLAG_MSK) == 0 ||\n (hdr & A2DP_LHDC_HDR_S_MSK) != 0) {\n goto lhdc_start;\n } else\n TRACE(1, \"drop packet No. %u\", seqno);\n return 0;\n }\n serial_no = seqno + 1;\n }\n\nlhdc_start:\n switch (asm_pkt_st) {\n case ASM_PKT_WAT_STR: {\n if ((hdr & A2DP_LHDC_HDR_FLAG_MSK) == 0) {\n memcpy(&packet_buffer[0], input, input_len);\n if (pLlen && pLout) {\n *pLlen = input_len;\n *pLout = packet_buffer;\n }\n if (pRout && pRlen) {\n *pRout = NULL;\n *pRlen = 0;\n }\n // TRACE(1,\"Single payload size = %d\", *pLlen);\n asm_pkt_st = ASM_PKT_WAT_STR;\n packet_buf_len = 0; //= packet_buf_left_len = packet_buf_right_len = 0;\n total_frame_nb = 0;\n ret = 1;\n } else if (hdr & A2DP_LHDC_HDR_S_MSK) {\n ret = 0;\n if (packet_buf_len + input_len >= PACKET_BUFFER_LENGTH) {\n packet_buf_len = 0;\n asm_pkt_st = ASM_PKT_WAT_STR;\n TRACE(1, \"ASM_PKT_WAT_STR:Frame buffer overflow!(%d)\", packet_buf_len);\n break;\n }\n memcpy(&packet_buffer, input, input_len);\n packet_buf_len = input_len;\n asm_pkt_st = ASM_PKT_WAT_LST;\n // TRACE(1,\"multi:first payload size = %d\", input_len);\n } else\n ret = -1;\n\n if (ret >= 0) {\n if (!is_synced) {\n is_synced = true;\n serial_no = seqno + 1;\n }\n }\n break;\n }\n case ASM_PKT_WAT_LST: {\n if (packet_buf_len + input_len >= PACKET_BUFFER_LENGTH) {\n packet_buf_len = 0;\n asm_pkt_st = ASM_PKT_WAT_STR;\n TRACE(1, \"ASM_PKT_WAT_LST:Frame buffer overflow(%d)\", packet_buf_len);\n break;\n }\n memcpy(&packet_buffer[packet_buf_len], input, input_len);\n // TRACE(1,\"multi:payload size = %d\", input_len);\n packet_buf_len += input_len;\n ret = 0;\n\n if (hdr & A2DP_LHDC_HDR_L_MSK) {\n\n if (pLlen && pLout) {\n *pLlen = packet_buf_len;\n *pLout = packet_buffer;\n }\n // TRACE(1,\"multi: all payload size = %d\", packet_buf_len);\n packet_buf_len = 0; // packet_buf_left_len = packet_buf_right_len = 0;\n total_frame_nb = 0;\n ret = 1;\n asm_pkt_st = ASM_PKT_WAT_STR;\n }\n break;\n }\n default:\n ret = 0;\n break;\n }\n return ret;\n}\n/**\n * Decode LHDC data...\n */\nTEXT_LHDC_LOC\nint load_lhdc_frame(uint8_t **p_data, uint32_t *p_len) {\n int ret;\n LHDC_HEADER *ph = NULL;\n uint8_t retry = 0;\n int status;\n uint8_t *_buff = NULL;\n uint32_t _buff_len = 0;\n\n ret = 1;\n\n A2DP_SYNC_WITH_PUT_MUTUX_ALLOC();\n\n if (latencyIndex != latencyUpdated) {\n latencyIndex = latencyUpdated;\n goto _exit;\n }\n\n while (true) {\n int result = lhdcReadyForInput();\n if (result == 1) {\n /* code */\n status = get_lhdc_data(lhdc_input_mid_buf, sizeof(LHDC_HEADER));\n if (status == 0) {\n // No data return...\n if (retry++ >= A2DP_SYNC_WITH_PUT_MUTUX_TIMEROUT_CNT) {\n TRACE(1, \"%s:No Data return\", __func__);\n break;\n }\n A2DP_SYNC_WITH_PUT_MUTUX_WAIT();\n continue;\n }\n retry = 0;\n ph = (LHDC_HEADER *)&lhdc_input_mid_buf[0];\n result = memcmp((const char *)magicTag, (const char *)ph->tag,\n sizeof(magicTag));\n if (result != 0) {\n uint8_t tmp[sizeof(magicTag) + 1];\n size_t i;\n for (i = 0; i < sizeof(magicTag); i++) {\n sprintf((char *)&tmp[i], \"%c\", (char)ph->tag[i]);\n }\n tmp[i] = 0;\n continue;\n }\n\n status = get_lhdc_data(lhdc_input_mid_buf,\n sizeof(LHDC_HEADER) + ph->packetLen);\n if (status == 0) {\n // No data return...\n TRACE(1, \"Fetch data error[lenght = %d]\", ph->packetLen);\n continue;\n }\n ph = (LHDC_HEADER *)&lhdc_input_mid_buf[0];\n\n // TRACE(2,\"%s:Get packet[%d]\", __func__, ph->packetLen);\n\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&sbc_queue, 0, sizeof(LHDC_HEADER) + ph->packetLen);\n mtu_count--;\n UNLOCK_APP_AUDIO_QUEUE();\n _buff = ph->dptr;\n _buff_len = ph->packetLen;\n ret = 0;\n } else {\n _buff = NULL;\n _buff_len = 0;\n ret = 0;\n }\n break;\n }\n\n_exit:\n A2DP_SYNC_WITH_PUT_MUTUX_FREE();\n\n if (p_data) {\n *p_data = _buff;\n }\n if (p_len) {\n *p_len = _buff_len;\n }\n\n return ret;\n}\n\nTEXT_LHDC_LOC\nint decode_lhdc_frame(uint8_t *out, uint32_t out_max, uint32_t *p_out_len,\n const uint8_t *in, uint32_t in_len,\n uint32_t *p_consume_len) {\n uint32_t need_again;\n uint32_t out_len;\n\n if (a2dp_channel_num[app_bt_device.curr_a2dp_stream_id] == 1) {\n ASSERT(0, \"lhdc should check audio channel number\");\n }\n\n out_len = lhdcDecodeProcess(out, (uint8_t *)in, in_len, &need_again);\n\n if (p_out_len) {\n *p_out_len = (out_len >= 0) ? out_len : 0;\n }\n if (p_consume_len) {\n *p_consume_len = (out_len >= 0) ? in_len : 0;\n }\n\n return (out_len >= 0) ? 0 : 1;\n}\n\nTEXT_LHDC_LOC\nvoid decode_lhdc_end(uint32_t expect_out_len, uint32_t out_len,\n uint32_t in_len) {\n if (expect_out_len != out_len) {\n dec_reset_queue = true;\n }\n}\n#endif\n\n#ifdef A2DP_CP_ACCEL\n#include \"cp_accel.h\"\n\n#define CP_CACHE_ATTR ALIGNED(4) CP_BSS_LOC\n#define CP_DEC_SLOT_CNT 3\n\nenum CP_DEC_STATE_T {\n CP_DEC_STATE_IDLE,\n CP_DEC_STATE_WORKING,\n CP_DEC_STATE_DONE,\n CP_DEC_STATE_FAILED,\n};\n\nstatic CP_CACHE_ATTR uint8_t cp_in_cache[1024 * 10];\nstatic CP_CACHE_ATTR uint8_t cp_out_cache[1024 * 16];\nstatic CP_BSS_LOC uint32_t cp_in_wpos;\nstatic CP_BSS_LOC uint32_t cp_in_rpos;\nstatic CP_BSS_LOC uint32_t cp_dec_start_time;\nstatic CP_BSS_LOC uint32_t cp_last_dec_time;\n#ifdef A2DP_TRACE_CP_DEC_TIME\nstatic CP_DATA_LOC const bool cp_dec_trace_time = true;\n#else\nstatic CP_BSS_LOC bool cp_dec_trace_time;\n#endif\nstatic CP_BSS_LOC uint8_t cp_dec_idx;\n\nstatic bool mcu_dec_inited;\nstatic enum APP_OVERLAY_ID_T cp_overlay_type;\nstatic enum CP_DEC_STATE_T cp_dec_state[CP_DEC_SLOT_CNT];\nstatic uint8_t cp_dec_mtu_cnt[CP_DEC_SLOT_CNT];\nstatic uint32_t cp_out_len[CP_DEC_SLOT_CNT];\nstatic uint8_t mcu_dec_idx;\nstatic uint32_t cp_in_size;\nstatic uint32_t cp_out_size;\nstatic uint32_t cp_out_loop_size;\n\nstatic uint32_t cp_get_in_cache_data_len(uint32_t in_wpos, uint32_t in_rpos);\nstatic void cp_get_in_cache_data(uint8_t *data, uint32_t len, uint32_t in_wpos,\n uint32_t in_rpos);\nstatic uint32_t cp_update_in_cache_pos(uint32_t in_pos, uint32_t len);\n\n#if defined(A2DP_LDAC_ON)\nstatic CP_BSS_LOC bool cp_ldac_fatal_error;\n\nTEXT_LDAC_LOC\nint cp_load_ldac_frame(uint8_t **p_data, uint32_t *p_len) {\n uint32_t len;\n uint32_t in_rpos;\n uint32_t in_wpos;\n\n if (hLdacData == NULL || cp_ldac_fatal_error) {\n return 1;\n }\n\n in_rpos = cp_in_rpos;\n in_wpos = cp_in_wpos;\n\n_get_hdr:\n len = cp_get_in_cache_data_len(in_wpos, in_rpos);\n if (len == 0) {\n return 2;\n }\n if (len > LDAC_READBUF_SIZE) {\n len = LDAC_READBUF_SIZE;\n }\n\n cp_get_in_cache_data(&ldac_input_mid_buf[0], len, in_wpos, in_rpos);\n\n if (ldac_recovery) {\n uint32_t parse_bytes;\n int result;\n\n result = ldac_seek_header(len, &parse_bytes);\n if (result == 0) {\n ldac_recovery = false;\n }\n in_rpos = cp_update_in_cache_pos(in_rpos, parse_bytes);\n goto _get_hdr;\n }\n\n return 0;\n}\n\nTEXT_LDAC_LOC\nstatic int cp_consume_ldac_frame(const uint8_t *data, uint32_t len) {\n cp_in_rpos = cp_update_in_cache_pos(cp_in_rpos, len);\n\n return 0;\n}\n\nTEXT_LDAC_LOC\nvoid cp_decode_ldac_end(uint32_t expect_out_len, uint32_t out_len,\n uint32_t in_len) {\n if (expect_out_len != out_len) {\n if (hLdacData) {\n int error_code;\n error_code = ldacBT_get_error_code(hLdacData);\n TRACE(6, \"error_code = %4d, %4d, %4d,FrameHeader[%02x:%02x:%02x]\\n\",\n LDACBT_API_ERR(error_code), LDACBT_HANDLE_ERR(error_code),\n LDACBT_BLOCK_ERR(error_code), ldac_input_mid_buf[0],\n ldac_input_mid_buf[1], ldac_input_mid_buf[2]);\n if (LDACBT_FATAL(error_code)) {\n cp_ldac_fatal_error = true;\n }\n }\n }\n}\n\nTEXT_LDAC_LOC\nvoid mcu_decode_ldac_end(uint32_t expect_out_len, uint32_t out_len,\n uint32_t in_len) {\n if (expect_out_len != out_len) {\n if (cp_ldac_fatal_error) {\n ldac_dec_deinit();\n }\n if (hLdacData == NULL) {\n /* Recovery Process */\n int result;\n result = ldac_dec_init();\n if (result) {\n ldac_dec_deinit();\n }\n ldac_recovery = true;\n cp_ldac_fatal_error = false;\n }\n }\n}\n#endif\n\n#if defined(A2DP_LHDC_ON)\nTEXT_LHDC_LOC\nint cp_load_lhdc_frame(uint8_t **p_data, uint32_t *p_len) {\n int ret;\n LHDC_HEADER ph;\n uint32_t len;\n uint32_t in_rpos;\n uint32_t in_wpos;\n uint8_t *frame_buf = NULL;\n uint32_t frame_len = 0;\n int result;\n\n ret = 1;\n\n if (latencyIndex != latencyUpdated) {\n latencyIndex = latencyUpdated;\n goto _exit;\n }\n\n result = lhdcReadyForInput();\n if (result == 0) {\n ret = 0;\n goto _exit;\n }\n\n in_rpos = cp_in_rpos;\n in_wpos = cp_in_wpos;\n\n_get_hdr:\n len = cp_get_in_cache_data_len(in_wpos, in_rpos);\n if (len < sizeof(ph)) {\n goto _exit;\n }\n\n cp_get_in_cache_data(&lhdc_input_mid_buf[0], sizeof(ph), in_wpos, in_rpos);\n\n memcpy(&ph, &lhdc_input_mid_buf[0], sizeof(ph));\n result =\n memcmp((const char *)magicTag, (const char *)ph.tag, sizeof(magicTag));\n if (result != 0) {\n in_rpos = cp_update_in_cache_pos(in_rpos, 1);\n goto _get_hdr;\n }\n\n if (len < sizeof(ph) + ph.packetLen) {\n goto _exit;\n }\n\n in_rpos = cp_update_in_cache_pos(in_rpos, sizeof(ph));\n\n cp_get_in_cache_data(&lhdc_input_mid_buf[sizeof(ph)], ph.packetLen, in_wpos,\n in_rpos);\n\n in_rpos = cp_update_in_cache_pos(in_rpos, ph.packetLen);\n cp_in_rpos = in_rpos;\n\n frame_buf = &((LHDC_HEADER *)&lhdc_input_mid_buf[0])->dptr[0];\n frame_len = ph.packetLen;\n\n ret = 0;\n\n_exit:\n if (p_data) {\n *p_data = frame_buf;\n }\n if (p_len) {\n *p_len = frame_len;\n }\n\n return ret;\n}\n#endif\n\n#if defined(A2DP_AAC_ON)\nTEXT_AAC_LOC\nint cp_load_aac_frame(uint8_t **p_data, uint32_t *p_len) {\n uint32_t len;\n unsigned short aac_len = 0;\n uint32_t in_rpos;\n uint32_t in_wpos;\n\n in_rpos = cp_in_rpos;\n in_wpos = cp_in_wpos;\n\n len = cp_get_in_cache_data_len(in_wpos, in_rpos);\n if (len < 2) {\n return 1;\n }\n\n if (in_wpos > in_rpos || cp_in_size >= in_rpos + 2) {\n aac_len = cp_in_cache[in_rpos] | (cp_in_cache[in_rpos + 1] << 8);\n } else {\n aac_len = cp_in_cache[in_rpos] | (cp_in_cache[0] << 8);\n }\n in_rpos = cp_update_in_cache_pos(in_rpos, 2);\n\n if (aac_len < 64) {\n aac_maxreadBytes = 64;\n } else if (aac_len < 128) {\n aac_maxreadBytes = 128;\n } else if (aac_len < 256) {\n aac_maxreadBytes = 256;\n } else if (aac_len < 512) {\n aac_maxreadBytes = 512;\n } else if (aac_len < 1024) {\n aac_maxreadBytes = 1024;\n } else {\n if (aac_len >= 2048) {\n // Header is bad!\n dec_reset_queue = true;\n return 2;\n }\n aac_maxreadBytes = 2048;\n }\n\n if (len < 2 + (uint32_t)aac_len) {\n return 3;\n }\n\n cp_dec_mtu_cnt[cp_dec_idx]++;\n\n cp_get_in_cache_data(&aac_input_mid_buf[0], aac_len, in_wpos, in_rpos);\n // Consume the packet\n in_rpos = cp_update_in_cache_pos(in_rpos, aac_len);\n cp_in_rpos = in_rpos;\n\n if (p_data) {\n *p_data = (unsigned char *)aac_input_mid_buf;\n }\n if (p_len) {\n *p_len = aac_maxreadBytes;\n }\n\n return 0;\n}\n#endif\n\nTEXT_SBC_LOC\nint cp_load_sbc_frame(uint8_t **p_data, uint32_t *p_len) {\n uint32_t len;\n uint32_t in_wpos;\n uint32_t in_rpos;\n\n if (!sbc_next_frame_size) {\n sbc_next_frame_size = sbc_frame_size;\n }\n\n if (need_init_decoder) {\n sbc_next_frame_size = sbc_frame_size;\n }\n\n in_wpos = cp_in_wpos;\n in_rpos = cp_in_rpos;\n\n if (in_wpos == in_rpos) {\n return 1;\n }\n\n if (in_wpos > in_rpos) {\n len = in_wpos - in_rpos;\n } else {\n len = cp_in_size - in_rpos;\n }\n\n if (len > sbc_next_frame_size) {\n len = sbc_next_frame_size;\n }\n\n if (p_data) {\n *p_data = &cp_in_cache[in_rpos];\n }\n if (p_len) {\n *p_len = len;\n }\n\n return 0;\n}\n\nTEXT_SBC_LOC\nstatic int cp_consume_sbc_frame(const uint8_t *data, uint32_t len) {\n cp_in_rpos = cp_update_in_cache_pos(cp_in_rpos, len);\n\n return 0;\n}\n\nCP_TEXT_SRAM_LOC\nstatic uint32_t cp_get_in_cache_data_len(uint32_t in_wpos, uint32_t in_rpos) {\n uint32_t len;\n\n if (in_wpos >= in_rpos) {\n len = in_wpos - in_rpos;\n } else {\n len = cp_in_size - in_rpos + in_wpos;\n }\n\n return len;\n}\n\nCP_TEXT_SRAM_LOC\nstatic void cp_get_in_cache_data(uint8_t *data, uint32_t len, uint32_t in_wpos,\n uint32_t in_rpos) {\n // Assuming cp_get_in_cache_data_len(in_wpos, in_rpos) >= len\n\n if (in_wpos > in_rpos || cp_in_size >= in_rpos + len) {\n memcpy(&data[0], &cp_in_cache[in_rpos], len);\n } else {\n uint32_t copy_len;\n\n copy_len = cp_in_size - in_rpos;\n memcpy(&data[0], &cp_in_cache[in_rpos], copy_len);\n memcpy(&data[copy_len], &cp_in_cache[0], len - copy_len);\n }\n}\n\nCP_TEXT_SRAM_LOC\nstatic uint32_t cp_update_in_cache_pos(uint32_t in_pos, uint32_t len) {\n // Consume the packet\n in_pos += len;\n if (in_pos >= cp_in_size) {\n in_pos -= cp_in_size;\n }\n\n return in_pos;\n}\n\nCP_TEXT_SRAM_LOC\nstatic int cp_decode_a2dp_begin(enum APP_OVERLAY_ID_T overlay_type) {\n cp_dec_start_time = hal_fast_sys_timer_get();\n#ifndef A2DP_TRACE_CP_DEC_TIME\n cp_dec_trace_time = false;\n#endif\n\n if (cp_dec_state[cp_dec_idx] != CP_DEC_STATE_IDLE &&\n cp_dec_state[cp_dec_idx] != CP_DEC_STATE_WORKING) {\n return 1;\n }\n\n if (cp_dec_state[cp_dec_idx] == CP_DEC_STATE_IDLE) {\n cp_dec_state[cp_dec_idx] = CP_DEC_STATE_WORKING;\n cp_out_len[cp_dec_idx] = 0;\n cp_dec_mtu_cnt[cp_dec_idx] = 0;\n }\n\n return 0;\n}\n\nCP_TEXT_SRAM_LOC\nstatic int cp_load_a2dp_encoded_data(enum APP_OVERLAY_ID_T overlay_type,\n uint8_t **p_data, uint32_t *p_len) {\n int ret = -1;\n\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n ret = cp_load_ldac_frame(p_data, p_len);\n#endif\n#if defined(A2DP_LHDC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n ret = cp_load_lhdc_frame(p_data, p_len);\n#endif\n#if defined(A2DP_AAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n ret = cp_load_aac_frame(p_data, p_len);\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n ret = cp_load_sbc_frame(p_data, p_len);\n }\n\n return ret;\n}\n\nCP_TEXT_SRAM_LOC\nstatic int cp_decode_a2dp_process(enum APP_OVERLAY_ID_T overlay_type,\n uint8_t *out, uint32_t out_max,\n uint32_t *p_out_len, const uint8_t *in,\n uint32_t in_len, uint32_t *p_consume_len) {\n int ret = -1;\n\n if (p_out_len) {\n *p_out_len = 0;\n }\n if (p_consume_len) {\n *p_consume_len = 0;\n }\n\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n ret = decode_ldac_frame(out, out_max, p_out_len, in, in_len, p_consume_len);\n#endif\n#if defined(A2DP_AAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n ret = decode_aac_frame(out, out_max, p_out_len, in, in_len, p_consume_len);\n#endif\n#if defined(A2DP_SCALABLE_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_SCALABLE) {\n ret = decode_scalable_frame(out, out_max, p_out_len, in, in_len,\n p_consume_len);\n#endif\n#if defined(A2DP_LHDC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n ret = decode_lhdc_frame(out, out_max, p_out_len, in, in_len, p_consume_len);\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n ret = decode_sbc_frame(out, out_max, p_out_len, in, in_len, p_consume_len);\n }\n\n return ret;\n}\n\nCP_TEXT_SRAM_LOC\nstatic int cp_consume_a2dp_encoded_data(enum APP_OVERLAY_ID_T overlay_type,\n const uint8_t *data, uint32_t len) {\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n cp_consume_ldac_frame(data, len);\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n cp_consume_sbc_frame(data, len);\n }\n\n return 0;\n}\n\nCP_TEXT_SRAM_LOC\nstatic void cp_decode_a2dp_end(enum APP_OVERLAY_ID_T overlay_type,\n uint32_t expect_out_len, uint32_t out_len,\n uint32_t in_len, bool retry) {\n uint32_t etime;\n uint8_t old_cp_dec_idx;\n\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n cp_decode_ldac_end(expect_out_len, out_len, in_len);\n#endif\n }\n\n old_cp_dec_idx = cp_dec_idx;\n\n cp_out_len[cp_dec_idx] += out_len;\n\n if (!retry) {\n if (expect_out_len == out_len) {\n cp_dec_state[cp_dec_idx] = CP_DEC_STATE_DONE;\n } else {\n cp_dec_state[cp_dec_idx] = CP_DEC_STATE_FAILED;\n }\n\n cp_dec_idx++;\n if (cp_dec_idx >= CP_DEC_SLOT_CNT) {\n cp_dec_idx = 0;\n }\n }\n\n etime = hal_fast_sys_timer_get();\n if (cp_dec_trace_time) {\n TRACE(4, \"cp_decode[%u]: %u us in %u us (r=%u)\", old_cp_dec_idx,\n FAST_TICKS_TO_US(etime - cp_dec_start_time),\n FAST_TICKS_TO_US(etime - cp_last_dec_time), retry);\n }\n#ifdef A2DP_TRACE_CP_ACCEL\n if (retry) {\n TRACE(3, \"cp_decode[%u]:retry: cp_out_len=%u out_len=%u\", old_cp_dec_idx,\n cp_out_len[old_cp_dec_idx], out_len);\n }\n#endif\n cp_last_dec_time = etime;\n}\n\nCP_TEXT_SRAM_LOC\nstatic int cp_decode_a2dp_frame(enum APP_OVERLAY_ID_T overlay_type,\n unsigned char *pcm_buffer,\n unsigned int pcm_len) {\n uint32_t all_out_len = 0, all_in_len = 0;\n int ret, ret2;\n uint32_t out_len;\n uint8_t *enc_data;\n uint32_t enc_len;\n uint32_t consume_len;\n bool retry = false;\n\n ret = cp_decode_a2dp_begin(overlay_type);\n if (ret) {\n return 0;\n }\n\n while (all_out_len < pcm_len) {\n ret = cp_load_a2dp_encoded_data(overlay_type, &enc_data, &enc_len);\n if (ret) {\n retry = true;\n break;\n }\n\n ret = cp_decode_a2dp_process(overlay_type, &pcm_buffer[all_out_len],\n pcm_len - all_out_len, &out_len, enc_data,\n enc_len, &consume_len);\n\n ret2 = cp_consume_a2dp_encoded_data(overlay_type, enc_data, consume_len);\n\n all_out_len += out_len;\n\n if (ret || ret2) {\n break;\n }\n }\n\n cp_decode_a2dp_end(overlay_type, pcm_len, all_out_len, all_in_len, retry);\n\n return all_out_len;\n}\n\nCP_TEXT_SRAM_LOC\nunsigned int cp_a2dp_main(uint8_t event) {\n uint32_t out_wpos;\n uint32_t out_len;\n uint32_t pcm_len;\n\n do {\n if (cp_dec_state[cp_dec_idx] == CP_DEC_STATE_WORKING) {\n if (cp_out_len[cp_dec_idx] < cp_out_loop_size) {\n pcm_len = cp_out_loop_size - cp_out_len[cp_dec_idx];\n } else {\n cp_out_len[cp_dec_idx] = 0;\n pcm_len = cp_out_loop_size;\n }\n } else {\n pcm_len = cp_out_loop_size;\n }\n out_wpos = cp_out_loop_size * cp_dec_idx + cp_out_loop_size - pcm_len;\n\n out_len = cp_decode_a2dp_frame(cp_overlay_type, &cp_out_cache[out_wpos],\n cp_out_loop_size);\n } while (out_len == pcm_len);\n\n return 0;\n}\n\nFRAM_TEXT_LOC\nstatic void mcu_decode_a2dp_init(uint32_t out_max) {\n uint32_t i;\n\n if (mcu_dec_inited == false) {\n mcu_dec_inited = true;\n\n cp_in_size = sizeof(cp_in_cache);\n cp_out_size = out_max * CP_DEC_SLOT_CNT;\n ASSERT(cp_out_size <= sizeof(cp_out_cache),\n \"%s: cp_out_cache too small (should >= %u)\", __func__, cp_out_size);\n cp_out_loop_size = out_max;\n\n cp_overlay_type = app_get_current_overlay();\n\n for (i = 0; i < CP_DEC_SLOT_CNT; i++) {\n cp_dec_state[i] = CP_DEC_STATE_IDLE;\n cp_dec_mtu_cnt[i] = 0;\n cp_out_len[i] = 0;\n }\n\n#if defined(A2DP_LHDC_ON)\n // Increase latency to improve data buffering\n mcu_dec_idx = 1;\n#else\n mcu_dec_idx = CP_DEC_SLOT_CNT - 1;\n#endif\n for (i = mcu_dec_idx; i < CP_DEC_SLOT_CNT; i++) {\n cp_dec_state[i] = CP_DEC_STATE_DONE;\n cp_out_len[i] = cp_out_loop_size;\n }\n }\n}\n\nFRAM_TEXT_LOC\nstatic int mcu_load_a2dp_encoded_data(uint8_t **p_data, uint32_t *p_len) {\n uint32_t free_len;\n uint32_t in_wpos, in_rpos;\n uint32_t size;\n int r = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n\n in_wpos = cp_in_wpos;\n in_rpos = cp_in_rpos;\n\n if (in_wpos < in_rpos) {\n free_len = in_rpos - in_wpos - 1;\n } else {\n free_len = cp_in_size - in_wpos + in_rpos - 1;\n }\n\n if (free_len == 0) {\n return 0;\n }\n\n LOCK_APP_AUDIO_QUEUE();\n size = LengthOfCQueue(&sbc_queue);\n UNLOCK_APP_AUDIO_QUEUE();\n\n if (size > free_len) {\n size = free_len;\n }\n\n LOCK_APP_AUDIO_QUEUE();\n r = PeekCQueue(&sbc_queue, size, &e1, &len1, &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n\n if (r == CQ_ERR) {\n TRACE(2, \"%s: Failed to get %u from sbc_queue\", __func__, size);\n return 1;\n }\n\n if (in_wpos < in_rpos) {\n if (len1) {\n memcpy(&cp_in_cache[in_wpos], e1, len1);\n in_wpos += len1;\n }\n if (len2) {\n memcpy(&cp_in_cache[in_wpos], e2, len2);\n in_wpos += len2;\n }\n } else {\n free_len = cp_in_size - in_wpos;\n if (len1) {\n if (free_len > len1) {\n free_len = len1;\n }\n memcpy(&cp_in_cache[in_wpos], e1, free_len);\n len1 -= free_len;\n e1 += free_len;\n in_wpos = cp_update_in_cache_pos(in_wpos, free_len);\n if (len1) {\n memcpy(&cp_in_cache[in_wpos], e1, len1);\n in_wpos = cp_update_in_cache_pos(in_wpos, len1);\n }\n if (in_wpos < in_rpos) {\n free_len = in_rpos - in_wpos - 1;\n } else {\n free_len = cp_in_size - in_wpos;\n }\n }\n if (len2) {\n if (free_len > len2) {\n free_len = len2;\n }\n memcpy(&cp_in_cache[in_wpos], e2, free_len);\n len2 -= free_len;\n e2 += free_len;\n in_wpos = cp_update_in_cache_pos(in_wpos, free_len);\n if (len2) {\n memcpy(&cp_in_cache[in_wpos], e2, len2);\n in_wpos = cp_update_in_cache_pos(in_wpos, len2);\n }\n }\n }\n\n cp_in_wpos = in_wpos;\n\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&sbc_queue, NULL, size);\n UNLOCK_APP_AUDIO_QUEUE();\n\n return 0;\n}\n\nFRAM_TEXT_LOC\nstatic int mcu_decode_a2dp_process(uint8_t *out, uint32_t out_max,\n uint32_t *p_out_len, const uint8_t *in,\n uint32_t in_len, uint32_t *p_consume_len) {\n int ret = 0;\n uint32_t out_rpos;\n\n#ifdef A2DP_TRACE_CP_ACCEL\n TRACE(3, \"mcu_dec_proc[%u]: state=%u len=%u\", mcu_dec_idx,\n cp_dec_state[mcu_dec_idx], cp_out_len[mcu_dec_idx]);\n#endif\n\n cp_accel_send_event_mcu2cp(\n CP_BUILD_ID(CP_TASK_A2DP_DECODE, CP_EVENT_A2DP_DECODE));\n\n if (cp_dec_state[mcu_dec_idx] != CP_DEC_STATE_DONE) {\n ret = 1;\n goto _exit;\n }\n if (cp_out_len[mcu_dec_idx] != out_max) {\n ret = 2;\n goto _exit;\n }\n\n out_rpos = cp_out_loop_size * mcu_dec_idx;\n\n memcpy(out, &cp_out_cache[out_rpos], out_max);\n\n if (p_out_len) {\n *p_out_len = out_max;\n }\n\n_exit:\n if (cp_dec_state[mcu_dec_idx] == CP_DEC_STATE_DONE ||\n cp_dec_state[mcu_dec_idx] == CP_DEC_STATE_FAILED) {\n if (mtu_count > cp_dec_mtu_cnt[mcu_dec_idx]) {\n mtu_count -= cp_dec_mtu_cnt[mcu_dec_idx];\n } else {\n mtu_count = 0;\n }\n\n cp_dec_state[mcu_dec_idx] = CP_DEC_STATE_IDLE;\n\n mcu_dec_idx++;\n if (mcu_dec_idx >= CP_DEC_SLOT_CNT) {\n mcu_dec_idx = 0;\n }\n }\n\n return ret;\n}\n\nstatic struct cp_task_desc TASK_DESC_A2DP = {CP_ACCEL_STATE_CLOSED,\n cp_a2dp_main, NULL, NULL, NULL};\nvoid cp_a2dp_init(void) {\n mcu_dec_inited = false;\n norflash_api_flush_disable(NORFLASH_API_USER_CP,\n (uint32_t)cp_accel_init_done);\n cp_accel_open(CP_TASK_A2DP_DECODE, &TASK_DESC_A2DP);\n while (cp_accel_init_done() == false) {\n hal_sys_timer_delay_us(100);\n }\n norflash_api_flush_enable(NORFLASH_API_USER_CP);\n}\n\nvoid cp_a2dp_deinit(void) { cp_accel_close(CP_TASK_A2DP_DECODE); }\n#endif\n\nFRAM_TEXT_LOC\nstatic int decode_a2dp_begin(enum APP_OVERLAY_ID_T overlay_type) {\n#ifdef TIMER1_BASE\n dec_start_time = hal_fast_sys_timer_get();\n#else\n dec_start_time = hal_sys_timer_get();\n#endif\n#ifndef A2DP_TRACE_DEC_TIME\n dec_trace_time = false;\n#endif\n\n#ifndef A2DP_CP_ACCEL\n if (overlay_type == APP_OVERLAY_A2DP) {\n decode_sbc_begin();\n }\n#endif\n\n return 0;\n}\n\nFRAM_TEXT_LOC\nstatic int load_a2dp_encoded_data(enum APP_OVERLAY_ID_T overlay_type,\n uint8_t **p_data, uint32_t *p_len) {\n int ret = -1;\n\n#ifdef A2DP_CP_ACCEL\n ret = mcu_load_a2dp_encoded_data(p_data, p_len);\n#else\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n ret = load_ldac_frame(p_data, p_len);\n#endif\n#if defined(A2DP_AAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n ret = load_aac_frame(p_data, p_len);\n#endif\n#if defined(A2DP_SCALABLE_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_SCALABLE) {\n ret = load_scalable_frame(p_data, p_len);\n#endif\n#if defined(A2DP_LHDC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n ret = load_lhdc_frame(p_data, p_len);\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n ret = load_sbc_frame(p_data, p_len);\n }\n#endif\n\n return ret;\n}\n\nFRAM_TEXT_LOC\nstatic int decode_a2dp_process(enum APP_OVERLAY_ID_T overlay_type, uint8_t *out,\n uint32_t out_max, uint32_t *p_out_len,\n const uint8_t *in, uint32_t in_len,\n uint32_t *p_consume_len) {\n int ret = -1;\n\n if (p_out_len) {\n *p_out_len = 0;\n }\n if (p_consume_len) {\n *p_consume_len = 0;\n }\n\n#ifdef A2DP_CP_ACCEL\n ret = mcu_decode_a2dp_process(out, out_max, p_out_len, in, in_len,\n p_consume_len);\n#else\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n ret = decode_ldac_frame(out, out_max, p_out_len, in, in_len, p_consume_len);\n#endif\n#if defined(A2DP_AAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n ret = decode_aac_frame(out, out_max, p_out_len, in, in_len, p_consume_len);\n#endif\n#if defined(A2DP_SCALABLE_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_SCALABLE) {\n ret = decode_scalable_frame(out, out_max, p_out_len, in, in_len,\n p_consume_len);\n#endif\n#if defined(A2DP_LHDC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n ret = decode_lhdc_frame(out, out_max, p_out_len, in, in_len, p_consume_len);\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n ret = decode_sbc_frame(out, out_max, p_out_len, in, in_len, p_consume_len);\n }\n#endif\n\n return ret;\n}\n\nFRAM_TEXT_LOC\nstatic int consume_a2dp_encoded_data(enum APP_OVERLAY_ID_T overlay_type,\n const uint8_t *data, uint32_t len) {\n#ifndef A2DP_CP_ACCEL\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n consume_ldac_frame(data, len);\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n consume_sbc_frame(data, len);\n }\n#endif\n\n return 0;\n}\n\nFRAM_TEXT_LOC\nstatic void decode_a2dp_end(enum APP_OVERLAY_ID_T overlay_type,\n uint32_t expect_out_len, uint32_t out_len,\n uint32_t in_len) {\n uint32_t etime;\n\n#ifdef A2DP_CP_ACCEL\n\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n mcu_decode_ldac_end(expect_out_len, out_len, in_len);\n#endif\n }\n\n#else\n\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n decode_ldac_end(expect_out_len, out_len, in_len);\n#endif\n#if defined(A2DP_LHDC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n decode_lhdc_end(expect_out_len, out_len, in_len);\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n decode_sbc_end(expect_out_len, out_len, in_len);\n }\n\n#endif\n\n if (dec_reset_queue) {\n dec_reset_queue = false;\n LOCK_APP_AUDIO_QUEUE();\n ResetCQueue(&sbc_queue);\n TRACE(0, \"Reset queue\");\n UNLOCK_APP_AUDIO_QUEUE();\n }\n\n#ifdef TIMER1_BASE\n etime = hal_fast_sys_timer_get();\n if (dec_trace_time) {\n TRACE(2, \"a2dp decode: %u us in %u us\",\n FAST_TICKS_TO_US(etime - dec_start_time),\n FAST_TICKS_TO_US(etime - last_dec_time));\n }\n#else\n etime = hal_sys_timer_get();\n if (dec_trace_time) {\n TRACE(2, \"a2dp decode: %u ms in %u ms\", TICKS_TO_MS(etime - dec_start_time),\n TICKS_TO_MS(etime - last_dec_time));\n }\n#endif\n last_dec_time = etime;\n}\n\nFRAM_TEXT_LOC\nstatic int decode_a2dp_frame(enum APP_OVERLAY_ID_T overlay_type,\n unsigned char *pcm_buffer, unsigned int pcm_len) {\n uint32_t all_out_len = 0, all_in_len = 0;\n int ret, ret2;\n uint32_t out_len;\n uint8_t *enc_data;\n uint32_t enc_len;\n uint32_t consume_len;\n\n#ifdef A2DP_CP_ACCEL\n mcu_decode_a2dp_init(pcm_len);\n#endif\n\n ret = decode_a2dp_begin(overlay_type);\n if (ret) {\n return 0;\n }\n\n while (all_out_len < pcm_len) {\n ret = load_a2dp_encoded_data(overlay_type, &enc_data, &enc_len);\n if (ret) {\n break;\n }\n\n ret = decode_a2dp_process(overlay_type, pcm_buffer + all_out_len,\n pcm_len - all_out_len, &out_len, enc_data,\n enc_len, &consume_len);\n\n ret2 = consume_a2dp_encoded_data(overlay_type, enc_data, consume_len);\n\n all_out_len += out_len;\n all_in_len += consume_len;\n\n if (ret || ret2) {\n break;\n }\n }\n\n decode_a2dp_end(overlay_type, pcm_len, all_out_len, all_in_len);\n\n return all_out_len;\n}\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n#define AAC_RESAMPLE_ITER_LEN (1024 * 2 * 2)\n#define SBC_RESAMPLE_ITER_LEN (128 * 2 * 2)\n\nstatic struct APP_RESAMPLE_T *a2dp_resample;\n\nFRAM_TEXT_LOC\nstatic int a2dp_resample_iter(uint8_t *buf, uint32_t len) {\n enum APP_OVERLAY_ID_T overlay_type;\n\n overlay_type = app_get_current_overlay();\n\n uint32_t l = decode_a2dp_frame(overlay_type, buf, len);\n if (l != len) {\n TRACE(2, \"a2dp_audio_more_data decode err %d/%d\", l, len);\n return 1;\n }\n return 0;\n}\n#endif\n\nextern bool process_delay(int32_t delay_ms);\n\nvoid static attempt_slow_samplerate(uint8_t overlay_type) {\n uint32_t current_mtu_conut = 0;\n if (check_interval > 0)\n check_interval--;\n assumed_mtu_interval = 20;\n current_mtu_conut = mtu_count;\n\n if (lagest_mtu_in1s < current_mtu_conut)\n lagest_mtu_in1s = current_mtu_conut;\n if (least_mtu_in1s > current_mtu_conut)\n least_mtu_in1s = current_mtu_conut;\n\n if (check_interval == 0) {\n int32_t delay_ms = 0;\n if (overlay_type == APP_OVERLAY_A2DP) {\n delay_ms = (delay_mtu_limit - (int)lagest_mtu_in1s) * 128 * 1000 /\n a2dp_sample_rate;\n } else\n#if defined(A2DP_AAC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n delay_ms = (delay_mtu_limit - (int)lagest_mtu_in1s) * 1024 * 1000 /\n a2dp_sample_rate;\n } else\n#endif\n#if defined(A2DP_SCALABLE_ON)\n if (overlay_type == APP_OVERLAY_A2DP_SCALABLE) {\n delay_ms = (delay_mtu_limit - (int)lagest_mtu_in1s) * 864 * 1000 /\n a2dp_sample_rate;\n } else\n#endif\n#if defined(A2DP_LHDC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n delay_ms = (delay_mtu_limit - (int)lagest_mtu_in1s) * 512 * 1000 /\n a2dp_sample_rate;\n } else\n#endif\n#if defined(A2DP_LDAC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n delay_ms = (delay_mtu_limit - (int)lagest_mtu_in1s) * 256 * 1000 /\n a2dp_sample_rate;\n } else\n#endif\n {\n delay_ms =\n (delay_mtu_limit - (int)lagest_mtu_in1s) * assumed_mtu_interval;\n }\n TRACE(6,\n \"store_interval=%d,lagest_mtu_in1s=%d,least_mtu_in1s=%d,delay_ms=%d,\"\n \"frame_len=%d,mtu_count=%d\",\n ssb_err_max, lagest_mtu_in1s, least_mtu_in1s, delay_ms,\n sbc_frame_rev_len, mtu_count);\n process_delay(delay_ms);\n check_interval = 50;\n lagest_mtu_in1s = 0;\n least_mtu_in1s = 0xffffffff;\n }\n}\n\n// A2DP_EQ_24BIT == 1, buf should be 32bit(24bit)\n// A2DP_EQ_24BIT == 0, buf should be 16bit\nuint32_t a2dp_audio_more_data(uint8_t overlay_type, uint8_t *buf,\n uint32_t len) {\n uint32_t l = 0;\n\n if (!a2dp_audio_isrunning(A2DPPLAY_STRTEAM_GET, true)) {\n }\n\n#ifdef A2DP_EQ_24BIT\n // Change len to 16-bit sample buffer length\n if ((bt_sbc_player_get_sample_bit() == 16)\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n || allow_resample\n#endif\n ) {\n len = len / (sizeof(int32_t) / sizeof(int16_t));\n }\n#endif\n\n if (a2dp_cache_status == APP_AUDIO_CACHE_CACHEING) {\n TRACE(1, \"a2dp_audio_more_data cache not ready skip frame %d\\n\",\n overlay_type);\n } else {\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n if (allow_resample) {\n app_playback_resample_run(a2dp_resample, buf, len);\n } else\n#endif\n {\n l = decode_a2dp_frame((enum APP_OVERLAY_ID_T)overlay_type, buf, len);\n if (l != len) {\n TRACE(2, \"a2dp_audio_more_data decode err %d/%d\", l, len);\n if (l < len) {\n memset(buf + l, 0, len - l);\n // a2dp_cache_status = APP_AUDIO_CACHE_CACHEING;\n TRACE(0, \"set to APP_AUDIO_CACHE_CACHEING\");\n }\n } else {\n // TRACE(2,\"a2dp_audio_more_data decode success %d/%d\", l, len);\n }\n }\n if (a2dp_cache_status == APP_AUDIO_CACHE_OK) {\n attempt_slow_samplerate(overlay_type);\n }\n }\n\n#ifdef A2DP_EQ_24BIT\n if ((bt_sbc_player_get_sample_bit() == 16)\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n || allow_resample\n#endif\n ) {\n convert_16bit_to_24bit((int32_t *)buf, (int16_t *)buf,\n len / sizeof(int16_t));\n // Restore len to 24-bit sample buffer length\n len = len * (sizeof(int32_t) / sizeof(int16_t));\n }\n#endif\n\n A2DP_SYNC_WITH_GET_MUTUX_SET();\n\n return len;\n}\n\n#if defined(A2DP_LDAC_ON)\n/* Convert LDAC Error Code to string */\n#define CASE_RETURN_STR(const) \\\n case const: \\\n return #const;\nstatic const char *ldac_ErrCode2Str(int ErrCode) {\n switch (ErrCode) {\n CASE_RETURN_STR(LDACBT_ERR_NONE);\n CASE_RETURN_STR(LDACBT_ERR_NON_FATAL);\n CASE_RETURN_STR(LDACBT_ERR_BIT_ALLOCATION);\n CASE_RETURN_STR(LDACBT_ERR_NOT_IMPLEMENTED);\n CASE_RETURN_STR(LDACBT_ERR_NON_FATAL_ENCODE);\n CASE_RETURN_STR(LDACBT_ERR_FATAL);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_BAND);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_A);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_B);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_C);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_D);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_GRAD_E);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_IDSF);\n CASE_RETURN_STR(LDACBT_ERR_SYNTAX_SPEC);\n CASE_RETURN_STR(LDACBT_ERR_BIT_PACKING);\n CASE_RETURN_STR(LDACBT_ERR_ALLOC_MEMORY);\n CASE_RETURN_STR(LDACBT_ERR_FATAL_HANDLE);\n CASE_RETURN_STR(LDACBT_ERR_ILL_SYNCWORD);\n CASE_RETURN_STR(LDACBT_ERR_ILL_SMPL_FORMAT);\n CASE_RETURN_STR(LDACBT_ERR_ILL_PARAM);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_SAMPLING_FREQ);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_SUP_SAMPLING_FREQ);\n CASE_RETURN_STR(LDACBT_ERR_CHECK_SAMPLING_FREQ);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_CHANNEL_CONFIG);\n CASE_RETURN_STR(LDACBT_ERR_CHECK_CHANNEL_CONFIG);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_FRAME_LENGTH);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_SUP_FRAME_LENGTH);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_FRAME_STATUS);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_NSHIFT);\n CASE_RETURN_STR(LDACBT_ERR_ASSERT_CHANNEL_MODE);\n CASE_RETURN_STR(LDACBT_ERR_ENC_INIT_ALLOC);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADMODE);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADPAR_A);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADPAR_B);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADPAR_C);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_GRADPAR_D);\n CASE_RETURN_STR(LDACBT_ERR_ENC_ILL_NBANDS);\n CASE_RETURN_STR(LDACBT_ERR_PACK_BLOCK_FAILED);\n CASE_RETURN_STR(LDACBT_ERR_DEC_INIT_ALLOC);\n CASE_RETURN_STR(LDACBT_ERR_INPUT_BUFFER_SIZE);\n CASE_RETURN_STR(LDACBT_ERR_UNPACK_BLOCK_FAILED);\n CASE_RETURN_STR(LDACBT_ERR_UNPACK_BLOCK_ALIGN);\n CASE_RETURN_STR(LDACBT_ERR_UNPACK_FRAME_ALIGN);\n CASE_RETURN_STR(LDACBT_ERR_FRAME_LENGTH_OVER);\n CASE_RETURN_STR(LDACBT_ERR_FRAME_ALIGN_OVER);\n CASE_RETURN_STR(LDACBT_ERR_ALTER_EQMID_LIMITED);\n CASE_RETURN_STR(LDACBT_ERR_ILL_EQMID);\n CASE_RETURN_STR(LDACBT_ERR_ILL_SAMPLING_FREQ);\n CASE_RETURN_STR(LDACBT_ERR_ILL_NUM_CHANNEL);\n CASE_RETURN_STR(LDACBT_ERR_ILL_MTU_SIZE);\n CASE_RETURN_STR(LDACBT_ERR_HANDLE_NOT_INIT);\n default:\n return \"unknown-error-code\";\n }\n}\n\nchar a_ErrorCodeStr[128];\nconst char *get_error_code_string(int error_code) {\n int errApi, errHdl, errBlk;\n\n errApi = LDACBT_API_ERR(error_code);\n errHdl = LDACBT_HANDLE_ERR(error_code);\n errBlk = LDACBT_BLOCK_ERR(error_code);\n\n a_ErrorCodeStr[0] = '\\0';\n strcat(a_ErrorCodeStr, \"API:\");\n strcat(a_ErrorCodeStr, ldac_ErrCode2Str(errApi));\n strcat(a_ErrorCodeStr, \" Handle:\");\n strcat(a_ErrorCodeStr, ldac_ErrCode2Str(errHdl));\n strcat(a_ErrorCodeStr, \" Block:\");\n strcat(a_ErrorCodeStr, ldac_ErrCode2Str(errBlk));\n return a_ErrorCodeStr;\n}\n#endif\n\nextern uint8_t bt_sbc_player_get_bitsDepth(void);\n#if defined(A2DP_LDAC_ON)\nuint32_t ldac_buffer_used = 0;\n#endif\n\nstatic const char *a2dp_get_codec_name(enum APP_OVERLAY_ID_T overlay_type) {\n const char *codec_name;\n\n if (0) {\n#if defined(A2DP_LDAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n codec_name = \"LDAC\";\n#endif\n#if defined(A2DP_AAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n codec_name = \"AAC\";\n#endif\n#if defined(A2DP_SCALABLE_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_SCALABLE) {\n codec_name = \"SCALABLE\";\n#endif\n#if defined(A2DP_LHDC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n codec_name = \"LHDC\";\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n codec_name = \"SBC\";\n } else {\n codec_name = \"UNKNOWN\";\n }\n\n return codec_name;\n}\n\nstatic void a2dp_trace_codec_name(const char *prefix,\n enum APP_OVERLAY_ID_T overlay_type) {\n TRACE(3, \"\\n\\n%s: codecType=%x->:%s\\n\", prefix, overlay_type,\n a2dp_get_codec_name(overlay_type));\n}\n\nint a2dp_audio_init(void) {\n const float EQLevel[25] = {\n 0.0630957, 0.0794328, 0.1, 0.1258925, 0.1584893,\n 0.1995262, 0.2511886, 0.3162278, 0.398107, 0.5011872,\n 0.6309573, 0.794328, 1, 1.258925, 1.584893,\n 1.995262, 2.5118864, 3.1622776, 3.9810717, 5.011872,\n 6.309573, 7.943282, 10, 12.589254, 15.848932}; //-12~12\n uint8_t *buff = NULL;\n uint8_t i;\n\n enum APP_OVERLAY_ID_T overlay_type;\n\n overlay_type = app_get_current_overlay();\n\n a2dp_trace_codec_name(__func__, overlay_type);\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n APP_RESAMPLE_ITER_CALLBACK iter_cb;\n\n uint32_t iter_len;\n\n iter_cb = a2dp_resample_iter;\n\n if (0) {\n#if defined(A2DP_AAC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n iter_len = AAC_RESAMPLE_ITER_LEN;\n#endif\n } else if (overlay_type == APP_OVERLAY_A2DP) {\n iter_len = SBC_RESAMPLE_ITER_LEN;\n } else {\n ASSERT(false, \"%s: Bad app overlay type for play resample: %d\", __func__,\n overlay_type);\n }\n\n#ifdef CHIP_BEST1000\n if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2 &&\n hal_sysfreq_get() <= HAL_CMU_FREQ_52M) {\n allow_resample = true;\n }\n#endif\n if (allow_resample) {\n#ifdef RESAMPLE_ANY_SAMPLE_RATE\n float ratio;\n if (a2dp_sample_rate % AUD_SAMPRATE_8000) {\n ratio = (float)CODEC_FREQ_22P5792M *\n ((float)a2dp_sample_rate / AUD_SAMPRATE_44100) / CODEC_FREQ_26M;\n } else {\n ratio = (float)CODEC_FREQ_24P576M *\n ((float)a2dp_sample_rate / AUD_SAMPRATE_48000) / CODEC_FREQ_26M;\n }\n a2dp_resample = app_playback_resample_any_open(AUD_CHANNEL_NUM_2, iter_cb,\n iter_len, ratio);\n#else\n a2dp_resample = app_playback_resample_open(\n a2dp_sample_rate, AUD_CHANNEL_NUM_2, iter_cb, iter_len);\n#endif\n }\n#endif\n\n for (i = 0; i < sizeof(sbc_eq_band_gain) / sizeof(float); i++) {\n sbc_eq_band_gain[i] = EQLevel[cfg_aud_eq_sbc_band_settings[i] + 12];\n }\n\n A2DP_SYNC_WITH_GET_MUTUX_FREE();\n A2DP_SYNC_WITH_PUT_MUTUX_FREE();\n if (overlay_type == APP_OVERLAY_A2DP) {\n app_audio_mempool_get_buff((uint8_t **)&sbc_decoder,\n sizeof(btif_sbc_decoder_t));\n }\n\n#if defined(A2DP_AAC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n int ret;\n aac_meminit();\n ret = aacdec_init();\n ASSERT(ret == 0, \"%s: aacdec_init ERROR\", __func__);\n }\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\n if (overlay_type == APP_OVERLAY_A2DP_SCALABLE) {\n app_audio_mempool_get_buff((uint8_t **)&scalable_input_mid_buf,\n SCALABLE_READBUF_SIZE);\n app_audio_mempool_get_buff((uint8_t **)&scalable_decoder_place,\n SCALABLE_DECODER_SIZE);\n app_audio_mempool_get_buff((uint8_t **)&scalable_decoder_temp_buf,\n SCALABLE_FRAME_SIZE * 16);\n }\n hSSDecoder = NULL;\n#endif\n\n#if defined(A2DP_LHDC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n uint8_t bits_depth = bt_sbc_player_get_bitsDepth();\n AUD_SAMPRATE_T sample_rate = bt_get_sbc_sample_rate();\n TRACE(2, \"a2dp_audio_init sample Rate=%d, bits_depth = %d\\n\", sample_rate,\n bits_depth);\n TRACE(1, \"sys freq calc : %d\\n\", hal_sys_timer_calc_cpu_freq(5, 0));\n\n // lhdcInit(bits_depth, sample_rate, bits_depth >= 24 ? 1 : 0);\n // extern const char __testkey_start[];\n extern const char testkey_bin[];\n lhdcSetLicenseKeyTable((uint8_t *)testkey_bin);\n\n TRACE(0, \"lhdcSetLicenseKeyTable,testkey_bin:\\n\");\n for (uint8_t i = 0; i < 128; i++) {\n TRACE(1, \"i = %d\", i);\n DUMP8(\"0x%02x \", &testkey_bin[i], 32);\n i += 31;\n }\n lhdcInit(bits_depth, sample_rate, 0);\n initial_lhdc_assemble_packet(false);\n }\n#endif\n\n#ifdef SBC_QUEUE_SIZE\n if (0) {\n#if defined(A2DP_AAC_ON) || defined(A2DP_SCALABLE_ON) || defined(A2DP_LHDC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_AAC) {\n#if defined(MIX_MIC_DURING_MUSIC)\n g_sbc_queue_size = app_audio_mempool_free_buff_size() - 4096;\n#else\n g_sbc_queue_size = app_audio_mempool_free_buff_size();\n#endif\n#endif\n#if defined(A2DP_SCALABLE_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_SCALABLE) {\n#if defined(MIX_MIC_DURING_MUSIC)\n g_sbc_queue_size = app_audio_mempool_free_buff_size() - 4096;\n#else\n g_sbc_queue_size = app_audio_mempool_free_buff_size();\n#endif\n#endif\n#if defined(A2DP_LHDC_ON)\n } else if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n#if defined(MIX_MIC_DURING_MUSIC)\n g_sbc_queue_size = app_audio_mempool_free_buff_size() - 4096;\n#else\n g_sbc_queue_size = app_audio_mempool_free_buff_size();\n#endif\n#endif\n } else {\n g_sbc_queue_size = SBC_QUEUE_SIZE;\n }\n#else\n g_sbc_queue_size = app_audio_mempool_free_buff_size();\n#endif\n\n#if defined(A2DP_LDAC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n // if((bt_sbc_player_get_codec_type() == BTIF_AVDTP_CODEC_TYPE_NON_A2DP)){\n // app_audio_mempool_get_buff(&g_medMemHeap, MED_MEM_HEAP_SIZE);\n // speech_heap_init((uint8_t *)(&g_medMemHeap[0]), MED_MEM_HEAP_SIZE);\n g_sbc_queue_size = app_audio_mempool_free_buff_size() - MED_MEM_HEAP_SIZE;\n TRACE(1, \"A2DP_LDAC_ON g_sbc_queue_size %d\\n\", g_sbc_queue_size);\n }\n#endif\n\n app_audio_mempool_get_buff(&buff, g_sbc_queue_size);\n ASSERT((buff != NULL), \"%s:get sbc queue buff fail, size %d bytes!\", __func__,\n g_sbc_queue_size);\n memset(buff, 0, g_sbc_queue_size);\n a2dp_audio_isrunning(A2DPPLAY_STRTEAM_PUT, false);\n a2dp_audio_isrunning(A2DPPLAY_STRTEAM_GET, false);\n\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_InitCQueue(&sbc_queue, g_sbc_queue_size, buff);\n UNLOCK_APP_AUDIO_QUEUE();\n\n#if defined(A2DP_LDAC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n ldac_buffer_used =\n app_audio_mempool_total_buf() - app_audio_mempool_free_buff_size();\n ldac_recovery = false;\n ldac_dec_init();\n }\n#endif\n\n#ifdef A2DP_AUDIO_SYNC_WITH_LOCAL\n a2dp_audio_sync_proc(A2DPPLAY_SYNC_STATUS_SET | A2DPPLAY_SYNC_STATUS_RESET,\n A2DP_AUDIO_SYNC_WITH_LOCAL_SAMPLERATE_DEFAULT);\n#endif\n\n#ifdef A2DP_CP_ACCEL\n cp_a2dp_init();\n#endif\n\n a2dp_cache_status = APP_AUDIO_CACHE_CACHEING;\n need_init_decoder = true;\n dec_reset_queue = false;\n\n sbc_frame_rev_len = 0;\n sbc_frame_num = 0;\n sbc_frame_size = SBC_TEMP_BUFFER_SIZE;\n mtu_count = 0;\n assumed_mtu_interval = 0;\n return 0;\n}\n\nint a2dp_audio_deinit(void) {\n enum APP_OVERLAY_ID_T overlay_type;\n\n overlay_type = app_get_current_overlay();\n\n a2dp_trace_codec_name(__func__, overlay_type);\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n if (allow_resample) {\n app_playback_resample_close(a2dp_resample);\n a2dp_resample = NULL;\n#ifdef CHIP_BEST1000\n allow_resample = false;\n#endif\n }\n#endif\n\n#ifdef A2DP_CP_ACCEL\n cp_a2dp_deinit();\n#endif\n\n#if defined(A2DP_LDAC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_LDAC) {\n ldac_dec_deinit();\n }\n#endif\n\n#if defined(A2DP_LHDC_ON)\n if (overlay_type == APP_OVERLAY_A2DP_LHDC) {\n lhdcDestroy();\n }\n#endif\n\n#if defined(A2DP_AAC_ON)\n aacdec_deinit();\n aac_memdeinit();\n#endif\n\n A2DP_SYNC_WITH_GET_MUTUX_SET();\n A2DP_SYNC_WITH_PUT_MUTUX_SET();\n\n A2DP_SYNC_WITH_GET_MUTUX_FREE();\n A2DP_SYNC_WITH_PUT_MUTUX_FREE();\n\n a2dp_audio_isrunning(A2DPPLAY_STRTEAM_PUT, false);\n a2dp_audio_isrunning(A2DPPLAY_STRTEAM_GET, false);\n\n a2dp_cache_status = APP_AUDIO_CACHE_QTY;\n need_init_decoder = true;\n\n sbc_frame_rev_len = 0;\n sbc_frame_num = 0;\n sbc_frame_size = SBC_TEMP_BUFFER_SIZE;\n mtu_count = 0;\n assumed_mtu_interval = 0;\n\n return 0;\n}\n\nfloat a2dp_audio_latency_factor_get(void) { return 1.0f; }\n#endif\n" }, { "path": "apps/audioplayers/app_audio.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_bt_trace.h\"\n#include \"cmsis_os.h\"\n#include \"string.h\"\n\n#include \"app_audio.h\"\n#include \"app_media_player.h\"\n#include \"app_ring_merge.h\"\n#include \"app_thread.h\"\n#include \"cqueue.h\"\n#include \"hal_aud.h\"\n#include \"list.h\"\n#include \"nvrecord.h\"\n#include \"resources.h\"\n#include \n\n#include \"a2dp_api.h\"\n\n#include \"app_bt_media_manager.h\"\n#include \"btapp.h\"\n\nextern uint8_t __StackLimit[];\nextern uint8_t __HeapLimit[];\n\nstatic const size_t heap_size = __StackLimit - __HeapLimit - 512;\n\nstatic bool app_audio_init = false;\n\nstatic uint32_t capture_audio_buff_size_used;\n// from the bottom of the system available memory pool, size is\n// APP_CAPTURE_AUDIO_BUFFER_SIZE can be overlayed with the sco used audio buffer\nstatic uint8_t *capture_audio_buffer =\n __HeapLimit + heap_size - APP_CAPTURE_AUDIO_BUFFER_SIZE;\n\nint app_capture_audio_mempool_init(void) {\n TRACE_AUD_HDL_I(\"[CAPMEM][INIT] size %d.\", APP_CAPTURE_AUDIO_BUFFER_SIZE);\n capture_audio_buff_size_used = 0;\n memset((uint8_t *)capture_audio_buffer, 0, APP_CAPTURE_AUDIO_BUFFER_SIZE);\n\n return 0;\n}\n\nuint32_t app_capture_audio_mempool_free_buff_size() {\n return APP_CAPTURE_AUDIO_BUFFER_SIZE - capture_audio_buff_size_used;\n}\n\nint app_capture_audio_mempool_get_buff(uint8_t **buff, uint32_t size) {\n uint32_t buff_size_free;\n uint8_t *capture_buf_addr = (uint8_t *)capture_audio_buffer;\n buff_size_free = app_capture_audio_mempool_free_buff_size();\n\n if (size % 4) {\n size = size + (4 - size % 4);\n }\n\n TRACE_AUD_HDL_I(\"[CAPMEM][GET] current free %d to allocate %d\",\n buff_size_free, size);\n\n ASSERT(size <= buff_size_free, \"[%s] size = %d > free size = %d\", __func__,\n size, buff_size_free);\n\n *buff = capture_buf_addr + capture_audio_buff_size_used;\n\n capture_audio_buff_size_used += size;\n TRACE_AUD_HDL_I(\"[CAPMEM][GET] %d, now used %d left %d\", size,\n capture_audio_buff_size_used,\n app_capture_audio_mempool_free_buff_size());\n\n return 0;\n}\n\nosPoolDef(app_audio_status_mempool, 20, APP_AUDIO_STATUS);\nosPoolId app_audio_status_mempool = NULL;\n\n// control queue access\nosMutexId g_app_audio_queue_mutex_id = NULL;\nosMutexDef(g_app_audio_queue_mutex);\n\n// control pcmbuff access\nstatic CQueue app_audio_pcm_queue;\nstatic osMutexId app_audio_pcmbuff_mutex_id = NULL;\nosMutexDef(app_audio_pcmbuff_mutex);\n\n#ifdef __AUDIO_QUEUE_SUPPORT__\n\ntypedef struct {\n list_t *audio_list;\n} APP_AUDIO_CONFIG;\n\nAPP_AUDIO_CONFIG app_audio_conifg = {.audio_list = NULL};\n\n#endif\n\nvoid LOCK_APP_AUDIO_QUEUE() {\n osMutexWait(g_app_audio_queue_mutex_id, osWaitForever);\n}\n\nvoid UNLOCK_APP_AUDIO_QUEUE() { osMutexRelease(g_app_audio_queue_mutex_id); }\n\nuint32_t app_audio_lr_balance(uint8_t *buf, uint32_t len, int8_t balance) {\n short *balance_buf = (short *)buf;\n uint32_t balance_len = len / 2;\n float factor;\n\n ASSERT((balance >= -100) && (balance <= 100), \"balance = %d is invalid!\",\n balance);\n\n if (balance > 0) {\n // reduce L channel\n factor = 1 - 0.01 * balance;\n for (uint32_t i = 0; i < balance_len; i += 2) {\n balance_buf[i] = (short)(factor * balance_buf[i]);\n }\n } else if (balance < 0) {\n // reduce R channel\n factor = 1 + 0.01 * balance;\n for (uint32_t i = 0; i < balance_len; i += 2) {\n balance_buf[i + 1] = (short)(factor * balance_buf[i + 1]);\n }\n }\n return 0;\n}\n\nvoid app_audio_mempool_init_with_specific_size(uint32_t size) {\n syspool_init_specific_size(size);\n}\n\nint app_audio_pcmbuff_init(uint8_t *buff, uint16_t len) {\n if (app_audio_pcmbuff_mutex_id == NULL)\n app_audio_pcmbuff_mutex_id =\n osMutexCreate((osMutex(app_audio_pcmbuff_mutex)));\n\n if ((buff == NULL) || (app_audio_pcmbuff_mutex_id == NULL))\n return -1;\n\n osMutexWait(app_audio_pcmbuff_mutex_id, osWaitForever);\n InitCQueue(&app_audio_pcm_queue, len, buff);\n memset(buff, 0x00, len);\n osMutexRelease(app_audio_pcmbuff_mutex_id);\n\n return 0;\n}\n\nint app_audio_pcmbuff_length(void) {\n int len;\n\n osMutexWait(app_audio_pcmbuff_mutex_id, osWaitForever);\n len = LengthOfCQueue(&app_audio_pcm_queue);\n osMutexRelease(app_audio_pcmbuff_mutex_id);\n\n return len;\n}\n\nint app_audio_pcmbuff_put(uint8_t *buff, uint16_t len) {\n int status;\n\n osMutexWait(app_audio_pcmbuff_mutex_id, osWaitForever);\n status = EnCQueue(&app_audio_pcm_queue, buff, len);\n osMutexRelease(app_audio_pcmbuff_mutex_id);\n\n return status;\n}\n\nint app_audio_pcmbuff_get(uint8_t *buff, uint16_t len) {\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n int status;\n\n osMutexWait(app_audio_pcmbuff_mutex_id, osWaitForever);\n status = PeekCQueue(&app_audio_pcm_queue, len, &e1, &len1, &e2, &len2);\n if (len == (len1 + len2)) {\n memcpy(buff, e1, len1);\n memcpy(buff + len1, e2, len2);\n DeCQueue(&app_audio_pcm_queue, 0, len1);\n DeCQueue(&app_audio_pcm_queue, 0, len2);\n } else {\n memset(buff, 0x00, len);\n status = -1;\n }\n osMutexRelease(app_audio_pcmbuff_mutex_id);\n\n return status;\n}\n\nint app_audio_pcmbuff_discard(uint16_t len) {\n int status;\n\n osMutexWait(app_audio_pcmbuff_mutex_id, osWaitForever);\n status = DeCQueue(&app_audio_pcm_queue, 0, len);\n osMutexRelease(app_audio_pcmbuff_mutex_id);\n\n return status;\n}\n\nvoid __attribute__((section(\".fast_text_sram\")))\napp_audio_memcpy_16bit(int16_t *des, int16_t *src, int len) {\n // Check input\n for (int i = 0; i < len; i++) {\n des[i] = src[i];\n }\n}\n\nvoid __attribute__((section(\".fast_text_sram\")))\napp_audio_memset_16bit(int16_t *des, int16_t val, int len) {\n // Check input\n for (int i = 0; i < len; i++) {\n des[i] = val;\n }\n}\n\n#ifdef __AUDIO_QUEUE_SUPPORT__\nint app_audio_sendrequest_param(uint16_t id, uint8_t status, uint32_t ptr,\n uint32_t param) {\n uint32_t audevt;\n APP_MESSAGE_BLOCK msg;\n\n if (app_audio_init == false)\n return -1;\n\n msg.mod_id = APP_MODUAL_AUDIO;\n APP_AUDIO_SET_MESSAGE(audevt, id, status);\n msg.msg_body.message_id = audevt;\n msg.msg_body.message_ptr = ptr;\n msg.msg_body.message_Param0 = param;\n app_mailbox_put(&msg);\n\n return 0;\n}\n\nint app_audio_sendrequest(uint16_t id, uint8_t status, uint32_t ptr) {\n return app_audio_sendrequest_param(id, status, ptr, 0);\n}\n\nextern bool app_audio_list_playback_exist(void);\n#ifdef MEDIA_PLAYER_SUPPORT\nstatic uint8_t app_audio_get_list_playback_num(void) {\n APP_AUDIO_STATUS *audio_handle = NULL;\n list_node_t *node = NULL;\n uint8_t num = 0;\n for (node = list_begin(app_audio_conifg.audio_list);\n node != list_end(app_audio_conifg.audio_list); node = list_next(node)) {\n audio_handle = (APP_AUDIO_STATUS *)list_node(node);\n if (audio_handle == NULL) {\n return num;\n }\n if (audio_handle->id == APP_PLAY_BACK_AUDIO)\n num++;\n }\n return num;\n}\n#endif\n#endif\n\nstatic bool need_flush_flash_switch_audio = false;\nvoid app_audio_switch_flash_flush_req(void) {\n uint32_t lock;\n\n lock = int_lock();\n need_flush_flash_switch_audio = true;\n int_unlock(lock);\n}\n\nstatic void app_audio_switch_flash_proc(void) {\n // no need to do this across the audio switch,\n // will use suspend flash erase to assure that no audio\n // irq is missing for handling caused by long time global irq disabling\n // during flash erase.\n // Just flash the nvrecord flash periodically\n return;\n\n uint32_t lock;\n bool need_flush_flash = false;\n\n lock = int_lock();\n if (need_flush_flash_switch_audio) {\n need_flush_flash_switch_audio = false;\n need_flush_flash = true;\n }\n int_unlock(lock);\n\n if (need_flush_flash) {\n nv_record_flash_flush();\n }\n}\n\n#ifdef VOICE_DATAPATH\nstatic bool app_audio_handle_pre_processing(APP_MESSAGE_BODY *msg_body) {\n uint16_t stream_type;\n APP_AUDIO_GET_AUD_ID(msg_body->message_ptr, stream_type);\n\n bool isToResetCaptureStream = false;\n if ((BT_STREAM_SBC == stream_type) || (BT_STREAM_MEDIA == stream_type)) {\n if (app_audio_manager_capture_is_active()) {\n isToResetCaptureStream = true;\n }\n }\n\n if (isToResetCaptureStream) {\n app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_CAPTURE,\n 0, 0);\n\n APP_MESSAGE_BLOCK msg;\n msg.msg_body = *msg_body;\n msg.mod_id = APP_MODUAL_AUDIO_MANAGE;\n app_mailbox_put(&msg);\n app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n BT_STREAM_CAPTURE, 0, 0);\n\n return false;\n } else {\n return true;\n }\n}\n#endif\n\nstatic int app_audio_handle_process(APP_MESSAGE_BODY *msg_body) {\n int nRet = -1;\n\n APP_AUDIO_STATUS aud_status;\n\n if (app_audio_init == false)\n return -1;\n\n#ifdef VOICE_DATAPATH\n bool isContinue = app_audio_handle_pre_processing(msg_body);\n if (!isContinue) {\n return -1;\n }\n#endif\n\n APP_AUDIO_GET_ID(msg_body->message_id, aud_status.id);\n APP_AUDIO_GET_STATUS(msg_body->message_id, aud_status.status);\n APP_AUDIO_GET_AUD_ID(msg_body->message_ptr, aud_status.aud_id);\n APP_AUDIO_GET_FREQ(msg_body->message_Param0, aud_status.freq);\n\n switch (aud_status.status) {\n case APP_BT_SETTING_OPEN:\n#ifdef __AUDIO_QUEUE_SUPPORT__\n TRACE_AUD_HDL_I(\"[OPEN] before status_id: 0x%x%s, aud_id: %d, len = %d\",\n aud_status.id, player2str(aud_status.id), aud_status.aud_id,\n list_length(app_audio_conifg.audio_list));\n\n if (app_audio_list_append(&aud_status)) {\n app_bt_stream_open(&aud_status);\n TRACE_AUD_HDL_I(\"[OPEN] after status_id: 0x%x%s, len = %d\", aud_status.id,\n player2str(aud_status.id),\n list_length(app_audio_conifg.audio_list));\n }\n#else\n app_bt_stream_open(&aud_status);\n#endif\n\n break;\n case APP_BT_SETTING_CLOSE:\n app_audio_switch_flash_proc();\n#ifdef __AUDIO_QUEUE_SUPPORT__\n APP_AUDIO_STATUS next_status;\n TRACE_AUD_HDL_I(\"[CLOSE] current id: 0x%x%s\", aud_status.id,\n player2str(aud_status.id));\n app_bt_stream_close(aud_status.id);\n app_audio_switch_flash_proc();\n#ifdef MEDIA_PLAYER_SUPPORT\n if (aud_status.id == APP_PLAY_BACK_AUDIO) {\n TRACE_AUD_HDL_I(\"[CLOSE] list: %d\", app_audio_get_list_playback_num());\n if (app_audio_get_list_playback_num() == 1) {\n TRACE_AUD_HDL_I(\"=======>APP_BT_SETTING_CLOSE MEDIA\");\n bt_media_stop(BT_STREAM_MEDIA, BT_DEVICE_ID_1);\n }\n }\n#endif\n if (app_audio_list_rmv_callback(&aud_status, &next_status,\n APP_BT_SETTING_Q_POS_HEAD, false)) {\n TRACE_AUD_HDL_I(\"[CLOSE] %p, next id: 0x%x%s, status %d\", &next_status,\n next_status.id, player2str(next_status.id),\n next_status.status);\n app_bt_stream_open(&next_status);\n }\n#else\n app_bt_stream_close(aud_status.id);\n app_audio_switch_flash_proc();\n#endif\n break;\n case APP_BT_SETTING_SETUP:\n app_bt_stream_setup(aud_status.id, msg_body->message_ptr);\n break;\n case APP_BT_SETTING_RESTART:\n app_bt_stream_restart(&aud_status);\n break;\n case APP_BT_SETTING_CLOSEALL:\n app_bt_stream_closeall();\n#ifdef __AUDIO_QUEUE_SUPPORT__\n app_audio_list_clear();\n#endif\n app_audio_switch_flash_proc();\n break;\n default:\n break;\n }\n\n return nRet;\n}\n\n#ifdef __AUDIO_QUEUE_SUPPORT__\nstatic void app_audio_handle_free(void *data) {\n#ifdef MEDIA_PLAYER_SUPPORT\n APP_AUDIO_STATUS *status = (APP_AUDIO_STATUS *)data;\n\n if (status->id == APP_PLAY_BACK_AUDIO) {\n TRACE_AUD_HDL_I(\"[HANDLE_FREE] , aud_id: 0x%x, type = 0x%x\", status->aud_id,\n status->aud_type);\n }\n#endif\n osPoolFree(app_audio_status_mempool, data);\n}\n\nvoid app_audio_list_create() {\n if (app_audio_conifg.audio_list == NULL) {\n app_audio_conifg.audio_list = list_new(app_audio_handle_free, NULL, NULL);\n }\n}\n\nbool app_audio_list_stream_exist() {\n APP_AUDIO_STATUS *audio_handle = NULL;\n list_node_t *node = NULL;\n\n for (node = list_begin(app_audio_conifg.audio_list);\n node != list_end(app_audio_conifg.audio_list); node = list_next(node)) {\n\n audio_handle = (APP_AUDIO_STATUS *)list_node(node);\n if (audio_handle == NULL) {\n return false;\n }\n if (audio_handle->id == APP_BT_STREAM_HFP_PCM ||\n audio_handle->id == APP_BT_STREAM_HFP_CVSD ||\n audio_handle->id == APP_BT_STREAM_HFP_VENDOR ||\n audio_handle->id == APP_BT_STREAM_A2DP_SBC ||\n audio_handle->id == APP_BT_STREAM_A2DP_AAC ||\n#ifdef VOICE_DATAPATH\n audio_handle->id == APP_BT_STREAM_VOICEPATH ||\n#endif\n#ifdef __AI_VOICE__\n audio_handle->id == APP_BT_STREAM_AI_VOICE ||\n#endif\n#ifdef __THIRDPARTY\n audio_handle->id == APP_BT_STREAM_THIRDPARTY_VOICE ||\n#endif\n audio_handle->id == APP_BT_STREAM_A2DP_VENDOR) {\n TRACE_AUD_HDL_I(\"[STREAM_LIST][EXIST] id 0x%x\", audio_handle->id);\n return true;\n }\n }\n\n return false;\n}\n\nbool app_audio_list_filter_exist(APP_AUDIO_STATUS *aud_status) {\n#ifdef MEDIA_PLAYER_SUPPORT\n APP_AUDIO_STATUS *audio_handle = NULL;\n list_node_t *node = NULL;\n uint8_t cnt = 0;\n\n if (aud_status->id == APP_PLAY_BACK_AUDIO) {\n if (aud_status->aud_id == AUD_ID_BT_CALL_INCOMING_CALL) {\n for (node = list_begin(app_audio_conifg.audio_list);\n node != list_end(app_audio_conifg.audio_list);\n node = list_next(node)) {\n audio_handle = (APP_AUDIO_STATUS *)list_node(node);\n if (audio_handle == NULL) {\n return false;\n }\n if (audio_handle->id == APP_PLAY_BACK_AUDIO &&\n audio_handle->aud_id == AUD_ID_BT_CALL_INCOMING_CALL) {\n TRACE_AUD_HDL_I(\"[STREAM_LIST][FILTER] id 0x%x\", audio_handle->id);\n return true;\n }\n }\n } else {\n for (node = list_begin(app_audio_conifg.audio_list);\n node != list_end(app_audio_conifg.audio_list);\n node = list_next(node)) {\n audio_handle = (APP_AUDIO_STATUS *)list_node(node);\n if (cnt++ > 1) {\n TRACE_AUD_HDL_I(\"[STREAM_LIST][FILTER] cnt %d\", cnt);\n return true;\n }\n }\n }\n }\n#endif\n return false;\n}\n\nbool app_audio_list_playback_exist(void) {\n#ifdef MEDIA_PLAYER_SUPPORT\n APP_AUDIO_STATUS *audio_handle = NULL;\n list_node_t *node = NULL;\n\n for (node = list_begin(app_audio_conifg.audio_list);\n node != list_end(app_audio_conifg.audio_list); node = list_next(node)) {\n audio_handle = (APP_AUDIO_STATUS *)list_node(node);\n if (audio_handle == NULL) {\n return false;\n }\n if (audio_handle->id == APP_PLAY_BACK_AUDIO) {\n TRACE_AUD_HDL_I(\"[STREAM_LIST][PLAYBACK_EXIST]\");\n return true;\n }\n }\n#endif\n return false;\n}\n\nvoid app_audio_list_playback_clear(void) {\n#ifdef MEDIA_PLAYER_SUPPORT\n APP_AUDIO_STATUS *audio_handle = NULL;\n list_node_t *node = NULL;\n\n for (node = list_begin(app_audio_conifg.audio_list);\n node != list_end(app_audio_conifg.audio_list); node = list_next(node)) {\n audio_handle = (APP_AUDIO_STATUS *)list_node(node);\n if (audio_handle == NULL) {\n TRACE_AUD_HDL_I(\"[STREAM_LIST][CLR] find null\\n \");\n return;\n }\n if (audio_handle->id == APP_PLAY_BACK_AUDIO) {\n list_remove(app_audio_conifg.audio_list, list_node(node));\n }\n }\n#endif\n}\n\nbool app_audio_list_append(APP_AUDIO_STATUS *aud_status) {\n APP_AUDIO_STATUS *data_to_append = NULL;\n bool add_data_to_head_of_list = false;\n bool ret = true;\n TRACE_AUD_HDL_I(\"[STREAM_LIST][APPEND] id 0x%x%s\", aud_status->id,\n player2str(aud_status->id));\n#ifdef MEDIA_PLAYER_SUPPORT\n if (aud_status->id == APP_PLAY_BACK_AUDIO) {\n // ignore redundant ring ind from hfp...\n if (app_audio_list_filter_exist(aud_status)) {\n return false;\n }\n\n if (app_audio_list_playback_exist()) {\n if (list_length(app_audio_conifg.audio_list) >= MAX_AUDIO_BUF_LIST) {\n if (app_audio_list_stream_exist()) {\n data_to_append =\n (APP_AUDIO_STATUS *)osPoolCAlloc(app_audio_status_mempool);\n if (data_to_append == NULL) {\n return false;\n }\n memcpy(data_to_append,\n (const void *)list_front(app_audio_conifg.audio_list),\n sizeof(APP_AUDIO_STATUS));\n add_data_to_head_of_list = true;\n }\n\n app_audio_list_clear();\n TRACE_AUD_HDL_E(\"[STREAM_LIST][APPEND] FIXME!!!!\\n \");\n } else {\n ret = false;\n }\n }\n } else\n#endif\n {\n add_data_to_head_of_list = true;\n }\n\n if (data_to_append == NULL) {\n data_to_append = (APP_AUDIO_STATUS *)osPoolCAlloc(app_audio_status_mempool);\n if (data_to_append == NULL) {\n return false;\n }\n memcpy(data_to_append, aud_status, sizeof(APP_AUDIO_STATUS));\n }\n\n if (add_data_to_head_of_list) {\n list_prepend(app_audio_conifg.audio_list, (void *)data_to_append);\n } else {\n list_append(app_audio_conifg.audio_list, (void *)data_to_append);\n }\n\n TRACE_AUD_HDL_I(\"[STREAM_LIST][APPEND] id 0x%x%s status %d len %d ret %d\",\n data_to_append->id, player2str(data_to_append->id),\n data_to_append->status,\n list_length(app_audio_conifg.audio_list), ret);\n return ret;\n}\n\nbool app_audio_list_rmv_callback(APP_AUDIO_STATUS *status_close,\n APP_AUDIO_STATUS *status_next,\n enum APP_BT_AUDIO_Q_POS pos, bool pop_next) {\n void *data_to_remove = NULL;\n bool ret = false;\n\n // for status: first bt_a2dp->APP_BT_SETTING_CLOSE,then ring->\n // APP_BT_SETTING_CLOSE\n TRACE_AUD_HDL_I(\"[STREAM_LIST][RMV] audio list len %d close_id 0x%x%s\",\n list_length(app_audio_conifg.audio_list), status_close->id,\n player2str(status_close->id));\n if (list_length(app_audio_conifg.audio_list) == 0) {\n return false;\n }\n\n#ifdef MEDIA_PLAYER_SUPPORT\n APP_AUDIO_STATUS *audio_handle = NULL;\n list_node_t *node = NULL;\n if (status_close->id == APP_PLAY_BACK_AUDIO) {\n for (node = list_begin(app_audio_conifg.audio_list);\n node != list_end(app_audio_conifg.audio_list);\n node = list_next(node)) {\n audio_handle = (APP_AUDIO_STATUS *)list_node(node);\n if (audio_handle == NULL) {\n return ret;\n }\n if (audio_handle->id == APP_PLAY_BACK_AUDIO) {\n list_node_t *nod_next = list_next(node);\n data_to_remove = list_node(node);\n\n if (pop_next) {\n memcpy(status_next, list_node(node), sizeof(APP_AUDIO_STATUS));\n ret = true;\n break;\n }\n if (nod_next != NULL) {\n memcpy(status_next, list_node(nod_next), sizeof(APP_AUDIO_STATUS));\n ASSERT(status_next->id == APP_PLAY_BACK_AUDIO,\n \"[%s] 111ERROR: status_next->id != APP_PLAY_BACK_AUDIO\",\n __func__);\n\n ret = true;\n } else if (app_audio_list_stream_exist()) {\n void *indata = list_front(app_audio_conifg.audio_list);\n if (indata == NULL) {\n return ret;\n }\n memcpy(status_next, indata, sizeof(APP_AUDIO_STATUS));\n ASSERT(status_next->id != APP_PLAY_BACK_AUDIO,\n \"[%s] 222ERROR: status_next->id != APP_PLAY_BACK_AUDIO\",\n __func__);\n\n ret = true;\n }\n break;\n }\n }\n } else // maybe...a2dp send >> APP_BT_SETTING_CLOSE, when ring\n#endif\n {\n if (app_audio_list_stream_exist()) {\n if (pos == APP_BT_SETTING_Q_POS_HEAD) {\n data_to_remove = list_front(app_audio_conifg.audio_list);\n } else if (pos == APP_BT_SETTING_Q_POS_TAIL) {\n data_to_remove = list_back(app_audio_conifg.audio_list);\n }\n }\n }\n\n if (data_to_remove) {\n list_remove(app_audio_conifg.audio_list, data_to_remove);\n }\n TRACE_AUD_HDL_I(\"[STREAM_LIST][RMV] end len:%d ret %d data %p\",\n list_length(app_audio_conifg.audio_list), ret,\n data_to_remove);\n return ret;\n}\n\nvoid app_audio_list_clear() { list_clear(app_audio_conifg.audio_list); }\n#endif\n\nvoid app_audio_open(void) {\n if (app_audio_init) {\n return;\n }\n if (g_app_audio_queue_mutex_id == NULL) {\n g_app_audio_queue_mutex_id =\n osMutexCreate((osMutex(g_app_audio_queue_mutex)));\n } else {\n ASSERT(0, \"[%s] ERROR: g_app_audio_queue_mutex_id != NULL\", __func__);\n }\n\n if (app_audio_status_mempool == NULL)\n app_audio_status_mempool = osPoolCreate(osPool(app_audio_status_mempool));\n ASSERT(app_audio_status_mempool,\n \"[%s] ERROR: app_audio_status_mempool != NULL\", __func__);\n\n#ifdef __AUDIO_QUEUE_SUPPORT__\n app_audio_list_create();\n#endif\n app_ring_merge_init();\n\n app_set_threadhandle(APP_MODUAL_AUDIO, app_audio_handle_process);\n\n app_bt_stream_init();\n\n app_audio_init = true;\n}\n\nvoid app_audio_close(void) {\n app_set_threadhandle(APP_MODUAL_AUDIO, NULL);\n app_audio_init = false;\n}\n" }, { "path": "apps/audioplayers/app_audio.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_AUDIO_H__\n#define __APP_AUDIO_H__\n\n#include \"app_bt_stream.h\"\n#include \"heap_api.h\"\n\n//should solve this problem\n//#include \"./../../utils/cqueue/cqueue.h\"\n//#include \"cqueue.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n//This buff is used as queue\n#ifndef APP_AUDIO_BUFFER_SIZE\n#if (RAM_SIZE >= 0x48000)\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n\n#if defined(A2DP_EQ_24BIT)\n#define APP_AUDIO_BUFFER_SIZE (1024 * 210)\n#else\n#define APP_AUDIO_BUFFER_SIZE (1024 * 140)\n#endif\n\n#else\n#define APP_AUDIO_BUFFER_SIZE (1024 * 100)\n#endif\n\n#elif (RAM_SIZE >= 0x40000)\n\n#ifdef NEW_NV_RECORD_ENABLED\n#define APP_AUDIO_BUFFER_SIZE (1024 * 62)\n#else\n#define APP_AUDIO_BUFFER_SIZE (1024 * 59)\n#endif\n\n#else // RAM_SIZE < 0x40000\n\n#ifdef APP_TEST_AUDIO\n#define APP_AUDIO_BUFFER_SIZE (1024 * 10)\n#elif defined(SPEECH_RX_NS)\n#define APP_AUDIO_BUFFER_SIZE (1024 * 37)\n#else\n#define APP_AUDIO_BUFFER_SIZE (1024 * 32)\n#endif\n\n#endif // RAM_SIZE < 0x40000\n#endif\n\n#if defined(VOB_ENCODING_ALGORITHM) && (VOB_ENCODING_ALGORITHM == ENCODING_ALGORITHM_OPUS)\n\n#ifdef __ALEXA_WWE\n#ifdef __ALEXA_WWE_LITE\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (63*1024)\n#else\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (305*1024)\n#endif\n\n#elif defined(SPEECH_CAPTURE_TWO_CHANNEL)\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (76*1024)\n#elif defined(__DUAL_MIC_RECORDING__)\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (79*1024)\n#else\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (67*1024)\n#endif\n\n#elif defined(__AMA_VOICE__) && (VOB_ENCODING_ALGORITHM == ENCODING_ALGORITHM_SBC)\n#if defined(CHIP_BEST1400) && defined(__AI_VOICE__)\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (13*1024)\n#else\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (17*1024)\n#endif\n#elif defined(__KWS_ALEXA__)\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (160*1024)\n#elif defined(AI_CAPTURE_DATA_AEC)\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (19*1024-512)\n#elif defined(GSOUND_HOTWORD_EXTERNAL)\n/// gsound_external_hotword_configuration\n#ifdef VOICE_DETECTOR_EN\n/// VAD_enabled_configuration\n#ifdef VAD_USE_8K_SAMPLE_RATE\n/// vad_use_8K_sample_rate_configuration\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE ((32 + 16 + 32)*1024-512)\n/// vad_use_8K_sample_rate_configuration\n#else\n/// vad_use_16K_sample_rate_configuration\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE ((32 + 32)*1024-512)\n/// vad_use_16K_sample_rate_configuration\n#endif\n/// VAD_enabled_configuration\n#else\n/// VAD_disabled_configuration\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (32*1024-512)\n/// VAD_disabled_configuration\n#endif\n/// gsound_external_hotword_configuration\n#else\n#ifdef VOICE_DETECTOR_EN\n/// VAD_enabled_configuration\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE ((13 + 32)*1024-512)\n/// VAD_enabled_configuration\n#else\n/// VAD_disabled_configuration\n#define APP_CAPTURE_AUDIO_BUFFER_SIZE (13*1024-512)\n/// VAD_disabled_configuration\n#endif\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\n#define SCALABLE_FRAME_SIZE (864)\n#define SCALABLE_HEAD_SIZE\t(4)\t/* pick something big enough to hold a bunch of frames */\n#define SCALABLE_READBUF_SIZE\t(500)\t/* pick something big enough to hold a bunch of frames */\n#define SCALABLE_DECODER_SIZE (17456)\t/* pick something big enough to hold a bunch of frames */\n#define SBM_FAST_SPEED 67380 // 840 2.76%\n#define SBM_SLOW_SPEED 63730 // 888 2.76%\n#define SBM_NUM_NORMAL 100\n#endif\n\n#define MAX_AUDIO_BUF_LIST 20\nenum APP_AUDIO_CACHE_T {\n APP_AUDIO_CACHE_CACHEING= 0,\n APP_AUDIO_CACHE_OK,\n APP_AUDIO_CACHE_QTY,\n};\n\n#define APP_AUDIO_SET_MESSAGE(appevt, id, status) (appevt = (((uint32_t)id&0xffff)<<16)|(status&0xffff))\n#define APP_AUDIO_GET_ID(appevt, id) (id = (appevt>>16)&0xffff)\n#define APP_AUDIO_GET_STATUS(appevt, status) (status = appevt&0xffff)\n#define APP_AUDIO_GET_AUD_ID(appevt, aud_id) (aud_id = appevt)\n#define APP_AUDIO_GET_FREQ(appevt, freq) (freq = appevt)\n\n#define APP_AUDIO_InitCQueue(a, b, c) InitCQueue(a, b, c)\n#define APP_AUDIO_AvailableOfCQueue(a) AvailableOfCQueue(a)\n#define APP_AUDIO_LengthOfCQueue(a) LengthOfCQueue(a)\n#define APP_AUDIO_PeekCQueue(a, b, c, d, e, f) PeekCQueue(a, b, c, d, e, f)\n#define APP_AUDIO_EnCQueue(a, b, c) EnCQueue(a, b, c)\n#define APP_AUDIO_DeCQueue(a, b, c) DeCQueue(a, b, c)\n\n#define app_audio_mempool_init syspool_init\n\n#define app_audio_mempool_noclr_init syspool_init\n\n#define app_audio_mempool_use_mempoolsection_init syspool_init\n\n#define app_audio_mempool_free_buff_size syspool_free_size\n\n#define app_audio_mempool_get_buff syspool_get_buff\n\n#if defined(A2DP_LDAC_ON)\n#define app_audio_mempool_total_buf syspool_total_size\n#define app_audio_mempool_force_set_buff_used syspool_force_used_size\n#endif\n\n\nvoid UNLOCK_APP_AUDIO_QUEUE();\n\nvoid LOCK_APP_AUDIO_QUEUE();\n\nuint32_t app_audio_lr_balance(uint8_t *buf, uint32_t len, int8_t balance);\n\nvoid app_audio_mempool_init_with_specific_size(uint32_t size);\n\nint app_audio_pcmbuff_init(uint8_t *buff, uint16_t len);\n\nint app_audio_pcmbuff_length(void);\n\nint app_audio_pcmbuff_put(uint8_t *buff, uint16_t len);\n\nint app_audio_pcmbuff_get(uint8_t *buff, uint16_t len);\n\nint app_audio_pcmbuff_discard(uint16_t len);\n\nvoid app_audio_memcpy_16bit(int16_t *des, int16_t *src, int len);\n\nvoid app_audio_memset_16bit(int16_t *des, int16_t val, int len);\n\n\nint app_audio_sendrequest(uint16_t id, uint8_t status, uint32_t ptr);\n\n\nint app_audio_sendrequest_param(uint16_t id, uint8_t status, uint32_t ptr, uint32_t param);\n\nvoid app_audio_open(void);\n\nvoid app_audio_close(void);\n\nbool app_audio_list_append(APP_AUDIO_STATUS* aud_status);\n\nbool app_audio_list_playback_exist(void);\n\nvoid app_audio_list_playback_clear(void);\n\nbool app_audio_list_rmv_callback(APP_AUDIO_STATUS *status_close, APP_AUDIO_STATUS *status_next, enum APP_BT_AUDIO_Q_POS pos, bool pop_next);\n\nvoid app_audio_list_clear();\n\nint app_capture_audio_mempool_init(void);\n\nuint32_t app_capture_audio_mempool_free_buff_size();\n\nint app_capture_audio_mempool_get_buff(uint8_t **buff, uint32_t size);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif//__FMDEC_H__\n" }, { "path": "apps/audioplayers/bt_sco_chain.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n// Speech process macro change table\n// TX: Transimt process\n// RX: Receive process\n// 16k: base 25M/208M(1300,1302) base 28M/104M(1400,1402)\n|-------|--------------------|-----------------------------------|----------------------------------|-----------|----------------------|\n| TX/RX | New | Old | description\n| MIPS(M) | Note | | | | | | 16k 8k |\n|\n|-------|--------------------|-----------------------------------|----------------------------------|-----------|----------------------|\n| | SPEECH_TX_DC_FILTER| | Direct\nCurrent filter | 1~2 \\ | | | |\nSPEECH_TX_AEC | SPEECH_ECHO_CANCEL | Acoustic Echo\nCancellation(old) | 40 \\ | HWFFT: 37 | | | SPEECH_TX_AEC2\n| SPEECH_AEC_FIX | Acoustic Echo Cancellation(new) | 39 \\ |\nenable NLP | | | SPEECH_TX_AEC3 | | Acoustic Echo\nCancellation(new) | 14/18 \\ | 2 filters/4 filters | | |\nSPEECH_TX_AEC2FLOAT| | Acoustic Echo\nCancellation(new) | 23/22 \\ | nlp/af(blocks=1) | | |\nSPEECH_TX_AEC2FLOAT| | Acoustic Echo\nCancellation(ns) | 14/10 \\ | banks=256/banks=128 | | | (ns_enabled)\n| | | 8/6 \\\n| banks=64/banks=32 | | | SPEECH_TX_NS | SPEECH_NOISE_SUPPRESS |\n1 mic noise suppress(old) | 30 \\ | HWFFT: 19 | | |\nSPEECH_TX_NS2 | LC_MMSE_NOISE_SUPPRESS | 1 mic noise\nsuppress(new) | 16 \\ | HWFFT: 12 | | |\nSPEECH_TX_NS3 | | 1 mic noise\nsuppress(new) | 26 \\ | | | |\nSPEECH_TX_NS2FLOAT | LC_MMSE_NOISE_SUPPRESS_FLOAT | 1 mic noise\nsuppress(new float) | 12.5 \\ | banks=64 | | TX |\nSPEECH_TX_2MIC_NS | DUAL_MIC_DENOISE | 2 mic noise\nsuppres(long space) | \\ | | | |\nSPEECH_TX_2MIC_NS2 | 2MIC_DENOISE | 2 mic noise\nsuppres(short space) | 22 | delay_taps 5M | | |\nfreq_smooth_enable 1.5M | | | | wnr_enable 1.5M | |\n| SPEECH_TX_2MIC_NS4 | SENSORMIC_DENOISE | sensor mic noise\nsuppress | 31.5 | | | |\nSPEECH_TX_2MIC_NS3 | FAR_FIELD_SPEECH_ENHANCEMENT | 2 mic noise suppres(far\nfield) | \\ | | | | SPEECH_TX_2MIC_NS5 |\nLEFTRIGHT_DENOISE | 2 mic noise suppr(left right end)| \\ | | |\n| SPEECH_TX_2MIC_NS6 | FF_2MIC_DENOISE | 2 mic noise suppr(far\nfield) | 70 | | | | SPEECH_TX_AGC |\nSPEECH_AGC | Automatic Gain Control | 3 | | |\n| SPEECH_TX_COMPEXP | | Compressor and\nexpander | 4 | | | | SPEECH_TX_EQ |\nSPEECH_WEIGHTING_FILTER_SUPPRESS | Default EQ | 0.5 \\\n| each section |\n|-------|--------------------|-----------------------------------|----------------------------------|-----------|----------------------|\n| | SPEECH_RX_NS | SPEAKER_NOISE_SUPPRESS | 1 mic noise\nsuppress(old) | 30 \\ | | | RX |\nSPEECH_RX_NS2 | LC_MMSE_NOISE_SUPPRESS_SPK | 1 mic noise\nsuppress(new) | 16 \\ | | | |\nSPEECH_RX_AGC | SPEECH_AGC_SPK | Automatic Gain Control\n| 3 | | | | SPEECH_RX_EQ |\nSPEAKER_WEIGHTING_FILTER_SUPPRESS | Default EQ | 0.5 \\\n| each section |\n|-------|--------------------|-----------------------------------|----------------------------------|-----------|----------------------|\n**/\n\n#include \"bt_sco_chain.h\"\n#include \"audio_dump.h\"\n#include \"bt_sco_chain_cfg.h\"\n#include \"bt_sco_chain_tuning.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_types.h\"\n#include \"speech_cfg.h\"\n#if defined(SPEECH_TX_2MIC_NS4)\n#include \"app_anc.h\"\n#endif\n#include \"app_utils.h\"\n\n#if defined(SCO_CP_ACCEL)\n#include \"bt_sco_chain_cp.h\"\n#include \"hal_location.h\"\n\n#define SCO_CP_ACCEL_ALGO_START() \\\n *_pcm_len = pcm_len; \\\n } \\\n CP_TEXT_SRAM_LOC \\\n void _speech_tx_process_mid(short *pcm_buf, short *ref_buf, int *_pcm_len) { \\\n int pcm_len = *_pcm_len;\n\n#define SCO_CP_ACCEL_ALGO_END() \\\n *_pcm_len = pcm_len; \\\n } \\\n void _speech_tx_process_post(short *pcm_buf, short *ref_buf, \\\n int *_pcm_len) { \\\n int pcm_len = *_pcm_len;\n\n#define SPEECH_TX_AEC2FLOAT_CORE 1\n#define SPEECH_TX_NS2FLOAT_CORE 0\n#define SPEECH_RX_NS2FLOAT_CORE 0\n\n#else\n#define SCO_CP_ACCEL_ALGO_START()\n#define SCO_CP_ACCEL_ALGO_END()\n\n#define SPEECH_TX_AEC2FLOAT_CORE 0\n#define SPEECH_TX_NS2FLOAT_CORE 0\n#define SPEECH_RX_NS2FLOAT_CORE 0\n\n#endif\n\n#if defined(SCO_OPTIMIZE_FOR_RAM)\nextern uint8_t *sco_overlay_ram_buf;\nextern int sco_overlay_ram_buf_len;\n#endif\n\n//#define BT_SCO_CHAIN_PROFILE\n//#define BT_SCO_CHAIN_AUDIO_DUMP\n\n#if defined(BT_SCO_CHAIN_PROFILE)\nstatic uint32_t tx_start_ticks = 0;\nstatic uint32_t tx_end_ticks = 0;\n#endif\n\nextern const SpeechConfig speech_cfg_default;\nstatic SpeechConfig *speech_cfg = NULL;\n\nFrameResizeState *speech_frame_resize_st = NULL;\n\n#if defined(SPEECH_TX_24BIT)\nint32_t *aec_echo_buf = NULL;\n\nstatic int16_t *tx_pcmbuf16 = NULL;\nstatic int32_t *tx_pcmbuf32 = NULL;\n#else\nshort *aec_echo_buf = NULL;\n#endif\n\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n// Use to free buffer\n#if defined(SPEECH_TX_24BIT)\nstatic int32_t *aec_echo_buf_ptr;\nstatic int16_t *tx_refbuf16 = NULL;\nstatic int32_t *tx_refbuf32 = NULL;\n#else\nstatic short *aec_echo_buf_ptr;\n#endif\nstatic short *aec_out_buf;\n#endif\n\n/*--------------------TX state--------------------*/\n#if defined(SPEECH_TX_DC_FILTER)\nSpeechDcFilterState *speech_tx_dc_filter_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_MIC_CALIBRATION)\nSpeechIirCalibState *speech_tx_mic_calib_st = NULL;\nextern const SpeechIirCalibConfig speech_tx_mic_calib_cfg;\n#endif\n\n#if defined(SPEECH_TX_MIC_FIR_CALIBRATION)\nSpeechFirCalibState *speech_tx_mic_fir_calib_st = NULL;\nextern const SpeechFirCalibConfig speech_tx_mic_fir_calib_cfg;\n#endif\n\n// AEC\n#if defined(SPEECH_TX_AEC)\nSpeechAecState *speech_tx_aec_st = NULL;\nvoid *speech_tx_aec_lib_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_AEC2)\nSpeechAec2State *speech_tx_aec2_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_AEC3)\nshort delay = 70;\nshort bufferstate[356];\nshort buf_out[256];\nvoid CODEC_OpVecCpy(short *pshwDes, short *pshwSrc, short swLen) {\n short i = 0;\n\n for (i = 0; i < swLen; i++) {\n pshwDes[i] = pshwSrc[i];\n }\n}\n\nSubBandAecState *speech_tx_aec3_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_AEC2FLOAT)\nstatic Ec2FloatState *speech_tx_aec2float_st = NULL;\n#endif\n\n// 2MIC NS\n#if defined(SPEECH_TX_2MIC_NS)\n// float mic2_ft_caliration[] =\n// {0.395000,0.809000,0.939000,1.748000,1.904000,1.957000,1.944000,1.906000,1.935000,1.940000,1.937000,1.931000,1.929000,1.911000,1.887000,1.871000,1.846000,1.779000,1.748000,2.086000,2.055000,2.002000,1.903000,1.885000,1.854000,1.848000,1.848000,1.844000,1.852000,1.870000,1.866000,1.843000,1.838000,1.824000,1.861000,1.871000,1.866000,1.833000,1.800000,1.769000,1.749000,1.690000,1.664000,1.573000,1.602000,1.692000,1.759000,1.758000,1.698000,1.628000,1.525000,1.509000,1.492000,1.515000,1.530000,1.644000,1.653000,1.617000,1.667000,1.746000,1.663000,1.606000,1.560000,1.500000,1.579000,1.632000,1.623000,1.549000,1.524000,1.512000,1.493000,1.476000,1.421000,1.396000,1.386000,1.459000,1.463000,1.496000,1.568000,1.544000,1.555000,1.547000,1.619000,1.630000,1.574000,1.491000,1.414000,1.383000,1.352000,1.464000,1.474000,1.450000,1.419000,1.425000,1.411000,1.479000,1.517000,1.486000,1.428000,1.389000,1.330000,1.284000,1.267000,1.249000,1.256000,1.215000,1.250000,1.402000,1.386000,1.334000,1.287000,1.329000,1.337000,1.292000,1.226000,1.212000,1.142000,1.087000,1.086000,1.112000,1.145000,1.194000,1.163000,1.131000,1.162000,1.166000,1.259000,1.218000,1.218000,1.322000,1.347000,1.436000,1.890000,1.693000,1.591000,1.518000,1.422000,1.345000,1.331000,1.308000,1.330000,1.305000,1.218000,1.286000,1.340000,1.399000,1.406000,1.353000,1.280000,1.246000,1.185000,1.129000,1.014000,0.985000,0.981000,1.189000,1.533000,1.694000,1.613000,1.464000,1.419000,1.448000,1.449000,1.442000,1.367000,1.283000,1.232000,1.381000,1.484000,1.497000,1.554000,1.438000,1.365000,1.326000,1.332000,1.335000,1.367000,1.301000,1.288000,1.168000,1.103000,1.067000,1.026000,1.076000,1.126000,1.068000,1.045000,0.978000,0.926000,0.939000,0.854000,0.772000,0.902000,0.742000,1.073000,1.220000,1.177000,1.762000,1.573000,1.390000,1.406000,1.148000,1.054000,1.210000,1.344000,1.849000,2.078000,1.756000,1.646000,1.597000,1.447000,1.322000,1.279000,1.007000,0.921000,0.871000,0.864000,1.067000,1.129000,1.128000,1.027000,0.983000,0.889000,0.774000,0.759000,0.724000,0.949000,1.237000,1.499000,1.658000,1.837000,1.492000,1.452000,1.151000,1.100000,0.996000,0.986000,1.023000,1.071000,1.252000,1.295000,1.309000,1.343000,1.220000,1.161000,1.142000,1.041000,0.974000,0.885000,0.799000,0.669000,0.732000,0.953000,0.861000,0.881000,0.988000,0.891000};\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS2)\nSpeech2MicNs2State *speech_tx_2mic_ns2_st = NULL;\n#endif\n\n// #if defined(SPEECH_CS_VAD)\n// VADState *speech_cs_vad_st = NULL;\n// #endif\n\n#if defined(SPEECH_TX_2MIC_NS4)\nSensorMicDenoiseState *speech_tx_2mic_ns4_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS5)\nLeftRightDenoiseState *speech_tx_2mic_ns5_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS6)\nSpeechFF2MicNs2State *speech_tx_2mic_ns6_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS)\nSpeech3MicNsState *speech_tx_3mic_ns_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS3)\nTripleMicDenoise3State *speech_tx_3mic_ns3_st = NULL;\n#endif\n\n// NS\n#if defined(SPEECH_TX_NS)\nSpeechNsState *speech_tx_ns_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_NS2)\nSpeechNs2State *speech_tx_ns2_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_NS2FLOAT)\nSpeechNs2FloatState *speech_tx_ns2float_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_NS3)\nstatic Ns3State *speech_tx_ns3_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_WNR)\nstatic WnrState *speech_tx_wnr_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_NOISE_GATE)\nstatic NoisegateState *speech_tx_noise_gate_st = NULL;\n#endif\n\n// Gain\n#if defined(SPEECH_TX_COMPEXP)\nstatic CompexpState *speech_tx_compexp_st = NULL;\n#endif\n\n#if defined(SPEECH_TX_AGC)\nstatic AgcState *speech_tx_agc_st = NULL;\n#endif\n\n// EQ\n#if defined(SPEECH_TX_EQ)\nEqState *speech_tx_eq_st = NULL;\n#endif\n\n// GAIN\n#if defined(SPEECH_TX_POST_GAIN)\nSpeechGainState *speech_tx_post_gain_st = NULL;\n#endif\n\n/*--------------------RX state--------------------*/\n// NS\n#if defined(SPEECH_RX_NS)\nSpeechNsState *speech_rx_ns_st = NULL;\n#endif\n\n#if defined(SPEECH_RX_NS2)\nSpeechNs2State *speech_rx_ns2_st = NULL;\n#endif\n\n#if defined(SPEECH_RX_NS2FLOAT)\nSpeechNs2FloatState *speech_rx_ns2float_st = NULL;\n#endif\n\n#if defined(SPEECH_RX_NS3)\nstatic Ns3State *speech_rx_ns3_st = NULL;\n#endif\n\n// GAIN\n#if defined(SPEECH_RX_AGC)\nstatic AgcState *speech_rx_agc_st = NULL;\n#endif\n\n// EQ\n#if defined(SPEECH_RX_EQ)\nEqState *speech_rx_eq_st = NULL;\n#endif\n\n// GAIN\n#if defined(SPEECH_RX_POST_GAIN)\nSpeechGainState *speech_rx_post_gain_st = NULL;\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n#define SPEECH_TX_CHANNEL_NUM (SPEECH_CODEC_CAPTURE_CHANNEL_NUM + 1)\n#else\n#define SPEECH_TX_CHANNEL_NUM (SPEECH_CODEC_CAPTURE_CHANNEL_NUM)\n#endif\n\nstatic bool dualmic_enable = true;\n\nvoid switch_dualmic_status(void) {\n TRACE(3, \"[%s] dualmic status: %d -> %d\", __FUNCTION__, dualmic_enable,\n !dualmic_enable);\n dualmic_enable ^= true;\n}\n\nstatic int speech_tx_sample_rate = 16000;\nstatic int speech_rx_sample_rate = 16000;\nstatic int speech_tx_frame_len = 256;\nstatic int speech_rx_frame_len = 256;\nstatic bool speech_tx_frame_resizer_enable = false;\nstatic bool speech_rx_frame_resizer_enable = false;\n\nstatic int32_t _speech_tx_process_(void *pcm_buf, void *ref_buf,\n int32_t *pcm_len);\nstatic int32_t _speech_rx_process_(void *pcm_buf, int32_t *pcm_len);\nenum APP_SYSFREQ_FREQ_T speech_get_proper_sysfreq(int *needed_mips);\n\nvoid *speech_get_ext_buff(int size) {\n void *pBuff = NULL;\n if (size % 4) {\n size = size + (4 - size % 4);\n }\n\n pBuff = speech_calloc(size, sizeof(uint8_t));\n TRACE(2, \"[%s] len:%d\", __func__, size);\n\n return pBuff;\n}\n\nint speech_store_config(const SpeechConfig *cfg) {\n if (speech_cfg) {\n memcpy(speech_cfg, cfg, sizeof(SpeechConfig));\n } else {\n TRACE(1, \"[%s] WARNING: Please phone call...\", __func__);\n }\n\n return 0;\n}\n\nint speech_tx_init(int sample_rate, int frame_len) {\n TRACE(3, \"[%s] Start, sample_rate: %d, frame_len: %d\", __func__, sample_rate,\n frame_len);\n\n#if defined(SPEECH_TX_DC_FILTER)\n int channel_num = SPEECH_TX_CHANNEL_NUM;\n int data_separation = 0;\n\n speech_tx_dc_filter_st =\n speech_dc_filter_create(sample_rate, &speech_cfg->tx_dc_filter);\n speech_dc_filter_ctl(speech_tx_dc_filter_st, SPEECH_DC_FILTER_SET_CHANNEL_NUM,\n &channel_num);\n speech_dc_filter_ctl(speech_tx_dc_filter_st,\n SPEECH_DC_FILTER_SET_DATA_SEPARATION, &data_separation);\n#endif\n\n#if defined(SPEECH_TX_MIC_CALIBRATION)\n speech_tx_mic_calib_st =\n speech_iir_calib_init(sample_rate, frame_len, &speech_tx_mic_calib_cfg);\n#endif\n\n#if defined(SPEECH_TX_MIC_FIR_CALIBRATION)\n speech_tx_mic_fir_calib_st = speech_fir_calib_init(\n sample_rate, frame_len, &speech_tx_mic_fir_calib_cfg);\n#endif\n\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n // #if !(defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE))\n aec_out_buf = (short *)speech_calloc(frame_len, sizeof(short));\n#if defined(SPEECH_TX_24BIT)\n aec_echo_buf = (int32_t *)speech_calloc(frame_len, sizeof(int32_t));\n#else\n aec_echo_buf = (short *)speech_calloc(frame_len, sizeof(short));\n#endif\n aec_echo_buf_ptr = aec_echo_buf;\n// #endif\n#endif\n\n#if defined(SPEECH_TX_AEC)\n speech_tx_aec_st =\n speech_aec_create(sample_rate, frame_len, &speech_cfg->tx_aec);\n speech_aec_ctl(speech_tx_aec_st, SPEECH_AEC_GET_LIB_ST,\n &speech_tx_aec_lib_st);\n#endif\n\n#if defined(SPEECH_TX_AEC2)\n speech_tx_aec2_st =\n speech_aec2_create(sample_rate, frame_len, &speech_cfg->tx_aec2);\n#endif\n#if defined(SPEECH_TX_AEC3)\n speech_tx_aec3_st =\n SubBandAec_init(sample_rate, frame_len, &speech_cfg->tx_aec3);\n#endif\n\n#if defined(SPEECH_TX_AEC2FLOAT)\n speech_tx_aec2float_st =\n ec2float_create(sample_rate, frame_len, SPEECH_TX_AEC2FLOAT_CORE,\n &speech_cfg->tx_aec2float);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS)\n dual_mic_denoise_init(sample_rate, frame_len, &speech_cfg->tx_2mic_ns, NULL);\n // dual_mic_denoise_ctl(DUAL_MIC_DENOISE_SET_CALIBRATION_COEF,\n // mic2_ft_caliration);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS2)\n speech_tx_2mic_ns2_st =\n speech_2mic_ns2_create(sample_rate, frame_len, &speech_cfg->tx_2mic_ns2);\n#endif\n\n // #if defined(SPEECH_CS_VAD)\n // speech_cs_vad_st = VAD_process_state_init(sample_rate, 64,\n // &speech_cfg->cs_vad);\n // #endif\n\n#if defined(SPEECH_TX_2MIC_NS3)\n far_field_speech_enhancement_init();\n far_field_speech_enhancement_start();\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS5)\n speech_tx_2mic_ns5_st =\n leftright_denoise_create(sample_rate, 64, &speech_cfg->tx_2mic_ns5);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS6)\n speech_tx_2mic_ns6_st = speech_ff_2mic_ns2_create(16000, 128);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS4)\n // speech_tx_2mic_ns4_st = sensormic_denoise_create(sample_rate, 64,\n // &speech_cfg->tx_2mic_ns4);\n speech_tx_2mic_ns4_st = sensormic_denoise_create(sample_rate, 128, 256, 31,\n &speech_cfg->tx_2mic_ns4);\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS)\n speech_tx_3mic_ns_st =\n speech_3mic_ns_create(sample_rate, 64, &speech_cfg->tx_3mic_ns);\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS3)\n speech_tx_3mic_ns3_st = triple_mic_denoise3_init(sample_rate, frame_len,\n &speech_cfg->tx_3mic_ns3);\n#endif\n\n#if defined(SPEECH_TX_NS)\n speech_tx_ns_st =\n speech_ns_create(sample_rate, frame_len, &speech_cfg->tx_ns);\n#if defined(SPEECH_TX_AEC)\n speech_ns_ctl(speech_tx_ns_st, SPEECH_NS_SET_AEC_STATE, speech_tx_aec_lib_st);\n int32_t echo_supress = -39;\n speech_ns_ctl(speech_tx_ns_st, SPEECH_NS_SET_AEC_SUPPRESS, &echo_supress);\n#endif\n#endif\n\n#if defined(SPEECH_TX_NS2)\n speech_tx_ns2_st =\n speech_ns2_create(sample_rate, frame_len, &speech_cfg->tx_ns2);\n#if defined(SPEECH_TX_AEC)\n speech_ns2_set_echo_state(speech_tx_ns2_st, speech_tx_aec_lib_st);\n speech_ns2_set_echo_suppress(speech_tx_ns2_st, -40);\n#endif\n#endif\n\n#if defined(SPEECH_TX_NS2FLOAT)\n speech_tx_ns2float_st =\n speech_ns2float_create(sample_rate, frame_len, SPEECH_TX_NS2FLOAT_CORE,\n &speech_cfg->tx_ns2float);\n#if defined(SPEECH_TX_AEC)\n speech_ns2float_set_echo_state(speech_tx_ns2float_st, speech_tx_aec_lib_st);\n speech_ns2float_set_echo_suppress(speech_tx_ns2float_st, -40);\n#endif\n#endif\n\n#if defined(SPEECH_TX_NS3)\n speech_tx_ns3_st = ns3_create(sample_rate, frame_len, &speech_cfg->tx_ns3);\n#endif\n\n#if defined(SPEECH_TX_WNR)\n speech_tx_wnr_st = wnr_create(sample_rate, frame_len, &speech_cfg->tx_wnr);\n#endif\n\n#if defined(SPEECH_TX_NOISE_GATE)\n speech_tx_noise_gate_st = speech_noise_gate_create(\n sample_rate, frame_len, &speech_cfg->tx_noise_gate);\n#endif\n\n#if defined(SPEECH_TX_COMPEXP)\n speech_tx_compexp_st =\n compexp_create(sample_rate, frame_len, &speech_cfg->tx_compexp);\n#endif\n\n#if defined(SPEECH_TX_AGC)\n speech_tx_agc_st =\n agc_state_create(sample_rate, frame_len, &speech_cfg->tx_agc);\n#endif\n\n#if defined(SPEECH_TX_EQ)\n speech_tx_eq_st = eq_init(sample_rate, frame_len, &speech_cfg->tx_eq);\n#endif\n\n#if defined(SPEECH_TX_POST_GAIN)\n speech_tx_post_gain_st =\n speech_gain_create(sample_rate, frame_len, &speech_cfg->tx_post_gain);\n#endif\n\n TRACE(1, \"[%s] End\", __func__);\n\n return 0;\n}\n\nint speech_rx_init(int sample_rate, int frame_len) {\n TRACE(3, \"[%s] Start, sample_rate: %d, frame_len: %d\", __func__, sample_rate,\n frame_len);\n\n#if defined(SPEECH_RX_NS)\n speech_rx_ns_st =\n speech_ns_create(sample_rate, frame_len, &speech_cfg->rx_ns);\n#endif\n\n#if defined(SPEECH_RX_NS2)\n speech_rx_ns2_st =\n speech_ns2_create(sample_rate, frame_len, &speech_cfg->rx_ns2);\n#endif\n\n#if defined(SPEECH_RX_NS2FLOAT)\n speech_rx_ns2float_st =\n speech_ns2float_create(sample_rate, frame_len, SPEECH_RX_NS2FLOAT_CORE,\n &speech_cfg->rx_ns2float);\n#endif\n\n#if defined(SPEECH_RX_NS3)\n speech_rx_ns3_st = ns3_create(sample_rate, frame_len, &speech_cfg->rx_ns3);\n#endif\n\n#if defined(SPEECH_RX_AGC)\n speech_rx_agc_st =\n agc_state_create(sample_rate, frame_len, &speech_cfg->rx_agc);\n#endif\n\n#if defined(SPEECH_RX_EQ)\n speech_rx_eq_st = eq_init(sample_rate, frame_len, &speech_cfg->rx_eq);\n#endif\n\n#if defined(SPEECH_RX_POST_GAIN)\n speech_rx_post_gain_st =\n speech_gain_create(sample_rate, frame_len, &speech_cfg->rx_post_gain);\n#endif\n\n TRACE(1, \"[%s] End\", __func__);\n\n return 0;\n}\n\nint speech_init(int tx_sample_rate, int rx_sample_rate, int tx_frame_ms,\n int rx_frame_ms, int sco_frame_ms, uint8_t *buf, int len) {\n TRACE(1, \"[%s] Start...\", __func__);\n\n // ASSERT(frame_ms == SPEECH_PROCESS_FRAME_MS, \"[%s] frame_ms(%d) !=\n // SPEECH_PROCESS_FRAME_MS(%d)\", __func__,\n // frame_ms,\n // SPEECH_PROCESS_FRAME_MS);\n\n speech_tx_sample_rate = tx_sample_rate;\n speech_rx_sample_rate = rx_sample_rate;\n speech_tx_frame_len = SPEECH_FRAME_MS_TO_LEN(tx_sample_rate, tx_frame_ms);\n speech_rx_frame_len = SPEECH_FRAME_MS_TO_LEN(rx_sample_rate, rx_frame_ms);\n\n speech_heap_init(buf, len);\n\n#if defined(SCO_OPTIMIZE_FOR_RAM)\n TRACE(2, \"[%s] sco_overlay_ram_buf_len = %d\", __func__,\n sco_overlay_ram_buf_len);\n if (sco_overlay_ram_buf_len >= 1024) {\n speech_heap_add_block(sco_overlay_ram_buf, sco_overlay_ram_buf_len);\n }\n#endif\n\n // When phone call again, speech cfg will be default.\n // If do not want to reset speech cfg, need define bt_sco_chain_init()\n // and call in apps.cpp: app_init()\n speech_cfg = (SpeechConfig *)speech_calloc(1, sizeof(SpeechConfig));\n speech_store_config(&speech_cfg_default);\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_init(speech_tx_frame_len, sizeof(short), 2);\n#endif\n\n#ifdef AUDIO_DEBUG_V0_1_0\n speech_tuning_open();\n#endif\n\n int aec_enable = 0;\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n aec_enable = 1;\n#endif\n\n int capture_sample_size = sizeof(int16_t),\n playback_sample_size = sizeof(int16_t);\n#if defined(SPEECH_TX_24BIT)\n capture_sample_size = sizeof(int32_t);\n#endif\n#if defined(SPEECH_RX_24BIT)\n playback_sample_size = sizeof(int32_t);\n#endif\n\n CAPTURE_HANDLER_T tx_handler =\n (tx_frame_ms == sco_frame_ms) ? NULL : _speech_tx_process_;\n PLAYBACK_HANDLER_T rx_handler =\n (rx_frame_ms == sco_frame_ms) ? NULL : _speech_rx_process_;\n\n speech_tx_frame_resizer_enable = (tx_handler != NULL);\n speech_rx_frame_resizer_enable = (rx_handler != NULL);\n\n if (speech_tx_frame_resizer_enable || speech_rx_frame_resizer_enable) {\n speech_frame_resize_st = frame_resize_create(\n SPEECH_FRAME_MS_TO_LEN(tx_sample_rate, sco_frame_ms),\n SPEECH_TX_CHANNEL_NUM, speech_tx_frame_len, capture_sample_size,\n playback_sample_size, aec_enable, tx_handler, rx_handler);\n }\n\n#if defined(SCO_CP_ACCEL)\n // NOTE: change channel number for different case.\n sco_cp_init(speech_tx_frame_len, 1);\n#endif\n\n speech_tx_init(speech_tx_sample_rate, speech_tx_frame_len);\n speech_rx_init(speech_rx_sample_rate, speech_rx_frame_len);\n\n#if !defined(SCO_CP_ACCEL)\n int needed_freq = 0;\n enum APP_SYSFREQ_FREQ_T min_system_freq =\n speech_get_proper_sysfreq(&needed_freq);\n enum APP_SYSFREQ_FREQ_T freq = hal_sysfreq_get();\n\n if (freq < min_system_freq) {\n freq = min_system_freq;\n\n app_sysfreq_req(APP_SYSFREQ_USER_BT_SCO, freq);\n\n int system_freq = hal_sys_timer_calc_cpu_freq(5, 0);\n TRACE(2, \"[%s]: app_sysfreq_req %d\", __FUNCTION__, freq);\n TRACE(2, \"[%s]: sys freq calc : %d\\n\", __FUNCTION__, system_freq);\n\n if (system_freq <= needed_freq * 1000 * 1000) {\n TRACE(3,\n \"[%s] WARNING: system freq(%d) seems to be lower than needed(%d).\",\n __FUNCTION__, system_freq / 1000000, needed_freq);\n }\n }\n#endif\n\n TRACE(1, \"[%s] End\", __func__);\n\n return 0;\n}\n\nint speech_tx_deinit(void) {\n TRACE(1, \"[%s] Start...\", __func__);\n\n#if defined(SPEECH_TX_POST_GAIN)\n speech_gain_destroy(speech_tx_post_gain_st);\n#endif\n\n#if defined(SPEECH_TX_EQ)\n eq_destroy(speech_tx_eq_st);\n#endif\n\n#if defined(SPEECH_TX_AGC)\n agc_state_destroy(speech_tx_agc_st);\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS)\n speech_3mic_ns_destroy(speech_tx_3mic_ns_st);\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS3)\n triple_mic_denoise3_destroy(speech_tx_3mic_ns3_st);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS)\n dual_mic_denoise_deinit();\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS2)\n speech_2mic_ns2_destroy(speech_tx_2mic_ns2_st);\n#endif\n\n // #if defined(SPEECH_CS_VAD)\n // VAD_destroy(speech_cs_vad_st);\n // #endif\n\n#if defined(SPEECH_TX_2MIC_NS3)\n far_field_speech_enhancement_deinit();\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS4)\n sensormic_denoise_destroy(speech_tx_2mic_ns4_st);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS5)\n leftright_denoise_destroy(speech_tx_2mic_ns5_st);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS6)\n speech_ff_2mic_ns2_destroy(speech_tx_2mic_ns6_st);\n#endif\n\n#if defined(SPEECH_TX_NS)\n speech_ns_destroy(speech_tx_ns_st);\n#endif\n\n#if defined(SPEECH_TX_NS2)\n speech_ns2_destroy(speech_tx_ns2_st);\n#endif\n\n#if defined(SPEECH_TX_NS2FLOAT)\n speech_ns2float_destroy(speech_tx_ns2float_st);\n#endif\n\n#ifdef SPEECH_TX_NS3\n ns3_destroy(speech_tx_ns3_st);\n#endif\n\n#ifdef SPEECH_TX_WNR\n wnr_destroy(speech_tx_wnr_st);\n#endif\n\n#ifdef SPEECH_TX_NOISE_GATE\n speech_noise_gate_destroy(speech_tx_noise_gate_st);\n#endif\n\n#ifdef SPEECH_TX_COMPEXP\n compexp_destroy(speech_tx_compexp_st);\n#endif\n\n#if defined(SPEECH_TX_AEC)\n speech_aec_destroy(speech_tx_aec_st);\n#endif\n\n#if defined(SPEECH_TX_AEC2)\n speech_aec2_destroy(speech_tx_aec2_st);\n#endif\n\n#if defined(SPEECH_TX_AEC3)\n SubBandAec_destroy(speech_tx_aec3_st);\n#endif\n\n#if defined(SPEECH_TX_AEC2FLOAT)\n ec2float_destroy(speech_tx_aec2float_st);\n#endif\n\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n speech_free(aec_echo_buf_ptr);\n speech_free(aec_out_buf);\n#endif\n\n#if defined(SPEECH_TX_MIC_CALIBRATION)\n speech_iir_calib_destroy(speech_tx_mic_calib_st);\n#endif\n\n#if defined(SPEECH_TX_MIC_FIR_CALIBRATION)\n speech_fir_calib_destroy(speech_tx_mic_fir_calib_st);\n#endif\n\n#if defined(SPEECH_TX_DC_FILTER)\n speech_dc_filter_destroy(speech_tx_dc_filter_st);\n#endif\n\n TRACE(1, \"[%s] End\", __func__);\n\n return 0;\n}\n\nint speech_rx_deinit(void) {\n TRACE(1, \"[%s] Start...\", __func__);\n\n#if defined(SPEECH_RX_POST_GAIN)\n speech_gain_destroy(speech_rx_post_gain_st);\n#endif\n\n#if defined(SPEECH_RX_EQ)\n eq_destroy(speech_rx_eq_st);\n#endif\n\n#if defined(SPEECH_RX_AGC)\n agc_state_destroy(speech_rx_agc_st);\n#endif\n\n#if defined(SPEECH_RX_NS)\n speech_ns_destroy(speech_rx_ns_st);\n#endif\n\n#if defined(SPEECH_RX_NS2)\n speech_ns2_destroy(speech_rx_ns2_st);\n#endif\n\n#if defined(SPEECH_RX_NS2FLOAT)\n speech_ns2float_destroy(speech_rx_ns2float_st);\n#endif\n\n#ifdef SPEECH_RX_NS3\n ns3_destroy(speech_rx_ns3_st);\n#endif\n\n TRACE(1, \"[%s] End\", __func__);\n\n return 0;\n}\n\nint speech_deinit(void) {\n TRACE(1, \"[%s] Start...\", __func__);\n\n speech_rx_deinit();\n speech_tx_deinit();\n\n#if defined(SCO_CP_ACCEL)\n sco_cp_deinit();\n#endif\n\n if (speech_frame_resize_st != NULL) {\n frame_resize_destroy(speech_frame_resize_st);\n speech_tx_frame_resizer_enable = false;\n speech_rx_frame_resizer_enable = false;\n }\n\n#ifdef AUDIO_DEBUG_V0_1_0\n speech_tuning_close();\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_deinit();\n#endif\n\n speech_free(speech_cfg);\n speech_cfg = NULL;\n\n size_t total = 0, used = 0, max_used = 0;\n speech_memory_info(&total, &used, &max_used);\n TRACE(3, \"SPEECH MALLOC MEM: total - %d, used - %d, max_used - %d.\", total,\n used, max_used);\n ASSERT(used == 0, \"[%s] used != 0\", __func__);\n\n TRACE(1, \"[%s] End\", __func__);\n\n return 0;\n}\n\nfloat speech_tx_get_required_mips(void) {\n float mips = 0;\n\n#if defined(SPEECH_TX_DC_FILTER)\n mips += speech_dc_filter_get_required_mips(speech_tx_dc_filter_st);\n#endif\n\n#if defined(SPEECH_TX_MIC_CALIBRATION)\n mips += speech_iir_calib_get_required_mips(speech_tx_mic_calib_st);\n#endif\n\n#if defined(SPEECH_TX_MIC_FIR_CALIBRATION)\n mips += speech_fir_calib_get_required_mips(speech_tx_mic_fir_calib_st);\n#endif\n\n#if defined(SPEECH_TX_AEC)\n mips += speech_aec_get_required_mips(speech_tx_aec_st);\n#endif\n\n#if defined(SPEECH_TX_AEC2)\n mips += speech_aec2_get_required_mips(speech_tx_aec2_st);\n#endif\n\n#if defined(SPEECH_TX_AEC3)\n mips += SubBandAec_get_required_mips(speech_tx_aec3_st);\n#endif\n\n#if defined(SPEECH_TX_AEC2FLOAT)\n mips += ec2float_get_required_mips(speech_tx_aec2float_st);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS)\n mips += dual_mic_denoise_get_required_mips();\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS2)\n mips += speech_2mic_ns2_get_required_mips(speech_tx_2mic_ns2_st);\n#endif\n\n // #if defined(SPEECH_CS_VAD)\n // mips += VAD_process_get_required_mips(speech_cs_vad_st);\n // #endif\n\n#if defined(SPEECH_TX_2MIC_NS3)\n mips += far_field_speech_enhancement_get_required_mips();\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS5)\n mips += leftright_denoise_get_required_mips(speech_tx_2mic_ns5_st);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS6)\n mips += speech_ff_2mic_ns2_get_required_mips(speech_tx_2mic_ns6_st);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS4)\n mips += sensormic_denoise_get_required_mips(speech_tx_2mic_ns4_st);\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS)\n mips += speech_3mic_get_required_mips(speech_tx_3mic_ns_st);\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS3)\n mips += triple_mic_denoise3_get_required_mips(speech_tx_3mic_ns3_st);\n#endif\n\n#if defined(SPEECH_TX_NS)\n mips += speech_ns_get_required_mips(speech_tx_ns_st);\n#endif\n\n#if defined(SPEECH_TX_NS2)\n mips += speech_ns2_get_required_mips(speech_tx_ns2_st);\n#endif\n\n#if defined(SPEECH_TX_NS2FLOAT)\n mips += speech_ns2float_get_required_mips(speech_tx_ns2float_st);\n#endif\n\n#if defined(SPEECH_TX_NS3)\n mips += ns3_get_required_mips(speech_tx_ns3_st);\n#endif\n\n#if defined(SPEECH_TX_WNR)\n mips += wnr_get_required_mips(speech_tx_wnr_st);\n#endif\n\n#if defined(SPEECH_TX_NOISE_GATE)\n mips += speech_noise_gate_get_required_mips(speech_tx_noise_gate_st);\n#endif\n\n#if defined(SPEECH_TX_COMPEXP)\n mips += compexp_get_required_mips(speech_tx_compexp_st);\n#endif\n\n#if defined(SPEECH_TX_AGC)\n mips += agc_get_required_mips(speech_tx_agc_st);\n#endif\n\n#if defined(SPEECH_TX_EQ)\n mips += eq_get_required_mips(speech_tx_eq_st);\n#endif\n\n#if defined(SPEECH_TX_POST_GAIN)\n mips += speech_gain_get_required_mips(speech_tx_post_gain_st);\n#endif\n\n return mips;\n}\n\nfloat speech_rx_get_required_mips(void) {\n float mips = 0;\n\n#if defined(SPEECH_RX_NS)\n mips += speech_ns_get_required_mips(speech_rx_ns_st);\n#endif\n\n#if defined(SPEECH_RX_NS2)\n mips += speech_ns2_get_required_mips(speech_rx_ns2_st);\n#endif\n\n#if defined(SPEECH_RX_NS2FLOAT)\n mips += speech_ns2float_get_required_mips(speech_rx_ns2float_st);\n#endif\n\n#if defined(SPEECH_RX_NS3)\n mips += ns3_get_required_mips(speech_rx_ns3_st);\n#endif\n\n#if defined(SPEECH_RX_AGC)\n mips += agc_get_required_mips(speech_rx_agc_st);\n#endif\n\n#if defined(SPEECH_RX_EQ)\n mips += eq_get_required_mips(speech_rx_eq_st);\n#endif\n\n#if defined(SPEECH_RX_POST_GAIN)\n mips += speech_gain_get_required_mips(speech_rx_post_gain_st);\n#endif\n\n return mips;\n}\n\nfloat speech_get_required_mips(void) {\n return speech_tx_get_required_mips() + speech_rx_get_required_mips();\n}\n\n#define SYSTEM_BASE_MIPS (18)\n\nenum APP_SYSFREQ_FREQ_T speech_get_proper_sysfreq(int *needed_mips) {\n enum APP_SYSFREQ_FREQ_T freq = APP_SYSFREQ_32K;\n int required_mips = (int)ceilf(speech_get_required_mips() + SYSTEM_BASE_MIPS);\n\n if (required_mips >= 104)\n freq = APP_SYSFREQ_208M;\n else if (required_mips >= 78)\n freq = APP_SYSFREQ_104M;\n else if (required_mips >= 52)\n freq = APP_SYSFREQ_78M;\n else if (required_mips >= 26)\n freq = APP_SYSFREQ_52M;\n else\n freq = APP_SYSFREQ_26M;\n\n *needed_mips = required_mips;\n\n return freq;\n}\n\nint speech_set_config(const SpeechConfig *cfg) {\n#if defined(SPEECH_TX_DC_FILTER)\n speech_dc_filter_set_config(speech_tx_dc_filter_st, &cfg->tx_dc_filter);\n#endif\n#if defined(SPEECH_TX_AEC)\n speech_aec_set_config(speech_tx_aec_st, &cfg->tx_aec);\n#endif\n#if defined(SPEECH_TX_AEC2)\n speech_aec2_set_config(speech_tx_aec2_st, &cfg->tx_aec2);\n#endif\n#if defined(SPEECH_TX_AEC2FLOAT)\n ec2float_set_config(speech_tx_aec2float_st, &cfg->tx_aec2float,\n SPEECH_TX_AEC2FLOAT_CORE);\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n TRACE(1, \"[%s] WARNING: Can not support tuning SPEECH_TX_2MIC_NS\", __func__);\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n speech_2mic_ns2_set_config(speech_tx_2mic_ns2_st, &cfg->tx_2mic_ns2);\n#endif\n#if defined(SPEECH_TX_2MIC_NS4)\n sensormic_denoise_set_config(speech_tx_2mic_ns4_st, &cfg->tx_2mic_ns4);\n#endif\n#if defined(SPEECH_TX_2MIC_NS5)\n leftright_denoise_set_config(speech_tx_2mic_ns5_st, &cfg->tx_2mic_ns5);\n#endif\n#if defined(SPEECH_TX_3MIC_NS)\n speech_3mic_ns_set_config(speech_tx_3mic_ns_st, &cfg->tx_3mic_ns);\n#endif\n#if defined(SPEECH_TX_NS)\n speech_ns_set_config(speech_tx_ns_st, &cfg->tx_ns);\n#endif\n#if defined(SPEECH_TX_NS2)\n speech_ns2_set_config(speech_tx_ns2_st, &cfg->tx_ns2);\n#endif\n#if defined(SPEECH_TX_NS2FLOAT)\n speech_ns2float_set_config(speech_tx_ns2float_st, &cfg->tx_ns2float);\n#endif\n#if defined(SPEECH_TX_NS3)\n ns3_set_config(speech_tx_ns3_st, &cfg->tx_ns3);\n#endif\n#if defined(SPEECH_TX_NOISE_GATE)\n speech_noise_gate_set_config(speech_tx_noise_gate_st, &cfg->tx_noise_gate);\n#endif\n#if defined(SPEECH_TX_COMPEXP)\n compexp_set_config(speech_tx_compexp_st, &cfg->tx_compexp);\n#endif\n#if defined(SPEECH_TX_AGC)\n agc_set_config(speech_tx_agc_st, &cfg->tx_agc);\n#endif\n#if defined(SPEECH_TX_EQ)\n eq_set_config(speech_tx_eq_st, &cfg->tx_eq);\n#endif\n#if defined(SPEECH_TX_POST_GAIN)\n speech_gain_set_config(speech_tx_post_gain_st, &cfg->tx_post_gain);\n#endif\n// #if defined(SPEECH_CS_VAD)\n// VAD_set_config(speech_cs_vad_st, &cfg->cs_vad);\n// #endif\n#if defined(SPEECH_RX_NS)\n speech_ns_set_config(speech_rx_ns_st, &cfg->rx_ns);\n#endif\n#if defined(SPEECH_RX_NS2)\n speech_ns2_set_config(speech_rx_ns2_st, &cfg->rx_ns2);\n#endif\n#if defined(SPEECH_RX_NS2FLOAT)\n speech_ns2float_set_config(speech_rx_ns2float_st, &cfg->rx_ns2float,\n SPEECH_RX_NS2FLOAT_CORE);\n#endif\n#if defined(SPEECH_RX_NS3)\n ns3_set_config(speech_rx_ns3_st, &cfg->rx_ns3);\n#endif\n#if defined(SPEECH_RX_NOISE_GATE)\n speech_noise_gate_set_config(speech_rx_noise_gate_st, &cfg->rx_noise_gate);\n#endif\n#if defined(SPEECH_RX_COMPEXP)\n compexp_set_config(speech_rx_compexp_st, &cfg->rx_compexp);\n#endif\n#if defined(SPEECH_RX_AGC)\n agc_set_config(speech_rx_agc_st, &cfg->rx_agc);\n#endif\n#if defined(SPEECH_RX_EQ)\n eq_set_config(speech_rx_eq_st, &cfg->rx_eq);\n#endif\n#if defined(SPEECH_RX_POST_GAIN)\n speech_gain_set_config(speech_rx_post_gain_st, &cfg->rx_post_gain);\n#endif\n // Add more process\n\n return 0;\n}\n\nvoid _speech_tx_process_pre(short *pcm_buf, short *ref_buf, int *_pcm_len) {\n int pcm_len = *_pcm_len;\n\n#if defined(BT_SCO_CHAIN_PROFILE)\n tx_start_ticks = hal_fast_sys_timer_get();\n#endif\n\n // TRACE(2,\"[%s] pcm_len = %d\", __func__, pcm_len);\n\n#ifdef AUDIO_DEBUG_V0_1_0\n if (speech_tuning_get_status()) {\n speech_set_config(speech_cfg);\n\n speech_tuning_set_status(false);\n\n // If has MIPS problem, can move this block code into speech_rx_process or\n // return directly return 0\n }\n#endif\n\n#if defined(SPEECH_TX_24BIT)\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n tx_refbuf16 = (int16_t *)ref_buf;\n tx_refbuf32 = (int32_t *)ref_buf;\n for (int i = 0; i < pcm_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM; i++) {\n tx_refbuf16[i] = (tx_refbuf32[i] >> 8);\n }\n#endif\n\n tx_pcmbuf16 = (int16_t *)pcm_buf;\n tx_pcmbuf32 = (int32_t *)pcm_buf;\n for (int i = 0; i < pcm_len; i++) {\n tx_pcmbuf16[i] = (tx_pcmbuf32[i] >> 8);\n }\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_clear_up();\n#endif\n\n#if 0\n // Test MIC: Get one channel data\n // Enable this, should bypass SPEECH_TX_2MIC_NS and SPEECH_TX_2MIC_NS2\n for(uint32_t i=0; i>= 1;\n#endif\n\n#if defined(SPEECH_TX_DC_FILTER)\n speech_dc_filter_process(speech_tx_dc_filter_st, pcm_buf, pcm_len);\n#endif\n\n#if (SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2) && defined(AUDIO_DUMP) && \\\n defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_add_channel_data_from_multi_channels(0, pcm_buf, pcm_len / 2, 2,\n 0);\n audio_dump_add_channel_data_from_multi_channels(1, pcm_buf, pcm_len / 2, 2,\n 1);\n#endif\n\n#if defined(SPEECH_TX_MIC_CALIBRATION)\n speech_iir_calib_process(speech_tx_mic_calib_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_MIC_FIR_CALIBRATION)\n speech_fir_calib_process(speech_tx_mic_fir_calib_st, pcm_buf, pcm_len);\n#endif\n\n#if (SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2) && defined(AUDIO_DUMP) && \\\n defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_add_channel_data_from_multi_channels(2, pcm_buf, pcm_len / 2, 2,\n 0);\n audio_dump_add_channel_data_from_multi_channels(3, pcm_buf, pcm_len / 2, 2,\n 1);\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS)\n dual_mic_denoise_run(pcm_buf, pcm_len, pcm_buf);\n // Channel num: two-->one\n pcm_len >>= 1;\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS2)\n speech_2mic_ns2_process(speech_tx_2mic_ns2_st, pcm_buf, pcm_len, pcm_buf);\n // Channel num: two-->one\n pcm_len >>= 1;\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS4)\n if (dualmic_enable == true) {\n#if defined(ANC_APP)\n sensormic_denoise_set_anc_status(speech_tx_2mic_ns4_st,\n app_anc_work_status());\n#endif\n sensormic_denoise_process(speech_tx_2mic_ns4_st, pcm_buf, pcm_len, pcm_buf);\n } else {\n int16_t *pcm16 = (int16_t *)pcm_buf;\n for (int i = 0, j = 0; i < pcm_len / 2; i++, j += 2)\n pcm16[i] = pcm16[j];\n }\n // Channel num: two-->one\n pcm_len >>= 1;\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS5)\n leftright_denoise_process(speech_tx_2mic_ns5_st, pcm_buf, pcm_len, pcm_buf);\n // Channel num: two-->one\n pcm_len >>= 1;\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS6)\n // TRACE(0,\"NS6\");\n speech_2mic_ns6_process(speech_tx_2mic_ns6_st, pcm_buf, pcm_len, pcm_buf);\n // Channel num: two-->one\n pcm_len >>= 1;\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS)\n speech_3mic_ns_process(speech_tx_3mic_ns_st, pcm_buf, pcm_len, pcm_buf);\n // Channel num: three-->one\n pcm_len = pcm_len / 3;\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS3)\n triple_mic_denoise3_process(speech_tx_3mic_ns3_st, pcm_buf, pcm_len, pcm_buf);\n // Channel num: three-->one\n pcm_len = pcm_len / 3;\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_add_channel_data(0, pcm_buf, pcm_len);\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n audio_dump_add_channel_data(1, ref_buf, pcm_len);\n#else\n audio_dump_add_channel_data(1, pcm_buf, pcm_len);\n#endif\n#endif\n\n#if defined(SPEECH_TX_AEC)\n speech_aec_process(speech_tx_aec_st, pcm_buf, ref_buf, pcm_len, aec_out_buf);\n speech_copy_int16(pcm_buf, aec_out_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_AEC2)\n speech_aec2_process(speech_tx_aec2_st, pcm_buf, ref_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_AEC3)\n CODEC_OpVecCpy(bufferstate + delay, ref_buf, pcm_len);\n CODEC_OpVecCpy(buf_out, bufferstate, pcm_len);\n CODEC_OpVecCpy(bufferstate, bufferstate + pcm_len, delay);\n SubBandAec_process(speech_tx_aec3_st, pcm_buf, buf_out, pcm_buf, pcm_len);\n // audio_dump_add_channel_data(1, pcm_buf, pcm_len);\n#endif\n\n SCO_CP_ACCEL_ALGO_START();\n\n#if defined(SPEECH_TX_AEC2FLOAT)\n#if defined(SPEECH_TX_2MIC_NS4)\n if (dualmic_enable == true)\n TRACE(2, \"[%s] vad: %d\", __FUNCTION__,\n sensormic_denoise_get_vad(speech_tx_2mic_ns4_st));\n ec2float_set_external_vad(speech_tx_aec2float_st,\n sensormic_denoise_get_vad(speech_tx_2mic_ns4_st));\n#endif\n ec2float_process(speech_tx_aec2float_st, pcm_buf, ref_buf, pcm_len,\n aec_out_buf);\n speech_copy_int16(pcm_buf, aec_out_buf, pcm_len);\n#endif\n\n SCO_CP_ACCEL_ALGO_END();\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_add_channel_data(2, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_NS)\n speech_ns_process(speech_tx_ns_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_NS2)\n speech_ns2_process(speech_tx_ns2_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_NS2FLOAT)\n#if defined(SPEECH_TX_2MIC_NS4)\n if (dualmic_enable == true)\n speech_ns2float_set_external_vad(\n speech_tx_ns2float_st,\n sensormic_denoise_get_vad(speech_tx_2mic_ns4_st));\n#endif\n speech_ns2float_process(speech_tx_ns2float_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_NS3)\n ns3_process(speech_tx_ns3_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_WNR)\n wnr_process(speech_tx_wnr_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_add_channel_data(3, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_NOISE_GATE)\n speech_noise_gate_process(speech_tx_noise_gate_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n audio_dump_add_channel_data(4, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_COMPEXP)\n compexp_process(speech_tx_compexp_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_AGC)\n agc_process(speech_tx_agc_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_EQ)\n eq_process(speech_tx_eq_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n // audio_dump_add_channel_data(0, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_TX_POST_GAIN)\n speech_gain_process(speech_tx_post_gain_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n // audio_dump_add_channel_data(1, pcm_buf, pcm_len);\n\n audio_dump_add_channel_data(5, pcm_buf, pcm_len);\n audio_dump_run();\n#endif\n\n#if defined(SPEECH_TX_24BIT)\n tx_pcmbuf16 = (int16_t *)pcm_buf;\n tx_pcmbuf32 = (int32_t *)pcm_buf;\n for (int i = pcm_len - 1; i >= 0; i--) {\n tx_pcmbuf32[i] = ((int32_t)tx_pcmbuf16[i] << 8);\n }\n#endif\n\n *_pcm_len = pcm_len;\n\n#if defined(BT_SCO_CHAIN_PROFILE)\n tx_end_ticks = hal_fast_sys_timer_get();\n TRACE(2, \"[%s] takes %d us\", __FUNCTION__,\n FAST_TICKS_TO_US(tx_end_ticks - tx_start_ticks));\n#endif\n}\n\n#if defined(SCO_CP_ACCEL)\nCP_TEXT_SRAM_LOC\nint sco_cp_algo(short *pcm_buf, short *ref_buf, int *_pcm_len) {\n#if defined(SCO_TRACE_CP_ACCEL)\n TRACE(1, \"[%s] ...\", __func__);\n#endif\n\n _speech_tx_process_mid(pcm_buf, ref_buf, _pcm_len);\n\n return 0;\n}\n#endif\n\nint32_t _speech_tx_process_(void *pcm_buf, void *ref_buf, int32_t *_pcm_len) {\n _speech_tx_process_pre(pcm_buf, ref_buf, (int *)_pcm_len);\n#if defined(SCO_CP_ACCEL)\n sco_cp_process(pcm_buf, ref_buf, (int *)_pcm_len);\n _speech_tx_process_post(pcm_buf, ref_buf, (int *)_pcm_len);\n#endif\n\n return 0;\n}\n\nint32_t _speech_rx_process_(void *pcm_buf, int32_t *_pcm_len) {\n int32_t pcm_len = *_pcm_len;\n\n#if defined(BT_SCO_CHAIN_PROFILE)\n uint32_t start_ticks = hal_fast_sys_timer_get();\n#endif\n\n#if defined(SPEECH_RX_24BIT)\n int32_t *buf32 = (int32_t *)pcm_buf;\n int16_t *buf16 = (int16_t *)pcm_buf;\n for (int i = 0; i < pcm_len; i++) {\n buf16[i] = (int16_t)(buf32[i] >> 8);\n }\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n // audio_dump_add_channel_data(0, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_RX_NS)\n speech_ns_process(speech_rx_ns_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_RX_NS2)\n // fix 0dB signal\n int16_t *pcm_buf16 = (int16_t *)pcm_buf;\n for (int i = 0; i < pcm_len; i++) {\n pcm_buf16[i] = (int16_t)(pcm_buf16[i] * 0.94);\n }\n speech_ns2_process(speech_rx_ns2_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_RX_NS2FLOAT)\n // FIXME\n int16_t *pcm_buf16 = (int16_t *)pcm_buf;\n for (int i = 0; i < pcm_len; i++) {\n pcm_buf16[i] = (int16_t)(pcm_buf16[i] * 0.94);\n }\n speech_ns2float_process(speech_rx_ns2float_st, pcm_buf, pcm_len);\n#endif\n\n#ifdef SPEECH_RX_NS3\n ns3_process(speech_rx_ns3_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_RX_AGC)\n agc_process(speech_rx_agc_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(SPEECH_RX_24BIT)\n for (int i = pcm_len - 1; i >= 0; i--) {\n buf32[i] = ((int32_t)buf16[i] << 8);\n }\n#endif\n\n#if defined(SPEECH_RX_EQ)\n#if defined(SPEECH_RX_24BIT)\n eq_process_int24(speech_rx_eq_st, pcm_buf, pcm_len);\n#else\n eq_process(speech_rx_eq_st, pcm_buf, pcm_len);\n#endif\n#endif\n\n#if defined(SPEECH_RX_POST_GAIN)\n speech_gain_process(speech_rx_post_gain_st, pcm_buf, pcm_len);\n#endif\n\n#if defined(BT_SCO_CHAIN_AUDIO_DUMP)\n // audio_dump_add_channel_data(1, pcm_buf, pcm_len);\n // audio_dump_run();\n#endif\n\n *_pcm_len = pcm_len;\n\n#if defined(BT_SCO_CHAIN_PROFILE)\n uint32_t end_ticks = hal_fast_sys_timer_get();\n TRACE(2, \"[%s] takes %d us\", __FUNCTION__,\n FAST_TICKS_TO_US(end_ticks - start_ticks));\n#endif\n\n return 0;\n}\n\nint speech_tx_process(void *pcm_buf, void *ref_buf, int *pcm_len) {\n if (speech_tx_frame_resizer_enable == false) {\n _speech_tx_process_(pcm_buf, ref_buf, (int32_t *)pcm_len);\n } else {\n // MUST use (int32_t *)??????\n frame_resize_process_capture(speech_frame_resize_st, pcm_buf, ref_buf,\n (int32_t *)pcm_len);\n }\n\n return 0;\n}\n\nint speech_rx_process(void *pcm_buf, int *pcm_len) {\n if (speech_rx_frame_resizer_enable == false) {\n _speech_rx_process_(pcm_buf, (int32_t *)pcm_len);\n } else {\n frame_resize_process_playback(speech_frame_resize_st, pcm_buf,\n (int32_t *)pcm_len);\n }\n\n return 0;\n}\n" }, { "path": "apps/audioplayers/bt_sco_chain.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_SCO_CHAIN_H__\n#define __BT_SCO_CHAIN_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*\n * Init speech algorithm, init all related states and memory\n * Input:\n * tx_sample_rate: capture sample rate\n * rx_sample_rate: playback sample rate\n * tx_frame_ms: capture frame size in ms\n * rx_frame_ms: playback frame size in ms\n * sco_frame_ms: sco frame size in ms(must be multiply of 7.5)\n * buf: buffer to be used for algorithms\n * len: buffer size\n */\nint speech_init(int tx_sample_rate, int rx_sample_rate,\n int tx_frame_ms, int rx_frame_ms,\n int sco_frame_ms,\n uint8_t *buf, int len);\n\n/*\n * Deinit speech algorithm, free all related states and memory\n */\nint speech_deinit(void);\n\n/*\n * Uplink process\n * Input:\n * pcm_buf: captured buffer by microphone, multi-channel is interleaved.\n * ref_buf: reference buffer for acoustic echo canceller.\n * buffee sample num should be tx_sample_rate * tx_frame_ms\n * pcm_len: capture buffer sample num, should be tx_sample_rate * sco_frame_ms * ch_num\n * Output:\n * pcm_buf: output buffer of speech algorithm, should be single channel\n * pcm_len: output buffer sample num, should be tx_sample_rate * sco_frame_ms\n */\nint speech_tx_process(void *pcm_buf, void *ref_buf, int *pcm_len);\n\n/*\n * Downlink process\n * Input:\n * pcm_buf: input buffer to be processed\n * pcm_len: input buffer sample num, should be rx_sample_rate * sco_frame_ms\n * Output:\n * pcm_buf: output buffer\n * pcm_len: output buffer sample num, should be rx_sample_rate * sco_frame_ms\n */\nint speech_rx_process(void *pcm_buf, int *pcm_len);\n\nvoid *speech_get_ext_buff(int size);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif" }, { "path": "apps/audioplayers/bt_sco_chain_cfg.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_SCO_CHAIN_CFG_H__\n#define __BT_SCO_CHAIN_CFG_H__\n\n#include \"speech_cfg.h\"\n\ntypedef struct {\n#if defined(SPEECH_TX_DC_FILTER)\n SpeechDcFilterConfig tx_dc_filter;\n#endif\n#if defined(SPEECH_TX_AEC)\n SpeechAecConfig tx_aec;\n#endif\n#if defined(SPEECH_TX_AEC2)\n SpeechAec2Config tx_aec2;\n#endif\n#if defined(SPEECH_TX_AEC2FLOAT)\n Ec2FloatConfig tx_aec2float;\n#endif\n#if defined(SPEECH_TX_AEC3)\n SubBandAecConfig tx_aec3;\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n DUAL_MIC_DENOISE_CFG_T tx_2mic_ns;\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n Speech2MicNs2Config tx_2mic_ns2;\n#endif\n#if defined(SPEECH_TX_2MIC_NS4)\n SensorMicDenoiseConfig tx_2mic_ns4;\n#endif\n#if defined(SPEECH_TX_2MIC_NS5)\n LeftRightDenoiseConfig tx_2mic_ns5;\n#endif\n#if defined(SPEECH_TX_3MIC_NS)\n Speech3MicNsConfig tx_3mic_ns;\n#endif\n#if defined(SPEECH_TX_3MIC_NS3)\n TripleMicDenoise3Config tx_3mic_ns3;\n#endif\n#if defined(SPEECH_TX_NS)\n SpeechNsConfig tx_ns;\n#endif\n#if defined(SPEECH_TX_NS2)\n SpeechNs2Config tx_ns2;\n#endif\n#if defined(SPEECH_TX_NS2FLOAT)\n SpeechNs2FloatConfig tx_ns2float;\n#endif\n#if defined(SPEECH_TX_NS3)\n Ns3Config tx_ns3;\n#endif\n#if defined(SPEECH_TX_WNR)\n WnrConfig tx_wnr;\n#endif\n#if defined(SPEECH_TX_NOISE_GATE)\n NoisegateConfig tx_noise_gate;\n#endif\n#if defined(SPEECH_TX_COMPEXP)\n CompexpConfig tx_compexp;\n#endif\n#if defined(SPEECH_TX_AGC)\n AgcConfig tx_agc;\n#endif\n#if defined(SPEECH_TX_EQ)\n EqConfig tx_eq;\n#endif\n#if defined(SPEECH_TX_POST_GAIN)\n SpeechGainConfig tx_post_gain;\n#endif\n// #if defined(SPEECH_CS_VAD)\n// VADConfig cs_vad;\n// #endif\n#if defined(SPEECH_RX_NS)\n SpeechNsConfig rx_ns;\n#endif\n#if defined(SPEECH_RX_NS2)\n SpeechNs2Config rx_ns2;\n#endif\n#if defined(SPEECH_RX_NS2FLOAT)\n SpeechNs2FloatConfig rx_ns2float;\n#endif\n#if defined(SPEECH_RX_NS3)\n Ns3Config rx_ns3;\n#endif\n#if defined(SPEECH_RX_NOISE_GATE)\n NoisegateConfig rx_noise_gate;\n#endif\n#if defined(SPEECH_RX_COMPEXP)\n CompexpConfig rx_compexp;\n#endif\n#if defined(SPEECH_RX_AGC)\n AgcConfig rx_agc;\n#endif\n#if defined(SPEECH_RX_EQ)\n EqConfig rx_eq;\n#endif\n#if defined(SPEECH_RX_POST_GAIN)\n SpeechGainConfig rx_post_gain;\n#endif\n // Add more process\n} SpeechConfig;\n\n#endif\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n" }, { "path": "apps/audioplayers/bt_sco_chain_cfg_default.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"bt_sco_chain_cfg.h\"\n#include \"plat_types.h\"\n\n#if defined(SPEECH_TX_2MIC_NS4)\nstatic float ff_fb_h[256] = {\n 1.f,\n};\n#endif\n\n#if defined(SPEECH_TX_MIC_CALIBRATION)\n/****************************************************************************************************\n * Describtion:\n * Mic Calibration Equalizer, implementation with 2 order iir filters\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * mic_num(1~4): the number of microphones. The filter num is (mic_num - 1)\n * calib: {bypass, gain, num, {type, frequency, gain, q}}. Please refer to\n *SPEECH_TX_EQ section in this file Resource consumption: RAM: None FLASE:\n *None MIPS: fs = 16kHz, 0.5M/section; Note: None\n ****************************************************************************************************/\nconst SpeechIirCalibConfig WEAK speech_tx_mic_calib_cfg = {\n .bypass = 0,\n .mic_num = 2,\n .calib =\n {\n {.bypass = 0,\n .gain = 0.f,\n .num = 0,\n .params =\n {\n {IIR_BIQUARD_LOWSHELF, 150, -2.5, 0.707},\n }},\n },\n};\n#endif\n\n#if defined(SPEECH_TX_MIC_FIR_CALIBRATION)\n/****************************************************************************************************\n * Describtion:\n * Mic Calibration Equalizer, implementation with fir filter\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * mic_num(1~4): the number of microphones. The filter num is (mic_num - 1)\n * calib: {filter, filter_length, nfft}.\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz, 0.5M/section;\n * Note:\n * None\n ****************************************************************************************************/\nfloat mic2_ft_caliration[256] = {\n 1.f,\n};\nconst SpeechFirCalibConfig WEAK speech_tx_mic_fir_calib_cfg = {\n .bypass = 0,\n .mic_num = SPEECH_CODEC_CAPTURE_CHANNEL_NUM,\n .delay = 0,\n .calib =\n {\n {\n .filter = mic2_ft_caliration,\n .filter_length = ARRAY_SIZE(mic2_ft_caliration),\n },\n },\n};\n#endif\n\nconst SpeechConfig WEAK speech_cfg_default = {\n\n#if defined(SPEECH_TX_DC_FILTER)\n .tx_dc_filter =\n {\n .bypass = 0,\n .gain = 0,\n },\n#endif\n\n#if defined(SPEECH_TX_AEC)\n /****************************************************************************************************\n * Describtion:\n * Acoustic Echo Cancellation\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * delay(>0): delay samples from mic to speak, unit(sample).\n * leak_estimate(0~32767): echo supression value. This is a fixed mode.\n *It has relatively large echo supression and large damage to speech signal.\n * leak_estimate_shift(0~8): echo supression value. if leak_estimate ==\n *0, then leak_estimate_shift can take effect. This is a adaptive mode. It\n *has relatively small echo supression and also small damage to speech\n *signal. Resource consumption: RAM: None FLASE: None MIPS: fs =\n *16kHz, 40M; Note: If possible, use SPEECH_TX_AEC2FLOAT\n ****************************************************************************************************/\n .tx_aec =\n {\n .bypass = 0,\n .delay = 60,\n .leak_estimate = 16383,\n .leak_estimate_shift = 4,\n },\n#endif\n\n#if defined(SPEECH_TX_AEC2)\n /****************************************************************************************************\n * Describtion:\n * Acoustic Echo Cancellation\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * .\n * .\n * .\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz, enNlpEnable = 1, 39M;\n * Note:\n * If possible, use SPEECH_TX_AEC2FLOAT\n ****************************************************************************************************/\n .tx_aec2 =\n {\n .bypass = 0,\n .enEAecEnable = 1,\n .enHpfEnable = 1,\n .enAfEnable = 0,\n .enNsEnable = 0,\n .enNlpEnable = 1,\n .enCngEnable = 0,\n .shwDelayLength = 0,\n .shwNlpBandSortIdx = 0.75f,\n .shwNlpBandSortIdxLow = 0.5f,\n .shwNlpTargetSupp = 3.0f,\n .shwNlpMinOvrd = 1.0f,\n },\n#endif\n\n#if defined(SPEECH_TX_AEC2FLOAT)\n /****************************************************************************************************\n * Describtion:\n * Acoustic Echo Cancellation\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * hpf_enabled(0/1): high pass filter enable or disable. Used to remove\n *DC for Near and Ref signals. af_enabled(0/1): adaptive filter enable or\n *disable. If the echo signal is very large, enable this nlp_enabled(0/1):\n *non-linear process enable or disable. Enable this by default.\n * ns_enabled(0/1): noise supression enable or disable. Enable this by\n *default. cng_enabled(0/1): comfort noise generator enable or disable.\n * blocks(1~8): the length of adaptive filter = blocks * frame length\n * delay(>0): delay samples from mic to speak, unit(sample).\n * min_ovrd(1~6): supression factor, min_ovrd becomes larger and echo\n *suppression becomes larger. target_supp(<0): target echo suppression,\n *unit(dB) noise_supp(-30~0): noise suppression, unit(dB) cng_type(0/1):\n *noise type(0: White noise; 1: Pink noise) cng_level(<0): noise gain,\n *unit(dB) Resource consumption: RAM: None FLASE: None MIPS: fs =\n *16kHz; Note: This is the recommended AEC\n ****************************************************************************************************/\n .tx_aec2float =\n {\n .bypass = 0,\n .hpf_enabled = false,\n .af_enabled = false,\n .nlp_enabled = true,\n .clip_enabled = false,\n .stsupp_enabled = false,\n .ns_enabled = true,\n .cng_enabled = false,\n .blocks = 1,\n .delay = 70,\n .min_ovrd = 2,\n .target_supp = -40,\n .noise_supp = -15,\n .cng_type = 1,\n .cng_level = -60,\n .clip_threshold = -20.f,\n .banks = 64,\n },\n#endif\n\n#if defined(SPEECH_TX_AEC3)\n .tx_aec3 =\n {\n .bypass = 0,\n .filter_size = 16,\n },\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS)\n /****************************************************************************************************\n * Describtion:\n * 2 MICs Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_2mic_ns =\n {\n .bypass = 0,\n .alpha_h = 0.8,\n .alpha_slow = 0.9,\n .alpha_fast = 0.6,\n .thegma = 0.01,\n .thre_corr = 0.2,\n .thre_filter_diff = 0.2,\n .cal_left_gain = 1.0,\n .cal_right_gain = 1.0,\n .delay_mono_sample = 6,\n .wnr_enable = 0,\n },\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS2)\n /****************************************************************************************************\n * Describtion:\n * 2 MICs Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * delay_taps(0~4): ceil{[d(MIC1~mouth) - d(MIC2~mouth)] / 2}.\n * ceil: Returns the largest integer less than or equal to the\n *specified data d(MIC~mouth): The dinstance from MIC to mouth e.g. 0:\n *0~2cm; 1: 2~4; 2: 5~6... freq_smooth_enable(1): Must enable\n * wnr_enable(0/1): wind noise reduction enable or disable. This is also\n *useful for improving noise suppression, but it also has some damage to\n *speech signal. Resource consumption: RAM: None FLASE: None MIPS: fs\n *= 16kHz, 32M; Note: None\n ****************************************************************************************************/\n .tx_2mic_ns2 =\n {\n .bypass = 0,\n .delay_taps = 0.f,\n .freq_smooth_enable = 1,\n .wnr_enable = 1,\n },\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS5)\n /****************************************************************************************************\n * Describtion:\n * 2 MICs Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * delay_taps(0~4): ceil{[d(MIC1~mouth) - d(MIC2~mouth)] / 2}. Default\n *as 0 ceil: Returns the largest integer less than or equal to the specified\n *data d(MIC~mouth): The dinstance from MIC to mouth e.g. 0: 0~2cm; 1: 2~4;\n *2: 5~6... freq_smooth_enable(1): Must enable wnr_enable(0/1): wind noise\n *reduction enable or disable. This is also useful for improving noise\n *suppression, but it also has some damage to speech signal.\n * delay_enable(0/1): enable the delay_taps or not. Ideally, never need\n *to enable the delay and delay_taps will be a useless parameter. Resource\n *consumption: RAM: None FLASE: None MIPS: fs = 16kHz, 32M; Note:\n * None\n ****************************************************************************************************/\n .tx_2mic_ns5 =\n {\n .bypass = 0,\n .delay_taps = 0.0f,\n .freq_smooth_enable = 1,\n .wnr_enable = 0,\n .delay_enable = 0,\n },\n#endif\n\n#if defined(SPEECH_TX_2MIC_NS4)\n /****************************************************************************************************\n * Describtion:\n * 2 MICs Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_2mic_ns4 =\n {\n .bypass = 0,\n .blend_en = 1,\n // .left_gain = 1.0f,\n // .right_gain = 1.0f,\n .delay_tapsM = 0,\n .delay_tapsS = 0,\n // .delay_tapsC = 32,\n //////////////////////////{{a0,a1,a2,a3,a4},{b0,b1,b2,b3,b4}}///////////////////////////\n // .coefH[0] = {1.0, -1.88561808316413, 1.55555555555556,\n // -0.628539361054709, 0.111111111111111}, .coefH[1] =\n // {0.323801506930344, -1.29520602772138, 1.94280904158206,\n // -1.29520602772138, 0.323801506930344}, .coefL[0] =\n // {1.0, -1.88561808316413, 1.55555555555556, -0.628539361054709,\n // 0.111111111111111}, .coefL[1] = {0.00953182640298944,\n // 0.0381273056119578, 0.0571909584179366, 0.0381273056119578,\n // 0.00953182640298944},\n .crossover_freq = 1000,\n .ff_fb_coeff = ff_fb_h,\n .ff_fb_coeff_len = ARRAY_SIZE(ff_fb_h),\n },\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS)\n /****************************************************************************************************\n * Describtion:\n * 3 MICs Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * delay_tapsM(0~4): MIC L/R delay samples. Refer to SPEECH_TX_2MIC_NS2\n *delay_taps delay_tapsS(0~4): MIC L/S delay samples. Refer to\n *SPEECH_TX_2MIC_NS2 delay_taps freq_smooth_enable(1): Must enable\n * wnr_enable(0/1): wind noise reduction enable or disable. This is also\n *useful for improving noise suppression, but it also has some damage to\n *speech signal. Resource consumption: RAM: None FLASE: None MIPS: fs\n *= 16kHz; Note: None\n ****************************************************************************************************/\n .tx_3mic_ns =\n {\n .bypass = 0,\n .blend_en = 1,\n .authen_en = 1,\n .delay_tapsM = 0.65f,\n .delay_tapsS = 2,\n .denoise_dB = -15.0f,\n // .coefH[0] = {1.0,-3.3384,4.2195,-2.3924,0.5136},\n // .coefH[1] = {0.7165,-2.8660,4.2990,-2.8660,0.7165},\n // .coefL[0] = {1.0,-3.3384,4.2195,-2.3924,0.5136},\n // .coefL[1] = {0.00014,0.00056,0.00084,0.00056,0.00014},\n .crossover_freq = 1000,\n .freq_smooth_enable = 1,\n .wnr_enable = 0,\n },\n#endif\n\n#if defined(SPEECH_TX_3MIC_NS3)\n /****************************************************************************************************\n * Describtion:\n * 3 MICs Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * delay_taps(0~4): ceil{[d(MIC1~mouth) - d(MIC2~mouth)] / 2}.\n * ceil: Returns the largest integer less than or equal to the\n *specified data d(MIC~mouth): The dinstance from MIC to mouth e.g. 0:\n *0~2cm; 1: 2~4; 2: 5~6... freq_smooth_enable(1): Must enable\n * wnr_enable(0/1): wind noise reduction enable or disable. This is also\n *useful for improving noise suppression, but it also has some damage to\n *speech signal. Resource consumption: RAM: None FLASE: None MIPS: fs\n *= 16kHz, 32M; Note: None\n ****************************************************************************************************/\n .tx_3mic_ns3 =\n {\n .bypass = 0,\n .endfire_enable = 1,\n .broadside_enable = 1,\n .delay_taps = 0.7f,\n .freq_smooth_enable = 1,\n .wnr_enable = 0,\n },\n#endif\n\n#if defined(SPEECH_TX_NS)\n /****************************************************************************************************\n * Describtion:\n * Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz, 30M;\n * Note:\n * If possible, use SPEECH_TX_NS2 or SPEECH_TX_NS2FLOAT\n ****************************************************************************************************/\n .tx_ns =\n {\n .bypass = 0,\n .denoise_dB = -12,\n },\n#endif\n\n#if defined(SPEECH_TX_NS2)\n /****************************************************************************************************\n * Describtion:\n * Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * denoise_dB(-30~0): noise suppression, unit(dB).\n * e.g. -15: Can reduce 15dB of stationary noise.\n * Resource consumption:\n * RAM: fs = 16k: RAM = 8k;\n * fs = 8k: RAM = 4k;\n * RAM = frame_size * 30\n * FLASE: None\n * MIPS: fs = 16kHz, 16M;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_ns2 =\n {\n .bypass = 0,\n .denoise_dB = -15,\n },\n#endif\n\n#if defined(SPEECH_TX_NS2FLOAT)\n /****************************************************************************************************\n * Describtion:\n * Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * denoise_dB(-30~0): noise suppression, unit(dB).\n * e.g. -15: Can reduce 15dB of stationary noise.\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz;\n * Note:\n * This is a 'float' version for SPEECH_TX_NS2.\n * It needs more MIPS and RAM, but can redece quantization noise.\n ****************************************************************************************************/\n .tx_ns2float =\n {\n .bypass = 0,\n .denoise_dB = -15,\n .banks = 64,\n },\n#endif\n\n#if defined(SPEECH_TX_NS3)\n /****************************************************************************************************\n * Describtion:\n * Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * mode: None\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_ns3 =\n {\n .bypass = 0,\n .mode = NS3_SUPPRESSION_HIGH,\n },\n#endif\n\n#if defined(SPEECH_TX_WNR)\n /****************************************************************************************************\n * Describtion:\n * Wind Noise Suppression\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * lpf_cutoff: lowpass filter for wind noise detection\n * hpf_cutoff: highpass filter for wind noise suppression\n * power_ratio_thr: ratio of the power spectrum of the lower frequencies\n over the total power spectrum for all frequencies\n * power_thr: normalized power of the low frequencies\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_wnr =\n {\n .bypass = 0,\n .lpf_cutoff = 1000,\n .hpf_cutoff = 400,\n .power_ratio_thr = 0.9f,\n .power_thr = 1.f,\n },\n#endif\n\n#if defined(SPEECH_TX_NOISE_GATE)\n /****************************************************************************************************\n * Describtion:\n * Noise Gate\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * data_threshold(0~32767): distinguish between noise and speech,\n *unit(sample). data_shift(1~3): 1: -6dB; 2: -12dB; 3: -18dB\n * factor_up(float): attack time, unit(s)\n * factor_down(float): release time, unit(s)\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_noise_gate =\n {\n .bypass = 0,\n .data_threshold = 640,\n .data_shift = 1,\n .factor_up = 0.001f,\n .factor_down = 0.5f,\n },\n#endif\n\n#if defined(SPEECH_TX_COMPEXP)\n /****************************************************************************************************\n * Describtion:\n * Compressor and expander\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * ...\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_compexp =\n {\n .bypass = 0,\n .comp_threshold = -10.f,\n .comp_ratio = 2.f,\n .expand_threshold = -45.f,\n .expand_ratio = 0.5556f,\n .attack_time = 0.001f,\n .release_time = 0.6f,\n .makeup_gain = 6,\n .delay = 128,\n },\n#endif\n\n#if defined(SPEECH_TX_AGC)\n /****************************************************************************************************\n * Describtion:\n * Automatic Gain Control\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * target_level(>0): signal can not exceed (-1 * target_level)dB.\n * compression_gain(>0): excepted gain.\n * limiter_enable(0/1): 0: target_level does not take effect; 1:\n *target_level takes effect. Resource consumption: RAM: None FLASE: None\n * MIPS: fs = 16kHz, 3M;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_agc =\n {\n .bypass = 0,\n .target_level = 3,\n .compression_gain = 6,\n .limiter_enable = 1,\n },\n#endif\n\n#if defined(SPEECH_TX_EQ)\n /****************************************************************************************************\n * Describtion:\n * Equalizer, implementation with 2 order iir filters\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * gain(float): normalized gain. It is usually less than or equal to 0\n * num(0~6): the number of EQs\n * params: {type, frequency, gain, q}. It supports a lot of types,\n *please refer to iirfilt.h file Resource consumption: RAM: None FLASE:\n *None MIPS: fs = 16kHz, 0.5M/section; Note: None\n ****************************************************************************************************/\n .tx_eq =\n {\n .bypass = 0,\n .gain = 0.f,\n .num = 1,\n .params =\n {\n {IIR_BIQUARD_HPF, {{60, 0, 0.707f}}},\n },\n },\n#endif\n\n#if defined(SPEECH_TX_POST_GAIN)\n /****************************************************************************************************\n * Describtion:\n * Linear Gain\n * Parameters:\n * bypass(0/1): bypass enable or disable.\n * Resource consumption:\n * RAM: None\n * FLASE: None\n * MIPS: fs = 16kHz;\n * Note:\n * None\n ****************************************************************************************************/\n .tx_post_gain =\n {\n .bypass = 0,\n .gain_dB = 6.0f,\n },\n#endif\n\n// #if defined(SPEECH_CS_VAD)\n// /****************************************************************************************************\n// * Describtion:\n// * Voice Activity Detector\n// * Parameters:\n// * bypass(0/1): bypass enable or disable.\n// * Resource consumption:\n// * RAM: None\n// * FLASE: None\n// * MIPS: fs = 16kHz;\n// * Note:\n// * None\n// ****************************************************************************************************/\n// .tx_vad = {\n// .snrthd = 5.f,\n// .energythd = 100.f,\n// },\n// #endif\n\n#if defined(SPEECH_RX_NS)\n /****************************************************************************************************\n * Describtion:\n * Acoustic Echo Cancellation\n * Parameters:\n * Refer to SPEECH_TX_NS\n * Note:\n * None\n ****************************************************************************************************/\n .rx_ns =\n {\n .bypass = 0,\n .denoise_dB = -12,\n },\n#endif\n\n#if defined(SPEECH_RX_NS2)\n /****************************************************************************************************\n * Describtion:\n * Acoustic Echo Cancellation\n * Parameters:\n * Refer to SPEECH_TX_NS2\n * Note:\n * None\n ****************************************************************************************************/\n .rx_ns2 =\n {\n .bypass = 0,\n .denoise_dB = -15,\n },\n#endif\n\n#if defined(SPEECH_RX_NS2FLOAT)\n /****************************************************************************************************\n * Describtion:\n * Acoustic Echo Cancellation\n * Parameters:\n * Refer to SPEECH_TX_NS2FLOAT\n * Note:\n * None\n ****************************************************************************************************/\n .rx_ns2float =\n {\n .bypass = 0,\n .denoise_dB = -15,\n .banks = 64,\n },\n#endif\n\n#if defined(SPEECH_RX_NS3)\n /****************************************************************************************************\n * Describtion:\n * Acoustic Echo Cancellation\n * Parameters:\n * Refer to SPEECH_TX_NS3\n * Note:\n * None\n ****************************************************************************************************/\n .rx_ns3 =\n {\n .bypass = 0,\n .mode = NS3_SUPPRESSION_HIGH,\n },\n#endif\n\n#if defined(SPEECH_RX_NOISE_GATE)\n /****************************************************************************************************\n * Describtion:\n * Noise Gate\n * Parameters:\n * Refer to SPEECH_TX_NOISE_GATE\n * Note:\n * None\n ****************************************************************************************************/\n .rx_noise_gate =\n {\n .bypass = 0,\n .data_threshold = 640,\n .data_shift = 1,\n .factor_up = 0.001f,\n .factor_down = 0.5f,\n },\n#endif\n\n#if defined(SPEECH_RX_COMPEXP)\n /****************************************************************************************************\n * Describtion:\n * Compressor and expander\n * Parameters:\n * Refer to SPEECH_TX_COMPEXP\n * Note:\n * None\n ****************************************************************************************************/\n .rx_compexp =\n {\n .bypass = 0,\n .comp_threshold = -10.f,\n .comp_slope = 0.5f,\n .expand_threshold = -40.f,\n .expand_slope = -0.5f,\n .attack_time = 0.01f,\n .release_time = 0.6f,\n .makeup_gain = 6,\n .delay = 128,\n },\n#endif\n\n#if defined(SPEECH_RX_AGC)\n /****************************************************************************************************\n * Describtion:\n * Automatic Gain Control\n * Parameters:\n * Refer to SPEECH_TX_AGC\n * Note:\n * None\n ****************************************************************************************************/\n .rx_agc =\n {\n .bypass = 0,\n .target_level = 3,\n .compression_gain = 6,\n .limiter_enable = 1,\n },\n#endif\n\n#if defined(SPEECH_RX_EQ)\n /****************************************************************************************************\n * Describtion:\n * Equalizer, implementation with 2 order iir filters\n * Parameters:\n * Refer to SPEECH_TX_EQ\n * Note:\n * None\n ****************************************************************************************************/\n .rx_eq =\n {\n .bypass = 0,\n .gain = 0.f,\n .num = 1,\n .params =\n {\n {IIR_BIQUARD_HPF, {{60, 0, 0.707f}}},\n },\n },\n#endif\n\n#if defined(SPEECH_RX_POST_GAIN)\n /****************************************************************************************************\n * Describtion:\n * Linear Gain\n * Parameters:\n * Refer to SPEECH_TX_POST_GAIN\n * Note:\n * None\n ****************************************************************************************************/\n .rx_post_gain =\n {\n .bypass = 0,\n .gain_dB = 6.0f,\n },\n#endif\n\n};\n" }, { "path": "apps/audioplayers/bt_sco_chain_cp.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n * Usage:\n * 1. Enable SCO_CP_ACCEL ?= 1 to enable dual core in sco\n * 2. Enable SCO_TRACE_CP_ACCEL ?= 1 to see debug log.\n * 3. Change channel number if the algo(run in cp) input is more than one\n *channel: sco_cp_init(speech_tx_frame_len, 1);\n * 4. The code between SCO_CP_ACCEL_ALGO_START(); and SCO_CP_ACCEL_ALGO_END();\n *will run in CP core.\n * 5. These algorithms will work in AP. Need to move this algorithms from\n *overlay to fast ram.\n *\n * NOTE:\n * 1. spx fft and hw fft will share buffer, so just one core can use these\n *fft.\n * 2. audio_dump_add_channel_data function can not work correctly in CP core,\n *because audio_dump_add_channel_data is possible called after audio_dump_run();\n * 3. AP and CP just can use 85%\n *\n *\n *\n * TODO:\n * 1. FFT, RAM, CODE overlay\n **/\n#if defined(SCO_CP_ACCEL)\n#include \"cmsis_os.h\"\n#include \"cp_accel.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"math.h\"\n#include \"norflash_api.h\"\n#include \"speech_cfg.h\"\n\n// malloc data from pool in init function\n#define FRAME_LEN_MAX (256)\n#define CHANNEL_NUM_MAX (2)\n\nenum CP_SCO_STATE_T {\n CP_SCO_STATE_NONE = 0,\n CP_SCO_STATE_IDLE,\n CP_SCO_STATE_WORKING,\n};\n\nenum SCO_CP_CMD_T {\n SCO_CP_CMD_PRO = 0,\n SCO_CP_CMD_OTHER,\n\n SCO_CP_CMD_QTY,\n};\n\nstatic CP_DATA_LOC enum CP_SCO_STATE_T g_cp_state = CP_SCO_STATE_NONE;\n\n// TODO: Use malloc to replace array\n// static CP_BSS_LOC char g_cp_heap_buf[1024 * 100];\nstatic CP_BSS_LOC short g_in_pcm_buf[FRAME_LEN_MAX * CHANNEL_NUM_MAX];\nstatic CP_BSS_LOC short g_out_pcm_buf[FRAME_LEN_MAX * CHANNEL_NUM_MAX];\nstatic CP_BSS_LOC short g_in_ref_buf[FRAME_LEN_MAX];\nstatic CP_BSS_LOC int g_pcm_len;\n\nstatic CP_BSS_LOC int g_frame_len;\nstatic CP_BSS_LOC int g_channel_num;\n\nstatic int g_require_cnt = 0;\nstatic int g_run_cnt = 0;\n\nint sco_cp_process(short *pcm_buf, short *ref_buf, int *_pcm_len) {\n int32_t pcm_len = *_pcm_len;\n uint32_t wait_cnt = 0;\n\n ASSERT(g_frame_len * g_channel_num == pcm_len,\n \"[%s] g_frame_len(%d) * g_channel_num(%d) != pcm_len(%d)\", __func__,\n g_frame_len, g_channel_num, pcm_len);\n\n // Check CP has new data to get and can get data from buffer\n#if defined(SCO_TRACE_CP_ACCEL)\n TRACE(4, \"[%s] g_require_cnt: %d, status: %d, pcm_len: %d\", __func__,\n g_require_cnt, g_cp_state, pcm_len);\n#endif\n\n while (g_cp_state == CP_SCO_STATE_WORKING) {\n hal_sys_timer_delay_us(10);\n\n if (wait_cnt++ > 300000) { // 3s\n ASSERT(0, \"cp is hung %d\", g_cp_state);\n }\n }\n\n if (g_cp_state == CP_SCO_STATE_IDLE) {\n speech_copy_int16(g_in_pcm_buf, pcm_buf, pcm_len);\n if (ref_buf) {\n speech_copy_int16(g_in_ref_buf, ref_buf, pcm_len / g_channel_num);\n }\n speech_copy_int16(pcm_buf, g_out_pcm_buf, g_pcm_len);\n *_pcm_len = g_pcm_len;\n g_pcm_len = pcm_len;\n\n g_require_cnt++;\n g_cp_state = CP_SCO_STATE_WORKING;\n cp_accel_send_event_mcu2cp(\n CP_BUILD_ID(CP_TASK_SCO, CP_EVENT_SCO_PROCESSING));\n } else {\n // Multi channels to one channel\n#if 0\n for (int i = 0; i < pcm_len / g_channel_num; i++)\n {\n pcm_buf[i] = pcm_buf[2*i];\n }\n\n *_pcm_len = pcm_len / g_channel_num;\n#endif\n\n // Check abs(g_require_cnt - g_run_cnt) > threshold, reset or assert\n\n TRACE(2, \"[%s] ERROR: status = %d\", __func__, g_cp_state);\n }\n\n return 0;\n}\n\nextern int sco_cp_algo(short *pcm_buf, short *ref_buf, int *_pcm_len);\n\nCP_TEXT_SRAM_LOC\nstatic unsigned int sco_cp_main(uint8_t event) {\n#if defined(SCO_TRACE_CP_ACCEL)\n TRACE(2, \"[%s] g_run_cnt: %d\", __func__, g_run_cnt);\n#endif\n\n // LOCK BUFFER\n\n // process pcm\n#if 0\n // speech_copy_int16(g_out_pcm_buf, g_in_pcm_buf, g_pcm_len);\n\n for (int i = 0; i < g_pcm_len; i++)\n {\n g_out_pcm_buf[i] = (short)(sinf(2 * 3.1415926 * i / 16 ) * 10000);\n }\n#else\n sco_cp_algo(g_in_pcm_buf, g_in_ref_buf, &g_pcm_len);\n speech_copy_int16(g_out_pcm_buf, g_in_pcm_buf, g_pcm_len);\n#endif\n\n // set status\n g_run_cnt++;\n g_cp_state = CP_SCO_STATE_IDLE;\n\n#if defined(SCO_TRACE_CP_ACCEL)\n TRACE(1, \"[%s] CP_SCO_STATE_IDLE\", __func__);\n#endif\n\n // UNLOCK BUFFER\n\n return 0;\n}\n\nstatic struct cp_task_desc TASK_DESC_SCO = {CP_ACCEL_STATE_CLOSED, sco_cp_main,\n NULL, NULL, NULL};\nint sco_cp_init(int frame_len, int channel_num) {\n TRACE(3, \"[%s] frame_len: %d, channel_num: %d\", __func__, frame_len,\n channel_num);\n ASSERT(frame_len <= FRAME_LEN_MAX, \"[%s] frame_len(%d) > FRAME_LEN_MAX\",\n __func__, frame_len);\n ASSERT(channel_num <= CHANNEL_NUM_MAX,\n \"[%s] channel_num(%d) > CHANNEL_NUM_MAX\", __func__, channel_num);\n\n g_require_cnt = 0;\n g_run_cnt = 0;\n\n norflash_api_flush_disable(NORFLASH_API_USER_CP,\n (uint32_t)cp_accel_init_done);\n cp_accel_open(CP_TASK_SCO, &TASK_DESC_SCO);\n\n uint32_t cnt = 0;\n while (cp_accel_init_done() == false) {\n hal_sys_timer_delay_us(100);\n\n cnt++;\n if (cnt % 10 == 0) {\n if (cnt == 10 * 200) { // 200ms\n ASSERT(0, \"[%s] ERROR: Can not init cp!!!\", __func__);\n } else {\n TRACE(1, \"[%s] Wait CP init done...%d(ms)\", __func__, cnt / 10);\n }\n }\n }\n norflash_api_flush_enable(NORFLASH_API_USER_CP);\n#if 0\n speech_heap_cp_start();\n speech_heap_add_block(g_cp_heap_buf, sizeof(g_cp_heap_buf));\n speech_heap_cp_end();\n#endif\n\n g_frame_len = frame_len;\n g_channel_num = channel_num;\n g_pcm_len = frame_len; // Initialize output pcm_len\n\n speech_set_int16(g_in_pcm_buf, 0, g_frame_len * g_channel_num);\n speech_set_int16(g_out_pcm_buf, 0, g_frame_len * g_channel_num);\n speech_set_int16(g_in_ref_buf, 0, g_frame_len);\n g_cp_state = CP_SCO_STATE_IDLE;\n\n TRACE(2, \"[%s] status = %d\", __func__, g_cp_state);\n\n return 0;\n}\n\nint sco_cp_deinit(void) {\n TRACE(1, \"[%s] ...\", __func__);\n\n cp_accel_close(CP_TASK_SCO);\n\n g_cp_state = CP_SCO_STATE_NONE;\n\n return 0;\n}\n#endif\n" }, { "path": "apps/audioplayers/bt_sco_chain_cp.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_SCO_CHAIN_CP_H__\n#define __BT_SCO_CHAIN_CP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"stdbool.h\"\n\n// enum CP_EMPTY_OUT_FRM_T {\n// CP_EMPTY_OUT_FRM_OK,\n// CP_EMPTY_OUT_FRM_WORKING,\n// CP_EMPTY_OUT_FRM_ERR,\n// };\n\n// typedef int (*A2DP_CP_DECODE_T)(void);\n\nint sco_cp_init(int frame_len, int channel_num);\n\nint sco_cp_deinit(void);\n\n// int sco_cp_set_pcm(short *pcm_buf, int pcm_len);\n\n// int sco_cp_get_pcm(short *pcm_buf, int pcm_len);\n\nint sco_cp_process(short *pcm_buf, short *ref_buf, int *_pcm_len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n" }, { "path": "apps/audioplayers/bt_sco_chain_thirdparty.c", "content": "#include \"audio_dump.h\"\n#include \"bt_sco_chain.h\"\n#include \"hal_trace.h\"\n#include \"speech_cfg.h\"\n#include \"speech_memory.h\"\n#include \"speech_utils.h\"\n\n#if defined(SPEECH_TX_24BIT)\nint32_t *aec_echo_buf = NULL;\n\n// Use to free buffer\nstatic int32_t *aec_echo_buf_ptr = NULL;\n#else\nshort *aec_echo_buf = NULL;\n\n// Use to free buffer\nstatic short *aec_echo_buf_ptr;\n#endif\n\n#if defined(MSBC_8K_SAMPLE_RATE)\n#define SPEECH_HEAP_RESERVE_SIZE (1024 * 4)\n#else\n#define SPEECH_HEAP_RESERVE_SIZE (1024 * 4)\n#endif\n\n#if defined(SPEECH_TX_DC_FILTER)\nSpeechDcFilterState *speech_tx_dc_filter_st = NULL;\n#endif\n\nint speech_init(int tx_sample_rate, int rx_sample_rate, int tx_frame_ms,\n int rx_frame_ms, int sco_frame_ms, uint8_t *buf, int len) {\n // we shoule keep a minmum buffer for speech heap\n // MSBC_16K_SAMPLE_RATE = 0, 560 bytes\n // MSBC_16K_SAMPLE_RATE = 1, 2568 bytes\n speech_heap_init(buf, SPEECH_HEAP_RESERVE_SIZE);\n\n uint8_t *free_buf = buf + SPEECH_HEAP_RESERVE_SIZE;\n int free_len = len - SPEECH_HEAP_RESERVE_SIZE;\n\n // use free_buf for your algorithm\n memset(free_buf, 0, free_len);\n\n int frame_len = SPEECH_FRAME_MS_TO_LEN(tx_sample_rate, tx_frame_ms);\n\n#if defined(SPEECH_TX_24BIT)\n aec_echo_buf = (int32_t *)speech_calloc(frame_len, sizeof(int32_t));\n#else\n aec_echo_buf = (short *)speech_calloc(frame_len, sizeof(short));\n#endif\n aec_echo_buf_ptr = aec_echo_buf;\n\n#if defined(SPEECH_TX_DC_FILTER)\n int channel_num = SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n int data_separation = 0;\n\n SpeechDcFilterConfig dc_filter_cfg = {\n .bypass = 0,\n .gain = 0.f,\n };\n\n speech_tx_dc_filter_st =\n speech_dc_filter_create(tx_sample_rate, frame_len, &dc_filter_cfg);\n speech_dc_filter_ctl(speech_tx_dc_filter_st, SPEECH_DC_FILTER_SET_CHANNEL_NUM,\n &channel_num);\n speech_dc_filter_ctl(speech_tx_dc_filter_st,\n SPEECH_DC_FILTER_SET_DATA_SEPARATION, &data_separation);\n#endif\n\n audio_dump_init(frame_len, sizeof(int16_t), 3);\n\n return 0;\n}\n\nint speech_deinit(void) {\n#if defined(SPEECH_TX_DC_FILTER)\n speech_dc_filter_destroy(speech_tx_dc_filter_st);\n#endif\n\n speech_free(aec_echo_buf_ptr);\n\n size_t total = 0, used = 0, max_used = 0;\n speech_memory_info(&total, &used, &max_used);\n TRACE(3, \"SPEECH MALLOC MEM: total - %d, used - %d, max_used - %d.\", total,\n used, max_used);\n ASSERT(used == 0, \"[%s] used != 0\", __func__);\n\n return 0;\n}\n\n#if defined(BONE_SENSOR_TDM)\nextern void bt_sco_get_tdm_buffer(uint8_t **buf, uint32_t *len);\n#endif\n\nint speech_tx_process(void *_pcm_buf, void *_ref_buf, int *_pcm_len) {\n#if defined(SPEECH_TX_24BIT)\n int32_t *pcm_buf = (int32_t *)_pcm_buf;\n int32_t *ref_buf = (int32_t *)_ref_buf;\n#else\n int16_t *pcm_buf = (int16_t *)_pcm_buf;\n int16_t *ref_buf = (int16_t *)_ref_buf;\n#endif\n\n int pcm_len = *_pcm_len;\n\n#if defined(BONE_SENSOR_TDM)\n uint8_t *bone_buf = NULL;\n uint32_t bone_len = 0;\n bt_sco_get_tdm_buffer(&bone_buf, &bone_len);\n#endif\n\n audio_dump_clear_up();\n audio_dump_add_channel_data(0, ref_buf,\n pcm_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM);\n audio_dump_add_channel_data_from_multi_channels(\n 1, pcm_buf, pcm_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM,\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM, 0);\n audio_dump_add_channel_data_from_multi_channels(\n 2, pcm_buf, pcm_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM,\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM, 1);\n\n#if defined(BONE_SENSOR_TDM)\n audio_dump_add_channel_data(3, bone_buf,\n pcm16_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM);\n#endif\n\n audio_dump_run();\n\n#if defined(SPEECH_TX_DC_FILTER)\n#if defined(SPEECH_TX_24BIT)\n speech_dc_filter_process_int24(speech_tx_dc_filter_st, pcm_buf, pcm_len);\n#else\n speech_dc_filter_process(speech_tx_dc_filter_st, pcm_buf, pcm_len);\n#endif\n#endif\n\n // Add your algrithm here and disable #if macro\n#if 1\n for (int i = 0, j = 0; i < pcm_len;\n i += SPEECH_CODEC_CAPTURE_CHANNEL_NUM, j++) {\n // choose main microphone data\n pcm_buf[j] = pcm_buf[i];\n // choose reference data, i.e. loopback\n // pcm16_buf[j] = ref16_buf[j];\n }\n pcm_len /= SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n memcpy(pcm_buf, bone_buf, bone_len);\n#endif\n\n *_pcm_len = pcm_len;\n\n return 0;\n}\n\nint speech_rx_process(void *pcm_buf, int *pcm_len) {\n // Add your algorithm here\n return 0;\n}" }, { "path": "apps/audioplayers/bt_sco_chain_thirdparty_alango.c", "content": "#include \"audio_dump.h\"\n#include \"bt_sco_chain.h\"\n#include \"hal_trace.h\"\n#include \"speech_memory.h\"\n#include \"speech_utils.h\"\n#include \"spf-postapi.h\"\n#include \"vcp-api.h\"\n\n#define ALANGO_TRACE(s, ...) TRACE(1, \"%s: \" s, __FUNCTION__, ##__VA_ARGS__)\n\nshort *aec_echo_buf = NULL;\n\n// Use to free buffer\nstatic short *aec_echo_buf_ptr;\n\nstatic void *mem;\n\nextern void *voicebtpcm_get_ext_buff(int size);\n\nextern char *vcp_errorv(err_t err);\n\nextern PROFILE_TYPE(t) alango_profile;\n\nstatic vcp_profile_t *curr_profile = NULL;\n\nmem_reg_t reg[NUM_MEM_REGIONS];\n\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM >= 2\nstatic int16_t *deinterleaved_buf = NULL;\n\nstatic void deinterleave_audio(int16_t *dst, int16_t *src, uint32_t len,\n uint32_t ch_num) {\n uint32_t samples_per_channel = len / ch_num;\n\n for (uint32_t i = 0; i < samples_per_channel; i++) {\n for (uint32_t j = 0; j < ch_num; j++) {\n dst[samples_per_channel * j + i] = src[ch_num * i + j];\n }\n }\n}\n#endif\n\nint speech_init(int tx_sample_rate, int rx_sample_rate, int tx_frame_ms,\n int rx_frame_ms, int sco_frame_ms, uint8_t *buf, int len) {\n speech_heap_init(buf, len);\n\n int frame_len = SPEECH_FRAME_MS_TO_LEN(tx_sample_rate, tx_frame_ms);\n\n aec_echo_buf = (short *)speech_calloc(frame_len, sizeof(short));\n aec_echo_buf_ptr = aec_echo_buf;\n\n // init alango\n // check profile\n curr_profile = &alango_profile;\n err_t err = vcp_check_profile(curr_profile);\n if (err.err) {\n if (err.err == ERR_INVALID_CRC)\n ALANGO_TRACE(0, \"Profile error: Invalid CRC!\");\n else\n ALANGO_TRACE(1, \"Profile error: %d\", err.err);\n }\n\n ASSERT(frame_len % curr_profile->p_gen->frlen == 0,\n \"Profile error: frame_len(%d) should be divided by frlen(%d)\",\n frame_len, curr_profile->p_gen->frlen);\n\n unsigned int smem = vcp_get_hook_size();\n mem = speech_malloc(smem);\n\n vcp_get_mem_size(curr_profile, reg, mem);\n\n ALANGO_TRACE(0, \"Hello, I am VCP8!\");\n\n for (int i = 0; i < NUM_MEM_REGIONS; i++) {\n reg[i].mem = (void *)speech_malloc(reg[i].size);\n ALANGO_TRACE(2, \"I need %d bytes of memory in memory region %d to work.\\n\",\n reg[i].size, i + 1);\n }\n\n err = vcp_init_debug(curr_profile, reg);\n if (err.err == ERR_NOT_ENOUGH_MEMORY) {\n ALANGO_TRACE(2, \"%d more bytes needed in region %d!\\n\", -reg[err.pid].size,\n err.pid);\n } else if (err.err == ERR_UNKNOWN) {\n ALANGO_TRACE(0, \"vcp_init_debug() returns UNKNOWN error\\n!\");\n } else if (err.err != ERR_NO_ERROR) {\n ALANGO_TRACE(2, \"vcp_init_debug() returns error %d, pid %d!\\n\", err.err,\n err.pid);\n }\n\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM >= 2\n deinterleaved_buf =\n speech_malloc(curr_profile->p_gen->frlen *\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM * sizeof(int16_t));\n#endif\n\n audio_dump_init(frame_len, sizeof(int16_t), 3);\n\n return 0;\n}\n\nint speech_deinit(void) {\n speech_free(aec_echo_buf_ptr);\n speech_free(mem);\n\n for (int i = 0; i < NUM_MEM_REGIONS; i++)\n speech_free(reg[i].mem);\n\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM >= 2\n speech_free(deinterleaved_buf);\n#endif\n\n size_t total = 0, used = 0, max_used = 0;\n speech_memory_info(&total, &used, &max_used);\n TRACE(3, \"SPEECH MALLOC MEM: total - %d, used - %d, max_used - %d.\", total,\n used, max_used);\n ASSERT(used == 0, \"[%s] used != 0\", __func__);\n\n return 0;\n}\n\n#if defined(BONE_SENSOR_TDM)\nextern void bt_sco_get_tdm_buffer(uint8_t **buf, uint32_t *len);\n#endif\n\nint speech_tx_process(void *pcm_buf, void *ref_buf, int *pcm_len) {\n int16_t *pcm16_buf = (int16_t *)pcm_buf;\n int16_t *ref16_buf = (int16_t *)ref_buf;\n int pcm16_len = *pcm_len;\n\n#if defined(BONE_SENSOR_TDM)\n uint8_t *bone_buf = NULL;\n uint32_t bone_len = 0;\n bt_sco_get_tdm_buffer(&bone_buf, &bone_len);\n#endif\n\n audio_dump_clear_up();\n audio_dump_add_channel_data(0, ref_buf,\n pcm16_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM);\n audio_dump_add_channel_data_from_multi_channels(\n 1, pcm16_buf, pcm16_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM,\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM, 0);\n audio_dump_add_channel_data_from_multi_channels(\n 2, pcm16_buf, pcm16_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM,\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM, 1);\n\n#if defined(BONE_SENSOR_TDM)\n audio_dump_add_channel_data(3, bone_buf,\n pcm16_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM);\n#endif\n\n audio_dump_run();\n\n // Add your algrithm here and disable #if macro\n#if 0\n for (int i = 0, j = 0; i < pcm16_len; i += SPEECH_CODEC_CAPTURE_CHANNEL_NUM, j++) {\n // choose main microphone data\n pcm16_buf[j] = pcm16_buf[i];\n // choose reference data, i.e. loopback\n //pcm16_buf[j] = ref16_buf[j];\n }\n pcm16_len /= SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n#else\n for (int i = 0, j = 0; i < pcm16_len;\n i += curr_profile->p_gen->frlen * SPEECH_CODEC_CAPTURE_CHANNEL_NUM,\n j += curr_profile->p_gen->frlen) {\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM >= 2\n deinterleave_audio(deinterleaved_buf, &pcm16_buf[i],\n curr_profile->p_gen->frlen *\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM,\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM);\n err_t err =\n vcp_process_tx(reg, deinterleaved_buf, &ref16_buf[j], &pcm16_buf[j]);\n // memcpy(&pcm16_buf[j], deinterleaved_buf, curr_profile->p_gen->frlen *\n // sizeof(int16_t));\n#else\n err_t err =\n vcp_process_tx(reg, &pcm16_buf[i], &ref16_buf[j], &pcm16_buf[j]);\n#endif\n if (err.err != ERR_NO_ERROR) {\n ALANGO_TRACE(1, \"vcp_process_tx error: %d\", err.err);\n }\n }\n pcm16_len /= SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n memcpy(pcm_buf, bone_buf, bone_len);\n#endif\n\n *pcm_len = pcm16_len;\n\n return 0;\n}\n\nint speech_rx_process(void *pcm_buf, int *pcm_len) {\n int16_t *pcm16_buf = (int16_t *)pcm_buf;\n int pcm16_len = *pcm_len;\n\n for (int i = 0; i < pcm16_len; i += curr_profile->p_gen->frlen) {\n err_t err = vcp_process_rx(reg, &pcm16_buf[i], &pcm16_buf[i]);\n if (err.err != ERR_NO_ERROR) {\n ALANGO_TRACE(1, \"vcp_process_tx error: %d\", err.err);\n }\n }\n\n return 0;\n}" }, { "path": "apps/audioplayers/bt_sco_chain_tuning.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"aud_section.h\"\n#include \"bt_sco_chain_cfg.h\"\n#include \"hal_trace.h\"\n\nstatic bool speech_tuning_status = false;\n\nextern int speech_store_config(const SpeechConfig *cfg);\n\n#ifdef AUDIO_SECTION_ENABLE\ntypedef struct {\n uint8_t reserved[AUDIO_SECTION_CFG_RESERVED_LEN];\n SpeechConfig cfg;\n} AUDIO_SECTION_SPEECH_CFG_T;\n\nstatic AUDIO_SECTION_SPEECH_CFG_T audio_section_speech_cfg;\n\nint store_speech_cfg_into_audio_section(SpeechConfig *cfg) {\n int res = 0;\n\n memcpy(&audio_section_speech_cfg.cfg, cfg, sizeof(SpeechConfig));\n\n res = audio_section_store_cfg(AUDIO_SECTION_DEVICE_SPEECH,\n (uint8_t *)&audio_section_speech_cfg,\n sizeof(AUDIO_SECTION_SPEECH_CFG_T));\n\n if (res) {\n TRACE(2, \"[%s] ERROR: res = %d\", __func__, res);\n } else {\n TRACE(1, \"[%s] Store speech cfg into audio section!!!\", __func__);\n }\n\n return res;\n}\n\nvoid *load_speech_cfg_from_audio_section(void) {\n int res = 0;\n res = audio_section_load_cfg(AUDIO_SECTION_DEVICE_SPEECH,\n (uint8_t *)&audio_section_speech_cfg,\n sizeof(AUDIO_SECTION_SPEECH_CFG_T));\n\n void *res_ptr = NULL;\n\n if (res) {\n TRACE(2, \"[%s] ERROR: res = %d\", __func__, res);\n res_ptr = NULL;\n } else {\n TRACE(1, \"[%s] Load speech cfg from audio section!!!\", __func__);\n res_ptr = (void *)&audio_section_speech_cfg.cfg;\n }\n\n return res_ptr;\n}\n#endif\n\nint speech_tuning_set_status(bool en) {\n speech_tuning_status = en;\n\n return 0;\n}\n\nbool speech_tuning_get_status(void) { return speech_tuning_status; }\n\nuint32_t speech_tuning_check(unsigned char *buf, uint32_t len) {\n uint32_t res = 0;\n\n // Check valid\n uint32_t config_size = sizeof(SpeechConfig);\n\n if (config_size != len) {\n TRACE(2, \"[speech tuning] len(%d) != config_size(%d)\", len, config_size);\n res = 1;\n } else {\n TRACE(1, \"[speech tuning] len(%d) is OK\", len);\n // SpeechConfig POSSIBLY_UNUSED *cfg = (SpeechConfig *)buf;\n\n // Test parameters\n //#if defined(SPEECH_TX_2MIC_NS2)\n // TRACE(1,\"[speech tuning] TX: delay_taps(x100): %d\",\n // (int)(cfg->tx_2mic_ns2.delay_taps * 100));\n //#endif\n //#if defined(SPEECH_TX_NOISE_GATE)\n // TRACE(1,\"[speech tuning] TX: data_threshold: %d\",\n // cfg->tx_noise_gate.data_threshold);\n //#endif\n //#if defined(SPEECH_TX_EQ)\n // TRACE(1,\"[speech tuning] TX: eq num: %d\", cfg->tx_eq.num);\n //#endif\n //#if defined(SPEECH_RX_EQ)\n // TRACE(1,\"[speech tuning] RX: eq num: %d\", cfg->rx_eq.num);\n //#endif\n }\n\n return res;\n}\n\nuint32_t speech_tuning_rx_callback(unsigned char *buf, uint32_t len) {\n uint32_t res = 0;\n\n res = speech_tuning_check(buf, len);\n\n if (res) {\n TRACE(1, \"[speech tuning] ERROR: Send check res = %d\", res);\n TRACE(0, \"[Speech Tuning] res : 1; info : Send len(%d) != config_size(%d);\",\n len, sizeof(SpeechConfig));\n } else {\n // Save cfg\n speech_store_config((SpeechConfig *)buf);\n\n // Set status\n speech_tuning_set_status(true);\n\n TRACE(0, \"[speech tuning] OK: Send cfg\");\n TRACE(0, \"[Speech Tuning] res : 0;\");\n }\n\n return res;\n}\n\n#ifdef AUDIO_SECTION_ENABLE\nuint32_t speech_tuning_burn_rx_callback(unsigned char *buf, uint32_t len) {\n uint32_t res = 0;\n\n res = speech_tuning_check(buf, len);\n\n if (res) {\n TRACE(1, \"[speech tuning] ERROR: Burn check res = %d\", res);\n TRACE(0, \"[Speech Tuning] res : 1; info : Burn len(%d) != config_size(%d);\",\n len, sizeof(SpeechConfig));\n } else {\n res = store_speech_cfg_into_audio_section((SpeechConfig *)buf);\n\n if (res) {\n TRACE(1, \"[speech tuning] ERROR: Store res = %d\", res);\n res += 100;\n TRACE(0, \"[Speech Tuning] res : 2; info : Do not enable \"\n \"AUDIO_SECTION_ENABLE;\");\n } else {\n TRACE(0, \"[speech tuning] OK: Store cfg\");\n TRACE(0, \"[Speech Tuning] res : 0;\");\n }\n }\n\n return res;\n}\n#endif\n\nint speech_tuning_init(void) {\n#if defined(HAL_TRACE_RX_ENABLE) && !defined(SPEECH_TX_THIRDPARTY)\n hal_trace_rx_register(\"Speech Tuning\",\n (HAL_TRACE_RX_CALLBACK_T)speech_tuning_rx_callback);\n\n#ifdef AUDIO_SECTION_ENABLE\n hal_trace_rx_register(\n \"Speech Tuning Burn\",\n (HAL_TRACE_RX_CALLBACK_T)speech_tuning_burn_rx_callback);\n#endif\n\n#endif\n\n speech_tuning_set_status(false);\n\n return 0;\n}\n\nint speech_tuning_open(void) {\n#ifdef AUDIO_SECTION_ENABLE\n SpeechConfig *speech_cfg_load = NULL;\n\n speech_cfg_load = (SpeechConfig *)load_speech_cfg_from_audio_section();\n\n if (speech_cfg_load) {\n speech_store_config(speech_cfg_load);\n }\n#endif\n\n speech_tuning_set_status(false);\n\n return 0;\n}\n\nint speech_tuning_close(void) {\n speech_tuning_set_status(false);\n\n return 0;\n}\n" }, { "path": "apps/audioplayers/bt_sco_chain_tuning.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_SCO_CHAIN_TUNING_H__\n#define __BT_SCO_CHAIN_TUNING_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// Initialize this module when platform setup\nint speech_tuning_init(void);\n\n// Open this module when speech stream open\nint speech_tuning_open(void);\n\n// Close this module when speech stream close\nint speech_tuning_close(void);\n\nbool speech_tuning_get_status(void);\nint speech_tuning_set_status(bool en);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif" }, { "path": "apps/audioplayers/cvsdplay.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef MBED\n#include \"mbed.h\"\n#endif\n// Standard C Included Files\n#include \n#include \n#include \n#include \n#include \n#ifdef MBED\n//#include \"rtos.h\"\n#endif\n#ifdef MBED\n#include \"SDFileSystem.h\"\n#endif\n#include \"app_audio.h\"\n#include \"cqueue.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n\n// BT\n\n#if 0\n/* mutex */\nosMutexId g_voicecvsd_queue_mutex_id = NULL;\nosMutexDef(g_voicecvsd_queue_mutex);\n\n/* cvsd queue */\n#define VOICECVSD_TEMP_BUFFER_SIZE 128\n#define VOICECVSD_QUEUE_SIZE (VOICECVSD_TEMP_BUFFER_SIZE * 20)\nCQueue voicecvsd_queue;\n\nstatic enum APP_AUDIO_CACHE_T voicecvsd_cache_status = APP_AUDIO_CACHE_QTY;\n\n#define LOCK_VOICECVSD_QUEUE() \\\n osMutexWait(g_voicecvsd_queue_mutex_id, osWaitForever)\n\n#define UNLOCK_VOICECVSD_QUEUE() osMutexRelease(g_voicecvsd_queue_mutex_id)\n\nvoid xLOCK_VOICECVSD_QUEUE(void)\n{\n osMutexWait(g_voicecvsd_queue_mutex_id, osWaitForever);\n}\n\nvoid xUNLOCK_VOICECVSD_QUEUE(void)\n{\n osMutexRelease(g_voicecvsd_queue_mutex_id);\n}\n\n//static void dump_buffer_to_psram(char *buf, unsigned int len)\n//{\n// static unsigned int offset = 0;\n// memcpy((void *)(0x1c000000 + offset), buf, len);\n//}\n\nstatic void copy_one_trace_to_two_track_16bits(uint16_t *src_buf, uint16_t *dst_buf, uint32_t src_len)\n{\n uint32_t i = 0;\n for (i = 0; i < src_len; ++i) {\n dst_buf[i*2 + 0] = dst_buf[i*2 + 1] = src_buf[i];\n }\n}\n\nint store_voicecvsd_buffer(unsigned char *buf, unsigned int len)\n{\n LOCK_VOICECVSD_QUEUE();\n EnCQueue(&voicecvsd_queue, buf, len);\n#if 0\n dump_buffer_to_psram((char *)buf, len);\n TRACE(1,\"%d\\n\", LengthOfCQueue(&voicecvsd_queue));\n#endif\n if (LengthOfCQueue(&voicecvsd_queue) > VOICECVSD_TEMP_BUFFER_SIZE*10) {\n voicecvsd_cache_status = APP_AUDIO_CACHE_OK;\n }\n UNLOCK_VOICECVSD_QUEUE();\n\n return 0;\n}\n\nint store_voice_pcm2cvsd(unsigned char *buf, unsigned int len)\n{\n uint8_t cvsdtmpbuffer[VOICECVSD_TEMP_BUFFER_SIZE];\n\n short * pBuffProcessed = (short *)buf;\n uint32_t processed_len = 0;\n uint32_t remain_len = 0;\n\n len >>= 1;\n\n LOCK_VOICECVSD_QUEUE();\n while(processed_len < len){\n remain_len = len-processed_len;\n if (remain_len>VOICECVSD_TEMP_BUFFER_SIZE){\n Pcm8kToCvsd(pBuffProcessed + processed_len, cvsdtmpbuffer, VOICECVSD_TEMP_BUFFER_SIZE);\n EnCQueue(&voicecvsd_queue, cvsdtmpbuffer, VOICECVSD_TEMP_BUFFER_SIZE);\n processed_len += VOICECVSD_TEMP_BUFFER_SIZE;\n }else{\n Pcm8kToCvsd(pBuffProcessed + processed_len, cvsdtmpbuffer, remain_len);\n EnCQueue(&voicecvsd_queue, cvsdtmpbuffer, remain_len);\n processed_len += remain_len;\n }\n }\n UNLOCK_VOICECVSD_QUEUE();\n\n#if 0\n dump_buffer_to_psram((char *)buf, len);\n TRACE(1,\"%d\\n\", LengthOfCQueue(&voicecvsd_queue));\n#endif\n if (LengthOfCQueue(&voicecvsd_queue) > VOICECVSD_TEMP_BUFFER_SIZE*10) {\n voicecvsd_cache_status = APP_AUDIO_CACHE_OK;\n }\n\n return 0;\n}\n\nint get_voicecvsd_buffer_size(void)\n{\n int n;\n LOCK_VOICECVSD_QUEUE();\n n = LengthOfCQueue(&voicecvsd_queue);\n UNLOCK_VOICECVSD_QUEUE();\n return n;\n}\n\nstatic short tmp_decode_buf[VOICECVSD_TEMP_BUFFER_SIZE*2];\nint decode_cvsd_frame(unsigned char *pcm_buffer, unsigned int pcm_len)\n{\n uint32_t r = 0, decode_len = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n\n while (decode_len < pcm_len) {\nget_again:\n LOCK_VOICECVSD_QUEUE();\n len1 = len2 = 0;\n r = PeekCQueue(&voicecvsd_queue, VOICECVSD_TEMP_BUFFER_SIZE, &e1, &len1, &e2, &len2);\n UNLOCK_VOICECVSD_QUEUE();\n\n if(r == CQ_ERR || len1 == 0) {\n //return 0;\n Thread::wait(4);\n goto get_again;\n }\n\n if (len1 != 0) {\n //CvsdToPcm8k(e1, (short *)(pcm_buffer + decode_len*4), len1, 0);\n CvsdToPcm8k(e1, (short *)(tmp_decode_buf), len1, 0);\n copy_one_trace_to_two_track_16bits((uint16_t *)tmp_decode_buf, (uint16_t *)(pcm_buffer + decode_len), len1);\n\n LOCK_VOICECVSD_QUEUE();\n DeCQueue(&voicecvsd_queue, 0, len1);\n UNLOCK_VOICECVSD_QUEUE();\n\n decode_len += len1*4;\n }\n\n if (len2 != 0) {\n //CvsdToPcm8k(e2, (short *)(pcm_buffer + decode_len*4), len2, 0);\n CvsdToPcm8k(e2, (short *)(tmp_decode_buf), len2, 0);\n copy_one_trace_to_two_track_16bits((uint16_t *)tmp_decode_buf, (uint16_t *)(pcm_buffer + decode_len), len2);\n\n LOCK_VOICECVSD_QUEUE();\n DeCQueue(&voicecvsd_queue, 0, len2);\n UNLOCK_VOICECVSD_QUEUE();\n\n decode_len += len2*4;\n }\n }\n\n return 0;\n}\n\nuint32_t decode_cvsd_frame_noblock(uint8_t *pcm_buffer, uint32_t pcm_len)\n{\n unsigned int len[2];\n uint8_t *e[2];\n uint32_t decode_len = 0;\n\n LOCK_VOICECVSD_QUEUE();\n while (decode_len < pcm_len)\n {\n len[0] = len[1] = 0;\n e[0] = e[1] = NULL;\n\n if(PeekCQueue(&voicecvsd_queue, VOICECVSD_TEMP_BUFFER_SIZE, &e[0], &len[0], &e[1], &len[1]) == CQ_OK)\n {\n for(uint8_t i=0; i<2; i++)\n {\n if (len[i] != 0)\n {\n CvsdToPcm8k(e[i], (short *)(tmp_decode_buf), len[i], 0);\n\n copy_one_trace_to_two_track_16bits((uint16_t *)tmp_decode_buf, (uint16_t *)(pcm_buffer + decode_len), len[i]);\n\n DeCQueue(&voicecvsd_queue, 0, len[i]);\n\n decode_len += len[i]*4;\n }\n }\n }\n else\n {\n break;\n }\n }\n UNLOCK_VOICECVSD_QUEUE();\n return decode_len;\n}\n\nuint32_t voicecvsd_audio_more_data(uint8_t *buf, uint32_t len)\n{\n uint32_t l = 0;\n uint32_t cur_ticks = 0, ticks = 0;\n\n if (voicecvsd_cache_status == APP_AUDIO_CACHE_CACHEING)\n return 0;\n\n TRACE(2,\"%s enter reamin:%d\", __func__, LengthOfCQueue(&voicecvsd_queue));\n\n ticks = hal_sys_timer_get();\n l = decode_cvsd_frame_noblock(buf, len);\n cur_ticks = hal_sys_timer_get();\n TRACE(3,\"%s exit reamin:%d spend:%d\\n\", __func__, LengthOfCQueue(&voicecvsd_queue) ,TICKS_TO_MS(cur_ticks-ticks));\n\n return l;\n}\n\nint voicecvsd_audio_init(void)\n{\n uint8_t *buff = NULL;\n\n app_audio_mempool_get_buff(&buff, VOICECVSD_QUEUE_SIZE);\n memset(buff, 0, VOICECVSD_QUEUE_SIZE);\n\n /* voicebtpcm_pcm queue*/\n APP_AUDIO_InitCQueue(&voicecvsd_queue, VOICECVSD_QUEUE_SIZE, buff);\n\n Pcm8k_CvsdInit();\n if (g_voicecvsd_queue_mutex_id == NULL)\n {\n g_voicecvsd_queue_mutex_id = osMutexCreate((osMutex(g_voicecvsd_queue_mutex)));\n }\n\n\tvoicecvsd_cache_status = APP_AUDIO_CACHE_CACHEING;\n}\n#endif\n" }, { "path": "apps/audioplayers/digmici2splay.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"cqueue.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \n#include \n#include \n#include \n#include \n\nuint8_t digmic_buf[100 * 1024];\nuint32_t digmic_buf_len = 0;\n\nuint32_t dig_mic_audio_more_data(uint8_t *buf, uint32_t len) {\n TRACE(2, \"%s:%d\\n\", __func__, __LINE__);\n memcpy(buf, digmic_buf, len);\n\n return len;\n}\nuint32_t dig_mic_audio_data_come(uint8_t *buf, uint32_t len) {\n TRACE(2, \"%s:%d\\n\", __func__, __LINE__);\n\n memcpy(digmic_buf + digmic_buf_len, buf, len);\n\n#if 1\n digmic_buf_len = (digmic_buf_len + len) % (100 * 1024);\n#endif\n return len;\n}\n" }, { "path": "apps/audioplayers/flacplay.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"cqueue.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \n#include \n#include \n#include \n#include \n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n\n/* mutex */\nosMutexId g_flac_queue_mutex_id;\nosMutexDef(g_flac_queue_mutex);\n\n/* flac queue */\n#define FLAC_TEMP_BUFFER_SIZE 2048\n#define FLAC_QUEUE_SIZE (FLAC_TEMP_BUFFER_SIZE * 4)\nunsigned char flac_queue_buf[FLAC_QUEUE_SIZE];\nCQueue flac_queue;\nstatic uint32_t ok_to_decode = 0;\n\n#define LOCK_FLAC_QUEUE() osMutexWait(g_flac_queue_mutex_id, osWaitForever)\n\n#define UNLOCK_FLAC_QUEUE() osMutexRelease(g_flac_queue_mutex_id)\n\nstatic void copy_one_trace_to_two_track_16bits(uint16_t *src_buf,\n uint16_t *dst_buf,\n uint32_t src_len) {\n uint32_t i = 0;\n for (i = 0; i < src_len; ++i) {\n dst_buf[i * 2 + 0] = dst_buf[i * 2 + 1] = src_buf[i];\n }\n}\n\nint store_flac_buffer(unsigned char *buf, unsigned int len) {\n LOCK_FLAC_QUEUE();\n EnCQueue(&flac_queue, buf, len);\n if (LengthOfCQueue(&flac_queue) > FLAC_TEMP_BUFFER_SIZE * 2) {\n ok_to_decode = 1;\n }\n UNLOCK_FLAC_QUEUE();\n\n return 0;\n}\n\nint decode_flac_frame(unsigned char *pcm_buffer, unsigned int pcm_len) {\n uint32_t r = 0, got_len = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\nget_again:\n LOCK_FLAC_QUEUE();\n r = PeekCQueue(&flac_queue, (pcm_len - got_len) / 2, &e1, &len1, &e2, &len2);\n UNLOCK_FLAC_QUEUE();\n\n if (r == CQ_ERR || len1 == 0) {\n osDelay(2);\n goto get_again;\n }\n\n // memcpy(pcm_buffer + got_len, e1, len1);\n copy_one_trace_to_two_track_16bits(\n (uint16_t *)e1, (uint16_t *)(pcm_buffer + got_len), len1 / 2);\n\n LOCK_FLAC_QUEUE();\n DeCQueue(&flac_queue, 0, len1);\n UNLOCK_FLAC_QUEUE();\n\n got_len += len1 * 2;\n\n if (len2 != 0) {\n // memcpy(pcm_buffer + got_len, e2, len2);\n copy_one_trace_to_two_track_16bits(\n (uint16_t *)e2, (uint16_t *)(pcm_buffer + got_len), len2 / 2);\n\n LOCK_FLAC_QUEUE();\n DeCQueue(&flac_queue, 0, len2);\n UNLOCK_FLAC_QUEUE();\n }\n\n got_len += len2 * 2;\n\n if (got_len < pcm_len)\n goto get_again;\n\n return pcm_len;\n}\n\nuint32_t flac_audio_data_come(uint8_t *buf, uint32_t len) {\n TRACE(1, \"data come %d\\n\", len);\n\n return 0;\n}\n\nuint32_t flac_audio_more_data(uint8_t *buf, uint32_t len) {\n uint32_t l = 0;\n // uint32_t cur_ticks = 0, ticks = 0;\n\n if (ok_to_decode == 0)\n return 0;\n\n // ticks = hal_sys_timer_get();\n l = decode_flac_frame(buf, len);\n // cur_ticks = hal_sys_timer_get();\n // TRACE(1,\"flac %d t\\n\", (cur_ticks-ticks));\n\n return l;\n}\n\nint flac_audio_init(void) {\n g_flac_queue_mutex_id = osMutexCreate((osMutex(g_flac_queue_mutex)));\n /* flac queue*/\n InitCQueue(&flac_queue, FLAC_QUEUE_SIZE, (unsigned char *)&flac_queue_buf);\n\n return 0;\n}\n" }, { "path": "apps/audioplayers/fmradio.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef CHIP_BEST1000\n\n#include \"app_audio.h\"\n#include \"app_overlay.h\"\n#include \"app_utils.h\"\n#include \"audiobuffer.h\"\n#include \"audioflinger.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"fmdec.h\"\n#include \"hal_analogif.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_dma.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"string.h\"\n\n// #define FM_DEBUG 1\n\n#define FM_DIGITAL_REG(a) *(volatile uint32_t *)(a)\n#define fm_read_rf_reg(reg, val) hal_analogif_reg_read(reg, val)\n#define fm_write_rf_reg(reg, val) hal_analogif_reg_write(reg, val)\n\n#define FM_FRAME_NUM 4\n#define FM_SAMPLE_NUM NUMOFSAMPLE\n\n#ifdef ATAN2_HARDWARE\n#ifdef FM_NEWMODE\n#define FM_SAMPLE_BUFFER_SIZE (FM_FRAME_NUM * FM_SAMPLE_NUM * 4)\n#else\n#define FM_SAMPLE_BUFFER_SIZE (FM_FRAME_NUM * FM_SAMPLE_NUM / 2 * 4)\n#endif\n#else\n#define FM_SAMPLE_BUFFER_SIZE (FM_FRAME_NUM * FM_SAMPLE_NUM * 4)\n#endif\n#define FM_AUDIO_BUFFER_SIZE (4096)\n\nextern int app_bt_stream_local_volume_get(void);\nstatic int32_t *fm_sample_buffer_p;\n\nstatic void fm_handler(uint8_t chan, uint32_t remains, uint32_t error,\n struct HAL_DMA_DESC_T *lli) {\n static int cnt = 0;\n int16_t fm_decbuf[(FM_SAMPLE_NUM / 9)];\n FmDemodulate(\n (int16_t *)(fm_sample_buffer_p + ((cnt % FM_FRAME_NUM) * FM_SAMPLE_NUM)),\n fm_decbuf, FM_SAMPLE_NUM);\n cnt++;\n app_audio_pcmbuff_put((uint8_t *)fm_decbuf, (FM_SAMPLE_NUM / 9) << 1);\n FmDemodulate(\n (int16_t *)(fm_sample_buffer_p + ((cnt % FM_FRAME_NUM) * FM_SAMPLE_NUM)),\n fm_decbuf, FM_SAMPLE_NUM);\n cnt++;\n app_audio_pcmbuff_put((uint8_t *)fm_decbuf, (FM_SAMPLE_NUM / 9) << 1);\n\n#ifdef FM_DEBUG\n {\n static uint32_t preTicks;\n uint32_t diff_ticks = 0;\n uint32_t cur_ticks;\n\n cur_ticks = hal_sys_timer_get();\n if (!preTicks) {\n preTicks = cur_ticks;\n } else {\n diff_ticks = TICKS_TO_MS(cur_ticks - preTicks);\n preTicks = cur_ticks;\n }\n TRACE(3, \"[fm_handler] diff=%d add:%d remain:%d input\", diff_ticks,\n (FM_SAMPLE_NUM / 9) << 1, app_audio_pcmbuff_length());\n }\n#endif\n}\n\nuint32_t fm_pcm_more_data(uint8_t *buf, uint32_t len) {\n app_audio_pcmbuff_get(buf, len);\n#ifdef FM_DEBUG\n {\n static uint32_t preTicks;\n uint32_t diff_ticks = 0;\n uint32_t cur_ticks = hal_sys_timer_get();\n if (!preTicks) {\n preTicks = cur_ticks;\n } else {\n diff_ticks = TICKS_TO_MS(cur_ticks - preTicks);\n preTicks = cur_ticks;\n }\n\n TRACE(\n 5,\n \"[fm_pcm_more_data] diff=%d get:%d remain:%d output isr:0x%08x cnt:%d\",\n diff_ticks, len / 2, app_audio_pcmbuff_length(),\n FM_DIGITAL_REG(0x40160020), FM_DIGITAL_REG(0x40160028));\n }\n#endif\n return 0;\n}\n\nuint32_t fm_capture_more_data(uint8_t *buf, uint32_t len) {\n fm_handler(0, 0, 0, NULL);\n return len;\n}\n\nvoid fm_radio_digit_init(void) {\n FM_DIGITAL_REG(0xd0350244) = (FM_DIGITAL_REG(0xd0350244) & ~0x01fff) |\n 0x20f; //-890k -> 0 if_shift, for 110.5292m adc\n\n // FM_DIGITAL_REG(0x40180e0c) = 0x34;\n // FM_DIGITAL_REG(0x4000a050) = (FM_DIGITAL_REG(0x4000a050) & ~0x18000) |\n // 0x18000;\n\n#ifdef ATAN2_HARDWARE\n\n FM_DIGITAL_REG(0xd0330038) |= (1 << 11);\n FM_DIGITAL_REG(0xd0330038) |= (1 << 17);\n FM_DIGITAL_REG(0xd0350248) = 0x80c00000;\n // FM_DIGITAL_REG(0x40160030) = 1;\n // FM_DIGITAL_REG(0x40160000) = 0x21;\n\n#else\n\n FM_DIGITAL_REG(0xd0330038) |= (1 << 11);\n FM_DIGITAL_REG(0xd0350248) = 0x80c00000;\n // FM_DIGITAL_REG(0x40160030) = 1;\n // FM_DIGITAL_REG(0x40160000) = 1;\n\n#endif\n\n#ifdef SINGLECHANLE\n // 0x4000a010 bit2 д0 ��channel dac\n FM_DIGITAL_REG(0x4000a010) = (1 << 5) | (1 << 4);\n#else\n\n FM_DIGITAL_REG(0x4000a010) = (1 << 5) | (1 << 2) | (1 << 4);\n#endif\n\n FM_DIGITAL_REG(0x4000a020) = ~0UL;\n FM_DIGITAL_REG(0x4000a02c) = 4;\n FM_DIGITAL_REG(0x4000a030) = 4;\n\n FM_DIGITAL_REG(0x4000a034) = (1 << 2) | (1 << 1) | (1 << 0);\n\n // Start DAC\n // FM_DIGITAL_REG(0x4000a010) |= (1 << 1);\n\n#if 0\n//52M\n FM_DIGITAL_REG(0x40000060) |= (1 << 21);\n\n\n FM_DIGITAL_REG(0x40000060) |= (1 << 24);\n FM_DIGITAL_REG(0x40000060) |= (1 << 27);\n FM_DIGITAL_REG(0x40000060) =(FM_DIGITAL_REG(0x40000060) & ~ (1 << 20));\n\n\n\n\n\n\n\n\n FM_DIGITAL_REG(0x40000060) |= (1 << 29);\n// FM_DIGITAL_REG(0x40000060) |= (1 << 27);\n FM_DIGITAL_REG(0x40000064) = (FM_DIGITAL_REG(0x40000064) & ~0xFF) | 0x7A | (1 << 10) | (1<<30);\n#endif\n\n FM_DIGITAL_REG(0x4000a040) = 0xc0810000;\n FM_DIGITAL_REG(0x4000a044) = 0x08040c04;\n FM_DIGITAL_REG(0x4000a048) = 0x0e01f268;\n FM_DIGITAL_REG(0x4000a04c) = 0x00005100;\n // FM_DIGITAL_REG(0x40010010) = 0;\n // FM_DIGITAL_REG(0x40010014) = 0x03a80005;\n // FM_DIGITAL_REG(0x40010018) = 0x00200019;\n FM_DIGITAL_REG(0x4000a050) = 0x24200000; // for adc_div_3_6 bypass\n FM_DIGITAL_REG(0x4000a050) = (FM_DIGITAL_REG(0x4000a050) & ~0x780) |\n 0x380; // for channel 1 adc volume, bit10~7\n FM_DIGITAL_REG(0x4000a050) = (FM_DIGITAL_REG(0x4000a050) & ~0x18000) |\n 0x18000; // for dual channel adc/dac\n\n#ifdef SINGLECHANLE\n // 0x4000a050 bit16 д0 ��channel dac for codec\n FM_DIGITAL_REG(0x4000a050) = (FM_DIGITAL_REG(0x4000a050) & ~(1 << 16));\n#endif\n\n FM_DIGITAL_REG(0x4000a048) = (FM_DIGITAL_REG(0x4000a048) & ~0x00000f00) |\n 0x40000900; // set for sdm gain\n FM_DIGITAL_REG(0x4000a044) = (FM_DIGITAL_REG(0x4000a044) & ~0x60000000) |\n 0x60000000; // for adc en, and dac en\n\n // Start DAC\n FM_DIGITAL_REG(0x4000a010) |= (1 << 1);\n\n // Delay 2 ms\n // for (volatile int kk = 0; kk < 1000/64; kk++);\n osDelay(2);\n\n // hal_sys_timer_delay(MS_TO_TICKS(2));\n // Start ADC\n // FM_DIGITAL_REG(0x4000a010) |= (1 << 0);\n\n#ifdef ATAN2_HARDWARE\n\n#ifdef FM_NEWMODE\n FM_DIGITAL_REG(0x40160030) = 1;\n FM_DIGITAL_REG(0x40160000) = 0x1;\n\n#else\n FM_DIGITAL_REG(0x40160030) = 1;\n FM_DIGITAL_REG(0x40160000) = 0x21;\n#endif\n\n#else\n // start FM\n FM_DIGITAL_REG(0x40160030) = 1;\n FM_DIGITAL_REG(0x40160000) = 1;\n\n#endif\n}\n\nint fm_radio_analog_init(void) {\n int ret;\n\n /*\n\n // fm initial\n rfspi_wvalue( 8'h2c , 16'b0111_0000_0101_1100 ) ; // dig_vtoi_en\n rfspi_wvalue( 8'h01 , 16'b1010_1101_1111_1111 ) ; // power on fm lna\n rfspi_wvalue( 8'h02 , 16'b1000_0000_1001_0100 ) ; // reg_fm_lna_pu_mixersw\n\n rfspi_wvalue( 8'h1a , 16'b0101_0000_1011_0000 ) ; //\n reg_bt_vco_fm_buff_vctrl_dr=1\n\n rfspi_wvalue( 8'h18 , 16'b0000_0110_1000_0000 ) ; // power on vco\n\n rfspi_wvalue( 8'h19 , 16'b0110_0100_0100_0000 ) ; // reg_bt_vco_fm_buff_vctrl\n rfspi_wvalue( 8'h1d , 16'b0111_1000_1010_0100 ) ; // reg_bt_rfpll_pu_dr\n rfspi_wvalue( 8'h1c , 16'b0000_0000_1100_1000 ) ; // reg_bt_vco_fm_lo_en\n reg_bt_vco_fm_div_ctrl=8\n\n rfspi_wvalue( 8'h0a , 16'b0001_0010_0010_1111 ) ; // reg_btfm_flt_fm_en\n\n rfspi_wvalue( 8'h2d , 16'b0000_0111_1000_0010 ) ; // bb ldo on\n reg_bb_ldo_pu_vddr15a_dr rfspi_wvalue( 8'h07 , 16'b0000_0010_1011_1001 ) ; //\n reg_btfm_flt_pu_dr\n\n rfspi_wvalue( 8'h2a , 16'b0001_0110_1100_0000 ) ; // reg_bt_rfpll_sdm_freq_dr\n rfspi_wvalue( 8'h26 , 16'b0000_0000_0000_0000 ) ; // vco freq[31:16] ( 2400 +\n x )*2^25/26MHZ*N (2400+x= frf) rfspi_wvalue( 8'h25 , 16'b0000_0000_0000_0000 )\n ; // vco freq[15:00] fm_freq = frf/(4*reg_bt_vco_fm_div_ctrl) rfspi_wvalue(\n 8'h17 , 16'b1000_0000_0000_0000 ) ; // reg_bt_vco_calen\n\n */\n\n fm_write_rf_reg(0x2c, 0b0111000001011100); // dig_vtoi_en\n fm_write_rf_reg(0x01, 0b1010110111111111); // power on fm lna\n fm_write_rf_reg(0x02, 0b1000000010010100); // reg_fm_lna_pu_mixersw\n\n fm_write_rf_reg(0x1a, 0b0101000010110000); // reg_bt_vco_fm_buff_vctrl_dr=1\n\n fm_write_rf_reg(0x18, 0b0000011010000000); // power on vco\n\n fm_write_rf_reg(0x19, 0b0110010001000000); // reg_bt_vco_fm_buff_vctrl\n fm_write_rf_reg(0x1d, 0b0111100010100100); // reg_bt_rfpll_pu_dr\n fm_write_rf_reg(\n 0x1c, 0b0000000011001000); // reg_bt_vco_fm_lo_en reg_bt_vco_fm_div_ctrl=8\n\n fm_write_rf_reg(0x0a, 0b0001001000101111); // reg_btfm_flt_fm_en\n\n fm_write_rf_reg(0x2d,\n 0b0000011110000010); // bb ldo on reg_bb_ldo_pu_vddr15a_dr\n fm_write_rf_reg(0x07, 0b0000001010111001); // reg_btfm_flt_pu_dr\n\n fm_write_rf_reg(0x2a, 0b0001011011000000); // reg_bt_rfpll_sdm_freq_dr\n fm_write_rf_reg(0x26, 0b0000000000000000); // vco freq[31:16] ( 2400 + x\n // )*2^25/26MHZ*N (2400+x= frf)\n fm_write_rf_reg(0x25, 0b0000000000000000); // vco freq[15:00] fm_freq =\n // frf/(4*reg_bt_vco_fm_div_ctrl)\n fm_write_rf_reg(0x17, 0b1000000000000000); // reg_bt_vco_calen\n\n // adcҲҪ���Ļ�����Ҫ�� cmu\n // 0x40000060[29] = 1 ����ȶ���д������ѱ��bit����ˡ�\n\n // ��Ҫ���õ�spi�Ĵ�����ana interface:\n\n // 0x05 = 0xFCB1 // Audio Pll\n // 0x06 = 0x881C\n // 0x31 = 0x0100 // audio_freq_en\n // 0x37 = 0x1000 // codec_bbpll1_fm_adc_clk_en\n // 0x31 = 0x0130 // codec_tx_en_ldac codec_tx_en_rdac\n\n ret = fm_write_rf_reg(0x05, 0xfcb1);\n if (ret) {\n return ret;\n }\n ret = fm_write_rf_reg(0x06, 0x881c);\n if (ret) {\n return ret;\n }\n\n ret = fm_write_rf_reg(0x3a, 0xe644);\n if (ret) {\n return ret;\n }\n ret = fm_write_rf_reg(0x31, 0x0100);\n if (ret) {\n return ret;\n }\n ret = fm_write_rf_reg(0x37, 0x1000);\n if (ret) {\n return ret;\n }\n ret = fm_write_rf_reg(0x31, 0x01f0);\n if (ret) {\n return ret;\n }\n\n // delay 32ms\n osDelay(32);\n\n ret = fm_write_rf_reg(0x31, 0x0130);\n if (ret) {\n return ret;\n }\n\n //[FM_RX]\n fm_write_rf_reg(0x01, 0x91ff); // pu fm\n fm_write_rf_reg(0x2d, 0x07fa); // ldo on\n fm_write_rf_reg(0x2e, 0x6aaa); // tune fm filter IF\n fm_write_rf_reg(0x02, 0xe694);\n fm_write_rf_reg(0x03, 0xfe3a);\n fm_write_rf_reg(0x04, 0x52a8);\n fm_write_rf_reg(0x07, 0x02b9);\n fm_write_rf_reg(0x0a, 0x1a2c);\n fm_write_rf_reg(0x0b, 0x402b);\n fm_write_rf_reg(0x0c, 0x7584);\n fm_write_rf_reg(0x0e, 0x0000);\n fm_write_rf_reg(0x0f, 0x2e18);\n fm_write_rf_reg(0x10, 0x02b4);\n fm_write_rf_reg(0x13, 0x0a48);\n\n //[vco init]\n fm_write_rf_reg(0x18, 0x077f);\n fm_write_rf_reg(0x19, 0x3ff8);\n fm_write_rf_reg(0x1a, 0xc090);\n fm_write_rf_reg(0x1b, 0x0f88);\n fm_write_rf_reg(0x1c, 0x04c6); //[3:0] 5,6,7,8 --> vco/2\n\n return 0;\n}\n\nvoid fm_radio_poweron(void)\n\n{\n hal_cmu_reset_clear(HAL_CMU_MOD_BTCPU);\n osDelay(2000);\n\n {\n // wakp interface\n unsigned short read_val;\n\n fm_read_rf_reg(0x50, &read_val);\n }\n\n pmu_fm_config(1);\n\n fm_write_rf_reg(0x0c, 0x3584);\n if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2 ||\n hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_3) ////\n {\n FM_DIGITAL_REG(0xc00003b4) = 0x00060020; // turn off bt sleep\n } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_4) {\n FM_DIGITAL_REG(0xc00003b0) = 0x00060020; // turn off bt sleep\n } else {\n FM_DIGITAL_REG(0xc00003ac) = 0x00060020; // turn off bt sleep\n }\n FM_DIGITAL_REG(0xd0330038) = 0x00008D0D;\n FM_DIGITAL_REG(0xd0340020) = 0x010E01C0; // open ana rxon for open adc clk\n // fm_write_rf_reg(0x02, 0xe694);\n}\n\nvoid *fm_radio_get_ext_buff(int size) {\n uint8_t *pBuff = NULL;\n size = size + size % 4;\n app_audio_mempool_get_buff(&pBuff, size);\n return (void *)pBuff;\n}\n\nint fm_radio_player(bool on) {\n static struct AF_STREAM_CONFIG_T stream_cfg;\n static bool isRun = false;\n uint8_t *buff = NULL;\n\n TRACE(2, \"fm_radio_player work:%d op:%d\", isRun, on);\n if (isRun == on)\n return 0;\n\n if (on) {\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_52M);\n app_audio_mempool_init();\n fm_radio_poweron();\n fm_radio_analog_init();\n fm_radio_digit_init();\n osDelay(200);\n buff = (uint8_t *)fm_radio_get_ext_buff(FM_AUDIO_BUFFER_SIZE * 2);\n app_audio_pcmbuff_init(buff, FM_AUDIO_BUFFER_SIZE * 2);\n fm_sample_buffer_p =\n (int32_t *)fm_radio_get_ext_buff(FM_SAMPLE_BUFFER_SIZE);\n app_overlay_select(APP_OVERLAY_FM);\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n stream_cfg.vol = app_bt_stream_local_volume_get();\n stream_cfg.handler = fm_capture_more_data;\n stream_cfg.data_ptr = (uint8_t *)fm_sample_buffer_p;\n stream_cfg.data_size = FM_SAMPLE_BUFFER_SIZE;\n stream_cfg.device = AUD_STREAM_USE_DPD_RX;\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n buff = (uint8_t *)fm_radio_get_ext_buff(FM_AUDIO_BUFFER_SIZE);\n stream_cfg.bits = AUD_BITS_16;\n stream_cfg.channel_num = AUD_CHANNEL_NUM_1;\n stream_cfg.sample_rate = AUD_SAMPRATE_48000;\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n stream_cfg.vol = app_bt_stream_local_volume_get();\n stream_cfg.handler = fm_pcm_more_data;\n stream_cfg.data_ptr = buff;\n stream_cfg.data_size = FM_AUDIO_BUFFER_SIZE;\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n } else {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n }\n\n isRun = on;\n return 0;\n}\n\nint fm_tune(uint32_t freqkhz) {\n uint32_t reg;\n unsigned long long tmp = 0;\n\n //[rfpll_cal]\n fm_write_rf_reg(0x21, 0x3979); // ref sel 52MHz\n fm_write_rf_reg(0x22, 0x7A22); // doubler setting\n fm_write_rf_reg(0x23, 0x0380);\n fm_write_rf_reg(0x2b, 0x32a0); // sdm\n fm_write_rf_reg(0x2a, 0x12d1); // cal ini\n\n //(freq(Mhz)-0.89(Mhz))*(2^28)*3/26\n tmp = freqkhz;\n reg = (((tmp - 890)) << 27) * 3 / 13 / 1000;\n\n fm_write_rf_reg(0x25, (reg & 0xffff0000) >> 16);\n fm_write_rf_reg(0x26, reg & 0x0000ffff);\n\n fm_write_rf_reg(0x1d, 0x58e4); // pll_cal_en\n fm_write_rf_reg(0xf7, 0x5597); // rst and enable pll_cal clk\n fm_write_rf_reg(0xf7, 0x55d7); // rst and enable pll_cal clk\n fm_write_rf_reg(0x1d, 0x7ae4); // pll cal start\n fm_write_rf_reg(0xff, 0x0000); // wait 100us\n\n osDelay(20);\n\n fm_write_rf_reg(0x1d, 0x7ac4); // close pll loop\n\n return 0;\n}\n\nvoid fm_test_main(void) {\n fm_radio_player(true);\n osDelay(20);\n fm_tune(90500);\n}\n\n#endif\n" }, { "path": "apps/audioplayers/fmradio.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_AUDIO_H__\n#define __FMRADIO_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nint fm_radio_player(bool on);\n\nvoid fm_tune(uint32_t freqkhz);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif//__FMRADIO_H__\n" }, { "path": "apps/audioplayers/msbcplay.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \n#include \n#include \n#include \n#include \n\n// BT\n\n#if 0\n/* mutex */\nosMutexId g_voicemsbc_queue_mutex_id;\nosMutexDef(g_voicemsbc_queue_mutex);\n\n/* msbc queue */\n#define VOICEMSBC_TEMP_BUFFER_SIZE 128\n#define VOICEMSBC_QUEUE_SIZE (VOICEMSBC_TEMP_BUFFER_SIZE * 100)\nunsigned char voicemsbc_queue_buf[VOICEMSBC_QUEUE_SIZE];\nCQueue voicemsbc_queue;\nstatic uint32_t ok_to_decode = 0;\n\n#define LOCK_VOICEMSBC_QUEUE() \\\n osMutexWait(g_voicemsbc_queue_mutex_id, osWaitForever)\n\n#define UNLOCK_VOICEMSBC_QUEUE() osMutexRelease(g_voicemsbc_queue_mutex_id)\n\nstatic void dump_buffer_to_psram(char *buf, unsigned int len)\n{\n static unsigned int offset = 0;\n memcpy((void *)(0x1c000000 + offset), buf, len);\n}\n\nstatic void copy_one_trace_to_two_track_16bits(uint16_t *src_buf, uint16_t *dst_buf, uint32_t src_len)\n{\n uint32_t i = 0;\n for (i = 0; i < src_len; ++i) {\n dst_buf[i*2 + 0] = dst_buf[i*2 + 1] = src_buf[i];\n }\n}\n\nint store_voicemsbc_buffer(unsigned char *buf, unsigned int len)\n{\n\tLOCK_VOICEMSBC_QUEUE();\n\tEnCQueue(&voicemsbc_queue, buf, len);\n dump_buffer_to_psram((char *)buf, len);\n TRACE(1,\"%d\\n\", LengthOfCQueue(&voicemsbc_queue));\n if (LengthOfCQueue(&voicemsbc_queue) > VOICEMSBC_TEMP_BUFFER_SIZE*20) {\n ok_to_decode = 1;\n }\n\tUNLOCK_VOICEMSBC_QUEUE();\n\n\treturn 0;\n}\n\nstatic short tmp_decode_buf[VOICEMSBC_TEMP_BUFFER_SIZE*2];\nint decode_msbc_frame(unsigned char *pcm_buffer, unsigned int pcm_len)\n{\n\tint r = 0;\n uint32_t decode_len = 0;\n\tunsigned char *e1 = NULL, *e2 = NULL;\n\tunsigned int len1 = 0, len2 = 0;\n\n while (decode_len < pcm_len) {\nget_again:\n LOCK_VOICEMSBC_QUEUE();\n len1 = len2 = 0;\n r = PeekCQueue(&voicemsbc_queue, VOICEMSBC_TEMP_BUFFER_SIZE, &e1, &len1, &e2, &len2);\n UNLOCK_VOICEMSBC_QUEUE();\n\n if(r == CQ_ERR || len1 == 0) {\n //return 0;\n Thread::wait(4);\n goto get_again;\n }\n\n if (len1 != 0) {\n //msbcToPcm8k(e1, (short *)(pcm_buffer + decode_len*4), len1, 0);\n CvsdToPcm8k(e1, (short *)(tmp_decode_buf), len1, 0);\n copy_one_trace_to_two_track_16bits((uint16_t *)tmp_decode_buf, (uint16_t *)(pcm_buffer + decode_len), len1);\n\n LOCK_VOICEMSBC_QUEUE();\n DeCQueue(&voicemsbc_queue, 0, len1);\n UNLOCK_VOICEMSBC_QUEUE();\n\n decode_len += len1*4;\n }\n\n if (len2 != 0) {\n //msbcToPcm8k(e2, (short *)(pcm_buffer + decode_len*4), len2, 0);\n CvsdToPcm8k(e2, (short *)(tmp_decode_buf), len2, 0);\n copy_one_trace_to_two_track_16bits((uint16_t *)tmp_decode_buf, (uint16_t *)(pcm_buffer + decode_len), len2);\n\n LOCK_VOICEMSBC_QUEUE();\n DeCQueue(&voicemsbc_queue, 0, len2);\n UNLOCK_VOICEMSBC_QUEUE();\n\n decode_len += len2*4;\n }\n }\n\n return 0;\n}\n\nuint32_t voicemsbc_audio_more_data(uint8_t *buf, uint32_t len)\n{\n uint32_t l = 0;\n uint32_t cur_ticks = 0, ticks = 0;\n\n if (ok_to_decode == 0)\n return 0;\n\n ticks = hal_sys_timer_get();\n l = decode_msbc_frame(buf, len);\n cur_ticks = hal_sys_timer_get();\n TRACE(1,\"msbc %d t\\n\", (cur_ticks-ticks));\n\n return l;\n}\n\nint voicemsbc_audio_init(void)\n{\n Pcm8k_CvsdInit();\n\n g_voicemsbc_queue_mutex_id = osMutexCreate((osMutex(g_voicemsbc_queue_mutex)));\n\t/* msbc queue*/\n\tInitCQueue(&voicemsbc_queue, VOICEMSBC_QUEUE_SIZE, (unsigned char *)&voicemsbc_queue_buf);\n\n\treturn 0;\n}\n#endif\n" }, { "path": "apps/audioplayers/plc_utils.c", "content": "#include \"plc_utils.h\"\n#include \"hal_trace.h\"\n#include \n#include \n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || \\\n defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n#define MSBC_MUTE_PATTERN (0x55)\n#else\n#define MSBC_MUTE_PATTERN (0x00)\n#endif\n\n#define MSBC_PKTSIZE (60)\n\n/*\n * msbc frame's last byte is a padding byte, we assume it is zero,\n * but it is not always true.\n * Do not check this by default\n */\n//#define ENABLE_PAD_CHECK\n\n/*\n * if msbc frame is filled by 10+ samples in the trail, crc maybe not detect\n * this satuation. Do not check this by default\n */\n//#define ENABLE_TRAILING_ZERO_CHECK\n\n/*\n *\n */\n#define ENABLE_BLE_CONFLICT_CHECK\n\n#define ENABLE_CRC_CHECK\n\n/* check msbc sequence number */\n#define ENABLE_SEQ_CHECK\n\n#ifdef ENABLE_CRC_CHECK\nstatic const uint8_t sbc_crc_tbl[256] = {\n 0x00, 0x1D, 0x3A, 0x27, 0x74, 0x69, 0x4E, 0x53, 0xE8, 0xF5, 0xD2, 0xCF,\n 0x9C, 0x81, 0xA6, 0xBB, 0xCD, 0xD0, 0xF7, 0xEA, 0xB9, 0xA4, 0x83, 0x9E,\n 0x25, 0x38, 0x1F, 0x02, 0x51, 0x4C, 0x6B, 0x76, 0x87, 0x9A, 0xBD, 0xA0,\n 0xF3, 0xEE, 0xC9, 0xD4, 0x6F, 0x72, 0x55, 0x48, 0x1B, 0x06, 0x21, 0x3C,\n 0x4A, 0x57, 0x70, 0x6D, 0x3E, 0x23, 0x04, 0x19, 0xA2, 0xBF, 0x98, 0x85,\n 0xD6, 0xCB, 0xEC, 0xF1, 0x13, 0x0E, 0x29, 0x34, 0x67, 0x7A, 0x5D, 0x40,\n 0xFB, 0xE6, 0xC1, 0xDC, 0x8F, 0x92, 0xB5, 0xA8, 0xDE, 0xC3, 0xE4, 0xF9,\n 0xAA, 0xB7, 0x90, 0x8D, 0x36, 0x2B, 0x0C, 0x11, 0x42, 0x5F, 0x78, 0x65,\n 0x94, 0x89, 0xAE, 0xB3, 0xE0, 0xFD, 0xDA, 0xC7, 0x7C, 0x61, 0x46, 0x5B,\n 0x08, 0x15, 0x32, 0x2F, 0x59, 0x44, 0x63, 0x7E, 0x2D, 0x30, 0x17, 0x0A,\n 0xB1, 0xAC, 0x8B, 0x96, 0xC5, 0xD8, 0xFF, 0xE2, 0x26, 0x3B, 0x1C, 0x01,\n 0x52, 0x4F, 0x68, 0x75, 0xCE, 0xD3, 0xF4, 0xE9, 0xBA, 0xA7, 0x80, 0x9D,\n 0xEB, 0xF6, 0xD1, 0xCC, 0x9F, 0x82, 0xA5, 0xB8, 0x03, 0x1E, 0x39, 0x24,\n 0x77, 0x6A, 0x4D, 0x50, 0xA1, 0xBC, 0x9B, 0x86, 0xD5, 0xC8, 0xEF, 0xF2,\n 0x49, 0x54, 0x73, 0x6E, 0x3D, 0x20, 0x07, 0x1A, 0x6C, 0x71, 0x56, 0x4B,\n 0x18, 0x05, 0x22, 0x3F, 0x84, 0x99, 0xBE, 0xA3, 0xF0, 0xED, 0xCA, 0xD7,\n 0x35, 0x28, 0x0F, 0x12, 0x41, 0x5C, 0x7B, 0x66, 0xDD, 0xC0, 0xE7, 0xFA,\n 0xA9, 0xB4, 0x93, 0x8E, 0xF8, 0xE5, 0xC2, 0xDF, 0x8C, 0x91, 0xB6, 0xAB,\n 0x10, 0x0D, 0x2A, 0x37, 0x64, 0x79, 0x5E, 0x43, 0xB2, 0xAF, 0x88, 0x95,\n 0xC6, 0xDB, 0xFC, 0xE1, 0x5A, 0x47, 0x60, 0x7D, 0x2E, 0x33, 0x14, 0x09,\n 0x7F, 0x62, 0x45, 0x58, 0x0B, 0x16, 0x31, 0x2C, 0x97, 0x8A, 0xAD, 0xB0,\n 0xE3, 0xFE, 0xD9, 0xC4};\n#endif\n\nstatic int sco_parse_synchronization_header(uint8_t *buf, uint8_t *sn) {\n uint8_t sn1, sn2;\n#ifdef ENABLE_CRC_CHECK\n uint8_t fcs = 0x0F;\n uint8_t crc = 0;\n uint8_t i, sb, bit, shift;\n uint8_t ind = 6, bitOffset = 24;\n#endif\n *sn = 0xff;\n#if defined(MSBC_SYNC_HACKER)\n if (((buf[0] != 0x01) && (buf[0] != 0x00)) || ((buf[1] & 0x0f) != 0x08) ||\n (buf[2] != 0xad)) {\n return -1;\n }\n#else\n if ((buf[0] != 0x01) || ((buf[1] & 0x0f) != 0x08) || (buf[2] != 0xad)) {\n return -1;\n }\n#endif\n\n sn1 = (buf[1] & 0x30) >> 4;\n sn2 = (buf[1] & 0xc0) >> 6;\n if ((sn1 != 0) && (sn1 != 0x3)) {\n return -2;\n }\n if ((sn2 != 0) && (sn2 != 0x3)) {\n return -3;\n }\n\n#ifdef ENABLE_CRC_CHECK\n fcs = sbc_crc_tbl[fcs ^ buf[3]];\n if (buf[3] != 0x00)\n return -4;\n fcs = sbc_crc_tbl[fcs ^ buf[4]];\n if (buf[4] != 0x00)\n return -4;\n crc = buf[5];\n for (sb = 0; sb < 8; sb++) {\n if (bitOffset % 8) {\n /* Sum the whole byte */\n fcs = sbc_crc_tbl[fcs ^ buf[ind]];\n ind = ind + 1;\n } else {\n if (sb == 7) {\n /* Sum the next 4 bits */\n\n /* Just sum the most significant 4 bits */\n shift = 7;\n for (i = 0; i < 4; i++) {\n bit = (uint8_t)((0x01 & (buf[ind] >> shift--)) ^ (fcs >> 7));\n if (bit) {\n fcs = (uint8_t)(((fcs << 1) | bit) ^ 0x1C);\n } else {\n fcs = (uint8_t)((fcs << 1));\n }\n }\n }\n }\n\n bitOffset += 4;\n }\n // TRACE(2,\"msbc crc:%d fcs:%d\", crc,fcs);\n if (crc != fcs)\n return -4;\n#endif\n\n *sn = (sn1 & 0x01) | (sn2 & 0x02);\n\n#ifdef ENABLE_PAD_CHECK\n // when pad error detected, we should return sn\n if (buf[MSBC_PKTSIZE - 1] != 0x0) {\n return -5;\n }\n#endif\n\n return 0;\n}\n\n#ifdef ENABLE_BLE_CONFLICT_CHECK\nstatic bool memcmp_U8(uint8_t *x, uint8_t *y, uint16_t size) {\n for (int i = 0; i < size; i++) {\n if (x[i] != y[i])\n return true;\n }\n\n return false;\n}\n\n// when signal is mute, msbc data remains the same except seq num. We should\n// check history flag, otherwise a single conflict may be detected twice\nstatic bool update_ble_sco_conflict(PacketLossState *st, uint8_t *last_pkt,\n uint8_t *pkt) {\n // do not check padding byte as it maybe useless when msbc_offset is 1\n bool ret = (st->prev_ble_sco_conflict_flag[1] == false &&\n memcmp_U8(last_pkt, pkt, MSBC_PKTSIZE - 1) == false);\n\n memcpy(&last_pkt[0], &last_pkt[MSBC_PKTSIZE], MSBC_PKTSIZE);\n memcpy(&last_pkt[MSBC_PKTSIZE], pkt, MSBC_PKTSIZE);\n\n return ret;\n}\n\nstatic bool check_ble_sco_conflict(PacketLossState *st, bool ret) {\n st->prev_ble_sco_conflict_flag[1] = st->prev_ble_sco_conflict_flag[0];\n st->prev_ble_sco_conflict_flag[0] = ret;\n\n return ret;\n}\n#endif\n\nstatic bool msbc_check_controller_mute_pattern(uint8_t *pkt, uint8_t pattern) {\n // do not check padding byte as it maybe useless when msbc_offset is 1\n for (int i = 0; i < MSBC_PKTSIZE - 1; i++)\n if (pkt[i] != pattern)\n return false;\n\n return true;\n}\n\n#ifdef ENABLE_TRAILING_ZERO_CHECK\nstatic int msbc_check_pkt_trailing_zeros(uint8_t *pkt) {\n int idx = MSBC_PKTSIZE;\n\n for (int i = MSBC_PKTSIZE - 1; i >= 0; i--) {\n if (pkt[i] != 0) {\n idx = i;\n break;\n }\n }\n\n return (MSBC_PKTSIZE - 1 - idx);\n}\n#endif\n\nstatic uint8_t get_next_sequence_num(uint8_t seq_num) {\n return (seq_num + 1 == 4) ? 0 : (seq_num + 1);\n}\n\nvoid packet_loss_detection_init(PacketLossState *st) {\n st->last_seq_num = 0xff;\n\n memset(st->last_pkt, 0, sizeof(st->last_pkt));\n memset(st->prev_ble_sco_conflict_flag, 0,\n sizeof(st->prev_ble_sco_conflict_flag));\n memset(st->hist, 0, sizeof(st->hist));\n}\n\nplc_type_t packet_loss_detection_process(PacketLossState *st,\n uint8_t *sbc_buf) {\n plc_type_t plc_type = PLC_TYPE_PASS;\n\n#ifdef ENABLE_BLE_CONFLICT_CHECK\n bool ble_sco_conflict = update_ble_sco_conflict(st, st->last_pkt, sbc_buf);\n#endif\n\n uint8_t seq_num;\n if (msbc_check_controller_mute_pattern(sbc_buf, MSBC_MUTE_PATTERN) == true) {\n plc_type = PLC_TYPE_CONTROLLER_MUTE;\n st->last_seq_num = 0xff;\n }\n#ifdef ENABLE_BLE_CONFLICT_CHECK\n else if (check_ble_sco_conflict(st, ble_sco_conflict) == true) {\n plc_type = PLC_TYPE_BLE_CONFLICT;\n st->last_seq_num = 0xff;\n }\n#endif\n else {\n int err = sco_parse_synchronization_header(sbc_buf, &seq_num);\n if (err < 0 && err >= -3) {\n plc_type = PLC_TYPE_HEADER_ERROR;\n st->last_seq_num = 0xff;\n }\n#ifdef ENABLE_CRC_CHECK\n else if (err == -4) {\n plc_type = PLC_TYPE_CRC_ERROR;\n st->last_seq_num = 0xff;\n }\n#endif\n#ifdef ENABLE_PAD_CHECK\n else if (err == -5) {\n plc_type = PLC_TYPE_PAD_ERROR;\n st->last_seq_num = seq_num;\n }\n#endif\n#ifdef ENABLE_TRAILING_ZERO_CHECK\n else if (msbc_check_pkt_trailing_zeros(sbc_buf) > 10) {\n plc_type = PLC_TYPE_DATA_MISSING;\n st->last_seq_num = 0xff;\n }\n#endif\n else {\n#ifdef ENABLE_SEQ_CHECK\n if (st->last_seq_num == 0xff) {\n if (seq_num == 0xff) {\n plc_type = PLC_TYPE_SEQUENCE_DISCONTINUE;\n } else {\n plc_type = PLC_TYPE_PASS;\n }\n st->last_seq_num = seq_num;\n } else {\n if (seq_num == 0xff) {\n st->last_seq_num = 0xff;\n plc_type = PLC_TYPE_SEQUENCE_DISCONTINUE;\n } else if (seq_num == get_next_sequence_num(st->last_seq_num)) {\n st->last_seq_num = seq_num;\n plc_type = PLC_TYPE_PASS;\n } else {\n st->last_seq_num = 0xff;\n plc_type = PLC_TYPE_SEQUENCE_DISCONTINUE;\n }\n }\n#else\n plc_type = PLC_TYPE_PASS;\n#endif\n }\n }\n\n packet_loss_detection_update_histogram(st, plc_type);\n\n return plc_type;\n}\n\nvoid packet_loss_detection_update_histogram(PacketLossState *st,\n plc_type_t plc_type) {\n if (plc_type < 0 || plc_type >= PLC_TYPE_NUM) {\n TRACE(2, \"[%s] plc type %d is invalid\", __FUNCTION__, plc_type);\n return;\n }\n\n // The packet is detected as PLC_TYPE_PASS, but causes a decoder error.\n if (plc_type == PLC_TYPE_DECODER_ERROR) {\n st->hist[0] -= 1;\n }\n\n st->hist[plc_type] += 1;\n}\n\nvoid packet_loss_detection_report(PacketLossState *st) {\n uint32_t packet_loss_num = 0;\n\n for (uint8_t i = 1; i < PLC_TYPE_NUM; i++) {\n TRACE(3, \"[%s] plc type %d occurs %d times\", __FUNCTION__, i, st->hist[i]);\n packet_loss_num += st->hist[i];\n }\n\n uint32_t packet_total_num = st->hist[0] + packet_loss_num;\n TRACE(4, \"[%s] packet loss percent %d/10000(%d/%d)\", __FUNCTION__,\n (int32_t)(10000.f * packet_loss_num / packet_total_num),\n packet_loss_num, packet_total_num);\n}" }, { "path": "apps/audioplayers/plc_utils.h", "content": "#ifndef PLC_UTILS_H\n#define PLC_UTILS_H\n\n#include \n#include \n#include \"plat_types.h\"\n\ntypedef enum plc_type\n{\n PLC_TYPE_PASS = 0,\n PLC_TYPE_CONTROLLER_MUTE,\n PLC_TYPE_HEADER_ERROR,\n PLC_TYPE_CRC_ERROR,\n PLC_TYPE_PAD_ERROR,\n PLC_TYPE_DATA_MISSING,\n PLC_TYPE_SEQUENCE_DISCONTINUE,\n PLC_TYPE_BLE_CONFLICT,\n PLC_TYPE_DECODER_ERROR,\n PLC_TYPE_NUM,\n} plc_type_t;\n\ntypedef struct\n{\n uint8_t last_seq_num;\n uint8_t last_pkt[60 * 2];\n\n // for ble sco conflict\n bool prev_ble_sco_conflict_flag[2];\n\n // histogram\n uint32_t hist[PLC_TYPE_NUM];\n} PacketLossState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid packet_loss_detection_init(PacketLossState *st);\n\nplc_type_t packet_loss_detection_process(PacketLossState *st, uint8_t *sbc_buf);\n\n/*\n * Update plc type histogram\n * Normally this function is called at the end of packet_loss_detection_process,\n * but if a decoder error occurs outside, it should be updated maually.\n */\nvoid packet_loss_detection_update_histogram(PacketLossState *st, plc_type_t plc_type);\n\nvoid packet_loss_detection_report(PacketLossState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "apps/audioplayers/rbplay/rb_ctl.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/* rbplay source */\n/* playback control & rockbox codec porting & codec thread */\n\n#ifdef MBED\n#include \"mbed.h\"\n#include \"rtos.h\"\n#endif\n#include \"SDFileSystem.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"cqueue.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n\n#include \"audiohw.h\"\n#include \"channel_mode.h\"\n#include \"codec_platform.h\"\n#include \"codeclib.h\"\n#include \"codecs.h\"\n#include \"compressor.h\"\n#include \"dsp_core.h\"\n#include \"eq.h\"\n#include \"metadata.h\"\n#include \"metadata_parsers.h\"\n#include \"pga.h\"\n\n#include \"app_key.h\"\n#include \"app_overlay.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"hal_overlay.h\"\n#include \"rbpcmbuf.h\"\n#include \"rbplay.h\"\n\n#include \"rb_ctl.h\"\n#include \"rbplaysd.h\"\n\n/* Internals */\n\nvoid rb_ctl_wait_lock_thread(bool lock);\nvoid app_rbcodec_ctl_set_play_status(bool st);\nextern bool app_rbcodec_check_hfp_active(void);\n\n#include \"SDFileSystem.h\"\n\nextern \"C\" void hal_sysfreq_print(void);\n\n#define _LOG_TAG \"[rb_ctl] \"\n#undef __attribute__(a)\n\n#define RBPLAY_DEBUG 1\n#if RBPLAY_DEBUG\n#define _LOG_DBG(str, ...) TRACE(0, _LOG_TAG \"\" str, ##__VA_ARGS__)\n#define _LOG_ERR(str, ...) \\\n TRACE(0, \\\n _LOG_TAG \"err:\" \\\n \"\" str, \\\n ##__VA_ARGS__)\n#else\n#define _LOG_DBG(str, ...)\n#define _LOG_ERR(str, ...) \\\n TRACE(0, \\\n _LOG_TAG \"err:\" \\\n \"\" str, \\\n ##__VA_ARGS__)\n#endif\n\n#include \"rb_ctl.h\"\nvoid rb_thread_send_resume(void);\n\ntypedef struct {\n uint32_t evt;\n uint32_t arg;\n} RBCTL_MSG_BLOCK;\n\nstatic osThreadId rb_ctl_tid;\nstatic void rb_ctl_thread(void const *argument);\nstatic int rb_ctl_default_priority;\nosThreadDef(rb_ctl_thread, osPriorityHigh, 1, 1024 * 4, \"rb_ctl\");\n\n#define RBCTL_MAILBOX_MAX (20)\nosMailQDef(rb_ctl_mailbox, RBCTL_MAILBOX_MAX, RBCTL_MSG_BLOCK);\nstatic osMailQId rb_ctl_mailbox = NULL;\n\nint rb_ctl_mailbox_put(RBCTL_MSG_BLOCK *msg_src);\n\n// playlist\nextern playlist_struct sd_playlist;\n\nrb_ctl_struct rb_ctl_context;\n\nextern void rb_thread_set_decode_vars(int fd, int type, void *id3);\nextern void rb_play_codec_run(void);\nextern void rb_codec_set_halt(int halt);\nextern void rb_player_sync_set_wait_thread(osThreadId tid);\nextern void rb_player_sync_wait_close(void);\nextern bool rb_pcmbuf_suspend_play_loop(void);\nvoid app_rbplay_load_playlist(playlist_struct *list);\nint rb_thread_post_msg(RB_MODULE_EVT evt, uint32_t arg);\n\nstatic rb_ctl_status rb_ctl_get_status(void) { return rb_ctl_context.status; }\n\nbool rb_ctl_parse_file(const char *file_path) {\n /* open file */\n\n _LOG_DBG(1, \"open file %s\\n\", file_path);\n rb_ctl_context.file_handle = open((const char *)file_path, O_RDWR);\n if (rb_ctl_context.file_handle <= 0) {\n _LOG_DBG(1, \"open file %s failed\\n\", file_path);\n return false;\n }\n\n if (!get_metadata(&rb_ctl_context.song_id3, rb_ctl_context.file_handle,\n rb_ctl_context.rb_fname)) {\n _LOG_DBG(0, \"get_metadata failed\\n\");\n close(rb_ctl_context.file_handle);\n return false;\n }\n\n _LOG_DBG(4, \"%s bitr:%d,saps %d, freq:%d\\n\", __func__,\n rb_ctl_context.song_id3.bitrate, rb_ctl_context.song_id3.samples,\n rb_ctl_context.song_id3.frequency);\n\n rb_thread_set_decode_vars(rb_ctl_context.file_handle,\n rb_ctl_context.song_id3.codectype,\n &rb_ctl_context.song_id3);\n\n return true;\n}\n\nvoid rb_ctl_vol_operation(bool inc) {\n uint32_t ret;\n struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n\n _LOG_DBG(2, \"%s inc:%d , \", __func__, inc);\n\n if (inc) {\n if (rb_ctl_context.rb_player_vol < 16) {\n rb_ctl_context.rb_player_vol++;\n }\n } else {\n if (rb_ctl_context.rb_player_vol > 1) {\n rb_ctl_context.rb_player_vol--;\n }\n }\n if (rb_ctl_context.status != RB_CTL_PLAYING)\n return;\n\n ret = af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg,\n true);\n if (ret == 0) {\n stream_cfg->vol = rb_ctl_context.rb_player_vol;\n af_stream_setup(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, stream_cfg);\n }\n}\n\nbool rb_ctl_is_playing(void) {\n return (rb_ctl_context.status == RB_CTL_PLAYING);\n}\n\nvoid rb_ctl_set_vol(uint32_t vol) {\n uint32_t ret;\n struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n\n _LOG_DBG(2, \"%s set vol as :%d , \", __func__, vol);\n\n if (rb_ctl_context.status != RB_CTL_PLAYING)\n return;\n\n vol = (vol > 16) ? 16 : vol;\n rb_ctl_context.rb_player_vol = vol;\n\n ret = af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg,\n true);\n if (ret == 0) {\n stream_cfg->vol = rb_ctl_context.rb_player_vol;\n af_stream_setup(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, stream_cfg);\n }\n}\n\nvoid rb_ctl_stop_play(void) {\n _LOG_DBG(1, \"%s \\n\", __func__);\n\n rb_codec_set_halt(1);\n // close file\n _LOG_DBG(0, \" af stream stop \\n\");\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n _LOG_DBG(0, \" af\tstream close \\n\");\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n _LOG_DBG(0, \" close file \\n\");\n if (rb_ctl_context.file_handle != -1)\n close(rb_ctl_context.file_handle);\n rb_ctl_context.file_handle = -1;\n // release frequency\n _LOG_DBG(0, \" release freq \\n\");\n\n return;\n}\n\nvoid rb_ctl_sync_stop_play(void) {\n rb_player_sync_set_wait_thread(osThreadGetId());\n\n rb_ctl_stop_play();\n\n rb_player_sync_wait_close();\n // close file\n _LOG_DBG(0, \" close file \\n\");\n if (rb_ctl_context.file_handle != -1)\n close(rb_ctl_context.file_handle);\n rb_ctl_context.file_handle = -1;\n}\n\nvoid rb_ctl_pause_playing(void) {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n _LOG_DBG(0, \" af stream close \\n\");\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n // wait decoder suspend\n // osDelay(200);\n // while(!rb_pcmbuf_suspend_play_loop()) {\n // osThreadYield();\n // osDelay(1);\n // }\n\n _LOG_DBG(1, \"%s sucessed \", __func__);\n}\n\nvoid rb_ctl_resume_playing(void) {\n#ifndef __TWS__\n rb_pcmbuf_init();\n#endif\n}\n\nvoid rb_ctl_set_priority(int priority) {\n osThreadSetPriority(rb_ctl_tid, (osPriority)priority);\n}\n\nint rb_ctl_get_priority(void) { return (int)osThreadGetPriority(rb_ctl_tid); }\n\nint rb_ctl_get_default_priority(void) { return rb_ctl_default_priority; }\n\nvoid rb_ctl_reset_priority(void) {\n osThreadSetPriority(rb_ctl_tid, (osPriority)rb_ctl_default_priority);\n}\n\n#ifdef __IAG_BLE_INCLUDE__\nextern \"C\" void app_ble_inform_music_switch(uint16_t index);\n#endif\nstatic int rb_ctl_handle_event(RBCTL_MSG_BLOCK *msg_body) {\n RB_MODULE_EVT evt = (RB_MODULE_EVT)msg_body->evt;\n uint32_t arg = msg_body->arg;\n // hal_sysfreq_print();\n\n switch (evt) {\n case RB_MODULE_EVT_PLAY:\n if (rb_ctl_context.status != RB_CTL_IDLE) {\n if (rb_ctl_context.status == RB_CTL_SUSPEND)\n rb_thread_send_resume();\n else\n _LOG_DBG(2, \"%s st %d not in idle \\n\", __func__,\n rb_ctl_context.status);\n break;\n }\n _LOG_DBG(3, \" %s start %d/%d \", __func__, rb_ctl_context.curr_song_idx,\n sd_playlist.total_songs);\n if (sd_playlist.total_songs > 0) {\n playlist_item *it;\n\n it = app_rbplay_get_playitem(rb_ctl_context.curr_song_idx);\n\n if (it == NULL) {\n _LOG_DBG(2, \" %s get item fail idx %d\", __func__,\n rb_ctl_context.curr_song_idx);\n }\n\n _LOG_DBG(2, \"%s start songidx %d \\n\", __func__,\n rb_ctl_context.curr_song_idx);\n\n memcpy(rb_ctl_context.rb_audio_file, it->file_path,\n sizeof(uint16_t) * FILE_PATH_LEN - 4);\n memcpy(rb_ctl_context.rb_fname, it->file_name,\n sizeof(rb_ctl_context.rb_fname));\n\n if (rb_ctl_parse_file((const char *)rb_ctl_context.rb_audio_file)) {\n _LOG_DBG(2, \"%s start init, the tid 0x%x\\n\", __func__,\n osThreadGetId());\n rb_play_codec_init();\n _LOG_DBG(1, \"%s start run\\n\", __func__);\n rb_play_codec_run();\n rb_ctl_context.status = RB_CTL_PLAYING;\n app_rbcodec_ctl_set_play_status(true);\n break;\n } else {\n _LOG_DBG(2, \"%s evt %d parse fail,find next\\n\", __func__,\n msg_body->evt);\n rb_thread_post_msg(RB_MODULE_EVT_PLAY_NEXT, true);\n }\n\n } else {\n _LOG_DBG(2, \"%s evt %d no songs\\n\", __func__, msg_body->evt);\n }\n break;\n case RB_MODULE_EVT_STOP:\n if (rb_ctl_context.status == RB_CTL_IDLE) {\n _LOG_DBG(2, \"%s st %d in idle \\n\", __func__, rb_ctl_context.status);\n break;\n }\n if (rb_ctl_context.status == RB_CTL_SUSPEND) {\n // osDelay(100);\n rb_ctl_resume_playing();\n rb_ctl_context.status = RB_CTL_PLAYING;\n }\n rb_ctl_sync_stop_play();\n rb_ctl_context.status = RB_CTL_IDLE;\n app_rbcodec_ctl_set_play_status(false);\n break;\n case RB_MODULE_EVT_SUSPEND:\n if (rb_ctl_context.status != RB_CTL_PLAYING) {\n _LOG_DBG(2, \"%s st %d not running \\n\", __func__, rb_ctl_context.status);\n break;\n }\n rb_ctl_pause_playing();\n rb_ctl_context.status = RB_CTL_SUSPEND;\n break;\n case RB_MODULE_EVT_RESUME:\n if (rb_ctl_context.status != RB_CTL_SUSPEND) {\n _LOG_DBG(2, \"%s st %d not suspend \\n\", __func__, rb_ctl_context.status);\n break;\n }\n rb_ctl_resume_playing();\n rb_ctl_context.status = RB_CTL_PLAYING;\n break;\n case RB_MODULE_EVT_PLAY_NEXT:\n if (rb_ctl_context.status == RB_CTL_PLAYING) {\n rb_thread_post_msg(RB_MODULE_EVT_STOP, 0);\n } else if (rb_ctl_context.status == RB_CTL_SUSPEND) {\n rb_thread_post_msg(RB_MODULE_EVT_STOP, 0);\n } else {\n }\n if (arg == 0) {\n rb_ctl_context.curr_song_idx--;\n\n if (rb_ctl_context.curr_song_idx == 0xffff)\n rb_ctl_context.curr_song_idx = sd_playlist.total_songs - 1;\n\n } else {\n\n rb_ctl_context.curr_song_idx++;\n\n if (rb_ctl_context.curr_song_idx >= sd_playlist.total_songs)\n rb_ctl_context.curr_song_idx = 0;\n }\n\n#ifdef __IAG_BLE_INCLUDE__\n app_ble_inform_music_switch(rb_ctl_context.curr_song_idx);\n#endif\n\n rb_thread_post_msg(RB_MODULE_EVT_PLAY, 0);\n break;\n case RB_MODULE_EVT_CHANGE_VOL:\n rb_ctl_vol_operation(arg);\n break;\n case RB_MODULE_EVT_SET_VOL:\n rb_ctl_set_vol(arg);\n break;\n case RB_MODULE_EVT_CHANGE_IDLE:\n rb_ctl_stop_play();\n rb_ctl_context.status = RB_CTL_IDLE;\n break;\n case RB_MODULE_EVT_PLAY_IDX:\n if (arg > sd_playlist.total_songs - 1) {\n break;\n }\n if (rb_ctl_context.status == RB_CTL_PLAYING) {\n rb_thread_post_msg(RB_MODULE_EVT_STOP, 0);\n } else if (rb_ctl_context.status == RB_CTL_SUSPEND) {\n rb_thread_post_msg(RB_MODULE_EVT_STOP, 0);\n } else {\n }\n\n rb_ctl_context.curr_song_idx = (uint16_t)arg;\n\n rb_thread_post_msg(RB_MODULE_EVT_PLAY, 0);\n break;\n// for voice cocah\n#if 0\n case SBCREADER_ACTION_INIT:\n //prepare fs\n voiceCocah_prepare_fs();\n //init the data buff\n voiceCocah_read_sbc_data();\n break;\n case SBCREADER_ACTION_RUN:\n //fill sbc queue\n voiceCocah_read_sbc_data();\n break;\n case SBCREADER_ACTION_STOP:\n //release the res\n voiceCocah_stop_clean();\n rb_ctl_reset_priority();\n break;\n#endif\n\n#ifdef __TWS__\n case RB_MODULE_EVT_RESTORE_DUAL_PLAY:\n extern void rb_restore_dual_play(uint8_t stream_type);\n rb_restore_dual_play(arg);\n break;\n#endif\n case RB_MODULE_EVT_DEL_FILE:\n static rb_ctl_status prev_status = rb_ctl_context.status;\n if (rb_ctl_context.status == RB_CTL_PLAYING) {\n rb_thread_post_msg(RB_MODULE_EVT_STOP, 0);\n rb_thread_post_msg(RB_MODULE_EVT_DEL_FILE, arg);\n } else if (rb_ctl_context.status == RB_CTL_SUSPEND) {\n rb_thread_post_msg(RB_MODULE_EVT_STOP, 0);\n rb_thread_post_msg(RB_MODULE_EVT_DEL_FILE, arg);\n } else {\n app_ctl_remove_file(arg);\n if (prev_status == RB_CTL_PLAYING) {\n rb_thread_post_msg(RB_MODULE_EVT_PLAY, 0);\n }\n }\n\n break;\n#if defined(TWS_LINEIN_PLAYER)\n case RB_MODULE_EVT_LINEIN_START:\n extern int app_linein_codec_start(void);\n app_linein_codec_start();\n break;\n\n case RB_MODULE_EVT_RECONFIG_STREAM:\n extern void rb_tws_reconfig_stream(uint32_t arg);\n rb_tws_reconfig_stream(arg);\n break;\n\n case RB_MODULE_EVT_SET_TWS_MODE:\n break;\n#endif\n#ifdef SBC_RECORD_TEST\n\n case SBC_RECORD_ACTION_START: {\n rb_ctl_context.sbc_record_on = true;\n app_rbplay_set_store_flag(true);\n app_rbplay_open_sbc_file();\n\n } break;\n\n case SBC_RECORD_ACTION_DATA_IND: {\n if (rb_ctl_context.sbc_record_on) {\n app_rbplay_process_sbc_data();\n }\n } break;\n\n case SBC_RECORD_ACTION_STOP: {\n rb_ctl_context.sbc_record_on = false;\n app_rbplay_set_store_flag(false);\n app_rbplay_close_sbc_file();\n } break;\n#endif\n default:\n break;\n }\n if (SBC_RECORD_ACTION_DATA_IND != msg_body->evt)\n _LOG_DBG(3, \"%s rbcodec evt %d ,st %d ended\\n\", __func__, msg_body->evt,\n rb_ctl_context.status);\n return 0;\n}\n\nint rb_thread_post_msg(RB_MODULE_EVT evt, uint32_t arg) {\n int ret;\n RBCTL_MSG_BLOCK msg;\n\n if (!rb_ctl_tid)\n return 0;\n /* APIs */\n msg.evt = (uint32_t)evt;\n msg.arg = (uint32_t)arg;\n ret = rb_ctl_mailbox_put(&msg);\n\n _LOG_DBG(3, \"%s ret %d evt:%d\\n\", __func__, ret, evt);\n return 0;\n}\n\nvoid app_wait_player_stoped(void) {\n while (rb_ctl_context.status != RB_CTL_IDLE)\n osThreadYield();\n}\n\nvoid app_wait_player_suspend(void) {\n if (rb_ctl_context.status == RB_CTL_IDLE)\n return;\n\n while (rb_ctl_context.status != RB_CTL_SUSPEND)\n osThreadYield();\n}\n\nvoid app_wait_player_resumed(void) {\n if (rb_ctl_context.status == RB_CTL_IDLE)\n return;\n\n while (rb_ctl_context.status != RB_CTL_PLAYING)\n osThreadYield();\n}\n\nvoid rb_thread_send_play(void) {\n _LOG_DBG(1, \" %s \", __FUNCTION__);\n rb_thread_post_msg(RB_MODULE_EVT_PLAY, (uint32_t)osThreadGetId());\n}\n\nvoid rb_thread_send_stop(void) {\n _LOG_DBG(1, \" %s \", __FUNCTION__);\n rb_thread_post_msg(RB_MODULE_EVT_STOP, (uint32_t)osThreadGetId());\n\n osDelay(200);\n app_wait_player_stoped();\n}\n\nvoid rb_thread_send_pause(void) {\n _LOG_DBG(1, \" %s \", __FUNCTION__);\n\n rb_thread_post_msg(RB_MODULE_EVT_SUSPEND, (uint32_t)osThreadGetId());\n app_wait_player_suspend();\n\n _LOG_DBG(1, \" %s end\", __FUNCTION__);\n}\n\nvoid rb_thread_send_resume(void) {\n _LOG_DBG(1, \" %s \", __FUNCTION__);\n\n rb_thread_post_msg(RB_MODULE_EVT_RESUME, (uint32_t)osThreadGetId());\n\n _LOG_DBG(1, \" %s end\", __FUNCTION__);\n}\n\nvoid rb_play_dual_play_restore(uint8_t stream_type) {\n _LOG_DBG(2, \"%s %d \\n\", __func__, __LINE__);\n\n rb_thread_post_msg(RB_MODULE_EVT_RESTORE_DUAL_PLAY, stream_type);\n _LOG_DBG(2, \"%s %d \\n\", __func__, __LINE__);\n}\n\nvoid rb_thread_send_switch(bool next) {\n _LOG_DBG(2, \"%s %d \\n\", __func__, __LINE__);\n\n rb_thread_post_msg(RB_MODULE_EVT_PLAY_NEXT, next);\n\n _LOG_DBG(2, \"%s %d \\n\", __func__, __LINE__);\n}\n\nvoid rb_play_linein_start(void) {\n _LOG_DBG(2, \"%s %d \\n\", __func__, __LINE__);\n\n rb_thread_post_msg(RB_MODULE_EVT_LINEIN_START, 0);\n _LOG_DBG(2, \"%s %d \\n\", __func__, __LINE__);\n}\n\nvoid rb_play_reconfig_stream(uint32_t arg) {\n _LOG_DBG(3, \"%s %d arg:0x%x\\n\", __func__, __LINE__, arg);\n\n rb_thread_post_msg(RB_MODULE_EVT_RECONFIG_STREAM, arg);\n _LOG_DBG(2, \"%s %d \\n\", __func__, __LINE__);\n}\n\nvoid rb_play_set_tws_mode(uint32_t arg) {\n _LOG_DBG(3, \"%s %d arg:0x%x\\n\", __func__, __LINE__, arg);\n\n rb_thread_post_msg(RB_MODULE_EVT_SET_TWS_MODE, arg);\n _LOG_DBG(2, \"%s %d \\n\", __func__, __LINE__);\n}\n\nvoid rb_thread_send_play_idx(uint32_t array_subidx) {\n _LOG_DBG(2, \" %s array_subidx %d, \", __FUNCTION__, array_subidx);\n\n rb_thread_post_msg(RB_MODULE_EVT_PLAY_IDX, array_subidx);\n}\n\nvoid rb_thread_send_vol(bool inc) {\n _LOG_DBG(2, \" %s inc %d, \", __FUNCTION__, inc);\n\n rb_thread_post_msg(RB_MODULE_EVT_CHANGE_VOL, inc);\n}\n\nvoid rb_thread_send_status_change(void) {\n _LOG_DBG(1, \" %s , \", __FUNCTION__);\n\n rb_thread_post_msg(RB_MODULE_EVT_CHANGE_IDLE, 0);\n}\n\nvoid rb_thread_set_vol(uint32_t vol) {\n _LOG_DBG(1, \" %s , \", __FUNCTION__);\n\n rb_thread_post_msg(RB_MODULE_EVT_SET_VOL, vol);\n}\n\nvoid rb_thread_send_del_file(uint16_t idx) {\n _LOG_DBG(1, \" %s , \", __FUNCTION__);\n\n rb_thread_post_msg(RB_MODULE_EVT_DEL_FILE, idx);\n}\n\nvoid rb_thread_send_sbc_record_start(void) {\n _LOG_DBG(1, \" %s , \", __FUNCTION__);\n\n rb_thread_post_msg(SBC_RECORD_ACTION_START, (uint32_t)osThreadGetId());\n}\n\nvoid rb_thread_send_sbc_record_data_ind(void) {\n if (!rb_ctl_context.sbc_record_on)\n return;\n // _LOG_DBG(1,\" %s , \",__FUNCTION__);\n rb_thread_post_msg(SBC_RECORD_ACTION_DATA_IND, (uint32_t)osThreadGetId());\n}\n\nvoid rb_thread_send_sbc_record_stop(void) {\n _LOG_DBG(1, \" %s , \", __FUNCTION__);\n\n rb_thread_post_msg(SBC_RECORD_ACTION_STOP, (uint32_t)osThreadGetId());\n}\n\n// interface for audio module\nstatic bool user_key_pause_stream = false;\nvoid app_rbplay_audio_reset_pause_status(void) {\n user_key_pause_stream = false;\n}\n\nint app_rbplay_audio_onoff(bool onoff, uint16_t aud_id) {\n _LOG_DBG(3, \" %s onoff %d, get status:%d\", __FUNCTION__, onoff,\n rb_ctl_get_status());\n\n if (app_rbcodec_check_hfp_active() && !onoff) {\n if (RB_CTL_PLAYING == rb_ctl_get_status()) {\n rb_thread_send_pause();\n }\n } else if (!onoff) {\n // rb_thread_send_stop();\n rb_thread_send_pause();\n } else {\n if (!user_key_pause_stream) {\n if (RB_CTL_SUSPEND == rb_ctl_get_status()) {\n rb_thread_send_resume();\n app_wait_player_resumed();\n } else {\n rb_thread_send_play();\n }\n }\n }\n\n return 0;\n}\n\nvoid app_rbplay_pause_resume(void) {\n _LOG_DBG(2, \" %s get status:%d\", __func__, rb_ctl_get_status());\n\n user_key_pause_stream = true;\n if (RB_CTL_SUSPEND == rb_ctl_get_status()) {\n user_key_pause_stream = false;\n rb_thread_send_resume();\n }\n if (RB_CTL_PLAYING == rb_ctl_get_status()) {\n user_key_pause_stream = true;\n rb_thread_send_pause();\n }\n}\n// sbc reader run within thread\n\nstatic int rb_ctl_mailbox_init(void) {\n rb_ctl_mailbox = osMailCreate(osMailQ(rb_ctl_mailbox), NULL);\n if (rb_ctl_mailbox == NULL) {\n TRACE(0, \"Failed to Create rb_ctl_mailbox\\n\");\n return -1;\n }\n return 0;\n}\n\nint rb_ctl_mailbox_put(RBCTL_MSG_BLOCK *msg_src) {\n osStatus status;\n\n RBCTL_MSG_BLOCK *msg_p = NULL;\n\n msg_p = (RBCTL_MSG_BLOCK *)osMailAlloc(rb_ctl_mailbox, 0);\n if (!msg_p) {\n TRACE(3, \"%s fail, evt:%d,arg=%d \\n\", __func__, msg_src->evt, msg_src->arg);\n return -1;\n }\n\n ASSERT(msg_p, \"osMailAlloc error\");\n\n msg_p->evt = msg_src->evt;\n msg_p->arg = msg_src->arg;\n\n status = osMailPut(rb_ctl_mailbox, msg_p);\n\n return (int)status;\n}\n\nint rb_ctl_mailbox_free(RBCTL_MSG_BLOCK *msg_p) {\n osStatus status;\n\n status = osMailFree(rb_ctl_mailbox, msg_p);\n\n return (int)status;\n}\n\nint rb_ctl_mailbox_get(RBCTL_MSG_BLOCK **msg_p) {\n osEvent evt;\n evt = osMailGet(rb_ctl_mailbox, osWaitForever);\n if (evt.status == osEventMail) {\n *msg_p = (RBCTL_MSG_BLOCK *)evt.value.p;\n return 0;\n }\n return -1;\n}\n\n#if 0\nvoid rb_ctl_action_init(void)\n{\n\n bool ind = voiceCocah_get_indication();\n TRACE(2,\" %s Cocah %d\",__func__,ind);\n\n if( !ind) return ;\n\n // rb_ctl_set_priority(osPriorityHigh);\n\n rb_thread_post_msg(SBCREADER_ACTION_INIT,(uint32_t)osThreadGetId());\n}\n\nvoid rb_ctl_action_run(void)\n{\n bool ind = voiceCocah_get_indication();\n TRACE(2,\" %s Cocah %d\",__func__,ind);\n\n if( !ind) return ;\n\n rb_thread_post_msg(SBCREADER_ACTION_RUN,(uint32_t)osThreadGetId());\n}\n\nvoid rb_ctl_action_stop(void)\n{\n bool ind = voiceCocah_get_indication();\n TRACE(2,\" %s Cocah %d\",__func__,ind);\n\n if( !ind) return ;\n\n rb_thread_post_msg(SBCREADER_ACTION_STOP,(uint32_t)osThreadGetId());\n\n}\n#endif\nstatic void rb_ctl_thread(void const *argument) {\n osEvent evt;\n#if 1\n app_sysfreq_req(APP_SYSFREQ_USER_APP_PLAYER, APP_SYSFREQ_208M);\n\n app_rbplay_load_playlist(&sd_playlist);\n#endif\n memset(&rb_ctl_context, 0x0, sizeof(rb_ctl_struct));\n rb_ctl_context.rb_player_vol = 6;\n rb_ctl_context.status = RB_CTL_IDLE;\n\n rb_ctl_context.curr_song_idx = 0;\n // load playlist here\n\n // voiceCocah_init();\n\n rb_ctl_context.init_done = true;\n\n while (1) {\n RBCTL_MSG_BLOCK *msg_p = NULL;\n\n app_sysfreq_req(APP_SYSFREQ_USER_APP_PLAYER, APP_SYSFREQ_32K);\n\n if (!rb_ctl_mailbox_get(&msg_p)) {\n app_sysfreq_req(APP_SYSFREQ_USER_APP_PLAYER, APP_SYSFREQ_104M);\n\n rb_ctl_handle_event(msg_p);\n\n rb_ctl_mailbox_free(msg_p);\n }\n }\n}\n\nint rb_ctl_init(void) {\n _LOG_DBG(1, \"%s \\n\", __func__);\n\n rb_ctl_context.init_done = false;\n rb_ctl_context.sbc_record_on = false;\n\n app_rbplay_open();\n\n rb_ctl_mailbox_init();\n\n rb_ctl_tid = osThreadCreate(osThread(rb_ctl_thread), NULL);\n rb_ctl_default_priority = osPriorityAboveNormal;\n\n if (rb_ctl_tid == NULL) {\n TRACE(0, \"Failed to Create rb_ctl_thread\\n\");\n return 0;\n }\n _LOG_DBG(1, \"Leave %s \\n\", __func__);\n return 0;\n}\n\nuint8_t rb_ctl_get_vol(void) { return rb_ctl_context.rb_player_vol; }\n\nbool rb_ctl_is_init_done(void) { return rb_ctl_context.init_done; }\n\nbool rb_ctl_is_paused(void) { return (RB_CTL_SUSPEND == rb_ctl_get_status()); }\n\nuint16_t rb_ctl_songs_count(void) { return sd_playlist.total_songs; }\n" }, { "path": "apps/audioplayers/rbplay/rb_ctl.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/* rbplay source */\n/* playback control & rockbox codec porting & codec thread */\n#ifndef __RB_CTL_H__\n#define __RB_CTL_H__\n\n\ntypedef enum {\n RB_MODULE_EVT_NONE,\n\tRB_MODULE_EVT_PLAY,\n\tRB_MODULE_EVT_PLAY_IDX,\n RB_MODULE_EVT_STOP,\n RB_MODULE_EVT_SUSPEND,\n RB_MODULE_EVT_RESUME,\n RB_MODULE_EVT_PLAY_NEXT,\n\tRB_MODULE_EVT_CHANGE_VOL,\n\tRB_MODULE_EVT_SET_VOL,\n\tRB_MODULE_EVT_CHANGE_IDLE,\n\tRB_MODULE_EVT_DEL_FILE,\n\n\tRB_MODULE_EVT_RESTORE_DUAL_PLAY,\n\tRB_MODULE_EVT_LINEIN_START,\n\tRB_MODULE_EVT_RECONFIG_STREAM,\n\tRB_MODULE_EVT_SET_TWS_MODE,\n\n SBCREADER_ACTION_NONE,\n SBCREADER_ACTION_INIT,\n SBCREADER_ACTION_RUN,\n SBCREADER_ACTION_STOP,\n\n\tSBC_RECORD_ACTION_START,\n\tSBC_RECORD_ACTION_DATA_IND,\n\tSBC_RECORD_ACTION_STOP,\n\n RB_MODULE_EVT_MAX\n} RB_MODULE_EVT;\n\ntypedef enum {\n RB_CTL_IDLE,\n RB_CTL_PLAYING,\n RB_CTL_SUSPEND,\n} rb_ctl_status;\n\ntypedef struct {\n struct mp3entry song_id3;\n char rb_fname[FILE_SHORT_NAME_LEN];\n rb_ctl_status status ; //playing,idle,pause,\n uint16_t rb_audio_file[FILE_PATH_LEN];\n uint16_t curr_song_idx ;\n uint8_t rb_player_vol ;\n int file_handle;\n\tint \tinit_done;\n\tBOOL\tsbc_record_on;\n} rb_ctl_struct;\n\nextern int app_rbmodule_post_msg(RB_MODULE_EVT evt,uint32_t arg);\nextern int rb_ctl_is_audio_file(const char* file_path);\n\nuint8_t rb_ctl_get_vol(void);\n#endif\n\n" }, { "path": "apps/audioplayers/rbplay/rbpcmbuf.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/* rbpcmbuf source */\n/* pcmbuf management & af control & mixer */\n#include \n#include \n#include \n#include \n#include \n\n#ifdef MBED\n#include \"mbed.h\"\n#include \"rtos.h\"\n#endif\n#include \"app_audio.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n#include \"cqueue.h\"\n#include \"hal_trace.h\"\n\n#include \"rbpcmbuf.h\"\n#include \"rbplay.h\"\n#include \"utils.h\"\n\n#define RB_PCMBUF_DMA_BUFFER_SIZE (1024 * 12)\n#define RB_PCMBUF_MEDIA_BUFFER_SIZE (1024 * 12)\n#define RB_DECODE_OUT_BUFFER_SIZE 1024\n\nstatic uint8_t *rb_decode_out_buff;\nstatic uint8_t *rbplay_dma_buffer;\nstatic uint8_t *rb_pcmbuf_media_buf;\nstatic CQueue rb_pcmbuf_media_buf_queue;\nstatic osMutexId _rb_media_buf_queue_mutex_id = NULL;\nstatic osMutexDef(_rb_media_buf_queue_mutex);\n\n#define LOCK_MEDIA_BUF_QUEUE() \\\n if (osErrorISR == \\\n osMutexWait(_rb_media_buf_queue_mutex_id, osWaitForever)) { \\\n error(\"%s LOCK_MEDIA_BUF_QUEUE from IRQ!!!!!!!\\n\", __func__); \\\n }\n\n#define UNLOCK_MEDIA_BUF_QUEUE() \\\n if (osErrorISR == osMutexRelease(_rb_media_buf_queue_mutex_id)) { \\\n error(\"%s UNLOCK_MEDIA_BUF_QUEUE from IRQ!!!!!!\\n\"); \\\n }\n\nstatic uint32_t rbplay_more_data(uint8_t *buf, uint32_t len) {\n CQItemType *e1 = NULL;\n CQItemType *e2 = NULL;\n unsigned int len1 = 0;\n unsigned int len2 = 0;\n\n LOCK_MEDIA_BUF_QUEUE();\n int ret = PeekCQueue(&rb_pcmbuf_media_buf_queue, len, &e1, &len1, &e2, &len2);\n UNLOCK_MEDIA_BUF_QUEUE();\n\n if (ret == CQ_OK) {\n if (len1 > 0)\n memcpy(buf, e1, len1);\n if (len2 > 0)\n memcpy(buf + len1, e2, len - len1);\n LOCK_MEDIA_BUF_QUEUE();\n DeCQueue(&rb_pcmbuf_media_buf_queue, 0, len);\n UNLOCK_MEDIA_BUF_QUEUE();\n } else {\n warn(\"RBplay cache underflow\");\n }\n\n return len;\n}\n\nextern uint8_t rb_ctl_get_vol(void);\nvoid rb_pcmbuf_init(void) {\n info(\"pcmbuff init\");\n if (!_rb_media_buf_queue_mutex_id)\n _rb_media_buf_queue_mutex_id =\n osMutexCreate((osMutex(_rb_media_buf_queue_mutex)));\n\n app_audio_mempool_init();\n\n app_audio_mempool_get_buff(&rb_pcmbuf_media_buf, RB_PCMBUF_MEDIA_BUFFER_SIZE);\n InitCQueue(&rb_pcmbuf_media_buf_queue, RB_PCMBUF_MEDIA_BUFFER_SIZE,\n (unsigned char *)rb_pcmbuf_media_buf);\n\n app_audio_mempool_get_buff(&rbplay_dma_buffer, RB_PCMBUF_DMA_BUFFER_SIZE);\n app_audio_mempool_get_buff(&rb_decode_out_buff, RB_DECODE_OUT_BUFFER_SIZE);\n\n struct AF_STREAM_CONFIG_T stream_cfg;\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n stream_cfg.bits = AUD_BITS_16;\n stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n stream_cfg.sample_rate = AUD_SAMPRATE_44100;\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n stream_cfg.vol = rb_ctl_get_vol();\n stream_cfg.handler = rbplay_more_data;\n stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(rbplay_dma_buffer);\n stream_cfg.data_size = RB_PCMBUF_DMA_BUFFER_SIZE;\n\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n}\n\nvoid *rb_pcmbuf_request_buffer(int *size) {\n *size = RB_DECODE_OUT_BUFFER_SIZE / 4;\n return rb_decode_out_buff;\n}\n\nvoid rb_pcmbuf_write(unsigned int size) {\n int ret;\n do {\n LOCK_MEDIA_BUF_QUEUE();\n ret = EnCQueue(&rb_pcmbuf_media_buf_queue, (CQItemType *)rb_decode_out_buff,\n size * (2 * 2));\n UNLOCK_MEDIA_BUF_QUEUE();\n osThreadYield();\n } while (ret == CQ_ERR);\n}\n\nvoid rb_pcmbuf_stop(void) {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n}\n" }, { "path": "apps/audioplayers/rbplay/rbpcmbuf.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef RBPCMBUF_HEADER\n#define RBPCMBUF_HEADER\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum _RB_PCMBUF_AUD_STATE_T {\n RB_PCMBUF_AUD_STATE_STOP = 0,\n RB_PCMBUF_AUD_STATE_START,\n} RB_PCMBUF_AUD_STATE_T;\n\nvoid rb_pcmbuf_init(void);\nvoid rb_pcmbuf_stop(void);\nvoid *rb_pcmbuf_request_buffer(int *size);\nvoid rb_pcmbuf_write(unsigned int size);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* RBPCMBUF_HEADER */\n" }, { "path": "apps/audioplayers/rbplay/rbplay.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/* rbplay source */\n/* playback control & rockbox codec porting & codec thread */\n\n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n\n#ifdef MBED\n#include \"mbed.h\"\n#include \"rtos.h\"\n#endif\n#include \"app_overlay.h\"\n#include \"apps.h\"\n#include \"audioflinger.h\"\n#include \"codecs.h\"\n#include \"eq_export.h\"\n#include \"hal_overlay.h\"\n#include \"hal_trace.h\"\n#include \"metadata.h\"\n\n#include \"app_key.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"rbpcmbuf.h\"\n#include \"rbplay.h\"\n#include \"rbplaysd.h\"\n#include \"utils.h\"\n\n#ifdef __TWS__\n#include \"app_tws.h\"\n#endif\n\n// TODO: remove\n#define BT_STREAM_RBCODEC 0x10 // from rockbox decoder\n\nextern \"C\" {\nvoid flac_codec_main(int r);\nvoid flac_codec_run(void);\nvoid wav_codec_main(int r);\nvoid wav_codec_run(void);\nvoid mpa_codec_main(int r);\nvoid mpa_codec_run(void);\nvoid ape_codec_main(int r);\nvoid ape_codec_run(void);\nvoid sbc_codec_main(int r);\nvoid sbc_codec_run(void);\n}\n\nextern void rb_pcm_player_open(enum AUD_BITS_T bits,\n enum AUD_SAMPRATE_T sample_rate,\n enum AUD_CHANNEL_NUM_T channel_num, uint8_t vol);\n\n#if defined(__TWS__)\ntypedef struct _rb_tws_codec_info {\n uint8_t update_codec_info;\n int32_t sample_freq;\n uint8_t channel_num;\n} rb_tws_codec_info;\n\nrb_tws_codec_info codec_info = {1, 44100, 2};\n#endif\n\nstatic osThreadId rb_decode_tid = NULL;\nstatic osThreadId rb_caller_tid = NULL;\n\ntypedef struct {\n uint32_t evt;\n uint32_t arg;\n} RBTHREAD_MSG_BLOCK;\n\n#define RBTHREAD_MAILBOX_MAX (10)\nosMailQDef(rb_decode_mailbox, RBTHREAD_MAILBOX_MAX, RBTHREAD_MSG_BLOCK);\nint rb_decode_mailbox_put(RBTHREAD_MSG_BLOCK *msg_src);\nstatic osMailQId rb_decode_mailbox = NULL;\n\nstatic void rb_decode_thread(void const *argument);\nosThreadDef(rb_decode_thread, osPriorityAboveNormal, 1, 1024 * 2,\n \"rb_decorder\");\n\n// rbcodec info\nstatic int song_fd;\nstatic int song_format;\nstatic struct mp3entry *current_id3;\nstatic uint8_t rbplay_loop_on;\n\nstatic volatile int rb_decode_halt_flag = 1;\n\nstruct codec_api ci_api;\nstruct codec_api *ci = &ci_api;\n\n// TODO\nvolatile osThreadId thread_tid_waiter = NULL;\n\nvoid init_dsp(void);\nvoid codec_configure(int setting, intptr_t value);\n\nuint16_t g_rbplayer_curr_song_idx = 0;\n\nextern void app_rbplay_exit(void);\n\nextern void bt_change_to_iic(APP_KEY_STATUS *status, void *param);\n\nextern void rb_thread_send_switch(bool next);\nextern void rb_thread_send_status_change(void);\n\nenum APP_SYSFREQ_FREQ_T rb_player_get_work_freq(void);\n\nstatic void rb_player_sync_close_done(void) { thread_tid_waiter = NULL; }\n\nextern void rb_check_stream_reconfig(int32_t freq, uint8_t ch);\nstatic void f_codec_pcmbuf_insert_callback(const void *ch1, const void *ch2,\n int count) {\n struct dsp_buffer src;\n struct dsp_buffer dst;\n\n src.remcount = count;\n src.pin[0] = (const unsigned char *)ch1;\n src.pin[1] = (const unsigned char *)ch2;\n src.proc_mask = 0;\n\n if (rb_codec_running() == 0)\n return;\n\n#ifndef __TWS__\n while (src.remcount > 0) {\n dst.remcount = 0;\n dst.p16out = (short *)rb_pcmbuf_request_buffer(&dst.bufcount);\n\n if (dst.p16out == NULL) {\n warn(\"No pcm buffer\");\n osThreadYield();\n } else {\n dsp_process(ci->dsp, &src, &dst);\n\n if (dst.remcount > 0) {\n rb_pcmbuf_write(dst.remcount);\n }\n }\n }\n#else\n\n if (codec_info.update_codec_info) {\n rb_set_sbc_encoder_freq_ch(\n codec_info.sample_freq,\n codec_info.channel_num); // should call this to set trigger timer\n rb_check_stream_reconfig(codec_info.sample_freq, codec_info.channel_num);\n codec_info.update_codec_info = 0;\n }\n\n if (tws_local_player_need_tran_2_slave()) {\n rb_tws_start_master_player(BT_STREAM_RBCODEC);\n }\n while (1) {\n uint8_t *pcm_buff = NULL;\n dst.remcount = 0;\n dst.bufcount = MIN(src.remcount, 128); /* Arbitrary min request */\n dst.p16out = (short *)rb_pcmbuf_request_buffer(&dst.bufcount);\n pcm_buff = (uint8_t *)dst.p16out;\n ASSERT(pcm_buff, \"Should request buffer\");\n\n dsp_process(ci->dsp, &src, &dst);\n\n if (dst.remcount > 0) {\n while (rb_push_pcm_in_tws_buffer(pcm_buff, dst.remcount * 2 * 2) == 0) {\n osDelay(2);\n }\n }\n\n if (src.remcount <= 0) {\n return; /* No input remains and DSP purged */\n }\n }\n#endif\n}\n\nstatic void f_audio_codec_update_elapsed(unsigned long elapsed) {\n // info(\"Update elapsed: %d\", elapsed);\n return;\n}\n\nstatic size_t f_codec_filebuf_callback(void *ptr, size_t size) {\n ssize_t ret;\n ret = read(song_fd, ptr, size);\n if (ret < 0) {\n error(\"File read error: %d\", ret);\n }\n\n return ret;\n}\n\nstatic void *f_codec_request_buffer_callback(size_t *realsize, size_t reqsize) {\n return NULL;\n}\n\nstatic void *f_codec_advance_buffer_callback(size_t amount) {\n off_t ret = lseek(song_fd, (off_t)(ci->curpos + amount), SEEK_SET);\n if (ret < 0) {\n error(\"File seek fail\");\n return NULL;\n }\n\n ci->curpos += amount;\n return (void *)ci;\n}\n\nstatic bool f_codec_seek_buffer_callback(size_t newpos) {\n off_t ret = lseek(song_fd, (off_t)newpos, SEEK_SET);\n if (ret < 0) {\n error(\"File seek fail\");\n return false;\n }\n\n ci->curpos = newpos;\n return true;\n}\n\nstatic void f_codec_seek_complete_callback(void) {\n info(\"Seek complete\");\n dsp_configure(ci->dsp, DSP_FLUSH, 0);\n}\n\nstatic void f_audio_codec_update_offset(size_t offset) {}\n\nstatic void f_codec_configure_callback(int setting, intptr_t value) {\n dsp_configure(ci->dsp, setting, value);\n#ifdef __TWS__\n if (setting == DSP_SET_FREQUENCY) {\n if (codec_info.sample_freq != value)\n codec_info.update_codec_info = 1;\n codec_info.sample_freq = value;\n } else if (setting == DSP_SET_STEREO_MODE) {\n if (codec_info.channel_num != (value == STEREO_MONO ? 1 : 2))\n codec_info.update_codec_info = 1;\n codec_info.channel_num = value == STEREO_MONO ? 1 : 2;\n }\n#endif\n}\n\nstatic enum codec_command_action f_codec_get_command_callback(intptr_t *param) {\n if (rb_decode_halt_flag == 1)\n return CODEC_ACTION_HALT;\n\n return CODEC_ACTION_NULL;\n}\n\nstatic bool f_codec_loop_track_callback(void) { return false; }\n\nstatic void init_ci_file(void) {\n ci->codec_get_buffer = 0;\n ci->pcmbuf_insert = f_codec_pcmbuf_insert_callback;\n ci->set_elapsed = f_audio_codec_update_elapsed;\n ci->read_filebuf = f_codec_filebuf_callback;\n ci->request_buffer = f_codec_request_buffer_callback;\n ci->advance_buffer = f_codec_advance_buffer_callback;\n ci->seek_buffer = f_codec_seek_buffer_callback;\n ci->seek_complete = f_codec_seek_complete_callback;\n ci->set_offset = f_audio_codec_update_offset;\n ci->configure = f_codec_configure_callback;\n ci->get_command = f_codec_get_command_callback;\n ci->loop_track = f_codec_loop_track_callback;\n}\n\nstatic void rb_play_init(void) {\n init_dsp();\n\n init_ci_file();\n\n#ifndef __TWS__\n rb_pcmbuf_init();\n#endif\n}\n\nvoid rb_play_codec_init(void) {\n RBTHREAD_MSG_BLOCK msg;\n msg.evt = (uint32_t)RB_CTRL_CMD_CODEC_INIT;\n msg.arg = (uint32_t)0;\n rb_decode_mailbox_put(&msg);\n}\n\nvoid rb_play_codec_run(void) {\n RBTHREAD_MSG_BLOCK msg;\n msg.evt = (uint32_t)RB_CTRL_CMD_CODEC_RUN;\n msg.arg = (uint32_t)0;\n rb_decode_mailbox_put(&msg);\n}\n\nstatic int rb_codec_init_desc(void) {\n info(\"Init decode format: %d\", song_format);\n\n switch (song_format) {\n case AFMT_MPA_L1:\n case AFMT_MPA_L2:\n case AFMT_MPA_L3:\n app_overlay_select(APP_OVERLAY_MPA);\n mpa_codec_main(CODEC_LOAD);\n break;\n // TODO: add APP_OVERLAY_APE\n#if 0\n case AFMT_APE:\n app_overlay_select(APP_OVERLAY_APE);\n ape_codec_main(CODEC_LOAD);\n break;\n case AFMT_SBC:\n app_overlay_select(APP_OVERLAY_A2DP);\n sbc_codec_main(CODEC_LOAD);\n break;\n case AFMT_FLAC:\n app_overlay_select(APP_OVERLAY_FLAC);\n flac_codec_main(CODEC_LOAD);\n break;\n case AFMT_PCM_WAV:\n app_overlay_select(APP_OVERLAY_WAV);\n wav_codec_main(CODEC_LOAD);\n break;\n#endif\n default:\n error(\"unkown codec type init\\n\");\n break;\n }\n\n return 0;\n}\n\nstatic int rb_codec_loop_on(void) {\n#ifdef __TWS__\n // set start transfer to slave\n tws_local_player_set_tran_2_slave_flag(1);\n#endif\n switch (song_format) {\n case AFMT_MPA_L1:\n case AFMT_MPA_L2:\n case AFMT_MPA_L3:\n mpa_codec_run();\n break;\n#if 0\n case AFMT_SBC:\n sbc_codec_run();\n break;\n case AFMT_FLAC:\n flac_codec_run();\n break;\n case AFMT_PCM_WAV:\n wav_codec_run();\n break;\n case AFMT_APE:\n ape_codec_run();\n break;\n#endif\n default:\n error(\"unkown codec type run\\n\");\n break;\n }\n return 0;\n}\n\nstatic int rb_thread_process_evt(RB_CTRL_CMD_T evt) {\n info(\"Decode event:%d\", evt);\n\n switch (evt) {\n case RB_CTRL_CMD_CODEC_INIT:\n rb_decode_halt_flag = 0;\n\n rb_play_init();\n\n /* get id3 */\n /* init ci info */\n ci->filesize = filesize(song_fd);\n ci->id3 = current_id3;\n ci->curpos = 0;\n\n dsp_configure(ci->dsp, DSP_RESET, 0);\n dsp_configure(ci->dsp, DSP_FLUSH, 0);\n\n rb_codec_init_desc();\n break;\n case RB_CTRL_CMD_CODEC_RUN:\n rbplay_loop_on = 1;\n\n info(\"Play start\");\n app_sysfreq_req(APP_SYSFREQ_USER_APP_PLAYER, rb_player_get_work_freq());\n app_stop_10_second_timer(APP_POWEROFF_TIMER_ID);\n rb_codec_loop_on();\n#if defined(__BTIF_AUTOPOWEROFF__)\n app_start_10_second_timer(APP_POWEROFF_TIMER_ID);\n#endif\n song_fd = 0;\n rb_decode_halt_flag = 1;\n if (thread_tid_waiter) {\n rb_player_sync_close_done();\n } else {\n rb_thread_send_status_change();\n rb_thread_send_switch(true);\n }\n#ifdef __TWS__\n // should update codec info after play one music\n codec_info.update_codec_info = 1;\n#endif\n rbplay_loop_on = 0;\n info(\"Play end\");\n break;\n default:\n error(\"Unkown rb cmd %d\\n\", evt);\n break;\n }\n\n return 0;\n}\n\nint rb_decode_mailbox_put(RBTHREAD_MSG_BLOCK *msg_src) {\n osStatus status;\n\n RBTHREAD_MSG_BLOCK *msg_p = NULL;\n\n msg_p = (RBTHREAD_MSG_BLOCK *)osMailAlloc(rb_decode_mailbox, 0);\n if (!msg_p) {\n TRACE(3, \"%s fail, evt:%d,arg=%d \\n\", __func__, msg_src->evt, msg_src->arg);\n return -1;\n }\n\n msg_p->evt = msg_src->evt;\n msg_p->arg = msg_src->arg;\n\n status = osMailPut(rb_decode_mailbox, msg_p);\n\n return (int)status;\n}\n\nint rb_decode_mailbox_free(RBTHREAD_MSG_BLOCK *msg_p) {\n osStatus status;\n\n status = osMailFree(rb_decode_mailbox, msg_p);\n\n return (int)status;\n}\n\nint rb_decode_mailbox_get(RBTHREAD_MSG_BLOCK **msg_p) {\n osEvent evt;\n evt = osMailGet(rb_decode_mailbox, osWaitForever);\n if (evt.status == osEventMail) {\n *msg_p = (RBTHREAD_MSG_BLOCK *)evt.value.p;\n return 0;\n }\n return -1;\n}\n\nstatic void rb_decode_thread(void const *argument) {\n RB_CTRL_CMD_T action;\n RBTHREAD_MSG_BLOCK *msg_p;\n\n while (1) {\n app_sysfreq_req(APP_SYSFREQ_USER_APP_PLAYER, APP_SYSFREQ_32K);\n // evt = osSignalWait(0, osWaitForever);\n if (0 == rb_decode_mailbox_get(&msg_p)) {\n app_sysfreq_req(APP_SYSFREQ_USER_APP_PLAYER, APP_SYSFREQ_104M);\n\n action = (RB_CTRL_CMD_T)msg_p->evt;\n rb_caller_tid = (osThreadId)msg_p->arg;\n\n TRACE(3, \"[%s] action:%d ,tid,0x%x\", __func__, action, rb_caller_tid);\n rb_thread_process_evt(action);\n\n rb_decode_mailbox_free(msg_p);\n if (rb_caller_tid)\n osSignalSet(rb_decode_tid, 0x1203);\n rb_caller_tid = NULL;\n }\n }\n}\n\nint app_rbplay_open(void) {\n if (rb_decode_tid != NULL) {\n warn(\"Decode thread reopen\");\n return -1;\n }\n\n rb_decode_mailbox = osMailCreate(osMailQ(rb_decode_mailbox), NULL);\n if (rb_decode_mailbox == NULL) {\n error(\"Failed to Create rb_decode_mailbox\");\n return -1;\n }\n\n rb_decode_tid = osThreadCreate(osThread(rb_decode_thread), NULL);\n if (rb_decode_tid == NULL) {\n error(\"Failed to Create rb_thread \\n\");\n return -1;\n }\n\n return 0;\n}\n\nint rb_codec_running(void) { return ((rb_decode_halt_flag == 0) ? 1 : 0); }\n\nvoid rb_codec_set_halt(int halt) { rb_decode_halt_flag = halt; }\n\nvoid rb_thread_set_decode_vars(int fd, int type, void *id3) {\n song_fd = fd;\n song_format = type;\n current_id3 = (struct mp3entry *)id3;\n}\n\nvoid rb_player_sync_set_wait_thread(osThreadId tid) {\n if (rbplay_loop_on)\n thread_tid_waiter = tid;\n else\n thread_tid_waiter = NULL;\n}\n\nvoid rb_player_sync_wait_close(void) {\n while (NULL != thread_tid_waiter) {\n osThreadYield();\n }\n}\n\nenum APP_SYSFREQ_FREQ_T rb_player_get_work_freq(void) {\n enum APP_SYSFREQ_FREQ_T freq;\n\n hal_sysfreq_print();\n\n info(\"bitrate:%d freq:%d\\n\", ci->id3->bitrate, ci->id3->frequency);\n#ifndef __TWS__\n enum AUD_SAMPRATE_T sample_rate = AUD_SAMPRATE_44100;\n sample_rate = (enum AUD_SAMPRATE_T)ci->id3->frequency;\n if (sample_rate > AUD_SAMPRATE_48000)\n freq = APP_SYSFREQ_208M;\n else if (sample_rate > AUD_SAMPRATE_44100)\n freq = APP_SYSFREQ_104M;\n else\n freq = APP_SYSFREQ_52M;\n\n if (ci->id3->bitrate > 192)\n freq = APP_SYSFREQ_208M;\n else if (ci->id3->bitrate > 128)\n freq = APP_SYSFREQ_104M;\n else\n freq = APP_SYSFREQ_52M;\n\n switch (song_format) {\n case AFMT_APE:\n freq = APP_SYSFREQ_208M;\n break;\n case AFMT_FLAC:\n freq = APP_SYSFREQ_208M;\n break;\n case AFMT_PCM_WAV:\n freq = APP_SYSFREQ_208M;\n break;\n default:\n break;\n }\n#else\n freq = APP_SYSFREQ_208M;\n#endif\n info(\"Decode thread run at: %d\", freq);\n return freq;\n}\n" }, { "path": "apps/audioplayers/rbplay/rbplay.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/* rbplay header */\n/* playback control & rockbox codec porting & codec thread */\n#ifndef RBPLAY_HEADER\n#define RBPLAY_HEADER\n\n/* ---- APIs ---- */\ntypedef enum _RB_CTRL_CMD_T {\n RB_CTRL_CMD_NONE = 0,\n RB_CTRL_CMD_SCAN_SONGS,\n RB_CTRL_CMD_CODEC_PARSE_FILE,\n RB_CTRL_CMD_CODEC_INIT,\n RB_CTRL_CMD_CODEC_RUN,\n RB_CTRL_CMD_CODEC_PAUSE,\n RB_CTRL_CMD_CODEC_STOP,\n RB_CTRL_CMD_CODEC_DEINIT,\n\n RB_CTRL_CMD_CODEC_SEEK,\n\n RB_CTRL_CMD_CODEC_MAX,\n} RB_CTRL_CMD_T;\n\nint app_rbplay_open(void);\nvoid rb_play_codec_init(void);\nint rb_codec_running(void);\n\n#endif /* RBPLAY_HEADER */\n" }, { "path": "apps/audioplayers/rbplay/rbplaysd.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/* rbplay source */\n/* playback control & rockbox codec porting & codec thread */\n\n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n\n#include \"SDFileSystem.h\"\n#include \"hal_trace.h\"\n#include \"metadata.h\"\n#include \"rbplaysd.h\"\n#include \"utils.h\"\n\n#define SD_LABEL \"sd\"\n#define PLAYLIST_PATH \"/sd/Playlist\"\n\nstatic SDFileSystem *sdfs = NULL;\n\n// TODO: remove ?\nstatic playlist_item sd_curritem;\n\nplaylist_struct sd_playlist;\n\nstatic void playlist_insert(playlist_item *item) {\n int fd;\n fd = open(PLAYLIST_PATH, O_RDWR | O_CREAT);\n if (fd <= 0) {\n error(\"Playlist open fail\");\n return;\n }\n\n lseek(fd, item->song_idx * sizeof(playlist_item), SEEK_SET);\n write(fd, item, sizeof(playlist_item));\n close(fd);\n}\n\nstatic bool sdcard_mount(void) {\n if (sdfs) {\n info(\"SD card already mount\");\n return true;\n }\n\n sdfs = new SDFileSystem(SD_LABEL);\n if (sdfs == NULL) {\n error(\"No memory for sd file system\");\n return false;\n }\n\n DIR *d;\n d = opendir(\"/\" SD_LABEL);\n\n if (!d) {\n warn(\"SD card mount error\");\n return false;\n }\n\n closedir(d);\n return true;\n}\n\nstatic void app_rbplay_gen_playlist(playlist_struct *list) {\n struct dirent *p;\n DIR *d;\n uint32_t total;\n int fd = 0;\n struct mp3entry current_id3;\n playlist_item *sd_curritem_p = &sd_curritem;\n\n memset(list, 0x0, sizeof(playlist_struct));\n\n d = opendir(\"/\" SD_LABEL);\n if (!d) {\n error(\"SD card open fail\");\n return;\n }\n\n info(\"---------gen audio list---------\");\n\n total = 0;\n while (p = readdir(d)) {\n if (probe_file_format(p->d_name) == AFMT_UNKNOWN)\n continue;\n\n memset(&sd_curritem, 0x0, sizeof(playlist_item));\n sd_curritem.song_idx = total;\n\n sprintf(sd_curritem.file_path, \"/\" SD_LABEL \"/%s\", p->d_name);\n sprintf(sd_curritem.file_name, \"%s\", p->d_name);\n\n info(\"Adding music: %s\", sd_curritem.file_path);\n\n fd = open(sd_curritem.file_path, O_RDONLY);\n\n if (fd <= 0) {\n error(\"File %s open error\", p->d_name);\n break;\n }\n\n get_metadata(¤t_id3, fd, sd_curritem.file_path);\n close(fd);\n\n if (current_id3.bitrate == 0 || current_id3.filesize == 0 ||\n current_id3.length == 0)\n break;\n\n info(\"bits:%d, type:%d, freq:%d\", current_id3.bitrate,\n current_id3.codectype, current_id3.frequency);\n\n sd_curritem_p->bitrate = current_id3.bitrate;\n sd_curritem_p->codectype = current_id3.codectype;\n sd_curritem_p->filesize = current_id3.filesize;\n sd_curritem_p->length = current_id3.length;\n sd_curritem_p->frequency = current_id3.frequency;\n\n#ifdef PARSER_DETAIL\n char *str;\n str = current_id3.title;\n if (str != NULL) {\n memset(sd_curritem_p->title, 0x0, MP3_TITLE_LEN);\n memcpy(sd_curritem_p->title, str,\n strlen(str) > MP3_TITLE_LEN ? MP3_TITLE_LEN : strlen(str));\n }\n\n str = current_id3.artist;\n if (str != NULL) {\n memset(sd_curritem_p->artist, 0x0, MP3_ARTIST_LEN);\n memcpy(sd_curritem_p->artist, str,\n strlen(str) > MP3_ARTIST_LEN ? MP3_ARTIST_LEN : strlen(str));\n }\n\n str = current_id3.album;\n if (str != NULL) {\n memset(sd_curritem_p->album, 0x0, MP3_ALBUM_LEN);\n memcpy(sd_curritem_p->album, str,\n strlen(str) > MP3_ALBUM_LEN ? MP3_ALBUM_LEN : strlen(str));\n }\n\n str = current_id3.genre_string;\n if (str != NULL) {\n memset(sd_curritem_p->genre, 0x0, MP3_GENRE_LEN);\n memcpy(sd_curritem_p->genre, str,\n strlen(str) > MP3_GENRE_LEN ? MP3_GENRE_LEN : strlen(str));\n }\n\n str = current_id3.composer;\n if (str != NULL) {\n memset(sd_curritem_p->composer, 0x0, MP3_COMPOSER_LEN);\n memcpy(sd_curritem_p->composer, str,\n strlen(str) > MP3_COMPOSER_LEN ? MP3_COMPOSER_LEN : strlen(str));\n }\n#endif\n playlist_insert(sd_curritem_p);\n total++;\n }\n\n list->total_songs = total;\n list->current_item = sd_curritem_p;\n\n closedir(d);\n info(\"---------%d audio file searched---------\", total);\n}\n\nvoid app_rbplay_load_playlist(playlist_struct *list) {\n if (sdcard_mount() == false)\n return;\n\n remove(PLAYLIST_PATH);\n\n app_rbplay_gen_playlist(list);\n}\n\nplaylist_item *app_rbplay_get_playitem(const int idx) {\n int fd;\n if (idx >= sd_playlist.total_songs) {\n warn(\"Index exceed: %d / %d\", idx, sd_playlist.total_songs);\n return NULL;\n }\n\n fd = open(PLAYLIST_PATH, O_RDONLY);\n\n if (fd <= 0) {\n warn(\"SD card playlist can not open\");\n return NULL;\n }\n\n lseek(fd, sizeof(playlist_item) * idx, SEEK_SET);\n read(fd, sd_playlist.current_item, sizeof(playlist_item));\n info(\"Get playitem: %d: %s\", idx, sd_playlist.current_item->file_path);\n\n close(fd);\n\n return sd_playlist.current_item;\n}\n\nint app_ctl_remove_file(const int idx) {\n playlist_item *item = app_rbplay_get_playitem(idx);\n if (!item)\n return -1;\n remove(item->file_path);\n\n return 0;\n}\n" }, { "path": "apps/audioplayers/rbplay/rbplaysd.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __RBPLAYSD_H_\n#define __RBPLAYSD_H_\n\n#include \n\n//playlist\n#define FILE_PATH_LEN (128+4)\n#define FILE_SHORT_NAME_LEN (128)\n#define MP3_TITLE_LEN (128)\n#define MP3_ARTIST_LEN (128)\n#define MP3_ALBUM_LEN (128)\n#define MP3_GENRE_LEN (128)\n#define MP3_COMPOSER_LEN (128)\n#define MP3_YEAR_STRING_LEN (8)\n#define MP3_TRACK_LEN (128)\n\ntypedef struct {\n char file_path[FILE_PATH_LEN];\n char file_name[FILE_SHORT_NAME_LEN];\n#ifdef PARSER_DETAIL\n uint16_t title[MP3_TITLE_LEN];\n uint16_t artist[MP3_ARTIST_LEN];\n uint16_t album[MP3_ALBUM_LEN];\n uint16_t genre[MP3_GENRE_LEN];\n uint16_t composer[MP3_COMPOSER_LEN];\n uint16_t year[MP3_YEAR_STRING_LEN];\n uint16_t track[MP3_TRACK_LEN];\n#endif\n uint16_t song_idx;\n\n unsigned int codectype;\n unsigned int bitrate;\n unsigned long frequency;\n\n unsigned long filesize; /* without headers; in bytes */\n unsigned long length; /* song length in ms */\n} playlist_item;\n\ntypedef struct {\n playlist_item *current_item;\n uint16_t total_songs;\n} playlist_struct;\n\nvoid app_rbplay_load_playlist(playlist_struct *list);\nplaylist_item *app_rbplay_get_playitem(const int idx);\nint app_ctl_remove_file(const int idx);\n\n#endif\n" }, { "path": "apps/audioplayers/rbplay/utils.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef RBPLAY_UTILS_H\n#define RBPLAY_UTILS_H\n\n#undef warn\n#undef error\n\n#define info(str, ...) TRACE(str, ##__VA_ARGS__)\n#define warn(str, ...) TRACE(\"\\033[31mwarn: \\033[0m\" str, ##__VA_ARGS__)\n#define error(str, ...) TRACE(\"\\033[31merr: \\033[0m\" str, ##__VA_ARGS__)\n\n#endif\n" }, { "path": "apps/audioplayers/voice_test.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_utils.h\"\n#include \"audio_dump.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n// #include \"local_wav.h\"\n\n#define CHANNEL_NUM (2)\n\n#define CHAR_BYTES (1)\n#define SHORT_BYTES (2)\n#define INT_BYTES (4)\n\n#define SAMPLE_BITS (16)\n#define SAMPLE_BYTES (SAMPLE_BITS / 8)\n\n#define TX_SAMPLE_RATE (16000)\n#define RX_SAMPLE_RATE (16000)\n\n#define TX_FRAME_LEN (256)\n#define RX_FRAME_LEN (256)\n\n#define TX_BUF_SIZE (TX_FRAME_LEN * CHANNEL_NUM * SAMPLE_BYTES * 2)\n#define RX_BUF_SIZE (RX_FRAME_LEN * CHANNEL_NUM * SAMPLE_BYTES * 2)\n\n#if SAMPLE_BYTES == SHORT_BYTES\ntypedef short VOICE_PCM_T;\n#elif SAMPLE_BYTES == INT_BYTES\ntypedef int VOICE_PCM_T;\n#else\n#error \"Invalid SAMPLE_BYTES!!!\"\n#endif\n\nstatic uint8_t POSSIBLY_UNUSED codec_capture_buf[TX_BUF_SIZE];\nstatic uint8_t POSSIBLY_UNUSED codec_playback_buf[RX_BUF_SIZE];\n\nstatic uint32_t POSSIBLY_UNUSED codec_capture_cnt = 0;\nstatic uint32_t POSSIBLY_UNUSED codec_playback_cnt = 0;\n\n#define CODEC_STREAM_ID AUD_STREAM_ID_0\n\nstatic uint32_t codec_capture_callback(uint8_t *buf, uint32_t len) {\n int POSSIBLY_UNUSED pcm_len = len / sizeof(VOICE_PCM_T) / CHANNEL_NUM;\n VOICE_PCM_T POSSIBLY_UNUSED *pcm_buf[CHANNEL_NUM];\n int interval_len = len * 2 / CHANNEL_NUM;\n\n for (int i = 0; i < CHANNEL_NUM; i++) {\n pcm_buf[i] = (VOICE_PCM_T *)(buf + i * interval_len);\n }\n\n // TRACE(2,\"[%s] cnt = %d\", __func__, codec_capture_cnt++);\n\n audio_dump_add_channel_data(0, pcm_buf[0], pcm_len);\n audio_dump_add_channel_data(1, pcm_buf[0], pcm_len);\n audio_dump_run();\n\n return len;\n}\n\nstatic uint32_t codec_playback_callback(uint8_t *buf, uint32_t len) {\n int POSSIBLY_UNUSED pcm_len = len / sizeof(VOICE_PCM_T) / CHANNEL_NUM;\n VOICE_PCM_T POSSIBLY_UNUSED *pcm_buf[CHANNEL_NUM];\n int interval_len = len * 2 / CHANNEL_NUM;\n\n for (int i = 0; i < CHANNEL_NUM; i++) {\n pcm_buf[i] = (VOICE_PCM_T *)(buf + i * interval_len);\n }\n\n // TRACE(2,\"[%s] cnt = %d\", __func__, codec_playback_cnt++);\n\n return len;\n}\n\nstatic int voice_start(bool on) {\n int ret = 0;\n static bool isRun = false;\n enum APP_SYSFREQ_FREQ_T freq = APP_SYSFREQ_208M;\n struct AF_STREAM_CONFIG_T stream_cfg;\n\n if (isRun == on) {\n return 0;\n }\n\n if (on) {\n TRACE(1, \"[%s]] ON\", __func__);\n\n af_set_priority(AF_USER_TEST, osPriorityHigh);\n\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, freq);\n TRACE(2, \"[%s] sys freq calc : %d\\n\", __func__,\n hal_sys_timer_calc_cpu_freq(5, 0));\n\n // Initialize Cqueue\n codec_capture_cnt = 0;\n codec_playback_cnt = 0;\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n stream_cfg.channel_num = (enum AUD_CHANNEL_NUM_T)CHANNEL_NUM;\n stream_cfg.data_size = TX_BUF_SIZE;\n stream_cfg.sample_rate = (enum AUD_SAMPRATE_T)TX_SAMPLE_RATE;\n stream_cfg.bits = (enum AUD_BITS_T)SAMPLE_BITS;\n stream_cfg.vol = 12;\n stream_cfg.chan_sep_buf = true;\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = AUD_INPUT_PATH_MAINMIC;\n stream_cfg.handler = codec_capture_callback;\n stream_cfg.data_ptr = codec_capture_buf;\n\n TRACE(3, \"[%s] codec capture sample_rate: %d, data_size: %d\", __func__,\n stream_cfg.sample_rate, stream_cfg.data_size);\n af_stream_open(CODEC_STREAM_ID, AUD_STREAM_CAPTURE, &stream_cfg);\n ASSERT(ret == 0, \"codec capture failed: %d\", ret);\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n stream_cfg.channel_num = (enum AUD_CHANNEL_NUM_T)CHANNEL_NUM;\n stream_cfg.data_size = RX_BUF_SIZE;\n stream_cfg.sample_rate = (enum AUD_SAMPRATE_T)RX_SAMPLE_RATE;\n stream_cfg.bits = (enum AUD_BITS_T)SAMPLE_BITS;\n stream_cfg.vol = 12;\n stream_cfg.chan_sep_buf = true;\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n stream_cfg.handler = codec_playback_callback;\n stream_cfg.data_ptr = codec_playback_buf;\n\n TRACE(3, \"[%s] codec playback sample_rate: %d, data_size: %d\", __func__,\n stream_cfg.sample_rate, stream_cfg.data_size);\n af_stream_open(CODEC_STREAM_ID, AUD_STREAM_PLAYBACK, &stream_cfg);\n ASSERT(ret == 0, \"codec playback failed: %d\", ret);\n\n audio_dump_init(TX_FRAME_LEN, sizeof(VOICE_PCM_T), 1);\n\n // Start\n af_stream_start(CODEC_STREAM_ID, AUD_STREAM_CAPTURE);\n af_stream_start(CODEC_STREAM_ID, AUD_STREAM_PLAYBACK);\n } else {\n // Close stream\n af_stream_stop(CODEC_STREAM_ID, AUD_STREAM_PLAYBACK);\n af_stream_stop(CODEC_STREAM_ID, AUD_STREAM_CAPTURE);\n\n audio_dump_deinit();\n\n af_stream_close(CODEC_STREAM_ID, AUD_STREAM_PLAYBACK);\n af_stream_close(CODEC_STREAM_ID, AUD_STREAM_CAPTURE);\n\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n\n af_set_priority(AF_USER_TEST, osPriorityAboveNormal);\n\n TRACE(1, \"[%s] OFF\", __func__);\n }\n\n isRun = on;\n return 0;\n}\n\nstatic bool voice_test_status = true;\nvoid voice_test(void) {\n TRACE(2, \"[%s] status = %d\", __func__, voice_test_status);\n\n voice_start(voice_test_status);\n voice_test_status = !voice_test_status;\n}" }, { "path": "apps/audioplayers/voicebtpcmplay.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"app_audio.h\"\n#include \"app_overlay.h\"\n#include \"app_ring_merge.h\"\n#include \"audio_prompt_sbc.h\"\n#include \"bt_sco_chain.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"hfp_api.h\"\n#include \"iir_resample.h\"\n#include \"plat_types.h\"\n#include \"tgt_hardware.h\"\n#include \n#include \n#include \n#include \n#include \n#ifdef TX_RX_PCM_MASK\n#include \"bt_drv_interface.h\"\n#endif\n\n#define ENABLE_LPC_PLC\n\n#define ENABLE_PLC_ENCODER\n\n// BT\n#include \"a2dp_api.h\"\n#ifdef TX_RX_PCM_MASK\n#include \"bt_drv_interface.h\"\n#include \"hal_chipid.h\"\n\n#endif\n\n#include \"plc_utils.h\"\nextern \"C\" {\n\n#include \"plc_8000.h\"\n#include \"speech_utils.h\"\n\n#if defined(HFP_1_6_ENABLE)\n#include \"codec_sbc.h\"\n#if defined(ENABLE_LPC_PLC)\n#include \"lpc_plc_api.h\"\n#else\n#include \"plc_16000.h\"\n#endif\n#endif\n\n#if defined(CVSD_BYPASS)\n#include \"Pcm8k_Cvsd.h\"\n#endif\n\n#if defined(SPEECH_TX_24BIT)\nextern int32_t *aec_echo_buf;\n#else\nextern short *aec_echo_buf;\n#endif\n\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\nstatic uint8_t *echo_buf_queue;\nstatic uint16_t echo_buf_q_size;\nstatic uint16_t echo_buf_q_wpos;\nstatic uint16_t echo_buf_q_rpos;\nstatic bool echo_buf_q_full;\n#endif\n#endif\nstatic void *speech_plc;\n}\n\n// #define PENDING_MSBC_DECODER_ALG\n\n// #define SPEECH_RX_PLC_DUMP_DATA\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n#include \"audio_dump.h\"\nint16_t *audio_dump_temp_buf = NULL;\n#endif\n\n// app_bt_stream.cpp::bt_sco_player(), used buffer size\n#define APP_BT_STREAM_USE_BUF_SIZE (1024 * 2)\n#if defined(SCO_OPTIMIZE_FOR_RAM)\nuint8_t *sco_overlay_ram_buf = NULL;\nint sco_overlay_ram_buf_len = 0;\n#endif\n\nstatic bool resample_needed_flag = false;\nstatic int sco_frame_length;\nstatic int codec_frame_length;\nstatic int16_t *upsample_buf_for_msbc = NULL;\nstatic int16_t *downsample_buf_for_msbc = NULL;\nstatic IirResampleState *upsample_st = NULL;\nstatic IirResampleState *downsample_st = NULL;\n\n#define VOICEBTPCM_TRACE(s, ...)\n// TRACE(s, ##__VA_ARGS__)\n\n/* voicebtpcm_pcm queue */\n#define FRAME_NUM (4)\n\n#define VOICEBTPCM_PCM_16k_FRAME_LENGTH \\\n (SPEECH_FRAME_MS_TO_LEN(16000, SPEECH_SCO_FRAME_MS))\n#define VOICEBTPCM_PCM_16K_QUEUE_SIZE \\\n (VOICEBTPCM_PCM_16k_FRAME_LENGTH * FRAME_NUM)\n\n#define VOICEBTPCM_PCM_8k_FRAME_LENGTH \\\n (SPEECH_FRAME_MS_TO_LEN(8000, SPEECH_SCO_FRAME_MS))\n#define VOICEBTPCM_PCM_8K_QUEUE_SIZE \\\n (VOICEBTPCM_PCM_8k_FRAME_LENGTH * FRAME_NUM)\n\n// #endif\nCQueue voicebtpcm_p2m_pcm_queue;\nCQueue voicebtpcm_m2p_pcm_queue;\n\nstatic int32_t voicebtpcm_p2m_cache_threshold;\nstatic int32_t voicebtpcm_m2p_cache_threshold;\n\nstatic int32_t voicebtpcm_p2m_pcm_cache_size;\nstatic int32_t voicebtpcm_m2p_pcm_cache_size;\n\nstatic enum APP_AUDIO_CACHE_T voicebtpcm_cache_m2p_status = APP_AUDIO_CACHE_QTY;\nstatic enum APP_AUDIO_CACHE_T voicebtpcm_cache_p2m_status = APP_AUDIO_CACHE_QTY;\n\nextern bool bt_sco_codec_is_msbc(void);\n#define ENCODE_TEMP_PCM_LEN (120)\n\n#define MSBC_FRAME_SIZE (60)\n#if defined(HFP_1_6_ENABLE)\nstatic btif_sbc_decoder_t msbc_decoder;\nstatic float msbc_eq_band_gain[CFG_HW_AUD_EQ_NUM_BANDS] = {0, 0, 0, 0,\n 0, 0, 0, 0};\n\n#define MSBC_ENCODE_PCM_LEN (240)\n\nunsigned char *temp_msbc_buf;\nunsigned char *temp_msbc_buf1;\n\n#if defined(ENABLE_LPC_PLC)\nLpcPlcState *msbc_plc_state = NULL;\n#else\nstruct PLC_State msbc_plc_state;\n#endif\n\n#ifdef ENABLE_PLC_ENCODER\nstatic btif_sbc_encoder_t *msbc_plc_encoder;\nstatic int16_t *msbc_plc_encoder_buffer = NULL;\n#define MSBC_CODEC_DELAY (73)\nstatic uint8_t enc_tmp_buf[MSBC_FRAME_SIZE - 3];\nstatic uint8_t dec_tmp_buf[MSBC_ENCODE_PCM_LEN];\n#endif\n\n// static sbc_encoder_t sbc_Encoder1;\n// static btif_sbc_pcm_data_t PcmEncData1;\nstatic btif_sbc_encoder_t *msbc_encoder;\nstatic btif_sbc_pcm_data_t msbc_encoder_pcmdata;\nstatic unsigned char msbc_counter = 0x08;\n#endif\n\nint decode_msbc_frame(unsigned char *pcm_buffer, unsigned int pcm_len);\nint decode_cvsd_frame(unsigned char *pcm_buffer, unsigned int pcm_len);\n\n// playback flow\n// bt-->store_voicebtpcm_m2p_buffer-->decode_voicebtpcm_m2p_frame-->audioflinger\n// playback-->speaker used by playback, store data from bt to memory\nint store_voicebtpcm_m2p_buffer(unsigned char *buf, unsigned int len) {\n // TRACE(2,\"[%s]: %d\", __FUNCTION__,\n // FAST_TICKS_TO_US(hal_fast_sys_timer_get()));\n int size;\n#if defined(HFP_1_6_ENABLE)\n if (bt_sco_codec_is_msbc()) {\n decode_msbc_frame(buf, len);\n } else\n#endif\n {\n#if defined(CVSD_BYPASS)\n decode_cvsd_frame(buf, len);\n#endif\n if (speech_plc) {\n speech_plc_8000((PlcSt_8000 *)speech_plc, (short *)buf, len);\n }\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_EnCQueue(&voicebtpcm_m2p_pcm_queue, (unsigned char *)buf, len);\n UNLOCK_APP_AUDIO_QUEUE();\n }\n\n size = APP_AUDIO_LengthOfCQueue(&voicebtpcm_m2p_pcm_queue);\n\n if (size >= voicebtpcm_m2p_cache_threshold) {\n voicebtpcm_cache_m2p_status = APP_AUDIO_CACHE_OK;\n }\n\n // TRACE(2,\"m2p :%d/%d\", len, size);\n\n return 0;\n}\n\n#if defined(CVSD_BYPASS)\n#define VOICECVSD_TEMP_BUFFER_SIZE 120\n#define VOICECVSD_ENC_SIZE 60\nstatic short cvsd_decode_buff[VOICECVSD_TEMP_BUFFER_SIZE * 2];\n\nint decode_cvsd_frame(unsigned char *pcm_buffer, unsigned int pcm_len) {\n uint32_t r = 0, decode_len = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n\n while (decode_len < pcm_len) {\n LOCK_APP_AUDIO_QUEUE();\n len1 = len2 = 0;\n e1 = e2 = 0;\n r = APP_AUDIO_PeekCQueue(&voicebtpcm_m2p_pcm_queue,\n VOICECVSD_TEMP_BUFFER_SIZE, &e1, &len1, &e2,\n &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n\n if (r == CQ_ERR) {\n memset(pcm_buffer, 0, pcm_len);\n TRACE(0, \"cvsd spk buff underflow\");\n return 0;\n }\n\n if (len1 != 0) {\n CvsdToPcm8k(e1, (short *)(cvsd_decode_buff), len1, 0);\n\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, len1);\n UNLOCK_APP_AUDIO_QUEUE();\n\n decode_len += len1 * 2;\n }\n\n if (len2 != 0) {\n CvsdToPcm8k(e2, (short *)(cvsd_decode_buff), len2, 0);\n\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, len2);\n UNLOCK_APP_AUDIO_QUEUE();\n\n decode_len += len2 * 2;\n }\n }\n\n memcpy(pcm_buffer, cvsd_decode_buff, decode_len);\n\n return decode_len;\n}\n\nint encode_cvsd_frame(unsigned char *pcm_buffer, unsigned int pcm_len) {\n uint32_t r = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n uint32_t processed_len = 0;\n uint32_t remain_len = 0, enc_len = 0;\n\n while (processed_len < pcm_len) {\n remain_len = pcm_len - processed_len;\n\n if (remain_len >= (VOICECVSD_ENC_SIZE * 2)) {\n enc_len = VOICECVSD_ENC_SIZE * 2;\n } else {\n enc_len = remain_len;\n }\n\n LOCK_APP_AUDIO_QUEUE();\n len1 = len2 = 0;\n e1 = e2 = 0;\n r = APP_AUDIO_PeekCQueue(&voicebtpcm_p2m_pcm_queue, enc_len, &e1, &len1,\n &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n\n if (r == CQ_ERR) {\n memset(pcm_buffer, 0x55, pcm_len);\n TRACE(0, \"cvsd spk buff underflow\");\n return 0;\n }\n\n if (e1) {\n Pcm8kToCvsd((short *)e1, (unsigned char *)(pcm_buffer + processed_len),\n len1 / 2);\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&voicebtpcm_p2m_pcm_queue, NULL, len1);\n UNLOCK_APP_AUDIO_QUEUE();\n processed_len += len1;\n }\n if (e2) {\n Pcm8kToCvsd((short *)e2, (unsigned char *)(pcm_buffer + processed_len),\n len2 / 2);\n LOCK_APP_AUDIO_QUEUE();\n DeCQueue(&voicebtpcm_p2m_pcm_queue, NULL, len2);\n UNLOCK_APP_AUDIO_QUEUE();\n processed_len += len2;\n }\n }\n\n#if 0\n for (int cc = 0; cc < 32; ++cc)\n {\n TRACE(1,\"%x-\", e1[cc]);\n }\n#endif\n\n TRACE(3, \"%s: processed_len %d, pcm_len %d\", __func__, processed_len,\n pcm_len);\n\n return processed_len;\n}\n#endif\n\n#if defined(HFP_1_6_ENABLE)\ninline int sco_parse_synchronization_header(uint8_t *buf, uint8_t *sn) {\n uint8_t sn1, sn2;\n *sn = 0xff;\n if ((buf[0] != 0x01) || ((buf[1] & 0x0f) != 0x08) || (buf[2] != 0xad)) {\n return -1;\n }\n\n sn1 = (buf[1] & 0x30) >> 4;\n sn2 = (buf[1] & 0xc0) >> 6;\n if ((sn1 != 0) && (sn1 != 0x3)) {\n return -2;\n }\n if ((sn2 != 0) && (sn2 != 0x3)) {\n return -3;\n }\n\n *sn = (sn1 & 0x01) | (sn2 & 0x02);\n\n return 0;\n}\n\n#if 1\n#define MSBC_LEN_FORMBT_PER_FRAME (120) // Bytes; only for BES platform.\n#define SAMPLES_LEN_PER_FRAME (120)\n#define MSBC_LEN_PER_FRAME (57 + 3)\n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || \\\n defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A) || \\\n defined(CHIP_BEST2001)\n#define MSBC_MUTE_PATTERN (0x5555)\n#else\n#define MSBC_MUTE_PATTERN (0x0000)\n#endif\n\n#if !defined(PENDING_MSBC_DECODER_ALG)\nshort DecPcmBuf[SAMPLES_LEN_PER_FRAME];\nunsigned char DecMsbcBuf[MSBC_LEN_PER_FRAME];\nunsigned short DecMsbcBufAll[MSBC_LEN_FORMBT_PER_FRAME * 5];\nunsigned int next_frame_flag = 0;\nstatic int msbc_find_first_sync = 0;\nstatic unsigned int msbc_offset = 0;\n\nstatic PacketLossState pld;\n\nint decode_msbc_frame(unsigned char *msbc_btpcm_buffer, unsigned int msbc_len) {\n\n btif_sbc_pcm_data_t pcm_data;\n unsigned int msbc_offset_lowdelay = 0;\n unsigned int i, j;\n unsigned short *msbc_buffer = (unsigned short *)msbc_btpcm_buffer;\n int frame_flag[6]; // 1: good frame; 0:bad frame;\n bt_status_t ret;\n unsigned int frame_counter = 0;\n unsigned short byte_decode = 0;\n unsigned int msbc_offset_total = 0;\n int msbc_offset_drift[6] = {\n 0,\n };\n\n // unsigned int timer_begin=hal_sys_timer_get();\n\n // TRACE(1,\"decode_msbc_frame,msbc_len:%d\",msbc_len);\n#ifdef TX_RX_PCM_MASK\n if (btdrv_is_pcm_mask_enable() == 1) {\n memcpy((uint8_t *)DecMsbcBufAll, msbc_buffer, msbc_len);\n } else\n#endif\n {\n for (i = 0; i < msbc_len / 2; i++) {\n DecMsbcBufAll[i + (MSBC_LEN_FORMBT_PER_FRAME / 2)] = msbc_buffer[i];\n }\n }\n\n /*\n for(i =0; i=\n msbc_offset_total)\n frame_flag[j] = 3;\n else\n frame_flag[j] = 1;\n }\n }\n }\n }\n#ifdef TX_RX_PCM_MASK\n if (btdrv_is_pcm_mask_enable() == 0)\n#endif\n {\n for (j = 0; j < msbc_len / MSBC_LEN_FORMBT_PER_FRAME; j++) {\n value = value | frame_flag[j];\n }\n // abnormal msbc packet.\n if (value > 1)\n msbc_find_first_sync = 0;\n }\n }\n\n while (frame_counter < msbc_len / MSBC_LEN_FORMBT_PER_FRAME) {\n // TRACE(3,\"[%s] decoding, offset %d, offset drift %d\", __FUNCTION__,\n // msbc_offset, msbc_offset_drift[frame_counter]);\n // skip first byte when msbc_offset == 0 and msbc_offset_drift == -1\n unsigned int start_idx = 0;\n if (msbc_offset_lowdelay == 0 && msbc_offset_drift[frame_counter] == -1) {\n start_idx = 1;\n DecMsbcBuf[0] = 0x01;\n }\n for (i = start_idx; i < MSBC_LEN_PER_FRAME; i++) {\n // DecMsbcBuf[i]=DecMsbcBufAll[i+msbc_offset_lowdelay+frame_counter*(MSBC_LEN_FORMBT_PER_FRAME/2)+2]>>8;\n DecMsbcBuf[i] =\n DecMsbcBufAll[i + msbc_offset_lowdelay +\n msbc_offset_drift[frame_counter] +\n frame_counter * (MSBC_LEN_FORMBT_PER_FRAME / 2)] >>\n 8;\n }\n\n // TRACE(1,\"msbc header:0x%x\",DecMsbcBuf[0]);\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_add_channel_data(2, (short *)DecMsbcBuf, MSBC_LEN_PER_FRAME / 2);\n#endif\n\n plc_type_t plc_type = packet_loss_detection_process(&pld, DecMsbcBuf);\n\n if (plc_type != PLC_TYPE_PASS) {\n memset(DecPcmBuf, 0, sizeof(DecPcmBuf));\n goto do_plc;\n }\n\n pcm_data.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n pcm_data.numChannels = 1;\n pcm_data.dataLen = 0;\n pcm_data.data = (uint8_t *)DecPcmBuf;\n\n ret = btif_sbc_decode_frames(&msbc_decoder, (unsigned char *)DecMsbcBuf,\n MSBC_LEN_PER_FRAME, &byte_decode, &pcm_data,\n SAMPLES_LEN_PER_FRAME * 2, msbc_eq_band_gain);\n\n // ASSERT(ret == BT_STS_SUCCESS, \"[%s] msbc decoder should never fail\",\n // __FUNCTION__);\n if (ret != BT_STS_SUCCESS) {\n plc_type = PLC_TYPE_DECODER_ERROR;\n packet_loss_detection_update_histogram(&pld, plc_type);\n }\n\n do_plc:\n if (plc_type == PLC_TYPE_PASS) {\n#if defined(ENABLE_LPC_PLC)\n lpc_plc_save(msbc_plc_state, DecPcmBuf);\n#else\n PLC_good_frame(&msbc_plc_state, DecPcmBuf, DecPcmBuf);\n#endif\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_add_channel_data(0, (short *)DecPcmBuf,\n MSBC_ENCODE_PCM_LEN / 2);\n#endif\n } else {\n TRACE(1, \"PLC bad frame, plc_type: %d\", plc_type);\n#if defined(PLC_DEBUG_PRINT_DATA)\n DUMP8(\"0x%02x, \", DecMsbcBuf, 60);\n#endif\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n for (uint32_t i = 0; i < MSBC_ENCODE_PCM_LEN / 2; i++) {\n audio_dump_temp_buf[i] = (plc_type - 1) * 5000;\n }\n audio_dump_add_channel_data(0, audio_dump_temp_buf,\n MSBC_ENCODE_PCM_LEN / 2);\n#endif\n#if defined(ENABLE_LPC_PLC)\n lpc_plc_generate(msbc_plc_state, DecPcmBuf,\n#if defined(ENABLE_PLC_ENCODER)\n msbc_plc_encoder_buffer\n#else\n NULL\n#endif\n );\n\n#if defined(ENABLE_PLC_ENCODER)\n pcm_data.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n pcm_data.numChannels = 1;\n pcm_data.dataLen = MSBC_ENCODE_PCM_LEN;\n pcm_data.data = (uint8_t *)(msbc_plc_encoder_buffer + MSBC_CODEC_DELAY);\n\n uint16_t encoded_bytes = 0, buf_len = MSBC_FRAME_SIZE - 3;\n ret = btif_sbc_encode_frames(msbc_plc_encoder, &pcm_data, &encoded_bytes,\n enc_tmp_buf, &buf_len, 0xFFFF);\n ASSERT(ret == BT_STS_SUCCESS, \"[%s] plc encoder must success\",\n __FUNCTION__);\n ASSERT(encoded_bytes == MSBC_ENCODE_PCM_LEN,\n \"[%s] plc encoder encoded bytes error\", __FUNCTION__);\n ASSERT(buf_len == MSBC_FRAME_SIZE - 3,\n \"[%s] plc encoder encoded stream length error\", __FUNCTION__);\n\n pcm_data.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n pcm_data.numChannels = 1;\n pcm_data.dataLen = 0;\n pcm_data.data = dec_tmp_buf;\n ret = btif_sbc_decode_frames(&msbc_decoder, enc_tmp_buf,\n MSBC_FRAME_SIZE - 3, &byte_decode, &pcm_data,\n MSBC_ENCODE_PCM_LEN, msbc_eq_band_gain);\n ASSERT(ret == BT_STS_SUCCESS, \"[%s] plc decoder must success\",\n __FUNCTION__);\n ASSERT(byte_decode == MSBC_FRAME_SIZE - 3,\n \"[%s] plc decoder decoded bytes error\", __FUNCTION__);\n#endif\n\n#else\n pcm_data.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n pcm_data.numChannels = 1;\n pcm_data.dataLen = 0;\n pcm_data.data = (uint8_t *)DecPcmBuf;\n\n ret =\n btif_sbc_decode_frames(&msbc_decoder, (unsigned char *)indices0,\n MSBC_LEN_PER_FRAME, &byte_decode, &pcm_data,\n SAMPLES_LEN_PER_FRAME * 2, msbc_eq_band_gain);\n\n PLC_bad_frame(&msbc_plc_state, DecPcmBuf, DecPcmBuf);\n\n ASSERT(ret == BT_STS_SUCCESS, \"[%s] msbc decoder should never fail\",\n __FUNCTION__);\n#endif\n }\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_add_channel_data(1, (short *)DecPcmBuf, MSBC_ENCODE_PCM_LEN / 2);\n audio_dump_run();\n#endif\n\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_EnCQueue(&voicebtpcm_m2p_pcm_queue, (unsigned char *)DecPcmBuf,\n (unsigned int)(SAMPLES_LEN_PER_FRAME * 2));\n UNLOCK_APP_AUDIO_QUEUE();\n frame_counter++;\n }\n#ifdef TX_RX_PCM_MASK\n if (btdrv_is_pcm_mask_enable() == 0)\n#endif\n {\n for (i = 0; i < MSBC_LEN_FORMBT_PER_FRAME / 2; i++) {\n DecMsbcBufAll[i] = DecMsbcBufAll[i + (msbc_len / 2)];\n }\n }\n // TRACE(1,\"msbc + plc:%d\", (hal_sys_timer_get()-timer_begin));\n\n return 0;\n}\n\n#else\nstatic uint8_t *msbc_buf_before_decode;\n\nshort DecPcmBuf[SAMPLES_LEN_PER_FRAME];\nunsigned char DecMsbcBuf[MSBC_LEN_PER_FRAME];\nunsigned short DecMsbcBufAll[MSBC_LEN_FORMBT_PER_FRAME * 5];\nunsigned char DecVerifyMsbcBuf[MSBC_LEN_PER_FRAME * 2];\nunsigned int next_frame_flag = 0;\nuint8_t last_msbc_sync_num = 0;\nCQueue msbc_temp_queue;\n\n__attribute__((section(\".fast_text_sram\"))) int\ndecode_msbc_frame(unsigned char *msbc_btpcm_buffer, unsigned int msbc_len) {\n btif_sbc_pcm_data_t pcm_data;\n uint16_t msbc_queue_len = 0, msbc_sync_offset = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n int r = 0;\n uint8_t sync_num = 0, verify_result = 0;\n uint8_t frame_decode_num = 0;\n int plc_num = 0;\n bt_status_t ret;\n unsigned short byte_decode = 0;\n\n pcm_data.data = (unsigned char *)DecPcmBuf;\n pcm_data.dataLen = 0;\n\n // put msbc in queue\n for (int j = 0; j < (int)msbc_len; j += MSBC_LEN_PER_FRAME * 2) {\n for (int i = 0; i < MSBC_LEN_PER_FRAME; i++) {\n DecMsbcBuf[i] = msbc_btpcm_buffer[2 * i + 1 + j];\n }\n APP_AUDIO_EnCQueue(&msbc_temp_queue, DecMsbcBuf, MSBC_LEN_PER_FRAME);\n }\n\nmsbc_find_sync_again:\n msbc_queue_len = APP_AUDIO_LengthOfCQueue(&msbc_temp_queue);\n TRACE(1, \"length = %d\", msbc_queue_len);\n if (msbc_queue_len > MSBC_LEN_PER_FRAME * 2)\n msbc_queue_len = MSBC_LEN_PER_FRAME * 2;\n else if (msbc_queue_len < MSBC_LEN_PER_FRAME)\n return 0;\n\n r = APP_AUDIO_PeekCQueue(&msbc_temp_queue, msbc_queue_len, &e1, &len1, &e2,\n &len2);\n if (r == CQ_OK) {\n if (len1) {\n memcpy(DecVerifyMsbcBuf, e1, len1);\n }\n if (len2 != 0) {\n memcpy(DecVerifyMsbcBuf + len1, e2, len2);\n }\n } else {\n // can't happen\n }\n\n // DUMP8(\"%02x\", DecVerifyMsbcBuf, msbc_queue_len);\n // find sync head\n for (int i = 0; i < (msbc_queue_len - 3); i++) {\n // verify sync success\n if (sco_parse_synchronization_header(DecVerifyMsbcBuf + i, &sync_num) >=\n 0) {\n verify_result = 1;\n msbc_sync_offset = i;\n break;\n }\n }\n TRACE(3, \"%02x %02x %02x\", (DecVerifyMsbcBuf + msbc_sync_offset)[0],\n (DecVerifyMsbcBuf + msbc_sync_offset)[1],\n (DecVerifyMsbcBuf + msbc_sync_offset)[2]);\n TRACE(5, \"msbc:%d %d %d %d %d\\n\", verify_result, msbc_queue_len,\n msbc_sync_offset, last_msbc_sync_num, sync_num);\n\n if (!verify_result) {\n // remove msbc frame remain 3 byted as it may include syn head\n APP_AUDIO_DeCQueue(&msbc_temp_queue, 0, msbc_queue_len - 3);\n goto msbc_find_sync_again;\n } else {\n // remove invalid msbc frame space\n APP_AUDIO_DeCQueue(&msbc_temp_queue, 0, msbc_sync_offset);\n if (msbc_sync_offset >= MSBC_LEN_PER_FRAME)\n goto msbc_find_sync_again;\n }\n\n // cal plc number\n if ((last_msbc_sync_num + 1) % 4 == sync_num) {\n plc_num = 0;\n } else {\n for (int i = 0; i < 4; i++) {\n if ((last_msbc_sync_num + i) % 4 == sync_num) {\n break;\n }\n plc_num++;\n }\n }\n last_msbc_sync_num = sync_num;\n\n // failed check sync should do plc\n if (plc_num > 0) {\n for (int i = 0; i < plc_num; i++) {\n ret =\n btif_sbc_decode_frames(&msbc_decoder, (unsigned char *)indices0,\n MSBC_LEN_PER_FRAME, &byte_decode, &pcm_data,\n SAMPLES_LEN_PER_FRAME * 2, msbc_eq_band_gain);\n\n if (ret == BT_STS_SUCCESS) {\n TRACE(1, \"PLC bad frame:%d\\n\", ret);\n // timer_begin=hal_sys_timer_get();\n PLC_bad_frame(&msbc_plc_state, DecPcmBuf, DecPcmBuf);\n // TRACE(1,\"msbc + plc:%d\", (hal_sys_timer_get()-timer_begin));\n pcm_data.data = (unsigned char *)DecPcmBuf;\n pcm_data.dataLen = 0;\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_EnCQueue(&voicebtpcm_m2p_pcm_queue,\n (unsigned char *)DecPcmBuf,\n (unsigned int)(SAMPLES_LEN_PER_FRAME * 2));\n UNLOCK_APP_AUDIO_QUEUE();\n } else {\n ASSERT(0, \"ERROR inices0\", __func__);\n }\n }\n }\n\n {\n ret = btif_sbc_decode_frames(\n &msbc_decoder, (unsigned char *)DecVerifyMsbcBuf + msbc_sync_offset + 2,\n MSBC_LEN_PER_FRAME, &byte_decode, &pcm_data, SAMPLES_LEN_PER_FRAME * 2,\n msbc_eq_band_gain);\n\n if (ret == BT_STS_SUCCESS) {\n PLC_good_frame(&msbc_plc_state, DecPcmBuf, DecPcmBuf);\n pcm_data.data = (unsigned char *)DecPcmBuf;\n pcm_data.dataLen = 0;\n } else {\n TRACE(1, \"PLC bad frame:%d\\n\");\n PLC_bad_frame(&msbc_plc_state, DecPcmBuf, DecPcmBuf);\n pcm_data.data = (unsigned char *)DecPcmBuf;\n pcm_data.dataLen = 0;\n TRACE(1, \"ERROR msbc frame!ret:%d\\n\", ret);\n }\n // remove msbc frame\n APP_AUDIO_DeCQueue(&msbc_temp_queue, 0, MSBC_LEN_PER_FRAME);\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_EnCQueue(&voicebtpcm_m2p_pcm_queue, (unsigned char *)DecPcmBuf,\n (unsigned int)(SAMPLES_LEN_PER_FRAME * 2));\n UNLOCK_APP_AUDIO_QUEUE();\n frame_decode_num++;\n if (frame_decode_num <= (msbc_len / (MSBC_LEN_PER_FRAME * 2) - 1))\n goto msbc_find_sync_again;\n }\n return 0;\n}\n#endif // #if !defined(PENDING_MSBC_DECODER_ALG)\n\n#else\nint decode_msbc_frame(unsigned char *pcm_buffer, unsigned int pcm_len) {\n int ttt = 0;\n // int t = 0;\n uint8_t underflow = 0;\n#if defined(MSBC_PLC_ENABLE)\n uint8_t plc_type = 0;\n uint8_t need_check_pkt = 1;\n uint8_t msbc_raw_sn = 0xff;\n static uint8_t msbc_raw_sn_pre;\n static uint8_t msbc_raw_sn_pre2;\n static bool msbc_find_first_sync = 0;\n#endif\n int r = 0;\n unsigned char *e1 = NULL, *e2 = NULL, *msbc_buff = NULL;\n unsigned int len1 = 0, len2 = 0;\n static btif_sbc_pcm_data_t pcm_data;\n static unsigned int msbc_next_frame_size;\n bt_status_t ret = BT_STS_SUCCESS;\n unsigned short byte_decode = 0;\n\n unsigned int pcm_offset = 0;\n unsigned int pcm_processed = 0;\n\n#if defined(MSBC_PLC_ENABLE)\n pcm_data.data = (unsigned char *)msbc_buf_before_plc;\n#else\n pcm_data.data = (unsigned char *)pcm_buffer;\n#endif\n if (!msbc_next_frame_size) {\n msbc_next_frame_size = MSBC_FRAME_SIZE;\n }\n\n // reinit:\n if (need_init_decoder) {\n TRACE(0, \"init msbc decoder\\n\");\n pcm_data.data = (unsigned char *)(pcm_buffer + pcm_offset);\n pcm_data.dataLen = 0;\n\n btif_sbc_init_decoder(&msbc_decoder);\n\n msbc_decoder.streamInfo.mSbcFlag = 1;\n msbc_decoder.streamInfo.bitPool = 26;\n msbc_decoder.streamInfo.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n msbc_decoder.streamInfo.channelMode = BTIF_SBC_CHNL_MODE_MONO;\n msbc_decoder.streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_LOUDNESS;\n /* Number of blocks used to encode the stream (4, 8, 12, or 16) */\n msbc_decoder.streamInfo.numBlocks = BTIF_MSBC_BLOCKS;\n /* The number of subbands in the stream (4 or 8) */\n msbc_decoder.streamInfo.numSubBands = 8;\n msbc_decoder.streamInfo.numChannels = 1;\n#if defined(MSBC_PLC_ENCODER)\n btif_sbc_init_encoder(&sbc_Encoder1);\n sbc_Encoder1.streamInfo.mSbcFlag = 1;\n sbc_Encoder1.streamInfo.numChannels = 1;\n sbc_Encoder1.streamInfo.channelMode = BTIF_SBC_CHNL_MODE_MONO;\n\n sbc_Encoder1.streamInfo.bitPool = 26;\n sbc_Encoder1.streamInfo.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n sbc_Encoder1.streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_LOUDNESS;\n sbc_Encoder1.streamInfo.numBlocks = BTIF_MSBC_BLOCKS;\n sbc_Encoder1.streamInfo.numSubBands = 8;\n\n#endif\n#if defined(MSBC_PLC_ENABLE)\n InitPLC(&msbc_plc_state);\n msbc_need_check_sync_header = 0;\n msbc_raw_sn_pre = 0xff;\n msbc_raw_sn_pre2 = 0xff;\n msbc_find_first_sync = true;\n#endif\n }\n\n#if defined(MSBC_PLC_ENABLE)\n need_check_pkt = 1;\n#endif\n msbc_buff = msbc_buf_before_decode;\n\nget_again:\n LOCK_APP_AUDIO_QUEUE();\n len1 = len2 = 0;\n e1 = e2 = 0;\n r = APP_AUDIO_PeekCQueue(&voicebtpcm_m2p_pcm_queue, msbc_next_frame_size, &e1,\n &len1, &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n\n if (r == CQ_ERR) {\n pcm_processed = pcm_len;\n memset(pcm_buffer, 0, pcm_len);\n TRACE(0, \"msbc spk buff underflow\");\n goto exit;\n }\n\n if (!len1) {\n TRACE(2, \"len1 underflow %d/%d\\n\", len1, len2);\n goto get_again;\n }\n\n if (len1 > 0 && e1) {\n memcpy(msbc_buff, e1, len1);\n }\n if (len2 > 0 && e2) {\n memcpy(msbc_buff + len1, e2, len2);\n }\n\n if (msbc_find_first_sync) {\n\n for (uint8_t i = 0; i < MSBC_FRAME_SIZE - 3; i++) {\n if (!sco_parse_synchronization_header(&msbc_buff[i], &msbc_raw_sn)) {\n TRACE(2, \"1 msbc find sync sn:%d offset:%d\", msbc_raw_sn, i);\n msbc_find_first_sync = false;\n goto start_decoder;\n }\n }\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, MSBC_FRAME_SIZE - 3);\n UNLOCK_APP_AUDIO_QUEUE();\n memset(pcm_buffer, 0, pcm_len);\n pcm_processed = pcm_len;\n goto exit;\n }\nstart_decoder:\n\n // DUMP8(\"%02x \", msbc_buf_before_decode, 8);\n#if defined(MSBC_PLC_ENABLE)\n // [0]-1,msbc sync byte\n // [1]-seqno\n // code_frame(57 bytes)\n // padding(1 byte)\n if (need_check_pkt) {\n\n#if 1\n if (!sco_parse_synchronization_header(msbc_buf_before_decode,\n &msbc_raw_sn)) {\n if (msbc_raw_sn_pre2 == 0xff) {\n // do nothing\n msbc_raw_sn_pre2 = msbc_raw_sn;\n } else {\n if (((msbc_raw_sn_pre2 + 1) % 4) == msbc_raw_sn) {\n // do nothing\n msbc_raw_sn_pre2 = msbc_raw_sn;\n } else if (msbc_raw_sn == 0xff) {\n TRACE(1, \"xxxxxx: sbchd err:%d\", MSBC_FRAME_SIZE - 3);\n } else {\n TRACE(2, \"xxxxxx: seq err:%d/%d\", msbc_raw_sn, msbc_raw_sn_pre2);\n msbc_raw_sn_pre2 = (msbc_raw_sn_pre2 + 1) % 4;\n#if 1\n memset(msbc_buf_before_decode, 0, MSBC_FRAME_SIZE);\n#else\n if (msbc_raw_sn_pre2 == 0) {\n msbc_buf_before_decode[1] = 0x08;\n } else if (msbc_raw_sn_pre2 == 1) {\n msbc_buf_before_decode[1] = 0x38;\n } else if (msbc_raw_sn_pre2 == 2) {\n msbc_buf_before_decode[1] = 0xc8;\n } else if (msbc_raw_sn_pre2 == 3) {\n msbc_buf_before_decode[1] = 0xf8;\n } else {\n ASSERT(0, \"msbc_raw_sn_pre2(%d) error\", __func__);\n }\n#endif\n }\n }\n }\n#endif\n unsigned int sync_offset = 0;\n if (msbc_need_check_sync_header) {\n do {\n if (!sco_parse_synchronization_header(&msbc_buff[sync_offset],\n &msbc_raw_sn)) {\n break;\n }\n sync_offset++;\n } while (sync_offset < (MSBC_FRAME_SIZE - 3));\n\n msbc_need_check_sync_header = 0;\n if (sync_offset > 0 && sync_offset != (MSBC_FRAME_SIZE - 3)) {\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, sync_offset);\n UNLOCK_APP_AUDIO_QUEUE();\n TRACE(1, \"fix sync:%d\", sync_offset);\n msbc_raw_sn_pre = (msbc_raw_sn + 3) % 4; // Find pre sn\n msbc_raw_sn_pre2 = msbc_raw_sn_pre;\n goto get_again;\n // TRACE(4,\"***msbc_need_check_sync %d :%x %x %x\\n\", sync_offset,\n // msbc_buf_before_decode[0],\n // msbc_buf_before_decode[1],\n // msbc_buf_before_decode[2]);\n } else if (sync_offset == (MSBC_FRAME_SIZE - 3)) {\n // APP_AUDIO_DeCQueue(&voicebtpcm_m2p_queue, 0, sync_offset);\n // just jump sync length + padding length(1byte)\n // will in plc again, so can check sync again\n // TRACE(4,\"***msbc_need_check_sync %d :%x %x %x\\n\", sync_offset,\n // msbc_buf_before_decode[0],\n // msbc_buf_before_decode[1],\n // msbc_buf_before_decode[2]);\n msbc_next_frame_size = (MSBC_FRAME_SIZE - 3) - 1;\n } else if (!sync_offset) {\n\n } else {\n TRACE(1, \"3 msbc_need_check_sync %d\\n\", sync_offset);\n }\n }\n // 0 - normal decode without plc proc, 1 - normal decode with plc proc, 2 -\n // special decode with plc proc\n plc_type = 0;\n\n if (msbc_can_plc) {\n if (sco_parse_synchronization_header(msbc_buf_before_decode,\n &msbc_raw_sn)) {\n plc_type = 2;\n msbc_need_check_sync_header = 1;\n } else {\n plc_type = 1;\n }\n } else {\n plc_type = 0;\n }\n\n if (msbc_raw_sn_pre == 0xff) {\n // do nothing\n msbc_raw_sn_pre = msbc_raw_sn;\n } else {\n if (((msbc_raw_sn_pre + 1) % 4) == msbc_raw_sn) {\n // do nothing\n msbc_raw_sn_pre = msbc_raw_sn;\n } else if (msbc_raw_sn == 0xff) {\n TRACE(1, \"sbchd err:%d\", MSBC_FRAME_SIZE - 3);\n msbc_need_check_sync_header = 1;\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, MSBC_FRAME_SIZE - 3);\n UNLOCK_APP_AUDIO_QUEUE();\n msbc_raw_sn_pre = (msbc_raw_sn_pre + 1) % 4;\n plc_type = 2;\n } else {\n TRACE(2, \"seq err:%d/%d\", msbc_raw_sn, msbc_raw_sn_pre);\n msbc_need_check_sync_header = 1;\n plc_type = 2;\n msbc_raw_sn_pre = (msbc_raw_sn_pre + 1) % 4;\n }\n }\n\n need_check_pkt = 0;\n }\n // TRACE(3,\"type %d, seqno 0x%x, q_space %d\\n\", plc_type, cur_pkt_seqno,\n // APP_AUDIO_AvailableOfCQueue(&voicebtpcm_m2p_queue));\n#endif\n\n // DUMP8(\"%02x \", msbc_buf_before_decode, msbc_next_frame_size);\n // TRACE(0,\"\\n\");\n\n#if defined(MSBC_PLC_ENABLE)\n if (plc_type == 1) {\n ret = btif_sbc_decode_frames(&msbc_decoder,\n (unsigned char *)msbc_buf_before_decode,\n msbc_next_frame_size, &byte_decode, &pcm_data,\n pcm_len - pcm_offset, msbc_eq_band_gain);\n\n ttt = hal_sys_timer_get();\n#if defined(MSBC_PCM_PLC_ENABLE)\n speech_plc_16000_AddToHistory((PlcSt_16000 *)speech_plc,\n (short *)pcm_data.data, pcm_len / 2);\n memcpy(pcm_buffer, pcm_data.data, pcm_len);\n#else\n PLC_good_frame(&msbc_plc_state, (short *)pcm_data.data,\n (short *)pcm_buffer);\n#endif\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_add_channel_data(0, (short *)pcm_buffer, pcm_len / 2);\n#endif\n } else if (plc_type == 2) {\n#if defined(MSBC_PCM_PLC_ENABLE)\n ret = BT_STS_SUCCESS;\n ttt = hal_sys_timer_get();\n#if defined(MSBC_PLC_ENCODER)\n speech_plc_16000_Dofe((PlcSt_16000 *)speech_plc, (short *)pcm_buffer,\n EncInBuf, pcm_len / 2);\n#else\n speech_plc_16000_Dofe((PlcSt_16000 *)speech_plc, (short *)pcm_buffer, NULL,\n pcm_len / 2);\n#endif\n#else\n PLC_bad_frame(&msbc_plc_state, (short *)pcm_data.data, (short *)pcm_buffer);\n#endif\n#if defined(MSBC_PLC_ENCODER)\n {\n uint16_t bytes_encoded = 0, buf_len = MSBC_ENCODE_PCM_LEN;\n PcmEncData1.data = (uint8_t *)(EncInBuf + MSBC_ENC_BUFFER_OFFSET);\n PcmEncData1.dataLen = pcm_len;\n PcmEncData1.numChannels = 1;\n PcmEncData1.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n btif_sbc_encode_frames(&sbc_Encoder1, &PcmEncData1, &bytes_encoded,\n Encodedbuf1, &buf_len, 0xFFFF);\n#ifdef __SBC_FUNC_IN_ROM__\n ret = SBC_ROM_FUNC.sbc_frames_decode(\n &msbc_decoder, Encodedbuf1, MSBC_FRAME_SIZE - 3, &byte_decode,\n &pcm_data, pcm_len - pcm_offset, msbc_eq_band_gain);\n#else\n ret = btif_sbc_decode_frames(&msbc_decoder, Encodedbuf1,\n MSBC_FRAME_SIZE - 3, &byte_decode, &pcm_data,\n pcm_len - pcm_offset, msbc_eq_band_gain);\n#endif\n }\n#endif\n TRACE(2, \"b t:%d ret:%d\\n\", (hal_sys_timer_get() - ttt), ret);\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n for (uint32_t i = 0; i < pcm_len / 2; i++) {\n audio_dump_temp_buf[i] = 32767;\n }\n audio_dump_add_channel_data(0, audio_dump_temp_buf, pcm_len / 2);\n#endif\n } else\n#endif\n {\n ret = btif_sbc_decode_frames(&msbc_decoder,\n (unsigned char *)msbc_buf_before_decode,\n msbc_next_frame_size, &byte_decode, &pcm_data,\n pcm_len - pcm_offset, msbc_eq_band_gain);\n#if defined(MSBC_PCM_PLC_ENABLE)\n speech_plc_16000_AddToHistory((PlcSt_16000 *)speech_plc,\n (short *)pcm_data.data, pcm_len / 2);\n memcpy(pcm_buffer, pcm_data.data, pcm_len);\n#endif\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n for (uint32_t i = 0; i < pcm_len / 2; i++) {\n audio_dump_temp_buf[i] = -32767;\n }\n audio_dump_add_channel_data(0, audio_dump_temp_buf, pcm_len / 2);\n#endif\n }\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_add_channel_data(1, (short *)pcm_buffer, pcm_len / 2);\n audio_dump_run();\n#endif\n\n#if 0\n TRACE(1,\"[0] %x\", msbc_buf_before_decode[0]);\n TRACE(1,\"[1] %x\", msbc_buf_before_decode[1]);\n TRACE(1,\"[2] %x\", msbc_buf_before_decode[2]);\n TRACE(1,\"[3] %x\", msbc_buf_before_decode[3]);\n TRACE(1,\"[4] %x\", msbc_buf_before_decode[4]);\n#endif\n\n // TRACE(2,\"sbcd ret %d %d\\n\", ret, byte_decode);\n\n if (ret == BT_STS_CONTINUE) {\n need_init_decoder = false;\n LOCK_APP_AUDIO_QUEUE();\n VOICEBTPCM_TRACE(2, \"000000 byte_decode =%d, current_len1 =%d\", byte_decode,\n msbc_next_frame_size);\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, byte_decode);\n UNLOCK_APP_AUDIO_QUEUE();\n\n msbc_next_frame_size = (MSBC_FRAME_SIZE - byte_decode) > 0\n ? (MSBC_FRAME_SIZE - byte_decode)\n : MSBC_FRAME_SIZE;\n goto get_again;\n }\n\n else if (ret == BT_STS_SUCCESS) {\n need_init_decoder = false;\n pcm_processed = pcm_data.dataLen;\n pcm_data.dataLen = 0;\n\n LOCK_APP_AUDIO_QUEUE();\n#if defined(MSBC_PLC_ENABLE)\n if (plc_type == 0) {\n byte_decode += 1; // padding\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, byte_decode);\n } else {\n#if defined(MSBC_PCM_PLC_ENABLE)\n if (plc_type == 2) {\n pcm_processed = pcm_len;\n } else {\n if (msbc_next_frame_size < MSBC_FRAME_SIZE)\n msbc_next_frame_size += 1; // padding\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, msbc_next_frame_size);\n }\n#else\n if (msbc_next_frame_size < MSBC_FRAME_SIZE)\n msbc_next_frame_size += 1; // padding\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, msbc_next_frame_size);\n#endif\n }\n#else\n if (msbc_next_frame_size < MSBC_FRAME_SIZE)\n msbc_next_frame_size += 1; // padding\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, msbc_next_frame_size);\n#endif\n UNLOCK_APP_AUDIO_QUEUE();\n\n msbc_next_frame_size = MSBC_FRAME_SIZE;\n\n#if defined(MSBC_PLC_ENABLE)\n // plc after a good frame\n if (!msbc_can_plc) {\n msbc_can_plc = true;\n }\n#endif\n } else if (ret == BT_STS_FAILED) {\n need_init_decoder = true;\n pcm_processed = pcm_len;\n pcm_data.dataLen = 0;\n\n memset(pcm_buffer, 0, pcm_len);\n TRACE(1, \"err mutelen:%d\\n\", pcm_processed);\n\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, byte_decode);\n UNLOCK_APP_AUDIO_QUEUE();\n\n msbc_next_frame_size = MSBC_FRAME_SIZE;\n\n /* leave */\n } else if (ret == BT_STS_NO_RESOURCES) {\n need_init_decoder = true;\n pcm_processed = pcm_len;\n pcm_data.dataLen = 0;\n\n memset(pcm_buffer, 0, pcm_len);\n TRACE(1, \"no_res mutelen:%d\\n\", pcm_processed);\n\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, byte_decode);\n UNLOCK_APP_AUDIO_QUEUE();\n\n msbc_next_frame_size = MSBC_FRAME_SIZE;\n }\n\nexit:\n if (underflow || need_init_decoder) {\n TRACE(2, \"media_msbc_decoder underflow len:%d,need_init_decoder=%d\\n \",\n pcm_len, need_init_decoder);\n }\n\n // TRACE(1,\"pcm_processed %d\", pcm_processed);\n\n return pcm_processed;\n}\n#endif\n\n#endif\n\n// capture flow\n// mic-->audioflinger\n// capture-->store_voicebtpcm_p2m_buffer-->get_voicebtpcm_p2m_frame-->bt used by\n// capture, store data from mic to memory\nint store_voicebtpcm_p2m_buffer(unsigned char *buf, unsigned int len) {\n int POSSIBLY_UNUSED size;\n unsigned int avail_size = 0;\n LOCK_APP_AUDIO_QUEUE();\n // merge_two_trace_to_one_track_16bits(0, (uint16_t *)buf, (uint16_t *)buf,\n // len>>1); r = APP_AUDIO_EnCQueue(&voicebtpcm_p2m_queue, buf, len>>1);\n avail_size = APP_AUDIO_AvailableOfCQueue(&voicebtpcm_p2m_pcm_queue);\n if (len <= avail_size) {\n APP_AUDIO_EnCQueue(&voicebtpcm_p2m_pcm_queue, buf, len);\n } else {\n VOICEBTPCM_TRACE(2, \"mic buff overflow %d/%d\", len, avail_size);\n APP_AUDIO_DeCQueue(&voicebtpcm_p2m_pcm_queue, 0, len - avail_size);\n APP_AUDIO_EnCQueue(&voicebtpcm_p2m_pcm_queue, buf, len);\n }\n size = APP_AUDIO_LengthOfCQueue(&voicebtpcm_p2m_pcm_queue);\n UNLOCK_APP_AUDIO_QUEUE();\n\n VOICEBTPCM_TRACE(2, \"p2m :%d/%d\", len, size);\n\n return 0;\n}\n\n#if defined(HFP_1_6_ENABLE)\nunsigned char get_msbc_counter(void) {\n if (msbc_counter == 0x08) {\n msbc_counter = 0x38;\n } else if (msbc_counter == 0x38) {\n msbc_counter = 0xC8;\n } else if (msbc_counter == 0xC8) {\n msbc_counter = 0xF8;\n } else if (msbc_counter == 0xF8) {\n msbc_counter = 0x08;\n }\n\n return msbc_counter;\n}\n#endif\n\n#if defined(TX_RX_PCM_MASK)\nCQueue Tx_esco_queue;\nCQueue Rx_esco_queue;\nCQueue *get_tx_esco_queue_ptr() { return &Tx_esco_queue; }\nCQueue *get_rx_esco_queue_ptr() { return &Rx_esco_queue; }\n\n#endif\n\n// used by capture, get the memory data which has be stored by\n// store_voicebtpcm_p2m_buffer()\nint get_voicebtpcm_p2m_frame(unsigned char *buf, unsigned int len) {\n int got_len = 0;\n\n // TRACE(2,\"[%s] pcm_len = %d\", __func__, len / 2);\n if (voicebtpcm_cache_p2m_status == APP_AUDIO_CACHE_CACHEING) {\n app_audio_memset_16bit((short *)buf, 0, len / 2);\n TRACE(1, \"[%s] APP_AUDIO_CACHE_CACHEING\", __func__);\n return len;\n }\n\n int msbc_encode_temp_len = MSBC_FRAME_SIZE * 2;\n\n ASSERT(len % msbc_encode_temp_len == 0, \"[%s] len(%d) is invalid\", __func__,\n len);\n\n int loop_cnt = len / msbc_encode_temp_len;\n len = msbc_encode_temp_len;\n\n for (int cnt = 0; cnt < loop_cnt; cnt++) {\n if (bt_sco_codec_is_msbc()) {\n#ifdef HFP_1_6_ENABLE\n uint16_t bytes_encoded = 0, buf_len = len;\n uint16_t *dest_buf = 0, offset = 0;\n int r = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n\n got_len = 0;\n\n dest_buf = (uint16_t *)buf;\n\n LOCK_APP_AUDIO_QUEUE();\n r = APP_AUDIO_PeekCQueue(&voicebtpcm_p2m_pcm_queue, MSBC_ENCODE_PCM_LEN,\n &e1, &len1, &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n\n if (r == CQ_OK) {\n if (len1) {\n memcpy(temp_msbc_buf, e1, len1);\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_p2m_pcm_queue, 0, len1);\n UNLOCK_APP_AUDIO_QUEUE();\n got_len += len1;\n }\n if (len2 != 0) {\n memcpy(temp_msbc_buf + got_len, e2, len2);\n got_len += len2;\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_p2m_pcm_queue, 0, len2);\n UNLOCK_APP_AUDIO_QUEUE();\n }\n\n // int t = 0;\n // t = hal_sys_timer_get();\n msbc_encoder_pcmdata.data = temp_msbc_buf;\n msbc_encoder_pcmdata.dataLen = MSBC_ENCODE_PCM_LEN;\n memset(temp_msbc_buf1, 0, MSBC_FRAME_SIZE);\n btif_sbc_encode_frames(msbc_encoder, &msbc_encoder_pcmdata,\n &bytes_encoded, temp_msbc_buf1,\n (uint16_t *)&buf_len, 0xFFFF);\n // TRACE(1,\"enc msbc %d t\\n\", hal_sys_timer_get()-t);\n // TRACE(2,\"encode len %d, out len %d\\n\", bytes_encoded, buf_len);\n\n dest_buf[offset++] = 1 << 8;\n dest_buf[offset++] = get_msbc_counter() << 8;\n\n for (int i = 0; i < buf_len; ++i) {\n dest_buf[offset++] = temp_msbc_buf1[i] << 8;\n }\n\n dest_buf[offset++] = 0; // padding\n\n got_len = len;\n }\n\n#if defined(TX_RX_PCM_MASK)\n if (btdrv_is_pcm_mask_enable() == 1) {\n int status;\n uint8_t len = 120;\n uint8_t temp_mic_buff[len];\n for (uint8_t j = 0; j < len; j++) {\n temp_mic_buff[j] = buf[2 * j + 1];\n }\n status = APP_AUDIO_EnCQueue(&Tx_esco_queue, temp_mic_buff, len);\n if (status) {\n // TRACE(0,\"Tx EnC Fail\");\n }\n }\n#endif\n#endif\n } else {\n#if defined(CVSD_BYPASS)\n got_len = encode_cvsd_frame(buf, len);\n#else\n int r = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n unsigned int len1 = 0, len2 = 0;\n got_len = 0;\n LOCK_APP_AUDIO_QUEUE();\n // size = APP_AUDIO_LengthOfCQueue(&voicebtpcm_p2m_queue);\n r = APP_AUDIO_PeekCQueue(&voicebtpcm_p2m_pcm_queue, len - got_len, &e1,\n &len1, &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n\n // VOICEBTPCM_TRACE(2,\"p2m :%d/%d\", len,\n // APP_AUDIO_LengthOfCQueue(&voicebtpcm_p2m_queue));\n\n if (r == CQ_OK) {\n if (len1) {\n app_audio_memcpy_16bit((short *)buf, (short *)e1, len1 / 2);\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_p2m_pcm_queue, 0, len1);\n UNLOCK_APP_AUDIO_QUEUE();\n got_len += len1;\n }\n if (len2 != 0) {\n app_audio_memcpy_16bit((short *)(buf + got_len), (short *)e2,\n len2 / 2);\n got_len += len2;\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_p2m_pcm_queue, 0, len2);\n UNLOCK_APP_AUDIO_QUEUE();\n }\n } else {\n VOICEBTPCM_TRACE(0, \"mic buff underflow\");\n app_audio_memset_16bit((short *)buf, 0, len / 2);\n got_len = len;\n voicebtpcm_cache_p2m_status = APP_AUDIO_CACHE_CACHEING;\n }\n#endif\n }\n buf += msbc_encode_temp_len;\n }\n\n return got_len;\n}\n\n#if 0\nvoid get_mic_data_max(short *buf, uint32_t len)\n{\n int max0 = -32768, min0 = 32767, diff0 = 0;\n int max1 = -32768, min1 = 32767, diff1 = 0;\n\n for(uint32_t i=0; imax0)\n {\n max0 = buf[i+0];\n }\n\n if(buf[i+0]max1)\n {\n max1 = buf[i+1];\n }\n\n if(buf[i+1]48K\nsingle phase coef Number:=24, upsample factor:=6,\n 64, -311, 210, -320, 363, -407, 410, -356, 196, 191,-1369,30721,\n3861,-2265, 1680,-1321, 1049, -823, 625, -471, 297, -327, 34, 19, 72,\n-254, 75, -117, 46, 58, -256, 583,-1141, 2197,-4866,28131,10285,-4611,\n2935,-2061, 1489,-1075, 755, -523, 310, -291, -19, 31, 65, -175, -73, 84,\n-245, 457, -786, 1276,-2040, 3377,-6428,23348,17094,-6200, 3592,-2347,\n1588,-1073, 703, -447, 236, -203, -92, 49, 49, -92, -203, 236, -447,\n703,-1073, 1588,-2347, 3592,-6200,17094,23348,-6428, 3377,-2040, 1276, -786,\n457, -245, 84, -73, -175, 65, 31, -19, -291, 310, -523, 755,-1075,\n1489,-2061, 2935,-4611,10285,28131,-4866, 2197,-1141, 583, -256, 58, 46,\n-117, 75, -254, 72, 19, 34, -327, 297, -471, 625, -823, 1049,-1321,\n1680,-2265, 3861,30721,-1369, 191, 196, -356, 410, -407, 363, -320, 210,\n-311, 64,\n*/\n\nconst static short coef_8k_upto_48k[6][US_COEF_NUM] __attribute__((\n section(\".sram_data\"))) = {\n {64, -311, 210, -320, 363, -407, 410, -356, 196, 191, -1369, 30721,\n 3861, -2265, 1680, -1321, 1049, -823, 625, -471, 297, -327, 34, 19},\n {72, -254, 75, -117, 46, 58, -256, 583,\n -1141, 2197, -4866, 28131, 10285, -4611, 2935, -2061,\n 1489, -1075, 755, -523, 310, -291, -19, 31},\n {65, -175, -73, 84, -245, 457, -786, 1276,\n -2040, 3377, -6428, 23348, 17094, -6200, 3592, -2347,\n 1588, -1073, 703, -447, 236, -203, -92, 49},\n {49, -92, -203, 236, -447, 703, -1073, 1588,\n -2347, 3592, -6200, 17094, 23348, -6428, 3377, -2040,\n 1276, -786, 457, -245, 84, -73, -175, 65},\n {31, -19, -291, 310, -523, 755, -1075, 1489,\n -2061, 2935, -4611, 10285, 28131, -4866, 2197, -1141,\n 583, -256, 58, 46, -117, 75, -254, 72},\n {19, 34, -327, 297, -471, 625, -823, 1049, -1321, 1680, -2265, 3861,\n 30721, -1369, 191, 196, -356, 410, -407, 363, -320, 210, -311, 64}};\n\n/*\n16K -->48K\n\nsingle phase coef Number:=24, upsample factor:=3,\n 1, -291, 248, -327, 383, -405, 362, -212, -129, 875,-2948,29344,\n7324,-3795, 2603,-1913, 1418,-1031, 722, -478, 292, -220, -86, 16, 26,\n-212, 6, 45, -185, 414, -764, 1290,-2099, 3470,-6431,20320,20320,-6431,\n3470,-2099, 1290, -764, 414, -185, 45, 6, -212, 26, 16, -86, -220, 292,\n-478, 722,-1031, 1418,-1913, 2603,-3795, 7324,29344,-2948, 875, -129, -212,\n362, -405, 383, -327, 248, -291, 1,\n*/\n\nconst static short coef_16k_upto_48k[3][US_COEF_NUM] __attribute__((\n section(\".sram_data\"))) = {\n {1, -291, 248, -327, 383, -405, 362, -212, -129, 875, -2948, 29344,\n 7324, -3795, 2603, -1913, 1418, -1031, 722, -478, 292, -220, -86, 16},\n {26, -212, 6, 45, -185, 414, -764, 1290,\n -2099, 3470, -6431, 20320, 20320, -6431, 3470, -2099,\n 1290, -764, 414, -185, 45, 6, -212, 26},\n {16, -86, -220, 292, -478, 722, -1031, 1418, -1913, 2603, -3795, 7324,\n 29344, -2948, 875, -129, -212, 362, -405, 383, -327, 248, -291, 1}};\n\nstatic short us_para_lst[US_COEF_NUM - 1];\n\nstatic inline short us_get_coef_para(U32 samp_idx, U32 coef_idx) {\n if (bt_sco_samplerate_ratio == 6)\n return coef_8k_upto_48k[samp_idx][coef_idx];\n else\n return coef_16k_upto_48k[samp_idx][coef_idx];\n}\n\nvoid us_fir_init(void) {\n app_audio_memset_16bit(us_para_lst, 0, sizeof(us_para_lst) / sizeof(short));\n}\n\n__attribute__((section(\".fast_text_sram\"))) U32\nus_fir_run(short *src_buf, short *dst_buf, U32 in_samp_num) {\n U32 in_idx, samp_idx, coef_idx, real_idx, out_idx;\n int para, out;\n\n for (in_idx = 0, out_idx = 0; in_idx < in_samp_num; in_idx++) {\n for (samp_idx = 0; samp_idx < bt_sco_samplerate_ratio; samp_idx++) {\n out = 0;\n for (coef_idx = 0; coef_idx < US_COEF_NUM; coef_idx++) {\n real_idx = coef_idx + in_idx;\n para = (real_idx < (US_COEF_NUM - 1))\n ? us_para_lst[real_idx]\n : src_buf[real_idx - (US_COEF_NUM - 1)];\n out += para * us_get_coef_para(samp_idx, coef_idx);\n }\n\n dst_buf[out_idx] = (short)(out >> 16);\n out_idx++;\n }\n }\n\n if (in_samp_num >= (US_COEF_NUM - 1)) {\n app_audio_memcpy_16bit(us_para_lst,\n (src_buf + in_samp_num - US_COEF_NUM + 1),\n (US_COEF_NUM - 1));\n } else {\n U32 start_idx = (US_COEF_NUM - 1 - in_samp_num);\n\n app_audio_memcpy_16bit(us_para_lst, (us_para_lst + in_samp_num), start_idx);\n\n app_audio_memcpy_16bit((us_para_lst + start_idx), src_buf, in_samp_num);\n }\n return out_idx;\n}\n\nuint32_t voicebtpcm_pcm_resample(short *src_samp_buf, uint32_t src_smpl_cnt,\n short *dst_samp_buf) {\n return us_fir_run(src_samp_buf, dst_samp_buf, src_smpl_cnt);\n}\n\n#endif\n\nstatic int speech_tx_aec_frame_len = 0;\n\nint speech_tx_aec_get_frame_len(void) { return speech_tx_aec_frame_len; }\n\nvoid speech_tx_aec_set_frame_len(int len) {\n TRACE(2, \"[%s] len = %d\", __func__, len);\n speech_tx_aec_frame_len = len;\n}\n\n#if 1\n// used by capture, store data from mic to memory\nuint32_t voicebtpcm_pcm_audio_data_come(uint8_t *buf, uint32_t len) {\n int16_t POSSIBLY_UNUSED ret = 0;\n bool POSSIBLY_UNUSED vdt = false;\n int size = 0;\n\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n uint32_t queue_len;\n\n uint32_t len_per_channel = len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n\n ASSERT(len_per_channel == speech_tx_aec_get_frame_len() * sizeof(short),\n \"%s: Unmatched len: %u != %u\", __func__, len_per_channel,\n speech_tx_aec_get_frame_len() * sizeof(short));\n ASSERT(echo_buf_q_rpos + len_per_channel <= echo_buf_q_size,\n \"%s: rpos (%u) overflow: len=%u size=%u\", __func__, echo_buf_q_rpos,\n len_per_channel, echo_buf_q_size);\n\n if (echo_buf_q_rpos == echo_buf_q_wpos) {\n queue_len = echo_buf_q_full ? echo_buf_q_size : 0;\n echo_buf_q_full = false;\n } else if (echo_buf_q_rpos < echo_buf_q_wpos) {\n queue_len = echo_buf_q_wpos - echo_buf_q_rpos;\n } else {\n queue_len = echo_buf_q_size + echo_buf_q_wpos - echo_buf_q_rpos;\n }\n ASSERT(queue_len >= len_per_channel,\n \"%s: queue underflow: q_len=%u len=%u rpos=%u wpos=%u size=%u\",\n __func__, queue_len, len_per_channel, echo_buf_q_rpos, echo_buf_q_wpos,\n echo_buf_q_size);\n\n aec_echo_buf = (int16_t *)(echo_buf_queue + echo_buf_q_rpos);\n echo_buf_q_rpos += len_per_channel;\n if (echo_buf_q_rpos >= echo_buf_q_size) {\n echo_buf_q_rpos = 0;\n }\n#endif\n#endif\n short *pcm_buf = (short *)buf;\n#if defined(SPEECH_TX_24BIT)\n int pcm_len = len / sizeof(int32_t);\n#else\n int pcm_len = len / sizeof(int16_t);\n#endif\n\n if (app_get_current_overlay() == APP_OVERLAY_HFP) {\n speech_tx_process(pcm_buf, aec_echo_buf, &pcm_len);\n\n#if defined(SPEECH_TX_24BIT)\n int32_t *buf24 = (int32_t *)pcm_buf;\n int16_t *buf16 = (int16_t *)pcm_buf;\n for (int i = 0; i < pcm_len; i++)\n buf16[i] = (buf24[i] >> 8);\n#endif\n\n if (resample_needed_flag == true) {\n iir_resample_process(upsample_st, pcm_buf, upsample_buf_for_msbc,\n pcm_len);\n pcm_buf = upsample_buf_for_msbc;\n pcm_len = sco_frame_length;\n }\n } else {\n memset(buf, 0, len);\n }\n\n LOCK_APP_AUDIO_QUEUE();\n store_voicebtpcm_p2m_buffer((uint8_t *)pcm_buf, pcm_len * sizeof(short));\n size = APP_AUDIO_LengthOfCQueue(&voicebtpcm_p2m_pcm_queue);\n UNLOCK_APP_AUDIO_QUEUE();\n\n if (size >= voicebtpcm_p2m_cache_threshold) {\n voicebtpcm_cache_p2m_status = APP_AUDIO_CACHE_OK;\n }\n\n return pcm_len * 2;\n}\n#else\n// used by capture, store data from mic to memory\nuint32_t voicebtpcm_pcm_audio_data_come(uint8_t *buf, uint32_t len) {\n int16_t POSSIBLY_UNUSED ret = 0;\n bool POSSIBLY_UNUSED vdt = false;\n int size = 0;\n\n short *pcm_buf = (short *)buf;\n uint32_t pcm_len = len / 2;\n\n // TRACE(2,\"[%s] pcm_len = %d\", __func__, pcm_len);\n\n LOCK_APP_AUDIO_QUEUE();\n store_voicebtpcm_p2m_buffer((uint8_t *)pcm_buf, pcm_len * 2);\n size = APP_AUDIO_LengthOfCQueue(&voicebtpcm_p2m_queue);\n UNLOCK_APP_AUDIO_QUEUE();\n\n if (size > VOICEBTPCM_PCM_TEMP_BUFFER_SIZE) {\n voicebtpcm_cache_p2m_status = APP_AUDIO_CACHE_OK;\n }\n\n return pcm_len * 2;\n}\n#endif\n\n// used by playback, play data from memory to speaker\nuint32_t voicebtpcm_pcm_audio_more_data(uint8_t *buf, uint32_t len) {\n uint32_t l = 0;\n // TRACE(3,\"[%s]: pcm_len = %d, %d\", __FUNCTION__, len / 2,\n // FAST_TICKS_TO_US(hal_fast_sys_timer_get()));\n if ((voicebtpcm_cache_m2p_status == APP_AUDIO_CACHE_CACHEING) ||\n (app_get_current_overlay() != APP_OVERLAY_HFP)) {\n app_audio_memset_16bit((short *)buf, 0, len / 2);\n l = len;\n } else {\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT) || \\\n defined(SPEECH_TX_THIRDPARTY)\n#if !(defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE))\n#if defined(SPEECH_TX_24BIT) && defined(SPEECH_RX_24BIT)\n memcpy(aec_echo_buf, buf, len / sizeof(int16_t) * sizeof(int32_t));\n#elif defined(SPEECH_TX_24BIT) && !defined(SPEECH_RX_24BIT)\n short *buf_p = (short *)buf;\n for (uint32_t i = 0; i < len / sizeof(int16_t); i++) {\n aec_echo_buf[i] = ((int32_t)buf_p[i] << 8);\n }\n#elif !defined(SPEECH_TX_24BIT) && defined(SPEECH_RX_24BIT)\n int32_t *buf32_p = (int32_t *)buf;\n for (uint32_t i = 0; i < len / sizeof(int16_t); i++) {\n aec_echo_buf[i] = (buf32_p[i] >> 8);\n }\n#else\n app_audio_memcpy_16bit((int16_t *)aec_echo_buf, (int16_t *)buf, len / 2);\n#endif\n#endif\n#endif\n\n int decode_len = len;\n uint8_t *decode_buf = buf;\n\n if (resample_needed_flag == true) {\n decode_len = sco_frame_length * 2;\n decode_buf = (uint8_t *)downsample_buf_for_msbc;\n }\n\n unsigned int len1 = 0, len2 = 0;\n unsigned char *e1 = NULL, *e2 = NULL;\n int r = 0;\n\n LOCK_APP_AUDIO_QUEUE();\n len1 = len2 = 0;\n e1 = e2 = 0;\n r = APP_AUDIO_PeekCQueue(&voicebtpcm_m2p_pcm_queue, decode_len, &e1, &len1,\n &e2, &len2);\n UNLOCK_APP_AUDIO_QUEUE();\n if (r == CQ_ERR) {\n TRACE(0, \"pcm buff underflow\");\n memset(decode_buf, 0, decode_len);\n l = len;\n goto fail;\n }\n\n if (!len1) {\n TRACE(2, \"pcm len1 underflow %d/%d\\n\", len1, len2);\n memset(decode_buf, 0, decode_len);\n l = len;\n goto fail;\n }\n\n if (len1 > 0 && e1) {\n memcpy(decode_buf, e1, len1);\n }\n if (len2 > 0 && e2) {\n memcpy(decode_buf + len1, e2, len2);\n }\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_DeCQueue(&voicebtpcm_m2p_pcm_queue, 0, decode_len);\n UNLOCK_APP_AUDIO_QUEUE();\n } // if (voicebtpcm_cache_m2p_status == APP_AUDIO_CACHE_CACHEING)\n\n // downsample_buf_for_msbc size is len * 2\n if (resample_needed_flag == true) {\n iir_resample_process(downsample_st, downsample_buf_for_msbc, (int16_t *)buf,\n sco_frame_length);\n }\n\nfail:\n short *POSSIBLY_UNUSED pcm_buf = (short *)buf;\n int POSSIBLY_UNUSED pcm_len = len / 2;\n\n#if defined(SPEECH_RX_24BIT)\n int32_t *buf32 = (int32_t *)buf;\n for (int i = pcm_len - 1; i >= 0; i--) {\n buf32[i] = ((int32_t)pcm_buf[i] << 8);\n }\n#endif\n\n speech_rx_process(pcm_buf, &pcm_len);\n\n buf = (uint8_t *)pcm_buf;\n len = pcm_len * sizeof(short);\n\n#if defined(SPEECH_RX_24BIT)\n len = len / sizeof(int16_t) * sizeof(int32_t);\n#endif\n\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n uint32_t queue_len;\n\n ASSERT(len == speech_tx_aec_get_frame_len() * sizeof(short),\n \"%s: Unmatched len: %u != %u\", __func__, len,\n speech_tx_aec_get_frame_len() * sizeof(short));\n ASSERT(echo_buf_q_wpos + len <= echo_buf_q_size,\n \"%s: wpos (%u) overflow: len=%u size=%u\", __func__, echo_buf_q_wpos,\n len, echo_buf_q_size);\n\n if (echo_buf_q_rpos == echo_buf_q_wpos) {\n queue_len = echo_buf_q_full ? echo_buf_q_size : 0;\n } else if (echo_buf_q_rpos < echo_buf_q_wpos) {\n queue_len = echo_buf_q_wpos - echo_buf_q_rpos;\n } else {\n queue_len = echo_buf_q_size + echo_buf_q_wpos - echo_buf_q_rpos;\n }\n ASSERT(queue_len + len <= echo_buf_q_size,\n \"%s: queue overflow: q_len=%u len=%u rpos=%u wpos=%u size=%u\",\n __func__, queue_len, len, echo_buf_q_rpos, echo_buf_q_wpos,\n echo_buf_q_size);\n\n app_audio_memcpy_16bit((int16_t *)(echo_buf_queue + echo_buf_q_wpos),\n (int16_t *)buf, len / 2);\n echo_buf_q_wpos += len;\n if (echo_buf_q_wpos >= echo_buf_q_size) {\n echo_buf_q_wpos = 0;\n }\n if (echo_buf_q_rpos == echo_buf_q_wpos) {\n echo_buf_q_full = true;\n }\n#endif\n#endif\n\n return l;\n}\n\nvoid *voicebtpcm_get_ext_buff(int size) {\n uint8_t *pBuff = NULL;\n if (size % 4) {\n size = size + (4 - size % 4);\n }\n app_audio_mempool_get_buff(&pBuff, size);\n VOICEBTPCM_TRACE(2, \"[%s] len:%d\", __func__, size);\n return (void *)pBuff;\n}\n\nint voicebtpcm_pcm_echo_buf_queue_init(uint32_t size) {\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n echo_buf_queue = (uint8_t *)voicebtpcm_get_ext_buff(size);\n echo_buf_q_size = size;\n echo_buf_q_wpos = 0;\n echo_buf_q_rpos = 0;\n echo_buf_q_full = false;\n#endif\n#endif\n return 0;\n}\n\nvoid voicebtpcm_pcm_echo_buf_queue_reset(void) {\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n echo_buf_q_wpos = 0;\n echo_buf_q_rpos = 0;\n echo_buf_q_full = false;\n#endif\n#endif\n}\n\nvoid voicebtpcm_pcm_echo_buf_queue_deinit(void) {\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT)\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n echo_buf_queue = NULL;\n echo_buf_q_size = 0;\n echo_buf_q_wpos = 0;\n echo_buf_q_rpos = 0;\n echo_buf_q_full = false;\n#endif\n#endif\n}\n\nextern enum AUD_SAMPRATE_T speech_codec_get_sample_rate(void);\n\n// sco sample rate: encoder/decoder sample rate\n// codec sample rate: hardware sample rate\nint voicebtpcm_pcm_audio_init(int sco_sample_rate, int codec_sample_rate) {\n uint8_t POSSIBLY_UNUSED *speech_buf = NULL;\n int POSSIBLY_UNUSED speech_len = 0;\n\n sco_frame_length =\n SPEECH_FRAME_MS_TO_LEN(sco_sample_rate, SPEECH_SCO_FRAME_MS);\n codec_frame_length =\n SPEECH_FRAME_MS_TO_LEN(codec_sample_rate, SPEECH_SCO_FRAME_MS);\n\n TRACE(3, \"[%s] TX: sample rate = %d, frame len = %d\", __func__,\n codec_sample_rate, codec_frame_length);\n TRACE(3, \"[%s] RX: sample rate = %d, frame len = %d\", __func__,\n codec_sample_rate, codec_frame_length);\n\n // init cqueue\n uint8_t *p2m_pcm_buff = NULL;\n uint8_t *m2p_pcm_buff = NULL;\n#if defined(TX_RX_PCM_MASK)\n uint8_t *Mic_frame_buff = NULL;\n uint8_t *Rx_esco_buff = NULL;\n uint32_t pcm_buf_size = 240 * sizeof(uint8_t);\n#endif\n if (bt_sco_codec_is_msbc()) {\n voicebtpcm_p2m_pcm_cache_size = VOICEBTPCM_PCM_16K_QUEUE_SIZE;\n voicebtpcm_m2p_pcm_cache_size = VOICEBTPCM_PCM_16K_QUEUE_SIZE;\n } else {\n voicebtpcm_p2m_pcm_cache_size = VOICEBTPCM_PCM_8K_QUEUE_SIZE;\n voicebtpcm_m2p_pcm_cache_size = VOICEBTPCM_PCM_8K_QUEUE_SIZE;\n }\n\n voicebtpcm_p2m_cache_threshold = voicebtpcm_p2m_pcm_cache_size / 2;\n voicebtpcm_m2p_cache_threshold = voicebtpcm_m2p_pcm_cache_size / 2;\n\n app_audio_mempool_get_buff(&p2m_pcm_buff, voicebtpcm_p2m_pcm_cache_size);\n app_audio_mempool_get_buff(&m2p_pcm_buff, voicebtpcm_m2p_pcm_cache_size);\n#if defined(TX_RX_PCM_MASK)\n app_audio_mempool_get_buff(&Mic_frame_buff, pcm_buf_size);\n app_audio_mempool_get_buff(&Rx_esco_buff, pcm_buf_size);\n#endif\n\n LOCK_APP_AUDIO_QUEUE();\n APP_AUDIO_InitCQueue(&voicebtpcm_p2m_pcm_queue, voicebtpcm_p2m_pcm_cache_size,\n p2m_pcm_buff);\n APP_AUDIO_InitCQueue(&voicebtpcm_m2p_pcm_queue, voicebtpcm_m2p_pcm_cache_size,\n m2p_pcm_buff);\n\n#if defined(TX_RX_PCM_MASK)\n APP_AUDIO_InitCQueue(&Tx_esco_queue, pcm_buf_size, Mic_frame_buff);\n APP_AUDIO_InitCQueue(&Rx_esco_queue, pcm_buf_size, Rx_esco_buff);\n#endif\n UNLOCK_APP_AUDIO_QUEUE();\n\n voicebtpcm_cache_m2p_status = APP_AUDIO_CACHE_CACHEING;\n voicebtpcm_cache_p2m_status = APP_AUDIO_CACHE_CACHEING;\n\n#if defined(HFP_1_6_ENABLE)\n\n memset(DecPcmBuf, 0, SAMPLES_LEN_PER_FRAME * sizeof(short));\n memset(DecMsbcBuf, 0, MSBC_LEN_PER_FRAME * sizeof(unsigned char));\n memset(DecMsbcBufAll, 0, sizeof(DecMsbcBufAll));\n\n if (bt_sco_codec_is_msbc()) {\n app_audio_mempool_get_buff((uint8_t **)&msbc_encoder,\n sizeof(btif_sbc_encoder_t));\n#if !defined(PENDING_MSBC_DECODER_ALG)\n app_audio_mempool_get_buff(&temp_msbc_buf, MSBC_ENCODE_PCM_LEN);\n app_audio_mempool_get_buff(&temp_msbc_buf1, MSBC_FRAME_SIZE);\n#else\n app_audio_mempool_get_buff(&msbc_buf_before_decode,\n MSBC_FRAME_SIZE * sizeof(short));\n app_audio_mempool_get_buff(&temp_msbc_buf,\n MSBC_ENCODE_PCM_LEN * sizeof(short));\n app_audio_mempool_get_buff(&temp_msbc_buf1,\n MSBC_ENCODE_PCM_LEN * sizeof(short));\n#endif\n // init msbc encoder\n btif_sbc_init_encoder(msbc_encoder);\n msbc_encoder->streamInfo.mSbcFlag = 1;\n msbc_encoder->streamInfo.numChannels = 1;\n msbc_encoder->streamInfo.channelMode = BTIF_SBC_CHNL_MODE_MONO;\n\n msbc_encoder->streamInfo.bitPool = 26;\n msbc_encoder->streamInfo.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n msbc_encoder->streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_LOUDNESS;\n msbc_encoder->streamInfo.numBlocks = BTIF_MSBC_BLOCKS;\n msbc_encoder->streamInfo.numSubBands = 8;\n\n msbc_counter = 0x08;\n\n // init msbc decoder\n const float EQLevel[25] = {\n 0.0630957, 0.0794328, 0.1, 0.1258925, 0.1584893,\n 0.1995262, 0.2511886, 0.3162278, 0.398107, 0.5011872,\n 0.6309573, 0.794328, 1, 1.258925, 1.584893,\n 1.995262, 2.5118864, 3.1622776, 3.9810717, 5.011872,\n 6.309573, 7.943282, 10, 12.589254, 15.848932}; //-12~12\n uint8_t i;\n\n for (i = 0; i < sizeof(msbc_eq_band_gain) / sizeof(float); i++) {\n msbc_eq_band_gain[i] = EQLevel[cfg_aud_eq_sbc_band_settings[i] + 12];\n }\n\n btif_sbc_init_decoder(&msbc_decoder);\n\n msbc_decoder.streamInfo.mSbcFlag = 1;\n msbc_decoder.streamInfo.bitPool = 26;\n msbc_decoder.streamInfo.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n msbc_decoder.streamInfo.channelMode = BTIF_SBC_CHNL_MODE_MONO;\n msbc_decoder.streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_LOUDNESS;\n /* Number of blocks used to encode the stream (4, 8, 12, or 16) */\n msbc_decoder.streamInfo.numBlocks = BTIF_MSBC_BLOCKS;\n /* The number of subbands in the stream (4 or 8) */\n msbc_decoder.streamInfo.numSubBands = 8;\n msbc_decoder.streamInfo.numChannels = 1;\n#if defined(PENDING_MSBC_DECODER_ALG)\n last_msbc_sync_num = 0;\n APP_AUDIO_InitCQueue(&msbc_temp_queue, sizeof(DecMsbcBufAll),\n (uint8_t *)DecMsbcBufAll);\n#endif\n // init msbc plc\n\n#ifndef ENABLE_LPC_PLC\n InitPLC(&msbc_plc_state);\n#endif\n\n next_frame_flag = 0;\n msbc_find_first_sync = 0;\n\n packet_loss_detection_init(&pld);\n\n#if defined(ENABLE_PLC_ENCODER)\n app_audio_mempool_get_buff((uint8_t **)&msbc_plc_encoder,\n sizeof(btif_sbc_encoder_t));\n btif_sbc_init_encoder(msbc_plc_encoder);\n msbc_plc_encoder->streamInfo.mSbcFlag = 1;\n msbc_plc_encoder->streamInfo.bitPool = 26;\n msbc_plc_encoder->streamInfo.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n msbc_plc_encoder->streamInfo.channelMode = BTIF_SBC_CHNL_MODE_MONO;\n msbc_plc_encoder->streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_LOUDNESS;\n /* Number of blocks used to encode the stream (4, 8, 12, or 16) */\n msbc_plc_encoder->streamInfo.numBlocks = BTIF_MSBC_BLOCKS;\n /* The number of subbands in the stream (4 or 8) */\n msbc_plc_encoder->streamInfo.numSubBands = 8;\n msbc_plc_encoder->streamInfo.numChannels = 1;\n app_audio_mempool_get_buff((uint8_t **)&msbc_plc_encoder_buffer,\n sizeof(int16_t) *\n (SAMPLES_LEN_PER_FRAME + MSBC_CODEC_DELAY));\n#endif\n } else\n#endif\n {\n speech_plc = (PlcSt_8000 *)speech_plc_8000_init(voicebtpcm_get_ext_buff);\n }\n\n#if defined(CVSD_BYPASS)\n Pcm8k_CvsdInit();\n#endif\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_temp_buf =\n (int16_t *)voicebtpcm_get_ext_buff(sizeof(int16_t) * 120);\n audio_dump_init(120, sizeof(short), 3);\n#endif\n\n resample_needed_flag = (sco_sample_rate == codec_sample_rate) ? 0 : 1;\n\n if (resample_needed_flag == true) {\n // upsample_buf_for_msbc -> uplink resampler\n // downsample_buf_for_msbc -> downlink resampler\n // store msbc pcm buffer\n upsample_buf_for_msbc =\n (int16_t *)voicebtpcm_get_ext_buff(sizeof(int16_t) * sco_frame_length);\n downsample_buf_for_msbc =\n (int16_t *)voicebtpcm_get_ext_buff(sizeof(int16_t) * sco_frame_length);\n }\n\n#if defined(SCO_OPTIMIZE_FOR_RAM)\n sco_overlay_ram_buf_len =\n hal_overlay_get_text_free_size((enum HAL_OVERLAY_ID_T)APP_OVERLAY_HFP);\n sco_overlay_ram_buf = (uint8_t *)hal_overlay_get_text_free_addr(\n (enum HAL_OVERLAY_ID_T)APP_OVERLAY_HFP);\n#endif\n\n speech_len = app_audio_mempool_free_buff_size() - APP_BT_STREAM_USE_BUF_SIZE;\n speech_buf = (uint8_t *)voicebtpcm_get_ext_buff(speech_len);\n\n int tx_frame_ms = SPEECH_PROCESS_FRAME_MS;\n int rx_frame_ms = SPEECH_PROCESS_FRAME_MS;\n#if !defined(SPEECH_RX_NS2FLOAT)\n rx_frame_ms = SPEECH_SCO_FRAME_MS;\n#endif\n speech_init(codec_sample_rate, codec_sample_rate, tx_frame_ms, rx_frame_ms,\n SPEECH_SCO_FRAME_MS, speech_buf, speech_len);\n\n if (resample_needed_flag == true) {\n // Resample state must be created after speech init, as it uses speech heap\n upsample_st = iir_resample_init(\n codec_frame_length,\n iir_resample_choose_mode(codec_sample_rate, sco_sample_rate));\n downsample_st = iir_resample_init(\n sco_frame_length,\n iir_resample_choose_mode(sco_sample_rate, codec_sample_rate));\n }\n\n#if defined(HFP_1_6_ENABLE) && defined(ENABLE_LPC_PLC)\n msbc_plc_state = lpc_plc_create(sco_sample_rate);\n#endif\n\n return 0;\n}\n\nint voicebtpcm_pcm_audio_deinit(void) {\n TRACE(1, \"[%s] Close...\", __func__);\n // TRACE(2,\"[%s] app audio buffer free = %d\", __func__,\n // app_audio_mempool_free_buff_size());\n\n#if defined(HFP_1_6_ENABLE) && defined(ENABLE_LPC_PLC)\n lpc_plc_destroy(msbc_plc_state);\n#endif\n\n if (resample_needed_flag == true) {\n iir_resample_destroy(upsample_st);\n iir_resample_destroy(downsample_st);\n }\n\n speech_deinit();\n\n#if defined(HFP_1_6_ENABLE)\n#if !defined(PENDING_MSBC_DECODER_ALG)\n packet_loss_detection_report(&pld);\n#endif\n#endif\n\n#if defined(SCO_OPTIMIZE_FOR_RAM)\n sco_overlay_ram_buf = NULL;\n sco_overlay_ram_buf_len = 0;\n#endif\n\n voicebtpcm_pcm_echo_buf_queue_deinit();\n\n // TRACE(1,\"Free buf = %d\", app_audio_mempool_free_buff_size());\n\n return 0;\n}" }, { "path": "apps/audioplayers/voicebtpcmplay_sco_dma_snapshot.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Standard C Included Files\n#include \"app_audio.h\"\n#include \"app_overlay.h\"\n#include \"app_ring_merge.h\"\n#include \"audio_prompt_sbc.h\"\n#include \"bt_sco_chain.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"hfp_api.h\"\n#include \"iir_resample.h\"\n#include \"plat_types.h\"\n#include \"tgt_hardware.h\"\n#include \n#include \n#include \n#include \n#include \n#ifdef TX_RX_PCM_MASK\n#include \"bt_drv_interface.h\"\n#endif\n\n#define ENABLE_LPC_PLC\n\n#define ENABLE_PLC_ENCODER\n\n// BT\n#include \"a2dp_api.h\"\n#include \"plc_utils.h\"\nextern \"C\" {\n\n#include \"plc_8000.h\"\n#include \"speech_utils.h\"\n#if defined(HFP_1_6_ENABLE)\n#include \"codec_sbc.h\"\n#ifndef ENABLE_LPC_PLC\n#include \"plc_16000.h\"\n#endif\n#endif\n#if defined(CVSD_BYPASS)\n#include \"Pcm8k_Cvsd.h\"\n#endif\n#ifndef ENABLE_LPC_PLC\nstatic void *speech_plc;\n#endif\n}\n\n#if defined(ENABLE_LPC_PLC)\n#include \"lpc_plc_api.h\"\n#endif\n\n#if defined(SPEECH_TX_24BIT)\nextern int32_t *aec_echo_buf;\n#else\nextern short *aec_echo_buf;\n#endif\n\n// #define SPEECH_RX_PLC_DUMP_DATA\n\n// #define PLC_DEBUG_PRINT_DATA\n\n//#define DEBUG_SCO_DUMP\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n#include \"audio_dump.h\"\nint16_t *audio_dump_temp_buf = NULL;\n#endif\n\n// app_bt_stream.cpp::bt_sco_player(), used buffer size\n#define APP_BT_STREAM_USE_BUF_SIZE (1024 * 2)\n#if defined(SCO_OPTIMIZE_FOR_RAM)\nuint8_t *sco_overlay_ram_buf = NULL;\nint sco_overlay_ram_buf_len = 0;\n#endif\n\nstatic bool resample_needed_flag = false;\nstatic int sco_frame_length;\nstatic int codec_frame_length;\nstatic int16_t *resample_buf = NULL;\nstatic IirResampleState *uplink_resample_st = NULL;\nstatic IirResampleState *downlink_resample_st = NULL;\n\n#define MSBC_FRAME_SIZE (60)\n\n#if defined(HFP_1_6_ENABLE)\nstatic btif_sbc_decoder_t *msbc_decoder;\nstatic float msbc_eq_band_gain[CFG_HW_AUD_EQ_NUM_BANDS] = {0, 0, 0, 0,\n 0, 0, 0, 0};\n\n#define MSBC_ENCODE_PCM_LEN (240)\n\n#ifndef ENABLE_LPC_PLC\nstruct PLC_State msbc_plc_state;\n#endif\n\n#ifdef ENABLE_PLC_ENCODER\nstatic btif_sbc_encoder_t *msbc_plc_encoder;\nstatic int16_t *msbc_plc_encoder_buffer = NULL;\n#define MSBC_CODEC_DELAY (73)\n#endif\n\nstatic btif_sbc_encoder_t *msbc_encoder;\n#endif\n\n#if defined(ENABLE_LPC_PLC)\nLpcPlcState *msbc_plc_state = NULL;\n#endif\n\n#define VOICEBTPCM_TRACE(s, ...)\n// TRACE(s, ##__VA_ARGS__)\n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || \\\n defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A) || \\\n defined(CHIP_BEST2001)\n#define MSBC_MUTE_PATTERN (0x55)\n#else\n#define MSBC_MUTE_PATTERN (0x00)\n#endif\n#define MSBC_LEN_FORMBT_PER_FRAME (60) // Bytes; only for BES platform.\n#define SAMPLES_LEN_PER_FRAME (120)\n#define MSBC_LEN_PER_FRAME (57 + 3)\n#define BYTES_PER_PCM_FRAME (SAMPLES_LEN_PER_FRAME * 2)\n\n// Add 1 to ensure it never be out of bounds when msbc_offset is 1\nunsigned char msbc_buf_all[MSBC_LEN_FORMBT_PER_FRAME * 3 + 1];\n#if defined(HFP_1_6_ENABLE)\nstatic int msbc_find_first_sync = 0;\nstatic unsigned int msbc_offset = 0;\nstatic unsigned int next_frame_flag = 0;\n#endif\nstatic PacketLossState pld;\n\nextern bool bt_sco_codec_is_msbc(void);\n\nint process_downlink_msbc_frames(unsigned char *msbc_buf, unsigned int msbc_len,\n unsigned char *pcm_buf, unsigned int pcm_len);\nint process_downlink_cvsd_frames(unsigned char *cvsd_buf, unsigned int cvsd_len,\n unsigned char *pcm_buf, unsigned int pcm_len);\nint process_uplink_msbc_frames(unsigned char *pcm_buf, unsigned int pcm_len,\n unsigned char *msbc_buf, unsigned int msbc_len);\nint process_uplink_cvsd_frames(unsigned char *pcm_buf, unsigned int pcm_len,\n unsigned char *cvsd_buf, unsigned int cvsd_len);\n\nint process_downlink_bt_voice_frames(uint8_t *in_buf, uint32_t in_len,\n uint8_t *out_buf, uint32_t out_len,\n int32_t codec_type) {\n // TRACE(3,\"[%s] in_len = %d, out_len = %d\", __FUNCTION__, in_len, out_len);\n\n#if defined(SPEECH_RX_24BIT)\n out_len /= 2;\n#endif\n\n int16_t *pcm_buf = (int16_t *)out_buf;\n int pcm_len = out_len / sizeof(int16_t);\n\n if (resample_needed_flag == true) {\n pcm_buf = resample_buf;\n pcm_len = sco_frame_length;\n }\n\n if (bt_sco_codec_is_msbc()) {\n process_downlink_msbc_frames(in_buf, in_len, (uint8_t *)pcm_buf,\n pcm_len * sizeof(int16_t));\n\n // Down sampling\n if (resample_needed_flag) {\n iir_resample_process(downlink_resample_st, pcm_buf, (int16_t *)out_buf,\n pcm_len);\n pcm_buf = (int16_t *)out_buf;\n pcm_len >>= 1;\n }\n } else {\n process_downlink_cvsd_frames(in_buf, in_len, (uint8_t *)pcm_buf,\n pcm_len * sizeof(int16_t));\n\n // Up sampling\n if (resample_needed_flag) {\n iir_resample_process(downlink_resample_st, pcm_buf, (int16_t *)out_buf,\n pcm_len);\n pcm_buf = (int16_t *)out_buf;\n pcm_len <<= 1;\n }\n }\n\n#if defined(SPEECH_RX_24BIT)\n int32_t *buf32 = (int32_t *)out_buf;\n for (int i = pcm_len - 1; i >= 0; i--) {\n buf32[i] = ((int32_t)pcm_buf[i] << 8);\n }\n#endif\n\n speech_rx_process(pcm_buf, &pcm_len);\n\n#if defined(SPEECH_RX_24BIT)\n out_len *= 2;\n#endif\n\n return 0;\n}\n\nint process_uplink_bt_voice_frames(uint8_t *in_buf, uint32_t in_len,\n uint8_t *ref_buf, uint32_t ref_len,\n uint8_t *out_buf, uint32_t out_len,\n int32_t codec_type) {\n // TRACE(3,\"[%s] in_len = %d, out_len = %d\", __FUNCTION__, in_len, out_len);\n\n#if defined(SPEECH_TX_24BIT)\n int32_t *pcm_buf = (int32_t *)in_buf;\n int pcm_len = in_len / sizeof(int32_t);\n#else\n int16_t *pcm_buf = (int16_t *)in_buf;\n int pcm_len = in_len / sizeof(int16_t);\n#endif\n\n#if defined(SPEECH_TX_AEC_CODEC_REF)\n ASSERT(pcm_len % (SPEECH_CODEC_CAPTURE_CHANNEL_NUM + 1) == 0,\n \"[%s] pcm_len(%d) should be divided by %d\", __FUNCTION__, pcm_len,\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM + 1);\n // copy reference buffer\n#if defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT) || \\\n defined(SPEECH_TX_THIRDPARTY)\n for (int i = SPEECH_CODEC_CAPTURE_CHANNEL_NUM, j = 0; i < pcm_len;\n i += SPEECH_CODEC_CAPTURE_CHANNEL_NUM + 1, j++) {\n aec_echo_buf[j] = pcm_buf[i];\n }\n#endif\n for (int i = 0, j = 0; i < pcm_len; i += SPEECH_CODEC_CAPTURE_CHANNEL_NUM + 1,\n j += SPEECH_CODEC_CAPTURE_CHANNEL_NUM) {\n for (int k = 0; k < SPEECH_CODEC_CAPTURE_CHANNEL_NUM; k++)\n pcm_buf[j + k] = pcm_buf[i + k];\n }\n pcm_len = pcm_len / (SPEECH_CODEC_CAPTURE_CHANNEL_NUM + 1) *\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n#elif (defined(SPEECH_TX_AEC) || defined(SPEECH_TX_AEC2) || \\\n defined(SPEECH_TX_AEC3) || defined(SPEECH_TX_AEC2FLOAT) || \\\n defined(SPEECH_TX_THIRDPARTY))\n int ref_pcm_len = ref_len / sizeof(int16_t);\n ASSERT(pcm_len / SPEECH_CODEC_CAPTURE_CHANNEL_NUM == ref_pcm_len,\n \"[%s] Length error: %d / %d != %d\", __func__, pcm_len,\n SPEECH_CODEC_CAPTURE_CHANNEL_NUM, ref_pcm_len);\n\n for (int i = 0; i < ref_pcm_len; i++) {\n aec_echo_buf[i] = ref_buf[i];\n }\n#endif\n speech_tx_process(pcm_buf, aec_echo_buf, &pcm_len);\n\n#if defined(SPEECH_TX_24BIT)\n int32_t *buf24 = (int32_t *)pcm_buf;\n int16_t *buf16 = (int16_t *)pcm_buf;\n for (int i = 0; i < pcm_len; i++)\n buf16[i] = (buf24[i] >> 8);\n#endif\n\n int16_t *pcm_buf_16bits = (int16_t *)pcm_buf;\n\n if (bt_sco_codec_is_msbc()) {\n // Up sampling\n if (resample_needed_flag) {\n iir_resample_process(uplink_resample_st, (int16_t *)pcm_buf_16bits,\n resample_buf, pcm_len);\n pcm_buf_16bits = resample_buf;\n pcm_len = sco_frame_length;\n }\n\n process_uplink_msbc_frames((uint8_t *)pcm_buf_16bits,\n pcm_len * sizeof(int16_t), out_buf, out_len);\n } else {\n // Down sampling\n if (resample_needed_flag) {\n iir_resample_process(uplink_resample_st, (int16_t *)pcm_buf_16bits,\n resample_buf, pcm_len);\n pcm_buf_16bits = resample_buf;\n pcm_len = sco_frame_length;\n }\n\n process_uplink_cvsd_frames((uint8_t *)pcm_buf_16bits,\n pcm_len * sizeof(int16_t), out_buf, out_len);\n }\n return 0;\n}\n\nint process_downlink_msbc_frames(unsigned char *msbc_buf, unsigned int msbc_len,\n unsigned char *pcm_buf, unsigned int pcm_len) {\n#if defined(HFP_1_6_ENABLE)\n\n btif_sbc_pcm_data_t pcm_data;\n unsigned int msbc_offset_lowdelay = 0;\n unsigned int i, j;\n unsigned char *msbc_buffer = (unsigned char *)msbc_buf;\n int frame_flag[6]; // 1: good frame; 0:bad frame;\n bt_status_t ret;\n unsigned int frame_counter = 0;\n unsigned short byte_decode = 0;\n unsigned int msbc_offset_total = 0;\n int msbc_offset_drift[6] = {\n 0,\n };\n\n short *dec_pcm_buf = (short *)pcm_buf;\n unsigned char dec_msbc_buf[MSBC_LEN_PER_FRAME] = {\n 0,\n };\n\n // unsigned int timer_begin=hal_sys_timer_get();\n\n // TRACE(2,\"process_downlink_msbc_frames:pcm_len:%d,msbc_len:%d\",pcm_len,msbc_len);\n\n // TRACE(1,\"decode_msbc_frame,msbc_len:%d\",msbc_len);\n for (i = 0; i < msbc_len; i++) {\n msbc_buf_all[i + MSBC_LEN_FORMBT_PER_FRAME] = msbc_buffer[i];\n }\n\n /*\n for(i =0; i=\n msbc_offset_total) {\n frame_flag[j] = 3;\n } else {\n frame_flag[j] = 1;\n }\n }\n }\n }\n\n for (j = 0; j < msbc_len / MSBC_LEN_FORMBT_PER_FRAME; j++) {\n value = value | frame_flag[j];\n }\n // abnormal msbc packet.\n if (value > 1)\n msbc_find_first_sync = 0;\n }\n\n while ((frame_counter < msbc_len / MSBC_LEN_FORMBT_PER_FRAME) &&\n (frame_counter < pcm_len / BYTES_PER_PCM_FRAME)) {\n // TRACE(3,\"[%s] decoding, offset %d, offset drift %d\", __FUNCTION__,\n // msbc_offset, msbc_offset_drift[frame_counter]);\n // skip first byte when msbc_offset == 0 and msbc_offset_drift == -1\n unsigned int start_idx = 0;\n if (msbc_offset_lowdelay == 0 && msbc_offset_drift[frame_counter] == -1) {\n start_idx = 1;\n dec_msbc_buf[0] = 0x01;\n }\n for (i = start_idx; i < MSBC_LEN_PER_FRAME; i++) {\n // DecMsbcBuf[i]=DecMsbcBufAll[i+msbc_offset_lowdelay+frame_counter*MSBC_LEN_FORMBT_PER_FRAME+2];\n dec_msbc_buf[i] = msbc_buf_all[i + msbc_offset_lowdelay +\n msbc_offset_drift[frame_counter] +\n frame_counter * MSBC_LEN_FORMBT_PER_FRAME];\n }\n\n // TRACE(1,\"msbc header:0x%x\",DecMsbcBuf[0]);\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_add_channel_data(2, (short *)dec_msbc_buf,\n MSBC_LEN_PER_FRAME / 2);\n#endif\n\n plc_type_t plc_type = packet_loss_detection_process(&pld, dec_msbc_buf);\n\n if (plc_type != PLC_TYPE_PASS) {\n memset(dec_pcm_buf, 0, SAMPLES_LEN_PER_FRAME * sizeof(int16_t));\n goto do_plc;\n }\n\n pcm_data.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n pcm_data.numChannels = 1;\n pcm_data.dataLen = 0;\n pcm_data.data = (uint8_t *)dec_pcm_buf;\n\n ret = btif_sbc_decode_frames(msbc_decoder, (unsigned char *)dec_msbc_buf,\n MSBC_LEN_PER_FRAME, &byte_decode, &pcm_data,\n SAMPLES_LEN_PER_FRAME * 2, msbc_eq_band_gain);\n\n // ASSERT(ret == BT_STS_SUCCESS, \"[%s] msbc decoder should never fail\",\n // __FUNCTION__);\n if (ret != BT_STS_SUCCESS) {\n plc_type = PLC_TYPE_DECODER_ERROR;\n packet_loss_detection_update_histogram(&pld, plc_type);\n }\n\n do_plc:\n if (plc_type == PLC_TYPE_PASS) {\n#if defined(ENABLE_LPC_PLC)\n lpc_plc_save(msbc_plc_state, dec_pcm_buf);\n#else\n PLC_good_frame(&msbc_plc_state, dec_pcm_buf, dec_pcm_buf);\n#endif\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_add_channel_data(0, (short *)dec_pcm_buf,\n MSBC_ENCODE_PCM_LEN / 2);\n#endif\n } else {\n TRACE(1, \"PLC bad frame, plc type: %d\", plc_type);\n#if defined(PLC_DEBUG_PRINT_DATA)\n DUMP8(\"0x%02x, \", dec_msbc_buf, 60);\n#endif\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n for (uint32_t i = 0; i < MSBC_ENCODE_PCM_LEN / 2; i++) {\n audio_dump_temp_buf[i] = (plc_type - 1) * 5000;\n }\n audio_dump_add_channel_data(0, audio_dump_temp_buf,\n MSBC_ENCODE_PCM_LEN / 2);\n#endif\n#if defined(ENABLE_LPC_PLC)\n lpc_plc_generate(msbc_plc_state, dec_pcm_buf,\n#if defined(ENABLE_PLC_ENCODER)\n msbc_plc_encoder_buffer\n#else\n NULL\n#endif\n );\n\n#if defined(ENABLE_PLC_ENCODER)\n pcm_data.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n pcm_data.numChannels = 1;\n pcm_data.dataLen = MSBC_ENCODE_PCM_LEN;\n pcm_data.data = (uint8_t *)(msbc_plc_encoder_buffer + MSBC_CODEC_DELAY);\n\n btif_plc_update_sbc_decoder_state(msbc_plc_encoder, &pcm_data,\n msbc_decoder, msbc_eq_band_gain);\n#endif\n\n#else\n pcm_data.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n pcm_data.numChannels = 1;\n pcm_data.dataLen = 0;\n pcm_data.data = (uint8_t *)dec_pcm_buf;\n\n ret =\n btif_sbc_decode_frames(msbc_decoder, (unsigned char *)indices0,\n MSBC_LEN_PER_FRAME, &byte_decode, &pcm_data,\n SAMPLES_LEN_PER_FRAME * 2, msbc_eq_band_gain);\n\n PLC_bad_frame(&msbc_plc_state, dec_pcm_buf, dec_pcm_buf);\n\n ASSERT(ret == BT_STS_SUCCESS, \"[%s] msbc decoder should never fail\",\n __FUNCTION__);\n#endif\n }\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_add_channel_data(1, (short *)dec_pcm_buf,\n MSBC_ENCODE_PCM_LEN / 2);\n audio_dump_run();\n#endif\n\n dec_pcm_buf = dec_pcm_buf + SAMPLES_LEN_PER_FRAME;\n frame_counter++;\n }\n\n for (i = 0; i < MSBC_LEN_FORMBT_PER_FRAME; i++) {\n msbc_buf_all[i] = msbc_buf_all[i + msbc_len];\n }\n#endif\n // TRACE(1,\"msbc + plc:%d\", (hal_sys_timer_get()-timer_begin));\n return 0;\n}\n\n#ifdef TX_RX_PCM_MASK\n#define MSBC_OFFSET_BYTES (0)\n#else\n#if defined(PCM_FAST_MODE)\n#define MSBC_OFFSET_BYTES (1) // This is reletive with chip.\n#else\n#define MSBC_OFFSET_BYTES (2) // This is reletive with chip.\n#endif\n#endif\n\n#define MSBC_OFFSET_HEADER0_BYTES \\\n ((MSBC_LEN_PER_FRAME - MSBC_OFFSET_BYTES) % MSBC_LEN_PER_FRAME)\n#define MSBC_OFFSET_HEADER1_BYTES \\\n ((MSBC_LEN_PER_FRAME - MSBC_OFFSET_BYTES + 1) % MSBC_LEN_PER_FRAME)\n\nint process_uplink_msbc_frames(unsigned char *pcm_buf, unsigned int pcm_len,\n unsigned char *msbc_buf, unsigned int msbc_len) {\n#if defined(HFP_1_6_ENABLE)\n uint32_t frame_counter = 0;\n static uint32_t frame_counter_total = 0;\n static btif_sbc_pcm_data_t pcm_data_enc;\n uint16_t bytes_encoded = 0;\n static uint8_t msbc_buf_frame[MSBC_LEN_PER_FRAME * 2];\n uint16_t msbc_len_frame = MSBC_LEN_PER_FRAME - 3;\n\n // TRACE(2,\"process_uplink_msbc_frames:pcm_len:%d,msbc_len:%d\",pcm_len,msbc_len);\n\n while ((frame_counter < msbc_len / MSBC_LEN_FORMBT_PER_FRAME) &&\n (frame_counter < pcm_len / BYTES_PER_PCM_FRAME)) {\n unsigned short *msbc_buf_dst_p;\n pcm_data_enc.data = pcm_buf + frame_counter * BYTES_PER_PCM_FRAME;\n pcm_data_enc.dataLen = BYTES_PER_PCM_FRAME;\n\n#if (MSBC_OFFSET_BYTES == 0) || (MSBC_OFFSET_BYTES == 1) || \\\n (MSBC_OFFSET_BYTES == 2)\n // body\n btif_sbc_encode_frames(msbc_encoder, &pcm_data_enc, &bytes_encoded,\n &(msbc_buf_frame[2 - MSBC_OFFSET_BYTES]),\n (uint16_t *)&msbc_len_frame, 0xFFFF);\n // tail\n msbc_buf_frame[59 - MSBC_OFFSET_BYTES] = 0x00;\n // header\n msbc_buf_frame[MSBC_OFFSET_HEADER0_BYTES] = 0x01;\n switch ((frame_counter_total % 4)) {\n case 0:\n msbc_buf_frame[MSBC_OFFSET_HEADER1_BYTES] = 0x08;\n break;\n case 1:\n msbc_buf_frame[MSBC_OFFSET_HEADER1_BYTES] = 0x38;\n break;\n case 2:\n msbc_buf_frame[MSBC_OFFSET_HEADER1_BYTES] = 0xc8;\n break;\n default:\n msbc_buf_frame[MSBC_OFFSET_HEADER1_BYTES] = 0xf8;\n break;\n }\n msbc_buf_dst_p =\n (uint16_t *)(msbc_buf + frame_counter * MSBC_LEN_PER_FRAME * 2);\n\n for (int i = 0; i < MSBC_LEN_PER_FRAME; i++) {\n msbc_buf_dst_p[i] = msbc_buf_frame[i] << 8;\n }\n#else\n btif_sbc_encode_frames(msbc_encoder, &pcm_data_enc, &bytes_encoded,\n &(msbc_buf_frame[MSBC_LEN_PER_FRAME + 2]),\n (uint16_t *)&msbc_len_frame, 0xFFFF);\n msbc_buf_frame[MSBC_LEN_PER_FRAME + 0] = 0x01;\n switch ((frame_counter_total % 4)) {\n case 0:\n msbc_buf_frame[MSBC_LEN_PER_FRAME + 1] = 0x08;\n break;\n case 1:\n msbc_buf_frame[MSBC_LEN_PER_FRAME + 1] = 0x38;\n break;\n case 2:\n msbc_buf_frame[MSBC_LEN_PER_FRAME + 1] = 0xc8;\n break;\n default:\n msbc_buf_frame[MSBC_LEN_PER_FRAME + 1] = 0xf8;\n break;\n }\n msbc_buf_frame[MSBC_LEN_PER_FRAME + 59] = 0x00;\n msbc_buf_dst_p =\n (uint16_t *)(msbc_buf + frame_counter * MSBC_LEN_PER_FRAME * 2);\n\n for (int i = 0; i < MSBC_LEN_PER_FRAME; i++) {\n msbc_buf_dst_p[i] = msbc_buf_frame[MSBC_OFFSET_BYTES + i] << 8;\n }\n\n for (int i = 0; i < MSBC_LEN_PER_FRAME; i++) {\n msbc_buf_frame[i] = msbc_buf_frame[MSBC_LEN_PER_FRAME + i];\n }\n#endif\n frame_counter_total++;\n frame_counter++;\n }\n#endif\n return 0;\n}\n\n#if defined(CHIP_BEST2300A)\n#define CVSD_OFFSET_BYTES (120)\n#else\n#define CVSD_OFFSET_BYTES (120 - 2)\n#endif\n\n#define CVSD_PACKET_SIZE (120)\n\n#define CVSD_PACKET_NUM (2)\n\n#define CVSD_MUTE_PATTERN (0x55)\n\n#define CVSD_PCM_SIZE (120)\n\nstatic POSSIBLY_UNUSED uint8_t\n cvsd_buf_all[CVSD_PACKET_SIZE + CVSD_OFFSET_BYTES];\n\nPOSSIBLY_UNUSED plc_type_t check_cvsd_mute_pattern(uint8_t *buf, uint32_t len) {\n for (uint32_t i = 0; i < len; i++)\n if (buf[i] != CVSD_MUTE_PATTERN)\n return PLC_TYPE_PASS;\n\n return PLC_TYPE_CONTROLLER_MUTE;\n}\n\nint process_downlink_cvsd_frames(unsigned char *cvsd_buf, unsigned int cvsd_len,\n unsigned char *pcm_buf, unsigned int pcm_len) {\n // TRACE(2,\"process_downlink_cvsd_frames\n // pcm_len:%d,cvsd_len:%d\",pcm_len,cvsd_len);\n\n#if defined(CVSD_BYPASS) && defined(ENABLE_LPC_PLC)\n ASSERT(cvsd_len % CVSD_PACKET_SIZE == 0, \"[%s] cvsd input length(%d) error\",\n __FUNCTION__, cvsd_len);\n for (uint32_t i = 0; i < cvsd_len; i += CVSD_PACKET_SIZE) {\n memcpy(&cvsd_buf_all[CVSD_OFFSET_BYTES], cvsd_buf, CVSD_PACKET_SIZE);\n memcpy(cvsd_buf, cvsd_buf_all, CVSD_PACKET_SIZE);\n memcpy(cvsd_buf_all, &cvsd_buf_all[CVSD_PACKET_SIZE], CVSD_OFFSET_BYTES);\n\n // DUMP16(\"0x%x, \", cvsd_buf, CVSD_PACKET_SIZE / 2);\n\n plc_type_t plc_type = check_cvsd_mute_pattern(cvsd_buf, CVSD_PACKET_SIZE);\n\n if (plc_type != PLC_TYPE_PASS) {\n memset(pcm_buf, 0, CVSD_PCM_SIZE);\n goto do_plc;\n }\n\n CvsdToPcm8k(cvsd_buf, (short *)(pcm_buf), CVSD_PACKET_SIZE / 2, 0);\n\n do_plc:\n if (plc_type == PLC_TYPE_PASS) {\n lpc_plc_save(msbc_plc_state, (int16_t *)pcm_buf);\n } else {\n TRACE(1, \"PLC bad frame, plc type: %d\", plc_type);\n#if defined(PLC_DEBUG_PRINT_DATA)\n DUMP16(\"0x%x, \", cvsd_buf, CVSD_PACKET_SIZE / 2);\n#endif\n lpc_plc_generate(msbc_plc_state, (int16_t *)pcm_buf, NULL);\n }\n\n cvsd_buf += CVSD_PACKET_SIZE;\n pcm_buf += CVSD_PCM_SIZE;\n }\n#else\n#if defined(CVSD_BYPASS)\n CvsdToPcm8k(cvsd_buf, (short *)(pcm_buf), cvsd_len / 2, 0);\n#else\n memcpy(pcm_buf, cvsd_buf, cvsd_len);\n#endif\n#ifndef ENABLE_LPC_PLC\n speech_plc_8000((PlcSt_8000 *)speech_plc, (short *)pcm_buf, pcm_len);\n#endif\n#endif\n\n return 0;\n}\nint process_uplink_cvsd_frames(unsigned char *pcm_buf, unsigned int pcm_len,\n unsigned char *cvsd_buf, unsigned int cvsd_len) {\n // TRACE(2,\"process_uplink_cvsd_frames\n // pcm_len:%d,cvsd_len:%d\",pcm_len,cvsd_len);\n#if defined(CVSD_BYPASS)\n Pcm8kToCvsd((short *)pcm_buf, cvsd_buf, pcm_len / 2);\n#endif\n return 0;\n}\nvoid *voicebtpcm_get_ext_buff(int size) {\n uint8_t *pBuff = NULL;\n if (size % 4) {\n size = size + (4 - size % 4);\n }\n app_audio_mempool_get_buff(&pBuff, size);\n VOICEBTPCM_TRACE(2, \"[%s] len:%d\", __func__, size);\n return (void *)pBuff;\n}\n// sco sample rate: encoder/decoder sample rate\n// codec sample rate: hardware sample rate\nint voicebtpcm_pcm_audio_init(int sco_sample_rate, int codec_sample_rate) {\n uint8_t POSSIBLY_UNUSED *speech_buf = NULL;\n int POSSIBLY_UNUSED speech_len = 0;\n\n sco_frame_length =\n SPEECH_FRAME_MS_TO_LEN(sco_sample_rate, SPEECH_SCO_FRAME_MS);\n codec_frame_length =\n SPEECH_FRAME_MS_TO_LEN(codec_sample_rate, SPEECH_SCO_FRAME_MS);\n\n TRACE(3, \"[%s] TX: sample rate = %d, frame len = %d\", __func__,\n codec_sample_rate, codec_frame_length);\n TRACE(3, \"[%s] RX: sample rate = %d, frame len = %d\", __func__,\n codec_sample_rate, codec_frame_length);\n\n memset(cvsd_buf_all, CVSD_MUTE_PATTERN, sizeof(cvsd_buf_all));\n#if defined(HFP_1_6_ENABLE)\n\n memset(msbc_buf_all, MSBC_MUTE_PATTERN & 0xFF, sizeof(msbc_buf_all));\n if (bt_sco_codec_is_msbc()) {\n app_audio_mempool_get_buff((uint8_t **)&msbc_encoder,\n sizeof(btif_sbc_encoder_t));\n app_audio_mempool_get_buff((uint8_t **)&msbc_decoder,\n sizeof(btif_sbc_decoder_t));\n\n // init msbc encoder\n btif_sbc_init_encoder(msbc_encoder);\n msbc_encoder->streamInfo.mSbcFlag = 1;\n msbc_encoder->streamInfo.numChannels = 1;\n msbc_encoder->streamInfo.channelMode = BTIF_SBC_CHNL_MODE_MONO;\n\n msbc_encoder->streamInfo.bitPool = 26;\n msbc_encoder->streamInfo.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n msbc_encoder->streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_LOUDNESS;\n msbc_encoder->streamInfo.numBlocks = BTIF_MSBC_BLOCKS;\n msbc_encoder->streamInfo.numSubBands = 8;\n\n // init msbc decoder\n const float EQLevel[25] = {\n 0.0630957, 0.0794328, 0.1, 0.1258925, 0.1584893,\n 0.1995262, 0.2511886, 0.3162278, 0.398107, 0.5011872,\n 0.6309573, 0.794328, 1, 1.258925, 1.584893,\n 1.995262, 2.5118864, 3.1622776, 3.9810717, 5.011872,\n 6.309573, 7.943282, 10, 12.589254, 15.848932}; //-12~12\n uint8_t i;\n\n for (i = 0; i < sizeof(msbc_eq_band_gain) / sizeof(float); i++) {\n msbc_eq_band_gain[i] = EQLevel[cfg_aud_eq_sbc_band_settings[i] + 12];\n }\n\n btif_sbc_init_decoder(msbc_decoder);\n\n msbc_decoder->streamInfo.mSbcFlag = 1;\n msbc_decoder->streamInfo.bitPool = 26;\n msbc_decoder->streamInfo.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n msbc_decoder->streamInfo.channelMode = BTIF_SBC_CHNL_MODE_MONO;\n msbc_decoder->streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_LOUDNESS;\n /* Number of blocks used to encode the stream (4, 8, 12, or 16) */\n msbc_decoder->streamInfo.numBlocks = BTIF_MSBC_BLOCKS;\n /* The number of subbands in the stream (4 or 8) */\n msbc_decoder->streamInfo.numSubBands = 8;\n msbc_decoder->streamInfo.numChannels = 1;\n\n // init msbc plc\n#ifndef ENABLE_LPC_PLC\n InitPLC(&msbc_plc_state);\n#endif\n\n next_frame_flag = 0;\n msbc_find_first_sync = 0;\n\n packet_loss_detection_init(&pld);\n\n#if defined(ENABLE_PLC_ENCODER)\n app_audio_mempool_get_buff((uint8_t **)&msbc_plc_encoder,\n sizeof(btif_sbc_encoder_t));\n btif_sbc_init_encoder(msbc_plc_encoder);\n msbc_plc_encoder->streamInfo.mSbcFlag = 1;\n msbc_plc_encoder->streamInfo.bitPool = 26;\n msbc_plc_encoder->streamInfo.sampleFreq = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n msbc_plc_encoder->streamInfo.channelMode = BTIF_SBC_CHNL_MODE_MONO;\n msbc_plc_encoder->streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_LOUDNESS;\n /* Number of blocks used to encode the stream (4, 8, 12, or 16) */\n msbc_plc_encoder->streamInfo.numBlocks = BTIF_MSBC_BLOCKS;\n /* The number of subbands in the stream (4 or 8) */\n msbc_plc_encoder->streamInfo.numSubBands = 8;\n msbc_plc_encoder->streamInfo.numChannels = 1;\n app_audio_mempool_get_buff((uint8_t **)&msbc_plc_encoder_buffer,\n sizeof(int16_t) *\n (SAMPLES_LEN_PER_FRAME + MSBC_CODEC_DELAY));\n#endif\n } else\n#endif\n {\n#ifndef ENABLE_LPC_PLC\n speech_plc = (PlcSt_8000 *)speech_plc_8000_init(voicebtpcm_get_ext_buff);\n#endif\n }\n\n#if defined(CVSD_BYPASS)\n Pcm8k_CvsdInit();\n#endif\n\n#ifdef SPEECH_RX_PLC_DUMP_DATA\n audio_dump_temp_buf =\n (int16_t *)voicebtpcm_get_ext_buff(sizeof(int16_t) * 120);\n audio_dump_init(120, sizeof(short), 3);\n#endif\n\n resample_needed_flag = (sco_sample_rate == codec_sample_rate) ? 0 : 1;\n\n if (resample_needed_flag) {\n TRACE(1, \"[%s] SCO <-- Resample --> CODEC\", __func__);\n resample_buf =\n (int16_t *)voicebtpcm_get_ext_buff(sizeof(int16_t) * sco_frame_length);\n }\n\n#if defined(SCO_OPTIMIZE_FOR_RAM)\n sco_overlay_ram_buf_len =\n hal_overlay_get_text_free_size((enum HAL_OVERLAY_ID_T)APP_OVERLAY_HFP);\n sco_overlay_ram_buf = (uint8_t *)hal_overlay_get_text_free_addr(\n (enum HAL_OVERLAY_ID_T)APP_OVERLAY_HFP);\n#endif\n\n speech_len = app_audio_mempool_free_buff_size() - APP_BT_STREAM_USE_BUF_SIZE;\n speech_buf = (uint8_t *)voicebtpcm_get_ext_buff(speech_len);\n\n int tx_frame_ms = SPEECH_PROCESS_FRAME_MS;\n int rx_frame_ms = SPEECH_SCO_FRAME_MS;\n speech_init(codec_sample_rate, codec_sample_rate, tx_frame_ms, rx_frame_ms,\n SPEECH_SCO_FRAME_MS, speech_buf, speech_len);\n\n if (resample_needed_flag) {\n uplink_resample_st = iir_resample_init(\n codec_frame_length,\n iir_resample_choose_mode(codec_sample_rate, sco_sample_rate));\n downlink_resample_st = iir_resample_init(\n sco_frame_length,\n iir_resample_choose_mode(sco_sample_rate, codec_sample_rate));\n }\n\n#if defined(ENABLE_LPC_PLC)\n msbc_plc_state = lpc_plc_create(sco_sample_rate);\n#endif\n\n return 0;\n}\n\nint voicebtpcm_pcm_audio_deinit(void) {\n TRACE(1, \"[%s] Close...\", __func__);\n // TRACE(2,\"[%s] app audio buffer free = %d\", __func__,\n // app_audio_mempool_free_buff_size());\n\n#if defined(ENABLE_LPC_PLC)\n lpc_plc_destroy(msbc_plc_state);\n#endif\n\n if (resample_needed_flag) {\n iir_resample_destroy(uplink_resample_st);\n iir_resample_destroy(downlink_resample_st);\n }\n\n speech_deinit();\n\n packet_loss_detection_report(&pld);\n\n#if defined(SCO_OPTIMIZE_FOR_RAM)\n sco_overlay_ram_buf = NULL;\n sco_overlay_ram_buf_len = 0;\n#endif\n\n // TRACE(1,\"Free buf = %d\", app_audio_mempool_free_buff_size());\n\n return 0;\n}" }, { "path": "apps/audioplayers/wavplay.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef MBED\n#include \"mbed.h\"\n#endif\n// Standard C Included Files\n#include \n#include \n#include \n#include \n#include \n\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n\n/*!\n * * @brief Standard Winodws PCM wave file header length\n * */\n#define WAVE_FILE_HEADER_SIZE 0x2CU\n\ntypedef struct wave_header {\n uint8_t riff[4];\n uint32_t size;\n uint8_t waveFlag[4];\n uint8_t fmt[4];\n uint32_t fmtLen;\n uint16_t tag;\n uint16_t channels;\n uint32_t sampFreq;\n uint32_t byteRate;\n uint16_t blockAlign;\n uint16_t bitSamp;\n uint8_t dataFlag[4];\n uint32_t length;\n} wave_header_t;\n\n/*!\n * * @brief Wave file structure\n * */\ntypedef struct wave_file {\n wave_header_t header;\n uint32_t *data;\n} wave_file_t;\n\n/* player */\nstatic unsigned int g_total_play_count = 0;\nstatic unsigned int g_curr_play_index = 0;\n\n/* wave */\nwave_file_t g_wave_file_info;\nstatic char g_wav_header[WAVE_FILE_HEADER_SIZE];\nFILE *g_wave_file_handle = NULL;\nstatic int32_t (*wav_file_playback_callback)(int32_t) = NULL;\n\n////////////////////////////////////////////////////////////////////////////////\n// Code\n////////////////////////////////////////////////////////////////////////////////\nvoid wav_file_set_playeback_cb(int32_t (*cb)(int32_t)) {\n wav_file_playback_callback = cb;\n}\nbool wav_file_isplaydone(void) {\n return (g_curr_play_index >= g_total_play_count) ? true : false;\n}\nuint32_t wav_file_audio_more_data(uint8_t *buf, uint32_t len) {\n // static uint32_t g_preIrqTime = 0;\n uint32_t reallen = 0;\n // int32_t stime,etime;\n int32_t status;\n\n /* play done ? */\n if (wav_file_isplaydone()) {\n memset(buf, 0, len);\n status = 0;\n if (wav_file_playback_callback)\n wav_file_playback_callback(status);\n return (len);\n }\n // stime = hal_sys_timer_get();\n /* read file */\n if (g_wave_file_handle)\n reallen = fread(buf, 1, len, g_wave_file_handle);\n // etime = hal_sys_timer_get();\n if (reallen != len) {\n memset(buf, 0, len);\n status = -1;\n if (wav_file_playback_callback)\n wav_file_playback_callback(status);\n return (len);\n }\n\n // TRACE(5,\"wav_file_audio_more_data irqDur:%d fsSpend:%d, readbuff:0x%08x\n // %d/%d\\n \", TICKS_TO_MS(stime - g_preIrqTime),TICKS_TO_MS(etime -\n // stime),buf,reallen,len);\n // g_preIrqTime = stime;\n\n /* walk index */\n g_curr_play_index += reallen;\n\n return reallen;\n}\n\nuint32_t get_wav_data(wave_file_t *waveFile) {\n uint8_t *dataTemp = (uint8_t *)waveFile->data;\n\n // check for RIFF\n memcpy(waveFile->header.riff, dataTemp, 4);\n dataTemp += 4;\n if (memcmp((uint8_t *)waveFile->header.riff, \"RIFF\", 4)) {\n return 0;\n }\n\n // Get size\n memcpy(&waveFile->header.size, dataTemp, 4);\n dataTemp += 4;\n\n TRACE(1, \"WAV header size [%d]\\n\", waveFile->header.size);\n\n // .wav file flag\n memcpy(waveFile->header.waveFlag, dataTemp, 4);\n dataTemp += 4;\n if (memcmp((uint8_t *)waveFile->header.waveFlag, \"WAVE\", 4)) {\n return 0;\n }\n\n // fmt\n memcpy(waveFile->header.fmt, dataTemp, 4);\n dataTemp += 4;\n if (memcmp((uint8_t *)waveFile->header.fmt, \"fmt \", 4)) {\n return 0;\n }\n\n // fmt length\n memcpy(&waveFile->header.fmtLen, dataTemp, 4);\n dataTemp += 4;\n\n // Tag: PCM or not\n memcpy(&waveFile->header.tag, dataTemp, 4);\n dataTemp += 2;\n\n // Channels\n memcpy(&waveFile->header.channels, dataTemp, 4);\n dataTemp += 2;\n\n TRACE(1, \"WAV channels [%d]\\n\", waveFile->header.channels);\n\n // Sample Rate in Hz\n memcpy(&waveFile->header.sampFreq, dataTemp, 4);\n dataTemp += 4;\n memcpy(&waveFile->header.byteRate, dataTemp, 4);\n dataTemp += 4;\n\n TRACE(1, \"WAV sample_rate [%d]\\n\", waveFile->header.sampFreq);\n TRACE(1, \"WAV byteRate [%d]\\n\", waveFile->header.byteRate);\n\n // quantize bytes for per samp point\n memcpy(&waveFile->header.blockAlign, dataTemp, 4);\n dataTemp += 2;\n memcpy(&waveFile->header.bitSamp, dataTemp, 4);\n dataTemp += 2;\n\n TRACE(1, \"WAV bitSamp [%d]\\n\", waveFile->header.bitSamp);\n\n // Data\n memcpy(waveFile->header.dataFlag, dataTemp, 4);\n dataTemp += 4;\n if (memcmp((uint8_t *)waveFile->header.dataFlag, \"data \", 4)) {\n return 0;\n }\n memcpy(&waveFile->header.length, dataTemp, 4);\n dataTemp += 4;\n\n return 0;\n}\n\nvoid audio_wav_init(wave_file_t *newWav) {\n get_wav_data(newWav);\n\n // Configure the play audio g_format\n // g_format.bits = newWav->header.bitSamp;\n // g_format.sample_rate = newWav->header.sampFreq;\n // g_format.mclk = 256 * g_format.sample_rate ;\n // g_format.mono_streo = (sai_mono_streo_t)((newWav->header.channels) - 1);\n}\n\nuint32_t play_wav_file(char *file_path) {\n uint32_t bytesToRead = 0;\n\n wave_file_t *newWav = &g_wave_file_info;\n\n memset(&g_wave_file_info, 0, sizeof(g_wave_file_info));\n\n g_wave_file_handle = fopen(file_path, \"rb\");\n\n if (g_wave_file_handle == NULL) {\n TRACE(1, \"WAV file %s open fail\\n\", file_path);\n return 1;\n }\n\n fread(&g_wav_header, WAVE_FILE_HEADER_SIZE, 1, g_wave_file_handle);\n\n newWav->data = (uint32_t *)&g_wav_header;\n\n audio_wav_init(newWav);\n\n // Remove header size from byte count\n // Adjust note duration by divider value, wav tables in pcm_data.h are 200ms\n // by default\n bytesToRead = (newWav->header.length - WAVE_FILE_HEADER_SIZE);\n\n g_curr_play_index = 0;\n g_total_play_count = bytesToRead;\n\n return newWav->header.sampFreq;\n}\n\nuint32_t stop_wav_file(void) {\n memset(&g_wave_file_info, 0, sizeof(g_wave_file_info));\n g_curr_play_index = 0;\n g_total_play_count = 0;\n if (g_wave_file_handle) {\n fclose(g_wave_file_handle);\n g_wave_file_handle = NULL;\n }\n if (wav_file_playback_callback)\n wav_file_playback_callback = NULL;\n\n return 0;\n}\n" }, { "path": "apps/battery/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nsubdir-ccflags-y += -Iplatform/drivers/ana \\\n $(BT_IF_INCLUDES) \\\n -Iservices/ble_app/app_main \\\n -Iservices/app_ibrt/inc \\\n -Iservices/ibrt_ui/inc \\\n -Iservices/ibrt_core/inc\n\nifeq ($(VOICE_PROMPT),1)\nCFLAGS_app_battery.o += -DMEDIA_PLAYER_SUPPORT\nendif\n\n" }, { "path": "apps/battery/app_battery.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_battery.h\"\n#include \"app_status_ind.h\"\n#include \"app_thread.h\"\n#include \"apps.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_gpadc.h\"\n#include \"hal_gpio.h\"\n#include \"hal_iomux.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"tgt_hardware.h\"\n#ifdef BT_USB_AUDIO_DUAL_MODE\n#include \"btusb_audio.h\"\n#endif\n#include \n\n#ifdef __INTERCONNECTION__\n#include \"app_ble_mode_switch.h\"\n#endif\n\n#if (defined(BTUSB_AUDIO_MODE) || defined(BTUSB_AUDIO_MODE))\nextern \"C\" bool app_usbaudio_mode_on(void);\n#endif\n\n#define APP_BATTERY_TRACE(s, ...)\n// TRACE(s, ##__VA_ARGS__)\n\n#ifndef APP_BATTERY_MIN_MV\n#define APP_BATTERY_MIN_MV (3200)\n#endif\n\n#ifndef APP_BATTERY_MAX_MV\n#define APP_BATTERY_MAX_MV (4200)\n#endif\n\n#ifndef APP_BATTERY_PD_MV\n#define APP_BATTERY_PD_MV (3100)\n#endif\n\n#ifndef APP_BATTERY_CHARGE_TIMEOUT_MIN\n#define APP_BATTERY_CHARGE_TIMEOUT_MIN (90)\n#endif\n\n#ifndef APP_BATTERY_CHARGE_OFFSET_MV\n#define APP_BATTERY_CHARGE_OFFSET_MV (20)\n#endif\n\n#ifndef CHARGER_PLUGINOUT_RESET\n#define CHARGER_PLUGINOUT_RESET (0)\n#endif\n\n#ifndef CHARGER_PLUGINOUT_DEBOUNCE_MS\n#define CHARGER_PLUGINOUT_DEBOUNCE_MS (50)\n#endif\n\n#ifndef CHARGER_PLUGINOUT_DEBOUNCE_CNT\n#define CHARGER_PLUGINOUT_DEBOUNCE_CNT (3)\n#endif\n\n#define APP_BATTERY_CHARGING_PLUGOUT_DEDOUNCE_CNT \\\n (APP_BATTERY_CHARGING_PERIODIC_MS < 500 ? 3 : 1)\n\n#define APP_BATTERY_CHARGING_EXTPIN_MEASURE_CNT \\\n (APP_BATTERY_CHARGING_PERIODIC_MS < 2 * 1000 \\\n ? 2 * 1000 / APP_BATTERY_CHARGING_PERIODIC_MS \\\n : 1)\n#define APP_BATTERY_CHARGING_EXTPIN_DEDOUNCE_CNT (6)\n\n#define APP_BATTERY_CHARGING_OVERVOLT_MEASURE_CNT \\\n (APP_BATTERY_CHARGING_PERIODIC_MS < 2 * 1000 \\\n ? 2 * 1000 / APP_BATTERY_CHARGING_PERIODIC_MS \\\n : 1)\n#define APP_BATTERY_CHARGING_OVERVOLT_DEDOUNCE_CNT (3)\n\n#define APP_BATTERY_CHARGING_SLOPE_MEASURE_CNT \\\n (APP_BATTERY_CHARGING_PERIODIC_MS < 20 * 1000 \\\n ? 20 * 1000 / APP_BATTERY_CHARGING_PERIODIC_MS \\\n : 1)\n#define APP_BATTERY_CHARGING_SLOPE_TABLE_COUNT (6)\n\n#define APP_BATTERY_REPORT_INTERVAL (5)\n\n#define APP_BATTERY_MV_BASE \\\n ((APP_BATTERY_MAX_MV - APP_BATTERY_PD_MV) / (APP_BATTERY_LEVEL_NUM))\n\n#define APP_BATTERY_STABLE_COUNT (5)\n#define APP_BATTERY_MEASURE_PERIODIC_FAST_MS (200)\n#ifdef BLE_ONLY_ENABLED\n#define APP_BATTERY_MEASURE_PERIODIC_NORMAL_MS (25000)\n#else\n#define APP_BATTERY_MEASURE_PERIODIC_NORMAL_MS (10000)\n#endif\n#define APP_BATTERY_CHARGING_PERIODIC_MS \\\n (APP_BATTERY_MEASURE_PERIODIC_NORMAL_MS)\n\n#define APP_BATTERY_SET_MESSAGE(appevt, status, volt) \\\n (appevt = (((uint32_t)status & 0xffff) << 16) | (volt & 0xffff))\n#define APP_BATTERY_GET_STATUS(appevt, status) \\\n (status = (appevt >> 16) & 0xffff)\n#define APP_BATTERY_GET_VOLT(appevt, volt) (volt = appevt & 0xffff)\n#define APP_BATTERY_GET_PRAMS(appevt, prams) ((prams) = appevt & 0xffff)\n\nenum APP_BATTERY_MEASURE_PERIODIC_T {\n APP_BATTERY_MEASURE_PERIODIC_FAST = 0,\n APP_BATTERY_MEASURE_PERIODIC_NORMAL,\n APP_BATTERY_MEASURE_PERIODIC_CHARGING,\n\n APP_BATTERY_MEASURE_PERIODIC_QTY,\n};\n\nstruct APP_BATTERY_MEASURE_CHARGER_STATUS_T {\n HAL_GPADC_MV_T prevolt;\n int32_t slope_1000[APP_BATTERY_CHARGING_SLOPE_TABLE_COUNT];\n int slope_1000_index;\n int cnt;\n};\n\ntypedef void (*APP_BATTERY_EVENT_CB_T)(enum APP_BATTERY_STATUS_T,\n APP_BATTERY_MV_T volt);\n\nstruct APP_BATTERY_MEASURE_T {\n uint32_t start_time;\n enum APP_BATTERY_STATUS_T status;\n#ifdef __INTERCONNECTION__\n uint8_t currentBatteryInfo;\n uint8_t lastBatteryInfo;\n uint8_t isMobileSupportSelfDefinedCommand;\n#else\n uint8_t currlevel;\n#endif\n APP_BATTERY_MV_T currvolt;\n APP_BATTERY_MV_T lowvolt;\n APP_BATTERY_MV_T highvolt;\n APP_BATTERY_MV_T pdvolt;\n uint32_t chargetimeout;\n enum APP_BATTERY_MEASURE_PERIODIC_T periodic;\n HAL_GPADC_MV_T voltage[APP_BATTERY_STABLE_COUNT];\n uint16_t index;\n struct APP_BATTERY_MEASURE_CHARGER_STATUS_T charger_status;\n APP_BATTERY_EVENT_CB_T cb;\n APP_BATTERY_CB_T user_cb;\n};\n\nstatic enum APP_BATTERY_CHARGER_T app_battery_charger_forcegetstatus(void);\n\nstatic void app_battery_pluginout_debounce_start(void);\nstatic void app_battery_pluginout_debounce_handler(void const *param);\nosTimerDef(APP_BATTERY_PLUGINOUT_DEBOUNCE,\n app_battery_pluginout_debounce_handler);\nstatic osTimerId app_battery_pluginout_debounce_timer = NULL;\nstatic uint32_t app_battery_pluginout_debounce_ctx = 0;\nstatic uint32_t app_battery_pluginout_debounce_cnt = 0;\n\nstatic void app_battery_timer_handler(void const *param);\nosTimerDef(APP_BATTERY, app_battery_timer_handler);\nstatic osTimerId app_battery_timer = NULL;\nstatic struct APP_BATTERY_MEASURE_T app_battery_measure;\n\nstatic int app_battery_charger_handle_process(void);\n\n#ifdef __INTERCONNECTION__\nuint8_t *app_battery_get_mobile_support_self_defined_command_p(void) {\n return &app_battery_measure.isMobileSupportSelfDefinedCommand;\n}\n#endif\n\nvoid app_battery_irqhandler(uint16_t irq_val, HAL_GPADC_MV_T volt) {\n uint8_t i;\n uint32_t meanBattVolt = 0;\n HAL_GPADC_MV_T vbat = volt;\n APP_BATTERY_TRACE(2, \"%s %d\", __func__, vbat);\n if (vbat == HAL_GPADC_BAD_VALUE) {\n app_battery_measure.cb(APP_BATTERY_STATUS_INVALID, vbat);\n return;\n }\n\n#if (defined(BTUSB_AUDIO_MODE) || defined(BTUSB_AUDIO_MODE))\n if (app_usbaudio_mode_on())\n return;\n#endif\n app_battery_measure\n .voltage[app_battery_measure.index++ % APP_BATTERY_STABLE_COUNT] = vbat\n << 2;\n\n if (app_battery_measure.index > APP_BATTERY_STABLE_COUNT) {\n for (i = 0; i < APP_BATTERY_STABLE_COUNT; i++) {\n meanBattVolt += app_battery_measure.voltage[i];\n }\n meanBattVolt /= APP_BATTERY_STABLE_COUNT;\n if (app_battery_measure.cb) {\n if (meanBattVolt > app_battery_measure.highvolt) {\n app_battery_measure.cb(APP_BATTERY_STATUS_OVERVOLT, meanBattVolt);\n } else if ((meanBattVolt > app_battery_measure.pdvolt) &&\n (meanBattVolt < app_battery_measure.lowvolt)) {\n app_battery_measure.cb(APP_BATTERY_STATUS_UNDERVOLT, meanBattVolt);\n } else if (meanBattVolt < app_battery_measure.pdvolt) {\n app_battery_measure.cb(APP_BATTERY_STATUS_PDVOLT, meanBattVolt);\n } else {\n app_battery_measure.cb(APP_BATTERY_STATUS_NORMAL, meanBattVolt);\n }\n }\n } else {\n int8_t level = 0;\n meanBattVolt = vbat << 2;\n level = (meanBattVolt - APP_BATTERY_PD_MV) / APP_BATTERY_MV_BASE;\n\n if (level < APP_BATTERY_LEVEL_MIN)\n level = APP_BATTERY_LEVEL_MIN;\n if (level > APP_BATTERY_LEVEL_MAX)\n level = APP_BATTERY_LEVEL_MAX;\n\n app_battery_measure.currvolt = meanBattVolt;\n#ifdef __INTERCONNECTION__\n APP_BATTERY_INFO_T *pBatteryInfo =\n (APP_BATTERY_INFO_T *)&app_battery_measure.currentBatteryInfo;\n pBatteryInfo->batteryLevel = level;\n#else\n app_battery_measure.currlevel = level;\n#endif\n }\n}\n\nstatic void\napp_battery_timer_start(enum APP_BATTERY_MEASURE_PERIODIC_T periodic) {\n uint32_t periodic_millisec = 0;\n\n if (app_battery_measure.periodic != periodic) {\n app_battery_measure.periodic = periodic;\n switch (periodic) {\n case APP_BATTERY_MEASURE_PERIODIC_FAST:\n periodic_millisec = APP_BATTERY_MEASURE_PERIODIC_FAST_MS;\n break;\n case APP_BATTERY_MEASURE_PERIODIC_CHARGING:\n periodic_millisec = APP_BATTERY_CHARGING_PERIODIC_MS;\n break;\n case APP_BATTERY_MEASURE_PERIODIC_NORMAL:\n periodic_millisec = APP_BATTERY_MEASURE_PERIODIC_NORMAL_MS;\n default:\n break;\n }\n osTimerStop(app_battery_timer);\n osTimerStart(app_battery_timer, periodic_millisec);\n }\n}\n\nstatic void app_battery_timer_handler(void const *param) {\n hal_gpadc_open(HAL_GPADC_CHAN_BATTERY, HAL_GPADC_ATP_ONESHOT,\n app_battery_irqhandler);\n}\n\nstatic void app_battery_event_process(enum APP_BATTERY_STATUS_T status,\n APP_BATTERY_MV_T volt) {\n uint32_t app_battevt;\n APP_MESSAGE_BLOCK msg;\n\n APP_BATTERY_TRACE(3, \"%s %d,%d\", __func__, status, volt);\n msg.mod_id = APP_MODUAL_BATTERY;\n APP_BATTERY_SET_MESSAGE(app_battevt, status, volt);\n msg.msg_body.message_id = app_battevt;\n msg.msg_body.message_ptr = (uint32_t)NULL;\n app_mailbox_put(&msg);\n}\n\nint app_battery_handle_process_normal(uint32_t status,\n union APP_BATTERY_MSG_PRAMS prams) {\n int8_t level = 0;\n\n switch (status) {\n case APP_BATTERY_STATUS_UNDERVOLT:\n TRACE(1, \"UNDERVOLT:%d\", prams.volt);\n app_status_indication_set(APP_STATUS_INDICATION_CHARGENEED);\n#ifdef MEDIA_PLAYER_SUPPORT\n#if defined(IBRT)\n\n#else\n app_voice_report(APP_STATUS_INDICATION_CHARGENEED, 0);\n#endif\n#endif\n case APP_BATTERY_STATUS_NORMAL:\n case APP_BATTERY_STATUS_OVERVOLT:\n app_battery_measure.currvolt = prams.volt;\n level = (prams.volt - APP_BATTERY_PD_MV) / APP_BATTERY_MV_BASE;\n\n if (level < APP_BATTERY_LEVEL_MIN)\n level = APP_BATTERY_LEVEL_MIN;\n if (level > APP_BATTERY_LEVEL_MAX)\n level = APP_BATTERY_LEVEL_MAX;\n#ifdef __INTERCONNECTION__\n APP_BATTERY_INFO_T *pBatteryInfo;\n pBatteryInfo =\n (APP_BATTERY_INFO_T *)&app_battery_measure.currentBatteryInfo;\n pBatteryInfo->batteryLevel = level;\n if (level == APP_BATTERY_LEVEL_MAX) {\n level = 9;\n } else {\n level /= 10;\n }\n#else\n app_battery_measure.currlevel = level;\n#endif\n app_status_battery_report(level);\n break;\n case APP_BATTERY_STATUS_PDVOLT:\n#ifndef BT_USB_AUDIO_DUAL_MODE\n TRACE(1, \"PDVOLT-->POWEROFF:%d\", prams.volt);\n osTimerStop(app_battery_timer);\n app_shutdown();\n#endif\n break;\n case APP_BATTERY_STATUS_CHARGING:\n TRACE(1, \"CHARGING-->APP_BATTERY_CHARGER :%d\", prams.charger);\n if (prams.charger == APP_BATTERY_CHARGER_PLUGIN) {\n#ifdef BT_USB_AUDIO_DUAL_MODE\n TRACE(1, \"%s:PLUGIN.\", __func__);\n btusb_switch(BTUSB_MODE_USB);\n#else\n#if CHARGER_PLUGINOUT_RESET\n app_reset();\n#else\n app_battery_measure.status = APP_BATTERY_STATUS_CHARGING;\n#endif\n#endif\n } else {\n app_reset();\n }\n break;\n case APP_BATTERY_STATUS_INVALID:\n default:\n break;\n }\n\n app_battery_timer_start(APP_BATTERY_MEASURE_PERIODIC_NORMAL);\n return 0;\n}\n\nint app_battery_handle_process_charging(uint32_t status,\n union APP_BATTERY_MSG_PRAMS prams) {\n switch (status) {\n case APP_BATTERY_STATUS_OVERVOLT:\n case APP_BATTERY_STATUS_NORMAL:\n case APP_BATTERY_STATUS_UNDERVOLT:\n app_battery_measure.currvolt = prams.volt;\n app_status_battery_report(prams.volt);\n break;\n case APP_BATTERY_STATUS_CHARGING:\n TRACE(1, \"CHARGING:%d\", prams.charger);\n if (prams.charger == APP_BATTERY_CHARGER_PLUGOUT) {\n#ifdef BT_USB_AUDIO_DUAL_MODE\n TRACE(1, \"%s:PlUGOUT.\", __func__);\n btusb_switch(BTUSB_MODE_BT);\n#else\n#if CHARGER_PLUGINOUT_RESET\n TRACE(0, \"CHARGING-->RESET\");\n app_reset();\n#else\n app_battery_measure.status = APP_BATTERY_STATUS_NORMAL;\n#endif\n#endif\n } else if (prams.charger == APP_BATTERY_CHARGER_PLUGIN) {\n#ifdef BT_USB_AUDIO_DUAL_MODE\n TRACE(1, \"%s:PLUGIN.\", __func__);\n btusb_switch(BTUSB_MODE_USB);\n#endif\n }\n break;\n case APP_BATTERY_STATUS_INVALID:\n default:\n break;\n }\n\n if (app_battery_charger_handle_process() <= 0) {\n if (app_status_indication_get() != APP_STATUS_INDICATION_FULLCHARGE) {\n TRACE(1, \"FULL_CHARGING:%d\", app_battery_measure.currvolt);\n app_status_indication_set(APP_STATUS_INDICATION_FULLCHARGE);\n app_shutdown();\n#ifdef MEDIA_PLAYER_SUPPORT\n#if defined(BT_USB_AUDIO_DUAL_MODE) || defined(IBRT)\n#else\n app_voice_report(APP_STATUS_INDICATION_FULLCHARGE, 0);\n#endif\n#endif\n }\n }\n\n app_battery_timer_start(APP_BATTERY_MEASURE_PERIODIC_CHARGING);\n\n return 0;\n}\n\nstatic int app_battery_handle_process(APP_MESSAGE_BODY *msg_body) {\n uint8_t status;\n union APP_BATTERY_MSG_PRAMS msg_prams;\n\n APP_BATTERY_GET_STATUS(msg_body->message_id, status);\n APP_BATTERY_GET_PRAMS(msg_body->message_id, msg_prams.prams);\n\n uint32_t generatedSeed = hal_sys_timer_get();\n for (uint8_t index = 0; index < sizeof(bt_addr); index++) {\n generatedSeed ^=\n (((uint32_t)(bt_addr[index])) << (hal_sys_timer_get() & 0xF));\n }\n srand(generatedSeed);\n\n if (status == APP_BATTERY_STATUS_PLUGINOUT) {\n app_battery_pluginout_debounce_start();\n } else {\n switch (app_battery_measure.status) {\n case APP_BATTERY_STATUS_NORMAL:\n app_battery_handle_process_normal((uint32_t)status, msg_prams);\n break;\n\n case APP_BATTERY_STATUS_CHARGING:\n app_battery_handle_process_charging((uint32_t)status, msg_prams);\n break;\n\n default:\n break;\n }\n }\n if (NULL != app_battery_measure.user_cb) {\n uint8_t batteryLevel;\n#ifdef __INTERCONNECTION__\n APP_BATTERY_INFO_T *pBatteryInfo;\n pBatteryInfo =\n (APP_BATTERY_INFO_T *)&app_battery_measure.currentBatteryInfo;\n pBatteryInfo->chargingStatus =\n ((app_battery_measure.status == APP_BATTERY_STATUS_CHARGING) ? 1 : 0);\n batteryLevel = pBatteryInfo->batteryLevel;\n\n#else\n batteryLevel = app_battery_measure.currlevel;\n#endif\n app_battery_measure.user_cb(app_battery_measure.currvolt, batteryLevel,\n app_battery_measure.status, status, msg_prams);\n }\n\n return 0;\n}\n\nint app_battery_register(APP_BATTERY_CB_T user_cb) {\n if (NULL == app_battery_measure.user_cb) {\n app_battery_measure.user_cb = user_cb;\n return 0;\n }\n return 1;\n}\n\nint app_battery_get_info(APP_BATTERY_MV_T *currvolt, uint8_t *currlevel,\n enum APP_BATTERY_STATUS_T *status) {\n if (currvolt) {\n *currvolt = app_battery_measure.currvolt;\n }\n\n if (currlevel) {\n#ifdef __INTERCONNECTION__\n *currlevel = app_battery_measure.currentBatteryInfo;\n#else\n *currlevel = app_battery_measure.currlevel;\n#endif\n }\n\n if (status) {\n *status = app_battery_measure.status;\n }\n\n return 0;\n}\n\nint app_battery_open(void) {\n APP_BATTERY_TRACE(3, \"%s batt range:%d~%d\", __func__, APP_BATTERY_MIN_MV,\n APP_BATTERY_MAX_MV);\n int nRet = APP_BATTERY_OPEN_MODE_INVALID;\n\n if (app_battery_timer == NULL)\n app_battery_timer =\n osTimerCreate(osTimer(APP_BATTERY), osTimerPeriodic, NULL);\n\n if (app_battery_pluginout_debounce_timer == NULL)\n app_battery_pluginout_debounce_timer =\n osTimerCreate(osTimer(APP_BATTERY_PLUGINOUT_DEBOUNCE), osTimerOnce,\n &app_battery_pluginout_debounce_ctx);\n\n app_battery_measure.status = APP_BATTERY_STATUS_NORMAL;\n#ifdef __INTERCONNECTION__\n app_battery_measure.currentBatteryInfo = APP_BATTERY_DEFAULT_INFO;\n app_battery_measure.lastBatteryInfo = APP_BATTERY_DEFAULT_INFO;\n app_battery_measure.isMobileSupportSelfDefinedCommand = 0;\n#else\n app_battery_measure.currlevel = APP_BATTERY_LEVEL_MAX;\n#endif\n app_battery_measure.currvolt = APP_BATTERY_MAX_MV;\n app_battery_measure.lowvolt = APP_BATTERY_MIN_MV;\n app_battery_measure.highvolt = APP_BATTERY_MAX_MV;\n app_battery_measure.pdvolt = APP_BATTERY_PD_MV;\n app_battery_measure.chargetimeout = APP_BATTERY_CHARGE_TIMEOUT_MIN;\n\n app_battery_measure.periodic = APP_BATTERY_MEASURE_PERIODIC_QTY;\n app_battery_measure.cb = app_battery_event_process;\n app_battery_measure.user_cb = NULL;\n\n app_battery_measure.charger_status.prevolt = 0;\n app_battery_measure.charger_status.slope_1000_index = 0;\n app_battery_measure.charger_status.cnt = 0;\n\n app_set_threadhandle(APP_MODUAL_BATTERY, app_battery_handle_process);\n\n if (app_battery_ext_charger_detecter_cfg.pin != HAL_IOMUX_PIN_NUM) {\n hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP\n *)&app_battery_ext_charger_detecter_cfg,\n 1);\n hal_gpio_pin_set_dir(\n (enum HAL_GPIO_PIN_T)app_battery_ext_charger_detecter_cfg.pin,\n HAL_GPIO_DIR_IN, 1);\n }\n\n if (app_battery_ext_charger_enable_cfg.pin != HAL_IOMUX_PIN_NUM) {\n hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP\n *)&app_battery_ext_charger_detecter_cfg,\n 1);\n hal_gpio_pin_set_dir(\n (enum HAL_GPIO_PIN_T)app_battery_ext_charger_detecter_cfg.pin,\n HAL_GPIO_DIR_OUT, 1);\n }\n\n if (app_battery_charger_indication_open() == APP_BATTERY_CHARGER_PLUGIN) {\n app_battery_measure.status = APP_BATTERY_STATUS_CHARGING;\n app_battery_measure.start_time = hal_sys_timer_get();\n // pmu_charger_plugin_config();\n if (app_battery_ext_charger_enable_cfg.pin != HAL_IOMUX_PIN_NUM) {\n hal_gpio_pin_set_dir(\n (enum HAL_GPIO_PIN_T)app_battery_ext_charger_detecter_cfg.pin,\n HAL_GPIO_DIR_OUT, 0);\n }\n\n#if (CHARGER_PLUGINOUT_RESET == 0)\n nRet = APP_BATTERY_OPEN_MODE_CHARGING_PWRON;\n#else\n nRet = APP_BATTERY_OPEN_MODE_CHARGING;\n#endif\n } else {\n app_battery_measure.status = APP_BATTERY_STATUS_NORMAL;\n // pmu_charger_plugout_config();\n nRet = APP_BATTERY_OPEN_MODE_NORMAL;\n }\n return nRet;\n}\n\nint app_battery_start(void) {\n APP_BATTERY_TRACE(2, \"%s %d\", __func__, APP_BATTERY_MEASURE_PERIODIC_FAST_MS);\n\n app_battery_timer_start(APP_BATTERY_MEASURE_PERIODIC_FAST);\n\n return 0;\n}\n\nint app_battery_stop(void) {\n osTimerStop(app_battery_timer);\n\n return 0;\n}\n\nint app_battery_close(void) {\n hal_gpadc_close(HAL_GPADC_CHAN_BATTERY);\n\n return 0;\n}\n\nstatic int32_t app_battery_charger_slope_calc(int32_t t1, int32_t v1,\n int32_t t2, int32_t v2) {\n int32_t slope_1000;\n slope_1000 = (v2 - v1) * 1000 / (t2 - t1);\n return slope_1000;\n}\n\nstatic int app_battery_charger_handle_process(void) {\n int nRet = 1;\n int8_t i = 0, cnt = 0;\n uint32_t slope_1000 = 0;\n uint32_t charging_min;\n static uint8_t overvolt_full_charge_cnt = 0;\n static uint8_t ext_pin_full_charge_cnt = 0;\n\n charging_min = hal_sys_timer_get() - app_battery_measure.start_time;\n charging_min = TICKS_TO_MS(charging_min) / 1000 / 60;\n if (charging_min >= app_battery_measure.chargetimeout) {\n // TRACE(0,\"TIMEROUT-->FULL_CHARGING\");\n nRet = -1;\n goto exit;\n }\n\n if ((app_battery_measure.charger_status.cnt++ %\n APP_BATTERY_CHARGING_OVERVOLT_MEASURE_CNT) == 0) {\n if (app_battery_measure.currvolt >=\n (app_battery_measure.highvolt + APP_BATTERY_CHARGE_OFFSET_MV)) {\n overvolt_full_charge_cnt++;\n } else {\n overvolt_full_charge_cnt = 0;\n }\n if (overvolt_full_charge_cnt >=\n APP_BATTERY_CHARGING_OVERVOLT_DEDOUNCE_CNT) {\n // TRACE(0,\"OVERVOLT-->FULL_CHARGING\");\n nRet = -1;\n goto exit;\n }\n }\n\n if ((app_battery_measure.charger_status.cnt++ %\n APP_BATTERY_CHARGING_EXTPIN_MEASURE_CNT) == 0) {\n if (app_battery_ext_charger_detecter_cfg.pin != HAL_IOMUX_PIN_NUM) {\n if (hal_gpio_pin_get_val(\n (enum HAL_GPIO_PIN_T)app_battery_ext_charger_detecter_cfg.pin)) {\n ext_pin_full_charge_cnt++;\n } else {\n ext_pin_full_charge_cnt = 0;\n }\n if (ext_pin_full_charge_cnt >= APP_BATTERY_CHARGING_EXTPIN_DEDOUNCE_CNT) {\n TRACE(0, \"EXT PIN-->FULL_CHARGING\");\n nRet = -1;\n goto exit;\n }\n }\n }\n\n if ((app_battery_measure.charger_status.cnt++ %\n APP_BATTERY_CHARGING_SLOPE_MEASURE_CNT) == 0) {\n if (!app_battery_measure.charger_status.prevolt) {\n app_battery_measure.charger_status\n .slope_1000[app_battery_measure.charger_status.slope_1000_index %\n APP_BATTERY_CHARGING_SLOPE_TABLE_COUNT] = slope_1000;\n app_battery_measure.charger_status.prevolt = app_battery_measure.currvolt;\n for (i = 0; i < APP_BATTERY_CHARGING_SLOPE_TABLE_COUNT; i++) {\n app_battery_measure.charger_status.slope_1000[i] = 100;\n }\n } else {\n slope_1000 = app_battery_charger_slope_calc(\n 0, app_battery_measure.charger_status.prevolt,\n APP_BATTERY_CHARGING_PERIODIC_MS *\n APP_BATTERY_CHARGING_SLOPE_MEASURE_CNT / 1000,\n app_battery_measure.currvolt);\n app_battery_measure.charger_status\n .slope_1000[app_battery_measure.charger_status.slope_1000_index %\n APP_BATTERY_CHARGING_SLOPE_TABLE_COUNT] = slope_1000;\n app_battery_measure.charger_status.prevolt = app_battery_measure.currvolt;\n for (i = 0; i < APP_BATTERY_CHARGING_SLOPE_TABLE_COUNT; i++) {\n if (app_battery_measure.charger_status.slope_1000[i] > 0)\n cnt++;\n else\n cnt--;\n TRACE(3, \"slope_1000[%d]=%d cnt:%d\", i,\n app_battery_measure.charger_status.slope_1000[i], cnt);\n }\n TRACE(3, \"app_battery_charger_slope_proc slope*1000=%d cnt:%d nRet:%d\",\n slope_1000, cnt, nRet);\n if (cnt > 1) {\n nRet = 1;\n } /*else (3>=cnt && cnt>=-3){\n nRet = 0;\n }*/\n else {\n if (app_battery_measure.currvolt >=\n (app_battery_measure.highvolt - APP_BATTERY_CHARGE_OFFSET_MV)) {\n TRACE(0, \"SLOPE-->FULL_CHARGING\");\n nRet = -1;\n }\n }\n }\n app_battery_measure.charger_status.slope_1000_index++;\n }\nexit:\n return nRet;\n}\n\nstatic enum APP_BATTERY_CHARGER_T app_battery_charger_forcegetstatus(void) {\n enum APP_BATTERY_CHARGER_T status = APP_BATTERY_CHARGER_QTY;\n enum PMU_CHARGER_STATUS_T charger;\n\n charger = pmu_charger_get_status();\n\n if (charger == PMU_CHARGER_PLUGIN) {\n status = APP_BATTERY_CHARGER_PLUGIN;\n // TRACE(0,\"force APP_BATTERY_CHARGER_PLUGIN\");\n } else {\n status = APP_BATTERY_CHARGER_PLUGOUT;\n // TRACE(0,\"force APP_BATTERY_CHARGER_PLUGOUT\");\n }\n\n return status;\n}\n\nstatic void app_battery_charger_handler(enum PMU_CHARGER_STATUS_T status) {\n TRACE(2, \"%s: status=%d\", __func__, status);\n pmu_charger_set_irq_handler(NULL);\n app_battery_event_process(APP_BATTERY_STATUS_PLUGINOUT,\n (status == PMU_CHARGER_PLUGIN)\n ? APP_BATTERY_CHARGER_PLUGIN\n : APP_BATTERY_CHARGER_PLUGOUT);\n}\n\nstatic void app_battery_pluginout_debounce_start(void) {\n TRACE(1, \"%s\", __func__);\n app_battery_pluginout_debounce_ctx =\n (uint32_t)app_battery_charger_forcegetstatus();\n app_battery_pluginout_debounce_cnt = 1;\n osTimerStart(app_battery_pluginout_debounce_timer,\n CHARGER_PLUGINOUT_DEBOUNCE_MS);\n}\n\nstatic void app_battery_pluginout_debounce_handler(void const *param) {\n enum APP_BATTERY_CHARGER_T status_charger =\n app_battery_charger_forcegetstatus();\n\n if (app_battery_pluginout_debounce_ctx == (uint32_t)status_charger) {\n app_battery_pluginout_debounce_cnt++;\n } else {\n TRACE(2, \"%s dithering cnt %u\", __func__,\n app_battery_pluginout_debounce_cnt);\n app_battery_pluginout_debounce_cnt = 0;\n app_battery_pluginout_debounce_ctx = (uint32_t)status_charger;\n }\n\n if (app_battery_pluginout_debounce_cnt >= CHARGER_PLUGINOUT_DEBOUNCE_CNT) {\n TRACE(2, \"%s %s\", __func__,\n status_charger == APP_BATTERY_CHARGER_PLUGOUT ? \"PLUGOUT\" : \"PLUGIN\");\n if (status_charger == APP_BATTERY_CHARGER_PLUGIN) {\n if (app_battery_ext_charger_enable_cfg.pin != HAL_IOMUX_PIN_NUM) {\n hal_gpio_pin_set_dir(\n (enum HAL_GPIO_PIN_T)app_battery_ext_charger_detecter_cfg.pin,\n HAL_GPIO_DIR_OUT, 0);\n }\n app_battery_measure.start_time = hal_sys_timer_get();\n } else {\n if (app_battery_ext_charger_enable_cfg.pin != HAL_IOMUX_PIN_NUM) {\n hal_gpio_pin_set_dir(\n (enum HAL_GPIO_PIN_T)app_battery_ext_charger_detecter_cfg.pin,\n HAL_GPIO_DIR_OUT, 1);\n }\n }\n app_battery_event_process(APP_BATTERY_STATUS_CHARGING, status_charger);\n pmu_charger_set_irq_handler(app_battery_charger_handler);\n osTimerStop(app_battery_pluginout_debounce_timer);\n } else {\n osTimerStart(app_battery_pluginout_debounce_timer,\n CHARGER_PLUGINOUT_DEBOUNCE_MS);\n }\n}\n\nint app_battery_charger_indication_open(void) {\n enum APP_BATTERY_CHARGER_T status = APP_BATTERY_CHARGER_QTY;\n uint8_t cnt = 0;\n\n APP_BATTERY_TRACE(1, \"%s\", __func__);\n\n pmu_charger_init();\n\n do {\n status = app_battery_charger_forcegetstatus();\n if (status == APP_BATTERY_CHARGER_PLUGIN)\n break;\n osDelay(20);\n } while (cnt++ < 5);\n\n if (app_battery_ext_charger_detecter_cfg.pin != HAL_IOMUX_PIN_NUM) {\n if (!hal_gpio_pin_get_val(\n (enum HAL_GPIO_PIN_T)app_battery_ext_charger_detecter_cfg.pin)) {\n status = APP_BATTERY_CHARGER_PLUGIN;\n }\n }\n\n pmu_charger_set_irq_handler(app_battery_charger_handler);\n\n return status;\n}\n\nint8_t app_battery_current_level(void) {\n#ifdef __INTERCONNECTION__\n return app_battery_measure.currentBatteryInfo & 0x7f;\n#else\n return app_battery_measure.currlevel;\n#endif\n}\n\nint8_t app_battery_is_charging(void) {\n return (APP_BATTERY_STATUS_CHARGING == app_battery_measure.status);\n}\n\ntypedef uint16_t NTP_VOLTAGE_MV_T;\ntypedef uint16_t NTP_TEMPERATURE_C_T;\n\n#define NTC_CAPTURE_STABLE_COUNT (5)\n#define NTC_CAPTURE_TEMPERATURE_STEP (4)\n#define NTC_CAPTURE_TEMPERATURE_REF (15)\n#define NTC_CAPTURE_VOLTAGE_REF (1100)\n\ntypedef void (*NTC_CAPTURE_MEASURE_CB_T)(NTP_TEMPERATURE_C_T);\n\nstruct NTC_CAPTURE_MEASURE_T {\n NTP_TEMPERATURE_C_T temperature;\n NTP_VOLTAGE_MV_T currvolt;\n NTP_VOLTAGE_MV_T voltage[NTC_CAPTURE_STABLE_COUNT];\n uint16_t index;\n NTC_CAPTURE_MEASURE_CB_T cb;\n};\n\nstatic struct NTC_CAPTURE_MEASURE_T ntc_capture_measure;\n\nvoid ntc_capture_irqhandler(uint16_t irq_val, HAL_GPADC_MV_T volt) {\n uint32_t meanVolt = 0;\n TRACE(3, \"%s %d irq:0x%04x\", __func__, volt, irq_val);\n\n if (volt == HAL_GPADC_BAD_VALUE) {\n return;\n }\n\n ntc_capture_measure\n .voltage[ntc_capture_measure.index++ % NTC_CAPTURE_STABLE_COUNT] = volt;\n\n if (ntc_capture_measure.index > NTC_CAPTURE_STABLE_COUNT) {\n for (uint8_t i = 0; i < NTC_CAPTURE_STABLE_COUNT; i++) {\n meanVolt += ntc_capture_measure.voltage[i];\n }\n meanVolt /= NTC_CAPTURE_STABLE_COUNT;\n ntc_capture_measure.currvolt = meanVolt;\n } else if (!ntc_capture_measure.currvolt) {\n ntc_capture_measure.currvolt = volt;\n }\n ntc_capture_measure.temperature =\n ((int32_t)ntc_capture_measure.currvolt - NTC_CAPTURE_VOLTAGE_REF) /\n NTC_CAPTURE_TEMPERATURE_STEP +\n NTC_CAPTURE_TEMPERATURE_REF;\n pmu_ntc_capture_disable();\n TRACE(3, \"%s ad:%d temperature:%d\", __func__, ntc_capture_measure.currvolt,\n ntc_capture_measure.temperature);\n}\n\nint ntc_capture_open(void) {\n\n ntc_capture_measure.currvolt = 0;\n ntc_capture_measure.index = 0;\n ntc_capture_measure.temperature = 0;\n ntc_capture_measure.cb = NULL;\n\n pmu_ntc_capture_enable();\n hal_gpadc_open(HAL_GPADC_CHAN_0, HAL_GPADC_ATP_ONESHOT,\n ntc_capture_irqhandler);\n return 0;\n}\n\nint ntc_capture_start(void) {\n pmu_ntc_capture_enable();\n hal_gpadc_open(HAL_GPADC_CHAN_0, HAL_GPADC_ATP_ONESHOT,\n ntc_capture_irqhandler);\n return 0;\n}\n" }, { "path": "apps/battery/app_battery.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BATTERY_H__\n#define __APP_BATTERY_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \n#include \"plat_types.h\"\n\n#define APP_BATTERY_LEVEL_MIN (0)\n\n#ifdef __INTERCONNECTION__\n#define APP_BATTERY_LEVEL_MAX (100)\n#define APP_BATTERY_DEFAULT_INFO 0xE4\n\ntypedef struct\n{\n uint8_t chargingStatus : 1;\n uint8_t batteryLevel : 7;\n}APP_BATTERY_INFO_T;\n\nuint8_t* app_battery_get_mobile_support_self_defined_command_p(void);\n#else // #ifdef __INTERCONNECTION__\n#define APP_BATTERY_LEVEL_MAX (9)\n#endif // #ifdef __INTERCONNECTION__\n\n#define APP_BATTERY_LEVEL_NUM (APP_BATTERY_LEVEL_MAX-APP_BATTERY_LEVEL_MIN+1)\n\nenum APP_BATTERY_STATUS_T {\n APP_BATTERY_STATUS_NORMAL,\n APP_BATTERY_STATUS_CHARGING,\n APP_BATTERY_STATUS_OVERVOLT,\n APP_BATTERY_STATUS_UNDERVOLT,\n APP_BATTERY_STATUS_PDVOLT,\n APP_BATTERY_STATUS_PLUGINOUT,\n APP_BATTERY_STATUS_INVALID,\n\n APP_BATTERY_STATUS_QTY\n};\n\n#define APP_BATTERY_OPEN_MODE_INVALID (-1)\n#define APP_BATTERY_OPEN_MODE_NORMAL (0)\n#define APP_BATTERY_OPEN_MODE_CHARGING (1)\n#define APP_BATTERY_OPEN_MODE_CHARGING_PWRON (2)\n\ntypedef uint16_t APP_BATTERY_MV_T;\n\nenum APP_BATTERY_CHARGER_T\n{\n APP_BATTERY_CHARGER_PLUGOUT = 0,\n APP_BATTERY_CHARGER_PLUGIN,\n APP_BATTERY_CHARGER_QTY,\n};\n\nunion APP_BATTERY_MSG_PRAMS{\n APP_BATTERY_MV_T volt;\n enum APP_BATTERY_CHARGER_T charger;\n uint32_t prams;\n};\n\ntypedef void (*APP_BATTERY_CB_T)(APP_BATTERY_MV_T currvolt, uint8_t currlevel,enum APP_BATTERY_STATUS_T curstatus,uint32_t status, union APP_BATTERY_MSG_PRAMS prams);\n\n\nint app_battery_get_info(APP_BATTERY_MV_T *currvolt, uint8_t *currlevel, enum APP_BATTERY_STATUS_T *status);\n\n/**\n * Battery App owns its own context where it will periodically update the\n * battery level and state. Makes sense for it to act as a Model and publish\n * battery change events to any interested users.\n *\n * Note: Callback will execute out of BES \"App Thread\" context.\n *\n * TODO: ideally implemented as proper observer pattern with support for multiple\n * listeners\n *\n * Returns\n * - 0: On success\n * - 1: If registration failed\n */\nint app_battery_register(APP_BATTERY_CB_T user_cb);\n\nint app_battery_open(void);\n\nint app_battery_start(void);\n\nint app_battery_stop(void);\n\nint app_battery_close(void);\n\nint app_battery_charger_indication_open(void);\n\nint8_t app_battery_current_level(void);\n\nint8_t app_battery_is_charging(void);\n\nint ntc_capture_open(void);\n\nint ntc_capture_start(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n\n#endif\n" }, { "path": "apps/cmd/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nsubdir-ccflags-y += \\\n\t\t\t\t\t-Iservices/audio_process \\\n\t\t\t\t\t-Iservices/multimedia/audio/process/filters/include\n" }, { "path": "apps/cmd/app_cmd.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef __PC_CMD_UART__\n#include \"app_cmd.h\"\n#include \"app_thread.h\"\n#include \"audio_process.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmd.h\"\n#include \"hal_trace.h\"\n#include \"list.h\"\n#include \"string.h\"\n\n#define APP_CMD_TRACE(s, ...) TRACE(s, ##__VA_ARGS__)\n\nvoid cmd_event_process(hal_cmd_rx_status_t status) {\n APP_CMD_TRACE(1, \"%s\", __func__);\n APP_MESSAGE_BLOCK msg;\n msg.mod_id = APP_MODUAL_CMD;\n msg.msg_body.message_id = status;\n msg.msg_body.message_ptr = (uint32_t)NULL;\n app_mailbox_put(&msg);\n return;\n}\n\nstatic int app_cmd_handle_process(APP_MESSAGE_BODY *msg_body) {\n hal_cmd_run((hal_cmd_rx_status_t)msg_body->message_id);\n return 0;\n}\n\nuint8_t app_cmd_flag = 0;\n\nvoid app_cmd_open(void) {\n APP_CMD_TRACE(1, \"%s\", __func__);\n\n app_cmd_flag = 1;\n\n app_set_threadhandle(APP_MODUAL_CMD, app_cmd_handle_process);\n hal_cmd_set_callback(cmd_event_process);\n hal_cmd_open();\n return;\n}\n\nvoid app_cmd_close(void) {\n APP_CMD_TRACE(1, \"%s\", __func__);\n if (app_cmd_flag) {\n app_cmd_flag = 0;\n hal_cmd_close();\n app_set_threadhandle(APP_MODUAL_CMD, NULL);\n }\n return;\n}\n#endif\n" }, { "path": "apps/cmd/app_cmd.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_CMD_H__\n#define __APP_CMD_H__\n#ifdef __PC_CMD_UART__\n\n#include \"hal_cmd.h\"\ntypedef struct {\n void *param;\n} APP_CMD_HANDLE;\n\nvoid app_cmd_open(void);\n\nvoid app_cmd_close(void);\n#endif\n#endif//__FMDEC_H__\n" }, { "path": "apps/common/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nsubdir-ccflags-y += \\\n -Iplatform/drivers/ana \\\n -Iservices/ibrt_ui/inc \\\n -Iservices/ibrt_core/inc\n\nifeq ($(RAND_FROM_MIC),1)\nsubdir-ccflags-y += \\\n\t-Iservices/bt_app\t\\\n\t-Iservices/app_ai/inc\nendif\n" }, { "path": "apps/common/app_spec_ostimer.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#define __STDC_LIMIT_MACROS\n#include \n\n#include \"cmsis_os.h\"\n#include \"stdint.h\"\n#include \"app_spec_ostimer.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"stdint.h\"\n\n/// Create timer\nosStatus app_spec_timer_create(SPEC_TIMER_CTX_T *spec_timer_ctx,\n const osTimerDef_t *timer_def,\n os_timer_type type, void *argument) {\n spec_timer_ctx->type = type;\n spec_timer_ctx->argument = argument;\n spec_timer_ctx->timerid = osTimerCreate(timer_def, type, spec_timer_ctx);\n return spec_timer_ctx->timerid ? osOK : osErrorOS;\n}\n\n/// Start or restart timer\nosStatus app_spec_timer_start(SPEC_TIMER_CTX_T *spec_timer_ctx,\n uint32_t millisec) {\n osStatus status;\n\n // TRACE(1,\"%s\", __func__);\n if (millisec > UINT16_MAX) {\n spec_timer_ctx->interval = millisec;\n spec_timer_ctx->ctx = millisec;\n status = osTimerStart(spec_timer_ctx->timerid, UINT16_MAX);\n } else {\n spec_timer_ctx->interval = millisec;\n spec_timer_ctx->ctx = millisec;\n status = osTimerStart(spec_timer_ctx->timerid, (uint32_t)millisec);\n }\n\n return status;\n}\n\n/// Stop timer\nosStatus app_spec_timer_stop(SPEC_TIMER_CTX_T *spec_timer_ctx) {\n return osTimerStop(spec_timer_ctx->timerid);\n}\n\n/// Delete timer\nosStatus app_spec_timer_delete(SPEC_TIMER_CTX_T *spec_timer_ctx) {\n return osTimerDelete(spec_timer_ctx->timerid);\n}\n\nvoid app_spec_timer_handler(void const *para) {\n SPEC_TIMER_CTX_T *spec_timer_ctx = (SPEC_TIMER_CTX_T *)para;\n\n if (spec_timer_ctx->ctx > UINT16_MAX) {\n spec_timer_ctx->ctx -= UINT16_MAX;\n if (spec_timer_ctx->ctx > UINT16_MAX) {\n osTimerStart(spec_timer_ctx->timerid, UINT16_MAX);\n } else {\n osTimerStart(spec_timer_ctx->timerid, spec_timer_ctx->ctx);\n }\n } else {\n (*spec_timer_ctx->ptimer)(spec_timer_ctx->argument);\n if (spec_timer_ctx->type == osTimerPeriodic) {\n app_spec_timer_start(spec_timer_ctx, spec_timer_ctx->interval);\n }\n }\n}\n\n#if 0\n//tester\nuint32_t ibrt_test_arg;\nvoid app_tws_ibrt_test_timer_cb(void const *para);\nspecTimerDef (IBRT_TEST_TIMER, app_tws_ibrt_test_timer_cb);\n\nvoid app_tws_ibrt_test_timer_cb(void const *para)\n{\n TRACE(2,\"%s %08x\", __func__, para);\n}\n\nvoid app_tws_ibrt_test_timer(void)\n{\n app_spec_timer_create(specTimerCtx(IBRT_TEST_TIMER), specTimer(IBRT_TEST_TIMER), osTimerOnce, &ibrt_test_arg);\n app_spec_timer_start(specTimerCtx(IBRT_TEST_TIMER), 0x10100);\n}\n#endif\n" }, { "path": "apps/common/app_spec_ostimer.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_SPEC_OSTIMER__\n#define __APP_SPEC_OSTIMER__\n#include \"cmsis_os.h\"\n\ntypedef struct{\n osTimerId timerid;\n os_timer_type type;\n os_ptimer ptimer;\n uint32_t interval;\n uint32_t ctx; \n void *argument;\n}SPEC_TIMER_CTX_T;\n\n#define specTimerDef(name, function) \\\nSPEC_TIMER_CTX_T spec_timer_ctx_##name = \\\n{NULL, osTimerOnce, function, 0, 0, NULL}; \\\nosTimerDef(name, app_spec_timer_handler)\n\n#define specTimer osTimer\n\n#define specTimerCtx(name) \\\n&spec_timer_ctx_##name\n\nvoid app_spec_timer_handler(void const *para);\nosStatus app_spec_timer_create (SPEC_TIMER_CTX_T *spec_timer_ctx, const osTimerDef_t *timer_def, os_timer_type type, void *argument);\nosStatus app_spec_timer_start (SPEC_TIMER_CTX_T *spec_timer_ctx, uint32_t millisec);\nosStatus app_spec_timer_stop (SPEC_TIMER_CTX_T *spec_timer_ctx);\nosStatus app_spec_timer_delete (SPEC_TIMER_CTX_T *spec_timer_ctx);\n\n#endif\n" }, { "path": "apps/common/app_thread.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n\nstatic APP_MOD_HANDLER_T mod_handler[APP_MODUAL_NUM];\n\nstatic void app_thread(void const *argument);\nosThreadDef(app_thread, osPriorityHigh, 1, 1024 * 3, \"app_thread\");\n\nosMailQDef(app_mailbox, APP_MAILBOX_MAX, APP_MESSAGE_BLOCK);\nstatic osMailQId app_mailbox = NULL;\nstatic uint8_t app_mailbox_cnt = 0;\nosThreadId app_thread_tid;\n\nstatic int app_mailbox_init(void) {\n app_mailbox = osMailCreate(osMailQ(app_mailbox), NULL);\n if (app_mailbox == NULL) {\n TRACE(0, \"Failed to Create app_mailbox\\n\");\n return -1;\n }\n app_mailbox_cnt = 0;\n return 0;\n}\n\nint app_mailbox_put(APP_MESSAGE_BLOCK *msg_src) {\n osStatus status;\n\n APP_MESSAGE_BLOCK *msg_p = NULL;\n\n msg_p = (APP_MESSAGE_BLOCK *)osMailAlloc(app_mailbox, 0);\n\n if (!msg_p) {\n osEvent evt;\n TRACE_IMM(0, \"osMailAlloc error dump\");\n for (uint8_t i = 0; i < APP_MAILBOX_MAX; i++) {\n evt = osMailGet(app_mailbox, 0);\n if (evt.status == osEventMail) {\n TRACE_IMM(\n 9,\n \"cnt:%d mod:%d src:%08x tim:%d id:%x ptr:%08x para:%08x/%08x/%08x\",\n i, ((APP_MESSAGE_BLOCK *)(evt.value.p))->mod_id,\n ((APP_MESSAGE_BLOCK *)(evt.value.p))->src_thread,\n ((APP_MESSAGE_BLOCK *)(evt.value.p))->system_time,\n ((APP_MESSAGE_BLOCK *)(evt.value.p))->msg_body.message_id,\n ((APP_MESSAGE_BLOCK *)(evt.value.p))->msg_body.message_ptr,\n ((APP_MESSAGE_BLOCK *)(evt.value.p))->msg_body.message_Param0,\n ((APP_MESSAGE_BLOCK *)(evt.value.p))->msg_body.message_Param1,\n ((APP_MESSAGE_BLOCK *)(evt.value.p))->msg_body.message_Param2);\n } else {\n TRACE_IMM(2, \"cnt:%d %d\", i, evt.status);\n break;\n }\n }\n TRACE_IMM(0, \"osMailAlloc error dump end\");\n }\n\n ASSERT(msg_p, \"osMailAlloc error\");\n msg_p->src_thread = (uint32_t)osThreadGetId();\n msg_p->dest_thread = (uint32_t)NULL;\n msg_p->system_time = hal_sys_timer_get();\n msg_p->mod_id = msg_src->mod_id;\n msg_p->msg_body.message_id = msg_src->msg_body.message_id;\n msg_p->msg_body.message_ptr = msg_src->msg_body.message_ptr;\n msg_p->msg_body.message_Param0 = msg_src->msg_body.message_Param0;\n msg_p->msg_body.message_Param1 = msg_src->msg_body.message_Param1;\n msg_p->msg_body.message_Param2 = msg_src->msg_body.message_Param2;\n\n status = osMailPut(app_mailbox, msg_p);\n if (osOK == status)\n app_mailbox_cnt++;\n return (int)status;\n}\n\nint app_mailbox_free(APP_MESSAGE_BLOCK *msg_p) {\n osStatus status;\n\n status = osMailFree(app_mailbox, msg_p);\n if (osOK == status)\n app_mailbox_cnt--;\n\n return (int)status;\n}\n\nint app_mailbox_get(APP_MESSAGE_BLOCK **msg_p) {\n osEvent evt;\n evt = osMailGet(app_mailbox, osWaitForever);\n if (evt.status == osEventMail) {\n *msg_p = (APP_MESSAGE_BLOCK *)evt.value.p;\n return 0;\n }\n return -1;\n}\n\nstatic void app_thread(void const *argument) {\n while (1) {\n APP_MESSAGE_BLOCK *msg_p = NULL;\n\n if (!app_mailbox_get(&msg_p)) {\n if (msg_p->mod_id < APP_MODUAL_NUM) {\n if (mod_handler[msg_p->mod_id]) {\n int ret = mod_handler[msg_p->mod_id](&(msg_p->msg_body));\n if (ret)\n TRACE(2, \"mod_handler[%d] ret=%d\", msg_p->mod_id, ret);\n }\n }\n app_mailbox_free(msg_p);\n }\n }\n}\n\nint app_os_init(void) {\n if (app_mailbox_init())\n return -1;\n\n app_thread_tid = osThreadCreate(osThread(app_thread), NULL);\n if (app_thread_tid == NULL) {\n TRACE(0, \"Failed to Create app_thread\\n\");\n return 0;\n }\n return 0;\n}\n\nint app_set_threadhandle(enum APP_MODUAL_ID_T mod_id,\n APP_MOD_HANDLER_T handler) {\n if (mod_id >= APP_MODUAL_NUM)\n return -1;\n\n mod_handler[mod_id] = handler;\n return 0;\n}\n\nvoid *app_os_tid_get(void) { return (void *)app_thread_tid; }\n\nbool app_is_module_registered(enum APP_MODUAL_ID_T mod_id) {\n return mod_handler[mod_id];\n}\n" }, { "path": "apps/common/app_thread.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_THREAD_H__\n#define __APP_THREAD_H__\n#include \n#include \n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define APP_MAILBOX_MAX (20)\n\nenum APP_MODUAL_ID_T {\n APP_MODUAL_KEY = 0,\n APP_MODUAL_AUDIO,\n APP_MODUAL_BATTERY,\n APP_MODUAL_BT,\n APP_MODUAL_FM,\n APP_MODUAL_SD,\n APP_MODUAL_LINEIN,\n APP_MODUAL_USBHOST,\n APP_MODUAL_USBDEVICE,\n APP_MODUAL_WATCHDOG,\n APP_MODUAL_AUDIO_MANAGE,\n APP_MODUAL_ANC,\n APP_MODUAL_SMART_MIC,\n#ifdef __PC_CMD_UART__\n APP_MODUAL_CMD,\n#endif\n#ifdef TILE_DATAPATH\n APP_MODUAL_TILE,\n#endif\n APP_MODUAL_MIC,\n#ifdef VOICE_DETECTOR_EN\n APP_MODUAL_VOICE_DETECTOR,\n#endif\n APP_MODUAL_CUSTOM_FUNCTION,\n APP_MODUAL_OHTER,\n APP_MODUAL_WNR,\n\n APP_MODUAL_NUM\n};\n\ntypedef struct {\n uint32_t message_id;\n uint32_t message_ptr;\n uint32_t message_Param0;\n uint32_t message_Param1;\n uint32_t message_Param2;\n} APP_MESSAGE_BODY;\n\ntypedef struct {\n uint32_t src_thread;\n uint32_t dest_thread;\n uint32_t system_time;\n uint32_t mod_id;\n APP_MESSAGE_BODY msg_body;\n} APP_MESSAGE_BLOCK;\n\ntypedef int (*APP_MOD_HANDLER_T)(APP_MESSAGE_BODY *);\n\nint app_mailbox_put(APP_MESSAGE_BLOCK *msg_src);\n\nint app_mailbox_free(APP_MESSAGE_BLOCK *msg_p);\n\nint app_mailbox_get(APP_MESSAGE_BLOCK **msg_p);\n\nint app_os_init(void);\n\nint app_set_threadhandle(enum APP_MODUAL_ID_T mod_id,\n APP_MOD_HANDLER_T handler);\n\nvoid *app_os_tid_get(void);\n\nbool app_is_module_registered(enum APP_MODUAL_ID_T mod_id);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif //__FMDEC_H__\n" }, { "path": "apps/common/app_utils.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_utils.h\"\n#include \"analog.h\"\n#include \"cmsis.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_wdt.h\"\n#include \"pmu.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n\n#define FREQ_FREE 0UL\n#define FREQ_26M 26UL\n#define FREQ_52M 52UL\n#define FREQ_78M 78UL\n#define FREQ_104M 104UL\n#define FREQ_208M 208UL\n\n/*\n * qos_users, quality of services users, this kind of user must run with the\n * minist frequency they requiested, if there are more users, the frequency\n * should be boost for these users\n * e.g. the key word recorgnithion function request 26M Hz, and the music\n * also need 26M, if both of them are running, the cpu freq should boost to\n * 26M + 26M = 52M Hz\n */\n/*\n * NOTE:\n * The macro QOS_USERS works only when the APP_SYSFREQ_USER_APP_XXX is not large\n * than 32, currently this works, but if the are more user, another way needed\n */\n#define QOS_USERS \\\n ((1 << (APP_SYSFREQ_USER_AI_VOICE)) | (1 << (APP_SYSFREQ_USER_BT_A2DP)))\n\nstatic const uint32_t freq_map[] = {\n [HAL_CMU_FREQ_32K] = FREQ_FREE, [HAL_CMU_FREQ_26M] = FREQ_26M,\n [HAL_CMU_FREQ_52M] = FREQ_52M, [HAL_CMU_FREQ_78M] = FREQ_78M,\n [HAL_CMU_FREQ_104M] = FREQ_104M, [HAL_CMU_FREQ_208M] = FREQ_208M,\n};\n\nstatic const uint32_t user_map[] = {\n [0] = APP_SYSFREQ_USER_AI_VOICE,\n [1] = APP_SYSFREQ_USER_BT_A2DP,\n};\n/*\n * qos_freqs_map\n * filled with user's freq, one user's freq occupy 4bits,\n * that limit the frequecy number is not large than 16\n *\n * bit field structure:\n -----------------------------------------------------\n |user7 | user6 |..................|user1 | user 0|\n -----------------------------------------------------\n |31~28 | 27~24 |..................|7~4 | 3~0 |\n -----------------------------------------------------\n *\n * Ok, this is ugly, but there is not so much frequecy level,\n * and maybe work for a long time\n */\nstatic uint32_t qos_freqs_map;\n\n/*\n * qos_users_map\n * filled with user's number, one user's occupy 1 bit,\n *\n bit field structure:\n -----------------------------------------------------\n |user31~7(reseverd)| user7 |........| user 1| user 0|\n -----------------------------------------------------\n *\n */\nstatic uint32_t qos_users_map;\n\nstatic int app_qosfreq_req(enum APP_SYSFREQ_USER_T user,\n enum APP_SYSFREQ_FREQ_T freq) {\n int ret;\n int qos_freq_num = 0;\n uint32_t max_qos_freq = 0;\n int user_idx;\n int i;\n uint32_t lock;\n\n if (freq >= APP_SYSFREQ_FREQ_QTY)\n return -1;\n\n lock = int_lock();\n for (i = 0; i < ARRAY_SIZE(user_map); i++) {\n if (user == user_map[i]) {\n break;\n }\n }\n\n if (i >= ARRAY_SIZE(user_map)) {\n int_unlock(lock);\n ASSERT(0, \"can not find qos user\");\n return 0;\n }\n\n user_idx = i;\n if ((int)freq != (int)HAL_CMU_FREQ_32K) { // require freq\n qos_freqs_map &= ~(0xf << (4 * i));\n qos_freqs_map |= freq << (4 * i);\n qos_users_map |= 1 << user_idx;\n } else { // release freq\n qos_freqs_map &= ~(0xf << (4 * i));\n qos_users_map &= ~(1 << user_idx);\n }\n\n // scan the qos_user_map and sum every user's request freq\n for (i = 0; i < ARRAY_SIZE(user_map); i++) {\n if ((qos_users_map >> i) & 0x1) {\n uint32_t real_freq;\n int freq_num;\n\n freq_num = (qos_freqs_map >> (4 * i)) & 0xf;\n real_freq = freq_map[freq_num];\n max_qos_freq += real_freq;\n }\n }\n\n for (i = 0; i < ARRAY_SIZE(freq_map); i++) {\n if (i) {\n if ((max_qos_freq > freq_map[i - 1]) && (max_qos_freq <= freq_map[i])) {\n qos_freq_num = i;\n break;\n }\n } else {\n if (max_qos_freq == freq_map[i]) {\n qos_freq_num = i;\n break;\n }\n }\n }\n\n if (i >= ARRAY_SIZE(freq_map)) {\n qos_freq_num = (HAL_CMU_FREQ_QTY - 1);\n int_unlock(lock);\n TRACE(0, \"WARNING: required sysfreq exceed\");\n // ASSERT(0, \"can not find actual freq\");\n return 0;\n }\n\n user = APP_SYSFREQ_USER_QOS;\n TRACE(2, \"User %d require sysfreq %d\", user, qos_freq_num);\n ret = hal_sysfreq_req((enum HAL_SYSFREQ_USER_T)user,\n (enum HAL_CMU_FREQ_T)qos_freq_num);\n\n int_unlock(lock);\n return ret;\n}\n\nint app_sysfreq_req(enum APP_SYSFREQ_USER_T user,\n enum APP_SYSFREQ_FREQ_T freq) {\n int ret;\n\n // if user is qos user\n if ((1 << user) & QOS_USERS) {\n ret = app_qosfreq_req(user, freq);\n } else { // if user is NOT qos user\n ret = hal_sysfreq_req((enum HAL_SYSFREQ_USER_T)user,\n (enum HAL_CMU_FREQ_T)freq);\n }\n\n return ret;\n}\n\n#ifdef RTOS\n\nextern int rtx_task_idle_health_check(void);\nstatic void watchdog_ping_handler(void const *n);\nstatic osTimerId wdt_ping_timer_id;\nosTimerDef(wdt_ping_timer, watchdog_ping_handler);\nstatic uint32_t wdt_ping_period;\n\nstatic void watchdog_ping(void) {\n hal_wdt_ping(HAL_WDT_ID_0);\n#ifndef CHIP_BEST2000\n pmu_wdt_feed();\n#endif\n}\n\nstatic void app_wdt_irq_handle(enum HAL_WDT_ID_T id, uint32_t status) {\n analog_aud_codec_mute();\n ASSERT(0, \"%s id:%d status:%d\", __func__, id, status);\n}\n\nstatic void pmu_wdt_irq_handle(void) {\n analog_aud_codec_mute();\n ASSERT(1, \"%s\", __func__);\n}\n\nstatic void watchdog_ping_handler(void const *unused) {\n int ret;\n\n watchdog_ping();\n ret = rtx_task_idle_health_check();\n if (ret < 0) {\n ASSERT(0, \"System soft lockup\");\n }\n\n osTimerStart(wdt_ping_timer_id, wdt_ping_period);\n}\n\nint app_wdt_open(int seconds) {\n uint32_t lock = int_lock();\n\n hal_wdt_set_irq_callback(HAL_WDT_ID_0, app_wdt_irq_handle);\n hal_wdt_set_timeout(HAL_WDT_ID_0, seconds);\n hal_wdt_start(HAL_WDT_ID_0);\n pmu_wdt_set_irq_handler(pmu_wdt_irq_handle);\n#ifndef CHIP_BEST2000\n pmu_wdt_config(seconds * 1100, seconds * 1100);\n pmu_wdt_start();\n#endif\n int_unlock(lock);\n wdt_ping_timer_id = osTimerCreate(osTimer(wdt_ping_timer), osTimerOnce, NULL);\n if (!wdt_ping_timer_id) {\n TRACE(0, \"Warning: can not create watchdog ping timer\");\n return -1;\n }\n wdt_ping_period = seconds * 1000 / 4;\n\n osTimerStart(wdt_ping_timer_id, wdt_ping_period);\n return 0;\n}\n\nint app_wdt_reopen(int seconds) {\n uint32_t lock = int_lock();\n hal_wdt_stop(HAL_WDT_ID_0);\n hal_wdt_set_timeout(HAL_WDT_ID_0, seconds);\n hal_wdt_start(HAL_WDT_ID_0);\n#ifndef CHIP_BEST2000\n pmu_wdt_config(seconds * 1000, seconds * 1000);\n pmu_wdt_start();\n#endif\n int_unlock(lock);\n\n osTimerStart(wdt_ping_timer_id, wdt_ping_period);\n return 0;\n}\n\nint app_wdt_close(void) {\n uint32_t lock;\n\n osTimerStop(wdt_ping_timer_id);\n\n lock = int_lock();\n hal_wdt_stop(HAL_WDT_ID_0);\n#ifndef CHIP_BEST2000\n pmu_wdt_stop();\n#endif\n int_unlock(lock);\n\n return 0;\n}\n\n#endif\n" }, { "path": "apps/common/app_utils.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_UTILS_H__\n#define __APP_UTILS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_sysfreq.h\"\n\n// APP_SYSFREQ_USER_APP_0 is APP_MAIN\n#define APP_SYSFREQ_USER_BT_MAIN APP_SYSFREQ_USER_APP_1\n#define APP_SYSFREQ_USER_HCI APP_SYSFREQ_USER_APP_2\n#define APP_SYSFREQ_USER_BT_A2DP APP_SYSFREQ_USER_APP_3\n#define APP_SYSFREQ_USER_UNUSED APP_SYSFREQ_USER_APP_4\n#define APP_SYSFREQ_USER_AI_VOICE APP_SYSFREQ_USER_APP_5\n#define APP_SYSFREQ_USER_BT_SCO APP_SYSFREQ_USER_APP_6\n#define APP_SYSFREQ_USER_OTA APP_SYSFREQ_USER_APP_7\n#define APP_SYSFREQ_USER_PROMPT_MIXER APP_SYSFREQ_USER_APP_8\n#define APP_SYSFREQ_USER_APP_NT APP_SYSFREQ_USER_APP_9\n#define APP_SYSFREQ_USER_ANC_WNR APP_SYSFREQ_USER_APP_10\n#ifdef __RAND_FROM_MIC__\n#define APP_SYSFREQ_USER_RANDOM APP_SYSFREQ_USER_APP_11\n#endif\n#ifdef __DUAL_MIC_RECORDING__\n#define APP_SYSFREQ_USER_RECORDING APP_SYSFREQ_USER_APP_12\n#endif\n/*\n * Pseudo user, if one of user is belong to qos(quality of service) user,\n * when request cpu freq, it will changed to this user\n */\n#define APP_SYSFREQ_USER_QOS APP_SYSFREQ_USER_APP_12\n\nenum APP_SYSFREQ_USER_T {\n APP_SYSFREQ_USER_APP_INIT = HAL_SYSFREQ_USER_INIT,\n APP_SYSFREQ_USER_APP_0 = HAL_SYSFREQ_USER_APP_0,\n APP_SYSFREQ_USER_APP_1 = HAL_SYSFREQ_USER_APP_1,\n APP_SYSFREQ_USER_APP_2 = HAL_SYSFREQ_USER_APP_2,\n APP_SYSFREQ_USER_APP_3 = HAL_SYSFREQ_USER_APP_3,\n APP_SYSFREQ_USER_APP_4 = HAL_SYSFREQ_USER_APP_4,\n APP_SYSFREQ_USER_APP_5 = HAL_SYSFREQ_USER_APP_5,\n APP_SYSFREQ_USER_APP_6 = HAL_SYSFREQ_USER_APP_6,\n APP_SYSFREQ_USER_APP_7 = HAL_SYSFREQ_USER_APP_7,\n APP_SYSFREQ_USER_APP_8 = HAL_SYSFREQ_USER_APP_8,\n APP_SYSFREQ_USER_APP_9 = HAL_SYSFREQ_USER_APP_9,\n APP_SYSFREQ_USER_APP_10 = HAL_SYSFREQ_USER_APP_10,\n APP_SYSFREQ_USER_APP_11 = HAL_SYSFREQ_USER_APP_11,\n APP_SYSFREQ_USER_APP_12 = HAL_SYSFREQ_USER_APP_12,\n APP_SYSFREQ_USER_APP_13 = HAL_SYSFREQ_USER_APP_13,\n APP_SYSFREQ_USER_APP_14 = HAL_SYSFREQ_USER_APP_14,\n APP_SYSFREQ_USER_APP_15 = HAL_SYSFREQ_USER_APP_15,\n APP_SYSFREQ_USER_QTY\n};\n\nenum APP_SYSFREQ_FREQ_T {\n APP_SYSFREQ_32K = HAL_CMU_FREQ_32K,\n APP_SYSFREQ_26M = HAL_CMU_FREQ_26M,\n APP_SYSFREQ_52M = HAL_CMU_FREQ_52M,\n APP_SYSFREQ_78M = HAL_CMU_FREQ_78M,\n APP_SYSFREQ_104M = HAL_CMU_FREQ_104M,\n APP_SYSFREQ_208M = HAL_CMU_FREQ_208M,\n\n APP_SYSFREQ_FREQ_QTY = HAL_CMU_FREQ_QTY\n};\n\nenum APP_WDT_THREAD_CHECK_USER_T {\n APP_WDT_THREAD_CHECK_USER_APP,\n APP_WDT_THREAD_CHECK_USER_AF,\n APP_WDT_THREAD_CHECK_USER_BT,\n APP_WDT_THREAD_CHECK_USER_3,\n APP_WDT_THREAD_CHECK_USER_4,\n APP_WDT_THREAD_CHECK_USER_5,\n APP_WDT_THREAD_CHECK_USER_6,\n APP_WDT_THREAD_CHECK_USER_7,\n APP_WDT_THREAD_CHECK_USER_8,\n APP_WDT_THREAD_CHECK_USER_9,\n APP_WDT_THREAD_CHECK_USER_10,\n\n APP_WDT_THREAD_CHECK_USER_QTY\n};\n\nint app_sysfreq_req(enum APP_SYSFREQ_USER_T user, enum APP_SYSFREQ_FREQ_T freq);\n\nint app_wdt_open(int seconds);\n\nint app_wdt_reopen(int seconds);\n\nint app_wdt_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif//__FMDEC_H__\n" }, { "path": "apps/common/randfrommic.c", "content": "#ifdef __RAND_FROM_MIC__\n#include \"randfrommic.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_gcc.h\"\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"stdio.h\"\n#include \"stdlib.h\"\n#include \"string.h\"\n\n#if BT_DRV_DEBUG\n#define RAND_TRACE(n, fmt, ...) TRACE(n, fmt, ##__VA_ARGS__)\n#define RAND_DUMP(s, buff, len) DUMP8(s, buff, len)\n#else\n#define RAND_TRACE(n, fmt, ...)\n#define RAND_DUMP(s, buff, len)\n#endif\n\nstatic void generateRand(bool on);\nstatic uint32_t rand_data_handle(uint8_t *buf, uint32_t len);\n\nstatic uint8_t deviceId = 0;\nstatic uint8_t *captureBuffer = NULL;\nstatic uint32_t randSeed = 1;\nstatic bool randInitialised = false;\n\n// 4 bytes aligned\n#define RAND_GRAB_BITS_PER_SAMPLE 4\n#define RAND_GRAB_BITS_MASK_PER_SAMPLE ((1 << RAND_GRAB_BITS_PER_SAMPLE) - 1)\n\nRAND_NUMBER_T randomBuffer = {\n 25,\n RAND_STATUS_CLOSE,\n};\n\n/**\n * Description: parse mic data according to the stream cfg(bit mode and channel\n * number) only the lowest byte of each frame is taken ADC format: 16bit mode ->\n * [15:0] is valid 24bit mode -> [23:4] is valid 32bit mode -> [31:12] is valid\n *\n */\nstatic int randDataParse(uint8_t *buf, uint32_t len, enum AUD_BITS_T bits,\n enum AUD_CHANNEL_NUM_T ch_num) {\n uint8_t index = 0;\n\n union {\n uint32_t seedValue;\n uint8_t value[4];\n } seedData;\n\n if ((NULL == buf) ||\n ((RANDOM_CAPTURE_BUFFER_SIZE / 2) > len)) // ping-pong buffer\n {\n return -1;\n }\n\n RAND_TRACE(1, \"%s\", __func__);\n RAND_DUMP(\"%x \", buf, 16);\n\n switch (bits) {\n case AUD_BITS_16: {\n uint16_t *content = (uint16_t *)buf;\n\n for (index = 0; index < 4; index++) {\n seedData.value[index] =\n ((*content) & RAND_GRAB_BITS_MASK_PER_SAMPLE) |\n (((*(content + ch_num)) & RAND_GRAB_BITS_MASK_PER_SAMPLE)\n << RAND_GRAB_BITS_PER_SAMPLE);\n content += ((8 / RAND_GRAB_BITS_PER_SAMPLE) * ch_num);\n }\n break;\n }\n case AUD_BITS_24: {\n uint32_t *content = (uint32_t *)buf;\n for (index = 0; index < 4; index++) {\n // bit 23:4 are valid\n seedData.value[index] =\n (((*content) >> 4) & RAND_GRAB_BITS_MASK_PER_SAMPLE) |\n ((((*(content + ch_num)) >> 4) & RAND_GRAB_BITS_MASK_PER_SAMPLE)\n << RAND_GRAB_BITS_PER_SAMPLE);\n content += ((8 / RAND_GRAB_BITS_PER_SAMPLE) * ch_num);\n }\n break;\n }\n case AUD_BITS_32: {\n uint32_t *content = (uint32_t *)buf;\n for (index = 0; index < 4; index++) {\n // bit 31:12 are valid\n seedData.value[index] =\n (((*content) >> 12) & RAND_GRAB_BITS_MASK_PER_SAMPLE) |\n ((((*(content + ch_num)) >> 12) & RAND_GRAB_BITS_MASK_PER_SAMPLE)\n << RAND_GRAB_BITS_PER_SAMPLE);\n content += ((8 / RAND_GRAB_BITS_PER_SAMPLE) * ch_num);\n }\n break;\n }\n default: {\n return -1;\n } break;\n }\n\n randSeed = seedData.seedValue;\n\n return 0;\n}\n\nstatic void generateRand(bool on) {\n struct AF_STREAM_CONFIG_T stream_cfg;\n\n RAND_TRACE(2, \"%s op:%d\", __func__, on);\n\n if (on) {\n randomBuffer.skipRound = 10;\n\n randomBuffer.status = random_mic_is_on(&deviceId);\n RAND_TRACE(2, \"%s random status = %d\", __func__, randomBuffer.status);\n\n if (RAND_STATUS_CLOSE == randomBuffer.status) {\n app_sysfreq_req(APP_SYSFREQ_USER_RANDOM, APP_SYSFREQ_208M);\n app_capture_audio_mempool_init();\n app_capture_audio_mempool_get_buff(&captureBuffer,\n RANDOM_CAPTURE_BUFFER_SIZE);\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n stream_cfg.bits = AUD_BITS_16;\n stream_cfg.channel_num = AUD_CHANNEL_NUM_1;\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.sample_rate = AUD_SAMPRATE_8000;\n stream_cfg.vol = TGT_VOLUME_LEVEL_15;\n stream_cfg.io_path = AUD_INPUT_PATH_MAINMIC;\n stream_cfg.handler = rand_data_handle;\n\n stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(captureBuffer);\n stream_cfg.data_size = RANDOM_CAPTURE_BUFFER_SIZE;\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n randomBuffer.status = RAND_STATUS_OPEN;\n } else if (RAND_STATUS_MIC_OPENED == randomBuffer.status) {\n af_stream_start(deviceId, AUD_STREAM_CAPTURE);\n }\n } else {\n // release the acquired system clock\n app_sysfreq_req(APP_SYSFREQ_USER_RANDOM, APP_SYSFREQ_32K);\n if (RAND_STATUS_MIC_OPENED == randomBuffer.status) {\n af_stream_stop(deviceId, AUD_STREAM_CAPTURE);\n } else if (RAND_STATUS_OPEN == randomBuffer.status) {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n }\n randomBuffer.status = RAND_STATUS_CLOSE;\n }\n}\n\nstatic uint32_t rand_data_handle(uint8_t *buf, uint32_t len) {\n if (buf == NULL) {\n return len;\n }\n\n if ((1 == randomBuffer.skipRound) &&\n (!randDataParse(buf, len, AUD_BITS_16, AUD_CHANNEL_NUM_1))) {\n generateRand(false);\n randomBuffer.skipRound = 0;\n } else if (1 != randomBuffer.skipRound) {\n randomBuffer.skipRound--;\n }\n\n return len;\n}\n\nvoid initSeed(void) {\n uint8_t count = 100; // avoid deed loop\n\n RAND_TRACE(2, \"%s:+++ initialised = %d\", __func__, randInitialised);\n\n if (randInitialised) {\n generateRand(true);\n\n while ((0 != randomBuffer.skipRound) && (0 != count)) {\n osDelay(10);\n count--;\n }\n }\n\n if ((0 == count) || (false == randInitialised)) {\n RAND_TRACE(1, \"%s not ready\", __func__);\n randSeed = (uint32_t)hal_sys_timer_get();\n generateRand(false);\n }\n\n srand(randSeed);\n RAND_TRACE(2, \"%s:--- count = %d\", __func__, count);\n}\n\nvoid random_status_sync(void) {\n if (RAND_STATUS_OPEN == randomBuffer.status) {\n RAND_TRACE(1, \"%s random mic has already on,should be closed\", __func__);\n generateRand(false);\n }\n}\n\nvoid random_data_process(uint8_t *buf, uint32_t len, enum AUD_BITS_T bits,\n enum AUD_CHANNEL_NUM_T ch_num) {\n if (buf == NULL) {\n return;\n }\n\n if ((RAND_STATUS_MIC_STARTED == randomBuffer.status) ||\n (RAND_STATUS_MIC_OPENED == randomBuffer.status)) {\n if (len >= RANDOM_CAPTURE_BUFFER_SIZE / 2) {\n RAND_TRACE(4, \"%s buf address = 0x%p, bits = %d, channel num = %d\",\n __func__, buf, bits, ch_num);\n RAND_DUMP(\"%02x \", buf, 32);\n if ((1 == randomBuffer.skipRound) &&\n (!randDataParse(buf, len, bits, ch_num))) {\n generateRand(false);\n randomBuffer.skipRound = 0;\n } else if (1 != randomBuffer.skipRound) {\n randomBuffer.skipRound--;\n }\n }\n }\n}\n\nvoid randInit(void) { randInitialised = true; }\n\n#endif\n" }, { "path": "apps/common/randfrommic.h", "content": "#ifdef __RAND_FROM_MIC__\n#ifndef __RANDFROMMIC_H__\n#define __RANDFROMMIC_H__\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define RANDOM_CAPTURE_BUFFER_SIZE 512\n\n// random module state machine\ntypedef enum {\n RAND_STATUS_CLOSE = 0x00, // initial state\n RAND_STATUS_OPEN = 0x01, // indicate MIC has been started by random module\n RAND_STATUS_MIC_STARTED = 0x02, // indicate MIC has been started\n RAND_STATUS_MIC_OPENED = 0x03, // indicate MIC has been opened but not start\n RAND_STATUS_NUM = 0x0F\n}RAND_STATUS_E;\n\ntypedef struct{\n uint8_t skipRound; // used to indicate the number of rounds should be skipped to avoid all zero value\n RAND_STATUS_E status;\n}__attribute__ ((__packed__))RAND_NUMBER_T;\n\nvoid initSeed(void);\nvoid random_status_sync(void);\nvoid random_data_process(uint8_t *buf, uint32_t len,enum AUD_BITS_T bits, enum AUD_CHANNEL_NUM_T ch_num);\nvoid randInit(void);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n#endif\n" }, { "path": "apps/factory/1k_2ch_44k_16bit.txt", "content": "0, 0, \n4652, 4653, \n9211, 9210, \n13583, 13583, \n17679, 17680, \n21418, 21417, \n24722, 24722, \n27525, 27524, \n29770, 29770, \n31413, 31413, \n32418, 32418, \n32767, 32767, \n32452, 32452, \n31478, 31479, \n29867, 29867, \n27651, 27651, \n24875, 24874, \n21594, 21594, \n17876, 17876, \n13795, 13795, \n9435, 9434, \n4884, 4884, \n234, 234, \n-4421, -4422, \n-8986, -8987, \n-13370, -13371, \n-17483, -17482, \n-21240, -21241, \n-24568, -24568, \n-27398, -27398, \n-29672, -29673, \n-31345, -31346, \n-32384, -32383, \n-32766, -32765, \n-32483, -32483, \n-31542, -31542, \n-29963, -29963, \n-27776, -27775, \n-25026, -25026, \n-21769, -21769, \n-18071, -18071, \n-14007, -14006, \n-9659, -9658, \n-5114, -5114, \n-466, -467, \n4190, 4190, \n8763, 8763, \n13157, 13157, \n17284, 17284, \n21062, 21063, \n24413, 24413, \n27269, 27268, \n29572, 29573, \n31277, 31277, \n32347, 32347, \n32762, 32762, \n32512, 32513, \n31605, 31605, \n30057, 30057, \n27898, 27899, \n25175, 25176, \n21943, 21943, \n18265, 18265, \n14217, 14217, \n9881, 9881, \n5345, 5345, \n700, 700, \n-3959, -3958, \n-8537, -8536, \n-12943, -12943, \n-17086, -17086, \n-20883, -20883, \n-24257, -24256, \n-27139, -27139, \n-29470, -29471, \n-31207, -31207, \n-32309, -32308, \n-32757, -32756, \n-32540, -32541, \n-31665, -31666, \n-30149, -30148, \n-28020, -28020, \n-25324, -25325, \n-22115, -22116, \n-18458, -18458, \n-14427, -14428, \n-10104, -10102, \n-5575, -5575, \n-934, -934, \n3727, 3727, \n8312, 8311, \n12728, 12728, \n16886, 16886, \n20702, 20702, \n24100, 24099, \n27008, 27008, \n29369, 29368, \n31135, 31135, \n32270, 32269, \n32750, 32750, \n32567, 32567, \n31725, 31725, \n30239, 30239, \n28141, 28140, \n25472, 25471, \n22287, 22288, \n18650, 18651, \n14636, 14637, \n10326, 10325, \n5805, 5805, \n1166, 1166, \n-3495, -3495, \n-8086, -8086, \n-12513, -12513, \n-16686, -16685, \n-20521, -20521, \n-23940, -23940, \n-26875, -26875, \n-29265, -29263, \n-31062, -31060, \n-32228, -32228, \n-32741, -32742, \n-32592, -32592, \n-31783, -31781, \n-30328, -30329, \n-28260, -28259, \n-25618, -25617, \n-22458, -22457, \n-18842, -18843, \n-14844, -14845, \n-10547, -10547, \n-6034, -6034, \n-1400, -1400, \n3263, 3263, \n7859, 7859, \n12297, 12296, \n16484, 16485, \n20338, 20338, \n23781, 23780, \n26741, 26740, \n29158, 29159, \n30986, 30986, \n32184, 32185, \n32731, 32733, \n32615, 32616, \n31839, 31838, \n30417, 30416, \n28377, 28377, \n25763, 25763, \n22627, 22628, \n19032, 19033, \n15052, 15052, \n10767, 10767, \n6263, 6264, \n1633, 1634, \n-3030, -3030, \n-7632, -7633, \n-12079, -12080, \n-16283, -16283, \n-20155, -20154, \n-23620, -23619, \n-26604, -26605, \n-29051, -29051, \n-30908, -30909, \n-32140, -32141, \n-32720, -32721, \n-32638, -32638, \n-31893, -31892, \n-30502, -30502, \n-28494, -28493, \n-25907, -25906, \n-22796, -22795, \n-19222, -19222, \n-15259, -15259, \n-10987, -10987, \n-6493, -6492, \n-1866, -1866, \n2797, 2797, \n7404, 7405, \n11862, 11862, \n16079, 16079, \n19971, 19971, \n23457, 23457, \n26468, 26468, \n28943, 28942, \n30830, 30831, \n32094, 32093, \n32707, 32707, \n32657, 32656, \n31946, 31946, \n30586, 30586, \n28608, 28608, \n26049, 26050, \n22962, 22963, \n19411, 19411, \n15466, 15465, \n11207, 11206, \n6722, 6722, \n2099, 2099, \n-2565, -2565, \n-7177, -7178, \n-11644, -11645, \n-15875, -15875, \n-19785, -19784, \n-23294, -23294, \n-26330, -26330, \n-28833, -28832, \n-30751, -30751, \n-32046, -32046, \n-32692, -32692, \n-32676, -32675, \n-31997, -31997, \n-30670, -30670, \n-28721, -28721, \n-26190, -26190, \n-23128, -23129, \n-19598, -19599, \n-15671, -15672, \n-11425, -11426, \n-6950, -6950, \n-2331, -2332, \n2332, 2333, \n6949, 6949, \n11426, 11426, \n15671, 15671, \n19598, 19598, \n23128, 23128, \n26190, 26190, \n28722, 28720, \n30669, 30669, \n31997, 31996, \n32676, 32675, \n32692, 32692, \n32046, 32046, \n30751, 30751, \n28832, 28833, \n26330, 26330, \n23293, 23294, \n19785, 19785, \n15876, 15875, \n11645, 11645, \n7177, 7177, \n2566, 2565, \n-2100, -2100, \n-6722, -6721, \n-11207, -11208, \n-15465, -15465, \n-19412, -19412, \n-22963, -22962, \n-26049, -26049, \n-28608, -28608, \n-30586, -30586, \n-31946, -31946, \n-32657, -32657, \n-32707, -32707, \n-32095, -32093, \n-30830, -30830, \n-28943, -28943, \n-26467, -26468, \n-23457, -23457, \n-19970, -19971, \n-16079, -16079, \n-11862, -11863, \n-7406, -7404, \n-2798, -2798, \n1866, 1866, \n6492, 6493, \n10987, 10987, \n15260, 15259, \n19222, 19222, \n22795, 22795, \n25906, 25907, \n28493, 28493, \n30502, 30502, \n31893, 31893, \n32638, 32637, \n32721, 32721, \n32141, 32140, \n30909, 30909, \n29051, 29052, \n26605, 26605, \n23619, 23619, \n20155, 20155, \n16282, 16282, \n12080, 12080, \n7631, 7632, \n3031, 3031, \n-1633, -1633, \n-6263, -6264, \n-10767, -10767, \n-15053, -15052, \n-19033, -19033, \n-22627, -22627, \n-25763, -25763, \n-28377, -28377, \n-30416, -30416, \n-31839, -31838, \n-32616, -32616, \n-32732, -32731, \n-32184, -32185, \n-30986, -30985, \n-29159, -29159, \n-26740, -26740, \n-23780, -23780, \n-20339, -20339, \n-16485, -16484, \n-12297, -12296, \n-7859, -7859, \n-3263, -3262, \n1399, 1401, \n6034, 6034, \n10547, 10546, \n14845, 14844, \n18842, 18842, \n22457, 22458, \n25619, 25619, \n28260, 28259, \n30329, 30328, \n31783, 31783, \n32593, 32593, \n32742, 32742, \n32228, 32228, \n31061, 31060, \n29264, 29264, \n26875, 26875, \n23940, 23940, \n20521, 20521, \n16686, 16686, \n12512, 12513, \n8085, 8085, \n3495, 3494, \n-1167, -1167, \n-5804, -5805, \n-10325, -10326, \n-14636, -14636, \n-18651, -18651, \n-22287, -22288, \n-25472, -25472, \n-28141, -28141, \n-30239, -30239, \n-31725, -31725, \n-32568, -32567, \n-32750, -32751, \n-32270, -32269, \n-31134, -31135, \n-29368, -29369, \n-27007, -27008, \n-24099, -24099, \n-20703, -20703, \n-16886, -16886, \n-12728, -12728, \n-8311, -8311, \n-3726, -3728, \n934, 933, \n5575, 5575, \n10104, 10104, \n14426, 14427, \n18458, 18458, \n22115, 22115, \n25324, 25324, \n28021, 28021, \n30149, 30148, \n31666, 31665, \n32541, 32541, \n32757, 32757, \n32310, 32309, \n31206, 31206, \n29471, 29472, \n27139, 27139, \n24257, 24257, \n20883, 20883, \n17085, 17086, \n12943, 12944, \n8537, 8537, \n3958, 3959, \n-700, -700, \n-5345, -5345, \n-9882, -9881, \n-14217, -14217, \n-18265, -18265, \n-21942, -21943, \n-25176, -25175, \n-27899, -27899, \n-30056, -30056, \n-31605, -31605, \n-32513, -32513, \n-32762, -32761, \n-32347, -32347, \n-31277, -31277, \n-29573, -29573, \n-27269, -27269, \n-24413, -24414, \n-21062, -21062, \n-17284, -17284, \n-13156, -13157, \n-8762, -8762, \n-4190, -4190, \n467, 466, \n5115, 5115, \n9659, 9658, \n14006, 14007, \n18070, 18070, \n21769, 21769, \n25026, 25025, \n27776, 27776, \n29962, 29963, \n31541, 31542, \n32482, 32483, \n32765, 32765, \n32383, 32383, \n31346, 31346, \n29672, 29672, \n27397, 27398, \n24568, 24568, \n21240, 21241, \n17482, 17482, \n13371, 13370, \n8987, 8987, \n4421, 4422, \n-233, -234, \n-4883, -4883, \n-9435, -9435, \n-13795, -13795, \n-17876, -17875, \n-21594, -21594, \n-24874, -24875, \n-27651, -27651, \n-29868, -29867, \n-31478, -31478, \n-32451, -32451, \n-32767, -32767, \n-32419, -32418, \n-31413, -31413, \n-29770, -29770, \n-27525, -27525, \n-24722, -24722, \n-21418, -21417, \n-17680, -17680, \n-13583, -13582, \n-9211, -9212, \n-4653, -4653, \n-1, 1, \n4652, 4652, \n9211, 9211, \n13584, 13582, \n17679, 17679, \n21418, 21418, \n24722, 24722, \n27525, 27525, \n29771, 29771, \n31412, 31413, \n32418, 32419, \n32767, 32767, \n32452, 32451, \n31478, 31478, \n29868, 29867, \n27650, 27651, \n24874, 24874, \n21593, 21593, \n17876, 17875, \n13795, 13795, \n9435, 9436, \n4883, 4884, \n234, 233, \n-4421, -4422, \n-8987, -8987, \n-13370, -13370, \n-17483, -17483, \n-21240, -21240, \n-24568, -24569, \n-27398, -27398, \n-29672, -29672, \n-31346, -31346, \n-32383, -32384, \n-32765, -32765, \n-32483, -32484, \n-31542, -31542, \n-29963, -29963, \n-27775, -27775, \n-25026, -25026, \n-21769, -21769, \n-18070, -18071, \n-14006, -14007, \n-9658, -9658, \n-5115, -5115, \n-467, -467, \n4190, 4190, \n8762, 8763, \n13157, 13157, \n17285, 17284, \n21062, 21062, \n24413, 24413, \n27269, 27269, \n29573, 29572, \n31276, 31277, \n32347, 32346, \n32762, 32762, \n32513, 32512, \n31605, 31604, \n30056, 30057, \n27899, 27899, \n25176, 25176, \n21943, 21943, \n18265, 18265, \n14217, 14217, \n9881, 9881, \n5344, 5345, \n700, 700, \n-3958, -3958, \n-8537, -8537, \n-12942, -12943, \n-17085, -17086, \n-20883, -20883, \n-24257, -24257, \n-27138, -27138, \n-29471, -29471, \n-31206, -31207, \n-32309, -32308, \n-32757, -32757, \n-32541, -32540, \n-31666, -31666, \n-30148, -30148, \n-28021, -28020, \n-25325, -25325, \n-22115, -22116, \n-18458, -18458, \n-14427, -14427, \n-10103, -10103, \n-5575, -5575, \n-934, -933, \n3727, 3726, \n8312, 8311, \n12729, 12728, \n16886, 16886, \n20703, 20702, \n24099, 24100, \n27007, 27008, \n29369, 29369, \n31135, 31134, \n32270, 32270, \n32750, 32750, \n32568, 32567, \n31724, 31724, \n30239, 30240, \n28140, 28142, \n25472, 25473, \n22287, 22288, \n18651, 18651, \n14636, 14635, \n10325, 10325, \n5805, 5805, \n1167, 1167, \n-3495, -3495, \n-8085, -8085, \n-12512, -12513, \n-16685, -16685, \n-20521, -20521, \n-23941, -23940, \n-26875, -26875, \n-29264, -29265, \n-31060, -31061, \n-32228, -32228, \n-32742, -32742, \n-32593, -32593, \n-31782, -31782, \n-30328, -30328, \n-28260, -28260, \n-25618, -25619, \n-22458, -22458, \n-18842, -18842, \n-14845, -14844, \n-10546, -10546, \n-6035, -6035, \n-1400, -1400, \n3262, 3263, \n7859, 7859, \n12296, 12297, \n16485, 16485, \n20339, 20339, \n23780, 23780, \n26741, 26741, \n29159, 29158, \n30985, 30985, \n32185, 32185, \n32732, 32733, \n32615, 32616, \n31839, 31839, \n30416, 30416, \n28377, 28377, \n25763, 25762, \n22627, 22628, \n19032, 19032, \n15053, 15052, \n10767, 10767, \n6264, 6263, \n1633, 1634, \n-3030, -3030, \n-7632, -7632, \n-12081, -12079, \n-16282, -16283, \n-20154, -20155, \n-23618, -23619, \n-26604, -26605, \n-29051, -29051, \n-30910, -30909, \n-32140, -32141, \n-32721, -32720, \n-32637, -32637, \n-31892, -31893, \n-30502, -30502, \n-28493, -28493, \n-25907, -25907, \n-22795, -22796, \n-19222, -19222, \n-15260, -15259, \n-10987, -10987, \n-6493, -6492, \n-1867, -1867, \n2798, 2798, \n7405, 7405, \n11862, 11862, \n16079, 16079, \n19971, 19970, \n23457, 23456, \n26468, 26468, \n28942, 28942, \n30831, 30830, \n32095, 32095, \n32707, 32706, \n32657, 32657, \n31946, 31945, \n30587, 30586, \n28607, 28607, \n26049, 26049, \n22963, 22963, \n19411, 19411, \n15466, 15465, \n11206, 11208, \n6721, 6721, \n2100, 2099, \n-2565, -2565, \n-7177, -7177, \n-11644, -11644, \n-15875, -15876, \n-19785, -19785, \n-23293, -23294, \n-26330, -26330, \n-28833, -28832, \n-30751, -30751, \n-32046, -32047, \n-32692, -32692, \n-32675, -32675, \n-31997, -31997, \n-30669, -30669, \n-28720, -28720, \n-26190, -26190, \n-23129, -23128, \n-19598, -19598, \n-15671, -15671, \n-11425, -11426, \n-6949, -6949, \n-2332, -2332, \n2333, 2333, \n6950, 6950, \n11426, 11427, \n15670, 15671, \n19599, 19598, \n23128, 23128, \n26190, 26189, \n28720, 28720, \n30670, 30669, \n31996, 31996, \n32675, 32676, \n32692, 32692, \n32046, 32046, \n30751, 30751, \n28832, 28831, \n26330, 26329, \n23293, 23293, \n19784, 19785, \n15875, 15875, \n11645, 11645, \n7177, 7178, \n2564, 2565, \n-2100, -2099, \n-6722, -6722, \n-11207, -11206, \n-15466, -15466, \n-19410, -19411, \n-22962, -22962, \n-26049, -26049, \n-28608, -28607, \n-30586, -30586, \n-31945, -31946, \n-32658, -32657, \n-32707, -32707, \n-32095, -32094, \n-30832, -30830, \n-28943, -28943, \n-26468, -26467, \n-23457, -23456, \n-19971, -19970, \n-16080, -16080, \n-11862, -11863, \n-7406, -7405, \n-2797, -2797, \n1867, 1866, \n6492, 6492, \n10987, 10987, \n15260, 15259, \n19222, 19222, \n22796, 22796, \n25907, 25906, \n28494, 28493, \n30502, 30502, \n31893, 31893, \n32637, 32637, \n32720, 32721, \n32140, 32140, \n30909, 30909, \n29052, 29052, \n26605, 26605, \n23619, 23619, \n20155, 20155, \n16281, 16282, \n12080, 12079, \n7632, 7632, \n3031, 3030, \n-1634, -1633, \n-6263, -6264, \n-10767, -10767, \n-15052, -15053, \n-19033, -19032, \n-22627, -22628, \n-25763, -25763, \n-28377, -28377, \n-30416, -30416, \n-31838, -31838, \n-32616, -32616, \n-32732, -32732, \n-32185, -32185, \n-30986, -30986, \n-29158, -29158, \n-26741, -26741, \n-23780, -23780, \n-20339, -20338, \n-16485, -16484, \n-12296, -12296, \n-7859, -7859, \n-3262, -3263, \n1400, 1400, \n6035, 6034, \n10546, 10546, \n14845, 14845, \n18842, 18842, \n22457, 22458, \n25619, 25619, \n28260, 28260, \n30327, 30328, \n31782, 31782, \n32592, 32592, \n32742, 32742, \n32229, 32227, \n31061, 31061, \n29264, 29264, \n26875, 26874, \n23940, 23941, \n20521, 20521, \n16685, 16686, \n12513, 12513, \n8086, 8085, \n3495, 3495, \n-1167, -1167, \n-5804, -5805, \n-10325, -10324, \n-14636, -14636, \n-18651, -18651, \n-22287, -22287, \n-25471, -25473, \n-28141, -28140, \n-30239, -30240, \n-31724, -31725, \n-32567, -32567, \n-32750, -32751, \n-32270, -32269, \n-31135, -31135, \n-29369, -29369, \n-27007, -27007, \n-24099, -24099, \n-20703, -20703, \n-16886, -16886, \n-12728, -12728, \n-8311, -8312, \n-3727, -3727, \n934, 934, \n5576, 5575, \n10104, 10104, \n14427, 14427, \n18459, 18458, \n22115, 22115, \n25325, 25324, \n28020, 28020, \n30148, 30148, \n31665, 31666, \n32541, 32541, \n32757, 32757, \n32309, 32310, \n31206, 31206, \n29472, 29472, \n27139, 27138, \n24257, 24257, \n20883, 20883, \n17086, 17086, \n12942, 12942, \n8537, 8537, \n3958, 3958, \n-700, -701, \n-5344, -5345, \n-9881, -9881, \n-14218, -14217, \n-18264, -18265, \n-21942, -21943, \n-25175, -25176, \n-27899, -27898, \n-30057, -30057, \n-31605, -31605, \n-32512, -32513, \n-32761, -32761, \n-32347, -32347, \n-31277, -31277, \n-29573, -29572, \n-27269, -27269, \n-24414, -24414, \n-21062, -21062, \n-17284, -17285, \n-13156, -13157, \n-8763, -8762, \n-4190, -4190, \n467, 467, \n5114, 5114, \n9658, 9659, \n14006, 14006, \n18071, 18071, \n21769, 21769, \n25026, 25026, \n27775, 27776, \n29963, 29962, \n31543, 31542, \n32483, 32483, \n32765, 32765, \n32384, 32384, \n31345, 31345, \n29671, 29672, \n27398, 27398, \n24568, 24568, \n21241, 21241, \n17483, 17483, \n13369, 13370, \n8986, 8987, \n4422, 4421, \n-233, -234, \n-4885, -4884, \n-9435, -9435, \n-13795, -13794, \n-17876, -17875, \n-21594, -21594, \n-24875, -24874, \n-27651, -27651, \n-29867, -29868, \n-31478, -31478, \n-32452, -32451, \n-32768, -32767, \n-32419, -32418, \n-31412, -31413, \n-29771, -29771, \n-27525, -27526, \n-24722, -24721, \n-21417, -21418, \n-17680, -17679, \n-13583, -13583, \n-9211, -9210, \n-4653, -4653" }, { "path": "apps/factory/1k_2ch_48k_16bit.txt", "content": "0,\n0,\n4234,\n4234,\n8396,\n8396,\n12414,\n12414,\n16220,\n16220,\n19748,\n19748,\n22938,\n22938,\n25736,\n25736,\n28094,\n28094,\n29970,\n29970,\n31334,\n31334,\n32162,\n32162,\n32440,\n32440,\n32162,\n32162,\n31334,\n31334,\n29970,\n29970,\n28094,\n28094,\n25736,\n25736,\n22938,\n22938,\n19748,\n19748,\n16220,\n16220,\n12414,\n12414,\n8396,\n8396,\n4234,\n4234,\n0,\n0,\n-4234,\n-4234,\n-8396,\n-8396,\n-12414,\n-12414,\n-16220,\n-16220,\n-19748,\n-19748,\n-22938,\n-22938,\n-25736,\n-25736,\n-28094,\n-28094,\n-29970,\n-29970,\n-31334,\n-31334,\n-32162,\n-32162,\n-32440,\n-32440,\n-32162,\n-32162,\n-31334,\n-31334,\n-29970,\n-29970,\n-28094,\n-28094,\n-25736,\n-25736,\n-22938,\n-22938,\n-19748,\n-19748,\n-16220,\n-16220,\n-12414,\n-12414,\n-8396,\n-8396,\n-4234,\n-4234" }, { "path": "apps/factory/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += \\\n -Iutils/boot_struct \\\n -Iutils/intersyshci \\\n -Iutils/hwtimer_list \\\n -Iservices/bt_app \\\n -Iservices/nvrecord \\\n $(BT_IF_INCLUDES) \\\n -Iservices/resources \\\n -Iservices/overlay \\\n -Iservices/multimedia/algorithm/fft/include \\\n -Iapps/key \\\n -Iplatform/drivers/bt \\\n -Iplatform/drivers/ana \\\n\t-Iapps/battery \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n -Iutils/cqueue \\\n -Iservices/nv_section/factory_section \\\n -Iservices/app_ai/inc \\\n\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_app_factory_audio.o += -D__AUDIO_RESAMPLE__\nendif\nifeq ($(SW_CAPTURE_RESAMPLE),1)\nCFLAGS_app_factory_audio.o += -DSW_CAPTURE_RESAMPLE\nendif\n\nifeq ($(POWERKEY_I2C_SWITCH),1)\nCFLAGS_app_factory.o += -DPOWERKEY_I2C_SWITCH\nendif\n\nifeq ($(SPEECH_TX_AEC_CODEC_REF),1)\nCFLAGS_app_factory_audio.o += -DSPEECH_TX_AEC_CODEC_REF\nendif\n\n" }, { "path": "apps/factory/app_factory.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_factory.h\"\n#include \"app_bt_stream.h\"\n#include \"app_key.h\"\n#include \"app_media_player.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"cmsis_os.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_cmu.h\"\n#include \"hal_sleep.h\"\n#include \"hal_trace.h\"\n#include \"list.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \"pmu.h\"\n#include \"resources.h\"\n\n// for init\n#include \"app_battery.h\"\n#include \"app_key.h\"\n#include \"app_overlay.h\"\n#include \"app_pwl.h\"\n#include \"app_status_ind.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n\n// for bt\n#include \"app_bt.h\"\n#include \"app_factory_bt.h\"\n#include \"besbt.h\"\n\n// for audio\n#include \"app_audio.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n\n// for progress\n#include \"hal_uart.h\"\n#include \"tool_msg.h\"\n\n#include \"factory_section.h\"\n\n#ifdef __FACTORY_MODE_SUPPORT__\n\n#define APP_FACTORYMODE_RETRY_LIMITED (2)\n\ntypedef enum APP_FACTORYMODE_STATUS_INDICATION_T {\n APP_FACTORYMODE_STATUS_INDICATION_RUNNING = 0,\n APP_FACTORYMODE_STATUS_INDICATION_PASS,\n APP_FACTORYMODE_STATUS_INDICATION_FAILED,\n APP_FACTORYMODE_STATUS_INDICATION_INVALID,\n\n APP_FACTORYMODE_STATUS_INDICATION_NUM\n} APP_FACTORYMODE_STATUS_INDICATION_T;\n\nstatic void app_factorymode_timehandler(void const *param);\nvoid app_bt_key_shutdown(APP_KEY_STATUS *status, void *param);\nvoid app_factorymode_result_set(bool result);\n\nstatic osThreadId app_factorymode_tid = NULL;\nstatic struct message_t send_msg = {\n {\n PREFIX_CHAR,\n },\n};\nstatic unsigned char send_seq = 0;\n\nosTimerId app_factory_timer = NULL;\nosTimerDef(APP_FACTORY_TIMER, app_factorymode_timehandler);\n\nint app_factorymode_languageswitch_proc(void) {\n#ifdef MEDIA_PLAYER_SUPPORT\n int lan;\n int new_lan;\n struct nvrecord_env_t *nvrecord_env;\n\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n lan = app_play_audio_get_lang();\n new_lan = lan;\n app_play_audio_set_lang(new_lan);\n\n nv_record_env_get(&nvrecord_env);\n nvrecord_env->media_language.language = new_lan;\n nv_record_env_set(nvrecord_env);\n\n APP_FACTORY_TRACE(2, \"languages old:%d new:%d\", lan, new_lan);\n media_PlayAudio(AUD_ID_LANGUAGE_SWITCH, 0);\n#endif\n return 0;\n}\n\nvoid app_factorymode_languageswitch(APP_KEY_STATUS *status, void *param) {\n app_factorymode_languageswitch_proc();\n}\n\nvoid app_factorymode_enter(void) {\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_TEST_MODE |\n HAL_SW_BOOTMODE_TEST_SIGNALINGMODE);\n hal_cmu_sys_reboot();\n}\n\nextern \"C\" {\n\nstatic bool isInFactoryMode = false;\n\nbool app_factorymode_get(void) { return isInFactoryMode; }\n\nvoid app_factorymode_set(bool set) { isInFactoryMode = set; }\n}\n#ifdef POWERKEY_I2C_SWITCH\nvoid app_factorymode_i2c_switch(APP_KEY_STATUS *status, void *param) {\n static int i = 0;\n\n i++;\n if (i & 1) {\n TRACE(0, \"set analog i2c mode !!!\");\n osDelay(100);\n hal_iomux_set_analog_i2c();\n } else {\n hal_iomux_set_uart0();\n osDelay(100);\n TRACE(0, \"hal_iomux_set_uart0 !!!\");\n }\n}\n#endif\n\n#ifdef __IBRT_IBRT_TESTMODE__\nvoid bt_drv_ibrt_test_key_click(APP_KEY_STATUS *status, void *param);\nvoid bt_drv_ibrt_test_key_click(APP_KEY_STATUS *status, void *param) {\n btdrv_connect_ibrt_device(bt_addr);\n}\n#endif\n\nvoid app_factorymode_key_init(void) {\n const APP_KEY_HANDLE app_factorymode_handle_cfg[] = {\n#ifdef POWERKEY_I2C_SWITCH\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_RAMPAGECLICK},\n \"bt i2c key\",\n app_factorymode_i2c_switch,\n NULL},\n#endif\n#ifdef __POWERKEY_CTRL_ONOFF_ONLY__\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_UP},\n \"bt function key\",\n app_bt_key_shutdown,\n NULL},\n#else\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGLONGPRESS},\n \"bt function key\",\n app_bt_key_shutdown,\n NULL},\n#endif\n#ifdef __IBRT_IBRT_TESTMODE__\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK},\n \"bt function key\",\n bt_drv_ibrt_test_key_click,\n NULL},\n#else\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK},\n \"bt function key\",\n app_factorymode_languageswitch,\n NULL},\n#endif\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_DOUBLECLICK},\n \"bt function key\",\n app_factorymode_bt_xtalcalib,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGPRESS},\n \"bt function key\",\n app_factorymode_bt_signalingtest,\n NULL},\n };\n\n uint8_t i = 0;\n\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n\n app_key_handle_clear();\n for (i = 0; i < (sizeof(app_factorymode_handle_cfg) / sizeof(APP_KEY_HANDLE));\n i++) {\n app_key_handle_registration(&app_factorymode_handle_cfg[i]);\n }\n}\n\nstatic void app_factorymode_audioloopswitch(APP_KEY_STATUS *status,\n void *param) {\n static bool onaudioloop = false;\n\n onaudioloop = onaudioloop ? false : true;\n\n if (onaudioloop)\n app_audio_sendrequest(APP_FACTORYMODE_AUDIO_LOOP,\n (uint8_t)APP_BT_SETTING_OPEN, 0);\n else\n app_audio_sendrequest(APP_FACTORYMODE_AUDIO_LOOP,\n (uint8_t)APP_BT_SETTING_CLOSE, 0);\n}\n\nvoid app_factorymode_test_key_init(void) {\n const APP_KEY_HANDLE app_factorymode_handle_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK},\n \"bt function key\",\n app_factorymode_audioloopswitch,\n NULL},\n };\n\n uint8_t i = 0;\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n for (i = 0; i < (sizeof(app_factorymode_handle_cfg) / sizeof(APP_KEY_HANDLE));\n i++) {\n app_key_handle_registration(&app_factorymode_handle_cfg[i]);\n }\n}\n\nvoid app_factorymode_result_clean(void) {\n osSignalClear(app_factorymode_tid, 0x01);\n osSignalClear(app_factorymode_tid, 0x02);\n}\n\nvoid app_factorymode_result_set(bool result) {\n if (result)\n osSignalSet(app_factorymode_tid, 0x01);\n else\n osSignalSet(app_factorymode_tid, 0x02);\n}\n\nbool app_factorymode_result_wait(void) {\n bool nRet;\n osEvent evt;\n\n while (1) {\n // wait any signal\n evt = osSignalWait(0x0, osWaitForever);\n\n // get role from signal value\n if (evt.status == osEventSignal) {\n if (evt.value.signals & 0x01) {\n nRet = true;\n break;\n } else if (evt.value.signals & 0x02) {\n nRet = false;\n break;\n }\n }\n }\n return nRet;\n}\n\nstatic int app_factorymode_send_progress(uint8_t progress) {\n APP_MESSAGE_BLOCK msg;\n\n msg.mod_id = APP_MODUAL_OHTER;\n msg.msg_body.message_id = 2;\n msg.msg_body.message_Param0 = progress;\n app_mailbox_put(&msg);\n\n return 0;\n}\n\nstatic int app_factorymode_send_code(uint32_t progress) {\n APP_MESSAGE_BLOCK msg;\n\n msg.mod_id = APP_MODUAL_OHTER;\n msg.msg_body.message_id = 3;\n msg.msg_body.message_Param0 = progress;\n app_mailbox_put(&msg);\n\n return 0;\n}\n\nint app_factorymode_proc(void) {\n uint8_t cnt = 0;\n bool nRet;\n app_factorymode_tid = osThreadGetId();\n\n app_factorymode_send_progress(60);\n app_factorymode_bt_init_connect();\n\n do {\n app_factorymode_result_clean();\n app_factorymode_bt_create_connect();\n nRet = app_factorymode_result_wait();\n } while (!nRet && ++cnt < APP_FACTORYMODE_RETRY_LIMITED);\n\n if (!nRet)\n goto exit;\n app_factorymode_send_progress(90);\n app_factorymode_result_clean();\n if (!nRet)\n goto exit;\n app_factorymode_send_progress(100);\n osDelay(100);\nexit:\n app_factorymode_result_clean();\n if (nRet) {\n return 0;\n } else {\n return -1;\n }\n}\n\nstatic unsigned char app_factorymode_msg_check_sum(unsigned char *buf,\n unsigned char len) {\n int i;\n unsigned char sum = 0;\n\n for (i = 0; i < len; i++) {\n sum += buf[i];\n }\n\n return sum;\n}\n\nstatic int app_factorymode_msg_uart_send(const unsigned char *buf, size_t len) {\n uint32_t sent = 0;\n\n while (sent < len) {\n hal_uart_blocked_putc(HAL_UART_ID_0, buf[sent++]);\n }\n\n if (sent != len) {\n return 1;\n }\n\n return 0;\n}\n\nstatic int app_factorymode_msg_send_ping(void) {\n int ret;\n\n send_msg.hdr.type = 0x88;\n send_msg.hdr.seq = send_seq++;\n send_msg.hdr.len = 2;\n send_msg.data[0] = 0xaa;\n send_msg.data[1] = 0x55;\n send_msg.data[2] = ~app_factorymode_msg_check_sum(\n (unsigned char *)&send_msg, MSG_TOTAL_LEN(&send_msg) - 1);\n\n ret = app_factorymode_msg_uart_send((unsigned char *)&send_msg,\n MSG_TOTAL_LEN(&send_msg));\n\n return ret;\n}\n\nstatic int app_factorymode_msg_send_progress(uint8_t progress) {\n int ret;\n\n send_msg.hdr.type = 0x88;\n send_msg.hdr.seq = send_seq++;\n send_msg.hdr.len = 2;\n send_msg.data[0] = progress;\n send_msg.data[1] = 100;\n send_msg.data[2] = ~app_factorymode_msg_check_sum(\n (unsigned char *)&send_msg, MSG_TOTAL_LEN(&send_msg) - 1);\n\n ret = app_factorymode_msg_uart_send((unsigned char *)&send_msg,\n MSG_TOTAL_LEN(&send_msg));\n\n return ret;\n}\n\nstatic int app_factorymode_msg_send_32bitcode(uint32_t code) {\n int ret;\n\n send_msg.hdr.type = 0x88;\n send_msg.hdr.seq = send_seq++;\n send_msg.hdr.len = 4;\n send_msg.data[0] = 0xf2;\n *(uint32_t *)&(send_msg.data[1]) = code;\n send_msg.data[4] = ~app_factorymode_msg_check_sum(\n (unsigned char *)&send_msg, MSG_TOTAL_LEN(&send_msg) - 1);\n\n ret = app_factorymode_msg_uart_send((unsigned char *)&send_msg,\n MSG_TOTAL_LEN(&send_msg));\n\n return ret;\n}\n\nstatic int app_factorymode_process(APP_MESSAGE_BODY *msg_body) {\n if (msg_body->message_id == 1) {\n app_factorymode_msg_send_ping();\n }\n if (msg_body->message_id == 2) {\n app_factorymode_msg_send_progress(msg_body->message_Param0);\n }\n if (msg_body->message_id == 3) {\n app_factorymode_msg_send_32bitcode(msg_body->message_Param0);\n }\n return 0;\n}\n\nstatic int app_factorymode_uart_init(void) {\n struct HAL_UART_CFG_T uart_cfg;\n\n memset(&uart_cfg, 0, sizeof(struct HAL_UART_CFG_T));\n uart_cfg.parity = HAL_UART_PARITY_NONE, uart_cfg.stop = HAL_UART_STOP_BITS_1,\n uart_cfg.data = HAL_UART_DATA_BITS_8,\n uart_cfg.flow = HAL_UART_FLOW_CONTROL_NONE, // HAL_UART_FLOW_CONTROL_RTSCTS,\n uart_cfg.tx_level = HAL_UART_FIFO_LEVEL_1_2,\n uart_cfg.rx_level = HAL_UART_FIFO_LEVEL_1_4, uart_cfg.baud = 921600,\n uart_cfg.dma_rx = false, uart_cfg.dma_tx = false,\n uart_cfg.dma_rx_stop_on_err = false;\n hal_uart_close(HAL_UART_ID_0);\n hal_uart_open(HAL_UART_ID_0, &uart_cfg);\n\n return 0;\n}\n\nstatic void app_factorymode_timehandler(void const *param) {\n APP_MESSAGE_BLOCK msg;\n\n msg.mod_id = APP_MODUAL_OHTER;\n msg.msg_body.message_id = 1;\n app_mailbox_put(&msg);\n}\n\nstatic uint8_t app_factorymode_indication_init(void) {\n struct APP_PWL_CFG_T cfg;\n\n memset(&cfg, 0, sizeof(struct APP_PWL_CFG_T));\n app_pwl_open();\n app_pwl_setup(APP_PWL_ID_0, &cfg);\n app_pwl_setup(APP_PWL_ID_1, &cfg);\n return 0;\n}\n\nstatic uint8_t\napp_factorymode_status_indication(APP_FACTORYMODE_STATUS_INDICATION_T status) {\n struct APP_PWL_CFG_T cfg0;\n struct APP_PWL_CFG_T cfg1;\n APP_FACTORY_TRACE(2, \"%s %d\", __func__, status);\n memset(&cfg0, 0, sizeof(struct APP_PWL_CFG_T));\n memset(&cfg1, 0, sizeof(struct APP_PWL_CFG_T));\n app_pwl_stop(APP_PWL_ID_0);\n app_pwl_stop(APP_PWL_ID_1);\n switch (status) {\n case APP_FACTORYMODE_STATUS_INDICATION_RUNNING:\n cfg0.part[0].level = 0;\n cfg0.part[0].time = (300);\n cfg0.part[1].level = 1;\n cfg0.part[1].time = (300);\n cfg0.parttotal = 2;\n cfg0.startlevel = 0;\n cfg0.periodic = true;\n\n cfg1.part[0].level = 1;\n cfg1.part[0].time = (300);\n cfg1.part[1].level = 0;\n cfg1.part[1].time = (300);\n cfg1.parttotal = 2;\n cfg1.startlevel = 1;\n cfg1.periodic = true;\n\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n break;\n case APP_FACTORYMODE_STATUS_INDICATION_PASS:\n cfg0.part[0].level = 1;\n cfg0.part[0].time = (5000);\n cfg0.parttotal = 1;\n cfg0.startlevel = 1;\n cfg0.periodic = false;\n\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n break;\n case APP_FACTORYMODE_STATUS_INDICATION_FAILED:\n cfg1.part[0].level = 1;\n cfg1.part[0].time = (5000);\n cfg1.parttotal = 1;\n cfg1.startlevel = 1;\n cfg1.periodic = false;\n\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n\n break;\n\n default:\n break;\n }\n return 0;\n}\n\nint app_factorymode_init(uint32_t factorymode) {\n uint8_t cnt = 0;\n int nRet = 0;\n uint32_t capval = 0x00;\n struct nvrecord_env_t *nvrecord_env;\n APP_FACTORY_TRACE(1, \"app_factorymode_init mode:%x\\n\", factorymode);\n\n osThreadSetPriority(osThreadGetId(), osPriorityRealtime);\n app_factorymode_uart_init();\n#ifdef __WATCHER_DOG_RESET__\n app_wdt_open(60);\n#endif\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_52M);\n list_init();\n app_os_init();\n app_factorymode_indication_init();\n app_battery_open();\n if (app_key_open(false)) {\n nRet = -1;\n goto exit;\n }\n app_set_threadhandle(APP_MODUAL_OHTER, app_factorymode_process);\n app_factory_timer =\n osTimerCreate(osTimer(APP_FACTORY_TIMER), osTimerPeriodic, NULL);\n osTimerStart(app_factory_timer, 300);\n app_factorymode_send_progress(10);\n\n app_bt_init();\n af_open();\n app_audio_open();\n app_overlay_open();\n\n nv_record_env_init();\n nvrec_dev_data_open();\n nv_record_env_get(&nvrecord_env);\n#ifdef MEDIA_PLAYER_SUPPORT\n app_play_audio_set_lang(nvrecord_env->media_language.language);\n app_voice_report(APP_STATUS_INDICATION_POWERON, 0);\n#endif\n app_status_indication_set(APP_STATUS_INDICATION_POWERON);\n app_factorymode_status_indication(APP_FACTORYMODE_STATUS_INDICATION_RUNNING);\n\n if (factorymode & HAL_SW_BOOTMODE_CALIB) {\n btdrv_start_bt();\n app_factorymode_send_progress(20);\n\n do {\n nRet = app_factorymode_bt_xtalcalib_proc();\n } while (nRet && cnt++ < APP_FACTORYMODE_RETRY_LIMITED);\n\n if (nRet)\n goto err;\n osDelay(200);\n app_factorymode_send_progress(30);\n }\n\n nvrec_dev_get_xtal_fcap((unsigned int *)&capval);\n app_factorymode_send_code(capval);\n\n btdrv_start_bt();\n bt_drv_reg_op_key_gen_after_reset(false);\n app_factorymode_send_progress(40);\n BesbtInit();\n osDelay(600);\n\n nRet = app_factorymode_proc();\n if (nRet)\n goto err;\n\n app_factorymode_test_key_init();\n // osTimerStop(app_factory_timer);\n app_factorymode_status_indication(APP_FACTORYMODE_STATUS_INDICATION_PASS);\n\n // wait forever\n osSignalWait(0x01, osWaitForever);\n goto exit;\n\nerr:\n osTimerStop(app_factory_timer);\n app_factorymode_status_indication(APP_FACTORYMODE_STATUS_INDICATION_FAILED);\n app_factorymode_send_code(0xff);\n osSignalWait(0x01, osWaitForever);\nexit:\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n pmu_shutdown();\n return nRet;\n}\n\nint app_factorymode_calib_only(void) {\n uint8_t cnt = 0;\n int nRet = 0;\n uint32_t capval = 0x00;\n\n app_factorymode_uart_init();\n#ifdef __WATCHER_DOG_RESET__\n app_wdt_reopen(60);\n#endif\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_52M);\n list_init();\n app_os_init();\n nv_record_env_init();\n nvrec_dev_data_open();\n factory_section_open();\n app_factorymode_indication_init();\n\n app_set_threadhandle(APP_MODUAL_OHTER, app_factorymode_process);\n app_factory_timer =\n osTimerCreate(osTimer(APP_FACTORY_TIMER), osTimerPeriodic, NULL);\n osTimerStart(app_factory_timer, 300);\n app_factorymode_status_indication(APP_FACTORYMODE_STATUS_INDICATION_RUNNING);\n app_factorymode_send_progress(10);\n btdrv_start_bt();\n osDelay(20);\n app_factorymode_send_progress(20);\n do {\n nRet = app_factorymode_bt_xtalcalib_proc();\n } while (nRet && ++cnt < APP_FACTORYMODE_RETRY_LIMITED);\n if (nRet)\n goto err;\n\n nvrec_dev_get_xtal_fcap((unsigned int *)&capval);\n app_factorymode_send_code(capval);\n\n app_factorymode_send_progress(50);\n osDelay(200);\n app_factorymode_send_progress(80);\n osDelay(100);\n app_factorymode_send_progress(100);\n app_factorymode_status_indication(APP_FACTORYMODE_STATUS_INDICATION_PASS);\n osSignalWait(0x01, osWaitForever);\n goto exit;\n\nerr:\n osTimerStop(app_factory_timer);\n app_factorymode_status_indication(APP_FACTORYMODE_STATUS_INDICATION_FAILED);\n app_factorymode_send_code(0xff);\n osSignalWait(0x01, osWaitForever);\nexit:\n\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n pmu_shutdown();\n return nRet;\n}\n\n#ifdef __USB_COMM__\n// for usb\n#include \"hal_timer.h\"\n#include \"hwtimer_list.h\"\n#include \"usb_cdc.h\"\n\n#include \"app_factory_cdc_comm.h\"\n#include \"hal_usb.h\"\n#include \"sys_api_cdc_comm.h\"\n\nstatic const struct USB_SERIAL_CFG_T cdc_cfg = {\n .mode = USB_SERIAL_API_NONBLOCKING,\n};\n\nstatic void usb_serial_recv_timeout(void *param) { usb_serial_cancel_recv(); }\n\nint app_factorymode_cdc_comm(void) {\n HWTIMER_ID timer;\n pmu_usb_config(PMU_USB_CONFIG_TYPE_DEVICE);\n usb_serial_open(&cdc_cfg);\n osDelay(500);\n\n hwtimer_init();\n timer = hwtimer_alloc(usb_serial_recv_timeout, NULL);\n ASSERT(timer, \"Failed to alloc usb serial recv timer\");\n\n usb_serial_flush_recv_buffer();\n usb_serial_init_xfer();\n af_open();\n\n comm_loop();\n return 1;\n}\n#endif\n#endif\n" }, { "path": "apps/factory/app_factory.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_FACTORY_H__\n#define __APP_FACTORY_H__\n#include \n#include \n#include \"plat_types.h\"\n#define APP_FACTORY_TRACE(s, ...) TRACE(s, ##__VA_ARGS__)\n\nvoid app_factorymode_result_set(bool result);\n\nvoid app_factorymode_result_clean(void);\n\nbool app_factorymode_result_wait(void);\n\nvoid app_factorymode_enter(void);\n\nvoid app_factorymode_key_init(void);\n\nint app_factorymode_init(uint32_t factorymode);\n\nint app_factorymode_calib_only(void);\n\nint app_factorymode_languageswitch_proc(void);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef __USB_COMM__\nint app_factorymode_cdc_comm(void);\n#endif\n\nbool app_factorymode_get(void);\n\nvoid app_factorymode_set(bool set);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "apps/factory/app_factory_audio.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_bt_stream.h\"\n#include \"app_factory.h\"\n#include \"app_media_player.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"resources.h\"\n#include \"string.h\"\n\n// for audio\n#include \"app_audio.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n\n#include \"app_factory_audio.h\"\n\n#ifdef __FACTORY_MODE_SUPPORT__\n\n#define BT_AUDIO_FACTORMODE_BUFF_SIZE (1024 * 2)\nstatic enum APP_AUDIO_CACHE_T a2dp_cache_status = APP_AUDIO_CACHE_QTY;\nstatic int16_t *app_audioloop_play_cache = NULL;\n\nstatic uint32_t app_factorymode_data_come(uint8_t *buf, uint32_t len) {\n DUMP16(\"%d,\", (int *)buf, 30);\n\n app_audio_pcmbuff_put(buf, len);\n if (a2dp_cache_status == APP_AUDIO_CACHE_QTY) {\n a2dp_cache_status = APP_AUDIO_CACHE_OK;\n }\n return len;\n}\n\nstatic uint32_t app_factorymode_more_data(uint8_t *buf, uint32_t len) {\n if (a2dp_cache_status != APP_AUDIO_CACHE_QTY) {\n app_audio_pcmbuff_get((uint8_t *)app_audioloop_play_cache, len / 2);\n app_bt_stream_copy_track_one_to_two_16bits(\n (int16_t *)buf, app_audioloop_play_cache, len / 2 / 2);\n }\n return len;\n}\n\nint app_factorymode_audioloop(bool on, enum APP_SYSFREQ_FREQ_T freq) {\n uint8_t *buff_play = NULL;\n uint8_t *buff_capture = NULL;\n uint8_t *buff_loop = NULL;\n struct AF_STREAM_CONFIG_T stream_cfg;\n static bool isRun = false;\n APP_FACTORY_TRACE(3, \"app_factorymode_audioloop work:%d op:%d freq:%d\", isRun,\n on, freq);\n\n if (isRun == on)\n return 0;\n\n if (on) {\n if (freq < APP_SYSFREQ_52M) {\n freq = APP_SYSFREQ_52M;\n }\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, freq);\n\n a2dp_cache_status = APP_AUDIO_CACHE_QTY;\n app_audio_mempool_init();\n app_audio_mempool_get_buff(&buff_capture, BT_AUDIO_FACTORMODE_BUFF_SIZE);\n app_audio_mempool_get_buff(&buff_play, BT_AUDIO_FACTORMODE_BUFF_SIZE * 2);\n app_audio_mempool_get_buff((uint8_t **)&app_audioloop_play_cache,\n BT_AUDIO_FACTORMODE_BUFF_SIZE * 2 / 2 / 2);\n app_audio_mempool_get_buff(&buff_loop, BT_AUDIO_FACTORMODE_BUFF_SIZE << 2);\n app_audio_pcmbuff_init(buff_loop, BT_AUDIO_FACTORMODE_BUFF_SIZE << 2);\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n stream_cfg.bits = AUD_BITS_16;\n // stream_cfg.channel_num = AUD_CHANNEL_NUM_1;\n\n#ifdef SPEECH_TX_AEC_CODEC_REF\n stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n#else\n stream_cfg.channel_num = AUD_CHANNEL_NUM_1;\n#endif\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_CAPTURE_RESAMPLE)\n stream_cfg.sample_rate = AUD_SAMPRATE_8463;\n#else\n stream_cfg.sample_rate = AUD_SAMPRATE_8000;\n#endif\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.vol = TGT_VOLUME_LEVEL_15;\n stream_cfg.io_path = AUD_INPUT_PATH_MAINMIC;\n stream_cfg.handler = app_factorymode_data_come;\n\n stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(buff_capture);\n stream_cfg.data_size = BT_AUDIO_FACTORMODE_BUFF_SIZE;\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n\n stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n stream_cfg.handler = app_factorymode_more_data;\n\n stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(buff_play);\n stream_cfg.data_size = BT_AUDIO_FACTORMODE_BUFF_SIZE * 2;\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n APP_FACTORY_TRACE(0, \"app_factorymode_audioloop on\");\n } else {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n APP_FACTORY_TRACE(0, \"app_factorymode_audioloop off\");\n\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n }\n\n isRun = on;\n return 0;\n}\n\nint app_factorymode_output_pcmpatten(audio_test_pcmpatten_t *pcmpatten,\n uint8_t *buf, uint32_t len) {\n uint32_t remain_size = len;\n uint32_t curr_size = 0;\n\n if (remain_size > pcmpatten->len) {\n do {\n if (pcmpatten->cuur_buf_pos) {\n curr_size = pcmpatten->len - pcmpatten->cuur_buf_pos;\n memcpy(buf, &(pcmpatten->buf[pcmpatten->cuur_buf_pos / 2]), curr_size);\n remain_size -= curr_size;\n pcmpatten->cuur_buf_pos = 0;\n } else if (remain_size > pcmpatten->len) {\n memcpy(buf + curr_size, pcmpatten->buf, pcmpatten->len);\n curr_size += pcmpatten->len;\n remain_size -= pcmpatten->len;\n } else {\n memcpy(buf + curr_size, pcmpatten->buf, remain_size);\n pcmpatten->cuur_buf_pos = remain_size;\n remain_size = 0;\n }\n } while (remain_size);\n } else {\n if ((pcmpatten->len - pcmpatten->cuur_buf_pos) >= len) {\n memcpy(buf, &(pcmpatten->buf[pcmpatten->cuur_buf_pos / 2]), len);\n pcmpatten->cuur_buf_pos += len;\n } else {\n curr_size = pcmpatten->len - pcmpatten->cuur_buf_pos;\n memcpy(buf, &(pcmpatten->buf[pcmpatten->cuur_buf_pos / 2]), curr_size);\n pcmpatten->cuur_buf_pos = len - curr_size;\n memcpy(buf + curr_size, pcmpatten->buf, pcmpatten->cuur_buf_pos);\n }\n }\n\n return 0;\n}\n\n#include \"fft128dot.h\"\n\n#define N 64\n#define NFFT 128\n\nstruct mic_st_t {\n FftTwiddle_t w[N];\n FftTwiddle_t w128[N * 2];\n FftData_t x[N * 2];\n FftData_t data_odd[N];\n FftData_t data_even[N];\n FftData_t data_odd_d[N];\n FftData_t data_even_d[N];\n FftData_t data[N * 2];\n signed long out[N];\n};\n\nint app_factorymode_mic_cancellation_run(void *mic_st, signed short *inbuf,\n int sample) {\n struct mic_st_t *st = (struct mic_st_t *)mic_st;\n int i, k, jj, ii;\n // int dataWidth = 16; // input word format is 16 bit twos complement\n // fractional format 1.15\n int twiddleWidth =\n 16; // input word format is 16 bit twos complement fractional format 2.14\n FftMode_t ifft = FFT_MODE;\n\n make_symmetric_twiddles(st->w, N, twiddleWidth);\n make_symmetric_twiddles(st->w128, N * 2, twiddleWidth);\n // input data\n for (i = 0; i < sample; i++) {\n st->x[i].re = inbuf[i];\n st->x[i].im = 0;\n }\n\n for (ii = 0; ii < 1; ii++) {\n k = 0;\n for (jj = 0; jj < N * 2; jj += 2) {\n FftData_t tmp;\n\n tmp.re = st->x[jj].re;\n tmp.im = st->x[jj].im;\n\n st->data_even[k].re =\n tmp.re; //(int) (double(tmp.re)*double(1 << FFTR4_INPUT_FORMAT_Y)) ;\n st->data_even[k].im =\n tmp.im; //(int) (double(tmp.im)*double(1 << FFTR4_INPUT_FORMAT_Y)) ;\n tmp.re = st->x[jj + 1].re;\n tmp.im = st->x[jj + 1].im;\n st->data_odd[k].re =\n tmp.re; //(int) (double(tmp.re)*double(1 << FFTR4_INPUT_FORMAT_Y)) ;\n st->data_odd[k].im =\n tmp.im; //(int) (double(tmp.im)*double(1 << FFTR4_INPUT_FORMAT_Y)) ;\n k++;\n }\n\n fftr4(NFFT / 2, st->data_even, st->w, FFTR4_TWIDDLE_WIDTH, FFTR4_DATA_WIDTH,\n ifft);\n fftr4(NFFT / 2, st->data_odd, st->w, FFTR4_TWIDDLE_WIDTH, FFTR4_DATA_WIDTH,\n ifft);\n\n for (jj = 0; jj < NFFT / 2; jj++) {\n\n int idx = dibit_reverse_int(jj, NFFT / 2);\n st->data_even_d[jj].re = st->data_even[idx].re;\n st->data_even_d[jj].im = st->data_even[idx].im;\n st->data_odd_d[jj].re = st->data_odd[idx].re;\n st->data_odd_d[jj].im = st->data_odd[idx].im;\n }\n for (jj = 0; jj < NFFT / 2; jj++) {\n long long mbr, mbi;\n FftData_t ta;\n FftData_t tmp;\n double a;\n mbr = (long long)(st->data_odd_d[jj].re) * st->w128[jj].re -\n (long long)(st->data_odd_d[jj].im) * st->w128[jj].im;\n mbi = (long long)(st->data_odd_d[jj].im) * st->w128[jj].re +\n (long long)(st->data_odd_d[jj].re) * st->w128[jj].im;\n ta.re = int(mbr >> (FFTR4_TWIDDLE_WIDTH - 2));\n ta.im = int(mbi >> (FFTR4_TWIDDLE_WIDTH - 2));\n st->data[jj].re = (st->data_even_d[jj].re + ta.re) / 2;\n st->data[jj].im = (st->data_even_d[jj].im + ta.im) / 2;\n // data[jj] = sat(data[jj],FFTR4_DATA_WIDTH);\n st->data[jj + NFFT / 2].re = (st->data_even_d[jj].re - ta.re) / 2;\n st->data[jj + NFFT / 2].im = (st->data_even_d[jj].im - ta.im) / 2;\n // data[jj+NFFT/2] = sat(data[jj+NFFT/2],FFTR4_DATA_WIDTH);\n\n a = st->data[jj].re; /// double(1 << FFTR4_OUTPUT_FORMAT_Y);// * double(1\n /// << FFTR4_SCALE);\n tmp.re = (int)a;\n a = st->data[jj].im; /// double(1 << FFTR4_OUTPUT_FORMAT_Y);// * double(1\n /// << FFTR4_SCALE);\n tmp.im = (int)a;\n st->x[ii * NFFT + jj].re = (int)tmp.re;\n st->x[ii * NFFT + jj].im = (int)tmp.im;\n a = st->data[jj + NFFT / 2].re; /// double(1 << FFTR4_OUTPUT_FORMAT_Y);//\n /// * double(1 << FFTR4_SCALE);\n tmp.re = (int)a;\n a = st->data[jj + NFFT / 2].im; /// double(1 << FFTR4_OUTPUT_FORMAT_Y);//\n /// * double(1 << FFTR4_SCALE);\n tmp.im = (int)a;\n st->x[ii * NFFT + jj + NFFT / 2].re = (int)tmp.re;\n st->x[ii * NFFT + jj + NFFT / 2].im = (int)tmp.im;\n }\n }\n\n for (i = 0; i < N; i++) {\n st->out[i] = st->x[i].re * st->x[i].re + st->x[i].im * st->x[i].im;\n }\n\n return 0;\n}\n\nvoid *app_factorymode_mic_cancellation_init(void *(*alloc_ext)(int)) {\n struct mic_st_t *mic_st;\n mic_st = (struct mic_st_t *)alloc_ext(sizeof(struct mic_st_t));\n return (void *)mic_st;\n}\n\n#endif\n" }, { "path": "apps/factory/app_factory_audio.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_FACTORY_BT_H__\n#define __APP_FACTORY__BTH__\n\n#include \"app_utils.h\"\n\ntypedef struct {\n uint16_t *buf;\n uint32_t len;\n uint32_t cuur_buf_pos;\n}audio_test_pcmpatten_t;\n\nint app_factorymode_audioloop(bool on, enum APP_SYSFREQ_FREQ_T freq);\n\nint app_factorymode_output_pcmpatten(audio_test_pcmpatten_t *pcmpatten, uint8_t *buf, uint32_t len);\n\nint app_factorymode_mic_cancellation_run(void * mic_st, signed short *inbuf, int sample);\n\nvoid *app_factorymode_mic_cancellation_init(void* (* alloc_ext)(int));\n\n#endif\n" }, { "path": "apps/factory/app_factory_bt.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_factory_bt.h\"\n#include \"app_battery.h\"\n#include \"app_factory.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"cmsis_os.h\"\n#include \"conmgr_api.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_chipid.h\"\n#include \"hal_sleep.h\"\n#include \"hal_trace.h\"\n#include \"intersyshci.h\"\n#include \"me_api.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"pmu.h\"\n#include \"tgt_hardware.h\"\n\n#define APP_FACT_CPU_WAKE_LOCK HAL_CPU_WAKE_LOCK_USER_3\n\n#ifdef __FACTORY_MODE_SUPPORT__\nstatic uint8_t inquiry_buff[] = {0x01, 0x72, 0x77, 0xb0, 0x18, 0x57, 0x60, 0x01,\n 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0x00};\n\nstatic btif_cmgr_handler_t *app_factorymode_cmgrHandler;\n\nstatic void bt_error_check_timer_handler(void const *param);\nosTimerDef(bt_error_check_timer, bt_error_check_timer_handler);\nstatic osTimerId bt_error_check_timer_id = NULL;\nuint8_t test_mode_type = 0;\nstatic void bt_error_check_timer_handler(void const *param) {\n // dump rssi\n bt_drv_rssi_dump_handler();\n // check BT core status\n if (bt_drv_error_check_handler()) {\n if (test_mode_type == 1) {\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_TEST_MODE |\n HAL_SW_BOOTMODE_TEST_SIGNALINGMODE);\n } else if (test_mode_type == 2) {\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_TEST_MODE |\n HAL_SW_BOOTMODE_TEST_NOSIGNALINGMODE);\n }\n hal_cmu_sys_reboot();\n }\n}\n\nstatic void app_factorymode_bt_inquiry_buff_update(void) {\n bt_bdaddr_t flsh_dongle_addr;\n int ret = -1;\n\n ret = nvrec_dev_get_dongleaddr(&flsh_dongle_addr);\n if (0 == ret) {\n memcpy((void *)&inquiry_buff[1], (void *)flsh_dongle_addr.address,\n BTIF_BD_ADDR_SIZE);\n DUMP8(\"0x%02x \", &inquiry_buff[2], BTIF_BD_ADDR_SIZE);\n }\n}\n\nstatic void app_factorymode_CmgrCallback(btif_cmgr_handler_t *cHandler,\n cmgr_event_t Event,\n bt_status_t Status) {\n APP_FACTORY_TRACE(4, \"%s cHandler:%p Event:%d status:%d\", __func__, cHandler,\n Event, Status);\n if (Event == BTIF_CMEVENT_DATA_LINK_CON_CNF) {\n if (Status == BT_STS_SUCCESS) {\n APP_FACTORY_TRACE(0, \"connect ok\");\n app_factorymode_result_set(true);\n btif_cmgr_remove_data_link(cHandler);\n\n } else {\n APP_FACTORY_TRACE(0, \"connect failed\");\n app_factorymode_result_set(false);\n }\n }\n\n if (Event == BTIF_CMEVENT_DATA_LINK_DIS) {\n if (Status == BT_STS_SUCCESS) {\n APP_FACTORY_TRACE(0, \"disconnect ok\");\n } else {\n APP_FACTORY_TRACE(0, \"disconnect failed\");\n }\n }\n}\n\nstatic void app_factorymode_bt_InquiryResult_add(void) {\n U8 len = 15;\n bool rssi = false, extended = false;\n U8 *parm = (U8 *)inquiry_buff;\n\n /* Found one or more devices. Report to clients */\n APP_FACTORY_TRACE(4, \"%s len:%d rssi:%d extended:%d\", __func__, len, rssi,\n extended);\n DUMP8(\"0x%02x \", parm, len);\n btif_me_inquiry_result_setup(parm, rssi, extended);\n}\n\nvoid app_factorymode_bt_create_connect(void) {\n bt_status_t status;\n bt_bdaddr_t *bdAddr = (bt_bdaddr_t *)(inquiry_buff + 1);\n\n status = btif_cmgr_create_data_link(app_factorymode_cmgrHandler, bdAddr);\n APP_FACTORY_TRACE(2, \"%s:%d\", __func__, status);\n}\n\nvoid app_factorymode_bt_init_connect(void) {\n app_factorymode_cmgrHandler = btif_cmgr_handler_create();\n\n btif_cmgr_register_handler(app_factorymode_cmgrHandler,\n app_factorymode_CmgrCallback);\n app_factorymode_bt_inquiry_buff_update();\n app_factorymode_bt_InquiryResult_add();\n}\n\nextern osTimerId app_bt_accessmode_timer;\n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n#define XTAL_FCAP_RANGE (0x1FF)\n#else\n#define XTAL_FCAP_RANGE (0xFF)\n#endif\n\nvoid app_factorymode_bt_xtalrangetest(APP_KEY_STATUS *status, void *param) {\n dev_addr_name devinfo;\n uint32_t fcap = 0;\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n#ifdef __WATCHER_DOG_RESET__\n app_wdt_close();\n#endif\n hal_cpu_wake_lock(APP_FACT_CPU_WAKE_LOCK);\n app_stop_10_second_timer(APP_PAIR_TIMER_ID);\n app_stop_10_second_timer(APP_POWEROFF_TIMER_ID);\n if (app_bt_accessmode_timer) {\n osTimerStop(app_bt_accessmode_timer);\n }\n if (!bt_error_check_timer_id) {\n bt_error_check_timer_id =\n osTimerCreate(osTimer(bt_error_check_timer), osTimerPeriodic, NULL);\n }\n if (bt_error_check_timer_id != NULL) {\n osTimerStart(bt_error_check_timer_id, 1000);\n }\n test_mode_type = 1;\n app_status_indication_set(APP_STATUS_INDICATION_TESTMODE);\n pmu_sleep_en(0);\n BESHCI_Close();\n btdrv_hciopen();\n btdrv_hci_reset();\n\n#ifndef BT_50_FUNCTION\n btdrv_sleep_config(0);\n osDelay(2000);\n btdrv_ins_patch_test_init();\n btdrv_feature_default();\n#endif\n devinfo.btd_addr = bt_addr;\n devinfo.ble_addr = ble_addr;\n devinfo.localname = BT_LOCAL_NAME;\n nvrec_dev_localname_addr_init(&devinfo);\n btdrv_write_localinfo((char *)devinfo.localname,\n strlen(devinfo.localname) + 1, devinfo.btd_addr);\n\n btdrv_vco_test_start(78);\n while (1) {\n btdrv_rf_set_xtal_fcap(fcap % XTAL_FCAP_RANGE, 1);\n osDelay(300);\n TRACE(2, \"xtal tune:%d\", fcap % XTAL_FCAP_RANGE);\n fcap++;\n }\n}\n\nvoid app_factorymode_bt_signalingtest(APP_KEY_STATUS *status, void *param) {\n dev_addr_name devinfo;\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n#ifdef __WATCHER_DOG_RESET__\n app_wdt_close();\n#endif\n hal_cpu_wake_lock(APP_FACT_CPU_WAKE_LOCK);\n app_stop_10_second_timer(APP_PAIR_TIMER_ID);\n app_stop_10_second_timer(APP_POWEROFF_TIMER_ID);\n if (app_bt_accessmode_timer) {\n osTimerStop(app_bt_accessmode_timer);\n }\n if (!bt_error_check_timer_id) {\n bt_error_check_timer_id =\n osTimerCreate(osTimer(bt_error_check_timer), osTimerPeriodic, NULL);\n }\n if (bt_error_check_timer_id != NULL) {\n osTimerStart(bt_error_check_timer_id, 1000);\n }\n test_mode_type = 1;\n app_status_indication_set(APP_STATUS_INDICATION_TESTMODE);\n pmu_sleep_en(0);\n BESHCI_Close();\n btdrv_hciopen();\n btdrv_ins_patch_test_init();\n btdrv_hci_reset();\n\n#ifndef BT_50_FUNCTION\n btdrv_sleep_config(0);\n osDelay(2000);\n btdrv_testmode_start();\n btdrv_feature_default();\n#endif\n devinfo.btd_addr = bt_addr;\n devinfo.ble_addr = ble_addr;\n devinfo.localname = BT_LOCAL_NAME;\n devinfo.ble_name = BT_LOCAL_NAME;\n nvrec_dev_localname_addr_init(&devinfo);\n#ifdef __IBRT_IBRT_TESTMODE__\n uint8_t ibrt_address[6] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66};\n memcpy(bt_addr, ibrt_address, 6);\n memcpy(devinfo.btd_addr, ibrt_address, 6);\n#endif\n btdrv_write_localinfo((char *)devinfo.localname,\n strlen(devinfo.localname) + 1, devinfo.btd_addr);\n bt_drv_extra_config_after_init();\n btdrv_enable_dut();\n#ifdef __IBRT_IBRT_TESTMODE__\n btdrv_enable_ibrt_test();\n#endif\n}\n\nint app_battery_stop(void);\nvoid app_factorymode_bt_nosignalingtest(APP_KEY_STATUS *status, void *param) {\n dev_addr_name devinfo;\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n#ifdef __WATCHER_DOG_RESET__\n app_wdt_close();\n#endif\n hal_cpu_wake_lock(APP_FACT_CPU_WAKE_LOCK);\n app_stop_10_second_timer(APP_PAIR_TIMER_ID);\n app_stop_10_second_timer(APP_POWEROFF_TIMER_ID);\n app_status_indication_set(APP_STATUS_INDICATION_TESTMODE1);\n osTimerStop(app_bt_accessmode_timer);\n if (!bt_error_check_timer_id) {\n bt_error_check_timer_id =\n osTimerCreate(osTimer(bt_error_check_timer), osTimerPeriodic, NULL);\n }\n if (bt_error_check_timer_id != NULL) {\n osTimerStart(bt_error_check_timer_id, 1000);\n }\n test_mode_type = 2;\n app_battery_stop();\n pmu_sleep_en(0);\n BESHCI_Close();\n btdrv_hciopen();\n btdrv_ins_patch_test_init();\n bt_drv_reg_op_key_gen_after_reset(false);\n btdrv_hci_reset();\n#ifndef BT_50_FUNCTION\n btdrv_sleep_config(0);\n#endif\n osDelay(2000);\n btdrv_testmode_start();\n#ifndef BT_50_FUNCTION\n btdrv_feature_default();\n devinfo.btd_addr = bt_addr;\n devinfo.ble_addr = ble_addr;\n devinfo.localname = BT_LOCAL_NAME;\n devinfo.ble_name = BT_LOCAL_NAME;\n nvrec_dev_localname_addr_init(&devinfo);\n btdrv_write_localinfo((char *)devinfo.localname,\n strlen(devinfo.localname) + 1, devinfo.btd_addr);\n#endif\n bt_drv_extra_config_after_init();\n btdrv_hcioff();\n#ifdef __BT_DEBUG_TPORTS__\n {\n extern void bt_enable_tports(void);\n bt_enable_tports();\n // hal_iomux_tportopen();\n }\n#endif\n btdrv_uart_bridge_loop();\n}\nint app_factorymode_bt_xtalcalib_proc(void) {\n uint32_t capval = 0x80;\n int nRet;\n\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n hal_cpu_wake_lock(APP_FACT_CPU_WAKE_LOCK);\n APP_FACTORY_TRACE(1, \"calib default, capval:%d\", capval);\n btdrv_hciopen();\n btdrv_hci_reset();\n#ifndef BT_50_FUNCTION\n btdrv_ins_patch_test_init();\n#endif\n btdrv_hcioff();\n capval = 0x80;\n bt_drv_calib_open();\n nRet = bt_drv_calib_result_porc(&capval);\n bt_drv_calib_close();\n TRACE(2, \"!!!!!!!!!!!!!!!!!!!!!!!!!!!calib ret:%d, capval:%d\", nRet, capval);\n if (!nRet)\n nvrec_dev_set_xtal_fcap((unsigned int)capval);\n\n return nRet;\n}\n\nvoid app_factorymode_bt_xtalcalib(APP_KEY_STATUS *status, void *param) {\n APP_FACTORY_TRACE(1, \"%s\", __func__);\n app_factorymode_bt_xtalcalib_proc();\n}\n\n#endif\n" }, { "path": "apps/factory/app_factory_bt.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_FACTORY_BT_H__\n#define __APP_FACTORY__BTH__\n\n#include \"app_key.h\"\n\n\nvoid app_factorymode_bt_create_connect(void);\n\nvoid app_factorymode_bt_init_connect(void);\n\nint app_factorymode_bt_xtalcalib_proc(void);\n\nvoid app_factorymode_bt_xtalrangetest(APP_KEY_STATUS *status, void *param);\n\nvoid app_factorymode_bt_signalingtest(APP_KEY_STATUS *status, void *param);\n\nvoid app_factorymode_bt_nosignalingtest(APP_KEY_STATUS *status, void *param);\n\nvoid app_factorymode_bt_xtalcalib(APP_KEY_STATUS *status, void *param);\n\n#endif\n" }, { "path": "apps/factory/app_factory_cdc_comm.c", "content": "#ifdef __USB_COMM__\n#include \"app_factory_cdc_comm.h\"\n#include \"plat_types.h\"\n#include \"stdbool.h\"\n#include \"stdint.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n#include \"sys_api_cdc_comm.h\"\n#include \"tool_msg.h\"\n\nstatic enum PARSE_STATE parse_state;\nstatic struct message_t recv_msg;\nstatic struct message_t send_msg = {\n {\n PREFIX_CHAR,\n },\n};\n\nstatic unsigned char check_sum(unsigned char *buf, unsigned char len) {\n int i;\n unsigned char sum = 0;\n\n for (i = 0; i < len; i++) {\n sum += buf[i];\n }\n\n return sum;\n}\n\nint send_reply(const unsigned char *payload, unsigned int len) {\n int ret = 0;\n\n if (len + 1 > sizeof(send_msg.data)) {\n TRACE(1, \"Packet length too long: %u\", len);\n return -1;\n }\n\n send_msg.hdr.type = recv_msg.hdr.type;\n send_msg.hdr.seq = recv_msg.hdr.seq;\n send_msg.hdr.len = len;\n memcpy(&send_msg.data[0], payload, len);\n send_msg.data[len] =\n ~check_sum((unsigned char *)&send_msg, MSG_TOTAL_LEN(&send_msg) - 1);\n\n ret = send_data((unsigned char *)&send_msg, MSG_TOTAL_LEN(&send_msg));\n\n return ret;\n}\n\nstatic void reset_parse_state(unsigned char **buf, size_t *len) {\n parse_state = PARSE_HEADER;\n memset(&recv_msg.hdr, 0, sizeof(recv_msg.hdr));\n\n *buf = (unsigned char *)&recv_msg.hdr;\n *len = sizeof(recv_msg.hdr);\n}\n\nstatic enum ERR_CODE check_msg_hdr(void) {\n enum ERR_CODE errcode = ERR_NONE;\n\n switch (recv_msg.hdr.type) {\n case TYPE_SYS:\n if (recv_msg.hdr.len != 1 && recv_msg.hdr.len != 5) {\n // TRACE(1,\"SYS msg length error: %u\", recv_msg.hdr.len);\n errcode = ERR_LEN;\n }\n break;\n case TYPE_READ:\n if (recv_msg.hdr.len != 4) {\n // TRACE(1,\"READ msg length error: %u\", recv_msg.hdr.len);\n errcode = ERR_LEN;\n }\n break;\n case TYPE_WRITE:\n if (recv_msg.hdr.len <= 4 || recv_msg.hdr.len > 20) {\n // TRACE(1,\"WRITE msg length error: %u\", recv_msg.hdr.len);\n errcode = ERR_LEN;\n }\n break;\n default:\n break;\n }\n\n if (errcode == ERR_NONE && recv_msg.hdr.len + 1 > sizeof(recv_msg.data)) {\n errcode = ERR_LEN;\n }\n\n return errcode;\n}\n\nstatic enum ERR_CODE handle_sys_cmd(enum SYS_CMD_TYPE cmd, unsigned char *param,\n unsigned int len) {\n unsigned char cret[5];\n unsigned int bootmode;\n\n cret[0] = ERR_NONE;\n\n if (cmd == SYS_CMD_SET_BOOTMODE || cmd == SYS_CMD_CLR_BOOTMODE) {\n if (len != 4) {\n TRACE(2, \"Invalid SYS CMD len %u for cmd: 0x%x\", len, cmd);\n return ERR_DATA_LEN;\n }\n } else {\n if (len != 0) {\n TRACE(2, \"Invalid SYS CMD len %u for cmd: 0x%x\", len, cmd);\n return ERR_DATA_LEN;\n }\n }\n\n switch (cmd) {\n case SYS_CMD_REBOOT: {\n TRACE(0, \"--- Reboot---\");\n send_reply(cret, 1);\n system_reboot();\n break;\n }\n case SYS_CMD_SHUTDOWN: {\n TRACE(0, \"--- Shutdown ---\");\n send_reply(cret, 1);\n system_shutdown();\n break;\n }\n case SYS_CMD_SET_BOOTMODE: {\n TRACE(0, \"--- Set bootmode ---\");\n memcpy(&bootmode, param, 4);\n system_set_bootmode(bootmode);\n send_reply(cret, 1);\n break;\n }\n case SYS_CMD_CLR_BOOTMODE: {\n TRACE(0, \"--- Clear bootmode ---\");\n memcpy(&bootmode, param, 4);\n system_clear_bootmode(bootmode);\n send_reply(cret, 1);\n break;\n }\n case SYS_CMD_GET_BOOTMODE: {\n TRACE(0, \"--- Get bootmode ---\");\n bootmode = system_get_bootmode();\n memcpy(&cret[1], &bootmode, 4);\n send_reply(cret, 5);\n break;\n }\n default: {\n TRACE(1, \"Invalid command: 0x%x\", recv_msg.data[0]);\n return ERR_SYS_CMD;\n }\n }\n\n return ERR_NONE;\n}\n\nstatic enum ERR_CODE handle_data(unsigned char **buf, size_t *len, int *extra) {\n enum ERR_CODE errcode = ERR_NONE;\n#if 0\n\tuint32_t rlen = 0;\n#endif\n *extra = 0;\n\n // Checksum\n if (check_sum((unsigned char *)&recv_msg, MSG_TOTAL_LEN(&recv_msg)) != 0xFF) {\n TRACE(0, \"Checksum error\");\n return ERR_CHECKSUM;\n }\n\n switch (recv_msg.hdr.type) {\n case TYPE_SYS: {\n TRACE_TIME(0, \"------ SYS CMD ------\");\n errcode = handle_sys_cmd((enum SYS_CMD_TYPE)recv_msg.data[0],\n &recv_msg.data[1], recv_msg.hdr.len - 1);\n if (errcode != ERR_NONE) {\n return errcode;\n }\n break;\n }\n case TYPE_READ: {\n TRACE_TIME(0, \"------ READ CMD ------\");\n#if 0\n uint32_t addr = (recv_msg.data[0] << 16) | (recv_msg.data[1] << 8) | recv_msg.data[2];\n uint8_t data[4] = {0};\n rlen = read_reg(addr, data);\n if(rlen == 0)\n return ERR_LEN;\n else {\n send_reply(data, rlen);\n }\n#endif\n break;\n }\n case TYPE_WRITE: {\n TRACE_TIME(0, \"------ WRITE CMD ------\");\n#if 0\n uint32_t addr = (recv_msg.data[0] << 16) | (recv_msg.data[1] << 8) | recv_msg.data[2];\n uint32_t wdata = (recv_msg.data[3] << 24) | (recv_msg.data[4] << 16) | (recv_msg.data[5] << 8) | recv_msg.data[6];\n uint8_t data[1] = {0};\n errcode = write_reg(addr, wdata);\n if (errcode != ERR_NONE)\n return errcode;\n else\n send_reply(data, 1);\n#endif\n break;\n }\n\n default:\n break;\n }\n\n return ERR_NONE;\n}\n\nstatic int parse_packet(unsigned char **buf, size_t *len) {\n enum ERR_CODE errcode;\n int rlen = *len;\n unsigned char *data;\n int i;\n int extra;\n unsigned char cret;\n\n switch (parse_state) {\n case PARSE_HEADER:\n ASSERT(rlen > 0 && rlen <= sizeof(recv_msg.hdr), \"Invalid rlen!\");\n\n if (recv_msg.hdr.prefix == PREFIX_CHAR) {\n errcode = check_msg_hdr();\n if (errcode != ERR_NONE) {\n goto _err;\n }\n parse_state = PARSE_DATA;\n *buf = &recv_msg.data[0];\n *len = recv_msg.hdr.len + 1;\n } else {\n data = (unsigned char *)&recv_msg.hdr.prefix;\n for (i = 1; i < rlen; i++) {\n if (data[i] == PREFIX_CHAR) {\n memmove(&recv_msg.hdr.prefix, &data[i], rlen - i);\n break;\n }\n }\n *buf = &data[rlen - i];\n *len = sizeof(recv_msg.hdr) + i - rlen;\n }\n break;\n case PARSE_DATA:\n errcode = handle_data(buf, len, &extra);\n if (errcode != ERR_NONE) {\n goto _err;\n }\n // Receive next message\n reset_parse_state(buf, len);\n break;\n default:\n TRACE(1, \"Invalid parse_state: %d\", parse_state);\n break;\n }\n\n return 0;\n\n_err:\n cancel_input();\n cret = (unsigned char)errcode;\n send_reply(&cret, 1);\n\n return 1;\n}\n\nvoid comm_loop(void) {\n int ret;\n unsigned char *buf = NULL;\n size_t len = 0;\n size_t buf_len, rlen;\n\n_sync:\n reset_transport();\n reset_parse_state(&buf, &len);\n\n while (1) {\n rlen = 0;\n if (parse_state == PARSE_HEADER) {\n set_recv_timeout(default_recv_timeout_idle);\n } else {\n set_recv_timeout(default_recv_timeout_short);\n }\n buf_len = 0;\n\n ret = recv_data_ex(buf, buf_len, len, &rlen);\n if (ret) {\n TRACE(1, \"Receiving data failed: %d\", ret);\n goto _err;\n }\n\n if (len != rlen) {\n TRACE(2, \"Receiving part of the data: expect=%u real=%u\", len, rlen);\n goto _err;\n }\n\n ret = parse_packet(&buf, &len);\n if (ret) {\n TRACE(0, \"Parsing packet failed\");\n goto _err;\n }\n }\n\n_err:\n ret = handle_error();\n if (ret == 0) {\n TRACE(0, \"retry ...\");\n goto _sync;\n }\n\n return;\n}\n#endif\n" }, { "path": "apps/factory/app_factory_cdc_comm.h", "content": "#ifndef __APP_FACTORY_CDC_COMM__H__\n#define __APP_FACTORY_CDC_COMM__H__\n#ifdef __USB_COMM__\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid comm_loop(void);\n\nint send_reply(const unsigned char *payload, unsigned int len);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n#endif\n\n" }, { "path": "apps/factory/sys_api_cdc_comm.c", "content": "#ifdef __USB_COMM__\n#include \"sys_api_cdc_comm.h\"\n#include \"app_factory_cdc_comm.h\"\n#include \"hal_bootmode.h\"\n#include \"hwtimer_list.h\"\n#include \"pmu.h\"\n#ifdef CHIP_HAS_USB\n#include \"usb_cdc.h\"\n#endif\n\n#define TIMEOUT_INFINITE ((uint32_t)-1)\n\nconst unsigned int default_recv_timeout_short = MS_TO_TICKS(500);\nconst unsigned int default_recv_timeout_idle =\n TIMEOUT_INFINITE; // MS_TO_TICKS(10 * 60 * 1000);\nconst unsigned int default_recv_timeout_4k_data = MS_TO_TICKS(500);\nconst unsigned int default_send_timeout = MS_TO_TICKS(500);\n\nstatic uint32_t send_timeout;\nstatic uint32_t recv_timeout;\n\nstatic volatile bool cancel_xfer = false;\n\nstatic uint32_t xfer_err_time = 0;\nstatic uint32_t xfer_err_cnt = 0;\n\nstatic HWTIMER_ID xfer_timer;\n\nstatic const struct USB_SERIAL_CFG_T cdc_cfg = {\n .mode = USB_SERIAL_API_NONBLOCKING,\n};\n\nvoid reset_transport(void) {\n cancel_xfer = false;\n\n if (xfer_timer) {\n hwtimer_stop(xfer_timer);\n } else {\n xfer_timer = hwtimer_alloc(NULL, NULL);\n }\n\n usb_serial_flush_recv_buffer();\n usb_serial_init_xfer();\n set_recv_timeout(default_recv_timeout_short);\n set_send_timeout(default_send_timeout);\n}\n\nvoid set_recv_timeout(unsigned int timeout) { recv_timeout = timeout; }\n\nvoid set_send_timeout(unsigned int timeout) { send_timeout = timeout; }\n\nstatic void usb_send_timeout(void *param) { usb_serial_cancel_send(); }\n\nstatic void usb_send_timer_start(void) {\n if (send_timeout == TIMEOUT_INFINITE) {\n return;\n }\n\n if (xfer_timer) {\n hwtimer_update_then_start(xfer_timer, usb_send_timeout, NULL, send_timeout);\n }\n}\n\nstatic void usb_send_timer_stop(void) {\n if (xfer_timer) {\n hwtimer_stop(xfer_timer);\n }\n}\n\nstatic int usb_send_data(const unsigned char *buf, size_t len) {\n int ret;\n\n usb_send_timer_start();\n ret = usb_serial_send(buf, len);\n usb_send_timer_stop();\n return ret;\n}\n\nint send_data(const unsigned char *buf, size_t len) {\n if (cancel_xfer) {\n return -1;\n }\n return usb_send_data(buf, len);\n}\n\nstatic void usb_recv_timeout(void *param) { usb_serial_cancel_recv(); }\n\nstatic void usb_recv_timer_start(void) {\n if (recv_timeout == TIMEOUT_INFINITE) {\n return;\n }\n\n if (xfer_timer) {\n hwtimer_update_then_start(xfer_timer, usb_recv_timeout, NULL, recv_timeout);\n }\n}\n\nstatic void usb_recv_timer_stop(void) {\n if (xfer_timer) {\n hwtimer_stop(xfer_timer);\n }\n}\n\nstatic int usb_recv_data(unsigned char *buf, size_t len, size_t *rlen) {\n int ret;\n\n usb_recv_timer_start();\n ret = usb_serial_recv(buf, len);\n usb_recv_timer_stop();\n if (ret == 0) {\n *rlen = len;\n }\n return ret;\n}\n\nint recv_data_ex(unsigned char *buf, size_t len, size_t expect, size_t *rlen) {\n if (cancel_xfer) {\n return -1;\n }\n return usb_recv_data(buf, expect, rlen);\n}\n\nstatic int usb_handle_error(void) {\n int ret;\n\n TRACE(0, \"****** Send break ******\");\n\n // Send break signal, to tell the peer to reset the connection\n ret = usb_serial_send_break();\n if (ret) {\n TRACE(1, \"Sending break failed: %d\", ret);\n }\n return ret;\n}\n\nint handle_error(void) {\n int ret = 0;\n uint32_t err_time;\n\n hal_sys_timer_delay(MS_TO_TICKS(50));\n\n if (!cancel_xfer) {\n ret = usb_handle_error();\n }\n\n err_time = hal_sys_timer_get();\n if (xfer_err_cnt == 0 || err_time - xfer_err_time > MS_TO_TICKS(5000)) {\n xfer_err_cnt = 0;\n xfer_err_time = err_time;\n }\n xfer_err_cnt++;\n if (xfer_err_cnt < 3) {\n hal_sys_timer_delay(MS_TO_TICKS(100));\n } else if (xfer_err_cnt < 5) {\n hal_sys_timer_delay(MS_TO_TICKS(500));\n } else {\n hal_sys_timer_delay(MS_TO_TICKS(2000));\n }\n\n return ret;\n}\n\nstatic int usb_cancel_input(void) { return usb_serial_flush_recv_buffer(); }\n\nint cancel_input(void) { return usb_cancel_input(); }\n\nvoid system_reboot(void) {\n hal_sys_timer_delay(MS_TO_TICKS(10));\n hal_cmu_sys_reboot();\n}\n\nvoid system_shutdown(void) {\n#if 0\n if (dld_transport == TRANSPORT_USB) {\n // Avoid PC usb serial driver hanging\n usb_serial_close();\n }\n#endif\n hal_sys_timer_delay(MS_TO_TICKS(10));\n pmu_shutdown();\n}\n\nvoid system_set_bootmode(unsigned int bootmode) {\n bootmode &= ~(HAL_SW_BOOTMODE_READ_ENABLED | HAL_SW_BOOTMODE_WRITE_ENABLED);\n hal_sw_bootmode_set(bootmode);\n}\n\nvoid system_clear_bootmode(unsigned int bootmode) {\n bootmode &= ~(HAL_SW_BOOTMODE_READ_ENABLED | HAL_SW_BOOTMODE_WRITE_ENABLED);\n hal_sw_bootmode_clear(bootmode);\n}\n\nunsigned int system_get_bootmode(void) { return hal_sw_bootmode_get(); }\n#endif\n" }, { "path": "apps/factory/sys_api_cdc_comm.h", "content": "#ifndef __SYS_API_USB_CDC_H__\n#define __SYS_API_USB_CDC_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"tool_msg.h\"\n#include \"hal_trace.h\"\n#include \"hal_timer.h\"\n\n#define TRACE_TIME(num,str, ...) TRACE(num+1,\"[%05u] \" str, TICKS_TO_MS(hal_sys_timer_get()), ##__VA_ARGS__)\n\nextern const unsigned int default_recv_timeout_short;\nextern const unsigned int default_recv_timeout_idle;\nextern const unsigned int default_recv_timeout_4k_data;\nextern const unsigned int default_send_timeout;\n\nvoid reset_transport(void);\n\nvoid set_recv_timeout(unsigned int timeout);\nvoid set_send_timeout(unsigned int timeout);\n\nint send_data(const unsigned char *buf, size_t len);\nint recv_data_ex(unsigned char *buf, size_t len, size_t expect, size_t *rlen);\nint handle_error(void);\nint cancel_input(void);\n\nvoid system_reboot(void);\nvoid system_shutdown(void);\nvoid system_flash_boot(void);\nvoid system_set_bootmode(unsigned int bootmode);\nvoid system_clear_bootmode(unsigned int bootmode);\nunsigned int system_get_bootmode(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n" }, { "path": "apps/key/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nsubdir-ccflags-y += -Iutils/list " }, { "path": "apps/key/app_key.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_key.h\"\n#include \"app_thread.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"list.h\"\n#include \"string.h\"\n\n#define APP_KEY_TRACE(s, ...) // TRACE(s, ##__VA_ARGS__)\n\n#define KEY_EVENT_CNT_LIMIT (3)\n\ntypedef struct {\n list_t *key_list;\n} APP_KEY_CONFIG;\n\nAPP_KEY_CONFIG app_key_conifg = {.key_list = NULL};\n\nosPoolDef(app_key_handle_mempool, 20, APP_KEY_HANDLE);\nosPoolId app_key_handle_mempool = NULL;\nstatic uint8_t key_event_cnt = 0;\n\nstatic int key_event_process(uint32_t key_code, uint8_t key_event) {\n uint32_t app_keyevt;\n APP_MESSAGE_BLOCK msg;\n\n if (key_event_cnt > KEY_EVENT_CNT_LIMIT) {\n return 0;\n } else {\n key_event_cnt++;\n }\n\n msg.mod_id = APP_MODUAL_KEY;\n APP_KEY_SET_MESSAGE(app_keyevt, key_code, key_event);\n msg.msg_body.message_id = app_keyevt;\n msg.msg_body.message_ptr = (uint32_t)NULL;\n app_mailbox_put(&msg);\n\n return 0;\n}\n\nvoid app_key_simulate_key_event(uint32_t key_code, uint8_t key_event) {\n key_event_process(key_code, key_event);\n}\n\nstatic void app_key_handle_free(void *key_handle) {\n osPoolFree(app_key_handle_mempool, key_handle);\n}\n\nstatic APP_KEY_HANDLE *app_key_handle_find(const APP_KEY_STATUS *key_status) {\n APP_KEY_HANDLE *key_handle = NULL;\n list_node_t *node = NULL;\n\n for (node = list_begin(app_key_conifg.key_list);\n node != list_end(app_key_conifg.key_list); node = list_next(node)) {\n key_handle = (APP_KEY_HANDLE *)list_node(node);\n if ((key_handle->key_status.code == key_status->code) &&\n (key_handle->key_status.event == key_status->event))\n return key_handle;\n }\n\n return NULL;\n}\n\nstatic int app_key_handle_process(APP_MESSAGE_BODY *msg_body) {\n APP_KEY_STATUS key_status;\n APP_KEY_HANDLE *key_handle = NULL;\n\n APP_KEY_GET_CODE(msg_body->message_id, key_status.code);\n APP_KEY_GET_EVENT(msg_body->message_id, key_status.event);\n\n APP_KEY_TRACE(3, \"%s code:%d event:%d\", __func__, key_status.code,\n key_status.event);\n\n key_event_cnt--;\n\n key_handle = app_key_handle_find(&key_status);\n\n if (key_handle != NULL && key_handle->function != NULL)\n ((APP_KEY_HANDLE_CB_T)key_handle->function)(&key_status, key_handle->param);\n\n return 0;\n}\n\nint app_key_handle_registration(const APP_KEY_HANDLE *key_handle) {\n APP_KEY_HANDLE *dest_key_handle = NULL;\n APP_KEY_TRACE(1, \"%s\", __func__);\n dest_key_handle = app_key_handle_find(&(key_handle->key_status));\n\n APP_KEY_TRACE(2, \"%s dest handle:0x%x\", __func__, dest_key_handle);\n if (dest_key_handle == NULL) {\n dest_key_handle = (APP_KEY_HANDLE *)osPoolCAlloc(app_key_handle_mempool);\n APP_KEY_TRACE(2, \"%s malloc:0x%x\", __func__, dest_key_handle);\n list_append(app_key_conifg.key_list, dest_key_handle);\n }\n if (dest_key_handle == NULL)\n return -1;\n APP_KEY_TRACE(5, \"%s set handle:0x%x code:%d event:%d function:%x\", __func__,\n dest_key_handle, key_handle->key_status.code,\n key_handle->key_status.event, key_handle->function);\n dest_key_handle->key_status.code = key_handle->key_status.code;\n dest_key_handle->key_status.event = key_handle->key_status.event;\n dest_key_handle->string = key_handle->string;\n dest_key_handle->function = key_handle->function;\n dest_key_handle->param = key_handle->param;\n ;\n\n return 0;\n}\n\nvoid app_key_handle_clear(void) { list_clear(app_key_conifg.key_list); }\n\nint app_key_open(int checkPwrKey) {\n APP_KEY_TRACE(2, \"%s %x\", __func__, app_key_conifg.key_list);\n\n if (app_key_conifg.key_list == NULL)\n app_key_conifg.key_list = list_new(app_key_handle_free, NULL, NULL);\n\n if (app_key_handle_mempool == NULL)\n app_key_handle_mempool = osPoolCreate(osPool(app_key_handle_mempool));\n\n app_set_threadhandle(APP_MODUAL_KEY, app_key_handle_process);\n\n return hal_key_open(checkPwrKey, key_event_process);\n}\n\nint app_key_close(void) {\n hal_key_close();\n if (app_key_conifg.key_list != NULL)\n list_free(app_key_conifg.key_list);\n app_set_threadhandle(APP_MODUAL_KEY, NULL);\n return 0;\n}\n\nuint32_t app_key_read_status(uint32_t code) {\n return (uint32_t)hal_key_read_status((enum HAL_KEY_CODE_T)code);\n}\n\n#if defined(_AUTO_TEST_)\nint simul_key_event_process(uint32_t key_code, uint8_t key_event) {\n return key_event_process(key_code, key_event);\n}\n#endif\n" }, { "path": "apps/key/app_key.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_key.h\"\n\n#ifndef __APP_KEY_H__\n#define __APP_KEY_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define APP_KEY_SET_MESSAGE(appevt, code, evt) \\\n (appevt = (((uint32_t)code & 0xffffff) << 8) | (evt & 0xff))\n#define APP_KEY_GET_CODE(appevt, code) (code = (appevt >> 8) & 0xffffff)\n#define APP_KEY_GET_EVENT(appevt, evt) (evt = appevt & 0xff)\n\n#define APP_KEY_CODE_GOOGLE APP_KEY_CODE_FN15\n#define APP_KEY_CODE_VOICEPATH APP_KEY_CODE_FN15\n#define APP_KEY_CODE_TILE APP_KEY_CODE_FN15\n\nenum APP_KEY_CODE_T {\n APP_KEY_CODE_NONE = HAL_KEY_CODE_NONE,\n APP_KEY_CODE_PWR = HAL_KEY_CODE_PWR,\n APP_KEY_CODE_FN1 = HAL_KEY_CODE_FN1,\n APP_KEY_CODE_FN2 = HAL_KEY_CODE_FN2,\n APP_KEY_CODE_FN3 = HAL_KEY_CODE_FN3,\n APP_KEY_CODE_FN4 = HAL_KEY_CODE_FN4,\n APP_KEY_CODE_FN5 = HAL_KEY_CODE_FN5,\n APP_KEY_CODE_FN6 = HAL_KEY_CODE_FN6,\n APP_KEY_CODE_FN7 = HAL_KEY_CODE_FN7,\n APP_KEY_CODE_FN8 = HAL_KEY_CODE_FN8,\n APP_KEY_CODE_FN9 = HAL_KEY_CODE_FN9,\n APP_KEY_CODE_FN10 = HAL_KEY_CODE_FN10,\n APP_KEY_CODE_FN11 = HAL_KEY_CODE_FN11,\n APP_KEY_CODE_FN12 = HAL_KEY_CODE_FN12,\n APP_KEY_CODE_FN13 = HAL_KEY_CODE_FN13,\n APP_KEY_CODE_FN14 = HAL_KEY_CODE_FN14,\n APP_KEY_CODE_FN15 = HAL_KEY_CODE_FN15,\n};\n\nenum APP_KEY_EVENT_T {\n APP_KEY_EVENT_NONE = HAL_KEY_EVENT_NONE,\n APP_KEY_EVENT_DOWN = HAL_KEY_EVENT_DOWN,\n APP_KEY_EVENT_FIRST_DOWN = HAL_KEY_EVENT_FIRST_DOWN,\n APP_KEY_EVENT_CONTINUED_DOWN = HAL_KEY_EVENT_CONTINUED_DOWN,\n APP_KEY_EVENT_UP = HAL_KEY_EVENT_UP,\n APP_KEY_EVENT_UP_AFTER_LONGPRESS = HAL_KEY_EVENT_UP_AFTER_LONGPRESS,\n APP_KEY_EVENT_LONGPRESS = HAL_KEY_EVENT_LONGPRESS,\n APP_KEY_EVENT_LONGLONGPRESS = HAL_KEY_EVENT_LONGLONGPRESS,\n APP_KEY_EVENT_CLICK = HAL_KEY_EVENT_CLICK,\n APP_KEY_EVENT_DOUBLECLICK = HAL_KEY_EVENT_DOUBLECLICK,\n APP_KEY_EVENT_TRIPLECLICK = HAL_KEY_EVENT_TRIPLECLICK,\n APP_KEY_EVENT_ULTRACLICK = HAL_KEY_EVENT_ULTRACLICK,\n APP_KEY_EVENT_RAMPAGECLICK = HAL_KEY_EVENT_RAMPAGECLICK,\n APP_KEY_EVENT_SIXTHCLICK = HAL_KEY_EVENT_SIXTHCLICK,\n APP_KEY_EVENT_SEVENTHCLICK = HAL_KEY_EVENT_SEVENTHCLICK,\n APP_KEY_EVENT_EIGHTHCLICK = HAL_KEY_EVENT_EIGHTHCLICK,\n APP_KEY_EVENT_NINETHCLICK = HAL_KEY_EVENT_NINETHCLICK,\n APP_KEY_EVENT_TENTHCLICK = HAL_KEY_EVENT_TENTHCLICK,\n APP_KEY_EVENT_REPEAT = HAL_KEY_EVENT_REPEAT,\n APP_KEY_EVENT_GROUPKEY_DOWN = HAL_KEY_EVENT_GROUPKEY_DOWN,\n APP_KEY_EVENT_GROUPKEY_REPEAT = HAL_KEY_EVENT_GROUPKEY_REPEAT,\n APP_KEY_EVENT_INITDOWN = HAL_KEY_EVENT_INITDOWN,\n APP_KEY_EVENT_INITUP = HAL_KEY_EVENT_INITUP,\n APP_KEY_EVENT_INITLONGPRESS = HAL_KEY_EVENT_INITLONGPRESS,\n APP_KEY_EVENT_INITLONGLONGPRESS = HAL_KEY_EVENT_INITLONGLONGPRESS,\n APP_KEY_EVENT_INITFINISHED = HAL_KEY_EVENT_INITFINISHED,\n\n APP_KEY_EVENT_NUM = HAL_KEY_EVENT_NUM,\n};\n\ntypedef struct {\n uint32_t code;\n uint8_t event;\n} APP_KEY_STATUS;\n\ntypedef void (*APP_KEY_HANDLE_CB_T)(APP_KEY_STATUS *, void *param);\n\ntypedef struct {\n APP_KEY_STATUS key_status;\n const char *string;\n APP_KEY_HANDLE_CB_T function;\n void *param;\n} APP_KEY_HANDLE;\n\nint app_key_open(int checkPwrKey);\n\nint app_key_close(void);\n\nuint32_t app_key_read_status(uint32_t code);\n\nint app_key_handle_registration(const APP_KEY_HANDLE *key_handle);\n\nvoid app_key_handle_clear(void);\n\nvoid app_key_simulate_key_event(uint32_t key_code, uint8_t key_event);\n\n#if defined(_AUTO_TEST_)\nint simul_key_event_process(uint32_t key_code, uint8_t key_event);\n#endif\n\n#ifdef __cplusplus\n};\n#endif\n#endif //__FMDEC_H__\n" }, { "path": "apps/main/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\n\nifneq ($(wildcard $(cur_dir)../../config/$(T)/app_status_ind.c),)\nobj-y += ../../config/$(T)/app_status_ind.c\nelse\nobj-y += ../../config/$(DEFAULT_CFG_SRC)/app_status_ind.c\nendif\n\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += \\\n $(BT_IF_INCLUDES) \\\n -Iservices/bt_app \\\n -Iservices/audioflinger \\\n -Iservices/norflash_api \\\n -Iservices/nvrecord \\\n -Iservices/nv_section/factory_section \\\n -Iservices/nv_section/log_section \\\n -Iservices/overlay \\\n -Iservices/resources \\\n -Iservices/audio_process \\\n -Iapps/apptester \\\n -Iapps/mic_alg \\\n -Iapps/factory \\\n -Iutils/crc32 \\\n -Iplatform/drivers/bt \\\n -Iplatform/drivers/ana \\\n -Iapps/audioplayers/rbplay \\\n -Itests/anc_usb \\\n -Iapps/anc/inc \\\n -Iapps/ota \\\n -Ithirdparty/userapi \\\n -Iservices/voicepath \\\n -Iservices/ble_app \\\n -Iservices/ble_app/app_main \\\n -Iservices/ble_app/app_gfps \\\n -Iservices/voicepath/gsound/gsound_service \\\n -Iservices/voicepath/gsound/gsound_target \\\n -Iservices/voicepath/gsound/gsound_custom/inc \\\n -Iservices/voicepath/gsound/gsound_target_api_read_only \\\n -Iservices/communication \\\n -Iutils/cqueue \\\n -Iservices/ai_voice/audio \\\n -Iservices/ai_voice/manager \\\n -Iservices/ai_voice/transport \\\n -Iservices/app_ai/inc \\\n -Iservices/interconnection/red \\\n -Iservices/interconnection/green \\\n -Iservices/ble_stack/ble_ip \\\n -Iservices/ble_stack/hl/api \\\n -Iservices/ble_stack/hl/inc/ \\\n -Iservices/ble_stack/ke/api \\\n -Iservices/bridge/ \\\n $(BT_PROFILES_INCLUDES) \\\n -Iservices/ble_stack/common/api/ \\\n -Iservices/ble_stack/hl/src/gap/ \\\n -Iservices/ble_stack/hl/src/gap/gapc/ \\\n -Iservices/ble_stack/hl/src/gap/gapm/ \\\n -Iservices/ble_stack/hl/src/gap/smpc/ \\\n -Iservices/ble_stack/ke/src/ \\\n -Iservices/ble_stack/hl/src/gatt/attc/ \\\n -Iservices/ble_stack/hl/src/gatt/attm/ \\\n -Iservices/ble_stack/hl/src/gatt/atts/ \\\n -Iservices/ble_stack/hl/src/gatt/gattc/ \\\n -Iservices/ble_stack/hl/src/gatt/gattm/ \\\n -Iservices/ble_stack/hl/src/gatt/ \\\n -Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n -Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n -Iservices/ble_stack/hci/api/ \\\n -Iservices/ble_stack/hci/src/ \\\n -Iservices/ble_stack/app/api/ \\\n -Iservices/ble_stack/app/src/ \\\n -Iservices/multimedia/audio/codec/sbc/inc \\\n -Iservices/multimedia/audio/codec/sbc/src/inc \\\n -Iservices/bt_app/a2dp_codecs/include \\\n -Ithirdparty/tile \\\n -Iservices/app_tws/inc \\\n -Ithirdparty/tile/tile_target\n\nifeq ($(VOICE_DATAPATH_ENABLED),1)\nccflags-y += -Iservices/voicepath/$(VOICE_DATAPATH_TYPE)\nendif\n\nifeq ($(IBRT),1)\nccflags-y += -Iservices/ibrt_core/inc\nccflags-y += -Iservices/ibrt_ui/inc\nccflags-y += -Iservices/app_ibrt/inc\nendif\n\nifeq ($(APP_TEST_AUDIO),1)\nCFLAGS_apps_tester.o += -DAPP_TEST_AUDIO\nendif\n\nifeq ($(OTA_ENABLE),1)\nccflags-y += -Iservices/ota\nifeq ($(IBRT),1)\nccflags-y += -Iservices/ibrt_ota/inc\nendif\nendif\n\nCFLAGS_apps.o += $(LDS_SECTION_FLAGS)\n\nifeq ($(ANC_APP),1)\nCFLAGS_apps_tester.o += -DANC_APP\nCFLAGS_apps.o += -DANC_APP\nendif\n\nifeq ($(RB_CODEC),1)\nCFLAGS_apps.o += -DRB_CODEC\nendif\n\nifeq ($(VOICE_PROMPT),1)\nCFLAGS_apps.o += -DMEDIA_PLAYER_SUPPORT\nendif\n\nifeq ($(ENGINEER_MODE),1)\nCFLAGS_apps.o += -D__ENGINEER_MODE_SUPPORT__\nendif\n\nifeq ($(MCU_HIGH_PERFORMANCE_MODE),1)\nCFLAGS_apps.o += -DMCU_HIGH_PERFORMANCE_MODE\nendif\n\nifeq ($(BTADDR_FOR_DEBUG),1)\nCFLAGS_apps.o += -DBTADDR_FOR_DEBUG\nendif\n\nifeq ($(FORCE_SIGNALINGMODE),1)\nCFLAGS_apps.o += -DFORCE_SIGNALINGMODE\nendif\n\nifeq ($(FORCE_NOSIGNALINGMODE),1)\nCFLAGS_apps.o += -DFORCE_NOSIGNALINGMODE\nendif\n\nifeq ($(POWERKEY_I2C_SWITCH),1)\nCFLAGS_apps.o += -DPOWERKEY_I2C_SWITCH\nendif\n\n" }, { "path": "apps/main/app_status_ind.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_STATUS_IND_H__\n#define __APP_STATUS_IND_H__\n\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum APP_STATUS_INDICATION_T {\n APP_STATUS_INDICATION_POWERON = 0,\n APP_STATUS_INDICATION_INITIAL,\n APP_STATUS_INDICATION_PAGESCAN,\n APP_STATUS_INDICATION_POWEROFF,\n APP_STATUS_INDICATION_CHARGENEED,\n APP_STATUS_INDICATION_CHARGING,\n APP_STATUS_INDICATION_FULLCHARGE,\n APP_STATUS_INDICATION_NO_REPEAT_NUM,\n /* repeatable status: */\n APP_STATUS_INDICATION_BOTHSCAN = APP_STATUS_INDICATION_NO_REPEAT_NUM,\n APP_STATUS_INDICATION_CONNECTING,\n APP_STATUS_INDICATION_CONNECTED,\n APP_STATUS_INDICATION_DISCONNECTED,\n APP_STATUS_INDICATION_CALLNUMBER,\n APP_STATUS_INDICATION_INCOMINGCALL,\n APP_STATUS_INDICATION_PAIRSUCCEED,\n APP_STATUS_INDICATION_PAIRFAIL,\n APP_STATUS_INDICATION_HANGUPCALL,\n APP_STATUS_INDICATION_REFUSECALL,\n APP_STATUS_INDICATION_ANSWERCALL,\n APP_STATUS_INDICATION_CLEARSUCCEED,\n APP_STATUS_INDICATION_CLEARFAIL,\n APP_STATUS_INDICATION_WARNING,\n APP_STATUS_INDICATION_ALEXA_START,\n APP_STATUS_INDICATION_ALEXA_STOP,\n APP_STATUS_INDICATION_GSOUND_MIC_OPEN,\n APP_STATUS_INDICATION_GSOUND_MIC_CLOSE,\n APP_STATUS_INDICATION_GSOUND_NC,\n APP_STATUS_INDICATION_INVALID,\n APP_STATUS_INDICATION_MUTE,\n APP_STATUS_INDICATION_TESTMODE,\n APP_STATUS_INDICATION_TESTMODE1,\n APP_STATUS_INDICATION_DU,\n APP_STATUS_INDICATION_DUDU,\n APP_STATUS_RING_WARNING,\n#ifdef __INTERACTION__\t\n APP_STATUS_INDICATION_FINDME,\n#endif\t\n APP_STATUS_INDICATION_FIND_MY_BUDS,\n APP_STATUS_INDICATION_TILE_FIND,\n APP_STATUS_INDICATION_NUM\n}APP_STATUS_INDICATION_T;\n\nconst char *status2str(uint16_t status);\nint app_status_indication_filter_set(APP_STATUS_INDICATION_T status);\nAPP_STATUS_INDICATION_T app_status_indication_get(void);\nint app_status_indication_set(APP_STATUS_INDICATION_T status);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n" }, { "path": "apps/main/apps.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"apps.h\"\n#include \"common_apps_imports.h\"\n#include \"ibrt.h\"\n#include \"key_handler.h\"\n#include \"led_control.h\"\n#include \"rb_codec.h\"\n\n#ifdef BTIF_BLE_APP_DATAPATH_SERVER\n#include \"app_ble_cmd_handler.h\"\n#endif\n\n#ifdef ANC_APP\n#include \"app_anc.h\"\n#endif\n\n#ifdef __THIRDPARTY\n#include \"app_thirdparty.h\"\n#endif\n\n#ifdef OTA_ENABLED\n#include \"nvrecord_ota.h\"\n#include \"ota_common.h\"\n#endif\n\n#ifdef WL_DET\n#include \"app_mic_alg.h\"\n#endif\n\n#ifdef AUDIO_DEBUG_V0_1_0\nextern \"C\" int speech_tuning_init(void);\n#endif\n\n#if (defined(BTUSB_AUDIO_MODE) || defined(BT_USB_AUDIO_DUAL_MODE))\nextern \"C\" bool app_usbaudio_mode_on(void);\n#endif\n\n#ifdef BES_OTA_BASIC\nextern \"C\" void ota_flash_init(void);\n#endif\n\n#define APP_BATTERY_LEVEL_LOWPOWERTHRESHOLD (1)\n#define POWERON_PRESSMAXTIME_THRESHOLD_MS (5000)\n\nenum APP_POWERON_CASE_T {\n APP_POWERON_CASE_NORMAL = 0,\n APP_POWERON_CASE_DITHERING,\n APP_POWERON_CASE_REBOOT,\n APP_POWERON_CASE_ALARM,\n APP_POWERON_CASE_CALIB,\n APP_POWERON_CASE_BOTHSCAN,\n APP_POWERON_CASE_CHARGING,\n APP_POWERON_CASE_FACTORY,\n APP_POWERON_CASE_TEST,\n APP_POWERON_CASE_LINKLOSE_REBOOT,\n APP_POWERON_CASE_INVALID,\n\n APP_POWERON_CASE_NUM\n};\n\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\nextern bool app_pwr_key_monitor_get_val(void);\nstatic bool anc_single_mode_on = false;\nextern \"C\" bool anc_single_mode_is_on(void) { return anc_single_mode_on; }\n#endif\n\n#ifdef __ANC_STICK_SWITCH_USE_GPIO__\nextern bool app_anc_switch_get_val(void);\n#endif\n\n#ifdef GFPS_ENABLED\nextern \"C\" void app_fast_pairing_timeout_timehandler(void);\n#endif\n\nuint8_t app_poweroff_flag = 0;\nstatic enum APP_POWERON_CASE_T g_pwron_case = APP_POWERON_CASE_INVALID;\n\n#ifndef APP_TEST_MODE\nstatic uint8_t app_status_indication_init(void) {\n struct APP_PWL_CFG_T cfg;\n hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)cfg_hw_pinmux_pwl,\n sizeof(cfg_hw_pinmux_pwl) /\n sizeof(struct HAL_IOMUX_PIN_FUNCTION_MAP));\n memset(&cfg, 0, sizeof(struct APP_PWL_CFG_T));\n app_pwl_open();\n app_pwl_setup(APP_PWL_ID_0, &cfg);\n app_pwl_setup(APP_PWL_ID_1, &cfg);\n return 0;\n}\n#endif\n\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_AUTOPOWEROFF__)\n\nvoid PairingTransferToConnectable(void);\n\ntypedef void (*APP_10_SECOND_TIMER_CB_T)(void);\n\nvoid app_pair_timerout(void);\nvoid app_poweroff_timerout(void);\nvoid CloseEarphone(void);\n\ntypedef struct {\n uint8_t timer_id;\n uint8_t timer_en;\n uint8_t timer_count;\n uint8_t timer_period;\n APP_10_SECOND_TIMER_CB_T cb;\n} APP_10_SECOND_TIMER_STRUCT;\n\n#define INIT_APP_TIMER(_id, _en, _count, _period, _cb) \\\n { \\\n .timer_id = _id, .timer_en = _en, .timer_count = _count, \\\n .timer_period = _period, .cb = _cb, \\\n }\n\nAPP_10_SECOND_TIMER_STRUCT app_10_second_array[] = {\n INIT_APP_TIMER(APP_PAIR_TIMER_ID, 0, 0, 6, PairingTransferToConnectable),\n INIT_APP_TIMER(APP_POWEROFF_TIMER_ID, 0, 0, 90, CloseEarphone),\n#ifdef GFPS_ENABLED\n INIT_APP_TIMER(APP_FASTPAIR_LASTING_TIMER_ID, 0, 0,\n APP_FAST_PAIRING_TIMEOUT_IN_SECOND / 10,\n app_fast_pairing_timeout_timehandler),\n#endif\n};\n\nvoid app_stop_10_second_timer(uint8_t timer_id) {\n APP_10_SECOND_TIMER_STRUCT *timer = &app_10_second_array[timer_id];\n\n timer->timer_en = 0;\n timer->timer_count = 0;\n}\n\nvoid app_start_10_second_timer(uint8_t timer_id) {\n APP_10_SECOND_TIMER_STRUCT *timer = &app_10_second_array[timer_id];\n\n timer->timer_en = 0;\n timer->timer_count = 0;\n}\n\nvoid app_set_10_second_timer(uint8_t timer_id, uint8_t enable, uint8_t period) {\n APP_10_SECOND_TIMER_STRUCT *timer = &app_10_second_array[timer_id];\n\n timer->timer_en = enable;\n timer->timer_count = period;\n}\n\nvoid app_10_second_timer_check(void) {\n APP_10_SECOND_TIMER_STRUCT *timer = app_10_second_array;\n unsigned int i;\n\n for (i = 0; i < ARRAY_SIZE(app_10_second_array); i++) {\n if (timer->timer_en) {\n timer->timer_count++;\n if (timer->timer_count >= timer->timer_period) {\n timer->timer_en = 0;\n if (timer->cb)\n timer->cb();\n }\n }\n timer++;\n }\n}\n\nvoid CloseEarphone(void) {\n int activeCons;\n osapi_lock_stack();\n activeCons = btif_me_get_activeCons();\n osapi_unlock_stack();\n\n#ifdef ANC_APP\n if (app_anc_work_status()) {\n app_set_10_second_timer(APP_POWEROFF_TIMER_ID, 1, 30);\n return;\n }\n#endif /* ANC_APP */\n if (activeCons == 0) {\n TRACE(0, \"!!!CloseEarphone\\n\");\n app_shutdown();\n }\n}\n#endif /* #if defined(__BTIF_EARPHONE__) && defined(__BTIF_AUTOPOWEROFF__) */\n\nint signal_send_to_main_thread(uint32_t signals);\nuint8_t stack_ready_flag = 0;\nvoid app_notify_stack_ready(uint8_t ready_flag) {\n TRACE(2, \"app_notify_stack_ready %d %d\", stack_ready_flag, ready_flag);\n\n stack_ready_flag |= ready_flag;\n\n#ifdef __IAG_BLE_INCLUDE__\n if (stack_ready_flag == (STACK_READY_BT | STACK_READY_BLE))\n#endif\n {\n signal_send_to_main_thread(0x3);\n }\n}\n\nbool app_is_stack_ready(void) {\n bool ret = false;\n\n if (stack_ready_flag == (STACK_READY_BT\n#ifdef __IAG_BLE_INCLUDE__\n | STACK_READY_BLE\n#endif\n )) {\n ret = true;\n }\n\n return ret;\n}\n\nstatic void app_stack_ready_cb(void) {\n TRACE(0, \"stack init done\");\n#ifdef BLE_ENABLE\n app_ble_stub_user_init();\n app_ble_start_connectable_adv(BLE_ADVERTISING_INTERVAL);\n#endif\n}\n\n// #if (HF_CUSTOM_FEATURE_SUPPORT & HF_CUSTOM_FEATURE_BATTERY_REPORT) ||\n//(HF_SDK_FEATURES & HF_FEATURE_HF_INDICATORS)\n#if defined(SUPPORT_BATTERY_REPORT) || defined(SUPPORT_HF_INDICATORS)\nextern void app_hfp_set_battery_level(uint8_t level);\n#endif\n\nint app_status_battery_report(uint8_t level) {\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n if (anc_single_mode_on) // anc power on,anc only mode\n return 0;\n#endif\n#if defined(__BTIF_EARPHONE__)\n if (app_is_stack_ready()) {\n app_bt_state_checker();\n }\n app_10_second_timer_check();\n#endif\n if (level <= APP_BATTERY_LEVEL_LOWPOWERTHRESHOLD) {\n // add something\n }\n\n if (app_is_stack_ready()) {\n// #if (HF_CUSTOM_FEATURE_SUPPORT & HF_CUSTOM_FEATURE_BATTERY_REPORT) ||\n// (HF_SDK_FEATURES & HF_FEATURE_HF_INDICATORS)\n#if defined(SUPPORT_BATTERY_REPORT) || defined(SUPPORT_HF_INDICATORS)\n#if defined(IBRT)\n if (app_tws_ibrt_mobile_link_connected()) {\n app_hfp_set_battery_level(level);\n }\n#else\n app_hfp_set_battery_level(level);\n#endif\n#else\n TRACE(1, \"[%s] Can not enable SUPPORT_BATTERY_REPORT\", __func__);\n#endif\n osapi_notify_evm();\n }\n return 0;\n}\n\nvoid stopAuto_Shutdowm_Timer(void);\nvoid app_bt_power_off_customize() {\n#if (TWS_Sync_Shutdowm)\n app_ibrt_poweroff_notify_force();\n#endif\n app_shutdown();\n}\n\n#ifdef MEDIA_PLAYER_SUPPORT\n\nvoid app_status_set_num(const char *p) { media_Set_IncomingNumber(p); }\n\nstatic u8 last_voice_waring = APP_STATUS_INDICATION_NUM;\nint app_voice_report_handler(APP_STATUS_INDICATION_T status, uint8_t device_id,\n uint8_t isMerging) {\n#if (defined(BTUSB_AUDIO_MODE) || defined(BT_USB_AUDIO_DUAL_MODE))\n if (app_usbaudio_mode_on())\n return 0;\n#endif\n TRACE(3, \"%s %d\", __func__, status);\n AUD_ID_ENUM id = MAX_RECORD_NUM;\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n if (anc_single_mode_on)\n return 0;\n#endif\n if (((last_voice_waring == APP_STATUS_INDICATION_POWERON) &&\n (status == APP_STATUS_INDICATION_POWERON)) ||\n ((last_voice_waring == APP_STATUS_INDICATION_BOTHSCAN) &&\n (status == APP_STATUS_INDICATION_BOTHSCAN)) ||\n ((last_voice_waring == APP_STATUS_INDICATION_BOTHSCAN) &&\n (status == APP_STATUS_INDICATION_DISCONNECTED))) {\n last_voice_waring = status;\n return 0;\n }\n if (app_poweroff_flag == 1) {\n switch (status) {\n case APP_STATUS_INDICATION_POWEROFF:\n id = AUD_ID_POWER_OFF;\n break;\n default:\n return 0;\n break;\n }\n } else {\n switch (status) {\n case APP_STATUS_INDICATION_POWERON:\n id = AUD_ID_POWER_ON;\n break;\n case APP_STATUS_INDICATION_POWEROFF:\n id = AUD_ID_POWER_OFF;\n break;\n case APP_STATUS_INDICATION_CONNECTED:\n id = AUD_ID_BT_CONNECTED;\n break;\n case APP_STATUS_INDICATION_DISCONNECTED:\n id = AUD_ID_BT_DIS_CONNECT;\n break;\n case APP_STATUS_INDICATION_CALLNUMBER:\n id = AUD_ID_BT_CALL_INCOMING_NUMBER;\n break;\n case APP_STATUS_INDICATION_CHARGENEED:\n id = AUD_ID_BT_CHARGE_PLEASE;\n break;\n case APP_STATUS_INDICATION_FULLCHARGE:\n id = AUD_ID_BT_CHARGE_FINISH;\n break;\n case APP_STATUS_INDICATION_PAIRSUCCEED:\n id = AUD_ID_BT_PAIRING_SUC;\n break;\n case APP_STATUS_INDICATION_PAIRFAIL:\n id = AUD_ID_BT_PAIRING_FAIL;\n break;\n\n case APP_STATUS_INDICATION_HANGUPCALL:\n id = AUD_ID_BT_CALL_HUNG_UP;\n break;\n\n case APP_STATUS_INDICATION_REFUSECALL:\n id = AUD_ID_BT_CALL_REFUSE;\n isMerging = false;\n break;\n\n case APP_STATUS_INDICATION_ANSWERCALL:\n id = AUD_ID_BT_CALL_ANSWER;\n break;\n\n case APP_STATUS_INDICATION_CLEARSUCCEED:\n id = AUD_ID_BT_CLEAR_SUCCESS;\n break;\n\n case APP_STATUS_INDICATION_CLEARFAIL:\n id = AUD_ID_BT_CLEAR_FAIL;\n break;\n case APP_STATUS_INDICATION_INCOMINGCALL:\n id = AUD_ID_BT_CALL_INCOMING_CALL;\n break;\n case APP_STATUS_INDICATION_BOTHSCAN:\n id = AUD_ID_BT_PAIR_ENABLE;\n break;\n case APP_STATUS_INDICATION_WARNING:\n id = AUD_ID_BT_WARNING;\n break;\n case APP_STATUS_INDICATION_ALEXA_START:\n id = AUDIO_ID_BT_ALEXA_START;\n break;\n case APP_STATUS_INDICATION_ALEXA_STOP:\n id = AUDIO_ID_BT_ALEXA_STOP;\n break;\n case APP_STATUS_INDICATION_GSOUND_MIC_OPEN:\n id = AUDIO_ID_BT_GSOUND_MIC_OPEN;\n break;\n case APP_STATUS_INDICATION_GSOUND_MIC_CLOSE:\n id = AUDIO_ID_BT_GSOUND_MIC_CLOSE;\n break;\n case APP_STATUS_INDICATION_GSOUND_NC:\n id = AUDIO_ID_BT_GSOUND_NC;\n break;\n#ifdef __BT_WARNING_TONE_MERGE_INTO_STREAM_SBC__\n case APP_STATUS_RING_WARNING:\n id = AUD_ID_RING_WARNING;\n break;\n#endif\n case APP_STATUS_INDICATION_MUTE:\n id = AUDIO_ID_BT_MUTE;\n break;\n#ifdef __INTERACTION__\n case APP_STATUS_INDICATION_FINDME:\n id = AUD_ID_BT_FINDME;\n break;\n#endif\n case APP_STATUS_INDICATION_FIND_MY_BUDS:\n id = AUDIO_ID_FIND_MY_BUDS;\n break;\n case APP_STATUS_INDICATION_TILE_FIND:\n id = AUDIO_ID_FIND_TILE;\n break;\n case APP_STATUS_INDICATION_DUDU:\n id = AUDIO_ID_BT_DUDU;\n break;\n case APP_STATUS_INDICATION_DU:\n id = AUDIO_ID_BT_DU;\n break;\n default:\n break;\n }\n }\n\n uint16_t aud_pram = 0;\n if (isMerging) {\n aud_pram |= PROMOT_ID_BIT_MASK_MERGING;\n }\n#ifdef BT_USB_AUDIO_DUAL_MODE\n if (!btusb_is_usb_mode()) {\n#if defined(IBRT)\n app_ibrt_if_voice_report_handler(id, aud_pram);\n#else\n trigger_media_play(id, device_id, aud_pram);\n#endif\n }\n\n#else\n#if defined(IBRT)\n aud_pram |= PROMOT_ID_BIT_MASK_CHNLSEl_ALL;\n app_ibrt_if_voice_report_handler(id, aud_pram);\n#else\n trigger_media_play(id, device_id, aud_pram);\n#endif\n#endif\n\n return 0;\n}\n\nextern \"C\" int app_voice_report(APP_STATUS_INDICATION_T status,\n uint8_t device_id) {\n return app_voice_report_handler(status, device_id, true);\n}\n\nextern \"C\" int app_voice_report_generic(APP_STATUS_INDICATION_T status,\n uint8_t device_id, uint8_t isMerging) {\n return app_voice_report_handler(status, device_id, isMerging);\n}\n\nextern \"C\" int app_voice_stop(APP_STATUS_INDICATION_T status,\n uint8_t device_id) {\n AUD_ID_ENUM id = MAX_RECORD_NUM;\n\n TRACE(2, \"%s %d\", __func__, status);\n\n if (status == APP_STATUS_INDICATION_FIND_MY_BUDS)\n id = AUDIO_ID_FIND_MY_BUDS;\n\n if (id != MAX_RECORD_NUM)\n trigger_media_stop(id, device_id);\n\n return 0;\n}\n\n#endif\n#if 1 //! defined(BLE_ONLY_ENABLED)\n\nstatic void app_poweron_normal(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n g_pwron_case = APP_POWERON_CASE_NORMAL;\n\n signal_send_to_main_thread(0x2);\n}\nstatic void app_poweron_scan(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n g_pwron_case = APP_POWERON_CASE_BOTHSCAN;\n\n signal_send_to_main_thread(0x2);\n}\n#endif\n\n#if 0 // def __ENGINEER_MODE_SUPPORT__\n#if !defined(BLE_ONLY_ENABLED)\nstatic void app_poweron_factorymode(APP_KEY_STATUS *status, void *param)\n{\n TRACE(3,\"%s %d,%d\",__func__, status->code, status->event);\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT);\n app_factorymode_enter();\n}\n#endif\n#endif\n\n#ifndef __POWERKEY_CTRL_ONOFF_ONLY__\nstatic bool g_pwron_finished = false;\nstatic void app_poweron_finished(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n g_pwron_finished = true;\n signal_send_to_main_thread(0x2);\n}\n#endif\n\nvoid app_poweron_wait_finished(void) {\n#ifndef __POWERKEY_CTRL_ONOFF_ONLY__\n if (!g_pwron_finished)\n#endif\n {\n osSignalWait(0x2, osWaitForever);\n }\n}\n\n#if defined(__POWERKEY_CTRL_ONOFF_ONLY__)\nvoid app_bt_key_shutdown(APP_KEY_STATUS *status, void *param);\nconst APP_KEY_HANDLE pwron_key_handle_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_UP},\n \"power on: shutdown\",\n app_bt_key_shutdown,\n NULL},\n};\n#elif defined(__ENGINEER_MODE_SUPPORT__)\nconst APP_KEY_HANDLE pwron_key_handle_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_INITUP},\n \"power on: normal\",\n app_poweron_normal,\n NULL},\n#if !defined(BLE_ONLY_ENABLED)\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_INITLONGPRESS},\n \"power on: both scan\",\n app_poweron_scan,\n NULL},\n// {{APP_KEY_CODE_PWR,APP_KEY_EVENT_INITLONGLONGPRESS},\"power on: factory\n// mode\", app_poweron_factorymode , NULL},\n#endif\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_INITFINISHED},\n \"power on: finished\",\n app_poweron_finished,\n NULL},\n};\n#else\nconst APP_KEY_HANDLE pwron_key_handle_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_INITUP},\n \"power on: normal\",\n app_poweron_normal,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_INITLONGPRESS},\n \"power on: both scan\",\n app_poweron_scan,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_INITFINISHED},\n \"power on: finished\",\n app_poweron_finished,\n NULL},\n};\n#endif\n\n#ifndef APP_TEST_MODE\nstatic void app_poweron_key_init(void) {\n uint8_t i = 0;\n TRACE(1, \"%s\", __func__);\n\n for (i = 0; i < (sizeof(pwron_key_handle_cfg) / sizeof(APP_KEY_HANDLE));\n i++) {\n app_key_handle_registration(&pwron_key_handle_cfg[i]);\n }\n}\n\nstatic uint8_t app_poweron_wait_case(void) {\n\n#ifdef __POWERKEY_CTRL_ONOFF_ONLY__\n g_pwron_case = APP_POWERON_CASE_NORMAL;\n#else\n uint32_t stime = 0, etime = 0;\n\n TRACE(1, \"poweron_wait_case enter:%d\", g_pwron_case);\n if (g_pwron_case == APP_POWERON_CASE_INVALID) {\n stime = hal_sys_timer_get();\n osSignalWait(0x2, POWERON_PRESSMAXTIME_THRESHOLD_MS);\n etime = hal_sys_timer_get();\n }\n TRACE(2, \"powon raw case:%d time:%d\", g_pwron_case,\n TICKS_TO_MS(etime - stime));\n#endif\n return g_pwron_case;\n}\n#endif\n\nstatic void app_wait_stack_ready(void) {\n uint32_t stime, etime;\n stime = hal_sys_timer_get();\n osSignalWait(0x3, 1000);\n etime = hal_sys_timer_get();\n TRACE(1, \"app_wait_stack_ready: wait:%d ms\", TICKS_TO_MS(etime - stime));\n\n app_stack_ready_cb();\n}\n\nextern \"C\" int system_shutdown(void);\nint app_shutdown(void) {\n system_shutdown();\n return 0;\n}\n\nint system_reset(void);\nint app_reset(void) {\n system_reset();\n return 0;\n}\n\nstatic void app_postponed_reset_timer_handler(void const *param);\nosTimerDef(APP_POSTPONED_RESET_TIMER, app_postponed_reset_timer_handler);\nstatic osTimerId app_postponed_reset_timer = NULL;\n#define APP_RESET_PONTPONED_TIME_IN_MS 2000\nstatic void app_postponed_reset_timer_handler(void const *param) {\n // hal_cmu_sys_reboot();\n app_reset();\n}\n\nvoid app_start_postponed_reset(void) {\n if (NULL == app_postponed_reset_timer) {\n app_postponed_reset_timer =\n osTimerCreate(osTimer(APP_POSTPONED_RESET_TIMER), osTimerOnce, NULL);\n }\n\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_ENTER_HIDE_BOOT);\n\n osTimerStart(app_postponed_reset_timer, APP_RESET_PONTPONED_TIME_IN_MS);\n}\n\nvoid app_bt_key_shutdown(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n#ifdef __POWERKEY_CTRL_ONOFF_ONLY__\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT);\n app_reset();\n#else\n app_shutdown();\n#endif\n}\n\nvoid app_bt_key_enter_testmode(APP_KEY_STATUS *status, void *param) {\n TRACE(1, \"%s\\n\", __FUNCTION__);\n\n if (app_status_indication_get() == APP_STATUS_INDICATION_BOTHSCAN) {\n#ifdef __FACTORY_MODE_SUPPORT__\n app_factorymode_bt_signalingtest(status, param);\n#endif\n }\n}\n\nvoid app_bt_key_enter_nosignal_mode(APP_KEY_STATUS *status, void *param) {\n TRACE(1, \"%s\\n\", __FUNCTION__);\n if (app_status_indication_get() == APP_STATUS_INDICATION_BOTHSCAN) {\n#ifdef __FACTORY_MODE_SUPPORT__\n app_factorymode_bt_nosignalingtest(status, param);\n#endif\n }\n}\n\nextern \"C\" void OS_NotifyEvm(void);\n\n#define PRESS_KEY_TO_ENTER_OTA_INTERVEL (15000) // press key 15s enter to ota\n#define PRESS_KEY_TO_ENTER_OTA_REPEAT_CNT \\\n ((PRESS_KEY_TO_ENTER_OTA_INTERVEL - 2000) / 500)\nvoid app_otaMode_enter(APP_KEY_STATUS *status, void *param) {\n TRACE(1, \"%s\", __func__);\n\n hal_norflash_disable_protection(HAL_NORFLASH_ID_0);\n\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_ENTER_HIDE_BOOT);\n#ifdef __KMATE106__\n app_status_indication_set(APP_STATUS_INDICATION_OTA);\n app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n osDelay(1200);\n#endif\n hal_cmu_sys_reboot();\n}\n\n#ifdef __USB_COMM__\nvoid app_usb_cdc_comm_key_handler(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT);\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_CDC_COMM);\n pmu_usb_config(PMU_USB_CONFIG_TYPE_DEVICE);\n hal_cmu_reset_set(HAL_CMU_MOD_GLOBAL);\n}\n#endif\n\n#if 0\nvoid app_dfu_key_handler(APP_KEY_STATUS *status, void *param)\n{\n TRACE(1,\"%s \",__func__);\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT);\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_FORCE_USB_DLD);\n pmu_usb_config(PMU_USB_CONFIG_TYPE_DEVICE);\n hal_cmu_reset_set(HAL_CMU_MOD_GLOBAL);\n}\n#else\nvoid app_dfu_key_handler(APP_KEY_STATUS *status, void *param) {\n TRACE(1, \"%s \", __func__);\n hal_sw_bootmode_clear(0xffffffff);\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_FORCE_USB_DLD |\n HAL_SW_BOOTMODE_SKIP_FLASH_BOOT);\n pmu_usb_config(PMU_USB_CONFIG_TYPE_DEVICE);\n hal_cmu_reset_set(HAL_CMU_MOD_GLOBAL);\n}\n#endif\n\nvoid app_ota_key_handler(APP_KEY_STATUS *status, void *param) {\n static uint32_t time = hal_sys_timer_get();\n static uint16_t cnt = 0;\n\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n if (TICKS_TO_MS(hal_sys_timer_get() - time) >\n 600) // 600 = (repeat key intervel)500 + (margin)100\n cnt = 0;\n else\n cnt++;\n\n if (cnt == PRESS_KEY_TO_ENTER_OTA_REPEAT_CNT) {\n app_otaMode_enter(NULL, NULL);\n }\n\n time = hal_sys_timer_get();\n}\nextern \"C\" void app_bt_key(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n#define DEBUG_CODE_USE 0\n switch (status->event) {\n case APP_KEY_EVENT_CLICK:\n TRACE(0, \"first blood!\");\n#if DEBUG_CODE_USE\n if (status->code == APP_KEY_CODE_PWR) {\n#ifdef __INTERCONNECTION__\n // add favorite music\n // app_interconnection_handle_favorite_music_through_ccmp(1);\n\n // ask for ota update\n ota_update_request();\n return;\n#else\n static int m = 0;\n if (m == 0) {\n m = 1;\n hal_iomux_set_analog_i2c();\n } else {\n m = 0;\n hal_iomux_set_uart0();\n }\n#endif\n }\n#endif\n break;\n case APP_KEY_EVENT_DOUBLECLICK:\n TRACE(0, \"double kill\");\n#if DEBUG_CODE_USE\n if (status->code == APP_KEY_CODE_PWR) {\n#ifdef __INTERCONNECTION__\n // play favorite music\n app_interconnection_handle_favorite_music_through_ccmp(2);\n#else\n app_otaMode_enter(NULL, NULL);\n#endif\n return;\n }\n#endif\n break;\n case APP_KEY_EVENT_TRIPLECLICK:\n TRACE(0, \"triple kill\");\n if (status->code == APP_KEY_CODE_PWR) {\n\n#ifndef __BT_ONE_BRING_TWO__\n if (btif_me_get_activeCons() < 1) {\n#else\n if (btif_me_get_activeCons() < 2) {\n#endif\n app_bt_accessmode_set(BTIF_BT_DEFAULT_ACCESS_MODE_PAIR);\n#ifdef __INTERCONNECTION__\n app_interceonnection_start_discoverable_adv(\n INTERCONNECTION_BLE_FAST_ADVERTISING_INTERVAL,\n APP_INTERCONNECTION_FAST_ADV_TIMEOUT_IN_MS);\n return;\n#endif\n#ifdef GFPS_ENABLED\n app_enter_fastpairing_mode();\n#endif\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n }\n return;\n }\n break;\n case APP_KEY_EVENT_ULTRACLICK:\n TRACE(0, \"ultra kill\");\n break;\n case APP_KEY_EVENT_RAMPAGECLICK:\n TRACE(0, \"rampage kill!you are crazy!\");\n break;\n\n case APP_KEY_EVENT_UP:\n break;\n }\n#if 0 // def __FACTORY_MODE_SUPPORT__\n if (app_status_indication_get() == APP_STATUS_INDICATION_BOTHSCAN && (status->event == APP_KEY_EVENT_DOUBLECLICK)){\n app_factorymode_languageswitch_proc();\n }else\n#endif\n {\n#ifdef __SUPPORT_ANC_SINGLE_MODE_WITHOUT_BT__\n if (!anc_single_mode_on)\n#endif\n bt_key_send(status);\n }\n}\n\nvoid app_voice_assistant_key(APP_KEY_STATUS *status, void *param) {\n TRACE(2, \"%s event %d\", __func__, status->event);\n#if defined(BISTO_ENABLED) || defined(__AI_VOICE__)\n if (app_ai_manager_is_in_multi_ai_mode()) {\n if (app_ai_manager_spec_get_status_is_in_invalid()) {\n TRACE(0, \"AI feature has been diabled\");\n return;\n }\n\n#ifdef MAI_TYPE_REBOOT_WITHOUT_OEM_APP\n if (app_ai_manager_get_spec_update_flag()) {\n TRACE(0, \"device reboot is ongoing...\");\n return;\n }\n#endif\n\n if (app_ai_manager_is_need_reboot()) {\n TRACE(1, \"%s ai need to reboot\", __func__);\n return;\n }\n\n if (app_ai_manager_voicekey_is_enable()) {\n if (AI_SPEC_GSOUND == app_ai_manager_get_current_spec()) {\n#ifdef BISTO_ENABLED\n gsound_custom_actions_handle_key(status, param);\n#endif\n } else if (AI_SPEC_INIT != app_ai_manager_get_current_spec()) {\n app_ai_key_event_handle(status, 0);\n }\n }\n } else {\n app_ai_key_event_handle(status, 0);\n#if defined(BISTO_ENABLED)\n gsound_custom_actions_handle_key(status, param);\n#endif\n }\n#endif\n}\n\n#ifdef IS_MULTI_AI_ENABLED\nvoid app_voice_gva_onoff_key(APP_KEY_STATUS *status, void *param) {\n uint8_t current_ai_spec = app_ai_manager_get_current_spec();\n\n TRACE(2, \"%s current_ai_spec %d\", __func__, current_ai_spec);\n if (current_ai_spec == AI_SPEC_INIT) {\n app_ai_manager_enable(true, AI_SPEC_GSOUND);\n } else if (current_ai_spec == AI_SPEC_GSOUND) {\n app_ai_manager_enable(false, AI_SPEC_GSOUND);\n } else if (current_ai_spec == AI_SPEC_AMA) {\n app_ai_manager_switch_spec(AI_SPEC_GSOUND);\n }\n app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n}\n\nvoid app_voice_ama_onoff_key(APP_KEY_STATUS *status, void *param) {\n uint8_t current_ai_spec = app_ai_manager_get_current_spec();\n\n TRACE(2, \"%s current_ai_spec %d\", __func__, current_ai_spec);\n if (current_ai_spec == AI_SPEC_INIT) {\n app_ai_manager_enable(true, AI_SPEC_AMA);\n } else if (current_ai_spec == AI_SPEC_AMA) {\n app_ai_manager_enable(false, AI_SPEC_AMA);\n } else if (current_ai_spec == AI_SPEC_GSOUND) {\n app_ai_manager_switch_spec(AI_SPEC_AMA);\n }\n app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n}\n#endif\n\n#if defined(BT_USB_AUDIO_DUAL_MODE_TEST) && defined(BT_USB_AUDIO_DUAL_MODE)\nextern \"C\" void test_btusb_switch(void);\nvoid app_btusb_audio_dual_mode_test(APP_KEY_STATUS *status, void *param) {\n TRACE(0, \"test_btusb_switch\");\n test_btusb_switch();\n}\n#endif\n\nextern void switch_dualmic_status(void);\n\nvoid app_switch_dualmic_key(APP_KEY_STATUS *status, void *param) {\n switch_dualmic_status();\n}\n\n#ifdef POWERKEY_I2C_SWITCH\nextern void app_factorymode_i2c_switch(APP_KEY_STATUS *status, void *param);\n#endif\n\n#ifdef TILE_DATAPATH\nextern \"C\" void app_tile_key_handler(APP_KEY_STATUS *status, void *param);\n#endif\n\n#ifdef __POWERKEY_CTRL_ONOFF_ONLY__\n#if defined(__APP_KEY_FN_STYLE_A__)\nconst APP_KEY_HANDLE app_key_handle_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_UP},\n \"bt function key\",\n app_bt_key_shutdown,\n NULL},\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_LONGPRESS},\n \"bt function key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_UP}, \"bt function key\", app_bt_key, NULL},\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_DOUBLECLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_UP},\n \"bt volume up key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_LONGPRESS},\n \"bt play backward key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN3, APP_KEY_EVENT_UP},\n \"bt volume down key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN3, APP_KEY_EVENT_LONGPRESS},\n \"bt play forward key\",\n app_bt_key,\n NULL},\n#ifdef SUPPORT_SIRI\n {{APP_KEY_CODE_NONE, APP_KEY_EVENT_NONE},\n \"none function key\",\n app_bt_key,\n NULL},\n#endif\n\n};\n#else // #elif defined(__APP_KEY_FN_STYLE_B__)\nconst APP_KEY_HANDLE app_key_handle_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_UP},\n \"bt function key\",\n app_bt_key_shutdown,\n NULL},\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_LONGPRESS},\n \"bt function key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_UP}, \"bt function key\", app_bt_key, NULL},\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_DOUBLECLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_REPEAT},\n \"bt volume up key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_UP},\n \"bt play backward key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN3, APP_KEY_EVENT_REPEAT},\n \"bt volume down key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN3, APP_KEY_EVENT_UP},\n \"bt play forward key\",\n app_bt_key,\n NULL},\n#ifdef SUPPORT_SIRI\n {{APP_KEY_CODE_NONE, APP_KEY_EVENT_NONE},\n \"none function key\",\n app_bt_key,\n NULL},\n#endif\n\n};\n#endif\n#else\n#if defined(__APP_KEY_FN_STYLE_A__)\n//--\nconst APP_KEY_HANDLE app_key_handle_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGLONGPRESS},\n \"bt function key\",\n app_bt_key_shutdown,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGPRESS},\n \"bt function key\",\n app_bt_key,\n NULL},\n#if defined(BT_USB_AUDIO_DUAL_MODE_TEST) && defined(BT_USB_AUDIO_DUAL_MODE)\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n#ifdef RB_CODEC\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK},\n \"bt function key\",\n app_switch_player_key,\n NULL},\n#else\n//{{APP_KEY_CODE_PWR,APP_KEY_EVENT_CLICK},\"btusb mode switch\n// key.\",app_btusb_audio_dual_mode_test, NULL},\n#endif\n#endif\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_DOUBLECLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n#ifdef TILE_DATAPATH\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_TRIPLECLICK},\n \"bt function key\",\n app_tile_key_handler,\n NULL},\n#else\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_TRIPLECLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n#endif\n#if RAMPAGECLICK_TEST_MODE\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_ULTRACLICK},\n \"bt function key\",\n app_bt_key_enter_nosignal_mode,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_RAMPAGECLICK},\n \"bt function key\",\n app_bt_key_enter_testmode,\n NULL},\n#endif\n#ifdef POWERKEY_I2C_SWITCH\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_RAMPAGECLICK},\n \"bt i2c key\",\n app_factorymode_i2c_switch,\n NULL},\n#endif\n//{{APP_KEY_CODE_FN1,APP_KEY_EVENT_UP},\"bt volume up key\",app_bt_key, NULL},\n//{{APP_KEY_CODE_FN1,APP_KEY_EVENT_LONGPRESS},\"bt play backward key\",app_bt_key,\n// NULL},\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_DOUBLECLICK},\n \"bt mode src snk key\",\n app_bt_key,\n NULL},\n#endif\n //{{APP_KEY_CODE_FN2,APP_KEY_EVENT_UP},\"bt volume down key\",app_bt_key, NULL},\n //{{APP_KEY_CODE_FN2,APP_KEY_EVENT_LONGPRESS},\"bt play forward\n // key\",app_bt_key, NULL},\n //{{APP_KEY_CODE_FN15,APP_KEY_EVENT_UP},\"bt volume down key\",app_bt_key,\n // NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n\n#ifdef SUPPORT_SIRI\n {{APP_KEY_CODE_NONE, APP_KEY_EVENT_NONE},\n \"none function key\",\n app_bt_key,\n NULL},\n#endif\n#if defined(__BT_ANC_KEY__) && defined(ANC_APP)\n#if defined(IBRT)\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK}, \"bt anc key\", app_anc_key, NULL},\n#else\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_CLICK}, \"bt anc key\", app_anc_key, NULL},\n#endif\n#endif\n#ifdef TILE_DATAPATH\n {{APP_KEY_CODE_TILE, APP_KEY_EVENT_DOWN},\n \"tile function key\",\n app_tile_key_handler,\n NULL},\n {{APP_KEY_CODE_TILE, APP_KEY_EVENT_UP},\n \"tile function key\",\n app_tile_key_handler,\n NULL},\n#endif\n\n#if defined(VOICE_DATAPATH) || defined(__AI_VOICE__)\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_FIRST_DOWN},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n#if defined(IS_GSOUND_BUTTION_HANDLER_WORKAROUND_ENABLED) || \\\n defined(PUSH_AND_HOLD_ENABLED) || defined(__TENCENT_VOICE__)\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_UP},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n#endif\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_UP_AFTER_LONGPRESS},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_LONGPRESS},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_CLICK},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_DOUBLECLICK},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n#endif\n#ifdef IS_MULTI_AI_ENABLED\n {{APP_KEY_CODE_FN13, APP_KEY_EVENT_CLICK},\n \"gva on-off key\",\n app_voice_gva_onoff_key,\n NULL},\n {{APP_KEY_CODE_FN14, APP_KEY_EVENT_CLICK},\n \"ama on-off key\",\n app_voice_ama_onoff_key,\n NULL},\n#endif\n#if defined(BT_USB_AUDIO_DUAL_MODE_TEST) && defined(BT_USB_AUDIO_DUAL_MODE)\n {{APP_KEY_CODE_FN15, APP_KEY_EVENT_CLICK},\n \"btusb mode switch key.\",\n app_btusb_audio_dual_mode_test,\n NULL},\n#endif\n};\n#else // #elif defined(__APP_KEY_FN_STYLE_B__)\nconst APP_KEY_HANDLE app_key_handle_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGLONGPRESS},\n \"bt function key\",\n app_bt_key_shutdown,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGPRESS},\n \"bt function key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_DOUBLECLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_TRIPLECLICK},\n \"bt function key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_ULTRACLICK},\n \"bt function key\",\n app_bt_key_enter_nosignal_mode,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_RAMPAGECLICK},\n \"bt function key\",\n app_bt_key_enter_testmode,\n NULL},\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_REPEAT},\n \"bt volume up key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_UP},\n \"bt play backward key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_REPEAT},\n \"bt volume down key\",\n app_bt_key,\n NULL},\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_UP},\n \"bt play forward key\",\n app_bt_key,\n NULL},\n#ifdef SUPPORT_SIRI\n {{APP_KEY_CODE_NONE, APP_KEY_EVENT_NONE},\n \"none function key\",\n app_bt_key,\n NULL},\n#endif\n\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_FIRST_DOWN},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n#if defined(IS_GSOUND_BUTTION_HANDLER_WORKAROUND_ENABLED) || \\\n defined(PUSH_AND_HOLD_ENABLED)\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_UP},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n#endif\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_UP_AFTER_LONGPRESS},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_LONGPRESS},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_CLICK},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n {{APP_KEY_CODE_GOOGLE, APP_KEY_EVENT_DOUBLECLICK},\n \"google assistant key\",\n app_voice_assistant_key,\n NULL},\n};\n#endif\n#endif\n\nextern struct BT_DEVICE_T app_bt_device;\nextern uint8_t avrcp_get_media_status(void);\n/******************************delay_report_tone_timer*********************************************************/\nAPP_STATUS_INDICATION_T delay_report_tone_num = APP_STATUS_INDICATION_NUM;\nosTimerId delay_report_toneid = NULL;\nvoid startdelay_report_tone(int ms, APP_STATUS_INDICATION_T status);\nvoid stopdelay_report_tone(void);\nstatic void delay_report_tonefun(const void *);\nosTimerDef(defdelay_report_tone, delay_report_tonefun);\nvoid delay_report_toneinit(void) {\n delay_report_toneid =\n osTimerCreate(osTimer(defdelay_report_tone), osTimerOnce, (void *)0);\n}\nstatic void delay_report_tonefun(const void *) {\n TRACE(3, \"\\n\\n!!!!!!enter %s,delay_report_tone_num = %d \\n\\n\", __func__,\n delay_report_tone_num);\n if (MobileLinkLose_reboot) {\n return;\n }\n // static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n // uint8_t default_mobileaddr[6] = {0x0,0x0,0x0,0x0,0x0,0x0};\n // DUMP8(\"%02x \", p_ibrt_ctrl->mobile_addr.address, 6);\n // app_status_indication_set(APP_STATUS_INDICATION_TWS_CONNECTED);\n if (Curr_Is_Master()) {\n app_ibrt_sync_volume_info();\n }\n if (delay_report_tone_num == APP_STATUS_INDICATION_DUDU) {\n if (Curr_Is_Master() && (avrcp_get_media_status() != 1) &&\n (app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)) {\n app_voice_report(delay_report_tone_num, 0);\n /*if((!memcmp(default_mobileaddr,p_ibrt_ctrl->mobile_addr.address,6))&&(p_ibrt_ctrl->access_mode\n == 0x3)){\n TRACE(0,\"AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA\");\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN,0);\n }*/\n if ((nv_record_get_paired_dev_count() == 1)) {\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n }\n }\n }\n delay_report_tone_num = APP_STATUS_INDICATION_NUM;\n}\n\nvoid startdelay_report_tone(int ms, APP_STATUS_INDICATION_T status) {\n TRACE(3, \"\\n\\n !!!!!!!!!!start %s\\n\\n\", __func__);\n delay_report_tone_num = status;\n osTimerStart(delay_report_toneid, ms);\n}\n\n/********************************delay_report_tone_timer*******************************************************/\n\n/******************************low_latlatency_delay_switch_timer*********************************************************/\nuint8_t latency_mode_is_open = false;\n\nosTimerId low_latlatency_delay_switchid = NULL;\nvoid startlow_latlatency_delay_switch(int ms);\nvoid stoplow_latlatency_delay_switch(void);\nstatic void low_latlatency_delay_switchfun(const void *);\nosTimerDef(deflow_latlatency_delay_switch, low_latlatency_delay_switchfun);\nvoid low_latlatency_delay_switchinit(void) {\n low_latlatency_delay_switchid = osTimerCreate(\n osTimer(deflow_latlatency_delay_switch), osTimerOnce, (void *)0);\n}\n\nvoid app_ibrt_ui_test_mtu_change_sync_notify(void) {\n extern volatile uint8_t avdtp_playback_delay_sbc_mtu;\n extern volatile uint8_t avdtp_playback_delay_aac_mtu;\n\n TRACE(3, \"SWITC GAME MODE !!!latency_mode_is_open = %d###\",\n latency_mode_is_open);\n if (!latency_mode_is_open) {\n avdtp_playback_delay_sbc_mtu = 32;\n avdtp_playback_delay_aac_mtu = 3;\n app_ibrt_if_force_audio_retrigger_slave_sync();\n } else {\n avdtp_playback_delay_sbc_mtu = 50;\n avdtp_playback_delay_aac_mtu = 6;\n app_ibrt_if_force_audio_retrigger_slave_sync();\n }\n latency_mode_is_open = !latency_mode_is_open;\n TRACE(3, \"set SBC_MTU=%d AAC_MTU=%d\\n\", avdtp_playback_delay_sbc_mtu,\n avdtp_playback_delay_aac_mtu);\n}\n\nstatic void low_latlatency_delay_switchfun(const void *) {\n extern volatile uint8_t avdtp_playback_delay_sbc_mtu;\n extern volatile uint8_t avdtp_playback_delay_aac_mtu;\n\n latency_mode_is_open = !latency_mode_is_open;\n if (latency_mode_is_open) {\n avdtp_playback_delay_sbc_mtu = 32;\n avdtp_playback_delay_aac_mtu = 3;\n TRACE(3, \"%s latency_mode_is_open!!\", __func__);\n } else {\n avdtp_playback_delay_sbc_mtu = 50;\n avdtp_playback_delay_aac_mtu = 6;\n TRACE(3, \"%s latency_mode_is_close!!\", __func__);\n }\n app_ibrt_if_force_audio_retrigger();\n app_ibrt_customif_test3_cmd_send(&latency_mode_is_open, 1);\n}\n\nvoid startlow_latlatency_delay_switch(int ms) {\n osTimerStart(low_latlatency_delay_switchid, ms);\n}\n\nvoid stoplow_latlatency_delay_switch(void) {\n osTimerStop(low_latlatency_delay_switchid);\n}\n\n/********************************low_latlatency_delay_switch_timer*******************************************************/\n\nvoid app_latency_switch_key_handler(void) {\n\n if ((btif_me_get_activeCons() > 0) &&\n (app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE) &&\n (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] ==\n BTIF_HF_CALL_SETUP_NONE)) {\n if (latency_mode_is_open) {\n app_voice_report(APP_STATUS_INDICATION_ALEXA_STOP,\n 0); // close latlatency mode\n } else {\n app_voice_report(APP_STATUS_INDICATION_ALEXA_START,\n 0); // close latlatency mode\n }\n startlow_latlatency_delay_switch(1500);\n }\n}\n\nvoid stopAuto_Shutdowm_Timer(void);\n\nbool MobileLinkLose_reboot = false;\nbool IsMobileLinkLossing = FALSE;\nbool IsTwsLinkLossing = FALSE;\nbool enterpairing_flag = false;\nbool IsTwsLinkdiscon = false;\nbool reconnect_fail_fail_flag = false;\nstatic void app_enterpairing_timehandler(void const *param);\nosTimerDef(APP_ENTERPAIRING_TIMER, app_enterpairing_timehandler);\nstatic osTimerId enterpairing_timer = NULL;\nstatic void app_enterpairing_timehandler(void const *param) {\n static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n static app_ibrt_ui_t *p_ui_ctrl = app_ibrt_ui_get_ctx();\n TRACE(3, \"xqd log --%s\\n\", __func__);\n TRACE(3, \"MyLog: is_tws_con = %d, nv_role = 0x%x\",\n app_tws_ibrt_tws_link_connected(), p_ibrt_ctrl->nv_role);\n reconnect_fail_fail_flag = true;\n enterpairing_flag = false;\n if (IsMobileLinkLossing) {\n TRACE(3, \"xqd---log:return evt 0!!!\\n\");\n return;\n }\n if (p_ui_ctrl->box_state == IBRT_IN_BOX_CLOSED) {\n TRACE(3, \"xqd---log:return evt 1!!!\\n\");\n return;\n }\n if ((app_battery_is_charging()) || ((app_device_bt_is_connected()) &&\n (app_tws_ibrt_mobile_link_connected()) &&\n (app_tws_ibrt_mobile_link_connected())))\n return;\n\n if (app_tws_ibrt_mobile_link_connected() ||\n app_tws_ibrt_slave_ibrt_link_connected()) {\n TRACE(3, \"xqd---log:return evt 2!!!\\n\");\n return;\n }\n\n if (app_ibrt_ui_get_enter_pairing_mode()) {\n TRACE(3, \"xqd---log:return evt 3!!!\\n\");\n if ((IBRT_UNKNOW != p_ibrt_ctrl->nv_role) &&\n (nv_record_get_paired_dev_count() >= 2)) {\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n }\n app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n return;\n }\n\n if (app_tws_ibrt_tws_link_connected() &&\n (p_ibrt_ctrl->current_role == IBRT_MASTER)) {\n TRACE(3, \"xqd---log:return evt 4!!!\\n\");\n\n // p_ui_ctrl->config.enter_pairing_on_reconnect_mobile_failed = true;\n // p_ui_ctrl->config.nv_slave_enter_pairing_on_mobile_disconnect = true;\n // app_ibrt_if_enter_freeman_pairing();\n // app_ibrt_if_enter_pairing_after_tws_connected();\n app_ibrt_ui_set_enter_pairing_mode(IBRT_CONNECT_MOBILE_FAILED);\n app_ibrt_ui_judge_scan_type(IBRT_CONNECTE_TRIGGER, MOBILE_LINK, 0);\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n } else if ((!app_tws_ibrt_tws_link_connected()) &&\n (p_ibrt_ctrl->nv_role == IBRT_MASTER) &&\n (p_ibrt_ctrl->access_mode != 0x3)) {\n TRACE(3, \"xqd---log:return evt 5!!!\\n\");\n app_ibrt_ui_set_enter_pairing_mode(IBRT_CONNECT_MOBILE_FAILED);\n app_ibrt_ui_judge_scan_type(IBRT_CONNECTE_TRIGGER, MOBILE_LINK, 0);\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n } else if ((!app_tws_ibrt_tws_link_connected()) &&\n (p_ibrt_ctrl->nv_role == IBRT_SLAVE)) {\n app_ibrt_ui_set_enter_pairing_mode(IBRT_CONNECT_MOBILE_FAILED);\n app_ibrt_ui_judge_scan_type(IBRT_CONNECTE_TRIGGER, MOBILE_LINK, 0);\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n }\n}\nvoid app_enterpairing_timer_start(void) {\n static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n TRACE(3,\n \"xqd log --app_enterpairing_timer_start, enterpairing_flag = \"\n \"%d,nv_role = %d\\n\",\n enterpairing_flag, p_ibrt_ctrl->nv_role);\n if (p_ibrt_ctrl->nv_role == IBRT_UNKNOW)\n return;\n\n enterpairing_flag = true;\n\n osTimerStop(enterpairing_timer);\n osTimerStart(enterpairing_timer, 11000);\n}\nvoid app_enterpairing_timer_stop(void) {\n TRACE(3, \"xqd log --app_enterpairing_timer_stop\\n\");\n if (enterpairing_flag)\n osTimerStop(enterpairing_timer);\n}\nvoid app_enterpairing_timer_open(void) {\n if (NULL == enterpairing_timer) {\n enterpairing_timer =\n osTimerCreate(osTimer(APP_ENTERPAIRING_TIMER), osTimerOnce, (void *)0);\n }\n}\nextern bool IsMobileLinkLossing;\nextern bool IsTwsLinkLossing;\nbool LINKLOSE_REBOOT_ENABLE = false;\n\nosTimerId Auto_Shutdowm_Timerid = NULL;\nvoid startAuto_Shutdowm_Timer(int ms);\n\nstatic void Auto_Shutdowm_Timerfun(const void *);\nosTimerDef(defAuto_Shutdowm_Timer, Auto_Shutdowm_Timerfun);\nvoid Auto_Shutdowm_Timerinit(void) {\n Auto_Shutdowm_Timerid = osTimerCreate(osTimer(defAuto_Shutdowm_Timer),\n osTimerPeriodic, (void *)0);\n startAuto_Shutdowm_Timer(5000);\n}\nextern struct btdevice_volume *btdevice_volume_p;\n\nstatic void Auto_Shutdowm_Timerfun(const void *) {\n static uint32_t auto_shutdown_cnt = 0;\n static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n static app_ibrt_ui_t *p_ui_ctrl = app_ibrt_ui_get_ctx();\n struct nvrecord_env_t *nvrecord_env;\n nv_record_env_get(&nvrecord_env);\n static uint8_t trace_cnt = 0;\n APP_BATTERY_MV_T currvolt = 0;\n // static uint8_t charge_full_timeout_cnt = 0;\n trace_cnt++;\n if (trace_cnt >= 2) {\n trace_cnt = 0;\n /*\n TRACE(0,\"xqd---log:curr_role = %d,nv_role = %d,box_state = %d,access_mode =\n %d,channel =\n %d\",p_ibrt_ctrl->current_role,p_ibrt_ctrl->nv_role,p_ui_ctrl->box_state,p_ibrt_ctrl->access_mode,tgt_tws_get_channel_is_right());\n TRACE(0,\"curr_avrcp_status = %d£¬localbat = %d,slave_bat =\n %d\",avrcp_get_media_status(),p_ibrt_ctrl->local_battery_volt,p_ibrt_ctrl->peer_battery_volt);\n TRACE(0,\"a2dp vol : %d\", btdevice_volume_p->a2dp_vol);\n // TRACE(0,\"hfp vol: %d\", btdevice_volume_p->hfp_vol);\n TRACE(0,\"qxw---nv_ibrt_mode addr:\");\n DUMP8(\"0x%x \", nvrecord_env->ibrt_mode.record.bdAddr.address, 6);\n TRACE(0,\"qxw---peer addr:\");\n DUMP8(\"%02x \", p_ibrt_ctrl->peer_addr.address, 6);\n TRACE(0,\"qxw---local addr:\");\n DUMP8(\"%02x \", p_ibrt_ctrl->local_addr.address, 6);\n TRACE(0,\"qxw---nv_master addr:\");\n DUMP8(\"%02x \", nvrecord_env->master_bdaddr.address, 6);\n TRACE(0,\"qxw---nv_slave addr:\");\n DUMP8(\"%02x \", nvrecord_env->slave_bdaddr.address, 6);*/\n // TRACE(2,\"charge_gpio statu:%d,chargefull_gpio statu:%d,curr_charge status\n // = %d!\",hal_gpio_pin_get_val((enum\n // HAL_GPIO_PIN_T)cfg_hw_charge_indication_cfg.pin),hal_gpio_pin_get_val((enum\n // HAL_GPIO_PIN_T)cfg_hw_charge_full_indication_cfg.pin),app_battery_is_charging());\n }\n\n // TRACE(3,\"GIOI25 = %d,charge sta = %d!!!!!\",hal_gpio_pin_get_val((enum\n // HAL_GPIO_PIN_T)app_battery_charger_full_indicator_cfg.pin),app_battery_is_charging());\n if (app_battery_is_charging()) {\n if ((p_ui_ctrl->box_state != IBRT_IN_BOX_CLOSED)) {\n app_ibrt_ui_event_entry(IBRT_CLOSE_BOX_EVENT);\n }\n }\n app_battery_get_info(&currvolt, NULL, NULL);\n if (p_ui_ctrl->box_state == IBRT_OUT_BOX) {\n if (app_device_bt_is_connected()) {\n IsMobileLinkLossing = FALSE;\n IsTwsLinkLossing = FALSE;\n MobileLinkLose_reboot = FALSE;\n }\n if ((!app_device_bt_is_connected()) &&\n p_ibrt_ctrl->current_role != BTIF_BCR_SLAVE) {\n auto_shutdown_cnt++;\n if (auto_shutdown_cnt == Auto_Shutdowm_TIME / 5) {\n TRACE(0, \"xqd---shutdown!!@@@@@@!!\");\n auto_shutdown_cnt = 0;\n app_bt_power_off_customize();\n }\n } else {\n auto_shutdown_cnt = 0;\n }\n /*if((auto_shutdown_cnt % 4 ==\n 0)&&(MobileLinkLose_reboot)&&(!app_qxw_bt_is_connected())&&(p_ibrt_ctrl->current_role\n != BTIF_BCR_SLAVE)){ app_ibrt_if_event_entry(IBRT_PHONE_CONNECT_EVENT);\n }*/\n } else {\n auto_shutdown_cnt = 0;\n }\n\n#if (QXW_TOUCH_INEAR_DET)\n last_tws_con_status = app_tws_ibrt_tws_link_connected();\n#endif\n}\n\nvoid startAuto_Shutdowm_Timer(int ms) {\n osTimerStart(Auto_Shutdowm_Timerid, ms);\n}\nvoid stopAuto_Shutdowm_Timer(void) {\n TRACE(0, \"%s\", __func__);\n osTimerStop(Auto_Shutdowm_Timerid);\n}\n\n/********************************Auto_Shutdowm_Timer_timer*******************************************************/\nextern void touch_reset(void);\n/*******************************once_delay_event_Timer__timer*********************************************************/\nuint8_t once_event_case = 0;\nosTimerId once_delay_event_Timer_id = NULL;\nvoid startonce_delay_event_Timer_(int ms);\nvoid stoponce_delay_event_Timer_(void);\nstatic void once_delay_event_Timer_fun(const void *);\nosTimerDef(defonce_delay_event_Timer_, once_delay_event_Timer_fun);\nvoid once_delay_event_Timer_init(void) {\n TRACE(3, \"%s\", __func__);\n once_delay_event_Timer_id = osTimerCreate(osTimer(defonce_delay_event_Timer_),\n osTimerOnce, (void *)0);\n}\nstatic void once_delay_event_Timer_fun(const void *) {\n static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n if ((p_ibrt_ctrl->current_role == IBRT_SLAVE)) {\n once_event_case = 0;\n TRACE(3, \"delay_report_tonefun RETURN!!!\");\n return;\n }\n TRACE(3, \"\\n\\n!!!!!!enter %s,mobile_link = %d,event = %d\\n\\n\", __func__,\n app_tws_ibrt_mobile_link_connected(), once_event_case);\n switch (once_event_case) {\n case 1:\n if (/*(avrcp_get_media_status() != 1)&&*/ (\n app_bt_device.a2dp_state[BT_DEVICE_ID_1] == 1) &&\n (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == 0) &&\n (p_ibrt_ctrl->current_role == IBRT_MASTER))\n app_voice_report(APP_STATUS_INDICATION_CONNECTED, 0);\n break;\n case 2:\n if ((IsMobileLinkLossing || app_device_bt_is_connected()))\n break;\n app_voice_report(APP_STATUS_INDICATION_DISCONNECTED, 0);\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n // once_event_case = 3;\n // startonce_delay_event_Timer_(2000);\n break;\n case 3:\n if (IsMobileLinkLossing) {\n return;\n }\n if ((app_device_bt_is_connected()))\n return;\n app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n if (p_ibrt_ctrl->nv_role == IBRT_MASTER) {\n app_ibrt_if_enter_pairing_after_tws_connected();\n } else if (p_ibrt_ctrl->nv_role == IBRT_SLAVE) {\n app_ibrt_ui_set_enter_pairing_mode(IBRT_CONNECT_MOBILE_FAILED);\n app_ibrt_ui_judge_scan_type(IBRT_CONNECTE_TRIGGER, MOBILE_LINK, 0);\n } else if (p_ibrt_ctrl->nv_role == IBRT_UNKNOW) {\n app_ibrt_ui_judge_scan_type(IBRT_FREEMAN_PAIR_TRIGGER, NO_LINK_TYPE,\n IBRT_UI_NO_ERROR);\n app_ibrt_ui_set_freeman_enable();\n }\n break;\n\n case 4:\n if (!app_device_bt_is_connected()) {\n app_voice_report_generic(APP_STATUS_INDICATION_DISCONNECTED, 0, 0);\n }\n LINKLOSE_REBOOT_ENABLE = true;\n break;\n case 5:\n if (!app_device_bt_is_connected() && !app_tws_ibrt_tws_link_connected()) {\n app_voice_report_generic(APP_STATUS_INDICATION_DISCONNECTED, 0, 0);\n }\n LINKLOSE_REBOOT_ENABLE = true;\n break;\n case 8:\n app_ibrt_sync_volume_info();\n break;\n case 9:\n break;\n default:\n break;\n }\n once_event_case = 0;\n}\n\nvoid startonce_delay_event_Timer_(int ms) {\n TRACE(3, \"\\n\\n !!!!!!!!!!start %s\\n\\n\", __func__);\n osTimerStart(once_delay_event_Timer_id, ms);\n}\nvoid stoponce_delay_event_Timer_(void) {\n TRACE(3, \"\\n\\n!!!!!!!!!! stop %s\\n\\n\", __func__);\n osTimerStop(once_delay_event_Timer_id);\n}\n\n/********************************once_delay_event_Timer__timer*******************************************************/\n/***********************************************************************************************/\n\nextern bt_status_t LinkDisconnectDirectly(bool PowerOffFlag);\nvoid a2dp_suspend_music_force(void);\n\nbool app_is_power_off_in_progress(void) {\n return app_poweroff_flag ? TRUE : FALSE;\n}\n\n#if GFPS_ENABLED\n#define APP_GFPS_BATTERY_TIMEROUT_VALUE (10000)\nstatic void app_gfps_battery_show_timeout_timer_cb(void const *n);\nosTimerDef(GFPS_BATTERY_SHOW_TIMEOUT_TIMER,\n app_gfps_battery_show_timeout_timer_cb);\nstatic osTimerId app_gfps_battery_show_timer_id = NULL;\n#include \"app_gfps.h\"\nstatic void app_gfps_battery_show_timeout_timer_cb(void const *n) {\n TRACE(1, \"%s\", __func__);\n app_gfps_set_battery_datatype(HIDE_UI_INDICATION);\n}\n\nvoid app_gfps_battery_show_timer_start() {\n if (app_gfps_battery_show_timer_id == NULL)\n app_gfps_battery_show_timer_id = osTimerCreate(\n osTimer(GFPS_BATTERY_SHOW_TIMEOUT_TIMER), osTimerOnce, NULL);\n osTimerStart(app_gfps_battery_show_timer_id, APP_GFPS_BATTERY_TIMEROUT_VALUE);\n}\n\nvoid app_gfps_battery_show_timer_stop() {\n if (app_gfps_battery_show_timer_id)\n osTimerStop(app_gfps_battery_show_timer_id);\n}\n#endif\n\nint app_deinit(int deinit_case) {\n int nRet = 0;\n TRACE(2, \"%s case:%d\", __func__, deinit_case);\n app_tws_if_trigger_role_switch();\n osDelay(200); // This is a hack; a hackkitttyy hack. To wait for the tws\n // exchange to occur\n#ifdef WL_DET\n app_mic_alg_audioloop(false, APP_SYSFREQ_78M);\n#endif\n\n#ifdef __PC_CMD_UART__\n app_cmd_close();\n#endif\n#if (defined(BTUSB_AUDIO_MODE) || defined(BT_USB_AUDIO_DUAL_MODE))\n if (app_usbaudio_mode_on())\n return 0;\n#endif\n if (!deinit_case) {\n app_poweroff_flag = 1;\n#if defined(APP_LINEIN_A2DP_SOURCE)\n app_audio_sendrequest(APP_A2DP_SOURCE_LINEIN_AUDIO,\n (uint8_t)APP_BT_SETTING_CLOSE, 0);\n#endif\n#if defined(APP_I2S_A2DP_SOURCE)\n app_audio_sendrequest(APP_A2DP_SOURCE_I2S_AUDIO,\n (uint8_t)APP_BT_SETTING_CLOSE, 0);\n#endif\n app_status_indication_filter_set(APP_STATUS_INDICATION_BOTHSCAN);\n app_audio_sendrequest(APP_BT_STREAM_INVALID,\n (uint8_t)APP_BT_SETTING_CLOSEALL, 0);\n osDelay(500);\n LinkDisconnectDirectly(true);\n osDelay(500);\n app_status_indication_set(APP_STATUS_INDICATION_POWEROFF);\n#ifdef MEDIA_PLAYER_SUPPORT\n app_voice_report(APP_STATUS_INDICATION_POWEROFF, 0);\n#endif\n#ifdef __THIRDPARTY\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n THIRDPARTY_DEINIT);\n#endif\n nv_record_flash_flush();\n norflash_api_flush_all();\n#if defined(DUMP_LOG_ENABLE)\n log_dump_flush_all();\n#endif\n osDelay(1000);\n af_close();\n }\n\n return nRet;\n}\n\nint app_bt_connect2tester_init(void) {\n btif_device_record_t rec;\n bt_bdaddr_t tester_addr;\n uint8_t i;\n bool find_tester = false;\n struct nvrecord_env_t *nvrecord_env;\n btdevice_profile *btdevice_plf_p;\n nv_record_env_get(&nvrecord_env);\n\n if (nvrecord_env->factory_tester_status.status !=\n NVRAM_ENV_FACTORY_TESTER_STATUS_DEFAULT)\n return 0;\n\n if (!nvrec_dev_get_dongleaddr(&tester_addr)) {\n nv_record_open(section_usrdata_ddbrecord);\n for (i = 0; nv_record_enum_dev_records(i, &rec) == BT_STS_SUCCESS; i++) {\n if (!memcmp(rec.bdAddr.address, tester_addr.address, BTIF_BD_ADDR_SIZE)) {\n find_tester = true;\n }\n }\n if (i == 0 && !find_tester) {\n memset(&rec, 0, sizeof(btif_device_record_t));\n memcpy(rec.bdAddr.address, tester_addr.address, BTIF_BD_ADDR_SIZE);\n nv_record_add(section_usrdata_ddbrecord, &rec);\n btdevice_plf_p = (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n rec.bdAddr.address);\n nv_record_btdevicerecord_set_hfp_profile_active_state(btdevice_plf_p,\n true);\n nv_record_btdevicerecord_set_a2dp_profile_active_state(btdevice_plf_p,\n true);\n }\n if (find_tester && i > 2) {\n nv_record_ddbrec_delete(&tester_addr);\n nvrecord_env->factory_tester_status.status =\n NVRAM_ENV_FACTORY_TESTER_STATUS_TEST_PASS;\n nv_record_env_set(nvrecord_env);\n }\n }\n\n return 0;\n}\n\nint app_nvrecord_rebuild(void) {\n struct nvrecord_env_t *nvrecord_env;\n nv_record_env_get(&nvrecord_env);\n\n nv_record_sector_clear();\n nv_record_env_init();\n nv_record_update_factory_tester_status(\n NVRAM_ENV_FACTORY_TESTER_STATUS_TEST_PASS);\n nv_record_env_set(nvrecord_env);\n nv_record_flash_flush();\n\n return 0;\n}\n\n#if (defined(BTUSB_AUDIO_MODE) || defined(BT_USB_AUDIO_DUAL_MODE))\n#include \"app_audio.h\"\n#include \"usb_audio_app.h\"\n#include \"usb_audio_frm_defs.h\"\n\nstatic bool app_usbaudio_mode = false;\n\nextern \"C\" void btusbaudio_entry(void);\nvoid app_usbaudio_entry(void) {\n btusbaudio_entry();\n app_usbaudio_mode = true;\n}\n\nbool app_usbaudio_mode_on(void) { return app_usbaudio_mode; }\n\nvoid app_usb_key(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n}\n\nconst APP_KEY_HANDLE app_usb_handle_cfg[] = {\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_UP},\n \"USB HID FN1 UP key\",\n app_usb_key,\n NULL},\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_UP},\n \"USB HID FN2 UP key\",\n app_usb_key,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_UP},\n \"USB HID PWR UP key\",\n app_usb_key,\n NULL},\n};\n\nvoid app_usb_key_init(void) {\n uint8_t i = 0;\n TRACE(1, \"%s\", __func__);\n for (i = 0; i < (sizeof(app_usb_handle_cfg) / sizeof(APP_KEY_HANDLE)); i++) {\n app_key_handle_registration(&app_usb_handle_cfg[i]);\n }\n}\n#endif /* (defined(BTUSB_AUDIO_MODE) || defined(BT_USB_AUDIO_DUAL_MODE)) */\n\n// #define OS_HAS_CPU_STAT 1\n#if OS_HAS_CPU_STAT\nextern \"C\" void rtx_show_all_threads_usage(void);\n#define _CPU_STATISTICS_PEROID_ 6000\n#define CPU_USAGE_TIMER_TMO_VALUE (_CPU_STATISTICS_PEROID_ / 3)\nstatic void cpu_usage_timer_handler(void const *param);\nosTimerDef(cpu_usage_timer, cpu_usage_timer_handler);\nstatic osTimerId cpu_usage_timer_id = NULL;\nstatic void cpu_usage_timer_handler(void const *param) {\n rtx_show_all_threads_usage();\n}\n#endif\n\n#ifdef USER_REBOOT_PLAY_MUSIC_AUTO\nbool a2dp_need_to_play = false;\n#endif\nextern void btif_me_write_bt_sleep_enable(uint8_t sleep_en);\n\nint btdrv_tportopen(void);\n\nvoid app_ibrt_init(void) {\n app_bt_global_handle_init();\n#if defined(IBRT)\n ibrt_config_t config;\n app_tws_ibrt_init();\n app_ibrt_ui_init();\n app_ibrt_ui_test_init();\n app_ibrt_if_config_load(&config);\n app_ibrt_customif_ui_start();\n#ifdef IBRT_SEARCH_UI\n app_tws_ibrt_start(&config, true);\n app_ibrt_search_ui_init(false, IBRT_NONE_EVENT);\n#else\n app_tws_ibrt_start(&config, false);\n#endif\n\n#ifdef POWER_ON_ENTER_TWS_PAIRING_ENABLED\n app_ibrt_ui_event_entry(IBRT_TWS_PAIRING_EVENT);\n#endif\n\n#endif\n}\n\nvoid user_io_timer_init(void) {\n // app_mute_ctrl_init();\n LED_statusinit();\n // pwrkey_detinit();\n Auto_Shutdowm_Timerinit();\n delay_report_toneinit();\n once_delay_event_Timer_init();\n // app_i2c_demo_init();\n // tou_io_init();\n}\n\nextern uint32_t __coredump_section_start[];\nextern uint32_t __ota_upgrade_log_start[];\nextern uint32_t __log_dump_start[];\nextern uint32_t __crash_dump_start[];\nextern uint32_t __custom_parameter_start[];\nextern uint32_t __lhdc_license_start[];\nextern uint32_t __aud_start[];\nextern uint32_t __userdata_start[];\nextern uint32_t __factory_start[];\n\nint app_init(void) {\n int nRet = 0;\n struct nvrecord_env_t *nvrecord_env;\n#ifdef POWER_ON_ENTER_TWS_PAIRING_ENABLED\n bool need_check_key = false;\n#else\n bool need_check_key = false;\n#endif\n uint8_t pwron_case = APP_POWERON_CASE_INVALID;\n#ifdef BT_USB_AUDIO_DUAL_MODE\n uint8_t usb_plugin = 0;\n#endif\n#ifdef IBRT_SEARCH_UI\n bool is_charging_poweron = false;\n#endif\n TRACE(0, \"please check all sections sizes and heads is correct ........\");\n TRACE(2, \"__coredump_section_start: %p length: 0x%x\",\n __coredump_section_start, CORE_DUMP_SECTION_SIZE);\n TRACE(2, \"__ota_upgrade_log_start: %p length: 0x%x\", __ota_upgrade_log_start,\n OTA_UPGRADE_LOG_SIZE);\n TRACE(2, \"__log_dump_start: %p length: 0x%x\", __log_dump_start,\n LOG_DUMP_SECTION_SIZE);\n TRACE(2, \"__crash_dump_start: %p length: 0x%x\", __crash_dump_start,\n CRASH_DUMP_SECTION_SIZE);\n TRACE(2, \"__custom_parameter_start: %p length: 0x%x\",\n __custom_parameter_start, CUSTOM_PARAMETER_SECTION_SIZE);\n TRACE(2, \"__lhdc_license_start: %p length: 0x%x\", __lhdc_license_start,\n LHDC_LICENSE_SECTION_SIZE);\n TRACE(2, \"__userdata_start: %p length: 0x%x\", __userdata_start,\n USERDATA_SECTION_SIZE * 2);\n TRACE(2, \"__aud_start: %p length: 0x%x\", __aud_start, AUD_SECTION_SIZE);\n TRACE(2, \"__factory_start: %p length: 0x%x\", __factory_start,\n FACTORY_SECTION_SIZE);\n\n TRACE(0, \"app_init\\n\");\n app_tws_set_side_from_gpio();\n#ifdef __RPC_ENABLE__\n extern int rpc_service_setup(void);\n rpc_service_setup();\n#endif\n\n#ifdef IBRT\n // init tws interface\n app_tws_if_init();\n#endif // #ifdef IBRT\n\n nv_record_init();\n factory_section_init();\n\n#ifdef ANC_APP\n app_anc_ios_init();\n#endif\n app_sysfreq_req(APP_SYSFREQ_USER_APP_INIT, APP_SYSFREQ_104M);\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n TRACE(1, \"sys freq calc : %d\\n\", hal_sys_timer_calc_cpu_freq(5, 0));\n#endif\n list_init();\n nRet = app_os_init();\n if (nRet) {\n goto exit;\n }\n#if OS_HAS_CPU_STAT\n cpu_usage_timer_id =\n osTimerCreate(osTimer(cpu_usage_timer), osTimerPeriodic, NULL);\n if (cpu_usage_timer_id != NULL) {\n osTimerStart(cpu_usage_timer_id, CPU_USAGE_TIMER_TMO_VALUE);\n }\n#endif\n\n // app_status_indication_init();\n\n#ifdef BTADDR_FOR_DEBUG\n gen_bt_addr_for_debug();\n#endif\n\n#ifdef FORCE_SIGNALINGMODE\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_TEST_NOSIGNALINGMODE);\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_TEST_MODE |\n HAL_SW_BOOTMODE_TEST_SIGNALINGMODE);\n#elif defined FORCE_NOSIGNALINGMODE\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_TEST_SIGNALINGMODE);\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_TEST_MODE |\n HAL_SW_BOOTMODE_TEST_NOSIGNALINGMODE);\n#endif\n\n if (hal_sw_bootmode_get() & HAL_SW_BOOTMODE_REBOOT_FROM_CRASH) {\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT_FROM_CRASH);\n TRACE(0, \"Crash happened!!!\");\n#ifdef VOICE_DATAPATH\n gsound_dump_set_flag(true);\n#endif\n }\n\n if (hal_sw_bootmode_get() & HAL_SW_BOOTMODE_REBOOT) {\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT);\n pwron_case = APP_POWERON_CASE_REBOOT;\n need_check_key = false;\n TRACE(0, \"Initiative REBOOT happens!!!\");\n#ifdef USER_REBOOT_PLAY_MUSIC_AUTO\n if (hal_sw_bootmode_get() & HAL_SW_BOOTMODE_LOCAL_PLAYER) {\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_LOCAL_PLAYER);\n a2dp_need_to_play = true;\n TRACE(0, \"a2dp_need_to_play = true\");\n }\n#endif\n }\n\n if (hal_sw_bootmode_get() & HAL_SW_BOOTMODE_TEST_MODE) {\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_TEST_MODE);\n pwron_case = APP_POWERON_CASE_TEST;\n need_check_key = false;\n TRACE(0, \"To enter test mode!!!\");\n }\n\n#ifdef BT_USB_AUDIO_DUAL_MODE\n usb_os_init();\n#endif\n nRet = app_battery_open();\n TRACE(1, \"Yin BATTERY %d\", nRet);\n if (pwron_case != APP_POWERON_CASE_TEST) {\n#ifdef USER_REBOOT_PLAY_MUSIC_AUTO\n TRACE(0, \"hal_sw_bootmode_clear HAL_SW_BOOTMODE_LOCAL_PLAYER!!!!!!\");\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_LOCAL_PLAYER);\n#endif\n switch (nRet) {\n case APP_BATTERY_OPEN_MODE_NORMAL:\n nRet = 0;\n break;\n case APP_BATTERY_OPEN_MODE_CHARGING:\n app_status_indication_set(APP_STATUS_INDICATION_CHARGING);\n TRACE(0, \"CHARGING!\");\n app_battery_start();\n\n app_key_open(false);\n app_key_init_on_charging();\n nRet = 0;\n#if defined(BT_USB_AUDIO_DUAL_MODE)\n usb_plugin = 1;\n#elif defined(BTUSB_AUDIO_MODE)\n goto exit;\n#endif\n goto exit;\n break;\n case APP_BATTERY_OPEN_MODE_CHARGING_PWRON:\n TRACE(0, \"CHARGING PWRON!\");\n#ifdef IBRT_SEARCH_UI\n is_charging_poweron = true;\n#endif\n app_status_indication_set(APP_STATUS_INDICATION_CHARGING);\n need_check_key = false;\n nRet = 0;\n break;\n case APP_BATTERY_OPEN_MODE_INVALID:\n default:\n nRet = -1;\n goto exit;\n break;\n }\n }\n\n if (app_key_open(need_check_key)) {\n TRACE(0, \"PWR KEY DITHER!\");\n nRet = -1;\n goto exit;\n }\n\n hal_sw_bootmode_set(HAL_SW_BOOTMODE_REBOOT);\n app_poweron_key_init();\n#if defined(_AUTO_TEST_)\n AUTO_TEST_SEND(\"Power on.\");\n#endif\n app_bt_init();\n af_open();\n app_audio_open();\n app_audio_manager_open();\n app_overlay_open();\n\n nv_record_env_init();\n nvrec_dev_data_open();\n factory_section_open();\n\n /*****************************************************************************/\n // app_bt_connect2tester_init();\n nv_record_env_get(&nvrecord_env);\n\n#ifdef AUDIO_LOOPBACK\n\n#ifdef WL_DET\n app_mic_alg_audioloop(true, APP_SYSFREQ_78M);\n#endif\n\n while (1)\n ;\n#endif\n\n#ifdef BISTO_ENABLED\n nv_record_gsound_rec_init();\n#endif\n\n#ifdef BLE_ENABLE\n app_ble_mode_init();\n app_ble_customif_init();\n#ifdef IBRT\n app_ble_force_switch_adv(BLE_SWITCH_USER_IBRT, false);\n#endif // #ifdef IBRT\n#endif\n\n audio_process_init();\n#ifdef __PC_CMD_UART__\n app_cmd_open();\n#endif\n#ifdef AUDIO_DEBUG_V0_1_0\n speech_tuning_init();\n#endif\n#ifdef ANC_APP\n app_anc_open_module();\n#endif\n\n#ifdef MEDIA_PLAYER_SUPPORT\n app_play_audio_set_lang(nvrecord_env->media_language.language);\n#endif\n app_bt_stream_volume_ptr_update(NULL);\n\n#ifdef __THIRDPARTY\n app_thirdparty_init();\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO2,\n THIRDPARTY_INIT);\n#endif\n\n // TODO: freddie->unify all of the OTA modules\n#if defined(IBRT_OTA)\n ota_flash_init();\n#endif\n\n#ifdef OTA_ENABLED\n /// init OTA common module\n ota_common_init_handler();\n#endif // OTA_ENABLED\n\n#ifdef IBRT\n // for TWS side decision, the last bit is 1:right, 0:left\n if (app_tws_is_unknown_side()) {\n // app_tws_set_side_from_addr(factory_section_get_bt_address());\n app_tws_set_side_from_gpio();\n }\n#endif\n\n btdrv_start_bt();\n#if defined(__GMA_VOICE__) && defined(IBRT_SEARCH_UI)\n app_ibrt_reconfig_btAddr_from_nv();\n#endif\n\n if (pwron_case != APP_POWERON_CASE_TEST) {\n BesbtInit();\n app_wait_stack_ready();\n bt_drv_extra_config_after_init();\n bt_generate_ecdh_key_pair();\n app_bt_start_custom_function_in_bt_thread((uint32_t)0, 0,\n (uint32_t)app_ibrt_init);\n }\n#if defined(BLE_ENABLE) && defined(IBRT)\n app_ble_force_switch_adv(BLE_SWITCH_USER_IBRT, true);\n#endif\n app_sysfreq_req(APP_SYSFREQ_USER_APP_INIT, APP_SYSFREQ_52M);\n TRACE(1, \"\\n\\n\\nbt_stack_init_done:%d\\n\\n\\n\", pwron_case);\n\n if (pwron_case == APP_POWERON_CASE_REBOOT) {\n app_status_indication_init();\n user_io_timer_init();\n app_status_indication_set(APP_STATUS_INDICATION_POWERON);\n#ifdef MEDIA_PLAYER_SUPPORT\n app_voice_report(APP_STATUS_INDICATION_POWERON, 0);\n#endif\n app_bt_start_custom_function_in_bt_thread(\n (uint32_t)1, 0, (uint32_t)btif_me_write_bt_sleep_enable);\n btdrv_set_lpo_times();\n\n#if defined(IBRT_OTA)\n bes_ota_init();\n#endif\n // app_bt_accessmode_set(BTIF_BAM_NOT_ACCESSIBLE);\n#if defined(IBRT)\n#ifdef IBRT_SEARCH_UI\n if (is_charging_poweron == false) {\n if (IBRT_UNKNOW == nvrecord_env->ibrt_mode.mode) {\n TRACE(0, \"ibrt_ui_log:power on unknow mode\");\n app_ibrt_enter_limited_mode();\n // if(app_tws_is_right_side())\n if (1) {\n TRACE(0, \"app_start_tws_serching_direactly\");\n app_start_tws_serching_direactly();\n }\n } else {\n TRACE(1, \"ibrt_ui_log:power on %d fetch out\",\n nvrecord_env->ibrt_mode.mode);\n app_ibrt_ui_event_entry(IBRT_FETCH_OUT_EVENT);\n }\n // startLED_status(1000);\n once_event_case = 9;\n startonce_delay_event_Timer_(1000);\n // startpwrkey_det(200);\n }\n#elif defined(IS_MULTI_AI_ENABLED)\n // when ama and bisto switch, earphone need reconnect with peer, master need\n // reconnect with phone\n uint8_t box_action = app_ai_tws_reboot_get_box_action();\n if (box_action != 0xFF) {\n TRACE(2, \"%s box_actionstate %d\", __func__, box_action);\n app_ibrt_ui_event_entry(box_action | IBRT_SKIP_FALSE_TRIGGER_MASK);\n }\n#endif\n#else\n app_bt_accessmode_set(BTIF_BAM_NOT_ACCESSIBLE);\n#endif\n\n app_key_init();\n app_battery_start();\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_AUTOPOWEROFF__)\n app_start_10_second_timer(APP_POWEROFF_TIMER_ID);\n#endif\n\n#if defined(__IAG_BLE_INCLUDE__) && defined(BTIF_BLE_APP_DATAPATH_SERVER)\n BLE_custom_command_init();\n#endif\n#ifdef __THIRDPARTY\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n THIRDPARTY_INIT);\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n THIRDPARTY_START);\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO2,\n THIRDPARTY_BT_CONNECTABLE);\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO3,\n THIRDPARTY_START);\n#endif\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_BT_RECONNECT__)\n#if !defined(IBRT)\n app_bt_profile_connect_manager_opening_reconnect();\n#endif\n#endif\n }\n#ifdef __ENGINEER_MODE_SUPPORT__\n else if (pwron_case == APP_POWERON_CASE_TEST) {\n app_status_indication_init();\n app_factorymode_set(true);\n app_status_indication_set(APP_STATUS_INDICATION_POWERON);\n#ifdef MEDIA_PLAYER_SUPPORT\n app_voice_report(APP_STATUS_INDICATION_POWERON, 0);\n#endif\n#ifdef __WATCHER_DOG_RESET__\n app_wdt_close();\n#endif\n TRACE(0, \"!!!!!ENGINEER_MODE!!!!!\\n\");\n nRet = 0;\n app_nvrecord_rebuild();\n app_factorymode_key_init();\n if (hal_sw_bootmode_get() & HAL_SW_BOOTMODE_TEST_SIGNALINGMODE) {\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_TEST_MASK);\n app_factorymode_bt_signalingtest(NULL, NULL);\n }\n if (hal_sw_bootmode_get() & HAL_SW_BOOTMODE_TEST_NOSIGNALINGMODE) {\n hal_sw_bootmode_clear(HAL_SW_BOOTMODE_TEST_MASK);\n app_factorymode_bt_nosignalingtest(NULL, NULL);\n }\n }\n#endif\n else {\n user_io_timer_init();\n app_status_indication_init();\n app_status_indication_set(APP_STATUS_INDICATION_POWERON);\n#ifdef MEDIA_PLAYER_SUPPORT\n app_voice_report(APP_STATUS_INDICATION_POWERON, 0);\n#endif\n if (need_check_key) {\n pwron_case = app_poweron_wait_case();\n } else {\n pwron_case = APP_POWERON_CASE_NORMAL;\n }\n if (need_check_key) {\n#ifndef __POWERKEY_CTRL_ONOFF_ONLY__\n app_poweron_wait_finished();\n#endif\n }\n if (pwron_case != APP_POWERON_CASE_INVALID &&\n pwron_case != APP_POWERON_CASE_DITHERING) {\n TRACE(1, \"power on case:%d\\n\", pwron_case);\n nRet = 0;\n#ifndef __POWERKEY_CTRL_ONOFF_ONLY__\n // app_status_indication_set(APP_STATUS_INDICATION_INITIAL);\n#endif\n app_bt_start_custom_function_in_bt_thread(\n (uint32_t)1, 0, (uint32_t)btif_me_write_bt_sleep_enable);\n btdrv_set_lpo_times();\n\n#ifdef IBRT_OTA\n bes_ota_init();\n#endif\n\n#ifdef __INTERCONNECTION__\n app_interconnection_init();\n#endif\n\n#ifdef __INTERACTION__\n app_interaction_init();\n#endif\n\n#if defined(__IAG_BLE_INCLUDE__) && defined(BTIF_BLE_APP_DATAPATH_SERVER)\n BLE_custom_command_init();\n#endif\n#ifdef GFPS_ENABLED\n app_gfps_set_battery_info_acquire_handler(app_tell_battery_info_handler);\n app_gfps_set_battery_datatype(SHOW_UI_INDICATION);\n#endif\n osDelay(500);\n\n switch (pwron_case) {\n case APP_POWERON_CASE_CALIB:\n break;\n case APP_POWERON_CASE_BOTHSCAN:\n app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n#ifdef MEDIA_PLAYER_SUPPORT\n app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n#endif\n#if defined(__BTIF_EARPHONE__)\n#if defined(IBRT)\n#ifdef IBRT_SEARCH_UI\n if (false == is_charging_poweron)\n app_ibrt_enter_limited_mode();\n#endif\n#else\n app_bt_accessmode_set(BTIF_BT_DEFAULT_ACCESS_MODE_PAIR);\n#endif\n#ifdef GFPS_ENABLED\n app_enter_fastpairing_mode();\n#endif\n#if defined(__BTIF_AUTOPOWEROFF__)\n app_start_10_second_timer(APP_PAIR_TIMER_ID);\n#endif\n#endif\n#ifdef __THIRDPARTY\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO2,\n THIRDPARTY_BT_DISCOVERABLE);\n#endif\n break;\n case APP_POWERON_CASE_NORMAL:\n#if defined(__BTIF_EARPHONE__) && !defined(__EARPHONE_STAY_BOTH_SCAN__)\n#if defined(IBRT)\n#ifdef IBRT_SEARCH_UI\n app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n if (is_charging_poweron == false) {\n startLED_status(1000);\n once_event_case = 9;\n startonce_delay_event_Timer_(1000);\n if (IBRT_UNKNOW == nvrecord_env->ibrt_mode.mode) {\n TRACE(0, \"ibrt_ui_log:power on unknow mode\");\n app_ibrt_enter_limited_mode();\n if (app_tws_is_right_side()) {\n app_start_tws_serching_direactly();\n }\n } else {\n TRACE(1, \"ibrt_ui_log:power on %d fetch out\",\n nvrecord_env->ibrt_mode.mode);\n app_ibrt_ui_event_entry(IBRT_FETCH_OUT_EVENT);\n //\t\t\tapp_status_indication_set(APP_STATUS_INDICATION_CHARGING);\n // break;\n }\n // startpwrkey_det(200);\n }\n#elif defined(IS_MULTI_AI_ENABLED)\n // when ama and bisto switch, earphone need reconnect with peer, master\n // need reconnect with phone\n // app_ibrt_ui_event_entry(IBRT_OPEN_BOX_EVENT);\n // TRACE(1,\"ibrt_ui_log:power on %d fetch out\",\n // nvrecord_env->ibrt_mode.mode);\n // app_ibrt_ui_event_entry(IBRT_FETCH_OUT_EVENT);\n#endif\n#else\n app_bt_accessmode_set(BTIF_BAM_NOT_ACCESSIBLE);\n#endif\n#endif\n case APP_POWERON_CASE_REBOOT:\n case APP_POWERON_CASE_ALARM:\n default:\n // app_status_indication_set(APP_STATUS_INDICATION_PAGESCAN);\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_BT_RECONNECT__) && \\\n !defined(IBRT)\n app_bt_profile_connect_manager_opening_reconnect();\n#endif\n#ifdef __THIRDPARTY\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO2,\n THIRDPARTY_BT_CONNECTABLE);\n#endif\n\n break;\n }\n\n app_key_init();\n app_battery_start();\n\n#if defined(A2DP_LHDC_ON)\n lhdc_license_check();\n#endif\n\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_AUTOPOWEROFF__)\n app_start_10_second_timer(APP_POWEROFF_TIMER_ID);\n#endif\n#ifdef __THIRDPARTY\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n THIRDPARTY_INIT);\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n THIRDPARTY_START);\n app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO3,\n THIRDPARTY_START);\n#endif\n\n#ifdef RB_CODEC\n rb_ctl_init();\n#endif\n } else {\n af_close();\n app_key_close();\n nRet = -1;\n }\n }\nexit:\n\n#ifdef IS_MULTI_AI_ENABLED\n app_ai_tws_clear_reboot_box_state();\n#endif\n\n#ifdef __BT_DEBUG_TPORTS__\n {\n extern void bt_enable_tports(void);\n bt_enable_tports();\n // hal_iomux_tportopen();\n }\n#endif\n\n#ifdef ANC_APP\n app_anc_set_init_done();\n#endif\n#ifdef BT_USB_AUDIO_DUAL_MODE\n if (usb_plugin) {\n btusb_switch(BTUSB_MODE_USB);\n } else {\n btusb_switch(BTUSB_MODE_BT);\n }\n#else // BT_USB_AUDIO_DUAL_MODE\n#if defined(BTUSB_AUDIO_MODE)\n if (pwron_case == APP_POWERON_CASE_CHARGING) {\n#ifdef __WATCHER_DOG_RESET__\n app_wdt_close();\n#endif\n af_open();\n app_key_handle_clear();\n app_usb_key_init();\n app_usbaudio_entry();\n }\n\n#endif // BTUSB_AUDIO_MODE\n#endif // BT_USB_AUDIO_DUAL_MODE\n app_sysfreq_req(APP_SYSFREQ_USER_APP_INIT, APP_SYSFREQ_32K);\n\n return nRet;\n}\n" }, { "path": "apps/main/apps.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APPS_H__\n#define __APPS_H__\n\n#include \"app_status_ind.h\"\n\n#define STACK_READY_BT 0x01\n#define STACK_READY_BLE 0x02\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nint app_init(void);\n\nint app_deinit(int deinit_case);\n\nint app_shutdown(void);\n\nint app_reset(void);\n\nint app_status_battery_report(uint8_t level);\n\nint app_voice_report(APP_STATUS_INDICATION_T status, uint8_t device_id);\nint app_voice_report_generic(APP_STATUS_INDICATION_T status, uint8_t device_id,\n uint8_t isMerging);\nint app_voice_stop(APP_STATUS_INDICATION_T status, uint8_t device_id);\n\n/*FixME*/\nvoid app_status_set_num(const char *p);\n\n////////////10 second tiemr///////////////\n#define APP_FAST_PAIRING_TIMEOUT_IN_SECOND 120\n\n#define APP_PAIR_TIMER_ID 0\n#define APP_POWEROFF_TIMER_ID 1\n#define APP_FASTPAIR_LASTING_TIMER_ID 2\n\nvoid app_stop_10_second_timer(uint8_t timer_id);\nvoid app_start_10_second_timer(uint8_t timer_id);\n\nvoid app_notify_stack_ready(uint8_t ready_flag);\n\nvoid app_start_postponed_reset(void);\n\nbool app_is_power_off_in_progress(void);\n\n#define CHIP_ID_C 1\n#define CHIP_ID_D 2\n\nvoid app_disconnect_all_bt_connections(void);\nbool app_is_stack_ready(void);\n\nextern uint8_t latency_mode_is_open;\nextern uint8_t app_poweroff_flag;\nextern bool MobileLinkLose_reboot;\nextern bool factory_mode_status;\nextern uint8_t app_poweroff_flag;\nextern bool MobileLinkLose_reboot;\nextern void startclr_info_timer(int ms);\nextern void app_enterpairing_timer_start(void);\nextern void app_enterpairing_timer_stop(void);\nextern void startdelay_report_tone(int ms, APP_STATUS_INDICATION_T status);\nextern void box_cmd_app_bt_enter_mono_pairing_mode(void);\nextern int app_nvrecord_rebuild(void);\nextern void app_bt_power_off_customize();\n////////////////////\n\n#ifdef __cplusplus\n}\n#endif\n#endif //__FMDEC_H__\n" }, { "path": "apps/main/apps_tester.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"cmsis_os.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n\n#include \"app_key.h\"\n#include \"hal_iomux.h\"\n#include \"hal_sleep.h\"\n#include \"hal_trace.h\"\n\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"audiobuffer.h\"\n#include \"audioflinger.h\"\n#include \"besbt.h\"\n#include \"bt_drv_interface.h\"\n\n#if defined(APP_TEST_AUDIO) && defined(ANC_APP)\n#include \"anc_usb_app.h\"\n#include \"usb_audio_app.h\"\n//#include \"dualadc_audio_app.h\"\n#endif\n\n#define APP_TESTER_CPU_WAKE_LOCK HAL_CPU_WAKE_LOCK_USER_3\n\nextern \"C\" int hal_analogif_reg_write(unsigned short reg, unsigned short val);\nextern \"C\" void OS_NotifyEvm(void);\nextern void app_anc_usb_init(void);\n\n#define REG(a) *(volatile uint32_t *)(a)\n\nvoid bt_signaling_test(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n hal_cpu_wake_lock(APP_TESTER_CPU_WAKE_LOCK);\n btdrv_testmode_start();\n btdrv_enable_dut();\n}\n\nvoid bt_stack_test(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n btdrv_start_bt();\n BesbtInit();\n}\n\nvoid bt_ble_test(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n hal_cpu_wake_lock(APP_TESTER_CPU_WAKE_LOCK);\n btdrv_testmode_start();\n\n btdrv_hcioff();\n hal_iomux_set_uart1();\n btdrv_uart_bridge_loop();\n}\n\nvoid bt_test_104m(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n hal_analogif_reg_write(0x35, 0x0);\n hal_analogif_reg_write(0x36, 0x8000);\n hal_analogif_reg_write(0x37, 0x1000);\n hal_analogif_reg_write(0x31, 0xfd31);\n REG(0xd0350248) = 0X80C00000;\n hal_analogif_reg_write(0xC, 0x3790);\n}\n\nvoid bt_change_to_iic(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n hal_iomux_set_analog_i2c();\n}\n\nvoid bt_change_to_uart0(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n hal_iomux_set_uart0();\n}\n\nvoid app_switch_i2c_uart(APP_KEY_STATUS *status, void *param) {\n static uint32_t flag = 1;\n\n TRACE(2, \"[%s] flag = %d\", __func__, flag);\n if (flag) {\n bt_change_to_iic(NULL, NULL);\n } else {\n bt_change_to_uart0(NULL, NULL);\n }\n flag = !flag;\n}\n\nvoid test_power_off(APP_KEY_STATUS *status, void *param) {\n TRACE(0, \"app_power_off\\n\");\n}\n\nextern APP_KEY_STATUS bt_key;\n\nvoid test_bt_key(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n if (bt_key.code == 0xff) {\n bt_key.code = status->code;\n bt_key.event = status->event;\n OS_NotifyEvm();\n }\n}\n\n#ifdef __APP_TEST_SDMMC__\n#include \"app_sdmmc.h\"\n\n#define SD_BUF_SIZE (10)\nuint8_t sd_buf[SD_BUF_SIZE] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};\n\nvoid test_sd_card() {\n sd_open();\n\n dump_data2sd(APP_SDMMC_DUMP_OPEN, NULL, 0);\n dump_data2sd(APP_SDMMC_DUMP_WRITE, sd_buf, SD_BUF_SIZE);\n dump_data2sd(APP_SDMMC_DUMP_CLOSE, NULL, 0);\n}\n#endif\n\n#ifdef APP_TEST_AUDIO\nextern void adc_looptester(bool on, enum AUD_IO_PATH_T input_path,\n enum AUD_SAMPRATE_T sample_rate);\nvoid test_codec_loop(APP_KEY_STATUS *status, void *param) {\n audio_buffer_init();\n adc_looptester(true, AUD_INPUT_PATH_MAINMIC, AUD_SAMPRATE_8000);\n}\n\n#ifdef ANC_APP\nvoid test_anc(APP_KEY_STATUS *status, void *param) { anc_usb_app((bool)param); }\n\nvoid test_usb_audio(APP_KEY_STATUS *status, void *param) {\n usb_audio_app((bool)param);\n // dualadc_audio_app((bool)param);\n}\n#endif\n#endif\n\nvoid bt_change_to_jlink(APP_KEY_STATUS *status, void *param) {\n hal_iomux_set_jtag();\n\n hal_cmu_jtag_clock_enable();\n}\n\nvoid bt_enable_tports(void) {\n hal_iomux_set_bt_tport();\n bt_drv_bt_tport_type_config();\n}\n\n#ifdef APP_TEST_AUDIO\nextern void da_tester(uint8_t on);\nvoid bt_test_dsp_process(APP_KEY_STATUS *status, void *param) { da_tester(1); }\n#endif\n#define MENU_TITLE_MAX_SIZE (50)\nAPP_KEY_HANDLE app_testcase[] = {\n#if defined(APP_TEST_AUDIO) && defined(ANC_APP)\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_UP},\n \"USB AUDIO TEST OFF\",\n test_usb_audio,\n (void *)0},\n {{APP_KEY_CODE_FN5, APP_KEY_EVENT_UP},\n \"USB AUDIO TEST ON\",\n test_usb_audio,\n (void *)1},\n {{APP_KEY_CODE_FN3, APP_KEY_EVENT_UP}, \"ANC TEST OFF\", test_anc, (void *)0},\n {{APP_KEY_CODE_FN6, APP_KEY_EVENT_UP}, \"ANC TEST ON\", test_anc, (void *)1},\n#else\n#ifdef APP_TEST_AUDIO\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_LONGPRESS},\n \"LONGPRESS: test_codec_loop\",\n test_codec_loop,\n NULL},\n#endif\n {{APP_KEY_CODE_FN1, APP_KEY_EVENT_UP},\n \"bt_signaling_test\",\n bt_signaling_test,\n NULL},\n {{APP_KEY_CODE_FN2, APP_KEY_EVENT_UP}, \"bt gogogogo\", bt_stack_test, NULL},\n {{APP_KEY_CODE_FN3, APP_KEY_EVENT_UP},\n \"bt change to 104m\",\n bt_test_104m,\n NULL},\n {{APP_KEY_CODE_FN4, APP_KEY_EVENT_UP}, \"ble test mode\", bt_ble_test, NULL},\n#ifdef APP_TEST_AUDIO\n {{APP_KEY_CODE_FN5, APP_KEY_EVENT_UP},\n \"dsp eq test\",\n bt_test_dsp_process,\n NULL},\n#endif\n {{APP_KEY_CODE_FN5, APP_KEY_EVENT_LONGPRESS},\n \"LONGPRESS: bt volume up key\",\n test_bt_key,\n NULL},\n\n {{APP_KEY_CODE_FN6, APP_KEY_EVENT_UP},\n \"bt volume down key\",\n test_bt_key,\n NULL},\n {{APP_KEY_CODE_FN6, APP_KEY_EVENT_LONGPRESS},\n \"LONGPRESS: bt volume down key\",\n test_bt_key,\n NULL},\n\n {{APP_KEY_CODE_FN7, APP_KEY_EVENT_CLICK},\n \"bt function key\",\n test_bt_key,\n NULL},\n {{APP_KEY_CODE_FN7, APP_KEY_EVENT_DOUBLECLICK},\n \"DOUBLECLICK: bt function key\",\n test_bt_key,\n NULL},\n {{APP_KEY_CODE_FN7, APP_KEY_EVENT_LONGPRESS},\n \"LONGPRESS: bt function key\",\n test_bt_key,\n NULL},\n\n {{APP_KEY_CODE_FN8, APP_KEY_EVENT_UP},\n \"open jlink\",\n bt_change_to_jlink,\n NULL},\n {{APP_KEY_CODE_FN9, APP_KEY_EVENT_UP},\n \"iic_map2_P3_0\",\n bt_change_to_iic,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGPRESS},\n \"LONGPRESS: power off\",\n test_power_off,\n NULL},\n#endif // !(APP_TEST_AUDIO && ANC_APP)\n {{0xff, APP_KEY_EVENT_NONE}, NULL, (uint32_t)NULL, 0},\n};\n\nint app_testcase_disp_menu(APP_KEY_HANDLE *testcase, bool printall) {\n char buf[MENU_TITLE_MAX_SIZE + 1];\n if (strlen(testcase->string) > (MENU_TITLE_MAX_SIZE - 15)) {\n TRACE(0, \"string too long, please check again\\n\");\n return -1;\n }\n\n if (printall) {\n memset(buf, '-', sizeof(buf) - 3);\n buf[0] = '|';\n buf[MENU_TITLE_MAX_SIZE - 3] = '|';\n buf[MENU_TITLE_MAX_SIZE - 2] = '\\r';\n buf[MENU_TITLE_MAX_SIZE - 1] = '\\n';\n buf[MENU_TITLE_MAX_SIZE] = '\\0';\n TRACE(1, \"%s\", buf);\n osDelay(1);\n }\n\n do {\n snprintf(buf, sizeof(buf), \"| (0x%X)%s\", testcase->key_status.code,\n testcase->string);\n memset(buf + strlen(buf), ' ', sizeof(buf) - strlen(buf) - 3);\n buf[MENU_TITLE_MAX_SIZE - 3] = '|';\n buf[MENU_TITLE_MAX_SIZE - 2] = '\\r';\n buf[MENU_TITLE_MAX_SIZE - 1] = '\\n';\n buf[MENU_TITLE_MAX_SIZE] = '\\0';\n TRACE(1, \"%s\", buf);\n testcase++;\n } while (testcase->key_status.code != 0xff && printall);\n\n if (printall) {\n memset(buf, '-', sizeof(buf) - 3);\n buf[0] = '|';\n buf[MENU_TITLE_MAX_SIZE - 3] = '|';\n buf[MENU_TITLE_MAX_SIZE - 2] = '\\r';\n buf[MENU_TITLE_MAX_SIZE - 1] = '\\n';\n buf[MENU_TITLE_MAX_SIZE] = '\\0';\n TRACE(1, \"%s\", buf);\n osDelay(1);\n }\n\n return 0;\n}\n\nint app_testcase_key_response(APP_MESSAGE_BODY *msg_body) {\n uint8_t i = 0;\n APP_KEY_STATUS key_status;\n\n APP_KEY_GET_CODE(msg_body->message_id, key_status.code);\n APP_KEY_GET_EVENT(msg_body->message_id, key_status.event);\n\n if ((key_status.code) > (sizeof(app_testcase) / sizeof(APP_KEY_HANDLE)))\n return -1;\n\n for (i = 0; i < (sizeof(app_testcase) / sizeof(APP_KEY_HANDLE)); i++) {\n if (app_testcase[i].key_status.code == key_status.code &&\n (app_testcase[i].key_status.event == key_status.event))\n break;\n }\n\n if (i >= (sizeof(app_testcase) / sizeof(APP_KEY_HANDLE)))\n return -1;\n\n if (app_testcase[i].function != (uint32_t)NULL) {\n if (app_testcase[i].string != (uint32_t)NULL)\n app_testcase_disp_menu(&app_testcase[i], 0);\n ((APP_KEY_HANDLE_CB_T)app_testcase[i].function)(&key_status,\n app_testcase[i].param);\n }\n\n return 0;\n}\n\nvoid app_test_init(void) {\n uint8_t i = 0;\n TRACE(1, \"%s\", __func__);\n for (i = 0; i < (sizeof(app_testcase) / sizeof(APP_KEY_HANDLE)); i++) {\n app_key_handle_registration(&app_testcase[i]);\n }\n app_testcase_disp_menu(app_testcase, 1);\n\n#if defined(APP_TEST_AUDIO) && defined(ANC_APP)\n app_anc_usb_init();\n#endif\n}\n" }, { "path": "apps/main/common_apps_imports.h", "content": "#ifndef COMMON_APP_IMPORTS\n#define COMMON_APP_IMPORTS\n\n#include \"a2dp_api.h\"\n#include \"app_audio.h\"\n#include \"app_battery.h\"\n#include \"app_ble_include.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_key.h\"\n#include \"app_overlay.h\"\n#include \"app_pwl.h\"\n#include \"app_status_ind.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n#include \"besbt.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_if.h\"\n#include \"btapp.h\"\n#include \"cmsis_os.h\"\n#include \"crash_dump_section.h\"\n#include \"factory_section.h\"\n#include \"gapm_task.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_i2c.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"list.h\"\n#include \"log_section.h\"\n#include \"me_api.h\"\n#include \"norflash_api.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \"os_api.h\"\n#include \"pmu.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n#ifdef __AI_VOICE__\n#include \"ai_manager.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_ai_tws.h\"\n#endif\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"audio_process.h\"\n\n#ifdef __PC_CMD_UART__\n#include \"app_cmd.h\"\n#endif\n\n#ifdef __FACTORY_MODE_SUPPORT__\n#include \"app_factory.h\"\n#include \"app_factory_bt.h\"\n#endif\n\n#ifdef __INTERCONNECTION__\n#include \"app_ble_mode_switch.h\"\n#include \"app_interconnection.h\"\n#include \"app_interconnection_ble.h\"\n#include \"app_interconnection_logic_protocol.h\"\n#endif\n\n#ifdef __INTERACTION__\n#include \"app_interaction.h\"\n#endif\n\n#ifdef BISTO_ENABLED\n#include \"app_ai_manager_api.h\"\n#include \"gsound_custom_actions.h\"\n#include \"gsound_custom_ota.h\"\n#include \"gsound_custom_reset.h\"\n#include \"nvrecord_gsound.h\"\n#endif\n\n#ifdef IBRT_OTA\n#include \"ota_bes.h\"\n#endif\n\n#ifdef MEDIA_PLAYER_SUPPORT\n#include \"app_media_player.h\"\n#include \"resources.h\"\n#endif\n\n#ifdef VOICE_DATAPATH\n#include \"app_voicepath.h\"\n#endif\n\n#ifdef BT_USB_AUDIO_DUAL_MODE\n#include \"btusb_audio.h\"\n#include \"usbaudio_thread.h\"\n#endif\n\n#ifdef TILE_DATAPATH\n#include \"tile_target_ble.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_ibrt_customif_cmd.h\"\n#include \"app_ibrt_customif_ui.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ui_test.h\"\n#include \"app_ibrt_voice_report.h\"\n#include \"app_tws_if.h\"\n#endif\n\n#endif" }, { "path": "apps/main/gfps.cpp", "content": "\n// Google Fast pairing Service\n#include \"common_apps_imports.h\"\n\n#ifdef GFPS_ENABLED\n#include \"app_gfps.h\"\n#ifdef GFPS_ENABLED\nstatic void app_tell_battery_info_handler(uint8_t *batteryValueCount,\n uint8_t *batteryValue) {\n GFPS_BATTERY_STATUS_E status;\n if (app_battery_is_charging()) {\n status = BATTERY_CHARGING;\n } else {\n status = BATTERY_NOT_CHARGING;\n }\n\n // TODO: add the charger case's battery level\n#ifdef IBRT\n if (app_tws_ibrt_tws_link_connected()) {\n *batteryValueCount = 2;\n } else {\n *batteryValueCount = 1;\n }\n#else\n *batteryValueCount = 1;\n#endif\n\n TRACE(2, \"%s,*batteryValueCount is %d\", __func__, *batteryValueCount);\n if (1 == *batteryValueCount) {\n batteryValue[0] = ((app_battery_current_level() + 1) * 10) | (status << 7);\n } else {\n batteryValue[0] = ((app_battery_current_level() + 1) * 10) | (status << 7);\n batteryValue[1] = ((app_battery_current_level() + 1) * 10) | (status << 7);\n }\n}\n#endif\n#endif\n\n#ifdef GFPS_ENABLED\nstatic void app_tell_battery_info_handler(uint8_t *batteryValueCount,\n uint8_t *batteryValue) {\n GFPS_BATTERY_STATUS_E status;\n if (app_battery_is_charging()) {\n status = BATTERY_CHARGING;\n } else {\n status = BATTERY_NOT_CHARGING;\n }\n\n // TODO: add the charger case's battery level\n#ifdef IBRT\n if (app_tws_ibrt_tws_link_connected()) {\n *batteryValueCount = 2;\n } else {\n *batteryValueCount = 1;\n }\n#else\n *batteryValueCount = 1;\n#endif\n\n TRACE(2, \"%s,*batteryValueCount is %d\", __func__, *batteryValueCount);\n if (1 == *batteryValueCount) {\n batteryValue[0] = ((app_battery_current_level() + 1) * 10) | (status << 7);\n } else {\n batteryValue[0] = ((app_battery_current_level() + 1) * 10) | (status << 7);\n batteryValue[1] = ((app_battery_current_level() + 1) * 10) | (status << 7);\n }\n}\n#endif" }, { "path": "apps/main/ibrt.cpp", "content": "#include \"ibrt.h\"\n#include \"common_apps_imports.h\"\n#include \"hal_gpio.h\"\n#include \"tgt_hardware.h\"\nextern struct BT_DEVICE_T app_bt_device;\nextern void hal_gpio_pin_set(enum HAL_GPIO_PIN_T pin);\n\nbool Curr_Is_Master(void) {\n static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n if (p_ibrt_ctrl->current_role == IBRT_MASTER)\n return 1;\n else\n return 0;\n}\n\nbool Curr_Is_Slave(void) {\n static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n if (p_ibrt_ctrl->current_role == IBRT_SLAVE)\n return 1;\n else\n return 0;\n}\n\nuint8_t get_curr_role(void) {\n static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n return p_ibrt_ctrl->current_role;\n}\n\nuint8_t get_nv_role(void) {\n static ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n return p_ibrt_ctrl->nv_role;\n}\n" }, { "path": "apps/main/ibrt.h", "content": "#pragma once \n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nbool Curr_Is_Master(void);\nuint8_t get_curr_role(void);\nbool Curr_Is_Slave(void);\nuint8_t get_nv_role(void);\n\n#ifdef __cplusplus\n};\n#endif\n\n" }, { "path": "apps/main/key_handler.cpp", "content": "#include \"a2dp_api.h\"\n#include \"app_audio.h\"\n#include \"app_battery.h\"\n#include \"app_ble_include.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_key.h\"\n#include \"app_overlay.h\"\n#include \"app_pwl.h\"\n#include \"app_status_ind.h\"\n#include \"app_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"audio_process.h\"\n#include \"audioflinger.h\"\n#include \"besbt.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_if.h\"\n#include \"btapp.h\"\n#include \"cmsis_os.h\"\n#include \"crash_dump_section.h\"\n#include \"factory_section.h\"\n#include \"gapm_task.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_i2c.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"list.h\"\n#include \"log_section.h\"\n#include \"me_api.h\"\n#include \"norflash_api.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \"os_api.h\"\n#include \"pmu.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n\n#ifdef __INTERCONNECTION__\n#include \"app_ble_mode_switch.h\"\n#include \"app_interconnection.h\"\n#include \"app_interconnection_ble.h\"\n#include \"app_interconnection_logic_protocol.h\"\n#endif\n\n#include \"app_ibrt_customif_cmd.h\"\n#include \"app_ibrt_customif_ui.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ui_test.h\"\n#include \"app_ibrt_voice_report.h\"\n#include \"app_tws_if.h\"\n\n#include \"app_anc.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\n\n/*\n * handling of touch events when the devices are turned on\n\n * Both pods active:\n\n * Right Ear:\n * Single tap : Play/Pause\n * Double tap : Next track\n * Hold : ANC on/off\n * Triple tap : Volume Up\n *\n * Left Ear:\n * Single tap : Play/Pause\n * Double tap : Previous track\n * Hold : ANC on/off\n * Triple tap : Volume Down\n\n * Single pod active:\n\n * Single tap : Play/Pause\n * Double tap : Next track\n * Hold : Previous track\n * Triple tap : Volume Up\n * Quad tap : Volume Down\n\n\n\n * We use app_ibrt_if_start_user_action for handling actions, as this will apply\n locally if we are link master\n * OR send it over the link to the other bud if we are not\n*/\n\nvoid send_vol_up(void) {\n uint8_t action[] = {IBRT_ACTION_LOCAL_VOLUP};\n app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid send_play_pause(void) {\n if (app_bt_device.a2dp_play_pause_flag != 0) {\n uint8_t action[] = {IBRT_ACTION_PAUSE};\n app_ibrt_if_start_user_action(action, sizeof(action));\n } else {\n uint8_t action[] = {IBRT_ACTION_PLAY};\n app_ibrt_if_start_user_action(action, sizeof(action));\n }\n}\nvoid send_vol_down(void) {\n uint8_t action[] = {IBRT_ACTION_LOCAL_VOLDN};\n app_ibrt_if_start_user_action(action, sizeof(action));\n}\n\nvoid send_next_track(void) {\n uint8_t action[] = {IBRT_ACTION_FORWARD};\n app_ibrt_if_start_user_action(action, sizeof(action));\n}\n\nvoid send_prev_track(void) {\n uint8_t action[] = {IBRT_ACTION_BACKWARD};\n app_ibrt_if_start_user_action(action, sizeof(action));\n}\n\nvoid send_enable_disable_anc(void) {\n uint8_t action[] = {IBRT_ACTION_ANC_NOTIRY_MASTER_EXCHANGE_COEF};\n app_ibrt_if_start_user_action(action, sizeof(action));\n}\n\nvoid app_key_single_tap(APP_KEY_STATUS *status, void *param) {\n TRACE(2, \"%s event %d\", __func__, status->event);\n /*\n if (!app_tws_ibrt_tws_link_connected()) {\n // No other bud paired\n TRACE(0, \"Handling %s in single bud mode\", __func__);\n send_play_pause();\n } else {\n // Bud's are working as a pair\n if (app_tws_is_left_side()) {\n TRACE(0, \"Handling %s as left bud\", __func__);\n // Lefty\n send_play_pause();\n } else {\n TRACE(0, \"Handling %s as right bud\", __func__);\n // Righty\n send_play_pause();\n }\n }\n */\n send_play_pause();\n}\nvoid app_key_double_tap(APP_KEY_STATUS *status, void *param) {\n TRACE(2, \"%s event %d\", __func__, status->event);\n\n if (!app_tws_ibrt_tws_link_connected()) {\n // No other bud paired\n TRACE(0, \"Handling %s in single bud mode\", __func__);\n send_next_track();\n } else {\n // Bud's are working as a pair\n if (app_tws_is_left_side()) {\n TRACE(0, \"Handling %s as left bud\", __func__);\n // Lefty\n send_prev_track();\n } else {\n TRACE(0, \"Handling %s as right bud\", __func__);\n // Righty\n send_next_track();\n }\n }\n}\n\nvoid app_key_triple_tap(APP_KEY_STATUS *status, void *param) {\n TRACE(2, \"%s event %d\", __func__, status->event);\n\n if (!app_tws_ibrt_tws_link_connected()) {\n // No other bud paired\n TRACE(0, \"Handling %s in single bud mode\", __func__);\n send_vol_up();\n } else {\n // Bud's are working as a pair\n if (app_tws_is_left_side()) {\n TRACE(0, \"Handling %s as left bud\", __func__);\n // Lefty\n send_vol_down();\n } else {\n TRACE(0, \"Handling %s as right bud\", __func__);\n // Righty\n send_vol_up();\n }\n }\n}\nvoid app_key_quad_tap(APP_KEY_STATUS *status, void *param) {\n TRACE(2, \"%s event %d\", __func__, status->event);\n\n if (!app_tws_ibrt_tws_link_connected()) {\n // No other bud paired\n TRACE(0, \"Handling %s in single bud mode\", __func__);\n send_vol_down();\n }\n}\n\nvoid app_key_long_press_down(APP_KEY_STATUS *status, void *param) {\n TRACE(2, \"%s event %d\", __func__, status->event);\n\n if (!app_tws_ibrt_tws_link_connected()) {\n // No other bud paired\n TRACE(0, \"Handling %s in single bud mode\", __func__);\n send_prev_track();\n } else {\n // Bud's are working as a pair\n send_enable_disable_anc();\n }\n}\n\nvoid app_key_reboot(APP_KEY_STATUS *status, void *param) {\n TRACE(1, \"%s \", __func__);\n hal_cmu_sys_reboot();\n}\n\nvoid app_key_init(void) {\n uint8_t i = 0;\n TRACE(1, \"%s\", __func__);\n\n const APP_KEY_HANDLE key_cfg[] = {\n\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK}, \"\", app_key_single_tap, NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_DOUBLECLICK},\n \"\",\n app_key_double_tap,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_TRIPLECLICK},\n \"\",\n app_key_triple_tap,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_ULTRACLICK},\n \"\",\n app_key_quad_tap,\n NULL},\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGPRESS},\n \"\",\n app_key_long_press_down,\n NULL},\n };\n\n app_key_handle_clear();\n for (i = 0; i < (sizeof(key_cfg) / sizeof(APP_KEY_HANDLE)); i++) {\n app_key_handle_registration(&key_cfg[i]);\n }\n}\n\nvoid app_key_init_on_charging(void) {\n uint8_t i = 0;\n const APP_KEY_HANDLE key_cfg[] = {\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGLONGPRESS},\n \"long press reboot\",\n app_key_reboot,\n NULL},\n // {{APP_KEY_CODE_PWR,APP_KEY_EVENT_CLICK},\"bt function\n // key\",app_dfu_key_handler, NULL},\n#ifdef __USB_COMM__\n {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGPRESS},\n \"usb cdc key\",\n app_usb_cdc_comm_key_handler,\n NULL},\n#endif\n };\n\n TRACE(1, \"%s\", __func__);\n for (i = 0; i < (sizeof(key_cfg) / sizeof(APP_KEY_HANDLE)); i++) {\n app_key_handle_registration(&key_cfg[i]);\n }\n}\n" }, { "path": "apps/main/key_handler.h", "content": "#pragma once\n\nvoid app_key_init(void);\n\nvoid app_key_init_on_charging(void);\n" }, { "path": "apps/main/led_control.cpp", "content": "\n#include \"led_control.h\"\n#include \"common_apps_imports.h\"\n#include \"ibrt.h\"\n\n/******************************LED_status_timer*********************************************************/\nosTimerId LED_statusid = NULL;\n\nosTimerDef(defLED_status, LED_statusfun);\n\nvoid LED_statusinit(void) {\n LED_statusid = osTimerCreate(osTimer(defLED_status), osTimerOnce, (void *)0);\n}\n\nvoid LED_statusfun(const void *) {\n // TRACE(\"\\n\\n!!!!!!enter %s\\n\\n\",__func__);\n if ((Curr_Is_Slave() || app_device_bt_is_connected()) &&\n (!app_battery_is_charging())) {\n app_status_indication_set(APP_STATUS_INDICATION_CONNECTED);\n } else if (!app_device_bt_is_connected() && (!app_battery_is_charging())) {\n app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n } else if (app_battery_is_charging()) {\n app_status_indication_set(APP_STATUS_INDICATION_CHARGING);\n }\n // unsigned char\tfirstaddr;\n // I2C_ReadByte(decice_firstreg,&firstaddr);\n // TRACE(3,\"0X00 REG = 0x%x\",firstaddr);\n startLED_status(1000);\n}\n\nvoid startLED_status(int ms) {\n // TRACE(\"\\n\\n !!!!!!!!!!start %s\\n\\n\",__func__);\n osTimerStart(LED_statusid, ms);\n}\nvoid stopLED_status(void) {\n // TRACE(\"\\n\\n!!!!!!!!!! stop %s\\n\\n\",__func__);\n osTimerStop(LED_statusid);\n}\n\n/********************************LED_status_timer*******************************************************/\n" }, { "path": "apps/main/led_control.h", "content": "#pragma once\n\nvoid LED_statusinit(void);\nvoid startLED_status(int ms);\nvoid stopLED_status(void);\nvoid LED_statusfun(const void *);\n" }, { "path": "apps/main/lhdc.cpp", "content": "// LHDC needs a licence key\n// We dont have one; so probably cant ever officially use this. But its here for\n// preservation at the least\n\n#if defined(A2DP_LHDC_ON)\nextern \"C\" {\ntypedef struct bes_bt_local_info_t {\n uint8_t bt_addr[BTIF_BD_ADDR_SIZE];\n const char *bt_name;\n uint8_t bt_len;\n uint8_t ble_addr[BTIF_BD_ADDR_SIZE];\n const char *ble_name;\n uint8_t ble_len;\n} bes_bt_local_info;\n\ntypedef int (*LHDC_GET_BT_INFO)(bes_bt_local_info *bt_info);\nextern bool lhdcSetLicenseKeyTable(uint8_t *licTable, LHDC_GET_BT_INFO pFunc);\n}\nextern int bes_bt_local_info_get(bes_bt_local_info *local_info);\n\nvoid lhdc_license_check() {\n uint8_t lhdc_license_key = 0;\n uint8_t *lhdc_license_data = (uint8_t *)__lhdc_license_start + 0x98;\n TRACE(5, \"lhdc_license_data:%p, lhdc license %02x %02x %02x %02x\",\n lhdc_license_data, lhdc_license_data[0], lhdc_license_data[1],\n lhdc_license_data[2], lhdc_license_data[3]);\n\n app_overlay_select(APP_OVERLAY_A2DP_LHDC);\n TRACE(1, \"current_overlay = %d\", app_get_current_overlay());\n\n lhdc_license_key =\n lhdcSetLicenseKeyTable(lhdc_license_data, bes_bt_local_info_get);\n TRACE(0, \"lhdc_license_key:%d\", lhdc_license_key);\n\n if (lhdc_license_key) {\n TRACE(0, \"LHDC OK\");\n } else {\n TRACE(0, \"LHDC ERROR\");\n }\n}\n#endif\n" }, { "path": "apps/main/rb_codec.cpp", "content": "\n\n#ifdef RB_CODEC\nextern bool app_rbcodec_check_hfp_active(void);\nvoid app_switch_player_key(APP_KEY_STATUS *status, void *param) {\n TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n if (!rb_ctl_is_init_done()) {\n TRACE(0, \"rb ctl not init done\");\n return;\n }\n\n if (app_rbcodec_check_hfp_active()) {\n app_bt_key(status, param);\n return;\n }\n\n app_rbplay_audio_reset_pause_status();\n\n if (app_rbplay_mode_switch()) {\n app_voice_report(APP_STATUS_INDICATION_POWERON, 0);\n app_rbcodec_ctr_play_onoff(true);\n } else {\n app_rbcodec_ctr_play_onoff(false);\n app_voice_report(APP_STATUS_INDICATION_POWEROFF, 0);\n }\n return;\n}\n#endif\n" }, { "path": "apps/main/rb_codec.h", "content": "#pragma once\n\n#ifdef RB_CODEC\nextern int rb_ctl_init();\nextern bool rb_ctl_is_init_done(void);\nextern void app_rbplay_audio_reset_pause_status(void);\n#endif" }, { "path": "apps/mic/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += \\\n\t-Iservices/audio_process \\\n -Iservices/app_ai/inc \\\n\t-Iservices/bt_app \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/fs/fat/ChaN \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iservices/overlay \\\n\t-Iservices/nvrecord \\\n\t-Iservices/resources \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/audio/process/drc/include \\\n\t-Iservices/multimedia/audio/process/anc/include\\\n\t-Iservices/nv_section/aud_section \\\n\t-Iservices/nv_section/factory_section \\\n\t-Iservices/nv_section/include \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/drivers/bt \\\n\t-Iutils/cqueue \\\n\t-Iservices/audioflinger \\\n\t-Iutils/lockcqueue \\\n\t-Iutils/intersyshci \\\n\t-Iapps/key \\\n\t-Iapps/main \\\n\t-Iapps/common \\\n\t-Iapps/audioplayers \\\n\t-Iapps/audioplayers/rbplay \\\n\t-Iapps/factory \\\n\t-Iservices/ble_app \\\n\t-Iservices/tws/inc \\\n\t-Iutils/hwtimer_list \\\n\t-Iservices/ble_stack/ble_ip \\\n\t-Iservices/ble_stack/hl/api \\\n\t-Iservices/ble_stack/app/api/ \\\n\t-Iservices/ble_stack/common/api/ \\\n\t-Iservices/ble_stack/hl/inc/ \\\n\t-Iservices/ble_stack/ke/api \\\n\t-Iservices/ble_app/app_tws \\\n\t-Iapps/wings \\\n\t-Iapps/battery \\\n\t-Iapps/ota \\\n\t-Iapps/mic \\\n\t-Ithirdparty/audio_codec_lib/liblhdc-dec/inc \\\n\t-Ithirdparty/cyberon/cspotter/src \\\n\t-Iutils/crc32 \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n\t-Iservices/bt_app/a2dp_codecs/include\n\t\n" }, { "path": "apps/mic/app_mic.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n//#include \"mbed.h\"\n#include \n#include \n\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_overlay.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_codec.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_env.h\"\n#include \"tgt_hardware.h\"\n\n#include \"app_ring_merge.h\"\n\n#include \"app_bt_func.h\"\n#include \"app_mic.h\"\n#include \"besbt.h\"\n#include \"bt_drv.h\"\n#include \"bt_xtal_sync.h\"\n\n#include \"app_bt_media_manager.h\"\n#include \"app_hfp.h\"\n#include \"app_thread.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hal_codec.h\"\n#include \"hal_location.h\"\n#include \"hal_sleep.h\"\n#include \"string.h\"\n\nextern bool app_hfp_siri_is_active(void);\nextern int a2dp_volume_2_level_convert(uint8_t vol);\nextern bool mic_is_already_on;\n\ntypedef enum {\n MIC_EVENT_START,\n MIC_EVENT_STOP,\n MIC_EVENT_CHECK,\n} MIC_EVENT_TYPE;\n\nstatic MIC_APP_TYPE current_mictype = MIC_APP_NONE;\nstatic struct AF_STREAM_CONFIG_T mic_config[MIC_APP_MAX];\nosMutexId app_mic_mutex_id = NULL;\nosMutexDef(app_mic_mutex);\n\n// flag of is first mic date, if true ,will delete to avoid POP voice\nbool first_mic_in = false;\n\nstatic int internal_mic_start(MIC_APP_TYPE new_mictype) {\n TRACE(1, \"MIC_EVENT_START,current_mictype=%d\", current_mictype);\n assert(new_mictype != MIC_APP_NONE);\n if (current_mictype != MIC_APP_NONE) {\n TRACE(0, \"MIC START ERROR################\");\n return false;\n }\n if (new_mictype == MIC_APP_SOC_CALL) {\n if (btapp_hfp_get_call_state() || app_hfp_siri_is_active()) {\n TRACE(2, \"[%s] tws_mic_start_telephone_call: %d\", __func__,\n mic_config[new_mictype].sample_rate);\n if (mic_config[new_mictype].data_ptr != NULL) {\n } else {\n TRACE(1, \"[%s] Warning sco play not started\", __func__);\n }\n current_mictype = MIC_APP_SOC_CALL;\n }\n } else if (new_mictype == MIC_APP_SPEECH_RECO) {\n } else if (new_mictype == MIC_APP_CSPOTTER) {\n first_mic_in = true;\n current_mictype = MIC_APP_CSPOTTER;\n } else if (new_mictype == MIC_APP_MICRECORD) {\n current_mictype = MIC_APP_MICRECORD;\n } else if (new_mictype == MIC_APP_OTHER) {\n TRACE(0, \"~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\");\n }\n\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &mic_config[new_mictype]);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n return false;\n}\n\nstatic int internal_mic_stop(MIC_APP_TYPE new_mictype) {\n TRACE(1, \"MIC_EVENT_STOP,current_mictype=%d\", current_mictype);\n // assert(currentMicStauts == currentStatus);\n if (new_mictype != current_mictype) {\n TRACE(0, \"MIC STOP ERROR ################\");\n return false;\n }\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n first_mic_in = false;\n current_mictype = MIC_APP_NONE;\n app_sysfreq_req(APP_SYSFREQ_USER_APP_3, APP_SYSFREQ_32K);\n return true;\n}\n\nstatic int app_mic_process(APP_MESSAGE_BODY *msg_body) {\n MIC_EVENT_TYPE mic_event = (MIC_EVENT_TYPE)msg_body->message_id;\n MIC_APP_TYPE new_mictype = (MIC_APP_TYPE)msg_body->message_ptr;\n int ret = -1;\n TRACE(4, \"%s mic_event:%d new_mictype:%d current_mictype:%d\", __func__,\n mic_event, new_mictype, current_mictype);\n\n osMutexWait(app_mic_mutex_id, osWaitForever);\n if (mic_event == MIC_EVENT_START)\n ret = internal_mic_start(new_mictype);\n else if (mic_event == MIC_EVENT_STOP)\n ret = internal_mic_stop(new_mictype);\n else if (mic_event == MIC_EVENT_CHECK) {\n TRACE(1, \"MIC_EVENT_CHECK,current_mictype=%d\", current_mictype);\n if (current_mictype != new_mictype) {\n if (current_mictype != MIC_APP_NONE)\n internal_mic_stop(current_mictype);\n if (new_mictype != MIC_APP_CSPOTTER)\n internal_mic_start(new_mictype);\n ret = 0;\n }\n } else\n assert(0);\n osMutexRelease(app_mic_mutex_id);\n return ret;\n}\n\nvoid app_mic_init() {\n app_mic_mutex_id = osMutexCreate((osMutex(app_mic_mutex)));\n app_set_threadhandle(APP_MODUAL_MIC, app_mic_process);\n}\n\nint app_mic_register(MIC_APP_TYPE mic_type,\n struct AF_STREAM_CONFIG_T *newStream) {\n TRACE(2, \"app_mic_registration mic_type:%d,newStream=%p\\n\", mic_type,\n newStream);\n if (mic_type > MIC_APP_NONE && mic_type < MIC_APP_MAX) {\n osMutexWait(app_mic_mutex_id, osWaitForever);\n if (memcmp(&mic_config[mic_type], newStream,\n sizeof(struct AF_STREAM_CONFIG_T)) != 0) {\n TRACE(0, \"app_mic_registration Warning mic stream config changed!!!\");\n }\n memcpy(&mic_config[mic_type], newStream, sizeof(struct AF_STREAM_CONFIG_T));\n osMutexRelease(app_mic_mutex_id);\n return 0;\n }\n return -1;\n}\n\nint app_mic_deregister(MIC_APP_TYPE mic_type) {\n TRACE(1, \"app_mic_deregister mic_type:%d\\n\", mic_type);\n if (mic_type > MIC_APP_NONE && mic_type < MIC_APP_MAX) {\n osMutexWait(app_mic_mutex_id, osWaitForever);\n memset(&mic_config[mic_type], 0, sizeof(struct AF_STREAM_CONFIG_T));\n osMutexRelease(app_mic_mutex_id);\n return 0;\n }\n return -1;\n}\n\nbool app_mic_is_registed(MIC_APP_TYPE mic_type) {\n TRACE(1, \"app_mic_is_registed mic_type:%d\\n\", mic_type);\n bool ret = false;\n if (mic_type > MIC_APP_NONE && mic_type < MIC_APP_MAX) {\n osMutexWait(app_mic_mutex_id, osWaitForever);\n ret = mic_config[mic_type].data_ptr != NULL;\n osMutexRelease(app_mic_mutex_id);\n }\n return ret;\n}\n\nbool app_mic_start(MIC_APP_TYPE mic_type) {\n APP_MESSAGE_BLOCK msg;\n msg.mod_id = APP_MODUAL_MIC;\n msg.msg_body.message_id = MIC_EVENT_START;\n msg.msg_body.message_ptr = mic_type;\n app_mailbox_put(&msg);\n return true;\n}\n\nbool app_mic_stop(MIC_APP_TYPE mic_type) {\n APP_MESSAGE_BLOCK msg;\n msg.mod_id = APP_MODUAL_MIC;\n msg.msg_body.message_id = MIC_EVENT_STOP;\n msg.msg_body.message_ptr = mic_type;\n app_mailbox_put(&msg);\n return true;\n}\n\nvoid app_mic_check(MIC_APP_TYPE mic_type) {\n APP_MESSAGE_BLOCK msg;\n msg.mod_id = APP_MODUAL_MIC;\n msg.msg_body.message_id = MIC_EVENT_CHECK;\n msg.msg_body.message_ptr = mic_type;\n app_mailbox_put(&msg);\n}\n\nMIC_APP_TYPE app_mic_status(void) {\n MIC_APP_TYPE ret;\n osMutexWait(app_mic_mutex_id, osWaitForever);\n ret = current_mictype;\n osMutexRelease(app_mic_mutex_id);\n return ret;\n}\n" }, { "path": "apps/mic/app_mic.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_MIC_H__\n#define __APP_MIC_H__\n\n#include \n#include \n\n#include \"cmsis_os.h\"\n#include \"tgt_hardware.h\"\n#include \"hal_uart.h\"\n#include \"hal_timer.h\"\n#include \"audioflinger.h\"\n#include \"hal_trace.h\"\n#include \"app_bt_stream.h\"\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\ntypedef enum {\n\tMIC_APP_NONE,\n\tMIC_APP_SOC_CALL,\n\tMIC_APP_SPEECH_RECO,\n\tMIC_APP_CSPOTTER,\n\tMIC_APP_MICRECORD,\n\tMIC_APP_OTHER,\n\tMIC_APP_MAX,\n}MIC_APP_TYPE;\n\nvoid app_mic_init();\n\nbool app_mic_start(MIC_APP_TYPE mic_type);\n\nbool app_mic_stop(MIC_APP_TYPE mic_type);\n\nint app_mic_register(MIC_APP_TYPE mic_type, struct AF_STREAM_CONFIG_T *newStream);\n\nint app_mic_deregister(MIC_APP_TYPE mic_type);\n\nbool app_mic_is_registed(MIC_APP_TYPE mic_type);\n\nvoid app_mic_check(MIC_APP_TYPE mic_type);\n\nMIC_APP_TYPE app_mic_status(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif//__APP_MIC_H__\n" }, { "path": "apps/mic_alg/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += \\\n -Iutils/boot_struct \\\n -Iutils/intersyshci \\\n -Iutils/hwtimer_list \\\n -Iservices/bt_app \\\n -Iservices/nvrecord \\\n -Iservices/wl_filter \\\n -Iservices/bt_if/inc \\\n -Iservices/resources \\\n -Iservices/remoter \\\n -Iservices/wl_filter \\\n -Iservices/audio_dump/include \\\n -Iservices/multimedia/wl_alg/gcc_plat/include \\\n -Iservices/multimedia/wl_alg/vad_user/include \\\n -Iservices/overlay \\\n -Iservices/multimedia/wl_alg/nsx_main/include \\\n -Iservices/multimedia/wl_alg/agc/include \\\n -Iservices/multimedia/wl_alg/utility/include \\\n -Iservices/multimedia/wl_alg/notch_filter/include \\\n -Iservices/multimedia/algorithm/fft/include \\\n -Iservices/multimedia/speech/inc \\\n -Iapps/key \\\n -Iapps/i2c_sensor \\\n -Iplatform/drivers/bt \\\n -Iplatform/drivers/ana \\\n\t-Iapps/battery\n\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_app_factory_audio.o += -D__AUDIO_RESAMPLE__\nendif\nifeq ($(SW_CAPTURE_RESAMPLE),1)\nCFLAGS_app_factory_audio.o += -DSW_CAPTURE_RESAMPLE\nendif\n\nifeq ($(POWERKEY_I2C_SWITCH),1)\nCFLAGS_app_factory.o += -DPOWERKEY_I2C_SWITCH\nendif\n\n" }, { "path": "apps/mic_alg/app_mic_alg.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_bt_stream.h\"\n#include \"app_media_player.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"resources.h\"\n//#include \"app_factory.h\"\n#include \"string.h\"\n\n// for audio\n#include \"app_audio.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n#include \"hal_timer.h\"\n\n#include \"app_mic_alg.h\"\n#include \"tgt_hardware.h\"\n\n#ifdef NOTCH_FILTER\n#include \"autowah.h\"\n#endif\n\n#ifdef WL_NSX\n#include \"nsx_main.h\"\n#endif\n#include \"app_overlay.h\"\n#include \"math.h\"\n\n#include \"apps.h\"\n\n#ifdef WEBRTC_AGC\n#include \"agc_main.h\"\n#endif\n\n#ifdef WL_NSX\n#define WEBRTC_NSX_BUFF_SIZE (14000)\n#endif\n\n#ifdef WL_VAD\n#include \"vad_user.h\"\n#endif\n\n#ifdef WL_DEBUG_MODE\n#include \"nvrecord_env.h\"\n#endif\n\n#ifdef REMOTE_UART\n#include \"app_remoter_uart.h\"\n#endif\n\n#if defined(WL_AEC)\n#include \"wl_sco_process.h\"\n#endif\n#include \"speech_memory.h\"\n\n#ifdef I2C_SENSOR\n#include \"app_i2c_sensor.h\"\n#endif\n\nstatic inline float clampf(float v, float min, float max) {\n return v < min ? min : (v > max ? max : v);\n}\n\n#ifdef WL_NSX_5MS\n#define BT_AUDIO_FACTORMODE_BUFF_SIZE (160 * 2)\n#else\n#define BT_AUDIO_FACTORMODE_BUFF_SIZE (6 * 320 * 16)\n#endif\n\n#define NSX_FRAME_SIZE 160\n\nstatic enum APP_AUDIO_CACHE_T a2dp_cache_status = APP_AUDIO_CACHE_QTY;\n\n#if defined(WL_AEC)\nstatic short POSSIBLY_UNUSED aec_out[BT_AUDIO_FACTORMODE_BUFF_SIZE >> 2];\nstatic short POSSIBLY_UNUSED far_buff[BT_AUDIO_FACTORMODE_BUFF_SIZE >> 2];\n#endif\n\nstatic short POSSIBLY_UNUSED out_buff[BT_AUDIO_FACTORMODE_BUFF_SIZE >> 2];\nstatic short POSSIBLY_UNUSED tmp_buff[BT_AUDIO_FACTORMODE_BUFF_SIZE >> 2];\n\n// static short revert_buff[BT_AUDIO_FACTORMODE_BUFF_SIZE>>2];\n// static short audio_uart_buff[BT_AUDIO_FACTORMODE_BUFF_SIZE>>2];\n\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2\n\nstatic short POSSIBLY_UNUSED one_buff[BT_AUDIO_FACTORMODE_BUFF_SIZE >> 2];\nstatic short POSSIBLY_UNUSED two_buff[BT_AUDIO_FACTORMODE_BUFF_SIZE >> 2];\n\nstatic short POSSIBLY_UNUSED left_out[BT_AUDIO_FACTORMODE_BUFF_SIZE >> 2];\nstatic short POSSIBLY_UNUSED right_out[BT_AUDIO_FACTORMODE_BUFF_SIZE >> 2];\n\nstatic void POSSIBLY_UNUSED aaudio_div_stero_to_rmono(int16_t *dst_buf,\n int16_t *src_buf,\n uint32_t src_len) {\n // Copy from tail so that it works even if dst_buf == src_buf\n for (uint32_t i = 0; i < src_len >> 1; i++) {\n dst_buf[i] = src_buf[i * 2 + 1];\n }\n}\nstatic void POSSIBLY_UNUSED aaudio_div_stero_to_lmono(int16_t *dst_buf,\n int16_t *src_buf,\n uint32_t src_len) {\n // Copy from tail so that it works even if dst_buf == src_buf\n for (uint32_t i = 0; i < src_len >> 1; i++) {\n dst_buf[i] = src_buf[i * 2 + 0];\n }\n}\n\nstatic void POSSIBLY_UNUSED audio_mono2stereo_16bits(int16_t *dst_buf,\n int16_t *left_buf,\n int16_t *right_buf,\n uint32_t src_len) {\n uint32_t i = 0;\n for (i = 0; i < src_len; ++i) {\n dst_buf[i * 2 + 0] = left_buf[i];\n dst_buf[i * 2 + 1] = right_buf[i];\n }\n}\n\n#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 3\n\n#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 4\n\n#endif\n\nextern uint8_t supress_step;\nextern uint32_t transfer_factor;\nextern uint32_t diff_energy;\nextern uint32_t level_shift;\n\nstatic inline double convert_multiple_to_db(uint32_t multiple) {\n return 20 * log10(multiple);\n}\n#define DUMP_FRAME_LEN 0x3C0\nstatic short POSSIBLY_UNUSED revert_buff[2 + 1 * DUMP_FRAME_LEN];\nint32_t tx_pcmbuf32[960];\n\nextern int app_reset(void);\n\nextern void app_bt_volumeup();\nextern void app_bt_volumedown();\n\nvoid vol_state_process(uint32_t db_val) {\n TRACE(2, \"db value is:%d volume_is:%d \", db_val,\n app_bt_stream_local_volume_get());\n\n if ((db_val < 52) && (app_bt_stream_local_volume_get() > 10)) {\n app_bt_volumedown();\n } else if ((db_val > 60) && (app_bt_stream_local_volume_get() < 13)) {\n app_bt_volumeup();\n } else if ((db_val > 72) && (app_bt_stream_local_volume_get() < 15)) {\n app_bt_volumeup();\n }\n}\n\nstatic uint32_t app_mic_alg_data_come(uint8_t *buf, uint32_t len) {\n uint32_t pcm_len = len >> 1;\n\n short POSSIBLY_UNUSED *tx_pcmbuf16 = (short *)buf;\n\n // DUMP16(\"%d, \",tx_pcmbuf16,30);\n // memcpy(tmp_buff,pcm_buff,len);\n\n int32_t stime = 0;\n static int32_t nsx_cnt = 0;\n static int32_t dump_cnt = 0;\n\n nsx_cnt++;\n dump_cnt++;\n\n DUMP16(\"%d,\", tx_pcmbuf16, 30);\n if (false == (nsx_cnt & 0x3F)) {\n stime = hal_sys_timer_get();\n // TRACE(\"aecm echo time: lens:%d g_time_cnt:%d \",len, g_time_cnt);\n }\n\n#ifdef WL_DET\n if (nsx_cnt > 100) {\n static double last_sum = 0, last_avg = 0;\n\n uint32_t sum_ss = 0;\n // short db_val = 0;\n double db_sum = 0;\n for (uint32_t i_cnt = 0; i_cnt < pcm_len; i_cnt++) {\n sum_ss += ABS(tx_pcmbuf16[i_cnt]);\n }\n\n sum_ss = 1 * sum_ss / pcm_len;\n\n db_sum = convert_multiple_to_db(sum_ss);\n // db_val = (short)(100*db_sum);\n last_sum += db_sum;\n last_avg = last_sum / nsx_cnt;\n\n db_sum = db_sum * (double)0.02 + last_avg * (double)0.98;\n\n // TRACE(2,\"db value is:%d sum_ss:%d \",(uint32_t)db_sum,sum_ss);\n // TRACE(2,\"db value is:%d \",(uint32_t)db_sum);\n vol_state_process((uint32_t)db_sum);\n }\n\n#endif\n\n if (false == (nsx_cnt & 0x3F)) {\n // TRACE(\"drc 48 mic_alg 16k nsx 3 agc 15 closed speed time:%d ms and\n // pcm_lens:%d freq:%d \", TICKS_TO_MS(hal_sys_timer_get() - stime),\n // pcm_len,hal_sysfreq_get()); TRACE(\"notch 500 mic_alg 16k nsx 3 agc 15\n // closed speed time:%d ms and pcm_lens:%d freq:%d \",\n // TICKS_TO_MS(hal_sys_timer_get() - stime), pcm_len,hal_sysfreq_get());\n TRACE(2, \"denoise det speed time:%d ms and pcm_lens:%d freq:%d \",\n TICKS_TO_MS(hal_sys_timer_get() - stime), pcm_len, hal_sysfreq_get());\n }\n\n if (a2dp_cache_status == APP_AUDIO_CACHE_QTY) {\n a2dp_cache_status = APP_AUDIO_CACHE_OK;\n }\n return len;\n}\n\n// static uint32_t app_mic_uart_playback_data(uint8_t *buf, uint32_t len)\n// {\n// if (a2dp_cache_status != APP_AUDIO_CACHE_QTY){\n// #if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2\n// #ifdef WL_AEC\n// app_audio_pcmbuff_get((uint8_t *)app_audioloop_play_cache, len/2);\n// app_bt_stream_copy_track_one_to_two_16bits((int16_t *)buf,\n// app_audioloop_play_cache, len/2/2); #else\n// app_audio_pcmbuff_get((uint8_t *)buf, len);\n// #endif\n// #else\n// app_audio_pcmbuff_get((uint8_t *)app_audioloop_play_cache, len/2);\n// app_bt_stream_copy_track_one_to_two_16bits((int16_t *)buf,\n// app_audioloop_play_cache, len/2/2);\n// #endif\n// }\n// return len;\n// }\n\nstatic uint8_t buff_capture[BT_AUDIO_FACTORMODE_BUFF_SIZE];\n\nint app_mic_alg_audioloop(bool on, enum APP_SYSFREQ_FREQ_T freq) {\n struct AF_STREAM_CONFIG_T stream_cfg;\n static bool isRun = false;\n\n TRACE(2, \"app_mic_alg work:%d op:%d freq:%d\", isRun, on, freq);\n\n if (isRun == on)\n return 0;\n\n if (on) {\n\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0, freq);\n\n a2dp_cache_status = APP_AUDIO_CACHE_QTY;\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n stream_cfg.bits = AUD_BITS_16;\n\n stream_cfg.channel_num = AUD_CHANNEL_NUM_1;\n\n stream_cfg.sample_rate = AUD_SAMPRATE_48000;\n\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n\n stream_cfg.vol = CODEC_SADC_VOL;\n stream_cfg.io_path = AUD_INPUT_PATH_ASRMIC;\n\n stream_cfg.handler = app_mic_alg_data_come;\n\n stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(buff_capture);\n stream_cfg.data_size =\n BT_AUDIO_FACTORMODE_BUFF_SIZE * stream_cfg.channel_num;\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n\n // stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n // stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n // stream_cfg.handler = app_mic_uart_playback_data;\n\n // stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(buff_play);\n // stream_cfg.data_size = BT_AUDIO_FACTORMODE_BUFF_SIZE*2;\n // af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n\n // af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n TRACE(2, \"app_mic_uart ss loopback on\");\n\n } else {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n // af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n // af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n TRACE(2, \"app_mic_16k loopback off\");\n\n // app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n }\n\n isRun = on;\n return 0;\n}\n" }, { "path": "apps/mic_alg/app_mic_alg.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_MIC_ALG_H__\n#define __APP_MIC_ALG_H__\n\n#include \"app_utils.h\"\n\nint app_mic_alg_audioloop(bool on, enum APP_SYSFREQ_FREQ_T freq);\nvoid vol_state_process(uint32_t db_val);\n\n#endif\n" }, { "path": "apps/pwl/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += -Iplatform/drivers/ana\n" }, { "path": "apps/pwl/app_pwl.cpp", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_pwl.h\"\n#include \"cmsis_os.h\"\n#include \"hal_gpio.h\"\n#include \"hal_iomux.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n\n#define APP_PWL_TRACE(s, ...)\n// TRACE(s, ##__VA_ARGS__)\n\n#if (CFG_HW_PLW_NUM > 0)\nstatic void app_pwl_timehandler(void const *param);\n\nosTimerDef(APP_PWL_TIMER0, app_pwl_timehandler); // define timers\n#if (CFG_HW_PLW_NUM == 2)\nosTimerDef(APP_PWL_TIMER1, app_pwl_timehandler);\n#endif\n\nstruct APP_PWL_T {\n enum APP_PWL_ID_T id;\n struct APP_PWL_CFG_T config;\n uint8_t partidx;\n osTimerId timer;\n};\n\nstatic struct APP_PWL_T app_pwl[APP_PWL_ID_QTY];\n\nstatic void app_pwl_timehandler(void const *param) {\n struct APP_PWL_T *pwl = (struct APP_PWL_T *)param;\n struct APP_PWL_CFG_T *cfg = &(pwl->config);\n APP_PWL_TRACE(2, \"%s %x\", __func__, param);\n\n osTimerStop(pwl->timer);\n\n pwl->partidx++;\n if (cfg->periodic) {\n if (pwl->partidx >= cfg->parttotal) {\n pwl->partidx = 0;\n }\n } else {\n if (pwl->partidx >= cfg->parttotal) {\n return;\n }\n }\n\n APP_PWL_TRACE(3, \"idx:%d pin:%d lvl:%d\", pwl->partidx,\n cfg_hw_pinmux_pwl[pwl->id].pin, cfg->part[pwl->partidx].level);\n if (!cfg->part[pwl->partidx].level) {\n#if defined(__PMU_VIO_DYNAMIC_CTRL_MODE__)\n pmu_viorise_req(pwl->id == APP_PWL_ID_0 ? PMU_VIORISE_REQ_USER_PWL0\n : PMU_VIORISE_REQ_USER_PWL1,\n true);\n#endif\n hal_gpio_pin_set((enum HAL_GPIO_PIN_T)cfg_hw_pinmux_pwl[pwl->id].pin);\n } else {\n hal_gpio_pin_clr((enum HAL_GPIO_PIN_T)cfg_hw_pinmux_pwl[pwl->id].pin);\n#if defined(__PMU_VIO_DYNAMIC_CTRL_MODE__)\n pmu_viorise_req(pwl->id == APP_PWL_ID_0 ? PMU_VIORISE_REQ_USER_PWL0\n : PMU_VIORISE_REQ_USER_PWL1,\n false);\n#endif\n }\n osTimerStart(pwl->timer, cfg->part[pwl->partidx].time);\n}\n#endif\n\nint app_pwl_open(void) {\n#if (CFG_HW_PLW_NUM > 0)\n uint8_t i;\n APP_PWL_TRACE(1, \"%s\", __func__);\n for (i = 0; i < APP_PWL_ID_QTY; i++) {\n app_pwl[i].id = APP_PWL_ID_QTY;\n memset(&(app_pwl[i].config), 0, sizeof(struct APP_PWL_CFG_T));\n hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)&cfg_hw_pinmux_pwl[i],\n 1);\n hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)cfg_hw_pinmux_pwl[i].pin,\n HAL_GPIO_DIR_OUT, 1);\n }\n app_pwl[APP_PWL_ID_0].timer = osTimerCreate(\n osTimer(APP_PWL_TIMER0), osTimerOnce, &app_pwl[APP_PWL_ID_0]);\n#if (CFG_HW_PLW_NUM == 2)\n app_pwl[APP_PWL_ID_1].timer = osTimerCreate(\n osTimer(APP_PWL_TIMER1), osTimerOnce, &app_pwl[APP_PWL_ID_1]);\n#endif\n#endif\n return 0;\n}\n\nint app_pwl_start(enum APP_PWL_ID_T id) {\n#if (CFG_HW_PLW_NUM > 0)\n struct APP_PWL_T *pwl = NULL;\n struct APP_PWL_CFG_T *cfg = NULL;\n\n if (id >= APP_PWL_ID_QTY) {\n return -1;\n }\n\n APP_PWL_TRACE(2, \"%s %d\", __func__, id);\n\n pwl = &app_pwl[id];\n cfg = &(pwl->config);\n\n if (pwl->id == APP_PWL_ID_QTY) {\n return -1;\n }\n\n pwl->partidx = 0;\n if (pwl->partidx >= cfg->parttotal) {\n return -1;\n }\n\n osTimerStop(pwl->timer);\n\n APP_PWL_TRACE(3, \"idx:%d pin:%d lvl:%d\", pwl->partidx,\n cfg_hw_pinmux_pwl[pwl->id].pin, cfg->part[pwl->partidx].level);\n if (!cfg->part[pwl->partidx].level) {\n#if defined(__PMU_VIO_DYNAMIC_CTRL_MODE__)\n pmu_viorise_req(pwl->id == APP_PWL_ID_0 ? PMU_VIORISE_REQ_USER_PWL0\n : PMU_VIORISE_REQ_USER_PWL1,\n false);\n#endif\n hal_gpio_pin_set((enum HAL_GPIO_PIN_T)cfg_hw_pinmux_pwl[pwl->id].pin);\n } else {\n hal_gpio_pin_clr((enum HAL_GPIO_PIN_T)cfg_hw_pinmux_pwl[pwl->id].pin);\n#if defined(__PMU_VIO_DYNAMIC_CTRL_MODE__)\n pmu_viorise_req(pwl->id == APP_PWL_ID_0 ? PMU_VIORISE_REQ_USER_PWL0\n : PMU_VIORISE_REQ_USER_PWL1,\n false);\n#endif\n }\n osTimerStart(pwl->timer, cfg->part[pwl->partidx].time);\n#endif\n return 0;\n}\n\nint app_pwl_setup(enum APP_PWL_ID_T id, struct APP_PWL_CFG_T *cfg) {\n#if (CFG_HW_PLW_NUM > 0)\n if (cfg == NULL || id >= APP_PWL_ID_QTY) {\n return -1;\n }\n APP_PWL_TRACE(2, \"%s %d\", __func__, id);\n\n hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)cfg_hw_pinmux_pwl[id].pin,\n HAL_GPIO_DIR_OUT, cfg->startlevel ? 0 : 1);\n app_pwl[id].id = id;\n memcpy(&(app_pwl[id].config), cfg, sizeof(struct APP_PWL_CFG_T));\n\n osTimerStop(app_pwl[id].timer);\n#endif\n return 0;\n}\n\nint app_pwl_stop(enum APP_PWL_ID_T id) {\n#if (CFG_HW_PLW_NUM > 0)\n if (id >= APP_PWL_ID_QTY) {\n return -1;\n }\n\n osTimerStop(app_pwl[id].timer);\n hal_gpio_pin_set((enum HAL_GPIO_PIN_T)cfg_hw_pinmux_pwl[id].pin);\n#endif\n return 0;\n}\n\nint app_pwl_close(void) {\n#if (CFG_HW_PLW_NUM > 0)\n uint8_t i;\n for (i = 0; i < APP_PWL_ID_QTY; i++) {\n if (app_pwl[i].id != APP_PWL_ID_QTY)\n app_pwl_stop((enum APP_PWL_ID_T)i);\n }\n#endif\n return 0;\n}\n" }, { "path": "apps/pwl/app_pwl.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_PWL_H__\n#define __APP_PWL_H__\n\n#include \"tgt_hardware.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum APP_PWL_ID_T {\n APP_PWL_ID_0 = 0,\n APP_PWL_ID_1 = 1,\n\n#if (CFG_HW_PLW_NUM == 1)\n APP_PWL_ID_QTY = 1,\n#elif (CFG_HW_PLW_NUM == 2)\n APP_PWL_ID_QTY = 2,\n#else\n APP_PWL_ID_QTY = 0,\n#endif\n};\n\nstruct APP_PWL_CFG_T {\n struct PWL_CYCLE_ONCE {\n uint8_t level;\n uint32_t time;\n }part[10];\n uint8_t parttotal;\n uint8_t startlevel;\n bool periodic;\n};\n\nint app_pwl_open(void);\n\nint app_pwl_start(enum APP_PWL_ID_T id);\n\nint app_pwl_setup(enum APP_PWL_ID_T id, struct APP_PWL_CFG_T *cfg);\n\nint app_pwl_stop(enum APP_PWL_ID_T id);\n\nint app_pwl_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n" }, { "path": "apps/voice_detector/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nsubdir-ccflags-y += \\\n\t-Iservices/bt_app \\\n\t-Iplatform/drivers/ana \\\n\t-Iapps/voice_detector \\\n\t-Iservices/audio_dump/include \\\n\t-Ithirdparty/cyberon_lib/include \\\n\t-Ithirdparty/cyberon_lib/src \\\n\t-Iservices/multimedia/speech/inc\t\n\nifeq ($(VD_TEST),1)\nsubdir-ccflags-y += -DVD_TEST\nendif\n\nifeq ($(I2C_VAD),1)\nsubdir-ccflags-y += -DI2C_VAD\nendif\n\n" }, { "path": "apps/voice_detector/app_voice_detector.cpp", "content": "#include \"app_voice_detector.h\"\n#include \"app_thread.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"tgt_hardware.h\"\n#include \"voice_detector.h\"\n#include \n#include \n\n#define APP_VD_DEBUG\n\n#ifdef APP_VD_DEBUG\n#define APP_VD_LOG(str, ...) LOG_DEBUG(LOG_MOD(AUD), str, ##__VA_ARGS__)\n#else\n#define APP_VD_LOG(...) \\\n do { \\\n } while (0)\n#endif\n#define APP_VD_ERR(str, ...) LOG_ERROR(LOG_MOD(AUD), str, ##__VA_ARGS__)\n\nosMutexId vd_mutex_id = NULL;\nosMutexDef(vd_mutex);\n\nstatic int cmd_arr_evt_vad_start[] = {\n VOICE_DET_CMD_AUD_CAP_STOP, VOICE_DET_CMD_AUD_CAP_CLOSE,\n VOICE_DET_CMD_VAD_OPEN, VOICE_DET_CMD_VAD_START,\n VOICE_DET_CMD_SYS_CLK_32K,\n};\n#if 0\nstatic int cmd_arr_evt_cap_start[] = {\n VOICE_DET_CMD_VAD_STOP,\n VOICE_DET_CMD_VAD_CLOSE,\n VOICE_DET_CMD_AUD_CAP_OPEN,\n VOICE_DET_CMD_AUD_CAP_START,\n};\n#else\nstatic int cmd_arr_evt_cap_start[] = {\n VOICE_DET_CMD_AUD_CAP_OPEN,\n VOICE_DET_CMD_AUD_CAP_START,\n VOICE_DET_CMD_VAD_STOP,\n VOICE_DET_CMD_VAD_CLOSE,\n};\n#endif\nstatic int cmd_arr_evt_close[] = {\n VOICE_DET_CMD_AUD_CAP_STOP, VOICE_DET_CMD_AUD_CAP_CLOSE,\n VOICE_DET_CMD_VAD_STOP, VOICE_DET_CMD_VAD_CLOSE,\n VOICE_DET_CMD_EXIT,\n};\n#if 1\nstatic int cmd_arr_evt_cap_close[] = {\n VOICE_DET_CMD_AUD_CAP_STOP,\n VOICE_DET_CMD_AUD_CAP_CLOSE,\n VOICE_DET_CMD_EXIT,\n};\n#endif\nstatic int cmd_arr_evt_vad_close[] = {\n VOICE_DET_CMD_VAD_STOP,\n VOICE_DET_CMD_VAD_CLOSE,\n VOICE_DET_CMD_EXIT,\n};\n\nstatic int app_voice_detector_process(APP_MESSAGE_BODY *msg_body) {\n enum voice_detector_id id = (enum voice_detector_id)msg_body->message_id;\n enum voice_detector_evt evt = (enum voice_detector_evt)msg_body->message_ptr;\n int ret = 0, num, *cmds;\n\n voice_detector_enhance_perform(id); // set sys clock to 104M or 208M\n\n osMutexWait(vd_mutex_id, osWaitForever);\n switch (evt) {\n case VOICE_DET_EVT_VAD_START:\n if (voice_detector_query_status(id) == VOICE_DET_STATE_VAD_CLOSE) {\n cmds = &cmd_arr_evt_vad_start[0];\n num = ARRAY_SIZE(cmd_arr_evt_vad_start);\n } else {\n cmds = &cmd_arr_evt_vad_start[2];\n num = ARRAY_SIZE(cmd_arr_evt_vad_start) - 2;\n }\n break;\n case VOICE_DET_EVT_AUD_CAP_START:\n cmds = cmd_arr_evt_cap_start;\n num = ARRAY_SIZE(cmd_arr_evt_cap_start);\n break;\n case VOICE_DET_EVT_CLOSE:\n if (voice_detector_query_status(id) == VOICE_DET_STATE_VAD_CLOSE) {\n cmds = &cmd_arr_evt_cap_close[0];\n num = ARRAY_SIZE(cmd_arr_evt_cap_close);\n } else {\n cmds = &cmd_arr_evt_vad_close[0];\n num = ARRAY_SIZE(cmd_arr_evt_vad_close);\n }\n break;\n default:\n cmds = cmd_arr_evt_close;\n num = ARRAY_SIZE(cmd_arr_evt_close);\n break;\n }\n ret = voice_detector_send_cmd_array(id, cmds, num);\n if (ret) {\n APP_VD_ERR(\"%s, send cmd error %d\", __func__, ret);\n }\n ret = voice_detector_run(id, VOICE_DET_MODE_EXEC_CMD);\n if (ret) {\n APP_VD_ERR(\"%s, run cmd error %d\", __func__, ret);\n }\n if (evt == VOICE_DET_EVT_CLOSE) {\n voice_detector_close(id);\n }\n osMutexRelease(vd_mutex_id);\n return ret;\n}\n\nstatic void voice_detector_send_msg(uint32_t id, uint32_t evt) {\n APP_MESSAGE_BLOCK msg;\n\n msg.mod_id = APP_MODUAL_VOICE_DETECTOR;\n msg.msg_body.message_id = id;\n msg.msg_body.message_ptr = evt;\n\n app_mailbox_put(&msg);\n}\n\nstatic void voice_detector_wakeup_system(int state, void *param) {\n enum voice_detector_id id = VOICE_DETECTOR_ID_0;\n\n if (voice_detector_query_status(id) == VOICE_DET_STATE_VAD_START) {\n app_voice_detector_send_event(id, VOICE_DET_EVT_AUD_CAP_START);\n }\n\n APP_VD_LOG(\"%s, state=%d\", __func__, state);\n // APP_VD_LOG(\"cpu freq=%d\", hal_sys_timer_calc_cpu_freq(5,0));\n}\n\nstatic void voice_not_detector_wakeup_system(int state, void *param) {\n enum voice_detector_id id = VOICE_DETECTOR_ID_0;\n\n if (voice_detector_query_status(id) == VOICE_DET_STATE_VAD_START) {\n app_voice_detector_send_event(id, VOICE_DET_EVT_VAD_START);\n }\n\n APP_VD_LOG(\"%s, state=%d\", __func__, state);\n // APP_VD_LOG(\"cpu freq=%d\", hal_sys_timer_calc_cpu_freq(5,0));\n}\n\nvoid app_voice_detector_init(void) {\n APP_VD_LOG(\"%s\", __func__);\n\n if (vd_mutex_id == NULL) {\n vd_mutex_id = osMutexCreate((osMutex(vd_mutex)));\n app_set_threadhandle(APP_MODUAL_VOICE_DETECTOR, app_voice_detector_process);\n }\n}\n\nint app_voice_detector_open(enum voice_detector_id id,\n enum AUD_VAD_TYPE_T vad_type) {\n int r;\n\n APP_VD_LOG(\"%s\", __func__);\n\n if (!vd_mutex_id) {\n APP_VD_LOG(\"%s, mutex is null\", __func__);\n return -1;\n }\n osMutexWait(vd_mutex_id, osWaitForever);\n r = voice_detector_open(id, vad_type);\n if (!r) {\n voice_detector_setup_callback(id, VOICE_DET_FIND_APP,\n voice_detector_wakeup_system, NULL);\n voice_detector_setup_callback(id, VOICE_DET_NOT_FIND_APP,\n voice_not_detector_wakeup_system, NULL);\n }\n osMutexRelease(vd_mutex_id);\n return r;\n}\n\nint app_voice_detector_setup_vad(enum voice_detector_id id,\n struct AUD_VAD_CONFIG_T *conf) {\n int r;\n\n APP_VD_LOG(\"%s\", __func__);\n\n if (!vd_mutex_id) {\n APP_VD_LOG(\"%s, mutex is null\", __func__);\n return -1;\n }\n osMutexWait(vd_mutex_id, osWaitForever);\n r = voice_detector_setup_vad(id, conf);\n osMutexRelease(vd_mutex_id);\n return r;\n}\n\nint app_voice_detector_setup_stream(enum voice_detector_id id,\n enum AUD_STREAM_T stream_id,\n struct AF_STREAM_CONFIG_T *stream) {\n int r;\n\n APP_VD_LOG(\"%s\", __func__);\n\n if (!vd_mutex_id) {\n APP_VD_LOG(\"%s, mutex is null\", __func__);\n return -1;\n }\n osMutexWait(vd_mutex_id, osWaitForever);\n r = voice_detector_setup_stream(id, stream_id, stream);\n osMutexRelease(vd_mutex_id);\n return r;\n}\n\nint app_voice_detector_setup_callback(enum voice_detector_id id,\n enum voice_detector_cb_id func_id,\n voice_detector_cb_t func, void *param) {\n int r;\n\n APP_VD_LOG(\"%s\", __func__);\n\n if (!vd_mutex_id) {\n APP_VD_LOG(\"%s, mutex is null\", __func__);\n return -1;\n }\n osMutexWait(vd_mutex_id, osWaitForever);\n r = voice_detector_setup_callback(id, func_id, func, param);\n osMutexRelease(vd_mutex_id);\n return r;\n}\n\nint app_voice_detector_send_event(enum voice_detector_id id,\n enum voice_detector_evt evt) {\n APP_VD_LOG(\"%s, id=%d, evt=%d\", __func__, id, evt);\n\n voice_detector_send_msg(id, evt);\n return 0;\n}\n\nvoid app_voice_detector_close(enum voice_detector_id id) {\n APP_VD_LOG(\"%s\", __func__);\n\n voice_detector_send_msg(id, VOICE_DET_EVT_CLOSE);\n}\n\nvoid app_voice_detector_capture_start(enum voice_detector_id id) {\n APP_VD_LOG(\"%s\", __func__);\n\n voice_detector_send_msg(id, VOICE_DET_EVT_AUD_CAP_START);\n}\n\nvoid app_voice_detector_get_vad_data_info(\n enum voice_detector_id id, struct CODEC_VAD_BUF_INFO_T *vad_buf_info) {\n voice_detector_get_vad_data_info(id, vad_buf_info);\n}\n" }, { "path": "apps/voice_detector/app_voice_detector.h", "content": "#ifndef __APP_VOICE_DETECTOR_H__\n#define __APP_VOICE_DETECTOR_H__\n#include \"hal_aud.h\"\n#include \"audioflinger.h\"\n#include \"voice_detector.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/* event of voice detector */\nenum voice_detector_evt {\n VOICE_DET_EVT_IDLE,\n VOICE_DET_EVT_OPEN,\n VOICE_DET_EVT_VAD_START,\n VOICE_DET_EVT_AUD_CAP_START,\n VOICE_DET_EVT_CLOSE,\n};\n\n/*\n * Initialize voice detector.\n * This function should be called by main thread.\n */\nvoid app_voice_detector_init();\n\n/*\n * Open voice detector specified by a unique id.\n * This function must be callbed firstly.\n * return: 0(success) !0(fail)\n */\nint app_voice_detector_open(enum voice_detector_id id, enum AUD_VAD_TYPE_T vad_type);\n\n/*\n * Configure VAD by specified structure conf.\n * This function is optional to be called because of VAD also\n * can be initialized by default parameter.\n * return: 0(success) !0(fail)\n */\nint app_voice_detector_setup_vad(enum voice_detector_id id,\n struct AUD_VAD_CONFIG_T *conf);\n/*\n * Setup capture(or playback) stream to voice detector.\n * The capture stream will be used to open or start audio device.\n * This function must be called at least once;\n * return: 0(success) !0(fail)\n */\nint app_voice_detector_setup_stream(enum voice_detector_id id,\n enum AUD_STREAM_T stream_id,\n struct AF_STREAM_CONFIG_T *stream);\n/*\n * Setup callback function to voice detector.\n * voice detector has several callbacks and normally we use func_id to specifiy\n * it's type.\n *\n * parameters:\n * id: voice detector identify number\n * func_id: callback type identify number\n *\n * VOICE_DET_CB_PREVIOUS:\n * This callback will be invoked before any command executed;\n * VOICE_DET_CB_RUN_WAIT:\n * This callback will be invoked while command queue is empty;\n * VOICE_DET_CB_RUN_DONE:\n * This callback will be invoked while one command executed done;\n * VOICE_DET_CB_POST:\n * This callback will be invoked after all commands finished;\n * VOICE_DET_CB_ERROR:\n * This callback will be invoked while one command executed error;\n * VOICE_DET_CB_APP:\n * This callback will be invoked while VAD interrupt comes;\n *\n * func: callback subrotine\n * param: arguments of callback subrotine.\n * return: 0(success) !0(fail)\n */\nint app_voice_detector_setup_callback(enum voice_detector_id id,\n enum voice_detector_cb_id func_id,\n voice_detector_cb_t func,\n void *param);\n/*\n * Send events to voice detector.\n * This function maybe invoked in any thread.\n * return: 0(success) !0(fail)\n */\nint app_voice_detector_send_event(enum voice_detector_id id,\n enum voice_detector_evt evt);\n\n/*\n * Close a voice detector specified by a unique id.\n */\nvoid app_voice_detector_close(enum voice_detector_id id);\n\n/*\n * change a voice detector specified by a unique id to capture\n */\nvoid app_voice_detector_capture_start(enum voice_detector_id id);\n\n/*\n * get vad data info by a unique id.\n */\nvoid app_voice_detector_get_vad_data_info(enum voice_detector_id id, struct CODEC_VAD_BUF_INFO_T* vad_buf_info);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __APP_VOICE_DETECTOR_H__ */\n" }, { "path": "apps/voice_detector/vad_sensor.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __VAD_SENSOR_H__\n#define __VAD_SENSOR_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nint vad_sensor_open(void);\nint vad_sensor_engine_start(void);\nint vad_sensor_engine_stop(void);\nint vad_sensor_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "apps/voice_detector/voice_detector.c", "content": "#include \"analog.h\"\n#include \"audioflinger.h\"\n#include \"hal_aud.h\"\n#include \"hal_cmu.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n//#include \"app_audio.h\"\n#include \"app_utils.h\"\n#include \"audio_dump.h\"\n#include \"speech_ssat.h\"\n#include \"voice_detector.h\"\n#include \n\n#include \"pmu.h\"\n#ifdef __CYBERON\n#include \"CSpotterSDKApi.h\"\n#endif\n\n#ifdef I2C_VAD\n#include \"vad_sensor.h\"\n#endif\n\n/* This macro is used to show trace info for debugging */\n#define VD_DEBUG\n\n#ifdef VD_DEBUG\n#define VD_LOG TRACE\n#else\n#define VD_LOG(...) \\\n do { \\\n } while (0)\n#endif\n\n#ifdef VD_TEST\n#define VD_TRACE TRACE\n#else\n#define VD_TRACE(...) \\\n do { \\\n } while (0)\n#endif\n\n#define CMD_QUEUE_DATA_SIZE 15\n\nstruct command_queue {\n int idx;\n int out;\n int data[CMD_QUEUE_DATA_SIZE];\n};\n\nstruct voice_detector_dev {\n uint8_t init;\n uint8_t dfl;\n uint8_t run;\n enum voice_detector_state state;\n uint32_t wakeup_cnt;\n uint32_t arguments[VOICE_DET_CB_QTY];\n voice_detector_cb_t callback[VOICE_DET_CB_QTY];\n struct command_queue cmd_queue;\n struct AUD_VAD_CONFIG_T conf;\n struct AF_STREAM_CONFIG_T cap_conf;\n struct AF_STREAM_CONFIG_T ply_conf;\n struct CODEC_VAD_BUF_INFO_T vad_buf_info;\n uint32_t sys_clk;\n};\n\nstatic struct voice_detector_dev voice_det_devs[VOICE_DETECTOR_QTY];\nuint32_t vad_buf_len = 0;\n\nshort vad_buf[VAD_BUFFER_LEN] = {0};\n\n#ifdef __CYBERON\nstatic uint32_t POSSIBLY_UNUSED cyb_buf[20 * 1024];\nstatic uint32_t POSSIBLY_UNUSED cyb_buf_used = 0;\n\nextern unsigned char __g_cybase_start[];\nextern unsigned char __g_cygroup_start[];\n#define BASE_MODEL_DATA (__g_cybase_start)\n#define COMMAND_MODEL_DATA (__g_cygroup_start)\nHANDLE h_CSpotter = NULL;\n#endif\n\nstatic void voice_detector_vad_callback(int found);\nstatic void voice_detector_exec_callback(struct voice_detector_dev *pdev,\n enum voice_detector_cb_id id);\n\n#define to_voice_dev(id) (&voice_det_devs[(id)])\n\nstatic int cmd_queue_enqueue(struct command_queue *q, int c) {\n if (q->idx >= CMD_QUEUE_DATA_SIZE) {\n VD_LOG(2, \"%s, overflow cmd=%d\", __func__, c);\n return -2;\n }\n if (q->idx < 0) {\n q->idx = 0;\n }\n q->data[q->idx++] = c;\n // VD_LOG(2, \"%s, cmd=%d\", __func__, c);\n return 0;\n}\n\nstatic int cmd_queue_dequeue(struct command_queue *q) {\n int cmd;\n\n if (q->idx < 0) {\n // VD_LOG(1, \"%s, empty\", __func__);\n return -2;\n }\n if (q->out < 0) {\n q->out = 0;\n }\n cmd = q->data[q->out++];\n if (q->out >= q->idx) {\n q->out = -1;\n q->idx = -1;\n }\n // VD_LOG(2, \"%s, cmd=%d\", __func__, cmd);\n return cmd;\n}\n\nstatic int cmd_queue_is_empty(struct command_queue *q) {\n return (q->idx < 0) ? 1 : 0;\n}\n\nstatic void voice_detector_init_cmd_queue(struct command_queue *q) {\n if (q) {\n q->idx = -1;\n q->out = -1;\n }\n}\n\nstatic void voice_detector_init_vad(struct AUD_VAD_CONFIG_T *c, int id,\n enum AUD_VAD_TYPE_T vad_type) {\n if (c) {\n c->type = vad_type;\n#ifdef VAD_USE_8K_SAMPLE_RATE\n c->sample_rate = AUD_SAMPRATE_8000;\n#else\n c->sample_rate = AUD_SAMPRATE_16000;\n#endif\n c->bits = AUD_BITS_16;\n c->handler = voice_detector_vad_callback;\n c->udc = VAD_DEFAULT_UDC;\n c->upre = VAD_DEFAULT_UPRE;\n#ifdef I2C_VAD\n c->frame_len = VAD_DEFAULT_SENSOR_FRAME_LEN;\n#else\n c->frame_len = VAD_DEFAULT_MIC_FRAME_LEN;\n#endif\n c->mvad = VAD_DEFAULT_MVAD;\n c->dig_mode = VAD_DEFAULT_DIG_MODE;\n c->pre_gain = VAD_DEFAULT_PRE_GAIN;\n c->sth = VAD_DEFAULT_STH;\n c->dc_bypass = VAD_DEFAULT_DC_BYPASS;\n c->frame_th[0] = VAD_DEFAULT_FRAME_TH0;\n c->frame_th[1] = VAD_DEFAULT_FRAME_TH0;\n c->frame_th[2] = VAD_DEFAULT_FRAME_TH0;\n c->range[0] = VAD_DEFAULT_RANGE0;\n c->range[1] = VAD_DEFAULT_RANGE1;\n c->range[2] = VAD_DEFAULT_RANGE2;\n c->range[3] = VAD_DEFAULT_RANGE3;\n c->psd_th[0] = VAD_DEFAULT_PSD_TH0;\n c->psd_th[1] = VAD_DEFAULT_PSD_TH1;\n }\n}\n\nint voice_detector_open(enum voice_detector_id id,\n enum AUD_VAD_TYPE_T vad_type) {\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n VD_LOG(1, \"%s, invalid id=%d\", __func__, id);\n return -1;\n }\n\n pdev = to_voice_dev(id);\n if (pdev->init) {\n VD_LOG(1, \"%s, dev already open\", __func__);\n return -2;\n }\n if (pdev->run) {\n VD_LOG(1, \"%s, dev not stoped\", __func__);\n return -3;\n }\n\n memset(pdev, 0x0, sizeof(struct voice_detector_dev));\n memset(&pdev->cap_conf, 0x0, sizeof(struct AF_STREAM_CONFIG_T));\n memset(&pdev->ply_conf, 0x0, sizeof(struct AF_STREAM_CONFIG_T));\n voice_detector_init_cmd_queue(&pdev->cmd_queue);\n voice_detector_init_vad(&pdev->conf, id, vad_type);\n pdev->state = VOICE_DET_STATE_IDLE;\n pdev->run = 0;\n pdev->dfl = 1;\n pdev->init = 1;\n\n return 0;\n}\n\nvoid voice_detector_close(enum voice_detector_id id) {\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n VD_LOG(2, \"%s, invalid id=%d\", __func__, id);\n return;\n }\n\n pdev = to_voice_dev(id);\n if (pdev->init) {\n if (pdev->run) {\n cmd_queue_enqueue(&pdev->cmd_queue, VOICE_DET_CMD_EXIT);\n }\n pdev->init = 0;\n }\n}\n\nint voice_detector_setup_vad(enum voice_detector_id id,\n struct AUD_VAD_CONFIG_T *conf) {\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n VD_LOG(2, \"%s, invalid id=%d\", __func__, id);\n return -1;\n }\n\n pdev = to_voice_dev(id);\n if (!pdev->init) {\n VD_LOG(1, \"%s, dev not open\", __func__);\n return -2;\n }\n\n if (conf) {\n memcpy(&pdev->conf, conf, sizeof(*conf));\n pdev->conf.handler = voice_detector_vad_callback;\n pdev->dfl = 0;\n }\n return 0;\n}\n\nint voice_detector_setup_stream(enum voice_detector_id id,\n enum AUD_STREAM_T stream_id,\n struct AF_STREAM_CONFIG_T *stream) {\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n VD_LOG(2, \"%s, invalid id=%d\", __func__, id);\n return -1;\n }\n\n pdev = to_voice_dev(id);\n if (!pdev->init) {\n VD_LOG(1, \"%s, dev not open\", __func__);\n return -2;\n }\n\n if (stream_id == AUD_STREAM_CAPTURE)\n memcpy(&pdev->cap_conf, stream, sizeof(struct AF_STREAM_CONFIG_T));\n else\n memcpy(&pdev->ply_conf, stream, sizeof(struct AF_STREAM_CONFIG_T));\n\n return 0;\n}\n\nint voice_detector_setup_callback(enum voice_detector_id id,\n enum voice_detector_cb_id func_id,\n voice_detector_cb_t func, void *param) {\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n VD_LOG(2, \"%s, invalid id=%d\", __func__, id);\n return -1;\n }\n\n pdev = to_voice_dev(id);\n if (!pdev->init) {\n VD_LOG(1, \"%s, dev not open\", __func__);\n return -2;\n }\n\n if (func_id >= VOICE_DET_CB_QTY) {\n VD_LOG(2, \"%s, invalid func_id=%d\", __func__, func_id);\n return -3;\n }\n pdev->arguments[func_id] = (uint32_t)param;\n pdev->callback[func_id] = func;\n return 0;\n}\n\nint voice_detector_send_cmd(enum voice_detector_id id,\n enum voice_detector_cmd cmd) {\n int r;\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n VD_LOG(2, \"%s, invalid id=%d\", __func__, id);\n return -1;\n }\n pdev = to_voice_dev(id);\n\n r = cmd_queue_enqueue(&pdev->cmd_queue, (int)cmd);\n return r;\n}\n\nint voice_detector_send_cmd_array(enum voice_detector_id id, int *cmd_array,\n int num) {\n int r, i;\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n VD_LOG(2, \"%s, invalid id=%d\", __func__, id);\n return -1;\n }\n pdev = to_voice_dev(id);\n\n for (i = 0; i < num; i++) {\n r = cmd_queue_enqueue(&pdev->cmd_queue, cmd_array[i]);\n if (r)\n return r;\n }\n return 0;\n}\n\nenum voice_detector_state\nvoice_detector_query_status(enum voice_detector_id id) {\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n return VOICE_DET_STATE_IDLE;\n }\n pdev = to_voice_dev(id);\n\n VD_LOG(2, \"%s, state=%d\", __func__, pdev->state);\n return pdev->state;\n}\n\nstatic void voice_detector_vad_callback(int found) {\n struct voice_detector_dev *pdev;\n enum voice_detector_id id = VOICE_DETECTOR_ID_0;\n\n pdev = to_voice_dev(id);\n\n pdev->wakeup_cnt++;\n\n VD_LOG(3, \"%s, voice detector[%d], wakeup_cnt=%d\", __func__, id,\n pdev->wakeup_cnt);\n\n if (pdev->wakeup_cnt == 1) {\n /*\n * VOICE_DET_CB_APP should be called only once\n * after CPU is waked up from sleeping.\n * The VAD already can gernerates interrupts at this monment or later.\n */\n voice_detector_exec_callback(pdev, found ? VOICE_DET_FIND_APP\n : VOICE_DET_NOT_FIND_APP);\n }\n}\n\nstatic int voice_detector_vad_open(struct voice_detector_dev *pdev) {\n struct AUD_VAD_CONFIG_T *c = &pdev->conf;\n\n if (pdev->dfl) {\n VD_LOG(1, \"%s, use dfl vad\", __func__);\n }\n af_vad_open(c);\n#ifdef I2C_VAD\n vad_sensor_open();\n#endif\n return 0;\n}\n\nstatic int voice_detector_vad_start(struct voice_detector_dev *pdev) {\n /* wakeup_cnt is cleared while VAD starts */\n pdev->wakeup_cnt = 0;\n af_vad_start();\n#ifdef I2C_VAD\n vad_sensor_engine_start();\n#endif\n return 0;\n}\n\nstatic int voice_detector_vad_stop(struct voice_detector_dev *pdev) {\n af_vad_stop();\n\n#ifdef I2C_VAD\n vad_sensor_engine_stop();\n#else\n /* get vad buf info after stopping it */\n af_vad_get_data_info(&(pdev->vad_buf_info));\n TRACE(4,\n \"vad_buf base_addr:0x%x, buf_size:0x%x, data_count:%d, addr_count:%d\",\n pdev->vad_buf_info.base_addr, pdev->vad_buf_info.buf_size,\n pdev->vad_buf_info.data_count, pdev->vad_buf_info.addr_count);\n#if defined(CHIP_BEST2300)\n vad_buf_len = pdev->vad_buf_info.data_count / 2;\n#else\n vad_buf_len = pdev->vad_buf_info.data_count;\n#endif\n#endif\n return 0;\n}\n\nvoid voice_detector_get_vad_data_info(\n enum voice_detector_id id, struct CODEC_VAD_BUF_INFO_T *vad_buf_info) {\n\n struct voice_detector_dev *pdev;\n\n pdev = to_voice_dev(id);\n\n vad_buf_info->base_addr = pdev->vad_buf_info.base_addr;\n vad_buf_info->buf_size = pdev->vad_buf_info.buf_size;\n vad_buf_info->data_count = pdev->vad_buf_info.data_count;\n vad_buf_info->addr_count = pdev->vad_buf_info.addr_count;\n}\n\nstatic int voice_detector_vad_close(struct voice_detector_dev *pdev) {\n#ifdef I2C_VAD\n vad_sensor_close();\n#endif\n af_vad_close();\n return 0;\n}\n\nstatic int voice_detector_aud_cap_open(struct voice_detector_dev *pdev) {\n struct AF_STREAM_CONFIG_T *conf = &pdev->cap_conf;\n\n if ((!conf->handler) || (!conf->data_ptr)) {\n VD_LOG(1, \"%s, capture stream is null\", __func__);\n return -1;\n }\n af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, conf);\n return 0;\n}\n\nstatic int voice_detector_aud_cap_start(struct voice_detector_dev *pdev) {\n af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n return 0;\n}\n\nstatic int voice_detector_aud_cap_stop(struct voice_detector_dev *pdev) {\n af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n return 0;\n}\n\nstatic int voice_detector_aud_cap_close(struct voice_detector_dev *pdev) {\n af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n return 0;\n}\n\nstatic int voice_detector_sys_clk(struct voice_detector_dev *pdev) {\n#ifdef VD_TEST\n app_sysfreq_req(APP_SYSFREQ_USER_APP_0,\n (enum APP_SYSFREQ_FREQ_T)(pdev->sys_clk));\n#else\n app_sysfreq_req(APP_SYSFREQ_USER_AI_VOICE,\n (enum APP_SYSFREQ_FREQ_T)(pdev->sys_clk));\n#endif\n // VD_TRACE(2,\"%s, cpu freq=%d\", __func__,\n // hal_sys_timer_calc_cpu_freq(5,0));\n return 0;\n}\n\nstatic int voice_detector_exit(struct voice_detector_dev *pdev) {\n // TODO: exit process\n return 0;\n}\n\nstatic int voice_detector_idle(struct voice_detector_dev *pdev) {\n // TODO: idle process\n return 0;\n}\n\nstruct cmd_vector {\n const char *name;\n int cmd;\n int (*func)(struct voice_detector_dev *pdev);\n};\n\nstatic struct cmd_vector cmd_vectors[] = {\n {\"idle\", VOICE_DET_CMD_IDLE, voice_detector_idle},\n {\"exit\", VOICE_DET_CMD_EXIT, voice_detector_exit},\n {\"vad open\", VOICE_DET_CMD_VAD_OPEN, voice_detector_vad_open},\n {\"vad start\", VOICE_DET_CMD_VAD_START, voice_detector_vad_start},\n {\"vad stop\", VOICE_DET_CMD_VAD_STOP, voice_detector_vad_stop},\n {\"vad close\", VOICE_DET_CMD_VAD_CLOSE, voice_detector_vad_close},\n {\"cap start\", VOICE_DET_CMD_AUD_CAP_START, voice_detector_aud_cap_start},\n {\"cap stop\", VOICE_DET_CMD_AUD_CAP_STOP, voice_detector_aud_cap_stop},\n {\"cap open\", VOICE_DET_CMD_AUD_CAP_OPEN, voice_detector_aud_cap_open},\n {\"cap close\", VOICE_DET_CMD_AUD_CAP_CLOSE, voice_detector_aud_cap_close},\n {\"clk32k\", VOICE_DET_CMD_SYS_CLK_32K, voice_detector_sys_clk},\n {\"clk26m\", VOICE_DET_CMD_SYS_CLK_26M, voice_detector_sys_clk},\n {\"clk52m\", VOICE_DET_CMD_SYS_CLK_52M, voice_detector_sys_clk},\n {\"clk104m\", VOICE_DET_CMD_SYS_CLK_104M, voice_detector_sys_clk},\n};\n\nstatic int voice_detector_process_cmd(struct voice_detector_dev *pdev,\n int cmd) {\n int err;\n\n VD_LOG(3, \"%s, cmd[%d]: %s\", __func__, cmd, cmd_vectors[(int)cmd].name);\n\n switch (cmd) {\n case VOICE_DET_CMD_SYS_CLK_32K:\n pdev->sys_clk = APP_SYSFREQ_32K;\n break;\n case VOICE_DET_CMD_SYS_CLK_26M:\n pdev->sys_clk = APP_SYSFREQ_26M;\n break;\n case VOICE_DET_CMD_SYS_CLK_52M:\n pdev->sys_clk = APP_SYSFREQ_52M;\n break;\n case VOICE_DET_CMD_SYS_CLK_104M:\n pdev->sys_clk = APP_SYSFREQ_104M;\n break;\n default:\n break;\n }\n err = cmd_vectors[(int)cmd].func(pdev);\n return err;\n}\n\nstatic void voice_detector_set_status(struct voice_detector_dev *pdev,\n enum voice_detector_state s) {\n if ((s == VOICE_DET_STATE_SYS_CLK_104M) ||\n (s == VOICE_DET_STATE_SYS_CLK_52M) ||\n (s == VOICE_DET_STATE_SYS_CLK_26M) ||\n (s == VOICE_DET_STATE_SYS_CLK_32K)) {\n return;\n }\n pdev->state = s;\n VD_LOG(2, \"%s, state=%d\", __func__, pdev->state);\n}\n\nstatic void voice_detector_exec_callback(struct voice_detector_dev *pdev,\n enum voice_detector_cb_id id) {\n voice_detector_cb_t func;\n\n func = pdev->callback[id];\n if (func) {\n void *argv = (void *)(pdev->arguments[id]);\n\n func(pdev->state, argv);\n }\n}\n\nint voice_detector_enhance_perform(enum voice_detector_id id) {\n struct voice_detector_dev *pdev = to_voice_dev(id);\n\n pdev->sys_clk = APP_SYSFREQ_26M;\n\n return app_sysfreq_req(APP_SYSFREQ_USER_AI_VOICE,\n (enum APP_SYSFREQ_FREQ_T)(pdev->sys_clk));\n}\n\nint voice_detector_run(enum voice_detector_id id, int continous) {\n int exit = 0;\n int exit_code = 0;\n struct voice_detector_dev *pdev;\n\n if (id >= VOICE_DETECTOR_QTY) {\n return -1;\n }\n\n pdev = to_voice_dev(id);\n if (!pdev->init)\n return -2;\n\n voice_detector_exec_callback(pdev, VOICE_DET_CB_PREVIOUS);\n pdev->run = 1;\n while (1) {\n int err = 0;\n int cmd = cmd_queue_dequeue(&pdev->cmd_queue);\n\n if (cmd < 0) {\n // cmd is invalid, invoke waitting callback\n voice_detector_exec_callback(pdev, VOICE_DET_CB_RUN_WAIT);\n } else {\n // cmd is okay, process it\n err = voice_detector_process_cmd(pdev, cmd);\n if (!err) {\n voice_detector_set_status(pdev, (enum voice_detector_state)cmd);\n voice_detector_exec_callback(pdev, VOICE_DET_CB_RUN_DONE);\n } else {\n voice_detector_exec_callback(pdev, VOICE_DET_CB_ERROR);\n VD_LOG(3, \"%s, process cmd %d error, %d\", __func__, cmd, err);\n }\n }\n switch (continous) {\n case VOICE_DET_MODE_ONESHOT:\n // not continous, run only once\n exit_code = err;\n exit = 1;\n break;\n case VOICE_DET_MODE_EXEC_CMD:\n // continous run,exit until cmd queue is empty\n if (cmd_queue_is_empty(&pdev->cmd_queue)) {\n exit = 1;\n exit_code = err;\n // invoke waitting callback\n voice_detector_exec_callback(pdev, VOICE_DET_CB_RUN_WAIT);\n }\n break;\n case VOICE_DET_MODE_LOOP:\n // continous run forever, exit until receive VOICE_DET_CMD_EXIT\n if (cmd == VOICE_DET_CMD_EXIT) {\n exit = 1;\n exit_code = err;\n }\n break;\n default:\n break;\n }\n if (exit) {\n break;\n }\n }\n pdev->run = 0;\n voice_detector_exec_callback(pdev, VOICE_DET_CB_POST);\n\n return exit_code;\n}\n\n#ifdef VD_TEST\n\n#include \"app_voice_detector.h\"\n\n#define AUDIO_CAP_BUFF_SIZE (160 * 2 * 2 * 2)\n\nstatic uint32_t buff_capture[AUDIO_CAP_BUFF_SIZE / 4];\nstatic uint32_t voice_det_evt = 0;\nstatic uint8_t vad_data_buf[8 * 1024];\n\nstatic void voice_detector_send_evt(uint32_t evt) { voice_det_evt = evt; }\n\nstatic void print_vad_raw_data(uint8_t *buf, uint32_t len) {\n VD_TRACE(3, \"%s, buf=%x, len=%d\", __func__, (uint32_t)buf, len);\n // TODO: print data\n}\n\nstatic int State_M_1 = 0;\nvoid dc_filter_f(short *in, int len, float left_gain, float right_gain) {\n int tmp1;\n for (int i = 0; i < len; i += 1) {\n State_M_1 = (15 * State_M_1 + in[i]) >> 4;\n tmp1 = in[i];\n tmp1 -= State_M_1;\n in[i] = speech_ssat_int16(tmp1);\n }\n}\n\nstatic uint32_t mic_data_come(uint8_t *buf, uint32_t len) {\n static int come_cnt = 0;\n short *p16data = (short *)buf;\n uint32_t sample_len = len / 2;\n int retcode = 0;\n\n dc_filter_f(p16data, sample_len, 0.0, 0.0);\n\n audio_dump_clear_up();\n audio_dump_add_channel_data(0, p16data, sample_len);\n // audio_dump_add_channel_data(1, temp_buf, sample_len);\n audio_dump_run();\n\n#ifdef __CYBERON\n retcode = CSpotter_AddSample(h_CSpotter, p16data, sample_len);\n\n if (retcode == CSPOTTER_SUCCESS) {\n int id, score;\n\n id = CSpotter_GetResult(h_CSpotter);\n TRACE(1, \"##### CSpotterGetResult return ID : %d\\n\", id);\n\n score = CSpotter_GetResultScore(h_CSpotter);\n TRACE(1, \"CSpotter_GetResultScore return Score: %d\", score);\n\n CSpotter_Reset(h_CSpotter);\n }\n#endif\n\n if (come_cnt % 100 == 0) {\n TRACE(1, \"retcode: %d\", retcode);\n }\n come_cnt++;\n // if ((come_cnt % 200) == 0) {\n // VD_TRACE(3,\"%s, buf=%x, len=%d\", __func__, (uint32_t)buf, len);\n // }\n if ((come_cnt % 300) == 0) {\n come_cnt = 0;\n voice_detector_send_evt(VOICE_DET_EVT_VAD_START);\n VD_TRACE(1, \"%s, close audio stream ...\", __func__);\n }\n\n return 0;\n}\n\n#ifdef __CYBERON\nstatic int CSpotter_Init_bes() {\n#define TIMES (1000)\n int err;\n int state_size, mem_size;\n uint8_t *state_buffer, *mem_pool;\n uint8_t *p_combuf = (uint8_t *)cyb_buf;\n\n TRACE(1, \"%s\", __func__);\n\n state_size = CSpotter_GetStateSize((BYTE *)COMMAND_MODEL_DATA);\n TRACE(2, \"%s, state_size=%d\", __func__, state_size);\n\n state_buffer = p_combuf + cyb_buf_used;\n cyb_buf_used += state_size;\n if (!state_buffer) {\n TRACE(0, \"alloc state buff failed\");\n err = -1;\n goto fail;\n }\n\n mem_size = CSpotter_GetMemoryUsage_Sep((BYTE *)BASE_MODEL_DATA,\n (BYTE *)COMMAND_MODEL_DATA, TIMES);\n TRACE(1, \"mem_size=%d\", mem_size);\n\n mem_pool = p_combuf + cyb_buf_used;\n cyb_buf_used += mem_size;\n if (!mem_pool) {\n TRACE(0, \"alloc mem pool failed\");\n err = -2;\n goto fail;\n }\n\n h_CSpotter = CSpotter_Init_Sep((BYTE *)BASE_MODEL_DATA,\n (BYTE *)COMMAND_MODEL_DATA, TIMES, mem_pool,\n mem_size, state_buffer, state_size, &err);\n if (!h_CSpotter) {\n TRACE(1, \"CSpotter Init fail! err : %d\\n\", err);\n err = -3;\n goto fail;\n }\n\n return 0;\n\nfail:\n return err;\n}\n#endif\n\nstatic void cmd_wait_handler(int state, void *param) {\n voice_detector_send_evt(VOICE_DET_EVT_IDLE);\n\n VD_TRACE(2, \"%s, state=%d\", __func__, state);\n // hal_sys_timer_delay(MS_TO_TICKS(100));\n // while(1);\n\n // hal_sleep_enter_sleep();\n}\n\nstatic void cmd_done_handler(int state, void *param) {\n VD_TRACE(2, \"%s, state=%d\", __func__, state);\n}\n\nstatic void cpu_det_find_wakeup_handler(int state, void *param) {\n static uint32_t cpu_wakeup_cnt = 0;\n\n cpu_wakeup_cnt++;\n VD_TRACE(3, \"%s, state=%d, cnt=%d\", __func__, state, cpu_wakeup_cnt);\n // VD_TRACE(2,\"%s, calc sys freq=%d\", __func__,\n // hal_sys_timer_calc_cpu_freq(5,0));\n\n voice_detector_send_evt(VOICE_DET_EVT_AUD_CAP_START);\n}\n\nstatic void cpu_det_notfind_wakeup_handler(int state, void *param) {\n\n VD_TRACE(2, \"%s, state=%d\", __func__, state);\n // VD_TRACE(2,\"%s, calc sys freq=%d\", __func__,\n // hal_sys_timer_calc_cpu_freq(5,0));\n\n voice_detector_send_evt(VOICE_DET_EVT_VAD_START);\n}\n\nvoid voice_detector_test(void) {\n enum voice_detector_id id = VOICE_DETECTOR_ID_0;\n int r, run;\n struct AF_STREAM_CONFIG_T stream_cfg;\n enum HAL_SLEEP_STATUS_T sleep;\n uint32_t len;\n\n VD_TRACE(1, \"%s, start\", __func__);\n\n af_open();\n\n memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n stream_cfg.sample_rate = AUD_SAMPRATE_16000;\n stream_cfg.bits = AUD_BITS_16;\n stream_cfg.vol = 16;\n stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n stream_cfg.io_path = AUD_INPUT_PATH_VADMIC;\n stream_cfg.channel_num = AUD_CHANNEL_NUM_1;\n stream_cfg.handler = mic_data_come;\n stream_cfg.data_ptr = (uint8_t *)buff_capture;\n stream_cfg.data_size = AUDIO_CAP_BUFF_SIZE;\n\n audio_dump_init(AUDIO_CAP_BUFF_SIZE / 2 / 2, sizeof(short), 1);\n\n#ifdef __CYBERON\n CSpotter_Init_bes();\n#endif\n\n r = voice_detector_open(id);\n if (r) {\n VD_TRACE(2, \"%s, error %d\", __func__, r);\n return;\n }\n\n voice_detector_setup_stream(id, AUD_STREAM_CAPTURE, &stream_cfg);\n voice_detector_setup_callback(id, VOICE_DET_CB_RUN_WAIT, cmd_wait_handler,\n NULL);\n voice_detector_setup_callback(id, VOICE_DET_CB_RUN_DONE, cmd_done_handler,\n NULL);\n voice_detector_setup_callback(id, VOICE_DET_FIND_APP,\n cpu_det_find_wakeup_handler, NULL);\n voice_detector_setup_callback(id, VOICE_DET_NOT_FIND_APP,\n cpu_det_notfind_wakeup_handler, NULL);\n\n VD_TRACE(2, \"%s, calc sys freq=%d\", __func__,\n hal_sys_timer_calc_cpu_freq(5, 0));\n\n voice_detector_send_cmd(id, VOICE_DET_CMD_AUD_CAP_OPEN);\n voice_detector_send_cmd(id, VOICE_DET_CMD_AUD_CAP_CLOSE);\n voice_detector_send_evt(VOICE_DET_EVT_VAD_START);\n run = 0;\n\n while (1) {\n if (voice_det_evt != VOICE_DET_EVT_IDLE) {\n switch (voice_det_evt) {\n case VOICE_DET_EVT_VAD_START:\n if (voice_detector_query_status(id) == VOICE_DET_STATE_VAD_CLOSE) {\n voice_detector_send_cmd(id, VOICE_DET_CMD_AUD_CAP_STOP);\n voice_detector_send_cmd(id, VOICE_DET_CMD_AUD_CAP_CLOSE);\n }\n // TODO: save current system clock\n voice_detector_send_cmd(id, VOICE_DET_CMD_VAD_OPEN);\n voice_detector_send_cmd(id, VOICE_DET_CMD_VAD_START);\n voice_detector_send_cmd(id, VOICE_DET_CMD_SYS_CLK_32K);\n run = 1;\n break;\n case VOICE_DET_EVT_AUD_CAP_START:\n voice_detector_send_cmd(id, VOICE_DET_CMD_SYS_CLK_26M);\n voice_detector_send_cmd(id, VOICE_DET_CMD_AUD_CAP_OPEN);\n voice_detector_send_cmd(id, VOICE_DET_CMD_AUD_CAP_START);\n voice_detector_send_cmd(id, VOICE_DET_CMD_VAD_STOP);\n voice_detector_send_cmd(id, VOICE_DET_CMD_VAD_CLOSE);\n // voice_detector_send_cmd(id, VOICE_DET_CMD_AUD_CAP_OPEN);\n // voice_detector_send_cmd(id, VOICE_DET_CMD_AUD_CAP_START);\n run = 1;\n break;\n default:\n run = 0;\n break;\n }\n voice_det_evt = VOICE_DET_EVT_IDLE;\n }\n if (run) {\n run = 0;\n voice_detector_run(id, VOICE_DET_MODE_EXEC_CMD);\n }\n\n#ifndef RTOS\n extern void af_thread(void const *argument);\n af_thread(NULL);\n#endif\n\n // while(1);\n sleep = hal_sleep_enter_sleep();\n if (sleep == HAL_SLEEP_STATUS_DEEP) {\n VD_TRACE(0, \"wake up from deep sleep\");\n }\n\n len = voice_detector_recv_vad_data(VOICE_DETECTOR_ID_0, vad_data_buf,\n sizeof(vad_data_buf));\n if (len) {\n print_vad_raw_data(vad_data_buf, len);\n }\n }\n}\n#endif\n" }, { "path": "apps/voice_detector/voice_detector.h", "content": "#ifndef __VOICE_DETECTOR_H__\n#define __VOICE_DETECTOR_H__\n#include \"hal_aud.h\"\n#include \"audioflinger.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/* identify number of voice detector */\nenum voice_detector_id {\n VOICE_DETECTOR_ID_0,\n VOICE_DETECTOR_QTY,\n};\n\n#if defined(CHIP_BEST2300P)\n#define VAD_BUFFER_LEN 8192\n#else\n#define VAD_BUFFER_LEN 2048 \n#endif\n\n/* commands of voice detector */\nenum voice_detector_cmd {\n VOICE_DET_CMD_IDLE,\n VOICE_DET_CMD_EXIT,\n VOICE_DET_CMD_VAD_OPEN,\n VOICE_DET_CMD_VAD_START,\n VOICE_DET_CMD_VAD_STOP,\n VOICE_DET_CMD_VAD_CLOSE,\n VOICE_DET_CMD_AUD_CAP_START,\n VOICE_DET_CMD_AUD_CAP_STOP,\n VOICE_DET_CMD_AUD_CAP_OPEN,\n VOICE_DET_CMD_AUD_CAP_CLOSE,\n VOICE_DET_CMD_SYS_CLK_32K,\n VOICE_DET_CMD_SYS_CLK_26M,\n VOICE_DET_CMD_SYS_CLK_52M,\n VOICE_DET_CMD_SYS_CLK_104M,\n};\n\n/* state of voice detector */\nenum voice_detector_state {\n VOICE_DET_STATE_IDLE = VOICE_DET_CMD_IDLE,\n VOICE_DET_STATE_EXIT = VOICE_DET_CMD_EXIT,\n VOICE_DET_STATE_VAD_OPEN = VOICE_DET_CMD_VAD_OPEN,\n VOICE_DET_STATE_VAD_START = VOICE_DET_CMD_VAD_START,\n VOICE_DET_STATE_VAD_STOP = VOICE_DET_CMD_VAD_STOP,\n VOICE_DET_STATE_VAD_CLOSE = VOICE_DET_CMD_VAD_CLOSE,\n VOICE_DET_STATE_AUD_CAP_START = VOICE_DET_CMD_AUD_CAP_START,\n VOICE_DET_STATE_AUD_CAP_STOP = VOICE_DET_CMD_AUD_CAP_STOP,\n VOICE_DET_STATE_AUD_CAP_OPEN = VOICE_DET_CMD_AUD_CAP_OPEN,\n VOICE_DET_STATE_AUD_CAP_CLOSE = VOICE_DET_CMD_AUD_CAP_CLOSE,\n VOICE_DET_STATE_SYS_CLK_32K = VOICE_DET_CMD_SYS_CLK_32K,\n VOICE_DET_STATE_SYS_CLK_26M = VOICE_DET_CMD_SYS_CLK_26M,\n VOICE_DET_STATE_SYS_CLK_52M = VOICE_DET_CMD_SYS_CLK_52M,\n VOICE_DET_STATE_SYS_CLK_104M = VOICE_DET_CMD_SYS_CLK_104M,\n};\n\n/* running mode of voice detector */\nenum voice_detector_mode {\n VOICE_DET_MODE_ONESHOT,\n VOICE_DET_MODE_EXEC_CMD,\n VOICE_DET_MODE_LOOP,\n};\n\n/* callback type of voice detector */\nenum voice_detector_cb_id {\n VOICE_DET_CB_PREVIOUS,\n VOICE_DET_CB_RUN_WAIT,\n VOICE_DET_CB_RUN_DONE,\n VOICE_DET_CB_POST,\n VOICE_DET_CB_ERROR,\n VOICE_DET_CB_APP,\n VOICE_DET_FIND_APP,\n VOICE_DET_NOT_FIND_APP,\n VOICE_DET_CB_QTY,\n};\n\n/* callback function definition */\ntypedef void (*voice_detector_cb_t)(int current_state, void *arguments);\n\n/* VAD default parameters */\n#define VAD_DEFAULT_UDC 0x1//0xa\n#define VAD_DEFAULT_UPRE 0x4\n#define VAD_DEFAULT_SENSOR_FRAME_LEN 8 // 1.6K sample rate\n#define VAD_DEFAULT_MIC_FRAME_LEN 0x50 // 16K sample rate\n#define VAD_DEFAULT_MVAD 0x7\n#define VAD_DEFAULT_DIG_MODE 0x1\n#define VAD_DEFAULT_PRE_GAIN 0x4\n#define VAD_DEFAULT_STH 0x10\n#define VAD_DEFAULT_DC_BYPASS 0x0\n#define VAD_DEFAULT_FRAME_TH0 0x32\n#define VAD_DEFAULT_FRAME_TH1 0x1f4\n#define VAD_DEFAULT_FRAME_TH2 0x1388\n#define VAD_DEFAULT_RANGE0 0xf\n#define VAD_DEFAULT_RANGE1 0x32\n#define VAD_DEFAULT_RANGE2 0x96\n#define VAD_DEFAULT_RANGE3 0x12c\n#define VAD_DEFAULT_PSD_TH0 0x0\n#define VAD_DEFAULT_PSD_TH1 0x07ffffff\n\n/*\n * open voice detector specified by a unique id\n * must be callbed firstly\n * return: 0(success) !0(fail)\n */\nint voice_detector_open(enum voice_detector_id id, enum AUD_VAD_TYPE_T vad_type);\n\n/*\n * configure VAD by specified structure conf\n * Optional be called because of voice detector will initial vad by default parameter\n * return: 0(success) !0(fail)\n */\nint voice_detector_setup_vad(enum voice_detector_id id, struct AUD_VAD_CONFIG_T *conf);\n\n/*\n * setup capture(or playback) stream to voice detector. The capture stream will\n * be used to open or start audio device.\n * must be called before voice_detector_run();\n * return: 0(success) !0(fail)\n */\nint voice_detector_setup_stream(enum voice_detector_id id,\n enum AUD_STREAM_T stream_id, struct AF_STREAM_CONFIG_T *stream);\n\n/*\n * setup callback function to voice detector. This callback function will be called\n * when voice_detector_run() starts.\n * parameters:\n * func_id: callback type id\n * func: callback fuction\n * param: the arguments of callback function.\n * return: 0(success) !0(fail)\n */\n\nint voice_detector_setup_callback(enum voice_detector_id id,\n enum voice_detector_cb_id func_id, voice_detector_cb_t func, void *param);\n\n/*\n * query the status of voice detector. Before send any command to voice detector\n * by invoke voice_detector_send_cmd(), the status should be queried by this\n * function.\n * return: the state of voice detector\n */\nenum voice_detector_state voice_detector_query_status(enum voice_detector_id id);\n\n/*\n * receive data from voice detector's VAD buffer.\n * return: The number of bytes received from VAD private buffer\n */\nint voice_detector_recv_vad_data(enum voice_detector_id id,\n uint8_t *pbuf, uint32_t buf_size);\n/*\n * send commands to voice detector. These commands will be saved in a queue\n * before they are executed exactly.\n * return: 0(success) !0(fail)\n */\nint voice_detector_send_cmd(enum voice_detector_id id, enum voice_detector_cmd cmd);\n\n/*\n * send commands array to voice detector. These commands will be saved in a queue\n * before they are executed exactly.\n * return: 0(success) !0(fail)\n */\nint voice_detector_send_cmd_array(enum voice_detector_id id, int *cmd_array, int num);\n\nint voice_detector_enhance_perform(enum voice_detector_id id);\n\n/*\n * This function is a special subrotine which should be invoked by a thread\n * It will execute these commands stored in a queue.\n * parameters:\n * id: voice detector identify number\n * continous:\n * 2: This function will not return until the VOICE_DET_EXIT_CMD be sent\n * 1: This function will not return until the cmd queue is empty\n * 0: This function just execute only once.\n * return: 0(success) !0(error)\n */\nint voice_detector_run(enum voice_detector_id id, int continous);\n\n/*\n * close a voice detector specified by a unique id.\n */\nvoid voice_detector_close(enum voice_detector_id id);\n\n/*\n * get vad data info by a unique id.\n */\nvoid voice_detector_get_vad_data_info(enum voice_detector_id id, struct CODEC_VAD_BUF_INFO_T* vad_buf_info);\n\n#ifdef VD_TEST\nvoid voice_detector_test(void);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "backup.sh", "content": "#!/usr/bin/env bash\n\nBKPPATH=\"firmware-backups\"\n\nmkdir -p \"$BKPPATH\"\n\nNOW=$(date +%s)\n\nnum=$(find /dev -name 'ttyACM*' | sort | rev | cut -c 1)\necho com is: \"$num\"\nmapfile -t splitPorts <<< \"$num\"\necho \"This tool assumes your buds are the only thing connected and are enumerated {right,left} order. YMMV\"\necho \"Right bud is at ${splitPorts[0]}\"\necho \"Left bud is at ${splitPorts[1]}\"\n\necho \"Please disconnect and reconnect the bud on the right\"\nbestool read-image --port \"/dev/ttyACM${splitPorts[0]}\" \"${BKPPATH}/firmware-${NOW}-${splitPorts[0]}.bin.bkp\"\n\necho \"Please disconnect and reconnect the bud on the left\"\nbestool read-image --port \"/dev/ttyACM${splitPorts[1]}\" \"${BKPPATH}/firmware-${NOW}-${splitPorts[1]}.bin.bkp\"\n" }, { "path": "build.sh", "content": "#!/usr/bin/env sh\n\nif make -j \"$(nproc)\" T=open_source DEBUG=1 >log.txt 2>&1; then\n\techo \"build success\"\nelse\n\techo \"build failed and call log.txt\"\n\tgrep \"error:\" log.txt\nfi\n" }, { "path": "clear.sh", "content": "#!/usr/bin/env sh\n\nmake -j \"$(nproc)\" T=open_source DEBUG=1 clean\n" }, { "path": "config/Makefile", "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\n#obj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\n\nFILE_LIST := tgt_hardware.c\n\nifneq ($(SLAVE_BIN_FLASH_OFFSET),)\nFILE_LIST += slave_code.S\n$(obj)/$(DEFAULT_CFG_SRC)/slave_code.o : out/$(SLAVE_BIN_TARGET_NAME)/$(SLAVE_BIN_TARGET_NAME).bin\nAFLAGS_slave_code.o += -DSLAVE_BIN_NAME=$(SLAVE_BIN_TARGET_NAME).bin -Iout/$(SLAVE_BIN_TARGET_NAME)\nendif\n\nobj-y := $(patsubst $(cur_dir)%,%,$(foreach f,$(FILE_LIST), \\\n $(if $(wildcard $(cur_dir)$(T)/$(f)),$(cur_dir)$(T)/$(f),$(cur_dir)$(DEFAULT_CFG_SRC)/$(f))))\n\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += \\\n\t-Iplatform/hal \\\n\t-Iservices/nv_section/aud_section \\\n\t-Iservices/nv_section/include \\\n\t-Iservices/multimedia/speech/inc \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/audio/process/drc/include \\\n\t-Iservices/multimedia/audio/process/limiter/include\n\nifeq ($(BT_DEV_NAME),)\nBT_DEV_NAME := $(T).$(BUILD_HOSTNAME).$(BUILD_USERNAME)\nendif\n\nccflags-y += -DBT_DEV_NAME=$(BT_DEV_NAME) $(CUST_TGT_FLAGS)\n\nifneq ($(BT_DEV_ADDR),)\nccflags-y += -DBT_DEV_ADDR=$(BT_DEV_ADDR)\nendif\n\nifneq ($(BLE_DEV_ADDR),)\nccflags-y += -DBT_DEV_ADDR=$(BLE_DEV_ADDR)\nendif\n\nifneq ($(USB_AUDIO_SEND_CHAN),)\nccflags-y += -DUSB_AUDIO_SEND_CHAN=$(USB_AUDIO_SEND_CHAN)\nendif\n\nifeq ($(SPEECH_TX_AEC_CODEC_REF),1)\nccflags-y += -DSPEECH_TX_AEC_CODEC_REF\nendif\n\nifeq ($(ANC_NOISE_TRACKER),1)\nccflags-y += -DANC_NOISE_TRACKER\nendif\n" }, { "path": "config/_default_cfg_src_/app_status_ind.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_status_ind.h\"\n#include \"app_pwl.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n\nstatic APP_STATUS_INDICATION_T app_status = APP_STATUS_INDICATION_NUM;\nstatic APP_STATUS_INDICATION_T app_status_ind_filter =\n APP_STATUS_INDICATION_NUM;\n\nconst char *app_status_indication_str[] = {\n \"[POWERON]\",\n \"[INITIAL]\",\n \"[PAGESCAN]\",\n \"[POWEROFF]\",\n \"[CHARGENEED]\",\n \"[CHARGING]\",\n \"[FULLCHARGE]\",\n /* repeatable status: */\n \"[BOTHSCAN]\",\n \"[CONNECTING]\",\n \"[CONNECTED]\",\n \"[DISCONNECTED]\",\n \"[CALLNUMBER]\",\n \"[INCOMINGCALL]\",\n \"[PAIRSUCCEED]\",\n \"[PAIRFAIL]\",\n \"[HANGUPCALL]\",\n \"[REFUSECALL]\",\n \"[ANSWERCALL]\",\n \"[CLEARSUCCEED]\",\n \"[CLEARFAIL]\",\n \"[WARNING]\",\n \"[ALEXA_START]\",\n \"[ALEXA_STOP]\",\n \"[GSOUND_MIC_OPEN]\",\n \"[GSOUND_MIC_CLOSE]\",\n \"[GSOUND_NC]\",\n \"[INVALID]\",\n \"[MUTE]\",\n \"[TESTMODE]\",\n \"[TESTMODE1]\",\n \"[RING_WARNING]\",\n#ifdef __INTERACTION__\n \"[FINDME]\",\n#endif\n \"[MY_BUDS_FIND]\",\n \"[TILE_FIND]\",\n};\n\nconst char *status2str(uint16_t status) {\n const char *str = NULL;\n\n if (status >= 0 && status < APP_STATUS_INDICATION_NUM) {\n str = app_status_indication_str[status];\n } else {\n str = \"[UNKNOWN]\";\n }\n\n return str;\n}\n\nint app_status_indication_filter_set(APP_STATUS_INDICATION_T status) {\n app_status_ind_filter = status;\n return 0;\n}\n\nAPP_STATUS_INDICATION_T app_status_indication_get(void) { return app_status; }\n\nint app_status_indication_set(APP_STATUS_INDICATION_T status) {\n struct APP_PWL_CFG_T cfg0;\n struct APP_PWL_CFG_T cfg1;\n\n if (app_status == status)\n return 0;\n\n if (app_status_ind_filter == status)\n return 0;\n\n TRACE(2, \"%s %d\", __func__, status);\n\n app_status = status;\n memset(&cfg0, 0, sizeof(struct APP_PWL_CFG_T));\n memset(&cfg1, 0, sizeof(struct APP_PWL_CFG_T));\n app_pwl_stop(APP_PWL_ID_0);\n app_pwl_stop(APP_PWL_ID_1);\n switch (status) {\n case APP_STATUS_INDICATION_POWERON:\n cfg0.part[0].level = 1;\n cfg0.part[0].time = (3000);\n cfg0.part[1].level = 0;\n cfg0.part[1].time = (200);\n cfg0.parttotal = 2;\n cfg0.startlevel = 1;\n cfg0.periodic = false;\n\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n\n break;\n case APP_STATUS_INDICATION_INITIAL:\n break;\n case APP_STATUS_INDICATION_PAGESCAN:\n cfg0.part[0].level = 1;\n cfg0.part[0].time = (300);\n cfg0.part[1].level = 0;\n cfg0.part[1].time = (8000);\n cfg0.parttotal = 2;\n cfg0.startlevel = 1;\n cfg0.periodic = true;\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n break;\n case APP_STATUS_INDICATION_BOTHSCAN:\n cfg0.part[0].level = 0;\n cfg0.part[0].time = (300);\n cfg0.part[1].level = 1;\n cfg0.part[1].time = (300);\n cfg0.parttotal = 2;\n cfg0.startlevel = 0;\n cfg0.periodic = true;\n\n cfg1.part[0].level = 1;\n cfg1.part[0].time = (300);\n cfg1.part[1].level = 0;\n cfg1.part[1].time = (300);\n cfg1.parttotal = 2;\n cfg1.startlevel = 1;\n cfg1.periodic = true;\n\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n break;\n case APP_STATUS_INDICATION_CONNECTING:\n // LED's alternating Red/Blue\n cfg0.part[0].level = 1;\n cfg0.part[0].time = (300);\n cfg0.part[1].level = 0;\n cfg0.part[1].time = (300);\n cfg0.parttotal = 2;\n cfg0.startlevel = 0;\n cfg0.periodic = true;\n\n cfg1.part[0].level = 1;\n cfg1.part[0].time = (300);\n cfg1.part[1].level = 0;\n cfg1.part[1].time = (300);\n cfg1.parttotal = 2;\n cfg1.startlevel = 1;\n cfg1.periodic = true;\n\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n break;\n case APP_STATUS_INDICATION_CONNECTED:\n#ifdef DISABLE_CONNECTED_BLUE_LIGHT\n cfg0.part[0].level = 0;\n cfg0.part[0].time = (500);\n cfg0.parttotal = 1;\n cfg0.startlevel = 0;\n cfg0.periodic = false;\n\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n app_pwl_setup(APP_PWL_ID_1, &cfg0);\n app_pwl_start(APP_PWL_ID_1);\n#else\n cfg0.part[0].level = 1;\n cfg0.part[0].time = (500);\n cfg0.part[1].level = 0;\n cfg0.part[1].time = (3000);\n cfg0.parttotal = 2;\n cfg0.startlevel = 1;\n cfg0.periodic = true;\n\n cfg1.part[0].level = 0;\n cfg1.part[0].time = (500);\n cfg1.part[1].level = 0;\n cfg1.part[1].time = (3000);\n cfg1.parttotal = 2;\n cfg1.startlevel = 0;\n cfg1.periodic = true;\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n#endif\n break;\n case APP_STATUS_INDICATION_CHARGING:\n cfg1.part[0].level = 1;\n cfg1.part[0].time = (5000);\n cfg1.parttotal = 1;\n cfg1.startlevel = 1;\n cfg1.periodic = true;\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n break;\n case APP_STATUS_INDICATION_FULLCHARGE:\n cfg0.part[0].level = 0;\n cfg0.part[0].time = (5000);\n cfg0.parttotal = 1;\n cfg0.startlevel = 1;\n cfg0.periodic = false;\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n app_pwl_setup(APP_PWL_ID_1, &cfg0);\n app_pwl_start(APP_PWL_ID_1);\n break;\n case APP_STATUS_INDICATION_POWEROFF:\n cfg1.part[0].level = 0;\n cfg1.part[0].time = (100);\n cfg1.parttotal = 1;\n cfg1.startlevel = 1;\n cfg1.periodic = false;\n cfg0.part[0].level = 0;\n cfg0.part[0].time = (100);\n cfg0.parttotal = 1;\n cfg0.startlevel = 1;\n cfg0.periodic = false;\n\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n break;\n case APP_STATUS_INDICATION_CHARGENEED:\n cfg1.part[0].level = 1;\n cfg1.part[0].time = (500);\n cfg1.part[1].level = 0;\n cfg1.part[1].time = (2000);\n cfg1.parttotal = 2;\n cfg1.startlevel = 1;\n cfg1.periodic = true;\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n break;\n case APP_STATUS_INDICATION_TESTMODE:\n cfg0.part[0].level = 0;\n cfg0.part[0].time = (300);\n cfg0.part[1].level = 1;\n cfg0.part[1].time = (300);\n cfg0.parttotal = 2;\n cfg0.startlevel = 0;\n cfg0.periodic = true;\n\n cfg1.part[0].level = 0;\n cfg1.part[0].time = (300);\n cfg1.part[1].level = 1;\n cfg1.part[1].time = (300);\n cfg1.parttotal = 2;\n cfg1.startlevel = 1;\n cfg1.periodic = true;\n\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n break;\n case APP_STATUS_INDICATION_TESTMODE1:\n cfg0.part[0].level = 0;\n cfg0.part[0].time = (1000);\n cfg0.part[1].level = 1;\n cfg0.part[1].time = (1000);\n cfg0.parttotal = 2;\n cfg0.startlevel = 0;\n cfg0.periodic = true;\n\n cfg1.part[0].level = 0;\n cfg1.part[0].time = (1000);\n cfg1.part[1].level = 1;\n cfg1.part[1].time = (1000);\n cfg1.parttotal = 2;\n cfg1.startlevel = 1;\n cfg1.periodic = true;\n\n app_pwl_setup(APP_PWL_ID_0, &cfg0);\n app_pwl_start(APP_PWL_ID_0);\n app_pwl_setup(APP_PWL_ID_1, &cfg1);\n app_pwl_start(APP_PWL_ID_1);\n break;\n default:\n break;\n }\n return 0;\n}\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_ALEXA_START.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_ALEXA_STOP.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_ANSWER.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_CHARGE_FINISH.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_CHARGE_PLEASE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_CONNECTED.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_DIS_CONNECT.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_EIGHT.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_FINDME.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_FIVE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_FOUR.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_GSOUND_MIC_CLOSE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_GSOUND_MIC_OPEN.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_GSOUND_NC.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_HUNG_UP.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_INCOMING_CALL.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_LANGUAGE_SWITCH.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_MUTE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_NINE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_ONE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_OVER.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_PAIRING.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_PAIRING_FAIL.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_PAIRING_SUCCESS.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_PAIR_ENABLE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_POWER_OFF.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_POWER_ON.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_REFUSE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_SEVEN.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_SIX.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_THREE.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_TWO.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_WARNING.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/SOUND_ZERO.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/en_festival/dudu.opus.license", "content": "SPDX-FileCopyrightText: 2025 Moshe Nahmias \n\nSPDX-License-Identifier: Apache-2.0\n" }, { "path": "config/_default_cfg_src_/res/gs_hw/en_all.txt", "content": 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,\n5080 ,\n5080 ,\n4680 ,\n4680 ,\n3800 ,\n3800 ,\n2640 ,\n2640 ,\n1120 ,\n1120 ,\n-520 ,\n-520 ,\n-1960 ,\n-1960 ,\n-3360 ,\n-3360 ,\n-4320 ,\n-4320 ,\n-4960 ,\n-4960 ,\n-5080 ,\n-5080 ,\n-4760 ,\n-4760 ,\n-4040 ,\n-4040 ,\n-2840 ,\n-2840 ,\n-1480 ,\n-1480 ,\n120 ,\n120 ,\n1600 ,\n1600 ,\n3040 ,\n3040 ,\n4200 ,\n4200 ,\n4880 ,\n4880 ,\n5080 ,\n5080 ,\n4880 ,\n4880 ,\n4200 ,\n4200 ,\n3160 ,\n3160 ,\n1720 ,\n1720 ,\n240 ,\n240 ,\n-1360 ,\n-1360 ,\n-2720 ,\n-2720 ,\n-3960 ,\n-3960 ,\n-4760 ,\n-4760 ,\n-5080 ,\n-5080 ,\n-4960 ,\n-4960 ,\n-4290 ,\n-4290 ,\n-3276 ,\n-3276 ,\n-2028 ,\n-2028 ,\n-507 ,\n-507 ,\n975 ,\n975 ,\n2457 ,\n2457 ,\n3627 ,\n3627 ,\n4524 ,\n4524 ,\n4953 ,\n4953 ,\n4914 ,\n4914 ,\n4407 ,\n4407 ,\n3549 ,\n3549 ,\n2262 ,\n2262 ,\n858 ,\n858 ,\n-741 ,\n-741 ,\n-2145 ,\n-2145 ,\n-3432 ,\n-3432 ,\n-4329 ,\n-4329 ,\n-4914 ,\n-4914 ,\n-4953 ,\n-4953 ,\n-4563 ,\n-4563 ,\n-3705 ,\n-3705 ,\n-2574 ,\n-2574 ,\n-1092 ,\n-1092 ,\n351 ,\n351 ,\n1911 ,\n1911 ,\n3159 ,\n3159 ,\n4212 ,\n4212 ,\n4797 ,\n4797 ,\n4953 ,\n4953 ,\n4719 ,\n4719 ,\n3939 ,\n3939 ,\n2698 ,\n2698 ,\n1406 ,\n1406 ,\n-114 ,\n-114 ,\n-1520 ,\n-1520 ,\n-2888 ,\n-2888 ,\n-3914 ,\n-3914 ,\n-4636 ,\n-4636 ,\n-4826 ,\n-4826 ,\n-4636 ,\n-4636 ,\n-4028 ,\n-4028 ,\n-3002 ,\n-3002 ,\n-1634 ,\n-1634 ,\n-228 ,\n-228 ,\n1292 ,\n1292 ,\n2584 ,\n2584 ,\n3762 ,\n3762 ,\n4484 ,\n4484 ,\n4826 ,\n4826 ,\n4750 ,\n4750 ,\n4180 ,\n4180 ,\n3268 ,\n3268 ,\n1976 ,\n1976 ,\n608 ,\n608 ,\n-950 ,\n-950 ,\n-2394 ,\n-2394 ,\n-3534 ,\n-3534 ,\n-4408 ,\n-4408 ,\n-4826 ,\n-4826 ,\n-4788 ,\n-4788 ,\n-4332 ,\n-4332 ,\n-3458 ,\n-3458 ,\n-2280 ,\n-2280 ,\n-814 ,\n-814 ,\n592 ,\n592 ,\n2035 ,\n2035 ,\n3256 ,\n3256 ,\n4107 ,\n4107 ,\n4662 ,\n4662 ,\n4699 ,\n4699 ,\n4329 ,\n4329 ,\n3589 ,\n3589 ,\n2442 ,\n2442 ,\n1147 ,\n1147 ,\n-333 ,\n-333 ,\n-1702 ,\n-1702 ,\n-2997 ,\n-2997 ,\n-3996 ,\n-3996 ,\n-4551 ,\n-4551 ,\n-4699 ,\n-4699 ,\n-4477 ,\n-4477 ,\n-3737 ,\n-3737 ,\n-2738 ,\n-2738 ,\n-1369 ,\n-1369 ,\n0 ,\n0 ,\n1480 ,\n1480 ,\n2738 ,\n2738 ,\n3811 ,\n3811 ,\n4477 ,\n4477 ,\n4699 ,\n4699 ,\n4514 ,\n4514 ,\n3922 ,\n3922 ,\n2923 ,\n2923 ,\n1702 ,\n1702 ,\n222 ,\n222 ,\n-1085 ,\n-1085 ,\n-2380 ,\n-2380 ,\n-3395 ,\n-3395 ,\n-4130 ,\n-4130 ,\n-4445 ,\n-4445 ,\n-4375 ,\n-4375 ,\n-3850 ,\n-3850 ,\n-3010 ,\n-3010 ,\n-1820 ,\n-1820 ,\n-560 ,\n-560 ,\n875 ,\n875 ,\n2100 ,\n2100 ,\n3255 ,\n3255 ,\n3990 ,\n3990 ,\n4445 ,\n4445 ,\n4445 ,\n4445 ,\n3990 ,\n3990 ,\n3185 ,\n3185 ,\n2100 ,\n2100 ,\n770 ,\n770 ,\n-560 ,\n-560 ,\n-1925 ,\n-1925 ,\n-3010 ,\n-3010 ,\n-3885 ,\n-3885 ,\n-4375 ,\n-4375 ,\n-4445 ,\n-4445 ,\n-4130 ,\n-4130 ,\n-3395 ,\n-3395 ,\n-2380 ,\n-2380 ,\n-1085 ,\n-1085 ,\n315 ,\n315 ,\n1610 ,\n1610 ,\n2754 ,\n2754 ,\n3604 ,\n3604 ,\n4182 ,\n4182 ,\n4318 ,\n4318 ,\n4114 ,\n4114 ,\n3502 ,\n3502 ,\n2516 ,\n2516 ,\n1360 ,\n1360 ,\n0 ,\n0 ,\n-1360 ,\n-1360 ,\n-2516 ,\n-2516 ,\n-3502 ,\n-3502 ,\n-4114 ,\n-4114 ,\n-4318 ,\n-4318 ,\n-4182 ,\n-4182 ,\n-3604 ,\n-3604 ,\n-2754 ,\n-2754 ,\n-1564 ,\n-1564 ,\n-306 ,\n-306 ,\n1054 ,\n1054 ,\n2312 ,\n2312 ,\n3298 ,\n3298 ,\n4012 ,\n4012 ,\n4318 ,\n4318 ,\n4250 ,\n4250 ,\n3774 ,\n3774 ,\n2924 ,\n2924 ,\n1870 ,\n1870 ,\n544 ,\n544 ,\n-748 ,\n-748 ,\n-2040 ,\n-2040 ,\n-3162 ,\n-3162 ,\n-3762 ,\n-3762 ,\n-4191 ,\n-4191 ,\n-4191 ,\n-4191 ,\n-3762 ,\n-3762 ,\n-3069 ,\n-3069 ,\n-1980 ,\n-1980 ,\n-825 ,\n-825 ,\n528 ,\n528 ,\n1716 ,\n1716 ,\n2838 ,\n2838 ,\n3630 ,\n3630 ,\n4125 ,\n4125 ,\n4191 ,\n4191 ,\n3894 ,\n3894 ,\n3201 ,\n3201 ,\n2244 ,\n2244 ,\n1023 ,\n1023 ,\n-198 ,\n-198 ,\n-1518 ,\n-1518 ,\n-2607 ,\n-2607 ,\n-3498 ,\n-3498 ,\n-4026 ,\n-4026 ,\n-4191 ,\n-4191 ,\n-3993 ,\n-3993 ,\n-3399 ,\n-3399 ,\n-2442 ,\n-2442 ,\n-1320 ,\n-1320 ,\n0 ,\n0 ,\n1221 ,\n1221 ,\n2442 ,\n2442 ,\n3333 ,\n3333 ,\n3993 ,\n3993 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 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,\n7744 ,\n8128 ,\n8128 ,\n7872 ,\n7872 ,\n6912 ,\n6912 ,\n5184 ,\n5184 ,\n3136 ,\n3136 ,\n576 ,\n576 ,\n-1792 ,\n-1792 ,\n-4224 ,\n-4224 ,\n-6208 ,\n-6208 ,\n-7488 ,\n-7488 ,\n-8128 ,\n-8128 ,\n-8064 ,\n-8064 ,\n-7104 ,\n-7104 ,\n-5632 ,\n-5632 ,\n-3520 ,\n-3520 ,\n-1216 ,\n-1216 ,\n1408 ,\n1408 ,\n3712 ,\n3712 ,\n5824 ,\n5824 ,\n7296 ,\n7296 ,\n8064 ,\n8064 ,\n8128 ,\n8128 ,\n7424 ,\n7424 ,\n5952 ,\n5952 ,\n4032 ,\n4032 ,\n1600 ,\n1600 ,\n-832 ,\n-832 ,\n-3328 ,\n-3328 ,\n-5208 ,\n-5208 ,\n-6820 ,\n-6820 ,\n-7750 ,\n-7750 ,\n-7874 ,\n-7874 ,\n-7316 ,\n-7316 ,\n-6138 ,\n-6138 ,\n-4216 ,\n-4216 ,\n-2108 ,\n-2108 ,\n372 ,\n372 ,\n2666 ,\n2666 ,\n4898 ,\n4898 ,\n6510 ,\n6510 ,\n7564 ,\n7564 ,\n7874 ,\n7874 ,\n7564 ,\n7564 ,\n6386 ,\n6386 ,\n4712 ,\n4712 ,\n2480 ,\n2480 ,\n186 ,\n186 ,\n-2294 ,\n-2294 ,\n-4402 ,\n-4402 ,\n-6262 ,\n-6262 ,\n-7378 ,\n-7378 ,\n-7874 ,\n-7874 ,\n-7688 ,\n-7688 ,\n-6696 ,\n-6696 ,\n-5022 ,\n-5022 ,\n-3038 ,\n-3038 ,\n-558 ,\n-558 ,\n1736 ,\n1736 ,\n4092 ,\n4092 ,\n5890 ,\n5890 ,\n7137 ,\n7137 ,\n7747 ,\n7747 ,\n7686 ,\n7686 ,\n6893 ,\n6893 ,\n5368 ,\n5368 ,\n3355 ,\n3355 ,\n1159 ,\n1159 ,\n-1342 ,\n-1342 ,\n-3538 ,\n-3538 ,\n-5551 ,\n-5551 ,\n-6893 ,\n-6893 ,\n-7686 ,\n-7686 ,\n-7747 ,\n-7747 ,\n-7076 ,\n-7076 ,\n-5795 ,\n-5795 ,\n-3843 ,\n-3843 ,\n-1708 ,\n-1708 ,\n793 ,\n793 ,\n3172 ,\n3172 ,\n5124 ,\n5124 ,\n6710 ,\n6710 ,\n7564 ,\n7564 ,\n7747 ,\n7747 ,\n7259 ,\n7259 ,\n6039 ,\n6039 ,\n4331 ,\n4331 ,\n2074 ,\n2074 ,\n-183 ,\n-183 ,\n-2623 ,\n-2623 ,\n-4819 ,\n-4819 ,\n-6405 ,\n-6405 ,\n-7442 ,\n-7442 ,\n-7620 ,\n-7620 ,\n-7320 ,\n-7320 ,\n-6300 ,\n-6300 ,\n-4560 ,\n-4560 ,\n-2580 ,\n-2580 ,\n-180 ,\n-180 ,\n2040 ,\n2040 ,\n4260 ,\n4260 ,\n6060 ,\n6060 ,\n7140 ,\n7140 ,\n7620 ,\n7620 ,\n7440 ,\n7440 ,\n6480 ,\n6480 ,\n5040 ,\n5040 ,\n2940 ,\n2940 ,\n780 ,\n780 ,\n-1680 ,\n-1680 ,\n-3780 ,\n-3780 ,\n-5700 ,\n-5700 ,\n-6960 ,\n-6960 ,\n-7620 ,\n-7620 ,\n-7560 ,\n-7560 ,\n-6780 ,\n-6780 ,\n-5280 ,\n-5280 ,\n-3480 ,\n-3480 ,\n-1140 ,\n-1140 ,\n1140 ,\n1140 ,\n3480 ,\n3480 ,\n5280 ,\n5280 ,\n6780 ,\n6780 ,\n7560 ,\n7560 ,\n7620 ,\n7620 ,\n6728 ,\n6728 ,\n5510 ,\n5510 ,\n3654 ,\n3654 ,\n1624 ,\n1624 ,\n-754 ,\n-754 ,\n-2842 ,\n-2842 ,\n-4872 ,\n-4872 ,\n-6264 ,\n-6264 ,\n-7192 ,\n-7192 ,\n-7366 ,\n-7366 ,\n-6902 ,\n-6902 ,\n-5742 ,\n-5742 ,\n-4118 ,\n-4118 ,\n-1972 ,\n-1972 ,\n174 ,\n174 ,\n2494 ,\n2494 ,\n4408 ,\n4408 ,\n6090 ,\n6090 ,\n7076 ,\n7076 ,\n7366 ,\n7366 ,\n7076 ,\n7076 ,\n6090 ,\n6090 ,\n4582 ,\n4582 ,\n2494 ,\n2494 ,\n174 ,\n174 ,\n-1972 ,\n-1972 ,\n-4118 ,\n-4118 ,\n-5742 ,\n-5742 ,\n-6902 ,\n-6902 ,\n-7366 ,\n-7366 ,\n-7192 ,\n-7192 ,\n-6380 ,\n-6380 ,\n-4788 ,\n-4788 ,\n-2964 ,\n-2964 ,\n-741 ,\n-741 ,\n1596 ,\n1596 ,\n3591 ,\n3591 ,\n5415 ,\n5415 ,\n6612 ,\n6612 ,\n7239 ,\n7239 ,\n7182 ,\n7182 ,\n6441 ,\n6441 ,\n5187 ,\n5187 ,\n3306 ,\n3306 ,\n1254 ,\n1254 ,\n-1083 ,\n-1083 ,\n-3306 ,\n-3306 ,\n-5016 ,\n-5016 ,\n-6441 ,\n-6441 ,\n-7182 ,\n-7182 ,\n-7239 ,\n-7239 ,\n-6669 ,\n-6669 ,\n-5415 ,\n-5415 ,\n-3762 ,\n-3762 ,\n-1596 ,\n-1596 ,\n513 ,\n513 ,\n2793 ,\n2793 ,\n4617 ,\n4617 ,\n6156 ,\n6156 ,\n7068 ,\n7068 ,\n7239 ,\n7239 ,\n6783 ,\n6783 ,\n5757 ,\n5757 ,\n4047 ,\n4047 ,\n2072 ,\n2072 ,\n-168 ,\n-168 ,\n-2240 ,\n-2240 ,\n-4256 ,\n-4256 ,\n-5768 ,\n-5768 ,\n-6832 ,\n-6832 ,\n-7112 ,\n-7112 ,\n-6832 ,\n-6832 ,\n-5880 ,\n-5880 ,\n-4424 ,\n-4424 ,\n-2408 ,\n-2408 ,\n-336 ,\n-336 ,\n1904 ,\n1904 ,\n3808 ,\n3808 ,\n5544 ,\n5544 ,\n6608 ,\n6608 ,\n7112 ,\n7112 ,\n6944 ,\n6944 ,\n6160 ,\n6160 ,\n4704 ,\n4704 ,\n2912 ,\n2912 ,\n728 ,\n728 ,\n-1400 ,\n-1400 ,\n-3528 ,\n-3528 ,\n-5208 ,\n-5208 ,\n-6496 ,\n-6496 ,\n-7112 ,\n-7112 ,\n-7056 ,\n-7056 ,\n-6384 ,\n-6384 ,\n-5096 ,\n-5096 ,\n-3248 ,\n-3248 ,\n-1232 ,\n-1232 ,\n1045 ,\n1045 ,\n3025 ,\n3025 ,\n4840 ,\n4840 ,\n6105 ,\n6105 ,\n6930 ,\n6930 ,\n6985 ,\n6985 ,\n6435 ,\n6435 ,\n5335 ,\n5335 ,\n3630 ,\n3630 ,\n1540 ,\n1540 ,\n-495 ,\n-495 ,\n-2695 ,\n-2695 ,\n-4455 ,\n-4455 ,\n-5940 ,\n-5940 ,\n-6765 ,\n-6765 ,\n-6985 ,\n-6985 ,\n-6655 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,\n5040 ,\n2940 ,\n2940 ,\n780 ,\n780 ,\n-1680 ,\n-1680 ,\n-3780 ,\n-3780 ,\n-5700 ,\n-5700 ,\n-6960 ,\n-6960 ,\n-7620 ,\n-7620 ,\n-7560 ,\n-7560 ,\n-6780 ,\n-6780 ,\n-5280 ,\n-5280 ,\n-3480 ,\n-3480 ,\n-1140 ,\n-1140 ,\n1140 ,\n1140 ,\n3480 ,\n3480 ,\n5280 ,\n5280 ,\n6780 ,\n6780 ,\n7560 ,\n7560 ,\n7620 ,\n7620 ,\n6728 ,\n6728 ,\n5510 ,\n5510 ,\n3654 ,\n3654 ,\n1624 ,\n1624 ,\n-754 ,\n-754 ,\n-2842 ,\n-2842 ,\n-4872 ,\n-4872 ,\n-6264 ,\n-6264 ,\n-7192 ,\n-7192 ,\n-7366 ,\n-7366 ,\n-6902 ,\n-6902 ,\n-5742 ,\n-5742 ,\n-4118 ,\n-4118 ,\n-1972 ,\n-1972 ,\n174 ,\n174 ,\n2494 ,\n2494 ,\n4408 ,\n4408 ,\n6090 ,\n6090 ,\n7076 ,\n7076 ,\n7366 ,\n7366 ,\n7076 ,\n7076 ,\n6090 ,\n6090 ,\n4582 ,\n4582 ,\n2494 ,\n2494 ,\n174 ,\n174 ,\n-1972 ,\n-1972 ,\n-4118 ,\n-4118 ,\n-5742 ,\n-5742 ,\n-6902 ,\n-6902 ,\n-7366 ,\n-7366 ,\n-7192 ,\n-7192 ,\n-6380 ,\n-6380 ,\n-4788 ,\n-4788 ,\n-2964 ,\n-2964 ,\n-741 ,\n-741 ,\n1596 ,\n1596 ,\n3591 ,\n3591 ,\n5415 ,\n5415 ,\n6612 ,\n6612 ,\n7239 ,\n7239 ,\n7182 ,\n7182 ,\n6441 ,\n6441 ,\n5187 ,\n5187 ,\n3306 ,\n3306 ,\n1254 ,\n1254 ,\n-1083 ,\n-1083 ,\n-3306 ,\n-3306 ,\n-5016 ,\n-5016 ,\n-6441 ,\n-6441 ,\n-7182 ,\n-7182 ,\n-7239 ,\n-7239 ,\n-6669 ,\n-6669 ,\n-5415 ,\n-5415 ,\n-3762 ,\n-3762 ,\n-1596 ,\n-1596 ,\n513 ,\n513 ,\n2793 ,\n2793 ,\n4617 ,\n4617 ,\n6156 ,\n6156 ,\n7068 ,\n7068 ,\n7239 ,\n7239 ,\n6783 ,\n6783 ,\n5757 ,\n5757 ,\n4047 ,\n4047 ,\n2072 ,\n2072 ,\n-168 ,\n-168 ,\n-2240 ,\n-2240 ,\n-4256 ,\n-4256 ,\n-5768 ,\n-5768 ,\n-6832 ,\n-6832 ,\n-7112 ,\n-7112 ,\n-6832 ,\n-6832 ,\n-5880 ,\n-5880 ,\n-4424 ,\n-4424 ,\n-2408 ,\n-2408 ,\n-336 ,\n-336 ,\n1904 ,\n1904 ,\n3808 ,\n3808 ,\n5544 ,\n5544 ,\n6608 ,\n6608 ,\n7112 ,\n7112 ,\n6944 ,\n6944 ,\n6160 ,\n6160 ,\n4704 ,\n4704 ,\n2912 ,\n2912 ,\n728 ,\n728 ,\n-1400 ,\n-1400 ,\n-3528 ,\n-3528 ,\n-5208 ,\n-5208 ,\n-6496 ,\n-6496 ,\n-7112 ,\n-7112 ,\n-7056 ,\n-7056 ,\n-6384 ,\n-6384 ,\n-5096 ,\n-5096 ,\n-3248 ,\n-3248 ,\n-1232 ,\n-1232 ,\n1045 ,\n1045 ,\n3025 ,\n3025 ,\n4840 ,\n4840 ,\n6105 ,\n6105 ,\n6930 ,\n6930 ,\n6985 ,\n6985 ,\n6435 ,\n6435 ,\n5335 ,\n5335 ,\n3630 ,\n3630 ,\n1540 ,\n1540 ,\n-495 ,\n-495 ,\n-2695 ,\n-2695 ,\n-4455 ,\n-4455 ,\n-5940 ,\n-5940 ,\n-6765 ,\n-6765 ,\n-6985 ,\n-6985 ,\n-6655 ,\n-6655 ,\n-5555 ,\n-5555 ,\n-4070 ,\n-4070 ,\n-2035 ,\n-2035 ,\n165 ,\n165 ,\n2200 ,\n2200 ,\n4180 ,\n4180 ,\n5665 ,\n5665 ,\n6710 ,\n6710 ,\n6985 ,\n6985 ,\n6710 ,\n6710 ,\n5830 ,\n5830 ,\n4345 ,\n4345 ,\n2530 ,\n2530 ,\n330 ,\n330 ,\n-1870 ,\n-1870 ,\n-3604 ,\n-3604 ,\n-5247 ,\n-5247 ,\n-6254 ,\n-6254 ,\n-6731 ,\n-6731 ,\n-6625 ,\n-6625 ,\n-5830 ,\n-5830 ,\n-4558 ,\n-4558 ,\n-2756 ,\n-2756 ,\n-848 ,\n-848 ,\n1325 ,\n1325 ,\n3180 ,\n3180 ,\n4929 ,\n4929 ,\n6148 ,\n6148 ,\n6731 ,\n6731 ,\n6678 ,\n6678 ,\n6042 ,\n6042 ,\n4823 ,\n4823 ,\n3180 ,\n3180 ,\n1166 ,\n1166 ,\n-848 ,\n-848 ,\n-2915 ,\n-2915 ,\n-4558 ,\n-4558 ,\n-5883 ,\n-5883 ,\n-6678 ,\n-6678 ,\n-6731 ,\n-6731 ,\n-6201 ,\n-6201 ,\n-5141 ,\n-5141 ,\n-3498 ,\n-3498 ,\n-1643 ,\n-1643 ,\n477 ,\n477 ,\n2438 ,\n2438 ,\n4293 ,\n4293 ,\n5512 ,\n5512 ,\n6396 ,\n6396 ,\n6604 ,\n6604 ,\n6292 ,\n6292 ,\n5252 ,\n5252 ,\n3848 ,\n3848 ,\n1924 ,\n1924 ,\n0 ,\n0 ,\n-2080 ,\n-2080 ,\n-3848 ,\n-3848 ,\n-5356 ,\n-5356 ,\n-6292 ,\n-6292 ,\n-6604 ,\n-6604 ,\n-6396 ,\n-6396 ,\n-5512 ,\n-5512 ,\n-4108 ,\n-4108 ,\n-2392 ,\n-2392 ,\n-312 ,\n-312 ,\n1612 ,\n1612 ,\n3536 ,\n3536 ,\n5044 ,\n5044 ,\n6136 ,\n6136 ,\n6604 ,\n6604 ,\n6500 ,\n6500 ,\n5772 ,\n5772 ,\n4472 ,\n4472 ,\n2704 ,\n2704 ,\n832 ,\n832 ,\n-1300 ,\n-1300 ,\n-3120 ,\n-3120 ,\n-4836 ,\n-4836 ,\n-5928 ,\n-5928 ,\n-6477 ,\n-6477 ,\n-6477 ,\n-6477 ,\n-5814 ,\n-5814 ,\n-4743 ,\n-4743 ,\n-3060 ,\n-3060 ,\n-1122 ,\n-1122 ,\n816 ,\n816 ,\n2805 ,\n2805 ,\n4386 ,\n4386 ,\n5661 ,\n5661 ,\n6375 ,\n6375 ,\n6477 ,\n6477 ,\n6018 ,\n6018 ,\n4947 ,\n4947 ,\n3468 ,\n3468 ,\n1581 ,\n1581 ,\n-306 ,\n-306 ,\n-2346 ,\n-2346 ,\n-4131 ,\n-4131 ,\n-5406 ,\n-5406 ,\n-6273 ,\n-6273 ,\n-6477 ,\n-6477 ,\n-6171 ,\n-6171 ,\n-5253 ,\n-5253 ,\n-3774 ,\n-3774 ,\n-2040 ,\n-2040 ,\n0 ,\n0 ,\n1887 ,\n1887 ,\n3774 ,\n3774 ,\n5253 ,\n5253 ,\n6171 ,\n6171 ,\n6477 ,\n6477 ,\n6027 ,\n6027 ,\n5194 ,\n5194 ,\n3969 ,\n3969 ,\n2254 ,\n2254 ,\n441 ,\n441 ,\n-1519 ,\n-1519 ,\n-3234 ,\n-3234 ,\n-4753 ,\n-4753 ,\n-5782 ,\n-5782 ,\n-6223 ,\n-6223 ,\n-6125 ,\n-6125 ,\n-5439 ,\n-5439 ,\n-4214 ,\n-4214 ,\n-2695 ,\n-2695 ,\n-784 ,\n-784 ,\n1078 ,\n1078 ,\n2940 ,\n2940 ,\n4459 ,\n4459 ,\n5586 ,\n5586 ,\n6174 ,\n6174 ,\n6223 ,\n6223 ,\n5586 ,\n5586 ,\n4557 ,\n4557 ,\n2940 ,\n2940 ,\n1225 ,\n1225 ,\n-784 ,\n-784 ,\n-2548 ,\n-2548 ,\n-4214 ,\n-4214 ,\n-5390 ,\n-5390 ,\n-6125 ,\n-6125 ,\n-6223 ,\n-6223 ,\n-5782 ,\n-5782 ,\n-4656 ,\n-4656 ,\n-3264 ,\n-3264 ,\n-1488 ,\n-1488 ,\n288 ,\n288 ,\n2208 ,\n2208 ,\n3792 ,\n3792 ,\n5088 ,\n5088 ,\n5856 ,\n5856 ,\n6096 ,\n6096 ,\n5856 ,\n5856 ,\n4944 ,\n4944 ,\n3552 ,\n3552 ,\n1920 ,\n1920 ,\n0 ,\n0 ,\n-1776 ,\n-1776 ,\n-3552 ,\n-3552 ,\n-4848 ,\n-4848 ,\n-5808 ,\n-5808 ,\n-6096 ,\n-6096 ,\n-5904 ,\n-5904 ,\n-5184 ,\n-5184 ,\n-3888 ,\n-3888 ,\n-2352 ,\n-2352 ,\n-432 ,\n-432 ,\n1488 ,\n1488 ,\n3168 ,\n3168 ,\n4656 ,\n4656 ,\n5616 ,\n5616 ,\n6096 ,\n6096 ,\n6048 ,\n6048 ,\n5328 ,\n5328 ,\n4224 ,\n4224 ,\n2585 ,\n2585 ,\n893 ,\n893 ,\n-1034 ,\n-1034 ,\n-2820 ,\n-2820 ,\n-4277 ,\n-4277 ,\n-5358 ,\n-5358 ,\n-5922 ,\n-5922 ,\n-5969 ,\n-5969 ,\n-5452 ,\n-5452 ,\n-4371 ,\n-4371 ,\n-2961 ,\n-2961 ,\n-1175 ,\n-1175 ,\n611 ,\n611 ,\n2444 ,\n2444 ,\n4042 ,\n4042 ,\n5170 ,\n5170 ,\n5875 ,\n5875 ,\n5969 ,\n5969 ,\n5546 ,\n5546 ,\n4653 ,\n4653 ,\n3196 ,\n3196 ,\n1598 ,\n1598 ,\n-282 ,\n-282 ,\n-2021 ,\n-2021 ,\n-3713 ,\n-3713 ,\n-4935 ,\n-4935 ,\n-5734 ,\n-5734 ,\n-5969 ,\n-5969 ,\n-5734 ,\n-5734 ,\n-4841 ,\n-4841 ,\n-3572 ,\n-3572 ,\n-1880 ,\n-1880 ,\n-138 ,\n-138 ,\n1702 ,\n1702 ,\n3266 ,\n3266 ,\n4646 ,\n4646 ,\n5474 ,\n5474 ,\n5842 ,\n5842 ,\n5658 ,\n5658 ,\n4968 ,\n4968 ,\n3726 ,\n3726 ,\n2254 ,\n2254 ,\n414 ,\n414 ,\n-1288 ,\n-1288 ,\n-3036 ,\n-3036 ,\n-4370 ,\n-4370 ,\n-5382 ,\n-5382 ,\n-5842 ,\n-5842 ,\n-5796 ,\n-5796 ,\n-5106 ,\n-5106 ,\n-4048 ,\n-4048 ,\n-2530 ,\n-2530 ,\n-874 ,\n-874 ,\n1012 ,\n1012 ,\n2668 ,\n2668 ,\n4186 ,\n4186 ,\n5198 ,\n5198 ,\n5796 ,\n5796 ,\n5842 ,\n5842 ,\n5336 ,\n5336 ,\n4370 ,\n4370 ,\n2898 ,\n2898 ,\n1150 ,\n1150 ,\n-598 ,\n-598 ,\n-2288 ,\n-2288 ,\n-3696 ,\n-3696 ,\n-4840 ,\n-4840 ,\n-5456 ,\n-5456 ,\n-5588 ,\n-5588 ,\n-5236 ,\n-5236 ,\n-4356 ,\n-4356 ,\n-3124 ,\n-3124 ,\n-1496 ,\n-1496 ,\n264 ,\n264 ,\n1892 ,\n1892 ,\n3476 ,\n3476 ,\n4620 ,\n4620 ,\n5368 ,\n5368 ,\n5588 ,\n5588 ,\n5368 ,\n5368 ,\n4620 ,\n4620 ,\n3344 ,\n3344 ,\n1892 ,\n1892 ,\n132 ,\n132 ,\n-1628 ,\n-1628 ,\n-3124 ,\n-3124 ,\n-4444 ,\n-4444 ,\n-5236 ,\n-5236 ,\n-5588 ,\n-5588 ,\n-5456 ,\n-5456 ,\n-4752 ,\n-4752 ,\n-3696 ,\n-3696 ,\n-2156 ,\n-2156 ,\n-572 ,\n-572 ,\n1232 ,\n1232 ,\n2904 ,\n2904 ,\n4085 ,\n4085 ,\n5031 ,\n5031 ,\n5461 ,\n5461 ,\n5418 ,\n5418 ,\n4859 ,\n4859 ,\n3784 ,\n3784 ,\n2494 ,\n2494 ,\n817 ,\n817 ,\n-817 ,\n-817 ,\n-2494 ,\n-2494 ,\n-3784 ,\n-3784 ,\n-4859 ,\n-4859 ,\n-5418 ,\n-5418 ,\n-5461 ,\n-5461 ,\n-4988 ,\n-4988 ,\n-4085 ,\n-4085 ,\n-2709 ,\n-2709 ,\n-1204 ,\n-1204 ,\n559 ,\n559 ,\n2107 ,\n2107 ,\n3612 ,\n3612 ,\n4644 ,\n4644 ,\n5332 ,\n5332 ,\n5461 ,\n5461 ,\n5117 ,\n5117 ,\n4257 ,\n4257 ,\n3053 ,\n3053 ,\n1462 ,\n1462 ,\n-129 ,\n-129 ,\n-1849 ,\n-1849 ,\n-3268 ,\n-3268 ,\n-4515 ,\n-4515 ,\n-5124 ,\n-5124 ,\n-5334 ,\n-5334 ,\n-5124 ,\n-5124 ,\n-4410 ,\n-4410 ,\n-3192 ,\n-3192 ,\n-1806 ,\n-1806 ,\n-126 ,\n-126 ,\n1428 ,\n1428 ,\n2982 ,\n2982 ,\n4158 ,\n4158 ,\n4998 ,\n4998 ,\n5334 ,\n5334 ,\n5208 ,\n5208 ,\n4620 ,\n4620 ,\n3528 ,\n3528 ,\n2058 ,\n2058 ,\n546 ,\n546 ,\n-1176 ,\n-1176 ,\n-2646 ,\n-2646 ,\n-3990 ,\n-3990 ,\n-4872 ,\n-4872 ,\n-5334 ,\n-5334 ,\n-5292 ,\n-5292 ,\n-4746 ,\n-4746 ,\n-3822 ,\n-3822 ,\n-2436 ,\n-2436 ,\n-798 ,\n-798 ,\n798 ,\n798 ,\n2436 ,\n2436 ,\n3696 ,\n3696 ,\n4746 ,\n4746 ,\n5292 ,\n5292 ,\n5080 ,\n5080 ,\n4680 ,\n4680 ,\n3800 ,\n3800 ,\n2640 ,\n2640 ,\n1120 ,\n1120 ,\n-520 ,\n-520 ,\n-1960 ,\n-1960 ,\n-3360 ,\n-3360 ,\n-4320 ,\n-4320 ,\n-4960 ,\n-4960 ,\n-5080 ,\n-5080 ,\n-4760 ,\n-4760 ,\n-4040 ,\n-4040 ,\n-2840 ,\n-2840 ,\n-1480 ,\n-1480 ,\n120 ,\n120 ,\n1600 ,\n1600 ,\n3040 ,\n3040 ,\n4200 ,\n4200 ,\n4880 ,\n4880 ,\n5080 ,\n5080 ,\n4880 ,\n4880 ,\n4200 ,\n4200 ,\n3160 ,\n3160 ,\n1720 ,\n1720 ,\n240 ,\n240 ,\n-1360 ,\n-1360 ,\n-2720 ,\n-2720 ,\n-3960 ,\n-3960 ,\n-4760 ,\n-4760 ,\n-5080 ,\n-5080 ,\n-4960 ,\n-4960 ,\n-4290 ,\n-4290 ,\n-3276 ,\n-3276 ,\n-2028 ,\n-2028 ,\n-507 ,\n-507 ,\n975 ,\n975 ,\n2457 ,\n2457 ,\n3627 ,\n3627 ,\n4524 ,\n4524 ,\n4953 ,\n4953 ,\n4914 ,\n4914 ,\n4407 ,\n4407 ,\n3549 ,\n3549 ,\n2262 ,\n2262 ,\n858 ,\n858 ,\n-741 ,\n-741 ,\n-2145 ,\n-2145 ,\n-3432 ,\n-3432 ,\n-4329 ,\n-4329 ,\n-4914 ,\n-4914 ,\n-4953 ,\n-4953 ,\n-4563 ,\n-4563 ,\n-3705 ,\n-3705 ,\n-2574 ,\n-2574 ,\n-1092 ,\n-1092 ,\n351 ,\n351 ,\n1911 ,\n1911 ,\n3159 ,\n3159 ,\n4212 ,\n4212 ,\n4797 ,\n4797 ,\n4953 ,\n4953 ,\n4719 ,\n4719 ,\n3939 ,\n3939 ,\n2698 ,\n2698 ,\n1406 ,\n1406 ,\n-114 ,\n-114 ,\n-1520 ,\n-1520 ,\n-2888 ,\n-2888 ,\n-3914 ,\n-3914 ,\n-4636 ,\n-4636 ,\n-4826 ,\n-4826 ,\n-4636 ,\n-4636 ,\n-4028 ,\n-4028 ,\n-3002 ,\n-3002 ,\n-1634 ,\n-1634 ,\n-228 ,\n-228 ,\n1292 ,\n1292 ,\n2584 ,\n2584 ,\n3762 ,\n3762 ,\n4484 ,\n4484 ,\n4826 ,\n4826 ,\n4750 ,\n4750 ,\n4180 ,\n4180 ,\n3268 ,\n3268 ,\n1976 ,\n1976 ,\n608 ,\n608 ,\n-950 ,\n-950 ,\n-2394 ,\n-2394 ,\n-3534 ,\n-3534 ,\n-4408 ,\n-4408 ,\n-4826 ,\n-4826 ,\n-4788 ,\n-4788 ,\n-4332 ,\n-4332 ,\n-3458 ,\n-3458 ,\n-2280 ,\n-2280 ,\n-814 ,\n-814 ,\n592 ,\n592 ,\n2035 ,\n2035 ,\n3256 ,\n3256 ,\n4107 ,\n4107 ,\n4662 ,\n4662 ,\n4699 ,\n4699 ,\n4329 ,\n4329 ,\n3589 ,\n3589 ,\n2442 ,\n2442 ,\n1147 ,\n1147 ,\n-333 ,\n-333 ,\n-1702 ,\n-1702 ,\n-2997 ,\n-2997 ,\n-3996 ,\n-3996 ,\n-4551 ,\n-4551 ,\n-4699 ,\n-4699 ,\n-4477 ,\n-4477 ,\n-3737 ,\n-3737 ,\n-2738 ,\n-2738 ,\n-1369 ,\n-1369 ,\n0 ,\n0 ,\n1480 ,\n1480 ,\n2738 ,\n2738 ,\n3811 ,\n3811 ,\n4477 ,\n4477 ,\n4699 ,\n4699 ,\n4514 ,\n4514 ,\n3922 ,\n3922 ,\n2923 ,\n2923 ,\n1702 ,\n1702 ,\n222 ,\n222 ,\n-1085 ,\n-1085 ,\n-2380 ,\n-2380 ,\n-3395 ,\n-3395 ,\n-4130 ,\n-4130 ,\n-4445 ,\n-4445 ,\n-4375 ,\n-4375 ,\n-3850 ,\n-3850 ,\n-3010 ,\n-3010 ,\n-1820 ,\n-1820 ,\n-560 ,\n-560 ,\n875 ,\n875 ,\n2100 ,\n2100 ,\n3255 ,\n3255 ,\n3990 ,\n3990 ,\n4445 ,\n4445 ,\n4445 ,\n4445 ,\n3990 ,\n3990 ,\n3185 ,\n3185 ,\n2100 ,\n2100 ,\n770 ,\n770 ,\n-560 ,\n-560 ,\n-1925 ,\n-1925 ,\n-3010 ,\n-3010 ,\n-3885 ,\n-3885 ,\n-4375 ,\n-4375 ,\n-4445 ,\n-4445 ,\n-4130 ,\n-4130 ,\n-3395 ,\n-3395 ,\n-2380 ,\n-2380 ,\n-1085 ,\n-1085 ,\n315 ,\n315 ,\n1610 ,\n1610 ,\n2754 ,\n2754 ,\n3604 ,\n3604 ,\n4182 ,\n4182 ,\n4318 ,\n4318 ,\n4114 ,\n4114 ,\n3502 ,\n3502 ,\n2516 ,\n2516 ,\n1360 ,\n1360 ,\n0 ,\n0 ,\n-1360 ,\n-1360 ,\n-2516 ,\n-2516 ,\n-3502 ,\n-3502 ,\n-4114 ,\n-4114 ,\n-4318 ,\n-4318 ,\n-4182 ,\n-4182 ,\n-3604 ,\n-3604 ,\n-2754 ,\n-2754 ,\n-1564 ,\n-1564 ,\n-306 ,\n-306 ,\n1054 ,\n1054 ,\n2312 ,\n2312 ,\n3298 ,\n3298 ,\n4012 ,\n4012 ,\n4318 ,\n4318 ,\n4250 ,\n4250 ,\n3774 ,\n3774 ,\n2924 ,\n2924 ,\n1870 ,\n1870 ,\n544 ,\n544 ,\n-748 ,\n-748 ,\n-2040 ,\n-2040 ,\n-3162 ,\n-3162 ,\n-3762 ,\n-3762 ,\n-4191 ,\n-4191 ,\n-4191 ,\n-4191 ,\n-3762 ,\n-3762 ,\n-3069 ,\n-3069 ,\n-1980 ,\n-1980 ,\n-825 ,\n-825 ,\n528 ,\n528 ,\n1716 ,\n1716 ,\n2838 ,\n2838 ,\n3630 ,\n3630 ,\n4125 ,\n4125 ,\n4191 ,\n4191 ,\n3894 ,\n3894 ,\n3201 ,\n3201 ,\n2244 ,\n2244 ,\n1023 ,\n1023 ,\n-198 ,\n-198 ,\n-1518 ,\n-1518 ,\n-2607 ,\n-2607 ,\n-3498 ,\n-3498 ,\n-4026 ,\n-4026 ,\n-4191 ,\n-4191 ,\n-3993 ,\n-3993 ,\n-3399 ,\n-3399 ,\n-2442 ,\n-2442 ,\n-1320 ,\n-1320 ,\n0 ,\n0 ,\n1221 ,\n1221 ,\n2442 ,\n2442 ,\n3333 ,\n3333 ,\n3993 ,\n3993 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 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,\n-228 ,\n1292 ,\n1292 ,\n2584 ,\n2584 ,\n3762 ,\n3762 ,\n4484 ,\n4484 ,\n4826 ,\n4826 ,\n4750 ,\n4750 ,\n4180 ,\n4180 ,\n3268 ,\n3268 ,\n1976 ,\n1976 ,\n608 ,\n608 ,\n-950 ,\n-950 ,\n-2394 ,\n-2394 ,\n-3534 ,\n-3534 ,\n-4408 ,\n-4408 ,\n-4826 ,\n-4826 ,\n-4788 ,\n-4788 ,\n-4332 ,\n-4332 ,\n-3458 ,\n-3458 ,\n-2280 ,\n-2280 ,\n-814 ,\n-814 ,\n592 ,\n592 ,\n2035 ,\n2035 ,\n3256 ,\n3256 ,\n4107 ,\n4107 ,\n4662 ,\n4662 ,\n4699 ,\n4699 ,\n4329 ,\n4329 ,\n3589 ,\n3589 ,\n2442 ,\n2442 ,\n1147 ,\n1147 ,\n-333 ,\n-333 ,\n-1702 ,\n-1702 ,\n-2997 ,\n-2997 ,\n-3996 ,\n-3996 ,\n-4551 ,\n-4551 ,\n-4699 ,\n-4699 ,\n-4477 ,\n-4477 ,\n-3737 ,\n-3737 ,\n-2738 ,\n-2738 ,\n-1369 ,\n-1369 ,\n0 ,\n0 ,\n1480 ,\n1480 ,\n2738 ,\n2738 ,\n3811 ,\n3811 ,\n4477 ,\n4477 ,\n4699 ,\n4699 ,\n4514 ,\n4514 ,\n3922 ,\n3922 ,\n2923 ,\n2923 ,\n1702 ,\n1702 ,\n222 ,\n222 ,\n-1085 ,\n-1085 ,\n-2380 ,\n-2380 ,\n-3395 ,\n-3395 ,\n-4130 ,\n-4130 ,\n-4445 ,\n-4445 ,\n-4375 ,\n-4375 ,\n-3850 ,\n-3850 ,\n-3010 ,\n-3010 ,\n-1820 ,\n-1820 ,\n-560 ,\n-560 ,\n875 ,\n875 ,\n2100 ,\n2100 ,\n3255 ,\n3255 ,\n3990 ,\n3990 ,\n4445 ,\n4445 ,\n4445 ,\n4445 ,\n3990 ,\n3990 ,\n3185 ,\n3185 ,\n2100 ,\n2100 ,\n770 ,\n770 ,\n-560 ,\n-560 ,\n-1925 ,\n-1925 ,\n-3010 ,\n-3010 ,\n-3885 ,\n-3885 ,\n-4375 ,\n-4375 ,\n-4445 ,\n-4445 ,\n-4130 ,\n-4130 ,\n-3395 ,\n-3395 ,\n-2380 ,\n-2380 ,\n-1085 ,\n-1085 ,\n315 ,\n315 ,\n1610 ,\n1610 ,\n2754 ,\n2754 ,\n3604 ,\n3604 ,\n4182 ,\n4182 ,\n4318 ,\n4318 ,\n4114 ,\n4114 ,\n3502 ,\n3502 ,\n2516 ,\n2516 ,\n1360 ,\n1360 ,\n0 ,\n0 ,\n-1360 ,\n-1360 ,\n-2516 ,\n-2516 ,\n-3502 ,\n-3502 ,\n-4114 ,\n-4114 ,\n-4318 ,\n-4318 ,\n-4182 ,\n-4182 ,\n-3604 ,\n-3604 ,\n-2754 ,\n-2754 ,\n-1564 ,\n-1564 ,\n-306 ,\n-306 ,\n1054 ,\n1054 ,\n2312 ,\n2312 ,\n3298 ,\n3298 ,\n4012 ,\n4012 ,\n4318 ,\n4318 ,\n4250 ,\n4250 ,\n3774 ,\n3774 ,\n2924 ,\n2924 ,\n1870 ,\n1870 ,\n544 ,\n544 ,\n-748 ,\n-748 ,\n-2040 ,\n-2040 ,\n-3162 ,\n-3162 ,\n-3762 ,\n-3762 ,\n-4191 ,\n-4191 ,\n-4191 ,\n-4191 ,\n-3762 ,\n-3762 ,\n-3069 ,\n-3069 ,\n-1980 ,\n-1980 ,\n-825 ,\n-825 ,\n528 ,\n528 ,\n1716 ,\n1716 ,\n2838 ,\n2838 ,\n3630 ,\n3630 ,\n4125 ,\n4125 ,\n4191 ,\n4191 ,\n3894 ,\n3894 ,\n3201 ,\n3201 ,\n2244 ,\n2244 ,\n1023 ,\n1023 ,\n-198 ,\n-198 ,\n-1518 ,\n-1518 ,\n-2607 ,\n-2607 ,\n-3498 ,\n-3498 ,\n-4026 ,\n-4026 ,\n-4191 ,\n-4191 ,\n-3993 ,\n-3993 ,\n-3399 ,\n-3399 ,\n-2442 ,\n-2442 ,\n-1320 ,\n-1320 ,\n0 ,\n0 ,\n1221 ,\n1221 ,\n2442 ,\n2442 ,\n3333 ,\n3333 ,\n3993 ,\n3993 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 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,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 ,\n0 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,\n1408 ,\n3712 ,\n3712 ,\n5824 ,\n5824 ,\n7296 ,\n7296 ,\n8064 ,\n8064 ,\n8128 ,\n8128 ,\n7424 ,\n7424 ,\n5952 ,\n5952 ,\n4032 ,\n4032 ,\n1600 ,\n1600 ,\n-832 ,\n-832 ,\n-3328 ,\n-3328 ,\n-5208 ,\n-5208 ,\n-6820 ,\n-6820 ,\n-7750 ,\n-7750 ,\n-7874 ,\n-7874 ,\n-7316 ,\n-7316 ,\n-6138 ,\n-6138 ,\n-4216 ,\n-4216 ,\n-2108 ,\n-2108 ,\n372 ,\n372 ,\n2666 ,\n2666 ,\n4898 ,\n4898 ,\n6510 ,\n6510 ,\n7564 ,\n7564 ,\n7874 ,\n7874 ,\n7564 ,\n7564 ,\n6386 ,\n6386 ,\n4712 ,\n4712 ,\n2480 ,\n2480 ,\n186 ,\n186 ,\n-2294 ,\n-2294 ,\n-4402 ,\n-4402 ,\n-6262 ,\n-6262 ,\n-7378 ,\n-7378 ,\n-7874 ,\n-7874 ,\n-7688 ,\n-7688 ,\n-6696 ,\n-6696 ,\n-5022 ,\n-5022 ,\n-3038 ,\n-3038 ,\n-558 ,\n-558 ,\n1736 ,\n1736 ,\n4092 ,\n4092 ,\n5890 ,\n5890 ,\n7137 ,\n7137 ,\n7747 ,\n7747 ,\n7686 ,\n7686 ,\n6893 ,\n6893 ,\n5368 ,\n5368 ,\n3355 ,\n3355 ,\n1159 ,\n1159 ,\n-1342 ,\n-1342 ,\n-3538 ,\n-3538 ,\n-5551 ,\n-5551 ,\n-6893 ,\n-6893 ,\n-7686 ,\n-7686 ,\n-7747 ,\n-7747 ,\n-7076 ,\n-7076 ,\n-5795 ,\n-5795 ,\n-3843 ,\n-3843 ,\n-1708 ,\n-1708 ,\n793 ,\n793 ,\n3172 ,\n3172 ,\n5124 ,\n5124 ,\n6710 ,\n6710 ,\n7564 ,\n7564 ,\n7747 ,\n7747 ,\n7259 ,\n7259 ,\n6039 ,\n6039 ,\n4331 ,\n4331 ,\n2074 ,\n2074 ,\n-183 ,\n-183 ,\n-2623 ,\n-2623 ,\n-4819 ,\n-4819 ,\n-6405 ,\n-6405 ,\n-7442 ,\n-7442 ,\n-7620 ,\n-7620 ,\n-7320 ,\n-7320 ,\n-6300 ,\n-6300 ,\n-4560 ,\n-4560 ,\n-2580 ,\n-2580 ,\n-180 ,\n-180 ,\n2040 ,\n2040 ,\n4260 ,\n4260 ,\n6060 ,\n6060 ,\n7140 ,\n7140 ,\n7620 ,\n7620 ,\n7440 ,\n7440 ,\n6480 ,\n6480 ,\n5040 ,\n5040 ,\n2940 ,\n2940 ,\n780 ,\n780 ,\n-1680 ,\n-1680 ,\n-3780 ,\n-3780 ,\n-5700 ,\n-5700 ,\n-6960 ,\n-6960 ,\n-7620 ,\n-7620 ,\n-7560 ,\n-7560 ,\n-6780 ,\n-6780 ,\n-5280 ,\n-5280 ,\n-3480 ,\n-3480 ,\n-1140 ,\n-1140 ,\n1140 ,\n1140 ,\n3480 ,\n3480 ,\n5280 ,\n5280 ,\n6780 ,\n6780 ,\n7560 ,\n7560 ,\n7620 ,\n7620 ,\n6728 ,\n6728 ,\n5510 ,\n5510 ,\n3654 ,\n3654 ,\n1624 ,\n1624 ,\n-754 ,\n-754 ,\n-2842 ,\n-2842 ,\n-4872 ,\n-4872 ,\n-6264 ,\n-6264 ,\n-7192 ,\n-7192 ,\n-7366 ,\n-7366 ,\n-6902 ,\n-6902 ,\n-5742 ,\n-5742 ,\n-4118 ,\n-4118 ,\n-1972 ,\n-1972 ,\n174 ,\n174 ,\n2494 ,\n2494 ,\n4408 ,\n4408 ,\n6090 ,\n6090 ,\n7076 ,\n7076 ,\n7366 ,\n7366 ,\n7076 ,\n7076 ,\n6090 ,\n6090 ,\n4582 ,\n4582 ,\n2494 ,\n2494 ,\n174 ,\n174 ,\n-1972 ,\n-1972 ,\n-4118 ,\n-4118 ,\n-5742 ,\n-5742 ,\n-6902 ,\n-6902 ,\n-7366 ,\n-7366 ,\n-7192 ,\n-7192 ,\n-6380 ,\n-6380 ,\n-4788 ,\n-4788 ,\n-2964 ,\n-2964 ,\n-741 ,\n-741 ,\n1596 ,\n1596 ,\n3591 ,\n3591 ,\n5415 ,\n5415 ,\n6612 ,\n6612 ,\n7239 ,\n7239 ,\n7182 ,\n7182 ,\n6441 ,\n6441 ,\n5187 ,\n5187 ,\n3306 ,\n3306 ,\n1254 ,\n1254 ,\n-1083 ,\n-1083 ,\n-3306 ,\n-3306 ,\n-5016 ,\n-5016 ,\n-6441 ,\n-6441 ,\n-7182 ,\n-7182 ,\n-7239 ,\n-7239 ,\n-6669 ,\n-6669 ,\n-5415 ,\n-5415 ,\n-3762 ,\n-3762 ,\n-1596 ,\n-1596 ,\n513 ,\n513 ,\n2793 ,\n2793 ,\n4617 ,\n4617 ,\n6156 ,\n6156 ,\n7068 ,\n7068 ,\n7239 ,\n7239 ,\n6783 ,\n6783 ,\n5757 ,\n5757 ,\n4047 ,\n4047 ,\n2072 ,\n2072 ,\n-168 ,\n-168 ,\n-2240 ,\n-2240 ,\n-4256 ,\n-4256 ,\n-5768 ,\n-5768 ,\n-6832 ,\n-6832 ,\n-7112 ,\n-7112 ,\n-6832 ,\n-6832 ,\n-5880 ,\n-5880 ,\n-4424 ,\n-4424 ,\n-2408 ,\n-2408 ,\n-336 ,\n-336 ,\n1904 ,\n1904 ,\n3808 ,\n3808 ,\n5544 ,\n5544 ,\n6608 ,\n6608 ,\n7112 ,\n7112 ,\n6944 ,\n6944 ,\n6160 ,\n6160 ,\n4704 ,\n4704 ,\n2912 ,\n2912 ,\n728 ,\n728 ,\n-1400 ,\n-1400 ,\n-3528 ,\n-3528 ,\n-5208 ,\n-5208 ,\n-6496 ,\n-6496 ,\n-7112 ,\n-7112 ,\n-7056 ,\n-7056 ,\n-6384 ,\n-6384 ,\n-5096 ,\n-5096 ,\n-3248 ,\n-3248 ,\n-1232 ,\n-1232 ,\n1045 ,\n1045 ,\n3025 ,\n3025 ,\n4840 ,\n4840 ,\n6105 ,\n6105 ,\n6930 ,\n6930 ,\n6985 ,\n6985 ,\n6435 ,\n6435 ,\n5335 ,\n5335 ,\n3630 ,\n3630 ,\n1540 ,\n1540 ,\n-495 ,\n-495 ,\n-2695 ,\n-2695 ,\n-4455 ,\n-4455 ,\n-5940 ,\n-5940 ,\n-6765 ,\n-6765 ,\n-6985 ,\n-6985 ,\n-6655 ,\n-6655 ,\n-5555 ,\n-5555 ,\n-4070 ,\n-4070 ,\n-2035 ,\n-2035 ,\n165 ,\n165 ,\n2200 ,\n2200 ,\n4180 ,\n4180 ,\n5665 ,\n5665 ,\n6710 ,\n6710 ,\n6985 ,\n6985 ,\n6710 ,\n6710 ,\n5830 ,\n5830 ,\n4345 ,\n4345 ,\n2530 ,\n2530 ,\n330 ,\n330 ,\n-1870 ,\n-1870 ,\n-3604 ,\n-3604 ,\n-5247 ,\n-5247 ,\n-6254 ,\n-6254 ,\n-6731 ,\n-6731 ,\n-6625 ,\n-6625 ,\n-5830 ,\n-5830 ,\n-4558 ,\n-4558 ,\n-2756 ,\n-2756 ,\n-848 ,\n-848 ,\n1325 ,\n1325 ,\n3180 ,\n3180 ,\n4929 ,\n4929 ,\n6148 ,\n6148 ,\n6731 ,\n6731 ,\n6678 ,\n6678 ,\n6042 ,\n6042 ,\n4823 ,\n4823 ,\n3180 ,\n3180 ,\n1166 ,\n1166 ,\n-848 ,\n-848 ,\n-2915 ,\n-2915 ,\n-4558 ,\n-4558 ,\n-5883 ,\n-5883 ,\n-6678 ,\n-6678 ,\n-6731 ,\n-6731 ,\n-6201 ,\n-6201 ,\n-5141 ,\n-5141 ,\n-3498 ,\n-3498 ,\n-1643 ,\n-1643 ,\n477 ,\n477 ,\n2438 ,\n2438 ,\n4293 ,\n4293 ,\n5512 ,\n5512 ,\n6396 ,\n6396 ,\n6604 ,\n6604 ,\n6292 ,\n6292 ,\n5252 ,\n5252 ,\n3848 ,\n3848 ,\n1924 ,\n1924 ,\n0 ,\n0 ,\n-2080 ,\n-2080 ,\n-3848 ,\n-3848 ,\n-5356 ,\n-5356 ,\n-6292 ,\n-6292 ,\n-6604 ,\n-6604 ,\n-6396 ,\n-6396 ,\n-5512 ,\n-5512 ,\n-4108 ,\n-4108 ,\n-2392 ,\n-2392 ,\n-312 ,\n-312 ,\n1612 ,\n1612 ,\n3536 ,\n3536 ,\n5044 ,\n5044 ,\n6136 ,\n6136 ,\n6604 ,\n6604 ,\n6500 ,\n6500 ,\n5772 ,\n5772 ,\n4472 ,\n4472 ,\n2704 ,\n2704 ,\n832 ,\n832 ,\n-1300 ,\n-1300 ,\n-3120 ,\n-3120 ,\n-4836 ,\n-4836 ,\n-5928 ,\n-5928 ,\n-6477 ,\n-6477 ,\n-6477 ,\n-6477 ,\n-5814 ,\n-5814 ,\n-4743 ,\n-4743 ,\n-3060 ,\n-3060 ,\n-1122 ,\n-1122 ,\n816 ,\n816 ,\n2805 ,\n2805 ,\n4386 ,\n4386 ,\n5661 ,\n5661 ,\n6375 ,\n6375 ,\n6477 ,\n6477 ,\n6018 ,\n6018 ,\n4947 ,\n4947 ,\n3468 ,\n3468 ,\n1581 ,\n1581 ,\n-306 ,\n-306 ,\n-2346 ,\n-2346 ,\n-4131 ,\n-4131 ,\n-5406 ,\n-5406 ,\n-6273 ,\n-6273 ,\n-6477 ,\n-6477 ,\n-6171 ,\n-6171 ,\n-5253 ,\n-5253 ,\n-3774 ,\n-3774 ,\n-2040 ,\n-2040 ,\n0 ,\n0 ,\n1887 ,\n1887 ,\n3774 ,\n3774 ,\n5253 ,\n5253 ,\n6171 ,\n6171 ,\n6477 ,\n6477 ,\n6027 ,\n6027 ,\n5194 ,\n5194 ,\n3969 ,\n3969 ,\n2254 ,\n2254 ,\n441 ,\n441 ,\n-1519 ,\n-1519 ,\n-3234 ,\n-3234 ,\n-4753 ,\n-4753 ,\n-5782 ,\n-5782 ,\n-6223 ,\n-6223 ,\n-6125 ,\n-6125 ,\n-5439 ,\n-5439 ,\n-4214 ,\n-4214 ,\n-2695 ,\n-2695 ,\n-784 ,\n-784 ,\n1078 ,\n1078 ,\n2940 ,\n2940 ,\n4459 ,\n4459 ,\n5586 ,\n5586 ,\n6174 ,\n6174 ,\n6223 ,\n6223 ,\n5586 ,\n5586 ,\n4557 ,\n4557 ,\n2940 ,\n2940 ,\n1225 ,\n1225 ,\n-784 ,\n-784 ,\n-2548 ,\n-2548 ,\n-4214 ,\n-4214 ,\n-5390 ,\n-5390 ,\n-6125 ,\n-6125 ,\n-6223 ,\n-6223 ,\n-5782 ,\n-5782 ,\n-4656 ,\n-4656 ,\n-3264 ,\n-3264 ,\n-1488 ,\n-1488 ,\n288 ,\n288 ,\n2208 ,\n2208 ,\n3792 ,\n3792 ,\n5088 ,\n5088 ,\n5856 ,\n5856 ,\n6096 ,\n6096 ,\n5856 ,\n5856 ,\n4944 ,\n4944 ,\n3552 ,\n3552 ,\n1920 ,\n1920 ,\n0 ,\n0 ,\n-1776 ,\n-1776 ,\n-3552 ,\n-3552 ,\n-4848 ,\n-4848 ,\n-5808 ,\n-5808 ,\n-6096 ,\n-6096 ,\n-5904 ,\n-5904 ,\n-5184 ,\n-5184 ,\n-3888 ,\n-3888 ,\n-2352 ,\n-2352 ,\n-432 ,\n-432 ,\n1488 ,\n1488 ,\n3168 ,\n3168 ,\n4656 ,\n4656 ,\n5616 ,\n5616 ,\n6096 ,\n6096 ,\n6048 ,\n6048 ,\n5328 ,\n5328 ,\n4224 ,\n4224 ,\n2585 ,\n2585 ,\n893 ,\n893 ,\n-1034 ,\n-1034 ,\n-2820 ,\n-2820 ,\n-4277 ,\n-4277 ,\n-5358 ,\n-5358 ,\n-5922 ,\n-5922 ,\n-5969 ,\n-5969 ,\n-5452 ,\n-5452 ,\n-4371 ,\n-4371 ,\n-2961 ,\n-2961 ,\n-1175 ,\n-1175 ,\n611 ,\n611 ,\n2444 ,\n2444 ,\n4042 ,\n4042 ,\n5170 ,\n5170 ,\n5875 ,\n5875 ,\n5969 ,\n5969 ,\n5546 ,\n5546 ,\n4653 ,\n4653 ,\n3196 ,\n3196 ,\n1598 ,\n1598 ,\n-282 ,\n-282 ,\n-2021 ,\n-2021 ,\n-3713 ,\n-3713 ,\n-4935 ,\n-4935 ,\n-5734 ,\n-5734 ,\n-5969 ,\n-5969 ,\n-5734 ,\n-5734 ,\n-4841 ,\n-4841 ,\n-3572 ,\n-3572 ,\n-1880 ,\n-1880 ,\n-138 ,\n-138 ,\n1702 ,\n1702 ,\n3266 ,\n3266 ,\n4646 ,\n4646 ,\n5474 ,\n5474 ,\n5842 ,\n5842 ,\n5658 ,\n5658 ,\n4968 ,\n4968 ,\n3726 ,\n3726 ,\n2254 ,\n2254 ,\n414 ,\n414 ,\n-1288 ,\n-1288 ,\n-3036 ,\n-3036 ,\n-4370 ,\n-4370 ,\n-5382 ,\n-5382 ,\n-5842 ,\n-5842 ,\n-5796 ,\n-5796 ,\n-5106 ,\n-5106 ,\n-4048 ,\n-4048 ,\n-2530 ,\n-2530 ,\n-874 ,\n-874 ,\n1012 ,\n1012 ,\n2668 ,\n2668 ,\n4186 ,\n4186 ,\n5198 ,\n5198 ,\n5796 ,\n5796 ,\n5842 ,\n5842 ,\n5336 ,\n5336 ,\n4370 ,\n4370 ,\n2898 ,\n2898 ,\n1150 ,\n1150 ,\n-598 ,\n-598 ,\n-2288 ,\n-2288 ,\n-3696 ,\n-3696 ,\n-4840 ,\n-4840 ,\n-5456 ,\n-5456 ,\n-5588 ,\n-5588 ,\n-5236 ,\n-5236 ,\n-4356 ,\n-4356 ,\n-3124 ,\n-3124 ,\n-1496 ,\n-1496 ,\n264 ,\n264 ,\n1892 ,\n1892 ,\n3476 ,\n3476 ,\n4620 ,\n4620 ,\n5368 ,\n5368 ,\n5588 ,\n5588 ,\n5368 ,\n5368 ,\n4620 ,\n4620 ,\n3344 ,\n3344 ,\n1892 ,\n1892 ,\n132 ,\n132 ,\n-1628 ,\n-1628 ,\n-3124 ,\n-3124 ,\n-4444 ,\n-4444 ,\n-5236 ,\n-5236 ,\n-5588 ,\n-5588 ,\n-5456 ,\n-5456 ,\n-4752 ,\n-4752 ,\n-3696 ,\n-3696 ,\n-2156 ,\n-2156 ,\n-572 ,\n-572 ,\n1232 ,\n1232 ,\n2904 ,\n2904 ,\n4085 ,\n4085 ,\n5031 ,\n5031 ,\n5461 ,\n5461 ,\n5418 ,\n5418 ,\n4859 ,\n4859 ,\n3784 ,\n3784 ,\n2494 ,\n2494 ,\n817 ,\n817 ,\n-817 ,\n-817 ,\n-2494 ,\n-2494 ,\n-3784 ,\n-3784 ,\n-4859 ,\n-4859 ,\n-5418 ,\n-5418 ,\n-5461 ,\n-5461 ,\n-4988 ,\n-4988 ,\n-4085 ,\n-4085 ,\n-2709 ,\n-2709 ,\n-1204 ,\n-1204 ,\n559 ,\n559 ,\n2107 ,\n2107 ,\n3612 ,\n3612 ,\n4644 ,\n4644 ,\n5332 ,\n5332 ,\n5461 ,\n5461 ,\n5117 ,\n5117 ,\n4257 ,\n4257 ,\n3053 ,\n3053 ,\n1462 ,\n1462 ,\n-129 ,\n-129 ,\n-1849 ,\n-1849 ,\n-3268 ,\n-3268 ,\n-4515 ,\n-4515 ,\n-5124 ,\n-5124 ,\n-5334 ,\n-5334 ,\n-5124 ,\n-5124 ,\n-4410 ,\n-4410 ,\n-3192 ,\n-3192 ,\n-1806 ,\n-1806 ,\n-126 ,\n-126 ,\n1428 ,\n1428 ,\n2982 ,\n2982 ,\n4158 ,\n4158 ,\n4998 ,\n4998 ,\n5334 ,\n5334 ,\n5208 ,\n5208 ,\n4620 ,\n4620 ,\n3528 ,\n3528 ,\n2058 ,\n2058 ,\n546 ,\n546 ,\n-1176 ,\n-1176 ,\n-2646 ,\n-2646 ,\n-3990 ,\n-3990 ,\n-4872 ,\n-4872 ,\n-5334 ,\n-5334 ,\n-5292 ,\n-5292 ,\n-4746 ,\n-4746 ,\n-3822 ,\n-3822 ,\n-2436 ,\n-2436 ,\n-798 ,\n-798 ,\n798 ,\n798 ,\n2436 ,\n2436 ,\n3696 ,\n3696 ,\n4746 ,\n4746 ,\n5292 ,\n5292 ,\n5080 ,\n5080 ,\n4680 ,\n4680 ,\n3800 ,\n3800 ,\n2640 ,\n2640 ,\n1120 ,\n1120 ,\n-520 ,\n-520 ,\n-1960 ,\n-1960 ,\n-3360 ,\n-3360 ,\n-4320 ,\n-4320 ,\n-4960 ,\n-4960 ,\n-5080 ,\n-5080 ,\n-4760 ,\n-4760 ,\n-4040 ,\n-4040 ,\n-2840 ,\n-2840 ,\n-1480 ,\n-1480 ,\n120 ,\n120 ,\n1600 ,\n1600 ,\n3040 ,\n3040 ,\n4200 ,\n4200 ,\n4880 ,\n4880 ,\n5080 ,\n5080 ,\n4880 ,\n4880 ,\n4200 ,\n4200 ,\n3160 ,\n3160 ,\n1720 ,\n1720 ,\n240 ,\n240 ,\n-1360 ,\n-1360 ,\n-2720 ,\n-2720 ,\n-3960 ,\n-3960 ,\n-4760 ,\n-4760 ,\n-5080 ,\n-5080 ,\n-4960 ,\n-4960 ,\n-4290 ,\n-4290 ,\n-3276 ,\n-3276 ,\n-2028 ,\n-2028 ,\n-507 ,\n-507 ,\n975 ,\n975 ,\n2457 ,\n2457 ,\n3627 ,\n3627 ,\n4524 ,\n4524 ,\n4953 ,\n4953 ,\n4914 ,\n4914 ,\n4407 ,\n4407 ,\n3549 ,\n3549 ,\n2262 ,\n2262 ,\n858 ,\n858 ,\n-741 ,\n-741 ,\n-2145 ,\n-2145 ,\n-3432 ,\n-3432 ,\n-4329 ,\n-4329 ,\n-4914 ,\n-4914 ,\n-4953 ,\n-4953 ,\n-4563 ,\n-4563 ,\n-3705 ,\n-3705 ,\n-2574 ,\n-2574 ,\n-1092 ,\n-1092 ,\n351 ,\n351 ,\n1911 ,\n1911 ,\n3159 ,\n3159 ,\n4212 ,\n4212 ,\n4797 ,\n4797 ,\n4953 ,\n4953 ,\n4719 ,\n4719 ,\n3939 ,\n3939 ,\n2698 ,\n2698 ,\n1406 ,\n1406 ,\n-114 ,\n-114 ,\n-1520 ,\n-1520 ,\n-2888 ,\n-2888 ,\n-3914 ,\n-3914 ,\n-4636 ,\n-4636 ,\n-4826 ,\n-4826 ,\n-4636 ,\n-4636 ,\n-4028 ,\n-4028 ,\n-3002 ,\n-3002 ,\n-1634 ,\n-1634 ,\n-228 ,\n-228 ,\n1292 ,\n1292 ,\n2584 ,\n2584 ,\n3762 ,\n3762 ,\n4484 ,\n4484 ,\n4826 ,\n4826 ,\n4750 ,\n4750 ,\n4180 ,\n4180 ,\n3268 ,\n3268 ,\n1976 ,\n1976 ,\n608 ,\n608 ,\n-950 ,\n-950 ,\n-2394 ,\n-2394 ,\n-3534 ,\n-3534 ,\n-4408 ,\n-4408 ,\n-4826 ,\n-4826 ,\n-4788 ,\n-4788 ,\n-4332 ,\n-4332 ,\n-3458 ,\n-3458 ,\n-2280 ,\n-2280 ,\n-814 ,\n-814 ,\n592 ,\n592 ,\n2035 ,\n2035 ,\n3256 ,\n3256 ,\n4107 ,\n4107 ,\n4662 ,\n4662 ,\n4699 ,\n4699 ,\n4329 ,\n4329 ,\n3589 ,\n3589 ,\n2442 ,\n2442 ,\n1147 ,\n1147 ,\n-333 ,\n-333 ,\n-1702 ,\n-1702 ,\n-2997 ,\n-2997 ,\n-3996 ,\n-3996 ,\n-4551 ,\n-4551 ,\n-4699 ,\n-4699 ,\n-4477 ,\n-4477 ,\n-3737 ,\n-3737 ,\n-2738 ,\n-2738 ,\n-1369 ,\n-1369 ,\n0 ,\n0 ,\n1480 ,\n1480 ,\n2738 ,\n2738 ,\n3811 ,\n3811 ,\n4477 ,\n4477 ,\n4699 ,\n4699 ,\n4514 ,\n4514 ,\n3922 ,\n3922 ,\n2923 ,\n2923 ,\n1702 ,\n1702 ,\n222 ,\n222 ,\n-1085 ,\n-1085 ,\n-2380 ,\n-2380 ,\n-3395 ,\n-3395 ,\n-4130 ,\n-4130 ,\n-4445 ,\n-4445 ,\n-4375 ,\n-4375 ,\n-3850 ,\n-3850 ,\n-3010 ,\n-3010 ,\n-1820 ,\n-1820 ,\n-560 ,\n-560 ,\n875 ,\n875 ,\n2100 ,\n2100 ,\n3255 ,\n3255 ,\n3990 ,\n3990 ,\n4445 ,\n4445 ,\n4445 ,\n4445 ,\n3990 ,\n3990 ,\n3185 ,\n3185 ,\n2100 ,\n2100 ,\n770 ,\n770 ,\n-560 ,\n-560 ,\n-1925 ,\n-1925 ,\n-3010 ,\n-3010 ,\n-3885 ,\n-3885 ,\n-4375 ,\n-4375 ,\n-4445 ,\n-4445 ,\n-4130 ,\n-4130 ,\n-3395 ,\n-3395 ,\n-2380 ,\n-2380 ,\n-1085 ,\n-1085 ,\n315 ,\n315 ,\n1610 ,\n1610 ,\n2754 ,\n2754 ,\n3604 ,\n3604 ,\n4182 ,\n4182 ,\n4318 ,\n4318 ,\n4114 ,\n4114 ,\n3502 ,\n3502 ,\n2516 ,\n2516 ,\n1360 ,\n1360 ,\n0 ,\n0 ,\n-1360 ,\n-1360 ,\n-2516 ,\n-2516 ,\n-3502 ,\n-3502 ,\n-4114 ,\n-4114 ,\n-4318 ,\n-4318 ,\n-4182 ,\n-4182 ,\n-3604 ,\n-3604 ,\n-2754 ,\n-2754 ,\n-1564 ,\n-1564 ,\n-306 ,\n-306 ,\n1054 ,\n1054 ,\n2312 ,\n2312 ,\n3298 ,\n3298 ,\n4012 ,\n4012 ,\n4318 ,\n4318 ,\n4250 ,\n4250 ,\n3774 ,\n3774 ,\n2924 ,\n2924 ,\n1870 ,\n1870 ,\n544 ,\n544 ,\n-748 ,\n-748 ,\n-2040 ,\n-2040 ,\n-3162 ,\n-3162 ," }, { "path": "config/_default_cfg_src_/slave_code.S", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#define TO_STRING_A(s) # s\n#define TO_STRING(s) TO_STRING_A(s)\n\n.globl __slave_code_start\n.globl __slave_code_end\n.section .slave_code_flash_rodata, \"a\", %progbits\n.balign 4\n\n__slave_code_start:\n\t.incbin TO_STRING(SLAVE_BIN_NAME)\n__slave_code_end:\n\n" }, { "path": "config/_default_cfg_src_/tgt_hardware.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"tgt_hardware.h\"\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM] = {};\n\n// adckey define\nconst uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER] = {\n HAL_KEY_CODE_FN9, HAL_KEY_CODE_FN8, HAL_KEY_CODE_FN7,\n HAL_KEY_CODE_FN6, HAL_KEY_CODE_FN5, HAL_KEY_CODE_FN4,\n HAL_KEY_CODE_FN3, HAL_KEY_CODE_FN2, HAL_KEY_CODE_FN1};\n\n// gpiokey define\nconst struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {};\n\n// bt config\nconst char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) \"\\0\";\nconst char *BLE_DEFAULT_NAME = \"BES_BLE\";\n\nuint8_t ble_addr[6] = {\n#ifdef BLE_DEV_ADDR\n BLE_DEV_ADDR\n#else\n 0xBE, 0x99, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\nuint8_t bt_addr[6] = {\n#ifdef BT_DEV_ADDR\n BT_DEV_ADDR\n#else\n 0x1e, 0x57, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\n\n// audio config\n// freq bands range {[0k:2.5K], [2.5k:5K], [5k:7.5K], [7.5K:10K], [10K:12.5K],\n// [12.5K:15K], [15K:17.5K], [17.5K:20K]} gain range -12~+12\nconst int8_t cfg_hw_aud_eq_band_settings[CFG_HW_AUD_EQ_NUM_BANDS] = {\n 0, 0, 0, 0, 0, 0, 0, 0};\n\n#define TX_PA_GAIN CODEC_TX_PA_GAIN_DEFAULT\n\nconst struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {\n {TX_PA_GAIN, 0x03, -11}, {TX_PA_GAIN, 0x03, -99},\n {TX_PA_GAIN, 0x03, -45}, {TX_PA_GAIN, 0x03, -42},\n {TX_PA_GAIN, 0x03, -39}, {TX_PA_GAIN, 0x03, -36},\n {TX_PA_GAIN, 0x03, -33}, {TX_PA_GAIN, 0x03, -30},\n {TX_PA_GAIN, 0x03, -27}, {TX_PA_GAIN, 0x03, -24},\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -18},\n {TX_PA_GAIN, 0x03, -15}, {TX_PA_GAIN, 0x03, -12},\n {TX_PA_GAIN, 0x03, -9}, {TX_PA_GAIN, 0x03, -6},\n {TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm\n};\n\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_VMIC_MAP_VMIC1)\n#define CFG_HW_AUD_INPUT_PATH_LINEIN_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)\n#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)\nconst struct AUD_IO_PATH_CFG_T\n cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n {\n AUD_INPUT_PATH_LINEIN,\n CFG_HW_AUD_INPUT_PATH_LINEIN_DEV,\n },\n {\n AUD_INPUT_PATH_VADMIC,\n CFG_HW_AUD_INPUT_PATH_VADMIC_DEV,\n },\n};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg =\n {HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n" }, { "path": "config/_default_cfg_src_/tgt_hardware.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __TGT_HARDWARE__\n#define __TGT_HARDWARE__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_iomux.h\"\n#include \"hal_gpio.h\"\n#include \"hal_key.h\"\n#include \"hal_aud.h\"\n\n//pwl\n#define CFG_HW_PLW_NUM (0)\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM];\n\n//adckey define\n#define CFG_HW_ADCKEY_NUMBER 9\n#define CFG_HW_ADCKEY_BASE 0\n#define CFG_HW_ADCKEY_ADC_MAXVOLT 1000\n#define CFG_HW_ADCKEY_ADC_MINVOLT 0\n#define CFG_HW_ADCKEY_ADC_KEYVOLT_BASE 130\nextern const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER];\n\n#define BTA_AV_CO_SBC_MAX_BITPOOL 53\n\n//gpiokey define\n#define CFG_HW_GPIOKEY_NUM (0)\nextern const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM];\n\n// audio codec\n#define CFG_HW_AUD_INPUT_PATH_NUM 3\nextern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM];\n\n#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)\n\n#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH0)\n#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)\n\n//bt config\nextern const char *BT_LOCAL_NAME;\nextern const char *BLE_DEFAULT_NAME;\nextern uint8_t ble_addr[6];\nextern uint8_t bt_addr[6];\n\n#define CODEC_SADC_VOL (7)\n\nextern const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY];\n\n//range -12~+12\n#define CFG_HW_AUD_EQ_NUM_BANDS (8)\nextern const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS];\n#define CFG_AUD_EQ_IIR_NUM_BANDS (4)\n\n//battery info\n#define APP_BATTERY_MIN_MV (3200)\n#define APP_BATTERY_PD_MV (3100)\n\n#define APP_BATTERY_MAX_MV (4200)\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "config/bak_open/target.mk", "content": "CHIP ?= best2300p\n\nDEBUG ?= 1\n\nMBED ?= 0\n\nRTOS ?= 1\n\n#KERNEL ?= FREERTOS\n\n\nLIBC_ROM ?= 1\n\nexport USER_SECURE_BOOT\t?= 0\n# enable:1\n# disable:0\n\nWATCHER_DOG ?= 0\n\nDEBUG_PORT ?= 1\n# 0: usb\n# 1: uart0\n# 2: uart1\n\nFLASH_CHIP\t?= ALL\n# GD25Q80C\n# GD25Q32C\n# ALL\n\nexport NO_TRACE_TIME_STAMP ?=1\n\nexport FORCE_SIGNALINGMODE ?= 0\n\nexport FORCE_NOSIGNALINGMODE ?= 0\n\nexport FORCE_SCO_MAX_RETX ?= 0\n\nexport FA_RX_GAIN_CTRL ?= 1\n\nexport BT_FA_ECC ?= 0\n\nexport CONTROLLER_DUMP_ENABLE ?= 0\n\nexport CONTROLLER_MEM_LOG_ENABLE ?= 0\n\nexport INTERSYS_DEBUG ?= 1\n\nexport PROFILE_DEBUG ?= 0\n\nexport BTDUMP_ENABLE ?= 0\n\nexport BT_DEBUG_TPORTS ?= 0\n\nTPORTS_KEY_COEXIST ?= 0\n\nexport SNIFF_MODE_CHECK ?= 0\n\nAUDIO_OUTPUT_MONO ?= 0\n\nAUDIO_OUTPUT_DIFF ?= 0\n\n#### ANC DEFINE START ######\nexport ANC_APP\t\t ?= 1\nexport ANC_FF_ENABLED\t?= 1\nexport ANC_FB_ENABLED\t?= 1\nexport AUDIO_ANC_FB_MC ?= 0\nexport AUDIO_SECTION_SUPPT ?= 0\nexport AUD_SECTION_STRUCT_VERSION ?= 2\nexport AUDIO_ANC_FB_MC_HW ?=0\nexport APP_ANC_KEY ?= 0\nexport ANC_FB_CHECK ?= 1\n##### ANC DEFINE END ######\n\nAPP_ANC_TEST ?= 0\n\nTEST_OVER_THE_AIR ?= 0\n\nHW_FIR_EQ_PROCESS ?= 0\n\nSW_IIR_EQ_PROCESS ?= 1\n\nHW_DAC_IIR_EQ_PROCESS ?= 0\n\nHW_IIR_EQ_PROCESS ?= 0\n\nHW_DC_FILTER_WITH_IIR ?= 0\n\nAUDIO_DRC ?= 0\n\nAUDIO_DRC2 ?= 0\n\nPC_CMD_UART ?= 0\n\nAUDIO_SECTION_ENABLE ?= 0\n\nAUDIO_RESAMPLE ?= 1\n\nRESAMPLE_ANY_SAMPLE_RATE ?= 1\n\nOSC_26M_X4_AUD2BB ?= 1\n\nAUDIO_OUTPUT_VOLUME_DEFAULT ?= 12\n# range:1~16\n\nAUDIO_INPUT_CAPLESSMODE ?= 0\n\nAUDIO_INPUT_LARGEGAIN ?= 0\n\nAUDIO_CODEC_ASYNC_CLOSE ?= 0\n\nAUDIO_SCO_BTPCM_CHANNEL ?= 1\n\nexport A2DP_CP_ACCEL ?= 1\n\nexport SCO_CP_ACCEL ?= 1\n\nexport SCO_TRACE_CP_ACCEL ?= 0\n\n# For TWS SCO DMA snapshot and low delay\nexport PCM_FAST_MODE ?= 1\n\nexport CVSD_BYPASS ?= 1\n\nexport LOW_DELAY_SCO ?= 0\n\nSPEECH_TX_DC_FILTER ?= 1\n\nSPEECH_TX_AEC2FLOAT ?= 0\n\nSPEECH_TX_NS3 ?= 0\n\nSPEECH_TX_2MIC_NS2 ?= 0\n\nSPEECH_TX_COMPEXP ?= 1\n\nSPEECH_TX_EQ ?= 0\n\nSPEECH_TX_POST_GAIN ?= 0\n\nSPEECH_RX_NS2FLOAT ?= 0\n\nSPEECH_RX_EQ ?= 0\n\nSPEECH_RX_POST_GAIN ?= 0\n\nLARGE_RAM ?= 1\n\nHSP_ENABLE ?= 0\n\nHFP_1_6_ENABLE ?= 1\n\nMSBC_PLC_ENABLE ?= 1\n\nMSBC_PLC_ENCODER ?= 1\n\nMSBC_16K_SAMPLE_RATE ?= 1\n\nSBC_FUNC_IN_ROM ?= 0\n\nROM_UTILS_ON ?= 0\n\nAPP_LINEIN_A2DP_SOURCE ?= 0\n\nAPP_I2S_A2DP_SOURCE ?= 0\n\nVOICE_PROMPT ?= 1\n\nexport THROUGH_PUT ?= 0\n\n#### Google related feature ####\n# the overall google service switch\n# currently, google service includes BISTO and GFPS\nexport GOOGLE_SERVICE_ENABLE ?= 0\n\n# BISTO is a GVA service on Bluetooth audio device\n# BISTO is an isolated service relative to GFPS\nexport BISTO_ENABLE ?= 0\n\n# macro switch for reduced_guesture\nexport REDUCED_GUESTURE_ENABLE ?= 0\n\n# GSOUND_HOTWORD is a hotword library running on Bluetooth audio device\n# GSOUND_HOTWORD is a subset of BISTO\nexport GSOUND_HOTWORD_ENABLE ?= 0\n\n# this is a subset choice for gsound hotword\nexport GSOUND_HOTWORD_EXTERNAL ?= 0\n\n# GFPS is google fastpair service\n# GFPS is an isolated service relative to BISTO\nexport GFPS_ENABLE ?= 0\n#### Google related feature ####\n\nexport WL_UI ?= 1\n\nBLE ?= 0\n\nTOTA ?= 0\n\nGATT_OVER_BR_EDR ?= 0\n\nOTA_ENABLE ?= 0\n\nTILE_DATAPATH_ENABLED ?= 0\n\nCUSTOM_INFORMATION_TILE_ENABLE ?= 0\n\nINTERCONNECTION ?= 0\n\nINTERACTION ?= 0\n\nINTERACTION_FASTPAIR ?= 0\n\nBT_ONE_BRING_TWO ?= 0\n\nDSD_SUPPORT ?= 0\n\nA2DP_EQ_24BIT ?= 1\n\nA2DP_AAC_ON ?= 1\n\nA2DP_SCALABLE_ON ?= 0\n\nA2DP_LHDC_ON ?= 0\nifeq ($(A2DP_LHDC_ON),1)\nA2DP_LHDC_V3 ?= 1\nA2DP_LHDC_LARC ?= 1\nexport FLASH_UNIQUE_ID ?= 1\nendif\n\nA2DP_LDAC_ON ?= 0\n\nexport TX_RX_PCM_MASK ?= 0\n\nA2DP_SCALABLE_ON ?= 0\n\nFACTORY_MODE ?= 1\n\nENGINEER_MODE ?= 0\n\nULTRA_LOW_POWER\t?= 1\n\nDAC_CLASSG_ENABLE ?= 1\n\nNO_SLEEP ?= 0\n\nCORE_DUMP ?= 1\n\nCORE_DUMP_TO_FLASH ?= 0\n\nENHANCED_STACK ?= 1\n\nexport SYNC_BT_CTLR_PROFILE ?= 0\n\nexport A2DP_AVDTP_CP ?= 0\n\nexport A2DP_DECODER_VER := 2\n\nexport IBRT ?= 1\n\nexport IBRT_SEARCH_UI ?= 1\n\nexport BES_AUD ?= 1\n\nexport POWER_MODE ?= DIG_DCDC\n\nexport BT_RF_PREFER ?= 2M\n\nexport SPEECH_CODEC ?= 1\n\nexport TWS_PROMPT_SYNC ?= 0\nexport MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED ?= 0\nexport IOS_MFI ?= 0\n\nexport FLASH_SIZE ?= 0x400000\nexport FLASH_SUSPEND ?= 1\n\nifeq ($(DSD_SUPPORT),1)\nexport BTUSB_AUDIO_MODE ?= 1\nexport AUDIO_INPUT_MONO ?= 1\nexport USB_ISO ?= 1\nexport USB_AUDIO_DYN_CFG ?= 1\nexport DELAY_STREAM_OPEN ?= 0\nexport KEEP_SAME_LATENCY ?= 1\nexport HW_FIR_DSD_PROCESS ?= 1\nifeq ($(HW_FIR_DSD_PROCESS),1)\nifeq ($(CHIP),best2300)\nexport HW_FIR_DSD_BUF_MID_ADDR ?= 0x200A0000\nexport DATA_BUF_START ?= 0x20040000\nendif\nendif\nexport USB_AUDIO_UAC2 ?= 1\nexport USB_HIGH_SPEED ?= 1\nKBUILD_CPPFLAGS += \\\n -DHW_FIR_DSD_BUF_MID_ADDR=$(HW_FIR_DSD_BUF_MID_ADDR) \\\n -DDATA_BUF_START=$(DATA_BUF_START)\nendif\n\nUSE_THIRDPARTY ?= 0\nexport USE_KNOWLES ?= 0\n\nifeq ($(CURRENT_TEST),1)\nexport VCODEC_VOLT ?= 1.6V\nexport VANA_VOLT ?= 1.35V\nelse\nexport VCODEC_VOLT ?= 1.8V\nexport VANA_VOLT ?= 1.35V\nendif\n\nexport LAURENT_ALGORITHM ?= 0\n\nexport TX_IQ_CAL ?= 0\n\nexport BT_XTAL_SYNC ?= 1\n\nexport BTADDR_FOR_DEBUG ?= 1\n\nexport POWERKEY_I2C_SWITCH ?=0\n\nexport WL_DET ?= 0\n\nexport AUDIO_LOOPBACK ?= 0\n\nAUTO_TEST ?= 0\n\nBES_AUTOMATE_TEST ?= 0\n\nexport DUMP_NORMAL_LOG ?= 0\n\nSUPPORT_BATTERY_REPORT ?= 1\n\nSUPPORT_HF_INDICATORS ?= 0\n\nSUPPORT_SIRI ?= 1\n\nBES_AUDIO_DEV_Main_Board_9v0 ?= 0\n\nAPP_USE_LED_INDICATE_IBRT_STATUS ?= 0\n\nexport BT_EXT_LNA_PA ?=0\nexport BT_EXT_LNA ?=0\nexport BT_EXT_PA ?=0\n\nifeq ($(A2DP_LHDC_ON),1)\nAUDIO_BUFFER_SIZE := 140*1024\nelse\nAUDIO_BUFFER_SIZE := 100*1024\nendif\n\nexport TRACE_BUF_SIZE := 16*1024\nexport TRACE_BAUD_RATE := 921600\n\ninit-y :=\ncore-y := platform/ services/ apps/ utils/cqueue/ utils/list/ services/multimedia/ utils/intersyshci/\n\nKBUILD_CPPFLAGS += \\\n -Iplatform/cmsis/inc \\\n -Iservices/audioflinger \\\n -Iplatform/hal \\\n -Iservices/fs/ \\\n -Iservices/fs/sd \\\n -Iservices/fs/fat \\\n -Iservices/fs/fat/ChaN\n\nKBUILD_CPPFLAGS += \\\n -DAPP_AUDIO_BUFFER_SIZE=$(AUDIO_BUFFER_SIZE) \\\n -DCHARGER_PLUGINOUT_RESET=1 \\\n -D__APP_KEY_FN_STYLE_A__\n\nifeq ($(APP_ANC_KEY),1)\nKBUILD_CPPFLAGS += -D__BT_ANC_KEY__\nendif\n\nifeq ($(BES_AUDIO_DEV_Main_Board_9v0),1)\nKBUILD_CPPFLAGS += -DBES_AUDIO_DEV_Main_Board_9v0\nendif\n\nifeq ($(TPORTS_KEY_COEXIST),1)\nKBUILD_CPPFLAGS += -DTPORTS_KEY_COEXIST\nendif\n\n#-DIBRT_LINK_LOWLAYER_MONITOR\n\n#-D_AUTO_SWITCH_POWER_MODE__\n#-D__APP_KEY_FN_STYLE_A__\n#-D__APP_KEY_FN_STYLE_B__\n#-D__EARPHONE_STAY_BOTH_SCAN__\n#-D__POWERKEY_CTRL_ONOFF_ONLY__\n#-DAUDIO_LINEIN\n\nifeq ($(CURRENT_TEST),1)\nINTSRAM_RUN ?= 1\nendif\nifeq ($(INTSRAM_RUN),1)\nLDS_FILE := best1000_intsram.lds\nelse\nLDS_FILE := best1000.lds\nendif\n\nifeq ($(GATT_OVER_BR_EDR),1)\nexport GATT_OVER_BR_EDR ?= 1\nKBUILD_CPPFLAGS += -D__GATT_OVER_BR_EDR__\nendif\n\nifeq ($(TOTA),1)\nifeq ($(BLE),1)\nKBUILD_CPPFLAGS += -DBLE_TOTA_ENABLED\nendif\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nKBUILD_CPPFLAGS += -DTEST_OVER_THE_AIR_ENANBLED\nexport TEST_OVER_THE_AIR ?= 1\nendif\n\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nifneq ($(A2DP_DECODER_VER), )\nKBUILD_CPPFLAGS += -DA2DP_DECODER_VER=$(A2DP_DECODER_VER)\nendif\n\nKBUILD_CPPFLAGS += \\\n # -DHAL_TRACE_RX_ENABLE\n\nKBUILD_CFLAGS +=\n\nLIB_LDFLAGS += -lstdc++ -lsupc++\n\nexport BTIF_HID_DEVICE ?= 1\nifeq ($(BTIF_HID_DEVICE),1)\nKBUILD_CPPFLAGS += -DBTIF_HID_DEVICE\nendif\n\n#CFLAGS_IMAGE += -u _printf_float -u _scanf_float\n\n#LDFLAGS_IMAGE += --wrap main\n" }, { "path": "config/bak_open/tgt_hardware.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"tgt_hardware.h\"\n#include \"drc.h\"\n#include \"fir_process.h\"\n#include \"iir_process.h\"\n#include \"limiter.h\"\n#include \"spectrum_fix.h\"\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM] = {\n#if (CFG_HW_PLW_NUM > 0)\n {HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n#endif\n};\n\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3] = {\n {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n};\n#endif\n\n#ifdef __KNOWLES\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2] = {\n {HAL_IOMUX_PIN_P2_2, HAL_IOMUX_FUNC_UART2_RX, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL},\n {HAL_IOMUX_PIN_P2_3, HAL_IOMUX_FUNC_UART2_TX, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL},\n};\n#endif\n\n// adckey define\nconst uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER] = {\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n HAL_KEY_CODE_FN9, HAL_KEY_CODE_FN8, HAL_KEY_CODE_FN7,\n HAL_KEY_CODE_FN6, HAL_KEY_CODE_FN5, HAL_KEY_CODE_FN4,\n HAL_KEY_CODE_FN3, HAL_KEY_CODE_FN2, HAL_KEY_CODE_FN1,\n#endif\n};\n\n// gpiokey define\n#define CFG_HW_GPIOKEY_DOWN_LEVEL (0)\n#define CFG_HW_GPIOKEY_UP_LEVEL (1)\nconst struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {\n /*\n #if (CFG_HW_GPIOKEY_NUM > 0)\n #ifdef BES_AUDIO_DEV_Main_Board_9v0\n {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN4,{HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n //{HAL_KEY_CODE_FN5,{HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN6,{HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else #ifndef\n TPORTS_KEY_COEXIST {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3,\n HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}}, {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P1_0,\n HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else\n {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif\n #ifdef IS_MULTI_AI_ENABLED\n //{HAL_KEY_CODE_FN13,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n //{HAL_KEY_CODE_FN14,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif\n */\n {HAL_KEY_CODE_FN1,\n {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n};\n\n// bt config\n// const char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) \"\\0\";\nconst char *BT_LOCAL_NAME = \"PineBuds Pro\";\nconst char *BLE_DEFAULT_NAME = \"BES_BLE\";\nuint8_t ble_addr[6] = {\n#ifdef BLE_DEV_ADDR\n BLE_DEV_ADDR\n#else\n 0xBE, 0x99, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\nuint8_t bt_addr[6] = {\n#ifdef BT_DEV_ADDR\n BT_DEV_ADDR\n#else\n 0x1e, 0x57, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\n\n// audio config\n// freq bands range {[0k:2.5K], [2.5k:5K], [5k:7.5K], [7.5K:10K], [10K:12.5K],\n// [12.5K:15K], [15K:17.5K], [17.5K:20K]} gain range -12~+12\nconst int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS] = {\n 0, 0, 0, 0, 0, 0, 0, 0};\n\n#define TX_PA_GAIN CODEC_TX_PA_GAIN_DEFAULT\n\nconst struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -99},\n {TX_PA_GAIN, 0x03, -45}, {TX_PA_GAIN, 0x03, -42},\n {TX_PA_GAIN, 0x03, -39}, {TX_PA_GAIN, 0x03, -36},\n {TX_PA_GAIN, 0x03, -33}, {TX_PA_GAIN, 0x03, -30},\n {TX_PA_GAIN, 0x03, -27}, {TX_PA_GAIN, 0x03, -24},\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -18},\n {TX_PA_GAIN, 0x03, -15}, {TX_PA_GAIN, 0x03, -12},\n {TX_PA_GAIN, 0x03, -9}, {TX_PA_GAIN, 0x03, -6},\n {TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm\n};\n\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC2 | \\\n AUD_VMIC_MAP_VMIC3)\n#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 3\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH4 | \\\n AUD_VMIC_MAP_VMIC1)\n#else\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)\n#endif\n\n#define CFG_HW_AUD_INPUT_PATH_LINEIN_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)\n#ifdef VOICE_DETECTOR_EN\n#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)\n#else\n#define CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)\n#endif\n\nconst struct AUD_IO_PATH_CFG_T\n cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {\n#if defined(SPEECH_TX_AEC_CODEC_REF)\n // NOTE: If enable Ch5 and CH6, need to add channel_num when setup\n // audioflinger stream\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV | AUD_CHANNEL_MAP_CH4,\n },\n#else\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n#endif\n {\n AUD_INPUT_PATH_LINEIN,\n CFG_HW_AUD_INPUT_PATH_LINEIN_DEV,\n },\n#ifdef VOICE_DETECTOR_EN\n {\n AUD_INPUT_PATH_VADMIC,\n CFG_HW_AUD_INPUT_PATH_VADMIC_DEV,\n },\n#else\n {\n AUD_INPUT_PATH_ASRMIC,\n CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV,\n },\n#endif\n};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg = {\n HAL_IOMUX_PIN_P1_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg =\n {HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\n/*\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT ={\n HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\nHAL_IOMUX_PIN_PULLUP_ENABLE\n};\n*/\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA = {\n HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL = {\n HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst IIR_CFG_T audio_eq_sw_iir_cfg = {\n .gain0 = 0,\n .gain1 = 0,\n .num = 5,\n .param = {{IIR_TYPE_PEAK, .0, 200, 2},\n {IIR_TYPE_PEAK, .0, 600, 2},\n {IIR_TYPE_PEAK, .0, 2000.0, 2},\n {IIR_TYPE_PEAK, .0, 6000.0, 2},\n {IIR_TYPE_PEAK, .0, 12000.0, 2}}};\n\nconst IIR_CFG_T *const audio_eq_sw_iir_cfg_list[EQ_SW_IIR_LIST_NUM] = {\n &audio_eq_sw_iir_cfg,\n};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_44p1k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_48k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_96k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T *const audio_eq_hw_fir_cfg_list[EQ_HW_FIR_LIST_NUM] = {\n &audio_eq_hw_fir_cfg_44p1k,\n &audio_eq_hw_fir_cfg_48k,\n &audio_eq_hw_fir_cfg_96k,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_dac_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 8,\n .param = {\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_dac_iir_cfg_list[EQ_HW_DAC_IIR_LIST_NUM] = {\n &audio_eq_hw_dac_iir_cfg,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_adc_iir_adc_cfg = {\n .gain0 = 0,\n .gain1 = 0,\n .num = 1,\n .param = {\n {IIR_TYPE_PEAK, 0.0, 1000.0, 0.7},\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_adc_iir_cfg_list[EQ_HW_ADC_IIR_LIST_NUM] = {\n &audio_eq_hw_adc_iir_adc_cfg,\n};\n\n// hardware iir eq\nconst IIR_CFG_T audio_eq_hw_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 8,\n .param = {\n {IIR_TYPE_PEAK, -10.1, 100.0, 7},\n {IIR_TYPE_PEAK, -10.1, 400.0, 7},\n {IIR_TYPE_PEAK, -10.1, 700.0, 7},\n {IIR_TYPE_PEAK, -10.1, 1000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 3000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 5000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 7000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 9000.0, 7},\n\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_iir_cfg_list[EQ_HW_IIR_LIST_NUM] = {\n &audio_eq_hw_iir_cfg,\n};\n\nconst DrcConfig audio_drc_cfg = {.knee = 3,\n .filter_type = {14, -1},\n .band_num = 2,\n .look_ahead_time = 10,\n .band_settings = {\n {-20, 0, 2, 3, 3000, 1},\n {-20, 0, 2, 3, 3000, 1},\n }};\n\nconst LimiterConfig audio_drc2_cfg = {\n .knee = 2,\n .look_ahead_time = 10,\n .threshold = -20,\n .makeup_gain = 19,\n .ratio = 1000,\n .attack_time = 3,\n .release_time = 3000,\n};\n\nconst SpectrumFixConfig audio_spectrum_cfg = {\n .freq_num = 9,\n .freq_list = {200, 400, 600, 800, 1000, 1200, 1400, 1600, 1800},\n};\n" }, { "path": "config/bak_open/tgt_hardware.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __TGT_HARDWARE__\n#define __TGT_HARDWARE__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_iomux.h\"\n#include \"hal_gpio.h\"\n#include \"hal_key.h\"\n#include \"hal_aud.h\"\n\n//config hwardware codec iir.\n#define EQ_HW_DAC_IIR_LIST_NUM 1\n#define EQ_HW_ADC_IIR_LIST_NUM 1\n#define EQ_HW_IIR_LIST_NUM 1\n#define EQ_SW_IIR_LIST_NUM 1\n#define EQ_HW_FIR_LIST_NUM 3\n\n//pwl\n\n#ifdef __BT_DEBUG_TPORTS__\n#define CFG_HW_PLW_NUM (0)\n#else\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\n#define CFG_HW_PLW_NUM (0)\n#else\n#define CFG_HW_PLW_NUM (2)\n#endif\n#endif\n\t\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM];\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\t\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3];\n#endif\n\n#ifdef __KNOWLES\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2];\n#endif\n\n//adckey define\n#define CFG_HW_ADCKEY_NUMBER 0\n#define CFG_HW_ADCKEY_BASE 0\n#define CFG_HW_ADCKEY_ADC_MAXVOLT 1000\n#define CFG_HW_ADCKEY_ADC_MINVOLT 0\n#define CFG_HW_ADCKEY_ADC_KEYVOLT_BASE 130\nextern const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER];\n\n#define BTA_AV_CO_SBC_MAX_BITPOOL 52\n\n#ifdef __BT_DEBUG_TPORTS__\n#ifdef TPORTS_KEY_COEXIST\n#define CFG_HW_GPIOKEY_NUM (2)\n#else\n#define CFG_HW_GPIOKEY_NUM (0)\n#endif\n#else\n//gpiokey define\n#ifdef IS_MULTI_AI_ENABLED\n#define CFG_HW_GPIOKEY_NUM (3)\n#elif BES_AUDIO_DEV_Main_Board_9v0\n#define CFG_HW_GPIOKEY_NUM (6)\n#else\n#define CFG_HW_GPIOKEY_NUM (1)\n#endif\n#endif\n\nextern const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM];\n\n// ANC function key\n#define ANC_FUNCTION_KEY HAL_KEY_CODE_PWR\n\n// ANC coefficient curve number\n#define ANC_COEF_NUM (1)\n\n//#define ANC_TALK_THROUGH\n\n#ifdef ANC_TALK_THROUGH\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM + 1)\n#else\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM)\n#endif\n\n#define ANC_FF_MIC_CH_L AUD_CHANNEL_MAP_CH0\n#define ANC_FF_MIC_CH_R AUD_CHANNEL_MAP_CH1\n#define ANC_FB_MIC_CH_L AUD_CHANNEL_MAP_CH2\n#define ANC_FB_MIC_CH_R AUD_CHANNEL_MAP_CH3\n\n// audio codec\n#define CFG_HW_AUD_INPUT_PATH_NUM 3\nextern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM];\n\n#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0)\n\n#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH0)\n#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)\n\n//bt config\nextern const char *BT_LOCAL_NAME;\nextern const char *BLE_DEFAULT_NAME;\nextern uint8_t ble_addr[6];\nextern uint8_t bt_addr[6];\n\n#define CODEC_SADC_VOL (12)\n\nextern const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY];\n\n//range -12~+12\n#define CFG_HW_AUD_EQ_NUM_BANDS (8)\nextern const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS];\n#define CFG_AUD_EQ_IIR_NUM_BANDS (4)\n\n//battery info\n#define APP_BATTERY_MIN_MV (3200)\n#define APP_BATTERY_PD_MV (3100)\n\n#define APP_BATTERY_MAX_MV (4200)\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg;\n\n//extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT;\n\t\nextern bool tgt_tws_get_channel_is_right(void);\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL;\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "config/best2300p_ibrt/target.mk", "content": "CHIP ?= best2300p\n\nDEBUG ?= 1\n\nMBED ?= 0\n\nRTOS ?= 1\n\n#KERNEL ?= FREERTOS\n\n\nLIBC_ROM ?= 1\n\nexport USER_SECURE_BOOT\t?= 0\n# enable:1\n# disable:0\n\nWATCHER_DOG ?= 1\n\nDEBUG_PORT ?= 1\n# 0: usb\n# 1: uart0\n# 2: uart1\n\nFLASH_CHIP\t?= ALL\n# GD25Q80C\n# GD25Q32C\n# ALL\n\nexport NO_TRACE_TIME_STAMP ?=1\n\nexport FORCE_SIGNALINGMODE ?= 0\n\nexport FORCE_NOSIGNALINGMODE ?= 0\n\nexport FORCE_SCO_MAX_RETX ?= 0\n\nexport FA_RX_GAIN_CTRL ?= 1\n\nexport BT_FA_ECC ?= 0\n\nexport CONTROLLER_DUMP_ENABLE ?= 0\n\nexport CONTROLLER_MEM_LOG_ENABLE ?= 0\n\nexport INTERSYS_DEBUG ?= 1\n\nexport PROFILE_DEBUG ?= 0\n\nexport BTDUMP_ENABLE ?= 0\n\nexport BT_DEBUG_TPORTS ?= 0\n\nTPORTS_KEY_COEXIST ?= 0\n\nexport SNIFF_MODE_CHECK ?= 0\n\nAUDIO_OUTPUT_MONO ?= 0\n\nAUDIO_OUTPUT_DIFF ?= 0\n\nHW_FIR_EQ_PROCESS ?= 0\n\nSW_IIR_EQ_PROCESS ?= 0\n\nHW_DAC_IIR_EQ_PROCESS ?= 1\n\nHW_IIR_EQ_PROCESS ?= 0\n\nHW_DC_FILTER_WITH_IIR ?= 0\n\nAUDIO_DRC ?= 0\n\nAUDIO_DRC2 ?= 0\n\nPC_CMD_UART ?= 0\n\nAUDIO_SECTION_ENABLE ?= 0\n\nAUDIO_RESAMPLE ?= 1\n\nRESAMPLE_ANY_SAMPLE_RATE ?= 1\n\nOSC_26M_X4_AUD2BB ?= 1\n\nAUDIO_OUTPUT_VOLUME_DEFAULT ?= 12\n# range:1~16\n\nAUDIO_INPUT_CAPLESSMODE ?= 0\n\nAUDIO_INPUT_LARGEGAIN ?= 0\n\nAUDIO_CODEC_ASYNC_CLOSE ?= 0\n\nAUDIO_SCO_BTPCM_CHANNEL ?= 1\n\nexport A2DP_CP_ACCEL ?= 1\n\nexport SCO_CP_ACCEL ?= 1\n\nexport SCO_TRACE_CP_ACCEL ?= 0\n\n# For TWS SCO DMA snapshot and low delay\nexport PCM_FAST_MODE ?= 1\n\nexport CVSD_BYPASS ?= 1\n\nexport LOW_DELAY_SCO ?= 0\n\nSPEECH_TX_DC_FILTER ?= 1\n\nSPEECH_TX_AEC2FLOAT ?= 1\n\nSPEECH_TX_NS3 ?= 0\n\nSPEECH_TX_2MIC_NS2 ?= 0\n\nSPEECH_TX_COMPEXP ?= 1\n\nSPEECH_TX_EQ ?= 0\n\nSPEECH_TX_POST_GAIN ?= 0\n\nSPEECH_RX_NS2FLOAT ?= 0\n\nSPEECH_RX_EQ ?= 0\n\nSPEECH_RX_POST_GAIN ?= 0\n\nLARGE_RAM ?= 1\n\nHSP_ENABLE ?= 0\n\nHFP_1_6_ENABLE ?= 1\n\nMSBC_PLC_ENABLE ?= 1\n\nMSBC_PLC_ENCODER ?= 1\n\nMSBC_16K_SAMPLE_RATE ?= 1\n\nSBC_FUNC_IN_ROM ?= 0\n\nROM_UTILS_ON ?= 0\n\nAPP_LINEIN_A2DP_SOURCE ?= 0\n\nAPP_I2S_A2DP_SOURCE ?= 0\n\nVOICE_PROMPT ?= 1\n\nexport THROUGH_PUT ?= 0\n\n#### Google related feature ####\n# the overall google service switch\n# currently, google service includes BISTO and GFPS\nexport GOOGLE_SERVICE_ENABLE ?= 0\n\n# BISTO is a GVA service on Bluetooth audio device\n# BISTO is an isolated service relative to GFPS\nexport BISTO_ENABLE ?= 0\n\n# macro switch for reduced_guesture\nexport REDUCED_GUESTURE_ENABLE ?= 0\n\n# GSOUND_HOTWORD is a hotword library running on Bluetooth audio device\n# GSOUND_HOTWORD is a subset of BISTO\nexport GSOUND_HOTWORD_ENABLE ?= 0\n\n# this is a subset choice for gsound hotword\nexport GSOUND_HOTWORD_EXTERNAL ?= 0\n\n# GFPS is google fastpair service\n# GFPS is an isolated service relative to BISTO\nexport GFPS_ENABLE ?= 0\n#### Google related feature ####\n\nBLE ?= 0\n\nTOTA ?= 0\n\nGATT_OVER_BR_EDR ?= 0\n\nOTA_ENABLE ?= 1\n\nTILE_DATAPATH_ENABLED ?= 0\n\nCUSTOM_INFORMATION_TILE_ENABLE ?= 0\n\nINTERCONNECTION ?= 0\n\nINTERACTION ?= 0\n\nINTERACTION_FASTPAIR ?= 0\n\nBT_ONE_BRING_TWO ?= 0\n\nDSD_SUPPORT ?= 0\n\nA2DP_EQ_24BIT ?= 1\n\nA2DP_AAC_ON ?= 1\n\nA2DP_SCALABLE_ON ?= 0\n\nA2DP_LHDC_ON ?= 0\nifeq ($(A2DP_LHDC_ON),1)\nA2DP_LHDC_V3 ?= 1\nA2DP_LHDC_LARC ?= 1\nexport FLASH_UNIQUE_ID ?= 1\nendif\n\nA2DP_LDAC_ON ?= 0\n\nexport TX_RX_PCM_MASK ?= 0\n\nA2DP_SCALABLE_ON ?= 0\n\nFACTORY_MODE ?= 1\n\nENGINEER_MODE ?= 1\n\nULTRA_LOW_POWER\t?= 1\n\nDAC_CLASSG_ENABLE ?= 1\n\nNO_SLEEP ?= 0\n\nCORE_DUMP ?= 1\n\nCORE_DUMP_TO_FLASH ?= 0\n\nENHANCED_STACK ?= 1\n\nexport SYNC_BT_CTLR_PROFILE ?= 0\n\nexport A2DP_AVDTP_CP ?= 0\n\nexport A2DP_DECODER_VER := 2\n\nexport IBRT ?= 1\n\nexport IBRT_SEARCH_UI ?= 1\n\nexport BES_AUD ?= 1\n\nexport POWER_MODE ?= DIG_DCDC\n\nexport BT_RF_PREFER ?= 2M\n\nexport SPEECH_CODEC ?= 1\n\nexport TWS_PROMPT_SYNC ?= 0\nexport MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED ?= 0\nexport IOS_MFI ?= 0\n\nexport FLASH_SIZE ?= 0x400000\nexport FLASH_SUSPEND ?= 1\n\nifeq ($(DSD_SUPPORT),1)\nexport BTUSB_AUDIO_MODE ?= 1\nexport AUDIO_INPUT_MONO ?= 1\nexport USB_ISO ?= 1\nexport USB_AUDIO_DYN_CFG ?= 1\nexport DELAY_STREAM_OPEN ?= 0\nexport KEEP_SAME_LATENCY ?= 1\nexport HW_FIR_DSD_PROCESS ?= 1\nifeq ($(HW_FIR_DSD_PROCESS),1)\nifeq ($(CHIP),best2300)\nexport HW_FIR_DSD_BUF_MID_ADDR ?= 0x200A0000\nexport DATA_BUF_START ?= 0x20040000\nendif\nendif\nexport USB_AUDIO_UAC2 ?= 1\nexport USB_HIGH_SPEED ?= 1\nKBUILD_CPPFLAGS += \\\n -DHW_FIR_DSD_BUF_MID_ADDR=$(HW_FIR_DSD_BUF_MID_ADDR) \\\n -DDATA_BUF_START=$(DATA_BUF_START)\nendif\n\nUSE_THIRDPARTY ?= 0\nexport USE_KNOWLES ?= 0\n\nifeq ($(CURRENT_TEST),1)\nexport VCODEC_VOLT ?= 1.6V\nexport VANA_VOLT ?= 1.35V\nelse\nexport VCODEC_VOLT ?= 1.8V\nexport VANA_VOLT ?= 1.35V\nendif\n\nexport LAURENT_ALGORITHM ?= 0\n\nexport TX_IQ_CAL ?= 0\n\nexport BT_XTAL_SYNC ?= 1\n\nexport BTADDR_FOR_DEBUG ?= 1\n\nexport POWERKEY_I2C_SWITCH ?=0\n\nAUTO_TEST ?= 0\n\nBES_AUTOMATE_TEST ?= 0\n\nexport DUMP_NORMAL_LOG ?= 0\n\nSUPPORT_BATTERY_REPORT ?= 1\n\nSUPPORT_HF_INDICATORS ?= 0\n\nSUPPORT_SIRI ?= 1\n\nBES_AUDIO_DEV_Main_Board_9v0 ?= 0\n\nAPP_USE_LED_INDICATE_IBRT_STATUS ?= 0\n\nexport BT_EXT_LNA_PA ?=0\nexport BT_EXT_LNA ?=0\nexport BT_EXT_PA ?=0\n\nifeq ($(A2DP_LHDC_ON),1)\nAUDIO_BUFFER_SIZE := 140*1024\nelse\nAUDIO_BUFFER_SIZE := 100*1024\nendif\n\nexport TRACE_BUF_SIZE := 16*1024\nexport TRACE_BAUD_RATE := 10*115200\n\ninit-y :=\ncore-y := platform/ services/ apps/ utils/cqueue/ utils/list/ services/multimedia/ utils/intersyshci/\n\nKBUILD_CPPFLAGS += \\\n -Iplatform/cmsis/inc \\\n -Iservices/audioflinger \\\n -Iplatform/hal \\\n -Iservices/fs/ \\\n -Iservices/fs/sd \\\n -Iservices/fs/fat \\\n -Iservices/fs/fat/ChaN\n\nKBUILD_CPPFLAGS += \\\n -DAPP_AUDIO_BUFFER_SIZE=$(AUDIO_BUFFER_SIZE) \\\n -DCHARGER_PLUGINOUT_RESET=0 \\\n -D__POWERKEY_CTRL_ONOFF_ONLY__\n# -D__A2DP_AVDTP_CP__ \\\n \nifeq ($(BES_AUDIO_DEV_Main_Board_9v0),1)\nKBUILD_CPPFLAGS += -DBES_AUDIO_DEV_Main_Board_9v0\nendif\n\nifeq ($(TPORTS_KEY_COEXIST),1)\nKBUILD_CPPFLAGS += -DTPORTS_KEY_COEXIST\nendif\n\n#-DIBRT_LINK_LOWLAYER_MONITOR\n\n#-D_AUTO_SWITCH_POWER_MODE__\n#-D__APP_KEY_FN_STYLE_A__\n#-D__APP_KEY_FN_STYLE_B__\n#-D__EARPHONE_STAY_BOTH_SCAN__\n#-D__POWERKEY_CTRL_ONOFF_ONLY__\n#-DAUDIO_LINEIN\n\nifeq ($(CURRENT_TEST),1)\nINTSRAM_RUN ?= 1\nendif\nifeq ($(INTSRAM_RUN),1)\nLDS_FILE := best1000_intsram.lds\nelse\nLDS_FILE := best1000.lds\nendif\n\nifeq ($(GATT_OVER_BR_EDR),1)\nexport GATT_OVER_BR_EDR ?= 1\nKBUILD_CPPFLAGS += -D__GATT_OVER_BR_EDR__\nendif\n\nifeq ($(TOTA),1)\nifeq ($(BLE),1)\nKBUILD_CPPFLAGS += -DBLE_TOTA_ENABLED\nendif\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nKBUILD_CPPFLAGS += -DTEST_OVER_THE_AIR_ENANBLED\nexport TEST_OVER_THE_AIR ?= 1\nendif\n\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nifneq ($(A2DP_DECODER_VER), )\nKBUILD_CPPFLAGS += -DA2DP_DECODER_VER=$(A2DP_DECODER_VER)\nendif\n\nKBUILD_CPPFLAGS += \\\n # -DHAL_TRACE_RX_ENABLE\n\nKBUILD_CFLAGS +=\n\nLIB_LDFLAGS += -lstdc++ -lsupc++\n\nexport BTIF_HID_DEVICE ?= 1\nifeq ($(BTIF_HID_DEVICE),1)\nKBUILD_CPPFLAGS += -DBTIF_HID_DEVICE\nendif\n\n#CFLAGS_IMAGE += -u _printf_float -u _scanf_float\n\n#LDFLAGS_IMAGE += --wrap main\n" }, { "path": "config/best2300p_ibrt/tgt_hardware.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"tgt_hardware.h\"\n#include \"drc.h\"\n#include \"fir_process.h\"\n#include \"iir_process.h\"\n#include \"limiter.h\"\n#include \"spectrum_fix.h\"\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM] = {\n#if (CFG_HW_PLW_NUM > 0)\n {HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n#endif\n};\n\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3] = {\n {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n};\n#endif\n\n#ifdef __KNOWLES\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2] = {\n {HAL_IOMUX_PIN_P2_2, HAL_IOMUX_FUNC_UART2_RX, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL},\n {HAL_IOMUX_PIN_P2_3, HAL_IOMUX_FUNC_UART2_TX, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL},\n};\n#endif\n\n// adckey define\nconst uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER] = {\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n HAL_KEY_CODE_FN9, HAL_KEY_CODE_FN8, HAL_KEY_CODE_FN7,\n HAL_KEY_CODE_FN6, HAL_KEY_CODE_FN5, HAL_KEY_CODE_FN4,\n HAL_KEY_CODE_FN3, HAL_KEY_CODE_FN2, HAL_KEY_CODE_FN1,\n#endif\n};\n\n// gpiokey define\n#define CFG_HW_GPIOKEY_DOWN_LEVEL (0)\n#define CFG_HW_GPIOKEY_UP_LEVEL (1)\nconst struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {\n /*\n #if (CFG_HW_GPIOKEY_NUM > 0)\n #ifdef BES_AUDIO_DEV_Main_Board_9v0\n {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN4,{HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n //{HAL_KEY_CODE_FN5,{HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN6,{HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else #ifndef\n TPORTS_KEY_COEXIST {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3,\n HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}}, {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P1_0,\n HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else\n {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif\n #ifdef IS_MULTI_AI_ENABLED\n //{HAL_KEY_CODE_FN13,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n //{HAL_KEY_CODE_FN14,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif\n */\n {HAL_KEY_CODE_FN1,\n {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n};\n\n// bt config\nconst char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) \"\\0\";\nconst char *BLE_DEFAULT_NAME = \"BES_BLE\";\nuint8_t ble_addr[6] = {\n#ifdef BLE_DEV_ADDR\n BLE_DEV_ADDR\n#else\n 0xBE, 0x99, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\nuint8_t bt_addr[6] = {\n#ifdef BT_DEV_ADDR\n BT_DEV_ADDR\n#else\n 0x1e, 0x57, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\n\n// audio config\n// freq bands range {[0k:2.5K], [2.5k:5K], [5k:7.5K], [7.5K:10K], [10K:12.5K],\n// [12.5K:15K], [15K:17.5K], [17.5K:20K]} gain range -12~+12\nconst int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS] = {\n 0, 0, 0, 0, 0, 0, 0, 0};\n\n#define TX_PA_GAIN CODEC_TX_PA_GAIN_DEFAULT\n\nconst struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -99},\n {TX_PA_GAIN, 0x03, -45}, {TX_PA_GAIN, 0x03, -42},\n {TX_PA_GAIN, 0x03, -39}, {TX_PA_GAIN, 0x03, -36},\n {TX_PA_GAIN, 0x03, -33}, {TX_PA_GAIN, 0x03, -30},\n {TX_PA_GAIN, 0x03, -27}, {TX_PA_GAIN, 0x03, -24},\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -18},\n {TX_PA_GAIN, 0x03, -15}, {TX_PA_GAIN, 0x03, -12},\n {TX_PA_GAIN, 0x03, -9}, {TX_PA_GAIN, 0x03, -6},\n {TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm\n};\n\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC2 | \\\n AUD_VMIC_MAP_VMIC3)\n#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 3\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH4 | \\\n AUD_VMIC_MAP_VMIC1)\n#else\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)\n#endif\n\n#define CFG_HW_AUD_INPUT_PATH_LINEIN_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)\n#ifdef VOICE_DETECTOR_EN\n#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)\n#else\n#define CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_VMIC_MAP_VMIC1)\n#endif\n\nconst struct AUD_IO_PATH_CFG_T\n cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {\n#if defined(SPEECH_TX_AEC_CODEC_REF)\n // NOTE: If enable Ch5 and CH6, need to add channel_num when setup\n // audioflinger stream\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV | AUD_CHANNEL_MAP_CH4,\n },\n#else\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n#endif\n {\n AUD_INPUT_PATH_LINEIN,\n CFG_HW_AUD_INPUT_PATH_LINEIN_DEV,\n },\n#ifdef VOICE_DETECTOR_EN\n {\n AUD_INPUT_PATH_VADMIC,\n CFG_HW_AUD_INPUT_PATH_VADMIC_DEV,\n },\n#else\n {\n AUD_INPUT_PATH_ASRMIC,\n CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV,\n },\n#endif\n};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg =\n {HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_tws_channel_cfg = {\n HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE // HAL_IOMUX_PIN_P1_5\n // 500:HAL_IOMUX_PIN_P2_5\n};\n/*\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT ={\n HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\nHAL_IOMUX_PIN_PULLUP_ENABLE\n};\n*/\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA = {\n HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL = {\n HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\nbool tgt_tws_get_channel_is_right(void) {\n#ifdef __FIXED_TWS_EAR_SIDE__\n return TWS_EAR_SIDE_ROLE;\n#else\n return hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)cfg_hw_tws_channel_cfg.pin);\n#endif\n}\n\nconst IIR_CFG_T audio_eq_sw_iir_cfg = {\n .gain0 = 0,\n .gain1 = 0,\n .num = 5,\n .param = {{IIR_TYPE_PEAK, .0, 200, 2},\n {IIR_TYPE_PEAK, .0, 600, 2},\n {IIR_TYPE_PEAK, .0, 2000.0, 2},\n {IIR_TYPE_PEAK, .0, 6000.0, 2},\n {IIR_TYPE_PEAK, .0, 12000.0, 2}}};\n\nconst IIR_CFG_T *const audio_eq_sw_iir_cfg_list[EQ_SW_IIR_LIST_NUM] = {\n &audio_eq_sw_iir_cfg,\n};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_44p1k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_48k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_96k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T *const audio_eq_hw_fir_cfg_list[EQ_HW_FIR_LIST_NUM] = {\n &audio_eq_hw_fir_cfg_44p1k,\n &audio_eq_hw_fir_cfg_48k,\n &audio_eq_hw_fir_cfg_96k,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_dac_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 8,\n .param = {\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_dac_iir_cfg_list[EQ_HW_DAC_IIR_LIST_NUM] = {\n &audio_eq_hw_dac_iir_cfg,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_adc_iir_adc_cfg = {\n .gain0 = 0,\n .gain1 = 0,\n .num = 1,\n .param = {\n {IIR_TYPE_PEAK, 0.0, 1000.0, 0.7},\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_adc_iir_cfg_list[EQ_HW_ADC_IIR_LIST_NUM] = {\n &audio_eq_hw_adc_iir_adc_cfg,\n};\n\n// hardware iir eq\nconst IIR_CFG_T audio_eq_hw_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 8,\n .param = {\n {IIR_TYPE_PEAK, -10.1, 100.0, 7},\n {IIR_TYPE_PEAK, -10.1, 400.0, 7},\n {IIR_TYPE_PEAK, -10.1, 700.0, 7},\n {IIR_TYPE_PEAK, -10.1, 1000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 3000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 5000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 7000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 9000.0, 7},\n\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_iir_cfg_list[EQ_HW_IIR_LIST_NUM] = {\n &audio_eq_hw_iir_cfg,\n};\n\nconst DrcConfig audio_drc_cfg = {.knee = 3,\n .filter_type = {14, -1},\n .band_num = 2,\n .look_ahead_time = 10,\n .band_settings = {\n {-20, 0, 2, 3, 3000, 1},\n {-20, 0, 2, 3, 3000, 1},\n }};\n\nconst LimiterConfig audio_drc2_cfg = {\n .knee = 2,\n .look_ahead_time = 10,\n .threshold = -20,\n .makeup_gain = 19,\n .ratio = 1000,\n .attack_time = 3,\n .release_time = 3000,\n};\n\nconst SpectrumFixConfig audio_spectrum_cfg = {\n .freq_num = 9,\n .freq_list = {200, 400, 600, 800, 1000, 1200, 1400, 1600, 1800},\n};\n" }, { "path": "config/best2300p_ibrt/tgt_hardware.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __TGT_HARDWARE__\n#define __TGT_HARDWARE__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_iomux.h\"\n#include \"hal_gpio.h\"\n#include \"hal_key.h\"\n#include \"hal_aud.h\"\n\n//config hwardware codec iir.\n#define EQ_HW_DAC_IIR_LIST_NUM 1\n#define EQ_HW_ADC_IIR_LIST_NUM 1\n#define EQ_HW_IIR_LIST_NUM 1\n#define EQ_SW_IIR_LIST_NUM 1\n#define EQ_HW_FIR_LIST_NUM 3\n\n//pwl\n\n#ifdef __BT_DEBUG_TPORTS__\n#define CFG_HW_PLW_NUM (0)\n#else\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\n#define CFG_HW_PLW_NUM (0)\n#else\n#define CFG_HW_PLW_NUM (2)\n#endif\n#endif\n\t\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM];\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\t\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3];\n#endif\n\n#ifdef __KNOWLES\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2];\n#endif\n\n//adckey define\n#define CFG_HW_ADCKEY_NUMBER 0\n#define CFG_HW_ADCKEY_BASE 0\n#define CFG_HW_ADCKEY_ADC_MAXVOLT 1000\n#define CFG_HW_ADCKEY_ADC_MINVOLT 0\n#define CFG_HW_ADCKEY_ADC_KEYVOLT_BASE 130\nextern const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER];\n\n#define BTA_AV_CO_SBC_MAX_BITPOOL 52\n\n#ifdef __BT_DEBUG_TPORTS__\n#ifdef TPORTS_KEY_COEXIST\n#define CFG_HW_GPIOKEY_NUM (2)\n#else\n#define CFG_HW_GPIOKEY_NUM (0)\n#endif\n#else\n//gpiokey define\n#ifdef IS_MULTI_AI_ENABLED\n#define CFG_HW_GPIOKEY_NUM (3)\n#elif BES_AUDIO_DEV_Main_Board_9v0\n#define CFG_HW_GPIOKEY_NUM (6)\n#else\n#define CFG_HW_GPIOKEY_NUM (1)\n#endif\n#endif\n\nextern const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM];\n\n// ANC function key\n#define ANC_FUNCTION_KEY HAL_KEY_CODE_PWR\n\n// ANC coefficient curve number\n#define ANC_COEF_NUM (1)\n\n//#define ANC_TALK_THROUGH\n\n#ifdef ANC_TALK_THROUGH\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM + 1)\n#else\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM)\n#endif\n\n#define ANC_FF_MIC_CH_L AUD_CHANNEL_MAP_CH0\n#define ANC_FF_MIC_CH_R AUD_CHANNEL_MAP_CH1\n#define ANC_FB_MIC_CH_L AUD_CHANNEL_MAP_CH2\n#define ANC_FB_MIC_CH_R AUD_CHANNEL_MAP_CH3\n\n// audio codec\n#define CFG_HW_AUD_INPUT_PATH_NUM 3\nextern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM];\n\n#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0)\n\n#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH0)\n#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)\n\n//bt config\nextern const char *BT_LOCAL_NAME;\nextern const char *BLE_DEFAULT_NAME;\nextern uint8_t ble_addr[6];\nextern uint8_t bt_addr[6];\n\n#define CODEC_SADC_VOL (12)\n\nextern const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY];\n\n//range -12~+12\n#define CFG_HW_AUD_EQ_NUM_BANDS (8)\nextern const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS];\n#define CFG_AUD_EQ_IIR_NUM_BANDS (4)\n\n//battery info\n#define APP_BATTERY_MIN_MV (3200)\n#define APP_BATTERY_PD_MV (3100)\n\n#define APP_BATTERY_MAX_MV (4200)\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg;\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP MuteOutPwl;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_tws_channel_cfg;\n//extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT;\n\t\nextern bool tgt_tws_get_channel_is_right(void);\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL;\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "config/best2300p_ibrt_anc/target.mk", "content": "CHIP ?= best2300p\n\nDEBUG ?= 1\n\nMBED ?= 0\n\nRTOS ?= 1\n\n#KERNEL ?= FREERTOS\n\nLIBC_ROM ?= 1\n\nexport USER_SECURE_BOOT\t?= 0\n# enable:1\n# disable:0\n\nWATCHER_DOG ?= 0\n\nDEBUG_PORT ?= 1\n# 0: usb\n# 1: uart0\n# 2: uart1\n\nFLASH_CHIP\t?= ALL\n# GD25Q80C\n# GD25Q32C\n# ALL\n\nexport NO_TRACE_TIME_STAMP ?=1\n\nexport FORCE_SIGNALINGMODE ?= 0\n\nexport FORCE_NOSIGNALINGMODE ?= 0\n\nexport FORCE_SCO_MAX_RETX ?= 0\n\nexport FA_RX_GAIN_CTRL ?= 1\n\nexport BT_FA_ECC ?= 0\nexport CONTROLLER_DUMP_ENABLE ?= 0\nexport CONTROLLER_MEM_LOG_ENABLE ?= 0\n\nexport INTERSYS_DEBUG ?= 1\n\nexport PROFILE_DEBUG ?= 0\n\nexport BTDUMP_ENABLE ?= 0\n\nexport BT_DEBUG_TPORTS ?= 0\n\nTPORTS_KEY_COEXIST ?= 0\n\nexport SNIFF_MODE_CHECK ?= 0\n\nAUDIO_OUTPUT_MONO ?= 0\n\nAUDIO_OUTPUT_DIFF ?= 0\n\n#### ANC DEFINE START ######\nexport ANC_APP\t\t ?= 0\nexport ANC_FF_ENABLED\t?= 0\nexport ANC_FB_ENABLED\t?= 0\nexport AUDIO_ANC_FB_MC ?= 0\nexport AUDIO_SECTION_SUPPT ?= 0\nexport AUD_SECTION_STRUCT_VERSION ?= 2\nexport AUDIO_ANC_FB_MC_HW ?=0\nexport APP_ANC_KEY ?= 0\nexport ANC_FB_CHECK ?= 0\n##### ANC DEFINE END ######\n\nAPP_ANC_TEST ?= 0\n\nTEST_OVER_THE_AIR ?= 0\n\nHW_FIR_EQ_PROCESS ?= 0\n\nSW_IIR_EQ_PROCESS ?= 1\n\nHW_DAC_IIR_EQ_PROCESS ?= 0\n\nHW_IIR_EQ_PROCESS ?= 0\n\nHW_DC_FILTER_WITH_IIR ?= 0\n\nAUDIO_DRC ?= 0\n\nAUDIO_DRC2 ?= 0\n\nPC_CMD_UART ?= 0\n\nAUDIO_SECTION_ENABLE ?= 0\n\nAUDIO_RESAMPLE ?= 1\n\nRESAMPLE_ANY_SAMPLE_RATE ?= 1\n\nOSC_26M_X4_AUD2BB ?= 1\n\nAUDIO_OUTPUT_VOLUME_DEFAULT ?= 17\n# range:1~16\n\nAUDIO_INPUT_CAPLESSMODE ?= 0\n\nAUDIO_INPUT_LARGEGAIN ?= 0\n\nAUDIO_CODEC_ASYNC_CLOSE ?= 0\n\nAUDIO_SCO_BTPCM_CHANNEL ?= 1\n\nexport A2DP_CP_ACCEL ?= 1\n\nexport SCO_CP_ACCEL ?= 1\n\nexport SCO_TRACE_CP_ACCEL ?= 0\n\n# For TWS SCO DMA snapshot and low delay\nexport PCM_FAST_MODE ?= 1\n\nexport CVSD_BYPASS ?= 1\n\nexport LOW_DELAY_SCO ?= 0\n\nSPEECH_TX_DC_FILTER ?= 1\n\nSPEECH_TX_AEC2FLOAT ?= 1\n\nSPEECH_TX_NS3 ?= 0\n\nSPEECH_TX_2MIC_NS2 ?= 0\n\nSPEECH_TX_COMPEXP ?= 1\n\nSPEECH_TX_EQ ?= 0\n\nSPEECH_TX_POST_GAIN ?= 0\n\nSPEECH_RX_NS2FLOAT ?= 0\n\nSPEECH_RX_EQ ?= 0\n\nSPEECH_RX_POST_GAIN ?= 0\n\nLARGE_RAM ?= 1\n\nHSP_ENABLE ?= 0\n\nHFP_1_6_ENABLE ?= 1\n\nBTIF_HID_DEVICE ?= 1\n\nMSBC_PLC_ENABLE ?= 1\n\nMSBC_PLC_ENCODER ?= 1\n\nMSBC_16K_SAMPLE_RATE ?= 1\n\nSBC_FUNC_IN_ROM ?= 0\n\nROM_UTILS_ON ?= 0\n\nAPP_LINEIN_A2DP_SOURCE ?= 0\n\nAPP_I2S_A2DP_SOURCE ?= 0\n\nVOICE_PROMPT ?= 1\n\n#### Google related feature ####\n# the overall google service switch\n# currently, google service includes BISTO and GFPS\nexport GOOGLE_SERVICE_ENABLE ?= 0\n\n# BISTO is a GVA service on Bluetooth audio device\n# BISTO is an isolated service relative to GFPS\nexport BISTO_ENABLE ?= 0\n\n# GSOUND_HOTWORD is a hotword library running on Bluetooth audio device\n# GSOUND_HOTWORD is a subset of BISTO\nexport GSOUND_HOTWORD_ENABLE ?= 0\n\n# GFPS is google fastpair service\n# GFPS is an isolated service relative to BISTO\nexport GFPS_ENABLE ?= 0\n#### Google related feature ####\n\nexport BTIF_HID_DEVICE ?= 1\nifeq ($(BTIF_HID_DEVICE),1)\nKBUILD_CPPFLAGS += -DBTIF_HID_DEVICE\nendif\n\nBLE ?= 0\n\nTOTA ?= 0\n\nOTA_ENABLE ?= 1\n\nTILE_DATAPATH_ENABLED ?= 0\n\nCUSTOM_INFORMATION_TILE_ENABLE ?= 0\n\nINTERCONNECTION ?= 0\n\nINTERACTION ?= 0\n\nINTERACTION_FASTPAIR ?= 0\n\nBT_ONE_BRING_TWO ?= 0\n\nDSD_SUPPORT ?= 0\n\nA2DP_EQ_24BIT ?= 1\n\nA2DP_AAC_ON ?= 1\n\nA2DP_SCALABLE_ON ?= 0\n\nA2DP_LHDC_ON ?= 0\nifeq ($(A2DP_LHDC_ON),1)\nA2DP_LHDC_V3 ?= 1\nA2DP_LHDC_LARC ?= 0\nexport FLASH_UNIQUE_ID ?= 1\nendif\n\nA2DP_LDAC_ON ?= 0\n\nexport TX_RX_PCM_MASK ?= 0\n\nA2DP_SCALABLE_ON ?= 0\n\nFACTORY_MODE ?= 1\n\nENGINEER_MODE ?= 1\n\nULTRA_LOW_POWER\t?= 1\n\nDAC_CLASSG_ENABLE ?= 1\n\nNO_SLEEP ?= 0\n\nCORE_DUMP ?= 1\n\nCORE_DUMP_TO_FLASH ?= 0\n\nENHANCED_STACK ?= 1\n\nexport SYNC_BT_CTLR_PROFILE ?= 0\n\nexport A2DP_DECODER_VER := 2\n\nexport IBRT ?= 1\n\nexport IBRT_SEARCH_UI ?= 1\n\nexport BES_AUD ?= 1\n\nexport POWER_MODE ?= DIG_DCDC\n\nexport BT_RF_PREFER ?= 2M\n\nexport SPEECH_CODEC ?= 1\n\nexport TWS_PROMPT_SYNC ?= 0\nexport MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED ?= 0\n\nexport FLASH_SIZE ?= 0x400000\nexport FLASH_SUSPEND ?= 1\n\nifeq ($(DSD_SUPPORT),1)\nexport BTUSB_AUDIO_MODE ?= 1\nexport AUDIO_INPUT_MONO ?= 1\nexport USB_ISO ?= 1\nexport USB_AUDIO_DYN_CFG ?= 1\nexport DELAY_STREAM_OPEN ?= 0\nexport KEEP_SAME_LATENCY ?= 1\nexport HW_FIR_DSD_PROCESS ?= 1\nifeq ($(HW_FIR_DSD_PROCESS),1)\nifeq ($(CHIP),best2300)\nexport HW_FIR_DSD_BUF_MID_ADDR ?= 0x200A0000\nexport DATA_BUF_START ?= 0x20040000\nendif\nendif\nexport USB_AUDIO_UAC2 ?= 1\nexport USB_HIGH_SPEED ?= 1\nKBUILD_CPPFLAGS += \\\n -DHW_FIR_DSD_BUF_MID_ADDR=$(HW_FIR_DSD_BUF_MID_ADDR) \\\n -DDATA_BUF_START=$(DATA_BUF_START)\nendif\n\nUSE_THIRDPARTY ?= 0\nexport USE_KNOWLES ?= 0\nexport USE_CYBERON ?= 0\n\nifeq ($(CURRENT_TEST),1)\nexport VCODEC_VOLT ?= 1.6V\nexport VANA_VOLT ?= 1.35V\nelse\nendif\n\nexport LAURENT_ALGORITHM ?= 0\n\nexport TX_IQ_CAL ?= 0\n\nexport BT_XTAL_SYNC ?= 1\n\nexport BTADDR_FOR_DEBUG ?= 1\n\nexport POWERKEY_I2C_SWITCH ?=0\n\nAUTO_TEST ?= 0\n\nexport DUMP_NORMAL_LOG ?= 0\n\nSUPPORT_BATTERY_REPORT ?= 1\n\nSUPPORT_HF_INDICATORS ?= 0\n\nSUPPORT_SIRI ?= 1\n\nBES_AUDIO_DEV_Main_Board_9v0 ?= 0\n\nAPP_USE_LED_INDICATE_IBRT_STATUS ?= 0\n\nexport BT_EXT_LNA_PA ?=0\nexport BT_EXT_LNA ?=0\nexport BT_EXT_PA ?=0\n\nifeq ($(A2DP_LHDC_ON),1)\nAUDIO_BUFFER_SIZE := 140*1024\nelse\nAUDIO_BUFFER_SIZE := 100*1024\nendif\n\nexport TRACE_BUF_SIZE := 16*1024\nexport TRACE_BAUD_RATE := 10*115200\n\ninit-y :=\ncore-y := platform/ services/ apps/ utils/cqueue/ utils/list/ services/multimedia/ utils/intersyshci/\n\nKBUILD_CPPFLAGS += -Iplatform/cmsis/inc \\\n -Iservices/audioflinger \\\n -Iplatform/hal \\\n -Iservices/fs/ \\\n -Iservices/fs/sd \\\n -Iservices/fs/fat \\\n -Iservices/fs/fat/ChaN\n\nKBUILD_CPPFLAGS += \\\n -DAPP_AUDIO_BUFFER_SIZE=$(AUDIO_BUFFER_SIZE) \\\n -DCHARGER_PLUGINOUT_RESET=0 \\\n -D__APP_KEY_FN_STYLE_A__\n\nifeq ($(APP_ANC_KEY),1)\nKBUILD_CPPFLAGS += -D__BT_ANC_KEY__\nendif\n\nifeq ($(BES_AUDIO_DEV_Main_Board_9v0),1)\nKBUILD_CPPFLAGS += -DBES_AUDIO_DEV_Main_Board_9v0\nendif\n\nifeq ($(TPORTS_KEY_COEXIST),1)\nKBUILD_CPPFLAGS += -DTPORTS_KEY_COEXIST\nendif\n\n#-DIBRT_LINK_LOWLAYER_MONITOR\n\n#-D_AUTO_SWITCH_POWER_MODE__\n#-D__APP_KEY_FN_STYLE_A__\n#-D__APP_KEY_FN_STYLE_B__\n#-D__EARPHONE_STAY_BOTH_SCAN__\n#-D__POWERKEY_CTRL_ONOFF_ONLY__\n#-DAUDIO_LINEIN\n\nifeq ($(CURRENT_TEST),1)\nINTSRAM_RUN ?= 1\nendif\nifeq ($(INTSRAM_RUN),1)\nLDS_FILE := best1000_intsram.lds\nelse\nLDS_FILE := best1000.lds\nendif\n\nifeq ($(TOTA),1)\nifeq ($(BLE),1)\nKBUILD_CPPFLAGS += -DBLE_TOTA_ENABLED\nendif\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nKBUILD_CPPFLAGS += -DTEST_OVER_THE_AIR_ENANBLED\nexport TEST_OVER_THE_AIR ?= 1\nendif\n\nifneq ($(A2DP_DECODER_VER), )\nKBUILD_CPPFLAGS += -DA2DP_DECODER_VER=$(A2DP_DECODER_VER)\nendif\n\nifeq ($(ANC_APP),1)\nKBUILD_CPPFLAGS += -DANC_APP\nendif\n\nifeq ($(USE_CYBERON),1)\n\nexport THIRDPARTY_LIB ?= cyberon\nKBUILD_CPPFLAGS += -D__CYBERON\n\nexport KWS_IN_RAM := 1\nifeq ($(KWS_IN_RAM),1)\nCPPFLAGS_${LDS_FILE} += -DKWS_IN_RAM\nendif #KWS_IN_RAM\n\nendif #USE_CYBERON\n\nKBUILD_CFLAGS +=\n\nLIB_LDFLAGS += -lstdc++ -lsupc++\n\n#CFLAGS_IMAGE += -u _printf_float -u _scanf_float\n\n#LDFLAGS_IMAGE += --wrap main\n\nexport BTIF_HID_DEVICE ?= 1\nifeq ($(BTIF_HID_DEVICE),1)\nKBUILD_CPPFLAGS += -DBTIF_HID_DEVICE\nendif\n" }, { "path": "config/best2300p_ibrt_anc/tgt_hardware.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"tgt_hardware.h\"\n#include \"aud_section.h\"\n#include \"drc.h\"\n#include \"fir_process.h\"\n#include \"iir_process.h\"\n#include \"limiter.h\"\n#include \"spectrum_fix.h\"\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM] = {\n#if (CFG_HW_PLW_NUM > 0)\n {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_P1_4, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n#endif\n};\n\n// adckey define\nconst uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER] = {\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n HAL_KEY_CODE_FN9, HAL_KEY_CODE_FN8, HAL_KEY_CODE_FN7,\n HAL_KEY_CODE_FN6, HAL_KEY_CODE_FN5, HAL_KEY_CODE_FN4,\n HAL_KEY_CODE_FN3, HAL_KEY_CODE_FN2, HAL_KEY_CODE_FN1,\n#endif\n};\n\n// gpiokey define\n#define CFG_HW_GPIOKEY_DOWN_LEVEL (0)\n#define CFG_HW_GPIOKEY_UP_LEVEL (1)\nconst struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {\n#if (CFG_HW_GPIOKEY_NUM > 0)\n#ifdef BES_AUDIO_DEV_Main_Board_9v0\n {HAL_KEY_CODE_FN1,\n {HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN2,\n {HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN3,\n {HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN4,\n {HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN5,\n {HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN6,\n {HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n#else\n#ifndef TPORTS_KEY_COEXIST\n {HAL_KEY_CODE_FN1,\n {HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN2,\n {HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n // HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,\n {HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n#else\n {HAL_KEY_CODE_FN1,\n {HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,\n {HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n#endif\n#endif\n#ifdef IS_MULTI_AI_ENABLED\n//{HAL_KEY_CODE_FN13,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n// HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n//{HAL_KEY_CODE_FN14,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n// HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n#endif\n#endif\n};\n\n// bt config\nconst char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) \"\\0\";\nconst char *BLE_DEFAULT_NAME = \"BES_BLE\";\nuint8_t ble_addr[6] = {\n#ifdef BLE_DEV_ADDR\n BLE_DEV_ADDR\n#else\n 0xBE, 0x99, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\nuint8_t bt_addr[6] = {\n#ifdef BT_DEV_ADDR\n BT_DEV_ADDR\n#else\n 0x1e, 0x57, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\n\n// audio config\n// freq bands range {[0k:2.5K], [2.5k:5K], [5k:7.5K], [7.5K:10K], [10K:12.5K],\n// [12.5K:15K], [15K:17.5K], [17.5K:20K]} gain range -12~+12\nconst int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS] = {\n 0, 0, 0, 0, 0, 0, 0, 0};\n\n#define TX_PA_GAIN CODEC_TX_PA_GAIN_DEFAULT\n\nconst struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {\n {TX_PA_GAIN, 0x03, -11}, {TX_PA_GAIN, 0x03, -99},\n {TX_PA_GAIN, 0x03, -45}, {TX_PA_GAIN, 0x03, -42},\n {TX_PA_GAIN, 0x03, -39}, {TX_PA_GAIN, 0x03, -36},\n {TX_PA_GAIN, 0x03, -33}, {TX_PA_GAIN, 0x03, -30},\n {TX_PA_GAIN, 0x03, -27}, {TX_PA_GAIN, 0x03, -24},\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -18},\n {TX_PA_GAIN, 0x03, -15}, {TX_PA_GAIN, 0x03, -12},\n {TX_PA_GAIN, 0x03, -9}, {TX_PA_GAIN, 0x03, -6},\n {TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm\n};\n\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_VMIC_MAP_VMIC1)\n#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 3\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH4 | \\\n AUD_VMIC_MAP_VMIC1)\n#else\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_VMIC_MAP_VMIC1)\n#endif\n#define CFG_HW_AUD_INPUT_PATH_LINEIN_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)\n#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)\n#define CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_VMIC_MAP_VMIC1)\n\nconst struct AUD_IO_PATH_CFG_T\n cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {\n#if defined(SPEECH_TX_AEC_CODEC_REF)\n // NOTE: If enable Ch5 and CH6, need to add channel_num when setup\n // audioflinger stream\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV | AUD_CHANNEL_MAP_ECMIC_CH0,\n },\n#else\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n#endif\n {\n AUD_INPUT_PATH_LINEIN,\n CFG_HW_AUD_INPUT_PATH_LINEIN_DEV,\n },\n {\n AUD_INPUT_PATH_VADMIC,\n CFG_HW_AUD_INPUT_PATH_VADMIC_DEV,\n },\n {\n AUD_INPUT_PATH_ASRMIC,\n CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV,\n },\n};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg =\n {HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\n/*\n\n//ff\n\n\nFilter1_B=[ 42462788, -84862242, 42399478];\nFilter1_A=[ 134217728, -268358003, 134140286];\n\nFilter2_B=[ 135905569, -267224817, 131334465];\nFilter2_A=[ 134217728, -267224817, 133022306];\n\nFilter3_B=[ 132936489, -263935268, 131067941];\nFilter3_A=[ 134217728, -263935268, 129786702];\n\nFilter4_B=[ 131758190, -257297054, 126191415];\nFilter4_A=[ 134217728, -257297054, 123731878];\n\n\n\n*/\n\n#define IIR_COUNTER_FF_L (6)\n#define IIR_COUNTER_FF_R (6)\n#define IIR_COUNTER_FB_L (5)\n#define IIR_COUNTER_FB_R (5)\n\nstatic const struct_anc_cfg POSSIBLY_UNUSED\n AncFirCoef_50p7k_mode0 =\n {\n .anc_cfg_ff_l =\n {\n // .total_gain = 440,\n .total_gain = 350,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_L,\n\n .iir_coef[0].coef_b = {42462788, -84862242, 42399478},\n .iir_coef[0].coef_a = {134217728, -268358003, 134140286},\n\n .iir_coef[1].coef_b = {135905569, -267224817, 131334465},\n .iir_coef[1].coef_a = {134217728, -267224817, 133022306},\n\n .iir_coef[2].coef_b = {132936489, -263935268, 131067941},\n .iir_coef[2].coef_a = {134217728, -263935268, 129786702},\n\n .iir_coef[3].coef_b = {131758190, -257297054, 126191415},\n .iir_coef[3].coef_a = {134217728, -257297054, 123731878},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n .anc_cfg_ff_r =\n {\n // .total_gain = 382,\n .total_gain = 350,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_R,\n\n .iir_coef[0].coef_b = {42462788, -84862242, 42399478},\n .iir_coef[0].coef_a = {134217728, -268358003, 134140286},\n\n .iir_coef[1].coef_b = {135905569, -267224817, 131334465},\n .iir_coef[1].coef_a = {134217728, -267224817, 133022306},\n\n .iir_coef[2].coef_b = {132936489, -263935268, 131067941},\n .iir_coef[2].coef_a = {134217728, -263935268, 129786702},\n\n .iir_coef[3].coef_b = {131758190, -257297054, 126191415},\n .iir_coef[3].coef_a = {134217728, -257297054, 123731878},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n\n /*\n\n Filter1_B=[ 27461831, -54408898, 27001841];\n Filter1_A=[ 134217728, -216605724, 82606056];\n\n Filter2_B=[ 138294078, -267600712, 129323227];\n Filter2_A=[ 134217728, -267600712, 133399577];\n\n Filter3_B=[ 134500015, -268177932, 133678688];\n Filter3_A=[ 134217728, -268177932, 133960975];\n\n Filter4_B=[ 133629164, -264794659, 131257050];\n Filter4_A=[ 134217728, -264794659, 130668486];\n\n\n */\n\n .anc_cfg_fb_l =\n {\n .total_gain = 350,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_L,\n\n .iir_coef[0].coef_b = {27461831, -54408898, 27001841},\n .iir_coef[0].coef_a = {134217728, -216605724, 82606056},\n\n .iir_coef[1].coef_b = {138294078, -267600712, 129323227},\n .iir_coef[1].coef_a = {134217728, -267600712, 133399577},\n\n .iir_coef[2].coef_b = {134500015, -268177932, 133678688},\n .iir_coef[2].coef_a = {134217728, -268177932, 133960975},\n\n .iir_coef[3].coef_b = {133629164, -264794659, 131257050},\n .iir_coef[3].coef_a = {134217728, -264794659, 130668486},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n .anc_cfg_fb_r =\n {\n .total_gain = 350,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_R,\n\n .iir_coef[0].coef_b = {27461831, -54408898, 27001841},\n .iir_coef[0].coef_a = {134217728, -216605724, 82606056},\n\n .iir_coef[1].coef_b = {138294078, -267600712, 129323227},\n .iir_coef[1].coef_a = {134217728, -267600712, 133399577},\n\n .iir_coef[2].coef_b = {134500015, -268177932, 133678688},\n .iir_coef[2].coef_a = {134217728, -268177932, 133960975},\n\n .iir_coef[3].coef_b = {133629164, -264794659, 131257050},\n .iir_coef[3].coef_a = {134217728, -264794659, 130668486},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n\n};\n\n/*\n\n//ff\n\n\nFilter1_B=[ 42463913, -84860822, 42396935];\nFilter1_A=[ 134217728, -268353516, 134135801];\n\nFilter2_B=[ 136002894, -267154076, 131168209];\nFilter2_A=[ 134217728, -267154076, 132953376];\n\nFilter3_B=[ 132863566, -263674901, 130888668];\nFilter3_A=[ 134217728, -263674901, 129534506];\n\nFilter4_B=[ 131621817, -256639526, 125746382];\nFilter4_A=[ 134217728, -256639526, 123150471];\n\n\n\n*/\n\nstatic const struct_anc_cfg POSSIBLY_UNUSED\n AncFirCoef_48k_mode0 =\n {\n .anc_cfg_ff_l =\n {\n // .total_gain = 440,\n .total_gain = 312,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_L,\n\n .iir_coef[0].coef_b = {42463913, -84860822, 42396935},\n .iir_coef[0].coef_a = {134217728, -268353516, 134135801},\n\n .iir_coef[1].coef_b = {136002894, -267154076, 131168209},\n .iir_coef[1].coef_a = {134217728, -267154076, 132953376},\n\n .iir_coef[2].coef_b = {132863566, -263674901, 130888668},\n .iir_coef[2].coef_a = {134217728, -263674901, 129534506},\n\n .iir_coef[3].coef_b = {131621817, -256639526, 125746382},\n .iir_coef[3].coef_a = {134217728, -256639526, 123150471},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n .anc_cfg_ff_r =\n {\n // .total_gain = 382,\n .total_gain = 288,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_R,\n\n .iir_coef[0].coef_b = {42463913, -84860822, 42396935},\n .iir_coef[0].coef_a = {134217728, -268353516, 134135801},\n\n .iir_coef[1].coef_b = {136002894, -267154076, 131168209},\n .iir_coef[1].coef_a = {134217728, -267154076, 132953376},\n\n .iir_coef[2].coef_b = {132863566, -263674901, 130888668},\n .iir_coef[2].coef_a = {134217728, -263674901, 129534506},\n\n .iir_coef[3].coef_b = {131621817, -256639526, 125746382},\n .iir_coef[3].coef_a = {134217728, -256639526, 123150471},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n\n /*\n\n Filter1_B=[ 27172676, -53803459, 26691412];\n Filter1_A=[ 134217728, -214195429, 80219070];\n\n Filter2_B=[ 138529480, -267551490, 129040578];\n Filter2_A=[ 134217728, -267551490, 133352330];\n\n Filter3_B=[ 134516353, -268162980, 133647489];\n Filter3_A=[ 134217728, -268162980, 133946114];\n\n Filter4_B=[ 133595549, -264581113, 131087955];\n Filter4_A=[ 134217728, -264581113, 130465777];\n\n\n */\n\n .anc_cfg_fb_l =\n {\n .total_gain = 511,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_L,\n\n .iir_coef[0].coef_b = {27172676, -53803459, 26691412},\n .iir_coef[0].coef_a = {134217728, -214195429, 80219070},\n\n .iir_coef[1].coef_b = {138529480, -267551490, 129040578},\n .iir_coef[1].coef_a = {134217728, -267551490, 133352330},\n\n .iir_coef[2].coef_b = {134516353, -268162980, 133647489},\n .iir_coef[2].coef_a = {134217728, -268162980, 133946114},\n\n .iir_coef[3].coef_b = {133595549, -264581113, 131087955},\n .iir_coef[3].coef_a = {134217728, -264581113, 130465777},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n .anc_cfg_fb_r =\n {\n .total_gain = 511,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_R,\n\n .iir_coef[0].coef_b = {27172676, -53803459, 26691412},\n .iir_coef[0].coef_a = {134217728, -214195429, 80219070},\n\n .iir_coef[1].coef_b = {138529480, -267551490, 129040578},\n .iir_coef[1].coef_a = {134217728, -267551490, 133352330},\n\n .iir_coef[2].coef_b = {134516353, -268162980, 133647489},\n .iir_coef[2].coef_a = {134217728, -268162980, 133946114},\n\n .iir_coef[3].coef_b = {133595549, -264581113, 131087955},\n .iir_coef[3].coef_a = {134217728, -264581113, 130465777},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n\n#if (AUD_SECTION_STRUCT_VERSION == 2)\n\n /*\n 1.0000000000000000,-1.5858874672928407,0.6974239598044429,0.2832267077115959,-0.3117526885614825,0.1400624733614886,\n Filter1_B=[ 4751756, -5230342, 2349858];\n Filter1_A=[ 16777216, -26606777, 11700832];\n\n\n 1.0000000000000000,-1.7971697583202608,0.8159624512785459,0.9540998606028980,-1.7971697583202608,0.8618625906756480,\n Filter2_B=[ 16007139, -30151505, 14459655];\n Filter2_A=[ 16777216, -30151505, 13689578];\n\n\n 1.0000000000000000,-1.9694050640918992,0.9705681145972464,0.3200483744622364,-0.6223829329788905,0.3034976090220014,\n Filter3_B=[ 5369521, -10441853, 5091845];\n Filter3_A=[ 16777216, -33041134, 16283431];\n\n\n 1.0000000000000000,-1.9921619776276678,0.9921812243512138,0.9968660174712476,-1.9921712178765081,0.9953059666311256,\n Filter4_B=[ 16724636, -33423087, 16698463];\n Filter4_A=[ 16777216, -33422932, 16646039];\n */\n\n /*\n\n 1.0000000000000000,-1.9868580074509832,0.9869011854430232,1.1834688902733632,-2.3614075958038656,1.1779451659756268,\n Filter1_B=[ 19855313, -39617845, 19762640];\n Filter1_A=[ 16777216, -33333946, 16557454];\n\n\n 1.0000000000000000,-1.0329261527674278,0.0418392318218667,0.5812322628931170,-1.0329261527674278,0.4606069689287498,\n Filter2_B=[ 9751459, -17329625, 7727703];\n Filter2_A=[ 16777216, -17329625, 701946];\n\n\n 1.0000000000000000,-1.9576081396140492,0.9591185490154677,1.0729914166044796,-1.9576081396140492,0.8861271324109881,\n Filter3_B=[ 18001809, -32843215, 14866746];\n Filter3_A=[ 16777216, -32843215, 16091339];\n\n\n 1.0000000000000000,-1.9197071583239940,0.9219883336398085,0.7545642546264146,-1.4392920140632206,0.6870089347526202,\n Filter4_B=[ 12659487, -24147313, 11526097];\n Filter4_A=[ 16777216, -32207342, 15468397];\n\n\n 1.0000000000000000,-1.9102108535747602,0.9139876710346515,0.9829076121866517,-1.9102108535747602,0.9310800588479999,\n Filter5_B=[ 16490453, -32048020, 15620931];\n Filter5_A=[ 16777216, -32048020, 15334169];\n */\n\n .anc_cfg_mc_l =\n {\n .total_gain = 1228,\n\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n\n .iir_coef[0].coef_b = {19855313, -39617845, 19762640},\n .iir_coef[0].coef_a = {16777216, -33333946, 16557454},\n\n .iir_coef[1].coef_b = {9751459, -17329625, 7727703},\n .iir_coef[1].coef_a = {16777216, -17329625, 701946},\n\n .iir_coef[2].coef_b = {18001809, -32843215, 14866746},\n .iir_coef[2].coef_a = {16777216, -32843215, 16091339},\n\n .iir_coef[3].coef_b = {12659487, -24147313, 11526097},\n .iir_coef[3].coef_a = {16777216, -32207342, 15468397},\n\n .iir_coef[4].coef_b = {16490453, -32048020, 15620931},\n .iir_coef[4].coef_a = {16777216, -32048020, 15334169},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n .anc_cfg_mc_r =\n {\n .total_gain = 1331,\n\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n\n .iir_coef[0].coef_b = {19855313, -39617845, 19762640},\n .iir_coef[0].coef_a = {16777216, -33333946, 16557454},\n\n .iir_coef[1].coef_b = {9751459, -17329625, 7727703},\n .iir_coef[1].coef_a = {16777216, -17329625, 701946},\n\n .iir_coef[2].coef_b = {18001809, -32843215, 14866746},\n .iir_coef[2].coef_a = {16777216, -32843215, 16091339},\n\n .iir_coef[3].coef_b = {12659487, -24147313, 11526097},\n .iir_coef[3].coef_a = {16777216, -32207342, 15468397},\n\n .iir_coef[4].coef_b = {16490453, -32048020, 15620931},\n .iir_coef[4].coef_a = {16777216, -32048020, 15334169},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n#endif\n};\n\n/*\n//ff\n\n\nFilter1_B=[ 42465729, -84858529, 42392831];\nFilter1_A=[ 134217728, -268346271, 134128558];\n\nFilter2_B=[ 136159949, -267039705, 130899919];\nFilter2_A=[ 134217728, -267039705, 132842140];\n\nFilter3_B=[ 132746107, -263254540, 130599907];\nFilter3_A=[ 134217728, -263254540, 129128286];\n\nFilter4_B=[ 131402980, -255575175, 125032243];\nFilter4_A=[ 134217728, -255575175, 122217496];\n\n\n\n*/\n\nstatic const struct_anc_cfg POSSIBLY_UNUSED\n AncFirCoef_44p1k_mode0 =\n {\n .anc_cfg_ff_l =\n {\n // .total_gain = 440,\n .total_gain = 312,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_L,\n\n .iir_coef[0].coef_b = {42465729, -84858529, 42392831},\n .iir_coef[0].coef_a = {134217728, -268346271, 134128558},\n\n .iir_coef[1].coef_b = {136159949, -267039705, 130899919},\n .iir_coef[1].coef_a = {134217728, -267039705, 132842140},\n\n .iir_coef[2].coef_b = {132746107, -263254540, 130599907},\n .iir_coef[2].coef_a = {134217728, -263254540, 129128286},\n\n .iir_coef[3].coef_b = {131402980, -255575175, 125032243},\n .iir_coef[3].coef_a = {134217728, -255575175, 122217496},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n .anc_cfg_ff_r =\n {\n // .total_gain = 382,\n .total_gain = 288,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_R,\n\n .iir_coef[0].coef_b = {42465729, -84858529, 42392831},\n .iir_coef[0].coef_a = {134217728, -268346271, 134128558},\n\n .iir_coef[1].coef_b = {136159949, -267039705, 130899919},\n .iir_coef[1].coef_a = {134217728, -267039705, 132842140},\n\n .iir_coef[2].coef_b = {132746107, -263254540, 130599907},\n .iir_coef[2].coef_a = {134217728, -263254540, 129128286},\n\n .iir_coef[3].coef_b = {131402980, -255575175, 125032243},\n .iir_coef[3].coef_a = {134217728, -255575175, 122217496},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n\n /*\n\n Filter1_B=[ 26719020, -52852829, 26204379];\n Filter1_A=[ 134217728, -210410903, 76474119];\n\n Filter2_B=[ 138909433, -267471808, 128584365];\n Filter2_A=[ 134217728, -267471808, 133276071];\n\n Filter3_B=[ 134542733, -268138827, 133597115];\n Filter3_A=[ 134217728, -268138827, 133922120];\n\n Filter4_B=[ 133541379, -264235686, 130815458];\n Filter4_A=[ 134217728, -264235686, 130139109];\n\n */\n\n .anc_cfg_fb_l =\n {\n .total_gain = 511,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_L,\n\n .iir_coef[0].coef_b = {26719020, -52852829, 26204379},\n .iir_coef[0].coef_a = {134217728, -210410903, 76474119},\n\n .iir_coef[1].coef_b = {138909433, -267471808, 128584365},\n .iir_coef[1].coef_a = {134217728, -267471808, 133276071},\n\n .iir_coef[2].coef_b = {134542733, -268138827, 133597115},\n .iir_coef[2].coef_a = {134217728, -268138827, 133922120},\n\n .iir_coef[3].coef_b = {133541379, -264235686, 130815458},\n .iir_coef[3].coef_a = {134217728, -264235686, 130139109},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n .anc_cfg_fb_r =\n {\n .total_gain = 511,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_R,\n\n .iir_coef[0].coef_b = {26719020, -52852829, 26204379},\n .iir_coef[0].coef_a = {134217728, -210410903, 76474119},\n\n .iir_coef[1].coef_b = {138909433, -267471808, 128584365},\n .iir_coef[1].coef_a = {134217728, -267471808, 133276071},\n\n .iir_coef[2].coef_b = {134542733, -268138827, 133597115},\n .iir_coef[2].coef_a = {134217728, -268138827, 133922120},\n\n .iir_coef[3].coef_b = {133541379, -264235686, 130815458},\n .iir_coef[3].coef_a = {134217728, -264235686, 130139109},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n#if (AUD_SECTION_STRUCT_VERSION == 2)\n\n /*\n\n Filter1_B=[ 19847881, -39594823, 19747071];\n Filter1_A=[ 16777216, -33314517, 16538159];\n\n Filter2_B=[ 9442890, -16603187, 7330251];\n Filter2_A=[ 16777216, -16603187, -4075];\n\n Filter3_B=[ 18107639, -32779315, 14701642];\n Filter3_A=[ 16777216, -32779315, 16032065];\n\n Filter4_B=[ 12666347, -24058210, 11437046];\n Filter4_A=[ 16777216, -32089673, 15357640];\n\n Filter5_B=[ 16466312, -31915122, 15523589];\n Filter5_A=[ 16777216, -31915122, 15212684];\n */\n\n .anc_cfg_mc_l =\n {\n .total_gain = 1228,\n\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n\n .iir_coef[0].coef_b = {19847881, -39594823, 19747071},\n .iir_coef[0].coef_a = {16777216, -33314517, 16538159},\n\n .iir_coef[1].coef_b = {9442890, -16603187, 7330251},\n .iir_coef[1].coef_a = {16777216, -16603187, -4075},\n\n .iir_coef[2].coef_b = {18107639, -32779315, 14701642},\n .iir_coef[2].coef_a = {16777216, -32779315, 16032065},\n\n .iir_coef[3].coef_b = {12666347, -24058210, 11437046},\n .iir_coef[3].coef_a = {16777216, -32089673, 15357640},\n\n .iir_coef[4].coef_b = {16466312, -31915122, 15523589},\n .iir_coef[4].coef_a = {16777216, -31915122, 15212684},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n .anc_cfg_mc_r =\n {\n .total_gain = 1331,\n\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n\n .iir_coef[0].coef_b = {19847881, -39594823, 19747071},\n .iir_coef[0].coef_a = {16777216, -33314517, 16538159},\n\n .iir_coef[1].coef_b = {9442890, -16603187, 7330251},\n .iir_coef[1].coef_a = {16777216, -16603187, -4075},\n\n .iir_coef[2].coef_b = {18107639, -32779315, 14701642},\n .iir_coef[2].coef_a = {16777216, -32779315, 16032065},\n\n .iir_coef[3].coef_b = {12666347, -24058210, 11437046},\n .iir_coef[3].coef_a = {16777216, -32089673, 15357640},\n\n .iir_coef[4].coef_b = {16466312, -31915122, 15523589},\n .iir_coef[4].coef_a = {16777216, -31915122, 15212684},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (0) * 4,\n },\n#endif\n\n};\n\nconst struct_anc_cfg *anc_coef_list_50p7k[ANC_COEF_LIST_NUM] = {\n &AncFirCoef_50p7k_mode0,\n#if (ANC_COEF_LIST_NUM == 2)\n &AncFirCoef_50p7k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 3)\n &AncFirCoef_50p7k_mode0, &AncFirCoef_50p7k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 4)\n &AncFirCoef_50p7k_mode0, &AncFirCoef_50p7k_mode0, &AncFirCoef_50p7k_mode0,\n#endif\n};\n\nconst struct_anc_cfg *anc_coef_list_48k[ANC_COEF_LIST_NUM] = {\n &AncFirCoef_48k_mode0,\n#if (ANC_COEF_LIST_NUM == 2)\n &AncFirCoef_48k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 3)\n &AncFirCoef_48k_mode0, &AncFirCoef_48k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 4)\n &AncFirCoef_48k_mode0, &AncFirCoef_48k_mode0, &AncFirCoef_48k_mode0,\n#endif\n};\n\nconst struct_anc_cfg *anc_coef_list_44p1k[ANC_COEF_LIST_NUM] = {\n &AncFirCoef_44p1k_mode0,\n#if (ANC_COEF_LIST_NUM == 2)\n &AncFirCoef_44p1k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 3)\n &AncFirCoef_44p1k_mode0, &AncFirCoef_44p1k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 4)\n &AncFirCoef_44p1k_mode0, &AncFirCoef_44p1k_mode0, &AncFirCoef_44p1k_mode0,\n#endif\n};\n\nconst IIR_CFG_T audio_eq_sw_iir_cfg = {\n .gain0 = 0,\n .gain1 = 0,\n .num = 5,\n .param = {{IIR_TYPE_PEAK, .0, 200, 2},\n {IIR_TYPE_PEAK, .0, 600, 2},\n {IIR_TYPE_PEAK, .0, 2000.0, 2},\n {IIR_TYPE_PEAK, .0, 6000.0, 2},\n {IIR_TYPE_PEAK, .0, 12000.0, 2}}};\n\nconst IIR_CFG_T *const audio_eq_sw_iir_cfg_list[EQ_SW_IIR_LIST_NUM] = {\n &audio_eq_sw_iir_cfg,\n};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_44p1k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_48k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_96k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T *const audio_eq_hw_fir_cfg_list[EQ_HW_FIR_LIST_NUM] = {\n &audio_eq_hw_fir_cfg_44p1k,\n &audio_eq_hw_fir_cfg_48k,\n &audio_eq_hw_fir_cfg_96k,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_dac_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 8,\n .param = {\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_dac_iir_cfg_list[EQ_HW_DAC_IIR_LIST_NUM] = {\n &audio_eq_hw_dac_iir_cfg,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_adc_iir_adc_cfg = {\n .gain0 = 0,\n .gain1 = 0,\n .num = 1,\n .param = {\n {IIR_TYPE_PEAK, 0.0, 1000.0, 0.7},\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_adc_iir_cfg_list[EQ_HW_ADC_IIR_LIST_NUM] = {\n &audio_eq_hw_adc_iir_adc_cfg,\n};\n\n// hardware iir eq\nconst IIR_CFG_T audio_eq_hw_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 8,\n .param = {\n {IIR_TYPE_PEAK, -10.1, 100.0, 7},\n {IIR_TYPE_PEAK, -10.1, 400.0, 7},\n {IIR_TYPE_PEAK, -10.1, 700.0, 7},\n {IIR_TYPE_PEAK, -10.1, 1000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 3000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 5000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 7000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 9000.0, 7},\n\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_iir_cfg_list[EQ_HW_IIR_LIST_NUM] = {\n &audio_eq_hw_iir_cfg,\n};\n\nconst DrcConfig audio_drc_cfg = {.knee = 3,\n .filter_type = {14, -1},\n .band_num = 2,\n .look_ahead_time = 10,\n .band_settings = {\n {-20, 0, 2, 3, 3000, 1},\n {-20, 0, 2, 3, 3000, 1},\n }};\n\nconst LimiterConfig audio_drc2_cfg = {\n .knee = 2,\n .look_ahead_time = 10,\n .threshold = -20,\n .makeup_gain = 19,\n .ratio = 1000,\n .attack_time = 3,\n .release_time = 3000,\n};\n\nconst SpectrumFixConfig audio_spectrum_cfg = {\n .freq_num = 9,\n .freq_list = {200, 400, 600, 800, 1000, 1200, 1400, 1600, 1800},\n};\n" }, { "path": "config/best2300p_ibrt_anc/tgt_hardware.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __TGT_HARDWARE__\n#define __TGT_HARDWARE__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_iomux.h\"\n#include \"hal_gpio.h\"\n#include \"hal_key.h\"\n#include \"hal_aud.h\"\n\n//config hwardware codec iir.\n#define EQ_HW_DAC_IIR_LIST_NUM 1\n#define EQ_HW_ADC_IIR_LIST_NUM 1\n#define EQ_HW_IIR_LIST_NUM 1\n#define EQ_SW_IIR_LIST_NUM 1\n#define EQ_HW_FIR_LIST_NUM 3\n\n//pwl\n#define CFG_HW_PLW_NUM (2)\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM];\n\n//adckey define\n#define CFG_HW_ADCKEY_NUMBER 0\n#define CFG_HW_ADCKEY_BASE 0\n#define CFG_HW_ADCKEY_ADC_MAXVOLT 1000\n#define CFG_HW_ADCKEY_ADC_MINVOLT 0\n#define CFG_HW_ADCKEY_ADC_KEYVOLT_BASE 130\nextern const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER];\n\n#define BTA_AV_CO_SBC_MAX_BITPOOL 52\n\n//gpiokey define\n#ifdef IS_MULTI_AI_ENABLED\n#define CFG_HW_GPIOKEY_NUM (3)\n#elif BES_AUDIO_DEV_Main_Board_9v0\n#define CFG_HW_GPIOKEY_NUM (6)\n#else\n#define CFG_HW_GPIOKEY_NUM (3)\n#endif\n\n\nextern const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM];\n\n// ANC function key\n#define ANC_FUNCTION_KEY HAL_KEY_CODE_PWR\n\n// ANC coefficient curve number\n#define ANC_COEF_NUM (1)\n\n//#define ANC_TALK_THROUGH\n\n#ifdef ANC_TALK_THROUGH\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM + 1)\n#else\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM)\n#endif\n\n#define ANC_FF_MIC_CH_L AUD_CHANNEL_MAP_CH0\n#define ANC_FF_MIC_CH_R 0\n#define ANC_FB_MIC_CH_L AUD_CHANNEL_MAP_CH2\n#define ANC_FB_MIC_CH_R 0\n\n#define ANC_VMIC_CFG (AUD_VMIC_MAP_VMIC3)\n\n// audio codec\n#define CFG_HW_AUD_INPUT_PATH_NUM 4\nextern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM];\n\n#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0)\n\n#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH0)\n#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)\n\n//bt config\nextern const char *BT_LOCAL_NAME;\nextern const char *BLE_DEFAULT_NAME;\nextern uint8_t ble_addr[6];\nextern uint8_t bt_addr[6];\n\n#define CODEC_SADC_VOL (12)\n\nextern const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY];\n\n//range -12~+12\n#define CFG_HW_AUD_EQ_NUM_BANDS (8)\nextern const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS];\n#define CFG_AUD_EQ_IIR_NUM_BANDS (4)\n\n//battery info\n#define APP_BATTERY_MIN_MV (3200)\n#define APP_BATTERY_PD_MV (3100)\n\n#define APP_BATTERY_MAX_MV (4200)\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "config/common.mk", "content": "\nadd_if_exists = $(foreach d,$(1),$(if $(wildcard $(srctree)/$(d)),$(d) ,))\n\n# -------------------------------------------\n# Macro Default Value\n# -------------------------------------------\n# 1 for IBRT, 0 for stereo\nexport IBRT ?= 0\n\n# 1 to enable BLE, 0 to disable BLE\nexport BLE ?= 0\n\n# 1 to enable BLE security feature, 0 to disable it\nexport BLE_SECURITY_ENABLED ?= 0\n\nexport CTKD_ENABLE ?= 0\n\nexport TILE_DATAPATH_ENABLED ?= 0\n\nexport OTA_ENABLE ?= 0\n\nexport OTA_CODE_OFFSET ?= 0\nexport OTA_UPGRADE_LOG_SIZE ?= 0\nexport OTA_SUPPORT_SLAVE_BIN ?= 0\nexport OTA_BOOT_SIZE ?= 0\n\n# is current system a tws system\n# currently in our SDK, system include relay tws and IBRT\n# of if relay tws or IBRT is enabled, this macro must set to 1\nexport TWS_SYSTEM_ENABLED ?= 0\n\n# ai voice related configuration\nexport VOICE_DATAPATH_ENABLED ?= 0\n\n# Google related feature\nexport GOOGLE_SERVICE_ENABLE ?= 0\nexport BISTO_ENABLE ?= 0\nexport GSOUND_HOTWORD_ENABLE ?= 0\nexport GSOUND_HOTWORD_EXTERNAL ?= 0\nexport GFPS_ENABLE ?= 0\n\n# Amazon related feature\nexport AMA_VOICE ?= 0\n\n# HUAWEI related feature\nexport INTERCONNECTION ?= 0\n\n# ALI related feature\nexport GMA_VOICE ?= 0\n\n# TENCENT related feature\nexport TENCENT_VOICE ?= 0\n\n# BAIDU related feature\nexport DMA_VOICE ?= 0\n\n# BES AI feature\nexport SMART_VOICE ?= 0\n\n# other AI feature\nexport CUSTOMIZE_VOICE ?= 0\n\n# mean to manage all AI features\nexport AI_VOICE ?= 0\n\n# Dual mic recording feature\nexport DUAL_MIC_RECORDING ?= 0\nexport LOWER_BANDWIDTH ?= 0\n\n# 1 to support mutiple AI, 0 to disable this feature\nIS_MULTI_AI_ENABLE ?= 0\n\n# NOTE: This size is 0 by default, used to save the hotword model file\nHOTWORD_SECTION_SIZE ?= 0x0\n\n# NOTE: This size cannot be changed so that audio section address is fixed.\n# This rule can be removed once audio tool can set audio section address dynamically.\nFACTORY_SECTION_SIZE ?= 0x1000\n\n# NOTE: This size cannot be changed so that audio section address is fixed.\n# This rule can be removed once audio tool can set audio section address dynamically.\nRESERVED_SECTION_SIZE ?= 0x1000\n\n# 1 to enable the VAD feature, 0 to disable the VAD feature\nexport VOICE_DETECTOR_EN ?= 0\n\n# 1 to use 8K sample rate for VAD, 0 to use 16K sample rate for VAD\nVAD_USE_8K_SAMPLE_RATE ?= 0\n\n# 1 to enable the blue flashing light when connected, 0 to disable\nCONNECTED_BLUE_LIGHT ?= 0\n\n# -------------------------------------------\n# Root Option Dependencies\n# -------------------------------------------\n# NOTE: the value of AMA_VOICE，DMA_VOICE, SMART_VOICE, TENCENT_VOICE, GMA_VOICE, CUSTOMIZE_VOICE must be confirmed above\nifneq ($(filter 1,$(AMA_VOICE) $(DMA_VOICE) $(SMART_VOICE) $(TENCENT_VOICE) $(GMA_VOICE) $(CUSTOMIZE_VOICE) $(DUAL_MIC_RECORDING)),)\nexport AI_VOICE := 1\nendif\n\nifeq ($(BT_ANC),1)\nexport ANC_APP ?= 1\nendif\n\nexport ANC_ASSIST_ENABLED ?= 0\n\nifeq ($(GOOGLE_SERVICE_ENABLE), 1)\nexport BISTO_ENABLE := 1\nexport GFPS_ENABLE := 1\nKBUILD_CPPFLAGS += -DOS_DYNAMIC_MEM_SIZE=0x6800\nendif\n\nifeq ($(BISTO_ENABLE),1)\nOTA_ENABLE := 1\nexport VOICE_DATAPATH_ENABLED := 1\nexport CRASH_REBOOT ?= 1\n\nexport BLE_SECURITY_ENABLED := 1\n\nifeq ($(CHIP),best1400)\nexport DUMP_CRASH_LOG ?= 0\nelse\nexport DUMP_CRASH_LOG ?= 0\nendif\n\nexport VOICE_DATAPATH_TYPE ?= gsound\n#export TRACE_DUMP2FLASH ?= 1\nexport FLASH_SUSPEND := 1\nexport BLE_ONLY_ENABLED ?= 0\n\nifeq ($(GSOUND_HOTWORD_ENABLE),1)\n# used to store hotword model, currently 240KB\n# this value is used in link file\nHOTWORD_SECTION_SIZE ?= 0x3C000\nendif\nendif # ifeq ($(BISTO_ENABLE),1)\n\nifeq ($(MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED),1)\nAUDIO_OUTPUT_SW_GAIN ?= 1\nendif # ifeq ($(MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED),1)\n\n# NOTE: variable value in BLE_SWITCH must already confirmed above here\nBLE_SWITCH := \\\n $(BISTO_ENABLE) \\\n $(GFPS_ENABLE) \\\n $(AMA_VOICE) \\\n $(DMA_VOICE) \\\n $(GMA_VOICE) \\\n $(SMART_VOICE) \\\n $(TENCENT_VOICE) \\\n\t$(CUSTOMIZE_VOICE) \\\n $(TILE_DATAPATH_ENABLED) \\\n $(BLE_ONLY_ENABLED)\n\nifneq ($(filter 1, $(BLE_SWITCH)),)\nexport BLE := 1\nendif\n\n# NOTE: value of AI_VOICE and BISTO_ENABLE must already confirmed above here\nifeq ($(filter 0,$(AI_VOICE) $(BISTO_ENABLE)),)\nIS_MULTI_AI_ENABLE := 1\nendif\n\nifeq ($(VOICE_PROMPT),1)\nKBUILD_CPPFLAGS += -DMEDIA_PLAYER_SUPPORT\nendif\n\nifeq ($(INTERCONNECTION),1)\nOTA_ENABLE := 1\nendif\n\nifeq ($(GMA_VOICE),1)\nOTA_ENABLE := 1\nendif\n\nifeq ($(IBRT),1)\nTWS_SYSTEM_ENABLED := 1\nendif\n\nMIX_MIC_DURING_MUSIC_ENABLED ?= 0\n\n# make sure the value of GFPS_ENABLE and GMA_VOICE is confirmed above here\nifneq ($(filter 1,$(GFPS_ENABLE) $(GMA_VOICE) $(TOTA)),)\ncore-y += utils/encrypt/\nendif\n\nifneq ($(filter 1,$(TOTA)),)\ncore-y += utils/sha256/\nendif\n\nifneq ($(filter apps/ tests/speech_test/ tests/ota_boot/, $(core-y)),)\nexport BT_APP ?= 1\nFULL_APP_PROJECT ?= 1\nendif\n\nifeq ($(strip $(CONNECTED_BLUE_LIGHT)),0)\nKBUILD_CPPFLAGS += -DDISABLE_CONNECTED_BLUE_LIGHT\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# OTA features\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(OTA_ENABLE),1)\n\nOTA_CODE_OFFSET := 0x18000\n\nOTA_UPGRADE_LOG_SIZE := 0x1000\nOTA_SUPPORT_SLAVE_BIN := 0\n\nKBUILD_CPPFLAGS += -DOTA_ENABLED\nKBUILD_CPPFLAGS += -DBES_OTA_BASIC\n\nKBUILD_CPPFLAGS += -D__APP_IMAGE_FLASH_OFFSET__=$(OTA_CODE_OFFSET)\nKBUILD_CPPFLAGS += -DNEW_IMAGE_FLASH_OFFSET=0x200000\nKBUILD_CPPFLAGS += -DFIRMWARE_REV\n\nifeq ($(IBRT), 1)\nexport FORCE_SCO_MAX_RETX := 0\nKBUILD_CPPFLAGS += -DIBRT_OTA\nendif\nendif\n\n# -------------------------------------------\n# CHIP selection\n# -------------------------------------------\n\nexport CHIP\n\nifneq (,)\nelse ifeq ($(CHIP),best1000)\nKBUILD_CPPFLAGS += -DCHIP_BEST1000\nCPU := m4\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 0\nexport CHIP_HAS_SDMMC := 1\nexport CHIP_HAS_SDIO := 1\nexport CHIP_HAS_PSRAM := 1\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 1\nexport CHIP_HAS_SPIPHY := 0\nexport CHIP_HAS_I2C := 1\nexport CHIP_HAS_UART := 2\nexport CHIP_HAS_DMA := 2\nexport CHIP_HAS_SPDIF := 1\nexport CHIP_HAS_TRANSQ := 0\nexport CHIP_HAS_EXT_PMU := 0\nexport CHIP_HAS_AUDIO_CONST_ROM := 1\nexport CHIP_FLASH_CTRL_VER := 1\nexport CHIP_PSRAM_CTRL_VER := 1\nexport CHIP_SPI_VER := 1\nexport CHIP_HAS_EC_CODEC_REF := 0\nexport CHIP_HAS_SCO_DMA_SNAPSHOT := 0\nexport CHIP_ROM_UTILS_VER := 1\nexport NO_LPU_26M ?= 1\nelse ifeq ($(CHIP),best1400)\nifeq ($(CHIP_SUBTYPE),best1402)\nSUBTYPE_VALID := 1\nKBUILD_CPPFLAGS += -DCHIP_BEST1402\nexport CHIP_FLASH_CTRL_VER := 3\nelse\nKBUILD_CPPFLAGS += -DCHIP_BEST1400\nexport CHIP_FLASH_CTRL_VER := 2\nendif\nCPU := m4\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 0\nexport CHIP_HAS_SDMMC := 0\nexport CHIP_HAS_SDIO := 0\nexport CHIP_HAS_PSRAM := 0\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 0\nexport CHIP_HAS_SPIPHY := 0\nexport CHIP_HAS_I2C := 1\nexport CHIP_HAS_UART := 3\nexport CHIP_HAS_DMA := 1\nexport CHIP_HAS_SPDIF := 0\nexport CHIP_HAS_TRANSQ := 0\nexport CHIP_HAS_EXT_PMU := 0\nexport CHIP_HAS_AUDIO_CONST_ROM := 0\nexport CHIP_SPI_VER := 3\nexport BTDUMP_ENABLE := 1\nexport CHIP_HAS_EC_CODEC_REF := 1\nexport CHIP_HAS_SCO_DMA_SNAPSHOT := 1\nexport CHIP_ROM_UTILS_VER := 1\nexport NO_LPU_26M ?= 1\nelse ifeq ($(CHIP),best2000)\nKBUILD_CPPFLAGS += -DCHIP_BEST2000\nCPU := m4\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 1\nexport CHIP_HAS_SDMMC := 1\nexport CHIP_HAS_SDIO := 1\nexport CHIP_HAS_PSRAM := 1\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 1\nexport CHIP_HAS_SPIPHY := 1\nexport CHIP_HAS_I2C := 1\nexport CHIP_HAS_UART := 3\nexport CHIP_HAS_DMA := 2\nexport CHIP_HAS_SPDIF := 2\nexport CHIP_HAS_TRANSQ := 1\nexport CHIP_HAS_PSC := 1\nexport CHIP_HAS_EXT_PMU := 0\nexport CHIP_HAS_AUDIO_CONST_ROM := 0\nexport CHIP_FLASH_CTRL_VER := 1\nexport CHIP_PSRAM_CTRL_VER := 1\nexport CHIP_SPI_VER := 1\nexport CHIP_HAS_EC_CODEC_REF := 0\nexport CHIP_HAS_SCO_DMA_SNAPSHOT := 0\nexport CHIP_ROM_UTILS_VER := 1\nexport NO_LPU_26M ?= 1\nelse ifeq ($(CHIP),best2001)\nKBUILD_CPPFLAGS += -DCHIP_BEST2001\nifeq ($(CHIP_SUBSYS),dsp)\nKBUILD_CPPFLAGS += -DCHIP_BEST2001_DSP\nCPU := a7\nDSP_ENABLE ?= 1\nelse\nCPU := m33\nexport CHIP_HAS_CP := 1\nendif\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 1\nexport CHIP_HAS_SDMMC := 1\nexport CHIP_HAS_SDIO := 0\nexport CHIP_HAS_PSRAM := 1\nexport CHIP_HAS_PSRAMUHS := 1\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 1\nexport CHIP_HAS_SPIPHY := 1\nexport CHIP_HAS_SPIDPD := 1\nexport CHIP_HAS_I2C := 2\nexport CHIP_HAS_UART := 3\nifeq ($(DSP_ENABLE), 1)\nexport DSP_USE_AUDMA ?= 1\nifeq ($(LARGE_RAM), 1)\n$(error LARGE_RAM conflicts with DSP_ENABLE)\nendif\nendif\nifeq ($(DSP_USE_AUDMA), 1)\nexport CHIP_HAS_DMA := 1\nKBUILD_CPPFLAGS += -DDSP_USE_AUDMA\nelse\nifeq ($(CHIP_SUBSYS),dsp)\nexport CHIP_HAS_DMA := 0\nelse\nexport CHIP_HAS_DMA := 2\nendif\nendif\nexport CHIP_HAS_SPDIF := 1\nexport CHIP_HAS_TRANSQ := 2\nexport CHIP_HAS_TRNG := 1\nexport CHIP_HAS_EXT_PMU := 0\nexport CHIP_HAS_AUDIO_CONST_ROM := 0\nexport CHIP_FLASH_CTRL_VER := 3\nexport CHIP_PSRAM_CTRL_VER := 2\nexport CHIP_SPI_VER := 4\nexport CHIP_CACHE_VER := 2\nexport CHIP_HAS_EC_CODEC_REF := 1\nexport CHIP_HAS_SCO_DMA_SNAPSHOT := 1\nexport CHIP_ROM_UTILS_VER := 1\nexport NO_LPU_26M ?= 1\nexport FLASH_SIZE ?= 0x1000000\nexport OSC_26M_X4_AUD2BB := 0\nexport USB_USE_USBPLL := 1\nexport A7_DSP_SPEED ?= 1100\n#780:780M, 1000:1G, 1100:1.1G\nelse ifeq ($(CHIP),best2300)\nKBUILD_CPPFLAGS += -DCHIP_BEST2300\nCPU := m4\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 1\nexport CHIP_HAS_SDMMC := 1\nexport CHIP_HAS_SDIO := 0\nexport CHIP_HAS_PSRAM := 0\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 1\nexport CHIP_HAS_SPIPHY := 1\nexport CHIP_HAS_I2C := 2\nexport CHIP_HAS_UART := 3\nexport CHIP_HAS_DMA := 2\nexport CHIP_HAS_I2S := 1\nexport CHIP_HAS_SPDIF := 1\nexport CHIP_HAS_TRANSQ := 0\nexport CHIP_HAS_PSC := 1\nexport CHIP_HAS_EXT_PMU := 1\nexport CHIP_HAS_AUDIO_CONST_ROM := 0\nexport CHIP_FLASH_CTRL_VER := 2\nexport CHIP_SPI_VER := 2\nexport CHIP_HAS_EC_CODEC_REF := 0\nexport CHIP_HAS_SCO_DMA_SNAPSHOT := 0\nexport CHIP_ROM_UTILS_VER := 1\nexport NO_LPU_26M ?= 1\nelse ifeq ($(CHIP),best2300a)\nKBUILD_CPPFLAGS += -DCHIP_BEST2300A\nCPU := m33\nLIBC_ROM := 0\nCRC32_ROM := 0\nSHA256_ROM := 0\nexport LIBC_OVERRIDE ?= 1\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 1\nexport CHIP_HAS_SDMMC := 1\nexport CHIP_HAS_SDIO := 0\nexport CHIP_HAS_PSRAM := 0\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 1\nexport CHIP_HAS_SPIPHY := 1\nexport CHIP_HAS_I2C := 3\nexport CHIP_HAS_UART := 3\nexport CHIP_HAS_DMA := 2\nexport CHIP_HAS_I2S := 2\nexport CHIP_HAS_TDM := 2\nexport CHIP_HAS_SPDIF := 1\nexport CHIP_HAS_TRANSQ := 0\nexport CHIP_HAS_PSC := 1\nexport CHIP_HAS_EXT_PMU := 1\nexport CHIP_HAS_CP := 1\nexport CHIP_HAS_AUDIO_CONST_ROM := 0\nexport CHIP_FLASH_CTRL_VER := 3\nexport CHIP_SPI_VER := 4\nexport CHIP_CACHE_VER := 2\nexport CHIP_RAM_BOOT := 1\nexport CHIP_HAS_EC_CODEC_REF := 1\nexport CHIP_HAS_SCO_DMA_SNAPSHOT := 1\nexport CHIP_HAS_HW_SMOOTHING_GAIN := 1\nexport CHIP_ROM_UTILS_VER := 1\nexport NO_LPU_26M ?= 1\nelse ifeq ($(CHIP),best2300p)\nKBUILD_CPPFLAGS += -DCHIP_BEST2300P\nCPU := m4\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 1\nexport CHIP_HAS_SDMMC := 1\nexport CHIP_HAS_SDIO := 0\nexport CHIP_HAS_PSRAM := 0\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 1\nexport CHIP_HAS_SPIPHY := 1\nexport CHIP_HAS_I2C := 2\nexport CHIP_HAS_UART := 3\nexport CHIP_HAS_DMA := 2\nexport CHIP_HAS_I2S := 2\nexport CHIP_HAS_TDM := 2\nexport CHIP_HAS_SPDIF := 1\nexport CHIP_HAS_TRANSQ := 0\nexport CHIP_HAS_PSC := 1\nexport CHIP_HAS_EXT_PMU := 1\nexport CHIP_HAS_CP := 1\nexport CHIP_HAS_AUDIO_CONST_ROM := 0\nexport CHIP_FLASH_CTRL_VER := 2\nexport CHIP_SPI_VER := 3\nexport CHIP_CACHE_VER := 2\nexport CHIP_HAS_EC_CODEC_REF := 1\nexport CHIP_HAS_SCO_DMA_SNAPSHOT := 1\nexport CHIP_ROM_UTILS_VER := 1\nexport NO_LPU_26M ?= 1\nelse ifeq ($(CHIP),best3001)\nifeq ($(CHIP_SUBTYPE),best3005)\nSUBTYPE_VALID := 1\nKBUILD_CPPFLAGS += -DCHIP_BEST3005\nexport CHIP_CACHE_VER := 2\nexport CHIP_FLASH_CTRL_VER := 2\nelse\nKBUILD_CPPFLAGS += -DCHIP_BEST3001\nexport CHIP_FLASH_CTRL_VER := 1\nendif\nCPU := m4\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 1\nexport CHIP_HAS_SDMMC := 0\nexport CHIP_HAS_SDIO := 0\nexport CHIP_HAS_PSRAM := 0\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 0\nexport CHIP_HAS_SPIPHY := 0\nexport CHIP_HAS_I2C := 1\nexport CHIP_HAS_UART := 2\nexport CHIP_HAS_DMA := 1\nexport CHIP_HAS_SPDIF := 1\nexport CHIP_HAS_TRANSQ := 0\nexport CHIP_HAS_EXT_PMU := 0\nexport CHIP_HAS_AUDIO_CONST_ROM := 0\nexport CHIP_SPI_VER := 3\nexport CHIP_HAS_EC_CODEC_REF := 0\nexport CHIP_HAS_SCO_DMA_SNAPSHOT := 0\nexport CHIP_ROM_UTILS_VER := 1\nexport NO_LPU_26M ?= 1\nelse ifeq ($(CHIP),best3003)\nKBUILD_CPPFLAGS += -DCHIP_BEST3003\nCPU := m33\nexport CHIP_HAS_FPU := 1\nexport CHIP_HAS_USB := 1\nexport CHIP_HAS_USBPHY := 1\nexport CHIP_HAS_SDMMC := 0\nexport CHIP_HAS_SDIO := 0\nexport CHIP_HAS_PSRAM := 0\nexport CHIP_HAS_SPI := 1\nexport CHIP_HAS_SPILCD := 0\nexport CHIP_HAS_SPIPHY := 0\nexport CHIP_HAS_I2C := 1\nexport CHIP_HAS_UART := 2\nexport CHIP_HAS_DMA := 2\nexport CHIP_HAS_SPDIF := 1\nexport CHIP_HAS_TRANSQ := 0\nexport CHIP_HAS_EXT_PMU := 0\nexport CHIP_HAS_AUDIO_CONST_ROM := 0\nexport CHIP_CACHE_VER := 2\nexport CHIP_FLASH_CTRL_VER := 2\nexport CHIP_SPI_VER := 4\nexport CHIP_HAS_DCO ?= 1\nexport NO_LPU_26M ?= 1\nelse\n$(error Invalid CHIP: $(CHIP))\nendif\n\nifneq ($(CHIP_SUBTYPE),)\nifneq ($(SUBTYPE_VALID),1)\n$(error Invalid CHIP_SUBTYPE=$(CHIP_SUBTYPE) for CHIP=$(CHIP))\nendif\nexport CHIP_SUBTYPE\nendif\n\nifeq ($(CPU),)\nCPU := m33\nendif\nexport CPU\n\nifneq ($(filter a%,$(CPU)),)\n# Override lds file\nLDS_FILE := armca.lds\n\nifeq ($(GEN_BOOT_SECTION),1)\nCPPFLAGS_${LDS_FILE} += -DGEN_BOOT_SECTION\nendif\n\nifeq ($(EXEC_IN_RAM),1)\nCPPFLAGS_${LDS_FILE} += -DEXEC_IN_RAM\nelse ifeq ($(EXEC_IN_PSRAM),1)\nCPPFLAGS_${LDS_FILE} += -DEXEC_IN_PSRAM\nendif\nendif\n\nexport FLASH_SIZE ?= 0x100000\nifeq ($(CHIP_HAS_PSRAM),1)\nexport PSRAM_SIZE ?= 0x400000\nexport PSRAM_ENABLE ?= 0\nexport PSRAM_SPEED ?= 200\n#166:166M, 200:200M\nendif\nifeq ($(CHIP_HAS_PSRAMUHS),1)\nexport PSRAMUHS_ENABLE ?= 0\nexport PSRAMUHS_SPEED ?= 1000\n#400:400M, 600:600M, 800:800M, 900:900M, 1000:1G\nifeq ($(PSRAMUHS_DUAL_8BIT), 1)\nexport PSRAMUHS_SIZE ?= 0x1000000\nifeq ($(PSRAMUHS_DUAL_SWITCH), 1)\n$(error PSRAMUHS_DUAL_8BIT conflicts with PSRAMUHS_DUAL_SWITCH)\nendif\nendif\nexport PSRAMUHS_SIZE ?= 0x800000\nendif\n\nKBUILD_CPPFLAGS += -DCHIP_HAS_UART=$(CHIP_HAS_UART)\nKBUILD_CPPFLAGS += -DCHIP_HAS_I2C=$(CHIP_HAS_I2C)\n\nifeq ($(CHIP_HAS_USB),1)\nKBUILD_CPPFLAGS += -DCHIP_HAS_USB\nendif\n\nifneq ($(CHIP_HAS_TRANSQ),0)\nKBUILD_CPPFLAGS += -DCHIP_HAS_TRANSQ=$(CHIP_HAS_TRANSQ)\nendif\n\nifeq ($(CHIP_HAS_CP),1)\nKBUILD_CPPFLAGS += -DCHIP_HAS_CP\nendif\n\nifeq ($(CHIP_HAS_AUDIO_CONST_ROM),1)\nKBUILD_CPPFLAGS += -DCHIP_HAS_AUDIO_CONST_ROM\nendif\n\nifeq ($(CHIP_HAS_HW_SMOOTHING_GAIN),1)\nKBUILD_CPPFLAGS += -DHW_SUPPORT_SMOOOTHING_GAIN\nendif\n\nifeq ($(MCU_SLEEP_POWER_DOWN),1)\nKBUILD_CPPFLAGS += -DMCU_SLEEP_POWER_DOWN\nendif\n\nifeq ($(USB_AUDIO_APP),1)\nifneq ($(BTUSB_AUDIO_MODE),1)\nNO_OVERLAY ?= 1\nendif\nendif\nexport NO_OVERLAY\nifeq ($(NO_OVERLAY),1)\nKBUILD_CPPFLAGS += -DNO_OVERLAY\nendif\n\nifneq ($(ROM_SIZE),)\nKBUILD_CPPFLAGS += -DROM_SIZE=$(ROM_SIZE)\nendif\n\nifneq ($(RAM_SIZE),)\nKBUILD_CPPFLAGS += -DRAM_SIZE=$(RAM_SIZE)\nendif\n\nifeq ($(AUDIO_SECTION_ENABLE),1)\nKBUILD_CPPFLAGS += -DAUDIO_SECTION_ENABLE\n# depend on length of (ANC + AUDIO + SPEECH) in aud_section.c\nAUD_SECTION_SIZE ?= 0x8000\nifeq ($(ANC_APP),1)\n$(error Can not enable AUDIO_SECTION_ENABLE and ANC_APP together)\nendif\nendif\n\nifeq ($(ANC_APP),1)\nifeq ($(CHIP),best1000)\nAUD_SECTION_SIZE ?= 0x8000\nelse\nAUD_SECTION_SIZE ?= 0x10000\nendif\nifeq ($(ANC_FB_CHECK),1)\nKBUILD_CPPFLAGS += -DANC_FB_CHECK\nendif\nelse\nAUD_SECTION_SIZE ?= 0\nendif\n\nifeq ($(TWS),1)\nLARGE_RAM ?= 1\nendif\n\nUSERDATA_SECTION_SIZE ?= 0x1000\n\nFACTORY_SECTION_SIZE ?= 0x1000\n\nLHDC_LICENSE_SECTION_SIZE ?= 0x1000\n\nexport DUMP_NORMAL_LOG ?= 0\nifeq ($(DUMP_NORMAL_LOG),1)\nifeq ($(FLASH_SIZE),0x40000) # 2M bits\nLOG_DUMP_SECTION_SIZE ?= 0x4000\nendif\nifeq ($(FLASH_SIZE),0x80000) # 4M bits\nLOG_DUMP_SECTION_SIZE ?= 0x8000\nendif\nifeq ($(FLASH_SIZE),0x100000) # 8M bits\nLOG_DUMP_SECTION_SIZE ?= 0x10000\nendif\nifeq ($(FLASH_SIZE),0x200000) # 16M bits\nLOG_DUMP_SECTION_SIZE ?= 0x80000\nendif\nifeq ($(FLASH_SIZE),0x400000) # 32M bits\nLOG_DUMP_SECTION_SIZE ?= 0x200000\nendif\nifeq ($(FLASH_SIZE),0x800000) # 64M bits\nLOG_DUMP_SECTION_SIZE ?= 0x400000\nendif\nKBUILD_CPPFLAGS += -DDUMP_LOG_ENABLE\nelse\nLOG_DUMP_SECTION_SIZE ?= 0\nendif\n\nAPP_USE_LED_INDICATE_IBRT_STATUS ?= 0\nifeq ($(APP_USE_LED_INDICATE_IBRT_STATUS),1)\nKBUILD_CPPFLAGS += -D__APP_USE_LED_INDICATE_IBRT_STATUS__\nendif\n\nifeq ($(DUMP_CRASH_LOG),1)\nCRASH_DUMP_SECTION_SIZE ?= 0x4000\nKBUILD_CPPFLAGS += -DDUMP_CRASH_ENABLE\nelse\nCRASH_DUMP_SECTION_SIZE ?= 0\nendif\n\nexport CORE_DUMP_TO_FLASH ?= 0\nifeq ($(CORE_DUMP_TO_FLASH),1)\nCORE_DUMP_SECTION_SIZE ?= 0x100000\nKBUILD_CPPFLAGS += -DCORE_DUMP_TO_FLASH\nelse\nCORE_DUMP_SECTION_SIZE ?= 0\nendif\n\nCUSTOM_PARAMETER_SECTION_SIZE ?= 0x1000\n\nexport LDS_SECTION_FLAGS := \\\n\t-DHOTWORD_SECTION_SIZE=$(HOTWORD_SECTION_SIZE) \\\n\t-DCORE_DUMP_SECTION_SIZE=$(CORE_DUMP_SECTION_SIZE) \\\n\t-DOTA_UPGRADE_LOG_SIZE=$(OTA_UPGRADE_LOG_SIZE) \\\n\t-DLOG_DUMP_SECTION_SIZE=$(LOG_DUMP_SECTION_SIZE) \\\n\t-DCRASH_DUMP_SECTION_SIZE=$(CRASH_DUMP_SECTION_SIZE) \\\n\t-DCUSTOM_PARAMETER_SECTION_SIZE=$(CUSTOM_PARAMETER_SECTION_SIZE) \\\n\t-DLHDC_LICENSE_SECTION_SIZE=$(LHDC_LICENSE_SECTION_SIZE) \\\n\t-DUSERDATA_SECTION_SIZE=$(USERDATA_SECTION_SIZE) \\\n\t-DAUD_SECTION_SIZE=$(AUD_SECTION_SIZE) \\\n\t-DRESERVED_SECTION_SIZE=$(RESERVED_SECTION_SIZE) \\\n\t-DFACTORY_SECTION_SIZE=$(FACTORY_SECTION_SIZE)\n\nCPPFLAGS_${LDS_FILE} += \\\n\t-DLINKER_SCRIPT \\\n\t-DFLASH_SIZE=$(FLASH_SIZE) \\\n\t-Iplatform/hal\n\nCPPFLAGS_${LDS_FILE} += $(LDS_SECTION_FLAGS)\n\nifneq ($(PSRAM_SIZE),)\nCPPFLAGS_${LDS_FILE} +=-DPSRAM_SIZE=$(PSRAM_SIZE)\nendif\n\nifneq ($(PSRAMUHS_SIZE),)\nCPPFLAGS_${LDS_FILE} +=-DPSRAMUHS_SIZE=$(PSRAMUHS_SIZE)\nendif\n\nifneq ($(OTA_BOOT_SIZE), 0)\nCPPFLAGS_${LDS_FILE} += -DOTA_BOOT_SIZE=$(OTA_BOOT_SIZE)\nendif\n\nCPPFLAGS_${LDS_FILE} += -DOTA_CODE_OFFSET=$(OTA_CODE_OFFSET)\n\nifneq ($(OTA_REMAP_OFFSET),)\nCPPFLAGS_${LDS_FILE} += -DOTA_REMAP_OFFSET=$(OTA_REMAP_OFFSET)\nendif\n\nifneq ($(FLASH_REGION_SIZE),)\nCPPFLAGS_${LDS_FILE} += -DFLASH_REGION_SIZE=$(FLASH_REGION_SIZE)\nendif\n\nifneq ($(SLAVE_BIN_FLASH_OFFSET),)\nexport SLAVE_BIN_FLASH_OFFSET\nCPPFLAGS_${LDS_FILE} += -DSLAVE_BIN_FLASH_OFFSET=$(SLAVE_BIN_FLASH_OFFSET)\nendif\n\nifeq ($(BOOT_CODE_IN_RAM),1)\nCPPFLAGS_${LDS_FILE} += -DBOOT_CODE_IN_RAM\nendif\n\nifeq ($(GSOUND_HOTWORD_EXTERNAL),1)\nCPPFLAGS_${LDS_FILE} += -DGSOUND_HOTWORD_EXTERNAL\nendif\n\nifeq ($(LARGE_RAM),1)\nKBUILD_CPPFLAGS += -DLARGE_RAM\nendif\n\nifeq ($(CHIP_HAS_EXT_PMU),1)\nexport PMU_IRQ_UNIFIED ?= 1\nendif\n\n# -------------------------------------------\n# Standard C library\n# -------------------------------------------\n\nexport NOSTD\nexport LIBC_ROM\n\nifeq ($(NOSTD),1)\n\nifeq ($(MBED),1)\n$(error Invalid configuration: MBED needs standard C library support)\nendif\nifeq ($(RTOS),1)\n$(error Invalid configuration: RTOS needs standard C library support)\nendif\n\nifneq ($(NO_LIBC),1)\ncore-y += utils/libc/\nendif\n\nSPECS_CFLAGS :=\n\nLIB_LDFLAGS := $(filter-out -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys,$(LIB_LDFLAGS))\n\nKBUILD_CPPFLAGS += -ffreestanding -Iutils/libc/inc\nifeq ($(TOOLCHAIN),armclang)\n# 1) Avoid -nostdinc\n# CMSIS header files need arm_compat.h, which is one of toolchain's standard header files\n# 2) Always -nostdlib for compiling C/C++ files\n# Never convert standard API calls to non-standard library calls, but just emit standard API calls\n# 3) Avoid -nostdlib for linking final image\n# Some 64-bit calculations and math functions need toolchain's standard library\nKBUILD_CPPFLAGS += -nostdlib\nelse\nKBUILD_CPPFLAGS += -nostdinc\nCFLAGS_IMAGE += -nostdlib\nendif\n\nKBUILD_CPPFLAGS += -DNOSTD\n\nelse # NOSTD != 1\n\nifeq ($(LIBC_ROM),1)\ncore-y += utils/libc/\nendif\n\nifeq ($(TOOLCHAIN),armclang)\nLIB_LDFLAGS := $(filter-out -lsupc++,$(LIB_LDFLAGS))\nelse\nSPECS_CFLAGS := --specs=nano.specs\n\nLIB_LDFLAGS += -lm -lc -lgcc -lnosys\nendif\n\nendif # NOSTD != 1\n\n# -------------------------------------------\n# RTOS library\n# -------------------------------------------\n\nexport RTOS\n\nifeq ($(RTOS),1)\n\nifeq ($(CPU),m4)\nKERNEL ?= RTX\nelse\nKERNEL ?= RTX5\nifeq ($(KERNEL),RTX)\n$(error RTX doesn't support $(CPU))\nendif\nendif\n\nexport KERNEL\n\nVALID_KERNEL_LIST := RTX RTX5 FREERTOS\n\nifeq ($(filter $(VALID_KERNEL_LIST),$(KERNEL)),)\n$(error Bad KERNEL=$(KERNEL). Valid values are: $(VALID_KERNEL_LIST))\nendif\n\ncore-y += rtos/\n\nKBUILD_CPPFLAGS += -DRTOS\nKBUILD_CPPFLAGS += -DKERNEL_$(KERNEL)\n\nifeq ($(KERNEL),RTX)\nKBUILD_CPPFLAGS += \\\n\t-Iinclude/rtos/rtx/\nKBUILD_CPPFLAGS += -D__RTX_CPU_STATISTICS__=1\n#KBUILD_CPPFLAGS += -DTASK_HUNG_CHECK_ENABLED=1\nelse ifeq ($(KERNEL),RTX5)\nOS_IDLESTKSIZE ?= 1024\nKBUILD_CPPFLAGS += \\\n\t-Iinclude/rtos/rtx5/\nKBUILD_CPPFLAGS += -D__RTX_CPU_STATISTICS__=1\n#KBUILD_CPPFLAGS += -DTASK_HUNG_CHECK_ENABLED=1\nelse #!rtx\nifeq ($(KERNEL),FREERTOS)\nKBUILD_CPPFLAGS += \\\n -Iinclude/rtos/freertos/\nendif #freertos\nendif #rtx\n\nifeq ($(BLE),0)\nKBUILD_CPPFLAGS += -DBESBT_STACK_SIZE=1024*5+512\nelse\nKBUILD_CPPFLAGS += -DBESBT_STACK_SIZE=1024*8+512\nendif\n\nifeq ($(BLE_SECURITY_ENABLED), 1)\nKBUILD_CPPFLAGS += -DCFG_APP_SEC\nendif\n\nifeq ($(TWS),1)\nOS_TASKCNT ?= 12\nOS_SCHEDULERSTKSIZE ?= 768\nOS_IDLESTKSIZE ?= 512\nelse\nOS_TASKCNT ?= 20\nOS_SCHEDULERSTKSIZE ?= 512\nOS_IDLESTKSIZE ?= 256\nendif\n\nifeq ($(CPU),m33)\nOS_CLOCK_NOMINAL ?= 16000\nelse\nOS_CLOCK_NOMINAL ?= 32000\nendif\nOS_FIFOSZ ?= 24\n\nexport OS_TASKCNT\nexport OS_SCHEDULERSTKSIZE\nexport OS_IDLESTKSIZE\nexport OS_CLOCK_NOMINAL\nexport OS_FIFOSZ\n\nendif\n\n# -------------------------------------------\n# MBED library\n# -------------------------------------------\n\nexport MBED\n\nifeq ($(MBED),1)\n\ncore-y += mbed/\n\nKBUILD_CPPFLAGS += -DMBED\n\nKBUILD_CPPFLAGS += \\\n\t-Imbed/api \\\n\t-Imbed/common \\\n\nendif\n\n# -------------------------------------------\n# DEBUG functions\n# -------------------------------------------\n\nexport DEBUG\n\nifeq ($(CHIP),best1400)\nOPT_LEVEL ?= s\nendif\n\nifneq ($(OPT_LEVEL),)\nKBUILD_CFLAGS\t+= -O$(OPT_LEVEL)\nelse\nKBUILD_CFLAGS\t+= -O2\nendif\n\nifeq ($(DEBUG),1)\n\nKBUILD_CPPFLAGS\t+= -DDEBUG\n\nifneq ($(NOSTD),1)\nKBUILD_CFLAGS \t+= -fstack-protector-strong\nendif\n\nelse\n\nKBUILD_CPPFLAGS\t+= -DNDEBUG\n\nREL_TRACE_ENABLE ?= 1\nifeq ($(REL_TRACE_ENABLE),1)\nKBUILD_CPPFLAGS\t+= -DREL_TRACE_ENABLE\nendif\n\nendif\n\nifeq ($(NO_CHK_TRC_FMT),1)\nKBUILD_CPPFLAGS\t+= -DNO_CHK_TRC_FMT\nelse\n# Typedef int32_t to int, and typedef uint32_t to unsigned int\nKBUILD_CPPFLAGS\t+= -U__INT32_TYPE__ -D__INT32_TYPE__=int -U__UINT32_TYPE__\nendif\n\nifeq ($(MERGE_CONST),1)\nifeq ($(TOOLCHAIN),armclang)\n$(error MERGE_CONST is not supported in $(TOOLCHAIN))\nelse\nKBUILD_CPPFLAGS += -fmerge-constants -fmerge-all-constants\nendif\nendif\n\nexport CORE_DUMP ?= 0\nifeq ($(CORE_DUMP),1)\ncore-y += utils/crash_catcher/ utils/xyzmodem/\nendif\n\n# -------------------------------------------\n# SIMU functions\n# -------------------------------------------\n\nexport SIMU\n\nifeq ($(SIMU),1)\n\nKBUILD_CPPFLAGS += -DSIMU\n\nendif\n\n# -------------------------------------------\n# ROM_BUILD functions\n# -------------------------------------------\n\nexport ROM_BUILD\n\nifeq ($(ROM_BUILD),1)\n\nKBUILD_CPPFLAGS += -DROM_BUILD\n\nendif\n\n# Limit the length of REVISION_INFO if ROM_BUILD or using rom.lds\nifneq ($(filter 1,$(ROM_BUILD))$(filter rom.lds,$(LDS_FILE)),)\nifeq ($(CHIP),best1000)\nREVISION_INFO := x\nelse\nREVISION_INFO := $(GIT_REVISION)\nendif\nendif\n\n# -------------------------------------------\n# PROGRAMMER functions\n# -------------------------------------------\n\nexport PROGRAMMER\n\nifeq ($(PROGRAMMER),1)\n\nKBUILD_CPPFLAGS += -DPROGRAMMER\n\nendif\n\n# -------------------------------------------\n# ROM_UTILS functions\n# -------------------------------------------\n\nexport ROM_UTILS_ON ?= 0\nifeq ($(ROM_UTILS_ON),1)\nKBUILD_CPPFLAGS += -DROM_UTILS_ON\ncore-y += utils/rom_utils/\nendif\n\n# -------------------------------------------\n# Features\n# -------------------------------------------\n\nexport DEBUG_PORT ?= 1\n\nifneq ($(filter best1000 best2000,$(CHIP)),)\nexport AUD_SECTION_STRUCT_VERSION ?= 1\nelse\nexport AUD_SECTION_STRUCT_VERSION ?= 2\nendif\n\nifneq ($(AUD_SECTION_STRUCT_VERSION),)\nKBUILD_CPPFLAGS += -DAUD_SECTION_STRUCT_VERSION=$(AUD_SECTION_STRUCT_VERSION)\nendif\n\nexport FLASH_CHIP\nifneq ($(FLASH_CHIP),)\nVALID_FLASH_CHIP_LIST := ALL \\\n\tGD25LQ64C GD25LQ32C GD25LQ16C GD25Q32C GD25Q80C GD25Q40C GD25Q20C \\\n\tP25Q64L P25Q32L P25Q16L P25Q80H P25Q21H \\\n\tXT25Q08B \\\n\tEN25S80B\nifneq ($(filter-out $(VALID_FLASH_CHIP_LIST),$(FLASH_CHIP)),)\n$(error Invalid FLASH_CHIP: $(filter-out $(VALID_FLASH_CHIP_LIST),$(FLASH_CHIP)))\nendif\nendif\n\nNV_REC_DEV_VER ?= 2\n\nexport NO_SLEEP ?= 0\n\nexport FAULT_DUMP ?= 1\n\nexport USE_TRACE_ID ?= 0\nifeq ($(USE_TRACE_ID),1)\nexport TRACE_STR_SECTION ?= 1\nendif\n\nexport CRASH_BOOT ?= 0\n\nexport OSC_26M_X4_AUD2BB ?= 0\nifeq ($(OSC_26M_X4_AUD2BB),1)\nexport ANA_26M_X4_ENABLE ?= 1\nexport FLASH_LOW_SPEED ?= 0\nendif\n\nexport AUDIO_CODEC_ASYNC_CLOSE ?= 0\n\n# Enable the workaround for BEST1000 version C & earlier chips\nexport CODEC_PLAY_BEFORE_CAPTURE ?= 0\n\nexport AUDIO_INPUT_CAPLESSMODE ?= 0\n\nexport AUDIO_INPUT_LARGEGAIN ?= 0\n\nexport AUDIO_INPUT_MONO ?= 0\n\nexport AUDIO_OUTPUT_MONO ?= 0\n\nexport AUDIO_OUTPUT_VOLUME_DEFAULT ?= 10\n\nexport AUDIO_OUTPUT_INVERT_RIGHT_CHANNEL ?= 0\n\nexport AUDIO_OUTPUT_CALIB_GAIN_MISSMATCH ?= 0\n\nifeq ($(USB_AUDIO_APP),1)\nexport CODEC_HIGH_QUALITY ?= 1\nendif\n\nifeq ($(ANC_APP),1)\nexport CODEC_HIGH_QUALITY ?= 1\nendif\n\nifeq ($(CHIP),best1000)\nAUDIO_OUTPUT_DIFF ?= 1\nAUDIO_OUTPUT_DC_CALIB ?= $(AUDIO_OUTPUT_DIFF)\nAUDIO_OUTPUT_SMALL_GAIN_ATTN ?= 1\nAUDIO_OUTPUT_SW_GAIN ?= 1\nANC_L_R_MISALIGN_WORKAROUND ?= 1\nelse ifeq ($(CHIP),best2000)\nifeq ($(CODEC_HIGH_QUALITY),1)\nexport VCODEC_VOLT ?= 2.5V\nelse\nexport VCODEC_VOLT ?= 1.6V\nendif\nAUDIO_OUTPUT_DIFF ?= 0\nifeq ($(VCODEC_VOLT),2.5V)\nAUDIO_OUTPUT_DC_CALIB ?= 0\nAUDIO_OUTPUT_DC_CALIB_ANA ?= 1\nelse\nAUDIO_OUTPUT_DC_CALIB ?= 1\nAUDIO_OUTPUT_DC_CALIB_ANA ?= 0\nendif\nifneq ($(AUDIO_OUTPUT_DIFF),1)\n# Class-G module still needs improving\n#DAC_CLASSG_ENABLE ?= 1\nendif\nelse ifeq ($(CHIP),best2001)\nexport VCODEC_VOLT ?= 1.8V\nAUDIO_OUTPUT_DC_CALIB ?= 0\nAUDIO_OUTPUT_DC_CALIB_ANA ?= 1\nelse ifneq ($(filter best3001 best3003 best3005,$(CHIP)),)\nexport VCODEC_VOLT ?= 2.5V\nAUDIO_OUTPUT_DC_CALIB ?= 1\nAUDIO_OUTPUT_DC_CALIB_ANA ?= 0\nelse\nAUDIO_OUTPUT_DC_CALIB ?= 0\nAUDIO_OUTPUT_DC_CALIB_ANA ?= 1\nendif\n\nifeq ($(AUDIO_OUTPUT_DC_CALIB)-$(AUDIO_OUTPUT_DC_CALIB_ANA),1-1)\n$(error AUDIO_OUTPUT_DC_CALIB and AUDIO_OUTPUT_DC_CALIB_ANA cannot be enabled at the same time)\nendif\n\nexport AUDIO_OUTPUT_DIFF\n\nexport AUDIO_OUTPUT_DC_CALIB\n\nexport AUDIO_OUTPUT_DC_CALIB_ANA\n\nexport AUDIO_OUTPUT_SMALL_GAIN_ATTN\n\nexport AUDIO_OUTPUT_SW_GAIN\n\nexport ANC_L_R_MISALIGN_WORKAROUND\n\nexport DAC_CLASSG_ENABLE\n\nexport AF_DEVICE_I2S ?= 0\n\nexport AF_DEVICE_TDM ?= 0\n\nexport AF_ADC_I2S_SYNC ?= 0\nifeq ($(AF_ADC_I2S_SYNC),1)\nKBUILD_CPPFLAGS += -DAF_ADC_I2S_SYNC\nexport AF_DEVICE_I2S = 1\nexport INT_LOCK_EXCEPTION ?= 1\nendif\n\nexport BONE_SENSOR_TDM ?= 0\nifeq ($(BONE_SENSOR_TDM),1)\nKBUILD_CPPFLAGS += -DBONE_SENSOR_TDM\nKBUILD_CPPFLAGS += -DI2C_TASK_MODE\nexport AF_DEVICE_I2S = 1\nexport AF_DEVICE_TDM = 1\nKBUILD_CPPFLAGS += -DI2S_MCLK_FROM_SPDIF\nKBUILD_CPPFLAGS += -DI2S_MCLK_IOMUX_INDEX=13\nKBUILD_CPPFLAGS += -DCLKOUT_IOMUX_INDEX=13\nendif\n\nexport PLAYBACK_USE_I2S ?= 0\nifeq ($(PLAYBACK_USE_I2S),1)\nKBUILD_CPPFLAGS += -DPLAYBACK_USE_I2S\nexport AF_DEVICE_I2S = 1\nexport A2DP_EQ_24BIT = 0\nendif\n\nifeq ($(ANC_APP),1)\nexport ANC_FF_ENABLED ?= 1\nifeq ($(ANC_FB_CHECK),1)\nKBUILD_CPPFLAGS += -DANC_FB_CHECK\nendif\nendif\n\nifeq ($(CHIP),best1400)\nexport AUDIO_RESAMPLE ?= 1\nexport PMU_IRQ_UNIFIED ?= 1\nelse ifeq ($(CHIP),best2001)\nexport AUDIO_RESAMPLE ?= 1\nelse\nexport AUDIO_RESAMPLE ?= 0\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\nifeq ($(CHIP),best1000)\nexport SW_PLAYBACK_RESAMPLE ?= 1\nexport SW_CAPTURE_RESAMPLE ?= 1\nexport NO_SCO_RESAMPLE ?= 1\nendif # CHIP is best1000\nifeq ($(CHIP),best2000)\nexport SW_CAPTURE_RESAMPLE ?= 1\nexport SW_SCO_RESAMPLE ?= 1\nexport NO_SCO_RESAMPLE ?= 0\nendif # CHIP is best2000\nifeq ($(BT_ANC),1)\nifeq ($(NO_SCO_RESAMPLE),1)\n$(error BT_ANC and NO_SCO_RESAMPLE cannot be enabled at the same time)\nendif\nendif # BT_ANC\n\nKBUILD_CPPFLAGS += -D__AUDIO_RESAMPLE__\nendif # AUDIO_RESAMPLE\n\nexport HW_FIR_DSD_PROCESS ?= 0\n\nexport HW_FIR_EQ_PROCESS ?= 0\n\nexport SW_IIR_EQ_PROCESS ?= 0\nifeq ($(SW_IIR_EQ_PROCESS),1)\nexport A2DP_EQ_24BIT = 1\nendif\n\nexport HW_IIR_EQ_PROCESS ?= 0\n\nexport HW_DAC_IIR_EQ_PROCESS ?= 0\n\nexport AUDIO_DRC ?= 0\n\nexport AUDIO_DRC2 ?= 0\n\nexport HW_DC_FILTER_WITH_IIR ?= 0\nifeq ($(HW_DC_FILTER_WITH_IIR),1)\nKBUILD_CPPFLAGS += -DHW_DC_FILTER_WITH_IIR\nexport HW_FILTER_CODEC_IIR ?= 1\nendif\n\nifeq ($(USB_AUDIO_APP),1)\nexport ANDROID_ACCESSORY_SPEC ?= 1\nexport FIXED_CODEC_ADC_VOL ?= 0\n\nifneq ($(BTUSB_AUDIO_MODE),1)\nNO_PWRKEY ?= 1\nNO_GROUPKEY ?= 1\nendif\nendif\n\nexport NO_PWRKEY\n\nexport NO_GROUPKEY\n\nifneq ($(CHIP),best1000)\nifneq ($(CHIP)-$(TWS),best2000-1)\n# For bt\nexport A2DP_EQ_24BIT ?= 1\n# For usb audio\nexport AUDIO_PLAYBACK_24BIT ?= 1\nendif\nendif\n\nifeq ($(CHIP),best1000)\n\nifeq ($(AUD_PLL_DOUBLE),1)\nKBUILD_CPPFLAGS += -DAUD_PLL_DOUBLE\nendif\n\nifeq ($(DUAL_AUX_MIC),1)\nifeq ($(AUDIO_INPUT_MONO),1)\n$(error Invalid talk mic configuration)\nendif\nKBUILD_CPPFLAGS += -D_DUAL_AUX_MIC_\nendif\n\nendif # best1000\n\nifeq ($(CAPTURE_ANC_DATA),1)\nKBUILD_CPPFLAGS += -DCAPTURE_ANC_DATA\nendif\n\nifeq ($(AUDIO_ANC_TT_HW),1)\nKBUILD_CPPFLAGS += -DAUDIO_ANC_TT_HW\nendif\n\nifeq ($(AUDIO_ANC_FB_MC_HW),1)\nKBUILD_CPPFLAGS += -DAUDIO_ANC_FB_MC_HW\nendif\n\nifeq ($(AUDIO_ANC_FB_MC),1)\nifeq ($(AUDIO_RESAMPLE),1)\n$(error AUDIO_ANC_FB_MC conflicts with AUDIO_RESAMPLE)\nendif\nKBUILD_CPPFLAGS += -DAUDIO_ANC_FB_MC\nendif\n\nifeq ($(BT_ANC),1)\nKBUILD_CPPFLAGS += -D__BT_ANC__\nendif\n\nexport ANC_NOISE_TRACKER ?= 0\nifeq ($(ANC_NOISE_TRACKER),1)\nifeq ($(IBRT),1)\nKBUILD_CPPFLAGS += -DANC_NOISE_TRACKER_CHANNEL_NUM=1\nelse\nKBUILD_CPPFLAGS += -DANC_NOISE_TRACKER_CHANNEL_NUM=2\nendif\nendif\n\nifeq ($(AUDIO_ANC_FB_ADJ_MC),1)\nKBUILD_CPPFLAGS += -DGLOBAL_SRAM_CMSIS_FFT\nendif\n\nifeq ($(ANC_WNR_ENABLED),1)\nKBUILD_CPPFLAGS += -DGLOBAL_SRAM_CMSIS_FFT\nendif\n\nifeq ($(KWS_ALEXA),1)\nKBUILD_CPPFLAGS += -DKWS_BES\nKBUILD_CPPFLAGS += -DGLOBAL_SRAM_KISS_FFT\nKBUILD_CPPFLAGS += -DGLOBAL_SRAM_CMSIS_FFT\nendif\n\nexport BTUSB_AUDIO_MODE ?= 0\nifeq ($(BTUSB_AUDIO_MODE),1)\nKBUILD_CPPFLAGS += -DBTUSB_AUDIO_MODE\nendif\n\nexport BT_USB_AUDIO_DUAL_MODE ?= 0\nifeq ($(BT_USB_AUDIO_DUAL_MODE),1)\nKBUILD_CPPFLAGS += -DBT_USB_AUDIO_DUAL_MODE\nendif\n\nifeq ($(WATCHER_DOG),1)\nKBUILD_CPPFLAGS += -D__WATCHER_DOG_RESET__\nendif\n\nexport ULTRA_LOW_POWER ?= 0\nifeq ($(ULTRA_LOW_POWER),1)\nexport FLASH_LOW_SPEED ?= 1\nexport PSRAM_LOW_SPEED ?= 1\nendif\n\nexport USB_HIGH_SPEED ?= 0\nifeq ($(CHIP),best2000)\nifeq ($(USB_HIGH_SPEED),1)\nexport AUDIO_USE_BBPLL ?= 1\nendif\nifeq ($(AUDIO_USE_BBPLL),1)\nifeq ($(MCU_HIGH_PERFORMANCE_MODE),1)\n$(error MCU_HIGH_PERFORMANCE_MODE conflicts with AUDIO_USE_BBPLL)\nendif\nelse # !AUDIO_USE_BBPLL\nifeq ($(USB_HIGH_SPEED),1)\n$(error AUDIO_USE_BBPLL must be used with USB_HIGH_SPEED)\nendif\nendif # !AUDIO_USE_BBPLL\nendif # best2000\n\nifeq ($(SIMPLE_TASK_SWITCH),1)\nKBUILD_CPPFLAGS += -DSIMPLE_TASK_SWITCH\nendif\n\nifeq ($(ASSERT_SHOW_FILE_FUNC),1)\nKBUILD_CPPFLAGS += -DASSERT_SHOW_FILE_FUNC\nelse\nifeq ($(ASSERT_SHOW_FILE),1)\nKBUILD_CPPFLAGS += -DASSERT_SHOW_FILE\nelse\nifeq ($(ASSERT_SHOW_FUNC),1)\nKBUILD_CPPFLAGS += -DASSERT_SHOW_FUNC\nendif\nendif\nendif\n\nifeq ($(CALIB_SLOW_TIMER),1)\nKBUILD_CPPFLAGS += -DCALIB_SLOW_TIMER\nendif\n\nifeq ($(INT_LOCK_EXCEPTION),1)\nKBUILD_CPPFLAGS += -DINT_LOCK_EXCEPTION\nendif\n\nexport APP_ANC_TEST ?= 0\nifeq ($(APP_ANC_TEST),1)\nKBUILD_CPPFLAGS += -DAPP_ANC_TEST\nendif\n\nUSER_REBOOT_PLAY_MUSIC_AUTO ?= 0\nifeq ($(USER_REBOOT_PLAY_MUSIC_AUTO),1)\nKBUILD_CPPFLAGS += -DUSER_REBOOT_PLAY_MUSIC_AUTO\nexport USER_REBOOT_PLAY_MUSIC_AUTO ?= 1\nendif\n\nexport TEST_OVER_THE_AIR ?= 0\nifeq ($(TEST_OVER_THE_AIR),1)\nKBUILD_CPPFLAGS += -DTEST_OVER_THE_AIR_ENANBLED=1\nendif\n\nifeq ($(USE_TRACE_ID),1)\nKBUILD_CPPFLAGS += -DUSE_TRACE_ID\nendif\n\nifeq ($(TRACE_STR_SECTION),1)\nKBUILD_CPPFLAGS += -DTRACE_STR_SECTION\nCPPFLAGS_${LDS_FILE} += -DTRACE_STR_SECTION\nendif\n\nUSE_THIRDPARTY ?= 0\nifeq ($(USE_THIRDPARTY),1)\nKBUILD_CPPFLAGS += -D__THIRDPARTY\ncore-y += thirdparty/\nendif\n\nexport PC_CMD_UART ?= 0\nifeq ($(PC_CMD_UART),1)\nKBUILD_CPPFLAGS += -D__PC_CMD_UART__\nendif\n\nifeq ($(VOICE_DETECTOR_EN),1)\nKBUILD_CPPFLAGS += -DVOICE_DETECTOR_EN\nendif\n\nifeq ($(VAD_USE_8K_SAMPLE_RATE),1)\nKBUILD_CPPFLAGS += -DVAD_USE_8K_SAMPLE_RATE\nendif\n\nifeq ($(USB_ANC_MC_EQ_TUNING),1)\nKBUILD_CPPFLAGS += -DUSB_ANC_MC_EQ_TUNING -DANC_PROD_TEST\nendif\n\nexport AUTO_TEST ?= 0\nifeq ($(AUTO_TEST),1)\nKBUILD_CFLAGS += -D_AUTO_TEST_\nendif\n\nexport BES_AUTOMATE_TEST ?= 0\nifeq ($(BES_AUTOMATE_TEST),1)\nKBUILD_CFLAGS += -DBES_AUTOMATE_TEST\nKBUILD_CFLAGS += -DHAL_TRACE_RX_ENABLE\nendif\n\nifeq ($(RB_CODEC),1)\nCPPFLAGS_${LDS_FILE} += -DRB_CODEC\nendif\n\nifneq ($(DATA_BUF_START),)\nCPPFLAGS_${LDS_FILE} += -DDATA_BUF_START=$(DATA_BUF_START)\nendif\n\nifeq ($(USER_SECURE_BOOT),1)\ncore-y += utils/user_secure_boot/ \\\n utils/system_info/\nendif\n\nifeq ($(MAX_DAC_OUTPUT),-60db)\nMAX_DAC_OUTPUT_FLAGS := -DMAX_DAC_OUTPUT_M60DB\nelse\nifeq ($(MAX_DAC_OUTPUT),3.75mw)\nMAX_DAC_OUTPUT_FLAGS := -DMAX_DAC_OUTPUT_3P75MW\nelse\nifeq ($(MAX_DAC_OUTPUT),5mw)\nMAX_DAC_OUTPUT_FLAGS := -DMAX_DAC_OUTPUT_5MW\nelse\nifeq ($(MAX_DAC_OUTPUT),10mw)\nMAX_DAC_OUTPUT_FLAGS := -DMAX_DAC_OUTPUT_10MW\nelse\nifneq ($(MAX_DAC_OUTPUT),30mw)\nifneq ($(MAX_DAC_OUTPUT),)\n$(error Invalid MAX_DAC_OUTPUT value: $(MAX_DAC_OUTPUT) (MUST be one of: -60db 3.75mw 5mw 10mw 30mw))\nendif\nendif\nendif\nendif\nendif\nendif\nexport MAX_DAC_OUTPUT_FLAGS\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# BT features\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(BT_APP),1)\n\nexport BT_IF_INCLUDES ?=\nexport BT_PROFILES_INCLUDES ?=\nexport ENHANCED_STACK ?= 1\n\nexport INTERSYS_NO_THREAD ?= 0\n\nexport INTERSYS_DEBUG ?= 0\nifeq ($(INTERSYS_DEBUG),1)\n\tKBUILD_CPPFLAGS += -DINTERSYS_DEBUG=1\nendif\n\nexport BT_DEBUG_TPORTS ?= 0\nifneq ($(BT_DEBUG_TPORTS),0)\n\tKBUILD_CPPFLAGS += -D__BT_DEBUG_TPORTS__\nendif\n\nexport SNOOP_DATA_EXCHANGE_VIA_BLE ?= 0\nifeq ($(SNOOP_DATA_EXCHANGE_VIA_BLE),1)\n\tKBUILD_CPPFLAGS += -DSNOOP_DATA_EXCHANGE_VIA_BLE\nendif\n\nexport SYNC_BT_CTLR_PROFILE ?= 0\nifeq ($(SYNC_BT_CTLR_PROFILE),1)\n\tKBUILD_CPPFLAGS += -DSYNC_BT_CTLR_PROFILE\nendif\n\nexport PROFILE_DEBUG ?= 0\nifeq ($(PROFILE_DEBUG),1)\n\tKBUILD_CPPFLAGS += -DXA_DEBUG=1\nendif\n\nifeq ($(ENHANCED_STACK),1)\nBT_IF_INCLUDES += \\\n\t-Iservices/bt_if_enhanced/inc\nBT_PROFILES_INCLUDES += \\\n\t-Iservices/bt_profiles_enhanced/inc\nelse\nBT_IF_INCLUDES += \\\n\t-Iservices/bt_if/inc\nBT_PROFILES_INCLUDES += \\\n\t-Iservices/bt_profiles/inc \\\n\t-Iservices/bt_profiles/inc/sys\nendif\n\nifeq ($(ENHANCED_STACK),1)\nKBUILD_CFLAGS += -DENHANCED_STACK\n#KBUILD_CPPFLAGS += -D__A2DP_AVDTP_CP__ -D__A2DP_AVDTP_DR__\n#KBUILD_CPPFLAGS += -D__A2DP_AVDTP_DR__\nKBUILD_CPPFLAGS += -D__BLE_TX_USE_BT_TX_QUEUE__\nifeq ($(BISTO_ENABLE),1)\nifneq ($(IBRT),1)\n#disbled before IBRT MAP role switch feature is ready\nKBUILD_CPPFLAGS += -D__BTMAP_ENABLE__\nendif\nendif\nendif\n\nifeq ($(A2DP_AVDTP_CP),1)\nKBUILD_CPPFLAGS += -D__A2DP_AVDTP_CP__\nendif\n\nifneq ($(filter-out 2M 3M,$(BT_RF_PREFER)),)\n$(error Invalid BT_RF_PREFER=$(BT_RF_PREFER))\nendif\nifneq ($(BT_RF_PREFER),)\nRF_PREFER := $(subst .,P,$(BT_RF_PREFER))\nKBUILD_CPPFLAGS += -D__$(RF_PREFER)_PACK__\nendif\n\nexport AUDIO_SCO_BTPCM_CHANNEL ?= 1\nifeq ($(AUDIO_SCO_BTPCM_CHANNEL),1)\nKBUILD_CPPFLAGS += -D_SCO_BTPCM_CHANNEL_\nendif\n\nexport BT_ONE_BRING_TWO ?= 0\nifeq ($(BT_ONE_BRING_TWO),1)\nKBUILD_CPPFLAGS += -D__BT_ONE_BRING_TWO__\nendif\n\nexport A2DP_PLAYER_USE_BT_TRIGGER ?= 1\nifeq ($(A2DP_PLAYER_USE_BT_TRIGGER),1)\nKBUILD_CPPFLAGS += -D__A2DP_PLAYER_USE_BT_TRIGGER__\nendif\n\nexport BT_SELECT_PROF_DEVICE_ID ?= 0\nifeq ($(BT_ONE_BRING_TWO),1)\nifeq ($(BT_SELECT_PROF_DEVICE_ID),1)\nKBUILD_CPPFLAGS += -D__BT_SELECT_PROF_DEVICE_ID__\nendif\nendif\n\nexport SBC_FUNC_IN_ROM ?= 0\nifeq ($(SBC_FUNC_IN_ROM),1)\n\nKBUILD_CPPFLAGS += -D__SBC_FUNC_IN_ROM__\n\nifeq ($(CHIP),best2000)\nUNALIGNED_ACCESS ?= 1\nKBUILD_CPPFLAGS += -D__SBC_FUNC_IN_ROM_VBEST2000_ONLYSBC__\nKBUILD_CPPFLAGS += -D__SBC_FUNC_IN_ROM_VBEST2000__\nendif\nendif\n\nexport HFP_1_6_ENABLE ?= 1\nifeq ($(HFP_1_6_ENABLE),1)\nKBUILD_CPPFLAGS += -DHFP_1_6_ENABLE\nifeq ($(MSBC_16K_SAMPLE_RATE),0)\nKBUILD_CPPFLAGS += -DMSBC_8K_SAMPLE_RATE\nexport DSP_LIB ?= 1\nendif\nendif\n\nexport A2DP_AAC_ON ?= 0\nifeq ($(A2DP_AAC_ON),1)\nKBUILD_CPPFLAGS += -DA2DP_AAC_ON\nKBUILD_CPPFLAGS += -D__ACC_FRAGMENT_COMPATIBLE__\nendif\n\nexport FDKAAC_VERSION ?= 2\n\nifneq ($(FDKAAC_VERSION),)\nKBUILD_CPPFLAGS += -DFDKAAC_VERSION=$(FDKAAC_VERSION)\nendif\n\nexport A2DP_LHDC_ON ?= 0\nifeq ($(A2DP_LHDC_ON),1)\nKBUILD_CPPFLAGS += -DA2DP_LHDC_ON\nexport A2DP_LHDC_V3 ?= 0\nifeq ($(A2DP_LHDC_V3),1)\nKBUILD_CPPFLAGS += -DA2DP_LHDC_V3\nendif\nexport A2DP_LHDC_LARC ?= 0\nifeq ($(A2DP_LHDC_LARC),1)\nKBUILD_CPPFLAGS += -DA2DP_LHDC_LARC\nendif\n\ncore-y += thirdparty/audio_codec_lib/liblhdc-dec/\nendif\nifeq ($(USER_SECURE_BOOT),1)\nKBUILD_CPPFLAGS += -DUSER_SECURE_BOOT\nendif\n\nexport A2DP_SCALABLE_ON ?= 0\nifeq ($(A2DP_SCALABLE_ON),1)\nKBUILD_CPPFLAGS += -DA2DP_SCALABLE_ON\nKBUILD_CPPFLAGS += -DGLOBAL_SRAM_KISS_FFT\n#KBUILD_CPPFLAGS += -DA2DP_SCALABLE_UHQ_SUPPORT\ncore-y += thirdparty/audio_codec_lib/scalable/\nendif\n\nexport A2DP_LDAC_ON ?= 0\nifeq ($(A2DP_LDAC_ON),1)\nKBUILD_CPPFLAGS += -DA2DP_LDAC_ON\ncore-y += thirdparty/audio_codec_lib/ldac/\nendif\n\nexport A2DP_CP_ACCEL ?= 0\nifeq ($(A2DP_CP_ACCEL),1)\nKBUILD_CPPFLAGS += -DA2DP_CP_ACCEL\nendif\n\nexport SCO_CP_ACCEL ?= 0\nifeq ($(SCO_CP_ACCEL),1)\nKBUILD_CPPFLAGS += -DSCO_CP_ACCEL\n# spx fft will share buffer which is not fit for dual cores.\nKBUILD_CPPFLAGS += -DUSE_CMSIS_F32_FFT\nendif\n\nexport SCO_TRACE_CP_ACCEL ?= 0\nifeq ($(SCO_TRACE_CP_ACCEL),1)\nKBUILD_CPPFLAGS += -DSCO_TRACE_CP_ACCEL\nendif\n\nifeq ($(BT_XTAL_SYNC),1)\nKBUILD_CPPFLAGS += -DBT_XTAL_SYNC_NEW_METHOD\nKBUILD_CPPFLAGS += -DFIXED_BIT_OFFSET_TARGET\nendif\n\nifeq ($(BT_XTAL_SYNC_SLOW),1)\nKBUILD_CPPFLAGS += -DBT_XTAL_SYNC_SLOW\nendif\n\nifeq ($(BT_XTAL_SYNC_NO_RESET),1)\nKBUILD_CPPFLAGS += -DBT_XTAL_SYNC_NO_RESET\nendif\n\n\nifeq ($(APP_LINEIN_A2DP_SOURCE),1)\nKBUILD_CPPFLAGS += -DAPP_LINEIN_A2DP_SOURCE\nendif\n\nifeq ($(HSP_ENABLE),1)\nKBUILD_CPPFLAGS += -D__HSP_ENABLE__\nendif\n\nifeq ($(APP_I2S_A2DP_SOURCE),1)\nKBUILD_CPPFLAGS += -DAPP_I2S_A2DP_SOURCE\nendif\n\nexport TX_RX_PCM_MASK ?= 0\nifeq ($(TX_RX_PCM_MASK),1)\nKBUILD_CPPFLAGS += -DTX_RX_PCM_MASK\nendif\n\nexport PCM_FAST_MODE ?= 0\nifeq ($(PCM_FAST_MODE),1)\nKBUILD_CPPFLAGS += -DPCM_FAST_MODE\nendif\n\nexport LOW_DELAY_SCO ?= 0\nifeq ($(LOW_DELAY_SCO),1)\nKBUILD_CPPFLAGS += -DLOW_DELAY_SCO\nendif\n\nexport CVSD_BYPASS ?= 0\nifeq ($(CVSD_BYPASS),1)\nKBUILD_CPPFLAGS += -DCVSD_BYPASS\nendif\n\nexport SCO_DMA_SNAPSHOT ?= 0\nifeq ($(CHIP_HAS_SCO_DMA_SNAPSHOT),1)\nexport SCO_DMA_SNAPSHOT := 1\nKBUILD_CPPFLAGS += -DSCO_DMA_SNAPSHOT\nendif\n\nexport SCO_OPTIMIZE_FOR_RAM ?= 0\nifeq ($(SCO_OPTIMIZE_FOR_RAM),1)\nKBUILD_CPPFLAGS += -DSCO_OPTIMIZE_FOR_RAM\nendif\n\nexport AAC_TEXT_PARTIAL_IN_FLASH ?= 0\nifeq ($(AAC_TEXT_PARTIAL_IN_FLASH),1)\nKBUILD_CPPFLAGS += -DAAC_TEXT_PARTIAL_IN_FLASH\nendif\n\nifeq ($(SUPPORT_BATTERY_REPORT),1)\nKBUILD_CPPFLAGS += -DSUPPORT_BATTERY_REPORT\nendif\n\nifeq ($(SUPPORT_HF_INDICATORS),1)\nKBUILD_CPPFLAGS += -DSUPPORT_HF_INDICATORS\nendif\n\nifeq ($(SUPPORT_SIRI),1)\nKBUILD_CPPFLAGS += -DSUPPORT_SIRI\nendif\n\nexport BQB_PROFILE_TEST ?= 0\nifeq ($(BQB_PROFILE_TEST),1)\nKBUILD_CPPFLAGS += -D__BQB_PROFILE_TEST__\nendif\n\nexport AUDIO_SPECTRUM ?= 0\nifeq ($(AUDIO_SPECTRUM),1)\nKBUILD_CPPFLAGS += -D__AUDIO_SPECTRUM__\nKBUILD_CPPFLAGS += -DGLOBAL_SRAM_KISS_FFT\nendif\n\nexport INTERCONNECTION ?= 0\nifeq ($(INTERCONNECTION),1)\nKBUILD_CPPFLAGS += -D__INTERCONNECTION__\nendif\n\nexport INTERACTION ?= 0\nifeq ($(INTERACTION),1)\nKBUILD_CPPFLAGS += -D__INTERACTION__\nendif\n\n\nexport WL_DET ?= 0\nifeq ($(WL_DET),1)\nKBUILD_CPPFLAGS += -DWL_DET\nendif\n\nexport AUDIO_LOOPBACK ?= 0\nifeq ($(AUDIO_LOOPBACK),1)\nKBUILD_CPPFLAGS += -DAUDIO_LOOPBACK\nendif\n\n\nexport INTERACTION_FASTPAIR ?= 0\nifeq ($(INTERACTION_FASTPAIR),1)\nKBUILD_CPPFLAGS += -D__INTERACTION_FASTPAIR__\nKBUILD_CPPFLAGS += -D__INTERACTION_CUSTOMER_AT_COMMAND__\nendif\n\nifeq ($(SUSPEND_ANOTHER_DEV_A2DP_STREAMING_WHEN_CALL_IS_COMING),1)\nKBUILD_CPPFLAGS += -DSUSPEND_ANOTHER_DEV_A2DP_STREAMING_WHEN_CALL_IS_COMING\nendif\n\nexport TWS_PROMPT_SYNC ?= 0\nifeq ($(TWS_PROMPT_SYNC), 1)\nexport MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED = 1\nKBUILD_CPPFLAGS += -DTWS_PROMPT_SYNC\nendif\n\nexport MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED ?= 0\nifeq ($(MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED), 1)\nKBUILD_CPPFLAGS += -DMIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\nexport RESAMPLE_ANY_SAMPLE_RATE ?= 1\nendif\n\n#ifeq ($(AUDIO_RESAMPLE),0)\nexport RESAMPLE_ANY_SAMPLE_RATE ?= 1\nKBUILD_CPPFLAGS += -DRESAMPLE_ANY_SAMPLE_RATE\n#endif\n\nexport MEDIA_PLAY_24BIT ?= 0\n\nexport LBRT ?= 0\nifeq ($(LBRT),1)\nKBUILD_CPPFLAGS += -DLBRT\nendif\n\nexport IBRT ?= 0\nifeq ($(IBRT),1)\nKBUILD_CPPFLAGS += -DIBRT\nKBUILD_CPPFLAGS += -DIBRT_BLOCKED\nKBUILD_CPPFLAGS += -DIBRT_NOT_USE\nKBUILD_CPPFLAGS += -D__A2DP_AUDIO_SYNC_FIX_DIFF_NOPID__\nendif\n\n\nexport IBRT_TESTMODE ?= 0\nifeq ($(IBRT_TESTMODE),1)\nKBUILD_CPPFLAGS += -D__IBRT_IBRT_TESTMODE__\nendif\n\nifeq ($(TWS_SYSTEM_ENABLED),1)\nKBUILD_CPPFLAGS += -DTWS_SYSTEM_ENABLED\nendif\n\nexport BES_AUD ?= 0\nifeq ($(BES_AUD),1)\nKBUILD_CPPFLAGS += -DBES_AUD\nendif\n\nexport IBRT_SEARCH_UI ?= 0\nifeq ($(IBRT_SEARCH_UI),1)\nKBUILD_CPPFLAGS += -DIBRT_SEARCH_UI\nendif\n\nendif # BT_APP\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# BLE features\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(BLE),1)\n\nKBUILD_CPPFLAGS += -DBLE_ENABLE\n\nKBUILD_CPPFLAGS += -D__IAG_BLE_INCLUDE__\n\nIS_USE_BLE_DUAL_CONNECTION ?= 1\n\nifeq ($(IS_USE_BLE_DUAL_CONNECTION),1)\nKBUILD_CPPFLAGS += -DBLE_CONNECTION_MAX=2\nelse\nKBUILD_CPPFLAGS += -DBLE_CONNECTION_MAX=1\nendif\n\nifeq ($(IS_ENABLE_DEUGGING_MODE),1)\nKBUILD_CPPFLAGS += -DIS_ENABLE_DEUGGING_MODE\nendif\n\nendif # BLE\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# Speech features\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nexport SPEECH_TX_24BIT ?= 0\nifeq ($(SPEECH_TX_24BIT),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_24BIT\nendif\n\nexport SPEECH_TX_DC_FILTER ?= 0\nifeq ($(SPEECH_TX_DC_FILTER),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_DC_FILTER\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_TX_MIC_CALIBRATION ?= 0\nifeq ($(SPEECH_TX_MIC_CALIBRATION),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_MIC_CALIBRATION\nendif\n\nexport SPEECH_TX_MIC_FIR_CALIBRATION ?= 0\nifeq ($(SPEECH_TX_MIC_FIR_CALIBRATION),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_MIC_FIR_CALIBRATION\nendif\n\nexport SPEECH_TX_AEC_CODEC_REF ?= 0\n\nexport SPEECH_TX_AEC ?= 0\nifeq ($(SPEECH_TX_AEC),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_AEC\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nifeq ($(CHIP_HAS_EC_CODEC_REF),1)\nexport SPEECH_TX_AEC_CODEC_REF := 1\nendif\nendif\n\nexport SPEECH_TX_AEC2 ?= 0\nifeq ($(SPEECH_TX_AEC2),1)\n$(error SPEECH_TX_AEC2 is not supported now, use SPEECH_TX_AEC2FLOAT instead)\nKBUILD_CPPFLAGS += -DSPEECH_TX_AEC2\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nifeq ($(CHIP_HAS_EC_CODEC_REF),1)\nexport SPEECH_TX_AEC_CODEC_REF := 1\nendif\nendif\n\nexport SPEECH_TX_AEC3 ?= 0\nifeq ($(SPEECH_TX_AEC3),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_AEC3\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nifeq ($(CHIP_HAS_EC_CODEC_REF),1)\nexport SPEECH_TX_AEC_CODEC_REF := 1\nendif\nendif\n\nexport SPEECH_TX_AEC2FLOAT ?= 0\nifeq ($(SPEECH_TX_AEC2FLOAT),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_AEC2FLOAT\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nexport DSP_LIB ?= 1\nifeq ($(CHIP_HAS_EC_CODEC_REF),1)\nexport SPEECH_TX_AEC_CODEC_REF := 1\nendif\nendif\n\nifeq ($(SCO_DMA_SNAPSHOT),0)\nexport SPEECH_TX_AEC_CODEC_REF := 0\nendif\n\nexport SPEECH_TX_NS ?= 0\nifeq ($(SPEECH_TX_NS),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_NS\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_TX_NS2 ?= 0\nifeq ($(SPEECH_TX_NS2),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_NS2\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nKBUILD_CPPFLAGS += -DLC_MMSE_FRAME_LENGTH=$(LC_MMSE_FRAME_LENGTH)\nendif\n\nexport SPEECH_TX_NS2FLOAT ?= 0\nifeq ($(SPEECH_TX_NS2FLOAT),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_NS2FLOAT\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nexport DSP_LIB ?= 1\nendif\n\nexport SPEECH_TX_NS3 ?= 0\nifeq ($(SPEECH_TX_NS3),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_NS3\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_TX_WNR ?= 0\nifeq ($(SPEECH_TX_WNR),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_WNR\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_CS_VAD ?= 0\nifeq ($(SPEECH_CS_VAD),1)\nKBUILD_CPPFLAGS += -DSPEECH_CS_VAD\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM ?= 1\n\nexport SPEECH_TX_2MIC_NS ?= 0\nifeq ($(SPEECH_TX_2MIC_NS),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_2MIC_NS\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 2\nendif\n\nexport SPEECH_TX_2MIC_NS2 ?= 0\nifeq ($(SPEECH_TX_2MIC_NS2),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_2MIC_NS2\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nKBUILD_CPPFLAGS += -DCOH_FRAME_LENGTH=$(COH_FRAME_LENGTH)\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 2\nendif\n\nexport SPEECH_TX_2MIC_NS3 ?= 0\nifeq ($(SPEECH_TX_2MIC_NS3),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_2MIC_NS3\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 2\nendif\n\nexport SPEECH_TX_2MIC_NS4 ?= 0\nifeq ($(SPEECH_TX_2MIC_NS4),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_2MIC_NS4\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\n\nifeq ($(BONE_SENSOR_TDM),1)\n# Get 1 channel from sensor\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 1\nelse\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 2\nendif\n\nendif\n\nexport SPEECH_TX_2MIC_NS5 ?= 0\nifeq ($(SPEECH_TX_2MIC_NS5),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_2MIC_NS5\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 2\nendif\n\nexport SPEECH_TX_3MIC_NS ?= 0\nifeq ($(SPEECH_TX_3MIC_NS),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_3MIC_NS\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nifeq ($(BONE_SENSOR_TDM),1)\n# Get 1 channel from sensor\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 2\nelse\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 3\nendif\nendif\n\nexport SPEECH_TX_3MIC_NS3 ?= 0\nifeq ($(SPEECH_TX_3MIC_NS3),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_3MIC_NS3\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\n# Get 1 channel from sensor\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 3\nendif\n\nexport SPEECH_TX_THIRDPARTY_ALANGO ?= 0\nifeq ($(SPEECH_TX_THIRDPARTY_ALANGO),1)\nexport SPEECH_TX_THIRDPARTY := 1\ncore-y += thirdparty/alango_lib/\nendif\n\nexport SPEECH_TX_THIRDPARTY ?= 0\nifeq ($(SPEECH_TX_THIRDPARTY),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_THIRDPARTY\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\n# Get 1 channel from sensor\nexport SPEECH_CODEC_CAPTURE_CHANNEL_NUM = 2\nifeq ($(CHIP_HAS_EC_CODEC_REF),1)\nexport SPEECH_TX_AEC_CODEC_REF := 1\nendif\nendif\n\nexport SPEECH_TX_NOISE_GATE ?= 0\nifeq ($(SPEECH_TX_NOISE_GATE),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_NOISE_GATE\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_TX_COMPEXP ?= 0\nifeq ($(SPEECH_TX_COMPEXP),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_COMPEXP\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_TX_AGC ?= 0\nifeq ($(SPEECH_TX_AGC),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_AGC\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_TX_EQ ?= 0\nifeq ($(SPEECH_TX_EQ),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_EQ\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nexport DSP_LIB ?= 1\nendif\n\nexport SPEECH_TX_POST_GAIN ?= 0\nifeq ($(SPEECH_TX_POST_GAIN),1)\nKBUILD_CPPFLAGS += -DSPEECH_TX_POST_GAIN\nendif\n\nexport SPEECH_RX_NS ?= 0\nifeq ($(SPEECH_RX_NS),1)\nKBUILD_CPPFLAGS += -DSPEECH_RX_NS\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_RX_NS2 ?= 0\nifeq ($(SPEECH_RX_NS2),1)\nKBUILD_CPPFLAGS += -DSPEECH_RX_NS2\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_RX_NS2FLOAT ?= 0\nifeq ($(SPEECH_RX_NS2FLOAT),1)\nKBUILD_CPPFLAGS += -DSPEECH_RX_NS2FLOAT\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nexport DSP_LIB ?= 1\nendif\n\nexport SPEECH_RX_NS3 ?= 0\nifeq ($(SPEECH_RX_NS3),1)\nKBUILD_CPPFLAGS += -DSPEECH_RX_NS3\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_RX_AGC ?= 0\nifeq ($(SPEECH_RX_AGC),1)\nKBUILD_CPPFLAGS += -DSPEECH_RX_AGC\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nendif\n\nexport SPEECH_RX_EQ ?= 0\nifeq ($(SPEECH_RX_EQ),1)\nKBUILD_CPPFLAGS += -DSPEECH_RX_EQ\nKBUILD_CPPFLAGS += -DHFP_DISABLE_NREC\nexport DSP_LIB ?= 1\nendif\n\nexport SPEECH_RX_POST_GAIN ?= 0\nifeq ($(SPEECH_RX_POST_GAIN),1)\nKBUILD_CPPFLAGS += -DSPEECH_RX_POST_GAIN\nendif\n\nexport SPEECH_RX_24BIT ?= 0\nifeq ($(SPEECH_RX_EQ),1)\n# enable 24bit to fix low level signal distortion\nexport SPEECH_RX_24BIT = 1\nendif\n\nexport WL_UI ?= 0\nifeq ($(WL_UI),1)\nKBUILD_CPPFLAGS += -DWL_UI\nendif\n\n\nexport SPEECH_PROCESS_FRAME_MS \t?= 16\nifeq ($(SPEECH_CODEC_CAPTURE_CHANNEL_NUM),1)\nexport SPEECH_PROCESS_FRAME_MS = 15\nendif\nifeq ($(SPEECH_TX_2MIC_NS2),1)\nexport SPEECH_PROCESS_FRAME_MS = 15\nendif\nifeq ($(SPEECH_TX_THIRDPARTY),1)\nexport SPEECH_PROCESS_FRAME_MS = 15\nendif\n\nexport SPEECH_SCO_FRAME_MS \t\t?= 15\n\nexport SPEECH_SIDETONE ?= 0\nifeq ($(SPEECH_SIDETONE),1)\nKBUILD_CPPFLAGS += -DSPEECH_SIDETONE\nifeq ($(CHIP),best2000)\n# Disable SCO resample\nexport SW_SCO_RESAMPLE := 0\nexport NO_SCO_RESAMPLE := 1\nendif\nendif\n\nifeq ($(THIRDPARTY_LIB),aispeech)\nexport DSP_LIB ?= 1\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# Features for full application projects\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(FULL_APP_PROJECT),1)\n\nexport BESLIB_INFO := $(GIT_REVISION)\n\nexport SPEECH_LIB ?= 1\n\nexport FLASH_PROTECTION ?= 1\n\nexport APP_TEST_AUDIO ?= 0\n\nexport APP_TEST_MODE ?= 0\nifeq ($(APP_TEST_MODE),1)\nKBUILD_CPPFLAGS += -DAPP_TEST_MODE\nendif\n\nexport VOICE_PROMPT ?= 1\n\nexport AUDIO_QUEUE_SUPPORT ?= 1\n\nexport VOICE_RECOGNITION ?= 0\n\nexport ENGINEER_MODE ?= 1\nifeq ($(ENGINEER_MODE),1)\nFACTORY_MODE := 1\nendif\nifeq ($(FACTORY_MODE),1)\nKBUILD_CPPFLAGS += -D__FACTORY_MODE_SUPPORT__\nendif\n\nexport NEW_NV_RECORD_ENABLED ?= 1\nifeq ($(NEW_NV_RECORD_ENABLED),1)\nKBUILD_CPPFLAGS += -DNEW_NV_RECORD_ENABLED\nKBUILD_CPPFLAGS += -Iservices/nv_section/userdata_section\nendif\n\nifeq ($(HEAR_THRU_PEAK_DET),1)\nKBUILD_CPPFLAGS += -D__HEAR_THRU_PEAK_DET__\nendif\n\nKBUILD_CPPFLAGS += -DSPEECH_PROCESS_FRAME_MS=$(SPEECH_PROCESS_FRAME_MS)\nKBUILD_CPPFLAGS += -DSPEECH_SCO_FRAME_MS=$(SPEECH_SCO_FRAME_MS)\n\nKBUILD_CPPFLAGS += -DMULTIPOINT_DUAL_SLAVE\n\nendif # FULL_APP_PROJECT\n\nifeq ($(SPEECH_LIB),1)\n\nexport DSP_LIB ?= 1\n\nifeq ($(USB_AUDIO_APP),1)\nifneq ($(USB_AUDIO_SEND_CHAN),$(SPEECH_CODEC_CAPTURE_CHANNEL_NUM))\n$(info )\n$(info CAUTION: Change USB_AUDIO_SEND_CHAN($(USB_AUDIO_SEND_CHAN)) to SPEECH_CODEC_CAPTURE_CHANNEL_NUM($(SPEECH_CODEC_CAPTURE_CHANNEL_NUM)))\n$(info )\nexport USB_AUDIO_SEND_CHAN := $(SPEECH_CODEC_CAPTURE_CHANNEL_NUM)\nifneq ($(USB_AUDIO_SEND_CHAN),$(SPEECH_CODEC_CAPTURE_CHANNEL_NUM))\n$(error ERROR: Failed to change USB_AUDIO_SEND_CHAN($(USB_AUDIO_SEND_CHAN)))\nendif\nendif\nendif\n\nKBUILD_CPPFLAGS += -DSPEECH_CODEC_CAPTURE_CHANNEL_NUM=$(SPEECH_CODEC_CAPTURE_CHANNEL_NUM)\nKBUILD_CPPFLAGS += -DSPEECH_ASR_CAPTURE_CHANNEL_NUM=$(SPEECH_ASR_CAPTURE_CHANNEL_NUM)\nendif # SPEECH_LIB\n\nexport USB_AUDIO_SPEECH ?= 0\nifeq ($(USB_AUDIO_SPEECH),1)\nexport USB_AUDIO_DYN_CFG := 0\nexport KEEP_SAME_LATENCY := 1\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# BISTO feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(BISTO_ENABLE),1)\n\nKBUILD_CFLAGS += -DBISTO_ENABLED\n\nKBUILD_CPPFLAGS += -DCFG_SW_KEY_LPRESS_THRESH_MS=1000\n\nKBUILD_CPPFLAGS += -DDEBUG_BLE_DATAPATH=0\n\nKBUILD_CFLAGS += -DCRC32_OF_IMAGE\n\n#export OPUS_CODEC ?= 1\n#ENCODING_ALGORITHM_OPUS 2\n#ENCODING_ALGORITHM_SBC 3\n#KBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=3\n\n# As MIX_MIC_DURING_MUSIC uses the isolated audio stream, if define MIX_MIC_DURING_MUSIC,\n# the isolated audio stream must be enabled\nKBUILD_CPPFLAGS += -DISOLATED_AUDIO_STREAM_ENABLED=1\n\nASSERT_SHOW_FILE_FUNC ?= 1\n\n#KBUILD_CPPFLAGS += -DSAVING_AUDIO_DATA_TO_SD_ENABLED=1\n\nKBUILD_CPPFLAGS += -DIS_GSOUND_BUTTION_HANDLER_WORKAROUND_ENABLED\n\nifeq ($(GSOUND_HOTWORD_ENABLE), 1)\nKBUILD_CFLAGS += -DGSOUND_HOTWORD_ENABLED\nifeq ($(GSOUND_HOTWORD_EXTERNAL), 1)\nKBUILD_CFLAGS += -DGSOUND_HOTWORD_EXTERNAL\nendif\nendif\n\nREDUCED_GUESTURE_ENABLE ?= 0\n\nBISTO_USE_TWS_API ?= 1\nifeq ($(BISTO_USE_TWS_API), 1)\nKBUILD_CPPFLAGS += -DBISTO_USE_TWS_API\nendif\n\nifeq ($(REDUCED_GUESTURE_ENABLE), 1)\nKBUILD_CFLAGS += -DREDUCED_GUESTURE_ENABLED\nendif\nendif # BISTO_ENABLE\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# GFPS feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(GFPS_ENABLE),1)\n\nKBUILD_CPPFLAGS += -DGFPS_ENABLED\nexport BLE_SECURITY_ENABLED := 1\n\n# this macro is used to determain if the resolveable private address is used for BLE\nKBUILD_CPPFLAGS += -DBLE_USE_RPA\n\nendif # GFPS\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# AMA feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(AMA_VOICE),1)\n\nKBUILD_CPPFLAGS += -D__AMA_VOICE__\nKBUILD_CPPFLAGS += -DBLE_USE_RPA\n\nifeq ($(CHIP),best1400)\nKBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=3\nexport OPUS_CODEC ?= 0\nelse\nKBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=2\nexport OPUS_CODEC := 1\nendif\nendif # AMA_VOICE\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# DMA feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(DMA_VOICE),1)\nKBUILD_CPPFLAGS += -D__DMA_VOICE__\n\nKBUILD_CPPFLAGS += -D__BES__\nKBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=2\nKBUILD_CPPFLAGS += -DNVREC_BAIDU_DATA_SECTION\nKBUILD_CPPFLAGS += -DBAIDU_DATA_RAND_LEN=8\nKBUILD_CPPFLAGS += -DFM_MIN_FREQ=875\nKBUILD_CPPFLAGS += -DFM_MAX_FREQ=1079\nKBUILD_CPPFLAGS += -DBAIDU_DATA_DEF_FM_FREQ=893\nKBUILD_CPPFLAGS += -DBAIDU_DATA_SN_LEN=16\nexport OPUS_CODEC := 1\nexport SHA256_ROM ?= 1\nexport LIBC_ROM := 0\nifeq ($(LIBC_ROM),1)\n$(error LIBC_ROM should be 0 when DMA_VOICE=1)\nendif\nendif # DMA_VOICE\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# GMA feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(GMA_VOICE),1)\nexport AI_VOICE ?= 1\nKBUILD_CPPFLAGS += -D__GMA_VOICE__\n\n#KBUILD_CPPFLAGS += -DKEYWORD_WAKEUP_ENABLED=0\n#KBUILD_CPPFLAGS += -DPUSH_AND_HOLD_ENABLED=1\n#KBUILD_CPPFLAGS += -DAI_32KBPS_VOICE=0\nKBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=2\nexport OPUS_CODEC := 1\nKBUILD_CPPFLAGS += -D__GMA_OTA_TWS__\n#KBUILD_CPPFLAGS += -DMCU_HIGH_PERFORMANCE_MODE\nKBUILD_CPPFLAGS += -DGMA_HOLD_ACTIVE_ENABLE\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# SMART_VOICE feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(SMART_VOICE),1)\nKBUILD_CPPFLAGS += -D__SMART_VOICE__\nKBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=2\nexport OPUS_CODEC := 1\n#SPEECH_CODEC_CAPTURE_CHANNEL_NUM ?= 2\n#KBUILD_CPPFLAGS += -DMCU_HIGH_PERFORMANCE_MODE\n#KBUILD_CPPFLAGS += -DSPEECH_CAPTURE_TWO_CHANNEL\nendif # SMART_VOICE\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# TENCENT_VOICE feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(TENCENT_VOICE),1)\nKBUILD_CPPFLAGS += -D__TENCENT_VOICE__\nKBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=2\nexport OPUS_CODEC := 1\nendif # TENCENT_VOICE\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# CUSTOMIZE feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(CUSTOMIZE_VOICE),1)\nKBUILD_CPPFLAGS += -D__CUSTOMIZE_VOICE__\nKBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=2\nexport OPUS_CODEC := 1\n#SPEECH_CODEC_CAPTURE_CHANNEL_NUM ?= 2\n#KBUILD_CPPFLAGS += -DMCU_HIGH_PERFORMANCE_MODE\n#KBUILD_CPPFLAGS += -DSPEECH_CAPTURE_TWO_CHANNEL\nendif # CUSTOMIZE_VOICE\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# Dual MIC recording feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(DUAL_MIC_RECORDING),1)\nKBUILD_CPPFLAGS += -D__DUAL_MIC_RECORDING__\nKBUILD_CPPFLAGS += -DVOB_ENCODING_ALGORITHM=2\nifeq ($(LOWER_BANDWIDTH),1)\nKBUILD_CPPFLAGS += -D__LOWER_BANDWIDTH__\nendif # LOWER_BANDWIDTH\nexport OPUS_CODEC := 1\nendif # DUAL_MIC_RECORDING\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# AI_VOICE feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(AI_VOICE),1)\nKBUILD_CPPFLAGS += -D__AI_VOICE__\nKBUILD_CPPFLAGS += -DNO_ENCODING=0\nKBUILD_CPPFLAGS += -DENCODING_ALGORITHM_ADPCM=1\nKBUILD_CPPFLAGS += -DENCODING_ALGORITHM_OPUS=2\nKBUILD_CPPFLAGS += -DENCODING_ALGORITHM_SBC=3\nKBUILD_CPPFLAGS += -DOS_DYNAMIC_MEM_SIZE=0x6800\nifeq ($(OPUS_CODEC),1)\nKBUILD_CPPFLAGS += -DOPUS_IN_OVERLAY\nendif\n\nifeq ($(filter -DISOLATED_AUDIO_STREAM_ENABLED=1,$(KBUILD_CPPFLAGS)),)\nKBUILD_CPPFLAGS += -DISOLATED_AUDIO_STREAM_ENABLED=1\nendif\n\nifneq ($(filter -DVOB_ENCODING_ALGORITHM=2,$(KBUILD_CPPFLAGS)),)\nifneq ($(USE_KNOWLES),1)\nifneq ($(ALEXA_WWE),1)\nexport AF_STACK_SIZE ?= 16384\nendif\nendif\nendif\nendif # AI_VOICE\n\nifeq ($(THROUGH_PUT),1)\nKBUILD_CPPFLAGS += -D__THROUGH_PUT__\nendif # THROUGH_PUT\n\nifeq ($(USE_KNOWLES),1)\nKBUILD_CPPFLAGS += -D__KNOWLES\nKBUILD_CPPFLAGS += -DIDLE_ALEXA_KWD\nexport THIRDPARTY_LIB := knowles_uart\nendif\n\nAI_CAPTURE_CHANNEL_NUM ?= 0\nifneq ($(AI_CAPTURE_CHANNEL_NUM),0)\nKBUILD_CPPFLAGS += -DAI_CAPTURE_CHANNEL_NUM=$(AI_CAPTURE_CHANNEL_NUM)\nendif\n\nAI_CAPTURE_DATA_AEC ?= 0\nifeq ($(AI_CAPTURE_DATA_AEC),1)\nKBUILD_CPPFLAGS += -DAI_CAPTURE_DATA_AEC\nKBUILD_CPPFLAGS += -DAI_ALGORITHM_ENABLE\nKBUILD_CPPFLAGS += -DAEC_STERE_ON\nendif\n\nexport AI_AEC_CP_ACCEL ?= 0\nifeq ($(AI_AEC_CP_ACCEL),1)\nKBUILD_CPPFLAGS += -DAI_AEC_CP_ACCEL\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# MULTI_AI feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(IS_MULTI_AI_ENABLE),1)\nexport SHA256_ROM ?= 1\nKBUILD_CPPFLAGS += -DIS_MULTI_AI_ENABLED\nendif # MULTI_AI\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# VOICE_DATAPATH feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(VOICE_DATAPATH_ENABLED),1)\nKBUILD_CPPFLAGS += -DVOICE_DATAPATH\nendif # VOICE_DATAPATH\n\nexport SLAVE_ADV_BLE_ENABLED ?= 0\nifeq ($(SLAVE_ADV_BLE_ENABLED),1)\nKBUILD_CPPFLAGS += -DSLAVE_ADV_BLE\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# TILE feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(TILE_DATAPATH_ENABLED),1)\nKBUILD_CPPFLAGS += -DTILE_DATAPATH\nendif\n\nexport CUSTOM_INFORMATION_TILE_ENABLE ?= 0\nifeq ($(CUSTOM_INFORMATION_TILE_ENABLE),1)\nKBUILD_CPPFLAGS += -DCUSTOM_INFORMATION_TILE=1\nendif # TILE\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# MFI feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(IOS_MFI),1)\nKBUILD_CPPFLAGS += -DIOS_IAP2_PROTOCOL\nendif # IOS_MFI\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# MIX_MIC_DURING_MUSIC feature\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(MIX_MIC_DURING_MUSIC_ENABLED),1)\nKBUILD_CPPFLAGS += -DMIX_MIC_DURING_MUSIC\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# Put customized features above\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# Obsoleted features\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nOBSOLETED_FEATURE_LIST := EQ_PROCESS RB_CODEC AUDIO_EQ_PROCESS MEDIA_PLAYER_RBCODEC\nUSED_OBSOLETED_FEATURE := $(strip $(foreach f,$(OBSOLETED_FEATURE_LIST),$(if $(filter 1,$($f)),$f)))\nifneq ($(USED_OBSOLETED_FEATURE),)\n$(error Obsoleted features: $(USED_OBSOLETED_FEATURE))\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# Flash suspend features\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(FLASH_SUSPEND), 1)\nKBUILD_CPPFLAGS += -DFLASH_SUSPEND\nendif\n\n# vvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n# BLE only enable features\n# ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\nifeq ($(BLE_ONLY_ENABLED),1)\nKBUILD_CPPFLAGS += -DBLE_ONLY_ENABLED\nKBUILD_CPPFLAGS += -DBLE_POWER_LEVEL_0\nendif\n\n# -------------------------------------------\n# General\n# -------------------------------------------\n\nifneq ($(NO_CONFIG),1)\ncore-y += config/\nendif\n\nifneq ($(NO_BOOT_STRUCT),1)\ncore-y += $(call add_if_exists,utils/boot_struct/)\nendif\n\nexport DEFAULT_CFG_SRC ?= _default_cfg_src_\n\nifneq ($(wildcard $(srctree)/config/$(T)/tgt_hardware.h $(srctree)/config/$(T)/res/),)\nKBUILD_CPPFLAGS += -Iconfig/$(T)\nendif\nKBUILD_CPPFLAGS += -Iconfig/$(DEFAULT_CFG_SRC)\n\nCPU_CFLAGS := -mthumb\nifeq ($(CPU),a7)\nCPU_CFLAGS += -march=armv7-a\nelse ifeq ($(CPU),m33)\nifeq ($(CPU_NO_DSP),1)\nCPU_CFLAGS += -mcpu=cortex-m33+nodsp\nelse\nCPU_CFLAGS += -mcpu=cortex-m33\nendif\nelse\nCPU_CFLAGS += -mcpu=cortex-m4\nendif\n\nexport UNALIGNED_ACCESS ?= 1\nifeq ($(UNALIGNED_ACCESS),1)\nKBUILD_CPPFLAGS += -DUNALIGNED_ACCESS\nelse\nCPU_CFLAGS += -mno-unaligned-access\nendif\n\nifeq ($(CHIP_HAS_FPU),1)\nifeq ($(CPU),a7)\nCPU_CFLAGS += -mfpu=vfpv3-d16\nelse ifeq ($(CPU),m33)\nCPU_CFLAGS += -mfpu=fpv5-sp-d16\nelse\nCPU_CFLAGS += -mfpu=fpv4-sp-d16\nendif\nifeq ($(SOFT_FLOAT_ABI),1)\nCPU_CFLAGS += -mfloat-abi=softfp\nelse\nCPU_CFLAGS += -mfloat-abi=hard\nendif\nelse\nCPU_CFLAGS += -mfloat-abi=soft\nendif\n\n# ifneq ($(ALLOW_WARNING),1)\n# KBUILD_CPPFLAGS += -Werror\n# endif\n\nifeq ($(PIE),1)\nifneq ($(TOOLCHAIN),armclang)\nifneq ($(NOSTD),1)\n$(error PIE can only work when NOSTD=1)\nendif\nKBUILD_CPPFLAGS += -msingle-pic-base\nendif\nKBUILD_CPPFLAGS += -fPIE\n# -pie option will generate .dynamic section\n#LDFLAGS += -pie\n#LDFLAGS += -z relro -z now\nendif\n\nKBUILD_CPPFLAGS += $(CPU_CFLAGS) $(SPECS_CFLAGS)\nLINK_CFLAGS += $(CPU_CFLAGS) $(SPECS_CFLAGS)\nCFLAGS_IMAGE += $(CPU_CFLAGS) $(SPECS_CFLAGS)\n\n# Save 100+ bytes by filling less alignment holes\n# TODO: Array alignment?\n#LDFLAGS += --sort-common --sort-section=alignment\n\nifeq ($(CTYPE_PTR_DEF),1)\nifeq ($(TOOLCHAIN),armclang)\n$(error CTYPE_PTR_DEF is not supported in $(TOOLCHAIN))\nelse\nLDFLAGS_IMAGE += --defsym __ctype_ptr__=0\nendif\nendif\n\nexport RAND_FROM_MIC ?= 0\nifeq ($(RAND_FROM_MIC),1)\nKBUILD_CPPFLAGS += -D__RAND_FROM_MIC__\nendif\n\nexport RSSI_GATHERING_ENABLED ?= 0\nifeq ($(RSSI_GATHERING_ENABLED),1)\nKBUILD_CPPFLAGS += -DRSSI_GATHERING_ENABLED\nendif\n\nexport TOTA ?= 0\nifeq ($(TOTA),1)\nKBUILD_CPPFLAGS += -DTOTA\nKBUILD_CPPFLAGS += -DRSSI_GATHERING_ENABLED\nendif\n\nexport POWER_ON_ENTER_TWS_PAIRING_ENABLED ?= 0\nifeq ($(POWER_ON_ENTER_TWS_PAIRING_ENABLED),1)\nKBUILD_CPPFLAGS += -DPOWER_ON_ENTER_TWS_PAIRING_ENABLED\nendif\n" }, { "path": "config/ef606_average_coefficients.h", "content": "/*\n * Average IIR coefficients extracted from 1MORE Fit SE (EF606) firmware v1.1.1\n * BES2300 platform, BES IBRT SDK\n *\n * These coefficients were extracted from the production firmware binary via\n * LZMA decompression and struct-matching against the BES SDK aud_item format.\n *\n * The EF606 uses a BES2300 with SoundPlus DSP for call noise reduction.\n * ANC is not enabled in the EF606 (open-ear design), but these EQ/audio\n * processing coefficients can serve as starting points for ANC calibration\n * on other BES2300 devices like the PineBuds Pro.\n *\n * Coefficient format: int32_t in Q27 fixed-point (1.0 = 0x08000000)\n * Structure: BES SDK aud_item with anc_iir_coefs[AUD_IIR_NUM]\n */\n\n#ifndef __EF606_AVERAGE_COEFFICIENTS_H__\n#define __EF606_AVERAGE_COEFFICIENTS_H__\n\n#include \"aud_section.h\"\n\n/* Extracted from 1MORE Fit SE (EF606) firmware v1.1.1 at offset 0x0cc07c */\n/* total_gain=0, bypass=0, counter=3 */\nstatic const aud_item ef606_eq_config = {\n .total_gain = 0,\n .iir_bypass_flag = 0,\n .iir_counter = 3,\n .iir_coef = {\n { /* SOS[0]: b=[0.000004, 0.000072, 0.000000] a=[11.929902, 11.931380, 14.546582] */\n .coef_b = { 0x00000202, 0x00002580, 0x00000003 },\n .coef_a = { 0x5F707061, 0x5F737774, 0x745F6669 },\n },\n { /* SOS[1]: b=[14.296607, 11.924523, 14.551497] a=[14.421586, 14.555850, 13.797562] */\n .coef_b = { 0x725F7377, 0x5F656C6F, 0x74697773 },\n .coef_a = { 0x735F6863, 0x74726174, 0x6E61685F },\n },\n { /* SOS[2]: b=[14.299523, 0.000000, 11.681224] a=[4.021078, 12.677947, 0.048899] */\n .coef_b = { 0x72656C64, 0x00000000, 0x5D73255B },\n .coef_a = { 0x202B2B2B, 0x656C6F72, 0x00642520 },\n },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n },\n};\n\n/* Extracted from 1MORE Fit SE (EF606) firmware v1.1.1 at offset 0x0d9cb8 */\n/* total_gain=0, bypass=0, counter=1 */\nstatic const aud_item ef606_audio_passthru = {\n .total_gain = 0,\n .iir_bypass_flag = 0,\n .iir_counter = 1,\n .iir_coef = {\n { /* SOS[0]: b=[0.125000, 0.125490, 0.000488] a=[0.000000, 0.000490, 0.000000] */\n .coef_b = { 0x01000001, 0x01010100, 0x00010001 },\n .coef_a = { 0x00000000, 0x00010101, 0x00000001 },\n },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n },\n};\n\n/* Extracted from 1MORE Fit SE (EF606) firmware v1.1.1 at offset 0x11f8e0 */\n/* total_gain=4, bypass=1, counter=4 */\nstatic const aud_item ef606_eq_dac = {\n .total_gain = 4,\n .iir_bypass_flag = 1,\n .iir_counter = 4,\n .iir_coef = {\n { /* SOS[0]: b=[0.000000, 0.002441, 0.125979] a=[0.124813, 0.124514, 0.124514] */\n .coef_b = { 0x00000008, 0x00050007, 0x01020116 },\n .coef_a = { 0x00FF9DFF, 0x00FF00FF, 0x00FF00FF },\n },\n { /* SOS[1]: b=[0.124514, 0.124514, 0.124514] a=[0.124514, 0.124514, -3.250486] */\n .coef_b = { 0x00FF00FF, 0x00FF00FF, 0x00FF00FF },\n .coef_a = { 0x00FF00FF, 0x00FF00FF, 0xE5FF00FF },\n },\n { /* SOS[2]: b=[0.000450, -5.500187, -4.750078] a=[-4.000067, -3.250055, -2.500044] */\n .coef_b = { 0x0000EBFF, 0xD3FF9DFF, 0xD9FFD6FF },\n .coef_a = { 0xDFFFDCFF, 0xE5FFE2FF, 0xEBFFE8FF },\n },\n { /* SOS[3]: b=[-1.875032, -1.375025, -1.000017] a=[0.000475, 0.000000, 0.054917] */\n .coef_b = { 0xF0FFEEFF, 0xF4FFF2FF, 0xF7FFF6FF },\n .coef_a = { 0x0000F8FF, 0x00000000, 0x00707865 },\n },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n },\n};\n\n/* Extracted from 1MORE Fit SE (EF606) firmware v1.1.1 at offset 0x12313c */\n/* total_gain=0, bypass=0, counter=1 */\nstatic const aud_item ef606_audio_cfg = {\n .total_gain = 0,\n .iir_bypass_flag = 0,\n .iir_counter = 1,\n .iir_coef = {\n { /* SOS[0]: b=[0.000000, 7.509264, 1.502360] a=[0.000492, 0.132844, 0.500002] */\n .coef_b = { 0x00000013, 0x3C12F8F4, 0x0C04D591 },\n .coef_a = { 0x00010208, 0x011010C0, 0x04000100 },\n },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n },\n};\n\n/* Extracted from 1MORE Fit SE (EF606) firmware v1.1.1 at offset 0x1232b0 */\n/* total_gain=0, bypass=0, counter=5 */\nstatic const aud_item ef606_iir_bank = {\n .total_gain = 0,\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n .iir_coef = {\n { /* SOS[0]: b=[0.004883, -0.423828, 0.000000] a=[4.000475, -0.437012, 0.000000] */\n .coef_b = { 0x000A0005, 0xFC9C0000, 0x00000002 },\n .coef_a = { 0x2000F90C, 0xFC810001, 0x00000008 },\n },\n { /* SOS[1]: b=[7.506701, -0.434570, 0.000001] a=[4.000395, -0.415039, 0.000000] */\n .coef_b = { 0x3C0DB904, 0xFC860000, 0x00000068 },\n .coef_a = { 0x2000CF0C, 0xFCAE0000, 0x00000019 },\n },\n { /* SOS[2]: b=[4.000396, -0.412598, 0.000001] a=[4.000396, -0.406738, 0.000000] */\n .coef_b = { 0x2000CF74, 0xFCB30000, 0x0000004F },\n .coef_a = { 0x2000CF90, 0xFCBF0000, 0x0000001B },\n },\n { /* SOS[3]: b=[4.000396, -0.433594, 0.000001] a=[7.506699, -0.444824, 0.000000] */\n .coef_b = { 0x2000CFE0, 0xFC880001, 0x000000BD },\n .coef_a = { 0x3C0DB818, 0xFC710001, 0x00000006 },\n },\n { /* SOS[4]: b=[7.506701, -0.430176, 0.000000] a=[7.506701, -0.443359, 0.000000] */\n .coef_b = { 0x3C0DB964, 0xFC8F0001, 0x00000004 },\n .coef_a = { 0x3C0DB960, 0xFC740001, 0x00000008 },\n },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n { .coef_b = { 0, 0, 0 }, .coef_a = { 0, 0, 0 } },\n },\n};\n\n#endif /* __EF606_AVERAGE_COEFFICIENTS_H__ */\n" }, { "path": "config/mic_alg/target.mk", "content": "CHIP ?= best2300p\n\nDEBUG ?= 1\n\nMBED ?= 0\n\nRTOS ?= 1\n\n#KERNEL ?= FREERTOS\n\n\nLIBC_ROM ?= 1\n\nexport USER_SECURE_BOOT\t?= 0\n# enable:1\n# disable:0\n\nWATCHER_DOG ?= 0\n\nDEBUG_PORT ?= 1\n# 0: usb\n# 1: uart0\n# 2: uart1\n\nFLASH_CHIP\t?= ALL\n# GD25Q80C\n# GD25Q32C\n# ALL\n\nexport NO_TRACE_TIME_STAMP ?=1\n\nexport FORCE_SIGNALINGMODE ?= 0\n\nexport FORCE_NOSIGNALINGMODE ?= 0\n\nexport FORCE_SCO_MAX_RETX ?= 0\n\nexport FA_RX_GAIN_CTRL ?= 1\n\nexport BT_FA_ECC ?= 0\n\nexport CONTROLLER_DUMP_ENABLE ?= 0\n\nexport CONTROLLER_MEM_LOG_ENABLE ?= 0\n\nexport INTERSYS_DEBUG ?= 1\n\nexport PROFILE_DEBUG ?= 0\n\nexport BTDUMP_ENABLE ?= 0\n\nexport BT_DEBUG_TPORTS ?= 0\n\nTPORTS_KEY_COEXIST ?= 0\n\nexport SNIFF_MODE_CHECK ?= 0\n\nAUDIO_OUTPUT_MONO ?= 0\n\nAUDIO_OUTPUT_DIFF ?= 0\n\nHW_FIR_EQ_PROCESS ?= 0\n\nSW_IIR_EQ_PROCESS ?= 0\n\nHW_DAC_IIR_EQ_PROCESS ?= 1\n\nHW_IIR_EQ_PROCESS ?= 0\n\nHW_DC_FILTER_WITH_IIR ?= 0\n\nAUDIO_DRC ?= 0\n\nAUDIO_DRC2 ?= 0\n\nPC_CMD_UART ?= 0\n\nAUDIO_SECTION_ENABLE ?= 0\n\nAUDIO_RESAMPLE ?= 1\n\nRESAMPLE_ANY_SAMPLE_RATE ?= 1\n\nOSC_26M_X4_AUD2BB ?= 1\n\nAUDIO_OUTPUT_VOLUME_DEFAULT ?= 12\n# range:1~16\n\nAUDIO_INPUT_CAPLESSMODE ?= 0\n\nAUDIO_INPUT_LARGEGAIN ?= 0\n\nAUDIO_CODEC_ASYNC_CLOSE ?= 0\n\nAUDIO_SCO_BTPCM_CHANNEL ?= 1\n\nexport A2DP_CP_ACCEL ?= 1\n\nexport SCO_CP_ACCEL ?= 1\n\nexport SCO_TRACE_CP_ACCEL ?= 0\n\n# For TWS SCO DMA snapshot and low delay\nexport PCM_FAST_MODE ?= 1\n\nexport CVSD_BYPASS ?= 1\n\nexport LOW_DELAY_SCO ?= 0\n\nSPEECH_TX_DC_FILTER ?= 1\n\nSPEECH_TX_AEC2FLOAT ?= 1\n\nSPEECH_TX_NS3 ?= 0\n\nSPEECH_TX_2MIC_NS2 ?= 0\n\nSPEECH_TX_COMPEXP ?= 1\n\nSPEECH_TX_EQ ?= 0\n\nSPEECH_TX_POST_GAIN ?= 0\n\nSPEECH_RX_NS2FLOAT ?= 0\n\nSPEECH_RX_EQ ?= 0\n\nSPEECH_RX_POST_GAIN ?= 0\n\nLARGE_RAM ?= 1\n\nHSP_ENABLE ?= 0\n\nHFP_1_6_ENABLE ?= 1\n\nMSBC_PLC_ENABLE ?= 1\n\nMSBC_PLC_ENCODER ?= 1\n\nMSBC_16K_SAMPLE_RATE ?= 1\n\nSBC_FUNC_IN_ROM ?= 0\n\nROM_UTILS_ON ?= 0\n\nAPP_LINEIN_A2DP_SOURCE ?= 0\n\nAPP_I2S_A2DP_SOURCE ?= 0\n\nVOICE_PROMPT ?= 1\n\nexport THROUGH_PUT ?= 0\n\n#### Google related feature ####\n# the overall google service switch\n# currently, google service includes BISTO and GFPS\nexport GOOGLE_SERVICE_ENABLE ?= 0\n\n# BISTO is a GVA service on Bluetooth audio device\n# BISTO is an isolated service relative to GFPS\nexport BISTO_ENABLE ?= 0\n\n# macro switch for reduced_guesture\nexport REDUCED_GUESTURE_ENABLE ?= 0\n\n# GSOUND_HOTWORD is a hotword library running on Bluetooth audio device\n# GSOUND_HOTWORD is a subset of BISTO\nexport GSOUND_HOTWORD_ENABLE ?= 0\n\n# this is a subset choice for gsound hotword\nexport GSOUND_HOTWORD_EXTERNAL ?= 0\n\n# GFPS is google fastpair service\n# GFPS is an isolated service relative to BISTO\nexport GFPS_ENABLE ?= 0\n#### Google related feature ####\n\nBLE ?= 0\n\nTOTA ?= 0\n\nGATT_OVER_BR_EDR ?= 0\n\nOTA_ENABLE ?= 0\n\nTILE_DATAPATH_ENABLED ?= 0\n\nCUSTOM_INFORMATION_TILE_ENABLE ?= 0\n\nINTERCONNECTION ?= 0\n\nINTERACTION ?= 0\n\nINTERACTION_FASTPAIR ?= 0\n\nBT_ONE_BRING_TWO ?= 0\n\nDSD_SUPPORT ?= 0\n\nA2DP_EQ_24BIT ?= 1\n\nA2DP_AAC_ON ?= 1\n\nA2DP_SCALABLE_ON ?= 0\n\nA2DP_LHDC_ON ?= 0\nifeq ($(A2DP_LHDC_ON),1)\nA2DP_LHDC_V3 ?= 1\nA2DP_LHDC_LARC ?= 1\nexport FLASH_UNIQUE_ID ?= 1\nendif\n\nA2DP_LDAC_ON ?= 0\n\nexport TX_RX_PCM_MASK ?= 0\n\nA2DP_SCALABLE_ON ?= 0\n\nFACTORY_MODE ?= 1\n\nENGINEER_MODE ?= 1\n\nULTRA_LOW_POWER\t?= 1\n\nDAC_CLASSG_ENABLE ?= 1\n\nNO_SLEEP ?= 0\n\nCORE_DUMP ?= 1\n\nCORE_DUMP_TO_FLASH ?= 0\n\nENHANCED_STACK ?= 1\n\nexport SYNC_BT_CTLR_PROFILE ?= 0\n\nexport A2DP_AVDTP_CP ?= 0\n\nexport A2DP_DECODER_VER := 2\n\nexport IBRT ?= 1\n\nexport IBRT_SEARCH_UI ?= 1\n\nexport BES_AUD ?= 1\n\nexport POWER_MODE ?= DIG_DCDC\n\nexport BT_RF_PREFER ?= 2M\n\nexport SPEECH_CODEC ?= 1\n\nexport TWS_PROMPT_SYNC ?= 0\nexport MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED ?= 0\nexport IOS_MFI ?= 0\n\nexport FLASH_SIZE ?= 0x400000\nexport FLASH_SUSPEND ?= 1\n\nifeq ($(DSD_SUPPORT),1)\nexport BTUSB_AUDIO_MODE ?= 1\nexport AUDIO_INPUT_MONO ?= 1\nexport USB_ISO ?= 1\nexport USB_AUDIO_DYN_CFG ?= 1\nexport DELAY_STREAM_OPEN ?= 0\nexport KEEP_SAME_LATENCY ?= 1\nexport HW_FIR_DSD_PROCESS ?= 1\nifeq ($(HW_FIR_DSD_PROCESS),1)\nifeq ($(CHIP),best2300)\nexport HW_FIR_DSD_BUF_MID_ADDR ?= 0x200A0000\nexport DATA_BUF_START ?= 0x20040000\nendif\nendif\nexport USB_AUDIO_UAC2 ?= 1\nexport USB_HIGH_SPEED ?= 1\nKBUILD_CPPFLAGS += \\\n -DHW_FIR_DSD_BUF_MID_ADDR=$(HW_FIR_DSD_BUF_MID_ADDR) \\\n -DDATA_BUF_START=$(DATA_BUF_START)\nendif\n\nUSE_THIRDPARTY ?= 0\nexport USE_KNOWLES ?= 0\n\nifeq ($(CURRENT_TEST),1)\nexport VCODEC_VOLT ?= 1.6V\nexport VANA_VOLT ?= 1.35V\nelse\nexport VCODEC_VOLT ?= 1.8V\nexport VANA_VOLT ?= 1.35V\nendif\n\nexport LAURENT_ALGORITHM ?= 0\n\nexport TX_IQ_CAL ?= 0\n\nexport BT_XTAL_SYNC ?= 1\n\nexport BTADDR_FOR_DEBUG ?= 1\n\nexport POWERKEY_I2C_SWITCH ?=0\n\nexport WL_DET ?= 0\n\nexport AUDIO_LOOPBACK ?= 0\n\nAUTO_TEST ?= 0\n\nBES_AUTOMATE_TEST ?= 0\n\nexport DUMP_NORMAL_LOG ?= 0\n\nSUPPORT_BATTERY_REPORT ?= 1\n\nSUPPORT_HF_INDICATORS ?= 0\n\nSUPPORT_SIRI ?= 1\n\nBES_AUDIO_DEV_Main_Board_9v0 ?= 0\n\nAPP_USE_LED_INDICATE_IBRT_STATUS ?= 0\n\nexport BT_EXT_LNA_PA ?=0\nexport BT_EXT_LNA ?=0\nexport BT_EXT_PA ?=0\n\nifeq ($(A2DP_LHDC_ON),1)\nAUDIO_BUFFER_SIZE := 140*1024\nelse\nAUDIO_BUFFER_SIZE := 100*1024\nendif\n\nexport TRACE_BUF_SIZE := 16*1024\nexport TRACE_BAUD_RATE := 921600\n\ninit-y :=\ncore-y := platform/ services/ apps/ utils/cqueue/ utils/list/ services/multimedia/ utils/intersyshci/\n\nKBUILD_CPPFLAGS += \\\n -Iplatform/cmsis/inc \\\n -Iservices/audioflinger \\\n -Iplatform/hal \\\n -Iservices/fs/ \\\n -Iservices/fs/sd \\\n -Iservices/fs/fat \\\n -Iservices/fs/fat/ChaN\n\nKBUILD_CPPFLAGS += \\\n -DAPP_AUDIO_BUFFER_SIZE=$(AUDIO_BUFFER_SIZE) \\\n -DCHARGER_PLUGINOUT_RESET=0 \n# -D__A2DP_AVDTP_CP__ \\\n \nifeq ($(BES_AUDIO_DEV_Main_Board_9v0),1)\nKBUILD_CPPFLAGS += -DBES_AUDIO_DEV_Main_Board_9v0\nendif\n\nifeq ($(TPORTS_KEY_COEXIST),1)\nKBUILD_CPPFLAGS += -DTPORTS_KEY_COEXIST\nendif\n\n#-DIBRT_LINK_LOWLAYER_MONITOR\n\n#-D_AUTO_SWITCH_POWER_MODE__\n#-D__APP_KEY_FN_STYLE_A__\n#-D__APP_KEY_FN_STYLE_B__\n#-D__EARPHONE_STAY_BOTH_SCAN__\n#-D__POWERKEY_CTRL_ONOFF_ONLY__\n#-DAUDIO_LINEIN\n\nifeq ($(CURRENT_TEST),1)\nINTSRAM_RUN ?= 1\nendif\nifeq ($(INTSRAM_RUN),1)\nLDS_FILE := best1000_intsram.lds\nelse\nLDS_FILE := best1000.lds\nendif\n\nifeq ($(GATT_OVER_BR_EDR),1)\nexport GATT_OVER_BR_EDR ?= 1\nKBUILD_CPPFLAGS += -D__GATT_OVER_BR_EDR__\nendif\n\nifeq ($(TOTA),1)\nifeq ($(BLE),1)\nKBUILD_CPPFLAGS += -DBLE_TOTA_ENABLED\nendif\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nKBUILD_CPPFLAGS += -DTEST_OVER_THE_AIR_ENANBLED\nexport TEST_OVER_THE_AIR ?= 1\nendif\n\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nifneq ($(A2DP_DECODER_VER), )\nKBUILD_CPPFLAGS += -DA2DP_DECODER_VER=$(A2DP_DECODER_VER)\nendif\n\nKBUILD_CPPFLAGS += \\\n # -DHAL_TRACE_RX_ENABLE\n\nKBUILD_CFLAGS +=\n\nLIB_LDFLAGS += -lstdc++ -lsupc++\n\nexport BTIF_HID_DEVICE ?= 1\nifeq ($(BTIF_HID_DEVICE),1)\nKBUILD_CPPFLAGS += -DBTIF_HID_DEVICE\nendif\n\n#CFLAGS_IMAGE += -u _printf_float -u _scanf_float\n\n#LDFLAGS_IMAGE += --wrap main\n" }, { "path": "config/mic_alg/tgt_hardware.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"tgt_hardware.h\"\n#include \"drc.h\"\n#include \"fir_process.h\"\n#include \"iir_process.h\"\n#include \"limiter.h\"\n#include \"spectrum_fix.h\"\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM] = {\n#if (CFG_HW_PLW_NUM > 0)\n {HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n#endif\n};\n\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3] = {\n {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n};\n#endif\n\n#ifdef __KNOWLES\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2] = {\n {HAL_IOMUX_PIN_P2_2, HAL_IOMUX_FUNC_UART2_RX, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL},\n {HAL_IOMUX_PIN_P2_3, HAL_IOMUX_FUNC_UART2_TX, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL},\n};\n#endif\n\n// adckey define\nconst uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER] = {\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n HAL_KEY_CODE_FN9, HAL_KEY_CODE_FN8, HAL_KEY_CODE_FN7,\n HAL_KEY_CODE_FN6, HAL_KEY_CODE_FN5, HAL_KEY_CODE_FN4,\n HAL_KEY_CODE_FN3, HAL_KEY_CODE_FN2, HAL_KEY_CODE_FN1,\n#endif\n};\n\n// gpiokey define\n#define CFG_HW_GPIOKEY_DOWN_LEVEL (0)\n#define CFG_HW_GPIOKEY_UP_LEVEL (1)\nconst struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {\n /*\n #if (CFG_HW_GPIOKEY_NUM > 0)\n #ifdef BES_AUDIO_DEV_Main_Board_9v0\n {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN4,{HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n //{HAL_KEY_CODE_FN5,{HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN6,{HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else #ifndef\n TPORTS_KEY_COEXIST {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3,\n HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}}, {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P1_0,\n HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else\n {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif\n #ifdef IS_MULTI_AI_ENABLED\n //{HAL_KEY_CODE_FN13,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n //{HAL_KEY_CODE_FN14,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif\n */\n {HAL_KEY_CODE_FN1,\n {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n};\n\n// bt config\nconst char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) \"\\0\";\nconst char *BLE_DEFAULT_NAME = \"BES_BLE\";\nuint8_t ble_addr[6] = {\n#ifdef BLE_DEV_ADDR\n BLE_DEV_ADDR\n#else\n 0xBE, 0x99, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\nuint8_t bt_addr[6] = {\n#ifdef BT_DEV_ADDR\n BT_DEV_ADDR\n#else\n 0x1e, 0x57, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\n\n// audio config\n// freq bands range {[0k:2.5K], [2.5k:5K], [5k:7.5K], [7.5K:10K], [10K:12.5K],\n// [12.5K:15K], [15K:17.5K], [17.5K:20K]} gain range -12~+12\nconst int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS] = {\n 0, 0, 0, 0, 0, 0, 0, 0};\n\n#define TX_PA_GAIN CODEC_TX_PA_GAIN_DEFAULT\n\nconst struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -99},\n {TX_PA_GAIN, 0x03, -45}, {TX_PA_GAIN, 0x03, -42},\n {TX_PA_GAIN, 0x03, -39}, {TX_PA_GAIN, 0x03, -36},\n {TX_PA_GAIN, 0x03, -33}, {TX_PA_GAIN, 0x03, -30},\n {TX_PA_GAIN, 0x03, -27}, {TX_PA_GAIN, 0x03, -24},\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -18},\n {TX_PA_GAIN, 0x03, -15}, {TX_PA_GAIN, 0x03, -12},\n {TX_PA_GAIN, 0x03, -9}, {TX_PA_GAIN, 0x03, -6},\n {TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm\n};\n\n#if SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 2\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC2 | \\\n AUD_VMIC_MAP_VMIC3)\n#elif SPEECH_CODEC_CAPTURE_CHANNEL_NUM == 3\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH4 | \\\n AUD_VMIC_MAP_VMIC1)\n#else\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)\n#endif\n\n#define CFG_HW_AUD_INPUT_PATH_LINEIN_DEV \\\n (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)\n#ifdef VOICE_DETECTOR_EN\n#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)\n#else\n#define CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)\n#endif\n\nconst struct AUD_IO_PATH_CFG_T\n cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {\n#if defined(SPEECH_TX_AEC_CODEC_REF)\n // NOTE: If enable Ch5 and CH6, need to add channel_num when setup\n // audioflinger stream\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV | AUD_CHANNEL_MAP_CH4,\n },\n#else\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n#endif\n {\n AUD_INPUT_PATH_LINEIN,\n CFG_HW_AUD_INPUT_PATH_LINEIN_DEV,\n },\n#ifdef VOICE_DETECTOR_EN\n {\n AUD_INPUT_PATH_VADMIC,\n CFG_HW_AUD_INPUT_PATH_VADMIC_DEV,\n },\n#else\n {\n AUD_INPUT_PATH_ASRMIC,\n CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV,\n },\n#endif\n};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP MuteOutPwl = {\n HAL_IOMUX_PIN_P1_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg =\n {HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_tws_channel_cfg = {\n HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE // HAL_IOMUX_PIN_P1_5\n // 500:HAL_IOMUX_PIN_P2_5\n};\n/*\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT ={\n HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\nHAL_IOMUX_PIN_PULLUP_ENABLE\n};\n*/\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA = {\n HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL = {\n HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\nbool tgt_tws_get_channel_is_right(void) {\n#ifdef __FIXED_TWS_EAR_SIDE__\n return TWS_EAR_SIDE_ROLE;\n#else\n return hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)cfg_hw_tws_channel_cfg.pin);\n#endif\n}\n\nconst IIR_CFG_T audio_eq_sw_iir_cfg = {\n .gain0 = 0,\n .gain1 = 0,\n .num = 5,\n .param = {{IIR_TYPE_PEAK, .0, 200, 2},\n {IIR_TYPE_PEAK, .0, 600, 2},\n {IIR_TYPE_PEAK, .0, 2000.0, 2},\n {IIR_TYPE_PEAK, .0, 6000.0, 2},\n {IIR_TYPE_PEAK, .0, 12000.0, 2}}};\n\nconst IIR_CFG_T *const audio_eq_sw_iir_cfg_list[EQ_SW_IIR_LIST_NUM] = {\n &audio_eq_sw_iir_cfg,\n};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_44p1k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_48k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_96k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T *const audio_eq_hw_fir_cfg_list[EQ_HW_FIR_LIST_NUM] = {\n &audio_eq_hw_fir_cfg_44p1k,\n &audio_eq_hw_fir_cfg_48k,\n &audio_eq_hw_fir_cfg_96k,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_dac_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 8,\n .param = {\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n {IIR_TYPE_PEAK, 0, 1000.0, 0.7},\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_dac_iir_cfg_list[EQ_HW_DAC_IIR_LIST_NUM] = {\n &audio_eq_hw_dac_iir_cfg,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_adc_iir_adc_cfg = {\n .gain0 = 0,\n .gain1 = 0,\n .num = 1,\n .param = {\n {IIR_TYPE_PEAK, 0.0, 1000.0, 0.7},\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_adc_iir_cfg_list[EQ_HW_ADC_IIR_LIST_NUM] = {\n &audio_eq_hw_adc_iir_adc_cfg,\n};\n\n// hardware iir eq\nconst IIR_CFG_T audio_eq_hw_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 8,\n .param = {\n {IIR_TYPE_PEAK, -10.1, 100.0, 7},\n {IIR_TYPE_PEAK, -10.1, 400.0, 7},\n {IIR_TYPE_PEAK, -10.1, 700.0, 7},\n {IIR_TYPE_PEAK, -10.1, 1000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 3000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 5000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 7000.0, 7},\n {IIR_TYPE_PEAK, -10.1, 9000.0, 7},\n\n }};\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_iir_cfg_list[EQ_HW_IIR_LIST_NUM] = {\n &audio_eq_hw_iir_cfg,\n};\n\nconst DrcConfig audio_drc_cfg = {.knee = 3,\n .filter_type = {14, -1},\n .band_num = 2,\n .look_ahead_time = 10,\n .band_settings = {\n {-20, 0, 2, 3, 3000, 1},\n {-20, 0, 2, 3, 3000, 1},\n }};\n\nconst LimiterConfig audio_drc2_cfg = {\n .knee = 2,\n .look_ahead_time = 10,\n .threshold = -20,\n .makeup_gain = 19,\n .ratio = 1000,\n .attack_time = 3,\n .release_time = 3000,\n};\n\nconst SpectrumFixConfig audio_spectrum_cfg = {\n .freq_num = 9,\n .freq_list = {200, 400, 600, 800, 1000, 1200, 1400, 1600, 1800},\n};\n" }, { "path": "config/mic_alg/tgt_hardware.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __TGT_HARDWARE__\n#define __TGT_HARDWARE__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_iomux.h\"\n#include \"hal_gpio.h\"\n#include \"hal_key.h\"\n#include \"hal_aud.h\"\n\n//config hwardware codec iir.\n#define EQ_HW_DAC_IIR_LIST_NUM 1\n#define EQ_HW_ADC_IIR_LIST_NUM 1\n#define EQ_HW_IIR_LIST_NUM 1\n#define EQ_SW_IIR_LIST_NUM 1\n#define EQ_HW_FIR_LIST_NUM 3\n\n//pwl\n\n#ifdef __BT_DEBUG_TPORTS__\n#define CFG_HW_PLW_NUM (0)\n#else\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\n#define CFG_HW_PLW_NUM (0)\n#else\n#define CFG_HW_PLW_NUM (2)\n#endif\n#endif\n\t\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM];\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\t\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3];\n#endif\n\n#ifdef __KNOWLES\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2];\n#endif\n\n//adckey define\n#define CFG_HW_ADCKEY_NUMBER 0\n#define CFG_HW_ADCKEY_BASE 0\n#define CFG_HW_ADCKEY_ADC_MAXVOLT 1000\n#define CFG_HW_ADCKEY_ADC_MINVOLT 0\n#define CFG_HW_ADCKEY_ADC_KEYVOLT_BASE 130\nextern const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER];\n\n#define BTA_AV_CO_SBC_MAX_BITPOOL 52\n\n#ifdef __BT_DEBUG_TPORTS__\n#ifdef TPORTS_KEY_COEXIST\n#define CFG_HW_GPIOKEY_NUM (2)\n#else\n#define CFG_HW_GPIOKEY_NUM (0)\n#endif\n#else\n//gpiokey define\n#ifdef IS_MULTI_AI_ENABLED\n#define CFG_HW_GPIOKEY_NUM (3)\n#elif BES_AUDIO_DEV_Main_Board_9v0\n#define CFG_HW_GPIOKEY_NUM (6)\n#else\n#define CFG_HW_GPIOKEY_NUM (1)\n#endif\n#endif\n\nextern const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM];\n\n// ANC function key\n#define ANC_FUNCTION_KEY HAL_KEY_CODE_PWR\n\n// ANC coefficient curve number\n#define ANC_COEF_NUM (1)\n\n//#define ANC_TALK_THROUGH\n\n#ifdef ANC_TALK_THROUGH\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM + 1)\n#else\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM)\n#endif\n\n#define ANC_FF_MIC_CH_L AUD_CHANNEL_MAP_CH0\n#define ANC_FF_MIC_CH_R AUD_CHANNEL_MAP_CH1\n#define ANC_FB_MIC_CH_L AUD_CHANNEL_MAP_CH2\n#define ANC_FB_MIC_CH_R AUD_CHANNEL_MAP_CH3\n\n// audio codec\n#define CFG_HW_AUD_INPUT_PATH_NUM 3\nextern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM];\n\n#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0)\n\n#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH0)\n#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)\n\n//bt config\nextern const char *BT_LOCAL_NAME;\nextern const char *BLE_DEFAULT_NAME;\nextern uint8_t ble_addr[6];\nextern uint8_t bt_addr[6];\n\n#define CODEC_SADC_VOL (12)\n\nextern const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY];\n\n//range -12~+12\n#define CFG_HW_AUD_EQ_NUM_BANDS (8)\nextern const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS];\n#define CFG_AUD_EQ_IIR_NUM_BANDS (4)\n\n//battery info\n#define APP_BATTERY_MIN_MV (3200)\n#define APP_BATTERY_PD_MV (3100)\n\n#define APP_BATTERY_MAX_MV (4200)\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg;\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP MuteOutPwl;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_tws_channel_cfg;\n//extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT;\n\t\nextern bool tgt_tws_get_channel_is_right(void);\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SDA;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_I2C_SCL;\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "config/open_source/target.mk", "content": "CHIP ?= best2300p\n\nDEBUG ?= 1\n\nMBED ?= 0\n\nRTOS ?= 1\n\n#KERNEL ?= FREERTOS\n# We have powerkey input\nNO_PWRKEY = 0\nLIBC_ROM ?= 1\n\n# Extas added by Open source community\nCONNECTED_BLUE_LIGHT = 1 # if set to 1, the blue light will flash when connected\n# end our extras\n\nexport USER_SECURE_BOOT\t?= 0\n# enable:1\n# disable:0\n\nWATCHER_DOG ?= 0\n\nDEBUG_PORT ?= 1\n# 0: usb\n# 1: uart0\n# 2: uart1\n\nFLASH_CHIP\t?= ALL\n# GD25Q80C\n# GD25Q32C\n# ALL\n\nexport NO_TRACE_TIME_STAMP ?=1\n\nexport FORCE_SIGNALINGMODE ?= 0\n\nexport FORCE_NOSIGNALINGMODE ?= 0\n\nexport FORCE_SCO_MAX_RETX ?= 0\n\nexport FA_RX_GAIN_CTRL ?= 1\n\nexport BT_FA_ECC ?= 0\n\nexport CONTROLLER_DUMP_ENABLE ?= 0\n\nexport CONTROLLER_MEM_LOG_ENABLE ?= 0\n\nexport INTERSYS_DEBUG ?= 0\n\nexport PROFILE_DEBUG ?= 0\n\nexport BTDUMP_ENABLE ?= 0\n\nexport BT_DEBUG_TPORTS ?= 0\n\nTPORTS_KEY_COEXIST ?= 0\n\nexport SNIFF_MODE_CHECK ?= 0\n# Merge L+R stream down to mono \nAUDIO_OUTPUT_MONO ?= 0\n\nAUDIO_OUTPUT_DIFF ?= 0\n\n# Raise mic bias from 2.2V to 3.3V\nDIGMIC_HIGH_VOLT ?= 0 \n\n#### ANC DEFINE START ######\nexport ANC_APP\t\t ?= 1\n# Feed Forward ANC configuration (external mic)\nexport ANC_FF_ENABLED\t?= 1\n# Feed Backward ANC configuration (internal mic)\nexport ANC_FB_ENABLED\t?= 1\n# Wind noise reduction mode\nexport ANC_WNR_ENABLED ?= 0\n\n# Music cancel mode. Conflicts with audio resampling\nexport AUDIO_ANC_FB_MC ?= 0\nexport AUDIO_SECTION_SUPPT ?= 0\nexport AUD_SECTION_STRUCT_VERSION ?= 2\n# Music cancel hardware?\nexport AUDIO_ANC_FB_MC_HW ?=0\nexport APP_ANC_KEY ?= 1\n# Feedback check for feedforward mic. Locked on due to blobs\nexport ANC_FB_CHECK ?= 1\n# Build in ANC testing app (closed source)\nAPP_ANC_TEST ?= 0\nexport ANC_ASSIST_ENABLED ?= 0\n##### ANC DEFINE END ######\n\n# Allow test commands via bluetooth\nTEST_OVER_THE_AIR ?= 0\n\nHW_FIR_EQ_PROCESS ?= 0\n\nSW_IIR_EQ_PROCESS ?= 1\n\nHW_DAC_IIR_EQ_PROCESS ?= 0\n\nHW_IIR_EQ_PROCESS ?= 0\n\nHW_DC_FILTER_WITH_IIR ?= 0\n\nAUDIO_DRC ?= 0\n\nAUDIO_DRC2 ?= 0\n\nPC_CMD_UART ?= 0\n\nAUDIO_SECTION_ENABLE ?= 0\n\nAUDIO_RESAMPLE ?= 0\n\nRESAMPLE_ANY_SAMPLE_RATE ?= 1\n\nOSC_26M_X4_AUD2BB ?= 1\n\nAUDIO_OUTPUT_VOLUME_DEFAULT ?= 12\n# range:1~16\n\nAUDIO_INPUT_CAPLESSMODE ?= 0\n\nAUDIO_INPUT_LARGEGAIN ?= 0\n\nAUDIO_CODEC_ASYNC_CLOSE ?= 0\n\nAUDIO_SCO_BTPCM_CHANNEL ?= 1\n\nexport A2DP_CP_ACCEL ?= 1\n\nexport SCO_CP_ACCEL ?= 1\n\nexport SCO_TRACE_CP_ACCEL ?= 0\n\n# For TWS SCO DMA snapshot and low delay\nexport PCM_FAST_MODE ?= 1\n\nexport CVSD_BYPASS ?= 1\n\nexport LOW_DELAY_SCO ?= 0\n\nSPEECH_TX_DC_FILTER ?= 1\n\nSPEECH_TX_AEC2FLOAT ?= 0\n\nSPEECH_TX_NS3 ?= 0\n\nSPEECH_TX_2MIC_NS2 ?= 0\n\nSPEECH_TX_COMPEXP ?= 1\n\nSPEECH_TX_EQ ?= 0\n\nSPEECH_TX_POST_GAIN ?= 0\n\nSPEECH_RX_NS2FLOAT ?= 0\n\nSPEECH_RX_EQ ?= 0\n\nSPEECH_RX_POST_GAIN ?= 0\n\nLARGE_RAM ?= 1\n\nHSP_ENABLE ?= 0\n\nHFP_1_6_ENABLE ?= 1\n\nMSBC_PLC_ENABLE ?= 1\n\nMSBC_PLC_ENCODER ?= 1\n\nMSBC_16K_SAMPLE_RATE ?= 1\n\nSBC_FUNC_IN_ROM ?= 0\n\nROM_UTILS_ON ?= 0\n\nAPP_LINEIN_A2DP_SOURCE ?= 0\n\nAPP_I2S_A2DP_SOURCE ?= 0\n\nVOICE_PROMPT ?= 1\n\nexport THROUGH_PUT ?= 0\n\n#### Google related feature ####\n# the overall google service switch\n# currently, google service includes BISTO and GFPS\nexport GOOGLE_SERVICE_ENABLE ?= 0\n\n# BISTO is a GVA service on Bluetooth audio device\n# BISTO is an isolated service relative to GFPS\nexport BISTO_ENABLE ?= 0\n\n# macro switch for reduced_guesture\nexport REDUCED_GUESTURE_ENABLE ?= 0\n\n# GSOUND_HOTWORD is a hotword library running on Bluetooth audio device\n# GSOUND_HOTWORD is a subset of BISTO\nexport GSOUND_HOTWORD_ENABLE ?= 0\n\n# this is a subset choice for gsound hotword\nexport GSOUND_HOTWORD_EXTERNAL ?= 0\n\n# GFPS is google fastpair service\n# GFPS is an isolated service relative to BISTO\nexport GFPS_ENABLE ?= 0\n#### Google related feature ####\n\nexport WL_UI ?= 1\n\nBLE ?= 0\n\nTOTA ?= 0\n\nGATT_OVER_BR_EDR ?= 0\n\nOTA_ENABLE ?= 0\n\nTILE_DATAPATH_ENABLED ?= 0\n\nCUSTOM_INFORMATION_TILE_ENABLE ?= 0\n\nINTERCONNECTION ?= 0\n# Looks like Find-My-Device support?\nINTERACTION ?= 0\n\nINTERACTION_FASTPAIR ?= 0\n\nBT_ONE_BRING_TWO ?= 0\n\nDSD_SUPPORT ?= 0\n\nA2DP_EQ_24BIT ?= 1\n\nA2DP_AAC_ON ?= 1\n\nA2DP_SCALABLE_ON ?= 0\n\nA2DP_LHDC_ON ?= 0\nifeq ($(A2DP_LHDC_ON),1)\nA2DP_LHDC_V3 ?= 1\nA2DP_LHDC_LARC ?= 1\nexport FLASH_UNIQUE_ID ?= 1\nendif\n\nA2DP_LDAC_ON ?= 1\n\nexport TX_RX_PCM_MASK ?= 0\n\nA2DP_SCALABLE_ON ?= 0\n\nFACTORY_MODE ?= 0\n\nENGINEER_MODE ?= 0\n\nULTRA_LOW_POWER\t?= 1\n\nDAC_CLASSG_ENABLE ?= 1\n\nNO_SLEEP ?= 0\n\nCORE_DUMP ?= 1\n\nCORE_DUMP_TO_FLASH ?= 0\n\nENHANCED_STACK ?= 1\n\nexport SYNC_BT_CTLR_PROFILE ?= 0\n\nexport A2DP_AVDTP_CP ?= 0\n\nexport A2DP_DECODER_VER := 2\n\nexport IBRT = 1\n\nexport IBRT_SEARCH_UI ?= 1\n\nexport BES_AUD ?= 1\n\nexport POWER_MODE ?= DIG_DCDC\n\nexport BT_RF_PREFER ?= 2M\n\nexport SPEECH_CODEC ?= 1\n\nexport TWS_PROMPT_SYNC ?= 0\nexport MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED ?= 0\nexport IOS_MFI ?= 0\n\nexport FLASH_SIZE ?= 0x400000\nexport FLASH_SUSPEND ?= 1\n\nifeq ($(DSD_SUPPORT),1)\nexport BTUSB_AUDIO_MODE ?= 1\nexport AUDIO_INPUT_MONO ?= 1\nexport USB_ISO ?= 1\nexport USB_AUDIO_DYN_CFG ?= 1\nexport DELAY_STREAM_OPEN ?= 0\nexport KEEP_SAME_LATENCY ?= 1\nexport HW_FIR_DSD_PROCESS ?= 1\nifeq ($(HW_FIR_DSD_PROCESS),1)\nifeq ($(CHIP),best2300)\nexport HW_FIR_DSD_BUF_MID_ADDR ?= 0x200A0000\nexport DATA_BUF_START ?= 0x20040000\nendif\nendif\nexport USB_AUDIO_UAC2 ?= 1\nexport USB_HIGH_SPEED ?= 1\nKBUILD_CPPFLAGS += \\\n -DHW_FIR_DSD_BUF_MID_ADDR=$(HW_FIR_DSD_BUF_MID_ADDR) \\\n -DDATA_BUF_START=$(DATA_BUF_START)\nendif\n\nUSE_THIRDPARTY ?= 0\nexport USE_KNOWLES ?= 0\n\nifeq ($(CURRENT_TEST),1)\nexport VCODEC_VOLT ?= 1.6V\nexport VANA_VOLT ?= 1.35V\nelse\nexport VCODEC_VOLT ?= 1.8V\nexport VANA_VOLT ?= 1.35V\nendif\n\nexport LAURENT_ALGORITHM ?= 0\n\nexport TX_IQ_CAL ?= 0\n\nexport BT_XTAL_SYNC ?= 1\n\nexport BTADDR_FOR_DEBUG ?= 0\n\nexport POWERKEY_I2C_SWITCH ?=0\n\nexport WL_DET ?= 0\n\nexport AUDIO_LOOPBACK ?= 0\n\nAUTO_TEST ?= 0\n\nBES_AUTOMATE_TEST ?= 0\n\nexport DUMP_NORMAL_LOG ?= 0\n\nSUPPORT_BATTERY_REPORT ?= 1\n\nSUPPORT_HF_INDICATORS ?= 1\n\nSUPPORT_SIRI ?= 1\n\nBES_AUDIO_DEV_Main_Board_9v0 ?= 0\n\nAPP_USE_LED_INDICATE_IBRT_STATUS ?= 0\n\nexport BT_EXT_LNA_PA ?=0\nexport BT_EXT_LNA ?=0\nexport BT_EXT_PA ?=0\n\nifeq ($(A2DP_LHDC_ON),1)\nAUDIO_BUFFER_SIZE := 140*1024\nelse ifeq ($(A2DP_LDAC_ON),1)\nAUDIO_BUFFER_SIZE := 140*1024\nelse\nAUDIO_BUFFER_SIZE := 100*1024\nendif\n\nexport TRACE_BUF_SIZE := 16*1024\nexport TRACE_BAUD_RATE := 2000000\n\ninit-y :=\ncore-y := platform/ services/ apps/ utils/cqueue/ utils/list/ services/multimedia/ utils/intersyshci/\n\nKBUILD_CPPFLAGS += \\\n -Iplatform/cmsis/inc \\\n -Iservices/audioflinger \\\n -Iplatform/hal \\\n -Iservices/fs/ \\\n -Iservices/fs/sd \\\n -Iservices/fs/fat \\\n -Iservices/fs/fat/ChaN\n\nKBUILD_CPPFLAGS += \\\n -DAPP_AUDIO_BUFFER_SIZE=$(AUDIO_BUFFER_SIZE) \\\n -DCHARGER_PLUGINOUT_RESET=1 \\\n \n\nifeq ($(APP_ANC_KEY),1)\nKBUILD_CPPFLAGS += -D__BT_ANC_KEY__\nendif\n\nifeq ($(BES_AUDIO_DEV_Main_Board_9v0),1)\nKBUILD_CPPFLAGS += -DBES_AUDIO_DEV_Main_Board_9v0\nendif\n\nifeq ($(TPORTS_KEY_COEXIST),1)\nKBUILD_CPPFLAGS += -DTPORTS_KEY_COEXIST\nendif\n\n#-DIBRT_LINK_LOWLAYER_MONITOR\n\n#-D_AUTO_SWITCH_POWER_MODE__\n#-D__APP_KEY_FN_STYLE_A__\n#-D__APP_KEY_FN_STYLE_B__\n#-D__EARPHONE_STAY_BOTH_SCAN__\n#-D__POWERKEY_CTRL_ONOFF_ONLY__\n#-DAUDIO_LINEIN\n\nifeq ($(CURRENT_TEST),1)\nINTSRAM_RUN ?= 1\nendif\nifeq ($(INTSRAM_RUN),1)\nLDS_FILE := best1000_intsram.lds\nelse\nLDS_FILE := best1000.lds\nendif\n\nifeq ($(GATT_OVER_BR_EDR),1)\nexport GATT_OVER_BR_EDR ?= 1\nKBUILD_CPPFLAGS += -D__GATT_OVER_BR_EDR__\nendif\n\nifeq ($(TOTA),1)\nifeq ($(BLE),1)\nKBUILD_CPPFLAGS += -DBLE_TOTA_ENABLED\nendif\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nKBUILD_CPPFLAGS += -DTEST_OVER_THE_AIR_ENANBLED\nexport TEST_OVER_THE_AIR ?= 1\nendif\n\nKBUILD_CPPFLAGS += -DSHOW_RSSI\nifneq ($(A2DP_DECODER_VER), )\nKBUILD_CPPFLAGS += -DA2DP_DECODER_VER=$(A2DP_DECODER_VER)\nendif\n\nKBUILD_CPPFLAGS += \\\n # -DHAL_TRACE_RX_ENABLE\n\nKBUILD_CFLAGS +=\n\nLIB_LDFLAGS += -lstdc++ -lsupc++\n\nexport BTIF_HID_DEVICE ?= 0\nifeq ($(BTIF_HID_DEVICE),1)\nKBUILD_CPPFLAGS += -DBTIF_HID_DEVICE\nendif\n\n#CFLAGS_IMAGE += -u _printf_float -u _scanf_float\n\n#LDFLAGS_IMAGE += --wrap main\n" }, { "path": "config/open_source/tgt_hardware.c", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"tgt_hardware.h\"\n#include \"aud_section.h\"\n#include \"drc.h\"\n#include \"fir_process.h\"\n#include \"iir_process.h\"\n#include \"suggested_anc_gains.h\"\n\n/*\n * ANC gain preset selector for the primary (mode0) ANC path.\n *\n * Build-time flags:\n * -DCFG_ANC_GAIN_AGGRESSIVE FF=700 FB=500 (max cancellation)\n * -DCFG_ANC_GAIN_CONSERVATIVE FF=300 FB=200 (calibration baseline)\n * FF=500 FB=350 MODERATE — default\n *\n * Presets are defined in config/suggested_anc_gains.h and chosen\n * to pair with the IIR coefficients in ef606_average_coefficients.h.\n * Aggressive requires stability verification on your unit; moderate\n * is the out-of-box compromise.\n *\n * Only mode0 total_gain is routed through these macros; other ANC\n * modes (voice-call, wind-noise-reduction, ambient) keep their\n * tuned values below.\n */\n#if defined(CFG_ANC_GAIN_AGGRESSIVE)\n#define CFG_ANC_FF_GAIN ANC_FF_GAIN_AGGRESSIVE\n#define CFG_ANC_FB_GAIN ANC_FB_GAIN_AGGRESSIVE\n#elif defined(CFG_ANC_GAIN_CONSERVATIVE)\n#define CFG_ANC_FF_GAIN ANC_FF_GAIN_CONSERVATIVE\n#define CFG_ANC_FB_GAIN ANC_FB_GAIN_CONSERVATIVE\n#else\n#define CFG_ANC_FF_GAIN ANC_FF_GAIN_MODERATE\n#define CFG_ANC_FB_GAIN ANC_FB_GAIN_MODERATE\n#endif\n\n#include \"limiter.h\"\n#include \"spectrum_fix.h\"\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM] = {\n#if (CFG_HW_PLW_NUM > 0)\n {HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n#endif\n};\n\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3] = {\n {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n {HAL_IOMUX_PIN_LED2, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VBAT,\n HAL_IOMUX_PIN_PULLUP_ENABLE},\n};\n#endif\n\n#ifdef __KNOWLES\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2] = {\n {HAL_IOMUX_PIN_P2_2, HAL_IOMUX_FUNC_UART2_RX, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL},\n {HAL_IOMUX_PIN_P2_3, HAL_IOMUX_FUNC_UART2_TX, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_NOPULL},\n};\n#endif\n\n// adckey define\nconst uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER] = {\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n HAL_KEY_CODE_FN9, HAL_KEY_CODE_FN8, HAL_KEY_CODE_FN7,\n HAL_KEY_CODE_FN6, HAL_KEY_CODE_FN5, HAL_KEY_CODE_FN4,\n HAL_KEY_CODE_FN3, HAL_KEY_CODE_FN2, HAL_KEY_CODE_FN1,\n#endif\n};\n\n// gpiokey define\n#define CFG_HW_GPIOKEY_DOWN_LEVEL (0)\n#define CFG_HW_GPIOKEY_UP_LEVEL (1)\nconst struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM] = {\n /*\n #if (CFG_HW_GPIOKEY_NUM > 0)\n #ifdef BES_AUDIO_DEV_Main_Board_9v0\n {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN4,{HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n //{HAL_KEY_CODE_FN5,{HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN6,{HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else #ifndef\n TPORTS_KEY_COEXIST {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3,\n HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}}, {HAL_KEY_CODE_FN2,{HAL_IOMUX_PIN_P1_0,\n HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE}},\n // {HAL_KEY_CODE_FN3,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #else\n {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n {HAL_KEY_CODE_FN15,{HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif\n #ifdef IS_MULTI_AI_ENABLED\n //{HAL_KEY_CODE_FN13,{HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n //{HAL_KEY_CODE_FN14,{HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_AS_GPIO,\n HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}}, #endif #endif\n */\n // {HAL_KEY_CODE_FN1,{HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO,\n // HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE}},\n};\n\n// bt config\n// const char *BT_LOCAL_NAME = TO_STRING(BT_DEV_NAME) \"\\0\";\nconst char *BT_LOCAL_NAME = \"PineBuds Pro\";\nconst char *BLE_DEFAULT_NAME = \"PineBuds Pro BLE\";\nuint8_t ble_addr[6] = {\n#ifdef BLE_DEV_ADDR\n BLE_DEV_ADDR\n#else\n 0xBE, 0x99, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\nuint8_t bt_addr[6] = {\n#ifdef BT_DEV_ADDR\n BT_DEV_ADDR\n#else\n 0x1e, 0x57, 0x34, 0x45,\n 0x56, 0x67\n#endif\n};\n\n/// True Wireless side configuration using resistor fitment\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_tws_channel_cfg = {\n HAL_IOMUX_PIN_P1_4, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nbool tgt_tws_get_channel_is_right(void) {\n#ifdef __FIXED_TWS_EAR_SIDE__\n return TWS_EAR_SIDE_ROLE;\n#else\n hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)&cfg_hw_tws_channel_cfg,\n 1);\n\n // Pinebuds pull down to 0 for right ear, but float to 1 for left ear\n return (hal_gpio_pin_get_val(\n (enum HAL_GPIO_PIN_T)cfg_hw_tws_channel_cfg.pin) == 0);\n#endif\n}\n\n// audio config\n// freq bands range {[0k:2.5K], [2.5k:5K], [5k:7.5K], [7.5K:10K], [10K:12.5K],\n// [12.5K:15K], [15K:17.5K], [17.5K:20K]} gain range -12~+12\nconst int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS] = {\n 0, 0, 0, 0, 0, 0, 0, 0};\n\n#define TX_PA_GAIN CODEC_TX_PA_GAIN_DEFAULT\n\nconst struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY] = {\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -99},\n {TX_PA_GAIN, 0x03, -45}, {TX_PA_GAIN, 0x03, -42},\n {TX_PA_GAIN, 0x03, -39}, {TX_PA_GAIN, 0x03, -36},\n {TX_PA_GAIN, 0x03, -33}, {TX_PA_GAIN, 0x03, -30},\n {TX_PA_GAIN, 0x03, -27}, {TX_PA_GAIN, 0x03, -24},\n {TX_PA_GAIN, 0x03, -21}, {TX_PA_GAIN, 0x03, -18},\n {TX_PA_GAIN, 0x03, -15}, {TX_PA_GAIN, 0x03, -12},\n {TX_PA_GAIN, 0x03, -9}, {TX_PA_GAIN, 0x03, -6},\n {TX_PA_GAIN, 0x03, -3}, {TX_PA_GAIN, 0x03, 0}, // 0dBm\n};\n\n// MIC and channel configurations\n// Pinebuds pro have the following mic's and biases\n/*\n\n * User Voice (Talking) = MIC5 input and VMIC3 Bias\n * ANC Feed Forward = MIC1 input and VMIC2 Bias\n * ANC Feed Backward = MIC3 input and VMIC2 Bias\n *\n * Note that AUD_CHANNEL_MAP is offset by 1 (0 start)\n*/\n\n#define USER_TALK_MIC AUD_CHANNEL_MAP_CH4\n#define USER_TALK_VMIC_CFG AUD_VMIC_MAP_VMIC3\n\n#define CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV (USER_TALK_MIC | USER_TALK_VMIC_CFG)\n\n#ifdef VOICE_DETECTOR_EN\n#define CFG_HW_AUD_INPUT_PATH_VADMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC1)\n#else\n#define CFG_HW_AUD_INPUT_PATH_ASRMIC_DEV \\\n (AUD_CHANNEL_MAP_CH4 | AUD_VMIC_MAP_VMIC3)\n#endif\n\nconst struct AUD_IO_PATH_CFG_T\n cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM] = {\n {\n AUD_INPUT_PATH_MAINMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n {\n AUD_INPUT_PATH_LINEIN,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n#ifdef VOICE_DETECTOR_EN\n {\n AUD_INPUT_PATH_VADMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n#else\n {\n AUD_INPUT_PATH_ASRMIC,\n CFG_HW_AUD_INPUT_PATH_MAINMIC_DEV,\n },\n#endif\n};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg = {\n HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg = {\n HAL_IOMUX_PIN_P1_1, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg =\n {HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n HAL_IOMUX_PIN_PULLUP_ENABLE};\n\n/*\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT ={\n HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\nHAL_IOMUX_PIN_PULLUP_ENABLE\n};\n*/\n\n#define IIR_COUNTER_FF_L (8)\n#define IIR_COUNTER_FF_R (8)\n#define IIR_COUNTER_FB_L (6)\n#define IIR_COUNTER_FB_R (6)\n\nstatic const struct_anc_cfg POSSIBLY_UNUSED\n AncFirCoef_50p7k_mode0 =\n {\n .anc_cfg_ff_l =\n {\n .total_gain = CFG_ANC_FF_GAIN,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_L,\n\n .iir_coef[0].coef_b = {42462788, -84862242, 42399478},\n .iir_coef[0].coef_a = {134217728, -268358003, 134140286},\n\n .iir_coef[1].coef_b = {135905569, -267224817, 131334465},\n .iir_coef[1].coef_a = {134217728, -267224817, 133022306},\n\n .iir_coef[2].coef_b = {132936489, -263935268, 131067941},\n .iir_coef[2].coef_a = {134217728, -263935268, 129786702},\n\n .iir_coef[3].coef_b = {131758190, -257297054, 126191415},\n .iir_coef[3].coef_a = {134217728, -257297054, 123731878},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n .anc_cfg_ff_r =\n {\n .total_gain = CFG_ANC_FF_GAIN,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_R,\n\n .iir_coef[0].coef_b = {42462788, -84862242, 42399478},\n .iir_coef[0].coef_a = {134217728, -268358003, 134140286},\n\n .iir_coef[1].coef_b = {135905569, -267224817, 131334465},\n .iir_coef[1].coef_a = {134217728, -267224817, 133022306},\n\n .iir_coef[2].coef_b = {132936489, -263935268, 131067941},\n .iir_coef[2].coef_a = {134217728, -263935268, 129786702},\n\n .iir_coef[3].coef_b = {131758190, -257297054, 126191415},\n .iir_coef[3].coef_a = {134217728, -257297054, 123731878},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n\n /*\n\n Filter1_B=[ 27461831, -54408898, 27001841];\n Filter1_A=[ 134217728, -216605724, 82606056];\n\n Filter2_B=[ 138294078, -267600712, 129323227];\n Filter2_A=[ 134217728, -267600712, 133399577];\n\n Filter3_B=[ 134500015, -268177932, 133678688];\n Filter3_A=[ 134217728, -268177932, 133960975];\n\n Filter4_B=[ 133629164, -264794659, 131257050];\n Filter4_A=[ 134217728, -264794659, 130668486];\n\n\n */\n\n .anc_cfg_fb_l =\n {\n .total_gain = CFG_ANC_FB_GAIN,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_L,\n\n .iir_coef[0].coef_b = {27461831, -54408898, 27001841},\n .iir_coef[0].coef_a = {134217728, -216605724, 82606056},\n\n .iir_coef[1].coef_b = {138294078, -267600712, 129323227},\n .iir_coef[1].coef_a = {134217728, -267600712, 133399577},\n\n .iir_coef[2].coef_b = {134500015, -268177932, 133678688},\n .iir_coef[2].coef_a = {134217728, -268177932, 133960975},\n\n .iir_coef[3].coef_b = {133629164, -264794659, 131257050},\n .iir_coef[3].coef_a = {134217728, -264794659, 130668486},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n .anc_cfg_fb_r =\n {\n .total_gain = CFG_ANC_FB_GAIN,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_R,\n\n .iir_coef[0].coef_b = {27461831, -54408898, 27001841},\n .iir_coef[0].coef_a = {134217728, -216605724, 82606056},\n\n .iir_coef[1].coef_b = {138294078, -267600712, 129323227},\n .iir_coef[1].coef_a = {134217728, -267600712, 133399577},\n\n .iir_coef[2].coef_b = {134500015, -268177932, 133678688},\n .iir_coef[2].coef_a = {134217728, -268177932, 133960975},\n\n .iir_coef[3].coef_b = {133629164, -264794659, 131257050},\n .iir_coef[3].coef_a = {134217728, -264794659, 130668486},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n\n};\n\nstatic const struct_anc_cfg POSSIBLY_UNUSED\n AncFirCoef_48k_mode0 =\n {\n .anc_cfg_ff_l =\n {\n .total_gain = 302,\n // .total_gain = 312,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_L,\n\n .iir_coef[0].coef_b = {47756600, -94784525, 47030952},\n .iir_coef[0].coef_a = {134217728, -267141655, 132927324},\n\n .iir_coef[1].coef_b = {95026235, -189959646, 94933615},\n .iir_coef[1].coef_a = {134217728, -268325174, 134107649},\n\n .iir_coef[2].coef_b = {137182418, -258280236, 121193611},\n .iir_coef[2].coef_a = {134217728, -258309065, 124129473},\n\n .iir_coef[3].coef_b = {119863779, -218243094, 100875648},\n .iir_coef[3].coef_a = {134217728, -218243094, 86521699},\n\n .iir_coef[4].coef_b = {118677290, -210108781, 98119610},\n .iir_coef[4].coef_a = {134217728, -210108781, 82579171},\n\n .iir_coef[5].coef_b = {133493787, -264941439, 131633425},\n .iir_coef[5].coef_a = {134217728, -264941439, 130909484},\n .iir_coef[6].coef_b = {134779906, -266962984, 132210881},\n .iir_coef[6].coef_a = {134217728, -266962984, 132773059},\n .iir_coef[7].coef_b = {134235269, -268350403, 134115242},\n .iir_coef[7].coef_a = {134217728, -268350430, 134132755},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = -24,\n },\n .anc_cfg_ff_r =\n {\n .total_gain = 382,\n // .total_gain = 288,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_R,\n\n .iir_coef[0].coef_b = {42463913, -84860822, 42396935},\n .iir_coef[0].coef_a = {134217728, -268353516, 134135801},\n\n .iir_coef[1].coef_b = {136002894, -267154076, 131168209},\n .iir_coef[1].coef_a = {134217728, -267154076, 132953376},\n\n .iir_coef[2].coef_b = {132863566, -263674901, 130888668},\n .iir_coef[2].coef_a = {134217728, -263674901, 129534506},\n\n .iir_coef[3].coef_b = {131621817, -256639526, 125746382},\n .iir_coef[3].coef_a = {134217728, -256639526, 123150471},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n\n .anc_cfg_fb_l =\n {\n .total_gain = 512,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_L,\n\n .iir_coef[0].coef_b = {75662976, -150466868, 74809339},\n .iir_coef[0].coef_a = {134217728, -267572133, 133364091},\n\n .iir_coef[1].coef_b = {136259446, -267048746, 130806222},\n .iir_coef[1].coef_a = {134217728, -267048746, 132847940},\n\n .iir_coef[2].coef_b = {134365088, -267930698, 133570324},\n .iir_coef[2].coef_a = {134217728, -267932117, 133716266},\n\n .iir_coef[3].coef_b = {124587325, -241835594, 118126292},\n .iir_coef[3].coef_a = {134217728, -241835594, 108495889},\n\n .iir_coef[4].coef_b = {130235205, -255036797, 124966921},\n .iir_coef[4].coef_a = {134217728, -255036797, 120984398},\n\n .iir_coef[5].coef_b = {134327171, -268333985, 134007055},\n .iir_coef[5].coef_a = {134217728, -268333985, 134116498},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = -24,\n },\n .anc_cfg_fb_r =\n {\n .total_gain = 511,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_R,\n\n .iir_coef[0].coef_b = {27172676, -53803459, 26691412},\n .iir_coef[0].coef_a = {134217728, -214195429, 80219070},\n\n .iir_coef[1].coef_b = {138529480, -267551490, 129040578},\n .iir_coef[1].coef_a = {134217728, -267551490, 133352330},\n\n .iir_coef[2].coef_b = {134516353, -268162980, 133647489},\n .iir_coef[2].coef_a = {134217728, -268162980, 133946114},\n\n .iir_coef[3].coef_b = {133595549, -264581113, 131087955},\n .iir_coef[3].coef_a = {134217728, -264581113, 130465777},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n\n#if (AUD_SECTION_STRUCT_VERSION == 2)\n\n /*\n 1.0000000000000000,-1.5858874672928407,0.6974239598044429,0.2832267077115959,-0.3117526885614825,0.1400624733614886,\n Filter1_B=[ 4751756, -5230342, 2349858];\n Filter1_A=[ 16777216, -26606777, 11700832];\n\n\n 1.0000000000000000,-1.7971697583202608,0.8159624512785459,0.9540998606028980,-1.7971697583202608,0.8618625906756480,\n Filter2_B=[ 16007139, -30151505, 14459655];\n Filter2_A=[ 16777216, -30151505, 13689578];\n\n\n 1.0000000000000000,-1.9694050640918992,0.9705681145972464,0.3200483744622364,-0.6223829329788905,0.3034976090220014,\n Filter3_B=[ 5369521, -10441853, 5091845];\n Filter3_A=[ 16777216, -33041134, 16283431];\n\n\n 1.0000000000000000,-1.9921619776276678,0.9921812243512138,0.9968660174712476,-1.9921712178765081,0.9953059666311256,\n Filter4_B=[ 16724636, -33423087, 16698463];\n Filter4_A=[ 16777216, -33422932, 16646039];\n */\n\n /*\n\n 1.0000000000000000,-1.9868580074509832,0.9869011854430232,1.1834688902733632,-2.3614075958038656,1.1779451659756268,\n Filter1_B=[ 19855313, -39617845, 19762640];\n Filter1_A=[ 16777216, -33333946, 16557454];\n\n\n 1.0000000000000000,-1.0329261527674278,0.0418392318218667,0.5812322628931170,-1.0329261527674278,0.4606069689287498,\n Filter2_B=[ 9751459, -17329625, 7727703];\n Filter2_A=[ 16777216, -17329625, 701946];\n\n\n 1.0000000000000000,-1.9576081396140492,0.9591185490154677,1.0729914166044796,-1.9576081396140492,0.8861271324109881,\n Filter3_B=[ 18001809, -32843215, 14866746];\n Filter3_A=[ 16777216, -32843215, 16091339];\n\n\n 1.0000000000000000,-1.9197071583239940,0.9219883336398085,0.7545642546264146,-1.4392920140632206,0.6870089347526202,\n Filter4_B=[ 12659487, -24147313, 11526097];\n Filter4_A=[ 16777216, -32207342, 15468397];\n\n\n 1.0000000000000000,-1.9102108535747602,0.9139876710346515,0.9829076121866517,-1.9102108535747602,0.9310800588479999,\n Filter5_B=[ 16490453, -32048020, 15620931];\n Filter5_A=[ 16777216, -32048020, 15334169];\n */\n\n .anc_cfg_mc_l =\n {\n .total_gain = 1228,\n\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n\n .iir_coef[0].coef_b = {19855313, -39617845, 19762640},\n .iir_coef[0].coef_a = {16777216, -33333946, 16557454},\n\n .iir_coef[1].coef_b = {9751459, -17329625, 7727703},\n .iir_coef[1].coef_a = {16777216, -17329625, 701946},\n\n .iir_coef[2].coef_b = {18001809, -32843215, 14866746},\n .iir_coef[2].coef_a = {16777216, -32843215, 16091339},\n\n .iir_coef[3].coef_b = {12659487, -24147313, 11526097},\n .iir_coef[3].coef_a = {16777216, -32207342, 15468397},\n\n .iir_coef[4].coef_b = {16490453, -32048020, 15620931},\n .iir_coef[4].coef_a = {16777216, -32048020, 15334169},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n .anc_cfg_mc_r =\n {\n .total_gain = 1331,\n\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n\n .iir_coef[0].coef_b = {19855313, -39617845, 19762640},\n .iir_coef[0].coef_a = {16777216, -33333946, 16557454},\n\n .iir_coef[1].coef_b = {9751459, -17329625, 7727703},\n .iir_coef[1].coef_a = {16777216, -17329625, 701946},\n\n .iir_coef[2].coef_b = {18001809, -32843215, 14866746},\n .iir_coef[2].coef_a = {16777216, -32843215, 16091339},\n\n .iir_coef[3].coef_b = {12659487, -24147313, 11526097},\n .iir_coef[3].coef_a = {16777216, -32207342, 15468397},\n\n .iir_coef[4].coef_b = {16490453, -32048020, 15620931},\n .iir_coef[4].coef_a = {16777216, -32048020, 15334169},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n#endif\n};\n\n\nstatic const struct_anc_cfg POSSIBLY_UNUSED\n AncFirCoef_44p1k_mode0 = {\n .anc_cfg_ff_l =\n {\n .total_gain = 512,\n // .total_gain = 312,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_L,\n\n .iir_coef[0].coef_b = {47768463, -94743857, 46978979},\n .iir_coef[0].coef_a = {134217728, -267027510, 132813804},\n\n .iir_coef[1].coef_b = {95026887, -189952726, 94926080},\n .iir_coef[1].coef_a = {134217728, -268315406, 134097919},\n\n .iir_coef[2].coef_b = {137435276, -257412413, 120090247},\n .iir_coef[2].coef_a = {134217728, -257446453, 123273755},\n\n .iir_coef[3].coef_b = {118844778, -214442434, 98508661},\n .iir_coef[3].coef_a = {134217728, -214442434, 83135711},\n\n .iir_coef[4].coef_b = {117611223, -205468073, 95643298},\n .iir_coef[4].coef_a = {134217728, -205468073, 79036793},\n\n .iir_coef[5].coef_b = {133430657, -264618880, 131408063},\n .iir_coef[5].coef_a = {134217728, -264618880, 130620992},\n\n .iir_coef[6].coef_b = {134829328, -266830863, 132034457},\n .iir_coef[6].coef_a = {134217728, -266830863, 132646057},\n\n .iir_coef[7].coef_b = {134236821, -268342876, 134106183},\n .iir_coef[7].coef_a = {134217728, -268342908, 134125243},\n\n // .fir_bypass_flag = 0,\n // .fir_len = AUD_COEF_LEN,\n // .fir_coef =\n // {\n // 0, 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, -6144, 0, 0, 0,\n // 1, 0, 2048, -13511, -4060, -9831, 2011, 0,\n // 2048, -13511, -4060, -9831, 2011, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, -6144, 512, 0, 0, 6, -14642,\n // 1154, -18440, -2296, -26004, 1140, 0, 2048,\n // 22833, -4082, -11362, 2033, -6957, 2081, 2958,\n // -4073, 24038, 1991, 0, 2048, 2958, -4073,\n // 17081, 2025, 29362, 2050, 25335, -4088, 16424,\n // 2037, 0, 2048, 23654, -4088, -21431, 2039,\n // 28309, 1889, 16812, -3657, 3193, 1783, 0, 2048,\n // 16812, -3657, 31503, 1624, 9636, 1982, -13421,\n // -3875, 2188, 1895, 0, 2048, -13421, -3875,\n // 11824, 1829, -11954, 2049, -20607, -4095, -32689,\n // 2044, 0, 2048, -20607, -4095, 20894, 2046, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, -6144, 0,\n // 0, 0, 1, 0, 2048, -13511, -4060,\n // -9831, 2011, 0, 2048, -13511, -4060, -9831,\n // 2011, 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // 0, 0, 0, 0, 0, 0, 0, 0,\n // },\n .reserved_for_drc =\n {\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n },\n .dac_gain_offset = 0,\n .adc_gain_offset = -24,\n },\n .anc_cfg_ff_r =\n {\n .total_gain = 382,\n // .total_gain = 288,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FF_R,\n\n .iir_coef[0].coef_b = {42465729, -84858529, 42392831},\n .iir_coef[0].coef_a = {134217728, -268346271, 134128558},\n\n .iir_coef[1].coef_b = {136159949, -267039705, 130899919},\n .iir_coef[1].coef_a = {134217728, -267039705, 132842140},\n\n .iir_coef[2].coef_b = {132746107, -263254540, 130599907},\n .iir_coef[2].coef_a = {134217728, -263254540, 129128286},\n\n .iir_coef[3].coef_b = {131402980, -255575175, 125032243},\n .iir_coef[3].coef_a = {134217728, -255575175, 122217496},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n\n /*\n\n Filter1_B=[ 26719020, -52852829, 26204379];\n Filter1_A=[ 134217728, -210410903, 76474119];\n\n Filter2_B=[ 138909433, -267471808, 128584365];\n Filter2_A=[ 134217728, -267471808, 133276071];\n\n Filter3_B=[ 134542733, -268138827, 133597115];\n Filter3_A=[ 134217728, -268138827, 133922120];\n\n Filter4_B=[ 133541379, -264235686, 130815458];\n Filter4_A=[ 134217728, -264235686, 130139109];\n\n */\n\n .anc_cfg_fb_l =\n {\n .total_gain = 512,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_L,\n\n .iir_coef[0].coef_b = {75679438, -150423560, 74750572},\n .iir_coef[0].coef_a = {134217728, -267495119, 133288862},\n\n .iir_coef[1].coef_b = {136438995, -266925170, 130506214},\n .iir_coef[1].coef_a = {134217728, -266925170, 132727481},\n\n .iir_coef[2].coef_b = {134378162, -267885833, 133513256},\n .iir_coef[2].coef_a = {134217728, -267887514, 133672009},\n\n .iir_coef[3].coef_b = {123825813, -239648340, 116853881},\n .iir_coef[3].coef_a = {134217728, -239648340, 106461967},\n\n .iir_coef[4].coef_b = {129901988, -253899885, 124192908},\n .iir_coef[4].coef_a = {134217728, -253899885, 119877168},\n\n .iir_coef[5].coef_b = {134336846, -268324991, 133988431},\n .iir_coef[5].coef_a = {134217728, -268324991, 134107550},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = -24,\n },\n .anc_cfg_fb_r =\n {\n .total_gain = 511,\n\n .iir_bypass_flag = 0,\n .iir_counter = IIR_COUNTER_FB_R,\n\n .iir_coef[0].coef_b = {26719020, -52852829, 26204379},\n .iir_coef[0].coef_a = {134217728, -210410903, 76474119},\n\n .iir_coef[1].coef_b = {138909433, -267471808, 128584365},\n .iir_coef[1].coef_a = {134217728, -267471808, 133276071},\n\n .iir_coef[2].coef_b = {134542733, -268138827, 133597115},\n .iir_coef[2].coef_a = {134217728, -268138827, 133922120},\n\n .iir_coef[3].coef_b = {133541379, -264235686, 130815458},\n .iir_coef[3].coef_a = {134217728, -264235686, 130139109},\n\n .iir_coef[4].coef_b = {0x8000000, 0, 0},\n .iir_coef[4].coef_a = {0x8000000, 0, 0},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n /*\t\t.fir_bypass_flag=1,\n .fir_len = AUD_COEF_LEN,\n .fir_coef =\n {\n 32767,\n },\n */\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n#if (AUD_SECTION_STRUCT_VERSION == 2)\n\n /*\n\n Filter1_B=[ 19847881, -39594823, 19747071];\n Filter1_A=[ 16777216, -33314517, 16538159];\n\n Filter2_B=[ 9442890, -16603187, 7330251];\n Filter2_A=[ 16777216, -16603187, -4075];\n\n Filter3_B=[ 18107639, -32779315, 14701642];\n Filter3_A=[ 16777216, -32779315, 16032065];\n\n Filter4_B=[ 12666347, -24058210, 11437046];\n Filter4_A=[ 16777216, -32089673, 15357640];\n\n Filter5_B=[ 16466312, -31915122, 15523589];\n Filter5_A=[ 16777216, -31915122, 15212684];\n */\n\n .anc_cfg_mc_l =\n {\n .total_gain = 1228,\n\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n\n .iir_coef[0].coef_b = {19847881, -39594823, 19747071},\n .iir_coef[0].coef_a = {16777216, -33314517, 16538159},\n\n .iir_coef[1].coef_b = {9442890, -16603187, 7330251},\n .iir_coef[1].coef_a = {16777216, -16603187, -4075},\n\n .iir_coef[2].coef_b = {18107639, -32779315, 14701642},\n .iir_coef[2].coef_a = {16777216, -32779315, 16032065},\n\n .iir_coef[3].coef_b = {12666347, -24058210, 11437046},\n .iir_coef[3].coef_a = {16777216, -32089673, 15357640},\n\n .iir_coef[4].coef_b = {16466312, -31915122, 15523589},\n .iir_coef[4].coef_a = {16777216, -31915122, 15212684},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n .anc_cfg_mc_r =\n {\n .total_gain = 1331,\n\n .iir_bypass_flag = 0,\n .iir_counter = 5,\n\n .iir_coef[0].coef_b = {19847881, -39594823, 19747071},\n .iir_coef[0].coef_a = {16777216, -33314517, 16538159},\n\n .iir_coef[1].coef_b = {9442890, -16603187, 7330251},\n .iir_coef[1].coef_a = {16777216, -16603187, -4075},\n\n .iir_coef[2].coef_b = {18107639, -32779315, 14701642},\n .iir_coef[2].coef_a = {16777216, -32779315, 16032065},\n\n .iir_coef[3].coef_b = {12666347, -24058210, 11437046},\n .iir_coef[3].coef_a = {16777216, -32089673, 15357640},\n\n .iir_coef[4].coef_b = {16466312, -31915122, 15523589},\n .iir_coef[4].coef_a = {16777216, -31915122, 15212684},\n\n .iir_coef[5].coef_b = {0x8000000, 0, 0},\n .iir_coef[5].coef_a = {0x8000000, 0, 0},\n\n .dac_gain_offset = 0,\n .adc_gain_offset = (2) * 4,\n },\n#endif\n\n};\n\nconst struct_anc_cfg *anc_coef_list_50p7k[ANC_COEF_LIST_NUM] = {\n &AncFirCoef_50p7k_mode0,\n#if (ANC_COEF_LIST_NUM == 2)\n &AncFirCoef_50p7k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 3)\n &AncFirCoef_50p7k_mode0, &AncFirCoef_50p7k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 4)\n &AncFirCoef_50p7k_mode0, &AncFirCoef_50p7k_mode0, &AncFirCoef_50p7k_mode0,\n#endif\n};\n\nconst struct_anc_cfg *anc_coef_list_48k[ANC_COEF_LIST_NUM] = {\n &AncFirCoef_48k_mode0,\n#if (ANC_COEF_LIST_NUM == 2)\n &AncFirCoef_48k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 3)\n &AncFirCoef_48k_mode0, &AncFirCoef_48k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 4)\n &AncFirCoef_48k_mode0, &AncFirCoef_48k_mode0, &AncFirCoef_48k_mode0,\n#endif\n};\n\nconst struct_anc_cfg *anc_coef_list_44p1k[ANC_COEF_LIST_NUM] = {\n &AncFirCoef_44p1k_mode0,\n#if (ANC_COEF_LIST_NUM == 2)\n &AncFirCoef_44p1k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 3)\n &AncFirCoef_44p1k_mode0, &AncFirCoef_44p1k_mode0,\n#endif\n#if (ANC_COEF_LIST_NUM == 4)\n &AncFirCoef_44p1k_mode0, &AncFirCoef_44p1k_mode0, &AncFirCoef_44p1k_mode0,\n#endif\n};\n\nconst IIR_CFG_T audio_eq_sw_iir_cfg = {.gain0 = 0,\n .gain1 = 0,\n .num = 14,\n .param = {\n {IIR_TYPE_PEAK, -2.18, 10, 2},\n {IIR_TYPE_PEAK, 7.27, 21, 2},\n {IIR_TYPE_PEAK, 2.13, 42, 2},\n {IIR_TYPE_PEAK, -1.53, 83, 2},\n {IIR_TYPE_PEAK, -0.9, 120, 2},\n {IIR_TYPE_PEAK, -4.23, 166, 2},\n {IIR_TYPE_PEAK, -1.08, 333, 2},\n {IIR_TYPE_PEAK, -1.37, 577, 2},\n {IIR_TYPE_PEAK, 0.8, 1000, 2},\n {IIR_TYPE_PEAK, 5.35, 2000, 2},\n {IIR_TYPE_PEAK, 3.2, 4000, 2},\n {IIR_TYPE_PEAK, -4.96, 8000, 2},\n {IIR_TYPE_PEAK, 13.58, 16000, 2},\n {IIR_TYPE_PEAK, 8.89, 20000, 2},\n }};\n\nconst IIR_CFG_T *const audio_eq_sw_iir_cfg_list[EQ_SW_IIR_LIST_NUM] = {\n &audio_eq_sw_iir_cfg,\n};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_44p1k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_48k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T audio_eq_hw_fir_cfg_96k = {.gain = 0.0f,\n .len = 384,\n .coef = {\n (1 << 23) - 1,\n }};\n\nconst FIR_CFG_T *const audio_eq_hw_fir_cfg_list[EQ_HW_FIR_LIST_NUM] = {\n &audio_eq_hw_fir_cfg_44p1k,\n &audio_eq_hw_fir_cfg_48k,\n &audio_eq_hw_fir_cfg_96k,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_dac_iir_cfg = audio_eq_sw_iir_cfg;\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_dac_iir_cfg_list[EQ_HW_DAC_IIR_LIST_NUM] = {\n &audio_eq_hw_dac_iir_cfg,\n};\n\n// hardware dac iir eq\nconst IIR_CFG_T audio_eq_hw_adc_iir_adc_cfg = audio_eq_sw_iir_cfg;\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_adc_iir_cfg_list[EQ_HW_ADC_IIR_LIST_NUM] = {\n &audio_eq_hw_adc_iir_adc_cfg,\n};\n\n// hardware iir eq\nconst IIR_CFG_T audio_eq_hw_iir_cfg = audio_eq_sw_iir_cfg;\n\nconst IIR_CFG_T *const POSSIBLY_UNUSED\n audio_eq_hw_iir_cfg_list[EQ_HW_IIR_LIST_NUM] = {\n &audio_eq_hw_iir_cfg,\n};\n\nconst DrcConfig audio_drc_cfg = {.knee = 3,\n .filter_type = {14, -1},\n .band_num = 2,\n .look_ahead_time = 10,\n .band_settings = {\n {-20, 0, 2, 3, 3000, 1},\n {-20, 0, 2, 3, 3000, 1},\n }};\n\nconst LimiterConfig audio_drc2_cfg = {\n .knee = 2,\n .look_ahead_time = 10,\n .threshold = -20,\n .makeup_gain = 19,\n .ratio = 1000,\n .attack_time = 3,\n .release_time = 3000,\n};\n\nconst SpectrumFixConfig audio_spectrum_cfg = {\n .freq_num = 9,\n .freq_list = {200, 400, 600, 800, 1000, 1200, 1400, 1600, 1800},\n};\n" }, { "path": "config/open_source/tgt_hardware.h", "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __TGT_HARDWARE__\n#define __TGT_HARDWARE__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_iomux.h\"\n#include \"hal_gpio.h\"\n#include \"hal_key.h\"\n#include \"hal_aud.h\"\n\n//config hwardware codec iir.\n#define EQ_HW_DAC_IIR_LIST_NUM 1\n#define EQ_HW_ADC_IIR_LIST_NUM 1\n#define EQ_HW_IIR_LIST_NUM 1\n#define EQ_SW_IIR_LIST_NUM 1\n#define EQ_HW_FIR_LIST_NUM 3\n\n//pwl\n\n#ifdef __BT_DEBUG_TPORTS__\n#define CFG_HW_PLW_NUM (0)\n#else\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\n#define CFG_HW_PLW_NUM (0)\n#else\n#define CFG_HW_PLW_NUM (2)\n#endif\n#endif\n\t\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_hw_pinmux_pwl[CFG_HW_PLW_NUM];\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\t\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_ibrt_indication_pinmux_pwl[3];\n#endif\n\n#ifdef __KNOWLES\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_pinmux_uart[2];\n#endif\n\n//adckey define\n#define CFG_HW_ADCKEY_NUMBER 0\n#define CFG_HW_ADCKEY_BASE 0\n#define CFG_HW_ADCKEY_ADC_MAXVOLT 1000\n#define CFG_HW_ADCKEY_ADC_MINVOLT 0\n#define CFG_HW_ADCKEY_ADC_KEYVOLT_BASE 130\nextern const uint16_t CFG_HW_ADCKEY_MAP_TABLE[CFG_HW_ADCKEY_NUMBER];\n\n#define BTA_AV_CO_SBC_MAX_BITPOOL 52\n\n#ifdef __BT_DEBUG_TPORTS__\n#ifdef TPORTS_KEY_COEXIST\n#define CFG_HW_GPIOKEY_NUM (2)\n#else\n#define CFG_HW_GPIOKEY_NUM (0)\n#endif\n#else\n//gpiokey define\n#ifdef IS_MULTI_AI_ENABLED\n#define CFG_HW_GPIOKEY_NUM (3)\n#elif BES_AUDIO_DEV_Main_Board_9v0\n#define CFG_HW_GPIOKEY_NUM (6)\n#else\n#define CFG_HW_GPIOKEY_NUM (0)\n#endif\n#endif\n\nextern const struct HAL_KEY_GPIOKEY_CFG_T cfg_hw_gpio_key_cfg[CFG_HW_GPIOKEY_NUM];\n\n// ANC function key\n#define ANC_FUNCTION_KEY HAL_KEY_CODE_PWR\n\n// ANC coefficient curve number\n#define ANC_COEF_NUM (1)\n\n//#define ANC_TALK_THROUGH\n\n#ifdef ANC_TALK_THROUGH\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM + 1)\n#else\n#define ANC_COEF_LIST_NUM (ANC_COEF_NUM)\n#endif\n\n// MIC and channel configurations\n// Pinebuds pro have the following mic's and biases\n/*\n\n * User Voice (Talking) = MIC5 input and VMIC3 Bias\n * ANC Feed Forward = MIC1 input and VMIC2 Bias\n * ANC Feed Backward = MIC3 input and VMIC2 Bias\n * \n * Note that AUD_CHANNEL_MAP is offset by 1 (0 start)\n*/\n#define ANC_FF_MIC AUD_CHANNEL_MAP_CH0\n#define ANC_FB_MIC AUD_CHANNEL_MAP_CH2\n\n#define ANC_FF_MIC_CH_L ANC_FF_MIC\n#define ANC_FF_MIC_CH_R 0\n#define ANC_FB_MIC_CH_L ANC_FB_MIC\n#define ANC_FB_MIC_CH_R 0\n\n#define ANC_VMIC_CFG AUD_VMIC_MAP_VMIC2\n\n// audio codec\n#define CFG_HW_AUD_INPUT_PATH_NUM 3\nextern const struct AUD_IO_PATH_CFG_T cfg_audio_input_path_cfg[CFG_HW_AUD_INPUT_PATH_NUM];\n\n#define CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV (AUD_CHANNEL_MAP_CH0)\n\n#define CFG_HW_AUD_SIDETONE_MIC_DEV (AUD_CHANNEL_MAP_CH4)\n#define CFG_HW_AUD_SIDETONE_GAIN_DBVAL (-20)\n\n//bt config\nextern const char *BT_LOCAL_NAME;\nextern const char *BLE_DEFAULT_NAME;\nextern uint8_t ble_addr[6];\nextern uint8_t bt_addr[6];\n\n#define CODEC_SADC_VOL (12)\n\nextern const struct CODEC_DAC_VOL_T codec_dac_vol[TGT_VOLUME_LEVEL_QTY];\n\n//range -12~+12\n#define CFG_HW_AUD_EQ_NUM_BANDS (8)\nextern const int8_t cfg_aud_eq_sbc_band_settings[CFG_HW_AUD_EQ_NUM_BANDS];\n#define CFG_AUD_EQ_IIR_NUM_BANDS (4)\n\n//battery info\n#define APP_BATTERY_MIN_MV (3200)\n#define APP_BATTERY_PD_MV (3100)\n\n#define APP_BATTERY_MAX_MV (4200)\n\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_enable_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_detecter_cfg;\nextern const struct HAL_IOMUX_PIN_FUNCTION_MAP app_battery_ext_charger_indicator_cfg;\n\n//extern const struct HAL_IOMUX_PIN_FUNCTION_MAP TOUCH_INT;\n\t\nextern bool tgt_tws_get_channel_is_right(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n" }, { "path": "config/suggested_anc_gains.h", "content": "/*\n * Suggested ANC gain configurations for PineBuds Pro (BES2300-YP)\n *\n * These are starting-point total_gain values for ANC calibration.\n * The total_gain field controls overall filter amplification in the\n * ANC path. Higher values = more aggressive cancellation, but also\n * more risk of instability/feedback oscillation.\n *\n * Start conservative and increase in steps of ~50-100 while testing\n * for stability. If you hear ringing or whistling, back off.\n *\n * Values are for the aud_item.total_gain field (int32).\n */\n\n#ifndef __SUGGESTED_ANC_GAINS_H__\n#define __SUGGESTED_ANC_GAINS_H__\n\n/*\n * Feedforward (FF) path — external mic → speaker\n * This is the primary ANC path. Higher gain = more cancellation\n * of external noise. Start at 300, max practical ~700.\n */\n#define ANC_FF_GAIN_CONSERVATIVE 300\n#define ANC_FF_GAIN_MODERATE 500\n#define ANC_FF_GAIN_AGGRESSIVE 700\n\n/*\n * Feedback (FB) path — error mic → speaker\n * Compensates for residual noise after FF cancellation.\n * Keep lower than FF to avoid instability. Start at 200, max ~500.\n */\n#define ANC_FB_GAIN_CONSERVATIVE 200\n#define ANC_FB_GAIN_MODERATE 350\n#define ANC_FB_GAIN_AGGRESSIVE 500\n\n/*\n * Suggested calibration procedure:\n *\n * 1. Load the extracted EF606 IIR coefficients as a baseline\n * (see ef606_average_coefficients.h)\n *\n * 2. Set FF total_gain = ANC_FF_GAIN_CONSERVATIVE (300)\n * Set FB total_gain = ANC_FB_GAIN_CONSERVATIVE (200)\n * Set iir_bypass_flag = 0 (filters active)\n *\n * 3. Boot, test with pink noise. Listen for:\n * - Low frequency attenuation (good)\n * - Ringing or whistling (bad — reduce gain)\n * - No audible difference (increase gain by 100)\n *\n * 4. Increase FF gain in steps of 100 up to 700.\n * Increase FB gain in steps of 50 up to 500.\n * Always test stability at each step.\n *\n * 5. The sweet spot for PineBuds Pro with stock ear tips\n * is typically FF=400-600, FB=250-400 depending on\n * ear canal seal quality.\n *\n * Note: Open-ear designs (like 1MORE Fit SE) cannot achieve\n * meaningful ANC because the acoustic seal is absent.\n * These values are for in-ear buds with silicone tips only.\n */\n\n#endif /* __SUGGESTED_ANC_GAINS_H__ */\n" }, { "path": "convert.sh", "content": "#!/usr/bin/env sh\n\ntxt_to_wav() {\n hash=\"$(md5sum \"$1\" | cut -d ' ' -f 1)\"\n filename=\"out-$hash.sbc\"\n\n xxd -r -p \"$1\" > \"$filename\"\n\n ffmpeg -y \\\n -v quiet `# verbosity - other options are \"quiet\", \"error\", \"panic\"` \\\n -f sbc `# accept SBC format` \\\n -ac 1 `# audio channel: #1` \\\n -i \"$filename\" `# input file: out-$hash.sbc` \\\n \"$2\" `# output to $2`\n\n rm \"$filename\"\n}\n\naudio_to_txt() {\n hash=\"$(md5sum \"$1\" | cut -d ' ' -f 1)\"\n filename=\"out-$hash.sbc\"\n\n ffmpeg -y \\\n -v quiet `# verbosity - other options are \"quiet\", \"error\", \"panic\"` \\\n -i \"$1\" `# input file: $1` \\\n -f sbc `# output format: SBC` \\\n -ar 16000 `# audio rate: 16 kHz` \\\n -ac 1 `# audio channel: #1` \\\n -aq 16 `# audio quality: 16 (for SBC this means bitpool=16)` \\\n -map_metadata -1 `# strip metadata` \\\n \"$filename\" `# output to out-$hash.sbc`\n\n xxd -i \"$filename\" `# output in C include file style` \\\n | head -n -2 `# skip last two xxd outline lines (skip C formatting)` \\\n | tail -n +2 `# start output on line 2 of xxd output (skip C formatting)` \\\n | sed 's/ //g' `# remove spaces` \\\n | tr --delete '\\n' `# remove newlines` \\\n | sed 's/,/\\,\\n/16; P; D' `# collect into lines with the right length` \\\n > \"$2\"\n\n rm \"$filename\"\n}\n\naudio_to_cpp() {\n varname=\"$(basename \"$1\" | rev | cut -f 2- -d '.' | rev | tr '[:lower:]/' '[:upper:]_')\"\n\n ffmpeg -y \\\n -v quiet `# verbosity - other options are \"quiet\", \"error\", \"panic\"` \\\n -i \"$1\" `# input file: $1` \\\n -f sbc `# output format: SBC` \\\n -ar 16000 `# audio rate: 16 kHz` \\\n -ac 1 `# audio channel: #1` \\\n -aq 16 `# audio quality: 16 (for SBC this means bitpool=16)` \\\n -map_metadata -1 `# strip metadata` \\\n \"$varname\" `# output to something like EN_SOUND_POWER_ON`\n\n printf '#include \\n' > \"$2\"\n\n xxd -i \"$varname\" `# output in C include file style` \\\n >> \"$2\"\n\n sed -i 's/unsigned char/uint8_t/g' \"$2\"\n\n rm \"$varname\"\n}\n\n[ \"$1\" = '-T' ] || [ \"$1\" = '--txt-to-wav' ] && shift 1 && txt_to_wav \"$@\" && exit\n[ \"$1\" = '-A' ] || [ \"$1\" = '--audio-to-txt' ] && shift 1 && audio_to_txt \"$@\" && exit\n[ \"$1\" = '-C' ] || [ \"$1\" = '--audio-to-cpp' ] && shift 1 && audio_to_cpp \"$@\" && exit\n\necho \"\nSound format converter:\nUsage:\n $0 [option] [input-file] [output-file]\nOptions:\n -T or --txt-to-wav Converts the text file to a wav audio file\n -A or --audio-to-txt Converts an audio file to a file readable by the old pinebuds firmware\n -C or --audio-to-cpp Converts an audio file to a file compilable into the pinebuds firmware\n\"\n" }, { "path": "dev_tools/anc_decoder/.gitignore", "content": "target/\n" }, { "path": "dev_tools/anc_decoder/Cargo.toml", "content": "[package]\nname = \"anc_decoder\"\nversion = \"0.1.0\"\nedition = \"2021\"\n\n# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html\n\n[dependencies]\ndeclio = \"0.2.0\"\n" }, { "path": "dev_tools/anc_decoder/src/main.rs", "content": "use declio::ctx::Endian;\nuse declio::{Decode, Encode};\nuse std::fs::File;\nuse std::io::Read;\n//Super experimental dumb tooling for parsing out the ANC data\n// This is not production code, expect panics\n\nconst AUDIO_START: usize = 0x003EE000;\nconst AUDIO_LEN: usize = 16;\nconst AUD_IIR_NUM: usize = 8;\nconst AUD_COEF_LEN: usize = 0;\n\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct AudSectionHead {\n #[declio(ctx = \"Endian::Little\")]\n magic: u16,\n #[declio(ctx = \"Endian::Little\")]\n vesrion: u16,\n #[declio(ctx = \"Endian::Little\")]\n crc: u32,\n #[declio(ctx = \"Endian::Little\")]\n reserved0: u32,\n #[declio(ctx = \"Endian::Little\")]\n reserved1: u32,\n}\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct AudSectionBodyIdent {\n anc_ver: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00\n batch_info: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00\n serial: [u8; 16], // These are actually char* but honestly doesnt matter as seem to always be 0x00\n}\n\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct anc_iir_coefs {\n #[declio(ctx = \"Endian::Little\")]\n coef_b: [i32; 3],\n #[declio(ctx = \"Endian::Little\")]\n coef_a: [i32; 3],\n}\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct aud_item {\n #[declio(ctx = \"Endian::Little\")]\n total_gain: u32,\n\n #[declio(ctx = \"Endian::Little\")]\n iir_bypass_flag: u16,\n\n #[declio(ctx = \"Endian::Little\")]\n iir_counter: u16,\n iir_coef: [anc_iir_coefs; AUD_IIR_NUM],\n\n // #if (AUD_SECTION_STRUCT_VERSION == 1)\n // #[declio(ctx = \"Endian::Little\")]\n // fir_bypass_flag: u16,\n // #[declio(ctx = \"Endian::Little\")]\n // fir_len: u16,\n // #[declio(ctx = \"Endian::Little\")]\n // fir_coef: [i16; AUD_COEF_LEN],\n // pos_tab: [i8; 16],\n // #elif (AUD_SECTION_STRUCT_VERSION == 2)\n #[declio(ctx = \"Endian::Little\")]\n reserved_for_drc: [u32; 32],\n // #elif (AUD_SECTION_STRUCT_VERSION == 3)\n\n // #endif\n #[declio(ctx = \"Endian::Little\")]\n reserved1: i16,\n dac_gain_offset: i8, // in qdb (quater of dB)\n adc_gain_offset: i8, // in qdb (quater of dB)\n}\n\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct struct_anc_cfg {\n //V1+\n anc_cfg_ff_l: aud_item,\n anc_cfg_ff_r: aud_item,\n anc_cfg_fb_l: aud_item,\n anc_cfg_fb_r: aud_item,\n //V2\n anc_cfg_tt_l: aud_item,\n anc_cfg_tt_r: aud_item,\n anc_cfg_mc_l: aud_item,\n anc_cfg_mc_r: aud_item,\n}\n\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct pctool_struct_anc_cfg {\n //\n anc_cfg: [struct_anc_cfg; 2], //0 == 41k, 2==44k\n}\n\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct AudSectionBodyConfig {\n anc_config_arr: [pctool_struct_anc_cfg; 1], // we may only use first of 4 entries\n}\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct AudSectionBody {\n anc_ident: AudSectionBodyIdent,\n anc_config: AudSectionBodyConfig,\n}\n#[derive(Debug, PartialEq, Encode, Decode, Copy, Clone, Default)]\nstruct PctoolAudSection {\n header: AudSectionHead,\n body: AudSectionBody,\n}\n\nfn main() {\n println!(\"Super dumb anc firmware details dumper\");\n println!(\"By Ralim \");\n println!(\"Reading firmware.bin\");\n let file_contents = get_firmware_file(\"firmware.bin\");\n println!(\"Running decoder\");\n\n let dummy_init: PctoolAudSection = PctoolAudSection::default();\n let dummy_serialised = declio::to_bytes(dummy_init).unwrap();\n\n let decoded: PctoolAudSection =\n declio::from_bytes(&file_contents[AUDIO_START..AUDIO_START + dummy_serialised.len()])\n .expect(\"decode failed\");\n\n println!(\"Decoded {:#?}\", decoded)\n}\n\nfn get_firmware_file(filename: &str) -> Vec {\n let mut f = File::open(&filename).expect(\"no file found\");\n let mut buffer = Vec::new();\n\n // read the whole file\n f.read_to_end(&mut buffer).expect(\"could not read file\");\n\n buffer\n}\n" }, { "path": "docker-compose.yml", "content": "services:\r\n builder:\r\n stdin_open: true\r\n tty: true\r\n privileged: true\r\n image: \"ghcr.io/pine64/openpinebuds:latest-sdk\"\r\n build:\r\n context: .\r\n volumes:\r\n - ./:/usr/src:Z\r\n - /dev/:/dev/\r\n" }, { "path": "download.sh", "content": "#!/usr/bin/env bash\n\nnum=$(find /dev -name 'ttyACM*' | sort | rev | cut -c 1)\necho com is: \"$num\"\nmapfile -t splitPorts <<< \"$num\"\necho \"This tool assumes your buds are the only thing connected and are enumerated {right,left} order. YMMV\"\necho \"Right bud is at ${splitPorts[0]}\"\necho \"Left bud is at ${splitPorts[1]}\"\n\necho \"Please disconnect and reconnect the bud on the right\"\nbestool write-image out/open_source/open_source.bin --port \"/dev/ttyACM${splitPorts[0]}\"\n\necho \"Please disconnect and reconnect the bud on the left\"\nbestool write-image out/open_source/open_source.bin --port \"/dev/ttyACM${splitPorts[1]}\"\n" }, { "path": "include/rtos/freertos/FreeRTOS.h", "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n#ifndef INC_FREERTOS_H\n#define INC_FREERTOS_H\n\n/*\n * Include the generic headers required for the FreeRTOS port being used.\n */\n#include \n\n/*\n * If stdint.h cannot be located then:\n * + If using GCC ensure the -nostdint options is *not* being used.\n * + Ensure the project's include path includes the directory in which your\n * compiler stores stdint.h.\n * + Set any compiler options necessary for it to support C99, as technically\n * stdint.h is only mandatory with C99 (FreeRTOS does not require C99 in any\n * other way).\n * + The FreeRTOS download includes a simple stdint.h definition that can be\n * used in cases where none is provided by the compiler. The files only\n * contains the typedefs required to build FreeRTOS. Read the instructions\n * in FreeRTOS/source/stdint.readme for more information.\n */\n#include /* READ COMMENT ABOVE. */\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/* Application specific configuration options. */\n#include \"FreeRTOSConfig.h\"\n\n/* Basic FreeRTOS definitions. */\n#include \"projdefs.h\"\n\n/* Definitions specific to the port being used. */\n#include \"portable.h\"\n\n/* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */\n#ifndef configUSE_NEWLIB_REENTRANT\n\t#define configUSE_NEWLIB_REENTRANT 0\n#endif\n\n/* Required if struct _reent is used. */\n#if ( configUSE_NEWLIB_REENTRANT == 1 )\n\t#include \n#endif\n/*\n * Check all the required application specific macros have been defined.\n * These macros are application specific and (as downloaded) are defined\n * within FreeRTOSConfig.h.\n */\n\n#ifndef configMINIMAL_STACK_SIZE\n\t#error Missing definition: configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h. configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task. Refer to the demo project provided for your port for a suitable value.\n#endif\n\n#ifndef configMAX_PRIORITIES\n\t#error Missing definition: configMAX_PRIORITIES must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details.\n#endif\n\n#if configMAX_PRIORITIES < 1\n\t#error configMAX_PRIORITIES must be defined to be greater than or equal to 1.\n#endif\n\n#ifndef configUSE_PREEMPTION\n\t#error Missing definition: configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.\n#endif\n\n#ifndef configUSE_IDLE_HOOK\n\t#error Missing definition: configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.\n#endif\n\n#ifndef configUSE_TICK_HOOK\n\t#error Missing definition: configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.\n#endif\n\n#ifndef configUSE_16_BIT_TICKS\n\t#error Missing definition: configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.\n#endif\n\n#ifndef configUSE_CO_ROUTINES\n\t#define configUSE_CO_ROUTINES 0\n#endif\n\n#ifndef INCLUDE_vTaskPrioritySet\n\t#define INCLUDE_vTaskPrioritySet 0\n#endif\n\n#ifndef INCLUDE_uxTaskPriorityGet\n\t#define INCLUDE_uxTaskPriorityGet 0\n#endif\n\n#ifndef INCLUDE_vTaskDelete\n\t#define INCLUDE_vTaskDelete 0\n#endif\n\n#ifndef INCLUDE_vTaskSuspend\n\t#define INCLUDE_vTaskSuspend 0\n#endif\n\n#ifndef INCLUDE_vTaskDelayUntil\n\t#define INCLUDE_vTaskDelayUntil 0\n#endif\n\n#ifndef INCLUDE_vTaskDelay\n\t#define INCLUDE_vTaskDelay 0\n#endif\n\n#ifndef INCLUDE_xTaskGetIdleTaskHandle\n\t#define INCLUDE_xTaskGetIdleTaskHandle 0\n#endif\n\n#ifndef INCLUDE_xTaskAbortDelay\n\t#define INCLUDE_xTaskAbortDelay 0\n#endif\n\n#ifndef INCLUDE_xQueueGetMutexHolder\n\t#define INCLUDE_xQueueGetMutexHolder 0\n#endif\n\n#ifndef INCLUDE_xSemaphoreGetMutexHolder\n\t#define INCLUDE_xSemaphoreGetMutexHolder INCLUDE_xQueueGetMutexHolder\n#endif\n\n#ifndef INCLUDE_xTaskGetHandle\n\t#define INCLUDE_xTaskGetHandle 0\n#endif\n\n#ifndef INCLUDE_uxTaskGetStackHighWaterMark\n\t#define INCLUDE_uxTaskGetStackHighWaterMark 0\n#endif\n\n#ifndef INCLUDE_eTaskGetState\n\t#define INCLUDE_eTaskGetState 0\n#endif\n\n#ifndef INCLUDE_xTaskResumeFromISR\n\t#define INCLUDE_xTaskResumeFromISR 1\n#endif\n\n#ifndef INCLUDE_xTimerPendFunctionCall\n\t#define INCLUDE_xTimerPendFunctionCall 0\n#endif\n\n#ifndef INCLUDE_xTaskGetSchedulerState\n\t#define INCLUDE_xTaskGetSchedulerState 0\n#endif\n\n#ifndef INCLUDE_xTaskGetCurrentTaskHandle\n\t#define INCLUDE_xTaskGetCurrentTaskHandle 0\n#endif\n\n#if configUSE_CO_ROUTINES != 0\n\t#ifndef configMAX_CO_ROUTINE_PRIORITIES\n\t\t#error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1.\n\t#endif\n#endif\n\n#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK\n\t#define configUSE_DAEMON_TASK_STARTUP_HOOK 0\n#endif\n\n#ifndef configUSE_APPLICATION_TASK_TAG\n\t#define configUSE_APPLICATION_TASK_TAG 0\n#endif\n\n#ifndef configNUM_THREAD_LOCAL_STORAGE_POINTERS\n\t#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0\n#endif\n\n#ifndef configUSE_RECURSIVE_MUTEXES\n\t#define configUSE_RECURSIVE_MUTEXES 0\n#endif\n\n#ifndef configUSE_MUTEXES\n\t#define configUSE_MUTEXES 0\n#endif\n\n#ifndef configUSE_TIMERS\n\t#define configUSE_TIMERS 0\n#endif\n\n#ifndef configUSE_COUNTING_SEMAPHORES\n\t#define configUSE_COUNTING_SEMAPHORES 0\n#endif\n\n#ifndef configUSE_ALTERNATIVE_API\n\t#define configUSE_ALTERNATIVE_API 0\n#endif\n\n#ifndef portCRITICAL_NESTING_IN_TCB\n\t#define portCRITICAL_NESTING_IN_TCB 0\n#endif\n\n#ifndef configMAX_TASK_NAME_LEN\n\t#define configMAX_TASK_NAME_LEN 16\n#endif\n\n#ifndef configIDLE_SHOULD_YIELD\n\t#define configIDLE_SHOULD_YIELD\t\t1\n#endif\n\n#if configMAX_TASK_NAME_LEN < 1\n\t#error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h\n#endif\n\n#ifndef configASSERT\n\t#define configASSERT( x )\n\t#define configASSERT_DEFINED 0\n#else\n\t#define configASSERT_DEFINED 1\n#endif\n\n/* The timers module relies on xTaskGetSchedulerState(). */\n#if configUSE_TIMERS == 1\n\n\t#ifndef configTIMER_TASK_PRIORITY\n\t\t#error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined.\n\t#endif /* configTIMER_TASK_PRIORITY */\n\n\t#ifndef configTIMER_QUEUE_LENGTH\n\t\t#error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined.\n\t#endif /* configTIMER_QUEUE_LENGTH */\n\n\t#ifndef configTIMER_TASK_STACK_DEPTH\n\t\t#error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined.\n\t#endif /* configTIMER_TASK_STACK_DEPTH */\n\n#endif /* configUSE_TIMERS */\n\n#ifndef portSET_INTERRUPT_MASK_FROM_ISR\n\t#define portSET_INTERRUPT_MASK_FROM_ISR() 0\n#endif\n\n#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR\n\t#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue\n#endif\n\n#ifndef portCLEAN_UP_TCB\n\t#define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB\n#endif\n\n#ifndef portPRE_TASK_DELETE_HOOK\n\t#define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending )\n#endif\n\n#ifndef portSETUP_TCB\n\t#define portSETUP_TCB( pxTCB ) ( void ) pxTCB\n#endif\n\n#ifndef configQUEUE_REGISTRY_SIZE\n\t#define configQUEUE_REGISTRY_SIZE 0U\n#endif\n\n#if ( configQUEUE_REGISTRY_SIZE < 1 )\n\t#define vQueueAddToRegistry( xQueue, pcName )\n\t#define vQueueUnregisterQueue( xQueue )\n\t#define pcQueueGetName( xQueue )\n#endif\n\n#ifndef portPOINTER_SIZE_TYPE\n\t#define portPOINTER_SIZE_TYPE uint32_t\n#endif\n\n/* Remove any unused trace macros. */\n#ifndef traceSTART\n\t/* Used to perform any necessary initialisation - for example, open a file\n\tinto which trace is to be written. */\n\t#define traceSTART()\n#endif\n\n#ifndef traceEND\n\t/* Use to close a trace, for example close a file into which trace has been\n\twritten. */\n\t#define traceEND()\n#endif\n\n#ifndef traceTASK_SWITCHED_IN\n\t/* Called after a task has been selected to run. pxCurrentTCB holds a pointer\n\tto the task control block of the selected task. */\n\t#define traceTASK_SWITCHED_IN()\n#endif\n\n#ifndef traceINCREASE_TICK_COUNT\n\t/* Called before stepping the tick count after waking from tickless idle\n\tsleep. */\n\t#define traceINCREASE_TICK_COUNT( x )\n#endif\n\n#ifndef traceLOW_POWER_IDLE_BEGIN\n\t/* Called immediately before entering tickless idle. */\n\t#define traceLOW_POWER_IDLE_BEGIN()\n#endif\n\n#ifndef\ttraceLOW_POWER_IDLE_END\n\t/* Called when returning to the Idle task after a tickless idle. */\n\t#define traceLOW_POWER_IDLE_END()\n#endif\n\n#ifndef traceTASK_SWITCHED_OUT\n\t/* Called before a task has been selected to run. pxCurrentTCB holds a pointer\n\tto the task control block of the task being switched out. */\n\t#define traceTASK_SWITCHED_OUT()\n#endif\n\n#ifndef traceTASK_PRIORITY_INHERIT\n\t/* Called when a task attempts to take a mutex that is already held by a\n\tlower priority task. pxTCBOfMutexHolder is a pointer to the TCB of the task\n\tthat holds the mutex. uxInheritedPriority is the priority the mutex holder\n\twill inherit (the priority of the task that is attempting to obtain the\n\tmuted. */\n\t#define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority )\n#endif\n\n#ifndef traceTASK_PRIORITY_DISINHERIT\n\t/* Called when a task releases a mutex, the holding of which had resulted in\n\tthe task inheriting the priority of a higher priority task.\n\tpxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the\n\tmutex. uxOriginalPriority is the task's configured (base) priority. */\n\t#define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority )\n#endif\n\n#ifndef traceBLOCKING_ON_QUEUE_RECEIVE\n\t/* Task is about to block because it cannot read from a\n\tqueue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore\n\tupon which the read was attempted. pxCurrentTCB points to the TCB of the\n\ttask that attempted the read. */\n\t#define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue )\n#endif\n\n#ifndef traceBLOCKING_ON_QUEUE_PEEK\n\t/* Task is about to block because it cannot read from a\n\tqueue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore\n\tupon which the read was attempted. pxCurrentTCB points to the TCB of the\n\ttask that attempted the read. */\n\t#define traceBLOCKING_ON_QUEUE_PEEK( pxQueue )\n#endif\n\n#ifndef traceBLOCKING_ON_QUEUE_SEND\n\t/* Task is about to block because it cannot write to a\n\tqueue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore\n\tupon which the write was attempted. pxCurrentTCB points to the TCB of the\n\ttask that attempted the write. */\n\t#define traceBLOCKING_ON_QUEUE_SEND( pxQueue )\n#endif\n\n#ifndef configCHECK_FOR_STACK_OVERFLOW\n\t#define configCHECK_FOR_STACK_OVERFLOW 0\n#endif\n\n#ifndef configRECORD_STACK_HIGH_ADDRESS\n\t#define configRECORD_STACK_HIGH_ADDRESS 0\n#endif\n\n#ifndef configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H\n\t#define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H 0\n#endif\n\n/* The following event macros are embedded in the kernel API calls. */\n\n#ifndef traceMOVED_TASK_TO_READY_STATE\n\t#define traceMOVED_TASK_TO_READY_STATE( pxTCB )\n#endif\n\n#ifndef tracePOST_MOVED_TASK_TO_READY_STATE\n\t#define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )\n#endif\n\n#ifndef traceQUEUE_CREATE\n\t#define traceQUEUE_CREATE( pxNewQueue )\n#endif\n\n#ifndef traceQUEUE_CREATE_FAILED\n\t#define traceQUEUE_CREATE_FAILED( ucQueueType )\n#endif\n\n#ifndef traceCREATE_MUTEX\n\t#define traceCREATE_MUTEX( pxNewQueue )\n#endif\n\n#ifndef traceCREATE_MUTEX_FAILED\n\t#define traceCREATE_MUTEX_FAILED()\n#endif\n\n#ifndef traceGIVE_MUTEX_RECURSIVE\n\t#define traceGIVE_MUTEX_RECURSIVE( pxMutex )\n#endif\n\n#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED\n\t#define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex )\n#endif\n\n#ifndef traceTAKE_MUTEX_RECURSIVE\n\t#define traceTAKE_MUTEX_RECURSIVE( pxMutex )\n#endif\n\n#ifndef traceTAKE_MUTEX_RECURSIVE_FAILED\n\t#define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex )\n#endif\n\n#ifndef traceCREATE_COUNTING_SEMAPHORE\n\t#define traceCREATE_COUNTING_SEMAPHORE()\n#endif\n\n#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED\n\t#define traceCREATE_COUNTING_SEMAPHORE_FAILED()\n#endif\n\n#ifndef traceQUEUE_SEND\n\t#define traceQUEUE_SEND( pxQueue )\n#endif\n\n#ifndef traceQUEUE_SEND_FAILED\n\t#define traceQUEUE_SEND_FAILED( pxQueue )\n#endif\n\n#ifndef traceQUEUE_RECEIVE\n\t#define traceQUEUE_RECEIVE( pxQueue )\n#endif\n\n#ifndef traceQUEUE_PEEK\n\t#define traceQUEUE_PEEK( pxQueue )\n#endif\n\n#ifndef traceQUEUE_PEEK_FAILED\n\t#define traceQUEUE_PEEK_FAILED( pxQueue )\n#endif\n\n#ifndef traceQUEUE_PEEK_FROM_ISR\n\t#define traceQUEUE_PEEK_FROM_ISR( pxQueue )\n#endif\n\n#ifndef traceQUEUE_RECEIVE_FAILED\n\t#define traceQUEUE_RECEIVE_FAILED( pxQueue )\n#endif\n\n#ifndef traceQUEUE_SEND_FROM_ISR\n\t#define traceQUEUE_SEND_FROM_ISR( pxQueue )\n#endif\n\n#ifndef traceQUEUE_SEND_FROM_ISR_FAILED\n\t#define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue )\n#endif\n\n#ifndef traceQUEUE_RECEIVE_FROM_ISR\n\t#define traceQUEUE_RECEIVE_FROM_ISR( pxQueue )\n#endif\n\n#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED\n\t#define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue )\n#endif\n\n#ifndef traceQUEUE_PEEK_FROM_ISR_FAILED\n\t#define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue )\n#endif\n\n#ifndef traceQUEUE_DELETE\n\t#define traceQUEUE_DELETE( pxQueue )\n#endif\n\n#ifndef traceTASK_CREATE\n\t#define traceTASK_CREATE( pxNewTCB )\n#endif\n\n#ifndef traceTASK_CREATE_FAILED\n\t#define traceTASK_CREATE_FAILED()\n#endif\n\n#ifndef traceTASK_DELETE\n\t#define traceTASK_DELETE( pxTaskToDelete )\n#endif\n\n#ifndef traceTASK_DELAY_UNTIL\n\t#define traceTASK_DELAY_UNTIL( x )\n#endif\n\n#ifndef traceTASK_DELAY\n\t#define traceTASK_DELAY()\n#endif\n\n#ifndef traceTASK_PRIORITY_SET\n\t#define traceTASK_PRIORITY_SET( pxTask, uxNewPriority )\n#endif\n\n#ifndef traceTASK_SUSPEND\n\t#define traceTASK_SUSPEND( pxTaskToSuspend )\n#endif\n\n#ifndef traceTASK_RESUME\n\t#define traceTASK_RESUME( pxTaskToResume )\n#endif\n\n#ifndef traceTASK_RESUME_FROM_ISR\n\t#define traceTASK_RESUME_FROM_ISR( pxTaskToResume )\n#endif\n\n#ifndef traceTASK_INCREMENT_TICK\n\t#define traceTASK_INCREMENT_TICK( xTickCount )\n#endif\n\n#ifndef traceTIMER_CREATE\n\t#define traceTIMER_CREATE( pxNewTimer )\n#endif\n\n#ifndef traceTIMER_CREATE_FAILED\n\t#define traceTIMER_CREATE_FAILED()\n#endif\n\n#ifndef traceTIMER_COMMAND_SEND\n\t#define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn )\n#endif\n\n#ifndef traceTIMER_EXPIRED\n\t#define traceTIMER_EXPIRED( pxTimer )\n#endif\n\n#ifndef traceTIMER_COMMAND_RECEIVED\n\t#define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue )\n#endif\n\n#ifndef traceMALLOC\n #define traceMALLOC( pvAddress, uiSize )\n#endif\n\n#ifndef traceFREE\n #define traceFREE( pvAddress, uiSize )\n#endif\n\n#ifndef traceEVENT_GROUP_CREATE\n\t#define traceEVENT_GROUP_CREATE( xEventGroup )\n#endif\n\n#ifndef traceEVENT_GROUP_CREATE_FAILED\n\t#define traceEVENT_GROUP_CREATE_FAILED()\n#endif\n\n#ifndef traceEVENT_GROUP_SYNC_BLOCK\n\t#define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor )\n#endif\n\n#ifndef traceEVENT_GROUP_SYNC_END\n\t#define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred\n#endif\n\n#ifndef traceEVENT_GROUP_WAIT_BITS_BLOCK\n\t#define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor )\n#endif\n\n#ifndef traceEVENT_GROUP_WAIT_BITS_END\n\t#define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred\n#endif\n\n#ifndef traceEVENT_GROUP_CLEAR_BITS\n\t#define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear )\n#endif\n\n#ifndef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR\n\t#define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear )\n#endif\n\n#ifndef traceEVENT_GROUP_SET_BITS\n\t#define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet )\n#endif\n\n#ifndef traceEVENT_GROUP_SET_BITS_FROM_ISR\n\t#define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet )\n#endif\n\n#ifndef traceEVENT_GROUP_DELETE\n\t#define traceEVENT_GROUP_DELETE( xEventGroup )\n#endif\n\n#ifndef tracePEND_FUNC_CALL\n\t#define tracePEND_FUNC_CALL(xFunctionToPend, pvParameter1, ulParameter2, ret)\n#endif\n\n#ifndef tracePEND_FUNC_CALL_FROM_ISR\n\t#define tracePEND_FUNC_CALL_FROM_ISR(xFunctionToPend, pvParameter1, ulParameter2, ret)\n#endif\n\n#ifndef traceQUEUE_REGISTRY_ADD\n\t#define traceQUEUE_REGISTRY_ADD(xQueue, pcQueueName)\n#endif\n\n#ifndef traceTASK_NOTIFY_TAKE_BLOCK\n\t#define traceTASK_NOTIFY_TAKE_BLOCK()\n#endif\n\n#ifndef traceTASK_NOTIFY_TAKE\n\t#define traceTASK_NOTIFY_TAKE()\n#endif\n\n#ifndef traceTASK_NOTIFY_WAIT_BLOCK\n\t#define traceTASK_NOTIFY_WAIT_BLOCK()\n#endif\n\n#ifndef traceTASK_NOTIFY_WAIT\n\t#define traceTASK_NOTIFY_WAIT()\n#endif\n\n#ifndef traceTASK_NOTIFY\n\t#define traceTASK_NOTIFY()\n#endif\n\n#ifndef traceTASK_NOTIFY_FROM_ISR\n\t#define traceTASK_NOTIFY_FROM_ISR()\n#endif\n\n#ifndef traceTASK_NOTIFY_GIVE_FROM_ISR\n\t#define traceTASK_NOTIFY_GIVE_FROM_ISR()\n#endif\n\n#ifndef traceSTREAM_BUFFER_CREATE_FAILED\n\t#define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer )\n#endif\n\n#ifndef traceSTREAM_BUFFER_CREATE_STATIC_FAILED\n\t#define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer )\n#endif\n\n#ifndef traceSTREAM_BUFFER_CREATE\n\t#define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer )\n#endif\n\n#ifndef traceSTREAM_BUFFER_DELETE\n\t#define traceSTREAM_BUFFER_DELETE( xStreamBuffer )\n#endif\n\n#ifndef traceSTREAM_BUFFER_RESET\n\t#define traceSTREAM_BUFFER_RESET( xStreamBuffer )\n#endif\n\n#ifndef traceBLOCKING_ON_STREAM_BUFFER_SEND\n\t#define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer )\n#endif\n\n#ifndef traceSTREAM_BUFFER_SEND\n\t#define traceSTREAM_BUFFER_SEND( xStreamBuffer, xBytesSent )\n#endif\n\n#ifndef traceSTREAM_BUFFER_SEND_FAILED\n\t#define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer )\n#endif\n\n#ifndef traceSTREAM_BUFFER_SEND_FROM_ISR\n\t#define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xBytesSent )\n#endif\n\n#ifndef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE\n\t#define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer )\n#endif\n\n#ifndef traceSTREAM_BUFFER_RECEIVE\n\t#define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength )\n#endif\n\n#ifndef traceSTREAM_BUFFER_RECEIVE_FAILED\n\t#define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer )\n#endif\n\n#ifndef traceSTREAM_BUFFER_RECEIVE_FROM_ISR\n\t#define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength )\n#endif\n\n#ifndef configGENERATE_RUN_TIME_STATS\n\t#define configGENERATE_RUN_TIME_STATS 0\n#endif\n\n#if ( configGENERATE_RUN_TIME_STATS == 1 )\n\n\t#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS\n\t\t#error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base.\n\t#endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */\n\n\t#ifndef portGET_RUN_TIME_COUNTER_VALUE\n\t\t#ifndef portALT_GET_RUN_TIME_COUNTER_VALUE\n\t\t\t#error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined. See the examples provided and the FreeRTOS web site for more information.\n\t\t#endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */\n\t#endif /* portGET_RUN_TIME_COUNTER_VALUE */\n\n#endif /* configGENERATE_RUN_TIME_STATS */\n\n#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS\n\t#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()\n#endif\n\n#ifndef configUSE_MALLOC_FAILED_HOOK\n\t#define configUSE_MALLOC_FAILED_HOOK 0\n#endif\n\n#ifndef portPRIVILEGE_BIT\n\t#define portPRIVILEGE_BIT ( ( UBaseType_t ) 0x00 )\n#endif\n\n#ifndef portYIELD_WITHIN_API\n\t#define portYIELD_WITHIN_API portYIELD\n#endif\n\n#ifndef portSUPPRESS_TICKS_AND_SLEEP\n\t#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime )\n#endif\n\n#ifndef configEXPECTED_IDLE_TIME_BEFORE_SLEEP\n\t#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2\n#endif\n\n#if configEXPECTED_IDLE_TIME_BEFORE_SLEEP < 2\n\t#error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2\n#endif\n\n#ifndef configUSE_TICKLESS_IDLE\n\t#define configUSE_TICKLESS_IDLE 0\n#endif\n\n#ifndef configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING\n\t#define configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x )\n#endif\n\n#ifndef configPRE_SLEEP_PROCESSING\n\t#define configPRE_SLEEP_PROCESSING( x )\n#endif\n\n#ifndef configPOST_SLEEP_PROCESSING\n\t#define configPOST_SLEEP_PROCESSING( x )\n#endif\n\n#ifndef configUSE_QUEUE_SETS\n\t#define configUSE_QUEUE_SETS 0\n#endif\n\n#ifndef portTASK_USES_FLOATING_POINT\n\t#define portTASK_USES_FLOATING_POINT()\n#endif\n\n#ifndef portTASK_CALLS_SECURE_FUNCTIONS\n\t#define portTASK_CALLS_SECURE_FUNCTIONS()\n#endif\n\n#ifndef configUSE_TIME_SLICING\n\t#define configUSE_TIME_SLICING 1\n#endif\n\n#ifndef configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS\n\t#define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0\n#endif\n\n#ifndef configUSE_STATS_FORMATTING_FUNCTIONS\n\t#define configUSE_STATS_FORMATTING_FUNCTIONS 0\n#endif\n\n#ifndef portASSERT_IF_INTERRUPT_PRIORITY_INVALID\n\t#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()\n#endif\n\n#ifndef configUSE_TRACE_FACILITY\n\t#define configUSE_TRACE_FACILITY 0\n#endif\n\n#ifndef mtCOVERAGE_TEST_MARKER\n\t#define mtCOVERAGE_TEST_MARKER()\n#endif\n\n#ifndef mtCOVERAGE_TEST_DELAY\n\t#define mtCOVERAGE_TEST_DELAY()\n#endif\n\n#ifndef portASSERT_IF_IN_ISR\n\t#define portASSERT_IF_IN_ISR()\n#endif\n\n#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\n\t#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0\n#endif\n\n#ifndef configAPPLICATION_ALLOCATED_HEAP\n\t#define configAPPLICATION_ALLOCATED_HEAP 0\n#endif\n\n#ifndef configUSE_TASK_NOTIFICATIONS\n\t#define configUSE_TASK_NOTIFICATIONS 1\n#endif\n\n#ifndef configUSE_POSIX_ERRNO\n\t#define configUSE_POSIX_ERRNO 0\n#endif\n\n#ifndef portTICK_TYPE_IS_ATOMIC\n\t#define portTICK_TYPE_IS_ATOMIC 0\n#endif\n\n#ifndef configSUPPORT_STATIC_ALLOCATION\n\t/* Defaults to 0 for backward compatibility. */\n\t#define configSUPPORT_STATIC_ALLOCATION 0\n#endif\n\n#ifndef configSUPPORT_DYNAMIC_ALLOCATION\n\t/* Defaults to 1 for backward compatibility. */\n\t#define configSUPPORT_DYNAMIC_ALLOCATION 1\n#endif\n\n#ifndef configSTACK_DEPTH_TYPE\n\t/* Defaults to uint16_t for backward compatibility, but can be overridden\n\tin FreeRTOSConfig.h if uint16_t is too restrictive. */\n\t#define configSTACK_DEPTH_TYPE uint16_t\n#endif\n\n#ifndef configMESSAGE_BUFFER_LENGTH_TYPE\n\t/* Defaults to size_t for backward compatibility, but can be overridden\n\tin FreeRTOSConfig.h if lengths will always be less than the number of bytes\n\tin a size_t. */\n\t#define configMESSAGE_BUFFER_LENGTH_TYPE size_t\n#endif\n\n/* Sanity check the configuration. */\n#if( configUSE_TICKLESS_IDLE != 0 )\n\t#if( INCLUDE_vTaskSuspend != 1 )\n\t\t#error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0\n\t#endif /* INCLUDE_vTaskSuspend */\n#endif /* configUSE_TICKLESS_IDLE */\n\n#if( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) )\n\t#error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1.\n#endif\n\n#if( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) )\n\t#error configUSE_MUTEXES must be set to 1 to use recursive mutexes\n#endif\n\n#ifndef configINITIAL_TICK_COUNT\n\t#define configINITIAL_TICK_COUNT 0\n#endif\n\n#if( portTICK_TYPE_IS_ATOMIC == 0 )\n\t/* Either variables of tick type cannot be read atomically, or\n\tportTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when\n\tthe tick count is returned to the standard critical section macros. */\n\t#define portTICK_TYPE_ENTER_CRITICAL() portENTER_CRITICAL()\n\t#define portTICK_TYPE_EXIT_CRITICAL() portEXIT_CRITICAL()\n\t#define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR()\n\t#define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) )\n#else\n\t/* The tick type can be read atomically, so critical sections used when the\n\ttick count is returned can be defined away. */\n\t#define portTICK_TYPE_ENTER_CRITICAL()\n\t#define portTICK_TYPE_EXIT_CRITICAL()\n\t#define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() 0\n\t#define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( void ) x\n#endif\n\n/* Definitions to allow backward compatibility with FreeRTOS versions prior to\nV8 if desired. */\n#ifndef configENABLE_BACKWARD_COMPATIBILITY\n\t#define configENABLE_BACKWARD_COMPATIBILITY 1\n#endif\n\n#ifndef configPRINTF\n\t/* configPRINTF() was not defined, so define it away to nothing. To use\n\tconfigPRINTF() then define it as follows (where MyPrintFunction() is\n\tprovided by the application writer):\n\n\tvoid MyPrintFunction(const char *pcFormat, ... );\n\t#define configPRINTF( X ) MyPrintFunction X\n\n\tThen call like a standard printf() function, but placing brackets around\n\tall parameters so they are passed as a single parameter. For example:\n\tconfigPRINTF( (\"Value = %d\", MyVariable) ); */\n\t#define configPRINTF( X )\n#endif\n\n#ifndef configMAX\n\t/* The application writer has not provided their own MAX macro, so define\n\tthe following generic implementation. */\n\t#define configMAX( a, b ) ( ( ( a ) > ( b ) ) ? ( a ) : ( b ) )\n#endif\n\n#ifndef configMIN\n\t/* The application writer has not provided their own MAX macro, so define\n\tthe following generic implementation. */\n\t#define configMIN( a, b ) ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) )\n#endif\n\n#if configENABLE_BACKWARD_COMPATIBILITY == 1\n\t#define eTaskStateGet eTaskGetState\n\t#define portTickType TickType_t\n\t#define xTaskHandle TaskHandle_t\n\t#define xQueueHandle QueueHandle_t\n\t#define xSemaphoreHandle SemaphoreHandle_t\n\t#define xQueueSetHandle QueueSetHandle_t\n\t#define xQueueSetMemberHandle QueueSetMemberHandle_t\n\t#define xTimeOutType TimeOut_t\n\t#define xMemoryRegion MemoryRegion_t\n\t#define xTaskParameters TaskParameters_t\n\t#define xTaskStatusType\tTaskStatus_t\n\t#define xTimerHandle TimerHandle_t\n\t#define xCoRoutineHandle CoRoutineHandle_t\n\t#define pdTASK_HOOK_CODE TaskHookFunction_t\n\t#define portTICK_RATE_MS portTICK_PERIOD_MS\n\t#define pcTaskGetTaskName pcTaskGetName\n\t#define pcTimerGetTimerName pcTimerGetName\n\t#define pcQueueGetQueueName pcQueueGetName\n\t#define vTaskGetTaskInfo vTaskGetInfo\n\n\t/* Backward compatibility within the scheduler code only - these definitions\n\tare not really required but are included for completeness. */\n\t#define tmrTIMER_CALLBACK TimerCallbackFunction_t\n\t#define pdTASK_CODE TaskFunction_t\n\t#define xListItem ListItem_t\n\t#define xList List_t\n\n\t/* For libraries that break the list data hiding, and access list structure\n\tmembers directly (which is not supposed to be done). */\n\t#define pxContainer pvContainer\n#endif /* configENABLE_BACKWARD_COMPATIBILITY */\n\n#if( configUSE_ALTERNATIVE_API != 0 )\n\t#error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0\n#endif\n\n/* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even\nif floating point hardware is otherwise supported by the FreeRTOS port in use.\nThis constant is not supported by all FreeRTOS ports that include floating\npoint support. */\n#ifndef configUSE_TASK_FPU_SUPPORT\n\t#define configUSE_TASK_FPU_SUPPORT 1\n#endif\n\n/*\n * In line with software engineering best practice, FreeRTOS implements a strict\n * data hiding policy, so the real structures used by FreeRTOS to maintain the\n * state of tasks, queues, semaphores, etc. are not accessible to the application\n * code. However, if the application writer wants to statically allocate such\n * an object then the size of the object needs to be know. Dummy structures\n * that are guaranteed to have the same size and alignment requirements of the\n * real objects are used for this purpose. The dummy list and list item\n * structures below are used for inclusion in such a dummy structure.\n */\nstruct xSTATIC_LIST_ITEM\n{\n\tTickType_t xDummy1;\n\tvoid *pvDummy2[ 4 ];\n};\ntypedef struct xSTATIC_LIST_ITEM StaticListItem_t;\n\n/* See the comments above the struct xSTATIC_LIST_ITEM definition. */\nstruct xSTATIC_MINI_LIST_ITEM\n{\n\tTickType_t xDummy1;\n\tvoid *pvDummy2[ 2 ];\n};\ntypedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t;\n\n/* See the comments above the struct xSTATIC_LIST_ITEM definition. */\ntypedef struct xSTATIC_LIST\n{\n\tUBaseType_t uxDummy1;\n\tvoid *pvDummy2;\n\tStaticMiniListItem_t xDummy3;\n} StaticList_t;\n\n/*\n * In line with software engineering best practice, especially when supplying a\n * library that is likely to change in future versions, FreeRTOS implements a\n * strict data hiding policy. This means the Task structure used internally by\n * FreeRTOS is not accessible to application code. However, if the application\n * writer wants to statically allocate the memory required to create a task then\n * the size of the task object needs to be know. The StaticTask_t structure\n * below is provided for this purpose. Its sizes and alignment requirements are\n * guaranteed to match those of the genuine structure, no matter which\n * architecture is being used, and no matter how the values in FreeRTOSConfig.h\n * are set. Its contents are somewhat obfuscated in the hope users will\n * recognise that it would be unwise to make direct use of the structure members.\n */\ntypedef struct xSTATIC_TCB\n{\n\tvoid\t\t\t\t*pxDummy1;\n\t#if ( portUSING_MPU_WRAPPERS == 1 )\n\t\txMPU_SETTINGS\txDummy2;\n\t#endif\n\tStaticListItem_t\txDummy3[ 2 ];\n\tUBaseType_t\t\t\tuxDummy5;\n\tvoid\t\t\t\t*pxDummy6;\n\tuint8_t\t\t\t\tucDummy7[ configMAX_TASK_NAME_LEN ];\n\t#if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )\n\t\tvoid\t\t\t*pxDummy8;\n\t#endif\n\t#if ( portCRITICAL_NESTING_IN_TCB == 1 )\n\t\tUBaseType_t\t\tuxDummy9;\n\t#endif\n\t#if ( configUSE_TRACE_FACILITY == 1 )\n\t\tUBaseType_t\t\tuxDummy10[ 2 ];\n\t#endif\n\t#if ( configUSE_MUTEXES == 1 )\n\t\tUBaseType_t\t\tuxDummy12[ 2 ];\n\t#endif\n\t#if ( configUSE_APPLICATION_TASK_TAG == 1 )\n\t\tvoid\t\t\t*pxDummy14;\n\t#endif\n\t#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )\n\t\tvoid\t\t\t*pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];\n\t#endif\n\t#if ( configGENERATE_RUN_TIME_STATS == 1 )\n\t\tuint32_t\t\tulDummy16;\n\t#endif\n\t#if ( configUSE_NEWLIB_REENTRANT == 1 )\n\t\tstruct\t_reent\txDummy17;\n\t#endif\n\t#if ( configUSE_TASK_NOTIFICATIONS == 1 )\n\t\tuint32_t \t\tulDummy18;\n\t\tuint8_t \t\tucDummy19;\n\t#endif\n\t#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\n\t\tuint8_t\t\t\tuxDummy20;\n\t#endif\n\n\t#if( INCLUDE_xTaskAbortDelay == 1 )\n\t\tuint8_t ucDummy21;\n\t#endif\n\t#if ( configUSE_POSIX_ERRNO == 1 )\n\t\tint\t\t\t\tiDummy22;\n\t#endif\n} StaticTask_t;\n\n/*\n * In line with software engineering best practice, especially when supplying a\n * library that is likely to change in future versions, FreeRTOS implements a\n * strict data hiding policy. This means the Queue structure used internally by\n * FreeRTOS is not accessible to application code. However, if the application\n * writer wants to statically allocate the memory required to create a queue\n * then the size of the queue object needs to be know. The StaticQueue_t\n * structure below is provided for this purpose. Its sizes and alignment\n * requirements are guaranteed to match those of the genuine structure, no\n * matter which architecture is being used, and no matter how the values in\n * FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in the hope\n * users will recognise that it would be unwise to make direct use of the\n * structure members.\n */\ntypedef struct xSTATIC_QUEUE\n{\n\tvoid *pvDummy1[ 3 ];\n\n\tunion\n\t{\n\t\tvoid *pvDummy2;\n\t\tUBaseType_t uxDummy2;\n\t} u;\n\n\tStaticList_t xDummy3[ 2 ];\n\tUBaseType_t uxDummy4[ 3 ];\n\tuint8_t ucDummy5[ 2 ];\n\n\t#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\n\t\tuint8_t ucDummy6;\n\t#endif\n\n\t#if ( configUSE_QUEUE_SETS == 1 )\n\t\tvoid *pvDummy7;\n\t#endif\n\n\t#if ( configUSE_TRACE_FACILITY == 1 )\n\t\tUBaseType_t uxDummy8;\n\t\tuint8_t ucDummy9;\n\t#endif\n\n} StaticQueue_t;\ntypedef StaticQueue_t StaticSemaphore_t;\n\n/*\n * In line with software engineering best practice, especially when supplying a\n * library that is likely to change in future versions, FreeRTOS implements a\n * strict data hiding policy. This means the event group structure used\n * internally by FreeRTOS is not accessible to application code. However, if\n * the application writer wants to statically allocate the memory required to\n * create an event group then the size of the event group object needs to be\n * know. The StaticEventGroup_t structure below is provided for this purpose.\n * Its sizes and alignment requirements are guaranteed to match those of the\n * genuine structure, no matter which architecture is being used, and no matter\n * how the values in FreeRTOSConfig.h are set. Its contents are somewhat\n * obfuscated in the hope users will recognise that it would be unwise to make\n * direct use of the structure members.\n */\ntypedef struct xSTATIC_EVENT_GROUP\n{\n\tTickType_t xDummy1;\n\tStaticList_t xDummy2;\n\n\t#if( configUSE_TRACE_FACILITY == 1 )\n\t\tUBaseType_t uxDummy3;\n\t#endif\n\n\t#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\n\t\t\tuint8_t ucDummy4;\n\t#endif\n\n} StaticEventGroup_t;\n\n/*\n * In line with software engineering best practice, especially when supplying a\n * library that is likely to change in future versions, FreeRTOS implements a\n * strict data hiding policy. This means the software timer structure used\n * internally by FreeRTOS is not accessible to application code. However, if\n * the application writer wants to statically allocate the memory required to\n * create a software timer then the size of the queue object needs to be know.\n * The StaticTimer_t structure below is provided for this purpose. Its sizes\n * and alignment requirements are guaranteed to match those of the genuine\n * structure, no matter which architecture is being used, and no matter how the\n * values in FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in\n * the hope users will recognise that it would be unwise to make direct use of\n * the structure members.\n */\ntypedef struct xSTATIC_TIMER\n{\n\tvoid\t\t\t\t*pvDummy1;\n\tStaticListItem_t\txDummy2;\n\tTickType_t\t\t\txDummy3;\n\tUBaseType_t\t\t\tuxDummy4;\n\tvoid \t\t\t\t*pvDummy5;\n\tTaskFunction_t\t\tpvDummy6;\n\t#if( configUSE_TRACE_FACILITY == 1 )\n\t\tUBaseType_t\t\tuxDummy7;\n\t#endif\n\n\t#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )\n\t\tuint8_t \t\tucDummy8;\n\t#endif\n\n} StaticTimer_t;\n\n/*\n* In line with software engineering best practice, especially when supplying a\n* library that is likely to change in future versions, FreeRTOS implements a\n* strict data hiding policy. This means the stream buffer structure used\n* internally by FreeRTOS is not accessible to application code. However, if\n* the application writer wants to statically allocate the memory required to\n* create a stream buffer then the size of the stream buffer object needs to be\n* know. The StaticStreamBuffer_t structure below is provided for this purpose.\n* Its size and alignment requirements are guaranteed to match those of the\n* genuine structure, no matter which architecture is being used, and no matter\n* how the values in FreeRTOSConfig.h are set. Its contents are somewhat\n* obfuscated in the hope users will recognise that it would be unwise to make\n* direct use of the structure members.\n*/\ntypedef struct xSTATIC_STREAM_BUFFER\n{\n\tsize_t uxDummy1[ 4 ];\n\tvoid * pvDummy2[ 3 ];\n\tuint8_t ucDummy3;\n\t#if ( configUSE_TRACE_FACILITY == 1 )\n\t\tUBaseType_t uxDummy4;\n\t#endif\n} StaticStreamBuffer_t;\n\n/* Message buffers are built on stream buffers. */\ntypedef StaticStreamBuffer_t StaticMessageBuffer_t;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* INC_FREERTOS_H */\n\n" }, { "path": "include/rtos/freertos/FreeRTOSConfig.h", "content": "/* --------------------------------------------------------------------------\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * --------------------------------------------------------------------------\n *\n * $Revision: V10.1.1\n *\n * Project: CMSIS-FreeRTOS\n * Title: FreeRTOS configuration definitions\n *\n * --------------------------------------------------------------------------*/\n\n\n#ifndef FREERTOS_CONFIG_H\n#define FREERTOS_CONFIG_H\n\n/*-----------------------------------------------------------\n * Application specific definitions.\n *\n * These definitions should be adjusted for your particular hardware and\n * application requirements.\n *\n * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\n * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.\n *\n * See http://www.freertos.org/a00110.html.\n *----------------------------------------------------------*/\n\n#include \n\n//#include \"RTE_Components.h\"\n//#include CMSIS_device_header\n#include \"cmsis.h\"\n#include \"hal_trace.h\"\n\n//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------\n\n// Minimal stack size [words] <0-65535>\n// Stack for idle task and default task stack in words.\n// Default: 128\n#define configMINIMAL_STACK_SIZE ((uint16_t)(512))\n\n// Total heap size [bytes] <0-0xFFFFFFFF>\n// Heap memory size in bytes.\n// Default: 8192\n#define configTOTAL_HEAP_SIZE ((size_t)(8192 * 4))\n\n// Kernel tick frequency [Hz] <0-0xFFFFFFFF>\n// Kernel tick rate in Hz.\n// Default: 1000\n#define configTICK_RATE_HZ ((TickType_t)1000)\n\n// Timer task stack depth [words] <0-65535>\n// Stack for timer task in words.\n// Default: 80\n#define configTIMER_TASK_STACK_DEPTH 512\n\n// Timer task priority <0-56>\n// Timer task priority.\n// Default: 40 (High)\n#define configTIMER_TASK_PRIORITY 40\n\n// Timer queue length <0-1024>\n// Timer command queue length.\n// Default: 5\n#define configTIMER_QUEUE_LENGTH 25\n\n// Preemption interrupt priority\n// Maximum priority of interrupts that are safe to call FreeRTOS API.\n// Default: 16\n//#define configMAX_SYSCALL_INTERRUPT_PRIORITY 16\n#define configMAX_SYSCALL_INTERRUPT_PRIORITY 64\n\n// Use time slicing\n// Enable setting to use timeslicing.\n// Default: 1\n#define configUSE_TIME_SLICING 1\n\n// Idle should yield\n// Control Yield behaviour of the idle task.\n// Default: 1\n#define configIDLE_SHOULD_YIELD 1\n\n#define configUSE_TICKLESS_IDLE 1\n\n// Check for stack overflow\n// <0=>Disable <1=>Method one <2=>Method two\n// Enable or disable stack overflow checking.\n// Callback function vApplicationStackOverflowHook implementation is required when stack checking is enabled.\n// Default: 0\n#define configCHECK_FOR_STACK_OVERFLOW 2\n\n// Use idle hook\n// Enable callback function call on each idle task iteration.\n// Callback function vApplicationIdleHook implementation is required when idle hook is enabled.\n// Default: 0\n#define configUSE_IDLE_HOOK 1\n\n// Use tick hook\n// Enable callback function call during each tick interrupt.\n// Callback function vApplicationTickHook implementation is required when tick hook is enabled.\n// Default: 0\n#define configUSE_TICK_HOOK 0\n\n// Use deamon task startup hook\n// Enable callback function call when timer service starts.\n// Callback function vApplicationDaemonTaskStartupHook implementation is required when deamon task startup hook is enabled.\n// Default: 0\n#define configUSE_DAEMON_TASK_STARTUP_HOOK 0\n\n// Use malloc failed hook\n// Enable callback function call when out of dynamic memory.\n// Callback function vApplicationMallocFailedHook implementation is required when malloc failed hook is enabled.\n// Default: 0\n#define configUSE_MALLOC_FAILED_HOOK 1\n\n// Queue registry size\n// Define maximum number of queue objects registered for debug purposes.\n// The queue registry is used by kernel aware debuggers to locate queue and semaphore structures and display associated text names.\n// Default: 0\n#define configQUEUE_REGISTRY_SIZE 0\n\n//#define configGENERATE_RUN_TIME_STATS 1\n#define configUSE_STATS_FORMATTING_FUNCTIONS 1\n\n// Used for the minist time for enter deep sleep\n// Default: 4\n#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 5\n\n// Event Recorder configuration\n// Initialize and setup Event Recorder level filtering.\n// Settings have no effect when Event Recorder is not present.\n\n// Initialize Event Recorder\n// Initialize Event Recorder before FreeRTOS kernel start.\n// Default: 1\n#define configEVR_INITIALIZE 1\n\n// Setup recording level filter\n// Enable configuration of FreeRTOS events recording level\n// Default: 1\n#define configEVR_SETUP_LEVEL 1\n\n// Tasks functions\n// Define event recording level bitmask for events generated from Tasks functions.\n// Default: 0x05\n// <0x00=>Off <0x01=>Errors <0x05=>Errors + Operation <0x0F=>All\n#define configEVR_LEVEL_TASKS 0x05\n\n// Queue functions\n// Define event recording level bitmask for events generated from Queue functions.\n// Default: 0x05\n// <0x00=>Off <0x01=>Errors <0x05=>Errors + Operation <0x0F=>All\n#define configEVR_LEVEL_QUEUE 0x05\n\n// Timer functions\n// Define event recording level bitmask for events generated from Timer functions.\n// Default: 0x05\n// <0x00=>Off <0x01=>Errors <0x05=>Errors + Operation <0x0F=>All\n#define configEVR_LEVEL_TIMERS 0x05\n\n// Event Groups functions\n// Define event recording level bitmask for events generated from Event Groups functions.\n// Default: 0x05\n// <0x00=>Off <0x01=>Errors <0x05=>Errors + Operation <0x0F=>All\n#define configEVR_LEVEL_EVENTGROUPS 0x05\n\n// Heap functions\n// Define event recording level bitmask for events generated from Heap functions.\n// Default: 0x05\n// <0x00=>Off <0x01=>Errors <0x05=>Errors + Operation <0x0F=>All\n#define configEVR_LEVEL_HEAP 0x05\n\n// Stream Buffer functions\n// Define event recording level bitmask for events generated from Stream Buffer functions.\n// Default: 0x05\n// <0x00=>Off <0x01=>Errors <0x05=>Errors + Operation <0x0F=>All\n#define configEVR_LEVEL_STREAMBUFFER 0x05\n// \n// \n#define configASSERT( x ) do {ASSERT( x, \"%s %s, %d\\n\", #x, __func__, __LINE__)} while(0)\n//------------- <<< end of configuration section >>> ---------------------------\n\nextern uint32_t SystemCoreClock;\n\n/* Defines needed by FreeRTOS to implement CMSIS RTOS2 API. Do not change! */\n#define configCPU_CLOCK_HZ (SystemCoreClock)\n#define configSUPPORT_STATIC_ALLOCATION 1\n#define configSUPPORT_DYNAMIC_ALLOCATION 1\n#define configUSE_PREEMPTION 1\n#define configUSE_TIMERS 1\n#define configUSE_MUTEXES 1\n#define configUSE_RECURSIVE_MUTEXES 1\n#define configUSE_COUNTING_SEMAPHORES 1\n#define configUSE_TASK_NOTIFICATIONS 1\n#define configUSE_TRACE_FACILITY 1\n#define configUSE_16_BIT_TICKS 0\n#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0\n#define configMAX_PRIORITIES 56\n#define configKERNEL_INTERRUPT_PRIORITY 255\n\n/* Defines that include FreeRTOS functions which implement CMSIS RTOS2 API. Do not change! */\n#define INCLUDE_xEventGroupSetBitsFromISR 1\n#define INCLUDE_xSemaphoreGetMutexHolder 1\n#define INCLUDE_vTaskDelay 1\n#define INCLUDE_vTaskDelayUntil 1\n#define INCLUDE_vTaskDelete 1\n#define INCLUDE_xTaskGetCurrentTaskHandle 1\n#define INCLUDE_xTaskGetSchedulerState 1\n#define INCLUDE_uxTaskGetStackHighWaterMark 1\n#define INCLUDE_uxTaskPriorityGet 1\n#define INCLUDE_vTaskPrioritySet 1\n#define INCLUDE_eTaskGetState 1\n#define INCLUDE_vTaskSuspend 1\n#define INCLUDE_xTimerPendFunctionCall 1\n\n/* Map the FreeRTOS port interrupt handlers to their CMSIS standard names. */\n#define xPortPendSVHandler PendSV_Handler\n#define vPortSVCHandler SVC_Handler\n\n/* Include debug event definitions */\n#include \"freertos_evr.h\"\n\n#endif /* FREERTOS_CONFIG_H */\n" }, { "path": "include/rtos/freertos/StackMacros.h", "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n#ifndef STACK_MACROS_H\n#define STACK_MACROS_H\n\n#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */\n\t#warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released.\n#endif\n\n/*\n * Call the stack overflow hook function if the stack of the task being swapped\n * out is currently overflowed, or looks like it might have overflowed in the\n * past.\n *\n * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check\n * the current stack state only - comparing the current top of stack value to\n * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1\n * will also cause the last few stack bytes to be checked to ensure the value\n * to which the bytes were set when the task was created have not been\n * overwritten. Note this second test does not guarantee that an overflowed\n * stack will always be recognised.\n */\n\n/*-----------------------------------------------------------*/\n\n#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )\n\n\t/* Only the current stack state is to be checked. */\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t/* Is the currently saved stack pointer within the stack limit? */\t\t\t\t\t\t\t\t\\\n\t\tif( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )\t\t\t\t\t\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\tvApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );\t\\\n\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\n\n#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */\n/*-----------------------------------------------------------*/\n\n#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )\n\n\t/* Only the current stack state is to be checked. */\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t/* Is the currently saved stack pointer within the stack limit? */\t\t\t\t\t\t\t\t\\\n\t\tif( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )\t\t\t\t\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\tvApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );\t\\\n\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\n\n#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */\n/*-----------------------------------------------------------*/\n\n#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )\n\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tconst uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;\t\t\t\t\t\t\t\\\n\t\tconst uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tif( ( pulStack[ 0 ] != ulCheckValue ) ||\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t( pulStack[ 1 ] != ulCheckValue ) ||\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t( pulStack[ 2 ] != ulCheckValue ) ||\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t( pulStack[ 3 ] != ulCheckValue ) )\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\tvApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );\t\\\n\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\n\n#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */\n/*-----------------------------------------------------------*/\n\n#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )\n\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\tint8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\tstatic const uint8_t ucExpectedStackBytes[] = {\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tpcEndOfStack -= sizeof( ucExpectedStackBytes );\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t/* Has the extremity of the task stack ever been written over? */\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tif( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\tvApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );\t\t\t\t\t\t\t\t\t\\\n\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\n\n#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */\n/*-----------------------------------------------------------*/\n\n/* Remove stack overflow macro if not being used. */\n#ifndef taskCHECK_FOR_STACK_OVERFLOW\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\n#endif\n\n\n\n#endif /* STACK_MACROS_H */\n\n" }, { "path": "include/rtos/freertos/cmsis_os.h", "content": "/*\n * Copyright (c) 2013-2017 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * ----------------------------------------------------------------------\n *\n * $Date: 10. January 2017\n * $Revision: V2.1.0\n *\n * Project: CMSIS-RTOS API\n * Title: cmsis_os.h FreeRTOS header file\n *\n * Version 0.02\n * Initial Proposal Phase\n * Version 0.03\n * osKernelStart added, optional feature: main started as thread\n * osSemaphores have standard behavior\n * osTimerCreate does not start the timer, added osTimerStart\n * osThreadPass is renamed to osThreadYield\n * Version 1.01\n * Support for C++ interface\n * - const attribute removed from the osXxxxDef_t typedefs\n * - const attribute added to the osXxxxDef macros\n * Added: osTimerDelete, osMutexDelete, osSemaphoreDelete\n * Added: osKernelInitialize\n * Version 1.02\n * Control functions for short timeouts in microsecond resolution:\n * Added: osKernelSysTick, osKernelSysTickFrequency, osKernelSysTickMicroSec\n * Removed: osSignalGet \n * Version 2.0.0\n * OS objects creation without macros (dynamic creation and resource allocation):\n * - added: osXxxxNew functions which replace osXxxxCreate\n * - added: osXxxxAttr_t structures\n * - deprecated: osXxxxCreate functions, osXxxxDef_t structures\n * - deprecated: osXxxxDef and osXxxx macros\n * osStatus codes simplified and renamed to osStatus_t\n * osEvent return structure deprecated\n * Kernel:\n * - added: osKernelInfo_t and osKernelGetInfo\n * - added: osKernelState_t and osKernelGetState (replaces osKernelRunning)\n * - added: osKernelLock, osKernelUnlock\n * - added: osKernelSuspend, osKernelResume\n * - added: osKernelGetTickCount, osKernelGetTickFreq\n * - renamed osKernelSysTick to osKernelGetSysTimerCount\n * - replaced osKernelSysTickFrequency with osKernelGetSysTimerFreq\n * - deprecated osKernelSysTickMicroSec\n * Thread:\n * - extended number of thread priorities\n * - renamed osPrioriry to osPrioriry_t\n * - replaced osThreadCreate with osThreadNew\n * - added: osThreadGetName\n * - added: osThreadState_t and osThreadGetState\n * - added: osThreadGetStackSize, osThreadGetStackSpace\n * - added: osThreadSuspend, osThreadResume\n * - added: osThreadJoin, osThreadDetach, osThreadExit\n * - added: osThreadGetCount, osThreadEnumerate\n * - added: Thread Flags (moved from Signals) \n * Signals:\n * - renamed osSignals to osThreadFlags (moved to Thread Flags)\n * - changed return value of Set/Clear/Wait functions\n * - Clear function limited to current running thread\n * - extended Wait function (options)\n * - added: osThreadFlagsGet\n * Event Flags:\n * - added new independent object for handling Event Flags\n * Delay and Wait functions:\n * - added: osDelayUntil\n * - deprecated: osWait\n * Timer:\n * - replaced osTimerCreate with osTimerNew\n * - added: osTimerGetName, osTimerIsRunning\n * Mutex:\n * - extended: attributes (Recursive, Priority Inherit, Robust)\n * - replaced osMutexCreate with osMutexNew\n * - renamed osMutexWait to osMutexAcquire\n * - added: osMutexGetName, osMutexGetOwner\n * Semaphore:\n * - extended: maximum and initial token count\n * - replaced osSemaphoreCreate with osSemaphoreNew\n * - renamed osSemaphoreWait to osSemaphoreAcquire (changed return value)\n * - added: osSemaphoreGetName, osSemaphoreGetCount\n * Memory Pool:\n * - using osMemoryPool prefix instead of osPool\n * - replaced osPoolCreate with osMemoryPoolNew\n * - extended osMemoryPoolAlloc (timeout)\n * - added: osMemoryPoolGetName\n * - added: osMemoryPoolGetCapacity, osMemoryPoolGetBlockSize\n * - added: osMemoryPoolGetCount, osMemoryPoolGetSpace\n * - added: osMemoryPoolDelete\n * - deprecated: osPoolCAlloc\n * Message Queue:\n * - extended: fixed size message instead of a single 32-bit value\n * - using osMessageQueue prefix instead of osMessage\n * - replaced osMessageCreate with osMessageQueueNew\n * - updated: osMessageQueuePut, osMessageQueueGet\n * - added: osMessageQueueGetName\n * - added: osMessageQueueGetCapacity, osMessageQueueGetMsgSize\n * - added: osMessageQueueGetCount, osMessageQueueGetSpace\n * - added: osMessageQueueReset, osMessageQueueDelete\n * Mail Queue: \n * - deprecated (superseded by extended Message Queue functionality)\n * Version 2.1.0\n * Support for critical and uncritical sections (nesting safe):\n * - updated: osKernelLock, osKernelUnlock\n * - added: osKernelRestoreLock\n * Updated Thread and Event Flags:\n * - changed flags parameter and return type from int32_t to uint32_t\n *---------------------------------------------------------------------------*/\n \n#ifndef CMSIS_OS_H_\n#define CMSIS_OS_H_\n \n#define osCMSIS 0x20001U ///< API version (main[31:16].sub[15:0])\n \n#define osCMSIS_FreeRTOS 0x90000U ///< RTOS identification and version (main[31:16].sub[15:0])\n \n#define osKernelSystemId \"FreeRTOS V9.0.0\" ///< RTOS identification string\n \n// The stack space occupied is mainly dependent on the underling C standard library\n#if defined(__GNUC__) || defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__ICCARM__)\n# define WORDS_STACK_SIZE 512\n#elif defined(TOOLCHAIN_ARM_MICRO)\n# define WORDS_STACK_SIZE 128\n#endif\n\n#define DEFAULT_STACK_SIZE (WORDS_STACK_SIZE*4)\n\n#define osFeature_MainThread 1 ///< main thread 1=main can be thread, 0=not available\n#define osFeature_Signals 24U ///< maximum number of Signal Flags available per thread\n#define osFeature_Semaphore 65535U ///< maximum count for \\ref osSemaphoreCreate function\n#define osFeature_Wait 0 ///< osWait function: 1=available, 0=not available\n#define osFeature_SysTick 1 ///< osKernelSysTick functions: 1=available, 0=not available\n#define osFeature_Pool 1 ///< Memory Pools: 1=available, 0=not available\n#define osFeature_MessageQ 1 ///< Message Queues: 1=available, 0=not available\n#define osFeature_MailQ 1 ///< Mail Queues: 1=available, 0=not available\n \n#if defined(__CC_ARM)\n#define os_InRegs __value_in_regs\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n#define os_InRegs __attribute__((value_in_regs))\n#else\n#define os_InRegs\n#endif\n \n#include \"cmsis_os2.h\"\n#include \"FreeRTOS.h\"\n \n\n// OS_API_IN_INTLOCK can be enabled in target.mk by:\n// export OS_API_IN_INTLOCK ?= 1\n\n#ifdef OS_API_IN_INTLOCK\n// CAUTION:\n// It will be treated as in ISR when calling OS APIs in intlock(), but\n// the stack might still be using PSP instead of MSP.\n#define IN_ISR() (__get_IPSR() != 0 || __get_PRIMASK() != 0)\n#else\n#define IN_ISR() (__get_IPSR() != 0)\n#endif\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n \n \n// ==== Enumerations, structures, defines ====\n \n/// Priority values.\n#if (osCMSIS < 0x20000U)\ntypedef enum {\n osPriorityIdle = -3, ///< Priority: idle (lowest)\n osPriorityLow = -2, ///< Priority: low\n osPriorityBelowNormal = -1, ///< Priority: below normal\n osPriorityNormal = 0, ///< Priority: normal (default)\n osPriorityAboveNormal = +1, ///< Priority: above normal\n osPriorityHigh = +2, ///< Priority: high\n osPriorityRealtime = +3, ///< Priority: realtime (highest)\n osPriorityError = 0x84, ///< System cannot determine priority or illegal priority.\n osPriorityReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization.\n} osPriority;\n#else\n#define osPriority osPriority_t\n#endif\n\n/// Entry point of a thread.\ntypedef void (*os_pthread) (void const *argument);\n \n/// Entry point of a timer call back function.\ntypedef void (*os_ptimer) (void const *argument);\n \n/// Timer type.\n#if (osCMSIS < 0x20000U)\ntypedef enum {\n osTimerOnce = 0, ///< One-shot timer.\n osTimerPeriodic = 1 ///< Repeating timer.\n} os_timer_type;\n#else\n#define os_timer_type osTimerType_t\n#endif\n \n/// Timeout value.\n#define osWaitForever 0xFFFFFFFFU ///< Wait forever timeout value.\n \n/// Status code values returned by CMSIS-RTOS functions.\n#if (osCMSIS < 0x20000U)\ntypedef enum {\n osOK = 0, ///< Function completed; no error or event occurred.\n osEventSignal = 0x08, ///< Function completed; signal event occurred.\n osEventMessage = 0x10, ///< Function completed; message event occurred.\n osEventMail = 0x20, ///< Function completed; mail event occurred.\n osEventTimeout = 0x40, ///< Function completed; timeout occurred.\n osErrorParameter = 0x80, ///< Parameter error: a mandatory parameter was missing or specified an incorrect object.\n osErrorResource = 0x81, ///< Resource not available: a specified resource was not available.\n osErrorTimeoutResource = 0xC1, ///< Resource not available within given time: a specified resource was not available within the timeout period.\n osErrorISR = 0x82, ///< Not allowed in ISR context: the function cannot be called from interrupt service routines.\n osErrorISRRecursive = 0x83, ///< Function called multiple times from ISR with same object.\n osErrorPriority = 0x84, ///< System cannot determine priority or thread has illegal priority.\n osErrorNoMemory = 0x85, ///< System is out of memory: it was impossible to allocate or reserve memory for the operation.\n osErrorValue = 0x86, ///< Value of a parameter is out of range.\n osErrorOS = 0xFF, ///< Unspecified RTOS error: run-time error but no other error message fits.\n osStatusReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization.\n} osStatus;\n#else\ntypedef int32_t osStatus;\n#define osEventSignal (0x08)\n#define osEventMessage (0x10)\n#define osEventMail (0x20)\n#define osEventTimeout (0x40)\n#define osErrorOS osError\n#define osErrorTimeoutResource osErrorTimeout\n#define osErrorISRRecursive (-126)\n#define osErrorValue (-127)\n#define osErrorPriority (-128)\n#define os_status_reserved (0x7FFFFFFF) ///< Prevents enum down-size compiler optimization.\n#endif\n \n \n// >>> the following data type definitions may be adapted towards a specific RTOS\n \n/// Thread ID identifies the thread.\n#if (osCMSIS < 0x20000U)\ntypedef void *osThreadId;\n#else\n#define osThreadId osThreadId_t\n#endif\n \n/// Timer ID identifies the timer.\n#if (osCMSIS < 0x20000U)\ntypedef void *osTimerId;\n#else\n#define osTimerId osTimerId_t\n#endif\n \n/// Mutex ID identifies the mutex.\n#if (osCMSIS < 0x20000U)\ntypedef void *osMutexId;\n#else\n#define osMutexId osMutexId_t\n#endif\n \n/// Semaphore ID identifies the semaphore.\n#if (osCMSIS < 0x20000U)\ntypedef void *osSemaphoreId;\n#else\n#define osSemaphoreId osSemaphoreId_t\n#endif\n \n/// Pool ID identifies the memory pool.\ntypedef void *osPoolId;\n \n/// Message ID identifies the message queue.\ntypedef void *osMessageQId;\n \n/// Mail ID identifies the mail queue.\ntypedef void *osMailQId;\n \n \n/// Thread Definition structure contains startup information of a thread.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_thread_def {\n os_pthread pthread; ///< start address of thread function\n osPriority tpriority; ///< initial thread priority\n uint32_t instances; ///< maximum number of instances of that thread function\n uint32_t stacksize; ///< stack size requirements in bytes; 0 is default stack size\n} osThreadDef_t;\n#else\ntypedef struct os_thread_def {\n os_pthread pthread; ///< start address of thread function\n osThreadAttr_t attr; ///< thread attributes\n} osThreadDef_t;\n#endif\n \n/// Timer Definition structure contains timer parameters.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_timer_def {\n os_ptimer ptimer; ///< start address of a timer function\n} osTimerDef_t;\n#else\ntypedef struct os_timer_def {\n os_ptimer ptimer; ///< start address of a timer function\n osTimerAttr_t attr; ///< timer attributes\n} osTimerDef_t;\n#endif\n \n/// Mutex Definition structure contains setup information for a mutex.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_mutex_def {\n// uint32_t dummy; ///< dummy value\n void *mutex; ///< pointer to internal data\n} osMutexDef_t;\n#else\n#define osMutexDef_t osMutexAttr_t\n#endif\n \n/// Semaphore Definition structure contains setup information for a semaphore.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_semaphore_def {\n// uint32_t dummy; ///< dummy value\n void *semaphore; ///< pointer to internal data\n} osSemaphoreDef_t;\n#else\n#define osSemaphoreDef_t osSemaphoreAttr_t\n#endif\n \n/// Definition structure for memory block allocation.\n//#if (osCMSIS < 0x20000U)\n#if 1\ntypedef struct os_pool_def {\n uint32_t pool_sz; ///< number of items (elements) in the pool\n uint32_t item_sz; ///< size of an item\n void *pool; ///< pointer to memory for pool\n} osPoolDef_t;\n#else\ntypedef struct os_pool_def {\n uint32_t pool_sz; ///< number of items (elements) in the pool\n uint32_t item_sz; ///< size of an item\n osMemoryPoolAttr_t attr; ///< memory pool attributes\n} osPoolDef_t;\n#endif\n \n/// Definition structure for message queue.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_messageQ_def {\n uint32_t queue_sz; ///< number of elements in the queue\n void *pool; ///< memory array for messages\n} osMessageQDef_t;\n#else\ntypedef struct os_messageQ_def {\n uint32_t queue_sz; ///< number of elements in the queue\n osMessageQueueAttr_t attr; ///< message queue attributes\n} osMessageQDef_t;\n#endif\n \n/// Definition structure for mail queue.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_mailQ_def {\n uint32_t queue_sz; ///< number of elements in the queue\n uint32_t item_sz; ///< size of an item\n void *pool; ///< memory array for mail\n} osMailQDef_t;\n#else\ntypedef struct os_mailQ_def {\n // uint32_t queue_sz; ///< number of elements in the queue\n // uint32_t item_sz; ///< size of an item\n osPoolDef_t mq_pool; ///< memory pool attributes\n void *mail; ///< pointer to mail\n //osMemoryPoolAttr_t mp_attr; ///< memory pool attributes\n osMessageQueueAttr_t mq_attr; ///< message queue attributes\n} osMailQDef_t;\n#endif\n \n \n/// Event structure contains detailed information about an event.\ntypedef struct {\n osStatus status; ///< status code: event or error information\n union {\n uint32_t v; ///< message as 32-bit value\n void *p; ///< message or mail as void pointer\n int32_t signals; ///< signal flags\n } value; ///< event value\n union {\n osMailQId mail_id; ///< mail id obtained by \\ref osMailCreate\n osMessageQId message_id; ///< message id obtained by \\ref osMessageCreate\n } def; ///< event definition\n} osEvent;\n \n \n// ==== Kernel Management Functions ====\n \n/// Initialize the RTOS Kernel for creating objects.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osKernelInitialize (void);\n#endif\n \n/// Start the RTOS Kernel scheduler.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osKernelStart (void);\n#endif\n \n/// Check if the RTOS kernel is already started.\n/// \\return 0 RTOS is not started, 1 RTOS is started.\n#if (osCMSIS < 0x20000U)\nint32_t osKernelRunning(void);\n#endif\n \n#if (defined(osFeature_SysTick) && (osFeature_SysTick != 0)) // System Timer available\n \n/// Get the RTOS kernel system timer counter.\n/// \\return RTOS kernel system timer as 32-bit value \n#if (osCMSIS < 0x20000U)\nuint32_t osKernelSysTick (void);\n#else\n#define osKernelSysTick osKernelGetSysTimerCount\n#endif\n \n/// The RTOS kernel system timer frequency in Hz.\n/// \\note Reflects the system timer setting and is typically defined in a configuration file.\n#if (osCMSIS < 0x20000U)\n#define osKernelSysTickFrequency 100000000\n#endif\n \n/// Convert a microseconds value to a RTOS kernel system timer value.\n/// \\param microsec time value in microseconds.\n/// \\return time value normalized to the \\ref osKernelSysTickFrequency\n#if (osCMSIS < 0x20000U)\n#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec * (osKernelSysTickFrequency)) / 1000000)\n#else\n#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec * osKernelGetSysTimerFreq()) / 1000000)\n#endif\n \n#endif // System Timer available\n \n \n// ==== Thread Management Functions ====\n \n/// Create a Thread Definition with function, priority, and stack requirements.\n/// \\param name name of the thread function.\n/// \\param priority initial priority of the thread function.\n/// \\param instances number of possible thread instances.\n/// \\param stacksz stack size (in bytes) requirements for the thread function.\n#if defined (osObjectsExternal) // object is external\n#define osThreadDef(name, priority, instances, stacksz) \\\nextern const osThreadDef_t os_thread_def_##name\n#else // define the object\n#define osThreadDef(name, priority, instances, stacksz, task_name) \\\nstatic uint64_t os_thread_stack##name[(stacksz)?(((stacksz+7)/8)):1]; \\\nstatic StaticTask_t os_thread_cb_##name; \\\nconst osThreadDef_t os_thread_def_##name = \\\n{ (name), \\\n { task_name, osThreadDetached, \\\n (instances == 1) ? (&os_thread_cb_##name) : NULL,\\\n (instances == 1) ? sizeof(StaticTask_t) : 0U, \\\n ((stacksz) && (instances == 1)) ? (&os_thread_stack##name) : NULL, \\\n 8*((stacksz+7)/8), \\\n (priority), 0U, 0U } }\n#endif\n \n/// Access a Thread definition.\n/// \\param name name of the thread definition object.\n#define osThread(name) \\\n&os_thread_def_##name\n \n/// Create a thread and add it to Active Threads and set it to state READY.\n/// \\param[in] thread_def thread definition referenced with \\ref osThread.\n/// \\param[in] argument pointer that is passed to the thread function as start argument.\n/// \\return thread ID for reference by other functions or NULL in case of error.\nosThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument);\n \n/// Return the thread ID of the current running thread.\n/// \\return thread ID for reference by other functions or NULL in case of error.\n#if (osCMSIS < 0x20000U)\nosThreadId osThreadGetId (void);\n#endif\n \n//#if (osCMSIS < 0x20000U)\nint osGetThreadIntId (void);\n//#endif\n\n/// Change priority of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in] priority new priority value for the thread function.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osThreadSetPriority (osThreadId thread_id, osPriority priority);\n#endif\n \n/// Get current priority of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return current priority value of the specified thread.\n#if (osCMSIS < 0x20000U)\nosPriority osThreadGetPriority (osThreadId thread_id);\n#endif\n \n/// Pass control to next thread that is in state \\b READY.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osThreadYield (void);\n#endif\n \n/// Terminate execution of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osThreadTerminate (osThreadId thread_id);\n#endif\n \n \n// ==== Signal Management ====\n \n/// Set the specified Signal Flags of an active thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in] signals specifies the signal flags of the thread that should be set.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\nint32_t osSignalSet (osThreadId thread_id, int32_t signals);\n \n/// Clear the specified Signal Flags of an active thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in] signals specifies the signal flags of the thread that shall be cleared.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters or call from ISR.\nint32_t osSignalClear (osThreadId thread_id, int32_t signals);\n \n/// Wait for one or more Signal Flags to become signaled for the current \\b RUNNING thread.\n/// \\param[in] signals wait until all specified signal flags set or 0 for any single signal flag.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return event flag information or error code.\nos_InRegs osEvent osSignalWait (int32_t signals, uint32_t millisec);\n \n \n// ==== Generic Wait Functions ====\n \n/// Wait for Timeout (Time Delay).\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue \"time delay\" value\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osDelay (uint32_t millisec);\n#endif\n \n#if (defined (osFeature_Wait) && (osFeature_Wait != 0)) // Generic Wait available\n \n/// Wait for Signal, Message, Mail, or Timeout.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out\n/// \\return event that contains signal, message, or mail information or error code.\nos_InRegs osEvent osWait (uint32_t millisec);\n \n#endif // Generic Wait available\n \n \n// ==== Timer Management Functions ====\n \n/// Define a Timer object.\n/// \\param name name of the timer object.\n/// \\param function name of the timer call back function.\n#if defined (osObjectsExternal) // object is external\n#define osTimerDef(name, function) \\\nextern const osTimerDef_t os_timer_def_##name\n#else // define the object\n#define osTimerDef(name, function) \\\nstatic StaticTimer_t os_timer_cb_##name; \\\nconst osTimerDef_t os_timer_def_##name = \\\n{ (function), { NULL, 0U, (&os_timer_cb_##name), sizeof(StaticTimer_t) } }\n#endif\n \n/// Access a Timer definition.\n/// \\param name name of the timer object.\n#define osTimer(name) \\\n&os_timer_def_##name\n \n/// Create and Initialize a timer.\n/// \\param[in] timer_def timer object referenced with \\ref osTimer.\n/// \\param[in] type osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.\n/// \\param[in] argument argument to the timer call back function.\n/// \\return timer ID for reference by other functions or NULL in case of error.\nosTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument);\n \n/// Start or restart a timer.\n/// \\param[in] timer_id timer ID obtained by \\ref osTimerCreate.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue \"time delay\" value of the timer.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osTimerStart (osTimerId timer_id, uint32_t millisec);\n#endif\n \n/// Stop a timer.\n/// \\param[in] timer_id timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osTimerStop (osTimerId timer_id);\n#endif\n \n/// Delete a timer.\n/// \\param[in] timer_id timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osTimerDelete (osTimerId timer_id);\n#endif\n \n \n// ==== Mutex Management Functions ====\n \n/// Define a Mutex.\n/// \\param name name of the mutex object.\n#if defined (osObjectsExternal) // object is external\n#define osMutexDef(name) \\\nextern const osMutexDef_t os_mutex_def_##name\n#else // define the object\n#define osMutexDef(name) \\\nstatic StaticSemaphore_t os_mutex_cb_##name; \\\nconst osMutexDef_t os_mutex_def_##name = \\\n{ NULL, osMutexRecursive | osMutexPrioInherit, (&os_mutex_cb_##name), sizeof(StaticSemaphore_t) }\n#endif\n \n/// Access a Mutex definition.\n/// \\param name name of the mutex object.\n#define osMutex(name) \\\n&os_mutex_def_##name\n \n/// Create and Initialize a Mutex object.\n/// \\param[in] mutex_def mutex definition referenced with \\ref osMutex.\n/// \\return mutex ID for reference by other functions or NULL in case of error.\nosMutexId osMutexCreate (const osMutexDef_t *mutex_def);\n \n/// Wait until a Mutex becomes available.\n/// \\param[in] mutex_id mutex ID obtained by \\ref osMutexCreate.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osMutexWait (osMutexId mutex_id, uint32_t millisec);\n#else\n#define osMutexWait osMutexAcquire\n#endif\n \n/// Release a Mutex that was obtained by \\ref osMutexWait.\n/// \\param[in] mutex_id mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osMutexRelease (osMutexId mutex_id);\n#endif\n \n/// Delete a Mutex object.\n/// \\param[in] mutex_id mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osMutexDelete (osMutexId mutex_id);\n#endif\n \n \n// ==== Semaphore Management Functions ====\n \n#if (defined (osFeature_Semaphore) && (osFeature_Semaphore != 0U)) // Semaphore available\n \n/// Define a Semaphore object.\n/// \\param name name of the semaphore object.\n#if defined (osObjectsExternal) // object is external\n#define osSemaphoreDef(name) \\\nextern const osSemaphoreDef_t os_semaphore_def_##name\n#else // define the object\n#define osSemaphoreDef(name) \\\nstatic StaticSemaphore_t os_semaphore_cb_##name; \\\nconst osSemaphoreDef_t os_semaphore_def_##name = \\\n{ NULL, 0U, (&os_semaphore_cb_##name), sizeof(StaticSemaphore_t) }\n#endif\n \n/// Access a Semaphore definition.\n/// \\param name name of the semaphore object.\n#define osSemaphore(name) \\\n&os_semaphore_def_##name\n \n/// Create and Initialize a Semaphore object.\n/// \\param[in] semaphore_def semaphore definition referenced with \\ref osSemaphore.\n/// \\param[in] count maximum and initial number of available tokens.\n/// \\return semaphore ID for reference by other functions or NULL in case of error.\nosSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count);\n \n/// Wait until a Semaphore token becomes available.\n/// \\param[in] semaphore_id semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return number of available tokens, or -1 in case of incorrect parameters.\nint32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);\n \n/// Release a Semaphore token.\n/// \\param[in] semaphore_id semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osSemaphoreRelease (osSemaphoreId semaphore_id);\n#endif\n \n/// Delete a Semaphore object.\n/// \\param[in] semaphore_id semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osSemaphoreDelete (osSemaphoreId semaphore_id);\n#endif\n \n#endif // Semaphore available\n \n \n// ==== Memory Pool Management Functions ====\n\n#if (defined(osFeature_Pool) && (osFeature_Pool != 0)) // Memory Pool available\n \n/// \\brief Define a Memory Pool.\n/// \\param name name of the memory pool.\n/// \\param no maximum number of blocks (objects) in the memory pool.\n/// \\param type data type of a single block (object).\n#if defined (osObjectsExternal) // object is external\n#define osPoolDef(name, no, type) \\\nextern const osPoolDef_t os_pool_def_##name\n#else // define the object\n#define osPoolDef(name, no, type) \\\nuint32_t os_pool_m_##name[3+((sizeof(type)+3)/4)*(no)]; \\\nconst osPoolDef_t os_pool_def_##name = \\\n{ (no), sizeof(type), (os_pool_m_##name) }\n//const osPoolDef_t os_pool_def_##name = \n//{ (no), sizeof(type), {NULL} }\n#endif\n \n/// \\brief Access a Memory Pool definition.\n/// \\param name name of the memory pool\n#define osPool(name) \\\n&os_pool_def_##name\n \n/// Create and Initialize a Memory Pool object.\n/// \\param[in] pool_def memory pool definition referenced with \\ref osPool.\n/// \\return memory pool ID for reference by other functions or NULL in case of error.\nosPoolId osPoolCreate (const osPoolDef_t *pool_def);\n \n/// Allocate a memory block from a Memory Pool.\n/// \\param[in] pool_id memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\nvoid *osPoolAlloc (osPoolId pool_id);\n \n/// Allocate a memory block from a Memory Pool and set memory block to zero.\n/// \\param[in] pool_id memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\nvoid *osPoolCAlloc (osPoolId pool_id);\n \n/// Return an allocated memory block back to a Memory Pool.\n/// \\param[in] pool_id memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\param[in] block address of the allocated memory block to be returned to the memory pool.\n/// \\return status code that indicates the execution status of the function.\nosStatus osPoolFree (osPoolId pool_id, void *block);\n \n#endif // Memory Pool available\n \n \n// ==== Message Queue Management Functions ====\n \n#if (defined(osFeature_MessageQ) && (osFeature_MessageQ != 0)) // Message Queue available\n \n/// \\brief Create a Message Queue Definition.\n/// \\param name name of the queue.\n/// \\param queue_sz maximum number of messages in the queue.\n/// \\param type data type of a single message element (for debugger).\n#if defined (osObjectsExternal) // object is external\n#define osMessageQDef(name, queue_sz, type) \\\nextern const osMessageQDef_t os_messageQ_def_##name\n#else // define the object\n#define osMessageQDef(name, queue_sz, type) \\\nstatic StaticQueue_t os_mq_cb_##name; \\\nstatic uint32_t os_mq_data_##name[(queue_sz) * sizeof(type)]; \\\nconst osMessageQDef_t os_messageQ_def_##name = \\\n{ (queue_sz), \\\n { NULL, 0U, (&os_mq_cb_##name), sizeof(StaticQueue_t), \\\n (&os_mq_data_##name), sizeof(os_mq_data_##name) } }\n#endif\n \n/// \\brief Access a Message Queue Definition.\n/// \\param name name of the queue\n#define osMessageQ(name) \\\n&os_messageQ_def_##name\n \n/// Create and Initialize a Message Queue object.\n/// \\param[in] queue_def message queue definition referenced with \\ref osMessageQ.\n/// \\param[in] thread_id thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return message queue ID for reference by other functions or NULL in case of error.\nosMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id);\n \n/// Put a Message to a Queue.\n/// \\param[in] queue_id message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in] info message information.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec);\n \n/// Get a Message from a Queue or timeout if Queue is empty.\n/// \\param[in] queue_id message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return event information that includes status code.\nos_InRegs osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);\n \nuint32_t osMessageGetSpace (osMessageQId queue_id);\n#endif // Message Queue available\n \n \n// ==== Mail Queue Management Functions ====\n \n#if (defined(osFeature_MailQ) && (osFeature_MailQ != 0)) // Mail Queue available\n \n/// \\brief Create a Mail Queue Definition.\n/// \\param name name of the queue.\n/// \\param queue_sz maximum number of mails in the queue.\n/// \\param type data type of a single mail element.\n#if defined (osObjectsExternal) // object is external\n#define osMailQDef(name, queue_sz, type) \\\nextern const osMailQDef_t os_mailQ_def_##name\n#else // define the object\n#define osMailQDef(name, queue_sz, type) \\\nstatic uint32_t os_mailQ_m_##name[3+((sizeof(type)+3)/4)*(queue_sz)]; \\\nosMailQDef_t os_mailQ_def_##name = \\\n{ {(queue_sz), sizeof(type), (os_mailQ_m_##name)}, NULL, {NULL} }\n#endif\n \n/// \\brief Access a Mail Queue Definition.\n/// \\param name name of the queue\n#define osMailQ(name) \\\n&os_mailQ_def_##name\n \n/// Create and Initialize a Mail Queue object.\n/// \\param[in] queue_def mail queue definition referenced with \\ref osMailQ.\n/// \\param[in] thread_id thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return mail queue ID for reference by other functions or NULL in case of error.\n//osMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id);\nosMailQId osMailCreate (osMailQDef_t *queue_def, osThreadId thread_id);\n \n/// Allocate a memory block for mail from a mail memory pool.\n/// \\param[in] queue_id mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\nvoid *osMailAlloc (osMailQId queue_id, uint32_t millisec);\n \n/// Allocate a memory block for mail from a mail memory pool and set memory block to zero.\n/// \\param[in] queue_id mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\nvoid *osMailCAlloc (osMailQId queue_id, uint32_t millisec);\n \n/// Put a Mail into a Queue.\n/// \\param[in] queue_id mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in] mail pointer to memory with mail to put into a queue.\n/// \\return status code that indicates the execution status of the function.\nosStatus osMailPut (osMailQId queue_id, const void *mail);\n \n/// Get a Mail from a Queue or timeout if Queue is empty.\n/// \\param[in] queue_id mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in] millisec \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return event information that includes status code.\nos_InRegs osEvent osMailGet (osMailQId queue_id, uint32_t millisec);\n \n/// Free a memory block by returning it to a mail memory pool.\n/// \\param[in] queue_id mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in] mail pointer to memory block that was obtained with \\ref osMailGet.\n/// \\return status code that indicates the execution status of the function.\nosStatus osMailFree (osMailQId queue_id, void *mail);\n \n#endif // Mail Queue available\n \nvoid os_error_str (const char *fmt, ...);\n \n#ifdef __cplusplus\n}\n#endif\n \n#endif // CMSIS_OS_H_\n" }, { "path": "include/rtos/freertos/cmsis_os2.h", "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * ----------------------------------------------------------------------\n *\n * $Date: 18. June 2018\n * $Revision: V2.1.3\n *\n * Project: CMSIS-RTOS2 API\n * Title: cmsis_os2.h header file\n *\n * Version 2.1.3\n * Additional functions allowed to be called from Interrupt Service Routines:\n * - osThreadGetId\n * Version 2.1.2\n * Additional functions allowed to be called from Interrupt Service Routines:\n * - osKernelGetInfo, osKernelGetState\n * Version 2.1.1\n * Additional functions allowed to be called from Interrupt Service Routines:\n * - osKernelGetTickCount, osKernelGetTickFreq\n * Changed Kernel Tick type to uint32_t:\n * - updated: osKernelGetTickCount, osDelayUntil\n * Version 2.1.0\n * Support for critical and uncritical sections (nesting safe):\n * - updated: osKernelLock, osKernelUnlock\n * - added: osKernelRestoreLock\n * Updated Thread and Event Flags:\n * - changed flags parameter and return type from int32_t to uint32_t\n * Version 2.0.0\n * Initial Release\n *---------------------------------------------------------------------------*/\n \n#ifndef CMSIS_OS2_H_\n#define CMSIS_OS2_H_\n \n#ifndef __NO_RETURN\n#if defined(__CC_ARM)\n#define __NO_RETURN __declspec(noreturn)\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n#define __NO_RETURN __attribute__((__noreturn__))\n#elif defined(__GNUC__)\n#define __NO_RETURN __attribute__((__noreturn__))\n#elif defined(__ICCARM__)\n#define __NO_RETURN __noreturn\n#else\n#define __NO_RETURN\n#endif\n#endif\n \n#include \n#include \n \n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n \n \n// ==== Enumerations, structures, defines ====\n \n/// Version information.\ntypedef struct {\n uint32_t api; ///< API version (major.minor.rev: mmnnnrrrr dec).\n uint32_t kernel; ///< Kernel version (major.minor.rev: mmnnnrrrr dec).\n} osVersion_t;\n \n/// Kernel state.\ntypedef enum {\n osKernelInactive = 0, ///< Inactive.\n osKernelReady = 1, ///< Ready.\n osKernelRunning = 2, ///< Running.\n osKernelLocked = 3, ///< Locked.\n osKernelSuspended = 4, ///< Suspended.\n osKernelError = -1, ///< Error.\n osKernelReserved = 0x7FFFFFFFU ///< Prevents enum down-size compiler optimization.\n} osKernelState_t;\n \n/// Thread state.\ntypedef enum {\n osThreadInactive = 0, ///< Inactive.\n osThreadReady = 1, ///< Ready.\n osThreadRunning = 2, ///< Running.\n osThreadBlocked = 3, ///< Blocked.\n osThreadTerminated = 4, ///< Terminated.\n osThreadError = -1, ///< Error.\n osThreadReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization.\n} osThreadState_t;\n \n/// Priority values.\ntypedef enum {\n osPriorityNone = 0, ///< No priority (not initialized).\n osPriorityIdle = 1, ///< Reserved for Idle thread.\n osPriorityLow = 8, ///< Priority: low\n osPriorityLow1 = 8+1, ///< Priority: low + 1\n osPriorityLow2 = 8+2, ///< Priority: low + 2\n osPriorityLow3 = 8+3, ///< Priority: low + 3\n osPriorityLow4 = 8+4, ///< Priority: low + 4\n osPriorityLow5 = 8+5, ///< Priority: low + 5\n osPriorityLow6 = 8+6, ///< Priority: low + 6\n osPriorityLow7 = 8+7, ///< Priority: low + 7\n osPriorityBelowNormal = 16, ///< Priority: below normal\n osPriorityBelowNormal1 = 16+1, ///< Priority: below normal + 1\n osPriorityBelowNormal2 = 16+2, ///< Priority: below normal + 2\n osPriorityBelowNormal3 = 16+3, ///< Priority: below normal + 3\n osPriorityBelowNormal4 = 16+4, ///< Priority: below normal + 4\n osPriorityBelowNormal5 = 16+5, ///< Priority: below normal + 5\n osPriorityBelowNormal6 = 16+6, ///< Priority: below normal + 6\n osPriorityBelowNormal7 = 16+7, ///< Priority: below normal + 7\n osPriorityNormal = 24, ///< Priority: normal\n osPriorityNormal1 = 24+1, ///< Priority: normal + 1\n osPriorityNormal2 = 24+2, ///< Priority: normal + 2\n osPriorityNormal3 = 24+3, ///< Priority: normal + 3\n osPriorityNormal4 = 24+4, ///< Priority: normal + 4\n osPriorityNormal5 = 24+5, ///< Priority: normal + 5\n osPriorityNormal6 = 24+6, ///< Priority: normal + 6\n osPriorityNormal7 = 24+7, ///< Priority: normal + 7\n osPriorityAboveNormal = 32, ///< Priority: above normal\n osPriorityAboveNormal1 = 32+1, ///< Priority: above normal + 1\n osPriorityAboveNormal2 = 32+2, ///< Priority: above normal + 2\n osPriorityAboveNormal3 = 32+3, ///< Priority: above normal + 3\n osPriorityAboveNormal4 = 32+4, ///< Priority: above normal + 4\n osPriorityAboveNormal5 = 32+5, ///< Priority: above normal + 5\n osPriorityAboveNormal6 = 32+6, ///< Priority: above normal + 6\n osPriorityAboveNormal7 = 32+7, ///< Priority: above normal + 7\n osPriorityHigh = 40, ///< Priority: high\n osPriorityHigh1 = 40+1, ///< Priority: high + 1\n osPriorityHigh2 = 40+2, ///< Priority: high + 2\n osPriorityHigh3 = 40+3, ///< Priority: high + 3\n osPriorityHigh4 = 40+4, ///< Priority: high + 4\n osPriorityHigh5 = 40+5, ///< Priority: high + 5\n osPriorityHigh6 = 40+6, ///< Priority: high + 6\n osPriorityHigh7 = 40+7, ///< Priority: high + 7\n osPriorityRealtime = 48, ///< Priority: realtime\n osPriorityRealtime1 = 48+1, ///< Priority: realtime + 1\n osPriorityRealtime2 = 48+2, ///< Priority: realtime + 2\n osPriorityRealtime3 = 48+3, ///< Priority: realtime + 3\n osPriorityRealtime4 = 48+4, ///< Priority: realtime + 4\n osPriorityRealtime5 = 48+5, ///< Priority: realtime + 5\n osPriorityRealtime6 = 48+6, ///< Priority: realtime + 6\n osPriorityRealtime7 = 48+7, ///< Priority: realtime + 7\n osPriorityISR = 56, ///< Reserved for ISR deferred thread.\n osPriorityError = -1, ///< System cannot determine priority or illegal priority.\n osPriorityReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization.\n} osPriority_t;\n \n/// Entry point of a thread.\ntypedef void (*osThreadFunc_t) (void *argument);\n \n/// Timer callback function.\ntypedef void (*osTimerFunc_t) (void *argument);\n \n/// Timer type.\ntypedef enum {\n osTimerOnce = 0, ///< One-shot timer.\n osTimerPeriodic = 1 ///< Repeating timer.\n} osTimerType_t;\n \n// Timeout value.\n#define osWaitForever 0xFFFFFFFFU ///< Wait forever timeout value.\n \n// Flags options (\\ref osThreadFlagsWait and \\ref osEventFlagsWait).\n#define osFlagsWaitAny 0x00000000U ///< Wait for any flag (default).\n#define osFlagsWaitAll 0x00000001U ///< Wait for all flags.\n#define osFlagsNoClear 0x00000002U ///< Do not clear flags which have been specified to wait for.\n \n// Flags errors (returned by osThreadFlagsXxxx and osEventFlagsXxxx).\n#define osFlagsError 0x80000000U ///< Error indicator.\n#define osFlagsErrorUnknown 0xFFFFFFFFU ///< osError (-1).\n#define osFlagsErrorTimeout 0xFFFFFFFEU ///< osErrorTimeout (-2).\n#define osFlagsErrorResource 0xFFFFFFFDU ///< osErrorResource (-3).\n#define osFlagsErrorParameter 0xFFFFFFFCU ///< osErrorParameter (-4).\n#define osFlagsErrorISR 0xFFFFFFFAU ///< osErrorISR (-6).\n \n// Thread attributes (attr_bits in \\ref osThreadAttr_t).\n#define osThreadDetached 0x00000000U ///< Thread created in detached mode (default)\n#define osThreadJoinable 0x00000001U ///< Thread created in joinable mode\n \n// Mutex attributes (attr_bits in \\ref osMutexAttr_t).\n#define osMutexRecursive 0x00000001U ///< Recursive mutex.\n#define osMutexPrioInherit 0x00000002U ///< Priority inherit protocol.\n#define osMutexRobust 0x00000008U ///< Robust mutex.\n \n/// Status code values returned by CMSIS-RTOS functions.\ntypedef enum {\n osOK = 0, ///< Operation completed successfully.\n osError = -1, ///< Unspecified RTOS error: run-time error but no other error message fits.\n osErrorTimeout = -2, ///< Operation not completed within the timeout period.\n osErrorResource = -3, ///< Resource not available.\n osErrorParameter = -4, ///< Parameter error.\n osErrorNoMemory = -5, ///< System is out of memory: it was impossible to allocate or reserve memory for the operation.\n osErrorISR = -6, ///< Not allowed in ISR context: the function cannot be called from interrupt service routines.\n osStatusReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization.\n} osStatus_t;\n \n \n/// \\details Thread ID identifies the thread.\ntypedef void *osThreadId_t;\n \n/// \\details Timer ID identifies the timer.\ntypedef void *osTimerId_t;\n \n/// \\details Event Flags ID identifies the event flags.\ntypedef void *osEventFlagsId_t;\n \n/// \\details Mutex ID identifies the mutex.\ntypedef void *osMutexId_t;\n \n/// \\details Semaphore ID identifies the semaphore.\ntypedef void *osSemaphoreId_t;\n \n/// \\details Memory Pool ID identifies the memory pool.\ntypedef void *osMemoryPoolId_t;\n \n/// \\details Message Queue ID identifies the message queue.\ntypedef void *osMessageQueueId_t;\n \n \n#ifndef TZ_MODULEID_T\n#define TZ_MODULEID_T\n/// \\details Data type that identifies secure software modules called by a process.\ntypedef uint32_t TZ_ModuleId_t;\n#endif\n \n \n/// Attributes structure for thread.\ntypedef struct {\n const char *name; ///< name of the thread\n uint32_t attr_bits; ///< attribute bits\n void *cb_mem; ///< memory for control block\n uint32_t cb_size; ///< size of provided memory for control block\n void *stack_mem; ///< memory for stack\n uint32_t stack_size; ///< size of stack\n osPriority_t priority; ///< initial thread priority (default: osPriorityNormal)\n TZ_ModuleId_t tz_module; ///< TrustZone module identifier\n uint32_t reserved; ///< reserved (must be 0)\n} osThreadAttr_t;\n \n/// Attributes structure for timer.\ntypedef struct {\n const char *name; ///< name of the timer\n uint32_t attr_bits; ///< attribute bits\n void *cb_mem; ///< memory for control block\n uint32_t cb_size; ///< size of provided memory for control block\n} osTimerAttr_t;\n \n/// Attributes structure for event flags.\ntypedef struct {\n const char *name; ///< name of the event flags\n uint32_t attr_bits; ///< attribute bits\n void *cb_mem; ///< memory for control block\n uint32_t cb_size; ///< size of provided memory for control block\n} osEventFlagsAttr_t;\n \n/// Attributes structure for mutex.\ntypedef struct {\n const char *name; ///< name of the mutex\n uint32_t attr_bits; ///< attribute bits\n void *cb_mem; ///< memory for control block\n uint32_t cb_size; ///< size of provided memory for control block\n void *mutex; ///< pointer to internal data\n} osMutexAttr_t;\n \n/// Attributes structure for semaphore.\ntypedef struct {\n const char *name; ///< name of the semaphore\n uint32_t attr_bits; ///< attribute bits\n void *cb_mem; ///< memory for control block\n uint32_t cb_size; ///< size of provided memory for control block\n void *semaphore; ///< pointer to internal data\n} osSemaphoreAttr_t;\n \n/// Attributes structure for memory pool.\ntypedef struct {\n const char *name; ///< name of the memory pool\n uint32_t attr_bits; ///< attribute bits\n void *cb_mem; ///< memory for control block\n uint32_t cb_size; ///< size of provided memory for control block\n void *mp_mem; ///< memory for data storage\n uint32_t mp_size; ///< size of provided memory for data storage \n} osMemoryPoolAttr_t;\n \n/// Attributes structure for message queue.\ntypedef struct {\n const char *name; ///< name of the message queue\n uint32_t attr_bits; ///< attribute bits\n void *cb_mem; ///< memory for control block\n uint32_t cb_size; ///< size of provided memory for control block\n void *mq_mem; ///< memory for data storage\n uint32_t mq_size; ///< size of provided memory for data storage \n} osMessageQueueAttr_t;\n \n \n// ==== Kernel Management Functions ====\n \n/// Initialize the RTOS Kernel.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osKernelInitialize (void);\n \n/// Get RTOS Kernel Information.\n/// \\param[out] version pointer to buffer for retrieving version information.\n/// \\param[out] id_buf pointer to buffer for retrieving kernel identification string.\n/// \\param[in] id_size size of buffer for kernel identification string.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osKernelGetInfo (osVersion_t *version, char *id_buf, uint32_t id_size);\n \n/// Get the current RTOS Kernel state.\n/// \\return current RTOS Kernel state.\nosKernelState_t osKernelGetState (void);\n \n/// Start the RTOS Kernel scheduler.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osKernelStart (void);\n \n/// Lock the RTOS Kernel scheduler.\n/// \\return previous lock state (1 - locked, 0 - not locked, error code if negative).\nint32_t osKernelLock (void);\n \n/// Unlock the RTOS Kernel scheduler.\n/// \\return previous lock state (1 - locked, 0 - not locked, error code if negative).\nint32_t osKernelUnlock (void);\n \n/// Restore the RTOS Kernel scheduler lock state.\n/// \\param[in] lock lock state obtained by \\ref osKernelLock or \\ref osKernelUnlock.\n/// \\return new lock state (1 - locked, 0 - not locked, error code if negative).\nint32_t osKernelRestoreLock (int32_t lock);\n \n/// Suspend the RTOS Kernel scheduler.\n/// \\return time in ticks, for how long the system can sleep or power-down.\nuint32_t osKernelSuspend (void);\n \n/// Resume the RTOS Kernel scheduler.\n/// \\param[in] sleep_ticks time in ticks for how long the system was in sleep or power-down mode.\nvoid osKernelResume (uint32_t sleep_ticks);\n \n/// Get the RTOS kernel tick count.\n/// \\return RTOS kernel current tick count.\nuint32_t osKernelGetTickCount (void);\n \n/// Get the RTOS kernel tick frequency.\n/// \\return frequency of the kernel tick in hertz, i.e. kernel ticks per second.\nuint32_t osKernelGetTickFreq (void);\n \n/// Get the RTOS kernel system timer count.\n/// \\return RTOS kernel current system timer count as 32-bit value.\nuint32_t osKernelGetSysTimerCount (void);\n \n/// Get the RTOS kernel system timer frequency.\n/// \\return frequency of the system timer in hertz, i.e. timer ticks per second.\nuint32_t osKernelGetSysTimerFreq (void);\n \n \n// ==== Thread Management Functions ====\n \n/// Create a thread and add it to Active Threads.\n/// \\param[in] func thread function.\n/// \\param[in] argument pointer that is passed to the thread function as start argument.\n/// \\param[in] attr thread attributes; NULL: default values.\n/// \\return thread ID for reference by other functions or NULL in case of error.\nosThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr);\n \n/// Get name of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return name as null-terminated string.\nconst char *osThreadGetName (osThreadId_t thread_id);\n \n/// Return the thread ID of the current running thread.\n/// \\return thread ID for reference by other functions or NULL in case of error.\nosThreadId_t osThreadGetId (void);\n \n/// Get current thread state of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return current thread state of the specified thread.\nosThreadState_t osThreadGetState (osThreadId_t thread_id);\n \n/// Get stack size of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return stack size in bytes.\nuint32_t osThreadGetStackSize (osThreadId_t thread_id);\n \n/// Get available stack space of a thread based on stack watermark recording during execution.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return remaining stack space in bytes.\nuint32_t osThreadGetStackSpace (osThreadId_t thread_id);\n \n/// Change priority of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\param[in] priority new priority value for the thread function.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadSetPriority (osThreadId_t thread_id, osPriority_t priority);\n \n/// Get current priority of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return current priority value of the specified thread.\nosPriority_t osThreadGetPriority (osThreadId_t thread_id);\n \n/// Pass control to next thread that is in state \\b READY.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadYield (void);\n \n/// Suspend execution of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadSuspend (osThreadId_t thread_id);\n \n/// Resume execution of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadResume (osThreadId_t thread_id);\n \n/// Detach a thread (thread storage can be reclaimed when thread terminates).\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadDetach (osThreadId_t thread_id);\n \n/// Wait for specified thread to terminate.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadJoin (osThreadId_t thread_id);\n \n/// Terminate execution of current running thread.\n__NO_RETURN void osThreadExit (void);\n \n/// Terminate execution of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadTerminate (osThreadId_t thread_id);\n \n/// Get number of active threads.\n/// \\return number of active threads.\nuint32_t osThreadGetCount (void);\n \n/// Enumerate active threads.\n/// \\param[out] thread_array pointer to array for retrieving thread IDs.\n/// \\param[in] array_items maximum number of items in array for retrieving thread IDs.\n/// \\return number of enumerated threads.\nuint32_t osThreadEnumerate (osThreadId_t *thread_array, uint32_t array_items);\n \n \n// ==== Thread Flags Functions ====\n \n/// Set the specified Thread Flags of a thread.\n/// \\param[in] thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\param[in] flags specifies the flags of the thread that shall be set.\n/// \\return thread flags after setting or error code if highest bit set.\nuint32_t osThreadFlagsSet (osThreadId_t thread_id, uint32_t flags);\n \n/// Clear the specified Thread Flags of current running thread.\n/// \\param[in] flags specifies the flags of the thread that shall be cleared.\n/// \\return thread flags before clearing or error code if highest bit set.\nuint32_t osThreadFlagsClear (uint32_t flags);\n \n/// Get the current Thread Flags of current running thread.\n/// \\return current thread flags.\nuint32_t osThreadFlagsGet (void);\n \n/// Wait for one or more Thread Flags of the current running thread to become signaled.\n/// \\param[in] flags specifies the flags to wait for.\n/// \\param[in] options specifies flags options (osFlagsXxxx).\n/// \\param[in] timeout \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return thread flags before clearing or error code if highest bit set.\nuint32_t osThreadFlagsWait (uint32_t flags, uint32_t options, uint32_t timeout);\n \n \n// ==== Generic Wait Functions ====\n \n/// Wait for Timeout (Time Delay).\n/// \\param[in] ticks \\ref CMSIS_RTOS_TimeOutValue \"time ticks\" value\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osDelay (uint32_t ticks);\n \n/// Wait until specified time.\n/// \\param[in] ticks absolute time in ticks\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osDelayUntil (uint32_t ticks);\n \n \n// ==== Timer Management Functions ====\n \n/// Create and Initialize a timer.\n/// \\param[in] func function pointer to callback function.\n/// \\param[in] type \\ref osTimerOnce for one-shot or \\ref osTimerPeriodic for periodic behavior.\n/// \\param[in] argument argument to the timer callback function.\n/// \\param[in] attr timer attributes; NULL: default values.\n/// \\return timer ID for reference by other functions or NULL in case of error.\nosTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr);\n \n/// Get name of a timer.\n/// \\param[in] timer_id timer ID obtained by \\ref osTimerNew.\n/// \\return name as null-terminated string.\nconst char *osTimerGetName (osTimerId_t timer_id);\n \n/// Start or restart a timer.\n/// \\param[in] timer_id timer ID obtained by \\ref osTimerNew.\n/// \\param[in] ticks \\ref CMSIS_RTOS_TimeOutValue \"time ticks\" value of the timer.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osTimerStart (osTimerId_t timer_id, uint32_t ticks);\n \n/// Stop a timer.\n/// \\param[in] timer_id timer ID obtained by \\ref osTimerNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osTimerStop (osTimerId_t timer_id);\n \n/// Check if a timer is running.\n/// \\param[in] timer_id timer ID obtained by \\ref osTimerNew.\n/// \\return 0 not running, 1 running.\nuint32_t osTimerIsRunning (osTimerId_t timer_id);\n \n/// Delete a timer.\n/// \\param[in] timer_id timer ID obtained by \\ref osTimerNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osTimerDelete (osTimerId_t timer_id);\n \n \n// ==== Event Flags Management Functions ====\n \n/// Create and Initialize an Event Flags object.\n/// \\param[in] attr event flags attributes; NULL: default values.\n/// \\return event flags ID for reference by other functions or NULL in case of error.\nosEventFlagsId_t osEventFlagsNew (const osEventFlagsAttr_t *attr);\n \n/// Get name of an Event Flags object.\n/// \\param[in] ef_id event flags ID obtained by \\ref osEventFlagsNew.\n/// \\return name as null-terminated string.\nconst char *osEventFlagsGetName (osEventFlagsId_t ef_id);\n \n/// Set the specified Event Flags.\n/// \\param[in] ef_id event flags ID obtained by \\ref osEventFlagsNew.\n/// \\param[in] flags specifies the flags that shall be set.\n/// \\return event flags after setting or error code if highest bit set.\nuint32_t osEventFlagsSet (osEventFlagsId_t ef_id, uint32_t flags);\n \n/// Clear the specified Event Flags.\n/// \\param[in] ef_id event flags ID obtained by \\ref osEventFlagsNew.\n/// \\param[in] flags specifies the flags that shall be cleared.\n/// \\return event flags before clearing or error code if highest bit set.\nuint32_t osEventFlagsClear (osEventFlagsId_t ef_id, uint32_t flags);\n \n/// Get the current Event Flags.\n/// \\param[in] ef_id event flags ID obtained by \\ref osEventFlagsNew.\n/// \\return current event flags.\nuint32_t osEventFlagsGet (osEventFlagsId_t ef_id);\n \n/// Wait for one or more Event Flags to become signaled.\n/// \\param[in] ef_id event flags ID obtained by \\ref osEventFlagsNew.\n/// \\param[in] flags specifies the flags to wait for.\n/// \\param[in] options specifies flags options (osFlagsXxxx).\n/// \\param[in] timeout \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return event flags before clearing or error code if highest bit set.\nuint32_t osEventFlagsWait (osEventFlagsId_t ef_id, uint32_t flags, uint32_t options, uint32_t timeout);\n \n/// Delete an Event Flags object.\n/// \\param[in] ef_id event flags ID obtained by \\ref osEventFlagsNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osEventFlagsDelete (osEventFlagsId_t ef_id);\n \n \n// ==== Mutex Management Functions ====\n \n/// Create and Initialize a Mutex object.\n/// \\param[in] attr mutex attributes; NULL: default values.\n/// \\return mutex ID for reference by other functions or NULL in case of error.\nosMutexId_t osMutexNew (const osMutexAttr_t *attr);\n \n/// Get name of a Mutex object.\n/// \\param[in] mutex_id mutex ID obtained by \\ref osMutexNew.\n/// \\return name as null-terminated string.\nconst char *osMutexGetName (osMutexId_t mutex_id);\n \n/// Acquire a Mutex or timeout if it is locked.\n/// \\param[in] mutex_id mutex ID obtained by \\ref osMutexNew.\n/// \\param[in] timeout \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout);\n \n/// Release a Mutex that was acquired by \\ref osMutexAcquire.\n/// \\param[in] mutex_id mutex ID obtained by \\ref osMutexNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMutexRelease (osMutexId_t mutex_id);\n \n/// Get Thread which owns a Mutex object.\n/// \\param[in] mutex_id mutex ID obtained by \\ref osMutexNew.\n/// \\return thread ID of owner thread or NULL when mutex was not acquired.\nosThreadId_t osMutexGetOwner (osMutexId_t mutex_id);\n \n/// Delete a Mutex object.\n/// \\param[in] mutex_id mutex ID obtained by \\ref osMutexNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMutexDelete (osMutexId_t mutex_id);\n \n \n// ==== Semaphore Management Functions ====\n \n/// Create and Initialize a Semaphore object.\n/// \\param[in] max_count maximum number of available tokens.\n/// \\param[in] initial_count initial number of available tokens.\n/// \\param[in] attr semaphore attributes; NULL: default values.\n/// \\return semaphore ID for reference by other functions or NULL in case of error.\nosSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr);\n \n/// Get name of a Semaphore object.\n/// \\param[in] semaphore_id semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\return name as null-terminated string.\nconst char *osSemaphoreGetName (osSemaphoreId_t semaphore_id);\n \n/// Acquire a Semaphore token or timeout if no tokens are available.\n/// \\param[in] semaphore_id semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\param[in] timeout \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout);\n \n/// Release a Semaphore token up to the initial maximum count.\n/// \\param[in] semaphore_id semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id);\n \n/// Get current Semaphore token count.\n/// \\param[in] semaphore_id semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\return number of tokens available.\nuint32_t osSemaphoreGetCount (osSemaphoreId_t semaphore_id);\n \n/// Delete a Semaphore object.\n/// \\param[in] semaphore_id semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id);\n \n \n// ==== Memory Pool Management Functions ====\n \n/// Create and Initialize a Memory Pool object.\n/// \\param[in] block_count maximum number of memory blocks in memory pool.\n/// \\param[in] block_size memory block size in bytes.\n/// \\param[in] attr memory pool attributes; NULL: default values.\n/// \\return memory pool ID for reference by other functions or NULL in case of error.\nosMemoryPoolId_t osMemoryPoolNew (uint32_t block_count, uint32_t block_size, const osMemoryPoolAttr_t *attr);\n \n/// Get name of a Memory Pool object.\n/// \\param[in] mp_id memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return name as null-terminated string.\nconst char *osMemoryPoolGetName (osMemoryPoolId_t mp_id);\n \n/// Allocate a memory block from a Memory Pool.\n/// \\param[in] mp_id memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\param[in] timeout \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return address of the allocated memory block or NULL in case of no memory is available.\nvoid *osMemoryPoolAlloc (osMemoryPoolId_t mp_id, uint32_t timeout);\n \n/// Return an allocated memory block back to a Memory Pool.\n/// \\param[in] mp_id memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\param[in] block address of the allocated memory block to be returned to the memory pool.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMemoryPoolFree (osMemoryPoolId_t mp_id, void *block);\n \n/// Get maximum number of memory blocks in a Memory Pool.\n/// \\param[in] mp_id memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return maximum number of memory blocks.\nuint32_t osMemoryPoolGetCapacity (osMemoryPoolId_t mp_id);\n \n/// Get memory block size in a Memory Pool.\n/// \\param[in] mp_id memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return memory block size in bytes.\nuint32_t osMemoryPoolGetBlockSize (osMemoryPoolId_t mp_id);\n \n/// Get number of memory blocks used in a Memory Pool.\n/// \\param[in] mp_id memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return number of memory blocks used.\nuint32_t osMemoryPoolGetCount (osMemoryPoolId_t mp_id);\n \n/// Get number of memory blocks available in a Memory Pool.\n/// \\param[in] mp_id memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return number of memory blocks available.\nuint32_t osMemoryPoolGetSpace (osMemoryPoolId_t mp_id);\n \n/// Delete a Memory Pool object.\n/// \\param[in] mp_id memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMemoryPoolDelete (osMemoryPoolId_t mp_id);\n \n \n// ==== Message Queue Management Functions ====\n \n/// Create and Initialize a Message Queue object.\n/// \\param[in] msg_count maximum number of messages in queue.\n/// \\param[in] msg_size maximum message size in bytes.\n/// \\param[in] attr message queue attributes; NULL: default values.\n/// \\return message queue ID for reference by other functions or NULL in case of error.\nosMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr);\n \n/// Get name of a Message Queue object.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return name as null-terminated string.\nconst char *osMessageQueueGetName (osMessageQueueId_t mq_id);\n \n/// Put a Message into a Queue or timeout if Queue is full.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\param[in] msg_ptr pointer to buffer with message to put into a queue.\n/// \\param[in] msg_prio message priority.\n/// \\param[in] timeout \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout);\n \n/// Get a Message from a Queue or timeout if Queue is empty.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\param[out] msg_ptr pointer to buffer for message to get from a queue.\n/// \\param[out] msg_prio pointer to buffer for message priority or NULL.\n/// \\param[in] timeout \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout);\n \n/// Get maximum number of messages in a Message Queue.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return maximum number of messages.\nuint32_t osMessageQueueGetCapacity (osMessageQueueId_t mq_id);\n \n/// Get maximum message size in a Memory Pool.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return maximum message size in bytes.\nuint32_t osMessageQueueGetMsgSize (osMessageQueueId_t mq_id);\n \n/// Get number of queued messages in a Message Queue.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return number of queued messages.\nuint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id);\n \n/// Get number of available slots for messages in a Message Queue.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return number of available slots for messages.\nuint32_t osMessageQueueGetSpace (osMessageQueueId_t mq_id);\n \n/// Reset a Message Queue to initial empty state.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMessageQueueReset (osMessageQueueId_t mq_id);\n \n/// Delete a Message Queue object.\n/// \\param[in] mq_id message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id);\n \n \n#ifdef __cplusplus\n}\n#endif\n \n#endif // CMSIS_OS2_H_\n" }, { "path": "include/rtos/freertos/croutine.h", "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n#ifndef CO_ROUTINE_H\n#define CO_ROUTINE_H\n\n#ifndef INC_FREERTOS_H\n\t#error \"include FreeRTOS.h must appear in source files before include croutine.h\"\n#endif\n\n#include \"freertos_list.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/* Used to hide the implementation of the co-routine control block. The\ncontrol block structure however has to be included in the header due to\nthe macro implementation of the co-routine functionality. */\ntypedef void * CoRoutineHandle_t;\n\n/* Defines the prototype to which co-routine functions must conform. */\ntypedef void (*crCOROUTINE_CODE)( CoRoutineHandle_t, UBaseType_t );\n\ntypedef struct corCoRoutineControlBlock\n{\n\tcrCOROUTINE_CODE \tpxCoRoutineFunction;\n\tListItem_t\t\t\txGenericListItem;\t/*< List item used to place the CRCB in ready and blocked queues. */\n\tListItem_t\t\t\txEventListItem;\t\t/*< List item used to place the CRCB in event lists. */\n\tUBaseType_t \t\tuxPriority;\t\t\t/*< The priority of the co-routine in relation to other co-routines. */\n\tUBaseType_t \t\tuxIndex;\t\t\t/*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */\n\tuint16_t \t\t\tuxState;\t\t\t/*< Used internally by the co-routine implementation. */\n} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */\n\n/**\n * croutine. h\n *
\n BaseType_t xCoRoutineCreate(\n                                 crCOROUTINE_CODE pxCoRoutineCode,\n                                 UBaseType_t uxPriority,\n                                 UBaseType_t uxIndex\n                               );
\n *\n * Create a new co-routine and add it to the list of co-routines that are\n * ready to run.\n *\n * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine\n * functions require special syntax - see the co-routine section of the WEB\n * documentation for more information.\n *\n * @param uxPriority The priority with respect to other co-routines at which\n * the co-routine will run.\n *\n * @param uxIndex Used to distinguish between different co-routines that\n * execute the same function. See the example below and the co-routine section\n * of the WEB documentation for further information.\n *\n * @return pdPASS if the co-routine was successfully created and added to a ready\n * list, otherwise an error code defined with ProjDefs.h.\n *\n * Example usage:\n 
\n // Co-routine to be created.\n void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\n {\n // Variables in co-routines must be declared static if they must maintain value across a blocking call.\n // This may not be necessary for const variables.\n static const char cLedToFlash[ 2 ] = { 5, 6 };\n static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };\n\n     // Must start every co-routine with a call to crSTART();\n     crSTART( xHandle );\n\n     for( ;; )\n     {\n         // This co-routine just delays for a fixed period, then toggles\n         // an LED.  Two co-routines are created using this function, so\n         // the uxIndex parameter is used to tell the co-routine which\n         // LED to flash and how int32_t to delay.  This assumes xQueue has\n         // already been created.\n         vParTestToggleLED( cLedToFlash[ uxIndex ] );\n         crDELAY( xHandle, uxFlashRates[ uxIndex ] );\n     }\n\n     // Must end every co-routine with a call to crEND();\n     crEND();\n }\n\n // Function that creates two co-routines.\n void vOtherFunction( void )\n {\n uint8_t ucParameterToPass;\n TaskHandle_t xHandle;\n\n     // Create two co-routines at priority 0.  The first is given index 0\n     // so (from the code above) toggles LED 5 every 200 ticks.  The second\n     // is given index 1 so toggles LED 6 every 400 ticks.\n     for( uxIndex = 0; uxIndex < 2; uxIndex++ )\n     {\n         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );\n     }\n }\n
\n * \\defgroup xCoRoutineCreate xCoRoutineCreate\n * \\ingroup Tasks\n */\nBaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex );\n\n\n/**\n * croutine. h\n *
\n void vCoRoutineSchedule( void );
\n *\n * Run a co-routine.\n *\n * vCoRoutineSchedule() executes the highest priority co-routine that is able\n * to run. The co-routine will execute until it either blocks, yields or is\n * preempted by a task. Co-routines execute cooperatively so one\n * co-routine cannot be preempted by another, but can be preempted by a task.\n *\n * If an application comprises of both tasks and co-routines then\n * vCoRoutineSchedule should be called from the idle task (in an idle task\n * hook).\n *\n * Example usage:\n 
\n // This idle task hook will schedule a co-routine each time it is called.\n // The rest of the idle task will execute between co-routine calls.\n void vApplicationIdleHook( void )\n {\n\tvCoRoutineSchedule();\n }\n\n // Alternatively, if you do not require any other part of the idle task to\n // execute, the idle task hook can call vCoRoutineScheduler() within an\n // infinite loop.\n void vApplicationIdleHook( void )\n {\n    for( ;; )\n    {\n        vCoRoutineSchedule();\n    }\n }\n
\n * \\defgroup vCoRoutineSchedule vCoRoutineSchedule\n * \\ingroup Tasks\n */\nvoid vCoRoutineSchedule( void );\n\n/**\n * croutine. h\n * 
\n crSTART( CoRoutineHandle_t xHandle );
\n *\n * This macro MUST always be called at the start of a co-routine function.\n *\n * Example usage:\n 
\n // Co-routine to be created.\n void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\n {\n // Variables in co-routines must be declared static if they must maintain value across a blocking call.\n static int32_t ulAVariable;\n\n     // Must start every co-routine with a call to crSTART();\n     crSTART( xHandle );\n\n     for( ;; )\n     {\n          // Co-routine functionality goes here.\n     }\n\n     // Must end every co-routine with a call to crEND();\n     crEND();\n }
\n * \\defgroup crSTART crSTART\n * \\ingroup Tasks\n */\n#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0:\n\n/**\n * croutine. h\n * 
\n crEND();
\n *\n * This macro MUST always be called at the end of a co-routine function.\n *\n * Example usage:\n 
\n // Co-routine to be created.\n void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\n {\n // Variables in co-routines must be declared static if they must maintain value across a blocking call.\n static int32_t ulAVariable;\n\n     // Must start every co-routine with a call to crSTART();\n     crSTART( xHandle );\n\n     for( ;; )\n     {\n          // Co-routine functionality goes here.\n     }\n\n     // Must end every co-routine with a call to crEND();\n     crEND();\n }
\n * \\defgroup crSTART crSTART\n * \\ingroup Tasks\n */\n#define crEND() }\n\n/*\n * These macros are intended for internal use by the co-routine implementation\n * only. The macros should not be used directly by application writers.\n */\n#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2):\n#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1):\n\n/**\n * croutine. h\n *
\n crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
\n *\n * Delay a co-routine for a fixed period of time.\n *\n * crDELAY can only be called from the co-routine function itself - not\n * from within a function called by the co-routine function. This is because\n * co-routines do not maintain their own stack.\n *\n * @param xHandle The handle of the co-routine to delay. This is the xHandle\n * parameter of the co-routine function.\n *\n * @param xTickToDelay The number of ticks that the co-routine should delay\n * for. The actual amount of time this equates to is defined by\n * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_PERIOD_MS\n * can be used to convert ticks to milliseconds.\n *\n * Example usage:\n 
\n // Co-routine to be created.\n void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\n {\n // Variables in co-routines must be declared static if they must maintain value across a blocking call.\n // This may not be necessary for const variables.\n // We are to delay for 200ms.\n static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;\n\n     // Must start every co-routine with a call to crSTART();\n     crSTART( xHandle );\n\n     for( ;; )\n     {\n        // Delay for 200ms.\n        crDELAY( xHandle, xDelayTime );\n\n        // Do something here.\n     }\n\n     // Must end every co-routine with a call to crEND();\n     crEND();\n }
\n * \\defgroup crDELAY crDELAY\n * \\ingroup Tasks\n */\n#define crDELAY( xHandle, xTicksToDelay )\t\t\t\t\t\t\t\t\t\t\t\t\\\n\tif( ( xTicksToDelay ) > 0 )\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tvCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL );\t\t\t\t\t\t\t\\\n\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\tcrSET_STATE0( ( xHandle ) );\n\n/**\n * 
\n crQUEUE_SEND(\n                  CoRoutineHandle_t xHandle,\n                  QueueHandle_t pxQueue,\n                  void *pvItemToQueue,\n                  TickType_t xTicksToWait,\n                  BaseType_t *pxResult\n             )
\n *\n * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine\n * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.\n *\n * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas\n * xQueueSend() and xQueueReceive() can only be used from tasks.\n *\n * crQUEUE_SEND can only be called from the co-routine function itself - not\n * from within a function called by the co-routine function. This is because\n * co-routines do not maintain their own stack.\n *\n * See the co-routine section of the WEB documentation for information on\n * passing data between tasks and co-routines and between ISR's and\n * co-routines.\n *\n * @param xHandle The handle of the calling co-routine. This is the xHandle\n * parameter of the co-routine function.\n *\n * @param pxQueue The handle of the queue on which the data will be posted.\n * The handle is obtained as the return value when the queue is created using\n * the xQueueCreate() API function.\n *\n * @param pvItemToQueue A pointer to the data being posted onto the queue.\n * The number of bytes of each queued item is specified when the queue is\n * created. This number of bytes is copied from pvItemToQueue into the queue\n * itself.\n *\n * @param xTickToDelay The number of ticks that the co-routine should block\n * to wait for space to become available on the queue, should space not be\n * available immediately. The actual amount of time this equates to is defined\n * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant\n * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example\n * below).\n *\n * @param pxResult The variable pointed to by pxResult will be set to pdPASS if\n * data was successfully posted onto the queue, otherwise it will be set to an\n * error defined within ProjDefs.h.\n *\n * Example usage:\n 
\n // Co-routine function that blocks for a fixed period then posts a number onto\n // a queue.\n static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\n {\n // Variables in co-routines must be declared static if they must maintain value across a blocking call.\n static BaseType_t xNumberToPost = 0;\n static BaseType_t xResult;\n\n    // Co-routines must begin with a call to crSTART().\n    crSTART( xHandle );\n\n    for( ;; )\n    {\n        // This assumes the queue has already been created.\n        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );\n\n        if( xResult != pdPASS )\n        {\n            // The message was not posted!\n        }\n\n        // Increment the number to be posted onto the queue.\n        xNumberToPost++;\n\n        // Delay for 100 ticks.\n        crDELAY( xHandle, 100 );\n    }\n\n    // Co-routines must end with a call to crEND().\n    crEND();\n }
\n * \\defgroup crQUEUE_SEND crQUEUE_SEND\n * \\ingroup Tasks\n */\n#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult )\t\t\t\\\n{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t*( pxResult ) = xQueueCRSend( ( pxQueue) , ( pvItemToQueue) , ( xTicksToWait ) );\t\\\n\tif( *( pxResult ) == errQUEUE_BLOCKED )\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tcrSET_STATE0( ( xHandle ) );\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t*pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 );\t\t\t\t\t\\\n\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\tif( *pxResult == errQUEUE_YIELD )\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tcrSET_STATE1( ( xHandle ) );\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t*pxResult = pdPASS;\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n}\n\n/**\n * croutine. h\n * 
\n  crQUEUE_RECEIVE(\n                     CoRoutineHandle_t xHandle,\n                     QueueHandle_t pxQueue,\n                     void *pvBuffer,\n                     TickType_t xTicksToWait,\n                     BaseType_t *pxResult\n                 )
\n *\n * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine\n * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.\n *\n * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas\n * xQueueSend() and xQueueReceive() can only be used from tasks.\n *\n * crQUEUE_RECEIVE can only be called from the co-routine function itself - not\n * from within a function called by the co-routine function. This is because\n * co-routines do not maintain their own stack.\n *\n * See the co-routine section of the WEB documentation for information on\n * passing data between tasks and co-routines and between ISR's and\n * co-routines.\n *\n * @param xHandle The handle of the calling co-routine. This is the xHandle\n * parameter of the co-routine function.\n *\n * @param pxQueue The handle of the queue from which the data will be received.\n * The handle is obtained as the return value when the queue is created using\n * the xQueueCreate() API function.\n *\n * @param pvBuffer The buffer into which the received item is to be copied.\n * The number of bytes of each queued item is specified when the queue is\n * created. This number of bytes is copied into pvBuffer.\n *\n * @param xTickToDelay The number of ticks that the co-routine should block\n * to wait for data to become available from the queue, should data not be\n * available immediately. The actual amount of time this equates to is defined\n * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant\n * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the\n * crQUEUE_SEND example).\n *\n * @param pxResult The variable pointed to by pxResult will be set to pdPASS if\n * data was successfully retrieved from the queue, otherwise it will be set to\n * an error code as defined within ProjDefs.h.\n *\n * Example usage:\n 
\n // A co-routine receives the number of an LED to flash from a queue.  It\n // blocks on the queue until the number is received.\n static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\n {\n // Variables in co-routines must be declared static if they must maintain value across a blocking call.\n static BaseType_t xResult;\n static UBaseType_t uxLEDToFlash;\n\n    // All co-routines must start with a call to crSTART().\n    crSTART( xHandle );\n\n    for( ;; )\n    {\n        // Wait for data to become available on the queue.\n        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );\n\n        if( xResult == pdPASS )\n        {\n            // We received the LED to flash - flash it!\n            vParTestToggleLED( uxLEDToFlash );\n        }\n    }\n\n    crEND();\n }
\n * \\defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE\n * \\ingroup Tasks\n */\n#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult )\t\t\t\\\n{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t*( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), ( xTicksToWait ) );\t\t\\\n\tif( *( pxResult ) == errQUEUE_BLOCKED ) \t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tcrSET_STATE0( ( xHandle ) );\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t*( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), 0 );\t\t\t\t\\\n\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\tif( *( pxResult ) == errQUEUE_YIELD )\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tcrSET_STATE1( ( xHandle ) );\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t*( pxResult ) = pdPASS;\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n}\n\n/**\n * croutine. h\n * 
\n  crQUEUE_SEND_FROM_ISR(\n                            QueueHandle_t pxQueue,\n                            void *pvItemToQueue,\n                            BaseType_t xCoRoutinePreviouslyWoken\n                       )
\n *\n * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the\n * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()\n * functions used by tasks.\n *\n * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to\n * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and\n * xQueueReceiveFromISR() can only be used to pass data between a task and and\n * ISR.\n *\n * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue\n * that is being used from within a co-routine.\n *\n * See the co-routine section of the WEB documentation for information on\n * passing data between tasks and co-routines and between ISR's and\n * co-routines.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue. The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto\n * the same queue multiple times from a single interrupt. The first call\n * should always pass in pdFALSE. Subsequent calls should pass in\n * the value returned from the previous call.\n *\n * @return pdTRUE if a co-routine was woken by posting onto the queue. This is\n * used by the ISR to determine if a context switch may be required following\n * the ISR.\n *\n * Example usage:\n 
\n // A co-routine that blocks on a queue waiting for characters to be received.\n static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\n {\n char cRxedChar;\n BaseType_t xResult;\n\n     // All co-routines must start with a call to crSTART().\n     crSTART( xHandle );\n\n     for( ;; )\n     {\n         // Wait for data to become available on the queue.  This assumes the\n         // queue xCommsRxQueue has already been created!\n         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );\n\n         // Was a character received?\n         if( xResult == pdPASS )\n         {\n             // Process the character here.\n         }\n     }\n\n     // All co-routines must end with a call to crEND().\n     crEND();\n }\n\n // An ISR that uses a queue to send characters received on a serial port to\n // a co-routine.\n void vUART_ISR( void )\n {\n char cRxedChar;\n BaseType_t xCRWokenByPost = pdFALSE;\n\n     // We loop around reading characters until there are none left in the UART.\n     while( UART_RX_REG_NOT_EMPTY() )\n     {\n         // Obtain the character from the UART.\n         cRxedChar = UART_RX_REG;\n\n         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE\n         // the first time around the loop.  If the post causes a co-routine\n         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.\n         // In this manner we can ensure that if more than one co-routine is\n         // blocked on the queue only one is woken by this ISR no matter how\n         // many characters are posted to the queue.\n         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );\n     }\n }
\n * \\defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR\n * \\ingroup Tasks\n */\n#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )\n\n\n/**\n * croutine. h\n * 
\n  crQUEUE_SEND_FROM_ISR(\n                            QueueHandle_t pxQueue,\n                            void *pvBuffer,\n                            BaseType_t * pxCoRoutineWoken\n                       )
\n *\n * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the\n * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()\n * functions used by tasks.\n *\n * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to\n * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and\n * xQueueReceiveFromISR() can only be used to pass data between a task and and\n * ISR.\n *\n * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data\n * from a queue that is being used from within a co-routine (a co-routine\n * posted to the queue).\n *\n * See the co-routine section of the WEB documentation for information on\n * passing data between tasks and co-routines and between ISR's and\n * co-routines.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvBuffer A pointer to a buffer into which the received item will be\n * placed. The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from the queue into\n * pvBuffer.\n *\n * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become\n * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a\n * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise\n * *pxCoRoutineWoken will remain unchanged.\n *\n * @return pdTRUE an item was successfully received from the queue, otherwise\n * pdFALSE.\n *\n * Example usage:\n 
\n // A co-routine that posts a character to a queue then blocks for a fixed\n // period.  The character is incremented each time.\n static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )\n {\n // cChar holds its value while this co-routine is blocked and must therefore\n // be declared static.\n static char cCharToTx = 'a';\n BaseType_t xResult;\n\n     // All co-routines must start with a call to crSTART().\n     crSTART( xHandle );\n\n     for( ;; )\n     {\n         // Send the next character to the queue.\n         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );\n\n         if( xResult == pdPASS )\n         {\n             // The character was successfully posted to the queue.\n         }\n\t\t else\n\t\t {\n\t\t\t// Could not post the character to the queue.\n\t\t }\n\n         // Enable the UART Tx interrupt to cause an interrupt in this\n\t\t // hypothetical UART.  The interrupt will obtain the character\n\t\t // from the queue and send it.\n\t\t ENABLE_RX_INTERRUPT();\n\n\t\t // Increment to the next character then block for a fixed period.\n\t\t // cCharToTx will maintain its value across the delay as it is\n\t\t // declared static.\n\t\t cCharToTx++;\n\t\t if( cCharToTx > 'x' )\n\t\t {\n\t\t\tcCharToTx = 'a';\n\t\t }\n\t\t crDELAY( 100 );\n     }\n\n     // All co-routines must end with a call to crEND().\n     crEND();\n }\n\n // An ISR that uses a queue to receive characters to send on a UART.\n void vUART_ISR( void )\n {\n char cCharToTx;\n BaseType_t xCRWokenByPost = pdFALSE;\n\n     while( UART_TX_REG_EMPTY() )\n     {\n         // Are there any characters in the queue waiting to be sent?\n\t\t // xCRWokenByPost will automatically be set to pdTRUE if a co-routine\n\t\t // is woken by the post - ensuring that only a single co-routine is\n\t\t // woken no matter how many times we go around this loop.\n         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )\n\t\t {\n\t\t\t SEND_CHARACTER( cCharToTx );\n\t\t }\n     }\n }
\n * \\defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR\n * \\ingroup Tasks\n */\n#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )\n\n/*\n * This function is intended for internal use by the co-routine macros only.\n * The macro nature of the co-routine implementation requires that the\n * prototype appears here. The function should not be used by application\n * writers.\n *\n * Removes the current co-routine from its ready list and places it in the\n * appropriate delayed list.\n */\nvoid vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList );\n\n/*\n * This function is intended for internal use by the queue implementation only.\n * The function should not be used by application writers.\n *\n * Removes the highest priority co-routine from the event list and places it in\n * the pending ready list.\n */\nBaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList );\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* CO_ROUTINE_H */\n" }, { "path": "include/rtos/freertos/deprecated_definitions.h", "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n#ifndef DEPRECATED_DEFINITIONS_H\n#define DEPRECATED_DEFINITIONS_H\n\n\n/* Each FreeRTOS port has a unique portmacro.h header file. Originally a\npre-processor definition was used to ensure the pre-processor found the correct\nportmacro.h file for the port being used. That scheme was deprecated in favour\nof setting the compiler's include path such that it found the correct\nportmacro.h file - removing the need for the constant and allowing the\nportmacro.h file to be located anywhere in relation to the port being used. The\ndefinitions below remain in the code for backward compatibility only. New\nprojects should not use them. */\n\n#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT\n\t#include \"..\\..\\Source\\portable\\owatcom\\16bitdos\\pc\\portmacro.h\"\n\ttypedef void ( __interrupt __far *pxISR )();\n#endif\n\n#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT\n\t#include \"..\\..\\Source\\portable\\owatcom\\16bitdos\\flsh186\\portmacro.h\"\n\ttypedef void ( __interrupt __far *pxISR )();\n#endif\n\n#ifdef GCC_MEGA_AVR\n\t#include \"../portable/GCC/ATMega323/portmacro.h\"\n#endif\n\n#ifdef IAR_MEGA_AVR\n\t#include \"../portable/IAR/ATMega323/portmacro.h\"\n#endif\n\n#ifdef MPLAB_PIC24_PORT\n\t#include \"../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h\"\n#endif\n\n#ifdef MPLAB_DSPIC_PORT\n\t#include \"../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h\"\n#endif\n\n#ifdef MPLAB_PIC18F_PORT\n\t#include \"../../Source/portable/MPLAB/PIC18F/portmacro.h\"\n#endif\n\n#ifdef MPLAB_PIC32MX_PORT\n\t#include \"../../Source/portable/MPLAB/PIC32MX/portmacro.h\"\n#endif\n\n#ifdef _FEDPICC\n\t#include \"libFreeRTOS/Include/portmacro.h\"\n#endif\n\n#ifdef SDCC_CYGNAL\n\t#include \"../../Source/portable/SDCC/Cygnal/portmacro.h\"\n#endif\n\n#ifdef GCC_ARM7\n\t#include \"../../Source/portable/GCC/ARM7_LPC2000/portmacro.h\"\n#endif\n\n#ifdef GCC_ARM7_ECLIPSE\n\t#include \"portmacro.h\"\n#endif\n\n#ifdef ROWLEY_LPC23xx\n\t#include \"../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h\"\n#endif\n\n#ifdef IAR_MSP430\n\t#include \"..\\..\\Source\\portable\\IAR\\MSP430\\portmacro.h\"\n#endif\n\n#ifdef GCC_MSP430\n\t#include \"../../Source/portable/GCC/MSP430F449/portmacro.h\"\n#endif\n\n#ifdef ROWLEY_MSP430\n\t#include \"../../Source/portable/Rowley/MSP430F449/portmacro.h\"\n#endif\n\n#ifdef ARM7_LPC21xx_KEIL_RVDS\n\t#include \"..\\..\\Source\\portable\\RVDS\\ARM7_LPC21xx\\portmacro.h\"\n#endif\n\n#ifdef SAM7_GCC\n\t#include \"../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h\"\n#endif\n\n#ifdef SAM7_IAR\n\t#include \"..\\..\\Source\\portable\\IAR\\AtmelSAM7S64\\portmacro.h\"\n#endif\n\n#ifdef SAM9XE_IAR\n\t#include \"..\\..\\Source\\portable\\IAR\\AtmelSAM9XE\\portmacro.h\"\n#endif\n\n#ifdef LPC2000_IAR\n\t#include \"..\\..\\Source\\portable\\IAR\\LPC2000\\portmacro.h\"\n#endif\n\n#ifdef STR71X_IAR\n\t#include \"..\\..\\Source\\portable\\IAR\\STR71x\\portmacro.h\"\n#endif\n\n#ifdef STR75X_IAR\n\t#include \"..\\..\\Source\\portable\\IAR\\STR75x\\portmacro.h\"\n#endif\n\n#ifdef STR75X_GCC\n\t#include \"..\\..\\Source\\portable\\GCC\\STR75x\\portmacro.h\"\n#endif\n\n#ifdef STR91X_IAR\n\t#include \"..\\..\\Source\\portable\\IAR\\STR91x\\portmacro.h\"\n#endif\n\n#ifdef GCC_H8S\n\t#include \"../../Source/portable/GCC/H8S2329/portmacro.h\"\n#endif\n\n#ifdef GCC_AT91FR40008\n\t#include \"../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h\"\n#endif\n\n#ifdef RVDS_ARMCM3_LM3S102\n\t#include \"../../Source/portable/RVDS/ARM_CM3/portmacro.h\"\n#endif\n\n#ifdef GCC_ARMCM3_LM3S102\n\t#include \"../../Source/portable/GCC/ARM_CM3/portmacro.h\"\n#endif\n\n#ifdef GCC_ARMCM3\n\t#include \"../../Source/portable/GCC/ARM_CM3/portmacro.h\"\n#endif\n\n#ifdef IAR_ARM_CM3\n\t#include \"../../Source/portable/IAR/ARM_CM3/portmacro.h\"\n#endif\n\n#ifdef IAR_ARMCM3_LM\n\t#include \"../../Source/portable/IAR/ARM_CM3/portmacro.h\"\n#endif\n\n#ifdef HCS12_CODE_WARRIOR\n\t#include \"../../Source/portable/CodeWarrior/HCS12/portmacro.h\"\n#endif\n\n#ifdef MICROBLAZE_GCC\n\t#include \"../../Source/portable/GCC/MicroBlaze/portmacro.h\"\n#endif\n\n#ifdef TERN_EE\n\t#include \"..\\..\\Source\\portable\\Paradigm\\Tern_EE\\small\\portmacro.h\"\n#endif\n\n#ifdef GCC_HCS12\n\t#include \"../../Source/portable/GCC/HCS12/portmacro.h\"\n#endif\n\n#ifdef GCC_MCF5235\n #include \"../../Source/portable/GCC/MCF5235/portmacro.h\"\n#endif\n\n#ifdef COLDFIRE_V2_GCC\n\t#include \"../../../Source/portable/GCC/ColdFire_V2/portmacro.h\"\n#endif\n\n#ifdef COLDFIRE_V2_CODEWARRIOR\n\t#include \"../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h\"\n#endif\n\n#ifdef GCC_PPC405\n\t#include \"../../Source/portable/GCC/PPC405_Xilinx/portmacro.h\"\n#endif\n\n#ifdef GCC_PPC440\n\t#include \"../../Source/portable/GCC/PPC440_Xilinx/portmacro.h\"\n#endif\n\n#ifdef _16FX_SOFTUNE\n\t#include \"..\\..\\Source\\portable\\Softune\\MB96340\\portmacro.h\"\n#endif\n\n#ifdef BCC_INDUSTRIAL_PC_PORT\n\t/* A short file name has to be used in place of the normal\n\tFreeRTOSConfig.h when using the Borland compiler. */\n\t#include \"frconfig.h\"\n\t#include \"..\\portable\\BCC\\16BitDOS\\PC\\prtmacro.h\"\n typedef void ( __interrupt __far *pxISR )();\n#endif\n\n#ifdef BCC_FLASH_LITE_186_PORT\n\t/* A short file name has to be used in place of the normal\n\tFreeRTOSConfig.h when using the Borland compiler. */\n\t#include \"frconfig.h\"\n\t#include \"..\\portable\\BCC\\16BitDOS\\flsh186\\prtmacro.h\"\n typedef void ( __interrupt __far *pxISR )();\n#endif\n\n#ifdef __GNUC__\n #ifdef __AVR32_AVR32A__\n\t #include \"portmacro.h\"\n #endif\n#endif\n\n#ifdef __ICCAVR32__\n #ifdef __CORE__\n #if __CORE__ == __AVR32A__\n\t #include \"portmacro.h\"\n #endif\n #endif\n#endif\n\n#ifdef __91467D\n\t#include \"portmacro.h\"\n#endif\n\n#ifdef __96340\n\t#include \"portmacro.h\"\n#endif\n\n\n#ifdef __IAR_V850ES_Fx3__\n\t#include \"../../Source/portable/IAR/V850ES/portmacro.h\"\n#endif\n\n#ifdef __IAR_V850ES_Jx3__\n\t#include \"../../Source/portable/IAR/V850ES/portmacro.h\"\n#endif\n\n#ifdef __IAR_V850ES_Jx3_L__\n\t#include \"../../Source/portable/IAR/V850ES/portmacro.h\"\n#endif\n\n#ifdef __IAR_V850ES_Jx2__\n\t#include \"../../Source/portable/IAR/V850ES/portmacro.h\"\n#endif\n\n#ifdef __IAR_V850ES_Hx2__\n\t#include \"../../Source/portable/IAR/V850ES/portmacro.h\"\n#endif\n\n#ifdef __IAR_78K0R_Kx3__\n\t#include \"../../Source/portable/IAR/78K0R/portmacro.h\"\n#endif\n\n#ifdef __IAR_78K0R_Kx3L__\n\t#include \"../../Source/portable/IAR/78K0R/portmacro.h\"\n#endif\n\n#endif /* DEPRECATED_DEFINITIONS_H */\n\n" }, { "path": "include/rtos/freertos/event_groups.h", "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n#ifndef EVENT_GROUPS_H\n#define EVENT_GROUPS_H\n\n#ifndef INC_FREERTOS_H\n\t#error \"include FreeRTOS.h\" must appear in source files before \"include event_groups.h\"\n#endif\n\n/* FreeRTOS includes. */\n#include \"timers.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/**\n * An event group is a collection of bits to which an application can assign a\n * meaning. For example, an application may create an event group to convey\n * the status of various CAN bus related events in which bit 0 might mean \"A CAN\n * message has been received and is ready for processing\", bit 1 might mean \"The\n * application has queued a message that is ready for sending onto the CAN\n * network\", and bit 2 might mean \"It is time to send a SYNC message onto the\n * CAN network\" etc. A task can then test the bit values to see which events\n * are active, and optionally enter the Blocked state to wait for a specified\n * bit or a group of specified bits to be active. To continue the CAN bus\n * example, a CAN controlling task can enter the Blocked state (and therefore\n * not consume any processing time) until either bit 0, bit 1 or bit 2 are\n * active, at which time the bit that was actually active would inform the task\n * which action it had to take (process a received message, send a message, or\n * send a SYNC).\n *\n * The event groups implementation contains intelligence to avoid race\n * conditions that would otherwise occur were an application to use a simple\n * variable for the same purpose. This is particularly important with respect\n * to when a bit within an event group is to be cleared, and when bits have to\n * be set and then tested atomically - as is the case where event groups are\n * used to create a synchronisation point between multiple tasks (a\n * 'rendezvous').\n *\n * \\defgroup EventGroup\n */\n\n\n\n/**\n * event_groups.h\n *\n * Type by which event groups are referenced. For example, a call to\n * xEventGroupCreate() returns an EventGroupHandle_t variable that can then\n * be used as a parameter to other event group functions.\n *\n * \\defgroup EventGroupHandle_t EventGroupHandle_t\n * \\ingroup EventGroup\n */\nstruct EventGroupDef_t;\ntypedef struct EventGroupDef_t * EventGroupHandle_t;\n\n/*\n * The type that holds event bits always matches TickType_t - therefore the\n * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1,\n * 32 bits if set to 0.\n *\n * \\defgroup EventBits_t EventBits_t\n * \\ingroup EventGroup\n */\ntypedef TickType_t EventBits_t;\n\n/**\n * event_groups.h\n *
\n EventGroupHandle_t xEventGroupCreate( void );\n
\n *\n * Create a new event group.\n *\n * Internally, within the FreeRTOS implementation, event groups use a [small]\n * block of memory, in which the event group's structure is stored. If an event\n * groups is created using xEventGropuCreate() then the required memory is\n * automatically dynamically allocated inside the xEventGroupCreate() function.\n * (see http://www.freertos.org/a00111.html). If an event group is created\n * using xEventGropuCreateStatic() then the application writer must instead\n * provide the memory that will get used by the event group.\n * xEventGroupCreateStatic() therefore allows an event group to be created\n * without using any dynamic memory allocation.\n *\n * Although event groups are not related to ticks, for internal implementation\n * reasons the number of bits available for use in an event group is dependent\n * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If\n * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit\n * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has\n * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store\n * event bits within an event group.\n *\n * @return If the event group was created then a handle to the event group is\n * returned. If there was insufficient FreeRTOS heap available to create the\n * event group then NULL is returned. See http://www.freertos.org/a00111.html\n *\n * Example usage:\n 
\n\t// Declare a variable to hold the created event group.\n\tEventGroupHandle_t xCreatedEventGroup;\n\n\t// Attempt to create the event group.\n\txCreatedEventGroup = xEventGroupCreate();\n\n\t// Was the event group created successfully?\n\tif( xCreatedEventGroup == NULL )\n\t{\n\t\t// The event group was not created because there was insufficient\n\t\t// FreeRTOS heap available.\n\t}\n\telse\n\t{\n\t\t// The event group was created.\n\t}\n
\n * \\defgroup xEventGroupCreate xEventGroupCreate\n * \\ingroup EventGroup\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\tEventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION;\n#endif\n\n/**\n * event_groups.h\n *
\n EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );\n
\n *\n * Create a new event group.\n *\n * Internally, within the FreeRTOS implementation, event groups use a [small]\n * block of memory, in which the event group's structure is stored. If an event\n * groups is created using xEventGropuCreate() then the required memory is\n * automatically dynamically allocated inside the xEventGroupCreate() function.\n * (see http://www.freertos.org/a00111.html). If an event group is created\n * using xEventGropuCreateStatic() then the application writer must instead\n * provide the memory that will get used by the event group.\n * xEventGroupCreateStatic() therefore allows an event group to be created\n * without using any dynamic memory allocation.\n *\n * Although event groups are not related to ticks, for internal implementation\n * reasons the number of bits available for use in an event group is dependent\n * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If\n * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit\n * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has\n * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store\n * event bits within an event group.\n *\n * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type\n * StaticEventGroup_t, which will be then be used to hold the event group's data\n * structures, removing the need for the memory to be allocated dynamically.\n *\n * @return If the event group was created then a handle to the event group is\n * returned. If pxEventGroupBuffer was NULL then NULL is returned.\n *\n * Example usage:\n 
\n\t// StaticEventGroup_t is a publicly accessible structure that has the same\n\t// size and alignment requirements as the real event group structure.  It is\n\t// provided as a mechanism for applications to know the size of the event\n\t// group (which is dependent on the architecture and configuration file\n\t// settings) without breaking the strict data hiding policy by exposing the\n\t// real event group internals.  This StaticEventGroup_t variable is passed\n\t// into the xSemaphoreCreateEventGroupStatic() function and is used to store\n\t// the event group's data structures\n\tStaticEventGroup_t xEventGroupBuffer;\n\n\t// Create the event group without dynamically allocating any memory.\n\txEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );\n
\n */\n#if( configSUPPORT_STATIC_ALLOCATION == 1 )\n\tEventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) PRIVILEGED_FUNCTION;\n#endif\n\n/**\n * event_groups.h\n *
\n\tEventBits_t xEventGroupWaitBits( \tEventGroupHandle_t xEventGroup,\n\t\t\t\t\t\t\t\t\t\tconst EventBits_t uxBitsToWaitFor,\n\t\t\t\t\t\t\t\t\t\tconst BaseType_t xClearOnExit,\n\t\t\t\t\t\t\t\t\t\tconst BaseType_t xWaitForAllBits,\n\t\t\t\t\t\t\t\t\t\tconst TickType_t xTicksToWait );\n
\n *\n * [Potentially] block to wait for one or more bits to be set within a\n * previously created event group.\n *\n * This function cannot be called from an interrupt.\n *\n * @param xEventGroup The event group in which the bits are being tested. The\n * event group must have previously been created using a call to\n * xEventGroupCreate().\n *\n * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test\n * inside the event group. For example, to wait for bit 0 and/or bit 2 set\n * uxBitsToWaitFor to 0x05. To wait for bits 0 and/or bit 1 and/or bit 2 set\n * uxBitsToWaitFor to 0x07. Etc.\n *\n * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within\n * uxBitsToWaitFor that are set within the event group will be cleared before\n * xEventGroupWaitBits() returns if the wait condition was met (if the function\n * returns for a reason other than a timeout). If xClearOnExit is set to\n * pdFALSE then the bits set in the event group are not altered when the call to\n * xEventGroupWaitBits() returns.\n *\n * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then\n * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor\n * are set or the specified block time expires. If xWaitForAllBits is set to\n * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set\n * in uxBitsToWaitFor is set or the specified block time expires. The block\n * time is specified by the xTicksToWait parameter.\n *\n * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait\n * for one/all (depending on the xWaitForAllBits value) of the bits specified by\n * uxBitsToWaitFor to become set.\n *\n * @return The value of the event group at the time either the bits being waited\n * for became set, or the block time expired. Test the return value to know\n * which bits were set. If xEventGroupWaitBits() returned because its timeout\n * expired then not all the bits being waited for will be set. If\n * xEventGroupWaitBits() returned because the bits it was waiting for were set\n * then the returned value is the event group value before any bits were\n * automatically cleared in the case that xClearOnExit parameter was set to\n * pdTRUE.\n *\n * Example usage:\n 
\n   #define BIT_0\t( 1 << 0 )\n   #define BIT_4\t( 1 << 4 )\n\n   void aFunction( EventGroupHandle_t xEventGroup )\n   {\n   EventBits_t uxBits;\n   const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;\n\n\t\t// Wait a maximum of 100ms for either bit 0 or bit 4 to be set within\n\t\t// the event group.  Clear the bits before exiting.\n\t\tuxBits = xEventGroupWaitBits(\n\t\t\t\t\txEventGroup,\t// The event group being tested.\n\t\t\t\t\tBIT_0 | BIT_4,\t// The bits within the event group to wait for.\n\t\t\t\t\tpdTRUE,\t\t\t// BIT_0 and BIT_4 should be cleared before returning.\n\t\t\t\t\tpdFALSE,\t\t// Don't wait for both bits, either bit will do.\n\t\t\t\t\txTicksToWait );\t// Wait a maximum of 100ms for either bit to be set.\n\n\t\tif( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )\n\t\t{\n\t\t\t// xEventGroupWaitBits() returned because both bits were set.\n\t\t}\n\t\telse if( ( uxBits & BIT_0 ) != 0 )\n\t\t{\n\t\t\t// xEventGroupWaitBits() returned because just BIT_0 was set.\n\t\t}\n\t\telse if( ( uxBits & BIT_4 ) != 0 )\n\t\t{\n\t\t\t// xEventGroupWaitBits() returned because just BIT_4 was set.\n\t\t}\n\t\telse\n\t\t{\n\t\t\t// xEventGroupWaitBits() returned because xTicksToWait ticks passed\n\t\t\t// without either BIT_0 or BIT_4 becoming set.\n\t\t}\n   }\n
\n * \\defgroup xEventGroupWaitBits xEventGroupWaitBits\n * \\ingroup EventGroup\n */\nEventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/**\n * event_groups.h\n *
\n\tEventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );\n
\n *\n * Clear bits within an event group. This function cannot be called from an\n * interrupt.\n *\n * @param xEventGroup The event group in which the bits are to be cleared.\n *\n * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear\n * in the event group. For example, to clear bit 3 only, set uxBitsToClear to\n * 0x08. To clear bit 3 and bit 0 set uxBitsToClear to 0x09.\n *\n * @return The value of the event group before the specified bits were cleared.\n *\n * Example usage:\n 
\n   #define BIT_0\t( 1 << 0 )\n   #define BIT_4\t( 1 << 4 )\n\n   void aFunction( EventGroupHandle_t xEventGroup )\n   {\n   EventBits_t uxBits;\n\n\t\t// Clear bit 0 and bit 4 in xEventGroup.\n\t\tuxBits = xEventGroupClearBits(\n\t\t\t\t\t\t\t\txEventGroup,\t// The event group being updated.\n\t\t\t\t\t\t\t\tBIT_0 | BIT_4 );// The bits being cleared.\n\n\t\tif( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )\n\t\t{\n\t\t\t// Both bit 0 and bit 4 were set before xEventGroupClearBits() was\n\t\t\t// called.  Both will now be clear (not set).\n\t\t}\n\t\telse if( ( uxBits & BIT_0 ) != 0 )\n\t\t{\n\t\t\t// Bit 0 was set before xEventGroupClearBits() was called.  It will\n\t\t\t// now be clear.\n\t\t}\n\t\telse if( ( uxBits & BIT_4 ) != 0 )\n\t\t{\n\t\t\t// Bit 4 was set before xEventGroupClearBits() was called.  It will\n\t\t\t// now be clear.\n\t\t}\n\t\telse\n\t\t{\n\t\t\t// Neither bit 0 nor bit 4 were set in the first place.\n\t\t}\n   }\n
\n * \\defgroup xEventGroupClearBits xEventGroupClearBits\n * \\ingroup EventGroup\n */\nEventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;\n\n/**\n * event_groups.h\n *
\n\tBaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );\n
\n *\n * A version of xEventGroupClearBits() that can be called from an interrupt.\n *\n * Setting bits in an event group is not a deterministic operation because there\n * are an unknown number of tasks that may be waiting for the bit or bits being\n * set. FreeRTOS does not allow nondeterministic operations to be performed\n * while interrupts are disabled, so protects event groups that are accessed\n * from tasks by suspending the scheduler rather than disabling interrupts. As\n * a result event groups cannot be accessed directly from an interrupt service\n * routine. Therefore xEventGroupClearBitsFromISR() sends a message to the\n * timer task to have the clear operation performed in the context of the timer\n * task.\n *\n * @param xEventGroup The event group in which the bits are to be cleared.\n *\n * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear.\n * For example, to clear bit 3 only, set uxBitsToClear to 0x08. To clear bit 3\n * and bit 0 set uxBitsToClear to 0x09.\n *\n * @return If the request to execute the function was posted successfully then\n * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned\n * if the timer service queue was full.\n *\n * Example usage:\n 
\n   #define BIT_0\t( 1 << 0 )\n   #define BIT_4\t( 1 << 4 )\n\n   // An event group which it is assumed has already been created by a call to\n   // xEventGroupCreate().\n   EventGroupHandle_t xEventGroup;\n\n   void anInterruptHandler( void )\n   {\n\t\t// Clear bit 0 and bit 4 in xEventGroup.\n\t\txResult = xEventGroupClearBitsFromISR(\n\t\t\t\t\t\t\txEventGroup,\t // The event group being updated.\n\t\t\t\t\t\t\tBIT_0 | BIT_4 ); // The bits being set.\n\n\t\tif( xResult == pdPASS )\n\t\t{\n\t\t\t// The message was posted successfully.\n\t\t}\n  }\n
\n * \\defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR\n * \\ingroup EventGroup\n */\n#if( configUSE_TRACE_FACILITY == 1 )\n\tBaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;\n#else\n\t#define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )\n#endif\n\n/**\n * event_groups.h\n *
\n\tEventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );\n
\n *\n * Set bits within an event group.\n * This function cannot be called from an interrupt. xEventGroupSetBitsFromISR()\n * is a version that can be called from an interrupt.\n *\n * Setting bits in an event group will automatically unblock tasks that are\n * blocked waiting for the bits.\n *\n * @param xEventGroup The event group in which the bits are to be set.\n *\n * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.\n * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3\n * and bit 0 set uxBitsToSet to 0x09.\n *\n * @return The value of the event group at the time the call to\n * xEventGroupSetBits() returns. There are two reasons why the returned value\n * might have the bits specified by the uxBitsToSet parameter cleared. First,\n * if setting a bit results in a task that was waiting for the bit leaving the\n * blocked state then it is possible the bit will be cleared automatically\n * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any\n * unblocked (or otherwise Ready state) task that has a priority above that of\n * the task that called xEventGroupSetBits() will execute and may change the\n * event group value before the call to xEventGroupSetBits() returns.\n *\n * Example usage:\n 
\n   #define BIT_0\t( 1 << 0 )\n   #define BIT_4\t( 1 << 4 )\n\n   void aFunction( EventGroupHandle_t xEventGroup )\n   {\n   EventBits_t uxBits;\n\n\t\t// Set bit 0 and bit 4 in xEventGroup.\n\t\tuxBits = xEventGroupSetBits(\n\t\t\t\t\t\t\txEventGroup,\t// The event group being updated.\n\t\t\t\t\t\t\tBIT_0 | BIT_4 );// The bits being set.\n\n\t\tif( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )\n\t\t{\n\t\t\t// Both bit 0 and bit 4 remained set when the function returned.\n\t\t}\n\t\telse if( ( uxBits & BIT_0 ) != 0 )\n\t\t{\n\t\t\t// Bit 0 remained set when the function returned, but bit 4 was\n\t\t\t// cleared.  It might be that bit 4 was cleared automatically as a\n\t\t\t// task that was waiting for bit 4 was removed from the Blocked\n\t\t\t// state.\n\t\t}\n\t\telse if( ( uxBits & BIT_4 ) != 0 )\n\t\t{\n\t\t\t// Bit 4 remained set when the function returned, but bit 0 was\n\t\t\t// cleared.  It might be that bit 0 was cleared automatically as a\n\t\t\t// task that was waiting for bit 0 was removed from the Blocked\n\t\t\t// state.\n\t\t}\n\t\telse\n\t\t{\n\t\t\t// Neither bit 0 nor bit 4 remained set.  It might be that a task\n\t\t\t// was waiting for both of the bits to be set, and the bits were\n\t\t\t// cleared as the task left the Blocked state.\n\t\t}\n   }\n
\n * \\defgroup xEventGroupSetBits xEventGroupSetBits\n * \\ingroup EventGroup\n */\nEventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;\n\n/**\n * event_groups.h\n *
\n\tBaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * A version of xEventGroupSetBits() that can be called from an interrupt.\n *\n * Setting bits in an event group is not a deterministic operation because there\n * are an unknown number of tasks that may be waiting for the bit or bits being\n * set. FreeRTOS does not allow nondeterministic operations to be performed in\n * interrupts or from critical sections. Therefore xEventGroupSetBitsFromISR()\n * sends a message to the timer task to have the set operation performed in the\n * context of the timer task - where a scheduler lock is used in place of a\n * critical section.\n *\n * @param xEventGroup The event group in which the bits are to be set.\n *\n * @param uxBitsToSet A bitwise value that indicates the bit or bits to set.\n * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3\n * and bit 0 set uxBitsToSet to 0x09.\n *\n * @param pxHigherPriorityTaskWoken As mentioned above, calling this function\n * will result in a message being sent to the timer daemon task. If the\n * priority of the timer daemon task is higher than the priority of the\n * currently running task (the task the interrupt interrupted) then\n * *pxHigherPriorityTaskWoken will be set to pdTRUE by\n * xEventGroupSetBitsFromISR(), indicating that a context switch should be\n * requested before the interrupt exits. For that reason\n * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the\n * example code below.\n *\n * @return If the request to execute the function was posted successfully then\n * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned\n * if the timer service queue was full.\n *\n * Example usage:\n 
\n   #define BIT_0\t( 1 << 0 )\n   #define BIT_4\t( 1 << 4 )\n\n   // An event group which it is assumed has already been created by a call to\n   // xEventGroupCreate().\n   EventGroupHandle_t xEventGroup;\n\n   void anInterruptHandler( void )\n   {\n   BaseType_t xHigherPriorityTaskWoken, xResult;\n\n\t\t// xHigherPriorityTaskWoken must be initialised to pdFALSE.\n\t\txHigherPriorityTaskWoken = pdFALSE;\n\n\t\t// Set bit 0 and bit 4 in xEventGroup.\n\t\txResult = xEventGroupSetBitsFromISR(\n\t\t\t\t\t\t\txEventGroup,\t// The event group being updated.\n\t\t\t\t\t\t\tBIT_0 | BIT_4   // The bits being set.\n\t\t\t\t\t\t\t&xHigherPriorityTaskWoken );\n\n\t\t// Was the message posted successfully?\n\t\tif( xResult == pdPASS )\n\t\t{\n\t\t\t// If xHigherPriorityTaskWoken is now set to pdTRUE then a context\n\t\t\t// switch should be requested.  The macro used is port specific and\n\t\t\t// will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -\n\t\t\t// refer to the documentation page for the port being used.\n\t\t\tportYIELD_FROM_ISR( xHigherPriorityTaskWoken );\n\t\t}\n  }\n
\n * \\defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR\n * \\ingroup EventGroup\n */\n#if( configUSE_TRACE_FACILITY == 1 )\n\tBaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n#else\n\t#define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )\n#endif\n\n/**\n * event_groups.h\n *
\n\tEventBits_t xEventGroupSync(\tEventGroupHandle_t xEventGroup,\n\t\t\t\t\t\t\t\t\tconst EventBits_t uxBitsToSet,\n\t\t\t\t\t\t\t\t\tconst EventBits_t uxBitsToWaitFor,\n\t\t\t\t\t\t\t\t\tTickType_t xTicksToWait );\n
\n *\n * Atomically set bits within an event group, then wait for a combination of\n * bits to be set within the same event group. This functionality is typically\n * used to synchronise multiple tasks, where each task has to wait for the other\n * tasks to reach a synchronisation point before proceeding.\n *\n * This function cannot be used from an interrupt.\n *\n * The function will return before its block time expires if the bits specified\n * by the uxBitsToWait parameter are set, or become set within that time. In\n * this case all the bits specified by uxBitsToWait will be automatically\n * cleared before the function returns.\n *\n * @param xEventGroup The event group in which the bits are being tested. The\n * event group must have previously been created using a call to\n * xEventGroupCreate().\n *\n * @param uxBitsToSet The bits to set in the event group before determining\n * if, and possibly waiting for, all the bits specified by the uxBitsToWait\n * parameter are set.\n *\n * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test\n * inside the event group. For example, to wait for bit 0 and bit 2 set\n * uxBitsToWaitFor to 0x05. To wait for bits 0 and bit 1 and bit 2 set\n * uxBitsToWaitFor to 0x07. Etc.\n *\n * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait\n * for all of the bits specified by uxBitsToWaitFor to become set.\n *\n * @return The value of the event group at the time either the bits being waited\n * for became set, or the block time expired. Test the return value to know\n * which bits were set. If xEventGroupSync() returned because its timeout\n * expired then not all the bits being waited for will be set. If\n * xEventGroupSync() returned because all the bits it was waiting for were\n * set then the returned value is the event group value before any bits were\n * automatically cleared.\n *\n * Example usage:\n 
\n // Bits used by the three tasks.\n #define TASK_0_BIT\t\t( 1 << 0 )\n #define TASK_1_BIT\t\t( 1 << 1 )\n #define TASK_2_BIT\t\t( 1 << 2 )\n\n #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )\n\n // Use an event group to synchronise three tasks.  It is assumed this event\n // group has already been created elsewhere.\n EventGroupHandle_t xEventBits;\n\n void vTask0( void *pvParameters )\n {\n EventBits_t uxReturn;\n TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;\n\n\t for( ;; )\n\t {\n\t\t// Perform task functionality here.\n\n\t\t// Set bit 0 in the event flag to note this task has reached the\n\t\t// sync point.  The other two tasks will set the other two bits defined\n\t\t// by ALL_SYNC_BITS.  All three tasks have reached the synchronisation\n\t\t// point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms\n\t\t// for this to happen.\n\t\tuxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );\n\n\t\tif( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )\n\t\t{\n\t\t\t// All three tasks reached the synchronisation point before the call\n\t\t\t// to xEventGroupSync() timed out.\n\t\t}\n\t}\n }\n\n void vTask1( void *pvParameters )\n {\n\t for( ;; )\n\t {\n\t\t// Perform task functionality here.\n\n\t\t// Set bit 1 in the event flag to note this task has reached the\n\t\t// synchronisation point.  The other two tasks will set the other two\n\t\t// bits defined by ALL_SYNC_BITS.  All three tasks have reached the\n\t\t// synchronisation point when all the ALL_SYNC_BITS are set.  Wait\n\t\t// indefinitely for this to happen.\n\t\txEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );\n\n\t\t// xEventGroupSync() was called with an indefinite block time, so\n\t\t// this task will only reach here if the syncrhonisation was made by all\n\t\t// three tasks, so there is no need to test the return value.\n\t }\n }\n\n void vTask2( void *pvParameters )\n {\n\t for( ;; )\n\t {\n\t\t// Perform task functionality here.\n\n\t\t// Set bit 2 in the event flag to note this task has reached the\n\t\t// synchronisation point.  The other two tasks will set the other two\n\t\t// bits defined by ALL_SYNC_BITS.  All three tasks have reached the\n\t\t// synchronisation point when all the ALL_SYNC_BITS are set.  Wait\n\t\t// indefinitely for this to happen.\n\t\txEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );\n\n\t\t// xEventGroupSync() was called with an indefinite block time, so\n\t\t// this task will only reach here if the syncrhonisation was made by all\n\t\t// three tasks, so there is no need to test the return value.\n\t}\n }\n\n
\n * \\defgroup xEventGroupSync xEventGroupSync\n * \\ingroup EventGroup\n */\nEventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n\n/**\n * event_groups.h\n *
\n\tEventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );\n
\n *\n * Returns the current value of the bits in an event group. This function\n * cannot be used from an interrupt.\n *\n * @param xEventGroup The event group being queried.\n *\n * @return The event group bits at the time xEventGroupGetBits() was called.\n *\n * \\defgroup xEventGroupGetBits xEventGroupGetBits\n * \\ingroup EventGroup\n */\n#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 )\n\n/**\n * event_groups.h\n *
\n\tEventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );\n
\n *\n * A version of xEventGroupGetBits() that can be called from an ISR.\n *\n * @param xEventGroup The event group being queried.\n *\n * @return The event group bits at the time xEventGroupGetBitsFromISR() was called.\n *\n * \\defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR\n * \\ingroup EventGroup\n */\nEventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;\n\n/**\n * event_groups.h\n *
\n\tvoid xEventGroupDelete( EventGroupHandle_t xEventGroup );\n
\n *\n * Delete an event group that was previously created by a call to\n * xEventGroupCreate(). Tasks that are blocked on the event group will be\n * unblocked and obtain 0 as the event group's value.\n *\n * @param xEventGroup The event group being deleted.\n */\nvoid vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION;\n\n/* For internal use only. */\nvoid vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION;\nvoid vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION;\n\n\n#if (configUSE_TRACE_FACILITY == 1)\n\tUBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION;\n\tvoid vEventGroupSetNumber( void* xEventGroup, UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION;\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* EVENT_GROUPS_H */\n\n\n" }, { "path": "include/rtos/freertos/freertos_evr.h", "content": "/* --------------------------------------------------------------------------\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * Name: freertos_evr.h\n * Purpose: FreeRTOS Event Recorder definitions\n *\n *---------------------------------------------------------------------------*/\n\n#ifndef FREERTOS_EVR_H_\n#define FREERTOS_EVR_H_\n\n#include \n#include \n\n//#include \"RTE_Components.h\"\n\n#if !defined(RTE_Compiler_EventRecorder)\n /* Disable debug events if Event Recorder is not used */\n #ifndef EVR_FREERTOS_DISABLE\n #define EVR_FREERTOS_DISABLE\n #endif\n#endif\n\n/* Temporarily define FreeRTOS object types */\n#define TCB_t void*\n#define Queue_t void*\n#define Timer_t void*\n#define PendedFunction_t void*\n#define EventGroup_t void*\n#define StreamBuffer_t void*\n\n/**\n \\brief Setup Event Recorder configuration\n \\param[in] reset reset if already configured (0:no reset, 1:reset)\n*/\nextern void EvrFreeRTOSSetup (uint32_t reset);\n\n/**\n \\brief Event on successful task create (Op)\n \\param[in] pxNewTCB pointer to task handle.\n*/\nextern void EvrFreeRTOSTasks_TaskCreate (TCB_t pxNewTCB);\n\n/**\n \\brief Event on unsuccessful task create (Error)\n*/\nextern void EvrFreeRTOSTasks_TaskCreateFailed (void);\n\n/**\n \\brief Event on task delete (Op)\n \\param[in] pxTCB pointer to task handle.\n*/\nextern void EvrFreeRTOSTasks_TaskDelete (TCB_t pxTCB);\n\n/**\n \\brief Event before current running task execution is delayed (Op)\n \\param[in] xTimeToWake wake time (ticks).\n*/\nextern void EvrFreeRTOSTasks_TaskDelayUntil (uint32_t xTimeToWake);\n\n/**\n \\brief Event on current thread execution delay (Op)\n \\param[in] xTicksToDelay number of ticks to delay.\n*/\nextern void EvrFreeRTOSTasks_TaskDelay (uint32_t xTicksToDelay);\n\n/**\n \\brief Event on task priority set (Op)\n \\param[in] pxTCB pointer to task handle.\n \\param[in] uxNewPriority\n*/\nextern void EvrFreeRTOSTasks_TaskPrioritySet (TCB_t pxTCB, uint32_t uxNewPriority);\n\n/**\n \\brief Event on task suspend (Op)\n \\param[in] pxTCB pointer to task handle.\n*/\nextern void EvrFreeRTOSTasks_TaskSuspend (TCB_t pxTCB);\n\n/**\n \\brief Event on task resume (Op)\n \\param[in] pxTCB pointer to task handle.\n*/\nextern void EvrFreeRTOSTasks_TaskResume (TCB_t pxTCB);\n\n/**\n \\brief Event on task resume call from ISR (Op)\n \\param[in] pxTCB pointer to task handle.\n*/\nextern void EvrFreeRTOSTasks_TaskResumeFromIsr (TCB_t pxTCB);\n\n/**\n \\brief Event on tick count increment (Detail)\n \\param[in] xTickCount tick count before increment.\n*/\nextern void EvrFreeRTOSTasks_TaskIncrementTick (uint32_t xTickCount);\n\n/**\n \\brief Event on tick count increase (Op)\n \\param[in] xTicksToJump number of ticks by which the tick count is increased.\n*/\nextern void EvrFreeRTOSTasks_IncreaseTickCount (uint32_t xTicksToJump);\n\n/**\n \\brief Event before a new task is selected to run (Op)\n \\param[in] pxCurrentTCB handle to the task about to leave the running state.\n*/\nextern void EvrFreeRTOSTasks_TaskSwitchedOut (TCB_t pxCurrentTCB);\n\n/**\n \\brief Event after a task has been selected to run (Op)\n \\param[in] pxCurrentTCB handle to the task about to enter the running state.\n \\param[in] uxTopPriority pxCurrentTCB task priority.\n*/\nextern void EvrFreeRTOSTasks_TaskSwitchedIn (TCB_t pxCurrentTCB, uint32_t uxTopPriority);\n\n/**\n \\brief Event on task priority inheritance (Op)\n \\param[in] pxTCBOfMutexHolder pointer to task handle.\n \\param[in] uxInheritedPriority new (inherited) task priority.\n*/\nextern void EvrFreeRTOSTasks_TaskPriorityInherit (TCB_t pxTCBOfMutexHolder, uint32_t uxInheritedPriority);\n\n/**\n \\brief Event on task priority disinheritance (Op)\n \\param[in] pxTCBOfMutexHolder pointer to task handle.\n \\param[in] uxOriginalPriority old (original) task priority.\n*/\nextern void EvrFreeRTOSTasks_TaskPriorityDisinherit (TCB_t pxTCBOfMutexHolder, uint32_t uxOriginalPriority);\n\n/**\n \\brief Event sent before transition of a task into the Ready state (Op)\n \\param[in] pxTCB pointer to task handle.\n*/\nextern void EvrFreeRTOSTasks_MovedTaskToReadyState (TCB_t pxTCB);\n\n/**\n \\brief Event sent after transition of a task into the Ready state (Op)\n \\param[in] pxTCB pointer to task handle.\n*/\nextern void EvrFreeRTOSTasks_PostMovedTaskToReadyState (TCB_t pxTCB);\n\n/**\n \\brief Event on enter to the low power mode (Op)\n \\param[in] xExpectedIdleTime expected idle time in ticks.\n*/\nextern void EvrFreeRTOSTasks_LowPowerIdleBegin (uint32_t xExpectedIdleTime);\n\n/**\n \\brief Event on exit from the low power mode (Op)\n*/\nextern void EvrFreeRTOSTasks_LowPowerIdleEnd (void);\n\n/**\n \\brief Event on indicating the current running task is about to block while waiting for notification to be non-zero (Op)\n \\param[in] xTicksToWait wait timeout in ticks.\n*/\nextern void EvrFreeRTOSTasks_TaskNotifyTakeBlock (uint32_t xTicksToWait);\n\n/**\n \\brief Event on successful task notify take (Op)\n \\param[in] ulNotifiedValue current state of the notification value.\n*/\nextern void EvrFreeRTOSTasks_TaskNotifyTake (uint32_t ulNotifiedValue);\n\n/**\n \\brief Event indicating the current running task is about to block while waiting to receive notification (Op)\n \\param[in] xTicksToWait wait timeout in ticks.\n*/\nextern void EvrFreeRTOSTasks_TaskNotifyWaitBlock (uint32_t xTicksToWait);\n\n/**\n \\brief Event on successful task notify wait (Op)\n \\param[in] ulNotifiedValue current state of the notification value.\n*/\nextern void EvrFreeRTOSTasks_TaskNotifyWait (uint32_t ulNotifiedValue);\n\n/**\n \\brief Event on successful task notify (Op)\n \\param[in] xTaskToNotify pointer to task to be notified.\n \\param[in] ulValue notify value.\n \\param[in] eAction task notification action.\n \\param[in] ulNotifiedValue current state of the notification value.\n*/\nextern void EvrFreeRTOSTasks_TaskNotify (TCB_t xTaskToNotify, uint32_t ulValue, uint32_t eAction, uint32_t ulNotifiedValue);\n\n/**\n \\brief Event on successful task notify from ISR (Op)\n \\param[in] xTaskToNotify pointer to task to be notified.\n \\param[in] ulValue notify value.\n \\param[in] eAction task notification action.\n \\param[in] ulNotifiedValue current state of the notification value.\n*/\nextern void EvrFreeRTOSTasks_TaskNotifyFromIsr (TCB_t xTaskToNotify, uint32_t ulValue, uint32_t eAction, uint32_t ulNotifiedValue);\n\n/**\n \\brief Event on successful task notify give from ISR (Op)\n \\param[in] xTaskToNotify pointer to task to be notified.\n \\param[in] ulNotifiedValue current state of the notification value.\n*/\nextern void EvrFreeRTOSTasks_TaskNotifyGiveFromIsr (TCB_t xTaskToNotify, uint32_t ulNotifiedValue);\n\n/**\n \\brief Event on successful queue create (Op)\n \\param[in] pxQueue pointer to mutex object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueCreate (Queue_t pxQueue);\n\n/**\n \\brief Event on unsuccessful queue create (Error)\n \\param[in] ucQueueType queue type\n*/\nextern void EvrFreeRTOSQueue_QueueCreateFailed (uint32_t ucQueueType);\n\n/**\n \\brief Event on successful mutex create (Op)\n \\param[in] pxNewQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_CreateMutex (Queue_t pxNewQueue);\n\n/**\n \\brief Event on unsuccessful mutex create (Error)\n*/\nextern void EvrFreeRTOSQueue_CreateMutexFailed (void);\n\n/**\n \\brief Event on successful recursive mutex give (Op)\n \\param[in] pxMutex pointer to mutex object handle.\n*/\nextern void EvrFreeRTOSQueue_GiveMutexRecursive (Queue_t pxMutex);\n\n/**\n \\brief Event on unsuccessful recursive mutex give (Error)\n \\param[in] pxMutex pointer to mutex object handle.\n*/\nextern void EvrFreeRTOSQueue_GiveMutexRecursiveFailed (Queue_t pxMutex);\n\n/**\n \\brief Event on successful recursive mutex take (Op)\n \\param[in] pxMutex pointer to mutex object handle.\n*/\nextern void EvrFreeRTOSQueue_TakeMutexRecursive (Queue_t pxMutex);\n\n/**\n \\brief Event on unsuccessful recursive mutex take (Error)\n \\param[in] pxMutex pointer to mutex object handle.\n*/\nextern void EvrFreeRTOSQueue_TakeMutexRecursiveFailed (Queue_t pxMutex);\n\n/**\n \\brief Event on successful counting semaphore create (Op)\n \\param[in] xHandle pointer to semaphore object handle.\n*/\nextern void EvrFreeRTOSQueue_CreateCountingSemaphore (Queue_t xHandle);\n\n/**\n \\brief Event on unsuccessful counting semaphore create (Error)\n*/\nextern void EvrFreeRTOSQueue_CreateCountingSemaphoreFailed (void);\n\n/**\n \\brief Event on queue write (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueSend (Queue_t pxQueue);\n\n/**\n \\brief Event on write to the full queue (Error)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueSendFailed (Queue_t pxQueue);\n\n/**\n \\brief Event on queue read (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueReceive (Queue_t pxQueue);\n\n/**\n \\brief Event on queue peek (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueuePeek (Queue_t pxQueue);\n\n/**\n \\brief Event on queue peek when queue is empty and no block time was specified (Error)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueuePeekFailed (Queue_t pxQueue);\n\n/**\n \\brief Event on queue peek from ISR (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueuePeekFromIsr (Queue_t pxQueue);\n\n/**\n \\brief Event on read from the empty queue (Error)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueReceiveFailed (Queue_t pxQueue);\n\n/**\n \\brief Event on write to the queue from ISR (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueSendFromIsr (Queue_t pxQueue);\n\n/**\n \\brief Event on write to the full queue from ISR (Error)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueSendFromIsrFailed (Queue_t pxQueue);\n\n/**\n \\brief Event on queue read from ISR (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueReceiveFromIsr (Queue_t pxQueue);\n\n/**\n \\brief Event on empty queue read from ISR (Error)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueReceiveFromIsrFailed (Queue_t pxQueue);\n\n/**\n \\brief Event on empty queue peek from ISR (Error)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueuePeekFromIsrFailed (Queue_t pxQueue);\n\n/**\n \\brief Event on queue delete (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_QueueDelete (Queue_t pxQueue);\n\n/**\n \\brief Event on assignment of a human readable name to a queue (Op)\n \\param[in] pxQueue pointer to queue object handle.\n \\param[in] pcQueueName pointer to queue object name.\n*/\nextern void EvrFreeRTOSQueue_QueueRegistryAdd (Queue_t pxQueue, const char *pcQueueName);\n\n/**\n \\brief Event indicating the current running task is about to block while reading from an empty queue (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_BlockingOnQueueReceive (Queue_t pxQueue);\n\n/**\n \\brief Event indicating the current running task is about to block while writting to a full queue (Op)\n \\param[in] pxQueue pointer to queue object handle.\n*/\nextern void EvrFreeRTOSQueue_BlockingOnQueueSend (Queue_t pxQueue);\n\n/**\n \\brief Event on successful timer object create (Op)\n \\param[in] pxNewTimer pointer to timer object handle.\n*/\nextern void EvrFreeRTOSTimers_TimerCreate (Timer_t pxNewTimer);\n\n/**\n \\brief Event on unsuccessful timer object create (Error)\n*/\nextern void EvrFreeRTOSTimers_TimerCreateFailed (void);\n\n/**\n \\brief Event on timer queue command send (Op)\n \\param[in] pxTimer pointer to timer object handle.\n \\param[in] xCommandID timer command ID.\n \\param[in] xOptionalValue optional command value.\n \\param[in] xReturn return value.\n*/\nextern void EvrFreeRTOSTimers_TimerCommandSend (Timer_t pxTimer, uint32_t xCommandID, uint32_t xOptionalValue, uint32_t xReturn);\n\n/**\n \\brief Event on timer queue command receive (Op)\n \\param[in] pxTimer pointer to timer object handle.\n \\param[in] xCommandID timer command ID.\n \\param[in] xOptionalValue optional command value.\n*/\nextern void EvrFreeRTOSTimers_TimerCommandReceived (Timer_t pxTimer, uint32_t xCommandID, uint32_t xOptionalValue);\n\n/**\n \\brief Event on timer expire (Op)\n \\param[in] pxTimer pointer to timer object handle.\n*/\nextern void EvrFreeRTOSTimers_TimerExpired (Timer_t pxTimer);\n\n/**\n \\brief Event on pass of the function execution to the timer service task (Op)\n \\param[in] pxFunctionToPend pointer to callback function\n \\param[in] pvParameter1 function parameter 1.\n \\param[in] ulParameter2 function parameter 2.\n \\param[in] xReturn return value.\n*/\nextern void EvrFreeRTOSTimers_PendFuncCall (PendedFunction_t pxFunctionToPend, void *pvParameter1, uint32_t ulParameter2, uint32_t xReturn);\n\n/**\n \\brief Event on pass of the function execution to the timer service task from the ISR (Op)\n \\param[in] pxFunctionToPend pointer to callback function\n \\param[in] pvParameter1 function parameter 1.\n \\param[in] ulParameter2 function parameter 2.\n \\param[in] xReturn return value.\n*/\nextern void EvrFreeRTOSTimers_PendFuncCallFromIsr (PendedFunction_t pxFunctionToPend, void *pvParameter1, uint32_t ulParameter2, uint32_t xReturn);\n\n/**\n \\brief Event on successful event groups object create (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupCreate (EventGroup_t pxEventGroup);\n\n/**\n \\brief Event on unsuccessful event groups object create (Error)\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupCreateFailed (void);\n\n/**\n \\brief Event on event groups sync wait start (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n \\param[in] uxBitsToSet event bits that shall be set.\n \\param[in] uxBitsToWaitFor event bits to wait for.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupSyncBlock (EventGroup_t pxEventGroup, uint32_t uxBitsToSet, uint32_t uxBitsToWaitFor);\n\n/**\n \\brief Event on event groups sync completed (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n \\param[in] uxBitsToSet event bits that shall be set.\n \\param[in] uxBitsToWaitFor event bits to wait for.\n \\param[in] xTimeoutOccurred timeout value.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupSyncEnd (EventGroup_t pxEventGroup, uint32_t uxBitsToSet, uint32_t uxBitsToWaitFor, uint32_t xTimeoutOccurred);\n\n/**\n \\brief Event on event groups bit wait start (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n \\param[in] uxBitsToWaitFor event bits to wait for.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupWaitBitsBlock (EventGroup_t pxEventGroup, uint32_t uxBitsToWaitFor);\n\n/**\n \\brief Event on event groups bit wait completed (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n \\param[in] uxBitsToWaitFor event bits to wait for.\n \\param[in] xTimeoutOccurred timeout value.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupWaitBitsEnd (EventGroup_t pxEventGroup, uint32_t uxBitsToWaitFor, uint32_t xTimeoutOccurred);\n\n/**\n \\brief Event on event groups bit clear (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n \\param[in] uxBitsToClear event bits that shall be cleared.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupClearBits (EventGroup_t pxEventGroup, uint32_t uxBitsToClear);\n\n/**\n \\brief Event on event groups bit clear call from ISR (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n \\param[in] uxBitsToClear event bits that shall be cleared.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupClearBitsFromIsr (EventGroup_t pxEventGroup, uint32_t uxBitsToClear);\n\n/**\n \\brief Event on event groups bit set (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n \\param[in] uxBitsToSet event bits that shall be set.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupSetBits (EventGroup_t pxEventGroup, uint32_t uxBitsToSet);\n\n/**\n \\brief Event on event groups bit set call from ISR (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n \\param[in] uxBitsToSet event bits that shall be set.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupSetBitsFromIsr (EventGroup_t pxEventGroup, uint32_t uxBitsToSet);\n\n/**\n \\brief Event on event groups object delete (Op)\n \\param[in] pxEventGroup pointer to Event Groups object handle.\n*/\nextern void EvrFreeRTOSEventGroups_EventGroupDelete (EventGroup_t pxEventGroup);\n\n/**\n \\brief Event on unsuccessful stream buffer object create (Error)\n \\param[in] uxIsMessageBuffer buffer type designator (0:stream, 1:message).\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferCreateFailed (uint32_t uxIsMessageBuffer);\n\n/**\n \\brief Event on unsuccessful stream buffer object create (Error)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n \\param[in] uxIsMessageBuffer buffer type designator (0:stream, 1:message).\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferCreateStaticFailed (StreamBuffer_t pxStreamBuffer, uint32_t uxIsMessageBuffer);\n\n/**\n \\brief Event on successful stream buffer object create (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n \\param[in] uxIsMessageBuffer buffer type designator (0:stream, 1:message).\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferCreate (StreamBuffer_t pxStreamBuffer, uint32_t uxIsMessageBuffer);\n\n/**\n \\brief Event on stream buffer object delete (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferDelete (StreamBuffer_t pxStreamBuffer);\n\n/**\n \\brief Event on stream buffer object reset (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferReset (StreamBuffer_t pxStreamBuffer);\n\n/**\n \\brief Event on stream buffer send when buffer is full and sending task is blocked (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferBlockingOnSend (StreamBuffer_t pxStreamBuffer);\n\n/**\n \\brief Event on stream buffer send when data is successfully copied into the buffer (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n \\param[in] xBytesSent number of bytes copied into the buffer\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferSend (StreamBuffer_t pxStreamBuffer, uint32_t xBytesSent);\n\n/**\n \\brief Event on stream buffer send when data is not copied into the buffer (Error)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferSendFailed (StreamBuffer_t pxStreamBuffer);\n\n/**\n \\brief Event on stream buffer send from ISR when data is successfully copied into the buffer (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n \\param[in] xBytesSent number of bytes copied into the buffer\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferSendFromIsr (StreamBuffer_t pxStreamBuffer, uint32_t xBytesSent);\n\n/**\n \\brief Event on stream buffer receive when buffer is empty and receiving task is blocked (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferBlockingOnReceive (StreamBuffer_t pxStreamBuffer);\n\n/**\n \\brief Event on stream buffer receive when data is successfully copied from the buffer (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n \\param[in] xReceivedLength number of bytes copied from the buffer\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferReceive (StreamBuffer_t pxStreamBuffer, uint32_t xReceivedLength);\n\n/**\n \\brief Event on stream buffer receive when data is not copied from the buffer (Error)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferReceiveFailed (StreamBuffer_t pxStreamBuffer);\n\n/**\n \\brief Event on stream buffer receive from ISR when data is successfully copied from the buffer (Op)\n \\param[in] pxStreamBuffer pointer to Stream Buffer object handle.\n \\param[in] xReceivedLength number of bytes copied from the buffer\n*/\nextern void EvrFreeRTOSStreamBuf_StreamBufferReceiveFromIsr (StreamBuffer_t pxStreamBuffer, uint32_t xReceivedLength);\n\n/**\n \\brief Event on heap memory block allocation (Op)\n \\param[in] pvAddress pointer to memory block.\n \\param[in] uiSize memory block size.\n*/\nextern void EvrFreeRTOSHeap_Malloc (void *pvAddress, uint32_t uiSize);\n\n/**\n \\brief Event on heap memory block free (Op)\n \\param[in] pvAddress pointer to memory block.\n \\param[in] uiSize memory block size.\n*/\nextern void EvrFreeRTOSHeap_Free (void *pvAddress, uint32_t uiSize);\n\n\n/* Tasks */\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_CREATE_DISABLE))\n #define traceTASK_CREATE(px) EvrFreeRTOSTasks_TaskCreate(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_CREATE_FAILED_DISABLE))\n #define traceTASK_CREATE_FAILED() EvrFreeRTOSTasks_TaskCreateFailed()\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_DELETE_DISABLE))\n #define traceTASK_DELETE(px) EvrFreeRTOSTasks_TaskDelete(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_DELAY_UNTIL_DISABLE))\n #define traceTASK_DELAY_UNTIL(x) EvrFreeRTOSTasks_TaskDelayUntil(x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_DELAY_DISABLE))\n #define traceTASK_DELAY() EvrFreeRTOSTasks_TaskDelay(xTicksToDelay)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_PRIORITY_SET_DISABLE))\n #define traceTASK_PRIORITY_SET(px,ux) EvrFreeRTOSTasks_TaskPrioritySet(px,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_SUSPEND_DISABLE))\n #define traceTASK_SUSPEND(px) EvrFreeRTOSTasks_TaskSuspend(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_RESUME_DISABLE))\n #define traceTASK_RESUME(px) EvrFreeRTOSTasks_TaskResume(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_RESUME_FROM_ISR_DISABLE))\n #define traceTASK_RESUME_FROM_ISR(px) EvrFreeRTOSTasks_TaskResumeFromIsr(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_INCREMENT_TICK_DISABLE))\n #define traceTASK_INCREMENT_TICK(x) EvrFreeRTOSTasks_TaskIncrementTick(x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceINCREASE_TICK_COUNT_DISABLE))\n #define traceINCREASE_TICK_COUNT(x) EvrFreeRTOSTasks_IncreaseTickCount(x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_SWITCHED_OUT_DISABLE))\n #define traceTASK_SWITCHED_OUT() EvrFreeRTOSTasks_TaskSwitchedOut(pxCurrentTCB)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_SWITCHED_IN_DISABLE))\n #define traceTASK_SWITCHED_IN() EvrFreeRTOSTasks_TaskSwitchedIn(pxCurrentTCB, uxTopReadyPriority)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_PRIORITY_INHERIT_DISABLE))\n #define traceTASK_PRIORITY_INHERIT(px,ux) EvrFreeRTOSTasks_TaskPriorityInherit(px,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_PRIORITY_DISINHERIT_DISABLE))\n #define traceTASK_PRIORITY_DISINHERIT(px,ux) EvrFreeRTOSTasks_TaskPriorityDisinherit(px,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceMOVED_TASK_TO_READY_STATE_DISABLE))\n #define traceMOVED_TASK_TO_READY_STATE(px) EvrFreeRTOSTasks_MovedTaskToReadyState(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(tracePOST_MOVED_TASK_TO_READY_STATE_DISABLE))\n #define tracePOST_MOVED_TASK_TO_READY_STATE(px) EvrFreeRTOSTasks_PostMovedTaskToReadyState(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceLOW_POWER_IDLE_BEGIN_DISABLE))\n #define traceLOW_POWER_IDLE_BEGIN() EvrFreeRTOSTasks_LowPowerIdleBegin(xExpectedIdleTime)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceLOW_POWER_IDLE_END_DISABLE))\n #define traceLOW_POWER_IDLE_END() EvrFreeRTOSTasks_LowPowerIdleEnd()\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_NOTIFY_TAKE_BLOCK_DISABLE))\n #define traceTASK_NOTIFY_TAKE_BLOCK() EvrFreeRTOSTasks_TaskNotifyTakeBlock(xTicksToWait)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_NOTIFY_TAKE_DISABLE))\n #define traceTASK_NOTIFY_TAKE() EvrFreeRTOSTasks_TaskNotifyTake(pxCurrentTCB->ulNotifiedValue)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_NOTIFY_WAIT_BLOCK_DISABLE))\n #define traceTASK_NOTIFY_WAIT_BLOCK() EvrFreeRTOSTasks_TaskNotifyWaitBlock(xTicksToWait)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_NOTIFY_WAIT_DISABLE))\n #define traceTASK_NOTIFY_WAIT() EvrFreeRTOSTasks_TaskNotifyWait(pxCurrentTCB->ulNotifiedValue)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_NOTIFY_DISABLE))\n #define traceTASK_NOTIFY() EvrFreeRTOSTasks_TaskNotify(pxTCB, ulValue, eAction, pxTCB->ulNotifiedValue)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_NOTIFY_FROM_ISR_DISABLE))\n #define traceTASK_NOTIFY_FROM_ISR() EvrFreeRTOSTasks_TaskNotifyFromIsr(pxTCB, ulValue, eAction, pxTCB->ulNotifiedValue)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTASK_NOTIFY_GIVE_FROM_ISR_DISABLE))\n #define traceTASK_NOTIFY_GIVE_FROM_ISR() EvrFreeRTOSTasks_TaskNotifyGiveFromIsr(pxTCB, pxTCB->ulNotifiedValue)\n#endif\n\n\n/* Queue */\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_CREATE_DISABLE))\n #define traceQUEUE_CREATE(px) EvrFreeRTOSQueue_QueueCreate(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_CREATE_FAILED_DISABLE))\n #define traceQUEUE_CREATE_FAILED(uc) EvrFreeRTOSQueue_QueueCreateFailed(uc)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceCREATE_MUTEX_DISABLE))\n #define traceCREATE_MUTEX(px) EvrFreeRTOSQueue_CreateMutex(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceCREATE_MUTEX_FAILED_DISABLE))\n #define traceCREATE_MUTEX_FAILED() EvrFreeRTOSQueue_CreateMutexFailed()\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceGIVE_MUTEX_RECURSIVE_DISABLE))\n #define traceGIVE_MUTEX_RECURSIVE(px) EvrFreeRTOSQueue_GiveMutexRecursive(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceGIVE_MUTEX_RECURSIVE_FAILED_DISABLE))\n #define traceGIVE_MUTEX_RECURSIVE_FAILED(px) EvrFreeRTOSQueue_GiveMutexRecursiveFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTAKE_MUTEX_RECURSIVE_DISABLE))\n #define traceTAKE_MUTEX_RECURSIVE(px) EvrFreeRTOSQueue_TakeMutexRecursive(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTAKE_MUTEX_RECURSIVE_FAILED_DISABLE))\n #define traceTAKE_MUTEX_RECURSIVE_FAILED(px) EvrFreeRTOSQueue_TakeMutexRecursiveFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceCREATE_COUNTING_SEMAPHORE_DISABLE))\n #define traceCREATE_COUNTING_SEMAPHORE() EvrFreeRTOSQueue_CreateCountingSemaphore(xHandle)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceCREATE_COUNTING_SEMAPHORE_FAILED_DISABLE))\n #define traceCREATE_COUNTING_SEMAPHORE_FAILED() EvrFreeRTOSQueue_CreateCountingSemaphoreFailed()\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_SEND_DISABLE))\n #define traceQUEUE_SEND(px) EvrFreeRTOSQueue_QueueSend(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_SEND_FAILED_DISABLE))\n #define traceQUEUE_SEND_FAILED(px) EvrFreeRTOSQueue_QueueSendFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_RECEIVE_DISABLE))\n #define traceQUEUE_RECEIVE(px) EvrFreeRTOSQueue_QueueReceive(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_PEEK_DISABLE))\n #define traceQUEUE_PEEK(px) EvrFreeRTOSQueue_QueuePeek(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_PEEK_DISABLE))\n #define traceQUEUE_PEEK_FAILED(px) EvrFreeRTOSQueue_QueuePeekFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_PEEK_FROM_ISR_DISABLE))\n #define traceQUEUE_PEEK_FROM_ISR(px) EvrFreeRTOSQueue_QueuePeekFromIsr(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_RECEIVE_FAILED_DISABLE))\n #define traceQUEUE_RECEIVE_FAILED(px) EvrFreeRTOSQueue_QueueReceiveFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_SEND_FROM_ISR_DISABLE))\n #define traceQUEUE_SEND_FROM_ISR(px) EvrFreeRTOSQueue_QueueSendFromIsr(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_SEND_FROM_ISR_FAILED_DISABLE))\n #define traceQUEUE_SEND_FROM_ISR_FAILED(px) EvrFreeRTOSQueue_QueueSendFromIsrFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_RECEIVE_FROM_ISR_DISABLE))\n #define traceQUEUE_RECEIVE_FROM_ISR(px) EvrFreeRTOSQueue_QueueReceiveFromIsr(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_RECEIVE_FROM_ISR_FAILED_DISABLE))\n #define traceQUEUE_RECEIVE_FROM_ISR_FAILED(px) EvrFreeRTOSQueue_QueueReceiveFromIsrFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_PEEK_FROM_ISR_FAILED_DISABLE))\n #define traceQUEUE_PEEK_FROM_ISR_FAILED(px) EvrFreeRTOSQueue_QueuePeekFromIsrFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_DELETE_DISABLE))\n #define traceQUEUE_DELETE(px) EvrFreeRTOSQueue_QueueDelete(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceQUEUE_REGISTRY_ADD_DISABLE))\n #define traceQUEUE_REGISTRY_ADD(px,pc) EvrFreeRTOSQueue_QueueRegistryAdd(px,pc)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceBLOCKING_ON_QUEUE_RECEIVE_DISABLE))\n #define traceBLOCKING_ON_QUEUE_RECEIVE(px) EvrFreeRTOSQueue_BlockingOnQueueReceive(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceBLOCKING_ON_QUEUE_SEND_DISABLE))\n #define traceBLOCKING_ON_QUEUE_SEND(px) EvrFreeRTOSQueue_BlockingOnQueueSend(px)\n#endif\n\n\n/* Timers */\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTIMER_CREATE_DISABLE))\n #define traceTIMER_CREATE(px) EvrFreeRTOSTimers_TimerCreate(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTIMER_CREATE_FAILED_DISABLE))\n #define traceTIMER_CREATE_FAILED() EvrFreeRTOSTimers_TimerCreateFailed()\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTIMER_COMMAND_SEND_DISABLE))\n #define traceTIMER_COMMAND_SEND(pxT,xC,xO,xR) EvrFreeRTOSTimers_TimerCommandSend(pxT,xC,xO,xR)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTIMER_COMMAND_RECEIVED_DISABLE))\n #define traceTIMER_COMMAND_RECEIVED(px,xC,xO) EvrFreeRTOSTimers_TimerCommandReceived(px,xC,xO)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceTIMER_EXPIRED_DISABLE))\n #define traceTIMER_EXPIRED(px) EvrFreeRTOSTimers_TimerExpired(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(tracePEND_FUNC_CALL_DISABLE))\n #define tracePEND_FUNC_CALL(px,pv,ul,x) EvrFreeRTOSTimers_PendFuncCall(px,pv,ul,x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(tracePEND_FUNC_CALL_FROM_ISR_DISABLE))\n #define tracePEND_FUNC_CALL_FROM_ISR(px,pv,ul,x) EvrFreeRTOSTimers_PendFuncCallFromIsr(px,pv,ul,x)\n#endif\n\n\n/* Event Groups */\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_CREATE_DISABLE))\n #define traceEVENT_GROUP_CREATE(px) EvrFreeRTOSEventGroups_EventGroupCreate(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_CREATE_FAILED_DISABLE))\n #define traceEVENT_GROUP_CREATE_FAILED() EvrFreeRTOSEventGroups_EventGroupCreateFailed()\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_SYNC_BLOCK_DISABLE))\n #define traceEVENT_GROUP_SYNC_BLOCK(px,uxS,uxW) EvrFreeRTOSEventGroups_EventGroupSyncBlock(px,uxS,uxW)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_SYNC_END_DISABLE))\n #define traceEVENT_GROUP_SYNC_END(px,uxS,uxW,x) EvrFreeRTOSEventGroups_EventGroupSyncEnd(px,uxS,uxW,x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_WAIT_BITS_BLOCK_DISABLE))\n #define traceEVENT_GROUP_WAIT_BITS_BLOCK(px,ux) EvrFreeRTOSEventGroups_EventGroupWaitBitsBlock(px,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_WAIT_BITS_END_DISABLE))\n #define traceEVENT_GROUP_WAIT_BITS_END(px,ux,x) EvrFreeRTOSEventGroups_EventGroupWaitBitsEnd(px,ux,x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_CLEAR_BITS_DISABLE))\n #define traceEVENT_GROUP_CLEAR_BITS(px,ux) EvrFreeRTOSEventGroups_EventGroupClearBits(px,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_CLEAR_BITS_FROM_ISR_DISABLE))\n #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR(px,ux) EvrFreeRTOSEventGroups_EventGroupClearBitsFromIsr(px,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_SET_BITS_DISABLE))\n #define traceEVENT_GROUP_SET_BITS(px,ux) EvrFreeRTOSEventGroups_EventGroupSetBits(px,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_SET_BITS_FROM_ISR_DISABLE))\n #define traceEVENT_GROUP_SET_BITS_FROM_ISR(px,ux) EvrFreeRTOSEventGroups_EventGroupSetBitsFromIsr(px,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceEVENT_GROUP_DELETE_DISABLE))\n #define traceEVENT_GROUP_DELETE(px) EvrFreeRTOSEventGroups_EventGroupDelete(px)\n#endif\n\n\n/* Stream Buffer */\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_CREATE_FAILED_DISABLE))\n #define traceSTREAM_BUFFER_CREATE_FAILED(ux) EvrFreeRTOSStreamBuf_StreamBufferCreateFailed(ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_CREATE_STATIC_FAILED_DISABLE))\n #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED(x,ux) EvrFreeRTOSStreamBuf_StreamBufferCreateStaticFailed(x,ux)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_CREATE_DISABLE))\n #define traceSTREAM_BUFFER_CREATE(px,x) EvrFreeRTOSStreamBuf_StreamBufferCreate(px,x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_DELETE_DISABLE))\n #define traceSTREAM_BUFFER_DELETE(px) EvrFreeRTOSStreamBuf_StreamBufferDelete(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_RESET_DISABLE))\n #define traceSTREAM_BUFFER_RESET(px) EvrFreeRTOSStreamBuf_StreamBufferReset(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceBLOCKING_ON_STREAM_BUFFER_SEND_DISABLE))\n #define traceBLOCKING_ON_STREAM_BUFFER_SEND(px) EvrFreeRTOSStreamBuf_StreamBufferBlockingOnSend(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_SEND_DISABLE))\n #define traceSTREAM_BUFFER_SEND(px,x) EvrFreeRTOSStreamBuf_StreamBufferSend(px,x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_SEND_FAILED_DISABLE))\n #define traceSTREAM_BUFFER_SEND_FAILED(px) EvrFreeRTOSStreamBuf_StreamBufferSendFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_SEND_FROM_ISR_DISABLE))\n #define traceSTREAM_BUFFER_SEND_FROM_ISR(px,x) EvrFreeRTOSStreamBuf_StreamBufferSendFromIsr(px,x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceBLOCKING_ON_STREAM_BUFFER_RECEIVE_DISABLE))\n #define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE(px) EvrFreeRTOSStreamBuf_StreamBufferBlockingOnReceive(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_RECEIVE_DISABLE))\n #define traceSTREAM_BUFFER_RECEIVE(px,x) EvrFreeRTOSStreamBuf_StreamBufferReceive(px,x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_RECEIVE_FAILED_DISABLE))\n #define traceSTREAM_BUFFER_RECEIVE_FAILED(px) EvrFreeRTOSStreamBuf_StreamBufferReceiveFailed(px)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceSTREAM_BUFFER_RECEIVE_FROM_ISR_DISABLE))\n #define traceSTREAM_BUFFER_RECEIVE_FROM_ISR(px,x) EvrFreeRTOSStreamBuf_StreamBufferReceiveFromIsr(px,x)\n#endif\n\n\n/* Heap */\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceMALLOC_DISABLE))\n #define traceMALLOC(pv,x) EvrFreeRTOSHeap_Malloc(pv,x)\n#endif\n\n#if (!defined(EVR_FREERTOS_DISABLE) && !defined(traceFREE_DISABLE))\n #define traceFREE(pv,x) EvrFreeRTOSHeap_Free(pv,x)\n#endif\n\n\n/* Undefine FreeRTOS object types */\n#undef TCB_t\n#undef Queue_t\n#undef Timer_t\n#undef PendedFunction_t\n#undef EventGroup_t\n#undef StreamBuffer_t\n\n#endif /* FREERTOS_EVR_H_ */\n" }, { "path": "include/rtos/freertos/freertos_list.h", "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n/*\n * This is the list implementation used by the scheduler. While it is tailored\n * heavily for the schedulers needs, it is also available for use by\n * application code.\n *\n * list_ts can only store pointers to list_item_ts. Each ListItem_t contains a\n * numeric value (xItemValue). Most of the time the lists are sorted in\n * descending item value order.\n *\n * Lists are created already containing one list item. The value of this\n * item is the maximum possible that can be stored, it is therefore always at\n * the end of the list and acts as a marker. The list member pxHead always\n * points to this marker - even though it is at the tail of the list. This\n * is because the tail contains a wrap back pointer to the true head of\n * the list.\n *\n * In addition to it's value, each list item contains a pointer to the next\n * item in the list (pxNext), a pointer to the list it is in (pxContainer)\n * and a pointer to back to the object that contains it. These later two\n * pointers are included for efficiency of list manipulation. There is\n * effectively a two way link between the object containing the list item and\n * the list item itself.\n *\n *\n * \\page ListIntroduction List Implementation\n * \\ingroup FreeRTOSIntro\n */\n\n#ifndef INC_FREERTOS_H\n\t#error FreeRTOS.h must be included before list.h\n#endif\n\n#ifndef LIST_H\n#define LIST_H\n\n/*\n * The list structure members are modified from within interrupts, and therefore\n * by rights should be declared volatile. However, they are only modified in a\n * functionally atomic way (within critical sections of with the scheduler\n * suspended) and are either passed by reference into a function or indexed via\n * a volatile variable. Therefore, in all use cases tested so far, the volatile\n * qualifier can be omitted in order to provide a moderate performance\n * improvement without adversely affecting functional behaviour. The assembly\n * instructions generated by the IAR, ARM and GCC compilers when the respective\n * compiler's options were set for maximum optimisation has been inspected and\n * deemed to be as intended. That said, as compiler technology advances, and\n * especially if aggressive cross module optimisation is used (a use case that\n * has not been exercised to any great extend) then it is feasible that the\n * volatile qualifier will be needed for correct optimisation. It is expected\n * that a compiler removing essential code because, without the volatile\n * qualifier on the list structure members and with aggressive cross module\n * optimisation, the compiler deemed the code unnecessary will result in\n * complete and obvious failure of the scheduler. If this is ever experienced\n * then the volatile qualifier can be inserted in the relevant places within the\n * list structures by simply defining configLIST_VOLATILE to volatile in\n * FreeRTOSConfig.h (as per the example at the bottom of this comment block).\n * If configLIST_VOLATILE is not defined then the preprocessor directives below\n * will simply #define configLIST_VOLATILE away completely.\n *\n * To use volatile list structure members then add the following line to\n * FreeRTOSConfig.h (without the quotes):\n * \"#define configLIST_VOLATILE volatile\"\n */\n#ifndef configLIST_VOLATILE\n\t#define configLIST_VOLATILE\n#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/* Macros that can be used to place known values within the list structures,\nthen check that the known values do not get corrupted during the execution of\nthe application. These may catch the list data structures being overwritten in\nmemory. They will not catch data errors caused by incorrect configuration or\nuse of FreeRTOS.*/\n#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )\n\t/* Define the macros to do nothing. */\n\t#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE\n\t#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE\n\t#define listFIRST_LIST_INTEGRITY_CHECK_VALUE\n\t#define listSECOND_LIST_INTEGRITY_CHECK_VALUE\n\t#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )\n\t#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )\n\t#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )\n\t#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )\n\t#define listTEST_LIST_ITEM_INTEGRITY( pxItem )\n\t#define listTEST_LIST_INTEGRITY( pxList )\n#else\n\t/* Define macros that add new members into the list structures. */\n\t#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE\t\t\t\tTickType_t xListItemIntegrityValue1;\n\t#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE\t\t\t\tTickType_t xListItemIntegrityValue2;\n\t#define listFIRST_LIST_INTEGRITY_CHECK_VALUE\t\t\t\t\tTickType_t xListIntegrityValue1;\n\t#define listSECOND_LIST_INTEGRITY_CHECK_VALUE\t\t\t\t\tTickType_t xListIntegrityValue2;\n\n\t/* Define macros that set the new structure members to known values. */\n\t#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )\t\t( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE\n\t#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )\t( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE\n\t#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )\t\t( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE\n\t#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )\t\t( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE\n\n\t/* Define macros that will assert if one of the structure members does not\n\tcontain its expected value. */\n\t#define listTEST_LIST_ITEM_INTEGRITY( pxItem )\t\tconfigASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )\n\t#define listTEST_LIST_INTEGRITY( pxList )\t\t\tconfigASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )\n#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */\n\n\n/*\n * Definition of the only type of object that a list can contain.\n */\nstruct xLIST;\nstruct xLIST_ITEM\n{\n\tlistFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE\t\t\t/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */\n\tconfigLIST_VOLATILE TickType_t xItemValue;\t\t\t/*< The value being listed. In most cases this is used to sort the list in descending order. */\n\tstruct xLIST_ITEM * configLIST_VOLATILE pxNext;\t\t/*< Pointer to the next ListItem_t in the list. */\n\tstruct xLIST_ITEM * configLIST_VOLATILE pxPrevious;\t/*< Pointer to the previous ListItem_t in the list. */\n\tvoid * pvOwner;\t\t\t\t\t\t\t\t\t\t/*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */\n\tstruct xLIST * configLIST_VOLATILE pxContainer;\t\t/*< Pointer to the list in which this list item is placed (if any). */\n\tlistSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE\t\t\t/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */\n};\ntypedef struct xLIST_ITEM ListItem_t;\t\t\t\t\t/* For some reason lint wants this as two separate definitions. */\n\nstruct xMINI_LIST_ITEM\n{\n\tlistFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE\t\t\t/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */\n\tconfigLIST_VOLATILE TickType_t xItemValue;\n\tstruct xLIST_ITEM * configLIST_VOLATILE pxNext;\n\tstruct xLIST_ITEM * configLIST_VOLATILE pxPrevious;\n};\ntypedef struct xMINI_LIST_ITEM MiniListItem_t;\n\n/*\n * Definition of the type of queue used by the scheduler.\n */\ntypedef struct xLIST\n{\n\tlistFIRST_LIST_INTEGRITY_CHECK_VALUE\t\t\t\t/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */\n\tvolatile UBaseType_t uxNumberOfItems;\n\tListItem_t * configLIST_VOLATILE pxIndex;\t\t\t/*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */\n\tMiniListItem_t xListEnd;\t\t\t\t\t\t\t/*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */\n\tlistSECOND_LIST_INTEGRITY_CHECK_VALUE\t\t\t\t/*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */\n} List_t;\n\n/*\n * Access macro to set the owner of a list item. The owner of a list item\n * is the object (usually a TCB) that contains the list item.\n *\n * \\page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER\n * \\ingroup LinkedList\n */\n#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner )\t\t( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) )\n\n/*\n * Access macro to get the owner of a list item. The owner of a list item\n * is the object (usually a TCB) that contains the list item.\n *\n * \\page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER\n * \\ingroup LinkedList\n */\n#define listGET_LIST_ITEM_OWNER( pxListItem )\t( ( pxListItem )->pvOwner )\n\n/*\n * Access macro to set the value of the list item. In most cases the value is\n * used to sort the list in descending order.\n *\n * \\page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE\n * \\ingroup LinkedList\n */\n#define listSET_LIST_ITEM_VALUE( pxListItem, xValue )\t( ( pxListItem )->xItemValue = ( xValue ) )\n\n/*\n * Access macro to retrieve the value of the list item. The value can\n * represent anything - for example the priority of a task, or the time at\n * which a task should be unblocked.\n *\n * \\page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE\n * \\ingroup LinkedList\n */\n#define listGET_LIST_ITEM_VALUE( pxListItem )\t( ( pxListItem )->xItemValue )\n\n/*\n * Access macro to retrieve the value of the list item at the head of a given\n * list.\n *\n * \\page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE\n * \\ingroup LinkedList\n */\n#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList )\t( ( ( pxList )->xListEnd ).pxNext->xItemValue )\n\n/*\n * Return the list item at the head of the list.\n *\n * \\page listGET_HEAD_ENTRY listGET_HEAD_ENTRY\n * \\ingroup LinkedList\n */\n#define listGET_HEAD_ENTRY( pxList )\t( ( ( pxList )->xListEnd ).pxNext )\n\n/*\n * Return the list item at the head of the list.\n *\n * \\page listGET_NEXT listGET_NEXT\n * \\ingroup LinkedList\n */\n#define listGET_NEXT( pxListItem )\t( ( pxListItem )->pxNext )\n\n/*\n * Return the list item that marks the end of the list\n *\n * \\page listGET_END_MARKER listGET_END_MARKER\n * \\ingroup LinkedList\n */\n#define listGET_END_MARKER( pxList )\t( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )\n\n/*\n * Access macro to determine if a list contains any items. The macro will\n * only have the value true if the list is empty.\n *\n * \\page listLIST_IS_EMPTY listLIST_IS_EMPTY\n * \\ingroup LinkedList\n */\n#define listLIST_IS_EMPTY( pxList )\t( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )\n\n/*\n * Access macro to return the number of items in the list.\n */\n#define listCURRENT_LIST_LENGTH( pxList )\t( ( pxList )->uxNumberOfItems )\n\n/*\n * Access function to obtain the owner of the next entry in a list.\n *\n * The list member pxIndex is used to walk through a list. Calling\n * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list\n * and returns that entry's pxOwner parameter. Using multiple calls to this\n * function it is therefore possible to move through every item contained in\n * a list.\n *\n * The pxOwner parameter of a list item is a pointer to the object that owns\n * the list item. In the scheduler this is normally a task control block.\n * The pxOwner parameter effectively creates a two way link between the list\n * item and its owner.\n *\n * @param pxTCB pxTCB is set to the address of the owner of the next list item.\n * @param pxList The list from which the next item owner is to be returned.\n *\n * \\page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY\n * \\ingroup LinkedList\n */\n#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList )\t\t\t\t\t\t\t\t\t\t\\\n{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\nList_t * const pxConstList = ( pxList );\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t/* Increment the index to the next item and return the item, ensuring */\t\t\t\t\\\n\t/* we don't return the marker used at the end of the list. */\t\t\t\t\t\t\t\\\n\t( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;\t\t\t\t\t\t\t\\\n\tif( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) )\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext;\t\t\t\t\t\t\\\n\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t( pxTCB ) = ( pxConstList )->pxIndex->pvOwner;\t\t\t\t\t\t\t\t\t\t\t\\\n}\n\n\n/*\n * Access function to obtain the owner of the first entry in a list. Lists\n * are normally sorted in ascending item value order.\n *\n * This function returns the pxOwner member of the first item in the list.\n * The pxOwner parameter of a list item is a pointer to the object that owns\n * the list item. In the scheduler this is normally a task control block.\n * The pxOwner parameter effectively creates a two way link between the list\n * item and its owner.\n *\n * @param pxList The list from which the owner of the head item is to be\n * returned.\n *\n * \\page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY\n * \\ingroup LinkedList\n */\n#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner )\n\n/*\n * Check to see if a list item is within a list. The list item maintains a\n * \"container\" pointer that points to the list it is in. All this macro does\n * is check to see if the container and the list match.\n *\n * @param pxList The list we want to know if the list item is within.\n * @param pxListItem The list item we want to know if is in the list.\n * @return pdTRUE if the list item is in the list, otherwise pdFALSE.\n */\n#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )\n\n/*\n * Return the list a list item is contained within (referenced from).\n *\n * @param pxListItem The list item being queried.\n * @return A pointer to the List_t object that references the pxListItem\n */\n#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer )\n\n/*\n * This provides a crude means of knowing if a list has been initialised, as\n * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise()\n * function.\n */\n#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY )\n\n/*\n * Must be called before a list is used! This initialises all the members\n * of the list structure and inserts the xListEnd item into the list as a\n * marker to the back of the list.\n *\n * @param pxList Pointer to the list being initialised.\n *\n * \\page vListInitialise vListInitialise\n * \\ingroup LinkedList\n */\nvoid vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION;\n\n/*\n * Must be called before a list item is used. This sets the list container to\n * null so the item does not think that it is already contained in a list.\n *\n * @param pxItem Pointer to the list item being initialised.\n *\n * \\page vListInitialiseItem vListInitialiseItem\n * \\ingroup LinkedList\n */\nvoid vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;\n\n/*\n * Insert a list item into a list. The item will be inserted into the list in\n * a position determined by its item value (descending item value order).\n *\n * @param pxList The list into which the item is to be inserted.\n *\n * @param pxNewListItem The item that is to be placed in the list.\n *\n * \\page vListInsert vListInsert\n * \\ingroup LinkedList\n */\nvoid vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;\n\n/*\n * Insert a list item into a list. The item will be inserted in a position\n * such that it will be the last item within the list returned by multiple\n * calls to listGET_OWNER_OF_NEXT_ENTRY.\n *\n * The list member pxIndex is used to walk through a list. Calling\n * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list.\n * Placing an item in a list using vListInsertEnd effectively places the item\n * in the list position pointed to by pxIndex. This means that every other\n * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before\n * the pxIndex parameter again points to the item being inserted.\n *\n * @param pxList The list into which the item is to be inserted.\n *\n * @param pxNewListItem The list item to be inserted into the list.\n *\n * \\page vListInsertEnd vListInsertEnd\n * \\ingroup LinkedList\n */\nvoid vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;\n\n/*\n * Remove an item from a list. The list item has a pointer to the list that\n * it is in, so only the list item need be passed into the function.\n *\n * @param uxListRemove The item to be removed. The item will remove itself from\n * the list pointed to by it's pxContainer parameter.\n *\n * @return The number of items that remain in the list after the list item has\n * been removed.\n *\n * \\page uxListRemove uxListRemove\n * \\ingroup LinkedList\n */\nUBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n" }, { "path": "include/rtos/freertos/message_buffer.h", "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n\n/*\n * Message buffers build functionality on top of FreeRTOS stream buffers.\n * Whereas stream buffers are used to send a continuous stream of data from one\n * task or interrupt to another, message buffers are used to send variable\n * length discrete messages from one task or interrupt to another. Their\n * implementation is light weight, making them particularly suited for interrupt\n * to task and core to core communication scenarios.\n *\n * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader). It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers. If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xMessageBufferSend()) inside a critical section and set the send\n * block time to 0. Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xMessageBufferRead()) inside a critical section and set the receive\n * timeout to 0.\n *\n * Message buffers hold variable length messages. To enable that, when a\n * message is written to the message buffer an additional sizeof( size_t ) bytes\n * are also written to store the message's length (that happens internally, with\n * the API function). sizeof( size_t ) is typically 4 bytes on a 32-bit\n * architecture, so writing a 10 byte message to a message buffer on a 32-bit\n * architecture will actually reduce the available space in the message buffer\n * by 14 bytes (10 byte are used by the message, and 4 bytes to hold the length\n * of the message).\n */\n\n#ifndef FREERTOS_MESSAGE_BUFFER_H\n#define FREERTOS_MESSAGE_BUFFER_H\n\n/* Message buffers are built onto of stream buffers. */\n#include \"stream_buffer.h\"\n\n#if defined( __cplusplus )\nextern \"C\" {\n#endif\n\n/**\n * Type by which message buffers are referenced. For example, a call to\n * xMessageBufferCreate() returns an MessageBufferHandle_t variable that can\n * then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(),\n * etc.\n */\ntypedef void * MessageBufferHandle_t;\n\n/*-----------------------------------------------------------*/\n\n/**\n * message_buffer.h\n *\n
\nMessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );\n
\n *\n * Creates a new message buffer using dynamically allocated memory. See\n * xMessageBufferCreateStatic() for a version that uses statically allocated\n * memory (memory that is allocated at compile time).\n *\n * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in\n * FreeRTOSConfig.h for xMessageBufferCreate() to be available.\n *\n * @param xBufferSizeBytes The total number of bytes (not messages) the message\n * buffer will be able to hold at any one time. When a message is written to\n * the message buffer an additional sizeof( size_t ) bytes are also written to\n * store the message's length. sizeof( size_t ) is typically 4 bytes on a\n * 32-bit architecture, so on most 32-bit architectures a 10 byte message will\n * take up 14 bytes of message buffer space.\n *\n * @return If NULL is returned, then the message buffer cannot be created\n * because there is insufficient heap memory available for FreeRTOS to allocate\n * the message buffer data structures and storage area. A non-NULL value being\n * returned indicates that the message buffer has been created successfully -\n * the returned value should be stored as the handle to the created message\n * buffer.\n *\n * Example use:\n
\n\nvoid vAFunction( void )\n{\nMessageBufferHandle_t xMessageBuffer;\nconst size_t xMessageBufferSizeBytes = 100;\n\n    // Create a message buffer that can hold 100 bytes.  The memory used to hold\n    // both the message buffer structure and the messages themselves is allocated\n    // dynamically.  Each message added to the buffer consumes an additional 4\n    // bytes which are used to hold the lengh of the message.\n    xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );\n\n    if( xMessageBuffer == NULL )\n    {\n        // There was not enough heap memory space available to create the\n        // message buffer.\n    }\n    else\n    {\n        // The message buffer was created successfully and can now be used.\n    }\n\n
\n * \\defgroup xMessageBufferCreate xMessageBufferCreate\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferCreate( xBufferSizeBytes ) ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )\n\n/**\n * message_buffer.h\n *\n
\nMessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,\n                                                  uint8_t *pucMessageBufferStorageArea,\n                                                  StaticMessageBuffer_t *pxStaticMessageBuffer );\n
\n * Creates a new message buffer using statically allocated memory. See\n * xMessageBufferCreate() for a version that uses dynamically allocated memory.\n *\n * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the\n * pucMessageBufferStorageArea parameter. When a message is written to the\n * message buffer an additional sizeof( size_t ) bytes are also written to store\n * the message's length. sizeof( size_t ) is typically 4 bytes on a 32-bit\n * architecture, so on most 32-bit architecture a 10 byte message will take up\n * 14 bytes of message buffer space. The maximum number of bytes that can be\n * stored in the message buffer is actually (xBufferSizeBytes - 1).\n *\n * @param pucMessageBufferStorageArea Must point to a uint8_t array that is at\n * least xBufferSizeBytes + 1 big. This is the array to which messages are\n * copied when they are written to the message buffer.\n *\n * @param pxStaticMessageBuffer Must point to a variable of type\n * StaticMessageBuffer_t, which will be used to hold the message buffer's data\n * structure.\n *\n * @return If the message buffer is created successfully then a handle to the\n * created message buffer is returned. If either pucMessageBufferStorageArea or\n * pxStaticmessageBuffer are NULL then NULL is returned.\n *\n * Example use:\n
\n\n// Used to dimension the array used to hold the messages.  The available space\n// will actually be one less than this, so 999.\n#define STORAGE_SIZE_BYTES 1000\n\n// Defines the memory that will actually hold the messages within the message\n// buffer.\nstatic uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];\n\n// The variable used to hold the message buffer structure.\nStaticMessageBuffer_t xMessageBufferStruct;\n\nvoid MyFunction( void )\n{\nMessageBufferHandle_t xMessageBuffer;\n\n    xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),\n                                                 ucBufferStorage,\n                                                 &xMessageBufferStruct );\n\n    // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer\n    // parameters were NULL, xMessageBuffer will not be NULL, and can be used to\n    // reference the created message buffer in other message buffer API calls.\n\n    // Other code that uses the message buffer can go here.\n}\n\n
\n * \\defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )\n\n/**\n * message_buffer.h\n *\n
\nsize_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,\n                           const void *pvTxData,\n                           size_t xDataLengthBytes,\n                           TickType_t xTicksToWait );\n
\n *\n * Sends a discrete message to the message buffer.  The message can be any\n * length that fits within the buffer's free space, and is copied into the\n * buffer.\n *\n * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader).  It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers.  If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xMessageBufferSend()) inside a critical section and set the send\n * block time to 0.  Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xMessageBufferRead()) inside a critical section and set the receive\n * block time to 0.\n *\n * Use xMessageBufferSend() to write to a message buffer from a task.  Use\n * xMessageBufferSendFromISR() to write to a message buffer from an interrupt\n * service routine (ISR).\n *\n * @param xMessageBuffer The handle of the message buffer to which a message is\n * being sent.\n *\n * @param pvTxData A pointer to the message that is to be copied into the\n * message buffer.\n *\n * @param xDataLengthBytes The length of the message.  That is, the number of\n * bytes to copy from pvTxData into the message buffer.  When a message is\n * written to the message buffer an additional sizeof( size_t ) bytes are also\n * written to store the message's length.  sizeof( size_t ) is typically 4 bytes\n * on a 32-bit architecture, so on most 32-bit architecture setting\n * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24\n * bytes (20 bytes of message data and 4 bytes to hold the message length).\n *\n * @param xTicksToWait The maximum amount of time the calling task should remain\n * in the Blocked state to wait for enough space to become available in the\n * message buffer, should the message buffer have insufficient space when\n * xMessageBufferSend() is called.  The calling task will never block if\n * xTicksToWait is zero.  The block time is specified in tick periods, so the\n * absolute time it represents is dependent on the tick frequency.  The macro\n * pdMS_TO_TICKS() can be used to convert a time specified in milliseconds into\n * a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will cause\n * the task to wait indefinitely (without timing out), provided\n * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any\n * CPU time when they are in the Blocked state.\n *\n * @return The number of bytes written to the message buffer.  If the call to\n * xMessageBufferSend() times out before there was enough space to write the\n * message into the message buffer then zero is returned.  If the call did not\n * time out then xDataLengthBytes is returned.\n *\n * Example use:\n
\nvoid vAFunction( MessageBufferHandle_t xMessageBuffer )\n{\nsize_t xBytesSent;\nuint8_t ucArrayToSend[] = { 0, 1, 2, 3 };\nchar *pcStringToSend = \"String to send\";\nconst TickType_t x100ms = pdMS_TO_TICKS( 100 );\n\n    // Send an array to the message buffer, blocking for a maximum of 100ms to\n    // wait for enough space to be available in the message buffer.\n    xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );\n\n    if( xBytesSent != sizeof( ucArrayToSend ) )\n    {\n        // The call to xMessageBufferSend() times out before there was enough\n        // space in the buffer for the data to be written.\n    }\n\n    // Send the string to the message buffer.  Return immediately if there is\n    // not enough space in the buffer.\n    xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );\n\n    if( xBytesSent != strlen( pcStringToSend ) )\n    {\n        // The string could not be added to the message buffer because there was\n        // not enough free space in the buffer.\n    }\n}\n
\n * \\defgroup xMessageBufferSend xMessageBufferSend\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )\n\n/**\n * message_buffer.h\n *\n
\nsize_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,\n                                  const void *pvTxData,\n                                  size_t xDataLengthBytes,\n                                  BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * Interrupt safe version of the API function that sends a discrete message to\n * the message buffer.  The message can be any length that fits within the\n * buffer's free space, and is copied into the buffer.\n *\n * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader).  It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers.  If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xMessageBufferSend()) inside a critical section and set the send\n * block time to 0.  Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xMessageBufferRead()) inside a critical section and set the receive\n * block time to 0.\n *\n * Use xMessageBufferSend() to write to a message buffer from a task.  Use\n * xMessageBufferSendFromISR() to write to a message buffer from an interrupt\n * service routine (ISR).\n *\n * @param xMessageBuffer The handle of the message buffer to which a message is\n * being sent.\n *\n * @param pvTxData A pointer to the message that is to be copied into the\n * message buffer.\n *\n * @param xDataLengthBytes The length of the message.  That is, the number of\n * bytes to copy from pvTxData into the message buffer.  When a message is\n * written to the message buffer an additional sizeof( size_t ) bytes are also\n * written to store the message's length.  sizeof( size_t ) is typically 4 bytes\n * on a 32-bit architecture, so on most 32-bit architecture setting\n * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24\n * bytes (20 bytes of message data and 4 bytes to hold the message length).\n *\n * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will\n * have a task blocked on it waiting for data.  Calling\n * xMessageBufferSendFromISR() can make data available, and so cause a task that\n * was waiting for data to leave the Blocked state.  If calling\n * xMessageBufferSendFromISR() causes a task to leave the Blocked state, and the\n * unblocked task has a priority higher than the currently executing task (the\n * task that was interrupted), then, internally, xMessageBufferSendFromISR()\n * will set *pxHigherPriorityTaskWoken to pdTRUE.  If\n * xMessageBufferSendFromISR() sets this value to pdTRUE, then normally a\n * context switch should be performed before the interrupt is exited.  This will\n * ensure that the interrupt returns directly to the highest priority Ready\n * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it\n * is passed into the function.  See the code example below for an example.\n *\n * @return The number of bytes actually written to the message buffer.  If the\n * message buffer didn't have enough free space for the message to be stored\n * then 0 is returned, otherwise xDataLengthBytes is returned.\n *\n * Example use:\n
\n// A message buffer that has already been created.\nMessageBufferHandle_t xMessageBuffer;\n\nvoid vAnInterruptServiceRoutine( void )\n{\nsize_t xBytesSent;\nchar *pcStringToSend = \"String to send\";\nBaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.\n\n    // Attempt to send the string to the message buffer.\n    xBytesSent = xMessageBufferSendFromISR( xMessageBuffer,\n                                            ( void * ) pcStringToSend,\n                                            strlen( pcStringToSend ),\n                                            &xHigherPriorityTaskWoken );\n\n    if( xBytesSent != strlen( pcStringToSend ) )\n    {\n        // The string could not be added to the message buffer because there was\n        // not enough free space in the buffer.\n    }\n\n    // If xHigherPriorityTaskWoken was set to pdTRUE inside\n    // xMessageBufferSendFromISR() then a task that has a priority above the\n    // priority of the currently executing task was unblocked and a context\n    // switch should be performed to ensure the ISR returns to the unblocked\n    // task.  In most FreeRTOS ports this is done by simply passing\n    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the\n    // variables value, and perform the context switch if necessary.  Check the\n    // documentation for the port in use for port specific instructions.\n    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );\n}\n
\n * \\defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )\n\n/**\n * message_buffer.h\n *\n
\nsize_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,\n                              void *pvRxData,\n                              size_t xBufferLengthBytes,\n                              TickType_t xTicksToWait );\n
\n *\n * Receives a discrete message from a message buffer.  Messages can be of\n * variable length and are copied out of the buffer.\n *\n * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader).  It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers.  If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xMessageBufferSend()) inside a critical section and set the send\n * block time to 0.  Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xMessageBufferRead()) inside a critical section and set the receive\n * block time to 0.\n *\n * Use xMessageBufferReceive() to read from a message buffer from a task.  Use\n * xMessageBufferReceiveFromISR() to read from a message buffer from an\n * interrupt service routine (ISR).\n *\n * @param xMessageBuffer The handle of the message buffer from which a message\n * is being received.\n *\n * @param pvRxData A pointer to the buffer into which the received message is\n * to be copied.\n *\n * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData\n * parameter.  This sets the maximum length of the message that can be received.\n * If xBufferLengthBytes is too small to hold the next message then the message\n * will be left in the message buffer and 0 will be returned.\n *\n * @param xTicksToWait The maximum amount of time the task should remain in the\n * Blocked state to wait for a message, should the message buffer be empty.\n * xMessageBufferReceive() will return immediately if xTicksToWait is zero and\n * the message buffer is empty.  The block time is specified in tick periods, so\n * the absolute time it represents is dependent on the tick frequency.  The\n * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds\n * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will\n * cause the task to wait indefinitely (without timing out), provided\n * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any\n * CPU time when they are in the Blocked state.\n *\n * @return The length, in bytes, of the message read from the message buffer, if\n * any.  If xMessageBufferReceive() times out before a message became available\n * then zero is returned.  If the length of the message is greater than\n * xBufferLengthBytes then the message will be left in the message buffer and\n * zero is returned.\n *\n * Example use:\n
\nvoid vAFunction( MessageBuffer_t xMessageBuffer )\n{\nuint8_t ucRxData[ 20 ];\nsize_t xReceivedBytes;\nconst TickType_t xBlockTime = pdMS_TO_TICKS( 20 );\n\n    // Receive the next message from the message buffer.  Wait in the Blocked\n    // state (so not using any CPU processing time) for a maximum of 100ms for\n    // a message to become available.\n    xReceivedBytes = xMessageBufferReceive( xMessageBuffer,\n                                            ( void * ) ucRxData,\n                                            sizeof( ucRxData ),\n                                            xBlockTime );\n\n    if( xReceivedBytes > 0 )\n    {\n        // A ucRxData contains a message that is xReceivedBytes long.  Process\n        // the message here....\n    }\n}\n
\n * \\defgroup xMessageBufferReceive xMessageBufferReceive\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )\n\n\n/**\n * message_buffer.h\n *\n
\nsize_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,\n                                     void *pvRxData,\n                                     size_t xBufferLengthBytes,\n                                     BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * An interrupt safe version of the API function that receives a discrete\n * message from a message buffer.  Messages can be of variable length and are\n * copied out of the buffer.\n *\n * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader).  It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers.  If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xMessageBufferSend()) inside a critical section and set the send\n * block time to 0.  Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xMessageBufferRead()) inside a critical section and set the receive\n * block time to 0.\n *\n * Use xMessageBufferReceive() to read from a message buffer from a task.  Use\n * xMessageBufferReceiveFromISR() to read from a message buffer from an\n * interrupt service routine (ISR).\n *\n * @param xMessageBuffer The handle of the message buffer from which a message\n * is being received.\n *\n * @param pvRxData A pointer to the buffer into which the received message is\n * to be copied.\n *\n * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData\n * parameter.  This sets the maximum length of the message that can be received.\n * If xBufferLengthBytes is too small to hold the next message then the message\n * will be left in the message buffer and 0 will be returned.\n *\n * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will\n * have a task blocked on it waiting for space to become available.  Calling\n * xMessageBufferReceiveFromISR() can make space available, and so cause a task\n * that is waiting for space to leave the Blocked state.  If calling\n * xMessageBufferReceiveFromISR() causes a task to leave the Blocked state, and\n * the unblocked task has a priority higher than the currently executing task\n * (the task that was interrupted), then, internally,\n * xMessageBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.\n * If xMessageBufferReceiveFromISR() sets this value to pdTRUE, then normally a\n * context switch should be performed before the interrupt is exited.  That will\n * ensure the interrupt returns directly to the highest priority Ready state\n * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is\n * passed into the function.  See the code example below for an example.\n *\n * @return The length, in bytes, of the message read from the message buffer, if\n * any.\n *\n * Example use:\n
\n// A message buffer that has already been created.\nMessageBuffer_t xMessageBuffer;\n\nvoid vAnInterruptServiceRoutine( void )\n{\nuint8_t ucRxData[ 20 ];\nsize_t xReceivedBytes;\nBaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.\n\n    // Receive the next message from the message buffer.\n    xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer,\n                                                  ( void * ) ucRxData,\n                                                  sizeof( ucRxData ),\n                                                  &xHigherPriorityTaskWoken );\n\n    if( xReceivedBytes > 0 )\n    {\n        // A ucRxData contains a message that is xReceivedBytes long.  Process\n        // the message here....\n    }\n\n    // If xHigherPriorityTaskWoken was set to pdTRUE inside\n    // xMessageBufferReceiveFromISR() then a task that has a priority above the\n    // priority of the currently executing task was unblocked and a context\n    // switch should be performed to ensure the ISR returns to the unblocked\n    // task.  In most FreeRTOS ports this is done by simply passing\n    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the\n    // variables value, and perform the context switch if necessary.  Check the\n    // documentation for the port in use for port specific instructions.\n    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );\n}\n
\n * \\defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )\n\n/**\n * message_buffer.h\n *\n
\nvoid vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );\n
\n *\n * Deletes a message buffer that was previously created using a call to\n * xMessageBufferCreate() or xMessageBufferCreateStatic().  If the message\n * buffer was created using dynamic memory (that is, by xMessageBufferCreate()),\n * then the allocated memory is freed.\n *\n * A message buffer handle must not be used after the message buffer has been\n * deleted.\n *\n * @param xMessageBuffer The handle of the message buffer to be deleted.\n *\n */\n#define vMessageBufferDelete( xMessageBuffer ) vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )\n\n/**\n * message_buffer.h\n
\nBaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );\n
\n *\n * Tests to see if a message buffer is full.  A message buffer is full if it\n * cannot accept any more messages, of any size, until space is made available\n * by a message being removed from the message buffer.\n *\n * @param xMessageBuffer The handle of the message buffer being queried.\n *\n * @return If the message buffer referenced by xMessageBuffer is full then\n * pdTRUE is returned.  Otherwise pdFALSE is returned.\n */\n#define xMessageBufferIsFull( xMessageBuffer ) xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )\n\n/**\n * message_buffer.h\n
\nBaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );\n
\n *\n * Tests to see if a message buffer is empty (does not contain any messages).\n *\n * @param xMessageBuffer The handle of the message buffer being queried.\n *\n * @return If the message buffer referenced by xMessageBuffer is empty then\n * pdTRUE is returned.  Otherwise pdFALSE is returned.\n *\n */\n#define xMessageBufferIsEmpty( xMessageBuffer ) xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )\n\n/**\n * message_buffer.h\n
\nBaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );\n
\n *\n * Resets a message buffer to its initial empty state, discarding any message it\n * contained.\n *\n * A message buffer can only be reset if there are no tasks blocked on it.\n *\n * @param xMessageBuffer The handle of the message buffer being reset.\n *\n * @return If the message buffer was reset then pdPASS is returned.  If the\n * message buffer could not be reset because either there was a task blocked on\n * the message queue to wait for space to become available, or to wait for a\n * a message to be available, then pdFAIL is returned.\n *\n * \\defgroup xMessageBufferReset xMessageBufferReset\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferReset( xMessageBuffer ) xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )\n\n\n/**\n * message_buffer.h\n
\nsize_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );\n
\n * Returns the number of bytes of free space in the message buffer.\n *\n * @param xMessageBuffer The handle of the message buffer being queried.\n *\n * @return The number of bytes that can be written to the message buffer before\n * the message buffer would be full.  When a message is written to the message\n * buffer an additional sizeof( size_t ) bytes are also written to store the\n * message's length.  sizeof( size_t ) is typically 4 bytes on a 32-bit\n * architecture, so if xMessageBufferSpacesAvailable() returns 10, then the size\n * of the largest message that can be written to the message buffer is 6 bytes.\n *\n * \\defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferSpaceAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )\n\n/**\n * message_buffer.h\n 
\n size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );\n 
\n * Returns the length (in bytes) of the next message in a message buffer.\n * Useful if xMessageBufferReceive() returned 0 because the size of the buffer\n * passed into xMessageBufferReceive() was too small to hold the next message.\n *\n * @param xMessageBuffer The handle of the message buffer being queried.\n *\n * @return The length (in bytes) of the next message in the message buffer, or 0\n * if the message buffer is empty.\n *\n * \\defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes\n * \\ingroup MessageBufferManagement\n */\n#define xMessageBufferNextLengthBytes( xMessageBuffer ) xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;\n\n/**\n * message_buffer.h\n *\n
\nBaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * For advanced users only.\n *\n * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when\n * data is sent to a message buffer or stream buffer.  If there was a task that\n * was blocked on the message or stream buffer waiting for data to arrive then\n * the sbSEND_COMPLETED() macro sends a notification to the task to remove it\n * from the Blocked state.  xMessageBufferSendCompletedFromISR() does the same\n * thing.  It is provided to enable application writers to implement their own\n * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.\n *\n * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for\n * additional information.\n *\n * @param xStreamBuffer The handle of the stream buffer to which data was\n * written.\n *\n * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be\n * initialised to pdFALSE before it is passed into\n * xMessageBufferSendCompletedFromISR().  If calling\n * xMessageBufferSendCompletedFromISR() removes a task from the Blocked state,\n * and the task has a priority above the priority of the currently running task,\n * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a\n * context switch should be performed before exiting the ISR.\n *\n * @return If a task was removed from the Blocked state then pdTRUE is returned.\n * Otherwise pdFALSE is returned.\n *\n * \\defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR\n * \\ingroup StreamBufferManagement\n */\n#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )\n\n/**\n * message_buffer.h\n *\n
\nBaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * For advanced users only.\n *\n * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when\n * data is read out of a message buffer or stream buffer.  If there was a task\n * that was blocked on the message or stream buffer waiting for data to arrive\n * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to\n * remove it from the Blocked state.  xMessageBufferReceiveCompletedFromISR()\n * does the same thing.  It is provided to enable application writers to\n * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT\n * ANY OTHER TIME.\n *\n * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for\n * additional information.\n *\n * @param xStreamBuffer The handle of the stream buffer from which data was\n * read.\n *\n * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be\n * initialised to pdFALSE before it is passed into\n * xMessageBufferReceiveCompletedFromISR().  If calling\n * xMessageBufferReceiveCompletedFromISR() removes a task from the Blocked state,\n * and the task has a priority above the priority of the currently running task,\n * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a\n * context switch should be performed before exiting the ISR.\n *\n * @return If a task was removed from the Blocked state then pdTRUE is returned.\n * Otherwise pdFALSE is returned.\n *\n * \\defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR\n * \\ingroup StreamBufferManagement\n */\n#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )\n\n#if defined( __cplusplus )\n} /* extern \"C\" */\n#endif\n\n#endif\t/* !defined( FREERTOS_MESSAGE_BUFFER_H ) */\n"
  },
  {
    "path": "include/rtos/freertos/mpu_prototypes.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n/*\n * When the MPU is used the standard (non MPU) API functions are mapped to\n * equivalents that start \"MPU_\", the prototypes for which are defined in this\n * header files.  This will cause the application code to call the MPU_ version\n * which wraps the non-MPU version with privilege promoting then demoting code,\n * so the kernel code always runs will full privileges.\n */\n\n\n#ifndef MPU_PROTOTYPES_H\n#define MPU_PROTOTYPES_H\n\n/* MPU versions of tasks.h API functions. */\nBaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask );\nTaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer );\nBaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask );\nBaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask );\nvoid MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );\nvoid MPU_vTaskDelete( TaskHandle_t xTaskToDelete );\nvoid MPU_vTaskDelay( const TickType_t xTicksToDelay );\nvoid MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement );\nBaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask );\nUBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask );\neTaskState MPU_eTaskGetState( TaskHandle_t xTask );\nvoid MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );\nvoid MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );\nvoid MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend );\nvoid MPU_vTaskResume( TaskHandle_t xTaskToResume );\nvoid MPU_vTaskStartScheduler( void );\nvoid MPU_vTaskSuspendAll( void );\nBaseType_t MPU_xTaskResumeAll( void );\nTickType_t MPU_xTaskGetTickCount( void );\nUBaseType_t MPU_uxTaskGetNumberOfTasks( void );\nchar * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery );\nTaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery );\nUBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask );\nvoid MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );\nTaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask );\nvoid MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue );\nvoid * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex );\nBaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );\nTaskHandle_t MPU_xTaskGetIdleTaskHandle( void );\nUBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime );\nvoid MPU_vTaskList( char * pcWriteBuffer );\nvoid MPU_vTaskGetRunTimeStats( char *pcWriteBuffer );\nBaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue );\nBaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );\nuint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );\nBaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask );\nBaseType_t MPU_xTaskIncrementTick( void );\nTaskHandle_t MPU_xTaskGetCurrentTaskHandle( void );\nvoid MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut );\nBaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait );\nvoid MPU_vTaskMissedYield( void );\nBaseType_t MPU_xTaskGetSchedulerState( void );\n\n/* MPU versions of queue.h API functions. */\nBaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition );\nBaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait );\nBaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait );\nBaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait );\nUBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue );\nUBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue );\nvoid MPU_vQueueDelete( QueueHandle_t xQueue );\nQueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType );\nQueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue );\nQueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount );\nQueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue );\nTaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore );\nBaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait );\nBaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex );\nvoid MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName );\nvoid MPU_vQueueUnregisterQueue( QueueHandle_t xQueue );\nconst char * MPU_pcQueueGetName( QueueHandle_t xQueue );\nQueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType );\nQueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType );\nQueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength );\nBaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );\nBaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet );\nQueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait );\nBaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue );\nvoid MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber );\nUBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue );\nuint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue );\n\n/* MPU versions of timers.h API functions. */\nTimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction );\nTimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer );\nvoid * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer );\nvoid MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );\nBaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer );\nTaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void );\nBaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait );\nconst char * MPU_pcTimerGetName( TimerHandle_t xTimer );\nTickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer );\nTickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer );\nBaseType_t MPU_xTimerCreateTimerTask( void );\nBaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait );\n\n/* MPU versions of event_group.h API functions. */\nEventGroupHandle_t MPU_xEventGroupCreate( void );\nEventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer );\nEventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait );\nEventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );\nEventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );\nEventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait );\nvoid MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup );\nUBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup );\n\n/* MPU versions of message/stream_buffer.h API functions. */\nsize_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait );\nsize_t MPU_xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, BaseType_t * const pxHigherPriorityTaskWoken );\nsize_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait );\nsize_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer );\nsize_t MPU_xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, BaseType_t * const pxHigherPriorityTaskWoken );\nvoid MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );\nBaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );\nBaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );\nBaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );\nsize_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );\nsize_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );\nBaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );\nStreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer );\nStreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer );\n\n\n\n#endif /* MPU_PROTOTYPES_H */\n\n"
  },
  {
    "path": "include/rtos/freertos/mpu_wrappers.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n#ifndef MPU_WRAPPERS_H\n#define MPU_WRAPPERS_H\n\n/* This file redefines API functions to be called through a wrapper macro, but\nonly for ports that are using the MPU. */\n#ifdef portUSING_MPU_WRAPPERS\n\n\t/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is\n\tincluded from queue.c or task.c to prevent it from having an effect within\n\tthose files. */\n\t#ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\n\n\t\t/*\n\t\t * Map standard (non MPU) API functions to equivalents that start\n\t\t * \"MPU_\".  This will cause the application code to call the MPU_\n\t\t * version, which wraps the non-MPU version with privilege promoting\n\t\t * then demoting code, so the kernel code always runs will full\n\t\t * privileges.\n\t\t */\n\n\t\t/* Map standard tasks.h API functions to the MPU equivalents. */\n\t\t#define xTaskCreate\t\t\t\t\t\t\t\tMPU_xTaskCreate\n\t\t#define xTaskCreateStatic\t\t\t\t\t\tMPU_xTaskCreateStatic\n\t\t#define xTaskCreateRestricted\t\t\t\t\tMPU_xTaskCreateRestricted\n\t\t#define vTaskAllocateMPURegions\t\t\t\t\tMPU_vTaskAllocateMPURegions\n\t\t#define vTaskDelete\t\t\t\t\t\t\t\tMPU_vTaskDelete\n\t\t#define vTaskDelay\t\t\t\t\t\t\t\tMPU_vTaskDelay\n\t\t#define vTaskDelayUntil\t\t\t\t\t\t\tMPU_vTaskDelayUntil\n\t\t#define xTaskAbortDelay\t\t\t\t\t\t\tMPU_xTaskAbortDelay\n\t\t#define uxTaskPriorityGet\t\t\t\t\t\tMPU_uxTaskPriorityGet\n\t\t#define eTaskGetState\t\t\t\t\t\t\tMPU_eTaskGetState\n\t\t#define vTaskGetInfo\t\t\t\t\t\t\tMPU_vTaskGetInfo\n\t\t#define vTaskPrioritySet\t\t\t\t\t\tMPU_vTaskPrioritySet\n\t\t#define vTaskSuspend\t\t\t\t\t\t\tMPU_vTaskSuspend\n\t\t#define vTaskResume\t\t\t\t\t\t\t\tMPU_vTaskResume\n\t\t#define vTaskSuspendAll\t\t\t\t\t\t\tMPU_vTaskSuspendAll\n\t\t#define xTaskResumeAll\t\t\t\t\t\t\tMPU_xTaskResumeAll\n\t\t#define xTaskGetTickCount\t\t\t\t\t\tMPU_xTaskGetTickCount\n\t\t#define uxTaskGetNumberOfTasks\t\t\t\t\tMPU_uxTaskGetNumberOfTasks\n\t\t#define pcTaskGetName\t\t\t\t\t\t\tMPU_pcTaskGetName\n\t\t#define xTaskGetHandle\t\t\t\t\t\t\tMPU_xTaskGetHandle\n\t\t#define uxTaskGetStackHighWaterMark\t\t\t\tMPU_uxTaskGetStackHighWaterMark\n\t\t#define vTaskSetApplicationTaskTag\t\t\t\tMPU_vTaskSetApplicationTaskTag\n\t\t#define xTaskGetApplicationTaskTag\t\t\t\tMPU_xTaskGetApplicationTaskTag\n\t\t#define vTaskSetThreadLocalStoragePointer\t\tMPU_vTaskSetThreadLocalStoragePointer\n\t\t#define pvTaskGetThreadLocalStoragePointer\t\tMPU_pvTaskGetThreadLocalStoragePointer\n\t\t#define xTaskCallApplicationTaskHook\t\t\tMPU_xTaskCallApplicationTaskHook\n\t\t#define xTaskGetIdleTaskHandle\t\t\t\t\tMPU_xTaskGetIdleTaskHandle\n\t\t#define uxTaskGetSystemState\t\t\t\t\tMPU_uxTaskGetSystemState\n\t\t#define vTaskList\t\t\t\t\t\t\t\tMPU_vTaskList\n\t\t#define vTaskGetRunTimeStats\t\t\t\t\tMPU_vTaskGetRunTimeStats\n\t\t#define xTaskGenericNotify\t\t\t\t\t\tMPU_xTaskGenericNotify\n\t\t#define xTaskNotifyWait\t\t\t\t\t\t\tMPU_xTaskNotifyWait\n\t\t#define ulTaskNotifyTake\t\t\t\t\t\tMPU_ulTaskNotifyTake\n\t\t#define xTaskNotifyStateClear\t\t\t\t\tMPU_xTaskNotifyStateClear\n\n\t\t#define xTaskGetCurrentTaskHandle\t\t\t\tMPU_xTaskGetCurrentTaskHandle\n\t\t#define vTaskSetTimeOutState\t\t\t\t\tMPU_vTaskSetTimeOutState\n\t\t#define xTaskCheckForTimeOut\t\t\t\t\tMPU_xTaskCheckForTimeOut\n\t\t#define xTaskGetSchedulerState\t\t\t\t\tMPU_xTaskGetSchedulerState\n\n\t\t/* Map standard queue.h API functions to the MPU equivalents. */\n\t\t#define xQueueGenericSend\t\t\t\t\t\tMPU_xQueueGenericSend\n\t\t#define xQueueReceive\t\t\t\t\t\t\tMPU_xQueueReceive\n\t\t#define xQueuePeek\t\t\t\t\t\t\t\tMPU_xQueuePeek\n\t\t#define xQueueSemaphoreTake\t\t\t\t\t\tMPU_xQueueSemaphoreTake\n\t\t#define uxQueueMessagesWaiting\t\t\t\t\tMPU_uxQueueMessagesWaiting\n\t\t#define uxQueueSpacesAvailable\t\t\t\t\tMPU_uxQueueSpacesAvailable\n\t\t#define vQueueDelete\t\t\t\t\t\t\tMPU_vQueueDelete\n\t\t#define xQueueCreateMutex\t\t\t\t\t\tMPU_xQueueCreateMutex\n\t\t#define xQueueCreateMutexStatic\t\t\t\t\tMPU_xQueueCreateMutexStatic\n\t\t#define xQueueCreateCountingSemaphore\t\t\tMPU_xQueueCreateCountingSemaphore\n\t\t#define xQueueCreateCountingSemaphoreStatic\t\tMPU_xQueueCreateCountingSemaphoreStatic\n\t\t#define xQueueGetMutexHolder\t\t\t\t\tMPU_xQueueGetMutexHolder\n\t\t#define xQueueTakeMutexRecursive\t\t\t\tMPU_xQueueTakeMutexRecursive\n\t\t#define xQueueGiveMutexRecursive\t\t\t\tMPU_xQueueGiveMutexRecursive\n\t\t#define xQueueGenericCreate\t\t\t\t\t\tMPU_xQueueGenericCreate\n\t\t#define xQueueGenericCreateStatic\t\t\t\tMPU_xQueueGenericCreateStatic\n\t\t#define xQueueCreateSet\t\t\t\t\t\t\tMPU_xQueueCreateSet\n\t\t#define xQueueAddToSet\t\t\t\t\t\t\tMPU_xQueueAddToSet\n\t\t#define xQueueRemoveFromSet\t\t\t\t\t\tMPU_xQueueRemoveFromSet\n\t\t#define xQueueSelectFromSet\t\t\t\t\t\tMPU_xQueueSelectFromSet\n\t\t#define xQueueGenericReset\t\t\t\t\t\tMPU_xQueueGenericReset\n\n\t\t#if( configQUEUE_REGISTRY_SIZE > 0 )\n\t\t\t#define vQueueAddToRegistry\t\t\t\t\t\tMPU_vQueueAddToRegistry\n\t\t\t#define vQueueUnregisterQueue\t\t\t\t\tMPU_vQueueUnregisterQueue\n\t\t\t#define pcQueueGetName\t\t\t\t\t\t\tMPU_pcQueueGetName\n\t\t#endif\n\n\t\t/* Map standard timer.h API functions to the MPU equivalents. */\n\t\t#define xTimerCreate\t\t\t\t\t\t\tMPU_xTimerCreate\n\t\t#define xTimerCreateStatic\t\t\t\t\t\tMPU_xTimerCreateStatic\n\t\t#define pvTimerGetTimerID\t\t\t\t\t\tMPU_pvTimerGetTimerID\n\t\t#define vTimerSetTimerID\t\t\t\t\t\tMPU_vTimerSetTimerID\n\t\t#define xTimerIsTimerActive\t\t\t\t\t\tMPU_xTimerIsTimerActive\n\t\t#define xTimerGetTimerDaemonTaskHandle\t\t\tMPU_xTimerGetTimerDaemonTaskHandle\n\t\t#define xTimerPendFunctionCall\t\t\t\t\tMPU_xTimerPendFunctionCall\n\t\t#define pcTimerGetName\t\t\t\t\t\t\tMPU_pcTimerGetName\n\t\t#define xTimerGetPeriod\t\t\t\t\t\t\tMPU_xTimerGetPeriod\n\t\t#define xTimerGetExpiryTime\t\t\t\t\t\tMPU_xTimerGetExpiryTime\n\t\t#define xTimerGenericCommand\t\t\t\t\tMPU_xTimerGenericCommand\n\n\t\t/* Map standard event_group.h API functions to the MPU equivalents. */\n\t\t#define xEventGroupCreate\t\t\t\t\t\tMPU_xEventGroupCreate\n\t\t#define xEventGroupCreateStatic\t\t\t\t\tMPU_xEventGroupCreateStatic\n\t\t#define xEventGroupWaitBits\t\t\t\t\t\tMPU_xEventGroupWaitBits\n\t\t#define xEventGroupClearBits\t\t\t\t\tMPU_xEventGroupClearBits\n\t\t#define xEventGroupSetBits\t\t\t\t\t\tMPU_xEventGroupSetBits\n\t\t#define xEventGroupSync\t\t\t\t\t\t\tMPU_xEventGroupSync\n\t\t#define vEventGroupDelete\t\t\t\t\t\tMPU_vEventGroupDelete\n\n\t\t/* Map standard message/stream_buffer.h API functions to the MPU\n\t\tequivalents. */\n\t\t#define xStreamBufferSend\t\t\t\t\t\tMPU_xStreamBufferSend\n\t\t#define xStreamBufferSendFromISR\t\t\t\tMPU_xStreamBufferSendFromISR\n\t\t#define xStreamBufferReceive\t\t\t\t\tMPU_xStreamBufferReceive\n\t\t#define xStreamBufferNextMessageLengthBytes\t\tMPU_xStreamBufferNextMessageLengthBytes\n\t\t#define xStreamBufferReceiveFromISR\t\t\t\tMPU_xStreamBufferReceiveFromISR\n\t\t#define vStreamBufferDelete\t\t\t\t\t\tMPU_vStreamBufferDelete\n\t\t#define xStreamBufferIsFull\t\t\t\t\t\tMPU_xStreamBufferIsFull\n\t\t#define xStreamBufferIsEmpty\t\t\t\t\tMPU_xStreamBufferIsEmpty\n\t\t#define xStreamBufferReset\t\t\t\t\t\tMPU_xStreamBufferReset\n\t\t#define xStreamBufferSpacesAvailable\t\t\tMPU_xStreamBufferSpacesAvailable\n\t\t#define xStreamBufferBytesAvailable\t\t\t\tMPU_xStreamBufferBytesAvailable\n\t\t#define xStreamBufferSetTriggerLevel\t\t\tMPU_xStreamBufferSetTriggerLevel\n\t\t#define xStreamBufferGenericCreate\t\t\t\tMPU_xStreamBufferGenericCreate\n\t\t#define xStreamBufferGenericCreateStatic\t\tMPU_xStreamBufferGenericCreateStatic\n\n\n\t\t/* Remove the privileged function macro, but keep the PRIVILEGED_DATA\n\t\tmacro so applications can place data in privileged access sections\n\t\t(useful when using statically allocated objects). */\n\t\t#define PRIVILEGED_FUNCTION\n\t\t#define PRIVILEGED_DATA __attribute__((section(\"privileged_data\")))\n\n\t#else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */\n\n\t\t/* Ensure API functions go in the privileged execution section. */\n\t\t#define PRIVILEGED_FUNCTION __attribute__((section(\"privileged_functions\")))\n\t\t#define PRIVILEGED_DATA __attribute__((section(\"privileged_data\")))\n\n\t#endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */\n\n#else /* portUSING_MPU_WRAPPERS */\n\n\t#define PRIVILEGED_FUNCTION\n\t#define PRIVILEGED_DATA\n\t#define portUSING_MPU_WRAPPERS 0\n\n#endif /* portUSING_MPU_WRAPPERS */\n\n\n#endif /* MPU_WRAPPERS_H */\n\n"
  },
  {
    "path": "include/rtos/freertos/portable.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n/*-----------------------------------------------------------\n * Portable layer API.  Each function must be defined for each port.\n *----------------------------------------------------------*/\n\n#ifndef PORTABLE_H\n#define PORTABLE_H\n\n/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a\npre-processor definition was used to ensure the pre-processor found the correct\nportmacro.h file for the port being used.  That scheme was deprecated in favour\nof setting the compiler's include path such that it found the correct\nportmacro.h file - removing the need for the constant and allowing the\nportmacro.h file to be located anywhere in relation to the port being used.\nPurely for reasons of backward compatibility the old method is still valid, but\nto make it clear that new projects should not use it, support for the port\nspecific constants has been moved into the deprecated_definitions.h header\nfile. */\n#include \"deprecated_definitions.h\"\n\n/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h\ndid not result in a portmacro.h header file being included - and it should be\nincluded here.  In this case the path to the correct portmacro.h header file\nmust be set in the compiler's include path. */\n#ifndef portENTER_CRITICAL\n\t#include \"portmacro.h\"\n#endif\n\n#if portBYTE_ALIGNMENT == 32\n\t#define portBYTE_ALIGNMENT_MASK ( 0x001f )\n#endif\n\n#if portBYTE_ALIGNMENT == 16\n\t#define portBYTE_ALIGNMENT_MASK ( 0x000f )\n#endif\n\n#if portBYTE_ALIGNMENT == 8\n\t#define portBYTE_ALIGNMENT_MASK ( 0x0007 )\n#endif\n\n#if portBYTE_ALIGNMENT == 4\n\t#define portBYTE_ALIGNMENT_MASK\t( 0x0003 )\n#endif\n\n#if portBYTE_ALIGNMENT == 2\n\t#define portBYTE_ALIGNMENT_MASK\t( 0x0001 )\n#endif\n\n#if portBYTE_ALIGNMENT == 1\n\t#define portBYTE_ALIGNMENT_MASK\t( 0x0000 )\n#endif\n\n#ifndef portBYTE_ALIGNMENT_MASK\n\t#error \"Invalid portBYTE_ALIGNMENT definition\"\n#endif\n\n#ifndef portNUM_CONFIGURABLE_REGIONS\n\t#define portNUM_CONFIGURABLE_REGIONS 1\n#endif\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"mpu_wrappers.h\"\n\n/*\n * Setup the stack of a new task so it is ready to be placed under the\n * scheduler control.  The registers have to be placed on the stack in\n * the order that the port expects to find them.\n *\n */\n#if( portUSING_MPU_WRAPPERS == 1 )\n\tStackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;\n#else\n\tStackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;\n#endif\n\n/* Used by heap_5.c. */\ntypedef struct HeapRegion\n{\n\tuint8_t *pucStartAddress;\n\tsize_t xSizeInBytes;\n} HeapRegion_t;\n\n/*\n * Used to define multiple heap regions for use by heap_5.c.  This function\n * must be called before any calls to pvPortMalloc() - not creating a task,\n * queue, semaphore, mutex, software timer, event group, etc. will result in\n * pvPortMalloc being called.\n *\n * pxHeapRegions passes in an array of HeapRegion_t structures - each of which\n * defines a region of memory that can be used as the heap.  The array is\n * terminated by a HeapRegions_t structure that has a size of 0.  The region\n * with the lowest start address must appear first in the array.\n */\nvoid vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;\n\n\n/*\n * Map to the memory management routines required for the port.\n */\nvoid *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;\nvoid vPortFree( void *pv ) PRIVILEGED_FUNCTION;\nvoid vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;\nsize_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;\nsize_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;\n\n/*\n * Setup the hardware ready for the scheduler to take control.  This generally\n * sets up a tick interrupt and sets timers for the correct tick frequency.\n */\nBaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;\n\n/*\n * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so\n * the hardware is left in its original condition after the scheduler stops\n * executing.\n */\nvoid vPortEndScheduler( void ) PRIVILEGED_FUNCTION;\n\n/*\n * The structures and methods of manipulating the MPU are contained within the\n * port layer.\n *\n * Fills the xMPUSettings structure with the memory region information\n * contained in xRegions.\n */\n#if( portUSING_MPU_WRAPPERS == 1 )\n\tstruct xMEMORY_REGION;\n\tvoid vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* PORTABLE_H */\n\n"
  },
  {
    "path": "include/rtos/freertos/portmacro.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n\n#ifndef PORTMACRO_H\n#define PORTMACRO_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*-----------------------------------------------------------\n * Port specific definitions.\n *\n * The settings in this file configure FreeRTOS correctly for the\n * given hardware and compiler.\n *\n * These settings should not be altered.\n *-----------------------------------------------------------\n */\n\n/* Type definitions. */\n#define portCHAR\t\tchar\n#define portFLOAT\t\tfloat\n#define portDOUBLE\t\tdouble\n#define portLONG\t\tlong\n#define portSHORT\t\tshort\n#define portSTACK_TYPE\tuint32_t\n#define portBASE_TYPE\tlong\n\ntypedef portSTACK_TYPE StackType_t;\ntypedef long BaseType_t;\ntypedef unsigned long UBaseType_t;\n\n#if( configUSE_16_BIT_TICKS == 1 )\n\ttypedef uint16_t TickType_t;\n\t#define portMAX_DELAY ( TickType_t ) 0xffff\n#else\n\ttypedef uint32_t TickType_t;\n\t#define portMAX_DELAY ( TickType_t ) 0xffffffffUL\n\n\t/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\n\tnot need to be guarded with a critical section. */\n\t#define portTICK_TYPE_IS_ATOMIC 1\n#endif\n/*-----------------------------------------------------------*/\n\n/* Architecture specifics. */\n#define portSTACK_GROWTH\t\t\t( -1 )\n#define portTICK_PERIOD_MS\t\t\t( ( TickType_t ) 1000 / configTICK_RATE_HZ )\n#define portBYTE_ALIGNMENT\t\t\t8\n\n/* The max restore time for the hardware jump out from deep sleep */\n#define portMAX_RESTORE_TIME        6\n/*-----------------------------------------------------------*/\n\n/* Scheduler utilities. */\n#define portYIELD() \t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t/* Set a PendSV to request a context switch. */\t\t\t\t\t\t\t\t\\\n\tportNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t/* Barriers are normally not required but do ensure the code is completely\t\\\n\twithin the specified behaviour for the architecture. */\t\t\t\t\t\t\\\n\t__asm volatile( \"dsb\" ::: \"memory\" );\t\t\t\t\t\t\t\t\t\t\\\n\t__asm volatile( \"isb\" );\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n}\n\n#define portNVIC_INT_CTRL_REG\t\t( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\n#define portNVIC_PENDSVSET_BIT\t\t( 1UL << 28UL )\n#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()\n#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\n/*-----------------------------------------------------------*/\n\n/* Critical section management. */\nextern void vPortEnterCritical( void );\nextern void vPortExitCritical( void );\n#define portSET_INTERRUPT_MASK_FROM_ISR()\t\tulPortRaiseBASEPRI()\n#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)\tvPortSetBASEPRI(x)\n#define portDISABLE_INTERRUPTS()\t\t\t\tvPortRaiseBASEPRI()\n#define portENABLE_INTERRUPTS()\t\t\t\t\tvPortSetBASEPRI(0)\n//#define portDISABLE_INTERRUPTS()\t\t\t\t__disable_irq()\n//#define portENABLE_INTERRUPTS()\t\t\t\t\t__enable_irq()\n#define portENTER_CRITICAL()\t\t\t\t\tvPortEnterCritical()\n#define portEXIT_CRITICAL()\t\t\t\t\t\tvPortExitCritical()\n\n/*-----------------------------------------------------------*/\n\n/* Task function macros as described on the FreeRTOS.org WEB site.  These are\nnot necessary for to use this port.  They are defined so the common demo files\n(which build with all the ports) will build. */\n#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\n#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\n/*-----------------------------------------------------------*/\n\n/* Tickless idle/low power functionality. */\n#ifndef portSUPPRESS_TICKS_AND_SLEEP\n\textern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\n\t#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\n#endif\n\n#ifndef portTASK_IDLE_INIT\n    extern void vPortTaskIdleInit(void);\n#define  portTASK_IDLE_INIT vPortTaskIdleInit\n#endif\n\n#ifndef portLIGHT_SLEEP\nextern void vPortLightSleep( TickType_t ulExpectedIdleTime );\n#define portLIGHT_SLEEP(xExpectedIdleTime) vPortLightSleep(xExpectedIdleTime)\n#endif\n\n/*-----------------------------------------------------------*/\n\n/* Architecture specific optimisations. */\n#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\n\t#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\n#endif\n\n#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\n\n\t/* Generic helper function. */\n\t__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )\n\t{\n\tuint8_t ucReturn;\n\n\t\t__asm volatile ( \"clz %0, %1\" : \"=r\" ( ucReturn ) : \"r\" ( ulBitmap ) : \"memory\" );\n\t\treturn ucReturn;\n\t}\n\n\t/* Check the configuration. */\n\t#if( configMAX_PRIORITIES > 32 )\n\t\t#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\n\t#endif\n\n\t/* Store/clear the ready priorities in a bit map. */\n\t#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\n\t#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\n\n\t/*-----------------------------------------------------------*/\n\n\t#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )\n\n#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\n\n/*-----------------------------------------------------------*/\n\n#ifdef configASSERT\n\tvoid vPortValidateInterruptPriority( void );\n\t#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() \tvPortValidateInterruptPriority()\n#endif\n\n/* portNOP() is not required by this port. */\n#define portNOP()\n\n#define portINLINE\t__inline\n\n#ifndef portFORCE_INLINE\n\t#define portFORCE_INLINE inline __attribute__(( always_inline))\n#endif\n\nportFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )\n{\nuint32_t ulCurrentInterrupt;\nBaseType_t xReturn;\n\n\t/* Obtain the number of the currently executing interrupt. */\n\t__asm volatile( \"mrs %0, ipsr\" : \"=r\"( ulCurrentInterrupt ) :: \"memory\" );\n\n\tif( ulCurrentInterrupt == 0 )\n\t{\n\t\txReturn = pdFALSE;\n\t}\n\telse\n\t{\n\t\txReturn = pdTRUE;\n\t}\n\n\treturn xReturn;\n}\n\n/*-----------------------------------------------------------*/\n\nportFORCE_INLINE static void vPortRaiseBASEPRI( void )\n{\n\n\t__asm volatile\n\t(\n\t\t\"\tmsr basepri, %0\t\t\t\t\t\t\t\t\t\t\t\\n\" \\\n\t\t\"\tisb\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\n\" \\\n\t\t\"\tdsb\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\n\" \\\n\t\t: : \"r\" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : \"memory\"\n\t);\n}\n\n/*-----------------------------------------------------------*/\n\nportFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )\n{\nuint32_t ulOriginalBASEPRI, ulNewBASEPRI;\n\n\t__asm volatile\n\t(\n\t\t\"\tmrs %0, basepri\t\t\t\t\t\t\t\t\t\t\t\\n\" \\\n\t\t\"\tmov %1, %2\t\t\t\t\t\t\t\t\t\t\t\t\\n\"\t\\\n\t\t\"\tmsr basepri, %1\t\t\t\t\t\t\t\t\t\t\t\\n\" \\\n\t\t\"\tisb\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\n\" \\\n\t\t\"\tdsb\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\n\" \\\n\t\t:\"=r\" (ulOriginalBASEPRI), \"=r\" (ulNewBASEPRI) : \"i\" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : \"memory\"\n\t);\n\n\t/* This return will not be reached but is necessary to prevent compiler\n\twarnings. */\n\treturn ulOriginalBASEPRI;\n}\n/*-----------------------------------------------------------*/\n\nportFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )\n{\n\t__asm volatile\n\t(\n\t\t\"\tmsr basepri, %0\t\" :: \"r\" ( ulNewMaskValue ) : \"memory\"\n\t);\n}\n/*-----------------------------------------------------------*/\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* PORTMACRO_H */\n\n"
  },
  {
    "path": "include/rtos/freertos/projdefs.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n#ifndef PROJDEFS_H\n#define PROJDEFS_H\n\n/*\n * Defines the prototype to which task functions must conform.  Defined in this\n * file to ensure the type is known before portable.h is included.\n */\ntypedef void (*TaskFunction_t)( void * );\n\n/* Converts a time in milliseconds to a time in ticks.  This macro can be\noverridden by a macro of the same name defined in FreeRTOSConfig.h in case the\ndefinition here is not suitable for your application. */\n#ifndef pdMS_TO_TICKS\n\t#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) )\n#endif\n\n#define pdFALSE\t\t\t( ( BaseType_t ) 0 )\n#define pdTRUE\t\t\t( ( BaseType_t ) 1 )\n\n#define pdPASS\t\t\t( pdTRUE )\n#define pdFAIL\t\t\t( pdFALSE )\n#define errQUEUE_EMPTY\t( ( BaseType_t ) 0 )\n#define errQUEUE_FULL\t( ( BaseType_t ) 0 )\n\n/* FreeRTOS error definitions. */\n#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY\t( -1 )\n#define errQUEUE_BLOCKED\t\t\t\t\t\t( -4 )\n#define errQUEUE_YIELD\t\t\t\t\t\t\t( -5 )\n\n/* Macros used for basic data corruption checks. */\n#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES\n\t#define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0\n#endif\n\n#if( configUSE_16_BIT_TICKS == 1 )\n\t#define pdINTEGRITY_CHECK_VALUE 0x5a5a\n#else\n\t#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL\n#endif\n\n/* The following errno values are used by FreeRTOS+ components, not FreeRTOS\nitself. */\n#define pdFREERTOS_ERRNO_NONE\t\t\t0\t/* No errors */\n#define\tpdFREERTOS_ERRNO_ENOENT\t\t\t2\t/* No such file or directory */\n#define\tpdFREERTOS_ERRNO_EINTR\t\t\t4\t/* Interrupted system call */\n#define\tpdFREERTOS_ERRNO_EIO\t\t\t5\t/* I/O error */\n#define\tpdFREERTOS_ERRNO_ENXIO\t\t\t6\t/* No such device or address */\n#define\tpdFREERTOS_ERRNO_EBADF\t\t\t9\t/* Bad file number */\n#define\tpdFREERTOS_ERRNO_EAGAIN\t\t\t11\t/* No more processes */\n#define\tpdFREERTOS_ERRNO_EWOULDBLOCK\t11\t/* Operation would block */\n#define\tpdFREERTOS_ERRNO_ENOMEM\t\t\t12\t/* Not enough memory */\n#define\tpdFREERTOS_ERRNO_EACCES\t\t\t13\t/* Permission denied */\n#define\tpdFREERTOS_ERRNO_EFAULT\t\t\t14\t/* Bad address */\n#define\tpdFREERTOS_ERRNO_EBUSY\t\t\t16\t/* Mount device busy */\n#define\tpdFREERTOS_ERRNO_EEXIST\t\t\t17\t/* File exists */\n#define\tpdFREERTOS_ERRNO_EXDEV\t\t\t18\t/* Cross-device link */\n#define\tpdFREERTOS_ERRNO_ENODEV\t\t\t19\t/* No such device */\n#define\tpdFREERTOS_ERRNO_ENOTDIR\t\t20\t/* Not a directory */\n#define\tpdFREERTOS_ERRNO_EISDIR\t\t\t21\t/* Is a directory */\n#define\tpdFREERTOS_ERRNO_EINVAL\t\t\t22\t/* Invalid argument */\n#define\tpdFREERTOS_ERRNO_ENOSPC\t\t\t28\t/* No space left on device */\n#define\tpdFREERTOS_ERRNO_ESPIPE\t\t\t29\t/* Illegal seek */\n#define\tpdFREERTOS_ERRNO_EROFS\t\t\t30\t/* Read only file system */\n#define\tpdFREERTOS_ERRNO_EUNATCH\t\t42\t/* Protocol driver not attached */\n#define\tpdFREERTOS_ERRNO_EBADE\t\t\t50\t/* Invalid exchange */\n#define\tpdFREERTOS_ERRNO_EFTYPE\t\t\t79\t/* Inappropriate file type or format */\n#define\tpdFREERTOS_ERRNO_ENMFILE\t\t89\t/* No more files */\n#define\tpdFREERTOS_ERRNO_ENOTEMPTY\t\t90\t/* Directory not empty */\n#define\tpdFREERTOS_ERRNO_ENAMETOOLONG \t91\t/* File or path name too long */\n#define\tpdFREERTOS_ERRNO_EOPNOTSUPP\t\t95\t/* Operation not supported on transport endpoint */\n#define\tpdFREERTOS_ERRNO_ENOBUFS\t\t105\t/* No buffer space available */\n#define\tpdFREERTOS_ERRNO_ENOPROTOOPT\t109\t/* Protocol not available */\n#define\tpdFREERTOS_ERRNO_EADDRINUSE\t\t112\t/* Address already in use */\n#define\tpdFREERTOS_ERRNO_ETIMEDOUT\t\t116\t/* Connection timed out */\n#define\tpdFREERTOS_ERRNO_EINPROGRESS\t119\t/* Connection already in progress */\n#define\tpdFREERTOS_ERRNO_EALREADY\t\t120\t/* Socket already connected */\n#define\tpdFREERTOS_ERRNO_EADDRNOTAVAIL \t125\t/* Address not available */\n#define\tpdFREERTOS_ERRNO_EISCONN\t\t127\t/* Socket is already connected */\n#define\tpdFREERTOS_ERRNO_ENOTCONN\t\t128\t/* Socket is not connected */\n#define\tpdFREERTOS_ERRNO_ENOMEDIUM\t\t135\t/* No medium inserted */\n#define\tpdFREERTOS_ERRNO_EILSEQ\t\t\t138\t/* An invalid UTF-16 sequence was encountered. */\n#define\tpdFREERTOS_ERRNO_ECANCELED\t\t140\t/* Operation canceled. */\n\n/* The following endian values are used by FreeRTOS+ components, not FreeRTOS\nitself. */\n#define pdFREERTOS_LITTLE_ENDIAN\t\t0\n#define pdFREERTOS_BIG_ENDIAN\t\t\t1\n\n/* Re-defining endian values for generic naming. */\n#define pdLITTLE_ENDIAN\t\t\t\t\tpdFREERTOS_LITTLE_ENDIAN\n#define pdBIG_ENDIAN\t\t\t\t\tpdFREERTOS_BIG_ENDIAN\n\n\n#endif /* PROJDEFS_H */\n\n\n\n"
  },
  {
    "path": "include/rtos/freertos/queue.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n\n#ifndef QUEUE_H\n#define QUEUE_H\n\n#ifndef INC_FREERTOS_H\n\t#error \"include FreeRTOS.h\" must appear in source files before \"include queue.h\"\n#endif\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"task.h\"\n\n/**\n * Type by which queues are referenced.  For example, a call to xQueueCreate()\n * returns an QueueHandle_t variable that can then be used as a parameter to\n * xQueueSend(), xQueueReceive(), etc.\n */\nstruct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */\ntypedef struct QueueDefinition * QueueHandle_t;\n\n/**\n * Type by which queue sets are referenced.  For example, a call to\n * xQueueCreateSet() returns an xQueueSet variable that can then be used as a\n * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc.\n */\ntypedef struct QueueDefinition * QueueSetHandle_t;\n\n/**\n * Queue sets can contain both queues and semaphores, so the\n * QueueSetMemberHandle_t is defined as a type to be used where a parameter or\n * return value can be either an QueueHandle_t or an SemaphoreHandle_t.\n */\ntypedef struct QueueDefinition * QueueSetMemberHandle_t;\n\n/* For internal use only. */\n#define\tqueueSEND_TO_BACK\t\t( ( BaseType_t ) 0 )\n#define\tqueueSEND_TO_FRONT\t\t( ( BaseType_t ) 1 )\n#define queueOVERWRITE\t\t\t( ( BaseType_t ) 2 )\n\n/* For internal use only.  These definitions *must* match those in queue.c. */\n#define queueQUEUE_TYPE_BASE\t\t\t\t( ( uint8_t ) 0U )\n#define queueQUEUE_TYPE_SET\t\t\t\t\t( ( uint8_t ) 0U )\n#define queueQUEUE_TYPE_MUTEX \t\t\t\t( ( uint8_t ) 1U )\n#define queueQUEUE_TYPE_COUNTING_SEMAPHORE\t( ( uint8_t ) 2U )\n#define queueQUEUE_TYPE_BINARY_SEMAPHORE\t( ( uint8_t ) 3U )\n#define queueQUEUE_TYPE_RECURSIVE_MUTEX\t\t( ( uint8_t ) 4U )\n\n/**\n * queue. h\n * 
\n QueueHandle_t xQueueCreate(\n\t\t\t\t\t\t\t  UBaseType_t uxQueueLength,\n\t\t\t\t\t\t\t  UBaseType_t uxItemSize\n\t\t\t\t\t\t  );\n * 
\n *\n * Creates a new queue instance, and returns a handle by which the new queue\n * can be referenced.\n *\n * Internally, within the FreeRTOS implementation, queues use two blocks of\n * memory.  The first block is used to hold the queue's data structures.  The\n * second block is used to hold items placed into the queue.  If a queue is\n * created using xQueueCreate() then both blocks of memory are automatically\n * dynamically allocated inside the xQueueCreate() function.  (see\n * http://www.freertos.org/a00111.html).  If a queue is created using\n * xQueueCreateStatic() then the application writer must provide the memory that\n * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to\n * be created without using any dynamic memory allocation.\n *\n * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html\n *\n * @param uxQueueLength The maximum number of items that the queue can contain.\n *\n * @param uxItemSize The number of bytes each item in the queue will require.\n * Items are queued by copy, not by reference, so this is the number of bytes\n * that will be copied for each posted item.  Each item on the queue must be\n * the same size.\n *\n * @return If the queue is successfully create then a handle to the newly\n * created queue is returned.  If the queue cannot be created then 0 is\n * returned.\n *\n * Example usage:\n   
\n struct AMessage\n {\n\tchar ucMessageID;\n\tchar ucData[ 20 ];\n };\n\n void vATask( void *pvParameters )\n {\n QueueHandle_t xQueue1, xQueue2;\n\n\t// Create a queue capable of containing 10 uint32_t values.\n\txQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\n\tif( xQueue1 == 0 )\n\t{\n\t\t// Queue was not created and must not be used.\n\t}\n\n\t// Create a queue capable of containing 10 pointers to AMessage structures.\n\t// These should be passed by pointer as they contain a lot of data.\n\txQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );\n\tif( xQueue2 == 0 )\n\t{\n\t\t// Queue was not created and must not be used.\n\t}\n\n\t// ... Rest of task code.\n }\n 
\n * \\defgroup xQueueCreate xQueueCreate\n * \\ingroup QueueManagement\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\t#define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) )\n#endif\n\n/**\n * queue. h\n * 
\n QueueHandle_t xQueueCreateStatic(\n\t\t\t\t\t\t\t  UBaseType_t uxQueueLength,\n\t\t\t\t\t\t\t  UBaseType_t uxItemSize,\n\t\t\t\t\t\t\t  uint8_t *pucQueueStorageBuffer,\n\t\t\t\t\t\t\t  StaticQueue_t *pxQueueBuffer\n\t\t\t\t\t\t  );\n * 
\n *\n * Creates a new queue instance, and returns a handle by which the new queue\n * can be referenced.\n *\n * Internally, within the FreeRTOS implementation, queues use two blocks of\n * memory.  The first block is used to hold the queue's data structures.  The\n * second block is used to hold items placed into the queue.  If a queue is\n * created using xQueueCreate() then both blocks of memory are automatically\n * dynamically allocated inside the xQueueCreate() function.  (see\n * http://www.freertos.org/a00111.html).  If a queue is created using\n * xQueueCreateStatic() then the application writer must provide the memory that\n * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to\n * be created without using any dynamic memory allocation.\n *\n * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html\n *\n * @param uxQueueLength The maximum number of items that the queue can contain.\n *\n * @param uxItemSize The number of bytes each item in the queue will require.\n * Items are queued by copy, not by reference, so this is the number of bytes\n * that will be copied for each posted item.  Each item on the queue must be\n * the same size.\n *\n * @param pucQueueStorageBuffer If uxItemSize is not zero then\n * pucQueueStorageBuffer must point to a uint8_t array that is at least large\n * enough to hold the maximum number of items that can be in the queue at any\n * one time - which is ( uxQueueLength * uxItemsSize ) bytes.  If uxItemSize is\n * zero then pucQueueStorageBuffer can be NULL.\n *\n * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which\n * will be used to hold the queue's data structure.\n *\n * @return If the queue is created then a handle to the created queue is\n * returned.  If pxQueueBuffer is NULL then NULL is returned.\n *\n * Example usage:\n   
\n struct AMessage\n {\n\tchar ucMessageID;\n\tchar ucData[ 20 ];\n };\n\n #define QUEUE_LENGTH 10\n #define ITEM_SIZE sizeof( uint32_t )\n\n // xQueueBuffer will hold the queue structure.\n StaticQueue_t xQueueBuffer;\n\n // ucQueueStorage will hold the items posted to the queue.  Must be at least\n // [(queue length) * ( queue item size)] bytes long.\n uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ];\n\n void vATask( void *pvParameters )\n {\n QueueHandle_t xQueue1;\n\n\t// Create a queue capable of containing 10 uint32_t values.\n\txQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold.\n\t\t\t\t\t\t\tITEM_SIZE\t  // The size of each item in the queue\n\t\t\t\t\t\t\t&( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue.\n\t\t\t\t\t\t\t&xQueueBuffer ); // The buffer that will hold the queue structure.\n\n\t// The queue is guaranteed to be created successfully as no dynamic memory\n\t// allocation is used.  Therefore xQueue1 is now a handle to a valid queue.\n\n\t// ... Rest of task code.\n }\n 
\n * \\defgroup xQueueCreateStatic xQueueCreateStatic\n * \\ingroup QueueManagement\n */\n#if( configSUPPORT_STATIC_ALLOCATION == 1 )\n\t#define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) )\n#endif /* configSUPPORT_STATIC_ALLOCATION */\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueSendToToFront(\n\t\t\t\t\t\t\t\t   QueueHandle_t\txQueue,\n\t\t\t\t\t\t\t\t   const void\t\t*pvItemToQueue,\n\t\t\t\t\t\t\t\t   TickType_t\t\txTicksToWait\n\t\t\t\t\t\t\t   );\n * 
\n *\n * Post an item to the front of a queue.  The item is queued by copy, not by\n * reference.  This function must not be called from an interrupt service\n * routine.  See xQueueSendFromISR () for an alternative which may be used\n * in an ISR.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param xTicksToWait The maximum amount of time the task should block\n * waiting for space to become available on the queue, should it already\n * be full.  The call will return immediately if this is set to 0 and the\n * queue is full.  The time is defined in tick periods so the constant\n * portTICK_PERIOD_MS should be used to convert to real time if this is required.\n *\n * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.\n *\n * Example usage:\n   
\n struct AMessage\n {\n\tchar ucMessageID;\n\tchar ucData[ 20 ];\n } xMessage;\n\n uint32_t ulVar = 10UL;\n\n void vATask( void *pvParameters )\n {\n QueueHandle_t xQueue1, xQueue2;\n struct AMessage *pxMessage;\n\n\t// Create a queue capable of containing 10 uint32_t values.\n\txQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\n\n\t// Create a queue capable of containing 10 pointers to AMessage structures.\n\t// These should be passed by pointer as they contain a lot of data.\n\txQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );\n\n\t// ...\n\n\tif( xQueue1 != 0 )\n\t{\n\t\t// Send an uint32_t.  Wait for 10 ticks for space to become\n\t\t// available if necessary.\n\t\tif( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )\n\t\t{\n\t\t\t// Failed to post the message, even after 10 ticks.\n\t\t}\n\t}\n\n\tif( xQueue2 != 0 )\n\t{\n\t\t// Send a pointer to a struct AMessage object.  Don't block if the\n\t\t// queue is already full.\n\t\tpxMessage = & xMessage;\n\t\txQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );\n\t}\n\n\t// ... Rest of task code.\n }\n 
\n * \\defgroup xQueueSend xQueueSend\n * \\ingroup QueueManagement\n */\n#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueSendToBack(\n\t\t\t\t\t\t\t\t   QueueHandle_t\txQueue,\n\t\t\t\t\t\t\t\t   const void\t\t*pvItemToQueue,\n\t\t\t\t\t\t\t\t   TickType_t\t\txTicksToWait\n\t\t\t\t\t\t\t   );\n * 
\n *\n * This is a macro that calls xQueueGenericSend().\n *\n * Post an item to the back of a queue.  The item is queued by copy, not by\n * reference.  This function must not be called from an interrupt service\n * routine.  See xQueueSendFromISR () for an alternative which may be used\n * in an ISR.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param xTicksToWait The maximum amount of time the task should block\n * waiting for space to become available on the queue, should it already\n * be full.  The call will return immediately if this is set to 0 and the queue\n * is full.  The  time is defined in tick periods so the constant\n * portTICK_PERIOD_MS should be used to convert to real time if this is required.\n *\n * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.\n *\n * Example usage:\n   
\n struct AMessage\n {\n\tchar ucMessageID;\n\tchar ucData[ 20 ];\n } xMessage;\n\n uint32_t ulVar = 10UL;\n\n void vATask( void *pvParameters )\n {\n QueueHandle_t xQueue1, xQueue2;\n struct AMessage *pxMessage;\n\n\t// Create a queue capable of containing 10 uint32_t values.\n\txQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\n\n\t// Create a queue capable of containing 10 pointers to AMessage structures.\n\t// These should be passed by pointer as they contain a lot of data.\n\txQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );\n\n\t// ...\n\n\tif( xQueue1 != 0 )\n\t{\n\t\t// Send an uint32_t.  Wait for 10 ticks for space to become\n\t\t// available if necessary.\n\t\tif( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )\n\t\t{\n\t\t\t// Failed to post the message, even after 10 ticks.\n\t\t}\n\t}\n\n\tif( xQueue2 != 0 )\n\t{\n\t\t// Send a pointer to a struct AMessage object.  Don't block if the\n\t\t// queue is already full.\n\t\tpxMessage = & xMessage;\n\t\txQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );\n\t}\n\n\t// ... Rest of task code.\n }\n 
\n * \\defgroup xQueueSend xQueueSend\n * \\ingroup QueueManagement\n */\n#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueSend(\n\t\t\t\t\t\t\t  QueueHandle_t xQueue,\n\t\t\t\t\t\t\t  const void * pvItemToQueue,\n\t\t\t\t\t\t\t  TickType_t xTicksToWait\n\t\t\t\t\t\t );\n * 
\n *\n * This is a macro that calls xQueueGenericSend().  It is included for\n * backward compatibility with versions of FreeRTOS.org that did not\n * include the xQueueSendToFront() and xQueueSendToBack() macros.  It is\n * equivalent to xQueueSendToBack().\n *\n * Post an item on a queue.  The item is queued by copy, not by reference.\n * This function must not be called from an interrupt service routine.\n * See xQueueSendFromISR () for an alternative which may be used in an ISR.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param xTicksToWait The maximum amount of time the task should block\n * waiting for space to become available on the queue, should it already\n * be full.  The call will return immediately if this is set to 0 and the\n * queue is full.  The time is defined in tick periods so the constant\n * portTICK_PERIOD_MS should be used to convert to real time if this is required.\n *\n * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.\n *\n * Example usage:\n   
\n struct AMessage\n {\n\tchar ucMessageID;\n\tchar ucData[ 20 ];\n } xMessage;\n\n uint32_t ulVar = 10UL;\n\n void vATask( void *pvParameters )\n {\n QueueHandle_t xQueue1, xQueue2;\n struct AMessage *pxMessage;\n\n\t// Create a queue capable of containing 10 uint32_t values.\n\txQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\n\n\t// Create a queue capable of containing 10 pointers to AMessage structures.\n\t// These should be passed by pointer as they contain a lot of data.\n\txQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );\n\n\t// ...\n\n\tif( xQueue1 != 0 )\n\t{\n\t\t// Send an uint32_t.  Wait for 10 ticks for space to become\n\t\t// available if necessary.\n\t\tif( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )\n\t\t{\n\t\t\t// Failed to post the message, even after 10 ticks.\n\t\t}\n\t}\n\n\tif( xQueue2 != 0 )\n\t{\n\t\t// Send a pointer to a struct AMessage object.  Don't block if the\n\t\t// queue is already full.\n\t\tpxMessage = & xMessage;\n\t\txQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );\n\t}\n\n\t// ... Rest of task code.\n }\n 
\n * \\defgroup xQueueSend xQueueSend\n * \\ingroup QueueManagement\n */\n#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueOverwrite(\n\t\t\t\t\t\t\t  QueueHandle_t xQueue,\n\t\t\t\t\t\t\t  const void * pvItemToQueue\n\t\t\t\t\t\t );\n * 
\n *\n * Only for use with queues that have a length of one - so the queue is either\n * empty or full.\n *\n * Post an item on a queue.  If the queue is already full then overwrite the\n * value held in the queue.  The item is queued by copy, not by reference.\n *\n * This function must not be called from an interrupt service routine.\n * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR.\n *\n * @param xQueue The handle of the queue to which the data is being sent.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and\n * therefore has the same return values as xQueueSendToFront().  However, pdPASS\n * is the only value that can be returned because xQueueOverwrite() will write\n * to the queue even when the queue is already full.\n *\n * Example usage:\n   
\n\n void vFunction( void *pvParameters )\n {\n QueueHandle_t xQueue;\n uint32_t ulVarToSend, ulValReceived;\n\n\t// Create a queue to hold one uint32_t value.  It is strongly\n\t// recommended *not* to use xQueueOverwrite() on queues that can\n\t// contain more than one value, and doing so will trigger an assertion\n\t// if configASSERT() is defined.\n\txQueue = xQueueCreate( 1, sizeof( uint32_t ) );\n\n\t// Write the value 10 to the queue using xQueueOverwrite().\n\tulVarToSend = 10;\n\txQueueOverwrite( xQueue, &ulVarToSend );\n\n\t// Peeking the queue should now return 10, but leave the value 10 in\n\t// the queue.  A block time of zero is used as it is known that the\n\t// queue holds a value.\n\tulValReceived = 0;\n\txQueuePeek( xQueue, &ulValReceived, 0 );\n\n\tif( ulValReceived != 10 )\n\t{\n\t\t// Error unless the item was removed by a different task.\n\t}\n\n\t// The queue is still full.  Use xQueueOverwrite() to overwrite the\n\t// value held in the queue with 100.\n\tulVarToSend = 100;\n\txQueueOverwrite( xQueue, &ulVarToSend );\n\n\t// This time read from the queue, leaving the queue empty once more.\n\t// A block time of 0 is used again.\n\txQueueReceive( xQueue, &ulValReceived, 0 );\n\n\t// The value read should be the last value written, even though the\n\t// queue was already full when the value was written.\n\tif( ulValReceived != 100 )\n\t{\n\t\t// Error!\n\t}\n\n\t// ...\n}\n 
\n * \\defgroup xQueueOverwrite xQueueOverwrite\n * \\ingroup QueueManagement\n */\n#define xQueueOverwrite( xQueue, pvItemToQueue ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE )\n\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueGenericSend(\n\t\t\t\t\t\t\t\t\tQueueHandle_t xQueue,\n\t\t\t\t\t\t\t\t\tconst void * pvItemToQueue,\n\t\t\t\t\t\t\t\t\tTickType_t xTicksToWait\n\t\t\t\t\t\t\t\t\tBaseType_t xCopyPosition\n\t\t\t\t\t\t\t\t);\n * 
\n *\n * It is preferred that the macros xQueueSend(), xQueueSendToFront() and\n * xQueueSendToBack() are used in place of calling this function directly.\n *\n * Post an item on a queue.  The item is queued by copy, not by reference.\n * This function must not be called from an interrupt service routine.\n * See xQueueSendFromISR () for an alternative which may be used in an ISR.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param xTicksToWait The maximum amount of time the task should block\n * waiting for space to become available on the queue, should it already\n * be full.  The call will return immediately if this is set to 0 and the\n * queue is full.  The time is defined in tick periods so the constant\n * portTICK_PERIOD_MS should be used to convert to real time if this is required.\n *\n * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the\n * item at the back of the queue, or queueSEND_TO_FRONT to place the item\n * at the front of the queue (for high priority messages).\n *\n * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.\n *\n * Example usage:\n   
\n struct AMessage\n {\n\tchar ucMessageID;\n\tchar ucData[ 20 ];\n } xMessage;\n\n uint32_t ulVar = 10UL;\n\n void vATask( void *pvParameters )\n {\n QueueHandle_t xQueue1, xQueue2;\n struct AMessage *pxMessage;\n\n\t// Create a queue capable of containing 10 uint32_t values.\n\txQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );\n\n\t// Create a queue capable of containing 10 pointers to AMessage structures.\n\t// These should be passed by pointer as they contain a lot of data.\n\txQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );\n\n\t// ...\n\n\tif( xQueue1 != 0 )\n\t{\n\t\t// Send an uint32_t.  Wait for 10 ticks for space to become\n\t\t// available if necessary.\n\t\tif( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )\n\t\t{\n\t\t\t// Failed to post the message, even after 10 ticks.\n\t\t}\n\t}\n\n\tif( xQueue2 != 0 )\n\t{\n\t\t// Send a pointer to a struct AMessage object.  Don't block if the\n\t\t// queue is already full.\n\t\tpxMessage = & xMessage;\n\t\txQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );\n\t}\n\n\t// ... Rest of task code.\n }\n 
\n * \\defgroup xQueueSend xQueueSend\n * \\ingroup QueueManagement\n */\nBaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;\n\n/**\n * queue. h\n * 
\n BaseType_t xQueuePeek(\n\t\t\t\t\t\t\t QueueHandle_t xQueue,\n\t\t\t\t\t\t\t void * const pvBuffer,\n\t\t\t\t\t\t\t TickType_t xTicksToWait\n\t\t\t\t\t\t );
\n *\n * Receive an item from a queue without removing the item from the queue.\n * The item is received by copy so a buffer of adequate size must be\n * provided.  The number of bytes copied into the buffer was defined when\n * the queue was created.\n *\n * Successfully received items remain on the queue so will be returned again\n * by the next call, or a call to xQueueReceive().\n *\n * This macro must not be used in an interrupt service routine.  See\n * xQueuePeekFromISR() for an alternative that can be called from an interrupt\n * service routine.\n *\n * @param xQueue The handle to the queue from which the item is to be\n * received.\n *\n * @param pvBuffer Pointer to the buffer into which the received item will\n * be copied.\n *\n * @param xTicksToWait The maximum amount of time the task should block\n * waiting for an item to receive should the queue be empty at the time\n * of the call.\t The time is defined in tick periods so the constant\n * portTICK_PERIOD_MS should be used to convert to real time if this is required.\n * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue\n * is empty.\n *\n * @return pdTRUE if an item was successfully received from the queue,\n * otherwise pdFALSE.\n *\n * Example usage:\n   
\n struct AMessage\n {\n\tchar ucMessageID;\n\tchar ucData[ 20 ];\n } xMessage;\n\n QueueHandle_t xQueue;\n\n // Task to create a queue and post a value.\n void vATask( void *pvParameters )\n {\n struct AMessage *pxMessage;\n\n\t// Create a queue capable of containing 10 pointers to AMessage structures.\n\t// These should be passed by pointer as they contain a lot of data.\n\txQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );\n\tif( xQueue == 0 )\n\t{\n\t\t// Failed to create the queue.\n\t}\n\n\t// ...\n\n\t// Send a pointer to a struct AMessage object.  Don't block if the\n\t// queue is already full.\n\tpxMessage = & xMessage;\n\txQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );\n\n\t// ... Rest of task code.\n }\n\n // Task to peek the data from the queue.\n void vADifferentTask( void *pvParameters )\n {\n struct AMessage *pxRxedMessage;\n\n\tif( xQueue != 0 )\n\t{\n\t\t// Peek a message on the created queue.  Block for 10 ticks if a\n\t\t// message is not immediately available.\n\t\tif( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )\n\t\t{\n\t\t\t// pcRxedMessage now points to the struct AMessage variable posted\n\t\t\t// by vATask, but the item still remains on the queue.\n\t\t}\n\t}\n\n\t// ... Rest of task code.\n }\n 
\n * \\defgroup xQueuePeek xQueuePeek\n * \\ingroup QueueManagement\n */\nBaseType_t xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/**\n * queue. h\n * 
\n BaseType_t xQueuePeekFromISR(\n\t\t\t\t\t\t\t\t\tQueueHandle_t xQueue,\n\t\t\t\t\t\t\t\t\tvoid *pvBuffer,\n\t\t\t\t\t\t\t\t);
\n *\n * A version of xQueuePeek() that can be called from an interrupt service\n * routine (ISR).\n *\n * Receive an item from a queue without removing the item from the queue.\n * The item is received by copy so a buffer of adequate size must be\n * provided.  The number of bytes copied into the buffer was defined when\n * the queue was created.\n *\n * Successfully received items remain on the queue so will be returned again\n * by the next call, or a call to xQueueReceive().\n *\n * @param xQueue The handle to the queue from which the item is to be\n * received.\n *\n * @param pvBuffer Pointer to the buffer into which the received item will\n * be copied.\n *\n * @return pdTRUE if an item was successfully received from the queue,\n * otherwise pdFALSE.\n *\n * \\defgroup xQueuePeekFromISR xQueuePeekFromISR\n * \\ingroup QueueManagement\n */\nBaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueReceive(\n\t\t\t\t\t\t\t\t QueueHandle_t xQueue,\n\t\t\t\t\t\t\t\t void *pvBuffer,\n\t\t\t\t\t\t\t\t TickType_t xTicksToWait\n\t\t\t\t\t\t\t);
\n *\n * Receive an item from a queue.  The item is received by copy so a buffer of\n * adequate size must be provided.  The number of bytes copied into the buffer\n * was defined when the queue was created.\n *\n * Successfully received items are removed from the queue.\n *\n * This function must not be used in an interrupt service routine.  See\n * xQueueReceiveFromISR for an alternative that can.\n *\n * @param xQueue The handle to the queue from which the item is to be\n * received.\n *\n * @param pvBuffer Pointer to the buffer into which the received item will\n * be copied.\n *\n * @param xTicksToWait The maximum amount of time the task should block\n * waiting for an item to receive should the queue be empty at the time\n * of the call.\t xQueueReceive() will return immediately if xTicksToWait\n * is zero and the queue is empty.  The time is defined in tick periods so the\n * constant portTICK_PERIOD_MS should be used to convert to real time if this is\n * required.\n *\n * @return pdTRUE if an item was successfully received from the queue,\n * otherwise pdFALSE.\n *\n * Example usage:\n   
\n struct AMessage\n {\n\tchar ucMessageID;\n\tchar ucData[ 20 ];\n } xMessage;\n\n QueueHandle_t xQueue;\n\n // Task to create a queue and post a value.\n void vATask( void *pvParameters )\n {\n struct AMessage *pxMessage;\n\n\t// Create a queue capable of containing 10 pointers to AMessage structures.\n\t// These should be passed by pointer as they contain a lot of data.\n\txQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );\n\tif( xQueue == 0 )\n\t{\n\t\t// Failed to create the queue.\n\t}\n\n\t// ...\n\n\t// Send a pointer to a struct AMessage object.  Don't block if the\n\t// queue is already full.\n\tpxMessage = & xMessage;\n\txQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );\n\n\t// ... Rest of task code.\n }\n\n // Task to receive from the queue.\n void vADifferentTask( void *pvParameters )\n {\n struct AMessage *pxRxedMessage;\n\n\tif( xQueue != 0 )\n\t{\n\t\t// Receive a message on the created queue.  Block for 10 ticks if a\n\t\t// message is not immediately available.\n\t\tif( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )\n\t\t{\n\t\t\t// pcRxedMessage now points to the struct AMessage variable posted\n\t\t\t// by vATask.\n\t\t}\n\t}\n\n\t// ... Rest of task code.\n }\n 
\n * \\defgroup xQueueReceive xQueueReceive\n * \\ingroup QueueManagement\n */\nBaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/**\n * queue. h\n * 
UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );
\n *\n * Return the number of messages stored in a queue.\n *\n * @param xQueue A handle to the queue being queried.\n *\n * @return The number of messages available in the queue.\n *\n * \\defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting\n * \\ingroup QueueManagement\n */\nUBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\n\n/**\n * queue. h\n * 
UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );
\n *\n * Return the number of free spaces available in a queue.  This is equal to the\n * number of items that can be sent to the queue before the queue becomes full\n * if no items are removed.\n *\n * @param xQueue A handle to the queue being queried.\n *\n * @return The number of spaces available in the queue.\n *\n * \\defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting\n * \\ingroup QueueManagement\n */\nUBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\n\n/**\n * queue. h\n * 
void vQueueDelete( QueueHandle_t xQueue );
\n *\n * Delete a queue - freeing all the memory allocated for storing of items\n * placed on the queue.\n *\n * @param xQueue A handle to the queue to be deleted.\n *\n * \\defgroup vQueueDelete vQueueDelete\n * \\ingroup QueueManagement\n */\nvoid vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueSendToFrontFromISR(\n\t\t\t\t\t\t\t\t\t\t QueueHandle_t xQueue,\n\t\t\t\t\t\t\t\t\t\t const void *pvItemToQueue,\n\t\t\t\t\t\t\t\t\t\t BaseType_t *pxHigherPriorityTaskWoken\n\t\t\t\t\t\t\t\t\t  );\n 
\n *\n * This is a macro that calls xQueueGenericSendFromISR().\n *\n * Post an item to the front of a queue.  It is safe to use this macro from\n * within an interrupt service routine.\n *\n * Items are queued by copy not reference so it is preferable to only\n * queue small items, especially when called from an ISR.  In most cases\n * it would be preferable to store a pointer to the item being queued.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task\n * to unblock, and the unblocked task has a priority higher than the currently\n * running task.  If xQueueSendToFromFromISR() sets this value to pdTRUE then\n * a context switch should be requested before the interrupt is exited.\n *\n * @return pdTRUE if the data was successfully sent to the queue, otherwise\n * errQUEUE_FULL.\n *\n * Example usage for buffered IO (where the ISR can obtain more than one value\n * per call):\n   
\n void vBufferISR( void )\n {\n char cIn;\n BaseType_t xHigherPrioritTaskWoken;\n\n\t// We have not woken a task at the start of the ISR.\n\txHigherPriorityTaskWoken = pdFALSE;\n\n\t// Loop until the buffer is empty.\n\tdo\n\t{\n\t\t// Obtain a byte from the buffer.\n\t\tcIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );\n\n\t\t// Post the byte.\n\t\txQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );\n\n\t} while( portINPUT_BYTE( BUFFER_COUNT ) );\n\n\t// Now the buffer is empty we can switch context if necessary.\n\tif( xHigherPriorityTaskWoken )\n\t{\n\t\ttaskYIELD ();\n\t}\n }\n 
\n *\n * \\defgroup xQueueSendFromISR xQueueSendFromISR\n * \\ingroup QueueManagement\n */\n#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )\n\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueSendToBackFromISR(\n\t\t\t\t\t\t\t\t\t\t QueueHandle_t xQueue,\n\t\t\t\t\t\t\t\t\t\t const void *pvItemToQueue,\n\t\t\t\t\t\t\t\t\t\t BaseType_t *pxHigherPriorityTaskWoken\n\t\t\t\t\t\t\t\t\t  );\n 
\n *\n * This is a macro that calls xQueueGenericSendFromISR().\n *\n * Post an item to the back of a queue.  It is safe to use this macro from\n * within an interrupt service routine.\n *\n * Items are queued by copy not reference so it is preferable to only\n * queue small items, especially when called from an ISR.  In most cases\n * it would be preferable to store a pointer to the item being queued.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task\n * to unblock, and the unblocked task has a priority higher than the currently\n * running task.  If xQueueSendToBackFromISR() sets this value to pdTRUE then\n * a context switch should be requested before the interrupt is exited.\n *\n * @return pdTRUE if the data was successfully sent to the queue, otherwise\n * errQUEUE_FULL.\n *\n * Example usage for buffered IO (where the ISR can obtain more than one value\n * per call):\n   
\n void vBufferISR( void )\n {\n char cIn;\n BaseType_t xHigherPriorityTaskWoken;\n\n\t// We have not woken a task at the start of the ISR.\n\txHigherPriorityTaskWoken = pdFALSE;\n\n\t// Loop until the buffer is empty.\n\tdo\n\t{\n\t\t// Obtain a byte from the buffer.\n\t\tcIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );\n\n\t\t// Post the byte.\n\t\txQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );\n\n\t} while( portINPUT_BYTE( BUFFER_COUNT ) );\n\n\t// Now the buffer is empty we can switch context if necessary.\n\tif( xHigherPriorityTaskWoken )\n\t{\n\t\ttaskYIELD ();\n\t}\n }\n 
\n *\n * \\defgroup xQueueSendFromISR xQueueSendFromISR\n * \\ingroup QueueManagement\n */\n#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueOverwriteFromISR(\n\t\t\t\t\t\t\t  QueueHandle_t xQueue,\n\t\t\t\t\t\t\t  const void * pvItemToQueue,\n\t\t\t\t\t\t\t  BaseType_t *pxHigherPriorityTaskWoken\n\t\t\t\t\t\t );\n * 
\n *\n * A version of xQueueOverwrite() that can be used in an interrupt service\n * routine (ISR).\n *\n * Only for use with queues that can hold a single item - so the queue is either\n * empty or full.\n *\n * Post an item on a queue.  If the queue is already full then overwrite the\n * value held in the queue.  The item is queued by copy, not by reference.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task\n * to unblock, and the unblocked task has a priority higher than the currently\n * running task.  If xQueueOverwriteFromISR() sets this value to pdTRUE then\n * a context switch should be requested before the interrupt is exited.\n *\n * @return xQueueOverwriteFromISR() is a macro that calls\n * xQueueGenericSendFromISR(), and therefore has the same return values as\n * xQueueSendToFrontFromISR().  However, pdPASS is the only value that can be\n * returned because xQueueOverwriteFromISR() will write to the queue even when\n * the queue is already full.\n *\n * Example usage:\n   
\n\n QueueHandle_t xQueue;\n\n void vFunction( void *pvParameters )\n {\n \t// Create a queue to hold one uint32_t value.  It is strongly\n\t// recommended *not* to use xQueueOverwriteFromISR() on queues that can\n\t// contain more than one value, and doing so will trigger an assertion\n\t// if configASSERT() is defined.\n\txQueue = xQueueCreate( 1, sizeof( uint32_t ) );\n}\n\nvoid vAnInterruptHandler( void )\n{\n// xHigherPriorityTaskWoken must be set to pdFALSE before it is used.\nBaseType_t xHigherPriorityTaskWoken = pdFALSE;\nuint32_t ulVarToSend, ulValReceived;\n\n\t// Write the value 10 to the queue using xQueueOverwriteFromISR().\n\tulVarToSend = 10;\n\txQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );\n\n\t// The queue is full, but calling xQueueOverwriteFromISR() again will still\n\t// pass because the value held in the queue will be overwritten with the\n\t// new value.\n\tulVarToSend = 100;\n\txQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );\n\n\t// Reading from the queue will now return 100.\n\n\t// ...\n\n\tif( xHigherPrioritytaskWoken == pdTRUE )\n\t{\n\t\t// Writing to the queue caused a task to unblock and the unblocked task\n\t\t// has a priority higher than or equal to the priority of the currently\n\t\t// executing task (the task this interrupt interrupted).  Perform a context\n\t\t// switch so this interrupt returns directly to the unblocked task.\n\t\tportYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port.\n\t}\n}\n 
\n * \\defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR\n * \\ingroup QueueManagement\n */\n#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueSendFromISR(\n\t\t\t\t\t\t\t\t\t QueueHandle_t xQueue,\n\t\t\t\t\t\t\t\t\t const void *pvItemToQueue,\n\t\t\t\t\t\t\t\t\t BaseType_t *pxHigherPriorityTaskWoken\n\t\t\t\t\t\t\t\t);\n 
\n *\n * This is a macro that calls xQueueGenericSendFromISR().  It is included\n * for backward compatibility with versions of FreeRTOS.org that did not\n * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR()\n * macros.\n *\n * Post an item to the back of a queue.  It is safe to use this function from\n * within an interrupt service routine.\n *\n * Items are queued by copy not reference so it is preferable to only\n * queue small items, especially when called from an ISR.  In most cases\n * it would be preferable to store a pointer to the item being queued.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task\n * to unblock, and the unblocked task has a priority higher than the currently\n * running task.  If xQueueSendFromISR() sets this value to pdTRUE then\n * a context switch should be requested before the interrupt is exited.\n *\n * @return pdTRUE if the data was successfully sent to the queue, otherwise\n * errQUEUE_FULL.\n *\n * Example usage for buffered IO (where the ISR can obtain more than one value\n * per call):\n   
\n void vBufferISR( void )\n {\n char cIn;\n BaseType_t xHigherPriorityTaskWoken;\n\n\t// We have not woken a task at the start of the ISR.\n\txHigherPriorityTaskWoken = pdFALSE;\n\n\t// Loop until the buffer is empty.\n\tdo\n\t{\n\t\t// Obtain a byte from the buffer.\n\t\tcIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );\n\n\t\t// Post the byte.\n\t\txQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );\n\n\t} while( portINPUT_BYTE( BUFFER_COUNT ) );\n\n\t// Now the buffer is empty we can switch context if necessary.\n\tif( xHigherPriorityTaskWoken )\n\t{\n\t\t// Actual macro used here is port specific.\n\t\tportYIELD_FROM_ISR ();\n\t}\n }\n 
\n *\n * \\defgroup xQueueSendFromISR xQueueSendFromISR\n * \\ingroup QueueManagement\n */\n#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueGenericSendFromISR(\n\t\t\t\t\t\t\t\t\t\t   QueueHandle_t\t\txQueue,\n\t\t\t\t\t\t\t\t\t\t   const\tvoid\t*pvItemToQueue,\n\t\t\t\t\t\t\t\t\t\t   BaseType_t\t*pxHigherPriorityTaskWoken,\n\t\t\t\t\t\t\t\t\t\t   BaseType_t\txCopyPosition\n\t\t\t\t\t\t\t\t\t   );\n 
\n *\n * It is preferred that the macros xQueueSendFromISR(),\n * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place\n * of calling this function directly.  xQueueGiveFromISR() is an\n * equivalent for use by semaphores that don't actually copy any data.\n *\n * Post an item on a queue.  It is safe to use this function from within an\n * interrupt service routine.\n *\n * Items are queued by copy not reference so it is preferable to only\n * queue small items, especially when called from an ISR.  In most cases\n * it would be preferable to store a pointer to the item being queued.\n *\n * @param xQueue The handle to the queue on which the item is to be posted.\n *\n * @param pvItemToQueue A pointer to the item that is to be placed on the\n * queue.  The size of the items the queue will hold was defined when the\n * queue was created, so this many bytes will be copied from pvItemToQueue\n * into the queue storage area.\n *\n * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task\n * to unblock, and the unblocked task has a priority higher than the currently\n * running task.  If xQueueGenericSendFromISR() sets this value to pdTRUE then\n * a context switch should be requested before the interrupt is exited.\n *\n * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the\n * item at the back of the queue, or queueSEND_TO_FRONT to place the item\n * at the front of the queue (for high priority messages).\n *\n * @return pdTRUE if the data was successfully sent to the queue, otherwise\n * errQUEUE_FULL.\n *\n * Example usage for buffered IO (where the ISR can obtain more than one value\n * per call):\n   
\n void vBufferISR( void )\n {\n char cIn;\n BaseType_t xHigherPriorityTaskWokenByPost;\n\n\t// We have not woken a task at the start of the ISR.\n\txHigherPriorityTaskWokenByPost = pdFALSE;\n\n\t// Loop until the buffer is empty.\n\tdo\n\t{\n\t\t// Obtain a byte from the buffer.\n\t\tcIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );\n\n\t\t// Post each byte.\n\t\txQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );\n\n\t} while( portINPUT_BYTE( BUFFER_COUNT ) );\n\n\t// Now the buffer is empty we can switch context if necessary.  Note that the\n\t// name of the yield function required is port specific.\n\tif( xHigherPriorityTaskWokenByPost )\n\t{\n\t\ttaskYIELD_YIELD_FROM_ISR();\n\t}\n }\n 
\n *\n * \\defgroup xQueueSendFromISR xQueueSendFromISR\n * \\ingroup QueueManagement\n */\nBaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;\nBaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n\n/**\n * queue. h\n * 
\n BaseType_t xQueueReceiveFromISR(\n\t\t\t\t\t\t\t\t\t   QueueHandle_t\txQueue,\n\t\t\t\t\t\t\t\t\t   void\t*pvBuffer,\n\t\t\t\t\t\t\t\t\t   BaseType_t *pxTaskWoken\n\t\t\t\t\t\t\t\t   );\n * 
\n *\n * Receive an item from a queue.  It is safe to use this function from within an\n * interrupt service routine.\n *\n * @param xQueue The handle to the queue from which the item is to be\n * received.\n *\n * @param pvBuffer Pointer to the buffer into which the received item will\n * be copied.\n *\n * @param pxTaskWoken A task may be blocked waiting for space to become\n * available on the queue.  If xQueueReceiveFromISR causes such a task to\n * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will\n * remain unchanged.\n *\n * @return pdTRUE if an item was successfully received from the queue,\n * otherwise pdFALSE.\n *\n * Example usage:\n   
\n\n QueueHandle_t xQueue;\n\n // Function to create a queue and post some values.\n void vAFunction( void *pvParameters )\n {\n char cValueToPost;\n const TickType_t xTicksToWait = ( TickType_t )0xff;\n\n\t// Create a queue capable of containing 10 characters.\n\txQueue = xQueueCreate( 10, sizeof( char ) );\n\tif( xQueue == 0 )\n\t{\n\t\t// Failed to create the queue.\n\t}\n\n\t// ...\n\n\t// Post some characters that will be used within an ISR.  If the queue\n\t// is full then this task will block for xTicksToWait ticks.\n\tcValueToPost = 'a';\n\txQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );\n\tcValueToPost = 'b';\n\txQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );\n\n\t// ... keep posting characters ... this task may block when the queue\n\t// becomes full.\n\n\tcValueToPost = 'c';\n\txQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );\n }\n\n // ISR that outputs all the characters received on the queue.\n void vISR_Routine( void )\n {\n BaseType_t xTaskWokenByReceive = pdFALSE;\n char cRxedChar;\n\n\twhile( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )\n\t{\n\t\t// A character was received.  Output the character now.\n\t\tvOutputCharacter( cRxedChar );\n\n\t\t// If removing the character from the queue woke the task that was\n\t\t// posting onto the queue cTaskWokenByReceive will have been set to\n\t\t// pdTRUE.  No matter how many times this loop iterates only one\n\t\t// task will be woken.\n\t}\n\n\tif( cTaskWokenByPost != ( char ) pdFALSE;\n\t{\n\t\ttaskYIELD ();\n\t}\n }\n 
\n * \\defgroup xQueueReceiveFromISR xQueueReceiveFromISR\n * \\ingroup QueueManagement\n */\nBaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n\n/*\n * Utilities to query queues that are safe to use from an ISR.  These utilities\n * should be used only from witin an ISR, or within a critical section.\n */\nBaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\nBaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\nUBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\n\n/*\n * The functions defined above are for passing data to and from tasks.  The\n * functions below are the equivalents for passing data to and from\n * co-routines.\n *\n * These functions are called from the co-routine macro implementation and\n * should not be called directly from application code.  Instead use the macro\n * wrappers defined within croutine.h.\n */\nBaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken );\nBaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxTaskWoken );\nBaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait );\nBaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait );\n\n/*\n * For internal use only.  Use xSemaphoreCreateMutex(),\n * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling\n * these functions directly.\n */\nQueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\nQueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;\nQueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;\nQueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;\nBaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\nTaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;\nTaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;\n\n/*\n * For internal use only.  Use xSemaphoreTakeMutexRecursive() or\n * xSemaphoreGiveMutexRecursive() instead of calling these functions directly.\n */\nBaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\nBaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;\n\n/*\n * Reset a queue back to its original empty state.  The return value is now\n * obsolete and is always set to pdPASS.\n */\n#define xQueueReset( xQueue ) xQueueGenericReset( xQueue, pdFALSE )\n\n/*\n * The registry is provided as a means for kernel aware debuggers to\n * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add\n * a queue, semaphore or mutex handle to the registry if you want the handle\n * to be available to a kernel aware debugger.  If you are not using a kernel\n * aware debugger then this function can be ignored.\n *\n * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the\n * registry can hold.  configQUEUE_REGISTRY_SIZE must be greater than 0\n * within FreeRTOSConfig.h for the registry to be available.  Its value\n * does not effect the number of queues, semaphores and mutexes that can be\n * created - just the number that the registry can hold.\n *\n * @param xQueue The handle of the queue being added to the registry.  This\n * is the handle returned by a call to xQueueCreate().  Semaphore and mutex\n * handles can also be passed in here.\n *\n * @param pcName The name to be associated with the handle.  This is the\n * name that the kernel aware debugger will display.  The queue registry only\n * stores a pointer to the string - so the string must be persistent (global or\n * preferably in ROM/Flash), not on the stack.\n */\n#if( configQUEUE_REGISTRY_SIZE > 0 )\n\tvoid vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n#endif\n\n/*\n * The registry is provided as a means for kernel aware debuggers to\n * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add\n * a queue, semaphore or mutex handle to the registry if you want the handle\n * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to\n * remove the queue, semaphore or mutex from the register.  If you are not using\n * a kernel aware debugger then this function can be ignored.\n *\n * @param xQueue The handle of the queue being removed from the registry.\n */\n#if( configQUEUE_REGISTRY_SIZE > 0 )\n\tvoid vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\n#endif\n\n/*\n * The queue registry is provided as a means for kernel aware debuggers to\n * locate queues, semaphores and mutexes.  Call pcQueueGetName() to look\n * up and return the name of a queue in the queue registry from the queue's\n * handle.\n *\n * @param xQueue The handle of the queue the name of which will be returned.\n * @return If the queue is in the registry then a pointer to the name of the\n * queue is returned.  If the queue is not in the registry then NULL is\n * returned.\n */\n#if( configQUEUE_REGISTRY_SIZE > 0 )\n\tconst char *pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n#endif\n\n/*\n * Generic version of the function used to creaet a queue using dynamic memory\n * allocation.  This is called by other functions and macros that create other\n * RTOS objects that use the queue structure as their base.\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\tQueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\n#endif\n\n/*\n * Generic version of the function used to creaet a queue using dynamic memory\n * allocation.  This is called by other functions and macros that create other\n * RTOS objects that use the queue structure as their base.\n */\n#if( configSUPPORT_STATIC_ALLOCATION == 1 )\n\tQueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;\n#endif\n\n/*\n * Queue sets provide a mechanism to allow a task to block (pend) on a read\n * operation from multiple queues or semaphores simultaneously.\n *\n * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this\n * function.\n *\n * A queue set must be explicitly created using a call to xQueueCreateSet()\n * before it can be used.  Once created, standard FreeRTOS queues and semaphores\n * can be added to the set using calls to xQueueAddToSet().\n * xQueueSelectFromSet() is then used to determine which, if any, of the queues\n * or semaphores contained in the set is in a state where a queue read or\n * semaphore take operation would be successful.\n *\n * Note 1:  See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html\n * for reasons why queue sets are very rarely needed in practice as there are\n * simpler methods of blocking on multiple objects.\n *\n * Note 2:  Blocking on a queue set that contains a mutex will not cause the\n * mutex holder to inherit the priority of the blocked task.\n *\n * Note 3:  An additional 4 bytes of RAM is required for each space in a every\n * queue added to a queue set.  Therefore counting semaphores that have a high\n * maximum count value should not be added to a queue set.\n *\n * Note 4:  A receive (in the case of a queue) or take (in the case of a\n * semaphore) operation must not be performed on a member of a queue set unless\n * a call to xQueueSelectFromSet() has first returned a handle to that set member.\n *\n * @param uxEventQueueLength Queue sets store events that occur on\n * the queues and semaphores contained in the set.  uxEventQueueLength specifies\n * the maximum number of events that can be queued at once.  To be absolutely\n * certain that events are not lost uxEventQueueLength should be set to the\n * total sum of the length of the queues added to the set, where binary\n * semaphores and mutexes have a length of 1, and counting semaphores have a\n * length set by their maximum count value.  Examples:\n *  + If a queue set is to hold a queue of length 5, another queue of length 12,\n *    and a binary semaphore, then uxEventQueueLength should be set to\n *    (5 + 12 + 1), or 18.\n *  + If a queue set is to hold three binary semaphores then uxEventQueueLength\n *    should be set to (1 + 1 + 1 ), or 3.\n *  + If a queue set is to hold a counting semaphore that has a maximum count of\n *    5, and a counting semaphore that has a maximum count of 3, then\n *    uxEventQueueLength should be set to (5 + 3), or 8.\n *\n * @return If the queue set is created successfully then a handle to the created\n * queue set is returned.  Otherwise NULL is returned.\n */\nQueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;\n\n/*\n * Adds a queue or semaphore to a queue set that was previously created by a\n * call to xQueueCreateSet().\n *\n * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this\n * function.\n *\n * Note 1:  A receive (in the case of a queue) or take (in the case of a\n * semaphore) operation must not be performed on a member of a queue set unless\n * a call to xQueueSelectFromSet() has first returned a handle to that set member.\n *\n * @param xQueueOrSemaphore The handle of the queue or semaphore being added to\n * the queue set (cast to an QueueSetMemberHandle_t type).\n *\n * @param xQueueSet The handle of the queue set to which the queue or semaphore\n * is being added.\n *\n * @return If the queue or semaphore was successfully added to the queue set\n * then pdPASS is returned.  If the queue could not be successfully added to the\n * queue set because it is already a member of a different queue set then pdFAIL\n * is returned.\n */\nBaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;\n\n/*\n * Removes a queue or semaphore from a queue set.  A queue or semaphore can only\n * be removed from a set if the queue or semaphore is empty.\n *\n * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this\n * function.\n *\n * @param xQueueOrSemaphore The handle of the queue or semaphore being removed\n * from the queue set (cast to an QueueSetMemberHandle_t type).\n *\n * @param xQueueSet The handle of the queue set in which the queue or semaphore\n * is included.\n *\n * @return If the queue or semaphore was successfully removed from the queue set\n * then pdPASS is returned.  If the queue was not in the queue set, or the\n * queue (or semaphore) was not empty, then pdFAIL is returned.\n */\nBaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;\n\n/*\n * xQueueSelectFromSet() selects from the members of a queue set a queue or\n * semaphore that either contains data (in the case of a queue) or is available\n * to take (in the case of a semaphore).  xQueueSelectFromSet() effectively\n * allows a task to block (pend) on a read operation on all the queues and\n * semaphores in a queue set simultaneously.\n *\n * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this\n * function.\n *\n * Note 1:  See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html\n * for reasons why queue sets are very rarely needed in practice as there are\n * simpler methods of blocking on multiple objects.\n *\n * Note 2:  Blocking on a queue set that contains a mutex will not cause the\n * mutex holder to inherit the priority of the blocked task.\n *\n * Note 3:  A receive (in the case of a queue) or take (in the case of a\n * semaphore) operation must not be performed on a member of a queue set unless\n * a call to xQueueSelectFromSet() has first returned a handle to that set member.\n *\n * @param xQueueSet The queue set on which the task will (potentially) block.\n *\n * @param xTicksToWait The maximum time, in ticks, that the calling task will\n * remain in the Blocked state (with other tasks executing) to wait for a member\n * of the queue set to be ready for a successful queue read or semaphore take\n * operation.\n *\n * @return xQueueSelectFromSet() will return the handle of a queue (cast to\n * a QueueSetMemberHandle_t type) contained in the queue set that contains data,\n * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained\n * in the queue set that is available, or NULL if no such queue or semaphore\n * exists before before the specified block time expires.\n */\nQueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/*\n * A version of xQueueSelectFromSet() that can be used from an ISR.\n */\nQueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;\n\n/* Not public API functions. */\nvoid vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;\nBaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;\nvoid vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION;\nUBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\nuint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* QUEUE_H */\n\n"
  },
  {
    "path": "include/rtos/freertos/semphr.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n#ifndef SEMAPHORE_H\n#define SEMAPHORE_H\n\n#ifndef INC_FREERTOS_H\n\t#error \"include FreeRTOS.h\" must appear in source files before \"include semphr.h\"\n#endif\n\n#include \"queue.h\"\n\ntypedef QueueHandle_t SemaphoreHandle_t;\n\n#define semBINARY_SEMAPHORE_QUEUE_LENGTH\t( ( uint8_t ) 1U )\n#define semSEMAPHORE_QUEUE_ITEM_LENGTH\t\t( ( uint8_t ) 0U )\n#define semGIVE_BLOCK_TIME\t\t\t\t\t( ( TickType_t ) 0U )\n\n\n/**\n * semphr. h\n * 
vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore )
\n *\n * In many usage scenarios it is faster and more memory efficient to use a\n * direct to task notification in place of a binary semaphore!\n * http://www.freertos.org/RTOS-task-notifications.html\n *\n * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the\n * xSemaphoreCreateBinary() function.  Note that binary semaphores created using\n * the vSemaphoreCreateBinary() macro are created in a state such that the\n * first call to 'take' the semaphore would pass, whereas binary semaphores\n * created using xSemaphoreCreateBinary() are created in a state such that the\n * the semaphore must first be 'given' before it can be 'taken'.\n *\n * Macro that implements a semaphore by using the existing queue mechanism.\n * The queue length is 1 as this is a binary semaphore.  The data size is 0\n * as we don't want to actually store any data - we just want to know if the\n * queue is empty or full.\n *\n * This type of semaphore can be used for pure synchronisation between tasks or\n * between an interrupt and a task.  The semaphore need not be given back once\n * obtained, so one task/interrupt can continuously 'give' the semaphore while\n * another continuously 'takes' the semaphore.  For this reason this type of\n * semaphore does not use a priority inheritance mechanism.  For an alternative\n * that does use priority inheritance see xSemaphoreCreateMutex().\n *\n * @param xSemaphore Handle to the created semaphore.  Should be of type SemaphoreHandle_t.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore = NULL;\n\n void vATask( void * pvParameters )\n {\n    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().\n    // This is a macro so pass the variable in directly.\n    vSemaphoreCreateBinary( xSemaphore );\n\n    if( xSemaphore != NULL )\n    {\n        // The semaphore was created successfully.\n        // The semaphore can now be used.\n    }\n }\n 
\n * \\defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary\n * \\ingroup Semaphores\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\t#define vSemaphoreCreateBinary( xSemaphore )\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE );\t\\\n\t\t\tif( ( xSemaphore ) != NULL )\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t( void ) xSemaphoreGive( ( xSemaphore ) );\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t}\n#endif\n\n/**\n * semphr. h\n * 
SemaphoreHandle_t xSemaphoreCreateBinary( void )
\n *\n * Creates a new binary semaphore instance, and returns a handle by which the\n * new semaphore can be referenced.\n *\n * In many usage scenarios it is faster and more memory efficient to use a\n * direct to task notification in place of a binary semaphore!\n * http://www.freertos.org/RTOS-task-notifications.html\n *\n * Internally, within the FreeRTOS implementation, binary semaphores use a block\n * of memory, in which the semaphore structure is stored.  If a binary semaphore\n * is created using xSemaphoreCreateBinary() then the required memory is\n * automatically dynamically allocated inside the xSemaphoreCreateBinary()\n * function.  (see http://www.freertos.org/a00111.html).  If a binary semaphore\n * is created using xSemaphoreCreateBinaryStatic() then the application writer\n * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a\n * binary semaphore to be created without using any dynamic memory allocation.\n *\n * The old vSemaphoreCreateBinary() macro is now deprecated in favour of this\n * xSemaphoreCreateBinary() function.  Note that binary semaphores created using\n * the vSemaphoreCreateBinary() macro are created in a state such that the\n * first call to 'take' the semaphore would pass, whereas binary semaphores\n * created using xSemaphoreCreateBinary() are created in a state such that the\n * the semaphore must first be 'given' before it can be 'taken'.\n *\n * This type of semaphore can be used for pure synchronisation between tasks or\n * between an interrupt and a task.  The semaphore need not be given back once\n * obtained, so one task/interrupt can continuously 'give' the semaphore while\n * another continuously 'takes' the semaphore.  For this reason this type of\n * semaphore does not use a priority inheritance mechanism.  For an alternative\n * that does use priority inheritance see xSemaphoreCreateMutex().\n *\n * @return Handle to the created semaphore, or NULL if the memory required to\n * hold the semaphore's data structures could not be allocated.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore = NULL;\n\n void vATask( void * pvParameters )\n {\n    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().\n    // This is a macro so pass the variable in directly.\n    xSemaphore = xSemaphoreCreateBinary();\n\n    if( xSemaphore != NULL )\n    {\n        // The semaphore was created successfully.\n        // The semaphore can now be used.\n    }\n }\n 
\n * \\defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary\n * \\ingroup Semaphores\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\t#define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )\n#endif\n\n/**\n * semphr. h\n * 
SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer )
\n *\n * Creates a new binary semaphore instance, and returns a handle by which the\n * new semaphore can be referenced.\n *\n * NOTE: In many usage scenarios it is faster and more memory efficient to use a\n * direct to task notification in place of a binary semaphore!\n * http://www.freertos.org/RTOS-task-notifications.html\n *\n * Internally, within the FreeRTOS implementation, binary semaphores use a block\n * of memory, in which the semaphore structure is stored.  If a binary semaphore\n * is created using xSemaphoreCreateBinary() then the required memory is\n * automatically dynamically allocated inside the xSemaphoreCreateBinary()\n * function.  (see http://www.freertos.org/a00111.html).  If a binary semaphore\n * is created using xSemaphoreCreateBinaryStatic() then the application writer\n * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a\n * binary semaphore to be created without using any dynamic memory allocation.\n *\n * This type of semaphore can be used for pure synchronisation between tasks or\n * between an interrupt and a task.  The semaphore need not be given back once\n * obtained, so one task/interrupt can continuously 'give' the semaphore while\n * another continuously 'takes' the semaphore.  For this reason this type of\n * semaphore does not use a priority inheritance mechanism.  For an alternative\n * that does use priority inheritance see xSemaphoreCreateMutex().\n *\n * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t,\n * which will then be used to hold the semaphore's data structure, removing the\n * need for the memory to be allocated dynamically.\n *\n * @return If the semaphore is created then a handle to the created semaphore is\n * returned.  If pxSemaphoreBuffer is NULL then NULL is returned.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore = NULL;\n StaticSemaphore_t xSemaphoreBuffer;\n\n void vATask( void * pvParameters )\n {\n    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().\n    // The semaphore's data structures will be placed in the xSemaphoreBuffer\n    // variable, the address of which is passed into the function.  The\n    // function's parameter is not NULL, so the function will not attempt any\n    // dynamic memory allocation, and therefore the function will not return\n    // return NULL.\n    xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer );\n\n    // Rest of task code goes here.\n }\n 
\n * \\defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic\n * \\ingroup Semaphores\n */\n#if( configSUPPORT_STATIC_ALLOCATION == 1 )\n\t#define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )\n#endif /* configSUPPORT_STATIC_ALLOCATION */\n\n/**\n * semphr. h\n * 
xSemaphoreTake(\n *                   SemaphoreHandle_t xSemaphore,\n *                   TickType_t xBlockTime\n *               )
\n *\n * Macro to obtain a semaphore.  The semaphore must have previously been\n * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or\n * xSemaphoreCreateCounting().\n *\n * @param xSemaphore A handle to the semaphore being taken - obtained when\n * the semaphore was created.\n *\n * @param xBlockTime The time in ticks to wait for the semaphore to become\n * available.  The macro portTICK_PERIOD_MS can be used to convert this to a\n * real time.  A block time of zero can be used to poll the semaphore.  A block\n * time of portMAX_DELAY can be used to block indefinitely (provided\n * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h).\n *\n * @return pdTRUE if the semaphore was obtained.  pdFALSE\n * if xBlockTime expired without the semaphore becoming available.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore = NULL;\n\n // A task that creates a semaphore.\n void vATask( void * pvParameters )\n {\n    // Create the semaphore to guard a shared resource.\n    xSemaphore = xSemaphoreCreateBinary();\n }\n\n // A task that uses the semaphore.\n void vAnotherTask( void * pvParameters )\n {\n    // ... Do other things.\n\n    if( xSemaphore != NULL )\n    {\n        // See if we can obtain the semaphore.  If the semaphore is not available\n        // wait 10 ticks to see if it becomes free.\n        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )\n        {\n            // We were able to obtain the semaphore and can now access the\n            // shared resource.\n\n            // ...\n\n            // We have finished accessing the shared resource.  Release the\n            // semaphore.\n            xSemaphoreGive( xSemaphore );\n        }\n        else\n        {\n            // We could not obtain the semaphore and can therefore not access\n            // the shared resource safely.\n        }\n    }\n }\n 
\n * \\defgroup xSemaphoreTake xSemaphoreTake\n * \\ingroup Semaphores\n */\n#define xSemaphoreTake( xSemaphore, xBlockTime )\t\txQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) )\n\n/**\n * semphr. h\n * xSemaphoreTakeRecursive(\n *                          SemaphoreHandle_t xMutex,\n *                          TickType_t xBlockTime\n *                        )\n *\n * Macro to recursively obtain, or 'take', a mutex type semaphore.\n * The mutex must have previously been created using a call to\n * xSemaphoreCreateRecursiveMutex();\n *\n * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this\n * macro to be available.\n *\n * This macro must not be used on mutexes created using xSemaphoreCreateMutex().\n *\n * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex\n * doesn't become available again until the owner has called\n * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,\n * if a task successfully 'takes' the same mutex 5 times then the mutex will\n * not be available to any other task until it has also  'given' the mutex back\n * exactly five times.\n *\n * @param xMutex A handle to the mutex being obtained.  This is the\n * handle returned by xSemaphoreCreateRecursiveMutex();\n *\n * @param xBlockTime The time in ticks to wait for the semaphore to become\n * available.  The macro portTICK_PERIOD_MS can be used to convert this to a\n * real time.  A block time of zero can be used to poll the semaphore.  If\n * the task already owns the semaphore then xSemaphoreTakeRecursive() will\n * return immediately no matter what the value of xBlockTime.\n *\n * @return pdTRUE if the semaphore was obtained.  pdFALSE if xBlockTime\n * expired without the semaphore becoming available.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xMutex = NULL;\n\n // A task that creates a mutex.\n void vATask( void * pvParameters )\n {\n    // Create the mutex to guard a shared resource.\n    xMutex = xSemaphoreCreateRecursiveMutex();\n }\n\n // A task that uses the mutex.\n void vAnotherTask( void * pvParameters )\n {\n    // ... Do other things.\n\n    if( xMutex != NULL )\n    {\n        // See if we can obtain the mutex.  If the mutex is not available\n        // wait 10 ticks to see if it becomes free.\n        if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )\n        {\n            // We were able to obtain the mutex and can now access the\n            // shared resource.\n\n            // ...\n            // For some reason due to the nature of the code further calls to\n            // xSemaphoreTakeRecursive() are made on the same mutex.  In real\n            // code these would not be just sequential calls as this would make\n            // no sense.  Instead the calls are likely to be buried inside\n            // a more complex call structure.\n            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );\n            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );\n\n            // The mutex has now been 'taken' three times, so will not be\n            // available to another task until it has also been given back\n            // three times.  Again it is unlikely that real code would have\n            // these calls sequentially, but instead buried in a more complex\n            // call structure.  This is just for illustrative purposes.\n            xSemaphoreGiveRecursive( xMutex );\n            xSemaphoreGiveRecursive( xMutex );\n            xSemaphoreGiveRecursive( xMutex );\n\n            // Now the mutex can be taken by other tasks.\n        }\n        else\n        {\n            // We could not obtain the mutex and can therefore not access\n            // the shared resource safely.\n        }\n    }\n }\n 
\n * \\defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive\n * \\ingroup Semaphores\n */\n#if( configUSE_RECURSIVE_MUTEXES == 1 )\n\t#define xSemaphoreTakeRecursive( xMutex, xBlockTime )\txQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) )\n#endif\n\n/**\n * semphr. h\n * 
xSemaphoreGive( SemaphoreHandle_t xSemaphore )
\n *\n * Macro to release a semaphore.  The semaphore must have previously been\n * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or\n * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake().\n *\n * This macro must not be used from an ISR.  See xSemaphoreGiveFromISR () for\n * an alternative which can be used from an ISR.\n *\n * This macro must also not be used on semaphores created using\n * xSemaphoreCreateRecursiveMutex().\n *\n * @param xSemaphore A handle to the semaphore being released.  This is the\n * handle returned when the semaphore was created.\n *\n * @return pdTRUE if the semaphore was released.  pdFALSE if an error occurred.\n * Semaphores are implemented using queues.  An error can occur if there is\n * no space on the queue to post a message - indicating that the\n * semaphore was not first obtained correctly.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore = NULL;\n\n void vATask( void * pvParameters )\n {\n    // Create the semaphore to guard a shared resource.\n    xSemaphore = vSemaphoreCreateBinary();\n\n    if( xSemaphore != NULL )\n    {\n        if( xSemaphoreGive( xSemaphore ) != pdTRUE )\n        {\n            // We would expect this call to fail because we cannot give\n            // a semaphore without first \"taking\" it!\n        }\n\n        // Obtain the semaphore - don't block if the semaphore is not\n        // immediately available.\n        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )\n        {\n            // We now have the semaphore and can access the shared resource.\n\n            // ...\n\n            // We have finished accessing the shared resource so can free the\n            // semaphore.\n            if( xSemaphoreGive( xSemaphore ) != pdTRUE )\n            {\n                // We would not expect this call to fail because we must have\n                // obtained the semaphore to get here.\n            }\n        }\n    }\n }\n 
\n * \\defgroup xSemaphoreGive xSemaphoreGive\n * \\ingroup Semaphores\n */\n#define xSemaphoreGive( xSemaphore )\t\txQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )\n\n/**\n * semphr. h\n * 
xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex )
\n *\n * Macro to recursively release, or 'give', a mutex type semaphore.\n * The mutex must have previously been created using a call to\n * xSemaphoreCreateRecursiveMutex();\n *\n * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this\n * macro to be available.\n *\n * This macro must not be used on mutexes created using xSemaphoreCreateMutex().\n *\n * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex\n * doesn't become available again until the owner has called\n * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,\n * if a task successfully 'takes' the same mutex 5 times then the mutex will\n * not be available to any other task until it has also  'given' the mutex back\n * exactly five times.\n *\n * @param xMutex A handle to the mutex being released, or 'given'.  This is the\n * handle returned by xSemaphoreCreateMutex();\n *\n * @return pdTRUE if the semaphore was given.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xMutex = NULL;\n\n // A task that creates a mutex.\n void vATask( void * pvParameters )\n {\n    // Create the mutex to guard a shared resource.\n    xMutex = xSemaphoreCreateRecursiveMutex();\n }\n\n // A task that uses the mutex.\n void vAnotherTask( void * pvParameters )\n {\n    // ... Do other things.\n\n    if( xMutex != NULL )\n    {\n        // See if we can obtain the mutex.  If the mutex is not available\n        // wait 10 ticks to see if it becomes free.\n        if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )\n        {\n            // We were able to obtain the mutex and can now access the\n            // shared resource.\n\n            // ...\n            // For some reason due to the nature of the code further calls to\n\t\t\t// xSemaphoreTakeRecursive() are made on the same mutex.  In real\n\t\t\t// code these would not be just sequential calls as this would make\n\t\t\t// no sense.  Instead the calls are likely to be buried inside\n\t\t\t// a more complex call structure.\n            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );\n            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );\n\n            // The mutex has now been 'taken' three times, so will not be\n\t\t\t// available to another task until it has also been given back\n\t\t\t// three times.  Again it is unlikely that real code would have\n\t\t\t// these calls sequentially, it would be more likely that the calls\n\t\t\t// to xSemaphoreGiveRecursive() would be called as a call stack\n\t\t\t// unwound.  This is just for demonstrative purposes.\n            xSemaphoreGiveRecursive( xMutex );\n\t\t\txSemaphoreGiveRecursive( xMutex );\n\t\t\txSemaphoreGiveRecursive( xMutex );\n\n\t\t\t// Now the mutex can be taken by other tasks.\n        }\n        else\n        {\n            // We could not obtain the mutex and can therefore not access\n            // the shared resource safely.\n        }\n    }\n }\n 
\n * \\defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive\n * \\ingroup Semaphores\n */\n#if( configUSE_RECURSIVE_MUTEXES == 1 )\n\t#define xSemaphoreGiveRecursive( xMutex )\txQueueGiveMutexRecursive( ( xMutex ) )\n#endif\n\n/**\n * semphr. h\n * 
\n xSemaphoreGiveFromISR(\n                          SemaphoreHandle_t xSemaphore,\n                          BaseType_t *pxHigherPriorityTaskWoken\n                      )
\n *\n * Macro to  release a semaphore.  The semaphore must have previously been\n * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting().\n *\n * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())\n * must not be used with this macro.\n *\n * This macro can be used from an ISR.\n *\n * @param xSemaphore A handle to the semaphore being released.  This is the\n * handle returned when the semaphore was created.\n *\n * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task\n * to unblock, and the unblocked task has a priority higher than the currently\n * running task.  If xSemaphoreGiveFromISR() sets this value to pdTRUE then\n * a context switch should be requested before the interrupt is exited.\n *\n * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL.\n *\n * Example usage:\n 
\n \\#define LONG_TIME 0xffff\n \\#define TICKS_TO_WAIT\t10\n SemaphoreHandle_t xSemaphore = NULL;\n\n // Repetitive task.\n void vATask( void * pvParameters )\n {\n    for( ;; )\n    {\n        // We want this task to run every 10 ticks of a timer.  The semaphore\n        // was created before this task was started.\n\n        // Block waiting for the semaphore to become available.\n        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )\n        {\n            // It is time to execute.\n\n            // ...\n\n            // We have finished our task.  Return to the top of the loop where\n            // we will block on the semaphore until it is time to execute\n            // again.  Note when using the semaphore for synchronisation with an\n\t\t\t// ISR in this manner there is no need to 'give' the semaphore back.\n        }\n    }\n }\n\n // Timer ISR\n void vTimerISR( void * pvParameters )\n {\n static uint8_t ucLocalTickCount = 0;\n static BaseType_t xHigherPriorityTaskWoken;\n\n    // A timer tick has occurred.\n\n    // ... Do other time functions.\n\n    // Is it time for vATask () to run?\n\txHigherPriorityTaskWoken = pdFALSE;\n    ucLocalTickCount++;\n    if( ucLocalTickCount >= TICKS_TO_WAIT )\n    {\n        // Unblock the task by releasing the semaphore.\n        xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );\n\n        // Reset the count so we release the semaphore again in 10 ticks time.\n        ucLocalTickCount = 0;\n    }\n\n    if( xHigherPriorityTaskWoken != pdFALSE )\n    {\n        // We can force a context switch here.  Context switching from an\n        // ISR uses port specific syntax.  Check the demo task for your port\n        // to find the syntax required.\n    }\n }\n 
\n * \\defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR\n * \\ingroup Semaphores\n */\n#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken )\txQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) )\n\n/**\n * semphr. h\n * 
\n xSemaphoreTakeFromISR(\n                          SemaphoreHandle_t xSemaphore,\n                          BaseType_t *pxHigherPriorityTaskWoken\n                      )
\n *\n * Macro to  take a semaphore from an ISR.  The semaphore must have\n * previously been created with a call to xSemaphoreCreateBinary() or\n * xSemaphoreCreateCounting().\n *\n * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())\n * must not be used with this macro.\n *\n * This macro can be used from an ISR, however taking a semaphore from an ISR\n * is not a common operation.  It is likely to only be useful when taking a\n * counting semaphore when an interrupt is obtaining an object from a resource\n * pool (when the semaphore count indicates the number of resources available).\n *\n * @param xSemaphore A handle to the semaphore being taken.  This is the\n * handle returned when the semaphore was created.\n *\n * @param pxHigherPriorityTaskWoken xSemaphoreTakeFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if taking the semaphore caused a task\n * to unblock, and the unblocked task has a priority higher than the currently\n * running task.  If xSemaphoreTakeFromISR() sets this value to pdTRUE then\n * a context switch should be requested before the interrupt is exited.\n *\n * @return pdTRUE if the semaphore was successfully taken, otherwise\n * pdFALSE\n */\n#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken )\txQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )\n\n/**\n * semphr. h\n * 
SemaphoreHandle_t xSemaphoreCreateMutex( void )
\n *\n * Creates a new mutex type semaphore instance, and returns a handle by which\n * the new mutex can be referenced.\n *\n * Internally, within the FreeRTOS implementation, mutex semaphores use a block\n * of memory, in which the mutex structure is stored.  If a mutex is created\n * using xSemaphoreCreateMutex() then the required memory is automatically\n * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see\n * http://www.freertos.org/a00111.html).  If a mutex is created using\n * xSemaphoreCreateMutexStatic() then the application writer must provided the\n * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created\n * without using any dynamic memory allocation.\n *\n * Mutexes created using this function can be accessed using the xSemaphoreTake()\n * and xSemaphoreGive() macros.  The xSemaphoreTakeRecursive() and\n * xSemaphoreGiveRecursive() macros must not be used.\n *\n * This type of semaphore uses a priority inheritance mechanism so a task\n * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the\n * semaphore it is no longer required.\n *\n * Mutex type semaphores cannot be used from within interrupt service routines.\n *\n * See xSemaphoreCreateBinary() for an alternative implementation that can be\n * used for pure synchronisation (where one task or interrupt always 'gives' the\n * semaphore and another always 'takes' the semaphore) and from within interrupt\n * service routines.\n *\n * @return If the mutex was successfully created then a handle to the created\n * semaphore is returned.  If there was not enough heap to allocate the mutex\n * data structures then NULL is returned.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore;\n\n void vATask( void * pvParameters )\n {\n    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().\n    // This is a macro so pass the variable in directly.\n    xSemaphore = xSemaphoreCreateMutex();\n\n    if( xSemaphore != NULL )\n    {\n        // The semaphore was created successfully.\n        // The semaphore can now be used.\n    }\n }\n 
\n * \\defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex\n * \\ingroup Semaphores\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\t#define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX )\n#endif\n\n/**\n * semphr. h\n * 
SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer )
\n *\n * Creates a new mutex type semaphore instance, and returns a handle by which\n * the new mutex can be referenced.\n *\n * Internally, within the FreeRTOS implementation, mutex semaphores use a block\n * of memory, in which the mutex structure is stored.  If a mutex is created\n * using xSemaphoreCreateMutex() then the required memory is automatically\n * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see\n * http://www.freertos.org/a00111.html).  If a mutex is created using\n * xSemaphoreCreateMutexStatic() then the application writer must provided the\n * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created\n * without using any dynamic memory allocation.\n *\n * Mutexes created using this function can be accessed using the xSemaphoreTake()\n * and xSemaphoreGive() macros.  The xSemaphoreTakeRecursive() and\n * xSemaphoreGiveRecursive() macros must not be used.\n *\n * This type of semaphore uses a priority inheritance mechanism so a task\n * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the\n * semaphore it is no longer required.\n *\n * Mutex type semaphores cannot be used from within interrupt service routines.\n *\n * See xSemaphoreCreateBinary() for an alternative implementation that can be\n * used for pure synchronisation (where one task or interrupt always 'gives' the\n * semaphore and another always 'takes' the semaphore) and from within interrupt\n * service routines.\n *\n * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t,\n * which will be used to hold the mutex's data structure, removing the need for\n * the memory to be allocated dynamically.\n *\n * @return If the mutex was successfully created then a handle to the created\n * mutex is returned.  If pxMutexBuffer was NULL then NULL is returned.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore;\n StaticSemaphore_t xMutexBuffer;\n\n void vATask( void * pvParameters )\n {\n    // A mutex cannot be used before it has been created.  xMutexBuffer is\n    // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is\n    // attempted.\n    xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer );\n\n    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,\n    // so there is no need to check it.\n }\n 
\n * \\defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic\n * \\ingroup Semaphores\n */\n #if( configSUPPORT_STATIC_ALLOCATION == 1 )\n\t#define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )\n#endif /* configSUPPORT_STATIC_ALLOCATION */\n\n\n/**\n * semphr. h\n * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void )
\n *\n * Creates a new recursive mutex type semaphore instance, and returns a handle\n * by which the new recursive mutex can be referenced.\n *\n * Internally, within the FreeRTOS implementation, recursive mutexs use a block\n * of memory, in which the mutex structure is stored.  If a recursive mutex is\n * created using xSemaphoreCreateRecursiveMutex() then the required memory is\n * automatically dynamically allocated inside the\n * xSemaphoreCreateRecursiveMutex() function.  (see\n * http://www.freertos.org/a00111.html).  If a recursive mutex is created using\n * xSemaphoreCreateRecursiveMutexStatic() then the application writer must\n * provide the memory that will get used by the mutex.\n * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to\n * be created without using any dynamic memory allocation.\n *\n * Mutexes created using this macro can be accessed using the\n * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros.  The\n * xSemaphoreTake() and xSemaphoreGive() macros must not be used.\n *\n * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex\n * doesn't become available again until the owner has called\n * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,\n * if a task successfully 'takes' the same mutex 5 times then the mutex will\n * not be available to any other task until it has also  'given' the mutex back\n * exactly five times.\n *\n * This type of semaphore uses a priority inheritance mechanism so a task\n * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the\n * semaphore it is no longer required.\n *\n * Mutex type semaphores cannot be used from within interrupt service routines.\n *\n * See xSemaphoreCreateBinary() for an alternative implementation that can be\n * used for pure synchronisation (where one task or interrupt always 'gives' the\n * semaphore and another always 'takes' the semaphore) and from within interrupt\n * service routines.\n *\n * @return xSemaphore Handle to the created mutex semaphore.  Should be of type\n * SemaphoreHandle_t.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore;\n\n void vATask( void * pvParameters )\n {\n    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().\n    // This is a macro so pass the variable in directly.\n    xSemaphore = xSemaphoreCreateRecursiveMutex();\n\n    if( xSemaphore != NULL )\n    {\n        // The semaphore was created successfully.\n        // The semaphore can now be used.\n    }\n }\n 
\n * \\defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex\n * \\ingroup Semaphores\n */\n#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )\n\t#define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX )\n#endif\n\n/**\n * semphr. h\n * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer )
\n *\n * Creates a new recursive mutex type semaphore instance, and returns a handle\n * by which the new recursive mutex can be referenced.\n *\n * Internally, within the FreeRTOS implementation, recursive mutexs use a block\n * of memory, in which the mutex structure is stored.  If a recursive mutex is\n * created using xSemaphoreCreateRecursiveMutex() then the required memory is\n * automatically dynamically allocated inside the\n * xSemaphoreCreateRecursiveMutex() function.  (see\n * http://www.freertos.org/a00111.html).  If a recursive mutex is created using\n * xSemaphoreCreateRecursiveMutexStatic() then the application writer must\n * provide the memory that will get used by the mutex.\n * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to\n * be created without using any dynamic memory allocation.\n *\n * Mutexes created using this macro can be accessed using the\n * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros.  The\n * xSemaphoreTake() and xSemaphoreGive() macros must not be used.\n *\n * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex\n * doesn't become available again until the owner has called\n * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,\n * if a task successfully 'takes' the same mutex 5 times then the mutex will\n * not be available to any other task until it has also  'given' the mutex back\n * exactly five times.\n *\n * This type of semaphore uses a priority inheritance mechanism so a task\n * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the\n * semaphore it is no longer required.\n *\n * Mutex type semaphores cannot be used from within interrupt service routines.\n *\n * See xSemaphoreCreateBinary() for an alternative implementation that can be\n * used for pure synchronisation (where one task or interrupt always 'gives' the\n * semaphore and another always 'takes' the semaphore) and from within interrupt\n * service routines.\n *\n * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t,\n * which will then be used to hold the recursive mutex's data structure,\n * removing the need for the memory to be allocated dynamically.\n *\n * @return If the recursive mutex was successfully created then a handle to the\n * created recursive mutex is returned.  If pxMutexBuffer was NULL then NULL is\n * returned.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore;\n StaticSemaphore_t xMutexBuffer;\n\n void vATask( void * pvParameters )\n {\n    // A recursive semaphore cannot be used before it is created.  Here a\n    // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic().\n    // The address of xMutexBuffer is passed into the function, and will hold\n    // the mutexes data structures - so no dynamic memory allocation will be\n    // attempted.\n    xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer );\n\n    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,\n    // so there is no need to check it.\n }\n 
\n * \\defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic\n * \\ingroup Semaphores\n */\n#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )\n\t#define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )\n#endif /* configSUPPORT_STATIC_ALLOCATION */\n\n/**\n * semphr. h\n * 
SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount )
\n *\n * Creates a new counting semaphore instance, and returns a handle by which the\n * new counting semaphore can be referenced.\n *\n * In many usage scenarios it is faster and more memory efficient to use a\n * direct to task notification in place of a counting semaphore!\n * http://www.freertos.org/RTOS-task-notifications.html\n *\n * Internally, within the FreeRTOS implementation, counting semaphores use a\n * block of memory, in which the counting semaphore structure is stored.  If a\n * counting semaphore is created using xSemaphoreCreateCounting() then the\n * required memory is automatically dynamically allocated inside the\n * xSemaphoreCreateCounting() function.  (see\n * http://www.freertos.org/a00111.html).  If a counting semaphore is created\n * using xSemaphoreCreateCountingStatic() then the application writer can\n * instead optionally provide the memory that will get used by the counting\n * semaphore.  xSemaphoreCreateCountingStatic() therefore allows a counting\n * semaphore to be created without using any dynamic memory allocation.\n *\n * Counting semaphores are typically used for two things:\n *\n * 1) Counting events.\n *\n *    In this usage scenario an event handler will 'give' a semaphore each time\n *    an event occurs (incrementing the semaphore count value), and a handler\n *    task will 'take' a semaphore each time it processes an event\n *    (decrementing the semaphore count value).  The count value is therefore\n *    the difference between the number of events that have occurred and the\n *    number that have been processed.  In this case it is desirable for the\n *    initial count value to be zero.\n *\n * 2) Resource management.\n *\n *    In this usage scenario the count value indicates the number of resources\n *    available.  To obtain control of a resource a task must first obtain a\n *    semaphore - decrementing the semaphore count value.  When the count value\n *    reaches zero there are no free resources.  When a task finishes with the\n *    resource it 'gives' the semaphore back - incrementing the semaphore count\n *    value.  In this case it is desirable for the initial count value to be\n *    equal to the maximum count value, indicating that all resources are free.\n *\n * @param uxMaxCount The maximum count value that can be reached.  When the\n *        semaphore reaches this value it can no longer be 'given'.\n *\n * @param uxInitialCount The count value assigned to the semaphore when it is\n *        created.\n *\n * @return Handle to the created semaphore.  Null if the semaphore could not be\n *         created.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore;\n\n void vATask( void * pvParameters )\n {\n SemaphoreHandle_t xSemaphore = NULL;\n\n    // Semaphore cannot be used before a call to xSemaphoreCreateCounting().\n    // The max value to which the semaphore can count should be 10, and the\n    // initial value assigned to the count should be 0.\n    xSemaphore = xSemaphoreCreateCounting( 10, 0 );\n\n    if( xSemaphore != NULL )\n    {\n        // The semaphore was created successfully.\n        // The semaphore can now be used.\n    }\n }\n 
\n * \\defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting\n * \\ingroup Semaphores\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\t#define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) )\n#endif\n\n/**\n * semphr. h\n * 
SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer )
\n *\n * Creates a new counting semaphore instance, and returns a handle by which the\n * new counting semaphore can be referenced.\n *\n * In many usage scenarios it is faster and more memory efficient to use a\n * direct to task notification in place of a counting semaphore!\n * http://www.freertos.org/RTOS-task-notifications.html\n *\n * Internally, within the FreeRTOS implementation, counting semaphores use a\n * block of memory, in which the counting semaphore structure is stored.  If a\n * counting semaphore is created using xSemaphoreCreateCounting() then the\n * required memory is automatically dynamically allocated inside the\n * xSemaphoreCreateCounting() function.  (see\n * http://www.freertos.org/a00111.html).  If a counting semaphore is created\n * using xSemaphoreCreateCountingStatic() then the application writer must\n * provide the memory.  xSemaphoreCreateCountingStatic() therefore allows a\n * counting semaphore to be created without using any dynamic memory allocation.\n *\n * Counting semaphores are typically used for two things:\n *\n * 1) Counting events.\n *\n *    In this usage scenario an event handler will 'give' a semaphore each time\n *    an event occurs (incrementing the semaphore count value), and a handler\n *    task will 'take' a semaphore each time it processes an event\n *    (decrementing the semaphore count value).  The count value is therefore\n *    the difference between the number of events that have occurred and the\n *    number that have been processed.  In this case it is desirable for the\n *    initial count value to be zero.\n *\n * 2) Resource management.\n *\n *    In this usage scenario the count value indicates the number of resources\n *    available.  To obtain control of a resource a task must first obtain a\n *    semaphore - decrementing the semaphore count value.  When the count value\n *    reaches zero there are no free resources.  When a task finishes with the\n *    resource it 'gives' the semaphore back - incrementing the semaphore count\n *    value.  In this case it is desirable for the initial count value to be\n *    equal to the maximum count value, indicating that all resources are free.\n *\n * @param uxMaxCount The maximum count value that can be reached.  When the\n *        semaphore reaches this value it can no longer be 'given'.\n *\n * @param uxInitialCount The count value assigned to the semaphore when it is\n *        created.\n *\n * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t,\n * which will then be used to hold the semaphore's data structure, removing the\n * need for the memory to be allocated dynamically.\n *\n * @return If the counting semaphore was successfully created then a handle to\n * the created counting semaphore is returned.  If pxSemaphoreBuffer was NULL\n * then NULL is returned.\n *\n * Example usage:\n 
\n SemaphoreHandle_t xSemaphore;\n StaticSemaphore_t xSemaphoreBuffer;\n\n void vATask( void * pvParameters )\n {\n SemaphoreHandle_t xSemaphore = NULL;\n\n    // Counting semaphore cannot be used before they have been created.  Create\n    // a counting semaphore using xSemaphoreCreateCountingStatic().  The max\n    // value to which the semaphore can count is 10, and the initial value\n    // assigned to the count will be 0.  The address of xSemaphoreBuffer is\n    // passed in and will be used to hold the semaphore structure, so no dynamic\n    // memory allocation will be used.\n    xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer );\n\n    // No memory allocation was attempted so xSemaphore cannot be NULL, so there\n    // is no need to check its value.\n }\n 
\n * \\defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic\n * \\ingroup Semaphores\n */\n#if( configSUPPORT_STATIC_ALLOCATION == 1 )\n\t#define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) )\n#endif /* configSUPPORT_STATIC_ALLOCATION */\n\n/**\n * semphr. h\n * 
void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );
\n *\n * Delete a semaphore.  This function must be used with care.  For example,\n * do not delete a mutex type semaphore if the mutex is held by a task.\n *\n * @param xSemaphore A handle to the semaphore to be deleted.\n *\n * \\defgroup vSemaphoreDelete vSemaphoreDelete\n * \\ingroup Semaphores\n */\n#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) )\n\n/**\n * semphr.h\n * 
TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );
\n *\n * If xMutex is indeed a mutex type semaphore, return the current mutex holder.\n * If xMutex is not a mutex type semaphore, or the mutex is available (not held\n * by a task), return NULL.\n *\n * Note: This is a good way of determining if the calling task is the mutex\n * holder, but not a good way of determining the identity of the mutex holder as\n * the holder may change between the function exiting and the returned value\n * being tested.\n */\n#define xSemaphoreGetMutexHolder( xSemaphore ) xQueueGetMutexHolder( ( xSemaphore ) )\n\n/**\n * semphr.h\n * 
TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );
\n *\n * If xMutex is indeed a mutex type semaphore, return the current mutex holder.\n * If xMutex is not a mutex type semaphore, or the mutex is available (not held\n * by a task), return NULL.\n *\n */\n#define xSemaphoreGetMutexHolderFromISR( xSemaphore ) xQueueGetMutexHolderFromISR( ( xSemaphore ) )\n\n/**\n * semphr.h\n * 
UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );
\n *\n * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns\n * its current count value.  If the semaphore is a binary semaphore then\n * uxSemaphoreGetCount() returns 1 if the semaphore is available, and 0 if the\n * semaphore is not available.\n *\n */\n#define uxSemaphoreGetCount( xSemaphore ) uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) )\n\n#endif /* SEMAPHORE_H */\n\n\n"
  },
  {
    "path": "include/rtos/freertos/stack_macros.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n#ifndef STACK_MACROS_H\n#define STACK_MACROS_H\n\n/*\n * Call the stack overflow hook function if the stack of the task being swapped\n * out is currently overflowed, or looks like it might have overflowed in the\n * past.\n *\n * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check\n * the current stack state only - comparing the current top of stack value to\n * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1\n * will also cause the last few stack bytes to be checked to ensure the value\n * to which the bytes were set when the task was created have not been\n * overwritten.  Note this second test does not guarantee that an overflowed\n * stack will always be recognised.\n */\n\n/*-----------------------------------------------------------*/\n\n#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )\n\n\t/* Only the current stack state is to be checked. */\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t/* Is the currently saved stack pointer within the stack limit? */\t\t\t\t\t\t\t\t\\\n\t\tif( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )\t\t\t\t\t\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\tvApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );\t\\\n\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\n\n#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */\n/*-----------------------------------------------------------*/\n\n#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )\n\n\t/* Only the current stack state is to be checked. */\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t/* Is the currently saved stack pointer within the stack limit? */\t\t\t\t\t\t\t\t\\\n\t\tif( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )\t\t\t\t\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\tvApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );\t\\\n\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\n\n#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */\n/*-----------------------------------------------------------*/\n\n#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )\n\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tconst uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;\t\t\t\t\t\t\t\\\n\t\tconst uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tif( ( pulStack[ 0 ] != ulCheckValue ) ||\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t( pulStack[ 1 ] != ulCheckValue ) ||\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t( pulStack[ 2 ] != ulCheckValue ) ||\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t( pulStack[ 3 ] != ulCheckValue ) )\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\tvApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );\t\\\n\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\n\n#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */\n/*-----------------------------------------------------------*/\n\n#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )\n\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\tint8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\tstatic const uint8_t ucExpectedStackBytes[] = {\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\ttskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tpcEndOfStack -= sizeof( ucExpectedStackBytes );\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t/* Has the extremity of the task stack ever been written over? */\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\tif( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )\t\t\t\t\t\\\n\t\t{\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t\t\tvApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );\t\t\t\t\t\t\t\t\t\\\n\t\t}\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\\\n\t}\n\n#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */\n/*-----------------------------------------------------------*/\n\n/* Remove stack overflow macro if not being used. */\n#ifndef taskCHECK_FOR_STACK_OVERFLOW\n\t#define taskCHECK_FOR_STACK_OVERFLOW()\n#endif\n\n\n\n#endif /* STACK_MACROS_H */\n\n"
  },
  {
    "path": "include/rtos/freertos/stdint.readme",
    "content": "\n#ifndef FREERTOS_STDINT\n#define FREERTOS_STDINT\n\n/*******************************************************************************\n * THIS IS NOT A FULL stdint.h IMPLEMENTATION - It only contains the definitions\n * necessary to build the FreeRTOS code.  It is provided to allow FreeRTOS to be\n * built using compilers that do not provide their own stdint.h definition.\n *\n * To use this file:\n *\n *    1) Copy this file into the directory that contains your FreeRTOSConfig.h\n *       header file, as that directory will already be in the compilers include\n *       path.\n *\n *    2) Rename the copied file stdint.h.\n *\n */\n\ntypedef signed char int8_t;\ntypedef unsigned char uint8_t;\ntypedef short int16_t;\ntypedef unsigned short uint16_t;\ntypedef long int32_t;\ntypedef unsigned long uint32_t;\n\n#endif /* FREERTOS_STDINT */\n"
  },
  {
    "path": "include/rtos/freertos/stream_buffer.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n/*\n * Stream buffers are used to send a continuous stream of data from one task or\n * interrupt to another.  Their implementation is light weight, making them\n * particularly suited for interrupt to task and core to core communication\n * scenarios.\n *\n * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader).  It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers.  If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xStreamBufferSend()) inside a critical section and set the send\n * block time to 0.  Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xStreamBufferRead()) inside a critical section section and set the\n * receive block time to 0.\n *\n */\n\n#ifndef STREAM_BUFFER_H\n#define STREAM_BUFFER_H\n\n#if defined( __cplusplus )\nextern \"C\" {\n#endif\n\n/**\n * Type by which stream buffers are referenced.  For example, a call to\n * xStreamBufferCreate() returns an StreamBufferHandle_t variable that can\n * then be used as a parameter to xStreamBufferSend(), xStreamBufferReceive(),\n * etc.\n */\nstruct StreamBufferDef_t;\ntypedef struct StreamBufferDef_t * StreamBufferHandle_t;\n\n\n/**\n * message_buffer.h\n *\n
\nStreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );\n
\n *\n * Creates a new stream buffer using dynamically allocated memory.  See\n * xStreamBufferCreateStatic() for a version that uses statically allocated\n * memory (memory that is allocated at compile time).\n *\n * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in\n * FreeRTOSConfig.h for xStreamBufferCreate() to be available.\n *\n * @param xBufferSizeBytes The total number of bytes the stream buffer will be\n * able to hold at any one time.\n *\n * @param xTriggerLevelBytes The number of bytes that must be in the stream\n * buffer before a task that is blocked on the stream buffer to wait for data is\n * moved out of the blocked state.  For example, if a task is blocked on a read\n * of an empty stream buffer that has a trigger level of 1 then the task will be\n * unblocked when a single byte is written to the buffer or the task's block\n * time expires.  As another example, if a task is blocked on a read of an empty\n * stream buffer that has a trigger level of 10 then the task will not be\n * unblocked until the stream buffer contains at least 10 bytes or the task's\n * block time expires.  If a reading task's block time expires before the\n * trigger level is reached then the task will still receive however many bytes\n * are actually available.  Setting a trigger level of 0 will result in a\n * trigger level of 1 being used.  It is not valid to specify a trigger level\n * that is greater than the buffer size.\n *\n * @return If NULL is returned, then the stream buffer cannot be created\n * because there is insufficient heap memory available for FreeRTOS to allocate\n * the stream buffer data structures and storage area.  A non-NULL value being\n * returned indicates that the stream buffer has been created successfully -\n * the returned value should be stored as the handle to the created stream\n * buffer.\n *\n * Example use:\n
\n\nvoid vAFunction( void )\n{\nStreamBufferHandle_t xStreamBuffer;\nconst size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;\n\n    // Create a stream buffer that can hold 100 bytes.  The memory used to hold\n    // both the stream buffer structure and the data in the stream buffer is\n    // allocated dynamically.\n    xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );\n\n    if( xStreamBuffer == NULL )\n    {\n        // There was not enough heap memory space available to create the\n        // stream buffer.\n    }\n    else\n    {\n        // The stream buffer was created successfully and can now be used.\n    }\n}\n
\n * \\defgroup xStreamBufferCreate xStreamBufferCreate\n * \\ingroup StreamBufferManagement\n */\n#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )\n\n/**\n * stream_buffer.h\n *\n
\nStreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,\n                                                size_t xTriggerLevelBytes,\n                                                uint8_t *pucStreamBufferStorageArea,\n                                                StaticStreamBuffer_t *pxStaticStreamBuffer );\n
\n * Creates a new stream buffer using statically allocated memory.  See\n * xStreamBufferCreate() for a version that uses dynamically allocated memory.\n *\n * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for\n * xStreamBufferCreateStatic() to be available.\n *\n * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the\n * pucStreamBufferStorageArea parameter.\n *\n * @param xTriggerLevelBytes The number of bytes that must be in the stream\n * buffer before a task that is blocked on the stream buffer to wait for data is\n * moved out of the blocked state.  For example, if a task is blocked on a read\n * of an empty stream buffer that has a trigger level of 1 then the task will be\n * unblocked when a single byte is written to the buffer or the task's block\n * time expires.  As another example, if a task is blocked on a read of an empty\n * stream buffer that has a trigger level of 10 then the task will not be\n * unblocked until the stream buffer contains at least 10 bytes or the task's\n * block time expires.  If a reading task's block time expires before the\n * trigger level is reached then the task will still receive however many bytes\n * are actually available.  Setting a trigger level of 0 will result in a\n * trigger level of 1 being used.  It is not valid to specify a trigger level\n * that is greater than the buffer size.\n *\n * @param pucStreamBufferStorageArea Must point to a uint8_t array that is at\n * least xBufferSizeBytes + 1 big.  This is the array to which streams are\n * copied when they are written to the stream buffer.\n *\n * @param pxStaticStreamBuffer Must point to a variable of type\n * StaticStreamBuffer_t, which will be used to hold the stream buffer's data\n * structure.\n *\n * @return If the stream buffer is created successfully then a handle to the\n * created stream buffer is returned. If either pucStreamBufferStorageArea or\n * pxStaticstreamBuffer are NULL then NULL is returned.\n *\n * Example use:\n
\n\n// Used to dimension the array used to hold the streams.  The available space\n// will actually be one less than this, so 999.\n#define STORAGE_SIZE_BYTES 1000\n\n// Defines the memory that will actually hold the streams within the stream\n// buffer.\nstatic uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];\n\n// The variable used to hold the stream buffer structure.\nStaticStreamBuffer_t xStreamBufferStruct;\n\nvoid MyFunction( void )\n{\nStreamBufferHandle_t xStreamBuffer;\nconst size_t xTriggerLevel = 1;\n\n    xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),\n                                               xTriggerLevel,\n                                               ucBufferStorage,\n                                               &xStreamBufferStruct );\n\n    // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer\n    // parameters were NULL, xStreamBuffer will not be NULL, and can be used to\n    // reference the created stream buffer in other stream buffer API calls.\n\n    // Other code that uses the stream buffer can go here.\n}\n\n
\n * \\defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic\n * \\ingroup StreamBufferManagement\n */\n#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )\n\n/**\n * stream_buffer.h\n *\n
\nsize_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,\n                          const void *pvTxData,\n                          size_t xDataLengthBytes,\n                          TickType_t xTicksToWait );\n
\n *\n * Sends bytes to a stream buffer.  The bytes are copied into the stream buffer.\n *\n * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader).  It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers.  If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xStreamBufferSend()) inside a critical section and set the send\n * block time to 0.  Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xStreamBufferRead()) inside a critical section and set the receive\n * block time to 0.\n *\n * Use xStreamBufferSend() to write to a stream buffer from a task.  Use\n * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt\n * service routine (ISR).\n *\n * @param xStreamBuffer The handle of the stream buffer to which a stream is\n * being sent.\n *\n * @param pvTxData A pointer to the buffer that holds the bytes to be copied\n * into the stream buffer.\n *\n * @param xDataLengthBytes   The maximum number of bytes to copy from pvTxData\n * into the stream buffer.\n *\n * @param xTicksToWait The maximum amount of time the task should remain in the\n * Blocked state to wait for enough space to become available in the stream\n * buffer, should the stream buffer contain too little space to hold the\n * another xDataLengthBytes bytes.  The block time is specified in tick periods,\n * so the absolute time it represents is dependent on the tick frequency.  The\n * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds\n * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will\n * cause the task to wait indefinitely (without timing out), provided\n * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  If a task times out\n * before it can write all xDataLengthBytes into the buffer it will still write\n * as many bytes as possible.  A task does not use any CPU time when it is in\n * the blocked state.\n *\n * @return The number of bytes written to the stream buffer.  If a task times\n * out before it can write all xDataLengthBytes into the buffer it will still\n * write as many bytes as possible.\n *\n * Example use:\n
\nvoid vAFunction( StreamBufferHandle_t xStreamBuffer )\n{\nsize_t xBytesSent;\nuint8_t ucArrayToSend[] = { 0, 1, 2, 3 };\nchar *pcStringToSend = \"String to send\";\nconst TickType_t x100ms = pdMS_TO_TICKS( 100 );\n\n    // Send an array to the stream buffer, blocking for a maximum of 100ms to\n    // wait for enough space to be available in the stream buffer.\n    xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );\n\n    if( xBytesSent != sizeof( ucArrayToSend ) )\n    {\n        // The call to xStreamBufferSend() times out before there was enough\n        // space in the buffer for the data to be written, but it did\n        // successfully write xBytesSent bytes.\n    }\n\n    // Send the string to the stream buffer.  Return immediately if there is not\n    // enough space in the buffer.\n    xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );\n\n    if( xBytesSent != strlen( pcStringToSend ) )\n    {\n        // The entire string could not be added to the stream buffer because\n        // there was not enough free space in the buffer, but xBytesSent bytes\n        // were sent.  Could try again to send the remaining bytes.\n    }\n}\n
\n * \\defgroup xStreamBufferSend xStreamBufferSend\n * \\ingroup StreamBufferManagement\n */\nsize_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,\n\t\t\t\t\t\t  const void *pvTxData,\n\t\t\t\t\t\t  size_t xDataLengthBytes,\n\t\t\t\t\t\t  TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nsize_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,\n                                 const void *pvTxData,\n                                 size_t xDataLengthBytes,\n                                 BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * Interrupt safe version of the API function that sends a stream of bytes to\n * the stream buffer.\n *\n * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader).  It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers.  If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xStreamBufferSend()) inside a critical section and set the send\n * block time to 0.  Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xStreamBufferRead()) inside a critical section and set the receive\n * block time to 0.\n *\n * Use xStreamBufferSend() to write to a stream buffer from a task.  Use\n * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt\n * service routine (ISR).\n *\n * @param xStreamBuffer The handle of the stream buffer to which a stream is\n * being sent.\n *\n * @param pvTxData A pointer to the data that is to be copied into the stream\n * buffer.\n *\n * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData\n * into the stream buffer.\n *\n * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will\n * have a task blocked on it waiting for data.  Calling\n * xStreamBufferSendFromISR() can make data available, and so cause a task that\n * was waiting for data to leave the Blocked state.  If calling\n * xStreamBufferSendFromISR() causes a task to leave the Blocked state, and the\n * unblocked task has a priority higher than the currently executing task (the\n * task that was interrupted), then, internally, xStreamBufferSendFromISR()\n * will set *pxHigherPriorityTaskWoken to pdTRUE.  If\n * xStreamBufferSendFromISR() sets this value to pdTRUE, then normally a\n * context switch should be performed before the interrupt is exited.  This will\n * ensure that the interrupt returns directly to the highest priority Ready\n * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it\n * is passed into the function.  See the example code below for an example.\n *\n * @return The number of bytes actually written to the stream buffer, which will\n * be less than xDataLengthBytes if the stream buffer didn't have enough free\n * space for all the bytes to be written.\n *\n * Example use:\n
\n// A stream buffer that has already been created.\nStreamBufferHandle_t xStreamBuffer;\n\nvoid vAnInterruptServiceRoutine( void )\n{\nsize_t xBytesSent;\nchar *pcStringToSend = \"String to send\";\nBaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.\n\n    // Attempt to send the string to the stream buffer.\n    xBytesSent = xStreamBufferSendFromISR( xStreamBuffer,\n                                           ( void * ) pcStringToSend,\n                                           strlen( pcStringToSend ),\n                                           &xHigherPriorityTaskWoken );\n\n    if( xBytesSent != strlen( pcStringToSend ) )\n    {\n        // There was not enough free space in the stream buffer for the entire\n        // string to be written, ut xBytesSent bytes were written.\n    }\n\n    // If xHigherPriorityTaskWoken was set to pdTRUE inside\n    // xStreamBufferSendFromISR() then a task that has a priority above the\n    // priority of the currently executing task was unblocked and a context\n    // switch should be performed to ensure the ISR returns to the unblocked\n    // task.  In most FreeRTOS ports this is done by simply passing\n    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the\n    // variables value, and perform the context switch if necessary.  Check the\n    // documentation for the port in use for port specific instructions.\n    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );\n}\n
\n * \\defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR\n * \\ingroup StreamBufferManagement\n */\nsize_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,\n\t\t\t\t\t\t\t\t const void *pvTxData,\n\t\t\t\t\t\t\t\t size_t xDataLengthBytes,\n\t\t\t\t\t\t\t\t BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nsize_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,\n                             void *pvRxData,\n                             size_t xBufferLengthBytes,\n                             TickType_t xTicksToWait );\n
\n *\n * Receives bytes from a stream buffer.\n *\n * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer\n * implementation (so also the message buffer implementation, as message buffers\n * are built on top of stream buffers) assumes there is only one task or\n * interrupt that will write to the buffer (the writer), and only one task or\n * interrupt that will read from the buffer (the reader).  It is safe for the\n * writer and reader to be different tasks or interrupts, but, unlike other\n * FreeRTOS objects, it is not safe to have multiple different writers or\n * multiple different readers.  If there are to be multiple different writers\n * then the application writer must place each call to a writing API function\n * (such as xStreamBufferSend()) inside a critical section and set the send\n * block time to 0.  Likewise, if there are to be multiple different readers\n * then the application writer must place each call to a reading API function\n * (such as xStreamBufferRead()) inside a critical section and set the receive\n * block time to 0.\n *\n * Use xStreamBufferReceive() to read from a stream buffer from a task.  Use\n * xStreamBufferReceiveFromISR() to read from a stream buffer from an\n * interrupt service routine (ISR).\n *\n * @param xStreamBuffer The handle of the stream buffer from which bytes are to\n * be received.\n *\n * @param pvRxData A pointer to the buffer into which the received bytes will be\n * copied.\n *\n * @param xBufferLengthBytes The length of the buffer pointed to by the\n * pvRxData parameter.  This sets the maximum number of bytes to receive in one\n * call.  xStreamBufferReceive will return as many bytes as possible up to a\n * maximum set by xBufferLengthBytes.\n *\n * @param xTicksToWait The maximum amount of time the task should remain in the\n * Blocked state to wait for data to become available if the stream buffer is\n * empty.  xStreamBufferReceive() will return immediately if xTicksToWait is\n * zero.  The block time is specified in tick periods, so the absolute time it\n * represents is dependent on the tick frequency.  The macro pdMS_TO_TICKS() can\n * be used to convert a time specified in milliseconds into a time specified in\n * ticks.  Setting xTicksToWait to portMAX_DELAY will cause the task to wait\n * indefinitely (without timing out), provided INCLUDE_vTaskSuspend is set to 1\n * in FreeRTOSConfig.h.  A task does not use any CPU time when it is in the\n * Blocked state.\n *\n * @return The number of bytes actually read from the stream buffer, which will\n * be less than xBufferLengthBytes if the call to xStreamBufferReceive() timed\n * out before xBufferLengthBytes were available.\n *\n * Example use:\n
\nvoid vAFunction( StreamBuffer_t xStreamBuffer )\n{\nuint8_t ucRxData[ 20 ];\nsize_t xReceivedBytes;\nconst TickType_t xBlockTime = pdMS_TO_TICKS( 20 );\n\n    // Receive up to another sizeof( ucRxData ) bytes from the stream buffer.\n    // Wait in the Blocked state (so not using any CPU processing time) for a\n    // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be\n    // available.\n    xReceivedBytes = xStreamBufferReceive( xStreamBuffer,\n                                           ( void * ) ucRxData,\n                                           sizeof( ucRxData ),\n                                           xBlockTime );\n\n    if( xReceivedBytes > 0 )\n    {\n        // A ucRxData contains another xRecievedBytes bytes of data, which can\n        // be processed here....\n    }\n}\n
\n * \\defgroup xStreamBufferReceive xStreamBufferReceive\n * \\ingroup StreamBufferManagement\n */\nsize_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,\n\t\t\t\t\t\t\t void *pvRxData,\n\t\t\t\t\t\t\t size_t xBufferLengthBytes,\n\t\t\t\t\t\t\t TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nsize_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,\n                                    void *pvRxData,\n                                    size_t xBufferLengthBytes,\n                                    BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * An interrupt safe version of the API function that receives bytes from a\n * stream buffer.\n *\n * Use xStreamBufferReceive() to read bytes from a stream buffer from a task.\n * Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an\n * interrupt service routine (ISR).\n *\n * @param xStreamBuffer The handle of the stream buffer from which a stream\n * is being received.\n *\n * @param pvRxData A pointer to the buffer into which the received bytes are\n * copied.\n *\n * @param xBufferLengthBytes The length of the buffer pointed to by the\n * pvRxData parameter.  This sets the maximum number of bytes to receive in one\n * call.  xStreamBufferReceive will return as many bytes as possible up to a\n * maximum set by xBufferLengthBytes.\n *\n * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will\n * have a task blocked on it waiting for space to become available.  Calling\n * xStreamBufferReceiveFromISR() can make space available, and so cause a task\n * that is waiting for space to leave the Blocked state.  If calling\n * xStreamBufferReceiveFromISR() causes a task to leave the Blocked state, and\n * the unblocked task has a priority higher than the currently executing task\n * (the task that was interrupted), then, internally,\n * xStreamBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.\n * If xStreamBufferReceiveFromISR() sets this value to pdTRUE, then normally a\n * context switch should be performed before the interrupt is exited.  That will\n * ensure the interrupt returns directly to the highest priority Ready state\n * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is\n * passed into the function.  See the code example below for an example.\n *\n * @return The number of bytes read from the stream buffer, if any.\n *\n * Example use:\n
\n// A stream buffer that has already been created.\nStreamBuffer_t xStreamBuffer;\n\nvoid vAnInterruptServiceRoutine( void )\n{\nuint8_t ucRxData[ 20 ];\nsize_t xReceivedBytes;\nBaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.\n\n    // Receive the next stream from the stream buffer.\n    xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer,\n                                                  ( void * ) ucRxData,\n                                                  sizeof( ucRxData ),\n                                                  &xHigherPriorityTaskWoken );\n\n    if( xReceivedBytes > 0 )\n    {\n        // ucRxData contains xReceivedBytes read from the stream buffer.\n        // Process the stream here....\n    }\n\n    // If xHigherPriorityTaskWoken was set to pdTRUE inside\n    // xStreamBufferReceiveFromISR() then a task that has a priority above the\n    // priority of the currently executing task was unblocked and a context\n    // switch should be performed to ensure the ISR returns to the unblocked\n    // task.  In most FreeRTOS ports this is done by simply passing\n    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the\n    // variables value, and perform the context switch if necessary.  Check the\n    // documentation for the port in use for port specific instructions.\n    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );\n}\n
\n * \\defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR\n * \\ingroup StreamBufferManagement\n */\nsize_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,\n\t\t\t\t\t\t\t\t\tvoid *pvRxData,\n\t\t\t\t\t\t\t\t\tsize_t xBufferLengthBytes,\n\t\t\t\t\t\t\t\t\tBaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nvoid vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );\n
\n *\n * Deletes a stream buffer that was previously created using a call to\n * xStreamBufferCreate() or xStreamBufferCreateStatic().  If the stream\n * buffer was created using dynamic memory (that is, by xStreamBufferCreate()),\n * then the allocated memory is freed.\n *\n * A stream buffer handle must not be used after the stream buffer has been\n * deleted.\n *\n * @param xStreamBuffer The handle of the stream buffer to be deleted.\n *\n * \\defgroup vStreamBufferDelete vStreamBufferDelete\n * \\ingroup StreamBufferManagement\n */\nvoid vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nBaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );\n
\n *\n * Queries a stream buffer to see if it is full.  A stream buffer is full if it\n * does not have any free space, and therefore cannot accept any more data.\n *\n * @param xStreamBuffer The handle of the stream buffer being queried.\n *\n * @return If the stream buffer is full then pdTRUE is returned.  Otherwise\n * pdFALSE is returned.\n *\n * \\defgroup xStreamBufferIsFull xStreamBufferIsFull\n * \\ingroup StreamBufferManagement\n */\nBaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nBaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );\n
\n *\n * Queries a stream buffer to see if it is empty.  A stream buffer is empty if\n * it does not contain any data.\n *\n * @param xStreamBuffer The handle of the stream buffer being queried.\n *\n * @return If the stream buffer is empty then pdTRUE is returned.  Otherwise\n * pdFALSE is returned.\n *\n * \\defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty\n * \\ingroup StreamBufferManagement\n */\nBaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nBaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );\n
\n *\n * Resets a stream buffer to its initial, empty, state.  Any data that was in\n * the stream buffer is discarded.  A stream buffer can only be reset if there\n * are no tasks blocked waiting to either send to or receive from the stream\n * buffer.\n *\n * @param xStreamBuffer The handle of the stream buffer being reset.\n *\n * @return If the stream buffer is reset then pdPASS is returned.  If there was\n * a task blocked waiting to send to or read from the stream buffer then the\n * stream buffer is not reset and pdFAIL is returned.\n *\n * \\defgroup xStreamBufferReset xStreamBufferReset\n * \\ingroup StreamBufferManagement\n */\nBaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nsize_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );\n
\n *\n * Queries a stream buffer to see how much free space it contains, which is\n * equal to the amount of data that can be sent to the stream buffer before it\n * is full.\n *\n * @param xStreamBuffer The handle of the stream buffer being queried.\n *\n * @return The number of bytes that can be written to the stream buffer before\n * the stream buffer would be full.\n *\n * \\defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable\n * \\ingroup StreamBufferManagement\n */\nsize_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nsize_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );\n
\n *\n * Queries a stream buffer to see how much data it contains, which is equal to\n * the number of bytes that can be read from the stream buffer before the stream\n * buffer would be empty.\n *\n * @param xStreamBuffer The handle of the stream buffer being queried.\n *\n * @return The number of bytes that can be read from the stream buffer before\n * the stream buffer would be empty.\n *\n * \\defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable\n * \\ingroup StreamBufferManagement\n */\nsize_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nBaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );\n
\n *\n * A stream buffer's trigger level is the number of bytes that must be in the\n * stream buffer before a task that is blocked on the stream buffer to\n * wait for data is moved out of the blocked state.  For example, if a task is\n * blocked on a read of an empty stream buffer that has a trigger level of 1\n * then the task will be unblocked when a single byte is written to the buffer\n * or the task's block time expires.  As another example, if a task is blocked\n * on a read of an empty stream buffer that has a trigger level of 10 then the\n * task will not be unblocked until the stream buffer contains at least 10 bytes\n * or the task's block time expires.  If a reading task's block time expires\n * before the trigger level is reached then the task will still receive however\n * many bytes are actually available.  Setting a trigger level of 0 will result\n * in a trigger level of 1 being used.  It is not valid to specify a trigger\n * level that is greater than the buffer size.\n *\n * A trigger level is set when the stream buffer is created, and can be modified\n * using xStreamBufferSetTriggerLevel().\n *\n * @param xStreamBuffer The handle of the stream buffer being updated.\n *\n * @param xTriggerLevel The new trigger level for the stream buffer.\n *\n * @return If xTriggerLevel was less than or equal to the stream buffer's length\n * then the trigger level will be updated and pdTRUE is returned.  Otherwise\n * pdFALSE is returned.\n *\n * \\defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel\n * \\ingroup StreamBufferManagement\n */\nBaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nBaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * For advanced users only.\n *\n * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when\n * data is sent to a message buffer or stream buffer.  If there was a task that\n * was blocked on the message or stream buffer waiting for data to arrive then\n * the sbSEND_COMPLETED() macro sends a notification to the task to remove it\n * from the Blocked state.  xStreamBufferSendCompletedFromISR() does the same\n * thing.  It is provided to enable application writers to implement their own\n * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.\n *\n * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for\n * additional information.\n *\n * @param xStreamBuffer The handle of the stream buffer to which data was\n * written.\n *\n * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be\n * initialised to pdFALSE before it is passed into\n * xStreamBufferSendCompletedFromISR().  If calling\n * xStreamBufferSendCompletedFromISR() removes a task from the Blocked state,\n * and the task has a priority above the priority of the currently running task,\n * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a\n * context switch should be performed before exiting the ISR.\n *\n * @return If a task was removed from the Blocked state then pdTRUE is returned.\n * Otherwise pdFALSE is returned.\n *\n * \\defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR\n * \\ingroup StreamBufferManagement\n */\nBaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n\n/**\n * stream_buffer.h\n *\n
\nBaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );\n
\n *\n * For advanced users only.\n *\n * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when\n * data is read out of a message buffer or stream buffer.  If there was a task\n * that was blocked on the message or stream buffer waiting for data to arrive\n * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to\n * remove it from the Blocked state.  xStreamBufferReceiveCompletedFromISR()\n * does the same thing.  It is provided to enable application writers to\n * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT\n * ANY OTHER TIME.\n *\n * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for\n * additional information.\n *\n * @param xStreamBuffer The handle of the stream buffer from which data was\n * read.\n *\n * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be\n * initialised to pdFALSE before it is passed into\n * xStreamBufferReceiveCompletedFromISR().  If calling\n * xStreamBufferReceiveCompletedFromISR() removes a task from the Blocked state,\n * and the task has a priority above the priority of the currently running task,\n * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a\n * context switch should be performed before exiting the ISR.\n *\n * @return If a task was removed from the Blocked state then pdTRUE is returned.\n * Otherwise pdFALSE is returned.\n *\n * \\defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR\n * \\ingroup StreamBufferManagement\n */\nBaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n\n/* Functions below here are not part of the public API. */\nStreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,\n\t\t\t\t\t\t\t\t\t\t\t\t size_t xTriggerLevelBytes,\n\t\t\t\t\t\t\t\t\t\t\t\t BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;\n\nStreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,\n\t\t\t\t\t\t\t\t\t\t\t\t\t   size_t xTriggerLevelBytes,\n\t\t\t\t\t\t\t\t\t\t\t\t\t   BaseType_t xIsMessageBuffer,\n\t\t\t\t\t\t\t\t\t\t\t\t\t   uint8_t * const pucStreamBufferStorageArea,\n\t\t\t\t\t\t\t\t\t\t\t\t\t   StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;\n\nsize_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n\n#if( configUSE_TRACE_FACILITY == 1 )\n\tvoid vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;\n\tUBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n\tuint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;\n#endif\n\n#if defined( __cplusplus )\n}\n#endif\n\n#endif\t/* !defined( STREAM_BUFFER_H ) */\n"
  },
  {
    "path": "include/rtos/freertos/task.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n\n#ifndef INC_TASK_H\n#define INC_TASK_H\n\n#ifndef INC_FREERTOS_H\n\t#error \"include FreeRTOS.h must appear in source files before include task.h\"\n#endif\n\n#include \"freertos_list.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*-----------------------------------------------------------\n * MACROS AND DEFINITIONS\n *----------------------------------------------------------*/\n\n#define tskKERNEL_VERSION_NUMBER \"V10.1.1\"\n#define tskKERNEL_VERSION_MAJOR 10\n#define tskKERNEL_VERSION_MINOR 1\n#define tskKERNEL_VERSION_BUILD 1\n\n/**\n * task. h\n *\n * Type by which tasks are referenced.  For example, a call to xTaskCreate\n * returns (via a pointer parameter) an TaskHandle_t variable that can then\n * be used as a parameter to vTaskDelete to delete the task.\n *\n * \\defgroup TaskHandle_t TaskHandle_t\n * \\ingroup Tasks\n */\nstruct tskTaskControlBlock; /* The old naming convention is used to prevent breaking kernel aware debuggers. */\ntypedef struct tskTaskControlBlock* TaskHandle_t;\n\n/*\n * Defines the prototype to which the application task hook function must\n * conform.\n */\ntypedef BaseType_t (*TaskHookFunction_t)( void * );\n\n/* Task states returned by eTaskGetState. */\ntypedef enum\n{\n\teRunning = 0,\t/* A task is querying the state of itself, so must be running. */\n\teReady,\t\t\t/* The task being queried is in a read or pending ready list. */\n\teBlocked,\t\t/* The task being queried is in the Blocked state. */\n\teSuspended,\t\t/* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */\n\teDeleted,\t\t/* The task being queried has been deleted, but its TCB has not yet been freed. */\n\teInvalid\t\t/* Used as an 'invalid state' value. */\n} eTaskState;\n\n/* Actions that can be performed when vTaskNotify() is called. */\ntypedef enum\n{\n\teNoAction = 0,\t\t\t\t/* Notify the task without updating its notify value. */\n\teSetBits,\t\t\t\t\t/* Set bits in the task's notification value. */\n\teIncrement,\t\t\t\t\t/* Increment the task's notification value. */\n\teSetValueWithOverwrite,\t\t/* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */\n\teSetValueWithoutOverwrite\t/* Set the task's notification value if the previous value has been read by the task. */\n} eNotifyAction;\n\n/*\n * Used internally only.\n */\ntypedef struct xTIME_OUT\n{\n\tBaseType_t xOverflowCount;\n\tTickType_t xTimeOnEntering;\n} TimeOut_t;\n\n/*\n * Defines the memory ranges allocated to the task when an MPU is used.\n */\ntypedef struct xMEMORY_REGION\n{\n\tvoid *pvBaseAddress;\n\tuint32_t ulLengthInBytes;\n\tuint32_t ulParameters;\n} MemoryRegion_t;\n\n/*\n * Parameters required to create an MPU protected task.\n */\ntypedef struct xTASK_PARAMETERS\n{\n\tTaskFunction_t pvTaskCode;\n\tconst char * const pcName;\t/*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\tuint16_t usStackDepth;\n\tvoid *pvParameters;\n\tUBaseType_t uxPriority;\n\tStackType_t *puxStackBuffer;\n\tMemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ];\n\t#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\n\t\tStaticTask_t * const pxTaskBuffer;\n\t#endif\n} TaskParameters_t;\n\n/* Used with the uxTaskGetSystemState() function to return the state of each task\nin the system. */\ntypedef struct xTASK_STATUS\n{\n\tTaskHandle_t xHandle;\t\t\t/* The handle of the task to which the rest of the information in the structure relates. */\n\tconst char *pcTaskName;\t\t\t/* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\tUBaseType_t xTaskNumber;\t\t/* A number unique to the task. */\n\teTaskState eCurrentState;\t\t/* The state in which the task existed when the structure was populated. */\n\tUBaseType_t uxCurrentPriority;\t/* The priority at which the task was running (may be inherited) when the structure was populated. */\n\tUBaseType_t uxBasePriority;\t\t/* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */\n\tuint32_t ulRunTimeCounter;\t\t/* The total run time allocated to the task so far, as defined by the run time stats clock.  See http://www.freertos.org/rtos-run-time-stats.html.  Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */\n\tStackType_t *pxStackBase;\t\t/* Points to the lowest address of the task's stack area. */\n\tconfigSTACK_DEPTH_TYPE usStackHighWaterMark;\t/* The minimum amount of stack space that has remained for the task since the task was created.  The closer this value is to zero the closer the task has come to overflowing its stack. */\n} TaskStatus_t;\n\n/* Possible return values for eTaskConfirmSleepModeStatus(). */\ntypedef enum\n{\n\teAbortSleep = 0,\t\t/* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */\n\teStandardSleep,\t\t\t/* Enter a sleep mode that will not last any longer than the expected idle time. */\n\teNoTasksWaitingTimeout\t/* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */\n} eSleepModeStatus;\n\n/**\n * Defines the priority used by the idle task.  This must not be modified.\n *\n * \\ingroup TaskUtils\n */\n#define tskIDLE_PRIORITY\t\t\t( ( UBaseType_t ) 0U )\n\n/**\n * task. h\n *\n * Macro for forcing a context switch.\n *\n * \\defgroup taskYIELD taskYIELD\n * \\ingroup SchedulerControl\n */\n#define taskYIELD()\t\t\t\t\tportYIELD()\n\n/**\n * task. h\n *\n * Macro to mark the start of a critical code region.  Preemptive context\n * switches cannot occur when in a critical region.\n *\n * NOTE: This may alter the stack (depending on the portable implementation)\n * so must be used with care!\n *\n * \\defgroup taskENTER_CRITICAL taskENTER_CRITICAL\n * \\ingroup SchedulerControl\n */\n#define taskENTER_CRITICAL()\t\tportENTER_CRITICAL()\n#define taskENTER_CRITICAL_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR()\n\n/**\n * task. h\n *\n * Macro to mark the end of a critical code region.  Preemptive context\n * switches cannot occur when in a critical region.\n *\n * NOTE: This may alter the stack (depending on the portable implementation)\n * so must be used with care!\n *\n * \\defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL\n * \\ingroup SchedulerControl\n */\n#define taskEXIT_CRITICAL()\t\t\tportEXIT_CRITICAL()\n#define taskEXIT_CRITICAL_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( x )\n/**\n * task. h\n *\n * Macro to disable all maskable interrupts.\n *\n * \\defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS\n * \\ingroup SchedulerControl\n */\n#define taskDISABLE_INTERRUPTS()\tportDISABLE_INTERRUPTS()\n\n/**\n * task. h\n *\n * Macro to enable microcontroller interrupts.\n *\n * \\defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS\n * \\ingroup SchedulerControl\n */\n#define taskENABLE_INTERRUPTS()\t\tportENABLE_INTERRUPTS()\n\n/* Definitions returned by xTaskGetSchedulerState().  taskSCHEDULER_SUSPENDED is\n0 to generate more optimal code when configASSERT() is defined as the constant\nis used in assert() statements. */\n#define taskSCHEDULER_SUSPENDED\t\t( ( BaseType_t ) 0 )\n#define taskSCHEDULER_NOT_STARTED\t( ( BaseType_t ) 1 )\n#define taskSCHEDULER_RUNNING\t\t( ( BaseType_t ) 2 )\n\n\n/*-----------------------------------------------------------\n * TASK CREATION API\n *----------------------------------------------------------*/\n\n/**\n * task. h\n *
\n BaseType_t xTaskCreate(\n\t\t\t\t\t\t\t  TaskFunction_t pvTaskCode,\n\t\t\t\t\t\t\t  const char * const pcName,\n\t\t\t\t\t\t\t  configSTACK_DEPTH_TYPE usStackDepth,\n\t\t\t\t\t\t\t  void *pvParameters,\n\t\t\t\t\t\t\t  UBaseType_t uxPriority,\n\t\t\t\t\t\t\t  TaskHandle_t *pvCreatedTask\n\t\t\t\t\t\t  );
\n *\n * Create a new task and add it to the list of tasks that are ready to run.\n *\n * Internally, within the FreeRTOS implementation, tasks use two blocks of\n * memory.  The first block is used to hold the task's data structures.  The\n * second block is used by the task as its stack.  If a task is created using\n * xTaskCreate() then both blocks of memory are automatically dynamically\n * allocated inside the xTaskCreate() function.  (see\n * http://www.freertos.org/a00111.html).  If a task is created using\n * xTaskCreateStatic() then the application writer must provide the required\n * memory.  xTaskCreateStatic() therefore allows a task to be created without\n * using any dynamic memory allocation.\n *\n * See xTaskCreateStatic() for a version that does not use any dynamic memory\n * allocation.\n *\n * xTaskCreate() can only be used to create a task that has unrestricted\n * access to the entire microcontroller memory map.  Systems that include MPU\n * support can alternatively create an MPU constrained task using\n * xTaskCreateRestricted().\n *\n * @param pvTaskCode Pointer to the task entry function.  Tasks\n * must be implemented to never return (i.e. continuous loop).\n *\n * @param pcName A descriptive name for the task.  This is mainly used to\n * facilitate debugging.  Max length defined by configMAX_TASK_NAME_LEN - default\n * is 16.\n *\n * @param usStackDepth The size of the task stack specified as the number of\n * variables the stack can hold - not the number of bytes.  For example, if\n * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes\n * will be allocated for stack storage.\n *\n * @param pvParameters Pointer that will be used as the parameter for the task\n * being created.\n *\n * @param uxPriority The priority at which the task should run.  Systems that\n * include MPU support can optionally create tasks in a privileged (system)\n * mode by setting bit portPRIVILEGE_BIT of the priority parameter.  For\n * example, to create a privileged task at priority 2 the uxPriority parameter\n * should be set to ( 2 | portPRIVILEGE_BIT ).\n *\n * @param pvCreatedTask Used to pass back a handle by which the created task\n * can be referenced.\n *\n * @return pdPASS if the task was successfully created and added to a ready\n * list, otherwise an error code defined in the file projdefs.h\n *\n * Example usage:\n   
\n // Task to be created.\n void vTaskCode( void * pvParameters )\n {\n\t for( ;; )\n\t {\n\t\t // Task code goes here.\n\t }\n }\n\n // Function that creates a task.\n void vOtherFunction( void )\n {\n static uint8_t ucParameterToPass;\n TaskHandle_t xHandle = NULL;\n\n\t // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass\n\t // must exist for the lifetime of the task, so in this case is declared static.  If it was just an\n\t // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time\n\t // the new task attempts to access it.\n\t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );\n     configASSERT( xHandle );\n\n\t // Use the handle to delete the task.\n     if( xHandle != NULL )\n     {\n\t     vTaskDelete( xHandle );\n     }\n }\n   
\n * \\defgroup xTaskCreate xTaskCreate\n * \\ingroup Tasks\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\tBaseType_t xTaskCreate(\tTaskFunction_t pxTaskCode,\n\t\t\t\t\t\t\tconst char * const pcName,\t/*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\t\t\t\t\t\t\tconst configSTACK_DEPTH_TYPE usStackDepth,\n\t\t\t\t\t\t\tvoid * const pvParameters,\n\t\t\t\t\t\t\tUBaseType_t uxPriority,\n\t\t\t\t\t\t\tTaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;\n#endif\n\n/**\n * task. h\n *
\n TaskHandle_t xTaskCreateStatic( TaskFunction_t pvTaskCode,\n\t\t\t\t\t\t\t\t const char * const pcName,\n\t\t\t\t\t\t\t\t uint32_t ulStackDepth,\n\t\t\t\t\t\t\t\t void *pvParameters,\n\t\t\t\t\t\t\t\t UBaseType_t uxPriority,\n\t\t\t\t\t\t\t\t StackType_t *pxStackBuffer,\n\t\t\t\t\t\t\t\t StaticTask_t *pxTaskBuffer );
\n *\n * Create a new task and add it to the list of tasks that are ready to run.\n *\n * Internally, within the FreeRTOS implementation, tasks use two blocks of\n * memory.  The first block is used to hold the task's data structures.  The\n * second block is used by the task as its stack.  If a task is created using\n * xTaskCreate() then both blocks of memory are automatically dynamically\n * allocated inside the xTaskCreate() function.  (see\n * http://www.freertos.org/a00111.html).  If a task is created using\n * xTaskCreateStatic() then the application writer must provide the required\n * memory.  xTaskCreateStatic() therefore allows a task to be created without\n * using any dynamic memory allocation.\n *\n * @param pvTaskCode Pointer to the task entry function.  Tasks\n * must be implemented to never return (i.e. continuous loop).\n *\n * @param pcName A descriptive name for the task.  This is mainly used to\n * facilitate debugging.  The maximum length of the string is defined by\n * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h.\n *\n * @param ulStackDepth The size of the task stack specified as the number of\n * variables the stack can hold - not the number of bytes.  For example, if\n * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes\n * will be allocated for stack storage.\n *\n * @param pvParameters Pointer that will be used as the parameter for the task\n * being created.\n *\n * @param uxPriority The priority at which the task will run.\n *\n * @param pxStackBuffer Must point to a StackType_t array that has at least\n * ulStackDepth indexes - the array will then be used as the task's stack,\n * removing the need for the stack to be allocated dynamically.\n *\n * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will\n * then be used to hold the task's data structures, removing the need for the\n * memory to be allocated dynamically.\n *\n * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will\n * be created and pdPASS is returned.  If either pxStackBuffer or pxTaskBuffer\n * are NULL then the task will not be created and\n * errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY is returned.\n *\n * Example usage:\n   
\n\n    // Dimensions the buffer that the task being created will use as its stack.\n    // NOTE:  This is the number of words the stack will hold, not the number of\n    // bytes.  For example, if each stack item is 32-bits, and this is set to 100,\n    // then 400 bytes (100 * 32-bits) will be allocated.\n    #define STACK_SIZE 200\n\n    // Structure that will hold the TCB of the task being created.\n    StaticTask_t xTaskBuffer;\n\n    // Buffer that the task being created will use as its stack.  Note this is\n    // an array of StackType_t variables.  The size of StackType_t is dependent on\n    // the RTOS port.\n    StackType_t xStack[ STACK_SIZE ];\n\n    // Function that implements the task being created.\n    void vTaskCode( void * pvParameters )\n    {\n        // The parameter value is expected to be 1 as 1 is passed in the\n        // pvParameters value in the call to xTaskCreateStatic().\n        configASSERT( ( uint32_t ) pvParameters == 1UL );\n\n        for( ;; )\n        {\n            // Task code goes here.\n        }\n    }\n\n    // Function that creates a task.\n    void vOtherFunction( void )\n    {\n        TaskHandle_t xHandle = NULL;\n\n        // Create the task without using any dynamic memory allocation.\n        xHandle = xTaskCreateStatic(\n                      vTaskCode,       // Function that implements the task.\n                      \"NAME\",          // Text name for the task.\n                      STACK_SIZE,      // Stack size in words, not bytes.\n                      ( void * ) 1,    // Parameter passed into the task.\n                      tskIDLE_PRIORITY,// Priority at which the task is created.\n                      xStack,          // Array to use as the task's stack.\n                      &xTaskBuffer );  // Variable to hold the task's data structure.\n\n        // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have\n        // been created, and xHandle will be the task's handle.  Use the handle\n        // to suspend the task.\n        vTaskSuspend( xHandle );\n    }\n   
\n * \\defgroup xTaskCreateStatic xTaskCreateStatic\n * \\ingroup Tasks\n */\n#if( configSUPPORT_STATIC_ALLOCATION == 1 )\n\tTaskHandle_t xTaskCreateStatic(\tTaskFunction_t pxTaskCode,\n\t\t\t\t\t\t\t\t\tconst char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\t\t\t\t\t\t\t\t\tconst uint32_t ulStackDepth,\n\t\t\t\t\t\t\t\t\tvoid * const pvParameters,\n\t\t\t\t\t\t\t\t\tUBaseType_t uxPriority,\n\t\t\t\t\t\t\t\t\tStackType_t * const puxStackBuffer,\n\t\t\t\t\t\t\t\t\tStaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;\n#endif /* configSUPPORT_STATIC_ALLOCATION */\n\n/**\n * task. h\n *
\n BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
\n *\n * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1.\n *\n * xTaskCreateRestricted() should only be used in systems that include an MPU\n * implementation.\n *\n * Create a new task and add it to the list of tasks that are ready to run.\n * The function parameters define the memory regions and associated access\n * permissions allocated to the task.\n *\n * See xTaskCreateRestrictedStatic() for a version that does not use any\n * dynamic memory allocation.\n *\n * @param pxTaskDefinition Pointer to a structure that contains a member\n * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API\n * documentation) plus an optional stack buffer and the memory region\n * definitions.\n *\n * @param pxCreatedTask Used to pass back a handle by which the created task\n * can be referenced.\n *\n * @return pdPASS if the task was successfully created and added to a ready\n * list, otherwise an error code defined in the file projdefs.h\n *\n * Example usage:\n   
\n// Create an TaskParameters_t structure that defines the task to be created.\nstatic const TaskParameters_t xCheckTaskParameters =\n{\n\tvATask,\t\t// pvTaskCode - the function that implements the task.\n\t\"ATask\",\t// pcName - just a text name for the task to assist debugging.\n\t100,\t\t// usStackDepth\t- the stack size DEFINED IN WORDS.\n\tNULL,\t\t// pvParameters - passed into the task function as the function parameters.\n\t( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.\n\tcStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.\n\n\t// xRegions - Allocate up to three separate memory regions for access by\n\t// the task, with appropriate access permissions.  Different processors have\n\t// different memory alignment requirements - refer to the FreeRTOS documentation\n\t// for full information.\n\t{\n\t\t// Base address\t\t\t\t\tLength\tParameters\n        { cReadWriteArray,\t\t\t\t32,\t\tportMPU_REGION_READ_WRITE },\n        { cReadOnlyArray,\t\t\t\t32,\t\tportMPU_REGION_READ_ONLY },\n        { cPrivilegedOnlyAccessArray,\t128,\tportMPU_REGION_PRIVILEGED_READ_WRITE }\n\t}\n};\n\nint main( void )\n{\nTaskHandle_t xHandle;\n\n\t// Create a task from the const structure defined above.  The task handle\n\t// is requested (the second parameter is not NULL) but in this case just for\n\t// demonstration purposes as its not actually used.\n\txTaskCreateRestricted( &xRegTest1Parameters, &xHandle );\n\n\t// Start the scheduler.\n\tvTaskStartScheduler();\n\n\t// Will only get here if there was insufficient memory to create the idle\n\t// and/or timer task.\n\tfor( ;; );\n}\n   
\n * \\defgroup xTaskCreateRestricted xTaskCreateRestricted\n * \\ingroup Tasks\n */\n#if( portUSING_MPU_WRAPPERS == 1 )\n\tBaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION;\n#endif\n\n/**\n * task. h\n *
\n BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );
\n *\n * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1.\n *\n * xTaskCreateRestrictedStatic() should only be used in systems that include an\n * MPU implementation.\n *\n * Internally, within the FreeRTOS implementation, tasks use two blocks of\n * memory.  The first block is used to hold the task's data structures.  The\n * second block is used by the task as its stack.  If a task is created using\n * xTaskCreateRestricted() then the stack is provided by the application writer,\n * and the memory used to hold the task's data structure is automatically\n * dynamically allocated inside the xTaskCreateRestricted() function.  If a task\n * is created using xTaskCreateRestrictedStatic() then the application writer\n * must provide the memory used to hold the task's data structures too.\n * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be\n * created without using any dynamic memory allocation.\n *\n * @param pxTaskDefinition Pointer to a structure that contains a member\n * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API\n * documentation) plus an optional stack buffer and the memory region\n * definitions.  If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure\n * contains an additional member, which is used to point to a variable of type\n * StaticTask_t - which is then used to hold the task's data structure.\n *\n * @param pxCreatedTask Used to pass back a handle by which the created task\n * can be referenced.\n *\n * @return pdPASS if the task was successfully created and added to a ready\n * list, otherwise an error code defined in the file projdefs.h\n *\n * Example usage:\n   
\n// Create an TaskParameters_t structure that defines the task to be created.\n// The StaticTask_t variable is only included in the structure when\n// configSUPPORT_STATIC_ALLOCATION is set to 1.  The PRIVILEGED_DATA macro can\n// be used to force the variable into the RTOS kernel's privileged data area.\nstatic PRIVILEGED_DATA StaticTask_t xTaskBuffer;\nstatic const TaskParameters_t xCheckTaskParameters =\n{\n\tvATask,\t\t// pvTaskCode - the function that implements the task.\n\t\"ATask\",\t// pcName - just a text name for the task to assist debugging.\n\t100,\t\t// usStackDepth\t- the stack size DEFINED IN WORDS.\n\tNULL,\t\t// pvParameters - passed into the task function as the function parameters.\n\t( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.\n\tcStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.\n\n\t// xRegions - Allocate up to three separate memory regions for access by\n\t// the task, with appropriate access permissions.  Different processors have\n\t// different memory alignment requirements - refer to the FreeRTOS documentation\n\t// for full information.\n\t{\n\t\t// Base address\t\t\t\t\tLength\tParameters\n        { cReadWriteArray,\t\t\t\t32,\t\tportMPU_REGION_READ_WRITE },\n        { cReadOnlyArray,\t\t\t\t32,\t\tportMPU_REGION_READ_ONLY },\n        { cPrivilegedOnlyAccessArray,\t128,\tportMPU_REGION_PRIVILEGED_READ_WRITE }\n\t}\n\n\t&xTaskBuffer; // Holds the task's data structure.\n};\n\nint main( void )\n{\nTaskHandle_t xHandle;\n\n\t// Create a task from the const structure defined above.  The task handle\n\t// is requested (the second parameter is not NULL) but in this case just for\n\t// demonstration purposes as its not actually used.\n\txTaskCreateRestricted( &xRegTest1Parameters, &xHandle );\n\n\t// Start the scheduler.\n\tvTaskStartScheduler();\n\n\t// Will only get here if there was insufficient memory to create the idle\n\t// and/or timer task.\n\tfor( ;; );\n}\n   
\n * \\defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic\n * \\ingroup Tasks\n */\n#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )\n\tBaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION;\n#endif\n\n/**\n * task. h\n *
\n void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );
\n *\n * Memory regions are assigned to a restricted task when the task is created by\n * a call to xTaskCreateRestricted().  These regions can be redefined using\n * vTaskAllocateMPURegions().\n *\n * @param xTask The handle of the task being updated.\n *\n * @param xRegions A pointer to an MemoryRegion_t structure that contains the\n * new memory region definitions.\n *\n * Example usage:\n   
\n// Define an array of MemoryRegion_t structures that configures an MPU region\n// allowing read/write access for 1024 bytes starting at the beginning of the\n// ucOneKByte array.  The other two of the maximum 3 definable regions are\n// unused so set to zero.\nstatic const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =\n{\n\t// Base address\t\tLength\t\tParameters\n\t{ ucOneKByte,\t\t1024,\t\tportMPU_REGION_READ_WRITE },\n\t{ 0,\t\t\t\t0,\t\t\t0 },\n\t{ 0,\t\t\t\t0,\t\t\t0 }\n};\n\nvoid vATask( void *pvParameters )\n{\n\t// This task was created such that it has access to certain regions of\n\t// memory as defined by the MPU configuration.  At some point it is\n\t// desired that these MPU regions are replaced with that defined in the\n\t// xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()\n\t// for this purpose.  NULL is used as the task handle to indicate that this\n\t// function should modify the MPU regions of the calling task.\n\tvTaskAllocateMPURegions( NULL, xAltRegions );\n\n\t// Now the task can continue its function, but from this point on can only\n\t// access its stack and the ucOneKByte array (unless any other statically\n\t// defined or shared regions have been declared elsewhere).\n}\n   
\n * \\defgroup xTaskCreateRestricted xTaskCreateRestricted\n * \\ingroup Tasks\n */\nvoid vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskDelete( TaskHandle_t xTask );
\n *\n * INCLUDE_vTaskDelete must be defined as 1 for this function to be available.\n * See the configuration section for more information.\n *\n * Remove a task from the RTOS real time kernel's management.  The task being\n * deleted will be removed from all ready, blocked, suspended and event lists.\n *\n * NOTE:  The idle task is responsible for freeing the kernel allocated\n * memory from tasks that have been deleted.  It is therefore important that\n * the idle task is not starved of microcontroller processing time if your\n * application makes any calls to vTaskDelete ().  Memory allocated by the\n * task code is not automatically freed, and should be freed before the task\n * is deleted.\n *\n * See the demo application file death.c for sample code that utilises\n * vTaskDelete ().\n *\n * @param xTask The handle of the task to be deleted.  Passing NULL will\n * cause the calling task to be deleted.\n *\n * Example usage:\n   
\n void vOtherFunction( void )\n {\n TaskHandle_t xHandle;\n\n\t // Create the task, storing the handle.\n\t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\n\n\t // Use the handle to delete the task.\n\t vTaskDelete( xHandle );\n }\n   
\n * \\defgroup vTaskDelete vTaskDelete\n * \\ingroup Tasks\n */\nvoid vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;\n\n/*-----------------------------------------------------------\n * TASK CONTROL API\n *----------------------------------------------------------*/\n\n/**\n * task. h\n * 
void vTaskDelay( const TickType_t xTicksToDelay );
\n *\n * Delay a task for a given number of ticks.  The actual time that the\n * task remains blocked depends on the tick rate.  The constant\n * portTICK_PERIOD_MS can be used to calculate real time from the tick\n * rate - with the resolution of one tick period.\n *\n * INCLUDE_vTaskDelay must be defined as 1 for this function to be available.\n * See the configuration section for more information.\n *\n *\n * vTaskDelay() specifies a time at which the task wishes to unblock relative to\n * the time at which vTaskDelay() is called.  For example, specifying a block\n * period of 100 ticks will cause the task to unblock 100 ticks after\n * vTaskDelay() is called.  vTaskDelay() does not therefore provide a good method\n * of controlling the frequency of a periodic task as the path taken through the\n * code, as well as other task and interrupt activity, will effect the frequency\n * at which vTaskDelay() gets called and therefore the time at which the task\n * next executes.  See vTaskDelayUntil() for an alternative API function designed\n * to facilitate fixed frequency execution.  It does this by specifying an\n * absolute time (rather than a relative time) at which the calling task should\n * unblock.\n *\n * @param xTicksToDelay The amount of time, in tick periods, that\n * the calling task should block.\n *\n * Example usage:\n\n void vTaskFunction( void * pvParameters )\n {\n // Block for 500ms.\n const TickType_t xDelay = 500 / portTICK_PERIOD_MS;\n\n\t for( ;; )\n\t {\n\t\t // Simply toggle the LED every 500ms, blocking between each toggle.\n\t\t vToggleLED();\n\t\t vTaskDelay( xDelay );\n\t }\n }\n\n * \\defgroup vTaskDelay vTaskDelay\n * \\ingroup TaskCtrl\n */\nvoid vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );
\n *\n * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available.\n * See the configuration section for more information.\n *\n * Delay a task until a specified time.  This function can be used by periodic\n * tasks to ensure a constant execution frequency.\n *\n * This function differs from vTaskDelay () in one important aspect:  vTaskDelay () will\n * cause a task to block for the specified number of ticks from the time vTaskDelay () is\n * called.  It is therefore difficult to use vTaskDelay () by itself to generate a fixed\n * execution frequency as the time between a task starting to execute and that task\n * calling vTaskDelay () may not be fixed [the task may take a different path though the\n * code between calls, or may get interrupted or preempted a different number of times\n * each time it executes].\n *\n * Whereas vTaskDelay () specifies a wake time relative to the time at which the function\n * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to\n * unblock.\n *\n * The constant portTICK_PERIOD_MS can be used to calculate real time from the tick\n * rate - with the resolution of one tick period.\n *\n * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the\n * task was last unblocked.  The variable must be initialised with the current time\n * prior to its first use (see the example below).  Following this the variable is\n * automatically updated within vTaskDelayUntil ().\n *\n * @param xTimeIncrement The cycle time period.  The task will be unblocked at\n * time *pxPreviousWakeTime + xTimeIncrement.  Calling vTaskDelayUntil with the\n * same xTimeIncrement parameter value will cause the task to execute with\n * a fixed interface period.\n *\n * Example usage:\n   
\n // Perform an action every 10 ticks.\n void vTaskFunction( void * pvParameters )\n {\n TickType_t xLastWakeTime;\n const TickType_t xFrequency = 10;\n\n\t // Initialise the xLastWakeTime variable with the current time.\n\t xLastWakeTime = xTaskGetTickCount ();\n\t for( ;; )\n\t {\n\t\t // Wait for the next cycle.\n\t\t vTaskDelayUntil( &xLastWakeTime, xFrequency );\n\n\t\t // Perform action here.\n\t }\n }\n   
\n * \\defgroup vTaskDelayUntil vTaskDelayUntil\n * \\ingroup TaskCtrl\n */\nvoid vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
BaseType_t xTaskAbortDelay( TaskHandle_t xTask );
\n *\n * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this\n * function to be available.\n *\n * A task will enter the Blocked state when it is waiting for an event.  The\n * event it is waiting for can be a temporal event (waiting for a time), such\n * as when vTaskDelay() is called, or an event on an object, such as when\n * xQueueReceive() or ulTaskNotifyTake() is called.  If the handle of a task\n * that is in the Blocked state is used in a call to xTaskAbortDelay() then the\n * task will leave the Blocked state, and return from whichever function call\n * placed the task into the Blocked state.\n *\n * @param xTask The handle of the task to remove from the Blocked state.\n *\n * @return If the task referenced by xTask was not in the Blocked state then\n * pdFAIL is returned.  Otherwise pdPASS is returned.\n *\n * \\defgroup xTaskAbortDelay xTaskAbortDelay\n * \\ingroup TaskCtrl\n */\nBaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask );
\n *\n * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available.\n * See the configuration section for more information.\n *\n * Obtain the priority of any task.\n *\n * @param xTask Handle of the task to be queried.  Passing a NULL\n * handle results in the priority of the calling task being returned.\n *\n * @return The priority of xTask.\n *\n * Example usage:\n   
\n void vAFunction( void )\n {\n TaskHandle_t xHandle;\n\n\t // Create a task, storing the handle.\n\t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\n\n\t // ...\n\n\t // Use the handle to obtain the priority of the created task.\n\t // It was created with tskIDLE_PRIORITY, but may have changed\n\t // it itself.\n\t if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )\n\t {\n\t\t // The task has changed it's priority.\n\t }\n\n\t // ...\n\n\t // Is our priority higher than the created task?\n\t if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )\n\t {\n\t\t // Our priority (obtained using NULL handle) is higher.\n\t }\n }\n   
\n * \\defgroup uxTaskPriorityGet uxTaskPriorityGet\n * \\ingroup TaskCtrl\n */\nUBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask );
\n *\n * A version of uxTaskPriorityGet() that can be used from an ISR.\n */\nUBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
eTaskState eTaskGetState( TaskHandle_t xTask );
\n *\n * INCLUDE_eTaskGetState must be defined as 1 for this function to be available.\n * See the configuration section for more information.\n *\n * Obtain the state of any task.  States are encoded by the eTaskState\n * enumerated type.\n *\n * @param xTask Handle of the task to be queried.\n *\n * @return The state of xTask at the time the function was called.  Note the\n * state of the task might change between the function being called, and the\n * functions return value being tested by the calling task.\n */\neTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );
\n *\n * configUSE_TRACE_FACILITY must be defined as 1 for this function to be\n * available.  See the configuration section for more information.\n *\n * Populates a TaskStatus_t structure with information about a task.\n *\n * @param xTask Handle of the task being queried.  If xTask is NULL then\n * information will be returned about the calling task.\n *\n * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be\n * filled with information about the task referenced by the handle passed using\n * the xTask parameter.\n *\n * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report\n * the stack high water mark of the task being queried.  Calculating the stack\n * high water mark takes a relatively long time, and can make the system\n * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to\n * allow the high water mark checking to be skipped.  The high watermark value\n * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is\n * not set to pdFALSE;\n *\n * @param eState The TaskStatus_t structure contains a member to report the\n * state of the task being queried.  Obtaining the task state is not as fast as\n * a simple assignment - so the eState parameter is provided to allow the state\n * information to be omitted from the TaskStatus_t structure.  To obtain state\n * information then set eState to eInvalid - otherwise the value passed in\n * eState will be reported as the task state in the TaskStatus_t structure.\n *\n * Example usage:\n   
\n void vAFunction( void )\n {\n TaskHandle_t xHandle;\n TaskStatus_t xTaskDetails;\n\n    // Obtain the handle of a task from its name.\n    xHandle = xTaskGetHandle( \"Task_Name\" );\n\n    // Check the handle is not NULL.\n    configASSERT( xHandle );\n\n    // Use the handle to obtain further information about the task.\n    vTaskGetInfo( xHandle,\n                  &xTaskDetails,\n                  pdTRUE, // Include the high water mark in xTaskDetails.\n                  eInvalid ); // Include the task state in xTaskDetails.\n }\n   
\n * \\defgroup vTaskGetInfo vTaskGetInfo\n * \\ingroup TaskCtrl\n */\nvoid vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );
\n *\n * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available.\n * See the configuration section for more information.\n *\n * Set the priority of any task.\n *\n * A context switch will occur before the function returns if the priority\n * being set is higher than the currently executing task.\n *\n * @param xTask Handle to the task for which the priority is being set.\n * Passing a NULL handle results in the priority of the calling task being set.\n *\n * @param uxNewPriority The priority to which the task will be set.\n *\n * Example usage:\n   
\n void vAFunction( void )\n {\n TaskHandle_t xHandle;\n\n\t // Create a task, storing the handle.\n\t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\n\n\t // ...\n\n\t // Use the handle to raise the priority of the created task.\n\t vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );\n\n\t // ...\n\n\t // Use a NULL handle to raise our priority to the same value.\n\t vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );\n }\n   
\n * \\defgroup vTaskPrioritySet vTaskPrioritySet\n * \\ingroup TaskCtrl\n */\nvoid vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskSuspend( TaskHandle_t xTaskToSuspend );
\n *\n * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.\n * See the configuration section for more information.\n *\n * Suspend any task.  When suspended a task will never get any microcontroller\n * processing time, no matter what its priority.\n *\n * Calls to vTaskSuspend are not accumulative -\n * i.e. calling vTaskSuspend () twice on the same task still only requires one\n * call to vTaskResume () to ready the suspended task.\n *\n * @param xTaskToSuspend Handle to the task being suspended.  Passing a NULL\n * handle will cause the calling task to be suspended.\n *\n * Example usage:\n   
\n void vAFunction( void )\n {\n TaskHandle_t xHandle;\n\n\t // Create a task, storing the handle.\n\t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\n\n\t // ...\n\n\t // Use the handle to suspend the created task.\n\t vTaskSuspend( xHandle );\n\n\t // ...\n\n\t // The created task will not run during this period, unless\n\t // another task calls vTaskResume( xHandle ).\n\n\t //...\n\n\n\t // Suspend ourselves.\n\t vTaskSuspend( NULL );\n\n\t // We cannot get here unless another task calls vTaskResume\n\t // with our handle as the parameter.\n }\n   
\n * \\defgroup vTaskSuspend vTaskSuspend\n * \\ingroup TaskCtrl\n */\nvoid vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskResume( TaskHandle_t xTaskToResume );
\n *\n * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.\n * See the configuration section for more information.\n *\n * Resumes a suspended task.\n *\n * A task that has been suspended by one or more calls to vTaskSuspend ()\n * will be made available for running again by a single call to\n * vTaskResume ().\n *\n * @param xTaskToResume Handle to the task being readied.\n *\n * Example usage:\n   
\n void vAFunction( void )\n {\n TaskHandle_t xHandle;\n\n\t // Create a task, storing the handle.\n\t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );\n\n\t // ...\n\n\t // Use the handle to suspend the created task.\n\t vTaskSuspend( xHandle );\n\n\t // ...\n\n\t // The created task will not run during this period, unless\n\t // another task calls vTaskResume( xHandle ).\n\n\t //...\n\n\n\t // Resume the suspended task ourselves.\n\t vTaskResume( xHandle );\n\n\t // The created task will once again get microcontroller processing\n\t // time in accordance with its priority within the system.\n }\n   
\n * \\defgroup vTaskResume vTaskResume\n * \\ingroup TaskCtrl\n */\nvoid vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void xTaskResumeFromISR( TaskHandle_t xTaskToResume );
\n *\n * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be\n * available.  See the configuration section for more information.\n *\n * An implementation of vTaskResume() that can be called from within an ISR.\n *\n * A task that has been suspended by one or more calls to vTaskSuspend ()\n * will be made available for running again by a single call to\n * xTaskResumeFromISR ().\n *\n * xTaskResumeFromISR() should not be used to synchronise a task with an\n * interrupt if there is a chance that the interrupt could arrive prior to the\n * task being suspended - as this can lead to interrupts being missed. Use of a\n * semaphore as a synchronisation mechanism would avoid this eventuality.\n *\n * @param xTaskToResume Handle to the task being readied.\n *\n * @return pdTRUE if resuming the task should result in a context switch,\n * otherwise pdFALSE. This is used by the ISR to determine if a context switch\n * may be required following the ISR.\n *\n * \\defgroup vTaskResumeFromISR vTaskResumeFromISR\n * \\ingroup TaskCtrl\n */\nBaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;\n\n/*-----------------------------------------------------------\n * SCHEDULER CONTROL\n *----------------------------------------------------------*/\n\n/**\n * task. h\n * 
void vTaskStartScheduler( void );
\n *\n * Starts the real time kernel tick processing.  After calling the kernel\n * has control over which tasks are executed and when.\n *\n * See the demo application file main.c for an example of creating\n * tasks and starting the kernel.\n *\n * Example usage:\n   
\n void vAFunction( void )\n {\n\t // Create at least one task before starting the kernel.\n\t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\n\n\t // Start the real time kernel with preemption.\n\t vTaskStartScheduler ();\n\n\t // Will not get here unless a task calls vTaskEndScheduler ()\n }\n   
\n *\n * \\defgroup vTaskStartScheduler vTaskStartScheduler\n * \\ingroup SchedulerControl\n */\nvoid vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskEndScheduler( void );
\n *\n * NOTE:  At the time of writing only the x86 real mode port, which runs on a PC\n * in place of DOS, implements this function.\n *\n * Stops the real time kernel tick.  All created tasks will be automatically\n * deleted and multitasking (either preemptive or cooperative) will\n * stop.  Execution then resumes from the point where vTaskStartScheduler ()\n * was called, as if vTaskStartScheduler () had just returned.\n *\n * See the demo application file main. c in the demo/PC directory for an\n * example that uses vTaskEndScheduler ().\n *\n * vTaskEndScheduler () requires an exit function to be defined within the\n * portable layer (see vPortEndScheduler () in port. c for the PC port).  This\n * performs hardware specific operations such as stopping the kernel tick.\n *\n * vTaskEndScheduler () will cause all of the resources allocated by the\n * kernel to be freed - but will not free resources allocated by application\n * tasks.\n *\n * Example usage:\n   
\n void vTaskCode( void * pvParameters )\n {\n\t for( ;; )\n\t {\n\t\t // Task code goes here.\n\n\t\t // At some point we want to end the real time kernel processing\n\t\t // so call ...\n\t\t vTaskEndScheduler ();\n\t }\n }\n\n void vAFunction( void )\n {\n\t // Create at least one task before starting the kernel.\n\t xTaskCreate( vTaskCode, \"NAME\", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\n\n\t // Start the real time kernel with preemption.\n\t vTaskStartScheduler ();\n\n\t // Will only get here when the vTaskCode () task has called\n\t // vTaskEndScheduler ().  When we get here we are back to single task\n\t // execution.\n }\n   
\n *\n * \\defgroup vTaskEndScheduler vTaskEndScheduler\n * \\ingroup SchedulerControl\n */\nvoid vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskSuspendAll( void );
\n *\n * Suspends the scheduler without disabling interrupts.  Context switches will\n * not occur while the scheduler is suspended.\n *\n * After calling vTaskSuspendAll () the calling task will continue to execute\n * without risk of being swapped out until a call to xTaskResumeAll () has been\n * made.\n *\n * API functions that have the potential to cause a context switch (for example,\n * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler\n * is suspended.\n *\n * Example usage:\n   
\n void vTask1( void * pvParameters )\n {\n\t for( ;; )\n\t {\n\t\t // Task code goes here.\n\n\t\t // ...\n\n\t\t // At some point the task wants to perform a long operation during\n\t\t // which it does not want to get swapped out.  It cannot use\n\t\t // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the\n\t\t // operation may cause interrupts to be missed - including the\n\t\t // ticks.\n\n\t\t // Prevent the real time kernel swapping out the task.\n\t\t vTaskSuspendAll ();\n\n\t\t // Perform the operation here.  There is no need to use critical\n\t\t // sections as we have all the microcontroller processing time.\n\t\t // During this time interrupts will still operate and the kernel\n\t\t // tick count will be maintained.\n\n\t\t // ...\n\n\t\t // The operation is complete.  Restart the kernel.\n\t\t xTaskResumeAll ();\n\t }\n }\n   
\n * \\defgroup vTaskSuspendAll vTaskSuspendAll\n * \\ingroup SchedulerControl\n */\nvoid vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
BaseType_t xTaskResumeAll( void );
\n *\n * Resumes scheduler activity after it was suspended by a call to\n * vTaskSuspendAll().\n *\n * xTaskResumeAll() only resumes the scheduler.  It does not unsuspend tasks\n * that were previously suspended by a call to vTaskSuspend().\n *\n * @return If resuming the scheduler caused a context switch then pdTRUE is\n *\t\t  returned, otherwise pdFALSE is returned.\n *\n * Example usage:\n   
\n void vTask1( void * pvParameters )\n {\n\t for( ;; )\n\t {\n\t\t // Task code goes here.\n\n\t\t // ...\n\n\t\t // At some point the task wants to perform a long operation during\n\t\t // which it does not want to get swapped out.  It cannot use\n\t\t // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the\n\t\t // operation may cause interrupts to be missed - including the\n\t\t // ticks.\n\n\t\t // Prevent the real time kernel swapping out the task.\n\t\t vTaskSuspendAll ();\n\n\t\t // Perform the operation here.  There is no need to use critical\n\t\t // sections as we have all the microcontroller processing time.\n\t\t // During this time interrupts will still operate and the real\n\t\t // time kernel tick count will be maintained.\n\n\t\t // ...\n\n\t\t // The operation is complete.  Restart the kernel.  We want to force\n\t\t // a context switch - but there is no point if resuming the scheduler\n\t\t // caused a context switch already.\n\t\t if( !xTaskResumeAll () )\n\t\t {\n\t\t\t  taskYIELD ();\n\t\t }\n\t }\n }\n   
\n * \\defgroup xTaskResumeAll xTaskResumeAll\n * \\ingroup SchedulerControl\n */\nBaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;\n\n/*-----------------------------------------------------------\n * TASK UTILITIES\n *----------------------------------------------------------*/\n\n/**\n * task. h\n * 
TickType_t xTaskGetTickCount( void );
\n *\n * @return The count of ticks since vTaskStartScheduler was called.\n *\n * \\defgroup xTaskGetTickCount xTaskGetTickCount\n * \\ingroup TaskUtils\n */\nTickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
TickType_t xTaskGetTickCountFromISR( void );
\n *\n * @return The count of ticks since vTaskStartScheduler was called.\n *\n * This is a version of xTaskGetTickCount() that is safe to be called from an\n * ISR - provided that TickType_t is the natural word size of the\n * microcontroller being used or interrupt nesting is either not supported or\n * not being used.\n *\n * \\defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR\n * \\ingroup TaskUtils\n */\nTickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
uint16_t uxTaskGetNumberOfTasks( void );
\n *\n * @return The number of tasks that the real time kernel is currently managing.\n * This includes all ready, blocked and suspended tasks.  A task that\n * has been deleted but not yet freed by the idle task will also be\n * included in the count.\n *\n * \\defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks\n * \\ingroup TaskUtils\n */\nUBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
char *pcTaskGetName( TaskHandle_t xTaskToQuery );
\n *\n * @return The text (human readable) name of the task referenced by the handle\n * xTaskToQuery.  A task can query its own name by either passing in its own\n * handle, or by setting xTaskToQuery to NULL.\n *\n * \\defgroup pcTaskGetName pcTaskGetName\n * \\ingroup TaskUtils\n */\nchar *pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\n/**\n * task. h\n * 
TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );
\n *\n * NOTE:  This function takes a relatively long time to complete and should be\n * used sparingly.\n *\n * @return The handle of the task that has the human readable name pcNameToQuery.\n * NULL is returned if no matching name is found.  INCLUDE_xTaskGetHandle\n * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available.\n *\n * \\defgroup pcTaskGetHandle pcTaskGetHandle\n * \\ingroup TaskUtils\n */\nTaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\n/**\n * task.h\n * 
UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );
\n *\n * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for\n * this function to be available.\n *\n * Returns the high water mark of the stack associated with xTask.  That is,\n * the minimum free stack space there has been (in words, so on a 32 bit machine\n * a value of 1 means 4 bytes) since the task started.  The smaller the returned\n * number the closer the task has come to overflowing its stack.\n *\n * @param xTask Handle of the task associated with the stack to be checked.\n * Set xTask to NULL to check the stack of the calling task.\n *\n * @return The smallest amount of free stack space there has been (in words, so\n * actual spaces on the stack rather than bytes) since the task referenced by\n * xTask was created.\n */\nUBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\n\n/* When using trace macros it is sometimes necessary to include task.h before\nFreeRTOS.h.  When this is done TaskHookFunction_t will not yet have been defined,\nso the following two prototypes will cause a compilation error.  This can be\nfixed by simply guarding against the inclusion of these two prototypes unless\nthey are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration\nconstant. */\n#ifdef configUSE_APPLICATION_TASK_TAG\n\t#if configUSE_APPLICATION_TASK_TAG == 1\n\t\t/**\n\t\t * task.h\n\t\t * 
void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );
\n\t\t *\n\t\t * Sets pxHookFunction to be the task hook function used by the task xTask.\n\t\t * Passing xTask as NULL has the effect of setting the calling tasks hook\n\t\t * function.\n\t\t */\n\t\tvoid vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION;\n\n\t\t/**\n\t\t * task.h\n\t\t * 
void xTaskGetApplicationTaskTag( TaskHandle_t xTask );
\n\t\t *\n\t\t * Returns the pxHookFunction value assigned to the task xTask.\n\t\t */\n\t\tTaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\n\t#endif /* configUSE_APPLICATION_TASK_TAG ==1 */\n#endif /* ifdef configUSE_APPLICATION_TASK_TAG */\n\n#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )\n\n\t/* Each task contains an array of pointers that is dimensioned by the\n\tconfigNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h.  The\n\tkernel does not use the pointers itself, so the application writer can use\n\tthe pointers for any purpose they wish.  The following two functions are\n\tused to set and query a pointer respectively. */\n\tvoid vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) PRIVILEGED_FUNCTION;\n\tvoid *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) PRIVILEGED_FUNCTION;\n\n#endif\n\n/**\n * task.h\n * 
BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );
\n *\n * Calls the hook function associated with xTask.  Passing xTask as NULL has\n * the effect of calling the Running tasks (the calling task) hook function.\n *\n * pvParameter is passed to the hook function for the task to interpret as it\n * wants.  The return value is the value returned by the task hook function\n * registered by the user.\n */\nBaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) PRIVILEGED_FUNCTION;\n\n/**\n * xTaskGetIdleTaskHandle() is only available if\n * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h.\n *\n * Simply returns the handle of the idle task.  It is not valid to call\n * xTaskGetIdleTaskHandle() before the scheduler has been started.\n */\nTaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;\n\n/**\n * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for\n * uxTaskGetSystemState() to be available.\n *\n * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in\n * the system.  TaskStatus_t structures contain, among other things, members\n * for the task handle, task name, task priority, task state, and total amount\n * of run time consumed by the task.  See the TaskStatus_t structure\n * definition in this file for the full member list.\n *\n * NOTE:  This function is intended for debugging use only as its use results in\n * the scheduler remaining suspended for an extended period.\n *\n * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures.\n * The array must contain at least one TaskStatus_t structure for each task\n * that is under the control of the RTOS.  The number of tasks under the control\n * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function.\n *\n * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray\n * parameter.  The size is specified as the number of indexes in the array, or\n * the number of TaskStatus_t structures contained in the array, not by the\n * number of bytes in the array.\n *\n * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in\n * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the\n * total run time (as defined by the run time stats clock, see\n * http://www.freertos.org/rtos-run-time-stats.html) since the target booted.\n * pulTotalRunTime can be set to NULL to omit the total run time information.\n *\n * @return The number of TaskStatus_t structures that were populated by\n * uxTaskGetSystemState().  This should equal the number returned by the\n * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed\n * in the uxArraySize parameter was too small.\n *\n * Example usage:\n   
\n    // This example demonstrates how a human readable table of run time stats\n\t// information is generated from raw data provided by uxTaskGetSystemState().\n\t// The human readable table is written to pcWriteBuffer\n\tvoid vTaskGetRunTimeStats( char *pcWriteBuffer )\n\t{\n\tTaskStatus_t *pxTaskStatusArray;\n\tvolatile UBaseType_t uxArraySize, x;\n\tuint32_t ulTotalRunTime, ulStatsAsPercentage;\n\n\t\t// Make sure the write buffer does not contain a string.\n\t\t*pcWriteBuffer = 0x00;\n\n\t\t// Take a snapshot of the number of tasks in case it changes while this\n\t\t// function is executing.\n\t\tuxArraySize = uxTaskGetNumberOfTasks();\n\n\t\t// Allocate a TaskStatus_t structure for each task.  An array could be\n\t\t// allocated statically at compile time.\n\t\tpxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );\n\n\t\tif( pxTaskStatusArray != NULL )\n\t\t{\n\t\t\t// Generate raw status information about each task.\n\t\t\tuxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );\n\n\t\t\t// For percentage calculations.\n\t\t\tulTotalRunTime /= 100UL;\n\n\t\t\t// Avoid divide by zero errors.\n\t\t\tif( ulTotalRunTime > 0 )\n\t\t\t{\n\t\t\t\t// For each populated position in the pxTaskStatusArray array,\n\t\t\t\t// format the raw data as human readable ASCII data\n\t\t\t\tfor( x = 0; x < uxArraySize; x++ )\n\t\t\t\t{\n\t\t\t\t\t// What percentage of the total run time has the task used?\n\t\t\t\t\t// This will always be rounded down to the nearest integer.\n\t\t\t\t\t// ulTotalRunTimeDiv100 has already been divided by 100.\n\t\t\t\t\tulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;\n\n\t\t\t\t\tif( ulStatsAsPercentage > 0UL )\n\t\t\t\t\t{\n\t\t\t\t\t\tsprintf( pcWriteBuffer, \"%s\\t\\t%lu\\t\\t%lu%%\\r\\n\", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );\n\t\t\t\t\t}\n\t\t\t\t\telse\n\t\t\t\t\t{\n\t\t\t\t\t\t// If the percentage is zero here then the task has\n\t\t\t\t\t\t// consumed less than 1% of the total run time.\n\t\t\t\t\t\tsprintf( pcWriteBuffer, \"%s\\t\\t%lu\\t\\t<1%%\\r\\n\", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );\n\t\t\t\t\t}\n\n\t\t\t\t\tpcWriteBuffer += strlen( ( char * ) pcWriteBuffer );\n\t\t\t\t}\n\t\t\t}\n\n\t\t\t// The array is no longer needed, free the memory it consumes.\n\t\t\tvPortFree( pxTaskStatusArray );\n\t\t}\n\t}\n\t
\n */\nUBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
void vTaskList( char *pcWriteBuffer );
\n *\n * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must\n * both be defined as 1 for this function to be available.  See the\n * configuration section of the FreeRTOS.org website for more information.\n *\n * NOTE 1: This function will disable interrupts for its duration.  It is\n * not intended for normal application runtime use but as a debug aid.\n *\n * Lists all the current tasks, along with their current state and stack\n * usage high water mark.\n *\n * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or\n * suspended ('S').\n *\n * PLEASE NOTE:\n *\n * This function is provided for convenience only, and is used by many of the\n * demo applications.  Do not consider it to be part of the scheduler.\n *\n * vTaskList() calls uxTaskGetSystemState(), then formats part of the\n * uxTaskGetSystemState() output into a human readable table that displays task\n * names, states and stack usage.\n *\n * vTaskList() has a dependency on the sprintf() C library function that might\n * bloat the code size, use a lot of stack, and provide different results on\n * different platforms.  An alternative, tiny, third party, and limited\n * functionality implementation of sprintf() is provided in many of the\n * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note\n * printf-stdarg.c does not provide a full snprintf() implementation!).\n *\n * It is recommended that production systems call uxTaskGetSystemState()\n * directly to get access to raw stats data, rather than indirectly through a\n * call to vTaskList().\n *\n * @param pcWriteBuffer A buffer into which the above mentioned details\n * will be written, in ASCII form.  This buffer is assumed to be large\n * enough to contain the generated report.  Approximately 40 bytes per\n * task should be sufficient.\n *\n * \\defgroup vTaskList vTaskList\n * \\ingroup TaskUtils\n */\nvoid vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\n/**\n * task. h\n * 
void vTaskGetRunTimeStats( char *pcWriteBuffer );
\n *\n * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS\n * must both be defined as 1 for this function to be available.  The application\n * must also then provide definitions for\n * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()\n * to configure a peripheral timer/counter and return the timers current count\n * value respectively.  The counter should be at least 10 times the frequency of\n * the tick count.\n *\n * NOTE 1: This function will disable interrupts for its duration.  It is\n * not intended for normal application runtime use but as a debug aid.\n *\n * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total\n * accumulated execution time being stored for each task.  The resolution\n * of the accumulated time value depends on the frequency of the timer\n * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.\n * Calling vTaskGetRunTimeStats() writes the total execution time of each\n * task into a buffer, both as an absolute count value and as a percentage\n * of the total system execution time.\n *\n * NOTE 2:\n *\n * This function is provided for convenience only, and is used by many of the\n * demo applications.  Do not consider it to be part of the scheduler.\n *\n * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the\n * uxTaskGetSystemState() output into a human readable table that displays the\n * amount of time each task has spent in the Running state in both absolute and\n * percentage terms.\n *\n * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function\n * that might bloat the code size, use a lot of stack, and provide different\n * results on different platforms.  An alternative, tiny, third party, and\n * limited functionality implementation of sprintf() is provided in many of the\n * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note\n * printf-stdarg.c does not provide a full snprintf() implementation!).\n *\n * It is recommended that production systems call uxTaskGetSystemState() directly\n * to get access to raw stats data, rather than indirectly through a call to\n * vTaskGetRunTimeStats().\n *\n * @param pcWriteBuffer A buffer into which the execution times will be\n * written, in ASCII form.  This buffer is assumed to be large enough to\n * contain the generated report.  Approximately 40 bytes per task should\n * be sufficient.\n *\n * \\defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats\n * \\ingroup TaskUtils\n */\nvoid vTaskGetRunTimeStats( char *pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\n/**\n * task. h\n * 
BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );
\n *\n * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this\n * function to be available.\n *\n * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private\n * \"notification value\", which is a 32-bit unsigned integer (uint32_t).\n *\n * Events can be sent to a task using an intermediary object.  Examples of such\n * objects are queues, semaphores, mutexes and event groups.  Task notifications\n * are a method of sending an event directly to a task without the need for such\n * an intermediary object.\n *\n * A notification sent to a task can optionally perform an action, such as\n * update, overwrite or increment the task's notification value.  In that way\n * task notifications can be used to send data to a task, or be used as light\n * weight and fast binary or counting semaphores.\n *\n * A notification sent to a task will remain pending until it is cleared by the\n * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was\n * already in the Blocked state to wait for a notification when the notification\n * arrives then the task will automatically be removed from the Blocked state\n * (unblocked) and the notification cleared.\n *\n * A task can use xTaskNotifyWait() to [optionally] block to wait for a\n * notification to be pending, or ulTaskNotifyTake() to [optionally] block\n * to wait for its notification value to have a non-zero value.  The task does\n * not consume any CPU time while it is in the Blocked state.\n *\n * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.\n *\n * @param xTaskToNotify The handle of the task being notified.  The handle to a\n * task can be returned from the xTaskCreate() API function used to create the\n * task, and the handle of the currently running task can be obtained by calling\n * xTaskGetCurrentTaskHandle().\n *\n * @param ulValue Data that can be sent with the notification.  How the data is\n * used depends on the value of the eAction parameter.\n *\n * @param eAction Specifies how the notification updates the task's notification\n * value, if at all.  Valid values for eAction are as follows:\n *\n * eSetBits -\n * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()\n * always returns pdPASS in this case.\n *\n * eIncrement -\n * The task's notification value is incremented.  ulValue is not used and\n * xTaskNotify() always returns pdPASS in this case.\n *\n * eSetValueWithOverwrite -\n * The task's notification value is set to the value of ulValue, even if the\n * task being notified had not yet processed the previous notification (the\n * task already had a notification pending).  xTaskNotify() always returns\n * pdPASS in this case.\n *\n * eSetValueWithoutOverwrite -\n * If the task being notified did not already have a notification pending then\n * the task's notification value is set to ulValue and xTaskNotify() will\n * return pdPASS.  If the task being notified already had a notification\n * pending then no action is performed and pdFAIL is returned.\n *\n * eNoAction -\n * The task receives a notification without its notification value being\n * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in\n * this case.\n *\n *  pulPreviousNotificationValue -\n *  Can be used to pass out the subject task's notification value before any\n *  bits are modified by the notify function.\n *\n * @return Dependent on the value of eAction.  See the description of the\n * eAction parameter.\n *\n * \\defgroup xTaskNotify xTaskNotify\n * \\ingroup TaskNotifications\n */\nBaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) PRIVILEGED_FUNCTION;\n#define xTaskNotify( xTaskToNotify, ulValue, eAction ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL )\n#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )\n\n/**\n * task. h\n * 
BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );
\n *\n * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this\n * function to be available.\n *\n * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private\n * \"notification value\", which is a 32-bit unsigned integer (uint32_t).\n *\n * A version of xTaskNotify() that can be used from an interrupt service routine\n * (ISR).\n *\n * Events can be sent to a task using an intermediary object.  Examples of such\n * objects are queues, semaphores, mutexes and event groups.  Task notifications\n * are a method of sending an event directly to a task without the need for such\n * an intermediary object.\n *\n * A notification sent to a task can optionally perform an action, such as\n * update, overwrite or increment the task's notification value.  In that way\n * task notifications can be used to send data to a task, or be used as light\n * weight and fast binary or counting semaphores.\n *\n * A notification sent to a task will remain pending until it is cleared by the\n * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was\n * already in the Blocked state to wait for a notification when the notification\n * arrives then the task will automatically be removed from the Blocked state\n * (unblocked) and the notification cleared.\n *\n * A task can use xTaskNotifyWait() to [optionally] block to wait for a\n * notification to be pending, or ulTaskNotifyTake() to [optionally] block\n * to wait for its notification value to have a non-zero value.  The task does\n * not consume any CPU time while it is in the Blocked state.\n *\n * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.\n *\n * @param xTaskToNotify The handle of the task being notified.  The handle to a\n * task can be returned from the xTaskCreate() API function used to create the\n * task, and the handle of the currently running task can be obtained by calling\n * xTaskGetCurrentTaskHandle().\n *\n * @param ulValue Data that can be sent with the notification.  How the data is\n * used depends on the value of the eAction parameter.\n *\n * @param eAction Specifies how the notification updates the task's notification\n * value, if at all.  Valid values for eAction are as follows:\n *\n * eSetBits -\n * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()\n * always returns pdPASS in this case.\n *\n * eIncrement -\n * The task's notification value is incremented.  ulValue is not used and\n * xTaskNotify() always returns pdPASS in this case.\n *\n * eSetValueWithOverwrite -\n * The task's notification value is set to the value of ulValue, even if the\n * task being notified had not yet processed the previous notification (the\n * task already had a notification pending).  xTaskNotify() always returns\n * pdPASS in this case.\n *\n * eSetValueWithoutOverwrite -\n * If the task being notified did not already have a notification pending then\n * the task's notification value is set to ulValue and xTaskNotify() will\n * return pdPASS.  If the task being notified already had a notification\n * pending then no action is performed and pdFAIL is returned.\n *\n * eNoAction -\n * The task receives a notification without its notification value being\n * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in\n * this case.\n *\n * @param pxHigherPriorityTaskWoken  xTaskNotifyFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the\n * task to which the notification was sent to leave the Blocked state, and the\n * unblocked task has a priority higher than the currently running task.  If\n * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should\n * be requested before the interrupt is exited.  How a context switch is\n * requested from an ISR is dependent on the port - see the documentation page\n * for the port in use.\n *\n * @return Dependent on the value of eAction.  See the description of the\n * eAction parameter.\n *\n * \\defgroup xTaskNotify xTaskNotify\n * \\ingroup TaskNotifications\n */\nBaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )\n#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )\n\n/**\n * task. h\n * 
BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );
\n *\n * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this\n * function to be available.\n *\n * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private\n * \"notification value\", which is a 32-bit unsigned integer (uint32_t).\n *\n * Events can be sent to a task using an intermediary object.  Examples of such\n * objects are queues, semaphores, mutexes and event groups.  Task notifications\n * are a method of sending an event directly to a task without the need for such\n * an intermediary object.\n *\n * A notification sent to a task can optionally perform an action, such as\n * update, overwrite or increment the task's notification value.  In that way\n * task notifications can be used to send data to a task, or be used as light\n * weight and fast binary or counting semaphores.\n *\n * A notification sent to a task will remain pending until it is cleared by the\n * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was\n * already in the Blocked state to wait for a notification when the notification\n * arrives then the task will automatically be removed from the Blocked state\n * (unblocked) and the notification cleared.\n *\n * A task can use xTaskNotifyWait() to [optionally] block to wait for a\n * notification to be pending, or ulTaskNotifyTake() to [optionally] block\n * to wait for its notification value to have a non-zero value.  The task does\n * not consume any CPU time while it is in the Blocked state.\n *\n * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.\n *\n * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value\n * will be cleared in the calling task's notification value before the task\n * checks to see if any notifications are pending, and optionally blocks if no\n * notifications are pending.  Setting ulBitsToClearOnEntry to ULONG_MAX (if\n * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have\n * the effect of resetting the task's notification value to 0.  Setting\n * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged.\n *\n * @param ulBitsToClearOnExit If a notification is pending or received before\n * the calling task exits the xTaskNotifyWait() function then the task's\n * notification value (see the xTaskNotify() API function) is passed out using\n * the pulNotificationValue parameter.  Then any bits that are set in\n * ulBitsToClearOnExit will be cleared in the task's notification value (note\n * *pulNotificationValue is set before any bits are cleared).  Setting\n * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL\n * (if limits.h is not included) will have the effect of resetting the task's\n * notification value to 0 before the function exits.  Setting\n * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged\n * when the function exits (in which case the value passed out in\n * pulNotificationValue will match the task's notification value).\n *\n * @param pulNotificationValue Used to pass the task's notification value out\n * of the function.  Note the value passed out will not be effected by the\n * clearing of any bits caused by ulBitsToClearOnExit being non-zero.\n *\n * @param xTicksToWait The maximum amount of time that the task should wait in\n * the Blocked state for a notification to be received, should a notification\n * not already be pending when xTaskNotifyWait() was called.  The task\n * will not consume any processing time while it is in the Blocked state.  This\n * is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be\n * used to convert a time specified in milliseconds to a time specified in\n * ticks.\n *\n * @return If a notification was received (including notifications that were\n * already pending when xTaskNotifyWait was called) then pdPASS is\n * returned.  Otherwise pdFAIL is returned.\n *\n * \\defgroup xTaskNotifyWait xTaskNotifyWait\n * \\ingroup TaskNotifications\n */\nBaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );
\n *\n * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro\n * to be available.\n *\n * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private\n * \"notification value\", which is a 32-bit unsigned integer (uint32_t).\n *\n * Events can be sent to a task using an intermediary object.  Examples of such\n * objects are queues, semaphores, mutexes and event groups.  Task notifications\n * are a method of sending an event directly to a task without the need for such\n * an intermediary object.\n *\n * A notification sent to a task can optionally perform an action, such as\n * update, overwrite or increment the task's notification value.  In that way\n * task notifications can be used to send data to a task, or be used as light\n * weight and fast binary or counting semaphores.\n *\n * xTaskNotifyGive() is a helper macro intended for use when task notifications\n * are used as light weight and faster binary or counting semaphore equivalents.\n * Actual FreeRTOS semaphores are given using the xSemaphoreGive() API function,\n * the equivalent action that instead uses a task notification is\n * xTaskNotifyGive().\n *\n * When task notifications are being used as a binary or counting semaphore\n * equivalent then the task being notified should wait for the notification\n * using the ulTaskNotificationTake() API function rather than the\n * xTaskNotifyWait() API function.\n *\n * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details.\n *\n * @param xTaskToNotify The handle of the task being notified.  The handle to a\n * task can be returned from the xTaskCreate() API function used to create the\n * task, and the handle of the currently running task can be obtained by calling\n * xTaskGetCurrentTaskHandle().\n *\n * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the\n * eAction parameter set to eIncrement - so pdPASS is always returned.\n *\n * \\defgroup xTaskNotifyGive xTaskNotifyGive\n * \\ingroup TaskNotifications\n */\n#define xTaskNotifyGive( xTaskToNotify ) xTaskGenericNotify( ( xTaskToNotify ), ( 0 ), eIncrement, NULL )\n\n/**\n * task. h\n * 
void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );\n *\n * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro\n * to be available.\n *\n * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private\n * \"notification value\", which is a 32-bit unsigned integer (uint32_t).\n *\n * A version of xTaskNotifyGive() that can be called from an interrupt service\n * routine (ISR).\n *\n * Events can be sent to a task using an intermediary object.  Examples of such\n * objects are queues, semaphores, mutexes and event groups.  Task notifications\n * are a method of sending an event directly to a task without the need for such\n * an intermediary object.\n *\n * A notification sent to a task can optionally perform an action, such as\n * update, overwrite or increment the task's notification value.  In that way\n * task notifications can be used to send data to a task, or be used as light\n * weight and fast binary or counting semaphores.\n *\n * vTaskNotifyGiveFromISR() is intended for use when task notifications are\n * used as light weight and faster binary or counting semaphore equivalents.\n * Actual FreeRTOS semaphores are given from an ISR using the\n * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses\n * a task notification is vTaskNotifyGiveFromISR().\n *\n * When task notifications are being used as a binary or counting semaphore\n * equivalent then the task being notified should wait for the notification\n * using the ulTaskNotificationTake() API function rather than the\n * xTaskNotifyWait() API function.\n *\n * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details.\n *\n * @param xTaskToNotify The handle of the task being notified.  The handle to a\n * task can be returned from the xTaskCreate() API function used to create the\n * task, and the handle of the currently running task can be obtained by calling\n * xTaskGetCurrentTaskHandle().\n *\n * @param pxHigherPriorityTaskWoken  vTaskNotifyGiveFromISR() will set\n * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the\n * task to which the notification was sent to leave the Blocked state, and the\n * unblocked task has a priority higher than the currently running task.  If\n * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch\n * should be requested before the interrupt is exited.  How a context switch is\n * requested from an ISR is dependent on the port - see the documentation page\n * for the port in use.\n *\n * \\defgroup xTaskNotifyWait xTaskNotifyWait\n * \\ingroup TaskNotifications\n */\nvoid vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );
\n *\n * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this\n * function to be available.\n *\n * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private\n * \"notification value\", which is a 32-bit unsigned integer (uint32_t).\n *\n * Events can be sent to a task using an intermediary object.  Examples of such\n * objects are queues, semaphores, mutexes and event groups.  Task notifications\n * are a method of sending an event directly to a task without the need for such\n * an intermediary object.\n *\n * A notification sent to a task can optionally perform an action, such as\n * update, overwrite or increment the task's notification value.  In that way\n * task notifications can be used to send data to a task, or be used as light\n * weight and fast binary or counting semaphores.\n *\n * ulTaskNotifyTake() is intended for use when a task notification is used as a\n * faster and lighter weight binary or counting semaphore alternative.  Actual\n * FreeRTOS semaphores are taken using the xSemaphoreTake() API function, the\n * equivalent action that instead uses a task notification is\n * ulTaskNotifyTake().\n *\n * When a task is using its notification value as a binary or counting semaphore\n * other tasks should send notifications to it using the xTaskNotifyGive()\n * macro, or xTaskNotify() function with the eAction parameter set to\n * eIncrement.\n *\n * ulTaskNotifyTake() can either clear the task's notification value to\n * zero on exit, in which case the notification value acts like a binary\n * semaphore, or decrement the task's notification value on exit, in which case\n * the notification value acts like a counting semaphore.\n *\n * A task can use ulTaskNotifyTake() to [optionally] block to wait for a\n * the task's notification value to be non-zero.  The task does not consume any\n * CPU time while it is in the Blocked state.\n *\n * Where as xTaskNotifyWait() will return when a notification is pending,\n * ulTaskNotifyTake() will return when the task's notification value is\n * not zero.\n *\n * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.\n *\n * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's\n * notification value is decremented when the function exits.  In this way the\n * notification value acts like a counting semaphore.  If xClearCountOnExit is\n * not pdFALSE then the task's notification value is cleared to zero when the\n * function exits.  In this way the notification value acts like a binary\n * semaphore.\n *\n * @param xTicksToWait The maximum amount of time that the task should wait in\n * the Blocked state for the task's notification value to be greater than zero,\n * should the count not already be greater than zero when\n * ulTaskNotifyTake() was called.  The task will not consume any processing\n * time while it is in the Blocked state.  This is specified in kernel ticks,\n * the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time\n * specified in milliseconds to a time specified in ticks.\n *\n * @return The task's notification count before it is either cleared to zero or\n * decremented (see the xClearCountOnExit parameter).\n *\n * \\defgroup ulTaskNotifyTake ulTaskNotifyTake\n * \\ingroup TaskNotifications\n */\nuint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/**\n * task. h\n * 
BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
\n *\n * If the notification state of the task referenced by the handle xTask is\n * eNotified, then set the task's notification state to eNotWaitingNotification.\n * The task's notification value is not altered.  Set xTask to NULL to clear the\n * notification state of the calling task.\n *\n * @return pdTRUE if the task's notification state was set to\n * eNotWaitingNotification, otherwise pdFALSE.\n * \\defgroup xTaskNotifyStateClear xTaskNotifyStateClear\n * \\ingroup TaskNotifications\n */\nBaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );\n\n/*-----------------------------------------------------------\n * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES\n *----------------------------------------------------------*/\n\n/*\n * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY\n * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS\n * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.\n *\n * Called from the real time kernel tick (either preemptive or cooperative),\n * this increments the tick count and checks if any tasks that are blocked\n * for a finite period required removing from a blocked list and placing on\n * a ready list.  If a non-zero value is returned then a context switch is\n * required because either:\n *   + A task was removed from a blocked list because its timeout had expired,\n *     or\n *   + Time slicing is in use and there is a task of equal priority to the\n *     currently running task.\n */\nBaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;\n\n/*\n * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN\n * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.\n *\n * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.\n *\n * Removes the calling task from the ready list and places it both\n * on the list of tasks waiting for a particular event, and the\n * list of delayed tasks.  The task will be removed from both lists\n * and replaced on the ready list should either the event occur (and\n * there be no higher priority tasks waiting on the same event) or\n * the delay period expires.\n *\n * The 'unordered' version replaces the event list item value with the\n * xItemValue value, and inserts the list item at the end of the list.\n *\n * The 'ordered' version uses the existing event list item value (which is the\n * owning tasks priority) to insert the list item into the event list is task\n * priority order.\n *\n * @param pxEventList The list containing tasks that are blocked waiting\n * for the event to occur.\n *\n * @param xItemValue The item value to use for the event list item when the\n * event list is not ordered by task priority.\n *\n * @param xTicksToWait The maximum amount of time that the task should wait\n * for the event to occur.  This is specified in kernel ticks,the constant\n * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time\n * period.\n */\nvoid vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\nvoid vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/*\n * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN\n * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.\n *\n * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.\n *\n * This function performs nearly the same function as vTaskPlaceOnEventList().\n * The difference being that this function does not permit tasks to block\n * indefinitely, whereas vTaskPlaceOnEventList() does.\n *\n */\nvoid vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;\n\n/*\n * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN\n * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.\n *\n * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.\n *\n * Removes a task from both the specified event list and the list of blocked\n * tasks, and places it on a ready queue.\n *\n * xTaskRemoveFromEventList()/vTaskRemoveFromUnorderedEventList() will be called\n * if either an event occurs to unblock a task, or the block timeout period\n * expires.\n *\n * xTaskRemoveFromEventList() is used when the event list is in task priority\n * order.  It removes the list item from the head of the event list as that will\n * have the highest priority owning task of all the tasks on the event list.\n * vTaskRemoveFromUnorderedEventList() is used when the event list is not\n * ordered and the event list items hold something other than the owning tasks\n * priority.  In this case the event list item value is updated to the value\n * passed in the xItemValue parameter.\n *\n * @return pdTRUE if the task being removed has a higher priority than the task\n * making the call, otherwise pdFALSE.\n */\nBaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;\nvoid vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue ) PRIVILEGED_FUNCTION;\n\n/*\n * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY\n * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS\n * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.\n *\n * Sets the pointer to the current TCB to the TCB of the highest priority task\n * that is ready to run.\n */\nvoid vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;\n\n/*\n * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE.  THEY ARE USED BY\n * THE EVENT BITS MODULE.\n */\nTickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;\n\n/*\n * Return the handle of the calling task.\n */\nTaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;\n\n/*\n * Capture the current time status for future reference.\n */\nvoid vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;\n\n/*\n * Compare the time status now with that previously captured to see if the\n * timeout has expired.\n */\nBaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;\n\n/*\n * Shortcut used by the queue implementation to prevent unnecessary call to\n * taskYIELD();\n */\nvoid vTaskMissedYield( void ) PRIVILEGED_FUNCTION;\n\n/*\n * Returns the scheduler state as taskSCHEDULER_RUNNING,\n * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.\n */\nBaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;\n\n/*\n * Raises the priority of the mutex holder to that of the calling task should\n * the mutex holder have a priority less than the calling task.\n */\nBaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;\n\n/*\n * Set the priority of a task back to its proper priority in the case that it\n * inherited a higher priority while it was holding a semaphore.\n */\nBaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;\n\n/*\n * If a higher priority task attempting to obtain a mutex caused a lower\n * priority task to inherit the higher priority task's priority - but the higher\n * priority task then timed out without obtaining the mutex, then the lower\n * priority task will disinherit the priority again - but only down as far as\n * the highest priority task that is still waiting for the mutex (if there were\n * more than one task waiting for the mutex).\n */\nvoid vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask ) PRIVILEGED_FUNCTION;\n\n/*\n * Get the uxTCBNumber assigned to the task referenced by the xTask parameter.\n */\nUBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\n\nUBaseType_t uxTaskGetTCBNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;\n/*\n * Set the uxTaskNumber of the task referenced by the xTask parameter to\n * uxHandle.\n */\nvoid vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;\n\n/*\n * Only available when configUSE_TICKLESS_IDLE is set to 1.\n * If tickless mode is being used, or a low power mode is implemented, then\n * the tick interrupt will not execute during idle periods.  When this is the\n * case, the tick count value maintained by the scheduler needs to be kept up\n * to date with the actual execution time by being skipped forward by a time\n * equal to the idle period.\n */\nvoid vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;\n\n/*\n * Only avilable when configUSE_TICKLESS_IDLE is set to 1.\n * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port\n * specific sleep function to determine if it is ok to proceed with the sleep,\n * and if it is ok to proceed, if it is ok to sleep indefinitely.\n *\n * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only\n * called with the scheduler suspended, not from within a critical section.  It\n * is therefore possible for an interrupt to request a context switch between\n * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being\n * entered.  eTaskConfirmSleepModeStatus() should be called from a short\n * critical section between the timer being stopped and the sleep mode being\n * entered to ensure it is ok to proceed into the sleep mode.\n */\neSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;\n\n/*\n * For internal use only.  Increment the mutex held count when a mutex is\n * taken and return the handle of the task that has taken the mutex.\n */\nTaskHandle_t pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;\n\n/*\n * For internal use only.  Same as vTaskSetTimeOutState(), but without a critial\n * section.\n */\nvoid vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;\n\n\n#ifdef __cplusplus\n}\n#endif\n#endif /* INC_TASK_H */\n\n\n\n"
  },
  {
    "path": "include/rtos/freertos/timers.h",
    "content": "/*\n * FreeRTOS Kernel V10.1.1\n * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy of\n * this software and associated documentation files (the \"Software\"), to deal in\n * the Software without restriction, including without limitation the rights to\n * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\n * the Software, and to permit persons to whom the Software is furnished to do so,\n * subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\n * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\n * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\n * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\n *\n * http://www.FreeRTOS.org\n * http://aws.amazon.com/freertos\n *\n * 1 tab == 4 spaces!\n */\n\n\n#ifndef TIMERS_H\n#define TIMERS_H\n\n#ifndef INC_FREERTOS_H\n\t#error \"include FreeRTOS.h must appear in source files before include timers.h\"\n#endif\n\n/*lint -save -e537 This headers are only multiply included if the application code\nhappens to also be including task.h. */\n#include \"task.h\"\n/*lint -restore */\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*-----------------------------------------------------------\n * MACROS AND DEFINITIONS\n *----------------------------------------------------------*/\n\n/* IDs for commands that can be sent/received on the timer queue.  These are to\nbe used solely through the macros that make up the public software timer API,\nas defined below.  The commands that are sent from interrupts must use the\nhighest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task\nor interrupt version of the queue send function should be used. */\n#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR \t( ( BaseType_t ) -2 )\n#define tmrCOMMAND_EXECUTE_CALLBACK\t\t\t\t( ( BaseType_t ) -1 )\n#define tmrCOMMAND_START_DONT_TRACE\t\t\t\t( ( BaseType_t ) 0 )\n#define tmrCOMMAND_START\t\t\t\t\t    ( ( BaseType_t ) 1 )\n#define tmrCOMMAND_RESET\t\t\t\t\t\t( ( BaseType_t ) 2 )\n#define tmrCOMMAND_STOP\t\t\t\t\t\t\t( ( BaseType_t ) 3 )\n#define tmrCOMMAND_CHANGE_PERIOD\t\t\t\t( ( BaseType_t ) 4 )\n#define tmrCOMMAND_DELETE\t\t\t\t\t\t( ( BaseType_t ) 5 )\n\n#define tmrFIRST_FROM_ISR_COMMAND\t\t\t\t( ( BaseType_t ) 6 )\n#define tmrCOMMAND_START_FROM_ISR\t\t\t\t( ( BaseType_t ) 6 )\n#define tmrCOMMAND_RESET_FROM_ISR\t\t\t\t( ( BaseType_t ) 7 )\n#define tmrCOMMAND_STOP_FROM_ISR\t\t\t\t( ( BaseType_t ) 8 )\n#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR\t\t( ( BaseType_t ) 9 )\n\n\n/**\n * Type by which software timers are referenced.  For example, a call to\n * xTimerCreate() returns an TimerHandle_t variable that can then be used to\n * reference the subject timer in calls to other software timer API functions\n * (for example, xTimerStart(), xTimerReset(), etc.).\n */\nstruct tmrTimerControl; /* The old naming convention is used to prevent breaking kernel aware debuggers. */\ntypedef struct tmrTimerControl * TimerHandle_t;\n\n/*\n * Defines the prototype to which timer callback functions must conform.\n */\ntypedef void (*TimerCallbackFunction_t)( TimerHandle_t xTimer );\n\n/*\n * Defines the prototype to which functions used with the\n * xTimerPendFunctionCallFromISR() function must conform.\n */\ntypedef void (*PendedFunction_t)( void *, uint32_t );\n\n/**\n * TimerHandle_t xTimerCreate( \tconst char * const pcTimerName,\n * \t\t\t\t\t\t\t\tTickType_t xTimerPeriodInTicks,\n * \t\t\t\t\t\t\t\tUBaseType_t uxAutoReload,\n * \t\t\t\t\t\t\t\tvoid * pvTimerID,\n * \t\t\t\t\t\t\t\tTimerCallbackFunction_t pxCallbackFunction );\n *\n * Creates a new software timer instance, and returns a handle by which the\n * created software timer can be referenced.\n *\n * Internally, within the FreeRTOS implementation, software timers use a block\n * of memory, in which the timer data structure is stored.  If a software timer\n * is created using xTimerCreate() then the required memory is automatically\n * dynamically allocated inside the xTimerCreate() function.  (see\n * http://www.freertos.org/a00111.html).  If a software timer is created using\n * xTimerCreateStatic() then the application writer must provide the memory that\n * will get used by the software timer.  xTimerCreateStatic() therefore allows a\n * software timer to be created without using any dynamic memory allocation.\n *\n * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),\n * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and\n * xTimerChangePeriodFromISR() API functions can all be used to transition a\n * timer into the active state.\n *\n * @param pcTimerName A text name that is assigned to the timer.  This is done\n * purely to assist debugging.  The kernel itself only ever references a timer\n * by its handle, and never by its name.\n *\n * @param xTimerPeriodInTicks The timer period.  The time is defined in tick\n * periods so the constant portTICK_PERIOD_MS can be used to convert a time that\n * has been specified in milliseconds.  For example, if the timer must expire\n * after 100 ticks, then xTimerPeriodInTicks should be set to 100.\n * Alternatively, if the timer must expire after 500ms, then xPeriod can be set\n * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or\n * equal to 1000.\n *\n * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will\n * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.\n * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and\n * enter the dormant state after it expires.\n *\n * @param pvTimerID An identifier that is assigned to the timer being created.\n * Typically this would be used in the timer callback function to identify which\n * timer expired when the same callback function is assigned to more than one\n * timer.\n *\n * @param pxCallbackFunction The function to call when the timer expires.\n * Callback functions must have the prototype defined by TimerCallbackFunction_t,\n * which is\t\"void vCallbackFunction( TimerHandle_t xTimer );\".\n *\n * @return If the timer is successfully created then a handle to the newly\n * created timer is returned.  If the timer cannot be created (because either\n * there is insufficient FreeRTOS heap remaining to allocate the timer\n * structures, or the timer period was set to 0) then NULL is returned.\n *\n * Example usage:\n * @verbatim\n * #define NUM_TIMERS 5\n *\n * // An array to hold handles to the created timers.\n * TimerHandle_t xTimers[ NUM_TIMERS ];\n *\n * // An array to hold a count of the number of times each timer expires.\n * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };\n *\n * // Define a callback function that will be used by multiple timer instances.\n * // The callback function does nothing but count the number of times the\n * // associated timer expires, and stop the timer once the timer has expired\n * // 10 times.\n * void vTimerCallback( TimerHandle_t pxTimer )\n * {\n * int32_t lArrayIndex;\n * const int32_t xMaxExpiryCountBeforeStopping = 10;\n *\n * \t   // Optionally do something if the pxTimer parameter is NULL.\n * \t   configASSERT( pxTimer );\n *\n *     // Which timer expired?\n *     lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );\n *\n *     // Increment the number of times that pxTimer has expired.\n *     lExpireCounters[ lArrayIndex ] += 1;\n *\n *     // If the timer has expired 10 times then stop it from running.\n *     if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )\n *     {\n *         // Do not use a block time if calling a timer API function from a\n *         // timer callback function, as doing so could cause a deadlock!\n *         xTimerStop( pxTimer, 0 );\n *     }\n * }\n *\n * void main( void )\n * {\n * int32_t x;\n *\n *     // Create then start some timers.  Starting the timers before the scheduler\n *     // has been started means the timers will start running immediately that\n *     // the scheduler starts.\n *     for( x = 0; x < NUM_TIMERS; x++ )\n *     {\n *         xTimers[ x ] = xTimerCreate(    \"Timer\",       // Just a text name, not used by the kernel.\n *                                         ( 100 * x ),   // The timer period in ticks.\n *                                         pdTRUE,        // The timers will auto-reload themselves when they expire.\n *                                         ( void * ) x,  // Assign each timer a unique id equal to its array index.\n *                                         vTimerCallback // Each timer calls the same callback when it expires.\n *                                     );\n *\n *         if( xTimers[ x ] == NULL )\n *         {\n *             // The timer was not created.\n *         }\n *         else\n *         {\n *             // Start the timer.  No block time is specified, and even if one was\n *             // it would be ignored because the scheduler has not yet been\n *             // started.\n *             if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )\n *             {\n *                 // The timer could not be set into the Active state.\n *             }\n *         }\n *     }\n *\n *     // ...\n *     // Create tasks here.\n *     // ...\n *\n *     // Starting the scheduler will start the timers running as they have already\n *     // been set into the active state.\n *     vTaskStartScheduler();\n *\n *     // Should not reach here.\n *     for( ;; );\n * }\n * @endverbatim\n */\n#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )\n\tTimerHandle_t xTimerCreate(\tconst char * const pcTimerName,\t\t\t/*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\t\t\t\t\t\t\t\tconst TickType_t xTimerPeriodInTicks,\n\t\t\t\t\t\t\t\tconst UBaseType_t uxAutoReload,\n\t\t\t\t\t\t\t\tvoid * const pvTimerID,\n\t\t\t\t\t\t\t\tTimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;\n#endif\n\n/**\n * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,\n * \t\t\t\t\t\t\t\t\tTickType_t xTimerPeriodInTicks,\n * \t\t\t\t\t\t\t\t\tUBaseType_t uxAutoReload,\n * \t\t\t\t\t\t\t\t\tvoid * pvTimerID,\n * \t\t\t\t\t\t\t\t\tTimerCallbackFunction_t pxCallbackFunction,\n *\t\t\t\t\t\t\t\t\tStaticTimer_t *pxTimerBuffer );\n *\n * Creates a new software timer instance, and returns a handle by which the\n * created software timer can be referenced.\n *\n * Internally, within the FreeRTOS implementation, software timers use a block\n * of memory, in which the timer data structure is stored.  If a software timer\n * is created using xTimerCreate() then the required memory is automatically\n * dynamically allocated inside the xTimerCreate() function.  (see\n * http://www.freertos.org/a00111.html).  If a software timer is created using\n * xTimerCreateStatic() then the application writer must provide the memory that\n * will get used by the software timer.  xTimerCreateStatic() therefore allows a\n * software timer to be created without using any dynamic memory allocation.\n *\n * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),\n * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and\n * xTimerChangePeriodFromISR() API functions can all be used to transition a\n * timer into the active state.\n *\n * @param pcTimerName A text name that is assigned to the timer.  This is done\n * purely to assist debugging.  The kernel itself only ever references a timer\n * by its handle, and never by its name.\n *\n * @param xTimerPeriodInTicks The timer period.  The time is defined in tick\n * periods so the constant portTICK_PERIOD_MS can be used to convert a time that\n * has been specified in milliseconds.  For example, if the timer must expire\n * after 100 ticks, then xTimerPeriodInTicks should be set to 100.\n * Alternatively, if the timer must expire after 500ms, then xPeriod can be set\n * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or\n * equal to 1000.\n *\n * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will\n * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.\n * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and\n * enter the dormant state after it expires.\n *\n * @param pvTimerID An identifier that is assigned to the timer being created.\n * Typically this would be used in the timer callback function to identify which\n * timer expired when the same callback function is assigned to more than one\n * timer.\n *\n * @param pxCallbackFunction The function to call when the timer expires.\n * Callback functions must have the prototype defined by TimerCallbackFunction_t,\n * which is \"void vCallbackFunction( TimerHandle_t xTimer );\".\n *\n * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which\n * will be then be used to hold the software timer's data structures, removing\n * the need for the memory to be allocated dynamically.\n *\n * @return If the timer is created then a handle to the created timer is\n * returned.  If pxTimerBuffer was NULL then NULL is returned.\n *\n * Example usage:\n * @verbatim\n *\n * // The buffer used to hold the software timer's data structure.\n * static StaticTimer_t xTimerBuffer;\n *\n * // A variable that will be incremented by the software timer's callback\n * // function.\n * UBaseType_t uxVariableToIncrement = 0;\n *\n * // A software timer callback function that increments a variable passed to\n * // it when the software timer was created.  After the 5th increment the\n * // callback function stops the software timer.\n * static void prvTimerCallback( TimerHandle_t xExpiredTimer )\n * {\n * UBaseType_t *puxVariableToIncrement;\n * BaseType_t xReturned;\n *\n *     // Obtain the address of the variable to increment from the timer ID.\n *     puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer );\n *\n *     // Increment the variable to show the timer callback has executed.\n *     ( *puxVariableToIncrement )++;\n *\n *     // If this callback has executed the required number of times, stop the\n *     // timer.\n *     if( *puxVariableToIncrement == 5 )\n *     {\n *         // This is called from a timer callback so must not block.\n *         xTimerStop( xExpiredTimer, staticDONT_BLOCK );\n *     }\n * }\n *\n *\n * void main( void )\n * {\n *     // Create the software time.  xTimerCreateStatic() has an extra parameter\n *     // than the normal xTimerCreate() API function.  The parameter is a pointer\n *     // to the StaticTimer_t structure that will hold the software timer\n *     // structure.  If the parameter is passed as NULL then the structure will be\n *     // allocated dynamically, just as if xTimerCreate() had been called.\n *     xTimer = xTimerCreateStatic( \"T1\",             // Text name for the task.  Helps debugging only.  Not used by FreeRTOS.\n *                                  xTimerPeriod,     // The period of the timer in ticks.\n *                                  pdTRUE,           // This is an auto-reload timer.\n *                                  ( void * ) &uxVariableToIncrement,    // A variable incremented by the software timer's callback function\n *                                  prvTimerCallback, // The function to execute when the timer expires.\n *                                  &xTimerBuffer );  // The buffer that will hold the software timer structure.\n *\n *     // The scheduler has not started yet so a block time is not used.\n *     xReturned = xTimerStart( xTimer, 0 );\n *\n *     // ...\n *     // Create tasks here.\n *     // ...\n *\n *     // Starting the scheduler will start the timers running as they have already\n *     // been set into the active state.\n *     vTaskStartScheduler();\n *\n *     // Should not reach here.\n *     for( ;; );\n * }\n * @endverbatim\n */\n#if( configSUPPORT_STATIC_ALLOCATION == 1 )\n\tTimerHandle_t xTimerCreateStatic(\tconst char * const pcTimerName,\t\t\t/*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\t\t\t\t\t\t\t\t\t\tconst TickType_t xTimerPeriodInTicks,\n\t\t\t\t\t\t\t\t\t\tconst UBaseType_t uxAutoReload,\n\t\t\t\t\t\t\t\t\t\tvoid * const pvTimerID,\n\t\t\t\t\t\t\t\t\t\tTimerCallbackFunction_t pxCallbackFunction,\n\t\t\t\t\t\t\t\t\t\tStaticTimer_t *pxTimerBuffer ) PRIVILEGED_FUNCTION;\n#endif /* configSUPPORT_STATIC_ALLOCATION */\n\n/**\n * void *pvTimerGetTimerID( TimerHandle_t xTimer );\n *\n * Returns the ID assigned to the timer.\n *\n * IDs are assigned to timers using the pvTimerID parameter of the call to\n * xTimerCreated() that was used to create the timer, and by calling the\n * vTimerSetTimerID() API function.\n *\n * If the same callback function is assigned to multiple timers then the timer\n * ID can be used as time specific (timer local) storage.\n *\n * @param xTimer The timer being queried.\n *\n * @return The ID assigned to the timer being queried.\n *\n * Example usage:\n *\n * See the xTimerCreate() API function example usage scenario.\n */\nvoid *pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;\n\n/**\n * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );\n *\n * Sets the ID assigned to the timer.\n *\n * IDs are assigned to timers using the pvTimerID parameter of the call to\n * xTimerCreated() that was used to create the timer.\n *\n * If the same callback function is assigned to multiple timers then the timer\n * ID can be used as time specific (timer local) storage.\n *\n * @param xTimer The timer being updated.\n *\n * @param pvNewID The ID to assign to the timer.\n *\n * Example usage:\n *\n * See the xTimerCreate() API function example usage scenario.\n */\nvoid vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) PRIVILEGED_FUNCTION;\n\n/**\n * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );\n *\n * Queries a timer to see if it is active or dormant.\n *\n * A timer will be dormant if:\n *     1) It has been created but not started, or\n *     2) It is an expired one-shot timer that has not been restarted.\n *\n * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),\n * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and\n * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the\n * active state.\n *\n * @param xTimer The timer being queried.\n *\n * @return pdFALSE will be returned if the timer is dormant.  A value other than\n * pdFALSE will be returned if the timer is active.\n *\n * Example usage:\n * @verbatim\n * // This function assumes xTimer has already been created.\n * void vAFunction( TimerHandle_t xTimer )\n * {\n *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently \"if( xTimerIsTimerActive( xTimer ) )\"\n *     {\n *         // xTimer is active, do something.\n *     }\n *     else\n *     {\n *         // xTimer is not active, do something else.\n *     }\n * }\n * @endverbatim\n */\nBaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;\n\n/**\n * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );\n *\n * Simply returns the handle of the timer service/daemon task.  It it not valid\n * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.\n */\nTaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;\n\n/**\n * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );\n *\n * Timer functionality is provided by a timer service/daemon task.  Many of the\n * public FreeRTOS timer API functions send commands to the timer service task\n * through a queue called the timer command queue.  The timer command queue is\n * private to the kernel itself and is not directly accessible to application\n * code.  The length of the timer command queue is set by the\n * configTIMER_QUEUE_LENGTH configuration constant.\n *\n * xTimerStart() starts a timer that was previously created using the\n * xTimerCreate() API function.  If the timer had already been started and was\n * already in the active state, then xTimerStart() has equivalent functionality\n * to the xTimerReset() API function.\n *\n * Starting a timer ensures the timer is in the active state.  If the timer\n * is not stopped, deleted, or reset in the mean time, the callback function\n * associated with the timer will get called 'n' ticks after xTimerStart() was\n * called, where 'n' is the timers defined period.\n *\n * It is valid to call xTimerStart() before the scheduler has been started, but\n * when this is done the timer will not actually start until the scheduler is\n * started, and the timers expiry time will be relative to when the scheduler is\n * started, not relative to when xTimerStart() was called.\n *\n * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()\n * to be available.\n *\n * @param xTimer The handle of the timer being started/restarted.\n *\n * @param xTicksToWait Specifies the time, in ticks, that the calling task should\n * be held in the Blocked state to wait for the start command to be successfully\n * sent to the timer command queue, should the queue already be full when\n * xTimerStart() was called.  xTicksToWait is ignored if xTimerStart() is called\n * before the scheduler is started.\n *\n * @return pdFAIL will be returned if the start command could not be sent to\n * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will\n * be returned if the command was successfully sent to the timer command queue.\n * When the command is actually processed will depend on the priority of the\n * timer service/daemon task relative to other tasks in the system, although the\n * timers expiry time is relative to when xTimerStart() is actually called.  The\n * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY\n * configuration constant.\n *\n * Example usage:\n *\n * See the xTimerCreate() API function example usage scenario.\n *\n */\n#define xTimerStart( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )\n\n/**\n * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );\n *\n * Timer functionality is provided by a timer service/daemon task.  Many of the\n * public FreeRTOS timer API functions send commands to the timer service task\n * through a queue called the timer command queue.  The timer command queue is\n * private to the kernel itself and is not directly accessible to application\n * code.  The length of the timer command queue is set by the\n * configTIMER_QUEUE_LENGTH configuration constant.\n *\n * xTimerStop() stops a timer that was previously started using either of the\n * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),\n * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.\n *\n * Stopping a timer ensures the timer is not in the active state.\n *\n * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()\n * to be available.\n *\n * @param xTimer The handle of the timer being stopped.\n *\n * @param xTicksToWait Specifies the time, in ticks, that the calling task should\n * be held in the Blocked state to wait for the stop command to be successfully\n * sent to the timer command queue, should the queue already be full when\n * xTimerStop() was called.  xTicksToWait is ignored if xTimerStop() is called\n * before the scheduler is started.\n *\n * @return pdFAIL will be returned if the stop command could not be sent to\n * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will\n * be returned if the command was successfully sent to the timer command queue.\n * When the command is actually processed will depend on the priority of the\n * timer service/daemon task relative to other tasks in the system.  The timer\n * service/daemon task priority is set by the configTIMER_TASK_PRIORITY\n * configuration constant.\n *\n * Example usage:\n *\n * See the xTimerCreate() API function example usage scenario.\n *\n */\n#define xTimerStop( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )\n\n/**\n * BaseType_t xTimerChangePeriod( \tTimerHandle_t xTimer,\n *\t\t\t\t\t\t\t\t\t\tTickType_t xNewPeriod,\n *\t\t\t\t\t\t\t\t\t\tTickType_t xTicksToWait );\n *\n * Timer functionality is provided by a timer service/daemon task.  Many of the\n * public FreeRTOS timer API functions send commands to the timer service task\n * through a queue called the timer command queue.  The timer command queue is\n * private to the kernel itself and is not directly accessible to application\n * code.  The length of the timer command queue is set by the\n * configTIMER_QUEUE_LENGTH configuration constant.\n *\n * xTimerChangePeriod() changes the period of a timer that was previously\n * created using the xTimerCreate() API function.\n *\n * xTimerChangePeriod() can be called to change the period of an active or\n * dormant state timer.\n *\n * The configUSE_TIMERS configuration constant must be set to 1 for\n * xTimerChangePeriod() to be available.\n *\n * @param xTimer The handle of the timer that is having its period changed.\n *\n * @param xNewPeriod The new period for xTimer. Timer periods are specified in\n * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time\n * that has been specified in milliseconds.  For example, if the timer must\n * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,\n * if the timer must expire after 500ms, then xNewPeriod can be set to\n * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than\n * or equal to 1000.\n *\n * @param xTicksToWait Specifies the time, in ticks, that the calling task should\n * be held in the Blocked state to wait for the change period command to be\n * successfully sent to the timer command queue, should the queue already be\n * full when xTimerChangePeriod() was called.  xTicksToWait is ignored if\n * xTimerChangePeriod() is called before the scheduler is started.\n *\n * @return pdFAIL will be returned if the change period command could not be\n * sent to the timer command queue even after xTicksToWait ticks had passed.\n * pdPASS will be returned if the command was successfully sent to the timer\n * command queue.  When the command is actually processed will depend on the\n * priority of the timer service/daemon task relative to other tasks in the\n * system.  The timer service/daemon task priority is set by the\n * configTIMER_TASK_PRIORITY configuration constant.\n *\n * Example usage:\n * @verbatim\n * // This function assumes xTimer has already been created.  If the timer\n * // referenced by xTimer is already active when it is called, then the timer\n * // is deleted.  If the timer referenced by xTimer is not active when it is\n * // called, then the period of the timer is set to 500ms and the timer is\n * // started.\n * void vAFunction( TimerHandle_t xTimer )\n * {\n *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently \"if( xTimerIsTimerActive( xTimer ) )\"\n *     {\n *         // xTimer is already active - delete it.\n *         xTimerDelete( xTimer );\n *     }\n *     else\n *     {\n *         // xTimer is not active, change its period to 500ms.  This will also\n *         // cause the timer to start.  Block for a maximum of 100 ticks if the\n *         // change period command cannot immediately be sent to the timer\n *         // command queue.\n *         if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS )\n *         {\n *             // The command was successfully sent.\n *         }\n *         else\n *         {\n *             // The command could not be sent, even after waiting for 100 ticks\n *             // to pass.  Take appropriate action here.\n *         }\n *     }\n * }\n * @endverbatim\n */\n #define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )\n\n/**\n * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );\n *\n * Timer functionality is provided by a timer service/daemon task.  Many of the\n * public FreeRTOS timer API functions send commands to the timer service task\n * through a queue called the timer command queue.  The timer command queue is\n * private to the kernel itself and is not directly accessible to application\n * code.  The length of the timer command queue is set by the\n * configTIMER_QUEUE_LENGTH configuration constant.\n *\n * xTimerDelete() deletes a timer that was previously created using the\n * xTimerCreate() API function.\n *\n * The configUSE_TIMERS configuration constant must be set to 1 for\n * xTimerDelete() to be available.\n *\n * @param xTimer The handle of the timer being deleted.\n *\n * @param xTicksToWait Specifies the time, in ticks, that the calling task should\n * be held in the Blocked state to wait for the delete command to be\n * successfully sent to the timer command queue, should the queue already be\n * full when xTimerDelete() was called.  xTicksToWait is ignored if xTimerDelete()\n * is called before the scheduler is started.\n *\n * @return pdFAIL will be returned if the delete command could not be sent to\n * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will\n * be returned if the command was successfully sent to the timer command queue.\n * When the command is actually processed will depend on the priority of the\n * timer service/daemon task relative to other tasks in the system.  The timer\n * service/daemon task priority is set by the configTIMER_TASK_PRIORITY\n * configuration constant.\n *\n * Example usage:\n *\n * See the xTimerChangePeriod() API function example usage scenario.\n */\n#define xTimerDelete( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )\n\n/**\n * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );\n *\n * Timer functionality is provided by a timer service/daemon task.  Many of the\n * public FreeRTOS timer API functions send commands to the timer service task\n * through a queue called the timer command queue.  The timer command queue is\n * private to the kernel itself and is not directly accessible to application\n * code.  The length of the timer command queue is set by the\n * configTIMER_QUEUE_LENGTH configuration constant.\n *\n * xTimerReset() re-starts a timer that was previously created using the\n * xTimerCreate() API function.  If the timer had already been started and was\n * already in the active state, then xTimerReset() will cause the timer to\n * re-evaluate its expiry time so that it is relative to when xTimerReset() was\n * called.  If the timer was in the dormant state then xTimerReset() has\n * equivalent functionality to the xTimerStart() API function.\n *\n * Resetting a timer ensures the timer is in the active state.  If the timer\n * is not stopped, deleted, or reset in the mean time, the callback function\n * associated with the timer will get called 'n' ticks after xTimerReset() was\n * called, where 'n' is the timers defined period.\n *\n * It is valid to call xTimerReset() before the scheduler has been started, but\n * when this is done the timer will not actually start until the scheduler is\n * started, and the timers expiry time will be relative to when the scheduler is\n * started, not relative to when xTimerReset() was called.\n *\n * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()\n * to be available.\n *\n * @param xTimer The handle of the timer being reset/started/restarted.\n *\n * @param xTicksToWait Specifies the time, in ticks, that the calling task should\n * be held in the Blocked state to wait for the reset command to be successfully\n * sent to the timer command queue, should the queue already be full when\n * xTimerReset() was called.  xTicksToWait is ignored if xTimerReset() is called\n * before the scheduler is started.\n *\n * @return pdFAIL will be returned if the reset command could not be sent to\n * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will\n * be returned if the command was successfully sent to the timer command queue.\n * When the command is actually processed will depend on the priority of the\n * timer service/daemon task relative to other tasks in the system, although the\n * timers expiry time is relative to when xTimerStart() is actually called.  The\n * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY\n * configuration constant.\n *\n * Example usage:\n * @verbatim\n * // When a key is pressed, an LCD back-light is switched on.  If 5 seconds pass\n * // without a key being pressed, then the LCD back-light is switched off.  In\n * // this case, the timer is a one-shot timer.\n *\n * TimerHandle_t xBacklightTimer = NULL;\n *\n * // The callback function assigned to the one-shot timer.  In this case the\n * // parameter is not used.\n * void vBacklightTimerCallback( TimerHandle_t pxTimer )\n * {\n *     // The timer expired, therefore 5 seconds must have passed since a key\n *     // was pressed.  Switch off the LCD back-light.\n *     vSetBacklightState( BACKLIGHT_OFF );\n * }\n *\n * // The key press event handler.\n * void vKeyPressEventHandler( char cKey )\n * {\n *     // Ensure the LCD back-light is on, then reset the timer that is\n *     // responsible for turning the back-light off after 5 seconds of\n *     // key inactivity.  Wait 10 ticks for the command to be successfully sent\n *     // if it cannot be sent immediately.\n *     vSetBacklightState( BACKLIGHT_ON );\n *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )\n *     {\n *         // The reset command was not executed successfully.  Take appropriate\n *         // action here.\n *     }\n *\n *     // Perform the rest of the key processing here.\n * }\n *\n * void main( void )\n * {\n * int32_t x;\n *\n *     // Create then start the one-shot timer that is responsible for turning\n *     // the back-light off if no keys are pressed within a 5 second period.\n *     xBacklightTimer = xTimerCreate( \"BacklightTimer\",           // Just a text name, not used by the kernel.\n *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.\n *                                     pdFALSE,                    // The timer is a one-shot timer.\n *                                     0,                          // The id is not used by the callback so can take any value.\n *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.\n *                                   );\n *\n *     if( xBacklightTimer == NULL )\n *     {\n *         // The timer was not created.\n *     }\n *     else\n *     {\n *         // Start the timer.  No block time is specified, and even if one was\n *         // it would be ignored because the scheduler has not yet been\n *         // started.\n *         if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )\n *         {\n *             // The timer could not be set into the Active state.\n *         }\n *     }\n *\n *     // ...\n *     // Create tasks here.\n *     // ...\n *\n *     // Starting the scheduler will start the timer running as it has already\n *     // been set into the active state.\n *     vTaskStartScheduler();\n *\n *     // Should not reach here.\n *     for( ;; );\n * }\n * @endverbatim\n */\n#define xTimerReset( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )\n\n/**\n * BaseType_t xTimerStartFromISR( \tTimerHandle_t xTimer,\n *\t\t\t\t\t\t\t\t\tBaseType_t *pxHigherPriorityTaskWoken );\n *\n * A version of xTimerStart() that can be called from an interrupt service\n * routine.\n *\n * @param xTimer The handle of the timer being started/restarted.\n *\n * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most\n * of its time in the Blocked state, waiting for messages to arrive on the timer\n * command queue.  Calling xTimerStartFromISR() writes a message to the timer\n * command queue, so has the potential to transition the timer service/daemon\n * task out of the Blocked state.  If calling xTimerStartFromISR() causes the\n * timer service/daemon task to leave the Blocked state, and the timer service/\n * daemon task has a priority equal to or greater than the currently executing\n * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will\n * get set to pdTRUE internally within the xTimerStartFromISR() function.  If\n * xTimerStartFromISR() sets this value to pdTRUE then a context switch should\n * be performed before the interrupt exits.\n *\n * @return pdFAIL will be returned if the start command could not be sent to\n * the timer command queue.  pdPASS will be returned if the command was\n * successfully sent to the timer command queue.  When the command is actually\n * processed will depend on the priority of the timer service/daemon task\n * relative to other tasks in the system, although the timers expiry time is\n * relative to when xTimerStartFromISR() is actually called.  The timer\n * service/daemon task priority is set by the configTIMER_TASK_PRIORITY\n * configuration constant.\n *\n * Example usage:\n * @verbatim\n * // This scenario assumes xBacklightTimer has already been created.  When a\n * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass\n * // without a key being pressed, then the LCD back-light is switched off.  In\n * // this case, the timer is a one-shot timer, and unlike the example given for\n * // the xTimerReset() function, the key press event handler is an interrupt\n * // service routine.\n *\n * // The callback function assigned to the one-shot timer.  In this case the\n * // parameter is not used.\n * void vBacklightTimerCallback( TimerHandle_t pxTimer )\n * {\n *     // The timer expired, therefore 5 seconds must have passed since a key\n *     // was pressed.  Switch off the LCD back-light.\n *     vSetBacklightState( BACKLIGHT_OFF );\n * }\n *\n * // The key press interrupt service routine.\n * void vKeyPressEventInterruptHandler( void )\n * {\n * BaseType_t xHigherPriorityTaskWoken = pdFALSE;\n *\n *     // Ensure the LCD back-light is on, then restart the timer that is\n *     // responsible for turning the back-light off after 5 seconds of\n *     // key inactivity.  This is an interrupt service routine so can only\n *     // call FreeRTOS API functions that end in \"FromISR\".\n *     vSetBacklightState( BACKLIGHT_ON );\n *\n *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here\n *     // as both cause the timer to re-calculate its expiry time.\n *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was\n *     // declared (in this function).\n *     if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )\n *     {\n *         // The start command was not executed successfully.  Take appropriate\n *         // action here.\n *     }\n *\n *     // Perform the rest of the key processing here.\n *\n *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch\n *     // should be performed.  The syntax required to perform a context switch\n *     // from inside an ISR varies from port to port, and from compiler to\n *     // compiler.  Inspect the demos for the port you are using to find the\n *     // actual syntax required.\n *     if( xHigherPriorityTaskWoken != pdFALSE )\n *     {\n *         // Call the interrupt safe yield function here (actual function\n *         // depends on the FreeRTOS port being used).\n *     }\n * }\n * @endverbatim\n */\n#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )\n\n/**\n * BaseType_t xTimerStopFromISR( \tTimerHandle_t xTimer,\n *\t\t\t\t\t\t\t\t\tBaseType_t *pxHigherPriorityTaskWoken );\n *\n * A version of xTimerStop() that can be called from an interrupt service\n * routine.\n *\n * @param xTimer The handle of the timer being stopped.\n *\n * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most\n * of its time in the Blocked state, waiting for messages to arrive on the timer\n * command queue.  Calling xTimerStopFromISR() writes a message to the timer\n * command queue, so has the potential to transition the timer service/daemon\n * task out of the Blocked state.  If calling xTimerStopFromISR() causes the\n * timer service/daemon task to leave the Blocked state, and the timer service/\n * daemon task has a priority equal to or greater than the currently executing\n * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will\n * get set to pdTRUE internally within the xTimerStopFromISR() function.  If\n * xTimerStopFromISR() sets this value to pdTRUE then a context switch should\n * be performed before the interrupt exits.\n *\n * @return pdFAIL will be returned if the stop command could not be sent to\n * the timer command queue.  pdPASS will be returned if the command was\n * successfully sent to the timer command queue.  When the command is actually\n * processed will depend on the priority of the timer service/daemon task\n * relative to other tasks in the system.  The timer service/daemon task\n * priority is set by the configTIMER_TASK_PRIORITY configuration constant.\n *\n * Example usage:\n * @verbatim\n * // This scenario assumes xTimer has already been created and started.  When\n * // an interrupt occurs, the timer should be simply stopped.\n *\n * // The interrupt service routine that stops the timer.\n * void vAnExampleInterruptServiceRoutine( void )\n * {\n * BaseType_t xHigherPriorityTaskWoken = pdFALSE;\n *\n *     // The interrupt has occurred - simply stop the timer.\n *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined\n *     // (within this function).  As this is an interrupt service routine, only\n *     // FreeRTOS API functions that end in \"FromISR\" can be used.\n *     if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )\n *     {\n *         // The stop command was not executed successfully.  Take appropriate\n *         // action here.\n *     }\n *\n *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch\n *     // should be performed.  The syntax required to perform a context switch\n *     // from inside an ISR varies from port to port, and from compiler to\n *     // compiler.  Inspect the demos for the port you are using to find the\n *     // actual syntax required.\n *     if( xHigherPriorityTaskWoken != pdFALSE )\n *     {\n *         // Call the interrupt safe yield function here (actual function\n *         // depends on the FreeRTOS port being used).\n *     }\n * }\n * @endverbatim\n */\n#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )\n\n/**\n * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,\n *\t\t\t\t\t\t\t\t\t\t TickType_t xNewPeriod,\n *\t\t\t\t\t\t\t\t\t\t BaseType_t *pxHigherPriorityTaskWoken );\n *\n * A version of xTimerChangePeriod() that can be called from an interrupt\n * service routine.\n *\n * @param xTimer The handle of the timer that is having its period changed.\n *\n * @param xNewPeriod The new period for xTimer. Timer periods are specified in\n * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time\n * that has been specified in milliseconds.  For example, if the timer must\n * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,\n * if the timer must expire after 500ms, then xNewPeriod can be set to\n * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than\n * or equal to 1000.\n *\n * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most\n * of its time in the Blocked state, waiting for messages to arrive on the timer\n * command queue.  Calling xTimerChangePeriodFromISR() writes a message to the\n * timer command queue, so has the potential to transition the timer service/\n * daemon task out of the Blocked state.  If calling xTimerChangePeriodFromISR()\n * causes the timer service/daemon task to leave the Blocked state, and the\n * timer service/daemon task has a priority equal to or greater than the\n * currently executing task (the task that was interrupted), then\n * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the\n * xTimerChangePeriodFromISR() function.  If xTimerChangePeriodFromISR() sets\n * this value to pdTRUE then a context switch should be performed before the\n * interrupt exits.\n *\n * @return pdFAIL will be returned if the command to change the timers period\n * could not be sent to the timer command queue.  pdPASS will be returned if the\n * command was successfully sent to the timer command queue.  When the command\n * is actually processed will depend on the priority of the timer service/daemon\n * task relative to other tasks in the system.  The timer service/daemon task\n * priority is set by the configTIMER_TASK_PRIORITY configuration constant.\n *\n * Example usage:\n * @verbatim\n * // This scenario assumes xTimer has already been created and started.  When\n * // an interrupt occurs, the period of xTimer should be changed to 500ms.\n *\n * // The interrupt service routine that changes the period of xTimer.\n * void vAnExampleInterruptServiceRoutine( void )\n * {\n * BaseType_t xHigherPriorityTaskWoken = pdFALSE;\n *\n *     // The interrupt has occurred - change the period of xTimer to 500ms.\n *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined\n *     // (within this function).  As this is an interrupt service routine, only\n *     // FreeRTOS API functions that end in \"FromISR\" can be used.\n *     if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )\n *     {\n *         // The command to change the timers period was not executed\n *         // successfully.  Take appropriate action here.\n *     }\n *\n *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch\n *     // should be performed.  The syntax required to perform a context switch\n *     // from inside an ISR varies from port to port, and from compiler to\n *     // compiler.  Inspect the demos for the port you are using to find the\n *     // actual syntax required.\n *     if( xHigherPriorityTaskWoken != pdFALSE )\n *     {\n *         // Call the interrupt safe yield function here (actual function\n *         // depends on the FreeRTOS port being used).\n *     }\n * }\n * @endverbatim\n */\n#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )\n\n/**\n * BaseType_t xTimerResetFromISR( \tTimerHandle_t xTimer,\n *\t\t\t\t\t\t\t\t\tBaseType_t *pxHigherPriorityTaskWoken );\n *\n * A version of xTimerReset() that can be called from an interrupt service\n * routine.\n *\n * @param xTimer The handle of the timer that is to be started, reset, or\n * restarted.\n *\n * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most\n * of its time in the Blocked state, waiting for messages to arrive on the timer\n * command queue.  Calling xTimerResetFromISR() writes a message to the timer\n * command queue, so has the potential to transition the timer service/daemon\n * task out of the Blocked state.  If calling xTimerResetFromISR() causes the\n * timer service/daemon task to leave the Blocked state, and the timer service/\n * daemon task has a priority equal to or greater than the currently executing\n * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will\n * get set to pdTRUE internally within the xTimerResetFromISR() function.  If\n * xTimerResetFromISR() sets this value to pdTRUE then a context switch should\n * be performed before the interrupt exits.\n *\n * @return pdFAIL will be returned if the reset command could not be sent to\n * the timer command queue.  pdPASS will be returned if the command was\n * successfully sent to the timer command queue.  When the command is actually\n * processed will depend on the priority of the timer service/daemon task\n * relative to other tasks in the system, although the timers expiry time is\n * relative to when xTimerResetFromISR() is actually called.  The timer service/daemon\n * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.\n *\n * Example usage:\n * @verbatim\n * // This scenario assumes xBacklightTimer has already been created.  When a\n * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass\n * // without a key being pressed, then the LCD back-light is switched off.  In\n * // this case, the timer is a one-shot timer, and unlike the example given for\n * // the xTimerReset() function, the key press event handler is an interrupt\n * // service routine.\n *\n * // The callback function assigned to the one-shot timer.  In this case the\n * // parameter is not used.\n * void vBacklightTimerCallback( TimerHandle_t pxTimer )\n * {\n *     // The timer expired, therefore 5 seconds must have passed since a key\n *     // was pressed.  Switch off the LCD back-light.\n *     vSetBacklightState( BACKLIGHT_OFF );\n * }\n *\n * // The key press interrupt service routine.\n * void vKeyPressEventInterruptHandler( void )\n * {\n * BaseType_t xHigherPriorityTaskWoken = pdFALSE;\n *\n *     // Ensure the LCD back-light is on, then reset the timer that is\n *     // responsible for turning the back-light off after 5 seconds of\n *     // key inactivity.  This is an interrupt service routine so can only\n *     // call FreeRTOS API functions that end in \"FromISR\".\n *     vSetBacklightState( BACKLIGHT_ON );\n *\n *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here\n *     // as both cause the timer to re-calculate its expiry time.\n *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was\n *     // declared (in this function).\n *     if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )\n *     {\n *         // The reset command was not executed successfully.  Take appropriate\n *         // action here.\n *     }\n *\n *     // Perform the rest of the key processing here.\n *\n *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch\n *     // should be performed.  The syntax required to perform a context switch\n *     // from inside an ISR varies from port to port, and from compiler to\n *     // compiler.  Inspect the demos for the port you are using to find the\n *     // actual syntax required.\n *     if( xHigherPriorityTaskWoken != pdFALSE )\n *     {\n *         // Call the interrupt safe yield function here (actual function\n *         // depends on the FreeRTOS port being used).\n *     }\n * }\n * @endverbatim\n */\n#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )\n\n\n/**\n * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,\n *                                          void *pvParameter1,\n *                                          uint32_t ulParameter2,\n *                                          BaseType_t *pxHigherPriorityTaskWoken );\n *\n *\n * Used from application interrupt service routines to defer the execution of a\n * function to the RTOS daemon task (the timer service task, hence this function\n * is implemented in timers.c and is prefixed with 'Timer').\n *\n * Ideally an interrupt service routine (ISR) is kept as short as possible, but\n * sometimes an ISR either has a lot of processing to do, or needs to perform\n * processing that is not deterministic.  In these cases\n * xTimerPendFunctionCallFromISR() can be used to defer processing of a function\n * to the RTOS daemon task.\n *\n * A mechanism is provided that allows the interrupt to return directly to the\n * task that will subsequently execute the pended callback function.  This\n * allows the callback function to execute contiguously in time with the\n * interrupt - just as if the callback had executed in the interrupt itself.\n *\n * @param xFunctionToPend The function to execute from the timer service/\n * daemon task.  The function must conform to the PendedFunction_t\n * prototype.\n *\n * @param pvParameter1 The value of the callback function's first parameter.\n * The parameter has a void * type to allow it to be used to pass any type.\n * For example, unsigned longs can be cast to a void *, or the void * can be\n * used to point to a structure.\n *\n * @param ulParameter2 The value of the callback function's second parameter.\n *\n * @param pxHigherPriorityTaskWoken As mentioned above, calling this function\n * will result in a message being sent to the timer daemon task.  If the\n * priority of the timer daemon task (which is set using\n * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of\n * the currently running task (the task the interrupt interrupted) then\n * *pxHigherPriorityTaskWoken will be set to pdTRUE within\n * xTimerPendFunctionCallFromISR(), indicating that a context switch should be\n * requested before the interrupt exits.  For that reason\n * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the\n * example code below.\n *\n * @return pdPASS is returned if the message was successfully sent to the\n * timer daemon task, otherwise pdFALSE is returned.\n *\n * Example usage:\n * @verbatim\n *\n *\t// The callback function that will execute in the context of the daemon task.\n *  // Note callback functions must all use this same prototype.\n *  void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )\n *\t{\n *\t\tBaseType_t xInterfaceToService;\n *\n *\t\t// The interface that requires servicing is passed in the second\n *      // parameter.  The first parameter is not used in this case.\n *\t\txInterfaceToService = ( BaseType_t ) ulParameter2;\n *\n *\t\t// ...Perform the processing here...\n *\t}\n *\n *\t// An ISR that receives data packets from multiple interfaces\n *  void vAnISR( void )\n *\t{\n *\t\tBaseType_t xInterfaceToService, xHigherPriorityTaskWoken;\n *\n *\t\t// Query the hardware to determine which interface needs processing.\n *\t\txInterfaceToService = prvCheckInterfaces();\n *\n *      // The actual processing is to be deferred to a task.  Request the\n *      // vProcessInterface() callback function is executed, passing in the\n *\t\t// number of the interface that needs processing.  The interface to\n *\t\t// service is passed in the second parameter.  The first parameter is\n *\t\t// not used in this case.\n *\t\txHigherPriorityTaskWoken = pdFALSE;\n *\t\txTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );\n *\n *\t\t// If xHigherPriorityTaskWoken is now set to pdTRUE then a context\n *\t\t// switch should be requested.  The macro used is port specific and will\n *\t\t// be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to\n *\t\t// the documentation page for the port being used.\n *\t\tportYIELD_FROM_ISR( xHigherPriorityTaskWoken );\n *\n *\t}\n * @endverbatim\n */\nBaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;\n\n /**\n  * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,\n  *                                    void *pvParameter1,\n  *                                    uint32_t ulParameter2,\n  *                                    TickType_t xTicksToWait );\n  *\n  *\n  * Used to defer the execution of a function to the RTOS daemon task (the timer\n  * service task, hence this function is implemented in timers.c and is prefixed\n  * with 'Timer').\n  *\n  * @param xFunctionToPend The function to execute from the timer service/\n  * daemon task.  The function must conform to the PendedFunction_t\n  * prototype.\n  *\n  * @param pvParameter1 The value of the callback function's first parameter.\n  * The parameter has a void * type to allow it to be used to pass any type.\n  * For example, unsigned longs can be cast to a void *, or the void * can be\n  * used to point to a structure.\n  *\n  * @param ulParameter2 The value of the callback function's second parameter.\n  *\n  * @param xTicksToWait Calling this function will result in a message being\n  * sent to the timer daemon task on a queue.  xTicksToWait is the amount of\n  * time the calling task should remain in the Blocked state (so not using any\n  * processing time) for space to become available on the timer queue if the\n  * queue is found to be full.\n  *\n  * @return pdPASS is returned if the message was successfully sent to the\n  * timer daemon task, otherwise pdFALSE is returned.\n  *\n  */\nBaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n/**\n * const char * const pcTimerGetName( TimerHandle_t xTimer );\n *\n * Returns the name that was assigned to a timer when the timer was created.\n *\n * @param xTimer The handle of the timer being queried.\n *\n * @return The name assigned to the timer specified by the xTimer parameter.\n */\nconst char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */\n\n/**\n * TickType_t xTimerGetPeriod( TimerHandle_t xTimer );\n *\n * Returns the period of a timer.\n *\n * @param xTimer The handle of the timer being queried.\n *\n * @return The period of the timer in ticks.\n */\nTickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;\n\n/**\n* TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer );\n*\n* Returns the time in ticks at which the timer will expire.  If this is less\n* than the current tick count then the expiry time has overflowed from the\n* current time.\n*\n* @param xTimer The handle of the timer being queried.\n*\n* @return If the timer is running then the time in ticks at which the timer\n* will next expire is returned.  If the timer is not running then the return\n* value is undefined.\n*/\nTickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;\n\n/*\n * Functions beyond this part are not part of the public API and are intended\n * for use by the kernel only.\n */\nBaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;\nBaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;\n\n#if( configUSE_TRACE_FACILITY == 1 )\n\tvoid vTimerSetTimerNumber( TimerHandle_t xTimer, UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION;\n\tUBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n#endif /* TIMERS_H */\n\n\n\n"
  },
  {
    "path": "include/rtos/rtx/cmsis_os.h",
    "content": "/* ----------------------------------------------------------------------\n * Copyright (C) 2012 ARM Limited. All rights reserved.\n *\n * $Date:        5. June 2012\n * $Revision:    V1.01\n *\n * Project:      CMSIS-RTOS API\n * Title:        cmsis_os.h RTX header file\n *\n * Version 0.02\n *    Initial Proposal Phase\n * Version 0.03\n *    osKernelStart added, optional feature: main started as thread\n *    osSemaphores have standard behavior\n *    osTimerCreate does not start the timer, added osTimerStart\n *    osThreadPass is renamed to osThreadYield\n * Version 1.01\n *    Support for C++ interface\n *     - const attribute removed from the osXxxxDef_t typedef's\n *     - const attribute added to the osXxxxDef macros\n *    Added: osTimerDelete, osMutexDelete, osSemaphoreDelete\n *    Added: osKernelInitialize\n * -------------------------------------------------------------------- */\n\n/**\n\\page cmsis_os_h Header File Template: cmsis_os.h\n\nThe file \\b cmsis_os.h is a template header file for a CMSIS-RTOS compliant Real-Time Operating System (RTOS).\nEach RTOS that is compliant with CMSIS-RTOS shall provide a specific \\b cmsis_os.h header file that represents\nits implementation.\n\nThe file cmsis_os.h contains:\n - CMSIS-RTOS API function definitions\n - struct definitions for parameters and return types\n - status and priority values used by CMSIS-RTOS API functions\n - macros for defining threads and other kernel objects\n\n\nName conventions and header file modifications\n\nAll definitions are prefixed with \\b os to give an unique name space for CMSIS-RTOS functions.\nDefinitions that are prefixed \\b os_ are not used in the application code but local to this header file.\nAll definitions and functions that belong to a module are grouped and have a common prefix, i.e. \\b osThread.\n\nDefinitions that are marked with CAN BE CHANGED can be adapted towards the needs of the actual CMSIS-RTOS implementation.\nThese definitions can be specific to the underlying RTOS kernel.\n\nDefinitions that are marked with MUST REMAIN UNCHANGED cannot be altered. Otherwise the CMSIS-RTOS implementation is no longer\ncompliant to the standard. Note that some functions are optional and need not to be provided by every CMSIS-RTOS implementation.\n\n\nFunction calls from interrupt service routines\n\nThe following CMSIS-RTOS functions can be called from threads and interrupt service routines (ISR):\n  - \\ref osSignalSet\n  - \\ref osSemaphoreRelease\n  - \\ref osPoolAlloc, \\ref osPoolCAlloc, \\ref osPoolFree\n  - \\ref osMessagePut, \\ref osMessageGet\n  - \\ref osMailAlloc, \\ref osMailCAlloc, \\ref osMailGet, \\ref osMailPut, \\ref osMailFree\n\nFunctions that cannot be called from an ISR are verifying the interrupt status and return in case that they are called\nfrom an ISR context the status code \\b osErrorISR. In some implementations this condition might be caught using the HARD FAULT vector.\n\nSome CMSIS-RTOS implementations support CMSIS-RTOS function calls from multiple ISR at the same time.\nIf this is impossible, the CMSIS-RTOS rejects calls by nested ISR functions with the status code \\b osErrorISRRecursive.\n\n\nDefine and reference object definitions\n\nWith \\#define osObjectsExternal objects are defined as external symbols. This allows to create a consistent header file\nthat is used throughout a project as shown below:\n\nHeader File\n\\code\n#include                                          // CMSIS RTOS header file\n\n// Thread definition\nextern void thread_sample (void const *argument);             // function prototype\nosThreadDef (thread_sample, osPriorityBelowNormal, 1, 100);\n\n// Pool definition\nosPoolDef(MyPool, 10, long);\n\\endcode\n\n\nThis header file defines all objects when included in a C/C++ source file. When \\#define osObjectsExternal is\npresent before the header file, the objects are defined as external symbols. A single consistent header file can therefore be\nused throughout the whole project.\n\nExample\n\\code\n#include \"osObjects.h\"     // Definition of the CMSIS-RTOS objects\n\\endcode\n\n\\code\n#define osObjectExternal   // Objects will be defined as external symbols\n#include \"osObjects.h\"     // Reference to the CMSIS-RTOS objects\n\\endcode\n\n*/\n\n#ifndef _CMSIS_OS_H\n#define _CMSIS_OS_H\n\n/// \\note MUST REMAIN UNCHANGED: \\b osCMSIS identifies the CMSIS-RTOS API version.\n#define osCMSIS           0x10001      ///< API version (main [31:16] .sub [15:0])\n\n/// \\note CAN BE CHANGED: \\b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number.\n#define osCMSIS_RTX     ((4<<16)|61)   ///< RTOS identification and version (main [31:16] .sub [15:0])\n\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelSystemId shall be consistent in every CMSIS-RTOS.\n#define osKernelSystemId \"RTX V4.61\"   ///< RTOS identification string\n\n\n#define CMSIS_OS_RTX\n\n// The stack space occupied is mainly dependent on the underling C standard library\n#if defined(__GNUC__) || defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__ICCARM__)\n#    define WORDS_STACK_SIZE   512\n#elif defined(TOOLCHAIN_ARM_MICRO)\n#    define WORDS_STACK_SIZE   128\n#endif\n\n#define DEFAULT_STACK_SIZE         (WORDS_STACK_SIZE*4)\n\n\n/// \\note MUST REMAIN UNCHANGED: \\b osFeature_xxx shall be consistent in every CMSIS-RTOS.\n#define osFeature_MainThread   1       ///< main thread      1=main can be thread, 0=not available\n#define osFeature_Pool         1       ///< Memory Pools:    1=available, 0=not available\n#define osFeature_MailQ        1       ///< Mail Queues:     1=available, 0=not available\n#define osFeature_MessageQ     1       ///< Message Queues:  1=available, 0=not available\n#define osFeature_Signals      16      ///< maximum number of Signal Flags available per thread\n#define osFeature_Semaphore    65535   ///< maximum count for \\ref osSemaphoreCreate function\n#define osFeature_Wait         0       ///< osWait function: 1=available, 0=not available\n\n#if defined (__CC_ARM)\n#define os_InRegs __value_in_regs      // Compiler specific: force struct in registers\n#elif defined (__ICCARM__)\n#define os_InRegs __value_in_regs      // Compiler specific: force struct in registers\n#else\n#define os_InRegs\n#endif\n\n#include \n#include \n\n#ifdef  __cplusplus\nextern \"C\"\n{\n#endif\n\n#ifndef __uint32_t_defined\ntypedef unsigned int uint32_t;\n# define __uint32_t_defined\n#endif\n\n#include \"os_tcb.h\"\n\n// ==== Enumeration, structures, defines ====\n\n/// Priority used for thread control.\n/// \\note MUST REMAIN UNCHANGED: \\b osPriority shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osPriorityIdle          = -3,          ///< priority: idle (lowest)\n  osPriorityLow           = -2,          ///< priority: low\n  osPriorityBelowNormal   = -1,          ///< priority: below normal\n  osPriorityNormal        =  0,          ///< priority: normal (default)\n  osPriorityAboveNormal   = +1,          ///< priority: above normal\n  osPriorityHigh          = +2,          ///< priority: high\n  osPriorityRealtime      = +3,          ///< priority: realtime (highest)\n  osPriorityError         =  0x84        ///< system cannot determine priority or thread has illegal priority\n} osPriority;\n\n/// Timeout value.\n/// \\note MUST REMAIN UNCHANGED: \\b osWaitForever shall be consistent in every CMSIS-RTOS.\n#define osWaitForever     0xFFFFFFFF     ///< wait forever timeout value\n\n/// Status code values returned by CMSIS-RTOS functions.\n/// \\note MUST REMAIN UNCHANGED: \\b osStatus shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osOK                    =     0,       ///< function completed; no error or event occurred.\n  osEventSignal           =  0x08,       ///< function completed; signal event occurred.\n  osEventMessage          =  0x10,       ///< function completed; message event occurred.\n  osEventMail             =  0x20,       ///< function completed; mail event occurred.\n  osEventTimeout          =  0x40,       ///< function completed; timeout occurred.\n  osErrorParameter        =  0x80,       ///< parameter error: a mandatory parameter was missing or specified an incorrect object.\n  osErrorResource         =  0x81,       ///< resource not available: a specified resource was not available.\n  osErrorTimeoutResource  =  0xC1,       ///< resource not available within given time: a specified resource was not available within the timeout period.\n  osErrorISR              =  0x82,       ///< not allowed in ISR context: the function cannot be called from interrupt service routines.\n  osErrorISRRecursive     =  0x83,       ///< function called multiple times from ISR with same object.\n  osErrorPriority         =  0x84,       ///< system cannot determine priority or thread has illegal priority.\n  osErrorNoMemory         =  0x85,       ///< system is out of memory: it was impossible to allocate or reserve memory for the operation.\n  osErrorValue            =  0x86,       ///< value of a parameter is out of range.\n  osErrorOS               =  0xFF,       ///< unspecified RTOS error: run-time error but no other error message fits.\n  os_status_reserved      =  0x7FFFFFFF  ///< prevent from enum down-size compiler optimization.\n} osStatus;\n\n\n/// Timer type value for the timer definition.\n/// \\note MUST REMAIN UNCHANGED: \\b os_timer_type shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osTimerOnce             =     0,       ///< one-shot timer\n  osTimerPeriodic         =     1        ///< repeating timer\n} os_timer_type;\n\n/// Entry point of a thread.\n/// \\note MUST REMAIN UNCHANGED: \\b os_pthread shall be consistent in every CMSIS-RTOS.\ntypedef void (*os_pthread) (void const *argument);\n\n/// Entry point of a timer call back function.\n/// \\note MUST REMAIN UNCHANGED: \\b os_ptimer shall be consistent in every CMSIS-RTOS.\ntypedef void (*os_ptimer) (void const *argument);\n\n// >>> the following data type definitions may shall adapted towards a specific RTOS\n\n/// Thread ID identifies the thread (pointer to a thread control block).\n/// \\note CAN BE CHANGED: \\b os_thread_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_thread_cb *osThreadId;\n\n/// Timer ID identifies the timer (pointer to a timer control block).\n/// \\note CAN BE CHANGED: \\b os_timer_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_timer_cb *osTimerId;\n\n/// Mutex ID identifies the mutex (pointer to a mutex control block).\n/// \\note CAN BE CHANGED: \\b os_mutex_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mutex_cb *osMutexId;\n\n/// Semaphore ID identifies the semaphore (pointer to a semaphore control block).\n/// \\note CAN BE CHANGED: \\b os_semaphore_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_semaphore_cb *osSemaphoreId;\n\n/// Pool ID identifies the memory pool (pointer to a memory pool control block).\n/// \\note CAN BE CHANGED: \\b os_pool_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_pool_cb *osPoolId;\n\n/// Message ID identifies the message queue (pointer to a message queue control block).\n/// \\note CAN BE CHANGED: \\b os_messageQ_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_messageQ_cb *osMessageQId;\n\n/// Mail ID identifies the mail queue (pointer to a mail queue control block).\n/// \\note CAN BE CHANGED: \\b os_mailQ_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mailQ_cb *osMailQId;\n\n\n/// Thread Definition structure contains startup information of a thread.\n/// \\note CAN BE CHANGED: \\b os_thread_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_thread_def  {\n  os_pthread               pthread;      ///< start address of thread function\n  osPriority             tpriority;      ///< initial thread priority\n  uint32_t               stacksize;      ///< stack size requirements in bytes\n  uint32_t               *stack_pointer;  ///< pointer to the stack memory block\n  struct OS_TCB          tcb;\n#if __RTX_CPU_STATISTICS__\n  const char *           name_str;\n#endif\n} osThreadDef_t;\n\n/// Timer Definition structure contains timer parameters.\n/// \\note CAN BE CHANGED: \\b os_timer_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_timer_def  {\n  os_ptimer                 ptimer;    ///< start address of a timer function\n  void                      *timer;    ///< pointer to internal data\n} osTimerDef_t;\n\n/// Mutex Definition structure contains setup information for a mutex.\n/// \\note CAN BE CHANGED: \\b os_mutex_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mutex_def  {\n  void                      *mutex;    ///< pointer to internal data\n} osMutexDef_t;\n\n/// Semaphore Definition structure contains setup information for a semaphore.\n/// \\note CAN BE CHANGED: \\b os_semaphore_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_semaphore_def  {\n  void                  *semaphore;    ///< pointer to internal data\n} osSemaphoreDef_t;\n\n/// Definition structure for memory block allocation.\n/// \\note CAN BE CHANGED: \\b os_pool_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_pool_def  {\n  uint32_t                 pool_sz;    ///< number of items (elements) in the pool\n  uint32_t                 item_sz;    ///< size of an item\n  void                       *pool;    ///< pointer to memory for pool\n} osPoolDef_t;\n\n/// Definition structure for message queue.\n/// \\note CAN BE CHANGED: \\b os_messageQ_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_messageQ_def  {\n  uint32_t                queue_sz;    ///< number of elements in the queue\n  void                       *pool;    ///< memory array for messages\n} osMessageQDef_t;\n\n/// Definition structure for mail queue.\n/// \\note CAN BE CHANGED: \\b os_mailQ_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mailQ_def  {\n  uint32_t                queue_sz;    ///< number of elements in the queue\n  uint32_t                 item_sz;    ///< size of an item\n  void                       *pool;    ///< memory array for mail\n} osMailQDef_t;\n\n/// Event structure contains detailed information about an event.\n/// \\note MUST REMAIN UNCHANGED: \\b os_event shall be consistent in every CMSIS-RTOS.\n///       However the struct may be extended at the end.\ntypedef struct  {\n  osStatus                 status;     ///< status code: event or error information\n  union  {\n    uint32_t                    v;     ///< message as 32-bit value\n    void                       *p;     ///< message or mail as void pointer\n    int32_t               signals;     ///< signal flags\n  } value;                             ///< event value\n  union  {\n    osMailQId             mail_id;     ///< mail id obtained by \\ref osMailCreate\n    osMessageQId       message_id;     ///< message id obtained by \\ref osMessageCreate\n  } def;                               ///< event definition\n} osEvent;\n\n\n//  ==== Kernel Control Functions ====\n\n/// Initialize the RTOS Kernel for creating objects.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelInitialize shall be consistent in every CMSIS-RTOS.\nosStatus osKernelInitialize (void);\n\n/// Start the RTOS Kernel.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelStart shall be consistent in every CMSIS-RTOS.\nosStatus osKernelStart (void);\n\n/// Check if the RTOS kernel is already started.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelRunning shall be consistent in every CMSIS-RTOS.\n/// \\return 0 RTOS is not started, 1 RTOS is started.\nint32_t osKernelRunning(void);\n\n\n//  ==== Thread Management ====\n\n/// Create a Thread Definition with function, priority, and stack requirements.\n/// \\param         name         name of the thread function.\n/// \\param         priority     initial priority of the thread function.\n/// \\param         stacksz      stack size (in bytes) requirements for the thread function.\n/// \\note CAN BE CHANGED: The parameters to \\b osThreadDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osThreadDef(name, priority, stacksz)  \\\nextern osThreadDef_t os_thread_def_##name\n#else                            // define the object\n#if __RTX_CPU_STATISTICS__\n#define osThreadDef(name, priority, instances, stacksz, task_name)  \\\nuint32_t os_thread_def_stack_##name [stacksz / sizeof(uint32_t)]; \\\nosThreadDef_t os_thread_def_##name = \\\n{ (name), (priority), (stacksz), (os_thread_def_stack_##name) , {0,}, (task_name)}\n#else\n#define osThreadDef(name, priority, instance, stacksz, task_name)  \\\nuint32_t os_thread_def_stack_##name [stacksz / sizeof(uint32_t)]; \\\nosThreadDef_t os_thread_def_##name = \\\n{ (name), (priority), (stacksz), (os_thread_def_stack_##name)}\n#endif\n#endif\n\n/// Access a Thread definition.\n/// \\param         name          name of the thread definition object.\n/// \\note CAN BE CHANGED: The parameter to \\b osThread shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osThread(name)  \\\n&os_thread_def_##name\n\n/// Create a thread and add it to Active Threads and set it to state READY.\n/// \\param[in]     thread_def    thread definition referenced with \\ref osThread.\n/// \\param[in]     argument      pointer that is passed to the thread function as start argument.\n/// \\return thread ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadCreate shall be consistent in every CMSIS-RTOS.\nosThreadId osThreadCreate (osThreadDef_t *thread_def, void *argument);\n\n/// Return the thread ID of the current running thread.\n/// \\return thread ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadGetId shall be consistent in every CMSIS-RTOS.\nosThreadId osThreadGetId (void);\n\nint osGetThreadIntId (void);\n\n/// Terminate execution of a thread and remove it from Active Threads.\n/// \\param[in]     thread_id   thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadTerminate shall be consistent in every CMSIS-RTOS.\nosStatus osThreadTerminate (osThreadId thread_id);\n\n/// Pass control to next thread that is in state \\b READY.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadYield shall be consistent in every CMSIS-RTOS.\nosStatus osThreadYield (void);\n\n/// Change priority of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     priority      new priority value for the thread function.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadSetPriority shall be consistent in every CMSIS-RTOS.\nosStatus osThreadSetPriority (osThreadId thread_id, osPriority priority);\n\n/// Get current priority of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return current priority value of the thread function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadGetPriority shall be consistent in every CMSIS-RTOS.\nosPriority osThreadGetPriority (osThreadId thread_id);\n\n/// Show a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osThreadShow (osThreadId thread_id);\n#endif\n\n///  set the hung check of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     enable        enable/disable the hung check feature of the task\n/// \\param[in]     timeout       hung check  timeout in millisecond\n/// \\return status code that indicates the execution status of the function.\n#if TASK_HUNG_CHECK_ENABLED\nosStatus osThreadSetHungCheck (osThreadId thread_id, int32_t enable, uint32_t timeout);\n#endif\n\n//  ==== Generic Wait Functions ====\n\n/// Wait for Timeout (Time Delay).\n/// \\param[in]     millisec      time delay value\n/// \\return status code that indicates the execution status of the function.\nosStatus osDelay (uint32_t millisec);\n\n#if (defined (osFeature_Wait)  &&  (osFeature_Wait != 0))     // Generic Wait available\n\n/// Wait for Signal, Message, Mail, or Timeout.\n/// \\param[in] millisec          timeout value or 0 in case of no time-out\n/// \\return event that contains signal, message, or mail information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osWait shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osWait (uint32_t millisec);\n\n#endif  // Generic Wait available\n\n\n//  ==== Timer Management Functions ====\n/// Define a Timer object.\n/// \\param         name          name of the timer object.\n/// \\param         function      name of the timer call back function.\n/// \\note CAN BE CHANGED: The parameter to \\b osTimerDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osTimerDef(name, function)  \\\nextern osTimerDef_t os_timer_def_##name\n#else                            // define the object\n#define osTimerDef(name, function)  \\\nuint32_t os_timer_cb_##name[5]; \\\nosTimerDef_t os_timer_def_##name = \\\n{ (function), (os_timer_cb_##name) }\n#endif\n\n/// Access a Timer definition.\n/// \\param         name          name of the timer object.\n/// \\note CAN BE CHANGED: The parameter to \\b osTimer shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osTimer(name) \\\n&os_timer_def_##name\n\n/// Create a timer.\n/// \\param[in]     timer_def     timer object referenced with \\ref osTimer.\n/// \\param[in]     type          osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.\n/// \\param[in]     argument      argument to the timer call back function.\n/// \\return timer ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerCreate shall be consistent in every CMSIS-RTOS.\nosTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument);\n\n/// Start or restart a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\param[in]     millisec      time delay value of the timer.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerStart shall be consistent in every CMSIS-RTOS.\nosStatus osTimerStart (osTimerId timer_id, uint32_t millisec);\n\n/// Stop the timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerStop shall be consistent in every CMSIS-RTOS.\nosStatus osTimerStop (osTimerId timer_id);\n\n/// Delete a timer that was created by \\ref osTimerCreate.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerDelete shall be consistent in every CMSIS-RTOS.\nosStatus osTimerDelete (osTimerId timer_id);\n\n\n//  ==== Signal Management ====\n\n/// Set the specified Signal Flags of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     signals       specifies the signal flags of the thread that should be set.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalSet shall be consistent in every CMSIS-RTOS.\nint32_t osSignalSet (osThreadId thread_id, int32_t signals);\n\n/// Clear the specified Signal Flags of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     signals       specifies the signal flags of the thread that shall be cleared.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalClear shall be consistent in every CMSIS-RTOS.\nint32_t osSignalClear (osThreadId thread_id, int32_t signals);\n\n/// Get Signal Flags status of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalGet shall be consistent in every CMSIS-RTOS.\nint32_t osSignalGet (osThreadId thread_id);\n\n/// Wait for one or more Signal Flags to become signaled for the current \\b RUNNING thread.\n/// \\param[in]     signals       wait until all specified signal flags set or 0 for any single signal flag.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return event flag information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalWait shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osSignalWait (int32_t signals, uint32_t millisec);\n\n\n//  ==== Mutex Management ====\n\n/// Define a Mutex.\n/// \\param         name          name of the mutex object.\n/// \\note CAN BE CHANGED: The parameter to \\b osMutexDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMutexDef(name)  \\\nextern osMutexDef_t os_mutex_def_##name\n#else                            // define the object\n#define osMutexDef(name)  \\\nuint32_t os_mutex_cb_##name[3]; \\\nosMutexDef_t os_mutex_def_##name = { (os_mutex_cb_##name) }\n#endif\n\n/// Access a Mutex definition.\n/// \\param         name          name of the mutex object.\n/// \\note CAN BE CHANGED: The parameter to \\b osMutex shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMutex(name)  \\\n&os_mutex_def_##name\n\n/// Create and Initialize a Mutex object.\n/// \\param[in]     mutex_def     mutex definition referenced with \\ref osMutex.\n/// \\return mutex ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexCreate shall be consistent in every CMSIS-RTOS.\nosMutexId osMutexCreate (const osMutexDef_t *mutex_def);\n\n/// Wait until a Mutex becomes available.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexWait shall be consistent in every CMSIS-RTOS.\nosStatus osMutexWait (osMutexId mutex_id, uint32_t millisec);\n\n/// Release a Mutex that was obtained by \\ref osMutexWait.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexRelease shall be consistent in every CMSIS-RTOS.\nosStatus osMutexRelease (osMutexId mutex_id);\n\n/// Delete a Mutex that was created by \\ref osMutexCreate.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexDelete shall be consistent in every CMSIS-RTOS.\nosStatus osMutexDelete (osMutexId mutex_id);\n\n/// Get owner thread of a Mutex object.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return thread id or NULL\n#if (osCMSIS < 0x20000U)\nosThreadId osMutexGetOwner (osMutexId mutex_id);\n#endif\n\n\n//  ==== Semaphore Management Functions ====\n\n#if (defined (osFeature_Semaphore)  &&  (osFeature_Semaphore != 0))     // Semaphore available\n\n/// Define a Semaphore object.\n/// \\param         name          name of the semaphore object.\n/// \\note CAN BE CHANGED: The parameter to \\b osSemaphoreDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osSemaphoreDef(name)  \\\nextern osSemaphoreDef_t os_semaphore_def_##name\n#else                            // define the object\n#define osSemaphoreDef(name)  \\\nuint32_t os_semaphore_cb_##name[2]; \\\nosSemaphoreDef_t os_semaphore_def_##name = { (os_semaphore_cb_##name) }\n#endif\n\n/// Access a Semaphore definition.\n/// \\param         name          name of the semaphore object.\n/// \\note CAN BE CHANGED: The parameter to \\b osSemaphore shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osSemaphore(name)  \\\n&os_semaphore_def_##name\n\n/// Create and Initialize a Semaphore object used for managing resources.\n/// \\param[in]     semaphore_def semaphore definition referenced with \\ref osSemaphore.\n/// \\param[in]     count         number of available resources.\n/// \\return semaphore ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreCreate shall be consistent in every CMSIS-RTOS.\nosSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count);\n\n/// Wait until a Semaphore token becomes available.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return number of available tokens, or -1 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreWait shall be consistent in every CMSIS-RTOS.\nint32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);\n\n/// Release a Semaphore token.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreRelease shall be consistent in every CMSIS-RTOS.\nosStatus osSemaphoreRelease (osSemaphoreId semaphore_id);\n\n/// Delete a Semaphore that was created by \\ref osSemaphoreCreate.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreDelete shall be consistent in every CMSIS-RTOS.\nosStatus osSemaphoreDelete (osSemaphoreId semaphore_id);\n\n#endif     // Semaphore available\n\n\n//  ==== Memory Pool Management Functions ====\n\n#if (defined (osFeature_Pool)  &&  (osFeature_Pool != 0))  // Memory Pool Management available\n\n/// \\brief Define a Memory Pool.\n/// \\param         name          name of the memory pool.\n/// \\param         no            maximum number of blocks (objects) in the memory pool.\n/// \\param         type          data type of a single block (object).\n/// \\note CAN BE CHANGED: The parameter to \\b osPoolDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osPoolDef(name, no, type)   \\\nextern osPoolDef_t os_pool_def_##name\n#else                            // define the object\n#define osPoolDef(name, no, type)   \\\nuint32_t os_pool_m_##name[3+((sizeof(type)+3)/4)*(no)]; \\\nosPoolDef_t os_pool_def_##name = \\\n{ (no), sizeof(type), (os_pool_m_##name) }\n#endif\n\n/// \\brief Access a Memory Pool definition.\n/// \\param         name          name of the memory pool\n/// \\note CAN BE CHANGED: The parameter to \\b osPool shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osPool(name) \\\n&os_pool_def_##name\n\n/// Create and Initialize a memory pool.\n/// \\param[in]     pool_def      memory pool definition referenced with \\ref osPool.\n/// \\return memory pool ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolCreate shall be consistent in every CMSIS-RTOS.\nosPoolId osPoolCreate (const osPoolDef_t *pool_def);\n\n/// Allocate a memory block from a memory pool.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osPoolAlloc (osPoolId pool_id);\n\n/// Allocate a memory block from a memory pool and set memory block to zero.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolCAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osPoolCAlloc (osPoolId pool_id);\n\n/// Return an allocated memory block back to a specific memory pool.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\param[in]     block         address of the allocated memory block that is returned to the memory pool.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolFree shall be consistent in every CMSIS-RTOS.\nosStatus osPoolFree (osPoolId pool_id, void *block);\n\n#endif   // Memory Pool Management available\n\n\n//  ==== Message Queue Management Functions ====\n\n#if (defined (osFeature_MessageQ)  &&  (osFeature_MessageQ != 0))     // Message Queues available\n\n/// \\brief Create a Message Queue Definition.\n/// \\param         name          name of the queue.\n/// \\param         queue_sz      maximum number of messages in the queue.\n/// \\param         type          data type of a single message element (for debugger).\n/// \\note CAN BE CHANGED: The parameter to \\b osMessageQDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMessageQDef(name, queue_sz, type)   \\\nextern osMessageQDef_t os_messageQ_def_##name\n#else                            // define the object\n#define osMessageQDef(name, queue_sz, type)   \\\nuint32_t os_messageQ_q_##name[4+(queue_sz)]; \\\nosMessageQDef_t os_messageQ_def_##name = \\\n{ (queue_sz), (os_messageQ_q_##name) }\n#endif\n\n/// \\brief Access a Message Queue Definition.\n/// \\param         name          name of the queue\n/// \\note CAN BE CHANGED: The parameter to \\b osMessageQ shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMessageQ(name) \\\n&os_messageQ_def_##name\n\n/// Create and Initialize a Message Queue.\n/// \\param[in]     queue_def     queue definition referenced with \\ref osMessageQ.\n/// \\param[in]     thread_id     thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return message queue ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessageCreate shall be consistent in every CMSIS-RTOS.\nosMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id);\n\n/// Put a Message to a Queue.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in]     info          message information.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessagePut shall be consistent in every CMSIS-RTOS.\nosStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec);\n\n/// Get a Message or Wait for a Message from a Queue.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return event information that includes status code.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessageGet shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);\n\n/// Get space in the Message Queue.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\return the size of the space.\nuint32_t osMessageGetSpace (osMessageQId queue_id);\n#endif     // Message Queues available\n\n\n//  ==== Mail Queue Management Functions ====\n\n#if (defined (osFeature_MailQ)  &&  (osFeature_MailQ != 0))     // Mail Queues available\n\n/// \\brief Create a Mail Queue Definition.\n/// \\param         name          name of the queue\n/// \\param         queue_sz      maximum number of messages in queue\n/// \\param         type          data type of a single message element\n/// \\note CAN BE CHANGED: The parameter to \\b osMailQDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMailQDef(name, queue_sz, type) \\\nextern osMailQDef_t os_mailQ_def_##name\n#else                            // define the object\n#define osMailQDef(name, queue_sz, type) \\\nuint32_t os_mailQ_q_##name[4+(queue_sz)]; \\\nuint32_t os_mailQ_m_##name[3+((sizeof(type)+3)/4)*(queue_sz)]; \\\nvoid *   os_mailQ_p_##name[2] = { (os_mailQ_q_##name), os_mailQ_m_##name }; \\\nosMailQDef_t os_mailQ_def_##name =  \\\n{ (queue_sz), sizeof(type), (os_mailQ_p_##name) }\n#endif\n\n/// \\brief Access a Mail Queue Definition.\n/// \\param         name          name of the queue\n/// \\note CAN BE CHANGED: The parameter to \\b osMailQ shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMailQ(name)  \\\n&os_mailQ_def_##name\n\n/// Create and Initialize mail queue.\n/// \\param[in]     queue_def     reference to the mail queue definition obtain with \\ref osMailQ\n/// \\param[in]     thread_id     thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return mail queue ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailCreate shall be consistent in every CMSIS-RTOS.\nosMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id);\n\n/// Allocate a memory block from a mail.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osMailAlloc (osMailQId queue_id, uint32_t millisec);\n\n/// Allocate a memory block from a mail and set memory block to zero.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailCAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osMailCAlloc (osMailQId queue_id, uint32_t millisec);\n\n/// Put a mail to a queue.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     mail          memory block previously allocated with \\ref osMailAlloc or \\ref osMailCAlloc.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailPut shall be consistent in every CMSIS-RTOS.\nosStatus osMailPut (osMailQId queue_id, void *mail);\n\n/// Get a mail from a queue.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return event that contains mail information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailGet shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osMailGet (osMailQId queue_id, uint32_t millisec);\n\n/// Free a memory block from a mail.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     mail          pointer to the memory block that was obtained with \\ref osMailGet.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailFree shall be consistent in every CMSIS-RTOS.\nosStatus osMailFree (osMailQId queue_id, void *mail);\n\n#endif  // Mail Queues available\n\nvoid os_error_str (const char *fmt, ...);\n\n#ifdef  __cplusplus\n}\n#endif\n\n#endif  // _CMSIS_OS_H\n"
  },
  {
    "path": "include/rtos/rtx/os_tcb.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef OS_TCB_H\n#define OS_TCB_H\n\n/* Types */\ntypedef char               S8;\ntypedef unsigned char      U8;\ntypedef short              S16;\ntypedef unsigned short     U16;\ntypedef int                S32;\ntypedef unsigned int       U32;\ntypedef long long          S64;\ntypedef unsigned long long U64;\ntypedef unsigned char      BIT;\ntypedef unsigned int       BOOL;\ntypedef void               (*FUNCP)(void);\n\ntypedef struct OS_TCB {\n  /* General part: identical for all implementations.                        */\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     state;                   /* Task state                              */\n  U8     prio;                    /* Execution priority                      */\n  U8     task_id;                 /* Task ID value for optimized TCB access  */\n  struct OS_TCB *p_lnk;           /* Link pointer for ready/sem. wait list   */\n  struct OS_TCB *p_rlnk;          /* Link pointer for sem./mbx lst backwards */\n  struct OS_TCB *p_dlnk;          /* Link pointer for delay list             */\n  struct OS_TCB *p_blnk;          /* Link pointer for delay list backwards   */\n  U16    delta_time;              /* Time until time out                     */\n  U16    interval_time;           /* Time interval for periodic waits        */\n  U16    events;                  /* Event flags                             */\n  U16    waits;                   /* Wait flags                              */\n  void   **msg;                   /* Direct message passing when task waits  */\n\n  /* Hardware dependant part: specific for CM processor                      */\n  U8     stack_frame;             /* Stack frame: 0=Basic, 1=Extended        */\n  U8     reserved1;\n  U16    reserved2;\n  U32    priv_stack;              /* Private stack size in bytes             */\n  U32    tsk_stack;               /* Current task Stack pointer (R13)        */\n  U32    *stack;                  /* Pointer to Task Stack memory block      */\n\n  /* Library dependant part                                                   */\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n /* A memory space for arm standard library. */\n  U32 std_libspace[96/4];\n#endif\n#if __RTX_CPU_STATISTICS__\n  U32    swap_in_time;            /* the task schedule in time              */\n  U32    swap_out_time;           /* the task schedule out time             */\n  U32    rtime;                   /* the task runing time after startup     */\n  U8     *name;\n#if TASK_HUNG_CHECK_ENABLED\n  U8     hung_check;\n  U32    hung_check_timeout;\n#endif\n#endif /* __RTX_CPU_STATISTICS__*/\n\n  /* Task entry point used for uVision debugger                              */\n  FUNCP  ptask;                   /* Task entry address                      */\n} *P_TCB;\n\n#endif\n"
  },
  {
    "path": "include/rtos/rtx5/cmsis_os.h",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * ----------------------------------------------------------------------\n *\n * $Date:        18. June 2018\n * $Revision:    V2.1.3\n *\n * Project:      CMSIS-RTOS API\n * Title:        cmsis_os.h template header file\n *\n * Version 0.02\n *    Initial Proposal Phase\n * Version 0.03\n *    osKernelStart added, optional feature: main started as thread\n *    osSemaphores have standard behavior\n *    osTimerCreate does not start the timer, added osTimerStart\n *    osThreadPass is renamed to osThreadYield\n * Version 1.01\n *    Support for C++ interface\n *     - const attribute removed from the osXxxxDef_t typedefs\n *     - const attribute added to the osXxxxDef macros\n *    Added: osTimerDelete, osMutexDelete, osSemaphoreDelete\n *    Added: osKernelInitialize\n * Version 1.02\n *    Control functions for short timeouts in microsecond resolution:\n *    Added: osKernelSysTick, osKernelSysTickFrequency, osKernelSysTickMicroSec\n *    Removed: osSignalGet\n * Version 2.0.0\n *    OS objects creation without macros (dynamic creation and resource allocation):\n *     - added: osXxxxNew functions which replace osXxxxCreate\n *     - added: osXxxxAttr_t structures\n *     - deprecated: osXxxxCreate functions, osXxxxDef_t structures\n *     - deprecated: osXxxxDef and osXxxx macros\n *    osStatus codes simplified and renamed to osStatus_t\n *    osEvent return structure deprecated\n *    Kernel:\n *     - added: osKernelInfo_t and osKernelGetInfo\n *     - added: osKernelState_t and osKernelGetState (replaces osKernelRunning)\n *     - added: osKernelLock, osKernelUnlock\n *     - added: osKernelSuspend, osKernelResume\n *     - added: osKernelGetTickCount, osKernelGetTickFreq\n *     - renamed osKernelSysTick to osKernelGetSysTimerCount\n *     - replaced osKernelSysTickFrequency with osKernelGetSysTimerFreq\n *     - deprecated osKernelSysTickMicroSec\n *    Thread:\n *     - extended number of thread priorities\n *     - renamed osPrioriry to osPrioriry_t\n *     - replaced osThreadCreate with osThreadNew\n *     - added: osThreadGetName\n *     - added: osThreadState_t and osThreadGetState\n *     - added: osThreadGetStackSize, osThreadGetStackSpace\n *     - added: osThreadSuspend, osThreadResume\n *     - added: osThreadJoin, osThreadDetach, osThreadExit\n *     - added: osThreadGetCount, osThreadEnumerate\n *     - added: Thread Flags (moved from Signals)\n *    Signals:\n *     - renamed osSignals to osThreadFlags (moved to Thread Flags)\n *     - changed return value of Set/Clear/Wait functions\n *     - Clear function limited to current running thread\n *     - extended Wait function (options)\n *     - added: osThreadFlagsGet\n *    Event Flags:\n *     - added new independent object for handling Event Flags\n *    Delay and Wait functions:\n *     - added: osDelayUntil\n *     - deprecated: osWait\n *    Timer:\n *     - replaced osTimerCreate with osTimerNew\n *     - added: osTimerGetName, osTimerIsRunning\n *    Mutex:\n *     - extended: attributes (Recursive, Priority Inherit, Robust)\n *     - replaced osMutexCreate with osMutexNew\n *     - renamed osMutexWait to osMutexAcquire\n *     - added: osMutexGetName, osMutexGetOwner\n *    Semaphore:\n *     - extended: maximum and initial token count\n *     - replaced osSemaphoreCreate with osSemaphoreNew\n *     - renamed osSemaphoreWait to osSemaphoreAcquire (changed return value)\n *     - added: osSemaphoreGetName, osSemaphoreGetCount\n *    Memory Pool:\n *     - using osMemoryPool prefix instead of osPool\n *     - replaced osPoolCreate with osMemoryPoolNew\n *     - extended osMemoryPoolAlloc (timeout)\n *     - added: osMemoryPoolGetName\n *     - added: osMemoryPoolGetCapacity, osMemoryPoolGetBlockSize\n *     - added: osMemoryPoolGetCount, osMemoryPoolGetSpace\n *     - added: osMemoryPoolDelete\n *     - deprecated: osPoolCAlloc\n *    Message Queue:\n *     - extended: fixed size message instead of a single 32-bit value\n *     - using osMessageQueue prefix instead of osMessage\n *     - replaced osMessageCreate with osMessageQueueNew\n *     - updated: osMessageQueuePut, osMessageQueueGet\n *     - added: osMessageQueueGetName\n *     - added: osMessageQueueGetCapacity, osMessageQueueGetMsgSize\n *     - added: osMessageQueueGetCount, osMessageQueueGetSpace\n *     - added: osMessageQueueReset, osMessageQueueDelete\n *    Mail Queue:\n *     - deprecated (superseded by extended Message Queue functionality)\n * Version 2.1.0\n *    Support for critical and uncritical sections (nesting safe):\n *    - updated: osKernelLock, osKernelUnlock\n *    - added: osKernelRestoreLock\n *    Updated Thread and Event Flags:\n *    - changed flags parameter and return type from int32_t to uint32_t\n * Version 2.1.1\n *    Additional functions allowed to be called from Interrupt Service Routines:\n *    - osKernelGetTickCount, osKernelGetTickFreq\n *    Changed Kernel Tick type to uint32_t:\n *    - updated: osKernelGetTickCount, osDelayUntil\n * Version 2.1.2\n *    Additional functions allowed to be called from Interrupt Service Routines:\n *    - osKernelGetInfo, osKernelGetState\n * Version 2.1.3\n *    Additional functions allowed to be called from Interrupt Service Routines:\n *    - osThreadGetId\n *---------------------------------------------------------------------------*/\n\n#ifndef CMSIS_OS_H_\n#define CMSIS_OS_H_\n\n/// \\b osCMSIS identifies the CMSIS-RTOS API version.\n#define osCMSIS             0x20001U    ///< API version (main[31:16].sub[15:0])\n\n/// \\note CAN BE CHANGED: \\b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number.\n#define osCMSIS_KERNEL      0x10000U    ///< RTOS identification and version (main[31:16].sub[15:0])\n\n/// \\note CAN BE CHANGED: \\b osKernelSystemId identifies the underlying RTOS kernel.\n#define osKernelSystemId \"KERNEL V1.0\"  ///< RTOS identification string\n\n/// \\note CAN BE CHANGED: \\b osFeature_xxx identifies RTOS features.\n#define osFeature_MainThread  0         ///< main thread      1=main can be thread, 0=not available\n#define osFeature_Signals     16U       ///< maximum number of Signal Flags available per thread\n#define osFeature_Semaphore   65535U    ///< maximum count for \\ref osSemaphoreCreate function\n#define osFeature_Wait        0         ///< osWait function: 1=available, 0=not available\n#define osFeature_SysTick     1         ///< osKernelSysTick functions: 1=available, 0=not available\n#define osFeature_Pool        1         ///< Memory Pools:    1=available, 0=not available\n#define osFeature_MessageQ    1         ///< Message Queues:  1=available, 0=not available\n#define osFeature_MailQ       1         ///< Mail Queues:     1=available, 0=not available\n\n#if (osCMSIS >= 0x20000U)\n#include \"cmsis_os2.h\"\n#else\n#include \n#include \n#endif\n\n#ifdef  __cplusplus\nextern \"C\"\n{\n#endif\n\n\n// ==== Enumerations, structures, defines ====\n\n/// Priority values.\n#if (osCMSIS < 0x20000U)\ntypedef enum {\n  osPriorityIdle          = -3,         ///< Priority: idle (lowest)\n  osPriorityLow           = -2,         ///< Priority: low\n  osPriorityBelowNormal   = -1,         ///< Priority: below normal\n  osPriorityNormal        =  0,         ///< Priority: normal (default)\n  osPriorityAboveNormal   = +1,         ///< Priority: above normal\n  osPriorityHigh          = +2,         ///< Priority: high\n  osPriorityRealtime      = +3,         ///< Priority: realtime (highest)\n  osPriorityError         = 0x84,       ///< System cannot determine priority or illegal priority.\n  osPriorityReserved      = 0x7FFFFFFF  ///< Prevents enum down-size compiler optimization.\n} osPriority;\n#else\n#define osPriority osPriority_t\n#endif\n\n/// Entry point of a thread.\ntypedef void (*os_pthread) (void const *argument);\n\n/// Entry point of a timer call back function.\ntypedef void (*os_ptimer) (void const *argument);\n\n/// Timer type.\n#if (osCMSIS < 0x20000U)\ntypedef enum {\n  osTimerOnce             = 0,          ///< One-shot timer.\n  osTimerPeriodic         = 1           ///< Repeating timer.\n} os_timer_type;\n#else\n#define os_timer_type osTimerType_t\n#endif\n\n/// Timeout value.\n#define osWaitForever       0xFFFFFFFFU ///< Wait forever timeout value.\n\n/// Status code values returned by CMSIS-RTOS functions.\n#if (osCMSIS < 0x20000U)\ntypedef enum {\n  osOK                    =    0,       ///< Function completed; no error or event occurred.\n  osEventSignal           = 0x08,       ///< Function completed; signal event occurred.\n  osEventMessage          = 0x10,       ///< Function completed; message event occurred.\n  osEventMail             = 0x20,       ///< Function completed; mail event occurred.\n  osEventTimeout          = 0x40,       ///< Function completed; timeout occurred.\n  osErrorParameter        = 0x80,       ///< Parameter error: a mandatory parameter was missing or specified an incorrect object.\n  osErrorResource         = 0x81,       ///< Resource not available: a specified resource was not available.\n  osErrorTimeoutResource  = 0xC1,       ///< Resource not available within given time: a specified resource was not available within the timeout period.\n  osErrorISR              = 0x82,       ///< Not allowed in ISR context: the function cannot be called from interrupt service routines.\n  osErrorISRRecursive     = 0x83,       ///< Function called multiple times from ISR with same object.\n  osErrorPriority         = 0x84,       ///< System cannot determine priority or thread has illegal priority.\n  osErrorNoMemory         = 0x85,       ///< System is out of memory: it was impossible to allocate or reserve memory for the operation.\n  osErrorValue            = 0x86,       ///< Value of a parameter is out of range.\n  osErrorOS               = 0xFF,       ///< Unspecified RTOS error: run-time error but no other error message fits.\n  osStatusReserved        = 0x7FFFFFFF  ///< Prevents enum down-size compiler optimization.\n} osStatus;\n#else\ntypedef osStatus_t              osStatus;\n#define osEventSignal           (0x08)\n#define osEventMessage          (0x10)\n#define osEventMail             (0x20)\n#define osEventTimeout          (0x40)\n#define osErrorOS               osError\n#define osErrorTimeoutResource  osErrorTimeout\n#define osErrorISRRecursive     (-126)\n#define osErrorValue            (-127)\n#define osErrorPriority         (-128)\n#define os_status_reserved        osStatusReserved\n#endif\n\n\n// >>> the following data type definitions may be adapted towards a specific RTOS\n\n/// Thread ID identifies the thread.\n/// \\note CAN BE CHANGED: \\b implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef void *osThreadId;\n#else\n#define osThreadId osThreadId_t\n#endif\n\n/// Timer ID identifies the timer.\n/// \\note CAN BE CHANGED: \\b implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef void *osTimerId;\n#else\n#define osTimerId osTimerId_t\n#endif\n\n/// Mutex ID identifies the mutex.\n/// \\note CAN BE CHANGED: \\b implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef void *osMutexId;\n#else\n#define osMutexId osMutexId_t\n#endif\n\n/// Semaphore ID identifies the semaphore.\n/// \\note CAN BE CHANGED: \\b implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef void *osSemaphoreId;\n#else\n#define osSemaphoreId osSemaphoreId_t\n#endif\n\n/// Pool ID identifies the memory pool.\n/// \\note CAN BE CHANGED: \\b implementation specific in every CMSIS-RTOS.\ntypedef void *osPoolId;\n\n/// Message ID identifies the message queue.\n/// \\note CAN BE CHANGED: \\b implementation specific in every CMSIS-RTOS.\ntypedef void *osMessageQId;\n\n/// Mail ID identifies the mail queue.\n/// \\note CAN BE CHANGED: \\b implementation specific in every CMSIS-RTOS.\ntypedef void *osMailQId;\n\n\n/// Thread Definition structure contains startup information of a thread.\n/// \\note CAN BE CHANGED: \\b os_thread_def is implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_thread_def {\n  os_pthread                 pthread;   ///< start address of thread function\n  osPriority               tpriority;   ///< initial thread priority\n  uint32_t                 instances;   ///< maximum number of instances of that thread function\n  uint32_t                 stacksize;   ///< stack size requirements in bytes; 0 is default stack size\n} osThreadDef_t;\n#else\ntypedef struct os_thread_def {\n  os_pthread                 pthread;   ///< start address of thread function\n  osThreadAttr_t                attr;   ///< thread attributes\n} osThreadDef_t;\n#endif\n\n/// Timer Definition structure contains timer parameters.\n/// \\note CAN BE CHANGED: \\b os_timer_def is implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_timer_def {\n  os_ptimer                   ptimer;   ///< start address of a timer function\n} osTimerDef_t;\n#else\ntypedef struct os_timer_def {\n  os_ptimer                   ptimer;   ///< start address of a timer function\n  osTimerAttr_t                 attr;   ///< timer attributes\n} osTimerDef_t;\n#endif\n\n/// Mutex Definition structure contains setup information for a mutex.\n/// \\note CAN BE CHANGED: \\b os_mutex_def is implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_mutex_def {\n  uint32_t                     dummy;   ///< dummy value\n} osMutexDef_t;\n#else\n#define osMutexDef_t osMutexAttr_t\n#endif\n\n/// Semaphore Definition structure contains setup information for a semaphore.\n/// \\note CAN BE CHANGED: \\b os_semaphore_def is implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_semaphore_def {\n  uint32_t                     dummy;   ///< dummy value\n} osSemaphoreDef_t;\n#else\n#define osSemaphoreDef_t osSemaphoreAttr_t\n#endif\n\n/// Definition structure for memory block allocation.\n/// \\note CAN BE CHANGED: \\b os_pool_def is implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_pool_def {\n  uint32_t                   pool_sz;   ///< number of items (elements) in the pool\n  uint32_t                   item_sz;   ///< size of an item\n  void                         *pool;   ///< pointer to memory for pool\n} osPoolDef_t;\n#else\ntypedef struct os_pool_def {\n  uint32_t                   pool_sz;   ///< number of items (elements) in the pool\n  uint32_t                   item_sz;   ///< size of an item\n  osMemoryPoolAttr_t            attr;   ///< memory pool attributes\n} osPoolDef_t;\n#endif\n\n/// Definition structure for message queue.\n/// \\note CAN BE CHANGED: \\b os_messageQ_def is implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_messageQ_def {\n  uint32_t                  queue_sz;   ///< number of elements in the queue\n  void                         *pool;   ///< memory array for messages\n} osMessageQDef_t;\n#else\ntypedef struct os_messageQ_def {\n  uint32_t                  queue_sz;   ///< number of elements in the queue\n  osMessageQueueAttr_t          attr;   ///< message queue attributes\n} osMessageQDef_t;\n#endif\n\n/// Definition structure for mail queue.\n/// \\note CAN BE CHANGED: \\b os_mailQ_def is implementation specific in every CMSIS-RTOS.\n#if (osCMSIS < 0x20000U)\ntypedef struct os_mailQ_def {\n  uint32_t                  queue_sz;   ///< number of elements in the queue\n  uint32_t                   item_sz;   ///< size of an item\n  void                         *pool;   ///< memory array for mail\n} osMailQDef_t;\n#else\ntypedef struct os_mailQ_def {\n  uint32_t                  queue_sz;   ///< number of elements in the queue\n  uint32_t                   item_sz;   ///< size of an item\n  void                         *mail;   ///< pointer to mail\n  osMemoryPoolAttr_t         mp_attr;   ///< memory pool attributes\n  osMessageQueueAttr_t       mq_attr;   ///< message queue attributes\n} osMailQDef_t;\n#endif\n\n\n/// Event structure contains detailed information about an event.\ntypedef struct {\n  osStatus                    status;   ///< status code: event or error information\n  union {\n    uint32_t                       v;   ///< message as 32-bit value\n    void                          *p;   ///< message or mail as void pointer\n    int32_t                  signals;   ///< signal flags\n  } value;                              ///< event value\n  union {\n    osMailQId                mail_id;   ///< mail id obtained by \\ref osMailCreate\n    osMessageQId          message_id;   ///< message id obtained by \\ref osMessageCreate\n  } def;                                ///< event definition\n} osEvent;\n\n\n//  ==== Kernel Management Functions ====\n\n/// Initialize the RTOS Kernel for creating objects.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osKernelInitialize (void);\n#endif\n\n/// Start the RTOS Kernel scheduler.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osKernelStart (void);\n#endif\n\n/// Check if the RTOS kernel is already started.\n/// \\return 0 RTOS is not started, 1 RTOS is started.\n#if (osCMSIS < 0x20000U)\nint32_t osKernelRunning(void);\n#endif\n\n#if (defined(osFeature_SysTick) && (osFeature_SysTick != 0))  // System Timer available\n\n/// Get the RTOS kernel system timer counter.\n/// \\return RTOS kernel system timer as 32-bit value\n#if (osCMSIS < 0x20000U)\nuint32_t osKernelSysTick (void);\n#else\n#define  osKernelSysTick osKernelGetSysTimerCount\n#endif\n\n/// The RTOS kernel system timer frequency in Hz.\n/// \\note Reflects the system timer setting and is typically defined in a configuration file.\n#if (osCMSIS < 0x20000U)\n#define osKernelSysTickFrequency 100000000\n#endif\n\n/// Convert a microseconds value to a RTOS kernel system timer value.\n/// \\param         microsec     time value in microseconds.\n/// \\return time value normalized to the \\ref osKernelSysTickFrequency\n#if (osCMSIS < 0x20000U)\n#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec * (osKernelSysTickFrequency)) / 1000000)\n#else\n#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec *  osKernelGetSysTimerFreq()) / 1000000)\n#endif\n\n#endif  // System Timer available\n\n\n//  ==== Thread Management Functions ====\n\n/// Create a Thread Definition with function, priority, and stack requirements.\n/// \\param         name          name of the thread function.\n/// \\param         priority      initial priority of the thread function.\n/// \\param         instances     number of possible thread instances.\n/// \\param         stacksz       stack size (in bytes) requirements for the thread function.\n/// \\note CAN BE CHANGED: The parameters to \\b osThreadDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osThreadDef(name, priority, instances, stacksz) \\\nextern const osThreadDef_t os_thread_def_##name\n#else                            // define the object\n#if (osCMSIS < 0x20000U)\n#define osThreadDef(name, priority, instances, stacksz) \\\nconst osThreadDef_t os_thread_def_##name = \\\n{ (name), (priority), (instances), (stacksz) }\n#else\n#define osThreadDef(name, priority, instances, stacksz, task_name) \\\nuint64_t os_thread_def_stack_##name [(8*((stacksz+7)/8)) / sizeof(uint64_t)]; \\\nconst osThreadDef_t os_thread_def_##name = \\\n{ (name), \\\n  { task_name, osThreadDetached, NULL, 0U, os_thread_def_stack_##name, 8*((stacksz+7)/8), (priority), 0U, 0U } }\n#endif\n#endif\n\n/// Access a Thread definition.\n/// \\param         name          name of the thread definition object.\n/// \\note CAN BE CHANGED: The parameter to \\b osThread shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osThread(name) \\\n&os_thread_def_##name\n\n/// Create a thread and add it to Active Threads and set it to state READY.\n/// \\param[in]     thread_def    thread definition referenced with \\ref osThread.\n/// \\param[in]     argument      pointer that is passed to the thread function as start argument.\n/// \\return thread ID for reference by other functions or NULL in case of error.\nosThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument);\n\n/// Return the thread ID of the current running thread.\n/// \\return thread ID for reference by other functions or NULL in case of error.\n#if (osCMSIS < 0x20000U)\nosThreadId osThreadGetId (void);\n#endif\n\n/// Change priority of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     priority      new priority value for the thread function.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osThreadSetPriority (osThreadId thread_id, osPriority priority);\n#endif\n\n/// Get current priority of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return current priority value of the specified thread.\n#if (osCMSIS < 0x20000U)\nosPriority osThreadGetPriority (osThreadId thread_id);\n#endif\n\n/// Pass control to next thread that is in state \\b READY.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osThreadYield (void);\n#endif\n\n/// Terminate execution of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osThreadTerminate (osThreadId thread_id);\n#endif\n\n\n//  ==== Signal Management ====\n\n/// Set the specified Signal Flags of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     signals       specifies the signal flags of the thread that should be set.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\nint32_t osSignalSet (osThreadId thread_id, int32_t signals);\n\n/// Clear the specified Signal Flags of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     signals       specifies the signal flags of the thread that shall be cleared.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters or call from ISR.\nint32_t osSignalClear (osThreadId thread_id, int32_t signals);\n\n/// Wait for one or more Signal Flags to become signaled for the current \\b RUNNING thread.\n/// \\param[in]     signals       wait until all specified signal flags set or 0 for any single signal flag.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return event flag information or error code.\nosEvent osSignalWait (int32_t signals, uint32_t millisec);\n\n\n//  ==== Generic Wait Functions ====\n\n/// Wait for Timeout (Time Delay).\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue \"time delay\" value\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osDelay (uint32_t millisec);\n#endif\n\n#if (defined (osFeature_Wait) && (osFeature_Wait != 0))  // Generic Wait available\n\n/// Wait for Signal, Message, Mail, or Timeout.\n/// \\param[in] millisec          \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out\n/// \\return event that contains signal, message, or mail information or error code.\nosEvent osWait (uint32_t millisec);\n\n#endif  // Generic Wait available\n\n\n//  ==== Timer Management Functions ====\n\n/// Define a Timer object.\n/// \\param         name          name of the timer object.\n/// \\param         function      name of the timer call back function.\n/// \\note CAN BE CHANGED: The parameter to \\b osTimerDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osTimerDef(name, function) \\\nextern const osTimerDef_t os_timer_def_##name\n#else                            // define the object\n#if (osCMSIS < 0x20000U)\n#define osTimerDef(name, function) \\\nconst osTimerDef_t os_timer_def_##name = { (function) }\n#else\n#define osTimerDef(name, function) \\\nconst osTimerDef_t os_timer_def_##name = \\\n{ (function), { NULL, 0U, NULL, 0U } }\n#endif\n#endif\n\n/// Access a Timer definition.\n/// \\param         name          name of the timer object.\n/// \\note CAN BE CHANGED: The parameter to \\b osTimer shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osTimer(name) \\\n&os_timer_def_##name\n\n/// Create and Initialize a timer.\n/// \\param[in]     timer_def     timer object referenced with \\ref osTimer.\n/// \\param[in]     type          osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.\n/// \\param[in]     argument      argument to the timer call back function.\n/// \\return timer ID for reference by other functions or NULL in case of error.\nosTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument);\n\n/// Start or restart a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue \"time delay\" value of the timer.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osTimerStart (osTimerId timer_id, uint32_t millisec);\n#endif\n\n/// Stop a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osTimerStop (osTimerId timer_id);\n#endif\n\n/// Delete a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osTimerDelete (osTimerId timer_id);\n#endif\n\n\n//  ==== Mutex Management Functions ====\n\n/// Define a Mutex.\n/// \\param         name          name of the mutex object.\n/// \\note CAN BE CHANGED: The parameter to \\b osMutexDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMutexDef(name) \\\nextern const osMutexDef_t os_mutex_def_##name\n#else                            // define the object\n#if (osCMSIS < 0x20000U)\n#define osMutexDef(name) \\\nconst osMutexDef_t os_mutex_def_##name = { 0 }\n#else\n#define osMutexDef(name) \\\nconst osMutexDef_t os_mutex_def_##name = \\\n{ NULL, osMutexRecursive | osMutexPrioInherit | osMutexRobust, NULL, 0U }\n#endif\n#endif\n\n/// Access a Mutex definition.\n/// \\param         name          name of the mutex object.\n/// \\note CAN BE CHANGED: The parameter to \\b osMutex shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMutex(name) \\\n&os_mutex_def_##name\n\n/// Create and Initialize a Mutex object.\n/// \\param[in]     mutex_def     mutex definition referenced with \\ref osMutex.\n/// \\return mutex ID for reference by other functions or NULL in case of error.\nosMutexId osMutexCreate (const osMutexDef_t *mutex_def);\n\n/// Wait until a Mutex becomes available.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osMutexWait (osMutexId mutex_id, uint32_t millisec);\n#else\n#define  osMutexWait osMutexAcquire\n#endif\n\n/// Release a Mutex that was obtained by \\ref osMutexWait.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osMutexRelease (osMutexId mutex_id);\n#endif\n\n/// Delete a Mutex object.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osMutexDelete (osMutexId mutex_id);\n#endif\n\n\n//  ==== Semaphore Management Functions ====\n\n#if (defined (osFeature_Semaphore) && (osFeature_Semaphore != 0U))  // Semaphore available\n\n/// Define a Semaphore object.\n/// \\param         name          name of the semaphore object.\n/// \\note CAN BE CHANGED: The parameter to \\b osSemaphoreDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osSemaphoreDef(name) \\\nextern const osSemaphoreDef_t os_semaphore_def_##name\n#else                            // define the object\n#if (osCMSIS < 0x20000U)\n#define osSemaphoreDef(name) \\\nconst osSemaphoreDef_t os_semaphore_def_##name = { 0 }\n#else\n#define osSemaphoreDef(name) \\\nconst osSemaphoreDef_t os_semaphore_def_##name = \\\n{ NULL, 0U, NULL, 0U }\n#endif\n#endif\n\n/// Access a Semaphore definition.\n/// \\param         name          name of the semaphore object.\n/// \\note CAN BE CHANGED: The parameter to \\b osSemaphore shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osSemaphore(name) \\\n&os_semaphore_def_##name\n\n/// Create and Initialize a Semaphore object.\n/// \\param[in]     semaphore_def semaphore definition referenced with \\ref osSemaphore.\n/// \\param[in]     count         maximum and initial number of available tokens.\n/// \\return semaphore ID for reference by other functions or NULL in case of error.\nosSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count);\n\n/// Wait until a Semaphore token becomes available.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return number of available tokens, or -1 in case of incorrect parameters.\nint32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);\n\n/// Release a Semaphore token.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osSemaphoreRelease (osSemaphoreId semaphore_id);\n#endif\n\n/// Delete a Semaphore object.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n#if (osCMSIS < 0x20000U)\nosStatus osSemaphoreDelete (osSemaphoreId semaphore_id);\n#endif\n\n#endif  // Semaphore available\n\n\n//  ==== Memory Pool Management Functions ====\n\n#if (defined(osFeature_Pool) && (osFeature_Pool != 0))  // Memory Pool available\n\n/// \\brief Define a Memory Pool.\n/// \\param         name          name of the memory pool.\n/// \\param         no            maximum number of blocks (objects) in the memory pool.\n/// \\param         type          data type of a single block (object).\n/// \\note CAN BE CHANGED: The parameter to \\b osPoolDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osPoolDef(name, no, type) \\\nextern const osPoolDef_t os_pool_def_##name\n#else                            // define the object\n#if (osCMSIS < 0x20000U)\n#define osPoolDef(name, no, type) \\\nconst osPoolDef_t os_pool_def_##name = \\\n{ (no), sizeof(type), NULL }\n#else\n#define osPoolDef(name, no, type) \\\nconst osPoolDef_t os_pool_def_##name = \\\n{ (no), sizeof(type), { NULL, 0U, NULL, 0U, NULL, 0U } }\n#endif\n#endif\n\n/// \\brief Access a Memory Pool definition.\n/// \\param         name          name of the memory pool\n/// \\note CAN BE CHANGED: The parameter to \\b osPool shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osPool(name) \\\n&os_pool_def_##name\n\n/// Create and Initialize a Memory Pool object.\n/// \\param[in]     pool_def      memory pool definition referenced with \\ref osPool.\n/// \\return memory pool ID for reference by other functions or NULL in case of error.\nosPoolId osPoolCreate (const osPoolDef_t *pool_def);\n\n/// Allocate a memory block from a Memory Pool.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\nvoid *osPoolAlloc (osPoolId pool_id);\n\n/// Allocate a memory block from a Memory Pool and set memory block to zero.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\nvoid *osPoolCAlloc (osPoolId pool_id);\n\n/// Return an allocated memory block back to a Memory Pool.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\param[in]     block         address of the allocated memory block to be returned to the memory pool.\n/// \\return status code that indicates the execution status of the function.\nosStatus osPoolFree (osPoolId pool_id, void *block);\n\n#endif  // Memory Pool available\n\n\n//  ==== Message Queue Management Functions ====\n\n#if (defined(osFeature_MessageQ) && (osFeature_MessageQ != 0))  // Message Queue available\n\n/// \\brief Create a Message Queue Definition.\n/// \\param         name          name of the queue.\n/// \\param         queue_sz      maximum number of messages in the queue.\n/// \\param         type          data type of a single message element (for debugger).\n/// \\note CAN BE CHANGED: The parameter to \\b osMessageQDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMessageQDef(name, queue_sz, type) \\\nextern const osMessageQDef_t os_messageQ_def_##name\n#else                            // define the object\n#if (osCMSIS < 0x20000U)\n#define osMessageQDef(name, queue_sz, type) \\\nconst osMessageQDef_t os_messageQ_def_##name = \\\n{ (queue_sz), NULL }\n#else\n#define osMessageQDef(name, queue_sz, type) \\\nconst osMessageQDef_t os_messageQ_def_##name = \\\n{ (queue_sz), { NULL, 0U, NULL, 0U, NULL, 0U } }\n#endif\n#endif\n\n/// \\brief Access a Message Queue Definition.\n/// \\param         name          name of the queue\n/// \\note CAN BE CHANGED: The parameter to \\b osMessageQ shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMessageQ(name) \\\n&os_messageQ_def_##name\n\n/// Create and Initialize a Message Queue object.\n/// \\param[in]     queue_def     message queue definition referenced with \\ref osMessageQ.\n/// \\param[in]     thread_id     thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return message queue ID for reference by other functions or NULL in case of error.\nosMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id);\n\n/// Put a Message to a Queue.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in]     info          message information.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec);\n\n/// Get a Message from a Queue or timeout if Queue is empty.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return event information that includes status code.\nosEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);\n\nuint32_t osMessageGetSpace (osMessageQId queue_id);\n#endif  // Message Queue available\n\n\n//  ==== Mail Queue Management Functions ====\n\n#if (defined(osFeature_MailQ) && (osFeature_MailQ != 0))  // Mail Queue available\n\n/// \\brief Create a Mail Queue Definition.\n/// \\param         name          name of the queue.\n/// \\param         queue_sz      maximum number of mails in the queue.\n/// \\param         type          data type of a single mail element.\n/// \\note CAN BE CHANGED: The parameter to \\b osMailQDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMailQDef(name, queue_sz, type) \\\nextern const osMailQDef_t os_mailQ_def_##name\n#else                            // define the object\n#if (osCMSIS < 0x20000U)\n#define osMailQDef(name, queue_sz, type) \\\nconst osMailQDef_t os_mailQ_def_##name = \\\n{ (queue_sz), sizeof(type), NULL }\n#else\n#define osMailQDef(name, queue_sz, type) \\\nstatic void *os_mail_p_##name[2]; \\\nconst osMailQDef_t os_mailQ_def_##name = \\\n{ (queue_sz), sizeof(type), (&os_mail_p_##name), \\\n  { NULL, 0U, NULL, 0U, NULL, 0U }, \\\n  { NULL, 0U, NULL, 0U, NULL, 0U } }\n#endif\n#endif\n\n/// \\brief Access a Mail Queue Definition.\n/// \\param         name          name of the queue\n/// \\note CAN BE CHANGED: The parameter to \\b osMailQ shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMailQ(name) \\\n&os_mailQ_def_##name\n\n/// Create and Initialize a Mail Queue object.\n/// \\param[in]     queue_def     mail queue definition referenced with \\ref osMailQ.\n/// \\param[in]     thread_id     thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return mail queue ID for reference by other functions or NULL in case of error.\nosMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id);\n\n/// Allocate a memory block for mail from a mail memory pool.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\nvoid *osMailAlloc (osMailQId queue_id, uint32_t millisec);\n\n/// Allocate a memory block for mail from a mail memory pool and set memory block to zero.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\nvoid *osMailCAlloc (osMailQId queue_id, uint32_t millisec);\n\n/// Put a Mail into a Queue.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     mail          pointer to memory with mail to put into a queue.\n/// \\return status code that indicates the execution status of the function.\nosStatus osMailPut (osMailQId queue_id, const void *mail);\n\n/// Get a Mail from a Queue or timeout if Queue is empty.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return event information that includes status code.\nosEvent osMailGet (osMailQId queue_id, uint32_t millisec);\n\n/// Free a memory block by returning it to a mail memory pool.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     mail          pointer to memory block that was obtained with \\ref osMailGet.\n/// \\return status code that indicates the execution status of the function.\nosStatus osMailFree (osMailQId queue_id, void *mail);\n\n#endif  // Mail Queue available\n\n#if !(osCMSIS < 0x20000U)\nconst char *osGetThreadName (void);\n#endif\n\n#ifdef  __cplusplus\n}\n#endif\n\n#endif  // CMSIS_OS_H_\n"
  },
  {
    "path": "include/rtos/rtx5/cmsis_os2.h",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * ----------------------------------------------------------------------\n *\n * $Date:        18. June 2018\n * $Revision:    V2.1.3\n *\n * Project:      CMSIS-RTOS2 API\n * Title:        cmsis_os2.h header file\n *\n * Version 2.1.3\n *    Additional functions allowed to be called from Interrupt Service Routines:\n *    - osThreadGetId\n * Version 2.1.2\n *    Additional functions allowed to be called from Interrupt Service Routines:\n *    - osKernelGetInfo, osKernelGetState\n * Version 2.1.1\n *    Additional functions allowed to be called from Interrupt Service Routines:\n *    - osKernelGetTickCount, osKernelGetTickFreq\n *    Changed Kernel Tick type to uint32_t:\n *    - updated: osKernelGetTickCount, osDelayUntil\n * Version 2.1.0\n *    Support for critical and uncritical sections (nesting safe):\n *    - updated: osKernelLock, osKernelUnlock\n *    - added: osKernelRestoreLock\n *    Updated Thread and Event Flags:\n *    - changed flags parameter and return type from int32_t to uint32_t\n * Version 2.0.0\n *    Initial Release\n *---------------------------------------------------------------------------*/\n\n#ifndef CMSIS_OS2_H_\n#define CMSIS_OS2_H_\n\n#ifndef __NO_RETURN\n#if   defined(__CC_ARM)\n#define __NO_RETURN __declspec(noreturn)\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n#define __NO_RETURN __attribute__((__noreturn__))\n#elif defined(__GNUC__)\n#define __NO_RETURN __attribute__((__noreturn__))\n#elif defined(__ICCARM__)\n#define __NO_RETURN __noreturn\n#else\n#define __NO_RETURN\n#endif\n#endif\n\n#include \n#include \n\n#ifdef  __cplusplus\nextern \"C\"\n{\n#endif\n\n\n//  ==== Enumerations, structures, defines ====\n\n/// Version information.\ntypedef struct {\n  uint32_t                       api;   ///< API version (major.minor.rev: mmnnnrrrr dec).\n  uint32_t                    kernel;   ///< Kernel version (major.minor.rev: mmnnnrrrr dec).\n} osVersion_t;\n\n/// Kernel state.\ntypedef enum {\n  osKernelInactive        =  0,         ///< Inactive.\n  osKernelReady           =  1,         ///< Ready.\n  osKernelRunning         =  2,         ///< Running.\n  osKernelLocked          =  3,         ///< Locked.\n  osKernelSuspended       =  4,         ///< Suspended.\n  osKernelError           = -1,         ///< Error.\n  osKernelReserved        = 0x7FFFFFFFU ///< Prevents enum down-size compiler optimization.\n} osKernelState_t;\n\n/// Thread state.\ntypedef enum {\n  osThreadInactive        =  0,         ///< Inactive.\n  osThreadReady           =  1,         ///< Ready.\n  osThreadRunning         =  2,         ///< Running.\n  osThreadBlocked         =  3,         ///< Blocked.\n  osThreadTerminated      =  4,         ///< Terminated.\n  osThreadError           = -1,         ///< Error.\n  osThreadReserved        = 0x7FFFFFFF  ///< Prevents enum down-size compiler optimization.\n} osThreadState_t;\n\n/// Priority values.\ntypedef enum {\n  osPriorityNone          =  0,         ///< No priority (not initialized).\n  osPriorityIdle          =  1,         ///< Reserved for Idle thread.\n  osPriorityLow           =  8,         ///< Priority: low\n  osPriorityLow1          =  8+1,       ///< Priority: low + 1\n  osPriorityLow2          =  8+2,       ///< Priority: low + 2\n  osPriorityLow3          =  8+3,       ///< Priority: low + 3\n  osPriorityLow4          =  8+4,       ///< Priority: low + 4\n  osPriorityLow5          =  8+5,       ///< Priority: low + 5\n  osPriorityLow6          =  8+6,       ///< Priority: low + 6\n  osPriorityLow7          =  8+7,       ///< Priority: low + 7\n  osPriorityBelowNormal   = 16,         ///< Priority: below normal\n  osPriorityBelowNormal1  = 16+1,       ///< Priority: below normal + 1\n  osPriorityBelowNormal2  = 16+2,       ///< Priority: below normal + 2\n  osPriorityBelowNormal3  = 16+3,       ///< Priority: below normal + 3\n  osPriorityBelowNormal4  = 16+4,       ///< Priority: below normal + 4\n  osPriorityBelowNormal5  = 16+5,       ///< Priority: below normal + 5\n  osPriorityBelowNormal6  = 16+6,       ///< Priority: below normal + 6\n  osPriorityBelowNormal7  = 16+7,       ///< Priority: below normal + 7\n  osPriorityNormal        = 24,         ///< Priority: normal\n  osPriorityNormal1       = 24+1,       ///< Priority: normal + 1\n  osPriorityNormal2       = 24+2,       ///< Priority: normal + 2\n  osPriorityNormal3       = 24+3,       ///< Priority: normal + 3\n  osPriorityNormal4       = 24+4,       ///< Priority: normal + 4\n  osPriorityNormal5       = 24+5,       ///< Priority: normal + 5\n  osPriorityNormal6       = 24+6,       ///< Priority: normal + 6\n  osPriorityNormal7       = 24+7,       ///< Priority: normal + 7\n  osPriorityAboveNormal   = 32,         ///< Priority: above normal\n  osPriorityAboveNormal1  = 32+1,       ///< Priority: above normal + 1\n  osPriorityAboveNormal2  = 32+2,       ///< Priority: above normal + 2\n  osPriorityAboveNormal3  = 32+3,       ///< Priority: above normal + 3\n  osPriorityAboveNormal4  = 32+4,       ///< Priority: above normal + 4\n  osPriorityAboveNormal5  = 32+5,       ///< Priority: above normal + 5\n  osPriorityAboveNormal6  = 32+6,       ///< Priority: above normal + 6\n  osPriorityAboveNormal7  = 32+7,       ///< Priority: above normal + 7\n  osPriorityHigh          = 40,         ///< Priority: high\n  osPriorityHigh1         = 40+1,       ///< Priority: high + 1\n  osPriorityHigh2         = 40+2,       ///< Priority: high + 2\n  osPriorityHigh3         = 40+3,       ///< Priority: high + 3\n  osPriorityHigh4         = 40+4,       ///< Priority: high + 4\n  osPriorityHigh5         = 40+5,       ///< Priority: high + 5\n  osPriorityHigh6         = 40+6,       ///< Priority: high + 6\n  osPriorityHigh7         = 40+7,       ///< Priority: high + 7\n  osPriorityRealtime      = 48,         ///< Priority: realtime\n  osPriorityRealtime1     = 48+1,       ///< Priority: realtime + 1\n  osPriorityRealtime2     = 48+2,       ///< Priority: realtime + 2\n  osPriorityRealtime3     = 48+3,       ///< Priority: realtime + 3\n  osPriorityRealtime4     = 48+4,       ///< Priority: realtime + 4\n  osPriorityRealtime5     = 48+5,       ///< Priority: realtime + 5\n  osPriorityRealtime6     = 48+6,       ///< Priority: realtime + 6\n  osPriorityRealtime7     = 48+7,       ///< Priority: realtime + 7\n  osPriorityISR           = 56,         ///< Reserved for ISR deferred thread.\n  osPriorityError         = -1,         ///< System cannot determine priority or illegal priority.\n  osPriorityReserved      = 0x7FFFFFFF  ///< Prevents enum down-size compiler optimization.\n} osPriority_t;\n\n/// Entry point of a thread.\ntypedef void (*osThreadFunc_t) (void *argument);\n\n/// Timer callback function.\ntypedef void (*osTimerFunc_t) (void *argument);\n\n/// Timer type.\ntypedef enum {\n  osTimerOnce               = 0,          ///< One-shot timer.\n  osTimerPeriodic           = 1           ///< Repeating timer.\n} osTimerType_t;\n\n// Timeout value.\n#define osWaitForever         0xFFFFFFFFU ///< Wait forever timeout value.\n\n// Flags options (\\ref osThreadFlagsWait and \\ref osEventFlagsWait).\n#define osFlagsWaitAny        0x00000000U ///< Wait for any flag (default).\n#define osFlagsWaitAll        0x00000001U ///< Wait for all flags.\n#define osFlagsNoClear        0x00000002U ///< Do not clear flags which have been specified to wait for.\n\n// Flags errors (returned by osThreadFlagsXxxx and osEventFlagsXxxx).\n#define osFlagsError          0x80000000U ///< Error indicator.\n#define osFlagsErrorUnknown   0xFFFFFFFFU ///< osError (-1).\n#define osFlagsErrorTimeout   0xFFFFFFFEU ///< osErrorTimeout (-2).\n#define osFlagsErrorResource  0xFFFFFFFDU ///< osErrorResource (-3).\n#define osFlagsErrorParameter 0xFFFFFFFCU ///< osErrorParameter (-4).\n#define osFlagsErrorISR       0xFFFFFFFAU ///< osErrorISR (-6).\n\n// Thread attributes (attr_bits in \\ref osThreadAttr_t).\n#define osThreadDetached      0x00000000U ///< Thread created in detached mode (default)\n#define osThreadJoinable      0x00000001U ///< Thread created in joinable mode\n\n// Mutex attributes (attr_bits in \\ref osMutexAttr_t).\n#define osMutexRecursive      0x00000001U ///< Recursive mutex.\n#define osMutexPrioInherit    0x00000002U ///< Priority inherit protocol.\n#define osMutexRobust         0x00000008U ///< Robust mutex.\n\n/// Status code values returned by CMSIS-RTOS functions.\ntypedef enum {\n  osOK                      =  0,         ///< Operation completed successfully.\n  osError                   = -1,         ///< Unspecified RTOS error: run-time error but no other error message fits.\n  osErrorTimeout            = -2,         ///< Operation not completed within the timeout period.\n  osErrorResource           = -3,         ///< Resource not available.\n  osErrorParameter          = -4,         ///< Parameter error.\n  osErrorNoMemory           = -5,         ///< System is out of memory: it was impossible to allocate or reserve memory for the operation.\n  osErrorISR                = -6,         ///< Not allowed in ISR context: the function cannot be called from interrupt service routines.\n  osStatusReserved          = 0x7FFFFFFF  ///< Prevents enum down-size compiler optimization.\n} osStatus_t;\n\n\n/// \\details Thread ID identifies the thread.\ntypedef void *osThreadId_t;\n\n/// \\details Timer ID identifies the timer.\ntypedef void *osTimerId_t;\n\n/// \\details Event Flags ID identifies the event flags.\ntypedef void *osEventFlagsId_t;\n\n/// \\details Mutex ID identifies the mutex.\ntypedef void *osMutexId_t;\n\n/// \\details Semaphore ID identifies the semaphore.\ntypedef void *osSemaphoreId_t;\n\n/// \\details Memory Pool ID identifies the memory pool.\ntypedef void *osMemoryPoolId_t;\n\n/// \\details Message Queue ID identifies the message queue.\ntypedef void *osMessageQueueId_t;\n\n\n#ifndef TZ_MODULEID_T\n#define TZ_MODULEID_T\n/// \\details Data type that identifies secure software modules called by a process.\ntypedef uint32_t TZ_ModuleId_t;\n#endif\n\n\n/// Attributes structure for thread.\ntypedef struct {\n  const char                   *name;   ///< name of the thread\n  uint32_t                 attr_bits;   ///< attribute bits\n  void                      *cb_mem;    ///< memory for control block\n  uint32_t                   cb_size;   ///< size of provided memory for control block\n  void                   *stack_mem;    ///< memory for stack\n  uint32_t                stack_size;   ///< size of stack\n  osPriority_t              priority;   ///< initial thread priority (default: osPriorityNormal)\n  TZ_ModuleId_t            tz_module;   ///< TrustZone module identifier\n  uint32_t                  reserved;   ///< reserved (must be 0)\n} osThreadAttr_t;\n\n/// Attributes structure for timer.\ntypedef struct {\n  const char                   *name;   ///< name of the timer\n  uint32_t                 attr_bits;   ///< attribute bits\n  void                      *cb_mem;    ///< memory for control block\n  uint32_t                   cb_size;   ///< size of provided memory for control block\n} osTimerAttr_t;\n\n/// Attributes structure for event flags.\ntypedef struct {\n  const char                   *name;   ///< name of the event flags\n  uint32_t                 attr_bits;   ///< attribute bits\n  void                      *cb_mem;    ///< memory for control block\n  uint32_t                   cb_size;   ///< size of provided memory for control block\n} osEventFlagsAttr_t;\n\n/// Attributes structure for mutex.\ntypedef struct {\n  const char                   *name;   ///< name of the mutex\n  uint32_t                 attr_bits;   ///< attribute bits\n  void                      *cb_mem;    ///< memory for control block\n  uint32_t                   cb_size;   ///< size of provided memory for control block\n} osMutexAttr_t;\n\n/// Attributes structure for semaphore.\ntypedef struct {\n  const char                   *name;   ///< name of the semaphore\n  uint32_t                 attr_bits;   ///< attribute bits\n  void                      *cb_mem;    ///< memory for control block\n  uint32_t                   cb_size;   ///< size of provided memory for control block\n} osSemaphoreAttr_t;\n\n/// Attributes structure for memory pool.\ntypedef struct {\n  const char                   *name;   ///< name of the memory pool\n  uint32_t                 attr_bits;   ///< attribute bits\n  void                      *cb_mem;    ///< memory for control block\n  uint32_t                   cb_size;   ///< size of provided memory for control block\n  void                      *mp_mem;    ///< memory for data storage\n  uint32_t                   mp_size;   ///< size of provided memory for data storage\n} osMemoryPoolAttr_t;\n\n/// Attributes structure for message queue.\ntypedef struct {\n  const char                   *name;   ///< name of the message queue\n  uint32_t                 attr_bits;   ///< attribute bits\n  void                      *cb_mem;    ///< memory for control block\n  uint32_t                   cb_size;   ///< size of provided memory for control block\n  void                      *mq_mem;    ///< memory for data storage\n  uint32_t                   mq_size;   ///< size of provided memory for data storage\n} osMessageQueueAttr_t;\n\n\n//  ==== Kernel Management Functions ====\n\n/// Initialize the RTOS Kernel.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osKernelInitialize (void);\n\n///  Get RTOS Kernel Information.\n/// \\param[out]    version       pointer to buffer for retrieving version information.\n/// \\param[out]    id_buf        pointer to buffer for retrieving kernel identification string.\n/// \\param[in]     id_size       size of buffer for kernel identification string.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osKernelGetInfo (osVersion_t *version, char *id_buf, uint32_t id_size);\n\n/// Get the current RTOS Kernel state.\n/// \\return current RTOS Kernel state.\nosKernelState_t osKernelGetState (void);\n\n/// Start the RTOS Kernel scheduler.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osKernelStart (void);\n\n/// Lock the RTOS Kernel scheduler.\n/// \\return previous lock state (1 - locked, 0 - not locked, error code if negative).\nint32_t osKernelLock (void);\n\n/// Unlock the RTOS Kernel scheduler.\n/// \\return previous lock state (1 - locked, 0 - not locked, error code if negative).\nint32_t osKernelUnlock (void);\n\n/// Restore the RTOS Kernel scheduler lock state.\n/// \\param[in]     lock          lock state obtained by \\ref osKernelLock or \\ref osKernelUnlock.\n/// \\return new lock state (1 - locked, 0 - not locked, error code if negative).\nint32_t osKernelRestoreLock (int32_t lock);\n\n/// Suspend the RTOS Kernel scheduler.\n/// \\return time in ticks, for how long the system can sleep or power-down.\nuint32_t osKernelSuspend (void);\n\n/// Resume the RTOS Kernel scheduler.\n/// \\param[in]     sleep_ticks   time in ticks for how long the system was in sleep or power-down mode.\nvoid osKernelResume (uint32_t sleep_ticks);\n\n/// Get the RTOS kernel tick count.\n/// \\return RTOS kernel current tick count.\nuint32_t osKernelGetTickCount (void);\n\n/// Get the RTOS kernel tick frequency.\n/// \\return frequency of the kernel tick in hertz, i.e. kernel ticks per second.\nuint32_t osKernelGetTickFreq (void);\n\n/// Get the RTOS kernel system timer count.\n/// \\return RTOS kernel current system timer count as 32-bit value.\nuint32_t osKernelGetSysTimerCount (void);\n\n/// Get the RTOS kernel system timer frequency.\n/// \\return frequency of the system timer in hertz, i.e. timer ticks per second.\nuint32_t osKernelGetSysTimerFreq (void);\n\n\n//  ==== Thread Management Functions ====\n\n/// Create a thread and add it to Active Threads.\n/// \\param[in]     func          thread function.\n/// \\param[in]     argument      pointer that is passed to the thread function as start argument.\n/// \\param[in]     attr          thread attributes; NULL: default values.\n/// \\return thread ID for reference by other functions or NULL in case of error.\nosThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr);\n\n/// Get name of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return name as null-terminated string.\nconst char *osThreadGetName (osThreadId_t thread_id);\n\n/// Return the thread ID of the current running thread.\n/// \\return thread ID for reference by other functions or NULL in case of error.\nosThreadId_t osThreadGetId (void);\n\n/// Get current thread state of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return current thread state of the specified thread.\nosThreadState_t osThreadGetState (osThreadId_t thread_id);\n\n/// Get stack size of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return stack size in bytes.\nuint32_t osThreadGetStackSize (osThreadId_t thread_id);\n\n/// Get available stack space of a thread based on stack watermark recording during execution.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return remaining stack space in bytes.\nuint32_t osThreadGetStackSpace (osThreadId_t thread_id);\n\n/// Change priority of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\param[in]     priority      new priority value for the thread function.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadSetPriority (osThreadId_t thread_id, osPriority_t priority);\n\n/// Get current priority of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return current priority value of the specified thread.\nosPriority_t osThreadGetPriority (osThreadId_t thread_id);\n\n/// Pass control to next thread that is in state \\b READY.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadYield (void);\n\n/// Suspend execution of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadSuspend (osThreadId_t thread_id);\n\n/// Resume execution of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadResume (osThreadId_t thread_id);\n\n/// Detach a thread (thread storage can be reclaimed when thread terminates).\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadDetach (osThreadId_t thread_id);\n\n/// Wait for specified thread to terminate.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadJoin (osThreadId_t thread_id);\n\n/// Terminate execution of current running thread.\n__NO_RETURN void osThreadExit (void);\n\n/// Terminate execution of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osThreadTerminate (osThreadId_t thread_id);\n\n/// Get number of active threads.\n/// \\return number of active threads.\nuint32_t osThreadGetCount (void);\n\n/// Enumerate active threads.\n/// \\param[out]    thread_array  pointer to array for retrieving thread IDs.\n/// \\param[in]     array_items   maximum number of items in array for retrieving thread IDs.\n/// \\return number of enumerated threads.\nuint32_t osThreadEnumerate (osThreadId_t *thread_array, uint32_t array_items);\n\n\n//  ==== Thread Flags Functions ====\n\n/// Set the specified Thread Flags of a thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n/// \\param[in]     flags         specifies the flags of the thread that shall be set.\n/// \\return thread flags after setting or error code if highest bit set.\nuint32_t osThreadFlagsSet (osThreadId_t thread_id, uint32_t flags);\n\n/// Clear the specified Thread Flags of current running thread.\n/// \\param[in]     flags         specifies the flags of the thread that shall be cleared.\n/// \\return thread flags before clearing or error code if highest bit set.\nuint32_t osThreadFlagsClear (uint32_t flags);\n\n/// Get the current Thread Flags of current running thread.\n/// \\return current thread flags.\nuint32_t osThreadFlagsGet (void);\n\n/// Wait for one or more Thread Flags of the current running thread to become signaled.\n/// \\param[in]     flags         specifies the flags to wait for.\n/// \\param[in]     options       specifies flags options (osFlagsXxxx).\n/// \\param[in]     timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return thread flags before clearing or error code if highest bit set.\nuint32_t osThreadFlagsWait (uint32_t flags, uint32_t options, uint32_t timeout);\n\n#if TASK_HUNG_CHECK_ENABLED\n/// enable/disable the hung check feature of an active thread\nosStatus_t osThreadSetHungCheck (osThreadId_t thread_id, int32_t enable, uint32_t timeout);\n#endif\n\n//  ==== Generic Wait Functions ====\n\n/// Wait for Timeout (Time Delay).\n/// \\param[in]     ticks         \\ref CMSIS_RTOS_TimeOutValue \"time ticks\" value\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osDelay (uint32_t ticks);\n\n/// Wait until specified time.\n/// \\param[in]     ticks         absolute time in ticks\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osDelayUntil (uint32_t ticks);\n\n\n//  ==== Timer Management Functions ====\n\n/// Create and Initialize a timer.\n/// \\param[in]     func          function pointer to callback function.\n/// \\param[in]     type          \\ref osTimerOnce for one-shot or \\ref osTimerPeriodic for periodic behavior.\n/// \\param[in]     argument      argument to the timer callback function.\n/// \\param[in]     attr          timer attributes; NULL: default values.\n/// \\return timer ID for reference by other functions or NULL in case of error.\nosTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr);\n\n/// Get name of a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerNew.\n/// \\return name as null-terminated string.\nconst char *osTimerGetName (osTimerId_t timer_id);\n\n/// Start or restart a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerNew.\n/// \\param[in]     ticks         \\ref CMSIS_RTOS_TimeOutValue \"time ticks\" value of the timer.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osTimerStart (osTimerId_t timer_id, uint32_t ticks);\n\n/// Stop a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osTimerStop (osTimerId_t timer_id);\n\n/// Check if a timer is running.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerNew.\n/// \\return 0 not running, 1 running.\nuint32_t osTimerIsRunning (osTimerId_t timer_id);\n\n/// Delete a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osTimerDelete (osTimerId_t timer_id);\n\n\n//  ==== Event Flags Management Functions ====\n\n/// Create and Initialize an Event Flags object.\n/// \\param[in]     attr          event flags attributes; NULL: default values.\n/// \\return event flags ID for reference by other functions or NULL in case of error.\nosEventFlagsId_t osEventFlagsNew (const osEventFlagsAttr_t *attr);\n\n/// Get name of an Event Flags object.\n/// \\param[in]     ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n/// \\return name as null-terminated string.\nconst char *osEventFlagsGetName (osEventFlagsId_t ef_id);\n\n/// Set the specified Event Flags.\n/// \\param[in]     ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n/// \\param[in]     flags         specifies the flags that shall be set.\n/// \\return event flags after setting or error code if highest bit set.\nuint32_t osEventFlagsSet (osEventFlagsId_t ef_id, uint32_t flags);\n\n/// Clear the specified Event Flags.\n/// \\param[in]     ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n/// \\param[in]     flags         specifies the flags that shall be cleared.\n/// \\return event flags before clearing or error code if highest bit set.\nuint32_t osEventFlagsClear (osEventFlagsId_t ef_id, uint32_t flags);\n\n/// Get the current Event Flags.\n/// \\param[in]     ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n/// \\return current event flags.\nuint32_t osEventFlagsGet (osEventFlagsId_t ef_id);\n\n/// Wait for one or more Event Flags to become signaled.\n/// \\param[in]     ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n/// \\param[in]     flags         specifies the flags to wait for.\n/// \\param[in]     options       specifies flags options (osFlagsXxxx).\n/// \\param[in]     timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return event flags before clearing or error code if highest bit set.\nuint32_t osEventFlagsWait (osEventFlagsId_t ef_id, uint32_t flags, uint32_t options, uint32_t timeout);\n\n/// Delete an Event Flags object.\n/// \\param[in]     ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osEventFlagsDelete (osEventFlagsId_t ef_id);\n\n\n//  ==== Mutex Management Functions ====\n\n/// Create and Initialize a Mutex object.\n/// \\param[in]     attr          mutex attributes; NULL: default values.\n/// \\return mutex ID for reference by other functions or NULL in case of error.\nosMutexId_t osMutexNew (const osMutexAttr_t *attr);\n\n/// Get name of a Mutex object.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexNew.\n/// \\return name as null-terminated string.\nconst char *osMutexGetName (osMutexId_t mutex_id);\n\n/// Acquire a Mutex or timeout if it is locked.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexNew.\n/// \\param[in]     timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout);\n\n/// Release a Mutex that was acquired by \\ref osMutexAcquire.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMutexRelease (osMutexId_t mutex_id);\n\n/// Get Thread which owns a Mutex object.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexNew.\n/// \\return thread ID of owner thread or NULL when mutex was not acquired.\nosThreadId_t osMutexGetOwner (osMutexId_t mutex_id);\n\n/// Delete a Mutex object.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMutexDelete (osMutexId_t mutex_id);\n\n\n//  ==== Semaphore Management Functions ====\n\n/// Create and Initialize a Semaphore object.\n/// \\param[in]     max_count     maximum number of available tokens.\n/// \\param[in]     initial_count initial number of available tokens.\n/// \\param[in]     attr          semaphore attributes; NULL: default values.\n/// \\return semaphore ID for reference by other functions or NULL in case of error.\nosSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr);\n\n/// Get name of a Semaphore object.\n/// \\param[in]     semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\return name as null-terminated string.\nconst char *osSemaphoreGetName (osSemaphoreId_t semaphore_id);\n\n/// Acquire a Semaphore token or timeout if no tokens are available.\n/// \\param[in]     semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\param[in]     timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout);\n\n/// Release a Semaphore token up to the initial maximum count.\n/// \\param[in]     semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id);\n\n/// Get current Semaphore token count.\n/// \\param[in]     semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\return number of tokens available.\nuint32_t osSemaphoreGetCount (osSemaphoreId_t semaphore_id);\n\n/// Delete a Semaphore object.\n/// \\param[in]     semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id);\n\n\n//  ==== Memory Pool Management Functions ====\n\n/// Create and Initialize a Memory Pool object.\n/// \\param[in]     block_count   maximum number of memory blocks in memory pool.\n/// \\param[in]     block_size    memory block size in bytes.\n/// \\param[in]     attr          memory pool attributes; NULL: default values.\n/// \\return memory pool ID for reference by other functions or NULL in case of error.\nosMemoryPoolId_t osMemoryPoolNew (uint32_t block_count, uint32_t block_size, const osMemoryPoolAttr_t *attr);\n\n/// Get name of a Memory Pool object.\n/// \\param[in]     mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return name as null-terminated string.\nconst char *osMemoryPoolGetName (osMemoryPoolId_t mp_id);\n\n/// Allocate a memory block from a Memory Pool.\n/// \\param[in]     mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\param[in]     timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return address of the allocated memory block or NULL in case of no memory is available.\nvoid *osMemoryPoolAlloc (osMemoryPoolId_t mp_id, uint32_t timeout);\n\n/// Return an allocated memory block back to a Memory Pool.\n/// \\param[in]     mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\param[in]     block         address of the allocated memory block to be returned to the memory pool.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMemoryPoolFree (osMemoryPoolId_t mp_id, void *block);\n\n/// Get maximum number of memory blocks in a Memory Pool.\n/// \\param[in]     mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return maximum number of memory blocks.\nuint32_t osMemoryPoolGetCapacity (osMemoryPoolId_t mp_id);\n\n/// Get memory block size in a Memory Pool.\n/// \\param[in]     mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return memory block size in bytes.\nuint32_t osMemoryPoolGetBlockSize (osMemoryPoolId_t mp_id);\n\n/// Get number of memory blocks used in a Memory Pool.\n/// \\param[in]     mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return number of memory blocks used.\nuint32_t osMemoryPoolGetCount (osMemoryPoolId_t mp_id);\n\n/// Get number of memory blocks available in a Memory Pool.\n/// \\param[in]     mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return number of memory blocks available.\nuint32_t osMemoryPoolGetSpace (osMemoryPoolId_t mp_id);\n\n/// Delete a Memory Pool object.\n/// \\param[in]     mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMemoryPoolDelete (osMemoryPoolId_t mp_id);\n\n\n//  ==== Message Queue Management Functions ====\n\n/// Create and Initialize a Message Queue object.\n/// \\param[in]     msg_count     maximum number of messages in queue.\n/// \\param[in]     msg_size      maximum message size in bytes.\n/// \\param[in]     attr          message queue attributes; NULL: default values.\n/// \\return message queue ID for reference by other functions or NULL in case of error.\nosMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr);\n\n/// Get name of a Message Queue object.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return name as null-terminated string.\nconst char *osMessageQueueGetName (osMessageQueueId_t mq_id);\n\n/// Put a Message into a Queue or timeout if Queue is full.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\param[in]     msg_ptr       pointer to buffer with message to put into a queue.\n/// \\param[in]     msg_prio      message priority.\n/// \\param[in]     timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout);\n\n/// Get a Message from a Queue or timeout if Queue is empty.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\param[out]    msg_ptr       pointer to buffer for message to get from a queue.\n/// \\param[out]    msg_prio      pointer to buffer for message priority or NULL.\n/// \\param[in]     timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout);\n\n/// Get maximum number of messages in a Message Queue.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return maximum number of messages.\nuint32_t osMessageQueueGetCapacity (osMessageQueueId_t mq_id);\n\n/// Get maximum message size in a Memory Pool.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return maximum message size in bytes.\nuint32_t osMessageQueueGetMsgSize (osMessageQueueId_t mq_id);\n\n/// Get number of queued messages in a Message Queue.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return number of queued messages.\nuint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id);\n\n/// Get number of available slots for messages in a Message Queue.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return number of available slots for messages.\nuint32_t osMessageQueueGetSpace (osMessageQueueId_t mq_id);\n\n/// Reset a Message Queue to initial empty state.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMessageQueueReset (osMessageQueueId_t mq_id);\n\n/// Delete a Message Queue object.\n/// \\param[in]     mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n/// \\return status code that indicates the execution status of the function.\nosStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id);\n\n\n#ifdef  __cplusplus\n}\n#endif\n\n#endif  // CMSIS_OS2_H_\n"
  },
  {
    "path": "include/rtos/rtx5/os_tick.h",
    "content": "/**************************************************************************//**\n * @file     os_tick.h\n * @brief    CMSIS OS Tick header file\n * @version  V1.0.1\n * @date     24. November 2017\n ******************************************************************************/\n/*\n * Copyright (c) 2017-2017 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef OS_TICK_H\n#define OS_TICK_H\n\n#include \n\n/// IRQ Handler.\n#ifndef IRQHANDLER_T\n#define IRQHANDLER_T\ntypedef void (*IRQHandler_t) (void);\n#endif\n\n/// Setup OS Tick timer to generate periodic RTOS Kernel Ticks\n/// \\param[in]     freq         tick frequency in Hz\n/// \\param[in]     handler      tick IRQ handler\n/// \\return 0 on success, -1 on error.\nint32_t  OS_Tick_Setup (uint32_t freq, IRQHandler_t handler);\n\n/// Enable OS Tick timer interrupt\nvoid     OS_Tick_Enable (void);\n\n/// Disable OS Tick timer interrupt\nvoid     OS_Tick_Disable (void);\n\n/// Acknowledge execution of OS Tick timer interrupt\nvoid     OS_Tick_AcknowledgeIRQ (void);\n\n/// Get OS Tick timer IRQ number\n/// \\return OS Tick IRQ number\nint32_t  OS_Tick_GetIRQn (void);\n\n/// Get OS Tick timer clock frequency\n/// \\return OS Tick timer clock frequency in Hz\nuint32_t OS_Tick_GetClock (void);\n\n/// Get OS Tick timer interval reload value\n/// \\return OS Tick timer interval reload value\nuint32_t OS_Tick_GetInterval (void);\n\n/// Get OS Tick timer counter value\n/// \\return OS Tick timer counter value\nuint32_t OS_Tick_GetCount (void);\n\n/// Get OS Tick timer overflow status\n/// \\return OS Tick overflow status (1 - overflow, 0 - no overflow).\nuint32_t OS_Tick_GetOverflow (void);\n\n#endif  /* OS_TICK_H */\n"
  },
  {
    "path": "include/rtos/rtx5/rtx_evr.h",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       RTX Event Recorder definitions\n *\n * -----------------------------------------------------------------------------\n */\n\n#ifndef RTX_EVR_H_\n#define RTX_EVR_H_\n\n#include \"cmsis_os2.h\"                  // CMSIS RTOS API\n#include \"rtx_config.h\"                 // RTX Configuration\n#include \"rtx_os.h\"                     // RTX OS definitions\n\n// Initial Thread configuration covered also Thread Flags and Generic Wait\n#ifndef   OS_EVR_THFLAGS\n#define   OS_EVR_THFLAGS        OS_EVR_THREAD\n#endif\n#ifndef   OS_EVR_WAIT\n#define   OS_EVR_WAIT           OS_EVR_THREAD\n#endif\n\n#ifdef   _RTE_\n#include \"RTE_Components.h\"\n#endif\n\n#ifdef    RTE_Compiler_EventRecorder\n\n//lint -emacro((835,845),EventID) [MISRA Note 13]\n\n#include \"EventRecorder.h\"\n#include \"EventRecorderConf.h\"\n\n#if ((defined(OS_EVR_INIT) && (OS_EVR_INIT != 0)) || (EVENT_TIMESTAMP_SOURCE == 2))\n#ifndef EVR_RTX_KERNEL_GET_STATE_DISABLE\n#define EVR_RTX_KERNEL_GET_STATE_DISABLE\n#endif\n#endif\n\n#if (EVENT_TIMESTAMP_SOURCE == 2)\n#ifndef EVR_RTX_KERNEL_GET_SYS_TIMER_COUNT_DISABLE\n#define EVR_RTX_KERNEL_GET_SYS_TIMER_COUNT_DISABLE\n#endif\n#ifndef EVR_RTX_KERNEL_GET_SYS_TIMER_FREQ_DISABLE\n#define EVR_RTX_KERNEL_GET_SYS_TIMER_FREQ_DISABLE\n#endif\n#endif\n\n/// RTOS component number\n#define EvtRtxMemoryNo                  (0xF0U)\n#define EvtRtxKernelNo                  (0xF1U)\n#define EvtRtxThreadNo                  (0xF2U)\n#define EvtRtxThreadFlagsNo             (0xF4U)\n#define EvtRtxWaitNo                    (0xF3U)\n#define EvtRtxTimerNo                   (0xF6U)\n#define EvtRtxEventFlagsNo              (0xF5U)\n#define EvtRtxMutexNo                   (0xF7U)\n#define EvtRtxSemaphoreNo               (0xF8U)\n#define EvtRtxMemoryPoolNo              (0xF9U)\n#define EvtRtxMessageQueueNo            (0xFAU)\n\n#endif  // RTE_Compiler_EventRecorder\n\n\n/// Extended Status codes\n#define osRtxErrorKernelNotReady        (-7)\n#define osRtxErrorKernelNotRunning      (-8)\n#define osRtxErrorInvalidControlBlock   (-9)\n#define osRtxErrorInvalidDataMemory     (-10)\n#define osRtxErrorInvalidThreadStack    (-11)\n#define osRtxErrorInvalidPriority       (-12)\n#define osRtxErrorThreadNotJoinable     (-13)\n#define osRtxErrorMutexNotOwned         (-14)\n#define osRtxErrorMutexNotLocked        (-15)\n#define osRtxErrorMutexLockLimit        (-16)\n#define osRtxErrorSemaphoreCountLimit   (-17)\n#define osRtxErrorTZ_InitContext_S      (-18)\n#define osRtxErrorTZ_AllocContext_S     (-19)\n#define osRtxErrorTZ_FreeContext_S      (-20)\n#define osRtxErrorTZ_LoadContext_S      (-21)\n#define osRtxErrorTZ_SaveContext_S      (-22)\n\n\n//  ==== Memory Events ====\n\n/**\n  \\brief  Event on memory initialization (Op)\n  \\param[in]  mem           pointer to memory pool.\n  \\param[in]  size          size of a memory pool in bytes.\n  \\param[in]  result        execution status: 1 - success, 0 - failure.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) && !defined(EVR_RTX_MEMORY_INIT_DISABLE))\nextern void EvrRtxMemoryInit (void *mem, uint32_t size, uint32_t result);\n#else\n#define EvrRtxMemoryInit(mem, size, result)\n#endif\n\n/**\n  \\brief  Event on memory allocate (Op)\n  \\param[in]  mem           pointer to memory pool.\n  \\param[in]  size          size of a memory block in bytes.\n  \\param[in]  type          memory block type: 0 - generic, 1 - control block.\n  \\param[in]  block         pointer to allocated memory block or NULL in case of no memory is available.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) && !defined(EVR_RTX_MEMORY_ALLOC_DISABLE))\nextern void EvrRtxMemoryAlloc (void *mem, uint32_t size, uint32_t type, void *block);\n#else\n#define EvrRtxMemoryAlloc(mem, size, type, block)\n#endif\n\n/**\n  \\brief  Event on memory free (Op)\n  \\param[in]  mem           pointer to memory pool.\n  \\param[in]  block         memory block to be returned to the memory pool.\n  \\param[in]  result        execution status: 1 - success, 0 - failure.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) && !defined(EVR_RTX_MEMORY_FREE_DISABLE))\nextern void EvrRtxMemoryFree (void *mem, void *block, uint32_t result);\n#else\n#define EvrRtxMemoryFree(mem, block, result)\n#endif\n\n/**\n  \\brief  Event on memory block initialization (Op)\n  \\param[in]  mp_info       memory pool info.\n  \\param[in]  block_count   maximum number of memory blocks in memory pool.\n  \\param[in]  block_size    size of a memory block in bytes.\n  \\param[in]  block_mem     pointer to memory for block storage.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) && !defined(EVR_RTX_MEMORY_BLOCK_INIT_DISABLE))\nextern void EvrRtxMemoryBlockInit (osRtxMpInfo_t *mp_info, uint32_t block_count, uint32_t block_size, void *block_mem);\n#else\n#define EvrRtxMemoryBlockInit(mp_info, block_count, block_size, block_mem)\n#endif\n\n/**\n  \\brief  Event on memory block alloc (Op)\n  \\param[in]  mp_info       memory pool info.\n  \\param[in]  block         address of the allocated memory block or NULL in case of no memory is available.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) && !defined(EVR_RTX_MEMORY_BLOCK_ALLOC_DISABLE))\nextern void EvrRtxMemoryBlockAlloc (osRtxMpInfo_t *mp_info, void *block);\n#else\n#define EvrRtxMemoryBlockAlloc(mp_info, block)\n#endif\n\n/**\n  \\brief  Event on memory block free (Op)\n  \\param[in]  mp_info       memory pool info.\n  \\param[in]  block         address of the allocated memory block to be returned to the memory pool.\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) && !defined(EVR_RTX_MEMORY_BLOCK_FREE_DISABLE))\nextern void EvrRtxMemoryBlockFree (osRtxMpInfo_t *mp_info, void *block, int32_t status);\n#else\n#define EvrRtxMemoryBlockFree(mp_info, block, status)\n#endif\n\n\n//  ==== Kernel Events ====\n\n/**\n  \\brief  Event on RTOS kernel error (Error)\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_ERROR_DISABLE))\nextern void EvrRtxKernelError (int32_t status);\n#else\n#define EvrRtxKernelError(status)\n#endif\n\n/**\n  \\brief  Event on RTOS kernel initialize (API)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_INITIALIZE_DISABLE))\nextern void EvrRtxKernelInitialize (void);\n#else\n#define EvrRtxKernelInitialize()\n#endif\n\n/**\n  \\brief  Event on successful RTOS kernel initialize (Op)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_INITIALIZED_DISABLE))\nextern void EvrRtxKernelInitialized (void);\n#else\n#define EvrRtxKernelInitialized()\n#endif\n\n/**\n  \\brief  Event on RTOS kernel information retrieve (API)\n  \\param[in]  version       pointer to buffer for retrieving version information.\n  \\param[in]  id_buf        pointer to buffer for retrieving kernel identification string.\n  \\param[in]  id_size       size of buffer for kernel identification string.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_GET_INFO_DISABLE))\nextern void EvrRtxKernelGetInfo (osVersion_t *version, char *id_buf, uint32_t id_size);\n#else\n#define EvrRtxKernelGetInfo(version, id_buf, id_size)\n#endif\n\n/**\n  \\brief  Event on successful RTOS kernel information retrieve (Op)\n  \\param[in]  version       pointer to buffer for retrieving version information.\n  \\param[in]  id_buf        pointer to buffer for retrieving kernel identification string.\n  \\param[in]  id_size       size of buffer for kernel identification string.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_INFO_RETRIEVED_DISABLE))\nextern void EvrRtxKernelInfoRetrieved (const osVersion_t *version, const char *id_buf, uint32_t id_size);\n#else\n#define EvrRtxKernelInfoRetrieved(version, id_buf, id_size)\n#endif\n\n/**\n  \\brief  Event on current RTOS Kernel state retrieve (API)\n  \\param[in]  state         current RTOS Kernel state.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_GET_STATE_DISABLE))\nextern void EvrRtxKernelGetState (osKernelState_t state);\n#else\n#define EvrRtxKernelGetState(state)\n#endif\n\n/**\n  \\brief  Event on RTOS Kernel scheduler start (API)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_START_DISABLE))\nextern void EvrRtxKernelStart (void);\n#else\n#define EvrRtxKernelStart()\n#endif\n\n/**\n  \\brief  Event on successful RTOS Kernel scheduler start (Op)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_STARTED_DISABLE))\nextern void EvrRtxKernelStarted (void);\n#else\n#define EvrRtxKernelStarted()\n#endif\n\n/**\n  \\brief  Event on RTOS Kernel scheduler lock (API)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_LOCK_DISABLE))\nextern void EvrRtxKernelLock (void);\n#else\n#define EvrRtxKernelLock()\n#endif\n\n/**\n  \\brief  Event on successful RTOS Kernel scheduler lock (Op)\n  \\param[in]  lock          previous lock state (1 - locked, 0 - not locked).\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_LOCKED_DISABLE))\nextern void EvrRtxKernelLocked (int32_t lock);\n#else\n#define EvrRtxKernelLocked(lock)\n#endif\n\n/**\n  \\brief  Event on RTOS Kernel scheduler unlock (API)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_UNLOCK_DISABLE))\nextern void EvrRtxKernelUnlock (void);\n#else\n#define EvrRtxKernelUnlock()\n#endif\n\n/**\n  \\brief  Event on successful RTOS Kernel scheduler unlock (Op)\n  \\param[in]  lock          previous lock state (1 - locked, 0 - not locked).\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_UNLOCKED_DISABLE))\nextern void EvrRtxKernelUnlocked (int32_t lock);\n#else\n#define EvrRtxKernelUnlocked(lock)\n#endif\n\n/**\n  \\brief  Event on RTOS Kernel scheduler lock state restore (API)\n  \\param[in]  lock          lock state obtained by \\ref osKernelLock or \\ref osKernelUnlock.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_RESTORE_LOCK_DISABLE))\nextern void EvrRtxKernelRestoreLock (int32_t lock);\n#else\n#define EvrRtxKernelRestoreLock(lock)\n#endif\n\n/**\n  \\brief  Event on successful RTOS Kernel scheduler lock state restore (Op)\n  \\param[in]  lock          new lock state (1 - locked, 0 - not locked).\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_LOCK_RESTORED_DISABLE))\nextern void EvrRtxKernelLockRestored (int32_t lock);\n#else\n#define EvrRtxKernelLockRestored(lock)\n#endif\n\n/**\n  \\brief  Event on RTOS Kernel scheduler suspend (API)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_SUSPEND_DISABLE))\nextern void EvrRtxKernelSuspend (void);\n#else\n#define EvrRtxKernelSuspend()\n#endif\n\n/**\n  \\brief  Event on successful RTOS Kernel scheduler suspend (Op)\n  \\param[in]  sleep_ticks   time in ticks, for how long the system can sleep or power-down.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_SUSPENDED_DISABLE))\nextern void EvrRtxKernelSuspended (uint32_t sleep_ticks);\n#else\n#define EvrRtxKernelSuspended(sleep_ticks)\n#endif\n\n/**\n  \\brief  Event on RTOS Kernel scheduler resume (API)\n  \\param[in]  sleep_ticks   time in ticks, for how long the system was in sleep or power-down mode.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_RESUME_DISABLE))\nextern void EvrRtxKernelResume (uint32_t sleep_ticks);\n#else\n#define EvrRtxKernelResume(sleep_ticks)\n#endif\n\n/**\n  \\brief  Event on successful RTOS Kernel scheduler resume (Op)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_RESUMED_DISABLE))\nextern void EvrRtxKernelResumed (void);\n#else\n#define EvrRtxKernelResumed()\n#endif\n\n/**\n  \\brief  Event on RTOS kernel tick count retrieve (API)\n  \\param[in]  count         RTOS kernel current tick count.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_GET_TICK_COUNT_DISABLE))\nextern void EvrRtxKernelGetTickCount (uint32_t count);\n#else\n#define EvrRtxKernelGetTickCount(count)\n#endif\n\n/**\n  \\brief  Event on RTOS kernel tick frequency retrieve (API)\n  \\param[in]  freq          frequency of the kernel tick.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_GET_TICK_FREQ_DISABLE))\nextern void EvrRtxKernelGetTickFreq (uint32_t freq);\n#else\n#define EvrRtxKernelGetTickFreq(freq)\n#endif\n\n/**\n  \\brief  Event on RTOS kernel system timer count retrieve (API)\n  \\param[in]  count         RTOS kernel current system timer count as 32-bit value.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_GET_SYS_TIMER_COUNT_DISABLE))\nextern void EvrRtxKernelGetSysTimerCount (uint32_t count);\n#else\n#define EvrRtxKernelGetSysTimerCount(count)\n#endif\n\n/**\n  \\brief  Event on RTOS kernel system timer frequency retrieve (API)\n  \\param[in]  freq          frequency of the system timer.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_GET_SYS_TIMER_FREQ_DISABLE))\nextern void EvrRtxKernelGetSysTimerFreq (uint32_t freq);\n#else\n#define EvrRtxKernelGetSysTimerFreq(freq)\n#endif\n\n\n//  ==== Thread Events ====\n\n/**\n  \\brief  Event on thread error (Error)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId or NULL when ID is unknown.\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_ERROR_DISABLE))\nextern void EvrRtxThreadError (osThreadId_t thread_id, int32_t status);\n#else\n#define EvrRtxThreadError(thread_id, status)\n#endif\n\n/**\n  \\brief  Event on thread create and intialize (API)\n  \\param[in]  func          thread function.\n  \\param[in]  argument      pointer that is passed to the thread function as start argument.\n  \\param[in]  attr          thread attributes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_NEW_DISABLE))\nextern void EvrRtxThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr);\n#else\n#define EvrRtxThreadNew(func, argument, attr)\n#endif\n\n/**\n  \\brief  Event on successful thread create (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  thread_addr   thread entry address.\n  \\param[in]  name          pointer to thread object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_CREATED_DISABLE))\nextern void EvrRtxThreadCreated (osThreadId_t thread_id, uint32_t thread_addr, const char *name);\n#else\n#define EvrRtxThreadCreated(thread_id, thread_addr, name)\n#endif\n\n/**\n  \\brief  Event on thread name retrieve (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  name          pointer to thread object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_GET_NAME_DISABLE))\nextern void EvrRtxThreadGetName (osThreadId_t thread_id, const char *name);\n#else\n#define EvrRtxThreadGetName(thread_id, name)\n#endif\n\n/**\n  \\brief  Event on current running thread ID retrieve (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_GET_ID_DISABLE))\nextern void EvrRtxThreadGetId (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadGetId(thread_id)\n#endif\n\n/**\n  \\brief  Event on thread state retrieve (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  state         current thread state of the specified thread.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_GET_STATE_DISABLE))\nextern void EvrRtxThreadGetState (osThreadId_t thread_id, osThreadState_t state);\n#else\n#define EvrRtxThreadGetState(thread_id, state)\n#endif\n\n/**\n  \\brief  Event on thread stack size retrieve (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  stack_size    stack size in bytes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_GET_STACK_SIZE_DISABLE))\nextern void EvrRtxThreadGetStackSize (osThreadId_t thread_id, uint32_t stack_size);\n#else\n#define EvrRtxThreadGetStackSize(thread_id, stack_size)\n#endif\n\n/**\n  \\brief  Event on available stack space retrieve (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  stack_space   remaining stack space in bytes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_GET_STACK_SPACE_DISABLE))\nextern void EvrRtxThreadGetStackSpace (osThreadId_t thread_id, uint32_t stack_space);\n#else\n#define EvrRtxThreadGetStackSpace(thread_id, stack_space)\n#endif\n\n/**\n  \\brief  Event on thread priority set (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  priority      new priority value for the thread function.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_SET_PRIORITY_DISABLE))\nextern void EvrRtxThreadSetPriority (osThreadId_t thread_id, osPriority_t priority);\n#else\n#define EvrRtxThreadSetPriority(thread_id, priority)\n#endif\n\n/**\n  \\brief  Event on thread priority updated (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  priority      new priority value for the thread function.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_PRIORITY_UPDATED_DISABLE))\nextern void EvrRtxThreadPriorityUpdated (osThreadId_t thread_id, osPriority_t priority);\n#else\n#define EvrRtxThreadPriorityUpdated(thread_id, priority)\n#endif\n\n/**\n  \\brief  Event on thread priority retrieve (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  priority      current priority value of the specified thread.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_GET_PRIORITY_DISABLE))\nextern void EvrRtxThreadGetPriority (osThreadId_t thread_id, osPriority_t priority);\n#else\n#define EvrRtxThreadGetPriority(thread_id, priority)\n#endif\n\n/**\n  \\brief  Event on thread yield (API)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_YIELD_DISABLE))\nextern void EvrRtxThreadYield (void);\n#else\n#define EvrRtxThreadYield()\n#endif\n\n/**\n  \\brief  Event on thread suspend (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_SUSPEND_DISABLE))\nextern void EvrRtxThreadSuspend (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadSuspend(thread_id)\n#endif\n\n/**\n  \\brief  Event on successful thread suspend (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_SUSPENDED_DISABLE))\nextern void EvrRtxThreadSuspended (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadSuspended(thread_id)\n#endif\n\n/**\n  \\brief  Event on thread resume (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_RESUME_DISABLE))\nextern void EvrRtxThreadResume (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadResume(thread_id)\n#endif\n\n/**\n  \\brief  Event on successful thread resume (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_RESUMED_DISABLE))\nextern void EvrRtxThreadResumed (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadResumed(thread_id)\n#endif\n\n/**\n  \\brief  Event on thread detach (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_DETACH_DISABLE))\nextern void EvrRtxThreadDetach (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadDetach(thread_id)\n#endif\n\n/**\n  \\brief  Event on successful thread detach (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_DETACHED_DISABLE))\nextern void EvrRtxThreadDetached (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadDetached(thread_id)\n#endif\n\n/**\n  \\brief  Event on thread join (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_JOIN_DISABLE))\nextern void EvrRtxThreadJoin (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadJoin(thread_id)\n#endif\n\n/**\n  \\brief  Event on pending thread join (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_JOIN_PENDING_DISABLE))\nextern void EvrRtxThreadJoinPending (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadJoinPending(thread_id)\n#endif\n\n/**\n  \\brief  Event on successful thread join (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_JOINED_DISABLE))\nextern void EvrRtxThreadJoined (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadJoined(thread_id)\n#endif\n\n/**\n  \\brief  Event on thread execution block (Detail)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_BLOCKED_DISABLE))\nextern void EvrRtxThreadBlocked (osThreadId_t thread_id, uint32_t timeout);\n#else\n#define EvrRtxThreadBlocked(thread_id, timeout)\n#endif\n\n/**\n  \\brief  Event on thread execution unblock (Detail)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  ret_val       extended execution status of the thread.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_UNBLOCKED_DISABLE))\nextern void EvrRtxThreadUnblocked (osThreadId_t thread_id, uint32_t ret_val);\n#else\n#define EvrRtxThreadUnblocked(thread_id, ret_val)\n#endif\n\n/**\n  \\brief  Event on running thread pre-emption (Detail)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_PREEMPTED_DISABLE))\nextern void EvrRtxThreadPreempted (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadPreempted(thread_id)\n#endif\n\n/**\n  \\brief  Event on running thread switch (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_SWITCHED_DISABLE))\nextern void EvrRtxThreadSwitched (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadSwitched(thread_id)\n#endif\n\n/**\n  \\brief  Event on thread exit (API)\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_EXIT_DISABLE))\nextern void EvrRtxThreadExit (void);\n#else\n#define EvrRtxThreadExit()\n#endif\n\n/**\n  \\brief  Event on thread terminate (API)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_TERMINATE_DISABLE))\nextern void EvrRtxThreadTerminate (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadTerminate(thread_id)\n#endif\n\n/**\n  \\brief  Event on successful thread terminate (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_DESTROYED_DISABLE))\nextern void EvrRtxThreadDestroyed (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadDestroyed(thread_id)\n#endif\n\n/**\n  \\brief  Event on active thread count retrieve (API)\n  \\param[in]  count         number of active threads.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_GET_COUNT_DISABLE))\nextern void EvrRtxThreadGetCount (uint32_t count);\n#else\n#define EvrRtxThreadGetCount(count)\n#endif\n\n/**\n  \\brief  Event on active threads enumerate (API)\n  \\param[in]  thread_array  pointer to array for retrieving thread IDs.\n  \\param[in]  array_items   maximum number of items in array for retrieving thread IDs.\n  \\param[in]  count         number of enumerated threads.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) && !defined(EVR_RTX_THREAD_ENUMERATE_DISABLE))\nextern void EvrRtxThreadEnumerate (osThreadId_t *thread_array, uint32_t array_items, uint32_t count);\n#else\n#define EvrRtxThreadEnumerate(thread_array, array_items, count)\n#endif\n\n\n//  ==== Thread Flags Events ====\n\n/**\n  \\brief  Event on thread flags error (Error)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId or NULL when ID is unknown.\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_ERROR_DISABLE))\nextern void EvrRtxThreadFlagsError (osThreadId_t thread_id, int32_t status);\n#else\n#define EvrRtxThreadFlagsError(thread_id, status)\n#endif\n\n/**\n  \\brief  Event on thread flags set (API)\n  \\param[in]   thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]   flags         flags of the thread that shall be set.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_SET_DISABLE))\nextern void EvrRtxThreadFlagsSet (osThreadId_t thread_id, uint32_t flags);\n#else\n#define EvrRtxThreadFlagsSet(thread_id, flags)\n#endif\n\n/**\n  \\brief  Event on successful thread flags set (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n  \\param[in]  thread_flags  thread flags after setting.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_SET_DONE_DISABLE))\nextern void EvrRtxThreadFlagsSetDone (osThreadId_t thread_id, uint32_t thread_flags);\n#else\n#define EvrRtxThreadFlagsSetDone(thread_id, thread_flags)\n#endif\n\n/**\n  \\brief  Event on thread flags clear (API)\n  \\param[in]  flags         flags of the thread that shall be cleared.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_CLEAR_DISABLE))\nextern void EvrRtxThreadFlagsClear (uint32_t flags);\n#else\n#define EvrRtxThreadFlagsClear(flags)\n#endif\n\n/**\n  \\brief  Event on successful thread flags clear (Op)\n  \\param[in]  thread_flags  thread flags before clearing.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_CLEAR_DONE_DISABLE))\nextern void EvrRtxThreadFlagsClearDone (uint32_t thread_flags);\n#else\n#define EvrRtxThreadFlagsClearDone(thread_flags)\n#endif\n\n/**\n  \\brief  Event on thread flags retrieve (API)\n  \\param[in]  thread_flags  current thread flags.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_GET_DISABLE))\nextern void EvrRtxThreadFlagsGet (uint32_t thread_flags);\n#else\n#define EvrRtxThreadFlagsGet(thread_flags)\n#endif\n\n/**\n  \\brief  Event on wait for thread flags (API)\n  \\param[in]  flags         flags to wait for.\n  \\param[in]  options       flags options (osFlagsXxxx).\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_WAIT_DISABLE))\nextern void EvrRtxThreadFlagsWait (uint32_t flags, uint32_t options, uint32_t timeout);\n#else\n#define EvrRtxThreadFlagsWait(flags, options, timeout)\n#endif\n\n/**\n  \\brief  Event on pending wait for thread flags (Op)\n  \\param[in]  flags         flags to wait for.\n  \\param[in]  options       flags options (osFlagsXxxx).\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_WAIT_PENDING_DISABLE))\nextern void EvrRtxThreadFlagsWaitPending (uint32_t flags, uint32_t options, uint32_t timeout);\n#else\n#define EvrRtxThreadFlagsWaitPending(flags, options, timeout)\n#endif\n\n/**\n  \\brief  Event on wait timeout for thread flags (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_WAIT_TIMEOUT_DISABLE))\nextern void EvrRtxThreadFlagsWaitTimeout (osThreadId_t thread_id);\n#else\n#define EvrRtxThreadFlagsWaitTimeout(thread_id)\n#endif\n\n/**\n  \\brief  Event on successful wait for thread flags (Op)\n  \\param[in]  flags         flags to wait for.\n  \\param[in]  options       flags options (osFlagsXxxx).\n  \\param[in]  thread_flags  thread flags before clearing.\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_WAIT_COMPLETED_DISABLE))\nextern void EvrRtxThreadFlagsWaitCompleted (uint32_t flags, uint32_t options, uint32_t thread_flags, osThreadId_t thread_id);\n#else\n#define EvrRtxThreadFlagsWaitCompleted(flags, options, thread_flags, thread_id)\n#endif\n\n/**\n  \\brief  Event on unsuccessful wait for thread flags (Op)\n  \\param[in]  flags         flags to wait for.\n  \\param[in]  options       flags options (osFlagsXxxx).\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) && !defined(EVR_RTX_THREAD_FLAGS_WAIT_NOT_COMPLETED_DISABLE))\nextern void EvrRtxThreadFlagsWaitNotCompleted (uint32_t flags, uint32_t options);\n#else\n#define EvrRtxThreadFlagsWaitNotCompleted(flags, options)\n#endif\n\n\n//  ==== Generic Wait Events ====\n\n/**\n  \\brief  Event on delay error (Error)\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) && !defined(EVR_RTX_DELAY_ERROR_DISABLE))\nextern void EvrRtxDelayError (int32_t status);\n#else\n#define EvrRtxDelayError(status)\n#endif\n\n/**\n  \\brief  Event on delay for specified time (API)\n  \\param[in]  ticks         \\ref CMSIS_RTOS_TimeOutValue \"time ticks\" value.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) && !defined(EVR_RTX_DELAY_DISABLE))\nextern void EvrRtxDelay (uint32_t ticks);\n#else\n#define EvrRtxDelay(ticks)\n#endif\n\n/**\n  \\brief  Event on delay until specified time (API)\n  \\param[in]  ticks         absolute time in ticks.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) && !defined(EVR_RTX_DELAY_UNTIL_DISABLE))\nextern void EvrRtxDelayUntil (uint32_t ticks);\n#else\n#define EvrRtxDelayUntil(ticks)\n#endif\n\n/**\n  \\brief  Event on delay started (Op)\n  \\param[in]  ticks         \\ref CMSIS_RTOS_TimeOutValue \"time ticks\" value.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) && !defined(EVR_RTX_DELAY_STARTED_DISABLE))\nextern void EvrRtxDelayStarted (uint32_t ticks);\n#else\n#define EvrRtxDelayStarted(ticks)\n#endif\n\n/**\n  \\brief  Event on delay until specified time started (Op)\n  \\param[in]  ticks         \\ref CMSIS_RTOS_TimeOutValue \"time ticks\" value.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) && !defined(EVR_RTX_DELAY_UNTIL_STARTED_DISABLE))\nextern void EvrRtxDelayUntilStarted (uint32_t ticks);\n#else\n#define EvrRtxDelayUntilStarted(ticks)\n#endif\n\n/**\n  \\brief  Event on delay completed (Op)\n  \\param[in]  thread_id     thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) && !defined(EVR_RTX_DELAY_COMPLETED_DISABLE))\nextern void EvrRtxDelayCompleted (osThreadId_t thread_id);\n#else\n#define EvrRtxDelayCompleted(thread_id)\n#endif\n\n\n//  ==== Timer Events ====\n\n/**\n  \\brief  Event on timer error (Error)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew or NULL when ID is unknown.\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_ERROR_DISABLE))\nextern void EvrRtxTimerError (osTimerId_t timer_id, int32_t status);\n#else\n#define EvrRtxTimerError(timer_id, status)\n#endif\n\n/**\n  \\brief  Event on timer callback call (Op)\n  \\param[in]  func          start address of a timer call back function.\n  \\param[in]  argument      argument to the timer call back function.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_CALLBACK_DISABLE))\nextern void EvrRtxTimerCallback (osTimerFunc_t func, void *argument);\n#else\n#define EvrRtxTimerCallback(func, argument)\n#endif\n\n/**\n  \\brief  Event on timer create and initialize (API)\n  \\param[in]  func          start address of a timer call back function.\n  \\param[in]  type          osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.\n  \\param[in]  argument      argument to the timer call back function.\n  \\param[in]  attr          timer attributes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_NEW_DISABLE))\nextern void EvrRtxTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr);\n#else\n#define EvrRtxTimerNew(func, type, argument, attr)\n#endif\n\n/**\n  \\brief  Event on successful timer create (Op)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n  \\param[in]  name          pointer to timer object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_CREATED_DISABLE))\nextern void EvrRtxTimerCreated (osTimerId_t timer_id, const char *name);\n#else\n#define EvrRtxTimerCreated(timer_id, name)\n#endif\n\n/**\n  \\brief  Event on timer name retrieve (API)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n  \\param[in]  name          pointer to timer object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_GET_NAME_DISABLE))\nextern void EvrRtxTimerGetName (osTimerId_t timer_id, const char *name);\n#else\n#define EvrRtxTimerGetName(timer_id, name)\n#endif\n\n/**\n  \\brief  Event on timer start (API)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n  \\param[in]  ticks         \\ref CMSIS_RTOS_TimeOutValue \"time ticks\" value of the timer.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_START_DISABLE))\nextern void EvrRtxTimerStart (osTimerId_t timer_id, uint32_t ticks);\n#else\n#define EvrRtxTimerStart(timer_id, ticks)\n#endif\n\n/**\n  \\brief  Event on successful timer start (Op)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_STARTED_DISABLE))\nextern void EvrRtxTimerStarted (osTimerId_t timer_id);\n#else\n#define EvrRtxTimerStarted(timer_id)\n#endif\n\n/**\n  \\brief  Event on timer stop (API)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_STOP_DISABLE))\nextern void EvrRtxTimerStop (osTimerId_t timer_id);\n#else\n#define EvrRtxTimerStop(timer_id)\n#endif\n\n/**\n  \\brief  Event on successful timer stop (Op)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_STOPPED_DISABLE))\nextern void EvrRtxTimerStopped (osTimerId_t timer_id);\n#else\n#define EvrRtxTimerStopped(timer_id)\n#endif\n\n/**\n  \\brief  Event on timer running state check (API)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n  \\param[in]  running       running state: 0 not running, 1 running.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_IS_RUNNING_DISABLE))\nextern void EvrRtxTimerIsRunning (osTimerId_t timer_id, uint32_t running);\n#else\n#define EvrRtxTimerIsRunning(timer_id, running)\n#endif\n\n/**\n  \\brief  Event on timer delete (API)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_DELETE_DISABLE))\nextern void EvrRtxTimerDelete (osTimerId_t timer_id);\n#else\n#define EvrRtxTimerDelete(timer_id)\n#endif\n\n/**\n  \\brief  Event on successful timer delete (Op)\n  \\param[in]  timer_id      timer ID obtained by \\ref osTimerNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) && !defined(EVR_RTX_TIMER_DESTROYED_DISABLE))\nextern void EvrRtxTimerDestroyed (osTimerId_t timer_id);\n#else\n#define EvrRtxTimerDestroyed(timer_id)\n#endif\n\n\n//  ==== Event Flags Events ====\n\n/**\n  \\brief  Event on event flags error (Error)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew or NULL when ID is unknown.\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_ERROR_DISABLE))\nextern void EvrRtxEventFlagsError (osEventFlagsId_t ef_id, int32_t status);\n#else\n#define EvrRtxEventFlagsError(ef_id, status)\n#endif\n\n/**\n  \\brief  Event on event flags create and initialize (API)\n  \\param[in]  attr          event flags attributes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_NEW_DISABLE))\nextern void EvrRtxEventFlagsNew (const osEventFlagsAttr_t *attr);\n#else\n#define EvrRtxEventFlagsNew(attr)\n#endif\n\n/**\n  \\brief  Event on successful event flags create (Op)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  name          pointer to event flags object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_CREATED_DISABLE))\nextern void EvrRtxEventFlagsCreated (osEventFlagsId_t ef_id, const char *name);\n#else\n#define EvrRtxEventFlagsCreated(ef_id, name)\n#endif\n\n/**\n  \\brief  Event on event flags name retrieve (API)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  name          pointer to event flags object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_GET_NAME_DISABLE))\nextern void EvrRtxEventFlagsGetName (osEventFlagsId_t ef_id, const char *name);\n#else\n#define EvrRtxEventFlagsGetName(ef_id, name)\n#endif\n\n/**\n  \\brief  Event on event flags set (API)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  flags         flags that shall be set.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_SET_DISABLE))\nextern void EvrRtxEventFlagsSet (osEventFlagsId_t ef_id, uint32_t flags);\n#else\n#define EvrRtxEventFlagsSet(ef_id, flags)\n#endif\n\n/**\n  \\brief  Event on successful event flags set (Op)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  event_flags   event flags after setting.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_SET_DONE_DISABLE))\nextern void EvrRtxEventFlagsSetDone (osEventFlagsId_t ef_id, uint32_t event_flags);\n#else\n#define EvrRtxEventFlagsSetDone(ef_id, event_flags)\n#endif\n\n/**\n  \\brief  Event on event flags clear (API)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  flags         flags that shall be cleared.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_CLEAR_DISABLE))\nextern void EvrRtxEventFlagsClear (osEventFlagsId_t ef_id, uint32_t flags);\n#else\n#define EvrRtxEventFlagsClear(ef_id, flags)\n#endif\n\n/**\n  \\brief  Event on successful event flags clear (Op)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  event_flags   event flags before clearing.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_CLEAR_DONE_DISABLE))\nextern void EvrRtxEventFlagsClearDone (osEventFlagsId_t ef_id, uint32_t event_flags);\n#else\n#define EvrRtxEventFlagsClearDone(ef_id, event_flags)\n#endif\n\n/**\n  \\brief  Event on event flags retrieve (API)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  event_flags   current event flags.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_GET_DISABLE))\nextern void EvrRtxEventFlagsGet (osEventFlagsId_t ef_id, uint32_t event_flags);\n#else\n#define EvrRtxEventFlagsGet(ef_id, event_flags)\n#endif\n\n/**\n  \\brief  Event on wait for event flags (API)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  flags         flags to wait for.\n  \\param[in]  options       flags options (osFlagsXxxx).\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_WAIT_DISABLE))\nextern void EvrRtxEventFlagsWait (osEventFlagsId_t ef_id, uint32_t flags, uint32_t options, uint32_t timeout);\n#else\n#define EvrRtxEventFlagsWait(ef_id, flags, options, timeout)\n#endif\n\n/**\n  \\brief  Event on pending wait for event flags (Op)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  flags         flags to wait for.\n  \\param[in]  options       flags options (osFlagsXxxx).\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_WAIT_PENDING_DISABLE))\nextern void EvrRtxEventFlagsWaitPending (osEventFlagsId_t ef_id, uint32_t flags, uint32_t options, uint32_t timeout);\n#else\n#define EvrRtxEventFlagsWaitPending(ef_id, flags, options, timeout)\n#endif\n\n/**\n  \\brief  Event on wait timeout for event flags (Op)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_WAIT_TIMEOUT_DISABLE))\nextern void EvrRtxEventFlagsWaitTimeout (osEventFlagsId_t ef_id);\n#else\n#define EvrRtxEventFlagsWaitTimeout(ef_id)\n#endif\n\n/**\n  \\brief  Event on successful wait for event flags (Op)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  flags         flags to wait for.\n  \\param[in]  options       flags options (osFlagsXxxx).\n  \\param[in]  event_flags   event flags before clearing or 0 if specified flags have not been set.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_WAIT_COMPLETED_DISABLE))\nextern void EvrRtxEventFlagsWaitCompleted (osEventFlagsId_t ef_id, uint32_t flags, uint32_t options, uint32_t event_flags);\n#else\n#define EvrRtxEventFlagsWaitCompleted(ef_id, flags, options, event_flags)\n#endif\n\n/**\n  \\brief  Event on unsuccessful wait for event flags (Op)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n  \\param[in]  flags         flags to wait for.\n  \\param[in]  options       flags options (osFlagsXxxx).\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_WAIT_NOT_COMPLETED_DISABLE))\nextern void EvrRtxEventFlagsWaitNotCompleted (osEventFlagsId_t ef_id, uint32_t flags, uint32_t options);\n#else\n#define EvrRtxEventFlagsWaitNotCompleted(ef_id, flags, options)\n#endif\n\n/**\n  \\brief  Event on event flags delete (API)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_DELETE_DISABLE))\nextern void EvrRtxEventFlagsDelete (osEventFlagsId_t ef_id);\n#else\n#define EvrRtxEventFlagsDelete(ef_id)\n#endif\n\n/**\n  \\brief  Event on successful event flags delete (Op)\n  \\param[in]  ef_id         event flags ID obtained by \\ref osEventFlagsNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) && !defined(EVR_RTX_EVENT_FLAGS_DESTROYED_DISABLE))\nextern void EvrRtxEventFlagsDestroyed (osEventFlagsId_t ef_id);\n#else\n#define EvrRtxEventFlagsDestroyed(ef_id)\n#endif\n\n\n//  ==== Mutex Events ====\n\n/**\n  \\brief  Event on mutex error (Error)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew or NULL when ID is unknown.\n  \\param[in]  status    extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_ERROR_DISABLE))\nextern void EvrRtxMutexError (osMutexId_t mutex_id, int32_t status);\n#else\n#define EvrRtxMutexError(mutex_id, status)\n#endif\n\n/**\n  \\brief  Event on mutex create and initialize (API)\n  \\param[in]  attr      mutex attributes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_NEW_DISABLE))\nextern void EvrRtxMutexNew (const osMutexAttr_t *attr);\n#else\n#define EvrRtxMutexNew(attr)\n#endif\n\n/**\n  \\brief  Event on successful mutex create (Op)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n  \\param[in]  name      pointer to mutex object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_CREATED_DISABLE))\nextern void EvrRtxMutexCreated (osMutexId_t mutex_id, const char *name);\n#else\n#define EvrRtxMutexCreated(mutex_id, name)\n#endif\n\n/**\n  \\brief  Event on mutex name retrieve (API)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n  \\param[in]  name      pointer to mutex object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_GET_NAME_DISABLE))\nextern void EvrRtxMutexGetName (osMutexId_t mutex_id, const char *name);\n#else\n#define EvrRtxMutexGetName(mutex_id, name)\n#endif\n\n/**\n  \\brief  Event on mutex acquire (API)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n  \\param[in]  timeout   \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_ACQUIRE_DISABLE))\nextern void EvrRtxMutexAcquire (osMutexId_t mutex_id, uint32_t timeout);\n#else\n#define EvrRtxMutexAcquire(mutex_id, timeout)\n#endif\n\n/**\n  \\brief  Event on pending mutex acquire (Op)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n  \\param[in]  timeout   \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_ACQUIRE_PENDING_DISABLE))\nextern void EvrRtxMutexAcquirePending (osMutexId_t mutex_id, uint32_t timeout);\n#else\n#define EvrRtxMutexAcquirePending(mutex_id, timeout)\n#endif\n\n/**\n  \\brief  Event on mutex acquire timeout (Op)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_ACQUIRE_TIMEOUT_DISABLE))\nextern void EvrRtxMutexAcquireTimeout (osMutexId_t mutex_id);\n#else\n#define EvrRtxMutexAcquireTimeout(mutex_id)\n#endif\n\n/**\n  \\brief  Event on successful mutex acquire (Op)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n  \\param[in]  lock      current number of times mutex object is locked.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_ACQUIRED_DISABLE))\nextern void EvrRtxMutexAcquired (osMutexId_t mutex_id, uint32_t lock);\n#else\n#define EvrRtxMutexAcquired(mutex_id, lock)\n#endif\n\n/**\n  \\brief  Event on unsuccessful mutex acquire (Op)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_NOT_ACQUIRED_DISABLE))\nextern void EvrRtxMutexNotAcquired (osMutexId_t mutex_id);\n#else\n#define EvrRtxMutexNotAcquired(mutex_id)\n#endif\n\n/**\n  \\brief  Event on mutex release (API)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_RELEASE_DISABLE))\nextern void EvrRtxMutexRelease (osMutexId_t mutex_id);\n#else\n#define EvrRtxMutexRelease(mutex_id)\n#endif\n\n/**\n  \\brief  Event on successful mutex release (Op)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n  \\param[in]  lock      current number of times mutex object is locked.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_RELEASED_DISABLE))\nextern void EvrRtxMutexReleased (osMutexId_t mutex_id, uint32_t lock);\n#else\n#define EvrRtxMutexReleased(mutex_id, lock)\n#endif\n\n/**\n  \\brief  Event on mutex owner retrieve (API)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n  \\param[in]  thread_id thread ID obtained by \\ref osThreadNew or \\ref osThreadGetId.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_GET_OWNER_DISABLE))\nextern void EvrRtxMutexGetOwner (osMutexId_t mutex_id, osThreadId_t thread_id);\n#else\n#define EvrRtxMutexGetOwner(mutex_id, thread_id)\n#endif\n\n/**\n  \\brief  Event on mutex delete (API)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_DELETE_DISABLE))\nextern void EvrRtxMutexDelete (osMutexId_t mutex_id);\n#else\n#define EvrRtxMutexDelete(mutex_id)\n#endif\n\n/**\n  \\brief  Event on successful mutex delete (Op)\n  \\param[in]  mutex_id  mutex ID obtained by \\ref osMutexNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) && !defined(EVR_RTX_MUTEX_DESTROYED_DISABLE))\nextern void EvrRtxMutexDestroyed (osMutexId_t mutex_id);\n#else\n#define EvrRtxMutexDestroyed(mutex_id)\n#endif\n\n\n//  ==== Semaphore Events ====\n\n/**\n  \\brief  Event on semaphore error (Error)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew or NULL when ID is unknown.\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_ERROR_DISABLE))\nextern void EvrRtxSemaphoreError (osSemaphoreId_t semaphore_id, int32_t status);\n#else\n#define EvrRtxSemaphoreError(semaphore_id, status)\n#endif\n\n/**\n  \\brief  Event on semaphore create and initialize (API)\n  \\param[in]  max_count     maximum number of available tokens.\n  \\param[in]  initial_count initial number of available tokens.\n  \\param[in]  attr          semaphore attributes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_NEW_DISABLE))\nextern void EvrRtxSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr);\n#else\n#define EvrRtxSemaphoreNew(max_count, initial_count, attr)\n#endif\n\n/**\n  \\brief  Event on successful semaphore create (Op)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n  \\param[in]  name          pointer to semaphore object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_CREATED_DISABLE))\nextern void EvrRtxSemaphoreCreated (osSemaphoreId_t semaphore_id, const char *name);\n#else\n#define EvrRtxSemaphoreCreated(semaphore_id, name)\n#endif\n\n/**\n  \\brief  Event on semaphore name retrieve (API)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n  \\param[in]  name          pointer to semaphore object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_GET_NAME_DISABLE))\nextern void EvrRtxSemaphoreGetName (osSemaphoreId_t semaphore_id, const char *name);\n#else\n#define EvrRtxSemaphoreGetName(semaphore_id, name)\n#endif\n\n/**\n  \\brief  Event on semaphore acquire (API)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_ACQUIRE_DISABLE))\nextern void EvrRtxSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout);\n#else\n#define EvrRtxSemaphoreAcquire(semaphore_id, timeout)\n#endif\n\n/**\n  \\brief  Event on pending semaphore acquire (Op)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_ACQUIRE_PENDING_DISABLE))\nextern void EvrRtxSemaphoreAcquirePending (osSemaphoreId_t semaphore_id, uint32_t timeout);\n#else\n#define EvrRtxSemaphoreAcquirePending(semaphore_id, timeout)\n#endif\n\n/**\n  \\brief  Event on semaphore acquire timeout (Op)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_ACQUIRE_TIMEOUT_DISABLE))\nextern void EvrRtxSemaphoreAcquireTimeout (osSemaphoreId_t semaphore_id);\n#else\n#define EvrRtxSemaphoreAcquireTimeout(semaphore_id)\n#endif\n\n/**\n  \\brief  Event on successful semaphore acquire (Op)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n  \\param[in]  tokens        number of available tokens.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_ACQUIRED_DISABLE))\nextern void EvrRtxSemaphoreAcquired (osSemaphoreId_t semaphore_id, uint32_t tokens);\n#else\n#define EvrRtxSemaphoreAcquired(semaphore_id, tokens)\n#endif\n\n/**\n  \\brief  Event on unsuccessful semaphore acquire (Op)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_NOT_ACQUIRED_DISABLE))\nextern void EvrRtxSemaphoreNotAcquired (osSemaphoreId_t semaphore_id);\n#else\n#define EvrRtxSemaphoreNotAcquired(semaphore_id)\n#endif\n\n/**\n  \\brief  Event on semaphore release (API)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_RELEASE_DISABLE))\nextern void EvrRtxSemaphoreRelease (osSemaphoreId_t semaphore_id);\n#else\n#define EvrRtxSemaphoreRelease(semaphore_id)\n#endif\n\n/**\n  \\brief  Event on successful semaphore release (Op)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n  \\param[in]  tokens        number of available tokens.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_RELEASED_DISABLE))\nextern void EvrRtxSemaphoreReleased (osSemaphoreId_t semaphore_id, uint32_t tokens);\n#else\n#define EvrRtxSemaphoreReleased(semaphore_id, tokens)\n#endif\n\n/**\n  \\brief  Event on semaphore token count retrieval (API)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n  \\param[in]  count         current number of available tokens.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_GET_COUNT_DISABLE))\nextern void EvrRtxSemaphoreGetCount (osSemaphoreId_t semaphore_id, uint32_t count);\n#else\n#define EvrRtxSemaphoreGetCount(semaphore_id, count)\n#endif\n\n/**\n  \\brief  Event on semaphore delete (API)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_DELETE_DISABLE))\nextern void EvrRtxSemaphoreDelete (osSemaphoreId_t semaphore_id);\n#else\n#define EvrRtxSemaphoreDelete(semaphore_id)\n#endif\n\n/**\n  \\brief  Event on successful semaphore delete (Op)\n  \\param[in]  semaphore_id  semaphore ID obtained by \\ref osSemaphoreNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) && !defined(EVR_RTX_SEMAPHORE_DESTROYED_DISABLE))\nextern void EvrRtxSemaphoreDestroyed (osSemaphoreId_t semaphore_id);\n#else\n#define EvrRtxSemaphoreDestroyed(semaphore_id)\n#endif\n\n\n//  ==== Memory Pool Events ====\n\n/**\n  \\brief  Event on memory pool error (Error)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew or NULL when ID is unknown.\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_ERROR_DISABLE))\nextern void EvrRtxMemoryPoolError (osMemoryPoolId_t mp_id, int32_t status);\n#else\n#define EvrRtxMemoryPoolError(mp_id, status)\n#endif\n\n/**\n  \\brief  Event on memory pool create and initialize (API)\n  \\param[in]  block_count   maximum number of memory blocks in memory pool.\n  \\param[in]  block_size    memory block size in bytes.\n  \\param[in]  attr          memory pool attributes; NULL: default values.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_NEW_DISABLE))\nextern void EvrRtxMemoryPoolNew (uint32_t block_count, uint32_t block_size, const osMemoryPoolAttr_t *attr);\n#else\n#define EvrRtxMemoryPoolNew(block_count, block_size, attr)\n#endif\n\n/**\n  \\brief  Event on successful memory pool create (Op)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  name          pointer to memory pool object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_CREATED_DISABLE))\nextern void EvrRtxMemoryPoolCreated (osMemoryPoolId_t mp_id, const char *name);\n#else\n#define EvrRtxMemoryPoolCreated(mp_id, name)\n#endif\n\n/**\n  \\brief  Event on memory pool name retrieve (API)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  name          pointer to memory pool object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_GET_NAME_DISABLE))\nextern void EvrRtxMemoryPoolGetName (osMemoryPoolId_t mp_id, const char *name);\n#else\n#define EvrRtxMemoryPoolGetName(mp_id, name)\n#endif\n\n/**\n  \\brief  Event on memory pool allocation (API)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_ALLOC_DISABLE))\nextern void EvrRtxMemoryPoolAlloc (osMemoryPoolId_t mp_id, uint32_t timeout);\n#else\n#define EvrRtxMemoryPoolAlloc(mp_id, timeout)\n#endif\n\n/**\n  \\brief  Event on pending memory pool allocation (Op)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_ALLOC_PENDING_DISABLE))\nextern void EvrRtxMemoryPoolAllocPending (osMemoryPoolId_t mp_id, uint32_t timeout);\n#else\n#define EvrRtxMemoryPoolAllocPending(mp_id, timeout)\n#endif\n\n/**\n  \\brief  Event on memory pool allocation timeout (Op)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_ALLOC_TIMEOUT_DISABLE))\nextern void EvrRtxMemoryPoolAllocTimeout (osMemoryPoolId_t mp_id);\n#else\n#define EvrRtxMemoryPoolAllocTimeout(mp_id)\n#endif\n\n/**\n  \\brief  Event on successful memory pool allocation (Op)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  block         address of the allocated memory block.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_ALLOCATED_DISABLE))\nextern void EvrRtxMemoryPoolAllocated (osMemoryPoolId_t mp_id, void *block);\n#else\n#define EvrRtxMemoryPoolAllocated(mp_id, block)\n#endif\n\n/**\n  \\brief  Event on unsuccessful memory pool allocation (Op)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_ALLOC_FAILED_DISABLE))\nextern void EvrRtxMemoryPoolAllocFailed (osMemoryPoolId_t mp_id);\n#else\n#define EvrRtxMemoryPoolAllocFailed(mp_id)\n#endif\n\n/**\n  \\brief  Event on memory pool free (API)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  block         address of the allocated memory block to be returned to the memory pool.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_FREE_DISABLE))\nextern void EvrRtxMemoryPoolFree (osMemoryPoolId_t mp_id, void *block);\n#else\n#define EvrRtxMemoryPoolFree(mp_id, block)\n#endif\n\n/**\n  \\brief  Event on successful memory pool free (Op)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  block         address of the allocated memory block to be returned to the memory pool.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_DEALLOCATED_DISABLE))\nextern void EvrRtxMemoryPoolDeallocated (osMemoryPoolId_t mp_id, void *block);\n#else\n#define EvrRtxMemoryPoolDeallocated(mp_id, block)\n#endif\n\n/**\n  \\brief  Event on unsuccessful memory pool free (Op)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  block         address of the allocated memory block to be returned to the memory pool.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_FREE_FAILED_DISABLE))\nextern void EvrRtxMemoryPoolFreeFailed (osMemoryPoolId_t mp_id, void *block);\n#else\n#define EvrRtxMemoryPoolFreeFailed(mp_id, block)\n#endif\n\n/**\n  \\brief  Event on memory pool capacity retrieve (API)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  capacity      maximum number of memory blocks.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_GET_CAPACITY_DISABLE))\nextern void EvrRtxMemoryPoolGetCapacity (osMemoryPoolId_t mp_id, uint32_t capacity);\n#else\n#define EvrRtxMemoryPoolGetCapacity(mp_id, capacity)\n#endif\n\n/**\n  \\brief  Event on memory pool block size retrieve (API)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  block_size    memory block size in bytes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_GET_BLOCK_SZIE_DISABLE))\nextern void EvrRtxMemoryPoolGetBlockSize (osMemoryPoolId_t mp_id, uint32_t block_size);\n#else\n#define EvrRtxMemoryPoolGetBlockSize(mp_id, block_size)\n#endif\n\n/**\n  \\brief  Event on used memory pool blocks retrieve (API)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  count         number of memory blocks used.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_GET_COUNT_DISABLE))\nextern void EvrRtxMemoryPoolGetCount (osMemoryPoolId_t mp_id, uint32_t count);\n#else\n#define EvrRtxMemoryPoolGetCount(mp_id, count)\n#endif\n\n/**\n  \\brief  Event on available memory pool blocks retrieve (API)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n  \\param[in]  space         number of memory blocks available.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_GET_SPACE_DISABLE))\nextern void EvrRtxMemoryPoolGetSpace (osMemoryPoolId_t mp_id, uint32_t space);\n#else\n#define EvrRtxMemoryPoolGetSpace(mp_id, space)\n#endif\n\n/**\n  \\brief  Event on memory pool delete (API)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_DELETE_DISABLE))\nextern void EvrRtxMemoryPoolDelete (osMemoryPoolId_t mp_id);\n#else\n#define EvrRtxMemoryPoolDelete(mp_id)\n#endif\n\n/**\n  \\brief  Event on successful memory pool delete (Op)\n  \\param[in]  mp_id         memory pool ID obtained by \\ref osMemoryPoolNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) && !defined(EVR_RTX_MEMORY_POOL_DESTROYED_DISABLE))\nextern void EvrRtxMemoryPoolDestroyed (osMemoryPoolId_t mp_id);\n#else\n#define EvrRtxMemoryPoolDestroyed(mp_id)\n#endif\n\n\n//  ==== Message Queue Events ====\n\n/**\n  \\brief  Event on message queue error (Error)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew or NULL when ID is unknown.\n  \\param[in]  status        extended execution status.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_ERROR_DISABLE))\nextern void EvrRtxMessageQueueError (osMessageQueueId_t mq_id, int32_t status);\n#else\n#define EvrRtxMessageQueueError(mq_id, status)\n#endif\n\n/**\n  \\brief  Event on message queue create and initialization (API)\n  \\param[in]  msg_count     maximum number of messages in queue.\n  \\param[in]  msg_size      maximum message size in bytes.\n  \\param[in]  attr          message queue attributes; NULL: default values.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_NEW_DISABLE))\nextern void EvrRtxMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr);\n#else\n#define EvrRtxMessageQueueNew(msg_count, msg_size, attr)\n#endif\n\n/**\n  \\brief  Event on successful message queue create (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  name          pointer to message queue object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_CREATED_DISABLE))\nextern void EvrRtxMessageQueueCreated (osMessageQueueId_t mq_id, const char *name);\n#else\n#define EvrRtxMessageQueueCreated(mq_id, name)\n#endif\n\n/**\n  \\brief  Event on message queue name retrieve(API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  name          pointer to message queue object name.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_GET_NAME_DISABLE))\nextern void EvrRtxMessageQueueGetName (osMessageQueueId_t mq_id, const char *name);\n#else\n#define EvrRtxMessageQueueGetName(mq_id, name)\n#endif\n\n/**\n  \\brief  Event on message put (API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer with message to put into a queue.\n  \\param[in]  msg_prio      message priority.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_PUT_DISABLE))\nextern void EvrRtxMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout);\n#else\n#define EvrRtxMessageQueuePut(mq_id, msg_ptr, msg_prio, timeout)\n#endif\n\n/**\n  \\brief  Event on pending message put (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer with message to put into a queue.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_PUT_PENDING_DISABLE))\nextern void EvrRtxMessageQueuePutPending (osMessageQueueId_t mq_id, const void *msg_ptr, uint32_t timeout);\n#else\n#define EvrRtxMessageQueuePutPending(mq_id, msg_ptr, timeout)\n#endif\n\n/**\n  \\brief  Event on message put timeout (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_PUT_TIMEOUT_DISABLE))\nextern void EvrRtxMessageQueuePutTimeout (osMessageQueueId_t mq_id);\n#else\n#define EvrRtxMessageQueuePutTimeout(mq_id)\n#endif\n\n/**\n  \\brief  Event on pending message insert (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer with message to put into a queue.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_INSERT_PENDING_DISABLE))\nextern void EvrRtxMessageQueueInsertPending (osMessageQueueId_t mq_id, const void *msg_ptr);\n#else\n#define EvrRtxMessageQueueInsertPending(mq_id, msg_ptr)\n#endif\n\n/**\n  \\brief  Event on successful message insert (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer with message to put into a queue.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_INSERTED_DISABLE))\nextern void EvrRtxMessageQueueInserted (osMessageQueueId_t mq_id, const void *msg_ptr);\n#else\n#define EvrRtxMessageQueueInserted(mq_id, msg_ptr)\n#endif\n\n/**\n  \\brief  Event on unsuccessful message insert (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer with message to put into a queue.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_NOT_INSERTED_DISABLE))\nextern void EvrRtxMessageQueueNotInserted (osMessageQueueId_t mq_id, const void *msg_ptr);\n#else\n#define EvrRtxMessageQueueNotInserted(mq_id, msg_ptr)\n#endif\n\n/**\n  \\brief  Event on message get (API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer for message to get from a queue.\n  \\param[in]  msg_prio      message priority.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_GET_DISABLE))\nextern void EvrRtxMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout);\n#else\n#define EvrRtxMessageQueueGet(mq_id, msg_ptr, msg_prio, timeout)\n#endif\n\n/**\n  \\brief  Event on pending message get (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer for message to get from a queue.\n  \\param[in]  timeout       \\ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_GET_PENDING_DISABLE))\nextern void EvrRtxMessageQueueGetPending (osMessageQueueId_t mq_id, void *msg_ptr, uint32_t timeout);\n#else\n#define EvrRtxMessageQueueGetPending(mq_id, msg_ptr, timeout)\n#endif\n\n/**\n  \\brief  Event on message get timeout (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_GET_TIMEOUT_DISABLE))\nextern void EvrRtxMessageQueueGetTimeout (osMessageQueueId_t mq_id);\n#else\n#define EvrRtxMessageQueueGetTimeout(mq_id)\n#endif\n\n/**\n  \\brief  Event on successful message get (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer for message to get from a queue.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_RETRIEVED_DISABLE))\nextern void EvrRtxMessageQueueRetrieved (osMessageQueueId_t mq_id, void *msg_ptr);\n#else\n#define EvrRtxMessageQueueRetrieved(mq_id, msg_ptr)\n#endif\n\n/**\n  \\brief  Event on unsuccessful message get (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_ptr       pointer to buffer for message to get from a queue.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_NOT_RETRIEVED_DISABLE))\nextern void EvrRtxMessageQueueNotRetrieved (osMessageQueueId_t mq_id, void *msg_ptr);\n#else\n#define EvrRtxMessageQueueNotRetrieved(mq_id, msg_ptr)\n#endif\n\n/**\n  \\brief  Event on message queue capacity retrieve (API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  capacity      maximum number of messages.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_GET_CAPACITY_DISABLE))\nextern void EvrRtxMessageQueueGetCapacity (osMessageQueueId_t mq_id, uint32_t capacity);\n#else\n#define EvrRtxMessageQueueGetCapacity(mq_id, capacity)\n#endif\n\n/**\n  \\brief  Event on message queue message size retrieve (API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  msg_size      maximum message size in bytes.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_GET_MSG_SIZE_DISABLE))\nextern void EvrRtxMessageQueueGetMsgSize (osMessageQueueId_t mq_id, uint32_t msg_size);\n#else\n#define EvrRtxMessageQueueGetMsgSize(mq_id, msg_size)\n#endif\n\n/**\n  \\brief  Event on message queue message count retrieve (API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  count         number of queued messages.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_GET_COUNT_DISABLE))\nextern void EvrRtxMessageQueueGetCount (osMessageQueueId_t mq_id, uint32_t count);\n#else\n#define EvrRtxMessageQueueGetCount(mq_id, count)\n#endif\n\n/**\n  \\brief  Event on message queue message slots retrieve (API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n  \\param[in]  space         number of available slots for messages.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_GET_SPACE_DISABLE))\nextern void EvrRtxMessageQueueGetSpace (osMessageQueueId_t mq_id, uint32_t space);\n#else\n#define EvrRtxMessageQueueGetSpace(mq_id, space)\n#endif\n\n/**\n  \\brief  Event on message queue reset (API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_RESET_DISABLE))\nextern void EvrRtxMessageQueueReset (osMessageQueueId_t mq_id);\n#else\n#define EvrRtxMessageQueueReset(mq_id)\n#endif\n\n/**\n  \\brief  Event on successful message queue reset (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_RESET_DONE_DISABLE))\nextern void EvrRtxMessageQueueResetDone (osMessageQueueId_t mq_id);\n#else\n#define EvrRtxMessageQueueResetDone(mq_id)\n#endif\n\n/**\n  \\brief  Event on message queue delete (API)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_DELETE_DISABLE))\nextern void EvrRtxMessageQueueDelete (osMessageQueueId_t mq_id);\n#else\n#define EvrRtxMessageQueueDelete(mq_id)\n#endif\n\n/**\n  \\brief  Event on successful message queue delete (Op)\n  \\param[in]  mq_id         message queue ID obtained by \\ref osMessageQueueNew.\n*/\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) && !defined(EVR_RTX_MESSAGE_QUEUE_DESTROYED_DISABLE))\nextern void EvrRtxMessageQueueDestroyed (osMessageQueueId_t mq_id);\n#else\n#define EvrRtxMessageQueueDestroyed(mq_id)\n#endif\n\n\n#endif  // RTX_EVR_H_\n"
  },
  {
    "path": "include/rtos/rtx5/rtx_os.h",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       RTX OS definitions\n *\n * -----------------------------------------------------------------------------\n */\n\n#ifndef RTX_OS_H_\n#define RTX_OS_H_\n\n#include \n#include \n#include \"cmsis_os2.h\"\n\n#ifdef  __cplusplus\nextern \"C\"\n{\n#endif\n\n\n/// Kernel Information\n#define osRtxVersionAPI      20010003   ///< API version (2.1.3)\n#define osRtxVersionKernel   50050001   ///< Kernel version (5.5.1)\n#define osRtxKernelId     \"RTX V5.5.1\"  ///< Kernel identification string\n\n\n//  ==== Common definitions ====\n\n/// Object Identifier definitions\n#define osRtxIdInvalid          0x00U\n#define osRtxIdThread           0xF1U\n#define osRtxIdTimer            0xF2U\n#define osRtxIdEventFlags       0xF3U\n#define osRtxIdMutex            0xF5U\n#define osRtxIdSemaphore        0xF6U\n#define osRtxIdMemoryPool       0xF7U\n#define osRtxIdMessage          0xF9U\n#define osRtxIdMessageQueue     0xFAU\n\n/// Object Flags definitions\n#define osRtxFlagSystemObject   0x01U\n#define osRtxFlagSystemMemory   0x02U\n\n\n//  ==== Kernel definitions ====\n\n/// Kernel State definitions\n#define osRtxKernelInactive             ((uint8_t)osKernelInactive)\n#define osRtxKernelReady                ((uint8_t)osKernelReady)\n#define osRtxKernelRunning              ((uint8_t)osKernelRunning)\n#define osRtxKernelLocked               ((uint8_t)osKernelLocked)\n#define osRtxKernelSuspended            ((uint8_t)osKernelSuspended)\n\n\n//  ==== Thread definitions ====\n\n/// Thread State definitions (extending osThreadState)\n#define osRtxThreadStateMask            0x0FU\n\n#define osRtxThreadInactive             ((uint8_t)osThreadInactive)\n#define osRtxThreadReady                ((uint8_t)osThreadReady)\n#define osRtxThreadRunning              ((uint8_t)osThreadRunning)\n#define osRtxThreadBlocked              ((uint8_t)osThreadBlocked)\n#define osRtxThreadTerminated           ((uint8_t)osThreadTerminated)\n\n#define osRtxThreadWaitingDelay         ((uint8_t)(osRtxThreadBlocked | 0x10U))\n#define osRtxThreadWaitingJoin          ((uint8_t)(osRtxThreadBlocked | 0x20U))\n#define osRtxThreadWaitingThreadFlags   ((uint8_t)(osRtxThreadBlocked | 0x30U))\n#define osRtxThreadWaitingEventFlags    ((uint8_t)(osRtxThreadBlocked | 0x40U))\n#define osRtxThreadWaitingMutex         ((uint8_t)(osRtxThreadBlocked | 0x50U))\n#define osRtxThreadWaitingSemaphore     ((uint8_t)(osRtxThreadBlocked | 0x60U))\n#define osRtxThreadWaitingMemoryPool    ((uint8_t)(osRtxThreadBlocked | 0x70U))\n#define osRtxThreadWaitingMessageGet    ((uint8_t)(osRtxThreadBlocked | 0x80U))\n#define osRtxThreadWaitingMessagePut    ((uint8_t)(osRtxThreadBlocked | 0x90U))\n\n/// Thread Flags definitions\n#define osRtxThreadFlagDefStack 0x10U   ///< Default Stack flag\n\n/// Stack Marker definitions\n#define osRtxStackMagicWord     0xE25A2EA5U ///< Stack Magic Word (Stack Base)\n#define osRtxStackFillPattern   0xCCCCCCCCU ///< Stack Fill Pattern\n\n/// Thread Control Block\ntypedef struct osRtxThread_s {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t                       state;  ///< Object State\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                        attr;  ///< Object Attributes\n  const char                    *name;  ///< Object Name\n  struct osRtxThread_s   *thread_next;  ///< Link pointer to next Thread in Object list\n  struct osRtxThread_s   *thread_prev;  ///< Link pointer to previous Thread in Object list\n  struct osRtxThread_s    *delay_next;  ///< Link pointer to next Thread in Delay list\n  struct osRtxThread_s    *delay_prev;  ///< Link pointer to previous Thread in Delay list\n  struct osRtxThread_s   *thread_join;  ///< Thread waiting to Join\n  uint32_t                      delay;  ///< Delay Time\n  int8_t                     priority;  ///< Thread Priority\n  int8_t                priority_base;  ///< Base Priority\n  uint8_t                 stack_frame;  ///< Stack Frame (EXC_RETURN[7..0])\n  uint8_t               flags_options;  ///< Thread/Event Flags Options\n  uint32_t                 wait_flags;  ///< Waiting Thread/Event Flags\n  uint32_t               thread_flags;  ///< Thread Flags\n  struct osRtxMutex_s     *mutex_list;  ///< Link pointer to list of owned Mutexes\n  void                     *stack_mem;  ///< Stack Memory\n  uint32_t                 stack_size;  ///< Stack Size\n  uint32_t                         sp;  ///< Current Stack Pointer\n  uint32_t                thread_addr;  ///< Thread entry address\n  uint32_t                  tz_memory;  ///< TrustZone Memory Identifier\n#ifdef RTX_TF_M_EXTENSION\n  uint32_t                  tz_module;  ///< TrustZone Module Identifier\n#endif\n#if __RTX_CPU_STATISTICS__\n  uint32_t               swap_in_time;  ///< the task schedule in time\n  uint32_t              swap_out_time;  ///< the task schedule out time\n  uint32_t                      rtime;  ///< the task runing time after startup\n  uint32_t                 step_rtime;  ///< the task runing time tile last show\n#if TASK_HUNG_CHECK_ENABLED\n  uint32_t                 hung_check;\n  uint32_t         hung_check_timeout;\n#endif\n#endif /* __RTX_CPU_STATISTICS__*/\n} osRtxThread_t;\n\n\n//  ==== Timer definitions ====\n\n/// Timer State definitions\n#define osRtxTimerInactive      0x00U   ///< Timer Inactive\n#define osRtxTimerStopped       0x01U   ///< Timer Stopped\n#define osRtxTimerRunning       0x02U   ///< Timer Running\n\n/// Timer Type definitions\n#define osRtxTimerPeriodic      ((uint8_t)osTimerPeriodic)\n\n/// Timer Function Information\ntypedef struct {\n  osTimerFunc_t                  func;  ///< Function Pointer\n  void                           *arg;  ///< Function Argument\n} osRtxTimerFinfo_t;\n\n/// Timer Control Block\ntypedef struct osRtxTimer_s {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t                       state;  ///< Object State\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                        type;  ///< Timer Type (Periodic/One-shot)\n  const char                    *name;  ///< Object Name\n  struct osRtxTimer_s           *prev;  ///< Pointer to previous active Timer\n  struct osRtxTimer_s           *next;  ///< Pointer to next active Timer\n  uint32_t                       tick;  ///< Timer current Tick\n  uint32_t                       load;  ///< Timer Load value\n  osRtxTimerFinfo_t             finfo;  ///< Timer Function Info\n} osRtxTimer_t;\n\n\n//  ==== Event Flags definitions ====\n\n/// Event Flags Control Block\ntypedef struct {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t              reserved_state;  ///< Object State (not used)\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                    reserved;\n  const char                    *name;  ///< Object Name\n  osRtxThread_t          *thread_list;  ///< Waiting Threads List\n  uint32_t                event_flags;  ///< Event Flags\n} osRtxEventFlags_t;\n\n\n//  ==== Mutex definitions ====\n\n/// Mutex Control Block\ntypedef struct osRtxMutex_s {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t              reserved_state;  ///< Object State (not used)\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                        attr;  ///< Object Attributes\n  const char                    *name;  ///< Object Name\n  osRtxThread_t          *thread_list;  ///< Waiting Threads List\n  osRtxThread_t         *owner_thread;  ///< Owner Thread\n  struct osRtxMutex_s     *owner_prev;  ///< Pointer to previous owned Mutex\n  struct osRtxMutex_s     *owner_next;  ///< Pointer to next owned Mutex\n  uint8_t                        lock;  ///< Lock counter\n  uint8_t                  padding[3];\n} osRtxMutex_t;\n\n\n//  ==== Semaphore definitions ====\n\n/// Semaphore Control Block\ntypedef struct {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t              reserved_state;  ///< Object State (not used)\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                    reserved;\n  const char                    *name;  ///< Object Name\n  osRtxThread_t          *thread_list;  ///< Waiting Threads List\n  uint16_t                     tokens;  ///< Current number of tokens\n  uint16_t                 max_tokens;  ///< Maximum number of tokens\n} osRtxSemaphore_t;\n\n\n//  ==== Memory Pool definitions ====\n\n/// Memory Pool Information\ntypedef struct {\n  uint32_t                 max_blocks;  ///< Maximum number of Blocks\n  uint32_t                used_blocks;  ///< Number of used Blocks\n  uint32_t                 block_size;  ///< Block Size\n  void                    *block_base;  ///< Block Memory Base Address\n  void                     *block_lim;  ///< Block Memory Limit Address\n  void                    *block_free;  ///< First free Block Address\n} osRtxMpInfo_t;\n\n/// Memory Pool Control Block\ntypedef struct {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t              reserved_state;  ///< Object State (not used)\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                    reserved;\n  const char                    *name;  ///< Object Name\n  osRtxThread_t          *thread_list;  ///< Waiting Threads List\n  osRtxMpInfo_t               mp_info;  ///< Memory Pool Info\n} osRtxMemoryPool_t;\n\n\n//  ==== Message Queue definitions ====\n\n/// Message Control Block\ntypedef struct osRtxMessage_s {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t              reserved_state;  ///< Object State (not used)\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                    priority;  ///< Message Priority\n  struct osRtxMessage_s         *prev;  ///< Pointer to previous Message\n  struct osRtxMessage_s         *next;  ///< Pointer to next Message\n} osRtxMessage_t;\n\n/// Message Queue Control Block\ntypedef struct {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t              reserved_state;  ///< Object State (not used)\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                    reserved;\n  const char                    *name;  ///< Object Name\n  osRtxThread_t          *thread_list;  ///< Waiting Threads List\n  osRtxMpInfo_t               mp_info;  ///< Memory Pool Info\n  uint32_t                   msg_size;  ///< Message Size\n  uint32_t                  msg_count;  ///< Number of queued Messages\n  osRtxMessage_t           *msg_first;  ///< Pointer to first Message\n  osRtxMessage_t            *msg_last;  ///< Pointer to last Message\n} osRtxMessageQueue_t;\n\n\n//  ==== Generic Object definitions ====\n\n/// Generic Object Control Block\ntypedef struct {\n  uint8_t                          id;  ///< Object Identifier\n  uint8_t                       state;  ///< Object State\n  uint8_t                       flags;  ///< Object Flags\n  uint8_t                    reserved;\n  const char                    *name;  ///< Object Name\n  osRtxThread_t          *thread_list;  ///< Threads List\n} osRtxObject_t;\n\n\n//  ==== OS Runtime Information definitions ====\n\n/// OS Runtime Information structure\ntypedef struct {\n  const char                   *os_id;  ///< OS Identification\n  uint32_t                    version;  ///< OS Version\n  struct {                              ///< Kernel Info\n    uint8_t                     state;  ///< State\n    volatile uint8_t          blocked;  ///< Blocked\n    uint8_t                    pendSV;  ///< Pending SV\n    uint8_t                  reserved;\n    uint32_t                     tick;  ///< Tick counter\n  } kernel;\n  int32_t                   tick_irqn;  ///< Tick Timer IRQ Number\n  struct {                              ///< Thread Info\n    struct {                            ///< Thread Run Info\n      osRtxThread_t             *curr;  ///< Current running Thread\n      osRtxThread_t             *next;  ///< Next Thread to Run\n    } run;\n    osRtxObject_t               ready;  ///< Ready List Object\n    osRtxThread_t               *idle;  ///< Idle Thread\n    osRtxThread_t         *delay_list;  ///< Delay List\n    osRtxThread_t          *wait_list;  ///< Wait List (no Timeout)\n    osRtxThread_t     *terminate_list;  ///< Terminate Thread List\n    struct {                            ///< Thread Round Robin Info\n      osRtxThread_t           *thread;  ///< Round Robin Thread\n      uint32_t                   tick;  ///< Round Robin Time Tick\n      uint32_t                timeout;  ///< Round Robin Timeout\n    } robin;\n  } thread;\n  struct {                              ///< Timer Info\n    osRtxTimer_t                *list;  ///< Active Timer List\n    osRtxThread_t             *thread;  ///< Timer Thread\n    osRtxMessageQueue_t           *mq;  ///< Timer Message Queue\n    void                (*tick)(void);  ///< Timer Tick Function\n  } timer;\n  struct {                              ///< ISR Post Processing Queue\n    uint16_t                      max;  ///< Maximum Items\n    uint16_t                      cnt;  ///< Item Count\n    uint16_t                       in;  ///< Incoming Item Index\n    uint16_t                      out;  ///< Outgoing Item Index\n    void                       **data;  ///< Queue Data\n  } isr_queue;\n  struct {                                      ///< ISR Post Processing functions\n    void          (*thread)(osRtxThread_t*);    ///< Thread Post Processing function\n    void (*event_flags)(osRtxEventFlags_t*);    ///< Event Flags Post Processing function\n    void    (*semaphore)(osRtxSemaphore_t*);    ///< Semaphore Post Processing function\n    void (*memory_pool)(osRtxMemoryPool_t*);    ///< Memory Pool Post Processing function\n    void        (*message)(osRtxMessage_t*);    ///< Message Post Processing function\n  } post_process;\n  struct {                              ///< Memory Pools (Variable Block Size)\n    void                       *stack;  ///< Stack Memory\n    void                     *mp_data;  ///< Memory Pool Data Memory\n    void                     *mq_data;  ///< Message Queue Data Memory\n    void                      *common;  ///< Common Memory\n  } mem;\n  struct {                              ///< Memory Pools (Fixed Block Size)\n    osRtxMpInfo_t              *stack;  ///< Stack for Threads\n    osRtxMpInfo_t             *thread;  ///< Thread Control Blocks\n    osRtxMpInfo_t              *timer;  ///< Timer Control Blocks\n    osRtxMpInfo_t        *event_flags;  ///< Event Flags Control Blocks\n    osRtxMpInfo_t              *mutex;  ///< Mutex Control Blocks\n    osRtxMpInfo_t          *semaphore;  ///< Semaphore Control Blocks\n    osRtxMpInfo_t        *memory_pool;  ///< Memory Pool Control Blocks\n    osRtxMpInfo_t      *message_queue;  ///< Message Queue Control Blocks\n  } mpi;\n} osRtxInfo_t;\n\nextern osRtxInfo_t osRtxInfo;           ///< OS Runtime Information\n\n/// OS Runtime Object Memory Usage structure\ntypedef struct {\n  uint32_t cnt_alloc;                   ///< Counter for alloc\n  uint32_t cnt_free;                    ///< Counter for free\n  uint32_t max_used;                    ///< Maximum used\n} osRtxObjectMemUsage_t;\n\n/// OS Runtime Object Memory Usage variables\nextern osRtxObjectMemUsage_t osRtxThreadMemUsage;\nextern osRtxObjectMemUsage_t osRtxTimerMemUsage;\nextern osRtxObjectMemUsage_t osRtxEventFlagsMemUsage;\nextern osRtxObjectMemUsage_t osRtxMutexMemUsage;\nextern osRtxObjectMemUsage_t osRtxSemaphoreMemUsage;\nextern osRtxObjectMemUsage_t osRtxMemoryPoolMemUsage;\nextern osRtxObjectMemUsage_t osRtxMessageQueueMemUsage;\n\n\n//  ==== OS API definitions ====\n\n// Object Limits definitions\n#define osRtxThreadFlagsLimit    31U    ///< number of Thread Flags available per thread\n#define osRtxEventFlagsLimit     31U    ///< number of Event Flags available per object\n#define osRtxMutexLockLimit      255U   ///< maximum number of recursive mutex locks\n#define osRtxSemaphoreTokenLimit 65535U ///< maximum number of tokens per semaphore\n\n// Control Block sizes\n#define osRtxThreadCbSize        sizeof(osRtxThread_t)\n#define osRtxTimerCbSize         sizeof(osRtxTimer_t)\n#define osRtxEventFlagsCbSize    sizeof(osRtxEventFlags_t)\n#define osRtxMutexCbSize         sizeof(osRtxMutex_t)\n#define osRtxSemaphoreCbSize     sizeof(osRtxSemaphore_t)\n#define osRtxMemoryPoolCbSize    sizeof(osRtxMemoryPool_t)\n#define osRtxMessageQueueCbSize  sizeof(osRtxMessageQueue_t)\n\n/// Memory size in bytes for Memory Pool storage.\n/// \\param         block_count   maximum number of memory blocks in memory pool.\n/// \\param         block_size    memory block size in bytes.\n#define osRtxMemoryPoolMemSize(block_count, block_size) \\\n  (4*(block_count)*(((block_size)+3)/4))\n\n/// Memory size in bytes for Message Queue storage.\n/// \\param         msg_count     maximum number of messages in queue.\n/// \\param         msg_size      maximum message size in bytes.\n#define osRtxMessageQueueMemSize(msg_count, msg_size) \\\n  (4*(msg_count)*(3+(((msg_size)+3)/4)))\n\n\n//  ==== OS External Functions ====\n\n// OS Error Codes\n#define osRtxErrorStackUnderflow        1U  ///< Stack overflow, i.e. stack pointer below its lower memory limit for descending stacks.\n#define osRtxErrorISRQueueOverflow      2U  ///< ISR Queue overflow detected when inserting object.\n#define osRtxErrorTimerQueueOverflow    3U  ///< User Timer Callback Queue overflow detected for timer.\n#define osRtxErrorClibSpace             4U  ///< Standard C/C++ library libspace not available: increase \\c OS_THREAD_LIBSPACE_NUM.\n#define osRtxErrorClibMutex             5U  ///< Standard C/C++ library mutex initialization failed.\n\n/// OS Error Callback function\nextern uint32_t osRtxErrorNotify (uint32_t code, void *object_id);\n\n/// OS Idle Thread\nextern void osRtxIdleThread (void *argument);\n\n/// OS Exception handlers\nextern void SVC_Handler     (void);\nextern void PendSV_Handler  (void);\nextern void SysTick_Handler (void);\n\n/// OS Trusted Firmware M Extension\n#ifdef RTX_TF_M_EXTENSION\nextern uint32_t osRtxTzGetModuleId (void);\n#endif\n\n\n//  ==== OS External Configuration ====\n\n/// OS Configuration flags\n#define osRtxConfigPrivilegedMode   (1UL<<0)    ///< Threads in Privileged mode\n#define osRtxConfigStackCheck       (1UL<<1)    ///< Stack overrun checking\n#define osRtxConfigStackWatermark   (1UL<<2)    ///< Stack usage Watermark\n\n/// OS Configuration structure\ntypedef struct {\n  uint32_t                             flags;   ///< OS Configuration Flags\n  uint32_t                         tick_freq;   ///< Kernel Tick Frequency\n  uint32_t                     robin_timeout;   ///< Round Robin Timeout Tick\n  struct {                                      ///< ISR Post Processing Queue\n    void                              **data;   ///< Queue Data\n    uint16_t                             max;   ///< Maximum Items\n    uint16_t                         padding;\n  } isr_queue;\n  struct {                                      ///< Memory Pools (Variable Block Size)\n    void                         *stack_addr;   ///< Stack Memory Address\n    uint32_t                      stack_size;   ///< Stack Memory Size\n    void                       *mp_data_addr;   ///< Memory Pool Memory Address\n    uint32_t                    mp_data_size;   ///< Memory Pool Memory Size\n    void                       *mq_data_addr;   ///< Message Queue Data Memory Address\n    uint32_t                    mq_data_size;   ///< Message Queue Data Memory Size\n    void                        *common_addr;   ///< Common Memory Address\n    uint32_t                     common_size;   ///< Common Memory Size\n  } mem;\n  struct {                                      ///< Memory Pools (Fixed Block Size)\n    osRtxMpInfo_t                     *stack;   ///< Stack for Threads\n    osRtxMpInfo_t                    *thread;   ///< Thread Control Blocks\n    osRtxMpInfo_t                     *timer;   ///< Timer Control Blocks\n    osRtxMpInfo_t               *event_flags;   ///< Event Flags Control Blocks\n    osRtxMpInfo_t                     *mutex;   ///< Mutex Control Blocks\n    osRtxMpInfo_t                 *semaphore;   ///< Semaphore Control Blocks\n    osRtxMpInfo_t               *memory_pool;   ///< Memory Pool Control Blocks\n    osRtxMpInfo_t             *message_queue;   ///< Message Queue Control Blocks\n  } mpi;\n  uint32_t                 thread_stack_size;   ///< Default Thread Stack Size\n  const\n  osThreadAttr_t           *idle_thread_attr;   ///< Idle Thread Attributes\n  const\n  osThreadAttr_t          *timer_thread_attr;   ///< Timer Thread Attributes\n  const\n  osMessageQueueAttr_t        *timer_mq_attr;   ///< Timer Message Queue Attributes\n  uint32_t                     timer_mq_mcnt;   ///< Timer Message Queue maximum Messages\n} osRtxConfig_t;\n\nextern const osRtxConfig_t osRtxConfig;         ///< OS Configuration\n\n\n#ifdef  __cplusplus\n}\n#endif\n\n#endif  // RTX_OS_H_\n"
  },
  {
    "path": "notes.txt",
    "content": "说明文档：\n1 核心函数在这个函数里面：\nvoid vol_state_process(uint32_t db_val)\n{\n    TRACE(2,\"db value is:%d volume_is:%d \",db_val,app_bt_stream_local_volume_get());\n\n    if((db_val < 52) && (app_bt_stream_local_volume_get() > 10))\n    {\n        app_bt_volumedown();\n    }\n    else if((db_val > 60) && (app_bt_stream_local_volume_get() < 13))\n    {\n        app_bt_volumeup();\n    }\n    else if((db_val > 72) && (app_bt_stream_local_volume_get() < 15))\n    {\n        app_bt_volumeup();\n    }\n\n}\n该函数的含义是，当前db小于52db的时候i，且音量目前大于10,就降低音量，只要这个满足，会一直降低的\n当周围噪声大于60db，且目前音量小于13，就增加音量。\n当目前噪声音量大于72db，且目前音量小于15,就增加音量。\n\n假如想改变场景，只需要调整这个函数的里面的这几个数据即可。假如不知道怎么调整，把场景的日志发给我即可。\n\n假如需要按键开关控制，只需要在这个函数vol_state_process((uint32_t)db_sum);被调用的地方使用一个全局变量控制是否调用这个函数即可。\n\n"
  },
  {
    "path": "platform/Makefile",
    "content": "obj-y := cmsis/ drivers/ hal/\n\nifneq ($(DUAL_BOOT),1)\nobj-y += main/\nendif\n\nsubdir-ccflags-y += -Iplatform/cmsis/inc -Iplatform/hal -Iutils/hwtimer_list"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/BasicMathFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        BasicMathFunctions.c\n * Description:  Combination of all basic math function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_abs_f32.c\"\n#include \"arm_abs_q15.c\"\n#include \"arm_abs_q31.c\"\n#include \"arm_abs_q7.c\"\n#include \"arm_add_f32.c\"\n#include \"arm_add_q15.c\"\n#include \"arm_add_q31.c\"\n#include \"arm_add_q7.c\"\n#include \"arm_dot_prod_f32.c\"\n#include \"arm_dot_prod_q15.c\"\n#include \"arm_dot_prod_q31.c\"\n#include \"arm_dot_prod_q7.c\"\n#include \"arm_mult_f32.c\"\n#include \"arm_mult_q15.c\"\n#include \"arm_mult_q31.c\"\n#include \"arm_mult_q7.c\"\n#include \"arm_negate_f32.c\"\n#include \"arm_negate_q15.c\"\n#include \"arm_negate_q31.c\"\n#include \"arm_negate_q7.c\"\n#include \"arm_offset_f32.c\"\n#include \"arm_offset_q15.c\"\n#include \"arm_offset_q31.c\"\n#include \"arm_offset_q7.c\"\n#include \"arm_scale_f32.c\"\n#include \"arm_scale_q15.c\"\n#include \"arm_scale_q31.c\"\n#include \"arm_scale_q7.c\"\n#include \"arm_shift_q15.c\"\n#include \"arm_shift_q31.c\"\n#include \"arm_shift_q7.c\"\n#include \"arm_sub_f32.c\"\n#include \"arm_sub_q15.c\"\n#include \"arm_sub_q31.c\"\n#include \"arm_sub_q7.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_abs_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_abs_f32.c\n * Description:  Floating-point vector absolute value\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n#include \n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @defgroup BasicAbs Vector Absolute Value\n\n  Computes the absolute value of a vector on an element-by-element basis.\n\n  
\n      pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.\n  
\n\n  The functions support in-place computation allowing the source and\n  destination pointers to reference the same memory buffer.\n  There are separate functions for floating-point, Q7, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup BasicAbs\n  @{\n */\n\n/**\n  @brief         Floating-point vector absolute value.\n  @param[in]     pSrc       points to the input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_abs_f32(const float32_t *pSrc, float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = |A| */\n\n    /* Calculate absolute and store result in destination buffer. */\n    *pDst++ = fabsf(*pSrc++);\n\n    *pDst++ = fabsf(*pSrc++);\n\n    *pDst++ = fabsf(*pSrc++);\n\n    *pDst++ = fabsf(*pSrc++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = |A| */\n\n    /* Calculate absolute and store result in destination buffer. */\n    *pDst++ = fabsf(*pSrc++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicAbs group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_abs_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_abs_q15.c\n * Description:  Q15 vector absolute value\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicAbs\n  @{\n */\n\n/**\n  @brief         Q15 vector absolute value.\n  @param[in]     pSrc       points to the input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   The Q15 value -1 (0x8000) will be saturated to the maximum\n  allowable positive value 0x7FFF.\n */\n\nvoid arm_abs_q15(const q15_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n  q15_t in;        /* Temporary input variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = |A| */\n\n    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store\n     * result in destination buffer. */\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q15_t)0x8000) ? 0x7fff : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q15_t)0x8000) ? 0x7fff : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q15_t)0x8000) ? 0x7fff : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q15_t)0x8000) ? 0x7fff : -in);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = |A| */\n\n    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store\n     * result in destination buffer. */\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q15_t)0x8000) ? 0x7fff : -in);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicAbs group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_abs_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_abs_q31.c\n * Description:  Q31 vector absolute value\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicAbs\n  @{\n */\n\n/**\n  @brief         Q31 vector absolute value.\n  @param[in]     pSrc       points to the input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   The Q31 value -1 (0x80000000) will be saturated to the\n  maximum allowable positive value 0x7FFFFFFF.\n */\n\nvoid arm_abs_q31(const q31_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t in;        /* Temporary variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = |A| */\n\n    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and\n     * store result in destination buffer. */\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = |A| */\n\n    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and\n     * store result in destination buffer. */\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicAbs group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_abs_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_abs_q7.c\n * Description:  Q7 vector absolute value\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicAbs\n  @{\n */\n\n/**\n  @brief         Q7 vector absolute value.\n  @param[in]     pSrc       points to the input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Conditions for optimum performance\n                   Input and output buffers should be aligned by 32-bit\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   The Q7 value -1 (0x80) will be saturated to the maximum\n  allowable positive value 0x7F.\n */\n\nvoid arm_abs_q7(const q7_t *pSrc, q7_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n  q7_t in;         /* Temporary input variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = |A| */\n\n    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store\n     * result in destination buffer. */\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q7_t)0x80) ? (q7_t)0x7f : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q7_t)0x80) ? (q7_t)0x7f : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q7_t)0x80) ? (q7_t)0x7f : -in);\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q7_t)0x80) ? (q7_t)0x7f : -in);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = |A| */\n\n    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store\n     * result in destination buffer. */\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);\n#else\n    *pDst++ = (in > 0) ? in : ((in == (q7_t)0x80) ? (q7_t)0x7f : -in);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicAbs group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_add_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_add_f32.c\n * Description:  Floating-point vector addition\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @defgroup BasicAdd Vector Addition\n\n  Element-by-element addition of two vectors.\n\n  
\n      pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.\n  
\n\n  There are separate functions for floating-point, Q7, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup BasicAdd\n  @{\n */\n\n/**\n  @brief         Floating-point vector addition.\n  @param[in]     pSrcA      points to first input vector\n  @param[in]     pSrcB      points to second input vector\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_add_f32(const float32_t *pSrcA, const float32_t *pSrcB,\n                 float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A + B */\n\n    /* Add and store result in destination buffer. */\n    *pDst++ = (*pSrcA++) + (*pSrcB++);\n    *pDst++ = (*pSrcA++) + (*pSrcB++);\n    *pDst++ = (*pSrcA++) + (*pSrcB++);\n    *pDst++ = (*pSrcA++) + (*pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A + B */\n\n    /* Add and store result in destination buffer. */\n    *pDst++ = (*pSrcA++) + (*pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicAdd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_add_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_add_q15.c\n * Description:  Q15 vector addition\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicAdd\n  @{\n */\n\n/**\n  @brief         Q15 vector addition.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n */\n\nvoid arm_add_q15(const q15_t *pSrcA, const q15_t *pSrcB, q15_t *pDst,\n                 uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t inA1, inA2;\n  q31_t inB1, inB2;\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A + B */\n\n#if defined(ARM_MATH_DSP)\n    /* read 2 times 2 samples at a time from sourceA */\n    inA1 = read_q15x2_ia((q15_t **)&pSrcA);\n    inA2 = read_q15x2_ia((q15_t **)&pSrcA);\n    /* read 2 times 2 samples at a time from sourceB */\n    inB1 = read_q15x2_ia((q15_t **)&pSrcB);\n    inB2 = read_q15x2_ia((q15_t **)&pSrcB);\n\n    /* Add and store 2 times 2 samples at a time */\n    write_q15x2_ia(&pDst, __QADD16(inA1, inB1));\n    write_q15x2_ia(&pDst, __QADD16(inA2, inB2));\n#else\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ + *pSrcB++), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ + *pSrcB++), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ + *pSrcB++), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ + *pSrcB++), 16);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A + B */\n\n    /* Add and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (q15_t)__QADD16(*pSrcA++, *pSrcB++);\n#else\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ + *pSrcB++), 16);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicAdd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_add_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_add_q31.c\n * Description:  Q31 vector addition\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicAdd\n  @{\n */\n\n/**\n  @brief         Q31 vector addition.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range [0x80000000\n  0x7FFFFFFF] are saturated.\n */\n\nvoid arm_add_q31(const q31_t *pSrcA, const q31_t *pSrcB, q31_t *pDst,\n                 uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A + B */\n\n    /* Add and store result in destination buffer. */\n    *pDst++ = __QADD(*pSrcA++, *pSrcB++);\n\n    *pDst++ = __QADD(*pSrcA++, *pSrcB++);\n\n    *pDst++ = __QADD(*pSrcA++, *pSrcB++);\n\n    *pDst++ = __QADD(*pSrcA++, *pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A + B */\n\n    /* Add and store result in destination buffer. */\n    *pDst++ = __QADD(*pSrcA++, *pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicAdd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_add_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_add_q7.c\n * Description:  Q7 vector addition\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicAdd\n  @{\n */\n\n/**\n  @brief         Q7 vector addition.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q7 range [0x80 0x7F] are\n  saturated.\n */\n\nvoid arm_add_q7(const q7_t *pSrcA, const q7_t *pSrcB, q7_t *pDst,\n                uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A + B */\n\n#if defined(ARM_MATH_DSP)\n    /* Add and store result in destination buffer (4 samples at a time). */\n    write_q7x4_ia(&pDst, __QADD8(read_q7x4_ia((q7_t **)&pSrcA),\n                                 read_q7x4_ia((q7_t **)&pSrcB)));\n#else\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ + *pSrcB++, 8);\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ + *pSrcB++, 8);\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ + *pSrcB++, 8);\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ + *pSrcB++, 8);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A + B */\n\n    /* Add and store result in destination buffer. */\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ + *pSrcB++, 8);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicAdd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_dot_prod_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dot_prod_f32.c\n * Description:  Floating-point dot product\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @defgroup BasicDotProd Vector Dot Product\n\n  Computes the dot product of two vectors.\n  The vectors are multiplied element-by-element and then summed.\n\n  
\n      sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... +\n  pSrcA[blockSize-1]*pSrcB[blockSize-1]\n  
\n\n  There are separate functions for floating-point, Q7, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup BasicDotProd\n  @{\n */\n\n/**\n  @brief         Dot product of floating-point vectors.\n  @param[in]     pSrcA      points to the first input vector.\n  @param[in]     pSrcB      points to the second input vector.\n  @param[in]     blockSize  number of samples in each vector.\n  @param[out]    result     output result returned here.\n  @return        none\n */\n\nvoid arm_dot_prod_f32(const float32_t *pSrcA, const float32_t *pSrcB,\n                      uint32_t blockSize, float32_t *result) {\n  uint32_t blkCnt;      /* Loop counter */\n  float32_t sum = 0.0f; /* Temporary return variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]*\n     * B[blockSize-1] */\n\n    /* Calculate dot product and store result in a temporary buffer. */\n    sum += (*pSrcA++) * (*pSrcB++);\n\n    sum += (*pSrcA++) * (*pSrcB++);\n\n    sum += (*pSrcA++) * (*pSrcB++);\n\n    sum += (*pSrcA++) * (*pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]*\n     * B[blockSize-1] */\n\n    /* Calculate dot product and store result in a temporary buffer. */\n    sum += (*pSrcA++) * (*pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store result in destination buffer */\n  *result = sum;\n}\n\n/**\n  @} end of BasicDotProd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_dot_prod_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dot_prod_q15.c\n * Description:  Q15 dot product\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicDotProd\n  @{\n */\n\n/**\n  @brief         Dot product of Q15 vectors.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[in]     blockSize  number of samples in each vector\n  @param[out]    result     output result returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The intermediate multiplications are in 1.15 x 1.15 = 2.30\n  format and these results are added to a 64-bit accumulator in 34.30 format.\n                   Nonsaturating additions are used and given that there are 33\n  guard bits in the accumulator there is no risk of overflow. The return result\n  is in 34.30 format.\n */\n\nvoid arm_dot_prod_q15(const q15_t *pSrcA, const q15_t *pSrcB,\n                      uint32_t blockSize, q63_t *result) {\n  uint32_t blkCnt; /* Loop counter */\n  q63_t sum = 0;   /* Temporary return variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]*\n     * B[blockSize-1] */\n\n#if defined(ARM_MATH_DSP)\n    /* Calculate dot product and store result in a temporary buffer. */\n    sum = __SMLALD(read_q15x2_ia((q15_t **)&pSrcA),\n                   read_q15x2_ia((q15_t **)&pSrcB), sum);\n    sum = __SMLALD(read_q15x2_ia((q15_t **)&pSrcA),\n                   read_q15x2_ia((q15_t **)&pSrcB), sum);\n#else\n    sum += (q63_t)((q31_t)*pSrcA++ * *pSrcB++);\n    sum += (q63_t)((q31_t)*pSrcA++ * *pSrcB++);\n    sum += (q63_t)((q31_t)*pSrcA++ * *pSrcB++);\n    sum += (q63_t)((q31_t)*pSrcA++ * *pSrcB++);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]*\n     * B[blockSize-1] */\n\n    /* Calculate dot product and store result in a temporary buffer. */\n    //#if defined (ARM_MATH_DSP)\n    //    sum  = __SMLALD(*pSrcA++, *pSrcB++, sum);\n    //#else\n    sum += (q63_t)((q31_t)*pSrcA++ * *pSrcB++);\n    //#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store result in destination buffer in 34.30 format */\n  *result = sum;\n}\n\n/**\n  @} end of BasicDotProd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_dot_prod_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dot_prod_q31.c\n * Description:  Q31 dot product\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicDotProd\n  @{\n */\n\n/**\n  @brief         Dot product of Q31 vectors.\n  @param[in]     pSrcA      points to the first input vector.\n  @param[in]     pSrcB      points to the second input vector.\n  @param[in]     blockSize  number of samples in each vector.\n  @param[out]    result     output result returned here.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The intermediate multiplications are in 1.31 x 1.31 = 2.62\n  format and these are truncated to 2.48 format by discarding the lower 14 bits.\n                   The 2.48 result is then added without saturation to a 64-bit\n  accumulator in 16.48 format. There are 15 guard bits in the accumulator and\n  there is no risk of overflow as long as the length of the vectors is less than\n  2^16 elements. The return result is in 16.48 format.\n */\n\nvoid arm_dot_prod_q31(const q31_t *pSrcA, const q31_t *pSrcB,\n                      uint32_t blockSize, q63_t *result) {\n  uint32_t blkCnt; /* Loop counter */\n  q63_t sum = 0;   /* Temporary return variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]*\n     * B[blockSize-1] */\n\n    /* Calculate dot product and store result in a temporary buffer. */\n    sum += ((q63_t)*pSrcA++ * *pSrcB++) >> 14U;\n\n    sum += ((q63_t)*pSrcA++ * *pSrcB++) >> 14U;\n\n    sum += ((q63_t)*pSrcA++ * *pSrcB++) >> 14U;\n\n    sum += ((q63_t)*pSrcA++ * *pSrcB++) >> 14U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]*\n     * B[blockSize-1] */\n\n    /* Calculate dot product and store result in a temporary buffer. */\n    sum += ((q63_t)*pSrcA++ * *pSrcB++) >> 14U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store result in destination buffer in 16.48 format */\n  *result = sum;\n}\n\n/**\n  @} end of BasicDotProd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_dot_prod_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dot_prod_q7.c\n * Description:  Q7 dot product\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicDotProd\n  @{\n */\n\n/**\n  @brief         Dot product of Q7 vectors.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[in]     blockSize  number of samples in each vector\n  @param[out]    result     output result returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The intermediate multiplications are in 1.7 x 1.7 = 2.14\n  format and these results are added to an accumulator in 18.14 format.\n                   Nonsaturating additions are used and there is no danger of\n  wrap around as long as the vectors are less than 2^18 elements long. The\n  return result is in 18.14 format.\n */\n\nvoid arm_dot_prod_q7(const q7_t *pSrcA, const q7_t *pSrcB, uint32_t blockSize,\n                     q31_t *result) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t sum = 0;   /* Temporary return variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t input1, input2;         /* Temporary variables */\n  q31_t inA1, inA2, inB1, inB2; /* Temporary variables */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]*\n     * B[blockSize-1] */\n\n#if defined(ARM_MATH_DSP)\n    /* read 4 samples at a time from sourceA */\n    input1 = read_q7x4_ia((q7_t **)&pSrcA);\n    /* read 4 samples at a time from sourceB */\n    input2 = read_q7x4_ia((q7_t **)&pSrcB);\n\n    /* extract two q7_t samples to q15_t samples */\n    inA1 = __SXTB16(__ROR(input1, 8));\n    /* extract reminaing two samples */\n    inA2 = __SXTB16(input1);\n    /* extract two q7_t samples to q15_t samples */\n    inB1 = __SXTB16(__ROR(input2, 8));\n    /* extract reminaing two samples */\n    inB2 = __SXTB16(input2);\n\n    /* multiply and accumulate two samples at a time */\n    sum = __SMLAD(inA1, inB1, sum);\n    sum = __SMLAD(inA2, inB2, sum);\n#else\n    sum += (q31_t)((q15_t)*pSrcA++ * *pSrcB++);\n    sum += (q31_t)((q15_t)*pSrcA++ * *pSrcB++);\n    sum += (q31_t)((q15_t)*pSrcA++ * *pSrcB++);\n    sum += (q31_t)((q15_t)*pSrcA++ * *pSrcB++);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]*\n     * B[blockSize-1] */\n\n    /* Calculate dot product and store result in a temporary buffer. */\n    //#if defined (ARM_MATH_DSP)\n    //    sum  = __SMLAD(*pSrcA++, *pSrcB++, sum);\n    //#else\n    sum += (q31_t)((q15_t)*pSrcA++ * *pSrcB++);\n    //#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store result in destination buffer in 18.14 format */\n  *result = sum;\n}\n\n/**\n  @} end of BasicDotProd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_mult_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mult_f32.c\n * Description:  Floating-point vector multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @defgroup BasicMult Vector Multiplication\n\n  Element-by-element multiplication of two vectors.\n\n  
\n      pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.\n  
\n\n  There are separate functions for floating-point, Q7, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup BasicMult\n  @{\n */\n\n/**\n  @brief         Floating-point vector multiplication.\n  @param[in]     pSrcA      points to the first input vector.\n  @param[in]     pSrcB      points to the second input vector.\n  @param[out]    pDst       points to the output vector.\n  @param[in]     blockSize  number of samples in each vector.\n  @return        none\n */\n\nvoid arm_mult_f32(const float32_t *pSrcA, const float32_t *pSrcB,\n                  float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * B */\n\n    /* Multiply inputs and store result in destination buffer. */\n    *pDst++ = (*pSrcA++) * (*pSrcB++);\n\n    *pDst++ = (*pSrcA++) * (*pSrcB++);\n\n    *pDst++ = (*pSrcA++) * (*pSrcB++);\n\n    *pDst++ = (*pSrcA++) * (*pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * B */\n\n    /* Multiply input and store result in destination buffer. */\n    *pDst++ = (*pSrcA++) * (*pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_mult_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mult_q15.c\n * Description:  Q15 vector multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicMult\n  @{\n */\n\n/**\n  @brief         Q15 vector multiplication\n  @param[in]     pSrcA      points to first input vector\n  @param[in]     pSrcB      points to second input vector\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n */\n\nvoid arm_mult_q15(const q15_t *pSrcA, const q15_t *pSrcB, q15_t *pDst,\n                  uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t inA1, inA2, inB1, inB2; /* Temporary input variables */\n  q15_t out1, out2, out3, out4; /* Temporary output variables */\n  q31_t mul1, mul2, mul3, mul4; /* Temporary variables */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * B */\n\n#if defined(ARM_MATH_DSP)\n    /* read 2 samples at a time from sourceA */\n    inA1 = read_q15x2_ia((q15_t **)&pSrcA);\n    /* read 2 samples at a time from sourceB */\n    inB1 = read_q15x2_ia((q15_t **)&pSrcB);\n    /* read 2 samples at a time from sourceA */\n    inA2 = read_q15x2_ia((q15_t **)&pSrcA);\n    /* read 2 samples at a time from sourceB */\n    inB2 = read_q15x2_ia((q15_t **)&pSrcB);\n\n    /* multiply mul = sourceA * sourceB */\n    mul1 = (q31_t)((q15_t)(inA1 >> 16) * (q15_t)(inB1 >> 16));\n    mul2 = (q31_t)((q15_t)(inA1) * (q15_t)(inB1));\n    mul3 = (q31_t)((q15_t)(inA2 >> 16) * (q15_t)(inB2 >> 16));\n    mul4 = (q31_t)((q15_t)(inA2) * (q15_t)(inB2));\n\n    /* saturate result to 16 bit */\n    out1 = (q15_t)__SSAT(mul1 >> 15, 16);\n    out2 = (q15_t)__SSAT(mul2 >> 15, 16);\n    out3 = (q15_t)__SSAT(mul3 >> 15, 16);\n    out4 = (q15_t)__SSAT(mul4 >> 15, 16);\n\n    /* store result to destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(&pDst, __PKHBT(out2, out1, 16));\n    write_q15x2_ia(&pDst, __PKHBT(out4, out3, 16));\n#else\n    write_q15x2_ia(&pDst, __PKHBT(out1, out2, 16));\n    write_q15x2_ia(&pDst, __PKHBT(out3, out4, 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n#else\n    *pDst++ = (q15_t)__SSAT((((q31_t)(*pSrcA++) * (*pSrcB++)) >> 15), 16);\n    *pDst++ = (q15_t)__SSAT((((q31_t)(*pSrcA++) * (*pSrcB++)) >> 15), 16);\n    *pDst++ = (q15_t)__SSAT((((q31_t)(*pSrcA++) * (*pSrcB++)) >> 15), 16);\n    *pDst++ = (q15_t)__SSAT((((q31_t)(*pSrcA++) * (*pSrcB++)) >> 15), 16);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * B */\n\n    /* Multiply inputs and store result in destination buffer. */\n    *pDst++ = (q15_t)__SSAT((((q31_t)(*pSrcA++) * (*pSrcB++)) >> 15), 16);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_mult_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mult_q31.c\n * Description:  Q31 vector multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicMult\n  @{\n */\n\n/**\n  @brief         Q31 vector multiplication.\n  @param[in]     pSrcA      points to the first input vector.\n  @param[in]     pSrcB      points to the second input vector.\n  @param[out]    pDst       points to the output vector.\n  @param[in]     blockSize  number of samples in each vector.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range[0x80000000\n  0x7FFFFFFF] are saturated.\n */\n\nvoid arm_mult_q31(const q31_t *pSrcA, const q31_t *pSrcB, q31_t *pDst,\n                  uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t out;       /* Temporary output variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * B */\n\n    /* Multiply inputs and store result in destination buffer. */\n    out = ((q63_t)*pSrcA++ * *pSrcB++) >> 32;\n    out = __SSAT(out, 31);\n    *pDst++ = out << 1U;\n\n    out = ((q63_t)*pSrcA++ * *pSrcB++) >> 32;\n    out = __SSAT(out, 31);\n    *pDst++ = out << 1U;\n\n    out = ((q63_t)*pSrcA++ * *pSrcB++) >> 32;\n    out = __SSAT(out, 31);\n    *pDst++ = out << 1U;\n\n    out = ((q63_t)*pSrcA++ * *pSrcB++) >> 32;\n    out = __SSAT(out, 31);\n    *pDst++ = out << 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * B */\n\n    /* Multiply inputs and store result in destination buffer. */\n    out = ((q63_t)*pSrcA++ * *pSrcB++) >> 32;\n    out = __SSAT(out, 31);\n    *pDst++ = out << 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_mult_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mult_q7.c\n * Description:  Q7 vector multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicMult\n  @{\n */\n\n/**\n  @brief         Q7 vector multiplication\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q7 range [0x80 0x7F] are\n  saturated.\n */\n\nvoid arm_mult_q7(const q7_t *pSrcA, const q7_t *pSrcB, q7_t *pDst,\n                 uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q7_t out1, out2, out3, out4; /* Temporary output variables */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * B */\n\n#if defined(ARM_MATH_DSP)\n    /* Multiply inputs and store results in temporary variables */\n    out1 = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n    out2 = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n    out3 = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n    out4 = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n\n    /* Pack and store result in destination buffer (in single write) */\n    write_q7x4_ia(&pDst, __PACKq7(out1, out2, out3, out4));\n#else\n    *pDst++ = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n    *pDst++ = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n    *pDst++ = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n    *pDst++ = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * B */\n\n    /* Multiply input and store result in destination buffer. */\n    *pDst++ = (q7_t)__SSAT((((q15_t)(*pSrcA++) * (*pSrcB++)) >> 7), 8);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_negate_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_negate_f32.c\n * Description:  Negates floating-point vectors\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @defgroup BasicNegate Vector Negate\n\n  Negates the elements of a vector.\n\n  
\n      pDst[n] = -pSrc[n],   0 <= n < blockSize.\n  
\n\n  The functions support in-place computation allowing the source and\n  destination pointers to reference the same memory buffer.\n  There are separate functions for floating-point, Q7, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup BasicNegate\n  @{\n */\n\n/**\n  @brief         Negates the elements of a floating-point vector.\n  @param[in]     pSrc       points to input vector.\n  @param[out]    pDst       points to output vector.\n  @param[in]     blockSize  number of samples in each vector.\n  @return        none\n */\n\nvoid arm_negate_f32(const float32_t *pSrc, float32_t *pDst,\n                    uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = -A */\n\n    /* Negate and store result in destination buffer. */\n    *pDst++ = -*pSrc++;\n\n    *pDst++ = -*pSrc++;\n\n    *pDst++ = -*pSrc++;\n\n    *pDst++ = -*pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = -A */\n\n    /* Negate and store result in destination buffer. */\n    *pDst++ = -*pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicNegate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_negate_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_negate_q15.c\n * Description:  Negates Q15 vectors\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicNegate\n  @{\n */\n\n/**\n  @brief         Negates the elements of a Q15 vector.\n  @param[in]     pSrc       points to the input vector.\n  @param[out]    pDst       points to the output vector.\n  @param[in]     blockSize  number of samples in each vector.\n  @return        none\n\n  @par           Conditions for optimum performance\n                   Input and output buffers should be aligned by 32-bit\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   The Q15 value -1 (0x8000) is saturated to the maximum\n  allowable positive value 0x7FFF.\n */\n\nvoid arm_negate_q15(const q15_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n  q15_t in;        /* Temporary input variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t in1; /* Temporary input variables */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = -A */\n\n#if defined(ARM_MATH_DSP)\n    /* Negate and store result in destination buffer (2 samples at a time). */\n    in1 = read_q15x2_ia((q15_t **)&pSrc);\n    write_q15x2_ia(&pDst, __QSUB16(0, in1));\n\n    in1 = read_q15x2_ia((q15_t **)&pSrc);\n    write_q15x2_ia(&pDst, __QSUB16(0, in1));\n#else\n    in = *pSrc++;\n    *pDst++ = (in == (q15_t)0x8000) ? (q15_t)0x7fff : -in;\n\n    in = *pSrc++;\n    *pDst++ = (in == (q15_t)0x8000) ? (q15_t)0x7fff : -in;\n\n    in = *pSrc++;\n    *pDst++ = (in == (q15_t)0x8000) ? (q15_t)0x7fff : -in;\n\n    in = *pSrc++;\n    *pDst++ = (in == (q15_t)0x8000) ? (q15_t)0x7fff : -in;\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = -A */\n\n    /* Negate and store result in destination buffer. */\n    in = *pSrc++;\n    *pDst++ = (in == (q15_t)0x8000) ? (q15_t)0x7fff : -in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicNegate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_negate_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_negate_q31.c\n * Description:  Negates Q31 vectors\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicNegate\n  @{\n */\n\n/**\n  @brief         Negates the elements of a Q31 vector.\n  @param[in]     pSrc       points to the input vector.\n  @param[out]    pDst       points to the output vector.\n  @param[in]     blockSize   number of samples in each vector.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   The Q31 value -1 (0x80000000) is saturated to the maximum\n  allowable positive value 0x7FFFFFFF.\n */\n\nvoid arm_negate_q31(const q31_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t in;        /* Temporary input variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = -A */\n\n    /* Negate and store result in destination buffer. */\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = -A */\n\n    /* Negate and store result in destination buffer. */\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicNegate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_negate_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_negate_q7.c\n * Description:  Negates Q7 vectors\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicNegate\n  @{\n */\n\n/**\n  @brief         Negates the elements of a Q7 vector.\n  @param[in]     pSrc       points to the input vector.\n  @param[out]    pDst       points to the output vector.\n  @param[in]     blockSize   number of samples in each vector.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   The Q7 value -1 (0x80) is saturated to the maximum allowable\n  positive value 0x7F.\n */\n\nvoid arm_negate_q7(const q7_t *pSrc, q7_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n  q7_t in;         /* Temporary input variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t in1; /* Temporary input variable */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = -A */\n\n#if defined(ARM_MATH_DSP)\n    /* Negate and store result in destination buffer (4 samples at a time). */\n    in1 = read_q7x4_ia((q7_t **)&pSrc);\n    write_q7x4_ia(&pDst, __QSUB8(0, in1));\n#else\n    in = *pSrc++;\n    *pDst++ = (in == (q7_t)0x80) ? (q7_t)0x7f : -in;\n\n    in = *pSrc++;\n    *pDst++ = (in == (q7_t)0x80) ? (q7_t)0x7f : -in;\n\n    in = *pSrc++;\n    *pDst++ = (in == (q7_t)0x80) ? (q7_t)0x7f : -in;\n\n    in = *pSrc++;\n    *pDst++ = (in == (q7_t)0x80) ? (q7_t)0x7f : -in;\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = -A */\n\n    /* Negate and store result in destination buffer. */\n    in = *pSrc++;\n\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (q7_t)__QSUB(0, in);\n#else\n    *pDst++ = (in == (q7_t)0x80) ? (q7_t)0x7f : -in;\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicNegate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_offset_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_offset_f32.c\n * Description:  Floating-point vector offset\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @defgroup BasicOffset Vector Offset\n\n  Adds a constant offset to each element of a vector.\n\n  
\n      pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.\n  
\n\n  The functions support in-place computation allowing the source and\n  destination pointers to reference the same memory buffer.\n  There are separate functions for floating-point, Q7, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup BasicOffset\n  @{\n */\n\n/**\n  @brief         Adds a constant offset to a floating-point vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     offset     is the offset to be added\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_offset_f32(const float32_t *pSrc, float32_t offset, float32_t *pDst,\n                    uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A + offset */\n\n    /* Add offset and store result in destination buffer. */\n    *pDst++ = (*pSrc++) + offset;\n\n    *pDst++ = (*pSrc++) + offset;\n\n    *pDst++ = (*pSrc++) + offset;\n\n    *pDst++ = (*pSrc++) + offset;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A + offset */\n\n    /* Add offset and store result in destination buffer. */\n    *pDst++ = (*pSrc++) + offset;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicOffset group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_offset_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_offset_q15.c\n * Description:  Q15 vector offset\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicOffset\n  @{\n */\n\n/**\n  @brief         Adds a constant offset to a Q15 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     offset     is the offset to be added\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n */\n\nvoid arm_offset_q15(const q15_t *pSrc, q15_t offset, q15_t *pDst,\n                    uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t offset_packed; /* Offset packed to 32 bit */\n\n  /* Offset is packed to 32 bit in order to use SIMD32 for addition */\n  offset_packed = __PKHBT(offset, offset, 16);\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A + offset */\n\n#if defined(ARM_MATH_DSP)\n    /* Add offset and store result in destination buffer (2 samples at a time).\n     */\n    write_q15x2_ia(&pDst,\n                   __QADD16(read_q15x2_ia((q15_t **)&pSrc), offset_packed));\n    write_q15x2_ia(&pDst,\n                   __QADD16(read_q15x2_ia((q15_t **)&pSrc), offset_packed));\n#else\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrc++ + offset), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrc++ + offset), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrc++ + offset), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrc++ + offset), 16);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A + offset */\n\n    /* Add offset and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (q15_t)__QADD16(*pSrc++, offset);\n#else\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrc++ + offset), 16);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicOffset group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_offset_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_offset_q31.c\n * Description:  Q31 vector offset\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicOffset\n  @{\n */\n\n/**\n  @brief         Adds a constant offset to a Q31 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     offset     is the offset to be added\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range [0x80000000\n  0x7FFFFFFF] are saturated.\n */\n\nvoid arm_offset_q31(const q31_t *pSrc, q31_t offset, q31_t *pDst,\n                    uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A + offset */\n\n    /* Add offset and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QADD(*pSrc++, offset);\n#else\n    *pDst++ = (q31_t)clip_q63_to_q31((q63_t)*pSrc++ + offset);\n#endif\n\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QADD(*pSrc++, offset);\n#else\n    *pDst++ = (q31_t)clip_q63_to_q31((q63_t)*pSrc++ + offset);\n#endif\n\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QADD(*pSrc++, offset);\n#else\n    *pDst++ = (q31_t)clip_q63_to_q31((q63_t)*pSrc++ + offset);\n#endif\n\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QADD(*pSrc++, offset);\n#else\n    *pDst++ = (q31_t)clip_q63_to_q31((q63_t)*pSrc++ + offset);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A + offset */\n\n    /* Add offset and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QADD(*pSrc++, offset);\n#else\n    *pDst++ = (q31_t)clip_q63_to_q31((q63_t)*pSrc++ + offset);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicOffset group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_offset_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_offset_q7.c\n * Description:  Q7 vector offset\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicOffset\n  @{\n */\n\n/**\n  @brief         Adds a constant offset to a Q7 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     offset     is the offset to be added\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q7 range [0x80 0x7F] are\n  saturated.\n */\n\nvoid arm_offset_q7(const q7_t *pSrc, q7_t offset, q7_t *pDst,\n                   uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t offset_packed; /* Offset packed to 32 bit */\n\n  /* Offset is packed to 32 bit in order to use SIMD32 for addition */\n  offset_packed = __PACKq7(offset, offset, offset, offset);\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A + offset */\n\n#if defined(ARM_MATH_DSP)\n    /* Add offset and store result in destination buffer (4 samples at a time).\n     */\n    write_q7x4_ia(&pDst, __QADD8(read_q7x4_ia((q7_t **)&pSrc), offset_packed));\n#else\n    *pDst++ = (q7_t)__SSAT(*pSrc++ + offset, 8);\n    *pDst++ = (q7_t)__SSAT(*pSrc++ + offset, 8);\n    *pDst++ = (q7_t)__SSAT(*pSrc++ + offset, 8);\n    *pDst++ = (q7_t)__SSAT(*pSrc++ + offset, 8);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A + offset */\n\n    /* Add offset and store result in destination buffer. */\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrc++ + offset, 8);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicOffset group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_scale_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_scale_f32.c\n * Description:  Multiplies a floating-point vector by a scalar\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @defgroup BasicScale Vector Scale\n\n  Multiply a vector by a scalar value.  For floating-point data, the algorithm\n  used is:\n\n  
\n      pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.\n  
\n\n  In the fixed-point Q7, Q15, and Q31 functions, scale is\n  represented by a fractional multiplication scaleFract and an\n  arithmetic shift shift. The shift allows the gain of the scaling\n  operation to exceed 1.0. The algorithm used with fixed-point data is:\n\n  
\n      pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.\n  
\n\n  The overall scale factor applied to the fixed-point data is\n  
\n      scale = scaleFract * 2^shift.\n  
\n\n  The functions support in-place computation allowing the source and destination\n  pointers to reference the same memory buffer.\n */\n\n/**\n  @addtogroup BasicScale\n  @{\n */\n\n/**\n  @brief         Multiplies a floating-point vector by a scalar.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     scale      scale factor to be applied\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_scale_f32(const float32_t *pSrc, float32_t scale, float32_t *pDst,\n                   uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * scale */\n\n    /* Scale input and store result in destination buffer. */\n    *pDst++ = (*pSrc++) * scale;\n\n    *pDst++ = (*pSrc++) * scale;\n\n    *pDst++ = (*pSrc++) * scale;\n\n    *pDst++ = (*pSrc++) * scale;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * scale */\n\n    /* Scale input and store result in destination buffer. */\n    *pDst++ = (*pSrc++) * scale;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicScale group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_scale_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_scale_q15.c\n * Description:  Multiplies a Q15 vector by a scalar\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicScale\n  @{\n */\n\n/**\n  @brief         Multiplies a Q15 vector by a scalar.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     scaleFract fractional portion of the scale value\n  @param[in]     shift      number of bits to shift the result by\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The input data *pSrc and scaleFract\n  are in 1.15 format. These are multiplied to yield a 2.30 intermediate result\n  and this is shifted with saturation to 1.15 format.\n */\n\nvoid arm_scale_q15(const q15_t *pSrc, q15_t scaleFract, int8_t shift,\n                   q15_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;            /* Loop counter */\n  int8_t kShift = 15 - shift; /* Shift to apply after scaling */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n#if defined(ARM_MATH_DSP)\n  q31_t inA1, inA2;\n  q31_t out1, out2, out3, out4; /* Temporary output variables */\n  q15_t in1, in2, in3, in4;     /* Temporary input variables */\n#endif\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * scale */\n\n#if defined(ARM_MATH_DSP)\n    /* read 2 times 2 samples at a time from source */\n    inA1 = read_q15x2_ia((q15_t **)&pSrc);\n    inA2 = read_q15x2_ia((q15_t **)&pSrc);\n\n    /* Scale inputs and store result in temporary variables\n     * in single cycle by packing the outputs */\n    out1 = (q31_t)((q15_t)(inA1 >> 16) * scaleFract);\n    out2 = (q31_t)((q15_t)(inA1)*scaleFract);\n    out3 = (q31_t)((q15_t)(inA2 >> 16) * scaleFract);\n    out4 = (q31_t)((q15_t)(inA2)*scaleFract);\n\n    /* apply shifting */\n    out1 = out1 >> kShift;\n    out2 = out2 >> kShift;\n    out3 = out3 >> kShift;\n    out4 = out4 >> kShift;\n\n    /* saturate the output */\n    in1 = (q15_t)(__SSAT(out1, 16));\n    in2 = (q15_t)(__SSAT(out2, 16));\n    in3 = (q15_t)(__SSAT(out3, 16));\n    in4 = (q15_t)(__SSAT(out4, 16));\n\n    /* store result to destination */\n    write_q15x2_ia(&pDst, __PKHBT(in2, in1, 16));\n    write_q15x2_ia(&pDst, __PKHBT(in4, in3, 16));\n#else\n    *pDst++ = (q15_t)(__SSAT(((q31_t)*pSrc++ * scaleFract) >> kShift, 16));\n    *pDst++ = (q15_t)(__SSAT(((q31_t)*pSrc++ * scaleFract) >> kShift, 16));\n    *pDst++ = (q15_t)(__SSAT(((q31_t)*pSrc++ * scaleFract) >> kShift, 16));\n    *pDst++ = (q15_t)(__SSAT(((q31_t)*pSrc++ * scaleFract) >> kShift, 16));\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * scale */\n\n    /* Scale input and store result in destination buffer. */\n    *pDst++ = (q15_t)(__SSAT(((q31_t)*pSrc++ * scaleFract) >> kShift, 16));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicScale group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_scale_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_scale_q31.c\n * Description:  Multiplies a Q31 vector by a scalar\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicScale\n  @{\n */\n\n/**\n  @brief         Multiplies a Q31 vector by a scalar.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     scaleFract fractional portion of the scale value\n  @param[in]     shift      number of bits to shift the result by\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The input data *pSrc and scaleFract\n  are in 1.31 format. These are multiplied to yield a 2.62 intermediate result\n  and this is shifted with saturation to 1.31 format.\n */\n\nvoid arm_scale_q31(const q31_t *pSrc, q31_t scaleFract, int8_t shift,\n                   q31_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;           /* Loop counter */\n  q31_t in, out;             /* Temporary variables */\n  int8_t kShift = shift + 1; /* Shift to apply after scaling */\n  int8_t sign = (kShift & 0x80);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  if (sign == 0U) {\n    while (blkCnt > 0U) {\n      /* C = A * scale */\n\n      /* Scale input and store result in destination buffer. */\n      in = *pSrc++; /* read input from source */\n      in =\n          ((q63_t)in * scaleFract) >> 32; /* multiply input with scaler value */\n      out = in << kShift;                 /* apply shifting */\n      if (in != (out >> kShift))          /* saturate the result */\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out; /* Store result destination */\n\n      in = *pSrc++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in << kShift;\n      if (in != (out >> kShift))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out;\n\n      in = *pSrc++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in << kShift;\n      if (in != (out >> kShift))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out;\n\n      in = *pSrc++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in << kShift;\n      if (in != (out >> kShift))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    while (blkCnt > 0U) {\n      /* C = A * scale */\n\n      /* Scale input and store result in destination buffer. */\n      in = *pSrc++; /* read four inputs from source */\n      in =\n          ((q63_t)in * scaleFract) >> 32; /* multiply input with scaler value */\n      out = in >> -kShift;                /* apply shifting */\n      *pDst++ = out;                      /* Store result destination */\n\n      in = *pSrc++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in >> -kShift;\n      *pDst++ = out;\n\n      in = *pSrc++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in >> -kShift;\n      *pDst++ = out;\n\n      in = *pSrc++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in >> -kShift;\n      *pDst++ = out;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  if (sign == 0U) {\n    while (blkCnt > 0U) {\n      /* C = A * scale */\n\n      /* Scale input and store result in destination buffer. */\n      in = *pSrc++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in << kShift;\n      if (in != (out >> kShift))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    while (blkCnt > 0U) {\n      /* C = A * scale */\n\n      /* Scale input and store result in destination buffer. */\n      in = *pSrc++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in >> -kShift;\n      *pDst++ = out;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n}\n\n/**\n  @} end of BasicScale group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_scale_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_scale_q7.c\n * Description:  Multiplies a Q7 vector by a scalar\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicScale\n  @{\n */\n\n/**\n  @brief         Multiplies a Q7 vector by a scalar.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     scaleFract fractional portion of the scale value\n  @param[in]     shift      number of bits to shift the result by\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The input data *pSrc and scaleFract\n  are in 1.7 format. These are multiplied to yield a 2.14 intermediate result\n  and this is shifted with saturation to 1.7 format.\n */\n\nvoid arm_scale_q7(const q7_t *pSrc, q7_t scaleFract, int8_t shift, q7_t *pDst,\n                  uint32_t blockSize) {\n  uint32_t blkCnt;           /* Loop counter */\n  int8_t kShift = 7 - shift; /* Shift to apply after scaling */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q7_t in1, in2, in3, in4;     /* Temporary input variables */\n  q7_t out1, out2, out3, out4; /* Temporary output variables */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * scale */\n\n#if defined(ARM_MATH_DSP)\n    /* Reading 4 inputs from memory */\n    in1 = *pSrc++;\n    in2 = *pSrc++;\n    in3 = *pSrc++;\n    in4 = *pSrc++;\n\n    /* Scale inputs and store result in the temporary variable. */\n    out1 = (q7_t)(__SSAT(((in1)*scaleFract) >> kShift, 8));\n    out2 = (q7_t)(__SSAT(((in2)*scaleFract) >> kShift, 8));\n    out3 = (q7_t)(__SSAT(((in3)*scaleFract) >> kShift, 8));\n    out4 = (q7_t)(__SSAT(((in4)*scaleFract) >> kShift, 8));\n\n    /* Pack and store result in destination buffer (in single write) */\n    write_q7x4_ia(&pDst, __PACKq7(out1, out2, out3, out4));\n#else\n    *pDst++ = (q7_t)(__SSAT((((q15_t)*pSrc++ * scaleFract) >> kShift), 8));\n    *pDst++ = (q7_t)(__SSAT((((q15_t)*pSrc++ * scaleFract) >> kShift), 8));\n    *pDst++ = (q7_t)(__SSAT((((q15_t)*pSrc++ * scaleFract) >> kShift), 8));\n    *pDst++ = (q7_t)(__SSAT((((q15_t)*pSrc++ * scaleFract) >> kShift), 8));\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * scale */\n\n    /* Scale input and store result in destination buffer. */\n    *pDst++ = (q7_t)(__SSAT((((q15_t)*pSrc++ * scaleFract) >> kShift), 8));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicScale group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_shift_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_shift_q15.c\n * Description:  Shifts the elements of a Q15 vector by a specified number of\n * bits\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicShift\n  @{\n */\n\n/**\n  @brief         Shifts the elements of a Q15 vector a specified number of bits\n  @param[in]     pSrc       points to the input vector\n  @param[in]     shiftBits  number of bits to shift.  A positive value shifts\n  left; a negative value shifts right.\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n */\n\nvoid arm_shift_q15(const q15_t *pSrc, int8_t shiftBits, q15_t *pDst,\n                   uint32_t blockSize) {\n  uint32_t blkCnt;                   /* Loop counter */\n  uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q15_t in1, in2; /* Temporary input variables */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  /* If the shift value is positive then do right shift else left shift */\n  if (sign == 0U) {\n    while (blkCnt > 0U) {\n      /* C = A << shiftBits */\n\n#if defined(ARM_MATH_DSP)\n      /* read 2 samples from source */\n      in1 = *pSrc++;\n      in2 = *pSrc++;\n\n      /* Shift the inputs and then store the results in the destination buffer.\n       */\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),\n                                    __SSAT((in2 << shiftBits), 16), 16));\n#else\n      write_q15x2_ia(&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),\n                                    __SSAT((in1 << shiftBits), 16), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n      /* read 2 samples from source */\n      in1 = *pSrc++;\n      in2 = *pSrc++;\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),\n                                    __SSAT((in2 << shiftBits), 16), 16));\n#else\n      write_q15x2_ia(&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),\n                                    __SSAT((in1 << shiftBits), 16), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n#else\n      *pDst++ = __SSAT(((q31_t)*pSrc++ << shiftBits), 16);\n      *pDst++ = __SSAT(((q31_t)*pSrc++ << shiftBits), 16);\n      *pDst++ = __SSAT(((q31_t)*pSrc++ << shiftBits), 16);\n      *pDst++ = __SSAT(((q31_t)*pSrc++ << shiftBits), 16);\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    while (blkCnt > 0U) {\n      /* C = A >> shiftBits */\n\n#if defined(ARM_MATH_DSP)\n      /* read 2 samples from source */\n      in1 = *pSrc++;\n      in2 = *pSrc++;\n\n      /* Shift the inputs and then store the results in the destination buffer.\n       */\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pDst,\n                     __PKHBT((in1 >> -shiftBits), (in2 >> -shiftBits), 16));\n#else\n      write_q15x2_ia(&pDst,\n                     __PKHBT((in2 >> -shiftBits), (in1 >> -shiftBits), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n      /* read 2 samples from source */\n      in1 = *pSrc++;\n      in2 = *pSrc++;\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pDst,\n                     __PKHBT((in1 >> -shiftBits), (in2 >> -shiftBits), 16));\n#else\n      write_q15x2_ia(&pDst,\n                     __PKHBT((in2 >> -shiftBits), (in1 >> -shiftBits), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n#else\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* If the shift value is positive then do right shift else left shift */\n  if (sign == 0U) {\n    while (blkCnt > 0U) {\n      /* C = A << shiftBits */\n\n      /* Shift input and store result in destination buffer. */\n      *pDst++ = __SSAT(((q31_t)*pSrc++ << shiftBits), 16);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    while (blkCnt > 0U) {\n      /* C = A >> shiftBits */\n\n      /* Shift input and store result in destination buffer. */\n      *pDst++ = (*pSrc++ >> -shiftBits);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n}\n\n/**\n  @} end of BasicShift group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_shift_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_shift_q31.c\n * Description:  Shifts the elements of a Q31 vector by a specified number of\n * bits\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n/**\n  @defgroup BasicShift Vector Shift\n\n  Shifts the elements of a fixed-point vector by a specified number of bits.\n  There are separate functions for Q7, Q15, and Q31 data types.\n  The underlying algorithm used is:\n\n  
\n      pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.\n  
\n\n  If shift is positive then the elements of the vector are shifted\n  to the left. If shift is negative then the elements of the vector\n  are shifted to the right.\n\n  The functions support in-place computation allowing the source and destination\n  pointers to reference the same memory buffer.\n */\n\n/**\n  @addtogroup BasicShift\n  @{\n */\n\n/**\n  @brief         Shifts the elements of a Q31 vector a specified number of bits.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     shiftBits  number of bits to shift.  A positive value shifts\n  left; a negative value shifts right.\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in the vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range [0x80000000\n  0x7FFFFFFF] are saturated.\n */\n\nvoid arm_shift_q31(const q31_t *pSrc, int8_t shiftBits, q31_t *pDst,\n                   uint32_t blockSize) {\n  uint32_t blkCnt;                   /* Loop counter */\n  uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  q31_t in, out; /* Temporary variables */\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  /* If the shift value is positive then do right shift else left shift */\n  if (sign == 0U) {\n    while (blkCnt > 0U) {\n      /* C = A << shiftBits */\n\n      /* Shift input and store result in destination buffer. */\n      in = *pSrc++;\n      out = in << shiftBits;\n      if (in != (out >> shiftBits))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out;\n\n      in = *pSrc++;\n      out = in << shiftBits;\n      if (in != (out >> shiftBits))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out;\n\n      in = *pSrc++;\n      out = in << shiftBits;\n      if (in != (out >> shiftBits))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out;\n\n      in = *pSrc++;\n      out = in << shiftBits;\n      if (in != (out >> shiftBits))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pDst++ = out;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    while (blkCnt > 0U) {\n      /* C = A >> shiftBits */\n\n      /* Shift input and store results in destination buffer. */\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* If the shift value is positive then do right shift else left shift */\n  if (sign == 0U) {\n    while (blkCnt > 0U) {\n      /* C = A << shiftBits */\n\n      /* Shift input and store result in destination buffer. */\n      *pDst++ = clip_q63_to_q31((q63_t)*pSrc++ << shiftBits);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    while (blkCnt > 0U) {\n      /* C = A >> shiftBits */\n\n      /* Shift input and store result in destination buffer. */\n      *pDst++ = (*pSrc++ >> -shiftBits);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n}\n\n/**\n  @} end of BasicShift group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_shift_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_shift_q7.c\n * Description:  Processing function for the Q7 Shifting\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicShift\n  @{\n */\n\n/**\n  @brief         Shifts the elements of a Q7 vector a specified number of bits\n  @param[in]     pSrc       points to the input vector\n  @param[in]     shiftBits  number of bits to shift.  A positive value shifts\n  left; a negative value shifts right.\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           onditions for optimum performance\n                   Input and output buffers should be aligned by 32-bit\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q7 range [0x80 0x7F] are\n  saturated.\n */\n\nvoid arm_shift_q7(const q7_t *pSrc, int8_t shiftBits, q7_t *pDst,\n                  uint32_t blockSize) {\n  uint32_t blkCnt;                   /* Loop counter */\n  uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q7_t in1, in2, in3, in4; /* Temporary input variables */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  /* If the shift value is positive then do right shift else left shift */\n  if (sign == 0U) {\n    while (blkCnt > 0U) {\n      /* C = A << shiftBits */\n\n#if defined(ARM_MATH_DSP)\n      /* Read 4 inputs */\n      in1 = *pSrc++;\n      in2 = *pSrc++;\n      in3 = *pSrc++;\n      in4 = *pSrc++;\n\n      /* Pack and store result in destination buffer (in single write) */\n      write_q7x4_ia(&pDst, __PACKq7(__SSAT((in1 << shiftBits), 8),\n                                    __SSAT((in2 << shiftBits), 8),\n                                    __SSAT((in3 << shiftBits), 8),\n                                    __SSAT((in4 << shiftBits), 8)));\n#else\n      *pDst++ = (q7_t)__SSAT(((q15_t)*pSrc++ << shiftBits), 8);\n      *pDst++ = (q7_t)__SSAT(((q15_t)*pSrc++ << shiftBits), 8);\n      *pDst++ = (q7_t)__SSAT(((q15_t)*pSrc++ << shiftBits), 8);\n      *pDst++ = (q7_t)__SSAT(((q15_t)*pSrc++ << shiftBits), 8);\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    while (blkCnt > 0U) {\n      /* C = A >> shiftBits */\n\n#if defined(ARM_MATH_DSP)\n      /* Read 4 inputs */\n      in1 = *pSrc++;\n      in2 = *pSrc++;\n      in3 = *pSrc++;\n      in4 = *pSrc++;\n\n      /* Pack and store result in destination buffer (in single write) */\n      write_q7x4_ia(&pDst, __PACKq7((in1 >> -shiftBits), (in2 >> -shiftBits),\n                                    (in3 >> -shiftBits), (in4 >> -shiftBits)));\n#else\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n      *pDst++ = (*pSrc++ >> -shiftBits);\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* If the shift value is positive then do right shift else left shift */\n  if (sign == 0U) {\n    while (blkCnt > 0U) {\n      /* C = A << shiftBits */\n\n      /* Shift input and store result in destination buffer. */\n      *pDst++ = (q7_t)__SSAT(((q15_t)*pSrc++ << shiftBits), 8);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    while (blkCnt > 0U) {\n      /* C = A >> shiftBits */\n\n      /* Shift input and store result in destination buffer. */\n      *pDst++ = (*pSrc++ >> -shiftBits);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n}\n\n/**\n  @} end of BasicShift group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_sub_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sub_f32.c\n * Description:  Floating-point vector subtraction\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @defgroup BasicSub Vector Subtraction\n\n  Element-by-element subtraction of two vectors.\n\n  
\n      pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.\n  
\n\n  There are separate functions for floating-point, Q7, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup BasicSub\n  @{\n */\n\n/**\n  @brief         Floating-point vector subtraction.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_sub_f32(const float32_t *pSrcA, const float32_t *pSrcB,\n                 float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A - B */\n\n    /* Subtract and store result in destination buffer. */\n    *pDst++ = (*pSrcA++) - (*pSrcB++);\n\n    *pDst++ = (*pSrcA++) - (*pSrcB++);\n\n    *pDst++ = (*pSrcA++) - (*pSrcB++);\n\n    *pDst++ = (*pSrcA++) - (*pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A - B */\n\n    /* Subtract and store result in destination buffer. */\n    *pDst++ = (*pSrcA++) - (*pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicSub group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_sub_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sub_q15.c\n * Description:  Q15 vector subtraction\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicSub\n  @{\n */\n\n/**\n  @brief         Q15 vector subtraction.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n */\n\nvoid arm_sub_q15(const q15_t *pSrcA, const q15_t *pSrcB, q15_t *pDst,\n                 uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t inA1, inA2;\n  q31_t inB1, inB2;\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A - B */\n\n#if defined(ARM_MATH_DSP)\n    /* read 2 times 2 samples at a time from sourceA */\n    inA1 = read_q15x2_ia((q15_t **)&pSrcA);\n    inA2 = read_q15x2_ia((q15_t **)&pSrcA);\n    /* read 2 times 2 samples at a time from sourceB */\n    inB1 = read_q15x2_ia((q15_t **)&pSrcB);\n    inB2 = read_q15x2_ia((q15_t **)&pSrcB);\n\n    /* Subtract and store 2 times 2 samples at a time */\n    write_q15x2_ia(&pDst, __QSUB16(inA1, inB1));\n    write_q15x2_ia(&pDst, __QSUB16(inA2, inB2));\n#else\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ - *pSrcB++), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ - *pSrcB++), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ - *pSrcB++), 16);\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ - *pSrcB++), 16);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A - B */\n\n    /* Subtract and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n    *pDst++ = (q15_t)__QSUB16(*pSrcA++, *pSrcB++);\n#else\n    *pDst++ = (q15_t)__SSAT(((q31_t)*pSrcA++ - *pSrcB++), 16);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicSub group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_sub_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sub_q31.c\n * Description:  Q31 vector subtraction\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicSub\n  @{\n */\n\n/**\n  @brief         Q31 vector subtraction.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range [0x80000000\n  0x7FFFFFFF] are saturated.\n */\n\nvoid arm_sub_q31(const q31_t *pSrcA, const q31_t *pSrcB, q31_t *pDst,\n                 uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A - B */\n\n    /* Subtract and store result in destination buffer. */\n    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);\n\n    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);\n\n    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);\n\n    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A - B */\n\n    /* Subtract and store result in destination buffer. */\n    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicSub group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/BasicMathFunctions/arm_sub_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sub_q7.c\n * Description:  Q7 vector subtraction\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMath\n */\n\n/**\n  @addtogroup BasicSub\n  @{\n */\n\n/**\n  @brief         Q7 vector subtraction.\n  @param[in]     pSrcA      points to the first input vector\n  @param[in]     pSrcB      points to the second input vector\n  @param[out]    pDst       points to the output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q7 range [0x80 0x7F] will be\n  saturated.\n */\n\nvoid arm_sub_q7(const q7_t *pSrcA, const q7_t *pSrcB, q7_t *pDst,\n                uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A - B */\n\n#if defined(ARM_MATH_DSP)\n    /* Subtract and store result in destination buffer (4 samples at a time). */\n    write_q7x4_ia(&pDst, __QSUB8(read_q7x4_ia((q7_t **)&pSrcA),\n                                 read_q7x4_ia((q7_t **)&pSrcB)));\n#else\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ - *pSrcB++, 8);\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ - *pSrcB++, 8);\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ - *pSrcB++, 8);\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ - *pSrcB++, 8);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A - B */\n\n    /* Subtract and store result in destination buffer. */\n    *pDst++ = (q7_t)__SSAT((q15_t)*pSrcA++ - *pSrcB++, 8);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicSub group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/CommonTables/CommonTables.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        CommonTables.c\n * Description:  Combination of all common table source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.c\"\n#include \"arm_const_structs.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/CommonTables/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out CommonTables.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/CommonTables/arm_common_tables.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_common_tables.c\n * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal\n * etc\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup ComplexFFT\n */\n\n/**\n  @addtogroup CFFT_CIFFT Complex FFT Tables\n  @{\n */\n\n/**\n  @par\n  Pseudo code for Generation of Bit reversal Table is\n  @par\n  
for (l = 1; l <= N/4; l++)\n  {\n    for (i = 0; i< logN2; i++)\n    {\n      a[i] = l & (1 << i);\n    }\n    for (j = 0; j < logN2; j++)\n    {\n      if (a[j] != 0)\n      y[l] += (1 << ((logN2 - 1) - j));\n    }\n    y[l] = y[l] >> 1;\n   } 
\n  @par\n  where N = 4096, logN2 = 12\n  @par\n  N is the maximum FFT Size supported\n*/\n\n/**\n  @brief  Table for bit reversal process\n*/\nconst uint16_t armBitRevTable[1024] = {\n    0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x080, 0x480, 0x280, 0x680,\n    0x180, 0x580, 0x380, 0x780, 0x040, 0x440, 0x240, 0x640, 0x140, 0x540, 0x340,\n    0x740, 0x0c0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0, 0x7c0, 0x020, 0x420,\n    0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0x0a0, 0x4a0, 0x2a0, 0x6a0, 0x1a0,\n    0x5a0, 0x3a0, 0x7a0, 0x060, 0x460, 0x260, 0x660, 0x160, 0x560, 0x360, 0x760,\n    0x0e0, 0x4e0, 0x2e0, 0x6e0, 0x1e0, 0x5e0, 0x3e0, 0x7e0, 0x010, 0x410, 0x210,\n    0x610, 0x110, 0x510, 0x310, 0x710, 0x090, 0x490, 0x290, 0x690, 0x190, 0x590,\n    0x390, 0x790, 0x050, 0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0x0d0,\n    0x4d0, 0x2d0, 0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x030, 0x430, 0x230, 0x630,\n    0x130, 0x530, 0x330, 0x730, 0x0b0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,\n    0x7b0, 0x070, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0x0f0, 0x4f0,\n    0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x008, 0x408, 0x208, 0x608, 0x108,\n    0x508, 0x308, 0x708, 0x088, 0x488, 0x288, 0x688, 0x188, 0x588, 0x388, 0x788,\n    0x048, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348, 0x748, 0x0c8, 0x4c8, 0x2c8,\n    0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x028, 0x428, 0x228, 0x628, 0x128, 0x528,\n    0x328, 0x728, 0x0a8, 0x4a8, 0x2a8, 0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x068,\n    0x468, 0x268, 0x668, 0x168, 0x568, 0x368, 0x768, 0x0e8, 0x4e8, 0x2e8, 0x6e8,\n    0x1e8, 0x5e8, 0x3e8, 0x7e8, 0x018, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318,\n    0x718, 0x098, 0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x058, 0x458,\n    0x258, 0x658, 0x158, 0x558, 0x358, 0x758, 0x0d8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,\n    0x5d8, 0x3d8, 0x7d8, 0x038, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338, 0x738,\n    0x0b8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x078, 0x478, 0x278,\n    0x678, 0x178, 0x578, 0x378, 0x778, 0x0f8, 0x4f8, 0x2f8, 0x6f8, 0x1f8, 0x5f8,\n    0x3f8, 0x7f8, 0x004, 0x404, 0x204, 0x604, 0x104, 0x504, 0x304, 0x704, 0x084,\n    0x484, 0x284, 0x684, 0x184, 0x584, 0x384, 0x784, 0x044, 0x444, 0x244, 0x644,\n    0x144, 0x544, 0x344, 0x744, 0x0c4, 0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4,\n    0x7c4, 0x024, 0x424, 0x224, 0x624, 0x124, 0x524, 0x324, 0x724, 0x0a4, 0x4a4,\n    0x2a4, 0x6a4, 0x1a4, 0x5a4, 0x3a4, 0x7a4, 0x064, 0x464, 0x264, 0x664, 0x164,\n    0x564, 0x364, 0x764, 0x0e4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4,\n    0x014, 0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x094, 0x494, 0x294,\n    0x694, 0x194, 0x594, 0x394, 0x794, 0x054, 0x454, 0x254, 0x654, 0x154, 0x554,\n    0x354, 0x754, 0x0d4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4, 0x7d4, 0x034,\n    0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0x0b4, 0x4b4, 0x2b4, 0x6b4,\n    0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x074, 0x474, 0x274, 0x674, 0x174, 0x574, 0x374,\n    0x774, 0x0f4, 0x4f4, 0x2f4, 0x6f4, 0x1f4, 0x5f4, 0x3f4, 0x7f4, 0x00c, 0x40c,\n    0x20c, 0x60c, 0x10c, 0x50c, 0x30c, 0x70c, 0x08c, 0x48c, 0x28c, 0x68c, 0x18c,\n    0x58c, 0x38c, 0x78c, 0x04c, 0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c,\n    0x0cc, 0x4cc, 0x2cc, 0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x02c, 0x42c, 0x22c,\n    0x62c, 0x12c, 0x52c, 0x32c, 0x72c, 0x0ac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac,\n    0x3ac, 0x7ac, 0x06c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0x0ec,\n    0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x01c, 0x41c, 0x21c, 0x61c,\n    0x11c, 0x51c, 0x31c, 0x71c, 0x09c, 0x49c, 0x29c, 0x69c, 0x19c, 0x59c, 0x39c,\n    0x79c, 0x05c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c, 0x75c, 0x0dc, 0x4dc,\n    0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x03c, 0x43c, 0x23c, 0x63c, 0x13c,\n    0x53c, 0x33c, 0x73c, 0x0bc, 0x4bc, 0x2bc, 0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc,\n    0x07c, 0x47c, 0x27c, 0x67c, 0x17c, 0x57c, 0x37c, 0x77c, 0x0fc, 0x4fc, 0x2fc,\n    0x6fc, 0x1fc, 0x5fc, 0x3fc, 0x7fc, 0x002, 0x402, 0x202, 0x602, 0x102, 0x502,\n    0x302, 0x702, 0x082, 0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x042,\n    0x442, 0x242, 0x642, 0x142, 0x542, 0x342, 0x742, 0x0c2, 0x4c2, 0x2c2, 0x6c2,\n    0x1c2, 0x5c2, 0x3c2, 0x7c2, 0x022, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,\n    0x722, 0x0a2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x062, 0x462,\n    0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0x0e2, 0x4e2, 0x2e2, 0x6e2, 0x1e2,\n    0x5e2, 0x3e2, 0x7e2, 0x012, 0x412, 0x212, 0x612, 0x112, 0x512, 0x312, 0x712,\n    0x092, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392, 0x792, 0x052, 0x452, 0x252,\n    0x652, 0x152, 0x552, 0x352, 0x752, 0x0d2, 0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2,\n    0x3d2, 0x7d2, 0x032, 0x432, 0x232, 0x632, 0x132, 0x532, 0x332, 0x732, 0x0b2,\n    0x4b2, 0x2b2, 0x6b2, 0x1b2, 0x5b2, 0x3b2, 0x7b2, 0x072, 0x472, 0x272, 0x672,\n    0x172, 0x572, 0x372, 0x772, 0x0f2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2,\n    0x7f2, 0x00a, 0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x08a, 0x48a,\n    0x28a, 0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x04a, 0x44a, 0x24a, 0x64a, 0x14a,\n    0x54a, 0x34a, 0x74a, 0x0ca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca, 0x7ca,\n    0x02a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0x0aa, 0x4aa, 0x2aa,\n    0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x06a, 0x46a, 0x26a, 0x66a, 0x16a, 0x56a,\n    0x36a, 0x76a, 0x0ea, 0x4ea, 0x2ea, 0x6ea, 0x1ea, 0x5ea, 0x3ea, 0x7ea, 0x01a,\n    0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a, 0x71a, 0x09a, 0x49a, 0x29a, 0x69a,\n    0x19a, 0x59a, 0x39a, 0x79a, 0x5a,  0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a,\n    0x75a, 0x0da, 0x4da, 0x2da, 0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x03a, 0x43a,\n    0x23a, 0x63a, 0x13a, 0x53a, 0x33a, 0x73a, 0x0ba, 0x4ba, 0x2ba, 0x6ba, 0x1ba,\n    0x5ba, 0x3ba, 0x7ba, 0x07a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a,\n    0x0fa, 0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x006, 0x406, 0x206,\n    0x606, 0x106, 0x506, 0x306, 0x706, 0x086, 0x486, 0x286, 0x686, 0x186, 0x586,\n    0x386, 0x786, 0x046, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346, 0x746, 0x0c6,\n    0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x026, 0x426, 0x226, 0x626,\n    0x126, 0x526, 0x326, 0x726, 0x0a6, 0x4a6, 0x2a6, 0x6a6, 0x1a6, 0x5a6, 0x3a6,\n    0x7a6, 0x066, 0x466, 0x266, 0x666, 0x166, 0x566, 0x366, 0x766, 0x0e6, 0x4e6,\n    0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6, 0x7e6, 0x016, 0x416, 0x216, 0x616, 0x116,\n    0x516, 0x316, 0x716, 0x096, 0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796,\n    0x056, 0x456, 0x256, 0x656, 0x156, 0x556, 0x356, 0x756, 0x0d6, 0x4d6, 0x2d6,\n    0x6d6, 0x1d6, 0x5d6, 0x3d6, 0x7d6, 0x036, 0x436, 0x236, 0x636, 0x136, 0x536,\n    0x336, 0x736, 0x0b6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x076,\n    0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0x0f6, 0x4f6, 0x2f6, 0x6f6,\n    0x1f6, 0x5f6, 0x3f6, 0x7f6, 0x00e, 0x40e, 0x20e, 0x60e, 0x10e, 0x50e, 0x30e,\n    0x70e, 0x08e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e, 0x78e, 0x04e, 0x44e,\n    0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0x0ce, 0x4ce, 0x2ce, 0x6ce, 0x1ce,\n    0x5ce, 0x3ce, 0x7ce, 0x02e, 0x42e, 0x22e, 0x62e, 0x12e, 0x52e, 0x32e, 0x72e,\n    0x0ae, 0x4ae, 0x2ae, 0x6ae, 0x1ae, 0x5ae, 0x3ae, 0x7ae, 0x06e, 0x46e, 0x26e,\n    0x66e, 0x16e, 0x56e, 0x36e, 0x76e, 0x0ee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee,\n    0x3ee, 0x7ee, 0x01e, 0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x09e,\n    0x49e, 0x29e, 0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x05e, 0x45e, 0x25e, 0x65e,\n    0x15e, 0x55e, 0x35e, 0x75e, 0x0de, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,\n    0x7de, 0x03e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0x0be, 0x4be,\n    0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x07e, 0x47e, 0x27e, 0x67e, 0x17e,\n    0x57e, 0x37e, 0x77e, 0x0fe, 0x4fe, 0x2fe, 0x6fe, 0x1fe, 0x5fe, 0x3fe, 0x7fe,\n    0x001};\n\n/**\n  @brief  Floating-point Twiddle factors Table Generation\n*/\n\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for (i = 0; i < N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 16, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_16[32] = {\n    1.000000000f,  0.000000000f,  0.923879533f,  0.382683432f,  0.707106781f,\n    0.707106781f,  0.382683432f,  0.923879533f,  0.000000000f,  1.000000000f,\n    -0.382683432f, 0.923879533f,  -0.707106781f, 0.707106781f,  -0.923879533f,\n    0.382683432f,  -1.000000000f, 0.000000000f,  -0.923879533f, -0.382683432f,\n    -0.707106781f, -0.707106781f, -0.382683432f, -0.923879533f, -0.000000000f,\n    -1.000000000f, 0.382683432f,  -0.923879533f, 0.707106781f,  -0.707106781f,\n    0.923879533f,  -0.382683432f};\n\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for (i = 0; i< N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 32, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_32[64] = {\n    1.000000000f,  0.000000000f,  0.980785280f,  0.195090322f,  0.923879533f,\n    0.382683432f,  0.831469612f,  0.555570233f,  0.707106781f,  0.707106781f,\n    0.555570233f,  0.831469612f,  0.382683432f,  0.923879533f,  0.195090322f,\n    0.980785280f,  0.000000000f,  1.000000000f,  -0.195090322f, 0.980785280f,\n    -0.382683432f, 0.923879533f,  -0.555570233f, 0.831469612f,  -0.707106781f,\n    0.707106781f,  -0.831469612f, 0.555570233f,  -0.923879533f, 0.382683432f,\n    -0.980785280f, 0.195090322f,  -1.000000000f, 0.000000000f,  -0.980785280f,\n    -0.195090322f, -0.923879533f, -0.382683432f, -0.831469612f, -0.555570233f,\n    -0.707106781f, -0.707106781f, -0.555570233f, -0.831469612f, -0.382683432f,\n    -0.923879533f, -0.195090322f, -0.980785280f, -0.000000000f, -1.000000000f,\n    0.195090322f,  -0.980785280f, 0.382683432f,  -0.923879533f, 0.555570233f,\n    -0.831469612f, 0.707106781f,  -0.707106781f, 0.831469612f,  -0.555570233f,\n    0.923879533f,  -0.382683432f, 0.980785280f,  -0.195090322f};\n\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for(i = 0; i < N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 64, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_64[128] = {\n    1.000000000f,  0.000000000f,  0.995184727f,  0.098017140f,  0.980785280f,\n    0.195090322f,  0.956940336f,  0.290284677f,  0.923879533f,  0.382683432f,\n    0.881921264f,  0.471396737f,  0.831469612f,  0.555570233f,  0.773010453f,\n    0.634393284f,  0.707106781f,  0.707106781f,  0.634393284f,  0.773010453f,\n    0.555570233f,  0.831469612f,  0.471396737f,  0.881921264f,  0.382683432f,\n    0.923879533f,  0.290284677f,  0.956940336f,  0.195090322f,  0.980785280f,\n    0.098017140f,  0.995184727f,  0.000000000f,  1.000000000f,  -0.098017140f,\n    0.995184727f,  -0.195090322f, 0.980785280f,  -0.290284677f, 0.956940336f,\n    -0.382683432f, 0.923879533f,  -0.471396737f, 0.881921264f,  -0.555570233f,\n    0.831469612f,  -0.634393284f, 0.773010453f,  -0.707106781f, 0.707106781f,\n    -0.773010453f, 0.634393284f,  -0.831469612f, 0.555570233f,  -0.881921264f,\n    0.471396737f,  -0.923879533f, 0.382683432f,  -0.956940336f, 0.290284677f,\n    -0.980785280f, 0.195090322f,  -0.995184727f, 0.098017140f,  -1.000000000f,\n    0.000000000f,  -0.995184727f, -0.098017140f, -0.980785280f, -0.195090322f,\n    -0.956940336f, -0.290284677f, -0.923879533f, -0.382683432f, -0.881921264f,\n    -0.471396737f, -0.831469612f, -0.555570233f, -0.773010453f, -0.634393284f,\n    -0.707106781f, -0.707106781f, -0.634393284f, -0.773010453f, -0.555570233f,\n    -0.831469612f, -0.471396737f, -0.881921264f, -0.382683432f, -0.923879533f,\n    -0.290284677f, -0.956940336f, -0.195090322f, -0.980785280f, -0.098017140f,\n    -0.995184727f, -0.000000000f, -1.000000000f, 0.098017140f,  -0.995184727f,\n    0.195090322f,  -0.980785280f, 0.290284677f,  -0.956940336f, 0.382683432f,\n    -0.923879533f, 0.471396737f,  -0.881921264f, 0.555570233f,  -0.831469612f,\n    0.634393284f,  -0.773010453f, 0.707106781f,  -0.707106781f, 0.773010453f,\n    -0.634393284f, 0.831469612f,  -0.555570233f, 0.881921264f,  -0.471396737f,\n    0.923879533f,  -0.382683432f, 0.956940336f,  -0.290284677f, 0.980785280f,\n    -0.195090322f, 0.995184727f,  -0.098017140f};\n\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for (i = 0; i< N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 128, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_128[256] = {\n    1.000000000f,  0.000000000f,  0.998795456f,  0.049067674f,  0.995184727f,\n    0.098017140f,  0.989176510f,  0.146730474f,  0.980785280f,  0.195090322f,\n    0.970031253f,  0.242980180f,  0.956940336f,  0.290284677f,  0.941544065f,\n    0.336889853f,  0.923879533f,  0.382683432f,  0.903989293f,  0.427555093f,\n    0.881921264f,  0.471396737f,  0.857728610f,  0.514102744f,  0.831469612f,\n    0.555570233f,  0.803207531f,  0.595699304f,  0.773010453f,  0.634393284f,\n    0.740951125f,  0.671558955f,  0.707106781f,  0.707106781f,  0.671558955f,\n    0.740951125f,  0.634393284f,  0.773010453f,  0.595699304f,  0.803207531f,\n    0.555570233f,  0.831469612f,  0.514102744f,  0.857728610f,  0.471396737f,\n    0.881921264f,  0.427555093f,  0.903989293f,  0.382683432f,  0.923879533f,\n    0.336889853f,  0.941544065f,  0.290284677f,  0.956940336f,  0.242980180f,\n    0.970031253f,  0.195090322f,  0.980785280f,  0.146730474f,  0.989176510f,\n    0.098017140f,  0.995184727f,  0.049067674f,  0.998795456f,  0.000000000f,\n    1.000000000f,  -0.049067674f, 0.998795456f,  -0.098017140f, 0.995184727f,\n    -0.146730474f, 0.989176510f,  -0.195090322f, 0.980785280f,  -0.242980180f,\n    0.970031253f,  -0.290284677f, 0.956940336f,  -0.336889853f, 0.941544065f,\n    -0.382683432f, 0.923879533f,  -0.427555093f, 0.903989293f,  -0.471396737f,\n    0.881921264f,  -0.514102744f, 0.857728610f,  -0.555570233f, 0.831469612f,\n    -0.595699304f, 0.803207531f,  -0.634393284f, 0.773010453f,  -0.671558955f,\n    0.740951125f,  -0.707106781f, 0.707106781f,  -0.740951125f, 0.671558955f,\n    -0.773010453f, 0.634393284f,  -0.803207531f, 0.595699304f,  -0.831469612f,\n    0.555570233f,  -0.857728610f, 0.514102744f,  -0.881921264f, 0.471396737f,\n    -0.903989293f, 0.427555093f,  -0.923879533f, 0.382683432f,  -0.941544065f,\n    0.336889853f,  -0.956940336f, 0.290284677f,  -0.970031253f, 0.242980180f,\n    -0.980785280f, 0.195090322f,  -0.989176510f, 0.146730474f,  -0.995184727f,\n    0.098017140f,  -0.998795456f, 0.049067674f,  -1.000000000f, 0.000000000f,\n    -0.998795456f, -0.049067674f, -0.995184727f, -0.098017140f, -0.989176510f,\n    -0.146730474f, -0.980785280f, -0.195090322f, -0.970031253f, -0.242980180f,\n    -0.956940336f, -0.290284677f, -0.941544065f, -0.336889853f, -0.923879533f,\n    -0.382683432f, -0.903989293f, -0.427555093f, -0.881921264f, -0.471396737f,\n    -0.857728610f, -0.514102744f, -0.831469612f, -0.555570233f, -0.803207531f,\n    -0.595699304f, -0.773010453f, -0.634393284f, -0.740951125f, -0.671558955f,\n    -0.707106781f, -0.707106781f, -0.671558955f, -0.740951125f, -0.634393284f,\n    -0.773010453f, -0.595699304f, -0.803207531f, -0.555570233f, -0.831469612f,\n    -0.514102744f, -0.857728610f, -0.471396737f, -0.881921264f, -0.427555093f,\n    -0.903989293f, -0.382683432f, -0.923879533f, -0.336889853f, -0.941544065f,\n    -0.290284677f, -0.956940336f, -0.242980180f, -0.970031253f, -0.195090322f,\n    -0.980785280f, -0.146730474f, -0.989176510f, -0.098017140f, -0.995184727f,\n    -0.049067674f, -0.998795456f, -0.000000000f, -1.000000000f, 0.049067674f,\n    -0.998795456f, 0.098017140f,  -0.995184727f, 0.146730474f,  -0.989176510f,\n    0.195090322f,  -0.980785280f, 0.242980180f,  -0.970031253f, 0.290284677f,\n    -0.956940336f, 0.336889853f,  -0.941544065f, 0.382683432f,  -0.923879533f,\n    0.427555093f,  -0.903989293f, 0.471396737f,  -0.881921264f, 0.514102744f,\n    -0.857728610f, 0.555570233f,  -0.831469612f, 0.595699304f,  -0.803207531f,\n    0.634393284f,  -0.773010453f, 0.671558955f,  -0.740951125f, 0.707106781f,\n    -0.707106781f, 0.740951125f,  -0.671558955f, 0.773010453f,  -0.634393284f,\n    0.803207531f,  -0.595699304f, 0.831469612f,  -0.555570233f, 0.857728610f,\n    -0.514102744f, 0.881921264f,  -0.471396737f, 0.903989293f,  -0.427555093f,\n    0.923879533f,  -0.382683432f, 0.941544065f,  -0.336889853f, 0.956940336f,\n    -0.290284677f, 0.970031253f,  -0.242980180f, 0.980785280f,  -0.195090322f,\n    0.989176510f,  -0.146730474f, 0.995184727f,  -0.098017140f, 0.998795456f,\n    -0.049067674f};\n\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for(i = 0; i< N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 256, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_256[512] = {\n    1.000000000f,  0.000000000f,  0.999698819f,  0.024541229f,  0.998795456f,\n    0.049067674f,  0.997290457f,  0.073564564f,  0.995184727f,  0.098017140f,\n    0.992479535f,  0.122410675f,  0.989176510f,  0.146730474f,  0.985277642f,\n    0.170961889f,  0.980785280f,  0.195090322f,  0.975702130f,  0.219101240f,\n    0.970031253f,  0.242980180f,  0.963776066f,  0.266712757f,  0.956940336f,\n    0.290284677f,  0.949528181f,  0.313681740f,  0.941544065f,  0.336889853f,\n    0.932992799f,  0.359895037f,  0.923879533f,  0.382683432f,  0.914209756f,\n    0.405241314f,  0.903989293f,  0.427555093f,  0.893224301f,  0.449611330f,\n    0.881921264f,  0.471396737f,  0.870086991f,  0.492898192f,  0.857728610f,\n    0.514102744f,  0.844853565f,  0.534997620f,  0.831469612f,  0.555570233f,\n    0.817584813f,  0.575808191f,  0.803207531f,  0.595699304f,  0.788346428f,\n    0.615231591f,  0.773010453f,  0.634393284f,  0.757208847f,  0.653172843f,\n    0.740951125f,  0.671558955f,  0.724247083f,  0.689540545f,  0.707106781f,\n    0.707106781f,  0.689540545f,  0.724247083f,  0.671558955f,  0.740951125f,\n    0.653172843f,  0.757208847f,  0.634393284f,  0.773010453f,  0.615231591f,\n    0.788346428f,  0.595699304f,  0.803207531f,  0.575808191f,  0.817584813f,\n    0.555570233f,  0.831469612f,  0.534997620f,  0.844853565f,  0.514102744f,\n    0.857728610f,  0.492898192f,  0.870086991f,  0.471396737f,  0.881921264f,\n    0.449611330f,  0.893224301f,  0.427555093f,  0.903989293f,  0.405241314f,\n    0.914209756f,  0.382683432f,  0.923879533f,  0.359895037f,  0.932992799f,\n    0.336889853f,  0.941544065f,  0.313681740f,  0.949528181f,  0.290284677f,\n    0.956940336f,  0.266712757f,  0.963776066f,  0.242980180f,  0.970031253f,\n    0.219101240f,  0.975702130f,  0.195090322f,  0.980785280f,  0.170961889f,\n    0.985277642f,  0.146730474f,  0.989176510f,  0.122410675f,  0.992479535f,\n    0.098017140f,  0.995184727f,  0.073564564f,  0.997290457f,  0.049067674f,\n    0.998795456f,  0.024541229f,  0.999698819f,  0.000000000f,  1.000000000f,\n    -0.024541229f, 0.999698819f,  -0.049067674f, 0.998795456f,  -0.073564564f,\n    0.997290457f,  -0.098017140f, 0.995184727f,  -0.122410675f, 0.992479535f,\n    -0.146730474f, 0.989176510f,  -0.170961889f, 0.985277642f,  -0.195090322f,\n    0.980785280f,  -0.219101240f, 0.975702130f,  -0.242980180f, 0.970031253f,\n    -0.266712757f, 0.963776066f,  -0.290284677f, 0.956940336f,  -0.313681740f,\n    0.949528181f,  -0.336889853f, 0.941544065f,  -0.359895037f, 0.932992799f,\n    -0.382683432f, 0.923879533f,  -0.405241314f, 0.914209756f,  -0.427555093f,\n    0.903989293f,  -0.449611330f, 0.893224301f,  -0.471396737f, 0.881921264f,\n    -0.492898192f, 0.870086991f,  -0.514102744f, 0.857728610f,  -0.534997620f,\n    0.844853565f,  -0.555570233f, 0.831469612f,  -0.575808191f, 0.817584813f,\n    -0.595699304f, 0.803207531f,  -0.615231591f, 0.788346428f,  -0.634393284f,\n    0.773010453f,  -0.653172843f, 0.757208847f,  -0.671558955f, 0.740951125f,\n    -0.689540545f, 0.724247083f,  -0.707106781f, 0.707106781f,  -0.724247083f,\n    0.689540545f,  -0.740951125f, 0.671558955f,  -0.757208847f, 0.653172843f,\n    -0.773010453f, 0.634393284f,  -0.788346428f, 0.615231591f,  -0.803207531f,\n    0.595699304f,  -0.817584813f, 0.575808191f,  -0.831469612f, 0.555570233f,\n    -0.844853565f, 0.534997620f,  -0.857728610f, 0.514102744f,  -0.870086991f,\n    0.492898192f,  -0.881921264f, 0.471396737f,  -0.893224301f, 0.449611330f,\n    -0.903989293f, 0.427555093f,  -0.914209756f, 0.405241314f,  -0.923879533f,\n    0.382683432f,  -0.932992799f, 0.359895037f,  -0.941544065f, 0.336889853f,\n    -0.949528181f, 0.313681740f,  -0.956940336f, 0.290284677f,  -0.963776066f,\n    0.266712757f,  -0.970031253f, 0.242980180f,  -0.975702130f, 0.219101240f,\n    -0.980785280f, 0.195090322f,  -0.985277642f, 0.170961889f,  -0.989176510f,\n    0.146730474f,  -0.992479535f, 0.122410675f,  -0.995184727f, 0.098017140f,\n    -0.997290457f, 0.073564564f,  -0.998795456f, 0.049067674f,  -0.999698819f,\n    0.024541229f,  -1.000000000f, 0.000000000f,  -0.999698819f, -0.024541229f,\n    -0.998795456f, -0.049067674f, -0.997290457f, -0.073564564f, -0.995184727f,\n    -0.098017140f, -0.992479535f, -0.122410675f, -0.989176510f, -0.146730474f,\n    -0.985277642f, -0.170961889f, -0.980785280f, -0.195090322f, -0.975702130f,\n    -0.219101240f, -0.970031253f, -0.242980180f, -0.963776066f, -0.266712757f,\n    -0.956940336f, -0.290284677f, -0.949528181f, -0.313681740f, -0.941544065f,\n    -0.336889853f, -0.932992799f, -0.359895037f, -0.923879533f, -0.382683432f,\n    -0.914209756f, -0.405241314f, -0.903989293f, -0.427555093f, -0.893224301f,\n    -0.449611330f, -0.881921264f, -0.471396737f, -0.870086991f, -0.492898192f,\n    -0.857728610f, -0.514102744f, -0.844853565f, -0.534997620f, -0.831469612f,\n    -0.555570233f, -0.817584813f, -0.575808191f, -0.803207531f, -0.595699304f,\n    -0.788346428f, -0.615231591f, -0.773010453f, -0.634393284f, -0.757208847f,\n    -0.653172843f, -0.740951125f, -0.671558955f, -0.724247083f, -0.689540545f,\n    -0.707106781f, -0.707106781f, -0.689540545f, -0.724247083f, -0.671558955f,\n    -0.740951125f, -0.653172843f, -0.757208847f, -0.634393284f, -0.773010453f,\n    -0.615231591f, -0.788346428f, -0.595699304f, -0.803207531f, -0.575808191f,\n    -0.817584813f, -0.555570233f, -0.831469612f, -0.534997620f, -0.844853565f,\n    -0.514102744f, -0.857728610f, -0.492898192f, -0.870086991f, -0.471396737f,\n    -0.881921264f, -0.449611330f, -0.893224301f, -0.427555093f, -0.903989293f,\n    -0.405241314f, -0.914209756f, -0.382683432f, -0.923879533f, -0.359895037f,\n    -0.932992799f, -0.336889853f, -0.941544065f, -0.313681740f, -0.949528181f,\n    -0.290284677f, -0.956940336f, -0.266712757f, -0.963776066f, -0.242980180f,\n    -0.970031253f, -0.219101240f, -0.975702130f, -0.195090322f, -0.980785280f,\n    -0.170961889f, -0.985277642f, -0.146730474f, -0.989176510f, -0.122410675f,\n    -0.992479535f, -0.098017140f, -0.995184727f, -0.073564564f, -0.997290457f,\n    -0.049067674f, -0.998795456f, -0.024541229f, -0.999698819f, -0.000000000f,\n    -1.000000000f, 0.024541229f,  -0.999698819f, 0.049067674f,  -0.998795456f,\n    0.073564564f,  -0.997290457f, 0.098017140f,  -0.995184727f, 0.122410675f,\n    -0.992479535f, 0.146730474f,  -0.989176510f, 0.170961889f,  -0.985277642f,\n    0.195090322f,  -0.980785280f, 0.219101240f,  -0.975702130f, 0.242980180f,\n    -0.970031253f, 0.266712757f,  -0.963776066f, 0.290284677f,  -0.956940336f,\n    0.313681740f,  -0.949528181f, 0.336889853f,  -0.941544065f, 0.359895037f,\n    -0.932992799f, 0.382683432f,  -0.923879533f, 0.405241314f,  -0.914209756f,\n    0.427555093f,  -0.903989293f, 0.449611330f,  -0.893224301f, 0.471396737f,\n    -0.881921264f, 0.492898192f,  -0.870086991f, 0.514102744f,  -0.857728610f,\n    0.534997620f,  -0.844853565f, 0.555570233f,  -0.831469612f, 0.575808191f,\n    -0.817584813f, 0.595699304f,  -0.803207531f, 0.615231591f,  -0.788346428f,\n    0.634393284f,  -0.773010453f, 0.653172843f,  -0.757208847f, 0.671558955f,\n    -0.740951125f, 0.689540545f,  -0.724247083f, 0.707106781f,  -0.707106781f,\n    0.724247083f,  -0.689540545f, 0.740951125f,  -0.671558955f, 0.757208847f,\n    -0.653172843f, 0.773010453f,  -0.634393284f, 0.788346428f,  -0.615231591f,\n    0.803207531f,  -0.595699304f, 0.817584813f,  -0.575808191f, 0.831469612f,\n    -0.555570233f, 0.844853565f,  -0.534997620f, 0.857728610f,  -0.514102744f,\n    0.870086991f,  -0.492898192f, 0.881921264f,  -0.471396737f, 0.893224301f,\n    -0.449611330f, 0.903989293f,  -0.427555093f, 0.914209756f,  -0.405241314f,\n    0.923879533f,  -0.382683432f, 0.932992799f,  -0.359895037f, 0.941544065f,\n    -0.336889853f, 0.949528181f,  -0.313681740f, 0.956940336f,  -0.290284677f,\n    0.963776066f,  -0.266712757f, 0.970031253f,  -0.242980180f, 0.975702130f,\n    -0.219101240f, 0.980785280f,  -0.195090322f, 0.985277642f,  -0.170961889f,\n    0.989176510f,  -0.146730474f, 0.992479535f,  -0.122410675f, 0.995184727f,\n    -0.098017140f, 0.997290457f,  -0.073564564f, 0.998795456f,  -0.049067674f,\n    0.999698819f,  -0.024541229f};\n\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for (i = 0; i< N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 512, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_512[1024] = {\n    1.000000000f,  0.000000000f,  0.999924702f,  0.012271538f,  0.999698819f,\n    0.024541229f,  0.999322385f,  0.036807223f,  0.998795456f,  0.049067674f,\n    0.998118113f,  0.061320736f,  0.997290457f,  0.073564564f,  0.996312612f,\n    0.085797312f,  0.995184727f,  0.098017140f,  0.993906970f,  0.110222207f,\n    0.992479535f,  0.122410675f,  0.990902635f,  0.134580709f,  0.989176510f,\n    0.146730474f,  0.987301418f,  0.158858143f,  0.985277642f,  0.170961889f,\n    0.983105487f,  0.183039888f,  0.980785280f,  0.195090322f,  0.978317371f,\n    0.207111376f,  0.975702130f,  0.219101240f,  0.972939952f,  0.231058108f,\n    0.970031253f,  0.242980180f,  0.966976471f,  0.254865660f,  0.963776066f,\n    0.266712757f,  0.960430519f,  0.278519689f,  0.956940336f,  0.290284677f,\n    0.953306040f,  0.302005949f,  0.949528181f,  0.313681740f,  0.945607325f,\n    0.325310292f,  0.941544065f,  0.336889853f,  0.937339012f,  0.348418680f,\n    0.932992799f,  0.359895037f,  0.928506080f,  0.371317194f,  0.923879533f,\n    0.382683432f,  0.919113852f,  0.393992040f,  0.914209756f,  0.405241314f,\n    0.909167983f,  0.416429560f,  0.903989293f,  0.427555093f,  0.898674466f,\n    0.438616239f,  0.893224301f,  0.449611330f,  0.887639620f,  0.460538711f,\n    0.881921264f,  0.471396737f,  0.876070094f,  0.482183772f,  0.870086991f,\n    0.492898192f,  0.863972856f,  0.503538384f,  0.857728610f,  0.514102744f,\n    0.851355193f,  0.524589683f,  0.844853565f,  0.534997620f,  0.838224706f,\n    0.545324988f,  0.831469612f,  0.555570233f,  0.824589303f,  0.565731811f,\n    0.817584813f,  0.575808191f,  0.810457198f,  0.585797857f,  0.803207531f,\n    0.595699304f,  0.795836905f,  0.605511041f,  0.788346428f,  0.615231591f,\n    0.780737229f,  0.624859488f,  0.773010453f,  0.634393284f,  0.765167266f,\n    0.643831543f,  0.757208847f,  0.653172843f,  0.749136395f,  0.662415778f,\n    0.740951125f,  0.671558955f,  0.732654272f,  0.680600998f,  0.724247083f,\n    0.689540545f,  0.715730825f,  0.698376249f,  0.707106781f,  0.707106781f,\n    0.698376249f,  0.715730825f,  0.689540545f,  0.724247083f,  0.680600998f,\n    0.732654272f,  0.671558955f,  0.740951125f,  0.662415778f,  0.749136395f,\n    0.653172843f,  0.757208847f,  0.643831543f,  0.765167266f,  0.634393284f,\n    0.773010453f,  0.624859488f,  0.780737229f,  0.615231591f,  0.788346428f,\n    0.605511041f,  0.795836905f,  0.595699304f,  0.803207531f,  0.585797857f,\n    0.810457198f,  0.575808191f,  0.817584813f,  0.565731811f,  0.824589303f,\n    0.555570233f,  0.831469612f,  0.545324988f,  0.838224706f,  0.534997620f,\n    0.844853565f,  0.524589683f,  0.851355193f,  0.514102744f,  0.857728610f,\n    0.503538384f,  0.863972856f,  0.492898192f,  0.870086991f,  0.482183772f,\n    0.876070094f,  0.471396737f,  0.881921264f,  0.460538711f,  0.887639620f,\n    0.449611330f,  0.893224301f,  0.438616239f,  0.898674466f,  0.427555093f,\n    0.903989293f,  0.416429560f,  0.909167983f,  0.405241314f,  0.914209756f,\n    0.393992040f,  0.919113852f,  0.382683432f,  0.923879533f,  0.371317194f,\n    0.928506080f,  0.359895037f,  0.932992799f,  0.348418680f,  0.937339012f,\n    0.336889853f,  0.941544065f,  0.325310292f,  0.945607325f,  0.313681740f,\n    0.949528181f,  0.302005949f,  0.953306040f,  0.290284677f,  0.956940336f,\n    0.278519689f,  0.960430519f,  0.266712757f,  0.963776066f,  0.254865660f,\n    0.966976471f,  0.242980180f,  0.970031253f,  0.231058108f,  0.972939952f,\n    0.219101240f,  0.975702130f,  0.207111376f,  0.978317371f,  0.195090322f,\n    0.980785280f,  0.183039888f,  0.983105487f,  0.170961889f,  0.985277642f,\n    0.158858143f,  0.987301418f,  0.146730474f,  0.989176510f,  0.134580709f,\n    0.990902635f,  0.122410675f,  0.992479535f,  0.110222207f,  0.993906970f,\n    0.098017140f,  0.995184727f,  0.085797312f,  0.996312612f,  0.073564564f,\n    0.997290457f,  0.061320736f,  0.998118113f,  0.049067674f,  0.998795456f,\n    0.036807223f,  0.999322385f,  0.024541229f,  0.999698819f,  0.012271538f,\n    0.999924702f,  0.000000000f,  1.000000000f,  -0.012271538f, 0.999924702f,\n    -0.024541229f, 0.999698819f,  -0.036807223f, 0.999322385f,  -0.049067674f,\n    0.998795456f,  -0.061320736f, 0.998118113f,  -0.073564564f, 0.997290457f,\n    -0.085797312f, 0.996312612f,  -0.098017140f, 0.995184727f,  -0.110222207f,\n    0.993906970f,  -0.122410675f, 0.992479535f,  -0.134580709f, 0.990902635f,\n    -0.146730474f, 0.989176510f,  -0.158858143f, 0.987301418f,  -0.170961889f,\n    0.985277642f,  -0.183039888f, 0.983105487f,  -0.195090322f, 0.980785280f,\n    -0.207111376f, 0.978317371f,  -0.219101240f, 0.975702130f,  -0.231058108f,\n    0.972939952f,  -0.242980180f, 0.970031253f,  -0.254865660f, 0.966976471f,\n    -0.266712757f, 0.963776066f,  -0.278519689f, 0.960430519f,  -0.290284677f,\n    0.956940336f,  -0.302005949f, 0.953306040f,  -0.313681740f, 0.949528181f,\n    -0.325310292f, 0.945607325f,  -0.336889853f, 0.941544065f,  -0.348418680f,\n    0.937339012f,  -0.359895037f, 0.932992799f,  -0.371317194f, 0.928506080f,\n    -0.382683432f, 0.923879533f,  -0.393992040f, 0.919113852f,  -0.405241314f,\n    0.914209756f,  -0.416429560f, 0.909167983f,  -0.427555093f, 0.903989293f,\n    -0.438616239f, 0.898674466f,  -0.449611330f, 0.893224301f,  -0.460538711f,\n    0.887639620f,  -0.471396737f, 0.881921264f,  -0.482183772f, 0.876070094f,\n    -0.492898192f, 0.870086991f,  -0.503538384f, 0.863972856f,  -0.514102744f,\n    0.857728610f,  -0.524589683f, 0.851355193f,  -0.534997620f, 0.844853565f,\n    -0.545324988f, 0.838224706f,  -0.555570233f, 0.831469612f,  -0.565731811f,\n    0.824589303f,  -0.575808191f, 0.817584813f,  -0.585797857f, 0.810457198f,\n    -0.595699304f, 0.803207531f,  -0.605511041f, 0.795836905f,  -0.615231591f,\n    0.788346428f,  -0.624859488f, 0.780737229f,  -0.634393284f, 0.773010453f,\n    -0.643831543f, 0.765167266f,  -0.653172843f, 0.757208847f,  -0.662415778f,\n    0.749136395f,  -0.671558955f, 0.740951125f,  -0.680600998f, 0.732654272f,\n    -0.689540545f, 0.724247083f,  -0.698376249f, 0.715730825f,  -0.707106781f,\n    0.707106781f,  -0.715730825f, 0.698376249f,  -0.724247083f, 0.689540545f,\n    -0.732654272f, 0.680600998f,  -0.740951125f, 0.671558955f,  -0.749136395f,\n    0.662415778f,  -0.757208847f, 0.653172843f,  -0.765167266f, 0.643831543f,\n    -0.773010453f, 0.634393284f,  -0.780737229f, 0.624859488f,  -0.788346428f,\n    0.615231591f,  -0.795836905f, 0.605511041f,  -0.803207531f, 0.595699304f,\n    -0.810457198f, 0.585797857f,  -0.817584813f, 0.575808191f,  -0.824589303f,\n    0.565731811f,  -0.831469612f, 0.555570233f,  -0.838224706f, 0.545324988f,\n    -0.844853565f, 0.534997620f,  -0.851355193f, 0.524589683f,  -0.857728610f,\n    0.514102744f,  -0.863972856f, 0.503538384f,  -0.870086991f, 0.492898192f,\n    -0.876070094f, 0.482183772f,  -0.881921264f, 0.471396737f,  -0.887639620f,\n    0.460538711f,  -0.893224301f, 0.449611330f,  -0.898674466f, 0.438616239f,\n    -0.903989293f, 0.427555093f,  -0.909167983f, 0.416429560f,  -0.914209756f,\n    0.405241314f,  -0.919113852f, 0.393992040f,  -0.923879533f, 0.382683432f,\n    -0.928506080f, 0.371317194f,  -0.932992799f, 0.359895037f,  -0.937339012f,\n    0.348418680f,  -0.941544065f, 0.336889853f,  -0.945607325f, 0.325310292f,\n    -0.949528181f, 0.313681740f,  -0.953306040f, 0.302005949f,  -0.956940336f,\n    0.290284677f,  -0.960430519f, 0.278519689f,  -0.963776066f, 0.266712757f,\n    -0.966976471f, 0.254865660f,  -0.970031253f, 0.242980180f,  -0.972939952f,\n    0.231058108f,  -0.975702130f, 0.219101240f,  -0.978317371f, 0.207111376f,\n    -0.980785280f, 0.195090322f,  -0.983105487f, 0.183039888f,  -0.985277642f,\n    0.170961889f,  -0.987301418f, 0.158858143f,  -0.989176510f, 0.146730474f,\n    -0.990902635f, 0.134580709f,  -0.992479535f, 0.122410675f,  -0.993906970f,\n    0.110222207f,  -0.995184727f, 0.098017140f,  -0.996312612f, 0.085797312f,\n    -0.997290457f, 0.073564564f,  -0.998118113f, 0.061320736f,  -0.998795456f,\n    0.049067674f,  -0.999322385f, 0.036807223f,  -0.999698819f, 0.024541229f,\n    -0.999924702f, 0.012271538f,  -1.000000000f, 0.000000000f,  -0.999924702f,\n    -0.012271538f, -0.999698819f, -0.024541229f, -0.999322385f, -0.036807223f,\n    -0.998795456f, -0.049067674f, -0.998118113f, -0.061320736f, -0.997290457f,\n    -0.073564564f, -0.996312612f, -0.085797312f, -0.995184727f, -0.098017140f,\n    -0.993906970f, -0.110222207f, -0.992479535f, -0.122410675f, -0.990902635f,\n    -0.134580709f, -0.989176510f, -0.146730474f, -0.987301418f, -0.158858143f,\n    -0.985277642f, -0.170961889f, -0.983105487f, -0.183039888f, -0.980785280f,\n    -0.195090322f, -0.978317371f, -0.207111376f, -0.975702130f, -0.219101240f,\n    -0.972939952f, -0.231058108f, -0.970031253f, -0.242980180f, -0.966976471f,\n    -0.254865660f, -0.963776066f, -0.266712757f, -0.960430519f, -0.278519689f,\n    -0.956940336f, -0.290284677f, -0.953306040f, -0.302005949f, -0.949528181f,\n    -0.313681740f, -0.945607325f, -0.325310292f, -0.941544065f, -0.336889853f,\n    -0.937339012f, -0.348418680f, -0.932992799f, -0.359895037f, -0.928506080f,\n    -0.371317194f, -0.923879533f, -0.382683432f, -0.919113852f, -0.393992040f,\n    -0.914209756f, -0.405241314f, -0.909167983f, -0.416429560f, -0.903989293f,\n    -0.427555093f, -0.898674466f, -0.438616239f, -0.893224301f, -0.449611330f,\n    -0.887639620f, -0.460538711f, -0.881921264f, -0.471396737f, -0.876070094f,\n    -0.482183772f, -0.870086991f, -0.492898192f, -0.863972856f, -0.503538384f,\n    -0.857728610f, -0.514102744f, -0.851355193f, -0.524589683f, -0.844853565f,\n    -0.534997620f, -0.838224706f, -0.545324988f, -0.831469612f, -0.555570233f,\n    -0.824589303f, -0.565731811f, -0.817584813f, -0.575808191f, -0.810457198f,\n    -0.585797857f, -0.803207531f, -0.595699304f, -0.795836905f, -0.605511041f,\n    -0.788346428f, -0.615231591f, -0.780737229f, -0.624859488f, -0.773010453f,\n    -0.634393284f, -0.765167266f, -0.643831543f, -0.757208847f, -0.653172843f,\n    -0.749136395f, -0.662415778f, -0.740951125f, -0.671558955f, -0.732654272f,\n    -0.680600998f, -0.724247083f, -0.689540545f, -0.715730825f, -0.698376249f,\n    -0.707106781f, -0.707106781f, -0.698376249f, -0.715730825f, -0.689540545f,\n    -0.724247083f, -0.680600998f, -0.732654272f, -0.671558955f, -0.740951125f,\n    -0.662415778f, -0.749136395f, -0.653172843f, -0.757208847f, -0.643831543f,\n    -0.765167266f, -0.634393284f, -0.773010453f, -0.624859488f, -0.780737229f,\n    -0.615231591f, -0.788346428f, -0.605511041f, -0.795836905f, -0.595699304f,\n    -0.803207531f, -0.585797857f, -0.810457198f, -0.575808191f, -0.817584813f,\n    -0.565731811f, -0.824589303f, -0.555570233f, -0.831469612f, -0.545324988f,\n    -0.838224706f, -0.534997620f, -0.844853565f, -0.524589683f, -0.851355193f,\n    -0.514102744f, -0.857728610f, -0.503538384f, -0.863972856f, -0.492898192f,\n    -0.870086991f, -0.482183772f, -0.876070094f, -0.471396737f, -0.881921264f,\n    -0.460538711f, -0.887639620f, -0.449611330f, -0.893224301f, -0.438616239f,\n    -0.898674466f, -0.427555093f, -0.903989293f, -0.416429560f, -0.909167983f,\n    -0.405241314f, -0.914209756f, -0.393992040f, -0.919113852f, -0.382683432f,\n    -0.923879533f, -0.371317194f, -0.928506080f, -0.359895037f, -0.932992799f,\n    -0.348418680f, -0.937339012f, -0.336889853f, -0.941544065f, -0.325310292f,\n    -0.945607325f, -0.313681740f, -0.949528181f, -0.302005949f, -0.953306040f,\n    -0.290284677f, -0.956940336f, -0.278519689f, -0.960430519f, -0.266712757f,\n    -0.963776066f, -0.254865660f, -0.966976471f, -0.242980180f, -0.970031253f,\n    -0.231058108f, -0.972939952f, -0.219101240f, -0.975702130f, -0.207111376f,\n    -0.978317371f, -0.195090322f, -0.980785280f, -0.183039888f, -0.983105487f,\n    -0.170961889f, -0.985277642f, -0.158858143f, -0.987301418f, -0.146730474f,\n    -0.989176510f, -0.134580709f, -0.990902635f, -0.122410675f, -0.992479535f,\n    -0.110222207f, -0.993906970f, -0.098017140f, -0.995184727f, -0.085797312f,\n    -0.996312612f, -0.073564564f, -0.997290457f, -0.061320736f, -0.998118113f,\n    -0.049067674f, -0.998795456f, -0.036807223f, -0.999322385f, -0.024541229f,\n    -0.999698819f, -0.012271538f, -0.999924702f, -0.000000000f, -1.000000000f,\n    0.012271538f,  -0.999924702f, 0.024541229f,  -0.999698819f, 0.036807223f,\n    -0.999322385f, 0.049067674f,  -0.998795456f, 0.061320736f,  -0.998118113f,\n    0.073564564f,  -0.997290457f, 0.085797312f,  -0.996312612f, 0.098017140f,\n    -0.995184727f, 0.110222207f,  -0.993906970f, 0.122410675f,  -0.992479535f,\n    0.134580709f,  -0.990902635f, 0.146730474f,  -0.989176510f, 0.158858143f,\n    -0.987301418f, 0.170961889f,  -0.985277642f, 0.183039888f,  -0.983105487f,\n    0.195090322f,  -0.980785280f, 0.207111376f,  -0.978317371f, 0.219101240f,\n    -0.975702130f, 0.231058108f,  -0.972939952f, 0.242980180f,  -0.970031253f,\n    0.254865660f,  -0.966976471f, 0.266712757f,  -0.963776066f, 0.278519689f,\n    -0.960430519f, 0.290284677f,  -0.956940336f, 0.302005949f,  -0.953306040f,\n    0.313681740f,  -0.949528181f, 0.325310292f,  -0.945607325f, 0.336889853f,\n    -0.941544065f, 0.348418680f,  -0.937339012f, 0.359895037f,  -0.932992799f,\n    0.371317194f,  -0.928506080f, 0.382683432f,  -0.923879533f, 0.393992040f,\n    -0.919113852f, 0.405241314f,  -0.914209756f, 0.416429560f,  -0.909167983f,\n    0.427555093f,  -0.903989293f, 0.438616239f,  -0.898674466f, 0.449611330f,\n    -0.893224301f, 0.460538711f,  -0.887639620f, 0.471396737f,  -0.881921264f,\n    0.482183772f,  -0.876070094f, 0.492898192f,  -0.870086991f, 0.503538384f,\n    -0.863972856f, 0.514102744f,  -0.857728610f, 0.524589683f,  -0.851355193f,\n    0.534997620f,  -0.844853565f, 0.545324988f,  -0.838224706f, 0.555570233f,\n    -0.831469612f, 0.565731811f,  -0.824589303f, 0.575808191f,  -0.817584813f,\n    0.585797857f,  -0.810457198f, 0.595699304f,  -0.803207531f, 0.605511041f,\n    -0.795836905f, 0.615231591f,  -0.788346428f, 0.624859488f,  -0.780737229f,\n    0.634393284f,  -0.773010453f, 0.643831543f,  -0.765167266f, 0.653172843f,\n    -0.757208847f, 0.662415778f,  -0.749136395f, 0.671558955f,  -0.740951125f,\n    0.680600998f,  -0.732654272f, 0.689540545f,  -0.724247083f, 0.698376249f,\n    -0.715730825f, 0.707106781f,  -0.707106781f, 0.715730825f,  -0.698376249f,\n    0.724247083f,  -0.689540545f, 0.732654272f,  -0.680600998f, 0.740951125f,\n    -0.671558955f, 0.749136395f,  -0.662415778f, 0.757208847f,  -0.653172843f,\n    0.765167266f,  -0.643831543f, 0.773010453f,  -0.634393284f, 0.780737229f,\n    -0.624859488f, 0.788346428f,  -0.615231591f, 0.795836905f,  -0.605511041f,\n    0.803207531f,  -0.595699304f, 0.810457198f,  -0.585797857f, 0.817584813f,\n    -0.575808191f, 0.824589303f,  -0.565731811f, 0.831469612f,  -0.555570233f,\n    0.838224706f,  -0.545324988f, 0.844853565f,  -0.534997620f, 0.851355193f,\n    -0.524589683f, 0.857728610f,  -0.514102744f, 0.863972856f,  -0.503538384f,\n    0.870086991f,  -0.492898192f, 0.876070094f,  -0.482183772f, 0.881921264f,\n    -0.471396737f, 0.887639620f,  -0.460538711f, 0.893224301f,  -0.449611330f,\n    0.898674466f,  -0.438616239f, 0.903989293f,  -0.427555093f, 0.909167983f,\n    -0.416429560f, 0.914209756f,  -0.405241314f, 0.919113852f,  -0.393992040f,\n    0.923879533f,  -0.382683432f, 0.928506080f,  -0.371317194f, 0.932992799f,\n    -0.359895037f, 0.937339012f,  -0.348418680f, 0.941544065f,  -0.336889853f,\n    0.945607325f,  -0.325310292f, 0.949528181f,  -0.313681740f, 0.953306040f,\n    -0.302005949f, 0.956940336f,  -0.290284677f, 0.960430519f,  -0.278519689f,\n    0.963776066f,  -0.266712757f, 0.966976471f,  -0.254865660f, 0.970031253f,\n    -0.242980180f, 0.972939952f,  -0.231058108f, 0.975702130f,  -0.219101240f,\n    0.978317371f,  -0.207111376f, 0.980785280f,  -0.195090322f, 0.983105487f,\n    -0.183039888f, 0.985277642f,  -0.170961889f, 0.987301418f,  -0.158858143f,\n    0.989176510f,  -0.146730474f, 0.990902635f,  -0.134580709f, 0.992479535f,\n    -0.122410675f, 0.993906970f,  -0.110222207f, 0.995184727f,  -0.098017140f,\n    0.996312612f,  -0.085797312f, 0.997290457f,  -0.073564564f, 0.998118113f,\n    -0.061320736f, 0.998795456f,  -0.049067674f, 0.999322385f,  -0.036807223f,\n    0.999698819f,  -0.024541229f, 0.999924702f,  -0.012271538f};\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for (i = 0; i< N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 1024, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_1024[2048] = {\n    1.000000000f,  0.000000000f,  0.999981175f,  0.006135885f,  0.999924702f,\n    0.012271538f,  0.999830582f,  0.018406730f,  0.999698819f,  0.024541229f,\n    0.999529418f,  0.030674803f,  0.999322385f,  0.036807223f,  0.999077728f,\n    0.042938257f,  0.998795456f,  0.049067674f,  0.998475581f,  0.055195244f,\n    0.998118113f,  0.061320736f,  0.997723067f,  0.067443920f,  0.997290457f,\n    0.073564564f,  0.996820299f,  0.079682438f,  0.996312612f,  0.085797312f,\n    0.995767414f,  0.091908956f,  0.995184727f,  0.098017140f,  0.994564571f,\n    0.104121634f,  0.993906970f,  0.110222207f,  0.993211949f,  0.116318631f,\n    0.992479535f,  0.122410675f,  0.991709754f,  0.128498111f,  0.990902635f,\n    0.134580709f,  0.990058210f,  0.140658239f,  0.989176510f,  0.146730474f,\n    0.988257568f,  0.152797185f,  0.987301418f,  0.158858143f,  0.986308097f,\n    0.164913120f,  0.985277642f,  0.170961889f,  0.984210092f,  0.177004220f,\n    0.983105487f,  0.183039888f,  0.981963869f,  0.189068664f,  0.980785280f,\n    0.195090322f,  0.979569766f,  0.201104635f,  0.978317371f,  0.207111376f,\n    0.977028143f,  0.213110320f,  0.975702130f,  0.219101240f,  0.974339383f,\n    0.225083911f,  0.972939952f,  0.231058108f,  0.971503891f,  0.237023606f,\n    0.970031253f,  0.242980180f,  0.968522094f,  0.248927606f,  0.966976471f,\n    0.254865660f,  0.965394442f,  0.260794118f,  0.963776066f,  0.266712757f,\n    0.962121404f,  0.272621355f,  0.960430519f,  0.278519689f,  0.958703475f,\n    0.284407537f,  0.956940336f,  0.290284677f,  0.955141168f,  0.296150888f,\n    0.953306040f,  0.302005949f,  0.951435021f,  0.307849640f,  0.949528181f,\n    0.313681740f,  0.947585591f,  0.319502031f,  0.945607325f,  0.325310292f,\n    0.943593458f,  0.331106306f,  0.941544065f,  0.336889853f,  0.939459224f,\n    0.342660717f,  0.937339012f,  0.348418680f,  0.935183510f,  0.354163525f,\n    0.932992799f,  0.359895037f,  0.930766961f,  0.365612998f,  0.928506080f,\n    0.371317194f,  0.926210242f,  0.377007410f,  0.923879533f,  0.382683432f,\n    0.921514039f,  0.388345047f,  0.919113852f,  0.393992040f,  0.916679060f,\n    0.399624200f,  0.914209756f,  0.405241314f,  0.911706032f,  0.410843171f,\n    0.909167983f,  0.416429560f,  0.906595705f,  0.422000271f,  0.903989293f,\n    0.427555093f,  0.901348847f,  0.433093819f,  0.898674466f,  0.438616239f,\n    0.895966250f,  0.444122145f,  0.893224301f,  0.449611330f,  0.890448723f,\n    0.455083587f,  0.887639620f,  0.460538711f,  0.884797098f,  0.465976496f,\n    0.881921264f,  0.471396737f,  0.879012226f,  0.476799230f,  0.876070094f,\n    0.482183772f,  0.873094978f,  0.487550160f,  0.870086991f,  0.492898192f,\n    0.867046246f,  0.498227667f,  0.863972856f,  0.503538384f,  0.860866939f,\n    0.508830143f,  0.857728610f,  0.514102744f,  0.854557988f,  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-0.685083668f, 0.732654272f,\n    -0.680600998f, 0.736816569f,  -0.676092704f, 0.740951125f,  -0.671558955f,\n    0.745057785f,  -0.666999922f, 0.749136395f,  -0.662415778f, 0.753186799f,\n    -0.657806693f, 0.757208847f,  -0.653172843f, 0.761202385f,  -0.648514401f,\n    0.765167266f,  -0.643831543f, 0.769103338f,  -0.639124445f, 0.773010453f,\n    -0.634393284f, 0.776888466f,  -0.629638239f, 0.780737229f,  -0.624859488f,\n    0.784556597f,  -0.620057212f, 0.788346428f,  -0.615231591f, 0.792106577f,\n    -0.610382806f, 0.795836905f,  -0.605511041f, 0.799537269f,  -0.600616479f,\n    0.803207531f,  -0.595699304f, 0.806847554f,  -0.590759702f, 0.810457198f,\n    -0.585797857f, 0.814036330f,  -0.580813958f, 0.817584813f,  -0.575808191f,\n    0.821102515f,  -0.570780746f, 0.824589303f,  -0.565731811f, 0.828045045f,\n    -0.560661576f, 0.831469612f,  -0.555570233f, 0.834862875f,  -0.550457973f,\n    0.838224706f,  -0.545324988f, 0.841554977f,  -0.540171473f, 0.844853565f,\n    -0.534997620f, 0.848120345f,  -0.529803625f, 0.851355193f,  -0.524589683f,\n    0.854557988f,  -0.519355990f, 0.857728610f,  -0.514102744f, 0.860866939f,\n    -0.508830143f, 0.863972856f,  -0.503538384f, 0.867046246f,  -0.498227667f,\n    0.870086991f,  -0.492898192f, 0.873094978f,  -0.487550160f, 0.876070094f,\n    -0.482183772f, 0.879012226f,  -0.476799230f, 0.881921264f,  -0.471396737f,\n    0.884797098f,  -0.465976496f, 0.887639620f,  -0.460538711f, 0.890448723f,\n    -0.455083587f, 0.893224301f,  -0.449611330f, 0.895966250f,  -0.444122145f,\n    0.898674466f,  -0.438616239f, 0.901348847f,  -0.433093819f, 0.903989293f,\n    -0.427555093f, 0.906595705f,  -0.422000271f, 0.909167983f,  -0.416429560f,\n    0.911706032f,  -0.410843171f, 0.914209756f,  -0.405241314f, 0.916679060f,\n    -0.399624200f, 0.919113852f,  -0.393992040f, 0.921514039f,  -0.388345047f,\n    0.923879533f,  -0.382683432f, 0.926210242f,  -0.377007410f, 0.928506080f,\n    -0.371317194f, 0.930766961f,  -0.365612998f, 0.932992799f,  -0.359895037f,\n    0.935183510f,  -0.354163525f, 0.937339012f,  -0.348418680f, 0.939459224f,\n    -0.342660717f, 0.941544065f,  -0.336889853f, 0.943593458f,  -0.331106306f,\n    0.945607325f,  -0.325310292f, 0.947585591f,  -0.319502031f, 0.949528181f,\n    -0.313681740f, 0.951435021f,  -0.307849640f, 0.953306040f,  -0.302005949f,\n    0.955141168f,  -0.296150888f, 0.956940336f,  -0.290284677f, 0.958703475f,\n    -0.284407537f, 0.960430519f,  -0.278519689f, 0.962121404f,  -0.272621355f,\n    0.963776066f,  -0.266712757f, 0.965394442f,  -0.260794118f, 0.966976471f,\n    -0.254865660f, 0.968522094f,  -0.248927606f, 0.970031253f,  -0.242980180f,\n    0.971503891f,  -0.237023606f, 0.972939952f,  -0.231058108f, 0.974339383f,\n    -0.225083911f, 0.975702130f,  -0.219101240f, 0.977028143f,  -0.213110320f,\n    0.978317371f,  -0.207111376f, 0.979569766f,  -0.201104635f, 0.980785280f,\n    -0.195090322f, 0.981963869f,  -0.189068664f, 0.983105487f,  -0.183039888f,\n    0.984210092f,  -0.177004220f, 0.985277642f,  -0.170961889f, 0.986308097f,\n    -0.164913120f, 0.987301418f,  -0.158858143f, 0.988257568f,  -0.152797185f,\n    0.989176510f,  -0.146730474f, 0.990058210f,  -0.140658239f, 0.990902635f,\n    -0.134580709f, 0.991709754f,  -0.128498111f, 0.992479535f,  -0.122410675f,\n    0.993211949f,  -0.116318631f, 0.993906970f,  -0.110222207f, 0.994564571f,\n    -0.104121634f, 0.995184727f,  -0.098017140f, 0.995767414f,  -0.091908956f,\n    0.996312612f,  -0.085797312f, 0.996820299f,  -0.079682438f, 0.997290457f,\n    -0.073564564f, 0.997723067f,  -0.067443920f, 0.998118113f,  -0.061320736f,\n    0.998475581f,  -0.055195244f, 0.998795456f,  -0.049067674f, 0.999077728f,\n    -0.042938257f, 0.999322385f,  -0.036807223f, 0.999529418f,  -0.030674803f,\n    0.999698819f,  -0.024541229f, 0.999830582f,  -0.018406730f, 0.999924702f,\n    -0.012271538f, 0.999981175f,  -0.006135885f};\n\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for (i = 0; i< N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 2048, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_2048[4096] = {\n    1.000000000f,  0.000000000f,  0.999995294f,  0.003067957f,  0.999981175f,\n    0.006135885f,  0.999957645f,  0.009203755f,  0.999924702f,  0.012271538f,\n    0.999882347f,  0.015339206f,  0.999830582f,  0.018406730f,  0.999769405f,\n    0.021474080f,  0.999698819f,  0.024541229f,  0.999618822f,  0.027608146f,\n    0.999529418f,  0.030674803f,  0.999430605f,  0.033741172f,  0.999322385f,\n    0.036807223f,  0.999204759f,  0.039872928f,  0.999077728f,  0.042938257f,\n    0.998941293f,  0.046003182f,  0.998795456f,  0.049067674f,  0.998640218f,\n    0.052131705f,  0.998475581f,  0.055195244f,  0.998301545f,  0.058258265f,\n    0.998118113f,  0.061320736f,  0.997925286f,  0.064382631f,  0.997723067f,\n    0.067443920f,  0.997511456f,  0.070504573f,  0.997290457f,  0.073564564f,\n    0.997060070f,  0.076623861f,  0.996820299f,  0.079682438f,  0.996571146f,\n    0.082740265f,  0.996312612f,  0.085797312f,  0.996044701f,  0.088853553f,\n    0.995767414f,  0.091908956f,  0.995480755f,  0.094963495f,  0.995184727f,\n    0.098017140f,  0.994879331f,  0.101069863f,  0.994564571f,  0.104121634f,\n    0.994240449f,  0.107172425f,  0.993906970f,  0.110222207f,  0.993564136f,\n    0.113270952f,  0.993211949f,  0.116318631f,  0.992850414f,  0.119365215f,\n    0.992479535f,  0.122410675f,  0.992099313f,  0.125454983f,  0.991709754f,\n    0.128498111f,  0.991310860f,  0.131540029f,  0.990902635f,  0.134580709f,\n    0.990485084f,  0.137620122f,  0.990058210f,  0.140658239f,  0.989622017f,\n    0.143695033f,  0.989176510f,  0.146730474f,  0.988721692f,  0.149764535f,\n    0.988257568f,  0.152797185f,  0.987784142f,  0.155828398f,  0.987301418f,\n    0.158858143f,  0.986809402f,  0.161886394f,  0.986308097f,  0.164913120f,\n    0.985797509f,  0.167938295f,  0.985277642f,  0.170961889f,  0.984748502f,\n    0.173983873f,  0.984210092f,  0.177004220f,  0.983662419f,  0.180022901f,\n    0.983105487f,  0.183039888f,  0.982539302f,  0.186055152f,  0.981963869f,\n    0.189068664f,  0.981379193f,  0.192080397f,  0.980785280f,  0.195090322f,\n    0.980182136f,  0.198098411f,  0.979569766f,  0.201104635f,  0.978948175f,\n    0.204108966f,  0.978317371f,  0.207111376f,  0.977677358f,  0.210111837f,\n    0.977028143f,  0.213110320f,  0.976369731f,  0.216106797f,  0.975702130f,\n    0.219101240f,  0.975025345f,  0.222093621f,  0.974339383f,  0.225083911f,\n    0.973644250f,  0.228072083f,  0.972939952f,  0.231058108f,  0.972226497f,\n    0.234041959f,  0.971503891f,  0.237023606f,  0.970772141f,  0.240003022f,\n    0.970031253f,  0.242980180f,  0.969281235f,  0.245955050f,  0.968522094f,\n    0.248927606f,  0.967753837f,  0.251897818f,  0.966976471f,  0.254865660f,\n    0.966190003f,  0.257831102f,  0.965394442f,  0.260794118f,  0.964589793f,\n    0.263754679f,  0.963776066f,  0.266712757f,  0.962953267f,  0.269668326f,\n    0.962121404f,  0.272621355f,  0.961280486f,  0.275571819f,  0.960430519f,\n    0.278519689f,  0.959571513f,  0.281464938f,  0.958703475f,  0.284407537f,\n    0.957826413f,  0.287347460f,  0.956940336f,  0.290284677f,  0.956045251f,\n    0.293219163f,  0.955141168f,  0.296150888f,  0.954228095f,  0.299079826f,\n    0.953306040f,  0.302005949f,  0.952375013f,  0.304929230f,  0.951435021f,\n    0.307849640f,  0.950486074f,  0.310767153f,  0.949528181f,  0.313681740f,\n    0.948561350f,  0.316593376f,  0.947585591f,  0.319502031f,  0.946600913f,\n    0.322407679f,  0.945607325f,  0.325310292f,  0.944604837f,  0.328209844f,\n    0.943593458f,  0.331106306f,  0.942573198f,  0.333999651f,  0.941544065f,\n    0.336889853f,  0.940506071f,  0.339776884f,  0.939459224f,  0.342660717f,\n    0.938403534f,  0.345541325f,  0.937339012f,  0.348418680f,  0.936265667f,\n    0.351292756f,  0.935183510f,  0.354163525f,  0.934092550f,  0.357030961f,\n    0.932992799f,  0.359895037f,  0.931884266f,  0.362755724f,  0.930766961f,\n    0.365612998f,  0.929640896f,  0.368466830f,  0.928506080f,  0.371317194f,\n    0.927362526f,  0.374164063f,  0.926210242f,  0.377007410f,  0.925049241f,\n    0.379847209f,  0.923879533f,  0.382683432f,  0.922701128f,  0.385516054f,\n    0.921514039f,  0.388345047f,  0.920318277f,  0.391170384f,  0.919113852f,\n    0.393992040f,  0.917900776f,  0.396809987f,  0.916679060f,  0.399624200f,\n    0.915448716f,  0.402434651f,  0.914209756f,  0.405241314f,  0.912962190f,\n    0.408044163f,  0.911706032f,  0.410843171f,  0.910441292f,  0.413638312f,\n    0.909167983f,  0.416429560f,  0.907886116f,  0.419216888f,  0.906595705f,\n    0.422000271f,  0.905296759f,  0.424779681f,  0.903989293f,  0.427555093f,\n    0.902673318f,  0.430326481f,  0.901348847f,  0.433093819f,  0.900015892f,\n    0.435857080f,  0.898674466f,  0.438616239f,  0.897324581f,  0.441371269f,\n    0.895966250f,  0.444122145f,  0.894599486f,  0.446868840f,  0.893224301f,\n    0.449611330f,  0.891840709f,  0.452349587f,  0.890448723f,  0.455083587f,\n    0.889048356f,  0.457813304f,  0.887639620f,  0.460538711f,  0.886222530f,\n    0.463259784f,  0.884797098f,  0.465976496f,  0.883363339f,  0.468688822f,\n    0.881921264f,  0.471396737f,  0.880470889f,  0.474100215f,  0.879012226f,\n    0.476799230f,  0.877545290f,  0.479493758f,  0.876070094f,  0.482183772f,\n    0.874586652f,  0.484869248f,  0.873094978f,  0.487550160f,  0.871595087f,\n    0.490226483f,  0.870086991f,  0.492898192f,  0.868570706f,  0.495565262f,\n    0.867046246f,  0.498227667f,  0.865513624f,  0.500885383f,  0.863972856f,\n    0.503538384f,  0.862423956f,  0.506186645f,  0.860866939f,  0.508830143f,\n    0.859301818f,  0.511468850f,  0.857728610f,  0.514102744f,  0.856147328f,\n    0.516731799f,  0.854557988f,  0.519355990f,  0.852960605f,  0.521975293f,\n    0.851355193f,  0.524589683f,  0.849741768f,  0.527199135f,  0.848120345f,\n    0.529803625f,  0.846490939f,  0.532403128f,  0.844853565f,  0.534997620f,\n    0.843208240f,  0.537587076f,  0.841554977f,  0.540171473f,  0.839893794f,\n    0.542750785f,  0.838224706f,  0.545324988f,  0.836547727f,  0.547894059f,\n    0.834862875f,  0.550457973f,  0.833170165f,  0.553016706f,  0.831469612f,\n    0.555570233f,  0.829761234f,  0.558118531f,  0.828045045f,  0.560661576f,\n    0.826321063f,  0.563199344f,  0.824589303f,  0.565731811f,  0.822849781f,\n    0.568258953f,  0.821102515f,  0.570780746f,  0.819347520f,  0.573297167f,\n    0.817584813f,  0.575808191f,  0.815814411f,  0.578313796f,  0.814036330f,\n    0.580813958f,  0.812250587f,  0.583308653f,  0.810457198f,  0.585797857f,\n    0.808656182f,  0.588281548f,  0.806847554f,  0.590759702f,  0.805031331f,\n    0.593232295f,  0.803207531f,  0.595699304f,  0.801376172f,  0.598160707f,\n    0.799537269f,  0.600616479f,  0.797690841f,  0.603066599f,  0.795836905f,\n    0.605511041f,  0.793975478f,  0.607949785f,  0.792106577f,  0.610382806f,\n    0.790230221f,  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0.598160707f,  -0.801376172f, 0.600616479f,  -0.799537269f, 0.603066599f,\n    -0.797690841f, 0.605511041f,  -0.795836905f, 0.607949785f,  -0.793975478f,\n    0.610382806f,  -0.792106577f, 0.612810082f,  -0.790230221f, 0.615231591f,\n    -0.788346428f, 0.617647308f,  -0.786455214f, 0.620057212f,  -0.784556597f,\n    0.622461279f,  -0.782650596f, 0.624859488f,  -0.780737229f, 0.627251815f,\n    -0.778816512f, 0.629638239f,  -0.776888466f, 0.632018736f,  -0.774953107f,\n    0.634393284f,  -0.773010453f, 0.636761861f,  -0.771060524f, 0.639124445f,\n    -0.769103338f, 0.641481013f,  -0.767138912f, 0.643831543f,  -0.765167266f,\n    0.646176013f,  -0.763188417f, 0.648514401f,  -0.761202385f, 0.650846685f,\n    -0.759209189f, 0.653172843f,  -0.757208847f, 0.655492853f,  -0.755201377f,\n    0.657806693f,  -0.753186799f, 0.660114342f,  -0.751165132f, 0.662415778f,\n    -0.749136395f, 0.664710978f,  -0.747100606f, 0.666999922f,  -0.745057785f,\n    0.669282588f,  -0.743007952f, 0.671558955f,  -0.740951125f, 0.673829000f,\n    -0.738887324f, 0.676092704f,  -0.736816569f, 0.678350043f,  -0.734738878f,\n    0.680600998f,  -0.732654272f, 0.682845546f,  -0.730562769f, 0.685083668f,\n    -0.728464390f, 0.687315341f,  -0.726359155f, 0.689540545f,  -0.724247083f,\n    0.691759258f,  -0.722128194f, 0.693971461f,  -0.720002508f, 0.696177131f,\n    -0.717870045f, 0.698376249f,  -0.715730825f, 0.700568794f,  -0.713584869f,\n    0.702754744f,  -0.711432196f, 0.704934080f,  -0.709272826f, 0.707106781f,\n    -0.707106781f, 0.709272826f,  -0.704934080f, 0.711432196f,  -0.702754744f,\n    0.713584869f,  -0.700568794f, 0.715730825f,  -0.698376249f, 0.717870045f,\n    -0.696177131f, 0.720002508f,  -0.693971461f, 0.722128194f,  -0.691759258f,\n    0.724247083f,  -0.689540545f, 0.726359155f,  -0.687315341f, 0.728464390f,\n    -0.685083668f, 0.730562769f,  -0.682845546f, 0.732654272f,  -0.680600998f,\n    0.734738878f,  -0.678350043f, 0.736816569f,  -0.676092704f, 0.738887324f,\n    -0.673829000f, 0.740951125f,  -0.671558955f, 0.743007952f,  -0.669282588f,\n    0.745057785f,  -0.666999922f, 0.747100606f,  -0.664710978f, 0.749136395f,\n    -0.662415778f, 0.751165132f,  -0.660114342f, 0.753186799f,  -0.657806693f,\n    0.755201377f,  -0.655492853f, 0.757208847f,  -0.653172843f, 0.759209189f,\n    -0.650846685f, 0.761202385f,  -0.648514401f, 0.763188417f,  -0.646176013f,\n    0.765167266f,  -0.643831543f, 0.767138912f,  -0.641481013f, 0.769103338f,\n    -0.639124445f, 0.771060524f,  -0.636761861f, 0.773010453f,  -0.634393284f,\n    0.774953107f,  -0.632018736f, 0.776888466f,  -0.629638239f, 0.778816512f,\n    -0.627251815f, 0.780737229f,  -0.624859488f, 0.782650596f,  -0.622461279f,\n    0.784556597f,  -0.620057212f, 0.786455214f,  -0.617647308f, 0.788346428f,\n    -0.615231591f, 0.790230221f,  -0.612810082f, 0.792106577f,  -0.610382806f,\n    0.793975478f,  -0.607949785f, 0.795836905f,  -0.605511041f, 0.797690841f,\n    -0.603066599f, 0.799537269f,  -0.600616479f, 0.801376172f,  -0.598160707f,\n    0.803207531f,  -0.595699304f, 0.805031331f,  -0.593232295f, 0.806847554f,\n    -0.590759702f, 0.808656182f,  -0.588281548f, 0.810457198f,  -0.585797857f,\n    0.812250587f,  -0.583308653f, 0.814036330f,  -0.580813958f, 0.815814411f,\n    -0.578313796f, 0.817584813f,  -0.575808191f, 0.819347520f,  -0.573297167f,\n    0.821102515f,  -0.570780746f, 0.822849781f,  -0.568258953f, 0.824589303f,\n    -0.565731811f, 0.826321063f,  -0.563199344f, 0.828045045f,  -0.560661576f,\n    0.829761234f,  -0.558118531f, 0.831469612f,  -0.555570233f, 0.833170165f,\n    -0.553016706f, 0.834862875f,  -0.550457973f, 0.836547727f,  -0.547894059f,\n    0.838224706f,  -0.545324988f, 0.839893794f,  -0.542750785f, 0.841554977f,\n    -0.540171473f, 0.843208240f,  -0.537587076f, 0.844853565f,  -0.534997620f,\n    0.846490939f,  -0.532403128f, 0.848120345f,  -0.529803625f, 0.849741768f,\n    -0.527199135f, 0.851355193f,  -0.524589683f, 0.852960605f,  -0.521975293f,\n    0.854557988f,  -0.519355990f, 0.856147328f,  -0.516731799f, 0.857728610f,\n    -0.514102744f, 0.859301818f,  -0.511468850f, 0.860866939f,  -0.508830143f,\n    0.862423956f,  -0.506186645f, 0.863972856f,  -0.503538384f, 0.865513624f,\n    -0.500885383f, 0.867046246f,  -0.498227667f, 0.868570706f,  -0.495565262f,\n    0.870086991f,  -0.492898192f, 0.871595087f,  -0.490226483f, 0.873094978f,\n    -0.487550160f, 0.874586652f,  -0.484869248f, 0.876070094f,  -0.482183772f,\n    0.877545290f,  -0.479493758f, 0.879012226f,  -0.476799230f, 0.880470889f,\n    -0.474100215f, 0.881921264f,  -0.471396737f, 0.883363339f,  -0.468688822f,\n    0.884797098f,  -0.465976496f, 0.886222530f,  -0.463259784f, 0.887639620f,\n    -0.460538711f, 0.889048356f,  -0.457813304f, 0.890448723f,  -0.455083587f,\n    0.891840709f,  -0.452349587f, 0.893224301f,  -0.449611330f, 0.894599486f,\n    -0.446868840f, 0.895966250f,  -0.444122145f, 0.897324581f,  -0.441371269f,\n    0.898674466f,  -0.438616239f, 0.900015892f,  -0.435857080f, 0.901348847f,\n    -0.433093819f, 0.902673318f,  -0.430326481f, 0.903989293f,  -0.427555093f,\n    0.905296759f,  -0.424779681f, 0.906595705f,  -0.422000271f, 0.907886116f,\n    -0.419216888f, 0.909167983f,  -0.416429560f, 0.910441292f,  -0.413638312f,\n    0.911706032f,  -0.410843171f, 0.912962190f,  -0.408044163f, 0.914209756f,\n    -0.405241314f, 0.915448716f,  -0.402434651f, 0.916679060f,  -0.399624200f,\n    0.917900776f,  -0.396809987f, 0.919113852f,  -0.393992040f, 0.920318277f,\n    -0.391170384f, 0.921514039f,  -0.388345047f, 0.922701128f,  -0.385516054f,\n    0.923879533f,  -0.382683432f, 0.925049241f,  -0.379847209f, 0.926210242f,\n    -0.377007410f, 0.927362526f,  -0.374164063f, 0.928506080f,  -0.371317194f,\n    0.929640896f,  -0.368466830f, 0.930766961f,  -0.365612998f, 0.931884266f,\n    -0.362755724f, 0.932992799f,  -0.359895037f, 0.934092550f,  -0.357030961f,\n    0.935183510f,  -0.354163525f, 0.936265667f,  -0.351292756f, 0.937339012f,\n    -0.348418680f, 0.938403534f,  -0.345541325f, 0.939459224f,  -0.342660717f,\n    0.940506071f,  -0.339776884f, 0.941544065f,  -0.336889853f, 0.942573198f,\n    -0.333999651f, 0.943593458f,  -0.331106306f, 0.944604837f,  -0.328209844f,\n    0.945607325f,  -0.325310292f, 0.946600913f,  -0.322407679f, 0.947585591f,\n    -0.319502031f, 0.948561350f,  -0.316593376f, 0.949528181f,  -0.313681740f,\n    0.950486074f,  -0.310767153f, 0.951435021f,  -0.307849640f, 0.952375013f,\n    -0.304929230f, 0.953306040f,  -0.302005949f, 0.954228095f,  -0.299079826f,\n    0.955141168f,  -0.296150888f, 0.956045251f,  -0.293219163f, 0.956940336f,\n    -0.290284677f, 0.957826413f,  -0.287347460f, 0.958703475f,  -0.284407537f,\n    0.959571513f,  -0.281464938f, 0.960430519f,  -0.278519689f, 0.961280486f,\n    -0.275571819f, 0.962121404f,  -0.272621355f, 0.962953267f,  -0.269668326f,\n    0.963776066f,  -0.266712757f, 0.964589793f,  -0.263754679f, 0.965394442f,\n    -0.260794118f, 0.966190003f,  -0.257831102f, 0.966976471f,  -0.254865660f,\n    0.967753837f,  -0.251897818f, 0.968522094f,  -0.248927606f, 0.969281235f,\n    -0.245955050f, 0.970031253f,  -0.242980180f, 0.970772141f,  -0.240003022f,\n    0.971503891f,  -0.237023606f, 0.972226497f,  -0.234041959f, 0.972939952f,\n    -0.231058108f, 0.973644250f,  -0.228072083f, 0.974339383f,  -0.225083911f,\n    0.975025345f,  -0.222093621f, 0.975702130f,  -0.219101240f, 0.976369731f,\n    -0.216106797f, 0.977028143f,  -0.213110320f, 0.977677358f,  -0.210111837f,\n    0.978317371f,  -0.207111376f, 0.978948175f,  -0.204108966f, 0.979569766f,\n    -0.201104635f, 0.980182136f,  -0.198098411f, 0.980785280f,  -0.195090322f,\n    0.981379193f,  -0.192080397f, 0.981963869f,  -0.189068664f, 0.982539302f,\n    -0.186055152f, 0.983105487f,  -0.183039888f, 0.983662419f,  -0.180022901f,\n    0.984210092f,  -0.177004220f, 0.984748502f,  -0.173983873f, 0.985277642f,\n    -0.170961889f, 0.985797509f,  -0.167938295f, 0.986308097f,  -0.164913120f,\n    0.986809402f,  -0.161886394f, 0.987301418f,  -0.158858143f, 0.987784142f,\n    -0.155828398f, 0.988257568f,  -0.152797185f, 0.988721692f,  -0.149764535f,\n    0.989176510f,  -0.146730474f, 0.989622017f,  -0.143695033f, 0.990058210f,\n    -0.140658239f, 0.990485084f,  -0.137620122f, 0.990902635f,  -0.134580709f,\n    0.991310860f,  -0.131540029f, 0.991709754f,  -0.128498111f, 0.992099313f,\n    -0.125454983f, 0.992479535f,  -0.122410675f, 0.992850414f,  -0.119365215f,\n    0.993211949f,  -0.116318631f, 0.993564136f,  -0.113270952f, 0.993906970f,\n    -0.110222207f, 0.994240449f,  -0.107172425f, 0.994564571f,  -0.104121634f,\n    0.994879331f,  -0.101069863f, 0.995184727f,  -0.098017140f, 0.995480755f,\n    -0.094963495f, 0.995767414f,  -0.091908956f, 0.996044701f,  -0.088853553f,\n    0.996312612f,  -0.085797312f, 0.996571146f,  -0.082740265f, 0.996820299f,\n    -0.079682438f, 0.997060070f,  -0.076623861f, 0.997290457f,  -0.073564564f,\n    0.997511456f,  -0.070504573f, 0.997723067f,  -0.067443920f, 0.997925286f,\n    -0.064382631f, 0.998118113f,  -0.061320736f, 0.998301545f,  -0.058258265f,\n    0.998475581f,  -0.055195244f, 0.998640218f,  -0.052131705f, 0.998795456f,\n    -0.049067674f, 0.998941293f,  -0.046003182f, 0.999077728f,  -0.042938257f,\n    0.999204759f,  -0.039872928f, 0.999322385f,  -0.036807223f, 0.999430605f,\n    -0.033741172f, 0.999529418f,  -0.030674803f, 0.999618822f,  -0.027608146f,\n    0.999698819f,  -0.024541229f, 0.999769405f,  -0.021474080f, 0.999830582f,\n    -0.018406730f, 0.999882347f,  -0.015339206f, 0.999924702f,  -0.012271538f,\n    0.999957645f,  -0.009203755f, 0.999981175f,  -0.006135885f, 0.999995294f,\n    -0.003067957f};\n\n/**\n  @par\n  Example code for Floating-point Twiddle factors Generation:\n  @par\n  
for (i = 0; i< N/; i++)\n  {\n        twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);\n        twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 4096, PI = 3.14159265358979\n  @par\n  Cos and Sin values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_4096[8192] = {\n    1.000000000f,  0.000000000f,  0.999998823f,  0.001533980f,  0.999995294f,\n    0.003067957f,  0.999989411f,  0.004601926f,  0.999981175f,  0.006135885f,\n    0.999970586f,  0.007669829f,  0.999957645f,  0.009203755f,  0.999942350f,\n    0.010737659f,  0.999924702f,  0.012271538f,  0.999904701f,  0.013805389f,\n    0.999882347f,  0.015339206f,  0.999857641f,  0.016872988f,  0.999830582f,\n    0.018406730f,  0.999801170f,  0.019940429f,  0.999769405f,  0.021474080f,\n    0.999735288f,  0.023007681f,  0.999698819f,  0.024541229f,  0.999659997f,\n    0.026074718f,  0.999618822f,  0.027608146f,  0.999575296f,  0.029141509f,\n    0.999529418f,  0.030674803f,  0.999481187f,  0.032208025f,  0.999430605f,\n    0.033741172f,  0.999377670f,  0.035274239f,  0.999322385f,  0.036807223f,\n    0.999264747f,  0.038340120f,  0.999204759f,  0.039872928f,  0.999142419f,\n    0.041405641f,  0.999077728f,  0.042938257f,  0.999010686f,  0.044470772f,\n    0.998941293f,  0.046003182f,  0.998869550f,  0.047535484f,  0.998795456f,\n    0.049067674f,  0.998719012f,  0.050599749f,  0.998640218f,  0.052131705f,\n    0.998559074f,  0.053663538f,  0.998475581f,  0.055195244f,  0.998389737f,\n    0.056726821f,  0.998301545f,  0.058258265f,  0.998211003f,  0.059789571f,\n    0.998118113f,  0.061320736f,  0.998022874f,  0.062851758f,  0.997925286f,\n    0.064382631f,  0.997825350f,  0.065913353f,  0.997723067f,  0.067443920f,\n    0.997618435f,  0.068974328f,  0.997511456f,  0.070504573f,  0.997402130f,\n    0.072034653f,  0.997290457f,  0.073564564f,  0.997176437f,  0.075094301f,\n    0.997060070f,  0.076623861f,  0.996941358f,  0.078153242f,  0.996820299f,\n    0.079682438f,  0.996696895f,  0.081211447f,  0.996571146f,  0.082740265f,\n    0.996443051f,  0.084268888f,  0.996312612f,  0.085797312f,  0.996179829f,\n    0.087325535f,  0.996044701f,  0.088853553f,  0.995907229f,  0.090381361f,\n    0.995767414f,  0.091908956f,  0.995625256f,  0.093436336f,  0.995480755f,\n    0.094963495f,  0.995333912f,  0.096490431f,  0.995184727f,  0.098017140f,\n    0.995033199f,  0.099543619f,  0.994879331f,  0.101069863f,  0.994723121f,\n    0.102595869f,  0.994564571f,  0.104121634f,  0.994403680f,  0.105647154f,\n    0.994240449f,  0.107172425f,  0.994074879f,  0.108697444f,  0.993906970f,\n    0.110222207f,  0.993736722f,  0.111746711f,  0.993564136f,  0.113270952f,\n    0.993389211f,  0.114794927f,  0.993211949f,  0.116318631f,  0.993032350f,\n    0.117842062f,  0.992850414f,  0.119365215f,  0.992666142f,  0.120888087f,\n    0.992479535f,  0.122410675f,  0.992290591f,  0.123932975f,  0.992099313f,\n    0.125454983f,  0.991905700f,  0.126976696f,  0.991709754f,  0.128498111f,\n    0.991511473f,  0.130019223f,  0.991310860f,  0.131540029f,  0.991107914f,\n    0.133060525f,  0.990902635f,  0.134580709f,  0.990695025f,  0.136100575f,\n    0.990485084f,  0.137620122f,  0.990272812f,  0.139139344f,  0.990058210f,\n    0.140658239f,  0.989841278f,  0.142176804f,  0.989622017f,  0.143695033f,\n    0.989400428f,  0.145212925f,  0.989176510f,  0.146730474f,  0.988950265f,\n    0.148247679f,  0.988721692f,  0.149764535f,  0.988490793f,  0.151281038f,\n    0.988257568f,  0.152797185f,  0.988022017f,  0.154312973f,  0.987784142f,\n    0.155828398f,  0.987543942f,  0.157343456f,  0.987301418f,  0.158858143f,\n    0.987056571f,  0.160372457f,  0.986809402f,  0.161886394f,  0.986559910f,\n    0.163399949f,  0.986308097f,  0.164913120f,  0.986053963f,  0.166425904f,\n    0.985797509f,  0.167938295f,  0.985538735f,  0.169450291f,  0.985277642f,\n    0.170961889f,  0.985014231f,  0.172473084f,  0.984748502f,  0.173983873f,\n    0.984480455f,  0.175494253f,  0.984210092f,  0.177004220f,  0.983937413f,\n    0.178513771f,  0.983662419f,  0.180022901f,  0.983385110f,  0.181531608f,\n    0.983105487f,  0.183039888f,  0.982823551f,  0.184547737f,  0.982539302f,\n    0.186055152f,  0.982252741f,  0.187562129f,  0.981963869f,  0.189068664f,\n    0.981672686f,  0.190574755f,  0.981379193f,  0.192080397f,  0.981083391f,\n    0.193585587f,  0.980785280f,  0.195090322f,  0.980484862f,  0.196594598f,\n    0.980182136f,  0.198098411f,  0.979877104f,  0.199601758f,  0.979569766f,\n    0.201104635f,  0.979260123f,  0.202607039f,  0.978948175f,  0.204108966f,\n    0.978633924f,  0.205610413f,  0.978317371f,  0.207111376f,  0.977998515f,\n    0.208611852f,  0.977677358f,  0.210111837f,  0.977353900f,  0.211611327f,\n    0.977028143f,  0.213110320f,  0.976700086f,  0.214608811f,  0.976369731f,\n    0.216106797f,  0.976037079f,  0.217604275f,  0.975702130f,  0.219101240f,\n    0.975364885f,  0.220597690f,  0.975025345f,  0.222093621f,  0.974683511f,\n    0.223589029f,  0.974339383f,  0.225083911f,  0.973992962f,  0.226578264f,\n    0.973644250f,  0.228072083f,  0.973293246f,  0.229565366f,  0.972939952f,\n    0.231058108f,  0.972584369f,  0.232550307f,  0.972226497f,  0.234041959f,\n    0.971866337f,  0.235533059f,  0.971503891f,  0.237023606f,  0.971139158f,\n    0.238513595f,  0.970772141f,  0.240003022f,  0.970402839f,  0.241491885f,\n    0.970031253f,  0.242980180f,  0.969657385f,  0.244467903f,  0.969281235f,\n    0.245955050f,  0.968902805f,  0.247441619f,  0.968522094f,  0.248927606f,\n    0.968139105f,  0.250413007f,  0.967753837f,  0.251897818f,  0.967366292f,\n    0.253382037f,  0.966976471f,  0.254865660f,  0.966584374f,  0.256348682f,\n    0.966190003f,  0.257831102f,  0.965793359f,  0.259312915f,  0.965394442f,\n    0.260794118f,  0.964993253f,  0.262274707f,  0.964589793f,  0.263754679f,\n    0.964184064f,  0.265234030f,  0.963776066f,  0.266712757f,  0.963365800f,\n    0.268190857f,  0.962953267f,  0.269668326f,  0.962538468f,  0.271145160f,\n    0.962121404f,  0.272621355f,  0.961702077f,  0.274096910f,  0.961280486f,\n    0.275571819f,  0.960856633f,  0.277046080f,  0.960430519f,  0.278519689f,\n    0.960002146f,  0.279992643f,  0.959571513f,  0.281464938f,  0.959138622f,\n    0.282936570f,  0.958703475f,  0.284407537f,  0.958266071f,  0.285877835f,\n    0.957826413f,  0.287347460f,  0.957384501f,  0.288816408f,  0.956940336f,\n    0.290284677f,  0.956493919f,  0.291752263f,  0.956045251f,  0.293219163f,\n    0.955594334f,  0.294685372f,  0.955141168f,  0.296150888f,  0.954685755f,\n    0.297615707f,  0.954228095f,  0.299079826f,  0.953768190f,  0.300543241f,\n    0.953306040f,  0.302005949f,  0.952841648f,  0.303467947f,  0.952375013f,\n    0.304929230f,  0.951906137f,  0.306389795f,  0.951435021f,  0.307849640f,\n    0.950961666f,  0.309308760f,  0.950486074f,  0.310767153f,  0.950008245f,\n    0.312224814f,  0.949528181f,  0.313681740f,  0.949045882f,  0.315137929f,\n    0.948561350f,  0.316593376f,  0.948074586f,  0.318048077f,  0.947585591f,\n    0.319502031f,  0.947094366f,  0.320955232f,  0.946600913f,  0.322407679f,\n    0.946105232f,  0.323859367f,  0.945607325f,  0.325310292f,  0.945107193f,\n    0.326760452f,  0.944604837f,  0.328209844f,  0.944100258f,  0.329658463f,\n    0.943593458f,  0.331106306f,  0.943084437f,  0.332553370f,  0.942573198f,\n    0.333999651f,  0.942059740f,  0.335445147f,  0.941544065f,  0.336889853f,\n    0.941026175f,  0.338333767f,  0.940506071f,  0.339776884f,  0.939983753f,\n    0.341219202f,  0.939459224f,  0.342660717f,  0.938932484f,  0.344101426f,\n    0.938403534f,  0.345541325f,  0.937872376f,  0.346980411f,  0.937339012f,\n    0.348418680f,  0.936803442f,  0.349856130f,  0.936265667f,  0.351292756f,\n    0.935725689f,  0.352728556f,  0.935183510f,  0.354163525f,  0.934639130f,\n    0.355597662f,  0.934092550f,  0.357030961f,  0.933543773f,  0.358463421f,\n    0.932992799f,  0.359895037f,  0.932439629f,  0.361325806f,  0.931884266f,\n    0.362755724f,  0.931326709f,  0.364184790f,  0.930766961f,  0.365612998f,\n    0.930205023f,  0.367040346f,  0.929640896f,  0.368466830f,  0.929074581f,\n    0.369892447f,  0.928506080f,  0.371317194f,  0.927935395f,  0.372741067f,\n    0.927362526f,  0.374164063f,  0.926787474f,  0.375586178f,  0.926210242f,\n    0.377007410f,  0.925630831f,  0.378427755f,  0.925049241f,  0.379847209f,\n    0.924465474f,  0.381265769f,  0.923879533f,  0.382683432f,  0.923291417f,\n    0.384100195f,  0.922701128f,  0.385516054f,  0.922108669f,  0.386931006f,\n    0.921514039f,  0.388345047f,  0.920917242f,  0.389758174f,  0.920318277f,\n    0.391170384f,  0.919717146f,  0.392581674f,  0.919113852f,  0.393992040f,\n    0.918508394f,  0.395401479f,  0.917900776f,  0.396809987f,  0.917290997f,\n    0.398217562f,  0.916679060f,  0.399624200f,  0.916064966f,  0.401029897f,\n    0.915448716f,  0.402434651f,  0.914830312f,  0.403838458f,  0.914209756f,\n    0.405241314f,  0.913587048f,  0.406643217f,  0.912962190f,  0.408044163f,\n    0.912335185f,  0.409444149f,  0.911706032f,  0.410843171f,  0.911074734f,\n    0.412241227f,  0.910441292f,  0.413638312f,  0.909805708f,  0.415034424f,\n    0.909167983f,  0.416429560f,  0.908528119f,  0.417823716f,  0.907886116f,\n    0.419216888f,  0.907241978f,  0.420609074f,  0.906595705f,  0.422000271f,\n    0.905947298f,  0.423390474f,  0.905296759f,  0.424779681f,  0.904644091f,\n    0.426167889f,  0.903989293f,  0.427555093f,  0.903332368f,  0.428941292f,\n    0.902673318f,  0.430326481f,  0.902012144f,  0.431710658f,  0.901348847f,\n    0.433093819f,  0.900683429f,  0.434475961f,  0.900015892f,  0.435857080f,\n    0.899346237f,  0.437237174f,  0.898674466f,  0.438616239f,  0.898000580f,\n    0.439994271f,  0.897324581f,  0.441371269f,  0.896646470f,  0.442747228f,\n    0.895966250f,  0.444122145f,  0.895283921f,  0.445496017f,  0.894599486f,\n    0.446868840f,  0.893912945f,  0.448240612f,  0.893224301f,  0.449611330f,\n    0.892533555f,  0.450980989f,  0.891840709f,  0.452349587f,  0.891145765f,\n    0.453717121f,  0.890448723f,  0.455083587f,  0.889749586f,  0.456448982f,\n    0.889048356f,  0.457813304f,  0.888345033f,  0.459176548f,  0.887639620f,\n    0.460538711f,  0.886932119f,  0.461899791f,  0.886222530f,  0.463259784f,\n    0.885510856f,  0.464618686f,  0.884797098f,  0.465976496f,  0.884081259f,\n    0.467333209f,  0.883363339f,  0.468688822f,  0.882643340f,  0.470043332f,\n    0.881921264f,  0.471396737f,  0.881197113f,  0.472749032f,  0.880470889f,\n    0.474100215f,  0.879742593f,  0.475450282f,  0.879012226f,  0.476799230f,\n    0.878279792f,  0.478147056f,  0.877545290f,  0.479493758f,  0.876808724f,\n    0.480839331f,  0.876070094f,  0.482183772f,  0.875329403f,  0.483527079f,\n    0.874586652f,  0.484869248f,  0.873841843f,  0.486210276f,  0.873094978f,\n    0.487550160f,  0.872346059f,  0.488888897f,  0.871595087f,  0.490226483f,\n    0.870842063f,  0.491562916f,  0.870086991f,  0.492898192f,  0.869329871f,\n    0.494232309f,  0.868570706f,  0.495565262f,  0.867809497f,  0.496897049f,\n    0.867046246f,  0.498227667f,  0.866280954f,  0.499557113f,  0.865513624f,\n    0.500885383f,  0.864744258f,  0.502212474f,  0.863972856f,  0.503538384f,\n    0.863199422f,  0.504863109f,  0.862423956f,  0.506186645f,  0.861646461f,\n    0.507508991f,  0.860866939f,  0.508830143f,  0.860085390f,  0.510150097f,\n    0.859301818f,  0.511468850f,  0.858516224f,  0.512786401f,  0.857728610f,\n    0.514102744f,  0.856938977f,  0.515417878f,  0.856147328f,  0.516731799f,\n    0.855353665f,  0.518044504f,  0.854557988f,  0.519355990f,  0.853760301f,\n    0.520666254f,  0.852960605f,  0.521975293f,  0.852158902f,  0.523283103f,\n    0.851355193f,  0.524589683f,  0.850549481f,  0.525895027f,  0.849741768f,\n    0.527199135f,  0.848932055f,  0.528502002f,  0.848120345f,  0.529803625f,\n    0.847306639f,  0.531104001f,  0.846490939f,  0.532403128f,  0.845673247f,\n    0.533701002f,  0.844853565f,  0.534997620f,  0.844031895f,  0.536292979f,\n    0.843208240f,  0.537587076f,  0.842382600f,  0.538879909f,  0.841554977f,\n    0.540171473f,  0.840725375f,  0.541461766f,  0.839893794f,  0.542750785f,\n    0.839060237f,  0.544038527f,  0.838224706f,  0.545324988f,  0.837387202f,\n    0.546610167f,  0.836547727f,  0.547894059f,  0.835706284f,  0.549176662f,\n    0.834862875f,  0.550457973f,  0.834017501f,  0.551737988f,  0.833170165f,\n    0.553016706f,  0.832320868f,  0.554294121f,  0.831469612f,  0.555570233f,\n    0.830616400f,  0.556845037f,  0.829761234f,  0.558118531f,  0.828904115f,\n    0.559390712f,  0.828045045f,  0.560661576f,  0.827184027f,  0.561931121f,\n    0.826321063f,  0.563199344f,  0.825456154f,  0.564466242f,  0.824589303f,\n    0.565731811f,  0.823720511f,  0.566996049f,  0.822849781f,  0.568258953f,\n    0.821977115f,  0.569520519f,  0.821102515f,  0.570780746f,  0.820225983f,\n    0.572039629f,  0.819347520f,  0.573297167f,  0.818467130f,  0.574553355f,\n    0.817584813f,  0.575808191f,  0.816700573f,  0.577061673f,  0.815814411f,\n    0.578313796f,  0.814926329f,  0.579564559f,  0.814036330f,  0.580813958f,\n    0.813144415f,  0.582061990f,  0.812250587f,  0.583308653f,  0.811354847f,\n    0.584553943f,  0.810457198f,  0.585797857f,  0.809557642f,  0.587040394f,\n    0.808656182f,  0.588281548f,  0.807752818f,  0.589521319f,  0.806847554f,\n    0.590759702f,  0.805940391f,  0.591996695f,  0.805031331f,  0.593232295f,\n    0.804120377f,  0.594466499f,  0.803207531f,  0.595699304f,  0.802292796f,\n    0.596930708f,  0.801376172f,  0.598160707f,  0.800457662f,  0.599389298f,\n    0.799537269f,  0.600616479f,  0.798614995f,  0.601842247f,  0.797690841f,\n    0.603066599f,  0.796764810f,  0.604289531f,  0.795836905f,  0.605511041f,\n    0.794907126f,  0.606731127f,  0.793975478f,  0.607949785f,  0.793041960f,\n    0.609167012f,  0.792106577f,  0.610382806f,  0.791169330f,  0.611597164f,\n    0.790230221f,  0.612810082f,  0.789289253f,  0.614021559f,  0.788346428f,\n    0.615231591f,  0.787401747f,  0.616440175f,  0.786455214f,  0.617647308f,\n    0.785506830f,  0.618852988f,  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0.858516224f,  -0.512786401f, 0.859301818f,  -0.511468850f, 0.860085390f,\n    -0.510150097f, 0.860866939f,  -0.508830143f, 0.861646461f,  -0.507508991f,\n    0.862423956f,  -0.506186645f, 0.863199422f,  -0.504863109f, 0.863972856f,\n    -0.503538384f, 0.864744258f,  -0.502212474f, 0.865513624f,  -0.500885383f,\n    0.866280954f,  -0.499557113f, 0.867046246f,  -0.498227667f, 0.867809497f,\n    -0.496897049f, 0.868570706f,  -0.495565262f, 0.869329871f,  -0.494232309f,\n    0.870086991f,  -0.492898192f, 0.870842063f,  -0.491562916f, 0.871595087f,\n    -0.490226483f, 0.872346059f,  -0.488888897f, 0.873094978f,  -0.487550160f,\n    0.873841843f,  -0.486210276f, 0.874586652f,  -0.484869248f, 0.875329403f,\n    -0.483527079f, 0.876070094f,  -0.482183772f, 0.876808724f,  -0.480839331f,\n    0.877545290f,  -0.479493758f, 0.878279792f,  -0.478147056f, 0.879012226f,\n    -0.476799230f, 0.879742593f,  -0.475450282f, 0.880470889f,  -0.474100215f,\n    0.881197113f,  -0.472749032f, 0.881921264f,  -0.471396737f, 0.882643340f,\n    -0.470043332f, 0.883363339f,  -0.468688822f, 0.884081259f,  -0.467333209f,\n    0.884797098f,  -0.465976496f, 0.885510856f,  -0.464618686f, 0.886222530f,\n    -0.463259784f, 0.886932119f,  -0.461899791f, 0.887639620f,  -0.460538711f,\n    0.888345033f,  -0.459176548f, 0.889048356f,  -0.457813304f, 0.889749586f,\n    -0.456448982f, 0.890448723f,  -0.455083587f, 0.891145765f,  -0.453717121f,\n    0.891840709f,  -0.452349587f, 0.892533555f,  -0.450980989f, 0.893224301f,\n    -0.449611330f, 0.893912945f,  -0.448240612f, 0.894599486f,  -0.446868840f,\n    0.895283921f,  -0.445496017f, 0.895966250f,  -0.444122145f, 0.896646470f,\n    -0.442747228f, 0.897324581f,  -0.441371269f, 0.898000580f,  -0.439994271f,\n    0.898674466f,  -0.438616239f, 0.899346237f,  -0.437237174f, 0.900015892f,\n    -0.435857080f, 0.900683429f,  -0.434475961f, 0.901348847f,  -0.433093819f,\n    0.902012144f,  -0.431710658f, 0.902673318f,  -0.430326481f, 0.903332368f,\n    -0.428941292f, 0.903989293f,  -0.427555093f, 0.904644091f,  -0.426167889f,\n    0.905296759f,  -0.424779681f, 0.905947298f,  -0.423390474f, 0.906595705f,\n    -0.422000271f, 0.907241978f,  -0.420609074f, 0.907886116f,  -0.419216888f,\n    0.908528119f,  -0.417823716f, 0.909167983f,  -0.416429560f, 0.909805708f,\n    -0.415034424f, 0.910441292f,  -0.413638312f, 0.911074734f,  -0.412241227f,\n    0.911706032f,  -0.410843171f, 0.912335185f,  -0.409444149f, 0.912962190f,\n    -0.408044163f, 0.913587048f,  -0.406643217f, 0.914209756f,  -0.405241314f,\n    0.914830312f,  -0.403838458f, 0.915448716f,  -0.402434651f, 0.916064966f,\n    -0.401029897f, 0.916679060f,  -0.399624200f, 0.917290997f,  -0.398217562f,\n    0.917900776f,  -0.396809987f, 0.918508394f,  -0.395401479f, 0.919113852f,\n    -0.393992040f, 0.919717146f,  -0.392581674f, 0.920318277f,  -0.391170384f,\n    0.920917242f,  -0.389758174f, 0.921514039f,  -0.388345047f, 0.922108669f,\n    -0.386931006f, 0.922701128f,  -0.385516054f, 0.923291417f,  -0.384100195f,\n    0.923879533f,  -0.382683432f, 0.924465474f,  -0.381265769f, 0.925049241f,\n    -0.379847209f, 0.925630831f,  -0.378427755f, 0.926210242f,  -0.377007410f,\n    0.926787474f,  -0.375586178f, 0.927362526f,  -0.374164063f, 0.927935395f,\n    -0.372741067f, 0.928506080f,  -0.371317194f, 0.929074581f,  -0.369892447f,\n    0.929640896f,  -0.368466830f, 0.930205023f,  -0.367040346f, 0.930766961f,\n    -0.365612998f, 0.931326709f,  -0.364184790f, 0.931884266f,  -0.362755724f,\n    0.932439629f,  -0.361325806f, 0.932992799f,  -0.359895037f, 0.933543773f,\n    -0.358463421f, 0.934092550f,  -0.357030961f, 0.934639130f,  -0.355597662f,\n    0.935183510f,  -0.354163525f, 0.935725689f,  -0.352728556f, 0.936265667f,\n    -0.351292756f, 0.936803442f,  -0.349856130f, 0.937339012f,  -0.348418680f,\n    0.937872376f,  -0.346980411f, 0.938403534f,  -0.345541325f, 0.938932484f,\n    -0.344101426f, 0.939459224f,  -0.342660717f, 0.939983753f,  -0.341219202f,\n    0.940506071f,  -0.339776884f, 0.941026175f,  -0.338333767f, 0.941544065f,\n    -0.336889853f, 0.942059740f,  -0.335445147f, 0.942573198f,  -0.333999651f,\n    0.943084437f,  -0.332553370f, 0.943593458f,  -0.331106306f, 0.944100258f,\n    -0.329658463f, 0.944604837f,  -0.328209844f, 0.945107193f,  -0.326760452f,\n    0.945607325f,  -0.325310292f, 0.946105232f,  -0.323859367f, 0.946600913f,\n    -0.322407679f, 0.947094366f,  -0.320955232f, 0.947585591f,  -0.319502031f,\n    0.948074586f,  -0.318048077f, 0.948561350f,  -0.316593376f, 0.949045882f,\n    -0.315137929f, 0.949528181f,  -0.313681740f, 0.950008245f,  -0.312224814f,\n    0.950486074f,  -0.310767153f, 0.950961666f,  -0.309308760f, 0.951435021f,\n    -0.307849640f, 0.951906137f,  -0.306389795f, 0.952375013f,  -0.304929230f,\n    0.952841648f,  -0.303467947f, 0.953306040f,  -0.302005949f, 0.953768190f,\n    -0.300543241f, 0.954228095f,  -0.299079826f, 0.954685755f,  -0.297615707f,\n    0.955141168f,  -0.296150888f, 0.955594334f,  -0.294685372f, 0.956045251f,\n    -0.293219163f, 0.956493919f,  -0.291752263f, 0.956940336f,  -0.290284677f,\n    0.957384501f,  -0.288816408f, 0.957826413f,  -0.287347460f, 0.958266071f,\n    -0.285877835f, 0.958703475f,  -0.284407537f, 0.959138622f,  -0.282936570f,\n    0.959571513f,  -0.281464938f, 0.960002146f,  -0.279992643f, 0.960430519f,\n    -0.278519689f, 0.960856633f,  -0.277046080f, 0.961280486f,  -0.275571819f,\n    0.961702077f,  -0.274096910f, 0.962121404f,  -0.272621355f, 0.962538468f,\n    -0.271145160f, 0.962953267f,  -0.269668326f, 0.963365800f,  -0.268190857f,\n    0.963776066f,  -0.266712757f, 0.964184064f,  -0.265234030f, 0.964589793f,\n    -0.263754679f, 0.964993253f,  -0.262274707f, 0.965394442f,  -0.260794118f,\n    0.965793359f,  -0.259312915f, 0.966190003f,  -0.257831102f, 0.966584374f,\n    -0.256348682f, 0.966976471f,  -0.254865660f, 0.967366292f,  -0.253382037f,\n    0.967753837f,  -0.251897818f, 0.968139105f,  -0.250413007f, 0.968522094f,\n    -0.248927606f, 0.968902805f,  -0.247441619f, 0.969281235f,  -0.245955050f,\n    0.969657385f,  -0.244467903f, 0.970031253f,  -0.242980180f, 0.970402839f,\n    -0.241491885f, 0.970772141f,  -0.240003022f, 0.971139158f,  -0.238513595f,\n    0.971503891f,  -0.237023606f, 0.971866337f,  -0.235533059f, 0.972226497f,\n    -0.234041959f, 0.972584369f,  -0.232550307f, 0.972939952f,  -0.231058108f,\n    0.973293246f,  -0.229565366f, 0.973644250f,  -0.228072083f, 0.973992962f,\n    -0.226578264f, 0.974339383f,  -0.225083911f, 0.974683511f,  -0.223589029f,\n    0.975025345f,  -0.222093621f, 0.975364885f,  -0.220597690f, 0.975702130f,\n    -0.219101240f, 0.976037079f,  -0.217604275f, 0.976369731f,  -0.216106797f,\n    0.976700086f,  -0.214608811f, 0.977028143f,  -0.213110320f, 0.977353900f,\n    -0.211611327f, 0.977677358f,  -0.210111837f, 0.977998515f,  -0.208611852f,\n    0.978317371f,  -0.207111376f, 0.978633924f,  -0.205610413f, 0.978948175f,\n    -0.204108966f, 0.979260123f,  -0.202607039f, 0.979569766f,  -0.201104635f,\n    0.979877104f,  -0.199601758f, 0.980182136f,  -0.198098411f, 0.980484862f,\n    -0.196594598f, 0.980785280f,  -0.195090322f, 0.981083391f,  -0.193585587f,\n    0.981379193f,  -0.192080397f, 0.981672686f,  -0.190574755f, 0.981963869f,\n    -0.189068664f, 0.982252741f,  -0.187562129f, 0.982539302f,  -0.186055152f,\n    0.982823551f,  -0.184547737f, 0.983105487f,  -0.183039888f, 0.983385110f,\n    -0.181531608f, 0.983662419f,  -0.180022901f, 0.983937413f,  -0.178513771f,\n    0.984210092f,  -0.177004220f, 0.984480455f,  -0.175494253f, 0.984748502f,\n    -0.173983873f, 0.985014231f,  -0.172473084f, 0.985277642f,  -0.170961889f,\n    0.985538735f,  -0.169450291f, 0.985797509f,  -0.167938295f, 0.986053963f,\n    -0.166425904f, 0.986308097f,  -0.164913120f, 0.986559910f,  -0.163399949f,\n    0.986809402f,  -0.161886394f, 0.987056571f,  -0.160372457f, 0.987301418f,\n    -0.158858143f, 0.987543942f,  -0.157343456f, 0.987784142f,  -0.155828398f,\n    0.988022017f,  -0.154312973f, 0.988257568f,  -0.152797185f, 0.988490793f,\n    -0.151281038f, 0.988721692f,  -0.149764535f, 0.988950265f,  -0.148247679f,\n    0.989176510f,  -0.146730474f, 0.989400428f,  -0.145212925f, 0.989622017f,\n    -0.143695033f, 0.989841278f,  -0.142176804f, 0.990058210f,  -0.140658239f,\n    0.990272812f,  -0.139139344f, 0.990485084f,  -0.137620122f, 0.990695025f,\n    -0.136100575f, 0.990902635f,  -0.134580709f, 0.991107914f,  -0.133060525f,\n    0.991310860f,  -0.131540029f, 0.991511473f,  -0.130019223f, 0.991709754f,\n    -0.128498111f, 0.991905700f,  -0.126976696f, 0.992099313f,  -0.125454983f,\n    0.992290591f,  -0.123932975f, 0.992479535f,  -0.122410675f, 0.992666142f,\n    -0.120888087f, 0.992850414f,  -0.119365215f, 0.993032350f,  -0.117842062f,\n    0.993211949f,  -0.116318631f, 0.993389211f,  -0.114794927f, 0.993564136f,\n    -0.113270952f, 0.993736722f,  -0.111746711f, 0.993906970f,  -0.110222207f,\n    0.994074879f,  -0.108697444f, 0.994240449f,  -0.107172425f, 0.994403680f,\n    -0.105647154f, 0.994564571f,  -0.104121634f, 0.994723121f,  -0.102595869f,\n    0.994879331f,  -0.101069863f, 0.995033199f,  -0.099543619f, 0.995184727f,\n    -0.098017140f, 0.995333912f,  -0.096490431f, 0.995480755f,  -0.094963495f,\n    0.995625256f,  -0.093436336f, 0.995767414f,  -0.091908956f, 0.995907229f,\n    -0.090381361f, 0.996044701f,  -0.088853553f, 0.996179829f,  -0.087325535f,\n    0.996312612f,  -0.085797312f, 0.996443051f,  -0.084268888f, 0.996571146f,\n    -0.082740265f, 0.996696895f,  -0.081211447f, 0.996820299f,  -0.079682438f,\n    0.996941358f,  -0.078153242f, 0.997060070f,  -0.076623861f, 0.997176437f,\n    -0.075094301f, 0.997290457f,  -0.073564564f, 0.997402130f,  -0.072034653f,\n    0.997511456f,  -0.070504573f, 0.997618435f,  -0.068974328f, 0.997723067f,\n    -0.067443920f, 0.997825350f,  -0.065913353f, 0.997925286f,  -0.064382631f,\n    0.998022874f,  -0.062851758f, 0.998118113f,  -0.061320736f, 0.998211003f,\n    -0.059789571f, 0.998301545f,  -0.058258265f, 0.998389737f,  -0.056726821f,\n    0.998475581f,  -0.055195244f, 0.998559074f,  -0.053663538f, 0.998640218f,\n    -0.052131705f, 0.998719012f,  -0.050599749f, 0.998795456f,  -0.049067674f,\n    0.998869550f,  -0.047535484f, 0.998941293f,  -0.046003182f, 0.999010686f,\n    -0.044470772f, 0.999077728f,  -0.042938257f, 0.999142419f,  -0.041405641f,\n    0.999204759f,  -0.039872928f, 0.999264747f,  -0.038340120f, 0.999322385f,\n    -0.036807223f, 0.999377670f,  -0.035274239f, 0.999430605f,  -0.033741172f,\n    0.999481187f,  -0.032208025f, 0.999529418f,  -0.030674803f, 0.999575296f,\n    -0.029141509f, 0.999618822f,  -0.027608146f, 0.999659997f,  -0.026074718f,\n    0.999698819f,  -0.024541229f, 0.999735288f,  -0.023007681f, 0.999769405f,\n    -0.021474080f, 0.999801170f,  -0.019940429f, 0.999830582f,  -0.018406730f,\n    0.999857641f,  -0.016872988f, 0.999882347f,  -0.015339206f, 0.999904701f,\n    -0.013805389f, 0.999924702f,  -0.012271538f, 0.999942350f,  -0.010737659f,\n    0.999957645f,  -0.009203755f, 0.999970586f,  -0.007669829f, 0.999981175f,\n    -0.006135885f, 0.999989411f,  -0.004601926f, 0.999995294f,  -0.003067957f,\n    0.999998823f,  -0.001533980f};\n\n/**\n  @brief  Q31 Twiddle factors Table\n*/\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
 for(i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 16, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n */\nconst q31_t twiddleCoef_16_q31[24] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x30FBC54D, (q31_t)0x7641AF3C,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x89BE50C3, (q31_t)0xCF043AB2,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3};\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 32, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n */\nconst q31_t twiddleCoef_32_q31[48] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,\n    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, (q31_t)0x6A6D98A4, (q31_t)0x471CECE6,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,\n    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F,\n    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0x9592675B, (q31_t)0x471CECE6,\n    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, (q31_t)0x8275A0C0, (q31_t)0x18F8B83C,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,\n    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x9592675B, (q31_t)0xB8E31319,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xB8E31319, (q31_t)0x9592675B,\n    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, (q31_t)0xE70747C3, (q31_t)0x8275A0C0};\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 64, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n */\nconst q31_t twiddleCoef_64_q31[96] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,\n    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, (q31_t)0x7A7D055B, (q31_t)0x25280C5D,\n    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,\n    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x62F201AC, (q31_t)0x5133CC94,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x5133CC94, (q31_t)0x62F201AC,\n    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,\n    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,\n    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, (q31_t)0x0C8BD35E, (q31_t)0x7F62368F,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,\n    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,\n    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6,\n    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, (q31_t)0xAECC336B, (q31_t)0x62F201AC,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,\n    (q31_t)0x9592675B, (q31_t)0x471CECE6, (q31_t)0x8F1D343A, (q31_t)0x3C56BA70,\n    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,\n    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x809DC970, (q31_t)0xF3742CA1,\n    (q31_t)0x8275A0C0, (q31_t)0xE70747C3, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,\n    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,\n    (q31_t)0x9592675B, (q31_t)0xB8E31319, (q31_t)0x9D0DFE53, (q31_t)0xAECC336B,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,\n    (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,\n    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4,\n    (q31_t)0xE70747C3, (q31_t)0x8275A0C0, (q31_t)0xF3742CA1, (q31_t)0x809DC970};\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
for (i = 0; i < 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 128, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n */\nconst q31_t twiddleCoef_128_q31[192] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,\n    (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, (q31_t)0x7E9D55FC, (q31_t)0x12C8106E,\n    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,\n    (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x78848413, (q31_t)0x2B1F34EB,\n    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, (q31_t)0x73B5EBD0, (q31_t)0x36BA2013,\n    (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,\n    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,\n    (q31_t)0x62F201AC, (q31_t)0x5133CC94, (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,\n    (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,\n    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14,\n    (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,\n    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2B1F34EB, (q31_t)0x78848413,\n    (q31_t)0x25280C5D, (q31_t)0x7A7D055B, (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE,\n    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,\n    (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xF9B82683, (q31_t)0x7FD8878D,\n    (q31_t)0xF3742CA1, (q31_t)0x7F62368F, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,\n    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,\n    (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B, (q31_t)0xD4E0CB14, (q31_t)0x78848413,\n    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,\n    (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,\n    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, (q31_t)0xB3C0200C, (q31_t)0x66CF811F,\n    (q31_t)0xAECC336B, (q31_t)0x62F201AC, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,\n    (q31_t)0x9D0DFE53, (q31_t)0x5133CC94, (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3,\n    (q31_t)0x9592675B, (q31_t)0x471CECE6, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,\n    (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,\n    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB,\n    (q31_t)0x8582FAA4, (q31_t)0x25280C5D, (q31_t)0x83D60411, (q31_t)0x1F19F97B,\n    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x8162AA03, (q31_t)0x12C8106E,\n    (q31_t)0x809DC970, (q31_t)0x0C8BD35E, (q31_t)0x80277872, (q31_t)0x0647D97C,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x80277872, (q31_t)0xF9B82683,\n    (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8162AA03, (q31_t)0xED37EF91,\n    (q31_t)0x8275A0C0, (q31_t)0xE70747C3, (q31_t)0x83D60411, (q31_t)0xE0E60684,\n    (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,\n    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,\n    (q31_t)0x8F1D343A, (q31_t)0xC3A9458F, (q31_t)0x9235F2EB, (q31_t)0xBE31E19B,\n    (q31_t)0x9592675B, (q31_t)0xB8E31319, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,\n    (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xAA0A5B2D, (q31_t)0xA1288376,\n    (q31_t)0xAECC336B, (q31_t)0x9D0DFE53, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,\n    (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,\n    (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, (q31_t)0xC945DFEC, (q31_t)0x8C4A142F,\n    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,\n    (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE0E60684, (q31_t)0x83D60411,\n    (q31_t)0xE70747C3, (q31_t)0x8275A0C0, (q31_t)0xED37EF91, (q31_t)0x8162AA03,\n    (q31_t)0xF3742CA1, (q31_t)0x809DC970, (q31_t)0xF9B82683, (q31_t)0x80277872};\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 256, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n\n */\nconst q31_t twiddleCoef_256_q31[384] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FF62182, (q31_t)0x03242ABF,\n    (q31_t)0x7FD8878D, (q31_t)0x0647D97C, (q31_t)0x7FA736B4, (q31_t)0x096A9049,\n    (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,\n    (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E1D93E9, (q31_t)0x15E21444,\n    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A,\n    (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,\n    (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x798A23B1, (q31_t)0x2826B928,\n    (q31_t)0x78848413, (q31_t)0x2B1F34EB, (q31_t)0x776C4EDB, (q31_t)0x2E110A62,\n    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, (q31_t)0x7504D345, (q31_t)0x33DEF287,\n    (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x72552C84, (q31_t)0x398CDD32,\n    (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7,\n    (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64, (q31_t)0x6C242960, (q31_t)0x447ACD50,\n    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x68A69E81, (q31_t)0x49B41533,\n    (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3, (q31_t)0x64E88926, (q31_t)0x4EBFE8A4,\n    (q31_t)0x62F201AC, (q31_t)0x5133CC94, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,\n    (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5CB420DF, (q31_t)0x5842DD54,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x5842DD54, (q31_t)0x5CB420DF,\n    (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,\n    (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4EBFE8A4, (q31_t)0x64E88926,\n    (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F, (q31_t)0x49B41533, (q31_t)0x68A69E81,\n    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, (q31_t)0x447ACD50, (q31_t)0x6C242960,\n    (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1,\n    (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, (q31_t)0x398CDD32, (q31_t)0x72552C84,\n    (q31_t)0x36BA2013, (q31_t)0x73B5EBD0, (q31_t)0x33DEF287, (q31_t)0x7504D345,\n    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2E110A62, (q31_t)0x776C4EDB,\n    (q31_t)0x2B1F34EB, (q31_t)0x78848413, (q31_t)0x2826B928, (q31_t)0x798A23B1,\n    (q31_t)0x25280C5D, (q31_t)0x7A7D055B, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,\n    (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1,\n    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, (q31_t)0x15E21444, (q31_t)0x7E1D93E9,\n    (q31_t)0x12C8106E, (q31_t)0x7E9D55FC, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,\n    (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x096A9049, (q31_t)0x7FA736B4,\n    (q31_t)0x0647D97C, (q31_t)0x7FD8878D, (q31_t)0x03242ABF, (q31_t)0x7FF62182,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,\n    (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF6956FB6, (q31_t)0x7FA736B4,\n    (q31_t)0xF3742CA1, (q31_t)0x7F62368F, (q31_t)0xF054D8D4, (q31_t)0x7F0991C3,\n    (q31_t)0xED37EF91, (q31_t)0x7E9D55FC, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,\n    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1,\n    (q31_t)0xE0E60684, (q31_t)0x7C29FBEE, (q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D,\n    (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,\n    (q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB,\n    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, (q31_t)0xCC210D78, (q31_t)0x7504D345,\n    (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0, (q31_t)0xC67322CD, (q31_t)0x72552C84,\n    (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1,\n    (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14, (q31_t)0xBB8532AF, (q31_t)0x6C242960,\n    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,\n    (q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB140175B, (q31_t)0x64E88926,\n    (q31_t)0xAECC336B, (q31_t)0x62F201AC, (q31_t)0xAC64D510, (q31_t)0x60EC3830,\n    (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA34BDF20, (q31_t)0x5842DD54,\n    (q31_t)0xA1288376, (q31_t)0x55F5A4D2, (q31_t)0x9F13C7D0, (q31_t)0x539B2AEF,\n    (q31_t)0x9D0DFE53, (q31_t)0x5133CC94, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,\n    (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9759617E, (q31_t)0x49B41533,\n    (q31_t)0x9592675B, (q31_t)0x471CECE6, (q31_t)0x93DBD69F, (q31_t)0x447ACD50,\n    (q31_t)0x9235F2EB, (q31_t)0x41CE1E64, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,\n    (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8DAAD37B, (q31_t)0x398CDD32,\n    (q31_t)0x8C4A142F, (q31_t)0x36BA2013, (q31_t)0x8AFB2CBA, (q31_t)0x33DEF287,\n    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, (q31_t)0x8893B124, (q31_t)0x2E110A62,\n    (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8675DC4E, (q31_t)0x2826B928,\n    (q31_t)0x8582FAA4, (q31_t)0x25280C5D, (q31_t)0x84A2FC62, (q31_t)0x2223A4C5,\n    (q31_t)0x83D60411, (q31_t)0x1F19F97B, (q31_t)0x831C314E, (q31_t)0x1C0B826A,\n    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x81E26C16, (q31_t)0x15E21444,\n    (q31_t)0x8162AA03, (q31_t)0x12C8106E, (q31_t)0x80F66E3C, (q31_t)0x0FAB272B,\n    (q31_t)0x809DC970, (q31_t)0x0C8BD35E, (q31_t)0x8058C94C, (q31_t)0x096A9049,\n    (q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8009DE7D, (q31_t)0x03242ABF,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x8009DE7D, (q31_t)0xFCDBD541,\n    (q31_t)0x80277872, (q31_t)0xF9B82683, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,\n    (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80F66E3C, (q31_t)0xF054D8D4,\n    (q31_t)0x8162AA03, (q31_t)0xED37EF91, (q31_t)0x81E26C16, (q31_t)0xEA1DEBBB,\n    (q31_t)0x8275A0C0, (q31_t)0xE70747C3, (q31_t)0x831C314E, (q31_t)0xE3F47D95,\n    (q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A,\n    (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2, (q31_t)0x8675DC4E, (q31_t)0xD7D946D7,\n    (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,\n    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78,\n    (q31_t)0x8C4A142F, (q31_t)0xC945DFEC, (q31_t)0x8DAAD37B, (q31_t)0xC67322CD,\n    (q31_t)0x8F1D343A, (q31_t)0xC3A9458F, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,\n    (q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x93DBD69F, (q31_t)0xBB8532AF,\n    (q31_t)0x9592675B, (q31_t)0xB8E31319, (q31_t)0x9759617E, (q31_t)0xB64BEACC,\n    (q31_t)0x99307EE0, (q31_t)0xB3C0200C, (q31_t)0x9B1776D9, (q31_t)0xB140175B,\n    (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9F13C7D0, (q31_t)0xAC64D510,\n    (q31_t)0xA1288376, (q31_t)0xAA0A5B2D, (q31_t)0xA34BDF20, (q31_t)0xA7BD22AB,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,\n    (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0,\n    (q31_t)0xAECC336B, (q31_t)0x9D0DFE53, (q31_t)0xB140175B, (q31_t)0x9B1776D9,\n    (q31_t)0xB3C0200C, (q31_t)0x99307EE0, (q31_t)0xB64BEACC, (q31_t)0x9759617E,\n    (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F,\n    (q31_t)0xBE31E19B, (q31_t)0x9235F2EB, (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E,\n    (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,\n    (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA,\n    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, (q31_t)0xD1EEF59E, (q31_t)0x8893B124,\n    (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,\n    (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62,\n    (q31_t)0xE0E60684, (q31_t)0x83D60411, (q31_t)0xE3F47D95, (q31_t)0x831C314E,\n    (q31_t)0xE70747C3, (q31_t)0x8275A0C0, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,\n    (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C,\n    (q31_t)0xF3742CA1, (q31_t)0x809DC970, (q31_t)0xF6956FB6, (q31_t)0x8058C94C,\n    (q31_t)0xF9B82683, (q31_t)0x80277872, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D};\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 512, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n\n */\nconst q31_t twiddleCoef_512_q31[768] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,\n    (q31_t)0x7FF62182, (q31_t)0x03242ABF, (q31_t)0x7FE9CBC0, (q31_t)0x04B6195D,\n    (q31_t)0x7FD8878D, (q31_t)0x0647D97C, (q31_t)0x7FC25596, (q31_t)0x07D95B9E,\n    (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805,\n    (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, (q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3,\n    (q31_t)0x7F0991C3, (q31_t)0x0FAB272B, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE,\n    (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E5FE493, (q31_t)0x145576B1,\n    (q31_t)0x7E1D93E9, (q31_t)0x15E21444, (q31_t)0x7DD6668E, (q31_t)0x176DD9DE,\n    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, (q31_t)0x7D3980EC, (q31_t)0x1A82A025,\n    (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C894BDD, (q31_t)0x1D934FE5,\n    (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B, (q31_t)0x7BC5E28F, (q31_t)0x209F701C,\n    (q31_t)0x7B5D039D, (q31_t)0x2223A4C5, (q31_t)0x7AEF6323, (q31_t)0x23A6887E,\n    (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A05EEAD, (q31_t)0x26A82185,\n    (q31_t)0x798A23B1, (q31_t)0x2826B928, (q31_t)0x7909A92C, (q31_t)0x29A3C484,\n    (q31_t)0x78848413, (q31_t)0x2B1F34EB, (q31_t)0x77FAB988, (q31_t)0x2C98FBBA,\n    (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x76D94988, (q31_t)0x2F875262,\n    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, (q31_t)0x75A585CF, (q31_t)0x326E54C7,\n    (q31_t)0x7504D345, (q31_t)0x33DEF287, (q31_t)0x745F9DD1, (q31_t)0x354D9056,\n    (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x7307C3D0, (q31_t)0x382493B0,\n    (q31_t)0x72552C84, (q31_t)0x398CDD32, (q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7,\n    (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, (q31_t)0x70231099, (q31_t)0x3DB832A5,\n    (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6E96A99C, (q31_t)0x4073F21D,\n    (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64, (q31_t)0x6CF934FB, (q31_t)0x4325C135,\n    (q31_t)0x6C242960, (q31_t)0x447ACD50, (q31_t)0x6B4AF278, (q31_t)0x45CD358F,\n    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x698C246C, (q31_t)0x4869E664,\n    (q31_t)0x68A69E81, (q31_t)0x49B41533, (q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97,\n    (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3, (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4,\n    (q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x63EF328F, (q31_t)0x4FFB654D,\n    (q31_t)0x62F201AC, (q31_t)0x5133CC94, (q31_t)0x61F1003E, (q31_t)0x5269126E,\n    (q31_t)0x60EC3830, (q31_t)0x539B2AEF, (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A,\n    (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9,\n    (q31_t)0x5CB420DF, (q31_t)0x5842DD54, (q31_t)0x5B9D1153, (q31_t)0x59646497,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x59646497, (q31_t)0x5B9D1153,\n    (q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C,\n    (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89, (q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D,\n    (q31_t)0x539B2AEF, (q31_t)0x60EC3830, (q31_t)0x5269126E, (q31_t)0x61F1003E,\n    (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4FFB654D, (q31_t)0x63EF328F,\n    (q31_t)0x4EBFE8A4, (q31_t)0x64E88926, (q31_t)0x4D8162C4, (q31_t)0x65DDFBD3,\n    (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F, (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC,\n    (q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x4869E664, (q31_t)0x698C246C,\n    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, (q31_t)0x45CD358F, (q31_t)0x6B4AF278,\n    (q31_t)0x447ACD50, (q31_t)0x6C242960, (q31_t)0x4325C135, (q31_t)0x6CF934FB,\n    (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4073F21D, (q31_t)0x6E96A99C,\n    (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1, (q31_t)0x3DB832A5, (q31_t)0x70231099,\n    (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2,\n    (q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x382493B0, (q31_t)0x7307C3D0,\n    (q31_t)0x36BA2013, (q31_t)0x73B5EBD0, (q31_t)0x354D9056, (q31_t)0x745F9DD1,\n    (q31_t)0x33DEF287, (q31_t)0x7504D345, (q31_t)0x326E54C7, (q31_t)0x75A585CF,\n    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2F875262, (q31_t)0x76D94988,\n    (q31_t)0x2E110A62, (q31_t)0x776C4EDB, (q31_t)0x2C98FBBA, (q31_t)0x77FAB988,\n    (q31_t)0x2B1F34EB, (q31_t)0x78848413, (q31_t)0x29A3C484, (q31_t)0x7909A92C,\n    (q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x26A82185, (q31_t)0x7A05EEAD,\n    (q31_t)0x25280C5D, (q31_t)0x7A7D055B, (q31_t)0x23A6887E, (q31_t)0x7AEF6323,\n    (q31_t)0x2223A4C5, (q31_t)0x7B5D039D, (q31_t)0x209F701C, (q31_t)0x7BC5E28F,\n    (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1D934FE5, (q31_t)0x7C894BDD,\n    (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1, (q31_t)0x1A82A025, (q31_t)0x7D3980EC,\n    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, (q31_t)0x176DD9DE, (q31_t)0x7DD6668E,\n    (q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x145576B1, (q31_t)0x7E5FE493,\n    (q31_t)0x12C8106E, (q31_t)0x7E9D55FC, (q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6,\n    (q31_t)0x0FAB272B, (q31_t)0x7F0991C3, (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5,\n    (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0AFB6805, (q31_t)0x7F872BF3,\n    (q31_t)0x096A9049, (q31_t)0x7FA736B4, (q31_t)0x07D95B9E, (q31_t)0x7FC25596,\n    (q31_t)0x0647D97C, (q31_t)0x7FD8878D, (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0,\n    (q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x01921D1F, (q31_t)0x7FFD885A,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A,\n    (q31_t)0xFCDBD541, (q31_t)0x7FF62182, (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0,\n    (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF826A461, (q31_t)0x7FC25596,\n    (q31_t)0xF6956FB6, (q31_t)0x7FA736B4, (q31_t)0xF50497FA, (q31_t)0x7F872BF3,\n    (q31_t)0xF3742CA1, (q31_t)0x7F62368F, (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5,\n    (q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6,\n    (q31_t)0xED37EF91, (q31_t)0x7E9D55FC, (q31_t)0xEBAA894E, (q31_t)0x7E5FE493,\n    (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9, (q31_t)0xE8922621, (q31_t)0x7DD6668E,\n    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC,\n    (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1, (q31_t)0xE26CB01A, (q31_t)0x7C894BDD,\n    (q31_t)0xE0E60684, (q31_t)0x7C29FBEE, (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F,\n    (q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDC597781, (q31_t)0x7AEF6323,\n    (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B, (q31_t)0xD957DE7A, (q31_t)0x7A05EEAD,\n    (q31_t)0xD7D946D7, (q31_t)0x798A23B1, (q31_t)0xD65C3B7B, (q31_t)0x7909A92C,\n    (q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD3670445, (q31_t)0x77FAB988,\n    (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB, (q31_t)0xD078AD9D, (q31_t)0x76D94988,\n    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, (q31_t)0xCD91AB38, (q31_t)0x75A585CF,\n    (q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1,\n    (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0, (q31_t)0xC7DB6C50, (q31_t)0x7307C3D0,\n    (q31_t)0xC67322CD, (q31_t)0x72552C84, (q31_t)0xC50D1148, (q31_t)0x719E2CD2,\n    (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC247CD5A, (q31_t)0x70231099,\n    (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1, (q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C,\n    (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14, (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB,\n    (q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBA32CA70, (q31_t)0x6B4AF278,\n    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, (q31_t)0xB796199B, (q31_t)0x698C246C,\n    (q31_t)0xB64BEACC, (q31_t)0x68A69E81, (q31_t)0xB5049368, (q31_t)0x67BD0FBC,\n    (q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3,\n    (q31_t)0xB140175B, (q31_t)0x64E88926, (q31_t)0xB0049AB2, (q31_t)0x63EF328F,\n    (q31_t)0xAECC336B, (q31_t)0x62F201AC, (q31_t)0xAD96ED91, (q31_t)0x61F1003E,\n    (q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D,\n    (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89, (q31_t)0xA8E21106, (q31_t)0x5DC79D7C,\n    (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF, (q31_t)0xA69B9B68, (q31_t)0x5B9D1153,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA462EEAC, (q31_t)0x59646497,\n    (q31_t)0xA34BDF20, (q31_t)0x5842DD54, (q31_t)0xA2386283, (q31_t)0x571DEEF9,\n    (q31_t)0xA1288376, (q31_t)0x55F5A4D2, (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A,\n    (q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E0EFFC1, (q31_t)0x5269126E,\n    (q31_t)0x9D0DFE53, (q31_t)0x5133CC94, (q31_t)0x9C10CD70, (q31_t)0x4FFB654D,\n    (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4, (q31_t)0x9A22042C, (q31_t)0x4D8162C4,\n    (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9842F043, (q31_t)0x4AFB6C97,\n    (q31_t)0x9759617E, (q31_t)0x49B41533, (q31_t)0x9673DB94, (q31_t)0x4869E664,\n    (q31_t)0x9592675B, (q31_t)0x471CECE6, (q31_t)0x94B50D87, (q31_t)0x45CD358F,\n    (q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9306CB04, (q31_t)0x4325C135,\n    (q31_t)0x9235F2EB, (q31_t)0x41CE1E64, (q31_t)0x91695663, (q31_t)0x4073F21D,\n    (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7, (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5,\n    (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7,\n    (q31_t)0x8DAAD37B, (q31_t)0x398CDD32, (q31_t)0x8CF83C30, (q31_t)0x382493B0,\n    (q31_t)0x8C4A142F, (q31_t)0x36BA2013, (q31_t)0x8BA0622F, (q31_t)0x354D9056,\n    (q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8A5A7A30, (q31_t)0x326E54C7,\n    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, (q31_t)0x8926B677, (q31_t)0x2F875262,\n    (q31_t)0x8893B124, (q31_t)0x2E110A62, (q31_t)0x88054677, (q31_t)0x2C98FBBA,\n    (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x86F656D3, (q31_t)0x29A3C484,\n    (q31_t)0x8675DC4E, (q31_t)0x2826B928, (q31_t)0x85FA1152, (q31_t)0x26A82185,\n    (q31_t)0x8582FAA4, (q31_t)0x25280C5D, (q31_t)0x85109CDC, (q31_t)0x23A6887E,\n    (q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x843A1D70, (q31_t)0x209F701C,\n    (q31_t)0x83D60411, (q31_t)0x1F19F97B, (q31_t)0x8376B422, (q31_t)0x1D934FE5,\n    (q31_t)0x831C314E, (q31_t)0x1C0B826A, (q31_t)0x82C67F13, (q31_t)0x1A82A025,\n    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82299971, (q31_t)0x176DD9DE,\n    (q31_t)0x81E26C16, (q31_t)0x15E21444, (q31_t)0x81A01B6C, (q31_t)0x145576B1,\n    (q31_t)0x8162AA03, (q31_t)0x12C8106E, (q31_t)0x812A1A39, (q31_t)0x1139F0CE,\n    (q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3,\n    (q31_t)0x809DC970, (q31_t)0x0C8BD35E, (q31_t)0x8078D40D, (q31_t)0x0AFB6805,\n    (q31_t)0x8058C94C, (q31_t)0x096A9049, (q31_t)0x803DAA69, (q31_t)0x07D95B9E,\n    (q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80163440, (q31_t)0x04B6195D,\n    (q31_t)0x8009DE7D, (q31_t)0x03242ABF, (q31_t)0x800277A5, (q31_t)0x01921D1F,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x800277A5, (q31_t)0xFE6DE2E0,\n    (q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80163440, (q31_t)0xFB49E6A2,\n    (q31_t)0x80277872, (q31_t)0xF9B82683, (q31_t)0x803DAA69, (q31_t)0xF826A461,\n    (q31_t)0x8058C94C, (q31_t)0xF6956FB6, (q31_t)0x8078D40D, (q31_t)0xF50497FA,\n    (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C,\n    (q31_t)0x80F66E3C, (q31_t)0xF054D8D4, (q31_t)0x812A1A39, (q31_t)0xEEC60F31,\n    (q31_t)0x8162AA03, (q31_t)0xED37EF91, (q31_t)0x81A01B6C, (q31_t)0xEBAA894E,\n    (q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82299971, (q31_t)0xE8922621,\n    (q31_t)0x8275A0C0, (q31_t)0xE70747C3, (q31_t)0x82C67F13, (q31_t)0xE57D5FDA,\n    (q31_t)0x831C314E, (q31_t)0xE3F47D95, (q31_t)0x8376B422, (q31_t)0xE26CB01A,\n    (q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x843A1D70, (q31_t)0xDF608FE3,\n    (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A, (q31_t)0x85109CDC, (q31_t)0xDC597781,\n    (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2, (q31_t)0x85FA1152, (q31_t)0xD957DE7A,\n    (q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86F656D3, (q31_t)0xD65C3B7B,\n    (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14, (q31_t)0x88054677, (q31_t)0xD3670445,\n    (q31_t)0x8893B124, (q31_t)0xD1EEF59E, (q31_t)0x8926B677, (q31_t)0xD078AD9D,\n    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38,\n    (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78, (q31_t)0x8BA0622F, (q31_t)0xCAB26FA9,\n    (q31_t)0x8C4A142F, (q31_t)0xC945DFEC, (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50,\n    (q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E61D32D, (q31_t)0xC50D1148,\n    (q31_t)0x8F1D343A, (q31_t)0xC3A9458F, (q31_t)0x8FDCEF66, (q31_t)0xC247CD5A,\n    (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648, (q31_t)0x91695663, (q31_t)0xBF8C0DE2,\n    (q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA,\n    (q31_t)0x93DBD69F, (q31_t)0xBB8532AF, (q31_t)0x94B50D87, (q31_t)0xBA32CA70,\n    (q31_t)0x9592675B, (q31_t)0xB8E31319, (q31_t)0x9673DB94, (q31_t)0xB796199B,\n    (q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x9842F043, (q31_t)0xB5049368,\n    (q31_t)0x99307EE0, (q31_t)0xB3C0200C, (q31_t)0x9A22042C, (q31_t)0xB27E9D3B,\n    (q31_t)0x9B1776D9, (q31_t)0xB140175B, (q31_t)0x9C10CD70, (q31_t)0xB0049AB2,\n    (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91,\n    (q31_t)0x9F13C7D0, (q31_t)0xAC64D510, (q31_t)0xA01C4C72, (q31_t)0xAB35F5B5,\n    (q31_t)0xA1288376, (q31_t)0xAA0A5B2D, (q31_t)0xA2386283, (q31_t)0xA8E21106,\n    (q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA462EEAC, (q31_t)0xA69B9B68,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xA69B9B68, (q31_t)0xA462EEAC,\n    (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20, (q31_t)0xA8E21106, (q31_t)0xA2386283,\n    (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72,\n    (q31_t)0xAC64D510, (q31_t)0x9F13C7D0, (q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1,\n    (q31_t)0xAECC336B, (q31_t)0x9D0DFE53, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70,\n    (q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB27E9D3B, (q31_t)0x9A22042C,\n    (q31_t)0xB3C0200C, (q31_t)0x99307EE0, (q31_t)0xB5049368, (q31_t)0x9842F043,\n    (q31_t)0xB64BEACC, (q31_t)0x9759617E, (q31_t)0xB796199B, (q31_t)0x9673DB94,\n    (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBA32CA70, (q31_t)0x94B50D87,\n    (q31_t)0xBB8532AF, (q31_t)0x93DBD69F, (q31_t)0xBCDA3ECA, (q31_t)0x9306CB04,\n    (q31_t)0xBE31E19B, (q31_t)0x9235F2EB, (q31_t)0xBF8C0DE2, (q31_t)0x91695663,\n    (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66,\n    (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, (q31_t)0xC50D1148, (q31_t)0x8E61D32D,\n    (q31_t)0xC67322CD, (q31_t)0x8DAAD37B, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30,\n    (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F,\n    (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA, (q31_t)0xCD91AB38, (q31_t)0x8A5A7A30,\n    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, (q31_t)0xD078AD9D, (q31_t)0x8926B677,\n    (q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD3670445, (q31_t)0x88054677,\n    (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC, (q31_t)0xD65C3B7B, (q31_t)0x86F656D3,\n    (q31_t)0xD7D946D7, (q31_t)0x8675DC4E, (q31_t)0xD957DE7A, (q31_t)0x85FA1152,\n    (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDC597781, (q31_t)0x85109CDC,\n    (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62, (q31_t)0xDF608FE3, (q31_t)0x843A1D70,\n    (q31_t)0xE0E60684, (q31_t)0x83D60411, (q31_t)0xE26CB01A, (q31_t)0x8376B422,\n    (q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE57D5FDA, (q31_t)0x82C67F13,\n    (q31_t)0xE70747C3, (q31_t)0x8275A0C0, (q31_t)0xE8922621, (q31_t)0x82299971,\n    (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C,\n    (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEEC60F31, (q31_t)0x812A1A39,\n    (q31_t)0xF054D8D4, (q31_t)0x80F66E3C, (q31_t)0xF1E43D1C, (q31_t)0x80C7A80A,\n    (q31_t)0xF3742CA1, (q31_t)0x809DC970, (q31_t)0xF50497FA, (q31_t)0x8078D40D,\n    (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF826A461, (q31_t)0x803DAA69,\n    (q31_t)0xF9B82683, (q31_t)0x80277872, (q31_t)0xFB49E6A2, (q31_t)0x80163440,\n    (q31_t)0xFCDBD541, (q31_t)0x8009DE7D, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5};\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 1024, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n\n */\nconst q31_t twiddleCoef_1024_q31[1536] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFF6216, (q31_t)0x00C90F88,\n    (q31_t)0x7FFD885A, (q31_t)0x01921D1F, (q31_t)0x7FFA72D1, (q31_t)0x025B26D7,\n    (q31_t)0x7FF62182, (q31_t)0x03242ABF, (q31_t)0x7FF09477, (q31_t)0x03ED26E6,\n    (q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE1C76B, (q31_t)0x057F0034,\n    (q31_t)0x7FD8878D, (q31_t)0x0647D97C, (q31_t)0x7FCE0C3E, (q31_t)0x0710A344,\n    (q31_t)0x7FC25596, (q31_t)0x07D95B9E, (q31_t)0x7FB563B2, (q31_t)0x08A2009A,\n    (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F97CEBC, (q31_t)0x0A3308BC,\n    (q31_t)0x7F872BF3, (q31_t)0x0AFB6805, (q31_t)0x7F754E7F, (q31_t)0x0BC3AC35,\n    (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92,\n    (q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2191B4, (q31_t)0x0EE38765,\n    (q31_t)0x7F0991C3, (q31_t)0x0FAB272B, (q31_t)0x7EF0585F, (q31_t)0x1072A047,\n    (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE, (q31_t)0x7EBA3A39, (q31_t)0x120116D4,\n    (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E7F3956, (q31_t)0x138EDBB0,\n    (q31_t)0x7E5FE493, (q31_t)0x145576B1, (q31_t)0x7E3F57FE, (q31_t)0x151BDF85,\n    (q31_t)0x7E1D93E9, (q31_t)0x15E21444, (q31_t)0x7DFA98A7, (q31_t)0x16A81305,\n    (q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DB0FDF7, (q31_t)0x183366E8,\n    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, (q31_t)0x7D628AC5, (q31_t)0x19BDCBF2,\n    (q31_t)0x7D3980EC, (q31_t)0x1A82A025, (q31_t)0x7D0F4218, (q31_t)0x1B4732EF,\n    (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CB72724, (q31_t)0x1CCF8CB3,\n    (q31_t)0x7C894BDD, (q31_t)0x1D934FE5, (q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E,\n    (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B, (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A,\n    (q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B920B89, (q31_t)0x2161B39F,\n    (q31_t)0x7B5D039D, (q31_t)0x2223A4C5, (q31_t)0x7B26CB4F, (q31_t)0x22E541AE,\n    (q31_t)0x7AEF6323, (q31_t)0x23A6887E, (q31_t)0x7AB6CBA3, (q31_t)0x24677757,\n    (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A4210D8, (q31_t)0x25E845B5,\n    (q31_t)0x7A05EEAD, (q31_t)0x26A82185, (q31_t)0x79C89F6D, (q31_t)0x27679DF4,\n    (q31_t)0x798A23B1, (q31_t)0x2826B928, (q31_t)0x794A7C11, (q31_t)0x28E5714A,\n    (q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78C7ABA1, (q31_t)0x2A61B101,\n    (q31_t)0x78848413, (q31_t)0x2B1F34EB, (q31_t)0x78403328, (q31_t)0x2BDC4E6F,\n    (q31_t)0x77FAB988, (q31_t)0x2C98FBBA, (q31_t)0x77B417DF, (q31_t)0x2D553AFB,\n    (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x77235F2D, (q31_t)0x2ECC681E,\n    (q31_t)0x76D94988, (q31_t)0x2F875262, (q31_t)0x768E0EA5, (q31_t)0x3041C760,\n    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, (q31_t)0x75F42C0A, (q31_t)0x31B54A5D,\n    (q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7555BD4B, (q31_t)0x3326E2C2,\n    (q31_t)0x7504D345, (q31_t)0x33DEF287, (q31_t)0x74B2C883, (q31_t)0x3496824F,\n    (q31_t)0x745F9DD1, (q31_t)0x354D9056, (q31_t)0x740B53FA, (q31_t)0x36041AD9,\n    (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x735F6626, (q31_t)0x376F9E46,\n    (q31_t)0x7307C3D0, (q31_t)0x382493B0, (q31_t)0x72AF05A6, (q31_t)0x38D8FE93,\n    (q31_t)0x72552C84, (q31_t)0x398CDD32, (q31_t)0x71FA3948, (q31_t)0x3A402DD1,\n    (q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x71410804, (q31_t)0x3BA51E29,\n    (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, (q31_t)0x708378FE, (q31_t)0x3D07C1D5,\n    (q31_t)0x70231099, (q31_t)0x3DB832A5, (q31_t)0x6FC19385, (q31_t)0x3E680B2C,\n    (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6EFB5F12, (q31_t)0x3FC5EC97,\n    (q31_t)0x6E96A99C, (q31_t)0x4073F21D, (q31_t)0x6E30E349, (q31_t)0x4121589A,\n    (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64, (q31_t)0x6D6227FA, (q31_t)0x427A41D0,\n    (q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C8F351C, (q31_t)0x43D09AEC,\n    (q31_t)0x6C242960, (q31_t)0x447ACD50, (q31_t)0x6BB812D0, (q31_t)0x452456BC,\n    (q31_t)0x6B4AF278, (q31_t)0x45CD358F, (q31_t)0x6ADCC964, (q31_t)0x46756827,\n    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x69FD614A, (q31_t)0x47C3C22E,\n    (q31_t)0x698C246C, (q31_t)0x4869E664, (q31_t)0x6919E320, (q31_t)0x490F57EE,\n    (q31_t)0x68A69E81, (q31_t)0x49B41533, (q31_t)0x683257AA, (q31_t)0x4A581C9D,\n    (q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x6746C7D7, (q31_t)0x4B9E038F,\n    (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3, (q31_t)0x66573CBB, (q31_t)0x4CE10034,\n    (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4, (q31_t)0x6563BF92, (q31_t)0x4E210617,\n    (q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x646C59BF, (q31_t)0x4F5E08E3,\n    (q31_t)0x63EF328F, (q31_t)0x4FFB654D, (q31_t)0x637114CC, (q31_t)0x5097FC5E,\n    (q31_t)0x62F201AC, (q31_t)0x5133CC94, (q31_t)0x6271FA69, (q31_t)0x51CED46E,\n    (q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x616F146B, (q31_t)0x53028517,\n    (q31_t)0x60EC3830, (q31_t)0x539B2AEF, (q31_t)0x60686CCE, (q31_t)0x5433027D,\n    (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A, (q31_t)0x5F5E0DB3, (q31_t)0x556040E2,\n    (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5E50015D, (q31_t)0x568A34A9,\n    (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9, (q31_t)0x5D3E5236, (q31_t)0x57B0D256,\n    (q31_t)0x5CB420DF, (q31_t)0x5842DD54, (q31_t)0x5C290ACC, (q31_t)0x58D40E8C,\n    (q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B1035CF, (q31_t)0x59F3DE12,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x59F3DE12, (q31_t)0x5B1035CF,\n    (q31_t)0x59646497, (q31_t)0x5B9D1153, (q31_t)0x58D40E8C, (q31_t)0x5C290ACC,\n    (q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x57B0D256, (q31_t)0x5D3E5236,\n    (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C, (q31_t)0x568A34A9, (q31_t)0x5E50015D,\n    (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89, (q31_t)0x556040E2, (q31_t)0x5F5E0DB3,\n    (q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x5433027D, (q31_t)0x60686CCE,\n    (q31_t)0x539B2AEF, (q31_t)0x60EC3830, (q31_t)0x53028517, (q31_t)0x616F146B,\n    (q31_t)0x5269126E, (q31_t)0x61F1003E, (q31_t)0x51CED46E, (q31_t)0x6271FA69,\n    (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x5097FC5E, (q31_t)0x637114CC,\n    (q31_t)0x4FFB654D, (q31_t)0x63EF328F, (q31_t)0x4F5E08E3, (q31_t)0x646C59BF,\n    (q31_t)0x4EBFE8A4, (q31_t)0x64E88926, (q31_t)0x4E210617, (q31_t)0x6563BF92,\n    (q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4CE10034, (q31_t)0x66573CBB,\n    (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F, (q31_t)0x4B9E038F, (q31_t)0x6746C7D7,\n    (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC, (q31_t)0x4A581C9D, (q31_t)0x683257AA,\n    (q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x490F57EE, (q31_t)0x6919E320,\n    (q31_t)0x4869E664, (q31_t)0x698C246C, (q31_t)0x47C3C22E, (q31_t)0x69FD614A,\n    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, (q31_t)0x46756827, (q31_t)0x6ADCC964,\n    (q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x452456BC, (q31_t)0x6BB812D0,\n    (q31_t)0x447ACD50, (q31_t)0x6C242960, (q31_t)0x43D09AEC, (q31_t)0x6C8F351C,\n    (q31_t)0x4325C135, (q31_t)0x6CF934FB, (q31_t)0x427A41D0, (q31_t)0x6D6227FA,\n    (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4121589A, (q31_t)0x6E30E349,\n    (q31_t)0x4073F21D, (q31_t)0x6E96A99C, (q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12,\n    (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1, (q31_t)0x3E680B2C, (q31_t)0x6FC19385,\n    (q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D07C1D5, (q31_t)0x708378FE,\n    (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, (q31_t)0x3BA51E29, (q31_t)0x71410804,\n    (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2, (q31_t)0x3A402DD1, (q31_t)0x71FA3948,\n    (q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x38D8FE93, (q31_t)0x72AF05A6,\n    (q31_t)0x382493B0, (q31_t)0x7307C3D0, (q31_t)0x376F9E46, (q31_t)0x735F6626,\n    (q31_t)0x36BA2013, (q31_t)0x73B5EBD0, (q31_t)0x36041AD9, (q31_t)0x740B53FA,\n    (q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x3496824F, (q31_t)0x74B2C883,\n    (q31_t)0x33DEF287, (q31_t)0x7504D345, (q31_t)0x3326E2C2, (q31_t)0x7555BD4B,\n    (q31_t)0x326E54C7, (q31_t)0x75A585CF, (q31_t)0x31B54A5D, (q31_t)0x75F42C0A,\n    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x3041C760, (q31_t)0x768E0EA5,\n    (q31_t)0x2F875262, (q31_t)0x76D94988, (q31_t)0x2ECC681E, (q31_t)0x77235F2D,\n    (q31_t)0x2E110A62, (q31_t)0x776C4EDB, (q31_t)0x2D553AFB, (q31_t)0x77B417DF,\n    (q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2BDC4E6F, (q31_t)0x78403328,\n    (q31_t)0x2B1F34EB, (q31_t)0x78848413, (q31_t)0x2A61B101, (q31_t)0x78C7ABA1,\n    (q31_t)0x29A3C484, (q31_t)0x7909A92C, (q31_t)0x28E5714A, (q31_t)0x794A7C11,\n    (q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27679DF4, (q31_t)0x79C89F6D,\n    (q31_t)0x26A82185, (q31_t)0x7A05EEAD, (q31_t)0x25E845B5, (q31_t)0x7A4210D8,\n    (q31_t)0x25280C5D, (q31_t)0x7A7D055B, (q31_t)0x24677757, (q31_t)0x7AB6CBA3,\n    (q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x22E541AE, (q31_t)0x7B26CB4F,\n    (q31_t)0x2223A4C5, (q31_t)0x7B5D039D, (q31_t)0x2161B39F, (q31_t)0x7B920B89,\n    (q31_t)0x209F701C, (q31_t)0x7BC5E28F, (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830,\n    (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1E56CA1E, (q31_t)0x7C5A3D4F,\n    (q31_t)0x1D934FE5, (q31_t)0x7C894BDD, (q31_t)0x1CCF8CB3, (q31_t)0x7CB72724,\n    (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1, (q31_t)0x1B4732EF, (q31_t)0x7D0F4218,\n    (q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x19BDCBF2, (q31_t)0x7D628AC5,\n    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, (q31_t)0x183366E8, (q31_t)0x7DB0FDF7,\n    (q31_t)0x176DD9DE, (q31_t)0x7DD6668E, (q31_t)0x16A81305, (q31_t)0x7DFA98A7,\n    (q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x151BDF85, (q31_t)0x7E3F57FE,\n    (q31_t)0x145576B1, (q31_t)0x7E5FE493, (q31_t)0x138EDBB0, (q31_t)0x7E7F3956,\n    (q31_t)0x12C8106E, (q31_t)0x7E9D55FC, (q31_t)0x120116D4, (q31_t)0x7EBA3A39,\n    (q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x1072A047, (q31_t)0x7EF0585F,\n    (q31_t)0x0FAB272B, (q31_t)0x7F0991C3, (q31_t)0x0EE38765, (q31_t)0x7F2191B4,\n    (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5, (q31_t)0x0D53DB92, (q31_t)0x7F4DE450,\n    (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0BC3AC35, (q31_t)0x7F754E7F,\n    (q31_t)0x0AFB6805, (q31_t)0x7F872BF3, (q31_t)0x0A3308BC, (q31_t)0x7F97CEBC,\n    (q31_t)0x096A9049, (q31_t)0x7FA736B4, (q31_t)0x08A2009A, (q31_t)0x7FB563B2,\n    (q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0710A344, (q31_t)0x7FCE0C3E,\n    (q31_t)0x0647D97C, (q31_t)0x7FD8878D, (q31_t)0x057F0034, (q31_t)0x7FE1C76B,\n    (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0, (q31_t)0x03ED26E6, (q31_t)0x7FF09477,\n    (q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x025B26D7, (q31_t)0x7FFA72D1,\n    (q31_t)0x01921D1F, (q31_t)0x7FFD885A, (q31_t)0x00C90F88, (q31_t)0x7FFF6216,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xFF36F078, (q31_t)0x7FFF6216,\n    (q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFDA4D928, (q31_t)0x7FFA72D1,\n    (q31_t)0xFCDBD541, (q31_t)0x7FF62182, (q31_t)0xFC12D919, (q31_t)0x7FF09477,\n    (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0, (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B,\n    (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF8EF5CBB, (q31_t)0x7FCE0C3E,\n    (q31_t)0xF826A461, (q31_t)0x7FC25596, (q31_t)0xF75DFF65, (q31_t)0x7FB563B2,\n    (q31_t)0xF6956FB6, (q31_t)0x7FA736B4, (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC,\n    (q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF43C53CA, (q31_t)0x7F754E7F,\n    (q31_t)0xF3742CA1, (q31_t)0x7F62368F, (q31_t)0xF2AC246D, (q31_t)0x7F4DE450,\n    (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5, (q31_t)0xF11C789A, (q31_t)0x7F2191B4,\n    (q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEF8D5FB8, (q31_t)0x7EF0585F,\n    (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6, (q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39,\n    (q31_t)0xED37EF91, (q31_t)0x7E9D55FC, (q31_t)0xEC71244F, (q31_t)0x7E7F3956,\n    (q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEAE4207A, (q31_t)0x7E3F57FE,\n    (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9, (q31_t)0xE957ECFB, (q31_t)0x7DFA98A7,\n    (q31_t)0xE8922621, (q31_t)0x7DD6668E, (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7,\n    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE642340D, (q31_t)0x7D628AC5,\n    (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC, (q31_t)0xE4B8CD10, (q31_t)0x7D0F4218,\n    (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1, (q31_t)0xE330734C, (q31_t)0x7CB72724,\n    (q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE1A935E1, (q31_t)0x7C5A3D4F,\n    (q31_t)0xE0E60684, (q31_t)0x7C29FBEE, (q31_t)0xE02323E5, (q31_t)0x7BF88830,\n    (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F, (q31_t)0xDE9E4C60, (q31_t)0x7B920B89,\n    (q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDD1ABE51, (q31_t)0x7B26CB4F,\n    (q31_t)0xDC597781, (q31_t)0x7AEF6323, (q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3,\n    (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B, (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8,\n    (q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD898620C, (q31_t)0x79C89F6D,\n    (q31_t)0xD7D946D7, (q31_t)0x798A23B1, (q31_t)0xD71A8EB5, (q31_t)0x794A7C11,\n    (q31_t)0xD65C3B7B, (q31_t)0x7909A92C, (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1,\n    (q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD423B190, (q31_t)0x78403328,\n    (q31_t)0xD3670445, (q31_t)0x77FAB988, (q31_t)0xD2AAC504, (q31_t)0x77B417DF,\n    (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB, (q31_t)0xD13397E1, (q31_t)0x77235F2D,\n    (q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xCFBE389F, (q31_t)0x768E0EA5,\n    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, (q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A,\n    (q31_t)0xCD91AB38, (q31_t)0x75A585CF, (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B,\n    (q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCB697DB0, (q31_t)0x74B2C883,\n    (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1, (q31_t)0xC9FBE527, (q31_t)0x740B53FA,\n    (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0, (q31_t)0xC89061BA, (q31_t)0x735F6626,\n    (q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC727016C, (q31_t)0x72AF05A6,\n    (q31_t)0xC67322CD, (q31_t)0x72552C84, (q31_t)0xC5BFD22E, (q31_t)0x71FA3948,\n    (q31_t)0xC50D1148, (q31_t)0x719E2CD2, (q31_t)0xC45AE1D7, (q31_t)0x71410804,\n    (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC2F83E2A, (q31_t)0x708378FE,\n    (q31_t)0xC247CD5A, (q31_t)0x70231099, (q31_t)0xC197F4D3, (q31_t)0x6FC19385,\n    (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1, (q31_t)0xC03A1368, (q31_t)0x6EFB5F12,\n    (q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBEDEA765, (q31_t)0x6E30E349,\n    (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14, (q31_t)0xBD85BE2F, (q31_t)0x6D6227FA,\n    (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB, (q31_t)0xBC2F6513, (q31_t)0x6C8F351C,\n    (q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBADBA943, (q31_t)0x6BB812D0,\n    (q31_t)0xBA32CA70, (q31_t)0x6B4AF278, (q31_t)0xB98A97D8, (q31_t)0x6ADCC964,\n    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, (q31_t)0xB83C3DD1, (q31_t)0x69FD614A,\n    (q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB6F0A811, (q31_t)0x6919E320,\n    (q31_t)0xB64BEACC, (q31_t)0x68A69E81, (q31_t)0xB5A7E362, (q31_t)0x683257AA,\n    (q31_t)0xB5049368, (q31_t)0x67BD0FBC, (q31_t)0xB461FC70, (q31_t)0x6746C7D7,\n    (q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB31EFFCB, (q31_t)0x66573CBB,\n    (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3, (q31_t)0xB1DEF9E8, (q31_t)0x6563BF92,\n    (q31_t)0xB140175B, (q31_t)0x64E88926, (q31_t)0xB0A1F71C, (q31_t)0x646C59BF,\n    (q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAF6803A1, (q31_t)0x637114CC,\n    (q31_t)0xAECC336B, (q31_t)0x62F201AC, (q31_t)0xAE312B91, (q31_t)0x6271FA69,\n    (q31_t)0xAD96ED91, (q31_t)0x61F1003E, (q31_t)0xACFD7AE8, (q31_t)0x616F146B,\n    (q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xABCCFD82, (q31_t)0x60686CCE,\n    (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D, (q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3,\n    (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89, (q31_t)0xA975CB56, (q31_t)0x5E50015D,\n    (q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA84F2DA9, (q31_t)0x5D3E5236,\n    (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF, (q31_t)0xA72BF173, (q31_t)0x5C290ACC,\n    (q31_t)0xA69B9B68, (q31_t)0x5B9D1153, (q31_t)0xA60C21ED, (q31_t)0x5B1035CF,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA4EFCA31, (q31_t)0x59F3DE12,\n    (q31_t)0xA462EEAC, (q31_t)0x59646497, (q31_t)0xA3D6F533, (q31_t)0x58D40E8C,\n    (q31_t)0xA34BDF20, (q31_t)0x5842DD54, (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256,\n    (q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1AFFEA2, (q31_t)0x568A34A9,\n    (q31_t)0xA1288376, (q31_t)0x55F5A4D2, (q31_t)0xA0A1F24C, (q31_t)0x556040E2,\n    (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A, (q31_t)0x9F979331, (q31_t)0x5433027D,\n    (q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E90EB94, (q31_t)0x53028517,\n    (q31_t)0x9E0EFFC1, (q31_t)0x5269126E, (q31_t)0x9D8E0596, (q31_t)0x51CED46E,\n    (q31_t)0x9D0DFE53, (q31_t)0x5133CC94, (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E,\n    (q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9B93A640, (q31_t)0x4F5E08E3,\n    (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4, (q31_t)0x9A9C406D, (q31_t)0x4E210617,\n    (q31_t)0x9A22042C, (q31_t)0x4D8162C4, (q31_t)0x99A8C344, (q31_t)0x4CE10034,\n    (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x98B93828, (q31_t)0x4B9E038F,\n    (q31_t)0x9842F043, (q31_t)0x4AFB6C97, (q31_t)0x97CDA855, (q31_t)0x4A581C9D,\n    (q31_t)0x9759617E, (q31_t)0x49B41533, (q31_t)0x96E61CDF, (q31_t)0x490F57EE,\n    (q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x96029EB5, (q31_t)0x47C3C22E,\n    (q31_t)0x9592675B, (q31_t)0x471CECE6, (q31_t)0x9523369B, (q31_t)0x46756827,\n    (q31_t)0x94B50D87, (q31_t)0x45CD358F, (q31_t)0x9447ED2F, (q31_t)0x452456BC,\n    (q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9370CAE4, (q31_t)0x43D09AEC,\n    (q31_t)0x9306CB04, (q31_t)0x4325C135, (q31_t)0x929DD805, (q31_t)0x427A41D0,\n    (q31_t)0x9235F2EB, (q31_t)0x41CE1E64, (q31_t)0x91CF1CB6, (q31_t)0x4121589A,\n    (q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x9104A0ED, (q31_t)0x3FC5EC97,\n    (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7, (q31_t)0x903E6C7A, (q31_t)0x3E680B2C,\n    (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5, (q31_t)0x8F7C8701, (q31_t)0x3D07C1D5,\n    (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8EBEF7FB, (q31_t)0x3BA51E29,\n    (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7, (q31_t)0x8E05C6B7, (q31_t)0x3A402DD1,\n    (q31_t)0x8DAAD37B, (q31_t)0x398CDD32, (q31_t)0x8D50FA59, (q31_t)0x38D8FE93,\n    (q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CA099D9, (q31_t)0x376F9E46,\n    (q31_t)0x8C4A142F, (q31_t)0x36BA2013, (q31_t)0x8BF4AC05, (q31_t)0x36041AD9,\n    (q31_t)0x8BA0622F, (q31_t)0x354D9056, (q31_t)0x8B4D377C, (q31_t)0x3496824F,\n    (q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AAA42B4, (q31_t)0x3326E2C2,\n    (q31_t)0x8A5A7A30, (q31_t)0x326E54C7, (q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D,\n    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, (q31_t)0x8971F15A, (q31_t)0x3041C760,\n    (q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x88DCA0D3, (q31_t)0x2ECC681E,\n    (q31_t)0x8893B124, (q31_t)0x2E110A62, (q31_t)0x884BE820, (q31_t)0x2D553AFB,\n    (q31_t)0x88054677, (q31_t)0x2C98FBBA, (q31_t)0x87BFCCD7, (q31_t)0x2BDC4E6F,\n    (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8738545E, (q31_t)0x2A61B101,\n    (q31_t)0x86F656D3, (q31_t)0x29A3C484, (q31_t)0x86B583EE, (q31_t)0x28E5714A,\n    (q31_t)0x8675DC4E, (q31_t)0x2826B928, (q31_t)0x86376092, (q31_t)0x27679DF4,\n    (q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85BDEF27, (q31_t)0x25E845B5,\n    (q31_t)0x8582FAA4, (q31_t)0x25280C5D, (q31_t)0x8549345C, (q31_t)0x24677757,\n    (q31_t)0x85109CDC, (q31_t)0x23A6887E, (q31_t)0x84D934B0, (q31_t)0x22E541AE,\n    (q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x846DF476, (q31_t)0x2161B39F,\n    (q31_t)0x843A1D70, (q31_t)0x209F701C, (q31_t)0x840777CF, (q31_t)0x1FDCDC1A,\n    (q31_t)0x83D60411, (q31_t)0x1F19F97B, (q31_t)0x83A5C2B0, (q31_t)0x1E56CA1E,\n    (q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x8348D8DB, (q31_t)0x1CCF8CB3,\n    (q31_t)0x831C314E, (q31_t)0x1C0B826A, (q31_t)0x82F0BDE8, (q31_t)0x1B4732EF,\n    (q31_t)0x82C67F13, (q31_t)0x1A82A025, (q31_t)0x829D753A, (q31_t)0x19BDCBF2,\n    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x824F0208, (q31_t)0x183366E8,\n    (q31_t)0x82299971, (q31_t)0x176DD9DE, (q31_t)0x82056758, (q31_t)0x16A81305,\n    (q31_t)0x81E26C16, (q31_t)0x15E21444, (q31_t)0x81C0A801, (q31_t)0x151BDF85,\n    (q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x8180C6A9, (q31_t)0x138EDBB0,\n    (q31_t)0x8162AA03, (q31_t)0x12C8106E, (q31_t)0x8145C5C6, (q31_t)0x120116D4,\n    (q31_t)0x812A1A39, (q31_t)0x1139F0CE, (q31_t)0x810FA7A0, (q31_t)0x1072A047,\n    (q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80DE6E4C, (q31_t)0x0EE38765,\n    (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3, (q31_t)0x80B21BAF, (q31_t)0x0D53DB92,\n    (q31_t)0x809DC970, (q31_t)0x0C8BD35E, (q31_t)0x808AB180, (q31_t)0x0BC3AC35,\n    (q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80683143, (q31_t)0x0A3308BC,\n    (q31_t)0x8058C94C, (q31_t)0x096A9049, (q31_t)0x804A9C4D, (q31_t)0x08A2009A,\n    (q31_t)0x803DAA69, (q31_t)0x07D95B9E, (q31_t)0x8031F3C1, (q31_t)0x0710A344,\n    (q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x801E3894, (q31_t)0x057F0034,\n    (q31_t)0x80163440, (q31_t)0x04B6195D, (q31_t)0x800F6B88, (q31_t)0x03ED26E6,\n    (q31_t)0x8009DE7D, (q31_t)0x03242ABF, (q31_t)0x80058D2E, (q31_t)0x025B26D7,\n    (q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x80009DE9, (q31_t)0x00C90F88,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x80009DE9, (q31_t)0xFF36F078,\n    (q31_t)0x800277A5, (q31_t)0xFE6DE2E0, (q31_t)0x80058D2E, (q31_t)0xFDA4D928,\n    (q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800F6B88, (q31_t)0xFC12D919,\n    (q31_t)0x80163440, (q31_t)0xFB49E6A2, (q31_t)0x801E3894, (q31_t)0xFA80FFCB,\n    (q31_t)0x80277872, (q31_t)0xF9B82683, (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB,\n    (q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x804A9C4D, (q31_t)0xF75DFF65,\n    (q31_t)0x8058C94C, (q31_t)0xF6956FB6, (q31_t)0x80683143, (q31_t)0xF5CCF743,\n    (q31_t)0x8078D40D, (q31_t)0xF50497FA, (q31_t)0x808AB180, (q31_t)0xF43C53CA,\n    (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80B21BAF, (q31_t)0xF2AC246D,\n    (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C, (q31_t)0x80DE6E4C, (q31_t)0xF11C789A,\n    (q31_t)0x80F66E3C, (q31_t)0xF054D8D4, (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8,\n    (q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8145C5C6, (q31_t)0xEDFEE92B,\n    (q31_t)0x8162AA03, (q31_t)0xED37EF91, (q31_t)0x8180C6A9, (q31_t)0xEC71244F,\n    (q31_t)0x81A01B6C, (q31_t)0xEBAA894E, (q31_t)0x81C0A801, (q31_t)0xEAE4207A,\n    (q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82056758, (q31_t)0xE957ECFB,\n    (q31_t)0x82299971, (q31_t)0xE8922621, (q31_t)0x824F0208, (q31_t)0xE7CC9917,\n    (q31_t)0x8275A0C0, (q31_t)0xE70747C3, (q31_t)0x829D753A, (q31_t)0xE642340D,\n    (q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82F0BDE8, (q31_t)0xE4B8CD10,\n    (q31_t)0x831C314E, (q31_t)0xE3F47D95, (q31_t)0x8348D8DB, (q31_t)0xE330734C,\n    (q31_t)0x8376B422, (q31_t)0xE26CB01A, (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1,\n    (q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x840777CF, (q31_t)0xE02323E5,\n    (q31_t)0x843A1D70, (q31_t)0xDF608FE3, (q31_t)0x846DF476, (q31_t)0xDE9E4C60,\n    (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A, (q31_t)0x84D934B0, (q31_t)0xDD1ABE51,\n    (q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x8549345C, (q31_t)0xDB9888A8,\n    (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2, (q31_t)0x85BDEF27, (q31_t)0xDA17BA4A,\n    (q31_t)0x85FA1152, (q31_t)0xD957DE7A, (q31_t)0x86376092, (q31_t)0xD898620C,\n    (q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86B583EE, (q31_t)0xD71A8EB5,\n    (q31_t)0x86F656D3, (q31_t)0xD65C3B7B, (q31_t)0x8738545E, (q31_t)0xD59E4EFE,\n    (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14, (q31_t)0x87BFCCD7, (q31_t)0xD423B190,\n    (q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x884BE820, (q31_t)0xD2AAC504,\n    (q31_t)0x8893B124, (q31_t)0xD1EEF59E, (q31_t)0x88DCA0D3, (q31_t)0xD13397E1,\n    (q31_t)0x8926B677, (q31_t)0xD078AD9D, (q31_t)0x8971F15A, (q31_t)0xCFBE389F,\n    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A0BD3F5, (q31_t)0xCE4AB5A2,\n    (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38, (q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D,\n    (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78, (q31_t)0x8B4D377C, (q31_t)0xCB697DB0,\n    (q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BF4AC05, (q31_t)0xC9FBE527,\n    (q31_t)0x8C4A142F, (q31_t)0xC945DFEC, (q31_t)0x8CA099D9, (q31_t)0xC89061BA,\n    (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50, (q31_t)0x8D50FA59, (q31_t)0xC727016C,\n    (q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E05C6B7, (q31_t)0xC5BFD22E,\n    (q31_t)0x8E61D32D, (q31_t)0xC50D1148, (q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7,\n    (q31_t)0x8F1D343A, (q31_t)0xC3A9458F, (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A,\n    (q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x903E6C7A, (q31_t)0xC197F4D3,\n    (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648, (q31_t)0x9104A0ED, (q31_t)0xC03A1368,\n    (q31_t)0x91695663, (q31_t)0xBF8C0DE2, (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765,\n    (q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x929DD805, (q31_t)0xBD85BE2F,\n    (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA, (q31_t)0x9370CAE4, (q31_t)0xBC2F6513,\n    (q31_t)0x93DBD69F, (q31_t)0xBB8532AF, (q31_t)0x9447ED2F, (q31_t)0xBADBA943,\n    (q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x9523369B, (q31_t)0xB98A97D8,\n    (q31_t)0x9592675B, (q31_t)0xB8E31319, (q31_t)0x96029EB5, (q31_t)0xB83C3DD1,\n    (q31_t)0x9673DB94, (q31_t)0xB796199B, (q31_t)0x96E61CDF, (q31_t)0xB6F0A811,\n    (q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x97CDA855, (q31_t)0xB5A7E362,\n    (q31_t)0x9842F043, (q31_t)0xB5049368, (q31_t)0x98B93828, (q31_t)0xB461FC70,\n    (q31_t)0x99307EE0, (q31_t)0xB3C0200C, (q31_t)0x99A8C344, (q31_t)0xB31EFFCB,\n    (q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A9C406D, (q31_t)0xB1DEF9E8,\n    (q31_t)0x9B1776D9, (q31_t)0xB140175B, (q31_t)0x9B93A640, (q31_t)0xB0A1F71C,\n    (q31_t)0x9C10CD70, (q31_t)0xB0049AB2, (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1,\n    (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D8E0596, (q31_t)0xAE312B91,\n    (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91, (q31_t)0x9E90EB94, (q31_t)0xACFD7AE8,\n    (q31_t)0x9F13C7D0, (q31_t)0xAC64D510, (q31_t)0x9F979331, (q31_t)0xABCCFD82,\n    (q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA0A1F24C, (q31_t)0xAA9FBF1D,\n    (q31_t)0xA1288376, (q31_t)0xAA0A5B2D, (q31_t)0xA1AFFEA2, (q31_t)0xA975CB56,\n    (q31_t)0xA2386283, (q31_t)0xA8E21106, (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9,\n    (q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3D6F533, (q31_t)0xA72BF173,\n    (q31_t)0xA462EEAC, (q31_t)0xA69B9B68, (q31_t)0xA4EFCA31, (q31_t)0xA60C21ED,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31,\n    (q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA72BF173, (q31_t)0xA3D6F533,\n    (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20, (q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9,\n    (q31_t)0xA8E21106, (q31_t)0xA2386283, (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2,\n    (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA9FBF1D, (q31_t)0xA0A1F24C,\n    (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72, (q31_t)0xABCCFD82, (q31_t)0x9F979331,\n    (q31_t)0xAC64D510, (q31_t)0x9F13C7D0, (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94,\n    (q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xAE312B91, (q31_t)0x9D8E0596,\n    (q31_t)0xAECC336B, (q31_t)0x9D0DFE53, (q31_t)0xAF6803A1, (q31_t)0x9C8EEB33,\n    (q31_t)0xB0049AB2, (q31_t)0x9C10CD70, (q31_t)0xB0A1F71C, (q31_t)0x9B93A640,\n    (q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB1DEF9E8, (q31_t)0x9A9C406D,\n    (q31_t)0xB27E9D3B, (q31_t)0x9A22042C, (q31_t)0xB31EFFCB, (q31_t)0x99A8C344,\n    (q31_t)0xB3C0200C, (q31_t)0x99307EE0, (q31_t)0xB461FC70, (q31_t)0x98B93828,\n    (q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB5A7E362, (q31_t)0x97CDA855,\n    (q31_t)0xB64BEACC, (q31_t)0x9759617E, (q31_t)0xB6F0A811, (q31_t)0x96E61CDF,\n    (q31_t)0xB796199B, (q31_t)0x9673DB94, (q31_t)0xB83C3DD1, (q31_t)0x96029EB5,\n    (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB98A97D8, (q31_t)0x9523369B,\n    (q31_t)0xBA32CA70, (q31_t)0x94B50D87, (q31_t)0xBADBA943, (q31_t)0x9447ED2F,\n    (q31_t)0xBB8532AF, (q31_t)0x93DBD69F, (q31_t)0xBC2F6513, (q31_t)0x9370CAE4,\n    (q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD85BE2F, (q31_t)0x929DD805,\n    (q31_t)0xBE31E19B, (q31_t)0x9235F2EB, (q31_t)0xBEDEA765, (q31_t)0x91CF1CB6,\n    (q31_t)0xBF8C0DE2, (q31_t)0x91695663, (q31_t)0xC03A1368, (q31_t)0x9104A0ED,\n    (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC197F4D3, (q31_t)0x903E6C7A,\n    (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66, (q31_t)0xC2F83E2A, (q31_t)0x8F7C8701,\n    (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB,\n    (q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5BFD22E, (q31_t)0x8E05C6B7,\n    (q31_t)0xC67322CD, (q31_t)0x8DAAD37B, (q31_t)0xC727016C, (q31_t)0x8D50FA59,\n    (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30, (q31_t)0xC89061BA, (q31_t)0x8CA099D9,\n    (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9FBE527, (q31_t)0x8BF4AC05,\n    (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F, (q31_t)0xCB697DB0, (q31_t)0x8B4D377C,\n    (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA, (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4,\n    (q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCE4AB5A2, (q31_t)0x8A0BD3F5,\n    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, (q31_t)0xCFBE389F, (q31_t)0x8971F15A,\n    (q31_t)0xD078AD9D, (q31_t)0x8926B677, (q31_t)0xD13397E1, (q31_t)0x88DCA0D3,\n    (q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD2AAC504, (q31_t)0x884BE820,\n    (q31_t)0xD3670445, (q31_t)0x88054677, (q31_t)0xD423B190, (q31_t)0x87BFCCD7,\n    (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC, (q31_t)0xD59E4EFE, (q31_t)0x8738545E,\n    (q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD71A8EB5, (q31_t)0x86B583EE,\n    (q31_t)0xD7D946D7, (q31_t)0x8675DC4E, (q31_t)0xD898620C, (q31_t)0x86376092,\n    (q31_t)0xD957DE7A, (q31_t)0x85FA1152, (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27,\n    (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB9888A8, (q31_t)0x8549345C,\n    (q31_t)0xDC597781, (q31_t)0x85109CDC, (q31_t)0xDD1ABE51, (q31_t)0x84D934B0,\n    (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62, (q31_t)0xDE9E4C60, (q31_t)0x846DF476,\n    (q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE02323E5, (q31_t)0x840777CF,\n    (q31_t)0xE0E60684, (q31_t)0x83D60411, (q31_t)0xE1A935E1, (q31_t)0x83A5C2B0,\n    (q31_t)0xE26CB01A, (q31_t)0x8376B422, (q31_t)0xE330734C, (q31_t)0x8348D8DB,\n    (q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4B8CD10, (q31_t)0x82F0BDE8,\n    (q31_t)0xE57D5FDA, (q31_t)0x82C67F13, (q31_t)0xE642340D, (q31_t)0x829D753A,\n    (q31_t)0xE70747C3, (q31_t)0x8275A0C0, (q31_t)0xE7CC9917, (q31_t)0x824F0208,\n    (q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE957ECFB, (q31_t)0x82056758,\n    (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16, (q31_t)0xEAE4207A, (q31_t)0x81C0A801,\n    (q31_t)0xEBAA894E, (q31_t)0x81A01B6C, (q31_t)0xEC71244F, (q31_t)0x8180C6A9,\n    (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEDFEE92B, (q31_t)0x8145C5C6,\n    (q31_t)0xEEC60F31, (q31_t)0x812A1A39, (q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0,\n    (q31_t)0xF054D8D4, (q31_t)0x80F66E3C, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C,\n    (q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2AC246D, (q31_t)0x80B21BAF,\n    (q31_t)0xF3742CA1, (q31_t)0x809DC970, (q31_t)0xF43C53CA, (q31_t)0x808AB180,\n    (q31_t)0xF50497FA, (q31_t)0x8078D40D, (q31_t)0xF5CCF743, (q31_t)0x80683143,\n    (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF75DFF65, (q31_t)0x804A9C4D,\n    (q31_t)0xF826A461, (q31_t)0x803DAA69, (q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1,\n    (q31_t)0xF9B82683, (q31_t)0x80277872, (q31_t)0xFA80FFCB, (q31_t)0x801E3894,\n    (q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFC12D919, (q31_t)0x800F6B88,\n    (q31_t)0xFCDBD541, (q31_t)0x8009DE7D, (q31_t)0xFDA4D928, (q31_t)0x80058D2E,\n    (q31_t)0xFE6DE2E0, (q31_t)0x800277A5, (q31_t)0xFF36F078, (q31_t)0x80009DE9};\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 2048, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n */\nconst q31_t twiddleCoef_2048_q31[3072] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFD885, (q31_t)0x006487E3,\n    (q31_t)0x7FFF6216, (q31_t)0x00C90F88, (q31_t)0x7FFE9CB2, (q31_t)0x012D96B0,\n    (q31_t)0x7FFD885A, (q31_t)0x01921D1F, (q31_t)0x7FFC250F, (q31_t)0x01F6A296,\n    (q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF871A1, (q31_t)0x02BFA9A4,\n    (q31_t)0x7FF62182, (q31_t)0x03242ABF, (q31_t)0x7FF38273, (q31_t)0x0388A9E9,\n    (q31_t)0x7FF09477, (q31_t)0x03ED26E6, (q31_t)0x7FED5790, (q31_t)0x0451A176,\n    (q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE5F108, (q31_t)0x051A8E5C,\n    (q31_t)0x7FE1C76B, (q31_t)0x057F0034, (q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9,\n    (q31_t)0x7FD8878D, (q31_t)0x0647D97C, (q31_t)0x7FD37152, (q31_t)0x06AC406F,\n    (q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC85853, (q31_t)0x077501BE,\n    (q31_t)0x7FC25596, (q31_t)0x07D95B9E, (q31_t)0x7FBC040A, (q31_t)0x083DB0A7,\n    (q31_t)0x7FB563B2, (q31_t)0x08A2009A, (q31_t)0x7FAE7494, (q31_t)0x09064B3A,\n    (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F9FAA15, (q31_t)0x09CECF89,\n    (q31_t)0x7F97CEBC, (q31_t)0x0A3308BC, (q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5,\n    (q31_t)0x7F872BF3, (q31_t)0x0AFB6805, (q31_t)0x7F7E648B, (q31_t)0x0B5F8D9F,\n    (q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F6BE9D4, (q31_t)0x0C27C389,\n    (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, (q31_t)0x7F5834B6, (q31_t)0x0CEFDB75,\n    (q31_t)0x7F4DE450, (q31_t)0x0D53DB92, (q31_t)0x7F434563, (q31_t)0x0DB7D376,\n    (q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2D1C0E, (q31_t)0x0E7FA99D,\n    (q31_t)0x7F2191B4, (q31_t)0x0EE38765, (q31_t)0x7F15B8EE, (q31_t)0x0F475BFE,\n    (q31_t)0x7F0991C3, (q31_t)0x0FAB272B, (q31_t)0x7EFD1C3C, (q31_t)0x100EE8AD,\n    (q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE34635, (q31_t)0x10D64DBC,\n    (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE, (q31_t)0x7EC8371A, (q31_t)0x119D8940,\n    (q31_t)0x7EBA3A39, (q31_t)0x120116D4, (q31_t)0x7EABEF2C, (q31_t)0x1264994E,\n    (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E8E6EB1, (q31_t)0x132B7BF9,\n    (q31_t)0x7E7F3956, (q31_t)0x138EDBB0, (q31_t)0x7E6FB5F3, (q31_t)0x13F22F57,\n    (q31_t)0x7E5FE493, (q31_t)0x145576B1, (q31_t)0x7E4FC53E, (q31_t)0x14B8B17F,\n    (q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E2E9CDF, (q31_t)0x157F0086,\n    (q31_t)0x7E1D93E9, (q31_t)0x15E21444, (q31_t)0x7E0C3D29, (q31_t)0x16451A83,\n    (q31_t)0x7DFA98A7, (q31_t)0x16A81305, (q31_t)0x7DE8A670, (q31_t)0x170AFD8D,\n    (q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DC3D90D, (q31_t)0x17D0A7BB,\n    (q31_t)0x7DB0FDF7, (q31_t)0x183366E8, (q31_t)0x7D9DD55A, (q31_t)0x18961727,\n    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, (q31_t)0x7D769BB5, (q31_t)0x195B49E9,\n    (q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D4E2C7E, (q31_t)0x1A203E1B,\n    (q31_t)0x7D3980EC, (q31_t)0x1A82A025, (q31_t)0x7D24881A, (q31_t)0x1AE4F1D6,\n    (q31_t)0x7D0F4218, (q31_t)0x1B4732EF, (q31_t)0x7CF9AEF0, (q31_t)0x1BA96334,\n    (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CCDA168, (q31_t)0x1C6D9053,\n    (q31_t)0x7CB72724, (q31_t)0x1CCF8CB3, (q31_t)0x7CA05FF1, (q31_t)0x1D31774D,\n    (q31_t)0x7C894BDD, (q31_t)0x1D934FE5, (q31_t)0x7C71EAF8, (q31_t)0x1DF5163F,\n    (q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4242F2, (q31_t)0x1EB86B46,\n    (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B, (q31_t)0x7C116853, (q31_t)0x1F7B7480,\n    (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A, (q31_t)0x7BDF5B94, (q31_t)0x203E300D,\n    (q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7BAC1D31, (q31_t)0x21009C0B,\n    (q31_t)0x7B920B89, (q31_t)0x2161B39F, (q31_t)0x7B77ADA8, (q31_t)0x21C2B69C,\n    (q31_t)0x7B5D039D, (q31_t)0x2223A4C5, (q31_t)0x7B420D7A, (q31_t)0x22847DDF,\n    (q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7B0B3D2C, (q31_t)0x2345EFF7,\n    (q31_t)0x7AEF6323, (q31_t)0x23A6887E, (q31_t)0x7AD33D45, (q31_t)0x24070B07,\n    (q31_t)0x7AB6CBA3, (q31_t)0x24677757, (q31_t)0x7A9A0E4F, (q31_t)0x24C7CD32,\n    (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A5FB0D8, (q31_t)0x2588349D,\n    (q31_t)0x7A4210D8, (q31_t)0x25E845B5, (q31_t)0x7A24256E, (q31_t)0x26483F6C,\n    (q31_t)0x7A05EEAD, (q31_t)0x26A82185, (q31_t)0x79E76CA6, (q31_t)0x2707EBC6,\n    (q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x79A98715, (q31_t)0x27C737D2,\n    (q31_t)0x798A23B1, (q31_t)0x2826B928, (q31_t)0x796A7554, (q31_t)0x288621B9,\n    (q31_t)0x794A7C11, (q31_t)0x28E5714A, (q31_t)0x792A37FE, (q31_t)0x2944A7A2,\n    (q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78E8CFB1, (q31_t)0x2A02C7B8,\n    (q31_t)0x78C7ABA1, (q31_t)0x2A61B101, (q31_t)0x78A63D10, (q31_t)0x2AC08025,\n    (q31_t)0x78848413, (q31_t)0x2B1F34EB, (q31_t)0x786280BF, (q31_t)0x2B7DCF17,\n    (q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x781D9B64, (q31_t)0x2C3AB2B9,\n    (q31_t)0x77FAB988, (q31_t)0x2C98FBBA, (q31_t)0x77D78DAA, (q31_t)0x2CF72939,\n    (q31_t)0x77B417DF, (q31_t)0x2D553AFB, (q31_t)0x7790583D, (q31_t)0x2DB330C7,\n    (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x7747FBCE, (q31_t)0x2E6EC792,\n    (q31_t)0x77235F2D, (q31_t)0x2ECC681E, (q31_t)0x76FE790E, (q31_t)0x2F29EBCC,\n    (q31_t)0x76D94988, (q31_t)0x2F875262, (q31_t)0x76B3D0B3, (q31_t)0x2FE49BA6,\n    (q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x76680376, (q31_t)0x309ED555,\n    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, (q31_t)0x761B1211, (q31_t)0x3158970D,\n    (q31_t)0x75F42C0A, (q31_t)0x31B54A5D, (q31_t)0x75CCFD42, (q31_t)0x3211DF03,\n    (q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x757DC5CA, (q31_t)0x32CAAB6F,\n    (q31_t)0x7555BD4B, (q31_t)0x3326E2C2, (q31_t)0x752D6C6C, (q31_t)0x3382FA88,\n    (q31_t)0x7504D345, (q31_t)0x33DEF287, (q31_t)0x74DBF1EF, (q31_t)0x343ACA87,\n    (q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x7489571B, (q31_t)0x34F219A7,\n    (q31_t)0x745F9DD1, (q31_t)0x354D9056, (q31_t)0x74359CBD, (q31_t)0x35A8E624,\n    (q31_t)0x740B53FA, (q31_t)0x36041AD9, (q31_t)0x73E0C3A3, (q31_t)0x365F2E3B,\n    (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x738ACC9E, (q31_t)0x3714F02A,\n    (q31_t)0x735F6626, (q31_t)0x376F9E46, (q31_t)0x7333B883, (q31_t)0x37CA2A30,\n    (q31_t)0x7307C3D0, (q31_t)0x382493B0, (q31_t)0x72DB8828, (q31_t)0x387EDA8E,\n    (q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x72823C66, (q31_t)0x3932FF87,\n    (q31_t)0x72552C84, (q31_t)0x398CDD32, (q31_t)0x7227D61C, (q31_t)0x39E6975D,\n    (q31_t)0x71FA3948, (q31_t)0x3A402DD1, (q31_t)0x71CC5626, (q31_t)0x3A99A057,\n    (q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x716FBD68, (q31_t)0x3B4C18BA,\n    (q31_t)0x71410804, (q31_t)0x3BA51E29, (q31_t)0x71120CC5, (q31_t)0x3BFDFECD,\n    (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, (q31_t)0x70B34524, (q31_t)0x3CAF50DA,\n    (q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x70536771, (q31_t)0x3D600D2B,\n    (q31_t)0x70231099, (q31_t)0x3DB832A5, (q31_t)0x6FF27496, (q31_t)0x3E10320D,\n    (q31_t)0x6FC19385, (q31_t)0x3E680B2C, (q31_t)0x6F906D84, (q31_t)0x3EBFBDCC,\n    (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6F2D532C, (q31_t)0x3F6EAEB8,\n    (q31_t)0x6EFB5F12, (q31_t)0x3FC5EC97, (q31_t)0x6EC92682, (q31_t)0x401D0320,\n    (q31_t)0x6E96A99C, (q31_t)0x4073F21D, (q31_t)0x6E63E87F, (q31_t)0x40CAB957,\n    (q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6DFD9A1B, (q31_t)0x4177CFB0,\n    (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64, (q31_t)0x6D963C54, (q31_t)0x42244480,\n    (q31_t)0x6D6227FA, (q31_t)0x427A41D0, (q31_t)0x6D2DD027, (q31_t)0x42D0161E,\n    (q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6CC45697, (q31_t)0x437B42E1,\n    (q31_t)0x6C8F351C, (q31_t)0x43D09AEC, (q31_t)0x6C59D0A9, (q31_t)0x4425C923,\n    (q31_t)0x6C242960, (q31_t)0x447ACD50, (q31_t)0x6BEE3F62, (q31_t)0x44CFA73F,\n    (q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B81A3CD, (q31_t)0x4578DB93,\n    (q31_t)0x6B4AF278, (q31_t)0x45CD358F, (q31_t)0x6B13FEF5, (q31_t)0x4621647C,\n    (q31_t)0x6ADCC964, (q31_t)0x46756827, (q31_t)0x6AA551E8, (q31_t)0x46C9405C,\n    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x6A359DB9, (q31_t)0x47706D93,\n    (q31_t)0x69FD614A, (q31_t)0x47C3C22E, (q31_t)0x69C4E37A, (q31_t)0x4816EA85,\n    (q31_t)0x698C246C, (q31_t)0x4869E664, (q31_t)0x69532442, (q31_t)0x48BCB598,\n    (q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68E06129, (q31_t)0x4961CD32,\n    (q31_t)0x68A69E81, (q31_t)0x49B41533, (q31_t)0x686C9B4B, (q31_t)0x4A062FBD,\n    (q31_t)0x683257AA, (q31_t)0x4A581C9D, (q31_t)0x67F7D3C4, (q31_t)0x4AA9DBA1,\n    (q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x67820BB6, (q31_t)0x4B4CCF4D,\n    (q31_t)0x6746C7D7, (q31_t)0x4B9E038F, (q31_t)0x670B4443, (q31_t)0x4BEF092D,\n    (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3, (q31_t)0x66937E90, (q31_t)0x4C9087B1,\n    (q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x661ABBC5, (q31_t)0x4D31494B,\n    (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4, (q31_t)0x65A0FD0B, (q31_t)0x4DD14C6E,\n    (q31_t)0x6563BF92, (q31_t)0x4E210617, (q31_t)0x6526438E, (q31_t)0x4E708F8F,\n    (q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x64AA907F, (q31_t)0x4F0F1126,\n    (q31_t)0x646C59BF, (q31_t)0x4F5E08E3, (q31_t)0x642DE50D, (q31_t)0x4FACCFAB,\n    (q31_t)0x63EF328F, (q31_t)0x4FFB654D, (q31_t)0x63B0426D, (q31_t)0x5049C999,\n    (q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x6331A9D4, (q31_t)0x50E5FD6C,\n    (q31_t)0x62F201AC, (q31_t)0x5133CC94, (q31_t)0x62B21C7B, (q31_t)0x518169A4,\n    (q31_t)0x6271FA69, (q31_t)0x51CED46E, (q31_t)0x62319B9D, (q31_t)0x521C0CC1,\n    (q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x61B02876, (q31_t)0x52B5E545,\n    (q31_t)0x616F146B, (q31_t)0x53028517, (q31_t)0x612DC446, (q31_t)0x534EF1B5,\n    (q31_t)0x60EC3830, (q31_t)0x539B2AEF, (q31_t)0x60AA704F, (q31_t)0x53E73097,\n    (q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x60262DD5, (q31_t)0x547EA073,\n    (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A, (q31_t)0x5FA0FE1E, (q31_t)0x55153FD4,\n    (q31_t)0x5F5E0DB3, (q31_t)0x556040E2, (q31_t)0x5F1AE273, (q31_t)0x55AB0D46,\n    (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5E93DC1F, (q31_t)0x56400757,\n    (q31_t)0x5E50015D, (q31_t)0x568A34A9, (q31_t)0x5E0BEC6E, (q31_t)0x56D42C99,\n    (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9, (q31_t)0x5D8314B0, (q31_t)0x57677B9D,\n    (q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5CF95638, (q31_t)0x57F9F2F7,\n    (q31_t)0x5CB420DF, (q31_t)0x5842DD54, (q31_t)0x5C6EB258, (q31_t)0x588B913F,\n    (q31_t)0x5C290ACC, (q31_t)0x58D40E8C, (q31_t)0x5BE32A67, (q31_t)0x591C550E,\n    (q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B56BFBD, (q31_t)0x59AC3CFD,\n    (q31_t)0x5B1035CF, (q31_t)0x59F3DE12, (q31_t)0x5AC973B4, (q31_t)0x5A3B47AA,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x5A3B47AA, (q31_t)0x5AC973B4,\n    (q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59AC3CFD, (q31_t)0x5B56BFBD,\n    (q31_t)0x59646497, (q31_t)0x5B9D1153, (q31_t)0x591C550E, (q31_t)0x5BE32A67,\n    (q31_t)0x58D40E8C, (q31_t)0x5C290ACC, (q31_t)0x588B913F, (q31_t)0x5C6EB258,\n    (q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x57F9F2F7, (q31_t)0x5CF95638,\n    (q31_t)0x57B0D256, (q31_t)0x5D3E5236, (q31_t)0x57677B9D, (q31_t)0x5D8314B0,\n    (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C, (q31_t)0x56D42C99, (q31_t)0x5E0BEC6E,\n    (q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x56400757, (q31_t)0x5E93DC1F,\n    (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89, (q31_t)0x55AB0D46, (q31_t)0x5F1AE273,\n    (q31_t)0x556040E2, (q31_t)0x5F5E0DB3, (q31_t)0x55153FD4, (q31_t)0x5FA0FE1E,\n    (q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x547EA073, (q31_t)0x60262DD5,\n    (q31_t)0x5433027D, (q31_t)0x60686CCE, (q31_t)0x53E73097, (q31_t)0x60AA704F,\n    (q31_t)0x539B2AEF, (q31_t)0x60EC3830, (q31_t)0x534EF1B5, (q31_t)0x612DC446,\n    (q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x52B5E545, (q31_t)0x61B02876,\n    (q31_t)0x5269126E, (q31_t)0x61F1003E, (q31_t)0x521C0CC1, (q31_t)0x62319B9D,\n    (q31_t)0x51CED46E, (q31_t)0x6271FA69, (q31_t)0x518169A4, (q31_t)0x62B21C7B,\n    (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x50E5FD6C, (q31_t)0x6331A9D4,\n    (q31_t)0x5097FC5E, (q31_t)0x637114CC, (q31_t)0x5049C999, (q31_t)0x63B0426D,\n    (q31_t)0x4FFB654D, (q31_t)0x63EF328F, (q31_t)0x4FACCFAB, (q31_t)0x642DE50D,\n    (q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4F0F1126, (q31_t)0x64AA907F,\n    (q31_t)0x4EBFE8A4, (q31_t)0x64E88926, (q31_t)0x4E708F8F, (q31_t)0x6526438E,\n    (q31_t)0x4E210617, (q31_t)0x6563BF92, (q31_t)0x4DD14C6E, (q31_t)0x65A0FD0B,\n    (q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4D31494B, (q31_t)0x661ABBC5,\n    (q31_t)0x4CE10034, (q31_t)0x66573CBB, (q31_t)0x4C9087B1, (q31_t)0x66937E90,\n    (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F, (q31_t)0x4BEF092D, (q31_t)0x670B4443,\n    (q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4B4CCF4D, (q31_t)0x67820BB6,\n    (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC, (q31_t)0x4AA9DBA1, (q31_t)0x67F7D3C4,\n    (q31_t)0x4A581C9D, (q31_t)0x683257AA, (q31_t)0x4A062FBD, (q31_t)0x686C9B4B,\n    (q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x4961CD32, (q31_t)0x68E06129,\n    (q31_t)0x490F57EE, (q31_t)0x6919E320, (q31_t)0x48BCB598, (q31_t)0x69532442,\n    (q31_t)0x4869E664, (q31_t)0x698C246C, (q31_t)0x4816EA85, (q31_t)0x69C4E37A,\n    (q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x47706D93, (q31_t)0x6A359DB9,\n    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, (q31_t)0x46C9405C, (q31_t)0x6AA551E8,\n    (q31_t)0x46756827, (q31_t)0x6ADCC964, (q31_t)0x4621647C, (q31_t)0x6B13FEF5,\n    (q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x4578DB93, (q31_t)0x6B81A3CD,\n    (q31_t)0x452456BC, (q31_t)0x6BB812D0, (q31_t)0x44CFA73F, (q31_t)0x6BEE3F62,\n    (q31_t)0x447ACD50, (q31_t)0x6C242960, (q31_t)0x4425C923, (q31_t)0x6C59D0A9,\n    (q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x437B42E1, (q31_t)0x6CC45697,\n    (q31_t)0x4325C135, (q31_t)0x6CF934FB, (q31_t)0x42D0161E, (q31_t)0x6D2DD027,\n    (q31_t)0x427A41D0, (q31_t)0x6D6227FA, (q31_t)0x42244480, (q31_t)0x6D963C54,\n    (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4177CFB0, (q31_t)0x6DFD9A1B,\n    (q31_t)0x4121589A, (q31_t)0x6E30E349, (q31_t)0x40CAB957, (q31_t)0x6E63E87F,\n    (q31_t)0x4073F21D, (q31_t)0x6E96A99C, (q31_t)0x401D0320, (q31_t)0x6EC92682,\n    (q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F6EAEB8, (q31_t)0x6F2D532C,\n    (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1, (q31_t)0x3EBFBDCC, (q31_t)0x6F906D84,\n    (q31_t)0x3E680B2C, (q31_t)0x6FC19385, (q31_t)0x3E10320D, (q31_t)0x6FF27496,\n    (q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D600D2B, (q31_t)0x70536771,\n    (q31_t)0x3D07C1D5, (q31_t)0x708378FE, (q31_t)0x3CAF50DA, (q31_t)0x70B34524,\n    (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, (q31_t)0x3BFDFECD, (q31_t)0x71120CC5,\n    (q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3B4C18BA, (q31_t)0x716FBD68,\n    (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2, (q31_t)0x3A99A057, (q31_t)0x71CC5626,\n    (q31_t)0x3A402DD1, (q31_t)0x71FA3948, (q31_t)0x39E6975D, (q31_t)0x7227D61C,\n    (q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x3932FF87, (q31_t)0x72823C66,\n    (q31_t)0x38D8FE93, (q31_t)0x72AF05A6, (q31_t)0x387EDA8E, (q31_t)0x72DB8828,\n    (q31_t)0x382493B0, (q31_t)0x7307C3D0, (q31_t)0x37CA2A30, (q31_t)0x7333B883,\n    (q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x3714F02A, (q31_t)0x738ACC9E,\n    (q31_t)0x36BA2013, (q31_t)0x73B5EBD0, (q31_t)0x365F2E3B, (q31_t)0x73E0C3A3,\n    (q31_t)0x36041AD9, (q31_t)0x740B53FA, (q31_t)0x35A8E624, (q31_t)0x74359CBD,\n    (q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x34F219A7, (q31_t)0x7489571B,\n    (q31_t)0x3496824F, (q31_t)0x74B2C883, (q31_t)0x343ACA87, (q31_t)0x74DBF1EF,\n    (q31_t)0x33DEF287, (q31_t)0x7504D345, (q31_t)0x3382FA88, (q31_t)0x752D6C6C,\n    (q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x32CAAB6F, (q31_t)0x757DC5CA,\n    (q31_t)0x326E54C7, (q31_t)0x75A585CF, (q31_t)0x3211DF03, (q31_t)0x75CCFD42,\n    (q31_t)0x31B54A5D, (q31_t)0x75F42C0A, (q31_t)0x3158970D, (q31_t)0x761B1211,\n    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x309ED555, (q31_t)0x76680376,\n    (q31_t)0x3041C760, (q31_t)0x768E0EA5, (q31_t)0x2FE49BA6, (q31_t)0x76B3D0B3,\n    (q31_t)0x2F875262, (q31_t)0x76D94988, (q31_t)0x2F29EBCC, (q31_t)0x76FE790E,\n    (q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E6EC792, (q31_t)0x7747FBCE,\n    (q31_t)0x2E110A62, (q31_t)0x776C4EDB, (q31_t)0x2DB330C7, (q31_t)0x7790583D,\n    (q31_t)0x2D553AFB, (q31_t)0x77B417DF, (q31_t)0x2CF72939, (q31_t)0x77D78DAA,\n    (q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2C3AB2B9, (q31_t)0x781D9B64,\n    (q31_t)0x2BDC4E6F, (q31_t)0x78403328, (q31_t)0x2B7DCF17, (q31_t)0x786280BF,\n    (q31_t)0x2B1F34EB, (q31_t)0x78848413, (q31_t)0x2AC08025, (q31_t)0x78A63D10,\n    (q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x2A02C7B8, (q31_t)0x78E8CFB1,\n    (q31_t)0x29A3C484, (q31_t)0x7909A92C, (q31_t)0x2944A7A2, (q31_t)0x792A37FE,\n    (q31_t)0x28E5714A, (q31_t)0x794A7C11, (q31_t)0x288621B9, (q31_t)0x796A7554,\n    (q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27C737D2, (q31_t)0x79A98715,\n    (q31_t)0x27679DF4, (q31_t)0x79C89F6D, (q31_t)0x2707EBC6, (q31_t)0x79E76CA6,\n    (q31_t)0x26A82185, (q31_t)0x7A05EEAD, (q31_t)0x26483F6C, (q31_t)0x7A24256E,\n    (q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x2588349D, (q31_t)0x7A5FB0D8,\n    (q31_t)0x25280C5D, (q31_t)0x7A7D055B, (q31_t)0x24C7CD32, (q31_t)0x7A9A0E4F,\n    (q31_t)0x24677757, (q31_t)0x7AB6CBA3, (q31_t)0x24070B07, (q31_t)0x7AD33D45,\n    (q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x2345EFF7, (q31_t)0x7B0B3D2C,\n    (q31_t)0x22E541AE, (q31_t)0x7B26CB4F, (q31_t)0x22847DDF, (q31_t)0x7B420D7A,\n    (q31_t)0x2223A4C5, (q31_t)0x7B5D039D, (q31_t)0x21C2B69C, (q31_t)0x7B77ADA8,\n    (q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x21009C0B, (q31_t)0x7BAC1D31,\n    (q31_t)0x209F701C, (q31_t)0x7BC5E28F, (q31_t)0x203E300D, (q31_t)0x7BDF5B94,\n    (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830, (q31_t)0x1F7B7480, (q31_t)0x7C116853,\n    (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1EB86B46, (q31_t)0x7C4242F2,\n    (q31_t)0x1E56CA1E, (q31_t)0x7C5A3D4F, (q31_t)0x1DF5163F, (q31_t)0x7C71EAF8,\n    (q31_t)0x1D934FE5, (q31_t)0x7C894BDD, (q31_t)0x1D31774D, (q31_t)0x7CA05FF1,\n    (q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C6D9053, (q31_t)0x7CCDA168,\n    (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1, (q31_t)0x1BA96334, (q31_t)0x7CF9AEF0,\n    (q31_t)0x1B4732EF, (q31_t)0x7D0F4218, (q31_t)0x1AE4F1D6, (q31_t)0x7D24881A,\n    (q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x1A203E1B, (q31_t)0x7D4E2C7E,\n    (q31_t)0x19BDCBF2, (q31_t)0x7D628AC5, (q31_t)0x195B49E9, (q31_t)0x7D769BB5,\n    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, (q31_t)0x18961727, (q31_t)0x7D9DD55A,\n    (q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x17D0A7BB, (q31_t)0x7DC3D90D,\n    (q31_t)0x176DD9DE, (q31_t)0x7DD6668E, (q31_t)0x170AFD8D, (q31_t)0x7DE8A670,\n    (q31_t)0x16A81305, (q31_t)0x7DFA98A7, (q31_t)0x16451A83, (q31_t)0x7E0C3D29,\n    (q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x157F0086, (q31_t)0x7E2E9CDF,\n    (q31_t)0x151BDF85, (q31_t)0x7E3F57FE, (q31_t)0x14B8B17F, (q31_t)0x7E4FC53E,\n    (q31_t)0x145576B1, (q31_t)0x7E5FE493, (q31_t)0x13F22F57, (q31_t)0x7E6FB5F3,\n    (q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x132B7BF9, (q31_t)0x7E8E6EB1,\n    (q31_t)0x12C8106E, (q31_t)0x7E9D55FC, (q31_t)0x1264994E, (q31_t)0x7EABEF2C,\n    (q31_t)0x120116D4, (q31_t)0x7EBA3A39, (q31_t)0x119D8940, (q31_t)0x7EC8371A,\n    (q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x10D64DBC, (q31_t)0x7EE34635,\n    (q31_t)0x1072A047, (q31_t)0x7EF0585F, (q31_t)0x100EE8AD, (q31_t)0x7EFD1C3C,\n    (q31_t)0x0FAB272B, (q31_t)0x7F0991C3, (q31_t)0x0F475BFE, (q31_t)0x7F15B8EE,\n    (q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0E7FA99D, (q31_t)0x7F2D1C0E,\n    (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5, (q31_t)0x0DB7D376, (q31_t)0x7F434563,\n    (q31_t)0x0D53DB92, (q31_t)0x7F4DE450, (q31_t)0x0CEFDB75, (q31_t)0x7F5834B6,\n    (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0C27C389, (q31_t)0x7F6BE9D4,\n    (q31_t)0x0BC3AC35, (q31_t)0x7F754E7F, (q31_t)0x0B5F8D9F, (q31_t)0x7F7E648B,\n    (q31_t)0x0AFB6805, (q31_t)0x7F872BF3, (q31_t)0x0A973BA5, (q31_t)0x7F8FA4AF,\n    (q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x09CECF89, (q31_t)0x7F9FAA15,\n    (q31_t)0x096A9049, (q31_t)0x7FA736B4, (q31_t)0x09064B3A, (q31_t)0x7FAE7494,\n    (q31_t)0x08A2009A, (q31_t)0x7FB563B2, (q31_t)0x083DB0A7, (q31_t)0x7FBC040A,\n    (q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x077501BE, (q31_t)0x7FC85853,\n    (q31_t)0x0710A344, (q31_t)0x7FCE0C3E, (q31_t)0x06AC406F, (q31_t)0x7FD37152,\n    (q31_t)0x0647D97C, (q31_t)0x7FD8878D, (q31_t)0x05E36EA9, (q31_t)0x7FDD4EEC,\n    (q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x051A8E5C, (q31_t)0x7FE5F108,\n    (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0, (q31_t)0x0451A176, (q31_t)0x7FED5790,\n    (q31_t)0x03ED26E6, (q31_t)0x7FF09477, (q31_t)0x0388A9E9, (q31_t)0x7FF38273,\n    (q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x02BFA9A4, (q31_t)0x7FF871A1,\n    (q31_t)0x025B26D7, (q31_t)0x7FFA72D1, (q31_t)0x01F6A296, (q31_t)0x7FFC250F,\n    (q31_t)0x01921D1F, (q31_t)0x7FFD885A, (q31_t)0x012D96B0, (q31_t)0x7FFE9CB2,\n    (q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x006487E3, (q31_t)0x7FFFD885,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xFF9B781D, (q31_t)0x7FFFD885,\n    (q31_t)0xFF36F078, (q31_t)0x7FFF6216, (q31_t)0xFED2694F, (q31_t)0x7FFE9CB2,\n    (q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFE095D69, (q31_t)0x7FFC250F,\n    (q31_t)0xFDA4D928, (q31_t)0x7FFA72D1, (q31_t)0xFD40565B, (q31_t)0x7FF871A1,\n    (q31_t)0xFCDBD541, (q31_t)0x7FF62182, (q31_t)0xFC775616, (q31_t)0x7FF38273,\n    (q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFBAE5E89, (q31_t)0x7FED5790,\n    (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0, (q31_t)0xFAE571A4, (q31_t)0x7FE5F108,\n    (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B, (q31_t)0xFA1C9156, (q31_t)0x7FDD4EEC,\n    (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF953BF90, (q31_t)0x7FD37152,\n    (q31_t)0xF8EF5CBB, (q31_t)0x7FCE0C3E, (q31_t)0xF88AFE41, (q31_t)0x7FC85853,\n    (q31_t)0xF826A461, (q31_t)0x7FC25596, (q31_t)0xF7C24F58, (q31_t)0x7FBC040A,\n    (q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF6F9B4C5, (q31_t)0x7FAE7494,\n    (q31_t)0xF6956FB6, (q31_t)0x7FA736B4, (q31_t)0xF6313076, (q31_t)0x7F9FAA15,\n    (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC, (q31_t)0xF568C45A, (q31_t)0x7F8FA4AF,\n    (q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF4A07260, (q31_t)0x7F7E648B,\n    (q31_t)0xF43C53CA, (q31_t)0x7F754E7F, (q31_t)0xF3D83C76, (q31_t)0x7F6BE9D4,\n    (q31_t)0xF3742CA1, (q31_t)0x7F62368F, (q31_t)0xF310248A, (q31_t)0x7F5834B6,\n    (q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF2482C89, (q31_t)0x7F434563,\n    (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5, (q31_t)0xF1805662, (q31_t)0x7F2D1C0E,\n    (q31_t)0xF11C789A, (q31_t)0x7F2191B4, (q31_t)0xF0B8A401, (q31_t)0x7F15B8EE,\n    (q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEFF11752, (q31_t)0x7EFD1C3C,\n    (q31_t)0xEF8D5FB8, (q31_t)0x7EF0585F, (q31_t)0xEF29B243, (q31_t)0x7EE34635,\n    (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6, (q31_t)0xEE6276BF, (q31_t)0x7EC8371A,\n    (q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xED9B66B2, (q31_t)0x7EABEF2C,\n    (q31_t)0xED37EF91, (q31_t)0x7E9D55FC, (q31_t)0xECD48406, (q31_t)0x7E8E6EB1,\n    (q31_t)0xEC71244F, (q31_t)0x7E7F3956, (q31_t)0xEC0DD0A8, (q31_t)0x7E6FB5F3,\n    (q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEB474E80, (q31_t)0x7E4FC53E,\n    (q31_t)0xEAE4207A, (q31_t)0x7E3F57FE, (q31_t)0xEA80FF79, (q31_t)0x7E2E9CDF,\n    (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9, (q31_t)0xE9BAE57C, (q31_t)0x7E0C3D29,\n    (q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE8F50273, (q31_t)0x7DE8A670,\n    (q31_t)0xE8922621, (q31_t)0x7DD6668E, (q31_t)0xE82F5844, (q31_t)0x7DC3D90D,\n    (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7, (q31_t)0xE769E8D8, (q31_t)0x7D9DD55A,\n    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE6A4B616, (q31_t)0x7D769BB5,\n    (q31_t)0xE642340D, (q31_t)0x7D628AC5, (q31_t)0xE5DFC1E4, (q31_t)0x7D4E2C7E,\n    (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC, (q31_t)0xE51B0E2A, (q31_t)0x7D24881A,\n    (q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE4569CCB, (q31_t)0x7CF9AEF0,\n    (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1, (q31_t)0xE3926FAC, (q31_t)0x7CCDA168,\n    (q31_t)0xE330734C, (q31_t)0x7CB72724, (q31_t)0xE2CE88B2, (q31_t)0x7CA05FF1,\n    (q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE20AE9C1, (q31_t)0x7C71EAF8,\n    (q31_t)0xE1A935E1, (q31_t)0x7C5A3D4F, (q31_t)0xE14794B9, (q31_t)0x7C4242F2,\n    (q31_t)0xE0E60684, (q31_t)0x7C29FBEE, (q31_t)0xE0848B7F, (q31_t)0x7C116853,\n    (q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDFC1CFF2, (q31_t)0x7BDF5B94,\n    (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F, (q31_t)0xDEFF63F4, (q31_t)0x7BAC1D31,\n    (q31_t)0xDE9E4C60, (q31_t)0x7B920B89, (q31_t)0xDE3D4963, (q31_t)0x7B77ADA8,\n    (q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDD7B8220, (q31_t)0x7B420D7A,\n    (q31_t)0xDD1ABE51, (q31_t)0x7B26CB4F, (q31_t)0xDCBA1008, (q31_t)0x7B0B3D2C,\n    (q31_t)0xDC597781, (q31_t)0x7AEF6323, (q31_t)0xDBF8F4F8, (q31_t)0x7AD33D45,\n    (q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDB3832CD, (q31_t)0x7A9A0E4F,\n    (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B, (q31_t)0xDA77CB62, (q31_t)0x7A5FB0D8,\n    (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8, (q31_t)0xD9B7C093, (q31_t)0x7A24256E,\n    (q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD8F81439, (q31_t)0x79E76CA6,\n    (q31_t)0xD898620C, (q31_t)0x79C89F6D, (q31_t)0xD838C82D, (q31_t)0x79A98715,\n    (q31_t)0xD7D946D7, (q31_t)0x798A23B1, (q31_t)0xD779DE46, (q31_t)0x796A7554,\n    (q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD6BB585D, (q31_t)0x792A37FE,\n    (q31_t)0xD65C3B7B, (q31_t)0x7909A92C, (q31_t)0xD5FD3847, (q31_t)0x78E8CFB1,\n    (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1, (q31_t)0xD53F7FDA, (q31_t)0x78A63D10,\n    (q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD48230E8, (q31_t)0x786280BF,\n    (q31_t)0xD423B190, (q31_t)0x78403328, (q31_t)0xD3C54D46, (q31_t)0x781D9B64,\n    (q31_t)0xD3670445, (q31_t)0x77FAB988, (q31_t)0xD308D6C6, (q31_t)0x77D78DAA,\n    (q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD24CCF38, (q31_t)0x7790583D,\n    (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB, (q31_t)0xD191386D, (q31_t)0x7747FBCE,\n    (q31_t)0xD13397E1, (q31_t)0x77235F2D, (q31_t)0xD0D61433, (q31_t)0x76FE790E,\n    (q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xD01B6459, (q31_t)0x76B3D0B3,\n    (q31_t)0xCFBE389F, (q31_t)0x768E0EA5, (q31_t)0xCF612AAA, (q31_t)0x76680376,\n    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, (q31_t)0xCEA768F2, (q31_t)0x761B1211,\n    (q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCDEE20FC, (q31_t)0x75CCFD42,\n    (q31_t)0xCD91AB38, (q31_t)0x75A585CF, (q31_t)0xCD355490, (q31_t)0x757DC5CA,\n    (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B, (q31_t)0xCC7D0577, (q31_t)0x752D6C6C,\n    (q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCBC53578, (q31_t)0x74DBF1EF,\n    (q31_t)0xCB697DB0, (q31_t)0x74B2C883, (q31_t)0xCB0DE658, (q31_t)0x7489571B,\n    (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1, (q31_t)0xCA5719DB, (q31_t)0x74359CBD,\n    (q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC9A0D1C4, (q31_t)0x73E0C3A3,\n    (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0, (q31_t)0xC8EB0FD6, (q31_t)0x738ACC9E,\n    (q31_t)0xC89061BA, (q31_t)0x735F6626, (q31_t)0xC835D5D0, (q31_t)0x7333B883,\n    (q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC7812571, (q31_t)0x72DB8828,\n    (q31_t)0xC727016C, (q31_t)0x72AF05A6, (q31_t)0xC6CD0079, (q31_t)0x72823C66,\n    (q31_t)0xC67322CD, (q31_t)0x72552C84, (q31_t)0xC61968A2, (q31_t)0x7227D61C,\n    (q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC5665FA8, (q31_t)0x71CC5626,\n    (q31_t)0xC50D1148, (q31_t)0x719E2CD2, (q31_t)0xC4B3E746, (q31_t)0x716FBD68,\n    (q31_t)0xC45AE1D7, (q31_t)0x71410804, (q31_t)0xC4020132, (q31_t)0x71120CC5,\n    (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC350AF25, (q31_t)0x70B34524,\n    (q31_t)0xC2F83E2A, (q31_t)0x708378FE, (q31_t)0xC29FF2D4, (q31_t)0x70536771,\n    (q31_t)0xC247CD5A, (q31_t)0x70231099, (q31_t)0xC1EFCDF2, (q31_t)0x6FF27496,\n    (q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC1404233, (q31_t)0x6F906D84,\n    (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1, (q31_t)0xC0915147, (q31_t)0x6F2D532C,\n    (q31_t)0xC03A1368, (q31_t)0x6EFB5F12, (q31_t)0xBFE2FCDF, (q31_t)0x6EC92682,\n    (q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBF3546A8, (q31_t)0x6E63E87F,\n    (q31_t)0xBEDEA765, (q31_t)0x6E30E349, (q31_t)0xBE88304F, (q31_t)0x6DFD9A1B,\n    (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14, (q31_t)0xBDDBBB7F, (q31_t)0x6D963C54,\n    (q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBD2FE9E1, (q31_t)0x6D2DD027,\n    (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB, (q31_t)0xBC84BD1E, (q31_t)0x6CC45697,\n    (q31_t)0xBC2F6513, (q31_t)0x6C8F351C, (q31_t)0xBBDA36DC, (q31_t)0x6C59D0A9,\n    (q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBB3058C0, (q31_t)0x6BEE3F62,\n    (q31_t)0xBADBA943, (q31_t)0x6BB812D0, (q31_t)0xBA87246C, (q31_t)0x6B81A3CD,\n    (q31_t)0xBA32CA70, (q31_t)0x6B4AF278, (q31_t)0xB9DE9B83, (q31_t)0x6B13FEF5,\n    (q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB936BFA3, (q31_t)0x6AA551E8,\n    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, (q31_t)0xB88F926C, (q31_t)0x6A359DB9,\n    (q31_t)0xB83C3DD1, (q31_t)0x69FD614A, (q31_t)0xB7E9157A, (q31_t)0x69C4E37A,\n    (q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB7434A67, (q31_t)0x69532442,\n    (q31_t)0xB6F0A811, (q31_t)0x6919E320, (q31_t)0xB69E32CD, (q31_t)0x68E06129,\n    (q31_t)0xB64BEACC, (q31_t)0x68A69E81, (q31_t)0xB5F9D042, (q31_t)0x686C9B4B,\n    (q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB556245E, (q31_t)0x67F7D3C4,\n    (q31_t)0xB5049368, (q31_t)0x67BD0FBC, (q31_t)0xB4B330B2, (q31_t)0x67820BB6,\n    (q31_t)0xB461FC70, (q31_t)0x6746C7D7, (q31_t)0xB410F6D2, (q31_t)0x670B4443,\n    (q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB36F784E, (q31_t)0x66937E90,\n    (q31_t)0xB31EFFCB, (q31_t)0x66573CBB, (q31_t)0xB2CEB6B5, (q31_t)0x661ABBC5,\n    (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3, (q31_t)0xB22EB392, (q31_t)0x65A0FD0B,\n    (q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB18F7070, (q31_t)0x6526438E,\n    (q31_t)0xB140175B, (q31_t)0x64E88926, (q31_t)0xB0F0EEDA, (q31_t)0x64AA907F,\n    (q31_t)0xB0A1F71C, (q31_t)0x646C59BF, (q31_t)0xB0533055, (q31_t)0x642DE50D,\n    (q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAFB63667, (q31_t)0x63B0426D,\n    (q31_t)0xAF6803A1, (q31_t)0x637114CC, (q31_t)0xAF1A0293, (q31_t)0x6331A9D4,\n    (q31_t)0xAECC336B, (q31_t)0x62F201AC, (q31_t)0xAE7E965B, (q31_t)0x62B21C7B,\n    (q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xADE3F33E, (q31_t)0x62319B9D,\n    (q31_t)0xAD96ED91, (q31_t)0x61F1003E, (q31_t)0xAD4A1ABA, (q31_t)0x61B02876,\n    (q31_t)0xACFD7AE8, (q31_t)0x616F146B, (q31_t)0xACB10E4A, (q31_t)0x612DC446,\n    (q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAC18CF68, (q31_t)0x60AA704F,\n    (q31_t)0xABCCFD82, (q31_t)0x60686CCE, (q31_t)0xAB815F8C, (q31_t)0x60262DD5,\n    (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D, (q31_t)0xAAEAC02B, (q31_t)0x5FA0FE1E,\n    (q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA54F2B9, (q31_t)0x5F1AE273,\n    (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89, (q31_t)0xA9BFF8A8, (q31_t)0x5E93DC1F,\n    (q31_t)0xA975CB56, (q31_t)0x5E50015D, (q31_t)0xA92BD366, (q31_t)0x5E0BEC6E,\n    (q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA8988463, (q31_t)0x5D8314B0,\n    (q31_t)0xA84F2DA9, (q31_t)0x5D3E5236, (q31_t)0xA8060D08, (q31_t)0x5CF95638,\n    (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF, (q31_t)0xA7746EC0, (q31_t)0x5C6EB258,\n    (q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA6E3AAF2, (q31_t)0x5BE32A67,\n    (q31_t)0xA69B9B68, (q31_t)0x5B9D1153, (q31_t)0xA653C302, (q31_t)0x5B56BFBD,\n    (q31_t)0xA60C21ED, (q31_t)0x5B1035CF, (q31_t)0xA5C4B855, (q31_t)0x5AC973B4,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA5368C4B, (q31_t)0x5A3B47AA,\n    (q31_t)0xA4EFCA31, (q31_t)0x59F3DE12, (q31_t)0xA4A94042, (q31_t)0x59AC3CFD,\n    (q31_t)0xA462EEAC, (q31_t)0x59646497, (q31_t)0xA41CD598, (q31_t)0x591C550E,\n    (q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA3914DA7, (q31_t)0x588B913F,\n    (q31_t)0xA34BDF20, (q31_t)0x5842DD54, (q31_t)0xA306A9C7, (q31_t)0x57F9F2F7,\n    (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256, (q31_t)0xA27CEB4F, (q31_t)0x57677B9D,\n    (q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1F41391, (q31_t)0x56D42C99,\n    (q31_t)0xA1AFFEA2, (q31_t)0x568A34A9, (q31_t)0xA16C23E1, (q31_t)0x56400757,\n    (q31_t)0xA1288376, (q31_t)0x55F5A4D2, (q31_t)0xA0E51D8C, (q31_t)0x55AB0D46,\n    (q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA05F01E1, (q31_t)0x55153FD4,\n    (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A, (q31_t)0x9FD9D22A, (q31_t)0x547EA073,\n    (q31_t)0x9F979331, (q31_t)0x5433027D, (q31_t)0x9F558FB0, (q31_t)0x53E73097,\n    (q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9ED23BB9, (q31_t)0x534EF1B5,\n    (q31_t)0x9E90EB94, (q31_t)0x53028517, (q31_t)0x9E4FD789, (q31_t)0x52B5E545,\n    (q31_t)0x9E0EFFC1, (q31_t)0x5269126E, (q31_t)0x9DCE6462, (q31_t)0x521C0CC1,\n    (q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D4DE384, (q31_t)0x518169A4,\n    (q31_t)0x9D0DFE53, (q31_t)0x5133CC94, (q31_t)0x9CCE562B, (q31_t)0x50E5FD6C,\n    (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E, (q31_t)0x9C4FBD92, (q31_t)0x5049C999,\n    (q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9BD21AF2, (q31_t)0x4FACCFAB,\n    (q31_t)0x9B93A640, (q31_t)0x4F5E08E3, (q31_t)0x9B556F80, (q31_t)0x4F0F1126,\n    (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4, (q31_t)0x9AD9BC71, (q31_t)0x4E708F8F,\n    (q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A5F02F5, (q31_t)0x4DD14C6E,\n    (q31_t)0x9A22042C, (q31_t)0x4D8162C4, (q31_t)0x99E5443A, (q31_t)0x4D31494B,\n    (q31_t)0x99A8C344, (q31_t)0x4CE10034, (q31_t)0x996C816F, (q31_t)0x4C9087B1,\n    (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x98F4BBBC, (q31_t)0x4BEF092D,\n    (q31_t)0x98B93828, (q31_t)0x4B9E038F, (q31_t)0x987DF449, (q31_t)0x4B4CCF4D,\n    (q31_t)0x9842F043, (q31_t)0x4AFB6C97, (q31_t)0x98082C3B, (q31_t)0x4AA9DBA1,\n    (q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x979364B5, (q31_t)0x4A062FBD,\n    (q31_t)0x9759617E, (q31_t)0x49B41533, (q31_t)0x971F9ED6, (q31_t)0x4961CD32,\n    (q31_t)0x96E61CDF, (q31_t)0x490F57EE, (q31_t)0x96ACDBBD, (q31_t)0x48BCB598,\n    (q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x963B1C85, (q31_t)0x4816EA85,\n    (q31_t)0x96029EB5, (q31_t)0x47C3C22E, (q31_t)0x95CA6246, (q31_t)0x47706D93,\n    (q31_t)0x9592675B, (q31_t)0x471CECE6, (q31_t)0x955AAE17, (q31_t)0x46C9405C,\n    (q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x94EC010B, (q31_t)0x4621647C,\n    (q31_t)0x94B50D87, (q31_t)0x45CD358F, (q31_t)0x947E5C32, (q31_t)0x4578DB93,\n    (q31_t)0x9447ED2F, (q31_t)0x452456BC, (q31_t)0x9411C09D, (q31_t)0x44CFA73F,\n    (q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x93A62F56, (q31_t)0x4425C923,\n    (q31_t)0x9370CAE4, (q31_t)0x43D09AEC, (q31_t)0x933BA968, (q31_t)0x437B42E1,\n    (q31_t)0x9306CB04, (q31_t)0x4325C135, (q31_t)0x92D22FD8, (q31_t)0x42D0161E,\n    (q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9269C3AC, (q31_t)0x42244480,\n    (q31_t)0x9235F2EB, (q31_t)0x41CE1E64, (q31_t)0x920265E4, (q31_t)0x4177CFB0,\n    (q31_t)0x91CF1CB6, (q31_t)0x4121589A, (q31_t)0x919C1780, (q31_t)0x40CAB957,\n    (q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x9136D97D, (q31_t)0x401D0320,\n    (q31_t)0x9104A0ED, (q31_t)0x3FC5EC97, (q31_t)0x90D2ACD3, (q31_t)0x3F6EAEB8,\n    (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7, (q31_t)0x906F927B, (q31_t)0x3EBFBDCC,\n    (q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x900D8B69, (q31_t)0x3E10320D,\n    (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5, (q31_t)0x8FAC988E, (q31_t)0x3D600D2B,\n    (q31_t)0x8F7C8701, (q31_t)0x3D07C1D5, (q31_t)0x8F4CBADB, (q31_t)0x3CAF50DA,\n    (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8EEDF33B, (q31_t)0x3BFDFECD,\n    (q31_t)0x8EBEF7FB, (q31_t)0x3BA51E29, (q31_t)0x8E904298, (q31_t)0x3B4C18BA,\n    (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7, (q31_t)0x8E33A9D9, (q31_t)0x3A99A057,\n    (q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DD829E4, (q31_t)0x39E6975D,\n    (q31_t)0x8DAAD37B, (q31_t)0x398CDD32, (q31_t)0x8D7DC399, (q31_t)0x3932FF87,\n    (q31_t)0x8D50FA59, (q31_t)0x38D8FE93, (q31_t)0x8D2477D8, (q31_t)0x387EDA8E,\n    (q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CCC477D, (q31_t)0x37CA2A30,\n    (q31_t)0x8CA099D9, (q31_t)0x376F9E46, (q31_t)0x8C753361, (q31_t)0x3714F02A,\n    (q31_t)0x8C4A142F, (q31_t)0x36BA2013, (q31_t)0x8C1F3C5C, (q31_t)0x365F2E3B,\n    (q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BCA6342, (q31_t)0x35A8E624,\n    (q31_t)0x8BA0622F, (q31_t)0x354D9056, (q31_t)0x8B76A8E4, (q31_t)0x34F219A7,\n    (q31_t)0x8B4D377C, (q31_t)0x3496824F, (q31_t)0x8B240E10, (q31_t)0x343ACA87,\n    (q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AD29393, (q31_t)0x3382FA88,\n    (q31_t)0x8AAA42B4, (q31_t)0x3326E2C2, (q31_t)0x8A823A35, (q31_t)0x32CAAB6F,\n    (q31_t)0x8A5A7A30, (q31_t)0x326E54C7, (q31_t)0x8A3302BD, (q31_t)0x3211DF03,\n    (q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89E4EDEE, (q31_t)0x3158970D,\n    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, (q31_t)0x8997FC89, (q31_t)0x309ED555,\n    (q31_t)0x8971F15A, (q31_t)0x3041C760, (q31_t)0x894C2F4C, (q31_t)0x2FE49BA6,\n    (q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x890186F1, (q31_t)0x2F29EBCC,\n    (q31_t)0x88DCA0D3, (q31_t)0x2ECC681E, (q31_t)0x88B80431, (q31_t)0x2E6EC792,\n    (q31_t)0x8893B124, (q31_t)0x2E110A62, (q31_t)0x886FA7C2, (q31_t)0x2DB330C7,\n    (q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x88287255, (q31_t)0x2CF72939,\n    (q31_t)0x88054677, (q31_t)0x2C98FBBA, (q31_t)0x87E2649B, (q31_t)0x2C3AB2B9,\n    (q31_t)0x87BFCCD7, (q31_t)0x2BDC4E6F, (q31_t)0x879D7F40, (q31_t)0x2B7DCF17,\n    (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8759C2EF, (q31_t)0x2AC08025,\n    (q31_t)0x8738545E, (q31_t)0x2A61B101, (q31_t)0x8717304E, (q31_t)0x2A02C7B8,\n    (q31_t)0x86F656D3, (q31_t)0x29A3C484, (q31_t)0x86D5C802, (q31_t)0x2944A7A2,\n    (q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x86958AAB, (q31_t)0x288621B9,\n    (q31_t)0x8675DC4E, (q31_t)0x2826B928, (q31_t)0x865678EA, (q31_t)0x27C737D2,\n    (q31_t)0x86376092, (q31_t)0x27679DF4, (q31_t)0x86189359, (q31_t)0x2707EBC6,\n    (q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85DBDA91, (q31_t)0x26483F6C,\n    (q31_t)0x85BDEF27, (q31_t)0x25E845B5, (q31_t)0x85A04F28, (q31_t)0x2588349D,\n    (q31_t)0x8582FAA4, (q31_t)0x25280C5D, (q31_t)0x8565F1B0, (q31_t)0x24C7CD32,\n    (q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x852CC2BA, (q31_t)0x24070B07,\n    (q31_t)0x85109CDC, (q31_t)0x23A6887E, (q31_t)0x84F4C2D3, (q31_t)0x2345EFF7,\n    (q31_t)0x84D934B0, (q31_t)0x22E541AE, (q31_t)0x84BDF285, (q31_t)0x22847DDF,\n    (q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x84885257, (q31_t)0x21C2B69C,\n    (q31_t)0x846DF476, (q31_t)0x2161B39F, (q31_t)0x8453E2CE, (q31_t)0x21009C0B,\n    (q31_t)0x843A1D70, (q31_t)0x209F701C, (q31_t)0x8420A46B, (q31_t)0x203E300D,\n    (q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83EE97AC, (q31_t)0x1F7B7480,\n    (q31_t)0x83D60411, (q31_t)0x1F19F97B, (q31_t)0x83BDBD0D, (q31_t)0x1EB86B46,\n    (q31_t)0x83A5C2B0, (q31_t)0x1E56CA1E, (q31_t)0x838E1507, (q31_t)0x1DF5163F,\n    (q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x835FA00E, (q31_t)0x1D31774D,\n    (q31_t)0x8348D8DB, (q31_t)0x1CCF8CB3, (q31_t)0x83325E97, (q31_t)0x1C6D9053,\n    (q31_t)0x831C314E, (q31_t)0x1C0B826A, (q31_t)0x8306510F, (q31_t)0x1BA96334,\n    (q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82DB77E5, (q31_t)0x1AE4F1D6,\n    (q31_t)0x82C67F13, (q31_t)0x1A82A025, (q31_t)0x82B1D381, (q31_t)0x1A203E1B,\n    (q31_t)0x829D753A, (q31_t)0x19BDCBF2, (q31_t)0x8289644A, (q31_t)0x195B49E9,\n    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82622AA5, (q31_t)0x18961727,\n    (q31_t)0x824F0208, (q31_t)0x183366E8, (q31_t)0x823C26F2, (q31_t)0x17D0A7BB,\n    (q31_t)0x82299971, (q31_t)0x176DD9DE, (q31_t)0x8217598F, (q31_t)0x170AFD8D,\n    (q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81F3C2D7, (q31_t)0x16451A83,\n    (q31_t)0x81E26C16, (q31_t)0x15E21444, (q31_t)0x81D16320, (q31_t)0x157F0086,\n    (q31_t)0x81C0A801, (q31_t)0x151BDF85, (q31_t)0x81B03AC1, (q31_t)0x14B8B17F,\n    (q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x81904A0C, (q31_t)0x13F22F57,\n    (q31_t)0x8180C6A9, (q31_t)0x138EDBB0, (q31_t)0x8171914E, (q31_t)0x132B7BF9,\n    (q31_t)0x8162AA03, (q31_t)0x12C8106E, (q31_t)0x815410D3, (q31_t)0x1264994E,\n    (q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x8137C8E6, (q31_t)0x119D8940,\n    (q31_t)0x812A1A39, (q31_t)0x1139F0CE, (q31_t)0x811CB9CA, (q31_t)0x10D64DBC,\n    (q31_t)0x810FA7A0, (q31_t)0x1072A047, (q31_t)0x8102E3C3, (q31_t)0x100EE8AD,\n    (q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80EA4712, (q31_t)0x0F475BFE,\n    (q31_t)0x80DE6E4C, (q31_t)0x0EE38765, (q31_t)0x80D2E3F1, (q31_t)0x0E7FA99D,\n    (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3, (q31_t)0x80BCBA9C, (q31_t)0x0DB7D376,\n    (q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x80A7CB49, (q31_t)0x0CEFDB75,\n    (q31_t)0x809DC970, (q31_t)0x0C8BD35E, (q31_t)0x8094162B, (q31_t)0x0C27C389,\n    (q31_t)0x808AB180, (q31_t)0x0BC3AC35, (q31_t)0x80819B74, (q31_t)0x0B5F8D9F,\n    (q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80705B50, (q31_t)0x0A973BA5,\n    (q31_t)0x80683143, (q31_t)0x0A3308BC, (q31_t)0x806055EA, (q31_t)0x09CECF89,\n    (q31_t)0x8058C94C, (q31_t)0x096A9049, (q31_t)0x80518B6B, (q31_t)0x09064B3A,\n    (q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x8043FBF6, (q31_t)0x083DB0A7,\n    (q31_t)0x803DAA69, (q31_t)0x07D95B9E, (q31_t)0x8037A7AC, (q31_t)0x077501BE,\n    (q31_t)0x8031F3C1, (q31_t)0x0710A344, (q31_t)0x802C8EAD, (q31_t)0x06AC406F,\n    (q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8022B113, (q31_t)0x05E36EA9,\n    (q31_t)0x801E3894, (q31_t)0x057F0034, (q31_t)0x801A0EF7, (q31_t)0x051A8E5C,\n    (q31_t)0x80163440, (q31_t)0x04B6195D, (q31_t)0x8012A86F, (q31_t)0x0451A176,\n    (q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x800C7D8C, (q31_t)0x0388A9E9,\n    (q31_t)0x8009DE7D, (q31_t)0x03242ABF, (q31_t)0x80078E5E, (q31_t)0x02BFA9A4,\n    (q31_t)0x80058D2E, (q31_t)0x025B26D7, (q31_t)0x8003DAF0, (q31_t)0x01F6A296,\n    (q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x8001634D, (q31_t)0x012D96B0,\n    (q31_t)0x80009DE9, (q31_t)0x00C90F88, (q31_t)0x8000277A, (q31_t)0x006487E3,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x8000277A, (q31_t)0xFF9B781D,\n    (q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x8001634D, (q31_t)0xFED2694F,\n    (q31_t)0x800277A5, (q31_t)0xFE6DE2E0, (q31_t)0x8003DAF0, (q31_t)0xFE095D69,\n    (q31_t)0x80058D2E, (q31_t)0xFDA4D928, (q31_t)0x80078E5E, (q31_t)0xFD40565B,\n    (q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800C7D8C, (q31_t)0xFC775616,\n    (q31_t)0x800F6B88, (q31_t)0xFC12D919, (q31_t)0x8012A86F, (q31_t)0xFBAE5E89,\n    (q31_t)0x80163440, (q31_t)0xFB49E6A2, (q31_t)0x801A0EF7, (q31_t)0xFAE571A4,\n    (q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x8022B113, (q31_t)0xFA1C9156,\n    (q31_t)0x80277872, (q31_t)0xF9B82683, (q31_t)0x802C8EAD, (q31_t)0xF953BF90,\n    (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB, (q31_t)0x8037A7AC, (q31_t)0xF88AFE41,\n    (q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8043FBF6, (q31_t)0xF7C24F58,\n    (q31_t)0x804A9C4D, (q31_t)0xF75DFF65, (q31_t)0x80518B6B, (q31_t)0xF6F9B4C5,\n    (q31_t)0x8058C94C, (q31_t)0xF6956FB6, (q31_t)0x806055EA, (q31_t)0xF6313076,\n    (q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x80705B50, (q31_t)0xF568C45A,\n    (q31_t)0x8078D40D, (q31_t)0xF50497FA, (q31_t)0x80819B74, (q31_t)0xF4A07260,\n    (q31_t)0x808AB180, (q31_t)0xF43C53CA, (q31_t)0x8094162B, (q31_t)0xF3D83C76,\n    (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80A7CB49, (q31_t)0xF310248A,\n    (q31_t)0x80B21BAF, (q31_t)0xF2AC246D, (q31_t)0x80BCBA9C, (q31_t)0xF2482C89,\n    (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C, (q31_t)0x80D2E3F1, (q31_t)0xF1805662,\n    (q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80EA4712, (q31_t)0xF0B8A401,\n    (q31_t)0x80F66E3C, (q31_t)0xF054D8D4, (q31_t)0x8102E3C3, (q31_t)0xEFF11752,\n    (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8, (q31_t)0x811CB9CA, (q31_t)0xEF29B243,\n    (q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8137C8E6, (q31_t)0xEE6276BF,\n    (q31_t)0x8145C5C6, (q31_t)0xEDFEE92B, (q31_t)0x815410D3, (q31_t)0xED9B66B2,\n    (q31_t)0x8162AA03, (q31_t)0xED37EF91, (q31_t)0x8171914E, (q31_t)0xECD48406,\n    (q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81904A0C, (q31_t)0xEC0DD0A8,\n    (q31_t)0x81A01B6C, (q31_t)0xEBAA894E, (q31_t)0x81B03AC1, (q31_t)0xEB474E80,\n    (q31_t)0x81C0A801, (q31_t)0xEAE4207A, (q31_t)0x81D16320, (q31_t)0xEA80FF79,\n    (q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x81F3C2D7, (q31_t)0xE9BAE57C,\n    (q31_t)0x82056758, (q31_t)0xE957ECFB, (q31_t)0x8217598F, (q31_t)0xE8F50273,\n    (q31_t)0x82299971, (q31_t)0xE8922621, (q31_t)0x823C26F2, (q31_t)0xE82F5844,\n    (q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x82622AA5, (q31_t)0xE769E8D8,\n    (q31_t)0x8275A0C0, (q31_t)0xE70747C3, (q31_t)0x8289644A, (q31_t)0xE6A4B616,\n    (q31_t)0x829D753A, (q31_t)0xE642340D, (q31_t)0x82B1D381, (q31_t)0xE5DFC1E4,\n    (q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82DB77E5, (q31_t)0xE51B0E2A,\n    (q31_t)0x82F0BDE8, (q31_t)0xE4B8CD10, (q31_t)0x8306510F, (q31_t)0xE4569CCB,\n    (q31_t)0x831C314E, (q31_t)0xE3F47D95, (q31_t)0x83325E97, (q31_t)0xE3926FAC,\n    (q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x835FA00E, (q31_t)0xE2CE88B2,\n    (q31_t)0x8376B422, (q31_t)0xE26CB01A, (q31_t)0x838E1507, (q31_t)0xE20AE9C1,\n    (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1, (q31_t)0x83BDBD0D, (q31_t)0xE14794B9,\n    (q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x83EE97AC, (q31_t)0xE0848B7F,\n    (q31_t)0x840777CF, (q31_t)0xE02323E5, (q31_t)0x8420A46B, (q31_t)0xDFC1CFF2,\n    (q31_t)0x843A1D70, (q31_t)0xDF608FE3, (q31_t)0x8453E2CE, (q31_t)0xDEFF63F4,\n    (q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x84885257, (q31_t)0xDE3D4963,\n    (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A, (q31_t)0x84BDF285, (q31_t)0xDD7B8220,\n    (q31_t)0x84D934B0, (q31_t)0xDD1ABE51, (q31_t)0x84F4C2D3, (q31_t)0xDCBA1008,\n    (q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x852CC2BA, (q31_t)0xDBF8F4F8,\n    (q31_t)0x8549345C, (q31_t)0xDB9888A8, (q31_t)0x8565F1B0, (q31_t)0xDB3832CD,\n    (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2, (q31_t)0x85A04F28, (q31_t)0xDA77CB62,\n    (q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85DBDA91, (q31_t)0xD9B7C093,\n    (q31_t)0x85FA1152, (q31_t)0xD957DE7A, (q31_t)0x86189359, (q31_t)0xD8F81439,\n    (q31_t)0x86376092, (q31_t)0xD898620C, (q31_t)0x865678EA, (q31_t)0xD838C82D,\n    (q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86958AAB, (q31_t)0xD779DE46,\n    (q31_t)0x86B583EE, (q31_t)0xD71A8EB5, (q31_t)0x86D5C802, (q31_t)0xD6BB585D,\n    (q31_t)0x86F656D3, (q31_t)0xD65C3B7B, (q31_t)0x8717304E, (q31_t)0xD5FD3847,\n    (q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x8759C2EF, (q31_t)0xD53F7FDA,\n    (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14, (q31_t)0x879D7F40, (q31_t)0xD48230E8,\n    (q31_t)0x87BFCCD7, (q31_t)0xD423B190, (q31_t)0x87E2649B, (q31_t)0xD3C54D46,\n    (q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x88287255, (q31_t)0xD308D6C6,\n    (q31_t)0x884BE820, (q31_t)0xD2AAC504, (q31_t)0x886FA7C2, (q31_t)0xD24CCF38,\n    (q31_t)0x8893B124, (q31_t)0xD1EEF59E, (q31_t)0x88B80431, (q31_t)0xD191386D,\n    (q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x890186F1, (q31_t)0xD0D61433,\n    (q31_t)0x8926B677, (q31_t)0xD078AD9D, (q31_t)0x894C2F4C, (q31_t)0xD01B6459,\n    (q31_t)0x8971F15A, (q31_t)0xCFBE389F, (q31_t)0x8997FC89, (q31_t)0xCF612AAA,\n    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x89E4EDEE, (q31_t)0xCEA768F2,\n    (q31_t)0x8A0BD3F5, (q31_t)0xCE4AB5A2, (q31_t)0x8A3302BD, (q31_t)0xCDEE20FC,\n    (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38, (q31_t)0x8A823A35, (q31_t)0xCD355490,\n    (q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8AD29393, (q31_t)0xCC7D0577,\n    (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78, (q31_t)0x8B240E10, (q31_t)0xCBC53578,\n    (q31_t)0x8B4D377C, (q31_t)0xCB697DB0, (q31_t)0x8B76A8E4, (q31_t)0xCB0DE658,\n    (q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BCA6342, (q31_t)0xCA5719DB,\n    (q31_t)0x8BF4AC05, (q31_t)0xC9FBE527, (q31_t)0x8C1F3C5C, (q31_t)0xC9A0D1C4,\n    (q31_t)0x8C4A142F, (q31_t)0xC945DFEC, (q31_t)0x8C753361, (q31_t)0xC8EB0FD6,\n    (q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CCC477D, (q31_t)0xC835D5D0,\n    (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50, (q31_t)0x8D2477D8, (q31_t)0xC7812571,\n    (q31_t)0x8D50FA59, (q31_t)0xC727016C, (q31_t)0x8D7DC399, (q31_t)0xC6CD0079,\n    (q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8DD829E4, (q31_t)0xC61968A2,\n    (q31_t)0x8E05C6B7, (q31_t)0xC5BFD22E, (q31_t)0x8E33A9D9, (q31_t)0xC5665FA8,\n    (q31_t)0x8E61D32D, (q31_t)0xC50D1148, (q31_t)0x8E904298, (q31_t)0xC4B3E746,\n    (q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8EEDF33B, (q31_t)0xC4020132,\n    (q31_t)0x8F1D343A, (q31_t)0xC3A9458F, (q31_t)0x8F4CBADB, (q31_t)0xC350AF25,\n    (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A, (q31_t)0x8FAC988E, (q31_t)0xC29FF2D4,\n    (q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x900D8B69, (q31_t)0xC1EFCDF2,\n    (q31_t)0x903E6C7A, (q31_t)0xC197F4D3, (q31_t)0x906F927B, (q31_t)0xC1404233,\n    (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648, (q31_t)0x90D2ACD3, (q31_t)0xC0915147,\n    (q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x9136D97D, (q31_t)0xBFE2FCDF,\n    (q31_t)0x91695663, (q31_t)0xBF8C0DE2, (q31_t)0x919C1780, (q31_t)0xBF3546A8,\n    (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765, (q31_t)0x920265E4, (q31_t)0xBE88304F,\n    (q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9269C3AC, (q31_t)0xBDDBBB7F,\n    (q31_t)0x929DD805, (q31_t)0xBD85BE2F, (q31_t)0x92D22FD8, (q31_t)0xBD2FE9E1,\n    (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA, (q31_t)0x933BA968, (q31_t)0xBC84BD1E,\n    (q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x93A62F56, (q31_t)0xBBDA36DC,\n    (q31_t)0x93DBD69F, (q31_t)0xBB8532AF, (q31_t)0x9411C09D, (q31_t)0xBB3058C0,\n    (q31_t)0x9447ED2F, (q31_t)0xBADBA943, (q31_t)0x947E5C32, (q31_t)0xBA87246C,\n    (q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x94EC010B, (q31_t)0xB9DE9B83,\n    (q31_t)0x9523369B, (q31_t)0xB98A97D8, (q31_t)0x955AAE17, (q31_t)0xB936BFA3,\n    (q31_t)0x9592675B, (q31_t)0xB8E31319, (q31_t)0x95CA6246, (q31_t)0xB88F926C,\n    (q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x963B1C85, (q31_t)0xB7E9157A,\n    (q31_t)0x9673DB94, (q31_t)0xB796199B, (q31_t)0x96ACDBBD, (q31_t)0xB7434A67,\n    (q31_t)0x96E61CDF, (q31_t)0xB6F0A811, (q31_t)0x971F9ED6, (q31_t)0xB69E32CD,\n    (q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x979364B5, (q31_t)0xB5F9D042,\n    (q31_t)0x97CDA855, (q31_t)0xB5A7E362, (q31_t)0x98082C3B, (q31_t)0xB556245E,\n    (q31_t)0x9842F043, (q31_t)0xB5049368, (q31_t)0x987DF449, (q31_t)0xB4B330B2,\n    (q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x98F4BBBC, (q31_t)0xB410F6D2,\n    (q31_t)0x99307EE0, (q31_t)0xB3C0200C, (q31_t)0x996C816F, (q31_t)0xB36F784E,\n    (q31_t)0x99A8C344, (q31_t)0xB31EFFCB, (q31_t)0x99E5443A, (q31_t)0xB2CEB6B5,\n    (q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A5F02F5, (q31_t)0xB22EB392,\n    (q31_t)0x9A9C406D, (q31_t)0xB1DEF9E8, (q31_t)0x9AD9BC71, (q31_t)0xB18F7070,\n    (q31_t)0x9B1776D9, (q31_t)0xB140175B, (q31_t)0x9B556F80, (q31_t)0xB0F0EEDA,\n    (q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9BD21AF2, (q31_t)0xB0533055,\n    (q31_t)0x9C10CD70, (q31_t)0xB0049AB2, (q31_t)0x9C4FBD92, (q31_t)0xAFB63667,\n    (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1, (q31_t)0x9CCE562B, (q31_t)0xAF1A0293,\n    (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D4DE384, (q31_t)0xAE7E965B,\n    (q31_t)0x9D8E0596, (q31_t)0xAE312B91, (q31_t)0x9DCE6462, (q31_t)0xADE3F33E,\n    (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91, (q31_t)0x9E4FD789, (q31_t)0xAD4A1ABA,\n    (q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9ED23BB9, (q31_t)0xACB10E4A,\n    (q31_t)0x9F13C7D0, (q31_t)0xAC64D510, (q31_t)0x9F558FB0, (q31_t)0xAC18CF68,\n    (q31_t)0x9F979331, (q31_t)0xABCCFD82, (q31_t)0x9FD9D22A, (q31_t)0xAB815F8C,\n    (q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA05F01E1, (q31_t)0xAAEAC02B,\n    (q31_t)0xA0A1F24C, (q31_t)0xAA9FBF1D, (q31_t)0xA0E51D8C, (q31_t)0xAA54F2B9,\n    (q31_t)0xA1288376, (q31_t)0xAA0A5B2D, (q31_t)0xA16C23E1, (q31_t)0xA9BFF8A8,\n    (q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA1F41391, (q31_t)0xA92BD366,\n    (q31_t)0xA2386283, (q31_t)0xA8E21106, (q31_t)0xA27CEB4F, (q31_t)0xA8988463,\n    (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9, (q31_t)0xA306A9C7, (q31_t)0xA8060D08,\n    (q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3914DA7, (q31_t)0xA7746EC0,\n    (q31_t)0xA3D6F533, (q31_t)0xA72BF173, (q31_t)0xA41CD598, (q31_t)0xA6E3AAF2,\n    (q31_t)0xA462EEAC, (q31_t)0xA69B9B68, (q31_t)0xA4A94042, (q31_t)0xA653C302,\n    (q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA5368C4B, (q31_t)0xA5C4B855,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xA5C4B855, (q31_t)0xA5368C4B,\n    (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31, (q31_t)0xA653C302, (q31_t)0xA4A94042,\n    (q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6E3AAF2, (q31_t)0xA41CD598,\n    (q31_t)0xA72BF173, (q31_t)0xA3D6F533, (q31_t)0xA7746EC0, (q31_t)0xA3914DA7,\n    (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20, (q31_t)0xA8060D08, (q31_t)0xA306A9C7,\n    (q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA8988463, (q31_t)0xA27CEB4F,\n    (q31_t)0xA8E21106, (q31_t)0xA2386283, (q31_t)0xA92BD366, (q31_t)0xA1F41391,\n    (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2, (q31_t)0xA9BFF8A8, (q31_t)0xA16C23E1,\n    (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA54F2B9, (q31_t)0xA0E51D8C,\n    (q31_t)0xAA9FBF1D, (q31_t)0xA0A1F24C, (q31_t)0xAAEAC02B, (q31_t)0xA05F01E1,\n    (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72, (q31_t)0xAB815F8C, (q31_t)0x9FD9D22A,\n    (q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xAC18CF68, (q31_t)0x9F558FB0,\n    (q31_t)0xAC64D510, (q31_t)0x9F13C7D0, (q31_t)0xACB10E4A, (q31_t)0x9ED23BB9,\n    (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94, (q31_t)0xAD4A1ABA, (q31_t)0x9E4FD789,\n    (q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADE3F33E, (q31_t)0x9DCE6462,\n    (q31_t)0xAE312B91, (q31_t)0x9D8E0596, (q31_t)0xAE7E965B, (q31_t)0x9D4DE384,\n    (q31_t)0xAECC336B, (q31_t)0x9D0DFE53, (q31_t)0xAF1A0293, (q31_t)0x9CCE562B,\n    (q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAFB63667, (q31_t)0x9C4FBD92,\n    (q31_t)0xB0049AB2, (q31_t)0x9C10CD70, (q31_t)0xB0533055, (q31_t)0x9BD21AF2,\n    (q31_t)0xB0A1F71C, (q31_t)0x9B93A640, (q31_t)0xB0F0EEDA, (q31_t)0x9B556F80,\n    (q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB18F7070, (q31_t)0x9AD9BC71,\n    (q31_t)0xB1DEF9E8, (q31_t)0x9A9C406D, (q31_t)0xB22EB392, (q31_t)0x9A5F02F5,\n    (q31_t)0xB27E9D3B, (q31_t)0x9A22042C, (q31_t)0xB2CEB6B5, (q31_t)0x99E5443A,\n    (q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB36F784E, (q31_t)0x996C816F,\n    (q31_t)0xB3C0200C, (q31_t)0x99307EE0, (q31_t)0xB410F6D2, (q31_t)0x98F4BBBC,\n    (q31_t)0xB461FC70, (q31_t)0x98B93828, (q31_t)0xB4B330B2, (q31_t)0x987DF449,\n    (q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB556245E, (q31_t)0x98082C3B,\n    (q31_t)0xB5A7E362, (q31_t)0x97CDA855, (q31_t)0xB5F9D042, (q31_t)0x979364B5,\n    (q31_t)0xB64BEACC, (q31_t)0x9759617E, (q31_t)0xB69E32CD, (q31_t)0x971F9ED6,\n    (q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB7434A67, (q31_t)0x96ACDBBD,\n    (q31_t)0xB796199B, (q31_t)0x9673DB94, (q31_t)0xB7E9157A, (q31_t)0x963B1C85,\n    (q31_t)0xB83C3DD1, (q31_t)0x96029EB5, (q31_t)0xB88F926C, (q31_t)0x95CA6246,\n    (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB936BFA3, (q31_t)0x955AAE17,\n    (q31_t)0xB98A97D8, (q31_t)0x9523369B, (q31_t)0xB9DE9B83, (q31_t)0x94EC010B,\n    (q31_t)0xBA32CA70, (q31_t)0x94B50D87, (q31_t)0xBA87246C, (q31_t)0x947E5C32,\n    (q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB3058C0, (q31_t)0x9411C09D,\n    (q31_t)0xBB8532AF, (q31_t)0x93DBD69F, (q31_t)0xBBDA36DC, (q31_t)0x93A62F56,\n    (q31_t)0xBC2F6513, (q31_t)0x9370CAE4, (q31_t)0xBC84BD1E, (q31_t)0x933BA968,\n    (q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD2FE9E1, (q31_t)0x92D22FD8,\n    (q31_t)0xBD85BE2F, (q31_t)0x929DD805, (q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC,\n    (q31_t)0xBE31E19B, (q31_t)0x9235F2EB, (q31_t)0xBE88304F, (q31_t)0x920265E4,\n    (q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF3546A8, (q31_t)0x919C1780,\n    (q31_t)0xBF8C0DE2, (q31_t)0x91695663, (q31_t)0xBFE2FCDF, (q31_t)0x9136D97D,\n    (q31_t)0xC03A1368, (q31_t)0x9104A0ED, (q31_t)0xC0915147, (q31_t)0x90D2ACD3,\n    (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1404233, (q31_t)0x906F927B,\n    (q31_t)0xC197F4D3, (q31_t)0x903E6C7A, (q31_t)0xC1EFCDF2, (q31_t)0x900D8B69,\n    (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66, (q31_t)0xC29FF2D4, (q31_t)0x8FAC988E,\n    (q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC350AF25, (q31_t)0x8F4CBADB,\n    (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, (q31_t)0xC4020132, (q31_t)0x8EEDF33B,\n    (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB, (q31_t)0xC4B3E746, (q31_t)0x8E904298,\n    (q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5665FA8, (q31_t)0x8E33A9D9,\n    (q31_t)0xC5BFD22E, (q31_t)0x8E05C6B7, (q31_t)0xC61968A2, (q31_t)0x8DD829E4,\n    (q31_t)0xC67322CD, (q31_t)0x8DAAD37B, (q31_t)0xC6CD0079, (q31_t)0x8D7DC399,\n    (q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7812571, (q31_t)0x8D2477D8,\n    (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30, (q31_t)0xC835D5D0, (q31_t)0x8CCC477D,\n    (q31_t)0xC89061BA, (q31_t)0x8CA099D9, (q31_t)0xC8EB0FD6, (q31_t)0x8C753361,\n    (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9A0D1C4, (q31_t)0x8C1F3C5C,\n    (q31_t)0xC9FBE527, (q31_t)0x8BF4AC05, (q31_t)0xCA5719DB, (q31_t)0x8BCA6342,\n    (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F, (q31_t)0xCB0DE658, (q31_t)0x8B76A8E4,\n    (q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCBC53578, (q31_t)0x8B240E10,\n    (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA, (q31_t)0xCC7D0577, (q31_t)0x8AD29393,\n    (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4, (q31_t)0xCD355490, (q31_t)0x8A823A35,\n    (q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDEE20FC, (q31_t)0x8A3302BD,\n    (q31_t)0xCE4AB5A2, (q31_t)0x8A0BD3F5, (q31_t)0xCEA768F2, (q31_t)0x89E4EDEE,\n    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, (q31_t)0xCF612AAA, (q31_t)0x8997FC89,\n    (q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD01B6459, (q31_t)0x894C2F4C,\n    (q31_t)0xD078AD9D, (q31_t)0x8926B677, (q31_t)0xD0D61433, (q31_t)0x890186F1,\n    (q31_t)0xD13397E1, (q31_t)0x88DCA0D3, (q31_t)0xD191386D, (q31_t)0x88B80431,\n    (q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD24CCF38, (q31_t)0x886FA7C2,\n    (q31_t)0xD2AAC504, (q31_t)0x884BE820, (q31_t)0xD308D6C6, (q31_t)0x88287255,\n    (q31_t)0xD3670445, (q31_t)0x88054677, (q31_t)0xD3C54D46, (q31_t)0x87E2649B,\n    (q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD48230E8, (q31_t)0x879D7F40,\n    (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC, (q31_t)0xD53F7FDA, (q31_t)0x8759C2EF,\n    (q31_t)0xD59E4EFE, (q31_t)0x8738545E, (q31_t)0xD5FD3847, (q31_t)0x8717304E,\n    (q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD6BB585D, (q31_t)0x86D5C802,\n    (q31_t)0xD71A8EB5, (q31_t)0x86B583EE, (q31_t)0xD779DE46, (q31_t)0x86958AAB,\n    (q31_t)0xD7D946D7, (q31_t)0x8675DC4E, (q31_t)0xD838C82D, (q31_t)0x865678EA,\n    (q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8F81439, (q31_t)0x86189359,\n    (q31_t)0xD957DE7A, (q31_t)0x85FA1152, (q31_t)0xD9B7C093, (q31_t)0x85DBDA91,\n    (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27, (q31_t)0xDA77CB62, (q31_t)0x85A04F28,\n    (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB3832CD, (q31_t)0x8565F1B0,\n    (q31_t)0xDB9888A8, (q31_t)0x8549345C, (q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA,\n    (q31_t)0xDC597781, (q31_t)0x85109CDC, (q31_t)0xDCBA1008, (q31_t)0x84F4C2D3,\n    (q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD7B8220, (q31_t)0x84BDF285,\n    (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62, (q31_t)0xDE3D4963, (q31_t)0x84885257,\n    (q31_t)0xDE9E4C60, (q31_t)0x846DF476, (q31_t)0xDEFF63F4, (q31_t)0x8453E2CE,\n    (q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDFC1CFF2, (q31_t)0x8420A46B,\n    (q31_t)0xE02323E5, (q31_t)0x840777CF, (q31_t)0xE0848B7F, (q31_t)0x83EE97AC,\n    (q31_t)0xE0E60684, (q31_t)0x83D60411, (q31_t)0xE14794B9, (q31_t)0x83BDBD0D,\n    (q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE20AE9C1, (q31_t)0x838E1507,\n    (q31_t)0xE26CB01A, (q31_t)0x8376B422, (q31_t)0xE2CE88B2, (q31_t)0x835FA00E,\n    (q31_t)0xE330734C, (q31_t)0x8348D8DB, (q31_t)0xE3926FAC, (q31_t)0x83325E97,\n    (q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4569CCB, (q31_t)0x8306510F,\n    (q31_t)0xE4B8CD10, (q31_t)0x82F0BDE8, (q31_t)0xE51B0E2A, (q31_t)0x82DB77E5,\n    (q31_t)0xE57D5FDA, (q31_t)0x82C67F13, (q31_t)0xE5DFC1E4, (q31_t)0x82B1D381,\n    (q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6A4B616, (q31_t)0x8289644A,\n    (q31_t)0xE70747C3, (q31_t)0x8275A0C0, (q31_t)0xE769E8D8, (q31_t)0x82622AA5,\n    (q31_t)0xE7CC9917, (q31_t)0x824F0208, (q31_t)0xE82F5844, (q31_t)0x823C26F2,\n    (q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8F50273, (q31_t)0x8217598F,\n    (q31_t)0xE957ECFB, (q31_t)0x82056758, (q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7,\n    (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16, (q31_t)0xEA80FF79, (q31_t)0x81D16320,\n    (q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB474E80, (q31_t)0x81B03AC1,\n    (q31_t)0xEBAA894E, (q31_t)0x81A01B6C, (q31_t)0xEC0DD0A8, (q31_t)0x81904A0C,\n    (q31_t)0xEC71244F, (q31_t)0x8180C6A9, (q31_t)0xECD48406, (q31_t)0x8171914E,\n    (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED9B66B2, (q31_t)0x815410D3,\n    (q31_t)0xEDFEE92B, (q31_t)0x8145C5C6, (q31_t)0xEE6276BF, (q31_t)0x8137C8E6,\n    (q31_t)0xEEC60F31, (q31_t)0x812A1A39, (q31_t)0xEF29B243, (q31_t)0x811CB9CA,\n    (q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFF11752, (q31_t)0x8102E3C3,\n    (q31_t)0xF054D8D4, (q31_t)0x80F66E3C, (q31_t)0xF0B8A401, (q31_t)0x80EA4712,\n    (q31_t)0xF11C789A, (q31_t)0x80DE6E4C, (q31_t)0xF1805662, (q31_t)0x80D2E3F1,\n    (q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2482C89, (q31_t)0x80BCBA9C,\n    (q31_t)0xF2AC246D, (q31_t)0x80B21BAF, (q31_t)0xF310248A, (q31_t)0x80A7CB49,\n    (q31_t)0xF3742CA1, (q31_t)0x809DC970, (q31_t)0xF3D83C76, (q31_t)0x8094162B,\n    (q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF4A07260, (q31_t)0x80819B74,\n    (q31_t)0xF50497FA, (q31_t)0x8078D40D, (q31_t)0xF568C45A, (q31_t)0x80705B50,\n    (q31_t)0xF5CCF743, (q31_t)0x80683143, (q31_t)0xF6313076, (q31_t)0x806055EA,\n    (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6F9B4C5, (q31_t)0x80518B6B,\n    (q31_t)0xF75DFF65, (q31_t)0x804A9C4D, (q31_t)0xF7C24F58, (q31_t)0x8043FBF6,\n    (q31_t)0xF826A461, (q31_t)0x803DAA69, (q31_t)0xF88AFE41, (q31_t)0x8037A7AC,\n    (q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF953BF90, (q31_t)0x802C8EAD,\n    (q31_t)0xF9B82683, (q31_t)0x80277872, (q31_t)0xFA1C9156, (q31_t)0x8022B113,\n    (q31_t)0xFA80FFCB, (q31_t)0x801E3894, (q31_t)0xFAE571A4, (q31_t)0x801A0EF7,\n    (q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFBAE5E89, (q31_t)0x8012A86F,\n    (q31_t)0xFC12D919, (q31_t)0x800F6B88, (q31_t)0xFC775616, (q31_t)0x800C7D8C,\n    (q31_t)0xFCDBD541, (q31_t)0x8009DE7D, (q31_t)0xFD40565B, (q31_t)0x80078E5E,\n    (q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE095D69, (q31_t)0x8003DAF0,\n    (q31_t)0xFE6DE2E0, (q31_t)0x800277A5, (q31_t)0xFED2694F, (q31_t)0x8001634D,\n    (q31_t)0xFF36F078, (q31_t)0x80009DE9, (q31_t)0xFF9B781D, (q31_t)0x8000277A};\n\n/**\n  @par\n  Example code for Q31 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 4096, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to Q31(Fixed point 1.31):\n        round(twiddleCoefQ31(i) * pow(2, 31))\n */\nconst q31_t twiddleCoef_4096_q31[6144] = {\n    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFF621, (q31_t)0x003243F5,\n    (q31_t)0x7FFFD885, (q31_t)0x006487E3, (q31_t)0x7FFFA72C, (q31_t)0x0096CBC1,\n    (q31_t)0x7FFF6216, (q31_t)0x00C90F88, (q31_t)0x7FFF0942, (q31_t)0x00FB532F,\n    (q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFE1C64, (q31_t)0x015FDA03,\n    (q31_t)0x7FFD885A, (q31_t)0x01921D1F, (q31_t)0x7FFCE093, (q31_t)0x01C45FFE,\n    (q31_t)0x7FFC250F, (q31_t)0x01F6A296, (q31_t)0x7FFB55CE, (q31_t)0x0228E4E1,\n    (q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF97C17, (q31_t)0x028D6870,\n    (q31_t)0x7FF871A1, (q31_t)0x02BFA9A4, (q31_t)0x7FF7536F, (q31_t)0x02F1EA6B,\n    (q31_t)0x7FF62182, (q31_t)0x03242ABF, (q31_t)0x7FF4DBD8, (q31_t)0x03566A96,\n    (q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF21553, (q31_t)0x03BAE8B1,\n    (q31_t)0x7FF09477, (q31_t)0x03ED26E6, (q31_t)0x7FEEFFE1, (q31_t)0x041F647F,\n    (q31_t)0x7FED5790, (q31_t)0x0451A176, (q31_t)0x7FEB9B85, (q31_t)0x0483DDC3,\n    (q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE7E840, (q31_t)0x04E8543D,\n    (q31_t)0x7FE5F108, (q31_t)0x051A8E5C, (q31_t)0x7FE3E616, (q31_t)0x054CC7B0,\n    (q31_t)0x7FE1C76B, (q31_t)0x057F0034, (q31_t)0x7FDF9508, (q31_t)0x05B137DF,\n    (q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FDAF518, (q31_t)0x0615A48A,\n    (q31_t)0x7FD8878D, (q31_t)0x0647D97C, (q31_t)0x7FD6064B, (q31_t)0x067A0D75,\n    (q31_t)0x7FD37152, (q31_t)0x06AC406F, (q31_t)0x7FD0C8A3, (q31_t)0x06DE7261,\n    (q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FCB3C23, (q31_t)0x0742D310,\n    (q31_t)0x7FC85853, (q31_t)0x077501BE, (q31_t)0x7FC560CF, (q31_t)0x07A72F45,\n    (q31_t)0x7FC25596, (q31_t)0x07D95B9E, (q31_t)0x7FBF36A9, (q31_t)0x080B86C1,\n    (q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB8BDB7, (q31_t)0x086FD947,\n    (q31_t)0x7FB563B2, (q31_t)0x08A2009A, (q31_t)0x7FB1F5FC, (q31_t)0x08D42698,\n    (q31_t)0x7FAE7494, (q31_t)0x09064B3A, (q31_t)0x7FAADF7C, (q31_t)0x09386E77,\n    (q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7FA37A3C, (q31_t)0x099CB0A7,\n    (q31_t)0x7F9FAA15, (q31_t)0x09CECF89, (q31_t)0x7F9BC63F, (q31_t)0x0A00ECE8,\n    (q31_t)0x7F97CEBC, (q31_t)0x0A3308BC, (q31_t)0x7F93C38C, (q31_t)0x0A6522FE,\n    (q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F8B7226, (q31_t)0x0AC952AA,\n    (q31_t)0x7F872BF3, (q31_t)0x0AFB6805, (q31_t)0x7F82D214, (q31_t)0x0B2D7BAE,\n    (q31_t)0x7F7E648B, (q31_t)0x0B5F8D9F, (q31_t)0x7F79E35A, (q31_t)0x0B919DCE,\n    (q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F70A5FD, (q31_t)0x0BF5B8CB,\n    (q31_t)0x7F6BE9D4, (q31_t)0x0C27C389, (q31_t)0x7F671A04, (q31_t)0x0C59CC67,\n    (q31_t)0x7F62368F, (q31_t)0x0C8BD35E, (q31_t)0x7F5D3F75, (q31_t)0x0CBDD865,\n    (q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F531654, (q31_t)0x0D21DC87,\n    (q31_t)0x7F4DE450, (q31_t)0x0D53DB92, (q31_t)0x7F489EAA, (q31_t)0x0D85D88F,\n    (q31_t)0x7F434563, (q31_t)0x0DB7D376, (q31_t)0x7F3DD87C, (q31_t)0x0DE9CC3F,\n    (q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F32C3D0, (q31_t)0x0E4DB75B,\n    (q31_t)0x7F2D1C0E, (q31_t)0x0E7FA99D, (q31_t)0x7F2760AF, (q31_t)0x0EB199A3,\n    (q31_t)0x7F2191B4, (q31_t)0x0EE38765, (q31_t)0x7F1BAF1E, (q31_t)0x0F1572DC,\n    (q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0FAF24, (q31_t)0x0F7942C6,\n    (q31_t)0x7F0991C3, (q31_t)0x0FAB272B, (q31_t)0x7F0360CB, (q31_t)0x0FDD0925,\n    (q31_t)0x7EFD1C3C, (q31_t)0x100EE8AD, (q31_t)0x7EF6C418, (q31_t)0x1040C5BB,\n    (q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE9D913, (q31_t)0x10A4784A,\n    (q31_t)0x7EE34635, (q31_t)0x10D64DBC, (q31_t)0x7EDC9FC6, (q31_t)0x11082096,\n    (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE, (q31_t)0x7ECF1837, (q31_t)0x116BBE5F,\n    (q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EC1426F, (q31_t)0x11CF516A,\n    (q31_t)0x7EBA3A39, (q31_t)0x120116D4, (q31_t)0x7EB31E77, (q31_t)0x1232D978,\n    (q31_t)0x7EABEF2C, (q31_t)0x1264994E, (q31_t)0x7EA4AC58, (q31_t)0x1296564D,\n    (q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E95EC19, (q31_t)0x12F9C7AA,\n    (q31_t)0x7E8E6EB1, (q31_t)0x132B7BF9, (q31_t)0x7E86DDC5, (q31_t)0x135D2D53,\n    (q31_t)0x7E7F3956, (q31_t)0x138EDBB0, (q31_t)0x7E778165, (q31_t)0x13C0870A,\n    (q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E67D702, (q31_t)0x1423D492,\n    (q31_t)0x7E5FE493, (q31_t)0x145576B1, (q31_t)0x7E57DEA6, (q31_t)0x148715AD,\n    (q31_t)0x7E4FC53E, (q31_t)0x14B8B17F, (q31_t)0x7E47985B, (q31_t)0x14EA4A1F,\n    (q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E37042A, (q31_t)0x154D71AA,\n    (q31_t)0x7E2E9CDF, (q31_t)0x157F0086, (q31_t)0x7E26221E, (q31_t)0x15B08C11,\n    (q31_t)0x7E1D93E9, (q31_t)0x15E21444, (q31_t)0x7E14F242, (q31_t)0x16139917,\n    (q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7E03749F, (q31_t)0x1676987F,\n    (q31_t)0x7DFA98A7, (q31_t)0x16A81305, (q31_t)0x7DF1A942, (q31_t)0x16D98A0C,\n    (q31_t)0x7DE8A670, (q31_t)0x170AFD8D, (q31_t)0x7DDF9034, (q31_t)0x173C6D80,\n    (q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DCD2981, (q31_t)0x179F429F,\n    (q31_t)0x7DC3D90D, (q31_t)0x17D0A7BB, (q31_t)0x7DBA7534, (q31_t)0x1802092C,\n    (q31_t)0x7DB0FDF7, (q31_t)0x183366E8, (q31_t)0x7DA77359, (q31_t)0x1864C0E9,\n    (q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D9423FB, (q31_t)0x18C7699B,\n    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C, (q31_t)0x7D808727, (q31_t)0x192A0303,\n    (q31_t)0x7D769BB5, (q31_t)0x195B49E9, (q31_t)0x7D6C9CE9, (q31_t)0x198C8CE6,\n    (q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D58654C, (q31_t)0x19EF0706,\n    (q31_t)0x7D4E2C7E, (q31_t)0x1A203E1B, (q31_t)0x7D43E05E, (q31_t)0x1A517127,\n    (q31_t)0x7D3980EC, (q31_t)0x1A82A025, (q31_t)0x7D2F0E2A, (q31_t)0x1AB3CB0C,\n    (q31_t)0x7D24881A, (q31_t)0x1AE4F1D6, (q31_t)0x7D19EEBE, (q31_t)0x1B161479,\n    (q31_t)0x7D0F4218, (q31_t)0x1B4732EF, (q31_t)0x7D048228, (q31_t)0x1B784D30,\n    (q31_t)0x7CF9AEF0, (q31_t)0x1BA96334, (q31_t)0x7CEEC873, (q31_t)0x1BDA74F5,\n    (q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CD8C1AD, (q31_t)0x1C3C8B8C,\n    (q31_t)0x7CCDA168, (q31_t)0x1C6D9053, (q31_t)0x7CC26DE5, (q31_t)0x1C9E90B8,\n    (q31_t)0x7CB72724, (q31_t)0x1CCF8CB3, (q31_t)0x7CABCD27, (q31_t)0x1D00843C,\n    (q31_t)0x7CA05FF1, (q31_t)0x1D31774D, (q31_t)0x7C94DF82, (q31_t)0x1D6265DD,\n    (q31_t)0x7C894BDD, (q31_t)0x1D934FE5, (q31_t)0x7C7DA504, (q31_t)0x1DC4355D,\n    (q31_t)0x7C71EAF8, (q31_t)0x1DF5163F, (q31_t)0x7C661DBB, (q31_t)0x1E25F281,\n    (q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4E49B6, (q31_t)0x1E879D0C,\n    (q31_t)0x7C4242F2, (q31_t)0x1EB86B46, (q31_t)0x7C362904, (q31_t)0x1EE934C2,\n    (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B, (q31_t)0x7C1DBBB2, (q31_t)0x1F4AB967,\n    (q31_t)0x7C116853, (q31_t)0x1F7B7480, (q31_t)0x7C0501D1, (q31_t)0x1FAC2ABF,\n    (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A, (q31_t)0x7BEBFB70, (q31_t)0x200D888C,\n    (q31_t)0x7BDF5B94, (q31_t)0x203E300D, (q31_t)0x7BD2A89E, (q31_t)0x206ED295,\n    (q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7BB9096A, (q31_t)0x20D0089B,\n    (q31_t)0x7BAC1D31, (q31_t)0x21009C0B, (q31_t)0x7B9F1DE5, (q31_t)0x21312A65,\n    (q31_t)0x7B920B89, (q31_t)0x2161B39F, (q31_t)0x7B84E61E, (q31_t)0x219237B4,\n    (q31_t)0x7B77ADA8, (q31_t)0x21C2B69C, (q31_t)0x7B6A6227, (q31_t)0x21F3304E,\n    (q31_t)0x7B5D039D, (q31_t)0x2223A4C5, (q31_t)0x7B4F920E, (q31_t)0x225413F8,\n    (q31_t)0x7B420D7A, (q31_t)0x22847DDF, (q31_t)0x7B3475E4, (q31_t)0x22B4E274,\n    (q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7B190DBB, (q31_t)0x23159B87,\n    (q31_t)0x7B0B3D2C, (q31_t)0x2345EFF7, (q31_t)0x7AFD59A3, (q31_t)0x23763EF7,\n    (q31_t)0x7AEF6323, (q31_t)0x23A6887E, (q31_t)0x7AE159AE, (q31_t)0x23D6CC86,\n    (q31_t)0x7AD33D45, (q31_t)0x24070B07, (q31_t)0x7AC50DEB, (q31_t)0x243743FA,\n    (q31_t)0x7AB6CBA3, (q31_t)0x24677757, (q31_t)0x7AA8766E, (q31_t)0x2497A517,\n    (q31_t)0x7A9A0E4F, (q31_t)0x24C7CD32, (q31_t)0x7A8B9348, (q31_t)0x24F7EFA1,\n    (q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A6E648A, (q31_t)0x2558235E,\n    (q31_t)0x7A5FB0D8, (q31_t)0x2588349D, (q31_t)0x7A50EA46, (q31_t)0x25B84012,\n    (q31_t)0x7A4210D8, (q31_t)0x25E845B5, (q31_t)0x7A33248F, (q31_t)0x26184581,\n    (q31_t)0x7A24256E, (q31_t)0x26483F6C, (q31_t)0x7A151377, (q31_t)0x26783370,\n    (q31_t)0x7A05EEAD, (q31_t)0x26A82185, (q31_t)0x79F6B711, (q31_t)0x26D809A5,\n    (q31_t)0x79E76CA6, (q31_t)0x2707EBC6, (q31_t)0x79D80F6F, (q31_t)0x2737C7E3,\n    (q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x79B91CA4, (q31_t)0x27976DF1,\n    (q31_t)0x79A98715, (q31_t)0x27C737D2, (q31_t)0x7999DEC3, (q31_t)0x27F6FB92,\n    (q31_t)0x798A23B1, (q31_t)0x2826B928, (q31_t)0x797A55E0, (q31_t)0x2856708C,\n    (q31_t)0x796A7554, (q31_t)0x288621B9, (q31_t)0x795A820E, (q31_t)0x28B5CCA5,\n    (q31_t)0x794A7C11, (q31_t)0x28E5714A, (q31_t)0x793A6360, (q31_t)0x29150FA1,\n    (q31_t)0x792A37FE, (q31_t)0x2944A7A2, (q31_t)0x7919F9EB, (q31_t)0x29743945,\n    (q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78F945C3, (q31_t)0x29D34958,\n    (q31_t)0x78E8CFB1, (q31_t)0x2A02C7B8, (q31_t)0x78D846FB, (q31_t)0x2A323F9D,\n    (q31_t)0x78C7ABA1, (q31_t)0x2A61B101, (q31_t)0x78B6FDA8, (q31_t)0x2A911BDB,\n    (q31_t)0x78A63D10, (q31_t)0x2AC08025, (q31_t)0x789569DE, (q31_t)0x2AEFDDD8,\n    (q31_t)0x78848413, (q31_t)0x2B1F34EB, (q31_t)0x78738BB3, (q31_t)0x2B4E8558,\n    (q31_t)0x786280BF, (q31_t)0x2B7DCF17, (q31_t)0x7851633B, (q31_t)0x2BAD1221,\n    (q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x782EF08B, (q31_t)0x2C0B83F9,\n    (q31_t)0x781D9B64, (q31_t)0x2C3AB2B9, (q31_t)0x780C33B8, (q31_t)0x2C69DAA6,\n    (q31_t)0x77FAB988, (q31_t)0x2C98FBBA, (q31_t)0x77E92CD8, (q31_t)0x2CC815ED,\n    (q31_t)0x77D78DAA, (q31_t)0x2CF72939, (q31_t)0x77C5DC01, (q31_t)0x2D263595,\n    (q31_t)0x77B417DF, (q31_t)0x2D553AFB, (q31_t)0x77A24148, (q31_t)0x2D843963,\n    (q31_t)0x7790583D, (q31_t)0x2DB330C7, (q31_t)0x777E5CC3, (q31_t)0x2DE2211E,\n    (q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x775A2E88, (q31_t)0x2E3FEC8B,\n    (q31_t)0x7747FBCE, (q31_t)0x2E6EC792, (q31_t)0x7735B6AE, (q31_t)0x2E9D9B70,\n    (q31_t)0x77235F2D, (q31_t)0x2ECC681E, (q31_t)0x7710F54B, (q31_t)0x2EFB2D94,\n    (q31_t)0x76FE790E, (q31_t)0x2F29EBCC, (q31_t)0x76EBEA77, (q31_t)0x2F58A2BD,\n    (q31_t)0x76D94988, (q31_t)0x2F875262, (q31_t)0x76C69646, (q31_t)0x2FB5FAB2,\n    (q31_t)0x76B3D0B3, (q31_t)0x2FE49BA6, (q31_t)0x76A0F8D2, (q31_t)0x30133538,\n    (q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x767B1230, (q31_t)0x30705217,\n    (q31_t)0x76680376, (q31_t)0x309ED555, (q31_t)0x7654E279, (q31_t)0x30CD5114,\n    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D, (q31_t)0x762E69C3, (q31_t)0x312A31F8,\n    (q31_t)0x761B1211, (q31_t)0x3158970D, (q31_t)0x7607A827, (q31_t)0x3186F487,\n    (q31_t)0x75F42C0A, (q31_t)0x31B54A5D, (q31_t)0x75E09DBD, (q31_t)0x31E39889,\n    (q31_t)0x75CCFD42, (q31_t)0x3211DF03, (q31_t)0x75B94A9C, (q31_t)0x32401DC5,\n    (q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7591AEDD, (q31_t)0x329C8402,\n    (q31_t)0x757DC5CA, (q31_t)0x32CAAB6F, (q31_t)0x7569CA98, (q31_t)0x32F8CB07,\n    (q31_t)0x7555BD4B, (q31_t)0x3326E2C2, (q31_t)0x75419DE6, (q31_t)0x3354F29A,\n    (q31_t)0x752D6C6C, (q31_t)0x3382FA88, (q31_t)0x751928E0, (q31_t)0x33B0FA84,\n    (q31_t)0x7504D345, (q31_t)0x33DEF287, (q31_t)0x74F06B9E, (q31_t)0x340CE28A,\n    (q31_t)0x74DBF1EF, (q31_t)0x343ACA87, (q31_t)0x74C7663A, (q31_t)0x3468AA76,\n    (q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x749E18CD, (q31_t)0x34C4520D,\n    (q31_t)0x7489571B, (q31_t)0x34F219A7, (q31_t)0x74748371, (q31_t)0x351FD917,\n    (q31_t)0x745F9DD1, (q31_t)0x354D9056, (q31_t)0x744AA63E, (q31_t)0x357B3F5D,\n    (q31_t)0x74359CBD, (q31_t)0x35A8E624, (q31_t)0x74208150, (q31_t)0x35D684A5,\n    (q31_t)0x740B53FA, (q31_t)0x36041AD9, (q31_t)0x73F614C0, (q31_t)0x3631A8B7,\n    (q31_t)0x73E0C3A3, (q31_t)0x365F2E3B, (q31_t)0x73CB60A7, (q31_t)0x368CAB5C,\n    (q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x73A06522, (q31_t)0x36E78C5A,\n    (q31_t)0x738ACC9E, (q31_t)0x3714F02A, (q31_t)0x73752249, (q31_t)0x37424B7A,\n    (q31_t)0x735F6626, (q31_t)0x376F9E46, (q31_t)0x73499838, (q31_t)0x379CE884,\n    (q31_t)0x7333B883, (q31_t)0x37CA2A30, (q31_t)0x731DC709, (q31_t)0x37F76340,\n    (q31_t)0x7307C3D0, (q31_t)0x382493B0, (q31_t)0x72F1AED8, (q31_t)0x3851BB76,\n    (q31_t)0x72DB8828, (q31_t)0x387EDA8E, (q31_t)0x72C54FC0, (q31_t)0x38ABF0EF,\n    (q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x7298A9DC, (q31_t)0x39060372,\n    (q31_t)0x72823C66, (q31_t)0x3932FF87, (q31_t)0x726BBD48, (q31_t)0x395FF2C9,\n    (q31_t)0x72552C84, (q31_t)0x398CDD32, (q31_t)0x723E8A1F, (q31_t)0x39B9BEBB,\n    (q31_t)0x7227D61C, (q31_t)0x39E6975D, (q31_t)0x7211107D, (q31_t)0x3A136712,\n    (q31_t)0x71FA3948, (q31_t)0x3A402DD1, (q31_t)0x71E3507F, (q31_t)0x3A6CEB95,\n    (q31_t)0x71CC5626, (q31_t)0x3A99A057, (q31_t)0x71B54A40, (q31_t)0x3AC64C0F,\n    (q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x7186FDDE, (q31_t)0x3B1F8847,\n    (q31_t)0x716FBD68, (q31_t)0x3B4C18BA, (q31_t)0x71586B73, (q31_t)0x3B78A007,\n    (q31_t)0x71410804, (q31_t)0x3BA51E29, (q31_t)0x7129931E, (q31_t)0x3BD19317,\n    (q31_t)0x71120CC5, (q31_t)0x3BFDFECD, (q31_t)0x70FA74FB, (q31_t)0x3C2A6142,\n    (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70, (q31_t)0x70CB1127, (q31_t)0x3C830A4F,\n    (q31_t)0x70B34524, (q31_t)0x3CAF50DA, (q31_t)0x709B67C0, (q31_t)0x3CDB8E09,\n    (q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x706B78E3, (q31_t)0x3D33EC39,\n    (q31_t)0x70536771, (q31_t)0x3D600D2B, (q31_t)0x703B44AC, (q31_t)0x3D8C24A7,\n    (q31_t)0x70231099, (q31_t)0x3DB832A5, (q31_t)0x700ACB3B, (q31_t)0x3DE4371F,\n    (q31_t)0x6FF27496, (q31_t)0x3E10320D, (q31_t)0x6FDA0CAD, (q31_t)0x3E3C2369,\n    (q31_t)0x6FC19385, (q31_t)0x3E680B2C, (q31_t)0x6FA90920, (q31_t)0x3E93E94F,\n    (q31_t)0x6F906D84, (q31_t)0x3EBFBDCC, (q31_t)0x6F77C0B3, (q31_t)0x3EEB889C,\n    (q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6F463383, (q31_t)0x3F430118,\n    (q31_t)0x6F2D532C, (q31_t)0x3F6EAEB8, (q31_t)0x6F1461AF, (q31_t)0x3F9A528F,\n    (q31_t)0x6EFB5F12, (q31_t)0x3FC5EC97, (q31_t)0x6EE24B57, (q31_t)0x3FF17CCA,\n    (q31_t)0x6EC92682, (q31_t)0x401D0320, (q31_t)0x6EAFF098, (q31_t)0x40487F93,\n    (q31_t)0x6E96A99C, (q31_t)0x4073F21D, (q31_t)0x6E7D5193, (q31_t)0x409F5AB6,\n    (q31_t)0x6E63E87F, (q31_t)0x40CAB957, (q31_t)0x6E4A6E65, (q31_t)0x40F60DFB,\n    (q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6E17472F, (q31_t)0x414C992E,\n    (q31_t)0x6DFD9A1B, (q31_t)0x4177CFB0, (q31_t)0x6DE3DC11, (q31_t)0x41A2FC1A,\n    (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64, (q31_t)0x6DB02D29, (q31_t)0x41F93688,\n    (q31_t)0x6D963C54, (q31_t)0x42244480, (q31_t)0x6D7C3A98, (q31_t)0x424F4845,\n    (q31_t)0x6D6227FA, (q31_t)0x427A41D0, (q31_t)0x6D48047E, (q31_t)0x42A5311A,\n    (q31_t)0x6D2DD027, (q31_t)0x42D0161E, (q31_t)0x6D138AFA, (q31_t)0x42FAF0D4,\n    (q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6CDECE2E, (q31_t)0x4350873C,\n    (q31_t)0x6CC45697, (q31_t)0x437B42E1, (q31_t)0x6CA9CE3A, (q31_t)0x43A5F41E,\n    (q31_t)0x6C8F351C, (q31_t)0x43D09AEC, (q31_t)0x6C748B3F, (q31_t)0x43FB3745,\n    (q31_t)0x6C59D0A9, (q31_t)0x4425C923, (q31_t)0x6C3F055D, (q31_t)0x4450507E,\n    (q31_t)0x6C242960, (q31_t)0x447ACD50, (q31_t)0x6C093CB6, (q31_t)0x44A53F93,\n    (q31_t)0x6BEE3F62, (q31_t)0x44CFA73F, (q31_t)0x6BD3316A, (q31_t)0x44FA044F,\n    (q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B9CE39B, (q31_t)0x454E9E80,\n    (q31_t)0x6B81A3CD, (q31_t)0x4578DB93, (q31_t)0x6B66536A, (q31_t)0x45A30DF0,\n    (q31_t)0x6B4AF278, (q31_t)0x45CD358F, (q31_t)0x6B2F80FA, (q31_t)0x45F7526B,\n    (q31_t)0x6B13FEF5, (q31_t)0x4621647C, (q31_t)0x6AF86C6C, (q31_t)0x464B6BBD,\n    (q31_t)0x6ADCC964, (q31_t)0x46756827, (q31_t)0x6AC115E1, (q31_t)0x469F59B4,\n    (q31_t)0x6AA551E8, (q31_t)0x46C9405C, (q31_t)0x6A897D7D, (q31_t)0x46F31C1A,\n    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x6A51A361, (q31_t)0x4746B2BC,\n    (q31_t)0x6A359DB9, (q31_t)0x47706D93, (q31_t)0x6A1987B0, (q31_t)0x479A1D66,\n    (q31_t)0x69FD614A, (q31_t)0x47C3C22E, (q31_t)0x69E12A8C, (q31_t)0x47ED5BE6,\n    (q31_t)0x69C4E37A, (q31_t)0x4816EA85, (q31_t)0x69A88C18, (q31_t)0x48406E07,\n    (q31_t)0x698C246C, (q31_t)0x4869E664, (q31_t)0x696FAC78, (q31_t)0x48935397,\n    (q31_t)0x69532442, (q31_t)0x48BCB598, (q31_t)0x69368BCE, (q31_t)0x48E60C62,\n    (q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68FD2A3D, (q31_t)0x49389836,\n    (q31_t)0x68E06129, (q31_t)0x4961CD32, (q31_t)0x68C387E9, (q31_t)0x498AF6DE,\n    (q31_t)0x68A69E81, (q31_t)0x49B41533, (q31_t)0x6889A4F5, (q31_t)0x49DD282A,\n    (q31_t)0x686C9B4B, (q31_t)0x4A062FBD, (q31_t)0x684F8186, (q31_t)0x4A2F2BE5,\n    (q31_t)0x683257AA, (q31_t)0x4A581C9D, (q31_t)0x68151DBE, (q31_t)0x4A8101DE,\n    (q31_t)0x67F7D3C4, (q31_t)0x4AA9DBA1, (q31_t)0x67DA79C2, (q31_t)0x4AD2A9E1,\n    (q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x679F95B7, (q31_t)0x4B2423BD,\n    (q31_t)0x67820BB6, (q31_t)0x4B4CCF4D, (q31_t)0x676471C0, (q31_t)0x4B756F3F,\n    (q31_t)0x6746C7D7, (q31_t)0x4B9E038F, (q31_t)0x67290E02, (q31_t)0x4BC68C36,\n    (q31_t)0x670B4443, (q31_t)0x4BEF092D, (q31_t)0x66ED6AA1, (q31_t)0x4C177A6E,\n    (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3, (q31_t)0x66B187C3, (q31_t)0x4C6839B6,\n    (q31_t)0x66937E90, (q31_t)0x4C9087B1, (q31_t)0x6675658C, (q31_t)0x4CB8C9DD,\n    (q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x66390422, (q31_t)0x4D092AB0,\n    (q31_t)0x661ABBC5, (q31_t)0x4D31494B, (q31_t)0x65FC63A9, (q31_t)0x4D595BFE,\n    (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4, (q31_t)0x65BF8447, (q31_t)0x4DA95D96,\n    (q31_t)0x65A0FD0B, (q31_t)0x4DD14C6E, (q31_t)0x65826622, (q31_t)0x4DF92F45,\n    (q31_t)0x6563BF92, (q31_t)0x4E210617, (q31_t)0x6545095F, (q31_t)0x4E48D0DC,\n    (q31_t)0x6526438E, (q31_t)0x4E708F8F, (q31_t)0x65076E24, (q31_t)0x4E984229,\n    (q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x64C99498, (q31_t)0x4EE782FA,\n    (q31_t)0x64AA907F, (q31_t)0x4F0F1126, (q31_t)0x648B7CDF, (q31_t)0x4F369320,\n    (q31_t)0x646C59BF, (q31_t)0x4F5E08E3, (q31_t)0x644D2722, (q31_t)0x4F857268,\n    (q31_t)0x642DE50D, (q31_t)0x4FACCFAB, (q31_t)0x640E9385, (q31_t)0x4FD420A3,\n    (q31_t)0x63EF328F, (q31_t)0x4FFB654D, (q31_t)0x63CFC230, (q31_t)0x50229DA0,\n    (q31_t)0x63B0426D, (q31_t)0x5049C999, (q31_t)0x6390B34A, (q31_t)0x5070E92F,\n    (q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x635166F8, (q31_t)0x50BF031F,\n    (q31_t)0x6331A9D4, (q31_t)0x50E5FD6C, (q31_t)0x6311DD63, (q31_t)0x510CEB40,\n    (q31_t)0x62F201AC, (q31_t)0x5133CC94, (q31_t)0x62D216B2, (q31_t)0x515AA162,\n    (q31_t)0x62B21C7B, (q31_t)0x518169A4, (q31_t)0x6292130C, (q31_t)0x51A82555,\n    (q31_t)0x6271FA69, (q31_t)0x51CED46E, (q31_t)0x6251D297, (q31_t)0x51F576E9,\n    (q31_t)0x62319B9D, (q31_t)0x521C0CC1, (q31_t)0x6211557D, (q31_t)0x524295EF,\n    (q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x61D09BE5, (q31_t)0x528F8237,\n    (q31_t)0x61B02876, (q31_t)0x52B5E545, (q31_t)0x618FA5F6, (q31_t)0x52DC3B92,\n    (q31_t)0x616F146B, (q31_t)0x53028517, (q31_t)0x614E73D9, (q31_t)0x5328C1D0,\n    (q31_t)0x612DC446, (q31_t)0x534EF1B5, (q31_t)0x610D05B7, (q31_t)0x537514C1,\n    (q31_t)0x60EC3830, (q31_t)0x539B2AEF, (q31_t)0x60CB5BB6, (q31_t)0x53C13438,\n    (q31_t)0x60AA704F, (q31_t)0x53E73097, (q31_t)0x60897600, (q31_t)0x540D2005,\n    (q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x604754BE, (q31_t)0x5458D7F9,\n    (q31_t)0x60262DD5, (q31_t)0x547EA073, (q31_t)0x6004F818, (q31_t)0x54A45BE5,\n    (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A, (q31_t)0x5FC26038, (q31_t)0x54EFAB9C,\n    (q31_t)0x5FA0FE1E, (q31_t)0x55153FD4, (q31_t)0x5F7F8D46, (q31_t)0x553AC6ED,\n    (q31_t)0x5F5E0DB3, (q31_t)0x556040E2, (q31_t)0x5F3C7F6B, (q31_t)0x5585ADAC,\n    (q31_t)0x5F1AE273, (q31_t)0x55AB0D46, (q31_t)0x5EF936D1, (q31_t)0x55D05FAA,\n    (q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5EB5B3A1, (q31_t)0x561ADCB8,\n    (q31_t)0x5E93DC1F, (q31_t)0x56400757, (q31_t)0x5E71F606, (q31_t)0x566524AA,\n    (q31_t)0x5E50015D, (q31_t)0x568A34A9, (q31_t)0x5E2DFE28, (q31_t)0x56AF3750,\n    (q31_t)0x5E0BEC6E, (q31_t)0x56D42C99, (q31_t)0x5DE9CC32, (q31_t)0x56F9147E,\n    (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9, (q31_t)0x5DA5604E, (q31_t)0x5742BC05,\n    (q31_t)0x5D8314B0, (q31_t)0x57677B9D, (q31_t)0x5D60BAA6, (q31_t)0x578C2DB9,\n    (q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5D1BDB65, (q31_t)0x57D5696C,\n    (q31_t)0x5CF95638, (q31_t)0x57F9F2F7, (q31_t)0x5CD6C2B4, (q31_t)0x581E6EF1,\n    (q31_t)0x5CB420DF, (q31_t)0x5842DD54, (q31_t)0x5C9170BF, (q31_t)0x58673E1B,\n    (q31_t)0x5C6EB258, (q31_t)0x588B913F, (q31_t)0x5C4BE5B0, (q31_t)0x58AFD6BC,\n    (q31_t)0x5C290ACC, (q31_t)0x58D40E8C, (q31_t)0x5C0621B2, (q31_t)0x58F838A9,\n    (q31_t)0x5BE32A67, (q31_t)0x591C550E, (q31_t)0x5BC024F0, (q31_t)0x594063B4,\n    (q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B79EF96, (q31_t)0x598857B1,\n    (q31_t)0x5B56BFBD, (q31_t)0x59AC3CFD, (q31_t)0x5B3381CE, (q31_t)0x59D01474,\n    (q31_t)0x5B1035CF, (q31_t)0x59F3DE12, (q31_t)0x5AECDBC4, (q31_t)0x5A1799D0,\n    (q31_t)0x5AC973B4, (q31_t)0x5A3B47AA, (q31_t)0x5AA5FDA4, (q31_t)0x5A5EE79A,\n    (q31_t)0x5A82799A, (q31_t)0x5A82799A, (q31_t)0x5A5EE79A, (q31_t)0x5AA5FDA4,\n    (q31_t)0x5A3B47AA, (q31_t)0x5AC973B4, (q31_t)0x5A1799D0, (q31_t)0x5AECDBC4,\n    (q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59D01474, (q31_t)0x5B3381CE,\n    (q31_t)0x59AC3CFD, (q31_t)0x5B56BFBD, (q31_t)0x598857B1, (q31_t)0x5B79EF96,\n    (q31_t)0x59646497, (q31_t)0x5B9D1153, (q31_t)0x594063B4, (q31_t)0x5BC024F0,\n    (q31_t)0x591C550E, (q31_t)0x5BE32A67, (q31_t)0x58F838A9, (q31_t)0x5C0621B2,\n    (q31_t)0x58D40E8C, (q31_t)0x5C290ACC, (q31_t)0x58AFD6BC, (q31_t)0x5C4BE5B0,\n    (q31_t)0x588B913F, (q31_t)0x5C6EB258, (q31_t)0x58673E1B, (q31_t)0x5C9170BF,\n    (q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x581E6EF1, (q31_t)0x5CD6C2B4,\n    (q31_t)0x57F9F2F7, (q31_t)0x5CF95638, (q31_t)0x57D5696C, (q31_t)0x5D1BDB65,\n    (q31_t)0x57B0D256, (q31_t)0x5D3E5236, (q31_t)0x578C2DB9, (q31_t)0x5D60BAA6,\n    (q31_t)0x57677B9D, (q31_t)0x5D8314B0, (q31_t)0x5742BC05, (q31_t)0x5DA5604E,\n    (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C, (q31_t)0x56F9147E, (q31_t)0x5DE9CC32,\n    (q31_t)0x56D42C99, (q31_t)0x5E0BEC6E, (q31_t)0x56AF3750, (q31_t)0x5E2DFE28,\n    (q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x566524AA, (q31_t)0x5E71F606,\n    (q31_t)0x56400757, (q31_t)0x5E93DC1F, (q31_t)0x561ADCB8, (q31_t)0x5EB5B3A1,\n    (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89, (q31_t)0x55D05FAA, (q31_t)0x5EF936D1,\n    (q31_t)0x55AB0D46, (q31_t)0x5F1AE273, (q31_t)0x5585ADAC, (q31_t)0x5F3C7F6B,\n    (q31_t)0x556040E2, (q31_t)0x5F5E0DB3, (q31_t)0x553AC6ED, (q31_t)0x5F7F8D46,\n    (q31_t)0x55153FD4, (q31_t)0x5FA0FE1E, (q31_t)0x54EFAB9C, (q31_t)0x5FC26038,\n    (q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x54A45BE5, (q31_t)0x6004F818,\n    (q31_t)0x547EA073, (q31_t)0x60262DD5, (q31_t)0x5458D7F9, (q31_t)0x604754BE,\n    (q31_t)0x5433027D, (q31_t)0x60686CCE, (q31_t)0x540D2005, (q31_t)0x60897600,\n    (q31_t)0x53E73097, (q31_t)0x60AA704F, (q31_t)0x53C13438, (q31_t)0x60CB5BB6,\n    (q31_t)0x539B2AEF, (q31_t)0x60EC3830, (q31_t)0x537514C1, (q31_t)0x610D05B7,\n    (q31_t)0x534EF1B5, (q31_t)0x612DC446, (q31_t)0x5328C1D0, (q31_t)0x614E73D9,\n    (q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x52DC3B92, (q31_t)0x618FA5F6,\n    (q31_t)0x52B5E545, (q31_t)0x61B02876, (q31_t)0x528F8237, (q31_t)0x61D09BE5,\n    (q31_t)0x5269126E, (q31_t)0x61F1003E, (q31_t)0x524295EF, (q31_t)0x6211557D,\n    (q31_t)0x521C0CC1, (q31_t)0x62319B9D, (q31_t)0x51F576E9, (q31_t)0x6251D297,\n    (q31_t)0x51CED46E, (q31_t)0x6271FA69, (q31_t)0x51A82555, (q31_t)0x6292130C,\n    (q31_t)0x518169A4, (q31_t)0x62B21C7B, (q31_t)0x515AA162, (q31_t)0x62D216B2,\n    (q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x510CEB40, (q31_t)0x6311DD63,\n    (q31_t)0x50E5FD6C, (q31_t)0x6331A9D4, (q31_t)0x50BF031F, (q31_t)0x635166F8,\n    (q31_t)0x5097FC5E, (q31_t)0x637114CC, (q31_t)0x5070E92F, (q31_t)0x6390B34A,\n    (q31_t)0x5049C999, (q31_t)0x63B0426D, (q31_t)0x50229DA0, (q31_t)0x63CFC230,\n    (q31_t)0x4FFB654D, (q31_t)0x63EF328F, (q31_t)0x4FD420A3, (q31_t)0x640E9385,\n    (q31_t)0x4FACCFAB, (q31_t)0x642DE50D, (q31_t)0x4F857268, (q31_t)0x644D2722,\n    (q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4F369320, (q31_t)0x648B7CDF,\n    (q31_t)0x4F0F1126, (q31_t)0x64AA907F, (q31_t)0x4EE782FA, (q31_t)0x64C99498,\n    (q31_t)0x4EBFE8A4, (q31_t)0x64E88926, (q31_t)0x4E984229, (q31_t)0x65076E24,\n    (q31_t)0x4E708F8F, (q31_t)0x6526438E, (q31_t)0x4E48D0DC, (q31_t)0x6545095F,\n    (q31_t)0x4E210617, (q31_t)0x6563BF92, (q31_t)0x4DF92F45, (q31_t)0x65826622,\n    (q31_t)0x4DD14C6E, (q31_t)0x65A0FD0B, (q31_t)0x4DA95D96, (q31_t)0x65BF8447,\n    (q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4D595BFE, (q31_t)0x65FC63A9,\n    (q31_t)0x4D31494B, (q31_t)0x661ABBC5, (q31_t)0x4D092AB0, (q31_t)0x66390422,\n    (q31_t)0x4CE10034, (q31_t)0x66573CBB, (q31_t)0x4CB8C9DD, (q31_t)0x6675658C,\n    (q31_t)0x4C9087B1, (q31_t)0x66937E90, (q31_t)0x4C6839B6, (q31_t)0x66B187C3,\n    (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F, (q31_t)0x4C177A6E, (q31_t)0x66ED6AA1,\n    (q31_t)0x4BEF092D, (q31_t)0x670B4443, (q31_t)0x4BC68C36, (q31_t)0x67290E02,\n    (q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4B756F3F, (q31_t)0x676471C0,\n    (q31_t)0x4B4CCF4D, (q31_t)0x67820BB6, (q31_t)0x4B2423BD, (q31_t)0x679F95B7,\n    (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC, (q31_t)0x4AD2A9E1, (q31_t)0x67DA79C2,\n    (q31_t)0x4AA9DBA1, (q31_t)0x67F7D3C4, (q31_t)0x4A8101DE, (q31_t)0x68151DBE,\n    (q31_t)0x4A581C9D, (q31_t)0x683257AA, (q31_t)0x4A2F2BE5, (q31_t)0x684F8186,\n    (q31_t)0x4A062FBD, (q31_t)0x686C9B4B, (q31_t)0x49DD282A, (q31_t)0x6889A4F5,\n    (q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x498AF6DE, (q31_t)0x68C387E9,\n    (q31_t)0x4961CD32, (q31_t)0x68E06129, (q31_t)0x49389836, (q31_t)0x68FD2A3D,\n    (q31_t)0x490F57EE, (q31_t)0x6919E320, (q31_t)0x48E60C62, (q31_t)0x69368BCE,\n    (q31_t)0x48BCB598, (q31_t)0x69532442, (q31_t)0x48935397, (q31_t)0x696FAC78,\n    (q31_t)0x4869E664, (q31_t)0x698C246C, (q31_t)0x48406E07, (q31_t)0x69A88C18,\n    (q31_t)0x4816EA85, (q31_t)0x69C4E37A, (q31_t)0x47ED5BE6, (q31_t)0x69E12A8C,\n    (q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x479A1D66, (q31_t)0x6A1987B0,\n    (q31_t)0x47706D93, (q31_t)0x6A359DB9, (q31_t)0x4746B2BC, (q31_t)0x6A51A361,\n    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4, (q31_t)0x46F31C1A, (q31_t)0x6A897D7D,\n    (q31_t)0x46C9405C, (q31_t)0x6AA551E8, (q31_t)0x469F59B4, (q31_t)0x6AC115E1,\n    (q31_t)0x46756827, (q31_t)0x6ADCC964, (q31_t)0x464B6BBD, (q31_t)0x6AF86C6C,\n    (q31_t)0x4621647C, (q31_t)0x6B13FEF5, (q31_t)0x45F7526B, (q31_t)0x6B2F80FA,\n    (q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x45A30DF0, (q31_t)0x6B66536A,\n    (q31_t)0x4578DB93, (q31_t)0x6B81A3CD, (q31_t)0x454E9E80, (q31_t)0x6B9CE39B,\n    (q31_t)0x452456BC, (q31_t)0x6BB812D0, (q31_t)0x44FA044F, (q31_t)0x6BD3316A,\n    (q31_t)0x44CFA73F, (q31_t)0x6BEE3F62, (q31_t)0x44A53F93, (q31_t)0x6C093CB6,\n    (q31_t)0x447ACD50, (q31_t)0x6C242960, (q31_t)0x4450507E, (q31_t)0x6C3F055D,\n    (q31_t)0x4425C923, (q31_t)0x6C59D0A9, (q31_t)0x43FB3745, (q31_t)0x6C748B3F,\n    (q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x43A5F41E, (q31_t)0x6CA9CE3A,\n    (q31_t)0x437B42E1, (q31_t)0x6CC45697, (q31_t)0x4350873C, (q31_t)0x6CDECE2E,\n    (q31_t)0x4325C135, (q31_t)0x6CF934FB, (q31_t)0x42FAF0D4, (q31_t)0x6D138AFA,\n    (q31_t)0x42D0161E, (q31_t)0x6D2DD027, (q31_t)0x42A5311A, (q31_t)0x6D48047E,\n    (q31_t)0x427A41D0, (q31_t)0x6D6227FA, (q31_t)0x424F4845, (q31_t)0x6D7C3A98,\n    (q31_t)0x42244480, (q31_t)0x6D963C54, (q31_t)0x41F93688, (q31_t)0x6DB02D29,\n    (q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x41A2FC1A, (q31_t)0x6DE3DC11,\n    (q31_t)0x4177CFB0, (q31_t)0x6DFD9A1B, (q31_t)0x414C992E, (q31_t)0x6E17472F,\n    (q31_t)0x4121589A, (q31_t)0x6E30E349, (q31_t)0x40F60DFB, (q31_t)0x6E4A6E65,\n    (q31_t)0x40CAB957, (q31_t)0x6E63E87F, (q31_t)0x409F5AB6, (q31_t)0x6E7D5193,\n    (q31_t)0x4073F21D, (q31_t)0x6E96A99C, (q31_t)0x40487F93, (q31_t)0x6EAFF098,\n    (q31_t)0x401D0320, (q31_t)0x6EC92682, (q31_t)0x3FF17CCA, (q31_t)0x6EE24B57,\n    (q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F9A528F, (q31_t)0x6F1461AF,\n    (q31_t)0x3F6EAEB8, (q31_t)0x6F2D532C, (q31_t)0x3F430118, (q31_t)0x6F463383,\n    (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1, (q31_t)0x3EEB889C, (q31_t)0x6F77C0B3,\n    (q31_t)0x3EBFBDCC, (q31_t)0x6F906D84, (q31_t)0x3E93E94F, (q31_t)0x6FA90920,\n    (q31_t)0x3E680B2C, (q31_t)0x6FC19385, (q31_t)0x3E3C2369, (q31_t)0x6FDA0CAD,\n    (q31_t)0x3E10320D, (q31_t)0x6FF27496, (q31_t)0x3DE4371F, (q31_t)0x700ACB3B,\n    (q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D8C24A7, (q31_t)0x703B44AC,\n    (q31_t)0x3D600D2B, (q31_t)0x70536771, (q31_t)0x3D33EC39, (q31_t)0x706B78E3,\n    (q31_t)0x3D07C1D5, (q31_t)0x708378FE, (q31_t)0x3CDB8E09, (q31_t)0x709B67C0,\n    (q31_t)0x3CAF50DA, (q31_t)0x70B34524, (q31_t)0x3C830A4F, (q31_t)0x70CB1127,\n    (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6, (q31_t)0x3C2A6142, (q31_t)0x70FA74FB,\n    (q31_t)0x3BFDFECD, (q31_t)0x71120CC5, (q31_t)0x3BD19317, (q31_t)0x7129931E,\n    (q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3B78A007, (q31_t)0x71586B73,\n    (q31_t)0x3B4C18BA, (q31_t)0x716FBD68, (q31_t)0x3B1F8847, (q31_t)0x7186FDDE,\n    (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2, (q31_t)0x3AC64C0F, (q31_t)0x71B54A40,\n    (q31_t)0x3A99A057, (q31_t)0x71CC5626, (q31_t)0x3A6CEB95, (q31_t)0x71E3507F,\n    (q31_t)0x3A402DD1, (q31_t)0x71FA3948, (q31_t)0x3A136712, (q31_t)0x7211107D,\n    (q31_t)0x39E6975D, (q31_t)0x7227D61C, (q31_t)0x39B9BEBB, (q31_t)0x723E8A1F,\n    (q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x395FF2C9, (q31_t)0x726BBD48,\n    (q31_t)0x3932FF87, (q31_t)0x72823C66, (q31_t)0x39060372, (q31_t)0x7298A9DC,\n    (q31_t)0x38D8FE93, (q31_t)0x72AF05A6, (q31_t)0x38ABF0EF, (q31_t)0x72C54FC0,\n    (q31_t)0x387EDA8E, (q31_t)0x72DB8828, (q31_t)0x3851BB76, (q31_t)0x72F1AED8,\n    (q31_t)0x382493B0, (q31_t)0x7307C3D0, (q31_t)0x37F76340, (q31_t)0x731DC709,\n    (q31_t)0x37CA2A30, (q31_t)0x7333B883, (q31_t)0x379CE884, (q31_t)0x73499838,\n    (q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x37424B7A, (q31_t)0x73752249,\n    (q31_t)0x3714F02A, (q31_t)0x738ACC9E, (q31_t)0x36E78C5A, (q31_t)0x73A06522,\n    (q31_t)0x36BA2013, (q31_t)0x73B5EBD0, (q31_t)0x368CAB5C, (q31_t)0x73CB60A7,\n    (q31_t)0x365F2E3B, (q31_t)0x73E0C3A3, (q31_t)0x3631A8B7, (q31_t)0x73F614C0,\n    (q31_t)0x36041AD9, (q31_t)0x740B53FA, (q31_t)0x35D684A5, (q31_t)0x74208150,\n    (q31_t)0x35A8E624, (q31_t)0x74359CBD, (q31_t)0x357B3F5D, (q31_t)0x744AA63E,\n    (q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x351FD917, (q31_t)0x74748371,\n    (q31_t)0x34F219A7, (q31_t)0x7489571B, (q31_t)0x34C4520D, (q31_t)0x749E18CD,\n    (q31_t)0x3496824F, (q31_t)0x74B2C883, (q31_t)0x3468AA76, (q31_t)0x74C7663A,\n    (q31_t)0x343ACA87, (q31_t)0x74DBF1EF, (q31_t)0x340CE28A, (q31_t)0x74F06B9E,\n    (q31_t)0x33DEF287, (q31_t)0x7504D345, (q31_t)0x33B0FA84, (q31_t)0x751928E0,\n    (q31_t)0x3382FA88, (q31_t)0x752D6C6C, (q31_t)0x3354F29A, (q31_t)0x75419DE6,\n    (q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x32F8CB07, (q31_t)0x7569CA98,\n    (q31_t)0x32CAAB6F, (q31_t)0x757DC5CA, (q31_t)0x329C8402, (q31_t)0x7591AEDD,\n    (q31_t)0x326E54C7, (q31_t)0x75A585CF, (q31_t)0x32401DC5, (q31_t)0x75B94A9C,\n    (q31_t)0x3211DF03, (q31_t)0x75CCFD42, (q31_t)0x31E39889, (q31_t)0x75E09DBD,\n    (q31_t)0x31B54A5D, (q31_t)0x75F42C0A, (q31_t)0x3186F487, (q31_t)0x7607A827,\n    (q31_t)0x3158970D, (q31_t)0x761B1211, (q31_t)0x312A31F8, (q31_t)0x762E69C3,\n    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x30CD5114, (q31_t)0x7654E279,\n    (q31_t)0x309ED555, (q31_t)0x76680376, (q31_t)0x30705217, (q31_t)0x767B1230,\n    (q31_t)0x3041C760, (q31_t)0x768E0EA5, (q31_t)0x30133538, (q31_t)0x76A0F8D2,\n    (q31_t)0x2FE49BA6, (q31_t)0x76B3D0B3, (q31_t)0x2FB5FAB2, (q31_t)0x76C69646,\n    (q31_t)0x2F875262, (q31_t)0x76D94988, (q31_t)0x2F58A2BD, (q31_t)0x76EBEA77,\n    (q31_t)0x2F29EBCC, (q31_t)0x76FE790E, (q31_t)0x2EFB2D94, (q31_t)0x7710F54B,\n    (q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E9D9B70, (q31_t)0x7735B6AE,\n    (q31_t)0x2E6EC792, (q31_t)0x7747FBCE, (q31_t)0x2E3FEC8B, (q31_t)0x775A2E88,\n    (q31_t)0x2E110A62, (q31_t)0x776C4EDB, (q31_t)0x2DE2211E, (q31_t)0x777E5CC3,\n    (q31_t)0x2DB330C7, (q31_t)0x7790583D, (q31_t)0x2D843963, (q31_t)0x77A24148,\n    (q31_t)0x2D553AFB, (q31_t)0x77B417DF, (q31_t)0x2D263595, (q31_t)0x77C5DC01,\n    (q31_t)0x2CF72939, (q31_t)0x77D78DAA, (q31_t)0x2CC815ED, (q31_t)0x77E92CD8,\n    (q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2C69DAA6, (q31_t)0x780C33B8,\n    (q31_t)0x2C3AB2B9, (q31_t)0x781D9B64, (q31_t)0x2C0B83F9, (q31_t)0x782EF08B,\n    (q31_t)0x2BDC4E6F, (q31_t)0x78403328, (q31_t)0x2BAD1221, (q31_t)0x7851633B,\n    (q31_t)0x2B7DCF17, (q31_t)0x786280BF, (q31_t)0x2B4E8558, (q31_t)0x78738BB3,\n    (q31_t)0x2B1F34EB, (q31_t)0x78848413, (q31_t)0x2AEFDDD8, (q31_t)0x789569DE,\n    (q31_t)0x2AC08025, (q31_t)0x78A63D10, (q31_t)0x2A911BDB, (q31_t)0x78B6FDA8,\n    (q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x2A323F9D, (q31_t)0x78D846FB,\n    (q31_t)0x2A02C7B8, (q31_t)0x78E8CFB1, (q31_t)0x29D34958, (q31_t)0x78F945C3,\n    (q31_t)0x29A3C484, (q31_t)0x7909A92C, (q31_t)0x29743945, (q31_t)0x7919F9EB,\n    (q31_t)0x2944A7A2, (q31_t)0x792A37FE, (q31_t)0x29150FA1, (q31_t)0x793A6360,\n    (q31_t)0x28E5714A, (q31_t)0x794A7C11, (q31_t)0x28B5CCA5, (q31_t)0x795A820E,\n    (q31_t)0x288621B9, (q31_t)0x796A7554, (q31_t)0x2856708C, (q31_t)0x797A55E0,\n    (q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27F6FB92, (q31_t)0x7999DEC3,\n    (q31_t)0x27C737D2, (q31_t)0x79A98715, (q31_t)0x27976DF1, (q31_t)0x79B91CA4,\n    (q31_t)0x27679DF4, (q31_t)0x79C89F6D, (q31_t)0x2737C7E3, (q31_t)0x79D80F6F,\n    (q31_t)0x2707EBC6, (q31_t)0x79E76CA6, (q31_t)0x26D809A5, (q31_t)0x79F6B711,\n    (q31_t)0x26A82185, (q31_t)0x7A05EEAD, (q31_t)0x26783370, (q31_t)0x7A151377,\n    (q31_t)0x26483F6C, (q31_t)0x7A24256E, (q31_t)0x26184581, (q31_t)0x7A33248F,\n    (q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x25B84012, (q31_t)0x7A50EA46,\n    (q31_t)0x2588349D, (q31_t)0x7A5FB0D8, (q31_t)0x2558235E, (q31_t)0x7A6E648A,\n    (q31_t)0x25280C5D, (q31_t)0x7A7D055B, (q31_t)0x24F7EFA1, (q31_t)0x7A8B9348,\n    (q31_t)0x24C7CD32, (q31_t)0x7A9A0E4F, (q31_t)0x2497A517, (q31_t)0x7AA8766E,\n    (q31_t)0x24677757, (q31_t)0x7AB6CBA3, (q31_t)0x243743FA, (q31_t)0x7AC50DEB,\n    (q31_t)0x24070B07, (q31_t)0x7AD33D45, (q31_t)0x23D6CC86, (q31_t)0x7AE159AE,\n    (q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x23763EF7, (q31_t)0x7AFD59A3,\n    (q31_t)0x2345EFF7, (q31_t)0x7B0B3D2C, (q31_t)0x23159B87, (q31_t)0x7B190DBB,\n    (q31_t)0x22E541AE, (q31_t)0x7B26CB4F, (q31_t)0x22B4E274, (q31_t)0x7B3475E4,\n    (q31_t)0x22847DDF, (q31_t)0x7B420D7A, (q31_t)0x225413F8, (q31_t)0x7B4F920E,\n    (q31_t)0x2223A4C5, (q31_t)0x7B5D039D, (q31_t)0x21F3304E, (q31_t)0x7B6A6227,\n    (q31_t)0x21C2B69C, (q31_t)0x7B77ADA8, (q31_t)0x219237B4, (q31_t)0x7B84E61E,\n    (q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x21312A65, (q31_t)0x7B9F1DE5,\n    (q31_t)0x21009C0B, (q31_t)0x7BAC1D31, (q31_t)0x20D0089B, (q31_t)0x7BB9096A,\n    (q31_t)0x209F701C, (q31_t)0x7BC5E28F, (q31_t)0x206ED295, (q31_t)0x7BD2A89E,\n    (q31_t)0x203E300D, (q31_t)0x7BDF5B94, (q31_t)0x200D888C, (q31_t)0x7BEBFB70,\n    (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830, (q31_t)0x1FAC2ABF, (q31_t)0x7C0501D1,\n    (q31_t)0x1F7B7480, (q31_t)0x7C116853, (q31_t)0x1F4AB967, (q31_t)0x7C1DBBB2,\n    (q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1EE934C2, (q31_t)0x7C362904,\n    (q31_t)0x1EB86B46, (q31_t)0x7C4242F2, (q31_t)0x1E879D0C, (q31_t)0x7C4E49B6,\n    (q31_t)0x1E56CA1E, (q31_t)0x7C5A3D4F, (q31_t)0x1E25F281, (q31_t)0x7C661DBB,\n    (q31_t)0x1DF5163F, (q31_t)0x7C71EAF8, (q31_t)0x1DC4355D, (q31_t)0x7C7DA504,\n    (q31_t)0x1D934FE5, (q31_t)0x7C894BDD, (q31_t)0x1D6265DD, (q31_t)0x7C94DF82,\n    (q31_t)0x1D31774D, (q31_t)0x7CA05FF1, (q31_t)0x1D00843C, (q31_t)0x7CABCD27,\n    (q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C9E90B8, (q31_t)0x7CC26DE5,\n    (q31_t)0x1C6D9053, (q31_t)0x7CCDA168, (q31_t)0x1C3C8B8C, (q31_t)0x7CD8C1AD,\n    (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1, (q31_t)0x1BDA74F5, (q31_t)0x7CEEC873,\n    (q31_t)0x1BA96334, (q31_t)0x7CF9AEF0, (q31_t)0x1B784D30, (q31_t)0x7D048228,\n    (q31_t)0x1B4732EF, (q31_t)0x7D0F4218, (q31_t)0x1B161479, (q31_t)0x7D19EEBE,\n    (q31_t)0x1AE4F1D6, (q31_t)0x7D24881A, (q31_t)0x1AB3CB0C, (q31_t)0x7D2F0E2A,\n    (q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x1A517127, (q31_t)0x7D43E05E,\n    (q31_t)0x1A203E1B, (q31_t)0x7D4E2C7E, (q31_t)0x19EF0706, (q31_t)0x7D58654C,\n    (q31_t)0x19BDCBF2, (q31_t)0x7D628AC5, (q31_t)0x198C8CE6, (q31_t)0x7D6C9CE9,\n    (q31_t)0x195B49E9, (q31_t)0x7D769BB5, (q31_t)0x192A0303, (q31_t)0x7D808727,\n    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F, (q31_t)0x18C7699B, (q31_t)0x7D9423FB,\n    (q31_t)0x18961727, (q31_t)0x7D9DD55A, (q31_t)0x1864C0E9, (q31_t)0x7DA77359,\n    (q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x1802092C, (q31_t)0x7DBA7534,\n    (q31_t)0x17D0A7BB, (q31_t)0x7DC3D90D, (q31_t)0x179F429F, (q31_t)0x7DCD2981,\n    (q31_t)0x176DD9DE, (q31_t)0x7DD6668E, (q31_t)0x173C6D80, (q31_t)0x7DDF9034,\n    (q31_t)0x170AFD8D, (q31_t)0x7DE8A670, (q31_t)0x16D98A0C, (q31_t)0x7DF1A942,\n    (q31_t)0x16A81305, (q31_t)0x7DFA98A7, (q31_t)0x1676987F, (q31_t)0x7E03749F,\n    (q31_t)0x16451A83, (q31_t)0x7E0C3D29, (q31_t)0x16139917, (q31_t)0x7E14F242,\n    (q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x15B08C11, (q31_t)0x7E26221E,\n    (q31_t)0x157F0086, (q31_t)0x7E2E9CDF, (q31_t)0x154D71AA, (q31_t)0x7E37042A,\n    (q31_t)0x151BDF85, (q31_t)0x7E3F57FE, (q31_t)0x14EA4A1F, (q31_t)0x7E47985B,\n    (q31_t)0x14B8B17F, (q31_t)0x7E4FC53E, (q31_t)0x148715AD, (q31_t)0x7E57DEA6,\n    (q31_t)0x145576B1, (q31_t)0x7E5FE493, (q31_t)0x1423D492, (q31_t)0x7E67D702,\n    (q31_t)0x13F22F57, (q31_t)0x7E6FB5F3, (q31_t)0x13C0870A, (q31_t)0x7E778165,\n    (q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x135D2D53, (q31_t)0x7E86DDC5,\n    (q31_t)0x132B7BF9, (q31_t)0x7E8E6EB1, (q31_t)0x12F9C7AA, (q31_t)0x7E95EC19,\n    (q31_t)0x12C8106E, (q31_t)0x7E9D55FC, (q31_t)0x1296564D, (q31_t)0x7EA4AC58,\n    (q31_t)0x1264994E, (q31_t)0x7EABEF2C, (q31_t)0x1232D978, (q31_t)0x7EB31E77,\n    (q31_t)0x120116D4, (q31_t)0x7EBA3A39, (q31_t)0x11CF516A, (q31_t)0x7EC1426F,\n    (q31_t)0x119D8940, (q31_t)0x7EC8371A, (q31_t)0x116BBE5F, (q31_t)0x7ECF1837,\n    (q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x11082096, (q31_t)0x7EDC9FC6,\n    (q31_t)0x10D64DBC, (q31_t)0x7EE34635, (q31_t)0x10A4784A, (q31_t)0x7EE9D913,\n    (q31_t)0x1072A047, (q31_t)0x7EF0585F, (q31_t)0x1040C5BB, (q31_t)0x7EF6C418,\n    (q31_t)0x100EE8AD, (q31_t)0x7EFD1C3C, (q31_t)0x0FDD0925, (q31_t)0x7F0360CB,\n    (q31_t)0x0FAB272B, (q31_t)0x7F0991C3, (q31_t)0x0F7942C6, (q31_t)0x7F0FAF24,\n    (q31_t)0x0F475BFE, (q31_t)0x7F15B8EE, (q31_t)0x0F1572DC, (q31_t)0x7F1BAF1E,\n    (q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0EB199A3, (q31_t)0x7F2760AF,\n    (q31_t)0x0E7FA99D, (q31_t)0x7F2D1C0E, (q31_t)0x0E4DB75B, (q31_t)0x7F32C3D0,\n    (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5, (q31_t)0x0DE9CC3F, (q31_t)0x7F3DD87C,\n    (q31_t)0x0DB7D376, (q31_t)0x7F434563, (q31_t)0x0D85D88F, (q31_t)0x7F489EAA,\n    (q31_t)0x0D53DB92, (q31_t)0x7F4DE450, (q31_t)0x0D21DC87, (q31_t)0x7F531654,\n    (q31_t)0x0CEFDB75, (q31_t)0x7F5834B6, (q31_t)0x0CBDD865, (q31_t)0x7F5D3F75,\n    (q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0C59CC67, (q31_t)0x7F671A04,\n    (q31_t)0x0C27C389, (q31_t)0x7F6BE9D4, (q31_t)0x0BF5B8CB, (q31_t)0x7F70A5FD,\n    (q31_t)0x0BC3AC35, (q31_t)0x7F754E7F, (q31_t)0x0B919DCE, (q31_t)0x7F79E35A,\n    (q31_t)0x0B5F8D9F, (q31_t)0x7F7E648B, (q31_t)0x0B2D7BAE, (q31_t)0x7F82D214,\n    (q31_t)0x0AFB6805, (q31_t)0x7F872BF3, (q31_t)0x0AC952AA, (q31_t)0x7F8B7226,\n    (q31_t)0x0A973BA5, (q31_t)0x7F8FA4AF, (q31_t)0x0A6522FE, (q31_t)0x7F93C38C,\n    (q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x0A00ECE8, (q31_t)0x7F9BC63F,\n    (q31_t)0x09CECF89, (q31_t)0x7F9FAA15, (q31_t)0x099CB0A7, (q31_t)0x7FA37A3C,\n    (q31_t)0x096A9049, (q31_t)0x7FA736B4, (q31_t)0x09386E77, (q31_t)0x7FAADF7C,\n    (q31_t)0x09064B3A, (q31_t)0x7FAE7494, (q31_t)0x08D42698, (q31_t)0x7FB1F5FC,\n    (q31_t)0x08A2009A, (q31_t)0x7FB563B2, (q31_t)0x086FD947, (q31_t)0x7FB8BDB7,\n    (q31_t)0x083DB0A7, (q31_t)0x7FBC040A, (q31_t)0x080B86C1, (q31_t)0x7FBF36A9,\n    (q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x07A72F45, (q31_t)0x7FC560CF,\n    (q31_t)0x077501BE, (q31_t)0x7FC85853, (q31_t)0x0742D310, (q31_t)0x7FCB3C23,\n    (q31_t)0x0710A344, (q31_t)0x7FCE0C3E, (q31_t)0x06DE7261, (q31_t)0x7FD0C8A3,\n    (q31_t)0x06AC406F, (q31_t)0x7FD37152, (q31_t)0x067A0D75, (q31_t)0x7FD6064B,\n    (q31_t)0x0647D97C, (q31_t)0x7FD8878D, (q31_t)0x0615A48A, (q31_t)0x7FDAF518,\n    (q31_t)0x05E36EA9, (q31_t)0x7FDD4EEC, (q31_t)0x05B137DF, (q31_t)0x7FDF9508,\n    (q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x054CC7B0, (q31_t)0x7FE3E616,\n    (q31_t)0x051A8E5C, (q31_t)0x7FE5F108, (q31_t)0x04E8543D, (q31_t)0x7FE7E840,\n    (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0, (q31_t)0x0483DDC3, (q31_t)0x7FEB9B85,\n    (q31_t)0x0451A176, (q31_t)0x7FED5790, (q31_t)0x041F647F, (q31_t)0x7FEEFFE1,\n    (q31_t)0x03ED26E6, (q31_t)0x7FF09477, (q31_t)0x03BAE8B1, (q31_t)0x7FF21553,\n    (q31_t)0x0388A9E9, (q31_t)0x7FF38273, (q31_t)0x03566A96, (q31_t)0x7FF4DBD8,\n    (q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x02F1EA6B, (q31_t)0x7FF7536F,\n    (q31_t)0x02BFA9A4, (q31_t)0x7FF871A1, (q31_t)0x028D6870, (q31_t)0x7FF97C17,\n    (q31_t)0x025B26D7, (q31_t)0x7FFA72D1, (q31_t)0x0228E4E1, (q31_t)0x7FFB55CE,\n    (q31_t)0x01F6A296, (q31_t)0x7FFC250F, (q31_t)0x01C45FFE, (q31_t)0x7FFCE093,\n    (q31_t)0x01921D1F, (q31_t)0x7FFD885A, (q31_t)0x015FDA03, (q31_t)0x7FFE1C64,\n    (q31_t)0x012D96B0, (q31_t)0x7FFE9CB2, (q31_t)0x00FB532F, (q31_t)0x7FFF0942,\n    (q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x0096CBC1, (q31_t)0x7FFFA72C,\n    (q31_t)0x006487E3, (q31_t)0x7FFFD885, (q31_t)0x003243F5, (q31_t)0x7FFFF621,\n    (q31_t)0x00000000, (q31_t)0x7FFFFFFF, (q31_t)0xFFCDBC0A, (q31_t)0x7FFFF621,\n    (q31_t)0xFF9B781D, (q31_t)0x7FFFD885, (q31_t)0xFF69343E, (q31_t)0x7FFFA72C,\n    (q31_t)0xFF36F078, (q31_t)0x7FFF6216, (q31_t)0xFF04ACD0, (q31_t)0x7FFF0942,\n    (q31_t)0xFED2694F, (q31_t)0x7FFE9CB2, (q31_t)0xFEA025FC, (q31_t)0x7FFE1C64,\n    (q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFE3BA001, (q31_t)0x7FFCE093,\n    (q31_t)0xFE095D69, (q31_t)0x7FFC250F, (q31_t)0xFDD71B1E, (q31_t)0x7FFB55CE,\n    (q31_t)0xFDA4D928, (q31_t)0x7FFA72D1, (q31_t)0xFD72978F, (q31_t)0x7FF97C17,\n    (q31_t)0xFD40565B, (q31_t)0x7FF871A1, (q31_t)0xFD0E1594, (q31_t)0x7FF7536F,\n    (q31_t)0xFCDBD541, (q31_t)0x7FF62182, (q31_t)0xFCA99569, (q31_t)0x7FF4DBD8,\n    (q31_t)0xFC775616, (q31_t)0x7FF38273, (q31_t)0xFC45174E, (q31_t)0x7FF21553,\n    (q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFBE09B80, (q31_t)0x7FEEFFE1,\n    (q31_t)0xFBAE5E89, (q31_t)0x7FED5790, (q31_t)0xFB7C223C, (q31_t)0x7FEB9B85,\n    (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0, (q31_t)0xFB17ABC2, (q31_t)0x7FE7E840,\n    (q31_t)0xFAE571A4, (q31_t)0x7FE5F108, (q31_t)0xFAB3384F, (q31_t)0x7FE3E616,\n    (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B, (q31_t)0xFA4EC820, (q31_t)0x7FDF9508,\n    (q31_t)0xFA1C9156, (q31_t)0x7FDD4EEC, (q31_t)0xF9EA5B75, (q31_t)0x7FDAF518,\n    (q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF985F28A, (q31_t)0x7FD6064B,\n    (q31_t)0xF953BF90, (q31_t)0x7FD37152, (q31_t)0xF9218D9E, (q31_t)0x7FD0C8A3,\n    (q31_t)0xF8EF5CBB, (q31_t)0x7FCE0C3E, (q31_t)0xF8BD2CEF, (q31_t)0x7FCB3C23,\n    (q31_t)0xF88AFE41, (q31_t)0x7FC85853, (q31_t)0xF858D0BA, (q31_t)0x7FC560CF,\n    (q31_t)0xF826A461, (q31_t)0x7FC25596, (q31_t)0xF7F4793E, (q31_t)0x7FBF36A9,\n    (q31_t)0xF7C24F58, (q31_t)0x7FBC040A, (q31_t)0xF79026B8, (q31_t)0x7FB8BDB7,\n    (q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF72BD967, (q31_t)0x7FB1F5FC,\n    (q31_t)0xF6F9B4C5, (q31_t)0x7FAE7494, (q31_t)0xF6C79188, (q31_t)0x7FAADF7C,\n    (q31_t)0xF6956FB6, (q31_t)0x7FA736B4, (q31_t)0xF6634F58, (q31_t)0x7FA37A3C,\n    (q31_t)0xF6313076, (q31_t)0x7F9FAA15, (q31_t)0xF5FF1317, (q31_t)0x7F9BC63F,\n    (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC, (q31_t)0xF59ADD01, (q31_t)0x7F93C38C,\n    (q31_t)0xF568C45A, (q31_t)0x7F8FA4AF, (q31_t)0xF536AD55, (q31_t)0x7F8B7226,\n    (q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF4D28451, (q31_t)0x7F82D214,\n    (q31_t)0xF4A07260, (q31_t)0x7F7E648B, (q31_t)0xF46E6231, (q31_t)0x7F79E35A,\n    (q31_t)0xF43C53CA, (q31_t)0x7F754E7F, (q31_t)0xF40A4734, (q31_t)0x7F70A5FD,\n    (q31_t)0xF3D83C76, (q31_t)0x7F6BE9D4, (q31_t)0xF3A63398, (q31_t)0x7F671A04,\n    (q31_t)0xF3742CA1, (q31_t)0x7F62368F, (q31_t)0xF342279A, (q31_t)0x7F5D3F75,\n    (q31_t)0xF310248A, (q31_t)0x7F5834B6, (q31_t)0xF2DE2378, (q31_t)0x7F531654,\n    (q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF27A2770, (q31_t)0x7F489EAA,\n    (q31_t)0xF2482C89, (q31_t)0x7F434563, (q31_t)0xF21633C0, (q31_t)0x7F3DD87C,\n    (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5, (q31_t)0xF1B248A5, (q31_t)0x7F32C3D0,\n    (q31_t)0xF1805662, (q31_t)0x7F2D1C0E, (q31_t)0xF14E665C, (q31_t)0x7F2760AF,\n    (q31_t)0xF11C789A, (q31_t)0x7F2191B4, (q31_t)0xF0EA8D23, (q31_t)0x7F1BAF1E,\n    (q31_t)0xF0B8A401, (q31_t)0x7F15B8EE, (q31_t)0xF086BD39, (q31_t)0x7F0FAF24,\n    (q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xF022F6DA, (q31_t)0x7F0360CB,\n    (q31_t)0xEFF11752, (q31_t)0x7EFD1C3C, (q31_t)0xEFBF3A44, (q31_t)0x7EF6C418,\n    (q31_t)0xEF8D5FB8, (q31_t)0x7EF0585F, (q31_t)0xEF5B87B5, (q31_t)0x7EE9D913,\n    (q31_t)0xEF29B243, (q31_t)0x7EE34635, (q31_t)0xEEF7DF6A, (q31_t)0x7EDC9FC6,\n    (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6, (q31_t)0xEE9441A0, (q31_t)0x7ECF1837,\n    (q31_t)0xEE6276BF, (q31_t)0x7EC8371A, (q31_t)0xEE30AE95, (q31_t)0x7EC1426F,\n    (q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xEDCD2687, (q31_t)0x7EB31E77,\n    (q31_t)0xED9B66B2, (q31_t)0x7EABEF2C, (q31_t)0xED69A9B2, (q31_t)0x7EA4AC58,\n    (q31_t)0xED37EF91, (q31_t)0x7E9D55FC, (q31_t)0xED063855, (q31_t)0x7E95EC19,\n    (q31_t)0xECD48406, (q31_t)0x7E8E6EB1, (q31_t)0xECA2D2AC, (q31_t)0x7E86DDC5,\n    (q31_t)0xEC71244F, (q31_t)0x7E7F3956, (q31_t)0xEC3F78F5, (q31_t)0x7E778165,\n    (q31_t)0xEC0DD0A8, (q31_t)0x7E6FB5F3, (q31_t)0xEBDC2B6D, (q31_t)0x7E67D702,\n    (q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEB78EA52, (q31_t)0x7E57DEA6,\n    (q31_t)0xEB474E80, (q31_t)0x7E4FC53E, (q31_t)0xEB15B5E0, (q31_t)0x7E47985B,\n    (q31_t)0xEAE4207A, (q31_t)0x7E3F57FE, (q31_t)0xEAB28E55, (q31_t)0x7E37042A,\n    (q31_t)0xEA80FF79, (q31_t)0x7E2E9CDF, (q31_t)0xEA4F73EE, (q31_t)0x7E26221E,\n    (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9, (q31_t)0xE9EC66E8, (q31_t)0x7E14F242,\n    (q31_t)0xE9BAE57C, (q31_t)0x7E0C3D29, (q31_t)0xE9896780, (q31_t)0x7E03749F,\n    (q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE92675F4, (q31_t)0x7DF1A942,\n    (q31_t)0xE8F50273, (q31_t)0x7DE8A670, (q31_t)0xE8C3927F, (q31_t)0x7DDF9034,\n    (q31_t)0xE8922621, (q31_t)0x7DD6668E, (q31_t)0xE860BD60, (q31_t)0x7DCD2981,\n    (q31_t)0xE82F5844, (q31_t)0x7DC3D90D, (q31_t)0xE7FDF6D3, (q31_t)0x7DBA7534,\n    (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7, (q31_t)0xE79B3F16, (q31_t)0x7DA77359,\n    (q31_t)0xE769E8D8, (q31_t)0x7D9DD55A, (q31_t)0xE7389664, (q31_t)0x7D9423FB,\n    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE6D5FCFC, (q31_t)0x7D808727,\n    (q31_t)0xE6A4B616, (q31_t)0x7D769BB5, (q31_t)0xE6737319, (q31_t)0x7D6C9CE9,\n    (q31_t)0xE642340D, (q31_t)0x7D628AC5, (q31_t)0xE610F8F9, (q31_t)0x7D58654C,\n    (q31_t)0xE5DFC1E4, (q31_t)0x7D4E2C7E, (q31_t)0xE5AE8ED8, (q31_t)0x7D43E05E,\n    (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC, (q31_t)0xE54C34F3, (q31_t)0x7D2F0E2A,\n    (q31_t)0xE51B0E2A, (q31_t)0x7D24881A, (q31_t)0xE4E9EB86, (q31_t)0x7D19EEBE,\n    (q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE487B2CF, (q31_t)0x7D048228,\n    (q31_t)0xE4569CCB, (q31_t)0x7CF9AEF0, (q31_t)0xE4258B0A, (q31_t)0x7CEEC873,\n    (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1, (q31_t)0xE3C37473, (q31_t)0x7CD8C1AD,\n    (q31_t)0xE3926FAC, (q31_t)0x7CCDA168, (q31_t)0xE3616F47, (q31_t)0x7CC26DE5,\n    (q31_t)0xE330734C, (q31_t)0x7CB72724, (q31_t)0xE2FF7BC3, (q31_t)0x7CABCD27,\n    (q31_t)0xE2CE88B2, (q31_t)0x7CA05FF1, (q31_t)0xE29D9A22, (q31_t)0x7C94DF82,\n    (q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE23BCAA2, (q31_t)0x7C7DA504,\n    (q31_t)0xE20AE9C1, (q31_t)0x7C71EAF8, (q31_t)0xE1DA0D7E, (q31_t)0x7C661DBB,\n    (q31_t)0xE1A935E1, (q31_t)0x7C5A3D4F, (q31_t)0xE17862F3, (q31_t)0x7C4E49B6,\n    (q31_t)0xE14794B9, (q31_t)0x7C4242F2, (q31_t)0xE116CB3D, (q31_t)0x7C362904,\n    (q31_t)0xE0E60684, (q31_t)0x7C29FBEE, (q31_t)0xE0B54698, (q31_t)0x7C1DBBB2,\n    (q31_t)0xE0848B7F, (q31_t)0x7C116853, (q31_t)0xE053D541, (q31_t)0x7C0501D1,\n    (q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDFF27773, (q31_t)0x7BEBFB70,\n    (q31_t)0xDFC1CFF2, (q31_t)0x7BDF5B94, (q31_t)0xDF912D6A, (q31_t)0x7BD2A89E,\n    (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F, (q31_t)0xDF2FF764, (q31_t)0x7BB9096A,\n    (q31_t)0xDEFF63F4, (q31_t)0x7BAC1D31, (q31_t)0xDECED59B, (q31_t)0x7B9F1DE5,\n    (q31_t)0xDE9E4C60, (q31_t)0x7B920B89, (q31_t)0xDE6DC84B, (q31_t)0x7B84E61E,\n    (q31_t)0xDE3D4963, (q31_t)0x7B77ADA8, (q31_t)0xDE0CCFB1, (q31_t)0x7B6A6227,\n    (q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDDABEC07, (q31_t)0x7B4F920E,\n    (q31_t)0xDD7B8220, (q31_t)0x7B420D7A, (q31_t)0xDD4B1D8B, (q31_t)0x7B3475E4,\n    (q31_t)0xDD1ABE51, (q31_t)0x7B26CB4F, (q31_t)0xDCEA6478, (q31_t)0x7B190DBB,\n    (q31_t)0xDCBA1008, (q31_t)0x7B0B3D2C, (q31_t)0xDC89C108, (q31_t)0x7AFD59A3,\n    (q31_t)0xDC597781, (q31_t)0x7AEF6323, (q31_t)0xDC293379, (q31_t)0x7AE159AE,\n    (q31_t)0xDBF8F4F8, (q31_t)0x7AD33D45, (q31_t)0xDBC8BC05, (q31_t)0x7AC50DEB,\n    (q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDB685AE8, (q31_t)0x7AA8766E,\n    (q31_t)0xDB3832CD, (q31_t)0x7A9A0E4F, (q31_t)0xDB08105E, (q31_t)0x7A8B9348,\n    (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B, (q31_t)0xDAA7DCA1, (q31_t)0x7A6E648A,\n    (q31_t)0xDA77CB62, (q31_t)0x7A5FB0D8, (q31_t)0xDA47BFED, (q31_t)0x7A50EA46,\n    (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8, (q31_t)0xD9E7BA7E, (q31_t)0x7A33248F,\n    (q31_t)0xD9B7C093, (q31_t)0x7A24256E, (q31_t)0xD987CC8F, (q31_t)0x7A151377,\n    (q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD927F65B, (q31_t)0x79F6B711,\n    (q31_t)0xD8F81439, (q31_t)0x79E76CA6, (q31_t)0xD8C8381C, (q31_t)0x79D80F6F,\n    (q31_t)0xD898620C, (q31_t)0x79C89F6D, (q31_t)0xD868920F, (q31_t)0x79B91CA4,\n    (q31_t)0xD838C82D, (q31_t)0x79A98715, (q31_t)0xD809046D, (q31_t)0x7999DEC3,\n    (q31_t)0xD7D946D7, (q31_t)0x798A23B1, (q31_t)0xD7A98F73, (q31_t)0x797A55E0,\n    (q31_t)0xD779DE46, (q31_t)0x796A7554, (q31_t)0xD74A335A, (q31_t)0x795A820E,\n    (q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD6EAF05E, (q31_t)0x793A6360,\n    (q31_t)0xD6BB585D, (q31_t)0x792A37FE, (q31_t)0xD68BC6BA, (q31_t)0x7919F9EB,\n    (q31_t)0xD65C3B7B, (q31_t)0x7909A92C, (q31_t)0xD62CB6A7, (q31_t)0x78F945C3,\n    (q31_t)0xD5FD3847, (q31_t)0x78E8CFB1, (q31_t)0xD5CDC062, (q31_t)0x78D846FB,\n    (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1, (q31_t)0xD56EE424, (q31_t)0x78B6FDA8,\n    (q31_t)0xD53F7FDA, (q31_t)0x78A63D10, (q31_t)0xD5102227, (q31_t)0x789569DE,\n    (q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD4B17AA7, (q31_t)0x78738BB3,\n    (q31_t)0xD48230E8, (q31_t)0x786280BF, (q31_t)0xD452EDDE, (q31_t)0x7851633B,\n    (q31_t)0xD423B190, (q31_t)0x78403328, (q31_t)0xD3F47C06, (q31_t)0x782EF08B,\n    (q31_t)0xD3C54D46, (q31_t)0x781D9B64, (q31_t)0xD3962559, (q31_t)0x780C33B8,\n    (q31_t)0xD3670445, (q31_t)0x77FAB988, (q31_t)0xD337EA12, (q31_t)0x77E92CD8,\n    (q31_t)0xD308D6C6, (q31_t)0x77D78DAA, (q31_t)0xD2D9CA6A, (q31_t)0x77C5DC01,\n    (q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD27BC69C, (q31_t)0x77A24148,\n    (q31_t)0xD24CCF38, (q31_t)0x7790583D, (q31_t)0xD21DDEE1, (q31_t)0x777E5CC3,\n    (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB, (q31_t)0xD1C01374, (q31_t)0x775A2E88,\n    (q31_t)0xD191386D, (q31_t)0x7747FBCE, (q31_t)0xD162648F, (q31_t)0x7735B6AE,\n    (q31_t)0xD13397E1, (q31_t)0x77235F2D, (q31_t)0xD104D26B, (q31_t)0x7710F54B,\n    (q31_t)0xD0D61433, (q31_t)0x76FE790E, (q31_t)0xD0A75D42, (q31_t)0x76EBEA77,\n    (q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xD04A054D, (q31_t)0x76C69646,\n    (q31_t)0xD01B6459, (q31_t)0x76B3D0B3, (q31_t)0xCFECCAC7, (q31_t)0x76A0F8D2,\n    (q31_t)0xCFBE389F, (q31_t)0x768E0EA5, (q31_t)0xCF8FADE8, (q31_t)0x767B1230,\n    (q31_t)0xCF612AAA, (q31_t)0x76680376, (q31_t)0xCF32AEEB, (q31_t)0x7654E279,\n    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C, (q31_t)0xCED5CE08, (q31_t)0x762E69C3,\n    (q31_t)0xCEA768F2, (q31_t)0x761B1211, (q31_t)0xCE790B78, (q31_t)0x7607A827,\n    (q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCE1C6776, (q31_t)0x75E09DBD,\n    (q31_t)0xCDEE20FC, (q31_t)0x75CCFD42, (q31_t)0xCDBFE23A, (q31_t)0x75B94A9C,\n    (q31_t)0xCD91AB38, (q31_t)0x75A585CF, (q31_t)0xCD637BFD, (q31_t)0x7591AEDD,\n    (q31_t)0xCD355490, (q31_t)0x757DC5CA, (q31_t)0xCD0734F8, (q31_t)0x7569CA98,\n    (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B, (q31_t)0xCCAB0D65, (q31_t)0x75419DE6,\n    (q31_t)0xCC7D0577, (q31_t)0x752D6C6C, (q31_t)0xCC4F057B, (q31_t)0x751928E0,\n    (q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCBF31D75, (q31_t)0x74F06B9E,\n    (q31_t)0xCBC53578, (q31_t)0x74DBF1EF, (q31_t)0xCB975589, (q31_t)0x74C7663A,\n    (q31_t)0xCB697DB0, (q31_t)0x74B2C883, (q31_t)0xCB3BADF2, (q31_t)0x749E18CD,\n    (q31_t)0xCB0DE658, (q31_t)0x7489571B, (q31_t)0xCAE026E8, (q31_t)0x74748371,\n    (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1, (q31_t)0xCA84C0A2, (q31_t)0x744AA63E,\n    (q31_t)0xCA5719DB, (q31_t)0x74359CBD, (q31_t)0xCA297B5A, (q31_t)0x74208150,\n    (q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC9CE5748, (q31_t)0x73F614C0,\n    (q31_t)0xC9A0D1C4, (q31_t)0x73E0C3A3, (q31_t)0xC97354A3, (q31_t)0x73CB60A7,\n    (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0, (q31_t)0xC91873A5, (q31_t)0x73A06522,\n    (q31_t)0xC8EB0FD6, (q31_t)0x738ACC9E, (q31_t)0xC8BDB485, (q31_t)0x73752249,\n    (q31_t)0xC89061BA, (q31_t)0x735F6626, (q31_t)0xC863177B, (q31_t)0x73499838,\n    (q31_t)0xC835D5D0, (q31_t)0x7333B883, (q31_t)0xC8089CBF, (q31_t)0x731DC709,\n    (q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC7AE4489, (q31_t)0x72F1AED8,\n    (q31_t)0xC7812571, (q31_t)0x72DB8828, (q31_t)0xC7540F10, (q31_t)0x72C54FC0,\n    (q31_t)0xC727016C, (q31_t)0x72AF05A6, (q31_t)0xC6F9FC8D, (q31_t)0x7298A9DC,\n    (q31_t)0xC6CD0079, (q31_t)0x72823C66, (q31_t)0xC6A00D36, (q31_t)0x726BBD48,\n    (q31_t)0xC67322CD, (q31_t)0x72552C84, (q31_t)0xC6464144, (q31_t)0x723E8A1F,\n    (q31_t)0xC61968A2, (q31_t)0x7227D61C, (q31_t)0xC5EC98ED, (q31_t)0x7211107D,\n    (q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC593146A, (q31_t)0x71E3507F,\n    (q31_t)0xC5665FA8, (q31_t)0x71CC5626, (q31_t)0xC539B3F0, (q31_t)0x71B54A40,\n    (q31_t)0xC50D1148, (q31_t)0x719E2CD2, (q31_t)0xC4E077B8, (q31_t)0x7186FDDE,\n    (q31_t)0xC4B3E746, (q31_t)0x716FBD68, (q31_t)0xC4875FF8, (q31_t)0x71586B73,\n    (q31_t)0xC45AE1D7, (q31_t)0x71410804, (q31_t)0xC42E6CE8, (q31_t)0x7129931E,\n    (q31_t)0xC4020132, (q31_t)0x71120CC5, (q31_t)0xC3D59EBD, (q31_t)0x70FA74FB,\n    (q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC37CF5B0, (q31_t)0x70CB1127,\n    (q31_t)0xC350AF25, (q31_t)0x70B34524, (q31_t)0xC32471F6, (q31_t)0x709B67C0,\n    (q31_t)0xC2F83E2A, (q31_t)0x708378FE, (q31_t)0xC2CC13C7, (q31_t)0x706B78E3,\n    (q31_t)0xC29FF2D4, (q31_t)0x70536771, (q31_t)0xC273DB58, (q31_t)0x703B44AC,\n    (q31_t)0xC247CD5A, (q31_t)0x70231099, (q31_t)0xC21BC8E0, (q31_t)0x700ACB3B,\n    (q31_t)0xC1EFCDF2, (q31_t)0x6FF27496, (q31_t)0xC1C3DC96, (q31_t)0x6FDA0CAD,\n    (q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC16C16B0, (q31_t)0x6FA90920,\n    (q31_t)0xC1404233, (q31_t)0x6F906D84, (q31_t)0xC1147763, (q31_t)0x6F77C0B3,\n    (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1, (q31_t)0xC0BCFEE7, (q31_t)0x6F463383,\n    (q31_t)0xC0915147, (q31_t)0x6F2D532C, (q31_t)0xC065AD70, (q31_t)0x6F1461AF,\n    (q31_t)0xC03A1368, (q31_t)0x6EFB5F12, (q31_t)0xC00E8335, (q31_t)0x6EE24B57,\n    (q31_t)0xBFE2FCDF, (q31_t)0x6EC92682, (q31_t)0xBFB7806C, (q31_t)0x6EAFF098,\n    (q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBF60A54A, (q31_t)0x6E7D5193,\n    (q31_t)0xBF3546A8, (q31_t)0x6E63E87F, (q31_t)0xBF09F204, (q31_t)0x6E4A6E65,\n    (q31_t)0xBEDEA765, (q31_t)0x6E30E349, (q31_t)0xBEB366D1, (q31_t)0x6E17472F,\n    (q31_t)0xBE88304F, (q31_t)0x6DFD9A1B, (q31_t)0xBE5D03E5, (q31_t)0x6DE3DC11,\n    (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14, (q31_t)0xBE06C977, (q31_t)0x6DB02D29,\n    (q31_t)0xBDDBBB7F, (q31_t)0x6D963C54, (q31_t)0xBDB0B7BA, (q31_t)0x6D7C3A98,\n    (q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBD5ACEE5, (q31_t)0x6D48047E,\n    (q31_t)0xBD2FE9E1, (q31_t)0x6D2DD027, (q31_t)0xBD050F2C, (q31_t)0x6D138AFA,\n    (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB, (q31_t)0xBCAF78C3, (q31_t)0x6CDECE2E,\n    (q31_t)0xBC84BD1E, (q31_t)0x6CC45697, (q31_t)0xBC5A0BE1, (q31_t)0x6CA9CE3A,\n    (q31_t)0xBC2F6513, (q31_t)0x6C8F351C, (q31_t)0xBC04C8BA, (q31_t)0x6C748B3F,\n    (q31_t)0xBBDA36DC, (q31_t)0x6C59D0A9, (q31_t)0xBBAFAF81, (q31_t)0x6C3F055D,\n    (q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBB5AC06C, (q31_t)0x6C093CB6,\n    (q31_t)0xBB3058C0, (q31_t)0x6BEE3F62, (q31_t)0xBB05FBB0, (q31_t)0x6BD3316A,\n    (q31_t)0xBADBA943, (q31_t)0x6BB812D0, (q31_t)0xBAB1617F, (q31_t)0x6B9CE39B,\n    (q31_t)0xBA87246C, (q31_t)0x6B81A3CD, (q31_t)0xBA5CF210, (q31_t)0x6B66536A,\n    (q31_t)0xBA32CA70, (q31_t)0x6B4AF278, (q31_t)0xBA08AD94, (q31_t)0x6B2F80FA,\n    (q31_t)0xB9DE9B83, (q31_t)0x6B13FEF5, (q31_t)0xB9B49442, (q31_t)0x6AF86C6C,\n    (q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB960A64B, (q31_t)0x6AC115E1,\n    (q31_t)0xB936BFA3, (q31_t)0x6AA551E8, (q31_t)0xB90CE3E6, (q31_t)0x6A897D7D,\n    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4, (q31_t)0xB8B94D44, (q31_t)0x6A51A361,\n    (q31_t)0xB88F926C, (q31_t)0x6A359DB9, (q31_t)0xB865E299, (q31_t)0x6A1987B0,\n    (q31_t)0xB83C3DD1, (q31_t)0x69FD614A, (q31_t)0xB812A419, (q31_t)0x69E12A8C,\n    (q31_t)0xB7E9157A, (q31_t)0x69C4E37A, (q31_t)0xB7BF91F8, (q31_t)0x69A88C18,\n    (q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB76CAC68, (q31_t)0x696FAC78,\n    (q31_t)0xB7434A67, (q31_t)0x69532442, (q31_t)0xB719F39D, (q31_t)0x69368BCE,\n    (q31_t)0xB6F0A811, (q31_t)0x6919E320, (q31_t)0xB6C767CA, (q31_t)0x68FD2A3D,\n    (q31_t)0xB69E32CD, (q31_t)0x68E06129, (q31_t)0xB6750921, (q31_t)0x68C387E9,\n    (q31_t)0xB64BEACC, (q31_t)0x68A69E81, (q31_t)0xB622D7D5, (q31_t)0x6889A4F5,\n    (q31_t)0xB5F9D042, (q31_t)0x686C9B4B, (q31_t)0xB5D0D41A, (q31_t)0x684F8186,\n    (q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB57EFE21, (q31_t)0x68151DBE,\n    (q31_t)0xB556245E, (q31_t)0x67F7D3C4, (q31_t)0xB52D561E, (q31_t)0x67DA79C2,\n    (q31_t)0xB5049368, (q31_t)0x67BD0FBC, (q31_t)0xB4DBDC42, (q31_t)0x679F95B7,\n    (q31_t)0xB4B330B2, (q31_t)0x67820BB6, (q31_t)0xB48A90C0, (q31_t)0x676471C0,\n    (q31_t)0xB461FC70, (q31_t)0x6746C7D7, (q31_t)0xB43973C9, (q31_t)0x67290E02,\n    (q31_t)0xB410F6D2, (q31_t)0x670B4443, (q31_t)0xB3E88591, (q31_t)0x66ED6AA1,\n    (q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB397C649, (q31_t)0x66B187C3,\n    (q31_t)0xB36F784E, (q31_t)0x66937E90, (q31_t)0xB3473622, (q31_t)0x6675658C,\n    (q31_t)0xB31EFFCB, (q31_t)0x66573CBB, (q31_t)0xB2F6D54F, (q31_t)0x66390422,\n    (q31_t)0xB2CEB6B5, (q31_t)0x661ABBC5, (q31_t)0xB2A6A401, (q31_t)0x65FC63A9,\n    (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3, (q31_t)0xB256A26A, (q31_t)0x65BF8447,\n    (q31_t)0xB22EB392, (q31_t)0x65A0FD0B, (q31_t)0xB206D0BA, (q31_t)0x65826622,\n    (q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB1B72F23, (q31_t)0x6545095F,\n    (q31_t)0xB18F7070, (q31_t)0x6526438E, (q31_t)0xB167BDD6, (q31_t)0x65076E24,\n    (q31_t)0xB140175B, (q31_t)0x64E88926, (q31_t)0xB1187D05, (q31_t)0x64C99498,\n    (q31_t)0xB0F0EEDA, (q31_t)0x64AA907F, (q31_t)0xB0C96CDF, (q31_t)0x648B7CDF,\n    (q31_t)0xB0A1F71C, (q31_t)0x646C59BF, (q31_t)0xB07A8D97, (q31_t)0x644D2722,\n    (q31_t)0xB0533055, (q31_t)0x642DE50D, (q31_t)0xB02BDF5C, (q31_t)0x640E9385,\n    (q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAFDD625F, (q31_t)0x63CFC230,\n    (q31_t)0xAFB63667, (q31_t)0x63B0426D, (q31_t)0xAF8F16D0, (q31_t)0x6390B34A,\n    (q31_t)0xAF6803A1, (q31_t)0x637114CC, (q31_t)0xAF40FCE0, (q31_t)0x635166F8,\n    (q31_t)0xAF1A0293, (q31_t)0x6331A9D4, (q31_t)0xAEF314BF, (q31_t)0x6311DD63,\n    (q31_t)0xAECC336B, (q31_t)0x62F201AC, (q31_t)0xAEA55E9D, (q31_t)0x62D216B2,\n    (q31_t)0xAE7E965B, (q31_t)0x62B21C7B, (q31_t)0xAE57DAAA, (q31_t)0x6292130C,\n    (q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xAE0A8916, (q31_t)0x6251D297,\n    (q31_t)0xADE3F33E, (q31_t)0x62319B9D, (q31_t)0xADBD6A10, (q31_t)0x6211557D,\n    (q31_t)0xAD96ED91, (q31_t)0x61F1003E, (q31_t)0xAD707DC8, (q31_t)0x61D09BE5,\n    (q31_t)0xAD4A1ABA, (q31_t)0x61B02876, (q31_t)0xAD23C46D, (q31_t)0x618FA5F6,\n    (q31_t)0xACFD7AE8, (q31_t)0x616F146B, (q31_t)0xACD73E30, (q31_t)0x614E73D9,\n    (q31_t)0xACB10E4A, (q31_t)0x612DC446, (q31_t)0xAC8AEB3E, (q31_t)0x610D05B7,\n    (q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAC3ECBC7, (q31_t)0x60CB5BB6,\n    (q31_t)0xAC18CF68, (q31_t)0x60AA704F, (q31_t)0xABF2DFFA, (q31_t)0x60897600,\n    (q31_t)0xABCCFD82, (q31_t)0x60686CCE, (q31_t)0xABA72806, (q31_t)0x604754BE,\n    (q31_t)0xAB815F8C, (q31_t)0x60262DD5, (q31_t)0xAB5BA41A, (q31_t)0x6004F818,\n    (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D, (q31_t)0xAB105464, (q31_t)0x5FC26038,\n    (q31_t)0xAAEAC02B, (q31_t)0x5FA0FE1E, (q31_t)0xAAC53912, (q31_t)0x5F7F8D46,\n    (q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA7A5253, (q31_t)0x5F3C7F6B,\n    (q31_t)0xAA54F2B9, (q31_t)0x5F1AE273, (q31_t)0xAA2FA055, (q31_t)0x5EF936D1,\n    (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89, (q31_t)0xA9E52347, (q31_t)0x5EB5B3A1,\n    (q31_t)0xA9BFF8A8, (q31_t)0x5E93DC1F, (q31_t)0xA99ADB56, (q31_t)0x5E71F606,\n    (q31_t)0xA975CB56, (q31_t)0x5E50015D, (q31_t)0xA950C8AF, (q31_t)0x5E2DFE28,\n    (q31_t)0xA92BD366, (q31_t)0x5E0BEC6E, (q31_t)0xA906EB81, (q31_t)0x5DE9CC32,\n    (q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA8BD43FA, (q31_t)0x5DA5604E,\n    (q31_t)0xA8988463, (q31_t)0x5D8314B0, (q31_t)0xA873D246, (q31_t)0x5D60BAA6,\n    (q31_t)0xA84F2DA9, (q31_t)0x5D3E5236, (q31_t)0xA82A9693, (q31_t)0x5D1BDB65,\n    (q31_t)0xA8060D08, (q31_t)0x5CF95638, (q31_t)0xA7E1910E, (q31_t)0x5CD6C2B4,\n    (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF, (q31_t)0xA798C1E4, (q31_t)0x5C9170BF,\n    (q31_t)0xA7746EC0, (q31_t)0x5C6EB258, (q31_t)0xA7502943, (q31_t)0x5C4BE5B0,\n    (q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA707C756, (q31_t)0x5C0621B2,\n    (q31_t)0xA6E3AAF2, (q31_t)0x5BE32A67, (q31_t)0xA6BF9C4B, (q31_t)0x5BC024F0,\n    (q31_t)0xA69B9B68, (q31_t)0x5B9D1153, (q31_t)0xA677A84E, (q31_t)0x5B79EF96,\n    (q31_t)0xA653C302, (q31_t)0x5B56BFBD, (q31_t)0xA62FEB8B, (q31_t)0x5B3381CE,\n    (q31_t)0xA60C21ED, (q31_t)0x5B1035CF, (q31_t)0xA5E8662F, (q31_t)0x5AECDBC4,\n    (q31_t)0xA5C4B855, (q31_t)0x5AC973B4, (q31_t)0xA5A11865, (q31_t)0x5AA5FDA4,\n    (q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA55A025B, (q31_t)0x5A5EE79A,\n    (q31_t)0xA5368C4B, (q31_t)0x5A3B47AA, (q31_t)0xA513243B, (q31_t)0x5A1799D0,\n    (q31_t)0xA4EFCA31, (q31_t)0x59F3DE12, (q31_t)0xA4CC7E31, (q31_t)0x59D01474,\n    (q31_t)0xA4A94042, (q31_t)0x59AC3CFD, (q31_t)0xA4861069, (q31_t)0x598857B1,\n    (q31_t)0xA462EEAC, (q31_t)0x59646497, (q31_t)0xA43FDB0F, (q31_t)0x594063B4,\n    (q31_t)0xA41CD598, (q31_t)0x591C550E, (q31_t)0xA3F9DE4D, (q31_t)0x58F838A9,\n    (q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA3B41A4F, (q31_t)0x58AFD6BC,\n    (q31_t)0xA3914DA7, (q31_t)0x588B913F, (q31_t)0xA36E8F40, (q31_t)0x58673E1B,\n    (q31_t)0xA34BDF20, (q31_t)0x5842DD54, (q31_t)0xA3293D4B, (q31_t)0x581E6EF1,\n    (q31_t)0xA306A9C7, (q31_t)0x57F9F2F7, (q31_t)0xA2E4249A, (q31_t)0x57D5696C,\n    (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256, (q31_t)0xA29F4559, (q31_t)0x578C2DB9,\n    (q31_t)0xA27CEB4F, (q31_t)0x57677B9D, (q31_t)0xA25A9FB1, (q31_t)0x5742BC05,\n    (q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA21633CD, (q31_t)0x56F9147E,\n    (q31_t)0xA1F41391, (q31_t)0x56D42C99, (q31_t)0xA1D201D7, (q31_t)0x56AF3750,\n    (q31_t)0xA1AFFEA2, (q31_t)0x568A34A9, (q31_t)0xA18E09F9, (q31_t)0x566524AA,\n    (q31_t)0xA16C23E1, (q31_t)0x56400757, (q31_t)0xA14A4C5E, (q31_t)0x561ADCB8,\n    (q31_t)0xA1288376, (q31_t)0x55F5A4D2, (q31_t)0xA106C92E, (q31_t)0x55D05FAA,\n    (q31_t)0xA0E51D8C, (q31_t)0x55AB0D46, (q31_t)0xA0C38094, (q31_t)0x5585ADAC,\n    (q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA08072BA, (q31_t)0x553AC6ED,\n    (q31_t)0xA05F01E1, (q31_t)0x55153FD4, (q31_t)0xA03D9FC7, (q31_t)0x54EFAB9C,\n    (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A, (q31_t)0x9FFB07E7, (q31_t)0x54A45BE5,\n    (q31_t)0x9FD9D22A, (q31_t)0x547EA073, (q31_t)0x9FB8AB41, (q31_t)0x5458D7F9,\n    (q31_t)0x9F979331, (q31_t)0x5433027D, (q31_t)0x9F7689FF, (q31_t)0x540D2005,\n    (q31_t)0x9F558FB0, (q31_t)0x53E73097, (q31_t)0x9F34A449, (q31_t)0x53C13438,\n    (q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9EF2FA48, (q31_t)0x537514C1,\n    (q31_t)0x9ED23BB9, (q31_t)0x534EF1B5, (q31_t)0x9EB18C26, (q31_t)0x5328C1D0,\n    (q31_t)0x9E90EB94, (q31_t)0x53028517, (q31_t)0x9E705A09, (q31_t)0x52DC3B92,\n    (q31_t)0x9E4FD789, (q31_t)0x52B5E545, (q31_t)0x9E2F641A, (q31_t)0x528F8237,\n    (q31_t)0x9E0EFFC1, (q31_t)0x5269126E, (q31_t)0x9DEEAA82, (q31_t)0x524295EF,\n    (q31_t)0x9DCE6462, (q31_t)0x521C0CC1, (q31_t)0x9DAE2D68, (q31_t)0x51F576E9,\n    (q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D6DECF4, (q31_t)0x51A82555,\n    (q31_t)0x9D4DE384, (q31_t)0x518169A4, (q31_t)0x9D2DE94D, (q31_t)0x515AA162,\n    (q31_t)0x9D0DFE53, (q31_t)0x5133CC94, (q31_t)0x9CEE229C, (q31_t)0x510CEB40,\n    (q31_t)0x9CCE562B, (q31_t)0x50E5FD6C, (q31_t)0x9CAE9907, (q31_t)0x50BF031F,\n    (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E, (q31_t)0x9C6F4CB5, (q31_t)0x5070E92F,\n    (q31_t)0x9C4FBD92, (q31_t)0x5049C999, (q31_t)0x9C303DCF, (q31_t)0x50229DA0,\n    (q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9BF16C7A, (q31_t)0x4FD420A3,\n    (q31_t)0x9BD21AF2, (q31_t)0x4FACCFAB, (q31_t)0x9BB2D8DD, (q31_t)0x4F857268,\n    (q31_t)0x9B93A640, (q31_t)0x4F5E08E3, (q31_t)0x9B748320, (q31_t)0x4F369320,\n    (q31_t)0x9B556F80, (q31_t)0x4F0F1126, (q31_t)0x9B366B67, (q31_t)0x4EE782FA,\n    (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4, (q31_t)0x9AF891DB, (q31_t)0x4E984229,\n    (q31_t)0x9AD9BC71, (q31_t)0x4E708F8F, (q31_t)0x9ABAF6A0, (q31_t)0x4E48D0DC,\n    (q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A7D99DD, (q31_t)0x4DF92F45,\n    (q31_t)0x9A5F02F5, (q31_t)0x4DD14C6E, (q31_t)0x9A407BB8, (q31_t)0x4DA95D96,\n    (q31_t)0x9A22042C, (q31_t)0x4D8162C4, (q31_t)0x9A039C56, (q31_t)0x4D595BFE,\n    (q31_t)0x99E5443A, (q31_t)0x4D31494B, (q31_t)0x99C6FBDE, (q31_t)0x4D092AB0,\n    (q31_t)0x99A8C344, (q31_t)0x4CE10034, (q31_t)0x998A9A73, (q31_t)0x4CB8C9DD,\n    (q31_t)0x996C816F, (q31_t)0x4C9087B1, (q31_t)0x994E783C, (q31_t)0x4C6839B6,\n    (q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9912955E, (q31_t)0x4C177A6E,\n    (q31_t)0x98F4BBBC, (q31_t)0x4BEF092D, (q31_t)0x98D6F1FE, (q31_t)0x4BC68C36,\n    (q31_t)0x98B93828, (q31_t)0x4B9E038F, (q31_t)0x989B8E3F, (q31_t)0x4B756F3F,\n    (q31_t)0x987DF449, (q31_t)0x4B4CCF4D, (q31_t)0x98606A48, (q31_t)0x4B2423BD,\n    (q31_t)0x9842F043, (q31_t)0x4AFB6C97, (q31_t)0x9825863D, (q31_t)0x4AD2A9E1,\n    (q31_t)0x98082C3B, (q31_t)0x4AA9DBA1, (q31_t)0x97EAE241, (q31_t)0x4A8101DE,\n    (q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x97B07E7A, (q31_t)0x4A2F2BE5,\n    (q31_t)0x979364B5, (q31_t)0x4A062FBD, (q31_t)0x97765B0A, (q31_t)0x49DD282A,\n    (q31_t)0x9759617E, (q31_t)0x49B41533, (q31_t)0x973C7816, (q31_t)0x498AF6DE,\n    (q31_t)0x971F9ED6, (q31_t)0x4961CD32, (q31_t)0x9702D5C2, (q31_t)0x49389836,\n    (q31_t)0x96E61CDF, (q31_t)0x490F57EE, (q31_t)0x96C97431, (q31_t)0x48E60C62,\n    (q31_t)0x96ACDBBD, (q31_t)0x48BCB598, (q31_t)0x96905387, (q31_t)0x48935397,\n    (q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x965773E7, (q31_t)0x48406E07,\n    (q31_t)0x963B1C85, (q31_t)0x4816EA85, (q31_t)0x961ED573, (q31_t)0x47ED5BE6,\n    (q31_t)0x96029EB5, (q31_t)0x47C3C22E, (q31_t)0x95E6784F, (q31_t)0x479A1D66,\n    (q31_t)0x95CA6246, (q31_t)0x47706D93, (q31_t)0x95AE5C9E, (q31_t)0x4746B2BC,\n    (q31_t)0x9592675B, (q31_t)0x471CECE6, (q31_t)0x95768282, (q31_t)0x46F31C1A,\n    (q31_t)0x955AAE17, (q31_t)0x46C9405C, (q31_t)0x953EEA1E, (q31_t)0x469F59B4,\n    (q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x95079393, (q31_t)0x464B6BBD,\n    (q31_t)0x94EC010B, (q31_t)0x4621647C, (q31_t)0x94D07F05, (q31_t)0x45F7526B,\n    (q31_t)0x94B50D87, (q31_t)0x45CD358F, (q31_t)0x9499AC95, (q31_t)0x45A30DF0,\n    (q31_t)0x947E5C32, (q31_t)0x4578DB93, (q31_t)0x94631C64, (q31_t)0x454E9E80,\n    (q31_t)0x9447ED2F, (q31_t)0x452456BC, (q31_t)0x942CCE95, (q31_t)0x44FA044F,\n    (q31_t)0x9411C09D, (q31_t)0x44CFA73F, (q31_t)0x93F6C34A, (q31_t)0x44A53F93,\n    (q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x93C0FAA2, (q31_t)0x4450507E,\n    (q31_t)0x93A62F56, (q31_t)0x4425C923, (q31_t)0x938B74C0, (q31_t)0x43FB3745,\n    (q31_t)0x9370CAE4, (q31_t)0x43D09AEC, (q31_t)0x935631C5, (q31_t)0x43A5F41E,\n    (q31_t)0x933BA968, (q31_t)0x437B42E1, (q31_t)0x932131D1, (q31_t)0x4350873C,\n    (q31_t)0x9306CB04, (q31_t)0x4325C135, (q31_t)0x92EC7505, (q31_t)0x42FAF0D4,\n    (q31_t)0x92D22FD8, (q31_t)0x42D0161E, (q31_t)0x92B7FB82, (q31_t)0x42A5311A,\n    (q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9283C567, (q31_t)0x424F4845,\n    (q31_t)0x9269C3AC, (q31_t)0x42244480, (q31_t)0x924FD2D6, (q31_t)0x41F93688,\n    (q31_t)0x9235F2EB, (q31_t)0x41CE1E64, (q31_t)0x921C23EE, (q31_t)0x41A2FC1A,\n    (q31_t)0x920265E4, (q31_t)0x4177CFB0, (q31_t)0x91E8B8D0, (q31_t)0x414C992E,\n    (q31_t)0x91CF1CB6, (q31_t)0x4121589A, (q31_t)0x91B5919A, (q31_t)0x40F60DFB,\n    (q31_t)0x919C1780, (q31_t)0x40CAB957, (q31_t)0x9182AE6C, (q31_t)0x409F5AB6,\n    (q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x91500F67, (q31_t)0x40487F93,\n    (q31_t)0x9136D97D, (q31_t)0x401D0320, (q31_t)0x911DB4A8, (q31_t)0x3FF17CCA,\n    (q31_t)0x9104A0ED, (q31_t)0x3FC5EC97, (q31_t)0x90EB9E50, (q31_t)0x3F9A528F,\n    (q31_t)0x90D2ACD3, (q31_t)0x3F6EAEB8, (q31_t)0x90B9CC7C, (q31_t)0x3F430118,\n    (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7, (q31_t)0x90883F4C, (q31_t)0x3EEB889C,\n    (q31_t)0x906F927B, (q31_t)0x3EBFBDCC, (q31_t)0x9056F6DF, (q31_t)0x3E93E94F,\n    (q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x9025F352, (q31_t)0x3E3C2369,\n    (q31_t)0x900D8B69, (q31_t)0x3E10320D, (q31_t)0x8FF534C4, (q31_t)0x3DE4371F,\n    (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5, (q31_t)0x8FC4BB53, (q31_t)0x3D8C24A7,\n    (q31_t)0x8FAC988E, (q31_t)0x3D600D2B, (q31_t)0x8F94871D, (q31_t)0x3D33EC39,\n    (q31_t)0x8F7C8701, (q31_t)0x3D07C1D5, (q31_t)0x8F64983F, (q31_t)0x3CDB8E09,\n    (q31_t)0x8F4CBADB, (q31_t)0x3CAF50DA, (q31_t)0x8F34EED8, (q31_t)0x3C830A4F,\n    (q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8F058B04, (q31_t)0x3C2A6142,\n    (q31_t)0x8EEDF33B, (q31_t)0x3BFDFECD, (q31_t)0x8ED66CE1, (q31_t)0x3BD19317,\n    (q31_t)0x8EBEF7FB, (q31_t)0x3BA51E29, (q31_t)0x8EA7948C, (q31_t)0x3B78A007,\n    (q31_t)0x8E904298, (q31_t)0x3B4C18BA, (q31_t)0x8E790222, (q31_t)0x3B1F8847,\n    (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7, (q31_t)0x8E4AB5BF, (q31_t)0x3AC64C0F,\n    (q31_t)0x8E33A9D9, (q31_t)0x3A99A057, (q31_t)0x8E1CAF80, (q31_t)0x3A6CEB95,\n    (q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DEEEF82, (q31_t)0x3A136712,\n    (q31_t)0x8DD829E4, (q31_t)0x39E6975D, (q31_t)0x8DC175E0, (q31_t)0x39B9BEBB,\n    (q31_t)0x8DAAD37B, (q31_t)0x398CDD32, (q31_t)0x8D9442B7, (q31_t)0x395FF2C9,\n    (q31_t)0x8D7DC399, (q31_t)0x3932FF87, (q31_t)0x8D675623, (q31_t)0x39060372,\n    (q31_t)0x8D50FA59, (q31_t)0x38D8FE93, (q31_t)0x8D3AB03F, (q31_t)0x38ABF0EF,\n    (q31_t)0x8D2477D8, (q31_t)0x387EDA8E, (q31_t)0x8D0E5127, (q31_t)0x3851BB76,\n    (q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CE238F6, (q31_t)0x37F76340,\n    (q31_t)0x8CCC477D, (q31_t)0x37CA2A30, (q31_t)0x8CB667C7, (q31_t)0x379CE884,\n    (q31_t)0x8CA099D9, (q31_t)0x376F9E46, (q31_t)0x8C8ADDB6, (q31_t)0x37424B7A,\n    (q31_t)0x8C753361, (q31_t)0x3714F02A, (q31_t)0x8C5F9ADD, (q31_t)0x36E78C5A,\n    (q31_t)0x8C4A142F, (q31_t)0x36BA2013, (q31_t)0x8C349F58, (q31_t)0x368CAB5C,\n    (q31_t)0x8C1F3C5C, (q31_t)0x365F2E3B, (q31_t)0x8C09EB40, (q31_t)0x3631A8B7,\n    (q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BDF7EAF, (q31_t)0x35D684A5,\n    (q31_t)0x8BCA6342, (q31_t)0x35A8E624, (q31_t)0x8BB559C1, (q31_t)0x357B3F5D,\n    (q31_t)0x8BA0622F, (q31_t)0x354D9056, (q31_t)0x8B8B7C8F, (q31_t)0x351FD917,\n    (q31_t)0x8B76A8E4, (q31_t)0x34F219A7, (q31_t)0x8B61E732, (q31_t)0x34C4520D,\n    (q31_t)0x8B4D377C, (q31_t)0x3496824F, (q31_t)0x8B3899C5, (q31_t)0x3468AA76,\n    (q31_t)0x8B240E10, (q31_t)0x343ACA87, (q31_t)0x8B0F9461, (q31_t)0x340CE28A,\n    (q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AE6D71F, (q31_t)0x33B0FA84,\n    (q31_t)0x8AD29393, (q31_t)0x3382FA88, (q31_t)0x8ABE6219, (q31_t)0x3354F29A,\n    (q31_t)0x8AAA42B4, (q31_t)0x3326E2C2, (q31_t)0x8A963567, (q31_t)0x32F8CB07,\n    (q31_t)0x8A823A35, (q31_t)0x32CAAB6F, (q31_t)0x8A6E5122, (q31_t)0x329C8402,\n    (q31_t)0x8A5A7A30, (q31_t)0x326E54C7, (q31_t)0x8A46B563, (q31_t)0x32401DC5,\n    (q31_t)0x8A3302BD, (q31_t)0x3211DF03, (q31_t)0x8A1F6242, (q31_t)0x31E39889,\n    (q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89F857D8, (q31_t)0x3186F487,\n    (q31_t)0x89E4EDEE, (q31_t)0x3158970D, (q31_t)0x89D1963C, (q31_t)0x312A31F8,\n    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D, (q31_t)0x89AB1D86, (q31_t)0x30CD5114,\n    (q31_t)0x8997FC89, (q31_t)0x309ED555, (q31_t)0x8984EDCF, (q31_t)0x30705217,\n    (q31_t)0x8971F15A, (q31_t)0x3041C760, (q31_t)0x895F072D, (q31_t)0x30133538,\n    (q31_t)0x894C2F4C, (q31_t)0x2FE49BA6, (q31_t)0x893969B9, (q31_t)0x2FB5FAB2,\n    (q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x89141589, (q31_t)0x2F58A2BD,\n    (q31_t)0x890186F1, (q31_t)0x2F29EBCC, (q31_t)0x88EF0AB4, (q31_t)0x2EFB2D94,\n    (q31_t)0x88DCA0D3, (q31_t)0x2ECC681E, (q31_t)0x88CA4951, (q31_t)0x2E9D9B70,\n    (q31_t)0x88B80431, (q31_t)0x2E6EC792, (q31_t)0x88A5D177, (q31_t)0x2E3FEC8B,\n    (q31_t)0x8893B124, (q31_t)0x2E110A62, (q31_t)0x8881A33C, (q31_t)0x2DE2211E,\n    (q31_t)0x886FA7C2, (q31_t)0x2DB330C7, (q31_t)0x885DBEB7, (q31_t)0x2D843963,\n    (q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x883A23FE, (q31_t)0x2D263595,\n    (q31_t)0x88287255, (q31_t)0x2CF72939, (q31_t)0x8816D327, (q31_t)0x2CC815ED,\n    (q31_t)0x88054677, (q31_t)0x2C98FBBA, (q31_t)0x87F3CC47, (q31_t)0x2C69DAA6,\n    (q31_t)0x87E2649B, (q31_t)0x2C3AB2B9, (q31_t)0x87D10F75, (q31_t)0x2C0B83F9,\n    (q31_t)0x87BFCCD7, (q31_t)0x2BDC4E6F, (q31_t)0x87AE9CC5, (q31_t)0x2BAD1221,\n    (q31_t)0x879D7F40, (q31_t)0x2B7DCF17, (q31_t)0x878C744C, (q31_t)0x2B4E8558,\n    (q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x876A9621, (q31_t)0x2AEFDDD8,\n    (q31_t)0x8759C2EF, (q31_t)0x2AC08025, (q31_t)0x87490257, (q31_t)0x2A911BDB,\n    (q31_t)0x8738545E, (q31_t)0x2A61B101, (q31_t)0x8727B904, (q31_t)0x2A323F9D,\n    (q31_t)0x8717304E, (q31_t)0x2A02C7B8, (q31_t)0x8706BA3C, (q31_t)0x29D34958,\n    (q31_t)0x86F656D3, (q31_t)0x29A3C484, (q31_t)0x86E60614, (q31_t)0x29743945,\n    (q31_t)0x86D5C802, (q31_t)0x2944A7A2, (q31_t)0x86C59C9F, (q31_t)0x29150FA1,\n    (q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x86A57DF1, (q31_t)0x28B5CCA5,\n    (q31_t)0x86958AAB, (q31_t)0x288621B9, (q31_t)0x8685AA1F, (q31_t)0x2856708C,\n    (q31_t)0x8675DC4E, (q31_t)0x2826B928, (q31_t)0x8666213C, (q31_t)0x27F6FB92,\n    (q31_t)0x865678EA, (q31_t)0x27C737D2, (q31_t)0x8646E35B, (q31_t)0x27976DF1,\n    (q31_t)0x86376092, (q31_t)0x27679DF4, (q31_t)0x8627F090, (q31_t)0x2737C7E3,\n    (q31_t)0x86189359, (q31_t)0x2707EBC6, (q31_t)0x860948EE, (q31_t)0x26D809A5,\n    (q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85EAEC88, (q31_t)0x26783370,\n    (q31_t)0x85DBDA91, (q31_t)0x26483F6C, (q31_t)0x85CCDB70, (q31_t)0x26184581,\n    (q31_t)0x85BDEF27, (q31_t)0x25E845B5, (q31_t)0x85AF15B9, (q31_t)0x25B84012,\n    (q31_t)0x85A04F28, (q31_t)0x2588349D, (q31_t)0x85919B75, (q31_t)0x2558235E,\n    (q31_t)0x8582FAA4, (q31_t)0x25280C5D, (q31_t)0x85746CB7, (q31_t)0x24F7EFA1,\n    (q31_t)0x8565F1B0, (q31_t)0x24C7CD32, (q31_t)0x85578991, (q31_t)0x2497A517,\n    (q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x853AF214, (q31_t)0x243743FA,\n    (q31_t)0x852CC2BA, (q31_t)0x24070B07, (q31_t)0x851EA652, (q31_t)0x23D6CC86,\n    (q31_t)0x85109CDC, (q31_t)0x23A6887E, (q31_t)0x8502A65C, (q31_t)0x23763EF7,\n    (q31_t)0x84F4C2D3, (q31_t)0x2345EFF7, (q31_t)0x84E6F244, (q31_t)0x23159B87,\n    (q31_t)0x84D934B0, (q31_t)0x22E541AE, (q31_t)0x84CB8A1B, (q31_t)0x22B4E274,\n    (q31_t)0x84BDF285, (q31_t)0x22847DDF, (q31_t)0x84B06DF1, (q31_t)0x225413F8,\n    (q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x84959DD9, (q31_t)0x21F3304E,\n    (q31_t)0x84885257, (q31_t)0x21C2B69C, (q31_t)0x847B19E1, (q31_t)0x219237B4,\n    (q31_t)0x846DF476, (q31_t)0x2161B39F, (q31_t)0x8460E21A, (q31_t)0x21312A65,\n    (q31_t)0x8453E2CE, (q31_t)0x21009C0B, (q31_t)0x8446F695, (q31_t)0x20D0089B,\n    (q31_t)0x843A1D70, (q31_t)0x209F701C, (q31_t)0x842D5761, (q31_t)0x206ED295,\n    (q31_t)0x8420A46B, (q31_t)0x203E300D, (q31_t)0x8414048F, (q31_t)0x200D888C,\n    (q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83FAFE2E, (q31_t)0x1FAC2ABF,\n    (q31_t)0x83EE97AC, (q31_t)0x1F7B7480, (q31_t)0x83E2444D, (q31_t)0x1F4AB967,\n    (q31_t)0x83D60411, (q31_t)0x1F19F97B, (q31_t)0x83C9D6FB, (q31_t)0x1EE934C2,\n    (q31_t)0x83BDBD0D, (q31_t)0x1EB86B46, (q31_t)0x83B1B649, (q31_t)0x1E879D0C,\n    (q31_t)0x83A5C2B0, (q31_t)0x1E56CA1E, (q31_t)0x8399E244, (q31_t)0x1E25F281,\n    (q31_t)0x838E1507, (q31_t)0x1DF5163F, (q31_t)0x83825AFB, (q31_t)0x1DC4355D,\n    (q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x836B207D, (q31_t)0x1D6265DD,\n    (q31_t)0x835FA00E, (q31_t)0x1D31774D, (q31_t)0x835432D8, (q31_t)0x1D00843C,\n    (q31_t)0x8348D8DB, (q31_t)0x1CCF8CB3, (q31_t)0x833D921A, (q31_t)0x1C9E90B8,\n    (q31_t)0x83325E97, (q31_t)0x1C6D9053, (q31_t)0x83273E52, (q31_t)0x1C3C8B8C,\n    (q31_t)0x831C314E, (q31_t)0x1C0B826A, (q31_t)0x8311378C, (q31_t)0x1BDA74F5,\n    (q31_t)0x8306510F, (q31_t)0x1BA96334, (q31_t)0x82FB7DD8, (q31_t)0x1B784D30,\n    (q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82E61141, (q31_t)0x1B161479,\n    (q31_t)0x82DB77E5, (q31_t)0x1AE4F1D6, (q31_t)0x82D0F1D5, (q31_t)0x1AB3CB0C,\n    (q31_t)0x82C67F13, (q31_t)0x1A82A025, (q31_t)0x82BC1FA1, (q31_t)0x1A517127,\n    (q31_t)0x82B1D381, (q31_t)0x1A203E1B, (q31_t)0x82A79AB3, (q31_t)0x19EF0706,\n    (q31_t)0x829D753A, (q31_t)0x19BDCBF2, (q31_t)0x82936316, (q31_t)0x198C8CE6,\n    (q31_t)0x8289644A, (q31_t)0x195B49E9, (q31_t)0x827F78D8, (q31_t)0x192A0303,\n    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x826BDC04, (q31_t)0x18C7699B,\n    (q31_t)0x82622AA5, (q31_t)0x18961727, (q31_t)0x82588CA6, (q31_t)0x1864C0E9,\n    (q31_t)0x824F0208, (q31_t)0x183366E8, (q31_t)0x82458ACB, (q31_t)0x1802092C,\n    (q31_t)0x823C26F2, (q31_t)0x17D0A7BB, (q31_t)0x8232D67E, (q31_t)0x179F429F,\n    (q31_t)0x82299971, (q31_t)0x176DD9DE, (q31_t)0x82206FCB, (q31_t)0x173C6D80,\n    (q31_t)0x8217598F, (q31_t)0x170AFD8D, (q31_t)0x820E56BE, (q31_t)0x16D98A0C,\n    (q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81FC8B60, (q31_t)0x1676987F,\n    (q31_t)0x81F3C2D7, (q31_t)0x16451A83, (q31_t)0x81EB0DBD, (q31_t)0x16139917,\n    (q31_t)0x81E26C16, (q31_t)0x15E21444, (q31_t)0x81D9DDE1, (q31_t)0x15B08C11,\n    (q31_t)0x81D16320, (q31_t)0x157F0086, (q31_t)0x81C8FBD5, (q31_t)0x154D71AA,\n    (q31_t)0x81C0A801, (q31_t)0x151BDF85, (q31_t)0x81B867A4, (q31_t)0x14EA4A1F,\n    (q31_t)0x81B03AC1, (q31_t)0x14B8B17F, (q31_t)0x81A82159, (q31_t)0x148715AD,\n    (q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x819828FD, (q31_t)0x1423D492,\n    (q31_t)0x81904A0C, (q31_t)0x13F22F57, (q31_t)0x81887E9A, (q31_t)0x13C0870A,\n    (q31_t)0x8180C6A9, (q31_t)0x138EDBB0, (q31_t)0x8179223A, (q31_t)0x135D2D53,\n    (q31_t)0x8171914E, (q31_t)0x132B7BF9, (q31_t)0x816A13E6, (q31_t)0x12F9C7AA,\n    (q31_t)0x8162AA03, (q31_t)0x12C8106E, (q31_t)0x815B53A8, (q31_t)0x1296564D,\n    (q31_t)0x815410D3, (q31_t)0x1264994E, (q31_t)0x814CE188, (q31_t)0x1232D978,\n    (q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x813EBD90, (q31_t)0x11CF516A,\n    (q31_t)0x8137C8E6, (q31_t)0x119D8940, (q31_t)0x8130E7C8, (q31_t)0x116BBE5F,\n    (q31_t)0x812A1A39, (q31_t)0x1139F0CE, (q31_t)0x81236039, (q31_t)0x11082096,\n    (q31_t)0x811CB9CA, (q31_t)0x10D64DBC, (q31_t)0x811626EC, (q31_t)0x10A4784A,\n    (q31_t)0x810FA7A0, (q31_t)0x1072A047, (q31_t)0x81093BE8, (q31_t)0x1040C5BB,\n    (q31_t)0x8102E3C3, (q31_t)0x100EE8AD, (q31_t)0x80FC9F35, (q31_t)0x0FDD0925,\n    (q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80F050DB, (q31_t)0x0F7942C6,\n    (q31_t)0x80EA4712, (q31_t)0x0F475BFE, (q31_t)0x80E450E2, (q31_t)0x0F1572DC,\n    (q31_t)0x80DE6E4C, (q31_t)0x0EE38765, (q31_t)0x80D89F51, (q31_t)0x0EB199A3,\n    (q31_t)0x80D2E3F1, (q31_t)0x0E7FA99D, (q31_t)0x80CD3C2F, (q31_t)0x0E4DB75B,\n    (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3, (q31_t)0x80C22783, (q31_t)0x0DE9CC3F,\n    (q31_t)0x80BCBA9C, (q31_t)0x0DB7D376, (q31_t)0x80B76155, (q31_t)0x0D85D88F,\n    (q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x80ACE9AB, (q31_t)0x0D21DC87,\n    (q31_t)0x80A7CB49, (q31_t)0x0CEFDB75, (q31_t)0x80A2C08B, (q31_t)0x0CBDD865,\n    (q31_t)0x809DC970, (q31_t)0x0C8BD35E, (q31_t)0x8098E5FB, (q31_t)0x0C59CC67,\n    (q31_t)0x8094162B, (q31_t)0x0C27C389, (q31_t)0x808F5A02, (q31_t)0x0BF5B8CB,\n    (q31_t)0x808AB180, (q31_t)0x0BC3AC35, (q31_t)0x80861CA5, (q31_t)0x0B919DCE,\n    (q31_t)0x80819B74, (q31_t)0x0B5F8D9F, (q31_t)0x807D2DEB, (q31_t)0x0B2D7BAE,\n    (q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80748DD9, (q31_t)0x0AC952AA,\n    (q31_t)0x80705B50, (q31_t)0x0A973BA5, (q31_t)0x806C3C73, (q31_t)0x0A6522FE,\n    (q31_t)0x80683143, (q31_t)0x0A3308BC, (q31_t)0x806439C0, (q31_t)0x0A00ECE8,\n    (q31_t)0x806055EA, (q31_t)0x09CECF89, (q31_t)0x805C85C3, (q31_t)0x099CB0A7,\n    (q31_t)0x8058C94C, (q31_t)0x096A9049, (q31_t)0x80552083, (q31_t)0x09386E77,\n    (q31_t)0x80518B6B, (q31_t)0x09064B3A, (q31_t)0x804E0A03, (q31_t)0x08D42698,\n    (q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x80474248, (q31_t)0x086FD947,\n    (q31_t)0x8043FBF6, (q31_t)0x083DB0A7, (q31_t)0x8040C956, (q31_t)0x080B86C1,\n    (q31_t)0x803DAA69, (q31_t)0x07D95B9E, (q31_t)0x803A9F31, (q31_t)0x07A72F45,\n    (q31_t)0x8037A7AC, (q31_t)0x077501BE, (q31_t)0x8034C3DC, (q31_t)0x0742D310,\n    (q31_t)0x8031F3C1, (q31_t)0x0710A344, (q31_t)0x802F375C, (q31_t)0x06DE7261,\n    (q31_t)0x802C8EAD, (q31_t)0x06AC406F, (q31_t)0x8029F9B4, (q31_t)0x067A0D75,\n    (q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80250AE7, (q31_t)0x0615A48A,\n    (q31_t)0x8022B113, (q31_t)0x05E36EA9, (q31_t)0x80206AF8, (q31_t)0x05B137DF,\n    (q31_t)0x801E3894, (q31_t)0x057F0034, (q31_t)0x801C19E9, (q31_t)0x054CC7B0,\n    (q31_t)0x801A0EF7, (q31_t)0x051A8E5C, (q31_t)0x801817BF, (q31_t)0x04E8543D,\n    (q31_t)0x80163440, (q31_t)0x04B6195D, (q31_t)0x8014647A, (q31_t)0x0483DDC3,\n    (q31_t)0x8012A86F, (q31_t)0x0451A176, (q31_t)0x8011001E, (q31_t)0x041F647F,\n    (q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x800DEAAC, (q31_t)0x03BAE8B1,\n    (q31_t)0x800C7D8C, (q31_t)0x0388A9E9, (q31_t)0x800B2427, (q31_t)0x03566A96,\n    (q31_t)0x8009DE7D, (q31_t)0x03242ABF, (q31_t)0x8008AC90, (q31_t)0x02F1EA6B,\n    (q31_t)0x80078E5E, (q31_t)0x02BFA9A4, (q31_t)0x800683E8, (q31_t)0x028D6870,\n    (q31_t)0x80058D2E, (q31_t)0x025B26D7, (q31_t)0x8004AA31, (q31_t)0x0228E4E1,\n    (q31_t)0x8003DAF0, (q31_t)0x01F6A296, (q31_t)0x80031F6C, (q31_t)0x01C45FFE,\n    (q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x8001E39B, (q31_t)0x015FDA03,\n    (q31_t)0x8001634D, (q31_t)0x012D96B0, (q31_t)0x8000F6BD, (q31_t)0x00FB532F,\n    (q31_t)0x80009DE9, (q31_t)0x00C90F88, (q31_t)0x800058D3, (q31_t)0x0096CBC1,\n    (q31_t)0x8000277A, (q31_t)0x006487E3, (q31_t)0x800009DE, (q31_t)0x003243F5,\n    (q31_t)0x80000000, (q31_t)0x00000000, (q31_t)0x800009DE, (q31_t)0xFFCDBC0A,\n    (q31_t)0x8000277A, (q31_t)0xFF9B781D, (q31_t)0x800058D3, (q31_t)0xFF69343E,\n    (q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x8000F6BD, (q31_t)0xFF04ACD0,\n    (q31_t)0x8001634D, (q31_t)0xFED2694F, (q31_t)0x8001E39B, (q31_t)0xFEA025FC,\n    (q31_t)0x800277A5, (q31_t)0xFE6DE2E0, (q31_t)0x80031F6C, (q31_t)0xFE3BA001,\n    (q31_t)0x8003DAF0, (q31_t)0xFE095D69, (q31_t)0x8004AA31, (q31_t)0xFDD71B1E,\n    (q31_t)0x80058D2E, (q31_t)0xFDA4D928, (q31_t)0x800683E8, (q31_t)0xFD72978F,\n    (q31_t)0x80078E5E, (q31_t)0xFD40565B, (q31_t)0x8008AC90, (q31_t)0xFD0E1594,\n    (q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800B2427, (q31_t)0xFCA99569,\n    (q31_t)0x800C7D8C, (q31_t)0xFC775616, (q31_t)0x800DEAAC, (q31_t)0xFC45174E,\n    (q31_t)0x800F6B88, (q31_t)0xFC12D919, (q31_t)0x8011001E, (q31_t)0xFBE09B80,\n    (q31_t)0x8012A86F, (q31_t)0xFBAE5E89, (q31_t)0x8014647A, (q31_t)0xFB7C223C,\n    (q31_t)0x80163440, (q31_t)0xFB49E6A2, (q31_t)0x801817BF, (q31_t)0xFB17ABC2,\n    (q31_t)0x801A0EF7, (q31_t)0xFAE571A4, (q31_t)0x801C19E9, (q31_t)0xFAB3384F,\n    (q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x80206AF8, (q31_t)0xFA4EC820,\n    (q31_t)0x8022B113, (q31_t)0xFA1C9156, (q31_t)0x80250AE7, (q31_t)0xF9EA5B75,\n    (q31_t)0x80277872, (q31_t)0xF9B82683, (q31_t)0x8029F9B4, (q31_t)0xF985F28A,\n    (q31_t)0x802C8EAD, (q31_t)0xF953BF90, (q31_t)0x802F375C, (q31_t)0xF9218D9E,\n    (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB, (q31_t)0x8034C3DC, (q31_t)0xF8BD2CEF,\n    (q31_t)0x8037A7AC, (q31_t)0xF88AFE41, (q31_t)0x803A9F31, (q31_t)0xF858D0BA,\n    (q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8040C956, (q31_t)0xF7F4793E,\n    (q31_t)0x8043FBF6, (q31_t)0xF7C24F58, (q31_t)0x80474248, (q31_t)0xF79026B8,\n    (q31_t)0x804A9C4D, (q31_t)0xF75DFF65, (q31_t)0x804E0A03, (q31_t)0xF72BD967,\n    (q31_t)0x80518B6B, (q31_t)0xF6F9B4C5, (q31_t)0x80552083, (q31_t)0xF6C79188,\n    (q31_t)0x8058C94C, (q31_t)0xF6956FB6, (q31_t)0x805C85C3, (q31_t)0xF6634F58,\n    (q31_t)0x806055EA, (q31_t)0xF6313076, (q31_t)0x806439C0, (q31_t)0xF5FF1317,\n    (q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x806C3C73, (q31_t)0xF59ADD01,\n    (q31_t)0x80705B50, (q31_t)0xF568C45A, (q31_t)0x80748DD9, (q31_t)0xF536AD55,\n    (q31_t)0x8078D40D, (q31_t)0xF50497FA, (q31_t)0x807D2DEB, (q31_t)0xF4D28451,\n    (q31_t)0x80819B74, (q31_t)0xF4A07260, (q31_t)0x80861CA5, (q31_t)0xF46E6231,\n    (q31_t)0x808AB180, (q31_t)0xF43C53CA, (q31_t)0x808F5A02, (q31_t)0xF40A4734,\n    (q31_t)0x8094162B, (q31_t)0xF3D83C76, (q31_t)0x8098E5FB, (q31_t)0xF3A63398,\n    (q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80A2C08B, (q31_t)0xF342279A,\n    (q31_t)0x80A7CB49, (q31_t)0xF310248A, (q31_t)0x80ACE9AB, (q31_t)0xF2DE2378,\n    (q31_t)0x80B21BAF, (q31_t)0xF2AC246D, (q31_t)0x80B76155, (q31_t)0xF27A2770,\n    (q31_t)0x80BCBA9C, (q31_t)0xF2482C89, (q31_t)0x80C22783, (q31_t)0xF21633C0,\n    (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C, (q31_t)0x80CD3C2F, (q31_t)0xF1B248A5,\n    (q31_t)0x80D2E3F1, (q31_t)0xF1805662, (q31_t)0x80D89F51, (q31_t)0xF14E665C,\n    (q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80E450E2, (q31_t)0xF0EA8D23,\n    (q31_t)0x80EA4712, (q31_t)0xF0B8A401, (q31_t)0x80F050DB, (q31_t)0xF086BD39,\n    (q31_t)0x80F66E3C, (q31_t)0xF054D8D4, (q31_t)0x80FC9F35, (q31_t)0xF022F6DA,\n    (q31_t)0x8102E3C3, (q31_t)0xEFF11752, (q31_t)0x81093BE8, (q31_t)0xEFBF3A44,\n    (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8, (q31_t)0x811626EC, (q31_t)0xEF5B87B5,\n    (q31_t)0x811CB9CA, (q31_t)0xEF29B243, (q31_t)0x81236039, (q31_t)0xEEF7DF6A,\n    (q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8130E7C8, (q31_t)0xEE9441A0,\n    (q31_t)0x8137C8E6, (q31_t)0xEE6276BF, (q31_t)0x813EBD90, (q31_t)0xEE30AE95,\n    (q31_t)0x8145C5C6, (q31_t)0xEDFEE92B, (q31_t)0x814CE188, (q31_t)0xEDCD2687,\n    (q31_t)0x815410D3, (q31_t)0xED9B66B2, (q31_t)0x815B53A8, (q31_t)0xED69A9B2,\n    (q31_t)0x8162AA03, (q31_t)0xED37EF91, (q31_t)0x816A13E6, (q31_t)0xED063855,\n    (q31_t)0x8171914E, (q31_t)0xECD48406, (q31_t)0x8179223A, (q31_t)0xECA2D2AC,\n    (q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81887E9A, (q31_t)0xEC3F78F5,\n    (q31_t)0x81904A0C, (q31_t)0xEC0DD0A8, (q31_t)0x819828FD, (q31_t)0xEBDC2B6D,\n    (q31_t)0x81A01B6C, (q31_t)0xEBAA894E, (q31_t)0x81A82159, (q31_t)0xEB78EA52,\n    (q31_t)0x81B03AC1, (q31_t)0xEB474E80, (q31_t)0x81B867A4, (q31_t)0xEB15B5E0,\n    (q31_t)0x81C0A801, (q31_t)0xEAE4207A, (q31_t)0x81C8FBD5, (q31_t)0xEAB28E55,\n    (q31_t)0x81D16320, (q31_t)0xEA80FF79, (q31_t)0x81D9DDE1, (q31_t)0xEA4F73EE,\n    (q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x81EB0DBD, (q31_t)0xE9EC66E8,\n    (q31_t)0x81F3C2D7, (q31_t)0xE9BAE57C, (q31_t)0x81FC8B60, (q31_t)0xE9896780,\n    (q31_t)0x82056758, (q31_t)0xE957ECFB, (q31_t)0x820E56BE, (q31_t)0xE92675F4,\n    (q31_t)0x8217598F, (q31_t)0xE8F50273, (q31_t)0x82206FCB, (q31_t)0xE8C3927F,\n    (q31_t)0x82299971, (q31_t)0xE8922621, (q31_t)0x8232D67E, (q31_t)0xE860BD60,\n    (q31_t)0x823C26F2, (q31_t)0xE82F5844, (q31_t)0x82458ACB, (q31_t)0xE7FDF6D3,\n    (q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x82588CA6, (q31_t)0xE79B3F16,\n    (q31_t)0x82622AA5, (q31_t)0xE769E8D8, (q31_t)0x826BDC04, (q31_t)0xE7389664,\n    (q31_t)0x8275A0C0, (q31_t)0xE70747C3, (q31_t)0x827F78D8, (q31_t)0xE6D5FCFC,\n    (q31_t)0x8289644A, (q31_t)0xE6A4B616, (q31_t)0x82936316, (q31_t)0xE6737319,\n    (q31_t)0x829D753A, (q31_t)0xE642340D, (q31_t)0x82A79AB3, (q31_t)0xE610F8F9,\n    (q31_t)0x82B1D381, (q31_t)0xE5DFC1E4, (q31_t)0x82BC1FA1, (q31_t)0xE5AE8ED8,\n    (q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82D0F1D5, (q31_t)0xE54C34F3,\n    (q31_t)0x82DB77E5, (q31_t)0xE51B0E2A, (q31_t)0x82E61141, (q31_t)0xE4E9EB86,\n    (q31_t)0x82F0BDE8, (q31_t)0xE4B8CD10, (q31_t)0x82FB7DD8, (q31_t)0xE487B2CF,\n    (q31_t)0x8306510F, (q31_t)0xE4569CCB, (q31_t)0x8311378C, (q31_t)0xE4258B0A,\n    (q31_t)0x831C314E, (q31_t)0xE3F47D95, (q31_t)0x83273E52, (q31_t)0xE3C37473,\n    (q31_t)0x83325E97, (q31_t)0xE3926FAC, (q31_t)0x833D921A, (q31_t)0xE3616F47,\n    (q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x835432D8, (q31_t)0xE2FF7BC3,\n    (q31_t)0x835FA00E, (q31_t)0xE2CE88B2, (q31_t)0x836B207D, (q31_t)0xE29D9A22,\n    (q31_t)0x8376B422, (q31_t)0xE26CB01A, (q31_t)0x83825AFB, (q31_t)0xE23BCAA2,\n    (q31_t)0x838E1507, (q31_t)0xE20AE9C1, (q31_t)0x8399E244, (q31_t)0xE1DA0D7E,\n    (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1, (q31_t)0x83B1B649, (q31_t)0xE17862F3,\n    (q31_t)0x83BDBD0D, (q31_t)0xE14794B9, (q31_t)0x83C9D6FB, (q31_t)0xE116CB3D,\n    (q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x83E2444D, (q31_t)0xE0B54698,\n    (q31_t)0x83EE97AC, (q31_t)0xE0848B7F, (q31_t)0x83FAFE2E, (q31_t)0xE053D541,\n    (q31_t)0x840777CF, (q31_t)0xE02323E5, (q31_t)0x8414048F, (q31_t)0xDFF27773,\n    (q31_t)0x8420A46B, (q31_t)0xDFC1CFF2, (q31_t)0x842D5761, (q31_t)0xDF912D6A,\n    (q31_t)0x843A1D70, (q31_t)0xDF608FE3, (q31_t)0x8446F695, (q31_t)0xDF2FF764,\n    (q31_t)0x8453E2CE, (q31_t)0xDEFF63F4, (q31_t)0x8460E21A, (q31_t)0xDECED59B,\n    (q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x847B19E1, (q31_t)0xDE6DC84B,\n    (q31_t)0x84885257, (q31_t)0xDE3D4963, (q31_t)0x84959DD9, (q31_t)0xDE0CCFB1,\n    (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A, (q31_t)0x84B06DF1, (q31_t)0xDDABEC07,\n    (q31_t)0x84BDF285, (q31_t)0xDD7B8220, (q31_t)0x84CB8A1B, (q31_t)0xDD4B1D8B,\n    (q31_t)0x84D934B0, (q31_t)0xDD1ABE51, (q31_t)0x84E6F244, (q31_t)0xDCEA6478,\n    (q31_t)0x84F4C2D3, (q31_t)0xDCBA1008, (q31_t)0x8502A65C, (q31_t)0xDC89C108,\n    (q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x851EA652, (q31_t)0xDC293379,\n    (q31_t)0x852CC2BA, (q31_t)0xDBF8F4F8, (q31_t)0x853AF214, (q31_t)0xDBC8BC05,\n    (q31_t)0x8549345C, (q31_t)0xDB9888A8, (q31_t)0x85578991, (q31_t)0xDB685AE8,\n    (q31_t)0x8565F1B0, (q31_t)0xDB3832CD, (q31_t)0x85746CB7, (q31_t)0xDB08105E,\n    (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2, (q31_t)0x85919B75, (q31_t)0xDAA7DCA1,\n    (q31_t)0x85A04F28, (q31_t)0xDA77CB62, (q31_t)0x85AF15B9, (q31_t)0xDA47BFED,\n    (q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85CCDB70, (q31_t)0xD9E7BA7E,\n    (q31_t)0x85DBDA91, (q31_t)0xD9B7C093, (q31_t)0x85EAEC88, (q31_t)0xD987CC8F,\n    (q31_t)0x85FA1152, (q31_t)0xD957DE7A, (q31_t)0x860948EE, (q31_t)0xD927F65B,\n    (q31_t)0x86189359, (q31_t)0xD8F81439, (q31_t)0x8627F090, (q31_t)0xD8C8381C,\n    (q31_t)0x86376092, (q31_t)0xD898620C, (q31_t)0x8646E35B, (q31_t)0xD868920F,\n    (q31_t)0x865678EA, (q31_t)0xD838C82D, (q31_t)0x8666213C, (q31_t)0xD809046D,\n    (q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x8685AA1F, (q31_t)0xD7A98F73,\n    (q31_t)0x86958AAB, (q31_t)0xD779DE46, (q31_t)0x86A57DF1, (q31_t)0xD74A335A,\n    (q31_t)0x86B583EE, (q31_t)0xD71A8EB5, (q31_t)0x86C59C9F, (q31_t)0xD6EAF05E,\n    (q31_t)0x86D5C802, (q31_t)0xD6BB585D, (q31_t)0x86E60614, (q31_t)0xD68BC6BA,\n    (q31_t)0x86F656D3, (q31_t)0xD65C3B7B, (q31_t)0x8706BA3C, (q31_t)0xD62CB6A7,\n    (q31_t)0x8717304E, (q31_t)0xD5FD3847, (q31_t)0x8727B904, (q31_t)0xD5CDC062,\n    (q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x87490257, (q31_t)0xD56EE424,\n    (q31_t)0x8759C2EF, (q31_t)0xD53F7FDA, (q31_t)0x876A9621, (q31_t)0xD5102227,\n    (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14, (q31_t)0x878C744C, (q31_t)0xD4B17AA7,\n    (q31_t)0x879D7F40, (q31_t)0xD48230E8, (q31_t)0x87AE9CC5, (q31_t)0xD452EDDE,\n    (q31_t)0x87BFCCD7, (q31_t)0xD423B190, (q31_t)0x87D10F75, (q31_t)0xD3F47C06,\n    (q31_t)0x87E2649B, (q31_t)0xD3C54D46, (q31_t)0x87F3CC47, (q31_t)0xD3962559,\n    (q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x8816D327, (q31_t)0xD337EA12,\n    (q31_t)0x88287255, (q31_t)0xD308D6C6, (q31_t)0x883A23FE, (q31_t)0xD2D9CA6A,\n    (q31_t)0x884BE820, (q31_t)0xD2AAC504, (q31_t)0x885DBEB7, (q31_t)0xD27BC69C,\n    (q31_t)0x886FA7C2, (q31_t)0xD24CCF38, (q31_t)0x8881A33C, (q31_t)0xD21DDEE1,\n    (q31_t)0x8893B124, (q31_t)0xD1EEF59E, (q31_t)0x88A5D177, (q31_t)0xD1C01374,\n    (q31_t)0x88B80431, (q31_t)0xD191386D, (q31_t)0x88CA4951, (q31_t)0xD162648F,\n    (q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x88EF0AB4, (q31_t)0xD104D26B,\n    (q31_t)0x890186F1, (q31_t)0xD0D61433, (q31_t)0x89141589, (q31_t)0xD0A75D42,\n    (q31_t)0x8926B677, (q31_t)0xD078AD9D, (q31_t)0x893969B9, (q31_t)0xD04A054D,\n    (q31_t)0x894C2F4C, (q31_t)0xD01B6459, (q31_t)0x895F072D, (q31_t)0xCFECCAC7,\n    (q31_t)0x8971F15A, (q31_t)0xCFBE389F, (q31_t)0x8984EDCF, (q31_t)0xCF8FADE8,\n    (q31_t)0x8997FC89, (q31_t)0xCF612AAA, (q31_t)0x89AB1D86, (q31_t)0xCF32AEEB,\n    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x89D1963C, (q31_t)0xCED5CE08,\n    (q31_t)0x89E4EDEE, (q31_t)0xCEA768F2, (q31_t)0x89F857D8, (q31_t)0xCE790B78,\n    (q31_t)0x8A0BD3F5, (q31_t)0xCE4AB5A2, (q31_t)0x8A1F6242, (q31_t)0xCE1C6776,\n    (q31_t)0x8A3302BD, (q31_t)0xCDEE20FC, (q31_t)0x8A46B563, (q31_t)0xCDBFE23A,\n    (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38, (q31_t)0x8A6E5122, (q31_t)0xCD637BFD,\n    (q31_t)0x8A823A35, (q31_t)0xCD355490, (q31_t)0x8A963567, (q31_t)0xCD0734F8,\n    (q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8ABE6219, (q31_t)0xCCAB0D65,\n    (q31_t)0x8AD29393, (q31_t)0xCC7D0577, (q31_t)0x8AE6D71F, (q31_t)0xCC4F057B,\n    (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78, (q31_t)0x8B0F9461, (q31_t)0xCBF31D75,\n    (q31_t)0x8B240E10, (q31_t)0xCBC53578, (q31_t)0x8B3899C5, (q31_t)0xCB975589,\n    (q31_t)0x8B4D377C, (q31_t)0xCB697DB0, (q31_t)0x8B61E732, (q31_t)0xCB3BADF2,\n    (q31_t)0x8B76A8E4, (q31_t)0xCB0DE658, (q31_t)0x8B8B7C8F, (q31_t)0xCAE026E8,\n    (q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BB559C1, (q31_t)0xCA84C0A2,\n    (q31_t)0x8BCA6342, (q31_t)0xCA5719DB, (q31_t)0x8BDF7EAF, (q31_t)0xCA297B5A,\n    (q31_t)0x8BF4AC05, (q31_t)0xC9FBE527, (q31_t)0x8C09EB40, (q31_t)0xC9CE5748,\n    (q31_t)0x8C1F3C5C, (q31_t)0xC9A0D1C4, (q31_t)0x8C349F58, (q31_t)0xC97354A3,\n    (q31_t)0x8C4A142F, (q31_t)0xC945DFEC, (q31_t)0x8C5F9ADD, (q31_t)0xC91873A5,\n    (q31_t)0x8C753361, (q31_t)0xC8EB0FD6, (q31_t)0x8C8ADDB6, (q31_t)0xC8BDB485,\n    (q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CB667C7, (q31_t)0xC863177B,\n    (q31_t)0x8CCC477D, (q31_t)0xC835D5D0, (q31_t)0x8CE238F6, (q31_t)0xC8089CBF,\n    (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50, (q31_t)0x8D0E5127, (q31_t)0xC7AE4489,\n    (q31_t)0x8D2477D8, (q31_t)0xC7812571, (q31_t)0x8D3AB03F, (q31_t)0xC7540F10,\n    (q31_t)0x8D50FA59, (q31_t)0xC727016C, (q31_t)0x8D675623, (q31_t)0xC6F9FC8D,\n    (q31_t)0x8D7DC399, (q31_t)0xC6CD0079, (q31_t)0x8D9442B7, (q31_t)0xC6A00D36,\n    (q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8DC175E0, (q31_t)0xC6464144,\n    (q31_t)0x8DD829E4, (q31_t)0xC61968A2, (q31_t)0x8DEEEF82, (q31_t)0xC5EC98ED,\n    (q31_t)0x8E05C6B7, (q31_t)0xC5BFD22E, (q31_t)0x8E1CAF80, (q31_t)0xC593146A,\n    (q31_t)0x8E33A9D9, (q31_t)0xC5665FA8, (q31_t)0x8E4AB5BF, (q31_t)0xC539B3F0,\n    (q31_t)0x8E61D32D, (q31_t)0xC50D1148, (q31_t)0x8E790222, (q31_t)0xC4E077B8,\n    (q31_t)0x8E904298, (q31_t)0xC4B3E746, (q31_t)0x8EA7948C, (q31_t)0xC4875FF8,\n    (q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8ED66CE1, (q31_t)0xC42E6CE8,\n    (q31_t)0x8EEDF33B, (q31_t)0xC4020132, (q31_t)0x8F058B04, (q31_t)0xC3D59EBD,\n    (q31_t)0x8F1D343A, (q31_t)0xC3A9458F, (q31_t)0x8F34EED8, (q31_t)0xC37CF5B0,\n    (q31_t)0x8F4CBADB, (q31_t)0xC350AF25, (q31_t)0x8F64983F, (q31_t)0xC32471F6,\n    (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A, (q31_t)0x8F94871D, (q31_t)0xC2CC13C7,\n    (q31_t)0x8FAC988E, (q31_t)0xC29FF2D4, (q31_t)0x8FC4BB53, (q31_t)0xC273DB58,\n    (q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x8FF534C4, (q31_t)0xC21BC8E0,\n    (q31_t)0x900D8B69, (q31_t)0xC1EFCDF2, (q31_t)0x9025F352, (q31_t)0xC1C3DC96,\n    (q31_t)0x903E6C7A, (q31_t)0xC197F4D3, (q31_t)0x9056F6DF, (q31_t)0xC16C16B0,\n    (q31_t)0x906F927B, (q31_t)0xC1404233, (q31_t)0x90883F4C, (q31_t)0xC1147763,\n    (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648, (q31_t)0x90B9CC7C, (q31_t)0xC0BCFEE7,\n    (q31_t)0x90D2ACD3, (q31_t)0xC0915147, (q31_t)0x90EB9E50, (q31_t)0xC065AD70,\n    (q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x911DB4A8, (q31_t)0xC00E8335,\n    (q31_t)0x9136D97D, (q31_t)0xBFE2FCDF, (q31_t)0x91500F67, (q31_t)0xBFB7806C,\n    (q31_t)0x91695663, (q31_t)0xBF8C0DE2, (q31_t)0x9182AE6C, (q31_t)0xBF60A54A,\n    (q31_t)0x919C1780, (q31_t)0xBF3546A8, (q31_t)0x91B5919A, (q31_t)0xBF09F204,\n    (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765, (q31_t)0x91E8B8D0, (q31_t)0xBEB366D1,\n    (q31_t)0x920265E4, (q31_t)0xBE88304F, (q31_t)0x921C23EE, (q31_t)0xBE5D03E5,\n    (q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x924FD2D6, (q31_t)0xBE06C977,\n    (q31_t)0x9269C3AC, (q31_t)0xBDDBBB7F, (q31_t)0x9283C567, (q31_t)0xBDB0B7BA,\n    (q31_t)0x929DD805, (q31_t)0xBD85BE2F, (q31_t)0x92B7FB82, (q31_t)0xBD5ACEE5,\n    (q31_t)0x92D22FD8, (q31_t)0xBD2FE9E1, (q31_t)0x92EC7505, (q31_t)0xBD050F2C,\n    (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA, (q31_t)0x932131D1, (q31_t)0xBCAF78C3,\n    (q31_t)0x933BA968, (q31_t)0xBC84BD1E, (q31_t)0x935631C5, (q31_t)0xBC5A0BE1,\n    (q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x938B74C0, (q31_t)0xBC04C8BA,\n    (q31_t)0x93A62F56, (q31_t)0xBBDA36DC, (q31_t)0x93C0FAA2, (q31_t)0xBBAFAF81,\n    (q31_t)0x93DBD69F, (q31_t)0xBB8532AF, (q31_t)0x93F6C34A, (q31_t)0xBB5AC06C,\n    (q31_t)0x9411C09D, (q31_t)0xBB3058C0, (q31_t)0x942CCE95, (q31_t)0xBB05FBB0,\n    (q31_t)0x9447ED2F, (q31_t)0xBADBA943, (q31_t)0x94631C64, (q31_t)0xBAB1617F,\n    (q31_t)0x947E5C32, (q31_t)0xBA87246C, (q31_t)0x9499AC95, (q31_t)0xBA5CF210,\n    (q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x94D07F05, (q31_t)0xBA08AD94,\n    (q31_t)0x94EC010B, (q31_t)0xB9DE9B83, (q31_t)0x95079393, (q31_t)0xB9B49442,\n    (q31_t)0x9523369B, (q31_t)0xB98A97D8, (q31_t)0x953EEA1E, (q31_t)0xB960A64B,\n    (q31_t)0x955AAE17, (q31_t)0xB936BFA3, (q31_t)0x95768282, (q31_t)0xB90CE3E6,\n    (q31_t)0x9592675B, (q31_t)0xB8E31319, (q31_t)0x95AE5C9E, (q31_t)0xB8B94D44,\n    (q31_t)0x95CA6246, (q31_t)0xB88F926C, (q31_t)0x95E6784F, (q31_t)0xB865E299,\n    (q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x961ED573, (q31_t)0xB812A419,\n    (q31_t)0x963B1C85, (q31_t)0xB7E9157A, (q31_t)0x965773E7, (q31_t)0xB7BF91F8,\n    (q31_t)0x9673DB94, (q31_t)0xB796199B, (q31_t)0x96905387, (q31_t)0xB76CAC68,\n    (q31_t)0x96ACDBBD, (q31_t)0xB7434A67, (q31_t)0x96C97431, (q31_t)0xB719F39D,\n    (q31_t)0x96E61CDF, (q31_t)0xB6F0A811, (q31_t)0x9702D5C2, (q31_t)0xB6C767CA,\n    (q31_t)0x971F9ED6, (q31_t)0xB69E32CD, (q31_t)0x973C7816, (q31_t)0xB6750921,\n    (q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x97765B0A, (q31_t)0xB622D7D5,\n    (q31_t)0x979364B5, (q31_t)0xB5F9D042, (q31_t)0x97B07E7A, (q31_t)0xB5D0D41A,\n    (q31_t)0x97CDA855, (q31_t)0xB5A7E362, (q31_t)0x97EAE241, (q31_t)0xB57EFE21,\n    (q31_t)0x98082C3B, (q31_t)0xB556245E, (q31_t)0x9825863D, (q31_t)0xB52D561E,\n    (q31_t)0x9842F043, (q31_t)0xB5049368, (q31_t)0x98606A48, (q31_t)0xB4DBDC42,\n    (q31_t)0x987DF449, (q31_t)0xB4B330B2, (q31_t)0x989B8E3F, (q31_t)0xB48A90C0,\n    (q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x98D6F1FE, (q31_t)0xB43973C9,\n    (q31_t)0x98F4BBBC, (q31_t)0xB410F6D2, (q31_t)0x9912955E, (q31_t)0xB3E88591,\n    (q31_t)0x99307EE0, (q31_t)0xB3C0200C, (q31_t)0x994E783C, (q31_t)0xB397C649,\n    (q31_t)0x996C816F, (q31_t)0xB36F784E, (q31_t)0x998A9A73, (q31_t)0xB3473622,\n    (q31_t)0x99A8C344, (q31_t)0xB31EFFCB, (q31_t)0x99C6FBDE, (q31_t)0xB2F6D54F,\n    (q31_t)0x99E5443A, (q31_t)0xB2CEB6B5, (q31_t)0x9A039C56, (q31_t)0xB2A6A401,\n    (q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A407BB8, (q31_t)0xB256A26A,\n    (q31_t)0x9A5F02F5, (q31_t)0xB22EB392, (q31_t)0x9A7D99DD, (q31_t)0xB206D0BA,\n    (q31_t)0x9A9C406D, (q31_t)0xB1DEF9E8, (q31_t)0x9ABAF6A0, (q31_t)0xB1B72F23,\n    (q31_t)0x9AD9BC71, (q31_t)0xB18F7070, (q31_t)0x9AF891DB, (q31_t)0xB167BDD6,\n    (q31_t)0x9B1776D9, (q31_t)0xB140175B, (q31_t)0x9B366B67, (q31_t)0xB1187D05,\n    (q31_t)0x9B556F80, (q31_t)0xB0F0EEDA, (q31_t)0x9B748320, (q31_t)0xB0C96CDF,\n    (q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9BB2D8DD, (q31_t)0xB07A8D97,\n    (q31_t)0x9BD21AF2, (q31_t)0xB0533055, (q31_t)0x9BF16C7A, (q31_t)0xB02BDF5C,\n    (q31_t)0x9C10CD70, (q31_t)0xB0049AB2, (q31_t)0x9C303DCF, (q31_t)0xAFDD625F,\n    (q31_t)0x9C4FBD92, (q31_t)0xAFB63667, (q31_t)0x9C6F4CB5, (q31_t)0xAF8F16D0,\n    (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1, (q31_t)0x9CAE9907, (q31_t)0xAF40FCE0,\n    (q31_t)0x9CCE562B, (q31_t)0xAF1A0293, (q31_t)0x9CEE229C, (q31_t)0xAEF314BF,\n    (q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D2DE94D, (q31_t)0xAEA55E9D,\n    (q31_t)0x9D4DE384, (q31_t)0xAE7E965B, (q31_t)0x9D6DECF4, (q31_t)0xAE57DAAA,\n    (q31_t)0x9D8E0596, (q31_t)0xAE312B91, (q31_t)0x9DAE2D68, (q31_t)0xAE0A8916,\n    (q31_t)0x9DCE6462, (q31_t)0xADE3F33E, (q31_t)0x9DEEAA82, (q31_t)0xADBD6A10,\n    (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91, (q31_t)0x9E2F641A, (q31_t)0xAD707DC8,\n    (q31_t)0x9E4FD789, (q31_t)0xAD4A1ABA, (q31_t)0x9E705A09, (q31_t)0xAD23C46D,\n    (q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9EB18C26, (q31_t)0xACD73E30,\n    (q31_t)0x9ED23BB9, (q31_t)0xACB10E4A, (q31_t)0x9EF2FA48, (q31_t)0xAC8AEB3E,\n    (q31_t)0x9F13C7D0, (q31_t)0xAC64D510, (q31_t)0x9F34A449, (q31_t)0xAC3ECBC7,\n    (q31_t)0x9F558FB0, (q31_t)0xAC18CF68, (q31_t)0x9F7689FF, (q31_t)0xABF2DFFA,\n    (q31_t)0x9F979331, (q31_t)0xABCCFD82, (q31_t)0x9FB8AB41, (q31_t)0xABA72806,\n    (q31_t)0x9FD9D22A, (q31_t)0xAB815F8C, (q31_t)0x9FFB07E7, (q31_t)0xAB5BA41A,\n    (q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA03D9FC7, (q31_t)0xAB105464,\n    (q31_t)0xA05F01E1, (q31_t)0xAAEAC02B, (q31_t)0xA08072BA, (q31_t)0xAAC53912,\n    (q31_t)0xA0A1F24C, (q31_t)0xAA9FBF1D, (q31_t)0xA0C38094, (q31_t)0xAA7A5253,\n    (q31_t)0xA0E51D8C, (q31_t)0xAA54F2B9, (q31_t)0xA106C92E, (q31_t)0xAA2FA055,\n    (q31_t)0xA1288376, (q31_t)0xAA0A5B2D, (q31_t)0xA14A4C5E, (q31_t)0xA9E52347,\n    (q31_t)0xA16C23E1, (q31_t)0xA9BFF8A8, (q31_t)0xA18E09F9, (q31_t)0xA99ADB56,\n    (q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA1D201D7, (q31_t)0xA950C8AF,\n    (q31_t)0xA1F41391, (q31_t)0xA92BD366, (q31_t)0xA21633CD, (q31_t)0xA906EB81,\n    (q31_t)0xA2386283, (q31_t)0xA8E21106, (q31_t)0xA25A9FB1, (q31_t)0xA8BD43FA,\n    (q31_t)0xA27CEB4F, (q31_t)0xA8988463, (q31_t)0xA29F4559, (q31_t)0xA873D246,\n    (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9, (q31_t)0xA2E4249A, (q31_t)0xA82A9693,\n    (q31_t)0xA306A9C7, (q31_t)0xA8060D08, (q31_t)0xA3293D4B, (q31_t)0xA7E1910E,\n    (q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA36E8F40, (q31_t)0xA798C1E4,\n    (q31_t)0xA3914DA7, (q31_t)0xA7746EC0, (q31_t)0xA3B41A4F, (q31_t)0xA7502943,\n    (q31_t)0xA3D6F533, (q31_t)0xA72BF173, (q31_t)0xA3F9DE4D, (q31_t)0xA707C756,\n    (q31_t)0xA41CD598, (q31_t)0xA6E3AAF2, (q31_t)0xA43FDB0F, (q31_t)0xA6BF9C4B,\n    (q31_t)0xA462EEAC, (q31_t)0xA69B9B68, (q31_t)0xA4861069, (q31_t)0xA677A84E,\n    (q31_t)0xA4A94042, (q31_t)0xA653C302, (q31_t)0xA4CC7E31, (q31_t)0xA62FEB8B,\n    (q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA513243B, (q31_t)0xA5E8662F,\n    (q31_t)0xA5368C4B, (q31_t)0xA5C4B855, (q31_t)0xA55A025B, (q31_t)0xA5A11865,\n    (q31_t)0xA57D8666, (q31_t)0xA57D8666, (q31_t)0xA5A11865, (q31_t)0xA55A025B,\n    (q31_t)0xA5C4B855, (q31_t)0xA5368C4B, (q31_t)0xA5E8662F, (q31_t)0xA513243B,\n    (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31, (q31_t)0xA62FEB8B, (q31_t)0xA4CC7E31,\n    (q31_t)0xA653C302, (q31_t)0xA4A94042, (q31_t)0xA677A84E, (q31_t)0xA4861069,\n    (q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6BF9C4B, (q31_t)0xA43FDB0F,\n    (q31_t)0xA6E3AAF2, (q31_t)0xA41CD598, (q31_t)0xA707C756, (q31_t)0xA3F9DE4D,\n    (q31_t)0xA72BF173, (q31_t)0xA3D6F533, (q31_t)0xA7502943, (q31_t)0xA3B41A4F,\n    (q31_t)0xA7746EC0, (q31_t)0xA3914DA7, (q31_t)0xA798C1E4, (q31_t)0xA36E8F40,\n    (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20, (q31_t)0xA7E1910E, (q31_t)0xA3293D4B,\n    (q31_t)0xA8060D08, (q31_t)0xA306A9C7, (q31_t)0xA82A9693, (q31_t)0xA2E4249A,\n    (q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA873D246, (q31_t)0xA29F4559,\n    (q31_t)0xA8988463, (q31_t)0xA27CEB4F, (q31_t)0xA8BD43FA, (q31_t)0xA25A9FB1,\n    (q31_t)0xA8E21106, (q31_t)0xA2386283, (q31_t)0xA906EB81, (q31_t)0xA21633CD,\n    (q31_t)0xA92BD366, (q31_t)0xA1F41391, (q31_t)0xA950C8AF, (q31_t)0xA1D201D7,\n    (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2, (q31_t)0xA99ADB56, (q31_t)0xA18E09F9,\n    (q31_t)0xA9BFF8A8, (q31_t)0xA16C23E1, (q31_t)0xA9E52347, (q31_t)0xA14A4C5E,\n    (q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA2FA055, (q31_t)0xA106C92E,\n    (q31_t)0xAA54F2B9, (q31_t)0xA0E51D8C, (q31_t)0xAA7A5253, (q31_t)0xA0C38094,\n    (q31_t)0xAA9FBF1D, (q31_t)0xA0A1F24C, (q31_t)0xAAC53912, (q31_t)0xA08072BA,\n    (q31_t)0xAAEAC02B, (q31_t)0xA05F01E1, (q31_t)0xAB105464, (q31_t)0xA03D9FC7,\n    (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72, (q31_t)0xAB5BA41A, (q31_t)0x9FFB07E7,\n    (q31_t)0xAB815F8C, (q31_t)0x9FD9D22A, (q31_t)0xABA72806, (q31_t)0x9FB8AB41,\n    (q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xABF2DFFA, (q31_t)0x9F7689FF,\n    (q31_t)0xAC18CF68, (q31_t)0x9F558FB0, (q31_t)0xAC3ECBC7, (q31_t)0x9F34A449,\n    (q31_t)0xAC64D510, (q31_t)0x9F13C7D0, (q31_t)0xAC8AEB3E, (q31_t)0x9EF2FA48,\n    (q31_t)0xACB10E4A, (q31_t)0x9ED23BB9, (q31_t)0xACD73E30, (q31_t)0x9EB18C26,\n    (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94, (q31_t)0xAD23C46D, (q31_t)0x9E705A09,\n    (q31_t)0xAD4A1ABA, (q31_t)0x9E4FD789, (q31_t)0xAD707DC8, (q31_t)0x9E2F641A,\n    (q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADBD6A10, (q31_t)0x9DEEAA82,\n    (q31_t)0xADE3F33E, (q31_t)0x9DCE6462, (q31_t)0xAE0A8916, (q31_t)0x9DAE2D68,\n    (q31_t)0xAE312B91, (q31_t)0x9D8E0596, (q31_t)0xAE57DAAA, (q31_t)0x9D6DECF4,\n    (q31_t)0xAE7E965B, (q31_t)0x9D4DE384, (q31_t)0xAEA55E9D, (q31_t)0x9D2DE94D,\n    (q31_t)0xAECC336B, (q31_t)0x9D0DFE53, (q31_t)0xAEF314BF, (q31_t)0x9CEE229C,\n    (q31_t)0xAF1A0293, (q31_t)0x9CCE562B, (q31_t)0xAF40FCE0, (q31_t)0x9CAE9907,\n    (q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAF8F16D0, (q31_t)0x9C6F4CB5,\n    (q31_t)0xAFB63667, (q31_t)0x9C4FBD92, (q31_t)0xAFDD625F, (q31_t)0x9C303DCF,\n    (q31_t)0xB0049AB2, (q31_t)0x9C10CD70, (q31_t)0xB02BDF5C, (q31_t)0x9BF16C7A,\n    (q31_t)0xB0533055, (q31_t)0x9BD21AF2, (q31_t)0xB07A8D97, (q31_t)0x9BB2D8DD,\n    (q31_t)0xB0A1F71C, (q31_t)0x9B93A640, (q31_t)0xB0C96CDF, (q31_t)0x9B748320,\n    (q31_t)0xB0F0EEDA, (q31_t)0x9B556F80, (q31_t)0xB1187D05, (q31_t)0x9B366B67,\n    (q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB167BDD6, (q31_t)0x9AF891DB,\n    (q31_t)0xB18F7070, (q31_t)0x9AD9BC71, (q31_t)0xB1B72F23, (q31_t)0x9ABAF6A0,\n    (q31_t)0xB1DEF9E8, (q31_t)0x9A9C406D, (q31_t)0xB206D0BA, (q31_t)0x9A7D99DD,\n    (q31_t)0xB22EB392, (q31_t)0x9A5F02F5, (q31_t)0xB256A26A, (q31_t)0x9A407BB8,\n    (q31_t)0xB27E9D3B, (q31_t)0x9A22042C, (q31_t)0xB2A6A401, (q31_t)0x9A039C56,\n    (q31_t)0xB2CEB6B5, (q31_t)0x99E5443A, (q31_t)0xB2F6D54F, (q31_t)0x99C6FBDE,\n    (q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB3473622, (q31_t)0x998A9A73,\n    (q31_t)0xB36F784E, (q31_t)0x996C816F, (q31_t)0xB397C649, (q31_t)0x994E783C,\n    (q31_t)0xB3C0200C, (q31_t)0x99307EE0, (q31_t)0xB3E88591, (q31_t)0x9912955E,\n    (q31_t)0xB410F6D2, (q31_t)0x98F4BBBC, (q31_t)0xB43973C9, (q31_t)0x98D6F1FE,\n    (q31_t)0xB461FC70, (q31_t)0x98B93828, (q31_t)0xB48A90C0, (q31_t)0x989B8E3F,\n    (q31_t)0xB4B330B2, (q31_t)0x987DF449, (q31_t)0xB4DBDC42, (q31_t)0x98606A48,\n    (q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB52D561E, (q31_t)0x9825863D,\n    (q31_t)0xB556245E, (q31_t)0x98082C3B, (q31_t)0xB57EFE21, (q31_t)0x97EAE241,\n    (q31_t)0xB5A7E362, (q31_t)0x97CDA855, (q31_t)0xB5D0D41A, (q31_t)0x97B07E7A,\n    (q31_t)0xB5F9D042, (q31_t)0x979364B5, (q31_t)0xB622D7D5, (q31_t)0x97765B0A,\n    (q31_t)0xB64BEACC, (q31_t)0x9759617E, (q31_t)0xB6750921, (q31_t)0x973C7816,\n    (q31_t)0xB69E32CD, (q31_t)0x971F9ED6, (q31_t)0xB6C767CA, (q31_t)0x9702D5C2,\n    (q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB719F39D, (q31_t)0x96C97431,\n    (q31_t)0xB7434A67, (q31_t)0x96ACDBBD, (q31_t)0xB76CAC68, (q31_t)0x96905387,\n    (q31_t)0xB796199B, (q31_t)0x9673DB94, (q31_t)0xB7BF91F8, (q31_t)0x965773E7,\n    (q31_t)0xB7E9157A, (q31_t)0x963B1C85, (q31_t)0xB812A419, (q31_t)0x961ED573,\n    (q31_t)0xB83C3DD1, (q31_t)0x96029EB5, (q31_t)0xB865E299, (q31_t)0x95E6784F,\n    (q31_t)0xB88F926C, (q31_t)0x95CA6246, (q31_t)0xB8B94D44, (q31_t)0x95AE5C9E,\n    (q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB90CE3E6, (q31_t)0x95768282,\n    (q31_t)0xB936BFA3, (q31_t)0x955AAE17, (q31_t)0xB960A64B, (q31_t)0x953EEA1E,\n    (q31_t)0xB98A97D8, (q31_t)0x9523369B, (q31_t)0xB9B49442, (q31_t)0x95079393,\n    (q31_t)0xB9DE9B83, (q31_t)0x94EC010B, (q31_t)0xBA08AD94, (q31_t)0x94D07F05,\n    (q31_t)0xBA32CA70, (q31_t)0x94B50D87, (q31_t)0xBA5CF210, (q31_t)0x9499AC95,\n    (q31_t)0xBA87246C, (q31_t)0x947E5C32, (q31_t)0xBAB1617F, (q31_t)0x94631C64,\n    (q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB05FBB0, (q31_t)0x942CCE95,\n    (q31_t)0xBB3058C0, (q31_t)0x9411C09D, (q31_t)0xBB5AC06C, (q31_t)0x93F6C34A,\n    (q31_t)0xBB8532AF, (q31_t)0x93DBD69F, (q31_t)0xBBAFAF81, (q31_t)0x93C0FAA2,\n    (q31_t)0xBBDA36DC, (q31_t)0x93A62F56, (q31_t)0xBC04C8BA, (q31_t)0x938B74C0,\n    (q31_t)0xBC2F6513, (q31_t)0x9370CAE4, (q31_t)0xBC5A0BE1, (q31_t)0x935631C5,\n    (q31_t)0xBC84BD1E, (q31_t)0x933BA968, (q31_t)0xBCAF78C3, (q31_t)0x932131D1,\n    (q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD050F2C, (q31_t)0x92EC7505,\n    (q31_t)0xBD2FE9E1, (q31_t)0x92D22FD8, (q31_t)0xBD5ACEE5, (q31_t)0x92B7FB82,\n    (q31_t)0xBD85BE2F, (q31_t)0x929DD805, (q31_t)0xBDB0B7BA, (q31_t)0x9283C567,\n    (q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC, (q31_t)0xBE06C977, (q31_t)0x924FD2D6,\n    (q31_t)0xBE31E19B, (q31_t)0x9235F2EB, (q31_t)0xBE5D03E5, (q31_t)0x921C23EE,\n    (q31_t)0xBE88304F, (q31_t)0x920265E4, (q31_t)0xBEB366D1, (q31_t)0x91E8B8D0,\n    (q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF09F204, (q31_t)0x91B5919A,\n    (q31_t)0xBF3546A8, (q31_t)0x919C1780, (q31_t)0xBF60A54A, (q31_t)0x9182AE6C,\n    (q31_t)0xBF8C0DE2, (q31_t)0x91695663, (q31_t)0xBFB7806C, (q31_t)0x91500F67,\n    (q31_t)0xBFE2FCDF, (q31_t)0x9136D97D, (q31_t)0xC00E8335, (q31_t)0x911DB4A8,\n    (q31_t)0xC03A1368, (q31_t)0x9104A0ED, (q31_t)0xC065AD70, (q31_t)0x90EB9E50,\n    (q31_t)0xC0915147, (q31_t)0x90D2ACD3, (q31_t)0xC0BCFEE7, (q31_t)0x90B9CC7C,\n    (q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1147763, (q31_t)0x90883F4C,\n    (q31_t)0xC1404233, (q31_t)0x906F927B, (q31_t)0xC16C16B0, (q31_t)0x9056F6DF,\n    (q31_t)0xC197F4D3, (q31_t)0x903E6C7A, (q31_t)0xC1C3DC96, (q31_t)0x9025F352,\n    (q31_t)0xC1EFCDF2, (q31_t)0x900D8B69, (q31_t)0xC21BC8E0, (q31_t)0x8FF534C4,\n    (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66, (q31_t)0xC273DB58, (q31_t)0x8FC4BB53,\n    (q31_t)0xC29FF2D4, (q31_t)0x8FAC988E, (q31_t)0xC2CC13C7, (q31_t)0x8F94871D,\n    (q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC32471F6, (q31_t)0x8F64983F,\n    (q31_t)0xC350AF25, (q31_t)0x8F4CBADB, (q31_t)0xC37CF5B0, (q31_t)0x8F34EED8,\n    (q31_t)0xC3A9458F, (q31_t)0x8F1D343A, (q31_t)0xC3D59EBD, (q31_t)0x8F058B04,\n    (q31_t)0xC4020132, (q31_t)0x8EEDF33B, (q31_t)0xC42E6CE8, (q31_t)0x8ED66CE1,\n    (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB, (q31_t)0xC4875FF8, (q31_t)0x8EA7948C,\n    (q31_t)0xC4B3E746, (q31_t)0x8E904298, (q31_t)0xC4E077B8, (q31_t)0x8E790222,\n    (q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC539B3F0, (q31_t)0x8E4AB5BF,\n    (q31_t)0xC5665FA8, (q31_t)0x8E33A9D9, (q31_t)0xC593146A, (q31_t)0x8E1CAF80,\n    (q31_t)0xC5BFD22E, (q31_t)0x8E05C6B7, (q31_t)0xC5EC98ED, (q31_t)0x8DEEEF82,\n    (q31_t)0xC61968A2, (q31_t)0x8DD829E4, (q31_t)0xC6464144, (q31_t)0x8DC175E0,\n    (q31_t)0xC67322CD, (q31_t)0x8DAAD37B, (q31_t)0xC6A00D36, (q31_t)0x8D9442B7,\n    (q31_t)0xC6CD0079, (q31_t)0x8D7DC399, (q31_t)0xC6F9FC8D, (q31_t)0x8D675623,\n    (q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7540F10, (q31_t)0x8D3AB03F,\n    (q31_t)0xC7812571, (q31_t)0x8D2477D8, (q31_t)0xC7AE4489, (q31_t)0x8D0E5127,\n    (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30, (q31_t)0xC8089CBF, (q31_t)0x8CE238F6,\n    (q31_t)0xC835D5D0, (q31_t)0x8CCC477D, (q31_t)0xC863177B, (q31_t)0x8CB667C7,\n    (q31_t)0xC89061BA, (q31_t)0x8CA099D9, (q31_t)0xC8BDB485, (q31_t)0x8C8ADDB6,\n    (q31_t)0xC8EB0FD6, (q31_t)0x8C753361, (q31_t)0xC91873A5, (q31_t)0x8C5F9ADD,\n    (q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC97354A3, (q31_t)0x8C349F58,\n    (q31_t)0xC9A0D1C4, (q31_t)0x8C1F3C5C, (q31_t)0xC9CE5748, (q31_t)0x8C09EB40,\n    (q31_t)0xC9FBE527, (q31_t)0x8BF4AC05, (q31_t)0xCA297B5A, (q31_t)0x8BDF7EAF,\n    (q31_t)0xCA5719DB, (q31_t)0x8BCA6342, (q31_t)0xCA84C0A2, (q31_t)0x8BB559C1,\n    (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F, (q31_t)0xCAE026E8, (q31_t)0x8B8B7C8F,\n    (q31_t)0xCB0DE658, (q31_t)0x8B76A8E4, (q31_t)0xCB3BADF2, (q31_t)0x8B61E732,\n    (q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCB975589, (q31_t)0x8B3899C5,\n    (q31_t)0xCBC53578, (q31_t)0x8B240E10, (q31_t)0xCBF31D75, (q31_t)0x8B0F9461,\n    (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA, (q31_t)0xCC4F057B, (q31_t)0x8AE6D71F,\n    (q31_t)0xCC7D0577, (q31_t)0x8AD29393, (q31_t)0xCCAB0D65, (q31_t)0x8ABE6219,\n    (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4, (q31_t)0xCD0734F8, (q31_t)0x8A963567,\n    (q31_t)0xCD355490, (q31_t)0x8A823A35, (q31_t)0xCD637BFD, (q31_t)0x8A6E5122,\n    (q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDBFE23A, (q31_t)0x8A46B563,\n    (q31_t)0xCDEE20FC, (q31_t)0x8A3302BD, (q31_t)0xCE1C6776, (q31_t)0x8A1F6242,\n    (q31_t)0xCE4AB5A2, (q31_t)0x8A0BD3F5, (q31_t)0xCE790B78, (q31_t)0x89F857D8,\n    (q31_t)0xCEA768F2, (q31_t)0x89E4EDEE, (q31_t)0xCED5CE08, (q31_t)0x89D1963C,\n    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3, (q31_t)0xCF32AEEB, (q31_t)0x89AB1D86,\n    (q31_t)0xCF612AAA, (q31_t)0x8997FC89, (q31_t)0xCF8FADE8, (q31_t)0x8984EDCF,\n    (q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xCFECCAC7, (q31_t)0x895F072D,\n    (q31_t)0xD01B6459, (q31_t)0x894C2F4C, (q31_t)0xD04A054D, (q31_t)0x893969B9,\n    (q31_t)0xD078AD9D, (q31_t)0x8926B677, (q31_t)0xD0A75D42, (q31_t)0x89141589,\n    (q31_t)0xD0D61433, (q31_t)0x890186F1, (q31_t)0xD104D26B, (q31_t)0x88EF0AB4,\n    (q31_t)0xD13397E1, (q31_t)0x88DCA0D3, (q31_t)0xD162648F, (q31_t)0x88CA4951,\n    (q31_t)0xD191386D, (q31_t)0x88B80431, (q31_t)0xD1C01374, (q31_t)0x88A5D177,\n    (q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD21DDEE1, (q31_t)0x8881A33C,\n    (q31_t)0xD24CCF38, (q31_t)0x886FA7C2, (q31_t)0xD27BC69C, (q31_t)0x885DBEB7,\n    (q31_t)0xD2AAC504, (q31_t)0x884BE820, (q31_t)0xD2D9CA6A, (q31_t)0x883A23FE,\n    (q31_t)0xD308D6C6, (q31_t)0x88287255, (q31_t)0xD337EA12, (q31_t)0x8816D327,\n    (q31_t)0xD3670445, (q31_t)0x88054677, (q31_t)0xD3962559, (q31_t)0x87F3CC47,\n    (q31_t)0xD3C54D46, (q31_t)0x87E2649B, (q31_t)0xD3F47C06, (q31_t)0x87D10F75,\n    (q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD452EDDE, (q31_t)0x87AE9CC5,\n    (q31_t)0xD48230E8, (q31_t)0x879D7F40, (q31_t)0xD4B17AA7, (q31_t)0x878C744C,\n    (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC, (q31_t)0xD5102227, (q31_t)0x876A9621,\n    (q31_t)0xD53F7FDA, (q31_t)0x8759C2EF, (q31_t)0xD56EE424, (q31_t)0x87490257,\n    (q31_t)0xD59E4EFE, (q31_t)0x8738545E, (q31_t)0xD5CDC062, (q31_t)0x8727B904,\n    (q31_t)0xD5FD3847, (q31_t)0x8717304E, (q31_t)0xD62CB6A7, (q31_t)0x8706BA3C,\n    (q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD68BC6BA, (q31_t)0x86E60614,\n    (q31_t)0xD6BB585D, (q31_t)0x86D5C802, (q31_t)0xD6EAF05E, (q31_t)0x86C59C9F,\n    (q31_t)0xD71A8EB5, (q31_t)0x86B583EE, (q31_t)0xD74A335A, (q31_t)0x86A57DF1,\n    (q31_t)0xD779DE46, (q31_t)0x86958AAB, (q31_t)0xD7A98F73, (q31_t)0x8685AA1F,\n    (q31_t)0xD7D946D7, (q31_t)0x8675DC4E, (q31_t)0xD809046D, (q31_t)0x8666213C,\n    (q31_t)0xD838C82D, (q31_t)0x865678EA, (q31_t)0xD868920F, (q31_t)0x8646E35B,\n    (q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8C8381C, (q31_t)0x8627F090,\n    (q31_t)0xD8F81439, (q31_t)0x86189359, (q31_t)0xD927F65B, (q31_t)0x860948EE,\n    (q31_t)0xD957DE7A, (q31_t)0x85FA1152, (q31_t)0xD987CC8F, (q31_t)0x85EAEC88,\n    (q31_t)0xD9B7C093, (q31_t)0x85DBDA91, (q31_t)0xD9E7BA7E, (q31_t)0x85CCDB70,\n    (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27, (q31_t)0xDA47BFED, (q31_t)0x85AF15B9,\n    (q31_t)0xDA77CB62, (q31_t)0x85A04F28, (q31_t)0xDAA7DCA1, (q31_t)0x85919B75,\n    (q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB08105E, (q31_t)0x85746CB7,\n    (q31_t)0xDB3832CD, (q31_t)0x8565F1B0, (q31_t)0xDB685AE8, (q31_t)0x85578991,\n    (q31_t)0xDB9888A8, (q31_t)0x8549345C, (q31_t)0xDBC8BC05, (q31_t)0x853AF214,\n    (q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA, (q31_t)0xDC293379, (q31_t)0x851EA652,\n    (q31_t)0xDC597781, (q31_t)0x85109CDC, (q31_t)0xDC89C108, (q31_t)0x8502A65C,\n    (q31_t)0xDCBA1008, (q31_t)0x84F4C2D3, (q31_t)0xDCEA6478, (q31_t)0x84E6F244,\n    (q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD4B1D8B, (q31_t)0x84CB8A1B,\n    (q31_t)0xDD7B8220, (q31_t)0x84BDF285, (q31_t)0xDDABEC07, (q31_t)0x84B06DF1,\n    (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62, (q31_t)0xDE0CCFB1, (q31_t)0x84959DD9,\n    (q31_t)0xDE3D4963, (q31_t)0x84885257, (q31_t)0xDE6DC84B, (q31_t)0x847B19E1,\n    (q31_t)0xDE9E4C60, (q31_t)0x846DF476, (q31_t)0xDECED59B, (q31_t)0x8460E21A,\n    (q31_t)0xDEFF63F4, (q31_t)0x8453E2CE, (q31_t)0xDF2FF764, (q31_t)0x8446F695,\n    (q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDF912D6A, (q31_t)0x842D5761,\n    (q31_t)0xDFC1CFF2, (q31_t)0x8420A46B, (q31_t)0xDFF27773, (q31_t)0x8414048F,\n    (q31_t)0xE02323E5, (q31_t)0x840777CF, (q31_t)0xE053D541, (q31_t)0x83FAFE2E,\n    (q31_t)0xE0848B7F, (q31_t)0x83EE97AC, (q31_t)0xE0B54698, (q31_t)0x83E2444D,\n    (q31_t)0xE0E60684, (q31_t)0x83D60411, (q31_t)0xE116CB3D, (q31_t)0x83C9D6FB,\n    (q31_t)0xE14794B9, (q31_t)0x83BDBD0D, (q31_t)0xE17862F3, (q31_t)0x83B1B649,\n    (q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE1DA0D7E, (q31_t)0x8399E244,\n    (q31_t)0xE20AE9C1, (q31_t)0x838E1507, (q31_t)0xE23BCAA2, (q31_t)0x83825AFB,\n    (q31_t)0xE26CB01A, (q31_t)0x8376B422, (q31_t)0xE29D9A22, (q31_t)0x836B207D,\n    (q31_t)0xE2CE88B2, (q31_t)0x835FA00E, (q31_t)0xE2FF7BC3, (q31_t)0x835432D8,\n    (q31_t)0xE330734C, (q31_t)0x8348D8DB, (q31_t)0xE3616F47, (q31_t)0x833D921A,\n    (q31_t)0xE3926FAC, (q31_t)0x83325E97, (q31_t)0xE3C37473, (q31_t)0x83273E52,\n    (q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4258B0A, (q31_t)0x8311378C,\n    (q31_t)0xE4569CCB, (q31_t)0x8306510F, (q31_t)0xE487B2CF, (q31_t)0x82FB7DD8,\n    (q31_t)0xE4B8CD10, (q31_t)0x82F0BDE8, (q31_t)0xE4E9EB86, (q31_t)0x82E61141,\n    (q31_t)0xE51B0E2A, (q31_t)0x82DB77E5, (q31_t)0xE54C34F3, (q31_t)0x82D0F1D5,\n    (q31_t)0xE57D5FDA, (q31_t)0x82C67F13, (q31_t)0xE5AE8ED8, (q31_t)0x82BC1FA1,\n    (q31_t)0xE5DFC1E4, (q31_t)0x82B1D381, (q31_t)0xE610F8F9, (q31_t)0x82A79AB3,\n    (q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6737319, (q31_t)0x82936316,\n    (q31_t)0xE6A4B616, (q31_t)0x8289644A, (q31_t)0xE6D5FCFC, (q31_t)0x827F78D8,\n    (q31_t)0xE70747C3, (q31_t)0x8275A0C0, (q31_t)0xE7389664, (q31_t)0x826BDC04,\n    (q31_t)0xE769E8D8, (q31_t)0x82622AA5, (q31_t)0xE79B3F16, (q31_t)0x82588CA6,\n    (q31_t)0xE7CC9917, (q31_t)0x824F0208, (q31_t)0xE7FDF6D3, (q31_t)0x82458ACB,\n    (q31_t)0xE82F5844, (q31_t)0x823C26F2, (q31_t)0xE860BD60, (q31_t)0x8232D67E,\n    (q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8C3927F, (q31_t)0x82206FCB,\n    (q31_t)0xE8F50273, (q31_t)0x8217598F, (q31_t)0xE92675F4, (q31_t)0x820E56BE,\n    (q31_t)0xE957ECFB, (q31_t)0x82056758, (q31_t)0xE9896780, (q31_t)0x81FC8B60,\n    (q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7, (q31_t)0xE9EC66E8, (q31_t)0x81EB0DBD,\n    (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16, (q31_t)0xEA4F73EE, (q31_t)0x81D9DDE1,\n    (q31_t)0xEA80FF79, (q31_t)0x81D16320, (q31_t)0xEAB28E55, (q31_t)0x81C8FBD5,\n    (q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB15B5E0, (q31_t)0x81B867A4,\n    (q31_t)0xEB474E80, (q31_t)0x81B03AC1, (q31_t)0xEB78EA52, (q31_t)0x81A82159,\n    (q31_t)0xEBAA894E, (q31_t)0x81A01B6C, (q31_t)0xEBDC2B6D, (q31_t)0x819828FD,\n    (q31_t)0xEC0DD0A8, (q31_t)0x81904A0C, (q31_t)0xEC3F78F5, (q31_t)0x81887E9A,\n    (q31_t)0xEC71244F, (q31_t)0x8180C6A9, (q31_t)0xECA2D2AC, (q31_t)0x8179223A,\n    (q31_t)0xECD48406, (q31_t)0x8171914E, (q31_t)0xED063855, (q31_t)0x816A13E6,\n    (q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED69A9B2, (q31_t)0x815B53A8,\n    (q31_t)0xED9B66B2, (q31_t)0x815410D3, (q31_t)0xEDCD2687, (q31_t)0x814CE188,\n    (q31_t)0xEDFEE92B, (q31_t)0x8145C5C6, (q31_t)0xEE30AE95, (q31_t)0x813EBD90,\n    (q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEE9441A0, (q31_t)0x8130E7C8,\n    (q31_t)0xEEC60F31, (q31_t)0x812A1A39, (q31_t)0xEEF7DF6A, (q31_t)0x81236039,\n    (q31_t)0xEF29B243, (q31_t)0x811CB9CA, (q31_t)0xEF5B87B5, (q31_t)0x811626EC,\n    (q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFBF3A44, (q31_t)0x81093BE8,\n    (q31_t)0xEFF11752, (q31_t)0x8102E3C3, (q31_t)0xF022F6DA, (q31_t)0x80FC9F35,\n    (q31_t)0xF054D8D4, (q31_t)0x80F66E3C, (q31_t)0xF086BD39, (q31_t)0x80F050DB,\n    (q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF0EA8D23, (q31_t)0x80E450E2,\n    (q31_t)0xF11C789A, (q31_t)0x80DE6E4C, (q31_t)0xF14E665C, (q31_t)0x80D89F51,\n    (q31_t)0xF1805662, (q31_t)0x80D2E3F1, (q31_t)0xF1B248A5, (q31_t)0x80CD3C2F,\n    (q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF21633C0, (q31_t)0x80C22783,\n    (q31_t)0xF2482C89, (q31_t)0x80BCBA9C, (q31_t)0xF27A2770, (q31_t)0x80B76155,\n    (q31_t)0xF2AC246D, (q31_t)0x80B21BAF, (q31_t)0xF2DE2378, (q31_t)0x80ACE9AB,\n    (q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF342279A, (q31_t)0x80A2C08B,\n    (q31_t)0xF3742CA1, (q31_t)0x809DC970, (q31_t)0xF3A63398, (q31_t)0x8098E5FB,\n    (q31_t)0xF3D83C76, (q31_t)0x8094162B, (q31_t)0xF40A4734, (q31_t)0x808F5A02,\n    (q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF46E6231, (q31_t)0x80861CA5,\n    (q31_t)0xF4A07260, (q31_t)0x80819B74, (q31_t)0xF4D28451, (q31_t)0x807D2DEB,\n    (q31_t)0xF50497FA, (q31_t)0x8078D40D, (q31_t)0xF536AD55, (q31_t)0x80748DD9,\n    (q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF59ADD01, (q31_t)0x806C3C73,\n    (q31_t)0xF5CCF743, (q31_t)0x80683143, (q31_t)0xF5FF1317, (q31_t)0x806439C0,\n    (q31_t)0xF6313076, (q31_t)0x806055EA, (q31_t)0xF6634F58, (q31_t)0x805C85C3,\n    (q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6C79188, (q31_t)0x80552083,\n    (q31_t)0xF6F9B4C5, (q31_t)0x80518B6B, (q31_t)0xF72BD967, (q31_t)0x804E0A03,\n    (q31_t)0xF75DFF65, (q31_t)0x804A9C4D, (q31_t)0xF79026B8, (q31_t)0x80474248,\n    (q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF7F4793E, (q31_t)0x8040C956,\n    (q31_t)0xF826A461, (q31_t)0x803DAA69, (q31_t)0xF858D0BA, (q31_t)0x803A9F31,\n    (q31_t)0xF88AFE41, (q31_t)0x8037A7AC, (q31_t)0xF8BD2CEF, (q31_t)0x8034C3DC,\n    (q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9218D9E, (q31_t)0x802F375C,\n    (q31_t)0xF953BF90, (q31_t)0x802C8EAD, (q31_t)0xF985F28A, (q31_t)0x8029F9B4,\n    (q31_t)0xF9B82683, (q31_t)0x80277872, (q31_t)0xF9EA5B75, (q31_t)0x80250AE7,\n    (q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA4EC820, (q31_t)0x80206AF8,\n    (q31_t)0xFA80FFCB, (q31_t)0x801E3894, (q31_t)0xFAB3384F, (q31_t)0x801C19E9,\n    (q31_t)0xFAE571A4, (q31_t)0x801A0EF7, (q31_t)0xFB17ABC2, (q31_t)0x801817BF,\n    (q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFB7C223C, (q31_t)0x8014647A,\n    (q31_t)0xFBAE5E89, (q31_t)0x8012A86F, (q31_t)0xFBE09B80, (q31_t)0x8011001E,\n    (q31_t)0xFC12D919, (q31_t)0x800F6B88, (q31_t)0xFC45174E, (q31_t)0x800DEAAC,\n    (q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCA99569, (q31_t)0x800B2427,\n    (q31_t)0xFCDBD541, (q31_t)0x8009DE7D, (q31_t)0xFD0E1594, (q31_t)0x8008AC90,\n    (q31_t)0xFD40565B, (q31_t)0x80078E5E, (q31_t)0xFD72978F, (q31_t)0x800683E8,\n    (q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFDD71B1E, (q31_t)0x8004AA31,\n    (q31_t)0xFE095D69, (q31_t)0x8003DAF0, (q31_t)0xFE3BA001, (q31_t)0x80031F6C,\n    (q31_t)0xFE6DE2E0, (q31_t)0x800277A5, (q31_t)0xFEA025FC, (q31_t)0x8001E39B,\n    (q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF04ACD0, (q31_t)0x8000F6BD,\n    (q31_t)0xFF36F078, (q31_t)0x80009DE9, (q31_t)0xFF69343E, (q31_t)0x800058D3,\n    (q31_t)0xFF9B781D, (q31_t)0x8000277A, (q31_t)0xFFCDBC0A, (q31_t)0x800009DE};\n\n/**\n  @brief  q15 Twiddle factors Table\n*/\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
fori = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 16, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n */\nconst q15_t twiddleCoef_16_q15[24] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x5A82,\n    (q15_t)0x5A82, (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x0000, (q15_t)0x7FFF,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0x89BE,\n    (q15_t)0x30FB, (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x89BE, (q15_t)0xCF04,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xCF04, (q15_t)0x89BE};\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 32, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n */\nconst q15_t twiddleCoef_32_q15[48] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7641,\n    (q15_t)0x30FB, (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x5A82, (q15_t)0x5A82,\n    (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x18F8,\n    (q15_t)0x7D8A, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xE707, (q15_t)0x7D8A,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xA57D,\n    (q15_t)0x5A82, (q15_t)0x9592, (q15_t)0x471C, (q15_t)0x89BE, (q15_t)0x30FB,\n    (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8275,\n    (q15_t)0xE707, (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x9592, (q15_t)0xB8E3,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xCF04,\n    (q15_t)0x89BE, (q15_t)0xE707, (q15_t)0x8275};\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 64, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n */\nconst q15_t twiddleCoef_64_q15[96] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7D8A,\n    (q15_t)0x18F8, (q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7641, (q15_t)0x30FB,\n    (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x62F2,\n    (q15_t)0x5133, (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5133, (q15_t)0x62F2,\n    (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x30FB,\n    (q15_t)0x7641, (q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x18F8, (q15_t)0x7D8A,\n    (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF374,\n    (q15_t)0x7F62, (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xDAD7, (q15_t)0x7A7D,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xB8E3,\n    (q15_t)0x6A6D, (q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xA57D, (q15_t)0x5A82,\n    (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9592, (q15_t)0x471C, (q15_t)0x8F1D,\n    (q15_t)0x3C56, (q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8582, (q15_t)0x2528,\n    (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8000,\n    (q15_t)0x0000, (q15_t)0x809D, (q15_t)0xF374, (q15_t)0x8275, (q15_t)0xE707,\n    (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8F1D,\n    (q15_t)0xC3A9, (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9D0D, (q15_t)0xAECC,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB8E3,\n    (q15_t)0x9592, (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xCF04, (q15_t)0x89BE,\n    (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xF374,\n    (q15_t)0x809D};\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 128, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n */\nconst q15_t twiddleCoef_128_q15[192] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7F62,\n    (q15_t)0x0C8B, (q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7D8A, (q15_t)0x18F8,\n    (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7884,\n    (q15_t)0x2B1F, (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x73B5, (q15_t)0x36BA,\n    (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6A6D,\n    (q15_t)0x471C, (q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x62F2, (q15_t)0x5133,\n    (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x55F5,\n    (q15_t)0x5ED7, (q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4C3F, (q15_t)0x66CF,\n    (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x3C56,\n    (q15_t)0x70E2, (q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x30FB, (q15_t)0x7641,\n    (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x1F19,\n    (q15_t)0x7C29, (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x12C8, (q15_t)0x7E9D,\n    (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x0000,\n    (q15_t)0x7FFF, (q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF374, (q15_t)0x7F62,\n    (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE0E6,\n    (q15_t)0x7C29, (q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD4E0, (q15_t)0x7884,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC3A9,\n    (q15_t)0x70E2, (q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xB8E3, (q15_t)0x6A6D,\n    (q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAA0A,\n    (q15_t)0x5ED7, (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA128, (q15_t)0x55F5,\n    (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9592,\n    (q15_t)0x471C, (q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x8F1D, (q15_t)0x3C56,\n    (q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x877B,\n    (q15_t)0x2B1F, (q15_t)0x8582, (q15_t)0x2528, (q15_t)0x83D6, (q15_t)0x1F19,\n    (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x809D,\n    (q15_t)0x0C8B, (q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8000, (q15_t)0x0000,\n    (q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x809D, (q15_t)0xF374, (q15_t)0x8162,\n    (q15_t)0xED37, (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x83D6, (q15_t)0xE0E6,\n    (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x89BE,\n    (q15_t)0xCF04, (q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8F1D, (q15_t)0xC3A9,\n    (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9930,\n    (q15_t)0xB3C0, (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0xA128, (q15_t)0xAA0A,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAECC,\n    (q15_t)0x9D0D, (q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB8E3, (q15_t)0x9592,\n    (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC945,\n    (q15_t)0x8C4A, (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD4E0, (q15_t)0x877B,\n    (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE707,\n    (q15_t)0x8275, (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xF374, (q15_t)0x809D,\n    (q15_t)0xF9B8, (q15_t)0x8027};\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 256, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n */\nconst q15_t twiddleCoef_256_q15[384] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FD8,\n    (q15_t)0x0647, (q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F62, (q15_t)0x0C8B,\n    (q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E1D,\n    (q15_t)0x15E2, (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7CE3, (q15_t)0x1C0B,\n    (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7A7D,\n    (q15_t)0x2528, (q15_t)0x798A, (q15_t)0x2826, (q15_t)0x7884, (q15_t)0x2B1F,\n    (q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x7504,\n    (q15_t)0x33DE, (q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7255, (q15_t)0x398C,\n    (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6DCA,\n    (q15_t)0x41CE, (q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6A6D, (q15_t)0x471C,\n    (q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x64E8,\n    (q15_t)0x4EBF, (q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x60EC, (q15_t)0x539B,\n    (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5A82,\n    (q15_t)0x5A82, (q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x55F5, (q15_t)0x5ED7,\n    (q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4EBF,\n    (q15_t)0x64E8, (q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x49B4, (q15_t)0x68A6,\n    (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x41CE,\n    (q15_t)0x6DCA, (q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3C56, (q15_t)0x70E2,\n    (q15_t)0x398C, (q15_t)0x7255, (q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x33DE,\n    (q15_t)0x7504, (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2E11, (q15_t)0x776C,\n    (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2826, (q15_t)0x798A, (q15_t)0x2528,\n    (q15_t)0x7A7D, (q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x1F19, (q15_t)0x7C29,\n    (q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x15E2,\n    (q15_t)0x7E1D, (q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x0FAB, (q15_t)0x7F09,\n    (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0647,\n    (q15_t)0x7FD8, (q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x0000, (q15_t)0x7FFF,\n    (q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF695,\n    (q15_t)0x7FA7, (q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF054, (q15_t)0x7F09,\n    (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE707,\n    (q15_t)0x7D8A, (q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE0E6, (q15_t)0x7C29,\n    (q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD7D9,\n    (q15_t)0x798A, (q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD1EE, (q15_t)0x776C,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xC945,\n    (q15_t)0x73B5, (q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC3A9, (q15_t)0x70E2,\n    (q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBB85,\n    (q15_t)0x6C24, (q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB64B, (q15_t)0x68A6,\n    (q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xAECC,\n    (q15_t)0x62F2, (q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAA0A, (q15_t)0x5ED7,\n    (q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA34B,\n    (q15_t)0x5842, (q15_t)0xA128, (q15_t)0x55F5, (q15_t)0x9F13, (q15_t)0x539B,\n    (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9930,\n    (q15_t)0x4C3F, (q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x9592, (q15_t)0x471C,\n    (q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x90A0,\n    (q15_t)0x3F17, (q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8DAA, (q15_t)0x398C,\n    (q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x89BE,\n    (q15_t)0x30FB, (q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x877B, (q15_t)0x2B1F,\n    (q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8582, (q15_t)0x2528, (q15_t)0x84A2,\n    (q15_t)0x2223, (q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x831C, (q15_t)0x1C0B,\n    (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x8162,\n    (q15_t)0x12C8, (q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x809D, (q15_t)0x0C8B,\n    (q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8009,\n    (q15_t)0x0324, (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8009, (q15_t)0xFCDB,\n    (q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8058, (q15_t)0xF695, (q15_t)0x809D,\n    (q15_t)0xF374, (q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x8162, (q15_t)0xED37,\n    (q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x831C,\n    (q15_t)0xE3F4, (q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x84A2, (q15_t)0xDDDC,\n    (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x877B,\n    (q15_t)0xD4E0, (q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x89BE, (q15_t)0xCF04,\n    (q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8DAA,\n    (q15_t)0xC673, (q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x90A0, (q15_t)0xC0E8,\n    (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9592,\n    (q15_t)0xB8E3, (q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9930, (q15_t)0xB3C0,\n    (q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9F13,\n    (q15_t)0xAC64, (q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA34B, (q15_t)0xA7BD,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xAA0A,\n    (q15_t)0xA128, (q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAECC, (q15_t)0x9D0D,\n    (q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB64B,\n    (q15_t)0x9759, (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBB85, (q15_t)0x93DB,\n    (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC3A9,\n    (q15_t)0x8F1D, (q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC945, (q15_t)0x8C4A,\n    (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD1EE,\n    (q15_t)0x8893, (q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD7D9, (q15_t)0x8675,\n    (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xE0E6,\n    (q15_t)0x83D6, (q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE707, (q15_t)0x8275,\n    (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xF054,\n    (q15_t)0x80F6, (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF695, (q15_t)0x8058,\n    (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFCDB, (q15_t)0x8009};\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 512, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n */\nconst q15_t twiddleCoef_512_q15[768] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FF6,\n    (q15_t)0x0324, (q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FD8, (q15_t)0x0647,\n    (q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F87,\n    (q15_t)0x0AFB, (q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F38, (q15_t)0x0E1B,\n    (q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7E9D,\n    (q15_t)0x12C8, (q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E1D, (q15_t)0x15E2,\n    (q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D39,\n    (q15_t)0x1A82, (q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7C89, (q15_t)0x1D93,\n    (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7B5D,\n    (q15_t)0x2223, (q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7A7D, (q15_t)0x2528,\n    (q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x798A, (q15_t)0x2826, (q15_t)0x7909,\n    (q15_t)0x29A3, (q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x77FA, (q15_t)0x2C98,\n    (q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x7641,\n    (q15_t)0x30FB, (q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7504, (q15_t)0x33DE,\n    (q15_t)0x745F, (q15_t)0x354D, (q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7307,\n    (q15_t)0x3824, (q15_t)0x7255, (q15_t)0x398C, (q15_t)0x719E, (q15_t)0x3AF2,\n    (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x6F5F,\n    (q15_t)0x3F17, (q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6DCA, (q15_t)0x41CE,\n    (q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6B4A,\n    (q15_t)0x45CD, (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x698C, (q15_t)0x4869,\n    (q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x66CF,\n    (q15_t)0x4C3F, (q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x64E8, (q15_t)0x4EBF,\n    (q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x61F1,\n    (q15_t)0x5269, (q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x5FE3, (q15_t)0x54CA,\n    (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5CB4,\n    (q15_t)0x5842, (q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5A82, (q15_t)0x5A82,\n    (q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x571D,\n    (q15_t)0x5DC7, (q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x54CA, (q15_t)0x5FE3,\n    (q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x5133,\n    (q15_t)0x62F2, (q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4EBF, (q15_t)0x64E8,\n    (q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4AFB,\n    (q15_t)0x67BD, (q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x4869, (q15_t)0x698C,\n    (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x447A,\n    (q15_t)0x6C24, (q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x41CE, (q15_t)0x6DCA,\n    (q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3DB8,\n    (q15_t)0x7023, (q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3AF2, (q15_t)0x719E,\n    (q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3824, (q15_t)0x7307, (q15_t)0x36BA,\n    (q15_t)0x73B5, (q15_t)0x354D, (q15_t)0x745F, (q15_t)0x33DE, (q15_t)0x7504,\n    (q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2F87,\n    (q15_t)0x76D9, (q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2C98, (q15_t)0x77FA,\n    (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x2826,\n    (q15_t)0x798A, (q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x2528, (q15_t)0x7A7D,\n    (q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x209F,\n    (q15_t)0x7BC5, (q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1D93, (q15_t)0x7C89,\n    (q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x18F8,\n    (q15_t)0x7D8A, (q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x15E2, (q15_t)0x7E1D,\n    (q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1139,\n    (q15_t)0x7ED5, (q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0E1B, (q15_t)0x7F38,\n    (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x096A,\n    (q15_t)0x7FA7, (q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0647, (q15_t)0x7FD8,\n    (q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x0192,\n    (q15_t)0x7FFD, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFE6D, (q15_t)0x7FFD,\n    (q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xF9B8,\n    (q15_t)0x7FD8, (q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF695, (q15_t)0x7FA7,\n    (q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF1E4,\n    (q15_t)0x7F38, (q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEEC6, (q15_t)0x7ED5,\n    (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEA1D,\n    (q15_t)0x7E1D, (q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE707, (q15_t)0x7D8A,\n    (q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE26C,\n    (q15_t)0x7C89, (q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDF60, (q15_t)0x7BC5,\n    (q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDAD7,\n    (q15_t)0x7A7D, (q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD7D9, (q15_t)0x798A,\n    (q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD367,\n    (q15_t)0x77FA, (q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD078, (q15_t)0x76D9,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCC21,\n    (q15_t)0x7504, (q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xC945, (q15_t)0x73B5,\n    (q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC50D,\n    (q15_t)0x719E, (q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC247, (q15_t)0x7023,\n    (q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBE31,\n    (q15_t)0x6DCA, (q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBB85, (q15_t)0x6C24,\n    (q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB796,\n    (q15_t)0x698C, (q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB504, (q15_t)0x67BD,\n    (q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB140,\n    (q15_t)0x64E8, (q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAECC, (q15_t)0x62F2,\n    (q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAB35,\n    (q15_t)0x5FE3, (q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA8E2, (q15_t)0x5DC7,\n    (q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA57D,\n    (q15_t)0x5A82, (q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA34B, (q15_t)0x5842,\n    (q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA01C,\n    (q15_t)0x54CA, (q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E0E, (q15_t)0x5269,\n    (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9B17,\n    (q15_t)0x4EBF, (q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x9930, (q15_t)0x4C3F,\n    (q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x9673,\n    (q15_t)0x4869, (q15_t)0x9592, (q15_t)0x471C, (q15_t)0x94B5, (q15_t)0x45CD,\n    (q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9306, (q15_t)0x4325, (q15_t)0x9235,\n    (q15_t)0x41CE, (q15_t)0x9169, (q15_t)0x4073, (q15_t)0x90A0, (q15_t)0x3F17,\n    (q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8E61,\n    (q15_t)0x3AF2, (q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8CF8, (q15_t)0x3824,\n    (q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8AFB,\n    (q15_t)0x33DE, (q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x89BE, (q15_t)0x30FB,\n    (q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8805,\n    (q15_t)0x2C98, (q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x86F6, (q15_t)0x29A3,\n    (q15_t)0x8675, (q15_t)0x2826, (q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x8582,\n    (q15_t)0x2528, (q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x84A2, (q15_t)0x2223,\n    (q15_t)0x843A, (q15_t)0x209F, (q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x8376,\n    (q15_t)0x1D93, (q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82C6, (q15_t)0x1A82,\n    (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8229, (q15_t)0x176D, (q15_t)0x81E2,\n    (q15_t)0x15E2, (q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8162, (q15_t)0x12C8,\n    (q15_t)0x812A, (q15_t)0x1139, (q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80C7,\n    (q15_t)0x0E1B, (q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8078, (q15_t)0x0AFB,\n    (q15_t)0x8058, (q15_t)0x096A, (q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x8027,\n    (q15_t)0x0647, (q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x8009, (q15_t)0x0324,\n    (q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8002,\n    (q15_t)0xFE6D, (q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x8016, (q15_t)0xFB49,\n    (q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x803D, (q15_t)0xF826, (q15_t)0x8058,\n    (q15_t)0xF695, (q15_t)0x8078, (q15_t)0xF504, (q15_t)0x809D, (q15_t)0xF374,\n    (q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x812A,\n    (q15_t)0xEEC6, (q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81A0, (q15_t)0xEBAA,\n    (q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8229, (q15_t)0xE892, (q15_t)0x8275,\n    (q15_t)0xE707, (q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x831C, (q15_t)0xE3F4,\n    (q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x843A,\n    (q15_t)0xDF60, (q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x8510, (q15_t)0xDC59,\n    (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8675,\n    (q15_t)0xD7D9, (q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x877B, (q15_t)0xD4E0,\n    (q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x8926,\n    (q15_t)0xD078, (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A5A, (q15_t)0xCD91,\n    (q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8C4A,\n    (q15_t)0xC945, (q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8DAA, (q15_t)0xC673,\n    (q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8FDC,\n    (q15_t)0xC247, (q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9169, (q15_t)0xBF8C,\n    (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x93DB,\n    (q15_t)0xBB85, (q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x9592, (q15_t)0xB8E3,\n    (q15_t)0x9673, (q15_t)0xB796, (q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9842,\n    (q15_t)0xB504, (q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9A22, (q15_t)0xB27E,\n    (q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9D0D,\n    (q15_t)0xAECC, (q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9F13, (q15_t)0xAC64,\n    (q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA238,\n    (q15_t)0xA8E2, (q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA462, (q15_t)0xA69B,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA7BD,\n    (q15_t)0xA34B, (q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xAA0A, (q15_t)0xA128,\n    (q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAD96,\n    (q15_t)0x9E0E, (q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB004, (q15_t)0x9C10,\n    (q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB3C0,\n    (q15_t)0x9930, (q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB64B, (q15_t)0x9759,\n    (q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBA32,\n    (q15_t)0x94B5, (q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBCDA, (q15_t)0x9306,\n    (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xC0E8,\n    (q15_t)0x90A0, (q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC3A9, (q15_t)0x8F1D,\n    (q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC7DB,\n    (q15_t)0x8CF8, (q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCAB2, (q15_t)0x8BA0,\n    (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCF04,\n    (q15_t)0x89BE, (q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD1EE, (q15_t)0x8893,\n    (q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD65C,\n    (q15_t)0x86F6, (q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD957, (q15_t)0x85FA,\n    (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDDDC,\n    (q15_t)0x84A2, (q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xE0E6, (q15_t)0x83D6,\n    (q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE57D,\n    (q15_t)0x82C6, (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE892, (q15_t)0x8229,\n    (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xED37,\n    (q15_t)0x8162, (q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xF054, (q15_t)0x80F6,\n    (q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF504,\n    (q15_t)0x8078, (q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF826, (q15_t)0x803D,\n    (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFCDB,\n    (q15_t)0x8009, (q15_t)0xFE6D, (q15_t)0x8002};\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 1024, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n\n */\nconst q15_t twiddleCoef_1024_q15[1536] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFD,\n    (q15_t)0x0192, (q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF6, (q15_t)0x0324,\n    (q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE1,\n    (q15_t)0x057F, (q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FCE, (q15_t)0x0710,\n    (q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FA7,\n    (q15_t)0x096A, (q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F87, (q15_t)0x0AFB,\n    (q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F4D,\n    (q15_t)0x0D53, (q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F21, (q15_t)0x0EE3,\n    (q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EF0, (q15_t)0x1072, (q15_t)0x7ED5,\n    (q15_t)0x1139, (q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7E9D, (q15_t)0x12C8,\n    (q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E3F,\n    (q15_t)0x151B, (q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DFA, (q15_t)0x16A8,\n    (q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DB0, (q15_t)0x1833, (q15_t)0x7D8A,\n    (q15_t)0x18F8, (q15_t)0x7D62, (q15_t)0x19BD, (q15_t)0x7D39, (q15_t)0x1A82,\n    (q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CB7,\n    (q15_t)0x1CCF, (q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C5A, (q15_t)0x1E56,\n    (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BF8, (q15_t)0x1FDC, (q15_t)0x7BC5,\n    (q15_t)0x209F, (q15_t)0x7B92, (q15_t)0x2161, (q15_t)0x7B5D, (q15_t)0x2223,\n    (q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AB6,\n    (q15_t)0x2467, (q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A42, (q15_t)0x25E8,\n    (q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79C8, (q15_t)0x2767, (q15_t)0x798A,\n    (q15_t)0x2826, (q15_t)0x794A, (q15_t)0x28E5, (q15_t)0x7909, (q15_t)0x29A3,\n    (q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7840,\n    (q15_t)0x2BDC, (q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77B4, (q15_t)0x2D55,\n    (q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7723, (q15_t)0x2ECC, (q15_t)0x76D9,\n    (q15_t)0x2F87, (q15_t)0x768E, (q15_t)0x3041, (q15_t)0x7641, (q15_t)0x30FB,\n    (q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7555,\n    (q15_t)0x3326, (q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74B2, (q15_t)0x3496,\n    (q15_t)0x745F, (q15_t)0x354D, (q15_t)0x740B, (q15_t)0x3604, (q15_t)0x73B5,\n    (q15_t)0x36BA, (q15_t)0x735F, (q15_t)0x376F, (q15_t)0x7307, (q15_t)0x3824,\n    (q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7255, (q15_t)0x398C, (q15_t)0x71FA,\n    (q15_t)0x3A40, (q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x7141, (q15_t)0x3BA5,\n    (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7083, (q15_t)0x3D07, (q15_t)0x7023,\n    (q15_t)0x3DB8, (q15_t)0x6FC1, (q15_t)0x3E68, (q15_t)0x6F5F, (q15_t)0x3F17,\n    (q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E30,\n    (q15_t)0x4121, (q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D62, (q15_t)0x427A,\n    (q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6C8F, (q15_t)0x43D0, (q15_t)0x6C24,\n    (q15_t)0x447A, (q15_t)0x6BB8, (q15_t)0x4524, (q15_t)0x6B4A, (q15_t)0x45CD,\n    (q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x69FD,\n    (q15_t)0x47C3, (q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6919, (q15_t)0x490F,\n    (q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6832, (q15_t)0x4A58, (q15_t)0x67BD,\n    (q15_t)0x4AFB, (q15_t)0x6746, (q15_t)0x4B9E, (q15_t)0x66CF, (q15_t)0x4C3F,\n    (q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x6563,\n    (q15_t)0x4E21, (q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x646C, (q15_t)0x4F5E,\n    (q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x6371, (q15_t)0x5097, (q15_t)0x62F2,\n    (q15_t)0x5133, (q15_t)0x6271, (q15_t)0x51CE, (q15_t)0x61F1, (q15_t)0x5269,\n    (q15_t)0x616F, (q15_t)0x5302, (q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x6068,\n    (q15_t)0x5433, (q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5F5E, (q15_t)0x5560,\n    (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E50, (q15_t)0x568A, (q15_t)0x5DC7,\n    (q15_t)0x571D, (q15_t)0x5D3E, (q15_t)0x57B0, (q15_t)0x5CB4, (q15_t)0x5842,\n    (q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B10,\n    (q15_t)0x59F3, (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x59F3, (q15_t)0x5B10,\n    (q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x58D4, (q15_t)0x5C29, (q15_t)0x5842,\n    (q15_t)0x5CB4, (q15_t)0x57B0, (q15_t)0x5D3E, (q15_t)0x571D, (q15_t)0x5DC7,\n    (q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x5560,\n    (q15_t)0x5F5E, (q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x5433, (q15_t)0x6068,\n    (q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5302, (q15_t)0x616F, (q15_t)0x5269,\n    (q15_t)0x61F1, (q15_t)0x51CE, (q15_t)0x6271, (q15_t)0x5133, (q15_t)0x62F2,\n    (q15_t)0x5097, (q15_t)0x6371, (q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4F5E,\n    (q15_t)0x646C, (q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E21, (q15_t)0x6563,\n    (q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4CE1, (q15_t)0x6657, (q15_t)0x4C3F,\n    (q15_t)0x66CF, (q15_t)0x4B9E, (q15_t)0x6746, (q15_t)0x4AFB, (q15_t)0x67BD,\n    (q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x490F,\n    (q15_t)0x6919, (q15_t)0x4869, (q15_t)0x698C, (q15_t)0x47C3, (q15_t)0x69FD,\n    (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x4675, (q15_t)0x6ADC, (q15_t)0x45CD,\n    (q15_t)0x6B4A, (q15_t)0x4524, (q15_t)0x6BB8, (q15_t)0x447A, (q15_t)0x6C24,\n    (q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x427A,\n    (q15_t)0x6D62, (q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4121, (q15_t)0x6E30,\n    (q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x3FC5, (q15_t)0x6EFB, (q15_t)0x3F17,\n    (q15_t)0x6F5F, (q15_t)0x3E68, (q15_t)0x6FC1, (q15_t)0x3DB8, (q15_t)0x7023,\n    (q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3BA5,\n    (q15_t)0x7141, (q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A40, (q15_t)0x71FA,\n    (q15_t)0x398C, (q15_t)0x7255, (q15_t)0x38D8, (q15_t)0x72AF, (q15_t)0x3824,\n    (q15_t)0x7307, (q15_t)0x376F, (q15_t)0x735F, (q15_t)0x36BA, (q15_t)0x73B5,\n    (q15_t)0x3604, (q15_t)0x740B, (q15_t)0x354D, (q15_t)0x745F, (q15_t)0x3496,\n    (q15_t)0x74B2, (q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3326, (q15_t)0x7555,\n    (q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x31B5, (q15_t)0x75F4, (q15_t)0x30FB,\n    (q15_t)0x7641, (q15_t)0x3041, (q15_t)0x768E, (q15_t)0x2F87, (q15_t)0x76D9,\n    (q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2D55,\n    (q15_t)0x77B4, (q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2BDC, (q15_t)0x7840,\n    (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2A61, (q15_t)0x78C7, (q15_t)0x29A3,\n    (q15_t)0x7909, (q15_t)0x28E5, (q15_t)0x794A, (q15_t)0x2826, (q15_t)0x798A,\n    (q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x25E8,\n    (q15_t)0x7A42, (q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2467, (q15_t)0x7AB6,\n    (q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x22E5, (q15_t)0x7B26, (q15_t)0x2223,\n    (q15_t)0x7B5D, (q15_t)0x2161, (q15_t)0x7B92, (q15_t)0x209F, (q15_t)0x7BC5,\n    (q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1E56,\n    (q15_t)0x7C5A, (q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1CCF, (q15_t)0x7CB7,\n    (q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1B47, (q15_t)0x7D0F, (q15_t)0x1A82,\n    (q15_t)0x7D39, (q15_t)0x19BD, (q15_t)0x7D62, (q15_t)0x18F8, (q15_t)0x7D8A,\n    (q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x16A8,\n    (q15_t)0x7DFA, (q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x151B, (q15_t)0x7E3F,\n    (q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x138E, (q15_t)0x7E7F, (q15_t)0x12C8,\n    (q15_t)0x7E9D, (q15_t)0x1201, (q15_t)0x7EBA, (q15_t)0x1139, (q15_t)0x7ED5,\n    (q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0EE3,\n    (q15_t)0x7F21, (q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0D53, (q15_t)0x7F4D,\n    (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0BC3, (q15_t)0x7F75, (q15_t)0x0AFB,\n    (q15_t)0x7F87, (q15_t)0x0A33, (q15_t)0x7F97, (q15_t)0x096A, (q15_t)0x7FA7,\n    (q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0710,\n    (q15_t)0x7FCE, (q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x057F, (q15_t)0x7FE1,\n    (q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x03ED, (q15_t)0x7FF0, (q15_t)0x0324,\n    (q15_t)0x7FF6, (q15_t)0x025B, (q15_t)0x7FFA, (q15_t)0x0192, (q15_t)0x7FFD,\n    (q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFF36,\n    (q15_t)0x7FFF, (q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFDA4, (q15_t)0x7FFA,\n    (q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC12, (q15_t)0x7FF0, (q15_t)0xFB49,\n    (q15_t)0x7FE9, (q15_t)0xFA80, (q15_t)0x7FE1, (q15_t)0xF9B8, (q15_t)0x7FD8,\n    (q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF75D,\n    (q15_t)0x7FB5, (q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF5CC, (q15_t)0x7F97,\n    (q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF43C, (q15_t)0x7F75, (q15_t)0xF374,\n    (q15_t)0x7F62, (q15_t)0xF2AC, (q15_t)0x7F4D, (q15_t)0xF1E4, (q15_t)0x7F38,\n    (q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEF8D,\n    (q15_t)0x7EF0, (q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEDFE, (q15_t)0x7EBA,\n    (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEC71, (q15_t)0x7E7F, (q15_t)0xEBAA,\n    (q15_t)0x7E5F, (q15_t)0xEAE4, (q15_t)0x7E3F, (q15_t)0xEA1D, (q15_t)0x7E1D,\n    (q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE7CC,\n    (q15_t)0x7DB0, (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE642, (q15_t)0x7D62,\n    (q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE4B8, (q15_t)0x7D0F, (q15_t)0xE3F4,\n    (q15_t)0x7CE3, (q15_t)0xE330, (q15_t)0x7CB7, (q15_t)0xE26C, (q15_t)0x7C89,\n    (q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE023,\n    (q15_t)0x7BF8, (q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDE9E, (q15_t)0x7B92,\n    (q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD1A, (q15_t)0x7B26, (q15_t)0xDC59,\n    (q15_t)0x7AEF, (q15_t)0xDB98, (q15_t)0x7AB6, (q15_t)0xDAD7, (q15_t)0x7A7D,\n    (q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD898,\n    (q15_t)0x79C8, (q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD71A, (q15_t)0x794A,\n    (q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD59E, (q15_t)0x78C7, (q15_t)0xD4E0,\n    (q15_t)0x7884, (q15_t)0xD423, (q15_t)0x7840, (q15_t)0xD367, (q15_t)0x77FA,\n    (q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD133,\n    (q15_t)0x7723, (q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xCFBE, (q15_t)0x768E,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCE4A, (q15_t)0x75F4, (q15_t)0xCD91,\n    (q15_t)0x75A5, (q15_t)0xCCD9, (q15_t)0x7555, (q15_t)0xCC21, (q15_t)0x7504,\n    (q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xC9FB,\n    (q15_t)0x740B, (q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC890, (q15_t)0x735F,\n    (q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC727, (q15_t)0x72AF, (q15_t)0xC673,\n    (q15_t)0x7255, (q15_t)0xC5BF, (q15_t)0x71FA, (q15_t)0xC50D, (q15_t)0x719E,\n    (q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC2F8,\n    (q15_t)0x7083, (q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC197, (q15_t)0x6FC1,\n    (q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC03A, (q15_t)0x6EFB, (q15_t)0xBF8C,\n    (q15_t)0x6E96, (q15_t)0xBEDE, (q15_t)0x6E30, (q15_t)0xBE31, (q15_t)0x6DCA,\n    (q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBC2F,\n    (q15_t)0x6C8F, (q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBADB, (q15_t)0x6BB8,\n    (q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB98A, (q15_t)0x6ADC, (q15_t)0xB8E3,\n    (q15_t)0x6A6D, (q15_t)0xB83C, (q15_t)0x69FD, (q15_t)0xB796, (q15_t)0x698C,\n    (q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB5A7,\n    (q15_t)0x6832, (q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB461, (q15_t)0x6746,\n    (q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB31E, (q15_t)0x6657, (q15_t)0xB27E,\n    (q15_t)0x65DD, (q15_t)0xB1DE, (q15_t)0x6563, (q15_t)0xB140, (q15_t)0x64E8,\n    (q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAF68,\n    (q15_t)0x6371, (q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAE31, (q15_t)0x6271,\n    (q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xACFD, (q15_t)0x616F, (q15_t)0xAC64,\n    (q15_t)0x60EC, (q15_t)0xABCC, (q15_t)0x6068, (q15_t)0xAB35, (q15_t)0x5FE3,\n    (q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA975,\n    (q15_t)0x5E50, (q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA84F, (q15_t)0x5D3E,\n    (q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA72B, (q15_t)0x5C29, (q15_t)0xA69B,\n    (q15_t)0x5B9D, (q15_t)0xA60C, (q15_t)0x5B10, (q15_t)0xA57D, (q15_t)0x5A82,\n    (q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA3D6,\n    (q15_t)0x58D4, (q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA2C1, (q15_t)0x57B0,\n    (q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA1AF, (q15_t)0x568A, (q15_t)0xA128,\n    (q15_t)0x55F5, (q15_t)0xA0A1, (q15_t)0x5560, (q15_t)0xA01C, (q15_t)0x54CA,\n    (q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E90,\n    (q15_t)0x5302, (q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9D8E, (q15_t)0x51CE,\n    (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C8E, (q15_t)0x5097, (q15_t)0x9C10,\n    (q15_t)0x4FFB, (q15_t)0x9B93, (q15_t)0x4F5E, (q15_t)0x9B17, (q15_t)0x4EBF,\n    (q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x99A8,\n    (q15_t)0x4CE1, (q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x98B9, (q15_t)0x4B9E,\n    (q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x97CD, (q15_t)0x4A58, (q15_t)0x9759,\n    (q15_t)0x49B4, (q15_t)0x96E6, (q15_t)0x490F, (q15_t)0x9673, (q15_t)0x4869,\n    (q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9523,\n    (q15_t)0x4675, (q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x9447, (q15_t)0x4524,\n    (q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9370, (q15_t)0x43D0, (q15_t)0x9306,\n    (q15_t)0x4325, (q15_t)0x929D, (q15_t)0x427A, (q15_t)0x9235, (q15_t)0x41CE,\n    (q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9104,\n    (q15_t)0x3FC5, (q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x903E, (q15_t)0x3E68,\n    (q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8F7C, (q15_t)0x3D07, (q15_t)0x8F1D,\n    (q15_t)0x3C56, (q15_t)0x8EBE, (q15_t)0x3BA5, (q15_t)0x8E61, (q15_t)0x3AF2,\n    (q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D50,\n    (q15_t)0x38D8, (q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CA0, (q15_t)0x376F,\n    (q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BF4, (q15_t)0x3604, (q15_t)0x8BA0,\n    (q15_t)0x354D, (q15_t)0x8B4D, (q15_t)0x3496, (q15_t)0x8AFB, (q15_t)0x33DE,\n    (q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A0B,\n    (q15_t)0x31B5, (q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8971, (q15_t)0x3041,\n    (q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x88DC, (q15_t)0x2ECC, (q15_t)0x8893,\n    (q15_t)0x2E11, (q15_t)0x884B, (q15_t)0x2D55, (q15_t)0x8805, (q15_t)0x2C98,\n    (q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8738,\n    (q15_t)0x2A61, (q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86B5, (q15_t)0x28E5,\n    (q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8637, (q15_t)0x2767, (q15_t)0x85FA,\n    (q15_t)0x26A8, (q15_t)0x85BD, (q15_t)0x25E8, (q15_t)0x8582, (q15_t)0x2528,\n    (q15_t)0x8549, (q15_t)0x2467, (q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x84D9,\n    (q15_t)0x22E5, (q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x846D, (q15_t)0x2161,\n    (q15_t)0x843A, (q15_t)0x209F, (q15_t)0x8407, (q15_t)0x1FDC, (q15_t)0x83D6,\n    (q15_t)0x1F19, (q15_t)0x83A5, (q15_t)0x1E56, (q15_t)0x8376, (q15_t)0x1D93,\n    (q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82F0,\n    (q15_t)0x1B47, (q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x829D, (q15_t)0x19BD,\n    (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x824F, (q15_t)0x1833, (q15_t)0x8229,\n    (q15_t)0x176D, (q15_t)0x8205, (q15_t)0x16A8, (q15_t)0x81E2, (q15_t)0x15E2,\n    (q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8180,\n    (q15_t)0x138E, (q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x8145, (q15_t)0x1201,\n    (q15_t)0x812A, (q15_t)0x1139, (q15_t)0x810F, (q15_t)0x1072, (q15_t)0x80F6,\n    (q15_t)0x0FAB, (q15_t)0x80DE, (q15_t)0x0EE3, (q15_t)0x80C7, (q15_t)0x0E1B,\n    (q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x808A,\n    (q15_t)0x0BC3, (q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8068, (q15_t)0x0A33,\n    (q15_t)0x8058, (q15_t)0x096A, (q15_t)0x804A, (q15_t)0x08A2, (q15_t)0x803D,\n    (q15_t)0x07D9, (q15_t)0x8031, (q15_t)0x0710, (q15_t)0x8027, (q15_t)0x0647,\n    (q15_t)0x801E, (q15_t)0x057F, (q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x800F,\n    (q15_t)0x03ED, (q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8005, (q15_t)0x025B,\n    (q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8000, (q15_t)0x00C9, (q15_t)0x8000,\n    (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8002, (q15_t)0xFE6D,\n    (q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800F,\n    (q15_t)0xFC12, (q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x801E, (q15_t)0xFA80,\n    (q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8031, (q15_t)0xF8EF, (q15_t)0x803D,\n    (q15_t)0xF826, (q15_t)0x804A, (q15_t)0xF75D, (q15_t)0x8058, (q15_t)0xF695,\n    (q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x8078, (q15_t)0xF504, (q15_t)0x808A,\n    (q15_t)0xF43C, (q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80B2, (q15_t)0xF2AC,\n    (q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80DE, (q15_t)0xF11C, (q15_t)0x80F6,\n    (q15_t)0xF054, (q15_t)0x810F, (q15_t)0xEF8D, (q15_t)0x812A, (q15_t)0xEEC6,\n    (q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x8162, (q15_t)0xED37, (q15_t)0x8180,\n    (q15_t)0xEC71, (q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81C0, (q15_t)0xEAE4,\n    (q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8205, (q15_t)0xE957, (q15_t)0x8229,\n    (q15_t)0xE892, (q15_t)0x824F, (q15_t)0xE7CC, (q15_t)0x8275, (q15_t)0xE707,\n    (q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82F0,\n    (q15_t)0xE4B8, (q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8348, (q15_t)0xE330,\n    (q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x83A5, (q15_t)0xE1A9, (q15_t)0x83D6,\n    (q15_t)0xE0E6, (q15_t)0x8407, (q15_t)0xE023, (q15_t)0x843A, (q15_t)0xDF60,\n    (q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84D9,\n    (q15_t)0xDD1A, (q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x8549, (q15_t)0xDB98,\n    (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85BD, (q15_t)0xDA17, (q15_t)0x85FA,\n    (q15_t)0xD957, (q15_t)0x8637, (q15_t)0xD898, (q15_t)0x8675, (q15_t)0xD7D9,\n    (q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8738,\n    (q15_t)0xD59E, (q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x87BF, (q15_t)0xD423,\n    (q15_t)0x8805, (q15_t)0xD367, (q15_t)0x884B, (q15_t)0xD2AA, (q15_t)0x8893,\n    (q15_t)0xD1EE, (q15_t)0x88DC, (q15_t)0xD133, (q15_t)0x8926, (q15_t)0xD078,\n    (q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A0B,\n    (q15_t)0xCE4A, (q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8AAA, (q15_t)0xCCD9,\n    (q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B4D, (q15_t)0xCB69, (q15_t)0x8BA0,\n    (q15_t)0xCAB2, (q15_t)0x8BF4, (q15_t)0xC9FB, (q15_t)0x8C4A, (q15_t)0xC945,\n    (q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D50,\n    (q15_t)0xC727, (q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E05, (q15_t)0xC5BF,\n    (q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8EBE, (q15_t)0xC45A, (q15_t)0x8F1D,\n    (q15_t)0xC3A9, (q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8FDC, (q15_t)0xC247,\n    (q15_t)0x903E, (q15_t)0xC197, (q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9104,\n    (q15_t)0xC03A, (q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x91CF, (q15_t)0xBEDE,\n    (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x929D, (q15_t)0xBD85, (q15_t)0x9306,\n    (q15_t)0xBCDA, (q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x93DB, (q15_t)0xBB85,\n    (q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x9523,\n    (q15_t)0xB98A, (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9602, (q15_t)0xB83C,\n    (q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96E6, (q15_t)0xB6F0, (q15_t)0x9759,\n    (q15_t)0xB64B, (q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x9842, (q15_t)0xB504,\n    (q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x99A8,\n    (q15_t)0xB31E, (q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A9C, (q15_t)0xB1DE,\n    (q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B93, (q15_t)0xB0A1, (q15_t)0x9C10,\n    (q15_t)0xB004, (q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9D0D, (q15_t)0xAECC,\n    (q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E90,\n    (q15_t)0xACFD, (q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F97, (q15_t)0xABCC,\n    (q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA0A1, (q15_t)0xAA9F, (q15_t)0xA128,\n    (q15_t)0xAA0A, (q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA238, (q15_t)0xA8E2,\n    (q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA3D6,\n    (q15_t)0xA72B, (q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4EF, (q15_t)0xA60C,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA60C, (q15_t)0xA4EF, (q15_t)0xA69B,\n    (q15_t)0xA462, (q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA7BD, (q15_t)0xA34B,\n    (q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA975,\n    (q15_t)0xA1AF, (q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA9F, (q15_t)0xA0A1,\n    (q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xABCC, (q15_t)0x9F97, (q15_t)0xAC64,\n    (q15_t)0x9F13, (q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD96, (q15_t)0x9E0E,\n    (q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF68,\n    (q15_t)0x9C8E, (q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB0A1, (q15_t)0x9B93,\n    (q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB1DE, (q15_t)0x9A9C, (q15_t)0xB27E,\n    (q15_t)0x9A22, (q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB3C0, (q15_t)0x9930,\n    (q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB5A7,\n    (q15_t)0x97CD, (q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB6F0, (q15_t)0x96E6,\n    (q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB83C, (q15_t)0x9602, (q15_t)0xB8E3,\n    (q15_t)0x9592, (q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xBA32, (q15_t)0x94B5,\n    (q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBC2F,\n    (q15_t)0x9370, (q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD85, (q15_t)0x929D,\n    (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBEDE, (q15_t)0x91CF, (q15_t)0xBF8C,\n    (q15_t)0x9169, (q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC0E8, (q15_t)0x90A0,\n    (q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC2F8,\n    (q15_t)0x8F7C, (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC45A, (q15_t)0x8EBE,\n    (q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC5BF, (q15_t)0x8E05, (q15_t)0xC673,\n    (q15_t)0x8DAA, (q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC7DB, (q15_t)0x8CF8,\n    (q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9FB,\n    (q15_t)0x8BF4, (q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB69, (q15_t)0x8B4D,\n    (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD91,\n    (q15_t)0x8A5A, (q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCF04, (q15_t)0x89BE,\n    (q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD133,\n    (q15_t)0x88DC, (q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD2AA, (q15_t)0x884B,\n    (q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD4E0,\n    (q15_t)0x877B, (q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD65C, (q15_t)0x86F6,\n    (q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD898,\n    (q15_t)0x8637, (q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xDA17, (q15_t)0x85BD,\n    (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDC59,\n    (q15_t)0x8510, (q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDDDC, (q15_t)0x84A2,\n    (q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xE023,\n    (q15_t)0x8407, (q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE1A9, (q15_t)0x83A5,\n    (q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE3F4,\n    (q15_t)0x831C, (q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE57D, (q15_t)0x82C6,\n    (q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE7CC,\n    (q15_t)0x824F, (q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE957, (q15_t)0x8205,\n    (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEBAA,\n    (q15_t)0x81A0, (q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xED37, (q15_t)0x8162,\n    (q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF8D,\n    (q15_t)0x810F, (q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF11C, (q15_t)0x80DE,\n    (q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF374,\n    (q15_t)0x809D, (q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF504, (q15_t)0x8078,\n    (q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF75D,\n    (q15_t)0x804A, (q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF8EF, (q15_t)0x8031,\n    (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFB49,\n    (q15_t)0x8016, (q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFCDB, (q15_t)0x8009,\n    (q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFF36,\n    (q15_t)0x8000};\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 2048, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n */\nconst q15_t twiddleCoef_2048_q15[3072] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF,\n    (q15_t)0x00C9, (q15_t)0x7FFE, (q15_t)0x012D, (q15_t)0x7FFD, (q15_t)0x0192,\n    (q15_t)0x7FFC, (q15_t)0x01F6, (q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF8,\n    (q15_t)0x02BF, (q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF3, (q15_t)0x0388,\n    (q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FED, (q15_t)0x0451, (q15_t)0x7FE9,\n    (q15_t)0x04B6, (q15_t)0x7FE5, (q15_t)0x051A, (q15_t)0x7FE1, (q15_t)0x057F,\n    (q15_t)0x7FDD, (q15_t)0x05E3, (q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD3,\n    (q15_t)0x06AC, (q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FC8, (q15_t)0x0775,\n    (q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBC, (q15_t)0x083D, (q15_t)0x7FB5,\n    (q15_t)0x08A2, (q15_t)0x7FAE, (q15_t)0x0906, (q15_t)0x7FA7, (q15_t)0x096A,\n    (q15_t)0x7F9F, (q15_t)0x09CE, (q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F8F,\n    (q15_t)0x0A97, (q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F7E, (q15_t)0x0B5F,\n    (q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F6B, (q15_t)0x0C27, (q15_t)0x7F62,\n    (q15_t)0x0C8B, (q15_t)0x7F58, (q15_t)0x0CEF, (q15_t)0x7F4D, (q15_t)0x0D53,\n    (q15_t)0x7F43, (q15_t)0x0DB7, (q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F2D,\n    (q15_t)0x0E7F, (q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F15, (q15_t)0x0F47,\n    (q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EFD, (q15_t)0x100E, (q15_t)0x7EF0,\n    (q15_t)0x1072, (q15_t)0x7EE3, (q15_t)0x10D6, (q15_t)0x7ED5, (q15_t)0x1139,\n    (q15_t)0x7EC8, (q15_t)0x119D, (q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7EAB,\n    (q15_t)0x1264, (q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E8E, (q15_t)0x132B,\n    (q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E6F, (q15_t)0x13F2, (q15_t)0x7E5F,\n    (q15_t)0x1455, (q15_t)0x7E4F, (q15_t)0x14B8, (q15_t)0x7E3F, (q15_t)0x151B,\n    (q15_t)0x7E2E, (q15_t)0x157F, (q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7E0C,\n    (q15_t)0x1645, (q15_t)0x7DFA, (q15_t)0x16A8, (q15_t)0x7DE8, (q15_t)0x170A,\n    (q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DC3, (q15_t)0x17D0, (q15_t)0x7DB0,\n    (q15_t)0x1833, (q15_t)0x7D9D, (q15_t)0x1896, (q15_t)0x7D8A, (q15_t)0x18F8,\n    (q15_t)0x7D76, (q15_t)0x195B, (q15_t)0x7D62, (q15_t)0x19BD, (q15_t)0x7D4E,\n    (q15_t)0x1A20, (q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D24, (q15_t)0x1AE4,\n    (q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7CF9, (q15_t)0x1BA9, (q15_t)0x7CE3,\n    (q15_t)0x1C0B, (q15_t)0x7CCD, (q15_t)0x1C6D, (q15_t)0x7CB7, (q15_t)0x1CCF,\n    (q15_t)0x7CA0, (q15_t)0x1D31, (q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C71,\n    (q15_t)0x1DF5, (q15_t)0x7C5A, (q15_t)0x1E56, (q15_t)0x7C42, (q15_t)0x1EB8,\n    (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7C11, (q15_t)0x1F7B, (q15_t)0x7BF8,\n    (q15_t)0x1FDC, (q15_t)0x7BDF, (q15_t)0x203E, (q15_t)0x7BC5, (q15_t)0x209F,\n    (q15_t)0x7BAC, (q15_t)0x2100, (q15_t)0x7B92, (q15_t)0x2161, (q15_t)0x7B77,\n    (q15_t)0x21C2, (q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B42, (q15_t)0x2284,\n    (q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7B0B, (q15_t)0x2345, (q15_t)0x7AEF,\n    (q15_t)0x23A6, (q15_t)0x7AD3, (q15_t)0x2407, (q15_t)0x7AB6, (q15_t)0x2467,\n    (q15_t)0x7A9A, (q15_t)0x24C7, (q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A5F,\n    (q15_t)0x2588, (q15_t)0x7A42, (q15_t)0x25E8, (q15_t)0x7A24, (q15_t)0x2648,\n    (q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79E7, (q15_t)0x2707, (q15_t)0x79C8,\n    (q15_t)0x2767, (q15_t)0x79A9, (q15_t)0x27C7, (q15_t)0x798A, (q15_t)0x2826,\n    (q15_t)0x796A, (q15_t)0x2886, (q15_t)0x794A, (q15_t)0x28E5, (q15_t)0x792A,\n    (q15_t)0x2944, (q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78E8, (q15_t)0x2A02,\n    (q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x78A6, (q15_t)0x2AC0, (q15_t)0x7884,\n    (q15_t)0x2B1F, (q15_t)0x7862, (q15_t)0x2B7D, (q15_t)0x7840, (q15_t)0x2BDC,\n    (q15_t)0x781D, (q15_t)0x2C3A, (q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77D7,\n    (q15_t)0x2CF7, (q15_t)0x77B4, (q15_t)0x2D55, (q15_t)0x7790, (q15_t)0x2DB3,\n    (q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7747, (q15_t)0x2E6E, (q15_t)0x7723,\n    (q15_t)0x2ECC, (q15_t)0x76FE, (q15_t)0x2F29, (q15_t)0x76D9, (q15_t)0x2F87,\n    (q15_t)0x76B3, (q15_t)0x2FE4, (q15_t)0x768E, (q15_t)0x3041, (q15_t)0x7668,\n    (q15_t)0x309E, (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x761B, (q15_t)0x3158,\n    (q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75CC, (q15_t)0x3211, (q15_t)0x75A5,\n    (q15_t)0x326E, (q15_t)0x757D, (q15_t)0x32CA, (q15_t)0x7555, (q15_t)0x3326,\n    (q15_t)0x752D, (q15_t)0x3382, (q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74DB,\n    (q15_t)0x343A, (q15_t)0x74B2, (q15_t)0x3496, (q15_t)0x7489, (q15_t)0x34F2,\n    (q15_t)0x745F, (q15_t)0x354D, (q15_t)0x7435, (q15_t)0x35A8, (q15_t)0x740B,\n    (q15_t)0x3604, (q15_t)0x73E0, (q15_t)0x365F, (q15_t)0x73B5, (q15_t)0x36BA,\n    (q15_t)0x738A, (q15_t)0x3714, (q15_t)0x735F, (q15_t)0x376F, (q15_t)0x7333,\n    (q15_t)0x37CA, (q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72DB, (q15_t)0x387E,\n    (q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7282, (q15_t)0x3932, (q15_t)0x7255,\n    (q15_t)0x398C, (q15_t)0x7227, (q15_t)0x39E6, (q15_t)0x71FA, (q15_t)0x3A40,\n    (q15_t)0x71CC, (q15_t)0x3A99, (q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x716F,\n    (q15_t)0x3B4C, (q15_t)0x7141, (q15_t)0x3BA5, (q15_t)0x7112, (q15_t)0x3BFD,\n    (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x70B3, (q15_t)0x3CAF, (q15_t)0x7083,\n    (q15_t)0x3D07, (q15_t)0x7053, (q15_t)0x3D60, (q15_t)0x7023, (q15_t)0x3DB8,\n    (q15_t)0x6FF2, (q15_t)0x3E10, (q15_t)0x6FC1, (q15_t)0x3E68, (q15_t)0x6F90,\n    (q15_t)0x3EBF, (q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6F2D, (q15_t)0x3F6E,\n    (q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6EC9, (q15_t)0x401D, (q15_t)0x6E96,\n    (q15_t)0x4073, (q15_t)0x6E63, (q15_t)0x40CA, (q15_t)0x6E30, (q15_t)0x4121,\n    (q15_t)0x6DFD, (q15_t)0x4177, (q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D96,\n    (q15_t)0x4224, (q15_t)0x6D62, (q15_t)0x427A, (q15_t)0x6D2D, (q15_t)0x42D0,\n    (q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6CC4, (q15_t)0x437B, (q15_t)0x6C8F,\n    (q15_t)0x43D0, (q15_t)0x6C59, (q15_t)0x4425, (q15_t)0x6C24, (q15_t)0x447A,\n    (q15_t)0x6BEE, (q15_t)0x44CF, (q15_t)0x6BB8, (q15_t)0x4524, (q15_t)0x6B81,\n    (q15_t)0x4578, (q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6B13, (q15_t)0x4621,\n    (q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6AA5, (q15_t)0x46C9, (q15_t)0x6A6D,\n    (q15_t)0x471C, (q15_t)0x6A35, (q15_t)0x4770, (q15_t)0x69FD, (q15_t)0x47C3,\n    (q15_t)0x69C4, (q15_t)0x4816, (q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6953,\n    (q15_t)0x48BC, (q15_t)0x6919, (q15_t)0x490F, (q15_t)0x68E0, (q15_t)0x4961,\n    (q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x686C, (q15_t)0x4A06, (q15_t)0x6832,\n    (q15_t)0x4A58, (q15_t)0x67F7, (q15_t)0x4AA9, (q15_t)0x67BD, (q15_t)0x4AFB,\n    (q15_t)0x6782, (q15_t)0x4B4C, (q15_t)0x6746, (q15_t)0x4B9E, (q15_t)0x670B,\n    (q15_t)0x4BEF, (q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x6693, (q15_t)0x4C90,\n    (q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x661A, (q15_t)0x4D31, (q15_t)0x65DD,\n    (q15_t)0x4D81, (q15_t)0x65A0, (q15_t)0x4DD1, (q15_t)0x6563, (q15_t)0x4E21,\n    (q15_t)0x6526, (q15_t)0x4E70, (q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x64AA,\n    (q15_t)0x4F0F, (q15_t)0x646C, (q15_t)0x4F5E, (q15_t)0x642D, (q15_t)0x4FAC,\n    (q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x63B0, (q15_t)0x5049, (q15_t)0x6371,\n    (q15_t)0x5097, (q15_t)0x6331, (q15_t)0x50E5, (q15_t)0x62F2, (q15_t)0x5133,\n    (q15_t)0x62B2, (q15_t)0x5181, (q15_t)0x6271, (q15_t)0x51CE, (q15_t)0x6231,\n    (q15_t)0x521C, (q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x61B0, (q15_t)0x52B5,\n    (q15_t)0x616F, (q15_t)0x5302, (q15_t)0x612D, (q15_t)0x534E, (q15_t)0x60EC,\n    (q15_t)0x539B, (q15_t)0x60AA, (q15_t)0x53E7, (q15_t)0x6068, (q15_t)0x5433,\n    (q15_t)0x6026, (q15_t)0x547E, (q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5FA0,\n    (q15_t)0x5515, (q15_t)0x5F5E, (q15_t)0x5560, (q15_t)0x5F1A, (q15_t)0x55AB,\n    (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E93, (q15_t)0x5640, (q15_t)0x5E50,\n    (q15_t)0x568A, (q15_t)0x5E0B, (q15_t)0x56D4, (q15_t)0x5DC7, (q15_t)0x571D,\n    (q15_t)0x5D83, (q15_t)0x5767, (q15_t)0x5D3E, (q15_t)0x57B0, (q15_t)0x5CF9,\n    (q15_t)0x57F9, (q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C6E, (q15_t)0x588B,\n    (q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5BE3, (q15_t)0x591C, (q15_t)0x5B9D,\n    (q15_t)0x5964, (q15_t)0x5B56, (q15_t)0x59AC, (q15_t)0x5B10, (q15_t)0x59F3,\n    (q15_t)0x5AC9, (q15_t)0x5A3B, (q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5A3B,\n    (q15_t)0x5AC9, (q15_t)0x59F3, (q15_t)0x5B10, (q15_t)0x59AC, (q15_t)0x5B56,\n    (q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x591C, (q15_t)0x5BE3, (q15_t)0x58D4,\n    (q15_t)0x5C29, (q15_t)0x588B, (q15_t)0x5C6E, (q15_t)0x5842, (q15_t)0x5CB4,\n    (q15_t)0x57F9, (q15_t)0x5CF9, (q15_t)0x57B0, (q15_t)0x5D3E, (q15_t)0x5767,\n    (q15_t)0x5D83, (q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x56D4, (q15_t)0x5E0B,\n    (q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x5640, (q15_t)0x5E93, (q15_t)0x55F5,\n    (q15_t)0x5ED7, (q15_t)0x55AB, (q15_t)0x5F1A, (q15_t)0x5560, (q15_t)0x5F5E,\n    (q15_t)0x5515, (q15_t)0x5FA0, (q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x547E,\n    (q15_t)0x6026, (q15_t)0x5433, (q15_t)0x6068, (q15_t)0x53E7, (q15_t)0x60AA,\n    (q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x534E, (q15_t)0x612D, (q15_t)0x5302,\n    (q15_t)0x616F, (q15_t)0x52B5, (q15_t)0x61B0, (q15_t)0x5269, (q15_t)0x61F1,\n    (q15_t)0x521C, (q15_t)0x6231, (q15_t)0x51CE, (q15_t)0x6271, (q15_t)0x5181,\n    (q15_t)0x62B2, (q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x50E5, (q15_t)0x6331,\n    (q15_t)0x5097, (q15_t)0x6371, (q15_t)0x5049, (q15_t)0x63B0, (q15_t)0x4FFB,\n    (q15_t)0x63EF, (q15_t)0x4FAC, (q15_t)0x642D, (q15_t)0x4F5E, (q15_t)0x646C,\n    (q15_t)0x4F0F, (q15_t)0x64AA, (q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E70,\n    (q15_t)0x6526, (q15_t)0x4E21, (q15_t)0x6563, (q15_t)0x4DD1, (q15_t)0x65A0,\n    (q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4D31, (q15_t)0x661A, (q15_t)0x4CE1,\n    (q15_t)0x6657, (q15_t)0x4C90, (q15_t)0x6693, (q15_t)0x4C3F, (q15_t)0x66CF,\n    (q15_t)0x4BEF, (q15_t)0x670B, (q15_t)0x4B9E, (q15_t)0x6746, (q15_t)0x4B4C,\n    (q15_t)0x6782, (q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4AA9, (q15_t)0x67F7,\n    (q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x4A06, (q15_t)0x686C, (q15_t)0x49B4,\n    (q15_t)0x68A6, (q15_t)0x4961, (q15_t)0x68E0, (q15_t)0x490F, (q15_t)0x6919,\n    (q15_t)0x48BC, (q15_t)0x6953, (q15_t)0x4869, (q15_t)0x698C, (q15_t)0x4816,\n    (q15_t)0x69C4, (q15_t)0x47C3, (q15_t)0x69FD, (q15_t)0x4770, (q15_t)0x6A35,\n    (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x46C9, (q15_t)0x6AA5, (q15_t)0x4675,\n    (q15_t)0x6ADC, (q15_t)0x4621, (q15_t)0x6B13, (q15_t)0x45CD, (q15_t)0x6B4A,\n    (q15_t)0x4578, (q15_t)0x6B81, (q15_t)0x4524, (q15_t)0x6BB8, (q15_t)0x44CF,\n    (q15_t)0x6BEE, (q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4425, (q15_t)0x6C59,\n    (q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x437B, (q15_t)0x6CC4, (q15_t)0x4325,\n    (q15_t)0x6CF9, (q15_t)0x42D0, (q15_t)0x6D2D, (q15_t)0x427A, (q15_t)0x6D62,\n    (q15_t)0x4224, (q15_t)0x6D96, (q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4177,\n    (q15_t)0x6DFD, (q15_t)0x4121, (q15_t)0x6E30, (q15_t)0x40CA, (q15_t)0x6E63,\n    (q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x401D, (q15_t)0x6EC9, (q15_t)0x3FC5,\n    (q15_t)0x6EFB, (q15_t)0x3F6E, (q15_t)0x6F2D, (q15_t)0x3F17, (q15_t)0x6F5F,\n    (q15_t)0x3EBF, (q15_t)0x6F90, (q15_t)0x3E68, (q15_t)0x6FC1, (q15_t)0x3E10,\n    (q15_t)0x6FF2, (q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D60, (q15_t)0x7053,\n    (q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3CAF, (q15_t)0x70B3, (q15_t)0x3C56,\n    (q15_t)0x70E2, (q15_t)0x3BFD, (q15_t)0x7112, (q15_t)0x3BA5, (q15_t)0x7141,\n    (q15_t)0x3B4C, (q15_t)0x716F, (q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A99,\n    (q15_t)0x71CC, (q15_t)0x3A40, (q15_t)0x71FA, (q15_t)0x39E6, (q15_t)0x7227,\n    (q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3932, (q15_t)0x7282, (q15_t)0x38D8,\n    (q15_t)0x72AF, (q15_t)0x387E, (q15_t)0x72DB, (q15_t)0x3824, (q15_t)0x7307,\n    (q15_t)0x37CA, (q15_t)0x7333, (q15_t)0x376F, (q15_t)0x735F, (q15_t)0x3714,\n    (q15_t)0x738A, (q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x365F, (q15_t)0x73E0,\n    (q15_t)0x3604, (q15_t)0x740B, (q15_t)0x35A8, (q15_t)0x7435, (q15_t)0x354D,\n    (q15_t)0x745F, (q15_t)0x34F2, (q15_t)0x7489, (q15_t)0x3496, (q15_t)0x74B2,\n    (q15_t)0x343A, (q15_t)0x74DB, (q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3382,\n    (q15_t)0x752D, (q15_t)0x3326, (q15_t)0x7555, (q15_t)0x32CA, (q15_t)0x757D,\n    (q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x3211, (q15_t)0x75CC, (q15_t)0x31B5,\n    (q15_t)0x75F4, (q15_t)0x3158, (q15_t)0x761B, (q15_t)0x30FB, (q15_t)0x7641,\n    (q15_t)0x309E, (q15_t)0x7668, (q15_t)0x3041, (q15_t)0x768E, (q15_t)0x2FE4,\n    (q15_t)0x76B3, (q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2F29, (q15_t)0x76FE,\n    (q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E6E, (q15_t)0x7747, (q15_t)0x2E11,\n    (q15_t)0x776C, (q15_t)0x2DB3, (q15_t)0x7790, (q15_t)0x2D55, (q15_t)0x77B4,\n    (q15_t)0x2CF7, (q15_t)0x77D7, (q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2C3A,\n    (q15_t)0x781D, (q15_t)0x2BDC, (q15_t)0x7840, (q15_t)0x2B7D, (q15_t)0x7862,\n    (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2AC0, (q15_t)0x78A6, (q15_t)0x2A61,\n    (q15_t)0x78C7, (q15_t)0x2A02, (q15_t)0x78E8, (q15_t)0x29A3, (q15_t)0x7909,\n    (q15_t)0x2944, (q15_t)0x792A, (q15_t)0x28E5, (q15_t)0x794A, (q15_t)0x2886,\n    (q15_t)0x796A, (q15_t)0x2826, (q15_t)0x798A, (q15_t)0x27C7, (q15_t)0x79A9,\n    (q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x2707, (q15_t)0x79E7, (q15_t)0x26A8,\n    (q15_t)0x7A05, (q15_t)0x2648, (q15_t)0x7A24, (q15_t)0x25E8, (q15_t)0x7A42,\n    (q15_t)0x2588, (q15_t)0x7A5F, (q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x24C7,\n    (q15_t)0x7A9A, (q15_t)0x2467, (q15_t)0x7AB6, (q15_t)0x2407, (q15_t)0x7AD3,\n    (q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2345, (q15_t)0x7B0B, (q15_t)0x22E5,\n    (q15_t)0x7B26, (q15_t)0x2284, (q15_t)0x7B42, (q15_t)0x2223, (q15_t)0x7B5D,\n    (q15_t)0x21C2, (q15_t)0x7B77, (q15_t)0x2161, (q15_t)0x7B92, (q15_t)0x2100,\n    (q15_t)0x7BAC, (q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x203E, (q15_t)0x7BDF,\n    (q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1F7B, (q15_t)0x7C11, (q15_t)0x1F19,\n    (q15_t)0x7C29, (q15_t)0x1EB8, (q15_t)0x7C42, (q15_t)0x1E56, (q15_t)0x7C5A,\n    (q15_t)0x1DF5, (q15_t)0x7C71, (q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1D31,\n    (q15_t)0x7CA0, (q15_t)0x1CCF, (q15_t)0x7CB7, (q15_t)0x1C6D, (q15_t)0x7CCD,\n    (q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1BA9, (q15_t)0x7CF9, (q15_t)0x1B47,\n    (q15_t)0x7D0F, (q15_t)0x1AE4, (q15_t)0x7D24, (q15_t)0x1A82, (q15_t)0x7D39,\n    (q15_t)0x1A20, (q15_t)0x7D4E, (q15_t)0x19BD, (q15_t)0x7D62, (q15_t)0x195B,\n    (q15_t)0x7D76, (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x1896, (q15_t)0x7D9D,\n    (q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x17D0, (q15_t)0x7DC3, (q15_t)0x176D,\n    (q15_t)0x7DD6, (q15_t)0x170A, (q15_t)0x7DE8, (q15_t)0x16A8, (q15_t)0x7DFA,\n    (q15_t)0x1645, (q15_t)0x7E0C, (q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x157F,\n    (q15_t)0x7E2E, (q15_t)0x151B, (q15_t)0x7E3F, (q15_t)0x14B8, (q15_t)0x7E4F,\n    (q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x13F2, (q15_t)0x7E6F, (q15_t)0x138E,\n    (q15_t)0x7E7F, (q15_t)0x132B, (q15_t)0x7E8E, (q15_t)0x12C8, (q15_t)0x7E9D,\n    (q15_t)0x1264, (q15_t)0x7EAB, (q15_t)0x1201, (q15_t)0x7EBA, (q15_t)0x119D,\n    (q15_t)0x7EC8, (q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x10D6, (q15_t)0x7EE3,\n    (q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x100E, (q15_t)0x7EFD, (q15_t)0x0FAB,\n    (q15_t)0x7F09, (q15_t)0x0F47, (q15_t)0x7F15, (q15_t)0x0EE3, (q15_t)0x7F21,\n    (q15_t)0x0E7F, (q15_t)0x7F2D, (q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0DB7,\n    (q15_t)0x7F43, (q15_t)0x0D53, (q15_t)0x7F4D, (q15_t)0x0CEF, (q15_t)0x7F58,\n    (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0C27, (q15_t)0x7F6B, (q15_t)0x0BC3,\n    (q15_t)0x7F75, (q15_t)0x0B5F, (q15_t)0x7F7E, (q15_t)0x0AFB, (q15_t)0x7F87,\n    (q15_t)0x0A97, (q15_t)0x7F8F, (q15_t)0x0A33, (q15_t)0x7F97, (q15_t)0x09CE,\n    (q15_t)0x7F9F, (q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0906, (q15_t)0x7FAE,\n    (q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x083D, (q15_t)0x7FBC, (q15_t)0x07D9,\n    (q15_t)0x7FC2, (q15_t)0x0775, (q15_t)0x7FC8, (q15_t)0x0710, (q15_t)0x7FCE,\n    (q15_t)0x06AC, (q15_t)0x7FD3, (q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x05E3,\n    (q15_t)0x7FDD, (q15_t)0x057F, (q15_t)0x7FE1, (q15_t)0x051A, (q15_t)0x7FE5,\n    (q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0451, (q15_t)0x7FED, (q15_t)0x03ED,\n    (q15_t)0x7FF0, (q15_t)0x0388, (q15_t)0x7FF3, (q15_t)0x0324, (q15_t)0x7FF6,\n    (q15_t)0x02BF, (q15_t)0x7FF8, (q15_t)0x025B, (q15_t)0x7FFA, (q15_t)0x01F6,\n    (q15_t)0x7FFC, (q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x012D, (q15_t)0x7FFE,\n    (q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0000,\n    (q15_t)0x7FFF, (q15_t)0xFF9B, (q15_t)0x7FFF, (q15_t)0xFF36, (q15_t)0x7FFF,\n    (q15_t)0xFED2, (q15_t)0x7FFE, (q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFE09,\n    (q15_t)0x7FFC, (q15_t)0xFDA4, (q15_t)0x7FFA, (q15_t)0xFD40, (q15_t)0x7FF8,\n    (q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC77, (q15_t)0x7FF3, (q15_t)0xFC12,\n    (q15_t)0x7FF0, (q15_t)0xFBAE, (q15_t)0x7FED, (q15_t)0xFB49, (q15_t)0x7FE9,\n    (q15_t)0xFAE5, (q15_t)0x7FE5, (q15_t)0xFA80, (q15_t)0x7FE1, (q15_t)0xFA1C,\n    (q15_t)0x7FDD, (q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF953, (q15_t)0x7FD3,\n    (q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF88A, (q15_t)0x7FC8, (q15_t)0xF826,\n    (q15_t)0x7FC2, (q15_t)0xF7C2, (q15_t)0x7FBC, (q15_t)0xF75D, (q15_t)0x7FB5,\n    (q15_t)0xF6F9, (q15_t)0x7FAE, (q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF631,\n    (q15_t)0x7F9F, (q15_t)0xF5CC, (q15_t)0x7F97, (q15_t)0xF568, (q15_t)0x7F8F,\n    (q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF4A0, (q15_t)0x7F7E, (q15_t)0xF43C,\n    (q15_t)0x7F75, (q15_t)0xF3D8, (q15_t)0x7F6B, (q15_t)0xF374, (q15_t)0x7F62,\n    (q15_t)0xF310, (q15_t)0x7F58, (q15_t)0xF2AC, (q15_t)0x7F4D, (q15_t)0xF248,\n    (q15_t)0x7F43, (q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF180, (q15_t)0x7F2D,\n    (q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF0B8, (q15_t)0x7F15, (q15_t)0xF054,\n    (q15_t)0x7F09, (q15_t)0xEFF1, (q15_t)0x7EFD, (q15_t)0xEF8D, (q15_t)0x7EF0,\n    (q15_t)0xEF29, (q15_t)0x7EE3, (q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEE62,\n    (q15_t)0x7EC8, (q15_t)0xEDFE, (q15_t)0x7EBA, (q15_t)0xED9B, (q15_t)0x7EAB,\n    (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xECD4, (q15_t)0x7E8E, (q15_t)0xEC71,\n    (q15_t)0x7E7F, (q15_t)0xEC0D, (q15_t)0x7E6F, (q15_t)0xEBAA, (q15_t)0x7E5F,\n    (q15_t)0xEB47, (q15_t)0x7E4F, (q15_t)0xEAE4, (q15_t)0x7E3F, (q15_t)0xEA80,\n    (q15_t)0x7E2E, (q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE9BA, (q15_t)0x7E0C,\n    (q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE8F5, (q15_t)0x7DE8, (q15_t)0xE892,\n    (q15_t)0x7DD6, (q15_t)0xE82F, (q15_t)0x7DC3, (q15_t)0xE7CC, (q15_t)0x7DB0,\n    (q15_t)0xE769, (q15_t)0x7D9D, (q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE6A4,\n    (q15_t)0x7D76, (q15_t)0xE642, (q15_t)0x7D62, (q15_t)0xE5DF, (q15_t)0x7D4E,\n    (q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE51B, (q15_t)0x7D24, (q15_t)0xE4B8,\n    (q15_t)0x7D0F, (q15_t)0xE456, (q15_t)0x7CF9, (q15_t)0xE3F4, (q15_t)0x7CE3,\n    (q15_t)0xE392, (q15_t)0x7CCD, (q15_t)0xE330, (q15_t)0x7CB7, (q15_t)0xE2CE,\n    (q15_t)0x7CA0, (q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE20A, (q15_t)0x7C71,\n    (q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE147, (q15_t)0x7C42, (q15_t)0xE0E6,\n    (q15_t)0x7C29, (q15_t)0xE084, (q15_t)0x7C11, (q15_t)0xE023, (q15_t)0x7BF8,\n    (q15_t)0xDFC1, (q15_t)0x7BDF, (q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDEFF,\n    (q15_t)0x7BAC, (q15_t)0xDE9E, (q15_t)0x7B92, (q15_t)0xDE3D, (q15_t)0x7B77,\n    (q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD7B, (q15_t)0x7B42, (q15_t)0xDD1A,\n    (q15_t)0x7B26, (q15_t)0xDCBA, (q15_t)0x7B0B, (q15_t)0xDC59, (q15_t)0x7AEF,\n    (q15_t)0xDBF8, (q15_t)0x7AD3, (q15_t)0xDB98, (q15_t)0x7AB6, (q15_t)0xDB38,\n    (q15_t)0x7A9A, (q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDA77, (q15_t)0x7A5F,\n    (q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD9B7, (q15_t)0x7A24, (q15_t)0xD957,\n    (q15_t)0x7A05, (q15_t)0xD8F8, (q15_t)0x79E7, (q15_t)0xD898, (q15_t)0x79C8,\n    (q15_t)0xD838, (q15_t)0x79A9, (q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD779,\n    (q15_t)0x796A, (q15_t)0xD71A, (q15_t)0x794A, (q15_t)0xD6BB, (q15_t)0x792A,\n    (q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD5FD, (q15_t)0x78E8, (q15_t)0xD59E,\n    (q15_t)0x78C7, (q15_t)0xD53F, (q15_t)0x78A6, (q15_t)0xD4E0, (q15_t)0x7884,\n    (q15_t)0xD482, (q15_t)0x7862, (q15_t)0xD423, (q15_t)0x7840, (q15_t)0xD3C5,\n    (q15_t)0x781D, (q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD308, (q15_t)0x77D7,\n    (q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD24C, (q15_t)0x7790, (q15_t)0xD1EE,\n    (q15_t)0x776C, (q15_t)0xD191, (q15_t)0x7747, (q15_t)0xD133, (q15_t)0x7723,\n    (q15_t)0xD0D6, (q15_t)0x76FE, (q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xD01B,\n    (q15_t)0x76B3, (q15_t)0xCFBE, (q15_t)0x768E, (q15_t)0xCF61, (q15_t)0x7668,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCEA7, (q15_t)0x761B, (q15_t)0xCE4A,\n    (q15_t)0x75F4, (q15_t)0xCDEE, (q15_t)0x75CC, (q15_t)0xCD91, (q15_t)0x75A5,\n    (q15_t)0xCD35, (q15_t)0x757D, (q15_t)0xCCD9, (q15_t)0x7555, (q15_t)0xCC7D,\n    (q15_t)0x752D, (q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCBC5, (q15_t)0x74DB,\n    (q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCB0D, (q15_t)0x7489, (q15_t)0xCAB2,\n    (q15_t)0x745F, (q15_t)0xCA57, (q15_t)0x7435, (q15_t)0xC9FB, (q15_t)0x740B,\n    (q15_t)0xC9A0, (q15_t)0x73E0, (q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC8EB,\n    (q15_t)0x738A, (q15_t)0xC890, (q15_t)0x735F, (q15_t)0xC835, (q15_t)0x7333,\n    (q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC781, (q15_t)0x72DB, (q15_t)0xC727,\n    (q15_t)0x72AF, (q15_t)0xC6CD, (q15_t)0x7282, (q15_t)0xC673, (q15_t)0x7255,\n    (q15_t)0xC619, (q15_t)0x7227, (q15_t)0xC5BF, (q15_t)0x71FA, (q15_t)0xC566,\n    (q15_t)0x71CC, (q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC4B3, (q15_t)0x716F,\n    (q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC402, (q15_t)0x7112, (q15_t)0xC3A9,\n    (q15_t)0x70E2, (q15_t)0xC350, (q15_t)0x70B3, (q15_t)0xC2F8, (q15_t)0x7083,\n    (q15_t)0xC29F, (q15_t)0x7053, (q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC1EF,\n    (q15_t)0x6FF2, (q15_t)0xC197, (q15_t)0x6FC1, (q15_t)0xC140, (q15_t)0x6F90,\n    (q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC091, (q15_t)0x6F2D, (q15_t)0xC03A,\n    (q15_t)0x6EFB, (q15_t)0xBFE2, (q15_t)0x6EC9, (q15_t)0xBF8C, (q15_t)0x6E96,\n    (q15_t)0xBF35, (q15_t)0x6E63, (q15_t)0xBEDE, (q15_t)0x6E30, (q15_t)0xBE88,\n    (q15_t)0x6DFD, (q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBDDB, (q15_t)0x6D96,\n    (q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBD2F, (q15_t)0x6D2D, (q15_t)0xBCDA,\n    (q15_t)0x6CF9, (q15_t)0xBC84, (q15_t)0x6CC4, (q15_t)0xBC2F, (q15_t)0x6C8F,\n    (q15_t)0xBBDA, (q15_t)0x6C59, (q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBB30,\n    (q15_t)0x6BEE, (q15_t)0xBADB, (q15_t)0x6BB8, (q15_t)0xBA87, (q15_t)0x6B81,\n    (q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB9DE, (q15_t)0x6B13, (q15_t)0xB98A,\n    (q15_t)0x6ADC, (q15_t)0xB936, (q15_t)0x6AA5, (q15_t)0xB8E3, (q15_t)0x6A6D,\n    (q15_t)0xB88F, (q15_t)0x6A35, (q15_t)0xB83C, (q15_t)0x69FD, (q15_t)0xB7E9,\n    (q15_t)0x69C4, (q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB743, (q15_t)0x6953,\n    (q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB69E, (q15_t)0x68E0, (q15_t)0xB64B,\n    (q15_t)0x68A6, (q15_t)0xB5F9, (q15_t)0x686C, (q15_t)0xB5A7, (q15_t)0x6832,\n    (q15_t)0xB556, (q15_t)0x67F7, (q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB4B3,\n    (q15_t)0x6782, (q15_t)0xB461, (q15_t)0x6746, (q15_t)0xB410, (q15_t)0x670B,\n    (q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB36F, (q15_t)0x6693, (q15_t)0xB31E,\n    (q15_t)0x6657, (q15_t)0xB2CE, (q15_t)0x661A, (q15_t)0xB27E, (q15_t)0x65DD,\n    (q15_t)0xB22E, (q15_t)0x65A0, (q15_t)0xB1DE, (q15_t)0x6563, (q15_t)0xB18F,\n    (q15_t)0x6526, (q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB0F0, (q15_t)0x64AA,\n    (q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB053, (q15_t)0x642D, (q15_t)0xB004,\n    (q15_t)0x63EF, (q15_t)0xAFB6, (q15_t)0x63B0, (q15_t)0xAF68, (q15_t)0x6371,\n    (q15_t)0xAF1A, (q15_t)0x6331, (q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAE7E,\n    (q15_t)0x62B2, (q15_t)0xAE31, (q15_t)0x6271, (q15_t)0xADE3, (q15_t)0x6231,\n    (q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAD4A, (q15_t)0x61B0, (q15_t)0xACFD,\n    (q15_t)0x616F, (q15_t)0xACB1, (q15_t)0x612D, (q15_t)0xAC64, (q15_t)0x60EC,\n    (q15_t)0xAC18, (q15_t)0x60AA, (q15_t)0xABCC, (q15_t)0x6068, (q15_t)0xAB81,\n    (q15_t)0x6026, (q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAAEA, (q15_t)0x5FA0,\n    (q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA54, (q15_t)0x5F1A, (q15_t)0xAA0A,\n    (q15_t)0x5ED7, (q15_t)0xA9BF, (q15_t)0x5E93, (q15_t)0xA975, (q15_t)0x5E50,\n    (q15_t)0xA92B, (q15_t)0x5E0B, (q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA898,\n    (q15_t)0x5D83, (q15_t)0xA84F, (q15_t)0x5D3E, (q15_t)0xA806, (q15_t)0x5CF9,\n    (q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA774, (q15_t)0x5C6E, (q15_t)0xA72B,\n    (q15_t)0x5C29, (q15_t)0xA6E3, (q15_t)0x5BE3, (q15_t)0xA69B, (q15_t)0x5B9D,\n    (q15_t)0xA653, (q15_t)0x5B56, (q15_t)0xA60C, (q15_t)0x5B10, (q15_t)0xA5C4,\n    (q15_t)0x5AC9, (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA536, (q15_t)0x5A3B,\n    (q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA4A9, (q15_t)0x59AC, (q15_t)0xA462,\n    (q15_t)0x5964, (q15_t)0xA41C, (q15_t)0x591C, (q15_t)0xA3D6, (q15_t)0x58D4,\n    (q15_t)0xA391, (q15_t)0x588B, (q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA306,\n    (q15_t)0x57F9, (q15_t)0xA2C1, (q15_t)0x57B0, (q15_t)0xA27C, (q15_t)0x5767,\n    (q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA1F4, (q15_t)0x56D4, (q15_t)0xA1AF,\n    (q15_t)0x568A, (q15_t)0xA16C, (q15_t)0x5640, (q15_t)0xA128, (q15_t)0x55F5,\n    (q15_t)0xA0E5, (q15_t)0x55AB, (q15_t)0xA0A1, (q15_t)0x5560, (q15_t)0xA05F,\n    (q15_t)0x5515, (q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9FD9, (q15_t)0x547E,\n    (q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F55, (q15_t)0x53E7, (q15_t)0x9F13,\n    (q15_t)0x539B, (q15_t)0x9ED2, (q15_t)0x534E, (q15_t)0x9E90, (q15_t)0x5302,\n    (q15_t)0x9E4F, (q15_t)0x52B5, (q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9DCE,\n    (q15_t)0x521C, (q15_t)0x9D8E, (q15_t)0x51CE, (q15_t)0x9D4D, (q15_t)0x5181,\n    (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9CCE, (q15_t)0x50E5, (q15_t)0x9C8E,\n    (q15_t)0x5097, (q15_t)0x9C4F, (q15_t)0x5049, (q15_t)0x9C10, (q15_t)0x4FFB,\n    (q15_t)0x9BD2, (q15_t)0x4FAC, (q15_t)0x9B93, (q15_t)0x4F5E, (q15_t)0x9B55,\n    (q15_t)0x4F0F, (q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9AD9, (q15_t)0x4E70,\n    (q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A5F, (q15_t)0x4DD1, (q15_t)0x9A22,\n    (q15_t)0x4D81, (q15_t)0x99E5, (q15_t)0x4D31, (q15_t)0x99A8, (q15_t)0x4CE1,\n    (q15_t)0x996C, (q15_t)0x4C90, (q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x98F4,\n    (q15_t)0x4BEF, (q15_t)0x98B9, (q15_t)0x4B9E, (q15_t)0x987D, (q15_t)0x4B4C,\n    (q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9808, (q15_t)0x4AA9, (q15_t)0x97CD,\n    (q15_t)0x4A58, (q15_t)0x9793, (q15_t)0x4A06, (q15_t)0x9759, (q15_t)0x49B4,\n    (q15_t)0x971F, (q15_t)0x4961, (q15_t)0x96E6, (q15_t)0x490F, (q15_t)0x96AC,\n    (q15_t)0x48BC, (q15_t)0x9673, (q15_t)0x4869, (q15_t)0x963B, (q15_t)0x4816,\n    (q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x95CA, (q15_t)0x4770, (q15_t)0x9592,\n    (q15_t)0x471C, (q15_t)0x955A, (q15_t)0x46C9, (q15_t)0x9523, (q15_t)0x4675,\n    (q15_t)0x94EC, (q15_t)0x4621, (q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x947E,\n    (q15_t)0x4578, (q15_t)0x9447, (q15_t)0x4524, (q15_t)0x9411, (q15_t)0x44CF,\n    (q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x93A6, (q15_t)0x4425, (q15_t)0x9370,\n    (q15_t)0x43D0, (q15_t)0x933B, (q15_t)0x437B, (q15_t)0x9306, (q15_t)0x4325,\n    (q15_t)0x92D2, (q15_t)0x42D0, (q15_t)0x929D, (q15_t)0x427A, (q15_t)0x9269,\n    (q15_t)0x4224, (q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x9202, (q15_t)0x4177,\n    (q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x919C, (q15_t)0x40CA, (q15_t)0x9169,\n    (q15_t)0x4073, (q15_t)0x9136, (q15_t)0x401D, (q15_t)0x9104, (q15_t)0x3FC5,\n    (q15_t)0x90D2, (q15_t)0x3F6E, (q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x906F,\n    (q15_t)0x3EBF, (q15_t)0x903E, (q15_t)0x3E68, (q15_t)0x900D, (q15_t)0x3E10,\n    (q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8FAC, (q15_t)0x3D60, (q15_t)0x8F7C,\n    (q15_t)0x3D07, (q15_t)0x8F4C, (q15_t)0x3CAF, (q15_t)0x8F1D, (q15_t)0x3C56,\n    (q15_t)0x8EED, (q15_t)0x3BFD, (q15_t)0x8EBE, (q15_t)0x3BA5, (q15_t)0x8E90,\n    (q15_t)0x3B4C, (q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E33, (q15_t)0x3A99,\n    (q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DD8, (q15_t)0x39E6, (q15_t)0x8DAA,\n    (q15_t)0x398C, (q15_t)0x8D7D, (q15_t)0x3932, (q15_t)0x8D50, (q15_t)0x38D8,\n    (q15_t)0x8D24, (q15_t)0x387E, (q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CCC,\n    (q15_t)0x37CA, (q15_t)0x8CA0, (q15_t)0x376F, (q15_t)0x8C75, (q15_t)0x3714,\n    (q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8C1F, (q15_t)0x365F, (q15_t)0x8BF4,\n    (q15_t)0x3604, (q15_t)0x8BCA, (q15_t)0x35A8, (q15_t)0x8BA0, (q15_t)0x354D,\n    (q15_t)0x8B76, (q15_t)0x34F2, (q15_t)0x8B4D, (q15_t)0x3496, (q15_t)0x8B24,\n    (q15_t)0x343A, (q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AD2, (q15_t)0x3382,\n    (q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A82, (q15_t)0x32CA, (q15_t)0x8A5A,\n    (q15_t)0x326E, (q15_t)0x8A33, (q15_t)0x3211, (q15_t)0x8A0B, (q15_t)0x31B5,\n    (q15_t)0x89E4, (q15_t)0x3158, (q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8997,\n    (q15_t)0x309E, (q15_t)0x8971, (q15_t)0x3041, (q15_t)0x894C, (q15_t)0x2FE4,\n    (q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8901, (q15_t)0x2F29, (q15_t)0x88DC,\n    (q15_t)0x2ECC, (q15_t)0x88B8, (q15_t)0x2E6E, (q15_t)0x8893, (q15_t)0x2E11,\n    (q15_t)0x886F, (q15_t)0x2DB3, (q15_t)0x884B, (q15_t)0x2D55, (q15_t)0x8828,\n    (q15_t)0x2CF7, (q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87E2, (q15_t)0x2C3A,\n    (q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x879D, (q15_t)0x2B7D, (q15_t)0x877B,\n    (q15_t)0x2B1F, (q15_t)0x8759, (q15_t)0x2AC0, (q15_t)0x8738, (q15_t)0x2A61,\n    (q15_t)0x8717, (q15_t)0x2A02, (q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86D5,\n    (q15_t)0x2944, (q15_t)0x86B5, (q15_t)0x28E5, (q15_t)0x8695, (q15_t)0x2886,\n    (q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8656, (q15_t)0x27C7, (q15_t)0x8637,\n    (q15_t)0x2767, (q15_t)0x8618, (q15_t)0x2707, (q15_t)0x85FA, (q15_t)0x26A8,\n    (q15_t)0x85DB, (q15_t)0x2648, (q15_t)0x85BD, (q15_t)0x25E8, (q15_t)0x85A0,\n    (q15_t)0x2588, (q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8565, (q15_t)0x24C7,\n    (q15_t)0x8549, (q15_t)0x2467, (q15_t)0x852C, (q15_t)0x2407, (q15_t)0x8510,\n    (q15_t)0x23A6, (q15_t)0x84F4, (q15_t)0x2345, (q15_t)0x84D9, (q15_t)0x22E5,\n    (q15_t)0x84BD, (q15_t)0x2284, (q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x8488,\n    (q15_t)0x21C2, (q15_t)0x846D, (q15_t)0x2161, (q15_t)0x8453, (q15_t)0x2100,\n    (q15_t)0x843A, (q15_t)0x209F, (q15_t)0x8420, (q15_t)0x203E, (q15_t)0x8407,\n    (q15_t)0x1FDC, (q15_t)0x83EE, (q15_t)0x1F7B, (q15_t)0x83D6, (q15_t)0x1F19,\n    (q15_t)0x83BD, (q15_t)0x1EB8, (q15_t)0x83A5, (q15_t)0x1E56, (q15_t)0x838E,\n    (q15_t)0x1DF5, (q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x835F, (q15_t)0x1D31,\n    (q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x8332, (q15_t)0x1C6D, (q15_t)0x831C,\n    (q15_t)0x1C0B, (q15_t)0x8306, (q15_t)0x1BA9, (q15_t)0x82F0, (q15_t)0x1B47,\n    (q15_t)0x82DB, (q15_t)0x1AE4, (q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x82B1,\n    (q15_t)0x1A20, (q15_t)0x829D, (q15_t)0x19BD, (q15_t)0x8289, (q15_t)0x195B,\n    (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8262, (q15_t)0x1896, (q15_t)0x824F,\n    (q15_t)0x1833, (q15_t)0x823C, (q15_t)0x17D0, (q15_t)0x8229, (q15_t)0x176D,\n    (q15_t)0x8217, (q15_t)0x170A, (q15_t)0x8205, (q15_t)0x16A8, (q15_t)0x81F3,\n    (q15_t)0x1645, (q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81D1, (q15_t)0x157F,\n    (q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81B0, (q15_t)0x14B8, (q15_t)0x81A0,\n    (q15_t)0x1455, (q15_t)0x8190, (q15_t)0x13F2, (q15_t)0x8180, (q15_t)0x138E,\n    (q15_t)0x8171, (q15_t)0x132B, (q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x8154,\n    (q15_t)0x1264, (q15_t)0x8145, (q15_t)0x1201, (q15_t)0x8137, (q15_t)0x119D,\n    (q15_t)0x812A, (q15_t)0x1139, (q15_t)0x811C, (q15_t)0x10D6, (q15_t)0x810F,\n    (q15_t)0x1072, (q15_t)0x8102, (q15_t)0x100E, (q15_t)0x80F6, (q15_t)0x0FAB,\n    (q15_t)0x80EA, (q15_t)0x0F47, (q15_t)0x80DE, (q15_t)0x0EE3, (q15_t)0x80D2,\n    (q15_t)0x0E7F, (q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80BC, (q15_t)0x0DB7,\n    (q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x80A7, (q15_t)0x0CEF, (q15_t)0x809D,\n    (q15_t)0x0C8B, (q15_t)0x8094, (q15_t)0x0C27, (q15_t)0x808A, (q15_t)0x0BC3,\n    (q15_t)0x8081, (q15_t)0x0B5F, (q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8070,\n    (q15_t)0x0A97, (q15_t)0x8068, (q15_t)0x0A33, (q15_t)0x8060, (q15_t)0x09CE,\n    (q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8051, (q15_t)0x0906, (q15_t)0x804A,\n    (q15_t)0x08A2, (q15_t)0x8043, (q15_t)0x083D, (q15_t)0x803D, (q15_t)0x07D9,\n    (q15_t)0x8037, (q15_t)0x0775, (q15_t)0x8031, (q15_t)0x0710, (q15_t)0x802C,\n    (q15_t)0x06AC, (q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8022, (q15_t)0x05E3,\n    (q15_t)0x801E, (q15_t)0x057F, (q15_t)0x801A, (q15_t)0x051A, (q15_t)0x8016,\n    (q15_t)0x04B6, (q15_t)0x8012, (q15_t)0x0451, (q15_t)0x800F, (q15_t)0x03ED,\n    (q15_t)0x800C, (q15_t)0x0388, (q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8007,\n    (q15_t)0x02BF, (q15_t)0x8005, (q15_t)0x025B, (q15_t)0x8003, (q15_t)0x01F6,\n    (q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8001, (q15_t)0x012D, (q15_t)0x8000,\n    (q15_t)0x00C9, (q15_t)0x8000, (q15_t)0x0064, (q15_t)0x8000, (q15_t)0x0000,\n    (q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8001,\n    (q15_t)0xFED2, (q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8003, (q15_t)0xFE09,\n    (q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8007, (q15_t)0xFD40, (q15_t)0x8009,\n    (q15_t)0xFCDB, (q15_t)0x800C, (q15_t)0xFC77, (q15_t)0x800F, (q15_t)0xFC12,\n    (q15_t)0x8012, (q15_t)0xFBAE, (q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x801A,\n    (q15_t)0xFAE5, (q15_t)0x801E, (q15_t)0xFA80, (q15_t)0x8022, (q15_t)0xFA1C,\n    (q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x802C, (q15_t)0xF953, (q15_t)0x8031,\n    (q15_t)0xF8EF, (q15_t)0x8037, (q15_t)0xF88A, (q15_t)0x803D, (q15_t)0xF826,\n    (q15_t)0x8043, (q15_t)0xF7C2, (q15_t)0x804A, (q15_t)0xF75D, (q15_t)0x8051,\n    (q15_t)0xF6F9, (q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8060, (q15_t)0xF631,\n    (q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x8070, (q15_t)0xF568, (q15_t)0x8078,\n    (q15_t)0xF504, (q15_t)0x8081, (q15_t)0xF4A0, (q15_t)0x808A, (q15_t)0xF43C,\n    (q15_t)0x8094, (q15_t)0xF3D8, (q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80A7,\n    (q15_t)0xF310, (q15_t)0x80B2, (q15_t)0xF2AC, (q15_t)0x80BC, (q15_t)0xF248,\n    (q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80D2, (q15_t)0xF180, (q15_t)0x80DE,\n    (q15_t)0xF11C, (q15_t)0x80EA, (q15_t)0xF0B8, (q15_t)0x80F6, (q15_t)0xF054,\n    (q15_t)0x8102, (q15_t)0xEFF1, (q15_t)0x810F, (q15_t)0xEF8D, (q15_t)0x811C,\n    (q15_t)0xEF29, (q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8137, (q15_t)0xEE62,\n    (q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x8154, (q15_t)0xED9B, (q15_t)0x8162,\n    (q15_t)0xED37, (q15_t)0x8171, (q15_t)0xECD4, (q15_t)0x8180, (q15_t)0xEC71,\n    (q15_t)0x8190, (q15_t)0xEC0D, (q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81B0,\n    (q15_t)0xEB47, (q15_t)0x81C0, (q15_t)0xEAE4, (q15_t)0x81D1, (q15_t)0xEA80,\n    (q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x81F3, (q15_t)0xE9BA, (q15_t)0x8205,\n    (q15_t)0xE957, (q15_t)0x8217, (q15_t)0xE8F5, (q15_t)0x8229, (q15_t)0xE892,\n    (q15_t)0x823C, (q15_t)0xE82F, (q15_t)0x824F, (q15_t)0xE7CC, (q15_t)0x8262,\n    (q15_t)0xE769, (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x8289, (q15_t)0xE6A4,\n    (q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82B1, (q15_t)0xE5DF, (q15_t)0x82C6,\n    (q15_t)0xE57D, (q15_t)0x82DB, (q15_t)0xE51B, (q15_t)0x82F0, (q15_t)0xE4B8,\n    (q15_t)0x8306, (q15_t)0xE456, (q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8332,\n    (q15_t)0xE392, (q15_t)0x8348, (q15_t)0xE330, (q15_t)0x835F, (q15_t)0xE2CE,\n    (q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x838E, (q15_t)0xE20A, (q15_t)0x83A5,\n    (q15_t)0xE1A9, (q15_t)0x83BD, (q15_t)0xE147, (q15_t)0x83D6, (q15_t)0xE0E6,\n    (q15_t)0x83EE, (q15_t)0xE084, (q15_t)0x8407, (q15_t)0xE023, (q15_t)0x8420,\n    (q15_t)0xDFC1, (q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x8453, (q15_t)0xDEFF,\n    (q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x8488, (q15_t)0xDE3D, (q15_t)0x84A2,\n    (q15_t)0xDDDC, (q15_t)0x84BD, (q15_t)0xDD7B, (q15_t)0x84D9, (q15_t)0xDD1A,\n    (q15_t)0x84F4, (q15_t)0xDCBA, (q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x852C,\n    (q15_t)0xDBF8, (q15_t)0x8549, (q15_t)0xDB98, (q15_t)0x8565, (q15_t)0xDB38,\n    (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85A0, (q15_t)0xDA77, (q15_t)0x85BD,\n    (q15_t)0xDA17, (q15_t)0x85DB, (q15_t)0xD9B7, (q15_t)0x85FA, (q15_t)0xD957,\n    (q15_t)0x8618, (q15_t)0xD8F8, (q15_t)0x8637, (q15_t)0xD898, (q15_t)0x8656,\n    (q15_t)0xD838, (q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x8695, (q15_t)0xD779,\n    (q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86D5, (q15_t)0xD6BB, (q15_t)0x86F6,\n    (q15_t)0xD65C, (q15_t)0x8717, (q15_t)0xD5FD, (q15_t)0x8738, (q15_t)0xD59E,\n    (q15_t)0x8759, (q15_t)0xD53F, (q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x879D,\n    (q15_t)0xD482, (q15_t)0x87BF, (q15_t)0xD423, (q15_t)0x87E2, (q15_t)0xD3C5,\n    (q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8828, (q15_t)0xD308, (q15_t)0x884B,\n    (q15_t)0xD2AA, (q15_t)0x886F, (q15_t)0xD24C, (q15_t)0x8893, (q15_t)0xD1EE,\n    (q15_t)0x88B8, (q15_t)0xD191, (q15_t)0x88DC, (q15_t)0xD133, (q15_t)0x8901,\n    (q15_t)0xD0D6, (q15_t)0x8926, (q15_t)0xD078, (q15_t)0x894C, (q15_t)0xD01B,\n    (q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x8997, (q15_t)0xCF61, (q15_t)0x89BE,\n    (q15_t)0xCF04, (q15_t)0x89E4, (q15_t)0xCEA7, (q15_t)0x8A0B, (q15_t)0xCE4A,\n    (q15_t)0x8A33, (q15_t)0xCDEE, (q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8A82,\n    (q15_t)0xCD35, (q15_t)0x8AAA, (q15_t)0xCCD9, (q15_t)0x8AD2, (q15_t)0xCC7D,\n    (q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B24, (q15_t)0xCBC5, (q15_t)0x8B4D,\n    (q15_t)0xCB69, (q15_t)0x8B76, (q15_t)0xCB0D, (q15_t)0x8BA0, (q15_t)0xCAB2,\n    (q15_t)0x8BCA, (q15_t)0xCA57, (q15_t)0x8BF4, (q15_t)0xC9FB, (q15_t)0x8C1F,\n    (q15_t)0xC9A0, (q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8C75, (q15_t)0xC8EB,\n    (q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CCC, (q15_t)0xC835, (q15_t)0x8CF8,\n    (q15_t)0xC7DB, (q15_t)0x8D24, (q15_t)0xC781, (q15_t)0x8D50, (q15_t)0xC727,\n    (q15_t)0x8D7D, (q15_t)0xC6CD, (q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8DD8,\n    (q15_t)0xC619, (q15_t)0x8E05, (q15_t)0xC5BF, (q15_t)0x8E33, (q15_t)0xC566,\n    (q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8E90, (q15_t)0xC4B3, (q15_t)0x8EBE,\n    (q15_t)0xC45A, (q15_t)0x8EED, (q15_t)0xC402, (q15_t)0x8F1D, (q15_t)0xC3A9,\n    (q15_t)0x8F4C, (q15_t)0xC350, (q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8FAC,\n    (q15_t)0xC29F, (q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x900D, (q15_t)0xC1EF,\n    (q15_t)0x903E, (q15_t)0xC197, (q15_t)0x906F, (q15_t)0xC140, (q15_t)0x90A0,\n    (q15_t)0xC0E8, (q15_t)0x90D2, (q15_t)0xC091, (q15_t)0x9104, (q15_t)0xC03A,\n    (q15_t)0x9136, (q15_t)0xBFE2, (q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x919C,\n    (q15_t)0xBF35, (q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x9202, (q15_t)0xBE88,\n    (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9269, (q15_t)0xBDDB, (q15_t)0x929D,\n    (q15_t)0xBD85, (q15_t)0x92D2, (q15_t)0xBD2F, (q15_t)0x9306, (q15_t)0xBCDA,\n    (q15_t)0x933B, (q15_t)0xBC84, (q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x93A6,\n    (q15_t)0xBBDA, (q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9411, (q15_t)0xBB30,\n    (q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x947E, (q15_t)0xBA87, (q15_t)0x94B5,\n    (q15_t)0xBA32, (q15_t)0x94EC, (q15_t)0xB9DE, (q15_t)0x9523, (q15_t)0xB98A,\n    (q15_t)0x955A, (q15_t)0xB936, (q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x95CA,\n    (q15_t)0xB88F, (q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x963B, (q15_t)0xB7E9,\n    (q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96AC, (q15_t)0xB743, (q15_t)0x96E6,\n    (q15_t)0xB6F0, (q15_t)0x971F, (q15_t)0xB69E, (q15_t)0x9759, (q15_t)0xB64B,\n    (q15_t)0x9793, (q15_t)0xB5F9, (q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x9808,\n    (q15_t)0xB556, (q15_t)0x9842, (q15_t)0xB504, (q15_t)0x987D, (q15_t)0xB4B3,\n    (q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98F4, (q15_t)0xB410, (q15_t)0x9930,\n    (q15_t)0xB3C0, (q15_t)0x996C, (q15_t)0xB36F, (q15_t)0x99A8, (q15_t)0xB31E,\n    (q15_t)0x99E5, (q15_t)0xB2CE, (q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A5F,\n    (q15_t)0xB22E, (q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9AD9, (q15_t)0xB18F,\n    (q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B55, (q15_t)0xB0F0, (q15_t)0x9B93,\n    (q15_t)0xB0A1, (q15_t)0x9BD2, (q15_t)0xB053, (q15_t)0x9C10, (q15_t)0xB004,\n    (q15_t)0x9C4F, (q15_t)0xAFB6, (q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9CCE,\n    (q15_t)0xAF1A, (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D4D, (q15_t)0xAE7E,\n    (q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DCE, (q15_t)0xADE3, (q15_t)0x9E0E,\n    (q15_t)0xAD96, (q15_t)0x9E4F, (q15_t)0xAD4A, (q15_t)0x9E90, (q15_t)0xACFD,\n    (q15_t)0x9ED2, (q15_t)0xACB1, (q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F55,\n    (q15_t)0xAC18, (q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FD9, (q15_t)0xAB81,\n    (q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA05F, (q15_t)0xAAEA, (q15_t)0xA0A1,\n    (q15_t)0xAA9F, (q15_t)0xA0E5, (q15_t)0xAA54, (q15_t)0xA128, (q15_t)0xAA0A,\n    (q15_t)0xA16C, (q15_t)0xA9BF, (q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA1F4,\n    (q15_t)0xA92B, (q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA27C, (q15_t)0xA898,\n    (q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA306, (q15_t)0xA806, (q15_t)0xA34B,\n    (q15_t)0xA7BD, (q15_t)0xA391, (q15_t)0xA774, (q15_t)0xA3D6, (q15_t)0xA72B,\n    (q15_t)0xA41C, (q15_t)0xA6E3, (q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4A9,\n    (q15_t)0xA653, (q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA536, (q15_t)0xA5C4,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5C4, (q15_t)0xA536, (q15_t)0xA60C,\n    (q15_t)0xA4EF, (q15_t)0xA653, (q15_t)0xA4A9, (q15_t)0xA69B, (q15_t)0xA462,\n    (q15_t)0xA6E3, (q15_t)0xA41C, (q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA774,\n    (q15_t)0xA391, (q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA806, (q15_t)0xA306,\n    (q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA898, (q15_t)0xA27C, (q15_t)0xA8E2,\n    (q15_t)0xA238, (q15_t)0xA92B, (q15_t)0xA1F4, (q15_t)0xA975, (q15_t)0xA1AF,\n    (q15_t)0xA9BF, (q15_t)0xA16C, (q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA54,\n    (q15_t)0xA0E5, (q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAEA, (q15_t)0xA05F,\n    (q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB81, (q15_t)0x9FD9, (q15_t)0xABCC,\n    (q15_t)0x9F97, (q15_t)0xAC18, (q15_t)0x9F55, (q15_t)0xAC64, (q15_t)0x9F13,\n    (q15_t)0xACB1, (q15_t)0x9ED2, (q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD4A,\n    (q15_t)0x9E4F, (q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADE3, (q15_t)0x9DCE,\n    (q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE7E, (q15_t)0x9D4D, (q15_t)0xAECC,\n    (q15_t)0x9D0D, (q15_t)0xAF1A, (q15_t)0x9CCE, (q15_t)0xAF68, (q15_t)0x9C8E,\n    (q15_t)0xAFB6, (q15_t)0x9C4F, (q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB053,\n    (q15_t)0x9BD2, (q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0F0, (q15_t)0x9B55,\n    (q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB18F, (q15_t)0x9AD9, (q15_t)0xB1DE,\n    (q15_t)0x9A9C, (q15_t)0xB22E, (q15_t)0x9A5F, (q15_t)0xB27E, (q15_t)0x9A22,\n    (q15_t)0xB2CE, (q15_t)0x99E5, (q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB36F,\n    (q15_t)0x996C, (q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB410, (q15_t)0x98F4,\n    (q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB4B3, (q15_t)0x987D, (q15_t)0xB504,\n    (q15_t)0x9842, (q15_t)0xB556, (q15_t)0x9808, (q15_t)0xB5A7, (q15_t)0x97CD,\n    (q15_t)0xB5F9, (q15_t)0x9793, (q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB69E,\n    (q15_t)0x971F, (q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB743, (q15_t)0x96AC,\n    (q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7E9, (q15_t)0x963B, (q15_t)0xB83C,\n    (q15_t)0x9602, (q15_t)0xB88F, (q15_t)0x95CA, (q15_t)0xB8E3, (q15_t)0x9592,\n    (q15_t)0xB936, (q15_t)0x955A, (q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xB9DE,\n    (q15_t)0x94EC, (q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA87, (q15_t)0x947E,\n    (q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB30, (q15_t)0x9411, (q15_t)0xBB85,\n    (q15_t)0x93DB, (q15_t)0xBBDA, (q15_t)0x93A6, (q15_t)0xBC2F, (q15_t)0x9370,\n    (q15_t)0xBC84, (q15_t)0x933B, (q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD2F,\n    (q15_t)0x92D2, (q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDDB, (q15_t)0x9269,\n    (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE88, (q15_t)0x9202, (q15_t)0xBEDE,\n    (q15_t)0x91CF, (q15_t)0xBF35, (q15_t)0x919C, (q15_t)0xBF8C, (q15_t)0x9169,\n    (q15_t)0xBFE2, (q15_t)0x9136, (q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC091,\n    (q15_t)0x90D2, (q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC140, (q15_t)0x906F,\n    (q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1EF, (q15_t)0x900D, (q15_t)0xC247,\n    (q15_t)0x8FDC, (q15_t)0xC29F, (q15_t)0x8FAC, (q15_t)0xC2F8, (q15_t)0x8F7C,\n    (q15_t)0xC350, (q15_t)0x8F4C, (q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC402,\n    (q15_t)0x8EED, (q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC4B3, (q15_t)0x8E90,\n    (q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC566, (q15_t)0x8E33, (q15_t)0xC5BF,\n    (q15_t)0x8E05, (q15_t)0xC619, (q15_t)0x8DD8, (q15_t)0xC673, (q15_t)0x8DAA,\n    (q15_t)0xC6CD, (q15_t)0x8D7D, (q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC781,\n    (q15_t)0x8D24, (q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC835, (q15_t)0x8CCC,\n    (q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8EB, (q15_t)0x8C75, (q15_t)0xC945,\n    (q15_t)0x8C4A, (q15_t)0xC9A0, (q15_t)0x8C1F, (q15_t)0xC9FB, (q15_t)0x8BF4,\n    (q15_t)0xCA57, (q15_t)0x8BCA, (q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB0D,\n    (q15_t)0x8B76, (q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCBC5, (q15_t)0x8B24,\n    (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC7D, (q15_t)0x8AD2, (q15_t)0xCCD9,\n    (q15_t)0x8AAA, (q15_t)0xCD35, (q15_t)0x8A82, (q15_t)0xCD91, (q15_t)0x8A5A,\n    (q15_t)0xCDEE, (q15_t)0x8A33, (q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCEA7,\n    (q15_t)0x89E4, (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF61, (q15_t)0x8997,\n    (q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xD01B, (q15_t)0x894C, (q15_t)0xD078,\n    (q15_t)0x8926, (q15_t)0xD0D6, (q15_t)0x8901, (q15_t)0xD133, (q15_t)0x88DC,\n    (q15_t)0xD191, (q15_t)0x88B8, (q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD24C,\n    (q15_t)0x886F, (q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD308, (q15_t)0x8828,\n    (q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD3C5, (q15_t)0x87E2, (q15_t)0xD423,\n    (q15_t)0x87BF, (q15_t)0xD482, (q15_t)0x879D, (q15_t)0xD4E0, (q15_t)0x877B,\n    (q15_t)0xD53F, (q15_t)0x8759, (q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5FD,\n    (q15_t)0x8717, (q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD6BB, (q15_t)0x86D5,\n    (q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD779, (q15_t)0x8695, (q15_t)0xD7D9,\n    (q15_t)0x8675, (q15_t)0xD838, (q15_t)0x8656, (q15_t)0xD898, (q15_t)0x8637,\n    (q15_t)0xD8F8, (q15_t)0x8618, (q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD9B7,\n    (q15_t)0x85DB, (q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA77, (q15_t)0x85A0,\n    (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB38, (q15_t)0x8565, (q15_t)0xDB98,\n    (q15_t)0x8549, (q15_t)0xDBF8, (q15_t)0x852C, (q15_t)0xDC59, (q15_t)0x8510,\n    (q15_t)0xDCBA, (q15_t)0x84F4, (q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD7B,\n    (q15_t)0x84BD, (q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE3D, (q15_t)0x8488,\n    (q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDEFF, (q15_t)0x8453, (q15_t)0xDF60,\n    (q15_t)0x843A, (q15_t)0xDFC1, (q15_t)0x8420, (q15_t)0xE023, (q15_t)0x8407,\n    (q15_t)0xE084, (q15_t)0x83EE, (q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE147,\n    (q15_t)0x83BD, (q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE20A, (q15_t)0x838E,\n    (q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE2CE, (q15_t)0x835F, (q15_t)0xE330,\n    (q15_t)0x8348, (q15_t)0xE392, (q15_t)0x8332, (q15_t)0xE3F4, (q15_t)0x831C,\n    (q15_t)0xE456, (q15_t)0x8306, (q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE51B,\n    (q15_t)0x82DB, (q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5DF, (q15_t)0x82B1,\n    (q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE6A4, (q15_t)0x8289, (q15_t)0xE707,\n    (q15_t)0x8275, (q15_t)0xE769, (q15_t)0x8262, (q15_t)0xE7CC, (q15_t)0x824F,\n    (q15_t)0xE82F, (q15_t)0x823C, (q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8F5,\n    (q15_t)0x8217, (q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE9BA, (q15_t)0x81F3,\n    (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA80, (q15_t)0x81D1, (q15_t)0xEAE4,\n    (q15_t)0x81C0, (q15_t)0xEB47, (q15_t)0x81B0, (q15_t)0xEBAA, (q15_t)0x81A0,\n    (q15_t)0xEC0D, (q15_t)0x8190, (q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECD4,\n    (q15_t)0x8171, (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED9B, (q15_t)0x8154,\n    (q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE62, (q15_t)0x8137, (q15_t)0xEEC6,\n    (q15_t)0x812A, (q15_t)0xEF29, (q15_t)0x811C, (q15_t)0xEF8D, (q15_t)0x810F,\n    (q15_t)0xEFF1, (q15_t)0x8102, (q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF0B8,\n    (q15_t)0x80EA, (q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF180, (q15_t)0x80D2,\n    (q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF248, (q15_t)0x80BC, (q15_t)0xF2AC,\n    (q15_t)0x80B2, (q15_t)0xF310, (q15_t)0x80A7, (q15_t)0xF374, (q15_t)0x809D,\n    (q15_t)0xF3D8, (q15_t)0x8094, (q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF4A0,\n    (q15_t)0x8081, (q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF568, (q15_t)0x8070,\n    (q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF631, (q15_t)0x8060, (q15_t)0xF695,\n    (q15_t)0x8058, (q15_t)0xF6F9, (q15_t)0x8051, (q15_t)0xF75D, (q15_t)0x804A,\n    (q15_t)0xF7C2, (q15_t)0x8043, (q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF88A,\n    (q15_t)0x8037, (q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF953, (q15_t)0x802C,\n    (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA1C, (q15_t)0x8022, (q15_t)0xFA80,\n    (q15_t)0x801E, (q15_t)0xFAE5, (q15_t)0x801A, (q15_t)0xFB49, (q15_t)0x8016,\n    (q15_t)0xFBAE, (q15_t)0x8012, (q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC77,\n    (q15_t)0x800C, (q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD40, (q15_t)0x8007,\n    (q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFE09, (q15_t)0x8003, (q15_t)0xFE6D,\n    (q15_t)0x8002, (q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFF36, (q15_t)0x8000,\n    (q15_t)0xFF9B, (q15_t)0x8000};\n\n/**\n  @par\n  Example code for q15 Twiddle factors Generation::\n  @par\n  
for (i = 0; i< 3N/4; i++)\n  {\n     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);\n     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);\n  } 
\n  @par\n  where N = 4096, PI = 3.14159265358979\n  @par\n  Cos and Sin values are interleaved fashion\n  @par\n  Convert Floating point to q15(Fixed point 1.15):\n        round(twiddleCoefq15(i) * pow(2, 15))\n */\nconst q15_t twiddleCoef_4096_q15[6144] = {\n    (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0032, (q15_t)0x7FFF,\n    (q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0096, (q15_t)0x7FFF, (q15_t)0x00C9,\n    (q15_t)0x7FFF, (q15_t)0x00FB, (q15_t)0x7FFE, (q15_t)0x012D, (q15_t)0x7FFE,\n    (q15_t)0x015F, (q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01C4,\n    (q15_t)0x7FFC, (q15_t)0x01F6, (q15_t)0x7FFB, (q15_t)0x0228, (q15_t)0x7FFA,\n    (q15_t)0x025B, (q15_t)0x7FF9, (q15_t)0x028D, (q15_t)0x7FF8, (q15_t)0x02BF,\n    (q15_t)0x7FF7, (q15_t)0x02F1, (q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF4,\n    (q15_t)0x0356, (q15_t)0x7FF3, (q15_t)0x0388, (q15_t)0x7FF2, (q15_t)0x03BA,\n    (q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FEE, (q15_t)0x041F, (q15_t)0x7FED,\n    (q15_t)0x0451, (q15_t)0x7FEB, (q15_t)0x0483, (q15_t)0x7FE9, (q15_t)0x04B6,\n    (q15_t)0x7FE7, (q15_t)0x04E8, (q15_t)0x7FE5, (q15_t)0x051A, (q15_t)0x7FE3,\n    (q15_t)0x054C, (q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDF, (q15_t)0x05B1,\n    (q15_t)0x7FDD, (q15_t)0x05E3, (q15_t)0x7FDA, (q15_t)0x0615, (q15_t)0x7FD8,\n    (q15_t)0x0647, (q15_t)0x7FD6, (q15_t)0x067A, (q15_t)0x7FD3, (q15_t)0x06AC,\n    (q15_t)0x7FD0, (q15_t)0x06DE, (q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FCB,\n    (q15_t)0x0742, (q15_t)0x7FC8, (q15_t)0x0775, (q15_t)0x7FC5, (q15_t)0x07A7,\n    (q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBF, (q15_t)0x080B, (q15_t)0x7FBC,\n    (q15_t)0x083D, (q15_t)0x7FB8, (q15_t)0x086F, (q15_t)0x7FB5, (q15_t)0x08A2,\n    (q15_t)0x7FB1, (q15_t)0x08D4, (q15_t)0x7FAE, (q15_t)0x0906, (q15_t)0x7FAA,\n    (q15_t)0x0938, (q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7FA3, (q15_t)0x099C,\n    (q15_t)0x7F9F, (q15_t)0x09CE, (q15_t)0x7F9B, (q15_t)0x0A00, (q15_t)0x7F97,\n    (q15_t)0x0A33, (q15_t)0x7F93, (q15_t)0x0A65, (q15_t)0x7F8F, (q15_t)0x0A97,\n    (q15_t)0x7F8B, (q15_t)0x0AC9, (q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F82,\n    (q15_t)0x0B2D, (q15_t)0x7F7E, (q15_t)0x0B5F, (q15_t)0x7F79, (q15_t)0x0B91,\n    (q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F70, (q15_t)0x0BF5, (q15_t)0x7F6B,\n    (q15_t)0x0C27, (q15_t)0x7F67, (q15_t)0x0C59, (q15_t)0x7F62, (q15_t)0x0C8B,\n    (q15_t)0x7F5D, (q15_t)0x0CBD, (q15_t)0x7F58, (q15_t)0x0CEF, (q15_t)0x7F53,\n    (q15_t)0x0D21, (q15_t)0x7F4D, (q15_t)0x0D53, (q15_t)0x7F48, (q15_t)0x0D85,\n    (q15_t)0x7F43, (q15_t)0x0DB7, (q15_t)0x7F3D, (q15_t)0x0DE9, (q15_t)0x7F38,\n    (q15_t)0x0E1B, (q15_t)0x7F32, (q15_t)0x0E4D, (q15_t)0x7F2D, (q15_t)0x0E7F,\n    (q15_t)0x7F27, (q15_t)0x0EB1, (q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F1B,\n    (q15_t)0x0F15, (q15_t)0x7F15, (q15_t)0x0F47, (q15_t)0x7F0F, (q15_t)0x0F79,\n    (q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7F03, (q15_t)0x0FDD, (q15_t)0x7EFD,\n    (q15_t)0x100E, (q15_t)0x7EF6, (q15_t)0x1040, (q15_t)0x7EF0, (q15_t)0x1072,\n    (q15_t)0x7EE9, (q15_t)0x10A4, (q15_t)0x7EE3, (q15_t)0x10D6, (q15_t)0x7EDC,\n    (q15_t)0x1108, (q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7ECF, (q15_t)0x116B,\n    (q15_t)0x7EC8, (q15_t)0x119D, (q15_t)0x7EC1, (q15_t)0x11CF, (q15_t)0x7EBA,\n    (q15_t)0x1201, (q15_t)0x7EB3, (q15_t)0x1232, (q15_t)0x7EAB, (q15_t)0x1264,\n    (q15_t)0x7EA4, (q15_t)0x1296, (q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E95,\n    (q15_t)0x12F9, (q15_t)0x7E8E, (q15_t)0x132B, (q15_t)0x7E86, (q15_t)0x135D,\n    (q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E77, (q15_t)0x13C0, (q15_t)0x7E6F,\n    (q15_t)0x13F2, (q15_t)0x7E67, (q15_t)0x1423, (q15_t)0x7E5F, (q15_t)0x1455,\n    (q15_t)0x7E57, (q15_t)0x1487, (q15_t)0x7E4F, (q15_t)0x14B8, (q15_t)0x7E47,\n    (q15_t)0x14EA, (q15_t)0x7E3F, (q15_t)0x151B, (q15_t)0x7E37, (q15_t)0x154D,\n    (q15_t)0x7E2E, (q15_t)0x157F, (q15_t)0x7E26, (q15_t)0x15B0, (q15_t)0x7E1D,\n    (q15_t)0x15E2, (q15_t)0x7E14, (q15_t)0x1613, (q15_t)0x7E0C, (q15_t)0x1645,\n    (q15_t)0x7E03, (q15_t)0x1676, (q15_t)0x7DFA, (q15_t)0x16A8, (q15_t)0x7DF1,\n    (q15_t)0x16D9, (q15_t)0x7DE8, (q15_t)0x170A, (q15_t)0x7DDF, (q15_t)0x173C,\n    (q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DCD, (q15_t)0x179F, (q15_t)0x7DC3,\n    (q15_t)0x17D0, (q15_t)0x7DBA, (q15_t)0x1802, (q15_t)0x7DB0, (q15_t)0x1833,\n    (q15_t)0x7DA7, (q15_t)0x1864, (q15_t)0x7D9D, (q15_t)0x1896, (q15_t)0x7D94,\n    (q15_t)0x18C7, (q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D80, (q15_t)0x192A,\n    (q15_t)0x7D76, (q15_t)0x195B, (q15_t)0x7D6C, (q15_t)0x198C, (q15_t)0x7D62,\n    (q15_t)0x19BD, (q15_t)0x7D58, (q15_t)0x19EF, (q15_t)0x7D4E, (q15_t)0x1A20,\n    (q15_t)0x7D43, (q15_t)0x1A51, (q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D2F,\n    (q15_t)0x1AB3, (q15_t)0x7D24, (q15_t)0x1AE4, (q15_t)0x7D19, (q15_t)0x1B16,\n    (q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7D04, (q15_t)0x1B78, (q15_t)0x7CF9,\n    (q15_t)0x1BA9, (q15_t)0x7CEE, (q15_t)0x1BDA, (q15_t)0x7CE3, (q15_t)0x1C0B,\n    (q15_t)0x7CD8, (q15_t)0x1C3C, (q15_t)0x7CCD, (q15_t)0x1C6D, (q15_t)0x7CC2,\n    (q15_t)0x1C9E, (q15_t)0x7CB7, (q15_t)0x1CCF, (q15_t)0x7CAB, (q15_t)0x1D00,\n    (q15_t)0x7CA0, (q15_t)0x1D31, (q15_t)0x7C94, (q15_t)0x1D62, (q15_t)0x7C89,\n    (q15_t)0x1D93, (q15_t)0x7C7D, (q15_t)0x1DC4, (q15_t)0x7C71, (q15_t)0x1DF5,\n    (q15_t)0x7C66, (q15_t)0x1E25, (q15_t)0x7C5A, (q15_t)0x1E56, (q15_t)0x7C4E,\n    (q15_t)0x1E87, (q15_t)0x7C42, (q15_t)0x1EB8, (q15_t)0x7C36, (q15_t)0x1EE9,\n    (q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7C1D, (q15_t)0x1F4A, (q15_t)0x7C11,\n    (q15_t)0x1F7B, (q15_t)0x7C05, (q15_t)0x1FAC, (q15_t)0x7BF8, (q15_t)0x1FDC,\n    (q15_t)0x7BEB, (q15_t)0x200D, (q15_t)0x7BDF, (q15_t)0x203E, (q15_t)0x7BD2,\n    (q15_t)0x206E, (q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7BB9, (q15_t)0x20D0,\n    (q15_t)0x7BAC, (q15_t)0x2100, (q15_t)0x7B9F, (q15_t)0x2131, (q15_t)0x7B92,\n    (q15_t)0x2161, (q15_t)0x7B84, (q15_t)0x2192, (q15_t)0x7B77, (q15_t)0x21C2,\n    (q15_t)0x7B6A, (q15_t)0x21F3, (q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B4F,\n    (q15_t)0x2254, (q15_t)0x7B42, (q15_t)0x2284, (q15_t)0x7B34, (q15_t)0x22B4,\n    (q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7B19, (q15_t)0x2315, (q15_t)0x7B0B,\n    (q15_t)0x2345, (q15_t)0x7AFD, (q15_t)0x2376, (q15_t)0x7AEF, (q15_t)0x23A6,\n    (q15_t)0x7AE1, (q15_t)0x23D6, (q15_t)0x7AD3, (q15_t)0x2407, (q15_t)0x7AC5,\n    (q15_t)0x2437, (q15_t)0x7AB6, (q15_t)0x2467, (q15_t)0x7AA8, (q15_t)0x2497,\n    (q15_t)0x7A9A, (q15_t)0x24C7, (q15_t)0x7A8B, (q15_t)0x24F7, (q15_t)0x7A7D,\n    (q15_t)0x2528, (q15_t)0x7A6E, (q15_t)0x2558, (q15_t)0x7A5F, (q15_t)0x2588,\n    (q15_t)0x7A50, (q15_t)0x25B8, (q15_t)0x7A42, (q15_t)0x25E8, (q15_t)0x7A33,\n    (q15_t)0x2618, (q15_t)0x7A24, (q15_t)0x2648, (q15_t)0x7A15, (q15_t)0x2678,\n    (q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79F6, (q15_t)0x26D8, (q15_t)0x79E7,\n    (q15_t)0x2707, (q15_t)0x79D8, (q15_t)0x2737, (q15_t)0x79C8, (q15_t)0x2767,\n    (q15_t)0x79B9, (q15_t)0x2797, (q15_t)0x79A9, (q15_t)0x27C7, (q15_t)0x7999,\n    (q15_t)0x27F6, (q15_t)0x798A, (q15_t)0x2826, (q15_t)0x797A, (q15_t)0x2856,\n    (q15_t)0x796A, (q15_t)0x2886, (q15_t)0x795A, (q15_t)0x28B5, (q15_t)0x794A,\n    (q15_t)0x28E5, (q15_t)0x793A, (q15_t)0x2915, (q15_t)0x792A, (q15_t)0x2944,\n    (q15_t)0x7919, (q15_t)0x2974, (q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78F9,\n    (q15_t)0x29D3, (q15_t)0x78E8, (q15_t)0x2A02, (q15_t)0x78D8, (q15_t)0x2A32,\n    (q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x78B6, (q15_t)0x2A91, (q15_t)0x78A6,\n    (q15_t)0x2AC0, (q15_t)0x7895, (q15_t)0x2AEF, (q15_t)0x7884, (q15_t)0x2B1F,\n    (q15_t)0x7873, (q15_t)0x2B4E, (q15_t)0x7862, (q15_t)0x2B7D, (q15_t)0x7851,\n    (q15_t)0x2BAD, (q15_t)0x7840, (q15_t)0x2BDC, (q15_t)0x782E, (q15_t)0x2C0B,\n    (q15_t)0x781D, (q15_t)0x2C3A, (q15_t)0x780C, (q15_t)0x2C69, (q15_t)0x77FA,\n    (q15_t)0x2C98, (q15_t)0x77E9, (q15_t)0x2CC8, (q15_t)0x77D7, (q15_t)0x2CF7,\n    (q15_t)0x77C5, (q15_t)0x2D26, (q15_t)0x77B4, (q15_t)0x2D55, (q15_t)0x77A2,\n    (q15_t)0x2D84, (q15_t)0x7790, (q15_t)0x2DB3, (q15_t)0x777E, (q15_t)0x2DE2,\n    (q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x775A, (q15_t)0x2E3F, (q15_t)0x7747,\n    (q15_t)0x2E6E, (q15_t)0x7735, (q15_t)0x2E9D, (q15_t)0x7723, (q15_t)0x2ECC,\n    (q15_t)0x7710, (q15_t)0x2EFB, (q15_t)0x76FE, (q15_t)0x2F29, (q15_t)0x76EB,\n    (q15_t)0x2F58, (q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x76C6, (q15_t)0x2FB5,\n    (q15_t)0x76B3, (q15_t)0x2FE4, (q15_t)0x76A0, (q15_t)0x3013, (q15_t)0x768E,\n    (q15_t)0x3041, (q15_t)0x767B, (q15_t)0x3070, (q15_t)0x7668, (q15_t)0x309E,\n    (q15_t)0x7654, (q15_t)0x30CD, (q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x762E,\n    (q15_t)0x312A, (q15_t)0x761B, (q15_t)0x3158, (q15_t)0x7607, (q15_t)0x3186,\n    (q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75E0, (q15_t)0x31E3, (q15_t)0x75CC,\n    (q15_t)0x3211, (q15_t)0x75B9, (q15_t)0x3240, (q15_t)0x75A5, (q15_t)0x326E,\n    (q15_t)0x7591, (q15_t)0x329C, (q15_t)0x757D, (q15_t)0x32CA, (q15_t)0x7569,\n    (q15_t)0x32F8, (q15_t)0x7555, (q15_t)0x3326, (q15_t)0x7541, (q15_t)0x3354,\n    (q15_t)0x752D, (q15_t)0x3382, (q15_t)0x7519, (q15_t)0x33B0, (q15_t)0x7504,\n    (q15_t)0x33DE, (q15_t)0x74F0, (q15_t)0x340C, (q15_t)0x74DB, (q15_t)0x343A,\n    (q15_t)0x74C7, (q15_t)0x3468, (q15_t)0x74B2, (q15_t)0x3496, (q15_t)0x749E,\n    (q15_t)0x34C4, (q15_t)0x7489, (q15_t)0x34F2, (q15_t)0x7474, (q15_t)0x351F,\n    (q15_t)0x745F, (q15_t)0x354D, (q15_t)0x744A, (q15_t)0x357B, (q15_t)0x7435,\n    (q15_t)0x35A8, (q15_t)0x7420, (q15_t)0x35D6, (q15_t)0x740B, (q15_t)0x3604,\n    (q15_t)0x73F6, (q15_t)0x3631, (q15_t)0x73E0, (q15_t)0x365F, (q15_t)0x73CB,\n    (q15_t)0x368C, (q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x73A0, (q15_t)0x36E7,\n    (q15_t)0x738A, (q15_t)0x3714, (q15_t)0x7375, (q15_t)0x3742, (q15_t)0x735F,\n    (q15_t)0x376F, (q15_t)0x7349, (q15_t)0x379C, (q15_t)0x7333, (q15_t)0x37CA,\n    (q15_t)0x731D, (q15_t)0x37F7, (q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72F1,\n    (q15_t)0x3851, (q15_t)0x72DB, (q15_t)0x387E, (q15_t)0x72C5, (q15_t)0x38AB,\n    (q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7298, (q15_t)0x3906, (q15_t)0x7282,\n    (q15_t)0x3932, (q15_t)0x726B, (q15_t)0x395F, (q15_t)0x7255, (q15_t)0x398C,\n    (q15_t)0x723E, (q15_t)0x39B9, (q15_t)0x7227, (q15_t)0x39E6, (q15_t)0x7211,\n    (q15_t)0x3A13, (q15_t)0x71FA, (q15_t)0x3A40, (q15_t)0x71E3, (q15_t)0x3A6C,\n    (q15_t)0x71CC, (q15_t)0x3A99, (q15_t)0x71B5, (q15_t)0x3AC6, (q15_t)0x719E,\n    (q15_t)0x3AF2, (q15_t)0x7186, (q15_t)0x3B1F, (q15_t)0x716F, (q15_t)0x3B4C,\n    (q15_t)0x7158, (q15_t)0x3B78, (q15_t)0x7141, (q15_t)0x3BA5, (q15_t)0x7129,\n    (q15_t)0x3BD1, (q15_t)0x7112, (q15_t)0x3BFD, (q15_t)0x70FA, (q15_t)0x3C2A,\n    (q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x70CB, (q15_t)0x3C83, (q15_t)0x70B3,\n    (q15_t)0x3CAF, (q15_t)0x709B, (q15_t)0x3CDB, (q15_t)0x7083, (q15_t)0x3D07,\n    (q15_t)0x706B, (q15_t)0x3D33, (q15_t)0x7053, (q15_t)0x3D60, (q15_t)0x703B,\n    (q15_t)0x3D8C, (q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x700A, (q15_t)0x3DE4,\n    (q15_t)0x6FF2, (q15_t)0x3E10, (q15_t)0x6FDA, (q15_t)0x3E3C, (q15_t)0x6FC1,\n    (q15_t)0x3E68, (q15_t)0x6FA9, (q15_t)0x3E93, (q15_t)0x6F90, (q15_t)0x3EBF,\n    (q15_t)0x6F77, (q15_t)0x3EEB, (q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6F46,\n    (q15_t)0x3F43, (q15_t)0x6F2D, (q15_t)0x3F6E, (q15_t)0x6F14, (q15_t)0x3F9A,\n    (q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6EE2, (q15_t)0x3FF1, (q15_t)0x6EC9,\n    (q15_t)0x401D, (q15_t)0x6EAF, (q15_t)0x4048, (q15_t)0x6E96, (q15_t)0x4073,\n    (q15_t)0x6E7D, (q15_t)0x409F, (q15_t)0x6E63, (q15_t)0x40CA, (q15_t)0x6E4A,\n    (q15_t)0x40F6, (q15_t)0x6E30, (q15_t)0x4121, (q15_t)0x6E17, (q15_t)0x414C,\n    (q15_t)0x6DFD, (q15_t)0x4177, (q15_t)0x6DE3, (q15_t)0x41A2, (q15_t)0x6DCA,\n    (q15_t)0x41CE, (q15_t)0x6DB0, (q15_t)0x41F9, (q15_t)0x6D96, (q15_t)0x4224,\n    (q15_t)0x6D7C, (q15_t)0x424F, (q15_t)0x6D62, (q15_t)0x427A, (q15_t)0x6D48,\n    (q15_t)0x42A5, (q15_t)0x6D2D, (q15_t)0x42D0, (q15_t)0x6D13, (q15_t)0x42FA,\n    (q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6CDE, (q15_t)0x4350, (q15_t)0x6CC4,\n    (q15_t)0x437B, (q15_t)0x6CA9, (q15_t)0x43A5, (q15_t)0x6C8F, (q15_t)0x43D0,\n    (q15_t)0x6C74, (q15_t)0x43FB, (q15_t)0x6C59, (q15_t)0x4425, (q15_t)0x6C3F,\n    (q15_t)0x4450, (q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6C09, (q15_t)0x44A5,\n    (q15_t)0x6BEE, (q15_t)0x44CF, (q15_t)0x6BD3, (q15_t)0x44FA, (q15_t)0x6BB8,\n    (q15_t)0x4524, (q15_t)0x6B9C, (q15_t)0x454E, (q15_t)0x6B81, (q15_t)0x4578,\n    (q15_t)0x6B66, (q15_t)0x45A3, (q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6B2F,\n    (q15_t)0x45F7, (q15_t)0x6B13, (q15_t)0x4621, (q15_t)0x6AF8, (q15_t)0x464B,\n    (q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6AC1, (q15_t)0x469F, (q15_t)0x6AA5,\n    (q15_t)0x46C9, (q15_t)0x6A89, (q15_t)0x46F3, (q15_t)0x6A6D, (q15_t)0x471C,\n    (q15_t)0x6A51, (q15_t)0x4746, (q15_t)0x6A35, (q15_t)0x4770, (q15_t)0x6A19,\n    (q15_t)0x479A, (q15_t)0x69FD, (q15_t)0x47C3, (q15_t)0x69E1, (q15_t)0x47ED,\n    (q15_t)0x69C4, (q15_t)0x4816, (q15_t)0x69A8, (q15_t)0x4840, (q15_t)0x698C,\n    (q15_t)0x4869, (q15_t)0x696F, (q15_t)0x4893, (q15_t)0x6953, (q15_t)0x48BC,\n    (q15_t)0x6936, (q15_t)0x48E6, (q15_t)0x6919, (q15_t)0x490F, (q15_t)0x68FD,\n    (q15_t)0x4938, (q15_t)0x68E0, (q15_t)0x4961, (q15_t)0x68C3, (q15_t)0x498A,\n    (q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6889, (q15_t)0x49DD, (q15_t)0x686C,\n    (q15_t)0x4A06, (q15_t)0x684F, (q15_t)0x4A2F, (q15_t)0x6832, (q15_t)0x4A58,\n    (q15_t)0x6815, (q15_t)0x4A81, (q15_t)0x67F7, (q15_t)0x4AA9, (q15_t)0x67DA,\n    (q15_t)0x4AD2, (q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x679F, (q15_t)0x4B24,\n    (q15_t)0x6782, (q15_t)0x4B4C, (q15_t)0x6764, (q15_t)0x4B75, (q15_t)0x6746,\n    (q15_t)0x4B9E, (q15_t)0x6729, (q15_t)0x4BC6, (q15_t)0x670B, (q15_t)0x4BEF,\n    (q15_t)0x66ED, (q15_t)0x4C17, (q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x66B1,\n    (q15_t)0x4C68, (q15_t)0x6693, (q15_t)0x4C90, (q15_t)0x6675, (q15_t)0x4CB8,\n    (q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x6639, (q15_t)0x4D09, (q15_t)0x661A,\n    (q15_t)0x4D31, (q15_t)0x65FC, (q15_t)0x4D59, (q15_t)0x65DD, (q15_t)0x4D81,\n    (q15_t)0x65BF, (q15_t)0x4DA9, (q15_t)0x65A0, (q15_t)0x4DD1, (q15_t)0x6582,\n    (q15_t)0x4DF9, (q15_t)0x6563, (q15_t)0x4E21, (q15_t)0x6545, (q15_t)0x4E48,\n    (q15_t)0x6526, (q15_t)0x4E70, (q15_t)0x6507, (q15_t)0x4E98, (q15_t)0x64E8,\n    (q15_t)0x4EBF, (q15_t)0x64C9, (q15_t)0x4EE7, (q15_t)0x64AA, (q15_t)0x4F0F,\n    (q15_t)0x648B, (q15_t)0x4F36, (q15_t)0x646C, (q15_t)0x4F5E, (q15_t)0x644D,\n    (q15_t)0x4F85, (q15_t)0x642D, (q15_t)0x4FAC, (q15_t)0x640E, (q15_t)0x4FD4,\n    (q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x63CF, (q15_t)0x5022, (q15_t)0x63B0,\n    (q15_t)0x5049, (q15_t)0x6390, (q15_t)0x5070, (q15_t)0x6371, (q15_t)0x5097,\n    (q15_t)0x6351, (q15_t)0x50BF, (q15_t)0x6331, (q15_t)0x50E5, (q15_t)0x6311,\n    (q15_t)0x510C, (q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x62D2, (q15_t)0x515A,\n    (q15_t)0x62B2, (q15_t)0x5181, (q15_t)0x6292, (q15_t)0x51A8, (q15_t)0x6271,\n    (q15_t)0x51CE, (q15_t)0x6251, (q15_t)0x51F5, (q15_t)0x6231, (q15_t)0x521C,\n    (q15_t)0x6211, (q15_t)0x5242, (q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x61D0,\n    (q15_t)0x528F, (q15_t)0x61B0, (q15_t)0x52B5, (q15_t)0x618F, (q15_t)0x52DC,\n    (q15_t)0x616F, (q15_t)0x5302, (q15_t)0x614E, (q15_t)0x5328, (q15_t)0x612D,\n    (q15_t)0x534E, (q15_t)0x610D, (q15_t)0x5375, (q15_t)0x60EC, (q15_t)0x539B,\n    (q15_t)0x60CB, (q15_t)0x53C1, (q15_t)0x60AA, (q15_t)0x53E7, (q15_t)0x6089,\n    (q15_t)0x540D, (q15_t)0x6068, (q15_t)0x5433, (q15_t)0x6047, (q15_t)0x5458,\n    (q15_t)0x6026, (q15_t)0x547E, (q15_t)0x6004, (q15_t)0x54A4, (q15_t)0x5FE3,\n    (q15_t)0x54CA, (q15_t)0x5FC2, (q15_t)0x54EF, (q15_t)0x5FA0, (q15_t)0x5515,\n    (q15_t)0x5F7F, (q15_t)0x553A, (q15_t)0x5F5E, (q15_t)0x5560, (q15_t)0x5F3C,\n    (q15_t)0x5585, (q15_t)0x5F1A, (q15_t)0x55AB, (q15_t)0x5EF9, (q15_t)0x55D0,\n    (q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5EB5, (q15_t)0x561A, (q15_t)0x5E93,\n    (q15_t)0x5640, (q15_t)0x5E71, (q15_t)0x5665, (q15_t)0x5E50, (q15_t)0x568A,\n    (q15_t)0x5E2D, (q15_t)0x56AF, (q15_t)0x5E0B, (q15_t)0x56D4, (q15_t)0x5DE9,\n    (q15_t)0x56F9, (q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5DA5, (q15_t)0x5742,\n    (q15_t)0x5D83, (q15_t)0x5767, (q15_t)0x5D60, (q15_t)0x578C, (q15_t)0x5D3E,\n    (q15_t)0x57B0, (q15_t)0x5D1B, (q15_t)0x57D5, (q15_t)0x5CF9, (q15_t)0x57F9,\n    (q15_t)0x5CD6, (q15_t)0x581E, (q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C91,\n    (q15_t)0x5867, (q15_t)0x5C6E, (q15_t)0x588B, (q15_t)0x5C4B, (q15_t)0x58AF,\n    (q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5C06, (q15_t)0x58F8, (q15_t)0x5BE3,\n    (q15_t)0x591C, (q15_t)0x5BC0, (q15_t)0x5940, (q15_t)0x5B9D, (q15_t)0x5964,\n    (q15_t)0x5B79, (q15_t)0x5988, (q15_t)0x5B56, (q15_t)0x59AC, (q15_t)0x5B33,\n    (q15_t)0x59D0, (q15_t)0x5B10, (q15_t)0x59F3, (q15_t)0x5AEC, (q15_t)0x5A17,\n    (q15_t)0x5AC9, (q15_t)0x5A3B, (q15_t)0x5AA5, (q15_t)0x5A5E, (q15_t)0x5A82,\n    (q15_t)0x5A82, (q15_t)0x5A5E, (q15_t)0x5AA5, (q15_t)0x5A3B, (q15_t)0x5AC9,\n    (q15_t)0x5A17, (q15_t)0x5AEC, (q15_t)0x59F3, (q15_t)0x5B10, (q15_t)0x59D0,\n    (q15_t)0x5B33, (q15_t)0x59AC, (q15_t)0x5B56, (q15_t)0x5988, (q15_t)0x5B79,\n    (q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x5940, (q15_t)0x5BC0, (q15_t)0x591C,\n    (q15_t)0x5BE3, (q15_t)0x58F8, (q15_t)0x5C06, (q15_t)0x58D4, (q15_t)0x5C29,\n    (q15_t)0x58AF, (q15_t)0x5C4B, (q15_t)0x588B, (q15_t)0x5C6E, (q15_t)0x5867,\n    (q15_t)0x5C91, (q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x581E, (q15_t)0x5CD6,\n    (q15_t)0x57F9, (q15_t)0x5CF9, (q15_t)0x57D5, (q15_t)0x5D1B, (q15_t)0x57B0,\n    (q15_t)0x5D3E, (q15_t)0x578C, (q15_t)0x5D60, (q15_t)0x5767, (q15_t)0x5D83,\n    (q15_t)0x5742, (q15_t)0x5DA5, (q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x56F9,\n    (q15_t)0x5DE9, (q15_t)0x56D4, (q15_t)0x5E0B, (q15_t)0x56AF, (q15_t)0x5E2D,\n    (q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x5665, (q15_t)0x5E71, (q15_t)0x5640,\n    (q15_t)0x5E93, (q15_t)0x561A, (q15_t)0x5EB5, (q15_t)0x55F5, (q15_t)0x5ED7,\n    (q15_t)0x55D0, (q15_t)0x5EF9, (q15_t)0x55AB, (q15_t)0x5F1A, (q15_t)0x5585,\n    (q15_t)0x5F3C, (q15_t)0x5560, (q15_t)0x5F5E, (q15_t)0x553A, (q15_t)0x5F7F,\n    (q15_t)0x5515, (q15_t)0x5FA0, (q15_t)0x54EF, (q15_t)0x5FC2, (q15_t)0x54CA,\n    (q15_t)0x5FE3, (q15_t)0x54A4, (q15_t)0x6004, (q15_t)0x547E, (q15_t)0x6026,\n    (q15_t)0x5458, (q15_t)0x6047, (q15_t)0x5433, (q15_t)0x6068, (q15_t)0x540D,\n    (q15_t)0x6089, (q15_t)0x53E7, (q15_t)0x60AA, (q15_t)0x53C1, (q15_t)0x60CB,\n    (q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5375, (q15_t)0x610D, (q15_t)0x534E,\n    (q15_t)0x612D, (q15_t)0x5328, (q15_t)0x614E, (q15_t)0x5302, (q15_t)0x616F,\n    (q15_t)0x52DC, (q15_t)0x618F, (q15_t)0x52B5, (q15_t)0x61B0, (q15_t)0x528F,\n    (q15_t)0x61D0, (q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x5242, (q15_t)0x6211,\n    (q15_t)0x521C, (q15_t)0x6231, (q15_t)0x51F5, (q15_t)0x6251, (q15_t)0x51CE,\n    (q15_t)0x6271, (q15_t)0x51A8, (q15_t)0x6292, (q15_t)0x5181, (q15_t)0x62B2,\n    (q15_t)0x515A, (q15_t)0x62D2, (q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x510C,\n    (q15_t)0x6311, (q15_t)0x50E5, (q15_t)0x6331, (q15_t)0x50BF, (q15_t)0x6351,\n    (q15_t)0x5097, (q15_t)0x6371, (q15_t)0x5070, (q15_t)0x6390, (q15_t)0x5049,\n    (q15_t)0x63B0, (q15_t)0x5022, (q15_t)0x63CF, (q15_t)0x4FFB, (q15_t)0x63EF,\n    (q15_t)0x4FD4, (q15_t)0x640E, (q15_t)0x4FAC, (q15_t)0x642D, (q15_t)0x4F85,\n    (q15_t)0x644D, (q15_t)0x4F5E, (q15_t)0x646C, (q15_t)0x4F36, (q15_t)0x648B,\n    (q15_t)0x4F0F, (q15_t)0x64AA, (q15_t)0x4EE7, (q15_t)0x64C9, (q15_t)0x4EBF,\n    (q15_t)0x64E8, (q15_t)0x4E98, (q15_t)0x6507, (q15_t)0x4E70, (q15_t)0x6526,\n    (q15_t)0x4E48, (q15_t)0x6545, (q15_t)0x4E21, (q15_t)0x6563, (q15_t)0x4DF9,\n    (q15_t)0x6582, (q15_t)0x4DD1, (q15_t)0x65A0, (q15_t)0x4DA9, (q15_t)0x65BF,\n    (q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4D59, (q15_t)0x65FC, (q15_t)0x4D31,\n    (q15_t)0x661A, (q15_t)0x4D09, (q15_t)0x6639, (q15_t)0x4CE1, (q15_t)0x6657,\n    (q15_t)0x4CB8, (q15_t)0x6675, (q15_t)0x4C90, (q15_t)0x6693, (q15_t)0x4C68,\n    (q15_t)0x66B1, (q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4C17, (q15_t)0x66ED,\n    (q15_t)0x4BEF, (q15_t)0x670B, (q15_t)0x4BC6, (q15_t)0x6729, (q15_t)0x4B9E,\n    (q15_t)0x6746, (q15_t)0x4B75, (q15_t)0x6764, (q15_t)0x4B4C, (q15_t)0x6782,\n    (q15_t)0x4B24, (q15_t)0x679F, (q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4AD2,\n    (q15_t)0x67DA, (q15_t)0x4AA9, (q15_t)0x67F7, (q15_t)0x4A81, (q15_t)0x6815,\n    (q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x4A2F, (q15_t)0x684F, (q15_t)0x4A06,\n    (q15_t)0x686C, (q15_t)0x49DD, (q15_t)0x6889, (q15_t)0x49B4, (q15_t)0x68A6,\n    (q15_t)0x498A, (q15_t)0x68C3, (q15_t)0x4961, (q15_t)0x68E0, (q15_t)0x4938,\n    (q15_t)0x68FD, (q15_t)0x490F, (q15_t)0x6919, (q15_t)0x48E6, (q15_t)0x6936,\n    (q15_t)0x48BC, (q15_t)0x6953, (q15_t)0x4893, (q15_t)0x696F, (q15_t)0x4869,\n    (q15_t)0x698C, (q15_t)0x4840, (q15_t)0x69A8, (q15_t)0x4816, (q15_t)0x69C4,\n    (q15_t)0x47ED, (q15_t)0x69E1, (q15_t)0x47C3, (q15_t)0x69FD, (q15_t)0x479A,\n    (q15_t)0x6A19, (q15_t)0x4770, (q15_t)0x6A35, (q15_t)0x4746, (q15_t)0x6A51,\n    (q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x46F3, (q15_t)0x6A89, (q15_t)0x46C9,\n    (q15_t)0x6AA5, (q15_t)0x469F, (q15_t)0x6AC1, (q15_t)0x4675, (q15_t)0x6ADC,\n    (q15_t)0x464B, (q15_t)0x6AF8, (q15_t)0x4621, (q15_t)0x6B13, (q15_t)0x45F7,\n    (q15_t)0x6B2F, (q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x45A3, (q15_t)0x6B66,\n    (q15_t)0x4578, (q15_t)0x6B81, (q15_t)0x454E, (q15_t)0x6B9C, (q15_t)0x4524,\n    (q15_t)0x6BB8, (q15_t)0x44FA, (q15_t)0x6BD3, (q15_t)0x44CF, (q15_t)0x6BEE,\n    (q15_t)0x44A5, (q15_t)0x6C09, (q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4450,\n    (q15_t)0x6C3F, (q15_t)0x4425, (q15_t)0x6C59, (q15_t)0x43FB, (q15_t)0x6C74,\n    (q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x43A5, (q15_t)0x6CA9, (q15_t)0x437B,\n    (q15_t)0x6CC4, (q15_t)0x4350, (q15_t)0x6CDE, (q15_t)0x4325, (q15_t)0x6CF9,\n    (q15_t)0x42FA, (q15_t)0x6D13, (q15_t)0x42D0, (q15_t)0x6D2D, (q15_t)0x42A5,\n    (q15_t)0x6D48, (q15_t)0x427A, (q15_t)0x6D62, (q15_t)0x424F, (q15_t)0x6D7C,\n    (q15_t)0x4224, (q15_t)0x6D96, (q15_t)0x41F9, (q15_t)0x6DB0, (q15_t)0x41CE,\n    (q15_t)0x6DCA, (q15_t)0x41A2, (q15_t)0x6DE3, (q15_t)0x4177, (q15_t)0x6DFD,\n    (q15_t)0x414C, (q15_t)0x6E17, (q15_t)0x4121, (q15_t)0x6E30, (q15_t)0x40F6,\n    (q15_t)0x6E4A, (q15_t)0x40CA, (q15_t)0x6E63, (q15_t)0x409F, (q15_t)0x6E7D,\n    (q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x4048, (q15_t)0x6EAF, (q15_t)0x401D,\n    (q15_t)0x6EC9, (q15_t)0x3FF1, (q15_t)0x6EE2, (q15_t)0x3FC5, (q15_t)0x6EFB,\n    (q15_t)0x3F9A, (q15_t)0x6F14, (q15_t)0x3F6E, (q15_t)0x6F2D, (q15_t)0x3F43,\n    (q15_t)0x6F46, (q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3EEB, (q15_t)0x6F77,\n    (q15_t)0x3EBF, (q15_t)0x6F90, (q15_t)0x3E93, (q15_t)0x6FA9, (q15_t)0x3E68,\n    (q15_t)0x6FC1, (q15_t)0x3E3C, (q15_t)0x6FDA, (q15_t)0x3E10, (q15_t)0x6FF2,\n    (q15_t)0x3DE4, (q15_t)0x700A, (q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D8C,\n    (q15_t)0x703B, (q15_t)0x3D60, (q15_t)0x7053, (q15_t)0x3D33, (q15_t)0x706B,\n    (q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3CDB, (q15_t)0x709B, (q15_t)0x3CAF,\n    (q15_t)0x70B3, (q15_t)0x3C83, (q15_t)0x70CB, (q15_t)0x3C56, (q15_t)0x70E2,\n    (q15_t)0x3C2A, (q15_t)0x70FA, (q15_t)0x3BFD, (q15_t)0x7112, (q15_t)0x3BD1,\n    (q15_t)0x7129, (q15_t)0x3BA5, (q15_t)0x7141, (q15_t)0x3B78, (q15_t)0x7158,\n    (q15_t)0x3B4C, (q15_t)0x716F, (q15_t)0x3B1F, (q15_t)0x7186, (q15_t)0x3AF2,\n    (q15_t)0x719E, (q15_t)0x3AC6, (q15_t)0x71B5, (q15_t)0x3A99, (q15_t)0x71CC,\n    (q15_t)0x3A6C, (q15_t)0x71E3, (q15_t)0x3A40, (q15_t)0x71FA, (q15_t)0x3A13,\n    (q15_t)0x7211, (q15_t)0x39E6, (q15_t)0x7227, (q15_t)0x39B9, (q15_t)0x723E,\n    (q15_t)0x398C, (q15_t)0x7255, (q15_t)0x395F, (q15_t)0x726B, (q15_t)0x3932,\n    (q15_t)0x7282, (q15_t)0x3906, (q15_t)0x7298, (q15_t)0x38D8, (q15_t)0x72AF,\n    (q15_t)0x38AB, (q15_t)0x72C5, (q15_t)0x387E, (q15_t)0x72DB, (q15_t)0x3851,\n    (q15_t)0x72F1, (q15_t)0x3824, (q15_t)0x7307, (q15_t)0x37F7, (q15_t)0x731D,\n    (q15_t)0x37CA, (q15_t)0x7333, (q15_t)0x379C, (q15_t)0x7349, (q15_t)0x376F,\n    (q15_t)0x735F, (q15_t)0x3742, (q15_t)0x7375, (q15_t)0x3714, (q15_t)0x738A,\n    (q15_t)0x36E7, (q15_t)0x73A0, (q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x368C,\n    (q15_t)0x73CB, (q15_t)0x365F, (q15_t)0x73E0, (q15_t)0x3631, (q15_t)0x73F6,\n    (q15_t)0x3604, (q15_t)0x740B, (q15_t)0x35D6, (q15_t)0x7420, (q15_t)0x35A8,\n    (q15_t)0x7435, (q15_t)0x357B, (q15_t)0x744A, (q15_t)0x354D, (q15_t)0x745F,\n    (q15_t)0x351F, (q15_t)0x7474, (q15_t)0x34F2, (q15_t)0x7489, (q15_t)0x34C4,\n    (q15_t)0x749E, (q15_t)0x3496, (q15_t)0x74B2, (q15_t)0x3468, (q15_t)0x74C7,\n    (q15_t)0x343A, (q15_t)0x74DB, (q15_t)0x340C, (q15_t)0x74F0, (q15_t)0x33DE,\n    (q15_t)0x7504, (q15_t)0x33B0, (q15_t)0x7519, (q15_t)0x3382, (q15_t)0x752D,\n    (q15_t)0x3354, (q15_t)0x7541, (q15_t)0x3326, (q15_t)0x7555, (q15_t)0x32F8,\n    (q15_t)0x7569, (q15_t)0x32CA, (q15_t)0x757D, (q15_t)0x329C, (q15_t)0x7591,\n    (q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x3240, (q15_t)0x75B9, (q15_t)0x3211,\n    (q15_t)0x75CC, (q15_t)0x31E3, (q15_t)0x75E0, (q15_t)0x31B5, (q15_t)0x75F4,\n    (q15_t)0x3186, (q15_t)0x7607, (q15_t)0x3158, (q15_t)0x761B, (q15_t)0x312A,\n    (q15_t)0x762E, (q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x30CD, (q15_t)0x7654,\n    (q15_t)0x309E, (q15_t)0x7668, (q15_t)0x3070, (q15_t)0x767B, (q15_t)0x3041,\n    (q15_t)0x768E, (q15_t)0x3013, (q15_t)0x76A0, (q15_t)0x2FE4, (q15_t)0x76B3,\n    (q15_t)0x2FB5, (q15_t)0x76C6, (q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2F58,\n    (q15_t)0x76EB, (q15_t)0x2F29, (q15_t)0x76FE, (q15_t)0x2EFB, (q15_t)0x7710,\n    (q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E9D, (q15_t)0x7735, (q15_t)0x2E6E,\n    (q15_t)0x7747, (q15_t)0x2E3F, (q15_t)0x775A, (q15_t)0x2E11, (q15_t)0x776C,\n    (q15_t)0x2DE2, (q15_t)0x777E, (q15_t)0x2DB3, (q15_t)0x7790, (q15_t)0x2D84,\n    (q15_t)0x77A2, (q15_t)0x2D55, (q15_t)0x77B4, (q15_t)0x2D26, (q15_t)0x77C5,\n    (q15_t)0x2CF7, (q15_t)0x77D7, (q15_t)0x2CC8, (q15_t)0x77E9, (q15_t)0x2C98,\n    (q15_t)0x77FA, (q15_t)0x2C69, (q15_t)0x780C, (q15_t)0x2C3A, (q15_t)0x781D,\n    (q15_t)0x2C0B, (q15_t)0x782E, (q15_t)0x2BDC, (q15_t)0x7840, (q15_t)0x2BAD,\n    (q15_t)0x7851, (q15_t)0x2B7D, (q15_t)0x7862, (q15_t)0x2B4E, (q15_t)0x7873,\n    (q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2AEF, (q15_t)0x7895, (q15_t)0x2AC0,\n    (q15_t)0x78A6, (q15_t)0x2A91, (q15_t)0x78B6, (q15_t)0x2A61, (q15_t)0x78C7,\n    (q15_t)0x2A32, (q15_t)0x78D8, (q15_t)0x2A02, (q15_t)0x78E8, (q15_t)0x29D3,\n    (q15_t)0x78F9, (q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x2974, (q15_t)0x7919,\n    (q15_t)0x2944, (q15_t)0x792A, (q15_t)0x2915, (q15_t)0x793A, (q15_t)0x28E5,\n    (q15_t)0x794A, (q15_t)0x28B5, (q15_t)0x795A, (q15_t)0x2886, (q15_t)0x796A,\n    (q15_t)0x2856, (q15_t)0x797A, (q15_t)0x2826, (q15_t)0x798A, (q15_t)0x27F6,\n    (q15_t)0x7999, (q15_t)0x27C7, (q15_t)0x79A9, (q15_t)0x2797, (q15_t)0x79B9,\n    (q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x2737, (q15_t)0x79D8, (q15_t)0x2707,\n    (q15_t)0x79E7, (q15_t)0x26D8, (q15_t)0x79F6, (q15_t)0x26A8, (q15_t)0x7A05,\n    (q15_t)0x2678, (q15_t)0x7A15, (q15_t)0x2648, (q15_t)0x7A24, (q15_t)0x2618,\n    (q15_t)0x7A33, (q15_t)0x25E8, (q15_t)0x7A42, (q15_t)0x25B8, (q15_t)0x7A50,\n    (q15_t)0x2588, (q15_t)0x7A5F, (q15_t)0x2558, (q15_t)0x7A6E, (q15_t)0x2528,\n    (q15_t)0x7A7D, (q15_t)0x24F7, (q15_t)0x7A8B, (q15_t)0x24C7, (q15_t)0x7A9A,\n    (q15_t)0x2497, (q15_t)0x7AA8, (q15_t)0x2467, (q15_t)0x7AB6, (q15_t)0x2437,\n    (q15_t)0x7AC5, (q15_t)0x2407, (q15_t)0x7AD3, (q15_t)0x23D6, (q15_t)0x7AE1,\n    (q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2376, (q15_t)0x7AFD, (q15_t)0x2345,\n    (q15_t)0x7B0B, (q15_t)0x2315, (q15_t)0x7B19, (q15_t)0x22E5, (q15_t)0x7B26,\n    (q15_t)0x22B4, (q15_t)0x7B34, (q15_t)0x2284, (q15_t)0x7B42, (q15_t)0x2254,\n    (q15_t)0x7B4F, (q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x21F3, (q15_t)0x7B6A,\n    (q15_t)0x21C2, (q15_t)0x7B77, (q15_t)0x2192, (q15_t)0x7B84, (q15_t)0x2161,\n    (q15_t)0x7B92, (q15_t)0x2131, (q15_t)0x7B9F, (q15_t)0x2100, (q15_t)0x7BAC,\n    (q15_t)0x20D0, (q15_t)0x7BB9, (q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x206E,\n    (q15_t)0x7BD2, (q15_t)0x203E, (q15_t)0x7BDF, (q15_t)0x200D, (q15_t)0x7BEB,\n    (q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1FAC, (q15_t)0x7C05, (q15_t)0x1F7B,\n    (q15_t)0x7C11, (q15_t)0x1F4A, (q15_t)0x7C1D, (q15_t)0x1F19, (q15_t)0x7C29,\n    (q15_t)0x1EE9, (q15_t)0x7C36, (q15_t)0x1EB8, (q15_t)0x7C42, (q15_t)0x1E87,\n    (q15_t)0x7C4E, (q15_t)0x1E56, (q15_t)0x7C5A, (q15_t)0x1E25, (q15_t)0x7C66,\n    (q15_t)0x1DF5, (q15_t)0x7C71, (q15_t)0x1DC4, (q15_t)0x7C7D, (q15_t)0x1D93,\n    (q15_t)0x7C89, (q15_t)0x1D62, (q15_t)0x7C94, (q15_t)0x1D31, (q15_t)0x7CA0,\n    (q15_t)0x1D00, (q15_t)0x7CAB, (q15_t)0x1CCF, (q15_t)0x7CB7, (q15_t)0x1C9E,\n    (q15_t)0x7CC2, (q15_t)0x1C6D, (q15_t)0x7CCD, (q15_t)0x1C3C, (q15_t)0x7CD8,\n    (q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1BDA, (q15_t)0x7CEE, (q15_t)0x1BA9,\n    (q15_t)0x7CF9, (q15_t)0x1B78, (q15_t)0x7D04, (q15_t)0x1B47, (q15_t)0x7D0F,\n    (q15_t)0x1B16, (q15_t)0x7D19, (q15_t)0x1AE4, (q15_t)0x7D24, (q15_t)0x1AB3,\n    (q15_t)0x7D2F, (q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x1A51, (q15_t)0x7D43,\n    (q15_t)0x1A20, (q15_t)0x7D4E, (q15_t)0x19EF, (q15_t)0x7D58, (q15_t)0x19BD,\n    (q15_t)0x7D62, (q15_t)0x198C, (q15_t)0x7D6C, (q15_t)0x195B, (q15_t)0x7D76,\n    (q15_t)0x192A, (q15_t)0x7D80, (q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x18C7,\n    (q15_t)0x7D94, (q15_t)0x1896, (q15_t)0x7D9D, (q15_t)0x1864, (q15_t)0x7DA7,\n    (q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x1802, (q15_t)0x7DBA, (q15_t)0x17D0,\n    (q15_t)0x7DC3, (q15_t)0x179F, (q15_t)0x7DCD, (q15_t)0x176D, (q15_t)0x7DD6,\n    (q15_t)0x173C, (q15_t)0x7DDF, (q15_t)0x170A, (q15_t)0x7DE8, (q15_t)0x16D9,\n    (q15_t)0x7DF1, (q15_t)0x16A8, (q15_t)0x7DFA, (q15_t)0x1676, (q15_t)0x7E03,\n    (q15_t)0x1645, (q15_t)0x7E0C, (q15_t)0x1613, (q15_t)0x7E14, (q15_t)0x15E2,\n    (q15_t)0x7E1D, (q15_t)0x15B0, (q15_t)0x7E26, (q15_t)0x157F, (q15_t)0x7E2E,\n    (q15_t)0x154D, (q15_t)0x7E37, (q15_t)0x151B, (q15_t)0x7E3F, (q15_t)0x14EA,\n    (q15_t)0x7E47, (q15_t)0x14B8, (q15_t)0x7E4F, (q15_t)0x1487, (q15_t)0x7E57,\n    (q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x1423, (q15_t)0x7E67, (q15_t)0x13F2,\n    (q15_t)0x7E6F, (q15_t)0x13C0, (q15_t)0x7E77, (q15_t)0x138E, (q15_t)0x7E7F,\n    (q15_t)0x135D, (q15_t)0x7E86, (q15_t)0x132B, (q15_t)0x7E8E, (q15_t)0x12F9,\n    (q15_t)0x7E95, (q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1296, (q15_t)0x7EA4,\n    (q15_t)0x1264, (q15_t)0x7EAB, (q15_t)0x1232, (q15_t)0x7EB3, (q15_t)0x1201,\n    (q15_t)0x7EBA, (q15_t)0x11CF, (q15_t)0x7EC1, (q15_t)0x119D, (q15_t)0x7EC8,\n    (q15_t)0x116B, (q15_t)0x7ECF, (q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x1108,\n    (q15_t)0x7EDC, (q15_t)0x10D6, (q15_t)0x7EE3, (q15_t)0x10A4, (q15_t)0x7EE9,\n    (q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x1040, (q15_t)0x7EF6, (q15_t)0x100E,\n    (q15_t)0x7EFD, (q15_t)0x0FDD, (q15_t)0x7F03, (q15_t)0x0FAB, (q15_t)0x7F09,\n    (q15_t)0x0F79, (q15_t)0x7F0F, (q15_t)0x0F47, (q15_t)0x7F15, (q15_t)0x0F15,\n    (q15_t)0x7F1B, (q15_t)0x0EE3, (q15_t)0x7F21, (q15_t)0x0EB1, (q15_t)0x7F27,\n    (q15_t)0x0E7F, (q15_t)0x7F2D, (q15_t)0x0E4D, (q15_t)0x7F32, (q15_t)0x0E1B,\n    (q15_t)0x7F38, (q15_t)0x0DE9, (q15_t)0x7F3D, (q15_t)0x0DB7, (q15_t)0x7F43,\n    (q15_t)0x0D85, (q15_t)0x7F48, (q15_t)0x0D53, (q15_t)0x7F4D, (q15_t)0x0D21,\n    (q15_t)0x7F53, (q15_t)0x0CEF, (q15_t)0x7F58, (q15_t)0x0CBD, (q15_t)0x7F5D,\n    (q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0C59, (q15_t)0x7F67, (q15_t)0x0C27,\n    (q15_t)0x7F6B, (q15_t)0x0BF5, (q15_t)0x7F70, (q15_t)0x0BC3, (q15_t)0x7F75,\n    (q15_t)0x0B91, (q15_t)0x7F79, (q15_t)0x0B5F, (q15_t)0x7F7E, (q15_t)0x0B2D,\n    (q15_t)0x7F82, (q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0AC9, (q15_t)0x7F8B,\n    (q15_t)0x0A97, (q15_t)0x7F8F, (q15_t)0x0A65, (q15_t)0x7F93, (q15_t)0x0A33,\n    (q15_t)0x7F97, (q15_t)0x0A00, (q15_t)0x7F9B, (q15_t)0x09CE, (q15_t)0x7F9F,\n    (q15_t)0x099C, (q15_t)0x7FA3, (q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0938,\n    (q15_t)0x7FAA, (q15_t)0x0906, (q15_t)0x7FAE, (q15_t)0x08D4, (q15_t)0x7FB1,\n    (q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x086F, (q15_t)0x7FB8, (q15_t)0x083D,\n    (q15_t)0x7FBC, (q15_t)0x080B, (q15_t)0x7FBF, (q15_t)0x07D9, (q15_t)0x7FC2,\n    (q15_t)0x07A7, (q15_t)0x7FC5, (q15_t)0x0775, (q15_t)0x7FC8, (q15_t)0x0742,\n    (q15_t)0x7FCB, (q15_t)0x0710, (q15_t)0x7FCE, (q15_t)0x06DE, (q15_t)0x7FD0,\n    (q15_t)0x06AC, (q15_t)0x7FD3, (q15_t)0x067A, (q15_t)0x7FD6, (q15_t)0x0647,\n    (q15_t)0x7FD8, (q15_t)0x0615, (q15_t)0x7FDA, (q15_t)0x05E3, (q15_t)0x7FDD,\n    (q15_t)0x05B1, (q15_t)0x7FDF, (q15_t)0x057F, (q15_t)0x7FE1, (q15_t)0x054C,\n    (q15_t)0x7FE3, (q15_t)0x051A, (q15_t)0x7FE5, (q15_t)0x04E8, (q15_t)0x7FE7,\n    (q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0483, (q15_t)0x7FEB, (q15_t)0x0451,\n    (q15_t)0x7FED, (q15_t)0x041F, (q15_t)0x7FEE, (q15_t)0x03ED, (q15_t)0x7FF0,\n    (q15_t)0x03BA, (q15_t)0x7FF2, (q15_t)0x0388, (q15_t)0x7FF3, (q15_t)0x0356,\n    (q15_t)0x7FF4, (q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x02F1, (q15_t)0x7FF7,\n    (q15_t)0x02BF, (q15_t)0x7FF8, (q15_t)0x028D, (q15_t)0x7FF9, (q15_t)0x025B,\n    (q15_t)0x7FFA, (q15_t)0x0228, (q15_t)0x7FFB, (q15_t)0x01F6, (q15_t)0x7FFC,\n    (q15_t)0x01C4, (q15_t)0x7FFC, (q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x015F,\n    (q15_t)0x7FFE, (q15_t)0x012D, (q15_t)0x7FFE, (q15_t)0x00FB, (q15_t)0x7FFF,\n    (q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0096, (q15_t)0x7FFF, (q15_t)0x0064,\n    (q15_t)0x7FFF, (q15_t)0x0032, (q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF,\n    (q15_t)0xFFCD, (q15_t)0x7FFF, (q15_t)0xFF9B, (q15_t)0x7FFF, (q15_t)0xFF69,\n    (q15_t)0x7FFF, (q15_t)0xFF36, (q15_t)0x7FFF, (q15_t)0xFF04, (q15_t)0x7FFF,\n    (q15_t)0xFED2, (q15_t)0x7FFE, (q15_t)0xFEA0, (q15_t)0x7FFE, (q15_t)0xFE6D,\n    (q15_t)0x7FFD, (q15_t)0xFE3B, (q15_t)0x7FFC, (q15_t)0xFE09, (q15_t)0x7FFC,\n    (q15_t)0xFDD7, (q15_t)0x7FFB, (q15_t)0xFDA4, (q15_t)0x7FFA, (q15_t)0xFD72,\n    (q15_t)0x7FF9, (q15_t)0xFD40, (q15_t)0x7FF8, (q15_t)0xFD0E, (q15_t)0x7FF7,\n    (q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFCA9, (q15_t)0x7FF4, (q15_t)0xFC77,\n    (q15_t)0x7FF3, (q15_t)0xFC45, (q15_t)0x7FF2, (q15_t)0xFC12, (q15_t)0x7FF0,\n    (q15_t)0xFBE0, (q15_t)0x7FEE, (q15_t)0xFBAE, (q15_t)0x7FED, (q15_t)0xFB7C,\n    (q15_t)0x7FEB, (q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFB17, (q15_t)0x7FE7,\n    (q15_t)0xFAE5, (q15_t)0x7FE5, (q15_t)0xFAB3, (q15_t)0x7FE3, (q15_t)0xFA80,\n    (q15_t)0x7FE1, (q15_t)0xFA4E, (q15_t)0x7FDF, (q15_t)0xFA1C, (q15_t)0x7FDD,\n    (q15_t)0xF9EA, (q15_t)0x7FDA, (q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF985,\n    (q15_t)0x7FD6, (q15_t)0xF953, (q15_t)0x7FD3, (q15_t)0xF921, (q15_t)0x7FD0,\n    (q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF8BD, (q15_t)0x7FCB, (q15_t)0xF88A,\n    (q15_t)0x7FC8, (q15_t)0xF858, (q15_t)0x7FC5, (q15_t)0xF826, (q15_t)0x7FC2,\n    (q15_t)0xF7F4, (q15_t)0x7FBF, (q15_t)0xF7C2, (q15_t)0x7FBC, (q15_t)0xF790,\n    (q15_t)0x7FB8, (q15_t)0xF75D, (q15_t)0x7FB5, (q15_t)0xF72B, (q15_t)0x7FB1,\n    (q15_t)0xF6F9, (q15_t)0x7FAE, (q15_t)0xF6C7, (q15_t)0x7FAA, (q15_t)0xF695,\n    (q15_t)0x7FA7, (q15_t)0xF663, (q15_t)0x7FA3, (q15_t)0xF631, (q15_t)0x7F9F,\n    (q15_t)0xF5FF, (q15_t)0x7F9B, (q15_t)0xF5CC, (q15_t)0x7F97, (q15_t)0xF59A,\n    (q15_t)0x7F93, (q15_t)0xF568, (q15_t)0x7F8F, (q15_t)0xF536, (q15_t)0x7F8B,\n    (q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF4D2, (q15_t)0x7F82, (q15_t)0xF4A0,\n    (q15_t)0x7F7E, (q15_t)0xF46E, (q15_t)0x7F79, (q15_t)0xF43C, (q15_t)0x7F75,\n    (q15_t)0xF40A, (q15_t)0x7F70, (q15_t)0xF3D8, (q15_t)0x7F6B, (q15_t)0xF3A6,\n    (q15_t)0x7F67, (q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF342, (q15_t)0x7F5D,\n    (q15_t)0xF310, (q15_t)0x7F58, (q15_t)0xF2DE, (q15_t)0x7F53, (q15_t)0xF2AC,\n    (q15_t)0x7F4D, (q15_t)0xF27A, (q15_t)0x7F48, (q15_t)0xF248, (q15_t)0x7F43,\n    (q15_t)0xF216, (q15_t)0x7F3D, (q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF1B2,\n    (q15_t)0x7F32, (q15_t)0xF180, (q15_t)0x7F2D, (q15_t)0xF14E, (q15_t)0x7F27,\n    (q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF0EA, (q15_t)0x7F1B, (q15_t)0xF0B8,\n    (q15_t)0x7F15, (q15_t)0xF086, (q15_t)0x7F0F, (q15_t)0xF054, (q15_t)0x7F09,\n    (q15_t)0xF022, (q15_t)0x7F03, (q15_t)0xEFF1, (q15_t)0x7EFD, (q15_t)0xEFBF,\n    (q15_t)0x7EF6, (q15_t)0xEF8D, (q15_t)0x7EF0, (q15_t)0xEF5B, (q15_t)0x7EE9,\n    (q15_t)0xEF29, (q15_t)0x7EE3, (q15_t)0xEEF7, (q15_t)0x7EDC, (q15_t)0xEEC6,\n    (q15_t)0x7ED5, (q15_t)0xEE94, (q15_t)0x7ECF, (q15_t)0xEE62, (q15_t)0x7EC8,\n    (q15_t)0xEE30, (q15_t)0x7EC1, (q15_t)0xEDFE, (q15_t)0x7EBA, (q15_t)0xEDCD,\n    (q15_t)0x7EB3, (q15_t)0xED9B, (q15_t)0x7EAB, (q15_t)0xED69, (q15_t)0x7EA4,\n    (q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xED06, (q15_t)0x7E95, (q15_t)0xECD4,\n    (q15_t)0x7E8E, (q15_t)0xECA2, (q15_t)0x7E86, (q15_t)0xEC71, (q15_t)0x7E7F,\n    (q15_t)0xEC3F, (q15_t)0x7E77, (q15_t)0xEC0D, (q15_t)0x7E6F, (q15_t)0xEBDC,\n    (q15_t)0x7E67, (q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEB78, (q15_t)0x7E57,\n    (q15_t)0xEB47, (q15_t)0x7E4F, (q15_t)0xEB15, (q15_t)0x7E47, (q15_t)0xEAE4,\n    (q15_t)0x7E3F, (q15_t)0xEAB2, (q15_t)0x7E37, (q15_t)0xEA80, (q15_t)0x7E2E,\n    (q15_t)0xEA4F, (q15_t)0x7E26, (q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE9EC,\n    (q15_t)0x7E14, (q15_t)0xE9BA, (q15_t)0x7E0C, (q15_t)0xE989, (q15_t)0x7E03,\n    (q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE926, (q15_t)0x7DF1, (q15_t)0xE8F5,\n    (q15_t)0x7DE8, (q15_t)0xE8C3, (q15_t)0x7DDF, (q15_t)0xE892, (q15_t)0x7DD6,\n    (q15_t)0xE860, (q15_t)0x7DCD, (q15_t)0xE82F, (q15_t)0x7DC3, (q15_t)0xE7FD,\n    (q15_t)0x7DBA, (q15_t)0xE7CC, (q15_t)0x7DB0, (q15_t)0xE79B, (q15_t)0x7DA7,\n    (q15_t)0xE769, (q15_t)0x7D9D, (q15_t)0xE738, (q15_t)0x7D94, (q15_t)0xE707,\n    (q15_t)0x7D8A, (q15_t)0xE6D5, (q15_t)0x7D80, (q15_t)0xE6A4, (q15_t)0x7D76,\n    (q15_t)0xE673, (q15_t)0x7D6C, (q15_t)0xE642, (q15_t)0x7D62, (q15_t)0xE610,\n    (q15_t)0x7D58, (q15_t)0xE5DF, (q15_t)0x7D4E, (q15_t)0xE5AE, (q15_t)0x7D43,\n    (q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE54C, (q15_t)0x7D2F, (q15_t)0xE51B,\n    (q15_t)0x7D24, (q15_t)0xE4E9, (q15_t)0x7D19, (q15_t)0xE4B8, (q15_t)0x7D0F,\n    (q15_t)0xE487, (q15_t)0x7D04, (q15_t)0xE456, (q15_t)0x7CF9, (q15_t)0xE425,\n    (q15_t)0x7CEE, (q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE3C3, (q15_t)0x7CD8,\n    (q15_t)0xE392, (q15_t)0x7CCD, (q15_t)0xE361, (q15_t)0x7CC2, (q15_t)0xE330,\n    (q15_t)0x7CB7, (q15_t)0xE2FF, (q15_t)0x7CAB, (q15_t)0xE2CE, (q15_t)0x7CA0,\n    (q15_t)0xE29D, (q15_t)0x7C94, (q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE23B,\n    (q15_t)0x7C7D, (q15_t)0xE20A, (q15_t)0x7C71, (q15_t)0xE1DA, (q15_t)0x7C66,\n    (q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE178, (q15_t)0x7C4E, (q15_t)0xE147,\n    (q15_t)0x7C42, (q15_t)0xE116, (q15_t)0x7C36, (q15_t)0xE0E6, (q15_t)0x7C29,\n    (q15_t)0xE0B5, (q15_t)0x7C1D, (q15_t)0xE084, (q15_t)0x7C11, (q15_t)0xE053,\n    (q15_t)0x7C05, (q15_t)0xE023, (q15_t)0x7BF8, (q15_t)0xDFF2, (q15_t)0x7BEB,\n    (q15_t)0xDFC1, (q15_t)0x7BDF, (q15_t)0xDF91, (q15_t)0x7BD2, (q15_t)0xDF60,\n    (q15_t)0x7BC5, (q15_t)0xDF2F, (q15_t)0x7BB9, (q15_t)0xDEFF, (q15_t)0x7BAC,\n    (q15_t)0xDECE, (q15_t)0x7B9F, (q15_t)0xDE9E, (q15_t)0x7B92, (q15_t)0xDE6D,\n    (q15_t)0x7B84, (q15_t)0xDE3D, (q15_t)0x7B77, (q15_t)0xDE0C, (q15_t)0x7B6A,\n    (q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDDAB, (q15_t)0x7B4F, (q15_t)0xDD7B,\n    (q15_t)0x7B42, (q15_t)0xDD4B, (q15_t)0x7B34, (q15_t)0xDD1A, (q15_t)0x7B26,\n    (q15_t)0xDCEA, (q15_t)0x7B19, (q15_t)0xDCBA, (q15_t)0x7B0B, (q15_t)0xDC89,\n    (q15_t)0x7AFD, (q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDC29, (q15_t)0x7AE1,\n    (q15_t)0xDBF8, (q15_t)0x7AD3, (q15_t)0xDBC8, (q15_t)0x7AC5, (q15_t)0xDB98,\n    (q15_t)0x7AB6, (q15_t)0xDB68, (q15_t)0x7AA8, (q15_t)0xDB38, (q15_t)0x7A9A,\n    (q15_t)0xDB08, (q15_t)0x7A8B, (q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDAA7,\n    (q15_t)0x7A6E, (q15_t)0xDA77, (q15_t)0x7A5F, (q15_t)0xDA47, (q15_t)0x7A50,\n    (q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD9E7, (q15_t)0x7A33, (q15_t)0xD9B7,\n    (q15_t)0x7A24, (q15_t)0xD987, (q15_t)0x7A15, (q15_t)0xD957, (q15_t)0x7A05,\n    (q15_t)0xD927, (q15_t)0x79F6, (q15_t)0xD8F8, (q15_t)0x79E7, (q15_t)0xD8C8,\n    (q15_t)0x79D8, (q15_t)0xD898, (q15_t)0x79C8, (q15_t)0xD868, (q15_t)0x79B9,\n    (q15_t)0xD838, (q15_t)0x79A9, (q15_t)0xD809, (q15_t)0x7999, (q15_t)0xD7D9,\n    (q15_t)0x798A, (q15_t)0xD7A9, (q15_t)0x797A, (q15_t)0xD779, (q15_t)0x796A,\n    (q15_t)0xD74A, (q15_t)0x795A, (q15_t)0xD71A, (q15_t)0x794A, (q15_t)0xD6EA,\n    (q15_t)0x793A, (q15_t)0xD6BB, (q15_t)0x792A, (q15_t)0xD68B, (q15_t)0x7919,\n    (q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD62C, (q15_t)0x78F9, (q15_t)0xD5FD,\n    (q15_t)0x78E8, (q15_t)0xD5CD, (q15_t)0x78D8, (q15_t)0xD59E, (q15_t)0x78C7,\n    (q15_t)0xD56E, (q15_t)0x78B6, (q15_t)0xD53F, (q15_t)0x78A6, (q15_t)0xD510,\n    (q15_t)0x7895, (q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD4B1, (q15_t)0x7873,\n    (q15_t)0xD482, (q15_t)0x7862, (q15_t)0xD452, (q15_t)0x7851, (q15_t)0xD423,\n    (q15_t)0x7840, (q15_t)0xD3F4, (q15_t)0x782E, (q15_t)0xD3C5, (q15_t)0x781D,\n    (q15_t)0xD396, (q15_t)0x780C, (q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD337,\n    (q15_t)0x77E9, (q15_t)0xD308, (q15_t)0x77D7, (q15_t)0xD2D9, (q15_t)0x77C5,\n    (q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD27B, (q15_t)0x77A2, (q15_t)0xD24C,\n    (q15_t)0x7790, (q15_t)0xD21D, (q15_t)0x777E, (q15_t)0xD1EE, (q15_t)0x776C,\n    (q15_t)0xD1C0, (q15_t)0x775A, (q15_t)0xD191, (q15_t)0x7747, (q15_t)0xD162,\n    (q15_t)0x7735, (q15_t)0xD133, (q15_t)0x7723, (q15_t)0xD104, (q15_t)0x7710,\n    (q15_t)0xD0D6, (q15_t)0x76FE, (q15_t)0xD0A7, (q15_t)0x76EB, (q15_t)0xD078,\n    (q15_t)0x76D9, (q15_t)0xD04A, (q15_t)0x76C6, (q15_t)0xD01B, (q15_t)0x76B3,\n    (q15_t)0xCFEC, (q15_t)0x76A0, (q15_t)0xCFBE, (q15_t)0x768E, (q15_t)0xCF8F,\n    (q15_t)0x767B, (q15_t)0xCF61, (q15_t)0x7668, (q15_t)0xCF32, (q15_t)0x7654,\n    (q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCED5, (q15_t)0x762E, (q15_t)0xCEA7,\n    (q15_t)0x761B, (q15_t)0xCE79, (q15_t)0x7607, (q15_t)0xCE4A, (q15_t)0x75F4,\n    (q15_t)0xCE1C, (q15_t)0x75E0, (q15_t)0xCDEE, (q15_t)0x75CC, (q15_t)0xCDBF,\n    (q15_t)0x75B9, (q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCD63, (q15_t)0x7591,\n    (q15_t)0xCD35, (q15_t)0x757D, (q15_t)0xCD07, (q15_t)0x7569, (q15_t)0xCCD9,\n    (q15_t)0x7555, (q15_t)0xCCAB, (q15_t)0x7541, (q15_t)0xCC7D, (q15_t)0x752D,\n    (q15_t)0xCC4F, (q15_t)0x7519, (q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCBF3,\n    (q15_t)0x74F0, (q15_t)0xCBC5, (q15_t)0x74DB, (q15_t)0xCB97, (q15_t)0x74C7,\n    (q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCB3B, (q15_t)0x749E, (q15_t)0xCB0D,\n    (q15_t)0x7489, (q15_t)0xCAE0, (q15_t)0x7474, (q15_t)0xCAB2, (q15_t)0x745F,\n    (q15_t)0xCA84, (q15_t)0x744A, (q15_t)0xCA57, (q15_t)0x7435, (q15_t)0xCA29,\n    (q15_t)0x7420, (q15_t)0xC9FB, (q15_t)0x740B, (q15_t)0xC9CE, (q15_t)0x73F6,\n    (q15_t)0xC9A0, (q15_t)0x73E0, (q15_t)0xC973, (q15_t)0x73CB, (q15_t)0xC945,\n    (q15_t)0x73B5, (q15_t)0xC918, (q15_t)0x73A0, (q15_t)0xC8EB, (q15_t)0x738A,\n    (q15_t)0xC8BD, (q15_t)0x7375, (q15_t)0xC890, (q15_t)0x735F, (q15_t)0xC863,\n    (q15_t)0x7349, (q15_t)0xC835, (q15_t)0x7333, (q15_t)0xC808, (q15_t)0x731D,\n    (q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC7AE, (q15_t)0x72F1, (q15_t)0xC781,\n    (q15_t)0x72DB, (q15_t)0xC754, (q15_t)0x72C5, (q15_t)0xC727, (q15_t)0x72AF,\n    (q15_t)0xC6F9, (q15_t)0x7298, (q15_t)0xC6CD, (q15_t)0x7282, (q15_t)0xC6A0,\n    (q15_t)0x726B, (q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC646, (q15_t)0x723E,\n    (q15_t)0xC619, (q15_t)0x7227, (q15_t)0xC5EC, (q15_t)0x7211, (q15_t)0xC5BF,\n    (q15_t)0x71FA, (q15_t)0xC593, (q15_t)0x71E3, (q15_t)0xC566, (q15_t)0x71CC,\n    (q15_t)0xC539, (q15_t)0x71B5, (q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC4E0,\n    (q15_t)0x7186, (q15_t)0xC4B3, (q15_t)0x716F, (q15_t)0xC487, (q15_t)0x7158,\n    (q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC42E, (q15_t)0x7129, (q15_t)0xC402,\n    (q15_t)0x7112, (q15_t)0xC3D5, (q15_t)0x70FA, (q15_t)0xC3A9, (q15_t)0x70E2,\n    (q15_t)0xC37C, (q15_t)0x70CB, (q15_t)0xC350, (q15_t)0x70B3, (q15_t)0xC324,\n    (q15_t)0x709B, (q15_t)0xC2F8, (q15_t)0x7083, (q15_t)0xC2CC, (q15_t)0x706B,\n    (q15_t)0xC29F, (q15_t)0x7053, (q15_t)0xC273, (q15_t)0x703B, (q15_t)0xC247,\n    (q15_t)0x7023, (q15_t)0xC21B, (q15_t)0x700A, (q15_t)0xC1EF, (q15_t)0x6FF2,\n    (q15_t)0xC1C3, (q15_t)0x6FDA, (q15_t)0xC197, (q15_t)0x6FC1, (q15_t)0xC16C,\n    (q15_t)0x6FA9, (q15_t)0xC140, (q15_t)0x6F90, (q15_t)0xC114, (q15_t)0x6F77,\n    (q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC0BC, (q15_t)0x6F46, (q15_t)0xC091,\n    (q15_t)0x6F2D, (q15_t)0xC065, (q15_t)0x6F14, (q15_t)0xC03A, (q15_t)0x6EFB,\n    (q15_t)0xC00E, (q15_t)0x6EE2, (q15_t)0xBFE2, (q15_t)0x6EC9, (q15_t)0xBFB7,\n    (q15_t)0x6EAF, (q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBF60, (q15_t)0x6E7D,\n    (q15_t)0xBF35, (q15_t)0x6E63, (q15_t)0xBF09, (q15_t)0x6E4A, (q15_t)0xBEDE,\n    (q15_t)0x6E30, (q15_t)0xBEB3, (q15_t)0x6E17, (q15_t)0xBE88, (q15_t)0x6DFD,\n    (q15_t)0xBE5D, (q15_t)0x6DE3, (q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBE06,\n    (q15_t)0x6DB0, (q15_t)0xBDDB, (q15_t)0x6D96, (q15_t)0xBDB0, (q15_t)0x6D7C,\n    (q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBD5A, (q15_t)0x6D48, (q15_t)0xBD2F,\n    (q15_t)0x6D2D, (q15_t)0xBD05, (q15_t)0x6D13, (q15_t)0xBCDA, (q15_t)0x6CF9,\n    (q15_t)0xBCAF, (q15_t)0x6CDE, (q15_t)0xBC84, (q15_t)0x6CC4, (q15_t)0xBC5A,\n    (q15_t)0x6CA9, (q15_t)0xBC2F, (q15_t)0x6C8F, (q15_t)0xBC04, (q15_t)0x6C74,\n    (q15_t)0xBBDA, (q15_t)0x6C59, (q15_t)0xBBAF, (q15_t)0x6C3F, (q15_t)0xBB85,\n    (q15_t)0x6C24, (q15_t)0xBB5A, (q15_t)0x6C09, (q15_t)0xBB30, (q15_t)0x6BEE,\n    (q15_t)0xBB05, (q15_t)0x6BD3, (q15_t)0xBADB, (q15_t)0x6BB8, (q15_t)0xBAB1,\n    (q15_t)0x6B9C, (q15_t)0xBA87, (q15_t)0x6B81, (q15_t)0xBA5C, (q15_t)0x6B66,\n    (q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xBA08, (q15_t)0x6B2F, (q15_t)0xB9DE,\n    (q15_t)0x6B13, (q15_t)0xB9B4, (q15_t)0x6AF8, (q15_t)0xB98A, (q15_t)0x6ADC,\n    (q15_t)0xB960, (q15_t)0x6AC1, (q15_t)0xB936, (q15_t)0x6AA5, (q15_t)0xB90C,\n    (q15_t)0x6A89, (q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB8B9, (q15_t)0x6A51,\n    (q15_t)0xB88F, (q15_t)0x6A35, (q15_t)0xB865, (q15_t)0x6A19, (q15_t)0xB83C,\n    (q15_t)0x69FD, (q15_t)0xB812, (q15_t)0x69E1, (q15_t)0xB7E9, (q15_t)0x69C4,\n    (q15_t)0xB7BF, (q15_t)0x69A8, (q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB76C,\n    (q15_t)0x696F, (q15_t)0xB743, (q15_t)0x6953, (q15_t)0xB719, (q15_t)0x6936,\n    (q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB6C7, (q15_t)0x68FD, (q15_t)0xB69E,\n    (q15_t)0x68E0, (q15_t)0xB675, (q15_t)0x68C3, (q15_t)0xB64B, (q15_t)0x68A6,\n    (q15_t)0xB622, (q15_t)0x6889, (q15_t)0xB5F9, (q15_t)0x686C, (q15_t)0xB5D0,\n    (q15_t)0x684F, (q15_t)0xB5A7, (q15_t)0x6832, (q15_t)0xB57E, (q15_t)0x6815,\n    (q15_t)0xB556, (q15_t)0x67F7, (q15_t)0xB52D, (q15_t)0x67DA, (q15_t)0xB504,\n    (q15_t)0x67BD, (q15_t)0xB4DB, (q15_t)0x679F, (q15_t)0xB4B3, (q15_t)0x6782,\n    (q15_t)0xB48A, (q15_t)0x6764, (q15_t)0xB461, (q15_t)0x6746, (q15_t)0xB439,\n    (q15_t)0x6729, (q15_t)0xB410, (q15_t)0x670B, (q15_t)0xB3E8, (q15_t)0x66ED,\n    (q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB397, (q15_t)0x66B1, (q15_t)0xB36F,\n    (q15_t)0x6693, (q15_t)0xB347, (q15_t)0x6675, (q15_t)0xB31E, (q15_t)0x6657,\n    (q15_t)0xB2F6, (q15_t)0x6639, (q15_t)0xB2CE, (q15_t)0x661A, (q15_t)0xB2A6,\n    (q15_t)0x65FC, (q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB256, (q15_t)0x65BF,\n    (q15_t)0xB22E, (q15_t)0x65A0, (q15_t)0xB206, (q15_t)0x6582, (q15_t)0xB1DE,\n    (q15_t)0x6563, (q15_t)0xB1B7, (q15_t)0x6545, (q15_t)0xB18F, (q15_t)0x6526,\n    (q15_t)0xB167, (q15_t)0x6507, (q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB118,\n    (q15_t)0x64C9, (q15_t)0xB0F0, (q15_t)0x64AA, (q15_t)0xB0C9, (q15_t)0x648B,\n    (q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB07A, (q15_t)0x644D, (q15_t)0xB053,\n    (q15_t)0x642D, (q15_t)0xB02B, (q15_t)0x640E, (q15_t)0xB004, (q15_t)0x63EF,\n    (q15_t)0xAFDD, (q15_t)0x63CF, (q15_t)0xAFB6, (q15_t)0x63B0, (q15_t)0xAF8F,\n    (q15_t)0x6390, (q15_t)0xAF68, (q15_t)0x6371, (q15_t)0xAF40, (q15_t)0x6351,\n    (q15_t)0xAF1A, (q15_t)0x6331, (q15_t)0xAEF3, (q15_t)0x6311, (q15_t)0xAECC,\n    (q15_t)0x62F2, (q15_t)0xAEA5, (q15_t)0x62D2, (q15_t)0xAE7E, (q15_t)0x62B2,\n    (q15_t)0xAE57, (q15_t)0x6292, (q15_t)0xAE31, (q15_t)0x6271, (q15_t)0xAE0A,\n    (q15_t)0x6251, (q15_t)0xADE3, (q15_t)0x6231, (q15_t)0xADBD, (q15_t)0x6211,\n    (q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAD70, (q15_t)0x61D0, (q15_t)0xAD4A,\n    (q15_t)0x61B0, (q15_t)0xAD23, (q15_t)0x618F, (q15_t)0xACFD, (q15_t)0x616F,\n    (q15_t)0xACD7, (q15_t)0x614E, (q15_t)0xACB1, (q15_t)0x612D, (q15_t)0xAC8A,\n    (q15_t)0x610D, (q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAC3E, (q15_t)0x60CB,\n    (q15_t)0xAC18, (q15_t)0x60AA, (q15_t)0xABF2, (q15_t)0x6089, (q15_t)0xABCC,\n    (q15_t)0x6068, (q15_t)0xABA7, (q15_t)0x6047, (q15_t)0xAB81, (q15_t)0x6026,\n    (q15_t)0xAB5B, (q15_t)0x6004, (q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAB10,\n    (q15_t)0x5FC2, (q15_t)0xAAEA, (q15_t)0x5FA0, (q15_t)0xAAC5, (q15_t)0x5F7F,\n    (q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA7A, (q15_t)0x5F3C, (q15_t)0xAA54,\n    (q15_t)0x5F1A, (q15_t)0xAA2F, (q15_t)0x5EF9, (q15_t)0xAA0A, (q15_t)0x5ED7,\n    (q15_t)0xA9E5, (q15_t)0x5EB5, (q15_t)0xA9BF, (q15_t)0x5E93, (q15_t)0xA99A,\n    (q15_t)0x5E71, (q15_t)0xA975, (q15_t)0x5E50, (q15_t)0xA950, (q15_t)0x5E2D,\n    (q15_t)0xA92B, (q15_t)0x5E0B, (q15_t)0xA906, (q15_t)0x5DE9, (q15_t)0xA8E2,\n    (q15_t)0x5DC7, (q15_t)0xA8BD, (q15_t)0x5DA5, (q15_t)0xA898, (q15_t)0x5D83,\n    (q15_t)0xA873, (q15_t)0x5D60, (q15_t)0xA84F, (q15_t)0x5D3E, (q15_t)0xA82A,\n    (q15_t)0x5D1B, (q15_t)0xA806, (q15_t)0x5CF9, (q15_t)0xA7E1, (q15_t)0x5CD6,\n    (q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA798, (q15_t)0x5C91, (q15_t)0xA774,\n    (q15_t)0x5C6E, (q15_t)0xA750, (q15_t)0x5C4B, (q15_t)0xA72B, (q15_t)0x5C29,\n    (q15_t)0xA707, (q15_t)0x5C06, (q15_t)0xA6E3, (q15_t)0x5BE3, (q15_t)0xA6BF,\n    (q15_t)0x5BC0, (q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA677, (q15_t)0x5B79,\n    (q15_t)0xA653, (q15_t)0x5B56, (q15_t)0xA62F, (q15_t)0x5B33, (q15_t)0xA60C,\n    (q15_t)0x5B10, (q15_t)0xA5E8, (q15_t)0x5AEC, (q15_t)0xA5C4, (q15_t)0x5AC9,\n    (q15_t)0xA5A1, (q15_t)0x5AA5, (q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA55A,\n    (q15_t)0x5A5E, (q15_t)0xA536, (q15_t)0x5A3B, (q15_t)0xA513, (q15_t)0x5A17,\n    (q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA4CC, (q15_t)0x59D0, (q15_t)0xA4A9,\n    (q15_t)0x59AC, (q15_t)0xA486, (q15_t)0x5988, (q15_t)0xA462, (q15_t)0x5964,\n    (q15_t)0xA43F, (q15_t)0x5940, (q15_t)0xA41C, (q15_t)0x591C, (q15_t)0xA3F9,\n    (q15_t)0x58F8, (q15_t)0xA3D6, (q15_t)0x58D4, (q15_t)0xA3B4, (q15_t)0x58AF,\n    (q15_t)0xA391, (q15_t)0x588B, (q15_t)0xA36E, (q15_t)0x5867, (q15_t)0xA34B,\n    (q15_t)0x5842, (q15_t)0xA329, (q15_t)0x581E, (q15_t)0xA306, (q15_t)0x57F9,\n    (q15_t)0xA2E4, (q15_t)0x57D5, (q15_t)0xA2C1, (q15_t)0x57B0, (q15_t)0xA29F,\n    (q15_t)0x578C, (q15_t)0xA27C, (q15_t)0x5767, (q15_t)0xA25A, (q15_t)0x5742,\n    (q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA216, (q15_t)0x56F9, (q15_t)0xA1F4,\n    (q15_t)0x56D4, (q15_t)0xA1D2, (q15_t)0x56AF, (q15_t)0xA1AF, (q15_t)0x568A,\n    (q15_t)0xA18E, (q15_t)0x5665, (q15_t)0xA16C, (q15_t)0x5640, (q15_t)0xA14A,\n    (q15_t)0x561A, (q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA106, (q15_t)0x55D0,\n    (q15_t)0xA0E5, (q15_t)0x55AB, (q15_t)0xA0C3, (q15_t)0x5585, (q15_t)0xA0A1,\n    (q15_t)0x5560, (q15_t)0xA080, (q15_t)0x553A, (q15_t)0xA05F, (q15_t)0x5515,\n    (q15_t)0xA03D, (q15_t)0x54EF, (q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9FFB,\n    (q15_t)0x54A4, (q15_t)0x9FD9, (q15_t)0x547E, (q15_t)0x9FB8, (q15_t)0x5458,\n    (q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F76, (q15_t)0x540D, (q15_t)0x9F55,\n    (q15_t)0x53E7, (q15_t)0x9F34, (q15_t)0x53C1, (q15_t)0x9F13, (q15_t)0x539B,\n    (q15_t)0x9EF2, (q15_t)0x5375, (q15_t)0x9ED2, (q15_t)0x534E, (q15_t)0x9EB1,\n    (q15_t)0x5328, (q15_t)0x9E90, (q15_t)0x5302, (q15_t)0x9E70, (q15_t)0x52DC,\n    (q15_t)0x9E4F, (q15_t)0x52B5, (q15_t)0x9E2F, (q15_t)0x528F, (q15_t)0x9E0E,\n    (q15_t)0x5269, (q15_t)0x9DEE, (q15_t)0x5242, (q15_t)0x9DCE, (q15_t)0x521C,\n    (q15_t)0x9DAE, (q15_t)0x51F5, (q15_t)0x9D8E, (q15_t)0x51CE, (q15_t)0x9D6D,\n    (q15_t)0x51A8, (q15_t)0x9D4D, (q15_t)0x5181, (q15_t)0x9D2D, (q15_t)0x515A,\n    (q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9CEE, (q15_t)0x510C, (q15_t)0x9CCE,\n    (q15_t)0x50E5, (q15_t)0x9CAE, (q15_t)0x50BF, (q15_t)0x9C8E, (q15_t)0x5097,\n    (q15_t)0x9C6F, (q15_t)0x5070, (q15_t)0x9C4F, (q15_t)0x5049, (q15_t)0x9C30,\n    (q15_t)0x5022, (q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9BF1, (q15_t)0x4FD4,\n    (q15_t)0x9BD2, (q15_t)0x4FAC, (q15_t)0x9BB2, (q15_t)0x4F85, (q15_t)0x9B93,\n    (q15_t)0x4F5E, (q15_t)0x9B74, (q15_t)0x4F36, (q15_t)0x9B55, (q15_t)0x4F0F,\n    (q15_t)0x9B36, (q15_t)0x4EE7, (q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9AF8,\n    (q15_t)0x4E98, (q15_t)0x9AD9, (q15_t)0x4E70, (q15_t)0x9ABA, (q15_t)0x4E48,\n    (q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A7D, (q15_t)0x4DF9, (q15_t)0x9A5F,\n    (q15_t)0x4DD1, (q15_t)0x9A40, (q15_t)0x4DA9, (q15_t)0x9A22, (q15_t)0x4D81,\n    (q15_t)0x9A03, (q15_t)0x4D59, (q15_t)0x99E5, (q15_t)0x4D31, (q15_t)0x99C6,\n    (q15_t)0x4D09, (q15_t)0x99A8, (q15_t)0x4CE1, (q15_t)0x998A, (q15_t)0x4CB8,\n    (q15_t)0x996C, (q15_t)0x4C90, (q15_t)0x994E, (q15_t)0x4C68, (q15_t)0x9930,\n    (q15_t)0x4C3F, (q15_t)0x9912, (q15_t)0x4C17, (q15_t)0x98F4, (q15_t)0x4BEF,\n    (q15_t)0x98D6, (q15_t)0x4BC6, (q15_t)0x98B9, (q15_t)0x4B9E, (q15_t)0x989B,\n    (q15_t)0x4B75, (q15_t)0x987D, (q15_t)0x4B4C, (q15_t)0x9860, (q15_t)0x4B24,\n    (q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9825, (q15_t)0x4AD2, (q15_t)0x9808,\n    (q15_t)0x4AA9, (q15_t)0x97EA, (q15_t)0x4A81, (q15_t)0x97CD, (q15_t)0x4A58,\n    (q15_t)0x97B0, (q15_t)0x4A2F, (q15_t)0x9793, (q15_t)0x4A06, (q15_t)0x9776,\n    (q15_t)0x49DD, (q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x973C, (q15_t)0x498A,\n    (q15_t)0x971F, (q15_t)0x4961, (q15_t)0x9702, (q15_t)0x4938, (q15_t)0x96E6,\n    (q15_t)0x490F, (q15_t)0x96C9, (q15_t)0x48E6, (q15_t)0x96AC, (q15_t)0x48BC,\n    (q15_t)0x9690, (q15_t)0x4893, (q15_t)0x9673, (q15_t)0x4869, (q15_t)0x9657,\n    (q15_t)0x4840, (q15_t)0x963B, (q15_t)0x4816, (q15_t)0x961E, (q15_t)0x47ED,\n    (q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x95E6, (q15_t)0x479A, (q15_t)0x95CA,\n    (q15_t)0x4770, (q15_t)0x95AE, (q15_t)0x4746, (q15_t)0x9592, (q15_t)0x471C,\n    (q15_t)0x9576, (q15_t)0x46F3, (q15_t)0x955A, (q15_t)0x46C9, (q15_t)0x953E,\n    (q15_t)0x469F, (q15_t)0x9523, (q15_t)0x4675, (q15_t)0x9507, (q15_t)0x464B,\n    (q15_t)0x94EC, (q15_t)0x4621, (q15_t)0x94D0, (q15_t)0x45F7, (q15_t)0x94B5,\n    (q15_t)0x45CD, (q15_t)0x9499, (q15_t)0x45A3, (q15_t)0x947E, (q15_t)0x4578,\n    (q15_t)0x9463, (q15_t)0x454E, (q15_t)0x9447, (q15_t)0x4524, (q15_t)0x942C,\n    (q15_t)0x44FA, (q15_t)0x9411, (q15_t)0x44CF, (q15_t)0x93F6, (q15_t)0x44A5,\n    (q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x93C0, (q15_t)0x4450, (q15_t)0x93A6,\n    (q15_t)0x4425, (q15_t)0x938B, (q15_t)0x43FB, (q15_t)0x9370, (q15_t)0x43D0,\n    (q15_t)0x9356, (q15_t)0x43A5, (q15_t)0x933B, (q15_t)0x437B, (q15_t)0x9321,\n    (q15_t)0x4350, (q15_t)0x9306, (q15_t)0x4325, (q15_t)0x92EC, (q15_t)0x42FA,\n    (q15_t)0x92D2, (q15_t)0x42D0, (q15_t)0x92B7, (q15_t)0x42A5, (q15_t)0x929D,\n    (q15_t)0x427A, (q15_t)0x9283, (q15_t)0x424F, (q15_t)0x9269, (q15_t)0x4224,\n    (q15_t)0x924F, (q15_t)0x41F9, (q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x921C,\n    (q15_t)0x41A2, (q15_t)0x9202, (q15_t)0x4177, (q15_t)0x91E8, (q15_t)0x414C,\n    (q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x91B5, (q15_t)0x40F6, (q15_t)0x919C,\n    (q15_t)0x40CA, (q15_t)0x9182, (q15_t)0x409F, (q15_t)0x9169, (q15_t)0x4073,\n    (q15_t)0x9150, (q15_t)0x4048, (q15_t)0x9136, (q15_t)0x401D, (q15_t)0x911D,\n    (q15_t)0x3FF1, (q15_t)0x9104, (q15_t)0x3FC5, (q15_t)0x90EB, (q15_t)0x3F9A,\n    (q15_t)0x90D2, (q15_t)0x3F6E, (q15_t)0x90B9, (q15_t)0x3F43, (q15_t)0x90A0,\n    (q15_t)0x3F17, (q15_t)0x9088, (q15_t)0x3EEB, (q15_t)0x906F, (q15_t)0x3EBF,\n    (q15_t)0x9056, (q15_t)0x3E93, (q15_t)0x903E, (q15_t)0x3E68, (q15_t)0x9025,\n    (q15_t)0x3E3C, (q15_t)0x900D, (q15_t)0x3E10, (q15_t)0x8FF5, (q15_t)0x3DE4,\n    (q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8FC4, (q15_t)0x3D8C, (q15_t)0x8FAC,\n    (q15_t)0x3D60, (q15_t)0x8F94, (q15_t)0x3D33, (q15_t)0x8F7C, (q15_t)0x3D07,\n    (q15_t)0x8F64, (q15_t)0x3CDB, (q15_t)0x8F4C, (q15_t)0x3CAF, (q15_t)0x8F34,\n    (q15_t)0x3C83, (q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8F05, (q15_t)0x3C2A,\n    (q15_t)0x8EED, (q15_t)0x3BFD, (q15_t)0x8ED6, (q15_t)0x3BD1, (q15_t)0x8EBE,\n    (q15_t)0x3BA5, (q15_t)0x8EA7, (q15_t)0x3B78, (q15_t)0x8E90, (q15_t)0x3B4C,\n    (q15_t)0x8E79, (q15_t)0x3B1F, (q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E4A,\n    (q15_t)0x3AC6, (q15_t)0x8E33, (q15_t)0x3A99, (q15_t)0x8E1C, (q15_t)0x3A6C,\n    (q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DEE, (q15_t)0x3A13, (q15_t)0x8DD8,\n    (q15_t)0x39E6, (q15_t)0x8DC1, (q15_t)0x39B9, (q15_t)0x8DAA, (q15_t)0x398C,\n    (q15_t)0x8D94, (q15_t)0x395F, (q15_t)0x8D7D, (q15_t)0x3932, (q15_t)0x8D67,\n    (q15_t)0x3906, (q15_t)0x8D50, (q15_t)0x38D8, (q15_t)0x8D3A, (q15_t)0x38AB,\n    (q15_t)0x8D24, (q15_t)0x387E, (q15_t)0x8D0E, (q15_t)0x3851, (q15_t)0x8CF8,\n    (q15_t)0x3824, (q15_t)0x8CE2, (q15_t)0x37F7, (q15_t)0x8CCC, (q15_t)0x37CA,\n    (q15_t)0x8CB6, (q15_t)0x379C, (q15_t)0x8CA0, (q15_t)0x376F, (q15_t)0x8C8A,\n    (q15_t)0x3742, (q15_t)0x8C75, (q15_t)0x3714, (q15_t)0x8C5F, (q15_t)0x36E7,\n    (q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8C34, (q15_t)0x368C, (q15_t)0x8C1F,\n    (q15_t)0x365F, (q15_t)0x8C09, (q15_t)0x3631, (q15_t)0x8BF4, (q15_t)0x3604,\n    (q15_t)0x8BDF, (q15_t)0x35D6, (q15_t)0x8BCA, (q15_t)0x35A8, (q15_t)0x8BB5,\n    (q15_t)0x357B, (q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B8B, (q15_t)0x351F,\n    (q15_t)0x8B76, (q15_t)0x34F2, (q15_t)0x8B61, (q15_t)0x34C4, (q15_t)0x8B4D,\n    (q15_t)0x3496, (q15_t)0x8B38, (q15_t)0x3468, (q15_t)0x8B24, (q15_t)0x343A,\n    (q15_t)0x8B0F, (q15_t)0x340C, (q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AE6,\n    (q15_t)0x33B0, (q15_t)0x8AD2, (q15_t)0x3382, (q15_t)0x8ABE, (q15_t)0x3354,\n    (q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A96, (q15_t)0x32F8, (q15_t)0x8A82,\n    (q15_t)0x32CA, (q15_t)0x8A6E, (q15_t)0x329C, (q15_t)0x8A5A, (q15_t)0x326E,\n    (q15_t)0x8A46, (q15_t)0x3240, (q15_t)0x8A33, (q15_t)0x3211, (q15_t)0x8A1F,\n    (q15_t)0x31E3, (q15_t)0x8A0B, (q15_t)0x31B5, (q15_t)0x89F8, (q15_t)0x3186,\n    (q15_t)0x89E4, (q15_t)0x3158, (q15_t)0x89D1, (q15_t)0x312A, (q15_t)0x89BE,\n    (q15_t)0x30FB, (q15_t)0x89AB, (q15_t)0x30CD, (q15_t)0x8997, (q15_t)0x309E,\n    (q15_t)0x8984, (q15_t)0x3070, (q15_t)0x8971, (q15_t)0x3041, (q15_t)0x895F,\n    (q15_t)0x3013, (q15_t)0x894C, (q15_t)0x2FE4, (q15_t)0x8939, (q15_t)0x2FB5,\n    (q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8914, (q15_t)0x2F58, (q15_t)0x8901,\n    (q15_t)0x2F29, (q15_t)0x88EF, (q15_t)0x2EFB, (q15_t)0x88DC, (q15_t)0x2ECC,\n    (q15_t)0x88CA, (q15_t)0x2E9D, (q15_t)0x88B8, (q15_t)0x2E6E, (q15_t)0x88A5,\n    (q15_t)0x2E3F, (q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8881, (q15_t)0x2DE2,\n    (q15_t)0x886F, (q15_t)0x2DB3, (q15_t)0x885D, (q15_t)0x2D84, (q15_t)0x884B,\n    (q15_t)0x2D55, (q15_t)0x883A, (q15_t)0x2D26, (q15_t)0x8828, (q15_t)0x2CF7,\n    (q15_t)0x8816, (q15_t)0x2CC8, (q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87F3,\n    (q15_t)0x2C69, (q15_t)0x87E2, (q15_t)0x2C3A, (q15_t)0x87D1, (q15_t)0x2C0B,\n    (q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x87AE, (q15_t)0x2BAD, (q15_t)0x879D,\n    (q15_t)0x2B7D, (q15_t)0x878C, (q15_t)0x2B4E, (q15_t)0x877B, (q15_t)0x2B1F,\n    (q15_t)0x876A, (q15_t)0x2AEF, (q15_t)0x8759, (q15_t)0x2AC0, (q15_t)0x8749,\n    (q15_t)0x2A91, (q15_t)0x8738, (q15_t)0x2A61, (q15_t)0x8727, (q15_t)0x2A32,\n    (q15_t)0x8717, (q15_t)0x2A02, (q15_t)0x8706, (q15_t)0x29D3, (q15_t)0x86F6,\n    (q15_t)0x29A3, (q15_t)0x86E6, (q15_t)0x2974, (q15_t)0x86D5, (q15_t)0x2944,\n    (q15_t)0x86C5, (q15_t)0x2915, (q15_t)0x86B5, (q15_t)0x28E5, (q15_t)0x86A5,\n    (q15_t)0x28B5, (q15_t)0x8695, (q15_t)0x2886, (q15_t)0x8685, (q15_t)0x2856,\n    (q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8666, (q15_t)0x27F6, (q15_t)0x8656,\n    (q15_t)0x27C7, (q15_t)0x8646, (q15_t)0x2797, (q15_t)0x8637, (q15_t)0x2767,\n    (q15_t)0x8627, (q15_t)0x2737, (q15_t)0x8618, (q15_t)0x2707, (q15_t)0x8609,\n    (q15_t)0x26D8, (q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85EA, (q15_t)0x2678,\n    (q15_t)0x85DB, (q15_t)0x2648, (q15_t)0x85CC, (q15_t)0x2618, (q15_t)0x85BD,\n    (q15_t)0x25E8, (q15_t)0x85AF, (q15_t)0x25B8, (q15_t)0x85A0, (q15_t)0x2588,\n    (q15_t)0x8591, (q15_t)0x2558, (q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8574,\n    (q15_t)0x24F7, (q15_t)0x8565, (q15_t)0x24C7, (q15_t)0x8557, (q15_t)0x2497,\n    (q15_t)0x8549, (q15_t)0x2467, (q15_t)0x853A, (q15_t)0x2437, (q15_t)0x852C,\n    (q15_t)0x2407, (q15_t)0x851E, (q15_t)0x23D6, (q15_t)0x8510, (q15_t)0x23A6,\n    (q15_t)0x8502, (q15_t)0x2376, (q15_t)0x84F4, (q15_t)0x2345, (q15_t)0x84E6,\n    (q15_t)0x2315, (q15_t)0x84D9, (q15_t)0x22E5, (q15_t)0x84CB, (q15_t)0x22B4,\n    (q15_t)0x84BD, (q15_t)0x2284, (q15_t)0x84B0, (q15_t)0x2254, (q15_t)0x84A2,\n    (q15_t)0x2223, (q15_t)0x8495, (q15_t)0x21F3, (q15_t)0x8488, (q15_t)0x21C2,\n    (q15_t)0x847B, (q15_t)0x2192, (q15_t)0x846D, (q15_t)0x2161, (q15_t)0x8460,\n    (q15_t)0x2131, (q15_t)0x8453, (q15_t)0x2100, (q15_t)0x8446, (q15_t)0x20D0,\n    (q15_t)0x843A, (q15_t)0x209F, (q15_t)0x842D, (q15_t)0x206E, (q15_t)0x8420,\n    (q15_t)0x203E, (q15_t)0x8414, (q15_t)0x200D, (q15_t)0x8407, (q15_t)0x1FDC,\n    (q15_t)0x83FA, (q15_t)0x1FAC, (q15_t)0x83EE, (q15_t)0x1F7B, (q15_t)0x83E2,\n    (q15_t)0x1F4A, (q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83C9, (q15_t)0x1EE9,\n    (q15_t)0x83BD, (q15_t)0x1EB8, (q15_t)0x83B1, (q15_t)0x1E87, (q15_t)0x83A5,\n    (q15_t)0x1E56, (q15_t)0x8399, (q15_t)0x1E25, (q15_t)0x838E, (q15_t)0x1DF5,\n    (q15_t)0x8382, (q15_t)0x1DC4, (q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x836B,\n    (q15_t)0x1D62, (q15_t)0x835F, (q15_t)0x1D31, (q15_t)0x8354, (q15_t)0x1D00,\n    (q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x833D, (q15_t)0x1C9E, (q15_t)0x8332,\n    (q15_t)0x1C6D, (q15_t)0x8327, (q15_t)0x1C3C, (q15_t)0x831C, (q15_t)0x1C0B,\n    (q15_t)0x8311, (q15_t)0x1BDA, (q15_t)0x8306, (q15_t)0x1BA9, (q15_t)0x82FB,\n    (q15_t)0x1B78, (q15_t)0x82F0, (q15_t)0x1B47, (q15_t)0x82E6, (q15_t)0x1B16,\n    (q15_t)0x82DB, (q15_t)0x1AE4, (q15_t)0x82D0, (q15_t)0x1AB3, (q15_t)0x82C6,\n    (q15_t)0x1A82, (q15_t)0x82BC, (q15_t)0x1A51, (q15_t)0x82B1, (q15_t)0x1A20,\n    (q15_t)0x82A7, (q15_t)0x19EF, (q15_t)0x829D, (q15_t)0x19BD, (q15_t)0x8293,\n    (q15_t)0x198C, (q15_t)0x8289, (q15_t)0x195B, (q15_t)0x827F, (q15_t)0x192A,\n    (q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x826B, (q15_t)0x18C7, (q15_t)0x8262,\n    (q15_t)0x1896, (q15_t)0x8258, (q15_t)0x1864, (q15_t)0x824F, (q15_t)0x1833,\n    (q15_t)0x8245, (q15_t)0x1802, (q15_t)0x823C, (q15_t)0x17D0, (q15_t)0x8232,\n    (q15_t)0x179F, (q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8220, (q15_t)0x173C,\n    (q15_t)0x8217, (q15_t)0x170A, (q15_t)0x820E, (q15_t)0x16D9, (q15_t)0x8205,\n    (q15_t)0x16A8, (q15_t)0x81FC, (q15_t)0x1676, (q15_t)0x81F3, (q15_t)0x1645,\n    (q15_t)0x81EB, (q15_t)0x1613, (q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81D9,\n    (q15_t)0x15B0, (q15_t)0x81D1, (q15_t)0x157F, (q15_t)0x81C8, (q15_t)0x154D,\n    (q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81B8, (q15_t)0x14EA, (q15_t)0x81B0,\n    (q15_t)0x14B8, (q15_t)0x81A8, (q15_t)0x1487, (q15_t)0x81A0, (q15_t)0x1455,\n    (q15_t)0x8198, (q15_t)0x1423, (q15_t)0x8190, (q15_t)0x13F2, (q15_t)0x8188,\n    (q15_t)0x13C0, (q15_t)0x8180, (q15_t)0x138E, (q15_t)0x8179, (q15_t)0x135D,\n    (q15_t)0x8171, (q15_t)0x132B, (q15_t)0x816A, (q15_t)0x12F9, (q15_t)0x8162,\n    (q15_t)0x12C8, (q15_t)0x815B, (q15_t)0x1296, (q15_t)0x8154, (q15_t)0x1264,\n    (q15_t)0x814C, (q15_t)0x1232, (q15_t)0x8145, (q15_t)0x1201, (q15_t)0x813E,\n    (q15_t)0x11CF, (q15_t)0x8137, (q15_t)0x119D, (q15_t)0x8130, (q15_t)0x116B,\n    (q15_t)0x812A, (q15_t)0x1139, (q15_t)0x8123, (q15_t)0x1108, (q15_t)0x811C,\n    (q15_t)0x10D6, (q15_t)0x8116, (q15_t)0x10A4, (q15_t)0x810F, (q15_t)0x1072,\n    (q15_t)0x8109, (q15_t)0x1040, (q15_t)0x8102, (q15_t)0x100E, (q15_t)0x80FC,\n    (q15_t)0x0FDD, (q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80F0, (q15_t)0x0F79,\n    (q15_t)0x80EA, (q15_t)0x0F47, (q15_t)0x80E4, (q15_t)0x0F15, (q15_t)0x80DE,\n    (q15_t)0x0EE3, (q15_t)0x80D8, (q15_t)0x0EB1, (q15_t)0x80D2, (q15_t)0x0E7F,\n    (q15_t)0x80CD, (q15_t)0x0E4D, (q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80C2,\n    (q15_t)0x0DE9, (q15_t)0x80BC, (q15_t)0x0DB7, (q15_t)0x80B7, (q15_t)0x0D85,\n    (q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x80AC, (q15_t)0x0D21, (q15_t)0x80A7,\n    (q15_t)0x0CEF, (q15_t)0x80A2, (q15_t)0x0CBD, (q15_t)0x809D, (q15_t)0x0C8B,\n    (q15_t)0x8098, (q15_t)0x0C59, (q15_t)0x8094, (q15_t)0x0C27, (q15_t)0x808F,\n    (q15_t)0x0BF5, (q15_t)0x808A, (q15_t)0x0BC3, (q15_t)0x8086, (q15_t)0x0B91,\n    (q15_t)0x8081, (q15_t)0x0B5F, (q15_t)0x807D, (q15_t)0x0B2D, (q15_t)0x8078,\n    (q15_t)0x0AFB, (q15_t)0x8074, (q15_t)0x0AC9, (q15_t)0x8070, (q15_t)0x0A97,\n    (q15_t)0x806C, (q15_t)0x0A65, (q15_t)0x8068, (q15_t)0x0A33, (q15_t)0x8064,\n    (q15_t)0x0A00, (q15_t)0x8060, (q15_t)0x09CE, (q15_t)0x805C, (q15_t)0x099C,\n    (q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8055, (q15_t)0x0938, (q15_t)0x8051,\n    (q15_t)0x0906, (q15_t)0x804E, (q15_t)0x08D4, (q15_t)0x804A, (q15_t)0x08A2,\n    (q15_t)0x8047, (q15_t)0x086F, (q15_t)0x8043, (q15_t)0x083D, (q15_t)0x8040,\n    (q15_t)0x080B, (q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x803A, (q15_t)0x07A7,\n    (q15_t)0x8037, (q15_t)0x0775, (q15_t)0x8034, (q15_t)0x0742, (q15_t)0x8031,\n    (q15_t)0x0710, (q15_t)0x802F, (q15_t)0x06DE, (q15_t)0x802C, (q15_t)0x06AC,\n    (q15_t)0x8029, (q15_t)0x067A, (q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8025,\n    (q15_t)0x0615, (q15_t)0x8022, (q15_t)0x05E3, (q15_t)0x8020, (q15_t)0x05B1,\n    (q15_t)0x801E, (q15_t)0x057F, (q15_t)0x801C, (q15_t)0x054C, (q15_t)0x801A,\n    (q15_t)0x051A, (q15_t)0x8018, (q15_t)0x04E8, (q15_t)0x8016, (q15_t)0x04B6,\n    (q15_t)0x8014, (q15_t)0x0483, (q15_t)0x8012, (q15_t)0x0451, (q15_t)0x8011,\n    (q15_t)0x041F, (q15_t)0x800F, (q15_t)0x03ED, (q15_t)0x800D, (q15_t)0x03BA,\n    (q15_t)0x800C, (q15_t)0x0388, (q15_t)0x800B, (q15_t)0x0356, (q15_t)0x8009,\n    (q15_t)0x0324, (q15_t)0x8008, (q15_t)0x02F1, (q15_t)0x8007, (q15_t)0x02BF,\n    (q15_t)0x8006, (q15_t)0x028D, (q15_t)0x8005, (q15_t)0x025B, (q15_t)0x8004,\n    (q15_t)0x0228, (q15_t)0x8003, (q15_t)0x01F6, (q15_t)0x8003, (q15_t)0x01C4,\n    (q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8001, (q15_t)0x015F, (q15_t)0x8001,\n    (q15_t)0x012D, (q15_t)0x8000, (q15_t)0x00FB, (q15_t)0x8000, (q15_t)0x00C9,\n    (q15_t)0x8000, (q15_t)0x0096, (q15_t)0x8000, (q15_t)0x0064, (q15_t)0x8000,\n    (q15_t)0x0032, (q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFFCD,\n    (q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFF69, (q15_t)0x8000,\n    (q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF04, (q15_t)0x8001, (q15_t)0xFED2,\n    (q15_t)0x8001, (q15_t)0xFEA0, (q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8003,\n    (q15_t)0xFE3B, (q15_t)0x8003, (q15_t)0xFE09, (q15_t)0x8004, (q15_t)0xFDD7,\n    (q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8006, (q15_t)0xFD72, (q15_t)0x8007,\n    (q15_t)0xFD40, (q15_t)0x8008, (q15_t)0xFD0E, (q15_t)0x8009, (q15_t)0xFCDB,\n    (q15_t)0x800B, (q15_t)0xFCA9, (q15_t)0x800C, (q15_t)0xFC77, (q15_t)0x800D,\n    (q15_t)0xFC45, (q15_t)0x800F, (q15_t)0xFC12, (q15_t)0x8011, (q15_t)0xFBE0,\n    (q15_t)0x8012, (q15_t)0xFBAE, (q15_t)0x8014, (q15_t)0xFB7C, (q15_t)0x8016,\n    (q15_t)0xFB49, (q15_t)0x8018, (q15_t)0xFB17, (q15_t)0x801A, (q15_t)0xFAE5,\n    (q15_t)0x801C, (q15_t)0xFAB3, (q15_t)0x801E, (q15_t)0xFA80, (q15_t)0x8020,\n    (q15_t)0xFA4E, (q15_t)0x8022, (q15_t)0xFA1C, (q15_t)0x8025, (q15_t)0xF9EA,\n    (q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8029, (q15_t)0xF985, (q15_t)0x802C,\n    (q15_t)0xF953, (q15_t)0x802F, (q15_t)0xF921, (q15_t)0x8031, (q15_t)0xF8EF,\n    (q15_t)0x8034, (q15_t)0xF8BD, (q15_t)0x8037, (q15_t)0xF88A, (q15_t)0x803A,\n    (q15_t)0xF858, (q15_t)0x803D, (q15_t)0xF826, (q15_t)0x8040, (q15_t)0xF7F4,\n    (q15_t)0x8043, (q15_t)0xF7C2, (q15_t)0x8047, (q15_t)0xF790, (q15_t)0x804A,\n    (q15_t)0xF75D, (q15_t)0x804E, (q15_t)0xF72B, (q15_t)0x8051, (q15_t)0xF6F9,\n    (q15_t)0x8055, (q15_t)0xF6C7, (q15_t)0x8058, (q15_t)0xF695, (q15_t)0x805C,\n    (q15_t)0xF663, (q15_t)0x8060, (q15_t)0xF631, (q15_t)0x8064, (q15_t)0xF5FF,\n    (q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x806C, (q15_t)0xF59A, (q15_t)0x8070,\n    (q15_t)0xF568, (q15_t)0x8074, (q15_t)0xF536, (q15_t)0x8078, (q15_t)0xF504,\n    (q15_t)0x807D, (q15_t)0xF4D2, (q15_t)0x8081, (q15_t)0xF4A0, (q15_t)0x8086,\n    (q15_t)0xF46E, (q15_t)0x808A, (q15_t)0xF43C, (q15_t)0x808F, (q15_t)0xF40A,\n    (q15_t)0x8094, (q15_t)0xF3D8, (q15_t)0x8098, (q15_t)0xF3A6, (q15_t)0x809D,\n    (q15_t)0xF374, (q15_t)0x80A2, (q15_t)0xF342, (q15_t)0x80A7, (q15_t)0xF310,\n    (q15_t)0x80AC, (q15_t)0xF2DE, (q15_t)0x80B2, (q15_t)0xF2AC, (q15_t)0x80B7,\n    (q15_t)0xF27A, (q15_t)0x80BC, (q15_t)0xF248, (q15_t)0x80C2, (q15_t)0xF216,\n    (q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80CD, (q15_t)0xF1B2, (q15_t)0x80D2,\n    (q15_t)0xF180, (q15_t)0x80D8, (q15_t)0xF14E, (q15_t)0x80DE, (q15_t)0xF11C,\n    (q15_t)0x80E4, (q15_t)0xF0EA, (q15_t)0x80EA, (q15_t)0xF0B8, (q15_t)0x80F0,\n    (q15_t)0xF086, (q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x80FC, (q15_t)0xF022,\n    (q15_t)0x8102, (q15_t)0xEFF1, (q15_t)0x8109, (q15_t)0xEFBF, (q15_t)0x810F,\n    (q15_t)0xEF8D, (q15_t)0x8116, (q15_t)0xEF5B, (q15_t)0x811C, (q15_t)0xEF29,\n    (q15_t)0x8123, (q15_t)0xEEF7, (q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8130,\n    (q15_t)0xEE94, (q15_t)0x8137, (q15_t)0xEE62, (q15_t)0x813E, (q15_t)0xEE30,\n    (q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x814C, (q15_t)0xEDCD, (q15_t)0x8154,\n    (q15_t)0xED9B, (q15_t)0x815B, (q15_t)0xED69, (q15_t)0x8162, (q15_t)0xED37,\n    (q15_t)0x816A, (q15_t)0xED06, (q15_t)0x8171, (q15_t)0xECD4, (q15_t)0x8179,\n    (q15_t)0xECA2, (q15_t)0x8180, (q15_t)0xEC71, (q15_t)0x8188, (q15_t)0xEC3F,\n    (q15_t)0x8190, (q15_t)0xEC0D, (q15_t)0x8198, (q15_t)0xEBDC, (q15_t)0x81A0,\n    (q15_t)0xEBAA, (q15_t)0x81A8, (q15_t)0xEB78, (q15_t)0x81B0, (q15_t)0xEB47,\n    (q15_t)0x81B8, (q15_t)0xEB15, (q15_t)0x81C0, (q15_t)0xEAE4, (q15_t)0x81C8,\n    (q15_t)0xEAB2, (q15_t)0x81D1, (q15_t)0xEA80, (q15_t)0x81D9, (q15_t)0xEA4F,\n    (q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x81EB, (q15_t)0xE9EC, (q15_t)0x81F3,\n    (q15_t)0xE9BA, (q15_t)0x81FC, (q15_t)0xE989, (q15_t)0x8205, (q15_t)0xE957,\n    (q15_t)0x820E, (q15_t)0xE926, (q15_t)0x8217, (q15_t)0xE8F5, (q15_t)0x8220,\n    (q15_t)0xE8C3, (q15_t)0x8229, (q15_t)0xE892, (q15_t)0x8232, (q15_t)0xE860,\n    (q15_t)0x823C, (q15_t)0xE82F, (q15_t)0x8245, (q15_t)0xE7FD, (q15_t)0x824F,\n    (q15_t)0xE7CC, (q15_t)0x8258, (q15_t)0xE79B, (q15_t)0x8262, (q15_t)0xE769,\n    (q15_t)0x826B, (q15_t)0xE738, (q15_t)0x8275, (q15_t)0xE707, (q15_t)0x827F,\n    (q15_t)0xE6D5, (q15_t)0x8289, (q15_t)0xE6A4, (q15_t)0x8293, (q15_t)0xE673,\n    (q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82A7, (q15_t)0xE610, (q15_t)0x82B1,\n    (q15_t)0xE5DF, (q15_t)0x82BC, (q15_t)0xE5AE, (q15_t)0x82C6, (q15_t)0xE57D,\n    (q15_t)0x82D0, (q15_t)0xE54C, (q15_t)0x82DB, (q15_t)0xE51B, (q15_t)0x82E6,\n    (q15_t)0xE4E9, (q15_t)0x82F0, (q15_t)0xE4B8, (q15_t)0x82FB, (q15_t)0xE487,\n    (q15_t)0x8306, (q15_t)0xE456, (q15_t)0x8311, (q15_t)0xE425, (q15_t)0x831C,\n    (q15_t)0xE3F4, (q15_t)0x8327, (q15_t)0xE3C3, (q15_t)0x8332, (q15_t)0xE392,\n    (q15_t)0x833D, (q15_t)0xE361, (q15_t)0x8348, (q15_t)0xE330, (q15_t)0x8354,\n    (q15_t)0xE2FF, (q15_t)0x835F, (q15_t)0xE2CE, (q15_t)0x836B, (q15_t)0xE29D,\n    (q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x8382, (q15_t)0xE23B, (q15_t)0x838E,\n    (q15_t)0xE20A, (q15_t)0x8399, (q15_t)0xE1DA, (q15_t)0x83A5, (q15_t)0xE1A9,\n    (q15_t)0x83B1, (q15_t)0xE178, (q15_t)0x83BD, (q15_t)0xE147, (q15_t)0x83C9,\n    (q15_t)0xE116, (q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x83E2, (q15_t)0xE0B5,\n    (q15_t)0x83EE, (q15_t)0xE084, (q15_t)0x83FA, (q15_t)0xE053, (q15_t)0x8407,\n    (q15_t)0xE023, (q15_t)0x8414, (q15_t)0xDFF2, (q15_t)0x8420, (q15_t)0xDFC1,\n    (q15_t)0x842D, (q15_t)0xDF91, (q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x8446,\n    (q15_t)0xDF2F, (q15_t)0x8453, (q15_t)0xDEFF, (q15_t)0x8460, (q15_t)0xDECE,\n    (q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x847B, (q15_t)0xDE6D, (q15_t)0x8488,\n    (q15_t)0xDE3D, (q15_t)0x8495, (q15_t)0xDE0C, (q15_t)0x84A2, (q15_t)0xDDDC,\n    (q15_t)0x84B0, (q15_t)0xDDAB, (q15_t)0x84BD, (q15_t)0xDD7B, (q15_t)0x84CB,\n    (q15_t)0xDD4B, (q15_t)0x84D9, (q15_t)0xDD1A, (q15_t)0x84E6, (q15_t)0xDCEA,\n    (q15_t)0x84F4, (q15_t)0xDCBA, (q15_t)0x8502, (q15_t)0xDC89, (q15_t)0x8510,\n    (q15_t)0xDC59, (q15_t)0x851E, (q15_t)0xDC29, (q15_t)0x852C, (q15_t)0xDBF8,\n    (q15_t)0x853A, (q15_t)0xDBC8, (q15_t)0x8549, (q15_t)0xDB98, (q15_t)0x8557,\n    (q15_t)0xDB68, (q15_t)0x8565, (q15_t)0xDB38, (q15_t)0x8574, (q15_t)0xDB08,\n    (q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8591, (q15_t)0xDAA7, (q15_t)0x85A0,\n    (q15_t)0xDA77, (q15_t)0x85AF, (q15_t)0xDA47, (q15_t)0x85BD, (q15_t)0xDA17,\n    (q15_t)0x85CC, (q15_t)0xD9E7, (q15_t)0x85DB, (q15_t)0xD9B7, (q15_t)0x85EA,\n    (q15_t)0xD987, (q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8609, (q15_t)0xD927,\n    (q15_t)0x8618, (q15_t)0xD8F8, (q15_t)0x8627, (q15_t)0xD8C8, (q15_t)0x8637,\n    (q15_t)0xD898, (q15_t)0x8646, (q15_t)0xD868, (q15_t)0x8656, (q15_t)0xD838,\n    (q15_t)0x8666, (q15_t)0xD809, (q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x8685,\n    (q15_t)0xD7A9, (q15_t)0x8695, (q15_t)0xD779, (q15_t)0x86A5, (q15_t)0xD74A,\n    (q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86C5, (q15_t)0xD6EA, (q15_t)0x86D5,\n    (q15_t)0xD6BB, (q15_t)0x86E6, (q15_t)0xD68B, (q15_t)0x86F6, (q15_t)0xD65C,\n    (q15_t)0x8706, (q15_t)0xD62C, (q15_t)0x8717, (q15_t)0xD5FD, (q15_t)0x8727,\n    (q15_t)0xD5CD, (q15_t)0x8738, (q15_t)0xD59E, (q15_t)0x8749, (q15_t)0xD56E,\n    (q15_t)0x8759, (q15_t)0xD53F, (q15_t)0x876A, (q15_t)0xD510, (q15_t)0x877B,\n    (q15_t)0xD4E0, (q15_t)0x878C, (q15_t)0xD4B1, (q15_t)0x879D, (q15_t)0xD482,\n    (q15_t)0x87AE, (q15_t)0xD452, (q15_t)0x87BF, (q15_t)0xD423, (q15_t)0x87D1,\n    (q15_t)0xD3F4, (q15_t)0x87E2, (q15_t)0xD3C5, (q15_t)0x87F3, (q15_t)0xD396,\n    (q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8816, (q15_t)0xD337, (q15_t)0x8828,\n    (q15_t)0xD308, (q15_t)0x883A, (q15_t)0xD2D9, (q15_t)0x884B, (q15_t)0xD2AA,\n    (q15_t)0x885D, (q15_t)0xD27B, (q15_t)0x886F, (q15_t)0xD24C, (q15_t)0x8881,\n    (q15_t)0xD21D, (q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88A5, (q15_t)0xD1C0,\n    (q15_t)0x88B8, (q15_t)0xD191, (q15_t)0x88CA, (q15_t)0xD162, (q15_t)0x88DC,\n    (q15_t)0xD133, (q15_t)0x88EF, (q15_t)0xD104, (q15_t)0x8901, (q15_t)0xD0D6,\n    (q15_t)0x8914, (q15_t)0xD0A7, (q15_t)0x8926, (q15_t)0xD078, (q15_t)0x8939,\n    (q15_t)0xD04A, (q15_t)0x894C, (q15_t)0xD01B, (q15_t)0x895F, (q15_t)0xCFEC,\n    (q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x8984, (q15_t)0xCF8F, (q15_t)0x8997,\n    (q15_t)0xCF61, (q15_t)0x89AB, (q15_t)0xCF32, (q15_t)0x89BE, (q15_t)0xCF04,\n    (q15_t)0x89D1, (q15_t)0xCED5, (q15_t)0x89E4, (q15_t)0xCEA7, (q15_t)0x89F8,\n    (q15_t)0xCE79, (q15_t)0x8A0B, (q15_t)0xCE4A, (q15_t)0x8A1F, (q15_t)0xCE1C,\n    (q15_t)0x8A33, (q15_t)0xCDEE, (q15_t)0x8A46, (q15_t)0xCDBF, (q15_t)0x8A5A,\n    (q15_t)0xCD91, (q15_t)0x8A6E, (q15_t)0xCD63, (q15_t)0x8A82, (q15_t)0xCD35,\n    (q15_t)0x8A96, (q15_t)0xCD07, (q15_t)0x8AAA, (q15_t)0xCCD9, (q15_t)0x8ABE,\n    (q15_t)0xCCAB, (q15_t)0x8AD2, (q15_t)0xCC7D, (q15_t)0x8AE6, (q15_t)0xCC4F,\n    (q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B0F, (q15_t)0xCBF3, (q15_t)0x8B24,\n    (q15_t)0xCBC5, (q15_t)0x8B38, (q15_t)0xCB97, (q15_t)0x8B4D, (q15_t)0xCB69,\n    (q15_t)0x8B61, (q15_t)0xCB3B, (q15_t)0x8B76, (q15_t)0xCB0D, (q15_t)0x8B8B,\n    (q15_t)0xCAE0, (q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BB5, (q15_t)0xCA84,\n    (q15_t)0x8BCA, (q15_t)0xCA57, (q15_t)0x8BDF, (q15_t)0xCA29, (q15_t)0x8BF4,\n    (q15_t)0xC9FB, (q15_t)0x8C09, (q15_t)0xC9CE, (q15_t)0x8C1F, (q15_t)0xC9A0,\n    (q15_t)0x8C34, (q15_t)0xC973, (q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8C5F,\n    (q15_t)0xC918, (q15_t)0x8C75, (q15_t)0xC8EB, (q15_t)0x8C8A, (q15_t)0xC8BD,\n    (q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CB6, (q15_t)0xC863, (q15_t)0x8CCC,\n    (q15_t)0xC835, (q15_t)0x8CE2, (q15_t)0xC808, (q15_t)0x8CF8, (q15_t)0xC7DB,\n    (q15_t)0x8D0E, (q15_t)0xC7AE, (q15_t)0x8D24, (q15_t)0xC781, (q15_t)0x8D3A,\n    (q15_t)0xC754, (q15_t)0x8D50, (q15_t)0xC727, (q15_t)0x8D67, (q15_t)0xC6F9,\n    (q15_t)0x8D7D, (q15_t)0xC6CD, (q15_t)0x8D94, (q15_t)0xC6A0, (q15_t)0x8DAA,\n    (q15_t)0xC673, (q15_t)0x8DC1, (q15_t)0xC646, (q15_t)0x8DD8, (q15_t)0xC619,\n    (q15_t)0x8DEE, (q15_t)0xC5EC, (q15_t)0x8E05, (q15_t)0xC5BF, (q15_t)0x8E1C,\n    (q15_t)0xC593, (q15_t)0x8E33, (q15_t)0xC566, (q15_t)0x8E4A, (q15_t)0xC539,\n    (q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8E79, (q15_t)0xC4E0, (q15_t)0x8E90,\n    (q15_t)0xC4B3, (q15_t)0x8EA7, (q15_t)0xC487, (q15_t)0x8EBE, (q15_t)0xC45A,\n    (q15_t)0x8ED6, (q15_t)0xC42E, (q15_t)0x8EED, (q15_t)0xC402, (q15_t)0x8F05,\n    (q15_t)0xC3D5, (q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F34, (q15_t)0xC37C,\n    (q15_t)0x8F4C, (q15_t)0xC350, (q15_t)0x8F64, (q15_t)0xC324, (q15_t)0x8F7C,\n    (q15_t)0xC2F8, (q15_t)0x8F94, (q15_t)0xC2CC, (q15_t)0x8FAC, (q15_t)0xC29F,\n    (q15_t)0x8FC4, (q15_t)0xC273, (q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x8FF5,\n    (q15_t)0xC21B, (q15_t)0x900D, (q15_t)0xC1EF, (q15_t)0x9025, (q15_t)0xC1C3,\n    (q15_t)0x903E, (q15_t)0xC197, (q15_t)0x9056, (q15_t)0xC16C, (q15_t)0x906F,\n    (q15_t)0xC140, (q15_t)0x9088, (q15_t)0xC114, (q15_t)0x90A0, (q15_t)0xC0E8,\n    (q15_t)0x90B9, (q15_t)0xC0BC, (q15_t)0x90D2, (q15_t)0xC091, (q15_t)0x90EB,\n    (q15_t)0xC065, (q15_t)0x9104, (q15_t)0xC03A, (q15_t)0x911D, (q15_t)0xC00E,\n    (q15_t)0x9136, (q15_t)0xBFE2, (q15_t)0x9150, (q15_t)0xBFB7, (q15_t)0x9169,\n    (q15_t)0xBF8C, (q15_t)0x9182, (q15_t)0xBF60, (q15_t)0x919C, (q15_t)0xBF35,\n    (q15_t)0x91B5, (q15_t)0xBF09, (q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x91E8,\n    (q15_t)0xBEB3, (q15_t)0x9202, (q15_t)0xBE88, (q15_t)0x921C, (q15_t)0xBE5D,\n    (q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x924F, (q15_t)0xBE06, (q15_t)0x9269,\n    (q15_t)0xBDDB, (q15_t)0x9283, (q15_t)0xBDB0, (q15_t)0x929D, (q15_t)0xBD85,\n    (q15_t)0x92B7, (q15_t)0xBD5A, (q15_t)0x92D2, (q15_t)0xBD2F, (q15_t)0x92EC,\n    (q15_t)0xBD05, (q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x9321, (q15_t)0xBCAF,\n    (q15_t)0x933B, (q15_t)0xBC84, (q15_t)0x9356, (q15_t)0xBC5A, (q15_t)0x9370,\n    (q15_t)0xBC2F, (q15_t)0x938B, (q15_t)0xBC04, (q15_t)0x93A6, (q15_t)0xBBDA,\n    (q15_t)0x93C0, (q15_t)0xBBAF, (q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x93F6,\n    (q15_t)0xBB5A, (q15_t)0x9411, (q15_t)0xBB30, (q15_t)0x942C, (q15_t)0xBB05,\n    (q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x9463, (q15_t)0xBAB1, (q15_t)0x947E,\n    (q15_t)0xBA87, (q15_t)0x9499, (q15_t)0xBA5C, (q15_t)0x94B5, (q15_t)0xBA32,\n    (q15_t)0x94D0, (q15_t)0xBA08, (q15_t)0x94EC, (q15_t)0xB9DE, (q15_t)0x9507,\n    (q15_t)0xB9B4, (q15_t)0x9523, (q15_t)0xB98A, (q15_t)0x953E, (q15_t)0xB960,\n    (q15_t)0x955A, (q15_t)0xB936, (q15_t)0x9576, (q15_t)0xB90C, (q15_t)0x9592,\n    (q15_t)0xB8E3, (q15_t)0x95AE, (q15_t)0xB8B9, (q15_t)0x95CA, (q15_t)0xB88F,\n    (q15_t)0x95E6, (q15_t)0xB865, (q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x961E,\n    (q15_t)0xB812, (q15_t)0x963B, (q15_t)0xB7E9, (q15_t)0x9657, (q15_t)0xB7BF,\n    (q15_t)0x9673, (q15_t)0xB796, (q15_t)0x9690, (q15_t)0xB76C, (q15_t)0x96AC,\n    (q15_t)0xB743, (q15_t)0x96C9, (q15_t)0xB719, (q15_t)0x96E6, (q15_t)0xB6F0,\n    (q15_t)0x9702, (q15_t)0xB6C7, (q15_t)0x971F, (q15_t)0xB69E, (q15_t)0x973C,\n    (q15_t)0xB675, (q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9776, (q15_t)0xB622,\n    (q15_t)0x9793, (q15_t)0xB5F9, (q15_t)0x97B0, (q15_t)0xB5D0, (q15_t)0x97CD,\n    (q15_t)0xB5A7, (q15_t)0x97EA, (q15_t)0xB57E, (q15_t)0x9808, (q15_t)0xB556,\n    (q15_t)0x9825, (q15_t)0xB52D, (q15_t)0x9842, (q15_t)0xB504, (q15_t)0x9860,\n    (q15_t)0xB4DB, (q15_t)0x987D, (q15_t)0xB4B3, (q15_t)0x989B, (q15_t)0xB48A,\n    (q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98D6, (q15_t)0xB439, (q15_t)0x98F4,\n    (q15_t)0xB410, (q15_t)0x9912, (q15_t)0xB3E8, (q15_t)0x9930, (q15_t)0xB3C0,\n    (q15_t)0x994E, (q15_t)0xB397, (q15_t)0x996C, (q15_t)0xB36F, (q15_t)0x998A,\n    (q15_t)0xB347, (q15_t)0x99A8, (q15_t)0xB31E, (q15_t)0x99C6, (q15_t)0xB2F6,\n    (q15_t)0x99E5, (q15_t)0xB2CE, (q15_t)0x9A03, (q15_t)0xB2A6, (q15_t)0x9A22,\n    (q15_t)0xB27E, (q15_t)0x9A40, (q15_t)0xB256, (q15_t)0x9A5F, (q15_t)0xB22E,\n    (q15_t)0x9A7D, (q15_t)0xB206, (q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9ABA,\n    (q15_t)0xB1B7, (q15_t)0x9AD9, (q15_t)0xB18F, (q15_t)0x9AF8, (q15_t)0xB167,\n    (q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B36, (q15_t)0xB118, (q15_t)0x9B55,\n    (q15_t)0xB0F0, (q15_t)0x9B74, (q15_t)0xB0C9, (q15_t)0x9B93, (q15_t)0xB0A1,\n    (q15_t)0x9BB2, (q15_t)0xB07A, (q15_t)0x9BD2, (q15_t)0xB053, (q15_t)0x9BF1,\n    (q15_t)0xB02B, (q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C30, (q15_t)0xAFDD,\n    (q15_t)0x9C4F, (q15_t)0xAFB6, (q15_t)0x9C6F, (q15_t)0xAF8F, (q15_t)0x9C8E,\n    (q15_t)0xAF68, (q15_t)0x9CAE, (q15_t)0xAF40, (q15_t)0x9CCE, (q15_t)0xAF1A,\n    (q15_t)0x9CEE, (q15_t)0xAEF3, (q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D2D,\n    (q15_t)0xAEA5, (q15_t)0x9D4D, (q15_t)0xAE7E, (q15_t)0x9D6D, (q15_t)0xAE57,\n    (q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DAE, (q15_t)0xAE0A, (q15_t)0x9DCE,\n    (q15_t)0xADE3, (q15_t)0x9DEE, (q15_t)0xADBD, (q15_t)0x9E0E, (q15_t)0xAD96,\n    (q15_t)0x9E2F, (q15_t)0xAD70, (q15_t)0x9E4F, (q15_t)0xAD4A, (q15_t)0x9E70,\n    (q15_t)0xAD23, (q15_t)0x9E90, (q15_t)0xACFD, (q15_t)0x9EB1, (q15_t)0xACD7,\n    (q15_t)0x9ED2, (q15_t)0xACB1, (q15_t)0x9EF2, (q15_t)0xAC8A, (q15_t)0x9F13,\n    (q15_t)0xAC64, (q15_t)0x9F34, (q15_t)0xAC3E, (q15_t)0x9F55, (q15_t)0xAC18,\n    (q15_t)0x9F76, (q15_t)0xABF2, (q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FB8,\n    (q15_t)0xABA7, (q15_t)0x9FD9, (q15_t)0xAB81, (q15_t)0x9FFB, (q15_t)0xAB5B,\n    (q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA03D, (q15_t)0xAB10, (q15_t)0xA05F,\n    (q15_t)0xAAEA, (q15_t)0xA080, (q15_t)0xAAC5, (q15_t)0xA0A1, (q15_t)0xAA9F,\n    (q15_t)0xA0C3, (q15_t)0xAA7A, (q15_t)0xA0E5, (q15_t)0xAA54, (q15_t)0xA106,\n    (q15_t)0xAA2F, (q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA14A, (q15_t)0xA9E5,\n    (q15_t)0xA16C, (q15_t)0xA9BF, (q15_t)0xA18E, (q15_t)0xA99A, (q15_t)0xA1AF,\n    (q15_t)0xA975, (q15_t)0xA1D2, (q15_t)0xA950, (q15_t)0xA1F4, (q15_t)0xA92B,\n    (q15_t)0xA216, (q15_t)0xA906, (q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA25A,\n    (q15_t)0xA8BD, (q15_t)0xA27C, (q15_t)0xA898, (q15_t)0xA29F, (q15_t)0xA873,\n    (q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA2E4, (q15_t)0xA82A, (q15_t)0xA306,\n    (q15_t)0xA806, (q15_t)0xA329, (q15_t)0xA7E1, (q15_t)0xA34B, (q15_t)0xA7BD,\n    (q15_t)0xA36E, (q15_t)0xA798, (q15_t)0xA391, (q15_t)0xA774, (q15_t)0xA3B4,\n    (q15_t)0xA750, (q15_t)0xA3D6, (q15_t)0xA72B, (q15_t)0xA3F9, (q15_t)0xA707,\n    (q15_t)0xA41C, (q15_t)0xA6E3, (q15_t)0xA43F, (q15_t)0xA6BF, (q15_t)0xA462,\n    (q15_t)0xA69B, (q15_t)0xA486, (q15_t)0xA677, (q15_t)0xA4A9, (q15_t)0xA653,\n    (q15_t)0xA4CC, (q15_t)0xA62F, (q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA513,\n    (q15_t)0xA5E8, (q15_t)0xA536, (q15_t)0xA5C4, (q15_t)0xA55A, (q15_t)0xA5A1,\n    (q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5A1, (q15_t)0xA55A, (q15_t)0xA5C4,\n    (q15_t)0xA536, (q15_t)0xA5E8, (q15_t)0xA513, (q15_t)0xA60C, (q15_t)0xA4EF,\n    (q15_t)0xA62F, (q15_t)0xA4CC, (q15_t)0xA653, (q15_t)0xA4A9, (q15_t)0xA677,\n    (q15_t)0xA486, (q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA6BF, (q15_t)0xA43F,\n    (q15_t)0xA6E3, (q15_t)0xA41C, (q15_t)0xA707, (q15_t)0xA3F9, (q15_t)0xA72B,\n    (q15_t)0xA3D6, (q15_t)0xA750, (q15_t)0xA3B4, (q15_t)0xA774, (q15_t)0xA391,\n    (q15_t)0xA798, (q15_t)0xA36E, (q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA7E1,\n    (q15_t)0xA329, (q15_t)0xA806, (q15_t)0xA306, (q15_t)0xA82A, (q15_t)0xA2E4,\n    (q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA873, (q15_t)0xA29F, (q15_t)0xA898,\n    (q15_t)0xA27C, (q15_t)0xA8BD, (q15_t)0xA25A, (q15_t)0xA8E2, (q15_t)0xA238,\n    (q15_t)0xA906, (q15_t)0xA216, (q15_t)0xA92B, (q15_t)0xA1F4, (q15_t)0xA950,\n    (q15_t)0xA1D2, (q15_t)0xA975, (q15_t)0xA1AF, (q15_t)0xA99A, (q15_t)0xA18E,\n    (q15_t)0xA9BF, (q15_t)0xA16C, (q15_t)0xA9E5, (q15_t)0xA14A, (q15_t)0xAA0A,\n    (q15_t)0xA128, (q15_t)0xAA2F, (q15_t)0xA106, (q15_t)0xAA54, (q15_t)0xA0E5,\n    (q15_t)0xAA7A, (q15_t)0xA0C3, (q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAC5,\n    (q15_t)0xA080, (q15_t)0xAAEA, (q15_t)0xA05F, (q15_t)0xAB10, (q15_t)0xA03D,\n    (q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB5B, (q15_t)0x9FFB, (q15_t)0xAB81,\n    (q15_t)0x9FD9, (q15_t)0xABA7, (q15_t)0x9FB8, (q15_t)0xABCC, (q15_t)0x9F97,\n    (q15_t)0xABF2, (q15_t)0x9F76, (q15_t)0xAC18, (q15_t)0x9F55, (q15_t)0xAC3E,\n    (q15_t)0x9F34, (q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAC8A, (q15_t)0x9EF2,\n    (q15_t)0xACB1, (q15_t)0x9ED2, (q15_t)0xACD7, (q15_t)0x9EB1, (q15_t)0xACFD,\n    (q15_t)0x9E90, (q15_t)0xAD23, (q15_t)0x9E70, (q15_t)0xAD4A, (q15_t)0x9E4F,\n    (q15_t)0xAD70, (q15_t)0x9E2F, (q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADBD,\n    (q15_t)0x9DEE, (q15_t)0xADE3, (q15_t)0x9DCE, (q15_t)0xAE0A, (q15_t)0x9DAE,\n    (q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE57, (q15_t)0x9D6D, (q15_t)0xAE7E,\n    (q15_t)0x9D4D, (q15_t)0xAEA5, (q15_t)0x9D2D, (q15_t)0xAECC, (q15_t)0x9D0D,\n    (q15_t)0xAEF3, (q15_t)0x9CEE, (q15_t)0xAF1A, (q15_t)0x9CCE, (q15_t)0xAF40,\n    (q15_t)0x9CAE, (q15_t)0xAF68, (q15_t)0x9C8E, (q15_t)0xAF8F, (q15_t)0x9C6F,\n    (q15_t)0xAFB6, (q15_t)0x9C4F, (q15_t)0xAFDD, (q15_t)0x9C30, (q15_t)0xB004,\n    (q15_t)0x9C10, (q15_t)0xB02B, (q15_t)0x9BF1, (q15_t)0xB053, (q15_t)0x9BD2,\n    (q15_t)0xB07A, (q15_t)0x9BB2, (q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0C9,\n    (q15_t)0x9B74, (q15_t)0xB0F0, (q15_t)0x9B55, (q15_t)0xB118, (q15_t)0x9B36,\n    (q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB167, (q15_t)0x9AF8, (q15_t)0xB18F,\n    (q15_t)0x9AD9, (q15_t)0xB1B7, (q15_t)0x9ABA, (q15_t)0xB1DE, (q15_t)0x9A9C,\n    (q15_t)0xB206, (q15_t)0x9A7D, (q15_t)0xB22E, (q15_t)0x9A5F, (q15_t)0xB256,\n    (q15_t)0x9A40, (q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB2A6, (q15_t)0x9A03,\n    (q15_t)0xB2CE, (q15_t)0x99E5, (q15_t)0xB2F6, (q15_t)0x99C6, (q15_t)0xB31E,\n    (q15_t)0x99A8, (q15_t)0xB347, (q15_t)0x998A, (q15_t)0xB36F, (q15_t)0x996C,\n    (q15_t)0xB397, (q15_t)0x994E, (q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB3E8,\n    (q15_t)0x9912, (q15_t)0xB410, (q15_t)0x98F4, (q15_t)0xB439, (q15_t)0x98D6,\n    (q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB48A, (q15_t)0x989B, (q15_t)0xB4B3,\n    (q15_t)0x987D, (q15_t)0xB4DB, (q15_t)0x9860, (q15_t)0xB504, (q15_t)0x9842,\n    (q15_t)0xB52D, (q15_t)0x9825, (q15_t)0xB556, (q15_t)0x9808, (q15_t)0xB57E,\n    (q15_t)0x97EA, (q15_t)0xB5A7, (q15_t)0x97CD, (q15_t)0xB5D0, (q15_t)0x97B0,\n    (q15_t)0xB5F9, (q15_t)0x9793, (q15_t)0xB622, (q15_t)0x9776, (q15_t)0xB64B,\n    (q15_t)0x9759, (q15_t)0xB675, (q15_t)0x973C, (q15_t)0xB69E, (q15_t)0x971F,\n    (q15_t)0xB6C7, (q15_t)0x9702, (q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB719,\n    (q15_t)0x96C9, (q15_t)0xB743, (q15_t)0x96AC, (q15_t)0xB76C, (q15_t)0x9690,\n    (q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7BF, (q15_t)0x9657, (q15_t)0xB7E9,\n    (q15_t)0x963B, (q15_t)0xB812, (q15_t)0x961E, (q15_t)0xB83C, (q15_t)0x9602,\n    (q15_t)0xB865, (q15_t)0x95E6, (q15_t)0xB88F, (q15_t)0x95CA, (q15_t)0xB8B9,\n    (q15_t)0x95AE, (q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB90C, (q15_t)0x9576,\n    (q15_t)0xB936, (q15_t)0x955A, (q15_t)0xB960, (q15_t)0x953E, (q15_t)0xB98A,\n    (q15_t)0x9523, (q15_t)0xB9B4, (q15_t)0x9507, (q15_t)0xB9DE, (q15_t)0x94EC,\n    (q15_t)0xBA08, (q15_t)0x94D0, (q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA5C,\n    (q15_t)0x9499, (q15_t)0xBA87, (q15_t)0x947E, (q15_t)0xBAB1, (q15_t)0x9463,\n    (q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB05, (q15_t)0x942C, (q15_t)0xBB30,\n    (q15_t)0x9411, (q15_t)0xBB5A, (q15_t)0x93F6, (q15_t)0xBB85, (q15_t)0x93DB,\n    (q15_t)0xBBAF, (q15_t)0x93C0, (q15_t)0xBBDA, (q15_t)0x93A6, (q15_t)0xBC04,\n    (q15_t)0x938B, (q15_t)0xBC2F, (q15_t)0x9370, (q15_t)0xBC5A, (q15_t)0x9356,\n    (q15_t)0xBC84, (q15_t)0x933B, (q15_t)0xBCAF, (q15_t)0x9321, (q15_t)0xBCDA,\n    (q15_t)0x9306, (q15_t)0xBD05, (q15_t)0x92EC, (q15_t)0xBD2F, (q15_t)0x92D2,\n    (q15_t)0xBD5A, (q15_t)0x92B7, (q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDB0,\n    (q15_t)0x9283, (q15_t)0xBDDB, (q15_t)0x9269, (q15_t)0xBE06, (q15_t)0x924F,\n    (q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE5D, (q15_t)0x921C, (q15_t)0xBE88,\n    (q15_t)0x9202, (q15_t)0xBEB3, (q15_t)0x91E8, (q15_t)0xBEDE, (q15_t)0x91CF,\n    (q15_t)0xBF09, (q15_t)0x91B5, (q15_t)0xBF35, (q15_t)0x919C, (q15_t)0xBF60,\n    (q15_t)0x9182, (q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xBFB7, (q15_t)0x9150,\n    (q15_t)0xBFE2, (q15_t)0x9136, (q15_t)0xC00E, (q15_t)0x911D, (q15_t)0xC03A,\n    (q15_t)0x9104, (q15_t)0xC065, (q15_t)0x90EB, (q15_t)0xC091, (q15_t)0x90D2,\n    (q15_t)0xC0BC, (q15_t)0x90B9, (q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC114,\n    (q15_t)0x9088, (q15_t)0xC140, (q15_t)0x906F, (q15_t)0xC16C, (q15_t)0x9056,\n    (q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1C3, (q15_t)0x9025, (q15_t)0xC1EF,\n    (q15_t)0x900D, (q15_t)0xC21B, (q15_t)0x8FF5, (q15_t)0xC247, (q15_t)0x8FDC,\n    (q15_t)0xC273, (q15_t)0x8FC4, (q15_t)0xC29F, (q15_t)0x8FAC, (q15_t)0xC2CC,\n    (q15_t)0x8F94, (q15_t)0xC2F8, (q15_t)0x8F7C, (q15_t)0xC324, (q15_t)0x8F64,\n    (q15_t)0xC350, (q15_t)0x8F4C, (q15_t)0xC37C, (q15_t)0x8F34, (q15_t)0xC3A9,\n    (q15_t)0x8F1D, (q15_t)0xC3D5, (q15_t)0x8F05, (q15_t)0xC402, (q15_t)0x8EED,\n    (q15_t)0xC42E, (q15_t)0x8ED6, (q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC487,\n    (q15_t)0x8EA7, (q15_t)0xC4B3, (q15_t)0x8E90, (q15_t)0xC4E0, (q15_t)0x8E79,\n    (q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC539, (q15_t)0x8E4A, (q15_t)0xC566,\n    (q15_t)0x8E33, (q15_t)0xC593, (q15_t)0x8E1C, (q15_t)0xC5BF, (q15_t)0x8E05,\n    (q15_t)0xC5EC, (q15_t)0x8DEE, (q15_t)0xC619, (q15_t)0x8DD8, (q15_t)0xC646,\n    (q15_t)0x8DC1, (q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC6A0, (q15_t)0x8D94,\n    (q15_t)0xC6CD, (q15_t)0x8D7D, (q15_t)0xC6F9, (q15_t)0x8D67, (q15_t)0xC727,\n    (q15_t)0x8D50, (q15_t)0xC754, (q15_t)0x8D3A, (q15_t)0xC781, (q15_t)0x8D24,\n    (q15_t)0xC7AE, (q15_t)0x8D0E, (q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC808,\n    (q15_t)0x8CE2, (q15_t)0xC835, (q15_t)0x8CCC, (q15_t)0xC863, (q15_t)0x8CB6,\n    (q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8BD, (q15_t)0x8C8A, (q15_t)0xC8EB,\n    (q15_t)0x8C75, (q15_t)0xC918, (q15_t)0x8C5F, (q15_t)0xC945, (q15_t)0x8C4A,\n    (q15_t)0xC973, (q15_t)0x8C34, (q15_t)0xC9A0, (q15_t)0x8C1F, (q15_t)0xC9CE,\n    (q15_t)0x8C09, (q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA29, (q15_t)0x8BDF,\n    (q15_t)0xCA57, (q15_t)0x8BCA, (q15_t)0xCA84, (q15_t)0x8BB5, (q15_t)0xCAB2,\n    (q15_t)0x8BA0, (q15_t)0xCAE0, (q15_t)0x8B8B, (q15_t)0xCB0D, (q15_t)0x8B76,\n    (q15_t)0xCB3B, (q15_t)0x8B61, (q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCB97,\n    (q15_t)0x8B38, (q15_t)0xCBC5, (q15_t)0x8B24, (q15_t)0xCBF3, (q15_t)0x8B0F,\n    (q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC4F, (q15_t)0x8AE6, (q15_t)0xCC7D,\n    (q15_t)0x8AD2, (q15_t)0xCCAB, (q15_t)0x8ABE, (q15_t)0xCCD9, (q15_t)0x8AAA,\n    (q15_t)0xCD07, (q15_t)0x8A96, (q15_t)0xCD35, (q15_t)0x8A82, (q15_t)0xCD63,\n    (q15_t)0x8A6E, (q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDBF, (q15_t)0x8A46,\n    (q15_t)0xCDEE, (q15_t)0x8A33, (q15_t)0xCE1C, (q15_t)0x8A1F, (q15_t)0xCE4A,\n    (q15_t)0x8A0B, (q15_t)0xCE79, (q15_t)0x89F8, (q15_t)0xCEA7, (q15_t)0x89E4,\n    (q15_t)0xCED5, (q15_t)0x89D1, (q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF32,\n    (q15_t)0x89AB, (q15_t)0xCF61, (q15_t)0x8997, (q15_t)0xCF8F, (q15_t)0x8984,\n    (q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xCFEC, (q15_t)0x895F, (q15_t)0xD01B,\n    (q15_t)0x894C, (q15_t)0xD04A, (q15_t)0x8939, (q15_t)0xD078, (q15_t)0x8926,\n    (q15_t)0xD0A7, (q15_t)0x8914, (q15_t)0xD0D6, (q15_t)0x8901, (q15_t)0xD104,\n    (q15_t)0x88EF, (q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD162, (q15_t)0x88CA,\n    (q15_t)0xD191, (q15_t)0x88B8, (q15_t)0xD1C0, (q15_t)0x88A5, (q15_t)0xD1EE,\n    (q15_t)0x8893, (q15_t)0xD21D, (q15_t)0x8881, (q15_t)0xD24C, (q15_t)0x886F,\n    (q15_t)0xD27B, (q15_t)0x885D, (q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD2D9,\n    (q15_t)0x883A, (q15_t)0xD308, (q15_t)0x8828, (q15_t)0xD337, (q15_t)0x8816,\n    (q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD396, (q15_t)0x87F3, (q15_t)0xD3C5,\n    (q15_t)0x87E2, (q15_t)0xD3F4, (q15_t)0x87D1, (q15_t)0xD423, (q15_t)0x87BF,\n    (q15_t)0xD452, (q15_t)0x87AE, (q15_t)0xD482, (q15_t)0x879D, (q15_t)0xD4B1,\n    (q15_t)0x878C, (q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD510, (q15_t)0x876A,\n    (q15_t)0xD53F, (q15_t)0x8759, (q15_t)0xD56E, (q15_t)0x8749, (q15_t)0xD59E,\n    (q15_t)0x8738, (q15_t)0xD5CD, (q15_t)0x8727, (q15_t)0xD5FD, (q15_t)0x8717,\n    (q15_t)0xD62C, (q15_t)0x8706, (q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD68B,\n    (q15_t)0x86E6, (q15_t)0xD6BB, (q15_t)0x86D5, (q15_t)0xD6EA, (q15_t)0x86C5,\n    (q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD74A, (q15_t)0x86A5, (q15_t)0xD779,\n    (q15_t)0x8695, (q15_t)0xD7A9, (q15_t)0x8685, (q15_t)0xD7D9, (q15_t)0x8675,\n    (q15_t)0xD809, (q15_t)0x8666, (q15_t)0xD838, (q15_t)0x8656, (q15_t)0xD868,\n    (q15_t)0x8646, (q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8C8, (q15_t)0x8627,\n    (q15_t)0xD8F8, (q15_t)0x8618, (q15_t)0xD927, (q15_t)0x8609, (q15_t)0xD957,\n    (q15_t)0x85FA, (q15_t)0xD987, (q15_t)0x85EA, (q15_t)0xD9B7, (q15_t)0x85DB,\n    (q15_t)0xD9E7, (q15_t)0x85CC, (q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA47,\n    (q15_t)0x85AF, (q15_t)0xDA77, (q15_t)0x85A0, (q15_t)0xDAA7, (q15_t)0x8591,\n    (q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB08, (q15_t)0x8574, (q15_t)0xDB38,\n    (q15_t)0x8565, (q15_t)0xDB68, (q15_t)0x8557, (q15_t)0xDB98, (q15_t)0x8549,\n    (q15_t)0xDBC8, (q15_t)0x853A, (q15_t)0xDBF8, (q15_t)0x852C, (q15_t)0xDC29,\n    (q15_t)0x851E, (q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDC89, (q15_t)0x8502,\n    (q15_t)0xDCBA, (q15_t)0x84F4, (q15_t)0xDCEA, (q15_t)0x84E6, (q15_t)0xDD1A,\n    (q15_t)0x84D9, (q15_t)0xDD4B, (q15_t)0x84CB, (q15_t)0xDD7B, (q15_t)0x84BD,\n    (q15_t)0xDDAB, (q15_t)0x84B0, (q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE0C,\n    (q15_t)0x8495, (q15_t)0xDE3D, (q15_t)0x8488, (q15_t)0xDE6D, (q15_t)0x847B,\n    (q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDECE, (q15_t)0x8460, (q15_t)0xDEFF,\n    (q15_t)0x8453, (q15_t)0xDF2F, (q15_t)0x8446, (q15_t)0xDF60, (q15_t)0x843A,\n    (q15_t)0xDF91, (q15_t)0x842D, (q15_t)0xDFC1, (q15_t)0x8420, (q15_t)0xDFF2,\n    (q15_t)0x8414, (q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE053, (q15_t)0x83FA,\n    (q15_t)0xE084, (q15_t)0x83EE, (q15_t)0xE0B5, (q15_t)0x83E2, (q15_t)0xE0E6,\n    (q15_t)0x83D6, (q15_t)0xE116, (q15_t)0x83C9, (q15_t)0xE147, (q15_t)0x83BD,\n    (q15_t)0xE178, (q15_t)0x83B1, (q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE1DA,\n    (q15_t)0x8399, (q15_t)0xE20A, (q15_t)0x838E, (q15_t)0xE23B, (q15_t)0x8382,\n    (q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE29D, (q15_t)0x836B, (q15_t)0xE2CE,\n    (q15_t)0x835F, (q15_t)0xE2FF, (q15_t)0x8354, (q15_t)0xE330, (q15_t)0x8348,\n    (q15_t)0xE361, (q15_t)0x833D, (q15_t)0xE392, (q15_t)0x8332, (q15_t)0xE3C3,\n    (q15_t)0x8327, (q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE425, (q15_t)0x8311,\n    (q15_t)0xE456, (q15_t)0x8306, (q15_t)0xE487, (q15_t)0x82FB, (q15_t)0xE4B8,\n    (q15_t)0x82F0, (q15_t)0xE4E9, (q15_t)0x82E6, (q15_t)0xE51B, (q15_t)0x82DB,\n    (q15_t)0xE54C, (q15_t)0x82D0, (q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5AE,\n    (q15_t)0x82BC, (q15_t)0xE5DF, (q15_t)0x82B1, (q15_t)0xE610, (q15_t)0x82A7,\n    (q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE673, (q15_t)0x8293, (q15_t)0xE6A4,\n    (q15_t)0x8289, (q15_t)0xE6D5, (q15_t)0x827F, (q15_t)0xE707, (q15_t)0x8275,\n    (q15_t)0xE738, (q15_t)0x826B, (q15_t)0xE769, (q15_t)0x8262, (q15_t)0xE79B,\n    (q15_t)0x8258, (q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE7FD, (q15_t)0x8245,\n    (q15_t)0xE82F, (q15_t)0x823C, (q15_t)0xE860, (q15_t)0x8232, (q15_t)0xE892,\n    (q15_t)0x8229, (q15_t)0xE8C3, (q15_t)0x8220, (q15_t)0xE8F5, (q15_t)0x8217,\n    (q15_t)0xE926, (q15_t)0x820E, (q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE989,\n    (q15_t)0x81FC, (q15_t)0xE9BA, (q15_t)0x81F3, (q15_t)0xE9EC, (q15_t)0x81EB,\n    (q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA4F, (q15_t)0x81D9, (q15_t)0xEA80,\n    (q15_t)0x81D1, (q15_t)0xEAB2, (q15_t)0x81C8, (q15_t)0xEAE4, (q15_t)0x81C0,\n    (q15_t)0xEB15, (q15_t)0x81B8, (q15_t)0xEB47, (q15_t)0x81B0, (q15_t)0xEB78,\n    (q15_t)0x81A8, (q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEBDC, (q15_t)0x8198,\n    (q15_t)0xEC0D, (q15_t)0x8190, (q15_t)0xEC3F, (q15_t)0x8188, (q15_t)0xEC71,\n    (q15_t)0x8180, (q15_t)0xECA2, (q15_t)0x8179, (q15_t)0xECD4, (q15_t)0x8171,\n    (q15_t)0xED06, (q15_t)0x816A, (q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED69,\n    (q15_t)0x815B, (q15_t)0xED9B, (q15_t)0x8154, (q15_t)0xEDCD, (q15_t)0x814C,\n    (q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE30, (q15_t)0x813E, (q15_t)0xEE62,\n    (q15_t)0x8137, (q15_t)0xEE94, (q15_t)0x8130, (q15_t)0xEEC6, (q15_t)0x812A,\n    (q15_t)0xEEF7, (q15_t)0x8123, (q15_t)0xEF29, (q15_t)0x811C, (q15_t)0xEF5B,\n    (q15_t)0x8116, (q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFBF, (q15_t)0x8109,\n    (q15_t)0xEFF1, (q15_t)0x8102, (q15_t)0xF022, (q15_t)0x80FC, (q15_t)0xF054,\n    (q15_t)0x80F6, (q15_t)0xF086, (q15_t)0x80F0, (q15_t)0xF0B8, (q15_t)0x80EA,\n    (q15_t)0xF0EA, (q15_t)0x80E4, (q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF14E,\n    (q15_t)0x80D8, (q15_t)0xF180, (q15_t)0x80D2, (q15_t)0xF1B2, (q15_t)0x80CD,\n    (q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF216, (q15_t)0x80C2, (q15_t)0xF248,\n    (q15_t)0x80BC, (q15_t)0xF27A, (q15_t)0x80B7, (q15_t)0xF2AC, (q15_t)0x80B2,\n    (q15_t)0xF2DE, (q15_t)0x80AC, (q15_t)0xF310, (q15_t)0x80A7, (q15_t)0xF342,\n    (q15_t)0x80A2, (q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3A6, (q15_t)0x8098,\n    (q15_t)0xF3D8, (q15_t)0x8094, (q15_t)0xF40A, (q15_t)0x808F, (q15_t)0xF43C,\n    (q15_t)0x808A, (q15_t)0xF46E, (q15_t)0x8086, (q15_t)0xF4A0, (q15_t)0x8081,\n    (q15_t)0xF4D2, (q15_t)0x807D, (q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF536,\n    (q15_t)0x8074, (q15_t)0xF568, (q15_t)0x8070, (q15_t)0xF59A, (q15_t)0x806C,\n    (q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF5FF, (q15_t)0x8064, (q15_t)0xF631,\n    (q15_t)0x8060, (q15_t)0xF663, (q15_t)0x805C, (q15_t)0xF695, (q15_t)0x8058,\n    (q15_t)0xF6C7, (q15_t)0x8055, (q15_t)0xF6F9, (q15_t)0x8051, (q15_t)0xF72B,\n    (q15_t)0x804E, (q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF790, (q15_t)0x8047,\n    (q15_t)0xF7C2, (q15_t)0x8043, (q15_t)0xF7F4, (q15_t)0x8040, (q15_t)0xF826,\n    (q15_t)0x803D, (q15_t)0xF858, (q15_t)0x803A, (q15_t)0xF88A, (q15_t)0x8037,\n    (q15_t)0xF8BD, (q15_t)0x8034, (q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF921,\n    (q15_t)0x802F, (q15_t)0xF953, (q15_t)0x802C, (q15_t)0xF985, (q15_t)0x8029,\n    (q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xF9EA, (q15_t)0x8025, (q15_t)0xFA1C,\n    (q15_t)0x8022, (q15_t)0xFA4E, (q15_t)0x8020, (q15_t)0xFA80, (q15_t)0x801E,\n    (q15_t)0xFAB3, (q15_t)0x801C, (q15_t)0xFAE5, (q15_t)0x801A, (q15_t)0xFB17,\n    (q15_t)0x8018, (q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFB7C, (q15_t)0x8014,\n    (q15_t)0xFBAE, (q15_t)0x8012, (q15_t)0xFBE0, (q15_t)0x8011, (q15_t)0xFC12,\n    (q15_t)0x800F, (q15_t)0xFC45, (q15_t)0x800D, (q15_t)0xFC77, (q15_t)0x800C,\n    (q15_t)0xFCA9, (q15_t)0x800B, (q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD0E,\n    (q15_t)0x8008, (q15_t)0xFD40, (q15_t)0x8007, (q15_t)0xFD72, (q15_t)0x8006,\n    (q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFDD7, (q15_t)0x8004, (q15_t)0xFE09,\n    (q15_t)0x8003, (q15_t)0xFE3B, (q15_t)0x8003, (q15_t)0xFE6D, (q15_t)0x8002,\n    (q15_t)0xFEA0, (q15_t)0x8001, (q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFF04,\n    (q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF69, (q15_t)0x8000,\n    (q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFFCD, (q15_t)0x8000};\n\n/**\n  @} end of CFFT_CIFFT group\n*/\n\n/**\n  @brief  Q15 table for reciprocal\n*/\nconst q15_t __ALIGNED(4) armRecipTableQ15[64] = {\n    0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0, 0x7434, 0x7294,\n    0x70FF, 0x6F76, 0x6DF6, 0x6C82, 0x6B16, 0x69B5, 0x685C, 0x670C,\n    0x65C4, 0x6484, 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,\n    0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E, 0x56B0, 0x55C8,\n    0x54E4, 0x5405, 0x532B, 0x5255, 0x5183, 0x50B6, 0x4FEC, 0x4F26,\n    0x4E64, 0x4DA6, 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,\n    0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8, 0x4521, 0x448D,\n    0x43FC, 0x436C, 0x42DF, 0x4255, 0x41CC, 0x4146, 0x40C2, 0x4040};\n\n/**\n  @brief  Q31 table for reciprocal\n*/\nconst q31_t armRecipTableQ31[64] = {\n    0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,\n    0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,\n    0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,\n    0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,\n    0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,\n    0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,\n    0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,\n    0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,\n    0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,\n    0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,\n    0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102};\n\nconst uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH] = {\n    /* 8x2, size 20 */\n    8,  64, 24, 72, 16, 64,  40, 80, 32,  64,\n    56, 88, 48, 72, 88, 104, 72, 96, 104, 112};\n\nconst uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH] = {\n    /* 8x4, size 48 */\n    8,   64,  16,  128, 24,  192, 32,  64,  40,  72,  48,  136,\n    56,  200, 64,  128, 72,  80,  88,  208, 80,  144, 96,  192,\n    104, 208, 112, 152, 120, 216, 136, 192, 144, 160, 168, 208,\n    152, 224, 176, 208, 184, 232, 216, 240, 200, 224, 232, 240};\n\nconst uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH] = {\n    /* radix 8, size 56 */\n    8,   64,  16,  128, 24,  192, 32,  256, 40,  320, 48,  384, 56,  448,\n    80,  136, 88,  200, 96,  264, 104, 328, 112, 392, 120, 456, 152, 208,\n    160, 272, 168, 336, 176, 400, 184, 464, 224, 280, 232, 344, 240, 408,\n    248, 472, 296, 352, 304, 416, 312, 480, 368, 424, 376, 488, 440, 496};\n\nconst uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] = {\n    /* 8x2, size 208 */\n    8,   512, 16,  64,  24,  576, 32,  128, 40,   640, 48,  192, 56,  704,  64,\n    256, 72,  768, 80,  320, 88,  832, 96,  384,  104, 896, 112, 448, 120,  960,\n    128, 512, 136, 520, 144, 768, 152, 584, 160,  520, 168, 648, 176, 200,  184,\n    712, 192, 264, 200, 776, 208, 328, 216, 840,  224, 392, 232, 904, 240,  456,\n    248, 968, 264, 528, 272, 320, 280, 592, 288,  768, 296, 656, 304, 328,  312,\n    720, 328, 784, 344, 848, 352, 400, 360, 912,  368, 464, 376, 976, 384,  576,\n    392, 536, 400, 832, 408, 600, 416, 584, 424,  664, 432, 840, 440, 728,  448,\n    592, 456, 792, 464, 848, 472, 856, 480, 600,  488, 920, 496, 856, 504,  984,\n    520, 544, 528, 576, 536, 608, 552, 672, 560,  608, 568, 736, 576, 768,  584,\n    800, 592, 832, 600, 864, 608, 800, 616, 928,  624, 864, 632, 992, 648,  672,\n    656, 896, 664, 928, 688, 904, 696, 744, 704,  896, 712, 808, 720, 912,  728,\n    872, 736, 928, 744, 936, 752, 920, 760, 1000, 776, 800, 784, 832, 792,  864,\n    808, 904, 816, 864, 824, 920, 840, 864, 856,  880, 872, 944, 888, 1008, 904,\n    928, 912, 960, 920, 992, 944, 968, 952, 1000, 968, 992, 984, 1008};\n\nconst uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] = {\n    /* 8x4, size 440 */\n    8,    512,  16,   1024, 24,   1536, 32,   64,   40,   576,  48,   1088,\n    56,   1600, 64,   128,  72,   640,  80,   1152, 88,   1664, 96,   192,\n    104,  704,  112,  1216, 120,  1728, 128,  256,  136,  768,  144,  1280,\n    152,  1792, 160,  320,  168,  832,  176,  1344, 184,  1856, 192,  384,\n    200,  896,  208,  1408, 216,  1920, 224,  448,  232,  960,  240,  1472,\n    248,  1984, 256,  512,  264,  520,  272,  1032, 280,  1544, 288,  640,\n    296,  584,  304,  1096, 312,  1608, 320,  768,  328,  648,  336,  1160,\n    344,  1672, 352,  896,  360,  712,  368,  1224, 376,  1736, 384,  520,\n    392,  776,  400,  1288, 408,  1800, 416,  648,  424,  840,  432,  1352,\n    440,  1864, 448,  776,  456,  904,  464,  1416, 472,  1928, 480,  904,\n    488,  968,  496,  1480, 504,  1992, 520,  528,  512,  1024, 528,  1040,\n    536,  1552, 544,  1152, 552,  592,  560,  1104, 568,  1616, 576,  1280,\n    584,  656,  592,  1168, 600,  1680, 608,  1408, 616,  720,  624,  1232,\n    632,  1744, 640,  1032, 648,  784,  656,  1296, 664,  1808, 672,  1160,\n    680,  848,  688,  1360, 696,  1872, 704,  1288, 712,  912,  720,  1424,\n    728,  1936, 736,  1416, 744,  976,  752,  1488, 760,  2000, 768,  1536,\n    776,  1552, 784,  1048, 792,  1560, 800,  1664, 808,  1680, 816,  1112,\n    824,  1624, 832,  1792, 840,  1808, 848,  1176, 856,  1688, 864,  1920,\n    872,  1936, 880,  1240, 888,  1752, 896,  1544, 904,  1560, 912,  1304,\n    920,  1816, 928,  1672, 936,  1688, 944,  1368, 952,  1880, 960,  1800,\n    968,  1816, 976,  1432, 984,  1944, 992,  1928, 1000, 1944, 1008, 1496,\n    1016, 2008, 1032, 1152, 1040, 1056, 1048, 1568, 1064, 1408, 1072, 1120,\n    1080, 1632, 1088, 1536, 1096, 1160, 1104, 1184, 1112, 1696, 1120, 1552,\n    1128, 1416, 1136, 1248, 1144, 1760, 1160, 1664, 1168, 1312, 1176, 1824,\n    1184, 1544, 1192, 1920, 1200, 1376, 1208, 1888, 1216, 1568, 1224, 1672,\n    1232, 1440, 1240, 1952, 1248, 1560, 1256, 1928, 1264, 1504, 1272, 2016,\n    1288, 1312, 1296, 1408, 1304, 1576, 1320, 1424, 1328, 1416, 1336, 1640,\n    1344, 1792, 1352, 1824, 1360, 1920, 1368, 1704, 1376, 1800, 1384, 1432,\n    1392, 1928, 1400, 1768, 1416, 1680, 1432, 1832, 1440, 1576, 1448, 1936,\n    1456, 1832, 1464, 1896, 1472, 1808, 1480, 1688, 1488, 1936, 1496, 1960,\n    1504, 1816, 1512, 1944, 1520, 1944, 1528, 2024, 1560, 1584, 1592, 1648,\n    1600, 1792, 1608, 1920, 1616, 1800, 1624, 1712, 1632, 1808, 1640, 1936,\n    1648, 1816, 1656, 1776, 1672, 1696, 1688, 1840, 1704, 1952, 1712, 1928,\n    1720, 1904, 1728, 1824, 1736, 1952, 1744, 1832, 1752, 1968, 1760, 1840,\n    1768, 1960, 1776, 1944, 1784, 2032, 1864, 1872, 1848, 1944, 1872, 1888,\n    1880, 1904, 1888, 1984, 1896, 2000, 1912, 2032, 1904, 2016, 1976, 2032,\n    1960, 1968, 2008, 2032, 1992, 2016, 2024, 2032};\n\nconst uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] = {\n    /* radix 8, size 448 */\n    8,    512,  16,   1024, 24,   1536, 32,   2048, 40,   2560, 48,   3072,\n    56,   3584, 72,   576,  80,   1088, 88,   1600, 96,   2112, 104,  2624,\n    112,  3136, 120,  3648, 136,  640,  144,  1152, 152,  1664, 160,  2176,\n    168,  2688, 176,  3200, 184,  3712, 200,  704,  208,  1216, 216,  1728,\n    224,  2240, 232,  2752, 240,  3264, 248,  3776, 264,  768,  272,  1280,\n    280,  1792, 288,  2304, 296,  2816, 304,  3328, 312,  3840, 328,  832,\n    336,  1344, 344,  1856, 352,  2368, 360,  2880, 368,  3392, 376,  3904,\n    392,  896,  400,  1408, 408,  1920, 416,  2432, 424,  2944, 432,  3456,\n    440,  3968, 456,  960,  464,  1472, 472,  1984, 480,  2496, 488,  3008,\n    496,  3520, 504,  4032, 528,  1032, 536,  1544, 544,  2056, 552,  2568,\n    560,  3080, 568,  3592, 592,  1096, 600,  1608, 608,  2120, 616,  2632,\n    624,  3144, 632,  3656, 656,  1160, 664,  1672, 672,  2184, 680,  2696,\n    688,  3208, 696,  3720, 720,  1224, 728,  1736, 736,  2248, 744,  2760,\n    752,  3272, 760,  3784, 784,  1288, 792,  1800, 800,  2312, 808,  2824,\n    816,  3336, 824,  3848, 848,  1352, 856,  1864, 864,  2376, 872,  2888,\n    880,  3400, 888,  3912, 912,  1416, 920,  1928, 928,  2440, 936,  2952,\n    944,  3464, 952,  3976, 976,  1480, 984,  1992, 992,  2504, 1000, 3016,\n    1008, 3528, 1016, 4040, 1048, 1552, 1056, 2064, 1064, 2576, 1072, 3088,\n    1080, 3600, 1112, 1616, 1120, 2128, 1128, 2640, 1136, 3152, 1144, 3664,\n    1176, 1680, 1184, 2192, 1192, 2704, 1200, 3216, 1208, 3728, 1240, 1744,\n    1248, 2256, 1256, 2768, 1264, 3280, 1272, 3792, 1304, 1808, 1312, 2320,\n    1320, 2832, 1328, 3344, 1336, 3856, 1368, 1872, 1376, 2384, 1384, 2896,\n    1392, 3408, 1400, 3920, 1432, 1936, 1440, 2448, 1448, 2960, 1456, 3472,\n    1464, 3984, 1496, 2000, 1504, 2512, 1512, 3024, 1520, 3536, 1528, 4048,\n    1568, 2072, 1576, 2584, 1584, 3096, 1592, 3608, 1632, 2136, 1640, 2648,\n    1648, 3160, 1656, 3672, 1696, 2200, 1704, 2712, 1712, 3224, 1720, 3736,\n    1760, 2264, 1768, 2776, 1776, 3288, 1784, 3800, 1824, 2328, 1832, 2840,\n    1840, 3352, 1848, 3864, 1888, 2392, 1896, 2904, 1904, 3416, 1912, 3928,\n    1952, 2456, 1960, 2968, 1968, 3480, 1976, 3992, 2016, 2520, 2024, 3032,\n    2032, 3544, 2040, 4056, 2088, 2592, 2096, 3104, 2104, 3616, 2152, 2656,\n    2160, 3168, 2168, 3680, 2216, 2720, 2224, 3232, 2232, 3744, 2280, 2784,\n    2288, 3296, 2296, 3808, 2344, 2848, 2352, 3360, 2360, 3872, 2408, 2912,\n    2416, 3424, 2424, 3936, 2472, 2976, 2480, 3488, 2488, 4000, 2536, 3040,\n    2544, 3552, 2552, 4064, 2608, 3112, 2616, 3624, 2672, 3176, 2680, 3688,\n    2736, 3240, 2744, 3752, 2800, 3304, 2808, 3816, 2864, 3368, 2872, 3880,\n    2928, 3432, 2936, 3944, 2992, 3496, 3000, 4008, 3056, 3560, 3064, 4072,\n    3128, 3632, 3192, 3696, 3256, 3760, 3320, 3824, 3384, 3888, 3448, 3952,\n    3512, 4016, 3576, 4080};\n\nconst uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH] =\n    {\n        /* 8x2, size 1800 */\n        8,    4096, 16,   512,  24,   4608, 32,   1024, 40,   5120, 48,   1536,\n        56,   5632, 64,   2048, 72,   6144, 80,   2560, 88,   6656, 96,   3072,\n        104,  7168, 112,  3584, 120,  7680, 128,  2048, 136,  4160, 144,  576,\n        152,  4672, 160,  1088, 168,  5184, 176,  1600, 184,  5696, 192,  2112,\n        200,  6208, 208,  2624, 216,  6720, 224,  3136, 232,  7232, 240,  3648,\n        248,  7744, 256,  2048, 264,  4224, 272,  640,  280,  4736, 288,  1152,\n        296,  5248, 304,  1664, 312,  5760, 320,  2176, 328,  6272, 336,  2688,\n        344,  6784, 352,  3200, 360,  7296, 368,  3712, 376,  7808, 384,  2112,\n        392,  4288, 400,  704,  408,  4800, 416,  1216, 424,  5312, 432,  1728,\n        440,  5824, 448,  2240, 456,  6336, 464,  2752, 472,  6848, 480,  3264,\n        488,  7360, 496,  3776, 504,  7872, 512,  2048, 520,  4352, 528,  768,\n        536,  4864, 544,  1280, 552,  5376, 560,  1792, 568,  5888, 576,  2304,\n        584,  6400, 592,  2816, 600,  6912, 608,  3328, 616,  7424, 624,  3840,\n        632,  7936, 640,  2176, 648,  4416, 656,  832,  664,  4928, 672,  1344,\n        680,  5440, 688,  1856, 696,  5952, 704,  2368, 712,  6464, 720,  2880,\n        728,  6976, 736,  3392, 744,  7488, 752,  3904, 760,  8000, 768,  2112,\n        776,  4480, 784,  896,  792,  4992, 800,  1408, 808,  5504, 816,  1920,\n        824,  6016, 832,  2432, 840,  6528, 848,  2944, 856,  7040, 864,  3456,\n        872,  7552, 880,  3968, 888,  8064, 896,  2240, 904,  4544, 912,  960,\n        920,  5056, 928,  1472, 936,  5568, 944,  1984, 952,  6080, 960,  2496,\n        968,  6592, 976,  3008, 984,  7104, 992,  3520, 1000, 7616, 1008, 4032,\n        1016, 8128, 1024, 4096, 1032, 4104, 1040, 4352, 1048, 4616, 1056, 4104,\n        1064, 5128, 1072, 1544, 1080, 5640, 1088, 2056, 1096, 6152, 1104, 2568,\n        1112, 6664, 1120, 3080, 1128, 7176, 1136, 3592, 1144, 7688, 1152, 6144,\n        1160, 4168, 1168, 6400, 1176, 4680, 1184, 6152, 1192, 5192, 1200, 1608,\n        1208, 5704, 1216, 2120, 1224, 6216, 1232, 2632, 1240, 6728, 1248, 3144,\n        1256, 7240, 1264, 3656, 1272, 7752, 1280, 4160, 1288, 4232, 1296, 4416,\n        1304, 4744, 1312, 4168, 1320, 5256, 1328, 1672, 1336, 5768, 1344, 2184,\n        1352, 6280, 1360, 2696, 1368, 6792, 1376, 3208, 1384, 7304, 1392, 3720,\n        1400, 7816, 1408, 6208, 1416, 4296, 1424, 6464, 1432, 4808, 1440, 6216,\n        1448, 5320, 1456, 1736, 1464, 5832, 1472, 2248, 1480, 6344, 1488, 2760,\n        1496, 6856, 1504, 3272, 1512, 7368, 1520, 3784, 1528, 7880, 1536, 4224,\n        1544, 4360, 1552, 4480, 1560, 4872, 1568, 4232, 1576, 5384, 1584, 1800,\n        1592, 5896, 1600, 2312, 1608, 6408, 1616, 2824, 1624, 6920, 1632, 3336,\n        1640, 7432, 1648, 3848, 1656, 7944, 1664, 6272, 1672, 4424, 1680, 6528,\n        1688, 4936, 1696, 6280, 1704, 5448, 1712, 1864, 1720, 5960, 1728, 2376,\n        1736, 6472, 1744, 2888, 1752, 6984, 1760, 3400, 1768, 7496, 1776, 3912,\n        1784, 8008, 1792, 4288, 1800, 4488, 1808, 4544, 1816, 5000, 1824, 4296,\n        1832, 5512, 1840, 1928, 1848, 6024, 1856, 2440, 1864, 6536, 1872, 2952,\n        1880, 7048, 1888, 3464, 1896, 7560, 1904, 3976, 1912, 8072, 1920, 6336,\n        1928, 4552, 1936, 6592, 1944, 5064, 1952, 6344, 1960, 5576, 1968, 1992,\n        1976, 6088, 1984, 2504, 1992, 6600, 2000, 3016, 2008, 7112, 2016, 3528,\n        2024, 7624, 2032, 4040, 2040, 8136, 2056, 4112, 2064, 2112, 2072, 4624,\n        2080, 4352, 2088, 5136, 2096, 4480, 2104, 5648, 2120, 6160, 2128, 2576,\n        2136, 6672, 2144, 3088, 2152, 7184, 2160, 3600, 2168, 7696, 2176, 2560,\n        2184, 4176, 2192, 2816, 2200, 4688, 2208, 2568, 2216, 5200, 2224, 2824,\n        2232, 5712, 2240, 2576, 2248, 6224, 2256, 2640, 2264, 6736, 2272, 3152,\n        2280, 7248, 2288, 3664, 2296, 7760, 2312, 4240, 2320, 2432, 2328, 4752,\n        2336, 6400, 2344, 5264, 2352, 6528, 2360, 5776, 2368, 2816, 2376, 6288,\n        2384, 2704, 2392, 6800, 2400, 3216, 2408, 7312, 2416, 3728, 2424, 7824,\n        2432, 2624, 2440, 4304, 2448, 2880, 2456, 4816, 2464, 2632, 2472, 5328,\n        2480, 2888, 2488, 5840, 2496, 2640, 2504, 6352, 2512, 2768, 2520, 6864,\n        2528, 3280, 2536, 7376, 2544, 3792, 2552, 7888, 2568, 4368, 2584, 4880,\n        2592, 4416, 2600, 5392, 2608, 4544, 2616, 5904, 2632, 6416, 2640, 2832,\n        2648, 6928, 2656, 3344, 2664, 7440, 2672, 3856, 2680, 7952, 2696, 4432,\n        2704, 2944, 2712, 4944, 2720, 4432, 2728, 5456, 2736, 2952, 2744, 5968,\n        2752, 2944, 2760, 6480, 2768, 2896, 2776, 6992, 2784, 3408, 2792, 7504,\n        2800, 3920, 2808, 8016, 2824, 4496, 2840, 5008, 2848, 6464, 2856, 5520,\n        2864, 6592, 2872, 6032, 2888, 6544, 2896, 2960, 2904, 7056, 2912, 3472,\n        2920, 7568, 2928, 3984, 2936, 8080, 2952, 4560, 2960, 3008, 2968, 5072,\n        2976, 6480, 2984, 5584, 2992, 3016, 3000, 6096, 3016, 6608, 3032, 7120,\n        3040, 3536, 3048, 7632, 3056, 4048, 3064, 8144, 3072, 4608, 3080, 4120,\n        3088, 4864, 3096, 4632, 3104, 4616, 3112, 5144, 3120, 4872, 3128, 5656,\n        3136, 4624, 3144, 6168, 3152, 4880, 3160, 6680, 3168, 4632, 3176, 7192,\n        3184, 3608, 3192, 7704, 3200, 6656, 3208, 4184, 3216, 6912, 3224, 4696,\n        3232, 6664, 3240, 5208, 3248, 6920, 3256, 5720, 3264, 6672, 3272, 6232,\n        3280, 6928, 3288, 6744, 3296, 6680, 3304, 7256, 3312, 3672, 3320, 7768,\n        3328, 4672, 3336, 4248, 3344, 4928, 3352, 4760, 3360, 4680, 3368, 5272,\n        3376, 4936, 3384, 5784, 3392, 4688, 3400, 6296, 3408, 4944, 3416, 6808,\n        3424, 4696, 3432, 7320, 3440, 3736, 3448, 7832, 3456, 6720, 3464, 4312,\n        3472, 6976, 3480, 4824, 3488, 6728, 3496, 5336, 3504, 6984, 3512, 5848,\n        3520, 6736, 3528, 6360, 3536, 6992, 3544, 6872, 3552, 6744, 3560, 7384,\n        3568, 3800, 3576, 7896, 3584, 4736, 3592, 4376, 3600, 4992, 3608, 4888,\n        3616, 4744, 3624, 5400, 3632, 5000, 3640, 5912, 3648, 4752, 3656, 6424,\n        3664, 5008, 3672, 6936, 3680, 4760, 3688, 7448, 3696, 3864, 3704, 7960,\n        3712, 6784, 3720, 4440, 3728, 7040, 3736, 4952, 3744, 6792, 3752, 5464,\n        3760, 7048, 3768, 5976, 3776, 6800, 3784, 6488, 3792, 7056, 3800, 7000,\n        3808, 6808, 3816, 7512, 3824, 3928, 3832, 8024, 3840, 4800, 3848, 4504,\n        3856, 5056, 3864, 5016, 3872, 4808, 3880, 5528, 3888, 5064, 3896, 6040,\n        3904, 4816, 3912, 6552, 3920, 5072, 3928, 7064, 3936, 4824, 3944, 7576,\n        3952, 3992, 3960, 8088, 3968, 6848, 3976, 4568, 3984, 7104, 3992, 5080,\n        4000, 6856, 4008, 5592, 4016, 7112, 4024, 6104, 4032, 6864, 4040, 6616,\n        4048, 7120, 4056, 7128, 4064, 6872, 4072, 7640, 4080, 7128, 4088, 8152,\n        4104, 4128, 4112, 4160, 4120, 4640, 4136, 5152, 4144, 4232, 4152, 5664,\n        4160, 4352, 4168, 6176, 4176, 4416, 4184, 6688, 4192, 4616, 4200, 7200,\n        4208, 4744, 4216, 7712, 4224, 4608, 4232, 4616, 4240, 4672, 4248, 4704,\n        4256, 4640, 4264, 5216, 4272, 4704, 4280, 5728, 4288, 4864, 4296, 6240,\n        4304, 4928, 4312, 6752, 4320, 4632, 4328, 7264, 4336, 4760, 4344, 7776,\n        4360, 4640, 4368, 4416, 4376, 4768, 4384, 6152, 4392, 5280, 4400, 6280,\n        4408, 5792, 4424, 6304, 4440, 6816, 4448, 6664, 4456, 7328, 4464, 6792,\n        4472, 7840, 4480, 4624, 4488, 4632, 4496, 4688, 4504, 4832, 4512, 6168,\n        4520, 5344, 4528, 6296, 4536, 5856, 4544, 4880, 4552, 6368, 4560, 4944,\n        4568, 6880, 4576, 6680, 4584, 7392, 4592, 6808, 4600, 7904, 4608, 6144,\n        4616, 6152, 4624, 6208, 4632, 4896, 4640, 6176, 4648, 5408, 4656, 6240,\n        4664, 5920, 4672, 6400, 4680, 6432, 4688, 6464, 4696, 6944, 4704, 6432,\n        4712, 7456, 4720, 4808, 4728, 7968, 4736, 6656, 4744, 6664, 4752, 6720,\n        4760, 4960, 4768, 6688, 4776, 5472, 4784, 6752, 4792, 5984, 4800, 6912,\n        4808, 6496, 4816, 6976, 4824, 7008, 4832, 6944, 4840, 7520, 4848, 7008,\n        4856, 8032, 4864, 6160, 4872, 6168, 4880, 6224, 4888, 5024, 4896, 6216,\n        4904, 5536, 4912, 6344, 4920, 6048, 4928, 6416, 4936, 6560, 4944, 6480,\n        4952, 7072, 4960, 6728, 4968, 7584, 4976, 6856, 4984, 8096, 4992, 6672,\n        5000, 6680, 5008, 6736, 5016, 5088, 5024, 6232, 5032, 5600, 5040, 6360,\n        5048, 6112, 5056, 6928, 5064, 6624, 5072, 6992, 5080, 7136, 5088, 6744,\n        5096, 7648, 5104, 6872, 5112, 8160, 5128, 5152, 5136, 5376, 5144, 5408,\n        5168, 5384, 5176, 5672, 5184, 5376, 5192, 6184, 5200, 5392, 5208, 6696,\n        5216, 5408, 5224, 7208, 5232, 5400, 5240, 7720, 5248, 7168, 5256, 7200,\n        5264, 7424, 5272, 7456, 5280, 7176, 5288, 7208, 5296, 7432, 5304, 5736,\n        5312, 7184, 5320, 6248, 5328, 7440, 5336, 6760, 5344, 7192, 5352, 7272,\n        5360, 7448, 5368, 7784, 5384, 5408, 5392, 5440, 5400, 5472, 5408, 6184,\n        5416, 7208, 5424, 5448, 5432, 5800, 5448, 6312, 5464, 6824, 5472, 6696,\n        5480, 7336, 5488, 6824, 5496, 7848, 5504, 7232, 5512, 7264, 5520, 7488,\n        5528, 7520, 5536, 7240, 5544, 7272, 5552, 7496, 5560, 5864, 5568, 7248,\n        5576, 6376, 5584, 7504, 5592, 6888, 5600, 7256, 5608, 7400, 5616, 7512,\n        5624, 7912, 5632, 7168, 5640, 7176, 5648, 7232, 5656, 7240, 5664, 7200,\n        5672, 7208, 5680, 7264, 5688, 5928, 5696, 7424, 5704, 6440, 5712, 7488,\n        5720, 6952, 5728, 7456, 5736, 7464, 5744, 7520, 5752, 7976, 5760, 7296,\n        5768, 7328, 5776, 7552, 5784, 7584, 5792, 7304, 5800, 7336, 5808, 7560,\n        5816, 5992, 5824, 7312, 5832, 6504, 5840, 7568, 5848, 7016, 5856, 7320,\n        5864, 7528, 5872, 7576, 5880, 8040, 5888, 7184, 5896, 7192, 5904, 7248,\n        5912, 7256, 5920, 6248, 5928, 7272, 5936, 6376, 5944, 6056, 5952, 7440,\n        5960, 6568, 5968, 7504, 5976, 7080, 5984, 6760, 5992, 7592, 6000, 6888,\n        6008, 8104, 6016, 7360, 6024, 7392, 6032, 7616, 6040, 7648, 6048, 7368,\n        6056, 7400, 6064, 7624, 6072, 6120, 6080, 7376, 6088, 6632, 6096, 7632,\n        6104, 7144, 6112, 7384, 6120, 7656, 6128, 7640, 6136, 8168, 6168, 6240,\n        6192, 6216, 6200, 7264, 6232, 6704, 6248, 7216, 6256, 6680, 6264, 7728,\n        6272, 6656, 6280, 6664, 6288, 6912, 6296, 6496, 6304, 6688, 6312, 6696,\n        6320, 6944, 6328, 7520, 6336, 6672, 6344, 6680, 6352, 6928, 6360, 6768,\n        6368, 6704, 6376, 7280, 6384, 6744, 6392, 7792, 6408, 6432, 6424, 6752,\n        6440, 7432, 6448, 6536, 6456, 7560, 6472, 6944, 6488, 6832, 6496, 6920,\n        6504, 7344, 6512, 7048, 6520, 7856, 6528, 6720, 6536, 6728, 6544, 6976,\n        6552, 7008, 6560, 6752, 6568, 7448, 6576, 7008, 6584, 7576, 6592, 6736,\n        6600, 6744, 6608, 6992, 6616, 6896, 6624, 6936, 6632, 7408, 6640, 7064,\n        6648, 7920, 6712, 7280, 6744, 6960, 6760, 7472, 6768, 6936, 6776, 7984,\n        6800, 6848, 6808, 6856, 6832, 6880, 6840, 6888, 6848, 7040, 6856, 7048,\n        6864, 7104, 6872, 7024, 6880, 7072, 6888, 7536, 6896, 7136, 6904, 8048,\n        6952, 7496, 6968, 7624, 6984, 7008, 7000, 7088, 7016, 7600, 7024, 7112,\n        7032, 8112, 7056, 7104, 7064, 7112, 7080, 7512, 7088, 7136, 7096, 7640,\n        7128, 7152, 7144, 7664, 7160, 8176, 7176, 7200, 7192, 7216, 7224, 7272,\n        7240, 7264, 7256, 7280, 7288, 7736, 7296, 7680, 7304, 7712, 7312, 7936,\n        7320, 7968, 7328, 7688, 7336, 7720, 7344, 7944, 7352, 7976, 7360, 7696,\n        7368, 7728, 7376, 7952, 7384, 7984, 7392, 7704, 7400, 7736, 7408, 7960,\n        7416, 7800, 7432, 7456, 7448, 7472, 7480, 7592, 7496, 7520, 7512, 7536,\n        7528, 7976, 7544, 7864, 7552, 7744, 7560, 7776, 7568, 8000, 7576, 8032,\n        7584, 7752, 7592, 7784, 7600, 8008, 7608, 8040, 7616, 7760, 7624, 7792,\n        7632, 8016, 7640, 8048, 7648, 7768, 7656, 7800, 7664, 8024, 7672, 7928,\n        7688, 7712, 7704, 7728, 7752, 7776, 7768, 7792, 7800, 7992, 7816, 7840,\n        7824, 8064, 7832, 8096, 7856, 8072, 7864, 8104, 7872, 8064, 7880, 8072,\n        7888, 8080, 7896, 8112, 7904, 8096, 7912, 8104, 7920, 8088, 7928, 8056,\n        7944, 7968, 7960, 7984, 8008, 8032, 8024, 8048, 8056, 8120, 8072, 8096,\n        8080, 8128, 8088, 8160, 8112, 8136, 8120, 8168, 8136, 8160, 8152, 8176};\n\nconst uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH] =\n    {\n        /* 8x2, size 3808 */\n        8,     4096,  16,    8192,  24,    12288, 32,    512,   40,    4608,\n        48,    8704,  56,    12800, 64,    1024,  72,    5120,  80,    9216,\n        88,    13312, 96,    1536,  104,   5632,  112,   9728,  120,   13824,\n        128,   2048,  136,   6144,  144,   10240, 152,   14336, 160,   2560,\n        168,   6656,  176,   10752, 184,   14848, 192,   3072,  200,   7168,\n        208,   11264, 216,   15360, 224,   3584,  232,   7680,  240,   11776,\n        248,   15872, 256,   1024,  264,   4160,  272,   8256,  280,   12352,\n        288,   576,   296,   4672,  304,   8768,  312,   12864, 320,   1088,\n        328,   5184,  336,   9280,  344,   13376, 352,   1600,  360,   5696,\n        368,   9792,  376,   13888, 384,   2112,  392,   6208,  400,   10304,\n        408,   14400, 416,   2624,  424,   6720,  432,   10816, 440,   14912,\n        448,   3136,  456,   7232,  464,   11328, 472,   15424, 480,   3648,\n        488,   7744,  496,   11840, 504,   15936, 512,   2048,  520,   4224,\n        528,   8320,  536,   12416, 544,   640,   552,   4736,  560,   8832,\n        568,   12928, 576,   1152,  584,   5248,  592,   9344,  600,   13440,\n        608,   1664,  616,   5760,  624,   9856,  632,   13952, 640,   2176,\n        648,   6272,  656,   10368, 664,   14464, 672,   2688,  680,   6784,\n        688,   10880, 696,   14976, 704,   3200,  712,   7296,  720,   11392,\n        728,   15488, 736,   3712,  744,   7808,  752,   11904, 760,   16000,\n        768,   3072,  776,   4288,  784,   8384,  792,   12480, 800,   3200,\n        808,   4800,  816,   8896,  824,   12992, 832,   1216,  840,   5312,\n        848,   9408,  856,   13504, 864,   1728,  872,   5824,  880,   9920,\n        888,   14016, 896,   2240,  904,   6336,  912,   10432, 920,   14528,\n        928,   2752,  936,   6848,  944,   10944, 952,   15040, 960,   3264,\n        968,   7360,  976,   11456, 984,   15552, 992,   3776,  1000,  7872,\n        1008,  11968, 1016,  16064, 1032,  4352,  1040,  8448,  1048,  12544,\n        1056,  3072,  1064,  4864,  1072,  8960,  1080,  13056, 1088,  1280,\n        1096,  5376,  1104,  9472,  1112,  13568, 1120,  1792,  1128,  5888,\n        1136,  9984,  1144,  14080, 1152,  2304,  1160,  6400,  1168,  10496,\n        1176,  14592, 1184,  2816,  1192,  6912,  1200,  11008, 1208,  15104,\n        1216,  3328,  1224,  7424,  1232,  11520, 1240,  15616, 1248,  3840,\n        1256,  7936,  1264,  12032, 1272,  16128, 1288,  4416,  1296,  8512,\n        1304,  12608, 1312,  3328,  1320,  4928,  1328,  9024,  1336,  13120,\n        1352,  5440,  1360,  9536,  1368,  13632, 1376,  1856,  1384,  5952,\n        1392,  10048, 1400,  14144, 1408,  2368,  1416,  6464,  1424,  10560,\n        1432,  14656, 1440,  2880,  1448,  6976,  1456,  11072, 1464,  15168,\n        1472,  3392,  1480,  7488,  1488,  11584, 1496,  15680, 1504,  3904,\n        1512,  8000,  1520,  12096, 1528,  16192, 1536,  2112,  1544,  4480,\n        1552,  8576,  1560,  12672, 1568,  2240,  1576,  4992,  1584,  9088,\n        1592,  13184, 1600,  2368,  1608,  5504,  1616,  9600,  1624,  13696,\n        1632,  1920,  1640,  6016,  1648,  10112, 1656,  14208, 1664,  2432,\n        1672,  6528,  1680,  10624, 1688,  14720, 1696,  2944,  1704,  7040,\n        1712,  11136, 1720,  15232, 1728,  3456,  1736,  7552,  1744,  11648,\n        1752,  15744, 1760,  3968,  1768,  8064,  1776,  12160, 1784,  16256,\n        1792,  3136,  1800,  4544,  1808,  8640,  1816,  12736, 1824,  3264,\n        1832,  5056,  1840,  9152,  1848,  13248, 1856,  3392,  1864,  5568,\n        1872,  9664,  1880,  13760, 1888,  1984,  1896,  6080,  1904,  10176,\n        1912,  14272, 1920,  2496,  1928,  6592,  1936,  10688, 1944,  14784,\n        1952,  3008,  1960,  7104,  1968,  11200, 1976,  15296, 1984,  3520,\n        1992,  7616,  2000,  11712, 2008,  15808, 2016,  4032,  2024,  8128,\n        2032,  12224, 2040,  16320, 2048,  4096,  2056,  4104,  2064,  8200,\n        2072,  12296, 2080,  4224,  2088,  4616,  2096,  8712,  2104,  12808,\n        2112,  4352,  2120,  5128,  2128,  9224,  2136,  13320, 2144,  4480,\n        2152,  5640,  2160,  9736,  2168,  13832, 2176,  4104,  2184,  6152,\n        2192,  10248, 2200,  14344, 2208,  2568,  2216,  6664,  2224,  10760,\n        2232,  14856, 2240,  3080,  2248,  7176,  2256,  11272, 2264,  15368,\n        2272,  3592,  2280,  7688,  2288,  11784, 2296,  15880, 2304,  5120,\n        2312,  4168,  2320,  8264,  2328,  12360, 2336,  5248,  2344,  4680,\n        2352,  8776,  2360,  12872, 2368,  5376,  2376,  5192,  2384,  9288,\n        2392,  13384, 2400,  5504,  2408,  5704,  2416,  9800,  2424,  13896,\n        2432,  5128,  2440,  6216,  2448,  10312, 2456,  14408, 2464,  2632,\n        2472,  6728,  2480,  10824, 2488,  14920, 2496,  3144,  2504,  7240,\n        2512,  11336, 2520,  15432, 2528,  3656,  2536,  7752,  2544,  11848,\n        2552,  15944, 2560,  6144,  2568,  4232,  2576,  8328,  2584,  12424,\n        2592,  6272,  2600,  4744,  2608,  8840,  2616,  12936, 2624,  6400,\n        2632,  5256,  2640,  9352,  2648,  13448, 2656,  6528,  2664,  5768,\n        2672,  9864,  2680,  13960, 2688,  6152,  2696,  6280,  2704,  10376,\n        2712,  14472, 2720,  6280,  2728,  6792,  2736,  10888, 2744,  14984,\n        2752,  3208,  2760,  7304,  2768,  11400, 2776,  15496, 2784,  3720,\n        2792,  7816,  2800,  11912, 2808,  16008, 2816,  7168,  2824,  4296,\n        2832,  8392,  2840,  12488, 2848,  7296,  2856,  4808,  2864,  8904,\n        2872,  13000, 2880,  7424,  2888,  5320,  2896,  9416,  2904,  13512,\n        2912,  7552,  2920,  5832,  2928,  9928,  2936,  14024, 2944,  7176,\n        2952,  6344,  2960,  10440, 2968,  14536, 2976,  7304,  2984,  6856,\n        2992,  10952, 3000,  15048, 3008,  3272,  3016,  7368,  3024,  11464,\n        3032,  15560, 3040,  3784,  3048,  7880,  3056,  11976, 3064,  16072,\n        3072,  4160,  3080,  4360,  3088,  8456,  3096,  12552, 3104,  4288,\n        3112,  4872,  3120,  8968,  3128,  13064, 3136,  4416,  3144,  5384,\n        3152,  9480,  3160,  13576, 3168,  4544,  3176,  5896,  3184,  9992,\n        3192,  14088, 3200,  4168,  3208,  6408,  3216,  10504, 3224,  14600,\n        3232,  4296,  3240,  6920,  3248,  11016, 3256,  15112, 3264,  3336,\n        3272,  7432,  3280,  11528, 3288,  15624, 3296,  3848,  3304,  7944,\n        3312,  12040, 3320,  16136, 3328,  5184,  3336,  4424,  3344,  8520,\n        3352,  12616, 3360,  5312,  3368,  4936,  3376,  9032,  3384,  13128,\n        3392,  5440,  3400,  5448,  3408,  9544,  3416,  13640, 3424,  5568,\n        3432,  5960,  3440,  10056, 3448,  14152, 3456,  5192,  3464,  6472,\n        3472,  10568, 3480,  14664, 3488,  5320,  3496,  6984,  3504,  11080,\n        3512,  15176, 3520,  5448,  3528,  7496,  3536,  11592, 3544,  15688,\n        3552,  3912,  3560,  8008,  3568,  12104, 3576,  16200, 3584,  6208,\n        3592,  4488,  3600,  8584,  3608,  12680, 3616,  6336,  3624,  5000,\n        3632,  9096,  3640,  13192, 3648,  6464,  3656,  5512,  3664,  9608,\n        3672,  13704, 3680,  6592,  3688,  6024,  3696,  10120, 3704,  14216,\n        3712,  6216,  3720,  6536,  3728,  10632, 3736,  14728, 3744,  6344,\n        3752,  7048,  3760,  11144, 3768,  15240, 3776,  6472,  3784,  7560,\n        3792,  11656, 3800,  15752, 3808,  3976,  3816,  8072,  3824,  12168,\n        3832,  16264, 3840,  7232,  3848,  4552,  3856,  8648,  3864,  12744,\n        3872,  7360,  3880,  5064,  3888,  9160,  3896,  13256, 3904,  7488,\n        3912,  5576,  3920,  9672,  3928,  13768, 3936,  7616,  3944,  6088,\n        3952,  10184, 3960,  14280, 3968,  7240,  3976,  6600,  3984,  10696,\n        3992,  14792, 4000,  7368,  4008,  7112,  4016,  11208, 4024,  15304,\n        4032,  7496,  4040,  7624,  4048,  11720, 4056,  15816, 4064,  7624,\n        4072,  8136,  4080,  12232, 4088,  16328, 4096,  8192,  4104,  4112,\n        4112,  8208,  4120,  12304, 4128,  8320,  4136,  4624,  4144,  8720,\n        4152,  12816, 4160,  8448,  4168,  5136,  4176,  9232,  4184,  13328,\n        4192,  8576,  4200,  5648,  4208,  9744,  4216,  13840, 4224,  8200,\n        4232,  6160,  4240,  10256, 4248,  14352, 4256,  8328,  4264,  6672,\n        4272,  10768, 4280,  14864, 4288,  8456,  4296,  7184,  4304,  11280,\n        4312,  15376, 4320,  8584,  4328,  7696,  4336,  11792, 4344,  15888,\n        4352,  9216,  4360,  9232,  4368,  8272,  4376,  12368, 4384,  9344,\n        4392,  4688,  4400,  8784,  4408,  12880, 4416,  9472,  4424,  5200,\n        4432,  9296,  4440,  13392, 4448,  9600,  4456,  5712,  4464,  9808,\n        4472,  13904, 4480,  9224,  4488,  6224,  4496,  10320, 4504,  14416,\n        4512,  9352,  4520,  6736,  4528,  10832, 4536,  14928, 4544,  9480,\n        4552,  7248,  4560,  11344, 4568,  15440, 4576,  9608,  4584,  7760,\n        4592,  11856, 4600,  15952, 4608,  10240, 4616,  10256, 4624,  8336,\n        4632,  12432, 4640,  10368, 4648,  4752,  4656,  8848,  4664,  12944,\n        4672,  10496, 4680,  5264,  4688,  9360,  4696,  13456, 4704,  10624,\n        4712,  5776,  4720,  9872,  4728,  13968, 4736,  10248, 4744,  6288,\n        4752,  10384, 4760,  14480, 4768,  10376, 4776,  6800,  4784,  10896,\n        4792,  14992, 4800,  10504, 4808,  7312,  4816,  11408, 4824,  15504,\n        4832,  10632, 4840,  7824,  4848,  11920, 4856,  16016, 4864,  11264,\n        4872,  11280, 4880,  8400,  4888,  12496, 4896,  11392, 4904,  11408,\n        4912,  8912,  4920,  13008, 4928,  11520, 4936,  5328,  4944,  9424,\n        4952,  13520, 4960,  11648, 4968,  5840,  4976,  9936,  4984,  14032,\n        4992,  11272, 5000,  6352,  5008,  10448, 5016,  14544, 5024,  11400,\n        5032,  6864,  5040,  10960, 5048,  15056, 5056,  11528, 5064,  7376,\n        5072,  11472, 5080,  15568, 5088,  11656, 5096,  7888,  5104,  11984,\n        5112,  16080, 5120,  8256,  5128,  8272,  5136,  8464,  5144,  12560,\n        5152,  8384,  5160,  8400,  5168,  8976,  5176,  13072, 5184,  8512,\n        5192,  5392,  5200,  9488,  5208,  13584, 5216,  8640,  5224,  5904,\n        5232,  10000, 5240,  14096, 5248,  8264,  5256,  6416,  5264,  10512,\n        5272,  14608, 5280,  8392,  5288,  6928,  5296,  11024, 5304,  15120,\n        5312,  8520,  5320,  7440,  5328,  11536, 5336,  15632, 5344,  8648,\n        5352,  7952,  5360,  12048, 5368,  16144, 5376,  9280,  5384,  9296,\n        5392,  8528,  5400,  12624, 5408,  9408,  5416,  9424,  5424,  9040,\n        5432,  13136, 5440,  9536,  5448,  5456,  5456,  9552,  5464,  13648,\n        5472,  9664,  5480,  5968,  5488,  10064, 5496,  14160, 5504,  9288,\n        5512,  6480,  5520,  10576, 5528,  14672, 5536,  9416,  5544,  6992,\n        5552,  11088, 5560,  15184, 5568,  9544,  5576,  7504,  5584,  11600,\n        5592,  15696, 5600,  9672,  5608,  8016,  5616,  12112, 5624,  16208,\n        5632,  10304, 5640,  10320, 5648,  8592,  5656,  12688, 5664,  10432,\n        5672,  10448, 5680,  9104,  5688,  13200, 5696,  10560, 5704,  10576,\n        5712,  9616,  5720,  13712, 5728,  10688, 5736,  6032,  5744,  10128,\n        5752,  14224, 5760,  10312, 5768,  6544,  5776,  10640, 5784,  14736,\n        5792,  10440, 5800,  7056,  5808,  11152, 5816,  15248, 5824,  10568,\n        5832,  7568,  5840,  11664, 5848,  15760, 5856,  10696, 5864,  8080,\n        5872,  12176, 5880,  16272, 5888,  11328, 5896,  11344, 5904,  8656,\n        5912,  12752, 5920,  11456, 5928,  11472, 5936,  9168,  5944,  13264,\n        5952,  11584, 5960,  11600, 5968,  9680,  5976,  13776, 5984,  11712,\n        5992,  6096,  6000,  10192, 6008,  14288, 6016,  11336, 6024,  6608,\n        6032,  10704, 6040,  14800, 6048,  11464, 6056,  7120,  6064,  11216,\n        6072,  15312, 6080,  11592, 6088,  7632,  6096,  11728, 6104,  15824,\n        6112,  11720, 6120,  8144,  6128,  12240, 6136,  16336, 6144,  12288,\n        6152,  12304, 6160,  8216,  6168,  12312, 6176,  12416, 6184,  12432,\n        6192,  8728,  6200,  12824, 6208,  12544, 6216,  12560, 6224,  9240,\n        6232,  13336, 6240,  12672, 6248,  12688, 6256,  9752,  6264,  13848,\n        6272,  12296, 6280,  12312, 6288,  10264, 6296,  14360, 6304,  12424,\n        6312,  6680,  6320,  10776, 6328,  14872, 6336,  12552, 6344,  7192,\n        6352,  11288, 6360,  15384, 6368,  12680, 6376,  7704,  6384,  11800,\n        6392,  15896, 6400,  13312, 6408,  13328, 6416,  8280,  6424,  12376,\n        6432,  13440, 6440,  13456, 6448,  8792,  6456,  12888, 6464,  13568,\n        6472,  13584, 6480,  9304,  6488,  13400, 6496,  13696, 6504,  13712,\n        6512,  9816,  6520,  13912, 6528,  13320, 6536,  13336, 6544,  10328,\n        6552,  14424, 6560,  13448, 6568,  6744,  6576,  10840, 6584,  14936,\n        6592,  13576, 6600,  7256,  6608,  11352, 6616,  15448, 6624,  13704,\n        6632,  7768,  6640,  11864, 6648,  15960, 6656,  14336, 6664,  14352,\n        6672,  8344,  6680,  12440, 6688,  14464, 6696,  14480, 6704,  8856,\n        6712,  12952, 6720,  14592, 6728,  14608, 6736,  9368,  6744,  13464,\n        6752,  14720, 6760,  14736, 6768,  9880,  6776,  13976, 6784,  14344,\n        6792,  14360, 6800,  10392, 6808,  14488, 6816,  14472, 6824,  14488,\n        6832,  10904, 6840,  15000, 6848,  14600, 6856,  7320,  6864,  11416,\n        6872,  15512, 6880,  14728, 6888,  7832,  6896,  11928, 6904,  16024,\n        6912,  15360, 6920,  15376, 6928,  8408,  6936,  12504, 6944,  15488,\n        6952,  15504, 6960,  8920,  6968,  13016, 6976,  15616, 6984,  15632,\n        6992,  9432,  7000,  13528, 7008,  15744, 7016,  15760, 7024,  9944,\n        7032,  14040, 7040,  15368, 7048,  15384, 7056,  10456, 7064,  14552,\n        7072,  15496, 7080,  15512, 7088,  10968, 7096,  15064, 7104,  15624,\n        7112,  7384,  7120,  11480, 7128,  15576, 7136,  15752, 7144,  7896,\n        7152,  11992, 7160,  16088, 7168,  12352, 7176,  12368, 7184,  8472,\n        7192,  12568, 7200,  12480, 7208,  12496, 7216,  8984,  7224,  13080,\n        7232,  12608, 7240,  12624, 7248,  9496,  7256,  13592, 7264,  12736,\n        7272,  12752, 7280,  10008, 7288,  14104, 7296,  12360, 7304,  12376,\n        7312,  10520, 7320,  14616, 7328,  12488, 7336,  12504, 7344,  11032,\n        7352,  15128, 7360,  12616, 7368,  7448,  7376,  11544, 7384,  15640,\n        7392,  12744, 7400,  7960,  7408,  12056, 7416,  16152, 7424,  13376,\n        7432,  13392, 7440,  8536,  7448,  12632, 7456,  13504, 7464,  13520,\n        7472,  9048,  7480,  13144, 7488,  13632, 7496,  13648, 7504,  9560,\n        7512,  13656, 7520,  13760, 7528,  13776, 7536,  10072, 7544,  14168,\n        7552,  13384, 7560,  13400, 7568,  10584, 7576,  14680, 7584,  13512,\n        7592,  13528, 7600,  11096, 7608,  15192, 7616,  13640, 7624,  13656,\n        7632,  11608, 7640,  15704, 7648,  13768, 7656,  8024,  7664,  12120,\n        7672,  16216, 7680,  14400, 7688,  14416, 7696,  8600,  7704,  12696,\n        7712,  14528, 7720,  14544, 7728,  9112,  7736,  13208, 7744,  14656,\n        7752,  14672, 7760,  9624,  7768,  13720, 7776,  14784, 7784,  14800,\n        7792,  10136, 7800,  14232, 7808,  14408, 7816,  14424, 7824,  10648,\n        7832,  14744, 7840,  14536, 7848,  14552, 7856,  11160, 7864,  15256,\n        7872,  14664, 7880,  14680, 7888,  11672, 7896,  15768, 7904,  14792,\n        7912,  8088,  7920,  12184, 7928,  16280, 7936,  15424, 7944,  15440,\n        7952,  8664,  7960,  12760, 7968,  15552, 7976,  15568, 7984,  9176,\n        7992,  13272, 8000,  15680, 8008,  15696, 8016,  9688,  8024,  13784,\n        8032,  15808, 8040,  15824, 8048,  10200, 8056,  14296, 8064,  15432,\n        8072,  15448, 8080,  10712, 8088,  14808, 8096,  15560, 8104,  15576,\n        8112,  11224, 8120,  15320, 8128,  15688, 8136,  15704, 8144,  11736,\n        8152,  15832, 8160,  15816, 8168,  15832, 8176,  12248, 8184,  16344,\n        8200,  8320,  8208,  8224,  8216,  12320, 8232,  10368, 8240,  8736,\n        8248,  12832, 8256,  8448,  8264,  8384,  8272,  9248,  8280,  13344,\n        8288,  9232,  8296,  10432, 8304,  9760,  8312,  13856, 8328,  12416,\n        8336,  10272, 8344,  14368, 8352,  12296, 8360,  14464, 8368,  10784,\n        8376,  14880, 8384,  8456,  8392,  12480, 8400,  11296, 8408,  15392,\n        8416,  12552, 8424,  14528, 8432,  11808, 8440,  15904, 8448,  9216,\n        8456,  8576,  8464,  9232,  8472,  12384, 8480,  9248,  8488,  10624,\n        8496,  8800,  8504,  12896, 8512,  9472,  8520,  8640,  8528,  9312,\n        8536,  13408, 8544,  9296,  8552,  10688, 8560,  9824,  8568,  13920,\n        8576,  9224,  8584,  12672, 8592,  10336, 8600,  14432, 8608,  13320,\n        8616,  14720, 8624,  10848, 8632,  14944, 8640,  9480,  8648,  12736,\n        8656,  11360, 8664,  15456, 8672,  13576, 8680,  14784, 8688,  11872,\n        8696,  15968, 8704,  12288, 8712,  12416, 8720,  12296, 8728,  12448,\n        8736,  12304, 8744,  10376, 8752,  8864,  8760,  12960, 8768,  12352,\n        8776,  12480, 8784,  9376,  8792,  13472, 8800,  12368, 8808,  10440,\n        8816,  9888,  8824,  13984, 8832,  12320, 8840,  12424, 8848,  10400,\n        8856,  14496, 8864,  12312, 8872,  14472, 8880,  10912, 8888,  15008,\n        8896,  12384, 8904,  12488, 8912,  11424, 8920,  15520, 8928,  12568,\n        8936,  14536, 8944,  11936, 8952,  16032, 8960,  12544, 8968,  12672,\n        8976,  12552, 8984,  12512, 8992,  12560, 9000,  10632, 9008,  12568,\n        9016,  13024, 9024,  12608, 9032,  12736, 9040,  9440,  9048,  13536,\n        9056,  12624, 9064,  10696, 9072,  9952,  9080,  14048, 9088,  9240,\n        9096,  12680, 9104,  10464, 9112,  14560, 9120,  13336, 9128,  14728,\n        9136,  10976, 9144,  15072, 9152,  9496,  9160,  12744, 9168,  11488,\n        9176,  15584, 9184,  13592, 9192,  14792, 9200,  12000, 9208,  16096,\n        9224,  9344,  9232,  9248,  9240,  12576, 9256,  11392, 9264,  12560,\n        9272,  13088, 9280,  9472,  9288,  9408,  9296,  9504,  9304,  13600,\n        9312,  9488,  9320,  11456, 9328,  10016, 9336,  14112, 9352,  13440,\n        9360,  10528, 9368,  14624, 9376,  12360, 9384,  15488, 9392,  11040,\n        9400,  15136, 9408,  9480,  9416,  13504, 9424,  11552, 9432,  15648,\n        9440,  12616, 9448,  15552, 9456,  12064, 9464,  16160, 9480,  9600,\n        9488,  9504,  9496,  12640, 9512,  11648, 9520,  12624, 9528,  13152,\n        9544,  9664,  9552,  9568,  9560,  13664, 9576,  11712, 9584,  10080,\n        9592,  14176, 9608,  13696, 9616,  10592, 9624,  14688, 9632,  13384,\n        9640,  15744, 9648,  11104, 9656,  15200, 9672,  13760, 9680,  11616,\n        9688,  15712, 9696,  13640, 9704,  15808, 9712,  12128, 9720,  16224,\n        9728,  13312, 9736,  13440, 9744,  13320, 9752,  12704, 9760,  13328,\n        9768,  11400, 9776,  13336, 9784,  13216, 9792,  13376, 9800,  13504,\n        9808,  13384, 9816,  13728, 9824,  13392, 9832,  11464, 9840,  10144,\n        9848,  14240, 9856,  13344, 9864,  13448, 9872,  10656, 9880,  14752,\n        9888,  12376, 9896,  15496, 9904,  11168, 9912,  15264, 9920,  13408,\n        9928,  13512, 9936,  11680, 9944,  15776, 9952,  12632, 9960,  15560,\n        9968,  12192, 9976,  16288, 9984,  13568, 9992,  13696, 10000, 13576,\n        10008, 12768, 10016, 13584, 10024, 11656, 10032, 13592, 10040, 13280,\n        10048, 13632, 10056, 13760, 10064, 13640, 10072, 13792, 10080, 13648,\n        10088, 11720, 10096, 10208, 10104, 14304, 10112, 13600, 10120, 13704,\n        10128, 10720, 10136, 14816, 10144, 13400, 10152, 15752, 10160, 11232,\n        10168, 15328, 10176, 13664, 10184, 13768, 10192, 11744, 10200, 15840,\n        10208, 13656, 10216, 15816, 10224, 12256, 10232, 16352, 10248, 10272,\n        10256, 10368, 10264, 12328, 10280, 10384, 10288, 10376, 10296, 12840,\n        10304, 11264, 10312, 11296, 10320, 11392, 10328, 13352, 10336, 11272,\n        10344, 10448, 10352, 11400, 10360, 13864, 10376, 12432, 10392, 14376,\n        10400, 12328, 10408, 14480, 10416, 10792, 10424, 14888, 10432, 11280,\n        10440, 12496, 10448, 11304, 10456, 15400, 10464, 11288, 10472, 14544,\n        10480, 11816, 10488, 15912, 10496, 11264, 10504, 11272, 10512, 11280,\n        10520, 12392, 10528, 11296, 10536, 10640, 10544, 12496, 10552, 12904,\n        10560, 11328, 10568, 11360, 10576, 11456, 10584, 13416, 10592, 11336,\n        10600, 10704, 10608, 11464, 10616, 13928, 10624, 11392, 10632, 12688,\n        10640, 11304, 10648, 14440, 10656, 13352, 10664, 14736, 10672, 10856,\n        10680, 14952, 10688, 11344, 10696, 12752, 10704, 11368, 10712, 15464,\n        10720, 11352, 10728, 14800, 10736, 11880, 10744, 15976, 10752, 14336,\n        10760, 14368, 10768, 14464, 10776, 12456, 10784, 14344, 10792, 14376,\n        10800, 14472, 10808, 12968, 10816, 15360, 10824, 15392, 10832, 15488,\n        10840, 13480, 10848, 15368, 10856, 15400, 10864, 15496, 10872, 13992,\n        10880, 14352, 10888, 12440, 10896, 14480, 10904, 14504, 10912, 14360,\n        10920, 14488, 10928, 14488, 10936, 15016, 10944, 15376, 10952, 12504,\n        10960, 11432, 10968, 15528, 10976, 15384, 10984, 14552, 10992, 11944,\n        11000, 16040, 11008, 14400, 11016, 14432, 11024, 14528, 11032, 12520,\n        11040, 14408, 11048, 14440, 11056, 14536, 11064, 13032, 11072, 15424,\n        11080, 15456, 11088, 15552, 11096, 13544, 11104, 15432, 11112, 15464,\n        11120, 15560, 11128, 14056, 11136, 14416, 11144, 12696, 11152, 14544,\n        11160, 14568, 11168, 14424, 11176, 14744, 11184, 14552, 11192, 15080,\n        11200, 15440, 11208, 12760, 11216, 11496, 11224, 15592, 11232, 15448,\n        11240, 14808, 11248, 12008, 11256, 16104, 11272, 11296, 11280, 11392,\n        11288, 12584, 11304, 11408, 11312, 12688, 11320, 13096, 11328, 11520,\n        11336, 11552, 11344, 11648, 11352, 13608, 11360, 11528, 11368, 11472,\n        11376, 11656, 11384, 14120, 11400, 13456, 11416, 14632, 11424, 12392,\n        11432, 15504, 11440, 14440, 11448, 15144, 11456, 11536, 11464, 13520,\n        11472, 11560, 11480, 15656, 11488, 11544, 11496, 15568, 11504, 12072,\n        11512, 16168, 11528, 11552, 11536, 11648, 11544, 12648, 11560, 11664,\n        11568, 12752, 11576, 13160, 11592, 11616, 11600, 11712, 11608, 13672,\n        11624, 11728, 11632, 11720, 11640, 14184, 11656, 13712, 11672, 14696,\n        11680, 13416, 11688, 15760, 11696, 15464, 11704, 15208, 11720, 13776,\n        11736, 15720, 11744, 13672, 11752, 15824, 11760, 12136, 11768, 16232,\n        11776, 14592, 11784, 14624, 11792, 14720, 11800, 12712, 11808, 14600,\n        11816, 14632, 11824, 14728, 11832, 13224, 11840, 15616, 11848, 15648,\n        11856, 15744, 11864, 13736, 11872, 15624, 11880, 15656, 11888, 15752,\n        11896, 14248, 11904, 14608, 11912, 13464, 11920, 14736, 11928, 14760,\n        11936, 14616, 11944, 15512, 11952, 14744, 11960, 15272, 11968, 15632,\n        11976, 13528, 11984, 15760, 11992, 15784, 12000, 15640, 12008, 15576,\n        12016, 12200, 12024, 16296, 12032, 14656, 12040, 14688, 12048, 14784,\n        12056, 12776, 12064, 14664, 12072, 14696, 12080, 14792, 12088, 13288,\n        12096, 15680, 12104, 15712, 12112, 15808, 12120, 13800, 12128, 15688,\n        12136, 15720, 12144, 15816, 12152, 14312, 12160, 14672, 12168, 13720,\n        12176, 14800, 12184, 14824, 12192, 14680, 12200, 15768, 12208, 14808,\n        12216, 15336, 12224, 15696, 12232, 13784, 12240, 15824, 12248, 15848,\n        12256, 15704, 12264, 15832, 12272, 15832, 12280, 16360, 12312, 12336,\n        12344, 12848, 12352, 12544, 12360, 12552, 12368, 12560, 12376, 13360,\n        12384, 12576, 12392, 12584, 12400, 13336, 12408, 13872, 12424, 12448,\n        12440, 14384, 12456, 14496, 12464, 14472, 12472, 14896, 12480, 12672,\n        12488, 12512, 12496, 12688, 12504, 15408, 12512, 12680, 12520, 14560,\n        12528, 14728, 12536, 15920, 12544, 13312, 12552, 13320, 12560, 13328,\n        12568, 13336, 12576, 13344, 12584, 13352, 12592, 13360, 12600, 12912,\n        12608, 13568, 12616, 13576, 12624, 13584, 12632, 13424, 12640, 13600,\n        12648, 13608, 12656, 13400, 12664, 13936, 12672, 13440, 12680, 12704,\n        12688, 13456, 12696, 14448, 12704, 13448, 12712, 14752, 12720, 15496,\n        12728, 14960, 12736, 13696, 12744, 12768, 12752, 13712, 12760, 15472,\n        12768, 13704, 12776, 14816, 12784, 15752, 12792, 15984, 12800, 14336,\n        12808, 14464, 12816, 14344, 12824, 14472, 12832, 14352, 12840, 14480,\n        12848, 14360, 12856, 12976, 12864, 14400, 12872, 14528, 12880, 14408,\n        12888, 13488, 12896, 14416, 12904, 14544, 12912, 14424, 12920, 14000,\n        12928, 14368, 12936, 14496, 12944, 14376, 12952, 14512, 12960, 14384,\n        12968, 14504, 12976, 14488, 12984, 15024, 12992, 14432, 13000, 14560,\n        13008, 14440, 13016, 15536, 13024, 14448, 13032, 14568, 13040, 14744,\n        13048, 16048, 13056, 14592, 13064, 14720, 13072, 14600, 13080, 14728,\n        13088, 14608, 13096, 14736, 13104, 14616, 13112, 14744, 13120, 14656,\n        13128, 14784, 13136, 14664, 13144, 13552, 13152, 14672, 13160, 14800,\n        13168, 14680, 13176, 14064, 13184, 14624, 13192, 14752, 13200, 14632,\n        13208, 14576, 13216, 13464, 13224, 14760, 13232, 15512, 13240, 15088,\n        13248, 14688, 13256, 14816, 13264, 14696, 13272, 15600, 13280, 13720,\n        13288, 14824, 13296, 15768, 13304, 16112, 13336, 13360, 13368, 14616,\n        13376, 13568, 13384, 13576, 13392, 13584, 13400, 13616, 13408, 13600,\n        13416, 13608, 13424, 13592, 13432, 14128, 13448, 13472, 13464, 14640,\n        13480, 15520, 13488, 14536, 13496, 15152, 13504, 13696, 13512, 13536,\n        13520, 13712, 13528, 15664, 13536, 13704, 13544, 15584, 13552, 14792,\n        13560, 16176, 13592, 13616, 13624, 14680, 13656, 13680, 13688, 14192,\n        13704, 13728, 13720, 14704, 13736, 15776, 13744, 15560, 13752, 15216,\n        13768, 13792, 13784, 15728, 13800, 15840, 13808, 15816, 13816, 16240,\n        13824, 15360, 13832, 15488, 13840, 15368, 13848, 15496, 13856, 15376,\n        13864, 15504, 13872, 15384, 13880, 15512, 13888, 15424, 13896, 15552,\n        13904, 15432, 13912, 15560, 13920, 15440, 13928, 15568, 13936, 15448,\n        13944, 14256, 13952, 15392, 13960, 15520, 13968, 15400, 13976, 14768,\n        13984, 15408, 13992, 15528, 14000, 14552, 14008, 15280, 14016, 15456,\n        14024, 15584, 14032, 15464, 14040, 15792, 14048, 15472, 14056, 15592,\n        14064, 14808, 14072, 16304, 14080, 15616, 14088, 15744, 14096, 15624,\n        14104, 15752, 14112, 15632, 14120, 15760, 14128, 15640, 14136, 15768,\n        14144, 15680, 14152, 15808, 14160, 15688, 14168, 15816, 14176, 15696,\n        14184, 15824, 14192, 15704, 14200, 14320, 14208, 15648, 14216, 15776,\n        14224, 15656, 14232, 14832, 14240, 15664, 14248, 15784, 14256, 15576,\n        14264, 15344, 14272, 15712, 14280, 15840, 14288, 15720, 14296, 15856,\n        14304, 15728, 14312, 15848, 14320, 15832, 14328, 16368, 14392, 14488,\n        14400, 14592, 14408, 14600, 14416, 14608, 14424, 14616, 14432, 14624,\n        14440, 14632, 14448, 14640, 14456, 15512, 14504, 14512, 14520, 14904,\n        14528, 14720, 14536, 14728, 14544, 14736, 14552, 15416, 14560, 14752,\n        14568, 14576, 14584, 15928, 14576, 14760, 14592, 15360, 14600, 15368,\n        14608, 15376, 14616, 15384, 14624, 15392, 14632, 15400, 14640, 15408,\n        14648, 15416, 14656, 15616, 14664, 15624, 14672, 15632, 14680, 15640,\n        14688, 15648, 14696, 15656, 14704, 15664, 14712, 15576, 14720, 15488,\n        14728, 15496, 14736, 15504, 14744, 15512, 14752, 15520, 14760, 14768,\n        14776, 14968, 14768, 15528, 14784, 15744, 14792, 15752, 14800, 15760,\n        14808, 15480, 14816, 15776, 14824, 14832, 14840, 15992, 14832, 15784,\n        14856, 14864, 14864, 14880, 14872, 14896, 14880, 14976, 14888, 14992,\n        14896, 15008, 14904, 15024, 14912, 15104, 14920, 15120, 14928, 15136,\n        14936, 15152, 14944, 15232, 14952, 15248, 14960, 15264, 14968, 15280,\n        14984, 15008, 15000, 15024, 15016, 15024, 15040, 15112, 15048, 15128,\n        15056, 15144, 15064, 15544, 15072, 15240, 15080, 15256, 15088, 15272,\n        15096, 16056, 15104, 15872, 15112, 15888, 15120, 15904, 15128, 15920,\n        15136, 16000, 15144, 16016, 15152, 16032, 15160, 16048, 15168, 16128,\n        15176, 16144, 15184, 16160, 15192, 16176, 15200, 16256, 15208, 16272,\n        15216, 16288, 15224, 16304, 15232, 15880, 15240, 15896, 15248, 15912,\n        15256, 15928, 15264, 16008, 15272, 16024, 15280, 16040, 15288, 16056,\n        15296, 16136, 15304, 16152, 15312, 16168, 15320, 15608, 15328, 16264,\n        15336, 16280, 15344, 16296, 15352, 16120, 15416, 15512, 15424, 15616,\n        15432, 15624, 15440, 15632, 15448, 15640, 15456, 15648, 15464, 15656,\n        15472, 15664, 15480, 15768, 15528, 15536, 15544, 16048, 15552, 15744,\n        15560, 15752, 15568, 15760, 15576, 15672, 15584, 15776, 15592, 15600,\n        15600, 15784, 15608, 16184, 15672, 15768, 15736, 15832, 15784, 15792,\n        15800, 16304, 15848, 15856, 15880, 16000, 15864, 16248, 15888, 16000,\n        15896, 16008, 15904, 16000, 15912, 16016, 15920, 16008, 15928, 16024,\n        15936, 16128, 15944, 16160, 15952, 16256, 15960, 16288, 15968, 16136,\n        15976, 16168, 15984, 16264, 15992, 16296, 16008, 16032, 16024, 16040,\n        16064, 16144, 16040, 16048, 16072, 16176, 16080, 16272, 16088, 16304,\n        16096, 16152, 16104, 16184, 16112, 16280, 16136, 16256, 16120, 16312,\n        16144, 16256, 16152, 16264, 16160, 16256, 16168, 16272, 16176, 16264,\n        16184, 16280, 16200, 16208, 16208, 16224, 16216, 16240, 16224, 16320,\n        16232, 16336, 16240, 16352, 16248, 16368, 16264, 16288, 16280, 16296,\n        16296, 16304, 16344, 16368, 16328, 16352, 16360, 16368};\n\nconst uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH] =\n    {\n        /* radix 8, size 4032 */\n        8,     4096,  16,    8192,  24,    12288, 32,    16384, 40,    20480,\n        48,    24576, 56,    28672, 64,    512,   72,    4608,  80,    8704,\n        88,    12800, 96,    16896, 104,   20992, 112,   25088, 120,   29184,\n        128,   1024,  136,   5120,  144,   9216,  152,   13312, 160,   17408,\n        168,   21504, 176,   25600, 184,   29696, 192,   1536,  200,   5632,\n        208,   9728,  216,   13824, 224,   17920, 232,   22016, 240,   26112,\n        248,   30208, 256,   2048,  264,   6144,  272,   10240, 280,   14336,\n        288,   18432, 296,   22528, 304,   26624, 312,   30720, 320,   2560,\n        328,   6656,  336,   10752, 344,   14848, 352,   18944, 360,   23040,\n        368,   27136, 376,   31232, 384,   3072,  392,   7168,  400,   11264,\n        408,   15360, 416,   19456, 424,   23552, 432,   27648, 440,   31744,\n        448,   3584,  456,   7680,  464,   11776, 472,   15872, 480,   19968,\n        488,   24064, 496,   28160, 504,   32256, 520,   4160,  528,   8256,\n        536,   12352, 544,   16448, 552,   20544, 560,   24640, 568,   28736,\n        584,   4672,  592,   8768,  600,   12864, 608,   16960, 616,   21056,\n        624,   25152, 632,   29248, 640,   1088,  648,   5184,  656,   9280,\n        664,   13376, 672,   17472, 680,   21568, 688,   25664, 696,   29760,\n        704,   1600,  712,   5696,  720,   9792,  728,   13888, 736,   17984,\n        744,   22080, 752,   26176, 760,   30272, 768,   2112,  776,   6208,\n        784,   10304, 792,   14400, 800,   18496, 808,   22592, 816,   26688,\n        824,   30784, 832,   2624,  840,   6720,  848,   10816, 856,   14912,\n        864,   19008, 872,   23104, 880,   27200, 888,   31296, 896,   3136,\n        904,   7232,  912,   11328, 920,   15424, 928,   19520, 936,   23616,\n        944,   27712, 952,   31808, 960,   3648,  968,   7744,  976,   11840,\n        984,   15936, 992,   20032, 1000,  24128, 1008,  28224, 1016,  32320,\n        1032,  4224,  1040,  8320,  1048,  12416, 1056,  16512, 1064,  20608,\n        1072,  24704, 1080,  28800, 1096,  4736,  1104,  8832,  1112,  12928,\n        1120,  17024, 1128,  21120, 1136,  25216, 1144,  29312, 1160,  5248,\n        1168,  9344,  1176,  13440, 1184,  17536, 1192,  21632, 1200,  25728,\n        1208,  29824, 1216,  1664,  1224,  5760,  1232,  9856,  1240,  13952,\n        1248,  18048, 1256,  22144, 1264,  26240, 1272,  30336, 1280,  2176,\n        1288,  6272,  1296,  10368, 1304,  14464, 1312,  18560, 1320,  22656,\n        1328,  26752, 1336,  30848, 1344,  2688,  1352,  6784,  1360,  10880,\n        1368,  14976, 1376,  19072, 1384,  23168, 1392,  27264, 1400,  31360,\n        1408,  3200,  1416,  7296,  1424,  11392, 1432,  15488, 1440,  19584,\n        1448,  23680, 1456,  27776, 1464,  31872, 1472,  3712,  1480,  7808,\n        1488,  11904, 1496,  16000, 1504,  20096, 1512,  24192, 1520,  28288,\n        1528,  32384, 1544,  4288,  1552,  8384,  1560,  12480, 1568,  16576,\n        1576,  20672, 1584,  24768, 1592,  28864, 1608,  4800,  1616,  8896,\n        1624,  12992, 1632,  17088, 1640,  21184, 1648,  25280, 1656,  29376,\n        1672,  5312,  1680,  9408,  1688,  13504, 1696,  17600, 1704,  21696,\n        1712,  25792, 1720,  29888, 1736,  5824,  1744,  9920,  1752,  14016,\n        1760,  18112, 1768,  22208, 1776,  26304, 1784,  30400, 1792,  2240,\n        1800,  6336,  1808,  10432, 1816,  14528, 1824,  18624, 1832,  22720,\n        1840,  26816, 1848,  30912, 1856,  2752,  1864,  6848,  1872,  10944,\n        1880,  15040, 1888,  19136, 1896,  23232, 1904,  27328, 1912,  31424,\n        1920,  3264,  1928,  7360,  1936,  11456, 1944,  15552, 1952,  19648,\n        1960,  23744, 1968,  27840, 1976,  31936, 1984,  3776,  1992,  7872,\n        2000,  11968, 2008,  16064, 2016,  20160, 2024,  24256, 2032,  28352,\n        2040,  32448, 2056,  4352,  2064,  8448,  2072,  12544, 2080,  16640,\n        2088,  20736, 2096,  24832, 2104,  28928, 2120,  4864,  2128,  8960,\n        2136,  13056, 2144,  17152, 2152,  21248, 2160,  25344, 2168,  29440,\n        2184,  5376,  2192,  9472,  2200,  13568, 2208,  17664, 2216,  21760,\n        2224,  25856, 2232,  29952, 2248,  5888,  2256,  9984,  2264,  14080,\n        2272,  18176, 2280,  22272, 2288,  26368, 2296,  30464, 2312,  6400,\n        2320,  10496, 2328,  14592, 2336,  18688, 2344,  22784, 2352,  26880,\n        2360,  30976, 2368,  2816,  2376,  6912,  2384,  11008, 2392,  15104,\n        2400,  19200, 2408,  23296, 2416,  27392, 2424,  31488, 2432,  3328,\n        2440,  7424,  2448,  11520, 2456,  15616, 2464,  19712, 2472,  23808,\n        2480,  27904, 2488,  32000, 2496,  3840,  2504,  7936,  2512,  12032,\n        2520,  16128, 2528,  20224, 2536,  24320, 2544,  28416, 2552,  32512,\n        2568,  4416,  2576,  8512,  2584,  12608, 2592,  16704, 2600,  20800,\n        2608,  24896, 2616,  28992, 2632,  4928,  2640,  9024,  2648,  13120,\n        2656,  17216, 2664,  21312, 2672,  25408, 2680,  29504, 2696,  5440,\n        2704,  9536,  2712,  13632, 2720,  17728, 2728,  21824, 2736,  25920,\n        2744,  30016, 2760,  5952,  2768,  10048, 2776,  14144, 2784,  18240,\n        2792,  22336, 2800,  26432, 2808,  30528, 2824,  6464,  2832,  10560,\n        2840,  14656, 2848,  18752, 2856,  22848, 2864,  26944, 2872,  31040,\n        2888,  6976,  2896,  11072, 2904,  15168, 2912,  19264, 2920,  23360,\n        2928,  27456, 2936,  31552, 2944,  3392,  2952,  7488,  2960,  11584,\n        2968,  15680, 2976,  19776, 2984,  23872, 2992,  27968, 3000,  32064,\n        3008,  3904,  3016,  8000,  3024,  12096, 3032,  16192, 3040,  20288,\n        3048,  24384, 3056,  28480, 3064,  32576, 3080,  4480,  3088,  8576,\n        3096,  12672, 3104,  16768, 3112,  20864, 3120,  24960, 3128,  29056,\n        3144,  4992,  3152,  9088,  3160,  13184, 3168,  17280, 3176,  21376,\n        3184,  25472, 3192,  29568, 3208,  5504,  3216,  9600,  3224,  13696,\n        3232,  17792, 3240,  21888, 3248,  25984, 3256,  30080, 3272,  6016,\n        3280,  10112, 3288,  14208, 3296,  18304, 3304,  22400, 3312,  26496,\n        3320,  30592, 3336,  6528,  3344,  10624, 3352,  14720, 3360,  18816,\n        3368,  22912, 3376,  27008, 3384,  31104, 3400,  7040,  3408,  11136,\n        3416,  15232, 3424,  19328, 3432,  23424, 3440,  27520, 3448,  31616,\n        3464,  7552,  3472,  11648, 3480,  15744, 3488,  19840, 3496,  23936,\n        3504,  28032, 3512,  32128, 3520,  3968,  3528,  8064,  3536,  12160,\n        3544,  16256, 3552,  20352, 3560,  24448, 3568,  28544, 3576,  32640,\n        3592,  4544,  3600,  8640,  3608,  12736, 3616,  16832, 3624,  20928,\n        3632,  25024, 3640,  29120, 3656,  5056,  3664,  9152,  3672,  13248,\n        3680,  17344, 3688,  21440, 3696,  25536, 3704,  29632, 3720,  5568,\n        3728,  9664,  3736,  13760, 3744,  17856, 3752,  21952, 3760,  26048,\n        3768,  30144, 3784,  6080,  3792,  10176, 3800,  14272, 3808,  18368,\n        3816,  22464, 3824,  26560, 3832,  30656, 3848,  6592,  3856,  10688,\n        3864,  14784, 3872,  18880, 3880,  22976, 3888,  27072, 3896,  31168,\n        3912,  7104,  3920,  11200, 3928,  15296, 3936,  19392, 3944,  23488,\n        3952,  27584, 3960,  31680, 3976,  7616,  3984,  11712, 3992,  15808,\n        4000,  19904, 4008,  24000, 4016,  28096, 4024,  32192, 4040,  8128,\n        4048,  12224, 4056,  16320, 4064,  20416, 4072,  24512, 4080,  28608,\n        4088,  32704, 4112,  8200,  4120,  12296, 4128,  16392, 4136,  20488,\n        4144,  24584, 4152,  28680, 4168,  4616,  4176,  8712,  4184,  12808,\n        4192,  16904, 4200,  21000, 4208,  25096, 4216,  29192, 4232,  5128,\n        4240,  9224,  4248,  13320, 4256,  17416, 4264,  21512, 4272,  25608,\n        4280,  29704, 4296,  5640,  4304,  9736,  4312,  13832, 4320,  17928,\n        4328,  22024, 4336,  26120, 4344,  30216, 4360,  6152,  4368,  10248,\n        4376,  14344, 4384,  18440, 4392,  22536, 4400,  26632, 4408,  30728,\n        4424,  6664,  4432,  10760, 4440,  14856, 4448,  18952, 4456,  23048,\n        4464,  27144, 4472,  31240, 4488,  7176,  4496,  11272, 4504,  15368,\n        4512,  19464, 4520,  23560, 4528,  27656, 4536,  31752, 4552,  7688,\n        4560,  11784, 4568,  15880, 4576,  19976, 4584,  24072, 4592,  28168,\n        4600,  32264, 4624,  8264,  4632,  12360, 4640,  16456, 4648,  20552,\n        4656,  24648, 4664,  28744, 4688,  8776,  4696,  12872, 4704,  16968,\n        4712,  21064, 4720,  25160, 4728,  29256, 4744,  5192,  4752,  9288,\n        4760,  13384, 4768,  17480, 4776,  21576, 4784,  25672, 4792,  29768,\n        4808,  5704,  4816,  9800,  4824,  13896, 4832,  17992, 4840,  22088,\n        4848,  26184, 4856,  30280, 4872,  6216,  4880,  10312, 4888,  14408,\n        4896,  18504, 4904,  22600, 4912,  26696, 4920,  30792, 4936,  6728,\n        4944,  10824, 4952,  14920, 4960,  19016, 4968,  23112, 4976,  27208,\n        4984,  31304, 5000,  7240,  5008,  11336, 5016,  15432, 5024,  19528,\n        5032,  23624, 5040,  27720, 5048,  31816, 5064,  7752,  5072,  11848,\n        5080,  15944, 5088,  20040, 5096,  24136, 5104,  28232, 5112,  32328,\n        5136,  8328,  5144,  12424, 5152,  16520, 5160,  20616, 5168,  24712,\n        5176,  28808, 5200,  8840,  5208,  12936, 5216,  17032, 5224,  21128,\n        5232,  25224, 5240,  29320, 5264,  9352,  5272,  13448, 5280,  17544,\n        5288,  21640, 5296,  25736, 5304,  29832, 5320,  5768,  5328,  9864,\n        5336,  13960, 5344,  18056, 5352,  22152, 5360,  26248, 5368,  30344,\n        5384,  6280,  5392,  10376, 5400,  14472, 5408,  18568, 5416,  22664,\n        5424,  26760, 5432,  30856, 5448,  6792,  5456,  10888, 5464,  14984,\n        5472,  19080, 5480,  23176, 5488,  27272, 5496,  31368, 5512,  7304,\n        5520,  11400, 5528,  15496, 5536,  19592, 5544,  23688, 5552,  27784,\n        5560,  31880, 5576,  7816,  5584,  11912, 5592,  16008, 5600,  20104,\n        5608,  24200, 5616,  28296, 5624,  32392, 5648,  8392,  5656,  12488,\n        5664,  16584, 5672,  20680, 5680,  24776, 5688,  28872, 5712,  8904,\n        5720,  13000, 5728,  17096, 5736,  21192, 5744,  25288, 5752,  29384,\n        5776,  9416,  5784,  13512, 5792,  17608, 5800,  21704, 5808,  25800,\n        5816,  29896, 5840,  9928,  5848,  14024, 5856,  18120, 5864,  22216,\n        5872,  26312, 5880,  30408, 5896,  6344,  5904,  10440, 5912,  14536,\n        5920,  18632, 5928,  22728, 5936,  26824, 5944,  30920, 5960,  6856,\n        5968,  10952, 5976,  15048, 5984,  19144, 5992,  23240, 6000,  27336,\n        6008,  31432, 6024,  7368,  6032,  11464, 6040,  15560, 6048,  19656,\n        6056,  23752, 6064,  27848, 6072,  31944, 6088,  7880,  6096,  11976,\n        6104,  16072, 6112,  20168, 6120,  24264, 6128,  28360, 6136,  32456,\n        6160,  8456,  6168,  12552, 6176,  16648, 6184,  20744, 6192,  24840,\n        6200,  28936, 6224,  8968,  6232,  13064, 6240,  17160, 6248,  21256,\n        6256,  25352, 6264,  29448, 6288,  9480,  6296,  13576, 6304,  17672,\n        6312,  21768, 6320,  25864, 6328,  29960, 6352,  9992,  6360,  14088,\n        6368,  18184, 6376,  22280, 6384,  26376, 6392,  30472, 6416,  10504,\n        6424,  14600, 6432,  18696, 6440,  22792, 6448,  26888, 6456,  30984,\n        6472,  6920,  6480,  11016, 6488,  15112, 6496,  19208, 6504,  23304,\n        6512,  27400, 6520,  31496, 6536,  7432,  6544,  11528, 6552,  15624,\n        6560,  19720, 6568,  23816, 6576,  27912, 6584,  32008, 6600,  7944,\n        6608,  12040, 6616,  16136, 6624,  20232, 6632,  24328, 6640,  28424,\n        6648,  32520, 6672,  8520,  6680,  12616, 6688,  16712, 6696,  20808,\n        6704,  24904, 6712,  29000, 6736,  9032,  6744,  13128, 6752,  17224,\n        6760,  21320, 6768,  25416, 6776,  29512, 6800,  9544,  6808,  13640,\n        6816,  17736, 6824,  21832, 6832,  25928, 6840,  30024, 6864,  10056,\n        6872,  14152, 6880,  18248, 6888,  22344, 6896,  26440, 6904,  30536,\n        6928,  10568, 6936,  14664, 6944,  18760, 6952,  22856, 6960,  26952,\n        6968,  31048, 6992,  11080, 7000,  15176, 7008,  19272, 7016,  23368,\n        7024,  27464, 7032,  31560, 7048,  7496,  7056,  11592, 7064,  15688,\n        7072,  19784, 7080,  23880, 7088,  27976, 7096,  32072, 7112,  8008,\n        7120,  12104, 7128,  16200, 7136,  20296, 7144,  24392, 7152,  28488,\n        7160,  32584, 7184,  8584,  7192,  12680, 7200,  16776, 7208,  20872,\n        7216,  24968, 7224,  29064, 7248,  9096,  7256,  13192, 7264,  17288,\n        7272,  21384, 7280,  25480, 7288,  29576, 7312,  9608,  7320,  13704,\n        7328,  17800, 7336,  21896, 7344,  25992, 7352,  30088, 7376,  10120,\n        7384,  14216, 7392,  18312, 7400,  22408, 7408,  26504, 7416,  30600,\n        7440,  10632, 7448,  14728, 7456,  18824, 7464,  22920, 7472,  27016,\n        7480,  31112, 7504,  11144, 7512,  15240, 7520,  19336, 7528,  23432,\n        7536,  27528, 7544,  31624, 7568,  11656, 7576,  15752, 7584,  19848,\n        7592,  23944, 7600,  28040, 7608,  32136, 7624,  8072,  7632,  12168,\n        7640,  16264, 7648,  20360, 7656,  24456, 7664,  28552, 7672,  32648,\n        7696,  8648,  7704,  12744, 7712,  16840, 7720,  20936, 7728,  25032,\n        7736,  29128, 7760,  9160,  7768,  13256, 7776,  17352, 7784,  21448,\n        7792,  25544, 7800,  29640, 7824,  9672,  7832,  13768, 7840,  17864,\n        7848,  21960, 7856,  26056, 7864,  30152, 7888,  10184, 7896,  14280,\n        7904,  18376, 7912,  22472, 7920,  26568, 7928,  30664, 7952,  10696,\n        7960,  14792, 7968,  18888, 7976,  22984, 7984,  27080, 7992,  31176,\n        8016,  11208, 8024,  15304, 8032,  19400, 8040,  23496, 8048,  27592,\n        8056,  31688, 8080,  11720, 8088,  15816, 8096,  19912, 8104,  24008,\n        8112,  28104, 8120,  32200, 8144,  12232, 8152,  16328, 8160,  20424,\n        8168,  24520, 8176,  28616, 8184,  32712, 8216,  12304, 8224,  16400,\n        8232,  20496, 8240,  24592, 8248,  28688, 8272,  8720,  8280,  12816,\n        8288,  16912, 8296,  21008, 8304,  25104, 8312,  29200, 8336,  9232,\n        8344,  13328, 8352,  17424, 8360,  21520, 8368,  25616, 8376,  29712,\n        8400,  9744,  8408,  13840, 8416,  17936, 8424,  22032, 8432,  26128,\n        8440,  30224, 8464,  10256, 8472,  14352, 8480,  18448, 8488,  22544,\n        8496,  26640, 8504,  30736, 8528,  10768, 8536,  14864, 8544,  18960,\n        8552,  23056, 8560,  27152, 8568,  31248, 8592,  11280, 8600,  15376,\n        8608,  19472, 8616,  23568, 8624,  27664, 8632,  31760, 8656,  11792,\n        8664,  15888, 8672,  19984, 8680,  24080, 8688,  28176, 8696,  32272,\n        8728,  12368, 8736,  16464, 8744,  20560, 8752,  24656, 8760,  28752,\n        8792,  12880, 8800,  16976, 8808,  21072, 8816,  25168, 8824,  29264,\n        8848,  9296,  8856,  13392, 8864,  17488, 8872,  21584, 8880,  25680,\n        8888,  29776, 8912,  9808,  8920,  13904, 8928,  18000, 8936,  22096,\n        8944,  26192, 8952,  30288, 8976,  10320, 8984,  14416, 8992,  18512,\n        9000,  22608, 9008,  26704, 9016,  30800, 9040,  10832, 9048,  14928,\n        9056,  19024, 9064,  23120, 9072,  27216, 9080,  31312, 9104,  11344,\n        9112,  15440, 9120,  19536, 9128,  23632, 9136,  27728, 9144,  31824,\n        9168,  11856, 9176,  15952, 9184,  20048, 9192,  24144, 9200,  28240,\n        9208,  32336, 9240,  12432, 9248,  16528, 9256,  20624, 9264,  24720,\n        9272,  28816, 9304,  12944, 9312,  17040, 9320,  21136, 9328,  25232,\n        9336,  29328, 9368,  13456, 9376,  17552, 9384,  21648, 9392,  25744,\n        9400,  29840, 9424,  9872,  9432,  13968, 9440,  18064, 9448,  22160,\n        9456,  26256, 9464,  30352, 9488,  10384, 9496,  14480, 9504,  18576,\n        9512,  22672, 9520,  26768, 9528,  30864, 9552,  10896, 9560,  14992,\n        9568,  19088, 9576,  23184, 9584,  27280, 9592,  31376, 9616,  11408,\n        9624,  15504, 9632,  19600, 9640,  23696, 9648,  27792, 9656,  31888,\n        9680,  11920, 9688,  16016, 9696,  20112, 9704,  24208, 9712,  28304,\n        9720,  32400, 9752,  12496, 9760,  16592, 9768,  20688, 9776,  24784,\n        9784,  28880, 9816,  13008, 9824,  17104, 9832,  21200, 9840,  25296,\n        9848,  29392, 9880,  13520, 9888,  17616, 9896,  21712, 9904,  25808,\n        9912,  29904, 9944,  14032, 9952,  18128, 9960,  22224, 9968,  26320,\n        9976,  30416, 10000, 10448, 10008, 14544, 10016, 18640, 10024, 22736,\n        10032, 26832, 10040, 30928, 10064, 10960, 10072, 15056, 10080, 19152,\n        10088, 23248, 10096, 27344, 10104, 31440, 10128, 11472, 10136, 15568,\n        10144, 19664, 10152, 23760, 10160, 27856, 10168, 31952, 10192, 11984,\n        10200, 16080, 10208, 20176, 10216, 24272, 10224, 28368, 10232, 32464,\n        10264, 12560, 10272, 16656, 10280, 20752, 10288, 24848, 10296, 28944,\n        10328, 13072, 10336, 17168, 10344, 21264, 10352, 25360, 10360, 29456,\n        10392, 13584, 10400, 17680, 10408, 21776, 10416, 25872, 10424, 29968,\n        10456, 14096, 10464, 18192, 10472, 22288, 10480, 26384, 10488, 30480,\n        10520, 14608, 10528, 18704, 10536, 22800, 10544, 26896, 10552, 30992,\n        10576, 11024, 10584, 15120, 10592, 19216, 10600, 23312, 10608, 27408,\n        10616, 31504, 10640, 11536, 10648, 15632, 10656, 19728, 10664, 23824,\n        10672, 27920, 10680, 32016, 10704, 12048, 10712, 16144, 10720, 20240,\n        10728, 24336, 10736, 28432, 10744, 32528, 10776, 12624, 10784, 16720,\n        10792, 20816, 10800, 24912, 10808, 29008, 10840, 13136, 10848, 17232,\n        10856, 21328, 10864, 25424, 10872, 29520, 10904, 13648, 10912, 17744,\n        10920, 21840, 10928, 25936, 10936, 30032, 10968, 14160, 10976, 18256,\n        10984, 22352, 10992, 26448, 11000, 30544, 11032, 14672, 11040, 18768,\n        11048, 22864, 11056, 26960, 11064, 31056, 11096, 15184, 11104, 19280,\n        11112, 23376, 11120, 27472, 11128, 31568, 11152, 11600, 11160, 15696,\n        11168, 19792, 11176, 23888, 11184, 27984, 11192, 32080, 11216, 12112,\n        11224, 16208, 11232, 20304, 11240, 24400, 11248, 28496, 11256, 32592,\n        11288, 12688, 11296, 16784, 11304, 20880, 11312, 24976, 11320, 29072,\n        11352, 13200, 11360, 17296, 11368, 21392, 11376, 25488, 11384, 29584,\n        11416, 13712, 11424, 17808, 11432, 21904, 11440, 26000, 11448, 30096,\n        11480, 14224, 11488, 18320, 11496, 22416, 11504, 26512, 11512, 30608,\n        11544, 14736, 11552, 18832, 11560, 22928, 11568, 27024, 11576, 31120,\n        11608, 15248, 11616, 19344, 11624, 23440, 11632, 27536, 11640, 31632,\n        11672, 15760, 11680, 19856, 11688, 23952, 11696, 28048, 11704, 32144,\n        11728, 12176, 11736, 16272, 11744, 20368, 11752, 24464, 11760, 28560,\n        11768, 32656, 11800, 12752, 11808, 16848, 11816, 20944, 11824, 25040,\n        11832, 29136, 11864, 13264, 11872, 17360, 11880, 21456, 11888, 25552,\n        11896, 29648, 11928, 13776, 11936, 17872, 11944, 21968, 11952, 26064,\n        11960, 30160, 11992, 14288, 12000, 18384, 12008, 22480, 12016, 26576,\n        12024, 30672, 12056, 14800, 12064, 18896, 12072, 22992, 12080, 27088,\n        12088, 31184, 12120, 15312, 12128, 19408, 12136, 23504, 12144, 27600,\n        12152, 31696, 12184, 15824, 12192, 19920, 12200, 24016, 12208, 28112,\n        12216, 32208, 12248, 16336, 12256, 20432, 12264, 24528, 12272, 28624,\n        12280, 32720, 12320, 16408, 12328, 20504, 12336, 24600, 12344, 28696,\n        12376, 12824, 12384, 16920, 12392, 21016, 12400, 25112, 12408, 29208,\n        12440, 13336, 12448, 17432, 12456, 21528, 12464, 25624, 12472, 29720,\n        12504, 13848, 12512, 17944, 12520, 22040, 12528, 26136, 12536, 30232,\n        12568, 14360, 12576, 18456, 12584, 22552, 12592, 26648, 12600, 30744,\n        12632, 14872, 12640, 18968, 12648, 23064, 12656, 27160, 12664, 31256,\n        12696, 15384, 12704, 19480, 12712, 23576, 12720, 27672, 12728, 31768,\n        12760, 15896, 12768, 19992, 12776, 24088, 12784, 28184, 12792, 32280,\n        12832, 16472, 12840, 20568, 12848, 24664, 12856, 28760, 12896, 16984,\n        12904, 21080, 12912, 25176, 12920, 29272, 12952, 13400, 12960, 17496,\n        12968, 21592, 12976, 25688, 12984, 29784, 13016, 13912, 13024, 18008,\n        13032, 22104, 13040, 26200, 13048, 30296, 13080, 14424, 13088, 18520,\n        13096, 22616, 13104, 26712, 13112, 30808, 13144, 14936, 13152, 19032,\n        13160, 23128, 13168, 27224, 13176, 31320, 13208, 15448, 13216, 19544,\n        13224, 23640, 13232, 27736, 13240, 31832, 13272, 15960, 13280, 20056,\n        13288, 24152, 13296, 28248, 13304, 32344, 13344, 16536, 13352, 20632,\n        13360, 24728, 13368, 28824, 13408, 17048, 13416, 21144, 13424, 25240,\n        13432, 29336, 13472, 17560, 13480, 21656, 13488, 25752, 13496, 29848,\n        13528, 13976, 13536, 18072, 13544, 22168, 13552, 26264, 13560, 30360,\n        13592, 14488, 13600, 18584, 13608, 22680, 13616, 26776, 13624, 30872,\n        13656, 15000, 13664, 19096, 13672, 23192, 13680, 27288, 13688, 31384,\n        13720, 15512, 13728, 19608, 13736, 23704, 13744, 27800, 13752, 31896,\n        13784, 16024, 13792, 20120, 13800, 24216, 13808, 28312, 13816, 32408,\n        13856, 16600, 13864, 20696, 13872, 24792, 13880, 28888, 13920, 17112,\n        13928, 21208, 13936, 25304, 13944, 29400, 13984, 17624, 13992, 21720,\n        14000, 25816, 14008, 29912, 14048, 18136, 14056, 22232, 14064, 26328,\n        14072, 30424, 14104, 14552, 14112, 18648, 14120, 22744, 14128, 26840,\n        14136, 30936, 14168, 15064, 14176, 19160, 14184, 23256, 14192, 27352,\n        14200, 31448, 14232, 15576, 14240, 19672, 14248, 23768, 14256, 27864,\n        14264, 31960, 14296, 16088, 14304, 20184, 14312, 24280, 14320, 28376,\n        14328, 32472, 14368, 16664, 14376, 20760, 14384, 24856, 14392, 28952,\n        14432, 17176, 14440, 21272, 14448, 25368, 14456, 29464, 14496, 17688,\n        14504, 21784, 14512, 25880, 14520, 29976, 14560, 18200, 14568, 22296,\n        14576, 26392, 14584, 30488, 14624, 18712, 14632, 22808, 14640, 26904,\n        14648, 31000, 14680, 15128, 14688, 19224, 14696, 23320, 14704, 27416,\n        14712, 31512, 14744, 15640, 14752, 19736, 14760, 23832, 14768, 27928,\n        14776, 32024, 14808, 16152, 14816, 20248, 14824, 24344, 14832, 28440,\n        14840, 32536, 14880, 16728, 14888, 20824, 14896, 24920, 14904, 29016,\n        14944, 17240, 14952, 21336, 14960, 25432, 14968, 29528, 15008, 17752,\n        15016, 21848, 15024, 25944, 15032, 30040, 15072, 18264, 15080, 22360,\n        15088, 26456, 15096, 30552, 15136, 18776, 15144, 22872, 15152, 26968,\n        15160, 31064, 15200, 19288, 15208, 23384, 15216, 27480, 15224, 31576,\n        15256, 15704, 15264, 19800, 15272, 23896, 15280, 27992, 15288, 32088,\n        15320, 16216, 15328, 20312, 15336, 24408, 15344, 28504, 15352, 32600,\n        15392, 16792, 15400, 20888, 15408, 24984, 15416, 29080, 15456, 17304,\n        15464, 21400, 15472, 25496, 15480, 29592, 15520, 17816, 15528, 21912,\n        15536, 26008, 15544, 30104, 15584, 18328, 15592, 22424, 15600, 26520,\n        15608, 30616, 15648, 18840, 15656, 22936, 15664, 27032, 15672, 31128,\n        15712, 19352, 15720, 23448, 15728, 27544, 15736, 31640, 15776, 19864,\n        15784, 23960, 15792, 28056, 15800, 32152, 15832, 16280, 15840, 20376,\n        15848, 24472, 15856, 28568, 15864, 32664, 15904, 16856, 15912, 20952,\n        15920, 25048, 15928, 29144, 15968, 17368, 15976, 21464, 15984, 25560,\n        15992, 29656, 16032, 17880, 16040, 21976, 16048, 26072, 16056, 30168,\n        16096, 18392, 16104, 22488, 16112, 26584, 16120, 30680, 16160, 18904,\n        16168, 23000, 16176, 27096, 16184, 31192, 16224, 19416, 16232, 23512,\n        16240, 27608, 16248, 31704, 16288, 19928, 16296, 24024, 16304, 28120,\n        16312, 32216, 16352, 20440, 16360, 24536, 16368, 28632, 16376, 32728,\n        16424, 20512, 16432, 24608, 16440, 28704, 16480, 16928, 16488, 21024,\n        16496, 25120, 16504, 29216, 16544, 17440, 16552, 21536, 16560, 25632,\n        16568, 29728, 16608, 17952, 16616, 22048, 16624, 26144, 16632, 30240,\n        16672, 18464, 16680, 22560, 16688, 26656, 16696, 30752, 16736, 18976,\n        16744, 23072, 16752, 27168, 16760, 31264, 16800, 19488, 16808, 23584,\n        16816, 27680, 16824, 31776, 16864, 20000, 16872, 24096, 16880, 28192,\n        16888, 32288, 16936, 20576, 16944, 24672, 16952, 28768, 17000, 21088,\n        17008, 25184, 17016, 29280, 17056, 17504, 17064, 21600, 17072, 25696,\n        17080, 29792, 17120, 18016, 17128, 22112, 17136, 26208, 17144, 30304,\n        17184, 18528, 17192, 22624, 17200, 26720, 17208, 30816, 17248, 19040,\n        17256, 23136, 17264, 27232, 17272, 31328, 17312, 19552, 17320, 23648,\n        17328, 27744, 17336, 31840, 17376, 20064, 17384, 24160, 17392, 28256,\n        17400, 32352, 17448, 20640, 17456, 24736, 17464, 28832, 17512, 21152,\n        17520, 25248, 17528, 29344, 17576, 21664, 17584, 25760, 17592, 29856,\n        17632, 18080, 17640, 22176, 17648, 26272, 17656, 30368, 17696, 18592,\n        17704, 22688, 17712, 26784, 17720, 30880, 17760, 19104, 17768, 23200,\n        17776, 27296, 17784, 31392, 17824, 19616, 17832, 23712, 17840, 27808,\n        17848, 31904, 17888, 20128, 17896, 24224, 17904, 28320, 17912, 32416,\n        17960, 20704, 17968, 24800, 17976, 28896, 18024, 21216, 18032, 25312,\n        18040, 29408, 18088, 21728, 18096, 25824, 18104, 29920, 18152, 22240,\n        18160, 26336, 18168, 30432, 18208, 18656, 18216, 22752, 18224, 26848,\n        18232, 30944, 18272, 19168, 18280, 23264, 18288, 27360, 18296, 31456,\n        18336, 19680, 18344, 23776, 18352, 27872, 18360, 31968, 18400, 20192,\n        18408, 24288, 18416, 28384, 18424, 32480, 18472, 20768, 18480, 24864,\n        18488, 28960, 18536, 21280, 18544, 25376, 18552, 29472, 18600, 21792,\n        18608, 25888, 18616, 29984, 18664, 22304, 18672, 26400, 18680, 30496,\n        18728, 22816, 18736, 26912, 18744, 31008, 18784, 19232, 18792, 23328,\n        18800, 27424, 18808, 31520, 18848, 19744, 18856, 23840, 18864, 27936,\n        18872, 32032, 18912, 20256, 18920, 24352, 18928, 28448, 18936, 32544,\n        18984, 20832, 18992, 24928, 19000, 29024, 19048, 21344, 19056, 25440,\n        19064, 29536, 19112, 21856, 19120, 25952, 19128, 30048, 19176, 22368,\n        19184, 26464, 19192, 30560, 19240, 22880, 19248, 26976, 19256, 31072,\n        19304, 23392, 19312, 27488, 19320, 31584, 19360, 19808, 19368, 23904,\n        19376, 28000, 19384, 32096, 19424, 20320, 19432, 24416, 19440, 28512,\n        19448, 32608, 19496, 20896, 19504, 24992, 19512, 29088, 19560, 21408,\n        19568, 25504, 19576, 29600, 19624, 21920, 19632, 26016, 19640, 30112,\n        19688, 22432, 19696, 26528, 19704, 30624, 19752, 22944, 19760, 27040,\n        19768, 31136, 19816, 23456, 19824, 27552, 19832, 31648, 19880, 23968,\n        19888, 28064, 19896, 32160, 19936, 20384, 19944, 24480, 19952, 28576,\n        19960, 32672, 20008, 20960, 20016, 25056, 20024, 29152, 20072, 21472,\n        20080, 25568, 20088, 29664, 20136, 21984, 20144, 26080, 20152, 30176,\n        20200, 22496, 20208, 26592, 20216, 30688, 20264, 23008, 20272, 27104,\n        20280, 31200, 20328, 23520, 20336, 27616, 20344, 31712, 20392, 24032,\n        20400, 28128, 20408, 32224, 20456, 24544, 20464, 28640, 20472, 32736,\n        20528, 24616, 20536, 28712, 20584, 21032, 20592, 25128, 20600, 29224,\n        20648, 21544, 20656, 25640, 20664, 29736, 20712, 22056, 20720, 26152,\n        20728, 30248, 20776, 22568, 20784, 26664, 20792, 30760, 20840, 23080,\n        20848, 27176, 20856, 31272, 20904, 23592, 20912, 27688, 20920, 31784,\n        20968, 24104, 20976, 28200, 20984, 32296, 21040, 24680, 21048, 28776,\n        21104, 25192, 21112, 29288, 21160, 21608, 21168, 25704, 21176, 29800,\n        21224, 22120, 21232, 26216, 21240, 30312, 21288, 22632, 21296, 26728,\n        21304, 30824, 21352, 23144, 21360, 27240, 21368, 31336, 21416, 23656,\n        21424, 27752, 21432, 31848, 21480, 24168, 21488, 28264, 21496, 32360,\n        21552, 24744, 21560, 28840, 21616, 25256, 21624, 29352, 21680, 25768,\n        21688, 29864, 21736, 22184, 21744, 26280, 21752, 30376, 21800, 22696,\n        21808, 26792, 21816, 30888, 21864, 23208, 21872, 27304, 21880, 31400,\n        21928, 23720, 21936, 27816, 21944, 31912, 21992, 24232, 22000, 28328,\n        22008, 32424, 22064, 24808, 22072, 28904, 22128, 25320, 22136, 29416,\n        22192, 25832, 22200, 29928, 22256, 26344, 22264, 30440, 22312, 22760,\n        22320, 26856, 22328, 30952, 22376, 23272, 22384, 27368, 22392, 31464,\n        22440, 23784, 22448, 27880, 22456, 31976, 22504, 24296, 22512, 28392,\n        22520, 32488, 22576, 24872, 22584, 28968, 22640, 25384, 22648, 29480,\n        22704, 25896, 22712, 29992, 22768, 26408, 22776, 30504, 22832, 26920,\n        22840, 31016, 22888, 23336, 22896, 27432, 22904, 31528, 22952, 23848,\n        22960, 27944, 22968, 32040, 23016, 24360, 23024, 28456, 23032, 32552,\n        23088, 24936, 23096, 29032, 23152, 25448, 23160, 29544, 23216, 25960,\n        23224, 30056, 23280, 26472, 23288, 30568, 23344, 26984, 23352, 31080,\n        23408, 27496, 23416, 31592, 23464, 23912, 23472, 28008, 23480, 32104,\n        23528, 24424, 23536, 28520, 23544, 32616, 23600, 25000, 23608, 29096,\n        23664, 25512, 23672, 29608, 23728, 26024, 23736, 30120, 23792, 26536,\n        23800, 30632, 23856, 27048, 23864, 31144, 23920, 27560, 23928, 31656,\n        23984, 28072, 23992, 32168, 24040, 24488, 24048, 28584, 24056, 32680,\n        24112, 25064, 24120, 29160, 24176, 25576, 24184, 29672, 24240, 26088,\n        24248, 30184, 24304, 26600, 24312, 30696, 24368, 27112, 24376, 31208,\n        24432, 27624, 24440, 31720, 24496, 28136, 24504, 32232, 24560, 28648,\n        24568, 32744, 24632, 28720, 24688, 25136, 24696, 29232, 24752, 25648,\n        24760, 29744, 24816, 26160, 24824, 30256, 24880, 26672, 24888, 30768,\n        24944, 27184, 24952, 31280, 25008, 27696, 25016, 31792, 25072, 28208,\n        25080, 32304, 25144, 28784, 25208, 29296, 25264, 25712, 25272, 29808,\n        25328, 26224, 25336, 30320, 25392, 26736, 25400, 30832, 25456, 27248,\n        25464, 31344, 25520, 27760, 25528, 31856, 25584, 28272, 25592, 32368,\n        25656, 28848, 25720, 29360, 25784, 29872, 25840, 26288, 25848, 30384,\n        25904, 26800, 25912, 30896, 25968, 27312, 25976, 31408, 26032, 27824,\n        26040, 31920, 26096, 28336, 26104, 32432, 26168, 28912, 26232, 29424,\n        26296, 29936, 26360, 30448, 26416, 26864, 26424, 30960, 26480, 27376,\n        26488, 31472, 26544, 27888, 26552, 31984, 26608, 28400, 26616, 32496,\n        26680, 28976, 26744, 29488, 26808, 30000, 26872, 30512, 26936, 31024,\n        26992, 27440, 27000, 31536, 27056, 27952, 27064, 32048, 27120, 28464,\n        27128, 32560, 27192, 29040, 27256, 29552, 27320, 30064, 27384, 30576,\n        27448, 31088, 27512, 31600, 27568, 28016, 27576, 32112, 27632, 28528,\n        27640, 32624, 27704, 29104, 27768, 29616, 27832, 30128, 27896, 30640,\n        27960, 31152, 28024, 31664, 28088, 32176, 28144, 28592, 28152, 32688,\n        28216, 29168, 28280, 29680, 28344, 30192, 28408, 30704, 28472, 31216,\n        28536, 31728, 28600, 32240, 28664, 32752, 28792, 29240, 28856, 29752,\n        28920, 30264, 28984, 30776, 29048, 31288, 29112, 31800, 29176, 32312,\n        29368, 29816, 29432, 30328, 29496, 30840, 29560, 31352, 29624, 31864,\n        29688, 32376, 29944, 30392, 30008, 30904, 30072, 31416, 30136, 31928,\n        30200, 32440, 30520, 30968, 30584, 31480, 30648, 31992, 30712, 32504,\n        31096, 31544, 31160, 32056, 31224, 32568, 31672, 32120, 31736, 32632,\n        32248, 32696};\n\nconst uint16_t\n    armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH] = {\n        /* radix 4, size 12 */\n        8, 64, 16, 32, 24, 96, 40, 80, 56, 112, 88, 104};\n\nconst uint16_t\n    armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH] = {\n        /* 4x2, size 24 */\n        8,  128, 16, 64,  24,  192, 40,  160, 48,  96,  56,  224,\n        72, 144, 88, 208, 104, 176, 120, 240, 152, 200, 184, 232};\n\nconst uint16_t\n    armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH] = {\n        /* radix 4, size 56 */\n        8,   256, 16,  128, 24,  384, 32,  64,  40,  320, 48,  192, 56,  448,\n        72,  288, 80,  160, 88,  416, 104, 352, 112, 224, 120, 480, 136, 272,\n        152, 400, 168, 336, 176, 208, 184, 464, 200, 304, 216, 432, 232, 368,\n        248, 496, 280, 392, 296, 328, 312, 456, 344, 424, 376, 488, 440, 472};\n\nconst uint16_t\n    armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH] =\n        {\n            /* 4x2, size 112 */\n            8,   512, 16,  256,  24,  768, 32,  128, 40,  640,  48,  384, 56,\n            896, 72,  576, 80,   320, 88,  832, 96,  192, 104,  704, 112, 448,\n            120, 960, 136, 544,  144, 288, 152, 800, 168, 672,  176, 416, 184,\n            928, 200, 608, 208,  352, 216, 864, 232, 736, 240,  480, 248, 992,\n            264, 528, 280, 784,  296, 656, 304, 400, 312, 912,  328, 592, 344,\n            848, 360, 720, 368,  464, 376, 976, 392, 560, 408,  816, 424, 688,\n            440, 944, 456, 624,  472, 880, 488, 752, 504, 1008, 536, 776, 552,\n            648, 568, 904, 600,  840, 616, 712, 632, 968, 664,  808, 696, 936,\n            728, 872, 760, 1000, 824, 920, 888, 984};\n\nconst uint16_t\n    armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH] =\n        {\n            /* radix 4, size 240 */\n            8,    1024, 16,   512,  24,   1536, 32,   256,  40,   1280, 48,\n            768,  56,   1792, 64,   128,  72,   1152, 80,   640,  88,   1664,\n            96,   384,  104,  1408, 112,  896,  120,  1920, 136,  1088, 144,\n            576,  152,  1600, 160,  320,  168,  1344, 176,  832,  184,  1856,\n            200,  1216, 208,  704,  216,  1728, 224,  448,  232,  1472, 240,\n            960,  248,  1984, 264,  1056, 272,  544,  280,  1568, 296,  1312,\n            304,  800,  312,  1824, 328,  1184, 336,  672,  344,  1696, 352,\n            416,  360,  1440, 368,  928,  376,  1952, 392,  1120, 400,  608,\n            408,  1632, 424,  1376, 432,  864,  440,  1888, 456,  1248, 464,\n            736,  472,  1760, 488,  1504, 496,  992,  504,  2016, 520,  1040,\n            536,  1552, 552,  1296, 560,  784,  568,  1808, 584,  1168, 592,\n            656,  600,  1680, 616,  1424, 624,  912,  632,  1936, 648,  1104,\n            664,  1616, 680,  1360, 688,  848,  696,  1872, 712,  1232, 728,\n            1744, 744,  1488, 752,  976,  760,  2000, 776,  1072, 792,  1584,\n            808,  1328, 824,  1840, 840,  1200, 856,  1712, 872,  1456, 880,\n            944,  888,  1968, 904,  1136, 920,  1648, 936,  1392, 952,  1904,\n            968,  1264, 984,  1776, 1000, 1520, 1016, 2032, 1048, 1544, 1064,\n            1288, 1080, 1800, 1096, 1160, 1112, 1672, 1128, 1416, 1144, 1928,\n            1176, 1608, 1192, 1352, 1208, 1864, 1240, 1736, 1256, 1480, 1272,\n            1992, 1304, 1576, 1336, 1832, 1368, 1704, 1384, 1448, 1400, 1960,\n            1432, 1640, 1464, 1896, 1496, 1768, 1528, 2024, 1592, 1816, 1624,\n            1688, 1656, 1944, 1720, 1880, 1784, 2008, 1912, 1976};\n\nconst uint16_t armBitRevIndexTable_fixed_512\n    [ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH] = {\n        /* 4x2, size 480 */\n        8,    2048, 16,   1024, 24,   3072, 32,   512,  40,   2560, 48,   1536,\n        56,   3584, 64,   256,  72,   2304, 80,   1280, 88,   3328, 96,   768,\n        104,  2816, 112,  1792, 120,  3840, 136,  2176, 144,  1152, 152,  3200,\n        160,  640,  168,  2688, 176,  1664, 184,  3712, 192,  384,  200,  2432,\n        208,  1408, 216,  3456, 224,  896,  232,  2944, 240,  1920, 248,  3968,\n        264,  2112, 272,  1088, 280,  3136, 288,  576,  296,  2624, 304,  1600,\n        312,  3648, 328,  2368, 336,  1344, 344,  3392, 352,  832,  360,  2880,\n        368,  1856, 376,  3904, 392,  2240, 400,  1216, 408,  3264, 416,  704,\n        424,  2752, 432,  1728, 440,  3776, 456,  2496, 464,  1472, 472,  3520,\n        480,  960,  488,  3008, 496,  1984, 504,  4032, 520,  2080, 528,  1056,\n        536,  3104, 552,  2592, 560,  1568, 568,  3616, 584,  2336, 592,  1312,\n        600,  3360, 608,  800,  616,  2848, 624,  1824, 632,  3872, 648,  2208,\n        656,  1184, 664,  3232, 680,  2720, 688,  1696, 696,  3744, 712,  2464,\n        720,  1440, 728,  3488, 736,  928,  744,  2976, 752,  1952, 760,  4000,\n        776,  2144, 784,  1120, 792,  3168, 808,  2656, 816,  1632, 824,  3680,\n        840,  2400, 848,  1376, 856,  3424, 872,  2912, 880,  1888, 888,  3936,\n        904,  2272, 912,  1248, 920,  3296, 936,  2784, 944,  1760, 952,  3808,\n        968,  2528, 976,  1504, 984,  3552, 1000, 3040, 1008, 2016, 1016, 4064,\n        1032, 2064, 1048, 3088, 1064, 2576, 1072, 1552, 1080, 3600, 1096, 2320,\n        1104, 1296, 1112, 3344, 1128, 2832, 1136, 1808, 1144, 3856, 1160, 2192,\n        1176, 3216, 1192, 2704, 1200, 1680, 1208, 3728, 1224, 2448, 1232, 1424,\n        1240, 3472, 1256, 2960, 1264, 1936, 1272, 3984, 1288, 2128, 1304, 3152,\n        1320, 2640, 1328, 1616, 1336, 3664, 1352, 2384, 1368, 3408, 1384, 2896,\n        1392, 1872, 1400, 3920, 1416, 2256, 1432, 3280, 1448, 2768, 1456, 1744,\n        1464, 3792, 1480, 2512, 1496, 3536, 1512, 3024, 1520, 2000, 1528, 4048,\n        1544, 2096, 1560, 3120, 1576, 2608, 1592, 3632, 1608, 2352, 1624, 3376,\n        1640, 2864, 1648, 1840, 1656, 3888, 1672, 2224, 1688, 3248, 1704, 2736,\n        1720, 3760, 1736, 2480, 1752, 3504, 1768, 2992, 1776, 1968, 1784, 4016,\n        1800, 2160, 1816, 3184, 1832, 2672, 1848, 3696, 1864, 2416, 1880, 3440,\n        1896, 2928, 1912, 3952, 1928, 2288, 1944, 3312, 1960, 2800, 1976, 3824,\n        1992, 2544, 2008, 3568, 2024, 3056, 2040, 4080, 2072, 3080, 2088, 2568,\n        2104, 3592, 2120, 2312, 2136, 3336, 2152, 2824, 2168, 3848, 2200, 3208,\n        2216, 2696, 2232, 3720, 2248, 2440, 2264, 3464, 2280, 2952, 2296, 3976,\n        2328, 3144, 2344, 2632, 2360, 3656, 2392, 3400, 2408, 2888, 2424, 3912,\n        2456, 3272, 2472, 2760, 2488, 3784, 2520, 3528, 2536, 3016, 2552, 4040,\n        2584, 3112, 2616, 3624, 2648, 3368, 2664, 2856, 2680, 3880, 2712, 3240,\n        2744, 3752, 2776, 3496, 2792, 2984, 2808, 4008, 2840, 3176, 2872, 3688,\n        2904, 3432, 2936, 3944, 2968, 3304, 3000, 3816, 3032, 3560, 3064, 4072,\n        3128, 3608, 3160, 3352, 3192, 3864, 3256, 3736, 3288, 3480, 3320, 3992,\n        3384, 3672, 3448, 3928, 3512, 3800, 3576, 4056, 3704, 3896, 3832, 4024};\n\nconst uint16_t armBitRevIndexTable_fixed_1024\n    [ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] = {\n        /* radix 4, size 992 */\n        8,    4096, 16,   2048, 24,   6144, 32,   1024, 40,   5120, 48,   3072,\n        56,   7168, 64,   512,  72,   4608, 80,   2560, 88,   6656, 96,   1536,\n        104,  5632, 112,  3584, 120,  7680, 128,  256,  136,  4352, 144,  2304,\n        152,  6400, 160,  1280, 168,  5376, 176,  3328, 184,  7424, 192,  768,\n        200,  4864, 208,  2816, 216,  6912, 224,  1792, 232,  5888, 240,  3840,\n        248,  7936, 264,  4224, 272,  2176, 280,  6272, 288,  1152, 296,  5248,\n        304,  3200, 312,  7296, 320,  640,  328,  4736, 336,  2688, 344,  6784,\n        352,  1664, 360,  5760, 368,  3712, 376,  7808, 392,  4480, 400,  2432,\n        408,  6528, 416,  1408, 424,  5504, 432,  3456, 440,  7552, 448,  896,\n        456,  4992, 464,  2944, 472,  7040, 480,  1920, 488,  6016, 496,  3968,\n        504,  8064, 520,  4160, 528,  2112, 536,  6208, 544,  1088, 552,  5184,\n        560,  3136, 568,  7232, 584,  4672, 592,  2624, 600,  6720, 608,  1600,\n        616,  5696, 624,  3648, 632,  7744, 648,  4416, 656,  2368, 664,  6464,\n        672,  1344, 680,  5440, 688,  3392, 696,  7488, 704,  832,  712,  4928,\n        720,  2880, 728,  6976, 736,  1856, 744,  5952, 752,  3904, 760,  8000,\n        776,  4288, 784,  2240, 792,  6336, 800,  1216, 808,  5312, 816,  3264,\n        824,  7360, 840,  4800, 848,  2752, 856,  6848, 864,  1728, 872,  5824,\n        880,  3776, 888,  7872, 904,  4544, 912,  2496, 920,  6592, 928,  1472,\n        936,  5568, 944,  3520, 952,  7616, 968,  5056, 976,  3008, 984,  7104,\n        992,  1984, 1000, 6080, 1008, 4032, 1016, 8128, 1032, 4128, 1040, 2080,\n        1048, 6176, 1064, 5152, 1072, 3104, 1080, 7200, 1096, 4640, 1104, 2592,\n        1112, 6688, 1120, 1568, 1128, 5664, 1136, 3616, 1144, 7712, 1160, 4384,\n        1168, 2336, 1176, 6432, 1184, 1312, 1192, 5408, 1200, 3360, 1208, 7456,\n        1224, 4896, 1232, 2848, 1240, 6944, 1248, 1824, 1256, 5920, 1264, 3872,\n        1272, 7968, 1288, 4256, 1296, 2208, 1304, 6304, 1320, 5280, 1328, 3232,\n        1336, 7328, 1352, 4768, 1360, 2720, 1368, 6816, 1376, 1696, 1384, 5792,\n        1392, 3744, 1400, 7840, 1416, 4512, 1424, 2464, 1432, 6560, 1448, 5536,\n        1456, 3488, 1464, 7584, 1480, 5024, 1488, 2976, 1496, 7072, 1504, 1952,\n        1512, 6048, 1520, 4000, 1528, 8096, 1544, 4192, 1552, 2144, 1560, 6240,\n        1576, 5216, 1584, 3168, 1592, 7264, 1608, 4704, 1616, 2656, 1624, 6752,\n        1640, 5728, 1648, 3680, 1656, 7776, 1672, 4448, 1680, 2400, 1688, 6496,\n        1704, 5472, 1712, 3424, 1720, 7520, 1736, 4960, 1744, 2912, 1752, 7008,\n        1760, 1888, 1768, 5984, 1776, 3936, 1784, 8032, 1800, 4320, 1808, 2272,\n        1816, 6368, 1832, 5344, 1840, 3296, 1848, 7392, 1864, 4832, 1872, 2784,\n        1880, 6880, 1896, 5856, 1904, 3808, 1912, 7904, 1928, 4576, 1936, 2528,\n        1944, 6624, 1960, 5600, 1968, 3552, 1976, 7648, 1992, 5088, 2000, 3040,\n        2008, 7136, 2024, 6112, 2032, 4064, 2040, 8160, 2056, 4112, 2072, 6160,\n        2088, 5136, 2096, 3088, 2104, 7184, 2120, 4624, 2128, 2576, 2136, 6672,\n        2152, 5648, 2160, 3600, 2168, 7696, 2184, 4368, 2192, 2320, 2200, 6416,\n        2216, 5392, 2224, 3344, 2232, 7440, 2248, 4880, 2256, 2832, 2264, 6928,\n        2280, 5904, 2288, 3856, 2296, 7952, 2312, 4240, 2328, 6288, 2344, 5264,\n        2352, 3216, 2360, 7312, 2376, 4752, 2384, 2704, 2392, 6800, 2408, 5776,\n        2416, 3728, 2424, 7824, 2440, 4496, 2456, 6544, 2472, 5520, 2480, 3472,\n        2488, 7568, 2504, 5008, 2512, 2960, 2520, 7056, 2536, 6032, 2544, 3984,\n        2552, 8080, 2568, 4176, 2584, 6224, 2600, 5200, 2608, 3152, 2616, 7248,\n        2632, 4688, 2648, 6736, 2664, 5712, 2672, 3664, 2680, 7760, 2696, 4432,\n        2712, 6480, 2728, 5456, 2736, 3408, 2744, 7504, 2760, 4944, 2768, 2896,\n        2776, 6992, 2792, 5968, 2800, 3920, 2808, 8016, 2824, 4304, 2840, 6352,\n        2856, 5328, 2864, 3280, 2872, 7376, 2888, 4816, 2904, 6864, 2920, 5840,\n        2928, 3792, 2936, 7888, 2952, 4560, 2968, 6608, 2984, 5584, 2992, 3536,\n        3000, 7632, 3016, 5072, 3032, 7120, 3048, 6096, 3056, 4048, 3064, 8144,\n        3080, 4144, 3096, 6192, 3112, 5168, 3128, 7216, 3144, 4656, 3160, 6704,\n        3176, 5680, 3184, 3632, 3192, 7728, 3208, 4400, 3224, 6448, 3240, 5424,\n        3248, 3376, 3256, 7472, 3272, 4912, 3288, 6960, 3304, 5936, 3312, 3888,\n        3320, 7984, 3336, 4272, 3352, 6320, 3368, 5296, 3384, 7344, 3400, 4784,\n        3416, 6832, 3432, 5808, 3440, 3760, 3448, 7856, 3464, 4528, 3480, 6576,\n        3496, 5552, 3512, 7600, 3528, 5040, 3544, 7088, 3560, 6064, 3568, 4016,\n        3576, 8112, 3592, 4208, 3608, 6256, 3624, 5232, 3640, 7280, 3656, 4720,\n        3672, 6768, 3688, 5744, 3704, 7792, 3720, 4464, 3736, 6512, 3752, 5488,\n        3768, 7536, 3784, 4976, 3800, 7024, 3816, 6000, 3824, 3952, 3832, 8048,\n        3848, 4336, 3864, 6384, 3880, 5360, 3896, 7408, 3912, 4848, 3928, 6896,\n        3944, 5872, 3960, 7920, 3976, 4592, 3992, 6640, 4008, 5616, 4024, 7664,\n        4040, 5104, 4056, 7152, 4072, 6128, 4088, 8176, 4120, 6152, 4136, 5128,\n        4152, 7176, 4168, 4616, 4184, 6664, 4200, 5640, 4216, 7688, 4232, 4360,\n        4248, 6408, 4264, 5384, 4280, 7432, 4296, 4872, 4312, 6920, 4328, 5896,\n        4344, 7944, 4376, 6280, 4392, 5256, 4408, 7304, 4424, 4744, 4440, 6792,\n        4456, 5768, 4472, 7816, 4504, 6536, 4520, 5512, 4536, 7560, 4552, 5000,\n        4568, 7048, 4584, 6024, 4600, 8072, 4632, 6216, 4648, 5192, 4664, 7240,\n        4696, 6728, 4712, 5704, 4728, 7752, 4760, 6472, 4776, 5448, 4792, 7496,\n        4808, 4936, 4824, 6984, 4840, 5960, 4856, 8008, 4888, 6344, 4904, 5320,\n        4920, 7368, 4952, 6856, 4968, 5832, 4984, 7880, 5016, 6600, 5032, 5576,\n        5048, 7624, 5080, 7112, 5096, 6088, 5112, 8136, 5144, 6184, 5176, 7208,\n        5208, 6696, 5224, 5672, 5240, 7720, 5272, 6440, 5288, 5416, 5304, 7464,\n        5336, 6952, 5352, 5928, 5368, 7976, 5400, 6312, 5432, 7336, 5464, 6824,\n        5480, 5800, 5496, 7848, 5528, 6568, 5560, 7592, 5592, 7080, 5608, 6056,\n        5624, 8104, 5656, 6248, 5688, 7272, 5720, 6760, 5752, 7784, 5784, 6504,\n        5816, 7528, 5848, 7016, 5864, 5992, 5880, 8040, 5912, 6376, 5944, 7400,\n        5976, 6888, 6008, 7912, 6040, 6632, 6072, 7656, 6104, 7144, 6136, 8168,\n        6200, 7192, 6232, 6680, 6264, 7704, 6296, 6424, 6328, 7448, 6360, 6936,\n        6392, 7960, 6456, 7320, 6488, 6808, 6520, 7832, 6584, 7576, 6616, 7064,\n        6648, 8088, 6712, 7256, 6776, 7768, 6840, 7512, 6872, 7000, 6904, 8024,\n        6968, 7384, 7032, 7896, 7096, 7640, 7160, 8152, 7288, 7736, 7352, 7480,\n        7416, 7992, 7544, 7864, 7672, 8120, 7928, 8056};\n\nconst uint16_t armBitRevIndexTable_fixed_2048\n    [ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] = {\n        /* 4x2, size 1984 */\n        8,     8192,  16,    4096,  24,    12288, 32,    2048,  40,    10240,\n        48,    6144,  56,    14336, 64,    1024,  72,    9216,  80,    5120,\n        88,    13312, 96,    3072,  104,   11264, 112,   7168,  120,   15360,\n        128,   512,   136,   8704,  144,   4608,  152,   12800, 160,   2560,\n        168,   10752, 176,   6656,  184,   14848, 192,   1536,  200,   9728,\n        208,   5632,  216,   13824, 224,   3584,  232,   11776, 240,   7680,\n        248,   15872, 264,   8448,  272,   4352,  280,   12544, 288,   2304,\n        296,   10496, 304,   6400,  312,   14592, 320,   1280,  328,   9472,\n        336,   5376,  344,   13568, 352,   3328,  360,   11520, 368,   7424,\n        376,   15616, 384,   768,   392,   8960,  400,   4864,  408,   13056,\n        416,   2816,  424,   11008, 432,   6912,  440,   15104, 448,   1792,\n        456,   9984,  464,   5888,  472,   14080, 480,   3840,  488,   12032,\n        496,   7936,  504,   16128, 520,   8320,  528,   4224,  536,   12416,\n        544,   2176,  552,   10368, 560,   6272,  568,   14464, 576,   1152,\n        584,   9344,  592,   5248,  600,   13440, 608,   3200,  616,   11392,\n        624,   7296,  632,   15488, 648,   8832,  656,   4736,  664,   12928,\n        672,   2688,  680,   10880, 688,   6784,  696,   14976, 704,   1664,\n        712,   9856,  720,   5760,  728,   13952, 736,   3712,  744,   11904,\n        752,   7808,  760,   16000, 776,   8576,  784,   4480,  792,   12672,\n        800,   2432,  808,   10624, 816,   6528,  824,   14720, 832,   1408,\n        840,   9600,  848,   5504,  856,   13696, 864,   3456,  872,   11648,\n        880,   7552,  888,   15744, 904,   9088,  912,   4992,  920,   13184,\n        928,   2944,  936,   11136, 944,   7040,  952,   15232, 960,   1920,\n        968,   10112, 976,   6016,  984,   14208, 992,   3968,  1000,  12160,\n        1008,  8064,  1016,  16256, 1032,  8256,  1040,  4160,  1048,  12352,\n        1056,  2112,  1064,  10304, 1072,  6208,  1080,  14400, 1096,  9280,\n        1104,  5184,  1112,  13376, 1120,  3136,  1128,  11328, 1136,  7232,\n        1144,  15424, 1160,  8768,  1168,  4672,  1176,  12864, 1184,  2624,\n        1192,  10816, 1200,  6720,  1208,  14912, 1216,  1600,  1224,  9792,\n        1232,  5696,  1240,  13888, 1248,  3648,  1256,  11840, 1264,  7744,\n        1272,  15936, 1288,  8512,  1296,  4416,  1304,  12608, 1312,  2368,\n        1320,  10560, 1328,  6464,  1336,  14656, 1352,  9536,  1360,  5440,\n        1368,  13632, 1376,  3392,  1384,  11584, 1392,  7488,  1400,  15680,\n        1416,  9024,  1424,  4928,  1432,  13120, 1440,  2880,  1448,  11072,\n        1456,  6976,  1464,  15168, 1472,  1856,  1480,  10048, 1488,  5952,\n        1496,  14144, 1504,  3904,  1512,  12096, 1520,  8000,  1528,  16192,\n        1544,  8384,  1552,  4288,  1560,  12480, 1568,  2240,  1576,  10432,\n        1584,  6336,  1592,  14528, 1608,  9408,  1616,  5312,  1624,  13504,\n        1632,  3264,  1640,  11456, 1648,  7360,  1656,  15552, 1672,  8896,\n        1680,  4800,  1688,  12992, 1696,  2752,  1704,  10944, 1712,  6848,\n        1720,  15040, 1736,  9920,  1744,  5824,  1752,  14016, 1760,  3776,\n        1768,  11968, 1776,  7872,  1784,  16064, 1800,  8640,  1808,  4544,\n        1816,  12736, 1824,  2496,  1832,  10688, 1840,  6592,  1848,  14784,\n        1864,  9664,  1872,  5568,  1880,  13760, 1888,  3520,  1896,  11712,\n        1904,  7616,  1912,  15808, 1928,  9152,  1936,  5056,  1944,  13248,\n        1952,  3008,  1960,  11200, 1968,  7104,  1976,  15296, 1992,  10176,\n        2000,  6080,  2008,  14272, 2016,  4032,  2024,  12224, 2032,  8128,\n        2040,  16320, 2056,  8224,  2064,  4128,  2072,  12320, 2088,  10272,\n        2096,  6176,  2104,  14368, 2120,  9248,  2128,  5152,  2136,  13344,\n        2144,  3104,  2152,  11296, 2160,  7200,  2168,  15392, 2184,  8736,\n        2192,  4640,  2200,  12832, 2208,  2592,  2216,  10784, 2224,  6688,\n        2232,  14880, 2248,  9760,  2256,  5664,  2264,  13856, 2272,  3616,\n        2280,  11808, 2288,  7712,  2296,  15904, 2312,  8480,  2320,  4384,\n        2328,  12576, 2344,  10528, 2352,  6432,  2360,  14624, 2376,  9504,\n        2384,  5408,  2392,  13600, 2400,  3360,  2408,  11552, 2416,  7456,\n        2424,  15648, 2440,  8992,  2448,  4896,  2456,  13088, 2464,  2848,\n        2472,  11040, 2480,  6944,  2488,  15136, 2504,  10016, 2512,  5920,\n        2520,  14112, 2528,  3872,  2536,  12064, 2544,  7968,  2552,  16160,\n        2568,  8352,  2576,  4256,  2584,  12448, 2600,  10400, 2608,  6304,\n        2616,  14496, 2632,  9376,  2640,  5280,  2648,  13472, 2656,  3232,\n        2664,  11424, 2672,  7328,  2680,  15520, 2696,  8864,  2704,  4768,\n        2712,  12960, 2728,  10912, 2736,  6816,  2744,  15008, 2760,  9888,\n        2768,  5792,  2776,  13984, 2784,  3744,  2792,  11936, 2800,  7840,\n        2808,  16032, 2824,  8608,  2832,  4512,  2840,  12704, 2856,  10656,\n        2864,  6560,  2872,  14752, 2888,  9632,  2896,  5536,  2904,  13728,\n        2912,  3488,  2920,  11680, 2928,  7584,  2936,  15776, 2952,  9120,\n        2960,  5024,  2968,  13216, 2984,  11168, 2992,  7072,  3000,  15264,\n        3016,  10144, 3024,  6048,  3032,  14240, 3040,  4000,  3048,  12192,\n        3056,  8096,  3064,  16288, 3080,  8288,  3088,  4192,  3096,  12384,\n        3112,  10336, 3120,  6240,  3128,  14432, 3144,  9312,  3152,  5216,\n        3160,  13408, 3176,  11360, 3184,  7264,  3192,  15456, 3208,  8800,\n        3216,  4704,  3224,  12896, 3240,  10848, 3248,  6752,  3256,  14944,\n        3272,  9824,  3280,  5728,  3288,  13920, 3296,  3680,  3304,  11872,\n        3312,  7776,  3320,  15968, 3336,  8544,  3344,  4448,  3352,  12640,\n        3368,  10592, 3376,  6496,  3384,  14688, 3400,  9568,  3408,  5472,\n        3416,  13664, 3432,  11616, 3440,  7520,  3448,  15712, 3464,  9056,\n        3472,  4960,  3480,  13152, 3496,  11104, 3504,  7008,  3512,  15200,\n        3528,  10080, 3536,  5984,  3544,  14176, 3552,  3936,  3560,  12128,\n        3568,  8032,  3576,  16224, 3592,  8416,  3600,  4320,  3608,  12512,\n        3624,  10464, 3632,  6368,  3640,  14560, 3656,  9440,  3664,  5344,\n        3672,  13536, 3688,  11488, 3696,  7392,  3704,  15584, 3720,  8928,\n        3728,  4832,  3736,  13024, 3752,  10976, 3760,  6880,  3768,  15072,\n        3784,  9952,  3792,  5856,  3800,  14048, 3816,  12000, 3824,  7904,\n        3832,  16096, 3848,  8672,  3856,  4576,  3864,  12768, 3880,  10720,\n        3888,  6624,  3896,  14816, 3912,  9696,  3920,  5600,  3928,  13792,\n        3944,  11744, 3952,  7648,  3960,  15840, 3976,  9184,  3984,  5088,\n        3992,  13280, 4008,  11232, 4016,  7136,  4024,  15328, 4040,  10208,\n        4048,  6112,  4056,  14304, 4072,  12256, 4080,  8160,  4088,  16352,\n        4104,  8208,  4120,  12304, 4136,  10256, 4144,  6160,  4152,  14352,\n        4168,  9232,  4176,  5136,  4184,  13328, 4200,  11280, 4208,  7184,\n        4216,  15376, 4232,  8720,  4240,  4624,  4248,  12816, 4264,  10768,\n        4272,  6672,  4280,  14864, 4296,  9744,  4304,  5648,  4312,  13840,\n        4328,  11792, 4336,  7696,  4344,  15888, 4360,  8464,  4376,  12560,\n        4392,  10512, 4400,  6416,  4408,  14608, 4424,  9488,  4432,  5392,\n        4440,  13584, 4456,  11536, 4464,  7440,  4472,  15632, 4488,  8976,\n        4496,  4880,  4504,  13072, 4520,  11024, 4528,  6928,  4536,  15120,\n        4552,  10000, 4560,  5904,  4568,  14096, 4584,  12048, 4592,  7952,\n        4600,  16144, 4616,  8336,  4632,  12432, 4648,  10384, 4656,  6288,\n        4664,  14480, 4680,  9360,  4688,  5264,  4696,  13456, 4712,  11408,\n        4720,  7312,  4728,  15504, 4744,  8848,  4760,  12944, 4776,  10896,\n        4784,  6800,  4792,  14992, 4808,  9872,  4816,  5776,  4824,  13968,\n        4840,  11920, 4848,  7824,  4856,  16016, 4872,  8592,  4888,  12688,\n        4904,  10640, 4912,  6544,  4920,  14736, 4936,  9616,  4944,  5520,\n        4952,  13712, 4968,  11664, 4976,  7568,  4984,  15760, 5000,  9104,\n        5016,  13200, 5032,  11152, 5040,  7056,  5048,  15248, 5064,  10128,\n        5072,  6032,  5080,  14224, 5096,  12176, 5104,  8080,  5112,  16272,\n        5128,  8272,  5144,  12368, 5160,  10320, 5168,  6224,  5176,  14416,\n        5192,  9296,  5208,  13392, 5224,  11344, 5232,  7248,  5240,  15440,\n        5256,  8784,  5272,  12880, 5288,  10832, 5296,  6736,  5304,  14928,\n        5320,  9808,  5328,  5712,  5336,  13904, 5352,  11856, 5360,  7760,\n        5368,  15952, 5384,  8528,  5400,  12624, 5416,  10576, 5424,  6480,\n        5432,  14672, 5448,  9552,  5464,  13648, 5480,  11600, 5488,  7504,\n        5496,  15696, 5512,  9040,  5528,  13136, 5544,  11088, 5552,  6992,\n        5560,  15184, 5576,  10064, 5584,  5968,  5592,  14160, 5608,  12112,\n        5616,  8016,  5624,  16208, 5640,  8400,  5656,  12496, 5672,  10448,\n        5680,  6352,  5688,  14544, 5704,  9424,  5720,  13520, 5736,  11472,\n        5744,  7376,  5752,  15568, 5768,  8912,  5784,  13008, 5800,  10960,\n        5808,  6864,  5816,  15056, 5832,  9936,  5848,  14032, 5864,  11984,\n        5872,  7888,  5880,  16080, 5896,  8656,  5912,  12752, 5928,  10704,\n        5936,  6608,  5944,  14800, 5960,  9680,  5976,  13776, 5992,  11728,\n        6000,  7632,  6008,  15824, 6024,  9168,  6040,  13264, 6056,  11216,\n        6064,  7120,  6072,  15312, 6088,  10192, 6104,  14288, 6120,  12240,\n        6128,  8144,  6136,  16336, 6152,  8240,  6168,  12336, 6184,  10288,\n        6200,  14384, 6216,  9264,  6232,  13360, 6248,  11312, 6256,  7216,\n        6264,  15408, 6280,  8752,  6296,  12848, 6312,  10800, 6320,  6704,\n        6328,  14896, 6344,  9776,  6360,  13872, 6376,  11824, 6384,  7728,\n        6392,  15920, 6408,  8496,  6424,  12592, 6440,  10544, 6456,  14640,\n        6472,  9520,  6488,  13616, 6504,  11568, 6512,  7472,  6520,  15664,\n        6536,  9008,  6552,  13104, 6568,  11056, 6576,  6960,  6584,  15152,\n        6600,  10032, 6616,  14128, 6632,  12080, 6640,  7984,  6648,  16176,\n        6664,  8368,  6680,  12464, 6696,  10416, 6712,  14512, 6728,  9392,\n        6744,  13488, 6760,  11440, 6768,  7344,  6776,  15536, 6792,  8880,\n        6808,  12976, 6824,  10928, 6840,  15024, 6856,  9904,  6872,  14000,\n        6888,  11952, 6896,  7856,  6904,  16048, 6920,  8624,  6936,  12720,\n        6952,  10672, 6968,  14768, 6984,  9648,  7000,  13744, 7016,  11696,\n        7024,  7600,  7032,  15792, 7048,  9136,  7064,  13232, 7080,  11184,\n        7096,  15280, 7112,  10160, 7128,  14256, 7144,  12208, 7152,  8112,\n        7160,  16304, 7176,  8304,  7192,  12400, 7208,  10352, 7224,  14448,\n        7240,  9328,  7256,  13424, 7272,  11376, 7288,  15472, 7304,  8816,\n        7320,  12912, 7336,  10864, 7352,  14960, 7368,  9840,  7384,  13936,\n        7400,  11888, 7408,  7792,  7416,  15984, 7432,  8560,  7448,  12656,\n        7464,  10608, 7480,  14704, 7496,  9584,  7512,  13680, 7528,  11632,\n        7544,  15728, 7560,  9072,  7576,  13168, 7592,  11120, 7608,  15216,\n        7624,  10096, 7640,  14192, 7656,  12144, 7664,  8048,  7672,  16240,\n        7688,  8432,  7704,  12528, 7720,  10480, 7736,  14576, 7752,  9456,\n        7768,  13552, 7784,  11504, 7800,  15600, 7816,  8944,  7832,  13040,\n        7848,  10992, 7864,  15088, 7880,  9968,  7896,  14064, 7912,  12016,\n        7928,  16112, 7944,  8688,  7960,  12784, 7976,  10736, 7992,  14832,\n        8008,  9712,  8024,  13808, 8040,  11760, 8056,  15856, 8072,  9200,\n        8088,  13296, 8104,  11248, 8120,  15344, 8136,  10224, 8152,  14320,\n        8168,  12272, 8184,  16368, 8216,  12296, 8232,  10248, 8248,  14344,\n        8264,  9224,  8280,  13320, 8296,  11272, 8312,  15368, 8328,  8712,\n        8344,  12808, 8360,  10760, 8376,  14856, 8392,  9736,  8408,  13832,\n        8424,  11784, 8440,  15880, 8472,  12552, 8488,  10504, 8504,  14600,\n        8520,  9480,  8536,  13576, 8552,  11528, 8568,  15624, 8584,  8968,\n        8600,  13064, 8616,  11016, 8632,  15112, 8648,  9992,  8664,  14088,\n        8680,  12040, 8696,  16136, 8728,  12424, 8744,  10376, 8760,  14472,\n        8776,  9352,  8792,  13448, 8808,  11400, 8824,  15496, 8856,  12936,\n        8872,  10888, 8888,  14984, 8904,  9864,  8920,  13960, 8936,  11912,\n        8952,  16008, 8984,  12680, 9000,  10632, 9016,  14728, 9032,  9608,\n        9048,  13704, 9064,  11656, 9080,  15752, 9112,  13192, 9128,  11144,\n        9144,  15240, 9160,  10120, 9176,  14216, 9192,  12168, 9208,  16264,\n        9240,  12360, 9256,  10312, 9272,  14408, 9304,  13384, 9320,  11336,\n        9336,  15432, 9368,  12872, 9384,  10824, 9400,  14920, 9416,  9800,\n        9432,  13896, 9448,  11848, 9464,  15944, 9496,  12616, 9512,  10568,\n        9528,  14664, 9560,  13640, 9576,  11592, 9592,  15688, 9624,  13128,\n        9640,  11080, 9656,  15176, 9672,  10056, 9688,  14152, 9704,  12104,\n        9720,  16200, 9752,  12488, 9768,  10440, 9784,  14536, 9816,  13512,\n        9832,  11464, 9848,  15560, 9880,  13000, 9896,  10952, 9912,  15048,\n        9944,  14024, 9960,  11976, 9976,  16072, 10008, 12744, 10024, 10696,\n        10040, 14792, 10072, 13768, 10088, 11720, 10104, 15816, 10136, 13256,\n        10152, 11208, 10168, 15304, 10200, 14280, 10216, 12232, 10232, 16328,\n        10264, 12328, 10296, 14376, 10328, 13352, 10344, 11304, 10360, 15400,\n        10392, 12840, 10408, 10792, 10424, 14888, 10456, 13864, 10472, 11816,\n        10488, 15912, 10520, 12584, 10552, 14632, 10584, 13608, 10600, 11560,\n        10616, 15656, 10648, 13096, 10664, 11048, 10680, 15144, 10712, 14120,\n        10728, 12072, 10744, 16168, 10776, 12456, 10808, 14504, 10840, 13480,\n        10856, 11432, 10872, 15528, 10904, 12968, 10936, 15016, 10968, 13992,\n        10984, 11944, 11000, 16040, 11032, 12712, 11064, 14760, 11096, 13736,\n        11112, 11688, 11128, 15784, 11160, 13224, 11192, 15272, 11224, 14248,\n        11240, 12200, 11256, 16296, 11288, 12392, 11320, 14440, 11352, 13416,\n        11384, 15464, 11416, 12904, 11448, 14952, 11480, 13928, 11496, 11880,\n        11512, 15976, 11544, 12648, 11576, 14696, 11608, 13672, 11640, 15720,\n        11672, 13160, 11704, 15208, 11736, 14184, 11752, 12136, 11768, 16232,\n        11800, 12520, 11832, 14568, 11864, 13544, 11896, 15592, 11928, 13032,\n        11960, 15080, 11992, 14056, 12024, 16104, 12056, 12776, 12088, 14824,\n        12120, 13800, 12152, 15848, 12184, 13288, 12216, 15336, 12248, 14312,\n        12280, 16360, 12344, 14360, 12376, 13336, 12408, 15384, 12440, 12824,\n        12472, 14872, 12504, 13848, 12536, 15896, 12600, 14616, 12632, 13592,\n        12664, 15640, 12696, 13080, 12728, 15128, 12760, 14104, 12792, 16152,\n        12856, 14488, 12888, 13464, 12920, 15512, 12984, 15000, 13016, 13976,\n        13048, 16024, 13112, 14744, 13144, 13720, 13176, 15768, 13240, 15256,\n        13272, 14232, 13304, 16280, 13368, 14424, 13432, 15448, 13496, 14936,\n        13528, 13912, 13560, 15960, 13624, 14680, 13688, 15704, 13752, 15192,\n        13784, 14168, 13816, 16216, 13880, 14552, 13944, 15576, 14008, 15064,\n        14072, 16088, 14136, 14808, 14200, 15832, 14264, 15320, 14328, 16344,\n        14456, 15416, 14520, 14904, 14584, 15928, 14712, 15672, 14776, 15160,\n        14840, 16184, 14968, 15544, 15096, 16056, 15224, 15800, 15352, 16312,\n        15608, 15992, 15864, 16248};\n\nconst uint16_t armBitRevIndexTable_fixed_4096\n    [ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] = {\n        /* radix 4, size 4032 */\n        8,     16384, 16,    8192,  24,    24576, 32,    4096,  40,    20480,\n        48,    12288, 56,    28672, 64,    2048,  72,    18432, 80,    10240,\n        88,    26624, 96,    6144,  104,   22528, 112,   14336, 120,   30720,\n        128,   1024,  136,   17408, 144,   9216,  152,   25600, 160,   5120,\n        168,   21504, 176,   13312, 184,   29696, 192,   3072,  200,   19456,\n        208,   11264, 216,   27648, 224,   7168,  232,   23552, 240,   15360,\n        248,   31744, 256,   512,   264,   16896, 272,   8704,  280,   25088,\n        288,   4608,  296,   20992, 304,   12800, 312,   29184, 320,   2560,\n        328,   18944, 336,   10752, 344,   27136, 352,   6656,  360,   23040,\n        368,   14848, 376,   31232, 384,   1536,  392,   17920, 400,   9728,\n        408,   26112, 416,   5632,  424,   22016, 432,   13824, 440,   30208,\n        448,   3584,  456,   19968, 464,   11776, 472,   28160, 480,   7680,\n        488,   24064, 496,   15872, 504,   32256, 520,   16640, 528,   8448,\n        536,   24832, 544,   4352,  552,   20736, 560,   12544, 568,   28928,\n        576,   2304,  584,   18688, 592,   10496, 600,   26880, 608,   6400,\n        616,   22784, 624,   14592, 632,   30976, 640,   1280,  648,   17664,\n        656,   9472,  664,   25856, 672,   5376,  680,   21760, 688,   13568,\n        696,   29952, 704,   3328,  712,   19712, 720,   11520, 728,   27904,\n        736,   7424,  744,   23808, 752,   15616, 760,   32000, 776,   17152,\n        784,   8960,  792,   25344, 800,   4864,  808,   21248, 816,   13056,\n        824,   29440, 832,   2816,  840,   19200, 848,   11008, 856,   27392,\n        864,   6912,  872,   23296, 880,   15104, 888,   31488, 896,   1792,\n        904,   18176, 912,   9984,  920,   26368, 928,   5888,  936,   22272,\n        944,   14080, 952,   30464, 960,   3840,  968,   20224, 976,   12032,\n        984,   28416, 992,   7936,  1000,  24320, 1008,  16128, 1016,  32512,\n        1032,  16512, 1040,  8320,  1048,  24704, 1056,  4224,  1064,  20608,\n        1072,  12416, 1080,  28800, 1088,  2176,  1096,  18560, 1104,  10368,\n        1112,  26752, 1120,  6272,  1128,  22656, 1136,  14464, 1144,  30848,\n        1160,  17536, 1168,  9344,  1176,  25728, 1184,  5248,  1192,  21632,\n        1200,  13440, 1208,  29824, 1216,  3200,  1224,  19584, 1232,  11392,\n        1240,  27776, 1248,  7296,  1256,  23680, 1264,  15488, 1272,  31872,\n        1288,  17024, 1296,  8832,  1304,  25216, 1312,  4736,  1320,  21120,\n        1328,  12928, 1336,  29312, 1344,  2688,  1352,  19072, 1360,  10880,\n        1368,  27264, 1376,  6784,  1384,  23168, 1392,  14976, 1400,  31360,\n        1408,  1664,  1416,  18048, 1424,  9856,  1432,  26240, 1440,  5760,\n        1448,  22144, 1456,  13952, 1464,  30336, 1472,  3712,  1480,  20096,\n        1488,  11904, 1496,  28288, 1504,  7808,  1512,  24192, 1520,  16000,\n        1528,  32384, 1544,  16768, 1552,  8576,  1560,  24960, 1568,  4480,\n        1576,  20864, 1584,  12672, 1592,  29056, 1600,  2432,  1608,  18816,\n        1616,  10624, 1624,  27008, 1632,  6528,  1640,  22912, 1648,  14720,\n        1656,  31104, 1672,  17792, 1680,  9600,  1688,  25984, 1696,  5504,\n        1704,  21888, 1712,  13696, 1720,  30080, 1728,  3456,  1736,  19840,\n        1744,  11648, 1752,  28032, 1760,  7552,  1768,  23936, 1776,  15744,\n        1784,  32128, 1800,  17280, 1808,  9088,  1816,  25472, 1824,  4992,\n        1832,  21376, 1840,  13184, 1848,  29568, 1856,  2944,  1864,  19328,\n        1872,  11136, 1880,  27520, 1888,  7040,  1896,  23424, 1904,  15232,\n        1912,  31616, 1928,  18304, 1936,  10112, 1944,  26496, 1952,  6016,\n        1960,  22400, 1968,  14208, 1976,  30592, 1984,  3968,  1992,  20352,\n        2000,  12160, 2008,  28544, 2016,  8064,  2024,  24448, 2032,  16256,\n        2040,  32640, 2056,  16448, 2064,  8256,  2072,  24640, 2080,  4160,\n        2088,  20544, 2096,  12352, 2104,  28736, 2120,  18496, 2128,  10304,\n        2136,  26688, 2144,  6208,  2152,  22592, 2160,  14400, 2168,  30784,\n        2184,  17472, 2192,  9280,  2200,  25664, 2208,  5184,  2216,  21568,\n        2224,  13376, 2232,  29760, 2240,  3136,  2248,  19520, 2256,  11328,\n        2264,  27712, 2272,  7232,  2280,  23616, 2288,  15424, 2296,  31808,\n        2312,  16960, 2320,  8768,  2328,  25152, 2336,  4672,  2344,  21056,\n        2352,  12864, 2360,  29248, 2368,  2624,  2376,  19008, 2384,  10816,\n        2392,  27200, 2400,  6720,  2408,  23104, 2416,  14912, 2424,  31296,\n        2440,  17984, 2448,  9792,  2456,  26176, 2464,  5696,  2472,  22080,\n        2480,  13888, 2488,  30272, 2496,  3648,  2504,  20032, 2512,  11840,\n        2520,  28224, 2528,  7744,  2536,  24128, 2544,  15936, 2552,  32320,\n        2568,  16704, 2576,  8512,  2584,  24896, 2592,  4416,  2600,  20800,\n        2608,  12608, 2616,  28992, 2632,  18752, 2640,  10560, 2648,  26944,\n        2656,  6464,  2664,  22848, 2672,  14656, 2680,  31040, 2696,  17728,\n        2704,  9536,  2712,  25920, 2720,  5440,  2728,  21824, 2736,  13632,\n        2744,  30016, 2752,  3392,  2760,  19776, 2768,  11584, 2776,  27968,\n        2784,  7488,  2792,  23872, 2800,  15680, 2808,  32064, 2824,  17216,\n        2832,  9024,  2840,  25408, 2848,  4928,  2856,  21312, 2864,  13120,\n        2872,  29504, 2888,  19264, 2896,  11072, 2904,  27456, 2912,  6976,\n        2920,  23360, 2928,  15168, 2936,  31552, 2952,  18240, 2960,  10048,\n        2968,  26432, 2976,  5952,  2984,  22336, 2992,  14144, 3000,  30528,\n        3008,  3904,  3016,  20288, 3024,  12096, 3032,  28480, 3040,  8000,\n        3048,  24384, 3056,  16192, 3064,  32576, 3080,  16576, 3088,  8384,\n        3096,  24768, 3104,  4288,  3112,  20672, 3120,  12480, 3128,  28864,\n        3144,  18624, 3152,  10432, 3160,  26816, 3168,  6336,  3176,  22720,\n        3184,  14528, 3192,  30912, 3208,  17600, 3216,  9408,  3224,  25792,\n        3232,  5312,  3240,  21696, 3248,  13504, 3256,  29888, 3272,  19648,\n        3280,  11456, 3288,  27840, 3296,  7360,  3304,  23744, 3312,  15552,\n        3320,  31936, 3336,  17088, 3344,  8896,  3352,  25280, 3360,  4800,\n        3368,  21184, 3376,  12992, 3384,  29376, 3400,  19136, 3408,  10944,\n        3416,  27328, 3424,  6848,  3432,  23232, 3440,  15040, 3448,  31424,\n        3464,  18112, 3472,  9920,  3480,  26304, 3488,  5824,  3496,  22208,\n        3504,  14016, 3512,  30400, 3520,  3776,  3528,  20160, 3536,  11968,\n        3544,  28352, 3552,  7872,  3560,  24256, 3568,  16064, 3576,  32448,\n        3592,  16832, 3600,  8640,  3608,  25024, 3616,  4544,  3624,  20928,\n        3632,  12736, 3640,  29120, 3656,  18880, 3664,  10688, 3672,  27072,\n        3680,  6592,  3688,  22976, 3696,  14784, 3704,  31168, 3720,  17856,\n        3728,  9664,  3736,  26048, 3744,  5568,  3752,  21952, 3760,  13760,\n        3768,  30144, 3784,  19904, 3792,  11712, 3800,  28096, 3808,  7616,\n        3816,  24000, 3824,  15808, 3832,  32192, 3848,  17344, 3856,  9152,\n        3864,  25536, 3872,  5056,  3880,  21440, 3888,  13248, 3896,  29632,\n        3912,  19392, 3920,  11200, 3928,  27584, 3936,  7104,  3944,  23488,\n        3952,  15296, 3960,  31680, 3976,  18368, 3984,  10176, 3992,  26560,\n        4000,  6080,  4008,  22464, 4016,  14272, 4024,  30656, 4040,  20416,\n        4048,  12224, 4056,  28608, 4064,  8128,  4072,  24512, 4080,  16320,\n        4088,  32704, 4104,  16416, 4112,  8224,  4120,  24608, 4136,  20512,\n        4144,  12320, 4152,  28704, 4168,  18464, 4176,  10272, 4184,  26656,\n        4192,  6176,  4200,  22560, 4208,  14368, 4216,  30752, 4232,  17440,\n        4240,  9248,  4248,  25632, 4256,  5152,  4264,  21536, 4272,  13344,\n        4280,  29728, 4296,  19488, 4304,  11296, 4312,  27680, 4320,  7200,\n        4328,  23584, 4336,  15392, 4344,  31776, 4360,  16928, 4368,  8736,\n        4376,  25120, 4384,  4640,  4392,  21024, 4400,  12832, 4408,  29216,\n        4424,  18976, 4432,  10784, 4440,  27168, 4448,  6688,  4456,  23072,\n        4464,  14880, 4472,  31264, 4488,  17952, 4496,  9760,  4504,  26144,\n        4512,  5664,  4520,  22048, 4528,  13856, 4536,  30240, 4552,  20000,\n        4560,  11808, 4568,  28192, 4576,  7712,  4584,  24096, 4592,  15904,\n        4600,  32288, 4616,  16672, 4624,  8480,  4632,  24864, 4648,  20768,\n        4656,  12576, 4664,  28960, 4680,  18720, 4688,  10528, 4696,  26912,\n        4704,  6432,  4712,  22816, 4720,  14624, 4728,  31008, 4744,  17696,\n        4752,  9504,  4760,  25888, 4768,  5408,  4776,  21792, 4784,  13600,\n        4792,  29984, 4808,  19744, 4816,  11552, 4824,  27936, 4832,  7456,\n        4840,  23840, 4848,  15648, 4856,  32032, 4872,  17184, 4880,  8992,\n        4888,  25376, 4904,  21280, 4912,  13088, 4920,  29472, 4936,  19232,\n        4944,  11040, 4952,  27424, 4960,  6944,  4968,  23328, 4976,  15136,\n        4984,  31520, 5000,  18208, 5008,  10016, 5016,  26400, 5024,  5920,\n        5032,  22304, 5040,  14112, 5048,  30496, 5064,  20256, 5072,  12064,\n        5080,  28448, 5088,  7968,  5096,  24352, 5104,  16160, 5112,  32544,\n        5128,  16544, 5136,  8352,  5144,  24736, 5160,  20640, 5168,  12448,\n        5176,  28832, 5192,  18592, 5200,  10400, 5208,  26784, 5216,  6304,\n        5224,  22688, 5232,  14496, 5240,  30880, 5256,  17568, 5264,  9376,\n        5272,  25760, 5288,  21664, 5296,  13472, 5304,  29856, 5320,  19616,\n        5328,  11424, 5336,  27808, 5344,  7328,  5352,  23712, 5360,  15520,\n        5368,  31904, 5384,  17056, 5392,  8864,  5400,  25248, 5416,  21152,\n        5424,  12960, 5432,  29344, 5448,  19104, 5456,  10912, 5464,  27296,\n        5472,  6816,  5480,  23200, 5488,  15008, 5496,  31392, 5512,  18080,\n        5520,  9888,  5528,  26272, 5536,  5792,  5544,  22176, 5552,  13984,\n        5560,  30368, 5576,  20128, 5584,  11936, 5592,  28320, 5600,  7840,\n        5608,  24224, 5616,  16032, 5624,  32416, 5640,  16800, 5648,  8608,\n        5656,  24992, 5672,  20896, 5680,  12704, 5688,  29088, 5704,  18848,\n        5712,  10656, 5720,  27040, 5728,  6560,  5736,  22944, 5744,  14752,\n        5752,  31136, 5768,  17824, 5776,  9632,  5784,  26016, 5800,  21920,\n        5808,  13728, 5816,  30112, 5832,  19872, 5840,  11680, 5848,  28064,\n        5856,  7584,  5864,  23968, 5872,  15776, 5880,  32160, 5896,  17312,\n        5904,  9120,  5912,  25504, 5928,  21408, 5936,  13216, 5944,  29600,\n        5960,  19360, 5968,  11168, 5976,  27552, 5984,  7072,  5992,  23456,\n        6000,  15264, 6008,  31648, 6024,  18336, 6032,  10144, 6040,  26528,\n        6056,  22432, 6064,  14240, 6072,  30624, 6088,  20384, 6096,  12192,\n        6104,  28576, 6112,  8096,  6120,  24480, 6128,  16288, 6136,  32672,\n        6152,  16480, 6160,  8288,  6168,  24672, 6184,  20576, 6192,  12384,\n        6200,  28768, 6216,  18528, 6224,  10336, 6232,  26720, 6248,  22624,\n        6256,  14432, 6264,  30816, 6280,  17504, 6288,  9312,  6296,  25696,\n        6312,  21600, 6320,  13408, 6328,  29792, 6344,  19552, 6352,  11360,\n        6360,  27744, 6368,  7264,  6376,  23648, 6384,  15456, 6392,  31840,\n        6408,  16992, 6416,  8800,  6424,  25184, 6440,  21088, 6448,  12896,\n        6456,  29280, 6472,  19040, 6480,  10848, 6488,  27232, 6496,  6752,\n        6504,  23136, 6512,  14944, 6520,  31328, 6536,  18016, 6544,  9824,\n        6552,  26208, 6568,  22112, 6576,  13920, 6584,  30304, 6600,  20064,\n        6608,  11872, 6616,  28256, 6624,  7776,  6632,  24160, 6640,  15968,\n        6648,  32352, 6664,  16736, 6672,  8544,  6680,  24928, 6696,  20832,\n        6704,  12640, 6712,  29024, 6728,  18784, 6736,  10592, 6744,  26976,\n        6760,  22880, 6768,  14688, 6776,  31072, 6792,  17760, 6800,  9568,\n        6808,  25952, 6824,  21856, 6832,  13664, 6840,  30048, 6856,  19808,\n        6864,  11616, 6872,  28000, 6880,  7520,  6888,  23904, 6896,  15712,\n        6904,  32096, 6920,  17248, 6928,  9056,  6936,  25440, 6952,  21344,\n        6960,  13152, 6968,  29536, 6984,  19296, 6992,  11104, 7000,  27488,\n        7016,  23392, 7024,  15200, 7032,  31584, 7048,  18272, 7056,  10080,\n        7064,  26464, 7080,  22368, 7088,  14176, 7096,  30560, 7112,  20320,\n        7120,  12128, 7128,  28512, 7136,  8032,  7144,  24416, 7152,  16224,\n        7160,  32608, 7176,  16608, 7184,  8416,  7192,  24800, 7208,  20704,\n        7216,  12512, 7224,  28896, 7240,  18656, 7248,  10464, 7256,  26848,\n        7272,  22752, 7280,  14560, 7288,  30944, 7304,  17632, 7312,  9440,\n        7320,  25824, 7336,  21728, 7344,  13536, 7352,  29920, 7368,  19680,\n        7376,  11488, 7384,  27872, 7400,  23776, 7408,  15584, 7416,  31968,\n        7432,  17120, 7440,  8928,  7448,  25312, 7464,  21216, 7472,  13024,\n        7480,  29408, 7496,  19168, 7504,  10976, 7512,  27360, 7528,  23264,\n        7536,  15072, 7544,  31456, 7560,  18144, 7568,  9952,  7576,  26336,\n        7592,  22240, 7600,  14048, 7608,  30432, 7624,  20192, 7632,  12000,\n        7640,  28384, 7648,  7904,  7656,  24288, 7664,  16096, 7672,  32480,\n        7688,  16864, 7696,  8672,  7704,  25056, 7720,  20960, 7728,  12768,\n        7736,  29152, 7752,  18912, 7760,  10720, 7768,  27104, 7784,  23008,\n        7792,  14816, 7800,  31200, 7816,  17888, 7824,  9696,  7832,  26080,\n        7848,  21984, 7856,  13792, 7864,  30176, 7880,  19936, 7888,  11744,\n        7896,  28128, 7912,  24032, 7920,  15840, 7928,  32224, 7944,  17376,\n        7952,  9184,  7960,  25568, 7976,  21472, 7984,  13280, 7992,  29664,\n        8008,  19424, 8016,  11232, 8024,  27616, 8040,  23520, 8048,  15328,\n        8056,  31712, 8072,  18400, 8080,  10208, 8088,  26592, 8104,  22496,\n        8112,  14304, 8120,  30688, 8136,  20448, 8144,  12256, 8152,  28640,\n        8168,  24544, 8176,  16352, 8184,  32736, 8200,  16400, 8216,  24592,\n        8232,  20496, 8240,  12304, 8248,  28688, 8264,  18448, 8272,  10256,\n        8280,  26640, 8296,  22544, 8304,  14352, 8312,  30736, 8328,  17424,\n        8336,  9232,  8344,  25616, 8360,  21520, 8368,  13328, 8376,  29712,\n        8392,  19472, 8400,  11280, 8408,  27664, 8424,  23568, 8432,  15376,\n        8440,  31760, 8456,  16912, 8464,  8720,  8472,  25104, 8488,  21008,\n        8496,  12816, 8504,  29200, 8520,  18960, 8528,  10768, 8536,  27152,\n        8552,  23056, 8560,  14864, 8568,  31248, 8584,  17936, 8592,  9744,\n        8600,  26128, 8616,  22032, 8624,  13840, 8632,  30224, 8648,  19984,\n        8656,  11792, 8664,  28176, 8680,  24080, 8688,  15888, 8696,  32272,\n        8712,  16656, 8728,  24848, 8744,  20752, 8752,  12560, 8760,  28944,\n        8776,  18704, 8784,  10512, 8792,  26896, 8808,  22800, 8816,  14608,\n        8824,  30992, 8840,  17680, 8848,  9488,  8856,  25872, 8872,  21776,\n        8880,  13584, 8888,  29968, 8904,  19728, 8912,  11536, 8920,  27920,\n        8936,  23824, 8944,  15632, 8952,  32016, 8968,  17168, 8984,  25360,\n        9000,  21264, 9008,  13072, 9016,  29456, 9032,  19216, 9040,  11024,\n        9048,  27408, 9064,  23312, 9072,  15120, 9080,  31504, 9096,  18192,\n        9104,  10000, 9112,  26384, 9128,  22288, 9136,  14096, 9144,  30480,\n        9160,  20240, 9168,  12048, 9176,  28432, 9192,  24336, 9200,  16144,\n        9208,  32528, 9224,  16528, 9240,  24720, 9256,  20624, 9264,  12432,\n        9272,  28816, 9288,  18576, 9296,  10384, 9304,  26768, 9320,  22672,\n        9328,  14480, 9336,  30864, 9352,  17552, 9368,  25744, 9384,  21648,\n        9392,  13456, 9400,  29840, 9416,  19600, 9424,  11408, 9432,  27792,\n        9448,  23696, 9456,  15504, 9464,  31888, 9480,  17040, 9496,  25232,\n        9512,  21136, 9520,  12944, 9528,  29328, 9544,  19088, 9552,  10896,\n        9560,  27280, 9576,  23184, 9584,  14992, 9592,  31376, 9608,  18064,\n        9616,  9872,  9624,  26256, 9640,  22160, 9648,  13968, 9656,  30352,\n        9672,  20112, 9680,  11920, 9688,  28304, 9704,  24208, 9712,  16016,\n        9720,  32400, 9736,  16784, 9752,  24976, 9768,  20880, 9776,  12688,\n        9784,  29072, 9800,  18832, 9808,  10640, 9816,  27024, 9832,  22928,\n        9840,  14736, 9848,  31120, 9864,  17808, 9880,  26000, 9896,  21904,\n        9904,  13712, 9912,  30096, 9928,  19856, 9936,  11664, 9944,  28048,\n        9960,  23952, 9968,  15760, 9976,  32144, 9992,  17296, 10008, 25488,\n        10024, 21392, 10032, 13200, 10040, 29584, 10056, 19344, 10064, 11152,\n        10072, 27536, 10088, 23440, 10096, 15248, 10104, 31632, 10120, 18320,\n        10136, 26512, 10152, 22416, 10160, 14224, 10168, 30608, 10184, 20368,\n        10192, 12176, 10200, 28560, 10216, 24464, 10224, 16272, 10232, 32656,\n        10248, 16464, 10264, 24656, 10280, 20560, 10288, 12368, 10296, 28752,\n        10312, 18512, 10328, 26704, 10344, 22608, 10352, 14416, 10360, 30800,\n        10376, 17488, 10392, 25680, 10408, 21584, 10416, 13392, 10424, 29776,\n        10440, 19536, 10448, 11344, 10456, 27728, 10472, 23632, 10480, 15440,\n        10488, 31824, 10504, 16976, 10520, 25168, 10536, 21072, 10544, 12880,\n        10552, 29264, 10568, 19024, 10576, 10832, 10584, 27216, 10600, 23120,\n        10608, 14928, 10616, 31312, 10632, 18000, 10648, 26192, 10664, 22096,\n        10672, 13904, 10680, 30288, 10696, 20048, 10704, 11856, 10712, 28240,\n        10728, 24144, 10736, 15952, 10744, 32336, 10760, 16720, 10776, 24912,\n        10792, 20816, 10800, 12624, 10808, 29008, 10824, 18768, 10840, 26960,\n        10856, 22864, 10864, 14672, 10872, 31056, 10888, 17744, 10904, 25936,\n        10920, 21840, 10928, 13648, 10936, 30032, 10952, 19792, 10960, 11600,\n        10968, 27984, 10984, 23888, 10992, 15696, 11000, 32080, 11016, 17232,\n        11032, 25424, 11048, 21328, 11056, 13136, 11064, 29520, 11080, 19280,\n        11096, 27472, 11112, 23376, 11120, 15184, 11128, 31568, 11144, 18256,\n        11160, 26448, 11176, 22352, 11184, 14160, 11192, 30544, 11208, 20304,\n        11216, 12112, 11224, 28496, 11240, 24400, 11248, 16208, 11256, 32592,\n        11272, 16592, 11288, 24784, 11304, 20688, 11312, 12496, 11320, 28880,\n        11336, 18640, 11352, 26832, 11368, 22736, 11376, 14544, 11384, 30928,\n        11400, 17616, 11416, 25808, 11432, 21712, 11440, 13520, 11448, 29904,\n        11464, 19664, 11480, 27856, 11496, 23760, 11504, 15568, 11512, 31952,\n        11528, 17104, 11544, 25296, 11560, 21200, 11568, 13008, 11576, 29392,\n        11592, 19152, 11608, 27344, 11624, 23248, 11632, 15056, 11640, 31440,\n        11656, 18128, 11672, 26320, 11688, 22224, 11696, 14032, 11704, 30416,\n        11720, 20176, 11728, 11984, 11736, 28368, 11752, 24272, 11760, 16080,\n        11768, 32464, 11784, 16848, 11800, 25040, 11816, 20944, 11824, 12752,\n        11832, 29136, 11848, 18896, 11864, 27088, 11880, 22992, 11888, 14800,\n        11896, 31184, 11912, 17872, 11928, 26064, 11944, 21968, 11952, 13776,\n        11960, 30160, 11976, 19920, 11992, 28112, 12008, 24016, 12016, 15824,\n        12024, 32208, 12040, 17360, 12056, 25552, 12072, 21456, 12080, 13264,\n        12088, 29648, 12104, 19408, 12120, 27600, 12136, 23504, 12144, 15312,\n        12152, 31696, 12168, 18384, 12184, 26576, 12200, 22480, 12208, 14288,\n        12216, 30672, 12232, 20432, 12248, 28624, 12264, 24528, 12272, 16336,\n        12280, 32720, 12296, 16432, 12312, 24624, 12328, 20528, 12344, 28720,\n        12360, 18480, 12376, 26672, 12392, 22576, 12400, 14384, 12408, 30768,\n        12424, 17456, 12440, 25648, 12456, 21552, 12464, 13360, 12472, 29744,\n        12488, 19504, 12504, 27696, 12520, 23600, 12528, 15408, 12536, 31792,\n        12552, 16944, 12568, 25136, 12584, 21040, 12592, 12848, 12600, 29232,\n        12616, 18992, 12632, 27184, 12648, 23088, 12656, 14896, 12664, 31280,\n        12680, 17968, 12696, 26160, 12712, 22064, 12720, 13872, 12728, 30256,\n        12744, 20016, 12760, 28208, 12776, 24112, 12784, 15920, 12792, 32304,\n        12808, 16688, 12824, 24880, 12840, 20784, 12856, 28976, 12872, 18736,\n        12888, 26928, 12904, 22832, 12912, 14640, 12920, 31024, 12936, 17712,\n        12952, 25904, 12968, 21808, 12976, 13616, 12984, 30000, 13000, 19760,\n        13016, 27952, 13032, 23856, 13040, 15664, 13048, 32048, 13064, 17200,\n        13080, 25392, 13096, 21296, 13112, 29488, 13128, 19248, 13144, 27440,\n        13160, 23344, 13168, 15152, 13176, 31536, 13192, 18224, 13208, 26416,\n        13224, 22320, 13232, 14128, 13240, 30512, 13256, 20272, 13272, 28464,\n        13288, 24368, 13296, 16176, 13304, 32560, 13320, 16560, 13336, 24752,\n        13352, 20656, 13368, 28848, 13384, 18608, 13400, 26800, 13416, 22704,\n        13424, 14512, 13432, 30896, 13448, 17584, 13464, 25776, 13480, 21680,\n        13496, 29872, 13512, 19632, 13528, 27824, 13544, 23728, 13552, 15536,\n        13560, 31920, 13576, 17072, 13592, 25264, 13608, 21168, 13624, 29360,\n        13640, 19120, 13656, 27312, 13672, 23216, 13680, 15024, 13688, 31408,\n        13704, 18096, 13720, 26288, 13736, 22192, 13744, 14000, 13752, 30384,\n        13768, 20144, 13784, 28336, 13800, 24240, 13808, 16048, 13816, 32432,\n        13832, 16816, 13848, 25008, 13864, 20912, 13880, 29104, 13896, 18864,\n        13912, 27056, 13928, 22960, 13936, 14768, 13944, 31152, 13960, 17840,\n        13976, 26032, 13992, 21936, 14008, 30128, 14024, 19888, 14040, 28080,\n        14056, 23984, 14064, 15792, 14072, 32176, 14088, 17328, 14104, 25520,\n        14120, 21424, 14136, 29616, 14152, 19376, 14168, 27568, 14184, 23472,\n        14192, 15280, 14200, 31664, 14216, 18352, 14232, 26544, 14248, 22448,\n        14264, 30640, 14280, 20400, 14296, 28592, 14312, 24496, 14320, 16304,\n        14328, 32688, 14344, 16496, 14360, 24688, 14376, 20592, 14392, 28784,\n        14408, 18544, 14424, 26736, 14440, 22640, 14456, 30832, 14472, 17520,\n        14488, 25712, 14504, 21616, 14520, 29808, 14536, 19568, 14552, 27760,\n        14568, 23664, 14576, 15472, 14584, 31856, 14600, 17008, 14616, 25200,\n        14632, 21104, 14648, 29296, 14664, 19056, 14680, 27248, 14696, 23152,\n        14704, 14960, 14712, 31344, 14728, 18032, 14744, 26224, 14760, 22128,\n        14776, 30320, 14792, 20080, 14808, 28272, 14824, 24176, 14832, 15984,\n        14840, 32368, 14856, 16752, 14872, 24944, 14888, 20848, 14904, 29040,\n        14920, 18800, 14936, 26992, 14952, 22896, 14968, 31088, 14984, 17776,\n        15000, 25968, 15016, 21872, 15032, 30064, 15048, 19824, 15064, 28016,\n        15080, 23920, 15088, 15728, 15096, 32112, 15112, 17264, 15128, 25456,\n        15144, 21360, 15160, 29552, 15176, 19312, 15192, 27504, 15208, 23408,\n        15224, 31600, 15240, 18288, 15256, 26480, 15272, 22384, 15288, 30576,\n        15304, 20336, 15320, 28528, 15336, 24432, 15344, 16240, 15352, 32624,\n        15368, 16624, 15384, 24816, 15400, 20720, 15416, 28912, 15432, 18672,\n        15448, 26864, 15464, 22768, 15480, 30960, 15496, 17648, 15512, 25840,\n        15528, 21744, 15544, 29936, 15560, 19696, 15576, 27888, 15592, 23792,\n        15608, 31984, 15624, 17136, 15640, 25328, 15656, 21232, 15672, 29424,\n        15688, 19184, 15704, 27376, 15720, 23280, 15736, 31472, 15752, 18160,\n        15768, 26352, 15784, 22256, 15800, 30448, 15816, 20208, 15832, 28400,\n        15848, 24304, 15856, 16112, 15864, 32496, 15880, 16880, 15896, 25072,\n        15912, 20976, 15928, 29168, 15944, 18928, 15960, 27120, 15976, 23024,\n        15992, 31216, 16008, 17904, 16024, 26096, 16040, 22000, 16056, 30192,\n        16072, 19952, 16088, 28144, 16104, 24048, 16120, 32240, 16136, 17392,\n        16152, 25584, 16168, 21488, 16184, 29680, 16200, 19440, 16216, 27632,\n        16232, 23536, 16248, 31728, 16264, 18416, 16280, 26608, 16296, 22512,\n        16312, 30704, 16328, 20464, 16344, 28656, 16360, 24560, 16376, 32752,\n        16408, 24584, 16424, 20488, 16440, 28680, 16456, 18440, 16472, 26632,\n        16488, 22536, 16504, 30728, 16520, 17416, 16536, 25608, 16552, 21512,\n        16568, 29704, 16584, 19464, 16600, 27656, 16616, 23560, 16632, 31752,\n        16648, 16904, 16664, 25096, 16680, 21000, 16696, 29192, 16712, 18952,\n        16728, 27144, 16744, 23048, 16760, 31240, 16776, 17928, 16792, 26120,\n        16808, 22024, 16824, 30216, 16840, 19976, 16856, 28168, 16872, 24072,\n        16888, 32264, 16920, 24840, 16936, 20744, 16952, 28936, 16968, 18696,\n        16984, 26888, 17000, 22792, 17016, 30984, 17032, 17672, 17048, 25864,\n        17064, 21768, 17080, 29960, 17096, 19720, 17112, 27912, 17128, 23816,\n        17144, 32008, 17176, 25352, 17192, 21256, 17208, 29448, 17224, 19208,\n        17240, 27400, 17256, 23304, 17272, 31496, 17288, 18184, 17304, 26376,\n        17320, 22280, 17336, 30472, 17352, 20232, 17368, 28424, 17384, 24328,\n        17400, 32520, 17432, 24712, 17448, 20616, 17464, 28808, 17480, 18568,\n        17496, 26760, 17512, 22664, 17528, 30856, 17560, 25736, 17576, 21640,\n        17592, 29832, 17608, 19592, 17624, 27784, 17640, 23688, 17656, 31880,\n        17688, 25224, 17704, 21128, 17720, 29320, 17736, 19080, 17752, 27272,\n        17768, 23176, 17784, 31368, 17800, 18056, 17816, 26248, 17832, 22152,\n        17848, 30344, 17864, 20104, 17880, 28296, 17896, 24200, 17912, 32392,\n        17944, 24968, 17960, 20872, 17976, 29064, 17992, 18824, 18008, 27016,\n        18024, 22920, 18040, 31112, 18072, 25992, 18088, 21896, 18104, 30088,\n        18120, 19848, 18136, 28040, 18152, 23944, 18168, 32136, 18200, 25480,\n        18216, 21384, 18232, 29576, 18248, 19336, 18264, 27528, 18280, 23432,\n        18296, 31624, 18328, 26504, 18344, 22408, 18360, 30600, 18376, 20360,\n        18392, 28552, 18408, 24456, 18424, 32648, 18456, 24648, 18472, 20552,\n        18488, 28744, 18520, 26696, 18536, 22600, 18552, 30792, 18584, 25672,\n        18600, 21576, 18616, 29768, 18632, 19528, 18648, 27720, 18664, 23624,\n        18680, 31816, 18712, 25160, 18728, 21064, 18744, 29256, 18760, 19016,\n        18776, 27208, 18792, 23112, 18808, 31304, 18840, 26184, 18856, 22088,\n        18872, 30280, 18888, 20040, 18904, 28232, 18920, 24136, 18936, 32328,\n        18968, 24904, 18984, 20808, 19000, 29000, 19032, 26952, 19048, 22856,\n        19064, 31048, 19096, 25928, 19112, 21832, 19128, 30024, 19144, 19784,\n        19160, 27976, 19176, 23880, 19192, 32072, 19224, 25416, 19240, 21320,\n        19256, 29512, 19288, 27464, 19304, 23368, 19320, 31560, 19352, 26440,\n        19368, 22344, 19384, 30536, 19400, 20296, 19416, 28488, 19432, 24392,\n        19448, 32584, 19480, 24776, 19496, 20680, 19512, 28872, 19544, 26824,\n        19560, 22728, 19576, 30920, 19608, 25800, 19624, 21704, 19640, 29896,\n        19672, 27848, 19688, 23752, 19704, 31944, 19736, 25288, 19752, 21192,\n        19768, 29384, 19800, 27336, 19816, 23240, 19832, 31432, 19864, 26312,\n        19880, 22216, 19896, 30408, 19912, 20168, 19928, 28360, 19944, 24264,\n        19960, 32456, 19992, 25032, 20008, 20936, 20024, 29128, 20056, 27080,\n        20072, 22984, 20088, 31176, 20120, 26056, 20136, 21960, 20152, 30152,\n        20184, 28104, 20200, 24008, 20216, 32200, 20248, 25544, 20264, 21448,\n        20280, 29640, 20312, 27592, 20328, 23496, 20344, 31688, 20376, 26568,\n        20392, 22472, 20408, 30664, 20440, 28616, 20456, 24520, 20472, 32712,\n        20504, 24616, 20536, 28712, 20568, 26664, 20584, 22568, 20600, 30760,\n        20632, 25640, 20648, 21544, 20664, 29736, 20696, 27688, 20712, 23592,\n        20728, 31784, 20760, 25128, 20776, 21032, 20792, 29224, 20824, 27176,\n        20840, 23080, 20856, 31272, 20888, 26152, 20904, 22056, 20920, 30248,\n        20952, 28200, 20968, 24104, 20984, 32296, 21016, 24872, 21048, 28968,\n        21080, 26920, 21096, 22824, 21112, 31016, 21144, 25896, 21160, 21800,\n        21176, 29992, 21208, 27944, 21224, 23848, 21240, 32040, 21272, 25384,\n        21304, 29480, 21336, 27432, 21352, 23336, 21368, 31528, 21400, 26408,\n        21416, 22312, 21432, 30504, 21464, 28456, 21480, 24360, 21496, 32552,\n        21528, 24744, 21560, 28840, 21592, 26792, 21608, 22696, 21624, 30888,\n        21656, 25768, 21688, 29864, 21720, 27816, 21736, 23720, 21752, 31912,\n        21784, 25256, 21816, 29352, 21848, 27304, 21864, 23208, 21880, 31400,\n        21912, 26280, 21928, 22184, 21944, 30376, 21976, 28328, 21992, 24232,\n        22008, 32424, 22040, 25000, 22072, 29096, 22104, 27048, 22120, 22952,\n        22136, 31144, 22168, 26024, 22200, 30120, 22232, 28072, 22248, 23976,\n        22264, 32168, 22296, 25512, 22328, 29608, 22360, 27560, 22376, 23464,\n        22392, 31656, 22424, 26536, 22456, 30632, 22488, 28584, 22504, 24488,\n        22520, 32680, 22552, 24680, 22584, 28776, 22616, 26728, 22648, 30824,\n        22680, 25704, 22712, 29800, 22744, 27752, 22760, 23656, 22776, 31848,\n        22808, 25192, 22840, 29288, 22872, 27240, 22888, 23144, 22904, 31336,\n        22936, 26216, 22968, 30312, 23000, 28264, 23016, 24168, 23032, 32360,\n        23064, 24936, 23096, 29032, 23128, 26984, 23160, 31080, 23192, 25960,\n        23224, 30056, 23256, 28008, 23272, 23912, 23288, 32104, 23320, 25448,\n        23352, 29544, 23384, 27496, 23416, 31592, 23448, 26472, 23480, 30568,\n        23512, 28520, 23528, 24424, 23544, 32616, 23576, 24808, 23608, 28904,\n        23640, 26856, 23672, 30952, 23704, 25832, 23736, 29928, 23768, 27880,\n        23800, 31976, 23832, 25320, 23864, 29416, 23896, 27368, 23928, 31464,\n        23960, 26344, 23992, 30440, 24024, 28392, 24040, 24296, 24056, 32488,\n        24088, 25064, 24120, 29160, 24152, 27112, 24184, 31208, 24216, 26088,\n        24248, 30184, 24280, 28136, 24312, 32232, 24344, 25576, 24376, 29672,\n        24408, 27624, 24440, 31720, 24472, 26600, 24504, 30696, 24536, 28648,\n        24568, 32744, 24632, 28696, 24664, 26648, 24696, 30744, 24728, 25624,\n        24760, 29720, 24792, 27672, 24824, 31768, 24856, 25112, 24888, 29208,\n        24920, 27160, 24952, 31256, 24984, 26136, 25016, 30232, 25048, 28184,\n        25080, 32280, 25144, 28952, 25176, 26904, 25208, 31000, 25240, 25880,\n        25272, 29976, 25304, 27928, 25336, 32024, 25400, 29464, 25432, 27416,\n        25464, 31512, 25496, 26392, 25528, 30488, 25560, 28440, 25592, 32536,\n        25656, 28824, 25688, 26776, 25720, 30872, 25784, 29848, 25816, 27800,\n        25848, 31896, 25912, 29336, 25944, 27288, 25976, 31384, 26008, 26264,\n        26040, 30360, 26072, 28312, 26104, 32408, 26168, 29080, 26200, 27032,\n        26232, 31128, 26296, 30104, 26328, 28056, 26360, 32152, 26424, 29592,\n        26456, 27544, 26488, 31640, 26552, 30616, 26584, 28568, 26616, 32664,\n        26680, 28760, 26744, 30808, 26808, 29784, 26840, 27736, 26872, 31832,\n        26936, 29272, 26968, 27224, 27000, 31320, 27064, 30296, 27096, 28248,\n        27128, 32344, 27192, 29016, 27256, 31064, 27320, 30040, 27352, 27992,\n        27384, 32088, 27448, 29528, 27512, 31576, 27576, 30552, 27608, 28504,\n        27640, 32600, 27704, 28888, 27768, 30936, 27832, 29912, 27896, 31960,\n        27960, 29400, 28024, 31448, 28088, 30424, 28120, 28376, 28152, 32472,\n        28216, 29144, 28280, 31192, 28344, 30168, 28408, 32216, 28472, 29656,\n        28536, 31704, 28600, 30680, 28664, 32728, 28792, 30776, 28856, 29752,\n        28920, 31800, 28984, 29240, 29048, 31288, 29112, 30264, 29176, 32312,\n        29304, 31032, 29368, 30008, 29432, 32056, 29560, 31544, 29624, 30520,\n        29688, 32568, 29816, 30904, 29944, 31928, 30072, 31416, 30136, 30392,\n        30200, 32440, 30328, 31160, 30456, 32184, 30584, 31672, 30712, 32696,\n        30968, 31864, 31096, 31352, 31224, 32376, 31480, 32120, 31736, 32632,\n        32248, 32504};\n\n/**\n  @par\n  Example code for Floating-point RFFT Twiddle factors Generation:\n  @par\n  
TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).' 
\n  @par\n  Real and Imag values are in interleaved fashion\n*/\nconst float32_t twiddleCoef_rfft_32[32] = {\n    0.000000000f,  1.000000000f,  0.195090322f,  0.980785280f,  0.382683432f,\n    0.923879533f,  0.555570233f,  0.831469612f,  0.707106781f,  0.707106781f,\n    0.831469612f,  0.555570233f,  0.923879533f,  0.382683432f,  0.980785280f,\n    0.195090322f,  1.000000000f,  0.000000000f,  0.980785280f,  -0.195090322f,\n    0.923879533f,  -0.382683432f, 0.831469612f,  -0.555570233f, 0.707106781f,\n    -0.707106781f, 0.555570233f,  -0.831469612f, 0.382683432f,  -0.923879533f,\n    0.195090322f,  -0.980785280f};\n\nconst float32_t twiddleCoef_rfft_64[64] = {\n    0.000000000000000f,  1.000000000000000f,  0.098017140329561f,\n    0.995184726672197f,  0.195090322016128f,  0.980785280403230f,\n    0.290284677254462f,  0.956940335732209f,  0.382683432365090f,\n    0.923879532511287f,  0.471396736825998f,  0.881921264348355f,\n    0.555570233019602f,  0.831469612302545f,  0.634393284163645f,\n    0.773010453362737f,  0.707106781186547f,  0.707106781186548f,\n    0.773010453362737f,  0.634393284163645f,  0.831469612302545f,\n    0.555570233019602f,  0.881921264348355f,  0.471396736825998f,\n    0.923879532511287f,  0.382683432365090f,  0.956940335732209f,\n    0.290284677254462f,  0.980785280403230f,  0.195090322016128f,\n    0.995184726672197f,  0.098017140329561f,  1.000000000000000f,\n    0.000000000000000f,  0.995184726672197f,  -0.098017140329561f,\n    0.980785280403230f,  -0.195090322016128f, 0.956940335732209f,\n    -0.290284677254462f, 0.923879532511287f,  -0.382683432365090f,\n    0.881921264348355f,  -0.471396736825998f, 0.831469612302545f,\n    -0.555570233019602f, 0.773010453362737f,  -0.634393284163645f,\n    0.707106781186548f,  -0.707106781186547f, 0.634393284163645f,\n    -0.773010453362737f, 0.555570233019602f,  -0.831469612302545f,\n    0.471396736825998f,  -0.881921264348355f, 0.382683432365090f,\n    -0.923879532511287f, 0.290284677254462f,  -0.956940335732209f,\n    0.195090322016129f,  -0.980785280403230f, 0.098017140329561f,\n    -0.995184726672197f};\n\nconst float32_t twiddleCoef_rfft_128[128] = {\n    0.000000000f,  1.000000000f,  0.049067674f,  0.998795456f,  0.098017140f,\n    0.995184727f,  0.146730474f,  0.989176510f,  0.195090322f,  0.980785280f,\n    0.242980180f,  0.970031253f,  0.290284677f,  0.956940336f,  0.336889853f,\n    0.941544065f,  0.382683432f,  0.923879533f,  0.427555093f,  0.903989293f,\n    0.471396737f,  0.881921264f,  0.514102744f,  0.857728610f,  0.555570233f,\n    0.831469612f,  0.595699304f,  0.803207531f,  0.634393284f,  0.773010453f,\n    0.671558955f,  0.740951125f,  0.707106781f,  0.707106781f,  0.740951125f,\n    0.671558955f,  0.773010453f,  0.634393284f,  0.803207531f,  0.595699304f,\n    0.831469612f,  0.555570233f,  0.857728610f,  0.514102744f,  0.881921264f,\n    0.471396737f,  0.903989293f,  0.427555093f,  0.923879533f,  0.382683432f,\n    0.941544065f,  0.336889853f,  0.956940336f,  0.290284677f,  0.970031253f,\n    0.242980180f,  0.980785280f,  0.195090322f,  0.989176510f,  0.146730474f,\n    0.995184727f,  0.098017140f,  0.998795456f,  0.049067674f,  1.000000000f,\n    0.000000000f,  0.998795456f,  -0.049067674f, 0.995184727f,  -0.098017140f,\n    0.989176510f,  -0.146730474f, 0.980785280f,  -0.195090322f, 0.970031253f,\n    -0.242980180f, 0.956940336f,  -0.290284677f, 0.941544065f,  -0.336889853f,\n    0.923879533f,  -0.382683432f, 0.903989293f,  -0.427555093f, 0.881921264f,\n    -0.471396737f, 0.857728610f,  -0.514102744f, 0.831469612f,  -0.555570233f,\n    0.803207531f,  -0.595699304f, 0.773010453f,  -0.634393284f, 0.740951125f,\n    -0.671558955f, 0.707106781f,  -0.707106781f, 0.671558955f,  -0.740951125f,\n    0.634393284f,  -0.773010453f, 0.595699304f,  -0.803207531f, 0.555570233f,\n    -0.831469612f, 0.514102744f,  -0.857728610f, 0.471396737f,  -0.881921264f,\n    0.427555093f,  -0.903989293f, 0.382683432f,  -0.923879533f, 0.336889853f,\n    -0.941544065f, 0.290284677f,  -0.956940336f, 0.242980180f,  -0.970031253f,\n    0.195090322f,  -0.980785280f, 0.146730474f,  -0.989176510f, 0.098017140f,\n    -0.995184727f, 0.049067674f,  -0.998795456f};\n\nconst float32_t twiddleCoef_rfft_256[256] = {\n    0.000000000f,  1.000000000f,  0.024541229f,  0.999698819f,  0.049067674f,\n    0.998795456f,  0.073564564f,  0.997290457f,  0.098017140f,  0.995184727f,\n    0.122410675f,  0.992479535f,  0.146730474f,  0.989176510f,  0.170961889f,\n    0.985277642f,  0.195090322f,  0.980785280f,  0.219101240f,  0.975702130f,\n    0.242980180f,  0.970031253f,  0.266712757f,  0.963776066f,  0.290284677f,\n    0.956940336f,  0.313681740f,  0.949528181f,  0.336889853f,  0.941544065f,\n    0.359895037f,  0.932992799f,  0.382683432f,  0.923879533f,  0.405241314f,\n    0.914209756f,  0.427555093f,  0.903989293f,  0.449611330f,  0.893224301f,\n    0.471396737f,  0.881921264f,  0.492898192f,  0.870086991f,  0.514102744f,\n    0.857728610f,  0.534997620f,  0.844853565f,  0.555570233f,  0.831469612f,\n    0.575808191f,  0.817584813f,  0.595699304f,  0.803207531f,  0.615231591f,\n    0.788346428f,  0.634393284f,  0.773010453f,  0.653172843f,  0.757208847f,\n    0.671558955f,  0.740951125f,  0.689540545f,  0.724247083f,  0.707106781f,\n    0.707106781f,  0.724247083f,  0.689540545f,  0.740951125f,  0.671558955f,\n    0.757208847f,  0.653172843f,  0.773010453f,  0.634393284f,  0.788346428f,\n    0.615231591f,  0.803207531f,  0.595699304f,  0.817584813f,  0.575808191f,\n    0.831469612f,  0.555570233f,  0.844853565f,  0.534997620f,  0.857728610f,\n    0.514102744f,  0.870086991f,  0.492898192f,  0.881921264f,  0.471396737f,\n    0.893224301f,  0.449611330f,  0.903989293f,  0.427555093f,  0.914209756f,\n    0.405241314f,  0.923879533f,  0.382683432f,  0.932992799f,  0.359895037f,\n    0.941544065f,  0.336889853f,  0.949528181f,  0.313681740f,  0.956940336f,\n    0.290284677f,  0.963776066f,  0.266712757f,  0.970031253f,  0.242980180f,\n    0.975702130f,  0.219101240f,  0.980785280f,  0.195090322f,  0.985277642f,\n    0.170961889f,  0.989176510f,  0.146730474f,  0.992479535f,  0.122410675f,\n    0.995184727f,  0.098017140f,  0.997290457f,  0.073564564f,  0.998795456f,\n    0.049067674f,  0.999698819f,  0.024541229f,  1.000000000f,  0.000000000f,\n    0.999698819f,  -0.024541229f, 0.998795456f,  -0.049067674f, 0.997290457f,\n    -0.073564564f, 0.995184727f,  -0.098017140f, 0.992479535f,  -0.122410675f,\n    0.989176510f,  -0.146730474f, 0.985277642f,  -0.170961889f, 0.980785280f,\n    -0.195090322f, 0.975702130f,  -0.219101240f, 0.970031253f,  -0.242980180f,\n    0.963776066f,  -0.266712757f, 0.956940336f,  -0.290284677f, 0.949528181f,\n    -0.313681740f, 0.941544065f,  -0.336889853f, 0.932992799f,  -0.359895037f,\n    0.923879533f,  -0.382683432f, 0.914209756f,  -0.405241314f, 0.903989293f,\n    -0.427555093f, 0.893224301f,  -0.449611330f, 0.881921264f,  -0.471396737f,\n    0.870086991f,  -0.492898192f, 0.857728610f,  -0.514102744f, 0.844853565f,\n    -0.534997620f, 0.831469612f,  -0.555570233f, 0.817584813f,  -0.575808191f,\n    0.803207531f,  -0.595699304f, 0.788346428f,  -0.615231591f, 0.773010453f,\n    -0.634393284f, 0.757208847f,  -0.653172843f, 0.740951125f,  -0.671558955f,\n    0.724247083f,  -0.689540545f, 0.707106781f,  -0.707106781f, 0.689540545f,\n    -0.724247083f, 0.671558955f,  -0.740951125f, 0.653172843f,  -0.757208847f,\n    0.634393284f,  -0.773010453f, 0.615231591f,  -0.788346428f, 0.595699304f,\n    -0.803207531f, 0.575808191f,  -0.817584813f, 0.555570233f,  -0.831469612f,\n    0.534997620f,  -0.844853565f, 0.514102744f,  -0.857728610f, 0.492898192f,\n    -0.870086991f, 0.471396737f,  -0.881921264f, 0.449611330f,  -0.893224301f,\n    0.427555093f,  -0.903989293f, 0.405241314f,  -0.914209756f, 0.382683432f,\n    -0.923879533f, 0.359895037f,  -0.932992799f, 0.336889853f,  -0.941544065f,\n    0.313681740f,  -0.949528181f, 0.290284677f,  -0.956940336f, 0.266712757f,\n    -0.963776066f, 0.242980180f,  -0.970031253f, 0.219101240f,  -0.975702130f,\n    0.195090322f,  -0.980785280f, 0.170961889f,  -0.985277642f, 0.146730474f,\n    -0.989176510f, 0.122410675f,  -0.992479535f, 0.098017140f,  -0.995184727f,\n    0.073564564f,  -0.997290457f, 0.049067674f,  -0.998795456f, 0.024541229f,\n    -0.999698819f};\n\nconst float32_t twiddleCoef_rfft_512[512] = {\n    0.000000000f,  1.000000000f,  0.012271538f,  0.999924702f,  0.024541229f,\n    0.999698819f,  0.036807223f,  0.999322385f,  0.049067674f,  0.998795456f,\n    0.061320736f,  0.998118113f,  0.073564564f,  0.997290457f,  0.085797312f,\n    0.996312612f,  0.098017140f,  0.995184727f,  0.110222207f,  0.993906970f,\n    0.122410675f,  0.992479535f,  0.134580709f,  0.990902635f,  0.146730474f,\n    0.989176510f,  0.158858143f,  0.987301418f,  0.170961889f,  0.985277642f,\n    0.183039888f,  0.983105487f,  0.195090322f,  0.980785280f,  0.207111376f,\n    0.978317371f,  0.219101240f,  0.975702130f,  0.231058108f,  0.972939952f,\n    0.242980180f,  0.970031253f,  0.254865660f,  0.966976471f,  0.266712757f,\n    0.963776066f,  0.278519689f,  0.960430519f,  0.290284677f,  0.956940336f,\n    0.302005949f,  0.953306040f,  0.313681740f,  0.949528181f,  0.325310292f,\n    0.945607325f,  0.336889853f,  0.941544065f,  0.348418680f,  0.937339012f,\n    0.359895037f,  0.932992799f,  0.371317194f,  0.928506080f,  0.382683432f,\n    0.923879533f,  0.393992040f,  0.919113852f,  0.405241314f,  0.914209756f,\n    0.416429560f,  0.909167983f,  0.427555093f,  0.903989293f,  0.438616239f,\n    0.898674466f,  0.449611330f,  0.893224301f,  0.460538711f,  0.887639620f,\n    0.471396737f,  0.881921264f,  0.482183772f,  0.876070094f,  0.492898192f,\n    0.870086991f,  0.503538384f,  0.863972856f,  0.514102744f,  0.857728610f,\n    0.524589683f,  0.851355193f,  0.534997620f,  0.844853565f,  0.545324988f,\n    0.838224706f,  0.555570233f,  0.831469612f,  0.565731811f,  0.824589303f,\n    0.575808191f,  0.817584813f,  0.585797857f,  0.810457198f,  0.595699304f,\n    0.803207531f,  0.605511041f,  0.795836905f,  0.615231591f,  0.788346428f,\n    0.624859488f,  0.780737229f,  0.634393284f,  0.773010453f,  0.643831543f,\n    0.765167266f,  0.653172843f,  0.757208847f,  0.662415778f,  0.749136395f,\n    0.671558955f,  0.740951125f,  0.680600998f,  0.732654272f,  0.689540545f,\n    0.724247083f,  0.698376249f,  0.715730825f,  0.707106781f,  0.707106781f,\n    0.715730825f,  0.698376249f,  0.724247083f,  0.689540545f,  0.732654272f,\n    0.680600998f,  0.740951125f,  0.671558955f,  0.749136395f,  0.662415778f,\n    0.757208847f,  0.653172843f,  0.765167266f,  0.643831543f,  0.773010453f,\n    0.634393284f,  0.780737229f,  0.624859488f,  0.788346428f,  0.615231591f,\n    0.795836905f,  0.605511041f,  0.803207531f,  0.595699304f,  0.810457198f,\n    0.585797857f,  0.817584813f,  0.575808191f,  0.824589303f,  0.565731811f,\n    0.831469612f,  0.555570233f,  0.838224706f,  0.545324988f,  0.844853565f,\n    0.534997620f,  0.851355193f,  0.524589683f,  0.857728610f,  0.514102744f,\n    0.863972856f,  0.503538384f,  0.870086991f,  0.492898192f,  0.876070094f,\n    0.482183772f,  0.881921264f,  0.471396737f,  0.887639620f,  0.460538711f,\n    0.893224301f,  0.449611330f,  0.898674466f,  0.438616239f,  0.903989293f,\n    0.427555093f,  0.909167983f,  0.416429560f,  0.914209756f,  0.405241314f,\n    0.919113852f,  0.393992040f,  0.923879533f,  0.382683432f,  0.928506080f,\n    0.371317194f,  0.932992799f,  0.359895037f,  0.937339012f,  0.348418680f,\n    0.941544065f,  0.336889853f,  0.945607325f,  0.325310292f,  0.949528181f,\n    0.313681740f,  0.953306040f,  0.302005949f,  0.956940336f,  0.290284677f,\n    0.960430519f,  0.278519689f,  0.963776066f,  0.266712757f,  0.966976471f,\n    0.254865660f,  0.970031253f,  0.242980180f,  0.972939952f,  0.231058108f,\n    0.975702130f,  0.219101240f,  0.978317371f,  0.207111376f,  0.980785280f,\n    0.195090322f,  0.983105487f,  0.183039888f,  0.985277642f,  0.170961889f,\n    0.987301418f,  0.158858143f,  0.989176510f,  0.146730474f,  0.990902635f,\n    0.134580709f,  0.992479535f,  0.122410675f,  0.993906970f,  0.110222207f,\n    0.995184727f,  0.098017140f,  0.996312612f,  0.085797312f,  0.997290457f,\n    0.073564564f,  0.998118113f,  0.061320736f,  0.998795456f,  0.049067674f,\n    0.999322385f,  0.036807223f,  0.999698819f,  0.024541229f,  0.999924702f,\n    0.012271538f,  1.000000000f,  0.000000000f,  0.999924702f,  -0.012271538f,\n    0.999698819f,  -0.024541229f, 0.999322385f,  -0.036807223f, 0.998795456f,\n    -0.049067674f, 0.998118113f,  -0.061320736f, 0.997290457f,  -0.073564564f,\n    0.996312612f,  -0.085797312f, 0.995184727f,  -0.098017140f, 0.993906970f,\n    -0.110222207f, 0.992479535f,  -0.122410675f, 0.990902635f,  -0.134580709f,\n    0.989176510f,  -0.146730474f, 0.987301418f,  -0.158858143f, 0.985277642f,\n    -0.170961889f, 0.983105487f,  -0.183039888f, 0.980785280f,  -0.195090322f,\n    0.978317371f,  -0.207111376f, 0.975702130f,  -0.219101240f, 0.972939952f,\n    -0.231058108f, 0.970031253f,  -0.242980180f, 0.966976471f,  -0.254865660f,\n    0.963776066f,  -0.266712757f, 0.960430519f,  -0.278519689f, 0.956940336f,\n    -0.290284677f, 0.953306040f,  -0.302005949f, 0.949528181f,  -0.313681740f,\n    0.945607325f,  -0.325310292f, 0.941544065f,  -0.336889853f, 0.937339012f,\n    -0.348418680f, 0.932992799f,  -0.359895037f, 0.928506080f,  -0.371317194f,\n    0.923879533f,  -0.382683432f, 0.919113852f,  -0.393992040f, 0.914209756f,\n    -0.405241314f, 0.909167983f,  -0.416429560f, 0.903989293f,  -0.427555093f,\n    0.898674466f,  -0.438616239f, 0.893224301f,  -0.449611330f, 0.887639620f,\n    -0.460538711f, 0.881921264f,  -0.471396737f, 0.876070094f,  -0.482183772f,\n    0.870086991f,  -0.492898192f, 0.863972856f,  -0.503538384f, 0.857728610f,\n    -0.514102744f, 0.851355193f,  -0.524589683f, 0.844853565f,  -0.534997620f,\n    0.838224706f,  -0.545324988f, 0.831469612f,  -0.555570233f, 0.824589303f,\n    -0.565731811f, 0.817584813f,  -0.575808191f, 0.810457198f,  -0.585797857f,\n    0.803207531f,  -0.595699304f, 0.795836905f,  -0.605511041f, 0.788346428f,\n    -0.615231591f, 0.780737229f,  -0.624859488f, 0.773010453f,  -0.634393284f,\n    0.765167266f,  -0.643831543f, 0.757208847f,  -0.653172843f, 0.749136395f,\n    -0.662415778f, 0.740951125f,  -0.671558955f, 0.732654272f,  -0.680600998f,\n    0.724247083f,  -0.689540545f, 0.715730825f,  -0.698376249f, 0.707106781f,\n    -0.707106781f, 0.698376249f,  -0.715730825f, 0.689540545f,  -0.724247083f,\n    0.680600998f,  -0.732654272f, 0.671558955f,  -0.740951125f, 0.662415778f,\n    -0.749136395f, 0.653172843f,  -0.757208847f, 0.643831543f,  -0.765167266f,\n    0.634393284f,  -0.773010453f, 0.624859488f,  -0.780737229f, 0.615231591f,\n    -0.788346428f, 0.605511041f,  -0.795836905f, 0.595699304f,  -0.803207531f,\n    0.585797857f,  -0.810457198f, 0.575808191f,  -0.817584813f, 0.565731811f,\n    -0.824589303f, 0.555570233f,  -0.831469612f, 0.545324988f,  -0.838224706f,\n    0.534997620f,  -0.844853565f, 0.524589683f,  -0.851355193f, 0.514102744f,\n    -0.857728610f, 0.503538384f,  -0.863972856f, 0.492898192f,  -0.870086991f,\n    0.482183772f,  -0.876070094f, 0.471396737f,  -0.881921264f, 0.460538711f,\n    -0.887639620f, 0.449611330f,  -0.893224301f, 0.438616239f,  -0.898674466f,\n    0.427555093f,  -0.903989293f, 0.416429560f,  -0.909167983f, 0.405241314f,\n    -0.914209756f, 0.393992040f,  -0.919113852f, 0.382683432f,  -0.923879533f,\n    0.371317194f,  -0.928506080f, 0.359895037f,  -0.932992799f, 0.348418680f,\n    -0.937339012f, 0.336889853f,  -0.941544065f, 0.325310292f,  -0.945607325f,\n    0.313681740f,  -0.949528181f, 0.302005949f,  -0.953306040f, 0.290284677f,\n    -0.956940336f, 0.278519689f,  -0.960430519f, 0.266712757f,  -0.963776066f,\n    0.254865660f,  -0.966976471f, 0.242980180f,  -0.970031253f, 0.231058108f,\n    -0.972939952f, 0.219101240f,  -0.975702130f, 0.207111376f,  -0.978317371f,\n    0.195090322f,  -0.980785280f, 0.183039888f,  -0.983105487f, 0.170961889f,\n    -0.985277642f, 0.158858143f,  -0.987301418f, 0.146730474f,  -0.989176510f,\n    0.134580709f,  -0.990902635f, 0.122410675f,  -0.992479535f, 0.110222207f,\n    -0.993906970f, 0.098017140f,  -0.995184727f, 0.085797312f,  -0.996312612f,\n    0.073564564f,  -0.997290457f, 0.061320736f,  -0.998118113f, 0.049067674f,\n    -0.998795456f, 0.036807223f,  -0.999322385f, 0.024541229f,  -0.999698819f,\n    0.012271538f,  -0.999924702f};\n\nconst float32_t twiddleCoef_rfft_1024[1024] = {\n    0.000000000f,  1.000000000f,  0.006135885f,  0.999981175f,  0.012271538f,\n    0.999924702f,  0.018406730f,  0.999830582f,  0.024541229f,  0.999698819f,\n    0.030674803f,  0.999529418f,  0.036807223f,  0.999322385f,  0.042938257f,\n    0.999077728f,  0.049067674f,  0.998795456f,  0.055195244f,  0.998475581f,\n    0.061320736f,  0.998118113f,  0.067443920f,  0.997723067f,  0.073564564f,\n    0.997290457f,  0.079682438f,  0.996820299f,  0.085797312f,  0.996312612f,\n    0.091908956f,  0.995767414f,  0.098017140f,  0.995184727f,  0.104121634f,\n    0.994564571f,  0.110222207f,  0.993906970f,  0.116318631f,  0.993211949f,\n    0.122410675f,  0.992479535f,  0.128498111f,  0.991709754f,  0.134580709f,\n    0.990902635f,  0.140658239f,  0.990058210f,  0.146730474f,  0.989176510f,\n    0.152797185f,  0.988257568f,  0.158858143f,  0.987301418f,  0.164913120f,\n    0.986308097f,  0.170961889f,  0.985277642f,  0.177004220f,  0.984210092f,\n    0.183039888f,  0.983105487f,  0.189068664f,  0.981963869f,  0.195090322f,\n    0.980785280f,  0.201104635f,  0.979569766f,  0.207111376f,  0.978317371f,\n    0.213110320f,  0.977028143f,  0.219101240f,  0.975702130f,  0.225083911f,\n    0.974339383f,  0.231058108f,  0.972939952f,  0.237023606f,  0.971503891f,\n    0.242980180f,  0.970031253f,  0.248927606f,  0.968522094f,  0.254865660f,\n    0.966976471f,  0.260794118f,  0.965394442f,  0.266712757f,  0.963776066f,\n    0.272621355f,  0.962121404f,  0.278519689f,  0.960430519f,  0.284407537f,\n    0.958703475f,  0.290284677f,  0.956940336f,  0.296150888f,  0.955141168f,\n    0.302005949f,  0.953306040f,  0.307849640f,  0.951435021f,  0.313681740f,\n    0.949528181f,  0.319502031f,  0.947585591f,  0.325310292f,  0.945607325f,\n    0.331106306f,  0.943593458f,  0.336889853f,  0.941544065f,  0.342660717f,\n    0.939459224f,  0.348418680f,  0.937339012f,  0.354163525f,  0.935183510f,\n    0.359895037f,  0.932992799f,  0.365612998f,  0.930766961f,  0.371317194f,\n    0.928506080f,  0.377007410f,  0.926210242f,  0.382683432f,  0.923879533f,\n    0.388345047f,  0.921514039f,  0.393992040f,  0.919113852f,  0.399624200f,\n    0.916679060f,  0.405241314f,  0.914209756f,  0.410843171f,  0.911706032f,\n    0.416429560f,  0.909167983f,  0.422000271f,  0.906595705f,  0.427555093f,\n    0.903989293f,  0.433093819f,  0.901348847f,  0.438616239f,  0.898674466f,\n    0.444122145f,  0.895966250f,  0.449611330f,  0.893224301f,  0.455083587f,\n    0.890448723f,  0.460538711f,  0.887639620f,  0.465976496f,  0.884797098f,\n    0.471396737f,  0.881921264f,  0.476799230f,  0.879012226f,  0.482183772f,\n    0.876070094f,  0.487550160f,  0.873094978f,  0.492898192f,  0.870086991f,\n    0.498227667f,  0.867046246f,  0.503538384f,  0.863972856f,  0.508830143f,\n    0.860866939f,  0.514102744f,  0.857728610f,  0.519355990f,  0.854557988f,\n    0.524589683f,  0.851355193f,  0.529803625f,  0.848120345f,  0.534997620f,\n    0.844853565f,  0.540171473f,  0.841554977f,  0.545324988f,  0.838224706f,\n    0.550457973f,  0.834862875f,  0.555570233f,  0.831469612f,  0.560661576f,\n    0.828045045f,  0.565731811f,  0.824589303f,  0.570780746f,  0.821102515f,\n    0.575808191f,  0.817584813f,  0.580813958f,  0.814036330f,  0.585797857f,\n    0.810457198f,  0.590759702f,  0.806847554f,  0.595699304f,  0.803207531f,\n    0.600616479f,  0.799537269f,  0.605511041f,  0.795836905f,  0.610382806f,\n    0.792106577f,  0.615231591f,  0.788346428f,  0.620057212f,  0.784556597f,\n    0.624859488f,  0.780737229f,  0.629638239f,  0.776888466f,  0.634393284f,\n    0.773010453f,  0.639124445f,  0.769103338f,  0.643831543f,  0.765167266f,\n    0.648514401f,  0.761202385f,  0.653172843f,  0.757208847f,  0.657806693f,\n    0.753186799f,  0.662415778f,  0.749136395f,  0.666999922f,  0.745057785f,\n    0.671558955f,  0.740951125f,  0.676092704f,  0.736816569f,  0.680600998f,\n    0.732654272f,  0.685083668f,  0.728464390f,  0.689540545f,  0.724247083f,\n    0.693971461f,  0.720002508f,  0.698376249f,  0.715730825f,  0.702754744f,\n    0.711432196f,  0.707106781f,  0.707106781f,  0.711432196f,  0.702754744f,\n    0.715730825f,  0.698376249f,  0.720002508f,  0.693971461f,  0.724247083f,\n    0.689540545f,  0.728464390f,  0.685083668f,  0.732654272f,  0.680600998f,\n    0.736816569f,  0.676092704f,  0.740951125f,  0.671558955f,  0.745057785f,\n    0.666999922f,  0.749136395f,  0.662415778f,  0.753186799f,  0.657806693f,\n    0.757208847f,  0.653172843f,  0.761202385f,  0.648514401f,  0.765167266f,\n    0.643831543f,  0.769103338f,  0.639124445f,  0.773010453f,  0.634393284f,\n    0.776888466f,  0.629638239f,  0.780737229f,  0.624859488f,  0.784556597f,\n    0.620057212f,  0.788346428f,  0.615231591f,  0.792106577f,  0.610382806f,\n    0.795836905f,  0.605511041f,  0.799537269f,  0.600616479f,  0.803207531f,\n    0.595699304f,  0.806847554f,  0.590759702f,  0.810457198f,  0.585797857f,\n    0.814036330f,  0.580813958f,  0.817584813f,  0.575808191f,  0.821102515f,\n    0.570780746f,  0.824589303f,  0.565731811f,  0.828045045f,  0.560661576f,\n    0.831469612f,  0.555570233f,  0.834862875f,  0.550457973f,  0.838224706f,\n    0.545324988f,  0.841554977f,  0.540171473f,  0.844853565f,  0.534997620f,\n    0.848120345f,  0.529803625f,  0.851355193f,  0.524589683f,  0.854557988f,\n    0.519355990f,  0.857728610f,  0.514102744f,  0.860866939f,  0.508830143f,\n    0.863972856f,  0.503538384f,  0.867046246f,  0.498227667f,  0.870086991f,\n    0.492898192f,  0.873094978f,  0.487550160f,  0.876070094f,  0.482183772f,\n    0.879012226f,  0.476799230f,  0.881921264f,  0.471396737f,  0.884797098f,\n    0.465976496f,  0.887639620f,  0.460538711f,  0.890448723f,  0.455083587f,\n    0.893224301f,  0.449611330f,  0.895966250f,  0.444122145f,  0.898674466f,\n    0.438616239f,  0.901348847f,  0.433093819f,  0.903989293f,  0.427555093f,\n    0.906595705f,  0.422000271f,  0.909167983f,  0.416429560f,  0.911706032f,\n    0.410843171f,  0.914209756f,  0.405241314f,  0.916679060f,  0.399624200f,\n    0.919113852f,  0.393992040f,  0.921514039f,  0.388345047f,  0.923879533f,\n    0.382683432f,  0.926210242f,  0.377007410f,  0.928506080f,  0.371317194f,\n    0.930766961f,  0.365612998f,  0.932992799f,  0.359895037f,  0.935183510f,\n    0.354163525f,  0.937339012f,  0.348418680f,  0.939459224f,  0.342660717f,\n    0.941544065f,  0.336889853f,  0.943593458f,  0.331106306f,  0.945607325f,\n    0.325310292f,  0.947585591f,  0.319502031f,  0.949528181f,  0.313681740f,\n    0.951435021f,  0.307849640f,  0.953306040f,  0.302005949f,  0.955141168f,\n    0.296150888f,  0.956940336f,  0.290284677f,  0.958703475f,  0.284407537f,\n    0.960430519f,  0.278519689f,  0.962121404f,  0.272621355f,  0.963776066f,\n    0.266712757f,  0.965394442f,  0.260794118f,  0.966976471f,  0.254865660f,\n    0.968522094f,  0.248927606f,  0.970031253f,  0.242980180f,  0.971503891f,\n    0.237023606f,  0.972939952f,  0.231058108f,  0.974339383f,  0.225083911f,\n    0.975702130f,  0.219101240f,  0.977028143f,  0.213110320f,  0.978317371f,\n    0.207111376f,  0.979569766f,  0.201104635f,  0.980785280f,  0.195090322f,\n    0.981963869f,  0.189068664f,  0.983105487f,  0.183039888f,  0.984210092f,\n    0.177004220f,  0.985277642f,  0.170961889f,  0.986308097f,  0.164913120f,\n    0.987301418f,  0.158858143f,  0.988257568f,  0.152797185f,  0.989176510f,\n    0.146730474f,  0.990058210f,  0.140658239f,  0.990902635f,  0.134580709f,\n    0.991709754f,  0.128498111f,  0.992479535f,  0.122410675f,  0.993211949f,\n    0.116318631f,  0.993906970f,  0.110222207f,  0.994564571f,  0.104121634f,\n    0.995184727f,  0.098017140f,  0.995767414f,  0.091908956f,  0.996312612f,\n    0.085797312f,  0.996820299f,  0.079682438f,  0.997290457f,  0.073564564f,\n    0.997723067f,  0.067443920f,  0.998118113f,  0.061320736f,  0.998475581f,\n    0.055195244f,  0.998795456f,  0.049067674f,  0.999077728f,  0.042938257f,\n    0.999322385f,  0.036807223f,  0.999529418f,  0.030674803f,  0.999698819f,\n    0.024541229f,  0.999830582f,  0.018406730f,  0.999924702f,  0.012271538f,\n    0.999981175f,  0.006135885f,  1.000000000f,  0.000000000f,  0.999981175f,\n    -0.006135885f, 0.999924702f,  -0.012271538f, 0.999830582f,  -0.018406730f,\n    0.999698819f,  -0.024541229f, 0.999529418f,  -0.030674803f, 0.999322385f,\n    -0.036807223f, 0.999077728f,  -0.042938257f, 0.998795456f,  -0.049067674f,\n    0.998475581f,  -0.055195244f, 0.998118113f,  -0.061320736f, 0.997723067f,\n    -0.067443920f, 0.997290457f,  -0.073564564f, 0.996820299f,  -0.079682438f,\n    0.996312612f,  -0.085797312f, 0.995767414f,  -0.091908956f, 0.995184727f,\n    -0.098017140f, 0.994564571f,  -0.104121634f, 0.993906970f,  -0.110222207f,\n    0.993211949f,  -0.116318631f, 0.992479535f,  -0.122410675f, 0.991709754f,\n    -0.128498111f, 0.990902635f,  -0.134580709f, 0.990058210f,  -0.140658239f,\n    0.989176510f,  -0.146730474f, 0.988257568f,  -0.152797185f, 0.987301418f,\n    -0.158858143f, 0.986308097f,  -0.164913120f, 0.985277642f,  -0.170961889f,\n    0.984210092f,  -0.177004220f, 0.983105487f,  -0.183039888f, 0.981963869f,\n    -0.189068664f, 0.980785280f,  -0.195090322f, 0.979569766f,  -0.201104635f,\n    0.978317371f,  -0.207111376f, 0.977028143f,  -0.213110320f, 0.975702130f,\n    -0.219101240f, 0.974339383f,  -0.225083911f, 0.972939952f,  -0.231058108f,\n    0.971503891f,  -0.237023606f, 0.970031253f,  -0.242980180f, 0.968522094f,\n    -0.248927606f, 0.966976471f,  -0.254865660f, 0.965394442f,  -0.260794118f,\n    0.963776066f,  -0.266712757f, 0.962121404f,  -0.272621355f, 0.960430519f,\n    -0.278519689f, 0.958703475f,  -0.284407537f, 0.956940336f,  -0.290284677f,\n    0.955141168f,  -0.296150888f, 0.953306040f,  -0.302005949f, 0.951435021f,\n    -0.307849640f, 0.949528181f,  -0.313681740f, 0.947585591f,  -0.319502031f,\n    0.945607325f,  -0.325310292f, 0.943593458f,  -0.331106306f, 0.941544065f,\n    -0.336889853f, 0.939459224f,  -0.342660717f, 0.937339012f,  -0.348418680f,\n    0.935183510f,  -0.354163525f, 0.932992799f,  -0.359895037f, 0.930766961f,\n    -0.365612998f, 0.928506080f,  -0.371317194f, 0.926210242f,  -0.377007410f,\n    0.923879533f,  -0.382683432f, 0.921514039f,  -0.388345047f, 0.919113852f,\n    -0.393992040f, 0.916679060f,  -0.399624200f, 0.914209756f,  -0.405241314f,\n    0.911706032f,  -0.410843171f, 0.909167983f,  -0.416429560f, 0.906595705f,\n    -0.422000271f, 0.903989293f,  -0.427555093f, 0.901348847f,  -0.433093819f,\n    0.898674466f,  -0.438616239f, 0.895966250f,  -0.444122145f, 0.893224301f,\n    -0.449611330f, 0.890448723f,  -0.455083587f, 0.887639620f,  -0.460538711f,\n    0.884797098f,  -0.465976496f, 0.881921264f,  -0.471396737f, 0.879012226f,\n    -0.476799230f, 0.876070094f,  -0.482183772f, 0.873094978f,  -0.487550160f,\n    0.870086991f,  -0.492898192f, 0.867046246f,  -0.498227667f, 0.863972856f,\n    -0.503538384f, 0.860866939f,  -0.508830143f, 0.857728610f,  -0.514102744f,\n    0.854557988f,  -0.519355990f, 0.851355193f,  -0.524589683f, 0.848120345f,\n    -0.529803625f, 0.844853565f,  -0.534997620f, 0.841554977f,  -0.540171473f,\n    0.838224706f,  -0.545324988f, 0.834862875f,  -0.550457973f, 0.831469612f,\n    -0.555570233f, 0.828045045f,  -0.560661576f, 0.824589303f,  -0.565731811f,\n    0.821102515f,  -0.570780746f, 0.817584813f,  -0.575808191f, 0.814036330f,\n    -0.580813958f, 0.810457198f,  -0.585797857f, 0.806847554f,  -0.590759702f,\n    0.803207531f,  -0.595699304f, 0.799537269f,  -0.600616479f, 0.795836905f,\n    -0.605511041f, 0.792106577f,  -0.610382806f, 0.788346428f,  -0.615231591f,\n    0.784556597f,  -0.620057212f, 0.780737229f,  -0.624859488f, 0.776888466f,\n    -0.629638239f, 0.773010453f,  -0.634393284f, 0.769103338f,  -0.639124445f,\n    0.765167266f,  -0.643831543f, 0.761202385f,  -0.648514401f, 0.757208847f,\n    -0.653172843f, 0.753186799f,  -0.657806693f, 0.749136395f,  -0.662415778f,\n    0.745057785f,  -0.666999922f, 0.740951125f,  -0.671558955f, 0.736816569f,\n    -0.676092704f, 0.732654272f,  -0.680600998f, 0.728464390f,  -0.685083668f,\n    0.724247083f,  -0.689540545f, 0.720002508f,  -0.693971461f, 0.715730825f,\n    -0.698376249f, 0.711432196f,  -0.702754744f, 0.707106781f,  -0.707106781f,\n    0.702754744f,  -0.711432196f, 0.698376249f,  -0.715730825f, 0.693971461f,\n    -0.720002508f, 0.689540545f,  -0.724247083f, 0.685083668f,  -0.728464390f,\n    0.680600998f,  -0.732654272f, 0.676092704f,  -0.736816569f, 0.671558955f,\n    -0.740951125f, 0.666999922f,  -0.745057785f, 0.662415778f,  -0.749136395f,\n    0.657806693f,  -0.753186799f, 0.653172843f,  -0.757208847f, 0.648514401f,\n    -0.761202385f, 0.643831543f,  -0.765167266f, 0.639124445f,  -0.769103338f,\n    0.634393284f,  -0.773010453f, 0.629638239f,  -0.776888466f, 0.624859488f,\n    -0.780737229f, 0.620057212f,  -0.784556597f, 0.615231591f,  -0.788346428f,\n    0.610382806f,  -0.792106577f, 0.605511041f,  -0.795836905f, 0.600616479f,\n    -0.799537269f, 0.595699304f,  -0.803207531f, 0.590759702f,  -0.806847554f,\n    0.585797857f,  -0.810457198f, 0.580813958f,  -0.814036330f, 0.575808191f,\n    -0.817584813f, 0.570780746f,  -0.821102515f, 0.565731811f,  -0.824589303f,\n    0.560661576f,  -0.828045045f, 0.555570233f,  -0.831469612f, 0.550457973f,\n    -0.834862875f, 0.545324988f,  -0.838224706f, 0.540171473f,  -0.841554977f,\n    0.534997620f,  -0.844853565f, 0.529803625f,  -0.848120345f, 0.524589683f,\n    -0.851355193f, 0.519355990f,  -0.854557988f, 0.514102744f,  -0.857728610f,\n    0.508830143f,  -0.860866939f, 0.503538384f,  -0.863972856f, 0.498227667f,\n    -0.867046246f, 0.492898192f,  -0.870086991f, 0.487550160f,  -0.873094978f,\n    0.482183772f,  -0.876070094f, 0.476799230f,  -0.879012226f, 0.471396737f,\n    -0.881921264f, 0.465976496f,  -0.884797098f, 0.460538711f,  -0.887639620f,\n    0.455083587f,  -0.890448723f, 0.449611330f,  -0.893224301f, 0.444122145f,\n    -0.895966250f, 0.438616239f,  -0.898674466f, 0.433093819f,  -0.901348847f,\n    0.427555093f,  -0.903989293f, 0.422000271f,  -0.906595705f, 0.416429560f,\n    -0.909167983f, 0.410843171f,  -0.911706032f, 0.405241314f,  -0.914209756f,\n    0.399624200f,  -0.916679060f, 0.393992040f,  -0.919113852f, 0.388345047f,\n    -0.921514039f, 0.382683432f,  -0.923879533f, 0.377007410f,  -0.926210242f,\n    0.371317194f,  -0.928506080f, 0.365612998f,  -0.930766961f, 0.359895037f,\n    -0.932992799f, 0.354163525f,  -0.935183510f, 0.348418680f,  -0.937339012f,\n    0.342660717f,  -0.939459224f, 0.336889853f,  -0.941544065f, 0.331106306f,\n    -0.943593458f, 0.325310292f,  -0.945607325f, 0.319502031f,  -0.947585591f,\n    0.313681740f,  -0.949528181f, 0.307849640f,  -0.951435021f, 0.302005949f,\n    -0.953306040f, 0.296150888f,  -0.955141168f, 0.290284677f,  -0.956940336f,\n    0.284407537f,  -0.958703475f, 0.278519689f,  -0.960430519f, 0.272621355f,\n    -0.962121404f, 0.266712757f,  -0.963776066f, 0.260794118f,  -0.965394442f,\n    0.254865660f,  -0.966976471f, 0.248927606f,  -0.968522094f, 0.242980180f,\n    -0.970031253f, 0.237023606f,  -0.971503891f, 0.231058108f,  -0.972939952f,\n    0.225083911f,  -0.974339383f, 0.219101240f,  -0.975702130f, 0.213110320f,\n    -0.977028143f, 0.207111376f,  -0.978317371f, 0.201104635f,  -0.979569766f,\n    0.195090322f,  -0.980785280f, 0.189068664f,  -0.981963869f, 0.183039888f,\n    -0.983105487f, 0.177004220f,  -0.984210092f, 0.170961889f,  -0.985277642f,\n    0.164913120f,  -0.986308097f, 0.158858143f,  -0.987301418f, 0.152797185f,\n    -0.988257568f, 0.146730474f,  -0.989176510f, 0.140658239f,  -0.990058210f,\n    0.134580709f,  -0.990902635f, 0.128498111f,  -0.991709754f, 0.122410675f,\n    -0.992479535f, 0.116318631f,  -0.993211949f, 0.110222207f,  -0.993906970f,\n    0.104121634f,  -0.994564571f, 0.098017140f,  -0.995184727f, 0.091908956f,\n    -0.995767414f, 0.085797312f,  -0.996312612f, 0.079682438f,  -0.996820299f,\n    0.073564564f,  -0.997290457f, 0.067443920f,  -0.997723067f, 0.061320736f,\n    -0.998118113f, 0.055195244f,  -0.998475581f, 0.049067674f,  -0.998795456f,\n    0.042938257f,  -0.999077728f, 0.036807223f,  -0.999322385f, 0.030674803f,\n    -0.999529418f, 0.024541229f,  -0.999698819f, 0.018406730f,  -0.999830582f,\n    0.012271538f,  -0.999924702f, 0.006135885f,  -0.999981175f};\n\nconst float32_t twiddleCoef_rfft_2048[2048] = {\n    0.000000000f,  1.000000000f,  0.003067957f,  0.999995294f,  0.006135885f,\n    0.999981175f,  0.009203755f,  0.999957645f,  0.012271538f,  0.999924702f,\n    0.015339206f,  0.999882347f,  0.018406730f,  0.999830582f,  0.021474080f,\n    0.999769405f,  0.024541229f,  0.999698819f,  0.027608146f,  0.999618822f,\n    0.030674803f,  0.999529418f,  0.033741172f,  0.999430605f,  0.036807223f,\n    0.999322385f,  0.039872928f,  0.999204759f,  0.042938257f,  0.999077728f,\n    0.046003182f,  0.998941293f,  0.049067674f,  0.998795456f,  0.052131705f,\n    0.998640218f,  0.055195244f,  0.998475581f,  0.058258265f,  0.998301545f,\n    0.061320736f,  0.998118113f,  0.064382631f,  0.997925286f,  0.067443920f,\n    0.997723067f,  0.070504573f,  0.997511456f,  0.073564564f,  0.997290457f,\n    0.076623861f,  0.997060070f,  0.079682438f,  0.996820299f,  0.082740265f,\n    0.996571146f,  0.085797312f,  0.996312612f,  0.088853553f,  0.996044701f,\n    0.091908956f,  0.995767414f,  0.094963495f,  0.995480755f,  0.098017140f,\n    0.995184727f,  0.101069863f,  0.994879331f,  0.104121634f,  0.994564571f,\n    0.107172425f,  0.994240449f,  0.110222207f,  0.993906970f,  0.113270952f,\n    0.993564136f,  0.116318631f,  0.993211949f,  0.119365215f,  0.992850414f,\n    0.122410675f,  0.992479535f,  0.125454983f,  0.992099313f,  0.128498111f,\n    0.991709754f,  0.131540029f,  0.991310860f,  0.134580709f,  0.990902635f,\n    0.137620122f,  0.990485084f,  0.140658239f,  0.990058210f,  0.143695033f,\n    0.989622017f,  0.146730474f,  0.989176510f,  0.149764535f,  0.988721692f,\n    0.152797185f,  0.988257568f,  0.155828398f,  0.987784142f,  0.158858143f,\n    0.987301418f,  0.161886394f,  0.986809402f,  0.164913120f,  0.986308097f,\n    0.167938295f,  0.985797509f,  0.170961889f,  0.985277642f,  0.173983873f,\n    0.984748502f,  0.177004220f,  0.984210092f,  0.180022901f,  0.983662419f,\n    0.183039888f,  0.983105487f,  0.186055152f,  0.982539302f,  0.189068664f,\n    0.981963869f,  0.192080397f,  0.981379193f,  0.195090322f,  0.980785280f,\n    0.198098411f,  0.980182136f,  0.201104635f,  0.979569766f,  0.204108966f,\n    0.978948175f,  0.207111376f,  0.978317371f,  0.210111837f,  0.977677358f,\n    0.213110320f,  0.977028143f,  0.216106797f,  0.976369731f,  0.219101240f,\n    0.975702130f,  0.222093621f,  0.975025345f,  0.225083911f,  0.974339383f,\n    0.228072083f,  0.973644250f,  0.231058108f,  0.972939952f,  0.234041959f,\n    0.972226497f,  0.237023606f,  0.971503891f,  0.240003022f,  0.970772141f,\n    0.242980180f,  0.970031253f,  0.245955050f,  0.969281235f,  0.248927606f,\n    0.968522094f,  0.251897818f,  0.967753837f,  0.254865660f,  0.966976471f,\n    0.257831102f,  0.966190003f,  0.260794118f,  0.965394442f,  0.263754679f,\n    0.964589793f,  0.266712757f,  0.963776066f,  0.269668326f,  0.962953267f,\n    0.272621355f,  0.962121404f,  0.275571819f,  0.961280486f,  0.278519689f,\n    0.960430519f,  0.281464938f,  0.959571513f,  0.284407537f,  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0.514102744f,  -0.857728610f, 0.511468850f,  -0.859301818f,\n    0.508830143f,  -0.860866939f, 0.506186645f,  -0.862423956f, 0.503538384f,\n    -0.863972856f, 0.500885383f,  -0.865513624f, 0.498227667f,  -0.867046246f,\n    0.495565262f,  -0.868570706f, 0.492898192f,  -0.870086991f, 0.490226483f,\n    -0.871595087f, 0.487550160f,  -0.873094978f, 0.484869248f,  -0.874586652f,\n    0.482183772f,  -0.876070094f, 0.479493758f,  -0.877545290f, 0.476799230f,\n    -0.879012226f, 0.474100215f,  -0.880470889f, 0.471396737f,  -0.881921264f,\n    0.468688822f,  -0.883363339f, 0.465976496f,  -0.884797098f, 0.463259784f,\n    -0.886222530f, 0.460538711f,  -0.887639620f, 0.457813304f,  -0.889048356f,\n    0.455083587f,  -0.890448723f, 0.452349587f,  -0.891840709f, 0.449611330f,\n    -0.893224301f, 0.446868840f,  -0.894599486f, 0.444122145f,  -0.895966250f,\n    0.441371269f,  -0.897324581f, 0.438616239f,  -0.898674466f, 0.435857080f,\n    -0.900015892f, 0.433093819f,  -0.901348847f, 0.430326481f,  -0.902673318f,\n    0.427555093f,  -0.903989293f, 0.424779681f,  -0.905296759f, 0.422000271f,\n    -0.906595705f, 0.419216888f,  -0.907886116f, 0.416429560f,  -0.909167983f,\n    0.413638312f,  -0.910441292f, 0.410843171f,  -0.911706032f, 0.408044163f,\n    -0.912962190f, 0.405241314f,  -0.914209756f, 0.402434651f,  -0.915448716f,\n    0.399624200f,  -0.916679060f, 0.396809987f,  -0.917900776f, 0.393992040f,\n    -0.919113852f, 0.391170384f,  -0.920318277f, 0.388345047f,  -0.921514039f,\n    0.385516054f,  -0.922701128f, 0.382683432f,  -0.923879533f, 0.379847209f,\n    -0.925049241f, 0.377007410f,  -0.926210242f, 0.374164063f,  -0.927362526f,\n    0.371317194f,  -0.928506080f, 0.368466830f,  -0.929640896f, 0.365612998f,\n    -0.930766961f, 0.362755724f,  -0.931884266f, 0.359895037f,  -0.932992799f,\n    0.357030961f,  -0.934092550f, 0.354163525f,  -0.935183510f, 0.351292756f,\n    -0.936265667f, 0.348418680f,  -0.937339012f, 0.345541325f,  -0.938403534f,\n    0.342660717f,  -0.939459224f, 0.339776884f,  -0.940506071f, 0.336889853f,\n    -0.941544065f, 0.333999651f,  -0.942573198f, 0.331106306f,  -0.943593458f,\n    0.328209844f,  -0.944604837f, 0.325310292f,  -0.945607325f, 0.322407679f,\n    -0.946600913f, 0.319502031f,  -0.947585591f, 0.316593376f,  -0.948561350f,\n    0.313681740f,  -0.949528181f, 0.310767153f,  -0.950486074f, 0.307849640f,\n    -0.951435021f, 0.304929230f,  -0.952375013f, 0.302005949f,  -0.953306040f,\n    0.299079826f,  -0.954228095f, 0.296150888f,  -0.955141168f, 0.293219163f,\n    -0.956045251f, 0.290284677f,  -0.956940336f, 0.287347460f,  -0.957826413f,\n    0.284407537f,  -0.958703475f, 0.281464938f,  -0.959571513f, 0.278519689f,\n    -0.960430519f, 0.275571819f,  -0.961280486f, 0.272621355f,  -0.962121404f,\n    0.269668326f,  -0.962953267f, 0.266712757f,  -0.963776066f, 0.263754679f,\n    -0.964589793f, 0.260794118f,  -0.965394442f, 0.257831102f,  -0.966190003f,\n    0.254865660f,  -0.966976471f, 0.251897818f,  -0.967753837f, 0.248927606f,\n    -0.968522094f, 0.245955050f,  -0.969281235f, 0.242980180f,  -0.970031253f,\n    0.240003022f,  -0.970772141f, 0.237023606f,  -0.971503891f, 0.234041959f,\n    -0.972226497f, 0.231058108f,  -0.972939952f, 0.228072083f,  -0.973644250f,\n    0.225083911f,  -0.974339383f, 0.222093621f,  -0.975025345f, 0.219101240f,\n    -0.975702130f, 0.216106797f,  -0.976369731f, 0.213110320f,  -0.977028143f,\n    0.210111837f,  -0.977677358f, 0.207111376f,  -0.978317371f, 0.204108966f,\n    -0.978948175f, 0.201104635f,  -0.979569766f, 0.198098411f,  -0.980182136f,\n    0.195090322f,  -0.980785280f, 0.192080397f,  -0.981379193f, 0.189068664f,\n    -0.981963869f, 0.186055152f,  -0.982539302f, 0.183039888f,  -0.983105487f,\n    0.180022901f,  -0.983662419f, 0.177004220f,  -0.984210092f, 0.173983873f,\n    -0.984748502f, 0.170961889f,  -0.985277642f, 0.167938295f,  -0.985797509f,\n    0.164913120f,  -0.986308097f, 0.161886394f,  -0.986809402f, 0.158858143f,\n    -0.987301418f, 0.155828398f,  -0.987784142f, 0.152797185f,  -0.988257568f,\n    0.149764535f,  -0.988721692f, 0.146730474f,  -0.989176510f, 0.143695033f,\n    -0.989622017f, 0.140658239f,  -0.990058210f, 0.137620122f,  -0.990485084f,\n    0.134580709f,  -0.990902635f, 0.131540029f,  -0.991310860f, 0.128498111f,\n    -0.991709754f, 0.125454983f,  -0.992099313f, 0.122410675f,  -0.992479535f,\n    0.119365215f,  -0.992850414f, 0.116318631f,  -0.993211949f, 0.113270952f,\n    -0.993564136f, 0.110222207f,  -0.993906970f, 0.107172425f,  -0.994240449f,\n    0.104121634f,  -0.994564571f, 0.101069863f,  -0.994879331f, 0.098017140f,\n    -0.995184727f, 0.094963495f,  -0.995480755f, 0.091908956f,  -0.995767414f,\n    0.088853553f,  -0.996044701f, 0.085797312f,  -0.996312612f, 0.082740265f,\n    -0.996571146f, 0.079682438f,  -0.996820299f, 0.076623861f,  -0.997060070f,\n    0.073564564f,  -0.997290457f, 0.070504573f,  -0.997511456f, 0.067443920f,\n    -0.997723067f, 0.064382631f,  -0.997925286f, 0.061320736f,  -0.998118113f,\n    0.058258265f,  -0.998301545f, 0.055195244f,  -0.998475581f, 0.052131705f,\n    -0.998640218f, 0.049067674f,  -0.998795456f, 0.046003182f,  -0.998941293f,\n    0.042938257f,  -0.999077728f, 0.039872928f,  -0.999204759f, 0.036807223f,\n    -0.999322385f, 0.033741172f,  -0.999430605f, 0.030674803f,  -0.999529418f,\n    0.027608146f,  -0.999618822f, 0.024541229f,  -0.999698819f, 0.021474080f,\n    -0.999769405f, 0.018406730f,  -0.999830582f, 0.015339206f,  -0.999882347f,\n    0.012271538f,  -0.999924702f, 0.009203755f,  -0.999957645f, 0.006135885f,\n    -0.999981175f, 0.003067957f,  -0.999995294f};\n\nconst float32_t twiddleCoef_rfft_4096[4096] = {\n    0.000000000f,  1.000000000f,  0.001533980f,  0.999998823f,  0.003067957f,\n    0.999995294f,  0.004601926f,  0.999989411f,  0.006135885f,  0.999981175f,\n    0.007669829f,  0.999970586f,  0.009203755f,  0.999957645f,  0.010737659f,\n    0.999942350f,  0.012271538f,  0.999924702f,  0.013805389f,  0.999904701f,\n    0.015339206f,  0.999882347f,  0.016872988f,  0.999857641f,  0.018406730f,\n    0.999830582f,  0.019940429f,  0.999801170f,  0.021474080f,  0.999769405f,\n    0.023007681f,  0.999735288f,  0.024541229f,  0.999698819f,  0.026074718f,\n    0.999659997f,  0.027608146f,  0.999618822f,  0.029141509f,  0.999575296f,\n    0.030674803f,  0.999529418f,  0.032208025f,  0.999481187f,  0.033741172f,\n    0.999430605f,  0.035274239f,  0.999377670f,  0.036807223f,  0.999322385f,\n    0.038340120f,  0.999264747f,  0.039872928f,  0.999204759f,  0.041405641f,\n    0.999142419f,  0.042938257f,  0.999077728f,  0.044470772f,  0.999010686f,\n    0.046003182f,  0.998941293f,  0.047535484f,  0.998869550f,  0.049067674f,\n    0.998795456f,  0.050599749f,  0.998719012f,  0.052131705f,  0.998640218f,\n    0.053663538f,  0.998559074f,  0.055195244f,  0.998475581f,  0.056726821f,\n    0.998389737f,  0.058258265f,  0.998301545f,  0.059789571f,  0.998211003f,\n    0.061320736f,  0.998118113f,  0.062851758f,  0.998022874f,  0.064382631f,\n    0.997925286f,  0.065913353f,  0.997825350f,  0.067443920f,  0.997723067f,\n    0.068974328f,  0.997618435f,  0.070504573f,  0.997511456f,  0.072034653f,\n    0.997402130f,  0.073564564f,  0.997290457f,  0.075094301f,  0.997176437f,\n    0.076623861f,  0.997060070f,  0.078153242f,  0.996941358f,  0.079682438f,\n    0.996820299f,  0.081211447f,  0.996696895f,  0.082740265f,  0.996571146f,\n    0.084268888f,  0.996443051f,  0.085797312f,  0.996312612f,  0.087325535f,\n    0.996179829f,  0.088853553f,  0.996044701f,  0.090381361f,  0.995907229f,\n    0.091908956f,  0.995767414f,  0.093436336f,  0.995625256f,  0.094963495f,\n    0.995480755f,  0.096490431f,  0.995333912f,  0.098017140f,  0.995184727f,\n    0.099543619f,  0.995033199f,  0.101069863f,  0.994879331f,  0.102595869f,\n    0.994723121f,  0.104121634f,  0.994564571f,  0.105647154f,  0.994403680f,\n    0.107172425f,  0.994240449f,  0.108697444f,  0.994074879f,  0.110222207f,\n    0.993906970f,  0.111746711f,  0.993736722f,  0.113270952f,  0.993564136f,\n    0.114794927f,  0.993389211f,  0.116318631f,  0.993211949f,  0.117842062f,\n    0.993032350f,  0.119365215f,  0.992850414f,  0.120888087f,  0.992666142f,\n    0.122410675f,  0.992479535f,  0.123932975f,  0.992290591f,  0.125454983f,\n    0.992099313f,  0.126976696f,  0.991905700f,  0.128498111f,  0.991709754f,\n    0.130019223f,  0.991511473f,  0.131540029f,  0.991310860f,  0.133060525f,\n    0.991107914f,  0.134580709f,  0.990902635f,  0.136100575f,  0.990695025f,\n    0.137620122f,  0.990485084f,  0.139139344f,  0.990272812f,  0.140658239f,\n    0.990058210f,  0.142176804f,  0.989841278f,  0.143695033f,  0.989622017f,\n    0.145212925f,  0.989400428f,  0.146730474f,  0.989176510f,  0.148247679f,\n    0.988950265f,  0.149764535f,  0.988721692f,  0.151281038f,  0.988490793f,\n    0.152797185f,  0.988257568f,  0.154312973f,  0.988022017f,  0.155828398f,\n    0.987784142f,  0.157343456f,  0.987543942f,  0.158858143f,  0.987301418f,\n    0.160372457f,  0.987056571f,  0.161886394f,  0.986809402f,  0.163399949f,\n    0.986559910f,  0.164913120f,  0.986308097f,  0.166425904f,  0.986053963f,\n    0.167938295f,  0.985797509f,  0.169450291f,  0.985538735f,  0.170961889f,\n    0.985277642f,  0.172473084f,  0.985014231f,  0.173983873f,  0.984748502f,\n    0.175494253f,  0.984480455f,  0.177004220f,  0.984210092f,  0.178513771f,\n    0.983937413f,  0.180022901f,  0.983662419f,  0.181531608f,  0.983385110f,\n    0.183039888f,  0.983105487f,  0.184547737f,  0.982823551f,  0.186055152f,\n    0.982539302f,  0.187562129f,  0.982252741f,  0.189068664f,  0.981963869f,\n    0.190574755f,  0.981672686f,  0.192080397f,  0.981379193f,  0.193585587f,\n    0.981083391f,  0.195090322f,  0.980785280f,  0.196594598f,  0.980484862f,\n    0.198098411f,  0.980182136f,  0.199601758f,  0.979877104f,  0.201104635f,\n    0.979569766f,  0.202607039f,  0.979260123f,  0.204108966f,  0.978948175f,\n    0.205610413f,  0.978633924f,  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-0.864744258f, 0.500885383f,  -0.865513624f, 0.499557113f,\n    -0.866280954f, 0.498227667f,  -0.867046246f, 0.496897049f,  -0.867809497f,\n    0.495565262f,  -0.868570706f, 0.494232309f,  -0.869329871f, 0.492898192f,\n    -0.870086991f, 0.491562916f,  -0.870842063f, 0.490226483f,  -0.871595087f,\n    0.488888897f,  -0.872346059f, 0.487550160f,  -0.873094978f, 0.486210276f,\n    -0.873841843f, 0.484869248f,  -0.874586652f, 0.483527079f,  -0.875329403f,\n    0.482183772f,  -0.876070094f, 0.480839331f,  -0.876808724f, 0.479493758f,\n    -0.877545290f, 0.478147056f,  -0.878279792f, 0.476799230f,  -0.879012226f,\n    0.475450282f,  -0.879742593f, 0.474100215f,  -0.880470889f, 0.472749032f,\n    -0.881197113f, 0.471396737f,  -0.881921264f, 0.470043332f,  -0.882643340f,\n    0.468688822f,  -0.883363339f, 0.467333209f,  -0.884081259f, 0.465976496f,\n    -0.884797098f, 0.464618686f,  -0.885510856f, 0.463259784f,  -0.886222530f,\n    0.461899791f,  -0.886932119f, 0.460538711f,  -0.887639620f, 0.459176548f,\n    -0.888345033f, 0.457813304f,  -0.889048356f, 0.456448982f,  -0.889749586f,\n    0.455083587f,  -0.890448723f, 0.453717121f,  -0.891145765f, 0.452349587f,\n    -0.891840709f, 0.450980989f,  -0.892533555f, 0.449611330f,  -0.893224301f,\n    0.448240612f,  -0.893912945f, 0.446868840f,  -0.894599486f, 0.445496017f,\n    -0.895283921f, 0.444122145f,  -0.895966250f, 0.442747228f,  -0.896646470f,\n    0.441371269f,  -0.897324581f, 0.439994271f,  -0.898000580f, 0.438616239f,\n    -0.898674466f, 0.437237174f,  -0.899346237f, 0.435857080f,  -0.900015892f,\n    0.434475961f,  -0.900683429f, 0.433093819f,  -0.901348847f, 0.431710658f,\n    -0.902012144f, 0.430326481f,  -0.902673318f, 0.428941292f,  -0.903332368f,\n    0.427555093f,  -0.903989293f, 0.426167889f,  -0.904644091f, 0.424779681f,\n    -0.905296759f, 0.423390474f,  -0.905947298f, 0.422000271f,  -0.906595705f,\n    0.420609074f,  -0.907241978f, 0.419216888f,  -0.907886116f, 0.417823716f,\n    -0.908528119f, 0.416429560f,  -0.909167983f, 0.415034424f,  -0.909805708f,\n    0.413638312f,  -0.910441292f, 0.412241227f,  -0.911074734f, 0.410843171f,\n    -0.911706032f, 0.409444149f,  -0.912335185f, 0.408044163f,  -0.912962190f,\n    0.406643217f,  -0.913587048f, 0.405241314f,  -0.914209756f, 0.403838458f,\n    -0.914830312f, 0.402434651f,  -0.915448716f, 0.401029897f,  -0.916064966f,\n    0.399624200f,  -0.916679060f, 0.398217562f,  -0.917290997f, 0.396809987f,\n    -0.917900776f, 0.395401479f,  -0.918508394f, 0.393992040f,  -0.919113852f,\n    0.392581674f,  -0.919717146f, 0.391170384f,  -0.920318277f, 0.389758174f,\n    -0.920917242f, 0.388345047f,  -0.921514039f, 0.386931006f,  -0.922108669f,\n    0.385516054f,  -0.922701128f, 0.384100195f,  -0.923291417f, 0.382683432f,\n    -0.923879533f, 0.381265769f,  -0.924465474f, 0.379847209f,  -0.925049241f,\n    0.378427755f,  -0.925630831f, 0.377007410f,  -0.926210242f, 0.375586178f,\n    -0.926787474f, 0.374164063f,  -0.927362526f, 0.372741067f,  -0.927935395f,\n    0.371317194f,  -0.928506080f, 0.369892447f,  -0.929074581f, 0.368466830f,\n    -0.929640896f, 0.367040346f,  -0.930205023f, 0.365612998f,  -0.930766961f,\n    0.364184790f,  -0.931326709f, 0.362755724f,  -0.931884266f, 0.361325806f,\n    -0.932439629f, 0.359895037f,  -0.932992799f, 0.358463421f,  -0.933543773f,\n    0.357030961f,  -0.934092550f, 0.355597662f,  -0.934639130f, 0.354163525f,\n    -0.935183510f, 0.352728556f,  -0.935725689f, 0.351292756f,  -0.936265667f,\n    0.349856130f,  -0.936803442f, 0.348418680f,  -0.937339012f, 0.346980411f,\n    -0.937872376f, 0.345541325f,  -0.938403534f, 0.344101426f,  -0.938932484f,\n    0.342660717f,  -0.939459224f, 0.341219202f,  -0.939983753f, 0.339776884f,\n    -0.940506071f, 0.338333767f,  -0.941026175f, 0.336889853f,  -0.941544065f,\n    0.335445147f,  -0.942059740f, 0.333999651f,  -0.942573198f, 0.332553370f,\n    -0.943084437f, 0.331106306f,  -0.943593458f, 0.329658463f,  -0.944100258f,\n    0.328209844f,  -0.944604837f, 0.326760452f,  -0.945107193f, 0.325310292f,\n    -0.945607325f, 0.323859367f,  -0.946105232f, 0.322407679f,  -0.946600913f,\n    0.320955232f,  -0.947094366f, 0.319502031f,  -0.947585591f, 0.318048077f,\n    -0.948074586f, 0.316593376f,  -0.948561350f, 0.315137929f,  -0.949045882f,\n    0.313681740f,  -0.949528181f, 0.312224814f,  -0.950008245f, 0.310767153f,\n    -0.950486074f, 0.309308760f,  -0.950961666f, 0.307849640f,  -0.951435021f,\n    0.306389795f,  -0.951906137f, 0.304929230f,  -0.952375013f, 0.303467947f,\n    -0.952841648f, 0.302005949f,  -0.953306040f, 0.300543241f,  -0.953768190f,\n    0.299079826f,  -0.954228095f, 0.297615707f,  -0.954685755f, 0.296150888f,\n    -0.955141168f, 0.294685372f,  -0.955594334f, 0.293219163f,  -0.956045251f,\n    0.291752263f,  -0.956493919f, 0.290284677f,  -0.956940336f, 0.288816408f,\n    -0.957384501f, 0.287347460f,  -0.957826413f, 0.285877835f,  -0.958266071f,\n    0.284407537f,  -0.958703475f, 0.282936570f,  -0.959138622f, 0.281464938f,\n    -0.959571513f, 0.279992643f,  -0.960002146f, 0.278519689f,  -0.960430519f,\n    0.277046080f,  -0.960856633f, 0.275571819f,  -0.961280486f, 0.274096910f,\n    -0.961702077f, 0.272621355f,  -0.962121404f, 0.271145160f,  -0.962538468f,\n    0.269668326f,  -0.962953267f, 0.268190857f,  -0.963365800f, 0.266712757f,\n    -0.963776066f, 0.265234030f,  -0.964184064f, 0.263754679f,  -0.964589793f,\n    0.262274707f,  -0.964993253f, 0.260794118f,  -0.965394442f, 0.259312915f,\n    -0.965793359f, 0.257831102f,  -0.966190003f, 0.256348682f,  -0.966584374f,\n    0.254865660f,  -0.966976471f, 0.253382037f,  -0.967366292f, 0.251897818f,\n    -0.967753837f, 0.250413007f,  -0.968139105f, 0.248927606f,  -0.968522094f,\n    0.247441619f,  -0.968902805f, 0.245955050f,  -0.969281235f, 0.244467903f,\n    -0.969657385f, 0.242980180f,  -0.970031253f, 0.241491885f,  -0.970402839f,\n    0.240003022f,  -0.970772141f, 0.238513595f,  -0.971139158f, 0.237023606f,\n    -0.971503891f, 0.235533059f,  -0.971866337f, 0.234041959f,  -0.972226497f,\n    0.232550307f,  -0.972584369f, 0.231058108f,  -0.972939952f, 0.229565366f,\n    -0.973293246f, 0.228072083f,  -0.973644250f, 0.226578264f,  -0.973992962f,\n    0.225083911f,  -0.974339383f, 0.223589029f,  -0.974683511f, 0.222093621f,\n    -0.975025345f, 0.220597690f,  -0.975364885f, 0.219101240f,  -0.975702130f,\n    0.217604275f,  -0.976037079f, 0.216106797f,  -0.976369731f, 0.214608811f,\n    -0.976700086f, 0.213110320f,  -0.977028143f, 0.211611327f,  -0.977353900f,\n    0.210111837f,  -0.977677358f, 0.208611852f,  -0.977998515f, 0.207111376f,\n    -0.978317371f, 0.205610413f,  -0.978633924f, 0.204108966f,  -0.978948175f,\n    0.202607039f,  -0.979260123f, 0.201104635f,  -0.979569766f, 0.199601758f,\n    -0.979877104f, 0.198098411f,  -0.980182136f, 0.196594598f,  -0.980484862f,\n    0.195090322f,  -0.980785280f, 0.193585587f,  -0.981083391f, 0.192080397f,\n    -0.981379193f, 0.190574755f,  -0.981672686f, 0.189068664f,  -0.981963869f,\n    0.187562129f,  -0.982252741f, 0.186055152f,  -0.982539302f, 0.184547737f,\n    -0.982823551f, 0.183039888f,  -0.983105487f, 0.181531608f,  -0.983385110f,\n    0.180022901f,  -0.983662419f, 0.178513771f,  -0.983937413f, 0.177004220f,\n    -0.984210092f, 0.175494253f,  -0.984480455f, 0.173983873f,  -0.984748502f,\n    0.172473084f,  -0.985014231f, 0.170961889f,  -0.985277642f, 0.169450291f,\n    -0.985538735f, 0.167938295f,  -0.985797509f, 0.166425904f,  -0.986053963f,\n    0.164913120f,  -0.986308097f, 0.163399949f,  -0.986559910f, 0.161886394f,\n    -0.986809402f, 0.160372457f,  -0.987056571f, 0.158858143f,  -0.987301418f,\n    0.157343456f,  -0.987543942f, 0.155828398f,  -0.987784142f, 0.154312973f,\n    -0.988022017f, 0.152797185f,  -0.988257568f, 0.151281038f,  -0.988490793f,\n    0.149764535f,  -0.988721692f, 0.148247679f,  -0.988950265f, 0.146730474f,\n    -0.989176510f, 0.145212925f,  -0.989400428f, 0.143695033f,  -0.989622017f,\n    0.142176804f,  -0.989841278f, 0.140658239f,  -0.990058210f, 0.139139344f,\n    -0.990272812f, 0.137620122f,  -0.990485084f, 0.136100575f,  -0.990695025f,\n    0.134580709f,  -0.990902635f, 0.133060525f,  -0.991107914f, 0.131540029f,\n    -0.991310860f, 0.130019223f,  -0.991511473f, 0.128498111f,  -0.991709754f,\n    0.126976696f,  -0.991905700f, 0.125454983f,  -0.992099313f, 0.123932975f,\n    -0.992290591f, 0.122410675f,  -0.992479535f, 0.120888087f,  -0.992666142f,\n    0.119365215f,  -0.992850414f, 0.117842062f,  -0.993032350f, 0.116318631f,\n    -0.993211949f, 0.114794927f,  -0.993389211f, 0.113270952f,  -0.993564136f,\n    0.111746711f,  -0.993736722f, 0.110222207f,  -0.993906970f, 0.108697444f,\n    -0.994074879f, 0.107172425f,  -0.994240449f, 0.105647154f,  -0.994403680f,\n    0.104121634f,  -0.994564571f, 0.102595869f,  -0.994723121f, 0.101069863f,\n    -0.994879331f, 0.099543619f,  -0.995033199f, 0.098017140f,  -0.995184727f,\n    0.096490431f,  -0.995333912f, 0.094963495f,  -0.995480755f, 0.093436336f,\n    -0.995625256f, 0.091908956f,  -0.995767414f, 0.090381361f,  -0.995907229f,\n    0.088853553f,  -0.996044701f, 0.087325535f,  -0.996179829f, 0.085797312f,\n    -0.996312612f, 0.084268888f,  -0.996443051f, 0.082740265f,  -0.996571146f,\n    0.081211447f,  -0.996696895f, 0.079682438f,  -0.996820299f, 0.078153242f,\n    -0.996941358f, 0.076623861f,  -0.997060070f, 0.075094301f,  -0.997176437f,\n    0.073564564f,  -0.997290457f, 0.072034653f,  -0.997402130f, 0.070504573f,\n    -0.997511456f, 0.068974328f,  -0.997618435f, 0.067443920f,  -0.997723067f,\n    0.065913353f,  -0.997825350f, 0.064382631f,  -0.997925286f, 0.062851758f,\n    -0.998022874f, 0.061320736f,  -0.998118113f, 0.059789571f,  -0.998211003f,\n    0.058258265f,  -0.998301545f, 0.056726821f,  -0.998389737f, 0.055195244f,\n    -0.998475581f, 0.053663538f,  -0.998559074f, 0.052131705f,  -0.998640218f,\n    0.050599749f,  -0.998719012f, 0.049067674f,  -0.998795456f, 0.047535484f,\n    -0.998869550f, 0.046003182f,  -0.998941293f, 0.044470772f,  -0.999010686f,\n    0.042938257f,  -0.999077728f, 0.041405641f,  -0.999142419f, 0.039872928f,\n    -0.999204759f, 0.038340120f,  -0.999264747f, 0.036807223f,  -0.999322385f,\n    0.035274239f,  -0.999377670f, 0.033741172f,  -0.999430605f, 0.032208025f,\n    -0.999481187f, 0.030674803f,  -0.999529418f, 0.029141509f,  -0.999575296f,\n    0.027608146f,  -0.999618822f, 0.026074718f,  -0.999659997f, 0.024541229f,\n    -0.999698819f, 0.023007681f,  -0.999735288f, 0.021474080f,  -0.999769405f,\n    0.019940429f,  -0.999801170f, 0.018406730f,  -0.999830582f, 0.016872988f,\n    -0.999857641f, 0.015339206f,  -0.999882347f, 0.013805389f,  -0.999904701f,\n    0.012271538f,  -0.999924702f, 0.010737659f,  -0.999942350f, 0.009203755f,\n    -0.999957645f, 0.007669829f,  -0.999970586f, 0.006135885f,  -0.999981175f,\n    0.004601926f,  -0.999989411f, 0.003067957f,  -0.999995294f, 0.001533980f,\n    -0.999998823f};\n\n/**\n  @par\n  Example code for the generation of the floating-point sine table:\n  
\n  tableSize = 512;\n  for (n = 0; n < (tableSize + 1); n++)\n  {\n        sinTable[n] = sin(2*PI*n/tableSize);\n  }
\n @par\n  where PI value is  3.14159265358979\n */\nconst float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = {\n    0.00000000f,  0.01227154f,  0.02454123f,  0.03680722f,  0.04906767f,\n    0.06132074f,  0.07356456f,  0.08579731f,  0.09801714f,  0.11022221f,\n    0.12241068f,  0.13458071f,  0.14673047f,  0.15885814f,  0.17096189f,\n    0.18303989f,  0.19509032f,  0.20711138f,  0.21910124f,  0.23105811f,\n    0.24298018f,  0.25486566f,  0.26671276f,  0.27851969f,  0.29028468f,\n    0.30200595f,  0.31368174f,  0.32531029f,  0.33688985f,  0.34841868f,\n    0.35989504f,  0.37131719f,  0.38268343f,  0.39399204f,  0.40524131f,\n    0.41642956f,  0.42755509f,  0.43861624f,  0.44961133f,  0.46053871f,\n    0.47139674f,  0.48218377f,  0.49289819f,  0.50353838f,  0.51410274f,\n    0.52458968f,  0.53499762f,  0.54532499f,  0.55557023f,  0.56573181f,\n    0.57580819f,  0.58579786f,  0.59569930f,  0.60551104f,  0.61523159f,\n    0.62485949f,  0.63439328f,  0.64383154f,  0.65317284f,  0.66241578f,\n    0.67155895f,  0.68060100f,  0.68954054f,  0.69837625f,  0.70710678f,\n    0.71573083f,  0.72424708f,  0.73265427f,  0.74095113f,  0.74913639f,\n    0.75720885f,  0.76516727f,  0.77301045f,  0.78073723f,  0.78834643f,\n    0.79583690f,  0.80320753f,  0.81045720f,  0.81758481f,  0.82458930f,\n    0.83146961f,  0.83822471f,  0.84485357f,  0.85135519f,  0.85772861f,\n    0.86397286f,  0.87008699f,  0.87607009f,  0.88192126f,  0.88763962f,\n    0.89322430f,  0.89867447f,  0.90398929f,  0.90916798f,  0.91420976f,\n    0.91911385f,  0.92387953f,  0.92850608f,  0.93299280f,  0.93733901f,\n    0.94154407f,  0.94560733f,  0.94952818f,  0.95330604f,  0.95694034f,\n    0.96043052f,  0.96377607f,  0.96697647f,  0.97003125f,  0.97293995f,\n    0.97570213f,  0.97831737f,  0.98078528f,  0.98310549f,  0.98527764f,\n    0.98730142f,  0.98917651f,  0.99090264f,  0.99247953f,  0.99390697f,\n    0.99518473f,  0.99631261f,  0.99729046f,  0.99811811f,  0.99879546f,\n    0.99932238f,  0.99969882f,  0.99992470f,  1.00000000f,  0.99992470f,\n    0.99969882f,  0.99932238f,  0.99879546f,  0.99811811f,  0.99729046f,\n    0.99631261f,  0.99518473f,  0.99390697f,  0.99247953f,  0.99090264f,\n    0.98917651f,  0.98730142f,  0.98527764f,  0.98310549f,  0.98078528f,\n    0.97831737f,  0.97570213f,  0.97293995f,  0.97003125f,  0.96697647f,\n    0.96377607f,  0.96043052f,  0.95694034f,  0.95330604f,  0.94952818f,\n    0.94560733f,  0.94154407f,  0.93733901f,  0.93299280f,  0.92850608f,\n    0.92387953f,  0.91911385f,  0.91420976f,  0.90916798f,  0.90398929f,\n    0.89867447f,  0.89322430f,  0.88763962f,  0.88192126f,  0.87607009f,\n    0.87008699f,  0.86397286f,  0.85772861f,  0.85135519f,  0.84485357f,\n    0.83822471f,  0.83146961f,  0.82458930f,  0.81758481f,  0.81045720f,\n    0.80320753f,  0.79583690f,  0.78834643f,  0.78073723f,  0.77301045f,\n    0.76516727f,  0.75720885f,  0.74913639f,  0.74095113f,  0.73265427f,\n    0.72424708f,  0.71573083f,  0.70710678f,  0.69837625f,  0.68954054f,\n    0.68060100f,  0.67155895f,  0.66241578f,  0.65317284f,  0.64383154f,\n    0.63439328f,  0.62485949f,  0.61523159f,  0.60551104f,  0.59569930f,\n    0.58579786f,  0.57580819f,  0.56573181f,  0.55557023f,  0.54532499f,\n    0.53499762f,  0.52458968f,  0.51410274f,  0.50353838f,  0.49289819f,\n    0.48218377f,  0.47139674f,  0.46053871f,  0.44961133f,  0.43861624f,\n    0.42755509f,  0.41642956f,  0.40524131f,  0.39399204f,  0.38268343f,\n    0.37131719f,  0.35989504f,  0.34841868f,  0.33688985f,  0.32531029f,\n    0.31368174f,  0.30200595f,  0.29028468f,  0.27851969f,  0.26671276f,\n    0.25486566f,  0.24298018f,  0.23105811f,  0.21910124f,  0.20711138f,\n    0.19509032f,  0.18303989f,  0.17096189f,  0.15885814f,  0.14673047f,\n    0.13458071f,  0.12241068f,  0.11022221f,  0.09801714f,  0.08579731f,\n    0.07356456f,  0.06132074f,  0.04906767f,  0.03680722f,  0.02454123f,\n    0.01227154f,  0.00000000f,  -0.01227154f, -0.02454123f, -0.03680722f,\n    -0.04906767f, -0.06132074f, -0.07356456f, -0.08579731f, -0.09801714f,\n    -0.11022221f, -0.12241068f, -0.13458071f, -0.14673047f, -0.15885814f,\n    -0.17096189f, -0.18303989f, -0.19509032f, -0.20711138f, -0.21910124f,\n    -0.23105811f, -0.24298018f, -0.25486566f, -0.26671276f, -0.27851969f,\n    -0.29028468f, -0.30200595f, -0.31368174f, -0.32531029f, -0.33688985f,\n    -0.34841868f, -0.35989504f, -0.37131719f, -0.38268343f, -0.39399204f,\n    -0.40524131f, -0.41642956f, -0.42755509f, -0.43861624f, -0.44961133f,\n    -0.46053871f, -0.47139674f, -0.48218377f, -0.49289819f, -0.50353838f,\n    -0.51410274f, -0.52458968f, -0.53499762f, -0.54532499f, -0.55557023f,\n    -0.56573181f, -0.57580819f, -0.58579786f, -0.59569930f, -0.60551104f,\n    -0.61523159f, -0.62485949f, -0.63439328f, -0.64383154f, -0.65317284f,\n    -0.66241578f, -0.67155895f, -0.68060100f, -0.68954054f, -0.69837625f,\n    -0.70710678f, -0.71573083f, -0.72424708f, -0.73265427f, -0.74095113f,\n    -0.74913639f, -0.75720885f, -0.76516727f, -0.77301045f, -0.78073723f,\n    -0.78834643f, -0.79583690f, -0.80320753f, -0.81045720f, -0.81758481f,\n    -0.82458930f, -0.83146961f, -0.83822471f, -0.84485357f, -0.85135519f,\n    -0.85772861f, -0.86397286f, -0.87008699f, -0.87607009f, -0.88192126f,\n    -0.88763962f, -0.89322430f, -0.89867447f, -0.90398929f, -0.90916798f,\n    -0.91420976f, -0.91911385f, -0.92387953f, -0.92850608f, -0.93299280f,\n    -0.93733901f, -0.94154407f, -0.94560733f, -0.94952818f, -0.95330604f,\n    -0.95694034f, -0.96043052f, -0.96377607f, -0.96697647f, -0.97003125f,\n    -0.97293995f, -0.97570213f, -0.97831737f, -0.98078528f, -0.98310549f,\n    -0.98527764f, -0.98730142f, -0.98917651f, -0.99090264f, -0.99247953f,\n    -0.99390697f, -0.99518473f, -0.99631261f, -0.99729046f, -0.99811811f,\n    -0.99879546f, -0.99932238f, -0.99969882f, -0.99992470f, -1.00000000f,\n    -0.99992470f, -0.99969882f, -0.99932238f, -0.99879546f, -0.99811811f,\n    -0.99729046f, -0.99631261f, -0.99518473f, -0.99390697f, -0.99247953f,\n    -0.99090264f, -0.98917651f, -0.98730142f, -0.98527764f, -0.98310549f,\n    -0.98078528f, -0.97831737f, -0.97570213f, -0.97293995f, -0.97003125f,\n    -0.96697647f, -0.96377607f, -0.96043052f, -0.95694034f, -0.95330604f,\n    -0.94952818f, -0.94560733f, -0.94154407f, -0.93733901f, -0.93299280f,\n    -0.92850608f, -0.92387953f, -0.91911385f, -0.91420976f, -0.90916798f,\n    -0.90398929f, -0.89867447f, -0.89322430f, -0.88763962f, -0.88192126f,\n    -0.87607009f, -0.87008699f, -0.86397286f, -0.85772861f, -0.85135519f,\n    -0.84485357f, -0.83822471f, -0.83146961f, -0.82458930f, -0.81758481f,\n    -0.81045720f, -0.80320753f, -0.79583690f, -0.78834643f, -0.78073723f,\n    -0.77301045f, -0.76516727f, -0.75720885f, -0.74913639f, -0.74095113f,\n    -0.73265427f, -0.72424708f, -0.71573083f, -0.70710678f, -0.69837625f,\n    -0.68954054f, -0.68060100f, -0.67155895f, -0.66241578f, -0.65317284f,\n    -0.64383154f, -0.63439328f, -0.62485949f, -0.61523159f, -0.60551104f,\n    -0.59569930f, -0.58579786f, -0.57580819f, -0.56573181f, -0.55557023f,\n    -0.54532499f, -0.53499762f, -0.52458968f, -0.51410274f, -0.50353838f,\n    -0.49289819f, -0.48218377f, -0.47139674f, -0.46053871f, -0.44961133f,\n    -0.43861624f, -0.42755509f, -0.41642956f, -0.40524131f, -0.39399204f,\n    -0.38268343f, -0.37131719f, -0.35989504f, -0.34841868f, -0.33688985f,\n    -0.32531029f, -0.31368174f, -0.30200595f, -0.29028468f, -0.27851969f,\n    -0.26671276f, -0.25486566f, -0.24298018f, -0.23105811f, -0.21910124f,\n    -0.20711138f, -0.19509032f, -0.18303989f, -0.17096189f, -0.15885814f,\n    -0.14673047f, -0.13458071f, -0.12241068f, -0.11022221f, -0.09801714f,\n    -0.08579731f, -0.07356456f, -0.06132074f, -0.04906767f, -0.03680722f,\n    -0.02454123f, -0.01227154f, -0.00000000f};\n\n/**\n  @par\n  Table values are in Q31 (1.31 fixed-point format) and generation is done in\n  three steps.  First, generate sin values in floating point:\n  
\n  tableSize = 512;\n  for (n = 0; n < (tableSize + 1); n++)\n  {\n        sinTable[n] = sin(2*PI*n/tableSize);\n  } 
\n  where PI value is 3.14159265358979\n @par\n  Second, convert floating-point to Q31 (Fixed point):\n        (sinTable[i] * pow(2, 31))\n @par\n  Finally, round to the nearest integer value:\n        sinTable[i] += (sinTable[i] > 0 ? 0.5 : -0.5);\n */\nconst q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = {0L,\n                                                      26352928L,\n                                                      52701887L,\n                                                      79042909L,\n                                                      105372028L,\n                                                      131685278L,\n                                                      157978697L,\n                                                      184248325L,\n                                                      210490206L,\n                                                      236700388L,\n                                                      262874923L,\n                                                      289009871L,\n                                                      315101295L,\n                                                      341145265L,\n                                                      367137861L,\n                                                      393075166L,\n                                                      418953276L,\n                                                      444768294L,\n                                                      470516330L,\n                                                      496193509L,\n                                                      521795963L,\n                                                      547319836L,\n                                                      572761285L,\n                                                      598116479L,\n                                                      623381598L,\n                                                      648552838L,\n                                                      673626408L,\n                                                      698598533L,\n                                                      723465451L,\n                                                      748223418L,\n                                                      772868706L,\n                                                      797397602L,\n                                                      821806413L,\n                                                      846091463L,\n                                                      870249095L,\n                                                      894275671L,\n                                                      918167572L,\n                                                      941921200L,\n                                                      965532978L,\n                                                      988999351L,\n                                                      1012316784L,\n                                                      1035481766L,\n                                                      1058490808L,\n                                                      1081340445L,\n                                                      1104027237L,\n                                                      1126547765L,\n                                                      1148898640L,\n                                                      1171076495L,\n                                                      1193077991L,\n                                                      1214899813L,\n                                                      1236538675L,\n                                                      1257991320L,\n                                                      1279254516L,\n                                                      1300325060L,\n                                                      1321199781L,\n                                                      1341875533L,\n                                                      1362349204L,\n                                                      1382617710L,\n                                                      1402678000L,\n                                                      1422527051L,\n                                                      1442161874L,\n                                                      1461579514L,\n                                                      1480777044L,\n                                                      1499751576L,\n                                                      1518500250L,\n                                                      1537020244L,\n                                                      1555308768L,\n                                                      1573363068L,\n                                                      1591180426L,\n                                                      1608758157L,\n                                                      1626093616L,\n                                                      1643184191L,\n                                                      1660027308L,\n                                                      1676620432L,\n                                                      1692961062L,\n                                                      1709046739L,\n                                                      1724875040L,\n                                                      1740443581L,\n                                                      1755750017L,\n                                                      1770792044L,\n                                                      1785567396L,\n                                                      1800073849L,\n                                                      1814309216L,\n                                                      1828271356L,\n                                                      1841958164L,\n                                                      1855367581L,\n                                                      1868497586L,\n                                                      1881346202L,\n                                                      1893911494L,\n                                                      1906191570L,\n                                                      1918184581L,\n                                                      1929888720L,\n                                                      1941302225L,\n                                                      1952423377L,\n                                                      1963250501L,\n                                                      1973781967L,\n                                                      1984016189L,\n                                                      1993951625L,\n                                                      2003586779L,\n                                                      2012920201L,\n                                                      2021950484L,\n                                                      2030676269L,\n                                                      2039096241L,\n                                                      2047209133L,\n                                                      2055013723L,\n                                                      2062508835L,\n                                                      2069693342L,\n                                                      2076566160L,\n                                                      2083126254L,\n                                                      2089372638L,\n                                                      2095304370L,\n                                                      2100920556L,\n                                                      2106220352L,\n                                                      2111202959L,\n                                                      2115867626L,\n                                                      2120213651L,\n                                                      2124240380L,\n                                                      2127947206L,\n                                                      2131333572L,\n                                                      2134398966L,\n                                                      2137142927L,\n                                                      2139565043L,\n                                                      2141664948L,\n                                                      2143442326L,\n                                                      2144896910L,\n                                                      2146028480L,\n                                                      2146836866L,\n                                                      2147321946L,\n                                                      2147483647L,\n                                                      2147321946L,\n                                                      2146836866L,\n                                                      2146028480L,\n                                                      2144896910L,\n                                                      2143442326L,\n                                                      2141664948L,\n                                                      2139565043L,\n                                                      2137142927L,\n                                                      2134398966L,\n                                                      2131333572L,\n                                                      2127947206L,\n                                                      2124240380L,\n                                                      2120213651L,\n                                                      2115867626L,\n                                                      2111202959L,\n                                                      2106220352L,\n                                                      2100920556L,\n                                                      2095304370L,\n                                                      2089372638L,\n                                                      2083126254L,\n                                                      2076566160L,\n                                                      2069693342L,\n                                                      2062508835L,\n                                                      2055013723L,\n                                                      2047209133L,\n                                                      2039096241L,\n                                                      2030676269L,\n                                                      2021950484L,\n                                                      2012920201L,\n                                                      2003586779L,\n                                                      1993951625L,\n                                                      1984016189L,\n                                                      1973781967L,\n                                                      1963250501L,\n                                                      1952423377L,\n                                                      1941302225L,\n                                                      1929888720L,\n                                                      1918184581L,\n                                                      1906191570L,\n                                                      1893911494L,\n                                                      1881346202L,\n                                                      1868497586L,\n                                                      1855367581L,\n                                                      1841958164L,\n                                                      1828271356L,\n                                                      1814309216L,\n                                                      1800073849L,\n                                                      1785567396L,\n                                                      1770792044L,\n                                                      1755750017L,\n                                                      1740443581L,\n                                                      1724875040L,\n                                                      1709046739L,\n                                                      1692961062L,\n                                                      1676620432L,\n                                                      1660027308L,\n                                                      1643184191L,\n                                                      1626093616L,\n                                                      1608758157L,\n                                                      1591180426L,\n                                                      1573363068L,\n                                                      1555308768L,\n                                                      1537020244L,\n                                                      1518500250L,\n                                                      1499751576L,\n                                                      1480777044L,\n                                                      1461579514L,\n                                                      1442161874L,\n                                                      1422527051L,\n                                                      1402678000L,\n                                                      1382617710L,\n                                                      1362349204L,\n                                                      1341875533L,\n                                                      1321199781L,\n                                                      1300325060L,\n                                                      1279254516L,\n                                                      1257991320L,\n                                                      1236538675L,\n                                                      1214899813L,\n                                                      1193077991L,\n                                                      1171076495L,\n                                                      1148898640L,\n                                                      1126547765L,\n                                                      1104027237L,\n                                                      1081340445L,\n                                                      1058490808L,\n                                                      1035481766L,\n                                                      1012316784L,\n                                                      988999351L,\n                                                      965532978L,\n                                                      941921200L,\n                                                      918167572L,\n                                                      894275671L,\n                                                      870249095L,\n                                                      846091463L,\n                                                      821806413L,\n                                                      797397602L,\n                                                      772868706L,\n                                                      748223418L,\n                                                      723465451L,\n                                                      698598533L,\n                                                      673626408L,\n                                                      648552838L,\n                                                      623381598L,\n                                                      598116479L,\n                                                      572761285L,\n                                                      547319836L,\n                                                      521795963L,\n                                                      496193509L,\n                                                      470516330L,\n                                                      444768294L,\n                                                      418953276L,\n                                                      393075166L,\n                                                      367137861L,\n                                                      341145265L,\n                                                      315101295L,\n                                                      289009871L,\n                                                      262874923L,\n                                                      236700388L,\n                                                      210490206L,\n                                                      184248325L,\n                                                      157978697L,\n                                                      131685278L,\n                                                      105372028L,\n                                                      79042909L,\n                                                      52701887L,\n                                                      26352928L,\n                                                      0L,\n                                                      -26352928L,\n                                                      -52701887L,\n                                                      -79042909L,\n                                                      -105372028L,\n                                                      -131685278L,\n                                                      -157978697L,\n                                                      -184248325L,\n                                                      -210490206L,\n                                                      -236700388L,\n                                                      -262874923L,\n                                                      -289009871L,\n                                                      -315101295L,\n                                                      -341145265L,\n                                                      -367137861L,\n                                                      -393075166L,\n                                                      -418953276L,\n                                                      -444768294L,\n                                                      -470516330L,\n                                                      -496193509L,\n                                                      -521795963L,\n                                                      -547319836L,\n                                                      -572761285L,\n                                                      -598116479L,\n                                                      -623381598L,\n                                                      -648552838L,\n                                                      -673626408L,\n                                                      -698598533L,\n                                                      -723465451L,\n                                                      -748223418L,\n                                                      -772868706L,\n                                                      -797397602L,\n                                                      -821806413L,\n                                                      -846091463L,\n                                                      -870249095L,\n                                                      -894275671L,\n                                                      -918167572L,\n                                                      -941921200L,\n                                                      -965532978L,\n                                                      -988999351L,\n                                                      -1012316784L,\n                                                      -1035481766L,\n                                                      -1058490808L,\n                                                      -1081340445L,\n                                                      -1104027237L,\n                                                      -1126547765L,\n                                                      -1148898640L,\n                                                      -1171076495L,\n                                                      -1193077991L,\n                                                      -1214899813L,\n                                                      -1236538675L,\n                                                      -1257991320L,\n                                                      -1279254516L,\n                                                      -1300325060L,\n                                                      -1321199781L,\n                                                      -1341875533L,\n                                                      -1362349204L,\n                                                      -1382617710L,\n                                                      -1402678000L,\n                                                      -1422527051L,\n                                                      -1442161874L,\n                                                      -1461579514L,\n                                                      -1480777044L,\n                                                      -1499751576L,\n                                                      -1518500250L,\n                                                      -1537020244L,\n                                                      -1555308768L,\n                                                      -1573363068L,\n                                                      -1591180426L,\n                                                      -1608758157L,\n                                                      -1626093616L,\n                                                      -1643184191L,\n                                                      -1660027308L,\n                                                      -1676620432L,\n                                                      -1692961062L,\n                                                      -1709046739L,\n                                                      -1724875040L,\n                                                      -1740443581L,\n                                                      -1755750017L,\n                                                      -1770792044L,\n                                                      -1785567396L,\n                                                      -1800073849L,\n                                                      -1814309216L,\n                                                      -1828271356L,\n                                                      -1841958164L,\n                                                      -1855367581L,\n                                                      -1868497586L,\n                                                      -1881346202L,\n                                                      -1893911494L,\n                                                      -1906191570L,\n                                                      -1918184581L,\n                                                      -1929888720L,\n                                                      -1941302225L,\n                                                      -1952423377L,\n                                                      -1963250501L,\n                                                      -1973781967L,\n                                                      -1984016189L,\n                                                      -1993951625L,\n                                                      -2003586779L,\n                                                      -2012920201L,\n                                                      -2021950484L,\n                                                      -2030676269L,\n                                                      -2039096241L,\n                                                      -2047209133L,\n                                                      -2055013723L,\n                                                      -2062508835L,\n                                                      -2069693342L,\n                                                      -2076566160L,\n                                                      -2083126254L,\n                                                      -2089372638L,\n                                                      -2095304370L,\n                                                      -2100920556L,\n                                                      -2106220352L,\n                                                      -2111202959L,\n                                                      -2115867626L,\n                                                      -2120213651L,\n                                                      -2124240380L,\n                                                      -2127947206L,\n                                                      -2131333572L,\n                                                      -2134398966L,\n                                                      -2137142927L,\n                                                      -2139565043L,\n                                                      -2141664948L,\n                                                      -2143442326L,\n                                                      -2144896910L,\n                                                      -2146028480L,\n                                                      -2146836866L,\n                                                      -2147321946L,\n                                                      (q31_t)0x80000000,\n                                                      -2147321946L,\n                                                      -2146836866L,\n                                                      -2146028480L,\n                                                      -2144896910L,\n                                                      -2143442326L,\n                                                      -2141664948L,\n                                                      -2139565043L,\n                                                      -2137142927L,\n                                                      -2134398966L,\n                                                      -2131333572L,\n                                                      -2127947206L,\n                                                      -2124240380L,\n                                                      -2120213651L,\n                                                      -2115867626L,\n                                                      -2111202959L,\n                                                      -2106220352L,\n                                                      -2100920556L,\n                                                      -2095304370L,\n                                                      -2089372638L,\n                                                      -2083126254L,\n                                                      -2076566160L,\n                                                      -2069693342L,\n                                                      -2062508835L,\n                                                      -2055013723L,\n                                                      -2047209133L,\n                                                      -2039096241L,\n                                                      -2030676269L,\n                                                      -2021950484L,\n                                                      -2012920201L,\n                                                      -2003586779L,\n                                                      -1993951625L,\n                                                      -1984016189L,\n                                                      -1973781967L,\n                                                      -1963250501L,\n                                                      -1952423377L,\n                                                      -1941302225L,\n                                                      -1929888720L,\n                                                      -1918184581L,\n                                                      -1906191570L,\n                                                      -1893911494L,\n                                                      -1881346202L,\n                                                      -1868497586L,\n                                                      -1855367581L,\n                                                      -1841958164L,\n                                                      -1828271356L,\n                                                      -1814309216L,\n                                                      -1800073849L,\n                                                      -1785567396L,\n                                                      -1770792044L,\n                                                      -1755750017L,\n                                                      -1740443581L,\n                                                      -1724875040L,\n                                                      -1709046739L,\n                                                      -1692961062L,\n                                                      -1676620432L,\n                                                      -1660027308L,\n                                                      -1643184191L,\n                                                      -1626093616L,\n                                                      -1608758157L,\n                                                      -1591180426L,\n                                                      -1573363068L,\n                                                      -1555308768L,\n                                                      -1537020244L,\n                                                      -1518500250L,\n                                                      -1499751576L,\n                                                      -1480777044L,\n                                                      -1461579514L,\n                                                      -1442161874L,\n                                                      -1422527051L,\n                                                      -1402678000L,\n                                                      -1382617710L,\n                                                      -1362349204L,\n                                                      -1341875533L,\n                                                      -1321199781L,\n                                                      -1300325060L,\n                                                      -1279254516L,\n                                                      -1257991320L,\n                                                      -1236538675L,\n                                                      -1214899813L,\n                                                      -1193077991L,\n                                                      -1171076495L,\n                                                      -1148898640L,\n                                                      -1126547765L,\n                                                      -1104027237L,\n                                                      -1081340445L,\n                                                      -1058490808L,\n                                                      -1035481766L,\n                                                      -1012316784L,\n                                                      -988999351L,\n                                                      -965532978L,\n                                                      -941921200L,\n                                                      -918167572L,\n                                                      -894275671L,\n                                                      -870249095L,\n                                                      -846091463L,\n                                                      -821806413L,\n                                                      -797397602L,\n                                                      -772868706L,\n                                                      -748223418L,\n                                                      -723465451L,\n                                                      -698598533L,\n                                                      -673626408L,\n                                                      -648552838L,\n                                                      -623381598L,\n                                                      -598116479L,\n                                                      -572761285L,\n                                                      -547319836L,\n                                                      -521795963L,\n                                                      -496193509L,\n                                                      -470516330L,\n                                                      -444768294L,\n                                                      -418953276L,\n                                                      -393075166L,\n                                                      -367137861L,\n                                                      -341145265L,\n                                                      -315101295L,\n                                                      -289009871L,\n                                                      -262874923L,\n                                                      -236700388L,\n                                                      -210490206L,\n                                                      -184248325L,\n                                                      -157978697L,\n                                                      -131685278L,\n                                                      -105372028L,\n                                                      -79042909L,\n                                                      -52701887L,\n                                                      -26352928L,\n                                                      0};\n\n/**\n  @par\n  Table values are in Q15 (1.15 fixed-point format) and generation is done in\n  three steps.  First,  generate sin values in floating point:\n  
\n  tableSize = 512;\n  for (n = 0; n < (tableSize + 1); n++)\n  {\n        sinTable[n] = sin(2*PI*n/tableSize);\n  } 
\n  where PI value is  3.14159265358979\n @par\n  Second, convert floating-point to Q15 (Fixed point):\n        (sinTable[i] * pow(2, 15))\n @par\n  Finally, round to the nearest integer value:\n        sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);\n */\nconst q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = {\n    0,      402,    804,    1206,   1608,   2009,   2411,   2811,   3212,\n    3612,   4011,   4410,   4808,   5205,   5602,   5998,   6393,   6787,\n    7180,   7571,   7962,   8351,   8740,   9127,   9512,   9896,   10279,\n    10660,  11039,  11417,  11793,  12167,  12540,  12910,  13279,  13646,\n    14010,  14373,  14733,  15091,  15447,  15800,  16151,  16500,  16846,\n    17190,  17531,  17869,  18205,  18538,  18868,  19195,  19520,  19841,\n    20160,  20475,  20788,  21097,  21403,  21706,  22006,  22302,  22595,\n    22884,  23170,  23453,  23732,  24008,  24279,  24548,  24812,  25073,\n    25330,  25583,  25833,  26078,  26320,  26557,  26791,  27020,  27246,\n    27467,  27684,  27897,  28106,  28311,  28511,  28707,  28899,  29086,\n    29269,  29448,  29622,  29792,  29957,  30118,  30274,  30425,  30572,\n    30715,  30853,  30986,  31114,  31238,  31357,  31471,  31581,  31686,\n    31786,  31881,  31972,  32058,  32138,  32214,  32286,  32352,  32413,\n    32470,  32522,  32568,  32610,  32647,  32679,  32706,  32729,  32746,\n    32758,  32766,  32767,  32766,  32758,  32746,  32729,  32706,  32679,\n    32647,  32610,  32568,  32522,  32470,  32413,  32352,  32286,  32214,\n    32138,  32058,  31972,  31881,  31786,  31686,  31581,  31471,  31357,\n    31238,  31114,  30986,  30853,  30715,  30572,  30425,  30274,  30118,\n    29957,  29792,  29622,  29448,  29269,  29086,  28899,  28707,  28511,\n    28311,  28106,  27897,  27684,  27467,  27246,  27020,  26791,  26557,\n    26320,  26078,  25833,  25583,  25330,  25073,  24812,  24548,  24279,\n    24008,  23732,  23453,  23170,  22884,  22595,  22302,  22006,  21706,\n    21403,  21097,  20788,  20475,  20160,  19841,  19520,  19195,  18868,\n    18538,  18205,  17869,  17531,  17190,  16846,  16500,  16151,  15800,\n    15447,  15091,  14733,  14373,  14010,  13646,  13279,  12910,  12540,\n    12167,  11793,  11417,  11039,  10660,  10279,  9896,   9512,   9127,\n    8740,   8351,   7962,   7571,   7180,   6787,   6393,   5998,   5602,\n    5205,   4808,   4410,   4011,   3612,   3212,   2811,   2411,   2009,\n    1608,   1206,   804,    402,    0,      -402,   -804,   -1206,  -1608,\n    -2009,  -2411,  -2811,  -3212,  -3612,  -4011,  -4410,  -4808,  -5205,\n    -5602,  -5998,  -6393,  -6787,  -7180,  -7571,  -7962,  -8351,  -8740,\n    -9127,  -9512,  -9896,  -10279, -10660, -11039, -11417, -11793, -12167,\n    -12540, -12910, -13279, -13646, -14010, -14373, -14733, -15091, -15447,\n    -15800, -16151, -16500, -16846, -17190, -17531, -17869, -18205, -18538,\n    -18868, -19195, -19520, -19841, -20160, -20475, -20788, -21097, -21403,\n    -21706, -22006, -22302, -22595, -22884, -23170, -23453, -23732, -24008,\n    -24279, -24548, -24812, -25073, -25330, -25583, -25833, -26078, -26320,\n    -26557, -26791, -27020, -27246, -27467, -27684, -27897, -28106, -28311,\n    -28511, -28707, -28899, -29086, -29269, -29448, -29622, -29792, -29957,\n    -30118, -30274, -30425, -30572, -30715, -30853, -30986, -31114, -31238,\n    -31357, -31471, -31581, -31686, -31786, -31881, -31972, -32058, -32138,\n    -32214, -32286, -32352, -32413, -32470, -32522, -32568, -32610, -32647,\n    -32679, -32706, -32729, -32746, -32758, -32766, -32768, -32766, -32758,\n    -32746, -32729, -32706, -32679, -32647, -32610, -32568, -32522, -32470,\n    -32413, -32352, -32286, -32214, -32138, -32058, -31972, -31881, -31786,\n    -31686, -31581, -31471, -31357, -31238, -31114, -30986, -30853, -30715,\n    -30572, -30425, -30274, -30118, -29957, -29792, -29622, -29448, -29269,\n    -29086, -28899, -28707, -28511, -28311, -28106, -27897, -27684, -27467,\n    -27246, -27020, -26791, -26557, -26320, -26078, -25833, -25583, -25330,\n    -25073, -24812, -24548, -24279, -24008, -23732, -23453, -23170, -22884,\n    -22595, -22302, -22006, -21706, -21403, -21097, -20788, -20475, -20160,\n    -19841, -19520, -19195, -18868, -18538, -18205, -17869, -17531, -17190,\n    -16846, -16500, -16151, -15800, -15447, -15091, -14733, -14373, -14010,\n    -13646, -13279, -12910, -12540, -12167, -11793, -11417, -11039, -10660,\n    -10279, -9896,  -9512,  -9127,  -8740,  -8351,  -7962,  -7571,  -7180,\n    -6787,  -6393,  -5998,  -5602,  -5205,  -4808,  -4410,  -4011,  -3612,\n    -3212,  -2811,  -2411,  -2009,  -1608,  -1206,  -804,   -402,   0};\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/CommonTables/arm_const_structs.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_const_structs.c\n * Description:  Constant structs that are initialized for user convenience.\n *               For example, some can be given as arguments to the\n * arm_cfft_f32() or arm_rfft_f32() functions.\n *\n * $Date:        27. January 2017\n * $Revision:    V.1.5.1\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_const_structs.h\"\n\n/* Floating-point structs */\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {\n    16, twiddleCoef_16, armBitRevIndexTable16,\n    ARMBITREVINDEXTABLE_16_TABLE_LENGTH};\n\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {\n    32, twiddleCoef_32, armBitRevIndexTable32,\n    ARMBITREVINDEXTABLE_32_TABLE_LENGTH};\n\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {\n    64, twiddleCoef_64, armBitRevIndexTable64,\n    ARMBITREVINDEXTABLE_64_TABLE_LENGTH};\n\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {\n    128, twiddleCoef_128, armBitRevIndexTable128,\n    ARMBITREVINDEXTABLE_128_TABLE_LENGTH};\n\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {\n    256, twiddleCoef_256, armBitRevIndexTable256,\n    ARMBITREVINDEXTABLE_256_TABLE_LENGTH};\n\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {\n    512, twiddleCoef_512, armBitRevIndexTable512,\n    ARMBITREVINDEXTABLE_512_TABLE_LENGTH};\n\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {\n    1024, twiddleCoef_1024, armBitRevIndexTable1024,\n    ARMBITREVINDEXTABLE_1024_TABLE_LENGTH};\n\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {\n    2048, twiddleCoef_2048, armBitRevIndexTable2048,\n    ARMBITREVINDEXTABLE_2048_TABLE_LENGTH};\n\nconst arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {\n    4096, twiddleCoef_4096, armBitRevIndexTable4096,\n    ARMBITREVINDEXTABLE_4096_TABLE_LENGTH};\n\n/* Fixed-point structs */\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {\n    16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16,\n    ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH};\n\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {\n    32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32,\n    ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH};\n\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {\n    64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64,\n    ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH};\n\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {\n    128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128,\n    ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH};\n\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {\n    256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256,\n    ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH};\n\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {\n    512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512,\n    ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH};\n\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {\n    1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024,\n    ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH};\n\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {\n    2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048,\n    ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH};\n\nconst arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {\n    4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096,\n    ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {\n    16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16,\n    ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {\n    32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32,\n    ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {\n    64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64,\n    ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {\n    128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128,\n    ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {\n    256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256,\n    ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {\n    512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512,\n    ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {\n    1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024,\n    ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {\n    2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048,\n    ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH};\n\nconst arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {\n    4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096,\n    ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH};\n\n/* Structure for real-value inputs */\n/* Floating-point structs */\nconst arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {\n    {16, twiddleCoef_32, armBitRevIndexTable32,\n     ARMBITREVINDEXTABLE_16_TABLE_LENGTH},\n    32U,\n    (float32_t *)twiddleCoef_rfft_32};\n\nconst arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {\n    {32, twiddleCoef_32, armBitRevIndexTable32,\n     ARMBITREVINDEXTABLE_32_TABLE_LENGTH},\n    64U,\n    (float32_t *)twiddleCoef_rfft_64};\n\nconst arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {\n    {64, twiddleCoef_64, armBitRevIndexTable64,\n     ARMBITREVINDEXTABLE_64_TABLE_LENGTH},\n    128U,\n    (float32_t *)twiddleCoef_rfft_128};\n\nconst arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {\n    {128, twiddleCoef_128, armBitRevIndexTable128,\n     ARMBITREVINDEXTABLE_128_TABLE_LENGTH},\n    256U,\n    (float32_t *)twiddleCoef_rfft_256};\n\nconst arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {\n    {256, twiddleCoef_256, armBitRevIndexTable256,\n     ARMBITREVINDEXTABLE_256_TABLE_LENGTH},\n    512U,\n    (float32_t *)twiddleCoef_rfft_512};\n\nconst arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {\n    {512, twiddleCoef_512, armBitRevIndexTable512,\n     ARMBITREVINDEXTABLE_512_TABLE_LENGTH},\n    1024U,\n    (float32_t *)twiddleCoef_rfft_1024};\n\nconst arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {\n    {1024, twiddleCoef_1024, armBitRevIndexTable1024,\n     ARMBITREVINDEXTABLE_1024_TABLE_LENGTH},\n    2048U,\n    (float32_t *)twiddleCoef_rfft_2048};\n\nconst arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {\n    {2048, twiddleCoef_2048, armBitRevIndexTable2048,\n     ARMBITREVINDEXTABLE_2048_TABLE_LENGTH},\n    4096U,\n    (float32_t *)twiddleCoef_rfft_4096};\n\n/* Fixed-point structs */\n/* q31_t */\nextern const q31_t realCoefAQ31[8192];\nextern const q31_t realCoefBQ31[8192];\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {32U,\n                                                     0,\n                                                     1,\n                                                     256U,\n                                                     (q31_t *)realCoefAQ31,\n                                                     (q31_t *)realCoefBQ31,\n                                                     &arm_cfft_sR_q31_len16};\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {64U,\n                                                     0,\n                                                     1,\n                                                     128U,\n                                                     (q31_t *)realCoefAQ31,\n                                                     (q31_t *)realCoefBQ31,\n                                                     &arm_cfft_sR_q31_len32};\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {128U,\n                                                      0,\n                                                      1,\n                                                      64U,\n                                                      (q31_t *)realCoefAQ31,\n                                                      (q31_t *)realCoefBQ31,\n                                                      &arm_cfft_sR_q31_len64};\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {256U,\n                                                      0,\n                                                      1,\n                                                      32U,\n                                                      (q31_t *)realCoefAQ31,\n                                                      (q31_t *)realCoefBQ31,\n                                                      &arm_cfft_sR_q31_len128};\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {512U,\n                                                      0,\n                                                      1,\n                                                      16U,\n                                                      (q31_t *)realCoefAQ31,\n                                                      (q31_t *)realCoefBQ31,\n                                                      &arm_cfft_sR_q31_len256};\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {1024U,\n                                                       0,\n                                                       1,\n                                                       8U,\n                                                       (q31_t *)realCoefAQ31,\n                                                       (q31_t *)realCoefBQ31,\n                                                       &arm_cfft_sR_q31_len512};\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {\n    2048U,\n    0,\n    1,\n    4U,\n    (q31_t *)realCoefAQ31,\n    (q31_t *)realCoefBQ31,\n    &arm_cfft_sR_q31_len1024};\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {\n    4096U,\n    0,\n    1,\n    2U,\n    (q31_t *)realCoefAQ31,\n    (q31_t *)realCoefBQ31,\n    &arm_cfft_sR_q31_len2048};\n\nconst arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {\n    8192U,\n    0,\n    1,\n    1U,\n    (q31_t *)realCoefAQ31,\n    (q31_t *)realCoefBQ31,\n    &arm_cfft_sR_q31_len4096};\n\n/* q15_t */\nextern const q15_t realCoefAQ15[8192];\nextern const q15_t realCoefBQ15[8192];\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {32U,\n                                                     0,\n                                                     1,\n                                                     256U,\n                                                     (q15_t *)realCoefAQ15,\n                                                     (q15_t *)realCoefBQ15,\n                                                     &arm_cfft_sR_q15_len16};\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {64U,\n                                                     0,\n                                                     1,\n                                                     128U,\n                                                     (q15_t *)realCoefAQ15,\n                                                     (q15_t *)realCoefBQ15,\n                                                     &arm_cfft_sR_q15_len32};\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {128U,\n                                                      0,\n                                                      1,\n                                                      64U,\n                                                      (q15_t *)realCoefAQ15,\n                                                      (q15_t *)realCoefBQ15,\n                                                      &arm_cfft_sR_q15_len64};\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {256U,\n                                                      0,\n                                                      1,\n                                                      32U,\n                                                      (q15_t *)realCoefAQ15,\n                                                      (q15_t *)realCoefBQ15,\n                                                      &arm_cfft_sR_q15_len128};\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {512U,\n                                                      0,\n                                                      1,\n                                                      16U,\n                                                      (q15_t *)realCoefAQ15,\n                                                      (q15_t *)realCoefBQ15,\n                                                      &arm_cfft_sR_q15_len256};\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {1024U,\n                                                       0,\n                                                       1,\n                                                       8U,\n                                                       (q15_t *)realCoefAQ15,\n                                                       (q15_t *)realCoefBQ15,\n                                                       &arm_cfft_sR_q15_len512};\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {\n    2048U,\n    0,\n    1,\n    4U,\n    (q15_t *)realCoefAQ15,\n    (q15_t *)realCoefBQ15,\n    &arm_cfft_sR_q15_len1024};\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {\n    4096U,\n    0,\n    1,\n    2U,\n    (q15_t *)realCoefAQ15,\n    (q15_t *)realCoefBQ15,\n    &arm_cfft_sR_q15_len2048};\n\nconst arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {\n    8192U,\n    0,\n    1,\n    1U,\n    (q15_t *)realCoefAQ15,\n    (q15_t *)realCoefBQ15,\n    &arm_cfft_sR_q15_len4096};\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/ComplexMathFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        CompexMathFunctions.c\n * Description:  Combination of all comlex math function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_cmplx_conj_f32.c\"\n#include \"arm_cmplx_conj_q15.c\"\n#include \"arm_cmplx_conj_q31.c\"\n#include \"arm_cmplx_dot_prod_f32.c\"\n#include \"arm_cmplx_dot_prod_q15.c\"\n#include \"arm_cmplx_dot_prod_q31.c\"\n#include \"arm_cmplx_mag_f32.c\"\n#include \"arm_cmplx_mag_q15.c\"\n#include \"arm_cmplx_mag_q31.c\"\n#include \"arm_cmplx_mag_squared_f32.c\"\n#include \"arm_cmplx_mag_squared_q15.c\"\n#include \"arm_cmplx_mag_squared_q31.c\"\n#include \"arm_cmplx_mult_cmplx_f32.c\"\n#include \"arm_cmplx_mult_cmplx_q15.c\"\n#include \"arm_cmplx_mult_cmplx_q31.c\"\n#include \"arm_cmplx_mult_real_f32.c\"\n#include \"arm_cmplx_mult_real_q15.c\"\n#include \"arm_cmplx_mult_real_q31.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_conj_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_conj_f32.c\n * Description:  Floating-point complex conjugate\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @defgroup cmplx_conj Complex Conjugate\n\n  Conjugates the elements of a complex data vector.\n\n  The pSrc points to the source data and\n  pDst points to the destination data where the result should be\n  written. numSamples specifies the number of complex samples and\n  the data in each array is stored in an interleaved fashion (real, imag, real,\n  imag, ...). Each array has a total of 2*numSamples values.\n\n  The underlying algorithm is used:\n  
\n  for (n = 0; n < numSamples; n++) {\n      pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part\n      pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part\n  }\n  
\n\n  There are separate functions for floating-point, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup cmplx_conj\n  @{\n */\n\n/**\n  @brief         Floating-point complex conjugate.\n  @param[in]     pSrc        points to the input vector\n  @param[out]    pDst        points to the output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n */\n\nvoid arm_cmplx_conj_f32(const float32_t *pSrc, float32_t *pDst,\n                        uint32_t numSamples) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */\n\n    /* Calculate Complex Conjugate and store result in destination buffer. */\n    *pDst++ = *pSrc++;\n    *pDst++ = -*pSrc++;\n\n    *pDst++ = *pSrc++;\n    *pDst++ = -*pSrc++;\n\n    *pDst++ = *pSrc++;\n    *pDst++ = -*pSrc++;\n\n    *pDst++ = *pSrc++;\n    *pDst++ = -*pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */\n\n    /* Calculate Complex Conjugate and store result in destination buffer. */\n    *pDst++ = *pSrc++;\n    *pDst++ = -*pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_conj group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_conj_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_conj_q15.c\n * Description:  Q15 complex conjugate\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup cmplx_conj\n  @{\n */\n\n/**\n  @brief         Q15 complex conjugate.\n  @param[in]     pSrc        points to the input vector\n  @param[out]    pDst        points to the output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   The Q15 value -1 (0x8000) is saturated to the maximum\n  allowable positive value 0x7FFF.\n */\n\nvoid arm_cmplx_conj_q15(const q15_t *pSrc, q15_t *pDst, uint32_t numSamples) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t in1;       /* Temporary input variable */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in2, in3, in4; /* Temporary input variables */\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */\n\n    /* Calculate Complex Conjugate and store result in destination buffer. */\n\n#if defined(ARM_MATH_DSP)\n    in1 = read_q15x2_ia((q15_t **)&pSrc);\n    in2 = read_q15x2_ia((q15_t **)&pSrc);\n    in3 = read_q15x2_ia((q15_t **)&pSrc);\n    in4 = read_q15x2_ia((q15_t **)&pSrc);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    in1 = __QASX(0, in1);\n    in2 = __QASX(0, in2);\n    in3 = __QASX(0, in3);\n    in4 = __QASX(0, in4);\n#else\n    in1 = __QSAX(0, in1);\n    in2 = __QSAX(0, in2);\n    in3 = __QSAX(0, in3);\n    in4 = __QSAX(0, in4);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    in1 = ((uint32_t)in1 >> 16) | ((uint32_t)in1 << 16);\n    in2 = ((uint32_t)in2 >> 16) | ((uint32_t)in2 << 16);\n    in3 = ((uint32_t)in3 >> 16) | ((uint32_t)in3 << 16);\n    in4 = ((uint32_t)in4 >> 16) | ((uint32_t)in4 << 16);\n\n    write_q15x2_ia(&pDst, in1);\n    write_q15x2_ia(&pDst, in2);\n    write_q15x2_ia(&pDst, in3);\n    write_q15x2_ia(&pDst, in4);\n#else\n    *pDst++ = *pSrc++;\n    in1 = *pSrc++;\n    *pDst++ = (in1 == (q15_t)0x8000) ? (q15_t)0x7fff : -in1;\n\n    *pDst++ = *pSrc++;\n    in1 = *pSrc++;\n    *pDst++ = (in1 == (q15_t)0x8000) ? (q15_t)0x7fff : -in1;\n\n    *pDst++ = *pSrc++;\n    in1 = *pSrc++;\n    *pDst++ = (in1 == (q15_t)0x8000) ? (q15_t)0x7fff : -in1;\n\n    *pDst++ = *pSrc++;\n    in1 = *pSrc++;\n    *pDst++ = (in1 == (q15_t)0x8000) ? (q15_t)0x7fff : -in1;\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */\n\n    /* Calculate Complex Conjugate and store result in destination buffer. */\n    *pDst++ = *pSrc++;\n    in1 = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __SSAT(-in1, 16);\n#else\n    *pDst++ = (in1 == (q15_t)0x8000) ? (q15_t)0x7fff : -in1;\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_conj group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_conj_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_conj_q31.c\n * Description:  Q31 complex conjugate\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup cmplx_conj\n  @{\n */\n\n/**\n  @brief         Q31 complex conjugate.\n  @param[in]     pSrc        points to the input vector\n  @param[out]    pDst        points to the output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   The Q31 value -1 (0x80000000) is saturated to the maximum\n  allowable positive value 0x7FFFFFFF.\n */\n\nvoid arm_cmplx_conj_q31(const q31_t *pSrc, q31_t *pDst, uint32_t numSamples) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t in;        /* Temporary input variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */\n\n    /* Calculate Complex Conjugate and store result in destination buffer. */\n    *pDst++ = *pSrc++;\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    *pDst++ = *pSrc++;\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    *pDst++ = *pSrc++;\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    *pDst++ = *pSrc++;\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */\n\n    /* Calculate Complex Conjugate and store result in destination buffer. */\n    *pDst++ = *pSrc++;\n    in = *pSrc++;\n#if defined(ARM_MATH_DSP)\n    *pDst++ = __QSUB(0, in);\n#else\n    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_conj group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_dot_prod_f32.c\n * Description:  Floating-point complex dot product\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @defgroup cmplx_dot_prod Complex Dot Product\n\n  Computes the dot product of two complex vectors.\n  The vectors are multiplied element-by-element and then summed.\n\n  The pSrcA points to the first complex input vector and\n  pSrcB points to the second complex input vector.\n  numSamples specifies the number of complex samples\n  and the data in each array is stored in an interleaved fashion\n  (real, imag, real, imag, ...).\n  Each array has a total of 2*numSamples values.\n\n  The underlying algorithm is used:\n\n  
\n  realResult = 0;\n  imagResult = 0;\n  for (n = 0; n < numSamples; n++) {\n      realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] *\n  pSrcB[(2*n)+1]; imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1]\n  * pSrcB[(2*n)+0];\n  }\n  
\n\n  There are separate functions for floating-point, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup cmplx_dot_prod\n  @{\n */\n\n/**\n  @brief         Floating-point complex dot product.\n  @param[in]     pSrcA       points to the first input vector\n  @param[in]     pSrcB       points to the second input vector\n  @param[in]     numSamples  number of samples in each vector\n  @param[out]    realResult  real part of the result returned here\n  @param[out]    imagResult  imaginary part of the result returned here\n  @return        none\n */\n\nvoid arm_cmplx_dot_prod_f32(const float32_t *pSrcA, const float32_t *pSrcB,\n                            uint32_t numSamples, float32_t *realResult,\n                            float32_t *imagResult) {\n  uint32_t blkCnt;                            /* Loop counter */\n  float32_t real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result variables */\n  float32_t a0, b0, c0, d0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += a0 * c0;\n    imag_sum += a0 * d0;\n    real_sum -= b0 * d0;\n    imag_sum += b0 * c0;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += a0 * c0;\n    imag_sum += a0 * d0;\n    real_sum -= b0 * d0;\n    imag_sum += b0 * c0;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += a0 * c0;\n    imag_sum += a0 * d0;\n    real_sum -= b0 * d0;\n    imag_sum += b0 * c0;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += a0 * c0;\n    imag_sum += a0 * d0;\n    real_sum -= b0 * d0;\n    imag_sum += b0 * c0;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += a0 * c0;\n    imag_sum += a0 * d0;\n    real_sum -= b0 * d0;\n    imag_sum += b0 * c0;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store real and imaginary result in destination buffer. */\n  *realResult = real_sum;\n  *imagResult = imag_sum;\n}\n\n/**\n  @} end of cmplx_dot_prod group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_dot_prod_q15.c\n * Description:  Processing function for the Q15 Complex Dot product\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup cmplx_dot_prod\n  @{\n */\n\n/**\n  @brief         Q15 complex dot product.\n  @param[in]     pSrcA       points to the first input vector\n  @param[in]     pSrcB       points to the second input vector\n  @param[in]     numSamples  number of samples in each vector\n  @param[out]    realResult  real part of the result returned here\n  @param[out]    imagResult  imaginary part of the result returned her\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The intermediate 1.15 by 1.15 multiplications are performed with\n  full precision and yield a 2.30 result. These are accumulated in a 64-bit\n  accumulator with 34.30 precision. As a final step, the accumulators are\n  converted to 8.24 format. The return results realResult and\n  imagResult are in 8.24 format.\n */\n\nvoid arm_cmplx_dot_prod_q15(const q15_t *pSrcA, const q15_t *pSrcB,\n                            uint32_t numSamples, q31_t *realResult,\n                            q31_t *imagResult) {\n  uint32_t blkCnt;                  /* Loop counter */\n  q63_t real_sum = 0, imag_sum = 0; /* Temporary result variables */\n  q15_t a0, b0, c0, d0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += (q31_t)a0 * c0;\n    imag_sum += (q31_t)a0 * d0;\n    real_sum -= (q31_t)b0 * d0;\n    imag_sum += (q31_t)b0 * c0;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += (q31_t)a0 * c0;\n    imag_sum += (q31_t)a0 * d0;\n    real_sum -= (q31_t)b0 * d0;\n    imag_sum += (q31_t)b0 * c0;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += (q31_t)a0 * c0;\n    imag_sum += (q31_t)a0 * d0;\n    real_sum -= (q31_t)b0 * d0;\n    imag_sum += (q31_t)b0 * c0;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += (q31_t)a0 * c0;\n    imag_sum += (q31_t)a0 * d0;\n    real_sum -= (q31_t)b0 * d0;\n    imag_sum += (q31_t)b0 * c0;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += (q31_t)a0 * c0;\n    imag_sum += (q31_t)a0 * d0;\n    real_sum -= (q31_t)b0 * d0;\n    imag_sum += (q31_t)b0 * c0;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store real and imaginary result in 8.24 format  */\n  /* Convert real data in 34.30 to 8.24 by 6 right shifts */\n  *realResult = (q31_t)(real_sum >> 6);\n  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */\n  *imagResult = (q31_t)(imag_sum >> 6);\n}\n\n/**\n  @} end of cmplx_dot_prod group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_dot_prod_q31.c\n * Description:  Q31 complex dot product\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup cmplx_dot_prod\n  @{\n */\n\n/**\n  @brief         Q31 complex dot product.\n  @param[in]     pSrcA       points to the first input vector\n  @param[in]     pSrcB       points to the second input vector\n  @param[in]     numSamples  number of samples in each vector\n  @param[out]    realResult  real part of the result returned here\n  @param[out]    imagResult  imaginary part of the result returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The intermediate 1.31 by 1.31 multiplications are performed with\n  64-bit precision and then shifted to 16.48 format. The internal real and\n  imaginary accumulators are in 16.48 format and provide 15 guard bits.\n                   Additions are nonsaturating and no overflow will occur as\n  long as numSamples is less than 32768. The return results\n  realResult and imagResult are in 16.48 format. Input\n  down scaling is not required.\n */\n\nvoid arm_cmplx_dot_prod_q31(const q31_t *pSrcA, const q31_t *pSrcB,\n                            uint32_t numSamples, q63_t *realResult,\n                            q63_t *imagResult) {\n  uint32_t blkCnt;                  /* Loop counter */\n  q63_t real_sum = 0, imag_sum = 0; /* Temporary result variables */\n  q31_t a0, b0, c0, d0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += ((q63_t)a0 * c0) >> 14;\n    imag_sum += ((q63_t)a0 * d0) >> 14;\n    real_sum -= ((q63_t)b0 * d0) >> 14;\n    imag_sum += ((q63_t)b0 * c0) >> 14;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += ((q63_t)a0 * c0) >> 14;\n    imag_sum += ((q63_t)a0 * d0) >> 14;\n    real_sum -= ((q63_t)b0 * d0) >> 14;\n    imag_sum += ((q63_t)b0 * c0) >> 14;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += ((q63_t)a0 * c0) >> 14;\n    imag_sum += ((q63_t)a0 * d0) >> 14;\n    real_sum -= ((q63_t)b0 * d0) >> 14;\n    imag_sum += ((q63_t)b0 * c0) >> 14;\n\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += ((q63_t)a0 * c0) >> 14;\n    imag_sum += ((q63_t)a0 * d0) >> 14;\n    real_sum -= ((q63_t)b0 * d0) >> 14;\n    imag_sum += ((q63_t)b0 * c0) >> 14;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    a0 = *pSrcA++;\n    b0 = *pSrcA++;\n    c0 = *pSrcB++;\n    d0 = *pSrcB++;\n\n    real_sum += ((q63_t)a0 * c0) >> 14;\n    imag_sum += ((q63_t)a0 * d0) >> 14;\n    real_sum -= ((q63_t)b0 * d0) >> 14;\n    imag_sum += ((q63_t)b0 * c0) >> 14;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store real and imaginary result in 16.48 format  */\n  *realResult = real_sum;\n  *imagResult = imag_sum;\n}\n\n/**\n  @} end of cmplx_dot_prod group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mag_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mag_f32.c\n * Description:  Floating-point complex magnitude\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @defgroup cmplx_mag Complex Magnitude\n\n  Computes the magnitude of the elements of a complex data vector.\n\n  The pSrc points to the source data and\n  pDst points to the where the result should be written.\n  numSamples specifies the number of complex samples\n  in the input array and the data is stored in an interleaved fashion\n  (real, imag, real, imag, ...).\n  The input array has a total of 2*numSamples values;\n  the output array has a total of numSamples values.\n\n  The underlying algorithm is used:\n\n  
\n  for (n = 0; n < numSamples; n++) {\n      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);\n  }\n  
\n\n  There are separate functions for floating-point, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup cmplx_mag\n  @{\n */\n\n/**\n  @brief         Floating-point complex magnitude.\n  @param[in]     pSrc        points to input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n */\n\nvoid arm_cmplx_mag_f32(const float32_t *pSrc, float32_t *pDst,\n                       uint32_t numSamples) {\n  uint32_t blkCnt;      /* Loop counter */\n  float32_t real, imag; /* Temporary input variables */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */\n\n    real = *pSrc++;\n    imag = *pSrc++;\n\n    /* store result in destination buffer. */\n    arm_sqrt_f32((real * real) + (imag * imag), pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    arm_sqrt_f32((real * real) + (imag * imag), pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    arm_sqrt_f32((real * real) + (imag * imag), pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    arm_sqrt_f32((real * real) + (imag * imag), pDst++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */\n\n    real = *pSrc++;\n    imag = *pSrc++;\n\n    /* store result in destination buffer. */\n    arm_sqrt_f32((real * real) + (imag * imag), pDst++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_mag group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mag_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mag_q15.c\n * Description:  Q15 complex magnitude\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup cmplx_mag\n  @{\n */\n\n/**\n  @brief         Q15 complex magnitude.\n  @param[in]     pSrc        points to input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function implements 1.15 by 1.15 multiplications and\n  finally output is converted into 2.14 format.\n */\n\nvoid arm_cmplx_mag_q15(const q15_t *pSrc, q15_t *pDst, uint32_t numSamples) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_DSP)\n  q31_t in;\n  q31_t acc0; /* Accumulators */\n#else\n  q15_t real, imag; /* Temporary input variables */\n  q31_t acc0, acc1; /* Accumulators */\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */\n\n#if defined(ARM_MATH_DSP)\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n    /* store result in 2.14 format in destination buffer. */\n    arm_sqrt_q15((q15_t)(acc0 >> 17), pDst++);\n\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n    arm_sqrt_q15((q15_t)(acc0 >> 17), pDst++);\n\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n    arm_sqrt_q15((q15_t)(acc0 >> 17), pDst++);\n\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n    arm_sqrt_q15((q15_t)(acc0 >> 17), pDst++);\n#else\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n\n    /* store result in 2.14 format in destination buffer. */\n    arm_sqrt_q15((q15_t)(((q63_t)acc0 + acc1) >> 17), pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n    arm_sqrt_q15((q15_t)(((q63_t)acc0 + acc1) >> 17), pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n    arm_sqrt_q15((q15_t)(((q63_t)acc0 + acc1) >> 17), pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n    arm_sqrt_q15((q15_t)(((q63_t)acc0 + acc1) >> 17), pDst++);\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */\n\n#if defined(ARM_MATH_DSP)\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n\n    /* store result in 2.14 format in destination buffer. */\n    arm_sqrt_q15((q15_t)(acc0 >> 17), pDst++);\n#else\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n\n    /* store result in 2.14 format in destination buffer. */\n    arm_sqrt_q15((q15_t)(((q63_t)acc0 + acc1) >> 17), pDst++);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_mag group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mag_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mag_q31.c\n * Description:  Q31 complex magnitude\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup cmplx_mag\n  @{\n */\n\n/**\n  @brief         Q31 complex magnitude.\n  @param[in]     pSrc        points to input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function implements 1.31 by 1.31 multiplications and\n  finally output is converted into 2.30 format. Input down scaling is not\n  required.\n */\n\nvoid arm_cmplx_mag_q31(const q31_t *pSrc, q31_t *pDst, uint32_t numSamples) {\n  uint32_t blkCnt;  /* Loop counter */\n  q31_t real, imag; /* Temporary input variables */\n  q31_t acc0, acc1; /* Accumulators */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n\n    /* store result in 2.30 format in destination buffer. */\n    arm_sqrt_q31(acc0 + acc1, pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n    arm_sqrt_q31(acc0 + acc1, pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n    arm_sqrt_q31(acc0 + acc1, pDst++);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n    arm_sqrt_q31(acc0 + acc1, pDst++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n\n    /* store result in 2.30 format in destination buffer. */\n    arm_sqrt_q31(acc0 + acc1, pDst++);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_mag group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mag_squared_f32.c\n * Description:  Floating-point complex magnitude squared\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @defgroup cmplx_mag_squared Complex Magnitude Squared\n\n  Computes the magnitude squared of the elements of a complex data vector.\n\n  The pSrc points to the source data and\n  pDst points to the where the result should be written.\n  numSamples specifies the number of complex samples\n  in the input array and the data is stored in an interleaved fashion\n  (real, imag, real, imag, ...).\n  The input array has a total of 2*numSamples values;\n  the output array has a total of numSamples values.\n\n  The underlying algorithm is used:\n\n  
\n  for (n = 0; n < numSamples; n++) {\n      pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;\n  }\n  
\n\n  There are separate functions for floating-point, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup cmplx_mag_squared\n  @{\n */\n\n/**\n  @brief         Floating-point complex magnitude squared.\n  @param[in]     pSrc        points to input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n */\n\nvoid arm_cmplx_mag_squared_f32(const float32_t *pSrc, float32_t *pDst,\n                               uint32_t numSamples) {\n  uint32_t blkCnt;      /* Loop counter */\n  float32_t real, imag; /* Temporary input variables */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    *pDst++ = (real * real) + (imag * imag);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    *pDst++ = (real * real) + (imag * imag);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    *pDst++ = (real * real) + (imag * imag);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    *pDst++ = (real * real) + (imag * imag);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */\n\n    real = *pSrc++;\n    imag = *pSrc++;\n\n    /* store result in destination buffer. */\n    *pDst++ = (real * real) + (imag * imag);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_mag_squared group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mag_squared_q15.c\n * Description:  Q15 complex magnitude squared\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup cmplx_mag_squared\n  @{\n */\n\n/**\n  @brief         Q15 complex magnitude squared.\n  @param[in]     pSrc        points to input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function implements 1.15 by 1.15 multiplications and\n  finally output is converted into 3.13 format.\n */\n\nvoid arm_cmplx_mag_squared_q15(const q15_t *pSrc, q15_t *pDst,\n                               uint32_t numSamples) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_DSP)\n  q31_t in;\n  q31_t acc0; /* Accumulators */\n#else\n  q15_t real, imag; /* Temporary input variables */\n  q31_t acc0, acc1; /* Accumulators */\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */\n\n#if defined(ARM_MATH_DSP)\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n    /* store result in 3.13 format in destination buffer. */\n    *pDst++ = (q15_t)(acc0 >> 17);\n\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n    *pDst++ = (q15_t)(acc0 >> 17);\n\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n    *pDst++ = (q15_t)(acc0 >> 17);\n\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n    *pDst++ = (q15_t)(acc0 >> 17);\n#else\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n    /* store result in 3.13 format in destination buffer. */\n    *pDst++ = (q15_t)(((q63_t)acc0 + acc1) >> 17);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n    *pDst++ = (q15_t)(((q63_t)acc0 + acc1) >> 17);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n    *pDst++ = (q15_t)(((q63_t)acc0 + acc1) >> 17);\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n    *pDst++ = (q15_t)(((q63_t)acc0 + acc1) >> 17);\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */\n\n#if defined(ARM_MATH_DSP)\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    acc0 = __SMUAD(in, in);\n\n    /* store result in 3.13 format in destination buffer. */\n    *pDst++ = (q15_t)(acc0 >> 17);\n#else\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = ((q31_t)real * real);\n    acc1 = ((q31_t)imag * imag);\n\n    /* store result in 3.13 format in destination buffer. */\n    *pDst++ = (q15_t)(((q63_t)acc0 + acc1) >> 17);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_mag_squared group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mag_squared_q31.c\n * Description:  Q31 complex magnitude squared\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup cmplx_mag_squared\n  @{\n */\n\n/**\n  @brief         Q31 complex magnitude squared.\n  @param[in]     pSrc        points to input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function implements 1.31 by 1.31 multiplications and\n  finally output is converted into 3.29 format. Input down scaling is not\n  required.\n */\n\nvoid arm_cmplx_mag_squared_q31(const q31_t *pSrc, q31_t *pDst,\n                               uint32_t numSamples) {\n  uint32_t blkCnt;  /* Loop counter */\n  q31_t real, imag; /* Temporary input variables */\n  q31_t acc0, acc1; /* Accumulators */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n    /* store the result in 3.29 format in the destination buffer. */\n    *pDst++ = acc0 + acc1;\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n    *pDst++ = acc0 + acc1;\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n    *pDst++ = acc0 + acc1;\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n    *pDst++ = acc0 + acc1;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */\n\n    real = *pSrc++;\n    imag = *pSrc++;\n    acc0 = (q31_t)(((q63_t)real * real) >> 33);\n    acc1 = (q31_t)(((q63_t)imag * imag) >> 33);\n\n    /* store result in 3.29 format in destination buffer. */\n    *pDst++ = acc0 + acc1;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of cmplx_mag_squared group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mult_cmplx_f32.c\n * Description:  Floating-point complex-by-complex multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication\n\n  Multiplies a complex vector by another complex vector and generates a complex\n  result. The data in the complex arrays is stored in an interleaved fashion\n  (real, imag, real, imag, ...).\n  The parameter numSamples represents the number of complex\n  samples processed.  The complex arrays have a total of\n  2*numSamples real values.\n\n  The underlying algorithm is used:\n\n  
\n  for (n = 0; n < numSamples; n++) {\n      pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] *\n  pSrcB[(2*n)+1]; pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] +\n  pSrcA[(2*n)+1] * pSrcB[(2*n)+0];\n  }\n  
\n\n  There are separate functions for floating-point, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup CmplxByCmplxMult\n  @{\n */\n\n/**\n  @brief         Floating-point complex-by-complex multiplication.\n  @param[in]     pSrcA       points to first input vector\n  @param[in]     pSrcB       points to second input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n */\n\nvoid arm_cmplx_mult_cmplx_f32(const float32_t *pSrcA, const float32_t *pSrcB,\n                              float32_t *pDst, uint32_t numSamples) {\n  uint32_t blkCnt;      /* Loop counter */\n  float32_t a, b, c, d; /* Temporary variables */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */\n    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    /* store result in destination buffer. */\n    *pDst++ = (a * c) - (b * d);\n    *pDst++ = (a * d) + (b * c);\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (a * c) - (b * d);\n    *pDst++ = (a * d) + (b * c);\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (a * c) - (b * d);\n    *pDst++ = (a * d) + (b * c);\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (a * c) - (b * d);\n    *pDst++ = (a * d) + (b * c);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */\n    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n\n    /* store result in destination buffer. */\n    *pDst++ = (a * c) - (b * d);\n    *pDst++ = (a * d) + (b * c);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of CmplxByCmplxMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mult_cmplx_q15.c\n * Description:  Q15 complex-by-complex multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup CmplxByCmplxMult\n  @{\n */\n\n/**\n  @brief         Q15 complex-by-complex multiplication.\n  @param[in]     pSrcA       points to first input vector\n  @param[in]     pSrcB       points to second input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function implements 1.15 by 1.15 multiplications and\n  finally output is converted into 3.13 format.\n */\n\nvoid arm_cmplx_mult_cmplx_q15(const q15_t *pSrcA, const q15_t *pSrcB,\n                              q15_t *pDst, uint32_t numSamples) {\n  uint32_t blkCnt;  /* Loop counter */\n  q15_t a, b, c, d; /* Temporary variables */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */\n    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    /* store result in 3.13 format in destination buffer. */\n    *pDst++ = (q15_t)((((q31_t)a * c) >> 17) - (((q31_t)b * d) >> 17));\n    *pDst++ = (q15_t)((((q31_t)a * d) >> 17) + (((q31_t)b * c) >> 17));\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (q15_t)((((q31_t)a * c) >> 17) - (((q31_t)b * d) >> 17));\n    *pDst++ = (q15_t)((((q31_t)a * d) >> 17) + (((q31_t)b * c) >> 17));\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (q15_t)((((q31_t)a * c) >> 17) - (((q31_t)b * d) >> 17));\n    *pDst++ = (q15_t)((((q31_t)a * d) >> 17) + (((q31_t)b * c) >> 17));\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (q15_t)((((q31_t)a * c) >> 17) - (((q31_t)b * d) >> 17));\n    *pDst++ = (q15_t)((((q31_t)a * d) >> 17) + (((q31_t)b * c) >> 17));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */\n    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n\n    /* store result in 3.13 format in destination buffer. */\n    *pDst++ = (q15_t)((((q31_t)a * c) >> 17) - (((q31_t)b * d) >> 17));\n    *pDst++ = (q15_t)((((q31_t)a * d) >> 17) + (((q31_t)b * c) >> 17));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of CmplxByCmplxMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mult_cmplx_q31.c\n * Description:  Q31 complex-by-complex multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup CmplxByCmplxMult\n  @{\n */\n\n/**\n  @brief         Q31 complex-by-complex multiplication.\n  @param[in]     pSrcA       points to first input vector\n  @param[in]     pSrcB       points to second input vector\n  @param[out]    pDst        points to output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function implements 1.31 by 1.31 multiplications and\n  finally output is converted into 3.29 format. Input down scaling is not\n  required.\n */\n\nvoid arm_cmplx_mult_cmplx_q31(const q31_t *pSrcA, const q31_t *pSrcB,\n                              q31_t *pDst, uint32_t numSamples) {\n  uint32_t blkCnt;  /* Loop counter */\n  q31_t a, b, c, d; /* Temporary variables */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */\n    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    /* store result in 3.29 format in destination buffer. */\n    *pDst++ = (q31_t)((((q63_t)a * c) >> 33) - (((q63_t)b * d) >> 33));\n    *pDst++ = (q31_t)((((q63_t)a * d) >> 33) + (((q63_t)b * c) >> 33));\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (q31_t)((((q63_t)a * c) >> 33) - (((q63_t)b * d) >> 33));\n    *pDst++ = (q31_t)((((q63_t)a * d) >> 33) + (((q63_t)b * c) >> 33));\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (q31_t)((((q63_t)a * c) >> 33) - (((q63_t)b * d) >> 33));\n    *pDst++ = (q31_t)((((q63_t)a * d) >> 33) + (((q63_t)b * c) >> 33));\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n    *pDst++ = (q31_t)((((q63_t)a * c) >> 33) - (((q63_t)b * d) >> 33));\n    *pDst++ = (q31_t)((((q63_t)a * d) >> 33) + (((q63_t)b * c) >> 33));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */\n    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */\n\n    a = *pSrcA++;\n    b = *pSrcA++;\n    c = *pSrcB++;\n    d = *pSrcB++;\n\n    /* store result in 3.29 format in destination buffer. */\n    *pDst++ = (q31_t)((((q63_t)a * c) >> 33) - (((q63_t)b * d) >> 33));\n    *pDst++ = (q31_t)((((q63_t)a * d) >> 33) + (((q63_t)b * c) >> 33));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of CmplxByCmplxMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mult_real_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mult_real_f32.c\n * Description:  Floating-point complex by real multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @defgroup CmplxByRealMult Complex-by-Real Multiplication\n\n  Multiplies a complex vector by a real vector and generates a complex result.\n  The data in the complex arrays is stored in an interleaved fashion\n  (real, imag, real, imag, ...).\n  The parameter numSamples represents the number of complex\n  samples processed.  The complex arrays have a total of\n  2*numSamples real values while the real array has a total of\n  numSamples real values.\n\n  The underlying algorithm is used:\n\n  
\n  for (n = 0; n < numSamples; n++) {\n      pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];\n      pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];\n  }\n  
\n\n  There are separate functions for floating-point, Q15, and Q31 data types.\n */\n\n/**\n  @addtogroup CmplxByRealMult\n  @{\n */\n\n/**\n  @brief         Floating-point complex-by-real multiplication.\n  @param[in]     pSrcCmplx   points to complex input vector\n  @param[in]     pSrcReal    points to real input vector\n  @param[out]    pCmplxDst   points to complex output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n */\n\nvoid arm_cmplx_mult_real_f32(const float32_t *pSrcCmplx,\n                             const float32_t *pSrcReal, float32_t *pCmplxDst,\n                             uint32_t numSamples) {\n  uint32_t blkCnt; /* Loop counter */\n  float32_t in;    /* Temporary variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i    ] * B[i]. */\n    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */\n\n    in = *pSrcReal++;\n    /* store result in destination buffer. */\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n\n    in = *pSrcReal++;\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n\n    in = *pSrcReal++;\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n\n    in = *pSrcReal++;\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i    ] * B[i]. */\n    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */\n\n    in = *pSrcReal++;\n    /* store result in destination buffer. */\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n    *pCmplxDst++ = *pSrcCmplx++ * in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of CmplxByRealMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mult_real_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mult_real_q15.c\n * Description:  Q15 complex by real multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup CmplxByRealMult\n  @{\n */\n\n/**\n  @brief         Q15 complex-by-real multiplication.\n  @param[in]     pSrcCmplx   points to complex input vector\n  @param[in]     pSrcReal    points to real input vector\n  @param[out]    pCmplxDst   points to complex output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n */\n\nvoid arm_cmplx_mult_real_q15(const q15_t *pSrcCmplx, const q15_t *pSrcReal,\n                             q15_t *pCmplxDst, uint32_t numSamples) {\n  uint32_t blkCnt; /* Loop counter */\n  q15_t in;        /* Temporary variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n#if defined(ARM_MATH_DSP)\n  q31_t inA1, inA2;             /* Temporary variables to hold input data */\n  q31_t inB1;                   /* Temporary variables to hold input data */\n  q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */\n  q31_t mul1, mul2, mul3,\n      mul4; /* Temporary variables to hold intermediate data */\n#endif\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i    ] * B[i]. */\n    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */\n\n#if defined(ARM_MATH_DSP)\n    /* read 2 complex numbers both real and imaginary from complex input buffer\n     */\n    inA1 = read_q15x2_ia((q15_t **)&pSrcCmplx);\n    inA2 = read_q15x2_ia((q15_t **)&pSrcCmplx);\n    /* read 2 real values at a time from real input buffer */\n    inB1 = read_q15x2_ia((q15_t **)&pSrcReal);\n\n    /* multiply complex number with real numbers */\n#ifndef ARM_MATH_BIG_ENDIAN\n    mul1 = (q31_t)((q15_t)(inA1) * (q15_t)(inB1));\n    mul2 = (q31_t)((q15_t)(inA1 >> 16) * (q15_t)(inB1));\n    mul3 = (q31_t)((q15_t)(inA2) * (q15_t)(inB1 >> 16));\n    mul4 = (q31_t)((q15_t)(inA2 >> 16) * (q15_t)(inB1 >> 16));\n#else\n    mul2 = (q31_t)((q15_t)(inA1 >> 16) * (q15_t)(inB1 >> 16));\n    mul1 = (q31_t)((q15_t)inA1 * (q15_t)(inB1 >> 16));\n    mul4 = (q31_t)((q15_t)(inA2 >> 16) * (q15_t)inB1);\n    mul3 = (q31_t)((q15_t)inA2 * (q15_t)inB1);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* saturate the result */\n    out1 = (q15_t)__SSAT(mul1 >> 15U, 16);\n    out2 = (q15_t)__SSAT(mul2 >> 15U, 16);\n    out3 = (q15_t)__SSAT(mul3 >> 15U, 16);\n    out4 = (q15_t)__SSAT(mul4 >> 15U, 16);\n\n    /* pack real and imaginary outputs and store them to destination */\n    write_q15x2_ia(&pCmplxDst, __PKHBT(out1, out2, 16));\n    write_q15x2_ia(&pCmplxDst, __PKHBT(out3, out4, 16));\n\n    inA1 = read_q15x2_ia((q15_t **)&pSrcCmplx);\n    inA2 = read_q15x2_ia((q15_t **)&pSrcCmplx);\n    inB1 = read_q15x2_ia((q15_t **)&pSrcReal);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    mul1 = (q31_t)((q15_t)(inA1) * (q15_t)(inB1));\n    mul2 = (q31_t)((q15_t)(inA1 >> 16) * (q15_t)(inB1));\n    mul3 = (q31_t)((q15_t)(inA2) * (q15_t)(inB1 >> 16));\n    mul4 = (q31_t)((q15_t)(inA2 >> 16) * (q15_t)(inB1 >> 16));\n#else\n    mul2 = (q31_t)((q15_t)(inA1 >> 16) * (q15_t)(inB1 >> 16));\n    mul1 = (q31_t)((q15_t)inA1 * (q15_t)(inB1 >> 16));\n    mul4 = (q31_t)((q15_t)(inA2 >> 16) * (q15_t)inB1);\n    mul3 = (q31_t)((q15_t)inA2 * (q15_t)inB1);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    out1 = (q15_t)__SSAT(mul1 >> 15U, 16);\n    out2 = (q15_t)__SSAT(mul2 >> 15U, 16);\n    out3 = (q15_t)__SSAT(mul3 >> 15U, 16);\n    out4 = (q15_t)__SSAT(mul4 >> 15U, 16);\n\n    write_q15x2_ia(&pCmplxDst, __PKHBT(out1, out2, 16));\n    write_q15x2_ia(&pCmplxDst, __PKHBT(out3, out4, 16));\n#else\n    in = *pSrcReal++;\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n\n    in = *pSrcReal++;\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n\n    in = *pSrcReal++;\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n\n    in = *pSrcReal++;\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i    ] * B[i]. */\n    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */\n\n    in = *pSrcReal++;\n    /* store the result in the destination buffer. */\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n    *pCmplxDst++ = (q15_t)__SSAT((((q31_t)*pSrcCmplx++ * in) >> 15), 16);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of CmplxByRealMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ComplexMathFunctions/arm_cmplx_mult_real_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mult_real_q31.c\n * Description:  Q31 complex by real multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupCmplxMath\n */\n\n/**\n  @addtogroup CmplxByRealMult\n  @{\n */\n\n/**\n  @brief         Q31 complex-by-real multiplication.\n  @param[in]     pSrcCmplx   points to complex input vector\n  @param[in]     pSrcReal    points to real input vector\n  @param[out]    pCmplxDst   points to complex output vector\n  @param[in]     numSamples  number of samples in each vector\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range[0x80000000\n  0x7FFFFFFF] are saturated.\n */\n\nvoid arm_cmplx_mult_real_q31(const q31_t *pSrcCmplx, const q31_t *pSrcReal,\n                             q31_t *pCmplxDst, uint32_t numSamples) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t in;        /* Temporary variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = numSamples >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i    ] * B[i]. */\n    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */\n\n    in = *pSrcReal++;\n#if defined(ARM_MATH_DSP)\n    /* store saturated result in 1.31 format to destination buffer */\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n#else\n    /* store result in destination buffer. */\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n#endif\n\n    in = *pSrcReal++;\n#if defined(ARM_MATH_DSP)\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n#else\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n#endif\n\n    in = *pSrcReal++;\n#if defined(ARM_MATH_DSP)\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n#else\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n#endif\n\n    in = *pSrcReal++;\n#if defined(ARM_MATH_DSP)\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n#else\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = numSamples % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C[2 * i    ] = A[2 * i    ] * B[i]. */\n    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */\n\n    in = *pSrcReal++;\n#if defined(ARM_MATH_DSP)\n    /* store saturated result in 1.31 format to destination buffer */\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n    *pCmplxDst++ = (__SSAT((q31_t)(((q63_t)*pSrcCmplx++ * in) >> 32), 31) << 1);\n#else\n    /* store result in destination buffer. */\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n    *pCmplxDst++ = (q31_t)clip_q63_to_q31(((q63_t)*pSrcCmplx++ * in) >> 31);\n#endif\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of CmplxByRealMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/ControllerFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        ControllerFunctions.c\n * Description:  Combination of all controller function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_pid_init_f32.c\"\n#include \"arm_pid_init_q15.c\"\n#include \"arm_pid_init_q31.c\"\n#include \"arm_pid_reset_f32.c\"\n#include \"arm_pid_reset_q15.c\"\n#include \"arm_pid_reset_q31.c\"\n#include \"arm_sin_cos_f32.c\"\n#include \"arm_sin_cos_q31.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/arm_pid_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_pid_init_f32.c\n * Description:  Floating-point PID Control initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup PID\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point PID Control.\n  @param[in,out] S               points to an instance of the PID structure\n  @param[in]     resetStateFlag\n                   - value = 0: no change in state\n                   - value = 1: reset state\n  @return        none\n\n  @par           Details\n                   The resetStateFlag specifies whether to set\n  state to zero or not. \\n The function computes the structure fields:\n  A0, A1 A2 using the proportional gain(\n  \\c Kp), integral gain( \\c Ki) and derivative gain( \\c Kd) also sets the state\n  variables to all zeros.\n */\n\nvoid arm_pid_init_f32(arm_pid_instance_f32 *S, int32_t resetStateFlag) {\n  /* Derived coefficient A0 */\n  S->A0 = S->Kp + S->Ki + S->Kd;\n\n  /* Derived coefficient A1 */\n  S->A1 = (-S->Kp) - ((float32_t)2.0 * S->Kd);\n\n  /* Derived coefficient A2 */\n  S->A2 = S->Kd;\n\n  /* Check whether state needs reset or not */\n  if (resetStateFlag) {\n    /* Reset state to zero, The size will be always 3 samples */\n    memset(S->state, 0, 3U * sizeof(float32_t));\n  }\n}\n\n/**\n  @} end of PID group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/arm_pid_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_pid_init_q15.c\n * Description:  Q15 PID Control initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup PID\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 PID Control.\n  @param[in,out] S               points to an instance of the Q15 PID structure\n  @param[in]     resetStateFlag\n                   - value = 0: no change in state\n                   - value = 1: reset state\n  @return        none\n\n  @par           Details\n                   The resetStateFlag specifies whether to set\n  state to zero or not. \\n The function computes the structure fields:\n  A0, A1 A2 using the proportional gain(\n  \\c Kp), integral gain( \\c Ki) and derivative gain( \\c Kd) also sets the state\n  variables to all zeros.\n */\n\nvoid arm_pid_init_q15(arm_pid_instance_q15 *S, int32_t resetStateFlag) {\n\n#if defined(ARM_MATH_DSP)\n\n  /* Derived coefficient A0 */\n  S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);\n\n  /* Derived coefficients and pack into A1 */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n  S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);\n#else\n  S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);\n#endif\n\n#else\n\n  q31_t temp; /* to store the sum */\n\n  /* Derived coefficient A0 */\n  temp = S->Kp + S->Ki + S->Kd;\n  S->A0 = (q15_t)__SSAT(temp, 16);\n\n  /* Derived coefficients and pack into A1 */\n  temp = -(S->Kd + S->Kd + S->Kp);\n  S->A1 = (q15_t)__SSAT(temp, 16);\n  S->A2 = S->Kd;\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n  /* Check whether state needs reset or not */\n  if (resetStateFlag) {\n    /* Reset state to zero, The size will be always 3 samples */\n    memset(S->state, 0, 3U * sizeof(q15_t));\n  }\n}\n\n/**\n  @} end of PID group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/arm_pid_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_pid_init_q31.c\n * Description:  Q31 PID Control initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup PID\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 PID Control.\n  @param[in,out] S               points to an instance of the Q31 PID structure\n  @param[in]     resetStateFlag\n                   - value = 0: no change in state\n                   - value = 1: reset state\n  @return        none\n\n  @par           Details\n                   The resetStateFlag specifies whether to set\n  state to zero or not. \\n The function computes the structure fields:\n  A0, A1 A2 using the proportional gain(\n  \\c Kp), integral gain( \\c Ki) and derivative gain( \\c Kd) also sets the state\n  variables to all zeros.\n */\n\nvoid arm_pid_init_q31(arm_pid_instance_q31 *S, int32_t resetStateFlag) {\n\n#if defined(ARM_MATH_DSP)\n\n  /* Derived coefficient A0 */\n  S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);\n\n  /* Derived coefficient A1 */\n  S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);\n\n#else\n\n  q31_t temp; /* to store the sum */\n\n  /* Derived coefficient A0 */\n  temp = clip_q63_to_q31((q63_t)S->Kp + S->Ki);\n  S->A0 = clip_q63_to_q31((q63_t)temp + S->Kd);\n\n  /* Derived coefficient A1 */\n  temp = clip_q63_to_q31((q63_t)S->Kd + S->Kd);\n  S->A1 = -clip_q63_to_q31((q63_t)temp + S->Kp);\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n  /* Derived coefficient A2 */\n  S->A2 = S->Kd;\n\n  /* Check whether state needs reset or not */\n  if (resetStateFlag) {\n    /* Reset state to zero, The size will be always 3 samples */\n    memset(S->state, 0, 3U * sizeof(q31_t));\n  }\n}\n\n/**\n  @} end of PID group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/arm_pid_reset_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_pid_reset_f32.c\n * Description:  Floating-point PID Control reset function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup PID\n  @{\n */\n\n/**\n  @brief         Reset function for the floating-point PID Control.\n  @param[in,out] S  points to an instance of the floating-point PID structure\n  @return        none\n\n  @par           Details\n                   The function resets the state buffer to zeros.\n */\n\nvoid arm_pid_reset_f32(arm_pid_instance_f32 *S) {\n  /* Reset state to zero, The size will be always 3 samples */\n  memset(S->state, 0, 3U * sizeof(float32_t));\n}\n\n/**\n  @} end of PID group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/arm_pid_reset_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_pid_reset_q15.c\n * Description:  Q15 PID Control reset function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup PID\n  @{\n */\n\n/**\n  @brief         Reset function for the Q15 PID Control.\n  @param[in,out] S  points to an instance of the Q15 PID structure\n  @return        none\n\n  @par           Details\n                   The function resets the state buffer to zeros.\n */\n\nvoid arm_pid_reset_q15(arm_pid_instance_q15 *S) {\n  /* Reset state to zero, The size will be always 3 samples */\n  memset(S->state, 0, 3U * sizeof(q15_t));\n}\n\n/**\n  @} end of PID group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/arm_pid_reset_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_pid_reset_q31.c\n * Description:  Q31 PID Control reset function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup PID\n  @{\n */\n\n/**\n  @brief         Reset function for the Q31 PID Control.\n  @param[in,out] S  points to an instance of the Q31 PID structure\n  @return        none\n\n  @par           Details\n                   The function resets the state buffer to zeros.\n */\n\nvoid arm_pid_reset_q31(arm_pid_instance_q31 *S) {\n  /* Reset state to zero, The size will be always 3 samples */\n  memset(S->state, 0, 3U * sizeof(q31_t));\n}\n\n/**\n  @} end of PID group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/arm_sin_cos_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sin_cos_f32.c\n * Description:  Sine and Cosine calculation for floating-point values\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupController\n */\n\n/**\n  @defgroup SinCos Sine Cosine\n\n  Computes the trigonometric sine and cosine values using a combination of table\n  lookup and linear interpolation. There are separate functions for Q31 and\n  floating-point data types. The input to the floating-point version is in\n  degrees while the fixed-point Q31 have a scaled input with the range\n  [-1 0.9999] mapping to [-180 +180] degrees.\n\n  The floating point function also allows values that are out of the usual\n  range. When this happens, the function will take extra time to adjust the\n  input value to the range of [-180 180].\n\n  The result is accurate to 5 digits after the decimal point.\n\n  The implementation is based on table lookup using 360 values together with\n  linear interpolation. The steps used are:\n   -# Calculation of the nearest integer table index.\n   -# Compute the fractional portion (fract) of the input.\n   -# Fetch the value corresponding to \\c index from sine table to \\c y0 and\n  also value from \\c index+1 to \\c y1.\n   -# Sine value is computed as  *psinVal = y0 + (fract * (y1 -\n  y0)).\n   -# Fetch the value corresponding to \\c index from cosine table to \\c y0 and\n  also value from \\c index+1 to \\c y1.\n   -# Cosine value is computed as  *pcosVal = y0 + (fract * (y1 -\n  y0)).\n */\n\n/**\n  @addtogroup SinCos\n  @{\n */\n\n/**\n  @brief         Floating-point sin_cos function.\n  @param[in]     theta    input value in degrees\n  @param[out]    pSinVal  points to processed sine output\n  @param[out]    pCosVal  points to processed cosine output\n  @return        none\n */\n\nvoid arm_sin_cos_f32(float32_t theta, float32_t *pSinVal, float32_t *pCosVal) {\n  float32_t fract, in;      /* Temporary input, output variables */\n  uint16_t indexS, indexC;  /* Index variable */\n  float32_t f1, f2, d1, d2; /* Two nearest output values */\n  float32_t Dn, Df;\n  float32_t temp, findex;\n\n  /* input x is in degrees */\n  /* Scale input, divide input by 360, for cosine add 0.25 (pi/2) to read sine\n   * table */\n  in = theta * 0.00277777777778f;\n\n  if (in < 0.0f) {\n    in = -in;\n  }\n\n  in = in - (int32_t)in;\n\n  /* Calculate the nearest index */\n  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;\n  indexS = ((uint16_t)findex) & 0x1ff;\n  indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;\n\n  /* Calculation of fractional value */\n  fract = findex - (float32_t)indexS;\n\n  /* Read two nearest values of input value from the cos & sin tables */\n  f1 = sinTable_f32[indexC];\n  f2 = sinTable_f32[indexC + 1];\n  d1 = -sinTable_f32[indexS];\n  d2 = -sinTable_f32[indexS + 1];\n\n  temp = (1.0f - fract) * f1 + fract * f2;\n\n  Dn = 0.0122718463030f; /* delta between the two points (fixed), in this case\n                            2*pi/FAST_MATH_TABLE_SIZE */\n  Df = f2 - f1;          /* delta between the values of the functions */\n\n  temp = Dn * (d1 + d2) - 2 * Df;\n  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);\n  temp = fract * temp + d1 * Dn;\n\n  /* Calculation of cosine value */\n  *pCosVal = fract * temp + f1;\n\n  /* Read two nearest values of input value from the cos & sin tables */\n  f1 = sinTable_f32[indexS];\n  f2 = sinTable_f32[indexS + 1];\n  d1 = sinTable_f32[indexC];\n  d2 = sinTable_f32[indexC + 1];\n\n  temp = (1.0f - fract) * f1 + fract * f2;\n\n  Df = f2 - f1; // delta between the values of the functions\n  temp = Dn * (d1 + d2) - 2 * Df;\n  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);\n  temp = fract * temp + d1 * Dn;\n\n  /* Calculation of sine value */\n  *pSinVal = fract * temp + f1;\n\n  if (theta < 0.0f) {\n    *pSinVal = -*pSinVal;\n  }\n}\n\n/**\n  @} end of SinCos group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/ControllerFunctions/arm_sin_cos_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sin_cos_q31.c\n * Description:  Cosine & Sine calculation for Q31 values\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupController\n */\n\n/**\n  @addtogroup SinCos\n  @{\n */\n\n/**\n  @brief         Q31 sin_cos function.\n  @param[in]     theta    scaled input value in degrees\n  @param[out]    pSinVal  points to processed sine output\n  @param[out]    pCosVal  points to processed cosine output\n  @return        none\n\n  The Q31 input value is in the range [-1 0.999999] and is mapped to a degree\n  value in the range [-180 179].\n */\n\nvoid arm_sin_cos_q31(q31_t theta, q31_t *pSinVal, q31_t *pCosVal) {\n  q31_t fract;             /* Temporary input, output variables */\n  uint16_t indexS, indexC; /* Index variable */\n  q31_t f1, f2, d1, d2;    /* Two nearest output values */\n  q31_t Dn, Df;\n  q63_t temp;\n\n  /* Calculate the nearest index */\n  indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT;\n  indexC = (indexS + 128) & 0x1ff;\n\n  /* Calculation of fractional value */\n  fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;\n\n  /* Read two nearest values of input value from the cos & sin tables */\n  f1 = sinTable_q31[indexC];\n  f2 = sinTable_q31[indexC + 1];\n  d1 = -sinTable_q31[indexS];\n  d2 = -sinTable_q31[indexS + 1];\n\n  Dn = 0x1921FB5; /* delta between the two points (fixed), in this case\n                     2*pi/FAST_MATH_TABLE_SIZE */\n  Df = f2 - f1;   /* delta between the values of the functions */\n\n  temp = Dn * ((q63_t)d1 + d2);\n  temp = temp - ((q63_t)Df << 32);\n  temp = (q63_t)fract * (temp >> 31);\n  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);\n  temp = (q63_t)fract * (temp >> 31);\n  temp = temp + (q63_t)d1 * Dn;\n  temp = (q63_t)fract * (temp >> 31);\n\n  /* Calculation of cosine value */\n  *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);\n\n  /* Read two nearest values of input value from the cos & sin tables */\n  f1 = sinTable_q31[indexS];\n  f2 = sinTable_q31[indexS + 1];\n  d1 = sinTable_q31[indexC];\n  d2 = sinTable_q31[indexC + 1];\n\n  Df = f2 - f1; // delta between the values of the functions\n  temp = Dn * ((q63_t)d1 + d2);\n  temp = temp - ((q63_t)Df << 32);\n  temp = (q63_t)fract * (temp >> 31);\n  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);\n  temp = (q63_t)fract * (temp >> 31);\n  temp = temp + (q63_t)d1 * Dn;\n  temp = (q63_t)fract * (temp >> 31);\n\n  /* Calculation of sine value */\n  *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);\n}\n\n/**\n  @} end of SinCos group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/FastMathFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        FastMathFunctions.c\n * Description:  Combination of all fast math function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_cos_f32.c\"\n#include \"arm_cos_q15.c\"\n#include \"arm_cos_q31.c\"\n#include \"arm_sin_f32.c\"\n#include \"arm_sin_q15.c\"\n#include \"arm_sin_q31.c\"\n#include \"arm_sqrt_q15.c\"\n#include \"arm_sqrt_q31.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/arm_cos_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cos_f32.c\n * Description:  Fast cosine calculation for floating-point values\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFastMath\n */\n\n/**\n  @defgroup cos Cosine\n\n  Computes the trigonometric cosine function using a combination of table lookup\n  and linear interpolation.  There are separate functions for\n  Q15, Q31, and floating-point data types.\n  The input to the floating-point version is in radians while the\n  fixed-point Q15 and Q31 have a scaled input with the range\n  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a\n  value of 2*pi wraps around to 0.\n\n  The implementation is based on table lookup using 256 values together with\n  linear interpolation. The steps used are:\n   -# Calculation of the nearest integer table index\n   -# Compute the fractional portion (fract) of the table index.\n   -# The final result equals (1.0f-fract)*a + fract*b;\n\n  where\n  
\n     b = Table[index];\n     c = Table[index+1];\n  
\n */\n\n/**\n  @addtogroup cos\n  @{\n */\n\n/**\n  @brief         Fast approximation to the trigonometric cosine function for\n  floating-point data.\n  @param[in]     x  input value in radians\n  @return        cos(x)\n */\n\nfloat32_t arm_cos_f32(float32_t x) {\n  float32_t cosVal, fract, in; /* Temporary input, output variables */\n  uint16_t index;              /* Index variable */\n  float32_t a, b;              /* Two nearest output values */\n  int32_t n;\n  float32_t findex;\n\n  /* input x is in radians */\n  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25\n   * (pi/2) to read sine table */\n  in = x * 0.159154943092f + 0.25f;\n\n  /* Calculation of floor value of input */\n  n = (int32_t)in;\n\n  /* Make negative values towards -infinity */\n  if (in < 0.0f) {\n    n--;\n  }\n\n  /* Map input value to [0 1] */\n  in = in - (float32_t)n;\n\n  /* Calculation of index of the table */\n  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;\n  index = (uint16_t)findex;\n\n  /* when \"in\" is exactly 1, we need to rotate the index down to 0 */\n  if (index >= FAST_MATH_TABLE_SIZE) {\n    index = 0;\n    findex -= (float32_t)FAST_MATH_TABLE_SIZE;\n  }\n\n  /* fractional value calculation */\n  fract = findex - (float32_t)index;\n\n  /* Read two nearest values of input value from the cos table */\n  a = sinTable_f32[index];\n  b = sinTable_f32[index + 1];\n\n  /* Linear interpolation process */\n  cosVal = (1.0f - fract) * a + fract * b;\n\n  /* Return output value */\n  return (cosVal);\n}\n\n/**\n  @} end of cos group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/arm_cos_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cos_q15.c\n * Description:  Fast cosine calculation for Q15 values\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFastMath\n */\n\n/**\n  @addtogroup cos\n  @{\n */\n\n/**\n  @brief         Fast approximation to the trigonometric cosine function for Q15\n  data.\n  @param[in]     x  Scaled input value in radians\n  @return        cos(x)\n\n  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian\n  value in the range [0 2*PI).\n */\n\nq15_t arm_cos_q15(q15_t x) {\n  q15_t cosVal;  /* Temporary input, output variables */\n  int32_t index; /* Index variable */\n  q15_t a, b;    /* Two nearest output values */\n  q15_t fract;   /* Temporary values for fractional values */\n\n  /* add 0.25 (pi/2) to read sine table */\n  x = (uint16_t)x + 0x2000;\n  if (x < 0) { /* convert negative numbers to corresponding positive ones */\n    x = (uint16_t)x + 0x8000;\n  }\n\n  /* Calculate the nearest index */\n  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;\n\n  /* Calculation of fractional value */\n  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;\n\n  /* Read two nearest values of input value from the sin table */\n  a = sinTable_q15[index];\n  b = sinTable_q15[index + 1];\n\n  /* Linear interpolation process */\n  cosVal = (q31_t)(0x8000 - fract) * a >> 16;\n  cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract * b)) >> 16);\n\n  /* Return output value */\n  return (cosVal << 1);\n}\n\n/**\n  @} end of cos group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/arm_cos_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cos_q31.c\n * Description:  Fast cosine calculation for Q31 values\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFastMath\n */\n\n/**\n  @addtogroup cos\n  @{\n */\n\n/**\n  @brief         Fast approximation to the trigonometric cosine function for Q31\n  data.\n  @param[in]     x  Scaled input value in radians\n  @return        cos(x)\n\n  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian\n  value in the range [0 2*PI).\n */\n\nq31_t arm_cos_q31(q31_t x) {\n  q31_t cosVal;  /* Temporary input, output variables */\n  int32_t index; /* Index variable */\n  q31_t a, b;    /* Two nearest output values */\n  q31_t fract;   /* Temporary values for fractional values */\n\n  /* add 0.25 (pi/2) to read sine table */\n  x = (uint32_t)x + 0x20000000;\n  if (x < 0) { /* convert negative numbers to corresponding positive ones */\n    x = (uint32_t)x + 0x80000000;\n  }\n\n  /* Calculate the nearest index */\n  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;\n\n  /* Calculation of fractional value */\n  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;\n\n  /* Read two nearest values of input value from the sin table */\n  a = sinTable_q31[index];\n  b = sinTable_q31[index + 1];\n\n  /* Linear interpolation process */\n  cosVal = (q63_t)(0x80000000 - fract) * a >> 32;\n  cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract * b)) >> 32);\n\n  /* Return output value */\n  return (cosVal << 1);\n}\n\n/**\n  @} end of cos group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/arm_sin_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sin_f32.c\n * Description:  Fast sine calculation for floating-point values\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFastMath\n */\n\n/**\n  @defgroup sin Sine\n\n  Computes the trigonometric sine function using a combination of table lookup\n  and linear interpolation.  There are separate functions for\n  Q15, Q31, and floating-point data types.\n  The input to the floating-point version is in radians while the\n  fixed-point Q15 and Q31 have a scaled input with the range\n  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a\n  value of 2*pi wraps around to 0.\n\n  The implementation is based on table lookup using 256 values together with\n  linear interpolation. The steps used are:\n   -# Calculation of the nearest integer table index\n   -# Compute the fractional portion (fract) of the table index.\n   -# The final result equals (1.0f-fract)*a + fract*b;\n\n  where\n  
\n     b = Table[index];\n     c = Table[index+1];\n  
\n */\n\n/**\n  @addtogroup sin\n  @{\n */\n\n/**\n  @brief         Fast approximation to the trigonometric sine function for\n  floating-point data.\n  @param[in]     x  input value in radians.\n  @return        sin(x)\n */\n\nfloat32_t arm_sin_f32(float32_t x) {\n  float32_t sinVal, fract, in; /* Temporary input, output variables */\n  uint16_t index;              /* Index variable */\n  float32_t a, b;              /* Two nearest output values */\n  int32_t n;\n  float32_t findex;\n\n  /* input x is in radians */\n  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi */\n  in = x * 0.159154943092f;\n\n  /* Calculation of floor value of input */\n  n = (int32_t)in;\n\n  /* Make negative values towards -infinity */\n  if (in < 0.0f) {\n    n--;\n  }\n\n  /* Map input value to [0 1] */\n  in = in - (float32_t)n;\n\n  /* Calculation of index of the table */\n  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;\n  index = (uint16_t)findex;\n\n  /* when \"in\" is exactly 1, we need to rotate the index down to 0 */\n  if (index >= FAST_MATH_TABLE_SIZE) {\n    index = 0;\n    findex -= (float32_t)FAST_MATH_TABLE_SIZE;\n  }\n\n  /* fractional value calculation */\n  fract = findex - (float32_t)index;\n\n  /* Read two nearest values of input value from the sin table */\n  a = sinTable_f32[index];\n  b = sinTable_f32[index + 1];\n\n  /* Linear interpolation process */\n  sinVal = (1.0f - fract) * a + fract * b;\n\n  /* Return output value */\n  return (sinVal);\n}\n\n/**\n  @} end of sin group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/arm_sin_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sin_q15.c\n * Description:  Fast sine calculation for Q15 values\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFastMath\n */\n\n/**\n  @addtogroup sin\n  @{\n */\n\n/**\n  @brief         Fast approximation to the trigonometric sine function for Q15\n  data.\n  @param[in]     x  Scaled input value in radians\n  @return        sin(x)\n\n  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian\n  value in the range [0 2*PI).\n */\n\nq15_t arm_sin_q15(q15_t x) {\n  q15_t sinVal;  /* Temporary input, output variables */\n  int32_t index; /* Index variable */\n  q15_t a, b;    /* Two nearest output values */\n  q15_t fract;   /* Temporary values for fractional values */\n\n  /* Calculate the nearest index */\n  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;\n\n  /* Calculation of fractional value */\n  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;\n\n  /* Read two nearest values of input value from the sin table */\n  a = sinTable_q15[index];\n  b = sinTable_q15[index + 1];\n\n  /* Linear interpolation process */\n  sinVal = (q31_t)(0x8000 - fract) * a >> 16;\n  sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract * b)) >> 16);\n\n  /* Return output value */\n  return (sinVal << 1);\n}\n\n/**\n  @} end of sin group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/arm_sin_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sin_q31.c\n * Description:  Fast sine calculation for Q31 values\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFastMath\n */\n\n/**\n  @addtogroup sin\n  @{\n */\n\n/**\n  @brief         Fast approximation to the trigonometric sine function for Q31\n  data.\n  @param[in]     x  Scaled input value in radians\n  @return        sin(x)\n\n  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian\n  value in the range [0 2*PI).\n */\n\nq31_t arm_sin_q31(q31_t x) {\n  q31_t sinVal;  /* Temporary variables for input, output */\n  int32_t index; /* Index variable */\n  q31_t a, b;    /* Two nearest output values */\n  q31_t fract;   /* Temporary values for fractional values */\n\n  /* Calculate the nearest index */\n  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;\n\n  /* Calculation of fractional value */\n  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;\n\n  /* Read two nearest values of input value from the sin table */\n  a = sinTable_q31[index];\n  b = sinTable_q31[index + 1];\n\n  /* Linear interpolation process */\n  sinVal = (q63_t)(0x80000000 - fract) * a >> 32;\n  sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract * b)) >> 32);\n\n  /* Return output value */\n  return (sinVal << 1);\n}\n\n/**\n  @} end of sin group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/arm_sqrt_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sqrt_q15.c\n * Description:  Q15 square root function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFastMath\n */\n\n/**\n  @addtogroup SQRT\n  @{\n */\n\n/**\n  @brief         Q15 square root function.\n  @param[in]     in    input value.  The range of the input value is [0 +1) or\n  0x0000 to 0x7FFF\n  @param[out]    pOut  points to square root of input value\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : input value is positive\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : input value is negative;\n  *pOut is set to 0\n */\n\narm_status arm_sqrt_q15(q15_t in, q15_t *pOut) {\n  q31_t bits_val1;\n  q15_t number, temp1, var1, signBits1, half;\n  float32_t temp_float1;\n  union {\n    q31_t fracval;\n    float32_t floatval;\n  } tempconv;\n\n  number = in;\n\n  /* If the input is a positive number then compute the signBits. */\n  if (number > 0) {\n    signBits1 = __CLZ(number) - 17;\n\n    /* Shift by the number of signBits1 */\n    if ((signBits1 % 2) == 0) {\n      number = number << signBits1;\n    } else {\n      number = number << (signBits1 - 1);\n    }\n\n    /* Calculate half value of the number */\n    half = number >> 1;\n    /* Store the number for later use */\n    temp1 = number;\n\n    /* Convert to float */\n    temp_float1 = number * 3.051757812500000e-005f;\n    /* Store as integer */\n    tempconv.floatval = temp_float1;\n    bits_val1 = tempconv.fracval;\n    /* Subtract the shifted value from the magic number to give intial guess */\n    bits_val1 = 0x5f3759df - (bits_val1 >> 1); /* gives initial guess */\n    /* Store as float */\n    tempconv.fracval = bits_val1;\n    temp_float1 = tempconv.floatval;\n    /* Convert to integer format */\n    var1 = (q31_t)(temp_float1 * 16384);\n\n    /* 1st iteration */\n    var1 =\n        ((q15_t)((q31_t)var1 *\n                     (0x3000 - ((q15_t)((((q15_t)(((q31_t)var1 * var1) >> 15)) *\n                                         (q31_t)half) >>\n                                        15))) >>\n                 15))\n        << 2;\n    /* 2nd iteration */\n    var1 =\n        ((q15_t)((q31_t)var1 *\n                     (0x3000 - ((q15_t)((((q15_t)(((q31_t)var1 * var1) >> 15)) *\n                                         (q31_t)half) >>\n                                        15))) >>\n                 15))\n        << 2;\n    /* 3rd iteration */\n    var1 =\n        ((q15_t)((q31_t)var1 *\n                     (0x3000 - ((q15_t)((((q15_t)(((q31_t)var1 * var1) >> 15)) *\n                                         (q31_t)half) >>\n                                        15))) >>\n                 15))\n        << 2;\n\n    /* Multiply the inverse square root with the original value */\n    var1 = ((q15_t)(((q31_t)temp1 * var1) >> 15)) << 1;\n\n    /* Shift the output down accordingly */\n    if ((signBits1 % 2) == 0) {\n      var1 = var1 >> (signBits1 / 2);\n    } else {\n      var1 = var1 >> ((signBits1 - 1) / 2);\n    }\n    *pOut = var1;\n\n    return (ARM_MATH_SUCCESS);\n  }\n  /* If the number is a negative number then store zero as its square root value\n   */\n  else {\n    *pOut = 0;\n\n    return (ARM_MATH_ARGUMENT_ERROR);\n  }\n}\n\n/**\n  @} end of SQRT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FastMathFunctions/arm_sqrt_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_sqrt_q31.c\n * Description:  Q31 square root function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFastMath\n */\n\n/**\n  @addtogroup SQRT\n  @{\n */\n\n/**\n  @brief         Q31 square root function.\n  @param[in]     in    input value.  The range of the input value is [0 +1) or\n  0x00000000 to 0x7FFFFFFF\n  @param[out]    pOut  points to square root of input value\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : input value is positive\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : input value is negative;\n  *pOut is set to 0\n */\n\narm_status arm_sqrt_q31(q31_t in, q31_t *pOut) {\n  q31_t bits_val1;\n  q31_t number, temp1, var1, signBits1, half;\n  float32_t temp_float1;\n  union {\n    q31_t fracval;\n    float32_t floatval;\n  } tempconv;\n\n  number = in;\n\n  /* If the input is a positive number then compute the signBits. */\n  if (number > 0) {\n    signBits1 = __CLZ(number) - 1;\n\n    /* Shift by the number of signBits1 */\n    if ((signBits1 % 2) == 0) {\n      number = number << signBits1;\n    } else {\n      number = number << (signBits1 - 1);\n    }\n\n    /* Calculate half value of the number */\n    half = number >> 1;\n    /* Store the number for later use */\n    temp1 = number;\n\n    /* Convert to float */\n    temp_float1 = number * 4.6566128731e-010f;\n    /* Store as integer */\n    tempconv.floatval = temp_float1;\n    bits_val1 = tempconv.fracval;\n    /* Subtract the shifted value from the magic number to give intial guess */\n    bits_val1 = 0x5f3759df - (bits_val1 >> 1); /* gives initial guess */\n    /* Store as float */\n    tempconv.fracval = bits_val1;\n    temp_float1 = tempconv.floatval;\n    /* Convert to integer format */\n    var1 = (q31_t)(temp_float1 * 1073741824);\n\n    /* 1st iteration */\n    var1 = ((q31_t)((q63_t)var1 *\n                        (0x30000000 -\n                         ((q31_t)((((q31_t)(((q63_t)var1 * var1) >> 31)) *\n                                   (q63_t)half) >>\n                                  31))) >>\n                    31))\n           << 2;\n    /* 2nd iteration */\n    var1 = ((q31_t)((q63_t)var1 *\n                        (0x30000000 -\n                         ((q31_t)((((q31_t)(((q63_t)var1 * var1) >> 31)) *\n                                   (q63_t)half) >>\n                                  31))) >>\n                    31))\n           << 2;\n    /* 3rd iteration */\n    var1 = ((q31_t)((q63_t)var1 *\n                        (0x30000000 -\n                         ((q31_t)((((q31_t)(((q63_t)var1 * var1) >> 31)) *\n                                   (q63_t)half) >>\n                                  31))) >>\n                    31))\n           << 2;\n\n    /* Multiply the inverse square root with the original value */\n    var1 = ((q31_t)(((q63_t)temp1 * var1) >> 31)) << 1;\n\n    /* Shift the output down accordingly */\n    if ((signBits1 % 2) == 0) {\n      var1 = var1 >> (signBits1 / 2);\n    } else {\n      var1 = var1 >> ((signBits1 - 1) / 2);\n    }\n    *pOut = var1;\n\n    return (ARM_MATH_SUCCESS);\n  }\n  /* If the number is a negative number then store zero as its square root value\n   */\n  else {\n    *pOut = 0;\n\n    return (ARM_MATH_ARGUMENT_ERROR);\n  }\n}\n\n/**\n  @} end of SQRT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/FilteringFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        FilteringFunctions.c\n * Description:  Combination of all filtering function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_biquad_cascade_df1_32x64_init_q31.c\"\n#include \"arm_biquad_cascade_df1_32x64_q31.c\"\n#include \"arm_biquad_cascade_df1_f32.c\"\n#include \"arm_biquad_cascade_df1_fast_q15.c\"\n#include \"arm_biquad_cascade_df1_fast_q31.c\"\n#include \"arm_biquad_cascade_df1_init_f32.c\"\n#include \"arm_biquad_cascade_df1_init_q15.c\"\n#include \"arm_biquad_cascade_df1_init_q31.c\"\n#include \"arm_biquad_cascade_df1_q15.c\"\n#include \"arm_biquad_cascade_df1_q31.c\"\n#include \"arm_biquad_cascade_df2T_f32.c\"\n#include \"arm_biquad_cascade_df2T_f64.c\"\n#include \"arm_biquad_cascade_df2T_init_f32.c\"\n#include \"arm_biquad_cascade_df2T_init_f64.c\"\n#include \"arm_biquad_cascade_stereo_df2T_f32.c\"\n#include \"arm_biquad_cascade_stereo_df2T_init_f32.c\"\n#include \"arm_conv_f32.c\"\n#include \"arm_conv_fast_opt_q15.c\"\n#include \"arm_conv_fast_q15.c\"\n#include \"arm_conv_fast_q31.c\"\n#include \"arm_conv_opt_q15.c\"\n#include \"arm_conv_opt_q7.c\"\n#include \"arm_conv_partial_f32.c\"\n#include \"arm_conv_partial_fast_opt_q15.c\"\n#include \"arm_conv_partial_fast_q15.c\"\n#include \"arm_conv_partial_fast_q31.c\"\n#include \"arm_conv_partial_opt_q15.c\"\n#include \"arm_conv_partial_opt_q7.c\"\n#include \"arm_conv_partial_q15.c\"\n#include \"arm_conv_partial_q31.c\"\n#include \"arm_conv_partial_q7.c\"\n#include \"arm_conv_q15.c\"\n#include \"arm_conv_q31.c\"\n#include \"arm_conv_q7.c\"\n#include \"arm_correlate_f32.c\"\n#include \"arm_correlate_fast_opt_q15.c\"\n#include \"arm_correlate_fast_q15.c\"\n#include \"arm_correlate_fast_q31.c\"\n#include \"arm_correlate_opt_q15.c\"\n#include \"arm_correlate_opt_q7.c\"\n#include \"arm_correlate_q15.c\"\n#include \"arm_correlate_q31.c\"\n#include \"arm_correlate_q7.c\"\n#include \"arm_fir_decimate_f32.c\"\n#include \"arm_fir_decimate_fast_q15.c\"\n#include \"arm_fir_decimate_fast_q31.c\"\n#include \"arm_fir_decimate_init_f32.c\"\n#include \"arm_fir_decimate_init_q15.c\"\n#include \"arm_fir_decimate_init_q31.c\"\n#include \"arm_fir_decimate_q15.c\"\n#include \"arm_fir_decimate_q31.c\"\n#include \"arm_fir_f32.c\"\n#include \"arm_fir_fast_q15.c\"\n#include \"arm_fir_fast_q31.c\"\n#include \"arm_fir_init_f32.c\"\n#include \"arm_fir_init_q15.c\"\n#include \"arm_fir_init_q31.c\"\n#include \"arm_fir_init_q7.c\"\n#include \"arm_fir_interpolate_f32.c\"\n#include \"arm_fir_interpolate_init_f32.c\"\n#include \"arm_fir_interpolate_init_q15.c\"\n#include \"arm_fir_interpolate_init_q31.c\"\n#include \"arm_fir_interpolate_q15.c\"\n#include \"arm_fir_interpolate_q31.c\"\n#include \"arm_fir_lattice_f32.c\"\n#include \"arm_fir_lattice_init_f32.c\"\n#include \"arm_fir_lattice_init_q15.c\"\n#include \"arm_fir_lattice_init_q31.c\"\n#include \"arm_fir_lattice_q15.c\"\n#include \"arm_fir_lattice_q31.c\"\n#include \"arm_fir_q15.c\"\n#include \"arm_fir_q31.c\"\n#include \"arm_fir_q7.c\"\n#include \"arm_fir_sparse_f32.c\"\n#include \"arm_fir_sparse_init_f32.c\"\n#include \"arm_fir_sparse_init_q15.c\"\n#include \"arm_fir_sparse_init_q31.c\"\n#include \"arm_fir_sparse_init_q7.c\"\n#include \"arm_fir_sparse_q15.c\"\n#include \"arm_fir_sparse_q31.c\"\n#include \"arm_fir_sparse_q7.c\"\n#include \"arm_iir_lattice_f32.c\"\n#include \"arm_iir_lattice_init_f32.c\"\n#include \"arm_iir_lattice_init_q15.c\"\n#include \"arm_iir_lattice_init_q31.c\"\n#include \"arm_iir_lattice_q15.c\"\n#include \"arm_iir_lattice_q31.c\"\n#include \"arm_lms_f32.c\"\n#include \"arm_lms_init_f32.c\"\n#include \"arm_lms_init_q15.c\"\n#include \"arm_lms_init_q31.c\"\n#include \"arm_lms_norm_f32.c\"\n#include \"arm_lms_norm_init_f32.c\"\n#include \"arm_lms_norm_init_q15.c\"\n#include \"arm_lms_norm_init_q31.c\"\n#include \"arm_lms_norm_q15.c\"\n#include \"arm_lms_norm_q31.c\"\n#include \"arm_lms_q15.c\"\n#include \"arm_lms_q31.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_32x64_init_q31.c\n * Description:  High precision Q31 Biquad cascade filter initialization\n * function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF1_32x64\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 Biquad cascade 32x64\n  filter.\n  @param[in,out] S           points to an instance of the high precision Q31\n  Biquad cascade filter structure\n  @param[in]     numStages    number of 2nd order stages in the filter\n  @param[in]     pCoeffs      points to the filter coefficients\n  @param[in]     pState       points to the state buffer\n  @param[in]     postShift    Shift to be applied after the accumulator.  Varies\n  according to the coefficients format\n  @return        none\n\n  @par           Coefficient and State Ordering\n                   The coefficients are stored in the array pCoeffs\n  in the following order: 
 {b10, b11, b12, a11, a12, b20, b21, b22, a21,\n  a22, ...}\n  
\n                   where b1x and a1x are the\n  coefficients for the first stage, b2x and a2x are\n  the coefficients for the second stage, and so on.  The pCoeffs\n  array contains a total of 5*numStages values.\n  @par\n                   The pState points to state variables array and\n  size of each state variable is 1.63 format. Each Biquad stage has 4 state\n  variables x[n-1], x[n-2], y[n-1], and y[n-2]. The\n  state variables are arranged in the state array as: 
 {x[n-1], x[n-2],\n  y[n-1], y[n-2]}\n  
\n                   The 4 state variables for stage 1 are first, then the 4 state\n  variables for stage 2, and so on. The state array has a total length of\n  4*numStages values. The state variables are updated after each\n  block of data is processed; the coefficients are untouched.\n */\n\nvoid arm_biquad_cas_df1_32x64_init_q31(arm_biquad_cas_df1_32x64_ins_q31 *S,\n                                       uint8_t numStages, const q31_t *pCoeffs,\n                                       q63_t *pState, uint8_t postShift) {\n  /* Assign filter stages */\n  S->numStages = numStages;\n\n  /* Assign postShift to be applied to the output */\n  S->postShift = postShift;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always 4 * numStages */\n  memset(pState, 0, (4U * (uint32_t)numStages) * sizeof(q63_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of BiquadCascadeDF1_32x64 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_32x64_q31.c\n * Description:  High precision Q31 Biquad cascade filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter\n\n  This function implements a high precision Biquad cascade filter which operates\n  on Q31 data values.  The filter coefficients are in 1.31 format and the state\n  variables are in 1.63 format.  The double precision state variables reduce\n  quantization noise in the filter and provide a cleaner output. These filters\n  are particularly useful when implementing filters in which the singularities\n  are close to the unit circle.  This is common for low pass or high pass\n  filters with very low cutoff frequencies.\n\n  The function operates on blocks of input and output data\n  and each call to the function processes blockSize samples through\n  the filter. pSrc and pDst points to input and output\n  arrays containing blockSize Q31 values.\n\n  @par           Algorithm\n                   Each Biquad stage implements a second order filter using the\n  difference equation: 
 y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 *\n  y[n-1] + a2 * y[n-2]\n  
\n                   A Direct Form I algorithm is used with 5 coefficients and 4\n  state variables per stage. \\image html Biquad.gif \"Single Biquad filter stage\"\n                   Coefficients b0, b1 and b2  multiply the input\n  signal x[n] and are referred to as the feedforward coefficients.\n                   Coefficients a1 and a2 multiply the\n  output signal y[n] and are referred to as the feedback\n  coefficients. Pay careful attention to the sign of the feedback coefficients.\n                   Some design tools use the difference equation\n  
\n      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]\n  
\n                   In this case the feedback coefficients a1 and\n  a2 must be negated when used with the CMSIS DSP Library.\n  @par\n                   Higher order filters are realized as a cascade of second\n  order sections. numStages refers to the number of second order\n  stages used. For example, an 8th order filter would be realized with\n  numStages=4 second order stages. \\image html BiquadCascade.gif\n  \"8th order filter using a cascade of Biquad stages\" A 9th order filter would\n  be realized with numStages=5 second order stages with the\n  coefficients for one of the stages configured as a first order filter\n                   (b2=0 and a2=0).\n  @par\n                   The pState points to state variables array.\n                   Each Biquad stage has 4 state variables x[n-1], x[n-2],\n  y[n-1], and y[n-2] and each state variable in 1.63 format\n  to improve precision. The state variables are arranged in the array as: 
\n      {x[n-1], x[n-2], y[n-1], y[n-2]}\n  
\n  @par\n                   The 4 state variables for stage 1 are first, then the 4 state\n  variables for stage 2, and so on. The state array has a total length of\n  4*numStages values of data in 1.63 format. The state variables\n  are updated after each block of data is processed, the coefficients are\n  untouched.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter. Coefficient arrays may be shared among several\n  instances while state variable arrays cannot be shared.\n\n  @par           Init Function\n                   There is also an associated initialization function which\n  performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n  the follow subfields of the instance structure: numStages, pCoeffs, postShift,\n  pState. Also set all of the values in pState to zero.\n\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Set the values in the state buffer to zeros before\n  static initialization. For example, to statically initialize the filter\n  instance structure use 
 arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages,\n  pState, pCoeffs, postShift};\n  
\n                   where numStages is the number of Biquad stages\n  in the filter; pState is the address of the state buffer;\n                   pCoeffs is the address of the coefficient\n  buffer; postShift shift to be applied which is described in\n  detail below.\n  @par           Fixed-Point Behavior\n                   Care must be taken while using Biquad Cascade 32x64 filter\n  function. Following issues must be considered:\n                   - Scaling of coefficients\n                   - Filter gain\n                   - Overflow and saturation\n\n  @par\n                   Filter coefficients are represented as fractional values and\n                   restricted to lie in the range [-1 +1).\n                   The processing function has an additional scaling parameter\n  postShift which allows the filter coefficients to exceed the\n  range [+1 -1). At the output of the filter's accumulator is a\n  shift register which shifts the result by postShift bits. \\image\n  html BiquadPostshift.gif \"Fixed-point Biquad with shift by postShift bits\n  after accumulator\" This essentially scales the filter coefficients by\n  2^postShift. For example, to realize the coefficients 
 {1.5,\n  -0.8, 1.2, 1.6, -0.9}\n  
\n                   set the Coefficient array to:\n  
\n     {0.75, -0.4, 0.6, 0.8, -0.45}\n  
\n                   and set postShift=1\n  @par\n                   The second thing to keep in mind is the gain through the\n  filter. The frequency response of a Biquad filter is a function of its\n  coefficients. It is possible for the gain through the filter to exceed 1.0\n  meaning that the filter increases the amplitude of certain frequencies. This\n  means that an input signal with amplitude < 1.0 may result in an output > 1.0\n                   and these are saturated or overflowed based on the\n  implementation of the filter. To avoid this behavior the filter needs to be\n  scaled down such that its peak gain < 1.0 or the input signal must be scaled\n  down so that the combination of input and filter are never overflowed.\n  @par\n                   The third item to consider is the overflow and saturation\n  behavior of the fixed-point Q31 version. This is described in the function\n  specific documentation below.\n */\n\n/**\n  @addtogroup BiquadCascadeDF1_32x64\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 Biquad cascade 32x64 filter.\n  @param[in]     S         points to an instance of the high precision Q31\n  Biquad cascade filter\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize number of samples to process\n  @return        none\n\n  @par           Details\n                   The function is implemented using an internal 64-bit\n  accumulator. The accumulator has a 2.62 format and maintains full precision of\n  the intermediate multiplication results but provides only a single guard bit.\n                   Thus, if the accumulator result overflows it wraps around\n  rather than clip. In order to avoid overflows completely the input signal must\n  be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5\n  multiply-accumulates are performed, the 2.62 accumulator is shifted by\n  postShift bits and the result truncated to 1.31 format by\n  discarding the low 32 bits.\n  @par\n                   Two related functions are provided in the CMSIS DSP library.\n                   - \\ref arm_biquad_cascade_df1_q31() implements a Biquad\n  cascade with 32-bit coefficients and state variables with a Q63 accumulator.\n                   - \\ref arm_biquad_cascade_df1_fast_q31() implements a Biquad\n  cascade with 32-bit coefficients and state variables with a Q31 accumulator.\n */\n\nvoid arm_biquad_cas_df1_32x64_q31(const arm_biquad_cas_df1_32x64_ins_q31 *S,\n                                  q31_t *pSrc, q31_t *pDst,\n                                  uint32_t blockSize) {\n  q31_t *pIn = pSrc;                 /* input pointer initialization */\n  q31_t *pOut = pDst;                /* output pointer initialization */\n  q63_t *pState = S->pState;         /* state pointer initialization */\n  const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */\n  q63_t acc;                         /* accumulator */\n  q31_t Xn1, Xn2;                    /* Input Filter state variables */\n  q63_t Yn1, Yn2;                    /* Output Filter state variables */\n  q31_t b0, b1, b2, a1, a2;          /* Filter coefficients */\n  q31_t Xn;                          /* temporary input */\n  int32_t shift =\n      (int32_t)S->postShift + 1;         /* Shift to be applied to the output */\n  uint32_t sample, stage = S->numStages; /* loop counters */\n  q31_t acc_l, acc_h;                    /* temporary output */\n  uint32_t uShift = ((uint32_t)S->postShift + 1U);\n  uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */\n\n  do {\n    /* Reading the coefficients */\n    b0 = *pCoeffs++;\n    b1 = *pCoeffs++;\n    b2 = *pCoeffs++;\n    a1 = *pCoeffs++;\n    a2 = *pCoeffs++;\n\n    /* Reading the state values */\n    Xn1 = (q31_t)(pState[0]);\n    Xn2 = (q31_t)(pState[1]);\n    Yn1 = pState[2];\n    Yn2 = pState[3];\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Apply loop unrolling and compute 4 output values simultaneously. */\n    /* Variable acc hold output value that is being computed and stored in\n     * destination buffer acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 *\n     * y[n-1] + a2 * y[n-2]\n     */\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    sample = blockSize >> 2U;\n\n    while (sample > 0U) {\n      /* Read the input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n\n      /* acc =  b0 * x[n] */\n      acc = (q63_t)Xn * b0;\n\n      /* acc +=  b1 * x[n-1] */\n      acc += (q63_t)Xn1 * b1;\n\n      /* acc +=  b[2] * x[n-2] */\n      acc += (q63_t)Xn2 * b2;\n\n      /* acc +=  a1 * y[n-1] */\n      acc += mult32x64(Yn1, a1);\n\n      /* acc +=  a2 * y[n-2] */\n      acc += mult32x64(Yn2, a2);\n\n      /* The result is converted to 1.63 , Yn2 variable is reused */\n      Yn2 = acc << shift;\n\n      /* Calc lower part of acc */\n      acc_l = acc & 0xffffffff;\n\n      /* Calc upper part of acc */\n      acc_h = (acc >> 32) & 0xffffffff;\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      acc_h = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Store the output in the destination buffer in 1.31 format. */\n      *pOut = acc_h;\n\n      /* Read the second input into Xn2, to reuse the value */\n      Xn2 = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n\n      /* acc +=  b1 * x[n-1] */\n      acc = (q63_t)Xn * b1;\n\n      /* acc =  b0 * x[n] */\n      acc += (q63_t)Xn2 * b0;\n\n      /* acc +=  b[2] * x[n-2] */\n      acc += (q63_t)Xn1 * b2;\n\n      /* acc +=  a1 * y[n-1] */\n      acc += mult32x64(Yn2, a1);\n\n      /* acc +=  a2 * y[n-2] */\n      acc += mult32x64(Yn1, a2);\n\n      /* The result is converted to 1.63, Yn1 variable is reused */\n      Yn1 = acc << shift;\n\n      /* Calc lower part of acc */\n      acc_l = acc & 0xffffffff;\n\n      /* Calc upper part of acc */\n      acc_h = (acc >> 32) & 0xffffffff;\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      acc_h = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Read the third input into Xn1, to reuse the value */\n      Xn1 = *pIn++;\n\n      /* The result is converted to 1.31 */\n      /* Store the output in the destination buffer. */\n      *(pOut + 1U) = acc_h;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n\n      /* acc =  b0 * x[n] */\n      acc = (q63_t)Xn1 * b0;\n\n      /* acc +=  b1 * x[n-1] */\n      acc += (q63_t)Xn2 * b1;\n\n      /* acc +=  b[2] * x[n-2] */\n      acc += (q63_t)Xn * b2;\n\n      /* acc +=  a1 * y[n-1] */\n      acc += mult32x64(Yn1, a1);\n\n      /* acc +=  a2 * y[n-2] */\n      acc += mult32x64(Yn2, a2);\n\n      /* The result is converted to 1.63, Yn2 variable is reused  */\n      Yn2 = acc << shift;\n\n      /* Calc lower part of acc */\n      acc_l = acc & 0xffffffff;\n\n      /* Calc upper part of acc */\n      acc_h = (acc >> 32) & 0xffffffff;\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      acc_h = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Store the output in the destination buffer in 1.31 format. */\n      *(pOut + 2U) = acc_h;\n\n      /* Read the fourth input into Xn, to reuse the value */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      /* acc =  b0 * x[n] */\n      acc = (q63_t)Xn * b0;\n\n      /* acc +=  b1 * x[n-1] */\n      acc += (q63_t)Xn1 * b1;\n\n      /* acc +=  b[2] * x[n-2] */\n      acc += (q63_t)Xn2 * b2;\n\n      /* acc +=  a1 * y[n-1] */\n      acc += mult32x64(Yn2, a1);\n\n      /* acc +=  a2 * y[n-2] */\n      acc += mult32x64(Yn1, a2);\n\n      /* The result is converted to 1.63, Yn1 variable is reused  */\n      Yn1 = acc << shift;\n\n      /* Calc lower part of acc */\n      acc_l = acc & 0xffffffff;\n\n      /* Calc upper part of acc */\n      acc_h = (acc >> 32) & 0xffffffff;\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      acc_h = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Store the output in the destination buffer in 1.31 format. */\n      *(pOut + 3U) = acc_h;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      Xn2 = Xn1;\n      Xn1 = Xn;\n\n      /* update output pointer */\n      pOut += 4U;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    sample = blockSize & 0x3U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    sample = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (sample > 0U) {\n      /* Read the input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n\n      /* acc =  b0 * x[n] */\n      acc = (q63_t)Xn * b0;\n      /* acc +=  b1 * x[n-1] */\n      acc += (q63_t)Xn1 * b1;\n      /* acc +=  b[2] * x[n-2] */\n      acc += (q63_t)Xn2 * b2;\n      /* acc +=  a1 * y[n-1] */\n      acc += mult32x64(Yn1, a1);\n      /* acc +=  a2 * y[n-2] */\n      acc += mult32x64(Yn2, a2);\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      Xn2 = Xn1;\n      Xn1 = Xn;\n      Yn2 = Yn1;\n\n      /* The result is converted to 1.63, Yn1 variable is reused  */\n      Yn1 = acc << shift;\n\n      /* Calc lower part of acc */\n      acc_l = acc & 0xffffffff;\n\n      /* Calc upper part of acc */\n      acc_h = (acc >> 32) & 0xffffffff;\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      acc_h = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Store the output in the destination buffer in 1.31 format. */\n      *pOut++ = acc_h;\n      /* Yn1 = acc << shift; */\n\n      /* Store the output in the destination buffer in 1.31 format. */\n      /*    *pOut++ = (q31_t) (acc >> (32 - shift));  */\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* The first stage output is given as input to the second stage. */\n    pIn = pDst;\n\n    /* Reset to destination buffer working pointer */\n    pOut = pDst;\n\n    /*  Store the updated state variables back into the pState array */\n    *pState++ = (q63_t)Xn1;\n    *pState++ = (q63_t)Xn2;\n    *pState++ = Yn1;\n    *pState++ = Yn2;\n\n  } while (--stage);\n}\n\n/**\n  @} end of BiquadCascadeDF1_32x64 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_f32.c\n * Description:  Processing function for the floating-point Biquad cascade\n * DirectFormI(DF1) filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I\n  Structure\n\n  This set of functions implements arbitrary order recursive (IIR) filters.\n  The filters are implemented as a cascade of second order Biquad sections.\n  The functions support Q15, Q31 and floating-point data types.\n  Fast version of Q15 and Q31 also available.\n\n  The functions operate on blocks of input and output data and each call to the\n  function processes blockSize samples through the filter.\n  pSrc points to the array of input data and\n  pDst points to the array of output data.\n  Both arrays contain blockSize values.\n\n  @par           Algorithm\n                   Each Biquad stage implements a second order filter using the\n  difference equation: 
 y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 *\n  y[n-1] + a2 * y[n-2]\n  
\n                  A Direct Form I algorithm is used with 5 coefficients and 4\n  state variables per stage. \\image html Biquad.gif \"Single Biquad filter stage\"\n                  Coefficients b0, b1 and b2  multiply the input\n  signal x[n] and are referred to as the feedforward coefficients.\n                  Coefficients a1 and a2 multiply the\n  output signal y[n] and are referred to as the feedback\n  coefficients. Pay careful attention to the sign of the feedback coefficients.\n                  Some design tools use the difference equation\n  
\n      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]\n  
\n                  In this case the feedback coefficients a1 and\n  a2 must be negated when used with the CMSIS DSP Library.\n\n  @par\n                   Higher order filters are realized as a cascade of second\n  order sections. numStages refers to the number of second order\n  stages used. For example, an 8th order filter would be realized with\n  numStages=4 second order stages. \\image html BiquadCascade.gif\n  \"8th order filter using a cascade of Biquad stages\" A 9th order filter would\n  be realized with numStages=5 second order stages with the\n  coefficients for one of the stages configured as a first order filter\n  (b2=0 and a2=0).\n\n  @par\n                   The pState points to state variables array.\n                   Each Biquad stage has 4 state variables x[n-1], x[n-2],\n  y[n-1], and y[n-2]. The state variables are arranged in\n  the pState array as: 
 {x[n-1], x[n-2], y[n-1], y[n-2]}\n  
\n\n  @par\n                   The 4 state variables for stage 1 are first, then the 4 state\n  variables for stage 2, and so on. The state array has a total length of\n  4*numStages values. The state variables are updated after each\n  block of data is processed, the coefficients are untouched.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter. Coefficient arrays may be shared among several\n  instances while state variable arrays cannot be shared. There are separate\n  instance structure declarations for each of the 3 supported data types.\n\n  @par           Init Function\n                   There is also an associated initialization function for each\n  data type. The initialization function performs following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n  the follow subfields of the instance structure: numStages, pCoeffs, pState.\n  Also set all of the values in pState to zero.\n\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Set the values in the state buffer to zeros before\n  static initialization. The code below statically initializes each of the 3\n  different data type filter instance structures 
\n      arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};\n      arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};\n      arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};\n  
\n                   where numStages is the number of Biquad stages\n  in the filter; pState is the address of the state buffer;\n                   pCoeffs is the address of the coefficient\n  buffer; postShift shift to be applied.\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the Q15 and Q31 versions of the\n  Biquad Cascade filter functions. Following issues must be considered:\n                   - Scaling of coefficients\n                   - Filter gain\n                   - Overflow and saturation\n\n  @par           Scaling of coefficients\n                   Filter coefficients are represented as fractional values and\n                   coefficients are restricted to lie in the range [-1\n  +1). The fixed-point functions have an additional scaling parameter\n  postShift which allow the filter coefficients to exceed the range\n  [+1 -1). At the output of the filter's accumulator is a shift\n  register which shifts the result by postShift bits. \\image html\n  BiquadPostshift.gif \"Fixed-point Biquad with shift by postShift bits after\n  accumulator\" This essentially scales the filter coefficients by\n  2^postShift. For example, to realize the coefficients 
 {1.5,\n  -0.8, 1.2, 1.6, -0.9}\n  
\n                   set the pCoeffs array to:\n  
\n     {0.75, -0.4, 0.6, 0.8, -0.45}\n  
\n                   and set postShift=1\n\n  @par           Filter gain\n                   The frequency response of a Biquad filter is a function of\n  its coefficients. It is possible for the gain through the filter to exceed 1.0\n  meaning that the filter increases the amplitude of certain frequencies. This\n  means that an input signal with amplitude < 1.0 may result in an output > 1.0\n  and these are saturated or overflowed based on the implementation of the\n  filter. To avoid this behavior the filter needs to be scaled down such that\n  its peak gain < 1.0 or the input signal must be scaled down so that the\n  combination of input and filter are never overflowed.\n\n  @par           Overflow and saturation\n                   For Q15 and Q31 versions, it is described separately as part\n  of the function specific documentation below.\n */\n\n/**\n  @addtogroup BiquadCascadeDF1\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point Biquad cascade\n  filter.\n  @param[in]     S         points to an instance of the floating-point Biquad\n  cascade structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_biquad_cascade_df1_f32(const arm_biquad_casd_df1_inst_f32 *S,\n                                const float32_t *pSrc, float32_t *pDst,\n                                uint32_t blockSize) {\n  const float32_t *pIn = pSrc;           /* Source pointer */\n  float32_t *pOut = pDst;                /* Destination pointer */\n  float32_t *pState = S->pState;         /* pState pointer */\n  const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t acc;                         /* Accumulator */\n  float32_t b0, b1, b2, a1, a2;          /* Filter coefficients */\n  float32_t Xn1, Xn2, Yn1, Yn2;          /* Filter pState variables */\n  float32_t Xn;                          /* Temporary input */\n  uint32_t sample, stage = S->numStages; /* Loop counters */\n\n  do {\n    /* Reading the coefficients */\n    b0 = *pCoeffs++;\n    b1 = *pCoeffs++;\n    b2 = *pCoeffs++;\n    a1 = *pCoeffs++;\n    a2 = *pCoeffs++;\n\n    /* Reading the pState values */\n    Xn1 = pState[0];\n    Xn2 = pState[1];\n    Yn1 = pState[2];\n    Yn2 = pState[3];\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Apply loop unrolling and compute 4 output values simultaneously. */\n    /* Variable acc hold output values that are being computed:\n     *\n     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]\n     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]\n     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]\n     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]\n     */\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    sample = blockSize >> 2U;\n\n    while (sample > 0U) {\n      /* Read the first input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);\n\n      /* Store output in destination buffer. */\n      *pOut++ = Yn2;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n\n      /* Read the second input */\n      Xn2 = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);\n\n      /* Store output in destination buffer. */\n      *pOut++ = Yn1;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n\n      /* Read the third input */\n      Xn1 = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);\n\n      /* Store output in destination buffer. */\n      *pOut++ = Yn2;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n\n      /* Read the forth input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);\n\n      /* Store output in destination buffer. */\n      *pOut++ = Yn1;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      Xn2 = Xn1;\n      Xn1 = Xn;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    sample = blockSize & 0x3U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    sample = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (sample > 0U) {\n      /* Read the input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);\n\n      /* Store output in destination buffer. */\n      *pOut++ = acc;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      Xn2 = Xn1;\n      Xn1 = Xn;\n      Yn2 = Yn1;\n      Yn1 = acc;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Store the updated state variables back into the pState array */\n    *pState++ = Xn1;\n    *pState++ = Xn2;\n    *pState++ = Yn1;\n    *pState++ = Yn2;\n\n    /* The first stage goes from the input buffer to the output buffer. */\n    /* Subsequent numStages occur in-place in the output buffer */\n    pIn = pDst;\n\n    /* Reset output pointer */\n    pOut = pDst;\n\n    /* decrement loop counter */\n    stage--;\n\n  } while (stage > 0U);\n}\n\n/**\n  @} end of BiquadCascadeDF1 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_fast_q15.c\n * Description:  Fast processing function for the Q15 Biquad cascade filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF1\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 Biquad cascade filter (fast\n variant).\n  @param[in]     S         points to an instance of the Q15 Biquad cascade\n structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize number of samples to process per call\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This fast version uses a 32-bit accumulator with 2.30 format.\n                   The accumulator maintains full precision of the intermediate\n multiplication results but provides only a single guard bit. Thus, if the\n accumulator result overflows it wraps around and distorts the result. In order\n to avoid overflows completely the input signal must be scaled down by two bits\n and lie in the range [-0.25 +0.25). The 2.30 accumulator is then shifted by\n postShift bits and the result truncated to 1.15 format by\n discarding the low 16 bits.\n @remark\n                   Refer to \\ref arm_biquad_cascade_df1_q15() for a slower\n implementation of this function which uses 64-bit accumulation to avoid wrap\n around distortion. Both the slow and the fast versions use the same instance\n structure. Use the function \\ref arm_biquad_cascade_df1_init_q15() to\n initialize the filter structure.\n */\n\nvoid arm_biquad_cascade_df1_fast_q15(const arm_biquad_casd_df1_inst_q15 *S,\n                                     const q15_t *pSrc, q15_t *pDst,\n                                     uint32_t blockSize) {\n  const q15_t *pIn = pSrc;           /* Source pointer */\n  q15_t *pOut = pDst;                /* Destination pointer */\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t acc;                         /* Accumulator */\n  q31_t in;                  /* Temporary variable to hold input value */\n  q31_t out;                 /* Temporary variable to hold output value */\n  q31_t b0;                  /* Temporary variable to hold bo value */\n  q31_t b1, a1;              /* Filter coefficients */\n  q31_t state_in, state_out; /* Filter state variables */\n  int32_t shift = (int32_t)(15 - S->postShift); /* Post shift */\n  uint32_t sample, stage = S->numStages;        /* Loop counters */\n\n  do {\n    /* Read the b0 and 0 coefficients using SIMD  */\n    b0 = read_q15x2_ia((q15_t **)&pCoeffs);\n\n    /* Read the b1 and b2 coefficients using SIMD */\n    b1 = read_q15x2_ia((q15_t **)&pCoeffs);\n\n    /* Read the a1 and a2 coefficients using SIMD */\n    a1 = read_q15x2_ia((q15_t **)&pCoeffs);\n\n    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */\n    state_in = read_q15x2_ia(&pState);\n\n    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */\n    state_out = read_q15x2_da(&pState);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Apply loop unrolling and compute 2 output values simultaneously. */\n    /* Variable acc hold output values that are being computed:\n     *\n     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]\n     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]\n     */\n\n    /* Loop unrolling: Compute 2 outputs at a time */\n    sample = blockSize >> 1U;\n\n    while (sample > 0U) {\n\n      /* Read the input */\n      in = read_q15x2_ia((q15_t **)&pIn);\n\n      /* out =  b0 * x[n] + 0 * 0 */\n      out = __SMUAD(b0, in);\n      /* acc =  b1 * x[n-1] + acc +=  b2 * x[n-2] + out */\n      acc = __SMLAD(b1, state_in, out);\n      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */\n      acc = __SMLAD(a1, state_out, acc);\n\n      /* The result is converted from 3.29 to 1.31 and then saturation is\n       * applied */\n      out = __SSAT((acc >> shift), 16);\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */\n      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      state_in = __PKHBT(in, state_in, 16);\n      state_out = __PKHBT(out, state_out, 16);\n#else\n      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);\n      state_out = __PKHBT(state_out >> 16, (out), 16);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* out =  b0 * x[n] + 0 * 0 */\n      out = __SMUADX(b0, in);\n      /* acc0 =  b1 * x[n-1] , acc0 +=  b2 * x[n-2] + out */\n      acc = __SMLAD(b1, state_in, out);\n      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */\n      acc = __SMLAD(a1, state_out, acc);\n\n      /* The result is converted from 3.29 to 1.31 and then saturation is\n       * applied */\n      out = __SSAT((acc >> shift), 16);\n\n      /* Store the output in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pOut, __PKHBT(state_out, out, 16));\n#else\n      write_q15x2_ia(&pOut, __PKHBT(out, state_out >> 16, 16));\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */\n      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */\n#ifndef ARM_MATH_BIG_ENDIAN\n      state_in = __PKHBT(in >> 16, state_in, 16);\n      state_out = __PKHBT(out, state_out, 16);\n#else\n      state_in = __PKHBT(state_in >> 16, in, 16);\n      state_out = __PKHBT(state_out >> 16, out, 16);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* Decrement loop counter */\n      sample--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    sample = (blockSize & 0x1U);\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    sample = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (sample > 0U) {\n      /* Read the input */\n      in = *pIn++;\n\n      /* out =  b0 * x[n] + 0 * 0 */\n#ifndef ARM_MATH_BIG_ENDIAN\n      out = __SMUAD(b0, in);\n#else\n      out = __SMUADX(b0, in);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */\n      acc = __SMLAD(b1, state_in, out);\n      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */\n      acc = __SMLAD(a1, state_out, acc);\n\n      /* The result is converted from 3.29 to 1.31 and then saturation is\n       * applied */\n      out = __SSAT((acc >> shift), 16);\n\n      /* Store the output in the destination buffer. */\n      *pOut++ = (q15_t)out;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */\n      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */\n#ifndef ARM_MATH_BIG_ENDIAN\n      state_in = __PKHBT(in, state_in, 16);\n      state_out = __PKHBT(out, state_out, 16);\n#else\n      state_in = __PKHBT(state_in >> 16, in, 16);\n      state_out = __PKHBT(state_out >> 16, out, 16);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* The first stage goes from the input buffer to the output buffer. */\n    /* Subsequent (numStages - 1) occur in-place in the output buffer */\n    pIn = pDst;\n\n    /* Reset the output pointer */\n    pOut = pDst;\n\n    /* Store the updated state variables back into the state array */\n    write_q15x2_ia(&pState, state_in);\n    write_q15x2_ia(&pState, state_out);\n\n    /* Decrement loop counter */\n    stage--;\n\n  } while (stage > 0U);\n}\n\n/**\n  @} end of BiquadCascadeDF1 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_fast_q31.c\n * Description:  Processing function for the Q31 Fast Biquad cascade\n * DirectFormI(DF1) filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF1\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 Biquad cascade filter (fast\n  variant).\n  @param[in]     S         points to an instance of the Q31 Biquad cascade\n  structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize number of samples to process per call\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This function is optimized for speed at the expense of\n  fixed-point precision and overflow protection. The result of each 1.31 x 1.31\n  multiplication is truncated to 2.30 format. These intermediate results are\n  added to a 2.30 accumulator. Finally, the accumulator is saturated and\n  converted to a 1.31 result. The fast version has the same overflow behavior as\n  the standard version and provides less precision since it discards the low 32\n  bits of each multiplication result. In order to avoid overflows completely the\n  input signal must be scaled down by two bits and lie in the range [-0.25\n  +0.25). Use the intialization function arm_biquad_cascade_df1_init_q31() to\n  initialize filter structure.\n  @remark\n                   Refer to \\ref arm_biquad_cascade_df1_q31() for a slower\n  implementation of this function which uses 64-bit accumulation to provide\n  higher precision. Both the slow and the fast versions use the same instance\n  structure. Use the function \\ref arm_biquad_cascade_df1_init_q31() to\n  initialize the filter structure.\n */\n\nvoid arm_biquad_cascade_df1_fast_q31(const arm_biquad_casd_df1_inst_q31 *S,\n                                     const q31_t *pSrc, q31_t *pDst,\n                                     uint32_t blockSize) {\n  const q31_t *pIn = pSrc;           /* Source pointer */\n  q31_t *pOut = pDst;                /* Destination pointer */\n  q31_t *pState = S->pState;         /* pState pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t acc = 0;                     /* Accumulator */\n  q31_t b0, b1, b2, a1, a2;          /* Filter coefficients */\n  q31_t Xn1, Xn2, Yn1, Yn2;          /* Filter pState variables */\n  q31_t Xn;                          /* Temporary input */\n  int32_t shift =\n      (int32_t)S->postShift + 1;         /* Shift to be applied to the output */\n  uint32_t sample, stage = S->numStages; /* Loop counters */\n\n  do {\n    /* Reading the coefficients */\n    b0 = *pCoeffs++;\n    b1 = *pCoeffs++;\n    b2 = *pCoeffs++;\n    a1 = *pCoeffs++;\n    a2 = *pCoeffs++;\n\n    /* Reading the pState values */\n    Xn1 = pState[0];\n    Xn2 = pState[1];\n    Yn1 = pState[2];\n    Yn2 = pState[3];\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Apply loop unrolling and compute 4 output values simultaneously. */\n    /* Variables acc ... acc3 hold output values that are being computed:\n     *\n     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]\n     */\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    sample = blockSize >> 2U;\n\n    while (sample > 0U) {\n      /* Read the input */\n      Xn = *pIn;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      /* acc =  b0 * x[n] */\n      /* acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/\n      mult_32x32_keep32_R(acc, b1, Xn1);\n      /* acc +=  b1 * x[n-1] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b0, Xn);\n      /* acc +=  b[2] * x[n-2] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b2, Xn2);\n      /* acc +=  a1 * y[n-1] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a1, Yn1);\n      /* acc +=  a2 * y[n-2] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a2, Yn2);\n\n      /* The result is converted to 1.31 , Yn2 variable is reused */\n      Yn2 = acc << shift;\n\n      /* Read the second input */\n      Xn2 = *(pIn + 1U);\n\n      /* Store the output in the destination buffer. */\n      *pOut = Yn2;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      /* acc =  b0 * x[n] */\n      /* acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/\n      mult_32x32_keep32_R(acc, b0, Xn2);\n      /* acc +=  b1 * x[n-1] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b1, Xn);\n      /* acc +=  b[2] * x[n-2] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b2, Xn1);\n      /* acc +=  a1 * y[n-1] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a1, Yn2);\n      /* acc +=  a2 * y[n-2] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a2, Yn1);\n\n      /* The result is converted to 1.31, Yn1 variable is reused  */\n      Yn1 = acc << shift;\n\n      /* Read the third input  */\n      Xn1 = *(pIn + 2U);\n\n      /* Store the output in the destination buffer. */\n      *(pOut + 1U) = Yn1;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      /* acc =  b0 * x[n] */\n      /* acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/\n      mult_32x32_keep32_R(acc, b0, Xn1);\n      /* acc +=  b1 * x[n-1] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b1, Xn2);\n      /* acc +=  b[2] * x[n-2] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b2, Xn);\n      /* acc +=  a1 * y[n-1] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a1, Yn1);\n      /* acc +=  a2 * y[n-2] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a2, Yn2);\n\n      /* The result is converted to 1.31, Yn2 variable is reused  */\n      Yn2 = acc << shift;\n\n      /* Read the forth input */\n      Xn = *(pIn + 3U);\n\n      /* Store the output in the destination buffer. */\n      *(pOut + 2U) = Yn2;\n      pIn += 4U;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      /* acc =  b0 * x[n] */\n      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/\n      mult_32x32_keep32_R(acc, b0, Xn);\n      /* acc +=  b1 * x[n-1] */\n      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b1, Xn1);\n      /* acc +=  b[2] * x[n-2] */\n      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b2, Xn2);\n      /* acc +=  a1 * y[n-1] */\n      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a1, Yn2);\n      /* acc +=  a2 * y[n-2] */\n      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a2, Yn1);\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      Xn2 = Xn1;\n\n      /* The result is converted to 1.31, Yn1 variable is reused  */\n      Yn1 = acc << shift;\n\n      /* Xn1 = Xn */\n      Xn1 = Xn;\n\n      /* Store the output in the destination buffer. */\n      *(pOut + 3U) = Yn1;\n      pOut += 4U;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    sample = (blockSize & 0x3U);\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    sample = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (sample > 0U) {\n      /* Read the input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      /* acc =  b0 * x[n] */\n      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/\n      mult_32x32_keep32_R(acc, b0, Xn);\n      /* acc +=  b1 * x[n-1] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b1, Xn1);\n      /* acc +=  b[2] * x[n-2] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, b2, Xn2);\n      /* acc +=  a1 * y[n-1] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a1, Yn1);\n      /* acc +=  a2 * y[n-2] */\n      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/\n      multAcc_32x32_keep32_R(acc, a2, Yn2);\n\n      /* The result is converted to 1.31  */\n      acc = acc << shift;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      Xn2 = Xn1;\n      Xn1 = Xn;\n      Yn2 = Yn1;\n      Yn1 = acc;\n\n      /* Store the output in the destination buffer. */\n      *pOut++ = acc;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* The first stage goes from the input buffer to the output buffer. */\n    /* Subsequent stages occur in-place in the output buffer */\n    pIn = pDst;\n\n    /* Reset to destination pointer */\n    pOut = pDst;\n\n    /* Store the updated state variables back into the pState array */\n    *pState++ = Xn1;\n    *pState++ = Xn2;\n    *pState++ = Yn1;\n    *pState++ = Yn2;\n\n  } while (--stage);\n}\n\n/**\n  @} end of BiquadCascadeDF1 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_init_f32.c\n * Description:  Floating-point Biquad cascade DirectFormI(DF1) filter\n * initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF1\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point Biquad cascade\n  filter.\n  @param[in,out] S           points to an instance of the floating-point Biquad\n  cascade structure.\n  @param[in]     numStages   number of 2nd order stages in the filter.\n  @param[in]     pCoeffs     points to the filter coefficients.\n  @param[in]     pState      points to the state buffer.\n  @return        none\n\n  @par           Coefficient and State Ordering\n                   The coefficients are stored in the array pCoeffs\n  in the following order: 
 {b10, b11, b12, a11, a12, b20, b21, b22, a21,\n  a22, ...}\n  
\n\n  @par\n                   where b1x and a1x are the\n  coefficients for the first stage, b2x and a2x are\n  the coefficients for the second stage, and so on. The pCoeffs\n  array contains a total of 5*numStages values.\n  @par\n                   The pState is a pointer to state array.\n                   Each Biquad stage has 4 state variables x[n-1], x[n-2],\n  y[n-1], and y[n-2]. The state variables are arranged in\n  the pState array as: 
 {x[n-1], x[n-2], y[n-1], y[n-2]}\n  
\n                   The 4 state variables for stage 1 are first, then the 4 state\n  variables for stage 2, and so on. The state array has a total length of\n  4*numStages values. The state variables are updated after each\n  block of data is processed; the coefficients are untouched.\n */\n\nvoid arm_biquad_cascade_df1_init_f32(arm_biquad_casd_df1_inst_f32 *S,\n                                     uint8_t numStages,\n                                     const float32_t *pCoeffs,\n                                     float32_t *pState) {\n  /* Assign filter stages */\n  S->numStages = numStages;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always 4 * numStages */\n  memset(pState, 0, (4U * (uint32_t)numStages) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of BiquadCascadeDF1 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_init_q15.c\n * Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization\n * function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF1\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 Biquad cascade filter.\n  @param[in,out] S           points to an instance of the Q15 Biquad cascade\n  structure.\n  @param[in]     numStages   number of 2nd order stages in the filter.\n  @param[in]     pCoeffs     points to the filter coefficients.\n  @param[in]     pState      points to the state buffer.\n  @param[in]     postShift   Shift to be applied to the accumulator result.\n  Varies according to the coefficients format\n  @return        none\n\n  @par           Coefficient and State Ordering\n                   The coefficients are stored in the array pCoeffs\n  in the following order: 
 {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22,\n  a21, a22, ...}\n  
\n  @par\n                   where b1x and a1x are the\n  coefficients for the first stage, b2x and a2x are\n  the coefficients for the second stage, and so on.  The pCoeffs\n  array contains a total of 6*numStages values. The zero\n  coefficient between b1 and b2 facilities  use of\n  16-bit SIMD instructions on the Cortex-M4.\n  @par\n                   The state variables are stored in the array\n  pState. Each Biquad stage has 4 state variables x[n-1],\n  x[n-2], y[n-1], and y[n-2]. The state variables are\n  arranged in the pState array as: 
 {x[n-1], x[n-2], y[n-1],\n  y[n-2]}\n  
\n                   The 4 state variables for stage 1 are first, then the 4 state\n  variables for stage 2, and so on. The state array has a total length of\n  4*numStages values. The state variables are updated after each\n  block of data is processed; the coefficients are untouched.\n */\n\nvoid arm_biquad_cascade_df1_init_q15(arm_biquad_casd_df1_inst_q15 *S,\n                                     uint8_t numStages, const q15_t *pCoeffs,\n                                     q15_t *pState, int8_t postShift) {\n  /* Assign filter stages */\n  S->numStages = numStages;\n\n  /* Assign postShift to be applied to the output */\n  S->postShift = postShift;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always 4 * numStages */\n  memset(pState, 0, (4U * (uint32_t)numStages) * sizeof(q15_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of BiquadCascadeDF1 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_init_q31.c\n * Description:  Q31 Biquad cascade DirectFormI(DF1) filter initialization\n * function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF1\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 Biquad cascade filter.\n  @param[in,out] S           points to an instance of the Q31 Biquad cascade\n  structure.\n  @param[in]     numStages   number of 2nd order stages in the filter.\n  @param[in]     pCoeffs     points to the filter coefficients.\n  @param[in]     pState      points to the state buffer.\n  @param[in]     postShift   Shift to be applied after the accumulator.  Varies\n  according to the coefficients format\n  @return        none\n\n  @par           Coefficient and State Ordering\n                   The coefficients are stored in the array pCoeffs\n  in the following order: 
 {b10, b11, b12, a11, a12, b20, b21, b22, a21,\n  a22, ...}\n  
\n  @par\n                   where b1x and a1x are the\n  coefficients for the first stage, b2x and a2x are\n  the coefficients for the second stage, and so on.  The pCoeffs\n  array contains a total of 5*numStages values.\n  @par\n                   The pState points to state variables array.\n                   Each Biquad stage has 4 state variables x[n-1], x[n-2],\n  y[n-1], and y[n-2]. The state variables are arranged in\n  the pState array as: 
 {x[n-1], x[n-2], y[n-1], y[n-2]}\n  
\n                   The 4 state variables for stage 1 are first, then the 4 state\n  variables for stage 2, and so on. The state array has a total length of\n  4*numStages values. The state variables are updated after each\n  block of data is processed; the coefficients are untouched.\n */\n\nvoid arm_biquad_cascade_df1_init_q31(arm_biquad_casd_df1_inst_q31 *S,\n                                     uint8_t numStages, const q31_t *pCoeffs,\n                                     q31_t *pState, int8_t postShift) {\n  /* Assign filter stages */\n  S->numStages = numStages;\n\n  /* Assign postShift to be applied to the output */\n  S->postShift = postShift;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always 4 * numStages */\n  memset(pState, 0, (4U * (uint32_t)numStages) * sizeof(q31_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of BiquadCascadeDF1 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_q15.c\n * Description:  Processing function for the Q15 Biquad cascade DirectFormI(DF1)\n * filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF1\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 Biquad cascade filter.\n  @param[in]     S         points to an instance of the Q15 Biquad cascade\n  structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the location where the output result is\n  written\n  @param[in]     blockSize number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. Both coefficients and state variables are represented in 1.15\n  format and multiplications yield a 2.30 result. The 2.30 intermediate results\n  are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of\n  internal overflow with this approach and the full precision of intermediate\n  multiplications is preserved. The accumulator is then shifted by\n  postShift bits to truncate the result to 1.15 format by\n  discarding the low 16 bits. Finally, the result is saturated to 1.15 format.\n  @remark\n                   Refer to \\ref arm_biquad_cascade_df1_fast_q15() for a faster\n  but less precise implementation of this filter.\n */\n\nvoid arm_biquad_cascade_df1_q15(const arm_biquad_casd_df1_inst_q15 *S,\n                                const q15_t *pSrc, q15_t *pDst,\n                                uint32_t blockSize) {\n\n#if defined(ARM_MATH_DSP)\n\n  const q15_t *pIn = pSrc;   /* Source pointer */\n  q15_t *pOut = pDst;        /* Destination pointer */\n  q31_t in;                  /* Temporary variable to hold input value */\n  q31_t out;                 /* Temporary variable to hold output value */\n  q31_t b0;                  /* Temporary variable to hold bo value */\n  q31_t b1, a1;              /* Filter coefficients */\n  q31_t state_in, state_out; /* Filter state variables */\n  q31_t acc_l, acc_h;\n  q63_t acc;                                       /* Accumulator */\n  q15_t *pState = S->pState;                       /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */\n  int32_t lShift = (15 - (int32_t)S->postShift);   /* Post shift */\n  uint32_t sample, stage = (uint32_t)S->numStages; /* Stage loop counter */\n  int32_t uShift = (32 - lShift);\n\n  do {\n    /* Read the b0 and 0 coefficients using SIMD  */\n    b0 = read_q15x2_ia((q15_t **)&pCoeffs);\n\n    /* Read the b1 and b2 coefficients using SIMD */\n    b1 = read_q15x2_ia((q15_t **)&pCoeffs);\n\n    /* Read the a1 and a2 coefficients using SIMD */\n    a1 = read_q15x2_ia((q15_t **)&pCoeffs);\n\n    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */\n    state_in = read_q15x2_ia(&pState);\n\n    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */\n    state_out = read_q15x2_da(&pState);\n\n    /* Apply loop unrolling and compute 2 output values simultaneously. */\n    /*      The variable acc hold output values that are being computed:\n     *\n     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n     * y[n-2] acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n     * y[n-2]\n     */\n    sample = blockSize >> 1U;\n\n    /* First part of the processing with loop unrolling.  Compute 2 outputs at a\n     *time.\n     ** a second loop below computes the remaining 1 sample. */\n    while (sample > 0U) {\n\n      /* Read the input */\n      in = read_q15x2_ia((q15_t **)&pIn);\n\n      /* out =  b0 * x[n] + 0 * 0 */\n      out = __SMUAD(b0, in);\n\n      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */\n      acc = __SMLALD(b1, state_in, out);\n      /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */\n      acc = __SMLALD(a1, state_out, acc);\n\n      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then\n       * saturation is applied */\n      /* Calc lower part of acc */\n      acc_l = acc & 0xffffffff;\n\n      /* Calc upper part of acc */\n      acc_h = (acc >> 32) & 0xffffffff;\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      out = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      out = __SSAT(out, 16);\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */\n      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      state_in = __PKHBT(in, state_in, 16);\n      state_out = __PKHBT(out, state_out, 16);\n#else\n      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);\n      state_out = __PKHBT(state_out >> 16, (out), 16);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* out =  b0 * x[n] + 0 * 0 */\n      out = __SMUADX(b0, in);\n      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */\n      acc = __SMLALD(b1, state_in, out);\n      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */\n      acc = __SMLALD(a1, state_out, acc);\n\n      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then\n       * saturation is applied */\n      /* Calc lower part of acc */\n      acc_l = acc & 0xffffffff;\n\n      /* Calc upper part of acc */\n      acc_h = (acc >> 32) & 0xffffffff;\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      out = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      out = __SSAT(out, 16);\n\n      /* Store the output in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pOut, __PKHBT(state_out, out, 16));\n#else\n      write_q15x2_ia(&pOut, __PKHBT(out, state_out >> 16, 16));\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */\n      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */\n#ifndef ARM_MATH_BIG_ENDIAN\n      state_in = __PKHBT(in >> 16, state_in, 16);\n      state_out = __PKHBT(out, state_out, 16);\n#else\n      state_in = __PKHBT(state_in >> 16, in, 16);\n      state_out = __PKHBT(state_out >> 16, out, 16);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* Decrement loop counter */\n      sample--;\n    }\n\n    /* If the blockSize is not a multiple of 2, compute any remaining output\n     *samples here.\n     ** No loop unrolling is used. */\n\n    if ((blockSize & 0x1U) != 0U) {\n      /* Read the input */\n      in = *pIn++;\n\n      /* out =  b0 * x[n] + 0 * 0 */\n#ifndef ARM_MATH_BIG_ENDIAN\n      out = __SMUAD(b0, in);\n#else\n      out = __SMUADX(b0, in);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */\n      acc = __SMLALD(b1, state_in, out);\n      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */\n      acc = __SMLALD(a1, state_out, acc);\n\n      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then\n       * saturation is applied */\n      /* Calc lower part of acc */\n      acc_l = acc & 0xffffffff;\n\n      /* Calc upper part of acc */\n      acc_h = (acc >> 32) & 0xffffffff;\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      out = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      out = __SSAT(out, 16);\n\n      /* Store the output in the destination buffer. */\n      *pOut++ = (q15_t)out;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */\n      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */\n#ifndef ARM_MATH_BIG_ENDIAN\n      state_in = __PKHBT(in, state_in, 16);\n      state_out = __PKHBT(out, state_out, 16);\n#else\n      state_in = __PKHBT(state_in >> 16, in, 16);\n      state_out = __PKHBT(state_out >> 16, out, 16);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n    }\n\n    /* The first stage goes from the input wire to the output wire.  */\n    /* Subsequent numStages occur in-place in the output wire  */\n    pIn = pDst;\n\n    /* Reset the output pointer */\n    pOut = pDst;\n\n    /* Store the updated state variables back into the state array */\n    write_q15x2_ia(&pState, state_in);\n    write_q15x2_ia(&pState, state_out);\n\n    /* Decrement loop counter */\n    stage--;\n\n  } while (stage > 0U);\n\n#else\n\n  const q15_t *pIn = pSrc;                         /* Source pointer */\n  q15_t *pOut = pDst;                              /* Destination pointer */\n  q15_t b0, b1, b2, a1, a2;                        /* Filter coefficients */\n  q15_t Xn1, Xn2, Yn1, Yn2;                        /* Filter state variables */\n  q15_t Xn;                                        /* temporary input */\n  q63_t acc;                                       /* Accumulator */\n  int32_t shift = (15 - (int32_t)S->postShift);    /* Post shift */\n  q15_t *pState = S->pState;                       /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */\n  uint32_t sample, stage = (uint32_t)S->numStages; /* Stage loop counter */\n\n  do {\n    /* Reading the coefficients */\n    b0 = *pCoeffs++;\n    pCoeffs++; // skip the 0 coefficient\n    b1 = *pCoeffs++;\n    b2 = *pCoeffs++;\n    a1 = *pCoeffs++;\n    a2 = *pCoeffs++;\n\n    /* Reading the state values */\n    Xn1 = pState[0];\n    Xn2 = pState[1];\n    Yn1 = pState[2];\n    Yn2 = pState[3];\n\n    /* The variables acc holds the output value that is computed:\n     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n     * y[n-2]\n     */\n\n    sample = blockSize;\n\n    while (sample > 0U) {\n      /* Read the input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      /* acc =  b0 * x[n] */\n      acc = (q31_t)b0 * Xn;\n\n      /* acc +=  b1 * x[n-1] */\n      acc += (q31_t)b1 * Xn1;\n      /* acc +=  b[2] * x[n-2] */\n      acc += (q31_t)b2 * Xn2;\n      /* acc +=  a1 * y[n-1] */\n      acc += (q31_t)a1 * Yn1;\n      /* acc +=  a2 * y[n-2] */\n      acc += (q31_t)a2 * Yn2;\n\n      /* The result is converted to 1.31  */\n      acc = __SSAT((acc >> shift), 16);\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as:  */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      Xn2 = Xn1;\n      Xn1 = Xn;\n      Yn2 = Yn1;\n      Yn1 = (q15_t)acc;\n\n      /* Store the output in the destination buffer. */\n      *pOut++ = (q15_t)acc;\n\n      /* decrement the loop counter */\n      sample--;\n    }\n\n    /*  The first stage goes from the input buffer to the output buffer. */\n    /*  Subsequent stages occur in-place in the output buffer */\n    pIn = pDst;\n\n    /* Reset to destination pointer */\n    pOut = pDst;\n\n    /*  Store the updated state variables back into the pState array */\n    *pState++ = Xn1;\n    *pState++ = Xn2;\n    *pState++ = Yn1;\n    *pState++ = Yn2;\n\n  } while (--stage);\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @} end of BiquadCascadeDF1 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df1_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df1_q31.c\n * Description:  Processing function for the Q31 Biquad cascade filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF1\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 Biquad cascade filter.\n  @param[in]     S         points to an instance of the Q31 Biquad cascade\n  structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The accumulator has a 2.62 format and maintains full precision of\n  the intermediate multiplication results but provides only a single guard bit.\n                   Thus, if the accumulator result overflows it wraps around\n  rather than clip. In order to avoid overflows completely the input signal must\n  be scaled down by 2 bits and lie in the range [-0.25 +0.25). After all 5\n  multiply-accumulates are performed, the 2.62 accumulator is shifted by\n  postShift bits and the result truncated to 1.31 format by\n  discarding the low 32 bits.\n  @remark\n                   Refer to \\ref arm_biquad_cascade_df1_fast_q31() for a faster\n  but less precise implementation of this filter.\n */\n\nvoid arm_biquad_cascade_df1_q31(const arm_biquad_casd_df1_inst_q31 *S,\n                                const q31_t *pSrc, q31_t *pDst,\n                                uint32_t blockSize) {\n  const q31_t *pIn = pSrc;           /* Source pointer */\n  q31_t *pOut = pDst;                /* Destination pointer */\n  q31_t *pState = S->pState;         /* pState pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q63_t acc;                         /* Accumulator */\n  q31_t b0, b1, b2, a1, a2;          /* Filter coefficients */\n  q31_t Xn1, Xn2, Yn1, Yn2;          /* Filter pState variables */\n  q31_t Xn;                          /* Temporary input */\n  uint32_t uShift = ((uint32_t)S->postShift + 1U);\n  uint32_t lShift = 32U - uShift;        /* Shift to be applied to the output */\n  uint32_t sample, stage = S->numStages; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc_l, acc_h; /* temporary output variables */\n#endif\n\n  do {\n    /* Reading the coefficients */\n    b0 = *pCoeffs++;\n    b1 = *pCoeffs++;\n    b2 = *pCoeffs++;\n    a1 = *pCoeffs++;\n    a2 = *pCoeffs++;\n\n    /* Reading the pState values */\n    Xn1 = pState[0];\n    Xn2 = pState[1];\n    Yn1 = pState[2];\n    Yn2 = pState[3];\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Apply loop unrolling and compute 4 output values simultaneously. */\n    /* Variable acc hold output values that are being computed:\n     *\n     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]\n     */\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    sample = blockSize >> 2U;\n\n    while (sample > 0U) {\n      /* Read the first input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      acc = ((q63_t)b0 * Xn) + ((q63_t)b1 * Xn1) + ((q63_t)b2 * Xn2) +\n            ((q63_t)a1 * Yn1) + ((q63_t)a2 * Yn2);\n\n      /* The result is converted to 1.31 , Yn2 variable is reused */\n      acc_l = (acc)&0xffffffff;         /* Calc lower part of acc */\n      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      Yn2 = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Store output in destination buffer. */\n      *pOut++ = Yn2;\n\n      /* Read the second input */\n      Xn2 = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      acc = ((q63_t)b0 * Xn2) + ((q63_t)b1 * Xn) + ((q63_t)b2 * Xn1) +\n            ((q63_t)a1 * Yn2) + ((q63_t)a2 * Yn1);\n\n      /* The result is converted to 1.31, Yn1 variable is reused  */\n      acc_l = (acc)&0xffffffff;         /* Calc lower part of acc */\n      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      Yn1 = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Store output in destination buffer. */\n      *pOut++ = Yn1;\n\n      /* Read the third input */\n      Xn1 = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      acc = ((q63_t)b0 * Xn1) + ((q63_t)b1 * Xn2) + ((q63_t)b2 * Xn) +\n            ((q63_t)a1 * Yn1) + ((q63_t)a2 * Yn2);\n\n      /* The result is converted to 1.31, Yn2 variable is reused  */\n      acc_l = (acc)&0xffffffff;         /* Calc lower part of acc */\n      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      Yn2 = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Store output in destination buffer. */\n      *pOut++ = Yn2;\n\n      /* Read the forth input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      acc = ((q63_t)b0 * Xn) + ((q63_t)b1 * Xn1) + ((q63_t)b2 * Xn2) +\n            ((q63_t)a1 * Yn2) + ((q63_t)a2 * Yn1);\n\n      /* The result is converted to 1.31, Yn1 variable is reused  */\n      acc_l = (acc)&0xffffffff;         /* Calc lower part of acc */\n      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */\n\n      /* Apply shift for lower part of acc and upper part of acc */\n      Yn1 = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n      /* Store output in destination buffer. */\n      *pOut++ = Yn1;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      Xn2 = Xn1;\n      Xn1 = Xn;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    sample = blockSize & 0x3U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    sample = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (sample > 0U) {\n      /* Read the input */\n      Xn = *pIn++;\n\n      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 *\n       * y[n-2] */\n      acc = ((q63_t)b0 * Xn) + ((q63_t)b1 * Xn1) + ((q63_t)b2 * Xn2) +\n            ((q63_t)a1 * Yn1) + ((q63_t)a2 * Yn2);\n\n      /* The result is converted to 1.31  */\n      acc = acc >> lShift;\n\n      /* Store output in destination buffer. */\n      *pOut++ = (q31_t)acc;\n\n      /* Every time after the output is computed state should be updated. */\n      /* The states should be updated as: */\n      /* Xn2 = Xn1 */\n      /* Xn1 = Xn  */\n      /* Yn2 = Yn1 */\n      /* Yn1 = acc */\n      Xn2 = Xn1;\n      Xn1 = Xn;\n      Yn2 = Yn1;\n      Yn1 = (q31_t)acc;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Store the updated state variables back into the pState array */\n    *pState++ = Xn1;\n    *pState++ = Xn2;\n    *pState++ = Yn1;\n    *pState++ = Yn2;\n\n    /* The first stage goes from the input buffer to the output buffer. */\n    /* Subsequent numStages occur in-place in the output buffer */\n    pIn = pDst;\n\n    /* Reset output pointer */\n    pOut = pDst;\n\n    /* decrement loop counter */\n    stage--;\n\n  } while (stage > 0U);\n}\n\n/**\n  @} end of BiquadCascadeDF1 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df2T_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df2T_f32.c\n * Description:  Processing function for floating-point transposed direct form\n * II Biquad cascade filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n*/\n\n/**\n  @addtogroup BiquadCascadeDF2T\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point transposed direct\n  form II Biquad cascade filter.\n  @param[in]     S         points to an instance of the filter data structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize number of samples to process\n  @return        none\n */\n\nLOW_OPTIMIZATION_ENTER\nvoid arm_biquad_cascade_df2T_f32(const arm_biquad_cascade_df2T_instance_f32 *S,\n                                 const float32_t *pSrc, float32_t *pDst,\n                                 uint32_t blockSize) {\n  const float32_t *pIn = pSrc;           /* Source pointer */\n  float32_t *pOut = pDst;                /* Destination pointer */\n  float32_t *pState = S->pState;         /* State pointer */\n  const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t acc1;                        /* Accumulator */\n  float32_t b0, b1, b2, a1, a2;          /* Filter coefficients */\n  float32_t Xn1;                         /* Temporary input */\n  float32_t d1, d2;                      /* State variables */\n  uint32_t sample, stage = S->numStages; /* Loop counters */\n\n  do {\n    /* Reading the coefficients */\n    b0 = pCoeffs[0];\n    b1 = pCoeffs[1];\n    b2 = pCoeffs[2];\n    a1 = pCoeffs[3];\n    a2 = pCoeffs[4];\n\n    /* Reading the state values */\n    d1 = pState[0];\n    d2 = pState[1];\n\n    pCoeffs += 5U;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 16 outputs at a time */\n    sample = blockSize >> 4U;\n\n    while (sample > 0U) {\n\n      /* y[n] = b0 * x[n] + d1 */\n      /* d1 = b1 * x[n] + a1 * y[n] + d2 */\n      /* d2 = b2 * x[n] + a2 * y[n] */\n\n      /*  1 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  2 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  3 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  4 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  5 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  6 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  7 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  8 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  9 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 10 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 11 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 12 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 13 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 14 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 15 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 16 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    sample = blockSize & 0xFU;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    sample = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (sample > 0U) {\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Store the updated state variables back into the state array */\n    pState[0] = d1;\n    pState[1] = d2;\n\n    pState += 2U;\n\n    /* The current stage input is given as the output to the next stage */\n    pIn = pDst;\n\n    /* Reset the output working pointer */\n    pOut = pDst;\n\n    /* decrement loop counter */\n    stage--;\n\n  } while (stage > 0U);\n}\nLOW_OPTIMIZATION_EXIT\n\n/**\n  @} end of BiquadCascadeDF2T group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df2T_f64.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df2T_f64.c\n * Description:  Processing function for floating-point transposed direct form\n * II Biquad cascade filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n*/\n\n/**\n  @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II\n  Transposed Structure\n\n  This set of functions implements arbitrary order recursive (IIR) filters using\n  a transposed direct form II structure. The filters are implemented as a\n  cascade of second order Biquad sections. These functions provide a slight\n  memory savings as compared to the direct form I Biquad filter functions. Only\n  floating-point data is supported.\n\n  This function operate on blocks of input and output data and each call to the\n  function processes blockSize samples through the filter.\n  pSrc points to the array of input data and\n  pDst points to the array of output data.\n  Both arrays contain blockSize values.\n\n  @par           Algorithm\n                   Each Biquad stage implements a second order filter using the\n  difference equation: 
 y[n] = b0 * x[n] + d1 d1 = b1 * x[n] + a1 * y[n] +\n  d2 d2 = b2 * x[n] + a2 * y[n]\n  
\n                   where d1 and d2 represent the two state values.\n  @par\n                   A Biquad filter using a transposed Direct Form II structure\n  is shown below. \\image html BiquadDF2Transposed.gif \"Single transposed Direct\n  Form II Biquad\" Coefficients b0, b1, and b2  multiply the input\n  signal x[n] and are referred to as the feedforward coefficients.\n                   Coefficients a1 and a2 multiply the\n  output signal y[n] and are referred to as the feedback\n  coefficients. Pay careful attention to the sign of the feedback coefficients.\n                   Some design tools flip the sign of the feedback coefficients:\n  
\n     y[n] = b0 * x[n] + d1;\n     d1 = b1 * x[n] - a1 * y[n] + d2;\n     d2 = b2 * x[n] - a2 * y[n];\n  
\n                   In this case the feedback coefficients a1 and\n  a2 must be negated when used with the CMSIS DSP Library.\n  @par\n                   Higher order filters are realized as a cascade of second\n  order sections. numStages refers to the number of second order\n  stages used. For example, an 8th order filter would be realized with\n  numStages=4 second order stages. A 9th order filter would be\n  realized with numStages=5 second order stages with the\n                   coefficients for one of the stages configured as a first\n  order filter (b2=0 and a2=0).\n  @par\n                   pState points to the state variable array.\n                   Each Biquad stage has 2 state variables d1 and\n  d2. The state variables are arranged in the pState\n  array as: 
 {d11, d12, d21, d22, ...}\n  
\n                   where d1x refers to the state variables for the\n  first Biquad and d2x refers to the state variables for the second\n  Biquad. The state array has a total length of 2*numStages values.\n                   The state variables are updated after each block of data is\n  processed; the coefficients are untouched.\n  @par\n                   The CMSIS library contains Biquad filters in both Direct Form\n  I and transposed Direct Form II. The advantage of the Direct Form I structure\n  is that it is numerically more robust for fixed-point data types. That is why\n  the Direct Form I structure supports Q15 and Q31 data types. The transposed\n  Direct Form II structure, on the other hand, requires a wide dynamic range for\n  the state variables d1 and d2. Because of this, the\n  CMSIS library only has a floating-point version of the Direct Form II Biquad.\n                   The advantage of the Direct Form II Biquad is that it\n  requires half the number of state variables, 2 rather than 4, per Biquad\n  stage.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter. Coefficient arrays may be shared among several\n  instances while state variable arrays cannot be shared.\n\n  @par           Init Functions\n                   There is also an associated initialization function.\n                   The initialization function performs following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n  the follow subfields of the instance structure: numStages, pCoeffs, pState.\n  Also set all of the values in pState to zero.\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Set the values in the state buffer to zeros before\n  static initialization. For example, to statically initialize the instance\n  structure use 
 arm_biquad_cascade_df2T_instance_f64 S1 = {numStages,\n  pState, pCoeffs}; arm_biquad_cascade_df2T_instance_f32 S1 = {numStages,\n  pState, pCoeffs};\n  
\n                   where numStages is the number of Biquad stages\n  in the filter; pState is the address of the state buffer.\n                   pCoeffs is the address of the coefficient\n  buffer;\n*/\n\n/**\n  @addtogroup BiquadCascadeDF2T\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point transposed direct\n  form II Biquad cascade filter.\n  @param[in]     S         points to an instance of the filter data structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize number of samples to process\n  @return        none\n */\n\nLOW_OPTIMIZATION_ENTER\nvoid arm_biquad_cascade_df2T_f64(const arm_biquad_cascade_df2T_instance_f64 *S,\n                                 float64_t *pSrc, float64_t *pDst,\n                                 uint32_t blockSize) {\n\n  float64_t *pIn = pSrc;                 /* Source pointer */\n  float64_t *pOut = pDst;                /* Destination pointer */\n  float64_t *pState = S->pState;         /* State pointer */\n  float64_t *pCoeffs = S->pCoeffs;       /* Coefficient pointer */\n  float64_t acc1;                        /* Accumulator */\n  float64_t b0, b1, b2, a1, a2;          /* Filter coefficients */\n  float64_t Xn1;                         /* Temporary input */\n  float64_t d1, d2;                      /* State variables */\n  uint32_t sample, stage = S->numStages; /* Loop counters */\n\n  do {\n    /* Reading the coefficients */\n    b0 = pCoeffs[0];\n    b1 = pCoeffs[1];\n    b2 = pCoeffs[2];\n    a1 = pCoeffs[3];\n    a2 = pCoeffs[4];\n\n    /* Reading the state values */\n    d1 = pState[0];\n    d2 = pState[1];\n\n    pCoeffs += 5U;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 16 outputs at a time */\n    sample = blockSize >> 4U;\n\n    while (sample > 0U) {\n\n      /* y[n] = b0 * x[n] + d1 */\n      /* d1 = b1 * x[n] + a1 * y[n] + d2 */\n      /* d2 = b2 * x[n] + a2 * y[n] */\n\n      /*  1 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  2 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  3 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  4 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  5 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  6 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  7 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  8 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /*  9 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 10 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 11 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 12 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 13 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 14 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 15 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* 16 */\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    sample = blockSize & 0xFU;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    sample = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (sample > 0U) {\n      Xn1 = *pIn++;\n\n      acc1 = b0 * Xn1 + d1;\n\n      d1 = b1 * Xn1 + d2;\n      d1 += a1 * acc1;\n\n      d2 = b2 * Xn1;\n      d2 += a2 * acc1;\n\n      *pOut++ = acc1;\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Store the updated state variables back into the state array */\n    pState[0] = d1;\n    pState[1] = d2;\n\n    pState += 2U;\n\n    /* The current stage input is given as the output to the next stage */\n    pIn = pDst;\n\n    /* Reset the output working pointer */\n    pOut = pDst;\n\n    /* decrement loop counter */\n    stage--;\n\n  } while (stage > 0U);\n}\nLOW_OPTIMIZATION_EXIT\n\n/**\n  @} end of BiquadCascadeDF2T group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df2T_init_f32.c\n * Description:  Initialization function for floating-point transposed direct\n * form II Biquad cascade filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF2T\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point transposed\n  direct form II Biquad cascade filter.\n  @param[in,out] S           points to an instance of the filter data structure.\n  @param[in]     numStages   number of 2nd order stages in the filter.\n  @param[in]     pCoeffs     points to the filter coefficients.\n  @param[in]     pState      points to the state buffer.\n  @return        none\n\n  @par           Coefficient and State Ordering\n                   The coefficients are stored in the array pCoeffs\n  in the following order: 
 {b10, b11, b12, a11, a12, b20, b21, b22, a21,\n  a22, ...}\n  
\n  @par\n                   where b1x and a1x are the\n  coefficients for the first stage, b2x and a2x are\n  the coefficients for the second stage, and so on.  The pCoeffs\n  array contains a total of 5*numStages values.\n  @par\n                   The pState is a pointer to state array.\n                   Each Biquad stage has 2 state variables d1, and\n  d2. The 2 state variables for stage 1 are first, then the 2 state\n  variables for stage 2, and so on. The state array has a total length of\n  2*numStages values. The state variables are updated after each\n  block of data is processed; the coefficients are untouched.\n */\n\nvoid arm_biquad_cascade_df2T_init_f32(arm_biquad_cascade_df2T_instance_f32 *S,\n                                      uint8_t numStages,\n                                      const float32_t *pCoeffs,\n                                      float32_t *pState) {\n  /* Assign filter stages */\n  S->numStages = numStages;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always 2 * numStages */\n  memset(pState, 0, (2U * (uint32_t)numStages) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of BiquadCascadeDF2T group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_df2T_init_f64.c\n * Description:  Initialization function for floating-point transposed direct\n * form II Biquad cascade filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF2T\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point transposed\n  direct form II Biquad cascade filter.\n  @param[in,out] S           points to an instance of the filter data structure\n  @param[in]     numStages   number of 2nd order stages in the filter\n  @param[in]     pCoeffs     points to the filter coefficients\n  @param[in]     pState      points to the state buffer\n  @return        none\n\n  @par           Coefficient and State Ordering\n                   The coefficients are stored in the array pCoeffs\n  in the following order: 
 {b10, b11, b12, a11, a12, b20, b21, b22, a21,\n  a22, ...}\n  
\n  @par\n                   where b1x and a1x are the\n  coefficients for the first stage, b2x and a2x are\n  the coefficients for the second stage, and so on.  The pCoeffs\n  array contains a total of 5*numStages values.\n  @par\n                   The pState is a pointer to state array.\n                   Each Biquad stage has 2 state variables d1, and\n  d2. The 2 state variables for stage 1 are first, then the 2 state\n  variables for stage 2, and so on. The state array has a total length of\n  2*numStages values. The state variables are updated after each\n  block of data is processed; the coefficients are untouched.\n */\n\nvoid arm_biquad_cascade_df2T_init_f64(arm_biquad_cascade_df2T_instance_f64 *S,\n                                      uint8_t numStages, float64_t *pCoeffs,\n                                      float64_t *pState) {\n  /* Assign filter stages */\n  S->numStages = numStages;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always 2 * numStages */\n  memset(pState, 0, (2U * (uint32_t)numStages) * sizeof(float64_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of BiquadCascadeDF2T group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_stereo_df2T_f32.c\n * Description:  Processing function for floating-point transposed direct form\n * II Biquad cascade filter. 2 channels\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n*/\n\n/**\n  @addtogroup BiquadCascadeDF2T\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point transposed direct\n  form II Biquad cascade filter.\n  @param[in]     S         points to an instance of the filter data structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize number of samples to process\n  @return        none\n */\n\nLOW_OPTIMIZATION_ENTER\nvoid arm_biquad_cascade_stereo_df2T_f32(\n    const arm_biquad_cascade_stereo_df2T_instance_f32 *S, const float32_t *pSrc,\n    float32_t *pDst, uint32_t blockSize) {\n  const float32_t *pIn = pSrc;           /* Source pointer */\n  float32_t *pOut = pDst;                /* Destination pointer */\n  float32_t *pState = S->pState;         /* State pointer */\n  const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t acc1a, acc1b;                /* Accumulator */\n  float32_t b0, b1, b2, a1, a2;          /* Filter coefficients */\n  float32_t Xn1a, Xn1b;                  /* Temporary input */\n  float32_t d1a, d2a, d1b, d2b;          /* State variables */\n  uint32_t sample, stage = S->numStages; /* Loop counters */\n\n  do {\n    /* Reading the coefficients */\n    b0 = pCoeffs[0];\n    b1 = pCoeffs[1];\n    b2 = pCoeffs[2];\n    a1 = pCoeffs[3];\n    a2 = pCoeffs[4];\n\n    /* Reading the state values */\n    d1a = pState[0];\n    d2a = pState[1];\n    d1b = pState[2];\n    d2b = pState[3];\n\n    pCoeffs += 5U;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 8 outputs at a time */\n    sample = blockSize >> 3U;\n\n    while (sample > 0U) {\n      /* y[n] = b0 * x[n] + d1 */\n      /* d1 = b1 * x[n] + a1 * y[n] + d2 */\n      /* d2 = b2 * x[n] + a2 * y[n] */\n\n      /*  1 */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /*  2 */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /*  3 */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /*  4 */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /*  5 */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /*  6 */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /*  7 */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /*  8 */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    sample = blockSize & 0x7U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    sample = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (sample > 0U) {\n      /* Read the input */\n      Xn1a = *pIn++; /* Channel a */\n      Xn1b = *pIn++; /* Channel b */\n\n      /* y[n] = b0 * x[n] + d1 */\n      acc1a = (b0 * Xn1a) + d1a;\n      acc1b = (b0 * Xn1b) + d1b;\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = acc1a;\n      *pOut++ = acc1b;\n\n      /* Every time after the output is computed state should be updated. */\n      /* d1 = b1 * x[n] + a1 * y[n] + d2 */\n      d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;\n      d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;\n\n      /* d2 = b2 * x[n] + a2 * y[n] */\n      d2a = (b2 * Xn1a) + (a2 * acc1a);\n      d2b = (b2 * Xn1b) + (a2 * acc1b);\n\n      /* decrement loop counter */\n      sample--;\n    }\n\n    /* Store the updated state variables back into the state array */\n    pState[0] = d1a;\n    pState[1] = d2a;\n\n    pState[2] = d1b;\n    pState[3] = d2b;\n\n    pState += 4U;\n\n    /* The current stage input is given as the output to the next stage */\n    pIn = pDst;\n\n    /* Reset the output working pointer */\n    pOut = pDst;\n\n    /* decrement the loop counter */\n    stage--;\n\n  } while (stage > 0U);\n}\nLOW_OPTIMIZATION_EXIT\n\n/**\n  @} end of BiquadCascadeDF2T group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_biquad_cascade_stereo_df2T_init_f32.c\n * Description:  Initialization function for floating-point transposed direct\n * form II Biquad cascade filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup BiquadCascadeDF2T\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point transposed\n  direct form II Biquad cascade filter.\n  @param[in,out] S           points to an instance of the filter data structure.\n  @param[in]     numStages   number of 2nd order stages in the filter.\n  @param[in]     pCoeffs     points to the filter coefficients.\n  @param[in]     pState      points to the state buffer.\n  @return        none\n\n  @par           Coefficient and State Ordering\n                   The coefficients are stored in the array pCoeffs\n  in the following order: 
 {b10, b11, b12, a11, a12, b20, b21, b22, a21,\n  a22, ...}\n  
\n  @par\n                   where b1x and a1x are the\n  coefficients for the first stage, b2x and a2x are\n  the coefficients for the second stage, and so on.  The pCoeffs\n  array contains a total of 5*numStages values.\n  @par\n                   The pState is a pointer to state array.\n                   Each Biquad stage has 2 state variables d1, and\n  d2 for each channel. The 2 state variables for stage 1 are first,\n  then the 2 state variables for stage 2, and so on. The state array has a total\n  length of 2*numStages values. The state variables are updated\n  after each block of data is processed; the coefficients are untouched.\n */\n\nvoid arm_biquad_cascade_stereo_df2T_init_f32(\n    arm_biquad_cascade_stereo_df2T_instance_f32 *S, uint8_t numStages,\n    const float32_t *pCoeffs, float32_t *pState) {\n  /* Assign filter stages */\n  S->numStages = numStages;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always 4 * numStages */\n  memset(pState, 0, (4U * (uint32_t)numStages) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of BiquadCascadeDF2T group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_f32.c\n * Description:  Convolution of floating-point sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup Conv Convolution\n\n  Convolution is a mathematical operation that operates on two finite length\n vectors to generate a finite length output vector. Convolution is similar to\n correlation and is frequently used in filtering and data analysis. The CMSIS\n DSP library contains functions for convolving Q7, Q15, Q31, and floating-point\n data types. The library also provides fast versions of the Q15 and Q31\n functions.\n\n @par            Algorithm\n                   Let a[n] and b[n] be sequences of\n length srcALen and srcBLen samples respectively. Then\n the convolution 
 c[n] = a[n] * b[n]\n  
\n  @par\n                   is defined as\n                   \\image html ConvolutionEquation.gif\n  @par\n                   Note that c[n] is of length srcALen +\n srcBLen - 1 and is defined over the interval n=0, 1, 2, ...,\n srcALen + srcBLen - 2. pSrcA points to the first input\n vector of length srcALen and pSrcB points to the\n second input vector of length srcBLen. The output result is\n written to pDst and the calling function must allocate\n srcALen+srcBLen-1 words for the result.\n  @par\n                   Conceptually, when two signals a[n] and\n b[n] are convolved, the signal b[n] slides over\n a[n]. For each offset \\c n, the overlapping portions of a[n] and\n b[n] are multiplied and summed together.\n  @par\n                   Note that convolution is a commutative operation:\n  
\n     a[n] * b[n] = b[n] * a[n].\n  
\n  @par\n                   This means that switching the A and B arguments to the\n convolution functions has no effect.\n\n  @par           Fixed-Point Behavior\n                   Convolution requires summing up a large number of\n intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of\n overflow and saturation. Refer to the function specific documentation below for\n further details of the particular algorithm used.\n\n  @par           Fast Versions\n                   Fast versions are supported for Q31 and Q15. Cycles for Fast\n versions are less compared to Q31 and Q15 of conv and the design requires the\n input signals should be scaled down to avoid intermediate overflows.\n\n  @par           Opt Versions\n                   Opt versions are supported for Q15 and Q7. Design uses\n internal scratch buffer for getting good optimisation. These versions are\n optimised in cycles and consumes more memory (Scratch memory) compared to Q15\n and Q7 versions\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of floating-point sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1.\n  @return        none\n */\n\nvoid arm_conv_f32(const float32_t *pSrcA, uint32_t srcALen,\n                  const float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const float32_t *pIn1;                       /* InputA pointer */\n  const float32_t *pIn2;                       /* InputB pointer */\n  float32_t *pOut = pDst;                      /* Output pointer */\n  const float32_t *px;                         /* Intermediate inputA pointer */\n  const float32_t *py;                         /* Intermediate inputB pointer */\n  const float32_t *pSrc1, *pSrc2;              /* Intermediate pointers */\n  float32_t sum;                               /* Accumulators */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t acc0, acc1, acc2, acc3; /* Accumulators */\n  float32_t x0, x1, x2, x3,\n      c0; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n   * x[n-N+1] * y[N -1] */\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[0]\n   * sum = x[0] * y[1] + x[1] * y[0]\n   * ....\n   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] *\n   * y[0]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first stage starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* x[0] * y[srcBLen - 1] */\n      sum += *px++ * *py--;\n\n      /* x[1] * y[srcBLen - 2] */\n      sum += *px++ * *py--;\n\n      /* x[2] * y[srcBLen - 3] */\n      sum += *px++ * *py--;\n\n      /* x[3] * y[srcBLen - 4] */\n      sum += *px++ * *py--;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize k with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum += *px++ * *py--;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = sum;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pIn2 + count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+\n   * x[srcALen-1] * y[0]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* count is index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0.0f;\n      acc1 = 0.0f;\n      acc2 = 0.0f;\n      acc3 = 0.0f;\n\n      /* read x[0], x[1], x[2] samples */\n      x0 = *px++;\n      x1 = *px++;\n      x2 = *px++;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read y[srcBLen - 1] sample */\n        c0 = *py--;\n        /* Read x[3] sample */\n        x3 = *(px);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[0] * y[srcBLen - 1] */\n        acc0 += x0 * c0;\n        /* acc1 +=  x[1] * y[srcBLen - 1] */\n        acc1 += x1 * c0;\n        /* acc2 +=  x[2] * y[srcBLen - 1] */\n        acc2 += x2 * c0;\n        /* acc3 +=  x[3] * y[srcBLen - 1] */\n        acc3 += x3 * c0;\n\n        /* Read y[srcBLen - 2] sample */\n        c0 = *py--;\n        /* Read x[4] sample */\n        x0 = *(px + 1U);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[1] * y[srcBLen - 2] */\n        acc0 += x1 * c0;\n        /* acc1 +=  x[2] * y[srcBLen - 2] */\n        acc1 += x2 * c0;\n        /* acc2 +=  x[3] * y[srcBLen - 2] */\n        acc2 += x3 * c0;\n        /* acc3 +=  x[4] * y[srcBLen - 2] */\n        acc3 += x0 * c0;\n\n        /* Read y[srcBLen - 3] sample */\n        c0 = *py--;\n        /* Read x[5] sample */\n        x1 = *(px + 2U);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[2] * y[srcBLen - 3] */\n        acc0 += x2 * c0;\n        /* acc1 +=  x[3] * y[srcBLen - 2] */\n        acc1 += x3 * c0;\n        /* acc2 +=  x[4] * y[srcBLen - 2] */\n        acc2 += x0 * c0;\n        /* acc3 +=  x[5] * y[srcBLen - 2] */\n        acc3 += x1 * c0;\n\n        /* Read y[srcBLen - 4] sample */\n        c0 = *py--;\n        /* Read x[6] sample */\n        x2 = *(px + 3U);\n        px += 4U;\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[3] * y[srcBLen - 4] */\n        acc0 += x3 * c0;\n        /* acc1 +=  x[4] * y[srcBLen - 4] */\n        acc1 += x0 * c0;\n        /* acc2 +=  x[5] * y[srcBLen - 4] */\n        acc2 += x1 * c0;\n        /* acc3 +=  x[6] * y[srcBLen - 4] */\n        acc3 += x2 * c0;\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Read y[srcBLen - 5] sample */\n        c0 = *py--;\n        /* Read x[7] sample */\n        x3 = *px++;\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[4] * y[srcBLen - 5] */\n        acc0 += x0 * c0;\n        /* acc1 +=  x[5] * y[srcBLen - 5] */\n        acc1 += x1 * c0;\n        /* acc2 +=  x[6] * y[srcBLen - 5] */\n        acc2 += x2 * c0;\n        /* acc3 +=  x[7] * y[srcBLen - 5] */\n        acc3 += x3 * c0;\n\n        /* Reuse the present samples for the next MAC */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = acc0;\n      *pOut++ = acc1;\n      *pOut++ = acc2;\n      *pOut++ = acc3;\n\n      /* Increment the pointer pIn1 index, count by 4 */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize2 % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = srcBLen >> 2U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += *px++ * *py--;\n        sum += *px++ * *py--;\n        sum += *px++ * *py--;\n        sum += *px++ * *py--;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = srcBLen % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += *px++ * *py--;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = sum;\n\n      /* Increment the MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0.0f;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += *px++ * *py--;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = sum;\n\n      /* Increment the MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n   * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n   * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n   * y[2]\n   * ....\n   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n   * sum +=  x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The blockSize3 variable holds the number of MAC operations performed */\n\n  /* Working pointer of inputA */\n  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = blockSize3 >> 2U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */\n      sum += *px++ * *py--;\n\n      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */\n      sum += *px++ * *py--;\n\n      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */\n      sum += *px++ * *py--;\n\n      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */\n      sum += *px++ * *py--;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = blockSize3 % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    k = blockSize3;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n      sum += *px++ * *py--;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = sum;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pSrc2;\n\n    /* Decrement the loop counter */\n    blockSize3--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const float32_t *pIn1 = pSrcA; /* InputA pointer */\n  const float32_t *pIn2 = pSrcB; /* InputB pointer */\n  float32_t sum;                 /* Accumulator */\n  uint32_t i, j;                 /* Loop counters */\n\n  /* Loop to calculate convolution for output length number of times */\n  for (i = 0U; i < (srcALen + srcBLen - 1U); i++) {\n    /* Initialize sum with zero to carry out MAC operations */\n    sum = 0.0f;\n\n    /* Loop to perform MAC operations according to convolution equation */\n    for (j = 0U; j <= i; j++) {\n      /* Check the array limitations */\n      if (((i - j) < srcBLen) && (j < srcALen)) {\n        /* z[i] += x[i-j] * y[j] */\n        sum += (pIn1[j] * pIn2[i - j]);\n      }\n    }\n\n    /* Store the output in the destination buffer */\n    pDst[i] = sum;\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_fast_opt_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_fast_opt_q15.c\n * Description:  Fast Q15 Convolution\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of Q15 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1\n  @param[in]     pScratch1  points to scratch buffer of size max(srcALen,\n  srcBLen) + 2*min(srcALen, srcBLen) - 2\n  @param[in]     pScratch2  points to scratch buffer of size min(srcALen,\n  srcBLen\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This fast version uses a 32-bit accumulator with 2.30 format.\n                   The accumulator maintains full precision of the intermediate\n  multiplication results but provides only a single guard bit. There is no\n  saturation on intermediate additions. Thus, if the accumulator overflows it\n  wraps around and distorts the result. The input signals should be scaled down\n  to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen,\n  srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as\n  maximum of min(srcALen, srcBLen) number of additions are carried internally.\n                   The 2.30 accumulator is right shifted by 15 bits and then\n  saturated to 1.15 format to yield the final result.\n\n  @remark\n                   Refer to \\ref arm_conv_q15() for a slower implementation of\n  this function which uses 64-bit accumulation to avoid wrap around distortion.\n */\n\nvoid arm_conv_fast_opt_q15(const q15_t *pSrcA, uint32_t srcALen,\n                           const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst,\n                           q15_t *pScratch1, q15_t *pScratch2) {\n  q31_t acc0;               /* Accumulators */\n  const q15_t *pIn1;        /* InputA pointer */\n  const q15_t *pIn2;        /* InputB pointer */\n  q15_t *pOut = pDst;       /* Output pointer */\n  q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */\n  q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */\n  const q15_t *px;          /* Intermediate inputA pointer */\n  q15_t *py;                /* Intermediate inputB pointer */\n  uint32_t j, k, blkCnt;    /* Loop counter */\n  uint32_t tapCnt;          /* Loop count */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc1, acc2, acc3; /* Accumulators */\n  q31_t x1, x2,\n      x3;       /* Temporary variables to hold state and coefficient values */\n  q31_t y1, y2; /* State variables */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* Pointer to take end of scratch2 buffer */\n  pScr2 = pScratch2 + srcBLen - 1;\n\n  /* points to smaller length sequence */\n  px = pIn2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  k = srcBLen >> 2U;\n\n  /* Copy smaller length input sequence in reverse order into second scratch\n   * buffer */\n  while (k > 0U) {\n    /* copy second buffer in reversal manner */\n    *pScr2-- = *px++;\n    *pScr2-- = *px++;\n    *pScr2-- = *px++;\n    *pScr2-- = *px++;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  k = srcBLen % 0x4U;\n\n#else\n\n  /* Initialize k with number of samples */\n  k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (k > 0U) {\n    /* copy second buffer in reversal manner for remaining samples */\n    *pScr2-- = *px++;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* Initialze temporary scratch pointer */\n  pScr1 = pScratch1;\n\n  /* Assuming scratch1 buffer is aligned by 32-bit */\n  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update temporary scratch pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */\n\n  /* Copy (srcALen) samples in scratch buffer */\n  arm_copy_q15(pIn1, pScr1, srcALen);\n\n  /* Update pointers */\n  pScr1 += srcALen;\n\n  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Temporary pointer for scratch2 */\n  py = pScratch2;\n\n  /* Initialization of pIn2 pointer */\n  pIn2 = py;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (srcALen + srcBLen - 1U) >> 2;\n\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch1;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Read two samples from scratch1 buffer */\n    x1 = read_q15x2_ia(&pScr1);\n\n    /* Read next two samples from scratch1 buffer */\n    x2 = read_q15x2_ia(&pScr1);\n\n    tapCnt = (srcBLen) >> 2U;\n\n    while (tapCnt > 0U) {\n\n      /* Read four samples from smaller buffer */\n      y1 = read_q15x2_ia((q15_t **)&pIn2);\n      y2 = read_q15x2_ia((q15_t **)&pIn2);\n\n      /* multiply and accumlate */\n      acc0 = __SMLAD(x1, y1, acc0);\n      acc2 = __SMLAD(x2, y1, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      /* multiply and accumlate */\n      acc1 = __SMLADX(x3, y1, acc1);\n\n      /* Read next two samples from scratch1 buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* multiply and accumlate */\n      acc0 = __SMLAD(x2, y2, acc0);\n      acc2 = __SMLAD(x1, y2, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x1, x2, 0);\n#else\n      x3 = __PKHBT(x2, x1, 0);\n#endif\n\n      acc3 = __SMLADX(x3, y1, acc3);\n      acc1 = __SMLADX(x3, y2, acc1);\n\n      x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      acc3 = __SMLADX(x3, y2, acc3);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Update scratch pointer for remaining samples of smaller length sequence\n     */\n    pScr1 -= 4U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    tapCnt = (srcBLen)&3U;\n\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pIn2);\n      acc1 += (*pScr1++ * *pIn2);\n      acc2 += (*pScr1++ * *pIn2);\n      acc3 += (*pScr1++ * *pIn2++);\n\n      pScr1 -= 3U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* Store the results in the accumulators in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(\n        &pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));\n    write_q15x2_ia(\n        &pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));\n#else\n    write_q15x2_ia(\n        &pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));\n    write_q15x2_ia(\n        &pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* Initialization of inputB pointer */\n    pIn2 = py;\n\n    pScratch1 += 4U;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (srcALen + srcBLen - 1U) & 0x3;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (srcALen + srcBLen - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Calculate convolution for remaining samples of Bigger length sequence */\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch1;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n\n    tapCnt = (srcBLen) >> 1U;\n\n    while (tapCnt > 0U) {\n\n      /* Read next two samples from scratch1 buffer */\n      acc0 += (*pScr1++ * *pIn2++);\n      acc0 += (*pScr1++ * *pIn2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    tapCnt = (srcBLen)&1U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    while (tapCnt > 0U) {\n\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pIn2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* The result is in 2.30 format.  Convert to 1.15 with saturation.\n       Then store the output in the destination buffer. */\n    *pOut++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n\n    /* Initialization of inputB pointer */\n    pIn2 = py;\n\n    pScratch1 += 1U;\n  }\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_fast_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_fast_q15.c\n * Description:  Fast Q15 Convolution\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of Q15 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This fast version uses a 32-bit accumulator with 2.30 format.\n                   The accumulator maintains full precision of the intermediate\n  multiplication results but provides only a single guard bit. There is no\n  saturation on intermediate additions. Thus, if the accumulator overflows it\n  wraps around and distorts the result. The input signals should be scaled down\n  to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen,\n  srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as\n  maximum of min(srcALen, srcBLen) number of additions are carried internally.\n                   The 2.30 accumulator is right shifted by 15 bits and then\n  saturated to 1.15 format to yield the final result.\n\n  @remark\n                   Refer to \\ref arm_conv_q15() for a slower implementation of\n  this function which uses 64-bit accumulation to avoid wrap around distortion.\n */\n\nvoid arm_conv_fast_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB,\n                       uint32_t srcBLen, q15_t *pDst) {\n  const q15_t *pIn1;                 /* InputA pointer */\n  const q15_t *pIn2;                 /* InputB pointer */\n  q15_t *pOut = pDst;                /* Output pointer */\n  q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */\n  const q15_t *px;                   /* Intermediate inputA pointer */\n  const q15_t *py;                   /* Intermediate inputB pointer */\n  const q15_t *pSrc1, *pSrc2;        /* Intermediate pointers */\n  q31_t x0, x1, x2, x3,\n      c0; /* Temporary variables to hold state and coefficient values */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n   * x[n-N+1] * y[N -1] */\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[0]\n   * sum = x[0] * y[1] + x[1] * y[0]\n   * ....\n   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] *\n   * y[0]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* For loop unrolling by 4, this stage is divided into two. */\n  /* First part of this stage computes the MAC operations less than 4 */\n  /* Second part of this stage computes the MAC operations greater than or equal\n   * to 4 */\n\n  /* The first part of the stage starts here */\n  while ((count < 4U) && (blockSize1 > 0U)) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Loop over number of MAC operations between\n     * inputA samples and inputB samples */\n    k = count;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      sum = __SMLAD(*px++, *py--, sum);\n\n      /* Decrement the loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q15_t)(sum >> 15);\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pIn2 + count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* The second part of the stage starts here */\n  /* The internal loop, over count, is unrolled by 4 */\n  /* To, read the last two inputB samples using SIMD:\n   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */\n  py = py - 1;\n\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2]\n       * respectively */\n      sum = __SMLADX(read_q15x2_ia((q15_t **)&px), read_q15x2_da((q15_t **)&py),\n                     sum);\n      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4]\n       * respectively */\n      sum = __SMLADX(read_q15x2_ia((q15_t **)&px), read_q15x2_da((q15_t **)&py),\n                     sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* For the next MAC operations, the pointer py is used without SIMD\n     * So, py is incremented by 1 */\n    py = py + 1U;\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n     ** No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      sum = __SMLAD(*px++, *py--, sum);\n\n      /* Decrement the loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q15_t)(sum >> 15);\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pIn2 + (count - 1U);\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+\n   * x[srcALen-1] * y[0]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* count is the index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* --------------------\n   * Stage2 process\n   * -------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n    /* Loop unroll over blockSize2, by 4 */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      py = py - 1U;\n\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* read x[0], x[1] samples */\n      x0 = read_q15x2((q15_t *)px);\n      /* read x[1], x[2] samples */\n      x1 = read_q15x2((q15_t *)px + 1);\n      px += 2U;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read the last two inputB samples using SIMD:\n         * y[srcBLen - 1] and y[srcBLen - 2] */\n        c0 = read_q15x2_da((q15_t **)&py);\n\n        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */\n        acc0 = __SMLADX(x0, c0, acc0);\n\n        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */\n        acc1 = __SMLADX(x1, c0, acc1);\n\n        /* Read x[2], x[3] */\n        x2 = read_q15x2((q15_t *)px);\n\n        /* Read x[3], x[4] */\n        x3 = read_q15x2((q15_t *)px + 1);\n\n        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */\n        acc2 = __SMLADX(x2, c0, acc2);\n\n        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */\n        acc3 = __SMLADX(x3, c0, acc3);\n\n        /* Read y[srcBLen - 3] and y[srcBLen - 4] */\n        c0 = read_q15x2_da((q15_t **)&py);\n\n        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */\n        acc0 = __SMLADX(x2, c0, acc0);\n\n        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */\n        acc1 = __SMLADX(x3, c0, acc1);\n\n        /* Read x[4], x[5] */\n        x0 = read_q15x2((q15_t *)px + 2);\n\n        /* Read x[5], x[6] */\n        x1 = read_q15x2((q15_t *)px + 3);\n        px += 4U;\n\n        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */\n        acc2 = __SMLADX(x0, c0, acc2);\n\n        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */\n        acc3 = __SMLADX(x1, c0, acc3);\n\n      } while (--k);\n\n      /* For the next MAC operations, SIMD is not used\n       * So, the 16 bit pointer if inputB, py is updated */\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      if (k == 1U) {\n        /* Read y[srcBLen - 5] */\n        c0 = *(py + 1);\n\n#ifdef ARM_MATH_BIG_ENDIAN\n        c0 = c0 << 16U;\n#else\n        c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n        /* Read x[7] */\n        x3 = read_q15x2((q15_t *)px);\n        px++;\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLAD(x0, c0, acc0);\n        acc1 = __SMLAD(x1, c0, acc1);\n        acc2 = __SMLADX(x1, c0, acc2);\n        acc3 = __SMLADX(x3, c0, acc3);\n      }\n\n      if (k == 2U) {\n        /* Read y[srcBLen - 5], y[srcBLen - 6] */\n        c0 = read_q15x2((q15_t *)py);\n\n        /* Read x[7], x[8] */\n        x3 = read_q15x2((q15_t *)px);\n\n        /* Read x[9] */\n        x2 = read_q15x2((q15_t *)px + 1);\n        px += 2U;\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLADX(x0, c0, acc0);\n        acc1 = __SMLADX(x1, c0, acc1);\n        acc2 = __SMLADX(x3, c0, acc2);\n        acc3 = __SMLADX(x2, c0, acc3);\n      }\n\n      if (k == 3U) {\n        /* Read y[srcBLen - 5], y[srcBLen - 6] */\n        c0 = read_q15x2((q15_t *)py);\n\n        /* Read x[7], x[8] */\n        x3 = read_q15x2((q15_t *)px);\n\n        /* Read x[9] */\n        x2 = read_q15x2((q15_t *)px + 1);\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLADX(x0, c0, acc0);\n        acc1 = __SMLADX(x1, c0, acc1);\n        acc2 = __SMLADX(x3, c0, acc2);\n        acc3 = __SMLADX(x2, c0, acc3);\n\n        /* Read y[srcBLen - 7] */\n        c0 = *(py - 1);\n#ifdef ARM_MATH_BIG_ENDIAN\n        c0 = c0 << 16U;\n#else\n        c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n        /* Read x[10] */\n        x3 = read_q15x2((q15_t *)px + 2);\n        px += 3U;\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLADX(x1, c0, acc0);\n        acc1 = __SMLAD(x2, c0, acc1);\n        acc2 = __SMLADX(x2, c0, acc2);\n        acc3 = __SMLADX(x3, c0, acc3);\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pOut, __PKHBT((acc0 >> 15), (acc1 >> 15), 16));\n      write_q15x2_ia(&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16));\n#else\n      write_q15x2_ia(&pOut, __PKHBT((acc1 >> 15), (acc0 >> 15), 16));\n      write_q15x2_ia(&pOut, __PKHBT((acc3 >> 15), (acc2 >> 15), 16));\n#endif /*#ifndef  ARM_MATH_BIG_ENDIAN*/\n\n      /* Increment the pointer pIn1 index, count by 4 */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* If the blockSize2 is not a multiple of 4, compute any remaining output\n     *samples here.\n     ** No loop unrolling is used. */\n    blkCnt = blockSize2 % 0x4U;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += ((q31_t)*px++ * *py--);\n        sum += ((q31_t)*px++ * *py--);\n        sum += ((q31_t)*px++ * *py--);\n        sum += ((q31_t)*px++ * *py--);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += ((q31_t)*px++ * *py--);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(sum >> 15);\n\n      /* Increment the pointer pIn1 index, count by 1 */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += ((q31_t)*px++ * *py--);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(sum >> 15);\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n   * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n   * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n   * y[2]\n   * ....\n   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n   * sum +=  x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The blockSize3 variable holds the number of MAC operations performed */\n\n  /* Working pointer of inputA */\n  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  pIn2 = pSrc2 - 1U;\n  py = pIn2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  /* For loop unrolling by 4, this stage is divided into two. */\n  /* First part of this stage computes the MAC operations greater than 4 */\n  /* Second part of this stage computes the MAC operations less than or equal to\n   * 4 */\n\n  /* The first part of the stage starts here */\n  j = blockSize3 >> 2U;\n\n  while ((j > 0U) && (blockSize3 > 0U)) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = blockSize3 >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied\n       * with y[srcBLen - 1], y[srcBLen - 2] respectively */\n      sum = __SMLADX(read_q15x2_ia((q15_t **)&px), read_q15x2_da((q15_t **)&py),\n                     sum);\n      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied\n       * with y[srcBLen - 3], y[srcBLen - 4] respectively */\n      sum = __SMLADX(read_q15x2_ia((q15_t **)&px), read_q15x2_da((q15_t **)&py),\n                     sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* For the next MAC operations, the pointer py is used without SIMD\n     * So, py is incremented by 1 */\n    py = py + 1U;\n\n    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs\n     *here.\n     ** No loop unrolling is used. */\n    k = blockSize3 % 0x4U;\n\n    while (k > 0U) {\n      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */\n      sum = __SMLAD(*px++, *py--, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q15_t)(sum >> 15);\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pIn2;\n\n    /* Decrement  loop counter */\n    blockSize3--;\n\n    j--;\n  }\n\n  /* The second part of the stage starts here */\n  /* SIMD is not used for the next MAC operations,\n   * so pointer py is updated to read only one sample at a time */\n  py = py + 1U;\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = blockSize3;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n      sum = __SMLAD(*px++, *py--, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q15_t)(sum >> 15);\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pSrc2;\n\n    /* Decrement the loop counter */\n    blockSize3--;\n  }\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_fast_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_fast_q31.c\n * Description:  Fast Q31 Convolution\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of Q31 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence.\n  @param[in]     srcALen    length of the first input sequence.\n  @param[in]     pSrcB      points to the second input sequence.\n  @param[in]     srcBLen    length of the second input sequence.\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This function is optimized for speed at the expense of\n  fixed-point precision and overflow protection. The result of each 1.31 x 1.31\n  multiplication is truncated to 2.30 format. These intermediate results are\n  accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is\n  saturated and converted to a 1.31 result.\n  @par\n                   The fast version has the same overflow behavior as the\n  standard version but provides less precision since it discards the low 32 bits\n  of each multiplication result. In order to avoid overflows completely the\n  input signals must be scaled down. Scale down the inputs by log2(min(srcALen,\n  srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as\n  maximum of min(srcALen, srcBLen) number of additions are carried internally.\n  @remark\n                   Refer to \\ref arm_conv_q31() for a slower implementation of\n  this function which uses 64-bit accumulation to provide higher precision.\n */\n\nvoid arm_conv_fast_q31(const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB,\n                       uint32_t srcBLen, q31_t *pDst) {\n  const q31_t *pIn1;                 /* InputA pointer */\n  const q31_t *pIn2;                 /* InputB pointer */\n  q31_t *pOut = pDst;                /* Output pointer */\n  const q31_t *px;                   /* Intermediate inputA pointer */\n  const q31_t *py;                   /* Intermediate inputB pointer */\n  const q31_t *pSrc1, *pSrc2;        /* Intermediate pointers */\n  q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */\n  q31_t x0, x1, x2, x3,\n      c0; /* Temporary variables to hold state and coefficient values */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n   * x[n-N+1] * y[N -1] */\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[0]\n   * sum = x[0] * y[1] + x[1] * y[0]\n   * ....\n   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] *\n   * y[0]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first stage starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* x[0] * y[srcBLen - 1] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* x[1] * y[srcBLen - 2] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* x[2] * y[srcBLen - 3] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* x[3] * y[srcBLen - 4] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n     ** No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = sum << 1;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pIn2 + count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+\n   * x[srcALen-1] * y[0]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* count is index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n    /* Loop unroll over blockSize2, by 4 */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* read x[0], x[1], x[2] samples */\n      x0 = *px++;\n      x1 = *px++;\n      x2 = *px++;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read y[srcBLen - 1] sample */\n        c0 = *py--;\n        /* Read x[3] sample */\n        x3 = *px++;\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[0] * y[srcBLen - 1] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n        /* acc1 +=  x[1] * y[srcBLen - 1] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n        /* acc2 +=  x[2] * y[srcBLen - 1] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n        /* acc3 +=  x[3] * y[srcBLen - 1] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n        /* Read y[srcBLen - 2] sample */\n        c0 = *py--;\n        /* Read x[4] sample */\n        x0 = *px++;\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[1] * y[srcBLen - 2] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x1 * c0)) >> 32);\n        /* acc1 +=  x[2] * y[srcBLen - 2] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x2 * c0)) >> 32);\n        /* acc2 +=  x[3] * y[srcBLen - 2] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x3 * c0)) >> 32);\n        /* acc3 +=  x[4] * y[srcBLen - 2] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x0 * c0)) >> 32);\n\n        /* Read y[srcBLen - 3] sample */\n        c0 = *py--;\n        /* Read x[5] sample */\n        x1 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[2] * y[srcBLen - 3] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x2 * c0)) >> 32);\n        /* acc1 +=  x[3] * y[srcBLen - 3] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x3 * c0)) >> 32);\n        /* acc2 +=  x[4] * y[srcBLen - 3] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x0 * c0)) >> 32);\n        /* acc3 +=  x[5] * y[srcBLen - 3] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x1 * c0)) >> 32);\n\n        /* Read y[srcBLen - 4] sample */\n        c0 = *py--;\n        /* Read x[6] sample */\n        x2 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[3] * y[srcBLen - 4] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x3 * c0)) >> 32);\n        /* acc1 +=  x[4] * y[srcBLen - 4] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x0 * c0)) >> 32);\n        /* acc2 +=  x[5] * y[srcBLen - 4] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x1 * c0)) >> 32);\n        /* acc3 +=  x[6] * y[srcBLen - 4] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x2 * c0)) >> 32);\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Read y[srcBLen - 5] sample */\n        c0 = *py--;\n        /* Read x[7] sample */\n        x3 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[4] * y[srcBLen - 5] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n        /* acc1 +=  x[5] * y[srcBLen - 5] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n        /* acc2 +=  x[6] * y[srcBLen - 5] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n        /* acc3 +=  x[7] * y[srcBLen - 5] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n        /* Reuse the present samples for the next MAC */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q31_t)(acc0 << 1);\n      *pOut++ = (q31_t)(acc1 << 1);\n      *pOut++ = (q31_t)(acc2 << 1);\n      *pOut++ = (q31_t)(acc3 << 1);\n\n      /* Increment the pointer pIn1 index, count by 4 */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* If the blockSize2 is not a multiple of 4, compute any remaining output\n     *samples here.\n     ** No loop unrolling is used. */\n    blkCnt = blockSize2 % 0x4U;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = sum << 1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = sum << 1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n   * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n   * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n   * y[2]\n   * ....\n   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n   * sum +=  x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The blockSize3 variable holds the number of MAC operations performed */\n\n  /* Working pointer of inputA */\n  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = blockSize3 >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs\n     *here.\n     ** No loop unrolling is used. */\n    k = blockSize3 % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = sum << 1;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pSrc2;\n\n    /* Decrement loop counter */\n    blockSize3--;\n  }\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_opt_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_opt_q15.c\n * Description:  Convolution of Q15 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of Q15 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1.\n  @param[in]     pScratch1  points to scratch buffer of size max(srcALen,\n  srcBLen) + 2*min(srcALen, srcBLen) - 2.\n  @param[in]     pScratch2  points to scratch buffer of size min(srcALen,\n  srcBLen).\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30\n  result. The 2.30 intermediate results are accumulated in a 64-bit accumulator\n  in 34.30 format. This approach provides 33 guard bits and there is no risk of\n  overflow. The 34.30 result is then truncated to 34.15 format by discarding the\n  low 15 bits and then saturated to 1.15 format.\n  @remark\n                   Refer to \\ref arm_conv_fast_q15() for a faster but less\n  precise version of this function.\n */\n\nvoid arm_conv_opt_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB,\n                      uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1,\n                      q15_t *pScratch2) {\n  q63_t acc0;               /* Accumulators */\n  const q15_t *pIn1;        /* InputA pointer */\n  const q15_t *pIn2;        /* InputB pointer */\n  q15_t *pOut = pDst;       /* Output pointer */\n  q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */\n  q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */\n  const q15_t *px;          /* Intermediate inputA pointer */\n  q15_t *py;                /* Intermediate inputB pointer */\n  uint32_t j, k, blkCnt;    /* Loop counter */\n  uint32_t tapCnt;          /* Loop count */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc1, acc2, acc3; /* Accumulators */\n  q31_t x1, x2,\n      x3;       /* Temporary variables to hold state and coefficient values */\n  q31_t y1, y2; /* State variables */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* Pointer to take end of scratch2 buffer */\n  pScr2 = pScratch2 + srcBLen - 1;\n\n  /* points to smaller length sequence */\n  px = pIn2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  k = srcBLen >> 2U;\n\n  /* Copy smaller length input sequence in reverse order into second scratch\n   * buffer */\n  while (k > 0U) {\n    /* copy second buffer in reversal manner */\n    *pScr2-- = *px++;\n    *pScr2-- = *px++;\n    *pScr2-- = *px++;\n    *pScr2-- = *px++;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  k = srcBLen % 0x4U;\n\n#else\n\n  /* Initialize k with number of samples */\n  k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (k > 0U) {\n    /* copy second buffer in reversal manner for remaining samples */\n    *pScr2-- = *px++;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* Initialze temporary scratch pointer */\n  pScr1 = pScratch1;\n\n  /* Assuming scratch1 buffer is aligned by 32-bit */\n  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update temporary scratch pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */\n\n  /* Copy (srcALen) samples in scratch buffer */\n  arm_copy_q15(pIn1, pScr1, srcALen);\n\n  /* Update pointers */\n  pScr1 += srcALen;\n\n  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Temporary pointer for scratch2 */\n  py = pScratch2;\n\n  /* Initialization of pIn2 pointer */\n  pIn2 = py;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (srcALen + srcBLen - 1U) >> 2;\n\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch1;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Read two samples from scratch1 buffer */\n    x1 = read_q15x2_ia(&pScr1);\n\n    /* Read next two samples from scratch1 buffer */\n    x2 = read_q15x2_ia(&pScr1);\n\n    tapCnt = (srcBLen) >> 2U;\n\n    while (tapCnt > 0U) {\n\n      /* Read four samples from smaller buffer */\n      y1 = read_q15x2_ia((q15_t **)&pIn2);\n      y2 = read_q15x2_ia((q15_t **)&pIn2);\n\n      /* multiply and accumlate */\n      acc0 = __SMLALD(x1, y1, acc0);\n      acc2 = __SMLALD(x2, y1, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      /* multiply and accumlate */\n      acc1 = __SMLALDX(x3, y1, acc1);\n\n      /* Read next two samples from scratch1 buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* multiply and accumlate */\n      acc0 = __SMLALD(x2, y2, acc0);\n      acc2 = __SMLALD(x1, y2, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x1, x2, 0);\n#else\n      x3 = __PKHBT(x2, x1, 0);\n#endif\n\n      acc3 = __SMLALDX(x3, y1, acc3);\n      acc1 = __SMLALDX(x3, y2, acc1);\n\n      x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      acc3 = __SMLALDX(x3, y2, acc3);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Update scratch pointer for remaining samples of smaller length sequence\n     */\n    pScr1 -= 4U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    tapCnt = (srcBLen)&3U;\n\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pIn2);\n      acc1 += (*pScr1++ * *pIn2);\n      acc2 += (*pScr1++ * *pIn2);\n      acc3 += (*pScr1++ * *pIn2++);\n\n      pScr1 -= 3U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* Store the results in the accumulators in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(\n        &pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));\n    write_q15x2_ia(\n        &pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));\n#else\n    write_q15x2_ia(\n        &pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));\n    write_q15x2_ia(\n        &pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* Initialization of inputB pointer */\n    pIn2 = py;\n\n    pScratch1 += 4U;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (srcALen + srcBLen - 1U) & 0x3;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (srcALen + srcBLen - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Calculate convolution for remaining samples of Bigger length sequence */\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch1;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n\n    tapCnt = (srcBLen) >> 1U;\n\n    while (tapCnt > 0U) {\n\n      /* Read next two samples from scratch1 buffer */\n      acc0 += (*pScr1++ * *pIn2++);\n      acc0 += (*pScr1++ * *pIn2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    tapCnt = (srcBLen)&1U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    while (tapCnt > 0U) {\n\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pIn2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* The result is in 2.30 format.  Convert to 1.15 with saturation.\n       Then store the output in the destination buffer. */\n    *pOut++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n\n    /* Initialization of inputB pointer */\n    pIn2 = py;\n\n    pScratch1 += 1U;\n  }\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_opt_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_opt_q7.c\n * Description:  Convolution of Q7 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of Q7 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1.\n  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size\n  max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size\n  min(srcALen, srcBLen).\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n  accumulator. Both the inputs are represented in 1.7 format and multiplications\n  yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit\n  accumulator in 18.14 format. This approach provides 17 guard bits and there is\n  no risk of overflow as long as max(srcALen, srcBLen)<131072.\n                   The 18.14 result is then truncated to 18.7 format by\n  discarding the low 7 bits and then saturated to 1.7 format.\n */\n\nvoid arm_conv_opt_q7(const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB,\n                     uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1,\n                     q15_t *pScratch2) {\n  q15_t *pScr1 = pScratch1;      /* Temporary pointer for scratch */\n  q15_t *pScr2 = pScratch2;      /* Temporary pointer for scratch */\n  q15_t x4;                      /* Temporary input variable */\n  q15_t *py;                     /* Temporary input2 pointer */\n  q31_t acc0, acc1, acc2, acc3;  /* Accumulators */\n  const q7_t *pIn1, *pIn2;       /* InputA and inputB pointer */\n  uint32_t j, k, blkCnt, tapCnt; /* Loop counter */\n  q31_t x1, x2, x3, y1;          /* Temporary input variables */\n  const q7_t *px;                /* Temporary input1 pointer */\n  q7_t *pOut = pDst;             /* Output pointer */\n  q7_t out0, out1, out2, out3;   /* Temporary variables */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* points to smaller length sequence */\n  px = pIn2 + srcBLen - 1;\n\n  /* Apply loop unrolling and do 4 Copies simultaneously. */\n  k = srcBLen >> 2U;\n\n  /* First part of the processing with loop unrolling copies 4 data points at a\n   *time.\n   ** a second loop below copies for the remaining 1 to 3 samples. */\n  while (k > 0U) {\n    /* copy second buffer in reversal manner */\n    x4 = (q15_t)*px--;\n    *pScr2++ = x4;\n    x4 = (q15_t)*px--;\n    *pScr2++ = x4;\n    x4 = (q15_t)*px--;\n    *pScr2++ = x4;\n    x4 = (q15_t)*px--;\n    *pScr2++ = x4;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* If the count is not a multiple of 4, copy remaining samples here.\n   ** No loop unrolling is used. */\n  k = srcBLen % 0x4U;\n\n  while (k > 0U) {\n    /* copy second buffer in reversal manner for remaining samples */\n    x4 = (q15_t)*px--;\n    *pScr2++ = x4;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* Fill (srcBLen - 1U) zeros in scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update temporary scratch pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Copy (srcALen) samples in scratch buffer */\n  /* Apply loop unrolling and do 4 Copies simultaneously. */\n  k = srcALen >> 2U;\n\n  /* First part of the processing with loop unrolling copies 4 data points at a\n   *time.\n   ** a second loop below copies for the remaining 1 to 3 samples. */\n  while (k > 0U) {\n    /* copy second buffer in reversal manner */\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* If the count is not a multiple of 4, copy remaining samples here.\n   ** No loop unrolling is used. */\n  k = srcALen % 0x4U;\n\n  while (k > 0U) {\n    /* copy second buffer in reversal manner for remaining samples */\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n\n    /* Decrement the loop counter */\n    k--;\n  }\n\n  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Temporary pointer for scratch2 */\n  py = pScratch2;\n\n  /* Initialization of pIn2 pointer */\n  pIn2 = (q7_t *)py;\n\n  pScr2 = py;\n\n  /* Actual convolution process starts here */\n  blkCnt = (srcALen + srcBLen - 1U) >> 2U;\n\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch1;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Read two samples from scratch1 buffer */\n    x1 = read_q15x2_ia(&pScr1);\n\n    /* Read next two samples from scratch1 buffer */\n    x2 = read_q15x2_ia(&pScr1);\n\n    tapCnt = (srcBLen) >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read four samples from smaller buffer */\n      y1 = read_q15x2_ia(&pScr2);\n\n      /* multiply and accumlate */\n      acc0 = __SMLAD(x1, y1, acc0);\n      acc2 = __SMLAD(x2, y1, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      /* multiply and accumlate */\n      acc1 = __SMLADX(x3, y1, acc1);\n\n      /* Read next two samples from scratch1 buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x1, x2, 0);\n#else\n      x3 = __PKHBT(x2, x1, 0);\n#endif\n\n      acc3 = __SMLADX(x3, y1, acc3);\n\n      /* Read four samples from smaller buffer */\n      y1 = read_q15x2_ia(&pScr2);\n\n      acc0 = __SMLAD(x2, y1, acc0);\n\n      acc2 = __SMLAD(x1, y1, acc2);\n\n      acc1 = __SMLADX(x3, y1, acc1);\n\n      x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      acc3 = __SMLADX(x3, y1, acc3);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Update scratch pointer for remaining samples of smaller length sequence\n     */\n    pScr1 -= 4U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    tapCnt = (srcBLen)&3U;\n\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pScr2);\n      acc1 += (*pScr1++ * *pScr2);\n      acc2 += (*pScr1++ * *pScr2);\n      acc3 += (*pScr1++ * *pScr2++);\n\n      pScr1 -= 3U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* Store the result in the accumulator in the destination buffer. */\n    out0 = (q7_t)(__SSAT(acc0 >> 7U, 8));\n    out1 = (q7_t)(__SSAT(acc1 >> 7U, 8));\n    out2 = (q7_t)(__SSAT(acc2 >> 7U, 8));\n    out3 = (q7_t)(__SSAT(acc3 >> 7U, 8));\n\n    write_q7x4_ia(&pOut, __PACKq7(out0, out1, out2, out3));\n\n    /* Initialization of inputB pointer */\n    pScr2 = py;\n\n    pScratch1 += 4U;\n  }\n\n  blkCnt = (srcALen + srcBLen - 1U) & 0x3;\n\n  /* Calculate convolution for remaining samples of Bigger length sequence */\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch1;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n\n    tapCnt = (srcBLen) >> 1U;\n\n    while (tapCnt > 0U) {\n      acc0 += (*pScr1++ * *pScr2++);\n      acc0 += (*pScr1++ * *pScr2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    tapCnt = (srcBLen)&1U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pScr2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q7_t)(__SSAT(acc0 >> 7U, 8));\n\n    /* Initialization of inputB pointer */\n    pScr2 = py;\n\n    pScratch1 += 1U;\n  }\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_f32.c\n * Description:  Partial convolution of floating-point sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup PartialConv Partial Convolution\n\n  Partial Convolution is equivalent to Convolution except that a subset of the\n  output samples is generated. Each function has two additional arguments.\n  firstIndex specifies the starting index of the subset of output\n  samples. numPoints is the number of output samples to compute.\n  The function computes the output in the range\n  [firstIndex, ..., firstIndex+numPoints-1].\n  The output array pDst contains numPoints values.\n\n  The allowable range of output indices is [0 srcALen+srcBLen-2].\n  If the requested subset does not fall in this range then the functions return\n  ARM_MATH_ARGUMENT_ERROR. Otherwise the functions return ARM_MATH_SUCCESS.\n  \\note Refer to \\ref arm_conv_f32() for details on fixed point behavior.\n\n  @par           Fast Versions\n                   Fast versions are supported for Q31 and Q15 of partial\n  convolution. Cycles for Fast versions are less compared to Q31 and Q15 of\n  partial conv and the design requires the input signals should be scaled down\n  to avoid intermediate overflows.\n\n  @par           Opt Versions\n                   Opt versions are supported for Q15 and Q7. Design uses\n  internal scratch buffer for getting good optimisation. These versions are\n  optimised in cycles and consumes more memory (Scratch memory) compared to Q15\n  and Q7 versions of partial convolution\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of floating-point sequences.\n  @param[in]     pSrcA       points to the first input sequence\n  @param[in]     srcALen     length of the first input sequence\n  @param[in]     pSrcB       points to the second input sequence\n  @param[in]     srcBLen     length of the second input sequence\n  @param[out]    pDst        points to the location where the output result is\n  written\n  @param[in]     firstIndex  is the first output sample to start with\n  @param[in]     numPoints   is the number of output points to be computed\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n */\n\narm_status arm_conv_partial_f32(const float32_t *pSrcA, uint32_t srcALen,\n                                const float32_t *pSrcB, uint32_t srcBLen,\n                                float32_t *pDst, uint32_t firstIndex,\n                                uint32_t numPoints) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const float32_t *pIn1 = pSrcA;  /* InputA pointer */\n  const float32_t *pIn2 = pSrcB;  /* InputB pointer */\n  float32_t *pOut = pDst;         /* Output pointer */\n  const float32_t *px;            /* Intermediate inputA pointer */\n  const float32_t *py;            /* Intermediate inputB pointer */\n  const float32_t *pSrc1, *pSrc2; /* Intermediate pointers */\n  float32_t sum;                  /* Accumulator */\n  uint32_t j, k, count, blkCnt, check;\n  int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  arm_status status; /* Status of Partial convolution */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t acc0, acc1, acc2, acc3; /* Accumulator */\n  float32_t x0, x1, x2, x3, c0;     /* Temporary variables */\n#endif\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* Conditions to check which loopCounter holds\n     * the first and last indices of the output samples to be calculated. */\n    check = firstIndex + numPoints;\n    blockSize3 = ((int32_t)check > (int32_t)srcALen)\n                     ? (int32_t)check - (int32_t)srcALen\n                     : 0;\n    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1)\n                     ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen\n                     : blockSize3;\n    blockSize1 = ((int32_t)srcBLen - 1) - (int32_t)firstIndex;\n    blockSize1 =\n        (blockSize1 > 0)\n            ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints)\n            : 0;\n    blockSize2 =\n        ((int32_t)check - blockSize3) - (blockSize1 + (int32_t)firstIndex);\n    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;\n\n    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n     * x[n-N+1] * y[N -1] */\n    /* The function is internally\n     * divided into three stages according to the number of multiplications that\n     * has to be taken place between inputA samples and inputB samples. In the\n     * first stage of the algorithm, the multiplications increase by one for\n     * every iteration. In the second stage of the algorithm, srcBLen number of\n     * multiplications are done. In the third stage of the algorithm, the\n     * multiplications decrease by one for every iteration. */\n\n    /* Set the output pointer to point to the firstIndex\n     * of the output sample to be calculated. */\n    pOut = pDst + firstIndex;\n\n    /* --------------------------\n     * Initializations of stage1\n     * -------------------------*/\n\n    /* sum = x[0] * y[0]\n     * sum = x[0] * y[1] + x[1] * y[0]\n     * ....\n     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1]\n     * * y[0]\n     */\n\n    /* In this stage the MAC operations are increased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed.\n       Since the partial convolution starts from firstIndex\n       Number of Macs to be performed is firstIndex + 1 */\n    count = 1U + firstIndex;\n\n    /* Working pointer of inputA */\n    px = pIn1;\n\n    /* Working pointer of inputB */\n    pSrc1 = pIn2 + firstIndex;\n    py = pSrc1;\n\n    /* ------------------------\n     * Stage1 process\n     * ----------------------*/\n\n    /* The first stage starts here */\n    while (blockSize1 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = count >> 2U;\n\n      while (k > 0U) {\n        /* x[0] * y[srcBLen - 1] */\n        sum += *px++ * *py--;\n\n        /* x[1] * y[srcBLen - 2] */\n        sum += *px++ * *py--;\n\n        /* x[2] * y[srcBLen - 3] */\n        sum += *px++ * *py--;\n\n        /* x[3] * y[srcBLen - 4] */\n        sum += *px++ * *py--;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = count % 0x4U;\n\n#else\n\n      /* Initialize k with number of samples */\n      k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += *px++ * *py--;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = sum;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      py = ++pSrc1;\n      px = pIn1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Decrement loop counter */\n      blockSize1--;\n    }\n\n    /* --------------------------\n     * Initializations of stage2\n     * ------------------------*/\n\n    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n     * ....\n     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2]\n     * +...+ x[srcALen-1] * y[0]\n     */\n\n    /* Working pointer of inputA */\n    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) {\n      pSrc1 = pIn1 + firstIndex - srcBLen + 1;\n    } else {\n      pSrc1 = pIn1;\n    }\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* count is index by which the pointer pIn1 to be incremented */\n    count = 0U;\n\n    /* -------------------\n     * Stage2 process\n     * ------------------*/\n\n    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n     * performed. So, to loop unroll over blockSize2,\n     * srcBLen should be greater than or equal to 4 */\n    if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      blkCnt = ((uint32_t)blockSize2 >> 2U);\n\n      while (blkCnt > 0U) {\n        /* Set all accumulators to zero */\n        acc0 = 0.0f;\n        acc1 = 0.0f;\n        acc2 = 0.0f;\n        acc3 = 0.0f;\n\n        /* read x[0], x[1], x[2] samples */\n        x0 = *px++;\n        x1 = *px++;\n        x2 = *px++;\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        k = srcBLen >> 2U;\n\n        /* First part of the processing with loop unrolling.  Compute 4 MACs at\n         *a time.\n         ** a second loop below computes MACs for the remaining 1 to 3 samples.\n         */\n        do {\n          /* Read y[srcBLen - 1] sample */\n          c0 = *py--;\n          /* Read x[3] sample */\n          x3 = *px++;\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[0] * y[srcBLen - 1] */\n          acc0 += x0 * c0;\n          /* acc1 +=  x[1] * y[srcBLen - 1] */\n          acc1 += x1 * c0;\n          /* acc2 +=  x[2] * y[srcBLen - 1] */\n          acc2 += x2 * c0;\n          /* acc3 +=  x[3] * y[srcBLen - 1] */\n          acc3 += x3 * c0;\n\n          /* Read y[srcBLen - 2] sample */\n          c0 = *py--;\n          /* Read x[4] sample */\n          x0 = *px++;\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[1] * y[srcBLen - 2] */\n          acc0 += x1 * c0;\n          /* acc1 +=  x[2] * y[srcBLen - 2] */\n          acc1 += x2 * c0;\n          /* acc2 +=  x[3] * y[srcBLen - 2] */\n          acc2 += x3 * c0;\n          /* acc3 +=  x[4] * y[srcBLen - 2] */\n          acc3 += x0 * c0;\n\n          /* Read y[srcBLen - 3] sample */\n          c0 = *py--;\n          /* Read x[5] sample */\n          x1 = *px++;\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[2] * y[srcBLen - 3] */\n          acc0 += x2 * c0;\n          /* acc1 +=  x[3] * y[srcBLen - 2] */\n          acc1 += x3 * c0;\n          /* acc2 +=  x[4] * y[srcBLen - 2] */\n          acc2 += x0 * c0;\n          /* acc3 +=  x[5] * y[srcBLen - 2] */\n          acc3 += x1 * c0;\n\n          /* Read y[srcBLen - 4] sample */\n          c0 = *py--;\n          /* Read x[6] sample */\n          x2 = *px++;\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[3] * y[srcBLen - 4] */\n          acc0 += x3 * c0;\n          /* acc1 +=  x[4] * y[srcBLen - 4] */\n          acc1 += x0 * c0;\n          /* acc2 +=  x[5] * y[srcBLen - 4] */\n          acc2 += x1 * c0;\n          /* acc3 +=  x[6] * y[srcBLen - 4] */\n          acc3 += x2 * c0;\n\n        } while (--k);\n\n        /* If the srcBLen is not a multiple of 4, compute any remaining MACs\n         *here.\n         ** No loop unrolling is used. */\n        k = srcBLen % 0x4U;\n\n        while (k > 0U) {\n          /* Read y[srcBLen - 5] sample */\n          c0 = *py--;\n          /* Read x[7] sample */\n          x3 = *px++;\n\n          /* Perform the multiply-accumulates */\n          /* acc0 +=  x[4] * y[srcBLen - 5] */\n          acc0 += x0 * c0;\n          /* acc1 +=  x[5] * y[srcBLen - 5] */\n          acc1 += x1 * c0;\n          /* acc2 +=  x[6] * y[srcBLen - 5] */\n          acc2 += x2 * c0;\n          /* acc3 +=  x[7] * y[srcBLen - 5] */\n          acc3 += x3 * c0;\n\n          /* Reuse the present samples for the next MAC */\n          x0 = x1;\n          x1 = x2;\n          x2 = x3;\n\n          /* Decrement the loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = acc0;\n        *pOut++ = acc1;\n        *pOut++ = acc2;\n        *pOut++ = acc3;\n\n        /* Increment the pointer pIn1 index, count by 4 */\n        count += 4U;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      blkCnt = (uint32_t)blockSize2 % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Loop unrolling: Compute 4 outputs at a time */\n        k = srcBLen >> 2U;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulates */\n          sum += *px++ * *py--;\n          sum += *px++ * *py--;\n          sum += *px++ * *py--;\n          sum += *px++ * *py--;\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Loop unrolling: Compute remaining outputs */\n        k = srcBLen % 0x4U;\n\n#else\n\n        /* Initialize blkCnt with number of samples */\n        k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += *px++ * *py--;\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = sum;\n\n        /* Increment MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n    } else {\n      /* If the srcBLen is not a multiple of 4,\n       * the blockSize2 loop cannot be unrolled by 4 */\n      blkCnt = (uint32_t)blockSize2;\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0.0f;\n\n        /* srcBLen number of MACS should be performed */\n        k = srcBLen;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += *px++ * *py--;\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = sum;\n\n        /* Increment the MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement the loop counter */\n        blkCnt--;\n      }\n    }\n\n    /* --------------------------\n     * Initializations of stage3\n     * -------------------------*/\n\n    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n     * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n     * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n     * y[2]\n     * ....\n     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n     * sum +=  x[srcALen-1] * y[srcBLen-1]\n     */\n\n    /* In this stage the MAC operations are decreased by 1 for every iteration.\n       The blockSize3 variable holds the number of MAC operations performed */\n    count = srcBLen - 1U;\n\n    /* Working pointer of inputA */\n    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* -------------------\n     * Stage3 process\n     * ------------------*/\n\n    while (blockSize3 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = count >> 2U;\n\n      while (k > 0U) {\n        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */\n        sum += *px++ * *py--;\n\n        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */\n        sum += *px++ * *py--;\n\n        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */\n        sum += *px++ * *py--;\n\n        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */\n        sum += *px++ * *py--;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = count % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n        sum += *px++ * *py--;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = sum;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = ++pSrc1;\n      py = pSrc2;\n\n      /* Decrement MAC count */\n      count--;\n\n      /* Decrement the loop counter */\n      blockSize3--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const float32_t *pIn1 = pSrcA; /* InputA pointer */\n  const float32_t *pIn2 = pSrcB; /* InputB pointer */\n  float32_t sum;                 /* Accumulator */\n  uint32_t i, j;                 /* Loop counters */\n  arm_status status;             /* Status of Partial convolution */\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* Loop to calculate convolution for output length number of values */\n    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) {\n      /* Initialize sum with zero to carry on MAC operations */\n      sum = 0.0f;\n\n      /* Loop to perform MAC operations according to convolution equation */\n      for (j = 0U; j <= i; j++) {\n        /* Check the array limitations */\n        if (((i - j) < srcBLen) && (j < srcALen)) {\n          /* z[i] += x[i-j] * y[j] */\n          sum += (pIn1[j] * pIn2[i - j]);\n        }\n      }\n\n      /* Store the output in the destination buffer */\n      pDst[i] = sum;\n    }\n\n    /* Set status as ARM_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_fast_opt_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_fast_opt_q15.c\n * Description:  Fast Q15 Partial convolution\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of Q15 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written\n  @param[in]     firstIndex is the first output sample to start with\n  @param[in]     numPoints  is the number of output points to be computed\n  @param[in]     pScratch1  points to scratch buffer of size max(srcALen,\n  srcBLen) + 2*min(srcALen, srcBLen) - 2\n  @param[in]     pScratch2  points to scratch buffer of size min(srcALen,\n  srcBLen)\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n\n  @remark\n                   Refer to \\ref arm_conv_partial_q15() for a slower\n  implementation of this function which uses a 64-bit accumulator to avoid wrap\n  around distortion.\n */\n\narm_status arm_conv_partial_fast_opt_q15(const q15_t *pSrcA, uint32_t srcALen,\n                                         const q15_t *pSrcB, uint32_t srcBLen,\n                                         q15_t *pDst, uint32_t firstIndex,\n                                         uint32_t numPoints, q15_t *pScratch1,\n                                         q15_t *pScratch2) {\n  q15_t *pOut = pDst;       /* Output pointer */\n  q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */\n  q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */\n  q31_t acc0;               /* Accumulator */\n  const q15_t *pIn1;        /* InputA pointer */\n  const q15_t *pIn2;        /* InputB pointer */\n  const q15_t *px;          /* Intermediate inputA pointer */\n  q15_t *py;                /* Intermediate inputB pointer */\n  uint32_t j, k, blkCnt;    /* Loop counter */\n  uint32_t tapCnt;          /* Loop count */\n  arm_status status;        /* Status variable */\n  q31_t x1; /* Temporary variables to hold state and coefficient values */\n  q31_t y1; /* State variables */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc1, acc2, acc3; /* Accumulator */\n  q31_t x2, x3; /* Temporary variables to hold state and coefficient values */\n  q31_t y2;     /* State variables */\n#endif\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* Temporary pointer for scratch2 */\n    py = pScratch2;\n\n    /* pointer to take end of scratch2 buffer */\n    pScr2 = pScratch2 + srcBLen - 1;\n\n    /* points to smaller length sequence */\n    px = pIn2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = srcBLen >> 2U;\n\n    /* Copy smaller length input sequence in reverse order into second scratch\n     * buffer */\n    while (k > 0U) {\n      /* copy second buffer in reversal manner */\n      *pScr2-- = *px++;\n      *pScr2-- = *px++;\n      *pScr2-- = *px++;\n      *pScr2-- = *px++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = srcBLen % 0x4U;\n\n#else\n\n    /* Initialize k with number of samples */\n    k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* copy second buffer in reversal manner for remaining samples */\n      *pScr2-- = *px++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Initialze temporary scratch pointer */\n    pScr1 = pScratch1;\n\n    /* Assuming scratch1 buffer is aligned by 32-bit */\n    /* Fill (srcBLen - 1U) zeros in scratch buffer */\n    arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n    /* Update temporary scratch pointer */\n    pScr1 += (srcBLen - 1U);\n\n    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */\n\n    /* Copy (srcALen) samples in scratch buffer */\n    arm_copy_q15(pIn1, pScr1, srcALen);\n\n    /* Update pointers */\n    pScr1 += srcALen;\n\n    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n    arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n    /* Update pointer */\n    pScr1 += (srcBLen - 1U);\n\n    /* Initialization of pIn2 pointer */\n    pIn2 = py;\n\n    pScratch1 += firstIndex;\n\n    pOut = pDst + firstIndex;\n\n    /* Actual convolution process starts here */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = (numPoints) >> 2;\n\n    while (blkCnt > 0) {\n      /* Initialze temporary scratch pointer as scratch1 */\n      pScr1 = pScratch1;\n\n      /* Clear Accumlators */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* Read two samples from scratch1 buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* Read next two samples from scratch1 buffer */\n      x2 = read_q15x2_ia(&pScr1);\n\n      tapCnt = (srcBLen) >> 2U;\n\n      while (tapCnt > 0U) {\n\n        /* Read four samples from smaller buffer */\n        y1 = read_q15x2_ia((q15_t **)&pIn2);\n        y2 = read_q15x2_ia((q15_t **)&pIn2);\n\n        /* multiply and accumlate */\n        acc0 = __SMLAD(x1, y1, acc0);\n        acc2 = __SMLAD(x2, y1, acc2);\n\n        /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x2, x1, 0);\n#else\n        x3 = __PKHBT(x1, x2, 0);\n#endif\n\n        /* multiply and accumlate */\n        acc1 = __SMLADX(x3, y1, acc1);\n\n        /* Read next two samples from scratch1 buffer */\n        x1 = read_q15x2_ia(&pScr1);\n\n        /* multiply and accumlate */\n        acc0 = __SMLAD(x2, y2, acc0);\n        acc2 = __SMLAD(x1, y2, acc2);\n\n        /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x1, x2, 0);\n#else\n        x3 = __PKHBT(x2, x1, 0);\n#endif\n\n        acc3 = __SMLADX(x3, y1, acc3);\n        acc1 = __SMLADX(x3, y2, acc1);\n\n        x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x2, x1, 0);\n#else\n        x3 = __PKHBT(x1, x2, 0);\n#endif\n\n        /* multiply and accumlate */\n        acc3 = __SMLADX(x3, y2, acc3);\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* Update scratch pointer for remaining samples of smaller length sequence\n       */\n      pScr1 -= 4U;\n\n      /* apply same above for remaining samples of smaller length sequence */\n      tapCnt = (srcBLen)&3U;\n\n      while (tapCnt > 0U) {\n        /* accumlate the results */\n        acc0 += (*pScr1++ * *pIn2);\n        acc1 += (*pScr1++ * *pIn2);\n        acc2 += (*pScr1++ * *pIn2);\n        acc3 += (*pScr1++ * *pIn2++);\n\n        pScr1 -= 3U;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      blkCnt--;\n\n      /* Store the results in the accumulators in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc0 >> 15), 16),\n                                    __SSAT((acc1 >> 15), 16), 16));\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc2 >> 15), 16),\n                                    __SSAT((acc3 >> 15), 16), 16));\n#else\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc1 >> 15), 16),\n                                    __SSAT((acc0 >> 15), 16), 16));\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc3 >> 15), 16),\n                                    __SSAT((acc2 >> 15), 16), 16));\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* Initialization of inputB pointer */\n      pIn2 = py;\n\n      pScratch1 += 4U;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numPoints & 0x3;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numPoints;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    /* Calculate convolution for remaining samples of Bigger length sequence */\n    while (blkCnt > 0) {\n      /* Initialze temporary scratch pointer as scratch1 */\n      pScr1 = pScratch1;\n\n      /* Clear Accumlators */\n      acc0 = 0;\n\n      tapCnt = (srcBLen) >> 1U;\n\n      while (tapCnt > 0U) {\n        /* Read next two samples from scratch1 buffer */\n        x1 = read_q15x2_ia(&pScr1);\n\n        /* Read two samples from smaller buffer */\n        y1 = read_q15x2_ia((q15_t **)&pIn2);\n\n        /* multiply and accumlate */\n        acc0 = __SMLAD(x1, y1, acc0);\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      tapCnt = (srcBLen)&1U;\n\n      /* apply same above for remaining samples of smaller length sequence */\n      while (tapCnt > 0U) {\n        /* accumlate the results */\n        acc0 += (*pScr1++ * *pIn2++);\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      blkCnt--;\n\n      /* The result is in 2.30 format.  Convert to 1.15 with saturation.\n       ** Then store the output in the destination buffer. */\n      *pOut++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n\n      /* Initialization of inputB pointer */\n      pIn2 = py;\n\n      pScratch1 += 1U;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_fast_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_fast_q15.c\n * Description:  Fast Q15 Partial convolution\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of Q15 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written\n  @param[in]     firstIndex is the first output sample to start with\n  @param[in]     numPoints  is the number of output points to be computed\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n  @remark\n                   Refer to \\ref arm_conv_partial_q15() for a slower\n  implementation of this function which uses a 64-bit accumulator to avoid wrap\n  around distortion.\n */\n\narm_status arm_conv_partial_fast_q15(const q15_t *pSrcA, uint32_t srcALen,\n                                     const q15_t *pSrcB, uint32_t srcBLen,\n                                     q15_t *pDst, uint32_t firstIndex,\n                                     uint32_t numPoints) {\n  const q15_t *pIn1;                 /* InputA pointer */\n  const q15_t *pIn2;                 /* InputB pointer */\n  q15_t *pOut = pDst;                /* Output pointer */\n  q31_t sum, acc0, acc1, acc2, acc3; /* Accumulator */\n  const q15_t *px;                   /* Intermediate inputA pointer */\n  const q15_t *py;                   /* Intermediate inputB pointer */\n  const q15_t *pSrc1, *pSrc2;        /* Intermediate pointers */\n  q31_t x0, x1, x2, x3, c0;          /* Temporary input variables */\n  uint32_t j, k, count, blkCnt, check;\n  int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  arm_status status; /* Status of Partial convolution */\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* Conditions to check which loopCounter holds\n     * the first and last indices of the output samples to be calculated. */\n    check = firstIndex + numPoints;\n    blockSize3 = ((int32_t)check > (int32_t)srcALen)\n                     ? (int32_t)check - (int32_t)srcALen\n                     : 0;\n    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1)\n                     ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen\n                     : blockSize3;\n    blockSize1 = ((int32_t)srcBLen - 1) - (int32_t)firstIndex;\n    blockSize1 =\n        (blockSize1 > 0)\n            ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints)\n            : 0;\n    blockSize2 =\n        (int32_t)check - ((blockSize3 + blockSize1) + (int32_t)firstIndex);\n    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;\n\n    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n     * x[n-N+1] * y[N -1] */\n    /* The function is internally\n     * divided into three stages according to the number of multiplications that\n     * has to be taken place between inputA samples and inputB samples. In the\n     * first stage of the algorithm, the multiplications increase by one for\n     * every iteration. In the second stage of the algorithm, srcBLen number of\n     * multiplications are done. In the third stage of the algorithm, the\n     * multiplications decrease by one for every iteration. */\n\n    /* Set the output pointer to point to the firstIndex\n     * of the output sample to be calculated. */\n    pOut = pDst + firstIndex;\n\n    /* --------------------------\n     * Initializations of stage1\n     * -------------------------*/\n\n    /* sum = x[0] * y[0]\n     * sum = x[0] * y[1] + x[1] * y[0]\n     * ....\n     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1]\n     * * y[0]\n     */\n\n    /* In this stage the MAC operations are increased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed.\n       Since the partial convolution starts from firstIndex\n       Number of Macs to be performed is firstIndex + 1 */\n    count = 1U + firstIndex;\n\n    /* Working pointer of inputA */\n    px = pIn1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + firstIndex;\n    py = pSrc2;\n\n    /* ------------------------\n     * Stage1 process\n     * ----------------------*/\n\n    /* For loop unrolling by 4, this stage is divided into two. */\n    /* First part of this stage computes the MAC operations less than 4 */\n    /* Second part of this stage computes the MAC operations greater than or\n     * equal to 4 */\n\n    /* The first part of the stage starts here */\n    while ((count < 4U) && (blockSize1 > 0)) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Loop over number of MAC operations between\n       * inputA samples and inputB samples */\n      k = count;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum = __SMLAD(*px++, *py--, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(sum >> 15);\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      py = ++pSrc2;\n      px = pIn1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Decrement loop counter */\n      blockSize1--;\n    }\n\n    /* The second part of the stage starts here */\n    /* The internal loop, over count, is unrolled by 4 */\n    /* To, read the last two inputB samples using SIMD:\n     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */\n    py = py - 1;\n\n    while (blockSize1 > 0) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = count >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n         time. a second loop below computes MACs for the remaining 1 to 3\n         samples. */\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2]\n         * respectively */\n        sum = __SMLADX(read_q15x2_ia((q15_t **)&px),\n                       read_q15x2_da((q15_t **)&py), sum);\n        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4]\n         * respectively */\n        sum = __SMLADX(read_q15x2_ia((q15_t **)&px),\n                       read_q15x2_da((q15_t **)&py), sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* For the next MAC operations, the pointer py is used without SIMD\n         So, py is incremented by 1 */\n      py = py + 1U;\n\n      /* If the count is not a multiple of 4, compute any remaining MACs here.\n         No loop unrolling is used. */\n      k = count % 0x4U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum = __SMLAD(*px++, *py--, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(sum >> 15);\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      py = ++pSrc2 - 1U;\n      px = pIn1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Decrement loop counter */\n      blockSize1--;\n    }\n\n    /* --------------------------\n     * Initializations of stage2\n     * ------------------------*/\n\n    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n     * ....\n     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2]\n     * +...+ x[srcALen-1] * y[0]\n     */\n\n    /* Working pointer of inputA */\n    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) {\n      pSrc1 = pIn1 + firstIndex - srcBLen + 1;\n    } else {\n      pSrc1 = pIn1;\n    }\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* count is the index by which the pointer pIn1 to be incremented */\n    count = 0U;\n\n    /* -------------------\n     * Stage2 process\n     * ------------------*/\n\n    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n     * performed. So, to loop unroll over blockSize2,\n     * srcBLen should be greater than or equal to 4 */\n    if (srcBLen >= 4U) {\n      /* Loop unrolling: Compute 4 outputs at a time */\n      blkCnt = ((uint32_t)blockSize2 >> 2U);\n\n      while (blkCnt > 0U) {\n        py = py - 1U;\n\n        /* Set all accumulators to zero */\n        acc0 = 0;\n        acc1 = 0;\n        acc2 = 0;\n        acc3 = 0;\n\n        /* read x[0], x[1] samples */\n        x0 = read_q15x2((q15_t *)px);\n        /* read x[1], x[2] samples */\n        x1 = read_q15x2((q15_t *)px + 1);\n        px += 2U;\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        k = srcBLen >> 2U;\n\n        /* First part of the processing with loop unrolling.  Compute 4 MACs at\n         *a time.\n         ** a second loop below computes MACs for the remaining 1 to 3 samples.\n         */\n        do {\n          /* Read the last two inputB samples using SIMD:\n           * y[srcBLen - 1] and y[srcBLen - 2] */\n          c0 = read_q15x2_da((q15_t **)&py);\n\n          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */\n          acc0 = __SMLADX(x0, c0, acc0);\n\n          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */\n          acc1 = __SMLADX(x1, c0, acc1);\n\n          /* Read x[2], x[3] */\n          x2 = read_q15x2((q15_t *)px);\n\n          /* Read x[3], x[4] */\n          x3 = read_q15x2((q15_t *)px + 1);\n\n          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */\n          acc2 = __SMLADX(x2, c0, acc2);\n\n          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */\n          acc3 = __SMLADX(x3, c0, acc3);\n\n          /* Read y[srcBLen - 3] and y[srcBLen - 4] */\n          c0 = read_q15x2_da((q15_t **)&py);\n\n          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */\n          acc0 = __SMLADX(x2, c0, acc0);\n\n          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */\n          acc1 = __SMLADX(x3, c0, acc1);\n\n          /* Read x[4], x[5] */\n          x0 = read_q15x2((q15_t *)px + 2);\n\n          /* Read x[5], x[6] */\n          x1 = read_q15x2((q15_t *)px + 3);\n          px += 4U;\n\n          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */\n          acc2 = __SMLADX(x0, c0, acc2);\n\n          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */\n          acc3 = __SMLADX(x1, c0, acc3);\n\n        } while (--k);\n\n        /* For the next MAC operations, SIMD is not used\n           So, the 16 bit pointer if inputB, py is updated */\n\n        /* If the srcBLen is not a multiple of 4, compute any remaining MACs\n           here. No loop unrolling is used. */\n        k = srcBLen % 0x4U;\n\n        if (k == 1U) {\n          /* Read y[srcBLen - 5] */\n          c0 = *(py + 1);\n#ifdef ARM_MATH_BIG_ENDIAN\n          c0 = c0 << 16U;\n#else\n          c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n          /* Read x[7] */\n          x3 = read_q15x2((q15_t *)px);\n          px++;\n\n          /* Perform the multiply-accumulate */\n          acc0 = __SMLAD(x0, c0, acc0);\n          acc1 = __SMLAD(x1, c0, acc1);\n          acc2 = __SMLADX(x1, c0, acc2);\n          acc3 = __SMLADX(x3, c0, acc3);\n        }\n\n        if (k == 2U) {\n          /* Read y[srcBLen - 5], y[srcBLen - 6] */\n          c0 = read_q15x2((q15_t *)py);\n\n          /* Read x[7], x[8] */\n          x3 = read_q15x2((q15_t *)px);\n\n          /* Read x[9] */\n          x2 = read_q15x2((q15_t *)px + 1);\n          px += 2U;\n\n          /* Perform the multiply-accumulate */\n          acc0 = __SMLADX(x0, c0, acc0);\n          acc1 = __SMLADX(x1, c0, acc1);\n          acc2 = __SMLADX(x3, c0, acc2);\n          acc3 = __SMLADX(x2, c0, acc3);\n        }\n\n        if (k == 3U) {\n          /* Read y[srcBLen - 5], y[srcBLen - 6] */\n          c0 = read_q15x2((q15_t *)py);\n\n          /* Read x[7], x[8] */\n          x3 = read_q15x2((q15_t *)px);\n\n          /* Read x[9] */\n          x2 = read_q15x2((q15_t *)px + 1);\n\n          /* Perform the multiply-accumulate */\n          acc0 = __SMLADX(x0, c0, acc0);\n          acc1 = __SMLADX(x1, c0, acc1);\n          acc2 = __SMLADX(x3, c0, acc2);\n          acc3 = __SMLADX(x2, c0, acc3);\n\n          c0 = *(py - 1);\n#ifdef ARM_MATH_BIG_ENDIAN\n          c0 = c0 << 16U;\n#else\n          c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n          /* Read x[10] */\n          x3 = read_q15x2((q15_t *)px + 2);\n          px += 3U;\n\n          /* Perform the multiply-accumulates */\n          acc0 = __SMLADX(x1, c0, acc0);\n          acc1 = __SMLAD(x2, c0, acc1);\n          acc2 = __SMLADX(x2, c0, acc2);\n          acc3 = __SMLADX(x3, c0, acc3);\n        }\n\n        /* Store the results in the accumulators in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n        write_q15x2_ia(&pOut, __PKHBT(acc0 >> 15, acc1 >> 15, 16));\n        write_q15x2_ia(&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16));\n#else\n        write_q15x2_ia(&pOut, __PKHBT(acc1 >> 15, acc0 >> 15, 16));\n        write_q15x2_ia(&pOut, __PKHBT(acc3 >> 15, acc2 >> 15, 16));\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n        /* Increment the pointer pIn1 index, count by 4 */\n        count += 4U;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement the loop counter */\n        blkCnt--;\n      }\n\n      /* If the blockSize2 is not a multiple of 4, compute any remaining output\n         samples here. No loop unrolling is used. */\n      blkCnt = (uint32_t)blockSize2 % 0x4U;\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        k = srcBLen >> 2U;\n\n        /* First part of the processing with loop unrolling.  Compute 4 MACs at\n           a time. a second loop below computes MACs for the remaining 1 to 3\n           samples. */\n        while (k > 0U) {\n          /* Perform the multiply-accumulates */\n          sum += ((q31_t)*px++ * *py--);\n          sum += ((q31_t)*px++ * *py--);\n          sum += ((q31_t)*px++ * *py--);\n          sum += ((q31_t)*px++ * *py--);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* If the srcBLen is not a multiple of 4, compute any remaining MACs\n         *here.\n         ** No loop unrolling is used. */\n        k = srcBLen % 0x4U;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulates */\n          sum += ((q31_t)*px++ * *py--);\n\n          /* Decrement the loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q15_t)(sum >> 15);\n\n        /* Increment the pointer pIn1 index, count by 1 */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n    } else {\n      /* If the srcBLen is not a multiple of 4,\n       * the blockSize2 loop cannot be unrolled by 4 */\n      blkCnt = (uint32_t)blockSize2;\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n        /* srcBLen number of MACS should be performed */\n        k = srcBLen;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += ((q31_t)*px++ * *py--);\n\n          /* Decrement the loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q15_t)(sum >> 15);\n\n        /* Increment the MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement the loop counter */\n        blkCnt--;\n      }\n    }\n\n    /* --------------------------\n     * Initializations of stage3\n     * -------------------------*/\n\n    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n     * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n     * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n     * y[2]\n     * ....\n     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n     * sum +=  x[srcALen-1] * y[srcBLen-1]\n     */\n\n    /* In this stage the MAC operations are decreased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed */\n    count = srcBLen - 1U;\n\n    /* Working pointer of inputA */\n    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    pIn2 = pSrc2 - 1U;\n    py = pIn2;\n\n    /* -------------------\n     * Stage3 process\n     * ------------------*/\n\n    /* For loop unrolling by 4, this stage is divided into two. */\n    /* First part of this stage computes the MAC operations greater than 4 */\n    /* Second part of this stage computes the MAC operations less than or equal\n     * to 4 */\n\n    /* The first part of the stage starts here */\n    j = count >> 2U;\n\n    while ((j > 0U) && (blockSize3 > 0)) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = count >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      while (k > 0U) {\n        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied\n         * with y[srcBLen - 1], y[srcBLen - 2] respectively */\n        sum = __SMLADX(read_q15x2_ia((q15_t **)&px),\n                       read_q15x2_da((q15_t **)&py), sum);\n        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied\n         * with y[srcBLen - 3], y[srcBLen - 4] respectively */\n        sum = __SMLADX(read_q15x2_ia((q15_t **)&px),\n                       read_q15x2_da((q15_t **)&py), sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* For the next MAC operations, the pointer py is used without SIMD\n         So, py is incremented by 1 */\n      py = py + 1U;\n\n      /* If the count is not a multiple of 4, compute any remaining MACs here.\n         No loop unrolling is used. */\n      k = count % 0x4U;\n\n      while (k > 0U) {\n        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */\n        sum = __SMLAD(*px++, *py--, sum);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(sum >> 15);\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = ++pSrc1;\n      py = pIn2;\n\n      /* Decrement the MAC count */\n      count--;\n\n      /* Decrement the loop counter */\n      blockSize3--;\n\n      j--;\n    }\n\n    /* The second part of the stage starts here */\n    /* SIMD is not used for the next MAC operations,\n     * so pointer py is updated to read only one sample at a time */\n    py = py + 1U;\n\n    while (blockSize3 > 0) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = count;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n        sum = __SMLAD(*px++, *py--, sum);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(sum >> 15);\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = ++pSrc1;\n      py = pSrc2;\n\n      /* Decrement the MAC count */\n      count--;\n\n      /* Decrement the loop counter */\n      blockSize3--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_fast_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_fast_q31.c\n * Description:  Fast Q31 Partial convolution\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of Q31 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written\n  @param[in]     firstIndex is the first output sample to start with\n  @param[in]     numPoints  is the number of output points to be computed\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n\n  @remark\n                   Refer to \\ref arm_conv_partial_q31() for a slower\n  implementation of this function which uses a 64-bit accumulator to provide\n  higher precision.\n */\n\narm_status arm_conv_partial_fast_q31(const q31_t *pSrcA, uint32_t srcALen,\n                                     const q31_t *pSrcB, uint32_t srcBLen,\n                                     q31_t *pDst, uint32_t firstIndex,\n                                     uint32_t numPoints) {\n  const q31_t *pIn1;          /* InputA pointer */\n  const q31_t *pIn2;          /* InputB pointer */\n  q31_t *pOut = pDst;         /* Output pointer */\n  const q31_t *px;            /* Intermediate inputA pointer */\n  const q31_t *py;            /* Intermediate inputB pointer */\n  const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */\n  q31_t sum;                  /* Accumulators */\n  uint32_t j, k, count, check, blkCnt;\n  int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  arm_status status; /* Status of Partial convolution */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc0, acc1, acc2, acc3; /* Accumulators */\n  q31_t x0, x1, x2, x3, c0;\n#endif\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* Conditions to check which loopCounter holds\n     * the first and last indices of the output samples to be calculated. */\n    check = firstIndex + numPoints;\n    blockSize3 = ((int32_t)check > (int32_t)srcALen)\n                     ? (int32_t)check - (int32_t)srcALen\n                     : 0;\n    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1)\n                     ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen\n                     : blockSize3;\n    blockSize1 = ((int32_t)srcBLen - 1) - (int32_t)firstIndex;\n    blockSize1 =\n        (blockSize1 > 0)\n            ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints)\n            : 0;\n    blockSize2 =\n        (int32_t)check - ((blockSize3 + blockSize1) + (int32_t)firstIndex);\n    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;\n\n    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n     * x[n-N+1] * y[N -1] */\n    /* The function is internally\n     * divided into three stages according to the number of multiplications that\n     * has to be taken place between inputA samples and inputB samples. In the\n     * first stage of the algorithm, the multiplications increase by one for\n     * every iteration. In the second stage of the algorithm, srcBLen number of\n     * multiplications are done. In the third stage of the algorithm, the\n     * multiplications decrease by one for every iteration. */\n\n    /* Set the output pointer to point to the firstIndex\n     * of the output sample to be calculated. */\n    pOut = pDst + firstIndex;\n\n    /* --------------------------\n     * Initializations of stage1\n     * -------------------------*/\n\n    /* sum = x[0] * y[0]\n     * sum = x[0] * y[1] + x[1] * y[0]\n     * ....\n     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1]\n     * * y[0]\n     */\n\n    /* In this stage the MAC operations are increased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed.\n       Since the partial convolution starts from firstIndex\n       Number of Macs to be performed is firstIndex + 1 */\n    count = 1U + firstIndex;\n\n    /* Working pointer of inputA */\n    px = pIn1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + firstIndex;\n    py = pSrc2;\n\n    /* ------------------------\n     * Stage1 process\n     * ----------------------*/\n\n    /* The first stage starts here */\n    while (blockSize1 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = count >> 2U;\n\n      while (k > 0U) {\n        /* x[0] * y[srcBLen - 1] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* x[1] * y[srcBLen - 2] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* x[2] * y[srcBLen - 3] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* x[3] * y[srcBLen - 4] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = count % 0x4U;\n\n#else\n\n      /* Initialize k with number of samples */\n      k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = sum << 1;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      py = ++pSrc2;\n      px = pIn1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Decrement loop counter */\n      blockSize1--;\n    }\n\n    /* --------------------------\n     * Initializations of stage2\n     * ------------------------*/\n\n    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n     * ....\n     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2]\n     * +...+ x[srcALen-1] * y[0]\n     */\n\n    /* Working pointer of inputA */\n    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) {\n      pSrc1 = pIn1 + firstIndex - srcBLen + 1;\n    } else {\n      pSrc1 = pIn1;\n    }\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* count is index by which the pointer pIn1 to be incremented */\n    count = 0U;\n\n    /* -------------------\n     * Stage2 process\n     * ------------------*/\n\n    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n     * performed. So, to loop unroll over blockSize2,\n     * srcBLen should be greater than or equal to 4 */\n    if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      blkCnt = ((uint32_t)blockSize2 >> 2U);\n\n      while (blkCnt > 0U) {\n        /* Set all accumulators to zero */\n        acc0 = 0;\n        acc1 = 0;\n        acc2 = 0;\n        acc3 = 0;\n\n        /* read x[0], x[1], x[2] samples */\n        x0 = *px++;\n        x1 = *px++;\n        x2 = *px++;\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        k = srcBLen >> 2U;\n\n        /* First part of the processing with loop unrolling.  Compute 4 MACs at\n         *a time.\n         ** a second loop below computes MACs for the remaining 1 to 3 samples.\n         */\n        do {\n          /* Read y[srcBLen - 1] sample */\n          c0 = *py--;\n          /* Read x[3] sample */\n          x3 = *px++;\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[0] * y[srcBLen - 1] */\n          acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n          /* acc1 +=  x[1] * y[srcBLen - 1] */\n          acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n          /* acc2 +=  x[2] * y[srcBLen - 1] */\n          acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n          /* acc3 +=  x[3] * y[srcBLen - 1] */\n          acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n          /* Read y[srcBLen - 2] sample */\n          c0 = *py--;\n          /* Read x[4] sample */\n          x0 = *px++;\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[1] * y[srcBLen - 2] */\n          acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x1 * c0)) >> 32);\n          /* acc1 +=  x[2] * y[srcBLen - 2] */\n          acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x2 * c0)) >> 32);\n          /* acc2 +=  x[3] * y[srcBLen - 2] */\n          acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x3 * c0)) >> 32);\n          /* acc3 +=  x[4] * y[srcBLen - 2] */\n          acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x0 * c0)) >> 32);\n\n          /* Read y[srcBLen - 3] sample */\n          c0 = *py--;\n          /* Read x[5] sample */\n          x1 = *px++;\n\n          /* Perform the multiply-accumulates */\n          /* acc0 +=  x[2] * y[srcBLen - 3] */\n          acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x2 * c0)) >> 32);\n          /* acc1 +=  x[3] * y[srcBLen - 2] */\n          acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x3 * c0)) >> 32);\n          /* acc2 +=  x[4] * y[srcBLen - 2] */\n          acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x0 * c0)) >> 32);\n          /* acc3 +=  x[5] * y[srcBLen - 2] */\n          acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x1 * c0)) >> 32);\n\n          /* Read y[srcBLen - 4] sample */\n          c0 = *py--;\n          /* Read x[6] sample */\n          x2 = *px++;\n\n          /* Perform the multiply-accumulates */\n          /* acc0 +=  x[3] * y[srcBLen - 4] */\n          acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x3 * c0)) >> 32);\n          /* acc1 +=  x[4] * y[srcBLen - 4] */\n          acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x0 * c0)) >> 32);\n          /* acc2 +=  x[5] * y[srcBLen - 4] */\n          acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x1 * c0)) >> 32);\n          /* acc3 +=  x[6] * y[srcBLen - 4] */\n          acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x2 * c0)) >> 32);\n\n        } while (--k);\n\n        /* If the srcBLen is not a multiple of 4, compute any remaining MACs\n         *here.\n         ** No loop unrolling is used. */\n        k = srcBLen % 0x4U;\n\n        while (k > 0U) {\n          /* Read y[srcBLen - 5] sample */\n          c0 = *py--;\n          /* Read x[7] sample */\n          x3 = *px++;\n\n          /* Perform the multiply-accumulates */\n          /* acc0 +=  x[4] * y[srcBLen - 5] */\n          acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n          /* acc1 +=  x[5] * y[srcBLen - 5] */\n          acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n          /* acc2 +=  x[6] * y[srcBLen - 5] */\n          acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n          /* acc3 +=  x[7] * y[srcBLen - 5] */\n          acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n          /* Reuse the present samples for the next MAC */\n          x0 = x1;\n          x1 = x2;\n          x2 = x3;\n\n          /* Decrement the loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q31_t)(acc0 << 1);\n        *pOut++ = (q31_t)(acc1 << 1);\n        *pOut++ = (q31_t)(acc2 << 1);\n        *pOut++ = (q31_t)(acc3 << 1);\n\n        /* Increment the pointer pIn1 index, count by 4 */\n        count += 4U;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      blkCnt = (uint32_t)blockSize2 % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Loop unrolling: Compute 4 outputs at a time */\n        k = srcBLen >> 2U;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulates */\n          sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n          sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n          sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n          sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Loop unrolling: Compute remaining outputs */\n        k = srcBLen % 0x4U;\n\n#else\n\n        /* Initialize blkCnt with number of samples */\n        k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = sum << 1;\n\n        /* Increment MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n    } else {\n      /* If the srcBLen is not a multiple of 4,\n       * the blockSize2 loop cannot be unrolled by 4 */\n      blkCnt = (uint32_t)blockSize2;\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n        /* srcBLen number of MACS should be performed */\n        k = srcBLen;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = sum << 1;\n\n        /* Increment the MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement the loop counter */\n        blkCnt--;\n      }\n    }\n\n    /* --------------------------\n     * Initializations of stage3\n     * -------------------------*/\n\n    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n     * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n     * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n     * y[2]\n     * ....\n     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n     * sum +=  x[srcALen-1] * y[srcBLen-1]\n     */\n\n    /* In this stage the MAC operations are decreased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed */\n    count = srcBLen - 1U;\n\n    /* Working pointer of inputA */\n    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* -------------------\n     * Stage3 process\n     * ------------------*/\n\n    while (blockSize3 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = count >> 2U;\n\n      while (k > 0U) {\n        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = count % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py--))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = sum << 1;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = ++pSrc1;\n      py = pSrc2;\n\n      /* Decrement MAC count */\n      count--;\n\n      /* Decrement the loop counter */\n      blockSize3--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_opt_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_opt_q15.c\n * Description:  Partial convolution of Q15 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of Q15 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written\n  @param[in]     firstIndex is the first output sample to start with\n  @param[in]     numPoints  is the number of output points to be computed\n  @param[in]     pScratch1  points to scratch buffer of size max(srcALen,\n  srcBLen) + 2*min(srcALen, srcBLen) - 2.\n  @param[in]     pScratch2  points to scratch buffer of size min(srcALen,\n  srcBLen).\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n\n  @remark\n                   Refer to \\ref arm_conv_partial_fast_q15() for a faster but\n  less precise version of this function.\n */\n\narm_status arm_conv_partial_opt_q15(const q15_t *pSrcA, uint32_t srcALen,\n                                    const q15_t *pSrcB, uint32_t srcBLen,\n                                    q15_t *pDst, uint32_t firstIndex,\n                                    uint32_t numPoints, q15_t *pScratch1,\n                                    q15_t *pScratch2) {\n\n  q15_t *pOut = pDst;       /* Output pointer */\n  q15_t *pScr1 = pScratch1; /* Temporary pointer for scratch1 */\n  q15_t *pScr2 = pScratch2; /* Temporary pointer for scratch1 */\n  q63_t acc0;               /* Accumulator */\n  q31_t x1; /* Temporary variables to hold state and coefficient values */\n  q31_t y1; /* State variables */\n  const q15_t *pIn1;     /* InputA pointer */\n  const q15_t *pIn2;     /* InputB pointer */\n  const q15_t *px;       /* Intermediate inputA pointer */\n  q15_t *py;             /* Intermediate inputB pointer */\n  uint32_t j, k, blkCnt; /* Loop counter */\n  uint32_t tapCnt;       /* Loop count */\n  arm_status status;     /* Status variable */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc1, acc2, acc3; /* Accumulator */\n  q31_t x2, x3; /* Temporary variables to hold state and coefficient values */\n  q31_t y2;     /* State variables */\n#endif\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* Temporary pointer for scratch2 */\n    py = pScratch2;\n\n    /* pointer to take end of scratch2 buffer */\n    pScr2 = pScratch2 + srcBLen - 1;\n\n    /* points to smaller length sequence */\n    px = pIn2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = srcBLen >> 2U;\n\n    /* Copy smaller length input sequence in reverse order into second scratch\n     * buffer */\n    while (k > 0U) {\n      /* copy second buffer in reversal manner */\n      *pScr2-- = *px++;\n      *pScr2-- = *px++;\n      *pScr2-- = *px++;\n      *pScr2-- = *px++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = srcBLen % 0x4U;\n\n#else\n\n    /* Initialize k with number of samples */\n    k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* copy second buffer in reversal manner for remaining samples */\n      *pScr2-- = *px++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Initialze temporary scratch pointer */\n    pScr1 = pScratch1;\n\n    /* Assuming scratch1 buffer is aligned by 32-bit */\n    /* Fill (srcBLen - 1U) zeros in scratch buffer */\n    arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n    /* Update temporary scratch pointer */\n    pScr1 += (srcBLen - 1U);\n\n    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */\n\n    /* Copy (srcALen) samples in scratch buffer */\n    arm_copy_q15(pIn1, pScr1, srcALen);\n\n    /* Update pointers */\n    pScr1 += srcALen;\n\n    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n    arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n    /* Update pointer */\n    pScr1 += (srcBLen - 1U);\n\n    /* Initialization of pIn2 pointer */\n    pIn2 = py;\n\n    pScratch1 += firstIndex;\n\n    pOut = pDst + firstIndex;\n\n    /* Actual convolution process starts here */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = (numPoints) >> 2;\n\n    while (blkCnt > 0) {\n      /* Initialze temporary scratch pointer as scratch1 */\n      pScr1 = pScratch1;\n\n      /* Clear Accumlators */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* Read two samples from scratch1 buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* Read next two samples from scratch1 buffer */\n      x2 = read_q15x2_ia(&pScr1);\n\n      tapCnt = (srcBLen) >> 2U;\n\n      while (tapCnt > 0U) {\n\n        /* Read four samples from smaller buffer */\n        y1 = read_q15x2_ia((q15_t **)&pIn2);\n        y2 = read_q15x2_ia((q15_t **)&pIn2);\n\n        /* multiply and accumlate */\n        acc0 = __SMLALD(x1, y1, acc0);\n        acc2 = __SMLALD(x2, y1, acc2);\n\n        /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x2, x1, 0);\n#else\n        x3 = __PKHBT(x1, x2, 0);\n#endif\n\n        /* multiply and accumlate */\n        acc1 = __SMLALDX(x3, y1, acc1);\n\n        /* Read next two samples from scratch1 buffer */\n        x1 = read_q15x2_ia(&pScr1);\n\n        /* multiply and accumlate */\n        acc0 = __SMLALD(x2, y2, acc0);\n        acc2 = __SMLALD(x1, y2, acc2);\n\n        /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x1, x2, 0);\n#else\n        x3 = __PKHBT(x2, x1, 0);\n#endif\n\n        acc3 = __SMLALDX(x3, y1, acc3);\n        acc1 = __SMLALDX(x3, y2, acc1);\n\n        x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x2, x1, 0);\n#else\n        x3 = __PKHBT(x1, x2, 0);\n#endif\n\n        acc3 = __SMLALDX(x3, y2, acc3);\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* Update scratch pointer for remaining samples of smaller length sequence\n       */\n      pScr1 -= 4U;\n\n      /* apply same above for remaining samples of smaller length sequence */\n      tapCnt = (srcBLen)&3U;\n\n      while (tapCnt > 0U) {\n        /* accumlate the results */\n        acc0 += (*pScr1++ * *pIn2);\n        acc1 += (*pScr1++ * *pIn2);\n        acc2 += (*pScr1++ * *pIn2);\n        acc3 += (*pScr1++ * *pIn2++);\n\n        pScr1 -= 3U;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      blkCnt--;\n\n      /* Store the results in the accumulators in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc0 >> 15), 16),\n                                    __SSAT((acc1 >> 15), 16), 16));\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc2 >> 15), 16),\n                                    __SSAT((acc3 >> 15), 16), 16));\n#else\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc1 >> 15), 16),\n                                    __SSAT((acc0 >> 15), 16), 16));\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc3 >> 15), 16),\n                                    __SSAT((acc2 >> 15), 16), 16));\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* Initialization of inputB pointer */\n      pIn2 = py;\n\n      pScratch1 += 4U;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numPoints & 0x3;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numPoints;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    /* Calculate convolution for remaining samples of Bigger length sequence */\n    while (blkCnt > 0) {\n      /* Initialze temporary scratch pointer as scratch1 */\n      pScr1 = pScratch1;\n\n      /* Clear Accumlators */\n      acc0 = 0;\n\n      tapCnt = (srcBLen) >> 1U;\n\n      while (tapCnt > 0U) {\n        /* Read next two samples from scratch1 buffer */\n        x1 = read_q15x2_ia(&pScr1);\n\n        /* Read two samples from smaller buffer */\n        y1 = read_q15x2_ia((q15_t **)&pIn2);\n\n        acc0 = __SMLALD(x1, y1, acc0);\n\n        /* Decrement the loop counter */\n        tapCnt--;\n      }\n\n      tapCnt = (srcBLen)&1U;\n\n      /* apply same above for remaining samples of smaller length sequence */\n      while (tapCnt > 0U) {\n        /* accumlate the results */\n        acc0 += (*pScr1++ * *pIn2++);\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      blkCnt--;\n\n      /* The result is in 2.30 format.  Convert to 1.15 with saturation.\n       ** Then store the output in the destination buffer. */\n      *pOut++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n\n      /* Initialization of inputB pointer */\n      pIn2 = py;\n\n      pScratch1 += 1U;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_opt_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_opt_q7.c\n * Description:  Partial convolution of Q7 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of Q7 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written\n  @param[in]     firstIndex is the first output sample to start with\n  @param[in]     numPoints  is the number of output points to be computed\n  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size\n  max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size\n  min(srcALen, srcBLen).\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n */\n\narm_status arm_conv_partial_opt_q7(const q7_t *pSrcA, uint32_t srcALen,\n                                   const q7_t *pSrcB, uint32_t srcBLen,\n                                   q7_t *pDst, uint32_t firstIndex,\n                                   uint32_t numPoints, q15_t *pScratch1,\n                                   q15_t *pScratch2) {\n  q15_t *pScr2, *pScr1;    /* Intermediate pointers for scratch pointers */\n  q15_t x4;                /* Temporary input variable */\n  const q7_t *pIn1, *pIn2; /* InputA and inputB pointer */\n  uint32_t j, k, blkCnt, tapCnt; /* Loop counter */\n  const q7_t *px;                /* Temporary input1 pointer */\n  q15_t *py;                     /* Temporary input2 pointer */\n  q31_t acc0, acc1, acc2, acc3;  /* Accumulator */\n  q31_t x1, x2, x3, y1;          /* Temporary input variables */\n  arm_status status;\n  q7_t *pOut = pDst;           /* Output pointer */\n  q7_t out0, out1, out2, out3; /* Temporary variables */\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* pointer to take end of scratch2 buffer */\n    pScr2 = pScratch2;\n\n    /* points to smaller length sequence */\n    px = pIn2 + srcBLen - 1;\n\n    /* Apply loop unrolling and do 4 Copies simultaneously. */\n    k = srcBLen >> 2U;\n\n    /* First part of the processing with loop unrolling copies 4 data points at\n     *a time.\n     ** a second loop below copies for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* copy second buffer in reversal manner */\n      x4 = (q15_t)*px--;\n      *pScr2++ = x4;\n      x4 = (q15_t)*px--;\n      *pScr2++ = x4;\n      x4 = (q15_t)*px--;\n      *pScr2++ = x4;\n      x4 = (q15_t)*px--;\n      *pScr2++ = x4;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, copy remaining samples here.\n     ** No loop unrolling is used. */\n    k = srcBLen % 0x4U;\n\n    while (k > 0U) {\n      /* copy second buffer in reversal manner for remaining samples */\n      x4 = (q15_t)*px--;\n      *pScr2++ = x4;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Initialze temporary scratch pointer */\n    pScr1 = pScratch1;\n\n    /* Fill (srcBLen - 1U) zeros in scratch buffer */\n    arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n    /* Update temporary scratch pointer */\n    pScr1 += (srcBLen - 1U);\n\n    /* Copy (srcALen) samples in scratch buffer */\n    /* Apply loop unrolling and do 4 Copies simultaneously. */\n    k = srcALen >> 2U;\n\n    /* First part of the processing with loop unrolling copies 4 data points at\n     *a time.\n     ** a second loop below copies for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* copy second buffer in reversal manner */\n      x4 = (q15_t)*pIn1++;\n      *pScr1++ = x4;\n      x4 = (q15_t)*pIn1++;\n      *pScr1++ = x4;\n      x4 = (q15_t)*pIn1++;\n      *pScr1++ = x4;\n      x4 = (q15_t)*pIn1++;\n      *pScr1++ = x4;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, copy remaining samples here.\n     ** No loop unrolling is used. */\n    k = srcALen % 0x4U;\n\n    while (k > 0U) {\n      /* copy second buffer in reversal manner for remaining samples */\n      x4 = (q15_t)*pIn1++;\n      *pScr1++ = x4;\n\n      /* Decrement the loop counter */\n      k--;\n    }\n\n    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n    arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n    /* Update pointer */\n    pScr1 += (srcBLen - 1U);\n\n    /* Temporary pointer for scratch2 */\n    py = pScratch2;\n\n    /* Initialization of pIn2 pointer */\n    pIn2 = (q7_t *)py;\n\n    pScr2 = py;\n\n    pOut = pDst + firstIndex;\n\n    pScratch1 += firstIndex;\n\n    /* Actual convolution process starts here */\n    blkCnt = (numPoints) >> 2;\n\n    while (blkCnt > 0) {\n      /* Initialize temporary scratch pointer as scratch1 */\n      pScr1 = pScratch1;\n\n      /* Clear Accumulators */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* Read two samples from scratch1 buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* Read next two samples from scratch1 buffer */\n      x2 = read_q15x2_ia(&pScr1);\n\n      tapCnt = (srcBLen) >> 2U;\n\n      while (tapCnt > 0U) {\n        /* Read four samples from smaller buffer */\n        y1 = read_q15x2_ia(&pScr2);\n\n        /* multiply and accumlate */\n        acc0 = __SMLAD(x1, y1, acc0);\n        acc2 = __SMLAD(x2, y1, acc2);\n\n        /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x2, x1, 0);\n#else\n        x3 = __PKHBT(x1, x2, 0);\n#endif\n\n        /* multiply and accumlate */\n        acc1 = __SMLADX(x3, y1, acc1);\n\n        /* Read next two samples from scratch1 buffer */\n        x1 = read_q15x2_ia(&pScr1);\n\n        /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x1, x2, 0);\n#else\n        x3 = __PKHBT(x2, x1, 0);\n#endif\n\n        acc3 = __SMLADX(x3, y1, acc3);\n\n        /* Read four samples from smaller buffer */\n        y1 = read_q15x2_ia(&pScr2);\n\n        acc0 = __SMLAD(x2, y1, acc0);\n\n        acc2 = __SMLAD(x1, y1, acc2);\n\n        acc1 = __SMLADX(x3, y1, acc1);\n\n        x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        x3 = __PKHBT(x2, x1, 0);\n#else\n        x3 = __PKHBT(x1, x2, 0);\n#endif\n\n        acc3 = __SMLADX(x3, y1, acc3);\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* Update scratch pointer for remaining samples of smaller length sequence\n       */\n      pScr1 -= 4U;\n\n      /* apply same above for remaining samples of smaller length sequence */\n      tapCnt = (srcBLen)&3U;\n\n      while (tapCnt > 0U) {\n        /* accumlate the results */\n        acc0 += (*pScr1++ * *pScr2);\n        acc1 += (*pScr1++ * *pScr2);\n        acc2 += (*pScr1++ * *pScr2);\n        acc3 += (*pScr1++ * *pScr2++);\n\n        pScr1 -= 3U;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      blkCnt--;\n\n      /* Store the result in the accumulator in the destination buffer. */\n      out0 = (q7_t)(__SSAT(acc0 >> 7U, 8));\n      out1 = (q7_t)(__SSAT(acc1 >> 7U, 8));\n      out2 = (q7_t)(__SSAT(acc2 >> 7U, 8));\n      out3 = (q7_t)(__SSAT(acc3 >> 7U, 8));\n\n      write_q7x4_ia(&pOut, __PACKq7(out0, out1, out2, out3));\n\n      /* Initialization of inputB pointer */\n      pScr2 = py;\n\n      pScratch1 += 4U;\n    }\n\n    blkCnt = (numPoints)&0x3;\n\n    /* Calculate convolution for remaining samples of Bigger length sequence */\n    while (blkCnt > 0) {\n      /* Initialze temporary scratch pointer as scratch1 */\n      pScr1 = pScratch1;\n\n      /* Clear Accumlators */\n      acc0 = 0;\n\n      tapCnt = (srcBLen) >> 1U;\n\n      while (tapCnt > 0U) {\n\n        /* Read next two samples from scratch1 buffer */\n        x1 = read_q15x2_ia(&pScr1);\n\n        /* Read two samples from smaller buffer */\n        y1 = read_q15x2_ia(&pScr2);\n\n        acc0 = __SMLAD(x1, y1, acc0);\n\n        /* Decrement the loop counter */\n        tapCnt--;\n      }\n\n      tapCnt = (srcBLen)&1U;\n\n      /* apply same above for remaining samples of smaller length sequence */\n      while (tapCnt > 0U) {\n\n        /* accumlate the results */\n        acc0 += (*pScr1++ * *pScr2++);\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      blkCnt--;\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q7_t)(__SSAT(acc0 >> 7U, 8));\n\n      /* Initialization of inputB pointer */\n      pScr2 = py;\n\n      pScratch1 += 1U;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_q15.c\n * Description:  Partial convolution of Q15 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of Q15 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written\n  @param[in]     firstIndex is the first output sample to start with\n  @param[in]     numPoints  is the number of output points to be computed\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n\n  @remark\n                   Refer to \\ref arm_conv_partial_fast_q15() for a faster but\n  less precise version of this function.\n  @remark\n                   Refer to \\ref arm_conv_partial_opt_q15() for a faster\n  implementation of this function using scratch buffers.\n */\n\narm_status arm_conv_partial_q15(const q15_t *pSrcA, uint32_t srcALen,\n                                const q15_t *pSrcB, uint32_t srcBLen,\n                                q15_t *pDst, uint32_t firstIndex,\n                                uint32_t numPoints) {\n\n#if defined(ARM_MATH_DSP)\n\n  const q15_t *pIn1;                 /* InputA pointer */\n  const q15_t *pIn2;                 /* InputB pointer */\n  q15_t *pOut = pDst;                /* Output pointer */\n  q63_t sum, acc0, acc1, acc2, acc3; /* Accumulator */\n  const q15_t *px;                   /* Intermediate inputA pointer */\n  const q15_t *py;                   /* Intermediate inputB pointer */\n  const q15_t *pSrc1, *pSrc2;        /* Intermediate pointers */\n  q31_t x0, x1, x2, x3,\n      c0; /* Temporary input variables to hold state and coefficient values */\n  int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt, check;\n  arm_status status; /* Status of Partial convolution */\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* Conditions to check which loopCounter holds\n     * the first and last indices of the output samples to be calculated. */\n    check = firstIndex + numPoints;\n    blockSize3 = ((int32_t)check > (int32_t)srcALen)\n                     ? (int32_t)check - (int32_t)srcALen\n                     : 0;\n    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1)\n                     ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen\n                     : blockSize3;\n    blockSize1 = ((int32_t)srcBLen - 1) - (int32_t)firstIndex;\n    blockSize1 =\n        (blockSize1 > 0)\n            ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints)\n            : 0;\n    blockSize2 =\n        (int32_t)check - ((blockSize3 + blockSize1) + (int32_t)firstIndex);\n    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;\n\n    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n     * x[n-N+1] * y[N -1] */\n    /* The function is internally\n     * divided into three stages according to the number of multiplications that\n     * has to be taken place between inputA samples and inputB samples. In the\n     * first stage of the algorithm, the multiplications increase by one for\n     * every iteration. In the second stage of the algorithm, srcBLen number of\n     * multiplications are done. In the third stage of the algorithm, the\n     * multiplications decrease by one for every iteration. */\n\n    /* Set the output pointer to point to the firstIndex\n     * of the output sample to be calculated. */\n    pOut = pDst + firstIndex;\n\n    /* --------------------------\n     * Initializations of stage1\n     * -------------------------*/\n\n    /* sum = x[0] * y[0]\n     * sum = x[0] * y[1] + x[1] * y[0]\n     * ....\n     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1]\n     * * y[0]\n     */\n\n    /* In this stage the MAC operations are increased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed.\n       Since the partial convolution starts from firstIndex\n       Number of Macs to be performed is firstIndex + 1 */\n    count = 1U + firstIndex;\n\n    /* Working pointer of inputA */\n    px = pIn1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + firstIndex;\n    py = pSrc2;\n\n    /* ------------------------\n     * Stage1 process\n     * ----------------------*/\n\n    /* For loop unrolling by 4, this stage is divided into two. */\n    /* First part of this stage computes the MAC operations less than 4 */\n    /* Second part of this stage computes the MAC operations greater than or\n     * equal to 4 */\n\n    /* The first part of the stage starts here */\n    while ((count < 4U) && (blockSize1 > 0U)) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Loop over number of MAC operations between\n       * inputA samples and inputB samples */\n      k = count;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum = __SMLALD(*px++, *py--, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(__SSAT((sum >> 15), 16));\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      py = ++pSrc2;\n      px = pIn1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Decrement loop counter */\n      blockSize1--;\n    }\n\n    /* The second part of the stage starts here */\n    /* The internal loop, over count, is unrolled by 4 */\n    /* To, read the last two inputB samples using SIMD:\n     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */\n    py = py - 1;\n\n    while (blockSize1 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = count >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n         time. a second loop below computes MACs for the remaining 1 to 3\n         samples. */\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2]\n         * respectively */\n        sum = __SMLALDX(read_q15x2_ia((q15_t **)&px),\n                        read_q15x2_da((q15_t **)&py), sum);\n        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4]\n         * respectively */\n        sum = __SMLALDX(read_q15x2_ia((q15_t **)&px),\n                        read_q15x2_da((q15_t **)&py), sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* For the next MAC operations, the pointer py is used without SIMD\n       * So, py is incremented by 1 */\n      py = py + 1U;\n\n      /* If the count is not a multiple of 4, compute any remaining MACs here.\n         No loop unrolling is used. */\n      k = count % 0x4U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum = __SMLALD(*px++, *py--, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(__SSAT((sum >> 15), 16));\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      py = ++pSrc2 - 1U;\n      px = pIn1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Decrement loop counter */\n      blockSize1--;\n    }\n\n    /* --------------------------\n     * Initializations of stage2\n     * ------------------------*/\n\n    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n     * ....\n     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2]\n     * +...+ x[srcALen-1] * y[0]\n     */\n\n    /* Working pointer of inputA */\n    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) {\n      pSrc1 = pIn1 + firstIndex - srcBLen + 1;\n    } else {\n      pSrc1 = pIn1;\n    }\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* count is the index by which the pointer pIn1 to be incremented */\n    count = 0U;\n\n    /* -------------------\n     * Stage2 process\n     * ------------------*/\n\n    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n     * performed. So, to loop unroll over blockSize2,\n     * srcBLen should be greater than or equal to 4 */\n    if (srcBLen >= 4U) {\n      /* Loop unrolling: Compute 4 outputs at a time */\n      blkCnt = ((uint32_t)blockSize2 >> 2U);\n\n      while (blkCnt > 0U) {\n        py = py - 1U;\n\n        /* Set all accumulators to zero */\n        acc0 = 0;\n        acc1 = 0;\n        acc2 = 0;\n        acc3 = 0;\n\n        /* read x[0], x[1] samples */\n        x0 = read_q15x2((q15_t *)px);\n        /* read x[1], x[2] samples */\n        x1 = read_q15x2((q15_t *)px + 1);\n        px += 2U;\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        k = srcBLen >> 2U;\n\n        /* First part of the processing with loop unrolling.  Compute 4 MACs at\n         *a time.\n         ** a second loop below computes MACs for the remaining 1 to 3 samples.\n         */\n        do {\n          /* Read the last two inputB samples using SIMD:\n           * y[srcBLen - 1] and y[srcBLen - 2] */\n          c0 = read_q15x2_da((q15_t **)&py);\n\n          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */\n          acc0 = __SMLALDX(x0, c0, acc0);\n\n          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */\n          acc1 = __SMLALDX(x1, c0, acc1);\n\n          /* Read x[2], x[3] */\n          x2 = read_q15x2((q15_t *)px);\n\n          /* Read x[3], x[4] */\n          x3 = read_q15x2((q15_t *)px + 1);\n\n          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */\n          acc2 = __SMLALDX(x2, c0, acc2);\n\n          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */\n          acc3 = __SMLALDX(x3, c0, acc3);\n\n          /* Read y[srcBLen - 3] and y[srcBLen - 4] */\n          c0 = read_q15x2_da((q15_t **)&py);\n\n          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */\n          acc0 = __SMLALDX(x2, c0, acc0);\n\n          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */\n          acc1 = __SMLALDX(x3, c0, acc1);\n\n          /* Read x[4], x[5] */\n          x0 = read_q15x2((q15_t *)px + 2);\n\n          /* Read x[5], x[6] */\n          x1 = read_q15x2((q15_t *)px + 3);\n          px += 4U;\n\n          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */\n          acc2 = __SMLALDX(x0, c0, acc2);\n\n          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */\n          acc3 = __SMLALDX(x1, c0, acc3);\n\n        } while (--k);\n\n        /* For the next MAC operations, SIMD is not used\n         * So, the 16 bit pointer if inputB, py is updated */\n\n        /* If the srcBLen is not a multiple of 4, compute any remaining MACs\n         *here.\n         ** No loop unrolling is used. */\n        k = srcBLen % 0x4U;\n\n        if (k == 1U) {\n          /* Read y[srcBLen - 5] */\n          c0 = *(py + 1);\n#ifdef ARM_MATH_BIG_ENDIAN\n          c0 = c0 << 16U;\n#else\n          c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n          /* Read x[7] */\n          x3 = read_q15x2((q15_t *)px);\n          px++;\n\n          /* Perform the multiply-accumulate */\n          acc0 = __SMLALD(x0, c0, acc0);\n          acc1 = __SMLALD(x1, c0, acc1);\n          acc2 = __SMLALDX(x1, c0, acc2);\n          acc3 = __SMLALDX(x3, c0, acc3);\n        }\n\n        if (k == 2U) {\n          /* Read y[srcBLen - 5], y[srcBLen - 6] */\n          c0 = read_q15x2((q15_t *)py);\n\n          /* Read x[7], x[8] */\n          x3 = read_q15x2((q15_t *)px);\n\n          /* Read x[9] */\n          x2 = read_q15x2((q15_t *)px + 1);\n          px += 2U;\n\n          /* Perform the multiply-accumulate */\n          acc0 = __SMLALDX(x0, c0, acc0);\n          acc1 = __SMLALDX(x1, c0, acc1);\n          acc2 = __SMLALDX(x3, c0, acc2);\n          acc3 = __SMLALDX(x2, c0, acc3);\n        }\n\n        if (k == 3U) {\n          /* Read y[srcBLen - 5], y[srcBLen - 6] */\n          c0 = read_q15x2((q15_t *)py);\n\n          /* Read x[7], x[8] */\n          x3 = read_q15x2((q15_t *)px);\n\n          /* Read x[9] */\n          x2 = read_q15x2((q15_t *)px + 1);\n\n          /* Perform the multiply-accumulate */\n          acc0 = __SMLALDX(x0, c0, acc0);\n          acc1 = __SMLALDX(x1, c0, acc1);\n          acc2 = __SMLALDX(x3, c0, acc2);\n          acc3 = __SMLALDX(x2, c0, acc3);\n\n          c0 = *(py - 1);\n#ifdef ARM_MATH_BIG_ENDIAN\n          c0 = c0 << 16U;\n#else\n          c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n          /* Read x[10] */\n          x3 = read_q15x2((q15_t *)px + 2);\n          px += 3U;\n\n          /* Perform the multiply-accumulates */\n          acc0 = __SMLALDX(x1, c0, acc0);\n          acc1 = __SMLALD(x2, c0, acc1);\n          acc2 = __SMLALDX(x2, c0, acc2);\n          acc3 = __SMLALDX(x3, c0, acc3);\n        }\n\n        /* Store the results in the accumulators in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n        write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc0 >> 15), 16),\n                                      __SSAT((acc1 >> 15), 16), 16));\n        write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc2 >> 15), 16),\n                                      __SSAT((acc3 >> 15), 16), 16));\n#else\n        write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc1 >> 15), 16),\n                                      __SSAT((acc0 >> 15), 16), 16));\n        write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc3 >> 15), 16),\n                                      __SSAT((acc2 >> 15), 16), 16));\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n        /* Increment the pointer pIn1 index, count by 4 */\n        count += 4U;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n\n      /* If the blockSize2 is not a multiple of 4, compute any remaining output\n         samples here. No loop unrolling is used. */\n      blkCnt = (uint32_t)blockSize2 % 0x4U;\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        k = srcBLen >> 2U;\n\n        /* First part of the processing with loop unrolling.  Compute 4 MACs at\n           a time. a second loop below computes MACs for the remaining 1 to 3\n           samples. */\n        while (k > 0U) {\n          /* Perform the multiply-accumulates */\n          sum += (q63_t)((q31_t)*px++ * *py--);\n          sum += (q63_t)((q31_t)*px++ * *py--);\n          sum += (q63_t)((q31_t)*px++ * *py--);\n          sum += (q63_t)((q31_t)*px++ * *py--);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* If the srcBLen is not a multiple of 4, compute any remaining MACs\n         *here.\n         ** No loop unrolling is used. */\n        k = srcBLen % 0x4U;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += (q63_t)((q31_t)*px++ * *py--);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q15_t)(__SSAT(sum >> 15, 16));\n\n        /* Increment the pointer pIn1 index, count by 1 */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n    } else {\n      /* If the srcBLen is not a multiple of 4,\n       * the blockSize2 loop cannot be unrolled by 4 */\n      blkCnt = (uint32_t)blockSize2;\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n        /* srcBLen number of MACS should be performed */\n        k = srcBLen;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += (q63_t)((q31_t)*px++ * *py--);\n\n          /* Decrement the loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q15_t)(__SSAT(sum >> 15, 16));\n\n        /* Increment the MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement the loop counter */\n        blkCnt--;\n      }\n    }\n\n    /* --------------------------\n     * Initializations of stage3\n     * -------------------------*/\n\n    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n     * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n     * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n     * y[2]\n     * ....\n     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n     * sum +=  x[srcALen-1] * y[srcBLen-1]\n     */\n\n    /* In this stage the MAC operations are decreased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed */\n    count = srcBLen - 1U;\n\n    /* Working pointer of inputA */\n    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    pIn2 = pSrc2 - 1U;\n    py = pIn2;\n\n    /* -------------------\n     * Stage3 process\n     * ------------------*/\n\n    /* For loop unrolling by 4, this stage is divided into two. */\n    /* First part of this stage computes the MAC operations greater than 4 */\n    /* Second part of this stage computes the MAC operations less than or equal\n     * to 4 */\n\n    /* The first part of the stage starts here */\n    j = count >> 2U;\n\n    while ((j > 0U) && (blockSize3 > 0U)) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = count >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      while (k > 0U) {\n        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied\n         * with y[srcBLen - 1], y[srcBLen - 2] respectively */\n        sum = __SMLALDX(read_q15x2_ia((q15_t **)&px),\n                        read_q15x2_da((q15_t **)&py), sum);\n        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied\n         * with y[srcBLen - 3], y[srcBLen - 4] respectively */\n        sum = __SMLALDX(read_q15x2_ia((q15_t **)&px),\n                        read_q15x2_da((q15_t **)&py), sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* For the next MAC operations, the pointer py is used without SIMD\n       * So, py is incremented by 1 */\n      py = py + 1U;\n\n      /* If the count is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = count % 0x4U;\n\n      while (k > 0U) {\n        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */\n        sum = __SMLALD(*px++, *py--, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(__SSAT((sum >> 15), 16));\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = ++pSrc1;\n      py = pIn2;\n\n      /* Decrement MAC count */\n      count--;\n\n      /* Decrement loop counter */\n      blockSize3--;\n\n      j--;\n    }\n\n    /* The second part of the stage starts here */\n    /* SIMD is not used for the next MAC operations,\n     * so pointer py is updated to read only one sample at a time */\n    py = py + 1U;\n\n    while (blockSize3 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = count;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n        sum = __SMLALD(*px++, *py--, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(__SSAT((sum >> 15), 16));\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = ++pSrc1;\n      py = pSrc2;\n\n      /* Decrement MAC count */\n      count--;\n\n      /* Decrement the loop counter */\n      blockSize3--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  const q15_t *pIn1 = pSrcA; /* InputA pointer */\n  const q15_t *pIn2 = pSrcB; /* InputB pointer */\n  q63_t sum;                 /* Accumulator */\n  uint32_t i, j;             /* Loop counters */\n  arm_status status;         /* Status of Partial convolution */\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* Loop to calculate convolution for output length number of values */\n    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) {\n      /* Initialize sum with zero to carry on MAC operations */\n      sum = 0;\n\n      /* Loop to perform MAC operations according to convolution equation */\n      for (j = 0U; j <= i; j++) {\n        /* Check the array limitations */\n        if (((i - j) < srcBLen) && (j < srcALen)) {\n          /* z[i] += x[i-j] * y[j] */\n          sum += ((q31_t)pIn1[j] * pIn2[i - j]);\n        }\n      }\n\n      /* Store the output in the destination buffer */\n      pDst[i] = (q15_t)__SSAT((sum >> 15U), 16U);\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_q31.c\n * Description:  Partial convolution of Q31 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of Q31 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written\n  @param[in]     firstIndex is the first output sample to start with\n  @param[in]     numPoints  is the number of output points to be computed\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n\n  @remark\n                   Refer to \\ref arm_conv_partial_fast_q31() for a faster but\n  less precise implementation of this function.\n */\n\narm_status arm_conv_partial_q31(const q31_t *pSrcA, uint32_t srcALen,\n                                const q31_t *pSrcB, uint32_t srcBLen,\n                                q31_t *pDst, uint32_t firstIndex,\n                                uint32_t numPoints) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const q31_t *pIn1;          /* InputA pointer */\n  const q31_t *pIn2;          /* InputB pointer */\n  q31_t *pOut = pDst;         /* Output pointer */\n  const q31_t *px;            /* Intermediate inputA pointer */\n  const q31_t *py;            /* Intermediate inputB pointer */\n  const q31_t *pSrc1, *pSrc2; /* Intermediate pointers */\n  q63_t sum;                  /* Accumulator */\n  uint32_t j, k, count, blkCnt, check;\n  int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  arm_status status; /* Status of Partial convolution */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc0, acc1, acc2; /* Accumulator */\n  q31_t x0, x1, x2, c0;   /* Temporary variables */\n#endif\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* Conditions to check which loopCounter holds\n     * the first and last indices of the output samples to be calculated. */\n    check = firstIndex + numPoints;\n    blockSize3 = ((int32_t)check > (int32_t)srcALen)\n                     ? (int32_t)check - (int32_t)srcALen\n                     : 0;\n    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1)\n                     ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen\n                     : blockSize3;\n    blockSize1 = ((int32_t)srcBLen - 1) - (int32_t)firstIndex;\n    blockSize1 =\n        (blockSize1 > 0)\n            ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints)\n            : 0;\n    blockSize2 =\n        (int32_t)check - ((blockSize3 + blockSize1) + (int32_t)firstIndex);\n    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;\n\n    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n     * x[n-N+1] * y[N -1] */\n    /* The function is internally\n     * divided into three stages according to the number of multiplications that\n     * has to be taken place between inputA samples and inputB samples. In the\n     * first stage of the algorithm, the multiplications increase by one for\n     * every iteration. In the second stage of the algorithm, srcBLen number of\n     * multiplications are done. In the third stage of the algorithm, the\n     * multiplications decrease by one for every iteration. */\n\n    /* Set the output pointer to point to the firstIndex\n     * of the output sample to be calculated. */\n    pOut = pDst + firstIndex;\n\n    /* --------------------------\n     * Initializations of stage1\n     * -------------------------*/\n\n    /* sum = x[0] * y[0]\n     * sum = x[0] * y[1] + x[1] * y[0]\n     * ....\n     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1]\n     * * y[0]\n     */\n\n    /* In this stage the MAC operations are increased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed.\n       Since the partial convolution starts from firstIndex\n       Number of Macs to be performed is firstIndex + 1 */\n    count = 1U + firstIndex;\n\n    /* Working pointer of inputA */\n    px = pIn1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + firstIndex;\n    py = pSrc2;\n\n    /* ------------------------\n     * Stage1 process\n     * ----------------------*/\n\n    /* The first stage starts here */\n    while (blockSize1 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = count >> 2U;\n\n      while (k > 0U) {\n        /* x[0] * y[srcBLen - 1] */\n        sum += (q63_t)*px++ * (*py--);\n\n        /* x[1] * y[srcBLen - 2] */\n        sum += (q63_t)*px++ * (*py--);\n\n        /* x[2] * y[srcBLen - 3] */\n        sum += (q63_t)*px++ * (*py--);\n\n        /* x[3] * y[srcBLen - 4] */\n        sum += (q63_t)*px++ * (*py--);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = count % 0x4U;\n\n#else\n\n      /* Initialize k with number of samples */\n      k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += (q63_t)*px++ * (*py--);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q31_t)(sum >> 31);\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      py = ++pSrc2;\n      px = pIn1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Decrement loop counter */\n      blockSize1--;\n    }\n\n    /* --------------------------\n     * Initializations of stage2\n     * ------------------------*/\n\n    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n     * ....\n     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2]\n     * +...+ x[srcALen-1] * y[0]\n     */\n\n    /* Working pointer of inputA */\n    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) {\n      pSrc1 = pIn1 + firstIndex - srcBLen + 1;\n    } else {\n      pSrc1 = pIn1;\n    }\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* count is index by which the pointer pIn1 to be incremented */\n    count = 0U;\n\n    /* -------------------\n     * Stage2 process\n     * ------------------*/\n\n    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n     * performed. So, to loop unroll over blockSize2,\n     * srcBLen should be greater than or equal to 4 */\n    if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unroll over blkCnt */\n      blkCnt = blockSize2 / 3;\n\n      while (blkCnt > 0U) {\n        /* Set all accumulators to zero */\n        acc0 = 0;\n        acc1 = 0;\n        acc2 = 0;\n\n        /* read x[0], x[1] samples */\n        x0 = *px++;\n        x1 = *px++;\n\n        /* Apply loop unrolling and compute 3 MACs simultaneously. */\n        k = srcBLen / 3;\n\n        /* First part of the processing with loop unrolling.  Compute 3 MACs at\n         *a time.\n         ** a second loop below computes MACs for the remaining 1 to 2 samples.\n         */\n        do {\n          /* Read y[srcBLen - 1] sample */\n          c0 = *(py);\n\n          /* Read x[2] sample */\n          x2 = *(px);\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[0] * y[srcBLen - 1] */\n          acc0 += (q63_t)x0 * c0;\n          /* acc1 +=  x[1] * y[srcBLen - 1] */\n          acc1 += (q63_t)x1 * c0;\n          /* acc2 +=  x[2] * y[srcBLen - 1] */\n          acc2 += (q63_t)x2 * c0;\n\n          /* Read y[srcBLen - 2] sample */\n          c0 = *(py - 1U);\n\n          /* Read x[3] sample */\n          x0 = *(px + 1U);\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[1] * y[srcBLen - 2] */\n          acc0 += (q63_t)x1 * c0;\n          /* acc1 +=  x[2] * y[srcBLen - 2] */\n          acc1 += (q63_t)x2 * c0;\n          /* acc2 +=  x[3] * y[srcBLen - 2] */\n          acc2 += (q63_t)x0 * c0;\n\n          /* Read y[srcBLen - 3] sample */\n          c0 = *(py - 2U);\n\n          /* Read x[4] sample */\n          x1 = *(px + 2U);\n\n          /* Perform the multiply-accumulate */\n          /* acc0 +=  x[2] * y[srcBLen - 3] */\n          acc0 += (q63_t)x2 * c0;\n          /* acc1 +=  x[3] * y[srcBLen - 2] */\n          acc1 += (q63_t)x0 * c0;\n          /* acc2 +=  x[4] * y[srcBLen - 2] */\n          acc2 += (q63_t)x1 * c0;\n\n          px += 3U;\n\n          py -= 3U;\n\n        } while (--k);\n\n        /* If the srcBLen is not a multiple of 3, compute any remaining MACs\n         *here.\n         ** No loop unrolling is used. */\n        k = srcBLen - (3 * (srcBLen / 3));\n\n        while (k > 0U) {\n          /* Read y[srcBLen - 5] sample */\n          c0 = *py--;\n          /* Read x[7] sample */\n          x2 = *px++;\n\n          /* Perform the multiply-accumulates */\n          /* acc0 +=  x[4] * y[srcBLen - 5] */\n          acc0 += (q63_t)x0 * c0;\n          /* acc1 +=  x[5] * y[srcBLen - 5] */\n          acc1 += (q63_t)x1 * c0;\n          /* acc2 +=  x[6] * y[srcBLen - 5] */\n          acc2 += (q63_t)x2 * c0;\n\n          /* Reuse the present samples for the next MAC */\n          x0 = x1;\n          x1 = x2;\n\n          /* Decrement the loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q31_t)(acc0 >> 31);\n        *pOut++ = (q31_t)(acc1 >> 31);\n        *pOut++ = (q31_t)(acc2 >> 31);\n\n        /* Increment the pointer pIn1 index, count by 3 */\n        count += 3U;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      blkCnt = blockSize2 - 3 * (blockSize2 / 3);\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Loop unrolling: Compute 4 outputs at a time */\n        k = srcBLen >> 2U;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulates */\n          sum += (q63_t)*px++ * (*py--);\n          sum += (q63_t)*px++ * (*py--);\n          sum += (q63_t)*px++ * (*py--);\n          sum += (q63_t)*px++ * (*py--);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Loop unrolling: Compute remaining outputs */\n        k = srcBLen % 0x4U;\n\n#else\n\n        /* Initialize blkCnt with number of samples */\n        k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += (q63_t)*px++ * *py--;\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q31_t)(sum >> 31);\n\n        /* Increment MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n    } else {\n      /* If the srcBLen is not a multiple of 4,\n       * the blockSize2 loop cannot be unrolled by 4 */\n      blkCnt = (uint32_t)blockSize2;\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n        /* srcBLen number of MACS should be performed */\n        k = srcBLen;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += (q63_t)*px++ * *py--;\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q31_t)(sum >> 31);\n\n        /* Increment the MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement the loop counter */\n        blkCnt--;\n      }\n    }\n\n    /* --------------------------\n     * Initializations of stage3\n     * -------------------------*/\n\n    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n     * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n     * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n     * y[2]\n     * ....\n     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n     * sum +=  x[srcALen-1] * y[srcBLen-1]\n     */\n\n    /* In this stage the MAC operations are decreased by 1 for every iteration.\n       The blockSize3 variable holds the number of MAC operations performed */\n    count = srcBLen - 1U;\n\n    /* Working pointer of inputA */\n    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* -------------------\n     * Stage3 process\n     * ------------------*/\n\n    while (blockSize3 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = count >> 2U;\n\n      while (k > 0U) {\n        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */\n        sum += (q63_t)*px++ * *py--;\n\n        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */\n        sum += (q63_t)*px++ * *py--;\n\n        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */\n        sum += (q63_t)*px++ * *py--;\n\n        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */\n        sum += (q63_t)*px++ * *py--;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = count % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n        sum += (q63_t)*px++ * *py--;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q31_t)(sum >> 31);\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = ++pSrc1;\n      py = pSrc2;\n\n      /* Decrement MAC count */\n      count--;\n\n      /* Decrement the loop counter */\n      blockSize3--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const q31_t *pIn1 = pSrcA; /* InputA pointer */\n  const q31_t *pIn2 = pSrcB; /* InputB pointer */\n  q63_t sum;                 /* Accumulator */\n  uint32_t i, j;             /* Loop counters */\n  arm_status status;         /* Status of Partial convolution */\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* Loop to calculate convolution for output length number of values */\n    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) {\n      /* Initialize sum with zero to carry on MAC operations */\n      sum = 0;\n\n      /* Loop to perform MAC operations according to convolution equation */\n      for (j = 0U; j <= i; j++) {\n        /* Check the array limitations */\n        if (((i - j) < srcBLen) && (j < srcALen)) {\n          /* z[i] += x[i-j] * y[j] */\n          sum += ((q63_t)pIn1[j] * pIn2[i - j]);\n        }\n      }\n\n      /* Store the output in the destination buffer */\n      pDst[i] = (q31_t)(sum >> 31U);\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_partial_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_partial_q7.c\n * Description:  Partial convolution of Q7 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup PartialConv\n  @{\n */\n\n/**\n  @brief         Partial convolution of Q7 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written\n  @param[in]     firstIndex is the first output sample to start with\n  @param[in]     numPoints  is the number of output points to be computed\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in\n  the range [0 srcALen+srcBLen-2]\n\n  @remark\n                   Refer to \\ref arm_conv_partial_opt_q7() for a faster\n  implementation of this function.\n */\n\narm_status arm_conv_partial_q7(const q7_t *pSrcA, uint32_t srcALen,\n                               const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst,\n                               uint32_t firstIndex, uint32_t numPoints) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const q7_t *pIn1;                           /* InputA pointer */\n  const q7_t *pIn2;                           /* InputB pointer */\n  q7_t *pOut = pDst;                          /* Output pointer */\n  const q7_t *px;                             /* Intermediate inputA pointer */\n  const q7_t *py;                             /* Intermediate inputB pointer */\n  const q7_t *pSrc1, *pSrc2;                  /* Intermediate pointers */\n  q31_t sum;                                  /* Accumulator */\n  uint32_t j, k, count, blkCnt, check;        /* Loop counters */\n  int32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  arm_status status; /* Status of Partial convolution */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc0, acc1, acc2, acc3; /* Accumulator */\n  q31_t input1, input2;         /* Temporary input variables */\n  q15_t in1, in2;               /* Temporary input variables */\n  q7_t x0, x1, x2, x3, c0,\n      c1; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* The algorithm implementation is based on the lengths of the inputs. */\n    /* srcB is always made to slide across srcA. */\n    /* So srcBLen is always considered as shorter or equal to srcALen */\n    if (srcALen >= srcBLen) {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcA;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcB;\n    } else {\n      /* Initialization of inputA pointer */\n      pIn1 = pSrcB;\n\n      /* Initialization of inputB pointer */\n      pIn2 = pSrcA;\n\n      /* srcBLen is always considered as shorter or equal to srcALen */\n      j = srcBLen;\n      srcBLen = srcALen;\n      srcALen = j;\n    }\n\n    /* Conditions to check which loopCounter holds\n     * the first and last indices of the output samples to be calculated. */\n    check = firstIndex + numPoints;\n    blockSize3 = ((int32_t)check > (int32_t)srcALen)\n                     ? (int32_t)check - (int32_t)srcALen\n                     : 0;\n    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1)\n                     ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen\n                     : blockSize3;\n    blockSize1 = ((int32_t)srcBLen - 1) - (int32_t)firstIndex;\n    blockSize1 =\n        (blockSize1 > 0)\n            ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints)\n            : 0;\n    blockSize2 =\n        (int32_t)check - ((blockSize3 + blockSize1) + (int32_t)firstIndex);\n    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;\n\n    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n     * x[n-N+1] * y[N -1] */\n    /* The function is internally\n     * divided into three stages according to the number of multiplications that\n     * has to be taken place between inputA samples and inputB samples. In the\n     * first stage of the algorithm, the multiplications increase by one for\n     * every iteration. In the second stage of the algorithm, srcBLen number of\n     * multiplications are done. In the third stage of the algorithm, the\n     * multiplications decrease by one for every iteration. */\n\n    /* Set the output pointer to point to the firstIndex\n     * of the output sample to be calculated. */\n    pOut = pDst + firstIndex;\n\n    /* --------------------------\n     * Initializations of stage1\n     * -------------------------*/\n\n    /* sum = x[0] * y[0]\n     * sum = x[0] * y[1] + x[1] * y[0]\n     * ....\n     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1]\n     * * y[0]\n     */\n\n    /* In this stage the MAC operations are increased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed.\n       Since the partial convolution starts from firstIndex\n       Number of Macs to be performed is firstIndex + 1 */\n    count = 1U + firstIndex;\n\n    /* Working pointer of inputA */\n    px = pIn1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + firstIndex;\n    py = pSrc2;\n\n    /* ------------------------\n     * Stage1 process\n     * ----------------------*/\n\n    /* The first stage starts here */\n    while (blockSize1 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = count >> 2U;\n\n      while (k > 0U) {\n        /* x[0] , x[1] */\n        in1 = (q15_t)*px++;\n        in2 = (q15_t)*px++;\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n        /* y[srcBLen - 1] , y[srcBLen - 2] */\n        in1 = (q15_t)*py--;\n        in2 = (q15_t)*py--;\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n        /* x[0] * y[srcBLen - 1] */\n        /* x[1] * y[srcBLen - 2] */\n        sum = __SMLAD(input1, input2, sum);\n\n        /* x[2] , x[3] */\n        in1 = (q15_t)*px++;\n        in2 = (q15_t)*px++;\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n        /* y[srcBLen - 3] , y[srcBLen - 4] */\n        in1 = (q15_t)*py--;\n        in2 = (q15_t)*py--;\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n        /* x[2] * y[srcBLen - 3] */\n        /* x[3] * y[srcBLen - 4] */\n        sum = __SMLAD(input1, input2, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = count % 0x4U;\n\n#else\n\n      /* Initialize k with number of samples */\n      k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += ((q31_t)*px++ * *py--);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q7_t)(__SSAT(sum >> 7, 8));\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      py = ++pSrc2;\n      px = pIn1;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Decrement loop counter */\n      blockSize1--;\n    }\n\n    /* --------------------------\n     * Initializations of stage2\n     * ------------------------*/\n\n    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n     * ....\n     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2]\n     * +...+ x[srcALen-1] * y[0]\n     */\n\n    /* Working pointer of inputA */\n    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0) {\n      pSrc1 = pIn1 + firstIndex - srcBLen + 1;\n    } else {\n      pSrc1 = pIn1;\n    }\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* count is the index by which the pointer pIn1 to be incremented */\n    count = 0U;\n\n    /* -------------------\n     * Stage2 process\n     * ------------------*/\n\n    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n     * performed. So, to loop unroll over blockSize2,\n     * srcBLen should be greater than or equal to 4 */\n    if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      blkCnt = ((uint32_t)blockSize2 >> 2U);\n\n      while (blkCnt > 0U) {\n        /* Set all accumulators to zero */\n        acc0 = 0;\n        acc1 = 0;\n        acc2 = 0;\n        acc3 = 0;\n\n        /* read x[0], x[1], x[2] samples */\n        x0 = *px++;\n        x1 = *px++;\n        x2 = *px++;\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        k = srcBLen >> 2U;\n\n        /* First part of the processing with loop unrolling.  Compute 4 MACs at\n         *a time.\n         ** a second loop below computes MACs for the remaining 1 to 3 samples.\n         */\n        do {\n          /* Read y[srcBLen - 1] sample */\n          c0 = *py--;\n          /* Read y[srcBLen - 2] sample */\n          c1 = *py--;\n\n          /* Read x[3] sample */\n          x3 = *px++;\n\n          /* x[0] and x[1] are packed */\n          in1 = (q15_t)x0;\n          in2 = (q15_t)x1;\n\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */\n          in1 = (q15_t)c0;\n          in2 = (q15_t)c1;\n\n          input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */\n          acc0 = __SMLAD(input1, input2, acc0);\n\n          /* x[1] and x[2] are packed */\n          in1 = (q15_t)x1;\n          in2 = (q15_t)x2;\n\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */\n          acc1 = __SMLAD(input1, input2, acc1);\n\n          /* x[2] and x[3] are packed */\n          in1 = (q15_t)x2;\n          in2 = (q15_t)x3;\n\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */\n          acc2 = __SMLAD(input1, input2, acc2);\n\n          /* Read x[4] sample */\n          x0 = *px++;\n\n          /* x[3] and x[4] are packed */\n          in1 = (q15_t)x3;\n          in2 = (q15_t)x0;\n\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */\n          acc3 = __SMLAD(input1, input2, acc3);\n\n          /* Read y[srcBLen - 3] sample */\n          c0 = *py--;\n          /* Read y[srcBLen - 4] sample */\n          c1 = *py--;\n\n          /* Read x[5] sample */\n          x1 = *px++;\n\n          /* x[2] and x[3] are packed */\n          in1 = (q15_t)x2;\n          in2 = (q15_t)x3;\n\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* y[srcBLen - 3] and y[srcBLen - 4] are packed */\n          in1 = (q15_t)c0;\n          in2 = (q15_t)c1;\n\n          input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */\n          acc0 = __SMLAD(input1, input2, acc0);\n\n          /* x[3] and x[4] are packed */\n          in1 = (q15_t)x3;\n          in2 = (q15_t)x0;\n\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */\n          acc1 = __SMLAD(input1, input2, acc1);\n\n          /* x[4] and x[5] are packed */\n          in1 = (q15_t)x0;\n          in2 = (q15_t)x1;\n\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */\n          acc2 = __SMLAD(input1, input2, acc2);\n\n          /* Read x[6] sample */\n          x2 = *px++;\n\n          /* x[5] and x[6] are packed */\n          in1 = (q15_t)x1;\n          in2 = (q15_t)x2;\n\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */\n          acc3 = __SMLAD(input1, input2, acc3);\n\n        } while (--k);\n\n        /* If the srcBLen is not a multiple of 4, compute any remaining MACs\n         *here.\n         ** No loop unrolling is used. */\n        k = srcBLen % 0x4U;\n\n        while (k > 0U) {\n          /* Read y[srcBLen - 5] sample */\n          c0 = *py--;\n          /* Read x[7] sample */\n          x3 = *px++;\n\n          /* Perform the multiply-accumulates */\n          /* acc0 +=  x[4] * y[srcBLen - 5] */\n          acc0 += ((q31_t)x0 * c0);\n          /* acc1 +=  x[5] * y[srcBLen - 5] */\n          acc1 += ((q31_t)x1 * c0);\n          /* acc2 +=  x[6] * y[srcBLen - 5] */\n          acc2 += ((q31_t)x2 * c0);\n          /* acc3 +=  x[7] * y[srcBLen - 5] */\n          acc3 += ((q31_t)x3 * c0);\n\n          /* Reuse the present samples for the next MAC */\n          x0 = x1;\n          x1 = x2;\n          x2 = x3;\n\n          /* Decrement the loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q7_t)(__SSAT(acc0 >> 7, 8));\n        *pOut++ = (q7_t)(__SSAT(acc1 >> 7, 8));\n        *pOut++ = (q7_t)(__SSAT(acc2 >> 7, 8));\n        *pOut++ = (q7_t)(__SSAT(acc3 >> 7, 8));\n\n        /* Increment the pointer pIn1 index, count by 4 */\n        count += 4U;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      blkCnt = (uint32_t)blockSize2 % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Loop unrolling: Compute 4 outputs at a time */\n        k = srcBLen >> 2U;\n\n        while (k > 0U) {\n          /* Reading two inputs of SrcA buffer and packing */\n          in1 = (q15_t)*px++;\n          in2 = (q15_t)*px++;\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* Reading two inputs of SrcB buffer and packing */\n          in1 = (q15_t)*py--;\n          in2 = (q15_t)*py--;\n          input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* Perform the multiply-accumulate */\n          sum = __SMLAD(input1, input2, sum);\n\n          /* Reading two inputs of SrcA buffer and packing */\n          in1 = (q15_t)*px++;\n          in2 = (q15_t)*px++;\n          input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* Reading two inputs of SrcB buffer and packing */\n          in1 = (q15_t)*py--;\n          in2 = (q15_t)*py--;\n          input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n          /* Perform the multiply-accumulate */\n          sum = __SMLAD(input1, input2, sum);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Loop unrolling: Compute remaining outputs */\n        k = srcBLen % 0x4U;\n\n#else\n\n        /* Initialize blkCnt with number of samples */\n        k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += ((q31_t)*px++ * *py--);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q7_t)(__SSAT(sum >> 7, 8));\n\n        /* Increment the pointer pIn1 index, count by 1 */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement loop counter */\n        blkCnt--;\n      }\n    } else {\n      /* If the srcBLen is not a multiple of 4,\n       * the blockSize2 loop cannot be unrolled by 4 */\n      blkCnt = (uint32_t)blockSize2;\n\n      while (blkCnt > 0U) {\n        /* Accumulator is made zero for every iteration */\n        sum = 0;\n\n        /* srcBLen number of MACS should be performed */\n        k = srcBLen;\n\n        while (k > 0U) {\n          /* Perform the multiply-accumulate */\n          sum += ((q31_t)*px++ * *py--);\n\n          /* Decrement loop counter */\n          k--;\n        }\n\n        /* Store the result in the accumulator in the destination buffer. */\n        *pOut++ = (q7_t)(__SSAT(sum >> 7, 8));\n\n        /* Increment the MAC count */\n        count++;\n\n        /* Update the inputA and inputB pointers for next MAC calculation */\n        px = pSrc1 + count;\n        py = pSrc2;\n\n        /* Decrement the loop counter */\n        blkCnt--;\n      }\n    }\n\n    /* --------------------------\n     * Initializations of stage3\n     * -------------------------*/\n\n    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n     * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n     * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n     * y[2]\n     * ....\n     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n     * sum +=  x[srcALen-1] * y[srcBLen-1]\n     */\n\n    /* In this stage the MAC operations are decreased by 1 for every iteration.\n       The count variable holds the number of MAC operations performed */\n    count = srcBLen - 1U;\n\n    /* Working pointer of inputA */\n    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n    px = pSrc1;\n\n    /* Working pointer of inputB */\n    pSrc2 = pIn2 + (srcBLen - 1U);\n    py = pSrc2;\n\n    /* -------------------\n     * Stage3 process\n     * ------------------*/\n\n    while (blockSize3 > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = count >> 2U;\n\n      while (k > 0U) {\n        /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen\n         * + 2] of SrcA buffer and packing */\n        in1 = (q15_t)*px++;\n        in2 = (q15_t)*px++;\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n        /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer\n         * and packing */\n        in1 = (q15_t)*py--;\n        in2 = (q15_t)*py--;\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */\n        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */\n        sum = __SMLAD(input1, input2, sum);\n\n        /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen\n         * + 4] of SrcA buffer and packing */\n        in1 = (q15_t)*px++;\n        in2 = (q15_t)*px++;\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n        /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer\n         * and packing */\n        in1 = (q15_t)*py--;\n        in2 = (q15_t)*py--;\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */\n        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */\n        sum = __SMLAD(input1, input2, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = count % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n        sum += ((q31_t)*px++ * *py--);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q7_t)(__SSAT(sum >> 7, 8));\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = ++pSrc1;\n      py = pSrc2;\n\n      /* Decrement MAC count */\n      count--;\n\n      /* Decrement the loop counter */\n      blockSize3--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const q7_t *pIn1 = pSrcA; /* InputA pointer */\n  const q7_t *pIn2 = pSrcB; /* InputB pointer */\n  q31_t sum;                /* Accumulator */\n  uint32_t i, j;            /* Loop counters */\n  arm_status status;        /* Status of Partial convolution */\n\n  /* Check for range of output samples to be calculated */\n  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U)))) {\n    /* Set status as ARM_MATH_ARGUMENT_ERROR */\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* Loop to calculate convolution for output length number of values */\n    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++) {\n      /* Initialize sum with zero to carry on MAC operations */\n      sum = 0;\n\n      /* Loop to perform MAC operations according to convolution equation */\n      for (j = 0U; j <= i; j++) {\n        /* Check the array limitations */\n        if (((i - j) < srcBLen) && (j < srcALen)) {\n          /* z[i] += x[i-j] * y[j] */\n          sum += ((q15_t)pIn1[j] * (pIn2[i - j]));\n        }\n      }\n\n      /* Store the output in the destination buffer */\n      pDst[i] = (q7_t)__SSAT((sum >> 7U), 8U);\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of PartialConv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_q15.c\n * Description:  Convolution of Q15 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of Q15 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30\n  result. The 2.30 intermediate results are accumulated in a 64-bit accumulator\n  in 34.30 format. This approach provides 33 guard bits and there is no risk of\n  overflow. The 34.30 result is then truncated to 34.15 format by discarding the\n  low 15 bits and then saturated to 1.15 format.\n\n  @remark\n                   Refer to \\ref arm_conv_fast_q15() for a faster but less\n  precise version of this function.\n  @remark\n                   Refer to \\ref arm_conv_opt_q15() for a faster implementation\n  of this function using scratch buffers.\n */\n\nvoid arm_conv_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB,\n                  uint32_t srcBLen, q15_t *pDst) {\n\n#if defined(ARM_MATH_DSP)\n\n  const q15_t *pIn1;                 /* InputA pointer */\n  const q15_t *pIn2;                 /* InputB pointer */\n  q15_t *pOut = pDst;                /* Output pointer */\n  q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */\n  const q15_t *px;                   /* Intermediate inputA pointer */\n  const q15_t *py;                   /* Intermediate inputB pointer */\n  const q15_t *pSrc1, *pSrc2;        /* Intermediate pointers */\n  q31_t x0, x1, x2, x3,\n      c0; /* Temporary input variables to hold state and coefficient values */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n   * x[n-N+1] * y[N -1] */\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[0]\n   * sum = x[0] * y[1] + x[1] * y[0]\n   * ....\n   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] *\n   * y[0]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* For loop unrolling by 4, this stage is divided into two. */\n  /* First part of this stage computes the MAC operations less than 4 */\n  /* Second part of this stage computes the MAC operations greater than or equal\n   * to 4 */\n\n  /* The first part of the stage starts here */\n  while ((count < 4U) && (blockSize1 > 0U)) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Loop over number of MAC operations between\n     * inputA samples and inputB samples */\n    k = count;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      sum = __SMLALD(*px++, *py--, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q15_t)(__SSAT((sum >> 15), 16));\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pIn2 + count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* The second part of the stage starts here */\n  /* The internal loop, over count, is unrolled by 4 */\n  /* To, read the last two inputB samples using SIMD:\n   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */\n  py = py - 1;\n\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2]\n       * respectively */\n      sum = __SMLALDX(read_q15x2_ia((q15_t **)&px),\n                      read_q15x2_da((q15_t **)&py), sum);\n      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4]\n       * respectively */\n      sum = __SMLALDX(read_q15x2_ia((q15_t **)&px),\n                      read_q15x2_da((q15_t **)&py), sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* For the next MAC operations, the pointer py is used without SIMD\n     * So, py is incremented by 1 */\n    py = py + 1U;\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n     ** No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum = __SMLALD(*px++, *py--, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q15_t)(__SSAT((sum >> 15), 16));\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pIn2 + (count - 1U);\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+\n   * x[srcALen-1] * y[0]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* count is the index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      py = py - 1U;\n\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* read x[0], x[1] samples */\n      x0 = read_q15x2((q15_t *)px);\n\n      /* read x[1], x[2] samples */\n      x1 = read_q15x2((q15_t *)px + 1);\n      px += 2U;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read the last two inputB samples using SIMD:\n         * y[srcBLen - 1] and y[srcBLen - 2] */\n        c0 = read_q15x2_da((q15_t **)&py);\n\n        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */\n        acc0 = __SMLALDX(x0, c0, acc0);\n\n        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */\n        acc1 = __SMLALDX(x1, c0, acc1);\n\n        /* Read x[2], x[3] */\n        x2 = read_q15x2((q15_t *)px);\n\n        /* Read x[3], x[4] */\n        x3 = read_q15x2((q15_t *)px + 1);\n\n        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */\n        acc2 = __SMLALDX(x2, c0, acc2);\n\n        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */\n        acc3 = __SMLALDX(x3, c0, acc3);\n\n        /* Read y[srcBLen - 3] and y[srcBLen - 4] */\n        c0 = read_q15x2_da((q15_t **)&py);\n\n        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */\n        acc0 = __SMLALDX(x2, c0, acc0);\n\n        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */\n        acc1 = __SMLALDX(x3, c0, acc1);\n\n        /* Read x[4], x[5] */\n        x0 = read_q15x2((q15_t *)px + 2);\n\n        /* Read x[5], x[6] */\n        x1 = read_q15x2((q15_t *)px + 3);\n\n        px += 4U;\n\n        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */\n        acc2 = __SMLALDX(x0, c0, acc2);\n\n        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */\n        acc3 = __SMLALDX(x1, c0, acc3);\n\n      } while (--k);\n\n      /* For the next MAC operations, SIMD is not used\n       * So, the 16 bit pointer if inputB, py is updated */\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      if (k == 1U) {\n        /* Read y[srcBLen - 5] */\n        c0 = *(py + 1);\n#ifdef ARM_MATH_BIG_ENDIAN\n        c0 = c0 << 16U;\n#else\n        c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n        /* Read x[7] */\n        x3 = read_q15x2((q15_t *)px);\n        px++;\n\n        /* Perform the multiply-accumulate */\n        acc0 = __SMLALD(x0, c0, acc0);\n        acc1 = __SMLALD(x1, c0, acc1);\n        acc2 = __SMLALDX(x1, c0, acc2);\n        acc3 = __SMLALDX(x3, c0, acc3);\n      }\n\n      if (k == 2U) {\n        /* Read y[srcBLen - 5], y[srcBLen - 6] */\n        c0 = read_q15x2((q15_t *)py);\n\n        /* Read x[7], x[8] */\n        x3 = read_q15x2((q15_t *)px);\n\n        /* Read x[9] */\n        x2 = read_q15x2((q15_t *)px + 1);\n        px += 2U;\n\n        /* Perform the multiply-accumulate */\n        acc0 = __SMLALDX(x0, c0, acc0);\n        acc1 = __SMLALDX(x1, c0, acc1);\n        acc2 = __SMLALDX(x3, c0, acc2);\n        acc3 = __SMLALDX(x2, c0, acc3);\n      }\n\n      if (k == 3U) {\n        /* Read y[srcBLen - 5], y[srcBLen - 6] */\n        c0 = read_q15x2((q15_t *)py);\n\n        /* Read x[7], x[8] */\n        x3 = read_q15x2((q15_t *)px);\n\n        /* Read x[9] */\n        x2 = read_q15x2((q15_t *)px + 1);\n\n        /* Perform the multiply-accumulate */\n        acc0 = __SMLALDX(x0, c0, acc0);\n        acc1 = __SMLALDX(x1, c0, acc1);\n        acc2 = __SMLALDX(x3, c0, acc2);\n        acc3 = __SMLALDX(x2, c0, acc3);\n\n        c0 = *(py - 1);\n#ifdef ARM_MATH_BIG_ENDIAN\n        c0 = c0 << 16U;\n#else\n        c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n        /* Read x[10] */\n        x3 = read_q15x2((q15_t *)px + 2);\n        px += 3U;\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLALDX(x1, c0, acc0);\n        acc1 = __SMLALD(x2, c0, acc1);\n        acc2 = __SMLALDX(x2, c0, acc2);\n        acc3 = __SMLALDX(x3, c0, acc3);\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc0 >> 15), 16),\n                                    __SSAT((acc1 >> 15), 16), 16));\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc2 >> 15), 16),\n                                    __SSAT((acc3 >> 15), 16), 16));\n#else\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc1 >> 15), 16),\n                                    __SSAT((acc0 >> 15), 16), 16));\n      write_q15x2_ia(&pOut, __PKHBT(__SSAT((acc3 >> 15), 16),\n                                    __SSAT((acc2 >> 15), 16), 16));\n#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */\n\n      /* Increment the pointer pIn1 index, count by 4 */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* If the blockSize2 is not a multiple of 4, compute any remaining output\n     *samples here.\n     ** No loop unrolling is used. */\n    blkCnt = blockSize2 % 0x4U;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += (q63_t)((q31_t)*px++ * *py--);\n        sum += (q63_t)((q31_t)*px++ * *py--);\n        sum += (q63_t)((q31_t)*px++ * *py--);\n        sum += (q63_t)((q31_t)*px++ * *py--);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += (q63_t)((q31_t)*px++ * *py--);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(__SSAT(sum >> 15, 16));\n\n      /* Increment the pointer pIn1 index, count by 1 */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += (q63_t)((q31_t)*px++ * *py--);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q15_t)(__SSAT(sum >> 15, 16));\n\n      /* Increment the MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n   * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n   * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n   * y[2]\n   * ....\n   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n   * sum +=  x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The blockSize3 variable holds the number of MAC operations performed */\n  blockSize3 = srcBLen - 1U;\n\n  /* Working pointer of inputA */\n  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  pIn2 = pSrc2 - 1U;\n  py = pIn2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  /* For loop unrolling by 4, this stage is divided into two. */\n  /* First part of this stage computes the MAC operations greater than 4 */\n  /* Second part of this stage computes the MAC operations less than or equal to\n   * 4 */\n\n  /* The first part of the stage starts here */\n  j = blockSize3 >> 2U;\n\n  while ((j > 0U) && (blockSize3 > 0U)) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = blockSize3 >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied\n       * with y[srcBLen - 1], y[srcBLen - 2] respectively */\n      sum = __SMLALDX(read_q15x2_ia((q15_t **)&px),\n                      read_q15x2_da((q15_t **)&py), sum);\n      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied\n       * with y[srcBLen - 3], y[srcBLen - 4] respectively */\n      sum = __SMLALDX(read_q15x2_ia((q15_t **)&px),\n                      read_q15x2_da((q15_t **)&py), sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* For the next MAC operations, the pointer py is used without SIMD\n     * So, py is incremented by 1 */\n    py = py + 1U;\n\n    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs\n     *here.\n     ** No loop unrolling is used. */\n    k = blockSize3 % 0x4U;\n\n    while (k > 0U) {\n      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */\n      sum = __SMLALD(*px++, *py--, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q15_t)(__SSAT((sum >> 15), 16));\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pIn2;\n\n    /* Decrement loop counter */\n    blockSize3--;\n\n    j--;\n  }\n\n  /* The second part of the stage starts here */\n  /* SIMD is not used for the next MAC operations,\n   * so pointer py is updated to read only one sample at a time */\n  py = py + 1U;\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = blockSize3;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n      sum = __SMLALD(*px++, *py--, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q15_t)(__SSAT((sum >> 15), 16));\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pSrc2;\n\n    /* Decrement loop counter */\n    blockSize3--;\n  }\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  const q15_t *pIn1 = pSrcA; /* InputA pointer */\n  const q15_t *pIn2 = pSrcB; /* InputB pointer */\n  q63_t sum;                 /* Accumulator */\n  uint32_t i, j;             /* Loop counters */\n\n  /* Loop to calculate convolution for output length number of values */\n  for (i = 0; i < (srcALen + srcBLen - 1); i++) {\n    /* Initialize sum with zero to carry on MAC operations */\n    sum = 0;\n\n    /* Loop to perform MAC operations according to convolution equation */\n    for (j = 0U; j <= i; j++) {\n      /* Check the array limitations */\n      if (((i - j) < srcBLen) && (j < srcALen)) {\n        /* z[i] += x[i-j] * y[j] */\n        sum += ((q31_t)pIn1[j] * pIn2[i - j]);\n      }\n    }\n\n    /* Store the output in the destination buffer */\n    pDst[i] = (q15_t)__SSAT((sum >> 15U), 16U);\n  }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_q31.c\n * Description:  Convolution of Q31 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of Q31 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The accumulator has a 2.62 format and maintains full precision of\n  the intermediate multiplication results but provides only a single guard bit.\n                   There is no saturation on intermediate additions.\n                   Thus, if the accumulator overflows it wraps around and\n  distorts the result. The input signals should be scaled down to avoid\n  intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen))\n  (log2 is read as log to the base 2) times to avoid overflows, as maximum of\n  min(srcALen, srcBLen) number of additions are carried internally. The 2.62\n  accumulator is right shifted by 31 bits and saturated to 1.31 format to yield\n  the final result.\n\n  @remark\n                   Refer to \\ref arm_conv_fast_q31() for a faster but less\n  precise implementation of this function.\n */\n\nvoid arm_conv_q31(const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB,\n                  uint32_t srcBLen, q31_t *pDst) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const q31_t *pIn1;                           /* InputA pointer */\n  const q31_t *pIn2;                           /* InputB pointer */\n  q31_t *pOut = pDst;                          /* Output pointer */\n  const q31_t *px;                             /* Intermediate inputA pointer */\n  const q31_t *py;                             /* Intermediate inputB pointer */\n  const q31_t *pSrc1, *pSrc2;                  /* Intermediate pointers */\n  q63_t sum;                                   /* Accumulators */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc0, acc1, acc2; /* Accumulators */\n  q31_t x0, x1, x2,\n      c0; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n   * x[n-N+1] * y[N -1] */\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[0]\n   * sum = x[0] * y[1] + x[1] * y[0]\n   * ....\n   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] *\n   * y[0]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first stage starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* x[0] * y[srcBLen - 1] */\n      sum += (q63_t)*px++ * (*py--);\n\n      /* x[1] * y[srcBLen - 2] */\n      sum += (q63_t)*px++ * (*py--);\n\n      /* x[2] * y[srcBLen - 3] */\n      sum += (q63_t)*px++ * (*py--);\n\n      /* x[3] * y[srcBLen - 4] */\n      sum += (q63_t)*px++ * (*py--);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize k with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum += (q63_t)*px++ * *py--;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q31_t)(sum >> 31);\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pIn2 + count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+\n   * x[srcALen-1] * y[0]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* count is index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unroll by 3 */\n    blkCnt = blockSize2 / 3;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n\n      /* read x[0], x[1], x[2] samples */\n      x0 = *px++;\n      x1 = *px++;\n\n      /* Apply loop unrolling and compute 3 MACs simultaneously. */\n      k = srcBLen / 3;\n\n      /* First part of the processing with loop unrolling.  Compute 3 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 2 samples. */\n      do {\n        /* Read y[srcBLen - 1] sample */\n        c0 = *(py);\n        /* Read x[3] sample */\n        x2 = *(px);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[0] * y[srcBLen - 1] */\n        acc0 += ((q63_t)x0 * c0);\n        /* acc1 +=  x[1] * y[srcBLen - 1] */\n        acc1 += ((q63_t)x1 * c0);\n        /* acc2 +=  x[2] * y[srcBLen - 1] */\n        acc2 += ((q63_t)x2 * c0);\n\n        /* Read y[srcBLen - 2] sample */\n        c0 = *(py - 1U);\n        /* Read x[4] sample */\n        x0 = *(px + 1U);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[1] * y[srcBLen - 2] */\n        acc0 += ((q63_t)x1 * c0);\n        /* acc1 +=  x[2] * y[srcBLen - 2] */\n        acc1 += ((q63_t)x2 * c0);\n        /* acc2 +=  x[3] * y[srcBLen - 2] */\n        acc2 += ((q63_t)x0 * c0);\n\n        /* Read y[srcBLen - 3] sample */\n        c0 = *(py - 2U);\n        /* Read x[5] sample */\n        x1 = *(px + 2U);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[2] * y[srcBLen - 3] */\n        acc0 += ((q63_t)x2 * c0);\n        /* acc1 +=  x[3] * y[srcBLen - 2] */\n        acc1 += ((q63_t)x0 * c0);\n        /* acc2 +=  x[4] * y[srcBLen - 2] */\n        acc2 += ((q63_t)x1 * c0);\n\n        /* update scratch pointers */\n        px += 3U;\n        py -= 3U;\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen - (3 * (srcBLen / 3));\n\n      while (k > 0U) {\n        /* Read y[srcBLen - 5] sample */\n        c0 = *py--;\n        /* Read x[7] sample */\n        x2 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[4] * y[srcBLen - 5] */\n        acc0 += ((q63_t)x0 * c0);\n        /* acc1 +=  x[5] * y[srcBLen - 5] */\n        acc1 += ((q63_t)x1 * c0);\n        /* acc2 +=  x[6] * y[srcBLen - 5] */\n        acc2 += ((q63_t)x2 * c0);\n\n        /* Reuse the present samples for the next MAC */\n        x0 = x1;\n        x1 = x2;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q31_t)(acc0 >> 31);\n      *pOut++ = (q31_t)(acc1 >> 31);\n      *pOut++ = (q31_t)(acc2 >> 31);\n\n      /* Increment the pointer pIn1 index, count by 3 */\n      count += 3U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize2 - 3 * (blockSize2 / 3);\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = srcBLen >> 2U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += (q63_t)*px++ * *py--;\n        sum += (q63_t)*px++ * *py--;\n        sum += (q63_t)*px++ * *py--;\n        sum += (q63_t)*px++ * *py--;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = srcBLen % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += (q63_t)*px++ * *py--;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q31_t)(sum >> 31);\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += (q63_t)*px++ * *py--;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q31_t)(sum >> 31);\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n   * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n   * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n   * y[2]\n   * ....\n   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n   * sum +=  x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The blockSize3 variable holds the number of MAC operations performed */\n\n  /* Working pointer of inputA */\n  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = blockSize3 >> 2U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */\n      sum += (q63_t)*px++ * *py--;\n\n      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */\n      sum += (q63_t)*px++ * *py--;\n\n      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */\n      sum += (q63_t)*px++ * *py--;\n\n      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */\n      sum += (q63_t)*px++ * *py--;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = blockSize3 % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    k = blockSize3;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n      sum += (q63_t)*px++ * *py--;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q31_t)(sum >> 31);\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pSrc2;\n\n    /* Decrement loop counter */\n    blockSize3--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const q31_t *pIn1 = pSrcA; /* InputA pointer */\n  const q31_t *pIn2 = pSrcB; /* InputB pointer */\n  q63_t sum;                 /* Accumulators */\n  uint32_t i, j;             /* Loop counters */\n\n  /* Loop to calculate convolution for output length number of times */\n  for (i = 0U; i < (srcALen + srcBLen - 1U); i++) {\n    /* Initialize sum with zero to carry out MAC operations */\n    sum = 0;\n\n    /* Loop to perform MAC operations according to convolution equation */\n    for (j = 0U; j <= i; j++) {\n      /* Check the array limitations */\n      if (((i - j) < srcBLen) && (j < srcALen)) {\n        /* z[i] += x[i-j] * y[j] */\n        sum += ((q63_t)pIn1[j] * pIn2[i - j]);\n      }\n    }\n\n    /* Store the output in the destination buffer */\n    pDst[i] = (q31_t)(sum >> 31U);\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_conv_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_conv_q7.c\n * Description:  Convolution of Q7 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Conv\n  @{\n */\n\n/**\n  @brief         Convolution of Q7 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length srcALen+srcBLen-1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n  accumulator. Both the inputs are represented in 1.7 format and multiplications\n  yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit\n  accumulator in 18.14 format. This approach provides 17 guard bits and there is\n  no risk of overflow as long as max(srcALen, srcBLen)<131072.\n                   The 18.14 result is then truncated to 18.7 format by\n  discarding the low 7 bits and then saturated to 1.7 format.\n  @remark\n                   Refer to \\ref arm_conv_opt_q7() for a faster implementation\n  of this function.\n */\n\nvoid arm_conv_q7(const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB,\n                 uint32_t srcBLen, q7_t *pDst) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const q7_t *pIn1;                            /* InputA pointer */\n  const q7_t *pIn2;                            /* InputB pointer */\n  q7_t *pOut = pDst;                           /* Output pointer */\n  const q7_t *px;                              /* Intermediate inputA pointer */\n  const q7_t *py;                              /* Intermediate inputB pointer */\n  const q7_t *pSrc1, *pSrc2;                   /* Intermediate pointers */\n  q31_t sum;                                   /* Accumulators */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc0, acc1, acc2, acc3; /* Accumulators */\n  q31_t input1, input2;         /* Temporary input variables */\n  q15_t in1, in2;               /* Temporary input variables */\n  q7_t x0, x1, x2, x3, c0,\n      c1; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n  }\n\n  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+\n   * x[n-N+1] * y[N -1] */\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[0]\n   * sum = x[0] * y[1] + x[1] * y[0]\n   * ....\n   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] *\n   * y[0]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first stage starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* x[0] , x[1] */\n      in1 = (q15_t)*px++;\n      in2 = (q15_t)*px++;\n      input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* y[srcBLen - 1] , y[srcBLen - 2] */\n      in1 = (q15_t)*py--;\n      in2 = (q15_t)*py--;\n      input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* x[0] * y[srcBLen - 1] */\n      /* x[1] * y[srcBLen - 2] */\n      sum = __SMLAD(input1, input2, sum);\n\n      /* x[2] , x[3] */\n      in1 = (q15_t)*px++;\n      in2 = (q15_t)*px++;\n      input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* y[srcBLen - 3] , y[srcBLen - 4] */\n      in1 = (q15_t)*py--;\n      in2 = (q15_t)*py--;\n      input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* x[2] * y[srcBLen - 3] */\n      /* x[3] * y[srcBLen - 4] */\n      sum = __SMLAD(input1, input2, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize k with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum += ((q15_t)*px++ * *py--);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q7_t)(__SSAT(sum >> 7U, 8));\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pIn2 + count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]\n   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+\n   * x[srcALen-1] * y[0]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* count is index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* read x[0], x[1], x[2] samples */\n      x0 = *px++;\n      x1 = *px++;\n      x2 = *px++;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read y[srcBLen - 1] sample */\n        c0 = *py--;\n        /* Read y[srcBLen - 2] sample */\n        c1 = *py--;\n\n        /* Read x[3] sample */\n        x3 = *px++;\n\n        /* x[0] and x[1] are packed */\n        in1 = (q15_t)x0;\n        in2 = (q15_t)x1;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */\n        in1 = (q15_t)c0;\n        in2 = (q15_t)c1;\n\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */\n        acc0 = __SMLAD(input1, input2, acc0);\n\n        /* x[1] and x[2] are packed */\n        in1 = (q15_t)x1;\n        in2 = (q15_t)x2;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */\n        acc1 = __SMLAD(input1, input2, acc1);\n\n        /* x[2] and x[3] are packed */\n        in1 = (q15_t)x2;\n        in2 = (q15_t)x3;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */\n        acc2 = __SMLAD(input1, input2, acc2);\n\n        /* Read x[4] sample */\n        x0 = *px++;\n\n        /* x[3] and x[4] are packed */\n        in1 = (q15_t)x3;\n        in2 = (q15_t)x0;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */\n        acc3 = __SMLAD(input1, input2, acc3);\n\n        /* Read y[srcBLen - 3] sample */\n        c0 = *py--;\n        /* Read y[srcBLen - 4] sample */\n        c1 = *py--;\n\n        /* Read x[5] sample */\n        x1 = *px++;\n\n        /* x[2] and x[3] are packed */\n        in1 = (q15_t)x2;\n        in2 = (q15_t)x3;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* y[srcBLen - 3] and y[srcBLen - 4] are packed */\n        in1 = (q15_t)c0;\n        in2 = (q15_t)c1;\n\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */\n        acc0 = __SMLAD(input1, input2, acc0);\n\n        /* x[3] and x[4] are packed */\n        in1 = (q15_t)x3;\n        in2 = (q15_t)x0;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */\n        acc1 = __SMLAD(input1, input2, acc1);\n\n        /* x[4] and x[5] are packed */\n        in1 = (q15_t)x0;\n        in2 = (q15_t)x1;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */\n        acc2 = __SMLAD(input1, input2, acc2);\n\n        /* Read x[6] sample */\n        x2 = *px++;\n\n        /* x[5] and x[6] are packed */\n        in1 = (q15_t)x1;\n        in2 = (q15_t)x2;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */\n        acc3 = __SMLAD(input1, input2, acc3);\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Read y[srcBLen - 5] sample */\n        c0 = *py--;\n        /* Read x[7] sample */\n        x3 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[4] * y[srcBLen - 5] */\n        acc0 += ((q15_t)x0 * c0);\n        /* acc1 +=  x[5] * y[srcBLen - 5] */\n        acc1 += ((q15_t)x1 * c0);\n        /* acc2 +=  x[6] * y[srcBLen - 5] */\n        acc2 += ((q15_t)x2 * c0);\n        /* acc3 +=  x[7] * y[srcBLen - 5] */\n        acc3 += ((q15_t)x3 * c0);\n\n        /* Reuse the present samples for the next MAC */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q7_t)(__SSAT(acc0 >> 7U, 8));\n      *pOut++ = (q7_t)(__SSAT(acc1 >> 7U, 8));\n      *pOut++ = (q7_t)(__SSAT(acc2 >> 7U, 8));\n      *pOut++ = (q7_t)(__SSAT(acc3 >> 7U, 8));\n\n      /* Increment the pointer pIn1 index, count by 4 */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize2 % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = srcBLen >> 2U;\n\n      while (k > 0U) {\n\n        /* Reading two inputs of SrcA buffer and packing */\n        in1 = (q15_t)*px++;\n        in2 = (q15_t)*px++;\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* Reading two inputs of SrcB buffer and packing */\n        in1 = (q15_t)*py--;\n        in2 = (q15_t)*py--;\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* Perform the multiply-accumulate */\n        sum = __SMLAD(input1, input2, sum);\n\n        /* Reading two inputs of SrcA buffer and packing */\n        in1 = (q15_t)*px++;\n        in2 = (q15_t)*px++;\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* Reading two inputs of SrcB buffer and packing */\n        in1 = (q15_t)*py--;\n        in2 = (q15_t)*py--;\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* Perform the multiply-accumulate */\n        sum = __SMLAD(input1, input2, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = srcBLen % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += ((q15_t)*px++ * *py--);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q7_t)(__SSAT(sum >> 7U, 8));\n\n      /* Increment the pointer pIn1 index, count by 1 */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += ((q15_t)*px++ * *py--);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut++ = (q7_t)(__SSAT(sum >> 7U, 8));\n\n      /* Increment the MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pSrc2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] *\n   * y[srcBLen-2] +...+ x[srcALen-1] * y[1] sum += x[srcALen-srcBLen+2] *\n   * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] *\n   * y[2]\n   * ....\n   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]\n   * sum +=  x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The blockSize3 variable holds the number of MAC operations performed */\n\n  /* Working pointer of inputA */\n  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  pSrc2 = pIn2 + (srcBLen - 1U);\n  py = pSrc2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = blockSize3 >> 2U;\n\n    while (k > 0U) {\n      /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen +\n       * 2] of SrcA buffer and packing */\n      in1 = (q15_t)*px++;\n      in2 = (q15_t)*px++;\n      input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer\n       * and packing */\n      in1 = (q15_t)*py--;\n      in2 = (q15_t)*py--;\n      input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */\n      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */\n      sum = __SMLAD(input1, input2, sum);\n\n      /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen +\n       * 4] of SrcA buffer and packing */\n      in1 = (q15_t)*px++;\n      in2 = (q15_t)*px++;\n      input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer\n       * and packing */\n      in1 = (q15_t)*py--;\n      in2 = (q15_t)*py--;\n      input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */\n      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */\n      sum = __SMLAD(input1, input2, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = blockSize3 % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    k = blockSize3;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum +=  x[srcALen-1] * y[srcBLen-1] */\n      sum += ((q15_t)*px++ * *py--);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut++ = (q7_t)(__SSAT(sum >> 7U, 8));\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pSrc2;\n\n    /* Decrement loop counter */\n    blockSize3--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const q7_t *pIn1 = pSrcA; /* InputA pointer */\n  const q7_t *pIn2 = pSrcB; /* InputB pointer */\n  q31_t sum;                /* Accumulator */\n  uint32_t i, j;            /* Loop counters */\n\n  /* Loop to calculate convolution for output length number of times */\n  for (i = 0U; i < (srcALen + srcBLen - 1U); i++) {\n    /* Initialize sum with zero to carry out MAC operations */\n    sum = 0;\n\n    /* Loop to perform MAC operations according to convolution equation */\n    for (j = 0U; j <= i; j++) {\n      /* Check the array limitations */\n      if (((i - j) < srcBLen) && (j < srcALen)) {\n        /* z[i] += x[i-j] * y[j] */\n        sum += ((q15_t)pIn1[j] * pIn2[i - j]);\n      }\n    }\n\n    /* Store the output in the destination buffer */\n    pDst[i] = (q7_t)__SSAT((sum >> 7U), 8U);\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of Conv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_f32.c\n * Description:  Correlation of floating-point sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup Corr Correlation\n\n  Correlation is a mathematical operation that is similar to convolution.\n  As with convolution, correlation uses two signals to produce a third signal.\n  The underlying algorithms in correlation and convolution are identical except\n  that one of the inputs is flipped in convolution. Correlation is commonly used\n  to measure the similarity between two signals. It has applications in pattern\n  recognition, cryptanalysis, and searching. The CMSIS library provides\n  correlation functions for Q7, Q15, Q31 and floating-point data types. Fast\n  versions of the Q15 and Q31 functions are also provided.\n\n  @par           Algorithm\n                   Let a[n] and b[n] be sequences of\n  length srcALen and srcBLen samples respectively. The\n  convolution of the two signals is denoted by 
 c[n] = a[n] * b[n]\n  
\n                   In correlation, one of the signals is flipped in time\n  
\n       c[n] = a[n] * b[-n]\n  
\n  @par\n                   and this is mathematically defined as\n                   \\image html CorrelateEquation.gif\n  @par\n                   The pSrcA points to the first input vector of\n  length srcALen and pSrcB points to the second input\n  vector of length srcBLen. The result c[n] is of\n  length 2 * max(srcALen, srcBLen) - 1 and is defined over the\n  interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2). The\n  output result is written to pDst and the calling function must\n  allocate 2 * max(srcALen, srcBLen) - 1 words for the result.\n\n  @note\n                   The pDst should be initialized to all zeros\n  before being used.\n\n  @par           Fixed-Point Behavior\n                   Correlation requires summing up a large number of\n  intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of\n  overflow and saturation. Refer to the function specific documentation below\n  for further details of the particular algorithm used.\n\n  @par           Fast Versions\n                   Fast versions are supported for Q31 and Q15.  Cycles for Fast\n  versions are less compared to Q31 and Q15 of correlate and the design requires\n                   the input signals should be scaled down to avoid intermediate\n  overflows.\n\n  @par           Opt Versions\n                   Opt versions are supported for Q15 and Q7.  Design uses\n  internal scratch buffer for getting good optimisation. These versions are\n  optimised in cycles and consumes more memory (Scratch memory) compared to Q15\n  and Q7 versions of correlate\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of floating-point sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @return        none\n */\n\nvoid arm_correlate_f32(const float32_t *pSrcA, uint32_t srcALen,\n                       const float32_t *pSrcB, uint32_t srcBLen,\n                       float32_t *pDst) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const float32_t *pIn1;                       /* InputA pointer */\n  const float32_t *pIn2;                       /* InputB pointer */\n  float32_t *pOut = pDst;                      /* Output pointer */\n  const float32_t *px;                         /* Intermediate inputA pointer */\n  const float32_t *py;                         /* Intermediate inputB pointer */\n  const float32_t *pSrc1;                      /* Intermediate pointers */\n  float32_t sum;                               /* Accumulators */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n  uint32_t outBlockSize;                       /* Loop counter */\n  int32_t inc = 1; /* Destination address modifier */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t acc0, acc1, acc2, acc3; /* Accumulators */\n  float32_t x0, x1, x2, x3,\n      c0; /* Temporary variables for holding input and coefficient values */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and the destination pointer modifier, inc is set to -1 */\n  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two\n   * inputs of same length */\n  /* But to improve the performance,\n   * we assume zeroes in the output instead of zero padding either of the the\n   * inputs*/\n  /* If srcALen > srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the starting of the output\n   * buffer */\n  /* If srcALen < srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the ending of the output\n   * buffer */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (2U * srcALen) - 1U;\n\n    /* When srcALen > srcBLen, zero padding has to be done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n\n    // while (j > 0U)\n    //{\n    //  /* Zero is stored in the destination buffer */\n    //  *pOut++ = 0.0f;\n\n    //  /* Decrement the loop counter */\n    //  j--;\n    //}\n\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[srcBlen - 1]\n   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]\n   * ....\n   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc1 = pIn2 + (srcBLen - 1U);\n  py = pSrc1;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first stage starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* x[0] * y[srcBLen - 4] */\n      sum += *px++ * *py++;\n\n      /* x[1] * y[srcBLen - 3] */\n      sum += *px++ * *py++;\n\n      /* x[2] * y[srcBLen - 2] */\n      sum += *px++ * *py++;\n\n      /* x[3] * y[srcBLen - 1] */\n      sum += *px++ * *py++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize k with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* x[0] * y[srcBLen - 1] */\n      sum += *px++ * *py++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = sum;\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pSrc1 - count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]\n   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen]   * y[srcBLen-1]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* count is index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0.0f;\n      acc1 = 0.0f;\n      acc2 = 0.0f;\n      acc3 = 0.0f;\n\n      /* read x[0], x[1], x[2] samples */\n      x0 = *px++;\n      x1 = *px++;\n      x2 = *px++;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read y[0] sample */\n        c0 = *(py++);\n        /* Read x[3] sample */\n        x3 = *(px++);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[0] * y[0] */\n        acc0 += x0 * c0;\n        /* acc1 +=  x[1] * y[0] */\n        acc1 += x1 * c0;\n        /* acc2 +=  x[2] * y[0] */\n        acc2 += x2 * c0;\n        /* acc3 +=  x[3] * y[0] */\n        acc3 += x3 * c0;\n\n        /* Read y[1] sample */\n        c0 = *(py++);\n        /* Read x[4] sample */\n        x0 = *(px++);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[1] * y[1] */\n        acc0 += x1 * c0;\n        /* acc1 +=  x[2] * y[1] */\n        acc1 += x2 * c0;\n        /* acc2 +=  x[3] * y[1] */\n        acc2 += x3 * c0;\n        /* acc3 +=  x[4] * y[1] */\n        acc3 += x0 * c0;\n\n        /* Read y[2] sample */\n        c0 = *(py++);\n        /* Read x[5] sample */\n        x1 = *(px++);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[2] * y[2] */\n        acc0 += x2 * c0;\n        /* acc1 +=  x[3] * y[2] */\n        acc1 += x3 * c0;\n        /* acc2 +=  x[4] * y[2] */\n        acc2 += x0 * c0;\n        /* acc3 +=  x[5] * y[2] */\n        acc3 += x1 * c0;\n\n        /* Read y[3] sample */\n        c0 = *(py++);\n        /* Read x[6] sample */\n        x2 = *(px++);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[3] * y[3] */\n        acc0 += x3 * c0;\n        /* acc1 +=  x[4] * y[3] */\n        acc1 += x0 * c0;\n        /* acc2 +=  x[5] * y[3] */\n        acc2 += x1 * c0;\n        /* acc3 +=  x[6] * y[3] */\n        acc3 += x2 * c0;\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Read y[4] sample */\n        c0 = *(py++);\n        /* Read x[7] sample */\n        x3 = *(px++);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[4] * y[4] */\n        acc0 += x0 * c0;\n        /* acc1 +=  x[5] * y[4] */\n        acc1 += x1 * c0;\n        /* acc2 +=  x[6] * y[4] */\n        acc2 += x2 * c0;\n        /* acc3 +=  x[7] * y[4] */\n        acc3 += x3 * c0;\n\n        /* Reuse the present samples for the next MAC */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = acc0;\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      *pOut = acc1;\n      pOut += inc;\n\n      *pOut = acc2;\n      pOut += inc;\n\n      *pOut = acc3;\n      pOut += inc;\n\n      /* Increment the pointer pIn1 index, count by 4 */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize2 % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = srcBLen >> 2U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += *px++ * *py++;\n        sum += *px++ * *py++;\n        sum += *px++ * *py++;\n        sum += *px++ * *py++;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = srcBLen % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += *px++ * *py++;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = sum;\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment the pointer pIn1 index, count by 1 */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0.0f;\n\n      /* Loop over srcBLen */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += *px++ * *py++;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = sum;\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment the pointer pIn1 index, count by 1 */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1] sum += x[srcALen-srcBLen+2] * y[0] +\n   * x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]\n   * ....\n   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]\n   * sum +=  x[srcALen-1] * y[0]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = srcBLen - 1U;\n\n  /* Working pointer of inputA */\n  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum += x[srcALen - srcBLen + 4] * y[3] */\n      sum += *px++ * *py++;\n\n      /* sum += x[srcALen - srcBLen + 3] * y[2] */\n      sum += *px++ * *py++;\n\n      /* sum += x[srcALen - srcBLen + 2] * y[1] */\n      sum += *px++ * *py++;\n\n      /* sum += x[srcALen - srcBLen + 1] * y[0] */\n      sum += *px++ * *py++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum += *px++ * *py++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = sum;\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pIn2;\n\n    /* Decrement MAC count */\n    count--;\n\n    /* Decrement the loop counter */\n    blockSize3--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const float32_t *pIn1 = pSrcA;                  /* inputA pointer */\n  const float32_t *pIn2 = pSrcB + (srcBLen - 1U); /* inputB pointer */\n  float32_t sum;                                  /* Accumulator */\n  uint32_t i = 0U, j;                             /* Loop counters */\n  uint32_t inv = 0U;                              /* Reverse order flag */\n  uint32_t tot = 0U;                              /* Length */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and a varaible, inv is set to 1 */\n  /* If lengths are not equal then zero pad has to be done to  make the two\n   * inputs of same length. But to improve the performance, we assume zeroes\n   * in the output instead of zero padding either of the the inputs*/\n  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the\n   * starting of the output buffer */\n  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the\n   * ending of the output buffer */\n  /* Once the zero padding is done the remaining of the output is calcualted\n   * using convolution but with the shorter signal time shifted. */\n\n  /* Calculate the length of the remaining sequence */\n  tot = ((srcALen + srcBLen) - 2U);\n\n  if (srcALen > srcBLen) {\n    /* Calculating the number of zeros to be padded to the output */\n    j = srcALen - srcBLen;\n\n    /* Initialise the pointer after zero padding */\n    pDst += j;\n  }\n\n  else if (srcALen < srcBLen) {\n    /* Initialization to inputB pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization to the end of inputA pointer */\n    pIn2 = pSrcA + (srcALen - 1U);\n\n    /* Initialisation of the pointer after zero padding */\n    pDst = pDst + tot;\n\n    /* Swapping the lengths */\n    j = srcALen;\n    srcALen = srcBLen;\n    srcBLen = j;\n\n    /* Setting the reverse flag */\n    inv = 1;\n  }\n\n  /* Loop to calculate convolution for output length number of times */\n  for (i = 0U; i <= tot; i++) {\n    /* Initialize sum with zero to carry out MAC operations */\n    sum = 0.0f;\n\n    /* Loop to perform MAC operations according to convolution equation */\n    for (j = 0U; j <= i; j++) {\n      /* Check the array limitations */\n      if ((((i - j) < srcBLen) && (j < srcALen))) {\n        /* z[i] += x[i-j] * y[j] */\n        sum += pIn1[j] * pIn2[-((int32_t)i - j)];\n      }\n    }\n\n    /* Store the output in the destination buffer */\n    if (inv == 1)\n      *pDst-- = sum;\n    else\n      *pDst++ = sum;\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_fast_opt_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_fast_opt_q15.c\n * Description:  Fast Q15 Correlation\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of Q15 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence.\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @param[in]     pScratch   points to scratch buffer of size max(srcALen,\n  srcBLen) + 2*min(srcALen, srcBLen) - 2.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This fast version uses a 32-bit accumulator with 2.30 format.\n                   The accumulator maintains full precision of the intermediate\n  multiplication results but provides only a single guard bit. There is no\n  saturation on intermediate additions. Thus, if the accumulator overflows it\n  wraps around and distorts the result. The input signals should be scaled down\n  to avoid intermediate overflows. Scale down one of the inputs by\n  1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen,\n  srcBLen) number of additions is carried internally. The 2.30 accumulator is\n  right shifted by 15 bits and then saturated to 1.15 format to yield the final\n  result.\n\n  @remark\n                   Refer to \\ref arm_correlate_q15() for a slower implementation\n  of this function which uses a 64-bit accumulator to avoid wrap around\n  distortion.\n */\n\nvoid arm_correlate_fast_opt_q15(const q15_t *pSrcA, uint32_t srcALen,\n                                const q15_t *pSrcB, uint32_t srcBLen,\n                                q15_t *pDst, q15_t *pScratch) {\n  const q15_t *pIn1;                /* InputA pointer */\n  const q15_t *pIn2;                /* InputB pointer */\n  q31_t acc0;                       /* Accumulators */\n  q15_t *pOut = pDst;               /* Output pointer */\n  q15_t *pScr1 = pScratch;          /* Temporary pointer for scratch */\n  const q15_t *py;                  /* Intermediate inputB pointer */\n  uint32_t j, blkCnt, outBlockSize; /* Loop counter */\n  int32_t inc = 1;                  /* Destination address modifier */\n  uint32_t tapCnt;                  /* Loop count */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc1, acc2, acc3; /* Accumulators */\n  q31_t x1, x2,\n      x3; /* Temporary variables for holding input and coefficient values */\n  q31_t y1, y2; /* State variables */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and the destination pointer modifier, inc is set to -1 */\n  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two\n   * inputs of same length */\n  /* But to improve the performance,\n   * we include zeroes in the output instead of zero padding either of the the\n   * inputs*/\n  /* If srcALen > srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the starting of the output\n   * buffer */\n  /* If srcALen < srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the ending of the output\n   * buffer */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (2U * srcALen) - 1U;\n\n    /* When srcALen > srcBLen, zero padding is done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  pScr1 = pScratch;\n\n  /* Fill (srcBLen - 1U) zeros in scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update temporary scratch pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Copy (srcALen) samples in scratch buffer */\n  arm_copy_q15(pIn1, pScr1, srcALen);\n\n  /* Update pointers */\n  pScr1 += srcALen;\n\n  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Temporary pointer for scratch2 */\n  py = pIn2;\n\n  /* Actual correlation process starts here */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (srcALen + srcBLen - 1U) >> 2;\n\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Read two samples from scratch buffer */\n    x1 = read_q15x2_ia(&pScr1);\n\n    /* Read next two samples from scratch buffer */\n    x2 = read_q15x2_ia(&pScr1);\n\n    tapCnt = (srcBLen) >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read four samples from smaller buffer */\n      y1 = read_q15x2_ia((q15_t **)&pIn2);\n      y2 = read_q15x2_ia((q15_t **)&pIn2);\n\n      /* multiply and accumlate */\n      acc0 = __SMLAD(x1, y1, acc0);\n      acc2 = __SMLAD(x2, y1, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      /* multiply and accumlate */\n      acc1 = __SMLADX(x3, y1, acc1);\n\n      /* Read next two samples from scratch buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* multiply and accumlate */\n      acc0 = __SMLAD(x2, y2, acc0);\n      acc2 = __SMLAD(x1, y2, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x1, x2, 0);\n#else\n      x3 = __PKHBT(x2, x1, 0);\n#endif\n\n      acc3 = __SMLADX(x3, y1, acc3);\n      acc1 = __SMLADX(x3, y2, acc1);\n\n      x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      acc3 = __SMLADX(x3, y2, acc3);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Update scratch pointer for remaining samples of smaller length sequence\n     */\n    pScr1 -= 4U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    tapCnt = (srcBLen)&3U;\n\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pIn2);\n      acc1 += (*pScr1++ * *pIn2);\n      acc2 += (*pScr1++ * *pIn2);\n      acc3 += (*pScr1++ * *pIn2++);\n\n      pScr1 -= 3U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* Store the results in the accumulators in the destination buffer. */\n    *pOut = (__SSAT(acc0 >> 15U, 16));\n    pOut += inc;\n    *pOut = (__SSAT(acc1 >> 15U, 16));\n    pOut += inc;\n    *pOut = (__SSAT(acc2 >> 15U, 16));\n    pOut += inc;\n    *pOut = (__SSAT(acc3 >> 15U, 16));\n    pOut += inc;\n\n    /* Initialization of inputB pointer */\n    pIn2 = py;\n\n    pScratch += 4U;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (srcALen + srcBLen - 1U) & 0x3;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (srcALen + srcBLen - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Calculate correlation for remaining samples of Bigger length sequence */\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n\n    tapCnt = (srcBLen) >> 1U;\n\n    while (tapCnt > 0U) {\n\n      /* Read next two samples from scratch buffer */\n      acc0 += (*pScr1++ * *pIn2++);\n      acc0 += (*pScr1++ * *pIn2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    tapCnt = (srcBLen)&1U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    while (tapCnt > 0U) {\n\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pIn2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* The result is in 2.30 format.  Convert to 1.15 with saturation.\n     ** Then store the output in the destination buffer. */\n    *pOut = (q15_t)(__SSAT((acc0 >> 15), 16));\n    pOut += inc;\n\n    /* Initialization of inputB pointer */\n    pIn2 = py;\n\n    pScratch += 1U;\n  }\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_fast_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_fast_q15.c\n * Description:  Fast Q15 Correlation\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of Q15 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This fast version uses a 32-bit accumulator with 2.30 format.\n                   The accumulator maintains full precision of the intermediate\n  multiplication results but provides only a single guard bit. There is no\n  saturation on intermediate additions. Thus, if the accumulator overflows it\n  wraps around and distorts the result. The input signals should be scaled down\n  to avoid intermediate overflows. Scale down one of the inputs by\n  1/min(srcALen, srcBLen) to avoid overflow since a maximum of min(srcALen,\n  srcBLen) number of additions is carried internally. The 2.30 accumulator is\n  right shifted by 15 bits and then saturated to 1.15 format to yield the final\n  result.\n\n  @remark\n                   Refer to \\ref arm_correlate_q15() for a slower implementation\n  of this function which uses a 64-bit accumulator to avoid wrap around\n  distortion.\n */\n\nvoid arm_correlate_fast_q15(const q15_t *pSrcA, uint32_t srcALen,\n                            const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst) {\n  const q15_t *pIn1;                 /* InputA pointer */\n  const q15_t *pIn2;                 /* InputB pointer */\n  q15_t *pOut = pDst;                /* Output pointer */\n  q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */\n  const q15_t *px;                   /* Intermediate inputA pointer */\n  const q15_t *py;                   /* Intermediate inputB pointer */\n  const q15_t *pSrc1;                /* Intermediate pointers */\n  q31_t x0, x1, x2, x3,\n      c0; /* Temporary variables for holding input and coefficient values */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n  uint32_t outBlockSize;\n  int32_t inc = 1; /* Destination address modifier */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and the destination pointer modifier, inc is set to -1 */\n  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two\n   * inputs of same length */\n  /* But to improve the performance,\n   * we include zeroes in the output instead of zero padding either of the the\n   * inputs*/\n  /* If srcALen > srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the starting of the output\n   * buffer */\n  /* If srcALen < srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the ending of the output\n   * buffer */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (2U * srcALen) - 1U;\n\n    /* When srcALen > srcBLen, zero padding is done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[srcBlen - 1]\n   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]\n   * ....\n   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc1 = pIn2 + (srcBLen - 1U);\n  py = pSrc1;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first loop starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */\n      sum = __SMLAD(read_q15x2_ia((q15_t **)&px), read_q15x2_ia((q15_t **)&py),\n                    sum);\n      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */\n      sum = __SMLAD(read_q15x2_ia((q15_t **)&px), read_q15x2_ia((q15_t **)&py),\n                    sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n       No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      /* x[0] * y[srcBLen - 1] */\n      sum = __SMLAD(*px++, *py++, sum);\n\n      /* Decrement the loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q15_t)(sum >> 15);\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pSrc1 - count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]\n   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* count is the index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* --------------------\n   * Stage2 process\n   * -------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n    /* Loop unroll over blockSize2, by 4 */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* read x[0], x[1] samples */\n      x0 = read_q15x2((q15_t *)px);\n      /* read x[1], x[2] samples */\n      x1 = read_q15x2((q15_t *)px + 1);\n      px += 2U;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read the first two inputB samples using SIMD:\n         * y[0] and y[1] */\n        c0 = read_q15x2_ia((q15_t **)&py);\n\n        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */\n        acc0 = __SMLAD(x0, c0, acc0);\n\n        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */\n        acc1 = __SMLAD(x1, c0, acc1);\n\n        /* Read x[2], x[3] */\n        x2 = read_q15x2((q15_t *)px);\n\n        /* Read x[3], x[4] */\n        x3 = read_q15x2((q15_t *)px + 1);\n\n        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */\n        acc2 = __SMLAD(x2, c0, acc2);\n\n        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */\n        acc3 = __SMLAD(x3, c0, acc3);\n\n        /* Read y[2] and y[3] */\n        c0 = read_q15x2_ia((q15_t **)&py);\n\n        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */\n        acc0 = __SMLAD(x2, c0, acc0);\n\n        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */\n        acc1 = __SMLAD(x3, c0, acc1);\n\n        /* Read x[4], x[5] */\n        x0 = read_q15x2((q15_t *)px + 2);\n\n        /* Read x[5], x[6] */\n        x1 = read_q15x2((q15_t *)px + 3);\n        px += 4U;\n\n        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */\n        acc2 = __SMLAD(x0, c0, acc2);\n\n        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */\n        acc3 = __SMLAD(x1, c0, acc3);\n\n      } while (--k);\n\n      /* For the next MAC operations, SIMD is not used\n       * So, the 16 bit pointer if inputB, py is updated */\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      if (k == 1U) {\n        /* Read y[4] */\n        c0 = *py;\n\n#ifdef ARM_MATH_BIG_ENDIAN\n        c0 = c0 << 16U;\n#else\n        c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n        /* Read x[7] */\n        x3 = read_q15x2((q15_t *)px);\n        px++;\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLAD(x0, c0, acc0);\n        acc1 = __SMLAD(x1, c0, acc1);\n        acc2 = __SMLADX(x1, c0, acc2);\n        acc3 = __SMLADX(x3, c0, acc3);\n      }\n\n      if (k == 2U) {\n        /* Read y[4], y[5] */\n        c0 = read_q15x2((q15_t *)py);\n\n        /* Read x[7], x[8] */\n        x3 = read_q15x2((q15_t *)px);\n\n        /* Read x[9] */\n        x2 = read_q15x2((q15_t *)px + 1);\n        px += 2U;\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLAD(x0, c0, acc0);\n        acc1 = __SMLAD(x1, c0, acc1);\n        acc2 = __SMLAD(x3, c0, acc2);\n        acc3 = __SMLAD(x2, c0, acc3);\n      }\n\n      if (k == 3U) {\n        /* Read y[4], y[5] */\n        c0 = read_q15x2_ia((q15_t **)&py);\n\n        /* Read x[7], x[8] */\n        x3 = read_q15x2((q15_t *)px);\n\n        /* Read x[9] */\n        x2 = read_q15x2((q15_t *)px + 1);\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLAD(x0, c0, acc0);\n        acc1 = __SMLAD(x1, c0, acc1);\n        acc2 = __SMLAD(x3, c0, acc2);\n        acc3 = __SMLAD(x2, c0, acc3);\n\n        c0 = (*py);\n        /* Read y[6] */\n#ifdef ARM_MATH_BIG_ENDIAN\n        c0 = c0 << 16U;\n#else\n        c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n        /* Read x[10] */\n        x3 = read_q15x2((q15_t *)px + 2);\n        px += 3U;\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLADX(x1, c0, acc0);\n        acc1 = __SMLAD(x2, c0, acc1);\n        acc2 = __SMLADX(x2, c0, acc2);\n        acc3 = __SMLADX(x3, c0, acc3);\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q15_t)(acc0 >> 15);\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      *pOut = (q15_t)(acc1 >> 15);\n      pOut += inc;\n\n      *pOut = (q15_t)(acc2 >> 15);\n      pOut += inc;\n\n      *pOut = (q15_t)(acc3 >> 15);\n      pOut += inc;\n\n      /* Increment the pointer pIn1 index, count by 4 */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* If the blockSize2 is not a multiple of 4, compute any remaining output\n     *samples here.\n     ** No loop unrolling is used. */\n    blkCnt = blockSize2 % 0x4U;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += ((q31_t)*px++ * *py++);\n        sum += ((q31_t)*px++ * *py++);\n        sum += ((q31_t)*px++ * *py++);\n        sum += ((q31_t)*px++ * *py++);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += ((q31_t)*px++ * *py++);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q15_t)(sum >> 15);\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment the pointer pIn1 index, count by 1 */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += ((q31_t)*px++ * *py++);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q15_t)(sum >> 15);\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1] sum += x[srcALen-srcBLen+2] * y[0] +\n   * x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]\n   * ....\n   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]\n   * sum +=  x[srcALen-1] * y[0]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = srcBLen - 1U;\n\n  /* Working pointer of inputA */\n  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen +\n       * 3] * y[2] */\n      sum = __SMLAD(read_q15x2_ia((q15_t **)&px), read_q15x2_ia((q15_t **)&py),\n                    sum);\n      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen +\n       * 1] * y[0] */\n      sum = __SMLAD(read_q15x2_ia((q15_t **)&px), read_q15x2_ia((q15_t **)&py),\n                    sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n     ** No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulates */\n      sum = __SMLAD(*px++, *py++, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q15_t)(sum >> 15);\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pIn2;\n\n    /* Decrement the MAC count */\n    count--;\n\n    /* Decrement the loop counter */\n    blockSize3--;\n  }\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_fast_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_fast_q31.c\n * Description:  Fast Q31 Correlation\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of Q31 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This function is optimized for speed at the expense of\n fixed-point precision and overflow protection. The result of each 1.31 x 1.31\n multiplication is truncated to 2.30 format. These intermediate results are\n accumulated in a 32-bit register in 2.30 format. Finally, the accumulator is\n saturated and converted to a 1.31 result.\n  @par\n                   The fast version has the same overflow behavior as the\n standard version but provides less precision since it discards the low 32 bits\n of each multiplication result. In order to avoid overflows completely the input\n signals must be scaled down. The input signals should be scaled down to avoid\n intermediate overflows. Scale down one of the inputs by 1/min(srcALen,\n srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of\n additions is carried internally.\n\n @remark\n                   Refer to \\ref arm_correlate_q31() for a slower implementation\n of this function which uses 64-bit accumulation to provide higher precision.\n */\n\nvoid arm_correlate_fast_q31(const q31_t *pSrcA, uint32_t srcALen,\n                            const q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst) {\n  const q31_t *pIn1;                 /* InputA pointer */\n  const q31_t *pIn2;                 /* InputB pointer */\n  q31_t *pOut = pDst;                /* Output pointer */\n  const q31_t *px;                   /* Intermediate inputA pointer */\n  const q31_t *py;                   /* Intermediate inputB pointer */\n  const q31_t *pSrc1;                /* Intermediate pointers */\n  q31_t sum, acc0, acc1, acc2, acc3; /* Accumulators */\n  q31_t x0, x1, x2, x3,\n      c0; /* Temporary variables for holding input and coefficient values */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n  uint32_t outBlockSize;\n  int32_t inc = 1; /* Destination address modifier */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (2U * srcALen) - 1U;\n\n    /* When srcALen > srcBLen, zero padding is done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[srcBlen - 1]\n   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]\n   * ....\n   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc1 = pIn2 + (srcBLen - 1U);\n  py = pSrc1;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first stage starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* x[0] * y[srcBLen - 4] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* x[1] * y[srcBLen - 3] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* x[2] * y[srcBLen - 2] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* x[3] * y[srcBLen - 1] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n     ** No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* x[0] * y[srcBLen - 1] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = sum << 1;\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pSrc1 - count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]\n   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* count is index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n    /* Loop unroll over blockSize2, by 4 */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* read x[0], x[1], x[2] samples */\n      x0 = *px++;\n      x1 = *px++;\n      x2 = *px++;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read y[0] sample */\n        c0 = *py++;\n        /* Read x[3] sample */\n        x3 = *px++;\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[0] * y[0] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n        /* acc1 +=  x[1] * y[0] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n        /* acc2 +=  x[2] * y[0] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n        /* acc3 +=  x[3] * y[0] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n        /* Read y[1] sample */\n        c0 = *py++;\n        /* Read x[4] sample */\n        x0 = *px++;\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[1] * y[1] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x1 * c0)) >> 32);\n        /* acc1 +=  x[2] * y[1] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x2 * c0)) >> 32);\n        /* acc2 +=  x[3] * y[1] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x3 * c0)) >> 32);\n        /* acc3 +=  x[4] * y[1] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x0 * c0)) >> 32);\n\n        /* Read y[2] sample */\n        c0 = *py++;\n        /* Read x[5] sample */\n        x1 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[2] * y[2] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x2 * c0)) >> 32);\n        /* acc1 +=  x[3] * y[2] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x3 * c0)) >> 32);\n        /* acc2 +=  x[4] * y[2] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x0 * c0)) >> 32);\n        /* acc3 +=  x[5] * y[2] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x1 * c0)) >> 32);\n\n        /* Read y[3] sample */\n        c0 = *py++;\n        /* Read x[6] sample */\n        x2 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[3] * y[3] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x3 * c0)) >> 32);\n        /* acc1 +=  x[4] * y[3] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x0 * c0)) >> 32);\n        /* acc2 +=  x[5] * y[3] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x1 * c0)) >> 32);\n        /* acc3 +=  x[6] * y[3] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x2 * c0)) >> 32);\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Read y[4] sample */\n        c0 = *py++;\n        /* Read x[7] sample */\n        x3 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[4] * y[4] */\n        acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n        /* acc1 +=  x[5] * y[4] */\n        acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n        /* acc2 +=  x[6] * y[4] */\n        acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n        /* acc3 +=  x[7] * y[4] */\n        acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n        /* Reuse the present samples for the next MAC */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q31_t)(acc0 << 1);\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      *pOut = (q31_t)(acc1 << 1);\n      pOut += inc;\n\n      *pOut = (q31_t)(acc2 << 1);\n      pOut += inc;\n\n      *pOut = (q31_t)(acc3 << 1);\n      pOut += inc;\n\n      /* Increment the pointer pIn1 index, count by 4 */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* If the blockSize2 is not a multiple of 4, compute any remaining output\n     *samples here.\n     ** No loop unrolling is used. */\n    blkCnt = blockSize2 % 0x4U;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = sum << 1;\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = sum << 1;\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1] sum += x[srcALen-srcBLen+2] * y[0] +\n   * x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]\n   * ....\n   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]\n   * sum +=  x[srcALen-1] * y[0]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = srcBLen - 1U;\n\n  /* Working pointer of inputA */\n  pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1U;\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum += x[srcALen - srcBLen + 4] * y[3] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* sum += x[srcALen - srcBLen + 3] * y[2] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* sum += x[srcALen - srcBLen + 2] * y[1] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* sum += x[srcALen - srcBLen + 1] * y[0] */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n     ** No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum = (q31_t)((((q63_t)sum << 32) + ((q63_t)*px++ * (*py++))) >> 32);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = sum << 1;\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pIn2;\n\n    /* Decrement MAC count */\n    count--;\n\n    /* Decrement loop counter */\n    blockSize3--;\n  }\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_opt_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_opt_q15.c\n * Description:  Correlation of Q15 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of Q15 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @param[in]     pScratch   points to scratch buffer of size max(srcALen,\n srcBLen) + 2*min(srcALen, srcBLen) - 2.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30\n result. The 2.30 intermediate results are accumulated in a 64-bit accumulator\n in 34.30 format. This approach provides 33 guard bits and there is no risk of\n overflow. The 34.30 result is then truncated to 34.15 format by discarding the\n low 15 bits and then saturated to 1.15 format.\n\n @remark\n                   Refer to \\ref arm_correlate_fast_q15() for a faster but less\n precise version of this function.\n */\n\nvoid arm_correlate_opt_q15(const q15_t *pSrcA, uint32_t srcALen,\n                           const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst,\n                           q15_t *pScratch) {\n  q63_t acc0;                       /* Accumulators */\n  q15_t *pOut = pDst;               /* Output pointer */\n  q15_t *pScr1;                     /* Temporary pointer for scratch1 */\n  const q15_t *pIn1;                /* InputA pointer */\n  const q15_t *pIn2;                /* InputB pointer */\n  const q15_t *py;                  /* Intermediate inputB pointer */\n  uint32_t j, blkCnt, outBlockSize; /* Loop counter */\n  int32_t inc = 1;                  /* Output pointer increment */\n  uint32_t tapCnt;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc1, acc2, acc3; /* Accumulators */\n  q31_t x1, x2,\n      x3;       /* Temporary variables for holding input1 and input2 values */\n  q31_t y1, y2; /* State variables */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and the destination pointer modifier, inc is set to -1 */\n  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two\n   * inputs of same length */\n  /* But to improve the performance,\n   * we include zeroes in the output instead of zero padding either of the the\n   * inputs*/\n  /* If srcALen > srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the starting of the output\n   * buffer */\n  /* If srcALen < srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the ending of the output\n   * buffer */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (srcALen * 2U) - 1U;\n\n    /* When srcALen > srcBLen, zero padding is done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  pScr1 = pScratch;\n\n  /* Fill (srcBLen - 1U) zeros in scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update temporary scratch pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Copy (srcALen) samples in scratch buffer */\n  arm_copy_q15(pIn1, pScr1, srcALen);\n\n  /* Update pointers */\n  pScr1 += srcALen;\n\n  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Temporary pointer for scratch2 */\n  py = pIn2;\n\n  /* Actual correlation process starts here */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (srcALen + srcBLen - 1U) >> 2;\n\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Read two samples from scratch1 buffer */\n    x1 = read_q15x2_ia(&pScr1);\n\n    /* Read next two samples from scratch1 buffer */\n    x2 = read_q15x2_ia(&pScr1);\n\n    tapCnt = (srcBLen) >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read four samples from smaller buffer */\n      y1 = read_q15x2_ia((q15_t **)&pIn2);\n      y2 = read_q15x2_ia((q15_t **)&pIn2);\n\n      /* multiply and accumlate */\n      acc0 = __SMLALD(x1, y1, acc0);\n      acc2 = __SMLALD(x2, y1, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      /* multiply and accumlate */\n      acc1 = __SMLALDX(x3, y1, acc1);\n\n      /* Read next two samples from scratch1 buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* multiply and accumlate */\n      acc0 = __SMLALD(x2, y2, acc0);\n      acc2 = __SMLALD(x1, y2, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x1, x2, 0);\n#else\n      x3 = __PKHBT(x2, x1, 0);\n#endif\n\n      acc3 = __SMLALDX(x3, y1, acc3);\n      acc1 = __SMLALDX(x3, y2, acc1);\n\n      x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      acc3 = __SMLALDX(x3, y2, acc3);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Update scratch pointer for remaining samples of smaller length sequence\n     */\n    pScr1 -= 4U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    tapCnt = (srcBLen)&3U;\n\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pIn2);\n      acc1 += (*pScr1++ * *pIn2);\n      acc2 += (*pScr1++ * *pIn2);\n      acc3 += (*pScr1++ * *pIn2++);\n\n      pScr1 -= 3U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* Store the results in the accumulators in the destination buffer. */\n    *pOut = (__SSAT(acc0 >> 15U, 16));\n    pOut += inc;\n    *pOut = (__SSAT(acc1 >> 15U, 16));\n    pOut += inc;\n    *pOut = (__SSAT(acc2 >> 15U, 16));\n    pOut += inc;\n    *pOut = (__SSAT(acc3 >> 15U, 16));\n    pOut += inc;\n\n    /* Initialization of inputB pointer */\n    pIn2 = py;\n\n    pScratch += 4U;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (srcALen + srcBLen - 1U) & 0x3;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (srcALen + srcBLen - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Calculate correlation for remaining samples of Bigger length sequence */\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n\n    tapCnt = (srcBLen) >> 1U;\n\n    while (tapCnt > 0U) {\n\n      /* Read next two samples from scratch1 buffer */\n      acc0 += (*pScr1++ * *pIn2++);\n      acc0 += (*pScr1++ * *pIn2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    tapCnt = (srcBLen)&1U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pIn2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* The result is in 2.30 format.  Convert to 1.15 with saturation.\n       Then store the output in the destination buffer. */\n    *pOut = (q15_t)(__SSAT((acc0 >> 15), 16));\n    pOut += inc;\n\n    /* Initialization of inputB pointer */\n    pIn2 = py;\n\n    pScratch += 1U;\n  }\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_opt_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_opt_q7.c\n * Description:  Correlation of Q7 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of Q7 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size\n  max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size\n  min(srcALen, srcBLen).\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n  accumulator. Both the inputs are represented in 1.7 format and multiplications\n  yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit\n  accumulator in 18.14 format. This approach provides 17 guard bits and there is\n  no risk of overflow as long as max(srcALen, srcBLen)<131072.\n                   The 18.14 result is then truncated to 18.7 format by\n  discarding the low 7 bits and then saturated to 1.7 format.\n */\n\nvoid arm_correlate_opt_q7(const q7_t *pSrcA, uint32_t srcALen,\n                          const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst,\n                          q15_t *pScratch1, q15_t *pScratch2) {\n  q15_t *pScr1 = pScratch1;      /* Temporary pointer for scratch */\n  q15_t *pScr2 = pScratch2;      /* Temporary pointer for scratch */\n  q15_t x4;                      /* Temporary input variable */\n  q15_t *py;                     /* Temporary input2 pointer */\n  q31_t acc0, acc1, acc2, acc3;  /* Accumulators */\n  const q7_t *pIn1, *pIn2;       /* InputA and inputB pointer */\n  uint32_t j, k, blkCnt, tapCnt; /* Loop counter */\n  int32_t inc = 1;               /* Output pointer increment */\n  uint32_t outBlockSize;         /* Loop counter */\n  q31_t x1, x2, x3, y1;          /* Temporary input variables */\n  q7_t *pOut = pDst;             /* Output pointer */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and the destination pointer modifier, inc is set to -1 */\n  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two\n   * inputs of same length */\n  /* But to improve the performance,\n   * we include zeroes in the output instead of zero padding either of the the\n   * inputs*/\n  /* If srcALen > srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the starting of the output\n   * buffer */\n  /* If srcALen < srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the ending of the output\n   * buffer */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (srcALen * 2U) - 1U;\n\n    /* When srcALen > srcBLen, zero padding is done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  /* Copy (srcBLen) samples in scratch buffer */\n  k = srcBLen >> 2U;\n\n  /* First part of the processing with loop unrolling copies 4 data points at a\n     time. a second loop below copies for the remaining 1 to 3 samples. */\n  while (k > 0U) {\n    /* copy second buffer in reversal manner */\n    x4 = (q15_t)*pIn2++;\n    *pScr2++ = x4;\n    x4 = (q15_t)*pIn2++;\n    *pScr2++ = x4;\n    x4 = (q15_t)*pIn2++;\n    *pScr2++ = x4;\n    x4 = (q15_t)*pIn2++;\n    *pScr2++ = x4;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* If the count is not a multiple of 4, copy remaining samples here.\n     No loop unrolling is used. */\n  k = srcBLen % 0x4U;\n\n  while (k > 0U) {\n    /* copy second buffer in reversal manner for remaining samples */\n    x4 = (q15_t)*pIn2++;\n    *pScr2++ = x4;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* Fill (srcBLen - 1U) zeros in scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update temporary scratch pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Copy (srcALen) samples in scratch buffer */\n  /* Apply loop unrolling and do 4 Copies simultaneously. */\n  k = srcALen >> 2U;\n\n  /* First part of the processing with loop unrolling copies 4 data points at a\n     time. a second loop below copies for the remaining 1 to 3 samples. */\n  while (k > 0U) {\n    /* copy second buffer in reversal manner */\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n\n    /* Decrement loop counter */\n    k--;\n  }\n\n  /* If the count is not a multiple of 4, copy remaining samples here.\n     No loop unrolling is used. */\n  k = srcALen % 0x4U;\n\n  while (k > 0U) {\n    /* copy second buffer in reversal manner for remaining samples */\n    x4 = (q15_t)*pIn1++;\n    *pScr1++ = x4;\n\n    /* Decrement the loop counter */\n    k--;\n  }\n\n  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */\n  arm_fill_q15(0, pScr1, (srcBLen - 1U));\n\n  /* Update pointer */\n  pScr1 += (srcBLen - 1U);\n\n  /* Temporary pointer for scratch2 */\n  py = pScratch2;\n\n  /* Initialization of pScr2 pointer */\n  pScr2 = pScratch2;\n\n  /* Actual correlation process starts here */\n  blkCnt = (srcALen + srcBLen - 1U) >> 2;\n\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch1;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Read two samples from scratch1 buffer */\n    x1 = read_q15x2_ia(&pScr1);\n\n    /* Read next two samples from scratch1 buffer */\n    x2 = read_q15x2_ia(&pScr1);\n\n    tapCnt = (srcBLen) >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read four samples from smaller buffer */\n      y1 = read_q15x2_ia(&pScr2);\n\n      /* multiply and accumlate */\n      acc0 = __SMLAD(x1, y1, acc0);\n      acc2 = __SMLAD(x2, y1, acc2);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      /* multiply and accumlate */\n      acc1 = __SMLADX(x3, y1, acc1);\n\n      /* Read next two samples from scratch1 buffer */\n      x1 = read_q15x2_ia(&pScr1);\n\n      /* pack input data */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x1, x2, 0);\n#else\n      x3 = __PKHBT(x2, x1, 0);\n#endif\n\n      acc3 = __SMLADX(x3, y1, acc3);\n\n      /* Read four samples from smaller buffer */\n      y1 = read_q15x2_ia(&pScr2);\n\n      acc0 = __SMLAD(x2, y1, acc0);\n\n      acc2 = __SMLAD(x1, y1, acc2);\n\n      acc1 = __SMLADX(x3, y1, acc1);\n\n      x2 = read_q15x2_ia(&pScr1);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      x3 = __PKHBT(x2, x1, 0);\n#else\n      x3 = __PKHBT(x1, x2, 0);\n#endif\n\n      acc3 = __SMLADX(x3, y1, acc3);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Update scratch pointer for remaining samples of smaller length sequence\n     */\n    pScr1 -= 4U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    tapCnt = (srcBLen)&3U;\n\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pScr2);\n      acc1 += (*pScr1++ * *pScr2);\n      acc2 += (*pScr1++ * *pScr2);\n      acc3 += (*pScr1++ * *pScr2++);\n\n      pScr1 -= 3U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q7_t)(__SSAT(acc0 >> 7U, 8));\n    pOut += inc;\n    *pOut = (q7_t)(__SSAT(acc1 >> 7U, 8));\n    pOut += inc;\n    *pOut = (q7_t)(__SSAT(acc2 >> 7U, 8));\n    pOut += inc;\n    *pOut = (q7_t)(__SSAT(acc3 >> 7U, 8));\n    pOut += inc;\n\n    /* Initialization of inputB pointer */\n    pScr2 = py;\n\n    pScratch1 += 4U;\n  }\n\n  blkCnt = (srcALen + srcBLen - 1U) & 0x3;\n\n  /* Calculate correlation for remaining samples of Bigger length sequence */\n  while (blkCnt > 0) {\n    /* Initialze temporary scratch pointer as scratch1 */\n    pScr1 = pScratch1;\n\n    /* Clear Accumlators */\n    acc0 = 0;\n\n    tapCnt = (srcBLen) >> 1U;\n\n    while (tapCnt > 0U) {\n      acc0 += (*pScr1++ * *pScr2++);\n      acc0 += (*pScr1++ * *pScr2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    tapCnt = (srcBLen)&1U;\n\n    /* apply same above for remaining samples of smaller length sequence */\n    while (tapCnt > 0U) {\n      /* accumlate the results */\n      acc0 += (*pScr1++ * *pScr2++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    blkCnt--;\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q7_t)(__SSAT(acc0 >> 7U, 8));\n    pOut += inc;\n\n    /* Initialization of inputB pointer */\n    pScr2 = py;\n\n    pScratch1 += 1U;\n  }\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_q15.c\n * Description:  Correlation of Q15 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of Q15 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30\n  result. The 2.30 intermediate results are accumulated in a 64-bit accumulator\n  in 34.30 format. This approach provides 33 guard bits and there is no risk of\n  overflow. The 34.30 result is then truncated to 34.15 format by discarding the\n  low 15 bits and then saturated to 1.15 format.\n\n  @remark\n                   Refer to \\ref arm_correlate_fast_q15() for a faster but less\n  precise version of this function.\n  @remark\n                   Refer to \\ref arm_correlate_opt_q15() for a faster\n  implementation of this function using scratch buffers.\n */\n\nvoid arm_correlate_q15(const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB,\n                       uint32_t srcBLen, q15_t *pDst) {\n\n#if defined(ARM_MATH_DSP)\n\n  const q15_t *pIn1;                 /* InputA pointer */\n  const q15_t *pIn2;                 /* InputB pointer */\n  q15_t *pOut = pDst;                /* Output pointer */\n  q63_t sum, acc0, acc1, acc2, acc3; /* Accumulators */\n  const q15_t *px;                   /* Intermediate inputA pointer */\n  const q15_t *py;                   /* Intermediate inputB pointer */\n  const q15_t *pSrc1;                /* Intermediate pointers */\n  q31_t x0, x1, x2, x3, c0; /* Temporary input variables for holding input and\n                               coefficient values */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n  uint32_t outBlockSize;\n  int32_t inc = 1; /* Destination address modifier */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and the destination pointer modifier, inc is set to -1 */\n  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two\n   * inputs of same length */\n  /* But to improve the performance,\n   * we include zeroes in the output instead of zero padding either of the the\n   * inputs*/\n  /* If srcALen > srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the starting of the output\n   * buffer */\n  /* If srcALen < srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the ending of the output\n   * buffer */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (srcALen * 2U) - 1U;\n\n    /* When srcALen > srcBLen, zero padding is done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[srcBlen - 1]\n   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]\n   * ....\n   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc1 = pIn2 + (srcBLen - 1U);\n  py = pSrc1;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first loop starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */\n      sum = __SMLALD(read_q15x2_ia((q15_t **)&px), read_q15x2_ia((q15_t **)&py),\n                     sum);\n      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */\n      sum = __SMLALD(read_q15x2_ia((q15_t **)&px), read_q15x2_ia((q15_t **)&py),\n                     sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n     ** No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* x[0] * y[srcBLen - 1] */\n      sum = __SMLALD(*px++, *py++, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q15_t)(__SSAT((sum >> 15), 16));\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pSrc1 - count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]\n   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* count is the index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* read x[0], x[1] samples */\n      x0 = read_q15x2((q15_t *)px);\n\n      /* read x[1], x[2] samples */\n      x1 = read_q15x2((q15_t *)px + 1);\n      px += 2U;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read the first two inputB samples using SIMD:\n         * y[0] and y[1] */\n        c0 = read_q15x2_ia((q15_t **)&py);\n\n        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */\n        acc0 = __SMLALD(x0, c0, acc0);\n\n        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */\n        acc1 = __SMLALD(x1, c0, acc1);\n\n        /* Read x[2], x[3] */\n        x2 = read_q15x2((q15_t *)px);\n\n        /* Read x[3], x[4] */\n        x3 = read_q15x2((q15_t *)px + 1);\n\n        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */\n        acc2 = __SMLALD(x2, c0, acc2);\n\n        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */\n        acc3 = __SMLALD(x3, c0, acc3);\n\n        /* Read y[2] and y[3] */\n        c0 = read_q15x2_ia((q15_t **)&py);\n\n        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */\n        acc0 = __SMLALD(x2, c0, acc0);\n\n        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */\n        acc1 = __SMLALD(x3, c0, acc1);\n\n        /* Read x[4], x[5] */\n        x0 = read_q15x2((q15_t *)px + 2);\n\n        /* Read x[5], x[6] */\n        x1 = read_q15x2((q15_t *)px + 3);\n        px += 4U;\n\n        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */\n        acc2 = __SMLALD(x0, c0, acc2);\n\n        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */\n        acc3 = __SMLALD(x1, c0, acc3);\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      if (k == 1U) {\n        /* Read y[4] */\n        c0 = *py;\n#ifdef ARM_MATH_BIG_ENDIAN\n        c0 = c0 << 16U;\n#else\n        c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n        /* Read x[7] */\n        x3 = read_q15x2((q15_t *)px);\n        px++;\n\n        /* Perform the multiply-accumulate */\n        acc0 = __SMLALD(x0, c0, acc0);\n        acc1 = __SMLALD(x1, c0, acc1);\n        acc2 = __SMLALDX(x1, c0, acc2);\n        acc3 = __SMLALDX(x3, c0, acc3);\n      }\n\n      if (k == 2U) {\n        /* Read y[4], y[5] */\n        c0 = read_q15x2((q15_t *)py);\n\n        /* Read x[7], x[8] */\n        x3 = read_q15x2((q15_t *)px);\n\n        /* Read x[9] */\n        x2 = read_q15x2((q15_t *)px + 1);\n        px += 2U;\n\n        /* Perform the multiply-accumulate */\n        acc0 = __SMLALD(x0, c0, acc0);\n        acc1 = __SMLALD(x1, c0, acc1);\n        acc2 = __SMLALD(x3, c0, acc2);\n        acc3 = __SMLALD(x2, c0, acc3);\n      }\n\n      if (k == 3U) {\n        /* Read y[4], y[5] */\n        c0 = read_q15x2_ia((q15_t **)&py);\n\n        /* Read x[7], x[8] */\n        x3 = read_q15x2((q15_t *)px);\n\n        /* Read x[9] */\n        x2 = read_q15x2((q15_t *)px + 1);\n\n        /* Perform the multiply-accumulate */\n        acc0 = __SMLALD(x0, c0, acc0);\n        acc1 = __SMLALD(x1, c0, acc1);\n        acc2 = __SMLALD(x3, c0, acc2);\n        acc3 = __SMLALD(x2, c0, acc3);\n\n        c0 = (*py);\n\n        /* Read y[6] */\n#ifdef ARM_MATH_BIG_ENDIAN\n        c0 = c0 << 16U;\n#else\n        c0 = c0 & 0x0000FFFF;\n#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */\n\n        /* Read x[10] */\n        x3 = read_q15x2((q15_t *)px + 2);\n        px += 3U;\n\n        /* Perform the multiply-accumulates */\n        acc0 = __SMLALDX(x1, c0, acc0);\n        acc1 = __SMLALD(x2, c0, acc1);\n        acc2 = __SMLALDX(x2, c0, acc2);\n        acc3 = __SMLALDX(x3, c0, acc3);\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q15_t)(__SSAT(acc0 >> 15, 16));\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      *pOut = (q15_t)(__SSAT(acc1 >> 15, 16));\n      pOut += inc;\n\n      *pOut = (q15_t)(__SSAT(acc2 >> 15, 16));\n      pOut += inc;\n\n      *pOut = (q15_t)(__SSAT(acc3 >> 15, 16));\n      pOut += inc;\n\n      /* Increment the count by 4 as 4 output values are computed */\n      count += 4U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* If the blockSize2 is not a multiple of 4, compute any remaining output\n     *samples here.\n     ** No loop unrolling is used. */\n    blkCnt = blockSize2 % 0x4U;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += ((q63_t)*px++ * *py++);\n        sum += ((q63_t)*px++ * *py++);\n        sum += ((q63_t)*px++ * *py++);\n        sum += ((q63_t)*px++ * *py++);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += ((q63_t)*px++ * *py++);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q15_t)(__SSAT(sum >> 15, 16));\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment count by 1, as one output value is computed */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += ((q63_t)*px++ * *py++);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q15_t)(__SSAT(sum >> 15, 16));\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment the MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1] sum += x[srcALen-srcBLen+2] * y[0] +\n   * x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]\n   * ....\n   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]\n   * sum +=  x[srcALen-1] * y[0]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = srcBLen - 1U;\n\n  /* Working pointer of inputA */\n  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n    /* Apply loop unrolling and compute 4 MACs simultaneously. */\n    k = count >> 2U;\n\n    /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n     *time.\n     ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen +\n       * 3] * y[2] */\n      sum = __SMLALD(read_q15x2_ia((q15_t **)&px), read_q15x2_ia((q15_t **)&py),\n                     sum);\n      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen +\n       * 1] * y[0] */\n      sum = __SMLALD(read_q15x2_ia((q15_t **)&px), read_q15x2_ia((q15_t **)&py),\n                     sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* If the count is not a multiple of 4, compute any remaining MACs here.\n     ** No loop unrolling is used. */\n    k = count % 0x4U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum = __SMLALD(*px++, *py++, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q15_t)(__SSAT((sum >> 15), 16));\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pIn2;\n\n    /* Decrement MAC count */\n    count--;\n\n    /* Decrement loop counter */\n    blockSize3--;\n  }\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  const q15_t *pIn1 = pSrcA;                  /* InputA pointer */\n  const q15_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */\n  q63_t sum;                                  /* Accumulators */\n  uint32_t i = 0U, j;                         /* Loop counters */\n  uint32_t inv = 0U;                          /* Reverse order flag */\n  uint32_t tot = 0U;                          /* Length */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and a varaible, inv is set to 1 */\n  /* If lengths are not equal then zero pad has to be done to  make the two\n   * inputs of same length. But to improve the performance, we include zeroes\n   * in the output instead of zero padding either of the the inputs*/\n  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the\n   * starting of the output buffer */\n  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the\n   * ending of the output buffer */\n  /* Once the zero padding is done the remaining of the output is calcualted\n   * using convolution but with the shorter signal time shifted. */\n\n  /* Calculate the length of the remaining sequence */\n  tot = ((srcALen + srcBLen) - 2U);\n\n  if (srcALen > srcBLen) {\n    /* Calculating the number of zeros to be padded to the output */\n    j = srcALen - srcBLen;\n\n    /* Initialise the pointer after zero padding */\n    pDst += j;\n  }\n\n  else if (srcALen < srcBLen) {\n    /* Initialization to inputB pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization to the end of inputA pointer */\n    pIn2 = pSrcA + (srcALen - 1U);\n\n    /* Initialisation of the pointer after zero padding */\n    pDst = pDst + tot;\n\n    /* Swapping the lengths */\n    j = srcALen;\n    srcALen = srcBLen;\n    srcBLen = j;\n\n    /* Setting the reverse flag */\n    inv = 1;\n  }\n\n  /* Loop to calculate convolution for output length number of values */\n  for (i = 0U; i <= tot; i++) {\n    /* Initialize sum with zero to carry on MAC operations */\n    sum = 0;\n\n    /* Loop to perform MAC operations according to convolution equation */\n    for (j = 0U; j <= i; j++) {\n      /* Check the array limitations */\n      if (((i - j) < srcBLen) && (j < srcALen)) {\n        /* z[i] += x[i-j] * y[j] */\n        sum += ((q31_t)pIn1[j] * pIn2[-((int32_t)i - j)]);\n      }\n    }\n\n    /* Store the output in the destination buffer */\n    if (inv == 1)\n      *pDst-- = (q15_t)__SSAT((sum >> 15U), 16U);\n    else\n      *pDst++ = (q15_t)__SSAT((sum >> 15U), 16U);\n  }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_q31.c\n * Description:  Correlation of Q31 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of Q31 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n  written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The accumulator has a 2.62 format and maintains full precision of\n  the intermediate multiplication results but provides only a single guard bit.\n                   There is no saturation on intermediate additions.\n                   Thus, if the accumulator overflows it wraps around and\n  distorts the result. The input signals should be scaled down to avoid\n  intermediate overflows. Scale down one of the inputs by 1/min(srcALen,\n  srcBLen)to avoid overflows since a maximum of min(srcALen, srcBLen) number of\n  additions is carried internally. The 2.62 accumulator is right shifted by 31\n  bits and saturated to 1.31 format to yield the final result.\n\n  @remark\n                   Refer to \\ref arm_correlate_fast_q31() for a faster but less\n  precise implementation of this function.\n */\n\nvoid arm_correlate_q31(const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB,\n                       uint32_t srcBLen, q31_t *pDst) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const q31_t *pIn1;                           /* InputA pointer */\n  const q31_t *pIn2;                           /* InputB pointer */\n  q31_t *pOut = pDst;                          /* Output pointer */\n  const q31_t *px;                             /* Intermediate inputA pointer */\n  const q31_t *py;                             /* Intermediate inputB pointer */\n  const q31_t *pSrc1;                          /* Intermediate pointers */\n  q63_t sum;                                   /* Accumulators */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n  uint32_t outBlockSize;\n  int32_t inc = 1; /* Destination address modifier */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc0, acc1, acc2; /* Accumulators */\n  q31_t x0, x1, x2,\n      c0; /* Temporary variables for holding input and coefficient values */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and the destination pointer modifier, inc is set to -1 */\n  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two\n   * inputs of same length */\n  /* But to improve the performance,\n   * we include zeroes in the output instead of zero padding either of the the\n   * inputs*/\n  /* If srcALen > srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the starting of the output\n   * buffer */\n  /* If srcALen < srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the ending of the output\n   * buffer */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (2U * srcALen) - 1U;\n\n    /* When srcALen > srcBLen, zero padding is done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[srcBlen - 1]\n   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]\n   * ....\n   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc1 = pIn2 + (srcBLen - 1U);\n  py = pSrc1;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first stage starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* x[0] * y[srcBLen - 4] */\n      sum += (q63_t)*px++ * (*py++);\n\n      /* x[1] * y[srcBLen - 3] */\n      sum += (q63_t)*px++ * (*py++);\n\n      /* x[2] * y[srcBLen - 2] */\n      sum += (q63_t)*px++ * (*py++);\n\n      /* x[3] * y[srcBLen - 1] */\n      sum += (q63_t)*px++ * (*py++);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize k with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* x[0] * y[srcBLen - 1] */\n      sum += (q63_t)*px++ * (*py++);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q31_t)(sum >> 31);\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pSrc1 - count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]\n   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* count is index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unroll by 3 */\n    blkCnt = blockSize2 / 3;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n\n      /* read x[0], x[1] samples */\n      x0 = *px++;\n      x1 = *px++;\n\n      /* Apply loop unrolling and compute 3 MACs simultaneously. */\n      k = srcBLen / 3;\n\n      /* First part of the processing with loop unrolling.  Compute 3 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 2 samples. */\n      do {\n        /* Read y[0] sample */\n        c0 = *(py);\n        /* Read x[2] sample */\n        x2 = *(px);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[0] * y[0] */\n        acc0 += ((q63_t)x0 * c0);\n        /* acc1 +=  x[1] * y[0] */\n        acc1 += ((q63_t)x1 * c0);\n        /* acc2 +=  x[2] * y[0] */\n        acc2 += ((q63_t)x2 * c0);\n\n        /* Read y[1] sample */\n        c0 = *(py + 1U);\n        /* Read x[3] sample */\n        x0 = *(px + 1U);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[1] * y[1] */\n        acc0 += ((q63_t)x1 * c0);\n        /* acc1 +=  x[2] * y[1] */\n        acc1 += ((q63_t)x2 * c0);\n        /* acc2 +=  x[3] * y[1] */\n        acc2 += ((q63_t)x0 * c0);\n\n        /* Read y[2] sample */\n        c0 = *(py + 2U);\n        /* Read x[4] sample */\n        x1 = *(px + 2U);\n\n        /* Perform the multiply-accumulate */\n        /* acc0 +=  x[2] * y[2] */\n        acc0 += ((q63_t)x2 * c0);\n        /* acc1 +=  x[3] * y[2] */\n        acc1 += ((q63_t)x0 * c0);\n        /* acc2 +=  x[4] * y[2] */\n        acc2 += ((q63_t)x1 * c0);\n\n        /* update scratch pointers */\n        px += 3U;\n        py += 3U;\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen - (3 * (srcBLen / 3));\n\n      while (k > 0U) {\n        /* Read y[4] sample */\n        c0 = *(py++);\n\n        /* Read x[7] sample */\n        x2 = *(px++);\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[4] * y[4] */\n        acc0 += ((q63_t)x0 * c0);\n        /* acc1 +=  x[5] * y[4] */\n        acc1 += ((q63_t)x1 * c0);\n        /* acc2 +=  x[6] * y[4] */\n        acc2 += ((q63_t)x2 * c0);\n\n        /* Reuse the present samples for the next MAC */\n        x0 = x1;\n        x1 = x2;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q31_t)(acc0 >> 31);\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      *pOut = (q31_t)(acc1 >> 31);\n      pOut += inc;\n\n      *pOut = (q31_t)(acc2 >> 31);\n      pOut += inc;\n\n      /* Increment the pointer pIn1 index, count by 3 */\n      count += 3U;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize2 - 3 * (blockSize2 / 3);\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = srcBLen >> 2U;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulates */\n        sum += (q63_t)*px++ * *py++;\n        sum += (q63_t)*px++ * *py++;\n        sum += (q63_t)*px++ * *py++;\n        sum += (q63_t)*px++ * *py++;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = srcBLen % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += (q63_t)*px++ * *py++;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q31_t)(sum >> 31);\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += (q63_t)*px++ * *py++;\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q31_t)(sum >> 31);\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1] sum += x[srcALen-srcBLen+2] * y[0] +\n   * x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]\n   * ....\n   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]\n   * sum +=  x[srcALen-1] * y[0]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = srcBLen - 1U;\n\n  /* Working pointer of inputA */\n  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* sum += x[srcALen - srcBLen + 4] * y[3] */\n      sum += (q63_t)*px++ * *py++;\n\n      /* sum += x[srcALen - srcBLen + 3] * y[2] */\n      sum += (q63_t)*px++ * *py++;\n\n      /* sum += x[srcALen - srcBLen + 2] * y[1] */\n      sum += (q63_t)*px++ * *py++;\n\n      /* sum += x[srcALen - srcBLen + 1] * y[0] */\n      sum += (q63_t)*px++ * *py++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum += (q63_t)*px++ * *py++;\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q31_t)(sum >> 31);\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pIn2;\n\n    /* Decrement MAC count */\n    count--;\n\n    /* Decrement loop counter */\n    blockSize3--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const q31_t *pIn1 = pSrcA;                  /* InputA pointer */\n  const q31_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */\n  q63_t sum;                                  /* Accumulators */\n  uint32_t i = 0U, j;                         /* Loop counters */\n  uint32_t inv = 0U;                          /* Reverse order flag */\n  uint32_t tot = 0U;                          /* Length */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and a varaible, inv is set to 1 */\n  /* If lengths are not equal then zero pad has to be done to  make the two\n   * inputs of same length. But to improve the performance, we include zeroes\n   * in the output instead of zero padding either of the the inputs*/\n  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the\n   * starting of the output buffer */\n  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the\n   * ending of the output buffer */\n  /* Once the zero padding is done the remaining of the output is calcualted\n   * using correlation but with the shorter signal time shifted. */\n\n  /* Calculate the length of the remaining sequence */\n  tot = ((srcALen + srcBLen) - 2U);\n\n  if (srcALen > srcBLen) {\n    /* Calculating the number of zeros to be padded to the output */\n    j = srcALen - srcBLen;\n\n    /* Initialise the pointer after zero padding */\n    pDst += j;\n  }\n\n  else if (srcALen < srcBLen) {\n    /* Initialization to inputB pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization to the end of inputA pointer */\n    pIn2 = pSrcA + (srcALen - 1U);\n\n    /* Initialisation of the pointer after zero padding */\n    pDst = pDst + tot;\n\n    /* Swapping the lengths */\n    j = srcALen;\n    srcALen = srcBLen;\n    srcBLen = j;\n\n    /* Setting the reverse flag */\n    inv = 1;\n  }\n\n  /* Loop to calculate correlation for output length number of times */\n  for (i = 0U; i <= tot; i++) {\n    /* Initialize sum with zero to carry out MAC operations */\n    sum = 0;\n\n    /* Loop to perform MAC operations according to correlation equation */\n    for (j = 0U; j <= i; j++) {\n      /* Check the array limitations */\n      if (((i - j) < srcBLen) && (j < srcALen)) {\n        /* z[i] += x[i-j] * y[j] */\n        sum += ((q63_t)pIn1[j] * pIn2[-((int32_t)i - j)]);\n      }\n    }\n\n    /* Store the output in the destination buffer */\n    if (inv == 1)\n      *pDst-- = (q31_t)(sum >> 31U);\n    else\n      *pDst++ = (q31_t)(sum >> 31U);\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_correlate_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_correlate_q7.c\n * Description:  Correlation of Q7 sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup Corr\n  @{\n */\n\n/**\n  @brief         Correlation of Q7 sequences.\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is\n written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n accumulator. Both the inputs are represented in 1.7 format and multiplications\n yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32-bit\n accumulator in 18.14 format. This approach provides 17 guard bits and there is\n no risk of overflow as long as max(srcALen, srcBLen)<131072.\n                   The 18.14 result is then truncated to 18.7 format by\n discarding the low 7 bits and saturated to 1.7 format.\n\n @remark\n                   Refer to \\ref arm_correlate_opt_q7() for a faster\n implementation of this function.\n */\n\nvoid arm_correlate_q7(const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB,\n                      uint32_t srcBLen, q7_t *pDst) {\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  const q7_t *pIn1;                            /* InputA pointer */\n  const q7_t *pIn2;                            /* InputB pointer */\n  q7_t *pOut = pDst;                           /* Output pointer */\n  const q7_t *px;                              /* Intermediate inputA pointer */\n  const q7_t *py;                              /* Intermediate inputB pointer */\n  const q7_t *pSrc1;                           /* Intermediate pointers */\n  q31_t sum;                                   /* Accumulators */\n  uint32_t blockSize1, blockSize2, blockSize3; /* Loop counters */\n  uint32_t j, k, count, blkCnt;                /* Loop counters */\n  uint32_t outBlockSize;\n  int32_t inc = 1;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc0, acc1, acc2, acc3; /* Accumulators */\n  q31_t input1, input2;         /* Temporary input variables */\n  q15_t in1, in2;               /* Temporary input variables */\n  q7_t x0, x1, x2, x3, c0,\n      c1; /* Temporary variables for holding input and coefficient values */\n#endif\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and the destination pointer modifier, inc is set to -1 */\n  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two\n   * inputs of same length */\n  /* But to improve the performance,\n   * we include zeroes in the output instead of zero padding either of the the\n   * inputs*/\n  /* If srcALen > srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the starting of the output\n   * buffer */\n  /* If srcALen < srcBLen,\n   * (srcALen - srcBLen) zeroes has to included in the ending of the output\n   * buffer */\n  if (srcALen >= srcBLen) {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcA;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcB;\n\n    /* Number of output samples is calculated */\n    outBlockSize = (2U * srcALen) - 1U;\n\n    /* When srcALen > srcBLen, zero padding is done to srcB\n     * to make their lengths equal.\n     * Instead, (outBlockSize - (srcALen + srcBLen - 1))\n     * number of output samples are made zero */\n    j = outBlockSize - (srcALen + (srcBLen - 1U));\n\n    /* Updating the pointer position to non zero value */\n    pOut += j;\n  } else {\n    /* Initialization of inputA pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization of inputB pointer */\n    pIn2 = pSrcA;\n\n    /* srcBLen is always considered as shorter or equal to srcALen */\n    j = srcBLen;\n    srcBLen = srcALen;\n    srcALen = j;\n\n    /* CORR(x, y) = Reverse order(CORR(y, x)) */\n    /* Hence set the destination pointer to point to the last output sample */\n    pOut = pDst + ((srcALen + srcBLen) - 2U);\n\n    /* Destination address modifier is set to -1 */\n    inc = -1;\n  }\n\n  /* The function is internally\n   * divided into three stages according to the number of multiplications that\n   * has to be taken place between inputA samples and inputB samples. In the\n   * first stage of the algorithm, the multiplications increase by one for every\n   * iteration. In the second stage of the algorithm, srcBLen number of\n   * multiplications are done. In the third stage of the algorithm, the\n   * multiplications decrease by one for every iteration. */\n\n  /* The algorithm is implemented in three stages.\n     The loop counters of each stage is initiated here. */\n  blockSize1 = srcBLen - 1U;\n  blockSize2 = srcALen - (srcBLen - 1U);\n  blockSize3 = blockSize1;\n\n  /* --------------------------\n   * Initializations of stage1\n   * -------------------------*/\n\n  /* sum = x[0] * y[srcBlen - 1]\n   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]\n   * ....\n   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]\n   */\n\n  /* In this stage the MAC operations are increased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = 1U;\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  pSrc1 = pIn2 + (srcBLen - 1U);\n  py = pSrc1;\n\n  /* ------------------------\n   * Stage1 process\n   * ----------------------*/\n\n  /* The first stage starts here */\n  while (blockSize1 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* x[0] , x[1] */\n      in1 = (q15_t)*px++;\n      in2 = (q15_t)*px++;\n      input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n      /* y[srcBLen - 4] , y[srcBLen - 3] */\n      in1 = (q15_t)*py++;\n      in2 = (q15_t)*py++;\n      input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n      /* x[0] * y[srcBLen - 4] */\n      /* x[1] * y[srcBLen - 3] */\n      sum = __SMLAD(input1, input2, sum);\n\n      /* x[2] , x[3] */\n      in1 = (q15_t)*px++;\n      in2 = (q15_t)*px++;\n      input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n      /* y[srcBLen - 2] , y[srcBLen - 1] */\n      in1 = (q15_t)*py++;\n      in2 = (q15_t)*py++;\n      input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16);\n\n      /* x[2] * y[srcBLen - 2] */\n      /* x[3] * y[srcBLen - 1] */\n      sum = __SMLAD(input1, input2, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize k with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      /* x[0] * y[srcBLen - 1] */\n      sum += (q31_t)((q15_t)*px++ * *py++);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q7_t)(__SSAT(sum >> 7U, 8));\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    py = pSrc1 - count;\n    px = pIn1;\n\n    /* Increment MAC count */\n    count++;\n\n    /* Decrement loop counter */\n    blockSize1--;\n  }\n\n  /* --------------------------\n   * Initializations of stage2\n   * ------------------------*/\n\n  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]\n   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]\n   * ....\n   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1]\n   */\n\n  /* Working pointer of inputA */\n  px = pIn1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* count is index by which the pointer pIn1 to be incremented */\n  count = 0U;\n\n  /* -------------------\n   * Stage2 process\n   * ------------------*/\n\n  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are\n   * performed. So, to loop unroll over blockSize2, srcBLen should be greater\n   * than or equal to 4 */\n  if (srcBLen >= 4U) {\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = blockSize2 >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Set all accumulators to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* read x[0], x[1], x[2] samples */\n      x0 = *px++;\n      x1 = *px++;\n      x2 = *px++;\n\n      /* Apply loop unrolling and compute 4 MACs simultaneously. */\n      k = srcBLen >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 MACs at a\n       *time.\n       ** a second loop below computes MACs for the remaining 1 to 3 samples. */\n      do {\n        /* Read y[0] sample */\n        c0 = *py++;\n        /* Read y[1] sample */\n        c1 = *py++;\n\n        /* Read x[3] sample */\n        x3 = *px++;\n\n        /* x[0] and x[1] are packed */\n        in1 = (q15_t)x0;\n        in2 = (q15_t)x1;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* y[0] and y[1] are packed */\n        in1 = (q15_t)c0;\n        in2 = (q15_t)c1;\n\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc0 += x[0] * y[0] + x[1] * y[1]  */\n        acc0 = __SMLAD(input1, input2, acc0);\n\n        /* x[1] and x[2] are packed */\n        in1 = (q15_t)x1;\n        in2 = (q15_t)x2;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc1 += x[1] * y[0] + x[2] * y[1] */\n        acc1 = __SMLAD(input1, input2, acc1);\n\n        /* x[2] and x[3] are packed */\n        in1 = (q15_t)x2;\n        in2 = (q15_t)x3;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc2 += x[2] * y[0] + x[3] * y[1]  */\n        acc2 = __SMLAD(input1, input2, acc2);\n\n        /* Read x[4] sample */\n        x0 = *px++;\n\n        /* x[3] and x[4] are packed */\n        in1 = (q15_t)x3;\n        in2 = (q15_t)x0;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc3 += x[3] * y[0] + x[4] * y[1]  */\n        acc3 = __SMLAD(input1, input2, acc3);\n\n        /* Read y[2] sample */\n        c0 = *py++;\n        /* Read y[3] sample */\n        c1 = *py++;\n\n        /* Read x[5] sample */\n        x1 = *px++;\n\n        /* x[2] and x[3] are packed */\n        in1 = (q15_t)x2;\n        in2 = (q15_t)x3;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* y[2] and y[3] are packed */\n        in1 = (q15_t)c0;\n        in2 = (q15_t)c1;\n\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc0 += x[2] * y[2] + x[3] * y[3]  */\n        acc0 = __SMLAD(input1, input2, acc0);\n\n        /* x[3] and x[4] are packed */\n        in1 = (q15_t)x3;\n        in2 = (q15_t)x0;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc1 += x[3] * y[2] + x[4] * y[3]  */\n        acc1 = __SMLAD(input1, input2, acc1);\n\n        /* x[4] and x[5] are packed */\n        in1 = (q15_t)x0;\n        in2 = (q15_t)x1;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc2 += x[4] * y[2] + x[5] * y[3]  */\n        acc2 = __SMLAD(input1, input2, acc2);\n\n        /* Read x[6] sample */\n        x2 = *px++;\n\n        /* x[5] and x[6] are packed */\n        in1 = (q15_t)x1;\n        in2 = (q15_t)x2;\n\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* acc3 += x[5] * y[2] + x[6] * y[3]  */\n        acc3 = __SMLAD(input1, input2, acc3);\n\n      } while (--k);\n\n      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.\n       ** No loop unrolling is used. */\n      k = srcBLen % 0x4U;\n\n      while (k > 0U) {\n        /* Read y[4] sample */\n        c0 = *py++;\n        /* Read x[7] sample */\n        x3 = *px++;\n\n        /* Perform the multiply-accumulates */\n        /* acc0 +=  x[4] * y[4] */\n        acc0 += ((q15_t)x0 * c0);\n        /* acc1 +=  x[5] * y[4] */\n        acc1 += ((q15_t)x1 * c0);\n        /* acc2 +=  x[6] * y[4] */\n        acc2 += ((q15_t)x2 * c0);\n        /* acc3 +=  x[7] * y[4] */\n        acc3 += ((q15_t)x3 * c0);\n\n        /* Reuse the present samples for the next MAC */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q7_t)(__SSAT(acc0 >> 7, 8));\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      *pOut = (q7_t)(__SSAT(acc1 >> 7, 8));\n      pOut += inc;\n\n      *pOut = (q7_t)(__SSAT(acc2 >> 7, 8));\n      pOut += inc;\n\n      *pOut = (q7_t)(__SSAT(acc3 >> 7, 8));\n      pOut += inc;\n\n      count += 4U;\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize2 % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize2;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      k = srcBLen >> 2U;\n\n      while (k > 0U) {\n\n        /* Reading two inputs of SrcA buffer and packing */\n        in1 = (q15_t)*px++;\n        in2 = (q15_t)*px++;\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* Reading two inputs of SrcB buffer and packing */\n        in1 = (q15_t)*py++;\n        in2 = (q15_t)*py++;\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* Perform the multiply-accumulate */\n        sum = __SMLAD(input1, input2, sum);\n\n        /* Reading two inputs of SrcA buffer and packing */\n        in1 = (q15_t)*px++;\n        in2 = (q15_t)*px++;\n        input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* Reading two inputs of SrcB buffer and packing */\n        in1 = (q15_t)*py++;\n        in2 = (q15_t)*py++;\n        input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n        /* Perform the multiply-accumulate */\n        sum = __SMLAD(input1, input2, sum);\n\n        /* Decrement loop counter */\n        k--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      k = srcBLen % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      k = srcBLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += ((q15_t)*px++ * *py++);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q7_t)(__SSAT(sum >> 7U, 8));\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment the pointer pIn1 index, count by 1 */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement the loop counter */\n      blkCnt--;\n    }\n  } else {\n    /* If the srcBLen is not a multiple of 4,\n     * the blockSize2 loop cannot be unrolled by 4 */\n    blkCnt = blockSize2;\n\n    while (blkCnt > 0U) {\n      /* Accumulator is made zero for every iteration */\n      sum = 0;\n\n      /* srcBLen number of MACS should be performed */\n      k = srcBLen;\n\n      while (k > 0U) {\n        /* Perform the multiply-accumulate */\n        sum += ((q15_t)*px++ * *py++);\n\n        /* Decrement the loop counter */\n        k--;\n      }\n\n      /* Store the result in the accumulator in the destination buffer. */\n      *pOut = (q7_t)(__SSAT(sum >> 7U, 8));\n      /* Destination pointer is updated according to the address modifier, inc\n       */\n      pOut += inc;\n\n      /* Increment the MAC count */\n      count++;\n\n      /* Update the inputA and inputB pointers for next MAC calculation */\n      px = pIn1 + count;\n      py = pIn2;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n  }\n\n  /* --------------------------\n   * Initializations of stage3\n   * -------------------------*/\n\n  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+\n   * x[srcALen-1] * y[srcBLen-1] sum += x[srcALen-srcBLen+2] * y[0] +\n   * x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]\n   * ....\n   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]\n   * sum +=  x[srcALen-1] * y[0]\n   */\n\n  /* In this stage the MAC operations are decreased by 1 for every iteration.\n     The count variable holds the number of MAC operations performed */\n  count = srcBLen - 1U;\n\n  /* Working pointer of inputA */\n  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));\n  px = pSrc1;\n\n  /* Working pointer of inputB */\n  py = pIn2;\n\n  /* -------------------\n   * Stage3 process\n   * ------------------*/\n\n  while (blockSize3 > 0U) {\n    /* Accumulator is made zero for every iteration */\n    sum = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    k = count >> 2U;\n\n    while (k > 0U) {\n      /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */\n      in1 = (q15_t)*px++;\n      in2 = (q15_t)*px++;\n      input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* y[0] , y[1] */\n      in1 = (q15_t)*py++;\n      in2 = (q15_t)*py++;\n      input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* sum += x[srcALen - srcBLen + 1] * y[0] */\n      /* sum += x[srcALen - srcBLen + 2] * y[1] */\n      sum = __SMLAD(input1, input2, sum);\n\n      /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */\n      in1 = (q15_t)*px++;\n      in2 = (q15_t)*px++;\n      input1 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* y[2] , y[3] */\n      in1 = (q15_t)*py++;\n      in2 = (q15_t)*py++;\n      input2 = ((q31_t)in1 & 0x0000FFFF) | ((q31_t)in2 << 16U);\n\n      /* sum += x[srcALen - srcBLen + 3] * y[2] */\n      /* sum += x[srcALen - srcBLen + 4] * y[3] */\n      sum = __SMLAD(input1, input2, sum);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    k = count % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    k = count;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (k > 0U) {\n      /* Perform the multiply-accumulate */\n      sum += ((q15_t)*px++ * *py++);\n\n      /* Decrement loop counter */\n      k--;\n    }\n\n    /* Store the result in the accumulator in the destination buffer. */\n    *pOut = (q7_t)(__SSAT(sum >> 7U, 8));\n    /* Destination pointer is updated according to the address modifier, inc */\n    pOut += inc;\n\n    /* Update the inputA and inputB pointers for next MAC calculation */\n    px = ++pSrc1;\n    py = pIn2;\n\n    /* Decrement MAC count */\n    count--;\n\n    /* Decrement loop counter */\n    blockSize3--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  const q7_t *pIn1 = pSrcA;                  /* InputA pointer */\n  const q7_t *pIn2 = pSrcB + (srcBLen - 1U); /* InputB pointer */\n  q31_t sum;                                 /* Accumulator */\n  uint32_t i = 0U, j;                        /* Loop counters */\n  uint32_t inv = 0U;                         /* Reverse order flag */\n  uint32_t tot = 0U;                         /* Length */\n\n  /* The algorithm implementation is based on the lengths of the inputs. */\n  /* srcB is always made to slide across srcA. */\n  /* So srcBLen is always considered as shorter or equal to srcALen */\n  /* But CORR(x, y) is reverse of CORR(y, x) */\n  /* So, when srcBLen > srcALen, output pointer is made to point to the end of\n   * the output buffer */\n  /* and a varaible, inv is set to 1 */\n  /* If lengths are not equal then zero pad has to be done to  make the two\n   * inputs of same length. But to improve the performance, we include zeroes\n   * in the output instead of zero padding either of the the inputs*/\n  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the\n   * starting of the output buffer */\n  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the\n   * ending of the output buffer */\n  /* Once the zero padding is done the remaining of the output is calcualted\n   * using convolution but with the shorter signal time shifted. */\n\n  /* Calculate the length of the remaining sequence */\n  tot = ((srcALen + srcBLen) - 2U);\n\n  if (srcALen > srcBLen) {\n    /* Calculating the number of zeros to be padded to the output */\n    j = srcALen - srcBLen;\n\n    /* Initialise the pointer after zero padding */\n    pDst += j;\n  }\n\n  else if (srcALen < srcBLen) {\n    /* Initialization to inputB pointer */\n    pIn1 = pSrcB;\n\n    /* Initialization to the end of inputA pointer */\n    pIn2 = pSrcA + (srcALen - 1U);\n\n    /* Initialisation of the pointer after zero padding */\n    pDst = pDst + tot;\n\n    /* Swapping the lengths */\n    j = srcALen;\n    srcALen = srcBLen;\n    srcBLen = j;\n\n    /* Setting the reverse flag */\n    inv = 1;\n  }\n\n  /* Loop to calculate convolution for output length number of times */\n  for (i = 0U; i <= tot; i++) {\n    /* Initialize sum with zero to carry out MAC operations */\n    sum = 0;\n\n    /* Loop to perform MAC operations according to convolution equation */\n    for (j = 0U; j <= i; j++) {\n      /* Check the array limitations */\n      if (((i - j) < srcBLen) && (j < srcALen)) {\n        /* z[i] += x[i-j] * y[j] */\n        sum += ((q15_t)pIn1[j] * pIn2[-((int32_t)i - j)]);\n      }\n    }\n\n    /* Store the output in the destination buffer */\n    if (inv == 1)\n      *pDst-- = (q7_t)__SSAT((sum >> 7U), 8U);\n    else\n      *pDst++ = (q7_t)__SSAT((sum >> 7U), 8U);\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of Corr group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_decimate_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_decimate_f32.c\n * Description:  FIR decimation for floating-point sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator\n\n  These functions combine an FIR filter together with a decimator.\n  They are used in multirate systems for reducing the sample rate of a signal\n without introducing aliasing distortion. Conceptually, the functions are\n equivalent to the block diagram below: \\image html FIRDecimator.gif \"Components\n included in the FIR Decimator functions\" When decimating by a factor of\n M, the signal should be prefiltered by a lowpass filter with a\n normalized cutoff frequency of 1/M in order to prevent aliasing\n distortion. The user of the function is responsible for providing the filter\n coefficients.\n\n  The FIR decimator functions provided in the CMSIS DSP Library combine the FIR\n filter and the decimator in an efficient manner. Instead of calculating all of\n the FIR filter outputs and discarding M-1 out of every\n M, only the samples output by the decimator are computed. The\n functions operate on blocks of input and output data. pSrc points\n to an array of blockSize input values and pDst points\n to an array of blockSize/M output values. In order to have an\n integer number of output samples blockSize must always be a\n multiple of the decimation factor M.\n\n  The library provides separate functions for Q15, Q31 and floating-point data\n types.\n\n  @par           Algorithm:\n                   The FIR portion of the algorithm uses the standard form\n filter: 
 y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+\n b[numTaps-1] * x[n-numTaps+1]\n  
\n                   where, b[n] are the filter coefficients.\n  @par\n                   The pCoeffs points to a coefficient array of\n size numTaps. Coefficients are stored in time reversed order.\n  @par\n  
\n      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to a state array of size\n numTaps + blockSize - 1. Samples in the state buffer are stored in\n the order:\n  @par\n  
\n      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0],\n x[1], ..., x[blockSize-1]}\n  
\n                   The state variables are updated after each block of data is\n processed, the coefficients are untouched.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n together in an instance data structure. A separate instance structure must be\n defined for each filter. Coefficient arrays may be shared among several\n instances while state variable array should be allocated separately. There are\n separate instance structure declarations for each of the 3 supported data\n types.\n\n @par            Initialization Functions\n                   There is also an associated initialization function for each\n data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   - Checks to make sure that the size of the input is a\n multiple of the decimation factor. To do this manually without calling the init\n function, assign the follow subfields of the instance structure: numTaps,\n pCoeffs, M (decimation factor), pState. Also set all of the values in pState to\n zero.\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n instance structure cannot be placed into a const data section. To place an\n instance structure into a const data section, the instance structure must be\n manually initialized. The code below statically initializes each of the 3\n different data type filter instance structures 
\n      arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};\n      arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};\n      arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};\n  
\n                   where M is the decimation factor;\n numTaps is the number of filter coefficients in the filter;\n                   pCoeffs is the address of the coefficient\n buffer; pState is the address of the state buffer. Be sure to set\n the values in the state buffer to zeros when doing static initialization.\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the fixed-point versions of the\n FIR decimate filter functions. In particular, the overflow and saturation\n behavior of the accumulator used in each function must be considered. Refer to\n the function specific documentation below for usage guidelines.\n */\n\n/**\n  @addtogroup FIR_decimate\n  @{\n */\n\n/**\n  @brief         Processing function for floating-point FIR decimator.\n  @param[in]     S         points to an instance of the floating-point FIR\n  decimator structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize number of samples to process\n  @return        none\n */\n\nvoid arm_fir_decimate_f32(const arm_fir_decimate_instance_f32 *S,\n                          const float32_t *pSrc, float32_t *pDst,\n                          uint32_t blockSize) {\n  float32_t *pState = S->pState;         /* State pointer */\n  const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t *pStateCur; /* Points to the current sample of the state */\n  float32_t *px0;       /* Temporary pointer for state buffer */\n  const float32_t *pb;  /* Temporary pointer for coefficient buffer */\n  float32_t x0,\n      c0;         /* Temporary variables to hold state and coefficient values */\n  float32_t acc0; /* Accumulator */\n  uint32_t numTaps =\n      S->numTaps; /* Number of filter coefficients in the filter */\n  uint32_t i, tapCnt, blkCnt,\n      outBlockSize = blockSize / S->M; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t *px1, *px2, *px3;\n  float32_t x1, x2, x3;\n  float32_t acc1, acc2, acc3;\n#endif\n\n  /* S->pState buffer contains previous frame (numTaps - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (numTaps - 1U);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 samples at a time */\n  blkCnt = outBlockSize >> 2U;\n\n  /* Samples loop unrolled by 4 */\n  while (blkCnt > 0U) {\n    /* Copy 4 * decimation factor number of new input samples into the state\n     * buffer */\n    i = S->M * 4;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulators to zero */\n    acc0 = 0.0f;\n    acc1 = 0.0f;\n    acc2 = 0.0f;\n    acc3 = 0.0f;\n\n    /* Initialize state pointer for all the samples */\n    px0 = pState;\n    px1 = pState + S->M;\n    px2 = pState + 2 * S->M;\n    px3 = pState + 3 * S->M;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-1] sample for acc0 */\n      x0 = *(px0++);\n      /* Read x[n-numTaps-1] sample for acc1 */\n      x1 = *(px1++);\n      /* Read x[n-numTaps-1] sample for acc2 */\n      x2 = *(px2++);\n      /* Read x[n-numTaps-1] sample for acc3 */\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n      acc2 += x2 * c0;\n      acc3 += x3 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n      acc2 += x2 * c0;\n      acc3 += x3 * c0;\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n      acc2 += x2 * c0;\n      acc3 += x3 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n      acc2 += x2 * c0;\n      acc3 += x3 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *(pb++);\n\n      /* Fetch state variables for acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n      acc2 += x2 * c0;\n      acc3 += x3 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M * 4;\n\n    /* The result is in the accumulator, store in the destination buffer. */\n    *pDst++ = acc0;\n    *pDst++ = acc1;\n    *pDst++ = acc2;\n    *pDst++ = acc3;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining samples */\n  blkCnt = outBlockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = outBlockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy decimation factor number of new input samples into the state buffer\n     */\n    i = S->M;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    acc0 = 0.0f;\n\n    /* Initialize state pointer */\n    px0 = pState;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-1] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-2] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-3] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-4] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M;\n\n    /* The result is in the accumulator, store in the destination buffer. */\n    *pDst++ = acc0;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the satrt of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x04U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of FIR_decimate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_decimate_fast_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_decimate_fast_q15.c\n * Description:  Fast Q15 FIR Decimator\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_decimate\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 FIR decimator (fast variant).\n  @param[in]     S          points to an instance of the Q15 FIR decimator\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of input samples to process per call\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This fast version uses a 32-bit accumulator with 2.30 format.\n                   The accumulator maintains full precision of the intermediate\n  multiplication results but provides only a single guard bit. Thus, if the\n  accumulator result overflows it wraps around and distorts the result. In order\n  to avoid overflows completely the input signal must be scaled down by\n  log2(numTaps) bits (log2 is read as log to the base 2). The 2.30 accumulator\n  is then truncated to 2.15 format and saturated to yield the 1.15 result.\n  @remark\n                   Refer to \\ref arm_fir_decimate_q15() for a slower\n  implementation of this function which uses 64-bit accumulation to avoid wrap\n  around distortion. Both the slow and the fast versions use the same instance\n  structure. Use function \\ref arm_fir_decimate_init_q15() to initialize the\n  filter structure.\n */\n\n#if defined(ARM_MATH_DSP)\n\nvoid arm_fir_decimate_fast_q15(const arm_fir_decimate_instance_q15 *S,\n                               const q15_t *pSrc, q15_t *pDst,\n                               uint32_t blockSize) {\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCur; /* Points to the current sample of the state */\n  q15_t *px;        /* Temporary pointer for state buffer */\n  const q15_t *pb;  /* Temporary pointer for coefficient buffer */\n  q31_t x0, x1,\n      c0;     /* Temporary variables to hold state and coefficient values */\n  q31_t sum0; /* Accumulators */\n  q31_t acc0, acc1;\n  q15_t *px0, *px1;\n  uint32_t blkCntN3;\n  uint32_t numTaps = S->numTaps; /* Number of taps */\n  uint32_t i, blkCnt, tapCnt,\n      outBlockSize = blockSize / S->M; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t c1; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* S->pState buffer contains previous frame (numTaps - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (numTaps - 1U);\n\n  /* Total number of output samples to be computed */\n  blkCnt = outBlockSize / 2;\n  blkCntN3 = outBlockSize - (2 * blkCnt);\n\n  while (blkCnt > 0U) {\n    /* Copy 2 * decimation factor number of new input samples into the state\n     * buffer */\n    i = S->M * 2;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    acc0 = 0;\n    acc1 = 0;\n\n    /* Initialize state pointer for all the samples */\n    px0 = pState;\n    px1 = pState + S->M;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */\n      x0 = read_q15x2_ia(&px0);\n      x1 = read_q15x2_ia(&px1);\n\n      /* Perform the multiply-accumulate */\n      acc0 = __SMLAD(x0, c0, acc0);\n      acc1 = __SMLAD(x1, c0, acc1);\n\n      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */\n      x0 = read_q15x2_ia(&px0);\n      x1 = read_q15x2_ia(&px1);\n\n      /* Perform the multiply-accumulate */\n      acc0 = __SMLAD(x0, c0, acc0);\n      acc1 = __SMLAD(x1, c0, acc1);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch state variables for acc0, acc1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 = __SMLAD(x0, c0, acc0);\n      acc1 = __SMLAD(x1, c0, acc1);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M * 2;\n\n    /* Store filter output, smlad returns the values in 2.14 format */\n    /* so downsacle by 15 to get output in 1.15 */\n    *pDst++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n    *pDst++ = (q15_t)(__SSAT((acc1 >> 15), 16));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  while (blkCntN3 > 0U) {\n    /* Copy decimation factor number of new input samples into the state buffer\n     */\n    i = S->M;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    sum0 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */\n      x0 = read_q15x2_ia(&px);\n\n      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */\n      c1 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Perform the multiply-accumulate */\n      sum0 = __SMLAD(x0, c0, sum0);\n\n      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */\n      x0 = read_q15x2_ia(&px);\n\n      /* Perform the multiply-accumulate */\n      sum0 = __SMLAD(x0, c1, sum0);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 = __SMLAD(x0, c0, sum0);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M;\n\n    /* Store filter output, smlad returns the values in 2.14 format */\n    /* so downsacle by 15 to get output in 1.15 */\n    *pDst++ = (q15_t)(__SSAT((sum0 >> 15), 16));\n\n    /* Decrement loop counter */\n    blkCntN3--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the satrt of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n  i = (numTaps - 1U) >> 2U;\n\n  /* copy data */\n  while (i > 0U) {\n    write_q15x2_ia(&pStateCur, read_q15x2_ia(&pState));\n    write_q15x2_ia(&pStateCur, read_q15x2_ia(&pState));\n\n    /* Decrement loop counter */\n    i--;\n  }\n\n  i = (numTaps - 1U) % 0x04U;\n\n  /* Copy data */\n  while (i > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n}\n\n#else /* #if defined (ARM_MATH_DSP) */\n\nvoid arm_fir_decimate_fast_q15(const arm_fir_decimate_instance_q15 *S,\n                               const q15_t *pSrc, q15_t *pDst,\n                               uint32_t blockSize) {\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCur; /* Points to the current sample of the state */\n  q15_t *px;        /* Temporary pointer for state buffer */\n  const q15_t *pb;  /* Temporary pointer for coefficient buffer */\n  q15_t x0, x1,\n      c0;     /* Temporary variables to hold state and coefficient values */\n  q31_t sum0; /* Accumulators */\n  q31_t acc0, acc1;\n  q15_t *px0, *px1;\n  uint32_t blkCntN3;\n  uint32_t numTaps = S->numTaps; /* Number of taps */\n  uint32_t i, blkCnt, tapCnt,\n      outBlockSize = blockSize / S->M; /* Loop counters */\n\n  /* S->pState buffer contains previous frame (numTaps - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (numTaps - 1U);\n\n  /* Total number of output samples to be computed */\n  blkCnt = outBlockSize / 2;\n  blkCntN3 = outBlockSize - (2 * blkCnt);\n\n  while (blkCnt > 0U) {\n    /* Copy 2 * decimation factor number of new input samples into the state\n     * buffer */\n    i = S->M * 2;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    acc0 = 0;\n    acc1 = 0;\n\n    /* Initialize state pointer */\n    px0 = pState;\n    px1 = pState + S->M;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the Read b[numTaps-1] coefficients */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-2] for sample 0 and sample 1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Read the b[numTaps-3] coefficients */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-3] for sample 0 and sample 1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-4] for sample 0 and sample 1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M * 2;\n\n    /* Store filter output, smlad returns the values in 2.14 format */\n    /* so downsacle by 15 to get output in 1.15 */\n\n    *pDst++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n    *pDst++ = (q15_t)(__SSAT((acc1 >> 15), 16));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  while (blkCntN3 > 0U) {\n    /* Copy decimation factor number of new input samples into the state buffer\n     */\n    i = S->M;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    sum0 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-1] sample */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-2] sample */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-3] sample */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-4] sample */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M;\n\n    /* Store filter output, smlad returns the values in 2.14 format */\n    /* so downsacle by 15 to get output in 1.15 */\n    *pDst++ = (q15_t)(__SSAT((sum0 >> 15), 16));\n\n    /* Decrement loop counter */\n    blkCntN3--;\n  }\n\n  /* Processing is complete.\n   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.\n   ** This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n  i = (numTaps - 1U) >> 2U;\n\n  /* copy data */\n  while (i > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n\n  i = (numTaps - 1U) % 0x04U;\n\n  /* copy data */\n  while (i > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n}\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n/**\n  @} end of FIR_decimate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_decimate_fast_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_decimate_fast_q31.c\n * Description:  Fast Q31 FIR Decimator\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_decimate\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 FIR decimator (fast variant).\n  @param[in]     S          points to an instance of the Q31 FIR decimator\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This function is optimized for speed at the expense of\n  fixed-point precision and overflow protection. The result of each 1.31 x 1.31\n  multiplication is truncated to 2.30 format. These intermediate results are\n  added to a 2.30 accumulator. Finally, the accumulator is saturated and\n  converted to a 1.31 result. The fast version has the same overflow behavior as\n  the standard version and provides less precision since it discards the low 32\n  bits of each multiplication result. In order to avoid overflows completely the\n  input signal must be scaled down by log2(numTaps) bits (where log2 is read as\n  log to the base 2).\n\n  @remark\n                   Refer to \\ref arm_fir_decimate_q31() for a slower\n  implementation of this function which uses a 64-bit accumulator to provide\n  higher precision. Both the slow and the fast versions use the same instance\n  structure. Use function \\ref arm_fir_decimate_init_q31() to initialize the\n  filter structure.\n */\n\nvoid arm_fir_decimate_fast_q31(const arm_fir_decimate_instance_q31 *S,\n                               const q31_t *pSrc, q31_t *pDst,\n                               uint32_t blockSize) {\n  q31_t *pState = S->pState;         /* State pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *pStateCur; /* Points to the current sample of the state */\n  q31_t *px0;       /* Temporary pointer for state buffer */\n  const q31_t *pb;  /* Temporary pointer for coefficient buffer */\n  q31_t x0, c0; /* Temporary variables to hold state and coefficient values */\n  q63_t acc0;   /* Accumulator */\n  uint32_t numTaps =\n      S->numTaps; /* Number of filter coefficients in the filter */\n  uint32_t i, tapCnt, blkCnt,\n      outBlockSize = blockSize / S->M; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t *px1, *px2, *px3;\n  q31_t x1, x2, x3;\n  q63_t acc1, acc2, acc3;\n#endif\n\n  /* S->pState buffer contains previous frame (numTaps - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (numTaps - 1U);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 samples at a time */\n  blkCnt = outBlockSize >> 2U;\n\n  /* Samples loop unrolled by 4 */\n  while (blkCnt > 0U) {\n    /* Copy 4 * decimation factor number of new input samples into the state\n     * buffer */\n    i = S->M * 4;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulators to zero */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Initialize state pointer for all the samples */\n    px0 = pState;\n    px1 = pState + S->M;\n    px2 = pState + 2 * S->M;\n    px3 = pState + 3 * S->M;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-1] sample for acc0 */\n      x0 = *(px0++);\n      /* Read x[n-numTaps-1] sample for acc1 */\n      x1 = *(px1++);\n      /* Read x[n-numTaps-1] sample for acc2 */\n      x2 = *(px2++);\n      /* Read x[n-numTaps-1] sample for acc3 */\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n      acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n      acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n      acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n      acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n      acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n      acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n      acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n      acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n      acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n      acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n      acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n      acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *(pb++);\n\n      /* Fetch state variables for acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n      acc1 = (q31_t)((((q63_t)acc1 << 32) + ((q63_t)x1 * c0)) >> 32);\n      acc2 = (q31_t)((((q63_t)acc2 << 32) + ((q63_t)x2 * c0)) >> 32);\n      acc3 = (q31_t)((((q63_t)acc3 << 32) + ((q63_t)x3 * c0)) >> 32);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M * 4;\n\n    /* The result is in the accumulator, store in the destination buffer. */\n    *pDst++ = (q31_t)(acc0 << 1);\n    *pDst++ = (q31_t)(acc1 << 1);\n    *pDst++ = (q31_t)(acc2 << 1);\n    *pDst++ = (q31_t)(acc3 << 1);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining samples */\n  blkCnt = outBlockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = outBlockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy decimation factor number of new input samples into the state buffer\n     */\n    i = S->M;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    acc0 = 0;\n\n    /* Initialize state pointer */\n    px0 = pState;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-1] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-2] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-3] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-4] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 = (q31_t)((((q63_t)acc0 << 32) + ((q63_t)x0 * c0)) >> 32);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M;\n\n    /* The result is in the accumulator, store in the destination buffer. */\n    *pDst++ = (q31_t)(acc0 << 1);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the satrt of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x04U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of FIR_decimate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_decimate_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_decimate_init_f32.c\n * Description:  Floating-point FIR Decimator initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_decimate\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point FIR decimator.\n  @param[in,out] S          points to an instance of the floating-point FIR\n  decimator structure\n  @param[in]     numTaps    number of coefficients in the filter\n  @param[in]     M          decimation factor\n  @param[in]     pCoeffs    points to the filter coefficients\n  @param[in]     pState     points to the state buffer\n  @param[in]     blockSize  number of input samples to process per call\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS      : Operation successful\n                   - \\ref ARM_MATH_LENGTH_ERROR : blockSize is not\n  a multiple of M\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to the array of state variables.\n                   pState is of length\n  numTaps+blockSize-1 words where blockSize is the\n  number of input samples passed to arm_fir_decimate_f32().\n                   M is the decimation factor.\n */\n\narm_status arm_fir_decimate_init_f32(arm_fir_decimate_instance_f32 *S,\n                                     uint16_t numTaps, uint8_t M,\n                                     const float32_t *pCoeffs,\n                                     float32_t *pState, uint32_t blockSize) {\n  arm_status status;\n\n  /* The size of the input block must be a multiple of the decimation factor */\n  if ((blockSize % M) != 0U) {\n    /* Set status as ARM_MATH_LENGTH_ERROR */\n    status = ARM_MATH_LENGTH_ERROR;\n  } else {\n    /* Assign filter taps */\n    S->numTaps = numTaps;\n\n    /* Assign coefficient pointer */\n    S->pCoeffs = pCoeffs;\n\n    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */\n    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));\n\n    /* Assign state pointer */\n    S->pState = pState;\n\n    /* Assign Decimation Factor */\n    S->M = M;\n\n    status = ARM_MATH_SUCCESS;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of FIR_decimate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_decimate_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_decimate_init_q15.c\n * Description:  Initialization function for the Q15 FIR Decimator\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_decimate\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 FIR decimator.\n  @param[in,out] S          points to an instance of the Q15 FIR decimator\n  structure\n  @param[in]     numTaps    number of coefficients in the filter\n  @param[in]     M          decimation factor\n  @param[in]     pCoeffs    points to the filter coefficients\n  @param[in]     pState     points to the state buffer\n  @param[in]     blockSize  number of input samples to process\n  @return        execution  status\n                   - \\ref ARM_MATH_SUCCESS      : Operation successful\n                   - \\ref ARM_MATH_LENGTH_ERROR : blockSize is not\n  a multiple of M\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to the array of state variables.\n                   pState is of length\n  numTaps+blockSize-1 words where blockSize is the\n  number of input samples to the call arm_fir_decimate_q15().\n                   M is the decimation factor.\n */\n\narm_status arm_fir_decimate_init_q15(arm_fir_decimate_instance_q15 *S,\n                                     uint16_t numTaps, uint8_t M,\n                                     const q15_t *pCoeffs, q15_t *pState,\n                                     uint32_t blockSize) {\n  arm_status status;\n\n  /* The size of the input block must be a multiple of the decimation factor */\n  if ((blockSize % M) != 0U) {\n    /* Set status as ARM_MATH_LENGTH_ERROR */\n    status = ARM_MATH_LENGTH_ERROR;\n  } else {\n    /* Assign filter taps */\n    S->numTaps = numTaps;\n\n    /* Assign coefficient pointer */\n    S->pCoeffs = pCoeffs;\n\n    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */\n    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));\n\n    /* Assign state pointer */\n    S->pState = pState;\n\n    /* Assign Decimation Factor */\n    S->M = M;\n\n    status = ARM_MATH_SUCCESS;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of FIR_decimate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_decimate_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_decimate_init_q31.c\n * Description:  Initialization function for Q31 FIR Decimation filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_decimate\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 FIR decimator.\n  @param[in,out] S          points to an instance of the Q31 FIR decimator\n  structure\n  @param[in]     numTaps    number of coefficients in the filter\n  @param[in]     M          decimation factor\n  @param[in]     pCoeffs    points to the filter coefficients\n  @param[in]     pState     points to the state buffer\n  @param[in]     blockSize  number of input samples to process\n  @return        execution  status\n                   - \\ref ARM_MATH_SUCCESS      : Operation successful\n                   - \\ref ARM_MATH_LENGTH_ERROR : blockSize is not\n  a multiple of M\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to the array of state variables.\n                   pState is of length\n  numTaps+blockSize-1 words where blockSize is the\n  number of input samples passed to arm_fir_decimate_q31().\n                   M is the decimation factor.\n */\n\narm_status arm_fir_decimate_init_q31(arm_fir_decimate_instance_q31 *S,\n                                     uint16_t numTaps, uint8_t M,\n                                     const q31_t *pCoeffs, q31_t *pState,\n                                     uint32_t blockSize) {\n  arm_status status;\n\n  /* The size of the input block must be a multiple of the decimation factor */\n  if ((blockSize % M) != 0U) {\n    /* Set status as ARM_MATH_LENGTH_ERROR */\n    status = ARM_MATH_LENGTH_ERROR;\n  } else {\n    /* Assign filter taps */\n    S->numTaps = numTaps;\n\n    /* Assign coefficient pointer */\n    S->pCoeffs = pCoeffs;\n\n    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */\n    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));\n\n    /* Assign state pointer */\n    S->pState = pState;\n\n    /* Assign Decimation Factor */\n    S->M = M;\n\n    status = ARM_MATH_SUCCESS;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of FIR_decimate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_decimate_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_decimate_q15.c\n * Description:  Q15 FIR Decimator\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_decimate\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 FIR decimator.\n  @param[in]     S          points to an instance of the Q15 FIR decimator\n structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of input samples to process per call\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n accumulator. Both coefficients and state variables are represented in 1.15\n format and multiplications yield a 2.30 result. The 2.30 intermediate results\n are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of\n internal overflow with this approach and the full precision of intermediate\n multiplications is preserved. After all additions have been performed, the\n accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the\n accumulator is saturated to yield a result in 1.15 format.\n\n @remark\n                   Refer to \\ref arm_fir_decimate_fast_q15() for a faster but\n less precise implementation of this function.\n */\n\n#if defined(ARM_MATH_DSP)\n\nvoid arm_fir_decimate_q15(const arm_fir_decimate_instance_q15 *S,\n                          const q15_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCur; /* Points to the current sample of the state */\n  q15_t *px;        /* Temporary pointer for state buffer */\n  const q15_t *pb;  /* Temporary pointer for coefficient buffer */\n  q31_t x0, x1,\n      c0;     /* Temporary variables to hold state and coefficient values */\n  q63_t sum0; /* Accumulators */\n  q63_t acc0, acc1;\n  q15_t *px0, *px1;\n  uint32_t blkCntN3;\n  uint32_t numTaps = S->numTaps; /* Number of taps */\n  uint32_t i, blkCnt, tapCnt,\n      outBlockSize = blockSize / S->M; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t c1; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* S->pState buffer contains previous frame (numTaps - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (numTaps - 1U);\n\n  /* Total number of output samples to be computed */\n  blkCnt = outBlockSize / 2;\n  blkCntN3 = outBlockSize - (2 * blkCnt);\n\n  while (blkCnt > 0U) {\n    /* Copy 2 * decimation factor number of new input samples into the state\n     * buffer */\n    i = S->M * 2;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    acc0 = 0;\n    acc1 = 0;\n\n    /* Initialize state pointer for all the samples */\n    px0 = pState;\n    px1 = pState + S->M;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */\n      x0 = read_q15x2_ia(&px0);\n      x1 = read_q15x2_ia(&px1);\n\n      /* Perform the multiply-accumulate */\n      acc0 = __SMLALD(x0, c0, acc0);\n      acc1 = __SMLALD(x1, c0, acc1);\n\n      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */\n      x0 = read_q15x2_ia(&px0);\n      x1 = read_q15x2_ia(&px1);\n\n      /* Perform the multiply-accumulate */\n      acc0 = __SMLALD(x0, c0, acc0);\n      acc1 = __SMLALD(x1, c0, acc1);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch state variables for acc0, acc1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 = __SMLALD(x0, c0, acc0);\n      acc1 = __SMLALD(x1, c0, acc1);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M * 2;\n\n    /* Store filter output, smlad returns the values in 2.14 format */\n    /* so downsacle by 15 to get output in 1.15 */\n    *pDst++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n    *pDst++ = (q15_t)(__SSAT((acc1 >> 15), 16));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  while (blkCntN3 > 0U) {\n    /* Copy decimation factor number of new input samples into the state buffer\n     */\n    i = S->M;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    sum0 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */\n      x0 = read_q15x2_ia(&px);\n\n      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */\n      c1 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Perform the multiply-accumulate */\n      sum0 = __SMLALD(x0, c0, sum0);\n\n      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */\n      x0 = read_q15x2_ia(&px);\n\n      /* Perform the multiply-accumulate */\n      sum0 = __SMLALD(x0, c1, sum0);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 = __SMLALD(x0, c0, sum0);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M;\n\n    /* Store filter output, smlad returns the values in 2.14 format */\n    /* so downsacle by 15 to get output in 1.15 */\n    *pDst++ = (q15_t)(__SSAT((sum0 >> 15), 16));\n\n    /* Decrement loop counter */\n    blkCntN3--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the satrt of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n  i = (numTaps - 1U) >> 2U;\n\n  /* copy data */\n  while (i > 0U) {\n    write_q15x2_ia(&pStateCur, read_q15x2_ia(&pState));\n    write_q15x2_ia(&pStateCur, read_q15x2_ia(&pState));\n\n    /* Decrement loop counter */\n    i--;\n  }\n\n  i = (numTaps - 1U) % 0x04U;\n\n  /* Copy data */\n  while (i > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n}\n\n#else /* #if defined (ARM_MATH_DSP) */\n\nvoid arm_fir_decimate_q15(const arm_fir_decimate_instance_q15 *S,\n                          const q15_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCur; /* Points to the current sample of the state */\n  q15_t *px;        /* Temporary pointer for state buffer */\n  const q15_t *pb;  /* Temporary pointer for coefficient buffer */\n  q15_t x0, x1,\n      c0;     /* Temporary variables to hold state and coefficient values */\n  q63_t sum0; /* Accumulators */\n  q63_t acc0, acc1;\n  q15_t *px0, *px1;\n  uint32_t blkCntN3;\n  uint32_t numTaps = S->numTaps; /* Number of taps */\n  uint32_t i, blkCnt, tapCnt,\n      outBlockSize = blockSize / S->M; /* Loop counters */\n\n  /* S->pState buffer contains previous frame (numTaps - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (numTaps - 1U);\n\n  /* Total number of output samples to be computed */\n  blkCnt = outBlockSize / 2;\n  blkCntN3 = outBlockSize - (2 * blkCnt);\n\n  while (blkCnt > 0U) {\n    /* Copy 2 * decimation factor number of new input samples into the state\n     * buffer */\n    i = S->M * 2;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    acc0 = 0;\n    acc1 = 0;\n\n    /* Initialize state pointer */\n    px0 = pState;\n    px1 = pState + S->M;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the Read b[numTaps-1] coefficients */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-2] for sample 0 and sample 1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Read the b[numTaps-3] coefficients */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-3] for sample 0 and sample 1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-4] for sample 0 and sample 1 */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px0++;\n      x1 = *px1++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M * 2;\n\n    /* Store filter output, smlad returns the values in 2.14 format */\n    /* so downsacle by 15 to get output in 1.15 */\n\n    *pDst++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n    *pDst++ = (q15_t)(__SSAT((acc1 >> 15), 16));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  while (blkCntN3 > 0U) {\n    /* Copy decimation factor number of new input samples into the state buffer\n     */\n    i = S->M;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    sum0 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-1] sample */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-2] sample */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-3] sample */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-4] sample */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px++;\n\n      /* Perform the multiply-accumulate */\n      sum0 += x0 * c0;\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M;\n\n    /* Store filter output, smlad returns the values in 2.14 format */\n    /* so downsacle by 15 to get output in 1.15 */\n    *pDst++ = (q15_t)(__SSAT((sum0 >> 15), 16));\n\n    /* Decrement loop counter */\n    blkCntN3--;\n  }\n\n  /* Processing is complete.\n   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.\n   ** This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n  i = (numTaps - 1U) >> 2U;\n\n  /* copy data */\n  while (i > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n\n  i = (numTaps - 1U) % 0x04U;\n\n  /* copy data */\n  while (i > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n}\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n/**\n  @} end of FIR_decimate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_decimate_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_decimate_q31.c\n * Description:  Q31 FIR Decimator\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_decimate\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 FIR decimator.\n  @param[in]     S          points to an instance of the Q31 FIR decimator\n structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n accumulator. The accumulator has a 2.62 format and maintains full precision of\n the intermediate multiplication results but provides only a single guard bit.\n                   Thus, if the accumulator result overflows it wraps around\n rather than clip. In order to avoid overflows completely the input signal must\n be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).\n                   After all multiply-accumulates are performed, the 2.62\n accumulator is truncated to 1.32 format and then saturated to 1.31 format.\n\n @remark\n                   Refer to \\ref arm_fir_decimate_fast_q31() for a faster but\n less precise implementation of this function.\n */\n\nvoid arm_fir_decimate_q31(const arm_fir_decimate_instance_q31 *S,\n                          const q31_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  q31_t *pState = S->pState;         /* State pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *pStateCur; /* Points to the current sample of the state */\n  q31_t *px0;       /* Temporary pointer for state buffer */\n  const q31_t *pb;  /* Temporary pointer for coefficient buffer */\n  q31_t x0, c0; /* Temporary variables to hold state and coefficient values */\n  q63_t acc0;   /* Accumulator */\n  uint32_t numTaps =\n      S->numTaps; /* Number of filter coefficients in the filter */\n  uint32_t i, tapCnt, blkCnt,\n      outBlockSize = blockSize / S->M; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t *px1, *px2, *px3;\n  q31_t x1, x2, x3;\n  q63_t acc1, acc2, acc3;\n#endif\n\n  /* S->pState buffer contains previous frame (numTaps - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (numTaps - 1U);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 samples at a time */\n  blkCnt = outBlockSize >> 2U;\n\n  /* Samples loop unrolled by 4 */\n  while (blkCnt > 0U) {\n    /* Copy 4 * decimation factor number of new input samples into the state\n     * buffer */\n    i = S->M * 4;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulators to zero */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Initialize state pointer for all the samples */\n    px0 = pState;\n    px1 = pState + S->M;\n    px2 = pState + 2 * S->M;\n    px3 = pState + 3 * S->M;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-1] sample for acc0 */\n      x0 = *(px0++);\n      /* Read x[n-numTaps-1] sample for acc1 */\n      x1 = *(px1++);\n      /* Read x[n-numTaps-1] sample for acc2 */\n      x2 = *(px2++);\n      /* Read x[n-numTaps-1] sample for acc3 */\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n      acc1 += (q63_t)x1 * c0;\n      acc2 += (q63_t)x2 * c0;\n      acc3 += (q63_t)x3 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n      acc1 += (q63_t)x1 * c0;\n      acc2 += (q63_t)x2 * c0;\n      acc3 += (q63_t)x3 * c0;\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n      acc1 += (q63_t)x1 * c0;\n      acc2 += (q63_t)x2 * c0;\n      acc3 += (q63_t)x3 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n      acc1 += (q63_t)x1 * c0;\n      acc2 += (q63_t)x2 * c0;\n      acc3 += (q63_t)x3 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *(pb++);\n\n      /* Fetch state variables for acc0, acc1, acc2, acc3 */\n      x0 = *(px0++);\n      x1 = *(px1++);\n      x2 = *(px2++);\n      x3 = *(px3++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n      acc1 += (q63_t)x1 * c0;\n      acc2 += (q63_t)x2 * c0;\n      acc3 += (q63_t)x3 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M * 4;\n\n    /* The result is in the accumulator, store in the destination buffer. */\n    *pDst++ = (q31_t)(acc0 >> 31);\n    *pDst++ = (q31_t)(acc1 >> 31);\n    *pDst++ = (q31_t)(acc2 >> 31);\n    *pDst++ = (q31_t)(acc3 >> 31);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining samples */\n  blkCnt = outBlockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = outBlockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy decimation factor number of new input samples into the state buffer\n     */\n    i = S->M;\n\n    do {\n      *pStateCur++ = *pSrc++;\n\n    } while (--i);\n\n    /* Set accumulator to zero */\n    acc0 = 0;\n\n    /* Initialize state pointer */\n    px0 = pState;\n\n    /* Initialize coeff pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-1] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-2] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-3] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *pb++;\n\n      /* Read x[n-numTaps-4] sample */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of taps */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *pb++;\n\n      /* Fetch 1 state variable */\n      x0 = *px0++;\n\n      /* Perform the multiply-accumulate */\n      acc0 += (q63_t)x0 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by the decimation factor\n     * to process the next group of decimation factor number samples */\n    pState = pState + S->M;\n\n    /* The result is in the accumulator, store in the destination buffer. */\n    *pDst++ = (q31_t)(acc0 >> 31);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the satrt of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x04U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of FIR_decimate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_f32.c\n * Description:  Floating-point FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup FIR Finite Impulse Response (FIR) Filters\n\n  This set of functions implements Finite Impulse Response (FIR) filters\n  for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31\n  are also provided. The functions operate on blocks of input and output data\n  and each call to the function processes blockSize samples through\n  the filter.  pSrc and pDst points to input and\n  output arrays containing blockSize values.\n\n  @par           Algorithm\n                   The FIR filter algorithm is based upon a sequence of\n  multiply-accumulate (MAC) operations. Each filter coefficient\n  b[n] is multiplied by a state variable which equals a previous\n  input sample x[n]. 
 y[n] = b[0] * x[n] + b[1] * x[n-1] +\n  b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]\n  
\n  @par\n                   \\image html FIR.GIF \"Finite Impulse Response filter\"\n  @par\n                   pCoeffs points to a coefficient array of size\n  numTaps. Coefficients are stored in time reversed order.\n  @par\n  
\n      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to a state array of size\n  numTaps + blockSize - 1. Samples in the state buffer are stored\n  in the following order.\n  @par\n  
\n      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0],\n  x[1], ..., x[blockSize-1]}\n  
\n  @par\n                   Note that the length of the state buffer exceeds the length\n  of the coefficient array by blockSize-1. The increased state\n  buffer length allows circular addressing, which is traditionally used in the\n  FIR filters, to be avoided and yields a significant speed improvement. The\n  state variables are updated after each block of data is processed; the\n  coefficients are untouched.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter. Coefficient arrays may be shared among several\n  instances while state variable arrays cannot be shared. There are separate\n  instance structure declarations for each of the 4 supported data types.\n\n  @par           Initialization Functions\n                   There is also an associated initialization function for each\n  data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n  the follow subfields of the instance structure: numTaps, pCoeffs, pState. Also\n  set all of the values in pState to zero.\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Set the values in the state buffer to zeros before\n  static initialization. The code below statically initializes each of the 4\n  different data type filter instance structures 
 arm_fir_instance_f32 S =\n  {numTaps, pState, pCoeffs}; arm_fir_instance_q31 S = {numTaps, pState,\n  pCoeffs}; arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};\n      arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};\n  
\n                   where numTaps is the number of filter\n  coefficients in the filter; pState is the address of the state\n  buffer; pCoeffs is the address of the coefficient buffer.\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the fixed-point versions of the\n  FIR filter functions. In particular, the overflow and saturation behavior of\n  the accumulator used in each function must be considered. Refer to the\n  function specific documentation below for usage guidelines.\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Processing function for floating-point FIR filter.\n  @param[in]     S          points to an instance of the floating-point FIR\n  filter structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_fir_f32(const arm_fir_instance_f32 *S, const float32_t *pSrc,\n                 float32_t *pDst, uint32_t blockSize) {\n  float32_t *pState = S->pState;         /* State pointer */\n  const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t *pStateCurnt; /* Points to the current sample of the state */\n  float32_t *px;          /* Temporary pointer for state buffer */\n  const float32_t *pb;    /* Temporary pointer for coefficient buffer */\n  float32_t acc0;         /* Accumulator */\n  uint32_t numTaps =\n      S->numTaps;             /* Number of filter coefficients in the filter */\n  uint32_t i, tapCnt, blkCnt; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t acc1, acc2, acc3, acc4, acc5, acc6, acc7; /* Accumulators */\n  float32_t x0, x1, x2, x3, x4, x5, x6,\n      x7;       /* Temporary variables to hold state values */\n  float32_t c0; /* Temporary variable to hold coefficient value */\n#endif\n\n  /* S->pState points to state array which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 8 output values simultaneously.\n   * The variables acc0 ... acc7 hold output values that are being computed:\n   *\n   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] +\n   * b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] acc1 =  b[numTaps-1] *\n   * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] *\n   * x[n-numTaps-2] +...+ b[0] * x[1] acc2 =  b[numTaps-1] * x[n-numTaps+1] +\n   * b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] *\n   * x[2] acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1]\n   * + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]\n   */\n\n  blkCnt = blockSize >> 3U;\n\n  while (blkCnt > 0U) {\n    /* Copy 4 new input samples into the state buffer. */\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set all accumulators to zero */\n    acc0 = 0.0f;\n    acc1 = 0.0f;\n    acc2 = 0.0f;\n    acc3 = 0.0f;\n    acc4 = 0.0f;\n    acc5 = 0.0f;\n    acc6 = 0.0f;\n    acc7 = 0.0f;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* This is separated from the others to avoid\n     * a call to __aeabi_memmove which would be slower\n     */\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n\n    /* Read the first 7 samples from the state buffer:  x[n-numTaps],\n     * x[n-numTaps-1], x[n-numTaps-2] */\n    x0 = *px++;\n    x1 = *px++;\n    x2 = *px++;\n    x3 = *px++;\n    x4 = *px++;\n    x5 = *px++;\n    x6 = *px++;\n\n    /* Loop unrolling: process 8 taps at a time. */\n    tapCnt = numTaps >> 3U;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-3] sample */\n      x7 = *(px++);\n\n      /* acc0 +=  b[numTaps-1] * x[n-numTaps] */\n      acc0 += x0 * c0;\n\n      /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */\n      acc1 += x1 * c0;\n\n      /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */\n      acc2 += x2 * c0;\n\n      /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */\n      acc3 += x3 * c0;\n\n      /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */\n      acc4 += x4 * c0;\n\n      /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */\n      acc5 += x5 * c0;\n\n      /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */\n      acc6 += x6 * c0;\n\n      /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */\n      acc7 += x7 * c0;\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-4] sample */\n      x0 = *(px++);\n\n      /* Perform the multiply-accumulate */\n      acc0 += x1 * c0;\n      acc1 += x2 * c0;\n      acc2 += x3 * c0;\n      acc3 += x4 * c0;\n      acc4 += x5 * c0;\n      acc5 += x6 * c0;\n      acc6 += x7 * c0;\n      acc7 += x0 * c0;\n\n      /* Read the b[numTaps-3] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-5] sample */\n      x1 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += x2 * c0;\n      acc1 += x3 * c0;\n      acc2 += x4 * c0;\n      acc3 += x5 * c0;\n      acc4 += x6 * c0;\n      acc5 += x7 * c0;\n      acc6 += x0 * c0;\n      acc7 += x1 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-6] sample */\n      x2 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += x3 * c0;\n      acc1 += x4 * c0;\n      acc2 += x5 * c0;\n      acc3 += x6 * c0;\n      acc4 += x7 * c0;\n      acc5 += x0 * c0;\n      acc6 += x1 * c0;\n      acc7 += x2 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-6] sample */\n      x3 = *(px++);\n      /* Perform the multiply-accumulates */\n      acc0 += x4 * c0;\n      acc1 += x5 * c0;\n      acc2 += x6 * c0;\n      acc3 += x7 * c0;\n      acc4 += x0 * c0;\n      acc5 += x1 * c0;\n      acc6 += x2 * c0;\n      acc7 += x3 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-6] sample */\n      x4 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += x5 * c0;\n      acc1 += x6 * c0;\n      acc2 += x7 * c0;\n      acc3 += x0 * c0;\n      acc4 += x1 * c0;\n      acc5 += x2 * c0;\n      acc6 += x3 * c0;\n      acc7 += x4 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-6] sample */\n      x5 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += x6 * c0;\n      acc1 += x7 * c0;\n      acc2 += x0 * c0;\n      acc3 += x1 * c0;\n      acc4 += x2 * c0;\n      acc5 += x3 * c0;\n      acc6 += x4 * c0;\n      acc7 += x5 * c0;\n\n      /* Read the b[numTaps-4] coefficient */\n      c0 = *(pb++);\n\n      /* Read x[n-numTaps-6] sample */\n      x6 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += x7 * c0;\n      acc1 += x0 * c0;\n      acc2 += x1 * c0;\n      acc3 += x2 * c0;\n      acc4 += x3 * c0;\n      acc5 += x4 * c0;\n      acc6 += x5 * c0;\n      acc7 += x6 * c0;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    tapCnt = numTaps % 0x8U;\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *(pb++);\n\n      /* Fetch 1 state variable */\n      x7 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += x0 * c0;\n      acc1 += x1 * c0;\n      acc2 += x2 * c0;\n      acc3 += x3 * c0;\n      acc4 += x4 * c0;\n      acc5 += x5 * c0;\n      acc6 += x6 * c0;\n      acc7 += x7 * c0;\n\n      /* Reuse the present sample states for next sample */\n      x0 = x1;\n      x1 = x2;\n      x2 = x3;\n      x3 = x4;\n      x4 = x5;\n      x5 = x6;\n      x6 = x7;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by 8 to process the next group of 8 samples */\n    pState = pState + 8;\n\n    /* The results in the 8 accumulators, store in the destination buffer. */\n    *pDst++ = acc0;\n    *pDst++ = acc1;\n    *pDst++ = acc2;\n    *pDst++ = acc3;\n    *pDst++ = acc4;\n    *pDst++ = acc5;\n    *pDst++ = acc6;\n    *pDst++ = acc7;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining output samples */\n  blkCnt = blockSize % 0x8U;\n\n#else\n\n  /* Initialize blkCnt with number of taps */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy one sample at a time into state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set the accumulator to zero */\n    acc0 = 0.0f;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize Coefficient pointer */\n    pb = pCoeffs;\n\n    i = numTaps;\n\n    /* Perform the multiply-accumulates */\n    do {\n      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] +\n       * b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */\n      acc0 += *px++ * *pb++;\n\n      i--;\n    } while (i > 0U);\n\n    /* Store result in destination buffer. */\n    *pDst++ = acc0;\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCurnt = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Calculate remaining number of copies */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy remaining data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_fast_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_fast_q15.c\n * Description:  Q15 Fast FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 FIR filter (fast version).\n  @param[in]     S          points to an instance of the Q15 FIR filter\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This fast version uses a 32-bit accumulator with 2.30 format.\n                   The accumulator maintains full precision of the intermediate\n  multiplication results but provides only a single guard bit. Thus, if the\n  accumulator result overflows it wraps around and distorts the result. In order\n  to avoid overflows completely the input signal must be scaled down by\n  log2(numTaps) bits. The 2.30 accumulator is then truncated to 2.15 format and\n  saturated to yield the 1.15 result.\n\n  @remark\n                   Refer to \\ref arm_fir_q15() for a slower implementation of\n  this function which uses 64-bit accumulation to avoid wrap around distortion.\n  Both the slow and the fast versions use the same instance structure. Use\n  function \\ref arm_fir_init_q15() to initialize the filter structure.\n */\n\nvoid arm_fir_fast_q15(const arm_fir_instance_q15 *S, const q15_t *pSrc,\n                      q15_t *pDst, uint32_t blockSize) {\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCurnt; /* Points to the current sample of the state */\n  q15_t *px;          /* Temporary pointer for state buffer */\n  const q15_t *pb;    /* Temporary pointer for coefficient buffer */\n  q31_t acc0;         /* Accumulators */\n  uint32_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter */\n  uint32_t tapCnt, blkCnt; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc1, acc2, acc3; /* Accumulators */\n  q31_t x0, x1, x2,\n      c0; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* S->pState points to state array which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 output values simultaneously.\n   * The variables acc0 ... acc3 hold output values that are being computed:\n   *\n   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] +\n   * b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] acc1 =  b[numTaps-1] *\n   * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] *\n   * x[n-numTaps-2] +...+ b[0] * x[1] acc2 =  b[numTaps-1] * x[n-numTaps+1] +\n   * b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] *\n   * x[2] acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1]\n   * + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]\n   */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Copy 4 new input samples into the state buffer. */\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set all accumulators to zero */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */\n    px = pState;\n\n    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t\n     */\n    pb = pCoeffs;\n\n    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */\n    x0 = read_q15x2_ia(&px);\n\n    /* Read the third and forth samples from the state buffer: x[n-N-2],\n     * x[n-N-3] */\n    x2 = read_q15x2_ia(&px);\n\n    /* Loop over the number of taps.  Unroll by a factor of 4.\n       Repeat until we've computed numTaps-(numTaps%4) coefficients. */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the first two coefficients using SIMD:  b[N] and b[N-1]\n       * coefficients */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */\n      acc0 = __SMLAD(x0, c0, acc0);\n\n      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */\n      acc2 = __SMLAD(x2, c0, acc2);\n\n      /* pack  x[n-N-1] and x[n-N-2] */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x2, x0, 0);\n#else\n      x1 = __PKHBT(x0, x2, 0);\n#endif\n\n      /* Read state x[n-N-4], x[n-N-5] */\n      x0 = read_q15x2_ia(&px);\n\n      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */\n      acc1 = __SMLADX(x1, c0, acc1);\n\n      /* pack  x[n-N-3] and x[n-N-4] */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x0, x2, 0);\n#else\n      x1 = __PKHBT(x2, x0, 0);\n#endif\n\n      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */\n      acc3 = __SMLADX(x1, c0, acc3);\n\n      /* Read coefficients b[N-2], b[N-3] */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */\n      acc0 = __SMLAD(x2, c0, acc0);\n\n      /* Read state x[n-N-6], x[n-N-7] with offset */\n      x2 = read_q15x2_ia(&px);\n\n      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */\n      acc2 = __SMLAD(x0, c0, acc2);\n\n      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */\n      acc1 = __SMLADX(x1, c0, acc1);\n\n      /* pack  x[n-N-5] and x[n-N-6] */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x2, x0, 0);\n#else\n      x1 = __PKHBT(x0, x2, 0);\n#endif\n\n      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */\n      acc3 = __SMLADX(x1, c0, acc3);\n\n      /* Decrement tap count */\n      tapCnt--;\n    }\n\n    /* If the filter length is not a multiple of 4, compute the remaining filter\n       taps. This is always be 2 taps since the filter length is even. */\n    if ((numTaps & 0x3U) != 0U) {\n      /* Read last two coefficients */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Perform the multiply-accumulates */\n      acc0 = __SMLAD(x0, c0, acc0);\n      acc2 = __SMLAD(x2, c0, acc2);\n\n      /* pack state variables */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x2, x0, 0);\n#else\n      x1 = __PKHBT(x0, x2, 0);\n#endif\n\n      /* Read last state variables */\n      x0 = read_q15x2(px);\n\n      /* Perform the multiply-accumulates */\n      acc1 = __SMLADX(x1, c0, acc1);\n\n      /* pack state variables */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x0, x2, 0);\n#else\n      x1 = __PKHBT(x2, x0, 0);\n#endif\n\n      /* Perform the multiply-accumulates */\n      acc3 = __SMLADX(x1, c0, acc3);\n    }\n\n    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15\n       with saturation. Then store the 4 outputs in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(\n        &pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));\n    write_q15x2_ia(\n        &pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));\n#else\n    write_q15x2_ia(\n        &pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));\n    write_q15x2_ia(\n        &pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* Advance the state pointer by 4 to process the next group of 4 samples */\n    pState = pState + 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining output samples */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of taps */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy two samples into state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set the accumulator to zero */\n    acc0 = 0;\n\n    /* Use SIMD to hold states and coefficients */\n    px = pState;\n    pb = pCoeffs;\n\n    tapCnt = numTaps >> 1U;\n\n    do {\n      acc0 += (q31_t)*px++ * *pb++;\n      acc0 += (q31_t)*px++ * *pb++;\n\n      tapCnt--;\n    } while (tapCnt > 0U);\n\n    /* The result is in 2.30 format. Convert to 1.15 with saturation.\n       Then store the output in the destination buffer. */\n    *pDst++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCurnt = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Calculate remaining number of copies */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy remaining data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_fast_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_fast_q31.c\n * Description:  Processing function for the Q31 Fast FIR filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 FIR filter (fast version).\n  @param[in]     S          points to an instance of the Q31 structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   This function is optimized for speed at the expense of\n fixed-point precision and overflow protection. The result of each 1.31 x 1.31\n multiplication is truncated to 2.30 format. These intermediate results are\n added to a 2.30 accumulator. Finally, the accumulator is saturated and\n converted to a 1.31 result. The fast version has the same overflow behavior as\n the standard version and provides less precision since it discards the low 32\n bits of each multiplication result. In order to avoid overflows completely the\n input signal must be scaled down by log2(numTaps) bits.\n\n @remark\n                   Refer to \\ref arm_fir_q31() for a slower implementation of\n this function which uses a 64-bit accumulator to provide higher precision. Both\n the slow and the fast versions use the same instance structure. Use function\n \\ref arm_fir_init_q31() to initialize the filter structure.\n */\n\nIAR_ONLY_LOW_OPTIMIZATION_ENTER\nvoid arm_fir_fast_q31(const arm_fir_instance_q31 *S, const q31_t *pSrc,\n                      q31_t *pDst, uint32_t blockSize) {\n  q31_t *pState = S->pState;         /* State pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *pStateCurnt; /* Points to the current sample of the state */\n  q31_t *px;          /* Temporary pointer for state buffer */\n  const q31_t *pb;    /* Temporary pointer for coefficient buffer */\n  q31_t acc0;         /* Accumulators */\n  uint32_t numTaps =\n      S->numTaps;             /* Number of filter coefficients in the filter */\n  uint32_t i, tapCnt, blkCnt; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc1, acc2, acc3; /* Accumulators */\n  q31_t x0, x1, x2, x3,\n      c0; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* S->pState points to state array which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 output values simultaneously.\n   * The variables acc0 ... acc3 hold output values that are being computed:\n   *\n   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] +\n   * b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] acc1 =  b[numTaps-1] *\n   * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] *\n   * x[n-numTaps-2] +...+ b[0] * x[1] acc2 =  b[numTaps-1] * x[n-numTaps+1] +\n   * b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] *\n   * x[2] acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1]\n   * + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]\n   */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Copy 4 new input samples into the state buffer. */\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set all accumulators to zero */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Read the first 3 samples from the state buffer:\n     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */\n    x0 = *px++;\n    x1 = *px++;\n    x2 = *px++;\n\n    /* Loop unrolling. Process 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    /* Loop over the number of taps.  Unroll by a factor of 4.\n       Repeat until we've computed numTaps-4 coefficients. */\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps] coefficient */\n      c0 = *pb;\n\n      /* Read x[n-numTaps-3] sample */\n      x3 = *px;\n\n      /* acc0 +=  b[numTaps] * x[n-numTaps] */\n      multAcc_32x32_keep32_R(acc0, x0, c0);\n\n      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */\n      multAcc_32x32_keep32_R(acc1, x1, c0);\n\n      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */\n      multAcc_32x32_keep32_R(acc2, x2, c0);\n\n      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */\n      multAcc_32x32_keep32_R(acc3, x3, c0);\n\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *(pb + 1U);\n\n      /* Read x[n-numTaps-4] sample */\n      x0 = *(px + 1U);\n\n      /* Perform the multiply-accumulates */\n      multAcc_32x32_keep32_R(acc0, x1, c0);\n      multAcc_32x32_keep32_R(acc1, x2, c0);\n      multAcc_32x32_keep32_R(acc2, x3, c0);\n      multAcc_32x32_keep32_R(acc3, x0, c0);\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *(pb + 2U);\n\n      /* Read x[n-numTaps-5] sample */\n      x1 = *(px + 2U);\n\n      /* Perform the multiply-accumulates */\n      multAcc_32x32_keep32_R(acc0, x2, c0);\n      multAcc_32x32_keep32_R(acc1, x3, c0);\n      multAcc_32x32_keep32_R(acc2, x0, c0);\n      multAcc_32x32_keep32_R(acc3, x1, c0);\n\n      /* Read the b[numTaps-3] coefficients */\n      c0 = *(pb + 3U);\n\n      /* Read x[n-numTaps-6] sample */\n      x2 = *(px + 3U);\n\n      /* Perform the multiply-accumulates */\n      multAcc_32x32_keep32_R(acc0, x3, c0);\n      multAcc_32x32_keep32_R(acc1, x0, c0);\n      multAcc_32x32_keep32_R(acc2, x1, c0);\n      multAcc_32x32_keep32_R(acc3, x2, c0);\n\n      /* update coefficient pointer */\n      pb += 4U;\n      px += 4U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* If the filter length is not a multiple of 4, compute the remaining filter\n     * taps */\n    tapCnt = numTaps % 0x4U;\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *(pb++);\n\n      /* Fetch 1 state variable */\n      x3 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      multAcc_32x32_keep32_R(acc0, x0, c0);\n      multAcc_32x32_keep32_R(acc1, x1, c0);\n      multAcc_32x32_keep32_R(acc2, x2, c0);\n      multAcc_32x32_keep32_R(acc3, x3, c0);\n\n      /* Reuse the present sample states for next sample */\n      x0 = x1;\n      x1 = x2;\n      x2 = x3;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31\n       Then store the 4 outputs in the destination buffer. */\n    *pDst++ = (q31_t)(acc0 << 1);\n    *pDst++ = (q31_t)(acc1 << 1);\n    *pDst++ = (q31_t)(acc2 << 1);\n    *pDst++ = (q31_t)(acc3 << 1);\n\n    /* Advance the state pointer by 4 to process the next group of 4 samples */\n    pState = pState + 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining output samples */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of taps */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy one sample at a time into state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set the accumulator to zero */\n    acc0 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize Coefficient pointer */\n    pb = pCoeffs;\n\n    i = numTaps;\n\n    /* Perform the multiply-accumulates */\n    do {\n      multAcc_32x32_keep32_R(acc0, (*px++), (*pb++));\n      i--;\n    } while (i > 0U);\n\n    /* The result is in 2.30 format. Convert to 1.31\n       Then store the output in the destination buffer. */\n    *pDst++ = (q31_t)(acc0 << 1);\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCurnt = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Calculate remaining number of copies */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy remaining data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement the loop counter */\n    tapCnt--;\n  }\n}\nIAR_ONLY_LOW_OPTIMIZATION_EXIT\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_init_f32.c\n * Description:  Floating-point FIR filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point FIR filter.\n  @param[in,out] S          points to an instance of the floating-point FIR\n  filter structure\n  @param[in] \t numTaps    number of filter coefficients in the filter\n  @param[in]     pCoeffs    points to the filter coefficients buffer\n  @param[in]     pState     points to the state buffer\n  @param[in]     blockSize  number of samples processed per call\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to the array of state variables.\n                   pState is of length\n  numTaps+blockSize-1 samples, where blockSize is the\n  number of input samples processed by each call to arm_fir_f32().\n */\n\nvoid arm_fir_init_f32(arm_fir_instance_f32 *S, uint16_t numTaps,\n                      const float32_t *pCoeffs, float32_t *pState,\n                      uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_init_q15.c\n * Description:  Q15 FIR filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 FIR filter.\n  @param[in,out] S          points to an instance of the Q15 FIR filter\n  structure.\n  @param[in] \t numTaps    number of filter coefficients in the filter. Must be\n  even and greater than or equal to 4.\n  @param[in]     pCoeffs    points to the filter coefficients buffer.\n  @param[in]     pState     points to the state buffer.\n  @param[in]     blockSize  number of samples processed per call.\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : numTaps is not\n  greater than or equal to 4 and even\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n                   Note that numTaps must be even and greater than\n  or equal to 4. To implement an odd length filter simply increase\n  numTaps by 1 and set the last coefficient to zero. For example,\n  to implement a filter with numTaps=3 and coefficients 
 {0.3,\n  -0.8, 0.3}\n  
\n                   set numTaps=4 and use the coefficients:\n  
\n      {0.3, -0.8, 0.3, 0}.\n  
\n                   Similarly, to implement a two point filter\n  
\n      {0.3, -0.3}\n  
\n                   set numTaps=4 and use the coefficients:\n  
\n      {0.3, -0.3, 0, 0}.\n  
\n                   pState points to the array of state variables.\n                   pState is of length\n  numTaps+blockSize, when running on Cortex-M4 and Cortex-M3  and\n  is of length numTaps+blockSize-1, when running on Cortex-M0 where\n  blockSize is the number of input samples processed by each call\n  to arm_fir_q15().\n */\n\narm_status arm_fir_init_q15(arm_fir_instance_q15 *S, uint16_t numTaps,\n                            const q15_t *pCoeffs, q15_t *pState,\n                            uint32_t blockSize) {\n  arm_status status;\n\n#if defined(ARM_MATH_DSP)\n\n  /* The Number of filter coefficients in the filter must be even and at least 4\n   */\n  if (numTaps & 0x1U) {\n    status = ARM_MATH_ARGUMENT_ERROR;\n  } else {\n    /* Assign filter taps */\n    S->numTaps = numTaps;\n\n    /* Assign coefficient pointer */\n    S->pCoeffs = pCoeffs;\n\n    /* Clear the state buffer.  The size is always (blockSize + numTaps ) */\n    memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));\n\n    /* Assign state pointer */\n    S->pState = pState;\n\n    status = ARM_MATH_SUCCESS;\n  }\n\n  return (status);\n\n#else\n\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n\n  status = ARM_MATH_SUCCESS;\n\n  return (status);\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_init_q31.c\n * Description:  Q31 FIR filter initialization function.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 FIR filter.\n  @param[in,out] S          points to an instance of the Q31 FIR filter\n  structure\n  @param[in] \t numTaps    number of filter coefficients in the filter\n  @param[in]     pCoeffs    points to the filter coefficients buffer\n  @param[in]     pState     points to the state buffer\n  @param[in]     blockSize  number of samples processed\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n                   pState points to the array of state variables.\n                   pState is of length\n  numTaps+blockSize-1 samples, where blockSize is the\n  number of input samples processed by each call to arm_fir_q31().\n */\n\nvoid arm_fir_init_q31(arm_fir_instance_q31 *S, uint16_t numTaps,\n                      const q31_t *pCoeffs, q31_t *pState, uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_init_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_init_q7.c\n * Description:  Q7 FIR filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q7 FIR filter.\n  @param[in,out] S          points to an instance of the Q7 FIR filter structure\n  @param[in] \t numTaps    number of filter coefficients in the filter\n  @param[in]     pCoeffs    points to the filter coefficients buffer\n  @param[in]     pState     points to the state buffer\n  @param[in]     blockSize  number of samples processed\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to the array of state variables.\n                   pState is of length\n  numTaps+blockSize-1 samples, where blockSize is the\n  number of input samples processed by each call to arm_fir_q7().\n */\n\nvoid arm_fir_init_q7(arm_fir_instance_q7 *S, uint16_t numTaps,\n                     const q7_t *pCoeffs, q7_t *pState, uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q7_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_interpolate_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_interpolate_f32.c\n * Description:  Floating-point FIR interpolation sequences\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator\n\n  These functions combine an upsampler (zero stuffer) and an FIR filter.\n  They are used in multirate systems for increasing the sample rate of a signal\n  without introducing high frequency images. Conceptually, the functions are\n  equivalent to the block diagram below: \\image html FIRInterpolator.gif\n  \"Components included in the FIR Interpolator functions\" After upsampling by a\n  factor of L, the signal should be filtered by a lowpass filter\n  with a normalized cutoff frequency of 1/L in order to eliminate\n  high frequency copies of the spectrum. The user of the function is responsible\n  for providing the filter coefficients.\n\n  The FIR interpolator functions provided in the CMSIS DSP Library combine the\n  upsampler and FIR filter in an efficient manner. The upsampler inserts\n  L-1 zeros between each sample. Instead of multiplying by these\n  zero values, the FIR filter is designed to skip them. This leads to an\n  efficient implementation without any wasted effort. The functions operate on\n  blocks of input and output data. pSrc points to an array of\n  blockSize input values and pDst points to an array\n  of blockSize*L output values.\n\n  The library provides separate functions for Q15, Q31, and floating-point data\n  types.\n\n  @par           Algorithm\n                   The functions use a polyphase filter structure:\n  
\n      y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] *\n  x[n-phaseLength+1] y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... +\n  b[L*(phaseLength-1)+1] * x[n-phaseLength+1]\n      ...\n      y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+\n  b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]\n  
\n                   This approach is more efficient than straightforward\n  upsample-then-filter algorithms. With this method the computation is reduced\n  by a factor of 1/L when compared to using a standard FIR filter.\n  @par\n                   pCoeffs points to a coefficient array of size\n  numTaps. numTaps must be a multiple of the\n  interpolation factor L and this is checked by the initialization\n  functions. Internally, the function divides the FIR filter's impulse response\n  into shorter filters of length phaseLength=numTaps/L.\n                   Coefficients are stored in time reversed order.\n  
\n      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to a state array of size\n  blockSize + phaseLength - 1. Samples in the state buffer are\n  stored in the order: 
 {x[n-phaseLength+1], x[n-phaseLength],\n  x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}\n  
\n  @par\n                   The state variables are updated after each block of data is\n  processed, the coefficients are untouched.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter. Coefficient arrays may be shared among several\n  instances while state variable array should be allocated separately. There are\n  separate instance structure declarations for each of the 3 supported data\n  types.\n\n  @par           Initialization Functions\n                   There is also an associated initialization function for each\n  data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   - Checks to make sure that the length of the filter is a\n  multiple of the interpolation factor. To do this manually without calling the\n  init function, assign the follow subfields of the instance structure: L\n  (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set\n  all of the values in pState to zero.\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. The code below statically initializes each of the 3\n  different data type filter instance structures 
\n      arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};\n      arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};\n      arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};\n  
\n  @par\n                   where L is the interpolation factor;\n  phaseLength=numTaps/L is the length of each of the shorter FIR\n  filters used internally, pCoeffs is the address of the\n  coefficient buffer; pState is the address of the state buffer. Be\n  sure to set the values in the state buffer to zeros when doing static\n  initialization.\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the fixed-point versions of the\n  FIR interpolate filter functions. In particular, the overflow and saturation\n  behavior of the accumulator used in each function must be considered. Refer to\n  the function specific documentation below for usage guidelines.\n */\n\n/**\n  @addtogroup FIR_Interpolate\n  @{\n */\n\n/**\n  @brief         Processing function for floating-point FIR interpolator.\n  @param[in]     S          points to an instance of the floating-point FIR\n  interpolator structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_fir_interpolate_f32(const arm_fir_interpolate_instance_f32 *S,\n                             const float32_t *pSrc, float32_t *pDst,\n                             uint32_t blockSize) {\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  float32_t *pState = S->pState;         /* State pointer */\n  const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t *pStateCur;       /* Points to the current sample of the state */\n  float32_t *ptr1;            /* Temporary pointer for state buffer */\n  const float32_t *ptr2;      /* Temporary pointer for coefficient buffer */\n  float32_t sum0;             /* Accumulators */\n  uint32_t i, blkCnt, tapCnt; /* Loop counters */\n  uint32_t phaseLen =\n      S->phaseLength; /* Length of each polyphase filter component */\n  uint32_t j;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t acc0, acc1, acc2, acc3;\n  float32_t x0, x1, x2, x3;\n  float32_t c0, c1, c2, c3;\n#endif\n\n  /* S->pState buffer contains previous frame (phaseLen - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (phaseLen - 1U);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n\n    /* Address modifier index of coefficient buffer */\n    j = 1U;\n\n    /* Loop over the Interpolation factor. */\n    i = (S->L);\n\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      acc0 = 0.0f;\n      acc1 = 0.0f;\n      acc2 = 0.0f;\n      acc3 = 0.0f;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (S->L - j);\n\n      /* Loop over the polyPhase length. Unroll by a factor of 4.\n         Repeat until we've computed numTaps-(4*S->L) coefficients. */\n      tapCnt = phaseLen >> 2U;\n\n      x0 = *(ptr1++);\n      x1 = *(ptr1++);\n      x2 = *(ptr1++);\n\n      while (tapCnt > 0U) {\n        /* Read the input sample */\n        x3 = *(ptr1++);\n\n        /* Read the coefficient */\n        c0 = *(ptr2);\n\n        /* Perform the multiply-accumulate */\n        acc0 += x0 * c0;\n        acc1 += x1 * c0;\n        acc2 += x2 * c0;\n        acc3 += x3 * c0;\n\n        /* Read the coefficient */\n        c1 = *(ptr2 + S->L);\n\n        /* Read the input sample */\n        x0 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += x1 * c1;\n        acc1 += x2 * c1;\n        acc2 += x3 * c1;\n        acc3 += x0 * c1;\n\n        /* Read the coefficient */\n        c2 = *(ptr2 + S->L * 2);\n\n        /* Read the input sample */\n        x1 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += x2 * c2;\n        acc1 += x3 * c2;\n        acc2 += x0 * c2;\n        acc3 += x1 * c2;\n\n        /* Read the coefficient */\n        c3 = *(ptr2 + S->L * 3);\n\n        /* Read the input sample */\n        x2 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += x3 * c3;\n        acc1 += x0 * c3;\n        acc2 += x1 * c3;\n        acc3 += x2 * c3;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += 4 * S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* If the polyPhase length is not a multiple of 4, compute the remaining\n       * filter taps */\n      tapCnt = phaseLen % 0x4U;\n\n      while (tapCnt > 0U) {\n        /* Read the input sample */\n        x3 = *(ptr1++);\n\n        /* Read the coefficient */\n        c0 = *(ptr2);\n\n        /* Perform the multiply-accumulate */\n        acc0 += x0 * c0;\n        acc1 += x1 * c0;\n        acc2 += x2 * c0;\n        acc3 += x3 * c0;\n\n        /* Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* update states for next sample processing */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* The result is in the accumulator, store in the destination buffer. */\n      *(pDst) = acc0;\n      *(pDst + S->L) = acc1;\n      *(pDst + 2 * S->L) = acc2;\n      *(pDst + 3 * S->L) = acc3;\n\n      pDst++;\n\n      /* Increment the address modifier index of coefficient buffer */\n      j++;\n\n      /* Decrement loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 4;\n\n    pDst += S->L * 3;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n\n    /* Address modifier index of coefficient buffer */\n    j = 1U;\n\n    /* Loop over the Interpolation factor. */\n    i = S->L;\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      sum0 = 0.0f;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (S->L - j);\n\n      /* Loop over the polyPhase length.\n         Repeat until we've computed numTaps-(4*S->L) coefficients. */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      tapCnt = phaseLen >> 2U;\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += *ptr1++ * *ptr2;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        sum0 += *ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        sum0 += *ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        sum0 += *ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      tapCnt = phaseLen % 0x4U;\n\n#else\n\n      /* Initialize tapCnt with number of samples */\n      tapCnt = phaseLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += *ptr1++ * *ptr2;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* The result is in the accumulator, store in the destination buffer. */\n      *pDst++ = sum0;\n\n      /* Increment the address modifier index of coefficient buffer */\n      j++;\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 1;\n\n    /* Decrement the loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  tapCnt = (phaseLen - 1U) >> 2U;\n\n  /* copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  tapCnt = (phaseLen - 1U) % 0x04U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (phaseLen - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  float32_t *pState = S->pState;         /* State pointer */\n  const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t *pStateCur;       /* Points to the current sample of the state */\n  float32_t *ptr1;            /* Temporary pointer for state buffer */\n  const float32_t *ptr2;      /* Temporary pointer for coefficient buffer */\n  float32_t sum0;             /* Accumulators */\n  uint32_t i, blkCnt, tapCnt; /* Loop counters */\n  uint32_t phaseLen =\n      S->phaseLength; /* Length of each polyphase filter component */\n\n  /* S->pState buffer contains previous frame (phaseLen - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (phaseLen - 1U);\n\n  /* Total number of intput samples */\n  blkCnt = blockSize;\n\n  /* Loop over the blockSize. */\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n\n    /* Loop over the Interpolation factor. */\n    i = S->L;\n\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      sum0 = 0.0f;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (i - 1U);\n\n      /* Loop over the polyPhase length */\n      tapCnt = phaseLen;\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += *ptr1++ * *ptr2;\n\n        /* Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* Decrement the loop counter */\n        tapCnt--;\n      }\n\n      /* The result is in the accumulator, store in the destination buffer. */\n      *pDst++ = sum0;\n\n      /* Decrement loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 1;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.\n   ** This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n  tapCnt = phaseLen - 1U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of FIR_Interpolate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_interpolate_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_interpolate_init_f32.c\n * Description:  Floating-point FIR interpolator initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Interpolate\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point FIR\n  interpolator.\n  @param[in,out] S         points to an instance of the floating-point FIR\n  interpolator structure\n  @param[in]     L         upsample factor\n  @param[in]     numTaps   number of filter coefficients in the filter\n  @param[in]     pCoeffs   points to the filter coefficient buffer\n  @param[in]     pState    points to the state buffer\n  @param[in]     blockSize number of input samples to process per call\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : filter length\n  numTaps is not a multiple of the interpolation factor\n  L\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[numTaps-2], ..., b[1], b[0]}\n  
\n  @par\n                   The length of the filter numTaps must be a\n  multiple of the interpolation factor L.\n  @par\n                   pState points to the array of state variables.\n                   pState is of length\n  (numTaps/L)+blockSize-1 words where blockSize is the\n  number of input samples processed by each call to\n  arm_fir_interpolate_f32().\n */\n\narm_status arm_fir_interpolate_init_f32(arm_fir_interpolate_instance_f32 *S,\n                                        uint8_t L, uint16_t numTaps,\n                                        const float32_t *pCoeffs,\n                                        float32_t *pState, uint32_t blockSize) {\n  arm_status status;\n\n  /* The filter length must be a multiple of the interpolation factor */\n  if ((numTaps % L) != 0U) {\n    /* Set status as ARM_MATH_LENGTH_ERROR */\n    status = ARM_MATH_LENGTH_ERROR;\n  } else {\n    /* Assign coefficient pointer */\n    S->pCoeffs = pCoeffs;\n\n    /* Assign Interpolation factor */\n    S->L = L;\n\n    /* Assign polyPhaseLength */\n    S->phaseLength = numTaps / L;\n\n    /* Clear state buffer and size of buffer is always phaseLength + blockSize -\n     * 1 */\n    memset(pState, 0,\n           (blockSize + ((uint32_t)S->phaseLength - 1U)) * sizeof(float32_t));\n\n    /* Assign state pointer */\n    S->pState = pState;\n\n    status = ARM_MATH_SUCCESS;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of FIR_Interpolate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_interpolate_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_interpolate_init_q15.c\n * Description:  Q15 FIR interpolator initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Interpolate\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 FIR interpolator.\n  @param[in,out] S         points to an instance of the Q15 FIR interpolator\n  structure\n  @param[in]     L         upsample factor\n  @param[in]     numTaps   number of filter coefficients in the filter\n  @param[in]     pCoeffs   points to the filter coefficient buffer\n  @param[in]     pState    points to the state buffer\n  @param[in]     blockSize number of input samples to process per call\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : filter length\n  numTaps is not a multiple of the interpolation factor\n  L\n\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[numTaps-2], ..., b[1], b[0]}\n  
\n                   The length of the filter numTaps must be a\n  multiple of the interpolation factor L.\n  @par\n                   pState points to the array of state variables.\n                   pState is of length\n  (numTaps/L)+blockSize-1 words where blockSize is the\n  number of input samples processed by each call to\n  arm_fir_interpolate_q15().\n */\n\narm_status arm_fir_interpolate_init_q15(arm_fir_interpolate_instance_q15 *S,\n                                        uint8_t L, uint16_t numTaps,\n                                        const q15_t *pCoeffs, q15_t *pState,\n                                        uint32_t blockSize) {\n  arm_status status;\n\n  /* The filter length must be a multiple of the interpolation factor */\n  if ((numTaps % L) != 0U) {\n    /* Set status as ARM_MATH_LENGTH_ERROR */\n    status = ARM_MATH_LENGTH_ERROR;\n  } else {\n    /* Assign coefficient pointer */\n    S->pCoeffs = pCoeffs;\n\n    /* Assign Interpolation factor */\n    S->L = L;\n\n    /* Assign polyPhaseLength */\n    S->phaseLength = numTaps / L;\n\n    /* Clear state buffer and size of buffer is always phaseLength + blockSize -\n     * 1 */\n    memset(pState, 0,\n           (blockSize + ((uint32_t)S->phaseLength - 1U)) * sizeof(q15_t));\n\n    /* Assign state pointer */\n    S->pState = pState;\n\n    status = ARM_MATH_SUCCESS;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of FIR_Interpolate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_interpolate_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_interpolate_init_q31.c\n * Description:  Q31 FIR interpolator initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Interpolate\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 FIR interpolator.\n  @param[in,out] S         points to an instance of the Q31 FIR interpolator\n  structure\n  @param[in]     L         upsample factor\n  @param[in]     numTaps   number of filter coefficients in the filter\n  @param[in]     pCoeffs   points to the filter coefficient buffer\n  @param[in]     pState    points to the state buffer\n  @param[in]     blockSize number of input samples to process per call\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : filter length\n  numTaps is not a multiple of the interpolation factor\n  L\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[numTaps-2], ..., b[1], b[0]}\n  
\n                   The length of the filter numTaps must be a\n  multiple of the interpolation factor L.\n  @par\n                   pState points to the array of state variables.\n                   pState is of length\n  (numTaps/L)+blockSize-1 words where blockSize is the\n  number of input samples processed by each call to\n  arm_fir_interpolate_q31().\n */\n\narm_status arm_fir_interpolate_init_q31(arm_fir_interpolate_instance_q31 *S,\n                                        uint8_t L, uint16_t numTaps,\n                                        const q31_t *pCoeffs, q31_t *pState,\n                                        uint32_t blockSize) {\n  arm_status status;\n\n  /* The filter length must be a multiple of the interpolation factor */\n  if ((numTaps % L) != 0U) {\n    /* Set status as ARM_MATH_LENGTH_ERROR */\n    status = ARM_MATH_LENGTH_ERROR;\n  } else {\n    /* Assign coefficient pointer */\n    S->pCoeffs = pCoeffs;\n\n    /* Assign Interpolation factor */\n    S->L = L;\n\n    /* Assign polyPhaseLength */\n    S->phaseLength = numTaps / L;\n\n    /* Clear state buffer and size of buffer is always phaseLength + blockSize -\n     * 1 */\n    memset(pState, 0,\n           (blockSize + ((uint32_t)S->phaseLength - 1U)) * sizeof(q31_t));\n\n    /* Assign state pointer */\n    S->pState = pState;\n\n    status = ARM_MATH_SUCCESS;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of FIR_Interpolate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_interpolate_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_interpolate_q15.c\n * Description:  Q15 FIR interpolation\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Interpolate\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 FIR interpolator.\n  @param[in]     S          points to an instance of the Q15 FIR interpolator\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. Both coefficients and state variables are represented in 1.15\n  format and multiplications yield a 2.30 result. The 2.30 intermediate results\n  are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of\n  internal overflow with this approach and the full precision of intermediate\n  multiplications is preserved. After all additions have been performed, the\n  accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly,\n  the accumulator is saturated to yield a result in 1.15 format.\n */\n\nvoid arm_fir_interpolate_q15(const arm_fir_interpolate_instance_q15 *S,\n                             const q15_t *pSrc, q15_t *pDst,\n                             uint32_t blockSize) {\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCur;           /* Points to the current sample of the state */\n  q15_t *ptr1;                /* Temporary pointer for state buffer */\n  const q15_t *ptr2;          /* Temporary pointer for coefficient buffer */\n  q63_t sum0;                 /* Accumulators */\n  uint32_t i, blkCnt, tapCnt; /* Loop counters */\n  uint32_t phaseLen =\n      S->phaseLength; /* Length of each polyphase filter component */\n  uint32_t j;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc0, acc1, acc2, acc3;\n  q15_t x0, x1, x2, x3;\n  q15_t c0, c1, c2, c3;\n#endif\n\n  /* S->pState buffer contains previous frame (phaseLen - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (phaseLen - 1U);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n\n    /* Address modifier index of coefficient buffer */\n    j = 1U;\n\n    /* Loop over the Interpolation factor. */\n    i = (S->L);\n\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (S->L - j);\n\n      /* Loop over the polyPhase length. Unroll by a factor of 4.\n         Repeat until we've computed numTaps-(4*S->L) coefficients. */\n      tapCnt = phaseLen >> 2U;\n\n      x0 = *(ptr1++);\n      x1 = *(ptr1++);\n      x2 = *(ptr1++);\n\n      while (tapCnt > 0U) {\n        /* Read the input sample */\n        x3 = *(ptr1++);\n\n        /* Read the coefficient */\n        c0 = *(ptr2);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x0 * c0;\n        acc1 += (q63_t)x1 * c0;\n        acc2 += (q63_t)x2 * c0;\n        acc3 += (q63_t)x3 * c0;\n\n        /* Read the coefficient */\n        c1 = *(ptr2 + S->L);\n\n        /* Read the input sample */\n        x0 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x1 * c1;\n        acc1 += (q63_t)x2 * c1;\n        acc2 += (q63_t)x3 * c1;\n        acc3 += (q63_t)x0 * c1;\n\n        /* Read the coefficient */\n        c2 = *(ptr2 + S->L * 2);\n\n        /* Read the input sample */\n        x1 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x2 * c2;\n        acc1 += (q63_t)x3 * c2;\n        acc2 += (q63_t)x0 * c2;\n        acc3 += (q63_t)x1 * c2;\n\n        /* Read the coefficient */\n        c3 = *(ptr2 + S->L * 3);\n\n        /* Read the input sample */\n        x2 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x3 * c3;\n        acc1 += (q63_t)x0 * c3;\n        acc2 += (q63_t)x1 * c3;\n        acc3 += (q63_t)x2 * c3;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += 4 * S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* If the polyPhase length is not a multiple of 4, compute the remaining\n       * filter taps */\n      tapCnt = phaseLen % 0x4U;\n\n      while (tapCnt > 0U) {\n        /* Read the input sample */\n        x3 = *(ptr1++);\n\n        /* Read the coefficient */\n        c0 = *(ptr2);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x0 * c0;\n        acc1 += (q63_t)x1 * c0;\n        acc2 += (q63_t)x2 * c0;\n        acc3 += (q63_t)x3 * c0;\n\n        /* Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* update states for next sample processing */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* The result is in the accumulator, store in the destination buffer. */\n      *(pDst) = (q15_t)(__SSAT((acc0 >> 15), 16));\n      *(pDst + S->L) = (q15_t)(__SSAT((acc1 >> 15), 16));\n      *(pDst + 2 * S->L) = (q15_t)(__SSAT((acc2 >> 15), 16));\n      *(pDst + 3 * S->L) = (q15_t)(__SSAT((acc3 >> 15), 16));\n\n      pDst++;\n\n      /* Increment the address modifier index of coefficient buffer */\n      j++;\n\n      /* Decrement loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 4;\n\n    pDst += S->L * 3;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n\n    /* Address modifier index of coefficient buffer */\n    j = 1U;\n\n    /* Loop over the Interpolation factor. */\n    i = S->L;\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      sum0 = 0;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (S->L - j);\n\n      /* Loop over the polyPhase length.\n         Repeat until we've computed numTaps-(4*S->L) coefficients. */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      tapCnt = phaseLen >> 2U;\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      tapCnt = phaseLen % 0x4U;\n\n#else\n\n      /* Initialize tapCnt with number of samples */\n      tapCnt = phaseLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* The result is in the accumulator, store in the destination buffer. */\n      *pDst++ = (q15_t)(__SSAT((sum0 >> 15), 16));\n\n      /* Increment the address modifier index of coefficient buffer */\n      j++;\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 1;\n\n    /* Decrement the loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  tapCnt = (phaseLen - 1U) >> 2U;\n\n  /* copy data */\n  while (tapCnt > 0U) {\n    write_q15x2_ia(&pStateCur, read_q15x2_ia(&pState));\n    write_q15x2_ia(&pStateCur, read_q15x2_ia(&pState));\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  tapCnt = (phaseLen - 1U) % 0x04U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (phaseLen - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCur;           /* Points to the current sample of the state */\n  q15_t *ptr1;                /* Temporary pointer for state buffer */\n  const q15_t *ptr2;          /* Temporary pointer for coefficient buffer */\n  q63_t sum0;                 /* Accumulators */\n  uint32_t i, blkCnt, tapCnt; /* Loop counters */\n  uint32_t phaseLen =\n      S->phaseLength; /* Length of each polyphase filter component */\n\n  /* S->pState buffer contains previous frame (phaseLen - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (phaseLen - 1U);\n\n  /* Total number of intput samples */\n  blkCnt = blockSize;\n\n  /* Loop over the blockSize. */\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n\n    /* Loop over the Interpolation factor. */\n    i = S->L;\n\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      sum0 = 0;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (i - 1U);\n\n      /* Loop over the polyPhase length */\n      tapCnt = phaseLen;\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += ((q63_t)*ptr1++ * *ptr2);\n\n        /* Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* Decrement the loop counter */\n        tapCnt--;\n      }\n\n      /* Store the result after converting to 1.15 format in the destination\n       * buffer. */\n      *pDst++ = (q15_t)(__SSAT((sum0 >> 15), 16));\n\n      /* Decrement loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 1;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.\n   ** This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n  tapCnt = phaseLen - 1U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of FIR_Interpolate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_interpolate_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_interpolate_q31.c\n * Description:  Q31 FIR interpolation\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Interpolate\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 FIR interpolator.\n  @param[in]     S          points to an instance of the Q31 FIR interpolator\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The accumulator has a 2.62 format and maintains full precision of\n  the intermediate multiplication results but provides only a single guard bit.\n                   Thus, if the accumulator result overflows it wraps around\n  rather than clip. In order to avoid overflows completely the input signal must\n  be scaled down by 1/(numTaps/L). since numTaps/L\n  additions occur per output sample. After all multiply-accumulates are\n  performed, the 2.62 accumulator is truncated to 1.32 format and then saturated\n  to 1.31 format.\n */\n\nvoid arm_fir_interpolate_q31(const arm_fir_interpolate_instance_q31 *S,\n                             const q31_t *pSrc, q31_t *pDst,\n                             uint32_t blockSize) {\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n  q31_t *pState = S->pState;         /* State pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *pStateCur;           /* Points to the current sample of the state */\n  q31_t *ptr1;                /* Temporary pointer for state buffer */\n  const q31_t *ptr2;          /* Temporary pointer for coefficient buffer */\n  q63_t sum0;                 /* Accumulators */\n  uint32_t i, blkCnt, tapCnt; /* Loop counters */\n  uint32_t phaseLen =\n      S->phaseLength; /* Length of each polyphase filter component */\n  uint32_t j;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc0, acc1, acc2, acc3;\n  q31_t x0, x1, x2, x3;\n  q31_t c0, c1, c2, c3;\n#endif\n\n  /* S->pState buffer contains previous frame (phaseLen - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (phaseLen - 1U);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n    *pStateCur++ = *pSrc++;\n\n    /* Address modifier index of coefficient buffer */\n    j = 1U;\n\n    /* Loop over the Interpolation factor. */\n    i = (S->L);\n\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      acc0 = 0;\n      acc1 = 0;\n      acc2 = 0;\n      acc3 = 0;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (S->L - j);\n\n      /* Loop over the polyPhase length. Unroll by a factor of 4.\n         Repeat until we've computed numTaps-(4*S->L) coefficients. */\n      tapCnt = phaseLen >> 2U;\n\n      x0 = *(ptr1++);\n      x1 = *(ptr1++);\n      x2 = *(ptr1++);\n\n      while (tapCnt > 0U) {\n        /* Read the input sample */\n        x3 = *(ptr1++);\n\n        /* Read the coefficient */\n        c0 = *(ptr2);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x0 * c0;\n        acc1 += (q63_t)x1 * c0;\n        acc2 += (q63_t)x2 * c0;\n        acc3 += (q63_t)x3 * c0;\n\n        /* Read the coefficient */\n        c1 = *(ptr2 + S->L);\n\n        /* Read the input sample */\n        x0 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x1 * c1;\n        acc1 += (q63_t)x2 * c1;\n        acc2 += (q63_t)x3 * c1;\n        acc3 += (q63_t)x0 * c1;\n\n        /* Read the coefficient */\n        c2 = *(ptr2 + S->L * 2);\n\n        /* Read the input sample */\n        x1 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x2 * c2;\n        acc1 += (q63_t)x3 * c2;\n        acc2 += (q63_t)x0 * c2;\n        acc3 += (q63_t)x1 * c2;\n\n        /* Read the coefficient */\n        c3 = *(ptr2 + S->L * 3);\n\n        /* Read the input sample */\n        x2 = *(ptr1++);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x3 * c3;\n        acc1 += (q63_t)x0 * c3;\n        acc2 += (q63_t)x1 * c3;\n        acc3 += (q63_t)x2 * c3;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += 4 * S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* If the polyPhase length is not a multiple of 4, compute the remaining\n       * filter taps */\n      tapCnt = phaseLen % 0x4U;\n\n      while (tapCnt > 0U) {\n        /* Read the input sample */\n        x3 = *(ptr1++);\n\n        /* Read the coefficient */\n        c0 = *(ptr2);\n\n        /* Perform the multiply-accumulate */\n        acc0 += (q63_t)x0 * c0;\n        acc1 += (q63_t)x1 * c0;\n        acc2 += (q63_t)x2 * c0;\n        acc3 += (q63_t)x3 * c0;\n\n        /* Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* update states for next sample processing */\n        x0 = x1;\n        x1 = x2;\n        x2 = x3;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* The result is in the accumulator, store in the destination buffer. */\n      *(pDst) = (q31_t)(acc0 >> 31);\n      *(pDst + S->L) = (q31_t)(acc1 >> 31);\n      *(pDst + 2 * S->L) = (q31_t)(acc2 >> 31);\n      *(pDst + 3 * S->L) = (q31_t)(acc3 >> 31);\n\n      pDst++;\n\n      /* Increment the address modifier index of coefficient buffer */\n      j++;\n\n      /* Decrement loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 4;\n\n    pDst += S->L * 3;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n\n    /* Address modifier index of coefficient buffer */\n    j = 1U;\n\n    /* Loop over the Interpolation factor. */\n    i = S->L;\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      sum0 = 0;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (S->L - j);\n\n      /* Loop over the polyPhase length.\n         Repeat until we've computed numTaps-(4*S->L) coefficients. */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      tapCnt = phaseLen >> 2U;\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n        ptr2 += S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      tapCnt = phaseLen % 0x4U;\n\n#else\n\n      /* Initialize tapCnt with number of samples */\n      tapCnt = phaseLen;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += (q63_t)*ptr1++ * *ptr2;\n\n        /* Upsampling is done by stuffing L-1 zeros between each sample.\n         * So instead of multiplying zeros with coefficients,\n         * Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* Decrement loop counter */\n        tapCnt--;\n      }\n\n      /* The result is in the accumulator, store in the destination buffer. */\n      *pDst++ = (q31_t)(sum0 >> 31);\n\n      /* Increment the address modifier index of coefficient buffer */\n      j++;\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 1;\n\n    /* Decrement the loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  tapCnt = (phaseLen - 1U) >> 2U;\n\n  /* copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  tapCnt = (phaseLen - 1U) % 0x04U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (phaseLen - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  q31_t *pState = S->pState;         /* State pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *pStateCur;           /* Points to the current sample of the state */\n  q31_t *ptr1;                /* Temporary pointer for state buffer */\n  const q31_t *ptr2;          /* Temporary pointer for coefficient buffer */\n  q63_t sum0;                 /* Accumulators */\n  uint32_t i, blkCnt, tapCnt; /* Loop counters */\n  uint32_t phaseLen =\n      S->phaseLength; /* Length of each polyphase filter component */\n\n  /* S->pState buffer contains previous frame (phaseLen - 1) samples */\n  /* pStateCur points to the location where the new input data should be written\n   */\n  pStateCur = S->pState + (phaseLen - 1U);\n\n  /* Total number of intput samples */\n  blkCnt = blockSize;\n\n  /* Loop over the blockSize. */\n  while (blkCnt > 0U) {\n    /* Copy new input sample into the state buffer */\n    *pStateCur++ = *pSrc++;\n\n    /* Loop over the Interpolation factor. */\n    i = S->L;\n\n    while (i > 0U) {\n      /* Set accumulator to zero */\n      sum0 = 0;\n\n      /* Initialize state pointer */\n      ptr1 = pState;\n\n      /* Initialize coefficient pointer */\n      ptr2 = pCoeffs + (i - 1U);\n\n      /* Loop over the polyPhase length */\n      tapCnt = phaseLen;\n\n      while (tapCnt > 0U) {\n        /* Perform the multiply-accumulate */\n        sum0 += ((q63_t)*ptr1++ * *ptr2);\n\n        /* Increment the coefficient pointer by interpolation factor times. */\n        ptr2 += S->L;\n\n        /* Decrement the loop counter */\n        tapCnt--;\n      }\n\n      /* The result is in the accumulator, store in the destination buffer. */\n      *pDst++ = (q31_t)(sum0 >> 31);\n\n      /* Decrement loop counter */\n      i--;\n    }\n\n    /* Advance the state pointer by 1\n     * to process the next group of interpolation factor number samples */\n    pState = pState + 1;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.\n   ** This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCur = S->pState;\n\n  tapCnt = phaseLen - 1U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of FIR_Interpolate group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_lattice_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_lattice_f32.c\n * Description:  Processing function for floating-point FIR Lattice filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters\n\n  This set of functions implements Finite Impulse Response (FIR) lattice filters\n  for Q15, Q31 and floating-point data types.  Lattice filters are used in a\n  variety of adaptive filter applications. The filter structure is feedforward\n  and the net impulse response is finite length. The functions operate on blocks\n  of input and output data and each call to the function processes\n  blockSize samples through the filter.  pSrc and\n  pDst point to input and output arrays containing\n  blockSize values.\n\n  @par           Algorithm\n                   \\image html FIRLattice.gif \"Finite Impulse Response Lattice\n  filter\" The following difference equation is implemented:\n  @par\n  
\n      f0[n] = g0[n] = x[n]\n      fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M\n      gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M\n      y[n] = fM[n]\n  
\n  @par\n                   pCoeffs points to tha array of reflection\n  coefficients of size numStages. Reflection Coefficients are\n  stored in the following order.\n  @par\n  
\n      {k1, k2, ..., kM}\n  
\n                   where M is number of stages\n  @par\n                   pState points to a state array of size\n  numStages. The state variables (g values) hold previous inputs\n  and are stored in the following order. 
 {g0[n], g1[n], g2[n] ...gM-1[n]}\n  
\n                   The state variables are updated after each block of data is\n  processed; the coefficients are untouched.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter. Coefficient arrays may be shared among several\n  instances while state variable arrays cannot be shared. There are separate\n  instance structure declarations for each of the 3 supported data types.\n\n  @par           Initialization Functions\n                   There is also an associated initialization function for each\n  data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n  the follow subfields of the instance structure: numStages, pCoeffs, pState.\n  Also set all of the values in pState to zero.\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Set the values in the state buffer to zeros and then\n  manually initialize the instance structure as follows: 
\n      arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};\n      arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};\n      arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};\n  
\n  @par\n                   where numStages is the number of stages in the\n  filter; pState is the address of the state buffer;\n                   pCoeffs is the address of the coefficient\n  buffer.\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the fixed-point versions of the\n  FIR Lattice filter functions. In particular, the overflow and saturation\n  behavior of the accumulator used in each function must be considered. Refer to\n  the function specific documentation below for usage guidelines.\n */\n\n/**\n  @addtogroup FIR_Lattice\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point FIR lattice filter.\n  @param[in]     S          points to an instance of the floating-point FIR\n  lattice structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_fir_lattice_f32(const arm_fir_lattice_instance_f32 *S,\n                         const float32_t *pSrc, float32_t *pDst,\n                         uint32_t blockSize) {\n  float32_t *pState = S->pState;            /* State pointer */\n  const float32_t *pCoeffs = S->pCoeffs;    /* Coefficient pointer */\n  float32_t *px;                            /* Temporary state pointer */\n  const float32_t *pk;                      /* Temporary coefficient pointer */\n  uint32_t numStages = S->numStages;        /* Number of stages in the filter */\n  uint32_t blkCnt, stageCnt;                /* Loop counters */\n  float32_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t fcurr1, fnext1,\n      gnext1; /* Temporary variables for second sample in loop unrolling */\n  float32_t fcurr2, fnext2,\n      gnext2; /* Temporary variables for third sample in loop unrolling */\n  float32_t fcurr3, fnext3,\n      gnext3; /* Temporary variables for fourth sample in loop unrolling */\n#endif\n\n  gcurr0 = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Read two samples from input buffer */\n    /* f0(n) = x(n) */\n    fcurr0 = *pSrc++;\n    fcurr1 = *pSrc++;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pk = pCoeffs;\n\n    /* Read g0(n-1) from state buffer */\n    gcurr0 = *px;\n\n    /* Process first sample for first tap */\n    /* f1(n) = f0(n) +  K1 * g0(n-1) */\n    fnext0 = (gcurr0 * (*pk)) + fcurr0;\n\n    /* g1(n) = f0(n) * K1  +  g0(n-1) */\n    gnext0 = (fcurr0 * (*pk)) + gcurr0;\n\n    /* Process second sample for first tap */\n    fnext1 = (fcurr0 * (*pk)) + fcurr1;\n    gnext1 = (fcurr1 * (*pk)) + fcurr0;\n\n    /* Read next two samples from input buffer */\n    /* f0(n+2) = x(n+2) */\n    fcurr2 = *pSrc++;\n    fcurr3 = *pSrc++;\n\n    /* Process third sample for first tap */\n    fnext2 = (fcurr1 * (*pk)) + fcurr2;\n    gnext2 = (fcurr2 * (*pk)) + fcurr1;\n\n    /* Process fourth sample for first tap */\n    fnext3 = (fcurr2 * (*pk)) + fcurr3;\n    gnext3 = (fcurr3 * (*pk++)) + fcurr2;\n\n    /* Copy only last input sample into the state buffer\n       which will be used for next samples processing */\n    *px++ = fcurr3;\n\n    /* Update of f values for next coefficient set processing */\n    fcurr0 = fnext0;\n    fcurr1 = fnext1;\n    fcurr2 = fnext2;\n    fcurr3 = fnext3;\n\n    /* Loop unrolling.  Process 4 taps at a time . */\n    stageCnt = (numStages - 1U) >> 2U;\n\n    /* Loop over the number of taps.  Unroll by a factor of 4.\n       Repeat until we've computed numStages-3 coefficients. */\n\n    /* Process 2nd, 3rd, 4th and 5th taps ... here */\n    while (stageCnt > 0U) {\n      /* Read g1(n-1), g3(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = gnext3;\n\n      /* Process first sample for 2nd, 6th .. tap */\n      /* Sample processing for K2, K6.... */\n      /* f2(n) = f1(n) +  K2 * g1(n-1) */\n      fnext0 = (gcurr0 * (*pk)) + fcurr0;\n\n      /* Process second sample for 2nd, 6th .. tap */\n      /* for sample 2 processing */\n      fnext1 = (gnext0 * (*pk)) + fcurr1;\n\n      /* Process third sample for 2nd, 6th .. tap */\n      fnext2 = (gnext1 * (*pk)) + fcurr2;\n\n      /* Process fourth sample for 2nd, 6th .. tap */\n      fnext3 = (gnext2 * (*pk)) + fcurr3;\n\n      /* g2(n) = f1(n) * K2  +  g1(n-1) */\n      /* Calculation of state values for next stage */\n      gnext3 = (fcurr3 * (*pk)) + gnext2;\n\n      gnext2 = (fcurr2 * (*pk)) + gnext1;\n\n      gnext1 = (fcurr1 * (*pk)) + gnext0;\n\n      gnext0 = (fcurr0 * (*pk++)) + gcurr0;\n\n      /* Read g2(n-1), g4(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g2(n) in state buffer */\n      *px++ = gnext3;\n\n      /* Sample processing for K3, K7.... */\n      /* Process first sample for 3rd, 7th .. tap */\n      /* f3(n) = f2(n) +  K3 * g2(n-1) */\n      fcurr0 = (gcurr0 * (*pk)) + fnext0;\n\n      /* Process second sample for 3rd, 7th .. tap */\n      fcurr1 = (gnext0 * (*pk)) + fnext1;\n\n      /* Process third sample for 3rd, 7th .. tap */\n      fcurr2 = (gnext1 * (*pk)) + fnext2;\n\n      /* Process fourth sample for 3rd, 7th .. tap */\n      fcurr3 = (gnext2 * (*pk)) + fnext3;\n\n      /* Calculation of state values for next stage */\n      /* g3(n) = f2(n) * K3  +  g2(n-1) */\n      gnext3 = (fnext3 * (*pk)) + gnext2;\n\n      gnext2 = (fnext2 * (*pk)) + gnext1;\n\n      gnext1 = (fnext1 * (*pk)) + gnext0;\n\n      gnext0 = (fnext0 * (*pk++)) + gcurr0;\n\n      /* Read g1(n-1), g3(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g3(n) in state buffer */\n      *px++ = gnext3;\n\n      /* Sample processing for K4, K8.... */\n      /* Process first sample for 4th, 8th .. tap */\n      /* f4(n) = f3(n) +  K4 * g3(n-1) */\n      fnext0 = (gcurr0 * (*pk)) + fcurr0;\n\n      /* Process second sample for 4th, 8th .. tap */\n      /* for sample 2 processing */\n      fnext1 = (gnext0 * (*pk)) + fcurr1;\n\n      /* Process third sample for 4th, 8th .. tap */\n      fnext2 = (gnext1 * (*pk)) + fcurr2;\n\n      /* Process fourth sample for 4th, 8th .. tap */\n      fnext3 = (gnext2 * (*pk)) + fcurr3;\n\n      /* g4(n) = f3(n) * K4  +  g3(n-1) */\n      /* Calculation of state values for next stage */\n      gnext3 = (fcurr3 * (*pk)) + gnext2;\n\n      gnext2 = (fcurr2 * (*pk)) + gnext1;\n\n      gnext1 = (fcurr1 * (*pk)) + gnext0;\n\n      gnext0 = (fcurr0 * (*pk++)) + gcurr0;\n\n      /* Read g2(n-1), g4(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g4(n) in state buffer */\n      *px++ = gnext3;\n\n      /* Sample processing for K5, K9.... */\n      /* Process first sample for 5th, 9th .. tap */\n      /* f5(n) = f4(n) +  K5 * g4(n-1) */\n      fcurr0 = (gcurr0 * (*pk)) + fnext0;\n\n      /* Process second sample for 5th, 9th .. tap */\n      fcurr1 = (gnext0 * (*pk)) + fnext1;\n\n      /* Process third sample for 5th, 9th .. tap */\n      fcurr2 = (gnext1 * (*pk)) + fnext2;\n\n      /* Process fourth sample for 5th, 9th .. tap */\n      fcurr3 = (gnext2 * (*pk)) + fnext3;\n\n      /* Calculation of state values for next stage */\n      /* g5(n) = f4(n) * K5  +  g4(n-1) */\n      gnext3 = (fnext3 * (*pk)) + gnext2;\n\n      gnext2 = (fnext2 * (*pk)) + gnext1;\n\n      gnext1 = (fnext1 * (*pk)) + gnext0;\n\n      gnext0 = (fnext0 * (*pk++)) + gcurr0;\n\n      stageCnt--;\n    }\n\n    /* If the (filter length -1) is not a multiple of 4, compute the remaining\n     * filter taps */\n    stageCnt = (numStages - 1U) % 0x4U;\n\n    while (stageCnt > 0U) {\n      gcurr0 = *px;\n\n      /* save g value in state buffer */\n      *px++ = gnext3;\n\n      /* Process four samples for last three taps here */\n      fnext0 = (gcurr0 * (*pk)) + fcurr0;\n\n      fnext1 = (gnext0 * (*pk)) + fcurr1;\n\n      fnext2 = (gnext1 * (*pk)) + fcurr2;\n\n      fnext3 = (gnext2 * (*pk)) + fcurr3;\n\n      /* g1(n) = f0(n) * K1  +  g0(n-1) */\n      gnext3 = (fcurr3 * (*pk)) + gnext2;\n\n      gnext2 = (fcurr2 * (*pk)) + gnext1;\n\n      gnext1 = (fcurr1 * (*pk)) + gnext0;\n\n      gnext0 = (fcurr0 * (*pk++)) + gcurr0;\n\n      /* Update of f values for next coefficient set processing */\n      fcurr0 = fnext0;\n      fcurr1 = fnext1;\n      fcurr2 = fnext2;\n      fcurr3 = fnext3;\n\n      stageCnt--;\n    }\n\n    /* The results in the 4 accumulators, store in the destination buffer. */\n    /* y(n) = fN(n) */\n    *pDst++ = fcurr0;\n    *pDst++ = fcurr1;\n    *pDst++ = fcurr2;\n    *pDst++ = fcurr3;\n\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* f0(n) = x(n) */\n    fcurr0 = *pSrc++;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pk = pCoeffs;\n\n    /* read g2(n) from state buffer */\n    gcurr0 = *px;\n\n    /* for sample 1 processing */\n    /* f1(n) = f0(n) +  K1 * g0(n-1) */\n    fnext0 = (gcurr0 * (*pk)) + fcurr0;\n\n    /* g1(n) = f0(n) * K1  +  g0(n-1) */\n    gnext0 = (fcurr0 * (*pk++)) + gcurr0;\n\n    /* save g1(n) in state buffer */\n    *px++ = fcurr0;\n\n    /* f1(n) is saved in fcurr0 for next stage processing */\n    fcurr0 = fnext0;\n\n    stageCnt = (numStages - 1U);\n\n    /* stage loop */\n    while (stageCnt > 0U) {\n      /* read g2(n) from state buffer */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = gnext0;\n\n      /* Sample processing for K2, K3.... */\n      /* f2(n) = f1(n) +  K2 * g1(n-1) */\n      fnext0 = (gcurr0 * (*pk)) + fcurr0;\n\n      /* g2(n) = f1(n) * K2  +  g1(n-1) */\n      gnext0 = (fcurr0 * (*pk++)) + gcurr0;\n\n      /* f1(n) is saved in fcurr0 for next stage processing */\n      fcurr0 = fnext0;\n\n      stageCnt--;\n    }\n\n    /* y(n) = fN(n) */\n    *pDst++ = fcurr0;\n\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of FIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_lattice_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_lattice_init_f32.c\n * Description:  Floating-point FIR Lattice filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Lattice\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point FIR lattice\n  filter.\n  @param[in]     S          points to an instance of the floating-point FIR\n  lattice structure\n  @param[in]     numStages  number of filter stages\n  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of\n  length numStages\n  @param[in]     pState     points to the state buffer.  The array is of length\n  numStages\n  @return        none\n */\n\nvoid arm_fir_lattice_init_f32(arm_fir_lattice_instance_f32 *S,\n                              uint16_t numStages, const float32_t *pCoeffs,\n                              float32_t *pState) {\n  /* Assign filter taps */\n  S->numStages = numStages;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always numStages */\n  memset(pState, 0, (numStages) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_lattice_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_lattice_init_q15.c\n * Description:  Q15 FIR Lattice filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Lattice\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 FIR lattice filter.\n  @param[in]     S          points to an instance of the Q15 FIR lattice\n  structure\n  @param[in]     numStages  number of filter stages\n  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of\n  length numStages\n  @param[in]     pState     points to the state buffer.  The array is of length\n  numStages\n  @return        none\n */\n\nvoid arm_fir_lattice_init_q15(arm_fir_lattice_instance_q15 *S,\n                              uint16_t numStages, const q15_t *pCoeffs,\n                              q15_t *pState) {\n  /* Assign filter taps */\n  S->numStages = numStages;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always numStages */\n  memset(pState, 0, (numStages) * sizeof(q15_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_lattice_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_lattice_init_q31.c\n * Description:  Q31 FIR lattice filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Lattice\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 FIR lattice filter.\n  @param[in]     S          points to an instance of the Q31 FIR lattice\n  structure\n  @param[in]     numStages  number of filter stages\n  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of\n  length numStages\n  @param[in]     pState     points to the state buffer.  The array is of length\n  numStages\n  @return        none\n */\n\nvoid arm_fir_lattice_init_q31(arm_fir_lattice_instance_q31 *S,\n                              uint16_t numStages, const q31_t *pCoeffs,\n                              q31_t *pState) {\n  /* Assign filter taps */\n  S->numStages = numStages;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always numStages */\n  memset(pState, 0, (numStages) * sizeof(q31_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_lattice_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_lattice_q15.c\n * Description:  Q15 FIR lattice filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Lattice\n  @{\n */\n\n/**\n  @brief         Processing function for Q15 FIR lattice filter.\n  @param[in]     S          points to an instance of the Q15 FIR lattice\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_fir_lattice_q15(const arm_fir_lattice_instance_q15 *S,\n                         const q15_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  q15_t *pState = S->pState;            /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs;    /* Coefficient pointer */\n  q15_t *px;                            /* Temporary state pointer */\n  const q15_t *pk;                      /* Temporary coefficient pointer */\n  uint32_t numStages = S->numStages;    /* Number of stages in the filter */\n  uint32_t blkCnt, stageCnt;            /* Loop counters */\n  q31_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t fcurr1, fnext1,\n      gnext1; /* Temporary variables for second sample in loop unrolling */\n  q31_t fcurr2, fnext2,\n      gnext2; /* Temporary variables for third sample in loop unrolling */\n  q31_t fcurr3, fnext3,\n      gnext3; /* Temporary variables for fourth sample in loop unrolling */\n#endif\n\n  gcurr0 = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Read two samples from input buffer */\n    /* f0(n) = x(n) */\n    fcurr0 = *pSrc++;\n    fcurr1 = *pSrc++;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pk = pCoeffs;\n\n    /* Read g0(n-1) from state buffer */\n    gcurr0 = *px;\n\n    /* Process first sample for first tap */\n    /* f1(n) = f0(n) +  K1 * g0(n-1) */\n    fnext0 = (q31_t)((gcurr0 * (*pk)) >> 15U) + fcurr0;\n    fnext0 = __SSAT(fnext0, 16);\n\n    /* g1(n) = f0(n) * K1  +  g0(n-1) */\n    gnext0 = (q31_t)((fcurr0 * (*pk)) >> 15U) + gcurr0;\n    gnext0 = __SSAT(gnext0, 16);\n\n    /* Process second sample for first tap */\n    fnext1 = (q31_t)((fcurr0 * (*pk)) >> 15U) + fcurr1;\n    fnext1 = __SSAT(fnext1, 16);\n    gnext1 = (q31_t)((fcurr1 * (*pk)) >> 15U) + fcurr0;\n    gnext1 = __SSAT(gnext1, 16);\n\n    /* Read next two samples from input buffer */\n    /* f0(n+2) = x(n+2) */\n    fcurr2 = *pSrc++;\n    fcurr3 = *pSrc++;\n\n    /* Process third sample for first tap */\n    fnext2 = (q31_t)((fcurr1 * (*pk)) >> 15U) + fcurr2;\n    fnext2 = __SSAT(fnext2, 16);\n    gnext2 = (q31_t)((fcurr2 * (*pk)) >> 15U) + fcurr1;\n    gnext2 = __SSAT(gnext2, 16);\n\n    /* Process fourth sample for first tap */\n    fnext3 = (q31_t)((fcurr2 * (*pk)) >> 15U) + fcurr3;\n    fnext3 = __SSAT(fnext3, 16);\n    gnext3 = (q31_t)((fcurr3 * (*pk++)) >> 15U) + fcurr2;\n    gnext3 = __SSAT(gnext3, 16);\n\n    /* Copy only last input sample into the state buffer\n       which will be used for next samples processing */\n    *px++ = (q15_t)fcurr3;\n\n    /* Update of f values for next coefficient set processing */\n    fcurr0 = fnext0;\n    fcurr1 = fnext1;\n    fcurr2 = fnext2;\n    fcurr3 = fnext3;\n\n    /* Loop unrolling.  Process 4 taps at a time . */\n    stageCnt = (numStages - 1U) >> 2U;\n\n    /* Loop over the number of taps.  Unroll by a factor of 4.\n       Repeat until we've computed numStages-3 coefficients. */\n\n    /* Process 2nd, 3rd, 4th and 5th taps ... here */\n    while (stageCnt > 0U) {\n      /* Read g1(n-1), g3(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = (q15_t)gnext3;\n\n      /* Process first sample for 2nd, 6th .. tap */\n      /* Sample processing for K2, K6.... */\n      /* f1(n) = f0(n) +  K1 * g0(n-1) */\n      fnext0 = (q31_t)((gcurr0 * (*pk)) >> 15U) + fcurr0;\n      fnext0 = __SSAT(fnext0, 16);\n\n      /* Process second sample for 2nd, 6th .. tap */\n      /* for sample 2 processing */\n      fnext1 = (q31_t)((gnext0 * (*pk)) >> 15U) + fcurr1;\n      fnext1 = __SSAT(fnext1, 16);\n\n      /* Process third sample for 2nd, 6th .. tap */\n      fnext2 = (q31_t)((gnext1 * (*pk)) >> 15U) + fcurr2;\n      fnext2 = __SSAT(fnext2, 16);\n\n      /* Process fourth sample for 2nd, 6th .. tap */\n      fnext3 = (q31_t)((gnext2 * (*pk)) >> 15U) + fcurr3;\n      fnext3 = __SSAT(fnext3, 16);\n\n      /* g1(n) = f0(n) * K1  +  g0(n-1) */\n      /* Calculation of state values for next stage */\n      gnext3 = (q31_t)((fcurr3 * (*pk)) >> 15U) + gnext2;\n      gnext3 = __SSAT(gnext3, 16);\n\n      gnext2 = (q31_t)((fcurr2 * (*pk)) >> 15U) + gnext1;\n      gnext2 = __SSAT(gnext2, 16);\n\n      gnext1 = (q31_t)((fcurr1 * (*pk)) >> 15U) + gnext0;\n      gnext1 = __SSAT(gnext1, 16);\n\n      gnext0 = (q31_t)((fcurr0 * (*pk++)) >> 15U) + gcurr0;\n      gnext0 = __SSAT(gnext0, 16);\n\n      /* Read g2(n-1), g4(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = (q15_t)gnext3;\n\n      /* Sample processing for K3, K7.... */\n      /* Process first sample for 3rd, 7th .. tap */\n      /* f3(n) = f2(n) +  K3 * g2(n-1) */\n      fcurr0 = (q31_t)((gcurr0 * (*pk)) >> 15U) + fnext0;\n      fcurr0 = __SSAT(fcurr0, 16);\n\n      /* Process second sample for 3rd, 7th .. tap */\n      fcurr1 = (q31_t)((gnext0 * (*pk)) >> 15U) + fnext1;\n      fcurr1 = __SSAT(fcurr1, 16);\n\n      /* Process third sample for 3rd, 7th .. tap */\n      fcurr2 = (q31_t)((gnext1 * (*pk)) >> 15U) + fnext2;\n      fcurr2 = __SSAT(fcurr2, 16);\n\n      /* Process fourth sample for 3rd, 7th .. tap */\n      fcurr3 = (q31_t)((gnext2 * (*pk)) >> 15U) + fnext3;\n      fcurr3 = __SSAT(fcurr3, 16);\n\n      /* Calculation of state values for next stage */\n      /* g3(n) = f2(n) * K3  +  g2(n-1) */\n      gnext3 = (q31_t)((fnext3 * (*pk)) >> 15U) + gnext2;\n      gnext3 = __SSAT(gnext3, 16);\n\n      gnext2 = (q31_t)((fnext2 * (*pk)) >> 15U) + gnext1;\n      gnext2 = __SSAT(gnext2, 16);\n\n      gnext1 = (q31_t)((fnext1 * (*pk)) >> 15U) + gnext0;\n      gnext1 = __SSAT(gnext1, 16);\n\n      gnext0 = (q31_t)((fnext0 * (*pk++)) >> 15U) + gcurr0;\n      gnext0 = __SSAT(gnext0, 16);\n\n      /* Read g1(n-1), g3(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = (q15_t)gnext3;\n\n      /* Sample processing for K4, K8.... */\n      /* Process first sample for 4th, 8th .. tap */\n      /* f4(n) = f3(n) +  K4 * g3(n-1) */\n      fnext0 = (q31_t)((gcurr0 * (*pk)) >> 15U) + fcurr0;\n      fnext0 = __SSAT(fnext0, 16);\n\n      /* Process second sample for 4th, 8th .. tap */\n      /* for sample 2 processing */\n      fnext1 = (q31_t)((gnext0 * (*pk)) >> 15U) + fcurr1;\n      fnext1 = __SSAT(fnext1, 16);\n\n      /* Process third sample for 4th, 8th .. tap */\n      fnext2 = (q31_t)((gnext1 * (*pk)) >> 15U) + fcurr2;\n      fnext2 = __SSAT(fnext2, 16);\n\n      /* Process fourth sample for 4th, 8th .. tap */\n      fnext3 = (q31_t)((gnext2 * (*pk)) >> 15U) + fcurr3;\n      fnext3 = __SSAT(fnext3, 16);\n\n      /* g4(n) = f3(n) * K4  +  g3(n-1) */\n      /* Calculation of state values for next stage */\n      gnext3 = (q31_t)((fcurr3 * (*pk)) >> 15U) + gnext2;\n      gnext3 = __SSAT(gnext3, 16);\n\n      gnext2 = (q31_t)((fcurr2 * (*pk)) >> 15U) + gnext1;\n      gnext2 = __SSAT(gnext2, 16);\n\n      gnext1 = (q31_t)((fcurr1 * (*pk)) >> 15U) + gnext0;\n      gnext1 = __SSAT(gnext1, 16);\n\n      gnext0 = (q31_t)((fcurr0 * (*pk++)) >> 15U) + gcurr0;\n      gnext0 = __SSAT(gnext0, 16);\n\n      /* Read g2(n-1), g4(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g4(n) in state buffer */\n      *px++ = (q15_t)gnext3;\n\n      /* Sample processing for K5, K9.... */\n      /* Process first sample for 5th, 9th .. tap */\n      /* f5(n) = f4(n) +  K5 * g4(n-1) */\n      fcurr0 = (q31_t)((gcurr0 * (*pk)) >> 15U) + fnext0;\n      fcurr0 = __SSAT(fcurr0, 16);\n\n      /* Process second sample for 5th, 9th .. tap */\n      fcurr1 = (q31_t)((gnext0 * (*pk)) >> 15U) + fnext1;\n      fcurr1 = __SSAT(fcurr1, 16);\n\n      /* Process third sample for 5th, 9th .. tap */\n      fcurr2 = (q31_t)((gnext1 * (*pk)) >> 15U) + fnext2;\n      fcurr2 = __SSAT(fcurr2, 16);\n\n      /* Process fourth sample for 5th, 9th .. tap */\n      fcurr3 = (q31_t)((gnext2 * (*pk)) >> 15U) + fnext3;\n      fcurr3 = __SSAT(fcurr3, 16);\n\n      /* Calculation of state values for next stage */\n      /* g5(n) = f4(n) * K5  +  g4(n-1) */\n      gnext3 = (q31_t)((fnext3 * (*pk)) >> 15U) + gnext2;\n      gnext3 = __SSAT(gnext3, 16);\n\n      gnext2 = (q31_t)((fnext2 * (*pk)) >> 15U) + gnext1;\n      gnext2 = __SSAT(gnext2, 16);\n\n      gnext1 = (q31_t)((fnext1 * (*pk)) >> 15U) + gnext0;\n      gnext1 = __SSAT(gnext1, 16);\n\n      gnext0 = (q31_t)((fnext0 * (*pk++)) >> 15U) + gcurr0;\n      gnext0 = __SSAT(gnext0, 16);\n\n      stageCnt--;\n    }\n\n    /* If the (filter length -1) is not a multiple of 4, compute the remaining\n     * filter taps */\n    stageCnt = (numStages - 1U) % 0x4U;\n\n    while (stageCnt > 0U) {\n      gcurr0 = *px;\n\n      /* save g value in state buffer */\n      *px++ = (q15_t)gnext3;\n\n      /* Process four samples for last three taps here */\n      fnext0 = (q31_t)((gcurr0 * (*pk)) >> 15U) + fcurr0;\n      fnext0 = __SSAT(fnext0, 16);\n\n      fnext1 = (q31_t)((gnext0 * (*pk)) >> 15U) + fcurr1;\n      fnext1 = __SSAT(fnext1, 16);\n\n      fnext2 = (q31_t)((gnext1 * (*pk)) >> 15U) + fcurr2;\n      fnext2 = __SSAT(fnext2, 16);\n\n      fnext3 = (q31_t)((gnext2 * (*pk)) >> 15U) + fcurr3;\n      fnext3 = __SSAT(fnext3, 16);\n\n      /* g1(n) = f0(n) * K1  +  g0(n-1) */\n      gnext3 = (q31_t)((fcurr3 * (*pk)) >> 15U) + gnext2;\n      gnext3 = __SSAT(gnext3, 16);\n\n      gnext2 = (q31_t)((fcurr2 * (*pk)) >> 15U) + gnext1;\n      gnext2 = __SSAT(gnext2, 16);\n\n      gnext1 = (q31_t)((fcurr1 * (*pk)) >> 15U) + gnext0;\n      gnext1 = __SSAT(gnext1, 16);\n\n      gnext0 = (q31_t)((fcurr0 * (*pk++)) >> 15U) + gcurr0;\n      gnext0 = __SSAT(gnext0, 16);\n\n      /* Update of f values for next coefficient set processing */\n      fcurr0 = fnext0;\n      fcurr1 = fnext1;\n      fcurr2 = fnext2;\n      fcurr3 = fnext3;\n\n      stageCnt--;\n    }\n\n    /* The results in the 4 accumulators, store in the destination buffer. */\n    /* y(n) = fN(n) */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(&pDst, __PKHBT(fcurr0, fcurr1, 16));\n    write_q15x2_ia(&pDst, __PKHBT(fcurr2, fcurr3, 16));\n#else\n    write_q15x2_ia(&pDst, __PKHBT(fcurr1, fcurr0, 16));\n    write_q15x2_ia(&pDst, __PKHBT(fcurr3, fcurr2, 16));\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* f0(n) = x(n) */\n    fcurr0 = *pSrc++;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pk = pCoeffs;\n\n    /* read g2(n) from state buffer */\n    gcurr0 = *px;\n\n    /* for sample 1 processing */\n    /* f1(n) = f0(n) +  K1 * g0(n-1) */\n    fnext0 = (((q31_t)gcurr0 * (*pk)) >> 15U) + fcurr0;\n    fnext0 = __SSAT(fnext0, 16);\n\n    /* g1(n) = f0(n) * K1  +  g0(n-1) */\n    gnext0 = (((q31_t)fcurr0 * (*pk++)) >> 15U) + gcurr0;\n    gnext0 = __SSAT(gnext0, 16);\n\n    /* save g1(n) in state buffer */\n    *px++ = (q15_t)fcurr0;\n\n    /* f1(n) is saved in fcurr0 for next stage processing */\n    fcurr0 = fnext0;\n\n    stageCnt = (numStages - 1U);\n\n    /* stage loop */\n    while (stageCnt > 0U) {\n      /* read g2(n) from state buffer */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = (q15_t)gnext0;\n\n      /* Sample processing for K2, K3.... */\n      /* f2(n) = f1(n) +  K2 * g1(n-1) */\n      fnext0 = (((q31_t)gcurr0 * (*pk)) >> 15U) + fcurr0;\n      fnext0 = __SSAT(fnext0, 16);\n\n      /* g2(n) = f1(n) * K2  +  g1(n-1) */\n      gnext0 = (((q31_t)fcurr0 * (*pk++)) >> 15U) + gcurr0;\n      gnext0 = __SSAT(gnext0, 16);\n\n      /* f1(n) is saved in fcurr0 for next stage processing */\n      fcurr0 = fnext0;\n\n      stageCnt--;\n    }\n\n    /* y(n) = fN(n) */\n    *pDst++ = __SSAT(fcurr0, 16);\n\n    blkCnt--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  blkCnt = blockSize;\n\n  while (blkCnt > 0U) {\n    /* f0(n) = x(n) */\n    fcurr0 = *pSrc++;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pk = pCoeffs;\n\n    /* read g0(n-1) from state buffer */\n    gcurr0 = *px;\n\n    /* for sample 1 processing */\n    /* f1(n) = f0(n) +  K1 * g0(n-1) */\n    fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;\n    fnext0 = __SSAT(fnext, 16);\n\n    /* g1(n) = f0(n) * K1  +  g0(n-1) */\n    gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;\n    gnext0 = __SSAT(gnext0, 16);\n\n    /* save f0(n) in state buffer */\n    *px++ = (q15_t)fcurr0;\n\n    /* f1(n) is saved in fcurr for next stage processing */\n    fcurr0 = fnext0;\n\n    stageCnt = (numStages - 1U);\n\n    /* stage loop */\n    while (stageCnt > 0U) {\n      /* read g1(n-1) from state buffer */\n      gcurr0 = *px;\n\n      /* save g0(n-1) in state buffer */\n      *px++ = (q15_t)gnext0;\n\n      /* Sample processing for K2, K3.... */\n      /* f2(n) = f1(n) +  K2 * g1(n-1) */\n      fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;\n      fnext0 = __SSAT(fnext0, 16);\n\n      /* g2(n) = f1(n) * K2  +  g1(n-1) */\n      gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;\n      gnext0 = __SSAT(gnext0, 16);\n\n      /* f1(n) is saved in fcurr0 for next stage processing */\n      fcurr0 = fnext0;\n\n      stageCnt--;\n    }\n\n    /* y(n) = fN(n) */\n    *pDst++ = __SSAT(fcurr0, 16);\n\n    blkCnt--;\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of FIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_lattice_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_lattice_q31.c\n * Description:  Q31 FIR lattice filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Lattice\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 FIR lattice filter.\n  @param[in]     S          points to an instance of the Q31 FIR lattice\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   In order to avoid overflows the input signal must be scaled\n  down by 2*log2(numStages) bits.\n */\n\nvoid arm_fir_lattice_q31(const arm_fir_lattice_instance_q31 *S,\n                         const q31_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  q31_t *pState = S->pState;            /* State pointer */\n  const q31_t *pCoeffs = S->pCoeffs;    /* Coefficient pointer */\n  q31_t *px;                            /* Temporary state pointer */\n  const q31_t *pk;                      /* Temporary coefficient pointer */\n  uint32_t numStages = S->numStages;    /* Number of stages in the filter */\n  uint32_t blkCnt, stageCnt;            /* Loop counters */\n  q31_t fcurr0, fnext0, gnext0, gcurr0; /* Temporary variables */\n\n#if (1)\n  //#if !defined(ARM_MATH_CM0_FAMILY)\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t fcurr1, fnext1,\n      gnext1; /* Temporary variables for second sample in loop unrolling */\n  q31_t fcurr2, fnext2,\n      gnext2; /* Temporary variables for third sample in loop unrolling */\n  q31_t fcurr3, fnext3,\n      gnext3; /* Temporary variables for fourth sample in loop unrolling */\n#endif\n\n  gcurr0 = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Read two samples from input buffer */\n    /* f0(n) = x(n) */\n    fcurr0 = *pSrc++;\n    fcurr1 = *pSrc++;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pk = pCoeffs;\n\n    /* Read g0(n-1) from state buffer */\n    gcurr0 = *px;\n\n    /* Process first sample for first tap */\n    /* f1(n) = f0(n) +  K1 * g0(n-1) */\n    fnext0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n    fnext0 = (fnext0 << 1U) + fcurr0;\n\n    /* g1(n) = f0(n) * K1  +  g0(n-1) */\n    gnext0 = (q31_t)(((q63_t)fcurr0 * (*pk)) >> 32U);\n    gnext0 = (gnext0 << 1U) + gcurr0;\n\n    /* Process second sample for first tap */\n    fnext1 = (q31_t)(((q63_t)fcurr0 * (*pk)) >> 32U);\n    fnext1 = (fnext1 << 1U) + fcurr1;\n    gnext1 = (q31_t)(((q63_t)fcurr1 * (*pk)) >> 32U);\n    gnext1 = (gnext1 << 1U) + fcurr0;\n\n    /* Read next two samples from input buffer */\n    /* f0(n+2) = x(n+2) */\n    fcurr2 = *pSrc++;\n    fcurr3 = *pSrc++;\n\n    /* Process third sample for first tap */\n    fnext2 = (q31_t)(((q63_t)fcurr1 * (*pk)) >> 32U);\n    fnext2 = (fnext2 << 1U) + fcurr2;\n    gnext2 = (q31_t)(((q63_t)fcurr2 * (*pk)) >> 32U);\n    gnext2 = (gnext2 << 1U) + fcurr1;\n\n    /* Process fourth sample for first tap */\n    fnext3 = (q31_t)(((q63_t)fcurr2 * (*pk)) >> 32U);\n    fnext3 = (fnext3 << 1U) + fcurr3;\n    gnext3 = (q31_t)(((q63_t)fcurr3 * (*pk++)) >> 32U);\n    gnext3 = (gnext3 << 1U) + fcurr2;\n\n    /* Copy only last input sample into the state buffer\n       which will be used for next samples processing */\n    *px++ = fcurr3;\n\n    /* Update of f values for next coefficient set processing */\n    fcurr0 = fnext0;\n    fcurr1 = fnext1;\n    fcurr2 = fnext2;\n    fcurr3 = fnext3;\n\n    /* Loop unrolling.  Process 4 taps at a time . */\n    stageCnt = (numStages - 1U) >> 2U;\n\n    /* Loop over the number of taps.  Unroll by a factor of 4.\n       Repeat until we've computed numStages-3 coefficients. */\n\n    /* Process 2nd, 3rd, 4th and 5th taps ... here */\n    while (stageCnt > 0U) {\n      /* Read g1(n-1), g3(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = gnext3;\n\n      /* Process first sample for 2nd, 6th .. tap */\n      /* Sample processing for K2, K6.... */\n      /* f1(n) = f0(n) +  K1 * g0(n-1) */\n      fnext0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n      fnext0 = (fnext0 << 1U) + fcurr0;\n\n      /* Process second sample for 2nd, 6th .. tap */\n      /* for sample 2 processing */\n      fnext1 = (q31_t)(((q63_t)gnext0 * (*pk)) >> 32U);\n      fnext1 = (fnext1 << 1U) + fcurr1;\n\n      /* Process third sample for 2nd, 6th .. tap */\n      fnext2 = (q31_t)(((q63_t)gnext1 * (*pk)) >> 32U);\n      fnext2 = (fnext2 << 1U) + fcurr2;\n\n      /* Process fourth sample for 2nd, 6th .. tap */\n      fnext3 = (q31_t)(((q63_t)gnext2 * (*pk)) >> 32U);\n      fnext3 = (fnext3 << 1U) + fcurr3;\n\n      /* g1(n) = f0(n) * K1  +  g0(n-1) */\n      /* Calculation of state values for next stage */\n      gnext3 = (q31_t)(((q63_t)fcurr3 * (*pk)) >> 32U);\n      gnext3 = (gnext3 << 1U) + gnext2;\n\n      gnext2 = (q31_t)(((q63_t)fcurr2 * (*pk)) >> 32U);\n      gnext2 = (gnext2 << 1U) + gnext1;\n\n      gnext1 = (q31_t)(((q63_t)fcurr1 * (*pk)) >> 32U);\n      gnext1 = (gnext1 << 1U) + gnext0;\n\n      gnext0 = (q31_t)(((q63_t)fcurr0 * (*pk++)) >> 32U);\n      gnext0 = (gnext0 << 1U) + gcurr0;\n\n      /* Read g2(n-1), g4(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = gnext3;\n\n      /* Sample processing for K3, K7.... */\n      /* Process first sample for 3rd, 7th .. tap */\n      /* f3(n) = f2(n) +  K3 * g2(n-1) */\n      fcurr0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n      fcurr0 = (fcurr0 << 1U) + fnext0;\n\n      /* Process second sample for 3rd, 7th .. tap */\n      fcurr1 = (q31_t)(((q63_t)gnext0 * (*pk)) >> 32U);\n      fcurr1 = (fcurr1 << 1U) + fnext1;\n\n      /* Process third sample for 3rd, 7th .. tap */\n      fcurr2 = (q31_t)(((q63_t)gnext1 * (*pk)) >> 32U);\n      fcurr2 = (fcurr2 << 1U) + fnext2;\n\n      /* Process fourth sample for 3rd, 7th .. tap */\n      fcurr3 = (q31_t)(((q63_t)gnext2 * (*pk)) >> 32U);\n      fcurr3 = (fcurr3 << 1U) + fnext3;\n\n      /* Calculation of state values for next stage */\n      /* g3(n) = f2(n) * K3  +  g2(n-1) */\n      gnext3 = (q31_t)(((q63_t)fnext3 * (*pk)) >> 32U);\n      gnext3 = (gnext3 << 1U) + gnext2;\n\n      gnext2 = (q31_t)(((q63_t)fnext2 * (*pk)) >> 32U);\n      gnext2 = (gnext2 << 1U) + gnext1;\n\n      gnext1 = (q31_t)(((q63_t)fnext1 * (*pk)) >> 32U);\n      gnext1 = (gnext1 << 1U) + gnext0;\n\n      gnext0 = (q31_t)(((q63_t)fnext0 * (*pk++)) >> 32U);\n      gnext0 = (gnext0 << 1U) + gcurr0;\n\n      /* Read g1(n-1), g3(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = gnext3;\n\n      /* Sample processing for K4, K8.... */\n      /* Process first sample for 4th, 8th .. tap */\n      /* f4(n) = f3(n) +  K4 * g3(n-1) */\n      fnext0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n      fnext0 = (fnext0 << 1U) + fcurr0;\n\n      /* Process second sample for 4th, 8th .. tap */\n      /* for sample 2 processing */\n      fnext1 = (q31_t)(((q63_t)gnext0 * (*pk)) >> 32U);\n      fnext1 = (fnext1 << 1U) + fcurr1;\n\n      /* Process third sample for 4th, 8th .. tap */\n      fnext2 = (q31_t)(((q63_t)gnext1 * (*pk)) >> 32U);\n      fnext2 = (fnext2 << 1U) + fcurr2;\n\n      /* Process fourth sample for 4th, 8th .. tap */\n      fnext3 = (q31_t)(((q63_t)gnext2 * (*pk)) >> 32U);\n      fnext3 = (fnext3 << 1U) + fcurr3;\n\n      /* g4(n) = f3(n) * K4  +  g3(n-1) */\n      /* Calculation of state values for next stage */\n      gnext3 = (q31_t)(((q63_t)fcurr3 * (*pk)) >> 32U);\n      gnext3 = (gnext3 << 1U) + gnext2;\n\n      gnext2 = (q31_t)(((q63_t)fcurr2 * (*pk)) >> 32U);\n      gnext2 = (gnext2 << 1U) + gnext1;\n\n      gnext1 = (q31_t)(((q63_t)fcurr1 * (*pk)) >> 32U);\n      gnext1 = (gnext1 << 1U) + gnext0;\n\n      gnext0 = (q31_t)(((q63_t)fcurr0 * (*pk++)) >> 32U);\n      gnext0 = (gnext0 << 1U) + gcurr0;\n\n      /* Read g2(n-1), g4(n-1) .... from state */\n      gcurr0 = *px;\n\n      /* save g4(n) in state buffer */\n      *px++ = gnext3;\n\n      /* Sample processing for K5, K9.... */\n      /* Process first sample for 5th, 9th .. tap */\n      /* f5(n) = f4(n) +  K5 * g4(n-1) */\n      fcurr0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n      fcurr0 = (fcurr0 << 1U) + fnext0;\n\n      /* Process second sample for 5th, 9th .. tap */\n      fcurr1 = (q31_t)(((q63_t)gnext0 * (*pk)) >> 32U);\n      fcurr1 = (fcurr1 << 1U) + fnext1;\n\n      /* Process third sample for 5th, 9th .. tap */\n      fcurr2 = (q31_t)(((q63_t)gnext1 * (*pk)) >> 32U);\n      fcurr2 = (fcurr2 << 1U) + fnext2;\n\n      /* Process fourth sample for 5th, 9th .. tap */\n      fcurr3 = (q31_t)(((q63_t)gnext2 * (*pk)) >> 32U);\n      fcurr3 = (fcurr3 << 1U) + fnext3;\n\n      /* Calculation of state values for next stage */\n      /* g5(n) = f4(n) * K5  +  g4(n-1) */\n      gnext3 = (q31_t)(((q63_t)fnext3 * (*pk)) >> 32U);\n      gnext3 = (gnext3 << 1U) + gnext2;\n\n      gnext2 = (q31_t)(((q63_t)fnext2 * (*pk)) >> 32U);\n      gnext2 = (gnext2 << 1U) + gnext1;\n\n      gnext1 = (q31_t)(((q63_t)fnext1 * (*pk)) >> 32U);\n      gnext1 = (gnext1 << 1U) + gnext0;\n\n      gnext0 = (q31_t)(((q63_t)fnext0 * (*pk++)) >> 32U);\n      gnext0 = (gnext0 << 1U) + gcurr0;\n\n      stageCnt--;\n    }\n\n    /* If the (filter length -1) is not a multiple of 4, compute the remaining\n     * filter taps */\n    stageCnt = (numStages - 1U) % 0x4U;\n\n    while (stageCnt > 0U) {\n      gcurr0 = *px;\n\n      /* save g value in state buffer */\n      *px++ = gnext3;\n\n      /* Process four samples for last three taps here */\n      fnext0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n      fnext0 = (fnext0 << 1U) + fcurr0;\n\n      fnext1 = (q31_t)(((q63_t)gnext0 * (*pk)) >> 32U);\n      fnext1 = (fnext1 << 1U) + fcurr1;\n\n      fnext2 = (q31_t)(((q63_t)gnext1 * (*pk)) >> 32U);\n      fnext2 = (fnext2 << 1U) + fcurr2;\n\n      fnext3 = (q31_t)(((q63_t)gnext2 * (*pk)) >> 32U);\n      fnext3 = (fnext3 << 1U) + fcurr3;\n\n      /* g1(n) = f0(n) * K1  +  g0(n-1) */\n      gnext3 = (q31_t)(((q63_t)fcurr3 * (*pk)) >> 32U);\n      gnext3 = (gnext3 << 1U) + gnext2;\n\n      gnext2 = (q31_t)(((q63_t)fcurr2 * (*pk)) >> 32U);\n      gnext2 = (gnext2 << 1U) + gnext1;\n\n      gnext1 = (q31_t)(((q63_t)fcurr1 * (*pk)) >> 32U);\n      gnext1 = (gnext1 << 1U) + gnext0;\n\n      gnext0 = (q31_t)(((q63_t)fcurr0 * (*pk++)) >> 32U);\n      gnext0 = (gnext0 << 1U) + gcurr0;\n\n      /* Update of f values for next coefficient set processing */\n      fcurr0 = fnext0;\n      fcurr1 = fnext1;\n      fcurr2 = fnext2;\n      fcurr3 = fnext3;\n\n      stageCnt--;\n    }\n\n    /* The results in the 4 accumulators, store in the destination buffer. */\n    /* y(n) = fN(n) */\n    *pDst++ = fcurr0;\n    *pDst++ = fcurr1;\n    *pDst++ = fcurr2;\n    *pDst++ = fcurr3;\n\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* f0(n) = x(n) */\n    fcurr0 = *pSrc++;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pk = pCoeffs;\n\n    /* read g2(n) from state buffer */\n    gcurr0 = *px;\n\n    /* for sample 1 processing */\n    /* f1(n) = f0(n) +  K1 * g0(n-1) */\n    fnext0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n    fnext0 = (fnext0 << 1U) + fcurr0;\n\n    /* g1(n) = f0(n) * K1  +  g0(n-1) */\n    gnext0 = (q31_t)(((q63_t)fcurr0 * (*pk++)) >> 32U);\n    gnext0 = (gnext0 << 1U) + gcurr0;\n\n    /* save g1(n) in state buffer */\n    *px++ = fcurr0;\n\n    /* f1(n) is saved in fcurr0 for next stage processing */\n    fcurr0 = fnext0;\n\n    stageCnt = (numStages - 1U);\n\n    /* stage loop */\n    while (stageCnt > 0U) {\n      /* read g2(n) from state buffer */\n      gcurr0 = *px;\n\n      /* save g1(n) in state buffer */\n      *px++ = gnext0;\n\n      /* Sample processing for K2, K3.... */\n      /* f2(n) = f1(n) +  K2 * g1(n-1) */\n      fnext0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n      fnext0 = (fnext0 << 1U) + fcurr0;\n\n      /* g2(n) = f1(n) * K2  +  g1(n-1) */\n      gnext0 = (q31_t)(((q63_t)fcurr0 * (*pk++)) >> 32U);\n      gnext0 = (gnext0 << 1U) + gcurr0;\n\n      /* f1(n) is saved in fcurr0 for next stage processing */\n      fcurr0 = fnext0;\n\n      stageCnt--;\n    }\n\n    /* y(n) = fN(n) */\n    *pDst++ = fcurr0;\n\n    blkCnt--;\n  }\n\n#else\n  /* alternate version for CM0_FAMILY */\n\n  blkCnt = blockSize;\n\n  while (blkCnt > 0U) {\n    /* f0(n) = x(n) */\n    fcurr0 = *pSrc++;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coeff pointer */\n    pk = pCoeffs;\n\n    /* read g0(n-1) from state buffer */\n    gcurr0 = *px;\n\n    /* for sample 1 processing */\n    /* f1(n) = f0(n) +  K1 * g0(n-1) */\n    fnext0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n    fnext0 = (fnext << 1U) + fcurr0;\n\n    /* g1(n) = f0(n) * K1  +  g0(n-1) */\n    gnext0 = (q31_t)(((q63_t)fcurr0 * (*pk++)) >> 32U);\n    gnext0 = (gnext0 << 1U) + gcurr0;\n\n    /* save f0(n) in state buffer */\n    *px++ = fcurr0;\n\n    /* f1(n) is saved in fcurr for next stage processing */\n    fcurr0 = fnext0;\n\n    stageCnt = (numStages - 1U);\n\n    /* stage loop */\n    while (stageCnt > 0U) {\n      /* read g1(n-1) from state buffer */\n      gcurr0 = *px;\n\n      /* save g0(n-1) in state buffer */\n      *px++ = gnext0;\n\n      /* Sample processing for K2, K3.... */\n      /* f2(n) = f1(n) +  K2 * g1(n-1) */\n      fnext0 = (q31_t)(((q63_t)gcurr0 * (*pk)) >> 32U);\n      fnext0 = (fnext0 << 1U) + fcurr0;\n\n      /* g2(n) = f1(n) * K2  +  g1(n-1) */\n      gnext0 = (q31_t)(((q63_t)fcurr0 * (*pk++)) >> 32U);\n      gnext0 = (gnext0 << 1U) + gcurr0;\n\n      /* f1(n) is saved in fcurr0 for next stage processing */\n      fcurr0 = fnext0;\n\n      stageCnt--;\n    }\n\n    /* y(n) = fN(n) */\n    *pDst++ = fcurr0;\n\n    blkCnt--;\n  }\n\n#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */\n}\n\n/**\n  @} end of FIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_q15.c\n * Description:  Q15 FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 FIR filter.\n  @param[in]     S          points to an instance of the Q15 FIR filter\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. Both coefficients and state variables are represented in 1.15\n  format and multiplications yield a 2.30 result. The 2.30 intermediate results\n  are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of\n  internal overflow with this approach and the full precision of intermediate\n  multiplications is preserved. After all additions have been performed, the\n  accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly,\n  the accumulator is saturated to yield a result in 1.15 format.\n\n  @remark\n                   Refer to \\ref arm_fir_fast_q15() for a faster but less\n  precise implementation of this function.\n */\n\nvoid arm_fir_q15(const arm_fir_instance_q15 *S, const q15_t *pSrc, q15_t *pDst,\n                 uint32_t blockSize) {\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCurnt; /* Points to the current sample of the state */\n  q15_t *px;          /* Temporary pointer for state buffer */\n  const q15_t *pb;    /* Temporary pointer for coefficient buffer */\n  q63_t acc0;         /* Accumulators */\n  uint32_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter */\n  uint32_t tapCnt, blkCnt; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc1, acc2, acc3; /* Accumulators */\n  q31_t x0, x1, x2,\n      c0; /* Temporary variables to hold state and coefficient values */\n#endif\n\n  /* S->pState points to state array which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 output values simultaneously.\n   * The variables acc0 ... acc3 hold output values that are being computed:\n   *\n   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] +\n   * b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] acc1 =  b[numTaps-1] *\n   * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] *\n   * x[n-numTaps-2] +...+ b[0] * x[1] acc2 =  b[numTaps-1] * x[n-numTaps+1] +\n   * b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] *\n   * x[2] acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1]\n   * + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]\n   */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Copy 4 new input samples into the state buffer. */\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set all accumulators to zero */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */\n    px = pState;\n\n    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t\n     */\n    pb = pCoeffs;\n\n    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */\n    x0 = read_q15x2_ia(&px);\n\n    /* Read the third and forth samples from the state buffer: x[n-N-2],\n     * x[n-N-3] */\n    x2 = read_q15x2_ia(&px);\n\n    /* Loop over the number of taps.  Unroll by a factor of 4.\n       Repeat until we've computed numTaps-(numTaps%4) coefficients. */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read the first two coefficients using SIMD:  b[N] and b[N-1]\n       * coefficients */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */\n      acc0 = __SMLALD(x0, c0, acc0);\n\n      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */\n      acc2 = __SMLALD(x2, c0, acc2);\n\n      /* pack  x[n-N-1] and x[n-N-2] */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x2, x0, 0);\n#else\n      x1 = __PKHBT(x0, x2, 0);\n#endif\n\n      /* Read state x[n-N-4], x[n-N-5] */\n      x0 = read_q15x2_ia(&px);\n\n      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */\n      acc1 = __SMLALDX(x1, c0, acc1);\n\n      /* pack  x[n-N-3] and x[n-N-4] */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x0, x2, 0);\n#else\n      x1 = __PKHBT(x2, x0, 0);\n#endif\n\n      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */\n      acc3 = __SMLALDX(x1, c0, acc3);\n\n      /* Read coefficients b[N-2], b[N-3] */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */\n      acc0 = __SMLALD(x2, c0, acc0);\n\n      /* Read state x[n-N-6], x[n-N-7] with offset */\n      x2 = read_q15x2_ia(&px);\n\n      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */\n      acc2 = __SMLALD(x0, c0, acc2);\n\n      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */\n      acc1 = __SMLALDX(x1, c0, acc1);\n\n      /* pack  x[n-N-5] and x[n-N-6] */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x2, x0, 0);\n#else\n      x1 = __PKHBT(x0, x2, 0);\n#endif\n\n      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */\n      acc3 = __SMLALDX(x1, c0, acc3);\n\n      /* Decrement tap count */\n      tapCnt--;\n    }\n\n    /* If the filter length is not a multiple of 4, compute the remaining filter\n       taps. This is always be 2 taps since the filter length is even. */\n    if ((numTaps & 0x3U) != 0U) {\n      /* Read last two coefficients */\n      c0 = read_q15x2_ia((q15_t **)&pb);\n\n      /* Perform the multiply-accumulates */\n      acc0 = __SMLALD(x0, c0, acc0);\n      acc2 = __SMLALD(x2, c0, acc2);\n\n      /* pack state variables */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x2, x0, 0);\n#else\n      x1 = __PKHBT(x0, x2, 0);\n#endif\n\n      /* Read last state variables */\n      x0 = read_q15x2(px);\n\n      /* Perform the multiply-accumulates */\n      acc1 = __SMLALDX(x1, c0, acc1);\n\n      /* pack state variables */\n#ifndef ARM_MATH_BIG_ENDIAN\n      x1 = __PKHBT(x0, x2, 0);\n#else\n      x1 = __PKHBT(x2, x0, 0);\n#endif\n\n      /* Perform the multiply-accumulates */\n      acc3 = __SMLALDX(x1, c0, acc3);\n    }\n\n    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15\n       with saturation. Then store the 4 outputs in the destination buffer. */\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(\n        &pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));\n    write_q15x2_ia(\n        &pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));\n#else\n    write_q15x2_ia(\n        &pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));\n    write_q15x2_ia(\n        &pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* Advance the state pointer by 4 to process the next group of 4 samples */\n    pState = pState + 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining output samples */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of taps */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy two samples into state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set the accumulator to zero */\n    acc0 = 0;\n\n    /* Use SIMD to hold states and coefficients */\n    px = pState;\n    pb = pCoeffs;\n\n    tapCnt = numTaps >> 1U;\n\n    do {\n      acc0 += (q31_t)*px++ * *pb++;\n      acc0 += (q31_t)*px++ * *pb++;\n\n      tapCnt--;\n    } while (tapCnt > 0U);\n\n    /* The result is in 2.30 format. Convert to 1.15 with saturation.\n       Then store the output in the destination buffer. */\n    *pDst++ = (q15_t)(__SSAT((acc0 >> 15), 16));\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCurnt = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Calculate remaining number of copies */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy remaining data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_q31.c\n * Description:  Q31 FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Processing function for Q31 FIR filter.\n  @param[in]     S          points to an instance of the Q31 FIR filter\n structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n accumulator. The accumulator has a 2.62 format and maintains full precision of\n the intermediate multiplication results but provides only a single guard bit.\n                   Thus, if the accumulator result overflows it wraps around\n rather than clip. In order to avoid overflows completely the input signal must\n be scaled down by log2(numTaps) bits. After all multiply-accumulates are\n performed, the 2.62 accumulator is right shifted by 31 bits and saturated\n to 1.31 format to yield the final result.\n\n @remark\n                   Refer to \\ref arm_fir_fast_q31() for a faster but less\n precise implementation of this filter.\n */\n\nvoid arm_fir_q31(const arm_fir_instance_q31 *S, const q31_t *pSrc, q31_t *pDst,\n                 uint32_t blockSize) {\n  q31_t *pState = S->pState;         /* State pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *pStateCurnt; /* Points to the current sample of the state */\n  q31_t *px;          /* Temporary pointer for state buffer */\n  const q31_t *pb;    /* Temporary pointer for coefficient buffer */\n  q63_t acc0;         /* Accumulator */\n  uint32_t numTaps =\n      S->numTaps;             /* Number of filter coefficients in the filter */\n  uint32_t i, tapCnt, blkCnt; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q63_t acc1, acc2; /* Accumulators */\n  q31_t x0, x1, x2; /* Temporary variables to hold state values */\n  q31_t c0;         /* Temporary variable to hold coefficient value */\n#endif\n\n  /* S->pState points to state array which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 output values simultaneously.\n   * The variables acc0 ... acc3 hold output values that are being computed:\n   *\n   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] +\n   * b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] acc1 =  b[numTaps-1] *\n   * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] *\n   * x[n-numTaps-2] +...+ b[0] * x[1] acc2 =  b[numTaps-1] * x[n-numTaps+1] +\n   * b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] *\n   * x[2] acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1]\n   * + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]\n   */\n\n  blkCnt = blockSize / 3;\n\n  while (blkCnt > 0U) {\n    /* Copy 3 new input samples into the state buffer. */\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set all accumulators to zero */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Read the first 2 samples from the state buffer: x[n-numTaps],\n     * x[n-numTaps-1] */\n    x0 = *px++;\n    x1 = *px++;\n\n    /* Loop unrolling: process 3 taps at a time. */\n    tapCnt = numTaps / 3;\n\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps] coefficient */\n      c0 = *pb;\n\n      /* Read x[n-numTaps-2] sample */\n      x2 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += ((q63_t)x0 * c0);\n      acc1 += ((q63_t)x1 * c0);\n      acc2 += ((q63_t)x2 * c0);\n\n      /* Read the coefficient and state */\n      c0 = *(pb + 1U);\n      x0 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += ((q63_t)x1 * c0);\n      acc1 += ((q63_t)x2 * c0);\n      acc2 += ((q63_t)x0 * c0);\n\n      /* Read the coefficient and state */\n      c0 = *(pb + 2U);\n      x1 = *(px++);\n\n      /* update coefficient pointer */\n      pb += 3U;\n\n      /* Perform the multiply-accumulates */\n      acc0 += ((q63_t)x2 * c0);\n      acc1 += ((q63_t)x0 * c0);\n      acc2 += ((q63_t)x1 * c0);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    tapCnt = numTaps % 0x3U;\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *(pb++);\n\n      /* Fetch 1 state variable */\n      x2 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += ((q63_t)x0 * c0);\n      acc1 += ((q63_t)x1 * c0);\n      acc2 += ((q63_t)x2 * c0);\n\n      /* Reuse the present sample states for next sample */\n      x0 = x1;\n      x1 = x2;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Advance the state pointer by 3 to process the next group of 3 samples */\n    pState = pState + 3;\n\n    /* The result is in 2.30 format. Convert to 1.31 and store in destination\n     * buffer. */\n    *pDst++ = (q31_t)(acc0 >> 31U);\n    *pDst++ = (q31_t)(acc1 >> 31U);\n    *pDst++ = (q31_t)(acc2 >> 31U);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining output samples */\n  blkCnt = blockSize % 0x3U;\n\n#else\n\n  /* Initialize blkCnt with number of taps */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy one sample at a time into state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set the accumulator to zero */\n    acc0 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize Coefficient pointer */\n    pb = pCoeffs;\n\n    i = numTaps;\n\n    /* Perform the multiply-accumulates */\n    do {\n      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] +\n       * b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */\n      acc0 += (q63_t)*px++ * *pb++;\n\n      i--;\n    } while (i > 0U);\n\n    /* Result is in 2.62 format. Convert to 1.31 and store in destination\n     * buffer. */\n    *pDst++ = (q31_t)(acc0 >> 31U);\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCurnt = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Calculate remaining number of copies */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy remaining data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_q7.c\n * Description:  Q7 FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR\n  @{\n */\n\n/**\n  @brief         Processing function for Q7 FIR filter.\n  @param[in]     S          points to an instance of the Q7 FIR filter structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n  accumulator. Both coefficients and state variables are represented in 1.7\n  format and multiplications yield a 2.14 result. The 2.14 intermediate results\n  are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of\n  internal overflow with this approach and the full precision of intermediate\n  multiplications is preserved. The accumulator is converted to 18.7 format by\n  discarding the low 7 bits. Finally, the result is truncated to 1.7 format.\n */\n\nvoid arm_fir_q7(const arm_fir_instance_q7 *S, const q7_t *pSrc, q7_t *pDst,\n                uint32_t blockSize) {\n  q7_t *pState = S->pState;         /* State pointer */\n  const q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q7_t *pStateCurnt; /* Points to the current sample of the state */\n  q7_t *px;          /* Temporary pointer for state buffer */\n  const q7_t *pb;    /* Temporary pointer for coefficient buffer */\n  q31_t acc0;        /* Accumulators */\n  uint32_t numTaps =\n      S->numTaps;             /* Number of filter coefficients in the filter */\n  uint32_t i, tapCnt, blkCnt; /* Loop counters */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t acc1, acc2, acc3;  /* Accumulators */\n  q7_t x0, x1, x2, x3, c0; /* Temporary variables to hold state */\n#endif\n\n  /* S->pState points to state array which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 output values simultaneously.\n   * The variables acc0 ... acc3 hold output values that are being computed:\n   *\n   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] +\n   * b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] acc1 =  b[numTaps-1] *\n   * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] *\n   * x[n-numTaps-2] +...+ b[0] * x[1] acc2 =  b[numTaps-1] * x[n-numTaps+1] +\n   * b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] *\n   * x[2] acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1]\n   * + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]\n   */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Copy 4 new input samples into the state buffer. */\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set all accumulators to zero */\n    acc0 = 0;\n    acc1 = 0;\n    acc2 = 0;\n    acc3 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Read the first 3 samples from the state buffer:\n     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */\n    x0 = *px++;\n    x1 = *px++;\n    x2 = *px++;\n\n    /* Loop unrolling. Process 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    /* Loop over the number of taps.  Unroll by a factor of 4.\n       Repeat until we've computed numTaps-4 coefficients. */\n    while (tapCnt > 0U) {\n      /* Read the b[numTaps] coefficient */\n      c0 = *pb;\n\n      /* Read x[n-numTaps-3] sample */\n      x3 = *px;\n\n      /* acc0 +=  b[numTaps] * x[n-numTaps] */\n      acc0 += ((q15_t)x0 * c0);\n\n      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */\n      acc1 += ((q15_t)x1 * c0);\n\n      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */\n      acc2 += ((q15_t)x2 * c0);\n\n      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */\n      acc3 += ((q15_t)x3 * c0);\n\n      /* Read the b[numTaps-1] coefficient */\n      c0 = *(pb + 1U);\n\n      /* Read x[n-numTaps-4] sample */\n      x0 = *(px + 1U);\n\n      /* Perform the multiply-accumulates */\n      acc0 += ((q15_t)x1 * c0);\n      acc1 += ((q15_t)x2 * c0);\n      acc2 += ((q15_t)x3 * c0);\n      acc3 += ((q15_t)x0 * c0);\n\n      /* Read the b[numTaps-2] coefficient */\n      c0 = *(pb + 2U);\n\n      /* Read x[n-numTaps-5] sample */\n      x1 = *(px + 2U);\n\n      /* Perform the multiply-accumulates */\n      acc0 += ((q15_t)x2 * c0);\n      acc1 += ((q15_t)x3 * c0);\n      acc2 += ((q15_t)x0 * c0);\n      acc3 += ((q15_t)x1 * c0);\n\n      /* Read the b[numTaps-3] coefficients */\n      c0 = *(pb + 3U);\n\n      /* Read x[n-numTaps-6] sample */\n      x2 = *(px + 3U);\n\n      /* Perform the multiply-accumulates */\n      acc0 += ((q15_t)x3 * c0);\n      acc1 += ((q15_t)x0 * c0);\n      acc2 += ((q15_t)x1 * c0);\n      acc3 += ((q15_t)x2 * c0);\n\n      /* update coefficient pointer */\n      pb += 4U;\n      px += 4U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* If the filter length is not a multiple of 4, compute the remaining filter\n     * taps */\n    tapCnt = numTaps % 0x4U;\n\n    while (tapCnt > 0U) {\n      /* Read coefficients */\n      c0 = *(pb++);\n\n      /* Fetch 1 state variable */\n      x3 = *(px++);\n\n      /* Perform the multiply-accumulates */\n      acc0 += ((q15_t)x0 * c0);\n      acc1 += ((q15_t)x1 * c0);\n      acc2 += ((q15_t)x2 * c0);\n      acc3 += ((q15_t)x3 * c0);\n\n      /* Reuse the present sample states for next sample */\n      x0 = x1;\n      x1 = x2;\n      x2 = x3;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31\n       Then store the 4 outputs in the destination buffer. */\n    acc0 = __SSAT((acc0 >> 7U), 8);\n    *pDst++ = acc0;\n    acc1 = __SSAT((acc1 >> 7U), 8);\n    *pDst++ = acc1;\n    acc2 = __SSAT((acc2 >> 7U), 8);\n    *pDst++ = acc2;\n    acc3 = __SSAT((acc3 >> 7U), 8);\n    *pDst++ = acc3;\n\n    /* Advance the state pointer by 4 to process the next group of 4 samples */\n    pState = pState + 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining output samples */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of taps */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Copy one sample at a time into state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Set the accumulator to zero */\n    acc0 = 0;\n\n    /* Initialize state pointer */\n    px = pState;\n\n    /* Initialize Coefficient pointer */\n    pb = pCoeffs;\n\n    i = numTaps;\n\n    /* Perform the multiply-accumulates */\n    do {\n      acc0 += (q15_t) * (px++) * (*(pb++));\n      i--;\n    } while (i > 0U);\n\n    /* The result is in 2.14 format. Convert to 1.7\n       Then store the output in the destination buffer. */\n    *pDst++ = __SSAT((acc0 >> 7U), 8);\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the state buffer */\n  pStateCurnt = S->pState;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Calculate remaining number of copies */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of taps */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  /* Copy remaining data */\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement the loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of FIR group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_sparse_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_sparse_f32.c\n * Description:  Floating-point sparse FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters\n\n  This group of functions implements sparse FIR filters.\n  Sparse FIR filters are equivalent to standard FIR filters except that most of\n  the coefficients are equal to zero. Sparse filters are used for simulating\n  reflections in communications and audio applications.\n\n  There are separate functions for Q7, Q15, Q31, and floating-point data types.\n  The functions operate on blocks  of input and output data and each call to the\n  function processes blockSize samples through the filter.\n  pSrc and pDst points to input and output arrays\n  respectively containing blockSize values.\n\n  @par           Algorithm\n                   The sparse filter instant structure contains an array of tap\n  indices pTapDelay which specifies the locations of the non-zero\n  coefficients. This is in addition to the coefficient array b. The\n  implementation essentially skips the multiplications by zero and leads to an\n  efficient realization. 
 y[n] = b[0] * x[n-pTapDelay[0]] + b[1] *\n  x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] *\n  x[n-pTapDelay[numTaps-1]]\n  
\n  @par\n                   \\image html FIRSparse.gif \"Sparse FIR filter.  b[n]\n  represents the filter coefficients\"\n  @par\n                   pCoeffs points to a coefficient array of size\n  numTaps; pTapDelay points to an array of nonzero\n  indices and is also of size numTaps; pState points\n  to a state array of size maxDelay + blockSize, where\n                   maxDelay is the largest offset value that is\n  ever used in the pTapDelay array. Some of the processing\n  functions also require temporary working buffers.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter. Coefficient and offset arrays may be shared among\n  several instances while state variable arrays cannot be shared. There are\n  separate instance structure declarations for each of the 4 supported data\n  types.\n\n  @par           Initialization Functions\n                   There is also an associated initialization function for each\n  data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n  the follow subfields of the instance structure: numTaps, pCoeffs, pTapDelay,\n  maxDelay, stateIndex, pState. Also set all of the values in pState to zero.\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Set the values in the state buffer to zeros before\n  static initialization. The code below statically initializes each of the 4\n  different data type filter instance structures 
\n      arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay,\n  pTapDelay}; arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs,\n  maxDelay, pTapDelay}; arm_fir_sparse_instance_q15 S = {numTaps, 0, pState,\n  pCoeffs, maxDelay, pTapDelay}; arm_fir_sparse_instance_q7 S =  {numTaps, 0,\n  pState, pCoeffs, maxDelay, pTapDelay};\n  
\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the fixed-point versions of the\n  sparse FIR filter functions. In particular, the overflow and saturation\n  behavior of the accumulator used in each function must be considered. Refer to\n  the function specific documentation below for usage guidelines.\n */\n\n/**\n  @addtogroup FIR_Sparse\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point sparse FIR filter.\n  @param[in]     S           points to an instance of the floating-point sparse\n  FIR structure\n  @param[in]     pSrc        points to the block of input data\n  @param[out]    pDst        points to the block of output data\n  @param[in]     pScratchIn  points to a temporary buffer of size blockSize\n  @param[in]     blockSize   number of input samples to process\n  @return        none\n */\n\nvoid arm_fir_sparse_f32(arm_fir_sparse_instance_f32 *S, const float32_t *pSrc,\n                        float32_t *pDst, float32_t *pScratchIn,\n                        uint32_t blockSize) {\n  float32_t *pState = S->pState;         /* State pointer */\n  const float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t *px;                         /* Scratch buffer pointer */\n  float32_t *py = pState;            /* Temporary pointers for state buffer */\n  float32_t *pb = pScratchIn;        /* Temporary pointers for scratch buffer */\n  float32_t *pOut;                   /* Destination pointer */\n  int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset\n                                        of the non-zero tap values. */\n  uint32_t delaySize = S->maxDelay + blockSize; /* state length */\n  uint16_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter  */\n  int32_t readIndex;       /* Read index of the state buffer */\n  uint32_t tapCnt, blkCnt; /* loop counters */\n  float32_t coeff = *pCoeffs++; /* Read the first coefficient value */\n\n  /* BlockSize of Input samples are copied into the state buffer */\n  /* StateIndex points to the starting position to write in the state buffer */\n  arm_circularWrite_f32((int32_t *)py, delaySize, &S->stateIndex, 1,\n                        (int32_t *)pSrc, 1, blockSize);\n\n  /* Read Index, from where the state buffer should be read, is calculated. */\n  readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n  /* Wraparound of readIndex */\n  if (readIndex < 0) {\n    readIndex += (int32_t)delaySize;\n  }\n\n  /* Working pointer for state buffer is updated */\n  py = pState;\n\n  /* blockSize samples are read from the state buffer */\n  arm_circularRead_f32((int32_t *)py, delaySize, &readIndex, 1, (int32_t *)pb,\n                       (int32_t *)pb, blockSize, 1, blockSize);\n\n  /* Working pointer for the scratch buffer of state values */\n  px = pb;\n\n  /* Working pointer for scratch buffer of output values */\n  pOut = pDst;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Perform Multiplications and store in destination buffer */\n    *pOut++ = *px++ * coeff;\n\n    *pOut++ = *px++ * coeff;\n\n    *pOut++ = *px++ * coeff;\n\n    *pOut++ = *px++ * coeff;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Perform Multiplication and store in destination buffer */\n    *pOut++ = *px++ * coeff;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Load the coefficient value and\n   * increment the coefficient buffer for the next set of state values */\n  coeff = *pCoeffs++;\n\n  /* Read Index, from where the state buffer should be read, is calculated. */\n  readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n  /* Wraparound of readIndex */\n  if (readIndex < 0) {\n    readIndex += (int32_t)delaySize;\n  }\n\n  /* Loop over the number of taps. */\n  tapCnt = (uint32_t)numTaps - 2U;\n\n  while (tapCnt > 0U) {\n    /* Working pointer for state buffer is updated */\n    py = pState;\n\n    /* blockSize samples are read from the state buffer */\n    arm_circularRead_f32((int32_t *)py, delaySize, &readIndex, 1, (int32_t *)pb,\n                         (int32_t *)pb, blockSize, 1, blockSize);\n\n    /* Working pointer for the scratch buffer of state values */\n    px = pb;\n\n    /* Working pointer for scratch buffer of output values */\n    pOut = pDst;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time. */\n    blkCnt = blockSize >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Perform Multiply-Accumulate */\n      *pOut++ += *px++ * coeff;\n\n      *pOut++ += *px++ * coeff;\n\n      *pOut++ += *px++ * coeff;\n\n      *pOut++ += *px++ * coeff;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Perform Multiply-Accumulate */\n      *pOut++ += *px++ * coeff;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Load the coefficient value and\n     * increment the coefficient buffer for the next set of state values */\n    coeff = *pCoeffs++;\n\n    /* Read Index, from where the state buffer should be read, is calculated. */\n    readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n    /* Wraparound of readIndex */\n    if (readIndex < 0) {\n      readIndex += (int32_t)delaySize;\n    }\n\n    /* Decrement tap loop counter */\n    tapCnt--;\n  }\n\n  /* Compute last tap without the final read of pTapDelay */\n\n  /* Working pointer for state buffer is updated */\n  py = pState;\n\n  /* blockSize samples are read from the state buffer */\n  arm_circularRead_f32((int32_t *)py, delaySize, &readIndex, 1, (int32_t *)pb,\n                       (int32_t *)pb, blockSize, 1, blockSize);\n\n  /* Working pointer for the scratch buffer of state values */\n  px = pb;\n\n  /* Working pointer for scratch buffer of output values */\n  pOut = pDst;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Perform Multiply-Accumulate */\n    *pOut++ += *px++ * coeff;\n    *pOut++ += *px++ * coeff;\n    *pOut++ += *px++ * coeff;\n    *pOut++ += *px++ * coeff;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Perform Multiply-Accumulate */\n    *pOut++ += *px++ * coeff;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of FIR_Sparse group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_sparse_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_sparse_init_f32.c\n * Description:  Floating-point sparse FIR filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Sparse\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point sparse FIR\n  filter.\n  @param[in,out] S          points to an instance of the floating-point sparse\n  FIR structure\n  @param[in]     numTaps    number of nonzero coefficients in the filter\n  @param[in]     pCoeffs    points to the array of filter coefficients\n  @param[in]     pState     points to the state buffer\n  @param[in]     pTapDelay  points to the array of offset times\n  @param[in]     maxDelay   maximum offset time supported\n  @param[in]     blockSize  number of samples that will be processed per block\n  @return        none\n\n  @par           Details\n                   pCoeffs holds the filter coefficients and has\n  length numTaps. pState holds the filter's state\n  variables and must be of length maxDelay + blockSize, where\n  maxDelay is the maximum number of delay line values.\n                   blockSize is the\n                   number of samples processed by the\n  arm_fir_sparse_f32() function.\n */\n\nvoid arm_fir_sparse_init_f32(arm_fir_sparse_instance_f32 *S, uint16_t numTaps,\n                             const float32_t *pCoeffs, float32_t *pState,\n                             int32_t *pTapDelay, uint16_t maxDelay,\n                             uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Assign TapDelay pointer */\n  S->pTapDelay = pTapDelay;\n\n  /* Assign MaxDelay */\n  S->maxDelay = maxDelay;\n\n  /* reset the stateIndex to 0 */\n  S->stateIndex = 0U;\n\n  /* Clear state buffer and size is always maxDelay + blockSize */\n  memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR_Sparse group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_sparse_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_sparse_init_q15.c\n * Description:  Q15 sparse FIR filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Sparse\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 sparse FIR filter.\n  @param[in,out] S          points to an instance of the Q15 sparse FIR\n  structure\n  @param[in]     numTaps    number of nonzero coefficients in the filter\n  @param[in]     pCoeffs    points to the array of filter coefficients\n  @param[in]     pState     points to the state buffer\n  @param[in]     pTapDelay  points to the array of offset times\n  @param[in]     maxDelay   maximum offset time supported\n  @param[in]     blockSize  number of samples that will be processed per block\n  @return        none\n\n  @par           Details\n                   pCoeffs holds the filter coefficients and has\n  length numTaps. pState holds the filter's state\n  variables and must be of length maxDelay + blockSize, where\n  maxDelay is the maximum number of delay line values.\n                   blockSize is the\n                   number of words processed by\n  arm_fir_sparse_q15() function.\n */\n\nvoid arm_fir_sparse_init_q15(arm_fir_sparse_instance_q15 *S, uint16_t numTaps,\n                             const q15_t *pCoeffs, q15_t *pState,\n                             int32_t *pTapDelay, uint16_t maxDelay,\n                             uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Assign TapDelay pointer */\n  S->pTapDelay = pTapDelay;\n\n  /* Assign MaxDelay */\n  S->maxDelay = maxDelay;\n\n  /* reset the stateIndex to 0 */\n  S->stateIndex = 0U;\n\n  /* Clear state buffer and size is always maxDelay + blockSize */\n  memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR_Sparse group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_sparse_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_sparse_init_q31.c\n * Description:  Q31 sparse FIR filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Sparse\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 sparse FIR filter.\n  @param[in,out] S          points to an instance of the Q31 sparse FIR\n  structure\n  @param[in]     numTaps    number of nonzero coefficients in the filter\n  @param[in]     pCoeffs    points to the array of filter coefficients\n  @param[in]     pState     points to the state buffer\n  @param[in]     pTapDelay  points to the array of offset times\n  @param[in]     maxDelay   maximum offset time supported\n  @param[in]     blockSize  number of samples that will be processed per block\n  @return        none\n\n  @par           Details\n                   pCoeffs holds the filter coefficients and has\n  length numTaps. pState holds the filter's state\n  variables and must be of length maxDelay + blockSize, where\n  maxDelay is the maximum number of delay line values.\n                   blockSize is the number of words processed by\n  arm_fir_sparse_q31() function.\n */\n\nvoid arm_fir_sparse_init_q31(arm_fir_sparse_instance_q31 *S, uint16_t numTaps,\n                             const q31_t *pCoeffs, q31_t *pState,\n                             int32_t *pTapDelay, uint16_t maxDelay,\n                             uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Assign TapDelay pointer */\n  S->pTapDelay = pTapDelay;\n\n  /* Assign MaxDelay */\n  S->maxDelay = maxDelay;\n\n  /* reset the stateIndex to 0 */\n  S->stateIndex = 0U;\n\n  /* Clear state buffer and size is always maxDelay + blockSize */\n  memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR_Sparse group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_sparse_init_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_sparse_init_q7.c\n * Description:  Q7 sparse FIR filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Sparse\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q7 sparse FIR filter.\n  @param[in,out] S          points to an instance of the Q7 sparse FIR structure\n  @param[in]     numTaps    number of nonzero coefficients in the filter\n  @param[in]     pCoeffs    points to the array of filter coefficients\n  @param[in]     pState     points to the state buffer\n  @param[in]     pTapDelay  points to the array of offset times\n  @param[in]     maxDelay   maximum offset time supported\n  @param[in]     blockSize  number of samples that will be processed per block\n  @return        none\n\n  @par           Details\n                   pCoeffs holds the filter coefficients and has\n  length numTaps. pState holds the filter's state\n  variables and must be of length maxDelay + blockSize, where\n  maxDelay is the maximum number of delay line values.\n                   blockSize is the\n                   number of samples processed by the\n  arm_fir_sparse_q7() function.\n */\n\nvoid arm_fir_sparse_init_q7(arm_fir_sparse_instance_q7 *S, uint16_t numTaps,\n                            const q7_t *pCoeffs, q7_t *pState,\n                            int32_t *pTapDelay, uint16_t maxDelay,\n                            uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Assign TapDelay pointer */\n  S->pTapDelay = pTapDelay;\n\n  /* Assign MaxDelay */\n  S->maxDelay = maxDelay;\n\n  /* reset the stateIndex to 0 */\n  S->stateIndex = 0U;\n\n  /* Clear state buffer and size is always maxDelay + blockSize */\n  memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of FIR_Sparse group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_sparse_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_sparse_q15.c\n * Description:  Q15 sparse FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Sparse\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 sparse FIR filter.\n  @param[in]     S           points to an instance of the Q15 sparse FIR\n  structure\n  @param[in]     pSrc        points to the block of input data\n  @param[out]    pDst        points to the block of output data\n  @param[in]     pScratchIn  points to a temporary buffer of size blockSize\n  @param[in]     pScratchOut points to a temporary buffer of size blockSize\n  @param[in]     blockSize   number of input samples to process per call\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 32-bit\n  accumulator. The 1.15 x 1.15 multiplications yield a 2.30 result and these are\n  added to a 2.30 accumulator. Thus the full precision of the multiplications is\n  maintained but there is only a single guard bit in the accumulator. If the\n  accumulator result overflows it will wrap around rather than saturate. After\n  all multiply-accumulates are performed, the 2.30 accumulator is truncated\n  to 2.15 format and then saturated to 1.15 format. In order to avoid overflows\n  the input signal or coefficients must be scaled down by log2(numTaps) bits.\n */\n\nvoid arm_fir_sparse_q15(arm_fir_sparse_instance_q15 *S, const q15_t *pSrc,\n                        q15_t *pDst, q15_t *pScratchIn, q31_t *pScratchOut,\n                        uint32_t blockSize) {\n  q15_t *pState = S->pState;         /* State pointer */\n  const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *px;                         /* Temporary pointers for scratch buffer */\n  q15_t *py = pState;                /* Temporary pointers for state buffer */\n  q15_t *pb = pScratchIn;            /* Temporary pointers for scratch buffer */\n  q15_t *pOut = pDst;                /* Working pointer for output */\n  int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset\n                                        of the non-zero tap values. */\n  uint32_t delaySize = S->maxDelay + blockSize; /* state length */\n  uint16_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter  */\n  int32_t readIndex;       /* Read index of the state buffer */\n  uint32_t tapCnt, blkCnt; /* loop counters */\n  q31_t *pScr2 =\n      pScratchOut; /* Working pointer for scratch buffer of output values */\n  q15_t coeff = *pCoeffs++; /* Read the first coefficient value */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t in1, in2; /* Temporary variables */\n#endif\n\n  /* BlockSize of Input samples are copied into the state buffer */\n  /* StateIndex points to the starting position to write in the state buffer */\n  arm_circularWrite_q15(py, (int32_t)delaySize, &S->stateIndex, 1, pSrc, 1,\n                        blockSize);\n\n  /* Loop over the number of taps. */\n  tapCnt = numTaps;\n\n  /* Read Index, from where the state buffer should be read, is calculated. */\n  readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n  /* Wraparound of readIndex */\n  if (readIndex < 0) {\n    readIndex += (int32_t)delaySize;\n  }\n\n  /* Working pointer for state buffer is updated */\n  py = pState;\n\n  /* blockSize samples are read from the state buffer */\n  arm_circularRead_q15(py, (int32_t)delaySize, &readIndex, 1, pb, pb,\n                       (int32_t)blockSize, 1, blockSize);\n\n  /* Working pointer for the scratch buffer of state values */\n  px = pb;\n\n  /* Working pointer for scratch buffer of output values */\n  pScratchOut = pScr2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Perform multiplication and store in the scratch buffer */\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Perform Multiplication and store in the scratch buffer */\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Load the coefficient value and\n   * increment the coefficient buffer for the next set of state values */\n  coeff = *pCoeffs++;\n\n  /* Read Index, from where the state buffer should be read, is calculated. */\n  readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n  /* Wraparound of readIndex */\n  if (readIndex < 0) {\n    readIndex += (int32_t)delaySize;\n  }\n\n  /* Loop over the number of taps. */\n  tapCnt = (uint32_t)numTaps - 2U;\n\n  while (tapCnt > 0U) {\n    /* Working pointer for state buffer is updated */\n    py = pState;\n\n    /* blockSize samples are read from the state buffer */\n    arm_circularRead_q15(py, (int32_t)delaySize, &readIndex, 1, pb, pb,\n                         (int32_t)blockSize, 1, blockSize);\n\n    /* Working pointer for the scratch buffer of state values */\n    px = pb;\n\n    /* Working pointer for scratch buffer of output values */\n    pScratchOut = pScr2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time. */\n    blkCnt = blockSize >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Perform Multiply-Accumulate */\n      *pScratchOut++ += (q31_t)*px++ * coeff;\n      *pScratchOut++ += (q31_t)*px++ * coeff;\n      *pScratchOut++ += (q31_t)*px++ * coeff;\n      *pScratchOut++ += (q31_t)*px++ * coeff;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Perform Multiply-Accumulate */\n      *pScratchOut++ += (q31_t)*px++ * coeff;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Load the coefficient value and\n     * increment the coefficient buffer for the next set of state values */\n    coeff = *pCoeffs++;\n\n    /* Read Index, from where the state buffer should be read, is calculated. */\n    readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n    /* Wraparound of readIndex */\n    if (readIndex < 0) {\n      readIndex += (int32_t)delaySize;\n    }\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Compute last tap without the final read of pTapDelay */\n\n  /* Working pointer for state buffer is updated */\n  py = pState;\n\n  /* blockSize samples are read from the state buffer */\n  arm_circularRead_q15(py, (int32_t)delaySize, &readIndex, 1, pb, pb,\n                       (int32_t)blockSize, 1, blockSize);\n\n  /* Working pointer for the scratch buffer of state values */\n  px = pb;\n\n  /* Working pointer for scratch buffer of output values */\n  pScratchOut = pScr2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Perform Multiply-Accumulate */\n    *pScratchOut++ += (q31_t)*px++ * coeff;\n    *pScratchOut++ += (q31_t)*px++ * coeff;\n    *pScratchOut++ += (q31_t)*px++ * coeff;\n    *pScratchOut++ += (q31_t)*px++ * coeff;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Perform Multiply-Accumulate */\n    *pScratchOut++ += (q31_t)*px++ * coeff;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* All the output values are in pScratchOut buffer.\n     Convert them into 1.15 format, saturate and store in the destination\n     buffer. */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    in1 = *pScr2++;\n    in2 = *pScr2++;\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(&pOut, __PKHBT((q15_t)__SSAT(in1 >> 15, 16),\n                                  (q15_t)__SSAT(in2 >> 15, 16), 16));\n#else\n    write_q15x2_ia(&pOut, __PKHBT((q15_t)__SSAT(in2 >> 15, 16),\n                                  (q15_t)__SSAT(in1 >> 15, 16), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    in1 = *pScr2++;\n    in2 = *pScr2++;\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(&pOut, __PKHBT((q15_t)__SSAT(in1 >> 15, 16),\n                                  (q15_t)__SSAT(in2 >> 15, 16), 16));\n#else\n    write_q15x2_ia(&pOut, __PKHBT((q15_t)__SSAT(in2 >> 15, 16),\n                                  (q15_t)__SSAT(in1 >> 15, 16), 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    *pOut++ = (q15_t)__SSAT(*pScr2++ >> 15, 16);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of FIR_Sparse group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_sparse_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_sparse_q31.c\n * Description:  Q31 sparse FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Sparse\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 sparse FIR filter.\n  @param[in]     S           points to an instance of the Q31 sparse FIR\n  structure\n  @param[in]     pSrc        points to the block of input data\n  @param[out]    pDst        points to the block of output data\n  @param[in]     pScratchIn  points to a temporary buffer of size blockSize\n  @param[in]     blockSize   number of input samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 32-bit\n  accumulator. The 1.31 x 1.31 multiplications are truncated to 2.30 format.\n                   This leads to loss of precision on the intermediate\n  multiplications and provides only a single guard bit. If the accumulator\n  result overflows, it wraps around rather than saturate. In order to avoid\n  overflows the input signal or coefficients must be scaled down by\n  log2(numTaps) bits.\n */\n\nvoid arm_fir_sparse_q31(arm_fir_sparse_instance_q31 *S, const q31_t *pSrc,\n                        q31_t *pDst, q31_t *pScratchIn, uint32_t blockSize) {\n  q31_t *pState = S->pState;         /* State pointer */\n  const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *px;                         /* Scratch buffer pointer */\n  q31_t *py = pState;                /* Temporary pointers for state buffer */\n  q31_t *pb = pScratchIn;            /* Temporary pointers for scratch buffer */\n  q31_t *pOut;                       /* Destination pointer */\n  int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset\n                                        of the non-zero tap values. */\n  uint32_t delaySize = S->maxDelay + blockSize; /* state length */\n  uint16_t numTaps =\n      S->numTaps;           /* Number of filter coefficients in the filter  */\n  int32_t readIndex;        /* Read index of the state buffer */\n  uint32_t tapCnt, blkCnt;  /* loop counters */\n  q31_t coeff = *pCoeffs++; /* Read the first coefficient value */\n  q31_t in;\n  q63_t out; /* Temporary output variable */\n\n  /* BlockSize of Input samples are copied into the state buffer */\n  /* StateIndex points to the starting position to write in the state buffer */\n  arm_circularWrite_f32((int32_t *)py, delaySize, &S->stateIndex, 1,\n                        (int32_t *)pSrc, 1, blockSize);\n\n  /* Read Index, from where the state buffer should be read, is calculated. */\n  readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n  /* Wraparound of readIndex */\n  if (readIndex < 0) {\n    readIndex += (int32_t)delaySize;\n  }\n\n  /* Working pointer for state buffer is updated */\n  py = pState;\n\n  /* blockSize samples are read from the state buffer */\n  arm_circularRead_f32((int32_t *)py, delaySize, &readIndex, 1, (int32_t *)pb,\n                       (int32_t *)pb, blockSize, 1, blockSize);\n\n  /* Working pointer for the scratch buffer of state values */\n  px = pb;\n\n  /* Working pointer for scratch buffer of output values */\n  pOut = pDst;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Perform Multiplications and store in destination buffer */\n    *pOut++ = (q31_t)(((q63_t)*px++ * coeff) >> 32);\n\n    *pOut++ = (q31_t)(((q63_t)*px++ * coeff) >> 32);\n\n    *pOut++ = (q31_t)(((q63_t)*px++ * coeff) >> 32);\n\n    *pOut++ = (q31_t)(((q63_t)*px++ * coeff) >> 32);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Perform Multiplication and store in destination buffer */\n    *pOut++ = (q31_t)(((q63_t)*px++ * coeff) >> 32);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Load the coefficient value and\n   * increment the coefficient buffer for the next set of state values */\n  coeff = *pCoeffs++;\n\n  /* Read Index, from where the state buffer should be read, is calculated. */\n  readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n  /* Wraparound of readIndex */\n  if (readIndex < 0) {\n    readIndex += (int32_t)delaySize;\n  }\n\n  /* Loop over the number of taps. */\n  tapCnt = (uint32_t)numTaps - 2U;\n\n  while (tapCnt > 0U) {\n    /* Working pointer for state buffer is updated */\n    py = pState;\n\n    /* blockSize samples are read from the state buffer */\n    arm_circularRead_f32((int32_t *)py, delaySize, &readIndex, 1, (int32_t *)pb,\n                         (int32_t *)pb, blockSize, 1, blockSize);\n\n    /* Working pointer for the scratch buffer of state values */\n    px = pb;\n\n    /* Working pointer for scratch buffer of output values */\n    pOut = pDst;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time. */\n    blkCnt = blockSize >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Perform Multiply-Accumulate */\n      out = *pOut;\n      out += ((q63_t)*px++ * coeff) >> 32;\n      *pOut++ = (q31_t)(out);\n\n      out = *pOut;\n      out += ((q63_t)*px++ * coeff) >> 32;\n      *pOut++ = (q31_t)(out);\n\n      out = *pOut;\n      out += ((q63_t)*px++ * coeff) >> 32;\n      *pOut++ = (q31_t)(out);\n\n      out = *pOut;\n      out += ((q63_t)*px++ * coeff) >> 32;\n      *pOut++ = (q31_t)(out);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Perform Multiply-Accumulate */\n      out = *pOut;\n      out += ((q63_t)*px++ * coeff) >> 32;\n      *pOut++ = (q31_t)(out);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Load the coefficient value and\n     * increment the coefficient buffer for the next set of state values */\n    coeff = *pCoeffs++;\n\n    /* Read Index, from where the state buffer should be read, is calculated. */\n    readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n    /* Wraparound of readIndex */\n    if (readIndex < 0) {\n      readIndex += (int32_t)delaySize;\n    }\n\n    /* Decrement tap loop counter */\n    tapCnt--;\n  }\n\n  /* Compute last tap without the final read of pTapDelay */\n\n  /* Working pointer for state buffer is updated */\n  py = pState;\n\n  /* blockSize samples are read from the state buffer */\n  arm_circularRead_f32((int32_t *)py, delaySize, &readIndex, 1, (int32_t *)pb,\n                       (int32_t *)pb, blockSize, 1, blockSize);\n\n  /* Working pointer for the scratch buffer of state values */\n  px = pb;\n\n  /* Working pointer for scratch buffer of output values */\n  pOut = pDst;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Perform Multiply-Accumulate */\n    out = *pOut;\n    out += ((q63_t)*px++ * coeff) >> 32;\n    *pOut++ = (q31_t)(out);\n\n    out = *pOut;\n    out += ((q63_t)*px++ * coeff) >> 32;\n    *pOut++ = (q31_t)(out);\n\n    out = *pOut;\n    out += ((q63_t)*px++ * coeff) >> 32;\n    *pOut++ = (q31_t)(out);\n\n    out = *pOut;\n    out += ((q63_t)*px++ * coeff) >> 32;\n    *pOut++ = (q31_t)(out);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Perform Multiply-Accumulate */\n    out = *pOut;\n    out += ((q63_t)*px++ * coeff) >> 32;\n    *pOut++ = (q31_t)(out);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Working output pointer is updated */\n  pOut = pDst;\n\n  /* Output is converted into 1.31 format. */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    in = *pOut << 1;\n    *pOut++ = in;\n    in = *pOut << 1;\n    *pOut++ = in;\n    in = *pOut << 1;\n    *pOut++ = in;\n    in = *pOut << 1;\n    *pOut++ = in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    in = *pOut << 1;\n    *pOut++ = in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of FIR_Sparse group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_fir_sparse_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fir_sparse_q7.c\n * Description:  Q7 sparse FIR filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup FIR_Sparse\n  @{\n */\n\n/**\n  @brief         Processing function for the Q7 sparse FIR filter.\n  @param[in]     S           points to an instance of the Q7 sparse FIR\n  structure\n  @param[in]     pSrc        points to the block of input data\n  @param[out]    pDst        points to the block of output data\n  @param[in]     pScratchIn  points to a temporary buffer of size blockSize\n  @param[in]     pScratchOut points to a temporary buffer of size blockSize\n  @param[in]     blockSize   number of input samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n  accumulator. Both coefficients and state variables are represented in 1.7\n  format and multiplications yield a 2.14 result. The 2.14 intermediate results\n  are accumulated in a 32-bit accumulator in 18.14 format. There is no risk of\n  internal overflow with this approach and the full precision of intermediate\n  multiplications is preserved. The accumulator is then converted to 18.7 format\n  by discarding the low 7 bits. Finally, the result is truncated to 1.7 format.\n */\n\nvoid arm_fir_sparse_q7(arm_fir_sparse_instance_q7 *S, const q7_t *pSrc,\n                       q7_t *pDst, q7_t *pScratchIn, q31_t *pScratchOut,\n                       uint32_t blockSize) {\n  q7_t *pState = S->pState;          /* State pointer */\n  const q7_t *pCoeffs = S->pCoeffs;  /* Coefficient pointer */\n  q7_t *px;                          /* Scratch buffer pointer */\n  q7_t *py = pState;                 /* Temporary pointers for state buffer */\n  q7_t *pb = pScratchIn;             /* Temporary pointers for scratch buffer */\n  q7_t *pOut = pDst;                 /* Destination pointer */\n  int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset\n                                        of the non-zero tap values. */\n  uint32_t delaySize = S->maxDelay + blockSize; /* state length */\n  uint16_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter  */\n  int32_t readIndex;       /* Read index of the state buffer */\n  uint32_t tapCnt, blkCnt; /* loop counters */\n  q31_t *pScr2 =\n      pScratchOut; /* Working pointer for scratch buffer of output values */\n  q31_t in;\n  q7_t coeff = *pCoeffs++; /* Read the coefficient value */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q7_t in1, in2, in3, in4;\n#endif\n\n  /* BlockSize of Input samples are copied into the state buffer */\n  /* StateIndex points to the starting position to write in the state buffer */\n  arm_circularWrite_q7(py, (int32_t)delaySize, &S->stateIndex, 1, pSrc, 1,\n                       blockSize);\n\n  /* Loop over the number of taps. */\n  tapCnt = numTaps;\n\n  /* Read Index, from where the state buffer should be read, is calculated. */\n  readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n  /* Wraparound of readIndex */\n  if (readIndex < 0) {\n    readIndex += (int32_t)delaySize;\n  }\n\n  /* Working pointer for state buffer is updated */\n  py = pState;\n\n  /* blockSize samples are read from the state buffer */\n  arm_circularRead_q7(py, (int32_t)delaySize, &readIndex, 1, pb, pb,\n                      (int32_t)blockSize, 1, blockSize);\n\n  /* Working pointer for the scratch buffer of state values */\n  px = pb;\n\n  /* Working pointer for scratch buffer of output values */\n  pScratchOut = pScr2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Perform multiplication and store in the scratch buffer */\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Perform Multiplication and store in the scratch buffer */\n    *pScratchOut++ = ((q31_t)*px++ * coeff);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Load the coefficient value and\n   * increment the coefficient buffer for the next set of state values */\n  coeff = *pCoeffs++;\n\n  /* Read Index, from where the state buffer should be read, is calculated. */\n  readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n  /* Wraparound of readIndex */\n  if (readIndex < 0) {\n    readIndex += (int32_t)delaySize;\n  }\n\n  /* Loop over the number of taps. */\n  tapCnt = (uint32_t)numTaps - 2U;\n\n  while (tapCnt > 0U) {\n    /* Working pointer for state buffer is updated */\n    py = pState;\n\n    /* blockSize samples are read from the state buffer */\n    arm_circularRead_q7(py, (int32_t)delaySize, &readIndex, 1, pb, pb,\n                        (int32_t)blockSize, 1, blockSize);\n\n    /* Working pointer for the scratch buffer of state values */\n    px = pb;\n\n    /* Working pointer for scratch buffer of output values */\n    pScratchOut = pScr2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time. */\n    blkCnt = blockSize >> 2U;\n\n    while (blkCnt > 0U) {\n      /* Perform Multiply-Accumulate */\n      in = *pScratchOut + ((q31_t)*px++ * coeff);\n      *pScratchOut++ = in;\n      in = *pScratchOut + ((q31_t)*px++ * coeff);\n      *pScratchOut++ = in;\n      in = *pScratchOut + ((q31_t)*px++ * coeff);\n      *pScratchOut++ = in;\n      in = *pScratchOut + ((q31_t)*px++ * coeff);\n      *pScratchOut++ = in;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = blockSize % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* Perform Multiply-Accumulate */\n      in = *pScratchOut + ((q31_t)*px++ * coeff);\n      *pScratchOut++ = in;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Load the coefficient value and\n     * increment the coefficient buffer for the next set of state values */\n    coeff = *pCoeffs++;\n\n    /* Read Index, from where the state buffer should be read, is calculated. */\n    readIndex = (int32_t)(S->stateIndex - blockSize) - *pTapDelay++;\n\n    /* Wraparound of readIndex */\n    if (readIndex < 0) {\n      readIndex += (int32_t)delaySize;\n    }\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Compute last tap without the final read of pTapDelay */\n\n  /* Working pointer for state buffer is updated */\n  py = pState;\n\n  /* blockSize samples are read from the state buffer */\n  arm_circularRead_q7(py, (int32_t)delaySize, &readIndex, 1, pb, pb,\n                      (int32_t)blockSize, 1, blockSize);\n\n  /* Working pointer for the scratch buffer of state values */\n  px = pb;\n\n  /* Working pointer for scratch buffer of output values */\n  pScratchOut = pScr2;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Perform Multiply-Accumulate */\n    in = *pScratchOut + ((q31_t)*px++ * coeff);\n    *pScratchOut++ = in;\n    in = *pScratchOut + ((q31_t)*px++ * coeff);\n    *pScratchOut++ = in;\n    in = *pScratchOut + ((q31_t)*px++ * coeff);\n    *pScratchOut++ = in;\n    in = *pScratchOut + ((q31_t)*px++ * coeff);\n    *pScratchOut++ = in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Perform Multiply-Accumulate */\n    in = *pScratchOut + ((q31_t)*px++ * coeff);\n    *pScratchOut++ = in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* All the output values are in pScratchOut buffer.\n     Convert them into 1.15 format, saturate and store in the destination\n     buffer. */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time. */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    in1 = (q7_t)__SSAT(*pScr2++ >> 7, 8);\n    in2 = (q7_t)__SSAT(*pScr2++ >> 7, 8);\n    in3 = (q7_t)__SSAT(*pScr2++ >> 7, 8);\n    in4 = (q7_t)__SSAT(*pScr2++ >> 7, 8);\n\n    write_q7x4_ia(&pOut, __PACKq7(in1, in2, in3, in4));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    *pOut++ = (q7_t)__SSAT(*pScr2++ >> 7, 8);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of FIR_Sparse group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_iir_lattice_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_iir_lattice_f32.c\n * Description:  Floating-point IIR Lattice filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters\n\n  This set of functions implements lattice filters\n  for Q15, Q31 and floating-point data types.  Lattice filters are used in a\n  variety of adaptive filter applications. The filter structure has feedforward\n  and feedback components and the net impulse response is infinite length. The\n  functions operate on blocks of input and output data and each call to the\n  function processes blockSize samples through the filter.\n  pSrc and pDst point to input and output arrays\n  containing blockSize values.\n\n  @par           Algorithm\n                   \\image html IIRLattice.gif \"Infinite Impulse Response Lattice\n  filter\"\n  @par\n  
\n      fN(n)   = x(n)\n      fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ..., 1\n      gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1\n      y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)\n  
\n  @par\n                   pkCoeffs points to array of reflection\n  coefficients of size numStages. Reflection Coefficients are\n  stored in time-reversed order.\n  @par\n  
\n     {kN, kN-1, ..., k1}\n  
\n  @par\n                  pvCoeffs points to the array of ladder\n  coefficients of size (numStages+1). Ladder coefficients are\n  stored in time-reversed order. 
 {vN, vN-1, ..., v0}\n  
\n  @par\n                   pState points to a state array of size\n  numStages + blockSize. The state variables shown in the figure\n  above (the g values) are stored in the pState array. The state\n  variables are updated after each block of data is processed; the coefficients\n  are untouched.\n\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter. Coefficient arrays may be shared among several\n  instances while state variable arrays cannot be shared. There are separate\n  instance structure declarations for each of the 3 supported data types.\n\n  @par           Initialization Functions\n                   There is also an associated initialization function for each\n  data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n  the follow subfields of the instance structure: numStages, pkCoeffs, pvCoeffs,\n  pState. Also set all of the values in pState to zero.\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Set the values in the state buffer to zeros and then\n  manually initialize the instance structure as follows: 
\n      arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};\n      arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};\n      arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};\n  
\n  @par\n                   where numStages is the number of stages in the\n  filter; pState points to the state buffer array;\n                   pkCoeffs points to array of the reflection\n  coefficients; pvCoeffs points to the array of ladder\n  coefficients.\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the fixed-point versions of the\n  IIR lattice filter functions. In particular, the overflow and saturation\n  behavior of the accumulator used in each function must be considered. Refer to\n  the function specific documentation below for usage guidelines.\n */\n\n/**\n  @addtogroup IIR_Lattice\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point IIR lattice filter.\n  @param[in]     S          points to an instance of the floating-point IIR\n  lattice structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_iir_lattice_f32(const arm_iir_lattice_instance_f32 *S,\n                         const float32_t *pSrc, float32_t *pDst,\n                         uint32_t blockSize) {\n  float32_t *pState = S->pState; /* State pointer */\n  float32_t *pStateCur;          /* State current pointer */\n  float32_t acc;                 /* Accumlator */\n  float32_t fnext1, fnext2, gcurr1,\n      gnext;                      /* Temporary variables for lattice stages */\n  float32_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */\n  uint32_t numStages = S->numStages; /* Number of stages */\n  uint32_t blkCnt, tapCnt;           /* Temporary variables for counts */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t gcurr2; /* Temporary variables for lattice stages */\n  float32_t k1, k2;\n  float32_t v1, v2, v3, v4;\n#endif\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n  /* Sample processing */\n  while (blkCnt > 0U) {\n    /* Read Sample from input buffer */\n    /* fN(n) = x(n) */\n    fnext2 = *pSrc++;\n\n    /* Initialize Ladder coeff pointer */\n    pv = &S->pvCoeffs[0];\n\n    /* Initialize Reflection coeff pointer */\n    pk = &S->pkCoeffs[0];\n\n    /* Initialize state read pointer */\n    px1 = pState;\n\n    /* Initialize state write pointer */\n    px2 = pState;\n\n    /* Set accumulator to zero */\n    acc = 0.0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = (numStages) >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Read gN-1(n-1) from state buffer */\n      gcurr1 = *px1;\n\n      /* read reflection coefficient kN */\n      k1 = *pk;\n\n      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */\n      fnext1 = fnext2 - (k1 * gcurr1);\n\n      /* read ladder coefficient vN */\n      v1 = *pv;\n\n      /* read next reflection coefficient kN-1 */\n      k2 = *(pk + 1U);\n\n      /* Read gN-2(n-1) from state buffer */\n      gcurr2 = *(px1 + 1U);\n\n      /* read next ladder coefficient vN-1 */\n      v2 = *(pv + 1U);\n\n      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */\n      fnext2 = fnext1 - (k2 * gcurr2);\n\n      /* gN(n)   = kN * fN-1(n) + gN-1(n-1) */\n      gnext = gcurr1 + (k1 * fnext1);\n\n      /* read reflection coefficient kN-2 */\n      k1 = *(pk + 2U);\n\n      /* write gN(n) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* Read gN-3(n-1) from state buffer */\n      gcurr1 = *(px1 + 2U);\n\n      /* y(n) += gN(n) * vN  */\n      acc += (gnext * v1);\n\n      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */\n      fnext1 = fnext2 - (k1 * gcurr1);\n\n      /* gN-1(n)   = kN-1 * fN-2(n) + gN-2(n-1) */\n      gnext = gcurr2 + (k2 * fnext2);\n\n      /* Read gN-4(n-1) from state buffer */\n      gcurr2 = *(px1 + 3U);\n\n      /* y(n) += gN-1(n) * vN-1  */\n      acc += (gnext * v2);\n\n      /* read reflection coefficient kN-3 */\n      k2 = *(pk + 3U);\n\n      /* write gN-1(n) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */\n      fnext2 = fnext1 - (k2 * gcurr2);\n\n      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */\n      gnext = gcurr1 + (k1 * fnext1);\n\n      /* read ladder coefficient vN-2 */\n      v3 = *(pv + 2U);\n\n      /* y(n) += gN-2(n) * vN-2  */\n      acc += (gnext * v3);\n\n      /* write gN-2(n) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* update pointer */\n      pk += 4U;\n\n      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */\n      gnext = (fnext2 * k2) + gcurr2;\n\n      /* read next ladder coefficient vN-3 */\n      v4 = *(pv + 3U);\n\n      /* y(n) += gN-4(n) * vN-4  */\n      acc += (gnext * v4);\n\n      /* write gN-3(n) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* update pointers */\n      px1 += 4U;\n      pv += 4U;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numStages % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numStages;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      gcurr1 = *px1++;\n      /* Process sample for last taps */\n      fnext1 = fnext2 - ((*pk) * gcurr1);\n      gnext = (fnext1 * (*pk++)) + gcurr1;\n      /* Output samples for last taps */\n      acc += (gnext * (*pv++));\n      *px2++ = gnext;\n      fnext2 = fnext1;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* y(n) += g0(n) * v0 */\n    acc += (fnext2 * (*pv));\n\n    *px2++ = fnext2;\n\n    /* write out into pDst */\n    *pDst++ = acc;\n\n    /* Advance the state pointer by 4 to process the next group of 4 samples */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete. Now copy last S->numStages samples to start of the\n     buffer for the preperation of next frame process */\n\n  /* Points to the start of the state buffer */\n  pStateCur = &S->pState[0];\n  pState = &S->pState[blockSize];\n\n  /* Copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = numStages >> 2U;\n\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = numStages % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  tapCnt = numStages;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of IIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_iir_lattice_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_iir_lattice_init_f32.c\n * Description:  Floating-point IIR lattice filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup IIR_Lattice\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point IIR lattice\n  filter.\n  @param[in]     S          points to an instance of the floating-point IIR\n  lattice structure\n  @param[in]     numStages  number of stages in the filter\n  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array\n  is of length numStages\n  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is\n  of length numStages+1\n  @param[in]     pState     points to state buffer.  The array is of length\n  numStages+blockSize\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_iir_lattice_init_f32(arm_iir_lattice_instance_f32 *S,\n                              uint16_t numStages, float32_t *pkCoeffs,\n                              float32_t *pvCoeffs, float32_t *pState,\n                              uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numStages = numStages;\n\n  /* Assign reflection coefficient pointer */\n  S->pkCoeffs = pkCoeffs;\n\n  /* Assign ladder coefficient pointer */\n  S->pvCoeffs = pvCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numStages */\n  memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of IIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_iir_lattice_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_iir_lattice_init_q15.c\n * Description:  Q15 IIR lattice filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup IIR_Lattice\n  @{\n */\n\n/**\n  @brief     Initialization function for the Q15 IIR lattice filter.\n  @param[in] S          points to an instance of the Q15 IIR lattice structure\n  @param[in] numStages  number of stages in the filter\n  @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is\n  of length numStages\n  @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of\n  length numStages+1\n  @param[in] pState     points to state buffer.  The array is of length\n  numStages+blockSize\n  @param[in] blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_iir_lattice_init_q15(arm_iir_lattice_instance_q15 *S,\n                              uint16_t numStages, q15_t *pkCoeffs,\n                              q15_t *pvCoeffs, q15_t *pState,\n                              uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numStages = numStages;\n\n  /* Assign reflection coefficient pointer */\n  S->pkCoeffs = pkCoeffs;\n\n  /* Assign ladder coefficient pointer */\n  S->pvCoeffs = pvCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numStages */\n  memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of IIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_iir_lattice_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_iir_lattice_init_q31.c\n * Description:  Initialization function for the Q31 IIR lattice filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup IIR_Lattice\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 IIR lattice filter.\n  @param[in]     S          points to an instance of the Q31 IIR lattice\n  structure\n  @param[in]     numStages  number of stages in the filter\n  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array\n  is of length numStages\n  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is\n  of length numStages+1\n  @param[in]     pState     points to state buffer.  The array is of length\n  numStages+blockSize\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_iir_lattice_init_q31(arm_iir_lattice_instance_q31 *S,\n                              uint16_t numStages, q31_t *pkCoeffs,\n                              q31_t *pvCoeffs, q31_t *pState,\n                              uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numStages = numStages;\n\n  /* Assign reflection coefficient pointer */\n  S->pkCoeffs = pkCoeffs;\n\n  /* Assign ladder coefficient pointer */\n  S->pvCoeffs = pvCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numStages */\n  memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n}\n\n/**\n  @} end of IIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_iir_lattice_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_iir_lattice_q15.c\n * Description:  Q15 IIR Lattice filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup IIR_Lattice\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 IIR lattice filter.\n  @param[in]     S          points to an instance of the Q15 IIR lattice\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. Both coefficients and state variables are represented in 1.15\n  format and multiplications yield a 2.30 result. The 2.30 intermediate results\n  are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of\n  internal overflow with this approach and the full precision of intermediate\n  multiplications is preserved. After all additions have been performed, the\n  accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly,\n  the accumulator is saturated to yield a result in 1.15 format.\n */\n\nvoid arm_iir_lattice_q15(const arm_iir_lattice_instance_q15 *S,\n                         const q15_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  q15_t *pState = S->pState; /* State pointer */\n  q15_t *pStateCur;          /* State current pointer */\n  q31_t fcurr, fnext = 0, gcurr = 0,\n               gnext;         /* Temporary variables for lattice stages */\n  q63_t acc;                  /* Accumlator */\n  q15_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */\n  uint32_t numStages = S->numStages; /* Number of stages */\n  uint32_t blkCnt, tapCnt;           /* Temporary variables for counts */\n  q15_t out;                         /* Temporary variable for output */\n\n#if defined(ARM_MATH_DSP) && defined(ARM_MATH_LOOPUNROLL)\n  q15_t gnext1, gnext2; /* Temporary variables for lattice stages */\n  q31_t v;              /* Temporary variable for ladder coefficient */\n#endif\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n#if defined(ARM_MATH_DSP)\n\n  /* Sample processing */\n  while (blkCnt > 0U) {\n    /* Read Sample from input buffer */\n    /* fN(n) = x(n) */\n    fcurr = *pSrc++;\n\n    /* Initialize Ladder coeff pointer */\n    pv = &S->pvCoeffs[0];\n\n    /* Initialize Reflection coeff pointer */\n    pk = &S->pkCoeffs[0];\n\n    /* Initialize state read pointer */\n    px1 = pState;\n\n    /* Initialize state write pointer */\n    px2 = pState;\n\n    /* Set accumulator to zero */\n    acc = 0;\n\n    /* Process sample for first tap */\n    gcurr = *px1++;\n    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */\n    fnext = fcurr - (((q31_t)gcurr * (*pk)) >> 15);\n    fnext = __SSAT(fnext, 16);\n\n    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */\n    gnext = (((q31_t)fnext * (*pk++)) >> 15) + gcurr;\n    gnext = __SSAT(gnext, 16);\n\n    /* write gN(n) into state for next sample processing */\n    *px2++ = (q15_t)gnext;\n\n    /* y(n) += gN(n) * vN */\n    acc += (q31_t)((gnext * (*pv++)));\n\n    /* Update f values for next coefficient processing */\n    fcurr = fnext;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = (numStages - 1U) >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Process sample for 2nd, 6th ...taps */\n      /* Read gN-2(n-1) from state buffer */\n      gcurr = *px1++;\n      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */\n      fnext = fcurr - (((q31_t)gcurr * (*pk)) >> 15);\n      fnext = __SSAT(fnext, 16);\n      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */\n      gnext = (((q31_t)fnext * (*pk++)) >> 15) + gcurr;\n      gnext1 = (q15_t)__SSAT(gnext, 16);\n      /* write gN-1(n) into state for next sample processing */\n      *px2++ = (q15_t)gnext1;\n\n      /* Process sample for 3nd, 7th ...taps */\n      /* Read gN-3(n-1) from state buffer */\n      gcurr = *px1++;\n      /* Process sample for 3rd, 7th .. taps */\n      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */\n      fcurr = fnext - (((q31_t)gcurr * (*pk)) >> 15);\n      fcurr = __SSAT(fcurr, 16);\n      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */\n      gnext = (((q31_t)fcurr * (*pk++)) >> 15) + gcurr;\n      gnext2 = (q15_t)__SSAT(gnext, 16);\n      /* write gN-2(n) into state */\n      *px2++ = (q15_t)gnext2;\n\n      /* Read vN-1 and vN-2 at a time */\n      v = read_q15x2_ia(&pv);\n\n      /* Pack gN-1(n) and gN-2(n) */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n      gnext = __PKHBT(gnext1, gnext2, 16);\n#else\n      gnext = __PKHBT(gnext2, gnext1, 16);\n#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */\n\n      /* y(n) += gN-1(n) * vN-1  */\n      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */\n      /* y(n) += gN-2(n) * vN-2  */\n      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */\n      acc = __SMLALD(gnext, v, acc);\n\n      /* Process sample for 4th, 8th ...taps */\n      /* Read gN-4(n-1) from state buffer */\n      gcurr = *px1++;\n      /* Process sample for 4th, 8th .. taps */\n      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */\n      fnext = fcurr - (((q31_t)gcurr * (*pk)) >> 15);\n      fnext = __SSAT(fnext, 16);\n      /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */\n      gnext = (((q31_t)fnext * (*pk++)) >> 15) + gcurr;\n      gnext1 = (q15_t)__SSAT(gnext, 16);\n      /* write  gN-3(n) for the next sample process */\n      *px2++ = (q15_t)gnext1;\n\n      /* Process sample for 5th, 9th ...taps */\n      /* Read gN-5(n-1) from state buffer */\n      gcurr = *px1++;\n      /* Process sample for 5th, 9th .. taps */\n      /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */\n      fcurr = fnext - (((q31_t)gcurr * (*pk)) >> 15);\n      fcurr = __SSAT(fcurr, 16);\n      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */\n      gnext = (((q31_t)fcurr * (*pk++)) >> 15) + gcurr;\n      gnext2 = (q15_t)__SSAT(gnext, 16);\n      /* write      gN-4(n) for the next sample process */\n      *px2++ = (q15_t)gnext2;\n\n      /* Read vN-3 and vN-4 at a time */\n      v = read_q15x2_ia(&pv);\n\n      /* Pack gN-3(n) and gN-4(n) */\n#ifndef ARM_MATH_BIG_ENDIAN\n      gnext = __PKHBT(gnext1, gnext2, 16);\n#else\n      gnext = __PKHBT(gnext2, gnext1, 16);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n      /* y(n) += gN-4(n) * vN-4  */\n      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */\n      /* y(n) += gN-3(n) * vN-3  */\n      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */\n      acc = __SMLALD(gnext, v, acc);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    fnext = fcurr;\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = (numStages - 1U) % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    tapCnt = (numStages - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      gcurr = *px1++;\n      /* Process sample for last taps */\n      fnext = fcurr - (((q31_t)gcurr * (*pk)) >> 15);\n      fnext = __SSAT(fnext, 16);\n      gnext = (((q31_t)fnext * (*pk++)) >> 15) + gcurr;\n      gnext = __SSAT(gnext, 16);\n\n      /* Output samples for last taps */\n      acc += (q31_t)(((q31_t)gnext * (*pv++)));\n      *px2++ = (q15_t)gnext;\n      fcurr = fnext;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* y(n) += g0(n) * v0 */\n    acc += (q31_t)(((q31_t)fnext * (*pv++)));\n\n    out = (q15_t)__SSAT(acc >> 15, 16);\n    *px2++ = (q15_t)fnext;\n\n    /* write out into pDst */\n    *pDst++ = out;\n\n    /* Advance the state pointer by 4 to process the next group of 4 samples */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete. Now copy last S->numStages samples to start of the\n     buffer for the preperation of next frame process */\n\n  /* Points to the start of the state buffer */\n  pStateCur = &S->pState[0];\n  pState = &S->pState[blockSize];\n\n  /* copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = numStages >> 2U;\n\n  while (tapCnt > 0U) {\n    write_q15x2_ia(&pStateCur, read_q15x2_ia(&pState));\n    write_q15x2_ia(&pStateCur, read_q15x2_ia(&pState));\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = numStages % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  tapCnt = (numStages - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  /* Sample processing */\n  while (blkCnt > 0U) {\n    /* Read Sample from input buffer */\n    /* fN(n) = x(n) */\n    fcurr = *pSrc++;\n\n    /* Initialize Ladder coeff pointer */\n    pv = &S->pvCoeffs[0];\n\n    /* Initialize Reflection coeff pointer */\n    pk = &S->pkCoeffs[0];\n\n    /* Initialize state read pointer */\n    px1 = pState;\n\n    /* Initialize state write pointer */\n    px2 = pState;\n\n    /* Set accumulator to zero */\n    acc = 0;\n\n    tapCnt = numStages;\n\n    while (tapCnt > 0U) {\n      gcurr = *px1++;\n      /* Process sample */\n      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */\n      fnext = fcurr - ((gcurr * (*pk)) >> 15);\n      fnext = __SSAT(fnext, 16);\n\n      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */\n      gnext = ((fnext * (*pk++)) >> 15) + gcurr;\n      gnext = __SSAT(gnext, 16);\n\n      /* Output samples */\n      /* y(n) += gN(n) * vN */\n      acc += (q31_t)((gnext * (*pv++)));\n\n      /* write gN(n) into state for next sample processing */\n      *px2++ = (q15_t)gnext;\n\n      /* Update f values for next coefficient processing */\n      fcurr = fnext;\n\n      tapCnt--;\n    }\n\n    /* y(n) += g0(n) * v0 */\n    acc += (q31_t)((fnext * (*pv++)));\n\n    out = (q15_t)__SSAT(acc >> 15, 16);\n    *px2++ = (q15_t)fnext;\n\n    /* write out into pDst */\n    *pDst++ = out;\n\n    /* Advance the state pointer by 1 to process the next group of samples */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete. Now copy last S->numStages samples to start of the\n     buffer for the preperation of next frame process */\n\n  /* Points to the start of the state buffer */\n  pStateCur = &S->pState[0];\n  pState = &S->pState[blockSize];\n\n  tapCnt = numStages;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @} end of IIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_iir_lattice_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_iir_lattice_q31.c\n * Description:  Q31 IIR Lattice filter processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup IIR_Lattice\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 IIR lattice filter.\n  @param[in]     S          points to an instance of the Q31 IIR lattice\n  structure\n  @param[in]     pSrc       points to the block of input data\n  @param[out]    pDst       points to the block of output data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The accumulator has a 2.62 format and maintains full precision of\n  the intermediate multiplication results but provides only a single guard bit.\n                   Thus, if the accumulator result overflows it wraps around\n  rather than clip. In order to avoid overflows completely the input signal must\n  be scaled down by 2*log2(numStages) bits. After all multiply-accumulates are\n  performed, the 2.62 accumulator is saturated to 1.32 format and then truncated\n  to 1.31 format.\n */\n\nvoid arm_iir_lattice_q31(const arm_iir_lattice_instance_q31 *S,\n                         const q31_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  q31_t *pState = S->pState; /* State pointer */\n  q31_t *pStateCur;          /* State current pointer */\n  q31_t fcurr, fnext = 0, gcurr = 0,\n               gnext;         /* Temporary variables for lattice stages */\n  q63_t acc;                  /* Accumlator */\n  q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */\n  uint32_t numStages = S->numStages; /* Number of stages */\n  uint32_t blkCnt, tapCnt;           /* Temporary variables for counts */\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n#if defined(ARM_MATH_DSP)\n\n  /* Sample processing */\n  while (blkCnt > 0U) {\n    /* Read Sample from input buffer */\n    /* fN(n) = x(n) */\n    fcurr = *pSrc++;\n\n    /* Initialize Ladder coeff pointer */\n    pv = &S->pvCoeffs[0];\n\n    /* Initialize Reflection coeff pointer */\n    pk = &S->pkCoeffs[0];\n\n    /* Initialize state read pointer */\n    px1 = pState;\n\n    /* Initialize state write pointer */\n    px2 = pState;\n\n    /* Set accumulator to zero */\n    acc = 0;\n\n    /* Process sample for first tap */\n    gcurr = *px1++;\n    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */\n    fnext = __QSUB(fcurr, (q31_t)(((q63_t)gcurr * (*pk)) >> 31));\n\n    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */\n    gnext = __QADD(gcurr, (q31_t)(((q63_t)fnext * (*pk++)) >> 31));\n\n    /* write gN-1(n-1) into state for next sample processing */\n    *px2++ = gnext;\n\n    /* y(n) += gN(n) * vN */\n    acc += ((q63_t)gnext * *pv++);\n\n    /* Update f values for next coefficient processing */\n    fcurr = fnext;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = (numStages - 1U) >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Process sample for 2nd, 6th ...taps */\n      /* Read gN-2(n-1) from state buffer */\n      gcurr = *px1++;\n      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */\n      fnext = __QSUB(fcurr, (q31_t)(((q63_t)gcurr * (*pk)) >> 31));\n      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */\n      gnext = __QADD(gcurr, (q31_t)(((q63_t)fnext * (*pk++)) >> 31));\n      /* y(n) += gN-1(n) * vN-1  */\n      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */\n      acc += ((q63_t)gnext * *pv++);\n      /* write gN-1(n) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* Process sample for 3nd, 7th ...taps */\n      /* Read gN-3(n-1) from state buffer */\n      gcurr = *px1++;\n      /* Process sample for 3rd, 7th .. taps */\n      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */\n      fcurr = __QSUB(fnext, (q31_t)(((q63_t)gcurr * (*pk)) >> 31));\n      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */\n      gnext = __QADD(gcurr, (q31_t)(((q63_t)fcurr * (*pk++)) >> 31));\n      /* y(n) += gN-2(n) * vN-2  */\n      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */\n      acc += ((q63_t)gnext * *pv++);\n      /* write gN-2(n) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* Process sample for 4th, 8th ...taps */\n      /* Read gN-4(n-1) from state buffer */\n      gcurr = *px1++;\n      /* Process sample for 4th, 8th .. taps */\n      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */\n      fnext = __QSUB(fcurr, (q31_t)(((q63_t)gcurr * (*pk)) >> 31));\n      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */\n      gnext = __QADD(gcurr, (q31_t)(((q63_t)fnext * (*pk++)) >> 31));\n      /* y(n) += gN-3(n) * vN-3  */\n      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */\n      acc += ((q63_t)gnext * *pv++);\n      /* write gN-3(n) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* Process sample for 5th, 9th ...taps */\n      /* Read gN-5(n-1) from state buffer */\n      gcurr = *px1++;\n      /* Process sample for 5th, 9th .. taps */\n      /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */\n      fcurr = __QSUB(fnext, (q31_t)(((q63_t)gcurr * (*pk)) >> 31));\n      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */\n      gnext = __QADD(gcurr, (q31_t)(((q63_t)fcurr * (*pk++)) >> 31));\n      /* y(n) += gN-4(n) * vN-4  */\n      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */\n      acc += ((q63_t)gnext * *pv++);\n\n      /* write gN-4(n) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    fnext = fcurr;\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = (numStages - 1U) % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    tapCnt = (numStages - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      gcurr = *px1++;\n      /* Process sample for last taps */\n      fnext = __QSUB(fcurr, (q31_t)(((q63_t)gcurr * (*pk)) >> 31));\n      gnext = __QADD(gcurr, (q31_t)(((q63_t)fnext * (*pk++)) >> 31));\n\n      /* Output samples for last taps */\n      acc += ((q63_t)gnext * *pv++);\n      *px2++ = gnext;\n      fcurr = fnext;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* y(n) += g0(n) * v0 */\n    acc += ((q63_t)fnext * *pv++);\n\n    *px2++ = fnext;\n\n    /* write out into pDst */\n    *pDst++ = (q31_t)(acc >> 31U);\n\n    /* Advance the state pointer by 4 to process the next group of 4 samples */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete. Now copy last S->numStages samples to start of the\n     buffer for the preperation of next frame process */\n\n  /* Points to the start of the state buffer */\n  pStateCur = &S->pState[0];\n  pState = &S->pState[blockSize];\n\n  /* Copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = numStages >> 2U;\n\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = numStages % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  tapCnt = (numStages - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  /* Sample processing */\n  while (blkCnt > 0U) {\n    /* Read Sample from input buffer */\n    /* fN(n) = x(n) */\n    fcurr = *pSrc++;\n\n    /* Initialize Ladder coeff pointer */\n    pv = &S->pvCoeffs[0];\n\n    /* Initialize Reflection coeff pointer */\n    pk = &S->pkCoeffs[0];\n\n    /* Initialize state read pointer */\n    px1 = pState;\n\n    /* Initialize state write pointer */\n    px2 = pState;\n\n    /* Set accumulator to zero */\n    acc = 0;\n\n    tapCnt = numStages;\n\n    while (tapCnt > 0U) {\n      gcurr = *px1++;\n      /* Process sample */\n      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */\n      fnext = clip_q63_to_q31(\n          ((q63_t)fcurr - ((q31_t)(((q63_t)gcurr * (*pk)) >> 31))));\n\n      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */\n      gnext = clip_q63_to_q31(\n          ((q63_t)gcurr + ((q31_t)(((q63_t)fnext * (*pk++)) >> 31))));\n\n      /* Output samples */\n      /* y(n) += gN(n) * vN */\n      acc += ((q63_t)gnext * *pv++);\n\n      /* write gN-1(n-1) into state for next sample processing */\n      *px2++ = gnext;\n\n      /* Update f values for next coefficient processing */\n      fcurr = fnext;\n\n      tapCnt--;\n    }\n\n    /* y(n) += g0(n) * v0 */\n    acc += ((q63_t)fnext * *pv++);\n\n    *px2++ = fnext;\n\n    /* write out into pDst */\n    *pDst++ = (q31_t)(acc >> 31U);\n\n    /* Advance the state pointer by 1 to process the next group of samples */\n    pState = pState + 1U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete. Now copy last S->numStages samples to start of the\n     buffer for the preperation of next frame process */\n\n  /* Points to the start of the state buffer */\n  pStateCur = &S->pState[0];\n  pState = &S->pState[blockSize];\n\n  tapCnt = numStages;\n\n  /* Copy data */\n  while (tapCnt > 0U) {\n    *pStateCur++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @} end of IIR_Lattice group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_f32.c\n * Description:  Processing function for the floating-point LMS filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup LMS Least Mean Square (LMS) Filters\n\n  LMS filters are a class of adaptive filters that are able to \"learn\" an\n  unknown transfer functions. LMS filters use a gradient descent method in which\n  the filter coefficients are updated based on the instantaneous error signal.\n  Adaptive filters are often used in communication systems, equalizers, and\n  noise removal. The CMSIS DSP Library contains LMS filter functions that\n  operate on Q15, Q31, and floating-point data types. The library also contains\n  normalized LMS filters in which the filter coefficient adaptation is\n  indepedent of the level of the input signal.\n\n  An LMS filter consists of two components as shown below.\n  The first component is a standard transversal or FIR filter.\n  The second component is a coefficient update mechanism.\n  The LMS filter has two input signals.\n  The \"input\" feeds the FIR filter while the \"reference input\" corresponds to\n  the desired output of the FIR filter. That is, the FIR filter coefficients are\n  updated so that the output of the FIR filter matches the reference input. The\n  filter coefficient update mechanism is based on the difference between the FIR\n  filter output and the reference input. This \"error signal\" tends towards zero\n  as the filter adapts. The LMS processing functions accept the input and\n  reference input signals and generate the filter output and error signal.\n  \\image html LMS.gif \"Internal structure of the Least Mean Square filter\"\n\n  The functions operate on blocks of data and each call to the function\n  processes blockSize samples through the filter. pSrc\n  points to input signal, pRef points to reference signal,\n  pOut points to output signal and pErr points to\n  error signal. All arrays contain blockSize values.\n\n  The functions operate on a block-by-block basis.\n  Internally, the filter coefficients b[n] are updated on a\n  sample-by-sample basis. The convergence of the LMS filter is slower compared\n  to the normalized LMS algorithm.\n\n  @par           Algorithm\n                   The output signal y[n] is computed by a standard\n  FIR filter: 
 y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+\n  b[numTaps-1] * x[n-numTaps+1]\n  
\n\n  @par\n                   The error signal equals the difference between the reference\n  signal d[n] and the filter output: 
 e[n] = d[n] - y[n].\n  
\n\n  @par\n                   After each sample of the error signal is computed, the filter\n  coefficients b[k] are updated on a sample-by-sample basis: 
\n      b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1\n  
\n                   where mu is the step size and controls the rate\n  of coefficient convergence.\n  @par\n                   In the APIs, pCoeffs points to a coefficient\n  array of size numTaps. Coefficients are stored in time reversed\n  order.\n  @par\n  
\n     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}\n  
\n  @par\n                   pState points to a state array of size\n  numTaps + blockSize - 1. Samples in the state buffer are stored\n  in the order:\n  @par\n  
\n     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0],\n  x[1], ..., x[blockSize-1]}\n  
\n  @par\n                   Note that the length of the state buffer exceeds the length\n  of the coefficient array by blockSize-1 samples. The increased\n  state buffer length allows circular addressing, which is traditionally used in\n  FIR filters, to be avoided and yields a significant speed improvement. The\n  state variables are updated after each block of data is processed.\n  @par           Instance Structure\n                   The coefficients and state variables for a filter are stored\n  together in an instance data structure. A separate instance structure must be\n  defined for each filter and coefficient and state arrays cannot be shared\n  among instances. There are separate instance structure declarations for each\n  of the 3 supported data types.\n\n  @par           Initialization Functions\n                   There is also an associated initialization function for each\n  data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n  the follow subfields of the instance structure: numTaps, pCoeffs, mu,\n  postShift (not for f32), pState. Also set all of the values in pState to zero.\n\n  @par\n                 Use of the initialization function is optional.\n                 However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Set the values in the state buffer to zeros before\n  static initialization. The code below statically initializes each of the 3\n  different data type filter instance structures 
 arm_lms_instance_f32 S =\n  {numTaps, pState, pCoeffs, mu}; arm_lms_instance_q31 S = {numTaps, pState,\n  pCoeffs, mu, postShift}; arm_lms_instance_q15 S = {numTaps, pState, pCoeffs,\n  mu, postShift};\n  
\n                 where numTaps is the number of filter coefficients\n  in the filter; pState is the address of the state buffer;\n                 pCoeffs is the address of the coefficient buffer;\n  mu is the step size parameter; and postShift is the\n  shift applied to coefficients.\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the Q15 and Q31 versions of the\n  LMS filter. The following issues must be considered:\n                   - Scaling of coefficients\n                   - Overflow and saturation\n\n  @par           Scaling of Coefficients\n                   Filter coefficients are represented as fractional values and\n                   coefficients are restricted to lie in the range [-1\n  +1). The fixed-point functions have an additional scaling parameter\n  postShift. At the output of the filter's accumulator is a shift\n  register which shifts the result by postShift bits. This\n  essentially scales the filter coefficients by 2^postShift and\n                   allows the filter coefficients to exceed the range [+1\n  -1). The value of postShift is set by the user based on\n  the expected gain through the system being modeled.\n\n  @par           Overflow and Saturation\n                   Overflow and saturation behavior of the fixed-point Q15 and\n  Q31 versions are described separately as part of the function specific\n  documentation below.\n */\n\n/**\n  @addtogroup LMS\n  @{\n */\n\n/**\n  @brief         Processing function for floating-point LMS filter.\n  @param[in]     S          points to an instance of the floating-point LMS\n  filter structure\n  @param[in]     pSrc       points to the block of input data\n  @param[in]     pRef       points to the block of reference data\n  @param[out]    pOut       points to the block of output data\n  @param[out]    pErr       points to the block of error data\n  @param[in]     blockSize  number of samples to process\n  @return        none\n */\n\nvoid arm_lms_f32(const arm_lms_instance_f32 *S, const float32_t *pSrc,\n                 float32_t *pRef, float32_t *pOut, float32_t *pErr,\n                 uint32_t blockSize) {\n  float32_t *pState = S->pState;   /* State pointer */\n  float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t *pStateCurnt; /* Points to the current sample of the state */\n  float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */\n  float32_t mu = S->mu; /* Adaptive factor */\n  float32_t acc, e;     /* Accumulator, error */\n  float32_t w;          /* Weight factor */\n  uint32_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter */\n  uint32_t tapCnt, blkCnt; /* Loop counters */\n\n  /* Initializations of error,  difference, Coefficient update */\n  e = 0.0f;\n  w = 0.0f;\n\n  /* S->pState points to state array which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n  while (blkCnt > 0U) {\n    /* Copy the new input sample into the state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Set the accumulator to zero */\n    acc = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      acc += (*px++) * (*pb++);\n\n      acc += (*px++) * (*pb++);\n\n      acc += (*px++) * (*pb++);\n\n      acc += (*px++) * (*pb++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      acc += (*px++) * (*pb++);\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Store the result from accumulator into the destination buffer. */\n    *pOut++ = acc;\n\n    /* Compute and store error */\n    e = (float32_t)*pRef++ - acc;\n    *pErr++ = e;\n\n    /* Calculation of Weighting factor for updating filter coefficients */\n    w = e * mu;\n\n    /* Initialize pState pointer */\n    /* Advance state pointer by 1 for the next sample */\n    px = pState++;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    /* Update filter coefficients */\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      *pb += w * (*px++);\n      pb++;\n\n      *pb += w * (*px++);\n      pb++;\n\n      *pb += w * (*px++);\n      pb++;\n\n      *pb += w * (*px++);\n      pb++;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      *pb += w * (*px++);\n      pb++;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the pState buffer */\n  pStateCurnt = S->pState;\n\n  /* copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of LMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_init_f32.c\n * Description:  Floating-point LMS filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup LMS\n  @{\n */\n\n/**\n  @brief         Initialization function for floating-point LMS filter.\n  @param[in]     S          points to an instance of the floating-point LMS\n  filter structure\n  @param[in]     numTaps    number of filter coefficients\n  @param[in]     pCoeffs    points to coefficient buffer\n  @param[in]     pState     points to state buffer\n  @param[in]     mu         step size that controls filter coefficient updates\n  @param[in]     blockSize  number of samples to process\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n                   The initial filter coefficients serve as a starting point for\n  the adaptive filter. pState points to an array of length\n  numTaps+blockSize-1 samples, where blockSize is the\n  number of input samples processed by each call to arm_lms_f32().\n */\n\nvoid arm_lms_init_f32(arm_lms_instance_f32 *S, uint16_t numTaps,\n                      float32_t *pCoeffs, float32_t *pState, float32_t mu,\n                      uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numTaps */\n  memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n\n  /* Assign Step size value */\n  S->mu = mu;\n}\n\n/**\n  @} end of LMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_init_q15.c\n * Description:  Q15 LMS filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup LMS\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 LMS filter.\n  @param[in]     S          points to an instance of the Q15 LMS filter\n  structure.\n  @param[in]     numTaps    number of filter coefficients.\n  @param[in]     pCoeffs    points to coefficient buffer.\n  @param[in]     pState     points to state buffer.\n  @param[in]     mu         step size that controls filter coefficient updates.\n  @param[in]     blockSize  number of samples to process.\n  @param[in]     postShift  bit shift applied to coefficients.\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n                   The initial filter coefficients serve as a starting point for\n  the adaptive filter. pState points to the array of state\n  variables and size of array is numTaps+blockSize-1 samples, where\n  blockSize is the number of input samples processed by each call\n  to arm_lms_q15().\n */\n\nvoid arm_lms_init_q15(arm_lms_instance_q15 *S, uint16_t numTaps, q15_t *pCoeffs,\n                      q15_t *pState, q15_t mu, uint32_t blockSize,\n                      uint32_t postShift) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numTaps - 1 */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n\n  /* Assign Step size value */\n  S->mu = mu;\n\n  /* Assign postShift value to be applied */\n  S->postShift = postShift;\n}\n\n/**\n  @} end of LMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_init_q31.c\n * Description:  Q31 LMS filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup LMS\n  @{\n */\n\n/**\n  @brief         Initialization function for Q31 LMS filter.\n  @param[in]     S          points to an instance of the Q31 LMS filter\n  structure\n  @param[in]     numTaps    number of filter coefficients\n  @param[in]     pCoeffs    points to coefficient buffer\n  @param[in]     pState     points to state buffer\n  @param[in]     mu         step size that controls filter coefficient updates\n  @param[in]     blockSize  number of samples to process\n  @param[in]     postShift  bit shift applied to coefficients\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n                   The initial filter coefficients serve as a starting point for\n  the adaptive filter. pState points to an array of length\n  numTaps+blockSize-1 samples, where blockSize is the\n  number of input samples processed by each call to arm_lms_q31().\n */\n\nvoid arm_lms_init_q31(arm_lms_instance_q31 *S, uint16_t numTaps, q31_t *pCoeffs,\n                      q31_t *pState, q31_t mu, uint32_t blockSize,\n                      uint32_t postShift) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numTaps - 1 */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n\n  /* Assign Step size value */\n  S->mu = mu;\n\n  /* Assign postShift value to be applied */\n  S->postShift = postShift;\n}\n\n/**\n  @} end of LMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_norm_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_norm_f32.c\n * Description:  Processing function for the floating-point NLMS filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @defgroup LMS_NORM Normalized LMS Filters\n\n  This set of functions implements a commonly used adaptive filter.\n  It is related to the Least Mean Square (LMS) adaptive filter and includes an\n additional normalization factor which increases the adaptation rate of the\n filter. The CMSIS DSP Library contains normalized LMS filter functions that\n operate on Q15, Q31, and floating-point data types.\n\n  A normalized least mean square (NLMS) filter consists of two components as\n shown below. The first component is a standard transversal or FIR filter. The\n second component is a coefficient update mechanism. The NLMS filter has two\n input signals. The \"input\" feeds the FIR filter while the \"reference input\"\n corresponds to the desired output of the FIR filter. That is, the FIR filter\n coefficients are updated so that the output of the FIR filter matches the\n reference input. The filter coefficient update mechanism is based on the\n difference between the FIR filter output and the reference input. This \"error\n signal\" tends towards zero as the filter adapts. The NLMS processing functions\n accept the input and reference input signals and generate the filter output and\n error signal. \\image html LMS.gif \"Internal structure of the NLMS adaptive\n filter\"\n\n  The functions operate on blocks of data and each call to the function\n processes blockSize samples through the filter. pSrc\n points to input signal, pRef points to reference signal,\n  pOut points to output signal and pErr points to\n error signal. All arrays contain blockSize values.\n\n  The functions operate on a block-by-block basis.\n  Internally, the filter coefficients b[n] are updated on a\n sample-by-sample basis. The convergence of the LMS filter is slower compared to\n the normalized LMS algorithm.\n\n @par            Algorithm\n                   The output signal y[n] is computed by a standard\n FIR filter: 
 y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+\n b[numTaps-1] * x[n-numTaps+1]\n  
\n\n @par\n                   The error signal equals the difference between the reference\n signal d[n] and the filter output: 
 e[n] = d[n] - y[n].\n  
\n\n @par\n                   After each sample of the error signal is computed the\n instanteous energy of the filter state variables is calculated: 
 E =\n x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.\n  
\n                   The filter coefficients b[k] are then updated on\n a sample-by-sample basis: 
 b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0,\n 1, ..., numTaps-1\n  
\n                   where mu is the step size and controls the rate\n of coefficient convergence.\n @par\n                   In the APIs, pCoeffs points to a coefficient\n array of size numTaps. Coefficients are stored in time reversed\n order.\n @par\n  
\n     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}\n  
\n @par\n                   pState points to a state array of size\n numTaps + blockSize - 1. Samples in the state buffer are stored in\n the order:\n @par\n  
\n     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0],\n x[1], ..., x[blockSize-1]}\n  
\n @par\n                   Note that the length of the state buffer exceeds the length\n of the coefficient array by blockSize-1 samples. The increased\n state buffer length allows circular addressing, which is traditionally used in\n FIR filters, to be avoided and yields a significant speed improvement. The\n state variables are updated after each block of data is processed.\n\n @par            Instance Structure\n                   The coefficients and state variables for a filter are stored\n together in an instance data structure. A separate instance structure must be\n defined for each filter and coefficient and state arrays cannot be shared among\n instances. There are separate instance structure declarations for each of the 3\n supported data types.\n\n @par            Initialization Functions\n                   There is also an associated initialization function for each\n data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Zeros out the values in the state buffer.\n                   To do this manually without calling the init function, assign\n the follow subfields of the instance structure: numTaps, pCoeffs, mu, energy,\n x0, pState. Also set all of the values in pState to zero. For Q7, Q15, and Q31\n the following fields must also be initialized; recipTable, postShift\n @par\n                   Instance structure cannot be placed into a const data section\n and it is recommended to use the initialization function.\n @par            Fixed-Point Behavior\n                   Care must be taken when using the Q15 and Q31 versions of the\n normalised LMS filter. The following issues must be considered:\n                   - Scaling of coefficients\n                   - Overflow and saturation\n\n @par            Scaling of Coefficients\n                   Filter coefficients are represented as fractional values and\n                   coefficients are restricted to lie in the range [-1\n +1). The fixed-point functions have an additional scaling parameter\n postShift. At the output of the filter's accumulator is a shift\n register which shifts the result by postShift bits. This\n essentially scales the filter coefficients by 2^postShift and\n                   allows the filter coefficients to exceed the range [+1\n -1). The value of postShift is set by the user based on the\n expected gain through the system being modeled.\n\n @par            Overflow and Saturation\n                   Overflow and saturation behavior of the fixed-point Q15 and\n Q31 versions are described separately as part of the function specific\n documentation below.\n */\n\n/**\n  @addtogroup LMS_NORM\n  @{\n */\n\n/**\n  @brief         Processing function for floating-point normalized LMS filter.\n  @param[in]     S         points to an instance of the floating-point\n  normalized LMS filter structure\n  @param[in]     pSrc      points to the block of input data\n  @param[in]     pRef      points to the block of reference data\n  @param[out]    pOut      points to the block of output data\n  @param[out]    pErr      points to the block of error data\n  @param[in]     blockSize number of samples to process\n  @return        none\n */\n\nvoid arm_lms_norm_f32(arm_lms_norm_instance_f32 *S, const float32_t *pSrc,\n                      float32_t *pRef, float32_t *pOut, float32_t *pErr,\n                      uint32_t blockSize) {\n  float32_t *pState = S->pState;   /* State pointer */\n  float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  float32_t *pStateCurnt; /* Points to the current sample of the state */\n  float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */\n  float32_t mu = S->mu; /* Adaptive factor */\n  float32_t acc, e;     /* Accumulator, error */\n  float32_t w;          /* Weight factor */\n  uint32_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter */\n  uint32_t tapCnt, blkCnt; /* Loop counters */\n  float32_t energy;        /* Energy of the input */\n  float32_t x0, in; /* Temporary variable to hold input sample and state */\n\n  /* Initializations of error,  difference, Coefficient update */\n  e = 0.0f;\n  w = 0.0f;\n\n  energy = S->energy;\n  x0 = S->x0;\n\n  /* S->pState points to buffer which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n  while (blkCnt > 0U) {\n    /* Copy the new input sample into the state buffer */\n    *pStateCurnt++ = *pSrc;\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Read the sample from input buffer */\n    in = *pSrc++;\n\n    /* Update the energy calculation */\n    energy -= x0 * x0;\n    energy += in * in;\n\n    /* Set the accumulator to zero */\n    acc = 0.0f;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      acc += (*px++) * (*pb++);\n\n      acc += (*px++) * (*pb++);\n\n      acc += (*px++) * (*pb++);\n\n      acc += (*px++) * (*pb++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      acc += (*px++) * (*pb++);\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Store the result from accumulator into the destination buffer. */\n    *pOut++ = acc;\n\n    /* Compute and store error */\n    e = (float32_t)*pRef++ - acc;\n    *pErr++ = e;\n\n    /* Calculation of Weighting factor for updating filter coefficients */\n    /* epsilon value 0.000000119209289f */\n    w = (e * mu) / (energy + 0.000000119209289f);\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    /* Update filter coefficients */\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      *pb += w * (*px++);\n      pb++;\n\n      *pb += w * (*px++);\n      pb++;\n\n      *pb += w * (*px++);\n      pb++;\n\n      *pb += w * (*px++);\n      pb++;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      *pb += w * (*px++);\n      pb++;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    x0 = *pState;\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Save energy and x0 values for the next frame */\n  S->energy = energy;\n  S->x0 = x0;\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the pState buffer */\n  pStateCurnt = S->pState;\n\n  /* copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of LMS_NORM group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_norm_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_norm_init_f32.c\n * Description:  Floating-point NLMS filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup LMS_NORM\n  @{\n */\n\n/**\n  @brief         Initialization function for floating-point normalized LMS\n  filter.\n  @param[in]     S         points to an instance of the floating-point LMS\n  filter structure\n  @param[in]     numTaps   number of filter coefficients\n  @param[in]     pCoeffs   points to coefficient buffer\n  @param[in]     pState    points to state buffer\n  @param[in]     mu        step size that controls filter coefficient updates\n  @param[in]     blockSize number of samples to process\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n                   The initial filter coefficients serve as a starting point for\n  the adaptive filter. pState points to an array of length\n  numTaps+blockSize-1 samples, where blockSize is the\n  number of input samples processed by each call to\n  arm_lms_norm_f32().\n */\n\nvoid arm_lms_norm_init_f32(arm_lms_norm_instance_f32 *S, uint16_t numTaps,\n                           float32_t *pCoeffs, float32_t *pState, float32_t mu,\n                           uint32_t blockSize) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numTaps - 1 */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));\n\n  /* Assign state pointer */\n  S->pState = pState;\n\n  /* Assign Step size value */\n  S->mu = mu;\n\n  /* Initialise Energy to zero */\n  S->energy = 0.0f;\n\n  /* Initialise x0 to zero */\n  S->x0 = 0.0f;\n}\n\n/**\n  @} end of LMS_NORM group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_norm_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_norm_init_q15.c\n * Description:  Q15 NLMS filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @addtogroup LMS_NORM\n  @{\n */\n\n/**\n  @brief         Initialization function for Q15 normalized LMS filter.\n  @param[in]     S         points to an instance of the Q15 normalized LMS\n  filter structure.\n  @param[in]     numTaps   number of filter coefficients.\n  @param[in]     pCoeffs   points to coefficient buffer.\n  @param[in]     pState    points to state buffer.\n  @param[in]     mu        step size that controls filter coefficient updates.\n  @param[in]     blockSize number of samples to process.\n  @param[in]     postShift bit shift applied to coefficients.\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n                   The initial filter coefficients serve as a starting point for\n  the adaptive filter. pState points to the array of state\n  variables and size of array is numTaps+blockSize-1 samples, where\n  blockSize is the number of input samples processed by each call\n  to arm_lms_norm_q15().\n */\n\nvoid arm_lms_norm_init_q15(arm_lms_norm_instance_q15 *S, uint16_t numTaps,\n                           q15_t *pCoeffs, q15_t *pState, q15_t mu,\n                           uint32_t blockSize, uint8_t postShift) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numTaps - 1 */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));\n\n  /* Assign post Shift value applied to coefficients */\n  S->postShift = postShift;\n\n  /* Assign state pointer */\n  S->pState = pState;\n\n  /* Assign Step size value */\n  S->mu = mu;\n\n  /* Initialize reciprocal pointer table */\n  S->recipTable = (q15_t *)armRecipTableQ15;\n\n  /* Initialise Energy to zero */\n  S->energy = 0;\n\n  /* Initialise x0 to zero */\n  S->x0 = 0;\n}\n\n/**\n  @} end of LMS_NORM group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_norm_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_norm_init_q31.c\n * Description:  Q31 NLMS filter initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @addtogroup LMS_NORM\n  @{\n */\n\n/**\n  @brief         Initialization function for Q31 normalized LMS filter.\n  @param[in]     S         points to an instance of the Q31 normalized LMS\n  filter structure.\n  @param[in]     numTaps   number of filter coefficients.\n  @param[in]     pCoeffs   points to coefficient buffer.\n  @param[in]     pState    points to state buffer.\n  @param[in]     mu        step size that controls filter coefficient updates.\n  @param[in]     blockSize number of samples to process.\n  @param[in]     postShift bit shift applied to coefficients.\n  @return        none\n\n  @par           Details\n                   pCoeffs points to the array of filter\n  coefficients stored in time reversed order: 
 {b[numTaps-1], b[numTaps-2],\n  b[N-2], ..., b[1], b[0]}\n  
\n                   The initial filter coefficients serve as a starting point for\n  the adaptive filter. pState points to an array of length\n  numTaps+blockSize-1 samples, where blockSize is the\n  number of input samples processed by each call to\n  arm_lms_norm_q31().\n */\n\nvoid arm_lms_norm_init_q31(arm_lms_norm_instance_q31 *S, uint16_t numTaps,\n                           q31_t *pCoeffs, q31_t *pState, q31_t mu,\n                           uint32_t blockSize, uint8_t postShift) {\n  /* Assign filter taps */\n  S->numTaps = numTaps;\n\n  /* Assign coefficient pointer */\n  S->pCoeffs = pCoeffs;\n\n  /* Clear state buffer and size is always blockSize + numTaps - 1 */\n  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));\n\n  /* Assign post Shift value applied to coefficients */\n  S->postShift = postShift;\n\n  /* Assign state pointer */\n  S->pState = pState;\n\n  /* Assign Step size value */\n  S->mu = mu;\n\n  /* Initialize reciprocal pointer table */\n  S->recipTable = (q31_t *)armRecipTableQ31;\n\n  /* Initialise Energy to zero */\n  S->energy = 0;\n\n  /* Initialise x0 to zero */\n  S->x0 = 0;\n}\n\n/**\n  @} end of LMS_NORM group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_norm_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_norm_q15.c\n * Description:  Processing function for Q15 normalized LMS filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup LMS_NORM\n  @{\n */\n\n/**\n  @brief         Processing function for Q15 normalized LMS filter.\n  @param[in]     S         points to an instance of the Q15 normalized LMS\n filter structure\n  @param[in]     pSrc      points to the block of input data\n  @param[in]     pRef      points to the block of reference data\n  @param[out]    pOut      points to the block of output data\n  @param[out]    pErr      points to the block of error data\n  @param[in]     blockSize number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n accumulator. Both coefficients and state variables are represented in 1.15\n format and multiplications yield a 2.30 result. The 2.30 intermediate results\n are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of\n internal overflow with this approach and the full precision of intermediate\n multiplications is preserved. After all additions have been performed, the\n accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly, the\n accumulator is saturated to yield a result in 1.15 format.\n @par\n                       In this filter, filter coefficients are updated for each\n sample and the updation of filter cofficients are saturted.\n */\n\nvoid arm_lms_norm_q15(arm_lms_norm_instance_q15 *S, const q15_t *pSrc,\n                      q15_t *pRef, q15_t *pOut, q15_t *pErr,\n                      uint32_t blockSize) {\n  q15_t *pState = S->pState;   /* State pointer */\n  q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCurnt;          /* Points to the current sample of the state */\n  q15_t *px, *pb;   /* Temporary pointers for state and coefficient buffers */\n  q15_t mu = S->mu; /* Adaptive factor */\n  uint32_t numTaps =\n      S->numTaps;              /* Number of filter coefficients in the filter */\n  uint32_t tapCnt, blkCnt;     /* Loop counters */\n  q63_t acc;                   /* Accumulator */\n  q31_t energy;                /* Energy of the input */\n  q15_t e = 0, d = 0;          /* Error, reference data sample */\n  q15_t w = 0, in;             /* Weight factor and state */\n  q15_t x0;                    /* Temporary variable to hold input sample */\n  q15_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu\n                                  product and reciprocal of energy */\n  q15_t postShift;    /* Post shift to be applied to weight after reciprocal\n                         calculation */\n  q31_t coef;         /* Temporary variable for coefficient */\n  q31_t acc_l, acc_h; /* Temporary input */\n  int32_t lShift = (15 - (int32_t)S->postShift); /*  Post shift  */\n  int32_t uShift = (32 - lShift);\n\n  energy = S->energy;\n  x0 = S->x0;\n\n  /* S->pState points to buffer which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n  while (blkCnt > 0U) {\n    /* Copy the new input sample into the state buffer */\n    *pStateCurnt++ = *pSrc;\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Read the sample from input buffer */\n    in = *pSrc++;\n\n    /* Update the energy calculation */\n    energy -= (((q31_t)x0 * (x0)) >> 15);\n    energy += (((q31_t)in * (in)) >> 15);\n\n    /* Set the accumulator to zero */\n    acc = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */\n      acc = __SMLALD(read_q15x2_ia(&px), read_q15x2_ia(&pb), acc);\n      acc = __SMLALD(read_q15x2_ia(&px), read_q15x2_ia(&pb), acc);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      acc += (q63_t)(((q31_t)(*px++) * (*pb++)));\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Calc lower part of acc */\n    acc_l = acc & 0xffffffff;\n\n    /* Calc upper part of acc */\n    acc_h = (acc >> 32) & 0xffffffff;\n\n    /* Apply shift for lower part of acc and upper part of acc */\n    acc = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n    /* Converting the result to 1.15 format and saturate the output */\n    acc = __SSAT(acc, 16U);\n\n    /* Store the result from accumulator into the destination buffer. */\n    *pOut++ = (q15_t)acc;\n\n    /* Compute and store error */\n    d = *pRef++;\n    e = d - (q15_t)acc;\n    *pErr++ = e;\n\n    /* Calculation of 1/energy */\n    postShift =\n        arm_recip_q15((q15_t)energy + DELTA_Q15, &oneByEnergy, S->recipTable);\n\n    /* Calculation of e * mu value */\n    errorXmu = (q15_t)(((q31_t)e * mu) >> 15);\n\n    /* Calculation of (e * mu) * (1/energy) value */\n    acc = (((q31_t)errorXmu * oneByEnergy) >> (15 - postShift));\n\n    /* Weighting factor for the normalized version */\n    w = (q15_t)__SSAT((q31_t)acc, 16);\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    /* Update filter coefficients */\n    while (tapCnt > 0U) {\n      coef = (q31_t)*pb + (((q31_t)w * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT(coef, 16);\n\n      coef = (q31_t)*pb + (((q31_t)w * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT(coef, 16);\n\n      coef = (q31_t)*pb + (((q31_t)w * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT(coef, 16);\n\n      coef = (q31_t)*pb + (((q31_t)w * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT(coef, 16);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      coef = (q31_t)*pb + (((q31_t)w * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT(coef, 16);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    x0 = *pState;\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Save energy and x0 values for the next frame */\n  S->energy = (q15_t)energy;\n  S->x0 = x0;\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the pState buffer */\n  pStateCurnt = S->pState;\n\n  /* copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  while (tapCnt > 0U) {\n    write_q15x2_ia(&pStateCurnt, read_q15x2_ia(&pState));\n    write_q15x2_ia(&pStateCurnt, read_q15x2_ia(&pState));\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of LMS_NORM group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_norm_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_norm_q31.c\n * Description:  Processing function for the Q31 NLMS filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup LMS_NORM\n  @{\n */\n\n/**\n  @brief         Processing function for Q31 normalized LMS filter.\n  @param[in]     S         points to an instance of the Q31 normalized LMS\n filter structure\n  @param[in]     pSrc      points to the block of input data\n  @param[in]     pRef      points to the block of reference data\n  @param[out]    pOut      points to the block of output data\n  @param[out]    pErr      points to the block of error data\n  @param[in]     blockSize number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n accumulator. The accumulator has a 2.62 format and maintains full precision of\n the intermediate multiplication results but provides only a single guard bit.\n                   Thus, if the accumulator result overflows it wraps around\n rather than clip. In order to avoid overflows completely the input signal must\n be scaled down by log2(numTaps) bits. The reference signal should not be scaled\n down. After all multiply-accumulates are performed, the 2.62 accumulator is\n shifted and saturated to 1.31 format to yield the final result. The output\n signal and error signal are in 1.31 format.\n @par\n                       In this filter, filter coefficients are updated for each\n sample and the updation of filter cofficients are saturted.\n */\n\nvoid arm_lms_norm_q31(arm_lms_norm_instance_q31 *S, const q31_t *pSrc,\n                      q31_t *pRef, q31_t *pOut, q31_t *pErr,\n                      uint32_t blockSize) {\n  q31_t *pState = S->pState;   /* State pointer */\n  q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *pStateCurnt;          /* Points to the current sample of the state */\n  q31_t *px, *pb;   /* Temporary pointers for state and coefficient buffers */\n  q31_t mu = S->mu; /* Adaptive factor */\n  uint32_t numTaps =\n      S->numTaps;              /* Number of filter coefficients in the filter */\n  uint32_t tapCnt, blkCnt;     /* Loop counters */\n  q63_t acc;                   /* Accumulator */\n  q63_t energy;                /* Energy of the input */\n  q31_t e = 0;                 /* Error data sample */\n  q31_t w = 0, in;             /* Weight factor and state */\n  q31_t x0;                    /* Temporary variable to hold input sample */\n  q31_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu\n                                  product and reciprocal of energy */\n  q31_t postShift;    /* Post shift to be applied to weight after reciprocal\n                         calculation */\n  q31_t coef;         /* Temporary variable for coef */\n  q31_t acc_l, acc_h; /* Temporary input */\n  uint32_t uShift = ((uint32_t)S->postShift + 1U);\n  uint32_t lShift = 32U - uShift; /*  Shift to be applied to the output */\n\n  energy = S->energy;\n  x0 = S->x0;\n\n  /* S->pState points to buffer which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n  while (blkCnt > 0U) {\n    /* Copy the new input sample into the state buffer */\n    *pStateCurnt++ = *pSrc;\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Read the sample from input buffer */\n    in = *pSrc++;\n\n    /* Update the energy calculation */\n    energy = (q31_t)((((q63_t)energy << 32) - (((q63_t)x0 * x0) << 1)) >> 32);\n    energy = (q31_t)(((((q63_t)in * in) << 1) + (energy << 32)) >> 32);\n\n    /* Set the accumulator to zero */\n    acc = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      /* acc +=  b[N] * x[n-N] */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* acc +=  b[N-1] * x[n-N-1] */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* acc +=  b[N-2] * x[n-N-2] */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* acc +=  b[N-3] * x[n-N-3] */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Converting the result to 1.31 format */\n    /* Calc lower part of acc */\n    acc_l = acc & 0xffffffff;\n\n    /* Calc upper part of acc */\n    acc_h = (acc >> 32) & 0xffffffff;\n\n    acc = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n    /* Store the result from accumulator into the destination buffer. */\n    *pOut++ = (q31_t)acc;\n\n    /* Compute and store error */\n    e = *pRef++ - (q31_t)acc;\n    *pErr++ = e;\n\n    /* Calculates the reciprocal of energy */\n    postShift =\n        arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);\n\n    /* Calculation of product of (e * mu) */\n    errorXmu = (q31_t)(((q63_t)e * mu) >> 31);\n\n    /* Weighting factor for the normalized version */\n    w = clip_q63_to_q31(((q63_t)errorXmu * oneByEnergy) >> (31 - postShift));\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    /* Update filter coefficients */\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n\n      /* coef is in 2.30 format */\n      coef = (q31_t)(((q63_t)w * (*px++)) >> (32));\n      /* get coef in 1.31 format by left shifting */\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      /* update coefficient buffer to next coefficient */\n      pb++;\n\n      coef = (q31_t)(((q63_t)w * (*px++)) >> (32));\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      pb++;\n\n      coef = (q31_t)(((q63_t)w * (*px++)) >> (32));\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      pb++;\n\n      coef = (q31_t)(((q63_t)w * (*px++)) >> (32));\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      pb++;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      coef = (q31_t)(((q63_t)w * (*px++)) >> (32));\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      pb++;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Read the sample from state buffer */\n    x0 = *pState;\n\n    /* Advance state pointer by 1 for the next sample */\n    pState = pState + 1;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Save energy and x0 values for the next frame */\n  S->energy = (q31_t)energy;\n  S->x0 = x0;\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the pState buffer */\n  pStateCurnt = S->pState;\n\n  /* copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of LMS_NORM group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_q15.c\n * Description:  Processing function for Q15 LMS filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup LMS\n  @{\n */\n\n/**\n  @brief         Processing function for Q15 LMS filter.\n  @param[in]     S         points to an instance of the Q15 LMS filter structure\n  @param[in]     pSrc      points to the block of input data\n  @param[in]     pRef      points to the block of reference data\n  @param[out]    pOut      points to the block of output data\n  @param[out]    pErr      points to the block of error data\n  @param[in]     blockSize number of samples to process\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. Both coefficients and state variables are represented in 1.15\n  format and multiplications yield a 2.30 result. The 2.30 intermediate results\n  are accumulated in a 64-bit accumulator in 34.30 format. There is no risk of\n  internal overflow with this approach and the full precision of intermediate\n  multiplications is preserved. After all additions have been performed, the\n  accumulator is truncated to 34.15 format by discarding low 15 bits. Lastly,\n  the accumulator is saturated to yield a result in 1.15 format.\n  @par\n                   In this filter, filter coefficients are updated for each\n  sample and the updation of filter cofficients are saturted.\n */\n\nvoid arm_lms_q15(const arm_lms_instance_q15 *S, const q15_t *pSrc, q15_t *pRef,\n                 q15_t *pOut, q15_t *pErr, uint32_t blockSize) {\n  q15_t *pState = S->pState;   /* State pointer */\n  q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q15_t *pStateCurnt;          /* Points to the current sample of the state */\n  q15_t *px, *pb;   /* Temporary pointers for state and coefficient buffers */\n  q15_t mu = S->mu; /* Adaptive factor */\n  uint32_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter */\n  uint32_t tapCnt, blkCnt; /* Loop counters */\n  q63_t acc;               /* Accumulator */\n  q15_t e = 0;             /* Error of data sample */\n  q15_t alpha;             /* Intermediate constant for taps update */\n  q31_t coef;              /* Temporary variable for coefficient */\n  q31_t acc_l, acc_h;      /* Temporary input */\n  int32_t lShift = (15 - (int32_t)S->postShift); /*  Post shift  */\n  int32_t uShift = (32 - lShift);\n\n  /* S->pState points to buffer which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n  while (blkCnt > 0U) {\n    /* Copy the new input sample into the state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Set the accumulator to zero */\n    acc = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */\n      acc = __SMLALD(read_q15x2_ia(&px), read_q15x2_ia(&pb), acc);\n      acc = __SMLALD(read_q15x2_ia(&px), read_q15x2_ia(&pb), acc);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      acc += (q63_t)(((q31_t)(*px++) * (*pb++)));\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Calc lower part of acc */\n    acc_l = acc & 0xffffffff;\n\n    /* Calc upper part of acc */\n    acc_h = (acc >> 32) & 0xffffffff;\n\n    /* Apply shift for lower part of acc and upper part of acc */\n    acc = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n    /* Converting the result to 1.15 format and saturate the output */\n    acc = __SSAT(acc, 16U);\n\n    /* Store the result from accumulator into the destination buffer. */\n    *pOut++ = (q15_t)acc;\n\n    /* Compute and store error */\n    e = *pRef++ - (q15_t)acc;\n    *pErr++ = (q15_t)e;\n\n    /* Compute alpha i.e. intermediate constant for taps update */\n    alpha = (q15_t)(((q31_t)e * (mu)) >> 15);\n\n    /* Initialize pState pointer */\n    /* Advance state pointer by 1 for the next sample */\n    px = pState++;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    /* Update filter coefficients */\n    while (tapCnt > 0U) {\n      coef = (q31_t)*pb + (((q31_t)alpha * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT((coef), 16);\n\n      coef = (q31_t)*pb + (((q31_t)alpha * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT((coef), 16);\n\n      coef = (q31_t)*pb + (((q31_t)alpha * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT((coef), 16);\n\n      coef = (q31_t)*pb + (((q31_t)alpha * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT((coef), 16);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      coef = (q31_t)*pb + (((q31_t)alpha * (*px++)) >> 15);\n      *pb++ = (q15_t)__SSAT((coef), 16);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the pState buffer */\n  pStateCurnt = S->pState;\n\n  /* copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  while (tapCnt > 0U) {\n    write_q15x2_ia(&pStateCurnt, read_q15x2_ia(&pState));\n    write_q15x2_ia(&pStateCurnt, read_q15x2_ia(&pState));\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of LMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/FilteringFunctions/arm_lms_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_lms_q31.c\n * Description:  Processing function for the Q31 LMS filter\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupFilters\n */\n\n/**\n  @addtogroup LMS\n  @{\n */\n\n/**\n  @brief         Processing function for Q31 LMS filter.\n  @param[in]     S         points to an instance of the Q31 LMS filter\n structure.\n  @param[in]     pSrc      points to the block of input data.\n  @param[in]     pRef      points to the block of reference data.\n  @param[out]    pOut      points to the block of output data.\n  @param[out]    pErr      points to the block of error data.\n  @param[in]     blockSize number of samples to process.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n accumulator. The accumulator has a 2.62 format and maintains full precision of\n the intermediate multiplication results but provides only a single guard bit.\n                   Thus, if the accumulator result overflows it wraps around\n rather than clips. In order to avoid overflows completely the input signal must\n be scaled down by log2(numTaps) bits. The reference signal should not be scaled\n down. After all multiply-accumulates are performed, the 2.62 accumulator is\n shifted and saturated to 1.31 format to yield the final result. The output\n signal and error signal are in 1.31 format.\n @par\n                   In this filter, filter coefficients are updated for each\n sample and the updation of filter cofficients are saturted.\n */\n\nvoid arm_lms_q31(const arm_lms_instance_q31 *S, const q31_t *pSrc, q31_t *pRef,\n                 q31_t *pOut, q31_t *pErr, uint32_t blockSize) {\n  q31_t *pState = S->pState;   /* State pointer */\n  q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */\n  q31_t *pStateCurnt;          /* Points to the current sample of the state */\n  q31_t *px, *pb;   /* Temporary pointers for state and coefficient buffers */\n  q31_t mu = S->mu; /* Adaptive factor */\n  uint32_t numTaps =\n      S->numTaps;          /* Number of filter coefficients in the filter */\n  uint32_t tapCnt, blkCnt; /* Loop counters */\n  q63_t acc;               /* Accumulator */\n  q31_t e = 0;             /* Error of data sample */\n  q31_t alpha;             /* Intermediate constant for taps update */\n  q31_t coef;              /* Temporary variable for coef */\n  q31_t acc_l, acc_h;      /* Temporary input */\n  uint32_t uShift = ((uint32_t)S->postShift + 1U);\n  uint32_t lShift = 32U - uShift; /*  Shift to be applied to the output */\n\n  /* S->pState points to buffer which contains previous frame (numTaps - 1)\n   * samples */\n  /* pStateCurnt points to the location where the new input data should be\n   * written */\n  pStateCurnt = &(S->pState[(numTaps - 1U)]);\n\n  /* initialise loop count */\n  blkCnt = blockSize;\n\n  while (blkCnt > 0U) {\n    /* Copy the new input sample into the state buffer */\n    *pStateCurnt++ = *pSrc++;\n\n    /* Initialize pState pointer */\n    px = pState;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n    /* Set the accumulator to zero */\n    acc = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      /* acc +=  b[N] * x[n-N] */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* acc +=  b[N-1] * x[n-N-1] */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* acc +=  b[N-2] * x[n-N-2] */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* acc +=  b[N-3] * x[n-N-3] */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      acc += ((q63_t)(*px++)) * (*pb++);\n\n      /* Decrement the loop counter */\n      tapCnt--;\n    }\n\n    /* Converting the result to 1.31 format */\n    /* Calc lower part of acc */\n    acc_l = acc & 0xffffffff;\n\n    /* Calc upper part of acc */\n    acc_h = (acc >> 32) & 0xffffffff;\n\n    acc = (uint32_t)acc_l >> lShift | acc_h << uShift;\n\n    /* Store the result from accumulator into the destination buffer. */\n    *pOut++ = (q31_t)acc;\n\n    /* Compute and store error */\n    e = *pRef++ - (q31_t)acc;\n    *pErr++ = e;\n\n    /* Compute alpha i.e. intermediate constant for taps update */\n    alpha = (q31_t)(((q63_t)e * mu) >> 31);\n\n    /* Initialize pState pointer */\n    /* Advance state pointer by 1 for the next sample */\n    px = pState++;\n\n    /* Initialize coefficient pointer */\n    pb = pCoeffs;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 taps at a time. */\n    tapCnt = numTaps >> 2U;\n\n    /* Update filter coefficients */\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n\n      /* coef is in 2.30 format */\n      coef = (q31_t)(((q63_t)alpha * (*px++)) >> (32));\n      /* get coef in 1.31 format by left shifting */\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      /* update coefficient buffer to next coefficient */\n      pb++;\n\n      coef = (q31_t)(((q63_t)alpha * (*px++)) >> (32));\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      pb++;\n\n      coef = (q31_t)(((q63_t)alpha * (*px++)) >> (32));\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      pb++;\n\n      coef = (q31_t)(((q63_t)alpha * (*px++)) >> (32));\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      pb++;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining taps */\n    tapCnt = numTaps % 0x4U;\n\n#else\n\n    /* Initialize tapCnt with number of samples */\n    tapCnt = numTaps;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (tapCnt > 0U) {\n      /* Perform the multiply-accumulate */\n      coef = (q31_t)(((q63_t)alpha * (*px++)) >> (32));\n      *pb = clip_q63_to_q31((q63_t)*pb + (coef << 1U));\n      pb++;\n\n      /* Decrement loop counter */\n      tapCnt--;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Processing is complete.\n     Now copy the last numTaps - 1 samples to the start of the state buffer.\n     This prepares the state buffer for the next function call. */\n\n  /* Points to the start of the pState buffer */\n  pStateCurnt = S->pState;\n\n  /* copy data */\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 taps at a time. */\n  tapCnt = (numTaps - 1U) >> 2U;\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining taps */\n  tapCnt = (numTaps - 1U) % 0x4U;\n\n#else\n\n  /* Initialize tapCnt with number of samples */\n  tapCnt = (numTaps - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (tapCnt > 0U) {\n    *pStateCurnt++ = *pState++;\n\n    /* Decrement loop counter */\n    tapCnt--;\n  }\n}\n\n/**\n  @} end of LMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\n#obj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\n\nifeq ($(DSP_LIB_ALL_ENABLE),1)\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*/Makefile))\nobj-y := $(obj-y:/Makefile=/)\n\nelse\n\nobj-y :=\nobj-y += \\\n\tCommonTables/CommonTables.c \\\n\tBasicMathFunctions/arm_dot_prod_q15.c \\\n\tFilteringFunctions/arm_biquad_cascade_df1_init_f32.c \\\n\tFilteringFunctions/arm_biquad_cascade_df1_f32.c \\\n\tFilteringFunctions/arm_fir_init_q15.c \\\n\tFilteringFunctions/arm_fir_fast_q15.c \\\n\tTransformFunctions/arm_bitreversal2.S \\\n\tTransformFunctions/arm_cfft_f32.c \\\n\tTransformFunctions/arm_cfft_q15.c \\\n\tTransformFunctions/arm_cfft_radix4_q15.c \\\n\tTransformFunctions/arm_cfft_radix8_f32.c \\\n\tTransformFunctions/arm_rfft_fast_init_f32.c \\\n\tTransformFunctions/arm_rfft_fast_f32.c \\\n\tTransformFunctions/arm_rfft_init_q15.c \\\n\tTransformFunctions/arm_rfft_q15.c \\\n\tSupportFunctions/arm_copy_q31.c \\\n\tSupportFunctions/arm_fill_q31.c \\\n\tSupportFunctions/arm_q15_to_float.c \\\n\tBasicMathFunctions/arm_dot_prod_q7.c \\\n\tBasicMathFunctions/arm_add_q15.c \\\n\tBasicMathFunctions/arm_shift_q15.c \\\n\tBasicMathFunctions/arm_negate_q15.c \\\n\tBasicMathFunctions/arm_offset_q15.c \\\n\tBasicMathFunctions/arm_mult_q15.c \\\n\tStatisticsFunctions/StatisticsFunctions.c\n\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\nendif\n\nccflags-y += -DARM_MATH_LOOPUNROLL\n\nifeq ($(SCO_CP_ACCEL),1)\ncmsis_dsp_lib-y := $(obj-y)\nobj-y := cmsis_dsp_lib.o\nendif\n\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/MatrixFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        MatrixFunctions.c\n * Description:  Combination of all matrix function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_mat_add_f32.c\"\n#include \"arm_mat_add_q15.c\"\n#include \"arm_mat_add_q31.c\"\n#include \"arm_mat_cmplx_mult_f32.c\"\n#include \"arm_mat_cmplx_mult_q15.c\"\n#include \"arm_mat_cmplx_mult_q31.c\"\n#include \"arm_mat_init_f32.c\"\n#include \"arm_mat_init_q15.c\"\n#include \"arm_mat_init_q31.c\"\n#include \"arm_mat_inverse_f32.c\"\n#include \"arm_mat_inverse_f64.c\"\n#include \"arm_mat_mult_f32.c\"\n#include \"arm_mat_mult_fast_q15.c\"\n#include \"arm_mat_mult_fast_q31.c\"\n#include \"arm_mat_mult_q15.c\"\n#include \"arm_mat_mult_q31.c\"\n#include \"arm_mat_scale_f32.c\"\n#include \"arm_mat_scale_q15.c\"\n#include \"arm_mat_scale_q31.c\"\n#include \"arm_mat_sub_f32.c\"\n#include \"arm_mat_sub_q15.c\"\n#include \"arm_mat_sub_q31.c\"\n#include \"arm_mat_trans_f32.c\"\n#include \"arm_mat_trans_q15.c\"\n#include \"arm_mat_trans_q31.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_add_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_add_f32.c\n * Description:  Floating-point matrix addition\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup MatrixAdd Matrix Addition\n\n  Adds two matrices.\n  \\image html MatrixAddition.gif \"Addition of two 3 x 3 matrices\"\n\n  The functions check to make sure that\n  pSrcA, pSrcB, and pDst have the same\n  number of rows and columns.\n */\n\n/**\n  @addtogroup MatrixAdd\n  @{\n */\n\n/**\n  @brief         Floating-point matrix addition.\n  @param[in]     pSrcA      points to first input matrix structure\n  @param[in]     pSrcB      points to second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n */\n\narm_status arm_mat_add_f32(const arm_matrix_instance_f32 *pSrcA,\n                           const arm_matrix_instance_f32 *pSrcB,\n                           arm_matrix_instance_f32 *pDst) {\n  float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */\n  float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */\n  float32_t *pOut = pDst->pData;  /* output data matrix pointer */\n\n  uint32_t numSamples; /* total number of elements in the matrix */\n  uint32_t blkCnt;     /* loop counters */\n  arm_status status;   /* status of matrix addition */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numRows != pSrcB->numRows) ||\n      (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcA->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrcA->numRows * pSrcA->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) + B(m,n) */\n\n      /* Add and store result in destination buffer. */\n      *pOut++ = *pInA++ + *pInB++;\n\n      *pOut++ = *pInA++ + *pInB++;\n\n      *pOut++ = *pInA++ + *pInB++;\n\n      *pOut++ = *pInA++ + *pInB++;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) + B(m,n) */\n\n      /* Add and store result in destination buffer. */\n      *pOut++ = *pInA++ + *pInB++;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixAdd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_add_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_add_q15.c\n * Description:  Q15 matrix addition\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixAdd\n  @{\n */\n\n/**\n  @brief         Q15 matrix addition.\n  @param[in]     pSrcA      points to first input matrix structure\n  @param[in]     pSrcB      points to second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n */\n\narm_status arm_mat_add_q15(const arm_matrix_instance_q15 *pSrcA,\n                           const arm_matrix_instance_q15 *pSrcB,\n                           arm_matrix_instance_q15 *pDst) {\n  q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */\n  q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */\n  q15_t *pOut = pDst->pData;  /* output data matrix pointer */\n\n  uint32_t numSamples; /* total number of elements in the matrix */\n  uint32_t blkCnt;     /* loop counters */\n  arm_status status;   /* status of matrix addition */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numRows != pSrcB->numRows) ||\n      (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcA->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrcA->numRows * pSrcA->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) + B(m,n) */\n\n      /* Add, saturate and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n      write_q15x2_ia(&pOut,\n                     __QADD16(read_q15x2_ia(&pInA), read_q15x2_ia(&pInB)));\n\n      write_q15x2_ia(&pOut,\n                     __QADD16(read_q15x2_ia(&pInA), read_q15x2_ia(&pInB)));\n#else\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ + *pInB++), 16);\n\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ + *pInB++), 16);\n\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ + *pInB++), 16);\n\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ + *pInB++), 16);\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) + B(m,n) */\n\n      /* Add, saturate and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n      *pOut++ = (q15_t)__QADD16(*pInA++, *pInB++);\n#else\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ + *pInB++), 16);\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixAdd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_add_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_add_q31.c\n * Description:  Q31 matrix addition\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixAdd\n  @{\n */\n\n/**\n  @brief         Q31 matrix addition.\n  @param[in]     pSrcA      points to first input matrix structure\n  @param[in]     pSrcB      points to second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range [0x80000000\n  0x7FFFFFFF] are saturated.\n */\n\narm_status arm_mat_add_q31(const arm_matrix_instance_q31 *pSrcA,\n                           const arm_matrix_instance_q31 *pSrcB,\n                           arm_matrix_instance_q31 *pDst) {\n  q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */\n  q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */\n  q31_t *pOut = pDst->pData;  /* output data matrix pointer */\n\n  uint32_t numSamples; /* total number of elements in the matrix */\n  uint32_t blkCnt;     /* loop counters */\n  arm_status status;   /* status of matrix addition */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numRows != pSrcB->numRows) ||\n      (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcA->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrcA->numRows * pSrcA->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) + B(m,n) */\n\n      /* Add, saturate and store result in destination buffer. */\n      *pOut++ = __QADD(*pInA++, *pInB++);\n\n      *pOut++ = __QADD(*pInA++, *pInB++);\n\n      *pOut++ = __QADD(*pInA++, *pInB++);\n\n      *pOut++ = __QADD(*pInA++, *pInB++);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) + B(m,n) */\n\n      /* Add, saturate and store result in destination buffer. */\n      *pOut++ = __QADD(*pInA++, *pInB++);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixAdd group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_cmplx_mult_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_cmplx_mult_f32.c\n * Description:  Floating-point matrix multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup CmplxMatrixMult  Complex Matrix Multiplication\n\n  Complex Matrix multiplication is only defined if the number of columns of the\n  first matrix equals the number of rows of the second matrix.\n  Multiplying an M x N matrix with an N x P matrix\n  results in an M x P matrix.\n  @par\n  When matrix size checking is enabled, the functions check:\n   - that the inner dimensions of pSrcA and pSrcB are\n  equal;\n   - that the size of the output matrix equals the outer dimensions of\n  pSrcA and pSrcB.\n */\n\n/**\n  @addtogroup CmplxMatrixMult\n  @{\n */\n\n/**\n  @brief         Floating-point Complex matrix multiplication.\n  @param[in]     pSrcA      points to first input complex matrix structure\n  @param[in]     pSrcB      points to second input complex matrix structure\n  @param[out]    pDst       points to output complex matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n */\n\narm_status arm_mat_cmplx_mult_f32(const arm_matrix_instance_f32 *pSrcA,\n                                  const arm_matrix_instance_f32 *pSrcB,\n                                  arm_matrix_instance_f32 *pDst) {\n  float32_t *pIn1 = pSrcA->pData;     /* Input data matrix pointer A */\n  float32_t *pIn2 = pSrcB->pData;     /* Input data matrix pointer B */\n  float32_t *pInA = pSrcA->pData;     /* Input data matrix pointer A */\n  float32_t *pOut = pDst->pData;      /* Output data matrix pointer */\n  float32_t *px;                      /* Temporary output data matrix pointer */\n  uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */\n  uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */\n  float32_t sumReal, sumImag;         /* Accumulator */\n  float32_t a1, b1, c1, d1;\n  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */\n  arm_status status; /* status of matrix multiplication */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  float32_t a0, b0, c0, d0;\n#endif\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    do {\n      /* Output pointer is set to starting address of the row being processed */\n      px = pOut + 2 * i;\n\n      /* For every row wise process, the column loop counter is to be initiated\n       */\n      col = numColsB;\n\n      /* For every row wise process, the pIn2 pointer is set\n       ** to the starting address of the pSrcB data */\n      pIn2 = pSrcB->pData;\n\n      j = 0U;\n\n      /* column loop */\n      do {\n        /* Set the variable sum, that acts as accumulator, to zero */\n        sumReal = 0.0f;\n        sumImag = 0.0f;\n\n        /* Initiate pointer pIn1 to point to starting address of column being\n         * processed */\n        pIn1 = pInA;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n\n          /* Reading real part of complex matrix A */\n          a0 = *pIn1;\n\n          /* Reading real part of complex matrix B */\n          c0 = *pIn2;\n\n          /* Reading imaginary part of complex matrix A */\n          b0 = *(pIn1 + 1U);\n\n          /* Reading imaginary part of complex matrix B */\n          d0 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += a0 * c0;\n          sumImag += b0 * c0;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= b0 * d0;\n          sumImag += a0 * d0;\n\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          a1 = *(pIn1);\n          c1 = *(pIn2);\n          b1 = *(pIn1 + 1U);\n          d1 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += a1 * c1;\n          sumImag += b1 * c1;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= b1 * d1;\n          sumImag += a1 * d1;\n\n          a0 = *(pIn1);\n          c0 = *(pIn2);\n          b0 = *(pIn1 + 1U);\n          d0 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += a0 * c0;\n          sumImag += b0 * c0;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= b0 * d0;\n          sumImag += a0 * d0;\n\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          a1 = *(pIn1);\n          c1 = *(pIn2);\n          b1 = *(pIn1 + 1U);\n          d1 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += a1 * c1;\n          sumImag += b1 * c1;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= b1 * d1;\n          sumImag += a1 * d1;\n\n          /* Decrement loop count */\n          colCnt--;\n        }\n\n        /* If the columns of pSrcA is not a multiple of 4, compute any remaining\n         *MACs here.\n         ** No loop unrolling is used. */\n        colCnt = numColsA % 0x4U;\n\n#else\n\n        /* Initialize blkCnt with number of samples */\n        colCnt = numColsA;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n          a1 = *(pIn1);\n          c1 = *(pIn2);\n          b1 = *(pIn1 + 1U);\n          d1 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += a1 * c1;\n          sumImag += b1 * c1;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= b1 * d1;\n          sumImag += a1 * d1;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Store result in destination buffer */\n        *px++ = sumReal;\n        *px++ = sumImag;\n\n        /* Update pointer pIn2 to point to starting address of next column */\n        j++;\n        pIn2 = pSrcB->pData + 2U * j;\n\n        /* Decrement column loop counter */\n        col--;\n\n      } while (col > 0U);\n\n      /* Update pointer pInA to point to starting address of next row */\n      i = i + numColsB;\n      pInA = pInA + 2 * numColsA;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_cmplx_mult_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cmplx_mat_mult_q15.c\n * Description:  Q15 complex matrix multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup CmplxMatrixMult\n  @{\n */\n\n/**\n  @brief         Q15 Complex matrix multiplication.\n  @param[in]     pSrcA      points to first input complex matrix structure\n  @param[in]     pSrcB      points to second input complex matrix structure\n  @param[out]    pDst       points to output complex matrix structure\n  @param[in]     pScratch   points to an array for storing intermediate results\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Conditions for optimum performance\n                   Input, output and state buffers should be aligned by 32-bit\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The inputs to the multiplications are in 1.15 format and\n  multiplications yield a 2.30 result. The 2.30 intermediate results are\n  accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33\n  guard bits and there is no risk of overflow. The 34.30 result is then\n                   truncated to 34.15 format by discarding the low 15 bits and\n  then saturated to 1.15 format.\n */\n\narm_status arm_mat_cmplx_mult_q15(const arm_matrix_instance_q15 *pSrcA,\n                                  const arm_matrix_instance_q15 *pSrcB,\n                                  arm_matrix_instance_q15 *pDst,\n                                  q15_t *pScratch) {\n  q15_t *pSrcBT = pScratch;   /* input data matrix pointer for transpose */\n  q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */\n  q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */\n  q15_t *px;                  /* Temporary output data matrix pointer */\n  uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */\n  uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */\n  uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */\n  q63_t sumReal, sumImag;             /* accumulator */\n  uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */\n  arm_status status; /* Status of matrix multiplication */\n\n#if defined(ARM_MATH_DSP)\n  q31_t prod1, prod2;\n  q31_t pSourceA, pSourceB;\n#else\n  q15_t a, b, c, d;\n#endif /* #if defined (ARM_MATH_DSP) */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Matrix transpose */\n    do {\n      /* The pointer px is set to starting address of column being processed */\n      px = pSrcBT + i;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Apply loop unrolling and exchange the columns with row elements */\n      col = numColsB >> 2;\n\n      /* First part of the processing with loop unrolling.  Compute 4 outputs at\n         a time. a second loop below computes the remaining 1 to 3 samples. */\n      while (col > 0U) {\n        /* Read two elements from row */\n        write_q15x2(px, read_q15x2_ia(&pInB));\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB * 2;\n\n        /* Read two elements from row */\n        write_q15x2(px, read_q15x2_ia(&pInB));\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB * 2;\n\n        /* Read two elements from row */\n        write_q15x2(px, read_q15x2_ia(&pInB));\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB * 2;\n\n        /* Read two elements from row */\n        write_q15x2(px, read_q15x2_ia(&pInB));\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB * 2;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      /* If the columns of pSrcB is not a multiple of 4, compute any remaining\n       *output samples here.\n       ** No loop unrolling is used. */\n      col = numColsB % 0x4U;\n\n#else\n\n      /* Initialize blkCnt with number of samples */\n      col = numColsB;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (col > 0U) {\n        /* Read two elements from row */\n        write_q15x2(px, read_q15x2_ia(&pInB));\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB * 2;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      i = i + 2U;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n    /* Reset variables for usage in following multiplication process */\n    row = numRowsA;\n    i = 0U;\n    px = pDst->pData;\n\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    do {\n      /* For every row wise process, column loop counter is to be initiated */\n      col = numColsB;\n\n      /* For every row wise process, pIn2 pointer is set to starting address of\n       * transposed pSrcB data */\n      pInB = pSrcBT;\n\n      /* column loop */\n      do {\n        /* Set variable sum, that acts as accumulator, to zero */\n        sumReal = 0;\n        sumImag = 0;\n\n        /* Initiate pointer pInA to point to starting address of column being\n         * processed */\n        pInA = pSrcA->pData + i * 2;\n\n        /* Apply loop unrolling and compute 2 MACs simultaneously. */\n        colCnt = numColsA >> 1U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n#if defined(ARM_MATH_DSP)\n\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          pSourceA = read_q15x2_ia((q15_t **)&pInA);\n          pSourceB = read_q15x2_ia((q15_t **)&pInB);\n\n          /* Multiply and Accumlates */\n#ifdef ARM_MATH_BIG_ENDIAN\n          prod1 = -__SMUSD(pSourceA, pSourceB);\n#else\n          prod1 = __SMUSD(pSourceA, pSourceB);\n#endif\n          prod2 = __SMUADX(pSourceA, pSourceB);\n          sumReal += (q63_t)prod1;\n          sumImag += (q63_t)prod2;\n\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          pSourceA = read_q15x2_ia((q15_t **)&pInA);\n          pSourceB = read_q15x2_ia((q15_t **)&pInB);\n\n          /* Multiply and Accumlates */\n#ifdef ARM_MATH_BIG_ENDIAN\n          prod1 = -__SMUSD(pSourceA, pSourceB);\n#else\n          prod1 = __SMUSD(pSourceA, pSourceB);\n#endif\n          prod2 = __SMUADX(pSourceA, pSourceB);\n          sumReal += (q63_t)prod1;\n          sumImag += (q63_t)prod2;\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n          /* read real and imag values from pSrcA buffer */\n          a = *pInA;\n          b = *(pInA + 1U);\n          /* read real and imag values from pSrcB buffer */\n          c = *pInB;\n          d = *(pInB + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += (q31_t)a * c;\n          sumImag += (q31_t)a * d;\n          sumReal -= (q31_t)b * d;\n          sumImag += (q31_t)b * c;\n\n          /* read next real and imag values from pSrcA buffer */\n          a = *(pInA + 2U);\n          b = *(pInA + 3U);\n          /* read next real and imag values from pSrcB buffer */\n          c = *(pInB + 2U);\n          d = *(pInB + 3U);\n\n          /* update pointer */\n          pInA += 4U;\n\n          /* Multiply and Accumlates */\n          sumReal += (q31_t)a * c;\n          sumImag += (q31_t)a * d;\n          sumReal -= (q31_t)b * d;\n          sumImag += (q31_t)b * c;\n          /* update pointer */\n          pInB += 4U;\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* process odd column samples */\n        if ((numColsA & 0x1U) > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n#if defined(ARM_MATH_DSP)\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          pSourceA = read_q15x2_ia((q15_t **)&pInA);\n          pSourceB = read_q15x2_ia((q15_t **)&pInB);\n\n          /* Multiply and Accumlates */\n#ifdef ARM_MATH_BIG_ENDIAN\n          prod1 = -__SMUSD(pSourceA, pSourceB);\n#else\n          prod1 = __SMUSD(pSourceA, pSourceB);\n#endif\n          prod2 = __SMUADX(pSourceA, pSourceB);\n          sumReal += (q63_t)prod1;\n          sumImag += (q63_t)prod2;\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          a = *pInA++;\n          b = *pInA++;\n          c = *pInB++;\n          d = *pInB++;\n\n          /* Multiply and Accumlates */\n          sumReal += (q31_t)a * c;\n          sumImag += (q31_t)a * d;\n          sumReal -= (q31_t)b * d;\n          sumImag += (q31_t)b * c;\n\n#endif /* #if defined (ARM_MATH_DSP) */\n        }\n\n        /* Saturate and store result in destination buffer */\n        *px++ = (q15_t)(__SSAT(sumReal >> 15, 16));\n        *px++ = (q15_t)(__SSAT(sumImag >> 15, 16));\n\n        /* Decrement column loop counter */\n        col--;\n\n      } while (col > 0U);\n\n      i = i + numColsA;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_cmplx_mult_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_cmplx_mult_q31.c\n * Description:  Floating-point matrix multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup CmplxMatrixMult\n  @{\n */\n\n/**\n  @brief         Q31 Complex matrix multiplication.\n  @param[in]     pSrcA      points to first input complex matrix structure\n  @param[in]     pSrcB      points to second input complex matrix structure\n  @param[out]    pDst       points to output complex matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The accumulator has a 2.62 format and maintains full precision of\n  the intermediate multiplication results but provides only a single guard bit.\n  There is no saturation on intermediate additions. Thus, if the accumulator\n  overflows it wraps around and distorts the result. The input signals should be\n  scaled down to avoid intermediate overflows. The input is thus scaled down by\n  log2(numColsA) bits to avoid overflows, as a total of numColsA additions are\n  performed internally. The 2.62 accumulator is right shifted by 31 bits and\n  saturated to 1.31 format to yield the final result.\n */\n\narm_status arm_mat_cmplx_mult_q31(const arm_matrix_instance_q31 *pSrcA,\n                                  const arm_matrix_instance_q31 *pSrcB,\n                                  arm_matrix_instance_q31 *pDst) {\n  q31_t *pIn1 = pSrcA->pData;         /* Input data matrix pointer A */\n  q31_t *pIn2 = pSrcB->pData;         /* Input data matrix pointer B */\n  q31_t *pInA = pSrcA->pData;         /* Input data matrix pointer A */\n  q31_t *pOut = pDst->pData;          /* Output data matrix pointer */\n  q31_t *px;                          /* Temporary output data matrix pointer */\n  uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */\n  uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */\n  q63_t sumReal, sumImag;             /* Accumulator */\n  q31_t a1, b1, c1, d1;\n  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */\n  arm_status status; /* status of matrix multiplication */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t a0, b0, c0, d0;\n#endif\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    do {\n      /* Output pointer is set to starting address of the row being processed */\n      px = pOut + 2 * i;\n\n      /* For every row wise process, the column loop counter is to be initiated\n       */\n      col = numColsB;\n\n      /* For every row wise process, the pIn2 pointer is set\n       ** to the starting address of the pSrcB data */\n      pIn2 = pSrcB->pData;\n\n      j = 0U;\n\n      /* column loop */\n      do {\n        /* Set the variable sum, that acts as accumulator, to zero */\n        sumReal = 0.0;\n        sumImag = 0.0;\n\n        /* Initiate pointer pIn1 to point to starting address of column being\n         * processed */\n        pIn1 = pInA;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Apply loop unrolling and compute 4 MACs simultaneously. */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n\n          /* Reading real part of complex matrix A */\n          a0 = *pIn1;\n\n          /* Reading real part of complex matrix B */\n          c0 = *pIn2;\n\n          /* Reading imaginary part of complex matrix A */\n          b0 = *(pIn1 + 1U);\n\n          /* Reading imaginary part of complex matrix B */\n          d0 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += (q63_t)a0 * c0;\n          sumImag += (q63_t)b0 * c0;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= (q63_t)b0 * d0;\n          sumImag += (q63_t)a0 * d0;\n\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          a1 = *(pIn1);\n          c1 = *(pIn2);\n          b1 = *(pIn1 + 1U);\n          d1 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += (q63_t)a1 * c1;\n          sumImag += (q63_t)b1 * c1;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= (q63_t)b1 * d1;\n          sumImag += (q63_t)a1 * d1;\n\n          a0 = *(pIn1);\n          c0 = *(pIn2);\n          b0 = *(pIn1 + 1U);\n          d0 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += (q63_t)a0 * c0;\n          sumImag += (q63_t)b0 * c0;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= (q63_t)b0 * d0;\n          sumImag += (q63_t)a0 * d0;\n\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          a1 = *(pIn1);\n          c1 = *(pIn2);\n          b1 = *(pIn1 + 1U);\n          d1 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += (q63_t)a1 * c1;\n          sumImag += (q63_t)b1 * c1;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= (q63_t)b1 * d1;\n          sumImag += (q63_t)a1 * d1;\n\n          /* Decrement loop count */\n          colCnt--;\n        }\n\n        /* If the columns of pSrcA is not a multiple of 4, compute any remaining\n         *MACs here.\n         ** No loop unrolling is used. */\n        colCnt = numColsA % 0x4U;\n\n#else\n\n        /* Initialize blkCnt with number of samples */\n        colCnt = numColsA;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n          a1 = *(pIn1);\n          c1 = *(pIn2);\n          b1 = *(pIn1 + 1U);\n          d1 = *(pIn2 + 1U);\n\n          /* Multiply and Accumlates */\n          sumReal += (q63_t)a1 * c1;\n          sumImag += (q63_t)b1 * c1;\n\n          /* update pointers */\n          pIn1 += 2U;\n          pIn2 += 2 * numColsB;\n\n          /* Multiply and Accumlates */\n          sumReal -= (q63_t)b1 * d1;\n          sumImag += (q63_t)a1 * d1;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Store result in destination buffer */\n        *px++ = (q31_t)clip_q63_to_q31(sumReal >> 31);\n        *px++ = (q31_t)clip_q63_to_q31(sumImag >> 31);\n\n        /* Update pointer pIn2 to point to starting address of next column */\n        j++;\n        pIn2 = pSrcB->pData + 2U * j;\n\n        /* Decrement column loop counter */\n        col--;\n\n      } while (col > 0U);\n\n      /* Update pointer pInA to point to starting address of next row */\n      i = i + numColsB;\n      pInA = pInA + 2 * numColsA;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_init_f32.c\n * Description:  Floating-point matrix initialization\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup MatrixInit Matrix Initialization\n\n  Initializes the underlying matrix data structure.\n  The functions set the numRows,\n  numCols, and pData fields\n  of the matrix data structure.\n */\n\n/**\n  @addtogroup MatrixInit\n  @{\n */\n\n/**\n  @brief         Floating-point matrix initialization.\n  @param[in,out] S         points to an instance of the floating-point matrix\n  structure\n  @param[in]     nRows     number of rows in the matrix\n  @param[in]     nColumns  number of columns in the matrix\n  @param[in]     pData     points to the matrix data array\n  @return        none\n */\n\nvoid arm_mat_init_f32(arm_matrix_instance_f32 *S, uint16_t nRows,\n                      uint16_t nColumns, float32_t *pData) {\n  /* Assign Number of Rows */\n  S->numRows = nRows;\n\n  /* Assign Number of Columns */\n  S->numCols = nColumns;\n\n  /* Assign Data pointer */\n  S->pData = pData;\n}\n\n/**\n  @} end of MatrixInit group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_init_q15.c\n * Description:  Q15 matrix initialization\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixInit\n  @{\n */\n\n/**\n  @brief         Q15 matrix initialization.\n  @param[in,out] S         points to an instance of the floating-point matrix\n  structure\n  @param[in]     nRows     number of rows in the matrix\n  @param[in]     nColumns  number of columns in the matrix\n  @param[in]     pData     points to the matrix data array\n  @return        none\n */\n\nvoid arm_mat_init_q15(arm_matrix_instance_q15 *S, uint16_t nRows,\n                      uint16_t nColumns, q15_t *pData) {\n  /* Assign Number of Rows */\n  S->numRows = nRows;\n\n  /* Assign Number of Columns */\n  S->numCols = nColumns;\n\n  /* Assign Data pointer */\n  S->pData = pData;\n}\n\n/**\n  @} end of MatrixInit group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_init_q31.c\n * Description:  Q31 matrix initialization\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup MatrixInit Matrix Initialization\n\n */\n\n/**\n  @addtogroup MatrixInit\n  @{\n */\n\n/**\n  @brief         Q31 matrix initialization.\n  @param[in,out] S         points to an instance of the Q31 matrix structure\n  @param[in]     nRows     number of rows in the matrix\n  @param[in]     nColumns  number of columns in the matrix\n  @param[in]     pData     points to the matrix data array\n  @return        none\n */\n\nvoid arm_mat_init_q31(arm_matrix_instance_q31 *S, uint16_t nRows,\n                      uint16_t nColumns, q31_t *pData) {\n  /* Assign Number of Rows */\n  S->numRows = nRows;\n\n  /* Assign Number of Columns */\n  S->numCols = nColumns;\n\n  /* Assign Data pointer */\n  S->pData = pData;\n}\n\n/**\n  @} end of MatrixInit group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_inverse_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_inverse_f32.c\n * Description:  Floating-point matrix inverse\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup MatrixInv Matrix Inverse\n\n  Computes the inverse of a matrix.\n\n  The inverse is defined only if the input matrix is square and non-singular\n  (the determinant is non-zero). The function checks that the input and output\n  matrices are square and of the same size.\n\n  Matrix inversion is numerically sensitive and the CMSIS DSP library only\n  supports matrix inversion of floating-point matrices.\n\n  @par Algorithm\n  The Gauss-Jordan method is used to find the inverse.\n  The algorithm performs a sequence of elementary row-operations until it\n  reduces the input matrix to an identity matrix. Applying the same sequence\n  of elementary row-operations to an identity matrix yields the inverse matrix.\n  If the input matrix is singular, then the algorithm terminates and returns\n  error status ARM_MATH_SINGULAR. \\image html MatrixInverse.gif\n  \"Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method\"\n */\n\n/**\n  @addtogroup MatrixInv\n  @{\n */\n\n/**\n  @brief         Floating-point matrix inverse.\n  @param[in]     pSrc      points to input matrix structure\n  @param[out]    pDst      points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n                   - \\ref ARM_MATH_SINGULAR      : Input matrix is found to be\n  singular (non-invertible)\n */\n\narm_status arm_mat_inverse_f32(const arm_matrix_instance_f32 *pSrc,\n                               arm_matrix_instance_f32 *pDst) {\n  float32_t *pIn = pSrc->pData;  /* input data matrix pointer */\n  float32_t *pOut = pDst->pData; /* output data matrix pointer */\n  float32_t *pInT1, *pInT2;      /* Temporary input data matrix pointer */\n  float32_t *pOutT1, *pOutT2;    /* Temporary output data matrix pointer */\n  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst,\n      *pPRT_pDst; /* Temporary input and output data matrix pointer */\n  uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix  */\n  uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix  */\n\n#if defined(ARM_MATH_DSP)\n  float32_t maxC; /* maximum value in the column */\n\n  float32_t Xchg, in = 0.0f, in1;                  /* Temporary input values  */\n  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */\n  arm_status status; /* status of matrix inverse */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) ||\n      (pSrc->numRows != pDst->numRows)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n\n    /*--------------------------------------------------------------------------------------------------------------\n     * Matrix Inverse can be solved using elementary row operations.\n     *\n     *  Gauss-Jordan Method:\n     *\n     *      1. First combine the identity matrix and the input matrix separated\n     *by a bar to form an augmented matrix as follows: _                  _ _ _\n     *                     |  a11  a12 | 1   0  |       |  X11 X12  |\n     *                     |           |        |   =   |           |\n     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|\n     *\n     *      2. In our implementation, pDst Matrix is used as identity matrix.\n     *\n     *      3. Begin with the first row. Let i = 1.\n     *\n     *      4. Check to see if the pivot for column i is the greatest of the\n     *column. The pivot is the element of the main diagonal that is on the\n     *current row. For instance, if working with row i, then the pivot element\n     *is aii. If the pivot is not the most significant of the columns, exchange\n     *that row with a row below it that does contain the most significant value\n     *in column i. If the most significant value of the column is zero, then an\n     *inverse to that matrix does not exist. The most significant value of the\n     *column is the absolute maximum.\n     *\n     *      5. Divide every element of row i by the pivot.\n     *\n     *      6. For every row below and  row i, replace that row with the sum of\n     *that row and a multiple of row i so that each new element in column i\n     *below row i is zero.\n     *\n     *      7. Move to the next row and column and repeat steps 2 through 5\n     *until you have zeros for every element below and above the main diagonal.\n     *\n     *      8. Now an identical matrix is formed to the left of the bar(input\n     *matrix, pSrc). Therefore, the matrix to the right of the bar is our\n     *solution(pDst matrix, pDst).\n     *----------------------------------------------------------------------------------------------------------------*/\n\n    /* Working pointer for destination matrix */\n    pOutT1 = pOut;\n\n    /* Loop over the number of rows */\n    rowCnt = numRows;\n\n    /* Making the destination matrix as identity matrix */\n    while (rowCnt > 0U) {\n      /* Writing all zeroes in lower triangle of the destination matrix */\n      j = numRows - rowCnt;\n      while (j > 0U) {\n        *pOutT1++ = 0.0f;\n        j--;\n      }\n\n      /* Writing all ones in the diagonal of the destination matrix */\n      *pOutT1++ = 1.0f;\n\n      /* Writing all zeroes in upper triangle of the destination matrix */\n      j = rowCnt - 1U;\n      while (j > 0U) {\n        *pOutT1++ = 0.0f;\n        j--;\n      }\n\n      /* Decrement loop counter */\n      rowCnt--;\n    }\n\n    /* Loop over the number of columns of the input matrix.\n       All the elements in each column are processed by the row operations */\n    loopCnt = numCols;\n\n    /* Index modifier to navigate through the columns */\n    l = 0U;\n\n    while (loopCnt > 0U) {\n      /* Check if the pivot element is zero..\n       * If it is zero then interchange the row with non zero row below.\n       * If there is no non zero element to replace in the rows below,\n       * then the matrix is Singular. */\n\n      /* Working pointer for the input matrix that points\n       * to the pivot element of the particular row  */\n      pInT1 = pIn + (l * numCols);\n\n      /* Working pointer for the destination matrix that points\n       * to the pivot element of the particular row  */\n      pOutT1 = pOut + (l * numCols);\n\n      /* Temporary variable to hold the pivot value */\n      in = *pInT1;\n\n      /* Grab the most significant value from column l */\n      maxC = 0;\n      for (i = l; i < numRows; i++) {\n        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC)\n                          : (-*pInT1 > maxC ? -*pInT1 : maxC);\n        pInT1 += numCols;\n      }\n\n      /* Update the status if the matrix is singular */\n      if (maxC == 0.0f) {\n        return ARM_MATH_SINGULAR;\n      }\n\n      /* Restore pInT1  */\n      pInT1 = pIn;\n\n      /* Destination pointer modifier */\n      k = 1U;\n\n      /* Check if the pivot element is the most significant of the column */\n      if ((in > 0.0f ? in : -in) != maxC) {\n        /* Loop over the number rows present below */\n        i = numRows - (l + 1U);\n\n        while (i > 0U) {\n          /* Update the input and destination pointers */\n          pInT2 = pInT1 + (numCols * l);\n          pOutT2 = pOutT1 + (numCols * k);\n\n          /* Look for the most significant element to\n           * replace in the rows below */\n          if ((*pInT2 > 0.0f ? *pInT2 : -*pInT2) == maxC) {\n            /* Loop over number of columns\n             * to the right of the pilot element */\n            j = numCols - l;\n\n            while (j > 0U) {\n              /* Exchange the row elements of the input matrix */\n              Xchg = *pInT2;\n              *pInT2++ = *pInT1;\n              *pInT1++ = Xchg;\n\n              /* Decrement the loop counter */\n              j--;\n            }\n\n            /* Loop over number of columns of the destination matrix */\n            j = numCols;\n\n            while (j > 0U) {\n              /* Exchange the row elements of the destination matrix */\n              Xchg = *pOutT2;\n              *pOutT2++ = *pOutT1;\n              *pOutT1++ = Xchg;\n\n              /* Decrement loop counter */\n              j--;\n            }\n\n            /* Flag to indicate whether exchange is done or not */\n            flag = 1U;\n\n            /* Break after exchange is done */\n            break;\n          }\n\n          /* Update the destination pointer modifier */\n          k++;\n\n          /* Decrement loop counter */\n          i--;\n        }\n      }\n\n      /* Update the status if the matrix is singular */\n      if ((flag != 1U) && (in == 0.0f)) {\n        return ARM_MATH_SINGULAR;\n      }\n\n      /* Points to the pivot row of input and destination matrices */\n      pPivotRowIn = pIn + (l * numCols);\n      pPivotRowDst = pOut + (l * numCols);\n\n      /* Temporary pointers to the pivot row pointers */\n      pInT1 = pPivotRowIn;\n      pInT2 = pPivotRowDst;\n\n      /* Pivot element of the row */\n      in = *pPivotRowIn;\n\n      /* Loop over number of columns\n       * to the right of the pilot element */\n      j = (numCols - l);\n\n      while (j > 0U) {\n        /* Divide each element of the row of the input matrix\n         * by the pivot element */\n        in1 = *pInT1;\n        *pInT1++ = in1 / in;\n\n        /* Decrement the loop counter */\n        j--;\n      }\n\n      /* Loop over number of columns of the destination matrix */\n      j = numCols;\n\n      while (j > 0U) {\n        /* Divide each element of the row of the destination matrix\n         * by the pivot element */\n        in1 = *pInT2;\n        *pInT2++ = in1 / in;\n\n        /* Decrement the loop counter */\n        j--;\n      }\n\n      /* Replace the rows with the sum of that row and a multiple of row i\n       * so that each new element in column i above row i is zero.*/\n\n      /* Temporary pointers for input and destination matrices */\n      pInT1 = pIn;\n      pInT2 = pOut;\n\n      /* index used to check for pivot element */\n      i = 0U;\n\n      /* Loop over number of rows */\n      /*  to be replaced by the sum of that row and a multiple of row i */\n      k = numRows;\n\n      while (k > 0U) {\n        /* Check for the pivot element */\n        if (i == l) {\n          /* If the processing element is the pivot element,\n             only the columns to the right are to be processed */\n          pInT1 += numCols - l;\n\n          pInT2 += numCols;\n        } else {\n          /* Element of the reference row */\n          in = *pInT1;\n\n          /* Working pointers for input and destination pivot rows */\n          pPRT_in = pPivotRowIn;\n          pPRT_pDst = pPivotRowDst;\n\n          /* Loop over the number of columns to the right of the pivot element,\n             to replace the elements in the input matrix */\n          j = (numCols - l);\n\n          while (j > 0U) {\n            /* Replace the element by the sum of that row\n               and a multiple of the reference row  */\n            in1 = *pInT1;\n            *pInT1++ = in1 - (in * *pPRT_in++);\n\n            /* Decrement the loop counter */\n            j--;\n          }\n\n          /* Loop over the number of columns to\n             replace the elements in the destination matrix */\n          j = numCols;\n\n          while (j > 0U) {\n            /* Replace the element by the sum of that row\n               and a multiple of the reference row  */\n            in1 = *pInT2;\n            *pInT2++ = in1 - (in * *pPRT_pDst++);\n\n            /* Decrement loop counter */\n            j--;\n          }\n        }\n\n        /* Increment temporary input pointer */\n        pInT1 = pInT1 + l;\n\n        /* Decrement loop counter */\n        k--;\n\n        /* Increment pivot index */\n        i++;\n      }\n\n      /* Increment the input pointer */\n      pIn++;\n\n      /* Decrement the loop counter */\n      loopCnt--;\n\n      /* Increment the index modifier */\n      l++;\n    }\n\n#else\n\n  float32_t Xchg, in = 0.0f;                       /* Temporary input values  */\n  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */\n  arm_status status; /* status of matrix inverse */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) ||\n      (pSrc->numRows != pDst->numRows)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n\n    /*--------------------------------------------------------------------------------------------------------------\n     * Matrix Inverse can be solved using elementary row operations.\n     *\n     *  Gauss-Jordan Method:\n     *\n     *      1. First combine the identity matrix and the input matrix separated\n     *by a bar to form an augmented matrix as follows: _  _          _     _ _\n     *_         _         _ |  |  a11  a12  | | | 1   0  |   |       |  X11 X12\n     *| |  |            | | |        |   |   =   |           |\n     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21\n     *_|\n     *\n     *      2. In our implementation, pDst Matrix is used as identity matrix.\n     *\n     *      3. Begin with the first row. Let i = 1.\n     *\n     *      4. Check to see if the pivot for row i is zero.\n     *         The pivot is the element of the main diagonal that is on the\n     *current row. For instance, if working with row i, then the pivot element\n     *is aii. If the pivot is zero, exchange that row with a row below it that\n     *does not contain a zero in column i. If this is not possible, then an\n     *inverse to that matrix does not exist.\n     *\n     *      5. Divide every element of row i by the pivot.\n     *\n     *      6. For every row below and  row i, replace that row with the sum of\n     *that row and a multiple of row i so that each new element in column i\n     *below row i is zero.\n     *\n     *      7. Move to the next row and column and repeat steps 2 through 5\n     *until you have zeros for every element below and above the main diagonal.\n     *\n     *      8. Now an identical matrix is formed to the left of the bar(input\n     *matrix, src). Therefore, the matrix to the right of the bar is our\n     *solution(dst matrix, dst).\n     *----------------------------------------------------------------------------------------------------------------*/\n\n    /* Working pointer for destination matrix */\n    pOutT1 = pOut;\n\n    /* Loop over the number of rows */\n    rowCnt = numRows;\n\n    /* Making the destination matrix as identity matrix */\n    while (rowCnt > 0U) {\n      /* Writing all zeroes in lower triangle of the destination matrix */\n      j = numRows - rowCnt;\n      while (j > 0U) {\n        *pOutT1++ = 0.0f;\n        j--;\n      }\n\n      /* Writing all ones in the diagonal of the destination matrix */\n      *pOutT1++ = 1.0f;\n\n      /* Writing all zeroes in upper triangle of the destination matrix */\n      j = rowCnt - 1U;\n      while (j > 0U) {\n        *pOutT1++ = 0.0f;\n        j--;\n      }\n\n      /* Decrement loop counter */\n      rowCnt--;\n    }\n\n    /* Loop over the number of columns of the input matrix.\n       All the elements in each column are processed by the row operations */\n    loopCnt = numCols;\n\n    /* Index modifier to navigate through the columns */\n    l = 0U;\n\n    while (loopCnt > 0U) {\n      /* Check if the pivot element is zero..\n       * If it is zero then interchange the row with non zero row below.\n       * If there is no non zero element to replace in the rows below,\n       * then the matrix is Singular. */\n\n      /* Working pointer for the input matrix that points\n       * to the pivot element of the particular row  */\n      pInT1 = pIn + (l * numCols);\n\n      /* Working pointer for the destination matrix that points\n       * to the pivot element of the particular row  */\n      pOutT1 = pOut + (l * numCols);\n\n      /* Temporary variable to hold the pivot value */\n      in = *pInT1;\n\n      /* Destination pointer modifier */\n      k = 1U;\n\n      /* Check if the pivot element is zero */\n      if (*pInT1 == 0.0f) {\n        /* Loop over the number rows present below */\n        for (i = (l + 1U); i < numRows; i++) {\n          /* Update the input and destination pointers */\n          pInT2 = pInT1 + (numCols * l);\n          pOutT2 = pOutT1 + (numCols * k);\n\n          /* Check if there is a non zero pivot element to\n           * replace in the rows below */\n          if (*pInT2 != 0.0f) {\n            /* Loop over number of columns\n             * to the right of the pilot element */\n            for (j = 0U; j < (numCols - l); j++) {\n              /* Exchange the row elements of the input matrix */\n              Xchg = *pInT2;\n              *pInT2++ = *pInT1;\n              *pInT1++ = Xchg;\n            }\n\n            for (j = 0U; j < numCols; j++) {\n              Xchg = *pOutT2;\n              *pOutT2++ = *pOutT1;\n              *pOutT1++ = Xchg;\n            }\n\n            /* Flag to indicate whether exchange is done or not */\n            flag = 1U;\n\n            /* Break after exchange is done */\n            break;\n          }\n\n          /* Update the destination pointer modifier */\n          k++;\n        }\n      }\n\n      /* Update the status if the matrix is singular */\n      if ((flag != 1U) && (in == 0.0f)) {\n        return ARM_MATH_SINGULAR;\n      }\n\n      /* Points to the pivot row of input and destination matrices */\n      pPivotRowIn = pIn + (l * numCols);\n      pPivotRowDst = pOut + (l * numCols);\n\n      /* Temporary pointers to the pivot row pointers */\n      pInT1 = pPivotRowIn;\n      pOutT1 = pPivotRowDst;\n\n      /* Pivot element of the row */\n      in = *(pIn + (l * numCols));\n\n      /* Loop over number of columns\n       * to the right of the pilot element */\n      for (j = 0U; j < (numCols - l); j++) {\n        /* Divide each element of the row of the input matrix\n         * by the pivot element */\n        *pInT1 = *pInT1 / in;\n        pInT1++;\n      }\n      for (j = 0U; j < numCols; j++) {\n        /* Divide each element of the row of the destination matrix\n         * by the pivot element */\n        *pOutT1 = *pOutT1 / in;\n        pOutT1++;\n      }\n\n      /* Replace the rows with the sum of that row and a multiple of row i\n       * so that each new element in column i above row i is zero.*/\n\n      /* Temporary pointers for input and destination matrices */\n      pInT1 = pIn;\n      pOutT1 = pOut;\n\n      for (i = 0U; i < numRows; i++) {\n        /* Check for the pivot element */\n        if (i == l) {\n          /* If the processing element is the pivot element,\n             only the columns to the right are to be processed */\n          pInT1 += numCols - l;\n          pOutT1 += numCols;\n        } else {\n          /* Element of the reference row */\n          in = *pInT1;\n\n          /* Working pointers for input and destination pivot rows */\n          pPRT_in = pPivotRowIn;\n          pPRT_pDst = pPivotRowDst;\n\n          /* Loop over the number of columns to the right of the pivot element,\n             to replace the elements in the input matrix */\n          for (j = 0U; j < (numCols - l); j++) {\n            /* Replace the element by the sum of that row\n               and a multiple of the reference row  */\n            *pInT1 = *pInT1 - (in * *pPRT_in++);\n            pInT1++;\n          }\n\n          /* Loop over the number of columns to\n             replace the elements in the destination matrix */\n          for (j = 0U; j < numCols; j++) {\n            /* Replace the element by the sum of that row\n               and a multiple of the reference row  */\n            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);\n            pOutT1++;\n          }\n        }\n\n        /* Increment temporary input pointer */\n        pInT1 = pInT1 + l;\n      }\n\n      /* Increment the input pointer */\n      pIn++;\n\n      /* Decrement the loop counter */\n      loopCnt--;\n\n      /* Increment the index modifier */\n      l++;\n    }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n\n    if ((flag != 1U) && (in == 0.0f)) {\n      pIn = pSrc->pData;\n      for (i = 0; i < numRows * numCols; i++) {\n        if (pIn[i] != 0.0f)\n          break;\n      }\n\n      if (i == numRows * numCols)\n        status = ARM_MATH_SINGULAR;\n    }\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixInv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_inverse_f64.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_inverse_f64.c\n * Description:  Floating-point matrix inverse\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixInv\n  @{\n */\n\n/**\n  @brief         Floating-point (64 bit) matrix inverse.\n  @param[in]     pSrc      points to input matrix structure\n  @param[out]    pDst      points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n                   - \\ref ARM_MATH_SINGULAR      : Input matrix is found to be\n  singular (non-invertible)\n */\n\narm_status arm_mat_inverse_f64(const arm_matrix_instance_f64 *pSrc,\n                               arm_matrix_instance_f64 *pDst) {\n  float64_t *pIn = pSrc->pData;  /* input data matrix pointer */\n  float64_t *pOut = pDst->pData; /* output data matrix pointer */\n  float64_t *pInT1, *pInT2;      /* Temporary input data matrix pointer */\n  float64_t *pOutT1, *pOutT2;    /* Temporary output data matrix pointer */\n  float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst,\n      *pPRT_pDst; /* Temporary input and output data matrix pointer */\n  uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix  */\n  uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix  */\n\n#if defined(ARM_MATH_DSP)\n  float64_t maxC; /* maximum value in the column */\n\n  float64_t Xchg, in = 0.0, in1;                   /* Temporary input values  */\n  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */\n  arm_status status; /* status of matrix inverse */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) ||\n      (pSrc->numRows != pDst->numRows)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n\n    /*--------------------------------------------------------------------------------------------------------------\n     * Matrix Inverse can be solved using elementary row operations.\n     *\n     *  Gauss-Jordan Method:\n     *\n     *      1. First combine the identity matrix and the input matrix separated\n     *by a bar to form an augmented matrix as follows: _                  _ _ _\n     *                     |  a11  a12 | 1   0  |       |  X11 X12  |\n     *                     |           |        |   =   |           |\n     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|\n     *\n     *      2. In our implementation, pDst Matrix is used as identity matrix.\n     *\n     *      3. Begin with the first row. Let i = 1.\n     *\n     *      4. Check to see if the pivot for column i is the greatest of the\n     *column. The pivot is the element of the main diagonal that is on the\n     *current row. For instance, if working with row i, then the pivot element\n     *is aii. If the pivot is not the most significant of the columns, exchange\n     *that row with a row below it that does contain the most significant value\n     *in column i. If the most significant value of the column is zero, then an\n     *inverse to that matrix does not exist. The most significant value of the\n     *column is the absolute maximum.\n     *\n     *      5. Divide every element of row i by the pivot.\n     *\n     *      6. For every row below and  row i, replace that row with the sum of\n     *that row and a multiple of row i so that each new element in column i\n     *below row i is zero.\n     *\n     *      7. Move to the next row and column and repeat steps 2 through 5\n     *until you have zeros for every element below and above the main diagonal.\n     *\n     *      8. Now an identical matrix is formed to the left of the bar(input\n     *matrix, pSrc). Therefore, the matrix to the right of the bar is our\n     *solution(pDst matrix, pDst).\n     *----------------------------------------------------------------------------------------------------------------*/\n\n    /* Working pointer for destination matrix */\n    pOutT1 = pOut;\n\n    /* Loop over the number of rows */\n    rowCnt = numRows;\n\n    /* Making the destination matrix as identity matrix */\n    while (rowCnt > 0U) {\n      /* Writing all zeroes in lower triangle of the destination matrix */\n      j = numRows - rowCnt;\n      while (j > 0U) {\n        *pOutT1++ = 0.0;\n        j--;\n      }\n\n      /* Writing all ones in the diagonal of the destination matrix */\n      *pOutT1++ = 1.0;\n\n      /* Writing all zeroes in upper triangle of the destination matrix */\n      j = rowCnt - 1U;\n      while (j > 0U) {\n        *pOutT1++ = 0.0;\n        j--;\n      }\n\n      /* Decrement loop counter */\n      rowCnt--;\n    }\n\n    /* Loop over the number of columns of the input matrix.\n       All the elements in each column are processed by the row operations */\n    loopCnt = numCols;\n\n    /* Index modifier to navigate through the columns */\n    l = 0U;\n\n    while (loopCnt > 0U) {\n      /* Check if the pivot element is zero..\n       * If it is zero then interchange the row with non zero row below.\n       * If there is no non zero element to replace in the rows below,\n       * then the matrix is Singular. */\n\n      /* Working pointer for the input matrix that points\n       * to the pivot element of the particular row  */\n      pInT1 = pIn + (l * numCols);\n\n      /* Working pointer for the destination matrix that points\n       * to the pivot element of the particular row  */\n      pOutT1 = pOut + (l * numCols);\n\n      /* Temporary variable to hold the pivot value */\n      in = *pInT1;\n\n      /* Grab the most significant value from column l */\n      maxC = 0;\n      for (i = l; i < numRows; i++) {\n        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC)\n                          : (-*pInT1 > maxC ? -*pInT1 : maxC);\n        pInT1 += numCols;\n      }\n\n      /* Update the status if the matrix is singular */\n      if (maxC == (float64_t)0.0) {\n        return ARM_MATH_SINGULAR;\n      }\n\n      /* Restore pInT1  */\n      pInT1 = pIn;\n\n      /* Destination pointer modifier */\n      k = 1U;\n\n      /* Check if the pivot element is the most significant of the column */\n      if ((in > (float64_t)0.0 ? in : -in) != maxC) {\n        /* Loop over the number rows present below */\n        i = numRows - (l + 1U);\n\n        while (i > 0U) {\n          /* Update the input and destination pointers */\n          pInT2 = pInT1 + (numCols * l);\n          pOutT2 = pOutT1 + (numCols * k);\n\n          /* Look for the most significant element to\n           * replace in the rows below */\n          if ((*pInT2 > (float64_t)0.0 ? *pInT2 : -*pInT2) == maxC) {\n            /* Loop over number of columns\n             * to the right of the pilot element */\n            j = numCols - l;\n\n            while (j > 0U) {\n              /* Exchange the row elements of the input matrix */\n              Xchg = *pInT2;\n              *pInT2++ = *pInT1;\n              *pInT1++ = Xchg;\n\n              /* Decrement the loop counter */\n              j--;\n            }\n\n            /* Loop over number of columns of the destination matrix */\n            j = numCols;\n\n            while (j > 0U) {\n              /* Exchange the row elements of the destination matrix */\n              Xchg = *pOutT2;\n              *pOutT2++ = *pOutT1;\n              *pOutT1++ = Xchg;\n\n              /* Decrement loop counter */\n              j--;\n            }\n\n            /* Flag to indicate whether exchange is done or not */\n            flag = 1U;\n\n            /* Break after exchange is done */\n            break;\n          }\n\n          /* Update the destination pointer modifier */\n          k++;\n\n          /* Decrement loop counter */\n          i--;\n        }\n      }\n\n      /* Update the status if the matrix is singular */\n      if ((flag != 1U) && (in == (float64_t)0.0)) {\n        return ARM_MATH_SINGULAR;\n      }\n\n      /* Points to the pivot row of input and destination matrices */\n      pPivotRowIn = pIn + (l * numCols);\n      pPivotRowDst = pOut + (l * numCols);\n\n      /* Temporary pointers to the pivot row pointers */\n      pInT1 = pPivotRowIn;\n      pInT2 = pPivotRowDst;\n\n      /* Pivot element of the row */\n      in = *pPivotRowIn;\n\n      /* Loop over number of columns\n       * to the right of the pilot element */\n      j = (numCols - l);\n\n      while (j > 0U) {\n        /* Divide each element of the row of the input matrix\n         * by the pivot element */\n        in1 = *pInT1;\n        *pInT1++ = in1 / in;\n\n        /* Decrement the loop counter */\n        j--;\n      }\n\n      /* Loop over number of columns of the destination matrix */\n      j = numCols;\n\n      while (j > 0U) {\n        /* Divide each element of the row of the destination matrix\n         * by the pivot element */\n        in1 = *pInT2;\n        *pInT2++ = in1 / in;\n\n        /* Decrement the loop counter */\n        j--;\n      }\n\n      /* Replace the rows with the sum of that row and a multiple of row i\n       * so that each new element in column i above row i is zero.*/\n\n      /* Temporary pointers for input and destination matrices */\n      pInT1 = pIn;\n      pInT2 = pOut;\n\n      /* index used to check for pivot element */\n      i = 0U;\n\n      /* Loop over number of rows */\n      /*  to be replaced by the sum of that row and a multiple of row i */\n      k = numRows;\n\n      while (k > 0U) {\n        /* Check for the pivot element */\n        if (i == l) {\n          /* If the processing element is the pivot element,\n             only the columns to the right are to be processed */\n          pInT1 += numCols - l;\n\n          pInT2 += numCols;\n        } else {\n          /* Element of the reference row */\n          in = *pInT1;\n\n          /* Working pointers for input and destination pivot rows */\n          pPRT_in = pPivotRowIn;\n          pPRT_pDst = pPivotRowDst;\n\n          /* Loop over the number of columns to the right of the pivot element,\n             to replace the elements in the input matrix */\n          j = (numCols - l);\n\n          while (j > 0U) {\n            /* Replace the element by the sum of that row\n               and a multiple of the reference row  */\n            in1 = *pInT1;\n            *pInT1++ = in1 - (in * *pPRT_in++);\n\n            /* Decrement the loop counter */\n            j--;\n          }\n\n          /* Loop over the number of columns to\n             replace the elements in the destination matrix */\n          j = numCols;\n\n          while (j > 0U) {\n            /* Replace the element by the sum of that row\n               and a multiple of the reference row  */\n            in1 = *pInT2;\n            *pInT2++ = in1 - (in * *pPRT_pDst++);\n\n            /* Decrement loop counter */\n            j--;\n          }\n        }\n\n        /* Increment temporary input pointer */\n        pInT1 = pInT1 + l;\n\n        /* Decrement loop counter */\n        k--;\n\n        /* Increment pivot index */\n        i++;\n      }\n\n      /* Increment the input pointer */\n      pIn++;\n\n      /* Decrement the loop counter */\n      loopCnt--;\n\n      /* Increment the index modifier */\n      l++;\n    }\n\n#else\n\n  float64_t Xchg, in = 0.0;                        /* Temporary input values  */\n  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l; /* loop counters */\n  arm_status status; /* status of matrix inverse */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols) ||\n      (pSrc->numRows != pDst->numRows)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n\n    /*--------------------------------------------------------------------------------------------------------------\n     * Matrix Inverse can be solved using elementary row operations.\n     *\n     *  Gauss-Jordan Method:\n     *\n     *      1. First combine the identity matrix and the input matrix separated\n     *by a bar to form an augmented matrix as follows: _  _          _     _ _\n     *_         _         _ |  |  a11  a12  | | | 1   0  |   |       |  X11 X12\n     *| |  |            | | |        |   |   =   |           |\n     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21\n     *_|\n     *\n     *      2. In our implementation, pDst Matrix is used as identity matrix.\n     *\n     *      3. Begin with the first row. Let i = 1.\n     *\n     *      4. Check to see if the pivot for row i is zero.\n     *         The pivot is the element of the main diagonal that is on the\n     *current row. For instance, if working with row i, then the pivot element\n     *is aii. If the pivot is zero, exchange that row with a row below it that\n     *does not contain a zero in column i. If this is not possible, then an\n     *inverse to that matrix does not exist.\n     *\n     *      5. Divide every element of row i by the pivot.\n     *\n     *      6. For every row below and  row i, replace that row with the sum of\n     *that row and a multiple of row i so that each new element in column i\n     *below row i is zero.\n     *\n     *      7. Move to the next row and column and repeat steps 2 through 5\n     *until you have zeros for every element below and above the main diagonal.\n     *\n     *      8. Now an identical matrix is formed to the left of the bar(input\n     *matrix, src). Therefore, the matrix to the right of the bar is our\n     *solution(dst matrix, dst).\n     *----------------------------------------------------------------------------------------------------------------*/\n\n    /* Working pointer for destination matrix */\n    pOutT1 = pOut;\n\n    /* Loop over the number of rows */\n    rowCnt = numRows;\n\n    /* Making the destination matrix as identity matrix */\n    while (rowCnt > 0U) {\n      /* Writing all zeroes in lower triangle of the destination matrix */\n      j = numRows - rowCnt;\n      while (j > 0U) {\n        *pOutT1++ = 0.0;\n        j--;\n      }\n\n      /* Writing all ones in the diagonal of the destination matrix */\n      *pOutT1++ = 1.0;\n\n      /* Writing all zeroes in upper triangle of the destination matrix */\n      j = rowCnt - 1U;\n      while (j > 0U) {\n        *pOutT1++ = 0.0;\n        j--;\n      }\n\n      /* Decrement loop counter */\n      rowCnt--;\n    }\n\n    /* Loop over the number of columns of the input matrix.\n       All the elements in each column are processed by the row operations */\n    loopCnt = numCols;\n\n    /* Index modifier to navigate through the columns */\n    l = 0U;\n\n    while (loopCnt > 0U) {\n      /* Check if the pivot element is zero..\n       * If it is zero then interchange the row with non zero row below.\n       * If there is no non zero element to replace in the rows below,\n       * then the matrix is Singular. */\n\n      /* Working pointer for the input matrix that points\n       * to the pivot element of the particular row  */\n      pInT1 = pIn + (l * numCols);\n\n      /* Working pointer for the destination matrix that points\n       * to the pivot element of the particular row  */\n      pOutT1 = pOut + (l * numCols);\n\n      /* Temporary variable to hold the pivot value */\n      in = *pInT1;\n\n      /* Destination pointer modifier */\n      k = 1U;\n\n      /* Check if the pivot element is zero */\n      if (*pInT1 == 0.0) {\n        /* Loop over the number rows present below */\n        for (i = (l + 1U); i < numRows; i++) {\n          /* Update the input and destination pointers */\n          pInT2 = pInT1 + (numCols * l);\n          pOutT2 = pOutT1 + (numCols * k);\n\n          /* Check if there is a non zero pivot element to\n           * replace in the rows below */\n          if (*pInT2 != 0.0) {\n            /* Loop over number of columns\n             * to the right of the pilot element */\n            for (j = 0U; j < (numCols - l); j++) {\n              /* Exchange the row elements of the input matrix */\n              Xchg = *pInT2;\n              *pInT2++ = *pInT1;\n              *pInT1++ = Xchg;\n            }\n\n            for (j = 0U; j < numCols; j++) {\n              Xchg = *pOutT2;\n              *pOutT2++ = *pOutT1;\n              *pOutT1++ = Xchg;\n            }\n\n            /* Flag to indicate whether exchange is done or not */\n            flag = 1U;\n\n            /* Break after exchange is done */\n            break;\n          }\n\n          /* Update the destination pointer modifier */\n          k++;\n        }\n      }\n\n      /* Update the status if the matrix is singular */\n      if ((flag != 1U) && (in == 0.0)) {\n        return ARM_MATH_SINGULAR;\n      }\n\n      /* Points to the pivot row of input and destination matrices */\n      pPivotRowIn = pIn + (l * numCols);\n      pPivotRowDst = pOut + (l * numCols);\n\n      /* Temporary pointers to the pivot row pointers */\n      pInT1 = pPivotRowIn;\n      pOutT1 = pPivotRowDst;\n\n      /* Pivot element of the row */\n      in = *(pIn + (l * numCols));\n\n      /* Loop over number of columns\n       * to the right of the pilot element */\n      for (j = 0U; j < (numCols - l); j++) {\n        /* Divide each element of the row of the input matrix\n         * by the pivot element */\n        *pInT1 = *pInT1 / in;\n        pInT1++;\n      }\n      for (j = 0U; j < numCols; j++) {\n        /* Divide each element of the row of the destination matrix\n         * by the pivot element */\n        *pOutT1 = *pOutT1 / in;\n        pOutT1++;\n      }\n\n      /* Replace the rows with the sum of that row and a multiple of row i\n       * so that each new element in column i above row i is zero.*/\n\n      /* Temporary pointers for input and destination matrices */\n      pInT1 = pIn;\n      pOutT1 = pOut;\n\n      for (i = 0U; i < numRows; i++) {\n        /* Check for the pivot element */\n        if (i == l) {\n          /* If the processing element is the pivot element,\n             only the columns to the right are to be processed */\n          pInT1 += numCols - l;\n          pOutT1 += numCols;\n        } else {\n          /* Element of the reference row */\n          in = *pInT1;\n\n          /* Working pointers for input and destination pivot rows */\n          pPRT_in = pPivotRowIn;\n          pPRT_pDst = pPivotRowDst;\n\n          /* Loop over the number of columns to the right of the pivot element,\n             to replace the elements in the input matrix */\n          for (j = 0U; j < (numCols - l); j++) {\n            /* Replace the element by the sum of that row\n               and a multiple of the reference row  */\n            *pInT1 = *pInT1 - (in * *pPRT_in++);\n            pInT1++;\n          }\n\n          /* Loop over the number of columns to\n             replace the elements in the destination matrix */\n          for (j = 0U; j < numCols; j++) {\n            /* Replace the element by the sum of that row\n               and a multiple of the reference row  */\n            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);\n            pOutT1++;\n          }\n        }\n\n        /* Increment temporary input pointer */\n        pInT1 = pInT1 + l;\n      }\n\n      /* Increment the input pointer */\n      pIn++;\n\n      /* Decrement the loop counter */\n      loopCnt--;\n\n      /* Increment the index modifier */\n      l++;\n    }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n\n    if ((flag != 1U) && (in == (float64_t)0.0)) {\n      pIn = pSrc->pData;\n      for (i = 0; i < numRows * numCols; i++) {\n        if (pIn[i] != (float64_t)0.0)\n          break;\n      }\n\n      if (i == numRows * numCols)\n        status = ARM_MATH_SINGULAR;\n    }\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixInv group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_mult_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_mult_f32.c\n * Description:  Floating-point matrix multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup MatrixMult Matrix Multiplication\n\n  Multiplies two matrices.\n\n  \\image html MatrixMultiplication.gif \"Multiplication of two 3 x 3 matrices\"\n\n  Matrix multiplication is only defined if the number of columns of the\n  first matrix equals the number of rows of the second matrix.\n  Multiplying an M x N matrix with an N x P matrix\n  results in an M x P matrix. When matrix size checking is enabled,\n  the functions check:\n   - that the inner dimensions of pSrcA and pSrcB are\n  equal;\n   - that the size of the output matrix equals the outer dimensions of\n  pSrcA and pSrcB.\n */\n\n/**\n  @addtogroup MatrixMult\n  @{\n */\n\n/**\n  @brief         Floating-point matrix multiplication.\n  @param[in]     pSrcA      points to the first input matrix structure\n  @param[in]     pSrcB      points to the second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n */\n\narm_status arm_mat_mult_f32(const arm_matrix_instance_f32 *pSrcA,\n                            const arm_matrix_instance_f32 *pSrcB,\n                            arm_matrix_instance_f32 *pDst) {\n  float32_t *pIn1 = pSrcA->pData;     /* Input data matrix pointer A */\n  float32_t *pIn2 = pSrcB->pData;     /* Input data matrix pointer B */\n  float32_t *pInA = pSrcA->pData;     /* Input data matrix pointer A */\n  float32_t *pInB = pSrcB->pData;     /* Input data matrix pointer B */\n  float32_t *pOut = pDst->pData;      /* Output data matrix pointer */\n  float32_t *px;                      /* Temporary output data matrix pointer */\n  float32_t sum;                      /* Accumulator */\n  uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */\n  uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */\n  uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */\n  arm_status status; /* Status of matrix multiplication */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    do {\n      /* Output pointer is set to starting address of row being processed */\n      px = pOut + i;\n\n      /* For every row wise process, column loop counter is to be initiated */\n      col = numColsB;\n\n      /* For every row wise process, pIn2 pointer is set to starting address of\n       * pSrcB data */\n      pIn2 = pSrcB->pData;\n\n      /* column loop */\n      do {\n        /* Set the variable sum, that acts as accumulator, to zero */\n        sum = 0.0f;\n\n        /* Initialize pointer pIn1 to point to starting address of column being\n         * processed */\n        pIn1 = pInA;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Loop unrolling: Compute 4 MACs at a time. */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          /* Perform the multiply-accumulates */\n          sum += *pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          sum += *pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          sum += *pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          sum += *pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Loop unrolling: Compute remaining MACs */\n        colCnt = numColsA % 0x4U;\n\n#else\n\n        /* Initialize cntCnt with number of columns */\n        colCnt = numColsA;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          /* Perform the multiply-accumulates */\n          sum += *pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Store result in destination buffer */\n        *px++ = sum;\n\n        /* Decrement column loop counter */\n        col--;\n\n        /* Update pointer pIn2 to point to starting address of next column */\n        pIn2 = pInB + (numColsB - col);\n\n      } while (col > 0U);\n\n      /* Update pointer pInA to point to starting address of next row */\n      i = i + numColsB;\n      pInA = pInA + numColsA;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_mult_fast_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_mult_fast_q15.c\n * Description:  Q15 matrix multiplication (fast variant)\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixMult\n  @{\n */\n\n/**\n  @brief         Q15 matrix multiplication (fast variant).\n  @param[in]     pSrcA      points to the first input matrix structure\n  @param[in]     pSrcB      points to the second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @param[in]     pState     points to the array for storing intermediate results\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The difference between the function \\ref arm_mat_mult_q15()\n  and this fast variant is that the fast variant use a 32-bit rather than a\n  64-bit accumulator. The result of each 1.15 x 1.15 multiplication is truncated\n  to 2.30 format. These intermediate results are accumulated in a 32-bit\n  register in 2.30 format. Finally, the accumulator is saturated and converted\n  to a 1.15 result.\n  @par\n                   The fast version has the same overflow behavior as the\n  standard version but provides less precision since it discards the low 16 bits\n  of each multiplication result. In order to avoid overflows completely the\n  input signals must be scaled down. Scale down one of the input matrices by\n  log2(numColsA) bits to avoid overflows, as a total of numColsA additions are\n  computed internally for each output element.\n  @remark\n                   Refer to \\ref arm_mat_mult_q15() for a slower implementation\n  of this function which uses 64-bit accumulation to provide higher precision.\n */\n\narm_status arm_mat_mult_fast_q15(const arm_matrix_instance_q15 *pSrcA,\n                                 const arm_matrix_instance_q15 *pSrcB,\n                                 arm_matrix_instance_q15 *pDst, q15_t *pState) {\n  q31_t sum;                  /* Accumulator */\n  q15_t *pSrcBT = pState;     /* Input data matrix pointer for transpose */\n  q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */\n  q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */\n  q15_t *px;                  /* Temporary output data matrix pointer */\n  uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */\n  uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */\n  uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */\n  uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */\n  arm_status status; /* Status of matrix multiplication */\n\n#if defined(ARM_MATH_DSP)\n  q31_t in; /* Temporary variable to hold the input value */\n  q31_t inA1, inB1, inA2, inB2;\n  q31_t sum2, sum3, sum4;\n  q15_t *pInA2, *pInB2, *px2;\n  uint32_t j = 0;\n#else\n  q15_t in; /* Temporary variable to hold the input value */\n  q15_t inA1, inB1, inA2, inB2;\n#endif /* #if defined (ARM_MATH_DSP) */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Matrix transpose */\n    do {\n      /* The pointer px is set to starting address of column being processed */\n      px = pSrcBT + i;\n\n      /* Apply loop unrolling and exchange columns with row elements */\n      col = numColsB >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 outputs at\n       *a time.\n       ** a second loop below computes the remaining 1 to 3 samples. */\n      while (col > 0U) {\n\n#if defined(ARM_MATH_DSP)\n\n        /* Read two elements from row */\n        in = read_q15x2_ia((q15_t **)&pInB);\n\n        /* Unpack and store one element in destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *px = (q15_t)in;\n#else\n        *px = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB;\n\n        /* Unpack and store second element in destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *px = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#else\n        *px = (q15_t)in;\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB;\n\n        in = read_q15x2_ia((q15_t **)&pInB);\n#ifndef ARM_MATH_BIG_ENDIAN\n        *px = (q15_t)in;\n#else\n        *px = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n        px += numRowsB;\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        *px = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#else\n        *px = (q15_t)in;\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n        px += numRowsB;\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n        /* Read one element from row */\n        in = *pInB++;\n\n        /* Store one element in destination */\n        *px = in;\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB;\n\n        in = *pInB++;\n        *px = in;\n        px += numRowsB;\n\n        in = *pInB++;\n        *px = in;\n        px += numRowsB;\n\n        in = *pInB++;\n        *px = in;\n        px += numRowsB;\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      /* If the columns of pSrcB is not a multiple of 4, compute any remaining\n       *output samples here.\n       ** No loop unrolling is used. */\n      col = numColsB % 0x4U;\n\n      while (col > 0U) {\n        /* Read and store input element in destination */\n        *px = *pInB++;\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      i++;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n    /* Reset variables for usage in following multiplication process */\n    row = numRowsA;\n    i = 0U;\n    px = pDst->pData;\n\n#if defined(ARM_MATH_DSP)\n    /* Process two rows from matrix A at a time and output two rows at a time */\n    row = row >> 1U;\n    px2 = px + numColsB;\n#endif\n\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    while (row > 0U) {\n      /* For every row wise process, column loop counter is to be initiated */\n      col = numColsB;\n\n      /* For every row wise process, pIn2 pointer is set to starting address of\n       * transposed pSrcB data */\n      pInB = pSrcBT;\n\n#if defined(ARM_MATH_DSP)\n      /* Process two (transposed) columns from matrix B at a time */\n      col = col >> 1U;\n      j = 0;\n#endif\n\n      /* column loop */\n      while (col > 0U) {\n        /* Set variable sum, that acts as accumulator, to zero */\n        sum = 0;\n\n        /* Initiate pointer pInA to point to starting address of column being\n         * processed */\n        pInA = pSrcA->pData + i;\n\n#if defined(ARM_MATH_DSP)\n        sum2 = 0;\n        sum3 = 0;\n        sum4 = 0;\n        pInB = pSrcBT + j;\n        pInA2 = pInA + numColsA;\n        pInB2 = pInB + numRowsB;\n\n        /* Read in two elements at once - alows dual MAC instruction */\n        colCnt = numColsA >> 1U;\n#else\n        colCnt = numColsA >> 2U;\n#endif\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n#if defined(ARM_MATH_DSP)\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          inA1 = read_q15x2_ia((q15_t **)&pInA);\n          inB1 = read_q15x2_ia((q15_t **)&pInB);\n\n          inA2 = read_q15x2_ia((q15_t **)&pInA2);\n          inB2 = read_q15x2_ia((q15_t **)&pInB2);\n\n          /* Multiply and Accumlates */\n          sum = __SMLAD(inA1, inB1, sum);\n          sum2 = __SMLAD(inA1, inB2, sum2);\n          sum3 = __SMLAD(inA2, inB1, sum3);\n          sum4 = __SMLAD(inA2, inB2, sum4);\n#else\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          inA1 = *pInA++;\n          inB1 = *pInB++;\n          /* Multiply and Accumlates */\n          sum += inA1 * inB1;\n\n          inA2 = *pInA++;\n          inB2 = *pInB++;\n          sum += inA2 * inB2;\n\n          inA1 = *pInA++;\n          inB1 = *pInB++;\n          sum += inA1 * inB1;\n\n          inA2 = *pInA++;\n          inB2 = *pInB++;\n          sum += inA2 * inB2;\n#endif /* #if defined (ARM_MATH_DSP) */\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* process odd column samples */\n#if defined(ARM_MATH_DSP)\n        if (numColsA & 1U) {\n          inA1 = *pInA++;\n          inB1 = *pInB++;\n          inA2 = *pInA2++;\n          inB2 = *pInB2++;\n          sum += inA1 * inB1;\n          sum2 += inA1 * inB2;\n          sum3 += inA2 * inB1;\n          sum4 += inA2 * inB2;\n        }\n#else\n        colCnt = numColsA % 0x4U;\n\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n          sum += (q31_t)*pInA++ * *pInB++;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n#endif /* #if defined (ARM_MATH_DSP) */\n\n        /* Saturate and store result in destination buffer */\n        *px++ = (q15_t)(sum >> 15);\n\n#if defined(ARM_MATH_DSP)\n        *px++ = (q15_t)(sum2 >> 15);\n        *px2++ = (q15_t)(sum3 >> 15);\n        *px2++ = (q15_t)(sum4 >> 15);\n        j += numRowsB * 2;\n#endif\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      i = i + numColsA;\n\n#if defined(ARM_MATH_DSP)\n      i = i + numColsA;\n      px = px2 + (numColsB & 1U);\n      px2 = px + numColsB;\n#endif\n\n      /* Decrement row loop counter */\n      row--;\n    }\n\n    /* Compute any remaining odd row/column below */\n\n#if defined(ARM_MATH_DSP)\n\n    /* Compute remaining output column */\n    if (numColsB & 1U) {\n\n      /* Avoid redundant computation of last element */\n      row = numRowsA & (~0x1);\n\n      /* Point to remaining unfilled column in output matrix */\n      px = pDst->pData + numColsB - 1;\n      pInA = pSrcA->pData;\n\n      /* row loop */\n      while (row > 0) {\n\n        /* point to last column in matrix B */\n        pInB = pSrcBT + numRowsB * (numColsB - 1);\n\n        /* Set variable sum, that acts as accumulator, to zero */\n        sum = 0;\n\n        /* Compute 4 columns at once */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          inA1 = read_q15x2_ia((q15_t **)&pInA);\n          inA2 = read_q15x2_ia((q15_t **)&pInA);\n          inB1 = read_q15x2_ia((q15_t **)&pInB);\n          inB2 = read_q15x2_ia((q15_t **)&pInB);\n\n          sum = __SMLAD(inA1, inB1, sum);\n          sum = __SMLAD(inA2, inB2, sum);\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        colCnt = numColsA & 3U;\n        while (colCnt > 0U) {\n          sum += (q31_t)(*pInA++) * (*pInB++);\n          colCnt--;\n        }\n\n        /* Store result in destination buffer */\n        *px = (q15_t)(sum >> 15);\n        px += numColsB;\n\n        /* Decrement row loop counter */\n        row--;\n      }\n    }\n\n    /* Compute remaining output row */\n    if (numRowsA & 1U) {\n\n      /* point to last row in output matrix */\n      px = pDst->pData + (numColsB) * (numRowsA - 1);\n\n      pInB = pSrcBT;\n      col = numColsB;\n      i = 0U;\n\n      /* col loop */\n      while (col > 0) {\n        /* point to last row in matrix A */\n        pInA = pSrcA->pData + (numRowsA - 1) * numColsA;\n\n        /* Set variable sum, that acts as accumulator, to zero */\n        sum = 0;\n\n        /* Compute 4 columns at once */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          inA1 = read_q15x2_ia((q15_t **)&pInA);\n          inA2 = read_q15x2_ia((q15_t **)&pInA);\n          inB1 = read_q15x2_ia((q15_t **)&pInB);\n          inB2 = read_q15x2_ia((q15_t **)&pInB);\n\n          sum = __SMLAD(inA1, inB1, sum);\n          sum = __SMLAD(inA2, inB2, sum);\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        colCnt = numColsA % 4U;\n        while (colCnt > 0U) {\n          sum += (q31_t)(*pInA++) * (*pInB++);\n\n          colCnt--;\n        }\n\n        /* Store result in destination buffer */\n        *px++ = (q15_t)(sum >> 15);\n\n        /* Decrement column loop counter */\n        col--;\n      }\n    }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_mult_fast_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_mult_fast_q31.c\n * Description:  Q31 matrix multiplication (fast variant)\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixMult\n  @{\n */\n\n/**\n  @brief         Q31 matrix multiplication (fast variant).\n  @param[in]     pSrcA      points to the first input matrix structure\n  @param[in]     pSrcB      points to the second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The difference between the function \\ref arm_mat_mult_q31()\n  and this fast variant is that the fast variant use a 32-bit rather than a\n  64-bit accumulator. The result of each 1.31 x 1.31 multiplication is truncated\n  to 2.30 format. These intermediate results are accumulated in a 32-bit\n  register in 2.30 format. Finally, the accumulator is saturated and converted\n  to a 1.31 result.\n  @par\n                   The fast version has the same overflow behavior as the\n  standard version but provides less precision since it discards the low 32 bits\n  of each multiplication result. In order to avoid overflows completely the\n  input signals must be scaled down. Scale down one of the input matrices by\n  log2(numColsA) bits to avoid overflows, as a total of numColsA additions are\n  computed internally for each output element.\n  @remark\n                   Refer to \\ref arm_mat_mult_q31() for a slower implementation\n  of this function which uses 64-bit accumulation to provide higher precision.\n */\n\narm_status arm_mat_mult_fast_q31(const arm_matrix_instance_q31 *pSrcA,\n                                 const arm_matrix_instance_q31 *pSrcB,\n                                 arm_matrix_instance_q31 *pDst) {\n  q31_t *pInA = pSrcA->pData; /* Input data matrix pointer A */\n  q31_t *pInB = pSrcB->pData; /* Input data matrix pointer B */\n  q31_t *pInA2;\n  q31_t *px; /* Temporary output data matrix pointer */\n  q31_t *px2;\n  q31_t sum1, sum2, sum3, sum4; /* Accumulator */\n  q31_t inA1, inA2, inB1, inB2;\n  uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */\n  uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */\n  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* Loop counters */\n  arm_status status; /* Status of matrix multiplication */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    px = pDst->pData;\n\n    row = row >> 1U;\n    px2 = px + numColsB;\n\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    while (row > 0U) {\n      /* For every row wise process, column loop counter is to be initiated */\n      col = numColsB;\n\n      /* For every row wise process, pIn2 pointer is set to starting address of\n       * pSrcB data */\n      pInB = pSrcB->pData;\n\n      j = 0U;\n\n      col = col >> 1U;\n\n      /* column loop */\n      while (col > 0U) {\n        /* Set the variable sum, that acts as accumulator, to zero */\n        sum1 = 0;\n        sum2 = 0;\n        sum3 = 0;\n        sum4 = 0;\n\n        /* Initiate data pointers */\n        pInA = pSrcA->pData + i;\n        pInB = pSrcB->pData + j;\n        pInA2 = pInA + numColsA;\n\n        colCnt = numColsA;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          inA1 = *pInA++;\n          inB1 = pInB[0];\n          inA2 = *pInA2++;\n          inB2 = pInB[1];\n          pInB += numColsB;\n\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(inA1, inB1, sum1);\n          sum2 = __SMMLA(inA1, inB2, sum2);\n          sum3 = __SMMLA(inA2, inB1, sum3);\n          sum4 = __SMMLA(inA2, inB2, sum4);\n#else\n          sum1 = (q31_t)((((q63_t)sum1 << 32) + ((q63_t)inA1 * inB1)) >> 32);\n          sum2 = (q31_t)((((q63_t)sum2 << 32) + ((q63_t)inA1 * inB2)) >> 32);\n          sum3 = (q31_t)((((q63_t)sum3 << 32) + ((q63_t)inA2 * inB1)) >> 32);\n          sum4 = (q31_t)((((q63_t)sum4 << 32) + ((q63_t)inA2 * inB2)) >> 32);\n#endif\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Convert the result from 2.30 to 1.31 format and store in destination\n         * buffer */\n        *px++ = sum1 << 1;\n        *px++ = sum2 << 1;\n        *px2++ = sum3 << 1;\n        *px2++ = sum4 << 1;\n\n        j += 2;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      i = i + (numColsA << 1U);\n      px = px2 + (numColsB & 1U);\n      px2 = px + numColsB;\n\n      /* Decrement row loop counter */\n      row--;\n    }\n\n    /* Compute any remaining odd row/column below */\n\n    /* Compute remaining output column */\n    if (numColsB & 1U) {\n\n      /* Avoid redundant computation of last element */\n      row = numRowsA & (~1U);\n\n      /* Point to remaining unfilled column in output matrix */\n      px = pDst->pData + numColsB - 1;\n      pInA = pSrcA->pData;\n\n      /* row loop */\n      while (row > 0) {\n\n        /* point to last column in matrix B */\n        pInB = pSrcB->pData + numColsB - 1;\n\n        /* Set variable sum1, that acts as accumulator, to zero */\n        sum1 = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Loop unrolling: Compute 4 columns at a time. */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(*pInA++, *pInB, sum1);\n#else\n          sum1 =\n              (q31_t)((((q63_t)sum1 << 32) + ((q63_t)*pInA++ * *pInB)) >> 32);\n#endif\n          pInB += numColsB;\n\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(*pInA++, *pInB, sum1);\n#else\n          sum1 =\n              (q31_t)((((q63_t)sum1 << 32) + ((q63_t)*pInA++ * *pInB)) >> 32);\n#endif\n          pInB += numColsB;\n\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(*pInA++, *pInB, sum1);\n#else\n          sum1 =\n              (q31_t)((((q63_t)sum1 << 32) + ((q63_t)*pInA++ * *pInB)) >> 32);\n#endif\n          pInB += numColsB;\n\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(*pInA++, *pInB, sum1);\n#else\n          sum1 =\n              (q31_t)((((q63_t)sum1 << 32) + ((q63_t)*pInA++ * *pInB)) >> 32);\n#endif\n          pInB += numColsB;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Loop unrolling: Compute remaining column */\n        colCnt = numColsA % 4U;\n\n#else\n\n        /* Initialize colCnt with number of columns */\n        colCnt = numColsA;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (colCnt > 0U) {\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(*pInA++, *pInB, sum1);\n#else\n          sum1 =\n              (q31_t)((((q63_t)sum1 << 32) + ((q63_t)*pInA++ * *pInB)) >> 32);\n#endif\n          pInB += numColsB;\n\n          colCnt--;\n        }\n\n        /* Convert the result from 2.30 to 1.31 format and store in destination\n         * buffer */\n        *px = sum1 << 1;\n        px += numColsB;\n\n        /* Decrement row loop counter */\n        row--;\n      }\n    }\n\n    /* Compute remaining output row */\n    if (numRowsA & 1U) {\n\n      /* point to last row in output matrix */\n      px = pDst->pData + (numColsB) * (numRowsA - 1);\n\n      col = numColsB;\n      i = 0U;\n\n      /* col loop */\n      while (col > 0) {\n\n        /* point to last row in matrix A */\n        pInA = pSrcA->pData + (numRowsA - 1) * numColsA;\n        pInB = pSrcB->pData + i;\n\n        /* Set variable sum1, that acts as accumulator, to zero */\n        sum1 = 0;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Loop unrolling: Compute 4 columns at a time. */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          inA1 = *pInA++;\n          inA2 = *pInA++;\n          inB1 = *pInB;\n          pInB += numColsB;\n          inB2 = *pInB;\n          pInB += numColsB;\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(inA1, inB1, sum1);\n          sum1 = __SMMLA(inA2, inB2, sum1);\n#else\n          sum1 = (q31_t)((((q63_t)sum1 << 32) + ((q63_t)inA1 * inB1)) >> 32);\n          sum1 = (q31_t)((((q63_t)sum1 << 32) + ((q63_t)inA2 * inB2)) >> 32);\n#endif\n\n          inA1 = *pInA++;\n          inA2 = *pInA++;\n          inB1 = *pInB;\n          pInB += numColsB;\n          inB2 = *pInB;\n          pInB += numColsB;\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(inA1, inB1, sum1);\n          sum1 = __SMMLA(inA2, inB2, sum1);\n#else\n          sum1 = (q31_t)((((q63_t)sum1 << 32) + ((q63_t)inA1 * inB1)) >> 32);\n          sum1 = (q31_t)((((q63_t)sum1 << 32) + ((q63_t)inA2 * inB2)) >> 32);\n#endif\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Loop unrolling: Compute remaining column */\n        colCnt = numColsA % 4U;\n\n#else\n\n        /* Initialize colCnt with number of columns */\n        colCnt = numColsA;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (colCnt > 0U) {\n#if defined(ARM_MATH_DSP)\n          sum1 = __SMMLA(*pInA++, *pInB, sum1);\n#else\n          sum1 =\n              (q31_t)((((q63_t)sum1 << 32) + ((q63_t)*pInA++ * *pInB)) >> 32);\n#endif\n          pInB += numColsB;\n\n          colCnt--;\n        }\n\n        /* Saturate and store the result in the destination buffer */\n        *px++ = sum1 << 1;\n        i++;\n\n        /* Decrement col loop counter */\n        col--;\n      }\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_mult_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_mult_q15.c\n * Description:  Q15 matrix multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixMult\n  @{\n */\n\n/**\n  @brief         Q15 matrix multiplication.\n  @param[in]     pSrcA      points to the first input matrix structure\n  @param[in]     pSrcB      points to the second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @param[in]     pState     points to the array for storing intermediate results\n  (Unused)\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The inputs to the multiplications are in 1.15 format and\n  multiplications yield a 2.30 result. The 2.30 intermediate results are\n  accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33\n  guard bits and there is no risk of overflow. The 34.30 result is then\n  truncated to 34.15 format by discarding the low 15 bits and then saturated\n  to 1.15 format.\n  @par\n                   Refer to \\ref arm_mat_mult_fast_q15() for a faster but less\n  precise version of this function.\n */\n\narm_status arm_mat_mult_q15(const arm_matrix_instance_q15 *pSrcA,\n                            const arm_matrix_instance_q15 *pSrcB,\n                            arm_matrix_instance_q15 *pDst, q15_t *pState) {\n  q63_t sum; /* Accumulator */\n\n#if defined(ARM_MATH_DSP) /* != CM0 */\n\n  q15_t *pSrcBT = pState;     /* Input data matrix pointer for transpose */\n  q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */\n  q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */\n  q15_t *px;                  /* Temporary output data matrix pointer */\n  uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */\n  uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */\n  uint16_t numRowsB = pSrcB->numRows; /* Number of rows of input matrix A */\n  uint32_t col, i = 0U, row = numRowsB, colCnt; /* Loop counters */\n  arm_status status; /* Status of matrix multiplication */\n\n  q31_t in; /* Temporary variable to hold the input value */\n  q31_t inA1, inB1, inA2, inB2;\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Matrix transpose */\n    do {\n      /* The pointer px is set to starting address of column being processed */\n      px = pSrcBT + i;\n\n      /* Apply loop unrolling and exchange columns with row elements */\n      col = numColsB >> 2U;\n\n      /* First part of the processing with loop unrolling.  Compute 4 outputs at\n       *a time.\n       ** a second loop below computes the remaining 1 to 3 samples. */\n      while (col > 0U) {\n        /* Read two elements from row */\n        in = read_q15x2_ia((q15_t **)&pInB);\n\n        /* Unpack and store one element in destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *px = (q15_t)in;\n#else\n        *px = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB;\n\n        /* Unpack and store second element in destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *px = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#else\n        *px = (q15_t)in;\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB;\n\n        /* Read two elements from row */\n        in = read_q15x2_ia((q15_t **)&pInB);\n\n        /* Unpack and store one element in destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *px = (q15_t)in;\n#else\n        *px = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n        px += numRowsB;\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        *px = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#else\n        *px = (q15_t)in;\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n        px += numRowsB;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      /* If the columns of pSrcB is not a multiple of 4, compute any remaining\n       *output samples here.\n       ** No loop unrolling is used. */\n      col = numColsB % 0x4U;\n\n      while (col > 0U) {\n        /* Read and store input element in destination */\n        *px = *pInB++;\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += numRowsB;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      i++;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n    /* Reset variables for usage in following multiplication process */\n    row = numRowsA;\n    i = 0U;\n    px = pDst->pData;\n\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    do {\n      /* For every row wise process, column loop counter is to be initiated */\n      col = numColsB;\n\n      /* For every row wise process, pIn2 pointer is set to starting address of\n       * transposed pSrcB data */\n      pInB = pSrcBT;\n\n      /* column loop */\n      do {\n        /* Set variable sum, that acts as accumulator, to zero */\n        sum = 0;\n\n        /* Initiate pointer pInA to point to starting address of column being\n         * processed */\n        pInA = pSrcA->pData + i;\n\n        /* Apply loop unrolling and compute 2 MACs simultaneously. */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          /* read real and imag values from pSrcA and pSrcB buffer */\n          inA1 = read_q15x2_ia((q15_t **)&pInA);\n          inB1 = read_q15x2_ia((q15_t **)&pInB);\n\n          inA2 = read_q15x2_ia((q15_t **)&pInA);\n          inB2 = read_q15x2_ia((q15_t **)&pInB);\n\n          /* Multiply and Accumlates */\n          sum = __SMLALD(inA1, inB1, sum);\n          sum = __SMLALD(inA2, inB2, sum);\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* process remaining column samples */\n        colCnt = numColsA % 0x4U;\n\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n          sum += *pInA++ * *pInB++;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Saturate and store result in destination buffer */\n        *px = (q15_t)(__SSAT((sum >> 15), 16));\n        px++;\n\n        /* Decrement column loop counter */\n        col--;\n\n      } while (col > 0U);\n\n      i = i + numColsA;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  q15_t *pIn1 = pSrcA->pData; /* Input data matrix pointer A */\n  q15_t *pIn2 = pSrcB->pData; /* Input data matrix pointer B */\n  q15_t *pInA = pSrcA->pData; /* Input data matrix pointer A of Q15 type */\n  q15_t *pInB = pSrcB->pData; /* Input data matrix pointer B of Q15 type */\n  q15_t *pOut = pDst->pData;  /* Output data matrix pointer */\n  q15_t *px;                  /* Temporary output data matrix pointer */\n  uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */\n  uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A    */\n  uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */\n  arm_status status; /* Status of matrix multiplication */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    do {\n      /* Output pointer is set to starting address of the row being processed */\n      px = pOut + i;\n\n      /* For every row wise process, column loop counter is to be initiated */\n      col = numColsB;\n\n      /* For every row wise process, pIn2 pointer is set to starting address of\n       * pSrcB data */\n      pIn2 = pSrcB->pData;\n\n      /* column loop */\n      do {\n        /* Set the variable sum, that acts as accumulator, to zero */\n        sum = 0;\n\n        /* Initiate pointer pIn1 to point to starting address of pSrcA */\n        pIn1 = pInA;\n\n        /* Matrix A columns number of MAC operations are to be performed */\n        colCnt = numColsA;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          /* Perform multiply-accumulates */\n          sum += (q31_t)*pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Convert result from 34.30 to 1.15 format and store saturated value in\n         * destination buffer */\n\n        /* Saturate and store result in destination buffer */\n        *px++ = (q15_t)__SSAT((sum >> 15), 16);\n\n        /* Decrement column loop counter */\n        col--;\n\n        /* Update pointer pIn2 to point to starting address of next column */\n        pIn2 = pInB + (numColsB - col);\n\n      } while (col > 0U);\n\n      /* Update pointer pSrcA to point to starting address of next row */\n      i = i + numColsB;\n      pInA = pInA + numColsA;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_mult_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_mult_q31.c\n * Description:  Q31 matrix multiplication\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixMult\n  @{\n */\n\n/**\n  @brief         Q31 matrix multiplication.\n  @param[in]     pSrcA      points to the first input matrix structure\n  @param[in]     pSrcB      points to the second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The accumulator has a 2.62 format and maintains full precision of\n  the intermediate multiplication results but provides only a single guard bit.\n  There is no saturation on intermediate additions. Thus, if the accumulator\n  overflows it wraps around and distorts the result. The input signals should be\n  scaled down to avoid intermediate overflows. The input is thus scaled down by\n  log2(numColsA) bits to avoid overflows, as a total of numColsA additions are\n  performed internally. The 2.62 accumulator is right shifted by 31 bits and\n  saturated to 1.31 format to yield the final result.\n  @remark\n                   Refer to \\ref arm_mat_mult_fast_q31() for a faster but less\n  precise implementation of this function.\n */\n\narm_status arm_mat_mult_q31(const arm_matrix_instance_q31 *pSrcA,\n                            const arm_matrix_instance_q31 *pSrcB,\n                            arm_matrix_instance_q31 *pDst) {\n  q31_t *pIn1 = pSrcA->pData;         /* Input data matrix pointer A */\n  q31_t *pIn2 = pSrcB->pData;         /* Input data matrix pointer B */\n  q31_t *pInA = pSrcA->pData;         /* Input data matrix pointer A */\n  q31_t *pInB = pSrcB->pData;         /* Input data matrix pointer B */\n  q31_t *pOut = pDst->pData;          /* Output data matrix pointer */\n  q31_t *px;                          /* Temporary output data matrix pointer */\n  q63_t sum;                          /* Accumulator */\n  uint16_t numRowsA = pSrcA->numRows; /* Number of rows of input matrix A */\n  uint16_t numColsB = pSrcB->numCols; /* Number of columns of input matrix B */\n  uint16_t numColsA = pSrcA->numCols; /* Number of columns of input matrix A */\n  uint32_t col, i = 0U, row = numRowsA, colCnt; /* Loop counters */\n  arm_status status; /* Status of matrix multiplication */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numCols != pSrcB->numRows) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcB->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* The following loop performs the dot-product of each row in pSrcA with\n     * each column in pSrcB */\n    /* row loop */\n    do {\n      /* Output pointer is set to starting address of row being processed */\n      px = pOut + i;\n\n      /* For every row wise process, column loop counter is to be initiated */\n      col = numColsB;\n\n      /* For every row wise process, pIn2 pointer is set to starting address of\n       * pSrcB data */\n      pIn2 = pSrcB->pData;\n\n      /* column loop */\n      do {\n        /* Set the variable sum, that acts as accumulator, to zero */\n        sum = 0;\n\n        /* Initialize pointer pIn1 to point to starting address of column being\n         * processed */\n        pIn1 = pInA;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n        /* Loop unrolling: Compute 4 MACs at a time. */\n        colCnt = numColsA >> 2U;\n\n        /* matrix multiplication */\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          /* Perform the multiply-accumulates */\n          sum += (q63_t)*pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          sum += (q63_t)*pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          sum += (q63_t)*pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          sum += (q63_t)*pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Loop unrolling: Compute remaining MACs */\n        colCnt = numColsA % 0x4U;\n\n#else\n\n        /* Initialize cntCnt with number of columns */\n        colCnt = numColsA;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n        while (colCnt > 0U) {\n          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n)\n           */\n\n          /* Perform the multiply-accumulates */\n          sum += (q63_t)*pIn1++ * *pIn2;\n          pIn2 += numColsB;\n\n          /* Decrement loop counter */\n          colCnt--;\n        }\n\n        /* Convert result from 2.62 to 1.31 format and store in destination\n         * buffer */\n        *px++ = (q31_t)(sum >> 31);\n\n        /* Decrement column loop counter */\n        col--;\n\n        /* Update pointer pIn2 to point to starting address of next column */\n        pIn2 = pInB + (numColsB - col);\n\n      } while (col > 0U);\n\n      /* Update pointer pInA to point to starting address of next row */\n      i = i + numColsB;\n      pInA = pInA + numColsA;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U);\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixMult group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_scale_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_scale_f32.c\n * Description:  Multiplies a floating-point matrix by a scalar\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup MatrixScale Matrix Scale\n\n  Multiplies a matrix by a scalar.  This is accomplished by multiplying each\n  element in the matrix by the scalar.  For example: \\image html MatrixScale.gif\n  \"Matrix Scaling of a 3 x 3 matrix\"\n\n  The function checks to make sure that the input and output matrices are of the\n  same size.\n\n  In the fixed-point Q15 and Q31 functions, scale is represented by\n  a fractional multiplication scaleFract and an arithmetic shift\n  shift. The shift allows the gain of the scaling operation to\n  exceed 1.0. The overall scale factor applied to the fixed-point data is 
\n      scale = scaleFract * 2^shift.\n  
\n */\n\n/**\n  @addtogroup MatrixScale\n  @{\n */\n\n/**\n  @brief         Floating-point matrix scaling.\n  @param[in]     pSrc       points to input matrix\n  @param[in]     scale      scale factor to be applied\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n */\n\narm_status arm_mat_scale_f32(const arm_matrix_instance_f32 *pSrc,\n                             float32_t scale, arm_matrix_instance_f32 *pDst) {\n  float32_t *pIn = pSrc->pData;  /* Input data matrix pointer */\n  float32_t *pOut = pDst->pData; /* Output data matrix pointer */\n  uint32_t numSamples;           /* Total number of elements in the matrix */\n  uint32_t blkCnt;               /* Loop counters */\n  arm_status status;             /* Status of matrix scaling */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrc->numRows * pSrc->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) * scale */\n\n      /* Scale and store result in destination buffer. */\n      *pOut++ = (*pIn++) * scale;\n      *pOut++ = (*pIn++) * scale;\n      *pOut++ = (*pIn++) * scale;\n      *pOut++ = (*pIn++) * scale;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) * scale */\n\n      /* Scale and store result in destination buffer. */\n      *pOut++ = (*pIn++) * scale;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixScale group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_scale_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_scale_q15.c\n * Description:  Multiplies a Q15 matrix by a scalar\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixScale\n  @{\n */\n\n/**\n  @brief         Q15 matrix scaling.\n  @param[in]     pSrc        points to input matrix\n  @param[in]     scaleFract  fractional portion of the scale factor\n  @param[in]     shift       number of bits to shift the result by\n  @param[out]    pDst        points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The input data *pSrc and scaleFract\n  are in 1.15 format. These are multiplied to yield a 2.30 intermediate result\n  and this is shifted with saturation to 1.15 format.\n */\n\narm_status arm_mat_scale_q15(const arm_matrix_instance_q15 *pSrc,\n                             q15_t scaleFract, int32_t shift,\n                             arm_matrix_instance_q15 *pDst) {\n  q15_t *pIn = pSrc->pData;    /* Input data matrix pointer */\n  q15_t *pOut = pDst->pData;   /* Output data matrix pointer */\n  uint32_t numSamples;         /* Total number of elements in the matrix */\n  uint32_t blkCnt;             /* Loop counter */\n  arm_status status;           /* Status of matrix scaling */\n  int32_t kShift = 15 - shift; /* Total shift to apply after scaling */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t inA1, inA2;\n  q31_t out1, out2, out3, out4; /* Temporary output variables */\n  q15_t in1, in2, in3, in4;     /* Temporary input variables */\n#endif\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrc->numRows * pSrc->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) * k */\n\n#if defined(ARM_MATH_DSP)\n      /* read 2 times 2 samples at a time from source */\n      inA1 = read_q15x2_ia((q15_t **)&pIn);\n      inA2 = read_q15x2_ia((q15_t **)&pIn);\n\n      /* Scale inputs and store result in temporary variables\n       * in single cycle by packing the outputs */\n      out1 = (q31_t)((q15_t)(inA1 >> 16) * scaleFract);\n      out2 = (q31_t)((q15_t)(inA1)*scaleFract);\n      out3 = (q31_t)((q15_t)(inA2 >> 16) * scaleFract);\n      out4 = (q31_t)((q15_t)(inA2)*scaleFract);\n\n      /* apply shifting */\n      out1 = out1 >> kShift;\n      out2 = out2 >> kShift;\n      out3 = out3 >> kShift;\n      out4 = out4 >> kShift;\n\n      /* saturate the output */\n      in1 = (q15_t)(__SSAT(out1, 16));\n      in2 = (q15_t)(__SSAT(out2, 16));\n      in3 = (q15_t)(__SSAT(out3, 16));\n      in4 = (q15_t)(__SSAT(out4, 16));\n\n      /* store result to destination */\n      write_q15x2_ia(&pOut, __PKHBT(in2, in1, 16));\n      write_q15x2_ia(&pOut, __PKHBT(in4, in3, 16));\n\n#else\n      *pOut++ = (q15_t)(__SSAT(((q31_t)(*pIn++) * scaleFract) >> kShift, 16));\n      *pOut++ = (q15_t)(__SSAT(((q31_t)(*pIn++) * scaleFract) >> kShift, 16));\n      *pOut++ = (q15_t)(__SSAT(((q31_t)(*pIn++) * scaleFract) >> kShift, 16));\n      *pOut++ = (q15_t)(__SSAT(((q31_t)(*pIn++) * scaleFract) >> kShift, 16));\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) * k */\n\n      /* Scale, saturate and store result in destination buffer. */\n      *pOut++ = (q15_t)(__SSAT(((q31_t)(*pIn++) * scaleFract) >> kShift, 16));\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixScale group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_scale_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_scale_q31.c\n * Description:  Multiplies a Q31 matrix by a scalar\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixScale\n  @{\n */\n\n/**\n  @brief         Q31 matrix scaling.\n  @param[in]     pSrc        points to input matrix\n  @param[in]     scaleFract  fractional portion of the scale factor\n  @param[in]     shift       number of bits to shift the result by\n  @param[out]    pDst        points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The input data *pSrc and scaleFract\n  are in 1.31 format. These are multiplied to yield a 2.62 intermediate result\n  which is shifted with saturation to 1.31 format.\n */\n\narm_status arm_mat_scale_q31(const arm_matrix_instance_q31 *pSrc,\n                             q31_t scaleFract, int32_t shift,\n                             arm_matrix_instance_q31 *pDst) {\n  q31_t *pIn = pSrc->pData;   /* Input data matrix pointer */\n  q31_t *pOut = pDst->pData;  /* Output data matrix pointer */\n  uint32_t numSamples;        /* Total number of elements in the matrix */\n  uint32_t blkCnt;            /* Loop counter */\n  arm_status status;          /* Status of matrix scaling */\n  int32_t kShift = shift + 1; /* Shift to apply after scaling */\n  q31_t in, out;              /* Temporary variabels */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrc->numRows * pSrc->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) * k */\n\n      /* Scale, saturate and store result in destination buffer. */\n      in = *pIn++; /* read four inputs from source */\n      in =\n          ((q63_t)in * scaleFract) >> 32; /* multiply input with scaler value */\n      out = in << kShift;                 /* apply shifting */\n      if (in != (out >> kShift))          /* saturate the results. */\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pOut++ = out; /* Store result destination */\n\n      in = *pIn++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in << kShift;\n      if (in != (out >> kShift))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pOut++ = out;\n\n      in = *pIn++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in << kShift;\n      if (in != (out >> kShift))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pOut++ = out;\n\n      in = *pIn++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in << kShift;\n      if (in != (out >> kShift))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pOut++ = out;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) * k */\n\n      /* Scale, saturate and store result in destination buffer. */\n      in = *pIn++;\n      in = ((q63_t)in * scaleFract) >> 32;\n      out = in << kShift;\n      if (in != (out >> kShift))\n        out = 0x7FFFFFFF ^ (in >> 31);\n      *pOut++ = out;\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixScale group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_sub_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_sub_f32.c\n * Description:  Floating-point matrix subtraction\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup MatrixSub Matrix Subtraction\n\n  Subtract two matrices.\n  \\image html MatrixSubtraction.gif \"Subraction of two 3 x 3 matrices\"\n\n  The functions check to make sure that\n  pSrcA, pSrcB, and pDst have the same\n  number of rows and columns.\n */\n\n/**\n  @addtogroup MatrixSub\n  @{\n */\n\n/**\n  @brief         Floating-point matrix subtraction.\n  @param[in]     pSrcA      points to the first input matrix structure\n  @param[in]     pSrcB      points to the second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n */\n\narm_status arm_mat_sub_f32(const arm_matrix_instance_f32 *pSrcA,\n                           const arm_matrix_instance_f32 *pSrcB,\n                           arm_matrix_instance_f32 *pDst) {\n  float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */\n  float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */\n  float32_t *pOut = pDst->pData;  /* output data matrix pointer */\n\n  uint32_t numSamples; /* total number of elements in the matrix */\n  uint32_t blkCnt;     /* loop counters */\n  arm_status status;   /* status of matrix subtraction */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numRows != pSrcB->numRows) ||\n      (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcA->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrcA->numRows * pSrcA->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) - B(m,n) */\n\n      /* Subtract and store result in destination buffer. */\n      *pOut++ = (*pInA++) - (*pInB++);\n      *pOut++ = (*pInA++) - (*pInB++);\n      *pOut++ = (*pInA++) - (*pInB++);\n      *pOut++ = (*pInA++) - (*pInB++);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) - B(m,n) */\n\n      /* Subtract and store result in destination buffer. */\n      *pOut++ = (*pInA++) - (*pInB++);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixSub group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_sub_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_sub_q15.c\n * Description:  Q15 Matrix subtraction\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixSub\n  @{\n */\n\n/**\n  @brief         Q15 matrix subtraction.\n  @param[in]     pSrcA      points to the first input matrix structure\n  @param[in]     pSrcB      points to the second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n */\n\narm_status arm_mat_sub_q15(const arm_matrix_instance_q15 *pSrcA,\n                           const arm_matrix_instance_q15 *pSrcB,\n                           arm_matrix_instance_q15 *pDst) {\n  q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */\n  q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */\n  q15_t *pOut = pDst->pData;  /* output data matrix pointer */\n\n  uint32_t numSamples; /* total number of elements in the matrix */\n  uint32_t blkCnt;     /* loop counters  */\n  arm_status status;   /* status of matrix subtraction  */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numRows != pSrcB->numRows) ||\n      (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcA->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrcA->numRows * pSrcA->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) - B(m,n) */\n\n      /* Subtract, Saturate and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n      write_q15x2_ia(&pOut, __QSUB16(read_q15x2_ia((q15_t **)&pInA),\n                                     read_q15x2_ia((q15_t **)&pInB)));\n      write_q15x2_ia(&pOut, __QSUB16(read_q15x2_ia((q15_t **)&pInA),\n                                     read_q15x2_ia((q15_t **)&pInB)));\n#else\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ - *pInB++), 16);\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ - *pInB++), 16);\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ - *pInB++), 16);\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ - *pInB++), 16);\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) - B(m,n) */\n\n      /* Subtract and store result in destination buffer. */\n#if defined(ARM_MATH_DSP)\n      *pOut++ = (q15_t)__QSUB16(*pInA++, *pInB++);\n#else\n      *pOut++ = (q15_t)__SSAT(((q31_t)*pInA++ - *pInB++), 16);\n#endif\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixSub group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_sub_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_sub_q31.c\n * Description:  Q31 matrix subtraction\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixSub\n  @{\n */\n\n/**\n  @brief         Q31 matrix subtraction.\n  @param[in]     pSrcA      points to the first input matrix structure\n  @param[in]     pSrcB      points to the second input matrix structure\n  @param[out]    pDst       points to output matrix structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range [0x80000000\n  0x7FFFFFFF] are saturated.\n */\n\narm_status arm_mat_sub_q31(const arm_matrix_instance_q31 *pSrcA,\n                           const arm_matrix_instance_q31 *pSrcB,\n                           arm_matrix_instance_q31 *pDst) {\n  q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */\n  q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */\n  q31_t *pOut = pDst->pData;  /* output data matrix pointer */\n\n  uint32_t numSamples; /* total number of elements in the matrix */\n  uint32_t blkCnt;     /* loop counters */\n  arm_status status;   /* status of matrix subtraction */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrcA->numRows != pSrcB->numRows) ||\n      (pSrcA->numCols != pSrcB->numCols) || (pSrcA->numRows != pDst->numRows) ||\n      (pSrcA->numCols != pDst->numCols)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Total number of samples in input matrix */\n    numSamples = (uint32_t)pSrcA->numRows * pSrcA->numCols;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n    /* Loop unrolling: Compute 4 outputs at a time */\n    blkCnt = numSamples >> 2U;\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) - B(m,n) */\n\n      /* Subtract, saturate and then store the results in the destination\n       * buffer. */\n      *pOut++ = __QSUB(*pInA++, *pInB++);\n\n      *pOut++ = __QSUB(*pInA++, *pInB++);\n\n      *pOut++ = __QSUB(*pInA++, *pInB++);\n\n      *pOut++ = __QSUB(*pInA++, *pInB++);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Loop unrolling: Compute remaining outputs */\n    blkCnt = numSamples % 0x4U;\n\n#else\n\n    /* Initialize blkCnt with number of samples */\n    blkCnt = numSamples;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n    while (blkCnt > 0U) {\n      /* C(m,n) = A(m,n) - B(m,n) */\n\n      /* Subtract, saturate and store result in destination buffer. */\n      *pOut++ = __QSUB(*pInA++, *pInB++);\n\n      /* Decrement loop counter */\n      blkCnt--;\n    }\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixSub group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_trans_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_trans_f32.c\n * Description:  Floating-point matrix transpose\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @defgroup MatrixTrans Matrix Transpose\n\n  Tranposes a matrix.\n\n  Transposing an M x N matrix flips it around the center diagonal\n  and results in an N x M matrix. \\image html MatrixTranspose.gif\n  \"Transpose of a 3 x 3 matrix\"\n */\n\n/**\n  @addtogroup MatrixTrans\n  @{\n */\n\n/**\n  @brief         Floating-point matrix transpose.\n  @param[in]     pSrc      points to input matrix\n  @param[out]    pDst      points to output matrix\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n */\n\narm_status arm_mat_trans_f32(const arm_matrix_instance_f32 *pSrc,\n                             arm_matrix_instance_f32 *pDst) {\n  float32_t *pIn = pSrc->pData;      /* input data matrix pointer */\n  float32_t *pOut = pDst->pData;     /* output data matrix pointer */\n  float32_t *px;                     /* Temporary output data matrix pointer */\n  uint16_t nRows = pSrc->numRows;    /* number of rows */\n  uint16_t nCols = pSrc->numCols;    /* number of columns */\n  uint32_t col, row = nRows, i = 0U; /* Loop counters */\n  arm_status status;                 /* status of matrix transpose */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Matrix transpose by exchanging the rows with columns */\n    /* row loop */\n    do {\n      /* Pointer px is set to starting address of column being processed */\n      px = pOut + i;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      col = nCols >> 2U;\n\n      while (col > 0U) /* column loop */\n      {\n        /* Read and store input element in destination */\n        *px = *pIn++;\n        /* Update pointer px to point to next row of transposed matrix */\n        px += nRows;\n\n        *px = *pIn++;\n        px += nRows;\n\n        *px = *pIn++;\n        px += nRows;\n\n        *px = *pIn++;\n        px += nRows;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      col = nCols % 0x4U;\n\n#else\n\n      /* Initialize col with number of samples */\n      col = nCols;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (col > 0U) {\n        /* Read and store input element in destination */\n        *px = *pIn++;\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += nRows;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      i++;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U); /* row loop end */\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixTrans group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_trans_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_trans_q15.c\n * Description:  Q15 matrix transpose\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixTrans\n  @{\n */\n\n/**\n  @brief         Q15 matrix transpose.\n  @param[in]     pSrc      points to input matrix\n  @param[out]    pDst      points to output matrix\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n */\n\narm_status arm_mat_trans_q15(const arm_matrix_instance_q15 *pSrc,\n                             arm_matrix_instance_q15 *pDst) {\n  q15_t *pIn = pSrc->pData;          /* input data matrix pointer */\n  q15_t *pOut = pDst->pData;         /* output data matrix pointer */\n  uint16_t nRows = pSrc->numRows;    /* number of rows */\n  uint16_t nCols = pSrc->numCols;    /* number of columns */\n  uint32_t col, row = nRows, i = 0U; /* Loop counters */\n  arm_status status;                 /* status of matrix transpose */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t in; /* variable to hold temporary output  */\n#endif\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Matrix transpose by exchanging the rows with columns */\n    /* row loop */\n    do {\n      /* Pointer pOut is set to starting address of column being processed */\n      pOut = pDst->pData + i;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      col = nCols >> 2U;\n\n      while (col > 0U) /* column loop */\n      {\n        /* Read two elements from row */\n        in = read_q15x2_ia((q15_t **)&pIn);\n\n        /* Unpack and store one element in  destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *pOut = (q15_t)in;\n#else\n        *pOut = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* Update pointer pOut to point to next row of transposed matrix */\n        pOut += nRows;\n\n        /* Unpack and store second element in destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *pOut = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#else\n        *pOut = (q15_t)in;\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* Update  pointer pOut to point to next row of transposed matrix */\n        pOut += nRows;\n\n        /* Read two elements from row */\n        in = read_q15x2_ia((q15_t **)&pIn);\n\n        /* Unpack and store one element in destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *pOut = (q15_t)in;\n#else\n        *pOut = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* Update pointer pOut to point to next row of transposed matrix */\n        pOut += nRows;\n\n        /* Unpack and store second element in destination */\n#ifndef ARM_MATH_BIG_ENDIAN\n        *pOut = (q15_t)((in & (q31_t)0xffff0000) >> 16);\n#else\n        *pOut = (q15_t)in;\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* Update pointer pOut to point to next row of transposed matrix */\n        pOut += nRows;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      col = nCols % 0x4U;\n\n#else\n\n      /* Initialize col with number of samples */\n      col = nCols;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (col > 0U) {\n        /* Read and store input element in destination */\n        *pOut = *pIn++;\n\n        /* Update pointer pOut to point to next row of transposed matrix */\n        pOut += nRows;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      i++;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U); /* row loop end */\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixTrans group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/MatrixFunctions/arm_mat_trans_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mat_trans_q31.c\n * Description:  Q31 matrix transpose\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupMatrix\n */\n\n/**\n  @addtogroup MatrixTrans\n  @{\n */\n\n/**\n  @brief         Q31 matrix transpose.\n  @param[in]     pSrc      points to input matrix\n  @param[out]    pDst      points to output matrix\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS       : Operation successful\n                   - \\ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed\n */\n\narm_status arm_mat_trans_q31(const arm_matrix_instance_q31 *pSrc,\n                             arm_matrix_instance_q31 *pDst) {\n  q31_t *pIn = pSrc->pData;          /* input data matrix pointer */\n  q31_t *pOut = pDst->pData;         /* output data matrix pointer */\n  q31_t *px;                         /* Temporary output data matrix pointer */\n  uint16_t nRows = pSrc->numRows;    /* number of rows */\n  uint16_t nCols = pSrc->numCols;    /* number of columns */\n  uint32_t col, row = nRows, i = 0U; /* Loop counters */\n  arm_status status;                 /* status of matrix transpose */\n\n#ifdef ARM_MATH_MATRIX_CHECK\n\n  /* Check for matrix mismatch condition */\n  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) {\n    /* Set status as ARM_MATH_SIZE_MISMATCH */\n    status = ARM_MATH_SIZE_MISMATCH;\n  } else\n\n#endif /* #ifdef ARM_MATH_MATRIX_CHECK */\n\n  {\n    /* Matrix transpose by exchanging the rows with columns */\n    /* row loop */\n    do {\n      /* Pointer px is set to starting address of column being processed */\n      px = pOut + i;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n      /* Loop unrolling: Compute 4 outputs at a time */\n      col = nCols >> 2U;\n\n      while (col > 0U) /* column loop */\n      {\n        /* Read and store input element in destination */\n        *px = *pIn++;\n        /* Update pointer px to point to next row of transposed matrix */\n        px += nRows;\n\n        *px = *pIn++;\n        px += nRows;\n\n        *px = *pIn++;\n        px += nRows;\n\n        *px = *pIn++;\n        px += nRows;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      /* Loop unrolling: Compute remaining outputs */\n      col = nCols % 0x4U;\n\n#else\n\n      /* Initialize col with number of samples */\n      col = nCols;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n      while (col > 0U) {\n        /* Read and store input element in destination */\n        *px = *pIn++;\n\n        /* Update pointer px to point to next row of transposed matrix */\n        px += nRows;\n\n        /* Decrement column loop counter */\n        col--;\n      }\n\n      i++;\n\n      /* Decrement row loop counter */\n      row--;\n\n    } while (row > 0U); /* row loop end */\n\n    /* Set status as ARM_MATH_SUCCESS */\n    status = ARM_MATH_SUCCESS;\n  }\n\n  /* Return to application */\n  return (status);\n}\n\n/**\n  @} end of MatrixTrans group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/StatisticsFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        StatisticsFunctions.c\n * Description:  Combination of all statistics function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_max_f32.c\"\n#include \"arm_max_q15.c\"\n#include \"arm_max_q31.c\"\n#include \"arm_max_q7.c\"\n#include \"arm_mean_f32.c\"\n#include \"arm_mean_q15.c\"\n#include \"arm_mean_q31.c\"\n#include \"arm_mean_q7.c\"\n#include \"arm_min_f32.c\"\n#include \"arm_min_q15.c\"\n#include \"arm_min_q31.c\"\n#include \"arm_min_q7.c\"\n#include \"arm_power_f32.c\"\n#include \"arm_power_q15.c\"\n#include \"arm_power_q31.c\"\n#include \"arm_power_q7.c\"\n#include \"arm_rms_f32.c\"\n#include \"arm_rms_q15.c\"\n#include \"arm_rms_q31.c\"\n#include \"arm_std_f32.c\"\n#include \"arm_std_q15.c\"\n#include \"arm_std_q31.c\"\n#include \"arm_var_f32.c\"\n#include \"arm_var_q15.c\"\n#include \"arm_var_q31.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_max_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_max_f32.c\n * Description:  Maximum value of a floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @defgroup Max Maximum\n\n  Computes the maximum value of an array of data.\n  The function returns both the maximum value and its position within the array.\n  There are separate functions for floating-point, Q31, Q15, and Q7 data types.\n */\n\n/**\n  @addtogroup Max\n  @{\n */\n\n/**\n  @brief         Maximum value of a floating-point vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    maximum value returned here\n  @param[out]    pIndex     index of maximum value returned here\n  @return        none\n */\n\nvoid arm_max_f32(const float32_t *pSrc, uint32_t blockSize, float32_t *pResult,\n                 uint32_t *pIndex) {\n  float32_t maxVal, out; /* Temporary variables to store the output value. */\n  uint32_t blkCnt, outIndex; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  uint32_t index; /* index of maximum value */\n#endif\n\n  /* Initialise index value to zero. */\n  outIndex = 0U;\n  /* Load first input value that act as reference value for comparision */\n  out = *pSrc++;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  /* Initialise index of maximum value. */\n  index = 0U;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (blockSize - 1U) >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Initialize maxVal to next consecutive values one by one */\n    maxVal = *pSrc++;\n\n    /* compare for the maximum value */\n    if (out < maxVal) {\n      /* Update the maximum value and it's index */\n      out = maxVal;\n      outIndex = index + 1U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 2U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 3U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 4U;\n    }\n\n    index += 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (blockSize - 1U) % 4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (blockSize - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Initialize maxVal to the next consecutive values one by one */\n    maxVal = *pSrc++;\n\n    /* compare for the maximum value */\n    if (out < maxVal) {\n      /* Update the maximum value and it's index */\n      out = maxVal;\n      outIndex = blockSize - blkCnt;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store the maximum value and it's index into destination pointers */\n  *pResult = out;\n  *pIndex = outIndex;\n}\n\n/**\n  @} end of Max group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_max_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_max_q15.c\n * Description:  Maximum value of a Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup Max\n  @{\n */\n\n/**\n  @brief         Maximum value of a Q15 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    maximum value returned here\n  @param[out]    pIndex     index of maximum value returned here\n  @return        none\n */\n\nvoid arm_max_q15(const q15_t *pSrc, uint32_t blockSize, q15_t *pResult,\n                 uint32_t *pIndex) {\n  q15_t maxVal, out; /* Temporary variables to store the output value. */\n  uint32_t blkCnt, outIndex; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  uint32_t index; /* index of maximum value */\n#endif\n\n  /* Initialise index value to zero. */\n  outIndex = 0U;\n  /* Load first input value that act as reference value for comparision */\n  out = *pSrc++;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  /* Initialise index of maximum value. */\n  index = 0U;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (blockSize - 1U) >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Initialize maxVal to next consecutive values one by one */\n    maxVal = *pSrc++;\n\n    /* compare for the maximum value */\n    if (out < maxVal) {\n      /* Update the maximum value and it's index */\n      out = maxVal;\n      outIndex = index + 1U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 2U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 3U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 4U;\n    }\n\n    index += 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (blockSize - 1U) % 4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (blockSize - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Initialize maxVal to the next consecutive values one by one */\n    maxVal = *pSrc++;\n\n    /* compare for the maximum value */\n    if (out < maxVal) {\n      /* Update the maximum value and it's index */\n      out = maxVal;\n      outIndex = blockSize - blkCnt;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store the maximum value and it's index into destination pointers */\n  *pResult = out;\n  *pIndex = outIndex;\n}\n\n/**\n  @} end of Max group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_max_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_max_q31.c\n * Description:  Maximum value of a Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup Max\n  @{\n */\n\n/**\n  @brief         Maximum value of a Q31 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    maximum value returned here\n  @param[out]    pIndex     index of maximum value returned here\n  @return        none\n */\n\nvoid arm_max_q31(const q31_t *pSrc, uint32_t blockSize, q31_t *pResult,\n                 uint32_t *pIndex) {\n  q31_t maxVal, out; /* Temporary variables to store the output value. */\n  uint32_t blkCnt, outIndex; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  uint32_t index; /* index of maximum value */\n#endif\n\n  /* Initialise index value to zero. */\n  outIndex = 0U;\n  /* Load first input value that act as reference value for comparision */\n  out = *pSrc++;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  /* Initialise index of maximum value. */\n  index = 0U;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (blockSize - 1U) >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Initialize maxVal to next consecutive values one by one */\n    maxVal = *pSrc++;\n\n    /* compare for the maximum value */\n    if (out < maxVal) {\n      /* Update the maximum value and it's index */\n      out = maxVal;\n      outIndex = index + 1U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 2U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 3U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 4U;\n    }\n\n    index += 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (blockSize - 1U) % 4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (blockSize - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Initialize maxVal to the next consecutive values one by one */\n    maxVal = *pSrc++;\n\n    /* compare for the maximum value */\n    if (out < maxVal) {\n      /* Update the maximum value and it's index */\n      out = maxVal;\n      outIndex = blockSize - blkCnt;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store the maximum value and it's index into destination pointers */\n  *pResult = out;\n  *pIndex = outIndex;\n}\n\n/**\n  @} end of Max group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_max_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_max_q7.c\n * Description:  Maximum value of a Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup Max\n  @{\n */\n\n/**\n  @brief         Maximum value of a Q7 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    maximum value returned here\n  @param[out]    pIndex     index of maximum value returned here\n  @return        none\n */\n\nvoid arm_max_q7(const q7_t *pSrc, uint32_t blockSize, q7_t *pResult,\n                uint32_t *pIndex) {\n  q7_t maxVal, out; /* Temporary variables to store the output value. */\n  uint32_t blkCnt, outIndex; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  uint32_t index; /* index of maximum value */\n#endif\n\n  /* Initialise index value to zero. */\n  outIndex = 0U;\n  /* Load first input value that act as reference value for comparision */\n  out = *pSrc++;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  /* Initialise index of maximum value. */\n  index = 0U;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (blockSize - 1U) >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Initialize maxVal to next consecutive values one by one */\n    maxVal = *pSrc++;\n\n    /* compare for the maximum value */\n    if (out < maxVal) {\n      /* Update the maximum value and it's index */\n      out = maxVal;\n      outIndex = index + 1U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 2U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 3U;\n    }\n\n    maxVal = *pSrc++;\n    if (out < maxVal) {\n      out = maxVal;\n      outIndex = index + 4U;\n    }\n\n    index += 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (blockSize - 1U) % 4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (blockSize - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Initialize maxVal to the next consecutive values one by one */\n    maxVal = *pSrc++;\n\n    /* compare for the maximum value */\n    if (out < maxVal) {\n      /* Update the maximum value and it's index */\n      out = maxVal;\n      outIndex = blockSize - blkCnt;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store the maximum value and it's index into destination pointers */\n  *pResult = out;\n  *pIndex = outIndex;\n}\n\n/**\n  @} end of Max group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_mean_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mean_f32.c\n * Description:  Mean value of a floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @defgroup mean Mean\n\n  Calculates the mean of the input vector. Mean is defined as the average of the\n  elements in the vector. The underlying algorithm is used:\n\n  
\n      Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) /\n  blockSize;\n  
\n\n  There are separate functions for floating-point, Q31, Q15, and Q7 data types.\n */\n\n/**\n  @addtogroup mean\n  @{\n */\n\n/**\n  @brief         Mean value of a floating-point vector.\n  @param[in]     pSrc       points to the input vector.\n  @param[in]     blockSize  number of samples in input vector.\n  @param[out]    pResult    mean value returned here.\n  @return        none\n */\n\nvoid arm_mean_f32(const float32_t *pSrc, uint32_t blockSize,\n                  float32_t *pResult) {\n  uint32_t blkCnt;      /* Loop counter */\n  float32_t sum = 0.0f; /* Temporary result storage */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n    sum += *pSrc++;\n\n    sum += *pSrc++;\n\n    sum += *pSrc++;\n\n    sum += *pSrc++;\n\n    /* Decrement the loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n    sum += *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */\n  /* Store result to destination */\n  *pResult = (sum / blockSize);\n}\n\n/**\n  @} end of mean group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_mean_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mean_q15.c\n * Description:  Mean value of a Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup mean\n  @{\n */\n\n/**\n  @brief         Mean value of a Q15 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    mean value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n  accumulator. The input is represented in 1.15 format and is accumulated in a\n  32-bit accumulator in 17.15 format. There is no risk of internal overflow with\n  this approach, and the full precision of intermediate result is preserved.\n                   Finally, the accumulator is truncated to yield a result\n  of 1.15 format.\n */\n\nvoid arm_mean_q15(const q15_t *pSrc, uint32_t blockSize, q15_t *pResult) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t sum = 0;   /* Temporary result storage */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t in;\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    sum += ((in << 16U) >> 16U);\n    sum += (in >> 16U);\n\n    in = read_q15x2_ia((q15_t **)&pSrc);\n    sum += ((in << 16U) >> 16U);\n    sum += (in >> 16U);\n\n    /* Decrement the loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n    sum += *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */\n  /* Store result to destination */\n  *pResult = (q15_t)(sum / (int32_t)blockSize);\n}\n\n/**\n  @} end of mean group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_mean_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mean_q31.c\n * Description:  Mean value of a Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup mean\n  @{\n */\n\n/**\n  @brief         Mean value of a Q31 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    mean value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. The input is represented in 1.31 format and is accumulated in a\n  64-bit accumulator in 33.31 format. There is no risk of internal overflow with\n  this approach, and the full precision of intermediate result is preserved.\n                   Finally, the accumulator is truncated to yield a result\n  of 1.31 format.\n */\n\nvoid arm_mean_q31(const q31_t *pSrc, uint32_t blockSize, q31_t *pResult) {\n  uint32_t blkCnt; /* Loop counter */\n  q63_t sum = 0;   /* Temporary result storage */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n    sum += *pSrc++;\n\n    sum += *pSrc++;\n\n    sum += *pSrc++;\n\n    sum += *pSrc++;\n\n    /* Decrement the loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n    sum += *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */\n  /* Store result to destination */\n  *pResult = (q31_t)(sum / blockSize);\n}\n\n/**\n  @} end of mean group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_mean_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_mean_q7.c\n * Description:  Mean value of a Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup mean\n  @{\n */\n\n/**\n  @brief         Mean value of a Q7 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    mean value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n  accumulator. The input is represented in 1.7 format and is accumulated in a\n  32-bit accumulator in 25.7 format. There is no risk of internal overflow with\n  this approach, and the full precision of intermediate result is preserved.\n                   Finally, the accumulator is truncated to yield a result\n  of 1.7 format.\n */\n\nvoid arm_mean_q7(const q7_t *pSrc, uint32_t blockSize, q7_t *pResult) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t sum = 0;   /* Temporary result storage */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t in;\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n    in = read_q7x4_ia((q7_t **)&pSrc);\n    sum += ((in << 24U) >> 24U);\n    sum += ((in << 16U) >> 24U);\n    sum += ((in << 8U) >> 24U);\n    sum += (in >> 24U);\n\n    /* Decrement the loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n    sum += *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */\n  /* Store result to destination */\n  *pResult = (q7_t)(sum / (int32_t)blockSize);\n}\n\n/**\n  @} end of mean group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_min_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_min_f32.c\n * Description:  Minimum value of a floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @defgroup Min Minimum\n\n  Computes the minimum value of an array of data.\n  The function returns both the minimum value and its position within the array.\n  There are separate functions for floating-point, Q31, Q15, and Q7 data types.\n */\n\n/**\n  @addtogroup Min\n  @{\n */\n\n/**\n  @brief         Minimum value of a floating-point vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    minimum value returned here\n  @param[out]    pIndex     index of minimum value returned here\n  @return        none\n */\n\nvoid arm_min_f32(const float32_t *pSrc, uint32_t blockSize, float32_t *pResult,\n                 uint32_t *pIndex) {\n  float32_t minVal, out; /* Temporary variables to store the output value. */\n  uint32_t blkCnt, outIndex; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  uint32_t index; /* index of maximum value */\n#endif\n\n  /* Initialise index value to zero. */\n  outIndex = 0U;\n  /* Load first input value that act as reference value for comparision */\n  out = *pSrc++;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  /* Initialise index of maximum value. */\n  index = 0U;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (blockSize - 1U) >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Initialize minVal to next consecutive values one by one */\n    minVal = *pSrc++;\n\n    /* compare for the minimum value */\n    if (out > minVal) {\n      /* Update the minimum value and it's index */\n      out = minVal;\n      outIndex = index + 1U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 2U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 3U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 4U;\n    }\n\n    index += 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (blockSize - 1U) % 4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (blockSize - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Initialize minVal to the next consecutive values one by one */\n    minVal = *pSrc++;\n\n    /* compare for the minimum value */\n    if (out > minVal) {\n      /* Update the minimum value and it's index */\n      out = minVal;\n      outIndex = blockSize - blkCnt;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store the minimum value and it's index into destination pointers */\n  *pResult = out;\n  *pIndex = outIndex;\n}\n\n/**\n  @} end of Min group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_min_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_min_q15.c\n * Description:  Minimum value of a Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup Min\n  @{\n */\n\n/**\n  @brief         Minimum value of a Q15 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    minimum value returned here\n  @param[out]    pIndex     index of minimum value returned here\n  @return        none\n */\n\nvoid arm_min_q15(const q15_t *pSrc, uint32_t blockSize, q15_t *pResult,\n                 uint32_t *pIndex) {\n  q15_t minVal, out; /* Temporary variables to store the output value. */\n  uint32_t blkCnt, outIndex; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  uint32_t index; /* index of maximum value */\n#endif\n\n  /* Initialise index value to zero. */\n  outIndex = 0U;\n  /* Load first input value that act as reference value for comparision */\n  out = *pSrc++;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  /* Initialise index of maximum value. */\n  index = 0U;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (blockSize - 1U) >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Initialize minVal to next consecutive values one by one */\n    minVal = *pSrc++;\n\n    /* compare for the minimum value */\n    if (out > minVal) {\n      /* Update the minimum value and it's index */\n      out = minVal;\n      outIndex = index + 1U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 2U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 3U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 4U;\n    }\n\n    index += 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (blockSize - 1U) % 4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (blockSize - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Initialize minVal to the next consecutive values one by one */\n    minVal = *pSrc++;\n\n    /* compare for the minimum value */\n    if (out > minVal) {\n      /* Update the minimum value and it's index */\n      out = minVal;\n      outIndex = blockSize - blkCnt;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store the minimum value and it's index into destination pointers */\n  *pResult = out;\n  *pIndex = outIndex;\n}\n\n/**\n  @} end of Min group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_min_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_min_q31.c\n * Description:  Minimum value of a Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup Min\n  @{\n */\n\n/**\n  @brief         Minimum value of a Q31 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    minimum value returned here\n  @param[out]    pIndex     index of minimum value returned here\n  @return        none\n */\n\nvoid arm_min_q31(const q31_t *pSrc, uint32_t blockSize, q31_t *pResult,\n                 uint32_t *pIndex) {\n  q31_t minVal, out; /* Temporary variables to store the output value. */\n  uint32_t blkCnt, outIndex; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  uint32_t index; /* index of maximum value */\n#endif\n\n  /* Initialise index value to zero. */\n  outIndex = 0U;\n  /* Load first input value that act as reference value for comparision */\n  out = *pSrc++;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  /* Initialise index of maximum value. */\n  index = 0U;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (blockSize - 1U) >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Initialize minVal to next consecutive values one by one */\n    minVal = *pSrc++;\n\n    /* compare for the minimum value */\n    if (out > minVal) {\n      /* Update the minimum value and it's index */\n      out = minVal;\n      outIndex = index + 1U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 2U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 3U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 4U;\n    }\n\n    index += 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (blockSize - 1U) % 4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (blockSize - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Initialize minVal to the next consecutive values one by one */\n    minVal = *pSrc++;\n\n    /* compare for the minimum value */\n    if (out > minVal) {\n      /* Update the minimum value and it's index */\n      out = minVal;\n      outIndex = blockSize - blkCnt;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store the minimum value and it's index into destination pointers */\n  *pResult = out;\n  *pIndex = outIndex;\n}\n\n/**\n  @} end of Min group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_min_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_min_q7.c\n * Description:  Minimum value of a Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup Min\n  @{\n */\n\n/**\n  @brief         Minimum value of a Q7 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    minimum value returned here\n  @param[out]    pIndex     index of minimum value returned here\n  @return        none\n */\n\nvoid arm_min_q7(const q7_t *pSrc, uint32_t blockSize, q7_t *pResult,\n                uint32_t *pIndex) {\n  q7_t minVal, out; /* Temporary variables to store the output value. */\n  uint32_t blkCnt, outIndex; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  uint32_t index; /* index of maximum value */\n#endif\n\n  /* Initialise index value to zero. */\n  outIndex = 0U;\n  /* Load first input value that act as reference value for comparision */\n  out = *pSrc++;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  /* Initialise index of maximum value. */\n  index = 0U;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = (blockSize - 1U) >> 2U;\n\n  while (blkCnt > 0U) {\n    /* Initialize minVal to next consecutive values one by one */\n    minVal = *pSrc++;\n\n    /* compare for the minimum value */\n    if (out > minVal) {\n      /* Update the minimum value and it's index */\n      out = minVal;\n      outIndex = index + 1U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 2U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 3U;\n    }\n\n    minVal = *pSrc++;\n    if (out > minVal) {\n      out = minVal;\n      outIndex = index + 4U;\n    }\n\n    index += 4U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = (blockSize - 1U) % 4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = (blockSize - 1U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* Initialize minVal to the next consecutive values one by one */\n    minVal = *pSrc++;\n\n    /* compare for the minimum value */\n    if (out > minVal) {\n      /* Update the minimum value and it's index */\n      out = minVal;\n      outIndex = blockSize - blkCnt;\n    }\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store the minimum value and it's index into destination pointers */\n  *pResult = out;\n  *pIndex = outIndex;\n}\n\n/**\n  @} end of Min group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_power_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_power_f32.c\n * Description:  Sum of the squares of the elements of a floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @defgroup power Power\n\n  Calculates the sum of the squares of the elements in the input vector.\n  The underlying algorithm is used:\n\n  
\n      Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... +\n  pSrc[blockSize-1] * pSrc[blockSize-1];\n  
\n\n  There are separate functions for floating point, Q31, Q15, and Q7 data types.\n */\n\n/**\n  @addtogroup power\n  @{\n */\n\n/**\n  @brief         Sum of the squares of the elements of a floating-point vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    sum of the squares value returned here\n  @return        none\n */\n\nvoid arm_power_f32(const float32_t *pSrc, uint32_t blockSize,\n                   float32_t *pResult) {\n  uint32_t blkCnt;      /* Loop counter */\n  float32_t sum = 0.0f; /* Temporary result storage */\n  float32_t in;         /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute Power and store result in a temporary variable, sum. */\n    in = *pSrc++;\n    sum += in * in;\n\n    in = *pSrc++;\n    sum += in * in;\n\n    in = *pSrc++;\n    sum += in * in;\n\n    in = *pSrc++;\n    sum += in * in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute Power and store result in a temporary variable, sum. */\n    in = *pSrc++;\n    sum += in * in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store result to destination */\n  *pResult = sum;\n}\n\n/**\n  @} end of power group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_power_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_power_q15.c\n * Description:  Sum of the squares of the elements of a Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup power\n  @{\n */\n\n/**\n  @brief         Sum of the squares of the elements of a Q15 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    sum of the squares value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. The input is represented in 1.15 format. Intermediate\n  multiplication yields a 2.30 format, and this result is added without\n  saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the\n  accumulator, there is no risk of overflow, and the full precision of the\n  intermediate multiplication is preserved. Finally, the return result is\n  in 34.30 format.\n */\n\nvoid arm_power_q15(const q15_t *pSrc, uint32_t blockSize, q63_t *pResult) {\n  uint32_t blkCnt; /* Loop counter */\n  q63_t sum = 0;   /* Temporary result storage */\n  q15_t in;        /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in32; /* Temporary variable to store packed input value */\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute Power and store result in a temporary variable, sum. */\n#if defined(ARM_MATH_DSP)\n    in32 = read_q15x2_ia((q15_t **)&pSrc);\n    sum = __SMLALD(in32, in32, sum);\n\n    in32 = read_q15x2_ia((q15_t **)&pSrc);\n    sum = __SMLALD(in32, in32, sum);\n#else\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute Power and store result in a temporary variable, sum. */\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store result in 34.30 format */\n  *pResult = sum;\n}\n\n/**\n  @} end of power group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_power_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_power_q31.c\n * Description:  Sum of the squares of the elements of a Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup power\n  @{\n */\n\n/**\n  @brief         Sum of the squares of the elements of a Q31 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    sum of the squares value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. The input is represented in 1.31 format. Intermediate\n  multiplication yields a 2.62 format, and this result is truncated to 2.48\n  format by discarding the lower 14 bits. The 2.48 result is then added without\n  saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the\n  accumulator, there is no risk of overflow, and the full precision of the\n  intermediate multiplication is preserved. Finally, the return result is\n  in 16.48 format.\n */\n\nvoid arm_power_q31(const q31_t *pSrc, uint32_t blockSize, q63_t *pResult) {\n  uint32_t blkCnt; /* Loop counter */\n  q63_t sum = 0;   /* Temporary result storage */\n  q31_t in;        /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute Power then shift intermediate results by 14 bits to\n     * maintain 16.48 format and store result in a temporary variable sum,\n     * providing 15 guard bits. */\n    in = *pSrc++;\n    sum += ((q63_t)in * in) >> 14U;\n\n    in = *pSrc++;\n    sum += ((q63_t)in * in) >> 14U;\n\n    in = *pSrc++;\n    sum += ((q63_t)in * in) >> 14U;\n\n    in = *pSrc++;\n    sum += ((q63_t)in * in) >> 14U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute Power and store result in a temporary variable, sum. */\n    in = *pSrc++;\n    sum += ((q63_t)in * in) >> 14U;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store results in 16.48 format */\n  *pResult = sum;\n}\n\n/**\n  @} end of power group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_power_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_power_q7.c\n * Description:  Sum of the squares of the elements of a Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup power\n  @{\n */\n\n/**\n  @brief         Sum of the squares of the elements of a Q7 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    sum of the squares value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 32-bit internal\n  accumulator. The input is represented in 1.7 format. Intermediate\n  multiplication yields a 2.14 format, and this result is added without\n  saturation to an accumulator in 18.14 format. With 17 guard bits in the\n  accumulator, there is no risk of overflow, and the full precision of the\n  intermediate multiplication is preserved. Finally, the return result is\n  in 18.14 format.\n */\n\nvoid arm_power_q7(const q7_t *pSrc, uint32_t blockSize, q31_t *pResult) {\n  uint32_t blkCnt; /* Loop counter */\n  q31_t sum = 0;   /* Temporary result storage */\n  q7_t in;         /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in32;     /* Temporary variable to store packed input value */\n  q31_t in1, in2; /* Temporary variables to store input value */\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute Power and store result in a temporary variable, sum. */\n#if defined(ARM_MATH_DSP)\n    in32 = read_q7x4_ia((q7_t **)&pSrc);\n\n    in1 = __SXTB16(__ROR(in32, 8));\n    in2 = __SXTB16(in32);\n\n    /* calculate power and accumulate to accumulator */\n    sum = __SMLAD(in1, in1, sum);\n    sum = __SMLAD(in2, in2, sum);\n#else\n    in = *pSrc++;\n    sum += ((q15_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q15_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q15_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q15_t)in * in);\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute Power and store result in a temporary variable, sum. */\n    in = *pSrc++;\n    sum += ((q15_t)in * in);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Store result in 18.14 format */\n  *pResult = sum;\n}\n\n/**\n  @} end of power group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_rms_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rms_f32.c\n * Description:  Root mean square value of the elements of a floating-point\n * vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @defgroup RMS Root mean square (RMS)\n\n  Calculates the Root Mean Square of the elements in the input vector.\n  The underlying algorithm is used:\n\n  
\n      Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... +\n  pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));\n  
\n\n  There are separate functions for floating point, Q31, and Q15 data types.\n */\n\n/**\n  @addtogroup RMS\n  @{\n */\n\n/**\n  @brief         Root Mean Square of the elements of a floating-point vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    root mean square value returned here\n  @return        none\n */\n\nvoid arm_rms_f32(const float32_t *pSrc, uint32_t blockSize,\n                 float32_t *pResult) {\n  uint32_t blkCnt;      /* Loop counter */\n  float32_t sum = 0.0f; /* Temporary result storage */\n  float32_t in;         /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable, sum. */\n    sum += in * in;\n\n    in = *pSrc++;\n    sum += in * in;\n\n    in = *pSrc++;\n    sum += in * in;\n\n    in = *pSrc++;\n    sum += in * in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable. */\n    sum += (in * in);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Compute Rms and store result in destination */\n  arm_sqrt_f32(sum / (float32_t)blockSize, pResult);\n}\n\n/**\n  @} end of RMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_rms_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rms_q15.c\n * Description:  Root Mean Square of the elements of a Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup RMS\n  @{\n */\n\n/**\n  @brief         Root Mean Square of the elements of a Q15 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    root mean square value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. The input is represented in 1.15 format. Intermediate\n  multiplication yields a 2.30 format, and this result is added without\n  saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the\n  accumulator, there is no risk of overflow, and the full precision of the\n  intermediate multiplication is preserved. Finally, the 34.30 result is\n  truncated to 34.15 format by discarding the lower 15 bits, and then saturated\n  to yield a result in 1.15 format.\n */\n\nvoid arm_rms_q15(const q15_t *pSrc, uint32_t blockSize, q15_t *pResult) {\n  uint32_t blkCnt; /* Loop counter */\n  q63_t sum = 0;   /* Temporary result storage */\n  q15_t in;        /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in32; /* Temporary variable to store input value */\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    /* Compute sum of squares and store result in a temporary variable. */\n#if defined(ARM_MATH_DSP)\n    in32 = read_q15x2_ia((q15_t **)&pSrc);\n    sum = __SMLALD(in32, in32, sum);\n\n    in32 = read_q15x2_ia((q15_t **)&pSrc);\n    sum = __SMLALD(in32, in32, sum);\n#else\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q31_t)in * in);\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable. */\n    sum += ((q31_t)in * in);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Truncating and saturating the accumulator to 1.15 format */\n  /* Store result in destination */\n  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);\n}\n\n/**\n  @} end of RMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_rms_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rms_q31.c\n * Description:  Root Mean Square of the elements of a Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup RMS\n  @{\n */\n\n/**\n  @brief         Root Mean Square of the elements of a Q31 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    root mean square value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The input is represented in 1.31 format, and intermediate\n  multiplication yields a 2.62 format. The accumulator maintains full precision\n  of the intermediate multiplication results, but provides only a single guard\n  bit. There is no saturation on intermediate additions. If the accumulator\n  overflows, it wraps around and distorts the result. In order to avoid\n  overflows completely, the input signal must be scaled down by log2(blockSize)\n  bits, as a total of blockSize additions are performed internally. Finally,\n  the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.\n */\n\nvoid arm_rms_q31(const q31_t *pSrc, uint32_t blockSize, q31_t *pResult) {\n  uint32_t blkCnt;  /* Loop counter */\n  uint64_t sum = 0; /* Temporary result storage (can get never negative. changed\n                       type from q63 to uint64 */\n  q31_t in;         /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable, sum. */\n    sum += ((q63_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q63_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q63_t)in * in);\n\n    in = *pSrc++;\n    sum += ((q63_t)in * in);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable. */\n    sum += ((q63_t)in * in);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */\n  /* Compute Rms and store result in destination vector */\n  arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t)blockSize) >> 31), pResult);\n}\n\n/**\n  @} end of RMS group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_std_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_std_f32.c\n * Description:  Standard deviation of the elements of a floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @defgroup STD Standard deviation\n\n  Calculates the standard deviation of the elements in the input vector.\n  The underlying algorithm is used:\n\n  
\n      Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize -\n  1))\n\n      sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... +\n  pSrc[blockSize-1] * pSrc[blockSize-1] sum = pSrc[0] + pSrc[1] + pSrc[2] + ...\n  + pSrc[blockSize-1]\n  
\n\n  There are separate functions for floating point, Q31, and Q15 data types.\n */\n\n/**\n  @addtogroup STD\n  @{\n */\n\n/**\n  @brief         Standard deviation of the elements of a floating-point vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    standard deviation value returned here\n  @return        none\n */\n\nvoid arm_std_f32(const float32_t *pSrc, uint32_t blockSize,\n                 float32_t *pResult) {\n  uint32_t blkCnt;               /* Loop counter */\n  float32_t sum = 0.0f;          /* Temporary result storage */\n  float32_t sumOfSquares = 0.0f; /* Sum of squares */\n  float32_t in;                  /* Temporary variable to store input value */\n\n#ifndef ARM_MATH_CM0_FAMILY\n  float32_t meanOfSquares, mean, squareOfMean; /* Temporary variables */\n#else\n  float32_t squareOfSum; /* Square of Sum */\n  float32_t var;         /* Temporary varaince storage */\n#endif\n\n  if (blockSize <= 1U) {\n    *pResult = 0;\n    return;\n  }\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    sumOfSquares += in * in;\n    /* Compute sum and store result in a temporary variable, sum. */\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += in * in;\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += in * in;\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += in * in;\n    sum += in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    sumOfSquares += (in * in);\n    /* Compute sum and store result in a temporary variable, sum. */\n    sum += in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n#ifndef ARM_MATH_CM0_FAMILY\n\n  /* Compute Mean of squares and store result in a temporary variable,\n   * meanOfSquares. */\n  meanOfSquares = sumOfSquares / ((float32_t)blockSize - 1.0f);\n\n  /* Compute mean of all input values */\n  mean = sum / (float32_t)blockSize;\n\n  /* Compute square of mean */\n  squareOfMean =\n      (mean * mean) * (((float32_t)blockSize) / ((float32_t)blockSize - 1.0f));\n\n  /* Compute standard deviation and store result to destination */\n  arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);\n\n#else\n\n  /* Compute square of sum */\n  squareOfSum = ((sum * sum) / (float32_t)blockSize);\n\n  /* Compute variance */\n  var = ((sumOfSquares - squareOfSum) / (float32_t)(blockSize - 1.0f));\n\n  /* Compute standard deviation and store result in destination */\n  arm_sqrt_f32(var, pResult);\n\n#endif /* #ifndef ARM_MATH_CM0_FAMILY */\n}\n\n/**\n  @} end of STD group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_std_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_std_q15.c\n * Description:  Standard deviation of an array of Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup STD\n  @{\n */\n\n/**\n  @brief         Standard deviation of the elements of a Q15 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    standard deviation value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. The input is represented in 1.15 format. Intermediate\n  multiplication yields a 2.30 format, and this result is added without\n  saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the\n  accumulator, there is no risk of overflow, and the full precision of the\n  intermediate multiplication is preserved. Finally, the 34.30 result is\n  truncated to 34.15 format by discarding the lower 15 bits, and then saturated\n  to yield a result in 1.15 format.\n */\n\nvoid arm_std_q15(const q15_t *pSrc, uint32_t blockSize, q15_t *pResult) {\n  uint32_t blkCnt;                   /* Loop counter */\n  q31_t sum = 0;                     /* Accumulator */\n  q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */\n  q63_t sumOfSquares = 0;            /* Sum of squares */\n  q15_t in; /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in32; /* Temporary variable to store input value */\n#endif\n\n  if (blockSize <= 1U) {\n    *pResult = 0;\n    return;\n  }\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    /* Compute sum and store result in a temporary variable, sum. */\n#if defined(ARM_MATH_DSP)\n    in32 = read_q15x2_ia((q15_t **)&pSrc);\n    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);\n    sum += ((in32 << 16U) >> 16U);\n    sum += (in32 >> 16U);\n\n    in32 = read_q15x2_ia((q15_t **)&pSrc);\n    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);\n    sum += ((in32 << 16U) >> 16U);\n    sum += (in32 >> 16U);\n#else\n    in = *pSrc++;\n    sumOfSquares += (in * in);\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += (in * in);\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += (in * in);\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += (in * in);\n    sum += in;\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    sumOfSquares += (in * in);\n    /* Compute sum and store result in a temporary variable, sum. */\n    sum += in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Compute Mean of squares and store result in a temporary variable,\n   * meanOfSquares. */\n  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));\n\n  /* Compute square of mean */\n  squareOfMean =\n      (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));\n\n  /* mean of squares minus the square of mean. */\n  /* Compute standard deviation and store result in destination */\n  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult);\n}\n\n/**\n  @} end of STD group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_std_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_std_q31.c\n * Description:  Standard deviation of the elements of a Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup STD\n  @{\n */\n\n/**\n  @brief         Standard deviation of the elements of a Q31 vector.\n  @param[in]     pSrc       points to the input vector.\n  @param[in]     blockSize  number of samples in input vector.\n  @param[out]    pResult    standard deviation value returned here.\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The input is represented in 1.31 format, which is then\n  downshifted by 8 bits which yields 1.23, and intermediate multiplication\n  yields a 2.46 format. The accumulator maintains full precision of the\n  intermediate multiplication results, but provides only a 16 guard bits. There\n  is no saturation on intermediate additions. If the accumulator overflows it\n  wraps around and distorts the result. In order to avoid overflows completely\n  the input signal must be scaled down by log2(blockSize)-8 bits, as a total of\n  blockSize additions are performed internally. After division, internal\n  variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by\n  15 bits to yield a 1.31 format value.\n */\n\nvoid arm_std_q31(const q31_t *pSrc, uint32_t blockSize, q31_t *pResult) {\n  uint32_t blkCnt;                   /* Loop counter */\n  q63_t sum = 0;                     /* Accumulator */\n  q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */\n  q63_t sumOfSquares = 0;            /* Sum of squares */\n  q31_t in; /* Temporary variable to store input value */\n\n  if (blockSize <= 1U) {\n    *pResult = 0;\n    return;\n  }\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    in = *pSrc++ >> 8U;\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    sumOfSquares += ((q63_t)(in) * (in));\n    /* Compute sum and store result in a temporary variable, sum. */\n    sum += in;\n\n    in = *pSrc++ >> 8U;\n    sumOfSquares += ((q63_t)(in) * (in));\n    sum += in;\n\n    in = *pSrc++ >> 8U;\n    sumOfSquares += ((q63_t)(in) * (in));\n    sum += in;\n\n    in = *pSrc++ >> 8U;\n    sumOfSquares += ((q63_t)(in) * (in));\n    sum += in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    in = *pSrc++ >> 8U;\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    sumOfSquares += ((q63_t)(in) * (in));\n    /* Compute sum and store result in a temporary variable, sum. */\n    sum += in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Compute Mean of squares and store result in a temporary variable,\n   * meanOfSquares. */\n  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));\n\n  /* Compute square of mean */\n  squareOfMean = (sum * sum / (q63_t)(blockSize * (blockSize - 1U)));\n\n  /* Compute standard deviation and store result in destination */\n  arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15U, pResult);\n}\n\n/**\n  @} end of STD group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_var_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_var_f32.c\n * Description:  Variance of the elements of a floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @defgroup variance  Variance\n\n  Calculates the variance of the elements in the input vector.\n  The underlying algorithm used is the direct method sometimes referred to as\n  the two-pass method:\n\n  
\n      Result = sum(element - meanOfElements)^2) / numElement - 1\n\n      meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... +\n  pSrc[blockSize-1] ) / blockSize\n  
\n\n  There are separate functions for floating point, Q31, and Q15 data types.\n */\n\n/**\n  @addtogroup variance\n  @{\n */\n\n/**\n  @brief         Variance of the elements of a floating-point vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    variance value returned here\n  @return        none\n */\n\nvoid arm_var_f32(const float32_t *pSrc, uint32_t blockSize,\n                 float32_t *pResult) {\n  uint32_t blkCnt;      /* Loop counter */\n  float32_t sum = 0.0f; /* Temporary result storage */\n  float32_t fSum = 0.0f;\n  float32_t fMean, fValue;\n  const float32_t *pInput = pSrc;\n\n  if (blockSize <= 1U) {\n    *pResult = 0;\n    return;\n  }\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n\n    sum += *pInput++;\n    sum += *pInput++;\n    sum += *pInput++;\n    sum += *pInput++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */\n\n    sum += *pInput++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */\n  fMean = sum / (float32_t)blockSize;\n\n  pInput = pSrc;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    fValue = *pInput++ - fMean;\n    fSum += fValue * fValue;\n\n    fValue = *pInput++ - fMean;\n    fSum += fValue * fValue;\n\n    fValue = *pInput++ - fMean;\n    fSum += fValue * fValue;\n\n    fValue = *pInput++ - fMean;\n    fSum += fValue * fValue;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    fValue = *pInput++ - fMean;\n    fSum += fValue * fValue;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Variance */\n  *pResult = fSum / (float32_t)(blockSize - 1.0f);\n}\n\n/**\n  @} end of variance group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_var_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_var_q15.c\n * Description:  Variance of an array of Q15 type\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup variance\n  @{\n */\n\n/**\n  @brief         Variance of the elements of a Q15 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    variance value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using a 64-bit internal\n  accumulator. The input is represented in 1.15 format. Intermediate\n  multiplication yields a 2.30 format, and this result is added without\n  saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the\n  accumulator, there is no risk of overflow, and the full precision of the\n  intermediate multiplication is preserved. Finally, the 34.30 result is\n  truncated to 34.15 format by discarding the lower 15 bits, and then saturated\n  to yield a result in 1.15 format.\n */\n\nvoid arm_var_q15(const q15_t *pSrc, uint32_t blockSize, q15_t *pResult) {\n  uint32_t blkCnt;                   /* Loop counter */\n  q31_t sum = 0;                     /* Accumulator */\n  q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */\n  q63_t sumOfSquares = 0;            /* Sum of squares */\n  q15_t in; /* Temporary variable to store input value */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in32; /* Temporary variable to store input value */\n#endif\n\n  if (blockSize <= 1U) {\n    *pResult = 0;\n    return;\n  }\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    /* Compute sum and store result in a temporary variable, sum. */\n#if defined(ARM_MATH_DSP)\n    in32 = read_q15x2_ia((q15_t **)&pSrc);\n    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);\n    sum += ((in32 << 16U) >> 16U);\n    sum += (in32 >> 16U);\n\n    in32 = read_q15x2_ia((q15_t **)&pSrc);\n    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);\n    sum += ((in32 << 16U) >> 16U);\n    sum += (in32 >> 16U);\n#else\n    in = *pSrc++;\n    sumOfSquares += (in * in);\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += (in * in);\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += (in * in);\n    sum += in;\n\n    in = *pSrc++;\n    sumOfSquares += (in * in);\n    sum += in;\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    in = *pSrc++;\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n#if defined(ARM_MATH_DSP)\n    sumOfSquares = __SMLALD(in, in, sumOfSquares);\n#else\n    sumOfSquares += (in * in);\n#endif /* #if defined (ARM_MATH_DSP) */\n    /* Compute sum and store result in a temporary variable, sum. */\n    sum += in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Compute Mean of squares and store result in a temporary variable,\n   * meanOfSquares. */\n  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1U));\n\n  /* Compute square of mean */\n  squareOfMean =\n      (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1U)));\n\n  /* mean of squares minus the square of mean. */\n  *pResult = (meanOfSquares - squareOfMean) >> 15U;\n}\n\n/**\n  @} end of variance group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/StatisticsFunctions/arm_var_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_var_q31.c\n * Description:  Variance of an array of Q31 type\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupStats\n */\n\n/**\n  @addtogroup variance\n  @{\n */\n\n/**\n  @brief         Variance of the elements of a Q31 vector.\n  @param[in]     pSrc       points to the input vector\n  @param[in]     blockSize  number of samples in input vector\n  @param[out]    pResult    variance value returned here\n  @return        none\n\n  @par           Scaling and Overflow Behavior\n                   The function is implemented using an internal 64-bit\n  accumulator. The input is represented in 1.31 format, which is then\n  downshifted by 8 bits which yields 1.23, and intermediate multiplication\n  yields a 2.46 format. The accumulator maintains full precision of the\n  intermediate multiplication results, but provides only a 16 guard bits. There\n  is no saturation on intermediate additions. If the accumulator overflows it\n  wraps around and distorts the result. In order to avoid overflows completely\n  the input signal must be scaled down by log2(blockSize)-8 bits, as a total of\n  blockSize additions are performed internally. After division, internal\n  variables should be Q18.46 Finally, the 18.46 accumulator is right shifted by\n  15 bits to yield a 1.31 format value.\n */\n\nvoid arm_var_q31(const q31_t *pSrc, uint32_t blockSize, q31_t *pResult) {\n  uint32_t blkCnt;                   /* Loop counter */\n  q63_t sum = 0;                     /* Temporary result storage */\n  q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */\n  q63_t sumOfSquares = 0;            /* Sum of squares */\n  q31_t in; /* Temporary variable to store input value */\n\n  if (blockSize <= 1U) {\n    *pResult = 0;\n    return;\n  }\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    in = *pSrc++ >> 8U;\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    sumOfSquares += ((q63_t)(in) * (in));\n    /* Compute sum and store result in a temporary variable, sum. */\n    sum += in;\n\n    in = *pSrc++ >> 8U;\n    sumOfSquares += ((q63_t)(in) * (in));\n    sum += in;\n\n    in = *pSrc++ >> 8U;\n    sumOfSquares += ((q63_t)(in) * (in));\n    sum += in;\n\n    in = *pSrc++ >> 8U;\n    sumOfSquares += ((q63_t)(in) * (in));\n    sum += in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */\n    /* C = A[0] + A[1] + ... + A[blockSize-1] */\n\n    in = *pSrc++ >> 8U;\n    /* Compute sum of squares and store result in a temporary variable,\n     * sumOfSquares. */\n    sumOfSquares += ((q63_t)(in) * (in));\n    /* Compute sum and store result in a temporary variable, sum. */\n    sum += in;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Compute Mean of squares and store result in a temporary variable,\n   * meanOfSquares. */\n  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));\n\n  /* Compute square of mean */\n  squareOfMean = (sum * sum / (q63_t)(blockSize * (blockSize - 1U)));\n\n  /* Compute variance and store result in destination */\n  *pResult = (meanOfSquares - squareOfMean) >> 15U;\n}\n\n/**\n  @} end of variance group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/SupportFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        SupportFunctions.c\n * Description:  Combination of all support function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_copy_f32.c\"\n#include \"arm_copy_q15.c\"\n#include \"arm_copy_q31.c\"\n#include \"arm_copy_q7.c\"\n#include \"arm_fill_f32.c\"\n#include \"arm_fill_q15.c\"\n#include \"arm_fill_q31.c\"\n#include \"arm_fill_q7.c\"\n#include \"arm_float_to_q15.c\"\n#include \"arm_float_to_q31.c\"\n#include \"arm_float_to_q7.c\"\n#include \"arm_q15_to_float.c\"\n#include \"arm_q15_to_q31.c\"\n#include \"arm_q15_to_q7.c\"\n#include \"arm_q31_to_float.c\"\n#include \"arm_q31_to_q15.c\"\n#include \"arm_q31_to_q7.c\"\n#include \"arm_q7_to_float.c\"\n#include \"arm_q7_to_q15.c\"\n#include \"arm_q7_to_q31.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_copy_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_copy_f32.c\n * Description:  Copies the elements of a floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @defgroup copy Vector Copy\n\n  Copies sample by sample from source vector to destination vector.\n\n  
\n      pDst[n] = pSrc[n];   0 <= n < blockSize.\n  
\n\n  There are separate functions for floating point, Q31, Q15, and Q7 data types.\n */\n\n/**\n  @addtogroup copy\n  @{\n */\n\n/**\n  @brief         Copies the elements of a floating-point vector.\n  @param[in]     pSrc       points to input vector\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_copy_f32(const float32_t *pSrc, float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A */\n\n    /* Copy and store result in destination buffer */\n    *pDst++ = *pSrc++;\n    *pDst++ = *pSrc++;\n    *pDst++ = *pSrc++;\n    *pDst++ = *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A */\n\n    /* Copy and store result in destination buffer */\n    *pDst++ = *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicCopy group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_copy_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_copy_q15.c\n * Description:  Copies the elements of a Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup copy\n  @{\n */\n\n/**\n  @brief         Copies the elements of a Q15 vector.\n  @param[in]     pSrc       points to input vector\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_copy_q15(const q15_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A */\n\n    /* read 2 times 2 samples at a time */\n    write_q15x2_ia(&pDst, read_q15x2_ia((q15_t **)&pSrc));\n    write_q15x2_ia(&pDst, read_q15x2_ia((q15_t **)&pSrc));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A */\n\n    /* Copy and store result in destination buffer */\n    *pDst++ = *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicCopy group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_copy_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_copy_q31.c\n * Description:  Copies the elements of a Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup copy\n  @{\n */\n\n/**\n  @brief         Copies the elements of a Q31 vector.\n  @param[in]     pSrc       points to input vector\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_copy_q31(const q31_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A */\n\n    /* Copy and store result in destination buffer */\n    *pDst++ = *pSrc++;\n    *pDst++ = *pSrc++;\n    *pDst++ = *pSrc++;\n    *pDst++ = *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A */\n\n    /* Copy and store result in destination buffer */\n    *pDst++ = *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicCopy group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_copy_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_copy_q7.c\n * Description:  Copies the elements of a Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup copy\n  @{\n */\n\n/**\n  @brief         Copies the elements of a Q7 vector.\n  @param[in]     pSrc       points to input vector\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_copy_q7(const q7_t *pSrc, q7_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A */\n\n    /* read 4 samples at a time */\n    write_q7x4_ia(&pDst, read_q7x4_ia((q7_t **)&pSrc));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A */\n\n    /* Copy and store result in destination buffer */\n    *pDst++ = *pSrc++;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of BasicCopy group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_fill_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fill_f32.c\n * Description:  Fills a constant value into a floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @defgroup Fill Vector Fill\n\n  Fills the destination vector with a constant value.\n\n  
\n      pDst[n] = value;   0 <= n < blockSize.\n  
\n\n  There are separate functions for floating point, Q31, Q15, and Q7 data types.\n */\n\n/**\n  @addtogroup Fill\n  @{\n */\n\n/**\n  @brief         Fills a constant value into a floating-point vector.\n  @param[in]     value      input value to be filled\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_fill_f32(float32_t value, float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = value */\n\n    /* Fill value in destination buffer */\n    *pDst++ = value;\n    *pDst++ = value;\n    *pDst++ = value;\n    *pDst++ = value;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = value */\n\n    /* Fill value in destination buffer */\n    *pDst++ = value;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of Fill group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_fill_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fill_q15.c\n * Description:  Fills a constant value into a Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup Fill\n  @{\n */\n\n/**\n  @brief         Fills a constant value into a Q15 vector.\n  @param[in]     value      input value to be filled\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_fill_q15(q15_t value, q15_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t packedValue; /* value packed to 32 bits */\n\n  /* Packing two 16 bit values to 32 bit value in order to use SIMD */\n  packedValue = __PKHBT(value, value, 16U);\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = value */\n\n    /* fill 2 times 2 samples at a time */\n    write_q15x2_ia(&pDst, packedValue);\n    write_q15x2_ia(&pDst, packedValue);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = value */\n\n    /* Fill value in destination buffer */\n    *pDst++ = value;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of Fill group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_fill_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fill_q31.c\n * Description:  Fills a constant value into a Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup Fill\n  @{\n */\n\n/**\n  @brief         Fills a constant value into a Q31 vector.\n  @param[in]     value      input value to be filled\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_fill_q31(q31_t value, q31_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = value */\n\n    /* Fill value in destination buffer */\n    *pDst++ = value;\n    *pDst++ = value;\n    *pDst++ = value;\n    *pDst++ = value;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = value */\n\n    /* Fill value in destination buffer */\n    *pDst++ = value;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of Fill group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_fill_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_fill_q7.c\n * Description:  Fills a constant value into a Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup Fill\n  @{\n */\n\n/**\n  @brief         Fills a constant value into a Q7 vector.\n  @param[in]     value      input value to be filled\n  @param[out]    pDst       points to output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n */\n\nvoid arm_fill_q7(q7_t value, q7_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt; /* Loop counter */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t packedValue; /* value packed to 32 bits */\n\n  /* Packing four 8 bit values to 32 bit value in order to use SIMD */\n  packedValue = __PACKq7(value, value, value, value);\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = value */\n\n    /* fill 4 samples at a time */\n    write_q7x4_ia(&pDst, packedValue);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = value */\n\n    /* Fill value in destination buffer */\n    *pDst++ = value;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of Fill group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_float_to_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_float_to_q15.c\n * Description:  Converts the elements of the floating-point vector to Q15\n * vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup float_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the floating-point vector to Q15\n  vector.\n  @param[in]     pSrc       points to the floating-point input vector\n  @param[out]    pDst       points to the Q15 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.\n  
\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q15 range [0x8000 0x7FFF]\n  are saturated.\n\n  @note\n                   In order to apply rounding, the library should be rebuilt\n  with the ROUNDING macro defined in the preprocessor section of project\n  options.\n */\n\nvoid arm_float_to_q15(const float32_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;             /* Loop counter */\n  const float32_t *pIn = pSrc; /* Source pointer */\n\n#ifdef ARM_MATH_ROUNDING\n  float32_t in;\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * 32768 */\n\n    /* convert from float to Q15 and store result in destination buffer */\n#ifdef ARM_MATH_ROUNDING\n\n    in = (*pIn++ * 32768.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q15_t)(__SSAT((q31_t)(in), 16));\n\n    in = (*pIn++ * 32768.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q15_t)(__SSAT((q31_t)(in), 16));\n\n    in = (*pIn++ * 32768.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q15_t)(__SSAT((q31_t)(in), 16));\n\n    in = (*pIn++ * 32768.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q15_t)(__SSAT((q31_t)(in), 16));\n\n#else\n\n    *pDst++ = (q15_t)__SSAT((q31_t)(*pIn++ * 32768.0f), 16);\n    *pDst++ = (q15_t)__SSAT((q31_t)(*pIn++ * 32768.0f), 16);\n    *pDst++ = (q15_t)__SSAT((q31_t)(*pIn++ * 32768.0f), 16);\n    *pDst++ = (q15_t)__SSAT((q31_t)(*pIn++ * 32768.0f), 16);\n\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * 32768 */\n\n    /* convert from float to Q15 and store result in destination buffer */\n#ifdef ARM_MATH_ROUNDING\n\n    in = (*pIn++ * 32768.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q15_t)(__SSAT((q31_t)(in), 16));\n\n#else\n\n    *pDst++ = (q15_t)__SSAT((q31_t)(*pIn++ * 32768.0f), 16);\n\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of float_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_float_to_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_float_to_q31.c\n * Description:  Converts the elements of the floating-point vector to Q31\n * vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n * @defgroup float_to_x  Convert 32-bit floating point value\n */\n\n/**\n  @addtogroup float_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the floating-point vector to Q31\n  vector.\n  @param[in]     pSrc       points to the floating-point input vector\n  @param[out]    pDst       points to the Q31 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.\n  
\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q31 range[0x80000000\n  0x7FFFFFFF] are saturated.\n\n  @note\n                   In order to apply rounding, the library should be rebuilt\n  with the ROUNDING macro defined in the preprocessor section of project\n  options.\n */\n\nvoid arm_float_to_q31(const float32_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;             /* Loop counter */\n  const float32_t *pIn = pSrc; /* Source pointer */\n\n#ifdef ARM_MATH_ROUNDING\n  float32_t in;\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * 2147483648 */\n\n    /* convert from float to Q31 and store result in destination buffer */\n#ifdef ARM_MATH_ROUNDING\n\n    in = (*pIn++ * 2147483648.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = clip_q63_to_q31((q63_t)(in));\n\n    in = (*pIn++ * 2147483648.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = clip_q63_to_q31((q63_t)(in));\n\n    in = (*pIn++ * 2147483648.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = clip_q63_to_q31((q63_t)(in));\n\n    in = (*pIn++ * 2147483648.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = clip_q63_to_q31((q63_t)(in));\n\n#else\n\n    *pDst++ = clip_q63_to_q31((q63_t)(*pIn++ * 2147483648.0f));\n    *pDst++ = clip_q63_to_q31((q63_t)(*pIn++ * 2147483648.0f));\n    *pDst++ = clip_q63_to_q31((q63_t)(*pIn++ * 2147483648.0f));\n    *pDst++ = clip_q63_to_q31((q63_t)(*pIn++ * 2147483648.0f));\n\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * 2147483648 */\n\n    /* convert from float to Q31 and store result in destination buffer */\n#ifdef ARM_MATH_ROUNDING\n\n    in = (*pIn++ * 2147483648.0f);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = clip_q63_to_q31((q63_t)(in));\n\n#else\n\n    *pDst++ = clip_q63_to_q31((q63_t)(*pIn++ * 2147483648.0f));\n\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of float_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_float_to_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_float_to_q7.c\n * Description:  Converts the elements of the floating-point vector to Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup float_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the floating-point vector to Q7\n  vector.\n  @param[in]     pSrc       points to the floating-point input vector\n  @param[out]    pDst       points to the Q7 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.\n  
\n\n  @par           Scaling and Overflow Behavior\n                   The function uses saturating arithmetic.\n                   Results outside of the allowable Q7 range [0x80 0x7F] are\n  saturated.\n  @note\n                  In order to apply rounding, the library should be rebuilt with\n  the ROUNDING macro defined in the preprocessor section of project options.\n */\n\nvoid arm_float_to_q7(const float32_t *pSrc, q7_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;             /* Loop counter */\n  const float32_t *pIn = pSrc; /* Source pointer */\n\n#ifdef ARM_MATH_ROUNDING\n  float32_t in;\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = A * 128 */\n\n    /* Convert from float to q7 and store result in destination buffer */\n#ifdef ARM_MATH_ROUNDING\n\n    in = (*pIn++ * 128);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q7_t)(__SSAT((q15_t)(in), 8));\n\n    in = (*pIn++ * 128);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q7_t)(__SSAT((q15_t)(in), 8));\n\n    in = (*pIn++ * 128);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q7_t)(__SSAT((q15_t)(in), 8));\n\n    in = (*pIn++ * 128);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q7_t)(__SSAT((q15_t)(in), 8));\n\n#else\n\n    *pDst++ = __SSAT((q31_t)(*pIn++ * 128.0f), 8);\n    *pDst++ = __SSAT((q31_t)(*pIn++ * 128.0f), 8);\n    *pDst++ = __SSAT((q31_t)(*pIn++ * 128.0f), 8);\n    *pDst++ = __SSAT((q31_t)(*pIn++ * 128.0f), 8);\n\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = A * 128 */\n\n    /* Convert from float to q7 and store result in destination buffer */\n#ifdef ARM_MATH_ROUNDING\n\n    in = (*pIn++ * 128);\n    in += in > 0.0f ? 0.5f : -0.5f;\n    *pDst++ = (q7_t)(__SSAT((q15_t)(in), 8));\n\n#else\n\n    *pDst++ = (q7_t)__SSAT((q31_t)(*pIn++ * 128.0f), 8);\n\n#endif /* #ifdef ARM_MATH_ROUNDING */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of float_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q15_to_float.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q15_to_float.c\n * Description:  Converts the elements of the Q15 vector to floating-point\n * vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n * @defgroup q15_to_x  Convert 16-bit Integer value\n */\n\n/**\n  @addtogroup q15_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q15 vector to floating-point\n  vector.\n  @param[in]     pSrc       points to the Q15 input vector\n  @param[out]    pDst       points to the floating-point output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q15_to_float(const q15_t *pSrc, float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;         /* Loop counter */\n  const q15_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (float32_t) A / 32768 */\n\n    /* Convert from q15 to float and store result in destination buffer */\n    *pDst++ = ((float32_t)*pIn++ / 32768.0f);\n    *pDst++ = ((float32_t)*pIn++ / 32768.0f);\n    *pDst++ = ((float32_t)*pIn++ / 32768.0f);\n    *pDst++ = ((float32_t)*pIn++ / 32768.0f);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (float32_t) A / 32768 */\n\n    /* Convert from q15 to float and store result in destination buffer */\n    *pDst++ = ((float32_t)*pIn++ / 32768.0f);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q15_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q15_to_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q15_to_q31.c\n * Description:  Converts the elements of the Q15 vector to Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup q15_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q15 vector to Q31 vector.\n  @param[in]     pSrc       points to the Q15 input vector\n  @param[out]    pDst       points to the Q31 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q15_to_q31(const q15_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;         /* Loop counter */\n  const q15_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n  q31_t in1, in2;\n  q31_t out1, out2, out3, out4;\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (q31_t)A << 16 */\n\n    /* Convert from q15 to q31 and store result in destination buffer */\n    in1 = read_q15x2_ia((q15_t **)&pIn);\n    in2 = read_q15x2_ia((q15_t **)&pIn);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n\n    /* extract lower 16 bits to 32 bit result */\n    out1 = in1 << 16U;\n    /* extract upper 16 bits to 32 bit result */\n    out2 = in1 & 0xFFFF0000;\n    /* extract lower 16 bits to 32 bit result */\n    out3 = in2 << 16U;\n    /* extract upper 16 bits to 32 bit result */\n    out4 = in2 & 0xFFFF0000;\n\n#else\n\n    /* extract upper 16 bits to 32 bit result */\n    out1 = in1 & 0xFFFF0000;\n    /* extract lower 16 bits to 32 bit result */\n    out2 = in1 << 16U;\n    /* extract upper 16 bits to 32 bit result */\n    out3 = in2 & 0xFFFF0000;\n    /* extract lower 16 bits to 32 bit result */\n    out4 = in2 << 16U;\n\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    *pDst++ = out1;\n    *pDst++ = out2;\n    *pDst++ = out3;\n    *pDst++ = out4;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (q31_t) A << 16 */\n\n    /* Convert from q15 to q31 and store result in destination buffer */\n    *pDst++ = (q31_t)*pIn++ << 16;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q15_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q15_to_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q15_to_q7.c\n * Description:  Converts the elements of the Q15 vector to Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup q15_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q15 vector to Q7 vector.\n  @param[in]     pSrc       points to the Q15 input vector\n  @param[out]    pDst       points to the Q7 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q15_to_q7(const q15_t *pSrc, q7_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;         /* Loop counter */\n  const q15_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in1, in2;\n  q31_t out1, out2;\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (q7_t) A >> 8 */\n\n    /* Convert from q15 to q7 and store result in destination buffer */\n#if defined(ARM_MATH_DSP)\n\n    in1 = read_q15x2_ia((q15_t **)&pIn);\n    in2 = read_q15x2_ia((q15_t **)&pIn);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n\n    out1 = __PKHTB(in2, in1, 16);\n    out2 = __PKHBT(in2, in1, 16);\n\n#else\n\n    out1 = __PKHTB(in1, in2, 16);\n    out2 = __PKHBT(in1, in2, 16);\n\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* rotate packed value by 24 */\n    out2 = ((uint32_t)out2 << 8) | ((uint32_t)out2 >> 24);\n\n    /* anding with 0xff00ff00 to get two 8 bit values */\n    out1 = out1 & 0xFF00FF00;\n    /* anding with 0x00ff00ff to get two 8 bit values */\n    out2 = out2 & 0x00FF00FF;\n\n    /* oring two values(contains two 8 bit values) to get four packed 8 bit\n     * values */\n    out1 = out1 | out2;\n\n    /* store 4 samples at a time to destiantion buffer */\n    write_q7x4_ia(&pDst, out1);\n\n#else\n\n    *pDst++ = (q7_t)(*pIn++ >> 8);\n    *pDst++ = (q7_t)(*pIn++ >> 8);\n    *pDst++ = (q7_t)(*pIn++ >> 8);\n    *pDst++ = (q7_t)(*pIn++ >> 8);\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (q7_t) A >> 8 */\n\n    /* Convert from q15 to q7 and store result in destination buffer */\n    *pDst++ = (q7_t)(*pIn++ >> 8);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q15_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q31_to_float.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q31_to_float.c\n * Description:  Converts the elements of the Q31 vector to floating-point\n * vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n * @defgroup q31_to_x  Convert 32-bit Integer value\n */\n\n/**\n  @addtogroup q31_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q31 vector to floating-point\n  vector.\n  @param[in]     pSrc       points to the Q31 input vector\n  @param[out]    pDst       points to the floating-point output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q31_to_float(const q31_t *pSrc, float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;         /* Loop counter */\n  const q31_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (float32_t) A / 2147483648 */\n\n    /* Convert from q31 to float and store result in destination buffer */\n    *pDst++ = ((float32_t)*pIn++ / 2147483648.0f);\n    *pDst++ = ((float32_t)*pIn++ / 2147483648.0f);\n    *pDst++ = ((float32_t)*pIn++ / 2147483648.0f);\n    *pDst++ = ((float32_t)*pIn++ / 2147483648.0f);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (float32_t) A / 2147483648 */\n\n    /* Convert from q31 to float and store result in destination buffer */\n    *pDst++ = ((float32_t)*pIn++ / 2147483648.0f);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q31_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q31_to_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q31_to_q15.c\n * Description:  Converts the elements of the Q31 vector to Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup q31_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q31 vector to Q15 vector.\n  @param[in]     pSrc       points to the Q31 input vector\n  @param[out]    pDst       points to the Q15 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q31_to_q15(const q31_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;         /* Loop counter */\n  const q31_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in1, in2, in3, in4;\n  q31_t out1, out2;\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (q15_t) (A >> 16) */\n\n    /* Convert from q31 to q15 and store result in destination buffer */\n#if defined(ARM_MATH_DSP)\n\n    in1 = *pIn++;\n    in2 = *pIn++;\n    in3 = *pIn++;\n    in4 = *pIn++;\n\n    /* pack two higher 16-bit values from two 32-bit values */\n#ifndef ARM_MATH_BIG_ENDIAN\n    out1 = __PKHTB(in2, in1, 16);\n    out2 = __PKHTB(in4, in3, 16);\n#else\n    out1 = __PKHTB(in1, in2, 16);\n    out2 = __PKHTB(in3, in4, 16);\n#endif /* #ifdef ARM_MATH_BIG_ENDIAN */\n\n    write_q15x2_ia(&pDst, out1);\n    write_q15x2_ia(&pDst, out2);\n\n#else\n\n    *pDst++ = (q15_t)(*pIn++ >> 16);\n    *pDst++ = (q15_t)(*pIn++ >> 16);\n    *pDst++ = (q15_t)(*pIn++ >> 16);\n    *pDst++ = (q15_t)(*pIn++ >> 16);\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (q15_t) (A >> 16) */\n\n    /* Convert from q31 to q15 and store result in destination buffer */\n    *pDst++ = (q15_t)(*pIn++ >> 16);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q31_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q31_to_q7.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q31_to_q7.c\n * Description:  Converts the elements of the Q31 vector to Q7 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup q31_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q31 vector to Q7 vector.\n  @param[in]     pSrc       points to the Q31 input vector\n  @param[out]    pDst       points to the Q7 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q31_to_q7(const q31_t *pSrc, q7_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;         /* Loop counter */\n  const q31_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  q7_t out1, out2, out3, out4;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (q7_t) (A >> 24) */\n\n    /* Convert from q31 to q7 and store result in destination buffer */\n\n    out1 = (q7_t)(*pIn++ >> 24);\n    out2 = (q7_t)(*pIn++ >> 24);\n    out3 = (q7_t)(*pIn++ >> 24);\n    out4 = (q7_t)(*pIn++ >> 24);\n    write_q7x4_ia(&pDst, __PACKq7(out1, out2, out3, out4));\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (q7_t) (A >> 24) */\n\n    /* Convert from q31 to q7 and store result in destination buffer */\n    *pDst++ = (q7_t)(*pIn++ >> 24);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q31_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q7_to_float.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q7_to_float.c\n * Description:  Converts the elements of the Q7 vector to floating-point vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n * @defgroup q7_to_x  Convert 8-bit Integer value\n */\n\n/**\n  @addtogroup q7_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q7 vector to floating-point\n vector.\n  @param[in]     pSrc       points to the Q7 input vector\n  @param[out]    pDst       points to the floating-point output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n @par            Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q7_to_float(const q7_t *pSrc, float32_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;        /* Loop counter */\n  const q7_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (float32_t) A / 128 */\n\n    /* Convert from q7 to float and store result in destination buffer */\n    *pDst++ = ((float32_t)*pIn++ / 128.0f);\n    *pDst++ = ((float32_t)*pIn++ / 128.0f);\n    *pDst++ = ((float32_t)*pIn++ / 128.0f);\n    *pDst++ = ((float32_t)*pIn++ / 128.0f);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (float32_t) A / 128 */\n\n    /* Convert from q7 to float and store result in destination buffer */\n    *pDst++ = ((float32_t)*pIn++ / 128.0f);\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q7_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q7_to_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q7_to_q15.c\n * Description:  Converts the elements of the Q7 vector to Q15 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup q7_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q7 vector to Q15 vector.\n  @param[in]     pSrc       points to the Q7 input vector\n  @param[out]    pDst       points to the Q15 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q7_to_q15(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;        /* Loop counter */\n  const q7_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL) && defined(ARM_MATH_DSP)\n  q31_t in;\n  q31_t in1, in2;\n  q31_t out1, out2;\n#endif\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (q15_t) A << 8 */\n\n    /* Convert from q7 to q15 and store result in destination buffer */\n#if defined(ARM_MATH_DSP)\n\n    in = read_q7x4_ia((q7_t **)&pIn);\n\n    /* rotatate in by 8 and extend two q7_t values to q15_t values */\n    in1 = __SXTB16(__ROR(in, 8));\n\n    /* extend remainig two q7_t values to q15_t values */\n    in2 = __SXTB16(in);\n\n    in1 = in1 << 8U;\n    in2 = in2 << 8U;\n\n    in1 = in1 & 0xFF00FF00;\n    in2 = in2 & 0xFF00FF00;\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    out2 = __PKHTB(in1, in2, 16);\n    out1 = __PKHBT(in2, in1, 16);\n#else\n    out1 = __PKHTB(in1, in2, 16);\n    out2 = __PKHBT(in2, in1, 16);\n#endif\n\n    write_q15x2_ia(&pDst, out1);\n    write_q15x2_ia(&pDst, out2);\n\n#else\n\n    *pDst++ = (q15_t)*pIn++ << 8;\n    *pDst++ = (q15_t)*pIn++ << 8;\n    *pDst++ = (q15_t)*pIn++ << 8;\n    *pDst++ = (q15_t)*pIn++ << 8;\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (q15_t) A << 8 */\n\n    /* Convert from q7 to q15 and store result in destination buffer */\n    *pDst++ = (q15_t)*pIn++ << 8;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q7_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/SupportFunctions/arm_q7_to_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_q7_to_q31.c\n * Description:  Converts the elements of the Q7 vector to Q31 vector\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupSupport\n */\n\n/**\n  @addtogroup q7_to_x\n  @{\n */\n\n/**\n  @brief         Converts the elements of the Q7 vector to Q31 vector.\n  @param[in]     pSrc       points to the Q7 input vector\n  @param[out]    pDst       points to the Q31 output vector\n  @param[in]     blockSize  number of samples in each vector\n  @return        none\n\n  @par           Details\n                   The equation used for the conversion process is:\n  
\n      pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.\n  
\n */\n\nvoid arm_q7_to_q31(const q7_t *pSrc, q31_t *pDst, uint32_t blockSize) {\n  uint32_t blkCnt;        /* Loop counter */\n  const q7_t *pIn = pSrc; /* Source pointer */\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  q31_t in;\n\n  /* Loop unrolling: Compute 4 outputs at a time */\n  blkCnt = blockSize >> 2U;\n\n  while (blkCnt > 0U) {\n    /* C = (q31_t) A << 24 */\n\n    /* Convert from q7 to q31 and store result in destination buffer */\n    in = read_q7x4_ia((q7_t **)&pIn);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n\n    *pDst++ = (__ROR(in, 8)) & 0xFF000000;\n    *pDst++ = (__ROR(in, 16)) & 0xFF000000;\n    *pDst++ = (__ROR(in, 24)) & 0xFF000000;\n    *pDst++ = (in & 0xFF000000);\n\n#else\n\n    *pDst++ = (in & 0xFF000000);\n    *pDst++ = (__ROR(in, 24)) & 0xFF000000;\n    *pDst++ = (__ROR(in, 16)) & 0xFF000000;\n    *pDst++ = (__ROR(in, 8)) & 0xFF000000;\n\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n\n  /* Loop unrolling: Compute remaining outputs */\n  blkCnt = blockSize % 0x4U;\n\n#else\n\n  /* Initialize blkCnt with number of samples */\n  blkCnt = blockSize;\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n\n  while (blkCnt > 0U) {\n    /* C = (q31_t) A << 24 */\n\n    /* Convert from q7 to q31 and store result in destination buffer */\n    *pDst++ = (q31_t)*pIn++ << 24;\n\n    /* Decrement loop counter */\n    blkCnt--;\n  }\n}\n\n/**\n  @} end of q7_to_x group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(filter-out %Functions.c arm_bitreversal2.c,$(obj-y))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/TransformFunctions.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        TransformFunctions.c\n * Description:  Combination of all transform function source files.\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_bitreversal.c\"\n#include \"arm_bitreversal2.c\"\n#include \"arm_cfft_f32.c\"\n#include \"arm_cfft_q15.c\"\n#include \"arm_cfft_q31.c\"\n#include \"arm_cfft_radix2_f32.c\"\n#include \"arm_cfft_radix2_init_f32.c\"\n#include \"arm_cfft_radix2_init_q15.c\"\n#include \"arm_cfft_radix2_init_q31.c\"\n#include \"arm_cfft_radix2_q15.c\"\n#include \"arm_cfft_radix2_q31.c\"\n#include \"arm_cfft_radix4_f32.c\"\n#include \"arm_cfft_radix4_init_f32.c\"\n#include \"arm_cfft_radix4_init_q15.c\"\n#include \"arm_cfft_radix4_init_q31.c\"\n#include \"arm_cfft_radix4_q15.c\"\n#include \"arm_cfft_radix4_q31.c\"\n#include \"arm_cfft_radix8_f32.c\"\n#include \"arm_dct4_f32.c\"\n#include \"arm_dct4_init_f32.c\"\n#include \"arm_dct4_init_q15.c\"\n#include \"arm_dct4_init_q31.c\"\n#include \"arm_dct4_q15.c\"\n#include \"arm_dct4_q31.c\"\n#include \"arm_rfft_f32.c\"\n#include \"arm_rfft_fast_f32.c\"\n#include \"arm_rfft_fast_init_f32.c\"\n#include \"arm_rfft_init_f32.c\"\n#include \"arm_rfft_init_q15.c\"\n#include \"arm_rfft_init_q31.c\"\n#include \"arm_rfft_q15.c\"\n#include \"arm_rfft_q31.c\"\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_bitreversal.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_bitreversal.c\n * Description:  Bitreversal functions\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @brief         In-place floating-point bit reversal function.\n  @param[in,out] pSrc         points to in-place floating-point data buffer\n  @param[in]     fftSize      length of FFT\n  @param[in]     bitRevFactor bit reversal modifier that supports different size\n  FFTs with the same bit reversal table\n  @param[in]     pBitRevTab   points to bit reversal table\n  @return        none\n */\n\nvoid arm_bitreversal_f32(float32_t *pSrc, uint16_t fftSize,\n                         uint16_t bitRevFactor, const uint16_t *pBitRevTab) {\n  uint16_t fftLenBy2, fftLenBy2p1;\n  uint16_t i, j;\n  float32_t in;\n\n  /*  Initializations */\n  j = 0U;\n  fftLenBy2 = fftSize >> 1U;\n  fftLenBy2p1 = (fftSize >> 1U) + 1U;\n\n  /* Bit Reversal Implementation */\n  for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) {\n    if (i < j) {\n      /*  pSrc[i] <-> pSrc[j]; */\n      in = pSrc[2U * i];\n      pSrc[2U * i] = pSrc[2U * j];\n      pSrc[2U * j] = in;\n\n      /*  pSrc[i+1U] <-> pSrc[j+1U] */\n      in = pSrc[(2U * i) + 1U];\n      pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];\n      pSrc[(2U * j) + 1U] = in;\n\n      /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */\n      in = pSrc[2U * (i + fftLenBy2p1)];\n      pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];\n      pSrc[2U * (j + fftLenBy2p1)] = in;\n\n      /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */\n      in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];\n      pSrc[(2U * (i + fftLenBy2p1)) + 1U] = pSrc[(2U * (j + fftLenBy2p1)) + 1U];\n      pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;\n    }\n\n    /*  pSrc[i+1U] <-> pSrc[j+1U] */\n    in = pSrc[2U * (i + 1U)];\n    pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];\n    pSrc[2U * (j + fftLenBy2)] = in;\n\n    /*  pSrc[i+2U] <-> pSrc[j+2U] */\n    in = pSrc[(2U * (i + 1U)) + 1U];\n    pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];\n    pSrc[(2U * (j + fftLenBy2)) + 1U] = in;\n\n    /*  Reading the index for the bit reversal */\n    j = *pBitRevTab;\n\n    /*  Updating the bit reversal index depending on the fft length  */\n    pBitRevTab += bitRevFactor;\n  }\n}\n\n/**\n  @brief         In-place Q31 bit reversal function.\n  @param[in,out] pSrc         points to in-place Q31 data buffer.\n  @param[in]     fftLen       length of FFT.\n  @param[in]     bitRevFactor bit reversal modifier that supports different size\n  FFTs with the same bit reversal table\n  @param[in]     pBitRevTab   points to bit reversal table\n  @return        none\n*/\n\nvoid arm_bitreversal_q31(q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor,\n                         const uint16_t *pBitRevTab) {\n  uint32_t fftLenBy2, fftLenBy2p1, i, j;\n  q31_t in;\n\n  /*  Initializations      */\n  j = 0U;\n  fftLenBy2 = fftLen / 2U;\n  fftLenBy2p1 = (fftLen / 2U) + 1U;\n\n  /* Bit Reversal Implementation */\n  for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) {\n    if (i < j) {\n      /*  pSrc[i] <-> pSrc[j]; */\n      in = pSrc[2U * i];\n      pSrc[2U * i] = pSrc[2U * j];\n      pSrc[2U * j] = in;\n\n      /*  pSrc[i+1U] <-> pSrc[j+1U] */\n      in = pSrc[(2U * i) + 1U];\n      pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];\n      pSrc[(2U * j) + 1U] = in;\n\n      /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */\n      in = pSrc[2U * (i + fftLenBy2p1)];\n      pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];\n      pSrc[2U * (j + fftLenBy2p1)] = in;\n\n      /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */\n      in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];\n      pSrc[(2U * (i + fftLenBy2p1)) + 1U] = pSrc[(2U * (j + fftLenBy2p1)) + 1U];\n      pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;\n    }\n\n    /*  pSrc[i+1U] <-> pSrc[j+1U] */\n    in = pSrc[2U * (i + 1U)];\n    pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];\n    pSrc[2U * (j + fftLenBy2)] = in;\n\n    /*  pSrc[i+2U] <-> pSrc[j+2U] */\n    in = pSrc[(2U * (i + 1U)) + 1U];\n    pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];\n    pSrc[(2U * (j + fftLenBy2)) + 1U] = in;\n\n    /*  Reading the index for the bit reversal */\n    j = *pBitRevTab;\n\n    /*  Updating the bit reversal index depending on the fft length */\n    pBitRevTab += bitRevFactor;\n  }\n}\n\n/**\n  @brief         In-place Q15 bit reversal function.\n  @param[in,out] pSrc16       points to in-place Q15 data buffer\n  @param[in]     fftLen       length of FFT\n  @param[in]     bitRevFactor bit reversal modifier that supports different size\n  FFTs with the same bit reversal table\n  @param[in]     pBitRevTab   points to bit reversal table\n  @return        none\n*/\n\nvoid arm_bitreversal_q15(q15_t *pSrc16, uint32_t fftLen, uint16_t bitRevFactor,\n                         const uint16_t *pBitRevTab) {\n  q31_t *pSrc = (q31_t *)pSrc16;\n  q31_t in;\n  uint32_t fftLenBy2, fftLenBy2p1;\n  uint32_t i, j;\n\n  /*  Initializations */\n  j = 0U;\n  fftLenBy2 = fftLen / 2U;\n  fftLenBy2p1 = (fftLen / 2U) + 1U;\n\n  /* Bit Reversal Implementation */\n  for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U) {\n    if (i < j) {\n      /*  pSrc[i] <-> pSrc[j]; */\n      /*  pSrc[i+1U] <-> pSrc[j+1U] */\n      in = pSrc[i];\n      pSrc[i] = pSrc[j];\n      pSrc[j] = in;\n\n      /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */\n      /*  pSrc[i + fftLenBy2p1+1U] <-> pSrc[j + fftLenBy2p1+1U] */\n      in = pSrc[i + fftLenBy2p1];\n      pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];\n      pSrc[j + fftLenBy2p1] = in;\n    }\n\n    /*  pSrc[i+1U] <-> pSrc[j+fftLenBy2];         */\n    /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1U]  */\n    in = pSrc[i + 1U];\n    pSrc[i + 1U] = pSrc[j + fftLenBy2];\n    pSrc[j + fftLenBy2] = in;\n\n    /*  Reading the index for the bit reversal */\n    j = *pBitRevTab;\n\n    /*  Updating the bit reversal index depending on the fft length  */\n    pBitRevTab += bitRevFactor;\n  }\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_bitreversal2.S",
    "content": ";/* ----------------------------------------------------------------------\n; * Project:      CMSIS DSP Library\n; * Title:        arm_bitreversal2.S\n; * Description:  arm_bitreversal_32 function done in assembly for maximum speed.\n; *               Called after doing an fft to reorder the output.\n; *               The function is loop unrolled by 2. arm_bitreversal_16 as well.\n; *\n; * $Date:        18. March 2019\n; * $Revision:    V1.5.2\n; *\n; * Target Processor: Cortex-M cores\n; * -------------------------------------------------------------------- */\n;/*\n; * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; */\n\n#if   defined ( __CC_ARM )     /* Keil */\n    #define CODESECT AREA     ||.text||, CODE, READONLY, ALIGN=2\n    #define LABEL\n#elif defined ( __IASMARM__ )  /* IAR */\n    #define CODESECT SECTION `.text`:CODE\n    #define PROC\n    #define LABEL\n    #define ENDP\n    #define EXPORT PUBLIC\n#elif defined ( __CSMC__ )\t   /* Cosmic */\n\t#define\tCODESECT\tswitch .text\n\t#define THUMB\n\t#define EXPORT\txdef\n\t#define PROC\t:\n\t#define LABEL\t:\n\t#define ENDP\n\t#define arm_bitreversal_32 _arm_bitreversal_32\n#elif defined ( __TI_ARM__ )   /* TI ARM */\n    #define THUMB    .thumb\n    #define CODESECT .text\n    #define EXPORT   .global\n    #define PROC     : .asmfunc\n    #define LABEL    :\n    #define ENDP     .endasmfunc\n    #define END\n#elif defined ( __GNUC__ )     /* GCC */\n    #define THUMB .thumb\n    #define CODESECT .section .text\n    #define EXPORT .global\n    #define PROC :\n    #define LABEL :\n    #define ENDP\n    #define END\n\n    .syntax unified\n#endif\n\n\tCODESECT\n\tTHUMB\n\n;/**\n;  @brief         In-place bit reversal function.\n;  @param[in,out] pSrc        points to the in-place buffer of unknown 32-bit data type\n;  @param[in]     bitRevLen   bit reversal table length\n;  @param[in]     pBitRevTab  points to bit reversal table\n;  @return        none\n; */\n\tEXPORT arm_bitreversal_32\n\tEXPORT arm_bitreversal_16\n\n#if   defined ( __CC_ARM )     /* Keil */\n#elif defined ( __IASMARM__ )  /* IAR */\n#elif defined ( __CSMC__ )\t   /* Cosmic */\n#elif defined ( __TI_ARM__ )   /* TI ARM */\n#elif defined ( __GNUC__ )     /* GCC */\n\t.type   arm_bitreversal_16, %function\n\t.type   arm_bitreversal_32, %function\n#endif\n\n#if defined (ARM_MATH_CM0_FAMILY)\n\narm_bitreversal_32 PROC\n\tADDS     r3,r1,#1\n\tPUSH     {r4-r6}\n\tADDS     r1,r2,#0\n\tLSRS     r3,r3,#1\narm_bitreversal_32_0 LABEL\n\tLDRH     r2,[r1,#2]\n\tLDRH     r6,[r1,#0]\n\tADD      r2,r0,r2\n\tADD      r6,r0,r6\n\tLDR      r5,[r2,#0]\n\tLDR      r4,[r6,#0]\n\tSTR      r5,[r6,#0]\n\tSTR      r4,[r2,#0]\n\tLDR      r5,[r2,#4]\n\tLDR      r4,[r6,#4]\n\tSTR      r5,[r6,#4]\n\tSTR      r4,[r2,#4]\n\tADDS     r1,r1,#4\n\tSUBS     r3,r3,#1\n\tBNE      arm_bitreversal_32_0\n\tPOP      {r4-r6}\n\tBX       lr\n\tENDP\n\narm_bitreversal_16 PROC\n\tADDS     r3,r1,#1\n\tPUSH     {r4-r6}\n\tADDS     r1,r2,#0\n\tLSRS     r3,r3,#1\narm_bitreversal_16_0 LABEL\n\tLDRH     r2,[r1,#2]\n\tLDRH     r6,[r1,#0]\n    LSRS     r2,r2,#1\n    LSRS     r6,r6,#1\n\tADD      r2,r0,r2\n\tADD      r6,r0,r6\n\tLDR      r5,[r2,#0]\n\tLDR      r4,[r6,#0]\n\tSTR      r5,[r6,#0]\n\tSTR      r4,[r2,#0]\n\tADDS     r1,r1,#4\n\tSUBS     r3,r3,#1\n\tBNE      arm_bitreversal_16_0\n\tPOP      {r4-r6}\n\tBX       lr\n\tENDP\n\n#else\n\narm_bitreversal_32 PROC\n\tADDS     r3,r1,#1\n\tCMP      r3,#1\n\tIT       LS\n\tBXLS     lr\n\tPUSH     {r4-r9}\n\tADDS     r1,r2,#2\n\tLSRS     r3,r3,#2\narm_bitreversal_32_0 LABEL       ;/* loop unrolled by 2 */\n\tLDRH     r8,[r1,#4]\n\tLDRH     r9,[r1,#2]\n\tLDRH     r2,[r1,#0]\n\tLDRH     r12,[r1,#-2]\n\tADD      r8,r0,r8\n\tADD      r9,r0,r9\n\tADD      r2,r0,r2\n\tADD      r12,r0,r12\n\tLDR      r7,[r9,#0]\n\tLDR      r6,[r8,#0]\n\tLDR      r5,[r2,#0]\n\tLDR      r4,[r12,#0]\n\tSTR      r6,[r9,#0]\n\tSTR      r7,[r8,#0]\n\tSTR      r5,[r12,#0]\n\tSTR      r4,[r2,#0]\n\tLDR      r7,[r9,#4]\n\tLDR      r6,[r8,#4]\n\tLDR      r5,[r2,#4]\n\tLDR      r4,[r12,#4]\n\tSTR      r6,[r9,#4]\n\tSTR      r7,[r8,#4]\n\tSTR      r5,[r12,#4]\n\tSTR      r4,[r2,#4]\n\tADDS     r1,r1,#8\n\tSUBS     r3,r3,#1\n\tBNE      arm_bitreversal_32_0\n\tPOP      {r4-r9}\n\tBX       lr\n\tENDP\n\narm_bitreversal_16 PROC\n\tADDS     r3,r1,#1\n\tCMP      r3,#1\n\tIT       LS\n\tBXLS     lr\n\tPUSH     {r4-r9}\n\tADDS     r1,r2,#2\n\tLSRS     r3,r3,#2\narm_bitreversal_16_0 LABEL       ;/* loop unrolled by 2 */\n\tLDRH     r8,[r1,#4]\n\tLDRH     r9,[r1,#2]\n\tLDRH     r2,[r1,#0]\n\tLDRH     r12,[r1,#-2]\n\tADD      r8,r0,r8,LSR #1\n\tADD      r9,r0,r9,LSR #1\n\tADD      r2,r0,r2,LSR #1\n\tADD      r12,r0,r12,LSR #1\n\tLDR      r7,[r9,#0]\n\tLDR      r6,[r8,#0]\n\tLDR      r5,[r2,#0]\n\tLDR      r4,[r12,#0]\n\tSTR      r6,[r9,#0]\n\tSTR      r7,[r8,#0]\n\tSTR      r5,[r12,#0]\n\tSTR      r4,[r2,#0]\n\tADDS     r1,r1,#8\n\tSUBS     r3,r3,#1\n\tBNE      arm_bitreversal_16_0\n\tPOP      {r4-r9}\n\tBX       lr\n\tENDP\n\n#endif\n\n\tEND\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_bitreversal2.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_bitreversal2.c\n * Description:  Bitreversal functions\n *\n * $Date:        18. March 2019\n * $Revision:    V1.0.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @brief         In-place 32 bit reversal function.\n  @param[in,out] pSrc        points to in-place buffer of unknown 32-bit data\n  type\n  @param[in]     bitRevLen   bit reversal table length\n  @param[in]     pBitRevTab  points to bit reversal table\n  @return        none\n*/\n\nvoid arm_bitreversal_32(uint32_t *pSrc, const uint16_t bitRevLen,\n                        const uint16_t *pBitRevTab) {\n  uint32_t a, b, i, tmp;\n\n  for (i = 0; i < bitRevLen;) {\n    a = pBitRevTab[i] >> 2;\n    b = pBitRevTab[i + 1] >> 2;\n\n    // real\n    tmp = pSrc[a];\n    pSrc[a] = pSrc[b];\n    pSrc[b] = tmp;\n\n    // complex\n    tmp = pSrc[a + 1];\n    pSrc[a + 1] = pSrc[b + 1];\n    pSrc[b + 1] = tmp;\n\n    i += 2;\n  }\n}\n\n/**\n  @brief         In-place 16 bit reversal function.\n  @param[in,out] pSrc        points to in-place buffer of unknown 16-bit data\n  type\n  @param[in]     bitRevLen   bit reversal table length\n  @param[in]     pBitRevTab  points to bit reversal table\n  @return        none\n*/\n\nvoid arm_bitreversal_16(uint16_t *pSrc, const uint16_t bitRevLen,\n                        const uint16_t *pBitRevTab) {\n  uint16_t a, b, i, tmp;\n\n  for (i = 0; i < bitRevLen;) {\n    a = pBitRevTab[i] >> 2;\n    b = pBitRevTab[i + 1] >> 2;\n\n    // real\n    tmp = pSrc[a];\n    pSrc[a] = pSrc[b];\n    pSrc[b] = tmp;\n\n    // complex\n    tmp = pSrc[a + 1];\n    pSrc[a + 1] = pSrc[b + 1];\n    pSrc[b + 1] = tmp;\n\n    i += 2;\n  }\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_f32.c\n * Description:  Combined Radix Decimation in Frequency CFFT Floating point\n * processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\nextern void arm_radix8_butterfly_f32(float32_t *pSrc, uint16_t fftLen,\n                                     const float32_t *pCoef,\n                                     uint16_t twidCoefModifier);\n\nextern void arm_bitreversal_32(uint32_t *pSrc, const uint16_t bitRevLen,\n                               const uint16_t *pBitRevTable);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @defgroup ComplexFFT Complex FFT Functions\n\n  @par\n                   The Fast Fourier Transform (FFT) is an efficient algorithm\n  for computing the Discrete Fourier Transform (DFT).  The FFT can be orders of\n  magnitude faster than the DFT, especially for long lengths. The algorithms\n  described in this section operate on complex data.  A separate set of\n  functions is devoted to handling of real sequences.\n  @par\n                   There are separate algorithms for handling floating-point,\n  Q15, and Q31 data types.  The algorithms available for each data type are\n  described next.\n  @par\n                   The FFT functions operate in-place.  That is, the array\n  holding the input data will also be used to hold the corresponding result. The\n  input data is complex and contains 2*fftLen interleaved values as\n  shown below. 
{real[0], imag[0], real[1], imag[1], ...} 
 The FFT\n  result will be contained in the same array and the frequency domain values\n  will have the same interleaving.\n\n  @par Floating-point\n                   The floating-point complex FFT uses a mixed-radix algorithm.\n  Multiple radix-8 stages are performed along with a single radix-2 or radix-4\n  stage, as needed. The algorithm supports lengths of [16, 32, 64, ..., 4096]\n  and each length uses a different twiddle factor table.\n  @par\n                   The function uses the standard FFT definition and output\n  values may grow by a factor of fftLen when computing the forward\n  transform.  The inverse transform includes a scale of 1/fftLen as\n  part of the calculation and this matches the textbook definition of the\n  inverse FFT.\n  @par\n                   Pre-initialized data structures containing twiddle factors\n  and bit reversal tables are provided and defined in\n  arm_const_structs.h.  Include this header in your function and\n  then pass one of the constant structures as an argument to arm_cfft_f32.  For\n  example:\n  @par\n                   arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)\n  @par\n                   computes a 64-point inverse complex FFT including bit\n  reversal. The data structures are treated as constant data and not modified\n  during the calculation.  The same data structure can be reused for multiple\n  transforms including mixing forward and inverse transforms.\n  @par\n                   Earlier releases of the library provided separate radix-2 and\n  radix-4 algorithms that operated on floating-point data.  These functions are\n  still provided but are deprecated.  The older functions are slower and less\n  general than the new functions.\n  @par\n                   An example of initialization of the constants for the\n  arm_cfft_f32 function follows:\n  @code\n                   const static arm_cfft_instance_f32 *S;\n                   ...\n                     switch (length) {\n                       case 16:\n                         S = &arm_cfft_sR_f32_len16;\n                         break;\n                       case 32:\n                         S = &arm_cfft_sR_f32_len32;\n                         break;\n                       case 64:\n                         S = &arm_cfft_sR_f32_len64;\n                         break;\n                       case 128:\n                         S = &arm_cfft_sR_f32_len128;\n                         break;\n                       case 256:\n                         S = &arm_cfft_sR_f32_len256;\n                         break;\n                       case 512:\n                         S = &arm_cfft_sR_f32_len512;\n                         break;\n                       case 1024:\n                         S = &arm_cfft_sR_f32_len1024;\n                         break;\n                       case 2048:\n                         S = &arm_cfft_sR_f32_len2048;\n                         break;\n                       case 4096:\n                         S = &arm_cfft_sR_f32_len4096;\n                         break;\n                     }\n  @endcode\n  @par Q15 and Q31\n                   The floating-point complex FFT uses a mixed-radix algorithm.\n  Multiple radix-4 stages are performed along with a single radix-2 stage, as\n  needed. The algorithm supports lengths of [16, 32, 64, ..., 4096] and each\n  length uses a different twiddle factor table.\n  @par\n                   The function uses the standard FFT definition and output\n  values may grow by a factor of fftLen when computing the forward\n  transform.  The inverse transform includes a scale of 1/fftLen as\n  part of the calculation and this matches the textbook definition of the\n  inverse FFT.\n  @par\n                   Pre-initialized data structures containing twiddle factors\n  and bit reversal tables are provided and defined in\n  arm_const_structs.h.  Include this header in your function and\n  then pass one of the constant structures as an argument to arm_cfft_q31. For\n  example:\n  @par\n                   arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)\n  @par\n                   computes a 64-point inverse complex FFT including bit\n  reversal. The data structures are treated as constant data and not modified\n  during the calculation.  The same data structure can be reused for multiple\n  transforms including mixing forward and inverse transforms.\n  @par\n                   Earlier releases of the library provided separate radix-2 and\n  radix-4 algorithms that operated on floating-point data.  These functions are\n  still provided but are deprecated.  The older functions are slower and less\n  general than the new functions.\n  @par\n                   An example of initialization of the constants for the\n  arm_cfft_q31 function follows:\n  @code\n                   const static arm_cfft_instance_q31 *S;\n                   ...\n                     switch (length) {\n                       case 16:\n                         S = &arm_cfft_sR_q31_len16;\n                         break;\n                       case 32:\n                         S = &arm_cfft_sR_q31_len32;\n                         break;\n                       case 64:\n                         S = &arm_cfft_sR_q31_len64;\n                         break;\n                       case 128:\n                         S = &arm_cfft_sR_q31_len128;\n                         break;\n                       case 256:\n                         S = &arm_cfft_sR_q31_len256;\n                         break;\n                       case 512:\n                         S = &arm_cfft_sR_q31_len512;\n                         break;\n                       case 1024:\n                         S = &arm_cfft_sR_q31_len1024;\n                         break;\n                       case 2048:\n                         S = &arm_cfft_sR_q31_len2048;\n                         break;\n                       case 4096:\n                         S = &arm_cfft_sR_q31_len4096;\n                         break;\n                     }\n  @endcode\n\n */\n\nvoid arm_cfft_radix8by2_f32(arm_cfft_instance_f32 *S, float32_t *p1) {\n  uint32_t L = S->fftLen;\n  float32_t *pCol1, *pCol2, *pMid1, *pMid2;\n  float32_t *p2 = p1 + L;\n  const float32_t *tw = (float32_t *)S->pTwiddle;\n  float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;\n  float32_t m0, m1, m2, m3;\n  uint32_t l;\n\n  pCol1 = p1;\n  pCol2 = p2;\n\n  /* Define new length */\n  L >>= 1;\n\n  /* Initialize mid pointers */\n  pMid1 = p1 + L;\n  pMid2 = p2 + L;\n\n  /* do two dot Fourier transform */\n  for (l = L >> 2; l > 0; l--) {\n    t1[0] = p1[0];\n    t1[1] = p1[1];\n    t1[2] = p1[2];\n    t1[3] = p1[3];\n\n    t2[0] = p2[0];\n    t2[1] = p2[1];\n    t2[2] = p2[2];\n    t2[3] = p2[3];\n\n    t3[0] = pMid1[0];\n    t3[1] = pMid1[1];\n    t3[2] = pMid1[2];\n    t3[3] = pMid1[3];\n\n    t4[0] = pMid2[0];\n    t4[1] = pMid2[1];\n    t4[2] = pMid2[2];\n    t4[3] = pMid2[3];\n\n    *p1++ = t1[0] + t2[0];\n    *p1++ = t1[1] + t2[1];\n    *p1++ = t1[2] + t2[2];\n    *p1++ = t1[3] + t2[3]; /* col 1 */\n\n    t2[0] = t1[0] - t2[0];\n    t2[1] = t1[1] - t2[1];\n    t2[2] = t1[2] - t2[2];\n    t2[3] = t1[3] - t2[3]; /* for col 2 */\n\n    *pMid1++ = t3[0] + t4[0];\n    *pMid1++ = t3[1] + t4[1];\n    *pMid1++ = t3[2] + t4[2];\n    *pMid1++ = t3[3] + t4[3]; /* col 1 */\n\n    t4[0] = t4[0] - t3[0];\n    t4[1] = t4[1] - t3[1];\n    t4[2] = t4[2] - t3[2];\n    t4[3] = t4[3] - t3[3]; /* for col 2 */\n\n    twR = *tw++;\n    twI = *tw++;\n\n    /* multiply by twiddle factors */\n    m0 = t2[0] * twR;\n    m1 = t2[1] * twI;\n    m2 = t2[1] * twR;\n    m3 = t2[0] * twI;\n\n    /* R  =  R  *  Tr - I * Ti */\n    *p2++ = m0 + m1;\n    /* I  =  I  *  Tr + R * Ti */\n    *p2++ = m2 - m3;\n\n    /* use vertical symmetry */\n    /*  0.9988 - 0.0491i <==> -0.0491 - 0.9988i */\n    m0 = t4[0] * twI;\n    m1 = t4[1] * twR;\n    m2 = t4[1] * twI;\n    m3 = t4[0] * twR;\n\n    *pMid2++ = m0 - m1;\n    *pMid2++ = m2 + m3;\n\n    twR = *tw++;\n    twI = *tw++;\n\n    m0 = t2[2] * twR;\n    m1 = t2[3] * twI;\n    m2 = t2[3] * twR;\n    m3 = t2[2] * twI;\n\n    *p2++ = m0 + m1;\n    *p2++ = m2 - m3;\n\n    m0 = t4[2] * twI;\n    m1 = t4[3] * twR;\n    m2 = t4[3] * twI;\n    m3 = t4[2] * twR;\n\n    *pMid2++ = m0 - m1;\n    *pMid2++ = m2 + m3;\n  }\n\n  /* first col */\n  arm_radix8_butterfly_f32(pCol1, L, (float32_t *)S->pTwiddle, 2U);\n\n  /* second col */\n  arm_radix8_butterfly_f32(pCol2, L, (float32_t *)S->pTwiddle, 2U);\n}\n\nvoid arm_cfft_radix8by4_f32(arm_cfft_instance_f32 *S, float32_t *p1) {\n  uint32_t L = S->fftLen >> 1;\n  float32_t *pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;\n  const float32_t *tw2, *tw3, *tw4;\n  float32_t *p2 = p1 + L;\n  float32_t *p3 = p2 + L;\n  float32_t *p4 = p3 + L;\n  float32_t t2[4], t3[4], t4[4], twR, twI;\n  float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1;\n  float32_t m0, m1, m2, m3;\n  uint32_t l, twMod2, twMod3, twMod4;\n\n  pCol1 = p1; /* points to real values by default */\n  pCol2 = p2;\n  pCol3 = p3;\n  pCol4 = p4;\n  pEnd1 = p2 - 1; /* points to imaginary values by default */\n  pEnd2 = p3 - 1;\n  pEnd3 = p4 - 1;\n  pEnd4 = pEnd3 + L;\n\n  tw2 = tw3 = tw4 = (float32_t *)S->pTwiddle;\n\n  L >>= 1;\n\n  /* do four dot Fourier transform */\n\n  twMod2 = 2;\n  twMod3 = 4;\n  twMod4 = 6;\n\n  /* TOP */\n  p1ap3_0 = p1[0] + p3[0];\n  p1sp3_0 = p1[0] - p3[0];\n  p1ap3_1 = p1[1] + p3[1];\n  p1sp3_1 = p1[1] - p3[1];\n\n  /* col 2 */\n  t2[0] = p1sp3_0 + p2[1] - p4[1];\n  t2[1] = p1sp3_1 - p2[0] + p4[0];\n  /* col 3 */\n  t3[0] = p1ap3_0 - p2[0] - p4[0];\n  t3[1] = p1ap3_1 - p2[1] - p4[1];\n  /* col 4 */\n  t4[0] = p1sp3_0 - p2[1] + p4[1];\n  t4[1] = p1sp3_1 + p2[0] - p4[0];\n  /* col 1 */\n  *p1++ = p1ap3_0 + p2[0] + p4[0];\n  *p1++ = p1ap3_1 + p2[1] + p4[1];\n\n  /* Twiddle factors are ones */\n  *p2++ = t2[0];\n  *p2++ = t2[1];\n  *p3++ = t3[0];\n  *p3++ = t3[1];\n  *p4++ = t4[0];\n  *p4++ = t4[1];\n\n  tw2 += twMod2;\n  tw3 += twMod3;\n  tw4 += twMod4;\n\n  for (l = (L - 2) >> 1; l > 0; l--) {\n    /* TOP */\n    p1ap3_0 = p1[0] + p3[0];\n    p1sp3_0 = p1[0] - p3[0];\n    p1ap3_1 = p1[1] + p3[1];\n    p1sp3_1 = p1[1] - p3[1];\n    /* col 2 */\n    t2[0] = p1sp3_0 + p2[1] - p4[1];\n    t2[1] = p1sp3_1 - p2[0] + p4[0];\n    /* col 3 */\n    t3[0] = p1ap3_0 - p2[0] - p4[0];\n    t3[1] = p1ap3_1 - p2[1] - p4[1];\n    /* col 4 */\n    t4[0] = p1sp3_0 - p2[1] + p4[1];\n    t4[1] = p1sp3_1 + p2[0] - p4[0];\n    /* col 1 - top */\n    *p1++ = p1ap3_0 + p2[0] + p4[0];\n    *p1++ = p1ap3_1 + p2[1] + p4[1];\n\n    /* BOTTOM */\n    p1ap3_1 = pEnd1[-1] + pEnd3[-1];\n    p1sp3_1 = pEnd1[-1] - pEnd3[-1];\n    p1ap3_0 = pEnd1[0] + pEnd3[0];\n    p1sp3_0 = pEnd1[0] - pEnd3[0];\n    /* col 2 */\n    t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1;\n    t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];\n    /* col 3 */\n    t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];\n    t3[3] = p1ap3_0 - pEnd2[0] - pEnd4[0];\n    /* col 4 */\n    t4[2] = pEnd2[0] - pEnd4[0] - p1sp3_1;\n    t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;\n    /* col 1 - Bottom */\n    *pEnd1-- = p1ap3_0 + pEnd2[0] + pEnd4[0];\n    *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];\n\n    /* COL 2 */\n    /* read twiddle factors */\n    twR = *tw2++;\n    twI = *tw2++;\n    /* multiply by twiddle factors */\n    /*  let    Z1 = a + i(b),   Z2 = c + i(d) */\n    /*   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d) */\n\n    /* Top */\n    m0 = t2[0] * twR;\n    m1 = t2[1] * twI;\n    m2 = t2[1] * twR;\n    m3 = t2[0] * twI;\n\n    *p2++ = m0 + m1;\n    *p2++ = m2 - m3;\n    /* use vertical symmetry col 2 */\n    /* 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i */\n    /* Bottom */\n    m0 = t2[3] * twI;\n    m1 = t2[2] * twR;\n    m2 = t2[2] * twI;\n    m3 = t2[3] * twR;\n\n    *pEnd2-- = m0 - m1;\n    *pEnd2-- = m2 + m3;\n\n    /* COL 3 */\n    twR = tw3[0];\n    twI = tw3[1];\n    tw3 += twMod3;\n    /* Top */\n    m0 = t3[0] * twR;\n    m1 = t3[1] * twI;\n    m2 = t3[1] * twR;\n    m3 = t3[0] * twI;\n\n    *p3++ = m0 + m1;\n    *p3++ = m2 - m3;\n    /* use vertical symmetry col 3 */\n    /* 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i */\n    /* Bottom */\n    m0 = -t3[3] * twR;\n    m1 = t3[2] * twI;\n    m2 = t3[2] * twR;\n    m3 = t3[3] * twI;\n\n    *pEnd3-- = m0 - m1;\n    *pEnd3-- = m3 - m2;\n\n    /* COL 4 */\n    twR = tw4[0];\n    twI = tw4[1];\n    tw4 += twMod4;\n    /* Top */\n    m0 = t4[0] * twR;\n    m1 = t4[1] * twI;\n    m2 = t4[1] * twR;\n    m3 = t4[0] * twI;\n\n    *p4++ = m0 + m1;\n    *p4++ = m2 - m3;\n    /* use vertical symmetry col 4 */\n    /* 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i */\n    /* Bottom */\n    m0 = t4[3] * twI;\n    m1 = t4[2] * twR;\n    m2 = t4[2] * twI;\n    m3 = t4[3] * twR;\n\n    *pEnd4-- = m0 - m1;\n    *pEnd4-- = m2 + m3;\n  }\n\n  /* MIDDLE */\n  /* Twiddle factors are */\n  /*  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i */\n  p1ap3_0 = p1[0] + p3[0];\n  p1sp3_0 = p1[0] - p3[0];\n  p1ap3_1 = p1[1] + p3[1];\n  p1sp3_1 = p1[1] - p3[1];\n\n  /* col 2 */\n  t2[0] = p1sp3_0 + p2[1] - p4[1];\n  t2[1] = p1sp3_1 - p2[0] + p4[0];\n  /* col 3 */\n  t3[0] = p1ap3_0 - p2[0] - p4[0];\n  t3[1] = p1ap3_1 - p2[1] - p4[1];\n  /* col 4 */\n  t4[0] = p1sp3_0 - p2[1] + p4[1];\n  t4[1] = p1sp3_1 + p2[0] - p4[0];\n  /* col 1 - Top */\n  *p1++ = p1ap3_0 + p2[0] + p4[0];\n  *p1++ = p1ap3_1 + p2[1] + p4[1];\n\n  /* COL 2 */\n  twR = tw2[0];\n  twI = tw2[1];\n\n  m0 = t2[0] * twR;\n  m1 = t2[1] * twI;\n  m2 = t2[1] * twR;\n  m3 = t2[0] * twI;\n\n  *p2++ = m0 + m1;\n  *p2++ = m2 - m3;\n  /* COL 3 */\n  twR = tw3[0];\n  twI = tw3[1];\n\n  m0 = t3[0] * twR;\n  m1 = t3[1] * twI;\n  m2 = t3[1] * twR;\n  m3 = t3[0] * twI;\n\n  *p3++ = m0 + m1;\n  *p3++ = m2 - m3;\n  /* COL 4 */\n  twR = tw4[0];\n  twI = tw4[1];\n\n  m0 = t4[0] * twR;\n  m1 = t4[1] * twI;\n  m2 = t4[1] * twR;\n  m3 = t4[0] * twI;\n\n  *p4++ = m0 + m1;\n  *p4++ = m2 - m3;\n\n  /* first col */\n  arm_radix8_butterfly_f32(pCol1, L, (float32_t *)S->pTwiddle, 4U);\n\n  /* second col */\n  arm_radix8_butterfly_f32(pCol2, L, (float32_t *)S->pTwiddle, 4U);\n\n  /* third col */\n  arm_radix8_butterfly_f32(pCol3, L, (float32_t *)S->pTwiddle, 4U);\n\n  /* fourth col */\n  arm_radix8_butterfly_f32(pCol4, L, (float32_t *)S->pTwiddle, 4U);\n}\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point complex FFT.\n  @param[in]     S              points to an instance of the floating-point CFFT\n  structure\n  @param[in,out] p1             points to the complex data buffer of size\n  2*fftLen. Processing occurs in-place\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        none\n */\n\nvoid arm_cfft_f32(const arm_cfft_instance_f32 *S, float32_t *p1,\n                  uint8_t ifftFlag, uint8_t bitReverseFlag) {\n  uint32_t L = S->fftLen, l;\n  float32_t invL, *pSrc;\n\n  if (ifftFlag == 1U) {\n    /* Conjugate input data */\n    pSrc = p1 + 1;\n    for (l = 0; l < L; l++) {\n      *pSrc = -*pSrc;\n      pSrc += 2;\n    }\n  }\n\n  switch (L) {\n  case 16:\n  case 128:\n  case 1024:\n    arm_cfft_radix8by2_f32((arm_cfft_instance_f32 *)S, p1);\n    break;\n  case 32:\n  case 256:\n  case 2048:\n    arm_cfft_radix8by4_f32((arm_cfft_instance_f32 *)S, p1);\n    break;\n  case 64:\n  case 512:\n  case 4096:\n    arm_radix8_butterfly_f32(p1, L, (float32_t *)S->pTwiddle, 1);\n    break;\n  }\n\n  if (bitReverseFlag)\n    arm_bitreversal_32((uint32_t *)p1, S->bitRevLength, S->pBitRevTable);\n\n  if (ifftFlag == 1U) {\n    invL = 1.0f / (float32_t)L;\n\n    /* Conjugate and scale output data */\n    pSrc = p1;\n    for (l = 0; l < L; l++) {\n      *pSrc++ *= invL;\n      *pSrc = -(*pSrc) * invL;\n      pSrc++;\n    }\n  }\n}\n\n/**\n  @} end of ComplexFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_q15.c\n * Description:  Combined Radix Decimation in Q15 Frequency CFFT processing\n * function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nextern void arm_radix4_butterfly_q15(q15_t *pSrc, uint32_t fftLen,\n                                     const q15_t *pCoef,\n                                     uint32_t twidCoefModifier);\n\nextern void arm_radix4_butterfly_inverse_q15(q15_t *pSrc, uint32_t fftLen,\n                                             const q15_t *pCoef,\n                                             uint32_t twidCoefModifier);\n\nextern void arm_bitreversal_16(uint16_t *pSrc, const uint16_t bitRevLen,\n                               const uint16_t *pBitRevTable);\n\nvoid arm_cfft_radix4by2_q15(q15_t *pSrc, uint32_t fftLen, const q15_t *pCoef);\n\nvoid arm_cfft_radix4by2_inverse_q15(q15_t *pSrc, uint32_t fftLen,\n                                    const q15_t *pCoef);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Processing function for Q15 complex FFT.\n  @param[in]     S               points to an instance of Q15 CFFT structure\n  @param[in,out] p1              points to the complex data buffer of size\n  2*fftLen. Processing occurs in-place\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        none\n */\n\nvoid arm_cfft_q15(const arm_cfft_instance_q15 *S, q15_t *p1, uint8_t ifftFlag,\n                  uint8_t bitReverseFlag) {\n  uint32_t L = S->fftLen;\n\n  if (ifftFlag == 1U) {\n    switch (L) {\n    case 16:\n    case 64:\n    case 256:\n    case 1024:\n    case 4096:\n      arm_radix4_butterfly_inverse_q15(p1, L, (q15_t *)S->pTwiddle, 1);\n      break;\n\n    case 32:\n    case 128:\n    case 512:\n    case 2048:\n      arm_cfft_radix4by2_inverse_q15(p1, L, S->pTwiddle);\n      break;\n    }\n  } else {\n    switch (L) {\n    case 16:\n    case 64:\n    case 256:\n    case 1024:\n    case 4096:\n      arm_radix4_butterfly_q15(p1, L, (q15_t *)S->pTwiddle, 1);\n      break;\n\n    case 32:\n    case 128:\n    case 512:\n    case 2048:\n      arm_cfft_radix4by2_q15(p1, L, S->pTwiddle);\n      break;\n    }\n  }\n\n  if (bitReverseFlag)\n    arm_bitreversal_16((uint16_t *)p1, S->bitRevLength, S->pBitRevTable);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n\nvoid arm_cfft_radix4by2_q15(q15_t *pSrc, uint32_t fftLen, const q15_t *pCoef) {\n  uint32_t i;\n  uint32_t n2;\n  q15_t p0, p1, p2, p3;\n#if defined(ARM_MATH_DSP)\n  q31_t T, S, R;\n  q31_t coeff, out1, out2;\n  const q15_t *pC = pCoef;\n  q15_t *pSi = pSrc;\n  q15_t *pSl = pSrc + fftLen;\n#else\n  uint32_t l;\n  q15_t xt, yt, cosVal, sinVal;\n#endif\n\n  n2 = fftLen >> 1U;\n\n#if defined(ARM_MATH_DSP)\n\n  for (i = n2; i > 0; i--) {\n    coeff = read_q15x2_ia((q15_t **)&pC);\n\n    T = read_q15x2(pSi);\n    T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */\n\n    S = read_q15x2(pSl);\n    S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */\n\n    R = __QSUB16(T, S);\n\n    write_q15x2_ia(&pSi, __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    out1 = __SMUAD(coeff, R) >> 16U;\n    out2 = __SMUSDX(coeff, R);\n#else\n    out1 = __SMUSDX(R, coeff) >> 16U;\n    out2 = __SMUAD(coeff, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    write_q15x2_ia(&pSl, (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n  }\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  for (i = 0; i < n2; i++) {\n    cosVal = pCoef[2 * i];\n    sinVal = pCoef[2 * i + 1];\n\n    l = i + n2;\n\n    xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);\n    pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;\n\n    yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);\n    pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;\n\n    pSrc[2 * l] = (((int16_t)(((q31_t)xt * cosVal) >> 16U)) +\n                   ((int16_t)(((q31_t)yt * sinVal) >> 16U)));\n\n    pSrc[2 * l + 1] = (((int16_t)(((q31_t)yt * cosVal) >> 16U)) -\n                       ((int16_t)(((q31_t)xt * sinVal) >> 16U)));\n  }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n  /* first col */\n  arm_radix4_butterfly_q15(pSrc, n2, (q15_t *)pCoef, 2U);\n\n  /* second col */\n  arm_radix4_butterfly_q15(pSrc + fftLen, n2, (q15_t *)pCoef, 2U);\n\n  n2 = fftLen >> 1U;\n  for (i = 0; i < n2; i++) {\n    p0 = pSrc[4 * i + 0];\n    p1 = pSrc[4 * i + 1];\n    p2 = pSrc[4 * i + 2];\n    p3 = pSrc[4 * i + 3];\n\n    p0 <<= 1U;\n    p1 <<= 1U;\n    p2 <<= 1U;\n    p3 <<= 1U;\n\n    pSrc[4 * i + 0] = p0;\n    pSrc[4 * i + 1] = p1;\n    pSrc[4 * i + 2] = p2;\n    pSrc[4 * i + 3] = p3;\n  }\n}\n\nvoid arm_cfft_radix4by2_inverse_q15(q15_t *pSrc, uint32_t fftLen,\n                                    const q15_t *pCoef) {\n  uint32_t i;\n  uint32_t n2;\n  q15_t p0, p1, p2, p3;\n#if defined(ARM_MATH_DSP)\n  q31_t T, S, R;\n  q31_t coeff, out1, out2;\n  const q15_t *pC = pCoef;\n  q15_t *pSi = pSrc;\n  q15_t *pSl = pSrc + fftLen;\n#else\n  uint32_t l;\n  q15_t xt, yt, cosVal, sinVal;\n#endif\n\n  n2 = fftLen >> 1U;\n\n#if defined(ARM_MATH_DSP)\n\n  for (i = n2; i > 0; i--) {\n    coeff = read_q15x2_ia((q15_t **)&pC);\n\n    T = read_q15x2(pSi);\n    T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */\n\n    S = read_q15x2(pSl);\n    S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */\n\n    R = __QSUB16(T, S);\n\n    write_q15x2_ia(&pSi, __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    out1 = __SMUSD(coeff, R) >> 16U;\n    out2 = __SMUADX(coeff, R);\n#else\n    out1 = __SMUADX(R, coeff) >> 16U;\n    out2 = __SMUSD(__QSUB(0, coeff), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    write_q15x2_ia(&pSl, (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n  }\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  for (i = 0; i < n2; i++) {\n    cosVal = pCoef[2 * i];\n    sinVal = pCoef[2 * i + 1];\n\n    l = i + n2;\n\n    xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);\n    pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;\n\n    yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);\n    pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;\n\n    pSrc[2 * l] = (((int16_t)(((q31_t)xt * cosVal) >> 16U)) -\n                   ((int16_t)(((q31_t)yt * sinVal) >> 16U)));\n\n    pSrc[2 * l + 1] = (((int16_t)(((q31_t)yt * cosVal) >> 16U)) +\n                       ((int16_t)(((q31_t)xt * sinVal) >> 16U)));\n  }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n  /* first col */\n  arm_radix4_butterfly_inverse_q15(pSrc, n2, (q15_t *)pCoef, 2U);\n\n  /* second col */\n  arm_radix4_butterfly_inverse_q15(pSrc + fftLen, n2, (q15_t *)pCoef, 2U);\n\n  n2 = fftLen >> 1U;\n  for (i = 0; i < n2; i++) {\n    p0 = pSrc[4 * i + 0];\n    p1 = pSrc[4 * i + 1];\n    p2 = pSrc[4 * i + 2];\n    p3 = pSrc[4 * i + 3];\n\n    p0 <<= 1U;\n    p1 <<= 1U;\n    p2 <<= 1U;\n    p3 <<= 1U;\n\n    pSrc[4 * i + 0] = p0;\n    pSrc[4 * i + 1] = p1;\n    pSrc[4 * i + 2] = p2;\n    pSrc[4 * i + 3] = p3;\n  }\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_q31.c\n * Description:  Combined Radix Decimation in Frequency CFFT fixed point\n * processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nextern void arm_radix4_butterfly_q31(q31_t *pSrc, uint32_t fftLen,\n                                     const q31_t *pCoef,\n                                     uint32_t twidCoefModifier);\n\nextern void arm_radix4_butterfly_inverse_q31(q31_t *pSrc, uint32_t fftLen,\n                                             const q31_t *pCoef,\n                                             uint32_t twidCoefModifier);\n\nextern void arm_bitreversal_32(uint32_t *pSrc, const uint16_t bitRevLen,\n                               const uint16_t *pBitRevTable);\n\nvoid arm_cfft_radix4by2_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef);\n\nvoid arm_cfft_radix4by2_inverse_q31(q31_t *pSrc, uint32_t fftLen,\n                                    const q31_t *pCoef);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 complex FFT.\n  @param[in]     S               points to an instance of the fixed-point CFFT\n  structure\n  @param[in,out] p1              points to the complex data buffer of size\n  2*fftLen. Processing occurs in-place\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        none\n */\n\nvoid arm_cfft_q31(const arm_cfft_instance_q31 *S, q31_t *p1, uint8_t ifftFlag,\n                  uint8_t bitReverseFlag) {\n  uint32_t L = S->fftLen;\n\n  if (ifftFlag == 1U) {\n    switch (L) {\n    case 16:\n    case 64:\n    case 256:\n    case 1024:\n    case 4096:\n      arm_radix4_butterfly_inverse_q31(p1, L, (q31_t *)S->pTwiddle, 1);\n      break;\n\n    case 32:\n    case 128:\n    case 512:\n    case 2048:\n      arm_cfft_radix4by2_inverse_q31(p1, L, S->pTwiddle);\n      break;\n    }\n  } else {\n    switch (L) {\n    case 16:\n    case 64:\n    case 256:\n    case 1024:\n    case 4096:\n      arm_radix4_butterfly_q31(p1, L, (q31_t *)S->pTwiddle, 1);\n      break;\n\n    case 32:\n    case 128:\n    case 512:\n    case 2048:\n      arm_cfft_radix4by2_q31(p1, L, S->pTwiddle);\n      break;\n    }\n  }\n\n  if (bitReverseFlag)\n    arm_bitreversal_32((uint32_t *)p1, S->bitRevLength, S->pBitRevTable);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n\nvoid arm_cfft_radix4by2_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef) {\n  uint32_t i, l;\n  uint32_t n2;\n  q31_t xt, yt, cosVal, sinVal;\n  q31_t p0, p1;\n\n  n2 = fftLen >> 1U;\n  for (i = 0; i < n2; i++) {\n    cosVal = pCoef[2 * i];\n    sinVal = pCoef[2 * i + 1];\n\n    l = i + n2;\n\n    xt = (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);\n    pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);\n\n    yt = (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);\n    pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);\n\n    mult_32x32_keep32_R(p0, xt, cosVal);\n    mult_32x32_keep32_R(p1, yt, cosVal);\n    multAcc_32x32_keep32_R(p0, yt, sinVal);\n    multSub_32x32_keep32_R(p1, xt, sinVal);\n\n    pSrc[2 * l] = p0 << 1;\n    pSrc[2 * l + 1] = p1 << 1;\n  }\n\n  /* first col */\n  arm_radix4_butterfly_q31(pSrc, n2, (q31_t *)pCoef, 2U);\n\n  /* second col */\n  arm_radix4_butterfly_q31(pSrc + fftLen, n2, (q31_t *)pCoef, 2U);\n\n  n2 = fftLen >> 1U;\n  for (i = 0; i < n2; i++) {\n    p0 = pSrc[4 * i + 0];\n    p1 = pSrc[4 * i + 1];\n    xt = pSrc[4 * i + 2];\n    yt = pSrc[4 * i + 3];\n\n    p0 <<= 1U;\n    p1 <<= 1U;\n    xt <<= 1U;\n    yt <<= 1U;\n\n    pSrc[4 * i + 0] = p0;\n    pSrc[4 * i + 1] = p1;\n    pSrc[4 * i + 2] = xt;\n    pSrc[4 * i + 3] = yt;\n  }\n}\n\nvoid arm_cfft_radix4by2_inverse_q31(q31_t *pSrc, uint32_t fftLen,\n                                    const q31_t *pCoef) {\n  uint32_t i, l;\n  uint32_t n2;\n  q31_t xt, yt, cosVal, sinVal;\n  q31_t p0, p1;\n\n  n2 = fftLen >> 1U;\n  for (i = 0; i < n2; i++) {\n    cosVal = pCoef[2 * i];\n    sinVal = pCoef[2 * i + 1];\n\n    l = i + n2;\n\n    xt = (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);\n    pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);\n\n    yt = (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);\n    pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);\n\n    mult_32x32_keep32_R(p0, xt, cosVal);\n    mult_32x32_keep32_R(p1, yt, cosVal);\n    multSub_32x32_keep32_R(p0, yt, sinVal);\n    multAcc_32x32_keep32_R(p1, xt, sinVal);\n\n    pSrc[2 * l] = p0 << 1U;\n    pSrc[2 * l + 1] = p1 << 1U;\n  }\n\n  /* first col */\n  arm_radix4_butterfly_inverse_q31(pSrc, n2, (q31_t *)pCoef, 2U);\n\n  /* second col */\n  arm_radix4_butterfly_inverse_q31(pSrc + fftLen, n2, (q31_t *)pCoef, 2U);\n\n  n2 = fftLen >> 1U;\n  for (i = 0; i < n2; i++) {\n    p0 = pSrc[4 * i + 0];\n    p1 = pSrc[4 * i + 1];\n    xt = pSrc[4 * i + 2];\n    yt = pSrc[4 * i + 3];\n\n    p0 <<= 1U;\n    p1 <<= 1U;\n    xt <<= 1U;\n    yt <<= 1U;\n\n    pSrc[4 * i + 0] = p0;\n    pSrc[4 * i + 1] = p1;\n    pSrc[4 * i + 2] = xt;\n    pSrc[4 * i + 3] = yt;\n  }\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix2_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix2_f32.c\n * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Floating point\n * processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nvoid arm_radix2_butterfly_f32(float32_t *pSrc, uint32_t fftLen,\n                              const float32_t *pCoef,\n                              uint16_t twidCoefModifier);\n\nvoid arm_radix2_butterfly_inverse_f32(float32_t *pSrc, uint32_t fftLen,\n                                      const float32_t *pCoef,\n                                      uint16_t twidCoefModifier,\n                                      float32_t onebyfftLen);\n\nextern void arm_bitreversal_f32(float32_t *pSrc, uint16_t fftSize,\n                                uint16_t bitRevFactor,\n                                const uint16_t *pBitRevTab);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Radix-2 CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superseded by \\ref\n  arm_cfft_f32 and will be removed in the future\n  @param[in]     S    points to an instance of the floating-point Radix-2\n  CFFT/CIFFT structure\n  @param[in,out] pSrc points to the complex data buffer of size\n  2*fftLen. Processing occurs in-place\n  @return        none\n */\n\nvoid arm_cfft_radix2_f32(const arm_cfft_radix2_instance_f32 *S,\n                         float32_t *pSrc) {\n\n  if (S->ifftFlag == 1U) {\n    /* Complex IFFT radix-2 */\n    arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,\n                                     S->twidCoefModifier, S->onebyfftLen);\n  } else {\n    /* Complex FFT radix-2 */\n    arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);\n  }\n\n  if (S->bitReverseFlag == 1U) {\n    /* Bit Reversal */\n    arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);\n  }\n}\n\n/**\n  @} end of ComplexFFT group\n */\n\n/* ----------------------------------------------------------------------\n ** Internal helper function used by the FFTs\n ** ------------------------------------------------------------------- */\n\n/**\n  brief  Core function for the floating-point CFFT butterfly process.\n  param[in,out] pSrc             points to in-place buffer of floating-point\n  data type param[in]     fftLen           length of the FFT param[in]     pCoef\n  points to twiddle coefficient buffer param[in]     twidCoefModifier twiddle\n  coefficient modifier that supports different size FFTs with the same twiddle\n  factor table return        none\n */\n\nvoid arm_radix2_butterfly_f32(float32_t *pSrc, uint32_t fftLen,\n                              const float32_t *pCoef,\n                              uint16_t twidCoefModifier) {\n\n  uint32_t i, j, k, l;\n  uint32_t n1, n2, ia;\n  float32_t xt, yt, cosVal, sinVal;\n  float32_t p0, p1, p2, p3;\n  float32_t a0, a1;\n\n#if defined(ARM_MATH_DSP)\n\n  /*  Initializations for the first stage */\n  n2 = fftLen >> 1;\n  ia = 0;\n  i = 0;\n\n  // loop for groups\n  for (k = n2; k > 0; k--) {\n    cosVal = pCoef[ia * 2];\n    sinVal = pCoef[(ia * 2) + 1];\n\n    /*  Twiddle coefficients index modifier */\n    ia += twidCoefModifier;\n\n    /*  index calculation for the input as, */\n    /*  pSrc[i + 0], pSrc[i + fftLen/1] */\n    l = i + n2;\n\n    /*  Butterfly implementation */\n    a0 = pSrc[2 * i] + pSrc[2 * l];\n    xt = pSrc[2 * i] - pSrc[2 * l];\n\n    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n    a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];\n\n    p0 = xt * cosVal;\n    p1 = yt * sinVal;\n    p2 = yt * cosVal;\n    p3 = xt * sinVal;\n\n    pSrc[2 * i] = a0;\n    pSrc[2 * i + 1] = a1;\n\n    pSrc[2 * l] = p0 + p1;\n    pSrc[2 * l + 1] = p2 - p3;\n\n    i++;\n  } // groups loop end\n\n  twidCoefModifier <<= 1U;\n\n  // loop for stage\n  for (k = n2; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    // loop for groups\n    j = 0;\n    do {\n      cosVal = pCoef[ia * 2];\n      sinVal = pCoef[(ia * 2) + 1];\n      ia += twidCoefModifier;\n\n      // loop for butterfly\n      i = j;\n      do {\n        l = i + n2;\n        a0 = pSrc[2 * i] + pSrc[2 * l];\n        xt = pSrc[2 * i] - pSrc[2 * l];\n\n        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n        a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];\n\n        p0 = xt * cosVal;\n        p1 = yt * sinVal;\n        p2 = yt * cosVal;\n        p3 = xt * sinVal;\n\n        pSrc[2 * i] = a0;\n        pSrc[2 * i + 1] = a1;\n\n        pSrc[2 * l] = p0 + p1;\n        pSrc[2 * l + 1] = p2 - p3;\n\n        i += n1;\n      } while (i < fftLen); // butterfly loop end\n      j++;\n    } while (j < n2); // groups loop end\n    twidCoefModifier <<= 1U;\n  } // stages loop end\n\n  // loop for butterfly\n  for (i = 0; i < fftLen; i += 2) {\n    a0 = pSrc[2 * i] + pSrc[2 * i + 2];\n    xt = pSrc[2 * i] - pSrc[2 * i + 2];\n\n    yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];\n    a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];\n\n    pSrc[2 * i] = a0;\n    pSrc[2 * i + 1] = a1;\n    pSrc[2 * i + 2] = xt;\n    pSrc[2 * i + 3] = yt;\n  } // groups loop end\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  n2 = fftLen;\n\n  // loop for stage\n  for (k = fftLen; k > 1; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    // loop for groups\n    j = 0;\n    do {\n      cosVal = pCoef[ia * 2];\n      sinVal = pCoef[(ia * 2) + 1];\n      ia += twidCoefModifier;\n\n      // loop for butterfly\n      i = j;\n      do {\n        l = i + n2;\n        a0 = pSrc[2 * i] + pSrc[2 * l];\n        xt = pSrc[2 * i] - pSrc[2 * l];\n\n        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n        a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];\n\n        p0 = xt * cosVal;\n        p1 = yt * sinVal;\n        p2 = yt * cosVal;\n        p3 = xt * sinVal;\n\n        pSrc[2 * i] = a0;\n        pSrc[2 * i + 1] = a1;\n\n        pSrc[2 * l] = p0 + p1;\n        pSrc[2 * l + 1] = p2 - p3;\n\n        i += n1;\n      } while (i < fftLen);\n      j++;\n    } while (j < n2);\n    twidCoefModifier <<= 1U;\n  }\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\nvoid arm_radix2_butterfly_inverse_f32(float32_t *pSrc, uint32_t fftLen,\n                                      const float32_t *pCoef,\n                                      uint16_t twidCoefModifier,\n                                      float32_t onebyfftLen) {\n\n  uint32_t i, j, k, l;\n  uint32_t n1, n2, ia;\n  float32_t xt, yt, cosVal, sinVal;\n  float32_t p0, p1, p2, p3;\n  float32_t a0, a1;\n\n#if defined(ARM_MATH_DSP)\n\n  n2 = fftLen >> 1;\n  ia = 0;\n\n  // loop for groups\n  for (i = 0; i < n2; i++) {\n    cosVal = pCoef[ia * 2];\n    sinVal = pCoef[(ia * 2) + 1];\n    ia += twidCoefModifier;\n\n    l = i + n2;\n    a0 = pSrc[2 * i] + pSrc[2 * l];\n    xt = pSrc[2 * i] - pSrc[2 * l];\n\n    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n    a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];\n\n    p0 = xt * cosVal;\n    p1 = yt * sinVal;\n    p2 = yt * cosVal;\n    p3 = xt * sinVal;\n\n    pSrc[2 * i] = a0;\n    pSrc[2 * i + 1] = a1;\n\n    pSrc[2 * l] = p0 - p1;\n    pSrc[2 * l + 1] = p2 + p3;\n  } // groups loop end\n\n  twidCoefModifier <<= 1U;\n\n  // loop for stage\n  for (k = fftLen / 2; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    // loop for groups\n    j = 0;\n    do {\n      cosVal = pCoef[ia * 2];\n      sinVal = pCoef[(ia * 2) + 1];\n      ia += twidCoefModifier;\n\n      // loop for butterfly\n      i = j;\n      do {\n        l = i + n2;\n        a0 = pSrc[2 * i] + pSrc[2 * l];\n        xt = pSrc[2 * i] - pSrc[2 * l];\n\n        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n        a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];\n\n        p0 = xt * cosVal;\n        p1 = yt * sinVal;\n        p2 = yt * cosVal;\n        p3 = xt * sinVal;\n\n        pSrc[2 * i] = a0;\n        pSrc[2 * i + 1] = a1;\n\n        pSrc[2 * l] = p0 - p1;\n        pSrc[2 * l + 1] = p2 + p3;\n\n        i += n1;\n      } while (i < fftLen); // butterfly loop end\n      j++;\n    } while (j < n2); // groups loop end\n\n    twidCoefModifier <<= 1U;\n  } // stages loop end\n\n  // loop for butterfly\n  for (i = 0; i < fftLen; i += 2) {\n    a0 = pSrc[2 * i] + pSrc[2 * i + 2];\n    xt = pSrc[2 * i] - pSrc[2 * i + 2];\n\n    a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];\n    yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];\n\n    p0 = a0 * onebyfftLen;\n    p2 = xt * onebyfftLen;\n    p1 = a1 * onebyfftLen;\n    p3 = yt * onebyfftLen;\n\n    pSrc[2 * i] = p0;\n    pSrc[2 * i + 1] = p1;\n    pSrc[2 * i + 2] = p2;\n    pSrc[2 * i + 3] = p3;\n  } // butterfly loop end\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  n2 = fftLen;\n\n  // loop for stage\n  for (k = fftLen; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    // loop for groups\n    j = 0;\n    do {\n      cosVal = pCoef[ia * 2];\n      sinVal = pCoef[(ia * 2) + 1];\n      ia = ia + twidCoefModifier;\n\n      // loop for butterfly\n      i = j;\n      do {\n        l = i + n2;\n        a0 = pSrc[2 * i] + pSrc[2 * l];\n        xt = pSrc[2 * i] - pSrc[2 * l];\n\n        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n        a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];\n\n        p0 = xt * cosVal;\n        p1 = yt * sinVal;\n        p2 = yt * cosVal;\n        p3 = xt * sinVal;\n\n        pSrc[2 * i] = a0;\n        pSrc[2 * i + 1] = a1;\n\n        pSrc[2 * l] = p0 - p1;\n        pSrc[2 * l + 1] = p2 + p3;\n\n        i += n1;\n      } while (i < fftLen); // butterfly loop end\n      j++;\n    } while (j < n2); // groups loop end\n\n    twidCoefModifier = twidCoefModifier << 1U;\n  } // stages loop end\n\n  n1 = n2;\n  n2 = n2 >> 1;\n\n  // loop for butterfly\n  for (i = 0; i < fftLen; i += n1) {\n    l = i + n2;\n\n    a0 = pSrc[2 * i] + pSrc[2 * l];\n    xt = pSrc[2 * i] - pSrc[2 * l];\n\n    a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];\n    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n\n    p0 = a0 * onebyfftLen;\n    p2 = xt * onebyfftLen;\n    p1 = a1 * onebyfftLen;\n    p3 = yt * onebyfftLen;\n\n    pSrc[2 * i] = p0;\n    pSrc[2 * l] = p2;\n\n    pSrc[2 * i + 1] = p1;\n    pSrc[2 * l + 1] = p3;\n  } // butterfly loop end\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix2_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix2_init_f32.c\n * Description:  Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT\n * Initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superseded by \\ref\n  arm_cfft_f32 and will be removed in the future.\n  @param[in,out] S              points to an instance of the floating-point\n  CFFT/CIFFT structure\n  @param[in]     fftLen         length of the FFT\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a\n  supported length\n\n  @par           Details\n                   The parameter ifftFlag controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlag for calculation of\n  CIFFT otherwise  CFFT is calculated\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   The parameter fftLen Specifies length of\n  CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.\n  @par\n                   This Function also initializes Twiddle factor table pointer\n  and Bit reversal table pointer.\n*/\n\narm_status arm_cfft_radix2_init_f32(arm_cfft_radix2_instance_f32 *S,\n                                    uint16_t fftLen, uint8_t ifftFlag,\n                                    uint8_t bitReverseFlag) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /*  Initialise the FFT length */\n  S->fftLen = fftLen;\n\n  /*  Initialise the Twiddle coefficient pointer */\n  S->pTwiddle = (float32_t *)twiddleCoef;\n\n  /*  Initialise the Flag for selection of CFFT or CIFFT */\n  S->ifftFlag = ifftFlag;\n\n  /*  Initialise the Flag for calculation Bit reversal or not */\n  S->bitReverseFlag = bitReverseFlag;\n\n  /*  Initializations of structure parameters depending on the FFT length */\n  switch (S->fftLen) {\n\n  case 4096U:\n    /*  Initializations of structure parameters for 4096 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 1U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 1U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)armBitRevTable;\n    /*  Initialise the 1/fftLen Value */\n    S->onebyfftLen = 0.000244140625;\n    break;\n\n  case 2048U:\n    /*  Initializations of structure parameters for 2048 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 2U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 2U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[1];\n    /*  Initialise the 1/fftLen Value */\n    S->onebyfftLen = 0.00048828125;\n    break;\n\n  case 1024U:\n    /*  Initializations of structure parameters for 1024 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 4U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 4U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[3];\n    /*  Initialise the 1/fftLen Value */\n    S->onebyfftLen = 0.0009765625f;\n    break;\n\n  case 512U:\n    /*  Initializations of structure parameters for 512 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 8U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 8U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[7];\n    /*  Initialise the 1/fftLen Value */\n    S->onebyfftLen = 0.001953125;\n    break;\n\n  case 256U:\n    /*  Initializations of structure parameters for 256 point FFT */\n    S->twidCoefModifier = 16U;\n    S->bitRevFactor = 16U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[15];\n    S->onebyfftLen = 0.00390625f;\n    break;\n\n  case 128U:\n    /*  Initializations of structure parameters for 128 point FFT */\n    S->twidCoefModifier = 32U;\n    S->bitRevFactor = 32U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[31];\n    S->onebyfftLen = 0.0078125;\n    break;\n\n  case 64U:\n    /*  Initializations of structure parameters for 64 point FFT */\n    S->twidCoefModifier = 64U;\n    S->bitRevFactor = 64U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[63];\n    S->onebyfftLen = 0.015625f;\n    break;\n\n  case 32U:\n    /*  Initializations of structure parameters for 64 point FFT */\n    S->twidCoefModifier = 128U;\n    S->bitRevFactor = 128U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[127];\n    S->onebyfftLen = 0.03125;\n    break;\n\n  case 16U:\n    /*  Initializations of structure parameters for 16 point FFT */\n    S->twidCoefModifier = 256U;\n    S->bitRevFactor = 256U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[255];\n    S->onebyfftLen = 0.0625f;\n    break;\n\n  default:\n    /*  Reporting argument error if fftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix2_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix2_init_q15.c\n * Description:  Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization\n * function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief                        Initialization function for the Q15 CFFT/CIFFT.\n  @deprecated                   Do not use this function. It has been superseded\n  by \\ref arm_cfft_q15 and will be removed\n  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT\n  structure.\n  @param[in]     fftLen         length of the FFT.\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a\n  supported length\n\n  @par           Details\n                   The parameter ifftFlag controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlag for calculation of\n  CIFFT otherwise  CFFT is calculated\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   The parameter fftLen Specifies length of\n  CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.\n  @par\n                   This Function also initializes Twiddle factor table pointer\n  and Bit reversal table pointer.\n*/\n\narm_status arm_cfft_radix2_init_q15(arm_cfft_radix2_instance_q15 *S,\n                                    uint16_t fftLen, uint8_t ifftFlag,\n                                    uint8_t bitReverseFlag) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /*  Initialise the FFT length */\n  S->fftLen = fftLen;\n\n  /*  Initialise the Twiddle coefficient pointer */\n  S->pTwiddle = (q15_t *)twiddleCoef_4096_q15;\n  /*  Initialise the Flag for selection of CFFT or CIFFT */\n  S->ifftFlag = ifftFlag;\n  /*  Initialise the Flag for calculation Bit reversal or not */\n  S->bitReverseFlag = bitReverseFlag;\n\n  /*  Initializations of structure parameters depending on the FFT length */\n  switch (S->fftLen) {\n  case 4096U:\n    /*  Initializations of structure parameters for 4096 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 1U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 1U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)armBitRevTable;\n\n    break;\n\n  case 2048U:\n    /*  Initializations of structure parameters for 2048 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 2U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 2U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[1];\n\n    break;\n\n  case 1024U:\n    /*  Initializations of structure parameters for 1024 point FFT */\n    S->twidCoefModifier = 4U;\n    S->bitRevFactor = 4U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[3];\n\n    break;\n\n  case 512U:\n    /*  Initializations of structure parameters for 512 point FFT */\n    S->twidCoefModifier = 8U;\n    S->bitRevFactor = 8U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[7];\n\n    break;\n\n  case 256U:\n    /*  Initializations of structure parameters for 256 point FFT */\n    S->twidCoefModifier = 16U;\n    S->bitRevFactor = 16U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[15];\n\n    break;\n\n  case 128U:\n    /*  Initializations of structure parameters for 128 point FFT */\n    S->twidCoefModifier = 32U;\n    S->bitRevFactor = 32U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[31];\n\n    break;\n\n  case 64U:\n    /*  Initializations of structure parameters for 64 point FFT */\n    S->twidCoefModifier = 64U;\n    S->bitRevFactor = 64U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[63];\n\n    break;\n\n  case 32U:\n    /*  Initializations of structure parameters for 32 point FFT */\n    S->twidCoefModifier = 128U;\n    S->bitRevFactor = 128U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[127];\n\n    break;\n\n  case 16U:\n    /*  Initializations of structure parameters for 16 point FFT */\n    S->twidCoefModifier = 256U;\n    S->bitRevFactor = 256U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[255];\n\n    break;\n\n  default:\n    /*  Reporting argument error if fftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix2_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix2_init_q31.c\n * Description:  Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT\n * Initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superseded by \\ref\n  arm_cfft_q31 and will be removed in the future.\n  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT\n  structure\n  @param[in]     fftLen         length of the FFT\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a\n  supported length\n\n  @par           Details\n                   The parameter ifftFlag controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlag for calculation of\n  CIFFT otherwise CFFT is calculated\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   The parameter fftLen Specifies length of\n  CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.\n  @par\n                   This Function also initializes Twiddle factor table pointer\n  and Bit reversal table pointer.\n*/\n\narm_status arm_cfft_radix2_init_q31(arm_cfft_radix2_instance_q31 *S,\n                                    uint16_t fftLen, uint8_t ifftFlag,\n                                    uint8_t bitReverseFlag) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /*  Initialise the FFT length */\n  S->fftLen = fftLen;\n\n  /*  Initialise the Twiddle coefficient pointer */\n  S->pTwiddle = (q31_t *)twiddleCoef_4096_q31;\n\n  /*  Initialise the Flag for selection of CFFT or CIFFT */\n  S->ifftFlag = ifftFlag;\n\n  /*  Initialise the Flag for calculation Bit reversal or not */\n  S->bitReverseFlag = bitReverseFlag;\n\n  /*  Initializations of Instance structure depending on the FFT length */\n  switch (S->fftLen) {\n    /*  Initializations of structure parameters for 4096 point FFT */\n  case 4096U:\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 1U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 1U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)armBitRevTable;\n    break;\n\n    /*  Initializations of structure parameters for 2048 point FFT */\n  case 2048U:\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 2U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 2U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[1];\n    break;\n\n    /*  Initializations of structure parameters for 1024 point FFT */\n  case 1024U:\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 4U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 4U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[3];\n    break;\n\n    /*  Initializations of structure parameters for 512 point FFT */\n  case 512U:\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 8U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 8U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[7];\n    break;\n\n  case 256U:\n    /*  Initializations of structure parameters for 256 point FFT */\n    S->twidCoefModifier = 16U;\n    S->bitRevFactor = 16U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[15];\n    break;\n\n  case 128U:\n    /*  Initializations of structure parameters for 128 point FFT */\n    S->twidCoefModifier = 32U;\n    S->bitRevFactor = 32U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[31];\n    break;\n\n  case 64U:\n    /*  Initializations of structure parameters for 64 point FFT */\n    S->twidCoefModifier = 64U;\n    S->bitRevFactor = 64U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[63];\n    break;\n\n  case 32U:\n    /*  Initializations of structure parameters for 32 point FFT */\n    S->twidCoefModifier = 128U;\n    S->bitRevFactor = 128U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[127];\n    break;\n\n  case 16U:\n    /*  Initializations of structure parameters for 16 point FFT */\n    S->twidCoefModifier = 256U;\n    S->bitRevFactor = 256U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[255];\n    break;\n\n  default:\n    /*  Reporting argument error if fftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix2_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix2_q15.c\n * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point\n * processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nvoid arm_radix2_butterfly_q15(q15_t *pSrc, uint32_t fftLen, const q15_t *pCoef,\n                              uint16_t twidCoefModifier);\n\nvoid arm_radix2_butterfly_inverse_q15(q15_t *pSrc, uint32_t fftLen,\n                                      const q15_t *pCoef,\n                                      uint16_t twidCoefModifier);\n\nvoid arm_bitreversal_q15(q15_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor,\n                         const uint16_t *pBitRevTab);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the fixed-point CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superseded by \\ref\n  arm_cfft_q15 and will be removed in the future.\n  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT\n  structure\n  @param[in,out] pSrc points to the complex data buffer of size\n  2*fftLen. Processing occurs in-place\n  @return        none\n */\n\nvoid arm_cfft_radix2_q15(const arm_cfft_radix2_instance_q15 *S, q15_t *pSrc) {\n\n  if (S->ifftFlag == 1U) {\n    arm_radix2_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle,\n                                     S->twidCoefModifier);\n  } else {\n    arm_radix2_butterfly_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);\n  }\n\n  arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n\nvoid arm_radix2_butterfly_q15(q15_t *pSrc, uint32_t fftLen, const q15_t *pCoef,\n                              uint16_t twidCoefModifier) {\n#if defined(ARM_MATH_DSP)\n\n  uint32_t i, j, k, l;\n  uint32_t n1, n2, ia;\n  q15_t in;\n  q31_t T, S, R;\n  q31_t coeff, out1, out2;\n\n  // N = fftLen;\n  n2 = fftLen;\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  // loop for groups\n  for (i = 0; i < n2; i++) {\n    coeff = read_q15x2((q15_t *)pCoef + (ia * 2U));\n\n    ia = ia + twidCoefModifier;\n\n    l = i + n2;\n\n    T = read_q15x2(pSrc + (2 * i));\n    in = ((int16_t)(T & 0xFFFF)) >> 1;\n    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);\n\n    S = read_q15x2(pSrc + (2 * l));\n    in = ((int16_t)(S & 0xFFFF)) >> 1;\n    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);\n\n    R = __QSUB16(T, S);\n\n    write_q15x2(pSrc + (2 * i), __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    out1 = __SMUAD(coeff, R) >> 16;\n    out2 = __SMUSDX(coeff, R);\n#else\n    out1 = __SMUSDX(R, coeff) >> 16U;\n    out2 = __SMUAD(coeff, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    write_q15x2(pSrc + (2U * l),\n                (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n    coeff = read_q15x2((q15_t *)pCoef + (ia * 2U));\n\n    ia = ia + twidCoefModifier;\n\n    /* loop for butterfly */\n    i++;\n    l++;\n\n    T = read_q15x2(pSrc + (2 * i));\n    in = ((int16_t)(T & 0xFFFF)) >> 1;\n    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);\n\n    S = read_q15x2(pSrc + (2 * l));\n    in = ((int16_t)(S & 0xFFFF)) >> 1;\n    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);\n\n    R = __QSUB16(T, S);\n\n    write_q15x2(pSrc + (2 * i), __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    out1 = __SMUAD(coeff, R) >> 16;\n    out2 = __SMUSDX(coeff, R);\n#else\n\n    out1 = __SMUSDX(R, coeff) >> 16U;\n    out2 = __SMUAD(coeff, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    write_q15x2(pSrc + (2U * l),\n                (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n  } /* groups loop end */\n\n  twidCoefModifier = twidCoefModifier << 1U;\n\n  /* loop for stage */\n  for (k = fftLen / 2; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    /* loop for groups */\n    for (j = 0; j < n2; j++) {\n      coeff = read_q15x2((q15_t *)pCoef + (ia * 2U));\n\n      ia = ia + twidCoefModifier;\n\n      /* loop for butterfly */\n      for (i = j; i < fftLen; i += n1) {\n        l = i + n2;\n\n        T = read_q15x2(pSrc + (2 * i));\n\n        S = read_q15x2(pSrc + (2 * l));\n\n        R = __QSUB16(T, S);\n\n        write_q15x2(pSrc + (2 * i), __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        out1 = __SMUAD(coeff, R) >> 16;\n        out2 = __SMUSDX(coeff, R);\n#else\n        out1 = __SMUSDX(R, coeff) >> 16U;\n        out2 = __SMUAD(coeff, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        write_q15x2(pSrc + (2U * l),\n                    (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n        i += n1;\n\n        l = i + n2;\n\n        T = read_q15x2(pSrc + (2 * i));\n\n        S = read_q15x2(pSrc + (2 * l));\n\n        R = __QSUB16(T, S);\n\n        write_q15x2(pSrc + (2 * i), __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        out1 = __SMUAD(coeff, R) >> 16;\n        out2 = __SMUSDX(coeff, R);\n#else\n        out1 = __SMUSDX(R, coeff) >> 16U;\n        out2 = __SMUAD(coeff, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        write_q15x2(pSrc + (2U * l),\n                    (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n      } /* butterfly loop end */\n\n    } /* groups loop end */\n\n    twidCoefModifier = twidCoefModifier << 1U;\n  } /* stages loop end */\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  coeff = read_q15x2((q15_t *)pCoef + (ia * 2U));\n\n  ia = ia + twidCoefModifier;\n\n  /* loop for butterfly */\n  for (i = 0; i < fftLen; i += n1) {\n    l = i + n2;\n\n    T = read_q15x2(pSrc + (2 * i));\n\n    S = read_q15x2(pSrc + (2 * l));\n\n    R = __QSUB16(T, S);\n\n    write_q15x2(pSrc + (2 * i), __QADD16(T, S));\n\n    write_q15x2(pSrc + (2 * l), R);\n\n    i += n1;\n    l = i + n2;\n\n    T = read_q15x2(pSrc + (2 * i));\n\n    S = read_q15x2(pSrc + (2 * l));\n\n    R = __QSUB16(T, S);\n\n    write_q15x2(pSrc + (2 * i), __QADD16(T, S));\n\n    write_q15x2(pSrc + (2 * l), R);\n\n  } /* groups loop end */\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  uint32_t i, j, k, l;\n  uint32_t n1, n2, ia;\n  q15_t xt, yt, cosVal, sinVal;\n\n  // N = fftLen;\n  n2 = fftLen;\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  /* loop for groups */\n  for (j = 0; j < n2; j++) {\n    cosVal = pCoef[(ia * 2)];\n    sinVal = pCoef[(ia * 2) + 1];\n    ia = ia + twidCoefModifier;\n\n    /* loop for butterfly */\n    for (i = j; i < fftLen; i += n1) {\n      l = i + n2;\n      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);\n      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;\n\n      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);\n      pSrc[2 * i + 1] =\n          ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;\n\n      pSrc[2 * l] = (((int16_t)(((q31_t)xt * cosVal) >> 16)) +\n                     ((int16_t)(((q31_t)yt * sinVal) >> 16)));\n\n      pSrc[2U * l + 1] = (((int16_t)(((q31_t)yt * cosVal) >> 16)) -\n                          ((int16_t)(((q31_t)xt * sinVal) >> 16)));\n\n    } /* butterfly loop end */\n\n  } /* groups loop end */\n\n  twidCoefModifier = twidCoefModifier << 1U;\n\n  /* loop for stage */\n  for (k = fftLen / 2; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    /* loop for groups */\n    for (j = 0; j < n2; j++) {\n      cosVal = pCoef[ia * 2];\n      sinVal = pCoef[(ia * 2) + 1];\n      ia = ia + twidCoefModifier;\n\n      /* loop for butterfly */\n      for (i = j; i < fftLen; i += n1) {\n        l = i + n2;\n        xt = pSrc[2 * i] - pSrc[2 * l];\n        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;\n\n        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;\n\n        pSrc[2 * l] = (((int16_t)(((q31_t)xt * cosVal) >> 16)) +\n                       ((int16_t)(((q31_t)yt * sinVal) >> 16)));\n\n        pSrc[2U * l + 1] = (((int16_t)(((q31_t)yt * cosVal) >> 16)) -\n                            ((int16_t)(((q31_t)xt * sinVal) >> 16)));\n\n      } /* butterfly loop end */\n\n    } /* groups loop end */\n\n    twidCoefModifier = twidCoefModifier << 1U;\n  } /* stages loop end */\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  /* loop for groups */\n  for (j = 0; j < n2; j++) {\n    cosVal = pCoef[ia * 2];\n    sinVal = pCoef[(ia * 2) + 1];\n\n    ia = ia + twidCoefModifier;\n\n    /* loop for butterfly */\n    for (i = j; i < fftLen; i += n1) {\n      l = i + n2;\n      xt = pSrc[2 * i] - pSrc[2 * l];\n      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);\n\n      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);\n\n      pSrc[2 * l] = xt;\n\n      pSrc[2 * l + 1] = yt;\n\n    } /* butterfly loop end */\n\n  } /* groups loop end */\n\n  twidCoefModifier = twidCoefModifier << 1U;\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\nvoid arm_radix2_butterfly_inverse_q15(q15_t *pSrc, uint32_t fftLen,\n                                      const q15_t *pCoef,\n                                      uint16_t twidCoefModifier) {\n#if defined(ARM_MATH_DSP)\n\n  uint32_t i, j, k, l;\n  uint32_t n1, n2, ia;\n  q15_t in;\n  q31_t T, S, R;\n  q31_t coeff, out1, out2;\n\n  // N = fftLen;\n  n2 = fftLen;\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  /* loop for groups */\n  for (i = 0; i < n2; i++) {\n    coeff = read_q15x2((q15_t *)pCoef + (ia * 2U));\n\n    ia = ia + twidCoefModifier;\n\n    l = i + n2;\n\n    T = read_q15x2(pSrc + (2 * i));\n    in = ((int16_t)(T & 0xFFFF)) >> 1;\n    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);\n\n    S = read_q15x2(pSrc + (2 * l));\n    in = ((int16_t)(S & 0xFFFF)) >> 1;\n    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);\n\n    R = __QSUB16(T, S);\n\n    write_q15x2(pSrc + (2 * i), __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    out1 = __SMUSD(coeff, R) >> 16;\n    out2 = __SMUADX(coeff, R);\n#else\n    out1 = __SMUADX(R, coeff) >> 16U;\n    out2 = __SMUSD(__QSUB(0, coeff), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    write_q15x2(pSrc + (2 * l),\n                (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n    coeff = read_q15x2((q15_t *)pCoef + (ia * 2U));\n\n    ia = ia + twidCoefModifier;\n\n    /* loop for butterfly */\n    i++;\n    l++;\n\n    T = read_q15x2(pSrc + (2 * i));\n    in = ((int16_t)(T & 0xFFFF)) >> 1;\n    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);\n\n    S = read_q15x2(pSrc + (2 * l));\n    in = ((int16_t)(S & 0xFFFF)) >> 1;\n    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);\n\n    R = __QSUB16(T, S);\n\n    write_q15x2(pSrc + (2 * i), __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    out1 = __SMUSD(coeff, R) >> 16;\n    out2 = __SMUADX(coeff, R);\n#else\n    out1 = __SMUADX(R, coeff) >> 16U;\n    out2 = __SMUSD(__QSUB(0, coeff), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    write_q15x2(pSrc + (2 * l),\n                (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n  } /* groups loop end */\n\n  twidCoefModifier = twidCoefModifier << 1U;\n\n  /* loop for stage */\n  for (k = fftLen / 2; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    /* loop for groups */\n    for (j = 0; j < n2; j++) {\n      coeff = read_q15x2((q15_t *)pCoef + (ia * 2U));\n\n      ia = ia + twidCoefModifier;\n\n      /* loop for butterfly */\n      for (i = j; i < fftLen; i += n1) {\n        l = i + n2;\n\n        T = read_q15x2(pSrc + (2 * i));\n\n        S = read_q15x2(pSrc + (2 * l));\n\n        R = __QSUB16(T, S);\n\n        write_q15x2(pSrc + (2 * i), __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        out1 = __SMUSD(coeff, R) >> 16;\n        out2 = __SMUADX(coeff, R);\n#else\n        out1 = __SMUADX(R, coeff) >> 16U;\n        out2 = __SMUSD(__QSUB(0, coeff), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        write_q15x2(pSrc + (2 * l),\n                    (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n        i += n1;\n\n        l = i + n2;\n\n        T = read_q15x2(pSrc + (2 * i));\n\n        S = read_q15x2(pSrc + (2 * l));\n\n        R = __QSUB16(T, S);\n\n        write_q15x2(pSrc + (2 * i), __SHADD16(T, S));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        out1 = __SMUSD(coeff, R) >> 16;\n        out2 = __SMUADX(coeff, R);\n#else\n        out1 = __SMUADX(R, coeff) >> 16U;\n        out2 = __SMUSD(__QSUB(0, coeff), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        write_q15x2(pSrc + (2 * l),\n                    (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n      } /* butterfly loop end */\n\n    } /* groups loop end */\n\n    twidCoefModifier = twidCoefModifier << 1U;\n  } /* stages loop end */\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  /* loop for groups */\n  for (j = 0; j < n2; j++) {\n    coeff = read_q15x2((q15_t *)pCoef + (ia * 2U));\n\n    ia = ia + twidCoefModifier;\n\n    /* loop for butterfly */\n    for (i = j; i < fftLen; i += n1) {\n      l = i + n2;\n\n      T = read_q15x2(pSrc + (2 * i));\n\n      S = read_q15x2(pSrc + (2 * l));\n\n      R = __QSUB16(T, S);\n\n      write_q15x2(pSrc + (2 * i), __QADD16(T, S));\n\n      write_q15x2(pSrc + (2 * l), R);\n\n    } /* butterfly loop end */\n\n  } /* groups loop end */\n\n  twidCoefModifier = twidCoefModifier << 1U;\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  uint32_t i, j, k, l;\n  uint32_t n1, n2, ia;\n  q15_t xt, yt, cosVal, sinVal;\n\n  // N = fftLen;\n  n2 = fftLen;\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  /* loop for groups */\n  for (j = 0; j < n2; j++) {\n    cosVal = pCoef[(ia * 2)];\n    sinVal = pCoef[(ia * 2) + 1];\n    ia = ia + twidCoefModifier;\n\n    /* loop for butterfly */\n    for (i = j; i < fftLen; i += n1) {\n      l = i + n2;\n      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);\n      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;\n\n      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);\n      pSrc[2 * i + 1] =\n          ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;\n\n      pSrc[2 * l] = (((int16_t)(((q31_t)xt * cosVal) >> 16)) -\n                     ((int16_t)(((q31_t)yt * sinVal) >> 16)));\n\n      pSrc[2 * l + 1] = (((int16_t)(((q31_t)yt * cosVal) >> 16)) +\n                         ((int16_t)(((q31_t)xt * sinVal) >> 16)));\n\n    } /* butterfly loop end */\n\n  } /* groups loop end */\n\n  twidCoefModifier = twidCoefModifier << 1U;\n\n  /* loop for stage */\n  for (k = fftLen / 2; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    /* loop for groups */\n    for (j = 0; j < n2; j++) {\n      cosVal = pCoef[(ia * 2)];\n      sinVal = pCoef[(ia * 2) + 1];\n      ia = ia + twidCoefModifier;\n\n      /* loop for butterfly */\n      for (i = j; i < fftLen; i += n1) {\n        l = i + n2;\n        xt = pSrc[2 * i] - pSrc[2 * l];\n        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;\n\n        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;\n\n        pSrc[2 * l] = (((int16_t)(((q31_t)xt * cosVal) >> 16)) -\n                       ((int16_t)(((q31_t)yt * sinVal) >> 16)));\n\n        pSrc[2 * l + 1] = (((int16_t)(((q31_t)yt * cosVal) >> 16)) +\n                           ((int16_t)(((q31_t)xt * sinVal) >> 16)));\n\n      } /* butterfly loop end */\n\n    } /* groups loop end */\n\n    twidCoefModifier = twidCoefModifier << 1U;\n  } /* stages loop end */\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  cosVal = pCoef[(ia * 2)];\n  sinVal = pCoef[(ia * 2) + 1];\n\n  ia = ia + twidCoefModifier;\n\n  /* loop for butterfly */\n  for (i = 0; i < fftLen; i += n1) {\n    l = i + n2;\n    xt = pSrc[2 * i] - pSrc[2 * l];\n    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);\n\n    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);\n\n    pSrc[2 * l] = xt;\n\n    pSrc[2 * l + 1] = yt;\n\n  } /* groups loop end */\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix2_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix2_q31.c\n * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point\n * processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nvoid arm_radix2_butterfly_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef,\n                              uint16_t twidCoefModifier);\n\nvoid arm_radix2_butterfly_inverse_q31(q31_t *pSrc, uint32_t fftLen,\n                                      const q31_t *pCoef,\n                                      uint16_t twidCoefModifier);\n\nvoid arm_bitreversal_q31(q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor,\n                         const uint16_t *pBitRevTab);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the fixed-point CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superseded by \\ref\n  arm_cfft_q31 and will be removed in the future.\n  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT\n  structure\n  @param[in,out] pSrc points to the complex data buffer of size\n  2*fftLen. Processing occurs in-place\n  @return        none\n */\n\nvoid arm_cfft_radix2_q31(const arm_cfft_radix2_instance_q31 *S, q31_t *pSrc) {\n\n  if (S->ifftFlag == 1U) {\n    arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle,\n                                     S->twidCoefModifier);\n  } else {\n    arm_radix2_butterfly_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);\n  }\n\n  arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n\nvoid arm_radix2_butterfly_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef,\n                              uint16_t twidCoefModifier) {\n\n  unsigned i, j, k, l, m;\n  unsigned n1, n2, ia;\n  q31_t xt, yt, cosVal, sinVal;\n  q31_t p0, p1;\n\n  // N = fftLen;\n  n2 = fftLen;\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  // loop for groups\n  for (i = 0; i < n2; i++) {\n    cosVal = pCoef[ia * 2];\n    sinVal = pCoef[(ia * 2) + 1];\n    ia = ia + twidCoefModifier;\n\n    l = i + n2;\n    xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);\n    pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;\n\n    yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);\n    pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;\n\n    mult_32x32_keep32_R(p0, xt, cosVal);\n    mult_32x32_keep32_R(p1, yt, cosVal);\n    multAcc_32x32_keep32_R(p0, yt, sinVal);\n    multSub_32x32_keep32_R(p1, xt, sinVal);\n\n    pSrc[2U * l] = p0;\n    pSrc[2U * l + 1U] = p1;\n\n  } // groups loop end\n\n  twidCoefModifier <<= 1U;\n\n  // loop for stage\n  for (k = fftLen / 2; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    // loop for groups\n    for (j = 0; j < n2; j++) {\n      cosVal = pCoef[ia * 2];\n      sinVal = pCoef[(ia * 2) + 1];\n      ia = ia + twidCoefModifier;\n\n      // loop for butterfly\n      i = j;\n      m = fftLen / n1;\n      do {\n        l = i + n2;\n        xt = pSrc[2 * i] - pSrc[2 * l];\n        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;\n\n        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;\n\n        mult_32x32_keep32_R(p0, xt, cosVal);\n        mult_32x32_keep32_R(p1, yt, cosVal);\n        multAcc_32x32_keep32_R(p0, yt, sinVal);\n        multSub_32x32_keep32_R(p1, xt, sinVal);\n\n        pSrc[2U * l] = p0;\n        pSrc[2U * l + 1U] = p1;\n        i += n1;\n        m--;\n      } while (m > 0); // butterfly loop end\n\n    } // groups loop end\n\n    twidCoefModifier <<= 1U;\n  } // stages loop end\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  cosVal = pCoef[ia * 2];\n  sinVal = pCoef[(ia * 2) + 1];\n  ia = ia + twidCoefModifier;\n\n  // loop for butterfly\n  for (i = 0; i < fftLen; i += n1) {\n    l = i + n2;\n    xt = pSrc[2 * i] - pSrc[2 * l];\n    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);\n\n    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);\n\n    pSrc[2U * l] = xt;\n\n    pSrc[2U * l + 1U] = yt;\n\n    i += n1;\n    l = i + n2;\n\n    xt = pSrc[2 * i] - pSrc[2 * l];\n    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);\n\n    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);\n\n    pSrc[2U * l] = xt;\n\n    pSrc[2U * l + 1U] = yt;\n\n  } // butterfly loop end\n}\n\nvoid arm_radix2_butterfly_inverse_q31(q31_t *pSrc, uint32_t fftLen,\n                                      const q31_t *pCoef,\n                                      uint16_t twidCoefModifier) {\n\n  unsigned i, j, k, l;\n  unsigned n1, n2, ia;\n  q31_t xt, yt, cosVal, sinVal;\n  q31_t p0, p1;\n\n  // N = fftLen;\n  n2 = fftLen;\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  // loop for groups\n  for (i = 0; i < n2; i++) {\n    cosVal = pCoef[ia * 2];\n    sinVal = pCoef[(ia * 2) + 1];\n    ia = ia + twidCoefModifier;\n\n    l = i + n2;\n    xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);\n    pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;\n\n    yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);\n    pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;\n\n    mult_32x32_keep32_R(p0, xt, cosVal);\n    mult_32x32_keep32_R(p1, yt, cosVal);\n    multSub_32x32_keep32_R(p0, yt, sinVal);\n    multAcc_32x32_keep32_R(p1, xt, sinVal);\n\n    pSrc[2U * l] = p0;\n    pSrc[2U * l + 1U] = p1;\n  } // groups loop end\n\n  twidCoefModifier = twidCoefModifier << 1U;\n\n  // loop for stage\n  for (k = fftLen / 2; k > 2; k = k >> 1) {\n    n1 = n2;\n    n2 = n2 >> 1;\n    ia = 0;\n\n    // loop for groups\n    for (j = 0; j < n2; j++) {\n      cosVal = pCoef[ia * 2];\n      sinVal = pCoef[(ia * 2) + 1];\n      ia = ia + twidCoefModifier;\n\n      // loop for butterfly\n      for (i = j; i < fftLen; i += n1) {\n        l = i + n2;\n        xt = pSrc[2 * i] - pSrc[2 * l];\n        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;\n\n        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;\n\n        mult_32x32_keep32_R(p0, xt, cosVal);\n        mult_32x32_keep32_R(p1, yt, cosVal);\n        multSub_32x32_keep32_R(p0, yt, sinVal);\n        multAcc_32x32_keep32_R(p1, xt, sinVal);\n\n        pSrc[2U * l] = p0;\n        pSrc[2U * l + 1U] = p1;\n      } // butterfly loop end\n\n    } // groups loop end\n\n    twidCoefModifier = twidCoefModifier << 1U;\n  } // stages loop end\n\n  n1 = n2;\n  n2 = n2 >> 1;\n  ia = 0;\n\n  cosVal = pCoef[ia * 2];\n  sinVal = pCoef[(ia * 2) + 1];\n  ia = ia + twidCoefModifier;\n\n  // loop for butterfly\n  for (i = 0; i < fftLen; i += n1) {\n    l = i + n2;\n    xt = pSrc[2 * i] - pSrc[2 * l];\n    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);\n\n    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);\n\n    pSrc[2U * l] = xt;\n\n    pSrc[2U * l + 1U] = yt;\n\n    i += n1;\n    l = i + n2;\n\n    xt = pSrc[2 * i] - pSrc[2 * l];\n    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);\n\n    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];\n    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);\n\n    pSrc[2U * l] = xt;\n\n    pSrc[2U * l + 1U] = yt;\n\n  } // butterfly loop end\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix4_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix4_f32.c\n * Description:  Radix-4 Decimation in Frequency CFFT & CIFFT Floating point\n * processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nextern void arm_bitreversal_f32(float32_t *pSrc, uint16_t fftSize,\n                                uint16_t bitRevFactor,\n                                const uint16_t *pBitRevTab);\n\nvoid arm_radix4_butterfly_f32(float32_t *pSrc, uint16_t fftLen,\n                              const float32_t *pCoef,\n                              uint16_t twidCoefModifier);\n\nvoid arm_radix4_butterfly_inverse_f32(float32_t *pSrc, uint16_t fftLen,\n                                      const float32_t *pCoef,\n                                      uint16_t twidCoefModifier,\n                                      float32_t onebyfftLen);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point Radix-4 CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superseded by \\ref\n  arm_cfft_f32 and will be removed in the future.\n  @param[in]     S    points to an instance of the floating-point Radix-4\n  CFFT/CIFFT structure\n  @param[in,out] pSrc points to the complex data buffer of size\n  2*fftLen. Processing occurs in-place\n  @return        none\n */\n\nvoid arm_cfft_radix4_f32(const arm_cfft_radix4_instance_f32 *S,\n                         float32_t *pSrc) {\n  if (S->ifftFlag == 1U) {\n    /*  Complex IFFT radix-4  */\n    arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,\n                                     S->twidCoefModifier, S->onebyfftLen);\n  } else {\n    /*  Complex FFT radix-4  */\n    arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);\n  }\n\n  if (S->bitReverseFlag == 1U) {\n    /*  Bit Reversal */\n    arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);\n  }\n}\n\n/**\n  @} end of ComplexFFT group\n */\n\n/* ----------------------------------------------------------------------\n * Internal helper function used by the FFTs\n * ---------------------------------------------------------------------- */\n\n/**\n  brief         Core function for the floating-point CFFT butterfly process.\n  param[in,out] pSrc             points to the in-place buffer of floating-point\n  data type param[in]     fftLen           length of the FFT param[in]     pCoef\n  points to the twiddle coefficient buffer param[in]     twidCoefModifier\n  twiddle coefficient modifier that supports different size FFTs with the same\n  twiddle factor table return        none\n */\n\nvoid arm_radix4_butterfly_f32(float32_t *pSrc, uint16_t fftLen,\n                              const float32_t *pCoef,\n                              uint16_t twidCoefModifier) {\n  float32_t co1, co2, co3, si1, si2, si3;\n  uint32_t ia1, ia2, ia3;\n  uint32_t i0, i1, i2, i3;\n  uint32_t n1, n2, j, k;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;\n  float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,\n      Ybminusd;\n  float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;\n  float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;\n  float32_t *ptr1;\n  float32_t p0, p1, p2, p3, p4, p5;\n  float32_t a0, a1, a2, a3, a4, a5, a6, a7;\n\n  /*  Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n\n  /* n2 = fftLen/4 */\n  n2 >>= 2U;\n  i0 = 0U;\n  ia1 = 0U;\n\n  j = n2;\n\n  /*  Calculation of first stage */\n  do {\n    /*  index calculation for the input as, */\n    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 +\n     * 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    xaIn = pSrc[(2U * i0)];\n    yaIn = pSrc[(2U * i0) + 1U];\n\n    xbIn = pSrc[(2U * i1)];\n    ybIn = pSrc[(2U * i1) + 1U];\n\n    xcIn = pSrc[(2U * i2)];\n    ycIn = pSrc[(2U * i2) + 1U];\n\n    xdIn = pSrc[(2U * i3)];\n    ydIn = pSrc[(2U * i3) + 1U];\n\n    /* xa + xc */\n    Xaplusc = xaIn + xcIn;\n    /* xb + xd */\n    Xbplusd = xbIn + xdIn;\n    /* ya + yc */\n    Yaplusc = yaIn + ycIn;\n    /* yb + yd */\n    Ybplusd = ybIn + ydIn;\n\n    /*  index calculation for the coefficients */\n    ia2 = ia1 + ia1;\n    co2 = pCoef[ia2 * 2U];\n    si2 = pCoef[(ia2 * 2U) + 1U];\n\n    /* xa - xc */\n    Xaminusc = xaIn - xcIn;\n    /* xb - xd */\n    Xbminusd = xbIn - xdIn;\n    /* ya - yc */\n    Yaminusc = yaIn - ycIn;\n    /* yb - yd */\n    Ybminusd = ybIn - ydIn;\n\n    /* xa' = xa + xb + xc + xd */\n    pSrc[(2U * i0)] = Xaplusc + Xbplusd;\n    /* ya' = ya + yb + yc + yd */\n    pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;\n\n    /* (xa - xc) + (yb - yd) */\n    Xb12C_out = (Xaminusc + Ybminusd);\n    /* (ya - yc) + (xb - xd) */\n    Yb12C_out = (Yaminusc - Xbminusd);\n    /* (xa + xc) - (xb + xd) */\n    Xc12C_out = (Xaplusc - Xbplusd);\n    /* (ya + yc) - (yb + yd) */\n    Yc12C_out = (Yaplusc - Ybplusd);\n    /* (xa - xc) - (yb - yd) */\n    Xd12C_out = (Xaminusc - Ybminusd);\n    /* (ya - yc) + (xb - xd) */\n    Yd12C_out = (Xbminusd + Yaminusc);\n\n    co1 = pCoef[ia1 * 2U];\n    si1 = pCoef[(ia1 * 2U) + 1U];\n\n    /*  index calculation for the coefficients */\n    ia3 = ia2 + ia1;\n    co3 = pCoef[ia3 * 2U];\n    si3 = pCoef[(ia3 * 2U) + 1U];\n\n    Xb12_out = Xb12C_out * co1;\n    Yb12_out = Yb12C_out * co1;\n    Xc12_out = Xc12C_out * co2;\n    Yc12_out = Yc12C_out * co2;\n    Xd12_out = Xd12C_out * co3;\n    Yd12_out = Yd12C_out * co3;\n\n    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n    // Xb12_out -= Yb12C_out * si1;\n    p0 = Yb12C_out * si1;\n    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n    // Yb12_out += Xb12C_out * si1;\n    p1 = Xb12C_out * si1;\n    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n    // Xc12_out -= Yc12C_out * si2;\n    p2 = Yc12C_out * si2;\n    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n    // Yc12_out += Xc12C_out * si2;\n    p3 = Xc12C_out * si2;\n    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n    // Xd12_out -= Yd12C_out * si3;\n    p4 = Yd12C_out * si3;\n    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n    // Yd12_out += Xd12C_out * si3;\n    p5 = Xd12C_out * si3;\n\n    Xb12_out += p0;\n    Yb12_out -= p1;\n    Xc12_out += p2;\n    Yc12_out -= p3;\n    Xd12_out += p4;\n    Yd12_out -= p5;\n\n    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */\n    pSrc[2U * i1] = Xc12_out;\n\n    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */\n    pSrc[(2U * i1) + 1U] = Yc12_out;\n\n    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */\n    pSrc[2U * i2] = Xb12_out;\n\n    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */\n    pSrc[(2U * i2) + 1U] = Yb12_out;\n\n    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */\n    pSrc[2U * i3] = Xd12_out;\n\n    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */\n    pSrc[(2U * i3) + 1U] = Yd12_out;\n\n    /*  Twiddle coefficients index modifier */\n    ia1 += twidCoefModifier;\n\n    /*  Updating input index */\n    i0++;\n\n  } while (--j);\n\n  twidCoefModifier <<= 2U;\n\n  /*  Calculation of second stage to excluding last stage */\n  for (k = fftLen >> 2U; k > 4U; k >>= 2U) {\n    /*  Initializations for the first stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ia1 = 0U;\n\n    /*  Calculation of first stage */\n    j = 0;\n    do {\n      /*  index calculation for the coefficients */\n      ia2 = ia1 + ia1;\n      ia3 = ia2 + ia1;\n      co1 = pCoef[(ia1 * 2U)];\n      si1 = pCoef[(ia1 * 2U) + 1U];\n      co2 = pCoef[(ia2 * 2U)];\n      si2 = pCoef[(ia2 * 2U) + 1U];\n      co3 = pCoef[(ia3 * 2U)];\n      si3 = pCoef[(ia3 * 2U) + 1U];\n\n      /*  Twiddle coefficients index modifier */\n      ia1 += twidCoefModifier;\n\n      i0 = j;\n      do {\n        /*  index calculation for the input as, */\n        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 +\n         * 3fftLen/4] */\n        i1 = i0 + n2;\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n\n        xaIn = pSrc[(2U * i0)];\n        yaIn = pSrc[(2U * i0) + 1U];\n\n        xbIn = pSrc[(2U * i1)];\n        ybIn = pSrc[(2U * i1) + 1U];\n\n        xcIn = pSrc[(2U * i2)];\n        ycIn = pSrc[(2U * i2) + 1U];\n\n        xdIn = pSrc[(2U * i3)];\n        ydIn = pSrc[(2U * i3) + 1U];\n\n        /* xa - xc */\n        Xaminusc = xaIn - xcIn;\n        /* (xb - xd) */\n        Xbminusd = xbIn - xdIn;\n        /* ya - yc */\n        Yaminusc = yaIn - ycIn;\n        /* (yb - yd) */\n        Ybminusd = ybIn - ydIn;\n\n        /* xa + xc */\n        Xaplusc = xaIn + xcIn;\n        /* xb + xd */\n        Xbplusd = xbIn + xdIn;\n        /* ya + yc */\n        Yaplusc = yaIn + ycIn;\n        /* yb + yd */\n        Ybplusd = ybIn + ydIn;\n\n        /* (xa - xc) + (yb - yd) */\n        Xb12C_out = (Xaminusc + Ybminusd);\n        /* (ya - yc) -  (xb - xd) */\n        Yb12C_out = (Yaminusc - Xbminusd);\n        /* xa + xc -(xb + xd) */\n        Xc12C_out = (Xaplusc - Xbplusd);\n        /* (ya + yc) - (yb + yd) */\n        Yc12C_out = (Yaplusc - Ybplusd);\n        /* (xa - xc) - (yb - yd) */\n        Xd12C_out = (Xaminusc - Ybminusd);\n        /* (ya - yc) +  (xb - xd) */\n        Yd12C_out = (Xbminusd + Yaminusc);\n\n        pSrc[(2U * i0)] = Xaplusc + Xbplusd;\n        pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;\n\n        Xb12_out = Xb12C_out * co1;\n        Yb12_out = Yb12C_out * co1;\n        Xc12_out = Xc12C_out * co2;\n        Yc12_out = Yc12C_out * co2;\n        Xd12_out = Xd12C_out * co3;\n        Yd12_out = Yd12C_out * co3;\n\n        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n        // Xb12_out -= Yb12C_out * si1;\n        p0 = Yb12C_out * si1;\n        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n        // Yb12_out += Xb12C_out * si1;\n        p1 = Xb12C_out * si1;\n        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n        // Xc12_out -= Yc12C_out * si2;\n        p2 = Yc12C_out * si2;\n        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n        // Yc12_out += Xc12C_out * si2;\n        p3 = Xc12C_out * si2;\n        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n        // Xd12_out -= Yd12C_out * si3;\n        p4 = Yd12C_out * si3;\n        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n        // Yd12_out += Xd12C_out * si3;\n        p5 = Xd12C_out * si3;\n\n        Xb12_out += p0;\n        Yb12_out -= p1;\n        Xc12_out += p2;\n        Yc12_out -= p3;\n        Xd12_out += p4;\n        Yd12_out -= p5;\n\n        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */\n        pSrc[2U * i1] = Xc12_out;\n\n        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */\n        pSrc[(2U * i1) + 1U] = Yc12_out;\n\n        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */\n        pSrc[2U * i2] = Xb12_out;\n\n        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */\n        pSrc[(2U * i2) + 1U] = Yb12_out;\n\n        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */\n        pSrc[2U * i3] = Xd12_out;\n\n        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */\n        pSrc[(2U * i3) + 1U] = Yd12_out;\n\n        i0 += n1;\n      } while (i0 < fftLen);\n      j++;\n    } while (j <= (n2 - 1U));\n    twidCoefModifier <<= 2U;\n  }\n\n  j = fftLen >> 2;\n  ptr1 = &pSrc[0];\n\n  /*  Calculations of last stage */\n  do {\n    xaIn = ptr1[0];\n    yaIn = ptr1[1];\n    xbIn = ptr1[2];\n    ybIn = ptr1[3];\n    xcIn = ptr1[4];\n    ycIn = ptr1[5];\n    xdIn = ptr1[6];\n    ydIn = ptr1[7];\n\n    /* xa + xc */\n    Xaplusc = xaIn + xcIn;\n\n    /* xa - xc */\n    Xaminusc = xaIn - xcIn;\n\n    /* ya + yc */\n    Yaplusc = yaIn + ycIn;\n\n    /* ya - yc */\n    Yaminusc = yaIn - ycIn;\n\n    /* xb + xd */\n    Xbplusd = xbIn + xdIn;\n\n    /* yb + yd */\n    Ybplusd = ybIn + ydIn;\n\n    /* (xb-xd) */\n    Xbminusd = xbIn - xdIn;\n\n    /* (yb-yd) */\n    Ybminusd = ybIn - ydIn;\n\n    /* xa' = xa + xb + xc + xd */\n    a0 = (Xaplusc + Xbplusd);\n    /* ya' = ya + yb + yc + yd */\n    a1 = (Yaplusc + Ybplusd);\n    /* xc' = (xa-xb+xc-xd) */\n    a2 = (Xaplusc - Xbplusd);\n    /* yc' = (ya-yb+yc-yd) */\n    a3 = (Yaplusc - Ybplusd);\n    /* xb' = (xa+yb-xc-yd) */\n    a4 = (Xaminusc + Ybminusd);\n    /* yb' = (ya-xb-yc+xd) */\n    a5 = (Yaminusc - Xbminusd);\n    /* xd' = (xa-yb-xc+yd)) */\n    a6 = (Xaminusc - Ybminusd);\n    /* yd' = (ya+xb-yc-xd) */\n    a7 = (Xbminusd + Yaminusc);\n\n    ptr1[0] = a0;\n    ptr1[1] = a1;\n    ptr1[2] = a2;\n    ptr1[3] = a3;\n    ptr1[4] = a4;\n    ptr1[5] = a5;\n    ptr1[6] = a6;\n    ptr1[7] = a7;\n\n    /* increment pointer by 8 */\n    ptr1 += 8U;\n  } while (--j);\n\n#else\n\n  float32_t t1, t2, r1, r2, s1, s2;\n\n  /* Initializations for the fft calculation */\n  n2 = fftLen;\n  n1 = n2;\n  for (k = fftLen; k > 1U; k >>= 2U) {\n    /*  Initializations for the fft calculation */\n    n1 = n2;\n    n2 >>= 2U;\n    ia1 = 0U;\n\n    /*  FFT Calculation */\n    j = 0;\n    do {\n      /*  index calculation for the coefficients */\n      ia2 = ia1 + ia1;\n      ia3 = ia2 + ia1;\n      co1 = pCoef[ia1 * 2U];\n      si1 = pCoef[(ia1 * 2U) + 1U];\n      co2 = pCoef[ia2 * 2U];\n      si2 = pCoef[(ia2 * 2U) + 1U];\n      co3 = pCoef[ia3 * 2U];\n      si3 = pCoef[(ia3 * 2U) + 1U];\n\n      /*  Twiddle coefficients index modifier */\n      ia1 = ia1 + twidCoefModifier;\n\n      i0 = j;\n      do {\n        /*  index calculation for the input as, */\n        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 +\n         * 3fftLen/4] */\n        i1 = i0 + n2;\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n\n        /* xa + xc */\n        r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];\n\n        /* xa - xc */\n        r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];\n\n        /* ya + yc */\n        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];\n\n        /* ya - yc */\n        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];\n\n        /* xb + xd */\n        t1 = pSrc[2U * i1] + pSrc[2U * i3];\n\n        /* xa' = xa + xb + xc + xd */\n        pSrc[2U * i0] = r1 + t1;\n\n        /* xa + xc -(xb + xd) */\n        r1 = r1 - t1;\n\n        /* yb + yd */\n        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];\n\n        /* ya' = ya + yb + yc + yd */\n        pSrc[(2U * i0) + 1U] = s1 + t2;\n\n        /* (ya + yc) - (yb + yd) */\n        s1 = s1 - t2;\n\n        /* (yb - yd) */\n        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];\n\n        /* (xb - xd) */\n        t2 = pSrc[2U * i1] - pSrc[2U * i3];\n\n        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */\n        pSrc[2U * i1] = (r1 * co2) + (s1 * si2);\n\n        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */\n        pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2);\n\n        /* (xa - xc) + (yb - yd) */\n        r1 = r2 + t1;\n\n        /* (xa - xc) - (yb - yd) */\n        r2 = r2 - t1;\n\n        /* (ya - yc) -  (xb - xd) */\n        s1 = s2 - t2;\n\n        /* (ya - yc) +  (xb - xd) */\n        s2 = s2 + t2;\n\n        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */\n        pSrc[2U * i2] = (r1 * co1) + (s1 * si1);\n\n        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */\n        pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1);\n\n        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */\n        pSrc[2U * i3] = (r2 * co3) + (s2 * si3);\n\n        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */\n        pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3);\n\n        i0 += n1;\n      } while (i0 < fftLen);\n      j++;\n    } while (j <= (n2 - 1U));\n    twidCoefModifier <<= 2U;\n  }\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n}\n\n/**\n  brief         Core function for the floating-point CIFFT butterfly process.\n  param[in,out] pSrc             points to the in-place buffer of floating-point\n  data type param[in]     fftLen           length of the FFT param[in]     pCoef\n  points to twiddle coefficient buffer param[in]     twidCoefModifier twiddle\n  coefficient modifier that supports different size FFTs with the same twiddle\n  factor table. param[in]     onebyfftLen      value of 1/fftLen return none\n */\n\nvoid arm_radix4_butterfly_inverse_f32(float32_t *pSrc, uint16_t fftLen,\n                                      const float32_t *pCoef,\n                                      uint16_t twidCoefModifier,\n                                      float32_t onebyfftLen) {\n  float32_t co1, co2, co3, si1, si2, si3;\n  uint32_t ia1, ia2, ia3;\n  uint32_t i0, i1, i2, i3;\n  uint32_t n1, n2, j, k;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;\n  float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,\n      Ybminusd;\n  float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;\n  float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;\n  float32_t *ptr1;\n  float32_t p0, p1, p2, p3, p4, p5, p6, p7;\n  float32_t a0, a1, a2, a3, a4, a5, a6, a7;\n\n  /*  Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n\n  /* n2 = fftLen/4 */\n  n2 >>= 2U;\n  i0 = 0U;\n  ia1 = 0U;\n\n  j = n2;\n\n  /*  Calculation of first stage */\n  do {\n    /*  index calculation for the input as, */\n    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 +\n     * 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    /*  Butterfly implementation */\n    xaIn = pSrc[(2U * i0)];\n    yaIn = pSrc[(2U * i0) + 1U];\n\n    xcIn = pSrc[(2U * i2)];\n    ycIn = pSrc[(2U * i2) + 1U];\n\n    xbIn = pSrc[(2U * i1)];\n    ybIn = pSrc[(2U * i1) + 1U];\n\n    xdIn = pSrc[(2U * i3)];\n    ydIn = pSrc[(2U * i3) + 1U];\n\n    /* xa + xc */\n    Xaplusc = xaIn + xcIn;\n    /* xb + xd */\n    Xbplusd = xbIn + xdIn;\n    /* ya + yc */\n    Yaplusc = yaIn + ycIn;\n    /* yb + yd */\n    Ybplusd = ybIn + ydIn;\n\n    /*  index calculation for the coefficients */\n    ia2 = ia1 + ia1;\n    co2 = pCoef[ia2 * 2U];\n    si2 = pCoef[(ia2 * 2U) + 1U];\n\n    /* xa - xc */\n    Xaminusc = xaIn - xcIn;\n    /* xb - xd */\n    Xbminusd = xbIn - xdIn;\n    /* ya - yc */\n    Yaminusc = yaIn - ycIn;\n    /* yb - yd */\n    Ybminusd = ybIn - ydIn;\n\n    /* xa' = xa + xb + xc + xd */\n    pSrc[(2U * i0)] = Xaplusc + Xbplusd;\n\n    /* ya' = ya + yb + yc + yd */\n    pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;\n\n    /* (xa - xc) - (yb - yd) */\n    Xb12C_out = (Xaminusc - Ybminusd);\n    /* (ya - yc) + (xb - xd) */\n    Yb12C_out = (Yaminusc + Xbminusd);\n    /* (xa + xc) - (xb + xd) */\n    Xc12C_out = (Xaplusc - Xbplusd);\n    /* (ya + yc) - (yb + yd) */\n    Yc12C_out = (Yaplusc - Ybplusd);\n    /* (xa - xc) + (yb - yd) */\n    Xd12C_out = (Xaminusc + Ybminusd);\n    /* (ya - yc) - (xb - xd) */\n    Yd12C_out = (Yaminusc - Xbminusd);\n\n    co1 = pCoef[ia1 * 2U];\n    si1 = pCoef[(ia1 * 2U) + 1U];\n\n    /*  index calculation for the coefficients */\n    ia3 = ia2 + ia1;\n    co3 = pCoef[ia3 * 2U];\n    si3 = pCoef[(ia3 * 2U) + 1U];\n\n    Xb12_out = Xb12C_out * co1;\n    Yb12_out = Yb12C_out * co1;\n    Xc12_out = Xc12C_out * co2;\n    Yc12_out = Yc12C_out * co2;\n    Xd12_out = Xd12C_out * co3;\n    Yd12_out = Yd12C_out * co3;\n\n    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n    // Xb12_out -= Yb12C_out * si1;\n    p0 = Yb12C_out * si1;\n    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n    // Yb12_out += Xb12C_out * si1;\n    p1 = Xb12C_out * si1;\n    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n    // Xc12_out -= Yc12C_out * si2;\n    p2 = Yc12C_out * si2;\n    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n    // Yc12_out += Xc12C_out * si2;\n    p3 = Xc12C_out * si2;\n    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n    // Xd12_out -= Yd12C_out * si3;\n    p4 = Yd12C_out * si3;\n    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n    // Yd12_out += Xd12C_out * si3;\n    p5 = Xd12C_out * si3;\n\n    Xb12_out -= p0;\n    Yb12_out += p1;\n    Xc12_out -= p2;\n    Yc12_out += p3;\n    Xd12_out -= p4;\n    Yd12_out += p5;\n\n    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n    pSrc[2U * i1] = Xc12_out;\n\n    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n    pSrc[(2U * i1) + 1U] = Yc12_out;\n\n    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n    pSrc[2U * i2] = Xb12_out;\n\n    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n    pSrc[(2U * i2) + 1U] = Yb12_out;\n\n    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n    pSrc[2U * i3] = Xd12_out;\n\n    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n    pSrc[(2U * i3) + 1U] = Yd12_out;\n\n    /*  Twiddle coefficients index modifier */\n    ia1 = ia1 + twidCoefModifier;\n\n    /*  Updating input index */\n    i0 = i0 + 1U;\n\n  } while (--j);\n\n  twidCoefModifier <<= 2U;\n\n  /*  Calculation of second stage to excluding last stage */\n  for (k = fftLen >> 2U; k > 4U; k >>= 2U) {\n    /*  Initializations for the first stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ia1 = 0U;\n\n    /*  Calculation of first stage */\n    j = 0;\n    do {\n      /*  index calculation for the coefficients */\n      ia2 = ia1 + ia1;\n      ia3 = ia2 + ia1;\n      co1 = pCoef[ia1 * 2U];\n      si1 = pCoef[(ia1 * 2U) + 1U];\n      co2 = pCoef[ia2 * 2U];\n      si2 = pCoef[(ia2 * 2U) + 1U];\n      co3 = pCoef[ia3 * 2U];\n      si3 = pCoef[(ia3 * 2U) + 1U];\n\n      /*  Twiddle coefficients index modifier */\n      ia1 = ia1 + twidCoefModifier;\n\n      i0 = j;\n      do {\n        /*  index calculation for the input as, */\n        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 +\n         * 3fftLen/4] */\n        i1 = i0 + n2;\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n\n        xaIn = pSrc[(2U * i0)];\n        yaIn = pSrc[(2U * i0) + 1U];\n\n        xbIn = pSrc[(2U * i1)];\n        ybIn = pSrc[(2U * i1) + 1U];\n\n        xcIn = pSrc[(2U * i2)];\n        ycIn = pSrc[(2U * i2) + 1U];\n\n        xdIn = pSrc[(2U * i3)];\n        ydIn = pSrc[(2U * i3) + 1U];\n\n        /* xa - xc */\n        Xaminusc = xaIn - xcIn;\n        /* (xb - xd) */\n        Xbminusd = xbIn - xdIn;\n        /* ya - yc */\n        Yaminusc = yaIn - ycIn;\n        /* (yb - yd) */\n        Ybminusd = ybIn - ydIn;\n\n        /* xa + xc */\n        Xaplusc = xaIn + xcIn;\n        /* xb + xd */\n        Xbplusd = xbIn + xdIn;\n        /* ya + yc */\n        Yaplusc = yaIn + ycIn;\n        /* yb + yd */\n        Ybplusd = ybIn + ydIn;\n\n        /* (xa - xc) - (yb - yd) */\n        Xb12C_out = (Xaminusc - Ybminusd);\n        /* (ya - yc) +  (xb - xd) */\n        Yb12C_out = (Yaminusc + Xbminusd);\n        /* xa + xc -(xb + xd) */\n        Xc12C_out = (Xaplusc - Xbplusd);\n        /* (ya + yc) - (yb + yd) */\n        Yc12C_out = (Yaplusc - Ybplusd);\n        /* (xa - xc) + (yb - yd) */\n        Xd12C_out = (Xaminusc + Ybminusd);\n        /* (ya - yc) -  (xb - xd) */\n        Yd12C_out = (Yaminusc - Xbminusd);\n\n        pSrc[(2U * i0)] = Xaplusc + Xbplusd;\n        pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;\n\n        Xb12_out = Xb12C_out * co1;\n        Yb12_out = Yb12C_out * co1;\n        Xc12_out = Xc12C_out * co2;\n        Yc12_out = Yc12C_out * co2;\n        Xd12_out = Xd12C_out * co3;\n        Yd12_out = Yd12C_out * co3;\n\n        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n        // Xb12_out -= Yb12C_out * si1;\n        p0 = Yb12C_out * si1;\n        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n        // Yb12_out += Xb12C_out * si1;\n        p1 = Xb12C_out * si1;\n        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n        // Xc12_out -= Yc12C_out * si2;\n        p2 = Yc12C_out * si2;\n        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n        // Yc12_out += Xc12C_out * si2;\n        p3 = Xc12C_out * si2;\n        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n        // Xd12_out -= Yd12C_out * si3;\n        p4 = Yd12C_out * si3;\n        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n        // Yd12_out += Xd12C_out * si3;\n        p5 = Xd12C_out * si3;\n\n        Xb12_out -= p0;\n        Yb12_out += p1;\n        Xc12_out -= p2;\n        Yc12_out += p3;\n        Xd12_out -= p4;\n        Yd12_out += p5;\n\n        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n        pSrc[2U * i1] = Xc12_out;\n\n        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n        pSrc[(2U * i1) + 1U] = Yc12_out;\n\n        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n        pSrc[2U * i2] = Xb12_out;\n\n        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n        pSrc[(2U * i2) + 1U] = Yb12_out;\n\n        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n        pSrc[2U * i3] = Xd12_out;\n\n        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n        pSrc[(2U * i3) + 1U] = Yd12_out;\n\n        i0 += n1;\n      } while (i0 < fftLen);\n      j++;\n    } while (j <= (n2 - 1U));\n    twidCoefModifier <<= 2U;\n  }\n  /*  Initializations of last stage */\n\n  j = fftLen >> 2;\n  ptr1 = &pSrc[0];\n\n  /*  Calculations of last stage */\n  do {\n    xaIn = ptr1[0];\n    yaIn = ptr1[1];\n    xbIn = ptr1[2];\n    ybIn = ptr1[3];\n    xcIn = ptr1[4];\n    ycIn = ptr1[5];\n    xdIn = ptr1[6];\n    ydIn = ptr1[7];\n\n    /*  Butterfly implementation */\n    /* xa + xc */\n    Xaplusc = xaIn + xcIn;\n\n    /* xa - xc */\n    Xaminusc = xaIn - xcIn;\n\n    /* ya + yc */\n    Yaplusc = yaIn + ycIn;\n\n    /* ya - yc */\n    Yaminusc = yaIn - ycIn;\n\n    /* xb + xd */\n    Xbplusd = xbIn + xdIn;\n\n    /* yb + yd */\n    Ybplusd = ybIn + ydIn;\n\n    /* (xb-xd) */\n    Xbminusd = xbIn - xdIn;\n\n    /* (yb-yd) */\n    Ybminusd = ybIn - ydIn;\n\n    /* xa' = (xa+xb+xc+xd) * onebyfftLen */\n    a0 = (Xaplusc + Xbplusd);\n    /* ya' = (ya+yb+yc+yd) * onebyfftLen */\n    a1 = (Yaplusc + Ybplusd);\n    /* xc' = (xa-xb+xc-xd) * onebyfftLen */\n    a2 = (Xaplusc - Xbplusd);\n    /* yc' = (ya-yb+yc-yd) * onebyfftLen  */\n    a3 = (Yaplusc - Ybplusd);\n    /* xb' = (xa-yb-xc+yd) * onebyfftLen */\n    a4 = (Xaminusc - Ybminusd);\n    /* yb' = (ya+xb-yc-xd) * onebyfftLen */\n    a5 = (Yaminusc + Xbminusd);\n    /* xd' = (xa-yb-xc+yd) * onebyfftLen */\n    a6 = (Xaminusc + Ybminusd);\n    /* yd' = (ya-xb-yc+xd) * onebyfftLen */\n    a7 = (Yaminusc - Xbminusd);\n\n    p0 = a0 * onebyfftLen;\n    p1 = a1 * onebyfftLen;\n    p2 = a2 * onebyfftLen;\n    p3 = a3 * onebyfftLen;\n    p4 = a4 * onebyfftLen;\n    p5 = a5 * onebyfftLen;\n    p6 = a6 * onebyfftLen;\n    p7 = a7 * onebyfftLen;\n\n    /* xa' = (xa+xb+xc+xd) * onebyfftLen */\n    ptr1[0] = p0;\n    /* ya' = (ya+yb+yc+yd) * onebyfftLen */\n    ptr1[1] = p1;\n    /* xc' = (xa-xb+xc-xd) * onebyfftLen */\n    ptr1[2] = p2;\n    /* yc' = (ya-yb+yc-yd) * onebyfftLen  */\n    ptr1[3] = p3;\n    /* xb' = (xa-yb-xc+yd) * onebyfftLen */\n    ptr1[4] = p4;\n    /* yb' = (ya+xb-yc-xd) * onebyfftLen */\n    ptr1[5] = p5;\n    /* xd' = (xa-yb-xc+yd) * onebyfftLen */\n    ptr1[6] = p6;\n    /* yd' = (ya-xb-yc+xd) * onebyfftLen */\n    ptr1[7] = p7;\n\n    /* increment source pointer by 8 for next calculations */\n    ptr1 = ptr1 + 8U;\n\n  } while (--j);\n\n#else\n\n  float32_t t1, t2, r1, r2, s1, s2;\n\n  /*  Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n\n  /*  Calculation of first stage */\n  for (k = fftLen; k > 4U; k >>= 2U) {\n    /*  Initializations for the first stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ia1 = 0U;\n\n    /*  Calculation of first stage */\n    j = 0;\n    do {\n      /*  index calculation for the coefficients */\n      ia2 = ia1 + ia1;\n      ia3 = ia2 + ia1;\n      co1 = pCoef[ia1 * 2U];\n      si1 = pCoef[(ia1 * 2U) + 1U];\n      co2 = pCoef[ia2 * 2U];\n      si2 = pCoef[(ia2 * 2U) + 1U];\n      co3 = pCoef[ia3 * 2U];\n      si3 = pCoef[(ia3 * 2U) + 1U];\n\n      /*  Twiddle coefficients index modifier */\n      ia1 = ia1 + twidCoefModifier;\n\n      i0 = j;\n      do {\n        /*  index calculation for the input as, */\n        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 +\n         * 3fftLen/4] */\n        i1 = i0 + n2;\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n\n        /* xa + xc */\n        r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];\n\n        /* xa - xc */\n        r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];\n\n        /* ya + yc */\n        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];\n\n        /* ya - yc */\n        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];\n\n        /* xb + xd */\n        t1 = pSrc[2U * i1] + pSrc[2U * i3];\n\n        /* xa' = xa + xb + xc + xd */\n        pSrc[2U * i0] = r1 + t1;\n\n        /* xa + xc -(xb + xd) */\n        r1 = r1 - t1;\n\n        /* yb + yd */\n        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];\n\n        /* ya' = ya + yb + yc + yd */\n        pSrc[(2U * i0) + 1U] = s1 + t2;\n\n        /* (ya + yc) - (yb + yd) */\n        s1 = s1 - t2;\n\n        /* (yb - yd) */\n        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];\n\n        /* (xb - xd) */\n        t2 = pSrc[2U * i1] - pSrc[2U * i3];\n\n        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n        pSrc[2U * i1] = (r1 * co2) - (s1 * si2);\n\n        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n        pSrc[(2U * i1) + 1U] = (s1 * co2) + (r1 * si2);\n\n        /* (xa - xc) - (yb - yd) */\n        r1 = r2 - t1;\n\n        /* (xa - xc) + (yb - yd) */\n        r2 = r2 + t1;\n\n        /* (ya - yc) +  (xb - xd) */\n        s1 = s2 + t2;\n\n        /* (ya - yc) -  (xb - xd) */\n        s2 = s2 - t2;\n\n        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n        pSrc[2U * i2] = (r1 * co1) - (s1 * si1);\n\n        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n        pSrc[(2U * i2) + 1U] = (s1 * co1) + (r1 * si1);\n\n        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n        pSrc[2U * i3] = (r2 * co3) - (s2 * si3);\n\n        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n        pSrc[(2U * i3) + 1U] = (s2 * co3) + (r2 * si3);\n\n        i0 += n1;\n      } while (i0 < fftLen);\n      j++;\n    } while (j <= (n2 - 1U));\n    twidCoefModifier <<= 2U;\n  }\n  /*  Initializations of last stage */\n  n1 = n2;\n  n2 >>= 2U;\n\n  /*  Calculations of last stage */\n  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) {\n    /*  index calculation for the input as, */\n    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 +\n     * 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    /*  Butterfly implementation */\n    /* xa + xc */\n    r1 = pSrc[2U * i0] + pSrc[2U * i2];\n\n    /* xa - xc */\n    r2 = pSrc[2U * i0] - pSrc[2U * i2];\n\n    /* ya + yc */\n    s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];\n\n    /* ya - yc */\n    s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];\n\n    /* xc + xd */\n    t1 = pSrc[2U * i1] + pSrc[2U * i3];\n\n    /* xa' = xa + xb + xc + xd */\n    pSrc[2U * i0] = (r1 + t1) * onebyfftLen;\n\n    /* (xa + xb) - (xc + xd) */\n    r1 = r1 - t1;\n\n    /* yb + yd */\n    t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];\n\n    /* ya' = ya + yb + yc + yd */\n    pSrc[(2U * i0) + 1U] = (s1 + t2) * onebyfftLen;\n\n    /* (ya + yc) - (yb + yd) */\n    s1 = s1 - t2;\n\n    /* (yb-yd) */\n    t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];\n\n    /* (xb-xd) */\n    t2 = pSrc[2U * i1] - pSrc[2U * i3];\n\n    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n    pSrc[2U * i1] = r1 * onebyfftLen;\n\n    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n    pSrc[(2U * i1) + 1U] = s1 * onebyfftLen;\n\n    /* (xa - xc) - (yb-yd) */\n    r1 = r2 - t1;\n\n    /* (xa - xc) + (yb-yd) */\n    r2 = r2 + t1;\n\n    /* (ya - yc) + (xb-xd) */\n    s1 = s2 + t2;\n\n    /* (ya - yc) - (xb-xd) */\n    s2 = s2 - t2;\n\n    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n    pSrc[2U * i2] = r1 * onebyfftLen;\n\n    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n    pSrc[(2U * i2) + 1U] = s1 * onebyfftLen;\n\n    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n    pSrc[2U * i3] = r2 * onebyfftLen;\n\n    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n    pSrc[(2U * i3) + 1U] = s2 * onebyfftLen;\n  }\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix4_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix4_init_f32.c\n * Description:  Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT\n * Initialization function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superceded by \\ref\n  arm_cfft_f32 and will be removed in the future.\n  @param[in,out] S              points to an instance of the floating-point\n  CFFT/CIFFT structure\n  @param[in]     fftLen         length of the FFT\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a\n  supported length\n\n  @par           Details\n                   The parameter ifftFlag controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlag for calculation of\n  CIFFT otherwise  CFFT is calculated\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   The parameter fftLen Specifies length of\n  CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.\n  @par\n                   This Function also initializes Twiddle factor table pointer\n  and Bit reversal table pointer.\n */\n\narm_status arm_cfft_radix4_init_f32(arm_cfft_radix4_instance_f32 *S,\n                                    uint16_t fftLen, uint8_t ifftFlag,\n                                    uint8_t bitReverseFlag) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /*  Initialise the FFT length */\n  S->fftLen = fftLen;\n\n  /*  Initialise the Twiddle coefficient pointer */\n  S->pTwiddle = (float32_t *)twiddleCoef;\n\n  /*  Initialise the Flag for selection of CFFT or CIFFT */\n  S->ifftFlag = ifftFlag;\n\n  /*  Initialise the Flag for calculation Bit reversal or not */\n  S->bitReverseFlag = bitReverseFlag;\n\n  /*  Initializations of structure parameters depending on the FFT length */\n  switch (S->fftLen) {\n\n  case 4096U:\n    /*  Initializations of structure parameters for 4096 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 1U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 1U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)armBitRevTable;\n    /*  Initialise the 1/fftLen Value */\n    S->onebyfftLen = 0.000244140625;\n    break;\n\n  case 1024U:\n    /*  Initializations of structure parameters for 1024 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 4U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 4U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[3];\n    /*  Initialise the 1/fftLen Value */\n    S->onebyfftLen = 0.0009765625f;\n    break;\n\n  case 256U:\n    /*  Initializations of structure parameters for 256 point FFT */\n    S->twidCoefModifier = 16U;\n    S->bitRevFactor = 16U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[15];\n    S->onebyfftLen = 0.00390625f;\n    break;\n\n  case 64U:\n    /*  Initializations of structure parameters for 64 point FFT */\n    S->twidCoefModifier = 64U;\n    S->bitRevFactor = 64U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[63];\n    S->onebyfftLen = 0.015625f;\n    break;\n\n  case 16U:\n    /*  Initializations of structure parameters for 16 point FFT */\n    S->twidCoefModifier = 256U;\n    S->bitRevFactor = 256U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[255];\n    S->onebyfftLen = 0.0625f;\n    break;\n\n  default:\n    /*  Reporting argument error if fftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix4_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix4_init_q15.c\n * Description:  Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization\n * function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief Initialization function for the Q15 CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superseded by \\ref\n  arm_cfft_q15 and will be removed in the future.\n  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT\n  structure\n  @param[in]     fftLen         length of the FFT\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a\n  supported length\n\n  @par           Details\n                   The parameter ifftFlag controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlag for calculation of\n  CIFFT otherwise  CFFT is calculated\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   The parameter fftLen Specifies length of\n  CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.\n  @par\n                   This Function also initializes Twiddle factor table pointer\n  and Bit reversal table pointer.\n */\n\narm_status arm_cfft_radix4_init_q15(arm_cfft_radix4_instance_q15 *S,\n                                    uint16_t fftLen, uint8_t ifftFlag,\n                                    uint8_t bitReverseFlag) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n  /*  Initialise the FFT length */\n  S->fftLen = fftLen;\n  /*  Initialise the Twiddle coefficient pointer */\n  S->pTwiddle = (q15_t *)twiddleCoef_4096_q15;\n  /*  Initialise the Flag for selection of CFFT or CIFFT */\n  S->ifftFlag = ifftFlag;\n  /*  Initialise the Flag for calculation Bit reversal or not */\n  S->bitReverseFlag = bitReverseFlag;\n\n  /*  Initializations of structure parameters depending on the FFT length */\n  switch (S->fftLen) {\n  case 4096U:\n    /*  Initializations of structure parameters for 4096 point FFT */\n\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 1U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 1U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)armBitRevTable;\n\n    break;\n\n  case 1024U:\n    /*  Initializations of structure parameters for 1024 point FFT */\n    S->twidCoefModifier = 4U;\n    S->bitRevFactor = 4U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[3];\n\n    break;\n\n  case 256U:\n    /*  Initializations of structure parameters for 256 point FFT */\n    S->twidCoefModifier = 16U;\n    S->bitRevFactor = 16U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[15];\n\n    break;\n\n  case 64U:\n    /*  Initializations of structure parameters for 64 point FFT */\n    S->twidCoefModifier = 64U;\n    S->bitRevFactor = 64U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[63];\n\n    break;\n\n  case 16U:\n    /*  Initializations of structure parameters for 16 point FFT */\n    S->twidCoefModifier = 256U;\n    S->bitRevFactor = 256U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[255];\n\n    break;\n\n  default:\n    /*  Reporting argument error if fftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix4_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix4_init_q31.c\n * Description:  Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization\n * function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n\n  @brief         Initialization function for the Q31 CFFT/CIFFT.\n  @deprecated    Do not use this function. It has been superseded by \\ref\n  arm_cfft_q31 and will be removed in the future.\n  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT\n  structure.\n  @param[in]     fftLen         length of the FFT.\n  @param[in]     ifftFlag       flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a\n  supported length\n\n  @par           Details\n                   The parameter ifftFlag controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlag for calculation of\n  CIFFT otherwise  CFFT is calculated\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   The parameter fftLen Specifies length of\n  CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.\n  @par\n                   This Function also initializes Twiddle factor table pointer\n  and Bit reversal table pointer.\n*/\n\narm_status arm_cfft_radix4_init_q31(arm_cfft_radix4_instance_q31 *S,\n                                    uint16_t fftLen, uint8_t ifftFlag,\n                                    uint8_t bitReverseFlag) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n  /*  Initialise the FFT length */\n  S->fftLen = fftLen;\n  /*  Initialise the Twiddle coefficient pointer */\n  S->pTwiddle = (q31_t *)twiddleCoef_4096_q31;\n  /*  Initialise the Flag for selection of CFFT or CIFFT */\n  S->ifftFlag = ifftFlag;\n  /*  Initialise the Flag for calculation Bit reversal or not */\n  S->bitReverseFlag = bitReverseFlag;\n\n  /*  Initializations of Instance structure depending on the FFT length */\n  switch (S->fftLen) {\n    /*  Initializations of structure parameters for 4096 point FFT */\n  case 4096U:\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 1U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 1U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)armBitRevTable;\n    break;\n\n    /*  Initializations of structure parameters for 1024 point FFT */\n  case 1024U:\n    /*  Initialise the twiddle coef modifier value */\n    S->twidCoefModifier = 4U;\n    /*  Initialise the bit reversal table modifier */\n    S->bitRevFactor = 4U;\n    /*  Initialise the bit reversal table pointer */\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[3];\n    break;\n\n  case 256U:\n    /*  Initializations of structure parameters for 256 point FFT */\n    S->twidCoefModifier = 16U;\n    S->bitRevFactor = 16U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[15];\n    break;\n\n  case 64U:\n    /*  Initializations of structure parameters for 64 point FFT */\n    S->twidCoefModifier = 64U;\n    S->bitRevFactor = 64U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[63];\n    break;\n\n  case 16U:\n    /*  Initializations of structure parameters for 16 point FFT */\n    S->twidCoefModifier = 256U;\n    S->bitRevFactor = 256U;\n    S->pBitRevTable = (uint16_t *)&armBitRevTable[255];\n    break;\n\n  default:\n    /*  Reporting argument error if fftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  return (status);\n}\n\n/**\n  @} end of ComplexFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix4_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix4_q15.c\n * Description:  This file has function definition of Radix-4 FFT & IFFT\n * function and In-place bit reversal using bit reversal table\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nvoid arm_radix4_butterfly_q15(q15_t *pSrc16, uint32_t fftLen,\n                              const q15_t *pCoef16, uint32_t twidCoefModifier);\n\nvoid arm_radix4_butterfly_inverse_q15(q15_t *pSrc16, uint32_t fftLen,\n                                      const q15_t *pCoef16,\n                                      uint32_t twidCoefModifier);\n\nvoid arm_bitreversal_q15(q15_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor,\n                         const uint16_t *pBitRevTab);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief               Processing function for the Q15 CFFT/CIFFT.\n  @deprecated          Do not use this function.  It has been superseded by \\ref\n  arm_cfft_q15 and will be removed in the future.\n  @param[in]     S     points to an instance of the Q15 CFFT/CIFFT structure.\n  @param[in,out] pSrc  points to the complex data buffer. Processing occurs\n  in-place.\n  @return        none\n\n  @par Input and output formats:\n                 Internally input is downscaled by 2 for every stage to avoid\n  saturations inside CFFT/CIFFT process. Hence the output format is different\n  for different FFT sizes. The input and output formats for different FFT sizes\n  and number of bits to upscale are mentioned in the tables below for CFFT and\n  CIFFT:\n  @par\n                 \\image html CFFTQ15.gif \"Input and Output Formats for Q15 CFFT\"\n                 \\image html CIFFTQ15.gif \"Input and Output Formats for Q15\n  CIFFT\"\n */\n\nvoid arm_cfft_radix4_q15(const arm_cfft_radix4_instance_q15 *S, q15_t *pSrc) {\n  if (S->ifftFlag == 1U) {\n    /*  Complex IFFT radix-4  */\n    arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle,\n                                     S->twidCoefModifier);\n  } else {\n    /*  Complex FFT radix-4  */\n    arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);\n  }\n\n  if (S->bitReverseFlag == 1U) {\n    /*  Bit Reversal */\n    arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);\n  }\n}\n\n/**\n  @} end of ComplexFFT group\n */\n\n/*\n * Radix-4 FFT algorithm used is :\n *\n * Input real and imaginary data:\n * x(n) = xa + j * ya\n * x(n+N/4 ) = xb + j * yb\n * x(n+N/2 ) = xc + j * yc\n * x(n+3N 4) = xd + j * yd\n *\n *\n * Output real and imaginary data:\n * x(4r) = xa'+ j * ya'\n * x(4r+1) = xb'+ j * yb'\n * x(4r+2) = xc'+ j * yc'\n * x(4r+3) = xd'+ j * yd'\n *\n *\n * Twiddle factors for radix-4 FFT:\n * Wn = co1 + j * (- si1)\n * W2n = co2 + j * (- si2)\n * W3n = co3 + j * (- si3)\n\n * The real and imaginary output values for the radix-4 butterfly are\n * xa' = xa + xb + xc + xd\n * ya' = ya + yb + yc + yd\n * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)\n * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)\n * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)\n * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)\n * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)\n * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)\n *\n */\n\n/**\n  @brief         Core function for the Q15 CFFT butterfly process.\n  @param[in,out] pSrc16          points to the in-place buffer of Q15 data type\n  @param[in]     fftLen           length of the FFT\n  @param[in]     pCoef16         points to twiddle coefficient buffer\n  @param[in]     twidCoefModifier twiddle coefficient modifier that supports\n  different size FFTs with the same twiddle factor table\n  @return        none\n */\n\nvoid arm_radix4_butterfly_q15(q15_t *pSrc16, uint32_t fftLen,\n                              const q15_t *pCoef16, uint32_t twidCoefModifier) {\n\n#if defined(ARM_MATH_DSP)\n\n  q31_t R, S, T, U;\n  q31_t C1, C2, C3, out1, out2;\n  uint32_t n1, n2, ic, i0, j, k;\n\n  q15_t *ptr1;\n  q15_t *pSi0;\n  q15_t *pSi1;\n  q15_t *pSi2;\n  q15_t *pSi3;\n\n  q31_t xaya, xbyb, xcyc, xdyd;\n\n  /* Total process is divided into three stages */\n\n  /* process first stage, middle stages, & last stage */\n\n  /*  Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n\n  /* n2 = fftLen/4 */\n  n2 >>= 2U;\n\n  /* Index for twiddle coefficient */\n  ic = 0U;\n\n  /* Index for input read and output write */\n  j = n2;\n\n  pSi0 = pSrc16;\n  pSi1 = pSi0 + 2 * n2;\n  pSi2 = pSi1 + 2 * n2;\n  pSi3 = pSi2 + 2 * n2;\n\n  /* Input is in 1.15(q15) format */\n\n  /*  start of first stage process */\n  do {\n    /*  Butterfly implementation */\n\n    /* Reading i0, i0+fftLen/2 inputs */\n    /* Read ya (real), xa(imag) input */\n    T = read_q15x2(pSi0);\n    T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */\n    T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the\n                            alternative takes 3 cycles */\n                         /*\n                             in = ((int16_t) (T & 0xFFFF)) >> 2;       // alternative code that takes\n                            3 cycles                      T = ((T >> 2) & 0xFFFF0000) | (in &\n                            0xFFFF);\n                         */\n\n    /* Read yc (real), xc(imag) input */\n    S = read_q15x2(pSi2);\n    S = __SHADD16(S, 0);\n    S = __SHADD16(S, 0);\n\n    /* R = packed((ya + yc), (xa + xc) ) */\n    R = __QADD16(T, S);\n\n    /* S = packed((ya - yc), (xa - xc) ) */\n    S = __QSUB16(T, S);\n\n    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n    /* Read yb (real), xb(imag) input */\n    T = read_q15x2(pSi1);\n    T = __SHADD16(T, 0);\n    T = __SHADD16(T, 0);\n\n    /* Read yd (real), xd(imag) input */\n    U = read_q15x2(pSi3);\n    U = __SHADD16(U, 0);\n    U = __SHADD16(U, 0);\n\n    /* T = packed((yb + yd), (xb + xd) ) */\n    T = __QADD16(T, U);\n\n    /*  writing the butterfly processed i0 sample */\n    /* xa' = xa + xb + xc + xd */\n    /* ya' = ya + yb + yc + yd */\n    write_q15x2_ia(&pSi0, __SHADD16(R, T));\n\n    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */\n    R = __QSUB16(R, T);\n\n    /* co2 & si2 are read from SIMD Coefficient pointer */\n    C2 = read_q15x2((q15_t *)pCoef16 + (4U * ic));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */\n    out1 = __SMUAD(C2, R) >> 16U;\n    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n    out2 = __SMUSDX(C2, R);\n#else\n    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n    out1 = __SMUSDX(R, C2) >> 16U;\n    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */\n    out2 = __SMUAD(C2, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /*  Reading i0+fftLen/4 */\n    /* T = packed(yb, xb) */\n    T = read_q15x2(pSi1);\n    T = __SHADD16(T, 0);\n    T = __SHADD16(T, 0);\n\n    /* writing the butterfly processed i0 + fftLen/4 sample */\n    /* writing output(xc', yc') in little endian format */\n    write_q15x2_ia(&pSi1, (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n    /*  Butterfly calculations */\n    /* U = packed(yd, xd) */\n    U = read_q15x2(pSi3);\n    U = __SHADD16(U, 0);\n    U = __SHADD16(U, 0);\n\n    /* T = packed(yb-yd, xb-xd) */\n    T = __QSUB16(T, U);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */\n    R = __QASX(S, T);\n    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */\n    S = __QSAX(S, T);\n#else\n    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */\n    R = __QSAX(S, T);\n    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */\n    S = __QASX(S, T);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* co1 & si1 are read from SIMD Coefficient pointer */\n    C1 = read_q15x2((q15_t *)pCoef16 + (2U * ic));\n    /*  Butterfly process for the i0+fftLen/2 sample */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */\n    out1 = __SMUAD(C1, S) >> 16U;\n    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */\n    out2 = __SMUSDX(C1, S);\n#else\n    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */\n    out1 = __SMUSDX(S, C1) >> 16U;\n    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */\n    out2 = __SMUAD(C1, S);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* writing output(xb', yb') in little endian format */\n    write_q15x2_ia(&pSi2, ((out2)&0xFFFF0000) | ((out1)&0x0000FFFF));\n\n    /* co3 & si3 are read from SIMD Coefficient pointer */\n    C3 = read_q15x2((q15_t *)pCoef16 + (6U * ic));\n    /*  Butterfly process for the i0+3fftLen/4 sample */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */\n    out1 = __SMUAD(C3, R) >> 16U;\n    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */\n    out2 = __SMUSDX(C3, R);\n#else\n    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */\n    out1 = __SMUSDX(R, C3) >> 16U;\n    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */\n    out2 = __SMUAD(C3, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* writing output(xd', yd') in little endian format */\n    write_q15x2_ia(&pSi3, ((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n    /*  Twiddle coefficients index modifier */\n    ic = ic + twidCoefModifier;\n\n  } while (--j);\n  /* data is in 4.11(q11) format */\n\n  /* end of first stage process */\n\n  /* start of middle stage process */\n\n  /*  Twiddle coefficients index modifier */\n  twidCoefModifier <<= 2U;\n\n  /*  Calculation of Middle stage */\n  for (k = fftLen / 4U; k > 4U; k >>= 2U) {\n    /*  Initializations for the middle stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ic = 0U;\n\n    for (j = 0U; j <= (n2 - 1U); j++) {\n      /*  index calculation for the coefficients */\n      C1 = read_q15x2((q15_t *)pCoef16 + (2U * ic));\n      C2 = read_q15x2((q15_t *)pCoef16 + (4U * ic));\n      C3 = read_q15x2((q15_t *)pCoef16 + (6U * ic));\n\n      /*  Twiddle coefficients index modifier */\n      ic = ic + twidCoefModifier;\n\n      pSi0 = pSrc16 + 2 * j;\n      pSi1 = pSi0 + 2 * n2;\n      pSi2 = pSi1 + 2 * n2;\n      pSi3 = pSi2 + 2 * n2;\n\n      /*  Butterfly implementation */\n      for (i0 = j; i0 < fftLen; i0 += n1) {\n        /*  Reading i0, i0+fftLen/2 inputs */\n        /* Read ya (real), xa(imag) input */\n        T = read_q15x2(pSi0);\n\n        /* Read yc (real), xc(imag) input */\n        S = read_q15x2(pSi2);\n\n        /* R = packed( (ya + yc), (xa + xc)) */\n        R = __QADD16(T, S);\n\n        /* S = packed((ya - yc), (xa - xc)) */\n        S = __QSUB16(T, S);\n\n        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n        /* Read yb (real), xb(imag) input */\n        T = read_q15x2(pSi1);\n\n        /* Read yd (real), xd(imag) input */\n        U = read_q15x2(pSi3);\n\n        /* T = packed( (yb + yd), (xb + xd)) */\n        T = __QADD16(T, U);\n\n        /*  writing the butterfly processed i0 sample */\n\n        /* xa' = xa + xb + xc + xd */\n        /* ya' = ya + yb + yc + yd */\n        out1 = __SHADD16(R, T);\n        out1 = __SHADD16(out1, 0);\n        write_q15x2(pSi0, out1);\n        pSi0 += 2 * n1;\n\n        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */\n        R = __SHSUB16(R, T);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */\n        out1 = __SMUAD(C2, R) >> 16U;\n\n        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n        out2 = __SMUSDX(C2, R);\n#else\n        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n        out1 = __SMUSDX(R, C2) >> 16U;\n\n        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */\n        out2 = __SMUAD(C2, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /*  Reading i0+3fftLen/4 */\n        /* Read yb (real), xb(imag) input */\n        T = read_q15x2(pSi1);\n\n        /*  writing the butterfly processed i0 + fftLen/4 sample */\n        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */\n        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n        write_q15x2(pSi1, ((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n        pSi1 += 2 * n1;\n\n        /*  Butterfly calculations */\n\n        /* Read yd (real), xd(imag) input */\n        U = read_q15x2(pSi3);\n\n        /* T = packed(yb-yd, xb-xd) */\n        T = __QSUB16(T, U);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */\n        R = __SHASX(S, T);\n\n        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */\n        S = __SHSAX(S, T);\n\n        /*  Butterfly process for the i0+fftLen/2 sample */\n        out1 = __SMUAD(C1, S) >> 16U;\n        out2 = __SMUSDX(C1, S);\n#else\n        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */\n        R = __SHSAX(S, T);\n\n        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */\n        S = __SHASX(S, T);\n\n        /*  Butterfly process for the i0+fftLen/2 sample */\n        out1 = __SMUSDX(S, C1) >> 16U;\n        out2 = __SMUAD(C1, S);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */\n        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */\n        write_q15x2(pSi2, ((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n        pSi2 += 2 * n1;\n\n        /*  Butterfly process for the i0+3fftLen/4 sample */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        out1 = __SMUAD(C3, R) >> 16U;\n        out2 = __SMUSDX(C3, R);\n#else\n        out1 = __SMUSDX(R, C3) >> 16U;\n        out2 = __SMUAD(C3, R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */\n        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */\n        write_q15x2(pSi3, ((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n        pSi3 += 2 * n1;\n      }\n    }\n    /*  Twiddle coefficients index modifier */\n    twidCoefModifier <<= 2U;\n  }\n  /* end of middle stage process */\n\n  /* data is in 10.6(q6) format for the 1024 point */\n  /* data is in 8.8(q8) format for the 256 point */\n  /* data is in 6.10(q10) format for the 64 point */\n  /* data is in 4.12(q12) format for the 16 point */\n\n  /*  Initializations for the last stage */\n  j = fftLen >> 2;\n\n  ptr1 = &pSrc16[0];\n\n  /* start of last stage process */\n\n  /*  Butterfly implementation */\n  do {\n    /* Read xa (real), ya(imag) input */\n    xaya = read_q15x2_ia((q15_t **)&ptr1);\n\n    /* Read xb (real), yb(imag) input */\n    xbyb = read_q15x2_ia((q15_t **)&ptr1);\n\n    /* Read xc (real), yc(imag) input */\n    xcyc = read_q15x2_ia((q15_t **)&ptr1);\n\n    /* Read xd (real), yd(imag) input */\n    xdyd = read_q15x2_ia((q15_t **)&ptr1);\n\n    /* R = packed((ya + yc), (xa + xc)) */\n    R = __QADD16(xaya, xcyc);\n\n    /* T = packed((yb + yd), (xb + xd)) */\n    T = __QADD16(xbyb, xdyd);\n\n    /* pointer updation for writing */\n    ptr1 = ptr1 - 8U;\n\n    /* xa' = xa + xb + xc + xd */\n    /* ya' = ya + yb + yc + yd */\n    write_q15x2_ia(&ptr1, __SHADD16(R, T));\n\n    /* T = packed((yb + yd), (xb + xd)) */\n    T = __QADD16(xbyb, xdyd);\n\n    /* xc' = (xa-xb+xc-xd) */\n    /* yc' = (ya-yb+yc-yd) */\n    write_q15x2_ia(&ptr1, __SHSUB16(R, T));\n\n    /* S = packed((ya - yc), (xa - xc)) */\n    S = __QSUB16(xaya, xcyc);\n\n    /* Read yd (real), xd(imag) input */\n    /* T = packed( (yb - yd), (xb - xd))  */\n    U = __QSUB16(xbyb, xdyd);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* xb' = (xa+yb-xc-yd) */\n    /* yb' = (ya-xb-yc+xd) */\n    write_q15x2_ia(&ptr1, __SHSAX(S, U));\n\n    /* xd' = (xa-yb-xc+yd) */\n    /* yd' = (ya+xb-yc-xd) */\n    write_q15x2_ia(&ptr1, __SHASX(S, U));\n#else\n    /* xb' = (xa+yb-xc-yd) */\n    /* yb' = (ya-xb-yc+xd) */\n    write_q15x2_ia(&ptr1, __SHASX(S, U));\n\n    /* xd' = (xa-yb-xc+yd) */\n    /* yd' = (ya+xb-yc-xd) */\n    write_q15x2_ia(&ptr1, __SHSAX(S, U));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n  } while (--j);\n\n  /* end of last stage process */\n\n  /* output is in 11.5(q5) format for the 1024 point */\n  /* output is in 9.7(q7) format for the 256 point   */\n  /* output is in 7.9(q9) format for the 64 point  */\n  /* output is in 5.11(q11) format for the 16 point  */\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n  q15_t R0, R1, S0, S1, T0, T1, U0, U1;\n  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;\n  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;\n\n  /* Total process is divided into three stages */\n\n  /* process first stage, middle stages, & last stage */\n\n  /*  Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n\n  /* n2 = fftLen/4 */\n  n2 >>= 2U;\n\n  /* Index for twiddle coefficient */\n  ic = 0U;\n\n  /* Index for input read and output write */\n  i0 = 0U;\n  j = n2;\n\n  /* Input is in 1.15(q15) format */\n\n  /*  start of first stage process */\n  do {\n    /*  Butterfly implementation */\n\n    /*  index calculation for the input as, */\n    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0\n     * + 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    /*  Reading i0, i0+fftLen/2 inputs */\n\n    /* input is down scale by 4 to avoid overflow */\n    /* Read ya (real), xa(imag) input */\n    T0 = pSrc16[i0 * 2U] >> 2U;\n    T1 = pSrc16[(i0 * 2U) + 1U] >> 2U;\n\n    /* input is down scale by 4 to avoid overflow */\n    /* Read yc (real), xc(imag) input */\n    S0 = pSrc16[i2 * 2U] >> 2U;\n    S1 = pSrc16[(i2 * 2U) + 1U] >> 2U;\n\n    /* R0 = (ya + yc) */\n    R0 = __SSAT(T0 + S0, 16U);\n    /* R1 = (xa + xc) */\n    R1 = __SSAT(T1 + S1, 16U);\n\n    /* S0 = (ya - yc) */\n    S0 = __SSAT(T0 - S0, 16);\n    /* S1 = (xa - xc) */\n    S1 = __SSAT(T1 - S1, 16);\n\n    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n    /* input is down scale by 4 to avoid overflow */\n    /* Read yb (real), xb(imag) input */\n    T0 = pSrc16[i1 * 2U] >> 2U;\n    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;\n\n    /* input is down scale by 4 to avoid overflow */\n    /* Read yd (real), xd(imag) input */\n    U0 = pSrc16[i3 * 2U] >> 2U;\n    U1 = pSrc16[(i3 * 2U) + 1] >> 2U;\n\n    /* T0 = (yb + yd) */\n    T0 = __SSAT(T0 + U0, 16U);\n    /* T1 = (xb + xd) */\n    T1 = __SSAT(T1 + U1, 16U);\n\n    /*  writing the butterfly processed i0 sample */\n    /* ya' = ya + yb + yc + yd */\n    /* xa' = xa + xb + xc + xd */\n    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);\n    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);\n\n    /* R0 = (ya + yc) - (yb + yd) */\n    /* R1 = (xa + xc) - (xb + xd) */\n    R0 = __SSAT(R0 - T0, 16U);\n    R1 = __SSAT(R1 - T1, 16U);\n\n    /* co2 & si2 are read from Coefficient pointer */\n    Co2 = pCoef16[2U * ic * 2U];\n    Si2 = pCoef16[(2U * ic * 2U) + 1];\n\n    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */\n    out1 = (q15_t)((Co2 * R0 + Si2 * R1) >> 16U);\n    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n    out2 = (q15_t)((-Si2 * R0 + Co2 * R1) >> 16U);\n\n    /*  Reading i0+fftLen/4 */\n    /* input is down scale by 4 to avoid overflow */\n    /* T0 = yb, T1 =  xb */\n    T0 = pSrc16[i1 * 2U] >> 2;\n    T1 = pSrc16[(i1 * 2U) + 1] >> 2;\n\n    /* writing the butterfly processed i0 + fftLen/4 sample */\n    /* writing output(xc', yc') in little endian format */\n    pSrc16[i1 * 2U] = out1;\n    pSrc16[(i1 * 2U) + 1] = out2;\n\n    /*  Butterfly calculations */\n    /* input is down scale by 4 to avoid overflow */\n    /* U0 = yd, U1 = xd */\n    U0 = pSrc16[i3 * 2U] >> 2;\n    U1 = pSrc16[(i3 * 2U) + 1] >> 2;\n    /* T0 = yb-yd */\n    T0 = __SSAT(T0 - U0, 16);\n    /* T1 = xb-xd */\n    T1 = __SSAT(T1 - U1, 16);\n\n    /* R1 = (ya-yc) + (xb- xd),  R0 = (xa-xc) - (yb-yd)) */\n    R0 = (q15_t)__SSAT((q31_t)(S0 - T1), 16);\n    R1 = (q15_t)__SSAT((q31_t)(S1 + T0), 16);\n\n    /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */\n    S0 = (q15_t)__SSAT(((q31_t)S0 + T1), 16U);\n    S1 = (q15_t)__SSAT(((q31_t)S1 - T0), 16U);\n\n    /* co1 & si1 are read from Coefficient pointer */\n    Co1 = pCoef16[ic * 2U];\n    Si1 = pCoef16[(ic * 2U) + 1];\n    /*  Butterfly process for the i0+fftLen/2 sample */\n    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */\n    out1 = (q15_t)((Si1 * S1 + Co1 * S0) >> 16);\n    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */\n    out2 = (q15_t)((-Si1 * S0 + Co1 * S1) >> 16);\n\n    /* writing output(xb', yb') in little endian format */\n    pSrc16[i2 * 2U] = out1;\n    pSrc16[(i2 * 2U) + 1] = out2;\n\n    /* Co3 & si3 are read from Coefficient pointer */\n    Co3 = pCoef16[3U * (ic * 2U)];\n    Si3 = pCoef16[(3U * (ic * 2U)) + 1];\n    /*  Butterfly process for the i0+3fftLen/4 sample */\n    /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */\n    out1 = (q15_t)((Si3 * R1 + Co3 * R0) >> 16U);\n    /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */\n    out2 = (q15_t)((-Si3 * R0 + Co3 * R1) >> 16U);\n    /* writing output(xd', yd') in little endian format */\n    pSrc16[i3 * 2U] = out1;\n    pSrc16[(i3 * 2U) + 1] = out2;\n\n    /*  Twiddle coefficients index modifier */\n    ic = ic + twidCoefModifier;\n\n    /*  Updating input index */\n    i0 = i0 + 1U;\n\n  } while (--j);\n  /* data is in 4.11(q11) format */\n\n  /* end of first stage process */\n\n  /* start of middle stage process */\n\n  /*  Twiddle coefficients index modifier */\n  twidCoefModifier <<= 2U;\n\n  /*  Calculation of Middle stage */\n  for (k = fftLen / 4U; k > 4U; k >>= 2U) {\n    /*  Initializations for the middle stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ic = 0U;\n\n    for (j = 0U; j <= (n2 - 1U); j++) {\n      /*  index calculation for the coefficients */\n      Co1 = pCoef16[ic * 2U];\n      Si1 = pCoef16[(ic * 2U) + 1U];\n      Co2 = pCoef16[2U * (ic * 2U)];\n      Si2 = pCoef16[(2U * (ic * 2U)) + 1U];\n      Co3 = pCoef16[3U * (ic * 2U)];\n      Si3 = pCoef16[(3U * (ic * 2U)) + 1U];\n\n      /*  Twiddle coefficients index modifier */\n      ic = ic + twidCoefModifier;\n\n      /*  Butterfly implementation */\n      for (i0 = j; i0 < fftLen; i0 += n1) {\n        /*  index calculation for the input as, */\n        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2],\n         * pSrc16[i0 + 3fftLen/4] */\n        i1 = i0 + n2;\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n\n        /*  Reading i0, i0+fftLen/2 inputs */\n        /* Read ya (real), xa(imag) input */\n        T0 = pSrc16[i0 * 2U];\n        T1 = pSrc16[(i0 * 2U) + 1U];\n\n        /* Read yc (real), xc(imag) input */\n        S0 = pSrc16[i2 * 2U];\n        S1 = pSrc16[(i2 * 2U) + 1U];\n\n        /* R0 = (ya + yc), R1 = (xa + xc) */\n        R0 = __SSAT(T0 + S0, 16);\n        R1 = __SSAT(T1 + S1, 16);\n\n        /* S0 = (ya - yc), S1 =(xa - xc) */\n        S0 = __SSAT(T0 - S0, 16);\n        S1 = __SSAT(T1 - S1, 16);\n\n        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n        /* Read yb (real), xb(imag) input */\n        T0 = pSrc16[i1 * 2U];\n        T1 = pSrc16[(i1 * 2U) + 1U];\n\n        /* Read yd (real), xd(imag) input */\n        U0 = pSrc16[i3 * 2U];\n        U1 = pSrc16[(i3 * 2U) + 1U];\n\n        /* T0 = (yb + yd), T1 = (xb + xd) */\n        T0 = __SSAT(T0 + U0, 16);\n        T1 = __SSAT(T1 + U1, 16);\n\n        /*  writing the butterfly processed i0 sample */\n\n        /* xa' = xa + xb + xc + xd */\n        /* ya' = ya + yb + yc + yd */\n        out1 = ((R0 >> 1U) + (T0 >> 1U)) >> 1U;\n        out2 = ((R1 >> 1U) + (T1 >> 1U)) >> 1U;\n\n        pSrc16[i0 * 2U] = out1;\n        pSrc16[(2U * i0) + 1U] = out2;\n\n        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */\n        R0 = (R0 >> 1U) - (T0 >> 1U);\n        R1 = (R1 >> 1U) - (T1 >> 1U);\n\n        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */\n        out1 = (q15_t)((Co2 * R0 + Si2 * R1) >> 16U);\n\n        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n        out2 = (q15_t)((-Si2 * R0 + Co2 * R1) >> 16U);\n\n        /*  Reading i0+3fftLen/4 */\n        /* Read yb (real), xb(imag) input */\n        T0 = pSrc16[i1 * 2U];\n        T1 = pSrc16[(i1 * 2U) + 1U];\n\n        /*  writing the butterfly processed i0 + fftLen/4 sample */\n        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */\n        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n        pSrc16[i1 * 2U] = out1;\n        pSrc16[(i1 * 2U) + 1U] = out2;\n\n        /*  Butterfly calculations */\n\n        /* Read yd (real), xd(imag) input */\n        U0 = pSrc16[i3 * 2U];\n        U1 = pSrc16[(i3 * 2U) + 1U];\n\n        /* T0 = yb-yd, T1 = xb-xd */\n        T0 = __SSAT(T0 - U0, 16);\n        T1 = __SSAT(T1 - U1, 16);\n\n        /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */\n        R0 = (S0 >> 1U) - (T1 >> 1U);\n        R1 = (S1 >> 1U) + (T0 >> 1U);\n\n        /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */\n        S0 = (S0 >> 1U) + (T1 >> 1U);\n        S1 = (S1 >> 1U) - (T0 >> 1U);\n\n        /*  Butterfly process for the i0+fftLen/2 sample */\n        out1 = (q15_t)((Co1 * S0 + Si1 * S1) >> 16U);\n\n        out2 = (q15_t)((-Si1 * S0 + Co1 * S1) >> 16U);\n\n        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */\n        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */\n        pSrc16[i2 * 2U] = out1;\n        pSrc16[(i2 * 2U) + 1U] = out2;\n\n        /*  Butterfly process for the i0+3fftLen/4 sample */\n        out1 = (q15_t)((Si3 * R1 + Co3 * R0) >> 16U);\n\n        out2 = (q15_t)((-Si3 * R0 + Co3 * R1) >> 16U);\n        /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */\n        /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */\n        pSrc16[i3 * 2U] = out1;\n        pSrc16[(i3 * 2U) + 1U] = out2;\n      }\n    }\n    /*  Twiddle coefficients index modifier */\n    twidCoefModifier <<= 2U;\n  }\n  /* end of middle stage process */\n\n  /* data is in 10.6(q6) format for the 1024 point */\n  /* data is in 8.8(q8) format for the 256 point */\n  /* data is in 6.10(q10) format for the 64 point */\n  /* data is in 4.12(q12) format for the 16 point */\n\n  /*  Initializations for the last stage */\n  n1 = n2;\n  n2 >>= 2U;\n\n  /* start of last stage process */\n\n  /*  Butterfly implementation */\n  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) {\n    /*  index calculation for the input as, */\n    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0\n     * + 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    /*  Reading i0, i0+fftLen/2 inputs */\n    /* Read ya (real), xa(imag) input */\n    T0 = pSrc16[i0 * 2U];\n    T1 = pSrc16[(i0 * 2U) + 1U];\n\n    /* Read yc (real), xc(imag) input */\n    S0 = pSrc16[i2 * 2U];\n    S1 = pSrc16[(i2 * 2U) + 1U];\n\n    /* R0 = (ya + yc), R1 = (xa + xc) */\n    R0 = __SSAT(T0 + S0, 16U);\n    R1 = __SSAT(T1 + S1, 16U);\n\n    /* S0 = (ya - yc), S1 = (xa - xc) */\n    S0 = __SSAT(T0 - S0, 16U);\n    S1 = __SSAT(T1 - S1, 16U);\n\n    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n    /* Read yb (real), xb(imag) input */\n    T0 = pSrc16[i1 * 2U];\n    T1 = pSrc16[(i1 * 2U) + 1U];\n    /* Read yd (real), xd(imag) input */\n    U0 = pSrc16[i3 * 2U];\n    U1 = pSrc16[(i3 * 2U) + 1U];\n\n    /* T0 = (yb + yd), T1 = (xb + xd)) */\n    T0 = __SSAT(T0 + U0, 16U);\n    T1 = __SSAT(T1 + U1, 16U);\n\n    /*  writing the butterfly processed i0 sample */\n    /* xa' = xa + xb + xc + xd */\n    /* ya' = ya + yb + yc + yd */\n    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);\n    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);\n\n    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */\n    R0 = (R0 >> 1U) - (T0 >> 1U);\n    R1 = (R1 >> 1U) - (T1 >> 1U);\n    /* Read yb (real), xb(imag) input */\n    T0 = pSrc16[i1 * 2U];\n    T1 = pSrc16[(i1 * 2U) + 1U];\n\n    /*  writing the butterfly processed i0 + fftLen/4 sample */\n    /* xc' = (xa-xb+xc-xd) */\n    /* yc' = (ya-yb+yc-yd) */\n    pSrc16[i1 * 2U] = R0;\n    pSrc16[(i1 * 2U) + 1U] = R1;\n\n    /* Read yd (real), xd(imag) input */\n    U0 = pSrc16[i3 * 2U];\n    U1 = pSrc16[(i3 * 2U) + 1U];\n    /* T0 = (yb - yd), T1 = (xb - xd)  */\n    T0 = __SSAT(T0 - U0, 16U);\n    T1 = __SSAT(T1 - U1, 16U);\n\n    /*  writing the butterfly processed i0 + fftLen/2 sample */\n    /* xb' = (xa+yb-xc-yd) */\n    /* yb' = (ya-xb-yc+xd) */\n    pSrc16[i2 * 2U] = (S0 >> 1U) + (T1 >> 1U);\n    pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U);\n\n    /*  writing the butterfly processed i0 + 3fftLen/4 sample */\n    /* xd' = (xa-yb-xc+yd) */\n    /* yd' = (ya+xb-yc-xd) */\n    pSrc16[i3 * 2U] = (S0 >> 1U) - (T1 >> 1U);\n    pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U);\n  }\n\n  /* end of last stage process */\n\n  /* output is in 11.5(q5) format for the 1024 point */\n  /* output is in 9.7(q7) format for the 256 point   */\n  /* output is in 7.9(q9) format for the 64 point  */\n  /* output is in 5.11(q11) format for the 16 point  */\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @brief         Core function for the Q15 CIFFT butterfly process.\n  @param[in,out] pSrc16           points to the in-place buffer of Q15 data type\n  @param[in]     fftLen           length of the FFT\n  @param[in]     pCoef16          points to twiddle coefficient buffer\n  @param[in]     twidCoefModifier twiddle coefficient modifier that supports\n  different size FFTs with the same twiddle factor table.\n  @return        none\n */\n\n/*\n * Radix-4 IFFT algorithm used is :\n *\n * CIFFT uses same twiddle coefficients as CFFT function\n *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k *\n x[n+3*fftLen/4]\n *\n *\n * IFFT is implemented with following changes in equations from FFT\n *\n * Input real and imaginary data:\n * x(n) = xa + j * ya\n * x(n+N/4 ) = xb + j * yb\n * x(n+N/2 ) = xc + j * yc\n * x(n+3N 4) = xd + j * yd\n *\n *\n * Output real and imaginary data:\n * x(4r) = xa'+ j * ya'\n * x(4r+1) = xb'+ j * yb'\n * x(4r+2) = xc'+ j * yc'\n * x(4r+3) = xd'+ j * yd'\n *\n *\n * Twiddle factors for radix-4 IFFT:\n * Wn = co1 + j * (si1)\n * W2n = co2 + j * (si2)\n * W3n = co3 + j * (si3)\n\n * The real and imaginary output values for the radix-4 butterfly are\n * xa' = xa + xb + xc + xd\n * ya' = ya + yb + yc + yd\n * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)\n * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)\n * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)\n * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)\n * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)\n * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)\n *\n */\n\nvoid arm_radix4_butterfly_inverse_q15(q15_t *pSrc16, uint32_t fftLen,\n                                      const q15_t *pCoef16,\n                                      uint32_t twidCoefModifier) {\n\n#if defined(ARM_MATH_DSP)\n\n  q31_t R, S, T, U;\n  q31_t C1, C2, C3, out1, out2;\n  uint32_t n1, n2, ic, i0, j, k;\n\n  q15_t *ptr1;\n  q15_t *pSi0;\n  q15_t *pSi1;\n  q15_t *pSi2;\n  q15_t *pSi3;\n\n  q31_t xaya, xbyb, xcyc, xdyd;\n\n  /* Total process is divided into three stages */\n\n  /* process first stage, middle stages, & last stage */\n\n  /*  Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n\n  /* n2 = fftLen/4 */\n  n2 >>= 2U;\n\n  /* Index for twiddle coefficient */\n  ic = 0U;\n\n  /* Index for input read and output write */\n  j = n2;\n\n  pSi0 = pSrc16;\n  pSi1 = pSi0 + 2 * n2;\n  pSi2 = pSi1 + 2 * n2;\n  pSi3 = pSi2 + 2 * n2;\n\n  /* Input is in 1.15(q15) format */\n\n  /*  start of first stage process */\n  do {\n    /*  Butterfly implementation */\n\n    /*  Reading i0, i0+fftLen/2 inputs */\n    /* Read ya (real), xa(imag) input */\n    T = read_q15x2(pSi0);\n    T = __SHADD16(T, 0);\n    T = __SHADD16(T, 0);\n\n    /* Read yc (real), xc(imag) input */\n    S = read_q15x2(pSi2);\n    S = __SHADD16(S, 0);\n    S = __SHADD16(S, 0);\n\n    /* R = packed((ya + yc), (xa + xc) ) */\n    R = __QADD16(T, S);\n\n    /* S = packed((ya - yc), (xa - xc) ) */\n    S = __QSUB16(T, S);\n\n    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n    /* Read yb (real), xb(imag) input */\n    T = read_q15x2(pSi1);\n    T = __SHADD16(T, 0);\n    T = __SHADD16(T, 0);\n\n    /* Read yd (real), xd(imag) input */\n    U = read_q15x2(pSi3);\n    U = __SHADD16(U, 0);\n    U = __SHADD16(U, 0);\n\n    /* T = packed((yb + yd), (xb + xd) ) */\n    T = __QADD16(T, U);\n\n    /*  writing the butterfly processed i0 sample */\n    /* xa' = xa + xb + xc + xd */\n    /* ya' = ya + yb + yc + yd */\n    write_q15x2_ia(&pSi0, __SHADD16(R, T));\n\n    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */\n    R = __QSUB16(R, T);\n\n    /* co2 & si2 are read from SIMD Coefficient pointer */\n    C2 = read_q15x2((q15_t *)pCoef16 + (4U * ic));\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */\n    out1 = __SMUSD(C2, R) >> 16U;\n    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n    out2 = __SMUADX(C2, R);\n#else\n    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n    out1 = __SMUADX(C2, R) >> 16U;\n    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */\n    out2 = __SMUSD(__QSUB16(0, C2), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /*  Reading i0+fftLen/4 */\n    /* T = packed(yb, xb) */\n    T = read_q15x2(pSi1);\n    T = __SHADD16(T, 0);\n    T = __SHADD16(T, 0);\n\n    /* writing the butterfly processed i0 + fftLen/4 sample */\n    /* writing output(xc', yc') in little endian format */\n    write_q15x2_ia(&pSi1, (q31_t)((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n    /*  Butterfly calculations */\n    /* U = packed(yd, xd) */\n    U = read_q15x2(pSi3);\n    U = __SHADD16(U, 0);\n    U = __SHADD16(U, 0);\n\n    /* T = packed(yb-yd, xb-xd) */\n    T = __QSUB16(T, U);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */\n    R = __QSAX(S, T);\n    /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */\n    S = __QASX(S, T);\n#else\n    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */\n    R = __QASX(S, T);\n    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */\n    S = __QSAX(S, T);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* co1 & si1 are read from SIMD Coefficient pointer */\n    C1 = read_q15x2((q15_t *)pCoef16 + (2U * ic));\n    /*  Butterfly process for the i0+fftLen/2 sample */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */\n    out1 = __SMUSD(C1, S) >> 16U;\n    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */\n    out2 = __SMUADX(C1, S);\n#else\n    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */\n    out1 = __SMUADX(C1, S) >> 16U;\n    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */\n    out2 = __SMUSD(__QSUB16(0, C1), S);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* writing output(xb', yb') in little endian format */\n    write_q15x2_ia(&pSi2, ((out2)&0xFFFF0000) | ((out1)&0x0000FFFF));\n\n    /* co3 & si3 are read from SIMD Coefficient pointer */\n    C3 = read_q15x2((q15_t *)pCoef16 + (6U * ic));\n    /*  Butterfly process for the i0+3fftLen/4 sample */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */\n    out1 = __SMUSD(C3, R) >> 16U;\n    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */\n    out2 = __SMUADX(C3, R);\n#else\n    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */\n    out1 = __SMUADX(C3, R) >> 16U;\n    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */\n    out2 = __SMUSD(__QSUB16(0, C3), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* writing output(xd', yd') in little endian format */\n    write_q15x2_ia(&pSi3, ((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n\n    /*  Twiddle coefficients index modifier */\n    ic = ic + twidCoefModifier;\n\n  } while (--j);\n  /* data is in 4.11(q11) format */\n\n  /* end of first stage process */\n\n  /* start of middle stage process */\n\n  /*  Twiddle coefficients index modifier */\n  twidCoefModifier <<= 2U;\n\n  /*  Calculation of Middle stage */\n  for (k = fftLen / 4U; k > 4U; k >>= 2U) {\n    /*  Initializations for the middle stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ic = 0U;\n\n    for (j = 0U; j <= (n2 - 1U); j++) {\n      /*  index calculation for the coefficients */\n      C1 = read_q15x2((q15_t *)pCoef16 + (2U * ic));\n      C2 = read_q15x2((q15_t *)pCoef16 + (4U * ic));\n      C3 = read_q15x2((q15_t *)pCoef16 + (6U * ic));\n\n      /*  Twiddle coefficients index modifier */\n      ic = ic + twidCoefModifier;\n\n      pSi0 = pSrc16 + 2 * j;\n      pSi1 = pSi0 + 2 * n2;\n      pSi2 = pSi1 + 2 * n2;\n      pSi3 = pSi2 + 2 * n2;\n\n      /*  Butterfly implementation */\n      for (i0 = j; i0 < fftLen; i0 += n1) {\n        /*  Reading i0, i0+fftLen/2 inputs */\n        /* Read ya (real), xa(imag) input */\n        T = read_q15x2(pSi0);\n\n        /* Read yc (real), xc(imag) input */\n        S = read_q15x2(pSi2);\n\n        /* R = packed( (ya + yc), (xa + xc)) */\n        R = __QADD16(T, S);\n\n        /* S = packed((ya - yc), (xa - xc)) */\n        S = __QSUB16(T, S);\n\n        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n        /* Read yb (real), xb(imag) input */\n        T = read_q15x2(pSi1);\n\n        /* Read yd (real), xd(imag) input */\n        U = read_q15x2(pSi3);\n\n        /* T = packed( (yb + yd), (xb + xd)) */\n        T = __QADD16(T, U);\n\n        /*  writing the butterfly processed i0 sample */\n\n        /* xa' = xa + xb + xc + xd */\n        /* ya' = ya + yb + yc + yd */\n        out1 = __SHADD16(R, T);\n        out1 = __SHADD16(out1, 0);\n        write_q15x2(pSi0, out1);\n        pSi0 += 2 * n1;\n\n        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */\n        R = __SHSUB16(R, T);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */\n        out1 = __SMUSD(C2, R) >> 16U;\n\n        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n        out2 = __SMUADX(C2, R);\n#else\n        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n        out1 = __SMUADX(R, C2) >> 16U;\n\n        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */\n        out2 = __SMUSD(__QSUB16(0, C2), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /*  Reading i0+3fftLen/4 */\n        /* Read yb (real), xb(imag) input */\n        T = read_q15x2(pSi1);\n\n        /*  writing the butterfly processed i0 + fftLen/4 sample */\n        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */\n        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */\n        write_q15x2(pSi1, ((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n        pSi1 += 2 * n1;\n\n        /*  Butterfly calculations */\n\n        /* Read yd (real), xd(imag) input */\n        U = read_q15x2(pSi3);\n\n        /* T = packed(yb-yd, xb-xd) */\n        T = __QSUB16(T, U);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */\n        R = __SHSAX(S, T);\n\n        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */\n        S = __SHASX(S, T);\n\n        /*  Butterfly process for the i0+fftLen/2 sample */\n        out1 = __SMUSD(C1, S) >> 16U;\n        out2 = __SMUADX(C1, S);\n#else\n        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */\n        R = __SHASX(S, T);\n\n        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */\n        S = __SHSAX(S, T);\n\n        /*  Butterfly process for the i0+fftLen/2 sample */\n        out1 = __SMUADX(S, C1) >> 16U;\n        out2 = __SMUSD(__QSUB16(0, C1), S);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */\n        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */\n        write_q15x2(pSi2, ((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n        pSi2 += 2 * n1;\n\n        /*  Butterfly process for the i0+3fftLen/4 sample */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n        out1 = __SMUSD(C3, R) >> 16U;\n        out2 = __SMUADX(C3, R);\n#else\n        out1 = __SMUADX(C3, R) >> 16U;\n        out2 = __SMUSD(__QSUB16(0, C3), R);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */\n        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */\n        write_q15x2(pSi3, ((out2)&0xFFFF0000) | (out1 & 0x0000FFFF));\n        pSi3 += 2 * n1;\n      }\n    }\n    /*  Twiddle coefficients index modifier */\n    twidCoefModifier <<= 2U;\n  }\n  /* end of middle stage process */\n\n  /* data is in 10.6(q6) format for the 1024 point */\n  /* data is in 8.8(q8) format for the 256 point */\n  /* data is in 6.10(q10) format for the 64 point */\n  /* data is in 4.12(q12) format for the 16 point */\n\n  /*  Initializations for the last stage */\n  j = fftLen >> 2;\n\n  ptr1 = &pSrc16[0];\n\n  /* start of last stage process */\n\n  /*  Butterfly implementation */\n  do {\n    /* Read xa (real), ya(imag) input */\n    xaya = read_q15x2_ia((q15_t **)&ptr1);\n\n    /* Read xb (real), yb(imag) input */\n    xbyb = read_q15x2_ia((q15_t **)&ptr1);\n\n    /* Read xc (real), yc(imag) input */\n    xcyc = read_q15x2_ia((q15_t **)&ptr1);\n\n    /* Read xd (real), yd(imag) input */\n    xdyd = read_q15x2_ia((q15_t **)&ptr1);\n\n    /* R = packed((ya + yc), (xa + xc)) */\n    R = __QADD16(xaya, xcyc);\n\n    /* T = packed((yb + yd), (xb + xd)) */\n    T = __QADD16(xbyb, xdyd);\n\n    /* pointer updation for writing */\n    ptr1 = ptr1 - 8U;\n\n    /* xa' = xa + xb + xc + xd */\n    /* ya' = ya + yb + yc + yd */\n    write_q15x2_ia(&ptr1, __SHADD16(R, T));\n\n    /* T = packed((yb + yd), (xb + xd)) */\n    T = __QADD16(xbyb, xdyd);\n\n    /* xc' = (xa-xb+xc-xd) */\n    /* yc' = (ya-yb+yc-yd) */\n    write_q15x2_ia(&ptr1, __SHSUB16(R, T));\n\n    /* S = packed((ya - yc), (xa - xc)) */\n    S = __QSUB16(xaya, xcyc);\n\n    /* Read yd (real), xd(imag) input */\n    /* T = packed( (yb - yd), (xb - xd))  */\n    U = __QSUB16(xbyb, xdyd);\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* xb' = (xa+yb-xc-yd) */\n    /* yb' = (ya-xb-yc+xd) */\n    write_q15x2_ia(&ptr1, __SHASX(S, U));\n\n    /* xd' = (xa-yb-xc+yd) */\n    /* yd' = (ya+xb-yc-xd) */\n    write_q15x2_ia(&ptr1, __SHSAX(S, U));\n#else\n    /* xb' = (xa+yb-xc-yd) */\n    /* yb' = (ya-xb-yc+xd) */\n    write_q15x2_ia(&ptr1, __SHSAX(S, U));\n\n    /* xd' = (xa-yb-xc+yd) */\n    /* yd' = (ya+xb-yc-xd) */\n    write_q15x2_ia(&ptr1, __SHASX(S, U));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n  } while (--j);\n\n  /* end of last stage  process */\n\n  /* output is in 11.5(q5) format for the 1024 point */\n  /* output is in 9.7(q7) format for the 256 point   */\n  /* output is in 7.9(q9) format for the 64 point  */\n  /* output is in 5.11(q11) format for the 16 point  */\n\n#else /* arm_radix4_butterfly_inverse_q15 */\n\n  q15_t R0, R1, S0, S1, T0, T1, U0, U1;\n  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;\n  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;\n\n  /* Total process is divided into three stages */\n\n  /* process first stage, middle stages, & last stage */\n\n  /*  Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n\n  /* n2 = fftLen/4 */\n  n2 >>= 2U;\n\n  /* Index for twiddle coefficient */\n  ic = 0U;\n\n  /* Index for input read and output write */\n  i0 = 0U;\n\n  j = n2;\n\n  /* Input is in 1.15(q15) format */\n\n  /*  Start of first stage process */\n  do {\n    /*  Butterfly implementation */\n\n    /*  index calculation for the input as, */\n    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0\n     * + 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    /*  Reading i0, i0+fftLen/2 inputs */\n    /* input is down scale by 4 to avoid overflow */\n    /* Read ya (real), xa(imag) input */\n    T0 = pSrc16[i0 * 2U] >> 2U;\n    T1 = pSrc16[(i0 * 2U) + 1U] >> 2U;\n    /* input is down scale by 4 to avoid overflow */\n    /* Read yc (real), xc(imag) input */\n    S0 = pSrc16[i2 * 2U] >> 2U;\n    S1 = pSrc16[(i2 * 2U) + 1U] >> 2U;\n\n    /* R0 = (ya + yc), R1 = (xa + xc) */\n    R0 = __SSAT(T0 + S0, 16U);\n    R1 = __SSAT(T1 + S1, 16U);\n    /* S0 = (ya - yc), S1 = (xa - xc) */\n    S0 = __SSAT(T0 - S0, 16U);\n    S1 = __SSAT(T1 - S1, 16U);\n\n    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n    /* input is down scale by 4 to avoid overflow */\n    /* Read yb (real), xb(imag) input */\n    T0 = pSrc16[i1 * 2U] >> 2U;\n    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;\n    /* Read yd (real), xd(imag) input */\n    /* input is down scale by 4 to avoid overflow */\n    U0 = pSrc16[i3 * 2U] >> 2U;\n    U1 = pSrc16[(i3 * 2U) + 1U] >> 2U;\n\n    /* T0 = (yb + yd), T1 = (xb + xd) */\n    T0 = __SSAT(T0 + U0, 16U);\n    T1 = __SSAT(T1 + U1, 16U);\n\n    /*  writing the butterfly processed i0 sample */\n    /* xa' = xa + xb + xc + xd */\n    /* ya' = ya + yb + yc + yd */\n    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);\n    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);\n\n    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */\n    R0 = __SSAT(R0 - T0, 16U);\n    R1 = __SSAT(R1 - T1, 16U);\n    /* co2 & si2 are read from Coefficient pointer */\n    Co2 = pCoef16[2U * ic * 2U];\n    Si2 = pCoef16[(2U * ic * 2U) + 1U];\n    /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */\n    out1 = (q15_t)((Co2 * R0 - Si2 * R1) >> 16U);\n    /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */\n    out2 = (q15_t)((Si2 * R0 + Co2 * R1) >> 16U);\n\n    /*  Reading i0+fftLen/4 */\n    /* input is down scale by 4 to avoid overflow */\n    /* T0 = yb, T1 = xb */\n    T0 = pSrc16[i1 * 2U] >> 2U;\n    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;\n\n    /* writing the butterfly processed i0 + fftLen/4 sample */\n    /* writing output(xc', yc') in little endian format */\n    pSrc16[i1 * 2U] = out1;\n    pSrc16[(i1 * 2U) + 1U] = out2;\n\n    /*  Butterfly calculations */\n    /* input is down scale by 4 to avoid overflow */\n    /* U0 = yd, U1 = xd) */\n    U0 = pSrc16[i3 * 2U] >> 2U;\n    U1 = pSrc16[(i3 * 2U) + 1U] >> 2U;\n\n    /* T0 = yb-yd, T1 = xb-xd) */\n    T0 = __SSAT(T0 - U0, 16U);\n    T1 = __SSAT(T1 - U1, 16U);\n    /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */\n    R0 = (q15_t)__SSAT((q31_t)(S0 + T1), 16);\n    R1 = (q15_t)__SSAT((q31_t)(S1 - T0), 16);\n    /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */\n    S0 = (q15_t)__SSAT((q31_t)(S0 - T1), 16);\n    S1 = (q15_t)__SSAT((q31_t)(S1 + T0), 16);\n\n    /* co1 & si1 are read from Coefficient pointer */\n    Co1 = pCoef16[ic * 2U];\n    Si1 = pCoef16[(ic * 2U) + 1U];\n    /*  Butterfly process for the i0+fftLen/2 sample */\n    /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */\n    out1 = (q15_t)((Co1 * S0 - Si1 * S1) >> 16U);\n    /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */\n    out2 = (q15_t)((Si1 * S0 + Co1 * S1) >> 16U);\n    /* writing output(xb', yb') in little endian format */\n    pSrc16[i2 * 2U] = out1;\n    pSrc16[(i2 * 2U) + 1U] = out2;\n\n    /* Co3 & si3 are read from Coefficient pointer */\n    Co3 = pCoef16[3U * ic * 2U];\n    Si3 = pCoef16[(3U * ic * 2U) + 1U];\n    /*  Butterfly process for the i0+3fftLen/4 sample */\n    /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */\n    out1 = (q15_t)((Co3 * R0 - Si3 * R1) >> 16U);\n    /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */\n    out2 = (q15_t)((Si3 * R0 + Co3 * R1) >> 16U);\n    /* writing output(xd', yd') in little endian format */\n    pSrc16[i3 * 2U] = out1;\n    pSrc16[(i3 * 2U) + 1U] = out2;\n\n    /*  Twiddle coefficients index modifier */\n    ic = ic + twidCoefModifier;\n\n    /*  Updating input index */\n    i0 = i0 + 1U;\n\n  } while (--j);\n\n  /*  End of first stage process */\n\n  /* data is in 4.11(q11) format */\n\n  /*  Start of Middle stage process */\n\n  /*  Twiddle coefficients index modifier */\n  twidCoefModifier <<= 2U;\n\n  /*  Calculation of Middle stage */\n  for (k = fftLen / 4U; k > 4U; k >>= 2U) {\n    /*  Initializations for the middle stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ic = 0U;\n\n    for (j = 0U; j <= (n2 - 1U); j++) {\n      /*  index calculation for the coefficients */\n      Co1 = pCoef16[ic * 2U];\n      Si1 = pCoef16[(ic * 2U) + 1U];\n      Co2 = pCoef16[2U * ic * 2U];\n      Si2 = pCoef16[2U * ic * 2U + 1U];\n      Co3 = pCoef16[3U * ic * 2U];\n      Si3 = pCoef16[(3U * ic * 2U) + 1U];\n\n      /*  Twiddle coefficients index modifier */\n      ic = ic + twidCoefModifier;\n\n      /*  Butterfly implementation */\n      for (i0 = j; i0 < fftLen; i0 += n1) {\n        /*  index calculation for the input as, */\n        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2],\n         * pSrc16[i0 + 3fftLen/4] */\n        i1 = i0 + n2;\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n\n        /*  Reading i0, i0+fftLen/2 inputs */\n        /* Read ya (real), xa(imag) input */\n        T0 = pSrc16[i0 * 2U];\n        T1 = pSrc16[(i0 * 2U) + 1U];\n\n        /* Read yc (real), xc(imag) input */\n        S0 = pSrc16[i2 * 2U];\n        S1 = pSrc16[(i2 * 2U) + 1U];\n\n        /* R0 = (ya + yc), R1 = (xa + xc) */\n        R0 = __SSAT(T0 + S0, 16U);\n        R1 = __SSAT(T1 + S1, 16U);\n        /* S0 = (ya - yc), S1 = (xa - xc) */\n        S0 = __SSAT(T0 - S0, 16U);\n        S1 = __SSAT(T1 - S1, 16U);\n\n        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n        /* Read yb (real), xb(imag) input */\n        T0 = pSrc16[i1 * 2U];\n        T1 = pSrc16[(i1 * 2U) + 1U];\n\n        /* Read yd (real), xd(imag) input */\n        U0 = pSrc16[i3 * 2U];\n        U1 = pSrc16[(i3 * 2U) + 1U];\n\n        /* T0 = (yb + yd), T1 = (xb + xd) */\n        T0 = __SSAT(T0 + U0, 16U);\n        T1 = __SSAT(T1 + U1, 16U);\n\n        /*  writing the butterfly processed i0 sample */\n        /* xa' = xa + xb + xc + xd */\n        /* ya' = ya + yb + yc + yd */\n        pSrc16[i0 * 2U] = ((R0 >> 1U) + (T0 >> 1U)) >> 1U;\n        pSrc16[(i0 * 2U) + 1U] = ((R1 >> 1U) + (T1 >> 1U)) >> 1U;\n\n        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */\n        R0 = (R0 >> 1U) - (T0 >> 1U);\n        R1 = (R1 >> 1U) - (T1 >> 1U);\n\n        /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */\n        out1 = (q15_t)((Co2 * R0 - Si2 * R1) >> 16);\n        /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */\n        out2 = (q15_t)((Si2 * R0 + Co2 * R1) >> 16);\n\n        /*  Reading i0+3fftLen/4 */\n        /* Read yb (real), xb(imag) input */\n        T0 = pSrc16[i1 * 2U];\n        T1 = pSrc16[(i1 * 2U) + 1U];\n\n        /*  writing the butterfly processed i0 + fftLen/4 sample */\n        /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */\n        /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */\n        pSrc16[i1 * 2U] = out1;\n        pSrc16[(i1 * 2U) + 1U] = out2;\n\n        /*  Butterfly calculations */\n        /* Read yd (real), xd(imag) input */\n        U0 = pSrc16[i3 * 2U];\n        U1 = pSrc16[(i3 * 2U) + 1U];\n\n        /* T0 = yb-yd, T1 = xb-xd) */\n        T0 = __SSAT(T0 - U0, 16U);\n        T1 = __SSAT(T1 - U1, 16U);\n\n        /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */\n        R0 = (S0 >> 1U) + (T1 >> 1U);\n        R1 = (S1 >> 1U) - (T0 >> 1U);\n\n        /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */\n        S0 = (S0 >> 1U) - (T1 >> 1U);\n        S1 = (S1 >> 1U) + (T0 >> 1U);\n\n        /*  Butterfly process for the i0+fftLen/2 sample */\n        out1 = (q15_t)((Co1 * S0 - Si1 * S1) >> 16U);\n        out2 = (q15_t)((Si1 * S0 + Co1 * S1) >> 16U);\n        /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */\n        /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */\n        pSrc16[i2 * 2U] = out1;\n        pSrc16[(i2 * 2U) + 1U] = out2;\n\n        /*  Butterfly process for the i0+3fftLen/4 sample */\n        out1 = (q15_t)((Co3 * R0 - Si3 * R1) >> 16U);\n\n        out2 = (q15_t)((Si3 * R0 + Co3 * R1) >> 16U);\n        /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */\n        /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */\n        pSrc16[i3 * 2U] = out1;\n        pSrc16[(i3 * 2U) + 1U] = out2;\n      }\n    }\n    /*  Twiddle coefficients index modifier */\n    twidCoefModifier <<= 2U;\n  }\n  /*  End of Middle stages process */\n\n  /* data is in 10.6(q6) format for the 1024 point */\n  /* data is in 8.8(q8) format for the 256 point   */\n  /* data is in 6.10(q10) format for the 64 point  */\n  /* data is in 4.12(q12) format for the 16 point  */\n\n  /* start of last stage process */\n\n  /*  Initializations for the last stage */\n  n1 = n2;\n  n2 >>= 2U;\n\n  /*  Butterfly implementation */\n  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1) {\n    /*  index calculation for the input as, */\n    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0\n     * + 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    /*  Reading i0, i0+fftLen/2 inputs */\n    /* Read ya (real), xa(imag) input */\n    T0 = pSrc16[i0 * 2U];\n    T1 = pSrc16[(i0 * 2U) + 1U];\n    /* Read yc (real), xc(imag) input */\n    S0 = pSrc16[i2 * 2U];\n    S1 = pSrc16[(i2 * 2U) + 1U];\n\n    /* R0 = (ya + yc), R1 = (xa + xc) */\n    R0 = __SSAT(T0 + S0, 16U);\n    R1 = __SSAT(T1 + S1, 16U);\n    /* S0 = (ya - yc), S1 = (xa - xc) */\n    S0 = __SSAT(T0 - S0, 16U);\n    S1 = __SSAT(T1 - S1, 16U);\n\n    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */\n    /* Read yb (real), xb(imag) input */\n    T0 = pSrc16[i1 * 2U];\n    T1 = pSrc16[(i1 * 2U) + 1U];\n    /* Read yd (real), xd(imag) input */\n    U0 = pSrc16[i3 * 2U];\n    U1 = pSrc16[(i3 * 2U) + 1U];\n\n    /* T0 = (yb + yd), T1 = (xb + xd) */\n    T0 = __SSAT(T0 + U0, 16U);\n    T1 = __SSAT(T1 + U1, 16U);\n\n    /*  writing the butterfly processed i0 sample */\n    /* xa' = xa + xb + xc + xd */\n    /* ya' = ya + yb + yc + yd */\n    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);\n    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);\n\n    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */\n    R0 = (R0 >> 1U) - (T0 >> 1U);\n    R1 = (R1 >> 1U) - (T1 >> 1U);\n\n    /* Read yb (real), xb(imag) input */\n    T0 = pSrc16[i1 * 2U];\n    T1 = pSrc16[(i1 * 2U) + 1U];\n\n    /*  writing the butterfly processed i0 + fftLen/4 sample */\n    /* xc' = (xa-xb+xc-xd) */\n    /* yc' = (ya-yb+yc-yd) */\n    pSrc16[i1 * 2U] = R0;\n    pSrc16[(i1 * 2U) + 1U] = R1;\n\n    /* Read yd (real), xd(imag) input */\n    U0 = pSrc16[i3 * 2U];\n    U1 = pSrc16[(i3 * 2U) + 1U];\n    /* T0 = (yb - yd), T1 = (xb - xd) */\n    T0 = __SSAT(T0 - U0, 16U);\n    T1 = __SSAT(T1 - U1, 16U);\n\n    /*  writing the butterfly processed i0 + fftLen/2 sample */\n    /* xb' = (xa-yb-xc+yd) */\n    /* yb' = (ya+xb-yc-xd) */\n    pSrc16[i2 * 2U] = (S0 >> 1U) - (T1 >> 1U);\n    pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U);\n\n    /*  writing the butterfly processed i0 + 3fftLen/4 sample */\n    /* xd' = (xa+yb-xc-yd) */\n    /* yd' = (ya-xb-yc+xd) */\n    pSrc16[i3 * 2U] = (S0 >> 1U) + (T1 >> 1U);\n    pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U);\n  }\n  /* end of last stage  process */\n\n  /* output is in 11.5(q5) format for the 1024 point */\n  /* output is in 9.7(q7) format for the 256 point   */\n  /* output is in 7.9(q9) format for the 64 point  */\n  /* output is in 5.11(q11) format for the 16 point  */\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix4_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix4_q31.c\n * Description:  This file has function definition of Radix-4 FFT & IFFT\n * function and In-place bit reversal using bit reversal table\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nvoid arm_radix4_butterfly_inverse_q31(q31_t *pSrc, uint32_t fftLen,\n                                      const q31_t *pCoef,\n                                      uint32_t twidCoefModifier);\n\nvoid arm_radix4_butterfly_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef,\n                              uint32_t twidCoefModifier);\n\nvoid arm_bitreversal_q31(q31_t *pSrc, uint32_t fftLen, uint16_t bitRevFactor,\n                         const uint16_t *pBitRevTab);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup ComplexFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 CFFT/CIFFT.\n  @deprecated    Do not use this function.  It has been superseded by \\ref\n  arm_cfft_q31 and will be removed in the future.\n  @param[in]     S    points to an instance of the Q31 CFFT/CIFFT structure\n  @param[in,out] pSrc points to the complex data buffer of size\n  2*fftLen. Processing occurs in-place\n  @return        none\n\n  @par Input and output formats:\n                 Internally input is downscaled by 2 for every stage to avoid\n  saturations inside CFFT/CIFFT process. Hence the output format is different\n  for different FFT sizes. The input and output formats for different FFT sizes\n  and number of bits to upscale are mentioned in the tables below for CFFT and\n  CIFFT:\n  @par\n                 \\image html CFFTQ31.gif \"Input and Output Formats for Q31 CFFT\"\n                 \\image html CIFFTQ31.gif \"Input and Output Formats for Q31\n  CIFFT\"\n */\n\nvoid arm_cfft_radix4_q31(const arm_cfft_radix4_instance_q31 *S, q31_t *pSrc) {\n  if (S->ifftFlag == 1U) {\n    /* Complex IFFT radix-4 */\n    arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle,\n                                     S->twidCoefModifier);\n  } else {\n    /* Complex FFT radix-4 */\n    arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);\n  }\n\n  if (S->bitReverseFlag == 1U) {\n    /*  Bit Reversal */\n    arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);\n  }\n}\n\n/**\n  @} end of ComplexFFT group\n */\n\n/*\n * Radix-4 FFT algorithm used is :\n *\n * Input real and imaginary data:\n * x(n) = xa + j * ya\n * x(n+N/4 ) = xb + j * yb\n * x(n+N/2 ) = xc + j * yc\n * x(n+3N 4) = xd + j * yd\n *\n *\n * Output real and imaginary data:\n * x(4r) = xa'+ j * ya'\n * x(4r+1) = xb'+ j * yb'\n * x(4r+2) = xc'+ j * yc'\n * x(4r+3) = xd'+ j * yd'\n *\n *\n * Twiddle factors for radix-4 FFT:\n * Wn = co1 + j * (- si1)\n * W2n = co2 + j * (- si2)\n * W3n = co3 + j * (- si3)\n *\n *  Butterfly implementation:\n * xa' = xa + xb + xc + xd\n * ya' = ya + yb + yc + yd\n * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)\n * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)\n * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)\n * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)\n * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)\n * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)\n *\n */\n\n/**\n  @brief         Core function for the Q31 CFFT butterfly process.\n  @param[in,out] pSrc             points to the in-place buffer of Q31 data\n  type.\n  @param[in]     fftLen           length of the FFT.\n  @param[in]     pCoef            points to twiddle coefficient buffer.\n  @param[in]     twidCoefModifier twiddle coefficient modifier that supports\n  different size FFTs with the same twiddle factor table.\n  @return        none\n */\n\nvoid arm_radix4_butterfly_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pCoef,\n                              uint32_t twidCoefModifier) {\n  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;\n  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;\n\n  q31_t xa, xb, xc, xd;\n  q31_t ya, yb, yc, yd;\n  q31_t xa_out, xb_out, xc_out, xd_out;\n  q31_t ya_out, yb_out, yc_out, yd_out;\n\n  q31_t *ptr1;\n\n  /* Total process is divided into three stages */\n\n  /* process first stage, middle stages, & last stage */\n\n  /* start of first stage process */\n\n  /*  Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n  /* n2 = fftLen/4 */\n  n2 >>= 2U;\n  i0 = 0U;\n  ia1 = 0U;\n\n  j = n2;\n\n  /*  Calculation of first stage */\n  do {\n    /*  index calculation for the input as, */\n    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 +\n     * 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    /* input is in 1.31(q31) format and provide 4 guard bits for the input */\n\n    /*  Butterfly implementation */\n    /* xa + xc */\n    r1 = (pSrc[(2U * i0)] >> 4U) + (pSrc[(2U * i2)] >> 4U);\n    /* xa - xc */\n    r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U);\n\n    /* xb + xd */\n    t1 = (pSrc[(2U * i1)] >> 4U) + (pSrc[(2U * i3)] >> 4U);\n\n    /* ya + yc */\n    s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);\n    /* ya - yc */\n    s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U);\n\n    /* xa' = xa + xb + xc + xd */\n    pSrc[2U * i0] = (r1 + t1);\n    /* (xa + xc) - (xb + xd) */\n    r1 = r1 - t1;\n    /* yb + yd */\n    t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U);\n\n    /* ya' = ya + yb + yc + yd */\n    pSrc[(2U * i0) + 1U] = (s1 + t2);\n\n    /* (ya + yc) - (yb + yd) */\n    s1 = s1 - t2;\n\n    /* yb - yd */\n    t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);\n    /* xb - xd */\n    t2 = (pSrc[(2U * i1)] >> 4U) - (pSrc[(2U * i3)] >> 4U);\n\n    /*  index calculation for the coefficients */\n    ia2 = 2U * ia1;\n    co2 = pCoef[(ia2 * 2U)];\n    si2 = pCoef[(ia2 * 2U) + 1U];\n\n    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */\n    pSrc[2U * i1] = (((int32_t)(((q63_t)r1 * co2) >> 32)) +\n                     ((int32_t)(((q63_t)s1 * si2) >> 32)))\n                    << 1U;\n\n    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */\n    pSrc[(2U * i1) + 1U] = (((int32_t)(((q63_t)s1 * co2) >> 32)) -\n                            ((int32_t)(((q63_t)r1 * si2) >> 32)))\n                           << 1U;\n\n    /* (xa - xc) + (yb - yd) */\n    r1 = r2 + t1;\n    /* (xa - xc) - (yb - yd) */\n    r2 = r2 - t1;\n\n    /* (ya - yc) - (xb - xd) */\n    s1 = s2 - t2;\n    /* (ya - yc) + (xb - xd) */\n    s2 = s2 + t2;\n\n    co1 = pCoef[(ia1 * 2U)];\n    si1 = pCoef[(ia1 * 2U) + 1U];\n\n    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */\n    pSrc[2U * i2] = (((int32_t)(((q63_t)r1 * co1) >> 32)) +\n                     ((int32_t)(((q63_t)s1 * si1) >> 32)))\n                    << 1U;\n\n    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */\n    pSrc[(2U * i2) + 1U] = (((int32_t)(((q63_t)s1 * co1) >> 32)) -\n                            ((int32_t)(((q63_t)r1 * si1) >> 32)))\n                           << 1U;\n\n    /*  index calculation for the coefficients */\n    ia3 = 3U * ia1;\n    co3 = pCoef[(ia3 * 2U)];\n    si3 = pCoef[(ia3 * 2U) + 1U];\n\n    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */\n    pSrc[2U * i3] = (((int32_t)(((q63_t)r2 * co3) >> 32)) +\n                     ((int32_t)(((q63_t)s2 * si3) >> 32)))\n                    << 1U;\n\n    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */\n    pSrc[(2U * i3) + 1U] = (((int32_t)(((q63_t)s2 * co3) >> 32)) -\n                            ((int32_t)(((q63_t)r2 * si3) >> 32)))\n                           << 1U;\n\n    /*  Twiddle coefficients index modifier */\n    ia1 = ia1 + twidCoefModifier;\n\n    /*  Updating input index */\n    i0 = i0 + 1U;\n\n  } while (--j);\n\n  /* end of first stage process */\n\n  /* data is in 5.27(q27) format */\n\n  /* start of Middle stages process */\n\n  /* each stage in middle stages provides two down scaling of the input */\n\n  twidCoefModifier <<= 2U;\n\n  for (k = fftLen / 4U; k > 4U; k >>= 2U) {\n    /*  Initializations for the first stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ia1 = 0U;\n\n    /*  Calculation of first stage */\n    for (j = 0U; j <= (n2 - 1U); j++) {\n      /*  index calculation for the coefficients */\n      ia2 = ia1 + ia1;\n      ia3 = ia2 + ia1;\n      co1 = pCoef[(ia1 * 2U)];\n      si1 = pCoef[(ia1 * 2U) + 1U];\n      co2 = pCoef[(ia2 * 2U)];\n      si2 = pCoef[(ia2 * 2U) + 1U];\n      co3 = pCoef[(ia3 * 2U)];\n      si3 = pCoef[(ia3 * 2U) + 1U];\n      /*  Twiddle coefficients index modifier */\n      ia1 = ia1 + twidCoefModifier;\n\n      for (i0 = j; i0 < fftLen; i0 += n1) {\n        /*  index calculation for the input as, */\n        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 +\n         * 3fftLen/4] */\n        i1 = i0 + n2;\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n\n        /*  Butterfly implementation */\n        /* xa + xc */\n        r1 = pSrc[2U * i0] + pSrc[2U * i2];\n        /* xa - xc */\n        r2 = pSrc[2U * i0] - pSrc[2U * i2];\n\n        /* ya + yc */\n        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];\n        /* ya - yc */\n        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];\n\n        /* xb + xd */\n        t1 = pSrc[2U * i1] + pSrc[2U * i3];\n\n        /* xa' = xa + xb + xc + xd */\n        pSrc[2U * i0] = (r1 + t1) >> 2U;\n        /* xa + xc -(xb + xd) */\n        r1 = r1 - t1;\n\n        /* yb + yd */\n        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];\n        /* ya' = ya + yb + yc + yd */\n        pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U;\n\n        /* (ya + yc) - (yb + yd) */\n        s1 = s1 - t2;\n\n        /* (yb - yd) */\n        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];\n        /* (xb - xd) */\n        t2 = pSrc[2U * i1] - pSrc[2U * i3];\n\n        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */\n        pSrc[2U * i1] = (((int32_t)(((q63_t)r1 * co2) >> 32)) +\n                         ((int32_t)(((q63_t)s1 * si2) >> 32))) >>\n                        1U;\n\n        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */\n        pSrc[(2U * i1) + 1U] = (((int32_t)(((q63_t)s1 * co2) >> 32)) -\n                                ((int32_t)(((q63_t)r1 * si2) >> 32))) >>\n                               1U;\n\n        /* (xa - xc) + (yb - yd) */\n        r1 = r2 + t1;\n        /* (xa - xc) - (yb - yd) */\n        r2 = r2 - t1;\n\n        /* (ya - yc) -  (xb - xd) */\n        s1 = s2 - t2;\n        /* (ya - yc) +  (xb - xd) */\n        s2 = s2 + t2;\n\n        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */\n        pSrc[2U * i2] = (((int32_t)(((q63_t)r1 * co1) >> 32)) +\n                         ((int32_t)(((q63_t)s1 * si1) >> 32))) >>\n                        1U;\n\n        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */\n        pSrc[(2U * i2) + 1U] = (((int32_t)(((q63_t)s1 * co1) >> 32)) -\n                                ((int32_t)(((q63_t)r1 * si1) >> 32))) >>\n                               1U;\n\n        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */\n        pSrc[2U * i3] = (((int32_t)(((q63_t)r2 * co3) >> 32)) +\n                         ((int32_t)(((q63_t)s2 * si3) >> 32))) >>\n                        1U;\n\n        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */\n        pSrc[(2U * i3) + 1U] = (((int32_t)(((q63_t)s2 * co3) >> 32)) -\n                                ((int32_t)(((q63_t)r2 * si3) >> 32))) >>\n                               1U;\n      }\n    }\n    twidCoefModifier <<= 2U;\n  }\n\n  /* End of Middle stages process */\n\n  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle\n   * stages */\n  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages\n   */\n  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */\n  /* data is in 5.27(q27) format for the 16 point as there are no middle stages\n   */\n\n  /* start of Last stage process */\n  /*  Initializations for the last stage */\n  j = fftLen >> 2;\n  ptr1 = &pSrc[0];\n\n  /*  Calculations of last stage */\n  do {\n    /* Read xa (real), ya(imag) input */\n    xa = *ptr1++;\n    ya = *ptr1++;\n\n    /* Read xb (real), yb(imag) input */\n    xb = *ptr1++;\n    yb = *ptr1++;\n\n    /* Read xc (real), yc(imag) input */\n    xc = *ptr1++;\n    yc = *ptr1++;\n\n    /* Read xc (real), yc(imag) input */\n    xd = *ptr1++;\n    yd = *ptr1++;\n\n    /* xa' = xa + xb + xc + xd */\n    xa_out = xa + xb + xc + xd;\n\n    /* ya' = ya + yb + yc + yd */\n    ya_out = ya + yb + yc + yd;\n\n    /* pointer updation for writing */\n    ptr1 = ptr1 - 8U;\n\n    /* writing xa' and ya' */\n    *ptr1++ = xa_out;\n    *ptr1++ = ya_out;\n\n    xc_out = (xa - xb + xc - xd);\n    yc_out = (ya - yb + yc - yd);\n\n    /* writing xc' and yc' */\n    *ptr1++ = xc_out;\n    *ptr1++ = yc_out;\n\n    xb_out = (xa + yb - xc - yd);\n    yb_out = (ya - xb - yc + xd);\n\n    /* writing xb' and yb' */\n    *ptr1++ = xb_out;\n    *ptr1++ = yb_out;\n\n    xd_out = (xa - yb - xc + yd);\n    yd_out = (ya + xb - yc - xd);\n\n    /* writing xd' and yd' */\n    *ptr1++ = xd_out;\n    *ptr1++ = yd_out;\n\n  } while (--j);\n\n  /* output is in 11.21(q21) format for the 1024 point */\n  /* output is in 9.23(q23) format for the 256 point */\n  /* output is in 7.25(q25) format for the 64 point */\n  /* output is in 5.27(q27) format for the 16 point */\n\n  /* End of last stage process */\n}\n\n/**\n  @brief         Core function for the Q31 CIFFT butterfly process.\n  @param[in,out] pSrc             points to the in-place buffer of Q31 data\n  type.\n  @param[in]     fftLen           length of the FFT.\n  @param[in]     pCoef            points to twiddle coefficient buffer.\n  @param[in]     twidCoefModifier twiddle coefficient modifier that supports\n  different size FFTs with the same twiddle factor table.\n  @return        none\n */\n\n/*\n * Radix-4 IFFT algorithm used is :\n *\n * CIFFT uses same twiddle coefficients as CFFT Function\n *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k *\n x[n+3*fftLen/4]\n *\n *\n * IFFT is implemented with following changes in equations from FFT\n *\n * Input real and imaginary data:\n * x(n) = xa + j * ya\n * x(n+N/4 ) = xb + j * yb\n * x(n+N/2 ) = xc + j * yc\n * x(n+3N 4) = xd + j * yd\n *\n *\n * Output real and imaginary data:\n * x(4r) = xa'+ j * ya'\n * x(4r+1) = xb'+ j * yb'\n * x(4r+2) = xc'+ j * yc'\n * x(4r+3) = xd'+ j * yd'\n *\n *\n * Twiddle factors for radix-4 IFFT:\n * Wn = co1 + j * (si1)\n * W2n = co2 + j * (si2)\n * W3n = co3 + j * (si3)\n\n * The real and imaginary output values for the radix-4 butterfly are\n * xa' = xa + xb + xc + xd\n * ya' = ya + yb + yc + yd\n * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)\n * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)\n * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)\n * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)\n * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)\n * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)\n *\n */\n\nvoid arm_radix4_butterfly_inverse_q31(q31_t *pSrc, uint32_t fftLen,\n                                      const q31_t *pCoef,\n                                      uint32_t twidCoefModifier) {\n  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;\n  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;\n  q31_t xa, xb, xc, xd;\n  q31_t ya, yb, yc, yd;\n  q31_t xa_out, xb_out, xc_out, xd_out;\n  q31_t ya_out, yb_out, yc_out, yd_out;\n\n  q31_t *ptr1;\n\n  /* input is be 1.31(q31) format for all FFT sizes */\n  /* Total process is divided into three stages */\n  /* process first stage, middle stages, & last stage */\n\n  /* Start of first stage process */\n\n  /* Initializations for the first stage */\n  n2 = fftLen;\n  n1 = n2;\n  /* n2 = fftLen/4 */\n  n2 >>= 2U;\n  i0 = 0U;\n  ia1 = 0U;\n\n  j = n2;\n\n  do {\n    /* input is in 1.31(q31) format and provide 4 guard bits for the input */\n\n    /*  index calculation for the input as, */\n    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 +\n     * 3fftLen/4] */\n    i1 = i0 + n2;\n    i2 = i1 + n2;\n    i3 = i2 + n2;\n\n    /*  Butterfly implementation */\n    /* xa + xc */\n    r1 = (pSrc[2U * i0] >> 4U) + (pSrc[2U * i2] >> 4U);\n    /* xa - xc */\n    r2 = (pSrc[2U * i0] >> 4U) - (pSrc[2U * i2] >> 4U);\n\n    /* xb + xd */\n    t1 = (pSrc[2U * i1] >> 4U) + (pSrc[2U * i3] >> 4U);\n\n    /* ya + yc */\n    s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);\n    /* ya - yc */\n    s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U);\n\n    /* xa' = xa + xb + xc + xd */\n    pSrc[2U * i0] = (r1 + t1);\n    /* (xa + xc) - (xb + xd) */\n    r1 = r1 - t1;\n    /* yb + yd */\n    t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U);\n    /* ya' = ya + yb + yc + yd */\n    pSrc[(2U * i0) + 1U] = (s1 + t2);\n\n    /* (ya + yc) - (yb + yd) */\n    s1 = s1 - t2;\n\n    /* yb - yd */\n    t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);\n    /* xb - xd */\n    t2 = (pSrc[2U * i1] >> 4U) - (pSrc[2U * i3] >> 4U);\n\n    /*  index calculation for the coefficients */\n    ia2 = 2U * ia1;\n    co2 = pCoef[ia2 * 2U];\n    si2 = pCoef[(ia2 * 2U) + 1U];\n\n    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n    pSrc[2U * i1] = (((int32_t)(((q63_t)r1 * co2) >> 32)) -\n                     ((int32_t)(((q63_t)s1 * si2) >> 32)))\n                    << 1U;\n\n    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n    pSrc[2U * i1 + 1U] = (((int32_t)(((q63_t)s1 * co2) >> 32)) +\n                          ((int32_t)(((q63_t)r1 * si2) >> 32)))\n                         << 1U;\n\n    /* (xa - xc) - (yb - yd) */\n    r1 = r2 - t1;\n    /* (xa - xc) + (yb - yd) */\n    r2 = r2 + t1;\n\n    /* (ya - yc) + (xb - xd) */\n    s1 = s2 + t2;\n    /* (ya - yc) - (xb - xd) */\n    s2 = s2 - t2;\n\n    co1 = pCoef[ia1 * 2U];\n    si1 = pCoef[(ia1 * 2U) + 1U];\n\n    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n    pSrc[2U * i2] = (((int32_t)(((q63_t)r1 * co1) >> 32)) -\n                     ((int32_t)(((q63_t)s1 * si1) >> 32)))\n                    << 1U;\n\n    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n    pSrc[(2U * i2) + 1U] = (((int32_t)(((q63_t)s1 * co1) >> 32)) +\n                            ((int32_t)(((q63_t)r1 * si1) >> 32)))\n                           << 1U;\n\n    /*  index calculation for the coefficients */\n    ia3 = 3U * ia1;\n    co3 = pCoef[ia3 * 2U];\n    si3 = pCoef[(ia3 * 2U) + 1U];\n\n    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n    pSrc[2U * i3] = (((int32_t)(((q63_t)r2 * co3) >> 32)) -\n                     ((int32_t)(((q63_t)s2 * si3) >> 32)))\n                    << 1U;\n\n    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n    pSrc[(2U * i3) + 1U] = (((int32_t)(((q63_t)s2 * co3) >> 32)) +\n                            ((int32_t)(((q63_t)r2 * si3) >> 32)))\n                           << 1U;\n\n    /*  Twiddle coefficients index modifier */\n    ia1 = ia1 + twidCoefModifier;\n\n    /*  Updating input index */\n    i0 = i0 + 1U;\n\n  } while (--j);\n\n  /* data is in 5.27(q27) format */\n  /* each stage provides two down scaling of the input */\n\n  /* Start of Middle stages process */\n\n  twidCoefModifier <<= 2U;\n\n  /*  Calculation of second stage to excluding last stage */\n  for (k = fftLen / 4U; k > 4U; k >>= 2U) {\n    /*  Initializations for the first stage */\n    n1 = n2;\n    n2 >>= 2U;\n    ia1 = 0U;\n\n    for (j = 0; j <= (n2 - 1U); j++) {\n      /*  index calculation for the coefficients */\n      ia2 = ia1 + ia1;\n      ia3 = ia2 + ia1;\n      co1 = pCoef[(ia1 * 2U)];\n      si1 = pCoef[(ia1 * 2U) + 1U];\n      co2 = pCoef[(ia2 * 2U)];\n      si2 = pCoef[(ia2 * 2U) + 1U];\n      co3 = pCoef[(ia3 * 2U)];\n      si3 = pCoef[(ia3 * 2U) + 1U];\n      /*  Twiddle coefficients index modifier */\n      ia1 = ia1 + twidCoefModifier;\n\n      for (i0 = j; i0 < fftLen; i0 += n1) {\n        /*  index calculation for the input as, */\n        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 +\n         * 3fftLen/4] */\n        i1 = i0 + n2;\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n\n        /*  Butterfly implementation */\n        /* xa + xc */\n        r1 = pSrc[2U * i0] + pSrc[2U * i2];\n        /* xa - xc */\n        r2 = pSrc[2U * i0] - pSrc[2U * i2];\n\n        /* ya + yc */\n        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];\n        /* ya - yc */\n        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];\n\n        /* xb + xd */\n        t1 = pSrc[2U * i1] + pSrc[2U * i3];\n\n        /* xa' = xa + xb + xc + xd */\n        pSrc[2U * i0] = (r1 + t1) >> 2U;\n        /* xa + xc -(xb + xd) */\n        r1 = r1 - t1;\n        /* yb + yd */\n        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];\n        /* ya' = ya + yb + yc + yd */\n        pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U;\n\n        /* (ya + yc) - (yb + yd) */\n        s1 = s1 - t2;\n\n        /* (yb - yd) */\n        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];\n        /* (xb - xd) */\n        t2 = pSrc[2U * i1] - pSrc[2U * i3];\n\n        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */\n        pSrc[2U * i1] = (((int32_t)(((q63_t)r1 * co2) >> 32U)) -\n                         ((int32_t)(((q63_t)s1 * si2) >> 32U))) >>\n                        1U;\n\n        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */\n        pSrc[(2U * i1) + 1U] = (((int32_t)(((q63_t)s1 * co2) >> 32U)) +\n                                ((int32_t)(((q63_t)r1 * si2) >> 32U))) >>\n                               1U;\n\n        /* (xa - xc) - (yb - yd) */\n        r1 = r2 - t1;\n        /* (xa - xc) + (yb - yd) */\n        r2 = r2 + t1;\n\n        /* (ya - yc) +  (xb - xd) */\n        s1 = s2 + t2;\n        /* (ya - yc) -  (xb - xd) */\n        s2 = s2 - t2;\n\n        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */\n        pSrc[2U * i2] = (((int32_t)(((q63_t)r1 * co1) >> 32)) -\n                         ((int32_t)(((q63_t)s1 * si1) >> 32))) >>\n                        1U;\n\n        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */\n        pSrc[(2U * i2) + 1U] = (((int32_t)(((q63_t)s1 * co1) >> 32)) +\n                                ((int32_t)(((q63_t)r1 * si1) >> 32))) >>\n                               1U;\n\n        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */\n        pSrc[(2U * i3)] = (((int32_t)(((q63_t)r2 * co3) >> 32)) -\n                           ((int32_t)(((q63_t)s2 * si3) >> 32))) >>\n                          1U;\n\n        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */\n        pSrc[(2U * i3) + 1U] = (((int32_t)(((q63_t)s2 * co3) >> 32)) +\n                                ((int32_t)(((q63_t)r2 * si3) >> 32))) >>\n                               1U;\n      }\n    }\n    twidCoefModifier <<= 2U;\n  }\n\n  /* End of Middle stages process */\n\n  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle\n   * stages */\n  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages\n   */\n  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */\n  /* data is in 5.27(q27) format for the 16 point as there are no middle stages\n   */\n\n  /* Start of last stage process */\n\n  /*  Initializations for the last stage */\n  j = fftLen >> 2;\n  ptr1 = &pSrc[0];\n\n  /*  Calculations of last stage */\n  do {\n    /* Read xa (real), ya(imag) input */\n    xa = *ptr1++;\n    ya = *ptr1++;\n\n    /* Read xb (real), yb(imag) input */\n    xb = *ptr1++;\n    yb = *ptr1++;\n\n    /* Read xc (real), yc(imag) input */\n    xc = *ptr1++;\n    yc = *ptr1++;\n\n    /* Read xc (real), yc(imag) input */\n    xd = *ptr1++;\n    yd = *ptr1++;\n\n    /* xa' = xa + xb + xc + xd */\n    xa_out = xa + xb + xc + xd;\n\n    /* ya' = ya + yb + yc + yd */\n    ya_out = ya + yb + yc + yd;\n\n    /* pointer updation for writing */\n    ptr1 = ptr1 - 8U;\n\n    /* writing xa' and ya' */\n    *ptr1++ = xa_out;\n    *ptr1++ = ya_out;\n\n    xc_out = (xa - xb + xc - xd);\n    yc_out = (ya - yb + yc - yd);\n\n    /* writing xc' and yc' */\n    *ptr1++ = xc_out;\n    *ptr1++ = yc_out;\n\n    xb_out = (xa - yb - xc + yd);\n    yb_out = (ya + xb - yc - xd);\n\n    /* writing xb' and yb' */\n    *ptr1++ = xb_out;\n    *ptr1++ = yb_out;\n\n    xd_out = (xa + yb - xc - yd);\n    yd_out = (ya - xb - yc + xd);\n\n    /* writing xd' and yd' */\n    *ptr1++ = xd_out;\n    *ptr1++ = yd_out;\n\n  } while (--j);\n\n  /* output is in 11.21(q21) format for the 1024 point */\n  /* output is in 9.23(q23) format for the 256 point */\n  /* output is in 7.25(q25) format for the 64 point */\n  /* output is in 5.27(q27) format for the 16 point */\n\n  /* End of last stage process */\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_cfft_radix8_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_radix8_f32.c\n * Description:  Radix-8 Decimation in Frequency CFFT & CIFFT Floating point\n * processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/* ----------------------------------------------------------------------\n * Internal helper function used by the FFTs\n * -------------------------------------------------------------------- */\n\n/**\n  brief         Core function for the floating-point CFFT butterfly process.\n  param[in,out] pSrc             points to the in-place buffer of floating-point\n  data type. param[in]     fftLen           length of the FFT. param[in] pCoef\n  points to the twiddle coefficient buffer. param[in]     twidCoefModifier\n  twiddle coefficient modifier that supports different size FFTs with the same\n  twiddle factor table. return        none\n*/\n\nvoid arm_radix8_butterfly_f32(float32_t *pSrc, uint16_t fftLen,\n                              const float32_t *pCoef,\n                              uint16_t twidCoefModifier) {\n  uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;\n  uint32_t i1, i2, i3, i4, i5, i6, i7, i8;\n  uint32_t id;\n  uint32_t n1, n2, j;\n\n  float32_t r1, r2, r3, r4, r5, r6, r7, r8;\n  float32_t t1, t2;\n  float32_t s1, s2, s3, s4, s5, s6, s7, s8;\n  float32_t p1, p2, p3, p4;\n  float32_t co2, co3, co4, co5, co6, co7, co8;\n  float32_t si2, si3, si4, si5, si6, si7, si8;\n  const float32_t C81 = 0.70710678118f;\n\n  n2 = fftLen;\n\n  do {\n    n1 = n2;\n    n2 = n2 >> 3;\n    i1 = 0;\n\n    do {\n      i2 = i1 + n2;\n      i3 = i2 + n2;\n      i4 = i3 + n2;\n      i5 = i4 + n2;\n      i6 = i5 + n2;\n      i7 = i6 + n2;\n      i8 = i7 + n2;\n      r1 = pSrc[2 * i1] + pSrc[2 * i5];\n      r5 = pSrc[2 * i1] - pSrc[2 * i5];\n      r2 = pSrc[2 * i2] + pSrc[2 * i6];\n      r6 = pSrc[2 * i2] - pSrc[2 * i6];\n      r3 = pSrc[2 * i3] + pSrc[2 * i7];\n      r7 = pSrc[2 * i3] - pSrc[2 * i7];\n      r4 = pSrc[2 * i4] + pSrc[2 * i8];\n      r8 = pSrc[2 * i4] - pSrc[2 * i8];\n      t1 = r1 - r3;\n      r1 = r1 + r3;\n      r3 = r2 - r4;\n      r2 = r2 + r4;\n      pSrc[2 * i1] = r1 + r2;\n      pSrc[2 * i5] = r1 - r2;\n      r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];\n      s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];\n      r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];\n      s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];\n      s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];\n      s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];\n      r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];\n      s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];\n      t2 = r1 - s3;\n      r1 = r1 + s3;\n      s3 = r2 - r4;\n      r2 = r2 + r4;\n      pSrc[2 * i1 + 1] = r1 + r2;\n      pSrc[2 * i5 + 1] = r1 - r2;\n      pSrc[2 * i3] = t1 + s3;\n      pSrc[2 * i7] = t1 - s3;\n      pSrc[2 * i3 + 1] = t2 - r3;\n      pSrc[2 * i7 + 1] = t2 + r3;\n      r1 = (r6 - r8) * C81;\n      r6 = (r6 + r8) * C81;\n      r2 = (s6 - s8) * C81;\n      s6 = (s6 + s8) * C81;\n      t1 = r5 - r1;\n      r5 = r5 + r1;\n      r8 = r7 - r6;\n      r7 = r7 + r6;\n      t2 = s5 - r2;\n      s5 = s5 + r2;\n      s8 = s7 - s6;\n      s7 = s7 + s6;\n      pSrc[2 * i2] = r5 + s7;\n      pSrc[2 * i8] = r5 - s7;\n      pSrc[2 * i6] = t1 + s8;\n      pSrc[2 * i4] = t1 - s8;\n      pSrc[2 * i2 + 1] = s5 - r7;\n      pSrc[2 * i8 + 1] = s5 + r7;\n      pSrc[2 * i6 + 1] = t2 - r8;\n      pSrc[2 * i4 + 1] = t2 + r8;\n\n      i1 += n1;\n    } while (i1 < fftLen);\n\n    if (n2 < 8)\n      break;\n\n    ia1 = 0;\n    j = 1;\n\n    do {\n      /*  index calculation for the coefficients */\n      id = ia1 + twidCoefModifier;\n      ia1 = id;\n      ia2 = ia1 + id;\n      ia3 = ia2 + id;\n      ia4 = ia3 + id;\n      ia5 = ia4 + id;\n      ia6 = ia5 + id;\n      ia7 = ia6 + id;\n\n      co2 = pCoef[2 * ia1];\n      co3 = pCoef[2 * ia2];\n      co4 = pCoef[2 * ia3];\n      co5 = pCoef[2 * ia4];\n      co6 = pCoef[2 * ia5];\n      co7 = pCoef[2 * ia6];\n      co8 = pCoef[2 * ia7];\n      si2 = pCoef[2 * ia1 + 1];\n      si3 = pCoef[2 * ia2 + 1];\n      si4 = pCoef[2 * ia3 + 1];\n      si5 = pCoef[2 * ia4 + 1];\n      si6 = pCoef[2 * ia5 + 1];\n      si7 = pCoef[2 * ia6 + 1];\n      si8 = pCoef[2 * ia7 + 1];\n\n      i1 = j;\n\n      do {\n        /*  index calculation for the input */\n        i2 = i1 + n2;\n        i3 = i2 + n2;\n        i4 = i3 + n2;\n        i5 = i4 + n2;\n        i6 = i5 + n2;\n        i7 = i6 + n2;\n        i8 = i7 + n2;\n        r1 = pSrc[2 * i1] + pSrc[2 * i5];\n        r5 = pSrc[2 * i1] - pSrc[2 * i5];\n        r2 = pSrc[2 * i2] + pSrc[2 * i6];\n        r6 = pSrc[2 * i2] - pSrc[2 * i6];\n        r3 = pSrc[2 * i3] + pSrc[2 * i7];\n        r7 = pSrc[2 * i3] - pSrc[2 * i7];\n        r4 = pSrc[2 * i4] + pSrc[2 * i8];\n        r8 = pSrc[2 * i4] - pSrc[2 * i8];\n        t1 = r1 - r3;\n        r1 = r1 + r3;\n        r3 = r2 - r4;\n        r2 = r2 + r4;\n        pSrc[2 * i1] = r1 + r2;\n        r2 = r1 - r2;\n        s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];\n        s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];\n        s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];\n        s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];\n        s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];\n        s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];\n        s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];\n        s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];\n        t2 = s1 - s3;\n        s1 = s1 + s3;\n        s3 = s2 - s4;\n        s2 = s2 + s4;\n        r1 = t1 + s3;\n        t1 = t1 - s3;\n        pSrc[2 * i1 + 1] = s1 + s2;\n        s2 = s1 - s2;\n        s1 = t2 - r3;\n        t2 = t2 + r3;\n        p1 = co5 * r2;\n        p2 = si5 * s2;\n        p3 = co5 * s2;\n        p4 = si5 * r2;\n        pSrc[2 * i5] = p1 + p2;\n        pSrc[2 * i5 + 1] = p3 - p4;\n        p1 = co3 * r1;\n        p2 = si3 * s1;\n        p3 = co3 * s1;\n        p4 = si3 * r1;\n        pSrc[2 * i3] = p1 + p2;\n        pSrc[2 * i3 + 1] = p3 - p4;\n        p1 = co7 * t1;\n        p2 = si7 * t2;\n        p3 = co7 * t2;\n        p4 = si7 * t1;\n        pSrc[2 * i7] = p1 + p2;\n        pSrc[2 * i7 + 1] = p3 - p4;\n        r1 = (r6 - r8) * C81;\n        r6 = (r6 + r8) * C81;\n        s1 = (s6 - s8) * C81;\n        s6 = (s6 + s8) * C81;\n        t1 = r5 - r1;\n        r5 = r5 + r1;\n        r8 = r7 - r6;\n        r7 = r7 + r6;\n        t2 = s5 - s1;\n        s5 = s5 + s1;\n        s8 = s7 - s6;\n        s7 = s7 + s6;\n        r1 = r5 + s7;\n        r5 = r5 - s7;\n        r6 = t1 + s8;\n        t1 = t1 - s8;\n        s1 = s5 - r7;\n        s5 = s5 + r7;\n        s6 = t2 - r8;\n        t2 = t2 + r8;\n        p1 = co2 * r1;\n        p2 = si2 * s1;\n        p3 = co2 * s1;\n        p4 = si2 * r1;\n        pSrc[2 * i2] = p1 + p2;\n        pSrc[2 * i2 + 1] = p3 - p4;\n        p1 = co8 * r5;\n        p2 = si8 * s5;\n        p3 = co8 * s5;\n        p4 = si8 * r5;\n        pSrc[2 * i8] = p1 + p2;\n        pSrc[2 * i8 + 1] = p3 - p4;\n        p1 = co6 * r6;\n        p2 = si6 * s6;\n        p3 = co6 * s6;\n        p4 = si6 * r6;\n        pSrc[2 * i6] = p1 + p2;\n        pSrc[2 * i6 + 1] = p3 - p4;\n        p1 = co4 * t1;\n        p2 = si4 * t2;\n        p3 = co4 * t2;\n        p4 = si4 * t1;\n        pSrc[2 * i4] = p1 + p2;\n        pSrc[2 * i4 + 1] = p3 - p4;\n\n        i1 += n1;\n      } while (i1 < fftLen);\n\n      j++;\n    } while (j < n2);\n\n    twidCoefModifier <<= 3;\n  } while (n2 > 7);\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_dct4_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dct4_f32.c\n * Description:  Processing function of DCT4 & IDCT4 F32\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @defgroup DCT4_IDCT4 DCT Type IV Functions\n\n  Representation of signals by minimum number of values is important for storage\n  and transmission. The possibility of large discontinuity between the beginning\n  and end of a period of a signal in DFT can be avoided by extending the signal\n  so that it is even-symmetric. Discrete Cosine Transform (DCT) is constructed\n  such that its energy is heavily concentrated in the lower part of the spectrum\n  and is very widely used in signal and image coding applications. The family of\n  DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of\n  homogeneous boundary conditions. DCT has an excellent energy-packing\n  capability, hence has many applications and in data compression in particular.\n\n  DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended\n  real signal. Reordering of the input data makes the computation of DCT just a\n  problem of computing the DFT of a real signal with a few additional\n  operations. This approach provides regular, simple, and very efficient DCT\n  algorithms for practical hardware and software implementations.\n\n  DCT type-II can be implemented using Fast fourier transform (FFT) internally,\n  as the transform is applied on real values, Real FFT can be used. DCT4 is\n  implemented using DCT2 as their implementations are similar except with some\n  added pre-processing and post-processing. DCT2 implementation can be described\n  in the following steps:\n  - Re-ordering input\n  - Calculating Real FFT\n  - Multiplication of weights and Real FFT output and getting real part from the\n  product.\n\n  This process is explained by the block diagram below:\n  \\image html DCT4.gif \"Discrete Cosine Transform - type-IV\"\n\n  @par           Algorithm\n                   The N-point type-IV DCT is defined as a real, linear\n  transformation by the formula: \\image html DCT4Equation.gif where k = 0,\n  1, 2, ..., N-1\n  @par\n                   Its inverse is defined as follows:\n                   \\image html IDCT4Equation.gif\n                   where n = 0, 1, 2, ..., N-1\n  @par\n                   The DCT4 matrices become involutory (i.e. they are\n  self-inverse) by multiplying with an overall scale factor of sqrt(2/N). The\n  symmetry of the transform matrix indicates that the fast algorithms for the\n  forward and inverse transform computation are identical. Note that the\n  implementation of Inverse DCT4 and DCT4 is same, hence same process function\n  can be used for both.\n\n  @par           Lengths supported by the transform:\n                   As DCT4 internally uses Real FFT, it supports all the lengths\n  128, 512, 2048 and 8192. The library provides separate functions for Q15, Q31,\n  and floating-point data types.\n\n  @par           Instance Structure\n                   The instances for Real FFT and FFT, cosine values table and\n  twiddle factor table are stored in an instance data structure. A separate\n  instance structure must be defined for each transform. There are separate\n  instance structure declarations for each of the 3 supported data types.\n\n  @par           Initialization Functions\n                   There is also an associated initialization function for each\n  data type. The initialization function performs the following operations:\n                   - Sets the values of the internal structure fields.\n                   - Initializes Real FFT as its process function is used\n  internally in DCT4, by calling \\ref arm_rfft_init_f32().\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure must be\n  manually initialized. Manually initialize the instance structure as follows:\n  
\n      arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor,\n  pRfft, pCfft}; arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle,\n  pCosFactor, pRfft, pCfft}; arm_dct4_instance_q15 S = {N, Nby2, normalize,\n  pTwiddle, pCosFactor, pRfft, pCfft};\n  
\n                   where \\c N is the length of the DCT4; \\c Nby2 is half of the\n  length of the DCT4; \\c normalize is normalizing factor used and is equal to\n  sqrt(2/N); \\c pTwiddle points to the twiddle factor table; \\c\n  pCosFactor points to the cosFactor table; \\c pRfft points to the real FFT\n  instance; \\c pCfft points to the complex FFT instance; The CFFT and RFFT\n  structures also needs to be initialized, refer to arm_cfft_radix4_f32() and\n  arm_rfft_f32() respectively for details regarding static initialization.\n\n  @par           Fixed-Point Behavior\n                   Care must be taken when using the fixed-point versions of the\n  DCT4 transform functions. In particular, the overflow and saturation behavior\n  of the accumulator used in each function must be considered. Refer to the\n  function specific documentation below for usage guidelines.\n */\n\n/**\n @addtogroup DCT4_IDCT4\n @{\n*/\n\n/**\n  @brief         Processing function for the floating-point DCT4/IDCT4.\n  @param[in]     S             points to an instance of the floating-point\n  DCT4/IDCT4 structure\n  @param[in]     pState        points to state buffer\n  @param[in,out] pInlineBuffer points to the in-place input and output buffer\n  @return        none\n */\n\nvoid arm_dct4_f32(const arm_dct4_instance_f32 *S, float32_t *pState,\n                  float32_t *pInlineBuffer) {\n  const float32_t *weights = S->pTwiddle; /* Pointer to the Weights table */\n  const float32_t *cosFact =\n      S->pCosFactor; /* Pointer to the cos factors table */\n  float32_t *pS1, *pS2,\n      *pbuff;   /* Temporary pointers for input buffer and pState buffer */\n  float32_t in; /* Temporary variable */\n  uint32_t i;   /* Loop counter */\n\n  /* DCT4 computation involves DCT2 (which is calculated using RFFT)\n   * along with some pre-processing and post-processing.\n   * Computational procedure is explained as follows:\n   * (a) Pre-processing involves multiplying input with cos factor,\n   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))\n   *              where,\n   *                 r(n) -- output of preprocessing\n   *                 u(n) -- input to preprocessing(actual Source buffer)\n   * (b) Calculation of DCT2 using FFT is divided into three steps:\n   *                  Step1: Re-ordering of even and odd elements of input.\n   *                  Step2: Calculating FFT of the re-ordered input.\n   *                  Step3: Taking the real part of the product of FFT output\n   * and weights. (c) Post-processing - DCT4 can be obtained from DCT2 output\n   * using the following equation: Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *                        where,\n   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output\n   * (d) Multiplying the output with the normalizing factor sqrt(2/N).\n   */\n\n  /*-------- Pre-processing ------------*/\n  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) *\n   * cos(pi*(2*n+1)/(4*n)) */\n  arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);\n  arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);\n\n  /* ----------------------------------------------------------------\n   * Step1: Re-ordering of even and odd elements as\n   *             pState[i] =  pInlineBuffer[2*i] and\n   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2\n   ---------------------------------------------------------------------*/\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* pS2 initialized to pState+N-1, so that it points to the end of the state\n   * buffer */\n  pS2 = pState + (S->N - 1U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */\n  i = S->Nby2 >> 2U;\n\n  /* First part of the processing with loop unrolling.  Compute 4 outputs at a\n   *time.\n   ** a second loop below computes the remaining 1 to 3 samples. */\n  do {\n    /* Re-ordering of even and odd elements */\n    /* pState[i] =  pInlineBuffer[2*i] */\n    *pS1++ = *pbuff++;\n    /* pState[N-i-1] = pInlineBuffer[2*i+1] */\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Initializing the loop counter to N/4 instead of N for loop unrolling */\n  i = S->N >> 2U;\n\n  /* Processing with loop unrolling 4 times as N is always multiple of 4.\n   * Compute 4 outputs at a time */\n  do {\n    /* Writing the re-ordered output back to inplace input buffer */\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* ---------------------------------------------------------\n   *     Step2: Calculate RFFT for N-point input\n   * ---------------------------------------------------------- */\n  /* pInlineBuffer is real input of length N , pState is the complex output of\n   * length 2N */\n  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);\n\n  /*----------------------------------------------------------------------\n   *  Step3: Multiply the FFT output with the weights.\n   *----------------------------------------------------------------------*/\n  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);\n\n  /* ----------- Post-processing ---------- */\n  /* DCT-IV can be obtained from DCT-II by the equation,\n   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *       Hence, Y4(0) = Y2(0)/2  */\n  /* Getting only real part from the output and Converting to DCT-IV */\n\n  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */\n  i = (S->N - 1U) >> 2U;\n\n  /* pbuff initialized to input buffer. */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */\n  in = *pS1++ * (float32_t)0.5;\n  /* input buffer acts as inplace, so output values are stored in the input\n   * itself. */\n  *pbuff++ = in;\n\n  /* pState pointer is incremented twice as the real values are located\n   * alternatively in the array */\n  pS1++;\n\n  /* First part of the processing with loop unrolling.  Compute 4 outputs at a\n   *time.\n   ** a second loop below computes the remaining 1 to 3 samples. */\n  do {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    /* points to the next real value */\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* If the blockSize is not a multiple of 4, compute any remaining output\n   *samples here.\n   ** No loop unrolling is used. */\n  i = (S->N - 1U) % 0x4U;\n\n  while (i > 0U) {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n\n    /* points to the next real value */\n    pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  }\n\n  /*------------ Normalizing the output by multiplying with the normalizing\n   * factor ----------*/\n\n  /* Initializing the loop counter to N/4 instead of N for loop unrolling */\n  i = S->N >> 2U;\n\n  /* pbuff initialized to the pInlineBuffer(now contains the output values) */\n  pbuff = pInlineBuffer;\n\n  /* Processing with loop unrolling 4 times as N is always multiple of 4.\n   * Compute 4 outputs at a time */\n  do {\n    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */\n    in = *pbuff;\n    *pbuff++ = in * S->normalize;\n\n    in = *pbuff;\n    *pbuff++ = in * S->normalize;\n\n    in = *pbuff;\n    *pbuff++ = in * S->normalize;\n\n    in = *pbuff;\n    *pbuff++ = in * S->normalize;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n#else\n\n  /* Initializing the loop counter to N/2 */\n  i = S->Nby2;\n\n  do {\n    /* Re-ordering of even and odd elements */\n    /* pState[i] =  pInlineBuffer[2*i] */\n    *pS1++ = *pbuff++;\n    /* pState[N-i-1] = pInlineBuffer[2*i+1] */\n    *pS2-- = *pbuff++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Initializing the loop counter */\n  i = S->N;\n\n  do {\n    /* Writing the re-ordered output back to inplace input buffer */\n    *pbuff++ = *pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* ---------------------------------------------------------\n   *     Step2: Calculate RFFT for N-point input\n   * ---------------------------------------------------------- */\n  /* pInlineBuffer is real input of length N , pState is the complex output of\n   * length 2N */\n  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);\n\n  /*----------------------------------------------------------------------\n   *  Step3: Multiply the FFT output with the weights.\n   *----------------------------------------------------------------------*/\n  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);\n\n  /* ----------- Post-processing ---------- */\n  /* DCT-IV can be obtained from DCT-II by the equation,\n   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *       Hence, Y4(0) = Y2(0)/2  */\n  /* Getting only real part from the output and Converting to DCT-IV */\n\n  /* pbuff initialized to input buffer. */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */\n  in = *pS1++ * (float32_t)0.5;\n  /* input buffer acts as inplace, so output values are stored in the input\n   * itself. */\n  *pbuff++ = in;\n\n  /* pState pointer is incremented twice as the real values are located\n   * alternatively in the array */\n  pS1++;\n\n  /* Initializing the loop counter */\n  i = (S->N - 1U);\n\n  do {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n\n    /* points to the next real value */\n    pS1++;\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n  /*------------ Normalizing the output by multiplying with the normalizing\n   * factor ----------*/\n\n  /* Initializing loop counter */\n  i = S->N;\n\n  /* pbuff initialized to the pInlineBuffer (now contains the output values) */\n  pbuff = pInlineBuffer;\n\n  do {\n    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */\n    in = *pbuff;\n    *pbuff++ = in * S->normalize;\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n}\n\n/**\n  @} end of DCT4_IDCT4 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_dct4_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dct4_init_f32.c\n * Description:  Initialization function of DCT-4 & IDCT4 F32\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup DCT4_IDCT4\n */\n\n/**\n  @addtogroup DCT4_IDCT4_Table DCT Type IV Tables\n  @{\n */\n\n/**\n  @brief  Weights Table\n */\n\n/**\n  @par\n  Weights tables are generated using the formula : 
weights[n] =\n  e^(-j*n*pi/(2*N))
\n  @par\n  C command to generate the table\n  
\n  for(i = 0; i< N; i++)\n  {\n    weights[(2*i)]   =  cos (i*c);\n    weights[(2*i)+1] = -sin (i*c);\n  } 
\n  @par\n  where N is the Number of weights to be calculated and\n  c is pi/(2*N)\n  @par\n  In the tables below the real and imaginary values are placed alternatively,\n  hence the array length is 2*N.\n */\n\nstatic const float32_t Weights_128[256] = {\n    1.000000000000000000f,  0.000000000000000000f,  0.999924701839144500f,\n    -0.012271538285719925f, 0.999698818696204250f,  -0.024541228522912288f,\n    0.999322384588349540f,  -0.036807222941358832f, 0.998795456205172410f,\n    -0.049067674327418015f, 0.998118112900149180f,  -0.061320736302208578f,\n    0.997290456678690210f,  -0.073564563599667426f, 0.996312612182778000f,\n    -0.085797312344439894f, 0.995184726672196930f,  -0.098017140329560604f,\n    0.993906970002356060f,  -0.110222207293883060f, 0.992479534598709970f,\n    -0.122410675199216200f, 0.990902635427780010f,  -0.134580708507126170f,\n    0.989176509964781010f,  -0.146730474455361750f, 0.987301418157858430f,\n    -0.158858143333861450f, 0.985277642388941220f,  -0.170961888760301220f,\n    0.983105487431216290f,  -0.183039887955140950f, 0.980785280403230430f,\n    -0.195090322016128250f, 0.978317370719627650f,  -0.207111376192218560f,\n    0.975702130038528570f,  -0.219101240156869800f, 0.972939952205560180f,\n    -0.231058108280671110f, 0.970031253194543970f,  -0.242980179903263870f,\n    0.966976471044852070f,  -0.254865659604514570f, 0.963776065795439840f,\n    -0.266712757474898370f, 0.960430519415565790f,  -0.278519689385053060f,\n    0.956940335732208820f,  -0.290284677254462330f, 0.953306040354193860f,\n    -0.302005949319228080f, 0.949528180593036670f,  -0.313681740398891520f,\n    0.945607325380521280f,  -0.325310292162262930f, 0.941544065183020810f,\n    -0.336889853392220050f, 0.937339011912574960f,  -0.348418680249434560f,\n    0.932992798834738960f,  -0.359895036534988110f, 0.928506080473215590f,\n    -0.371317193951837540f, 0.923879532511286740f,  -0.382683432365089780f,\n    0.919113851690057770f,  -0.393992040061048100f, 0.914209755703530690f,\n    -0.405241314004989860f, 0.909167983090522380f,  -0.416429560097637150f,\n    0.903989293123443340f,  -0.427555093430282080f, 0.898674465693953820f,\n    -0.438616238538527660f, 0.893224301195515320f,  -0.449611329654606540f,\n    0.887639620402853930f,  -0.460538710958240010f, 0.881921264348355050f,\n    -0.471396736825997640f, 0.876070094195406600f,  -0.482183772079122720f,\n    0.870086991108711460f,  -0.492898192229784040f, 0.863972856121586810f,\n    -0.503538383725717580f, 0.857728610000272120f,  -0.514102744193221660f,\n    0.851355193105265200f,  -0.524589682678468950f, 0.844853565249707120f,\n    -0.534997619887097150f, 0.838224705554838080f,  -0.545324988422046460f,\n    0.831469612302545240f,  -0.555570233019602180f, 0.824589302785025290f,\n    -0.565731810783613120f, 0.817584813151583710f,  -0.575808191417845340f,\n    0.810457198252594770f,  -0.585797857456438860f, 0.803207531480644940f,\n    -0.595699304492433360f, 0.795836904608883570f,  -0.605511041404325550f,\n    0.788346427626606340f,  -0.615231590580626820f, 0.780737228572094490f,\n    -0.624859488142386340f, 0.773010453362736990f,  -0.634393284163645490f,\n    0.765167265622458960f,  -0.643831542889791390f, 0.757208846506484570f,\n    -0.653172842953776760f, 0.749136394523459370f,  -0.662415777590171780f,\n    0.740951125354959110f,  -0.671558954847018330f, 0.732654271672412820f,\n    -0.680600997795453020f, 0.724247082951467000f,  -0.689540544737066830f,\n    0.715730825283818590f,  -0.698376249408972920f, 0.707106781186547570f,\n    -0.707106781186547460f, 0.698376249408972920f,  -0.715730825283818590f,\n    0.689540544737066940f,  -0.724247082951466890f, 0.680600997795453130f,\n    -0.732654271672412820f, 0.671558954847018330f,  -0.740951125354959110f,\n    0.662415777590171780f,  -0.749136394523459260f, 0.653172842953776760f,\n    -0.757208846506484460f, 0.643831542889791500f,  -0.765167265622458960f,\n    0.634393284163645490f,  -0.773010453362736990f, 0.624859488142386450f,\n    -0.780737228572094380f, 0.615231590580626820f,  -0.788346427626606230f,\n    0.605511041404325550f,  -0.795836904608883460f, 0.595699304492433470f,\n    -0.803207531480644830f, 0.585797857456438860f,  -0.810457198252594770f,\n    0.575808191417845340f,  -0.817584813151583710f, 0.565731810783613230f,\n    -0.824589302785025290f, 0.555570233019602290f,  -0.831469612302545240f,\n    0.545324988422046460f,  -0.838224705554837970f, 0.534997619887097260f,\n    -0.844853565249707010f, 0.524589682678468840f,  -0.851355193105265200f,\n    0.514102744193221660f,  -0.857728610000272120f, 0.503538383725717580f,\n    -0.863972856121586700f, 0.492898192229784090f,  -0.870086991108711350f,\n    0.482183772079122830f,  -0.876070094195406600f, 0.471396736825997810f,\n    -0.881921264348354940f, 0.460538710958240010f,  -0.887639620402853930f,\n    0.449611329654606600f,  -0.893224301195515320f, 0.438616238538527710f,\n    -0.898674465693953820f, 0.427555093430282200f,  -0.903989293123443340f,\n    0.416429560097637320f,  -0.909167983090522270f, 0.405241314004989860f,\n    -0.914209755703530690f, 0.393992040061048100f,  -0.919113851690057770f,\n    0.382683432365089840f,  -0.923879532511286740f, 0.371317193951837600f,\n    -0.928506080473215480f, 0.359895036534988280f,  -0.932992798834738850f,\n    0.348418680249434510f,  -0.937339011912574960f, 0.336889853392220050f,\n    -0.941544065183020810f, 0.325310292162262980f,  -0.945607325380521280f,\n    0.313681740398891570f,  -0.949528180593036670f, 0.302005949319228200f,\n    -0.953306040354193750f, 0.290284677254462330f,  -0.956940335732208940f,\n    0.278519689385053060f,  -0.960430519415565790f, 0.266712757474898420f,\n    -0.963776065795439840f, 0.254865659604514630f,  -0.966976471044852070f,\n    0.242980179903263980f,  -0.970031253194543970f, 0.231058108280671280f,\n    -0.972939952205560070f, 0.219101240156869770f,  -0.975702130038528570f,\n    0.207111376192218560f,  -0.978317370719627650f, 0.195090322016128330f,\n    -0.980785280403230430f, 0.183039887955141060f,  -0.983105487431216290f,\n    0.170961888760301360f,  -0.985277642388941220f, 0.158858143333861390f,\n    -0.987301418157858430f, 0.146730474455361750f,  -0.989176509964781010f,\n    0.134580708507126220f,  -0.990902635427780010f, 0.122410675199216280f,\n    -0.992479534598709970f, 0.110222207293883180f,  -0.993906970002356060f,\n    0.098017140329560770f,  -0.995184726672196820f, 0.085797312344439880f,\n    -0.996312612182778000f, 0.073564563599667454f,  -0.997290456678690210f,\n    0.061320736302208648f,  -0.998118112900149180f, 0.049067674327418126f,\n    -0.998795456205172410f, 0.036807222941358991f,  -0.999322384588349540f,\n    0.024541228522912264f,  -0.999698818696204250f, 0.012271538285719944f,\n    -0.999924701839144500f};\n\nstatic const float32_t Weights_512[1024] = {\n    1.000000000000000000f,  0.000000000000000000f,  0.999995293809576190f,\n    -0.003067956762965976f, 0.999981175282601110f,  -0.006135884649154475f,\n    0.999957644551963900f,  -0.009203754782059819f, 0.999924701839144500f,\n    -0.012271538285719925f, 0.999882347454212560f,  -0.015339206284988100f,\n    0.999830581795823400f,  -0.018406729905804820f, 0.999769405351215280f,\n    -0.021474080275469508f, 0.999698818696204250f,  -0.024541228522912288f,\n    0.999618822495178640f,  -0.027608145778965740f, 0.999529417501093140f,\n    -0.030674803176636626f, 0.999430604555461730f,  -0.033741171851377580f,\n    0.999322384588349540f,  -0.036807222941358832f, 0.999204758618363890f,\n    -0.039872927587739811f, 0.999077727752645360f,  -0.042938256934940820f,\n    0.998941293186856870f,  -0.046003182130914623f, 0.998795456205172410f,\n    -0.049067674327418015f, 0.998640218180265270f,  -0.052131704680283324f,\n    0.998475580573294770f,  -0.055195244349689934f, 0.998301544933892890f,\n    -0.058258264500435752f, 0.998118112900149180f,  -0.061320736302208578f,\n    0.997925286198596000f,  -0.064382630929857465f, 0.997723066644191640f,\n    -0.067443919563664051f, 0.997511456140303450f,  -0.070504573389613856f,\n    0.997290456678690210f,  -0.073564563599667426f, 0.997060070339482960f,\n    -0.076623861392031492f, 0.996820299291165670f,  -0.079682437971430126f,\n    0.996571145790554840f,  -0.082740264549375692f, 0.996312612182778000f,\n    -0.085797312344439894f, 0.996044700901251970f,  -0.088853552582524600f,\n    0.995767414467659820f,  -0.091908956497132724f, 0.995480755491926940f,\n    -0.094963495329638992f, 0.995184726672196930f,  -0.098017140329560604f,\n    0.994879330794805620f,  -0.101069862754827820f, 0.994564570734255420f,\n    -0.104121633872054590f, 0.994240449453187900f,  -0.107172424956808840f,\n    0.993906970002356060f,  -0.110222207293883060f, 0.993564135520595300f,\n    -0.113270952177564350f, 0.993211949234794500f,  -0.116318630911904750f,\n    0.992850414459865100f,  -0.119365214810991350f, 0.992479534598709970f,\n    -0.122410675199216200f, 0.992099313142191800f,  -0.125454983411546230f,\n    0.991709753669099530f,  -0.128498110793793170f, 0.991310859846115440f,\n    -0.131540028702883120f, 0.990902635427780010f,  -0.134580708507126170f,\n    0.990485084256457090f,  -0.137620121586486040f, 0.990058210262297120f,\n    -0.140658239332849210f, 0.989622017463200890f,  -0.143695033150294470f,\n    0.989176509964781010f,  -0.146730474455361750f, 0.988721691960323780f,\n    -0.149764534677321510f, 0.988257567730749460f,  -0.152797185258443440f,\n    0.987784141644572180f,  -0.155828397654265230f, 0.987301418157858430f,\n    -0.158858143333861450f, 0.986809401814185530f,  -0.161886393780111830f,\n    0.986308097244598670f,  -0.164913120489969890f, 0.985797509167567480f,\n    -0.167938294974731170f, 0.985277642388941220f,  -0.170961888760301220f,\n    0.984748501801904210f,  -0.173983873387463820f, 0.984210092386929030f,\n    -0.177004220412148750f, 0.983662419211730250f,  -0.180022901405699510f,\n    0.983105487431216290f,  -0.183039887955140950f, 0.982539302287441240f,\n    -0.186055151663446630f, 0.981963869109555240f,  -0.189068664149806190f,\n    0.981379193313754560f,  -0.192080397049892440f, 0.980785280403230430f,\n    -0.195090322016128250f, 0.980182135968117430f,  -0.198098410717953560f,\n    0.979569765685440520f,  -0.201104634842091900f, 0.978948175319062200f,\n    -0.204108966092816870f, 0.978317370719627650f,  -0.207111376192218560f,\n    0.977677357824509930f,  -0.210111836880469610f, 0.977028142657754390f,\n    -0.213110319916091360f, 0.976369731330021140f,  -0.216106797076219520f,\n    0.975702130038528570f,  -0.219101240156869800f, 0.975025345066994120f,\n    -0.222093620973203510f, 0.974339382785575860f,  -0.225083911359792830f,\n    0.973644249650811980f,  -0.228072083170885730f, 0.972939952205560180f,\n    -0.231058108280671110f, 0.972226497078936270f,  -0.234041958583543430f,\n    0.971503890986251780f,  -0.237023605994367200f, 0.970772140728950350f,\n    -0.240003022448741500f, 0.970031253194543970f,  -0.242980179903263870f,\n    0.969281235356548530f,  -0.245955050335794590f, 0.968522094274417380f,\n    -0.248927605745720150f, 0.967753837093475510f,  -0.251897818154216970f,\n    0.966976471044852070f,  -0.254865659604514570f, 0.966190003445412500f,\n    -0.257831102162158990f, 0.965394441697689400f,  -0.260794117915275510f,\n    0.964589793289812760f,  -0.263754678974831350f, 0.963776065795439840f,\n    -0.266712757474898370f, 0.962953266873683880f,  -0.269668325572915090f,\n    0.962121404269041580f,  -0.272621355449948980f, 0.961280485811320640f,\n    -0.275571819310958140f, 0.960430519415565790f,  -0.278519689385053060f,\n    0.959571513081984520f,  -0.281464937925757940f, 0.958703474895871600f,\n    -0.284407537211271880f, 0.957826413027532910f,  -0.287347459544729510f,\n    0.956940335732208820f,  -0.290284677254462330f, 0.956045251349996410f,\n    -0.293219162694258630f, 0.955141168305770780f,  -0.296150888243623790f,\n    0.954228095109105670f,  -0.299079826308040480f, 0.953306040354193860f,\n    -0.302005949319228080f, 0.952375012719765880f,  -0.304929229735402370f,\n    0.951435020969008340f,  -0.307849640041534870f, 0.950486073949481700f,\n    -0.310767152749611470f, 0.949528180593036670f,  -0.313681740398891520f,\n    0.948561349915730270f,  -0.316593375556165850f, 0.947585591017741090f,\n    -0.319502030816015690f, 0.946600913083283530f,  -0.322407678801069850f,\n    0.945607325380521280f,  -0.325310292162262930f, 0.944604837261480260f,\n    -0.328209843579092500f, 0.943593458161960390f,  -0.331106305759876430f,\n    0.942573197601446870f,  -0.333999651442009380f, 0.941544065183020810f,\n    -0.336889853392220050f, 0.940506070593268300f,  -0.339776884406826850f,\n    0.939459223602189920f,  -0.342660717311994380f, 0.938403534063108060f,\n    -0.345541324963989090f, 0.937339011912574960f,  -0.348418680249434560f,\n    0.936265667170278260f,  -0.351292756085567090f, 0.935183509938947610f,\n    -0.354163525420490340f, 0.934092550404258980f,  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0.302005949319228200f,\n    -0.953306040354193750f, 0.299079826308040480f,  -0.954228095109105670f,\n    0.296150888243623960f,  -0.955141168305770670f, 0.293219162694258680f,\n    -0.956045251349996410f, 0.290284677254462330f,  -0.956940335732208940f,\n    0.287347459544729570f,  -0.957826413027532910f, 0.284407537211271820f,\n    -0.958703474895871600f, 0.281464937925758050f,  -0.959571513081984520f,\n    0.278519689385053060f,  -0.960430519415565790f, 0.275571819310958250f,\n    -0.961280485811320640f, 0.272621355449948980f,  -0.962121404269041580f,\n    0.269668325572915200f,  -0.962953266873683880f, 0.266712757474898420f,\n    -0.963776065795439840f, 0.263754678974831510f,  -0.964589793289812650f,\n    0.260794117915275570f,  -0.965394441697689400f, 0.257831102162158930f,\n    -0.966190003445412620f, 0.254865659604514630f,  -0.966976471044852070f,\n    0.251897818154216910f,  -0.967753837093475510f, 0.248927605745720260f,\n    -0.968522094274417270f, 0.245955050335794590f,  -0.969281235356548530f,\n    0.242980179903263980f,  -0.970031253194543970f, 0.240003022448741500f,\n    -0.970772140728950350f, 0.237023605994367340f,  -0.971503890986251780f,\n    0.234041958583543460f,  -0.972226497078936270f, 0.231058108280671280f,\n    -0.972939952205560070f, 0.228072083170885790f,  -0.973644249650811870f,\n    0.225083911359792780f,  -0.974339382785575860f, 0.222093620973203590f,\n    -0.975025345066994120f, 0.219101240156869770f,  -0.975702130038528570f,\n    0.216106797076219600f,  -0.976369731330021140f, 0.213110319916091360f,\n    -0.977028142657754390f, 0.210111836880469720f,  -0.977677357824509930f,\n    0.207111376192218560f,  -0.978317370719627650f, 0.204108966092817010f,\n    -0.978948175319062200f, 0.201104634842091960f,  -0.979569765685440520f,\n    0.198098410717953730f,  -0.980182135968117320f, 0.195090322016128330f,\n    -0.980785280403230430f, 0.192080397049892380f,  -0.981379193313754560f,\n    0.189068664149806280f,  -0.981963869109555240f, 0.186055151663446630f,\n    -0.982539302287441240f, 0.183039887955141060f,  -0.983105487431216290f,\n    0.180022901405699510f,  -0.983662419211730250f, 0.177004220412148860f,\n    -0.984210092386929030f, 0.173983873387463850f,  -0.984748501801904210f,\n    0.170961888760301360f,  -0.985277642388941220f, 0.167938294974731230f,\n    -0.985797509167567370f, 0.164913120489970090f,  -0.986308097244598670f,\n    0.161886393780111910f,  -0.986809401814185420f, 0.158858143333861390f,\n    -0.987301418157858430f, 0.155828397654265320f,  -0.987784141644572180f,\n    0.152797185258443410f,  -0.988257567730749460f, 0.149764534677321620f,\n    -0.988721691960323780f, 0.146730474455361750f,  -0.989176509964781010f,\n    0.143695033150294580f,  -0.989622017463200780f, 0.140658239332849240f,\n    -0.990058210262297120f, 0.137620121586486180f,  -0.990485084256456980f,\n    0.134580708507126220f,  -0.990902635427780010f, 0.131540028702883280f,\n    -0.991310859846115440f, 0.128498110793793220f,  -0.991709753669099530f,\n    0.125454983411546210f,  -0.992099313142191800f, 0.122410675199216280f,\n    -0.992479534598709970f, 0.119365214810991350f,  -0.992850414459865100f,\n    0.116318630911904880f,  -0.993211949234794500f, 0.113270952177564360f,\n    -0.993564135520595300f, 0.110222207293883180f,  -0.993906970002356060f,\n    0.107172424956808870f,  -0.994240449453187900f, 0.104121633872054730f,\n    -0.994564570734255420f, 0.101069862754827880f,  -0.994879330794805620f,\n    0.098017140329560770f,  -0.995184726672196820f, 0.094963495329639061f,\n    -0.995480755491926940f, 0.091908956497132696f,  -0.995767414467659820f,\n    0.088853552582524684f,  -0.996044700901251970f, 0.085797312344439880f,\n    -0.996312612182778000f, 0.082740264549375803f,  -0.996571145790554840f,\n    0.079682437971430126f,  -0.996820299291165670f, 0.076623861392031617f,\n    -0.997060070339482960f, 0.073564563599667454f,  -0.997290456678690210f,\n    0.070504573389614009f,  -0.997511456140303450f, 0.067443919563664106f,\n    -0.997723066644191640f, 0.064382630929857410f,  -0.997925286198596000f,\n    0.061320736302208648f,  -0.998118112900149180f, 0.058258264500435732f,\n    -0.998301544933892890f, 0.055195244349690031f,  -0.998475580573294770f,\n    0.052131704680283317f,  -0.998640218180265270f, 0.049067674327418126f,\n    -0.998795456205172410f, 0.046003182130914644f,  -0.998941293186856870f,\n    0.042938256934940959f,  -0.999077727752645360f, 0.039872927587739845f,\n    -0.999204758618363890f, 0.036807222941358991f,  -0.999322384588349540f,\n    0.033741171851377642f,  -0.999430604555461730f, 0.030674803176636581f,\n    -0.999529417501093140f, 0.027608145778965820f,  -0.999618822495178640f,\n    0.024541228522912264f,  -0.999698818696204250f, 0.021474080275469605f,\n    -0.999769405351215280f, 0.018406729905804820f,  -0.999830581795823400f,\n    0.015339206284988220f,  -0.999882347454212560f, 0.012271538285719944f,\n    -0.999924701839144500f, 0.009203754782059960f,  -0.999957644551963900f,\n    0.006135884649154515f,  -0.999981175282601110f, 0.003067956762966138f,\n    -0.999995293809576190f};\n\nstatic const float32_t Weights_2048[4096] = {\n    1.000000000000000000f,  0.000000000000000000f,  0.999999705862882230f,\n    -0.000766990318742704f, 0.999998823451701880f,  -0.001533980186284766f,\n    0.999997352766978210f,  -0.002300969151425805f, 0.999995293809576190f,\n    -0.003067956762965976f, 0.999992646580707190f,  -0.003834942569706228f,\n    0.999989411081928400f,  -0.004601926120448571f, 0.999985587315143200f,\n    -0.005368906963996343f, 0.999981175282601110f,  -0.006135884649154475f,\n    0.999976174986897610f,  -0.006902858724729756f, 0.999970586430974140f,\n    -0.007669828739531097f, 0.999964409618118280f,  -0.008436794242369799f,\n    0.999957644551963900f,  -0.009203754782059819f, 0.999950291236490480f,\n    -0.009970709907418031f, 0.999942349676023910f,  -0.010737659167264491f,\n    0.999933819875236000f,  -0.011504602110422714f, 0.999924701839144500f,\n    -0.012271538285719925f, 0.999914995573113470f,  -0.013038467241987334f,\n    0.999904701082852900f,  -0.013805388528060391f, 0.999893818374418490f,\n    -0.014572301692779064f, 0.999882347454212560f,  -0.015339206284988100f,\n    0.999870288328982950f,  -0.016106101853537287f, 0.999857641005823860f,\n    -0.016872987947281710f, 0.999844405492175240f,  -0.017639864115082053f,\n    0.999830581795823400f,  -0.018406729905804820f, 0.999816169924900410f,\n    -0.019173584868322623f, 0.999801169887884260f,  -0.019940428551514441f,\n    0.999785581693599210f,  -0.020707260504265895f, 0.999769405351215280f,\n    -0.021474080275469508f, 0.999752640870248840f,  -0.022240887414024961f,\n    0.999735288260561680f,  -0.023007681468839369f, 0.999717347532362190f,\n    -0.023774461988827555f, 0.999698818696204250f,  -0.024541228522912288f,\n    0.999679701762987930f,  -0.025307980620024571f, 0.999659996743959220f,\n    -0.026074717829103901f, 0.999639703650710200f,  -0.026841439699098531f,\n    0.999618822495178640f,  -0.027608145778965740f, 0.999597353289648380f,\n    -0.028374835617672099f, 0.999575296046749220f,  -0.029141508764193722f,\n    0.999552650779456990f,  -0.029908164767516555f, 0.999529417501093140f,\n    -0.030674803176636626f, 0.999505596225325310f,  -0.031441423540560301f,\n    0.999481186966166950f,  -0.032208025408304586f, 0.999456189737977340f,\n    -0.032974608328897335f, 0.999430604555461730f,  -0.033741171851377580f,\n    0.999404431433671300f,  -0.034507715524795750f, 0.999377670388002850f,\n    -0.035274238898213947f, 0.999350321434199440f,  -0.036040741520706229f,\n    0.999322384588349540f,  -0.036807222941358832f, 0.999293859866887790f,\n    -0.037573682709270494f, 0.999264747286594420f,  -0.038340120373552694f,\n    0.999235046864595850f,  -0.039106535483329888f, 0.999204758618363890f,\n    -0.039872927587739811f, 0.999173882565716380f,  -0.040639296235933736f,\n    0.999142418724816910f,  -0.041405640977076739f, 0.999110367114174890f,\n    -0.042171961360347947f, 0.999077727752645360f,  -0.042938256934940820f,\n    0.999044500659429290f,  -0.043704527250063421f, 0.999010685854073380f,\n    -0.044470771854938668f, 0.998976283356469820f,  -0.045236990298804590f,\n    0.998941293186856870f,  -0.046003182130914623f, 0.998905715365818290f,\n    -0.046769346900537863f, 0.998869549914283560f,  -0.047535484156959303f,\n    0.998832796853527990f,  -0.048301593449480144f, 0.998795456205172410f,\n    -0.049067674327418015f, 0.998757527991183340f,  -0.049833726340107277f,\n    0.998719012233872940f,  -0.050599749036899282f, 0.998679908955899090f,\n    -0.051365741967162593f, 0.998640218180265270f,  -0.052131704680283324f,\n    0.998599939930320370f,  -0.052897636725665324f, 0.998559074229759310f,\n    -0.053663537652730520f, 0.998517621102622210f,  -0.054429407010919133f,\n    0.998475580573294770f,  -0.055195244349689934f, 0.998432952666508440f,\n    -0.055961049218520569f, 0.998389737407340160f,  -0.056726821166907748f,\n    0.998345934821212370f,  -0.057492559744367566f, 0.998301544933892890f,\n    -0.058258264500435752f, 0.998256567771495180f,  -0.059023934984667931f,\n    0.998211003360478190f,  -0.059789570746639868f, 0.998164851727646240f,\n    -0.060555171335947788f, 0.998118112900149180f,  -0.061320736302208578f,\n    0.998070786905482340f,  -0.062086265195060088f, 0.998022873771486240f,\n    -0.062851757564161406f, 0.997974373526346990f,  -0.063617212959193106f,\n    0.997925286198596000f,  -0.064382630929857465f, 0.997875611817110150f,\n    -0.065148011025878833f, 0.997825350411111640f,  -0.065913352797003805f,\n    0.997774502010167820f,  -0.066678655793001557f, 0.997723066644191640f,\n    -0.067443919563664051f, 0.997671044343441000f,  -0.068209143658806329f,\n    0.997618435138519550f,  -0.068974327628266746f, 0.997565239060375750f,\n    -0.069739471021907307f, 0.997511456140303450f,  -0.070504573389613856f,\n    0.997457086409941910f,  -0.071269634281296401f, 0.997402129901275300f,\n    -0.072034653246889332f, 0.997346586646633230f,  -0.072799629836351673f,\n    0.997290456678690210f,  -0.073564563599667426f, 0.997233740030466280f,\n    -0.074329454086845756f, 0.997176436735326190f,  -0.075094300847921305f,\n    0.997118546826979980f,  -0.075859103432954447f, 0.997060070339482960f,\n    -0.076623861392031492f, 0.997001007307235290f,  -0.077388574275265049f,\n    0.996941357764982160f,  -0.078153241632794232f, 0.996881121747813850f,\n    -0.078917863014784942f, 0.996820299291165670f,  -0.079682437971430126f,\n    0.996758890430818000f,  -0.080446966052950014f, 0.996696895202896060f,\n    -0.081211446809592441f, 0.996634313643869900f,  -0.081975879791633066f,\n    0.996571145790554840f,  -0.082740264549375692f, 0.996507391680110820f,\n    -0.083504600633152432f, 0.996443051350042630f,  -0.084268887593324071f,\n    0.996378124838200210f,  -0.085033124980280275f, 0.996312612182778000f,\n    -0.085797312344439894f, 0.996246513422315520f,  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0.092672673429913366f,\n    -0.995696628295663520f, 0.091908956497132696f,  -0.995767414467659820f,\n    0.091145185496681130f,  -0.995837614855341610f, 0.090381360877865011f,\n    -0.995907229417411720f, 0.089617483090022917f,  -0.995976258112917790f,\n    0.088853552582524684f,  -0.996044700901251970f, 0.088089569804770507f,\n    -0.996112557742151130f, 0.087325535206192226f,  -0.996179828595696870f,\n    0.086561449236251239f,  -0.996246513422315520f, 0.085797312344439880f,\n    -0.996312612182778000f, 0.085033124980280414f,  -0.996378124838200210f,\n    0.084268887593324127f,  -0.996443051350042630f, 0.083504600633152404f,\n    -0.996507391680110820f, 0.082740264549375803f,  -0.996571145790554840f,\n    0.081975879791633108f,  -0.996634313643869900f, 0.081211446809592386f,\n    -0.996696895202896060f, 0.080446966052950097f,  -0.996758890430818000f,\n    0.079682437971430126f,  -0.996820299291165670f, 0.078917863014785095f,\n    -0.996881121747813850f, 0.078153241632794315f,  -0.996941357764982160f,\n    0.077388574275265049f,  -0.997001007307235290f, 0.076623861392031617f,\n    -0.997060070339482960f, 0.075859103432954503f,  -0.997118546826979980f,\n    0.075094300847921291f,  -0.997176436735326190f, 0.074329454086845867f,\n    -0.997233740030466160f, 0.073564563599667454f,  -0.997290456678690210f,\n    0.072799629836351618f,  -0.997346586646633230f, 0.072034653246889416f,\n    -0.997402129901275300f, 0.071269634281296415f,  -0.997457086409941910f,\n    0.070504573389614009f,  -0.997511456140303450f, 0.069739471021907376f,\n    -0.997565239060375750f, 0.068974327628266732f,  -0.997618435138519550f,\n    0.068209143658806454f,  -0.997671044343441000f, 0.067443919563664106f,\n    -0.997723066644191640f, 0.066678655793001543f,  -0.997774502010167820f,\n    0.065913352797003930f,  -0.997825350411111640f, 0.065148011025878860f,\n    -0.997875611817110150f, 0.064382630929857410f,  -0.997925286198596000f,\n    0.063617212959193190f,  -0.997974373526346990f, 0.062851757564161420f,\n    -0.998022873771486240f, 0.062086265195060247f,  -0.998070786905482340f,\n    0.061320736302208648f,  -0.998118112900149180f, 0.060555171335947781f,\n    -0.998164851727646240f, 0.059789570746640007f,  -0.998211003360478190f,\n    0.059023934984667986f,  -0.998256567771495180f, 0.058258264500435732f,\n    -0.998301544933892890f, 0.057492559744367684f,  -0.998345934821212370f,\n    0.056726821166907783f,  -0.998389737407340160f, 0.055961049218520520f,\n    -0.998432952666508440f, 0.055195244349690031f,  -0.998475580573294770f,\n    0.054429407010919147f,  -0.998517621102622210f, 0.053663537652730679f,\n    -0.998559074229759310f, 0.052897636725665401f,  -0.998599939930320370f,\n    0.052131704680283317f,  -0.998640218180265270f, 0.051365741967162731f,\n    -0.998679908955899090f, 0.050599749036899337f,  -0.998719012233872940f,\n    0.049833726340107257f,  -0.998757527991183340f, 0.049067674327418126f,\n    -0.998795456205172410f, 0.048301593449480172f,  -0.998832796853527990f,\n    0.047535484156959261f,  -0.998869549914283560f, 0.046769346900537960f,\n    -0.998905715365818290f, 0.046003182130914644f,  -0.998941293186856870f,\n    0.045236990298804750f,  -0.998976283356469820f, 0.044470771854938744f,\n    -0.999010685854073380f, 0.043704527250063421f,  -0.999044500659429290f,\n    0.042938256934940959f,  -0.999077727752645360f, 0.042171961360348002f,\n    -0.999110367114174890f, 0.041405640977076712f,  -0.999142418724816910f,\n    0.040639296235933854f,  -0.999173882565716380f, 0.039872927587739845f,\n    -0.999204758618363890f, 0.039106535483329839f,  -0.999235046864595850f,\n    0.038340120373552791f,  -0.999264747286594420f, 0.037573682709270514f,\n    -0.999293859866887790f, 0.036807222941358991f,  -0.999322384588349540f,\n    0.036040741520706299f,  -0.999350321434199440f, 0.035274238898213947f,\n    -0.999377670388002850f, 0.034507715524795889f,  -0.999404431433671300f,\n    0.033741171851377642f,  -0.999430604555461730f, 0.032974608328897315f,\n    -0.999456189737977340f, 0.032208025408304704f,  -0.999481186966166950f,\n    0.031441423540560343f,  -0.999505596225325310f, 0.030674803176636581f,\n    -0.999529417501093140f, 0.029908164767516655f,  -0.999552650779456990f,\n    0.029141508764193740f,  -0.999575296046749220f, 0.028374835617672258f,\n    -0.999597353289648380f, 0.027608145778965820f,  -0.999618822495178640f,\n    0.026841439699098527f,  -0.999639703650710200f, 0.026074717829104040f,\n    -0.999659996743959220f, 0.025307980620024630f,  -0.999679701762987930f,\n    0.024541228522912264f,  -0.999698818696204250f, 0.023774461988827676f,\n    -0.999717347532362190f, 0.023007681468839410f,  -0.999735288260561680f,\n    0.022240887414024919f,  -0.999752640870248840f, 0.021474080275469605f,\n    -0.999769405351215280f, 0.020707260504265912f,  -0.999785581693599210f,\n    0.019940428551514598f,  -0.999801169887884260f, 0.019173584868322699f,\n    -0.999816169924900410f, 0.018406729905804820f,  -0.999830581795823400f,\n    0.017639864115082195f,  -0.999844405492175240f, 0.016872987947281773f,\n    -0.999857641005823860f, 0.016106101853537263f,  -0.999870288328982950f,\n    0.015339206284988220f,  -0.999882347454212560f, 0.014572301692779104f,\n    -0.999893818374418490f, 0.013805388528060349f,  -0.999904701082852900f,\n    0.013038467241987433f,  -0.999914995573113470f, 0.012271538285719944f,\n    -0.999924701839144500f, 0.011504602110422875f,  -0.999933819875236000f,\n    0.010737659167264572f,  -0.999942349676023910f, 0.009970709907418029f,\n    -0.999950291236490480f, 0.009203754782059960f,  -0.999957644551963900f,\n    0.008436794242369860f,  -0.999964409618118280f, 0.007669828739531077f,\n    -0.999970586430974140f, 0.006902858724729877f,  -0.999976174986897610f,\n    0.006135884649154515f,  -0.999981175282601110f, 0.005368906963996303f,\n    -0.999985587315143200f, 0.004601926120448672f,  -0.999989411081928400f,\n    0.003834942569706248f,  -0.999992646580707190f, 0.003067956762966138f,\n    -0.999995293809576190f, 0.002300969151425887f,  -0.999997352766978210f,\n    0.001533980186284766f,  -0.999998823451701880f, 0.000766990318742846f,\n    -0.999999705862882230f};\n\nstatic const float32_t Weights_8192[16384] = {\n    1.000000000000000000f,  -0.000000000000000000f, 0.999999981616429330f,\n    -0.000191747597310703f, 0.999999926465717890f,  -0.000383495187571396f,\n    0.999999834547867670f,  -0.000575242763732066f, 0.999999705862882230f,\n    -0.000766990318742704f, 0.999999540410766110f,  -0.000958737845553301f,\n    0.999999338191525530f,  -0.001150485337113849f, 0.999999099205167830f,\n    -0.001342232786374338f, 0.999998823451701880f,  -0.001533980186284766f,\n    0.999998510931137790f,  -0.001725727529795126f, 0.999998161643486980f,\n    -0.001917474809855419f, 0.999997775588762350f,  -0.002109222019415644f,\n    0.999997352766978210f,  -0.002300969151425805f, 0.999996893178149880f,\n    -0.002492716198835908f, 0.999996396822294350f,  -0.002684463154595962f,\n    0.999995863699429940f,  -0.002876210011655979f, 0.999995293809576190f,\n    -0.003067956762965976f, 0.999994687152754080f,  -0.003259703401475973f,\n    0.999994043728985820f,  -0.003451449920135994f, 0.999993363538295150f,\n    -0.003643196311896068f, 0.999992646580707190f,  -0.003834942569706228f,\n    0.999991892856248010f,  -0.004026688686516512f, 0.999991102364945590f,\n    -0.004218434655276963f, 0.999990275106828920f,  -0.004410180468937631f,\n    0.999989411081928400f,  -0.004601926120448571f, 0.999988510290275690f,\n    -0.004793671602759841f, 0.999987572731904080f,  -0.004985416908821511f,\n    0.999986598406848000f,  -0.005177162031583651f, 0.999985587315143200f,\n    -0.005368906963996343f, 0.999984539456826970f,  -0.005560651699009674f,\n    0.999983454831937730f,  -0.005752396229573736f, 0.999982333440515350f,\n    -0.005944140548638633f, 0.999981175282601110f,  -0.006135884649154475f,\n    0.999979980358237650f,  -0.006327628524071378f, 0.999978748667468830f,\n    -0.006519372166339468f, 0.999977480210339940f,  -0.006711115568908879f,\n    0.999976174986897610f,  -0.006902858724729756f, 0.999974832997189810f,\n    -0.007094601626752250f, 0.999973454241265940f,  -0.007286344267926521f,\n    0.999972038719176730f,  -0.007478086641202744f, 0.999970586430974140f,\n    -0.007669828739531097f, 0.999969097376711580f,  -0.007861570555861772f,\n    0.999967571556443780f,  -0.008053312083144972f, 0.999966008970226920f,\n    -0.008245053314330906f, 0.999964409618118280f,  -0.008436794242369799f,\n    0.999962773500176930f,  -0.008628534860211886f, 0.999961100616462820f,\n    -0.008820275160807412f, 0.999959390967037450f,  -0.009012015137106633f,\n    0.999957644551963900f,  -0.009203754782059819f, 0.999955861371306100f,\n    -0.009395494088617252f, 0.999954041425129780f,  -0.009587233049729225f,\n    0.999952184713501780f,  -0.009778971658346044f, 0.999950291236490480f,\n    -0.009970709907418031f, 0.999948360994165400f,  -0.010162447789895513f,\n    0.999946393986597460f,  -0.010354185298728842f, 0.999944390213859060f,\n    -0.010545922426868378f, 0.999942349676023910f,  -0.010737659167264491f,\n    0.999940272373166960f,  -0.010929395512867571f, 0.999938158305364590f,\n    -0.011121131456628021f, 0.999936007472694620f,  -0.011312866991496258f,\n    0.999933819875236000f,  -0.011504602110422714f, 0.999931595513069200f,\n    -0.011696336806357838f, 0.999929334386276070f,  -0.011888071072252092f,\n    0.999927036494939640f,  -0.012079804901055957f, 0.999924701839144500f,\n    -0.012271538285719925f, 0.999922330418976490f,  -0.012463271219194511f,\n    0.999919922234522750f,  -0.012655003694430242f, 0.999917477285871770f,\n    -0.012846735704377662f, 0.999914995573113470f,  -0.013038467241987334f,\n    0.999912477096339240f,  -0.013230198300209835f, 0.999909921855641540f,\n    -0.013421928871995765f, 0.999907329851114300f,  -0.013613658950295740f,\n    0.999904701082852900f,  -0.013805388528060391f, 0.999902035550953920f,\n    -0.013997117598240367f, 0.999899333255515390f,  -0.014188846153786345f,\n    0.999896594196636680f,  -0.014380574187649006f, 0.999893818374418490f,\n    -0.014572301692779064f, 0.999891005788962950f,  -0.014764028662127246f,\n    0.999888156440373320f,  -0.014955755088644296f, 0.999885270328754520f,\n    -0.015147480965280987f, 0.999882347454212560f,  -0.015339206284988100f,\n    0.999879387816854930f,  -0.015530931040716447f, 0.999876391416790410f,\n    -0.015722655225416857f, 0.999873358254129260f,  -0.015914378832040183f,\n    0.999870288328982950f,  -0.016106101853537287f, 0.999867181641464380f,\n    -0.016297824282859065f, 0.999864038191687680f,  -0.016489546112956437f,\n    0.999860857979768540f,  -0.016681267336780332f, 0.999857641005823860f,\n    -0.016872987947281710f, 0.999854387269971890f,  -0.017064707937411563f,\n    0.999851096772332190f,  -0.017256427300120877f, 0.999847769513025900f,\n    -0.017448146028360693f, 0.999844405492175240f,  -0.017639864115082053f,\n    0.999841004709904000f,  -0.017831581553236039f, 0.999837567166337090f,\n    -0.018023298335773746f, 0.999834092861600960f,  -0.018215014455646290f,\n    0.999830581795823400f,  -0.018406729905804820f, 0.999827033969133420f,\n    -0.018598444679200511f, 0.999823449381661570f,  -0.018790158768784555f,\n    0.999819828033539420f,  -0.018981872167508178f, 0.999816169924900410f,\n    -0.019173584868322623f, 0.999812475055878780f,  -0.019365296864179156f,\n    0.999808743426610520f,  -0.019557008148029083f, 0.999804975037232870f,\n    -0.019748718712823729f, 0.999801169887884260f,  -0.019940428551514441f,\n    0.999797327978704690f,  -0.020132137657052594f, 0.999793449309835270f,\n    -0.020323846022389593f, 0.999789533881418780f,  -0.020515553640476875f,\n    0.999785581693599210f,  -0.020707260504265895f, 0.999781592746521670f,\n    -0.020898966606708137f, 0.999777567040332940f,  -0.021090671940755121f,\n    0.999773504575180990f,  -0.021282376499358387f, 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-0.999384415766428560f,\n    0.034890979777187955f,  -0.999391124400346050f, 0.034699348288889847f,\n    -0.999397796289508640f, 0.034507715524795889f,  -0.999404431433671300f,\n    0.034316081491951658f,  -0.999411029832589780f, 0.034124446197403423f,\n    -0.999417591486021720f, 0.033932809648196623f,  -0.999424116393725640f,\n    0.033741171851377642f,  -0.999430604555461730f, 0.033549532813992221f,\n    -0.999437055970991530f, 0.033357892543086159f,  -0.999443470640077770f,\n    0.033166251045705968f,  -0.999449848562484530f, 0.032974608328897315f,\n    -0.999456189737977340f, 0.032782964399706793f,  -0.999462494166323160f,\n    0.032591319265180385f,  -0.999468761847290050f, 0.032399672932364114f,\n    -0.999474992780647780f, 0.032208025408304704f,  -0.999481186966166950f,\n    0.032016376700048046f,  -0.999487344403620080f, 0.031824726814640963f,\n    -0.999493465092780590f, 0.031633075759129645f,  -0.999499549033423640f,\n    0.031441423540560343f,  -0.999505596225325310f, 0.031249770165979990f,\n    -0.999511606668263440f, 0.031058115642434700f,  -0.999517580362016990f,\n    0.030866459976971503f,  -0.999523517306366350f, 0.030674803176636581f,\n    -0.999529417501093140f, 0.030483145248477058f,  -0.999535280945980540f,\n    0.030291486199539423f,  -0.999541107640812940f, 0.030099826036870208f,\n    -0.999546897585375960f, 0.029908164767516655f,  -0.999552650779456990f,\n    0.029716502398525156f,  -0.999558367222844300f, 0.029524838936943035f,\n    -0.999564046915327740f, 0.029333174389816984f,  -0.999569689856698580f,\n    0.029141508764193740f,  -0.999575296046749220f, 0.028949842067120746f,\n    -0.999580865485273700f, 0.028758174305644590f,  -0.999586398172067070f,\n    0.028566505486812797f,  -0.999591894106925950f, 0.028374835617672258f,\n    -0.999597353289648380f, 0.028183164705269902f,  -0.999602775720033530f,\n    0.027991492756653365f,  -0.999608161397882110f, 0.027799819778869434f,\n    -0.999613510322995950f, 0.027608145778965820f,  -0.999618822495178640f,\n    0.027416470763989606f,  -0.999624097914234570f, 0.027224794740987910f,\n    -0.999629336579970110f, 0.027033117717008563f,  -0.999634538492192300f,\n    0.026841439699098527f,  -0.999639703650710200f, 0.026649760694305708f,\n    -0.999644832055333610f, 0.026458080709677145f,  -0.999649923705874240f,\n    0.026266399752260809f,  -0.999654978602144690f, 0.026074717829104040f,\n    -0.999659996743959220f, 0.025883034947254208f,  -0.999664978131133310f,\n    0.025691351113759395f,  -0.999669922763483760f, 0.025499666335666818f,\n    -0.999674830640828740f, 0.025307980620024630f,  -0.999679701762987930f,\n    0.025116293973880335f,  -0.999684536129782140f, 0.024924606404281485f,\n    -0.999689333741033640f, 0.024732917918276334f,  -0.999694094596566000f,\n    0.024541228522912264f,  -0.999698818696204250f, 0.024349538225237600f,\n    -0.999703506039774650f, 0.024157847032300020f,  -0.999708156627104880f,\n    0.023966154951147241f,  -0.999712770458023870f, 0.023774461988827676f,\n    -0.999717347532362190f, 0.023582768152388880f,  -0.999721887849951310f,\n    0.023391073448879338f,  -0.999726391410624470f, 0.023199377885346890f,\n    -0.999730858214216030f, 0.023007681468839410f,  -0.999735288260561680f,\n    0.022815984206405477f,  -0.999739681549498660f, 0.022624286105092803f,\n    -0.999744038080865430f, 0.022432587171950024f,  -0.999748357854501780f,\n    0.022240887414024919f,  -0.999752640870248840f, 0.022049186838366180f,\n    -0.999756887127949080f, 0.021857485452021874f,  -0.999761096627446610f,\n    0.021665783262040089f,  -0.999765269368586450f, 0.021474080275469605f,\n    -0.999769405351215280f, 0.021282376499358355f,  -0.999773504575180990f,\n    0.021090671940755180f,  -0.999777567040332940f, 0.020898966606708289f,\n    -0.999781592746521670f, 0.020707260504265912f,  -0.999785581693599210f,\n    0.020515553640476986f,  -0.999789533881418780f, 0.020323846022389572f,\n    -0.999793449309835270f, 0.020132137657052664f,  -0.999797327978704690f,\n    0.019940428551514598f,  -0.999801169887884260f, 0.019748718712823757f,\n    -0.999804975037232870f, 0.019557008148029204f,  -0.999808743426610520f,\n    0.019365296864179146f,  -0.999812475055878780f, 0.019173584868322699f,\n    -0.999816169924900410f, 0.018981872167508348f,  -0.999819828033539420f,\n    0.018790158768784596f,  -0.999823449381661570f, 0.018598444679200642f,\n    -0.999827033969133420f, 0.018406729905804820f,  -0.999830581795823400f,\n    0.018215014455646376f,  -0.999834092861600960f, 0.018023298335773701f,\n    -0.999837567166337090f, 0.017831581553236088f,  -0.999841004709904000f,\n    0.017639864115082195f,  -0.999844405492175240f, 0.017448146028360704f,\n    -0.999847769513025900f, 0.017256427300120978f,  -0.999851096772332190f,\n    0.017064707937411529f,  -0.999854387269971890f, 0.016872987947281773f,\n    -0.999857641005823860f, 0.016681267336780482f,  -0.999860857979768540f,\n    0.016489546112956454f,  -0.999864038191687680f, 0.016297824282859176f,\n    -0.999867181641464380f, 0.016106101853537263f,  -0.999870288328982950f,\n    0.015914378832040249f,  -0.999873358254129260f, 0.015722655225417017f,\n    -0.999876391416790410f, 0.015530931040716478f,  -0.999879387816854930f,\n    0.015339206284988220f,  -0.999882347454212560f, 0.015147480965280975f,\n    -0.999885270328754520f, 0.014955755088644378f,  -0.999888156440373320f,\n    0.014764028662127416f,  -0.999891005788962950f, 0.014572301692779104f,\n    -0.999893818374418490f, 0.014380574187649138f,  -0.999896594196636680f,\n    0.014188846153786343f,  -0.999899333255515390f, 0.013997117598240459f,\n    -0.999902035550953920f, 0.013805388528060349f,  -0.999904701082852900f,\n    0.013613658950295789f,  -0.999907329851114300f, 0.013421928871995907f,\n    -0.999909921855641540f, 0.013230198300209845f,  -0.999912477096339240f,\n    0.013038467241987433f,  -0.999914995573113470f, 0.012846735704377631f,\n    -0.999917477285871770f, 0.012655003694430301f,  -0.999919922234522750f,\n    0.012463271219194662f,  -0.999922330418976490f, 0.012271538285719944f,\n    -0.999924701839144500f, 0.012079804901056066f,  -0.999927036494939640f,\n    0.011888071072252072f,  -0.999929334386276070f, 0.011696336806357907f,\n    -0.999931595513069200f, 0.011504602110422875f,  -0.999933819875236000f,\n    0.011312866991496287f,  -0.999936007472694620f, 0.011121131456628141f,\n    -0.999938158305364590f, 0.010929395512867561f,  -0.999940272373166960f,\n    0.010737659167264572f,  -0.999942349676023910f, 0.010545922426868548f,\n    -0.999944390213859060f, 0.010354185298728884f,  -0.999946393986597460f,\n    0.010162447789895645f,  -0.999948360994165400f, 0.009970709907418029f,\n    -0.999950291236490480f, 0.009778971658346134f,  -0.999952184713501780f,\n    0.009587233049729183f,  -0.999954041425129780f, 0.009395494088617302f,\n    -0.999955861371306100f, 0.009203754782059960f,  -0.999957644551963900f,\n    0.009012015137106642f,  -0.999959390967037450f, 0.008820275160807512f,\n    -0.999961100616462820f, 0.008628534860211857f,  -0.999962773500176930f,\n    0.008436794242369860f,  -0.999964409618118280f, 0.008245053314331058f,\n    -0.999966008970226920f, 0.008053312083144991f,  -0.999967571556443780f,\n    0.007861570555861883f,  -0.999969097376711580f, 0.007669828739531077f,\n    -0.999970586430974140f, 0.007478086641202815f,  -0.999972038719176730f,\n    0.007286344267926684f,  -0.999973454241265940f, 0.007094601626752279f,\n    -0.999974832997189810f, 0.006902858724729877f,  -0.999976174986897610f,\n    0.006711115568908869f,  -0.999977480210339940f, 0.006519372166339549f,\n    -0.999978748667468830f, 0.006327628524071549f,  -0.999979980358237650f,\n    0.006135884649154515f,  -0.999981175282601110f, 0.005944140548638765f,\n    -0.999982333440515350f, 0.005752396229573737f,  -0.999983454831937730f,\n    0.005560651699009764f,  -0.999984539456826970f, 0.005368906963996303f,\n    -0.999985587315143200f, 0.005177162031583702f,  -0.999986598406848000f,\n    0.004985416908821652f,  -0.999987572731904080f, 0.004793671602759852f,\n    -0.999988510290275690f, 0.004601926120448672f,  -0.999989411081928400f,\n    0.004410180468937601f,  -0.999990275106828920f, 0.004218434655277024f,\n    -0.999991102364945590f, 0.004026688686516664f,  -0.999991892856248010f,\n    0.003834942569706248f,  -0.999992646580707190f, 0.003643196311896179f,\n    -0.999993363538295150f, 0.003451449920135975f,  -0.999994043728985820f,\n    0.003259703401476044f,  -0.999994687152754080f, 0.003067956762966138f,\n    -0.999995293809576190f, 0.002876210011656010f,  -0.999995863699429940f,\n    0.002684463154596083f,  -0.999996396822294350f, 0.002492716198835898f,\n    -0.999996893178149880f, 0.002300969151425887f,  -0.999997352766978210f,\n    0.002109222019415816f,  -0.999997775588762350f, 0.001917474809855460f,\n    -0.999998161643486980f, 0.001725727529795258f,  -0.999998510931137790f,\n    0.001533980186284766f,  -0.999998823451701880f, 0.001342232786374430f,\n    -0.999999099205167830f, 0.001150485337113809f,  -0.999999338191525530f,\n    0.000958737845553352f,  -0.999999540410766110f, 0.000766990318742846f,\n    -0.999999705862882230f, 0.000575242763732077f,  -0.999999834547867670f,\n    0.000383495187571497f,  -0.999999926465717890f, 0.000191747597310674f,\n    -0.999999981616429330f};\n\n/**\n  @par\n  cosFactor tables are generated using the formula : 
cos_factors[n] = 2 *\n  cos((2n+1)*pi/(4*N))
\n  @par\n  C command to generate the table\n  @par\n  
 for(i = 0; i< N; i++)\n  {\n     cos_factors[i]= 2 * cos((2*i+1)*c/2);\n  } 
\n  @par\n  where N is the number of factors to generate and c\n  is pi/(2*N)\n*/\nstatic const float32_t cos_factors_128[128] = {\n    0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f,\n    0.999077727752645360f, 0.998475580573294770f, 0.997723066644191640f,\n    0.996820299291165670f, 0.995767414467659820f, 0.994564570734255420f,\n    0.993211949234794500f, 0.991709753669099530f, 0.990058210262297120f,\n    0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f,\n    0.981963869109555240f, 0.979569765685440520f, 0.977028142657754390f,\n    0.974339382785575860f, 0.971503890986251780f, 0.968522094274417380f,\n    0.965394441697689400f, 0.962121404269041580f, 0.958703474895871600f,\n    0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f,\n    0.943593458161960390f, 0.939459223602189920f, 0.935183509938947610f,\n    0.930766961078983710f, 0.926210242138311380f, 0.921514039342042010f,\n    0.916679059921042700f, 0.911706032005429880f, 0.906595704514915330f,\n    0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f,\n    0.884797098430937790f, 0.879012226428633530f, 0.873094978418290090f,\n    0.867046245515692650f, 0.860866938637767310f, 0.854557988365400530f,\n    0.848120344803297230f, 0.841554977436898440f, 0.834862874986380010f,\n    0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,\n    0.806847553543799330f, 0.799537269107905010f, 0.792106577300212390f,\n    0.784556597155575240f, 0.776888465673232440f, 0.769103337645579700f,\n    0.761202385484261780f, 0.753186799043612520f, 0.745057785441466060f,\n    0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,\n    0.711432195745216430f, 0.702754744457225300f, 0.693971460889654000f,\n    0.685083667772700360f, 0.676092703575316030f, 0.666999922303637470f,\n    0.657806693297078640f, 0.648514401022112550f, 0.639124444863775730f,\n    0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,\n    0.600616479383868970f, 0.590759701858874280f, 0.580813958095764530f,\n    0.570780745886967370f, 0.560661576197336030f, 0.550457972936604810f,\n    0.540171472729892970f, 0.529803624686294830f, 0.519355990165589530f,\n    0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,\n    0.476799230063322250f, 0.465976495767966130f, 0.455083587126343840f,\n    0.444122144570429260f, 0.433093818853152010f, 0.422000270799799790f,\n    0.410843171057903910f, 0.399624199845646790f, 0.388345046698826300f,\n    0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,\n    0.342660717311994380f, 0.331106305759876430f, 0.319502030816015750f,\n    0.307849640041534980f, 0.296150888243623960f, 0.284407537211271820f,\n    0.272621355449948980f, 0.260794117915275570f, 0.248927605745720260f,\n    0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,\n    0.201104634842091960f, 0.189068664149806280f, 0.177004220412148860f,\n    0.164913120489970090f, 0.152797185258443410f, 0.140658239332849240f,\n    0.128498110793793220f, 0.116318630911904880f, 0.104121633872054730f,\n    0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,\n    0.055195244349690031f, 0.042938256934940959f, 0.030674803176636581f,\n    0.018406729905804820f, 0.006135884649154515f};\n\nstatic const float32_t cos_factors_512[512] = {\n    0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f,\n    0.999942349676023910f, 0.999904701082852900f, 0.999857641005823860f,\n    0.999801169887884260f, 0.999735288260561680f, 0.999659996743959220f,\n    0.999575296046749220f, 0.999481186966166950f, 0.999377670388002850f,\n    0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,\n    0.998869549914283560f, 0.998719012233872940f, 0.998559074229759310f,\n    0.998389737407340160f, 0.998211003360478190f, 0.998022873771486240f,\n    0.997825350411111640f, 0.997618435138519550f, 0.997402129901275300f,\n    0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,\n    0.996443051350042630f, 0.996179828595696980f, 0.995907229417411720f,\n    0.995625256380994310f, 0.995333912140482280f, 0.995033199438118630f,\n    0.994723121104325700f, 0.994403680057679100f, 0.994074879304879370f,\n    0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,\n    0.992666142448948020f, 0.992290591348257370f, 0.991905700430609330f,\n    0.991511473318743900f, 0.991107913723276890f, 0.990695025442664630f,\n    0.990272812363169110f, 0.989841278458820530f, 0.989400427791380380f,\n    0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,\n    0.987543941794359230f, 0.987056571305750970f, 0.986559910264775410f,\n    0.986053963346195440f, 0.985538735312176060f, 0.985014231012239840f,\n    0.984480455383220930f, 0.983937413449218920f, 0.983385110321551180f,\n    0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,\n    0.981083391150486710f, 0.980484861773469380f, 0.979877103699517640f,\n    0.979260122649082020f, 0.978633924429423210f, 0.977998514934557140f,\n    0.977353900145199960f, 0.976700086128711840f, 0.976037079039039020f,\n    0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,\n    0.973293246054698250f, 0.972584368934732210f, 0.971866337480279400f,\n    0.971139158449725090f, 0.970402838687555500f, 0.969657385124292450f,\n    0.968902804776428870f, 0.968139104746362440f, 0.967366292222328510f,\n    0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,\n    0.964184063951745830f, 0.963365799780954050f, 0.962538468044359160f,\n    0.961702076529122540f, 0.960856633107679660f, 0.960002145737665960f,\n    0.959138622461841890f, 0.958266071408017670f, 0.957384500788975860f,\n    0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,\n    0.953768189885990330f, 0.952841647601198720f, 0.951906136807932350f,\n    0.950961666311575080f, 0.950008245001843000f, 0.949045881852700560f,\n    0.948074585922276230f, 0.947094366352777220f, 0.946105232370403450f,\n    0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,\n    0.942059739771017310f, 0.941026175050889260f, 0.939983753034014050f,\n    0.938932483532064600f, 0.937872376439989890f, 0.936803441735921560f,\n    0.935725689481080370f, 0.934639129819680780f, 0.933543772978836170f,\n    0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,\n    0.929074581259315860f, 0.927935394822617890f, 0.926787474304581750f,\n    0.925630830509872720f, 0.924465474325262600f, 0.923291416719527640f,\n    0.922108668743345180f, 0.920917241529189520f, 0.919717146291227360f,\n    0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,\n    0.914830312237946200f, 0.913587047945250810f, 0.912335184623322750f,\n    0.911074734055176360f, 0.909805708104652220f, 0.908528118716306120f,\n    0.907241977915295820f, 0.905947297807268460f, 0.904644090578246240f,\n    0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,\n    0.899346236979341570f, 0.898000579740739880f, 0.896646470178680150f,\n    0.895283921038557580f, 0.893912945145203250f, 0.892533555402764580f,\n    0.891145764794583180f, 0.889749586383072780f, 0.888345033309596350f,\n    0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,\n    0.882643339979562790f, 0.881197113471222090f, 0.879742592800047410f,\n    0.878279791656541580f, 0.876808723809145650f, 0.875329403104110890f,\n    0.873841843465366860f, 0.872346058894391540f, 0.870842063470078980f,\n    0.869329871348606840f, 0.867809496763303320f, 0.866280954024512990f,\n    0.864744257519462380f, 0.863199421712124160f, 0.861646461143081300f,\n    0.860085390429390140f, 0.858516224264442740f, 0.856938977417828760f,\n    0.855353664735196030f, 0.853760301138111410f, 0.852158901623919830f,\n    0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,\n    0.845673246987299070f, 0.844031895490066410f, 0.842382599643185850f,\n    0.840725374970458070f, 0.839060237070312740f, 0.837387201615661940f,\n    0.835706284353752600f, 0.834017501106018130f, 0.832320867767929680f,\n    0.830616400308846310f, 0.828904114771864870f, 0.827184027273669130f,\n    0.825456154004377550f, 0.823720511227391430f, 0.821977115279241550f,\n    0.820225982569434690f, 0.818467129580298660f, 0.816700572866827850f,\n    0.814926329056526620f, 0.813144414849253590f, 0.811354847017063730f,\n    0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,\n    0.804120377398265810f, 0.802292795538115720f, 0.800457662192622820f,\n    0.798614994634760820f, 0.796764810208418830f, 0.794907126328237010f,\n    0.793041960479443640f, 0.791169330217690200f, 0.789289253168885650f,\n    0.787401747029031430f, 0.785506829564053930f, 0.783604518609638200f,\n    0.781694832071059390f, 0.779777787923014550f, 0.777853404209453150f,\n    0.775921699043407690f, 0.773982690606822900f, 0.772036397150384520f,\n    0.770082836993347900f, 0.768122028523365420f, 0.766153990196312920f,\n    0.764178740536116670f, 0.762196298134578900f, 0.760206681651202420f,\n    0.758209909813015280f, 0.756206001414394540f, 0.754194975316889170f,\n    0.752176850449042810f, 0.750151645806215070f, 0.748119380450403600f,\n    0.746080073510063780f, 0.744033744179929290f, 0.741980411720831070f,\n    0.739920095459516200f, 0.737852814788465980f, 0.735778589165713590f,\n    0.733697438114660370f, 0.731609381223892630f, 0.729514438146997010f,\n    0.727412628602375770f, 0.725303972373060770f, 0.723188489306527460f,\n    0.721066199314508110f, 0.718937122372804490f, 0.716801278521099540f,\n    0.714658687862769090f, 0.712509370564692320f, 0.710353346857062420f,\n    0.708190637033195400f, 0.706021261449339740f, 0.703845240524484940f,\n    0.701662594740168570f, 0.699473344640283770f, 0.697277510830886630f,\n    0.695075113980000880f, 0.692866174817424740f, 0.690650714134534720f,\n    0.688428752784090550f, 0.686200311680038700f, 0.683965411797315510f,\n    0.681724074171649820f, 0.679476319899365080f, 0.677222170137180450f,\n    0.674961646102012040f, 0.672694769070772970f, 0.670421560380173090f,\n    0.668142041426518560f, 0.665856233665509720f, 0.663564158612039880f,\n    0.661265837839992270f, 0.658961292982037320f, 0.656650545729429050f,\n    0.654333617831800550f, 0.652010531096959500f, 0.649681307390683190f,\n    0.647345968636512060f, 0.645004536815544040f, 0.642657033966226860f,\n    0.640303482184151670f, 0.637943903621844170f, 0.635578320488556230f,\n    0.633206755050057190f, 0.630829229628424470f, 0.628445766601832710f,\n    0.626056388404343520f, 0.623661117525694640f, 0.621259976511087660f,\n    0.618852987960976320f, 0.616440174530853650f, 0.614021558931038490f,\n    0.611597163926462020f, 0.609167012336453210f, 0.606731127034524480f,\n    0.604289530948156070f, 0.601842247058580030f, 0.599389298400564540f,\n    0.596930708062196500f, 0.594466499184664540f, 0.591996694962040990f,\n    0.589521318641063940f, 0.587040393520918080f, 0.584553942953015330f,\n    0.582061990340775550f, 0.579564559139405740f, 0.577061672855679550f,\n    0.574553355047715760f, 0.572039629324757050f, 0.569520519346947250f,\n    0.566996048825108680f, 0.564466241520519500f, 0.561931121244689470f,\n    0.559390711859136140f, 0.556845037275160100f, 0.554294121453620110f,\n    0.551737988404707450f, 0.549176662187719770f, 0.546610166910834860f,\n    0.544038526730883930f, 0.541461765853123560f, 0.538879908531008420f,\n    0.536292979065963180f, 0.533701001807152960f, 0.531104001151255000f,\n    0.528502001542228480f, 0.525895027471084740f, 0.523283103475656430f,\n    0.520666254140367270f, 0.518044504095999340f, 0.515417878019463150f,\n    0.512786400633563070f, 0.510150096706766700f, 0.507508991052970870f,\n    0.504863108531267480f, 0.502212474045710900f, 0.499557112545081890f,\n    0.496897049022654640f, 0.494232308515959730f, 0.491562916106550060f,\n    0.488888896919763230f, 0.486210276124486530f, 0.483527078932918740f,\n    0.480839330600333900f, 0.478147056424843120f, 0.475450281747155870f,\n    0.472749031950342900f, 0.470043332459595620f, 0.467333208741988530f,\n    0.464618686306237820f, 0.461899790702462840f, 0.459176547521944150f,\n    0.456448982396883860f, 0.453717121000163930f, 0.450980989045103810f,\n    0.448240612285220000f, 0.445496016513981740f, 0.442747227564570130f,\n    0.439994271309633260f, 0.437237173661044200f, 0.434475960569655710f,\n    0.431710658025057370f, 0.428941292055329550f, 0.426167888726799620f,\n    0.423390474143796100f, 0.420609074448402510f, 0.417823715820212380f,\n    0.415034424476081630f, 0.412241226669883000f, 0.409444148692257590f,\n    0.406643216870369140f, 0.403838457567654130f, 0.401029897183575790f,\n    0.398217562153373620f, 0.395401478947816300f, 0.392581674072951530f,\n    0.389758174069856410f, 0.386931005514388690f, 0.384100195016935040f,\n    0.381265769222162490f, 0.378427754808765620f, 0.375586178489217330f,\n    0.372741067009515810f, 0.369892447148934270f, 0.367040345719767240f,\n    0.364184789567079840f, 0.361325805568454340f, 0.358463420633736540f,\n    0.355597661704783960f, 0.352728555755210730f, 0.349856129790135030f,\n    0.346980410845923680f, 0.344101425989938980f, 0.341219202320282410f,\n    0.338333766965541290f, 0.335445147084531660f, 0.332553369866044220f,\n    0.329658462528587550f, 0.326760452320131790f, 0.323859366517852960f,\n    0.320955232427875210f, 0.318048077385015060f, 0.315137928752522440f,\n    0.312224813921825050f, 0.309308760312268780f, 0.306389795370861080f,\n    0.303467946572011370f, 0.300543241417273400f, 0.297615707435086310f,\n    0.294685372180514330f, 0.291752263234989370f, 0.288816408206049480f,\n    0.285877834727080730f, 0.282936570457055390f, 0.279992643080273380f,\n    0.277046080306099950f, 0.274096909868706330f, 0.271145159526808070f,\n    0.268190857063403180f, 0.265234030285511900f, 0.262274707023913590f,\n    0.259312915132886350f, 0.256348682489942910f, 0.253382036995570270f,\n    0.250413006572965280f, 0.247441619167773440f, 0.244467902747824210f,\n    0.241491885302869300f, 0.238513594844318500f, 0.235533059404975460f,\n    0.232550307038775330f, 0.229565365820518870f, 0.226578263845610110f,\n    0.223589029229790020f, 0.220597690108873650f, 0.217604274638483670f,\n    0.214608810993786920f, 0.211611327369227610f, 0.208611851978263460f,\n    0.205610413053099320f, 0.202607038844421110f, 0.199601757621131050f,\n    0.196594597670080220f, 0.193585587295803750f, 0.190574754820252800f,\n    0.187562128582529740f, 0.184547736938619640f, 0.181531608261125130f,\n    0.178513770938997590f, 0.175494253377271400f, 0.172473083996796030f,\n    0.169450291233967930f, 0.166425903540464220f, 0.163399949382973230f,\n    0.160372457242928400f, 0.157343455616238280f, 0.154312973013020240f,\n    0.151281037957330250f, 0.148247678986896200f, 0.145212924652847520f,\n    0.142176803519448000f, 0.139139344163826280f, 0.136100575175706200f,\n    0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,\n    0.123932975118512200f, 0.120888087235777220f, 0.117842061508325020f,\n    0.114794926606510250f, 0.111746711211126660f, 0.108697444013138670f,\n    0.105647153713410700f, 0.102595869022436280f, 0.099543618660069444f,\n    0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,\n    0.087325535206192226f, 0.084268887593324127f, 0.081211446809592386f,\n    0.078153241632794315f, 0.075094300847921291f, 0.072034653246889416f,\n    0.068974327628266732f, 0.065913352797003930f, 0.062851757564161420f,\n    0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,\n    0.050599749036899337f, 0.047535484156959261f, 0.044470771854938744f,\n    0.041405640977076712f, 0.038340120373552791f, 0.035274238898213947f,\n    0.032208025408304704f, 0.029141508764193740f, 0.026074717829104040f,\n    0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,\n    0.013805388528060349f, 0.010737659167264572f, 0.007669828739531077f,\n    0.004601926120448672f, 0.001533980186284766f};\n\nstatic const float32_t cos_factors_2048[2048] = {\n    0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,\n    0.999996396822294350f, 0.999994043728985820f, 0.999991102364945590f,\n    0.999987572731904080f, 0.999983454831937730f, 0.999978748667468830f,\n    0.999973454241265940f, 0.999967571556443780f, 0.999961100616462820f,\n    0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,\n    0.999929334386276070f, 0.999919922234522750f, 0.999909921855641540f,\n    0.999899333255515390f, 0.999888156440373320f, 0.999876391416790410f,\n    0.999864038191687680f, 0.999851096772332190f, 0.999837567166337090f,\n    0.999823449381661570f, 0.999808743426610520f, 0.999793449309835270f,\n    0.999777567040332940f, 0.999761096627446610f, 0.999744038080865430f,\n    0.999726391410624470f, 0.999708156627104880f, 0.999689333741033640f,\n    0.999669922763483760f, 0.999649923705874240f, 0.999629336579970110f,\n    0.999608161397882110f, 0.999586398172067070f, 0.999564046915327740f,\n    0.999541107640812940f, 0.999517580362016990f, 0.999493465092780590f,\n    0.999468761847290050f, 0.999443470640077770f, 0.999417591486021720f,\n    0.999391124400346050f, 0.999364069398620550f, 0.999336426496761240f,\n    0.999308195711029470f, 0.999279377058032710f, 0.999249970554724420f,\n    0.999219976218403530f, 0.999189394066714920f, 0.999158224117649430f,\n    0.999126466389543390f, 0.999094120901079070f, 0.999061187671284600f,\n    0.999027666719533690f, 0.998993558065545680f, 0.998958861729386080f,\n    0.998923577731465780f, 0.998887706092541290f, 0.998851246833715180f,\n    0.998814199976435390f, 0.998776565542495610f, 0.998738343554035230f,\n    0.998699534033539280f, 0.998660137003838490f, 0.998620152488108870f,\n    0.998579580509872500f, 0.998538421092996730f, 0.998496674261694640f,\n    0.998454340040524800f, 0.998411418454391300f, 0.998367909528543820f,\n    0.998323813288577560f, 0.998279129760433200f, 0.998233858970396850f,\n    0.998188000945100300f, 0.998141555711520520f, 0.998094523296980010f,\n    0.998046903729146840f, 0.997998697036034390f, 0.997949903246001190f,\n    0.997900522387751620f, 0.997850554490335110f, 0.997799999583146470f,\n    0.997748857695925690f, 0.997697128858758500f, 0.997644813102075420f,\n    0.997591910456652630f, 0.997538420953611340f, 0.997484344624417930f,\n    0.997429681500884180f, 0.997374431615167150f, 0.997318594999768600f,\n    0.997262171687536170f, 0.997205161711661850f, 0.997147565105683480f,\n    0.997089381903483400f, 0.997030612139289450f, 0.996971255847674320f,\n    0.996911313063555740f, 0.996850783822196610f, 0.996789668159204560f,\n    0.996727966110532490f, 0.996665677712478160f, 0.996602803001684130f,\n    0.996539342015137940f, 0.996475294790172160f, 0.996410661364464100f,\n    0.996345441776035900f, 0.996279636063254650f, 0.996213244264832040f,\n    0.996146266419824620f, 0.996078702567633980f, 0.996010552748005870f,\n    0.995941817001031350f, 0.995872495367145730f, 0.995802587887129160f,\n    0.995732094602106430f, 0.995661015553546910f, 0.995589350783264600f,\n    0.995517100333418110f, 0.995444264246510340f, 0.995370842565388990f,\n    0.995296835333246090f, 0.995222242593618360f, 0.995147064390386470f,\n    0.995071300767776170f, 0.994994951770357020f, 0.994918017443043200f,\n    0.994840497831093180f, 0.994762392980109930f, 0.994683702936040250f,\n    0.994604427745175660f, 0.994524567454151740f, 0.994444122109948040f,\n    0.994363091759888570f, 0.994281476451641550f, 0.994199276233218910f,\n    0.994116491152977070f, 0.994033121259616400f, 0.993949166602181130f,\n    0.993864627230059750f, 0.993779503192984580f, 0.993693794541031790f,\n    0.993607501324621610f, 0.993520623594518090f, 0.993433161401829360f,\n    0.993345114798006910f, 0.993256483834846440f, 0.993167268564487230f,\n    0.993077469039412300f, 0.992987085312448390f, 0.992896117436765980f,\n    0.992804565465879140f, 0.992712429453645460f, 0.992619709454266140f,\n    0.992526405522286100f, 0.992432517712593660f, 0.992338046080420420f,\n    0.992242990681341700f, 0.992147351571276090f, 0.992051128806485720f,\n    0.991954322443575950f, 0.991856932539495470f, 0.991758959151536110f,\n    0.991660402337333210f, 0.991561262154865290f, 0.991461538662453790f,\n    0.991361231918763460f, 0.991260341982802440f, 0.991158868913921350f,\n    0.991056812771814340f, 0.990954173616518500f, 0.990850951508413620f,\n    0.990747146508222710f, 0.990642758677011570f, 0.990537788076188750f,\n    0.990432234767505970f, 0.990326098813057330f, 0.990219380275280000f,\n    0.990112079216953770f, 0.990004195701200910f, 0.989895729791486660f,\n    0.989786681551618640f, 0.989677051045747210f, 0.989566838338365120f,\n    0.989456043494307710f, 0.989344666578752640f, 0.989232707657220050f,\n    0.989120166795572690f, 0.989007044060015270f, 0.988893339517095130f,\n    0.988779053233701520f, 0.988664185277066230f, 0.988548735714763200f,\n    0.988432704614708340f, 0.988316092045159690f, 0.988198898074717610f,\n    0.988081122772324070f, 0.987962766207263420f, 0.987843828449161740f,\n    0.987724309567986960f, 0.987604209634049160f, 0.987483528717999710f,\n    0.987362266890832400f, 0.987240424223882250f, 0.987118000788826280f,\n    0.986994996657682980f, 0.986871411902812470f, 0.986747246596916590f,\n    0.986622500813038480f, 0.986497174624562880f, 0.986371268105216030f,\n    0.986244781329065460f, 0.986117714370520090f, 0.985990067304330140f,\n    0.985861840205586980f, 0.985733033149723490f, 0.985603646212513400f,\n    0.985473679470071810f, 0.985343132998854790f, 0.985212006875659350f,\n    0.985080301177623800f, 0.984948015982227030f, 0.984815151367289140f,\n    0.984681707410970940f, 0.984547684191773960f, 0.984413081788540700f,\n    0.984277900280454370f, 0.984142139747038570f, 0.984005800268157870f,\n    0.983868881924017220f, 0.983731384795162090f, 0.983593308962478650f,\n    0.983454654507193270f, 0.983315421510872810f, 0.983175610055424420f,\n    0.983035220223095640f, 0.982894252096474070f, 0.982752705758487830f,\n    0.982610581292404750f, 0.982467878781833170f, 0.982324598310721280f,\n    0.982180739963357090f, 0.982036303824369020f, 0.981891289978725100f,\n    0.981745698511732990f, 0.981599529509040720f, 0.981452783056635520f,\n    0.981305459240844670f, 0.981157558148334830f, 0.981009079866112630f,\n    0.980860024481523870f, 0.980710392082253970f, 0.980560182756327840f,\n    0.980409396592109910f, 0.980258033678303550f, 0.980106094103951770f,\n    0.979953577958436740f, 0.979800485331479790f, 0.979646816313141210f,\n    0.979492570993820810f, 0.979337749464256780f, 0.979182351815526930f,\n    0.979026378139047580f, 0.978869828526574120f, 0.978712703070200420f,\n    0.978555001862359550f, 0.978396724995823090f, 0.978237872563701090f,\n    0.978078444659442380f, 0.977918441376834370f, 0.977757862810002760f,\n    0.977596709053411890f, 0.977434980201864260f, 0.977272676350500860f,\n    0.977109797594800880f, 0.976946344030581670f, 0.976782315753998650f,\n    0.976617712861545640f, 0.976452535450054060f, 0.976286783616693630f,\n    0.976120457458971910f, 0.975953557074734300f, 0.975786082562163930f,\n    0.975618034019781750f, 0.975449411546446380f, 0.975280215241354220f,\n    0.975110445204038890f, 0.974940101534371830f, 0.974769184332561770f,\n    0.974597693699155050f, 0.974425629735034990f, 0.974252992541422500f,\n    0.974079782219875680f, 0.973905998872289570f, 0.973731642600896400f,\n    0.973556713508265560f, 0.973381211697303290f, 0.973205137271252800f,\n    0.973028490333694210f, 0.972851270988544180f, 0.972673479340056430f,\n    0.972495115492821190f, 0.972316179551765300f, 0.972136671622152230f,\n    0.971956591809581720f, 0.971775940219990140f, 0.971594716959650160f,\n    0.971412922135170940f, 0.971230555853497380f, 0.971047618221911100f,\n    0.970864109348029470f, 0.970680029339806130f, 0.970495378305530560f,\n    0.970310156353828110f, 0.970124363593660280f, 0.969938000134323960f,\n    0.969751066085452140f, 0.969563561557013180f, 0.969375486659311280f,\n    0.969186841502985950f, 0.968997626199012420f, 0.968807840858700970f,\n    0.968617485593697540f, 0.968426560515983190f, 0.968235065737874320f,\n    0.968043001372022260f, 0.967850367531413620f, 0.967657164329369880f,\n    0.967463391879547550f, 0.967269050295937790f, 0.967074139692867040f,\n    0.966878660184995910f, 0.966682611887320080f, 0.966485994915169840f,\n    0.966288809384209690f, 0.966091055410438830f, 0.965892733110190860f,\n    0.965693842600133690f, 0.965494383997269500f, 0.965294357418934660f,\n    0.965093762982799590f, 0.964892600806868890f, 0.964690871009481030f,\n    0.964488573709308410f, 0.964285709025357480f, 0.964082277076968140f,\n    0.963878277983814200f, 0.963673711865903230f, 0.963468578843575950f,\n    0.963262879037507070f, 0.963056612568704340f, 0.962849779558509030f,\n    0.962642380128595710f, 0.962434414400972100f, 0.962225882497979020f,\n    0.962016784542290560f, 0.961807120656913540f, 0.961596890965187860f,\n    0.961386095590786250f, 0.961174734657714080f, 0.960962808290309780f,\n    0.960750316613243950f, 0.960537259751520050f, 0.960323637830473920f,\n    0.960109450975773940f, 0.959894699313420530f, 0.959679382969746750f,\n    0.959463502071417510f, 0.959247056745430090f, 0.959030047119113660f,\n    0.958812473320129310f, 0.958594335476470220f, 0.958375633716461170f,\n    0.958156368168758820f, 0.957936538962351420f, 0.957716146226558870f,\n    0.957495190091032570f, 0.957273670685755200f, 0.957051588141040970f,\n    0.956828942587535370f, 0.956605734156215080f, 0.956381962978387730f,\n    0.956157629185692140f, 0.955932732910098280f, 0.955707274283906560f,\n    0.955481253439748770f, 0.955254670510586990f, 0.955027525629714160f,\n    0.954799818930753720f, 0.954571550547659630f, 0.954342720614716480f,\n    0.954113329266538800f, 0.953883376638071770f, 0.953652862864590500f,\n    0.953421788081700310f, 0.953190152425336670f, 0.952957956031764700f,\n    0.952725199037579570f, 0.952491881579706320f, 0.952258003795399600f,\n    0.952023565822243570f, 0.951788567798152130f, 0.951553009861368590f,\n    0.951316892150465550f, 0.951080214804345010f, 0.950842977962238160f,\n    0.950605181763705340f, 0.950366826348635780f, 0.950127911857248100f,\n    0.949888438430089300f, 0.949648406208035480f, 0.949407815332291570f,\n    0.949166665944390700f, 0.948924958186195160f, 0.948682692199895090f,\n    0.948439868128009620f, 0.948196486113385580f, 0.947952546299198670f,\n    0.947708048828952100f, 0.947462993846477700f, 0.947217381495934820f,\n    0.946971211921810880f, 0.946724485268921170f, 0.946477201682408680f,\n    0.946229361307743820f, 0.945980964290724760f, 0.945732010777477150f,\n    0.945482500914453740f, 0.945232434848435000f, 0.944981812726528150f,\n    0.944730634696167800f, 0.944478900905115550f, 0.944226611501459810f,\n    0.943973766633615980f, 0.943720366450326200f, 0.943466411100659320f,\n    0.943211900734010620f, 0.942956835500102120f, 0.942701215548981900f,\n    0.942445041031024890f, 0.942188312096931770f, 0.941931028897729620f,\n    0.941673191584771360f, 0.941414800309736340f, 0.941155855224629190f,\n    0.940896356481780830f, 0.940636304233847590f, 0.940375698633811540f,\n    0.940114539834980280f, 0.939852827990986680f, 0.939590563255789270f,\n    0.939327745783671400f, 0.939064375729241950f, 0.938800453247434770f,\n    0.938535978493508560f, 0.938270951623047190f, 0.938005372791958840f,\n    0.937739242156476970f, 0.937472559873159250f, 0.937205326098887960f,\n    0.936937540990869900f, 0.936669204706636170f, 0.936400317404042060f,\n    0.936130879241267030f, 0.935860890376814640f, 0.935590350969512370f,\n    0.935319261178511610f, 0.935047621163287430f, 0.934775431083638700f,\n    0.934502691099687870f, 0.934229401371880820f, 0.933955562060986730f,\n    0.933681173328098410f, 0.933406235334631520f, 0.933130748242325230f,\n    0.932854712213241120f, 0.932578127409764420f, 0.932300993994602760f,\n    0.932023312130786490f, 0.931745081981668720f, 0.931466303710925090f,\n    0.931186977482553750f, 0.930907103460875130f, 0.930626681810531760f,\n    0.930345712696488470f, 0.930064196284032360f, 0.929782132738772190f,\n    0.929499522226638560f, 0.929216364913884040f, 0.928932660967082820f,\n    0.928648410553130520f, 0.928363613839244370f, 0.928078270992963140f,\n    0.927792382182146320f, 0.927505947574975180f, 0.927218967339951790f,\n    0.926931441645899130f, 0.926643370661961230f, 0.926354754557602860f,\n    0.926065593502609310f, 0.925775887667086740f, 0.925485637221461490f,\n    0.925194842336480530f, 0.924903503183210910f, 0.924611619933039970f,\n    0.924319192757675160f, 0.924026221829143850f, 0.923732707319793290f,\n    0.923438649402290370f, 0.923144048249621930f, 0.922848904035094120f,\n    0.922553216932332830f, 0.922256987115283030f, 0.921960214758209220f,\n    0.921662900035694730f, 0.921365043122642340f, 0.921066644194273640f,\n    0.920767703426128790f, 0.920468220994067110f, 0.920168197074266340f,\n    0.919867631843222950f, 0.919566525477751530f, 0.919264878154985370f,\n    0.918962690052375630f, 0.918659961347691900f, 0.918356692219021720f,\n    0.918052882844770380f, 0.917748533403661250f, 0.917443644074735220f,\n    0.917138215037350710f, 0.916832246471183890f, 0.916525738556228210f,\n    0.916218691472794220f, 0.915911105401509880f, 0.915602980523320230f,\n    0.915294317019487050f, 0.914985115071589310f, 0.914675374861522390f,\n    0.914365096571498560f, 0.914054280384046570f, 0.913742926482011390f,\n    0.913431035048554720f, 0.913118606267154240f, 0.912805640321603500f,\n    0.912492137396012650f, 0.912178097674807180f, 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0.225457549272768540f,\n    0.224710240344049570f, 0.223962799224085520f, 0.223215226352576960f,\n    0.222467522169301990f, 0.221719687114115240f, 0.220971721626949060f,\n    0.220223626147812460f, 0.219475401116790340f, 0.218727046974044600f,\n    0.217978564159812290f, 0.217229953114406790f, 0.216481214278216900f,\n    0.215732348091705940f, 0.214983354995412820f, 0.214234235429951100f,\n    0.213484989836008080f, 0.212735618654345870f, 0.211986122325800410f,\n    0.211236501291280710f, 0.210486755991769890f, 0.209736886868323370f,\n    0.208986894362070070f, 0.208236778914211470f, 0.207486540966020700f,\n    0.206736180958843660f, 0.205985699334098050f, 0.205235096533272380f,\n    0.204484372997927180f, 0.203733529169694010f, 0.202982565490274460f,\n    0.202231482401441620f, 0.201480280345037820f, 0.200728959762976140f,\n    0.199977521097239290f, 0.199225964789878890f, 0.198474291283016360f,\n    0.197722501018842030f, 0.196970594439614370f, 0.196218571987660850f,\n    0.195466434105377090f, 0.194714181235225990f, 0.193961813819739010f,\n    0.193209332301514080f, 0.192456737123216840f, 0.191704028727579940f,\n    0.190951207557401860f, 0.190198274055548120f, 0.189445228664950340f,\n    0.188692071828605260f, 0.187938803989575850f, 0.187185425590990440f,\n    0.186431937076041640f, 0.185678338887987790f, 0.184924631470150870f,\n    0.184170815265917720f, 0.183416890718739230f, 0.182662858272129360f,\n    0.181908718369666160f, 0.181154471454990920f, 0.180400117971807270f,\n    0.179645658363882100f, 0.178891093075044830f, 0.178136422549186320f,\n    0.177381647230260200f, 0.176626767562280960f, 0.175871783989325040f,\n    0.175116696955530060f, 0.174361506905093830f, 0.173606214282275410f,\n    0.172850819531394200f, 0.172095323096829040f, 0.171339725423019260f,\n    0.170584026954463700f, 0.169828228135719880f, 0.169072329411405180f,\n    0.168316331226194910f, 0.167560234024823590f, 0.166804038252083870f,\n    0.166047744352825850f, 0.165291352771957970f, 0.164534863954446110f,\n    0.163778278345312690f, 0.163021596389637810f, 0.162264818532558110f,\n    0.161507945219266150f, 0.160750976895011390f, 0.159993914005098350f,\n    0.159236756994887850f, 0.158479506309796100f, 0.157722162395293690f,\n    0.156964725696906750f, 0.156207196660216040f, 0.155449575730855880f,\n    0.154691863354515400f, 0.153934059976937460f, 0.153176166043917870f,\n    0.152418182001306500f, 0.151660108295005400f, 0.150901945370970040f,\n    0.150143693675208330f, 0.149385353653779810f, 0.148626925752796540f,\n    0.147868410418422360f, 0.147109808096871850f, 0.146351119234411440f,\n    0.145592344277358450f, 0.144833483672080240f, 0.144074537864995330f,\n    0.143315507302571590f, 0.142556392431327340f, 0.141797193697830530f,\n    0.141037911548697770f, 0.140278546430595420f, 0.139519098790238600f,\n    0.138759569074390380f, 0.137999957729862760f, 0.137240265203515700f,\n    0.136480491942256310f, 0.135720638393040080f, 0.134960705002868830f,\n    0.134200692218792020f, 0.133440600487905820f, 0.132680430257352130f,\n    0.131920181974319760f, 0.131159856086043410f, 0.130399453039802740f,\n    0.129638973282923540f, 0.128878417262776660f, 0.128117785426777150f,\n    0.127357078222385570f, 0.126596296097105960f, 0.125835439498487020f,\n    0.125074508874121300f, 0.124313504671644300f, 0.123552427338735370f,\n    0.122791277323116900f, 0.122030055072553410f, 0.121268761034852550f,\n    0.120507395657864240f, 0.119745959389479630f, 0.118984452677632520f,\n    0.118222875970297250f, 0.117461229715489990f, 0.116699514361267840f,\n    0.115937730355727850f, 0.115175878147008180f, 0.114413958183287050f,\n    0.113651970912781920f, 0.112889916783750470f, 0.112127796244489750f,\n    0.111365609743335190f, 0.110603357728661910f, 0.109841040648882680f,\n    0.109078658952449240f, 0.108316213087851300f, 0.107553703503615710f,\n    0.106791130648307380f, 0.106028494970528530f, 0.105265796918917650f,\n    0.104503036942150550f, 0.103740215488939480f, 0.102977333008032250f,\n    0.102214389948213370f, 0.101451386758302160f, 0.100688323887153970f,\n    0.099925201783659226f, 0.099162020896742573f, 0.098398781675363881f,\n    0.097635484568517339f, 0.096872130025230527f, 0.096108718494565468f,\n    0.095345250425617742f, 0.094581726267515473f, 0.093818146469420494f,\n    0.093054511480527333f, 0.092290821750062355f, 0.091527077727284981f,\n    0.090763279861485704f, 0.089999428601987341f, 0.089235524398144139f,\n    0.088471567699340822f, 0.087707558954993645f, 0.086943498614549489f,\n    0.086179387127484922f, 0.085415224943307277f, 0.084651012511553700f,\n    0.083886750281790226f, 0.083122438703613077f, 0.082358078226646619f,\n    0.081593669300544638f, 0.080829212374989468f, 0.080064707899690932f,\n    0.079300156324387569f, 0.078535558098845590f, 0.077770913672857989f,\n    0.077006223496245585f, 0.076241488018856149f, 0.075476707690563416f,\n    0.074711882961268378f, 0.073947014280897269f, 0.073182102099402888f,\n    0.072417146866763538f, 0.071652149032982254f, 0.070887109048087787f,\n    0.070122027362133646f, 0.069356904425197236f, 0.068591740687380900f,\n    0.067826536598810966f, 0.067061292609636836f, 0.066296009170032283f,\n    0.065530686730193397f, 0.064765325740339871f, 0.063999926650714078f,\n    0.063234489911580136f, 0.062469015973224969f, 0.061703505285957416f,\n    0.060937958300107238f, 0.060172375466026218f, 0.059406757234087247f,\n    0.058641104054683348f, 0.057875416378229017f, 0.057109694655158132f,\n    0.056343939335925283f, 0.055578150871004817f, 0.054812329710889909f,\n    0.054046476306093640f, 0.053280591107148056f, 0.052514674564603257f,\n    0.051748727129028414f, 0.050982749251010900f, 0.050216741381155325f,\n    0.049450703970084824f, 0.048684637468439020f, 0.047918542326875327f,\n    0.047152418996068000f, 0.046386267926707213f, 0.045620089569500123f,\n    0.044853884375169933f, 0.044087652794454979f, 0.043321395278109784f,\n    0.042555112276904117f, 0.041788804241622082f, 0.041022471623063397f,\n    0.040256114872041358f, 0.039489734439384118f, 0.038723330775933762f,\n    0.037956904332545366f, 0.037190455560088091f, 0.036423984909444228f,\n    0.035657492831508264f, 0.034890979777187955f, 0.034124446197403423f,\n    0.033357892543086159f, 0.032591319265180385f, 0.031824726814640963f,\n    0.031058115642434700f, 0.030291486199539423f, 0.029524838936943035f,\n    0.028758174305644590f, 0.027991492756653365f, 0.027224794740987910f,\n    0.026458080709677145f, 0.025691351113759395f, 0.024924606404281485f,\n    0.024157847032300020f, 0.023391073448879338f, 0.022624286105092803f,\n    0.021857485452021874f, 0.021090671940755180f, 0.020323846022389572f,\n    0.019557008148029204f, 0.018790158768784596f, 0.018023298335773701f,\n    0.017256427300120978f, 0.016489546112956454f, 0.015722655225417017f,\n    0.014955755088644378f, 0.014188846153786343f, 0.013421928871995907f,\n    0.012655003694430301f, 0.011888071072252072f, 0.011121131456628141f,\n    0.010354185298728884f, 0.009587233049729183f, 0.008820275160807512f,\n    0.008053312083144991f, 0.007286344267926684f, 0.006519372166339549f,\n    0.005752396229573737f, 0.004985416908821652f, 0.004218434655277024f,\n    0.003451449920135975f, 0.002684463154596083f, 0.001917474809855460f,\n    0.001150485337113809f, 0.000383495187571497f};\n\nstatic const float32_t cos_factors_8192[8192] = {\n    1.999999990808214700f, 1.999999917273932200f, 1.999999770205369800f,\n    1.999999549602533100f, 1.999999255465430200f, 1.999998887794072000f,\n    1.999998446588471700f, 1.999997931848645600f, 1.999997343574612800f,\n    1.999996681766395000f, 1.999995946424016200f, 1.999995137547503600f,\n    1.999994255136887000f, 1.999993299192198700f, 1.999992269713474200f,\n    1.999991166700750800f, 1.999989990154069600f, 1.999988740073473500f,\n    1.999987416459008600f, 1.999986019310723500f, 1.999984548628669600f,\n    1.999983004412901000f, 1.999981386663474400f, 1.999979695380449400f,\n    1.999977930563888100f, 1.999976092213855400f, 1.999974180330418700f,\n    1.999972194913648900f, 1.999970135963618400f, 1.999968003480403000f,\n    1.999965797464081200f, 1.999963517914734100f, 1.999961164832445800f,\n    1.999958738217302300f, 1.999956238069392900f, 1.999953664388809800f,\n    1.999951017175647600f, 1.999948296430003500f, 1.999945502151977600f,\n    1.999942634341672600f, 1.999939692999193900f, 1.999936678124649700f,\n    1.999933589718150700f, 1.999930427779810900f, 1.999927192309745900f,\n    1.999923883308075200f, 1.999920500774920300f, 1.999917044710405500f,\n    1.999913515114657900f, 1.999909911987807200f, 1.999906235329986100f,\n    1.999902485141329400f, 1.999898661421975400f, 1.999894764172064600f,\n    1.999890793391740000f, 1.999886749081147800f, 1.999882631240436700f,\n    1.999878439869758200f, 1.999874174969266300f, 1.999869836539117700f,\n    1.999865424579472000f, 1.999860939090491600f, 1.999856380072341000f,\n    1.999851747525188200f, 1.999847041449203300f, 1.999842261844559700f,\n    1.999837408711432600f, 1.999832482050000900f, 1.999827481860445300f,\n    1.999822408142949900f, 1.999817260897701400f, 1.999812040124888700f,\n    1.999806745824704000f, 1.999801377997341800f, 1.999795936642999600f,\n    1.999790421761877400f, 1.999784833354177900f, 1.999779171420106700f,\n    1.999773435959872000f, 1.999767626973684400f, 1.999761744461757700f,\n    1.999755788424308200f, 1.999749758861554900f, 1.999743655773719400f,\n    1.999737479161026100f, 1.999731229023702200f, 1.999724905361977200f,\n    1.999718508176084000f, 1.999712037466257600f, 1.999705493232735800f,\n    1.999698875475759600f, 1.999692184195571900f, 1.999685419392419000f,\n    1.999678581066549400f, 1.999671669218214600f, 1.999664683847668800f,\n    1.999657624955168700f, 1.999650492540973900f, 1.999643286605346800f,\n    1.999636007148552400f, 1.999628654170857900f, 1.999621227672533800f,\n    1.999613727653853500f, 1.999606154115092500f, 1.999598507056529000f,\n    1.999590786478444600f, 1.999582992381123000f, 1.999575124764850800f,\n    1.999567183629917100f, 1.999559168976613900f, 1.999551080805236100f,\n    1.999542919116081000f, 1.999534683909448600f, 1.999526375185641800f,\n    1.999517992944965800f, 1.999509537187729200f, 1.999501007914242600f,\n    1.999492405124819700f, 1.999483728819776900f, 1.999474978999432800f,\n    1.999466155664109600f, 1.999457258814131500f, 1.999448288449825500f,\n    1.999439244571521700f, 1.999430127179552500f, 1.999420936274252800f,\n    1.999411671855960900f, 1.999402333925017300f, 1.999392922481765500f,\n    1.999383437526551300f, 1.999373879059723500f, 1.999364247081633500f,\n    1.999354541592635500f, 1.999344762593086500f, 1.999334910083345700f,\n    1.999324984063775700f, 1.999314984534741100f, 1.999304911496609700f,\n    1.999294764949752100f, 1.999284544894541100f, 1.999274251331352400f,\n    1.999263884260564600f, 1.999253443682558900f, 1.999242929597719200f,\n    1.999232342006432000f, 1.999221680909086400f, 1.999210946306074500f,\n    1.999200138197791100f, 1.999189256584633600f, 1.999178301467001900f,\n    1.999167272845298900f, 1.999156170719930100f, 1.999144995091303600f,\n    1.999133745959830600f, 1.999122423325924200f, 1.999111027190001000f,\n    1.999099557552479900f, 1.999088014413782800f, 1.999076397774334000f,\n    1.999064707634560700f, 1.999052943994892300f, 1.999041106855761900f,\n    1.999029196217604100f, 1.999017212080857400f, 1.999005154445962200f,\n    1.998993023313361700f, 1.998980818683502100f, 1.998968540556831800f,\n    1.998956188933802800f, 1.998943763814868800f, 1.998931265200486900f,\n    1.998918693091116200f, 1.998906047487219600f, 1.998893328389261400f,\n    1.998880535797709700f, 1.998867669713034500f, 1.998854730135709400f,\n    1.998841717066209400f, 1.998828630505013400f, 1.998815470452602400f,\n    1.998802236909460500f, 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0.034704573487980395f, 0.034321135395268765f,\n    0.033937696040667535f, 0.033554255438273790f, 0.033170813602186440f,\n    0.032787370546502645f, 0.032403926285321405f, 0.032020480832740429f,\n    0.031637034202857461f, 0.031253586409771626f, 0.030870137467580314f,\n    0.030486687390382738f, 0.030103236192276818f, 0.029719783887360508f,\n    0.029336330489733147f, 0.028952876013492331f, 0.028569420472737472f,\n    0.028185963881566689f, 0.027802506254078142f, 0.027419047604371360f,\n    0.027035587946544135f, 0.026652127294696067f, 0.026268665662925468f,\n    0.025885203065330677f, 0.025501739516011413f, 0.025118275029065638f,\n    0.024734809618593138f, 0.024351343298691951f, 0.023967876083461924f,\n    0.023584407987001611f, 0.023200939023409587f, 0.022817469206785804f,\n    0.022433998551228459f, 0.022050527070837558f, 0.021667054779711814f,\n    0.021283581691949955f, 0.020900107821652084f, 0.020516633182916549f,\n    0.020133157789843505f, 0.019749681656531803f, 0.019366204797080316f,\n    0.018982727225589285f, 0.018599248956157190f, 0.018215770002884327f,\n    0.017832290379869671f, 0.017448810101212228f, 0.017065329181012358f,\n    0.016681847633368677f, 0.016298365472381587f, 0.015914882712149747f,\n    0.015531399366773606f, 0.015147915450352307f, 0.014764430976985016f,\n    0.014380945960772247f, 0.013997460415812761f, 0.013613974356207112f,\n    0.013230487796054543f, 0.012847000749454314f, 0.012463513230507034f,\n    0.012080025253311559f, 0.011696536831968529f, 0.011313047980577277f,\n    0.010929558713237145f, 0.010546069044048827f, 0.010162578987111254f,\n    0.009779088556525145f, 0.009395597766389905f, 0.009012106630804949f,\n    0.008628615163871038f, 0.008245123379687167f, 0.007861631292354124f,\n    0.007478138915970929f, 0.007094646264638386f, 0.006711153352455981f,\n    0.006327660193523208f, 0.005944166801940901f, 0.005560673191808128f,\n    0.005177179377225743f, 0.004793685372293270f, 0.004410191191110246f,\n    0.004026696847777542f, 0.003643202356394263f, 0.003259707731061291f,\n    0.002876212985878184f, 0.002492718134944503f, 0.002109223192361147f,\n    0.001725728172227238f, 0.001342233088643682f, 0.000958737955710053f,\n    0.000575242787525925f, 0.000191747598192208f};\n\n/**\n  @} end of DCT4_IDCT4_Table group\n */\n\n/**\n  @addtogroup DCT4_IDCT4\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point DCT4/IDCT4.\n  @param[in,out] S          points to an instance of floating-point DCT4/IDCT4\n  structure\n  @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT\n  structure\n  @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT\n  structure\n  @param[in]     N\t\t\tlength of the DCT4\n  @param[in]     Nby2       half of the length of the DCT4\n  @param[in]     normalize  normalizing factor.\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : N is not a\n  supported transform length\n\n  @par           Normalizing factor\n                   The normalizing factor is sqrt(2/N), which\n  depends on the size of transform N. Floating-point normalizing\n  factors are mentioned in the table below for different DCT sizes:\n\n                   \\image html dct4NormalizingF32Table.gif\n */\n\narm_status arm_dct4_init_f32(arm_dct4_instance_f32 *S,\n                             arm_rfft_instance_f32 *S_RFFT,\n                             arm_cfft_radix4_instance_f32 *S_CFFT, uint16_t N,\n                             uint16_t Nby2, float32_t normalize) {\n  /* Initialize the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /* Initializing the pointer array with the weight table base addresses of\n   * different lengths */\n  float32_t *twiddlePtr[4] = {\n      (float32_t *)Weights_128, (float32_t *)Weights_512,\n      (float32_t *)Weights_2048, (float32_t *)Weights_8192};\n\n  /* Initializing the pointer array with the cos factor table base addresses of\n   * different lengths */\n  float32_t *pCosFactor[4] = {\n      (float32_t *)cos_factors_128, (float32_t *)cos_factors_512,\n      (float32_t *)cos_factors_2048, (float32_t *)cos_factors_8192};\n\n  /* Initialize the DCT4 length */\n  S->N = N;\n\n  /* Initialize the half of DCT4 length */\n  S->Nby2 = Nby2;\n\n  /* Initialize the DCT4 Normalizing factor */\n  S->normalize = normalize;\n\n  /* Initialize Real FFT Instance */\n  S->pRfft = S_RFFT;\n\n  /* Initialize Complex FFT Instance */\n  S->pCfft = S_CFFT;\n\n  switch (N) {\n    /* Initialize the table modifier values */\n  case 8192U:\n    S->pTwiddle = twiddlePtr[3];\n    S->pCosFactor = pCosFactor[3];\n    break;\n  case 2048U:\n    S->pTwiddle = twiddlePtr[2];\n    S->pCosFactor = pCosFactor[2];\n    break;\n  case 512U:\n    S->pTwiddle = twiddlePtr[1];\n    S->pCosFactor = pCosFactor[1];\n    break;\n  case 128U:\n    S->pTwiddle = twiddlePtr[0];\n    S->pCosFactor = pCosFactor[0];\n    break;\n  default:\n    status = ARM_MATH_ARGUMENT_ERROR;\n  }\n\n  /* Initialize the RFFT/RIFFT Function */\n  arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U);\n\n  /* return the status of DCT4 Init function */\n  return (status);\n}\n\n/**\n  @} end of DCT4_IDCT4 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_dct4_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dct4_init_q15.c\n * Description:  Initialization function of DCT-4 & IDCT4 Q15\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup DCT4_IDCT4\n */\n\n/**\n  @addtogroup DCT4_IDCT4_Table DCT Type IV Tables\n  @{\n */\n\n/**\n  @brief  Weights Table\n */\n\n/**\n  @par\n  Weights tables are generated using the formula : 
weights[n] =\n  e^(-j*n*pi/(2*N))
\n  @par\n  C command to generate the table\n  
\n  for(i = 0; i< N; i++)\n  {\n    weights[(2*i)]   =  cos(i*c);\n    weights[(2*i)+1] = -sin(i*c);\n  } 
\n  @par\n  where N is the Number of weights to be calculated and\n  c is pi/(2*N)\n  @par\n  Converted the output to q15 format by multiplying with 2^31 and saturated if\n  required.\n  @par\n  In the tables below the real and imaginary values are placed alternatively,\n  hence the array length is 2*N.\n */\n\nstatic const q15_t __ALIGNED(4) WeightsQ15_128[256] = {\n    (q15_t)0x7fff, (q15_t)0x0,    (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ff6,\n    (q15_t)0xfcdc, (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fd8, (q15_t)0xf9b9,\n    (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f87,\n    (q15_t)0xf505, (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f38, (q15_t)0xf1e5,\n    (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7e9d,\n    (q15_t)0xed38, (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e1d, (q15_t)0xea1e,\n    (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d39,\n    (q15_t)0xe57e, (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7c89, (q15_t)0xe26d,\n    (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7b5d,\n    (q15_t)0xdddd, (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7a7d, (q15_t)0xdad8,\n    (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7909,\n    (q15_t)0xd65d, (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x77fa, (q15_t)0xd368,\n    (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x7641,\n    (q15_t)0xcf05, (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x7504, (q15_t)0xcc22,\n    (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x7307,\n    (q15_t)0xc7dc, (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x719e, (q15_t)0xc50e,\n    (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6f5f,\n    (q15_t)0xc0e9, (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6dca, (q15_t)0xbe32,\n    (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6b4a,\n    (q15_t)0xba33, (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x698c, (q15_t)0xb797,\n    (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x66cf,\n    (q15_t)0xb3c1, (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x64e8, (q15_t)0xb141,\n    (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x61f1,\n    (q15_t)0xad97, (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x5fe3, (q15_t)0xab36,\n    (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5cb4,\n    (q15_t)0xa7be, (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5a82, (q15_t)0xa57e,\n    (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x571d,\n    (q15_t)0xa239, (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x54ca, (q15_t)0xa01d,\n    (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5133,\n    (q15_t)0x9d0e, (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ebf, (q15_t)0x9b18,\n    (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4afb,\n    (q15_t)0x9843, (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4869, (q15_t)0x9674,\n    (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x447a,\n    (q15_t)0x93dc, (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x41ce, (q15_t)0x9236,\n    (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3db8,\n    (q15_t)0x8fdd, (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3af2, (q15_t)0x8e62,\n    (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x36ba,\n    (q15_t)0x8c4b, (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x33de, (q15_t)0x8afc,\n    (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x2f87,\n    (q15_t)0x8927, (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2c98, (q15_t)0x8806,\n    (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2826,\n    (q15_t)0x8676, (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2528, (q15_t)0x8583,\n    (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x209f,\n    (q15_t)0x843b, (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1d93, (q15_t)0x8377,\n    (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x18f8,\n    (q15_t)0x8276, (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x15e2, (q15_t)0x81e3,\n    (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1139,\n    (q15_t)0x812b, (q15_t)0xfab,  (q15_t)0x80f7, (q15_t)0xe1b,  (q15_t)0x80c8,\n    (q15_t)0xc8b,  (q15_t)0x809e, (q15_t)0xafb,  (q15_t)0x8079, (q15_t)0x96a,\n    (q15_t)0x8059, (q15_t)0x7d9,  (q15_t)0x803e, (q15_t)0x647,  (q15_t)0x8028,\n    (q15_t)0x4b6,  (q15_t)0x8017, (q15_t)0x324,  (q15_t)0x800a, (q15_t)0x192,\n    (q15_t)0x8003};\n\nstatic const q15_t __ALIGNED(4) WeightsQ15_512[1024] = {\n    (q15_t)0x7fff, (q15_t)0x0,    (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff,\n    (q15_t)0xff37, (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffd, (q15_t)0xfe6e,\n    (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff8,\n    (q15_t)0xfd41, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff3, (q15_t)0xfc78,\n    (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fe9,\n    (q15_t)0xfb4a, (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe1, (q15_t)0xfa81,\n    (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd3,\n    (q15_t)0xf954, (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fc8, (q15_t)0xf88b,\n    (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fb5,\n    (q15_t)0xf75e, (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fa7, (q15_t)0xf696,\n    (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f8f,\n    (q15_t)0xf569, (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f7e, (q15_t)0xf4a1,\n    (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f62,\n    (q15_t)0xf375, (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f4d, (q15_t)0xf2ad,\n    (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f2d,\n    (q15_t)0xf181, (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f15, (q15_t)0xf0b9,\n    (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef0,\n    (q15_t)0xef8e, (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7ed5, (q15_t)0xeec7,\n    (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eab,\n    (q15_t)0xed9c, (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e8e, (q15_t)0xecd5,\n    (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e5f,\n    (q15_t)0xebab, (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e3f, (q15_t)0xeae5,\n    (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e0c,\n    (q15_t)0xe9bb, (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7de8, (q15_t)0xe8f6,\n    (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7db0,\n    (q15_t)0xe7cd, (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d8a, (q15_t)0xe708,\n    (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d4e,\n    (q15_t)0xe5e0, (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d24, (q15_t)0xe51c,\n    (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7ce3,\n    (q15_t)0xe3f5, (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cb7, (q15_t)0xe331,\n    (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c71,\n    (q15_t)0xe20b, (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c42, (q15_t)0xe148,\n    (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7bf8,\n    (q15_t)0xe024, (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bc5, (q15_t)0xdf61,\n    (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b77,\n    (q15_t)0xde3e, (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b42, (q15_t)0xdd7c,\n    (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7aef,\n    (q15_t)0xdc5a, (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ab6, (q15_t)0xdb99,\n    (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a5f,\n    (q15_t)0xda78, (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a24, (q15_t)0xd9b8,\n    (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79c8,\n    (q15_t)0xd899, (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x798a, (q15_t)0xd7da,\n    (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x792a,\n    (q15_t)0xd6bc, (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x78e8, (q15_t)0xd5fe,\n    (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x7884,\n    (q15_t)0xd4e1, (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7840, (q15_t)0xd424,\n    (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77d7,\n    (q15_t)0xd309, (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x7790, (q15_t)0xd24d,\n    (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7723,\n    (q15_t)0xd134, (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76d9, (q15_t)0xd079,\n    (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7668,\n    (q15_t)0xcf62, (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x761b, (q15_t)0xcea8,\n    (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75a5,\n    (q15_t)0xcd92, (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7555, (q15_t)0xccda,\n    (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74db,\n    (q15_t)0xcbc6, (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x7489, (q15_t)0xcb0e,\n    (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x740b,\n    (q15_t)0xc9fc, (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73b5, (q15_t)0xc946,\n    (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7333,\n    (q15_t)0xc836, (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72db, (q15_t)0xc782,\n    (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x7255,\n    (q15_t)0xc674, (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x71fa, (q15_t)0xc5c0,\n    (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x716f,\n    (q15_t)0xc4b4, (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7112, (q15_t)0xc403,\n    (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x7083,\n    (q15_t)0xc2f9, (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7023, (q15_t)0xc248,\n    (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6f90,\n    (q15_t)0xc141, (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f2d, (q15_t)0xc092,\n    (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6e96,\n    (q15_t)0xbf8d, (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e30, (q15_t)0xbedf,\n    (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6d96,\n    (q15_t)0xbddc, (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d2d, (q15_t)0xbd30,\n    (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6c8f,\n    (q15_t)0xbc30, (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c24, (q15_t)0xbb86,\n    (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6b81,\n    (q15_t)0xba88, (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b13, (q15_t)0xb9df,\n    (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6a6d,\n    (q15_t)0xb8e4, (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x69fd, (q15_t)0xb83d,\n    (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6953,\n    (q15_t)0xb744, (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x68e0, (q15_t)0xb69f,\n    (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6832,\n    (q15_t)0xb5a8, (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67bd, (q15_t)0xb505,\n    (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x670b,\n    (q15_t)0xb411, (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x6693, (q15_t)0xb370,\n    (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x65dd,\n    (q15_t)0xb27f, (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6563, (q15_t)0xb1df,\n    (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64aa,\n    (q15_t)0xb0f1, (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x642d, (q15_t)0xb054,\n    (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x6371,\n    (q15_t)0xaf69, (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x62f2, (q15_t)0xaecd,\n    (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6231,\n    (q15_t)0xade4, (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61b0, (q15_t)0xad4b,\n    (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x60ec,\n    (q15_t)0xac65, (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6068, (q15_t)0xabcd,\n    (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fa0,\n    (q15_t)0xaaeb, (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f1a, (q15_t)0xaa55,\n    (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e50,\n    (q15_t)0xa976, (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5dc7, (q15_t)0xa8e3,\n    (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5cf9,\n    (q15_t)0xa807, (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5c6e, (q15_t)0xa775,\n    (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5b9d,\n    (q15_t)0xa69c, (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b10, (q15_t)0xa60d,\n    (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a3b,\n    (q15_t)0xa537, (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ac, (q15_t)0xa4aa,\n    (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x58d4,\n    (q15_t)0xa3d7, (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5842, (q15_t)0xa34c,\n    (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x5767,\n    (q15_t)0xa27d, (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x56d4, (q15_t)0xa1f5,\n    (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x55f5,\n    (q15_t)0xa129, (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5560, (q15_t)0xa0a2,\n    (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x547e,\n    (q15_t)0x9fda, (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x53e7, (q15_t)0x9f56,\n    (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x5302,\n    (q15_t)0x9e91, (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x5269, (q15_t)0x9e0f,\n    (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x5181,\n    (q15_t)0x9d4e, (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x50e5, (q15_t)0x9ccf,\n    (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x4ffb,\n    (q15_t)0x9c11, (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f5e, (q15_t)0x9b94,\n    (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4e70,\n    (q15_t)0x9ada, (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4dd1, (q15_t)0x9a60,\n    (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4ce1,\n    (q15_t)0x99a9, (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c3f, (q15_t)0x9931,\n    (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b4c,\n    (q15_t)0x987e, (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4aa9, (q15_t)0x9809,\n    (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x49b4,\n    (q15_t)0x975a, (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x490f, (q15_t)0x96e7,\n    (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4816,\n    (q15_t)0x963c, (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x4770, (q15_t)0x95cb,\n    (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x4675,\n    (q15_t)0x9524, (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x45cd, (q15_t)0x94b6,\n    (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x44cf,\n    (q15_t)0x9412, (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4425, (q15_t)0x93a7,\n    (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4325,\n    (q15_t)0x9307, (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x427a, (q15_t)0x929e,\n    (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4177,\n    (q15_t)0x9203, (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x40ca, (q15_t)0x919d,\n    (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x3fc5,\n    (q15_t)0x9105, (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f17, (q15_t)0x90a1,\n    (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e10,\n    (q15_t)0x900e, (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3d60, (q15_t)0x8fad,\n    (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3c56,\n    (q15_t)0x8f1e, (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3ba5, (q15_t)0x8ebf,\n    (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3a99,\n    (q15_t)0x8e34, (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x39e6, (q15_t)0x8dd9,\n    (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x38d8,\n    (q15_t)0x8d51, (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3824, (q15_t)0x8cf9,\n    (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3714,\n    (q15_t)0x8c76, (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x365f, (q15_t)0x8c20,\n    (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x354d,\n    (q15_t)0x8ba1, (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x3496, (q15_t)0x8b4e,\n    (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x3382,\n    (q15_t)0x8ad3, (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x32ca, (q15_t)0x8a83,\n    (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31b5,\n    (q15_t)0x8a0c, (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x30fb, (q15_t)0x89bf,\n    (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x2fe4,\n    (q15_t)0x894d, (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f29, (q15_t)0x8902,\n    (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e11,\n    (q15_t)0x8894, (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d55, (q15_t)0x884c,\n    (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c3a,\n    (q15_t)0x87e3, (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2b7d, (q15_t)0x879e,\n    (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2a61,\n    (q15_t)0x8739, (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29a3, (q15_t)0x86f7,\n    (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x2886,\n    (q15_t)0x8696, (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x27c7, (q15_t)0x8657,\n    (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x26a8,\n    (q15_t)0x85fb, (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x25e8, (q15_t)0x85be,\n    (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x24c7,\n    (q15_t)0x8566, (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2407, (q15_t)0x852d,\n    (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x22e5,\n    (q15_t)0x84da, (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x2223, (q15_t)0x84a3,\n    (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2100,\n    (q15_t)0x8454, (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x203e, (q15_t)0x8421,\n    (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f19,\n    (q15_t)0x83d7, (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1e56, (q15_t)0x83a6,\n    (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d31,\n    (q15_t)0x8360, (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1c6d, (q15_t)0x8333,\n    (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b47,\n    (q15_t)0x82f1, (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1a82, (q15_t)0x82c7,\n    (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x195b,\n    (q15_t)0x828a, (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x1896, (q15_t)0x8263,\n    (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x176d,\n    (q15_t)0x822a, (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16a8, (q15_t)0x8206,\n    (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x157f,\n    (q15_t)0x81d2, (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x14b8, (q15_t)0x81b1,\n    (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x138e,\n    (q15_t)0x8181, (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x12c8, (q15_t)0x8163,\n    (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x119d,\n    (q15_t)0x8138, (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x10d6, (q15_t)0x811d,\n    (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x100e, (q15_t)0x8103, (q15_t)0xfab,\n    (q15_t)0x80f7, (q15_t)0xf47,  (q15_t)0x80eb, (q15_t)0xee3,  (q15_t)0x80df,\n    (q15_t)0xe7f,  (q15_t)0x80d3, (q15_t)0xe1b,  (q15_t)0x80c8, (q15_t)0xdb7,\n    (q15_t)0x80bd, (q15_t)0xd53,  (q15_t)0x80b3, (q15_t)0xcef,  (q15_t)0x80a8,\n    (q15_t)0xc8b,  (q15_t)0x809e, (q15_t)0xc27,  (q15_t)0x8095, (q15_t)0xbc3,\n    (q15_t)0x808b, (q15_t)0xb5f,  (q15_t)0x8082, (q15_t)0xafb,  (q15_t)0x8079,\n    (q15_t)0xa97,  (q15_t)0x8071, (q15_t)0xa33,  (q15_t)0x8069, (q15_t)0x9ce,\n    (q15_t)0x8061, (q15_t)0x96a,  (q15_t)0x8059, (q15_t)0x906,  (q15_t)0x8052,\n    (q15_t)0x8a2,  (q15_t)0x804b, (q15_t)0x83d,  (q15_t)0x8044, (q15_t)0x7d9,\n    (q15_t)0x803e, (q15_t)0x775,  (q15_t)0x8038, (q15_t)0x710,  (q15_t)0x8032,\n    (q15_t)0x6ac,  (q15_t)0x802d, (q15_t)0x647,  (q15_t)0x8028, (q15_t)0x5e3,\n    (q15_t)0x8023, (q15_t)0x57f,  (q15_t)0x801f, (q15_t)0x51a,  (q15_t)0x801b,\n    (q15_t)0x4b6,  (q15_t)0x8017, (q15_t)0x451,  (q15_t)0x8013, (q15_t)0x3ed,\n    (q15_t)0x8010, (q15_t)0x388,  (q15_t)0x800d, (q15_t)0x324,  (q15_t)0x800a,\n    (q15_t)0x2bf,  (q15_t)0x8008, (q15_t)0x25b,  (q15_t)0x8006, (q15_t)0x1f6,\n    (q15_t)0x8004, (q15_t)0x192,  (q15_t)0x8003, (q15_t)0x12d,  (q15_t)0x8002,\n    (q15_t)0xc9,   (q15_t)0x8001, (q15_t)0x64,   (q15_t)0x8001};\n\nstatic const q15_t __ALIGNED(4) WeightsQ15_2048[4096] = {\n    (q15_t)0x7fff, (q15_t)0x0,    (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff,\n    (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xff9c,\n    (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff,\n    (q15_t)0xff51, (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff1e,\n    (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffe,\n    (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfea1,\n    (q15_t)0x7ffd, (q15_t)0xfe88, (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd,\n    (q15_t)0xfe55, (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe23,\n    (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb,\n    (q15_t)0xfdd8, (q15_t)0x7ffa, (q15_t)0xfdbe, (q15_t)0x7ffa, (q15_t)0xfda5,\n    (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff8,\n    (q15_t)0xfd5a, (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff7, (q15_t)0xfd28,\n    (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff6, (q15_t)0xfcf5, (q15_t)0x7ff6,\n    (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff4, (q15_t)0xfcaa,\n    (q15_t)0x7ff4, (q15_t)0xfc91, (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff2,\n    (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc2c,\n    (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fee,\n    (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbc8, (q15_t)0x7fed, (q15_t)0xfbaf,\n    (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7fea,\n    (q15_t)0xfb64, (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe8, (q15_t)0xfb31,\n    (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe6, (q15_t)0xfaff, (q15_t)0x7fe5,\n    (q15_t)0xfae6, (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe3, (q15_t)0xfab4,\n    (q15_t)0x7fe2, (q15_t)0xfa9b, (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe0,\n    (q15_t)0xfa68, (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fde, (q15_t)0xfa36,\n    (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fda,\n    (q15_t)0xf9eb, (q15_t)0x7fd9, (q15_t)0xf9d2, (q15_t)0x7fd8, (q15_t)0xf9b9,\n    (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd4,\n    (q15_t)0xf96d, (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd2, (q15_t)0xf93b,\n    (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fcf, (q15_t)0xf909, (q15_t)0x7fce,\n    (q15_t)0xf8f0, (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcb, (q15_t)0xf8be,\n    (q15_t)0x7fc9, (q15_t)0xf8a5, (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc6,\n    (q15_t)0xf872, (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc3, (q15_t)0xf840,\n    (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fbf,\n    (q15_t)0xf7f5, (q15_t)0x7fbd, (q15_t)0xf7dc, (q15_t)0x7fbc, (q15_t)0xf7c3,\n    (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb7,\n    (q15_t)0xf778, (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb3, (q15_t)0xf745,\n    (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb0, (q15_t)0xf713, (q15_t)0x7fae,\n    (q15_t)0xf6fa, (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7faa, (q15_t)0xf6c8,\n    (q15_t)0x7fa9, (q15_t)0xf6af, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa5,\n    (q15_t)0xf67d, (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa1, (q15_t)0xf64b,\n    (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9b,\n    (q15_t)0xf600, (q15_t)0x7f99, (q15_t)0xf5e7, (q15_t)0x7f97, (q15_t)0xf5cd,\n    (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f91,\n    (q15_t)0xf582, (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8d, (q15_t)0xf550,\n    (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f89, (q15_t)0xf51e, (q15_t)0x7f87,\n    (q15_t)0xf505, (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f82, (q15_t)0xf4d3,\n    (q15_t)0x7f80, (q15_t)0xf4ba, (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7c,\n    (q15_t)0xf488, (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f77, (q15_t)0xf456,\n    (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f70,\n    (q15_t)0xf40b, (q15_t)0x7f6e, (q15_t)0xf3f2, (q15_t)0x7f6b, (q15_t)0xf3d9,\n    (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f64,\n    (q15_t)0xf38e, (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f5f, (q15_t)0xf35c,\n    (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5a, (q15_t)0xf32a, (q15_t)0x7f58,\n    (q15_t)0xf311, (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f53, (q15_t)0xf2df,\n    (q15_t)0x7f50, (q15_t)0xf2c6, (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4b,\n    (q15_t)0xf294, (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f45, (q15_t)0xf262,\n    (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3d,\n    (q15_t)0xf217, (q15_t)0x7f3b, (q15_t)0xf1fe, (q15_t)0x7f38, (q15_t)0xf1e5,\n    (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f2f,\n    (q15_t)0xf19a, (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2a, (q15_t)0xf168,\n    (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f24, (q15_t)0xf136, (q15_t)0x7f21,\n    (q15_t)0xf11d, (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1b, (q15_t)0xf0eb,\n    (q15_t)0x7f18, (q15_t)0xf0d2, (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f12,\n    (q15_t)0xf0a0, (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0c, (q15_t)0xf06e,\n    (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f03,\n    (q15_t)0xf023, (q15_t)0x7f00, (q15_t)0xf00b, (q15_t)0x7efd, (q15_t)0xeff2,\n    (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef3,\n    (q15_t)0xefa7, (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eed, (q15_t)0xef75,\n    (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee6, (q15_t)0xef43, (q15_t)0x7ee3,\n    (q15_t)0xef2a, (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edc, (q15_t)0xeef8,\n    (q15_t)0x7ed9, (q15_t)0xeedf, (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed2,\n    (q15_t)0xeeae, (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ecb, (q15_t)0xee7c,\n    (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec1,\n    (q15_t)0xee31, (q15_t)0x7ebd, (q15_t)0xee18, (q15_t)0x7eba, (q15_t)0xedff,\n    (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eaf,\n    (q15_t)0xedb5, (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7ea8, (q15_t)0xed83,\n    (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea1, (q15_t)0xed51, (q15_t)0x7e9d,\n    (q15_t)0xed38, (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e95, (q15_t)0xed07,\n    (q15_t)0x7e92, (q15_t)0xecee, (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8a,\n    (q15_t)0xecbc, (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e83, (q15_t)0xec8a,\n    (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e77,\n    (q15_t)0xec40, (q15_t)0x7e73, (q15_t)0xec27, (q15_t)0x7e6f, (q15_t)0xec0e,\n    (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e63,\n    (q15_t)0xebc4, (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5b, (q15_t)0xeb92,\n    (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e53, (q15_t)0xeb61, (q15_t)0x7e4f,\n    (q15_t)0xeb48, (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e47, (q15_t)0xeb16,\n    (q15_t)0x7e43, (q15_t)0xeafd, (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3b,\n    (q15_t)0xeacc, (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e32, (q15_t)0xea9a,\n    (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e26,\n    (q15_t)0xea50, (q15_t)0x7e21, (q15_t)0xea37, (q15_t)0x7e1d, (q15_t)0xea1e,\n    (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e10,\n    (q15_t)0xe9d4, (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e07, (q15_t)0xe9a3,\n    (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7dff, (q15_t)0xe971, (q15_t)0x7dfa,\n    (q15_t)0xe958, (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df1, (q15_t)0xe927,\n    (q15_t)0x7ded, (q15_t)0xe90e, (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de4,\n    (q15_t)0xe8dd, (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dda, (q15_t)0xe8ab,\n    (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dcd,\n    (q15_t)0xe861, (q15_t)0x7dc8, (q15_t)0xe849, (q15_t)0x7dc3, (q15_t)0xe830,\n    (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db5,\n    (q15_t)0xe7e6, (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7dac, (q15_t)0xe7b4,\n    (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da2, (q15_t)0xe783, (q15_t)0x7d9d,\n    (q15_t)0xe76a, (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d94, (q15_t)0xe739,\n    (q15_t)0x7d8f, (q15_t)0xe720, (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d85,\n    (q15_t)0xe6ef, (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7b, (q15_t)0xe6be,\n    (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d6c,\n    (q15_t)0xe674, (q15_t)0x7d67, (q15_t)0xe65b, (q15_t)0x7d62, (q15_t)0xe643,\n    (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d53,\n    (q15_t)0xe5f9, (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d49, (q15_t)0xe5c8,\n    (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d3e, (q15_t)0xe596, (q15_t)0x7d39,\n    (q15_t)0xe57e, (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d2f, (q15_t)0xe54d,\n    (q15_t)0x7d29, (q15_t)0xe534, (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d1f,\n    (q15_t)0xe503, (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d14, (q15_t)0xe4d2,\n    (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d04,\n    (q15_t)0xe488, (q15_t)0x7cff, (q15_t)0xe470, (q15_t)0x7cf9, (q15_t)0xe457,\n    (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ce9,\n    (q15_t)0xe40e, (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7cde, (q15_t)0xe3dc,\n    (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd3, (q15_t)0xe3ab, (q15_t)0x7ccd,\n    (q15_t)0xe393, (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc2, (q15_t)0xe362,\n    (q15_t)0x7cbc, (q15_t)0xe349, (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb1,\n    (q15_t)0xe318, (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7ca6, (q15_t)0xe2e8,\n    (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c94,\n    (q15_t)0xe29e, (q15_t)0x7c8f, (q15_t)0xe286, (q15_t)0x7c89, (q15_t)0xe26d,\n    (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c77,\n    (q15_t)0xe224, (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c6c, (q15_t)0xe1f3,\n    (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c60, (q15_t)0xe1c2, (q15_t)0x7c5a,\n    (q15_t)0xe1aa, (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c4e, (q15_t)0xe179,\n    (q15_t)0x7c48, (q15_t)0xe160, (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c3c,\n    (q15_t)0xe130, (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c30, (q15_t)0xe0ff,\n    (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c1d,\n    (q15_t)0xe0b6, (q15_t)0x7c17, (q15_t)0xe09d, (q15_t)0x7c11, (q15_t)0xe085,\n    (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7bfe,\n    (q15_t)0xe03c, (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf2, (q15_t)0xe00b,\n    (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7be5, (q15_t)0xdfdb, (q15_t)0x7bdf,\n    (q15_t)0xdfc2, (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd2, (q15_t)0xdf92,\n    (q15_t)0x7bcc, (q15_t)0xdf79, (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bbf,\n    (q15_t)0xdf49, (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb2, (q15_t)0xdf18,\n    (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7b9f,\n    (q15_t)0xdecf, (q15_t)0x7b98, (q15_t)0xdeb7, (q15_t)0x7b92, (q15_t)0xde9f,\n    (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b7e,\n    (q15_t)0xde56, (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b71, (q15_t)0xde26,\n    (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b63, (q15_t)0xddf5, (q15_t)0x7b5d,\n    (q15_t)0xdddd, (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b4f, (q15_t)0xddac,\n    (q15_t)0x7b48, (q15_t)0xdd94, (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b3b,\n    (q15_t)0xdd64, (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b2d, (q15_t)0xdd33,\n    (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b19,\n    (q15_t)0xdceb, (q15_t)0x7b12, (q15_t)0xdcd3, (q15_t)0x7b0b, (q15_t)0xdcbb,\n    (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7af6,\n    (q15_t)0xdc72, (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ae8, (q15_t)0xdc42,\n    (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7ada, (q15_t)0xdc12, (q15_t)0x7ad3,\n    (q15_t)0xdbf9, (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7ac5, (q15_t)0xdbc9,\n    (q15_t)0x7abd, (q15_t)0xdbb1, (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7aaf,\n    (q15_t)0xdb81, (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa1, (q15_t)0xdb51,\n    (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a8b,\n    (q15_t)0xdb09, (q15_t)0x7a84, (q15_t)0xdaf1, (q15_t)0x7a7d, (q15_t)0xdad8,\n    (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a67,\n    (q15_t)0xda90, (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a58, (q15_t)0xda60,\n    (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a49, (q15_t)0xda30, (q15_t)0x7a42,\n    (q15_t)0xda18, (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a33, (q15_t)0xd9e8,\n    (q15_t)0x7a2b, (q15_t)0xd9d0, (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a1c,\n    (q15_t)0xd9a0, (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a0d, (q15_t)0xd970,\n    (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79f6,\n    (q15_t)0xd928, (q15_t)0x79ef, (q15_t)0xd911, (q15_t)0x79e7, (q15_t)0xd8f9,\n    (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d0,\n    (q15_t)0xd8b1, (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c0, (q15_t)0xd881,\n    (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b1, (q15_t)0xd851, (q15_t)0x79a9,\n    (q15_t)0xd839, (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x7999, (q15_t)0xd80a,\n    (q15_t)0x7992, (q15_t)0xd7f2, (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7982,\n    (q15_t)0xd7c2, (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7972, (q15_t)0xd792,\n    (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x795a,\n    (q15_t)0xd74b, (q15_t)0x7952, (q15_t)0xd733, (q15_t)0x794a, (q15_t)0xd71b,\n    (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7932,\n    (q15_t)0xd6d4, (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7922, (q15_t)0xd6a4,\n    (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7911, (q15_t)0xd675, (q15_t)0x7909,\n    (q15_t)0xd65d, (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78f9, (q15_t)0xd62d,\n    (q15_t)0x78f1, (q15_t)0xd615, (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e0,\n    (q15_t)0xd5e6, (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78cf, (q15_t)0xd5b7,\n    (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78b6,\n    (q15_t)0xd56f, (q15_t)0x78ae, (q15_t)0xd558, (q15_t)0x78a6, (q15_t)0xd540,\n    (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x788c,\n    (q15_t)0xd4f9, (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x787c, (q15_t)0xd4ca,\n    (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x786b, (q15_t)0xd49a, (q15_t)0x7862,\n    (q15_t)0xd483, (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7851, (q15_t)0xd453,\n    (q15_t)0x7848, (q15_t)0xd43c, (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x7837,\n    (q15_t)0xd40d, (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x7826, (q15_t)0xd3dd,\n    (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x780c,\n    (q15_t)0xd397, (q15_t)0x7803, (q15_t)0xd37f, (q15_t)0x77fa, (q15_t)0xd368,\n    (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e0,\n    (q15_t)0xd321, (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77ce, (q15_t)0xd2f2,\n    (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77bc, (q15_t)0xd2c3, (q15_t)0x77b4,\n    (q15_t)0xd2ab, (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a2, (q15_t)0xd27c,\n    (q15_t)0x7799, (q15_t)0xd265, (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x7787,\n    (q15_t)0xd236, (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x7775, (q15_t)0xd207,\n    (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x775a,\n    (q15_t)0xd1c1, (q15_t)0x7751, (q15_t)0xd1a9, (q15_t)0x7747, (q15_t)0xd192,\n    (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x772c,\n    (q15_t)0xd14b, (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x771a, (q15_t)0xd11d,\n    (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x7707, (q15_t)0xd0ee, (q15_t)0x76fe,\n    (q15_t)0xd0d7, (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76eb, (q15_t)0xd0a8,\n    (q15_t)0x76e2, (q15_t)0xd091, (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76cf,\n    (q15_t)0xd062, (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76bd, (q15_t)0xd033,\n    (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a0,\n    (q15_t)0xcfed, (q15_t)0x7697, (q15_t)0xcfd6, (q15_t)0x768e, (q15_t)0xcfbf,\n    (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7671,\n    (q15_t)0xcf79, (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x765e, (q15_t)0xcf4a,\n    (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x764b, (q15_t)0xcf1c, (q15_t)0x7641,\n    (q15_t)0xcf05, (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x762e, (q15_t)0xced6,\n    (q15_t)0x7624, (q15_t)0xcebf, (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7611,\n    (q15_t)0xce91, (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x75fd, (q15_t)0xce62,\n    (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e0,\n    (q15_t)0xce1d, (q15_t)0x75d6, (q15_t)0xce06, (q15_t)0x75cc, (q15_t)0xcdef,\n    (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75af,\n    (q15_t)0xcda9, (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x759b, (q15_t)0xcd7b,\n    (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x7587, (q15_t)0xcd4d, (q15_t)0x757d,\n    (q15_t)0xcd36, (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7569, (q15_t)0xcd08,\n    (q15_t)0x755f, (q15_t)0xccf1, (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x754b,\n    (q15_t)0xccc3, (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x7537, (q15_t)0xcc95,\n    (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7519,\n    (q15_t)0xcc50, (q15_t)0x750f, (q15_t)0xcc39, (q15_t)0x7504, (q15_t)0xcc22,\n    (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74e6,\n    (q15_t)0xcbdd, (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d1, (q15_t)0xcbaf,\n    (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74bd, (q15_t)0xcb81, (q15_t)0x74b2,\n    (q15_t)0xcb6a, (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x749e, (q15_t)0xcb3c,\n    (q15_t)0x7493, (q15_t)0xcb25, (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x747e,\n    (q15_t)0xcaf8, (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x746a, (q15_t)0xcaca,\n    (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x744a,\n    (q15_t)0xca85, (q15_t)0x7440, (q15_t)0xca6e, (q15_t)0x7435, (q15_t)0xca58,\n    (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x7415,\n    (q15_t)0xca13, (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7400, (q15_t)0xc9e6,\n    (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73eb, (q15_t)0xc9b8, (q15_t)0x73e0,\n    (q15_t)0xc9a1, (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73cb, (q15_t)0xc974,\n    (q15_t)0x73c0, (q15_t)0xc95d, (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73ab,\n    (q15_t)0xc930, (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x7395, (q15_t)0xc902,\n    (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x7375,\n    (q15_t)0xc8be, (q15_t)0x736a, (q15_t)0xc8a8, (q15_t)0x735f, (q15_t)0xc891,\n    (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x733e,\n    (q15_t)0xc84d, (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7328, (q15_t)0xc820,\n    (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x7312, (q15_t)0xc7f3, (q15_t)0x7307,\n    (q15_t)0xc7dc, (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f1, (q15_t)0xc7af,\n    (q15_t)0x72e6, (q15_t)0xc798, (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d0,\n    (q15_t)0xc76b, (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72ba, (q15_t)0xc73e,\n    (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x7298,\n    (q15_t)0xc6fa, (q15_t)0x728d, (q15_t)0xc6e4, (q15_t)0x7282, (q15_t)0xc6ce,\n    (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7260,\n    (q15_t)0xc68a, (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7249, (q15_t)0xc65d,\n    (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x7233, (q15_t)0xc630, (q15_t)0x7227,\n    (q15_t)0xc61a, (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7211, (q15_t)0xc5ed,\n    (q15_t)0x7205, (q15_t)0xc5d7, (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71ee,\n    (q15_t)0xc5aa, (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71d7, (q15_t)0xc57d,\n    (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71b5,\n    (q15_t)0xc53a, (q15_t)0x71a9, (q15_t)0xc524, (q15_t)0x719e, (q15_t)0xc50e,\n    (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x717b,\n    (q15_t)0xc4cb, (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7164, (q15_t)0xc49e,\n    (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x714c, (q15_t)0xc472, (q15_t)0x7141,\n    (q15_t)0xc45b, (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7129, (q15_t)0xc42f,\n    (q15_t)0x711d, (q15_t)0xc419, (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x7106,\n    (q15_t)0xc3ec, (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70ee, (q15_t)0xc3c0,\n    (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70cb,\n    (q15_t)0xc37d, (q15_t)0x70bf, (q15_t)0xc367, (q15_t)0x70b3, (q15_t)0xc351,\n    (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x708f,\n    (q15_t)0xc30f, (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7077, (q15_t)0xc2e3,\n    (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x705f, (q15_t)0xc2b7, (q15_t)0x7053,\n    (q15_t)0xc2a0, (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x703b, (q15_t)0xc274,\n    (q15_t)0x702f, (q15_t)0xc25e, (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7016,\n    (q15_t)0xc232, (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x6ffe, (q15_t)0xc206,\n    (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fda,\n    (q15_t)0xc1c4, (q15_t)0x6fcd, (q15_t)0xc1ae, (q15_t)0x6fc1, (q15_t)0xc198,\n    (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6f9c,\n    (q15_t)0xc157, (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f84, (q15_t)0xc12b,\n    (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f6b, (q15_t)0xc0ff, (q15_t)0x6f5f,\n    (q15_t)0xc0e9, (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f46, (q15_t)0xc0bd,\n    (q15_t)0x6f39, (q15_t)0xc0a8, (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f20,\n    (q15_t)0xc07c, (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f07, (q15_t)0xc050,\n    (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6ee2,\n    (q15_t)0xc00f, (q15_t)0x6ed5, (q15_t)0xbff9, (q15_t)0x6ec9, (q15_t)0xbfe3,\n    (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6ea3,\n    (q15_t)0xbfa2, (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e89, (q15_t)0xbf77,\n    (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e70, (q15_t)0xbf4b, (q15_t)0x6e63,\n    (q15_t)0xbf36, (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e4a, (q15_t)0xbf0a,\n    (q15_t)0x6e3d, (q15_t)0xbef5, (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e24,\n    (q15_t)0xbeca, (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e0a, (q15_t)0xbe9e,\n    (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6de3,\n    (q15_t)0xbe5e, (q15_t)0x6dd6, (q15_t)0xbe48, (q15_t)0x6dca, (q15_t)0xbe32,\n    (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6da3,\n    (q15_t)0xbdf2, (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d89, (q15_t)0xbdc7,\n    (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d6f, (q15_t)0xbd9c, (q15_t)0x6d62,\n    (q15_t)0xbd86, (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d48, (q15_t)0xbd5b,\n    (q15_t)0x6d3a, (q15_t)0xbd46, (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d20,\n    (q15_t)0xbd1b, (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d06, (q15_t)0xbcf0,\n    (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6cde,\n    (q15_t)0xbcb0, (q15_t)0x6cd1, (q15_t)0xbc9b, (q15_t)0x6cc4, (q15_t)0xbc85,\n    (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6c9c,\n    (q15_t)0xbc45, (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c81, (q15_t)0xbc1b,\n    (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c67, (q15_t)0xbbf0, (q15_t)0x6c59,\n    (q15_t)0xbbdb, (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c3f, (q15_t)0xbbb0,\n    (q15_t)0x6c31, (q15_t)0xbb9b, (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c16,\n    (q15_t)0xbb70, (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6bfb, (q15_t)0xbb46,\n    (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bd3,\n    (q15_t)0xbb06, (q15_t)0x6bc5, (q15_t)0xbaf1, (q15_t)0x6bb8, (q15_t)0xbadc,\n    (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b8f,\n    (q15_t)0xba9d, (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b73, (q15_t)0xba73,\n    (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b58, (q15_t)0xba48, (q15_t)0x6b4a,\n    (q15_t)0xba33, (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b2f, (q15_t)0xba09,\n    (q15_t)0x6b21, (q15_t)0xb9f4, (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b06,\n    (q15_t)0xb9ca, (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6aea, (q15_t)0xb9a0,\n    (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6ac1,\n    (q15_t)0xb961, (q15_t)0x6ab3, (q15_t)0xb94c, (q15_t)0x6aa5, (q15_t)0xb937,\n    (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a7b,\n    (q15_t)0xb8f8, (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a5f, (q15_t)0xb8cf,\n    (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a43, (q15_t)0xb8a5, (q15_t)0x6a35,\n    (q15_t)0xb890, (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a19, (q15_t)0xb866,\n    (q15_t)0x6a0b, (q15_t)0xb852, (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69ef,\n    (q15_t)0xb828, (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69d3, (q15_t)0xb7fe,\n    (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69a8,\n    (q15_t)0xb7c0, (q15_t)0x699a, (q15_t)0xb7ab, (q15_t)0x698c, (q15_t)0xb797,\n    (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x6961,\n    (q15_t)0xb758, (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6944, (q15_t)0xb72f,\n    (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6928, (q15_t)0xb706, (q15_t)0x6919,\n    (q15_t)0xb6f1, (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x68fd, (q15_t)0xb6c8,\n    (q15_t)0x68ee, (q15_t)0xb6b3, (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68d1,\n    (q15_t)0xb68a, (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68b5, (q15_t)0xb661,\n    (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6889,\n    (q15_t)0xb623, (q15_t)0x687b, (q15_t)0xb60f, (q15_t)0x686c, (q15_t)0xb5fa,\n    (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x6840,\n    (q15_t)0xb5bd, (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x6823, (q15_t)0xb594,\n    (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6806, (q15_t)0xb56b, (q15_t)0x67f7,\n    (q15_t)0xb557, (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67da, (q15_t)0xb52e,\n    (q15_t)0x67cb, (q15_t)0xb519, (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67ae,\n    (q15_t)0xb4f1, (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x6790, (q15_t)0xb4c8,\n    (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x6764,\n    (q15_t)0xb48b, (q15_t)0x6755, (q15_t)0xb477, (q15_t)0x6746, (q15_t)0xb462,\n    (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x671a,\n    (q15_t)0xb426, (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x66fc, (q15_t)0xb3fd,\n    (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66de, (q15_t)0xb3d5, (q15_t)0x66cf,\n    (q15_t)0xb3c1, (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66b1, (q15_t)0xb398,\n    (q15_t)0x66a2, (q15_t)0xb384, (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6684,\n    (q15_t)0xb35c, (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6666, (q15_t)0xb334,\n    (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6639,\n    (q15_t)0xb2f7, (q15_t)0x6629, (q15_t)0xb2e3, (q15_t)0x661a, (q15_t)0xb2cf,\n    (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65ed,\n    (q15_t)0xb293, (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65ce, (q15_t)0xb26b,\n    (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65b0, (q15_t)0xb243, (q15_t)0x65a0,\n    (q15_t)0xb22f, (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x6582, (q15_t)0xb207,\n    (q15_t)0x6573, (q15_t)0xb1f3, (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6554,\n    (q15_t)0xb1cc, (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6535, (q15_t)0xb1a4,\n    (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6507,\n    (q15_t)0xb168, (q15_t)0x64f7, (q15_t)0xb154, (q15_t)0x64e8, (q15_t)0xb141,\n    (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64ba,\n    (q15_t)0xb105, (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x649b, (q15_t)0xb0de,\n    (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x647b, (q15_t)0xb0b6, (q15_t)0x646c,\n    (q15_t)0xb0a2, (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x644d, (q15_t)0xb07b,\n    (q15_t)0x643d, (q15_t)0xb067, (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x641e,\n    (q15_t)0xb040, (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x63fe, (q15_t)0xb019,\n    (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63cf,\n    (q15_t)0xafde, (q15_t)0x63c0, (q15_t)0xafca, (q15_t)0x63b0, (q15_t)0xafb7,\n    (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x6380,\n    (q15_t)0xaf7c, (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6361, (q15_t)0xaf55,\n    (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x6341, (q15_t)0xaf2e, (q15_t)0x6331,\n    (q15_t)0xaf1b, (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x6311, (q15_t)0xaef4,\n    (q15_t)0x6301, (q15_t)0xaee0, (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62e2,\n    (q15_t)0xaeb9, (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62c2, (q15_t)0xae92,\n    (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x6292,\n    (q15_t)0xae58, (q15_t)0x6282, (q15_t)0xae45, (q15_t)0x6271, (q15_t)0xae32,\n    (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x6241,\n    (q15_t)0xadf8, (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x6221, (q15_t)0xadd1,\n    (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x6201, (q15_t)0xadab, (q15_t)0x61f1,\n    (q15_t)0xad97, (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61d0, (q15_t)0xad71,\n    (q15_t)0x61c0, (q15_t)0xad5e, (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x619f,\n    (q15_t)0xad37, (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x617f, (q15_t)0xad11,\n    (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x614e,\n    (q15_t)0xacd8, (q15_t)0x613e, (q15_t)0xacc5, (q15_t)0x612d, (q15_t)0xacb2,\n    (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x60fc,\n    (q15_t)0xac78, (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60db, (q15_t)0xac52,\n    (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60ba, (q15_t)0xac2c, (q15_t)0x60aa,\n    (q15_t)0xac19, (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6089, (q15_t)0xabf3,\n    (q15_t)0x6078, (q15_t)0xabe0, (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6057,\n    (q15_t)0xabbb, (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6036, (q15_t)0xab95,\n    (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6004,\n    (q15_t)0xab5c, (q15_t)0x5ff4, (q15_t)0xab49, (q15_t)0x5fe3, (q15_t)0xab36,\n    (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fb1,\n    (q15_t)0xaafe, (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f90, (q15_t)0xaad8,\n    (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f6e, (q15_t)0xaab3, (q15_t)0x5f5e,\n    (q15_t)0xaaa0, (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f3c, (q15_t)0xaa7b,\n    (q15_t)0x5f2b, (q15_t)0xaa68, (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f0a,\n    (q15_t)0xaa43, (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ee8, (q15_t)0xaa1d,\n    (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5eb5,\n    (q15_t)0xa9e6, (q15_t)0x5ea4, (q15_t)0xa9d3, (q15_t)0x5e93, (q15_t)0xa9c0,\n    (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e60,\n    (q15_t)0xa989, (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e3f, (q15_t)0xa964,\n    (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e1c, (q15_t)0xa93f, (q15_t)0x5e0b,\n    (q15_t)0xa92c, (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5de9, (q15_t)0xa907,\n    (q15_t)0x5dd8, (q15_t)0xa8f5, (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5db6,\n    (q15_t)0xa8d0, (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5d94, (q15_t)0xa8ab,\n    (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d60,\n    (q15_t)0xa874, (q15_t)0x5d4f, (q15_t)0xa862, (q15_t)0x5d3e, (q15_t)0xa850,\n    (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d0a,\n    (q15_t)0xa819, (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5ce8, (q15_t)0xa7f4,\n    (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cc5, (q15_t)0xa7d0, (q15_t)0x5cb4,\n    (q15_t)0xa7be, (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c91, (q15_t)0xa799,\n    (q15_t)0x5c80, (q15_t)0xa787, (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c5d,\n    (q15_t)0xa763, (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c3a, (q15_t)0xa73f,\n    (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c06,\n    (q15_t)0xa708, (q15_t)0x5bf4, (q15_t)0xa6f6, (q15_t)0x5be3, (q15_t)0xa6e4,\n    (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bae,\n    (q15_t)0xa6ae, (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b8b, (q15_t)0xa68a,\n    (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b68, (q15_t)0xa666, (q15_t)0x5b56,\n    (q15_t)0xa654, (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b33, (q15_t)0xa630,\n    (q15_t)0x5b21, (q15_t)0xa61f, (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5afe,\n    (q15_t)0xa5fb, (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5adb, (q15_t)0xa5d7,\n    (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5aa5,\n    (q15_t)0xa5a2, (q15_t)0x5a94, (q15_t)0xa590, (q15_t)0x5a82, (q15_t)0xa57e,\n    (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a4d,\n    (q15_t)0xa549, (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a29, (q15_t)0xa525,\n    (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a05, (q15_t)0xa502, (q15_t)0x59f3,\n    (q15_t)0xa4f0, (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59d0, (q15_t)0xa4cd,\n    (q15_t)0x59be, (q15_t)0xa4bb, (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x599a,\n    (q15_t)0xa498, (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5976, (q15_t)0xa475,\n    (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x5940,\n    (q15_t)0xa440, (q15_t)0x592e, (q15_t)0xa42f, (q15_t)0x591c, (q15_t)0xa41d,\n    (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58e6,\n    (q15_t)0xa3e9, (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58c1, (q15_t)0xa3c6,\n    (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x589d, (q15_t)0xa3a3, (q15_t)0x588b,\n    (q15_t)0xa392, (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5867, (q15_t)0xa36f,\n    (q15_t)0x5855, (q15_t)0xa35e, (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x5830,\n    (q15_t)0xa33b, (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x580c, (q15_t)0xa318,\n    (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57d5,\n    (q15_t)0xa2e5, (q15_t)0x57c3, (q15_t)0xa2d3, (q15_t)0x57b0, (q15_t)0xa2c2,\n    (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5779,\n    (q15_t)0xa28f, (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5755, (q15_t)0xa26c,\n    (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x5730, (q15_t)0xa24a, (q15_t)0x571d,\n    (q15_t)0xa239, (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x56f9, (q15_t)0xa217,\n    (q15_t)0x56e6, (q15_t)0xa206, (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56c1,\n    (q15_t)0xa1e4, (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x569c, (q15_t)0xa1c1,\n    (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5665,\n    (q15_t)0xa18f, (q15_t)0x5652, (q15_t)0xa17e, (q15_t)0x5640, (q15_t)0xa16d,\n    (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5608,\n    (q15_t)0xa13a, (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55e3, (q15_t)0xa118,\n    (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55bd, (q15_t)0xa0f6, (q15_t)0x55ab,\n    (q15_t)0xa0e6, (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5585, (q15_t)0xa0c4,\n    (q15_t)0x5572, (q15_t)0xa0b3, (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x554d,\n    (q15_t)0xa092, (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5528, (q15_t)0xa070,\n    (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54ef,\n    (q15_t)0xa03e, (q15_t)0x54dc, (q15_t)0xa02d, (q15_t)0x54ca, (q15_t)0xa01d,\n    (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x5491,\n    (q15_t)0x9feb, (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x546b, (q15_t)0x9fca,\n    (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5445, (q15_t)0x9fa9, (q15_t)0x5433,\n    (q15_t)0x9f98, (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x540d, (q15_t)0x9f77,\n    (q15_t)0x53fa, (q15_t)0x9f67, (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53d4,\n    (q15_t)0x9f46, (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53ae, (q15_t)0x9f25,\n    (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5375,\n    (q15_t)0x9ef3, (q15_t)0x5362, (q15_t)0x9ee3, (q15_t)0x534e, (q15_t)0x9ed3,\n    (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5315,\n    (q15_t)0x9ea2, (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52ef, (q15_t)0x9e81,\n    (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52c9, (q15_t)0x9e61, (q15_t)0x52b5,\n    (q15_t)0x9e50, (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x528f, (q15_t)0x9e30,\n    (q15_t)0x527c, (q15_t)0x9e20, (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5255,\n    (q15_t)0x9dff, (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x522f, (q15_t)0x9ddf,\n    (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x51f5,\n    (q15_t)0x9daf, (q15_t)0x51e2, (q15_t)0x9d9f, (q15_t)0x51ce, (q15_t)0x9d8f,\n    (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x5194,\n    (q15_t)0x9d5e, (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x516e, (q15_t)0x9d3e,\n    (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5147, (q15_t)0x9d1e, (q15_t)0x5133,\n    (q15_t)0x9d0e, (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x510c, (q15_t)0x9cef,\n    (q15_t)0x50f9, (q15_t)0x9cdf, (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50d2,\n    (q15_t)0x9cbf, (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ab, (q15_t)0x9c9f,\n    (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x5070,\n    (q15_t)0x9c70, (q15_t)0x505d, (q15_t)0x9c60, (q15_t)0x5049, (q15_t)0x9c50,\n    (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x500f,\n    (q15_t)0x9c21, (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fe7, (q15_t)0x9c02,\n    (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fc0, (q15_t)0x9be2, (q15_t)0x4fac,\n    (q15_t)0x9bd3, (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f85, (q15_t)0x9bb3,\n    (q15_t)0x4f71, (q15_t)0x9ba4, (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f4a,\n    (q15_t)0x9b85, (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f22, (q15_t)0x9b65,\n    (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ee7,\n    (q15_t)0x9b37, (q15_t)0x4ed3, (q15_t)0x9b27, (q15_t)0x4ebf, (q15_t)0x9b18,\n    (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e84,\n    (q15_t)0x9aea, (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e5c, (q15_t)0x9acb,\n    (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e34, (q15_t)0x9aac, (q15_t)0x4e21,\n    (q15_t)0x9a9d, (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4df9, (q15_t)0x9a7e,\n    (q15_t)0x4de5, (q15_t)0x9a6f, (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dbd,\n    (q15_t)0x9a50, (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4d95, (q15_t)0x9a32,\n    (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d59,\n    (q15_t)0x9a04, (q15_t)0x4d45, (q15_t)0x99f5, (q15_t)0x4d31, (q15_t)0x99e6,\n    (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4cf5,\n    (q15_t)0x99b8, (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4ccc, (q15_t)0x999a,\n    (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4ca4, (q15_t)0x997c, (q15_t)0x4c90,\n    (q15_t)0x996d, (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c68, (q15_t)0x994f,\n    (q15_t)0x4c54, (q15_t)0x9940, (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c2b,\n    (q15_t)0x9922, (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c03, (q15_t)0x9904,\n    (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bc6,\n    (q15_t)0x98d7, (q15_t)0x4bb2, (q15_t)0x98c9, (q15_t)0x4b9e, (q15_t)0x98ba,\n    (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b61,\n    (q15_t)0x988d, (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b38, (q15_t)0x9870,\n    (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b0f, (q15_t)0x9852, (q15_t)0x4afb,\n    (q15_t)0x9843, (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ad2, (q15_t)0x9826,\n    (q15_t)0x4abe, (q15_t)0x9817, (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a95,\n    (q15_t)0x97fa, (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a6c, (q15_t)0x97dd,\n    (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a2f,\n    (q15_t)0x97b1, (q15_t)0x4a1a, (q15_t)0x97a2, (q15_t)0x4a06, (q15_t)0x9794,\n    (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49c8,\n    (q15_t)0x9768, (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x499f, (q15_t)0x974b,\n    (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4976, (q15_t)0x972f, (q15_t)0x4961,\n    (q15_t)0x9720, (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4938, (q15_t)0x9703,\n    (q15_t)0x4923, (q15_t)0x96f5, (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48fa,\n    (q15_t)0x96d8, (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48d1, (q15_t)0x96bc,\n    (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x4893,\n    (q15_t)0x9691, (q15_t)0x487e, (q15_t)0x9683, (q15_t)0x4869, (q15_t)0x9674,\n    (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x482b,\n    (q15_t)0x964a, (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4802, (q15_t)0x962d,\n    (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47d8, (q15_t)0x9611, (q15_t)0x47c3,\n    (q15_t)0x9603, (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x479a, (q15_t)0x95e7,\n    (q15_t)0x4785, (q15_t)0x95d9, (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x475b,\n    (q15_t)0x95bd, (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4731, (q15_t)0x95a1,\n    (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x46f3,\n    (q15_t)0x9577, (q15_t)0x46de, (q15_t)0x9569, (q15_t)0x46c9, (q15_t)0x955b,\n    (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x468a,\n    (q15_t)0x9532, (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4660, (q15_t)0x9516,\n    (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4636, (q15_t)0x94fa, (q15_t)0x4621,\n    (q15_t)0x94ed, (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x45f7, (q15_t)0x94d1,\n    (q15_t)0x45e2, (q15_t)0x94c3, (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45b8,\n    (q15_t)0x94a8, (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x458d, (q15_t)0x948d,\n    (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x454e,\n    (q15_t)0x9464, (q15_t)0x4539, (q15_t)0x9456, (q15_t)0x4524, (q15_t)0x9448,\n    (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44e4,\n    (q15_t)0x9420, (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ba, (q15_t)0x9405,\n    (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x4490, (q15_t)0x93ea, (q15_t)0x447a,\n    (q15_t)0x93dc, (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4450, (q15_t)0x93c1,\n    (q15_t)0x443b, (q15_t)0x93b4, (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4410,\n    (q15_t)0x9399, (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43e5, (q15_t)0x937f,\n    (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43a5,\n    (q15_t)0x9357, (q15_t)0x4390, (q15_t)0x9349, (q15_t)0x437b, (q15_t)0x933c,\n    (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x433b,\n    (q15_t)0x9314, (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4310, (q15_t)0x92fa,\n    (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42e5, (q15_t)0x92e0, (q15_t)0x42d0,\n    (q15_t)0x92d3, (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42a5, (q15_t)0x92b8,\n    (q15_t)0x428f, (q15_t)0x92ab, (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4264,\n    (q15_t)0x9291, (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4239, (q15_t)0x9277,\n    (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x41f9,\n    (q15_t)0x9250, (q15_t)0x41e3, (q15_t)0x9243, (q15_t)0x41ce, (q15_t)0x9236,\n    (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x418d,\n    (q15_t)0x9210, (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4162, (q15_t)0x91f6,\n    (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4136, (q15_t)0x91dc, (q15_t)0x4121,\n    (q15_t)0x91d0, (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x40f6, (q15_t)0x91b6,\n    (q15_t)0x40e0, (q15_t)0x91a9, (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40b5,\n    (q15_t)0x9190, (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4089, (q15_t)0x9177,\n    (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4048,\n    (q15_t)0x9151, (q15_t)0x4032, (q15_t)0x9144, (q15_t)0x401d, (q15_t)0x9137,\n    (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fdb,\n    (q15_t)0x9112, (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fb0, (q15_t)0x90f9,\n    (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f84, (q15_t)0x90e0, (q15_t)0x3f6e,\n    (q15_t)0x90d3, (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f43, (q15_t)0x90ba,\n    (q15_t)0x3f2d, (q15_t)0x90ae, (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f01,\n    (q15_t)0x9095, (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ed5, (q15_t)0x907c,\n    (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3e93,\n    (q15_t)0x9057, (q15_t)0x3e7d, (q15_t)0x904b, (q15_t)0x3e68, (q15_t)0x903f,\n    (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e26,\n    (q15_t)0x901a, (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3dfa, (q15_t)0x9002,\n    (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dce, (q15_t)0x8fea, (q15_t)0x3db8,\n    (q15_t)0x8fdd, (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d8c, (q15_t)0x8fc5,\n    (q15_t)0x3d76, (q15_t)0x8fb9, (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d49,\n    (q15_t)0x8fa1, (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d1d, (q15_t)0x8f89,\n    (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cdb,\n    (q15_t)0x8f65, (q15_t)0x3cc5, (q15_t)0x8f59, (q15_t)0x3caf, (q15_t)0x8f4d,\n    (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c6c,\n    (q15_t)0x8f2a, (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c40, (q15_t)0x8f12,\n    (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c14, (q15_t)0x8efa, (q15_t)0x3bfd,\n    (q15_t)0x8eee, (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3bd1, (q15_t)0x8ed7,\n    (q15_t)0x3bbb, (q15_t)0x8ecb, (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b8e,\n    (q15_t)0x8eb4, (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b62, (q15_t)0x8e9c,\n    (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b1f,\n    (q15_t)0x8e7a, (q15_t)0x3b09, (q15_t)0x8e6e, (q15_t)0x3af2, (q15_t)0x8e62,\n    (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3aaf,\n    (q15_t)0x8e40, (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a83, (q15_t)0x8e29,\n    (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a56, (q15_t)0x8e12, (q15_t)0x3a40,\n    (q15_t)0x8e06, (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a13, (q15_t)0x8def,\n    (q15_t)0x39fd, (q15_t)0x8de4, (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39d0,\n    (q15_t)0x8dcd, (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39a3, (q15_t)0x8db7,\n    (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x395f,\n    (q15_t)0x8d95, (q15_t)0x3949, (q15_t)0x8d8a, (q15_t)0x3932, (q15_t)0x8d7e,\n    (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x38ef,\n    (q15_t)0x8d5d, (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38c2, (q15_t)0x8d46,\n    (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x3895, (q15_t)0x8d30, (q15_t)0x387e,\n    (q15_t)0x8d25, (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3851, (q15_t)0x8d0f,\n    (q15_t)0x383b, (q15_t)0x8d04, (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x380d,\n    (q15_t)0x8cee, (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37e0, (q15_t)0x8cd8,\n    (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x379c,\n    (q15_t)0x8cb7, (q15_t)0x3786, (q15_t)0x8cac, (q15_t)0x376f, (q15_t)0x8ca1,\n    (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x372b,\n    (q15_t)0x8c81, (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x36fe, (q15_t)0x8c6b,\n    (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36d0, (q15_t)0x8c55, (q15_t)0x36ba,\n    (q15_t)0x8c4b, (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x368c, (q15_t)0x8c35,\n    (q15_t)0x3675, (q15_t)0x8c2a, (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3648,\n    (q15_t)0x8c15, (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x361a, (q15_t)0x8c00,\n    (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35d6,\n    (q15_t)0x8be0, (q15_t)0x35bf, (q15_t)0x8bd5, (q15_t)0x35a8, (q15_t)0x8bcb,\n    (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3564,\n    (q15_t)0x8bab, (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3536, (q15_t)0x8b96,\n    (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x3508, (q15_t)0x8b82, (q15_t)0x34f2,\n    (q15_t)0x8b77, (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34c4, (q15_t)0x8b62,\n    (q15_t)0x34ad, (q15_t)0x8b58, (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x347f,\n    (q15_t)0x8b43, (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3451, (q15_t)0x8b2f,\n    (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x340c,\n    (q15_t)0x8b10, (q15_t)0x33f5, (q15_t)0x8b06, (q15_t)0x33de, (q15_t)0x8afc,\n    (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x3399,\n    (q15_t)0x8add, (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x336b, (q15_t)0x8ac9,\n    (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x333d, (q15_t)0x8ab5, (q15_t)0x3326,\n    (q15_t)0x8aab, (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x32f8, (q15_t)0x8a97,\n    (q15_t)0x32e1, (q15_t)0x8a8d, (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32b3,\n    (q15_t)0x8a79, (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3285, (q15_t)0x8a65,\n    (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3240,\n    (q15_t)0x8a47, (q15_t)0x3228, (q15_t)0x8a3d, (q15_t)0x3211, (q15_t)0x8a34,\n    (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31cc,\n    (q15_t)0x8a16, (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x319e, (q15_t)0x8a03,\n    (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x316f, (q15_t)0x89ef, (q15_t)0x3158,\n    (q15_t)0x89e5, (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x312a, (q15_t)0x89d2,\n    (q15_t)0x3112, (q15_t)0x89c8, (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30e4,\n    (q15_t)0x89b5, (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30b6, (q15_t)0x89a2,\n    (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3070,\n    (q15_t)0x8985, (q15_t)0x3059, (q15_t)0x897c, (q15_t)0x3041, (q15_t)0x8972,\n    (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x2ffb,\n    (q15_t)0x8956, (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fcd, (q15_t)0x8943,\n    (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2f9e, (q15_t)0x8931, (q15_t)0x2f87,\n    (q15_t)0x8927, (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f58, (q15_t)0x8915,\n    (q15_t)0x2f41, (q15_t)0x890b, (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f12,\n    (q15_t)0x88f9, (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ee3, (q15_t)0x88e6,\n    (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2e9d,\n    (q15_t)0x88cb, (q15_t)0x2e86, (q15_t)0x88c2, (q15_t)0x2e6e, (q15_t)0x88b9,\n    (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e28,\n    (q15_t)0x889d, (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2df9, (q15_t)0x888b,\n    (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2dca, (q15_t)0x8879, (q15_t)0x2db3,\n    (q15_t)0x8870, (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d84, (q15_t)0x885e,\n    (q15_t)0x2d6c, (q15_t)0x8855, (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d3d,\n    (q15_t)0x8844, (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d0e, (q15_t)0x8832,\n    (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cc8,\n    (q15_t)0x8817, (q15_t)0x2cb0, (q15_t)0x880f, (q15_t)0x2c98, (q15_t)0x8806,\n    (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c52,\n    (q15_t)0x87ec, (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c23, (q15_t)0x87da,\n    (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2bf3, (q15_t)0x87c9, (q15_t)0x2bdc,\n    (q15_t)0x87c0, (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bad, (q15_t)0x87af,\n    (q15_t)0x2b95, (q15_t)0x87a7, (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b66,\n    (q15_t)0x8795, (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b36, (q15_t)0x8784,\n    (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2aef,\n    (q15_t)0x876b, (q15_t)0x2ad8, (q15_t)0x8763, (q15_t)0x2ac0, (q15_t)0x875a,\n    (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a79,\n    (q15_t)0x8741, (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a49, (q15_t)0x8731,\n    (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a1a, (q15_t)0x8720, (q15_t)0x2a02,\n    (q15_t)0x8718, (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29d3, (q15_t)0x8707,\n    (q15_t)0x29bb, (q15_t)0x86ff, (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x298b,\n    (q15_t)0x86ef, (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x295c, (q15_t)0x86de,\n    (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2915,\n    (q15_t)0x86c6, (q15_t)0x28fd, (q15_t)0x86be, (q15_t)0x28e5, (q15_t)0x86b6,\n    (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x289d,\n    (q15_t)0x869e, (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x286e, (q15_t)0x868e,\n    (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x283e, (q15_t)0x867e, (q15_t)0x2826,\n    (q15_t)0x8676, (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x27f6, (q15_t)0x8667,\n    (q15_t)0x27df, (q15_t)0x865f, (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27af,\n    (q15_t)0x864f, (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x277f, (q15_t)0x8640,\n    (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2737,\n    (q15_t)0x8628, (q15_t)0x271f, (q15_t)0x8621, (q15_t)0x2707, (q15_t)0x8619,\n    (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26c0,\n    (q15_t)0x8602, (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2690, (q15_t)0x85f3,\n    (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2660, (q15_t)0x85e4, (q15_t)0x2648,\n    (q15_t)0x85dc, (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x2618, (q15_t)0x85cd,\n    (q15_t)0x2600, (q15_t)0x85c6, (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25d0,\n    (q15_t)0x85b7, (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25a0, (q15_t)0x85a8,\n    (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x2558,\n    (q15_t)0x8592, (q15_t)0x2540, (q15_t)0x858b, (q15_t)0x2528, (q15_t)0x8583,\n    (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24df,\n    (q15_t)0x856e, (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24af, (q15_t)0x855f,\n    (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x247f, (q15_t)0x8551, (q15_t)0x2467,\n    (q15_t)0x854a, (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2437, (q15_t)0x853b,\n    (q15_t)0x241f, (q15_t)0x8534, (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x23ee,\n    (q15_t)0x8526, (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23be, (q15_t)0x8518,\n    (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2376,\n    (q15_t)0x8503, (q15_t)0x235e, (q15_t)0x84fc, (q15_t)0x2345, (q15_t)0x84f5,\n    (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x22fd,\n    (q15_t)0x84e1, (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22cd, (q15_t)0x84d3,\n    (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x229c, (q15_t)0x84c5, (q15_t)0x2284,\n    (q15_t)0x84be, (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2254, (q15_t)0x84b1,\n    (q15_t)0x223b, (q15_t)0x84aa, (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x220b,\n    (q15_t)0x849d, (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21da, (q15_t)0x848f,\n    (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x2192,\n    (q15_t)0x847c, (q15_t)0x2179, (q15_t)0x8475, (q15_t)0x2161, (q15_t)0x846e,\n    (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x2118,\n    (q15_t)0x845b, (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20e8, (q15_t)0x844e,\n    (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20b7, (q15_t)0x8441, (q15_t)0x209f,\n    (q15_t)0x843b, (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x206e, (q15_t)0x842e,\n    (q15_t)0x2056, (q15_t)0x8427, (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2025,\n    (q15_t)0x841b, (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x1ff5, (q15_t)0x840e,\n    (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fac,\n    (q15_t)0x83fb, (q15_t)0x1f93, (q15_t)0x83f5, (q15_t)0x1f7b, (q15_t)0x83ef,\n    (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f32,\n    (q15_t)0x83dd, (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f01, (q15_t)0x83d0,\n    (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ed0, (q15_t)0x83c4, (q15_t)0x1eb8,\n    (q15_t)0x83be, (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e87, (q15_t)0x83b2,\n    (q15_t)0x1e6f, (q15_t)0x83ac, (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e3e,\n    (q15_t)0x83a0, (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e0d, (q15_t)0x8394,\n    (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dc4,\n    (q15_t)0x8383, (q15_t)0x1dab, (q15_t)0x837d, (q15_t)0x1d93, (q15_t)0x8377,\n    (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d49,\n    (q15_t)0x8366, (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d18, (q15_t)0x835a,\n    (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1ce8, (q15_t)0x834f, (q15_t)0x1ccf,\n    (q15_t)0x8349, (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1c9e, (q15_t)0x833e,\n    (q15_t)0x1c86, (q15_t)0x8338, (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c55,\n    (q15_t)0x832d, (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c24, (q15_t)0x8322,\n    (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bda,\n    (q15_t)0x8312, (q15_t)0x1bc1, (q15_t)0x830c, (q15_t)0x1ba9, (q15_t)0x8307,\n    (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b5f,\n    (q15_t)0x82f7, (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b2e, (q15_t)0x82ec,\n    (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1afd, (q15_t)0x82e1, (q15_t)0x1ae4,\n    (q15_t)0x82dc, (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ab3, (q15_t)0x82d1,\n    (q15_t)0x1a9b, (q15_t)0x82cc, (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a6a,\n    (q15_t)0x82c2, (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a38, (q15_t)0x82b7,\n    (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x19ef,\n    (q15_t)0x82a8, (q15_t)0x19d6, (q15_t)0x82a3, (q15_t)0x19bd, (q15_t)0x829e,\n    (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1973,\n    (q15_t)0x828f, (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1942, (q15_t)0x8285,\n    (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1911, (q15_t)0x827b, (q15_t)0x18f8,\n    (q15_t)0x8276, (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18c7, (q15_t)0x826c,\n    (q15_t)0x18ae, (q15_t)0x8268, (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x187d,\n    (q15_t)0x825e, (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x184c, (q15_t)0x8254,\n    (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1802,\n    (q15_t)0x8246, (q15_t)0x17e9, (q15_t)0x8241, (q15_t)0x17d0, (q15_t)0x823d,\n    (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1786,\n    (q15_t)0x822f, (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1755, (q15_t)0x8226,\n    (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1723, (q15_t)0x821c, (q15_t)0x170a,\n    (q15_t)0x8218, (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16d9, (q15_t)0x820f,\n    (q15_t)0x16c0, (q15_t)0x820a, (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x168f,\n    (q15_t)0x8201, (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x165d, (q15_t)0x81f9,\n    (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1613,\n    (q15_t)0x81ec, (q15_t)0x15fa, (q15_t)0x81e7, (q15_t)0x15e2, (q15_t)0x81e3,\n    (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x1597,\n    (q15_t)0x81d6, (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1566, (q15_t)0x81ce,\n    (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1534, (q15_t)0x81c5, (q15_t)0x151b,\n    (q15_t)0x81c1, (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14ea, (q15_t)0x81b9,\n    (q15_t)0x14d1, (q15_t)0x81b5, (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x149f,\n    (q15_t)0x81ad, (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x146e, (q15_t)0x81a5,\n    (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1423,\n    (q15_t)0x8199, (q15_t)0x140b, (q15_t)0x8195, (q15_t)0x13f2, (q15_t)0x8191,\n    (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13a7,\n    (q15_t)0x8185, (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1376, (q15_t)0x817d,\n    (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1344, (q15_t)0x8176, (q15_t)0x132b,\n    (q15_t)0x8172, (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x12f9, (q15_t)0x816b,\n    (q15_t)0x12e0, (q15_t)0x8167, (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12af,\n    (q15_t)0x815f, (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x127d, (q15_t)0x8158,\n    (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1232,\n    (q15_t)0x814d, (q15_t)0x1219, (q15_t)0x814a, (q15_t)0x1201, (q15_t)0x8146,\n    (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11b6,\n    (q15_t)0x813c, (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1184, (q15_t)0x8135,\n    (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1152, (q15_t)0x812e, (q15_t)0x1139,\n    (q15_t)0x812b, (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x1108, (q15_t)0x8124,\n    (q15_t)0x10ef, (q15_t)0x8121, (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10bd,\n    (q15_t)0x811a, (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x108b, (q15_t)0x8113,\n    (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1040,\n    (q15_t)0x810a, (q15_t)0x1027, (q15_t)0x8107, (q15_t)0x100e, (q15_t)0x8103,\n    (q15_t)0xff5,  (q15_t)0x8100, (q15_t)0xfdd,  (q15_t)0x80fd, (q15_t)0xfc4,\n    (q15_t)0x80fa, (q15_t)0xfab,  (q15_t)0x80f7, (q15_t)0xf92,  (q15_t)0x80f4,\n    (q15_t)0xf79,  (q15_t)0x80f1, (q15_t)0xf60,  (q15_t)0x80ee, (q15_t)0xf47,\n    (q15_t)0x80eb, (q15_t)0xf2e,  (q15_t)0x80e8, (q15_t)0xf15,  (q15_t)0x80e5,\n    (q15_t)0xefc,  (q15_t)0x80e2, (q15_t)0xee3,  (q15_t)0x80df, (q15_t)0xeca,\n    (q15_t)0x80dc, (q15_t)0xeb1,  (q15_t)0x80d9, (q15_t)0xe98,  (q15_t)0x80d6,\n    (q15_t)0xe7f,  (q15_t)0x80d3, (q15_t)0xe66,  (q15_t)0x80d1, (q15_t)0xe4d,\n    (q15_t)0x80ce, (q15_t)0xe34,  (q15_t)0x80cb, (q15_t)0xe1b,  (q15_t)0x80c8,\n    (q15_t)0xe02,  (q15_t)0x80c5, (q15_t)0xde9,  (q15_t)0x80c3, (q15_t)0xdd0,\n    (q15_t)0x80c0, (q15_t)0xdb7,  (q15_t)0x80bd, (q15_t)0xd9e,  (q15_t)0x80bb,\n    (q15_t)0xd85,  (q15_t)0x80b8, (q15_t)0xd6c,  (q15_t)0x80b5, (q15_t)0xd53,\n    (q15_t)0x80b3, (q15_t)0xd3a,  (q15_t)0x80b0, (q15_t)0xd21,  (q15_t)0x80ad,\n    (q15_t)0xd08,  (q15_t)0x80ab, (q15_t)0xcef,  (q15_t)0x80a8, (q15_t)0xcd6,\n    (q15_t)0x80a6, (q15_t)0xcbd,  (q15_t)0x80a3, (q15_t)0xca4,  (q15_t)0x80a1,\n    (q15_t)0xc8b,  (q15_t)0x809e, (q15_t)0xc72,  (q15_t)0x809c, (q15_t)0xc59,\n    (q15_t)0x8099, (q15_t)0xc40,  (q15_t)0x8097, (q15_t)0xc27,  (q15_t)0x8095,\n    (q15_t)0xc0e,  (q15_t)0x8092, (q15_t)0xbf5,  (q15_t)0x8090, (q15_t)0xbdc,\n    (q15_t)0x808e, (q15_t)0xbc3,  (q15_t)0x808b, (q15_t)0xbaa,  (q15_t)0x8089,\n    (q15_t)0xb91,  (q15_t)0x8087, (q15_t)0xb78,  (q15_t)0x8084, (q15_t)0xb5f,\n    (q15_t)0x8082, (q15_t)0xb46,  (q15_t)0x8080, (q15_t)0xb2d,  (q15_t)0x807e,\n    (q15_t)0xb14,  (q15_t)0x807b, (q15_t)0xafb,  (q15_t)0x8079, (q15_t)0xae2,\n    (q15_t)0x8077, (q15_t)0xac9,  (q15_t)0x8075, (q15_t)0xab0,  (q15_t)0x8073,\n    (q15_t)0xa97,  (q15_t)0x8071, (q15_t)0xa7e,  (q15_t)0x806f, (q15_t)0xa65,\n    (q15_t)0x806d, (q15_t)0xa4c,  (q15_t)0x806b, (q15_t)0xa33,  (q15_t)0x8069,\n    (q15_t)0xa19,  (q15_t)0x8067, (q15_t)0xa00,  (q15_t)0x8065, (q15_t)0x9e7,\n    (q15_t)0x8063, (q15_t)0x9ce,  (q15_t)0x8061, (q15_t)0x9b5,  (q15_t)0x805f,\n    (q15_t)0x99c,  (q15_t)0x805d, (q15_t)0x983,  (q15_t)0x805b, (q15_t)0x96a,\n    (q15_t)0x8059, (q15_t)0x951,  (q15_t)0x8057, (q15_t)0x938,  (q15_t)0x8056,\n    (q15_t)0x91f,  (q15_t)0x8054, (q15_t)0x906,  (q15_t)0x8052, (q15_t)0x8ed,\n    (q15_t)0x8050, (q15_t)0x8d4,  (q15_t)0x804f, (q15_t)0x8bb,  (q15_t)0x804d,\n    (q15_t)0x8a2,  (q15_t)0x804b, (q15_t)0x888,  (q15_t)0x8049, (q15_t)0x86f,\n    (q15_t)0x8048, (q15_t)0x856,  (q15_t)0x8046, (q15_t)0x83d,  (q15_t)0x8044,\n    (q15_t)0x824,  (q15_t)0x8043, (q15_t)0x80b,  (q15_t)0x8041, (q15_t)0x7f2,\n    (q15_t)0x8040, (q15_t)0x7d9,  (q15_t)0x803e, (q15_t)0x7c0,  (q15_t)0x803d,\n    (q15_t)0x7a7,  (q15_t)0x803b, (q15_t)0x78e,  (q15_t)0x803a, (q15_t)0x775,\n    (q15_t)0x8038, (q15_t)0x75b,  (q15_t)0x8037, (q15_t)0x742,  (q15_t)0x8035,\n    (q15_t)0x729,  (q15_t)0x8034, (q15_t)0x710,  (q15_t)0x8032, (q15_t)0x6f7,\n    (q15_t)0x8031, (q15_t)0x6de,  (q15_t)0x8030, (q15_t)0x6c5,  (q15_t)0x802e,\n    (q15_t)0x6ac,  (q15_t)0x802d, (q15_t)0x693,  (q15_t)0x802c, (q15_t)0x67a,\n    (q15_t)0x802a, (q15_t)0x660,  (q15_t)0x8029, (q15_t)0x647,  (q15_t)0x8028,\n    (q15_t)0x62e,  (q15_t)0x8027, (q15_t)0x615,  (q15_t)0x8026, (q15_t)0x5fc,\n    (q15_t)0x8024, (q15_t)0x5e3,  (q15_t)0x8023, (q15_t)0x5ca,  (q15_t)0x8022,\n    (q15_t)0x5b1,  (q15_t)0x8021, (q15_t)0x598,  (q15_t)0x8020, (q15_t)0x57f,\n    (q15_t)0x801f, (q15_t)0x565,  (q15_t)0x801e, (q15_t)0x54c,  (q15_t)0x801d,\n    (q15_t)0x533,  (q15_t)0x801c, (q15_t)0x51a,  (q15_t)0x801b, (q15_t)0x501,\n    (q15_t)0x801a, (q15_t)0x4e8,  (q15_t)0x8019, (q15_t)0x4cf,  (q15_t)0x8018,\n    (q15_t)0x4b6,  (q15_t)0x8017, (q15_t)0x49c,  (q15_t)0x8016, (q15_t)0x483,\n    (q15_t)0x8015, (q15_t)0x46a,  (q15_t)0x8014, (q15_t)0x451,  (q15_t)0x8013,\n    (q15_t)0x438,  (q15_t)0x8012, (q15_t)0x41f,  (q15_t)0x8012, (q15_t)0x406,\n    (q15_t)0x8011, (q15_t)0x3ed,  (q15_t)0x8010, (q15_t)0x3d4,  (q15_t)0x800f,\n    (q15_t)0x3ba,  (q15_t)0x800e, (q15_t)0x3a1,  (q15_t)0x800e, (q15_t)0x388,\n    (q15_t)0x800d, (q15_t)0x36f,  (q15_t)0x800c, (q15_t)0x356,  (q15_t)0x800c,\n    (q15_t)0x33d,  (q15_t)0x800b, (q15_t)0x324,  (q15_t)0x800a, (q15_t)0x30b,\n    (q15_t)0x800a, (q15_t)0x2f1,  (q15_t)0x8009, (q15_t)0x2d8,  (q15_t)0x8009,\n    (q15_t)0x2bf,  (q15_t)0x8008, (q15_t)0x2a6,  (q15_t)0x8008, (q15_t)0x28d,\n    (q15_t)0x8007, (q15_t)0x274,  (q15_t)0x8007, (q15_t)0x25b,  (q15_t)0x8006,\n    (q15_t)0x242,  (q15_t)0x8006, (q15_t)0x228,  (q15_t)0x8005, (q15_t)0x20f,\n    (q15_t)0x8005, (q15_t)0x1f6,  (q15_t)0x8004, (q15_t)0x1dd,  (q15_t)0x8004,\n    (q15_t)0x1c4,  (q15_t)0x8004, (q15_t)0x1ab,  (q15_t)0x8003, (q15_t)0x192,\n    (q15_t)0x8003, (q15_t)0x178,  (q15_t)0x8003, (q15_t)0x15f,  (q15_t)0x8002,\n    (q15_t)0x146,  (q15_t)0x8002, (q15_t)0x12d,  (q15_t)0x8002, (q15_t)0x114,\n    (q15_t)0x8002, (q15_t)0xfb,   (q15_t)0x8001, (q15_t)0xe2,   (q15_t)0x8001,\n    (q15_t)0xc9,   (q15_t)0x8001, (q15_t)0xaf,   (q15_t)0x8001, (q15_t)0x96,\n    (q15_t)0x8001, (q15_t)0x7d,   (q15_t)0x8001, (q15_t)0x64,   (q15_t)0x8001,\n    (q15_t)0x4b,   (q15_t)0x8001, (q15_t)0x32,   (q15_t)0x8001, (q15_t)0x19,\n    (q15_t)0x8001};\n\nstatic const q15_t __ALIGNED(4) WeightsQ15_8192[16384] = {\n    (q15_t)0x7fff, (q15_t)0x0,    (q15_t)0x7fff, (q15_t)0xfffa, (q15_t)0x7fff,\n    (q15_t)0xfff4, (q15_t)0x7fff, (q15_t)0xffee, (q15_t)0x7fff, (q15_t)0xffe7,\n    (q15_t)0x7fff, (q15_t)0xffe1, (q15_t)0x7fff, (q15_t)0xffdb, (q15_t)0x7fff,\n    (q15_t)0xffd5, (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc8,\n    (q15_t)0x7fff, (q15_t)0xffc2, (q15_t)0x7fff, (q15_t)0xffbb, (q15_t)0x7fff,\n    (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffaf, (q15_t)0x7fff, (q15_t)0xffa9,\n    (q15_t)0x7fff, (q15_t)0xffa2, (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff,\n    (q15_t)0xff96, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff89,\n    (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff7d, (q15_t)0x7fff,\n    (q15_t)0xff76, (q15_t)0x7fff, (q15_t)0xff70, (q15_t)0x7fff, (q15_t)0xff6a,\n    (q15_t)0x7fff, (q15_t)0xff63, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff,\n    (q15_t)0xff57, (q15_t)0x7fff, (q15_t)0xff51, (q15_t)0x7fff, (q15_t)0xff4a,\n    (q15_t)0x7fff, (q15_t)0xff44, (q15_t)0x7fff, (q15_t)0xff3e, (q15_t)0x7fff,\n    (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff31, (q15_t)0x7fff, (q15_t)0xff2b,\n    (q15_t)0x7fff, (q15_t)0xff25, (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff,\n    (q15_t)0xff18, (q15_t)0x7fff, (q15_t)0xff12, (q15_t)0x7fff, (q15_t)0xff0b,\n    (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeff, (q15_t)0x7ffe,\n    (q15_t)0xfef9, (q15_t)0x7ffe, (q15_t)0xfef2, (q15_t)0x7ffe, (q15_t)0xfeec,\n    (q15_t)0x7ffe, (q15_t)0xfee6, (q15_t)0x7ffe, (q15_t)0xfedf, (q15_t)0x7ffe,\n    (q15_t)0xfed9, (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfecd,\n    (q15_t)0x7ffe, (q15_t)0xfec6, (q15_t)0x7ffe, (q15_t)0xfec0, (q15_t)0x7ffe,\n    (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfeb3, (q15_t)0x7ffe, (q15_t)0xfead,\n    (q15_t)0x7ffe, (q15_t)0xfea7, (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffe,\n    (q15_t)0xfe9a, (q15_t)0x7ffd, (q15_t)0xfe94, (q15_t)0x7ffd, (q15_t)0xfe8e,\n    (q15_t)0x7ffd, (q15_t)0xfe88, (q15_t)0x7ffd, (q15_t)0xfe81, (q15_t)0x7ffd,\n    (q15_t)0xfe7b, (q15_t)0x7ffd, (q15_t)0xfe75, (q15_t)0x7ffd, (q15_t)0xfe6e,\n    (q15_t)0x7ffd, (q15_t)0xfe68, (q15_t)0x7ffd, (q15_t)0xfe62, (q15_t)0x7ffd,\n    (q15_t)0xfe5c, (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffd, (q15_t)0xfe4f,\n    (q15_t)0x7ffd, (q15_t)0xfe49, (q15_t)0x7ffc, (q15_t)0xfe42, (q15_t)0x7ffc,\n    (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe36, (q15_t)0x7ffc, (q15_t)0xfe30,\n    (q15_t)0x7ffc, (q15_t)0xfe29, (q15_t)0x7ffc, (q15_t)0xfe23, (q15_t)0x7ffc,\n    (q15_t)0xfe1d, (q15_t)0x7ffc, (q15_t)0xfe16, (q15_t)0x7ffc, (q15_t)0xfe10,\n    (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffc, (q15_t)0xfe04, (q15_t)0x7ffb,\n    (q15_t)0xfdfd, (q15_t)0x7ffb, (q15_t)0xfdf7, (q15_t)0x7ffb, (q15_t)0xfdf1,\n    (q15_t)0x7ffb, (q15_t)0xfdea, (q15_t)0x7ffb, (q15_t)0xfde4, (q15_t)0x7ffb,\n    (q15_t)0xfdde, (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffb, (q15_t)0xfdd1,\n    (q15_t)0x7ffb, (q15_t)0xfdcb, (q15_t)0x7ffb, (q15_t)0xfdc5, (q15_t)0x7ffa,\n    (q15_t)0xfdbe, (q15_t)0x7ffa, (q15_t)0xfdb8, (q15_t)0x7ffa, (q15_t)0xfdb2,\n    (q15_t)0x7ffa, (q15_t)0xfdac, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ffa,\n    (q15_t)0xfd9f, (q15_t)0x7ffa, (q15_t)0xfd99, (q15_t)0x7ffa, (q15_t)0xfd93,\n    (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd86, (q15_t)0x7ff9,\n    (q15_t)0xfd80, (q15_t)0x7ff9, (q15_t)0xfd79, (q15_t)0x7ff9, (q15_t)0xfd73,\n    (q15_t)0x7ff9, (q15_t)0xfd6d, (q15_t)0x7ff9, (q15_t)0xfd67, (q15_t)0x7ff9,\n    (q15_t)0xfd60, (q15_t)0x7ff8, (q15_t)0xfd5a, (q15_t)0x7ff8, (q15_t)0xfd54,\n    (q15_t)0x7ff8, (q15_t)0xfd4d, (q15_t)0x7ff8, (q15_t)0xfd47, (q15_t)0x7ff8,\n    (q15_t)0xfd41, (q15_t)0x7ff8, (q15_t)0xfd3b, (q15_t)0x7ff8, (q15_t)0xfd34,\n    (q15_t)0x7ff8, (q15_t)0xfd2e, (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7,\n    (q15_t)0xfd21, (q15_t)0x7ff7, (q15_t)0xfd1b, (q15_t)0x7ff7, (q15_t)0xfd15,\n    (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff7, (q15_t)0xfd08, (q15_t)0x7ff7,\n    (q15_t)0xfd02, (q15_t)0x7ff6, (q15_t)0xfcfc, (q15_t)0x7ff6, (q15_t)0xfcf5,\n    (q15_t)0x7ff6, (q15_t)0xfcef, (q15_t)0x7ff6, (q15_t)0xfce9, (q15_t)0x7ff6,\n    (q15_t)0xfce3, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcd6,\n    (q15_t)0x7ff5, (q15_t)0xfcd0, (q15_t)0x7ff5, (q15_t)0xfcc9, (q15_t)0x7ff5,\n    (q15_t)0xfcc3, (q15_t)0x7ff5, (q15_t)0xfcbd, (q15_t)0x7ff5, (q15_t)0xfcb7,\n    (q15_t)0x7ff5, (q15_t)0xfcb0, (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4,\n    (q15_t)0xfca4, (q15_t)0x7ff4, (q15_t)0xfc9e, (q15_t)0x7ff4, (q15_t)0xfc97,\n    (q15_t)0x7ff4, (q15_t)0xfc91, (q15_t)0x7ff4, (q15_t)0xfc8b, (q15_t)0x7ff3,\n    (q15_t)0xfc84, (q15_t)0x7ff3, (q15_t)0xfc7e, (q15_t)0x7ff3, (q15_t)0xfc78,\n    (q15_t)0x7ff3, (q15_t)0xfc72, (q15_t)0x7ff3, (q15_t)0xfc6b, (q15_t)0x7ff2,\n    (q15_t)0xfc65, (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc58,\n    (q15_t)0x7ff2, (q15_t)0xfc52, (q15_t)0x7ff2, (q15_t)0xfc4c, (q15_t)0x7ff2,\n    (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc3f, (q15_t)0x7ff1, (q15_t)0xfc39,\n    (q15_t)0x7ff1, (q15_t)0xfc33, (q15_t)0x7ff1, (q15_t)0xfc2c, (q15_t)0x7ff1,\n    (q15_t)0xfc26, (q15_t)0x7ff0, (q15_t)0xfc20, (q15_t)0x7ff0, (q15_t)0xfc1a,\n    (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7ff0, (q15_t)0xfc0d, (q15_t)0x7ff0,\n    (q15_t)0xfc07, (q15_t)0x7fef, (q15_t)0xfc01, (q15_t)0x7fef, (q15_t)0xfbfa,\n    (q15_t)0x7fef, (q15_t)0xfbf4, (q15_t)0x7fef, (q15_t)0xfbee, (q15_t)0x7fef,\n    (q15_t)0xfbe7, (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbdb,\n    (q15_t)0x7fee, (q15_t)0xfbd5, (q15_t)0x7fee, (q15_t)0xfbce, (q15_t)0x7fee,\n    (q15_t)0xfbc8, (q15_t)0x7fed, (q15_t)0xfbc2, (q15_t)0x7fed, (q15_t)0xfbbb,\n    (q15_t)0x7fed, (q15_t)0xfbb5, (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fed,\n    (q15_t)0xfba9, (q15_t)0x7fec, (q15_t)0xfba2, (q15_t)0x7fec, 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(q15_t)0xf64b, (q15_t)0x7fa1,\n    (q15_t)0xf644, (q15_t)0x7fa0, (q15_t)0xf63e, (q15_t)0x7fa0, (q15_t)0xf638,\n    (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9f, (q15_t)0xf62b, (q15_t)0x7f9e,\n    (q15_t)0xf625, (q15_t)0x7f9e, (q15_t)0xf61f, (q15_t)0x7f9d, (q15_t)0xf619,\n    (q15_t)0x7f9d, (q15_t)0xf612, (q15_t)0x7f9c, (q15_t)0xf60c, (q15_t)0x7f9c,\n    (q15_t)0xf606, (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f9b, (q15_t)0xf5f9,\n    (q15_t)0x7f9a, (q15_t)0xf5f3, (q15_t)0x7f9a, (q15_t)0xf5ed, (q15_t)0x7f99,\n    (q15_t)0xf5e7, (q15_t)0x7f99, (q15_t)0xf5e0, (q15_t)0x7f98, (q15_t)0xf5da,\n    (q15_t)0x7f98, (q15_t)0xf5d4, (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f97,\n    (q15_t)0xf5c7, (q15_t)0x7f96, (q15_t)0xf5c1, (q15_t)0x7f96, (q15_t)0xf5bb,\n    (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f95, (q15_t)0xf5ae, (q15_t)0x7f94,\n    (q15_t)0xf5a8, (q15_t)0x7f94, (q15_t)0xf5a2, (q15_t)0x7f93, (q15_t)0xf59b,\n    (q15_t)0x7f93, (q15_t)0xf595, (q15_t)0x7f92, (q15_t)0xf58f, (q15_t)0x7f92,\n    (q15_t)0xf589, (q15_t)0x7f91, (q15_t)0xf582, (q15_t)0x7f91, (q15_t)0xf57c,\n    (q15_t)0x7f90, (q15_t)0xf576, (q15_t)0x7f90, (q15_t)0xf570, (q15_t)0x7f8f,\n    (q15_t)0xf569, (q15_t)0x7f8f, (q15_t)0xf563, (q15_t)0x7f8e, (q15_t)0xf55d,\n    (q15_t)0x7f8e, (q15_t)0xf556, (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8d,\n    (q15_t)0xf54a, (q15_t)0x7f8c, (q15_t)0xf544, (q15_t)0x7f8b, (q15_t)0xf53d,\n    (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f8a, (q15_t)0xf531, (q15_t)0x7f8a,\n    (q15_t)0xf52b, (q15_t)0x7f89, (q15_t)0xf524, (q15_t)0x7f89, (q15_t)0xf51e,\n    (q15_t)0x7f88, (q15_t)0xf518, (q15_t)0x7f88, (q15_t)0xf512, (q15_t)0x7f87,\n    (q15_t)0xf50b, (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f86, (q15_t)0xf4ff,\n    (q15_t)0x7f86, (q15_t)0xf4f9, (q15_t)0x7f85, (q15_t)0xf4f2, (q15_t)0x7f85,\n    (q15_t)0xf4ec, (q15_t)0x7f84, (q15_t)0xf4e6, (q15_t)0x7f83, (q15_t)0xf4e0,\n    (q15_t)0x7f83, (q15_t)0xf4d9, (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f82,\n    (q15_t)0xf4cd, (q15_t)0x7f81, (q15_t)0xf4c6, (q15_t)0x7f81, (q15_t)0xf4c0,\n    (q15_t)0x7f80, (q15_t)0xf4ba, (q15_t)0x7f80, (q15_t)0xf4b4, (q15_t)0x7f7f,\n    (q15_t)0xf4ad, (q15_t)0x7f7e, (q15_t)0xf4a7, (q15_t)0x7f7e, (q15_t)0xf4a1,\n    (q15_t)0x7f7d, (q15_t)0xf49b, (q15_t)0x7f7d, (q15_t)0xf494, (q15_t)0x7f7c,\n    (q15_t)0xf48e, (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f7b, (q15_t)0xf482,\n    (q15_t)0x7f7b, (q15_t)0xf47b, (q15_t)0x7f7a, (q15_t)0xf475, (q15_t)0x7f79,\n    (q15_t)0xf46f, (q15_t)0x7f79, (q15_t)0xf469, (q15_t)0x7f78, (q15_t)0xf462,\n    (q15_t)0x7f78, (q15_t)0xf45c, (q15_t)0x7f77, (q15_t)0xf456, (q15_t)0x7f77,\n    (q15_t)0xf450, (q15_t)0x7f76, (q15_t)0xf449, (q15_t)0x7f75, (q15_t)0xf443,\n    (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f74, (q15_t)0xf437, (q15_t)0x7f74,\n    (q15_t)0xf430, (q15_t)0x7f73, (q15_t)0xf42a, (q15_t)0x7f72, (q15_t)0xf424,\n    (q15_t)0x7f72, (q15_t)0xf41e, (q15_t)0x7f71, (q15_t)0xf417, (q15_t)0x7f71,\n    (q15_t)0xf411, (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f70, (q15_t)0xf405,\n    (q15_t)0x7f6f, (q15_t)0xf3fe, (q15_t)0x7f6e, (q15_t)0xf3f8, (q15_t)0x7f6e,\n    (q15_t)0xf3f2, (q15_t)0x7f6d, (q15_t)0xf3ec, (q15_t)0x7f6d, (q15_t)0xf3e5,\n    (q15_t)0x7f6c, (q15_t)0xf3df, (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f6b,\n    (q15_t)0xf3d2, (q15_t)0x7f6a, (q15_t)0xf3cc, (q15_t)0x7f6a, (q15_t)0xf3c6,\n    (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f68, (q15_t)0xf3b9, (q15_t)0x7f68,\n    (q15_t)0xf3b3, (q15_t)0x7f67, (q15_t)0xf3ad, (q15_t)0x7f67, (q15_t)0xf3a7,\n    (q15_t)0x7f66, (q15_t)0xf3a0, (q15_t)0x7f65, (q15_t)0xf39a, (q15_t)0x7f65,\n    (q15_t)0xf394, (q15_t)0x7f64, (q15_t)0xf38e, (q15_t)0x7f64, (q15_t)0xf387,\n    (q15_t)0x7f63, (q15_t)0xf381, (q15_t)0x7f62, (q15_t)0xf37b, (q15_t)0x7f62,\n    (q15_t)0xf375, (q15_t)0x7f61, (q15_t)0xf36e, (q15_t)0x7f60, (q15_t)0xf368,\n    (q15_t)0x7f60, (q15_t)0xf362, (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5f,\n    (q15_t)0xf355, (q15_t)0x7f5e, (q15_t)0xf34f, (q15_t)0x7f5d, (q15_t)0xf349,\n    (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5c, (q15_t)0xf33c, (q15_t)0x7f5b,\n    (q15_t)0xf336, (q15_t)0x7f5b, (q15_t)0xf330, (q15_t)0x7f5a, (q15_t)0xf32a,\n    (q15_t)0x7f5a, (q15_t)0xf323, (q15_t)0x7f59, (q15_t)0xf31d, (q15_t)0x7f58,\n    (q15_t)0xf317, (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f57, (q15_t)0xf30a,\n    (q15_t)0x7f56, (q15_t)0xf304, (q15_t)0x7f56, (q15_t)0xf2fe, (q15_t)0x7f55,\n    (q15_t)0xf2f8, (q15_t)0x7f55, (q15_t)0xf2f1, (q15_t)0x7f54, (q15_t)0xf2eb,\n    (q15_t)0x7f53, (q15_t)0xf2e5, (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f52,\n    (q15_t)0xf2d8, (q15_t)0x7f51, (q15_t)0xf2d2, (q15_t)0x7f51, (q15_t)0xf2cc,\n    (q15_t)0x7f50, (q15_t)0xf2c6, (q15_t)0x7f4f, (q15_t)0xf2bf, (q15_t)0x7f4f,\n    (q15_t)0xf2b9, (q15_t)0x7f4e, (q15_t)0xf2b3, (q15_t)0x7f4d, (q15_t)0xf2ad,\n    (q15_t)0x7f4d, (q15_t)0xf2a6, (q15_t)0x7f4c, (q15_t)0xf2a0, (q15_t)0x7f4b,\n    (q15_t)0xf29a, (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f4a, (q15_t)0xf28d,\n    (q15_t)0x7f49, (q15_t)0xf287, (q15_t)0x7f49, (q15_t)0xf281, (q15_t)0x7f48,\n    (q15_t)0xf27b, (q15_t)0x7f47, (q15_t)0xf274, (q15_t)0x7f47, (q15_t)0xf26e,\n    (q15_t)0x7f46, (q15_t)0xf268, (q15_t)0x7f45, (q15_t)0xf262, (q15_t)0x7f45,\n    (q15_t)0xf25b, (q15_t)0x7f44, (q15_t)0xf255, (q15_t)0x7f43, (q15_t)0xf24f,\n    (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f42, (q15_t)0xf242, (q15_t)0x7f41,\n    (q15_t)0xf23c, (q15_t)0x7f41, (q15_t)0xf236, (q15_t)0x7f40, (q15_t)0xf230,\n    (q15_t)0x7f3f, (q15_t)0xf229, (q15_t)0x7f3f, (q15_t)0xf223, (q15_t)0x7f3e,\n    (q15_t)0xf21d, (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3d, (q15_t)0xf210,\n    (q15_t)0x7f3c, (q15_t)0xf20a, (q15_t)0x7f3b, (q15_t)0xf204, (q15_t)0x7f3b,\n    (q15_t)0xf1fe, (q15_t)0x7f3a, (q15_t)0xf1f7, (q15_t)0x7f39, (q15_t)0xf1f1,\n    (q15_t)0x7f39, (q15_t)0xf1eb, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f37,\n    (q15_t)0xf1de, (q15_t)0x7f36, (q15_t)0xf1d8, (q15_t)0x7f36, (q15_t)0xf1d2,\n    (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f34, (q15_t)0xf1c6, (q15_t)0x7f34,\n    (q15_t)0xf1bf, (q15_t)0x7f33, (q15_t)0xf1b9, (q15_t)0x7f32, (q15_t)0xf1b3,\n    (q15_t)0x7f32, (q15_t)0xf1ad, (q15_t)0x7f31, (q15_t)0xf1a6, (q15_t)0x7f30,\n    (q15_t)0xf1a0, (q15_t)0x7f2f, (q15_t)0xf19a, (q15_t)0x7f2f, (q15_t)0xf194,\n    (q15_t)0x7f2e, (q15_t)0xf18d, (q15_t)0x7f2d, (q15_t)0xf187, (q15_t)0x7f2d,\n    (q15_t)0xf181, (q15_t)0x7f2c, (q15_t)0xf17b, (q15_t)0x7f2b, (q15_t)0xf174,\n    (q15_t)0x7f2a, (q15_t)0xf16e, (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f29,\n    (q15_t)0xf162, (q15_t)0x7f28, (q15_t)0xf15b, (q15_t)0x7f28, (q15_t)0xf155,\n    (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f26, (q15_t)0xf149, (q15_t)0x7f25,\n    (q15_t)0xf142, (q15_t)0x7f25, (q15_t)0xf13c, (q15_t)0x7f24, (q15_t)0xf136,\n    (q15_t)0x7f23, (q15_t)0xf130, (q15_t)0x7f23, (q15_t)0xf129, (q15_t)0x7f22,\n    (q15_t)0xf123, (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f20, (q15_t)0xf117,\n    (q15_t)0x7f20, (q15_t)0xf110, (q15_t)0x7f1f, (q15_t)0xf10a, (q15_t)0x7f1e,\n    (q15_t)0xf104, (q15_t)0x7f1d, (q15_t)0xf0fe, (q15_t)0x7f1d, (q15_t)0xf0f8,\n    (q15_t)0x7f1c, (q15_t)0xf0f1, (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f1a,\n    (q15_t)0xf0e5, (q15_t)0x7f1a, (q15_t)0xf0df, (q15_t)0x7f19, (q15_t)0xf0d8,\n    (q15_t)0x7f18, (q15_t)0xf0d2, (q15_t)0x7f17, (q15_t)0xf0cc, (q15_t)0x7f17,\n    (q15_t)0xf0c6, (q15_t)0x7f16, (q15_t)0xf0bf, (q15_t)0x7f15, (q15_t)0xf0b9,\n    (q15_t)0x7f14, (q15_t)0xf0b3, (q15_t)0x7f14, (q15_t)0xf0ad, (q15_t)0x7f13,\n    (q15_t)0xf0a6, (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f11, (q15_t)0xf09a,\n    (q15_t)0x7f11, (q15_t)0xf094, (q15_t)0x7f10, (q15_t)0xf08d, (q15_t)0x7f0f,\n    (q15_t)0xf087, (q15_t)0x7f0e, (q15_t)0xf081, (q15_t)0x7f0e, (q15_t)0xf07b,\n    (q15_t)0x7f0d, (q15_t)0xf075, (q15_t)0x7f0c, (q15_t)0xf06e, (q15_t)0x7f0b,\n    (q15_t)0xf068, (q15_t)0x7f0b, (q15_t)0xf062, (q15_t)0x7f0a, (q15_t)0xf05c,\n    (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f08, (q15_t)0xf04f, (q15_t)0x7f08,\n    (q15_t)0xf049, (q15_t)0x7f07, (q15_t)0xf043, (q15_t)0x7f06, (q15_t)0xf03c,\n    (q15_t)0x7f05, (q15_t)0xf036, (q15_t)0x7f04, (q15_t)0xf030, (q15_t)0x7f04,\n    (q15_t)0xf02a, (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f02, (q15_t)0xf01d,\n    (q15_t)0x7f01, (q15_t)0xf017, (q15_t)0x7f01, (q15_t)0xf011, (q15_t)0x7f00,\n    (q15_t)0xf00b, (q15_t)0x7eff, (q15_t)0xf004, (q15_t)0x7efe, (q15_t)0xeffe,\n    (q15_t)0x7efd, (q15_t)0xeff8, (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7efc,\n    (q15_t)0xefeb, (q15_t)0x7efb, (q15_t)0xefe5, (q15_t)0x7efa, (q15_t)0xefdf,\n    (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef9, (q15_t)0xefd2, (q15_t)0x7ef8,\n    (q15_t)0xefcc, (q15_t)0x7ef7, (q15_t)0xefc6, (q15_t)0x7ef6, (q15_t)0xefc0,\n    (q15_t)0x7ef5, (q15_t)0xefb9, (q15_t)0x7ef5, (q15_t)0xefb3, (q15_t)0x7ef4,\n    (q15_t)0xefad, (q15_t)0x7ef3, (q15_t)0xefa7, (q15_t)0x7ef2, (q15_t)0xefa1,\n    (q15_t)0x7ef1, (q15_t)0xef9a, (q15_t)0x7ef1, (q15_t)0xef94, (q15_t)0x7ef0,\n    (q15_t)0xef8e, (q15_t)0x7eef, (q15_t)0xef88, (q15_t)0x7eee, (q15_t)0xef81,\n    (q15_t)0x7eed, (q15_t)0xef7b, (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7eec,\n    (q15_t)0xef6f, (q15_t)0x7eeb, (q15_t)0xef68, (q15_t)0x7eea, (q15_t)0xef62,\n    (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee9, (q15_t)0xef56, (q15_t)0x7ee8,\n    (q15_t)0xef50, (q15_t)0x7ee7, (q15_t)0xef49, (q15_t)0x7ee6, (q15_t)0xef43,\n    (q15_t)0x7ee5, (q15_t)0xef3d, (q15_t)0x7ee4, (q15_t)0xef37, (q15_t)0x7ee4,\n    (q15_t)0xef30, (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7ee2, (q15_t)0xef24,\n    (q15_t)0x7ee1, (q15_t)0xef1e, (q15_t)0x7ee0, (q15_t)0xef18, (q15_t)0x7edf,\n    (q15_t)0xef11, (q15_t)0x7edf, (q15_t)0xef0b, (q15_t)0x7ede, (q15_t)0xef05,\n    (q15_t)0x7edd, (q15_t)0xeeff, (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7edb,\n    (q15_t)0xeef2, (q15_t)0x7eda, (q15_t)0xeeec, (q15_t)0x7eda, (q15_t)0xeee6,\n    (q15_t)0x7ed9, (q15_t)0xeedf, (q15_t)0x7ed8, (q15_t)0xeed9, (q15_t)0x7ed7,\n    (q15_t)0xeed3, (q15_t)0x7ed6, (q15_t)0xeecd, (q15_t)0x7ed5, (q15_t)0xeec7,\n    (q15_t)0x7ed5, (q15_t)0xeec0, (q15_t)0x7ed4, (q15_t)0xeeba, (q15_t)0x7ed3,\n    (q15_t)0xeeb4, (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ed1, (q15_t)0xeea7,\n    (q15_t)0x7ed0, (q15_t)0xeea1, (q15_t)0x7ecf, (q15_t)0xee9b, (q15_t)0x7ecf,\n    (q15_t)0xee95, (q15_t)0x7ece, (q15_t)0xee8f, (q15_t)0x7ecd, (q15_t)0xee88,\n    (q15_t)0x7ecc, (q15_t)0xee82, (q15_t)0x7ecb, (q15_t)0xee7c, (q15_t)0x7eca,\n    (q15_t)0xee76, (q15_t)0x7ec9, (q15_t)0xee6f, (q15_t)0x7ec9, (q15_t)0xee69,\n    (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec7, (q15_t)0xee5d, (q15_t)0x7ec6,\n    (q15_t)0xee57, (q15_t)0x7ec5, (q15_t)0xee50, (q15_t)0x7ec4, (q15_t)0xee4a,\n    (q15_t)0x7ec3, (q15_t)0xee44, (q15_t)0x7ec3, (q15_t)0xee3e, (q15_t)0x7ec2,\n    (q15_t)0xee37, (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ec0, (q15_t)0xee2b,\n    (q15_t)0x7ebf, (q15_t)0xee25, (q15_t)0x7ebe, (q15_t)0xee1f, (q15_t)0x7ebd,\n    (q15_t)0xee18, (q15_t)0x7ebc, (q15_t)0xee12, (q15_t)0x7ebb, (q15_t)0xee0c,\n    (q15_t)0x7ebb, (q15_t)0xee06, (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb9,\n    (q15_t)0xedf9, (q15_t)0x7eb8, (q15_t)0xedf3, (q15_t)0x7eb7, (q15_t)0xeded,\n    (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb5, (q15_t)0xede0, (q15_t)0x7eb4,\n    (q15_t)0xedda, (q15_t)0x7eb4, (q15_t)0xedd4, (q15_t)0x7eb3, (q15_t)0xedce,\n    (q15_t)0x7eb2, (q15_t)0xedc7, (q15_t)0x7eb1, (q15_t)0xedc1, (q15_t)0x7eb0,\n    (q15_t)0xedbb, (q15_t)0x7eaf, (q15_t)0xedb5, (q15_t)0x7eae, (q15_t)0xedaf,\n    (q15_t)0x7ead, (q15_t)0xeda8, (q15_t)0x7eac, (q15_t)0xeda2, (q15_t)0x7eab,\n    (q15_t)0xed9c, (q15_t)0x7eab, (q15_t)0xed96, (q15_t)0x7eaa, (q15_t)0xed8f,\n    (q15_t)0x7ea9, (q15_t)0xed89, (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea7,\n    (q15_t)0xed7d, (q15_t)0x7ea6, (q15_t)0xed77, (q15_t)0x7ea5, (q15_t)0xed70,\n    (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea3, (q15_t)0xed64, (q15_t)0x7ea2,\n    (q15_t)0xed5e, (q15_t)0x7ea1, (q15_t)0xed58, (q15_t)0x7ea1, (q15_t)0xed51,\n    (q15_t)0x7ea0, (q15_t)0xed4b, (q15_t)0x7e9f, (q15_t)0xed45, (q15_t)0x7e9e,\n    (q15_t)0xed3f, (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e9c, (q15_t)0xed32,\n    (q15_t)0x7e9b, (q15_t)0xed2c, (q15_t)0x7e9a, (q15_t)0xed26, (q15_t)0x7e99,\n    (q15_t)0xed20, (q15_t)0x7e98, (q15_t)0xed19, (q15_t)0x7e97, (q15_t)0xed13,\n    (q15_t)0x7e96, (q15_t)0xed0d, (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e94,\n    (q15_t)0xed01, (q15_t)0x7e94, (q15_t)0xecfa, (q15_t)0x7e93, (q15_t)0xecf4,\n    (q15_t)0x7e92, (q15_t)0xecee, (q15_t)0x7e91, (q15_t)0xece8, (q15_t)0x7e90,\n    (q15_t)0xece1, (q15_t)0x7e8f, (q15_t)0xecdb, (q15_t)0x7e8e, (q15_t)0xecd5,\n    (q15_t)0x7e8d, (q15_t)0xeccf, (q15_t)0x7e8c, (q15_t)0xecc9, (q15_t)0x7e8b,\n    (q15_t)0xecc2, (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e89, (q15_t)0xecb6,\n    (q15_t)0x7e88, (q15_t)0xecb0, (q15_t)0x7e87, (q15_t)0xecaa, (q15_t)0x7e86,\n    (q15_t)0xeca3, (q15_t)0x7e85, (q15_t)0xec9d, (q15_t)0x7e84, (q15_t)0xec97,\n    (q15_t)0x7e84, (q15_t)0xec91, (q15_t)0x7e83, (q15_t)0xec8a, (q15_t)0x7e82,\n    (q15_t)0xec84, (q15_t)0x7e81, (q15_t)0xec7e, (q15_t)0x7e80, (q15_t)0xec78,\n    (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7e, (q15_t)0xec6b, (q15_t)0x7e7d,\n    (q15_t)0xec65, (q15_t)0x7e7c, (q15_t)0xec5f, (q15_t)0x7e7b, (q15_t)0xec59,\n    (q15_t)0x7e7a, (q15_t)0xec53, (q15_t)0x7e79, (q15_t)0xec4c, (q15_t)0x7e78,\n    (q15_t)0xec46, (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e76, (q15_t)0xec3a,\n    (q15_t)0x7e75, (q15_t)0xec34, (q15_t)0x7e74, (q15_t)0xec2d, (q15_t)0x7e73,\n    (q15_t)0xec27, (q15_t)0x7e72, (q15_t)0xec21, (q15_t)0x7e71, (q15_t)0xec1b,\n    (q15_t)0x7e70, (q15_t)0xec15, (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6e,\n    (q15_t)0xec08, (q15_t)0x7e6d, (q15_t)0xec02, (q15_t)0x7e6c, (q15_t)0xebfc,\n    (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e6a, (q15_t)0xebef, (q15_t)0x7e69,\n    (q15_t)0xebe9, (q15_t)0x7e68, (q15_t)0xebe3, (q15_t)0x7e67, (q15_t)0xebdd,\n    (q15_t)0x7e66, (q15_t)0xebd6, (q15_t)0x7e65, (q15_t)0xebd0, (q15_t)0x7e64,\n    (q15_t)0xebca, (q15_t)0x7e63, (q15_t)0xebc4, (q15_t)0x7e62, (q15_t)0xebbe,\n    (q15_t)0x7e61, (q15_t)0xebb7, (q15_t)0x7e60, (q15_t)0xebb1, (q15_t)0x7e5f,\n    (q15_t)0xebab, (q15_t)0x7e5e, (q15_t)0xeba5, (q15_t)0x7e5d, (q15_t)0xeb9f,\n    (q15_t)0x7e5c, (q15_t)0xeb98, (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e5a,\n    (q15_t)0xeb8c, (q15_t)0x7e59, (q15_t)0xeb86, (q15_t)0x7e58, (q15_t)0xeb80,\n    (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e56, (q15_t)0xeb73, (q15_t)0x7e55,\n    (q15_t)0xeb6d, (q15_t)0x7e54, (q15_t)0xeb67, (q15_t)0x7e53, (q15_t)0xeb61,\n    (q15_t)0x7e52, (q15_t)0xeb5a, (q15_t)0x7e51, (q15_t)0xeb54, (q15_t)0x7e50,\n    (q15_t)0xeb4e, (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4e, (q15_t)0xeb42,\n    (q15_t)0x7e4d, (q15_t)0xeb3b, (q15_t)0x7e4c, (q15_t)0xeb35, (q15_t)0x7e4b,\n    (q15_t)0xeb2f, (q15_t)0x7e4a, (q15_t)0xeb29, (q15_t)0x7e49, (q15_t)0xeb23,\n    (q15_t)0x7e48, (q15_t)0xeb1c, (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e46,\n    (q15_t)0xeb10, (q15_t)0x7e45, (q15_t)0xeb0a, (q15_t)0x7e44, (q15_t)0xeb04,\n    (q15_t)0x7e43, (q15_t)0xeafd, (q15_t)0x7e42, (q15_t)0xeaf7, (q15_t)0x7e41,\n    (q15_t)0xeaf1, (q15_t)0x7e40, (q15_t)0xeaeb, (q15_t)0x7e3f, (q15_t)0xeae5,\n    (q15_t)0x7e3e, (q15_t)0xeade, (q15_t)0x7e3d, (q15_t)0xead8, (q15_t)0x7e3c,\n    (q15_t)0xead2, (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e3a, (q15_t)0xeac6,\n    (q15_t)0x7e39, (q15_t)0xeabf, (q15_t)0x7e38, (q15_t)0xeab9, (q15_t)0x7e37,\n    (q15_t)0xeab3, (q15_t)0x7e35, (q15_t)0xeaad, (q15_t)0x7e34, (q15_t)0xeaa7,\n    (q15_t)0x7e33, (q15_t)0xeaa0, (q15_t)0x7e32, (q15_t)0xea9a, (q15_t)0x7e31,\n    (q15_t)0xea94, (q15_t)0x7e30, (q15_t)0xea8e, (q15_t)0x7e2f, (q15_t)0xea88,\n    (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2d, (q15_t)0xea7b, (q15_t)0x7e2c,\n    (q15_t)0xea75, (q15_t)0x7e2b, (q15_t)0xea6f, (q15_t)0x7e2a, (q15_t)0xea69,\n    (q15_t)0x7e29, (q15_t)0xea63, (q15_t)0x7e28, (q15_t)0xea5c, (q15_t)0x7e27,\n    (q15_t)0xea56, (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e25, (q15_t)0xea4a,\n    (q15_t)0x7e24, (q15_t)0xea44, (q15_t)0x7e22, (q15_t)0xea3d, (q15_t)0x7e21,\n    (q15_t)0xea37, (q15_t)0x7e20, (q15_t)0xea31, (q15_t)0x7e1f, (q15_t)0xea2b,\n    (q15_t)0x7e1e, (q15_t)0xea25, (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e1c,\n    (q15_t)0xea18, (q15_t)0x7e1b, (q15_t)0xea12, (q15_t)0x7e1a, (q15_t)0xea0c,\n    (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e18, (q15_t)0xe9ff, (q15_t)0x7e17,\n    (q15_t)0xe9f9, (q15_t)0x7e16, (q15_t)0xe9f3, (q15_t)0x7e14, (q15_t)0xe9ed,\n    (q15_t)0x7e13, (q15_t)0xe9e7, (q15_t)0x7e12, (q15_t)0xe9e1, (q15_t)0x7e11,\n    (q15_t)0xe9da, (q15_t)0x7e10, (q15_t)0xe9d4, (q15_t)0x7e0f, (q15_t)0xe9ce,\n    (q15_t)0x7e0e, (q15_t)0xe9c8, (q15_t)0x7e0d, (q15_t)0xe9c2, (q15_t)0x7e0c,\n    (q15_t)0xe9bb, (q15_t)0x7e0b, (q15_t)0xe9b5, (q15_t)0x7e0a, (q15_t)0xe9af,\n    (q15_t)0x7e08, (q15_t)0xe9a9, (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e06,\n    (q15_t)0xe99c, (q15_t)0x7e05, (q15_t)0xe996, (q15_t)0x7e04, (q15_t)0xe990,\n    (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7e02, (q15_t)0xe984, (q15_t)0x7e01,\n    (q15_t)0xe97e, (q15_t)0x7e00, (q15_t)0xe977, (q15_t)0x7dff, (q15_t)0xe971,\n    (q15_t)0x7dfd, (q15_t)0xe96b, (q15_t)0x7dfc, (q15_t)0xe965, (q15_t)0x7dfb,\n    (q15_t)0xe95f, (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df9, (q15_t)0xe952,\n    (q15_t)0x7df8, (q15_t)0xe94c, (q15_t)0x7df7, (q15_t)0xe946, (q15_t)0x7df6,\n    (q15_t)0xe940, (q15_t)0x7df5, (q15_t)0xe93a, (q15_t)0x7df3, (q15_t)0xe933,\n    (q15_t)0x7df2, (q15_t)0xe92d, (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7df0,\n    (q15_t)0xe921, (q15_t)0x7def, (q15_t)0xe91b, (q15_t)0x7dee, (q15_t)0xe914,\n    (q15_t)0x7ded, (q15_t)0xe90e, (q15_t)0x7dec, (q15_t)0xe908, (q15_t)0x7dea,\n    (q15_t)0xe902, (q15_t)0x7de9, (q15_t)0xe8fc, (q15_t)0x7de8, (q15_t)0xe8f6,\n    (q15_t)0x7de7, (q15_t)0xe8ef, (q15_t)0x7de6, (q15_t)0xe8e9, (q15_t)0x7de5,\n    (q15_t)0xe8e3, (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7de2, (q15_t)0xe8d7,\n    (q15_t)0x7de1, (q15_t)0xe8d0, (q15_t)0x7de0, (q15_t)0xe8ca, (q15_t)0x7ddf,\n    (q15_t)0xe8c4, (q15_t)0x7dde, (q15_t)0xe8be, (q15_t)0x7ddd, (q15_t)0xe8b8,\n    (q15_t)0x7ddc, (q15_t)0xe8b2, (q15_t)0x7dda, (q15_t)0xe8ab, (q15_t)0x7dd9,\n    (q15_t)0xe8a5, (q15_t)0x7dd8, (q15_t)0xe89f, (q15_t)0x7dd7, (q15_t)0xe899,\n    (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd5, (q15_t)0xe88c, (q15_t)0x7dd4,\n    (q15_t)0xe886, (q15_t)0x7dd2, (q15_t)0xe880, (q15_t)0x7dd1, (q15_t)0xe87a,\n    (q15_t)0x7dd0, (q15_t)0xe874, (q15_t)0x7dcf, (q15_t)0xe86e, (q15_t)0x7dce,\n    (q15_t)0xe867, (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dcc, (q15_t)0xe85b,\n    (q15_t)0x7dca, (q15_t)0xe855, (q15_t)0x7dc9, (q15_t)0xe84f, (q15_t)0x7dc8,\n    (q15_t)0xe849, (q15_t)0x7dc7, (q15_t)0xe842, (q15_t)0x7dc6, (q15_t)0xe83c,\n    (q15_t)0x7dc5, (q15_t)0xe836, (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dc2,\n    (q15_t)0xe82a, (q15_t)0x7dc1, (q15_t)0xe823, (q15_t)0x7dc0, (q15_t)0xe81d,\n    (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dbd, (q15_t)0xe811, (q15_t)0x7dbc,\n    (q15_t)0xe80b, (q15_t)0x7dbb, (q15_t)0xe805, (q15_t)0x7dba, (q15_t)0xe7fe,\n    (q15_t)0x7db9, (q15_t)0xe7f8, (q15_t)0x7db8, (q15_t)0xe7f2, (q15_t)0x7db6,\n    (q15_t)0xe7ec, (q15_t)0x7db5, (q15_t)0xe7e6, (q15_t)0x7db4, (q15_t)0xe7e0,\n    (q15_t)0x7db3, (q15_t)0xe7d9, (q15_t)0x7db2, (q15_t)0xe7d3, (q15_t)0x7db0,\n    (q15_t)0xe7cd, (q15_t)0x7daf, (q15_t)0xe7c7, (q15_t)0x7dae, (q15_t)0xe7c1,\n    (q15_t)0x7dad, (q15_t)0xe7bb, (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7dab,\n    (q15_t)0xe7ae, (q15_t)0x7da9, (q15_t)0xe7a8, (q15_t)0x7da8, (q15_t)0xe7a2,\n    (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da6, (q15_t)0xe796, (q15_t)0x7da5,\n    (q15_t)0xe78f, (q15_t)0x7da3, (q15_t)0xe789, (q15_t)0x7da2, (q15_t)0xe783,\n    (q15_t)0x7da1, (q15_t)0xe77d, (q15_t)0x7da0, (q15_t)0xe777, (q15_t)0x7d9f,\n    (q15_t)0xe771, (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d9c, (q15_t)0xe764,\n    (q15_t)0x7d9b, (q15_t)0xe75e, (q15_t)0x7d9a, (q15_t)0xe758, (q15_t)0x7d98,\n    (q15_t)0xe752, (q15_t)0x7d97, (q15_t)0xe74c, (q15_t)0x7d96, (q15_t)0xe745,\n    (q15_t)0x7d95, (q15_t)0xe73f, (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d92,\n    (q15_t)0xe733, (q15_t)0x7d91, (q15_t)0xe72d, (q15_t)0x7d90, (q15_t)0xe727,\n    (q15_t)0x7d8f, (q15_t)0xe720, (q15_t)0x7d8e, (q15_t)0xe71a, (q15_t)0x7d8c,\n    (q15_t)0xe714, (q15_t)0x7d8b, (q15_t)0xe70e, (q15_t)0x7d8a, (q15_t)0xe708,\n    (q15_t)0x7d89, (q15_t)0xe702, (q15_t)0x7d87, (q15_t)0xe6fb, (q15_t)0x7d86,\n    (q15_t)0xe6f5, (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d84, (q15_t)0xe6e9,\n    (q15_t)0x7d82, (q15_t)0xe6e3, (q15_t)0x7d81, (q15_t)0xe6dd, (q15_t)0x7d80,\n    (q15_t)0xe6d6, (q15_t)0x7d7f, (q15_t)0xe6d0, (q15_t)0x7d7e, (q15_t)0xe6ca,\n    (q15_t)0x7d7c, (q15_t)0xe6c4, (q15_t)0x7d7b, (q15_t)0xe6be, (q15_t)0x7d7a,\n    (q15_t)0xe6b8, (q15_t)0x7d79, (q15_t)0xe6b2, (q15_t)0x7d77, (q15_t)0xe6ab,\n    (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d75, (q15_t)0xe69f, (q15_t)0x7d74,\n    (q15_t)0xe699, (q15_t)0x7d72, (q15_t)0xe693, (q15_t)0x7d71, (q15_t)0xe68d,\n    (q15_t)0x7d70, (q15_t)0xe686, (q15_t)0x7d6f, (q15_t)0xe680, (q15_t)0x7d6d,\n    (q15_t)0xe67a, (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d6b, (q15_t)0xe66e,\n    (q15_t)0x7d6a, (q15_t)0xe668, (q15_t)0x7d68, (q15_t)0xe661, (q15_t)0x7d67,\n    (q15_t)0xe65b, (q15_t)0x7d66, (q15_t)0xe655, (q15_t)0x7d65, (q15_t)0xe64f,\n    (q15_t)0x7d63, (q15_t)0xe649, (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d61,\n    (q15_t)0xe63d, (q15_t)0x7d60, (q15_t)0xe636, (q15_t)0x7d5e, (q15_t)0xe630,\n    (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d5c, (q15_t)0xe624, (q15_t)0x7d5a,\n    (q15_t)0xe61e, (q15_t)0x7d59, (q15_t)0xe618, (q15_t)0x7d58, (q15_t)0xe611,\n    (q15_t)0x7d57, (q15_t)0xe60b, (q15_t)0x7d55, (q15_t)0xe605, (q15_t)0x7d54,\n    (q15_t)0xe5ff, (q15_t)0x7d53, (q15_t)0xe5f9, (q15_t)0x7d52, (q15_t)0xe5f3,\n    (q15_t)0x7d50, (q15_t)0xe5ed, (q15_t)0x7d4f, (q15_t)0xe5e6, (q15_t)0x7d4e,\n    (q15_t)0xe5e0, (q15_t)0x7d4c, (q15_t)0xe5da, (q15_t)0x7d4b, (q15_t)0xe5d4,\n    (q15_t)0x7d4a, (q15_t)0xe5ce, (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d47,\n    (q15_t)0xe5c2, (q15_t)0x7d46, (q15_t)0xe5bb, (q15_t)0x7d45, (q15_t)0xe5b5,\n    (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d42, (q15_t)0xe5a9, (q15_t)0x7d41,\n    (q15_t)0xe5a3, (q15_t)0x7d3f, (q15_t)0xe59d, (q15_t)0x7d3e, (q15_t)0xe596,\n    (q15_t)0x7d3d, (q15_t)0xe590, (q15_t)0x7d3c, (q15_t)0xe58a, (q15_t)0x7d3a,\n    (q15_t)0xe584, (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d38, (q15_t)0xe578,\n    (q15_t)0x7d36, (q15_t)0xe572, (q15_t)0x7d35, (q15_t)0xe56b, (q15_t)0x7d34,\n    (q15_t)0xe565, (q15_t)0x7d32, (q15_t)0xe55f, (q15_t)0x7d31, (q15_t)0xe559,\n    (q15_t)0x7d30, (q15_t)0xe553, (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d2d,\n    (q15_t)0xe547, (q15_t)0x7d2c, (q15_t)0xe540, (q15_t)0x7d2b, (q15_t)0xe53a,\n    (q15_t)0x7d29, (q15_t)0xe534, (q15_t)0x7d28, (q15_t)0xe52e, (q15_t)0x7d27,\n    (q15_t)0xe528, (q15_t)0x7d25, (q15_t)0xe522, (q15_t)0x7d24, (q15_t)0xe51c,\n    (q15_t)0x7d23, (q15_t)0xe515, (q15_t)0x7d21, (q15_t)0xe50f, (q15_t)0x7d20,\n    (q15_t)0xe509, (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d1d, (q15_t)0xe4fd,\n    (q15_t)0x7d1c, (q15_t)0xe4f7, (q15_t)0x7d1b, (q15_t)0xe4f1, (q15_t)0x7d19,\n    (q15_t)0xe4ea, (q15_t)0x7d18, (q15_t)0xe4e4, (q15_t)0x7d17, (q15_t)0xe4de,\n    (q15_t)0x7d15, (q15_t)0xe4d8, (q15_t)0x7d14, (q15_t)0xe4d2, (q15_t)0x7d13,\n    (q15_t)0xe4cc, (q15_t)0x7d11, (q15_t)0xe4c6, (q15_t)0x7d10, (q15_t)0xe4bf,\n    (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d0d, (q15_t)0xe4b3, (q15_t)0x7d0c,\n    (q15_t)0xe4ad, (q15_t)0x7d0b, (q15_t)0xe4a7, (q15_t)0x7d09, (q15_t)0xe4a1,\n    (q15_t)0x7d08, (q15_t)0xe49b, (q15_t)0x7d07, (q15_t)0xe494, (q15_t)0x7d05,\n    (q15_t)0xe48e, (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7d03, (q15_t)0xe482,\n    (q15_t)0x7d01, (q15_t)0xe47c, (q15_t)0x7d00, (q15_t)0xe476, (q15_t)0x7cff,\n    (q15_t)0xe470, (q15_t)0x7cfd, (q15_t)0xe46a, (q15_t)0x7cfc, (q15_t)0xe463,\n    (q15_t)0x7cfb, (q15_t)0xe45d, (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf8,\n    (q15_t)0xe451, (q15_t)0x7cf6, (q15_t)0xe44b, (q15_t)0x7cf5, (q15_t)0xe445,\n    (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cf2, (q15_t)0xe438, (q15_t)0x7cf1,\n    (q15_t)0xe432, (q15_t)0x7cf0, (q15_t)0xe42c, (q15_t)0x7cee, (q15_t)0xe426,\n    (q15_t)0x7ced, (q15_t)0xe420, (q15_t)0x7cec, (q15_t)0xe41a, (q15_t)0x7cea,\n    (q15_t)0xe414, (q15_t)0x7ce9, (q15_t)0xe40e, (q15_t)0x7ce7, (q15_t)0xe407,\n    (q15_t)0x7ce6, (q15_t)0xe401, (q15_t)0x7ce5, (q15_t)0xe3fb, (q15_t)0x7ce3,\n    (q15_t)0xe3f5, (q15_t)0x7ce2, (q15_t)0xe3ef, (q15_t)0x7ce1, (q15_t)0xe3e9,\n    (q15_t)0x7cdf, (q15_t)0xe3e3, (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cdc,\n    (q15_t)0xe3d6, (q15_t)0x7cdb, (q15_t)0xe3d0, (q15_t)0x7cda, (q15_t)0xe3ca,\n    (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd7, (q15_t)0xe3be, (q15_t)0x7cd5,\n    (q15_t)0xe3b8, (q15_t)0x7cd4, (q15_t)0xe3b2, (q15_t)0x7cd3, (q15_t)0xe3ab,\n    (q15_t)0x7cd1, (q15_t)0xe3a5, (q15_t)0x7cd0, (q15_t)0xe39f, (q15_t)0x7ccf,\n    (q15_t)0xe399, (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7ccc, (q15_t)0xe38d,\n    (q15_t)0x7cca, (q15_t)0xe387, (q15_t)0x7cc9, (q15_t)0xe381, (q15_t)0x7cc8,\n    (q15_t)0xe37a, (q15_t)0x7cc6, (q15_t)0xe374, (q15_t)0x7cc5, (q15_t)0xe36e,\n    (q15_t)0x7cc3, (q15_t)0xe368, (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cc1,\n    (q15_t)0xe35c, (q15_t)0x7cbf, (q15_t)0xe356, (q15_t)0x7cbe, (q15_t)0xe350,\n    (q15_t)0x7cbc, (q15_t)0xe349, (q15_t)0x7cbb, (q15_t)0xe343, (q15_t)0x7cb9,\n    (q15_t)0xe33d, (q15_t)0x7cb8, (q15_t)0xe337, (q15_t)0x7cb7, (q15_t)0xe331,\n    (q15_t)0x7cb5, (q15_t)0xe32b, (q15_t)0x7cb4, (q15_t)0xe325, (q15_t)0x7cb2,\n    (q15_t)0xe31f, (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cb0, (q15_t)0xe312,\n    (q15_t)0x7cae, (q15_t)0xe30c, (q15_t)0x7cad, (q15_t)0xe306, (q15_t)0x7cab,\n    (q15_t)0xe300, (q15_t)0x7caa, (q15_t)0xe2fa, (q15_t)0x7ca8, (q15_t)0xe2f4,\n    (q15_t)0x7ca7, (q15_t)0xe2ee, (q15_t)0x7ca6, (q15_t)0xe2e8, (q15_t)0x7ca4,\n    (q15_t)0xe2e1, (q15_t)0x7ca3, (q15_t)0xe2db, (q15_t)0x7ca1, (q15_t)0xe2d5,\n    (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9e, (q15_t)0xe2c9, (q15_t)0x7c9d,\n    (q15_t)0xe2c3, (q15_t)0x7c9c, (q15_t)0xe2bd, (q15_t)0x7c9a, (q15_t)0xe2b7,\n    (q15_t)0x7c99, (q15_t)0xe2b0, (q15_t)0x7c97, (q15_t)0xe2aa, (q15_t)0x7c96,\n    (q15_t)0xe2a4, (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c93, (q15_t)0xe298,\n    (q15_t)0x7c91, (q15_t)0xe292, (q15_t)0x7c90, (q15_t)0xe28c, (q15_t)0x7c8f,\n    (q15_t)0xe286, (q15_t)0x7c8d, (q15_t)0xe280, (q15_t)0x7c8c, (q15_t)0xe279,\n    (q15_t)0x7c8a, (q15_t)0xe273, (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c87,\n    (q15_t)0xe267, (q15_t)0x7c86, (q15_t)0xe261, (q15_t)0x7c84, (q15_t)0xe25b,\n    (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c82, (q15_t)0xe24f, (q15_t)0x7c80,\n    (q15_t)0xe249, (q15_t)0x7c7f, (q15_t)0xe242, (q15_t)0x7c7d, (q15_t)0xe23c,\n    (q15_t)0x7c7c, (q15_t)0xe236, (q15_t)0x7c7a, (q15_t)0xe230, (q15_t)0x7c79,\n    (q15_t)0xe22a, (q15_t)0x7c77, (q15_t)0xe224, (q15_t)0x7c76, (q15_t)0xe21e,\n    (q15_t)0x7c74, (q15_t)0xe218, (q15_t)0x7c73, (q15_t)0xe212, (q15_t)0x7c71,\n    (q15_t)0xe20b, (q15_t)0x7c70, (q15_t)0xe205, (q15_t)0x7c6e, (q15_t)0xe1ff,\n    (q15_t)0x7c6d, (q15_t)0xe1f9, (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c6a,\n    (q15_t)0xe1ed, (q15_t)0x7c69, (q15_t)0xe1e7, (q15_t)0x7c67, (q15_t)0xe1e1,\n    (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c64, (q15_t)0xe1d4, (q15_t)0x7c63,\n    (q15_t)0xe1ce, (q15_t)0x7c61, (q15_t)0xe1c8, (q15_t)0x7c60, (q15_t)0xe1c2,\n    (q15_t)0x7c5e, (q15_t)0xe1bc, (q15_t)0x7c5d, (q15_t)0xe1b6, (q15_t)0x7c5b,\n    (q15_t)0xe1b0, (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c58, (q15_t)0xe1a4,\n    (q15_t)0x7c57, (q15_t)0xe19e, (q15_t)0x7c55, (q15_t)0xe197, (q15_t)0x7c54,\n    (q15_t)0xe191, (q15_t)0x7c52, (q15_t)0xe18b, (q15_t)0x7c51, (q15_t)0xe185,\n    (q15_t)0x7c4f, (q15_t)0xe17f, (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c4c,\n    (q15_t)0xe173, (q15_t)0x7c4b, (q15_t)0xe16d, (q15_t)0x7c49, (q15_t)0xe167,\n    (q15_t)0x7c48, (q15_t)0xe160, (q15_t)0x7c46, (q15_t)0xe15a, (q15_t)0x7c45,\n    (q15_t)0xe154, (q15_t)0x7c43, (q15_t)0xe14e, (q15_t)0x7c42, (q15_t)0xe148,\n    (q15_t)0x7c40, (q15_t)0xe142, (q15_t)0x7c3f, (q15_t)0xe13c, (q15_t)0x7c3d,\n    (q15_t)0xe136, (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c3a, (q15_t)0xe12a,\n    (q15_t)0x7c39, (q15_t)0xe123, (q15_t)0x7c37, (q15_t)0xe11d, (q15_t)0x7c36,\n    (q15_t)0xe117, (q15_t)0x7c34, (q15_t)0xe111, (q15_t)0x7c33, (q15_t)0xe10b,\n    (q15_t)0x7c31, (q15_t)0xe105, (q15_t)0x7c30, (q15_t)0xe0ff, (q15_t)0x7c2e,\n    (q15_t)0xe0f9, (q15_t)0x7c2d, (q15_t)0xe0f3, (q15_t)0x7c2b, (q15_t)0xe0ed,\n    (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c28, (q15_t)0xe0e0, (q15_t)0x7c26,\n    (q15_t)0xe0da, (q15_t)0x7c25, (q15_t)0xe0d4, (q15_t)0x7c23, (q15_t)0xe0ce,\n    (q15_t)0x7c22, (q15_t)0xe0c8, (q15_t)0x7c20, (q15_t)0xe0c2, (q15_t)0x7c1f,\n    (q15_t)0xe0bc, (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c1c, (q15_t)0xe0b0,\n    (q15_t)0x7c1a, (q15_t)0xe0aa, (q15_t)0x7c19, (q15_t)0xe0a3, (q15_t)0x7c17,\n    (q15_t)0xe09d, (q15_t)0x7c16, (q15_t)0xe097, (q15_t)0x7c14, (q15_t)0xe091,\n    (q15_t)0x7c12, (q15_t)0xe08b, (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0f,\n    (q15_t)0xe07f, (q15_t)0x7c0e, (q15_t)0xe079, (q15_t)0x7c0c, (q15_t)0xe073,\n    (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c09, (q15_t)0xe067, (q15_t)0x7c08,\n    (q15_t)0xe061, (q15_t)0x7c06, (q15_t)0xe05a, (q15_t)0x7c05, (q15_t)0xe054,\n    (q15_t)0x7c03, (q15_t)0xe04e, (q15_t)0x7c01, (q15_t)0xe048, (q15_t)0x7c00,\n    (q15_t)0xe042, (q15_t)0x7bfe, (q15_t)0xe03c, (q15_t)0x7bfd, (q15_t)0xe036,\n    (q15_t)0x7bfb, (q15_t)0xe030, (q15_t)0x7bfa, (q15_t)0xe02a, (q15_t)0x7bf8,\n    (q15_t)0xe024, (q15_t)0x7bf6, (q15_t)0xe01e, (q15_t)0x7bf5, (q15_t)0xe017,\n    (q15_t)0x7bf3, (q15_t)0xe011, (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7bf0,\n    (q15_t)0xe005, (q15_t)0x7bef, (q15_t)0xdfff, (q15_t)0x7bed, (q15_t)0xdff9,\n    (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7bea, (q15_t)0xdfed, (q15_t)0x7be8,\n    (q15_t)0xdfe7, (q15_t)0x7be7, (q15_t)0xdfe1, (q15_t)0x7be5, (q15_t)0xdfdb,\n    (q15_t)0x7be4, (q15_t)0xdfd5, (q15_t)0x7be2, (q15_t)0xdfce, (q15_t)0x7be0,\n    (q15_t)0xdfc8, (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bdd, (q15_t)0xdfbc,\n    (q15_t)0x7bdc, (q15_t)0xdfb6, (q15_t)0x7bda, (q15_t)0xdfb0, (q15_t)0x7bd9,\n    (q15_t)0xdfaa, (q15_t)0x7bd7, (q15_t)0xdfa4, (q15_t)0x7bd5, (q15_t)0xdf9e,\n    (q15_t)0x7bd4, (q15_t)0xdf98, (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bd1,\n    (q15_t)0xdf8c, (q15_t)0x7bcf, (q15_t)0xdf86, (q15_t)0x7bcd, (q15_t)0xdf7f,\n    (q15_t)0x7bcc, (q15_t)0xdf79, (q15_t)0x7bca, (q15_t)0xdf73, (q15_t)0x7bc9,\n    (q15_t)0xdf6d, (q15_t)0x7bc7, (q15_t)0xdf67, (q15_t)0x7bc5, (q15_t)0xdf61,\n    (q15_t)0x7bc4, (q15_t)0xdf5b, (q15_t)0x7bc2, (q15_t)0xdf55, (q15_t)0x7bc1,\n    (q15_t)0xdf4f, (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bbd, (q15_t)0xdf43,\n    (q15_t)0x7bbc, (q15_t)0xdf3d, (q15_t)0x7bba, (q15_t)0xdf37, (q15_t)0x7bb9,\n    (q15_t)0xdf30, (q15_t)0x7bb7, (q15_t)0xdf2a, (q15_t)0x7bb5, (q15_t)0xdf24,\n    (q15_t)0x7bb4, (q15_t)0xdf1e, (q15_t)0x7bb2, (q15_t)0xdf18, (q15_t)0x7bb0,\n    (q15_t)0xdf12, (q15_t)0x7baf, (q15_t)0xdf0c, (q15_t)0x7bad, (q15_t)0xdf06,\n    (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7baa, (q15_t)0xdefa, (q15_t)0x7ba8,\n    (q15_t)0xdef4, (q15_t)0x7ba7, (q15_t)0xdeee, (q15_t)0x7ba5, (q15_t)0xdee8,\n    (q15_t)0x7ba3, (q15_t)0xdee2, (q15_t)0x7ba2, (q15_t)0xdedb, (q15_t)0x7ba0,\n    (q15_t)0xded5, (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b9d, (q15_t)0xdec9,\n    (q15_t)0x7b9b, (q15_t)0xdec3, (q15_t)0x7b9a, (q15_t)0xdebd, (q15_t)0x7b98,\n    (q15_t)0xdeb7, (q15_t)0x7b96, (q15_t)0xdeb1, (q15_t)0x7b95, (q15_t)0xdeab,\n    (q15_t)0x7b93, (q15_t)0xdea5, (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b90,\n    (q15_t)0xde99, (q15_t)0x7b8e, (q15_t)0xde93, (q15_t)0x7b8d, (q15_t)0xde8d,\n    (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b89, (q15_t)0xde80, (q15_t)0x7b88,\n    (q15_t)0xde7a, (q15_t)0x7b86, (q15_t)0xde74, (q15_t)0x7b84, (q15_t)0xde6e,\n    (q15_t)0x7b83, (q15_t)0xde68, (q15_t)0x7b81, (q15_t)0xde62, (q15_t)0x7b7f,\n    (q15_t)0xde5c, (q15_t)0x7b7e, (q15_t)0xde56, (q15_t)0x7b7c, (q15_t)0xde50,\n    (q15_t)0x7b7a, (q15_t)0xde4a, (q15_t)0x7b79, (q15_t)0xde44, (q15_t)0x7b77,\n    (q15_t)0xde3e, (q15_t)0x7b76, (q15_t)0xde38, (q15_t)0x7b74, (q15_t)0xde32,\n    (q15_t)0x7b72, (q15_t)0xde2c, (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6f,\n    (q15_t)0xde1f, (q15_t)0x7b6d, (q15_t)0xde19, (q15_t)0x7b6c, (q15_t)0xde13,\n    (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b68, (q15_t)0xde07, (q15_t)0x7b67,\n    (q15_t)0xde01, (q15_t)0x7b65, (q15_t)0xddfb, (q15_t)0x7b63, (q15_t)0xddf5,\n    (q15_t)0x7b62, (q15_t)0xddef, (q15_t)0x7b60, (q15_t)0xdde9, (q15_t)0x7b5e,\n    (q15_t)0xdde3, (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b5b, (q15_t)0xddd7,\n    (q15_t)0x7b59, (q15_t)0xddd1, (q15_t)0x7b57, (q15_t)0xddcb, (q15_t)0x7b56,\n    (q15_t)0xddc5, (q15_t)0x7b54, (q15_t)0xddbf, (q15_t)0x7b52, (q15_t)0xddb9,\n    (q15_t)0x7b51, (q15_t)0xddb2, (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b4d,\n    (q15_t)0xdda6, (q15_t)0x7b4c, (q15_t)0xdda0, (q15_t)0x7b4a, (q15_t)0xdd9a,\n    (q15_t)0x7b48, (q15_t)0xdd94, (q15_t)0x7b47, (q15_t)0xdd8e, (q15_t)0x7b45,\n    (q15_t)0xdd88, (q15_t)0x7b43, (q15_t)0xdd82, (q15_t)0x7b42, (q15_t)0xdd7c,\n    (q15_t)0x7b40, (q15_t)0xdd76, (q15_t)0x7b3e, (q15_t)0xdd70, (q15_t)0x7b3c,\n    (q15_t)0xdd6a, (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b39, (q15_t)0xdd5e,\n    (q15_t)0x7b37, (q15_t)0xdd58, (q15_t)0x7b36, (q15_t)0xdd52, (q15_t)0x7b34,\n    (q15_t)0xdd4c, (q15_t)0x7b32, (q15_t)0xdd46, (q15_t)0x7b31, (q15_t)0xdd40,\n    (q15_t)0x7b2f, (q15_t)0xdd39, (q15_t)0x7b2d, (q15_t)0xdd33, (q15_t)0x7b2b,\n    (q15_t)0xdd2d, (q15_t)0x7b2a, (q15_t)0xdd27, (q15_t)0x7b28, (q15_t)0xdd21,\n    (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b25, (q15_t)0xdd15, (q15_t)0x7b23,\n    (q15_t)0xdd0f, (q15_t)0x7b21, (q15_t)0xdd09, (q15_t)0x7b1f, (q15_t)0xdd03,\n    (q15_t)0x7b1e, (q15_t)0xdcfd, (q15_t)0x7b1c, (q15_t)0xdcf7, (q15_t)0x7b1a,\n    (q15_t)0xdcf1, (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b17, (q15_t)0xdce5,\n    (q15_t)0x7b15, (q15_t)0xdcdf, (q15_t)0x7b13, (q15_t)0xdcd9, (q15_t)0x7b12,\n    (q15_t)0xdcd3, (q15_t)0x7b10, (q15_t)0xdccd, (q15_t)0x7b0e, (q15_t)0xdcc7,\n    (q15_t)0x7b0c, (q15_t)0xdcc1, (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b09,\n    (q15_t)0xdcb5, (q15_t)0x7b07, (q15_t)0xdcae, (q15_t)0x7b06, (q15_t)0xdca8,\n    (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7b02, (q15_t)0xdc9c, (q15_t)0x7b00,\n    (q15_t)0xdc96, (q15_t)0x7aff, (q15_t)0xdc90, (q15_t)0x7afd, (q15_t)0xdc8a,\n    (q15_t)0x7afb, (q15_t)0xdc84, (q15_t)0x7af9, (q15_t)0xdc7e, (q15_t)0x7af8,\n    (q15_t)0xdc78, (q15_t)0x7af6, (q15_t)0xdc72, (q15_t)0x7af4, (q15_t)0xdc6c,\n    (q15_t)0x7af2, (q15_t)0xdc66, (q15_t)0x7af1, (q15_t)0xdc60, (q15_t)0x7aef,\n    (q15_t)0xdc5a, (q15_t)0x7aed, (q15_t)0xdc54, (q15_t)0x7aeb, (q15_t)0xdc4e,\n    (q15_t)0x7aea, (q15_t)0xdc48, (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae6,\n    (q15_t)0xdc3c, (q15_t)0x7ae4, (q15_t)0xdc36, (q15_t)0x7ae3, (q15_t)0xdc30,\n    (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7adf, (q15_t)0xdc24, (q15_t)0x7add,\n    (q15_t)0xdc1e, (q15_t)0x7adc, (q15_t)0xdc18, (q15_t)0x7ada, (q15_t)0xdc12,\n    (q15_t)0x7ad8, (q15_t)0xdc0c, (q15_t)0x7ad6, (q15_t)0xdc06, (q15_t)0x7ad5,\n    (q15_t)0xdbff, (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ad1, (q15_t)0xdbf3,\n    (q15_t)0x7acf, (q15_t)0xdbed, (q15_t)0x7acd, (q15_t)0xdbe7, (q15_t)0x7acc,\n    (q15_t)0xdbe1, (q15_t)0x7aca, (q15_t)0xdbdb, (q15_t)0x7ac8, (q15_t)0xdbd5,\n    (q15_t)0x7ac6, (q15_t)0xdbcf, (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7ac3,\n    (q15_t)0xdbc3, (q15_t)0x7ac1, (q15_t)0xdbbd, (q15_t)0x7abf, (q15_t)0xdbb7,\n    (q15_t)0x7abd, (q15_t)0xdbb1, (q15_t)0x7abc, (q15_t)0xdbab, (q15_t)0x7aba,\n    (q15_t)0xdba5, (q15_t)0x7ab8, (q15_t)0xdb9f, (q15_t)0x7ab6, (q15_t)0xdb99,\n    (q15_t)0x7ab5, (q15_t)0xdb93, (q15_t)0x7ab3, (q15_t)0xdb8d, (q15_t)0x7ab1,\n    (q15_t)0xdb87, (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aad, (q15_t)0xdb7b,\n    (q15_t)0x7aac, (q15_t)0xdb75, (q15_t)0x7aaa, (q15_t)0xdb6f, (q15_t)0x7aa8,\n    (q15_t)0xdb69, (q15_t)0x7aa6, (q15_t)0xdb63, (q15_t)0x7aa4, (q15_t)0xdb5d,\n    (q15_t)0x7aa3, (q15_t)0xdb57, (q15_t)0x7aa1, (q15_t)0xdb51, (q15_t)0x7a9f,\n    (q15_t)0xdb4b, (q15_t)0x7a9d, (q15_t)0xdb45, (q15_t)0x7a9b, (q15_t)0xdb3f,\n    (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a98, (q15_t)0xdb33, (q15_t)0x7a96,\n    (q15_t)0xdb2d, (q15_t)0x7a94, (q15_t)0xdb27, (q15_t)0x7a92, (q15_t)0xdb21,\n    (q15_t)0x7a91, (q15_t)0xdb1b, (q15_t)0x7a8f, (q15_t)0xdb15, (q15_t)0x7a8d,\n    (q15_t)0xdb0f, (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a89, (q15_t)0xdb03,\n    (q15_t)0x7a87, (q15_t)0xdafd, (q15_t)0x7a86, (q15_t)0xdaf7, (q15_t)0x7a84,\n    (q15_t)0xdaf1, (q15_t)0x7a82, (q15_t)0xdaea, (q15_t)0x7a80, (q15_t)0xdae4,\n    (q15_t)0x7a7e, (q15_t)0xdade, (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a7b,\n    (q15_t)0xdad2, (q15_t)0x7a79, (q15_t)0xdacc, (q15_t)0x7a77, (q15_t)0xdac6,\n    (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a73, (q15_t)0xdaba, (q15_t)0x7a72,\n    (q15_t)0xdab4, (q15_t)0x7a70, (q15_t)0xdaae, (q15_t)0x7a6e, (q15_t)0xdaa8,\n    (q15_t)0x7a6c, (q15_t)0xdaa2, (q15_t)0x7a6a, (q15_t)0xda9c, (q15_t)0x7a68,\n    (q15_t)0xda96, (q15_t)0x7a67, (q15_t)0xda90, (q15_t)0x7a65, (q15_t)0xda8a,\n    (q15_t)0x7a63, (q15_t)0xda84, (q15_t)0x7a61, (q15_t)0xda7e, (q15_t)0x7a5f,\n    (q15_t)0xda78, (q15_t)0x7a5d, (q15_t)0xda72, (q15_t)0x7a5c, (q15_t)0xda6c,\n    (q15_t)0x7a5a, (q15_t)0xda66, (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a56,\n    (q15_t)0xda5a, (q15_t)0x7a54, (q15_t)0xda54, (q15_t)0x7a52, (q15_t)0xda4e,\n    (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a4f, (q15_t)0xda42, (q15_t)0x7a4d,\n    (q15_t)0xda3c, (q15_t)0x7a4b, (q15_t)0xda36, (q15_t)0x7a49, (q15_t)0xda30,\n    (q15_t)0x7a47, (q15_t)0xda2a, (q15_t)0x7a45, (q15_t)0xda24, (q15_t)0x7a43,\n    (q15_t)0xda1e, (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a40, (q15_t)0xda12,\n    (q15_t)0x7a3e, (q15_t)0xda0c, (q15_t)0x7a3c, (q15_t)0xda06, (q15_t)0x7a3a,\n    (q15_t)0xda00, (q15_t)0x7a38, (q15_t)0xd9fa, (q15_t)0x7a36, (q15_t)0xd9f4,\n    (q15_t)0x7a35, (q15_t)0xd9ee, (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a31,\n    (q15_t)0xd9e2, (q15_t)0x7a2f, (q15_t)0xd9dc, (q15_t)0x7a2d, (q15_t)0xd9d6,\n    (q15_t)0x7a2b, (q15_t)0xd9d0, (q15_t)0x7a29, (q15_t)0xd9ca, (q15_t)0x7a27,\n    (q15_t)0xd9c4, (q15_t)0x7a26, (q15_t)0xd9be, (q15_t)0x7a24, (q15_t)0xd9b8,\n    (q15_t)0x7a22, (q15_t)0xd9b2, (q15_t)0x7a20, (q15_t)0xd9ac, (q15_t)0x7a1e,\n    (q15_t)0xd9a6, (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a1a, (q15_t)0xd99a,\n    (q15_t)0x7a18, (q15_t)0xd994, (q15_t)0x7a16, (q15_t)0xd98e, (q15_t)0x7a15,\n    (q15_t)0xd988, (q15_t)0x7a13, (q15_t)0xd982, (q15_t)0x7a11, (q15_t)0xd97c,\n    (q15_t)0x7a0f, (q15_t)0xd976, (q15_t)0x7a0d, (q15_t)0xd970, (q15_t)0x7a0b,\n    (q15_t)0xd96a, (q15_t)0x7a09, (q15_t)0xd964, (q15_t)0x7a07, (q15_t)0xd95e,\n    (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x7a04, (q15_t)0xd952, (q15_t)0x7a02,\n    (q15_t)0xd94c, (q15_t)0x7a00, (q15_t)0xd946, (q15_t)0x79fe, (q15_t)0xd940,\n    (q15_t)0x79fc, (q15_t)0xd93a, (q15_t)0x79fa, (q15_t)0xd934, (q15_t)0x79f8,\n    (q15_t)0xd92e, (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79f4, (q15_t)0xd922,\n    (q15_t)0x79f2, (q15_t)0xd91c, (q15_t)0x79f0, (q15_t)0xd917, (q15_t)0x79ef,\n    (q15_t)0xd911, (q15_t)0x79ed, (q15_t)0xd90b, (q15_t)0x79eb, (q15_t)0xd905,\n    (q15_t)0x79e9, (q15_t)0xd8ff, (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79e5,\n    (q15_t)0xd8f3, (q15_t)0x79e3, (q15_t)0xd8ed, (q15_t)0x79e1, (q15_t)0xd8e7,\n    (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79dd, (q15_t)0xd8db, (q15_t)0x79db,\n    (q15_t)0xd8d5, (q15_t)0x79d9, (q15_t)0xd8cf, (q15_t)0x79d8, (q15_t)0xd8c9,\n    (q15_t)0x79d6, (q15_t)0xd8c3, (q15_t)0x79d4, (q15_t)0xd8bd, (q15_t)0x79d2,\n    (q15_t)0xd8b7, (q15_t)0x79d0, (q15_t)0xd8b1, (q15_t)0x79ce, (q15_t)0xd8ab,\n    (q15_t)0x79cc, (q15_t)0xd8a5, (q15_t)0x79ca, (q15_t)0xd89f, (q15_t)0x79c8,\n    (q15_t)0xd899, (q15_t)0x79c6, (q15_t)0xd893, (q15_t)0x79c4, (q15_t)0xd88d,\n    (q15_t)0x79c2, (q15_t)0xd887, (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79be,\n    (q15_t)0xd87b, (q15_t)0x79bc, (q15_t)0xd875, (q15_t)0x79bb, (q15_t)0xd86f,\n    (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b7, (q15_t)0xd863, (q15_t)0x79b5,\n    (q15_t)0xd85d, (q15_t)0x79b3, (q15_t)0xd857, (q15_t)0x79b1, (q15_t)0xd851,\n    (q15_t)0x79af, (q15_t)0xd84b, (q15_t)0x79ad, (q15_t)0xd845, (q15_t)0x79ab,\n    (q15_t)0xd83f, (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a7, (q15_t)0xd833,\n    (q15_t)0x79a5, (q15_t)0xd82d, (q15_t)0x79a3, (q15_t)0xd827, (q15_t)0x79a1,\n    (q15_t)0xd821, (q15_t)0x799f, (q15_t)0xd81b, (q15_t)0x799d, (q15_t)0xd815,\n    (q15_t)0x799b, (q15_t)0xd80f, (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7997,\n    (q15_t)0xd804, (q15_t)0x7995, (q15_t)0xd7fe, (q15_t)0x7993, (q15_t)0xd7f8,\n    (q15_t)0x7992, (q15_t)0xd7f2, (q15_t)0x7990, (q15_t)0xd7ec, (q15_t)0x798e,\n    (q15_t)0xd7e6, (q15_t)0x798c, (q15_t)0xd7e0, (q15_t)0x798a, (q15_t)0xd7da,\n    (q15_t)0x7988, (q15_t)0xd7d4, (q15_t)0x7986, (q15_t)0xd7ce, (q15_t)0x7984,\n    (q15_t)0xd7c8, (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x7980, (q15_t)0xd7bc,\n    (q15_t)0x797e, (q15_t)0xd7b6, (q15_t)0x797c, (q15_t)0xd7b0, (q15_t)0x797a,\n    (q15_t)0xd7aa, (q15_t)0x7978, (q15_t)0xd7a4, (q15_t)0x7976, (q15_t)0xd79e,\n    (q15_t)0x7974, (q15_t)0xd798, (q15_t)0x7972, (q15_t)0xd792, (q15_t)0x7970,\n    (q15_t)0xd78c, (q15_t)0x796e, (q15_t)0xd786, (q15_t)0x796c, (q15_t)0xd780,\n    (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7968, (q15_t)0xd774, (q15_t)0x7966,\n    (q15_t)0xd76e, (q15_t)0x7964, (q15_t)0xd768, (q15_t)0x7962, (q15_t)0xd763,\n    (q15_t)0x7960, (q15_t)0xd75d, (q15_t)0x795e, (q15_t)0xd757, (q15_t)0x795c,\n    (q15_t)0xd751, (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7958, (q15_t)0xd745,\n    (q15_t)0x7956, (q15_t)0xd73f, (q15_t)0x7954, (q15_t)0xd739, (q15_t)0x7952,\n    (q15_t)0xd733, (q15_t)0x7950, (q15_t)0xd72d, (q15_t)0x794e, (q15_t)0xd727,\n    (q15_t)0x794c, (q15_t)0xd721, (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7948,\n    (q15_t)0xd715, (q15_t)0x7946, (q15_t)0xd70f, (q15_t)0x7944, (q15_t)0xd709,\n    (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x7940, (q15_t)0xd6fd, (q15_t)0x793e,\n    (q15_t)0xd6f7, (q15_t)0x793c, (q15_t)0xd6f1, (q15_t)0x793a, (q15_t)0xd6eb,\n    (q15_t)0x7938, (q15_t)0xd6e5, (q15_t)0x7936, (q15_t)0xd6e0, (q15_t)0x7934,\n    (q15_t)0xd6da, (q15_t)0x7932, (q15_t)0xd6d4, (q15_t)0x7930, (q15_t)0xd6ce,\n    (q15_t)0x792e, (q15_t)0xd6c8, (q15_t)0x792c, (q15_t)0xd6c2, (q15_t)0x792a,\n    (q15_t)0xd6bc, (q15_t)0x7928, (q15_t)0xd6b6, (q15_t)0x7926, (q15_t)0xd6b0,\n    (q15_t)0x7924, (q15_t)0xd6aa, (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7920,\n    (q15_t)0xd69e, (q15_t)0x791e, (q15_t)0xd698, (q15_t)0x791c, (q15_t)0xd692,\n    (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7917, (q15_t)0xd686, (q15_t)0x7915,\n    (q15_t)0xd680, (q15_t)0x7913, (q15_t)0xd67a, (q15_t)0x7911, (q15_t)0xd675,\n    (q15_t)0x790f, (q15_t)0xd66f, (q15_t)0x790d, (q15_t)0xd669, (q15_t)0x790b,\n    (q15_t)0xd663, (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7907, (q15_t)0xd657,\n    (q15_t)0x7905, (q15_t)0xd651, (q15_t)0x7903, (q15_t)0xd64b, (q15_t)0x7901,\n    (q15_t)0xd645, (q15_t)0x78ff, (q15_t)0xd63f, (q15_t)0x78fd, (q15_t)0xd639,\n    (q15_t)0x78fb, (q15_t)0xd633, (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f7,\n    (q15_t)0xd627, (q15_t)0x78f5, (q15_t)0xd621, (q15_t)0x78f3, (q15_t)0xd61b,\n    (q15_t)0x78f1, (q15_t)0xd615, (q15_t)0x78ee, (q15_t)0xd610, (q15_t)0x78ec,\n    (q15_t)0xd60a, (q15_t)0x78ea, (q15_t)0xd604, (q15_t)0x78e8, (q15_t)0xd5fe,\n    (q15_t)0x78e6, (q15_t)0xd5f8, (q15_t)0x78e4, (q15_t)0xd5f2, (q15_t)0x78e2,\n    (q15_t)0xd5ec, (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78de, (q15_t)0xd5e0,\n    (q15_t)0x78dc, (q15_t)0xd5da, (q15_t)0x78da, (q15_t)0xd5d4, (q15_t)0x78d8,\n    (q15_t)0xd5ce, (q15_t)0x78d6, (q15_t)0xd5c8, (q15_t)0x78d4, (q15_t)0xd5c2,\n    (q15_t)0x78d2, (q15_t)0xd5bc, (q15_t)0x78cf, (q15_t)0xd5b7, (q15_t)0x78cd,\n    (q15_t)0xd5b1, (q15_t)0x78cb, (q15_t)0xd5ab, (q15_t)0x78c9, (q15_t)0xd5a5,\n    (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78c5, (q15_t)0xd599, (q15_t)0x78c3,\n    (q15_t)0xd593, (q15_t)0x78c1, (q15_t)0xd58d, (q15_t)0x78bf, (q15_t)0xd587,\n    (q15_t)0x78bd, (q15_t)0xd581, (q15_t)0x78bb, (q15_t)0xd57b, (q15_t)0x78b9,\n    (q15_t)0xd575, (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78b4, (q15_t)0xd569,\n    (q15_t)0x78b2, (q15_t)0xd564, (q15_t)0x78b0, (q15_t)0xd55e, (q15_t)0x78ae,\n    (q15_t)0xd558, (q15_t)0x78ac, (q15_t)0xd552, (q15_t)0x78aa, (q15_t)0xd54c,\n    (q15_t)0x78a8, (q15_t)0xd546, (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x78a4,\n    (q15_t)0xd53a, (q15_t)0x78a2, (q15_t)0xd534, (q15_t)0x789f, (q15_t)0xd52e,\n    (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x789b, (q15_t)0xd522, (q15_t)0x7899,\n    (q15_t)0xd51c, (q15_t)0x7897, (q15_t)0xd517, (q15_t)0x7895, (q15_t)0xd511,\n    (q15_t)0x7893, (q15_t)0xd50b, (q15_t)0x7891, (q15_t)0xd505, (q15_t)0x788f,\n    (q15_t)0xd4ff, (q15_t)0x788c, (q15_t)0xd4f9, (q15_t)0x788a, (q15_t)0xd4f3,\n    (q15_t)0x7888, (q15_t)0xd4ed, (q15_t)0x7886, (q15_t)0xd4e7, (q15_t)0x7884,\n    (q15_t)0xd4e1, (q15_t)0x7882, (q15_t)0xd4db, (q15_t)0x7880, (q15_t)0xd4d5,\n    (q15_t)0x787e, (q15_t)0xd4d0, (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7879,\n    (q15_t)0xd4c4, (q15_t)0x7877, (q15_t)0xd4be, (q15_t)0x7875, (q15_t)0xd4b8,\n    (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x7871, (q15_t)0xd4ac, (q15_t)0x786f,\n    (q15_t)0xd4a6, (q15_t)0x786d, (q15_t)0xd4a0, (q15_t)0x786b, (q15_t)0xd49a,\n    (q15_t)0x7868, (q15_t)0xd494, (q15_t)0x7866, (q15_t)0xd48f, (q15_t)0x7864,\n    (q15_t)0xd489, (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7860, (q15_t)0xd47d,\n    (q15_t)0x785e, (q15_t)0xd477, (q15_t)0x785c, (q15_t)0xd471, (q15_t)0x7859,\n    (q15_t)0xd46b, (q15_t)0x7857, (q15_t)0xd465, (q15_t)0x7855, (q15_t)0xd45f,\n    (q15_t)0x7853, (q15_t)0xd459, (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x784f,\n    (q15_t)0xd44e, (q15_t)0x784d, (q15_t)0xd448, (q15_t)0x784a, (q15_t)0xd442,\n    (q15_t)0x7848, (q15_t)0xd43c, (q15_t)0x7846, (q15_t)0xd436, (q15_t)0x7844,\n    (q15_t)0xd430, (q15_t)0x7842, (q15_t)0xd42a, (q15_t)0x7840, (q15_t)0xd424,\n    (q15_t)0x783e, (q15_t)0xd41e, (q15_t)0x783b, (q15_t)0xd418, (q15_t)0x7839,\n    (q15_t)0xd412, (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x7835, (q15_t)0xd407,\n    (q15_t)0x7833, (q15_t)0xd401, (q15_t)0x7831, (q15_t)0xd3fb, (q15_t)0x782e,\n    (q15_t)0xd3f5, (q15_t)0x782c, (q15_t)0xd3ef, (q15_t)0x782a, (q15_t)0xd3e9,\n    (q15_t)0x7828, (q15_t)0xd3e3, (q15_t)0x7826, (q15_t)0xd3dd, (q15_t)0x7824,\n    (q15_t)0xd3d7, (q15_t)0x7821, (q15_t)0xd3d2, (q15_t)0x781f, (q15_t)0xd3cc,\n    (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x781b, (q15_t)0xd3c0, (q15_t)0x7819,\n    (q15_t)0xd3ba, (q15_t)0x7817, (q15_t)0xd3b4, (q15_t)0x7814, (q15_t)0xd3ae,\n    (q15_t)0x7812, (q15_t)0xd3a8, (q15_t)0x7810, (q15_t)0xd3a2, (q15_t)0x780e,\n    (q15_t)0xd39d, (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x780a, (q15_t)0xd391,\n    (q15_t)0x7807, (q15_t)0xd38b, (q15_t)0x7805, (q15_t)0xd385, (q15_t)0x7803,\n    (q15_t)0xd37f, (q15_t)0x7801, (q15_t)0xd379, (q15_t)0x77ff, (q15_t)0xd373,\n    (q15_t)0x77fc, (q15_t)0xd36d, (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f8,\n    (q15_t)0xd362, (q15_t)0x77f6, (q15_t)0xd35c, (q15_t)0x77f4, (q15_t)0xd356,\n    (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77ef, (q15_t)0xd34a, (q15_t)0x77ed,\n    (q15_t)0xd344, (q15_t)0x77eb, (q15_t)0xd33e, (q15_t)0x77e9, (q15_t)0xd338,\n    (q15_t)0x77e6, (q15_t)0xd333, (q15_t)0x77e4, (q15_t)0xd32d, (q15_t)0x77e2,\n    (q15_t)0xd327, (q15_t)0x77e0, (q15_t)0xd321, (q15_t)0x77de, (q15_t)0xd31b,\n    (q15_t)0x77db, (q15_t)0xd315, (q15_t)0x77d9, (q15_t)0xd30f, (q15_t)0x77d7,\n    (q15_t)0xd309, (q15_t)0x77d5, (q15_t)0xd303, (q15_t)0x77d3, (q15_t)0xd2fe,\n    (q15_t)0x77d0, (q15_t)0xd2f8, (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77cc,\n    (q15_t)0xd2ec, (q15_t)0x77ca, (q15_t)0xd2e6, (q15_t)0x77c8, (q15_t)0xd2e0,\n    (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77c3, (q15_t)0xd2d4, (q15_t)0x77c1,\n    (q15_t)0xd2cf, (q15_t)0x77bf, (q15_t)0xd2c9, (q15_t)0x77bc, (q15_t)0xd2c3,\n    (q15_t)0x77ba, (q15_t)0xd2bd, (q15_t)0x77b8, (q15_t)0xd2b7, (q15_t)0x77b6,\n    (q15_t)0xd2b1, (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77b1, (q15_t)0xd2a5,\n    (q15_t)0x77af, (q15_t)0xd2a0, (q15_t)0x77ad, (q15_t)0xd29a, (q15_t)0x77ab,\n    (q15_t)0xd294, (q15_t)0x77a8, (q15_t)0xd28e, (q15_t)0x77a6, (q15_t)0xd288,\n    (q15_t)0x77a4, (q15_t)0xd282, (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x77a0,\n    (q15_t)0xd276, (q15_t)0x779d, (q15_t)0xd271, (q15_t)0x779b, (q15_t)0xd26b,\n    (q15_t)0x7799, (q15_t)0xd265, (q15_t)0x7797, (q15_t)0xd25f, (q15_t)0x7794,\n    (q15_t)0xd259, (q15_t)0x7792, (q15_t)0xd253, (q15_t)0x7790, (q15_t)0xd24d,\n    (q15_t)0x778e, (q15_t)0xd247, (q15_t)0x778b, (q15_t)0xd242, (q15_t)0x7789,\n    (q15_t)0xd23c, (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x7785, (q15_t)0xd230,\n    (q15_t)0x7782, (q15_t)0xd22a, (q15_t)0x7780, (q15_t)0xd224, (q15_t)0x777e,\n    (q15_t)0xd21e, (q15_t)0x777c, (q15_t)0xd219, (q15_t)0x7779, (q15_t)0xd213,\n    (q15_t)0x7777, (q15_t)0xd20d, (q15_t)0x7775, (q15_t)0xd207, (q15_t)0x7773,\n    (q15_t)0xd201, (q15_t)0x7770, (q15_t)0xd1fb, (q15_t)0x776e, (q15_t)0xd1f5,\n    (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x776a, (q15_t)0xd1ea, (q15_t)0x7767,\n    (q15_t)0xd1e4, (q15_t)0x7765, (q15_t)0xd1de, (q15_t)0x7763, (q15_t)0xd1d8,\n    (q15_t)0x7760, (q15_t)0xd1d2, (q15_t)0x775e, (q15_t)0xd1cc, (q15_t)0x775c,\n    (q15_t)0xd1c6, (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7757, (q15_t)0xd1bb,\n    (q15_t)0x7755, (q15_t)0xd1b5, (q15_t)0x7753, (q15_t)0xd1af, (q15_t)0x7751,\n    (q15_t)0xd1a9, (q15_t)0x774e, (q15_t)0xd1a3, (q15_t)0x774c, (q15_t)0xd19d,\n    (q15_t)0x774a, (q15_t)0xd198, (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7745,\n    (q15_t)0xd18c, (q15_t)0x7743, (q15_t)0xd186, (q15_t)0x7741, (q15_t)0xd180,\n    (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x773c, (q15_t)0xd174, (q15_t)0x773a,\n    (q15_t)0xd16f, (q15_t)0x7738, (q15_t)0xd169, (q15_t)0x7735, (q15_t)0xd163,\n    (q15_t)0x7733, (q15_t)0xd15d, (q15_t)0x7731, (q15_t)0xd157, (q15_t)0x772e,\n    (q15_t)0xd151, (q15_t)0x772c, (q15_t)0xd14b, (q15_t)0x772a, (q15_t)0xd146,\n    (q15_t)0x7727, (q15_t)0xd140, (q15_t)0x7725, (q15_t)0xd13a, (q15_t)0x7723,\n    (q15_t)0xd134, (q15_t)0x7721, (q15_t)0xd12e, (q15_t)0x771e, (q15_t)0xd128,\n    (q15_t)0x771c, (q15_t)0xd123, (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7717,\n    (q15_t)0xd117, (q15_t)0x7715, (q15_t)0xd111, (q15_t)0x7713, (q15_t)0xd10b,\n    (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x770e, (q15_t)0xd0ff, (q15_t)0x770c,\n    (q15_t)0xd0fa, (q15_t)0x770a, (q15_t)0xd0f4, (q15_t)0x7707, (q15_t)0xd0ee,\n    (q15_t)0x7705, (q15_t)0xd0e8, (q15_t)0x7703, (q15_t)0xd0e2, (q15_t)0x7700,\n    (q15_t)0xd0dc, (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76fc, (q15_t)0xd0d1,\n    (q15_t)0x76f9, (q15_t)0xd0cb, (q15_t)0x76f7, (q15_t)0xd0c5, (q15_t)0x76f5,\n    (q15_t)0xd0bf, (q15_t)0x76f2, (q15_t)0xd0b9, (q15_t)0x76f0, (q15_t)0xd0b4,\n    (q15_t)0x76ee, (q15_t)0xd0ae, (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e9,\n    (q15_t)0xd0a2, (q15_t)0x76e7, (q15_t)0xd09c, (q15_t)0x76e4, (q15_t)0xd096,\n    (q15_t)0x76e2, (q15_t)0xd091, (q15_t)0x76e0, (q15_t)0xd08b, (q15_t)0x76dd,\n    (q15_t)0xd085, (q15_t)0x76db, (q15_t)0xd07f, (q15_t)0x76d9, (q15_t)0xd079,\n    (q15_t)0x76d6, (q15_t)0xd073, (q15_t)0x76d4, (q15_t)0xd06e, (q15_t)0x76d2,\n    (q15_t)0xd068, (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76cd, (q15_t)0xd05c,\n    (q15_t)0x76cb, (q15_t)0xd056, (q15_t)0x76c8, (q15_t)0xd050, (q15_t)0x76c6,\n    (q15_t)0xd04b, (q15_t)0x76c4, (q15_t)0xd045, (q15_t)0x76c1, (q15_t)0xd03f,\n    (q15_t)0x76bf, (q15_t)0xd039, (q15_t)0x76bd, (q15_t)0xd033, (q15_t)0x76ba,\n    (q15_t)0xd02d, (q15_t)0x76b8, (q15_t)0xd028, (q15_t)0x76b6, (q15_t)0xd022,\n    (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76b1, (q15_t)0xd016, (q15_t)0x76af,\n    (q15_t)0xd010, (q15_t)0x76ac, (q15_t)0xd00a, (q15_t)0x76aa, (q15_t)0xd005,\n    (q15_t)0x76a8, (q15_t)0xcfff, (q15_t)0x76a5, (q15_t)0xcff9, (q15_t)0x76a3,\n    (q15_t)0xcff3, (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x769e, (q15_t)0xcfe7,\n    (q15_t)0x769c, (q15_t)0xcfe2, (q15_t)0x7699, (q15_t)0xcfdc, (q15_t)0x7697,\n    (q15_t)0xcfd6, (q15_t)0x7695, (q15_t)0xcfd0, (q15_t)0x7692, (q15_t)0xcfca,\n    (q15_t)0x7690, (q15_t)0xcfc5, (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x768b,\n    (q15_t)0xcfb9, (q15_t)0x7689, (q15_t)0xcfb3, (q15_t)0x7686, (q15_t)0xcfad,\n    (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x7682, (q15_t)0xcfa2, (q15_t)0x767f,\n    (q15_t)0xcf9c, (q15_t)0x767d, (q15_t)0xcf96, (q15_t)0x767b, (q15_t)0xcf90,\n    (q15_t)0x7678, (q15_t)0xcf8a, (q15_t)0x7676, (q15_t)0xcf85, (q15_t)0x7673,\n    (q15_t)0xcf7f, (q15_t)0x7671, (q15_t)0xcf79, (q15_t)0x766f, (q15_t)0xcf73,\n    (q15_t)0x766c, (q15_t)0xcf6d, (q15_t)0x766a, (q15_t)0xcf67, (q15_t)0x7668,\n    (q15_t)0xcf62, (q15_t)0x7665, (q15_t)0xcf5c, (q15_t)0x7663, (q15_t)0xcf56,\n    (q15_t)0x7660, (q15_t)0xcf50, (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x765c,\n    (q15_t)0xcf45, (q15_t)0x7659, (q15_t)0xcf3f, (q15_t)0x7657, (q15_t)0xcf39,\n    (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x7652, (q15_t)0xcf2d, (q15_t)0x7650,\n    (q15_t)0xcf28, (q15_t)0x764d, (q15_t)0xcf22, (q15_t)0x764b, (q15_t)0xcf1c,\n    (q15_t)0x7648, (q15_t)0xcf16, (q15_t)0x7646, (q15_t)0xcf10, (q15_t)0x7644,\n    (q15_t)0xcf0b, (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x763f, (q15_t)0xceff,\n    (q15_t)0x763c, (q15_t)0xcef9, (q15_t)0x763a, (q15_t)0xcef3, (q15_t)0x7638,\n    (q15_t)0xceee, (q15_t)0x7635, (q15_t)0xcee8, (q15_t)0x7633, (q15_t)0xcee2,\n    (q15_t)0x7630, (q15_t)0xcedc, (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x762b,\n    (q15_t)0xced1, (q15_t)0x7629, (q15_t)0xcecb, (q15_t)0x7627, (q15_t)0xcec5,\n    (q15_t)0x7624, (q15_t)0xcebf, (q15_t)0x7622, (q15_t)0xceb9, (q15_t)0x761f,\n    (q15_t)0xceb4, (q15_t)0x761d, (q15_t)0xceae, (q15_t)0x761b, (q15_t)0xcea8,\n    (q15_t)0x7618, (q15_t)0xcea2, (q15_t)0x7616, (q15_t)0xce9c, (q15_t)0x7613,\n    (q15_t)0xce97, (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x760e, (q15_t)0xce8b,\n    (q15_t)0x760c, (q15_t)0xce85, (q15_t)0x760a, (q15_t)0xce7f, (q15_t)0x7607,\n    (q15_t)0xce7a, (q15_t)0x7605, (q15_t)0xce74, (q15_t)0x7602, (q15_t)0xce6e,\n    (q15_t)0x7600, (q15_t)0xce68, (q15_t)0x75fd, (q15_t)0xce62, (q15_t)0x75fb,\n    (q15_t)0xce5d, (q15_t)0x75f9, (q15_t)0xce57, (q15_t)0x75f6, (q15_t)0xce51,\n    (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75f1, (q15_t)0xce45, (q15_t)0x75ef,\n    (q15_t)0xce40, (q15_t)0x75ec, (q15_t)0xce3a, (q15_t)0x75ea, (q15_t)0xce34,\n    (q15_t)0x75e7, (q15_t)0xce2e, (q15_t)0x75e5, (q15_t)0xce28, (q15_t)0x75e3,\n    (q15_t)0xce23, (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75de, (q15_t)0xce17,\n    (q15_t)0x75db, (q15_t)0xce11, (q15_t)0x75d9, (q15_t)0xce0c, (q15_t)0x75d6,\n    (q15_t)0xce06, (q15_t)0x75d4, (q15_t)0xce00, (q15_t)0x75d1, (q15_t)0xcdfa,\n    (q15_t)0x75cf, (q15_t)0xcdf4, (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75ca,\n    (q15_t)0xcde9, (q15_t)0x75c8, (q15_t)0xcde3, (q15_t)0x75c5, (q15_t)0xcddd,\n    (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75c0, (q15_t)0xcdd2, (q15_t)0x75be,\n    (q15_t)0xcdcc, (q15_t)0x75bb, (q15_t)0xcdc6, (q15_t)0x75b9, (q15_t)0xcdc0,\n    (q15_t)0x75b6, (q15_t)0xcdbb, (q15_t)0x75b4, (q15_t)0xcdb5, (q15_t)0x75b1,\n    (q15_t)0xcdaf, (q15_t)0x75af, (q15_t)0xcda9, (q15_t)0x75ac, (q15_t)0xcda3,\n    (q15_t)0x75aa, (q15_t)0xcd9e, (q15_t)0x75a7, (q15_t)0xcd98, (q15_t)0x75a5,\n    (q15_t)0xcd92, (q15_t)0x75a3, (q15_t)0xcd8c, (q15_t)0x75a0, (q15_t)0xcd87,\n    (q15_t)0x759e, (q15_t)0xcd81, (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7599,\n    (q15_t)0xcd75, (q15_t)0x7596, (q15_t)0xcd70, (q15_t)0x7594, (q15_t)0xcd6a,\n    (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x758f, (q15_t)0xcd5e, (q15_t)0x758c,\n    (q15_t)0xcd58, (q15_t)0x758a, (q15_t)0xcd53, (q15_t)0x7587, (q15_t)0xcd4d,\n    (q15_t)0x7585, (q15_t)0xcd47, (q15_t)0x7582, (q15_t)0xcd41, (q15_t)0x7580,\n    (q15_t)0xcd3c, (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x757b, (q15_t)0xcd30,\n    (q15_t)0x7578, (q15_t)0xcd2a, (q15_t)0x7576, (q15_t)0xcd25, (q15_t)0x7573,\n    (q15_t)0xcd1f, (q15_t)0x7571, (q15_t)0xcd19, (q15_t)0x756e, (q15_t)0xcd13,\n    (q15_t)0x756c, (q15_t)0xcd0d, (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x7567,\n    (q15_t)0xcd02, (q15_t)0x7564, (q15_t)0xccfc, (q15_t)0x7562, (q15_t)0xccf6,\n    (q15_t)0x755f, (q15_t)0xccf1, (q15_t)0x755d, (q15_t)0xcceb, (q15_t)0x755a,\n    (q15_t)0xcce5, (q15_t)0x7558, (q15_t)0xccdf, (q15_t)0x7555, (q15_t)0xccda,\n    (q15_t)0x7553, (q15_t)0xccd4, (q15_t)0x7550, (q15_t)0xccce, (q15_t)0x754e,\n    (q15_t)0xccc8, (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7549, (q15_t)0xccbd,\n    (q15_t)0x7546, (q15_t)0xccb7, (q15_t)0x7544, (q15_t)0xccb1, (q15_t)0x7541,\n    (q15_t)0xccac, (q15_t)0x753f, (q15_t)0xcca6, (q15_t)0x753c, (q15_t)0xcca0,\n    (q15_t)0x753a, (q15_t)0xcc9a, (q15_t)0x7537, (q15_t)0xcc95, (q15_t)0x7535,\n    (q15_t)0xcc8f, (q15_t)0x7532, (q15_t)0xcc89, (q15_t)0x752f, (q15_t)0xcc83,\n    (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x752a, (q15_t)0xcc78, (q15_t)0x7528,\n    (q15_t)0xcc72, (q15_t)0x7525, (q15_t)0xcc6c, (q15_t)0x7523, (q15_t)0xcc67,\n    (q15_t)0x7520, (q15_t)0xcc61, (q15_t)0x751e, (q15_t)0xcc5b, (q15_t)0x751b,\n    (q15_t)0xcc55, (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x7516, (q15_t)0xcc4a,\n    (q15_t)0x7514, (q15_t)0xcc44, (q15_t)0x7511, (q15_t)0xcc3e, (q15_t)0x750f,\n    (q15_t)0xcc39, (q15_t)0x750c, (q15_t)0xcc33, (q15_t)0x7509, (q15_t)0xcc2d,\n    (q15_t)0x7507, (q15_t)0xcc27, (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x7502,\n    (q15_t)0xcc1c, (q15_t)0x74ff, (q15_t)0xcc16, (q15_t)0x74fd, (q15_t)0xcc10,\n    (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f8, (q15_t)0xcc05, (q15_t)0x74f5,\n    (q15_t)0xcbff, (q15_t)0x74f2, (q15_t)0xcbf9, (q15_t)0x74f0, (q15_t)0xcbf4,\n    (q15_t)0x74ed, (q15_t)0xcbee, (q15_t)0x74eb, (q15_t)0xcbe8, (q15_t)0x74e8,\n    (q15_t)0xcbe2, (q15_t)0x74e6, (q15_t)0xcbdd, (q15_t)0x74e3, (q15_t)0xcbd7,\n    (q15_t)0x74e1, (q15_t)0xcbd1, (q15_t)0x74de, (q15_t)0xcbcb, (q15_t)0x74db,\n    (q15_t)0xcbc6, (q15_t)0x74d9, (q15_t)0xcbc0, (q15_t)0x74d6, (q15_t)0xcbba,\n    (q15_t)0x74d4, (q15_t)0xcbb5, (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74cf,\n    (q15_t)0xcba9, (q15_t)0x74cc, (q15_t)0xcba3, (q15_t)0x74c9, (q15_t)0xcb9e,\n    (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74c4, (q15_t)0xcb92, (q15_t)0x74c2,\n    (q15_t)0xcb8c, (q15_t)0x74bf, (q15_t)0xcb87, (q15_t)0x74bd, (q15_t)0xcb81,\n    (q15_t)0x74ba, (q15_t)0xcb7b, (q15_t)0x74b7, (q15_t)0xcb75, (q15_t)0x74b5,\n    (q15_t)0xcb70, (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74b0, (q15_t)0xcb64,\n    (q15_t)0x74ad, (q15_t)0xcb5f, (q15_t)0x74ab, (q15_t)0xcb59, (q15_t)0x74a8,\n    (q15_t)0xcb53, (q15_t)0x74a5, (q15_t)0xcb4d, (q15_t)0x74a3, (q15_t)0xcb48,\n    (q15_t)0x74a0, (q15_t)0xcb42, (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x749b,\n    (q15_t)0xcb36, (q15_t)0x7498, (q15_t)0xcb31, (q15_t)0x7496, (q15_t)0xcb2b,\n    (q15_t)0x7493, (q15_t)0xcb25, (q15_t)0x7491, (q15_t)0xcb20, (q15_t)0x748e,\n    (q15_t)0xcb1a, (q15_t)0x748b, (q15_t)0xcb14, (q15_t)0x7489, (q15_t)0xcb0e,\n    (q15_t)0x7486, (q15_t)0xcb09, (q15_t)0x7484, (q15_t)0xcb03, (q15_t)0x7481,\n    (q15_t)0xcafd, (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x747c, (q15_t)0xcaf2,\n    (q15_t)0x7479, (q15_t)0xcaec, (q15_t)0x7477, (q15_t)0xcae6, (q15_t)0x7474,\n    (q15_t)0xcae1, (q15_t)0x7471, (q15_t)0xcadb, (q15_t)0x746f, (q15_t)0xcad5,\n    (q15_t)0x746c, (q15_t)0xcad0, (q15_t)0x746a, (q15_t)0xcaca, (q15_t)0x7467,\n    (q15_t)0xcac4, (q15_t)0x7464, (q15_t)0xcabe, (q15_t)0x7462, (q15_t)0xcab9,\n    (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x745c, (q15_t)0xcaad, (q15_t)0x745a,\n    (q15_t)0xcaa8, (q15_t)0x7457, (q15_t)0xcaa2, (q15_t)0x7455, (q15_t)0xca9c,\n    (q15_t)0x7452, (q15_t)0xca96, (q15_t)0x744f, (q15_t)0xca91, (q15_t)0x744d,\n    (q15_t)0xca8b, (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7448, (q15_t)0xca80,\n    (q15_t)0x7445, (q15_t)0xca7a, (q15_t)0x7442, (q15_t)0xca74, (q15_t)0x7440,\n    (q15_t)0xca6e, (q15_t)0x743d, (q15_t)0xca69, (q15_t)0x743a, (q15_t)0xca63,\n    (q15_t)0x7438, (q15_t)0xca5d, (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x7432,\n    (q15_t)0xca52, (q15_t)0x7430, (q15_t)0xca4c, (q15_t)0x742d, (q15_t)0xca46,\n    (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7428, (q15_t)0xca3b, (q15_t)0x7425,\n    (q15_t)0xca35, (q15_t)0x7423, (q15_t)0xca30, (q15_t)0x7420, (q15_t)0xca2a,\n    (q15_t)0x741d, (q15_t)0xca24, (q15_t)0x741b, (q15_t)0xca1f, (q15_t)0x7418,\n    (q15_t)0xca19, (q15_t)0x7415, (q15_t)0xca13, (q15_t)0x7413, (q15_t)0xca0d,\n    (q15_t)0x7410, (q15_t)0xca08, (q15_t)0x740d, (q15_t)0xca02, (q15_t)0x740b,\n    (q15_t)0xc9fc, (q15_t)0x7408, (q15_t)0xc9f7, (q15_t)0x7406, (q15_t)0xc9f1,\n    (q15_t)0x7403, (q15_t)0xc9eb, (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73fe,\n    (q15_t)0xc9e0, (q15_t)0x73fb, (q15_t)0xc9da, (q15_t)0x73f8, (q15_t)0xc9d5,\n    (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73f3, (q15_t)0xc9c9, (q15_t)0x73f0,\n    (q15_t)0xc9c3, (q15_t)0x73ee, (q15_t)0xc9be, (q15_t)0x73eb, (q15_t)0xc9b8,\n    (q15_t)0x73e8, (q15_t)0xc9b2, (q15_t)0x73e6, (q15_t)0xc9ad, (q15_t)0x73e3,\n    (q15_t)0xc9a7, (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73de, (q15_t)0xc99c,\n    (q15_t)0x73db, (q15_t)0xc996, (q15_t)0x73d8, (q15_t)0xc990, (q15_t)0x73d6,\n    (q15_t)0xc98b, (q15_t)0x73d3, (q15_t)0xc985, (q15_t)0x73d0, (q15_t)0xc97f,\n    (q15_t)0x73ce, (q15_t)0xc97a, (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c8,\n    (q15_t)0xc96e, (q15_t)0x73c6, (q15_t)0xc968, (q15_t)0x73c3, (q15_t)0xc963,\n    (q15_t)0x73c0, (q15_t)0xc95d, (q15_t)0x73bd, (q15_t)0xc957, (q15_t)0x73bb,\n    (q15_t)0xc952, (q15_t)0x73b8, (q15_t)0xc94c, (q15_t)0x73b5, (q15_t)0xc946,\n    (q15_t)0x73b3, (q15_t)0xc941, (q15_t)0x73b0, (q15_t)0xc93b, (q15_t)0x73ad,\n    (q15_t)0xc935, (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a8, (q15_t)0xc92a,\n    (q15_t)0x73a5, (q15_t)0xc924, (q15_t)0x73a3, (q15_t)0xc91f, (q15_t)0x73a0,\n    (q15_t)0xc919, (q15_t)0x739d, (q15_t)0xc913, (q15_t)0x739b, (q15_t)0xc90e,\n    (q15_t)0x7398, (q15_t)0xc908, (q15_t)0x7395, (q15_t)0xc902, (q15_t)0x7392,\n    (q15_t)0xc8fd, (q15_t)0x7390, (q15_t)0xc8f7, (q15_t)0x738d, (q15_t)0xc8f1,\n    (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x7388, (q15_t)0xc8e6, (q15_t)0x7385,\n    (q15_t)0xc8e0, (q15_t)0x7382, (q15_t)0xc8db, (q15_t)0x737f, (q15_t)0xc8d5,\n    (q15_t)0x737d, (q15_t)0xc8cf, (q15_t)0x737a, (q15_t)0xc8ca, (q15_t)0x7377,\n    (q15_t)0xc8c4, (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x7372, (q15_t)0xc8b9,\n    (q15_t)0x736f, (q15_t)0xc8b3, (q15_t)0x736c, (q15_t)0xc8ad, (q15_t)0x736a,\n    (q15_t)0xc8a8, (q15_t)0x7367, (q15_t)0xc8a2, (q15_t)0x7364, (q15_t)0xc89c,\n    (q15_t)0x7362, (q15_t)0xc897, (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x735c,\n    (q15_t)0xc88b, (q15_t)0x7359, (q15_t)0xc886, (q15_t)0x7357, (q15_t)0xc880,\n    (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7351, (q15_t)0xc875, (q15_t)0x734f,\n    (q15_t)0xc86f, (q15_t)0x734c, (q15_t)0xc869, (q15_t)0x7349, (q15_t)0xc864,\n    (q15_t)0x7346, (q15_t)0xc85e, (q15_t)0x7344, (q15_t)0xc858, (q15_t)0x7341,\n    (q15_t)0xc853, (q15_t)0x733e, (q15_t)0xc84d, (q15_t)0x733b, (q15_t)0xc847,\n    (q15_t)0x7339, (q15_t)0xc842, (q15_t)0x7336, (q15_t)0xc83c, (q15_t)0x7333,\n    (q15_t)0xc836, (q15_t)0x7330, (q15_t)0xc831, (q15_t)0x732e, (q15_t)0xc82b,\n    (q15_t)0x732b, (q15_t)0xc825, (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x7326,\n    (q15_t)0xc81a, (q15_t)0x7323, (q15_t)0xc814, (q15_t)0x7320, (q15_t)0xc80f,\n    (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x731b, (q15_t)0xc803, (q15_t)0x7318,\n    (q15_t)0xc7fe, (q15_t)0x7315, (q15_t)0xc7f8, (q15_t)0x7312, (q15_t)0xc7f3,\n    (q15_t)0x7310, (q15_t)0xc7ed, (q15_t)0x730d, (q15_t)0xc7e7, (q15_t)0x730a,\n    (q15_t)0xc7e2, (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7305, (q15_t)0xc7d6,\n    (q15_t)0x7302, (q15_t)0xc7d1, (q15_t)0x72ff, (q15_t)0xc7cb, (q15_t)0x72fc,\n    (q15_t)0xc7c5, (q15_t)0x72f9, (q15_t)0xc7c0, (q15_t)0x72f7, (q15_t)0xc7ba,\n    (q15_t)0x72f4, (q15_t)0xc7b4, (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72ee,\n    (q15_t)0xc7a9, (q15_t)0x72ec, (q15_t)0xc7a3, (q15_t)0x72e9, (q15_t)0xc79e,\n    (q15_t)0x72e6, (q15_t)0xc798, (q15_t)0x72e3, (q15_t)0xc793, (q15_t)0x72e1,\n    (q15_t)0xc78d, (q15_t)0x72de, (q15_t)0xc787, (q15_t)0x72db, (q15_t)0xc782,\n    (q15_t)0x72d8, (q15_t)0xc77c, (q15_t)0x72d5, (q15_t)0xc776, (q15_t)0x72d3,\n    (q15_t)0xc771, (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72cd, (q15_t)0xc765,\n    (q15_t)0x72ca, (q15_t)0xc760, (q15_t)0x72c8, (q15_t)0xc75a, (q15_t)0x72c5,\n    (q15_t)0xc755, (q15_t)0x72c2, (q15_t)0xc74f, (q15_t)0x72bf, (q15_t)0xc749,\n    (q15_t)0x72bc, (q15_t)0xc744, (q15_t)0x72ba, (q15_t)0xc73e, (q15_t)0x72b7,\n    (q15_t)0xc738, (q15_t)0x72b4, (q15_t)0xc733, (q15_t)0x72b1, (q15_t)0xc72d,\n    (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72ac, (q15_t)0xc722, (q15_t)0x72a9,\n    (q15_t)0xc71c, (q15_t)0x72a6, (q15_t)0xc717, (q15_t)0x72a3, (q15_t)0xc711,\n    (q15_t)0x72a1, (q15_t)0xc70b, (q15_t)0x729e, (q15_t)0xc706, (q15_t)0x729b,\n    (q15_t)0xc700, (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x7295, (q15_t)0xc6f5,\n    (q15_t)0x7293, (q15_t)0xc6ef, (q15_t)0x7290, (q15_t)0xc6ea, (q15_t)0x728d,\n    (q15_t)0xc6e4, (q15_t)0x728a, (q15_t)0xc6de, (q15_t)0x7287, (q15_t)0xc6d9,\n    (q15_t)0x7285, (q15_t)0xc6d3, (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x727f,\n    (q15_t)0xc6c8, (q15_t)0x727c, (q15_t)0xc6c2, (q15_t)0x7279, (q15_t)0xc6bd,\n    (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x7274, (q15_t)0xc6b1, (q15_t)0x7271,\n    (q15_t)0xc6ac, (q15_t)0x726e, (q15_t)0xc6a6, (q15_t)0x726b, (q15_t)0xc6a1,\n    (q15_t)0x7268, (q15_t)0xc69b, (q15_t)0x7266, (q15_t)0xc695, (q15_t)0x7263,\n    (q15_t)0xc690, (q15_t)0x7260, (q15_t)0xc68a, (q15_t)0x725d, (q15_t)0xc684,\n    (q15_t)0x725a, (q15_t)0xc67f, (q15_t)0x7257, (q15_t)0xc679, (q15_t)0x7255,\n    (q15_t)0xc674, (q15_t)0x7252, (q15_t)0xc66e, (q15_t)0x724f, (q15_t)0xc668,\n    (q15_t)0x724c, (q15_t)0xc663, (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x7247,\n    (q15_t)0xc658, (q15_t)0x7244, (q15_t)0xc652, (q15_t)0x7241, (q15_t)0xc64c,\n    (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x723b, (q15_t)0xc641, (q15_t)0x7238,\n    (q15_t)0xc63c, (q15_t)0x7236, (q15_t)0xc636, (q15_t)0x7233, (q15_t)0xc630,\n    (q15_t)0x7230, (q15_t)0xc62b, (q15_t)0x722d, (q15_t)0xc625, (q15_t)0x722a,\n    (q15_t)0xc620, (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x7224, (q15_t)0xc614,\n    (q15_t)0x7222, (q15_t)0xc60f, (q15_t)0x721f, (q15_t)0xc609, (q15_t)0x721c,\n    (q15_t)0xc603, (q15_t)0x7219, (q15_t)0xc5fe, (q15_t)0x7216, (q15_t)0xc5f8,\n    (q15_t)0x7213, (q15_t)0xc5f3, (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x720e,\n    (q15_t)0xc5e7, (q15_t)0x720b, (q15_t)0xc5e2, (q15_t)0x7208, (q15_t)0xc5dc,\n    (q15_t)0x7205, (q15_t)0xc5d7, (q15_t)0x7202, (q15_t)0xc5d1, (q15_t)0x71ff,\n    (q15_t)0xc5cc, (q15_t)0x71fd, (q15_t)0xc5c6, (q15_t)0x71fa, (q15_t)0xc5c0,\n    (q15_t)0x71f7, (q15_t)0xc5bb, (q15_t)0x71f4, (q15_t)0xc5b5, (q15_t)0x71f1,\n    (q15_t)0xc5b0, (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71eb, (q15_t)0xc5a4,\n    (q15_t)0x71e9, (q15_t)0xc59f, (q15_t)0x71e6, (q15_t)0xc599, (q15_t)0x71e3,\n    (q15_t)0xc594, (q15_t)0x71e0, (q15_t)0xc58e, (q15_t)0x71dd, (q15_t)0xc588,\n    (q15_t)0x71da, (q15_t)0xc583, (q15_t)0x71d7, (q15_t)0xc57d, (q15_t)0x71d4,\n    (q15_t)0xc578, (q15_t)0x71d2, (q15_t)0xc572, (q15_t)0x71cf, (q15_t)0xc56c,\n    (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c9, (q15_t)0xc561, (q15_t)0x71c6,\n    (q15_t)0xc55c, (q15_t)0x71c3, (q15_t)0xc556, (q15_t)0x71c0, (q15_t)0xc551,\n    (q15_t)0x71bd, (q15_t)0xc54b, (q15_t)0x71bb, (q15_t)0xc545, (q15_t)0x71b8,\n    (q15_t)0xc540, (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71b2, (q15_t)0xc535,\n    (q15_t)0x71af, (q15_t)0xc52f, (q15_t)0x71ac, (q15_t)0xc529, (q15_t)0x71a9,\n    (q15_t)0xc524, (q15_t)0x71a6, (q15_t)0xc51e, (q15_t)0x71a3, (q15_t)0xc519,\n    (q15_t)0x71a1, (q15_t)0xc513, (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x719b,\n    (q15_t)0xc508, (q15_t)0x7198, (q15_t)0xc502, (q15_t)0x7195, (q15_t)0xc4fd,\n    (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x718f, (q15_t)0xc4f2, (q15_t)0x718c,\n    (q15_t)0xc4ec, (q15_t)0x7189, (q15_t)0xc4e7, (q15_t)0x7186, (q15_t)0xc4e1,\n    (q15_t)0x7184, (q15_t)0xc4db, (q15_t)0x7181, (q15_t)0xc4d6, (q15_t)0x717e,\n    (q15_t)0xc4d0, (q15_t)0x717b, (q15_t)0xc4cb, (q15_t)0x7178, (q15_t)0xc4c5,\n    (q15_t)0x7175, (q15_t)0xc4c0, (q15_t)0x7172, (q15_t)0xc4ba, (q15_t)0x716f,\n    (q15_t)0xc4b4, (q15_t)0x716c, (q15_t)0xc4af, (q15_t)0x7169, (q15_t)0xc4a9,\n    (q15_t)0x7167, (q15_t)0xc4a4, (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7161,\n    (q15_t)0xc499, (q15_t)0x715e, (q15_t)0xc493, (q15_t)0x715b, (q15_t)0xc48d,\n    (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x7155, (q15_t)0xc482, (q15_t)0x7152,\n    (q15_t)0xc47d, (q15_t)0x714f, (q15_t)0xc477, (q15_t)0x714c, (q15_t)0xc472,\n    (q15_t)0x7149, (q15_t)0xc46c, (q15_t)0x7146, (q15_t)0xc467, (q15_t)0x7143,\n    (q15_t)0xc461, (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x713e, (q15_t)0xc456,\n    (q15_t)0x713b, (q15_t)0xc450, (q15_t)0x7138, (q15_t)0xc44b, (q15_t)0x7135,\n    (q15_t)0xc445, (q15_t)0x7132, (q15_t)0xc440, (q15_t)0x712f, (q15_t)0xc43a,\n    (q15_t)0x712c, (q15_t)0xc434, (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x7126,\n    (q15_t)0xc429, (q15_t)0x7123, (q15_t)0xc424, (q15_t)0x7120, (q15_t)0xc41e,\n    (q15_t)0x711d, (q15_t)0xc419, (q15_t)0x711a, (q15_t)0xc413, (q15_t)0x7117,\n    (q15_t)0xc40e, (q15_t)0x7114, (q15_t)0xc408, (q15_t)0x7112, (q15_t)0xc403,\n    (q15_t)0x710f, (q15_t)0xc3fd, (q15_t)0x710c, (q15_t)0xc3f7, (q15_t)0x7109,\n    (q15_t)0xc3f2, (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x7103, (q15_t)0xc3e7,\n    (q15_t)0x7100, (q15_t)0xc3e1, (q15_t)0x70fd, (q15_t)0xc3dc, (q15_t)0x70fa,\n    (q15_t)0xc3d6, (q15_t)0x70f7, (q15_t)0xc3d1, (q15_t)0x70f4, (q15_t)0xc3cb,\n    (q15_t)0x70f1, (q15_t)0xc3c5, (q15_t)0x70ee, (q15_t)0xc3c0, (q15_t)0x70eb,\n    (q15_t)0xc3ba, (q15_t)0x70e8, (q15_t)0xc3b5, (q15_t)0x70e5, (q15_t)0xc3af,\n    (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70df, (q15_t)0xc3a4, (q15_t)0x70dc,\n    (q15_t)0xc39f, (q15_t)0x70d9, (q15_t)0xc399, (q15_t)0x70d6, (q15_t)0xc394,\n    (q15_t)0x70d3, (q15_t)0xc38e, (q15_t)0x70d1, (q15_t)0xc389, (q15_t)0x70ce,\n    (q15_t)0xc383, (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70c8, (q15_t)0xc378,\n    (q15_t)0x70c5, (q15_t)0xc372, (q15_t)0x70c2, (q15_t)0xc36d, (q15_t)0x70bf,\n    (q15_t)0xc367, (q15_t)0x70bc, (q15_t)0xc362, (q15_t)0x70b9, (q15_t)0xc35c,\n    (q15_t)0x70b6, (q15_t)0xc357, (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70b0,\n    (q15_t)0xc34c, (q15_t)0x70ad, (q15_t)0xc346, (q15_t)0x70aa, (q15_t)0xc341,\n    (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x70a4, (q15_t)0xc336, (q15_t)0x70a1,\n    (q15_t)0xc330, (q15_t)0x709e, (q15_t)0xc32a, (q15_t)0x709b, (q15_t)0xc325,\n    (q15_t)0x7098, (q15_t)0xc31f, (q15_t)0x7095, (q15_t)0xc31a, (q15_t)0x7092,\n    (q15_t)0xc314, (q15_t)0x708f, (q15_t)0xc30f, (q15_t)0x708c, (q15_t)0xc309,\n    (q15_t)0x7089, (q15_t)0xc304, (q15_t)0x7086, (q15_t)0xc2fe, (q15_t)0x7083,\n    (q15_t)0xc2f9, (q15_t)0x7080, (q15_t)0xc2f3, (q15_t)0x707d, (q15_t)0xc2ee,\n    (q15_t)0x707a, (q15_t)0xc2e8, (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x7074,\n    (q15_t)0xc2dd, (q15_t)0x7071, (q15_t)0xc2d8, (q15_t)0x706e, (q15_t)0xc2d2,\n    (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x7068, (q15_t)0xc2c7, (q15_t)0x7065,\n    (q15_t)0xc2c2, (q15_t)0x7062, (q15_t)0xc2bc, (q15_t)0x705f, (q15_t)0xc2b7,\n    (q15_t)0x705c, (q15_t)0xc2b1, (q15_t)0x7059, (q15_t)0xc2ab, (q15_t)0x7056,\n    (q15_t)0xc2a6, (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7050, (q15_t)0xc29b,\n    (q15_t)0x704d, (q15_t)0xc295, (q15_t)0x704a, (q15_t)0xc290, (q15_t)0x7047,\n    (q15_t)0xc28a, (q15_t)0x7044, (q15_t)0xc285, (q15_t)0x7041, (q15_t)0xc27f,\n    (q15_t)0x703e, (q15_t)0xc27a, (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x7038,\n    (q15_t)0xc26f, (q15_t)0x7035, (q15_t)0xc269, (q15_t)0x7032, (q15_t)0xc264,\n    (q15_t)0x702f, (q15_t)0xc25e, (q15_t)0x702c, (q15_t)0xc259, (q15_t)0x7029,\n    (q15_t)0xc253, (q15_t)0x7026, (q15_t)0xc24e, (q15_t)0x7023, (q15_t)0xc248,\n    (q15_t)0x7020, (q15_t)0xc243, (q15_t)0x701d, (q15_t)0xc23d, (q15_t)0x7019,\n    (q15_t)0xc238, (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x7013, (q15_t)0xc22d,\n    (q15_t)0x7010, (q15_t)0xc227, (q15_t)0x700d, (q15_t)0xc222, (q15_t)0x700a,\n    (q15_t)0xc21c, (q15_t)0x7007, (q15_t)0xc217, (q15_t)0x7004, (q15_t)0xc211,\n    (q15_t)0x7001, (q15_t)0xc20c, (q15_t)0x6ffe, (q15_t)0xc206, (q15_t)0x6ffb,\n    (q15_t)0xc201, (q15_t)0x6ff8, (q15_t)0xc1fb, (q15_t)0x6ff5, (q15_t)0xc1f6,\n    (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fef, (q15_t)0xc1eb, (q15_t)0x6fec,\n    (q15_t)0xc1e5, (q15_t)0x6fe9, (q15_t)0xc1e0, (q15_t)0x6fe6, (q15_t)0xc1da,\n    (q15_t)0x6fe3, (q15_t)0xc1d5, (q15_t)0x6fe0, (q15_t)0xc1cf, (q15_t)0x6fdd,\n    (q15_t)0xc1ca, (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fd6, (q15_t)0xc1bf,\n    (q15_t)0x6fd3, (q15_t)0xc1b9, (q15_t)0x6fd0, (q15_t)0xc1b4, (q15_t)0x6fcd,\n    (q15_t)0xc1ae, (q15_t)0x6fca, (q15_t)0xc1a9, (q15_t)0x6fc7, (q15_t)0xc1a3,\n    (q15_t)0x6fc4, (q15_t)0xc19e, (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fbe,\n    (q15_t)0xc193, (q15_t)0x6fbb, (q15_t)0xc18d, (q15_t)0x6fb8, (q15_t)0xc188,\n    (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fb2, (q15_t)0xc17d, (q15_t)0x6faf,\n    (q15_t)0xc178, (q15_t)0x6fac, (q15_t)0xc172, (q15_t)0x6fa9, (q15_t)0xc16d,\n    (q15_t)0x6fa5, (q15_t)0xc167, (q15_t)0x6fa2, (q15_t)0xc162, (q15_t)0x6f9f,\n    (q15_t)0xc15c, (q15_t)0x6f9c, (q15_t)0xc157, (q15_t)0x6f99, (q15_t)0xc151,\n    (q15_t)0x6f96, (q15_t)0xc14c, (q15_t)0x6f93, (q15_t)0xc146, (q15_t)0x6f90,\n    (q15_t)0xc141, (q15_t)0x6f8d, (q15_t)0xc13b, (q15_t)0x6f8a, (q15_t)0xc136,\n    (q15_t)0x6f87, (q15_t)0xc130, (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f81,\n    (q15_t)0xc125, (q15_t)0x6f7d, (q15_t)0xc120, (q15_t)0x6f7a, (q15_t)0xc11a,\n    (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f74, (q15_t)0xc10f, (q15_t)0x6f71,\n    (q15_t)0xc10a, (q15_t)0x6f6e, (q15_t)0xc105, (q15_t)0x6f6b, (q15_t)0xc0ff,\n    (q15_t)0x6f68, (q15_t)0xc0fa, (q15_t)0x6f65, (q15_t)0xc0f4, (q15_t)0x6f62,\n    (q15_t)0xc0ef, (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f5b, (q15_t)0xc0e4,\n    (q15_t)0x6f58, (q15_t)0xc0de, (q15_t)0x6f55, (q15_t)0xc0d9, (q15_t)0x6f52,\n    (q15_t)0xc0d3, (q15_t)0x6f4f, (q15_t)0xc0ce, (q15_t)0x6f4c, (q15_t)0xc0c8,\n    (q15_t)0x6f49, (q15_t)0xc0c3, (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f43,\n    (q15_t)0xc0b8, (q15_t)0x6f3f, (q15_t)0xc0b3, (q15_t)0x6f3c, (q15_t)0xc0ad,\n    (q15_t)0x6f39, (q15_t)0xc0a8, (q15_t)0x6f36, (q15_t)0xc0a2, (q15_t)0x6f33,\n    (q15_t)0xc09d, (q15_t)0x6f30, (q15_t)0xc097, (q15_t)0x6f2d, (q15_t)0xc092,\n    (q15_t)0x6f2a, (q15_t)0xc08c, (q15_t)0x6f27, (q15_t)0xc087, (q15_t)0x6f23,\n    (q15_t)0xc081, (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f1d, (q15_t)0xc077,\n    (q15_t)0x6f1a, (q15_t)0xc071, (q15_t)0x6f17, (q15_t)0xc06c, (q15_t)0x6f14,\n    (q15_t)0xc066, (q15_t)0x6f11, (q15_t)0xc061, (q15_t)0x6f0e, (q15_t)0xc05b,\n    (q15_t)0x6f0b, (q15_t)0xc056, (q15_t)0x6f07, (q15_t)0xc050, (q15_t)0x6f04,\n    (q15_t)0xc04b, (q15_t)0x6f01, (q15_t)0xc045, (q15_t)0x6efe, (q15_t)0xc040,\n    (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ef8, (q15_t)0xc035, (q15_t)0x6ef5,\n    (q15_t)0xc030, (q15_t)0x6ef1, (q15_t)0xc02a, (q15_t)0x6eee, (q15_t)0xc025,\n    (q15_t)0x6eeb, (q15_t)0xc01f, (q15_t)0x6ee8, (q15_t)0xc01a, (q15_t)0x6ee5,\n    (q15_t)0xc014, (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6edf, (q15_t)0xc00a,\n    (q15_t)0x6edc, (q15_t)0xc004, (q15_t)0x6ed8, (q15_t)0xbfff, (q15_t)0x6ed5,\n    (q15_t)0xbff9, (q15_t)0x6ed2, (q15_t)0xbff4, (q15_t)0x6ecf, (q15_t)0xbfee,\n    (q15_t)0x6ecc, (q15_t)0xbfe9, (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ec6,\n    (q15_t)0xbfde, (q15_t)0x6ec2, (q15_t)0xbfd9, (q15_t)0x6ebf, (q15_t)0xbfd3,\n    (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eb9, (q15_t)0xbfc8, (q15_t)0x6eb6,\n    (q15_t)0xbfc3, (q15_t)0x6eb3, (q15_t)0xbfbd, (q15_t)0x6eaf, (q15_t)0xbfb8,\n    (q15_t)0x6eac, (q15_t)0xbfb3, (q15_t)0x6ea9, (q15_t)0xbfad, (q15_t)0x6ea6,\n    (q15_t)0xbfa8, (q15_t)0x6ea3, (q15_t)0xbfa2, (q15_t)0x6ea0, (q15_t)0xbf9d,\n    (q15_t)0x6e9c, (q15_t)0xbf97, (q15_t)0x6e99, (q15_t)0xbf92, (q15_t)0x6e96,\n    (q15_t)0xbf8d, (q15_t)0x6e93, (q15_t)0xbf87, (q15_t)0x6e90, (q15_t)0xbf82,\n    (q15_t)0x6e8d, (q15_t)0xbf7c, (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e86,\n    (q15_t)0xbf71, (q15_t)0x6e83, (q15_t)0xbf6c, (q15_t)0x6e80, (q15_t)0xbf67,\n    (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e7a, (q15_t)0xbf5c, (q15_t)0x6e76,\n    (q15_t)0xbf56, (q15_t)0x6e73, (q15_t)0xbf51, (q15_t)0x6e70, (q15_t)0xbf4b,\n    (q15_t)0x6e6d, (q15_t)0xbf46, (q15_t)0x6e6a, (q15_t)0xbf41, (q15_t)0x6e67,\n    (q15_t)0xbf3b, (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e60, (q15_t)0xbf30,\n    (q15_t)0x6e5d, (q15_t)0xbf2b, (q15_t)0x6e5a, (q15_t)0xbf26, (q15_t)0x6e57,\n    (q15_t)0xbf20, (q15_t)0x6e53, (q15_t)0xbf1b, (q15_t)0x6e50, (q15_t)0xbf15,\n    (q15_t)0x6e4d, (q15_t)0xbf10, (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e47,\n    (q15_t)0xbf05, (q15_t)0x6e44, (q15_t)0xbf00, (q15_t)0x6e40, (q15_t)0xbefa,\n    (q15_t)0x6e3d, (q15_t)0xbef5, (q15_t)0x6e3a, (q15_t)0xbeef, (q15_t)0x6e37,\n    (q15_t)0xbeea, (q15_t)0x6e34, (q15_t)0xbee5, (q15_t)0x6e30, (q15_t)0xbedf,\n    (q15_t)0x6e2d, (q15_t)0xbeda, (q15_t)0x6e2a, (q15_t)0xbed4, (q15_t)0x6e27,\n    (q15_t)0xbecf, (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e20, (q15_t)0xbec4,\n    (q15_t)0x6e1d, (q15_t)0xbebf, (q15_t)0x6e1a, (q15_t)0xbeb9, (q15_t)0x6e17,\n    (q15_t)0xbeb4, (q15_t)0x6e14, (q15_t)0xbeae, (q15_t)0x6e10, (q15_t)0xbea9,\n    (q15_t)0x6e0d, (q15_t)0xbea4, (q15_t)0x6e0a, (q15_t)0xbe9e, (q15_t)0x6e07,\n    (q15_t)0xbe99, (q15_t)0x6e04, (q15_t)0xbe93, (q15_t)0x6e00, (q15_t)0xbe8e,\n    (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6dfa, (q15_t)0xbe83, (q15_t)0x6df7,\n    (q15_t)0xbe7e, (q15_t)0x6df3, (q15_t)0xbe78, (q15_t)0x6df0, (q15_t)0xbe73,\n    (q15_t)0x6ded, (q15_t)0xbe6e, (q15_t)0x6dea, (q15_t)0xbe68, (q15_t)0x6de7,\n    (q15_t)0xbe63, (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6de0, (q15_t)0xbe58,\n    (q15_t)0x6ddd, (q15_t)0xbe53, (q15_t)0x6dda, (q15_t)0xbe4d, (q15_t)0x6dd6,\n    (q15_t)0xbe48, (q15_t)0x6dd3, (q15_t)0xbe43, (q15_t)0x6dd0, (q15_t)0xbe3d,\n    (q15_t)0x6dcd, (q15_t)0xbe38, (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dc6,\n    (q15_t)0xbe2d, (q15_t)0x6dc3, (q15_t)0xbe28, (q15_t)0x6dc0, (q15_t)0xbe22,\n    (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db9, (q15_t)0xbe17, (q15_t)0x6db6,\n    (q15_t)0xbe12, (q15_t)0x6db3, (q15_t)0xbe0d, (q15_t)0x6db0, (q15_t)0xbe07,\n    (q15_t)0x6dac, (q15_t)0xbe02, (q15_t)0x6da9, (q15_t)0xbdfd, (q15_t)0x6da6,\n    (q15_t)0xbdf7, (q15_t)0x6da3, (q15_t)0xbdf2, (q15_t)0x6d9f, (q15_t)0xbdec,\n    (q15_t)0x6d9c, (q15_t)0xbde7, (q15_t)0x6d99, (q15_t)0xbde2, (q15_t)0x6d96,\n    (q15_t)0xbddc, (q15_t)0x6d92, (q15_t)0xbdd7, (q15_t)0x6d8f, (q15_t)0xbdd1,\n    (q15_t)0x6d8c, (q15_t)0xbdcc, (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d85,\n    (q15_t)0xbdc1, (q15_t)0x6d82, (q15_t)0xbdbc, (q15_t)0x6d7f, (q15_t)0xbdb7,\n    (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d78, (q15_t)0xbdac, (q15_t)0x6d75,\n    (q15_t)0xbda6, (q15_t)0x6d72, (q15_t)0xbda1, (q15_t)0x6d6f, (q15_t)0xbd9c,\n    (q15_t)0x6d6b, (q15_t)0xbd96, (q15_t)0x6d68, (q15_t)0xbd91, (q15_t)0x6d65,\n    (q15_t)0xbd8c, (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d5e, (q15_t)0xbd81,\n    (q15_t)0x6d5b, (q15_t)0xbd7c, (q15_t)0x6d58, (q15_t)0xbd76, (q15_t)0x6d55,\n    (q15_t)0xbd71, (q15_t)0x6d51, (q15_t)0xbd6b, (q15_t)0x6d4e, (q15_t)0xbd66,\n    (q15_t)0x6d4b, (q15_t)0xbd61, (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d44,\n    (q15_t)0xbd56, (q15_t)0x6d41, (q15_t)0xbd51, (q15_t)0x6d3e, (q15_t)0xbd4b,\n    (q15_t)0x6d3a, (q15_t)0xbd46, (q15_t)0x6d37, (q15_t)0xbd40, (q15_t)0x6d34,\n    (q15_t)0xbd3b, (q15_t)0x6d31, (q15_t)0xbd36, (q15_t)0x6d2d, (q15_t)0xbd30,\n    (q15_t)0x6d2a, (q15_t)0xbd2b, (q15_t)0x6d27, (q15_t)0xbd26, (q15_t)0x6d23,\n    (q15_t)0xbd20, (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d1d, (q15_t)0xbd16,\n    (q15_t)0x6d1a, (q15_t)0xbd10, (q15_t)0x6d16, (q15_t)0xbd0b, (q15_t)0x6d13,\n    (q15_t)0xbd06, (q15_t)0x6d10, (q15_t)0xbd00, (q15_t)0x6d0c, (q15_t)0xbcfb,\n    (q15_t)0x6d09, (q15_t)0xbcf5, (q15_t)0x6d06, (q15_t)0xbcf0, (q15_t)0x6d03,\n    (q15_t)0xbceb, (q15_t)0x6cff, (q15_t)0xbce5, (q15_t)0x6cfc, (q15_t)0xbce0,\n    (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cf5, (q15_t)0xbcd5, (q15_t)0x6cf2,\n    (q15_t)0xbcd0, (q15_t)0x6cef, (q15_t)0xbccb, (q15_t)0x6cec, (q15_t)0xbcc5,\n    (q15_t)0x6ce8, (q15_t)0xbcc0, (q15_t)0x6ce5, (q15_t)0xbcbb, (q15_t)0x6ce2,\n    (q15_t)0xbcb5, (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cdb, (q15_t)0xbcab,\n    (q15_t)0x6cd8, (q15_t)0xbca5, (q15_t)0x6cd4, (q15_t)0xbca0, (q15_t)0x6cd1,\n    (q15_t)0xbc9b, (q15_t)0x6cce, (q15_t)0xbc95, (q15_t)0x6cca, (q15_t)0xbc90,\n    (q15_t)0x6cc7, (q15_t)0xbc8b, (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cc1,\n    (q15_t)0xbc80, (q15_t)0x6cbd, (q15_t)0xbc7b, (q15_t)0x6cba, (q15_t)0xbc75,\n    (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6cb3, (q15_t)0xbc6b, (q15_t)0x6cb0,\n    (q15_t)0xbc65, (q15_t)0x6cad, (q15_t)0xbc60, (q15_t)0x6ca9, (q15_t)0xbc5b,\n    (q15_t)0x6ca6, (q15_t)0xbc55, (q15_t)0x6ca3, (q15_t)0xbc50, (q15_t)0x6c9f,\n    (q15_t)0xbc4b, (q15_t)0x6c9c, (q15_t)0xbc45, (q15_t)0x6c99, (q15_t)0xbc40,\n    (q15_t)0x6c95, (q15_t)0xbc3b, (q15_t)0x6c92, (q15_t)0xbc35, (q15_t)0x6c8f,\n    (q15_t)0xbc30, (q15_t)0x6c8b, (q15_t)0xbc2b, (q15_t)0x6c88, (q15_t)0xbc25,\n    (q15_t)0x6c85, (q15_t)0xbc20, (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c7e,\n    (q15_t)0xbc15, (q15_t)0x6c7b, (q15_t)0xbc10, (q15_t)0x6c77, (q15_t)0xbc0b,\n    (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c71, (q15_t)0xbc00, (q15_t)0x6c6d,\n    (q15_t)0xbbfb, (q15_t)0x6c6a, (q15_t)0xbbf5, (q15_t)0x6c67, (q15_t)0xbbf0,\n    (q15_t)0x6c63, (q15_t)0xbbeb, (q15_t)0x6c60, (q15_t)0xbbe5, (q15_t)0x6c5d,\n    (q15_t)0xbbe0, (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c56, (q15_t)0xbbd5,\n    (q15_t)0x6c53, (q15_t)0xbbd0, (q15_t)0x6c4f, (q15_t)0xbbcb, (q15_t)0x6c4c,\n    (q15_t)0xbbc5, (q15_t)0x6c49, (q15_t)0xbbc0, (q15_t)0x6c45, (q15_t)0xbbbb,\n    (q15_t)0x6c42, (q15_t)0xbbb5, (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c3b,\n    (q15_t)0xbbab, (q15_t)0x6c38, (q15_t)0xbba6, (q15_t)0x6c34, (q15_t)0xbba0,\n    (q15_t)0x6c31, (q15_t)0xbb9b, (q15_t)0x6c2e, (q15_t)0xbb96, (q15_t)0x6c2a,\n    (q15_t)0xbb90, (q15_t)0x6c27, (q15_t)0xbb8b, (q15_t)0x6c24, (q15_t)0xbb86,\n    (q15_t)0x6c20, (q15_t)0xbb80, (q15_t)0x6c1d, (q15_t)0xbb7b, (q15_t)0x6c1a,\n    (q15_t)0xbb76, (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c13, (q15_t)0xbb6b,\n    (q15_t)0x6c0f, (q15_t)0xbb66, (q15_t)0x6c0c, (q15_t)0xbb61, (q15_t)0x6c09,\n    (q15_t)0xbb5b, (q15_t)0x6c05, (q15_t)0xbb56, (q15_t)0x6c02, (q15_t)0xbb51,\n    (q15_t)0x6bff, (q15_t)0xbb4b, (q15_t)0x6bfb, (q15_t)0xbb46, (q15_t)0x6bf8,\n    (q15_t)0xbb41, (q15_t)0x6bf5, (q15_t)0xbb3b, (q15_t)0x6bf1, (q15_t)0xbb36,\n    (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bea, (q15_t)0xbb2c, (q15_t)0x6be7,\n    (q15_t)0xbb26, (q15_t)0x6be4, (q15_t)0xbb21, (q15_t)0x6be0, (q15_t)0xbb1c,\n    (q15_t)0x6bdd, (q15_t)0xbb16, (q15_t)0x6bd9, (q15_t)0xbb11, (q15_t)0x6bd6,\n    (q15_t)0xbb0c, (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bcf, (q15_t)0xbb01,\n    (q15_t)0x6bcc, (q15_t)0xbafc, (q15_t)0x6bc9, (q15_t)0xbaf7, (q15_t)0x6bc5,\n    (q15_t)0xbaf1, (q15_t)0x6bc2, (q15_t)0xbaec, (q15_t)0x6bbe, (q15_t)0xbae7,\n    (q15_t)0x6bbb, (q15_t)0xbae1, (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6bb4,\n    (q15_t)0xbad7, (q15_t)0x6bb1, (q15_t)0xbad2, (q15_t)0x6bad, (q15_t)0xbacc,\n    (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6ba7, (q15_t)0xbac2, (q15_t)0x6ba3,\n    (q15_t)0xbabc, (q15_t)0x6ba0, (q15_t)0xbab7, (q15_t)0x6b9c, (q15_t)0xbab2,\n    (q15_t)0x6b99, (q15_t)0xbaad, (q15_t)0x6b96, (q15_t)0xbaa7, (q15_t)0x6b92,\n    (q15_t)0xbaa2, (q15_t)0x6b8f, (q15_t)0xba9d, (q15_t)0x6b8b, (q15_t)0xba97,\n    (q15_t)0x6b88, (q15_t)0xba92, (q15_t)0x6b85, (q15_t)0xba8d, (q15_t)0x6b81,\n    (q15_t)0xba88, (q15_t)0x6b7e, (q15_t)0xba82, (q15_t)0x6b7a, (q15_t)0xba7d,\n    (q15_t)0x6b77, (q15_t)0xba78, (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b70,\n    (q15_t)0xba6d, (q15_t)0x6b6d, (q15_t)0xba68, (q15_t)0x6b69, (q15_t)0xba63,\n    (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b62, (q15_t)0xba58, (q15_t)0x6b5f,\n    (q15_t)0xba53, (q15_t)0x6b5c, (q15_t)0xba4e, (q15_t)0x6b58, (q15_t)0xba48,\n    (q15_t)0x6b55, (q15_t)0xba43, (q15_t)0x6b51, (q15_t)0xba3e, (q15_t)0x6b4e,\n    (q15_t)0xba39, (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b47, (q15_t)0xba2e,\n    (q15_t)0x6b44, (q15_t)0xba29, (q15_t)0x6b40, (q15_t)0xba23, (q15_t)0x6b3d,\n    (q15_t)0xba1e, (q15_t)0x6b39, (q15_t)0xba19, (q15_t)0x6b36, (q15_t)0xba14,\n    (q15_t)0x6b32, (q15_t)0xba0e, (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b2c,\n    (q15_t)0xba04, (q15_t)0x6b28, (q15_t)0xb9ff, (q15_t)0x6b25, (q15_t)0xb9f9,\n    (q15_t)0x6b21, (q15_t)0xb9f4, (q15_t)0x6b1e, (q15_t)0xb9ef, (q15_t)0x6b1a,\n    (q15_t)0xb9ea, (q15_t)0x6b17, (q15_t)0xb9e4, (q15_t)0x6b13, (q15_t)0xb9df,\n    (q15_t)0x6b10, (q15_t)0xb9da, (q15_t)0x6b0d, (q15_t)0xb9d5, (q15_t)0x6b09,\n    (q15_t)0xb9cf, (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6b02, (q15_t)0xb9c5,\n    (q15_t)0x6aff, (q15_t)0xb9c0, (q15_t)0x6afb, (q15_t)0xb9ba, (q15_t)0x6af8,\n    (q15_t)0xb9b5, (q15_t)0x6af4, (q15_t)0xb9b0, (q15_t)0x6af1, (q15_t)0xb9ab,\n    (q15_t)0x6aee, (q15_t)0xb9a5, (q15_t)0x6aea, (q15_t)0xb9a0, (q15_t)0x6ae7,\n    (q15_t)0xb99b, (q15_t)0x6ae3, (q15_t)0xb996, (q15_t)0x6ae0, (q15_t)0xb990,\n    (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ad9, (q15_t)0xb986, (q15_t)0x6ad5,\n    (q15_t)0xb981, (q15_t)0x6ad2, (q15_t)0xb97b, (q15_t)0x6ace, (q15_t)0xb976,\n    (q15_t)0x6acb, (q15_t)0xb971, (q15_t)0x6ac8, (q15_t)0xb96c, (q15_t)0x6ac4,\n    (q15_t)0xb966, (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6abd, (q15_t)0xb95c,\n    (q15_t)0x6aba, (q15_t)0xb957, (q15_t)0x6ab6, (q15_t)0xb951, (q15_t)0x6ab3,\n    (q15_t)0xb94c, (q15_t)0x6aaf, (q15_t)0xb947, (q15_t)0x6aac, (q15_t)0xb942,\n    (q15_t)0x6aa8, (q15_t)0xb93c, (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6aa1,\n    (q15_t)0xb932, (q15_t)0x6a9e, (q15_t)0xb92d, (q15_t)0x6a9a, (q15_t)0xb928,\n    (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a93, (q15_t)0xb91d, (q15_t)0x6a90,\n    (q15_t)0xb918, (q15_t)0x6a8c, (q15_t)0xb913, (q15_t)0x6a89, (q15_t)0xb90d,\n    (q15_t)0x6a86, (q15_t)0xb908, (q15_t)0x6a82, (q15_t)0xb903, (q15_t)0x6a7f,\n    (q15_t)0xb8fe, (q15_t)0x6a7b, (q15_t)0xb8f8, (q15_t)0x6a78, (q15_t)0xb8f3,\n    (q15_t)0x6a74, (q15_t)0xb8ee, (q15_t)0x6a71, (q15_t)0xb8e9, (q15_t)0x6a6d,\n    (q15_t)0xb8e4, (q15_t)0x6a6a, (q15_t)0xb8de, (q15_t)0x6a66, (q15_t)0xb8d9,\n    (q15_t)0x6a63, (q15_t)0xb8d4, (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a5c,\n    (q15_t)0xb8c9, (q15_t)0x6a58, (q15_t)0xb8c4, (q15_t)0x6a55, (q15_t)0xb8bf,\n    (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a4e, (q15_t)0xb8b5, (q15_t)0x6a4a,\n    (q15_t)0xb8af, (q15_t)0x6a47, (q15_t)0xb8aa, (q15_t)0x6a43, (q15_t)0xb8a5,\n    (q15_t)0x6a40, (q15_t)0xb8a0, (q15_t)0x6a3c, (q15_t)0xb89b, (q15_t)0x6a39,\n    (q15_t)0xb895, (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a32, (q15_t)0xb88b,\n    (q15_t)0x6a2e, (q15_t)0xb886, (q15_t)0x6a2b, (q15_t)0xb880, (q15_t)0x6a27,\n    (q15_t)0xb87b, (q15_t)0x6a24, (q15_t)0xb876, (q15_t)0x6a20, (q15_t)0xb871,\n    (q15_t)0x6a1d, (q15_t)0xb86c, (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a16,\n    (q15_t)0xb861, (q15_t)0x6a12, (q15_t)0xb85c, (q15_t)0x6a0e, (q15_t)0xb857,\n    (q15_t)0x6a0b, (q15_t)0xb852, (q15_t)0x6a07, (q15_t)0xb84c, (q15_t)0x6a04,\n    (q15_t)0xb847, (q15_t)0x6a00, (q15_t)0xb842, (q15_t)0x69fd, (q15_t)0xb83d,\n    (q15_t)0x69f9, (q15_t)0xb838, (q15_t)0x69f6, (q15_t)0xb832, (q15_t)0x69f2,\n    (q15_t)0xb82d, (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69eb, (q15_t)0xb823,\n    (q15_t)0x69e8, (q15_t)0xb81e, (q15_t)0x69e4, (q15_t)0xb818, (q15_t)0x69e1,\n    (q15_t)0xb813, (q15_t)0x69dd, (q15_t)0xb80e, (q15_t)0x69da, (q15_t)0xb809,\n    (q15_t)0x69d6, (q15_t)0xb804, (q15_t)0x69d3, (q15_t)0xb7fe, (q15_t)0x69cf,\n    (q15_t)0xb7f9, (q15_t)0x69cb, (q15_t)0xb7f4, (q15_t)0x69c8, (q15_t)0xb7ef,\n    (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69c1, (q15_t)0xb7e4, (q15_t)0x69bd,\n    (q15_t)0xb7df, (q15_t)0x69ba, (q15_t)0xb7da, (q15_t)0x69b6, (q15_t)0xb7d5,\n    (q15_t)0x69b3, (q15_t)0xb7d0, (q15_t)0x69af, (q15_t)0xb7ca, (q15_t)0x69ac,\n    (q15_t)0xb7c5, (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x69a5, (q15_t)0xb7bb,\n    (q15_t)0x69a1, (q15_t)0xb7b6, (q15_t)0x699d, (q15_t)0xb7b1, (q15_t)0x699a,\n    (q15_t)0xb7ab, (q15_t)0x6996, (q15_t)0xb7a6, (q15_t)0x6993, (q15_t)0xb7a1,\n    (q15_t)0x698f, (q15_t)0xb79c, (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6988,\n    (q15_t)0xb791, (q15_t)0x6985, (q15_t)0xb78c, (q15_t)0x6981, (q15_t)0xb787,\n    (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x697a, (q15_t)0xb77d, (q15_t)0x6976,\n    (q15_t)0xb778, (q15_t)0x6973, (q15_t)0xb772, (q15_t)0x696f, (q15_t)0xb76d,\n    (q15_t)0x696c, (q15_t)0xb768, (q15_t)0x6968, (q15_t)0xb763, (q15_t)0x6964,\n    (q15_t)0xb75e, (q15_t)0x6961, (q15_t)0xb758, (q15_t)0x695d, (q15_t)0xb753,\n    (q15_t)0x695a, (q15_t)0xb74e, (q15_t)0x6956, (q15_t)0xb749, (q15_t)0x6953,\n    (q15_t)0xb744, (q15_t)0x694f, (q15_t)0xb73f, (q15_t)0x694b, (q15_t)0xb739,\n    (q15_t)0x6948, (q15_t)0xb734, (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6941,\n    (q15_t)0xb72a, (q15_t)0x693d, (q15_t)0xb725, (q15_t)0x693a, (q15_t)0xb720,\n    (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6932, (q15_t)0xb715, (q15_t)0x692f,\n    (q15_t)0xb710, (q15_t)0x692b, (q15_t)0xb70b, (q15_t)0x6928, (q15_t)0xb706,\n    (q15_t)0x6924, (q15_t)0xb701, (q15_t)0x6921, (q15_t)0xb6fb, (q15_t)0x691d,\n    (q15_t)0xb6f6, (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x6916, (q15_t)0xb6ec,\n    (q15_t)0x6912, (q15_t)0xb6e7, (q15_t)0x690f, (q15_t)0xb6e2, (q15_t)0x690b,\n    (q15_t)0xb6dd, (q15_t)0x6907, (q15_t)0xb6d7, (q15_t)0x6904, (q15_t)0xb6d2,\n    (q15_t)0x6900, (q15_t)0xb6cd, (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68f9,\n    (q15_t)0xb6c3, (q15_t)0x68f5, (q15_t)0xb6be, (q15_t)0x68f2, (q15_t)0xb6b8,\n    (q15_t)0x68ee, (q15_t)0xb6b3, (q15_t)0x68eb, (q15_t)0xb6ae, (q15_t)0x68e7,\n    (q15_t)0xb6a9, (q15_t)0x68e3, (q15_t)0xb6a4, (q15_t)0x68e0, (q15_t)0xb69f,\n    (q15_t)0x68dc, (q15_t)0xb69a, (q15_t)0x68d9, (q15_t)0xb694, (q15_t)0x68d5,\n    (q15_t)0xb68f, (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68ce, (q15_t)0xb685,\n    (q15_t)0x68ca, (q15_t)0xb680, (q15_t)0x68c7, (q15_t)0xb67b, (q15_t)0x68c3,\n    (q15_t)0xb676, (q15_t)0x68bf, (q15_t)0xb670, (q15_t)0x68bc, (q15_t)0xb66b,\n    (q15_t)0x68b8, (q15_t)0xb666, (q15_t)0x68b5, (q15_t)0xb661, (q15_t)0x68b1,\n    (q15_t)0xb65c, (q15_t)0x68ad, (q15_t)0xb657, (q15_t)0x68aa, (q15_t)0xb652,\n    (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x68a3, (q15_t)0xb647, (q15_t)0x689f,\n    (q15_t)0xb642, (q15_t)0x689b, (q15_t)0xb63d, (q15_t)0x6898, (q15_t)0xb638,\n    (q15_t)0x6894, (q15_t)0xb633, (q15_t)0x6890, (q15_t)0xb62e, (q15_t)0x688d,\n    (q15_t)0xb628, (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x6886, (q15_t)0xb61e,\n    (q15_t)0x6882, (q15_t)0xb619, (q15_t)0x687e, (q15_t)0xb614, (q15_t)0x687b,\n    (q15_t)0xb60f, (q15_t)0x6877, (q15_t)0xb60a, (q15_t)0x6873, (q15_t)0xb605,\n    (q15_t)0x6870, (q15_t)0xb5ff, (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6868,\n    (q15_t)0xb5f5, (q15_t)0x6865, (q15_t)0xb5f0, (q15_t)0x6861, (q15_t)0xb5eb,\n    (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x685a, (q15_t)0xb5e1, (q15_t)0x6856,\n    (q15_t)0xb5dc, (q15_t)0x6853, (q15_t)0xb5d6, (q15_t)0x684f, (q15_t)0xb5d1,\n    (q15_t)0x684b, (q15_t)0xb5cc, (q15_t)0x6848, (q15_t)0xb5c7, (q15_t)0x6844,\n    (q15_t)0xb5c2, (q15_t)0x6840, (q15_t)0xb5bd, (q15_t)0x683d, (q15_t)0xb5b8,\n    (q15_t)0x6839, (q15_t)0xb5b3, (q15_t)0x6835, (q15_t)0xb5ae, (q15_t)0x6832,\n    (q15_t)0xb5a8, (q15_t)0x682e, (q15_t)0xb5a3, (q15_t)0x682b, (q15_t)0xb59e,\n    (q15_t)0x6827, (q15_t)0xb599, (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6820,\n    (q15_t)0xb58f, (q15_t)0x681c, (q15_t)0xb58a, (q15_t)0x6818, (q15_t)0xb585,\n    (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6811, (q15_t)0xb57a, (q15_t)0x680d,\n    (q15_t)0xb575, (q15_t)0x680a, (q15_t)0xb570, (q15_t)0x6806, (q15_t)0xb56b,\n    (q15_t)0x6802, (q15_t)0xb566, (q15_t)0x67ff, (q15_t)0xb561, (q15_t)0x67fb,\n    (q15_t)0xb55c, (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67f4, (q15_t)0xb552,\n    (q15_t)0x67f0, (q15_t)0xb54c, (q15_t)0x67ec, (q15_t)0xb547, (q15_t)0x67e9,\n    (q15_t)0xb542, (q15_t)0x67e5, (q15_t)0xb53d, (q15_t)0x67e1, (q15_t)0xb538,\n    (q15_t)0x67de, (q15_t)0xb533, (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67d6,\n    (q15_t)0xb529, (q15_t)0x67d3, (q15_t)0xb524, (q15_t)0x67cf, (q15_t)0xb51f,\n    (q15_t)0x67cb, (q15_t)0xb519, (q15_t)0x67c8, (q15_t)0xb514, (q15_t)0x67c4,\n    (q15_t)0xb50f, (q15_t)0x67c0, (q15_t)0xb50a, (q15_t)0x67bd, (q15_t)0xb505,\n    (q15_t)0x67b9, (q15_t)0xb500, (q15_t)0x67b5, (q15_t)0xb4fb, (q15_t)0x67b2,\n    (q15_t)0xb4f6, (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x67aa, (q15_t)0xb4ec,\n    (q15_t)0x67a6, (q15_t)0xb4e7, (q15_t)0x67a3, (q15_t)0xb4e1, (q15_t)0x679f,\n    (q15_t)0xb4dc, (q15_t)0x679b, (q15_t)0xb4d7, (q15_t)0x6798, (q15_t)0xb4d2,\n    (q15_t)0x6794, (q15_t)0xb4cd, (q15_t)0x6790, (q15_t)0xb4c8, (q15_t)0x678d,\n    (q15_t)0xb4c3, (q15_t)0x6789, (q15_t)0xb4be, (q15_t)0x6785, (q15_t)0xb4b9,\n    (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x677e, (q15_t)0xb4af, (q15_t)0x677a,\n    (q15_t)0xb4aa, (q15_t)0x6776, (q15_t)0xb4a4, (q15_t)0x6773, (q15_t)0xb49f,\n    (q15_t)0x676f, (q15_t)0xb49a, (q15_t)0x676b, (q15_t)0xb495, (q15_t)0x6768,\n    (q15_t)0xb490, (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6760, (q15_t)0xb486,\n    (q15_t)0x675d, (q15_t)0xb481, (q15_t)0x6759, (q15_t)0xb47c, (q15_t)0x6755,\n    (q15_t)0xb477, (q15_t)0x6751, (q15_t)0xb472, (q15_t)0x674e, (q15_t)0xb46d,\n    (q15_t)0x674a, (q15_t)0xb468, (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6743,\n    (q15_t)0xb45d, (q15_t)0x673f, (q15_t)0xb458, (q15_t)0x673b, (q15_t)0xb453,\n    (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6734, (q15_t)0xb449, (q15_t)0x6730,\n    (q15_t)0xb444, (q15_t)0x672c, (q15_t)0xb43f, (q15_t)0x6729, (q15_t)0xb43a,\n    (q15_t)0x6725, (q15_t)0xb435, (q15_t)0x6721, (q15_t)0xb430, (q15_t)0x671d,\n    (q15_t)0xb42b, (q15_t)0x671a, (q15_t)0xb426, (q15_t)0x6716, (q15_t)0xb421,\n    (q15_t)0x6712, (q15_t)0xb41c, (q15_t)0x670e, (q15_t)0xb417, (q15_t)0x670b,\n    (q15_t)0xb411, (q15_t)0x6707, (q15_t)0xb40c, (q15_t)0x6703, (q15_t)0xb407,\n    (q15_t)0x6700, (q15_t)0xb402, (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66f8,\n    (q15_t)0xb3f8, (q15_t)0x66f4, (q15_t)0xb3f3, (q15_t)0x66f1, (q15_t)0xb3ee,\n    (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66e9, (q15_t)0xb3e4, (q15_t)0x66e5,\n    (q15_t)0xb3df, (q15_t)0x66e2, (q15_t)0xb3da, (q15_t)0x66de, (q15_t)0xb3d5,\n    (q15_t)0x66da, (q15_t)0xb3d0, (q15_t)0x66d6, (q15_t)0xb3cb, (q15_t)0x66d3,\n    (q15_t)0xb3c6, (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66cb, (q15_t)0xb3bc,\n    (q15_t)0x66c8, (q15_t)0xb3b7, (q15_t)0x66c4, (q15_t)0xb3b1, (q15_t)0x66c0,\n    (q15_t)0xb3ac, (q15_t)0x66bc, (q15_t)0xb3a7, (q15_t)0x66b9, (q15_t)0xb3a2,\n    (q15_t)0x66b5, (q15_t)0xb39d, (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66ad,\n    (q15_t)0xb393, (q15_t)0x66aa, (q15_t)0xb38e, (q15_t)0x66a6, (q15_t)0xb389,\n    (q15_t)0x66a2, (q15_t)0xb384, (q15_t)0x669e, (q15_t)0xb37f, (q15_t)0x669b,\n    (q15_t)0xb37a, (q15_t)0x6697, (q15_t)0xb375, (q15_t)0x6693, (q15_t)0xb370,\n    (q15_t)0x668f, (q15_t)0xb36b, (q15_t)0x668b, (q15_t)0xb366, (q15_t)0x6688,\n    (q15_t)0xb361, (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6680, (q15_t)0xb357,\n    (q15_t)0x667c, (q15_t)0xb352, (q15_t)0x6679, (q15_t)0xb34d, (q15_t)0x6675,\n    (q15_t)0xb348, (q15_t)0x6671, (q15_t)0xb343, (q15_t)0x666d, (q15_t)0xb33e,\n    (q15_t)0x666a, (q15_t)0xb339, (q15_t)0x6666, (q15_t)0xb334, (q15_t)0x6662,\n    (q15_t)0xb32f, (q15_t)0x665e, (q15_t)0xb32a, (q15_t)0x665b, (q15_t)0xb325,\n    (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6653, (q15_t)0xb31a, (q15_t)0x664f,\n    (q15_t)0xb315, (q15_t)0x664b, (q15_t)0xb310, (q15_t)0x6648, (q15_t)0xb30b,\n    (q15_t)0x6644, (q15_t)0xb306, (q15_t)0x6640, (q15_t)0xb301, (q15_t)0x663c,\n    (q15_t)0xb2fc, (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6635, (q15_t)0xb2f2,\n    (q15_t)0x6631, (q15_t)0xb2ed, (q15_t)0x662d, (q15_t)0xb2e8, (q15_t)0x6629,\n    (q15_t)0xb2e3, (q15_t)0x6626, (q15_t)0xb2de, (q15_t)0x6622, (q15_t)0xb2d9,\n    (q15_t)0x661e, (q15_t)0xb2d4, (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x6616,\n    (q15_t)0xb2ca, (q15_t)0x6613, (q15_t)0xb2c5, (q15_t)0x660f, (q15_t)0xb2c0,\n    (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x6607, (q15_t)0xb2b6, (q15_t)0x6603,\n    (q15_t)0xb2b1, (q15_t)0x6600, (q15_t)0xb2ac, (q15_t)0x65fc, (q15_t)0xb2a7,\n    (q15_t)0x65f8, (q15_t)0xb2a2, (q15_t)0x65f4, (q15_t)0xb29d, (q15_t)0x65f0,\n    (q15_t)0xb298, (q15_t)0x65ed, (q15_t)0xb293, (q15_t)0x65e9, (q15_t)0xb28e,\n    (q15_t)0x65e5, (q15_t)0xb289, (q15_t)0x65e1, (q15_t)0xb284, (q15_t)0x65dd,\n    (q15_t)0xb27f, (q15_t)0x65da, (q15_t)0xb27a, (q15_t)0x65d6, (q15_t)0xb275,\n    (q15_t)0x65d2, (q15_t)0xb270, (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65ca,\n    (q15_t)0xb266, (q15_t)0x65c7, (q15_t)0xb261, (q15_t)0x65c3, (q15_t)0xb25c,\n    (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65bb, (q15_t)0xb252, (q15_t)0x65b7,\n    (q15_t)0xb24d, (q15_t)0x65b4, (q15_t)0xb248, (q15_t)0x65b0, (q15_t)0xb243,\n    (q15_t)0x65ac, (q15_t)0xb23e, (q15_t)0x65a8, (q15_t)0xb239, (q15_t)0x65a4,\n    (q15_t)0xb234, (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x659d, (q15_t)0xb22a,\n    (q15_t)0x6599, (q15_t)0xb225, (q15_t)0x6595, (q15_t)0xb220, (q15_t)0x6591,\n    (q15_t)0xb21b, (q15_t)0x658d, (q15_t)0xb216, (q15_t)0x658a, (q15_t)0xb211,\n    (q15_t)0x6586, (q15_t)0xb20c, (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x657e,\n    (q15_t)0xb202, (q15_t)0x657a, (q15_t)0xb1fd, (q15_t)0x6576, (q15_t)0xb1f8,\n    (q15_t)0x6573, (q15_t)0xb1f3, (q15_t)0x656f, (q15_t)0xb1ee, (q15_t)0x656b,\n    (q15_t)0xb1e9, (q15_t)0x6567, (q15_t)0xb1e4, (q15_t)0x6563, (q15_t)0xb1df,\n    (q15_t)0x655f, (q15_t)0xb1da, (q15_t)0x655c, (q15_t)0xb1d6, (q15_t)0x6558,\n    (q15_t)0xb1d1, (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6550, (q15_t)0xb1c7,\n    (q15_t)0x654c, (q15_t)0xb1c2, (q15_t)0x6548, (q15_t)0xb1bd, (q15_t)0x6545,\n    (q15_t)0xb1b8, (q15_t)0x6541, (q15_t)0xb1b3, (q15_t)0x653d, (q15_t)0xb1ae,\n    (q15_t)0x6539, (q15_t)0xb1a9, (q15_t)0x6535, (q15_t)0xb1a4, (q15_t)0x6531,\n    (q15_t)0xb19f, (q15_t)0x652d, (q15_t)0xb19a, (q15_t)0x652a, (q15_t)0xb195,\n    (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6522, (q15_t)0xb18b, (q15_t)0x651e,\n    (q15_t)0xb186, (q15_t)0x651a, (q15_t)0xb181, (q15_t)0x6516, (q15_t)0xb17c,\n    (q15_t)0x6513, (q15_t)0xb177, (q15_t)0x650f, (q15_t)0xb172, (q15_t)0x650b,\n    (q15_t)0xb16d, (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x6503, (q15_t)0xb163,\n    (q15_t)0x64ff, (q15_t)0xb15e, (q15_t)0x64fb, (q15_t)0xb159, (q15_t)0x64f7,\n    (q15_t)0xb154, (q15_t)0x64f4, (q15_t)0xb14f, (q15_t)0x64f0, (q15_t)0xb14a,\n    (q15_t)0x64ec, (q15_t)0xb146, (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64e4,\n    (q15_t)0xb13c, (q15_t)0x64e0, (q15_t)0xb137, (q15_t)0x64dc, (q15_t)0xb132,\n    (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64d5, (q15_t)0xb128, (q15_t)0x64d1,\n    (q15_t)0xb123, (q15_t)0x64cd, (q15_t)0xb11e, (q15_t)0x64c9, (q15_t)0xb119,\n    (q15_t)0x64c5, (q15_t)0xb114, (q15_t)0x64c1, (q15_t)0xb10f, (q15_t)0x64bd,\n    (q15_t)0xb10a, (q15_t)0x64ba, (q15_t)0xb105, (q15_t)0x64b6, (q15_t)0xb100,\n    (q15_t)0x64b2, (q15_t)0xb0fb, (q15_t)0x64ae, (q15_t)0xb0f6, (q15_t)0x64aa,\n    (q15_t)0xb0f1, (q15_t)0x64a6, (q15_t)0xb0ec, (q15_t)0x64a2, (q15_t)0xb0e8,\n    (q15_t)0x649e, (q15_t)0xb0e3, (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x6497,\n    (q15_t)0xb0d9, (q15_t)0x6493, (q15_t)0xb0d4, (q15_t)0x648f, (q15_t)0xb0cf,\n    (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x6487, (q15_t)0xb0c5, (q15_t)0x6483,\n    (q15_t)0xb0c0, (q15_t)0x647f, (q15_t)0xb0bb, (q15_t)0x647b, (q15_t)0xb0b6,\n    (q15_t)0x6478, (q15_t)0xb0b1, (q15_t)0x6474, (q15_t)0xb0ac, (q15_t)0x6470,\n    (q15_t)0xb0a7, (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x6468, (q15_t)0xb09e,\n    (q15_t)0x6464, (q15_t)0xb099, (q15_t)0x6460, (q15_t)0xb094, (q15_t)0x645c,\n    (q15_t)0xb08f, (q15_t)0x6458, (q15_t)0xb08a, (q15_t)0x6454, (q15_t)0xb085,\n    (q15_t)0x6451, (q15_t)0xb080, (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x6449,\n    (q15_t)0xb076, (q15_t)0x6445, (q15_t)0xb071, (q15_t)0x6441, (q15_t)0xb06c,\n    (q15_t)0x643d, (q15_t)0xb067, (q15_t)0x6439, (q15_t)0xb062, (q15_t)0x6435,\n    (q15_t)0xb05e, (q15_t)0x6431, (q15_t)0xb059, (q15_t)0x642d, (q15_t)0xb054,\n    (q15_t)0x6429, (q15_t)0xb04f, (q15_t)0x6426, (q15_t)0xb04a, (q15_t)0x6422,\n    (q15_t)0xb045, (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x641a, (q15_t)0xb03b,\n    (q15_t)0x6416, (q15_t)0xb036, (q15_t)0x6412, (q15_t)0xb031, (q15_t)0x640e,\n    (q15_t)0xb02c, (q15_t)0x640a, (q15_t)0xb027, (q15_t)0x6406, (q15_t)0xb023,\n    (q15_t)0x6402, (q15_t)0xb01e, (q15_t)0x63fe, (q15_t)0xb019, (q15_t)0x63fa,\n    (q15_t)0xb014, (q15_t)0x63f7, (q15_t)0xb00f, (q15_t)0x63f3, (q15_t)0xb00a,\n    (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63eb, (q15_t)0xb000, (q15_t)0x63e7,\n    (q15_t)0xaffb, (q15_t)0x63e3, (q15_t)0xaff6, (q15_t)0x63df, (q15_t)0xaff1,\n    (q15_t)0x63db, (q15_t)0xafed, (q15_t)0x63d7, (q15_t)0xafe8, (q15_t)0x63d3,\n    (q15_t)0xafe3, (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63cb, (q15_t)0xafd9,\n    (q15_t)0x63c7, (q15_t)0xafd4, (q15_t)0x63c3, (q15_t)0xafcf, (q15_t)0x63c0,\n    (q15_t)0xafca, (q15_t)0x63bc, (q15_t)0xafc5, (q15_t)0x63b8, (q15_t)0xafc1,\n    (q15_t)0x63b4, (q15_t)0xafbc, (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63ac,\n    (q15_t)0xafb2, (q15_t)0x63a8, (q15_t)0xafad, (q15_t)0x63a4, (q15_t)0xafa8,\n    (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x639c, (q15_t)0xaf9e, (q15_t)0x6398,\n    (q15_t)0xaf99, (q15_t)0x6394, (q15_t)0xaf94, (q15_t)0x6390, (q15_t)0xaf90,\n    (q15_t)0x638c, (q15_t)0xaf8b, (q15_t)0x6388, (q15_t)0xaf86, (q15_t)0x6384,\n    (q15_t)0xaf81, (q15_t)0x6380, (q15_t)0xaf7c, (q15_t)0x637c, (q15_t)0xaf77,\n    (q15_t)0x6378, (q15_t)0xaf72, (q15_t)0x6375, (q15_t)0xaf6d, (q15_t)0x6371,\n    (q15_t)0xaf69, (q15_t)0x636d, (q15_t)0xaf64, (q15_t)0x6369, (q15_t)0xaf5f,\n    (q15_t)0x6365, (q15_t)0xaf5a, (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x635d,\n    (q15_t)0xaf50, (q15_t)0x6359, (q15_t)0xaf4b, (q15_t)0x6355, (q15_t)0xaf46,\n    (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x634d, (q15_t)0xaf3d, (q15_t)0x6349,\n    (q15_t)0xaf38, (q15_t)0x6345, (q15_t)0xaf33, (q15_t)0x6341, (q15_t)0xaf2e,\n    (q15_t)0x633d, (q15_t)0xaf29, (q15_t)0x6339, (q15_t)0xaf24, (q15_t)0x6335,\n    (q15_t)0xaf1f, (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x632d, (q15_t)0xaf16,\n    (q15_t)0x6329, (q15_t)0xaf11, (q15_t)0x6325, (q15_t)0xaf0c, (q15_t)0x6321,\n    (q15_t)0xaf07, (q15_t)0x631d, (q15_t)0xaf02, (q15_t)0x6319, (q15_t)0xaefd,\n    (q15_t)0x6315, (q15_t)0xaef8, (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x630d,\n    (q15_t)0xaeef, (q15_t)0x6309, (q15_t)0xaeea, (q15_t)0x6305, (q15_t)0xaee5,\n    (q15_t)0x6301, (q15_t)0xaee0, (q15_t)0x62fd, (q15_t)0xaedb, (q15_t)0x62f9,\n    (q15_t)0xaed6, (q15_t)0x62f5, (q15_t)0xaed2, (q15_t)0x62f2, (q15_t)0xaecd,\n    (q15_t)0x62ee, (q15_t)0xaec8, (q15_t)0x62ea, (q15_t)0xaec3, (q15_t)0x62e6,\n    (q15_t)0xaebe, (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62de, (q15_t)0xaeb4,\n    (q15_t)0x62da, (q15_t)0xaeb0, (q15_t)0x62d6, (q15_t)0xaeab, (q15_t)0x62d2,\n    (q15_t)0xaea6, (q15_t)0x62ce, (q15_t)0xaea1, (q15_t)0x62ca, (q15_t)0xae9c,\n    (q15_t)0x62c6, (q15_t)0xae97, (q15_t)0x62c2, (q15_t)0xae92, (q15_t)0x62be,\n    (q15_t)0xae8e, (q15_t)0x62ba, (q15_t)0xae89, (q15_t)0x62b6, (q15_t)0xae84,\n    (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62ae, (q15_t)0xae7a, (q15_t)0x62aa,\n    (q15_t)0xae75, (q15_t)0x62a6, (q15_t)0xae71, (q15_t)0x62a2, (q15_t)0xae6c,\n    (q15_t)0x629e, (q15_t)0xae67, (q15_t)0x629a, (q15_t)0xae62, (q15_t)0x6296,\n    (q15_t)0xae5d, (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x628e, (q15_t)0xae54,\n    (q15_t)0x628a, (q15_t)0xae4f, (q15_t)0x6286, (q15_t)0xae4a, (q15_t)0x6282,\n    (q15_t)0xae45, (q15_t)0x627e, (q15_t)0xae40, (q15_t)0x627a, (q15_t)0xae3b,\n    (q15_t)0x6275, (q15_t)0xae37, (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x626d,\n    (q15_t)0xae2d, (q15_t)0x6269, (q15_t)0xae28, (q15_t)0x6265, (q15_t)0xae23,\n    (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x625d, (q15_t)0xae1a, (q15_t)0x6259,\n    (q15_t)0xae15, (q15_t)0x6255, (q15_t)0xae10, (q15_t)0x6251, (q15_t)0xae0b,\n    (q15_t)0x624d, (q15_t)0xae06, (q15_t)0x6249, (q15_t)0xae01, (q15_t)0x6245,\n    (q15_t)0xadfd, (q15_t)0x6241, (q15_t)0xadf8, (q15_t)0x623d, (q15_t)0xadf3,\n    (q15_t)0x6239, (q15_t)0xadee, (q15_t)0x6235, (q15_t)0xade9, (q15_t)0x6231,\n    (q15_t)0xade4, (q15_t)0x622d, (q15_t)0xade0, (q15_t)0x6229, (q15_t)0xaddb,\n    (q15_t)0x6225, (q15_t)0xadd6, (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x621d,\n    (q15_t)0xadcc, (q15_t)0x6219, (q15_t)0xadc8, (q15_t)0x6215, (q15_t)0xadc3,\n    (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x620d, (q15_t)0xadb9, (q15_t)0x6209,\n    (q15_t)0xadb4, (q15_t)0x6205, (q15_t)0xadaf, (q15_t)0x6201, (q15_t)0xadab,\n    (q15_t)0x61fd, (q15_t)0xada6, (q15_t)0x61f9, (q15_t)0xada1, (q15_t)0x61f5,\n    (q15_t)0xad9c, (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61ec, (q15_t)0xad93,\n    (q15_t)0x61e8, (q15_t)0xad8e, (q15_t)0x61e4, (q15_t)0xad89, (q15_t)0x61e0,\n    (q15_t)0xad84, (q15_t)0x61dc, (q15_t)0xad7f, (q15_t)0x61d8, (q15_t)0xad7b,\n    (q15_t)0x61d4, (q15_t)0xad76, (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61cc,\n    (q15_t)0xad6c, (q15_t)0x61c8, (q15_t)0xad67, (q15_t)0x61c4, (q15_t)0xad63,\n    (q15_t)0x61c0, (q15_t)0xad5e, (q15_t)0x61bc, (q15_t)0xad59, (q15_t)0x61b8,\n    (q15_t)0xad54, (q15_t)0x61b4, (q15_t)0xad4f, (q15_t)0x61b0, (q15_t)0xad4b,\n    (q15_t)0x61ac, (q15_t)0xad46, (q15_t)0x61a8, (q15_t)0xad41, (q15_t)0x61a3,\n    (q15_t)0xad3c, (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x619b, (q15_t)0xad33,\n    (q15_t)0x6197, (q15_t)0xad2e, (q15_t)0x6193, (q15_t)0xad29, (q15_t)0x618f,\n    (q15_t)0xad24, (q15_t)0x618b, (q15_t)0xad1f, (q15_t)0x6187, (q15_t)0xad1b,\n    (q15_t)0x6183, (q15_t)0xad16, (q15_t)0x617f, (q15_t)0xad11, (q15_t)0x617b,\n    (q15_t)0xad0c, (q15_t)0x6177, (q15_t)0xad08, (q15_t)0x6173, (q15_t)0xad03,\n    (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x616b, (q15_t)0xacf9, (q15_t)0x6166,\n    (q15_t)0xacf4, (q15_t)0x6162, (q15_t)0xacf0, (q15_t)0x615e, (q15_t)0xaceb,\n    (q15_t)0x615a, (q15_t)0xace6, (q15_t)0x6156, (q15_t)0xace1, (q15_t)0x6152,\n    (q15_t)0xacdd, (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x614a, (q15_t)0xacd3,\n    (q15_t)0x6146, (q15_t)0xacce, (q15_t)0x6142, (q15_t)0xacc9, (q15_t)0x613e,\n    (q15_t)0xacc5, (q15_t)0x613a, (q15_t)0xacc0, (q15_t)0x6135, (q15_t)0xacbb,\n    (q15_t)0x6131, (q15_t)0xacb6, (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x6129,\n    (q15_t)0xacad, (q15_t)0x6125, (q15_t)0xaca8, (q15_t)0x6121, (q15_t)0xaca3,\n    (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x6119, (q15_t)0xac9a, (q15_t)0x6115,\n    (q15_t)0xac95, (q15_t)0x6111, (q15_t)0xac90, (q15_t)0x610d, (q15_t)0xac8b,\n    (q15_t)0x6108, (q15_t)0xac87, (q15_t)0x6104, (q15_t)0xac82, (q15_t)0x6100,\n    (q15_t)0xac7d, (q15_t)0x60fc, (q15_t)0xac78, (q15_t)0x60f8, (q15_t)0xac74,\n    (q15_t)0x60f4, (q15_t)0xac6f, (q15_t)0x60f0, (q15_t)0xac6a, (q15_t)0x60ec,\n    (q15_t)0xac65, (q15_t)0x60e8, (q15_t)0xac61, (q15_t)0x60e4, (q15_t)0xac5c,\n    (q15_t)0x60df, (q15_t)0xac57, (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60d7,\n    (q15_t)0xac4e, (q15_t)0x60d3, (q15_t)0xac49, (q15_t)0x60cf, (q15_t)0xac44,\n    (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60c7, (q15_t)0xac3b, (q15_t)0x60c3,\n    (q15_t)0xac36, (q15_t)0x60bf, (q15_t)0xac31, (q15_t)0x60ba, (q15_t)0xac2c,\n    (q15_t)0x60b6, (q15_t)0xac28, (q15_t)0x60b2, (q15_t)0xac23, (q15_t)0x60ae,\n    (q15_t)0xac1e, (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x60a6, (q15_t)0xac15,\n    (q15_t)0x60a2, (q15_t)0xac10, (q15_t)0x609e, (q15_t)0xac0b, (q15_t)0x6099,\n    (q15_t)0xac06, (q15_t)0x6095, (q15_t)0xac02, (q15_t)0x6091, (q15_t)0xabfd,\n    (q15_t)0x608d, (q15_t)0xabf8, (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6085,\n    (q15_t)0xabef, (q15_t)0x6081, (q15_t)0xabea, (q15_t)0x607d, (q15_t)0xabe5,\n    (q15_t)0x6078, (q15_t)0xabe0, (q15_t)0x6074, (q15_t)0xabdc, (q15_t)0x6070,\n    (q15_t)0xabd7, (q15_t)0x606c, (q15_t)0xabd2, (q15_t)0x6068, (q15_t)0xabcd,\n    (q15_t)0x6064, (q15_t)0xabc9, (q15_t)0x6060, (q15_t)0xabc4, (q15_t)0x605c,\n    (q15_t)0xabbf, (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6053, (q15_t)0xabb6,\n    (q15_t)0x604f, (q15_t)0xabb1, (q15_t)0x604b, (q15_t)0xabac, (q15_t)0x6047,\n    (q15_t)0xaba8, (q15_t)0x6043, (q15_t)0xaba3, (q15_t)0x603f, (q15_t)0xab9e,\n    (q15_t)0x603a, (q15_t)0xab99, (q15_t)0x6036, (q15_t)0xab95, (q15_t)0x6032,\n    (q15_t)0xab90, (q15_t)0x602e, (q15_t)0xab8b, (q15_t)0x602a, (q15_t)0xab87,\n    (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6022, (q15_t)0xab7d, (q15_t)0x601d,\n    (q15_t)0xab78, (q15_t)0x6019, (q15_t)0xab74, (q15_t)0x6015, (q15_t)0xab6f,\n    (q15_t)0x6011, (q15_t)0xab6a, (q15_t)0x600d, (q15_t)0xab66, (q15_t)0x6009,\n    (q15_t)0xab61, (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x6000, (q15_t)0xab57,\n    (q15_t)0x5ffc, (q15_t)0xab53, (q15_t)0x5ff8, (q15_t)0xab4e, (q15_t)0x5ff4,\n    (q15_t)0xab49, (q15_t)0x5ff0, (q15_t)0xab45, (q15_t)0x5fec, (q15_t)0xab40,\n    (q15_t)0x5fe7, (q15_t)0xab3b, (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fdf,\n    (q15_t)0xab32, (q15_t)0x5fdb, (q15_t)0xab2d, (q15_t)0x5fd7, (q15_t)0xab28,\n    (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fce, (q15_t)0xab1f, (q15_t)0x5fca,\n    (q15_t)0xab1a, (q15_t)0x5fc6, (q15_t)0xab16, (q15_t)0x5fc2, (q15_t)0xab11,\n    (q15_t)0x5fbe, (q15_t)0xab0c, (q15_t)0x5fba, (q15_t)0xab07, (q15_t)0x5fb5,\n    (q15_t)0xab03, (q15_t)0x5fb1, (q15_t)0xaafe, (q15_t)0x5fad, (q15_t)0xaaf9,\n    (q15_t)0x5fa9, (q15_t)0xaaf5, (q15_t)0x5fa5, (q15_t)0xaaf0, (q15_t)0x5fa0,\n    (q15_t)0xaaeb, (q15_t)0x5f9c, (q15_t)0xaae7, (q15_t)0x5f98, (q15_t)0xaae2,\n    (q15_t)0x5f94, (q15_t)0xaadd, (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f8c,\n    (q15_t)0xaad4, (q15_t)0x5f87, (q15_t)0xaacf, (q15_t)0x5f83, (q15_t)0xaaca,\n    (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f7b, (q15_t)0xaac1, (q15_t)0x5f77,\n    (q15_t)0xaabc, (q15_t)0x5f72, (q15_t)0xaab8, (q15_t)0x5f6e, (q15_t)0xaab3,\n    (q15_t)0x5f6a, (q15_t)0xaaae, (q15_t)0x5f66, (q15_t)0xaaaa, (q15_t)0x5f62,\n    (q15_t)0xaaa5, (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f59, (q15_t)0xaa9c,\n    (q15_t)0x5f55, (q15_t)0xaa97, (q15_t)0x5f51, (q15_t)0xaa92, (q15_t)0x5f4d,\n    (q15_t)0xaa8e, (q15_t)0x5f49, (q15_t)0xaa89, (q15_t)0x5f44, (q15_t)0xaa84,\n    (q15_t)0x5f40, (q15_t)0xaa7f, (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f38,\n    (q15_t)0xaa76, (q15_t)0x5f34, (q15_t)0xaa71, (q15_t)0x5f2f, (q15_t)0xaa6d,\n    (q15_t)0x5f2b, (q15_t)0xaa68, (q15_t)0x5f27, (q15_t)0xaa63, (q15_t)0x5f23,\n    (q15_t)0xaa5f, (q15_t)0x5f1f, (q15_t)0xaa5a, (q15_t)0x5f1a, (q15_t)0xaa55,\n    (q15_t)0x5f16, (q15_t)0xaa51, (q15_t)0x5f12, (q15_t)0xaa4c, (q15_t)0x5f0e,\n    (q15_t)0xaa47, (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5f05, (q15_t)0xaa3e,\n    (q15_t)0x5f01, (q15_t)0xaa39, (q15_t)0x5efd, (q15_t)0xaa35, (q15_t)0x5ef9,\n    (q15_t)0xaa30, (q15_t)0x5ef5, (q15_t)0xaa2b, (q15_t)0x5ef0, (q15_t)0xaa27,\n    (q15_t)0x5eec, (q15_t)0xaa22, (q15_t)0x5ee8, (q15_t)0xaa1d, (q15_t)0x5ee4,\n    (q15_t)0xaa19, (q15_t)0x5edf, (q15_t)0xaa14, (q15_t)0x5edb, (q15_t)0xaa10,\n    (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ed3, (q15_t)0xaa06, (q15_t)0x5ecf,\n    (q15_t)0xaa02, (q15_t)0x5eca, (q15_t)0xa9fd, (q15_t)0x5ec6, (q15_t)0xa9f8,\n    (q15_t)0x5ec2, (q15_t)0xa9f4, (q15_t)0x5ebe, (q15_t)0xa9ef, (q15_t)0x5eb9,\n    (q15_t)0xa9ea, (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5eb1, (q15_t)0xa9e1,\n    (q15_t)0x5ead, (q15_t)0xa9dc, (q15_t)0x5ea9, (q15_t)0xa9d8, (q15_t)0x5ea4,\n    (q15_t)0xa9d3, (q15_t)0x5ea0, (q15_t)0xa9ce, (q15_t)0x5e9c, (q15_t)0xa9ca,\n    (q15_t)0x5e98, (q15_t)0xa9c5, (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e8f,\n    (q15_t)0xa9bc, (q15_t)0x5e8b, (q15_t)0xa9b7, (q15_t)0x5e87, (q15_t)0xa9b3,\n    (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e7e, (q15_t)0xa9a9, (q15_t)0x5e7a,\n    (q15_t)0xa9a5, (q15_t)0x5e76, (q15_t)0xa9a0, (q15_t)0x5e71, (q15_t)0xa99b,\n    (q15_t)0x5e6d, (q15_t)0xa997, (q15_t)0x5e69, (q15_t)0xa992, (q15_t)0x5e65,\n    (q15_t)0xa98d, (q15_t)0x5e60, (q15_t)0xa989, (q15_t)0x5e5c, (q15_t)0xa984,\n    (q15_t)0x5e58, (q15_t)0xa980, (q15_t)0x5e54, (q15_t)0xa97b, (q15_t)0x5e50,\n    (q15_t)0xa976, (q15_t)0x5e4b, (q15_t)0xa972, (q15_t)0x5e47, (q15_t)0xa96d,\n    (q15_t)0x5e43, (q15_t)0xa968, (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e3a,\n    (q15_t)0xa95f, (q15_t)0x5e36, (q15_t)0xa95b, (q15_t)0x5e32, (q15_t)0xa956,\n    (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e29, (q15_t)0xa94d, (q15_t)0x5e25,\n    (q15_t)0xa948, (q15_t)0x5e21, (q15_t)0xa943, (q15_t)0x5e1c, (q15_t)0xa93f,\n    (q15_t)0x5e18, (q15_t)0xa93a, (q15_t)0x5e14, (q15_t)0xa936, (q15_t)0x5e10,\n    (q15_t)0xa931, (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5e07, (q15_t)0xa928,\n    (q15_t)0x5e03, (q15_t)0xa923, (q15_t)0x5dff, (q15_t)0xa91e, (q15_t)0x5dfa,\n    (q15_t)0xa91a, (q15_t)0x5df6, (q15_t)0xa915, (q15_t)0x5df2, (q15_t)0xa911,\n    (q15_t)0x5dee, (q15_t)0xa90c, (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5de5,\n    (q15_t)0xa903, (q15_t)0x5de1, (q15_t)0xa8fe, (q15_t)0x5ddc, (q15_t)0xa8fa,\n    (q15_t)0x5dd8, (q15_t)0xa8f5, (q15_t)0x5dd4, (q15_t)0xa8f0, (q15_t)0x5dd0,\n    (q15_t)0xa8ec, (q15_t)0x5dcb, (q15_t)0xa8e7, (q15_t)0x5dc7, (q15_t)0xa8e3,\n    (q15_t)0x5dc3, (q15_t)0xa8de, (q15_t)0x5dbf, (q15_t)0xa8d9, (q15_t)0x5dba,\n    (q15_t)0xa8d5, (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5db2, (q15_t)0xa8cc,\n    (q15_t)0x5dad, (q15_t)0xa8c7, (q15_t)0x5da9, (q15_t)0xa8c2, (q15_t)0x5da5,\n    (q15_t)0xa8be, (q15_t)0x5da1, (q15_t)0xa8b9, (q15_t)0x5d9c, (q15_t)0xa8b5,\n    (q15_t)0x5d98, (q15_t)0xa8b0, (q15_t)0x5d94, (q15_t)0xa8ab, (q15_t)0x5d8f,\n    (q15_t)0xa8a7, (q15_t)0x5d8b, (q15_t)0xa8a2, (q15_t)0x5d87, (q15_t)0xa89e,\n    (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d7e, (q15_t)0xa894, (q15_t)0x5d7a,\n    (q15_t)0xa890, (q15_t)0x5d76, (q15_t)0xa88b, (q15_t)0x5d71, (q15_t)0xa887,\n    (q15_t)0x5d6d, (q15_t)0xa882, (q15_t)0x5d69, (q15_t)0xa87d, (q15_t)0x5d65,\n    (q15_t)0xa879, (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d5c, (q15_t)0xa870,\n    (q15_t)0x5d58, (q15_t)0xa86b, (q15_t)0x5d53, (q15_t)0xa867, (q15_t)0x5d4f,\n    (q15_t)0xa862, (q15_t)0x5d4b, (q15_t)0xa85d, (q15_t)0x5d46, (q15_t)0xa859,\n    (q15_t)0x5d42, (q15_t)0xa854, (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d3a,\n    (q15_t)0xa84b, (q15_t)0x5d35, (q15_t)0xa847, (q15_t)0x5d31, (q15_t)0xa842,\n    (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d28, (q15_t)0xa839, (q15_t)0x5d24,\n    (q15_t)0xa834, (q15_t)0x5d20, (q15_t)0xa830, (q15_t)0x5d1b, (q15_t)0xa82b,\n    (q15_t)0x5d17, (q15_t)0xa827, (q15_t)0x5d13, (q15_t)0xa822, (q15_t)0x5d0e,\n    (q15_t)0xa81d, (q15_t)0x5d0a, (q15_t)0xa819, (q15_t)0x5d06, (q15_t)0xa814,\n    (q15_t)0x5d01, (q15_t)0xa810, (q15_t)0x5cfd, (q15_t)0xa80b, (q15_t)0x5cf9,\n    (q15_t)0xa807, (q15_t)0x5cf5, (q15_t)0xa802, (q15_t)0x5cf0, (q15_t)0xa7fd,\n    (q15_t)0x5cec, (q15_t)0xa7f9, (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5ce3,\n    (q15_t)0xa7f0, (q15_t)0x5cdf, (q15_t)0xa7eb, (q15_t)0x5cdb, (q15_t)0xa7e7,\n    (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cd2, (q15_t)0xa7de, (q15_t)0x5cce,\n    (q15_t)0xa7d9, (q15_t)0x5cc9, (q15_t)0xa7d4, (q15_t)0x5cc5, (q15_t)0xa7d0,\n    (q15_t)0x5cc1, (q15_t)0xa7cb, (q15_t)0x5cbc, (q15_t)0xa7c7, (q15_t)0x5cb8,\n    (q15_t)0xa7c2, (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5caf, (q15_t)0xa7b9,\n    (q15_t)0x5cab, (q15_t)0xa7b5, (q15_t)0x5ca7, (q15_t)0xa7b0, (q15_t)0x5ca2,\n    (q15_t)0xa7ab, (q15_t)0x5c9e, (q15_t)0xa7a7, (q15_t)0x5c9a, (q15_t)0xa7a2,\n    (q15_t)0x5c95, (q15_t)0xa79e, (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c8d,\n    (q15_t)0xa795, (q15_t)0x5c88, (q15_t)0xa790, (q15_t)0x5c84, (q15_t)0xa78c,\n    (q15_t)0x5c80, (q15_t)0xa787, (q15_t)0x5c7b, (q15_t)0xa783, (q15_t)0x5c77,\n    (q15_t)0xa77e, (q15_t)0x5c73, (q15_t)0xa779, (q15_t)0x5c6e, (q15_t)0xa775,\n    (q15_t)0x5c6a, (q15_t)0xa770, (q15_t)0x5c66, (q15_t)0xa76c, (q15_t)0x5c61,\n    (q15_t)0xa767, (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c58, (q15_t)0xa75e,\n    (q15_t)0x5c54, (q15_t)0xa75a, (q15_t)0x5c50, (q15_t)0xa755, (q15_t)0x5c4b,\n    (q15_t)0xa751, (q15_t)0x5c47, (q15_t)0xa74c, (q15_t)0x5c43, (q15_t)0xa748,\n    (q15_t)0x5c3e, (q15_t)0xa743, (q15_t)0x5c3a, (q15_t)0xa73f, (q15_t)0x5c36,\n    (q15_t)0xa73a, (q15_t)0x5c31, (q15_t)0xa735, (q15_t)0x5c2d, (q15_t)0xa731,\n    (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c24, (q15_t)0xa728, (q15_t)0x5c20,\n    (q15_t)0xa723, (q15_t)0x5c1b, (q15_t)0xa71f, (q15_t)0x5c17, (q15_t)0xa71a,\n    (q15_t)0x5c13, (q15_t)0xa716, (q15_t)0x5c0e, (q15_t)0xa711, (q15_t)0x5c0a,\n    (q15_t)0xa70d, (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5c01, (q15_t)0xa704,\n    (q15_t)0x5bfd, (q15_t)0xa6ff, (q15_t)0x5bf9, (q15_t)0xa6fb, (q15_t)0x5bf4,\n    (q15_t)0xa6f6, (q15_t)0x5bf0, (q15_t)0xa6f2, (q15_t)0x5beb, (q15_t)0xa6ed,\n    (q15_t)0x5be7, (q15_t)0xa6e9, (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bde,\n    (q15_t)0xa6e0, (q15_t)0x5bda, (q15_t)0xa6db, (q15_t)0x5bd6, (q15_t)0xa6d7,\n    (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bcd, (q15_t)0xa6ce, (q15_t)0x5bc8,\n    (q15_t)0xa6c9, (q15_t)0x5bc4, (q15_t)0xa6c5, (q15_t)0x5bc0, (q15_t)0xa6c0,\n    (q15_t)0x5bbb, (q15_t)0xa6bc, (q15_t)0x5bb7, (q15_t)0xa6b7, (q15_t)0x5bb2,\n    (q15_t)0xa6b3, (q15_t)0x5bae, (q15_t)0xa6ae, (q15_t)0x5baa, (q15_t)0xa6aa,\n    (q15_t)0x5ba5, (q15_t)0xa6a5, (q15_t)0x5ba1, (q15_t)0xa6a1, (q15_t)0x5b9d,\n    (q15_t)0xa69c, (q15_t)0x5b98, (q15_t)0xa698, (q15_t)0x5b94, (q15_t)0xa693,\n    (q15_t)0x5b8f, (q15_t)0xa68f, (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b87,\n    (q15_t)0xa686, (q15_t)0x5b82, (q15_t)0xa681, (q15_t)0x5b7e, (q15_t)0xa67d,\n    (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b75, (q15_t)0xa674, (q15_t)0x5b71,\n    (q15_t)0xa66f, (q15_t)0x5b6c, (q15_t)0xa66b, (q15_t)0x5b68, (q15_t)0xa666,\n    (q15_t)0x5b63, (q15_t)0xa662, (q15_t)0x5b5f, (q15_t)0xa65d, (q15_t)0x5b5b,\n    (q15_t)0xa659, (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b52, (q15_t)0xa650,\n    (q15_t)0x5b4d, (q15_t)0xa64b, (q15_t)0x5b49, (q15_t)0xa647, (q15_t)0x5b45,\n    (q15_t)0xa642, (q15_t)0x5b40, (q15_t)0xa63e, (q15_t)0x5b3c, (q15_t)0xa639,\n    (q15_t)0x5b37, (q15_t)0xa635, (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b2f,\n    (q15_t)0xa62c, (q15_t)0x5b2a, (q15_t)0xa627, (q15_t)0x5b26, (q15_t)0xa623,\n    (q15_t)0x5b21, (q15_t)0xa61f, (q15_t)0x5b1d, (q15_t)0xa61a, (q15_t)0x5b19,\n    (q15_t)0xa616, (q15_t)0x5b14, (q15_t)0xa611, (q15_t)0x5b10, (q15_t)0xa60d,\n    (q15_t)0x5b0b, (q15_t)0xa608, (q15_t)0x5b07, (q15_t)0xa604, (q15_t)0x5b02,\n    (q15_t)0xa5ff, (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5afa, (q15_t)0xa5f6,\n    (q15_t)0x5af5, (q15_t)0xa5f2, (q15_t)0x5af1, (q15_t)0xa5ed, (q15_t)0x5aec,\n    (q15_t)0xa5e9, (q15_t)0x5ae8, (q15_t)0xa5e4, (q15_t)0x5ae4, (q15_t)0xa5e0,\n    (q15_t)0x5adf, (q15_t)0xa5dc, (q15_t)0x5adb, (q15_t)0xa5d7, (q15_t)0x5ad6,\n    (q15_t)0xa5d3, (q15_t)0x5ad2, (q15_t)0xa5ce, (q15_t)0x5acd, (q15_t)0xa5ca,\n    (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ac5, (q15_t)0xa5c1, (q15_t)0x5ac0,\n    (q15_t)0xa5bc, (q15_t)0x5abc, (q15_t)0xa5b8, (q15_t)0x5ab7, (q15_t)0xa5b3,\n    (q15_t)0x5ab3, (q15_t)0xa5af, (q15_t)0x5aae, (q15_t)0xa5aa, (q15_t)0x5aaa,\n    (q15_t)0xa5a6, (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5aa1, (q15_t)0xa59d,\n    (q15_t)0x5a9d, (q15_t)0xa599, (q15_t)0x5a98, (q15_t)0xa594, (q15_t)0x5a94,\n    (q15_t)0xa590, (q15_t)0x5a8f, (q15_t)0xa58b, (q15_t)0x5a8b, (q15_t)0xa587,\n    (q15_t)0x5a86, (q15_t)0xa582, (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a7e,\n    (q15_t)0xa57a, (q15_t)0x5a79, (q15_t)0xa575, (q15_t)0x5a75, (q15_t)0xa571,\n    (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a6c, (q15_t)0xa568, (q15_t)0x5a67,\n    (q15_t)0xa563, (q15_t)0x5a63, (q15_t)0xa55f, (q15_t)0x5a5e, (q15_t)0xa55b,\n    (q15_t)0x5a5a, (q15_t)0xa556, (q15_t)0x5a56, (q15_t)0xa552, (q15_t)0x5a51,\n    (q15_t)0xa54d, (q15_t)0x5a4d, (q15_t)0xa549, (q15_t)0x5a48, (q15_t)0xa544,\n    (q15_t)0x5a44, (q15_t)0xa540, (q15_t)0x5a3f, (q15_t)0xa53b, (q15_t)0x5a3b,\n    (q15_t)0xa537, (q15_t)0x5a36, (q15_t)0xa533, (q15_t)0x5a32, (q15_t)0xa52e,\n    (q15_t)0x5a2d, (q15_t)0xa52a, (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a24,\n    (q15_t)0xa521, (q15_t)0x5a20, (q15_t)0xa51c, (q15_t)0x5a1c, (q15_t)0xa518,\n    (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a13, (q15_t)0xa50f, (q15_t)0x5a0e,\n    (q15_t)0xa50b, (q15_t)0x5a0a, (q15_t)0xa506, (q15_t)0x5a05, (q15_t)0xa502,\n    (q15_t)0x5a01, (q15_t)0xa4fe, (q15_t)0x59fc, (q15_t)0xa4f9, (q15_t)0x59f8,\n    (q15_t)0xa4f5, (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ef, (q15_t)0xa4ec,\n    (q15_t)0x59ea, (q15_t)0xa4e7, (q15_t)0x59e6, (q15_t)0xa4e3, (q15_t)0x59e1,\n    (q15_t)0xa4df, (q15_t)0x59dd, (q15_t)0xa4da, (q15_t)0x59d9, (q15_t)0xa4d6,\n    (q15_t)0x59d4, (q15_t)0xa4d1, (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59cb,\n    (q15_t)0xa4c9, (q15_t)0x59c7, (q15_t)0xa4c4, (q15_t)0x59c2, (q15_t)0xa4c0,\n    (q15_t)0x59be, (q15_t)0xa4bb, (q15_t)0x59b9, (q15_t)0xa4b7, (q15_t)0x59b5,\n    (q15_t)0xa4b3, (q15_t)0x59b0, (q15_t)0xa4ae, (q15_t)0x59ac, (q15_t)0xa4aa,\n    (q15_t)0x59a7, (q15_t)0xa4a5, (q15_t)0x59a3, (q15_t)0xa4a1, (q15_t)0x599e,\n    (q15_t)0xa49d, (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5995, (q15_t)0xa494,\n    (q15_t)0x5991, (q15_t)0xa48f, (q15_t)0x598c, (q15_t)0xa48b, (q15_t)0x5988,\n    (q15_t)0xa487, (q15_t)0x5983, (q15_t)0xa482, (q15_t)0x597f, (q15_t)0xa47e,\n    (q15_t)0x597a, (q15_t)0xa479, (q15_t)0x5976, (q15_t)0xa475, (q15_t)0x5971,\n    (q15_t)0xa471, (q15_t)0x596d, (q15_t)0xa46c, (q15_t)0x5968, (q15_t)0xa468,\n    (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x595f, (q15_t)0xa45f, (q15_t)0x595b,\n    (q15_t)0xa45b, (q15_t)0x5956, (q15_t)0xa456, (q15_t)0x5952, (q15_t)0xa452,\n    (q15_t)0x594d, (q15_t)0xa44e, (q15_t)0x5949, (q15_t)0xa449, (q15_t)0x5944,\n    (q15_t)0xa445, (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x593b, (q15_t)0xa43c,\n    (q15_t)0x5937, (q15_t)0xa438, (q15_t)0x5932, (q15_t)0xa433, (q15_t)0x592e,\n    (q15_t)0xa42f, (q15_t)0x5929, (q15_t)0xa42a, (q15_t)0x5925, (q15_t)0xa426,\n    (q15_t)0x5920, (q15_t)0xa422, (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x5917,\n    (q15_t)0xa419, (q15_t)0x5913, (q15_t)0xa415, (q15_t)0x590e, (q15_t)0xa410,\n    (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x5905, (q15_t)0xa407, (q15_t)0x5901,\n    (q15_t)0xa403, (q15_t)0x58fc, (q15_t)0xa3ff, (q15_t)0x58f8, (q15_t)0xa3fa,\n    (q15_t)0x58f3, (q15_t)0xa3f6, (q15_t)0x58ef, (q15_t)0xa3f2, (q15_t)0x58ea,\n    (q15_t)0xa3ed, (q15_t)0x58e6, (q15_t)0xa3e9, (q15_t)0x58e1, (q15_t)0xa3e5,\n    (q15_t)0x58dd, (q15_t)0xa3e0, (q15_t)0x58d8, (q15_t)0xa3dc, (q15_t)0x58d4,\n    (q15_t)0xa3d7, (q15_t)0x58cf, (q15_t)0xa3d3, (q15_t)0x58cb, (q15_t)0xa3cf,\n    (q15_t)0x58c6, (q15_t)0xa3ca, (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58bd,\n    (q15_t)0xa3c2, (q15_t)0x58b8, (q15_t)0xa3bd, (q15_t)0x58b4, (q15_t)0xa3b9,\n    (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x58ab, (q15_t)0xa3b0, (q15_t)0x58a6,\n    (q15_t)0xa3ac, (q15_t)0x58a2, (q15_t)0xa3a8, (q15_t)0x589d, (q15_t)0xa3a3,\n    (q15_t)0x5899, (q15_t)0xa39f, (q15_t)0x5894, (q15_t)0xa39a, (q15_t)0x5890,\n    (q15_t)0xa396, (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5887, (q15_t)0xa38d,\n    (q15_t)0x5882, (q15_t)0xa389, (q15_t)0x587d, (q15_t)0xa385, (q15_t)0x5879,\n    (q15_t)0xa380, (q15_t)0x5874, (q15_t)0xa37c, (q15_t)0x5870, (q15_t)0xa378,\n    (q15_t)0x586b, (q15_t)0xa373, (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5862,\n    (q15_t)0xa36b, (q15_t)0x585e, (q15_t)0xa366, (q15_t)0x5859, (q15_t)0xa362,\n    (q15_t)0x5855, (q15_t)0xa35e, (q15_t)0x5850, (q15_t)0xa359, (q15_t)0x584b,\n    (q15_t)0xa355, (q15_t)0x5847, (q15_t)0xa351, (q15_t)0x5842, (q15_t)0xa34c,\n    (q15_t)0x583e, (q15_t)0xa348, (q15_t)0x5839, (q15_t)0xa344, (q15_t)0x5835,\n    (q15_t)0xa33f, (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x582c, (q15_t)0xa337,\n    (q15_t)0x5827, (q15_t)0xa332, (q15_t)0x5822, (q15_t)0xa32e, (q15_t)0x581e,\n    (q15_t)0xa32a, (q15_t)0x5819, (q15_t)0xa325, (q15_t)0x5815, (q15_t)0xa321,\n    (q15_t)0x5810, (q15_t)0xa31d, (q15_t)0x580c, (q15_t)0xa318, (q15_t)0x5807,\n    (q15_t)0xa314, (q15_t)0x5803, (q15_t)0xa310, (q15_t)0x57fe, (q15_t)0xa30b,\n    (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57f5, (q15_t)0xa303, (q15_t)0x57f0,\n    (q15_t)0xa2ff, (q15_t)0x57ec, (q15_t)0xa2fa, (q15_t)0x57e7, (q15_t)0xa2f6,\n    (q15_t)0x57e3, (q15_t)0xa2f2, (q15_t)0x57de, (q15_t)0xa2ed, (q15_t)0x57d9,\n    (q15_t)0xa2e9, (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57d0, (q15_t)0xa2e0,\n    (q15_t)0x57cc, (q15_t)0xa2dc, (q15_t)0x57c7, (q15_t)0xa2d8, (q15_t)0x57c3,\n    (q15_t)0xa2d3, (q15_t)0x57be, (q15_t)0xa2cf, (q15_t)0x57b9, (q15_t)0xa2cb,\n    (q15_t)0x57b5, (q15_t)0xa2c6, (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x57ac,\n    (q15_t)0xa2be, (q15_t)0x57a7, (q15_t)0xa2ba, (q15_t)0x57a3, (q15_t)0xa2b5,\n    (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x5799, (q15_t)0xa2ad, (q15_t)0x5795,\n    (q15_t)0xa2a8, (q15_t)0x5790, (q15_t)0xa2a4, (q15_t)0x578c, (q15_t)0xa2a0,\n    (q15_t)0x5787, (q15_t)0xa29b, (q15_t)0x5783, (q15_t)0xa297, (q15_t)0x577e,\n    (q15_t)0xa293, (q15_t)0x5779, (q15_t)0xa28f, (q15_t)0x5775, (q15_t)0xa28a,\n    (q15_t)0x5770, (q15_t)0xa286, (q15_t)0x576c, (q15_t)0xa282, (q15_t)0x5767,\n    (q15_t)0xa27d, (q15_t)0x5762, (q15_t)0xa279, (q15_t)0x575e, (q15_t)0xa275,\n    (q15_t)0x5759, (q15_t)0xa271, (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5750,\n    (q15_t)0xa268, (q15_t)0x574b, (q15_t)0xa264, (q15_t)0x5747, (q15_t)0xa25f,\n    (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x573e, (q15_t)0xa257, (q15_t)0x5739,\n    (q15_t)0xa253, (q15_t)0x5734, (q15_t)0xa24e, (q15_t)0x5730, (q15_t)0xa24a,\n    (q15_t)0x572b, (q15_t)0xa246, (q15_t)0x5727, (q15_t)0xa241, (q15_t)0x5722,\n    (q15_t)0xa23d, (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x5719, (q15_t)0xa235,\n    (q15_t)0x5714, (q15_t)0xa230, (q15_t)0x5710, (q15_t)0xa22c, (q15_t)0x570b,\n    (q15_t)0xa228, (q15_t)0x5706, (q15_t)0xa224, (q15_t)0x5702, (q15_t)0xa21f,\n    (q15_t)0x56fd, (q15_t)0xa21b, (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56f4,\n    (q15_t)0xa212, (q15_t)0x56ef, (q15_t)0xa20e, (q15_t)0x56eb, (q15_t)0xa20a,\n    (q15_t)0x56e6, (q15_t)0xa206, (q15_t)0x56e2, (q15_t)0xa201, (q15_t)0x56dd,\n    (q15_t)0xa1fd, (q15_t)0x56d8, (q15_t)0xa1f9, (q15_t)0x56d4, (q15_t)0xa1f5,\n    (q15_t)0x56cf, (q15_t)0xa1f0, (q15_t)0x56ca, (q15_t)0xa1ec, (q15_t)0x56c6,\n    (q15_t)0xa1e8, (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56bd, (q15_t)0xa1df,\n    (q15_t)0x56b8, (q15_t)0xa1db, (q15_t)0x56b3, (q15_t)0xa1d7, (q15_t)0x56af,\n    (q15_t)0xa1d3, (q15_t)0x56aa, (q15_t)0xa1ce, (q15_t)0x56a5, (q15_t)0xa1ca,\n    (q15_t)0x56a1, (q15_t)0xa1c6, (q15_t)0x569c, (q15_t)0xa1c1, (q15_t)0x5698,\n    (q15_t)0xa1bd, (q15_t)0x5693, (q15_t)0xa1b9, (q15_t)0x568e, (q15_t)0xa1b5,\n    (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5685, (q15_t)0xa1ac, (q15_t)0x5680,\n    (q15_t)0xa1a8, (q15_t)0x567c, (q15_t)0xa1a4, (q15_t)0x5677, (q15_t)0xa1a0,\n    (q15_t)0x5673, (q15_t)0xa19b, (q15_t)0x566e, (q15_t)0xa197, (q15_t)0x5669,\n    (q15_t)0xa193, (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5660, (q15_t)0xa18a,\n    (q15_t)0x565b, (q15_t)0xa186, (q15_t)0x5657, (q15_t)0xa182, (q15_t)0x5652,\n    (q15_t)0xa17e, (q15_t)0x564d, (q15_t)0xa179, (q15_t)0x5649, (q15_t)0xa175,\n    (q15_t)0x5644, (q15_t)0xa171, (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x563b,\n    (q15_t)0xa168, (q15_t)0x5636, (q15_t)0xa164, (q15_t)0x5632, (q15_t)0xa160,\n    (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x5628, (q15_t)0xa157, (q15_t)0x5624,\n    (q15_t)0xa153, (q15_t)0x561f, (q15_t)0xa14f, (q15_t)0x561a, (q15_t)0xa14b,\n    (q15_t)0x5616, (q15_t)0xa147, (q15_t)0x5611, (q15_t)0xa142, (q15_t)0x560c,\n    (q15_t)0xa13e, (q15_t)0x5608, (q15_t)0xa13a, (q15_t)0x5603, (q15_t)0xa136,\n    (q15_t)0x55fe, (q15_t)0xa131, (q15_t)0x55fa, (q15_t)0xa12d, (q15_t)0x55f5,\n    (q15_t)0xa129, (q15_t)0x55f0, (q15_t)0xa125, (q15_t)0x55ec, (q15_t)0xa121,\n    (q15_t)0x55e7, (q15_t)0xa11c, (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55de,\n    (q15_t)0xa114, (q15_t)0x55d9, (q15_t)0xa110, (q15_t)0x55d5, (q15_t)0xa10b,\n    (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55cb, (q15_t)0xa103, (q15_t)0x55c7,\n    (q15_t)0xa0ff, (q15_t)0x55c2, (q15_t)0xa0fb, (q15_t)0x55bd, (q15_t)0xa0f6,\n    (q15_t)0x55b9, (q15_t)0xa0f2, (q15_t)0x55b4, (q15_t)0xa0ee, (q15_t)0x55af,\n    (q15_t)0xa0ea, (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x55a6, (q15_t)0xa0e1,\n    (q15_t)0x55a1, (q15_t)0xa0dd, (q15_t)0x559d, (q15_t)0xa0d9, (q15_t)0x5598,\n    (q15_t)0xa0d5, (q15_t)0x5593, (q15_t)0xa0d1, (q15_t)0x558f, (q15_t)0xa0cc,\n    (q15_t)0x558a, (q15_t)0xa0c8, (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5581,\n    (q15_t)0xa0c0, (q15_t)0x557c, (q15_t)0xa0bc, (q15_t)0x5577, (q15_t)0xa0b7,\n    (q15_t)0x5572, (q15_t)0xa0b3, (q15_t)0x556e, (q15_t)0xa0af, (q15_t)0x5569,\n    (q15_t)0xa0ab, (q15_t)0x5564, (q15_t)0xa0a7, (q15_t)0x5560, (q15_t)0xa0a2,\n    (q15_t)0x555b, (q15_t)0xa09e, (q15_t)0x5556, (q15_t)0xa09a, (q15_t)0x5552,\n    (q15_t)0xa096, (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x5548, (q15_t)0xa08e,\n    (q15_t)0x5544, (q15_t)0xa089, (q15_t)0x553f, (q15_t)0xa085, (q15_t)0x553a,\n    (q15_t)0xa081, (q15_t)0x5536, (q15_t)0xa07d, (q15_t)0x5531, (q15_t)0xa079,\n    (q15_t)0x552c, (q15_t)0xa074, (q15_t)0x5528, (q15_t)0xa070, (q15_t)0x5523,\n    (q15_t)0xa06c, (q15_t)0x551e, (q15_t)0xa068, (q15_t)0x5519, (q15_t)0xa064,\n    (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5510, (q15_t)0xa05b, (q15_t)0x550b,\n    (q15_t)0xa057, (q15_t)0x5507, (q15_t)0xa053, (q15_t)0x5502, (q15_t)0xa04f,\n    (q15_t)0x54fd, (q15_t)0xa04b, (q15_t)0x54f9, (q15_t)0xa046, (q15_t)0x54f4,\n    (q15_t)0xa042, (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54ea, (q15_t)0xa03a,\n    (q15_t)0x54e6, (q15_t)0xa036, (q15_t)0x54e1, (q15_t)0xa032, (q15_t)0x54dc,\n    (q15_t)0xa02d, (q15_t)0x54d8, (q15_t)0xa029, (q15_t)0x54d3, (q15_t)0xa025,\n    (q15_t)0x54ce, (q15_t)0xa021, (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54c5,\n    (q15_t)0xa019, (q15_t)0x54c0, (q15_t)0xa014, (q15_t)0x54bb, (q15_t)0xa010,\n    (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54b2, (q15_t)0xa008, (q15_t)0x54ad,\n    (q15_t)0xa004, (q15_t)0x54a9, (q15_t)0xa000, (q15_t)0x54a4, (q15_t)0x9ffc,\n    (q15_t)0x549f, (q15_t)0x9ff7, (q15_t)0x549a, (q15_t)0x9ff3, (q15_t)0x5496,\n    (q15_t)0x9fef, (q15_t)0x5491, (q15_t)0x9feb, (q15_t)0x548c, (q15_t)0x9fe7,\n    (q15_t)0x5488, (q15_t)0x9fe3, (q15_t)0x5483, (q15_t)0x9fde, (q15_t)0x547e,\n    (q15_t)0x9fda, (q15_t)0x5479, (q15_t)0x9fd6, (q15_t)0x5475, (q15_t)0x9fd2,\n    (q15_t)0x5470, (q15_t)0x9fce, (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5467,\n    (q15_t)0x9fc6, (q15_t)0x5462, (q15_t)0x9fc1, (q15_t)0x545d, (q15_t)0x9fbd,\n    (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5454, (q15_t)0x9fb5, (q15_t)0x544f,\n    (q15_t)0x9fb1, (q15_t)0x544a, (q15_t)0x9fad, (q15_t)0x5445, (q15_t)0x9fa9,\n    (q15_t)0x5441, (q15_t)0x9fa4, (q15_t)0x543c, (q15_t)0x9fa0, (q15_t)0x5437,\n    (q15_t)0x9f9c, (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x542e, (q15_t)0x9f94,\n    (q15_t)0x5429, (q15_t)0x9f90, (q15_t)0x5424, (q15_t)0x9f8c, (q15_t)0x5420,\n    (q15_t)0x9f88, (q15_t)0x541b, (q15_t)0x9f83, (q15_t)0x5416, (q15_t)0x9f7f,\n    (q15_t)0x5411, (q15_t)0x9f7b, (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x5408,\n    (q15_t)0x9f73, (q15_t)0x5403, (q15_t)0x9f6f, (q15_t)0x53fe, (q15_t)0x9f6b,\n    (q15_t)0x53fa, (q15_t)0x9f67, (q15_t)0x53f5, (q15_t)0x9f62, (q15_t)0x53f0,\n    (q15_t)0x9f5e, (q15_t)0x53eb, (q15_t)0x9f5a, (q15_t)0x53e7, (q15_t)0x9f56,\n    (q15_t)0x53e2, (q15_t)0x9f52, (q15_t)0x53dd, (q15_t)0x9f4e, (q15_t)0x53d8,\n    (q15_t)0x9f4a, (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53cf, (q15_t)0x9f41,\n    (q15_t)0x53ca, (q15_t)0x9f3d, (q15_t)0x53c5, (q15_t)0x9f39, (q15_t)0x53c1,\n    (q15_t)0x9f35, (q15_t)0x53bc, (q15_t)0x9f31, (q15_t)0x53b7, (q15_t)0x9f2d,\n    (q15_t)0x53b2, (q15_t)0x9f29, (q15_t)0x53ae, (q15_t)0x9f25, (q15_t)0x53a9,\n    (q15_t)0x9f21, (q15_t)0x53a4, (q15_t)0x9f1c, (q15_t)0x539f, (q15_t)0x9f18,\n    (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5396, (q15_t)0x9f10, (q15_t)0x5391,\n    (q15_t)0x9f0c, (q15_t)0x538c, (q15_t)0x9f08, (q15_t)0x5388, (q15_t)0x9f04,\n    (q15_t)0x5383, (q15_t)0x9f00, (q15_t)0x537e, (q15_t)0x9efc, (q15_t)0x5379,\n    (q15_t)0x9ef8, (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5370, (q15_t)0x9eef,\n    (q15_t)0x536b, (q15_t)0x9eeb, (q15_t)0x5366, (q15_t)0x9ee7, (q15_t)0x5362,\n    (q15_t)0x9ee3, (q15_t)0x535d, (q15_t)0x9edf, (q15_t)0x5358, (q15_t)0x9edb,\n    (q15_t)0x5353, (q15_t)0x9ed7, (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x534a,\n    (q15_t)0x9ecf, (q15_t)0x5345, (q15_t)0x9ecb, (q15_t)0x5340, (q15_t)0x9ec6,\n    (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5337, (q15_t)0x9ebe, (q15_t)0x5332,\n    (q15_t)0x9eba, (q15_t)0x532d, (q15_t)0x9eb6, (q15_t)0x5328, (q15_t)0x9eb2,\n    (q15_t)0x5323, (q15_t)0x9eae, (q15_t)0x531f, (q15_t)0x9eaa, (q15_t)0x531a,\n    (q15_t)0x9ea6, (q15_t)0x5315, (q15_t)0x9ea2, (q15_t)0x5310, (q15_t)0x9e9e,\n    (q15_t)0x530c, (q15_t)0x9e9a, (q15_t)0x5307, (q15_t)0x9e95, (q15_t)0x5302,\n    (q15_t)0x9e91, (q15_t)0x52fd, (q15_t)0x9e8d, (q15_t)0x52f8, (q15_t)0x9e89,\n    (q15_t)0x52f4, (q15_t)0x9e85, (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52ea,\n    (q15_t)0x9e7d, (q15_t)0x52e5, (q15_t)0x9e79, (q15_t)0x52e1, (q15_t)0x9e75,\n    (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52d7, (q15_t)0x9e6d, (q15_t)0x52d2,\n    (q15_t)0x9e69, (q15_t)0x52cd, (q15_t)0x9e65, (q15_t)0x52c9, (q15_t)0x9e61,\n    (q15_t)0x52c4, (q15_t)0x9e5d, (q15_t)0x52bf, (q15_t)0x9e58, (q15_t)0x52ba,\n    (q15_t)0x9e54, (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52b1, (q15_t)0x9e4c,\n    (q15_t)0x52ac, (q15_t)0x9e48, (q15_t)0x52a7, (q15_t)0x9e44, (q15_t)0x52a2,\n    (q15_t)0x9e40, (q15_t)0x529d, (q15_t)0x9e3c, (q15_t)0x5299, (q15_t)0x9e38,\n    (q15_t)0x5294, (q15_t)0x9e34, (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x528a,\n    (q15_t)0x9e2c, (q15_t)0x5285, (q15_t)0x9e28, (q15_t)0x5281, (q15_t)0x9e24,\n    (q15_t)0x527c, (q15_t)0x9e20, (q15_t)0x5277, (q15_t)0x9e1c, (q15_t)0x5272,\n    (q15_t)0x9e18, (q15_t)0x526d, (q15_t)0x9e14, (q15_t)0x5269, (q15_t)0x9e0f,\n    (q15_t)0x5264, (q15_t)0x9e0b, (q15_t)0x525f, (q15_t)0x9e07, (q15_t)0x525a,\n    (q15_t)0x9e03, (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5251, (q15_t)0x9dfb,\n    (q15_t)0x524c, (q15_t)0x9df7, (q15_t)0x5247, (q15_t)0x9df3, (q15_t)0x5242,\n    (q15_t)0x9def, (q15_t)0x523d, (q15_t)0x9deb, (q15_t)0x5238, (q15_t)0x9de7,\n    (q15_t)0x5234, (q15_t)0x9de3, (q15_t)0x522f, (q15_t)0x9ddf, (q15_t)0x522a,\n    (q15_t)0x9ddb, (q15_t)0x5225, (q15_t)0x9dd7, (q15_t)0x5220, (q15_t)0x9dd3,\n    (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5217, (q15_t)0x9dcb, (q15_t)0x5212,\n    (q15_t)0x9dc7, (q15_t)0x520d, (q15_t)0x9dc3, (q15_t)0x5208, (q15_t)0x9dbf,\n    (q15_t)0x5203, (q15_t)0x9dbb, (q15_t)0x51ff, (q15_t)0x9db7, (q15_t)0x51fa,\n    (q15_t)0x9db3, (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51f0, (q15_t)0x9dab,\n    (q15_t)0x51eb, (q15_t)0x9da7, (q15_t)0x51e6, (q15_t)0x9da3, (q15_t)0x51e2,\n    (q15_t)0x9d9f, (q15_t)0x51dd, (q15_t)0x9d9b, (q15_t)0x51d8, (q15_t)0x9d97,\n    (q15_t)0x51d3, (q15_t)0x9d93, (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51c9,\n    (q15_t)0x9d8b, (q15_t)0x51c5, (q15_t)0x9d86, (q15_t)0x51c0, (q15_t)0x9d82,\n    (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51b6, (q15_t)0x9d7a, (q15_t)0x51b1,\n    (q15_t)0x9d76, (q15_t)0x51ac, (q15_t)0x9d72, (q15_t)0x51a8, (q15_t)0x9d6e,\n    (q15_t)0x51a3, (q15_t)0x9d6a, (q15_t)0x519e, (q15_t)0x9d66, (q15_t)0x5199,\n    (q15_t)0x9d62, (q15_t)0x5194, (q15_t)0x9d5e, (q15_t)0x518f, (q15_t)0x9d5a,\n    (q15_t)0x518b, (q15_t)0x9d56, (q15_t)0x5186, (q15_t)0x9d52, (q15_t)0x5181,\n    (q15_t)0x9d4e, (q15_t)0x517c, (q15_t)0x9d4a, (q15_t)0x5177, (q15_t)0x9d46,\n    (q15_t)0x5172, (q15_t)0x9d42, (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x5169,\n    (q15_t)0x9d3a, (q15_t)0x5164, (q15_t)0x9d36, (q15_t)0x515f, (q15_t)0x9d32,\n    (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5155, (q15_t)0x9d2a, (q15_t)0x5150,\n    (q15_t)0x9d26, (q15_t)0x514c, (q15_t)0x9d22, (q15_t)0x5147, (q15_t)0x9d1e,\n    (q15_t)0x5142, (q15_t)0x9d1a, (q15_t)0x513d, (q15_t)0x9d16, (q15_t)0x5138,\n    (q15_t)0x9d12, (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x512e, (q15_t)0x9d0b,\n    (q15_t)0x512a, (q15_t)0x9d07, (q15_t)0x5125, (q15_t)0x9d03, (q15_t)0x5120,\n    (q15_t)0x9cff, (q15_t)0x511b, (q15_t)0x9cfb, (q15_t)0x5116, (q15_t)0x9cf7,\n    (q15_t)0x5111, (q15_t)0x9cf3, (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x5108,\n    (q15_t)0x9ceb, (q15_t)0x5103, (q15_t)0x9ce7, (q15_t)0x50fe, (q15_t)0x9ce3,\n    (q15_t)0x50f9, (q15_t)0x9cdf, (q15_t)0x50f4, (q15_t)0x9cdb, (q15_t)0x50ef,\n    (q15_t)0x9cd7, (q15_t)0x50ea, (q15_t)0x9cd3, (q15_t)0x50e5, (q15_t)0x9ccf,\n    (q15_t)0x50e1, (q15_t)0x9ccb, (q15_t)0x50dc, (q15_t)0x9cc7, (q15_t)0x50d7,\n    (q15_t)0x9cc3, (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50cd, (q15_t)0x9cbb,\n    (q15_t)0x50c8, (q15_t)0x9cb7, (q15_t)0x50c3, (q15_t)0x9cb3, (q15_t)0x50bf,\n    (q15_t)0x9caf, (q15_t)0x50ba, (q15_t)0x9cab, (q15_t)0x50b5, (q15_t)0x9ca7,\n    (q15_t)0x50b0, (q15_t)0x9ca3, (q15_t)0x50ab, (q15_t)0x9c9f, (q15_t)0x50a6,\n    (q15_t)0x9c9b, (q15_t)0x50a1, (q15_t)0x9c97, (q15_t)0x509c, (q15_t)0x9c93,\n    (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5093, (q15_t)0x9c8b, (q15_t)0x508e,\n    (q15_t)0x9c88, (q15_t)0x5089, (q15_t)0x9c84, (q15_t)0x5084, (q15_t)0x9c80,\n    (q15_t)0x507f, (q15_t)0x9c7c, (q15_t)0x507a, (q15_t)0x9c78, (q15_t)0x5075,\n    (q15_t)0x9c74, (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x506c, (q15_t)0x9c6c,\n    (q15_t)0x5067, (q15_t)0x9c68, (q15_t)0x5062, (q15_t)0x9c64, (q15_t)0x505d,\n    (q15_t)0x9c60, (q15_t)0x5058, (q15_t)0x9c5c, (q15_t)0x5053, (q15_t)0x9c58,\n    (q15_t)0x504e, (q15_t)0x9c54, (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5044,\n    (q15_t)0x9c4c, (q15_t)0x503f, (q15_t)0x9c48, (q15_t)0x503b, (q15_t)0x9c44,\n    (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5031, (q15_t)0x9c3d, (q15_t)0x502c,\n    (q15_t)0x9c39, (q15_t)0x5027, (q15_t)0x9c35, (q15_t)0x5022, (q15_t)0x9c31,\n    (q15_t)0x501d, (q15_t)0x9c2d, (q15_t)0x5018, (q15_t)0x9c29, (q15_t)0x5013,\n    (q15_t)0x9c25, (q15_t)0x500f, (q15_t)0x9c21, (q15_t)0x500a, (q15_t)0x9c1d,\n    (q15_t)0x5005, (q15_t)0x9c19, (q15_t)0x5000, (q15_t)0x9c15, (q15_t)0x4ffb,\n    (q15_t)0x9c11, (q15_t)0x4ff6, (q15_t)0x9c0d, (q15_t)0x4ff1, (q15_t)0x9c09,\n    (q15_t)0x4fec, (q15_t)0x9c06, (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fe2,\n    (q15_t)0x9bfe, (q15_t)0x4fdd, (q15_t)0x9bfa, (q15_t)0x4fd9, (q15_t)0x9bf6,\n    (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fcf, (q15_t)0x9bee, (q15_t)0x4fca,\n    (q15_t)0x9bea, (q15_t)0x4fc5, (q15_t)0x9be6, (q15_t)0x4fc0, (q15_t)0x9be2,\n    (q15_t)0x4fbb, (q15_t)0x9bde, (q15_t)0x4fb6, (q15_t)0x9bda, (q15_t)0x4fb1,\n    (q15_t)0x9bd7, (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4fa7, (q15_t)0x9bcf,\n    (q15_t)0x4fa2, (q15_t)0x9bcb, (q15_t)0x4f9e, (q15_t)0x9bc7, (q15_t)0x4f99,\n    (q15_t)0x9bc3, (q15_t)0x4f94, (q15_t)0x9bbf, (q15_t)0x4f8f, (q15_t)0x9bbb,\n    (q15_t)0x4f8a, (q15_t)0x9bb7, (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f80,\n    (q15_t)0x9baf, (q15_t)0x4f7b, (q15_t)0x9bac, (q15_t)0x4f76, (q15_t)0x9ba8,\n    (q15_t)0x4f71, (q15_t)0x9ba4, (q15_t)0x4f6c, (q15_t)0x9ba0, (q15_t)0x4f67,\n    (q15_t)0x9b9c, (q15_t)0x4f62, (q15_t)0x9b98, (q15_t)0x4f5e, (q15_t)0x9b94,\n    (q15_t)0x4f59, (q15_t)0x9b90, (q15_t)0x4f54, (q15_t)0x9b8c, (q15_t)0x4f4f,\n    (q15_t)0x9b88, (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f45, (q15_t)0x9b81,\n    (q15_t)0x4f40, (q15_t)0x9b7d, (q15_t)0x4f3b, (q15_t)0x9b79, (q15_t)0x4f36,\n    (q15_t)0x9b75, (q15_t)0x4f31, (q15_t)0x9b71, (q15_t)0x4f2c, (q15_t)0x9b6d,\n    (q15_t)0x4f27, (q15_t)0x9b69, (q15_t)0x4f22, (q15_t)0x9b65, (q15_t)0x4f1d,\n    (q15_t)0x9b62, (q15_t)0x4f18, (q15_t)0x9b5e, (q15_t)0x4f14, (q15_t)0x9b5a,\n    (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4f0a, (q15_t)0x9b52, (q15_t)0x4f05,\n    (q15_t)0x9b4e, (q15_t)0x4f00, (q15_t)0x9b4a, (q15_t)0x4efb, (q15_t)0x9b46,\n    (q15_t)0x4ef6, (q15_t)0x9b43, (q15_t)0x4ef1, (q15_t)0x9b3f, (q15_t)0x4eec,\n    (q15_t)0x9b3b, (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ee2, (q15_t)0x9b33,\n    (q15_t)0x4edd, (q15_t)0x9b2f, (q15_t)0x4ed8, (q15_t)0x9b2b, (q15_t)0x4ed3,\n    (q15_t)0x9b27, (q15_t)0x4ece, (q15_t)0x9b24, (q15_t)0x4ec9, (q15_t)0x9b20,\n    (q15_t)0x4ec4, (q15_t)0x9b1c, (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eba,\n    (q15_t)0x9b14, (q15_t)0x4eb6, (q15_t)0x9b10, (q15_t)0x4eb1, (q15_t)0x9b0c,\n    (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4ea7, (q15_t)0x9b05, (q15_t)0x4ea2,\n    (q15_t)0x9b01, (q15_t)0x4e9d, (q15_t)0x9afd, (q15_t)0x4e98, (q15_t)0x9af9,\n    (q15_t)0x4e93, (q15_t)0x9af5, (q15_t)0x4e8e, (q15_t)0x9af1, (q15_t)0x4e89,\n    (q15_t)0x9aed, (q15_t)0x4e84, (q15_t)0x9aea, (q15_t)0x4e7f, (q15_t)0x9ae6,\n    (q15_t)0x4e7a, (q15_t)0x9ae2, (q15_t)0x4e75, (q15_t)0x9ade, (q15_t)0x4e70,\n    (q15_t)0x9ada, (q15_t)0x4e6b, (q15_t)0x9ad6, (q15_t)0x4e66, (q15_t)0x9ad3,\n    (q15_t)0x4e61, (q15_t)0x9acf, (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e57,\n    (q15_t)0x9ac7, (q15_t)0x4e52, (q15_t)0x9ac3, (q15_t)0x4e4d, (q15_t)0x9abf,\n    (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e43, (q15_t)0x9ab8, (q15_t)0x4e3e,\n    (q15_t)0x9ab4, (q15_t)0x4e39, (q15_t)0x9ab0, (q15_t)0x4e34, (q15_t)0x9aac,\n    (q15_t)0x4e2f, (q15_t)0x9aa8, (q15_t)0x4e2a, (q15_t)0x9aa4, (q15_t)0x4e26,\n    (q15_t)0x9aa1, (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e1c, (q15_t)0x9a99,\n    (q15_t)0x4e17, (q15_t)0x9a95, (q15_t)0x4e12, (q15_t)0x9a91, (q15_t)0x4e0d,\n    (q15_t)0x9a8d, (q15_t)0x4e08, (q15_t)0x9a8a, (q15_t)0x4e03, (q15_t)0x9a86,\n    (q15_t)0x4dfe, (q15_t)0x9a82, (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4df4,\n    (q15_t)0x9a7a, (q15_t)0x4def, (q15_t)0x9a76, (q15_t)0x4dea, (q15_t)0x9a73,\n    (q15_t)0x4de5, (q15_t)0x9a6f, (q15_t)0x4de0, (q15_t)0x9a6b, (q15_t)0x4ddb,\n    (q15_t)0x9a67, (q15_t)0x4dd6, (q15_t)0x9a63, (q15_t)0x4dd1, (q15_t)0x9a60,\n    (q15_t)0x4dcc, (q15_t)0x9a5c, (q15_t)0x4dc7, (q15_t)0x9a58, (q15_t)0x4dc2,\n    (q15_t)0x9a54, (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4db8, (q15_t)0x9a4c,\n    (q15_t)0x4db3, (q15_t)0x9a49, (q15_t)0x4dae, (q15_t)0x9a45, (q15_t)0x4da9,\n    (q15_t)0x9a41, (q15_t)0x4da4, (q15_t)0x9a3d, (q15_t)0x4d9f, (q15_t)0x9a39,\n    (q15_t)0x4d9a, (q15_t)0x9a36, (q15_t)0x4d95, (q15_t)0x9a32, (q15_t)0x4d90,\n    (q15_t)0x9a2e, (q15_t)0x4d8b, (q15_t)0x9a2a, (q15_t)0x4d86, (q15_t)0x9a26,\n    (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d7c, (q15_t)0x9a1f, (q15_t)0x4d77,\n    (q15_t)0x9a1b, (q15_t)0x4d72, (q15_t)0x9a17, (q15_t)0x4d6d, (q15_t)0x9a13,\n    (q15_t)0x4d68, (q15_t)0x9a10, (q15_t)0x4d63, (q15_t)0x9a0c, (q15_t)0x4d5e,\n    (q15_t)0x9a08, (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d54, (q15_t)0x9a00,\n    (q15_t)0x4d4f, (q15_t)0x99fd, (q15_t)0x4d4a, (q15_t)0x99f9, (q15_t)0x4d45,\n    (q15_t)0x99f5, (q15_t)0x4d40, (q15_t)0x99f1, (q15_t)0x4d3b, (q15_t)0x99ed,\n    (q15_t)0x4d36, (q15_t)0x99ea, (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d2c,\n    (q15_t)0x99e2, (q15_t)0x4d27, (q15_t)0x99de, (q15_t)0x4d22, (q15_t)0x99da,\n    (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d18, (q15_t)0x99d3, (q15_t)0x4d13,\n    (q15_t)0x99cf, (q15_t)0x4d0e, (q15_t)0x99cb, (q15_t)0x4d09, (q15_t)0x99c7,\n    (q15_t)0x4d04, (q15_t)0x99c4, (q15_t)0x4cff, (q15_t)0x99c0, (q15_t)0x4cfa,\n    (q15_t)0x99bc, (q15_t)0x4cf5, (q15_t)0x99b8, (q15_t)0x4cf0, (q15_t)0x99b5,\n    (q15_t)0x4ceb, (q15_t)0x99b1, (q15_t)0x4ce6, (q15_t)0x99ad, (q15_t)0x4ce1,\n    (q15_t)0x99a9, (q15_t)0x4cdb, (q15_t)0x99a5, (q15_t)0x4cd6, (q15_t)0x99a2,\n    (q15_t)0x4cd1, (q15_t)0x999e, (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cc7,\n    (q15_t)0x9996, (q15_t)0x4cc2, (q15_t)0x9993, (q15_t)0x4cbd, (q15_t)0x998f,\n    (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4cb3, (q15_t)0x9987, (q15_t)0x4cae,\n    (q15_t)0x9984, (q15_t)0x4ca9, (q15_t)0x9980, (q15_t)0x4ca4, (q15_t)0x997c,\n    (q15_t)0x4c9f, (q15_t)0x9978, (q15_t)0x4c9a, (q15_t)0x9975, (q15_t)0x4c95,\n    (q15_t)0x9971, (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c8b, (q15_t)0x9969,\n    (q15_t)0x4c86, (q15_t)0x9965, (q15_t)0x4c81, (q15_t)0x9962, (q15_t)0x4c7c,\n    (q15_t)0x995e, (q15_t)0x4c77, (q15_t)0x995a, (q15_t)0x4c72, (q15_t)0x9956,\n    (q15_t)0x4c6d, (q15_t)0x9953, (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c63,\n    (q15_t)0x994b, (q15_t)0x4c5e, (q15_t)0x9947, (q15_t)0x4c59, (q15_t)0x9944,\n    (q15_t)0x4c54, (q15_t)0x9940, (q15_t)0x4c4f, (q15_t)0x993c, (q15_t)0x4c49,\n    (q15_t)0x9938, (q15_t)0x4c44, (q15_t)0x9935, (q15_t)0x4c3f, (q15_t)0x9931,\n    (q15_t)0x4c3a, (q15_t)0x992d, (q15_t)0x4c35, (q15_t)0x992a, (q15_t)0x4c30,\n    (q15_t)0x9926, (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c26, (q15_t)0x991e,\n    (q15_t)0x4c21, (q15_t)0x991b, (q15_t)0x4c1c, (q15_t)0x9917, (q15_t)0x4c17,\n    (q15_t)0x9913, (q15_t)0x4c12, (q15_t)0x990f, (q15_t)0x4c0d, (q15_t)0x990c,\n    (q15_t)0x4c08, (q15_t)0x9908, (q15_t)0x4c03, (q15_t)0x9904, (q15_t)0x4bfe,\n    (q15_t)0x9900, (q15_t)0x4bf9, (q15_t)0x98fd, (q15_t)0x4bf4, (q15_t)0x98f9,\n    (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4be9, (q15_t)0x98f2, (q15_t)0x4be4,\n    (q15_t)0x98ee, (q15_t)0x4bdf, (q15_t)0x98ea, (q15_t)0x4bda, (q15_t)0x98e6,\n    (q15_t)0x4bd5, (q15_t)0x98e3, (q15_t)0x4bd0, (q15_t)0x98df, (q15_t)0x4bcb,\n    (q15_t)0x98db, (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bc1, (q15_t)0x98d4,\n    (q15_t)0x4bbc, (q15_t)0x98d0, (q15_t)0x4bb7, (q15_t)0x98cc, (q15_t)0x4bb2,\n    (q15_t)0x98c9, (q15_t)0x4bad, (q15_t)0x98c5, (q15_t)0x4ba8, (q15_t)0x98c1,\n    (q15_t)0x4ba3, (q15_t)0x98bd, (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b98,\n    (q15_t)0x98b6, (q15_t)0x4b93, (q15_t)0x98b2, (q15_t)0x4b8e, (q15_t)0x98af,\n    (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b84, (q15_t)0x98a7, (q15_t)0x4b7f,\n    (q15_t)0x98a3, (q15_t)0x4b7a, (q15_t)0x98a0, (q15_t)0x4b75, (q15_t)0x989c,\n    (q15_t)0x4b70, (q15_t)0x9898, (q15_t)0x4b6b, (q15_t)0x9895, (q15_t)0x4b66,\n    (q15_t)0x9891, (q15_t)0x4b61, (q15_t)0x988d, (q15_t)0x4b5c, (q15_t)0x988a,\n    (q15_t)0x4b56, (q15_t)0x9886, (q15_t)0x4b51, (q15_t)0x9882, (q15_t)0x4b4c,\n    (q15_t)0x987e, (q15_t)0x4b47, (q15_t)0x987b, (q15_t)0x4b42, (q15_t)0x9877,\n    (q15_t)0x4b3d, (q15_t)0x9873, (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b33,\n    (q15_t)0x986c, (q15_t)0x4b2e, (q15_t)0x9868, (q15_t)0x4b29, (q15_t)0x9865,\n    (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b1f, (q15_t)0x985d, (q15_t)0x4b19,\n    (q15_t)0x985a, (q15_t)0x4b14, (q15_t)0x9856, (q15_t)0x4b0f, (q15_t)0x9852,\n    (q15_t)0x4b0a, (q15_t)0x984e, (q15_t)0x4b05, (q15_t)0x984b, (q15_t)0x4b00,\n    (q15_t)0x9847, (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4af6, (q15_t)0x9840,\n    (q15_t)0x4af1, (q15_t)0x983c, (q15_t)0x4aec, (q15_t)0x9838, (q15_t)0x4ae7,\n    (q15_t)0x9835, (q15_t)0x4ae1, (q15_t)0x9831, (q15_t)0x4adc, (q15_t)0x982d,\n    (q15_t)0x4ad7, (q15_t)0x982a, (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4acd,\n    (q15_t)0x9822, (q15_t)0x4ac8, (q15_t)0x981f, (q15_t)0x4ac3, (q15_t)0x981b,\n    (q15_t)0x4abe, (q15_t)0x9817, (q15_t)0x4ab9, (q15_t)0x9814, (q15_t)0x4ab4,\n    (q15_t)0x9810, (q15_t)0x4aae, (q15_t)0x980c, (q15_t)0x4aa9, (q15_t)0x9809,\n    (q15_t)0x4aa4, (q15_t)0x9805, (q15_t)0x4a9f, (q15_t)0x9801, (q15_t)0x4a9a,\n    (q15_t)0x97fe, (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a90, (q15_t)0x97f6,\n    (q15_t)0x4a8b, (q15_t)0x97f3, (q15_t)0x4a86, (q15_t)0x97ef, (q15_t)0x4a81,\n    (q15_t)0x97eb, (q15_t)0x4a7b, (q15_t)0x97e8, (q15_t)0x4a76, (q15_t)0x97e4,\n    (q15_t)0x4a71, (q15_t)0x97e0, (q15_t)0x4a6c, (q15_t)0x97dd, (q15_t)0x4a67,\n    (q15_t)0x97d9, (q15_t)0x4a62, (q15_t)0x97d5, (q15_t)0x4a5d, (q15_t)0x97d2,\n    (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a52, (q15_t)0x97cb, (q15_t)0x4a4d,\n    (q15_t)0x97c7, (q15_t)0x4a48, (q15_t)0x97c3, (q15_t)0x4a43, (q15_t)0x97c0,\n    (q15_t)0x4a3e, (q15_t)0x97bc, (q15_t)0x4a39, (q15_t)0x97b8, (q15_t)0x4a34,\n    (q15_t)0x97b5, (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a2a, (q15_t)0x97ad,\n    (q15_t)0x4a24, (q15_t)0x97aa, (q15_t)0x4a1f, (q15_t)0x97a6, (q15_t)0x4a1a,\n    (q15_t)0x97a2, (q15_t)0x4a15, (q15_t)0x979f, (q15_t)0x4a10, (q15_t)0x979b,\n    (q15_t)0x4a0b, (q15_t)0x9798, (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x4a01,\n    (q15_t)0x9790, (q15_t)0x49fb, (q15_t)0x978d, (q15_t)0x49f6, (q15_t)0x9789,\n    (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49ec, (q15_t)0x9782, (q15_t)0x49e7,\n    (q15_t)0x977e, (q15_t)0x49e2, (q15_t)0x977a, (q15_t)0x49dd, (q15_t)0x9777,\n    (q15_t)0x49d8, (q15_t)0x9773, (q15_t)0x49d2, (q15_t)0x9770, (q15_t)0x49cd,\n    (q15_t)0x976c, (q15_t)0x49c8, (q15_t)0x9768, (q15_t)0x49c3, (q15_t)0x9765,\n    (q15_t)0x49be, (q15_t)0x9761, (q15_t)0x49b9, (q15_t)0x975d, (q15_t)0x49b4,\n    (q15_t)0x975a, (q15_t)0x49ae, (q15_t)0x9756, (q15_t)0x49a9, (q15_t)0x9753,\n    (q15_t)0x49a4, (q15_t)0x974f, (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x499a,\n    (q15_t)0x9748, (q15_t)0x4995, (q15_t)0x9744, (q15_t)0x4990, (q15_t)0x9741,\n    (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4985, (q15_t)0x9739, (q15_t)0x4980,\n    (q15_t)0x9736, (q15_t)0x497b, (q15_t)0x9732, (q15_t)0x4976, (q15_t)0x972f,\n    (q15_t)0x4971, (q15_t)0x972b, (q15_t)0x496c, (q15_t)0x9727, (q15_t)0x4966,\n    (q15_t)0x9724, (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x495c, (q15_t)0x971d,\n    (q15_t)0x4957, (q15_t)0x9719, (q15_t)0x4952, (q15_t)0x9715, (q15_t)0x494d,\n    (q15_t)0x9712, (q15_t)0x4948, (q15_t)0x970e, (q15_t)0x4942, (q15_t)0x970b,\n    (q15_t)0x493d, (q15_t)0x9707, (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4933,\n    (q15_t)0x9700, (q15_t)0x492e, (q15_t)0x96fc, (q15_t)0x4929, (q15_t)0x96f9,\n    (q15_t)0x4923, (q15_t)0x96f5, (q15_t)0x491e, (q15_t)0x96f1, (q15_t)0x4919,\n    (q15_t)0x96ee, (q15_t)0x4914, (q15_t)0x96ea, (q15_t)0x490f, (q15_t)0x96e7,\n    (q15_t)0x490a, (q15_t)0x96e3, (q15_t)0x4905, (q15_t)0x96df, (q15_t)0x48ff,\n    (q15_t)0x96dc, (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48f5, (q15_t)0x96d5,\n    (q15_t)0x48f0, (q15_t)0x96d1, (q15_t)0x48eb, (q15_t)0x96ce, (q15_t)0x48e6,\n    (q15_t)0x96ca, (q15_t)0x48e0, (q15_t)0x96c6, (q15_t)0x48db, (q15_t)0x96c3,\n    (q15_t)0x48d6, (q15_t)0x96bf, (q15_t)0x48d1, (q15_t)0x96bc, (q15_t)0x48cc,\n    (q15_t)0x96b8, (q15_t)0x48c7, (q15_t)0x96b5, (q15_t)0x48c1, (q15_t)0x96b1,\n    (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48b7, (q15_t)0x96aa, (q15_t)0x48b2,\n    (q15_t)0x96a6, (q15_t)0x48ad, (q15_t)0x96a3, (q15_t)0x48a8, (q15_t)0x969f,\n    (q15_t)0x48a2, (q15_t)0x969c, (q15_t)0x489d, (q15_t)0x9698, (q15_t)0x4898,\n    (q15_t)0x9694, (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x488e, (q15_t)0x968d,\n    (q15_t)0x4888, (q15_t)0x968a, (q15_t)0x4883, (q15_t)0x9686, (q15_t)0x487e,\n    (q15_t)0x9683, (q15_t)0x4879, (q15_t)0x967f, (q15_t)0x4874, (q15_t)0x967b,\n    (q15_t)0x486f, (q15_t)0x9678, (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4864,\n    (q15_t)0x9671, (q15_t)0x485f, (q15_t)0x966d, (q15_t)0x485a, (q15_t)0x966a,\n    (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x484f, (q15_t)0x9663, (q15_t)0x484a,\n    (q15_t)0x965f, (q15_t)0x4845, (q15_t)0x965b, (q15_t)0x4840, (q15_t)0x9658,\n    (q15_t)0x483b, (q15_t)0x9654, (q15_t)0x4836, (q15_t)0x9651, (q15_t)0x4830,\n    (q15_t)0x964d, (q15_t)0x482b, (q15_t)0x964a, (q15_t)0x4826, (q15_t)0x9646,\n    (q15_t)0x4821, (q15_t)0x9643, (q15_t)0x481c, (q15_t)0x963f, (q15_t)0x4816,\n    (q15_t)0x963c, (q15_t)0x4811, (q15_t)0x9638, (q15_t)0x480c, (q15_t)0x9635,\n    (q15_t)0x4807, (q15_t)0x9631, (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47fc,\n    (q15_t)0x962a, (q15_t)0x47f7, (q15_t)0x9626, (q15_t)0x47f2, (q15_t)0x9623,\n    (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47e8, (q15_t)0x961c, (q15_t)0x47e2,\n    (q15_t)0x9618, (q15_t)0x47dd, (q15_t)0x9615, (q15_t)0x47d8, (q15_t)0x9611,\n    (q15_t)0x47d3, (q15_t)0x960e, (q15_t)0x47ce, (q15_t)0x960a, (q15_t)0x47c8,\n    (q15_t)0x9607, (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47be, (q15_t)0x9600,\n    (q15_t)0x47b9, (q15_t)0x95fc, (q15_t)0x47b4, (q15_t)0x95f9, (q15_t)0x47ae,\n    (q15_t)0x95f5, (q15_t)0x47a9, (q15_t)0x95f2, (q15_t)0x47a4, (q15_t)0x95ee,\n    (q15_t)0x479f, (q15_t)0x95ea, (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4794,\n    (q15_t)0x95e3, (q15_t)0x478f, (q15_t)0x95e0, (q15_t)0x478a, (q15_t)0x95dc,\n    (q15_t)0x4785, (q15_t)0x95d9, (q15_t)0x4780, (q15_t)0x95d5, (q15_t)0x477a,\n    (q15_t)0x95d2, (q15_t)0x4775, (q15_t)0x95ce, (q15_t)0x4770, (q15_t)0x95cb,\n    (q15_t)0x476b, (q15_t)0x95c7, (q15_t)0x4765, (q15_t)0x95c4, (q15_t)0x4760,\n    (q15_t)0x95c0, (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4756, (q15_t)0x95b9,\n    (q15_t)0x4751, (q15_t)0x95b6, (q15_t)0x474b, (q15_t)0x95b2, (q15_t)0x4746,\n    (q15_t)0x95af, (q15_t)0x4741, (q15_t)0x95ab, (q15_t)0x473c, (q15_t)0x95a8,\n    (q15_t)0x4737, (q15_t)0x95a4, (q15_t)0x4731, (q15_t)0x95a1, (q15_t)0x472c,\n    (q15_t)0x959d, (q15_t)0x4727, (q15_t)0x959a, (q15_t)0x4722, (q15_t)0x9596,\n    (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4717, (q15_t)0x958f, (q15_t)0x4712,\n    (q15_t)0x958c, (q15_t)0x470d, (q15_t)0x9588, (q15_t)0x4708, (q15_t)0x9585,\n    (q15_t)0x4702, (q15_t)0x9581, (q15_t)0x46fd, (q15_t)0x957e, (q15_t)0x46f8,\n    (q15_t)0x957a, (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46ed, (q15_t)0x9574,\n    (q15_t)0x46e8, (q15_t)0x9570, (q15_t)0x46e3, (q15_t)0x956d, (q15_t)0x46de,\n    (q15_t)0x9569, (q15_t)0x46d8, (q15_t)0x9566, (q15_t)0x46d3, (q15_t)0x9562,\n    (q15_t)0x46ce, (q15_t)0x955f, (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46c4,\n    (q15_t)0x9558, (q15_t)0x46be, (q15_t)0x9554, (q15_t)0x46b9, (q15_t)0x9551,\n    (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x46af, (q15_t)0x954a, (q15_t)0x46a9,\n    (q15_t)0x9546, (q15_t)0x46a4, (q15_t)0x9543, (q15_t)0x469f, (q15_t)0x953f,\n    (q15_t)0x469a, (q15_t)0x953c, (q15_t)0x4694, (q15_t)0x9538, (q15_t)0x468f,\n    (q15_t)0x9535, (q15_t)0x468a, (q15_t)0x9532, (q15_t)0x4685, (q15_t)0x952e,\n    (q15_t)0x467f, (q15_t)0x952b, (q15_t)0x467a, (q15_t)0x9527, (q15_t)0x4675,\n    (q15_t)0x9524, (q15_t)0x4670, (q15_t)0x9520, (q15_t)0x466a, (q15_t)0x951d,\n    (q15_t)0x4665, (q15_t)0x9519, (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x465b,\n    (q15_t)0x9512, (q15_t)0x4655, (q15_t)0x950f, (q15_t)0x4650, (q15_t)0x950c,\n    (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4646, (q15_t)0x9505, (q15_t)0x4640,\n    (q15_t)0x9501, (q15_t)0x463b, (q15_t)0x94fe, (q15_t)0x4636, (q15_t)0x94fa,\n    (q15_t)0x4631, (q15_t)0x94f7, (q15_t)0x462b, (q15_t)0x94f3, (q15_t)0x4626,\n    (q15_t)0x94f0, (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x461c, (q15_t)0x94e9,\n    (q15_t)0x4616, (q15_t)0x94e6, (q15_t)0x4611, (q15_t)0x94e2, (q15_t)0x460c,\n    (q15_t)0x94df, (q15_t)0x4607, (q15_t)0x94db, (q15_t)0x4601, (q15_t)0x94d8,\n    (q15_t)0x45fc, (q15_t)0x94d4, (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45f2,\n    (q15_t)0x94ce, (q15_t)0x45ec, (q15_t)0x94ca, (q15_t)0x45e7, (q15_t)0x94c7,\n    (q15_t)0x45e2, (q15_t)0x94c3, (q15_t)0x45dd, (q15_t)0x94c0, (q15_t)0x45d7,\n    (q15_t)0x94bc, (q15_t)0x45d2, (q15_t)0x94b9, (q15_t)0x45cd, (q15_t)0x94b6,\n    (q15_t)0x45c7, (q15_t)0x94b2, (q15_t)0x45c2, (q15_t)0x94af, (q15_t)0x45bd,\n    (q15_t)0x94ab, (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45b2, (q15_t)0x94a4,\n    (q15_t)0x45ad, (q15_t)0x94a1, (q15_t)0x45a8, (q15_t)0x949e, (q15_t)0x45a3,\n    (q15_t)0x949a, (q15_t)0x459d, (q15_t)0x9497, (q15_t)0x4598, (q15_t)0x9493,\n    (q15_t)0x4593, (q15_t)0x9490, (q15_t)0x458d, (q15_t)0x948d, (q15_t)0x4588,\n    (q15_t)0x9489, (q15_t)0x4583, (q15_t)0x9486, (q15_t)0x457e, (q15_t)0x9482,\n    (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4573, (q15_t)0x947b, (q15_t)0x456e,\n    (q15_t)0x9478, (q15_t)0x4569, (q15_t)0x9475, (q15_t)0x4563, (q15_t)0x9471,\n    (q15_t)0x455e, (q15_t)0x946e, (q15_t)0x4559, (q15_t)0x946a, (q15_t)0x4553,\n    (q15_t)0x9467, (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4549, (q15_t)0x9460,\n    (q15_t)0x4544, (q15_t)0x945d, (q15_t)0x453e, (q15_t)0x9459, (q15_t)0x4539,\n    (q15_t)0x9456, (q15_t)0x4534, (q15_t)0x9453, (q15_t)0x452e, (q15_t)0x944f,\n    (q15_t)0x4529, (q15_t)0x944c, (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x451f,\n    (q15_t)0x9445, (q15_t)0x4519, (q15_t)0x9442, (q15_t)0x4514, (q15_t)0x943e,\n    (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x4509, (q15_t)0x9437, (q15_t)0x4504,\n    (q15_t)0x9434, (q15_t)0x44ff, (q15_t)0x9431, (q15_t)0x44fa, (q15_t)0x942d,\n    (q15_t)0x44f4, (q15_t)0x942a, (q15_t)0x44ef, (q15_t)0x9427, (q15_t)0x44ea,\n    (q15_t)0x9423, (q15_t)0x44e4, (q15_t)0x9420, (q15_t)0x44df, (q15_t)0x941c,\n    (q15_t)0x44da, (q15_t)0x9419, (q15_t)0x44d4, (q15_t)0x9416, (q15_t)0x44cf,\n    (q15_t)0x9412, (q15_t)0x44ca, (q15_t)0x940f, (q15_t)0x44c5, (q15_t)0x940b,\n    (q15_t)0x44bf, (q15_t)0x9408, (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44b5,\n    (q15_t)0x9401, (q15_t)0x44af, (q15_t)0x93fe, (q15_t)0x44aa, (q15_t)0x93fb,\n    (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x449f, (q15_t)0x93f4, (q15_t)0x449a,\n    (q15_t)0x93f1, (q15_t)0x4495, (q15_t)0x93ed, (q15_t)0x4490, (q15_t)0x93ea,\n    (q15_t)0x448a, (q15_t)0x93e6, (q15_t)0x4485, (q15_t)0x93e3, (q15_t)0x4480,\n    (q15_t)0x93e0, (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4475, (q15_t)0x93d9,\n    (q15_t)0x4470, (q15_t)0x93d6, (q15_t)0x446a, (q15_t)0x93d2, (q15_t)0x4465,\n    (q15_t)0x93cf, (q15_t)0x4460, (q15_t)0x93cc, (q15_t)0x445a, (q15_t)0x93c8,\n    (q15_t)0x4455, (q15_t)0x93c5, (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x444b,\n    (q15_t)0x93be, (q15_t)0x4445, (q15_t)0x93bb, (q15_t)0x4440, (q15_t)0x93b7,\n    (q15_t)0x443b, (q15_t)0x93b4, (q15_t)0x4435, (q15_t)0x93b1, (q15_t)0x4430,\n    (q15_t)0x93ad, (q15_t)0x442b, (q15_t)0x93aa, (q15_t)0x4425, (q15_t)0x93a7,\n    (q15_t)0x4420, (q15_t)0x93a3, (q15_t)0x441b, (q15_t)0x93a0, (q15_t)0x4415,\n    (q15_t)0x939d, (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x440b, (q15_t)0x9396,\n    (q15_t)0x4405, (q15_t)0x9393, (q15_t)0x4400, (q15_t)0x938f, (q15_t)0x43fb,\n    (q15_t)0x938c, (q15_t)0x43f5, (q15_t)0x9389, (q15_t)0x43f0, (q15_t)0x9385,\n    (q15_t)0x43eb, (q15_t)0x9382, (q15_t)0x43e5, (q15_t)0x937f, (q15_t)0x43e0,\n    (q15_t)0x937b, (q15_t)0x43db, (q15_t)0x9378, (q15_t)0x43d5, (q15_t)0x9375,\n    (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43cb, (q15_t)0x936e, (q15_t)0x43c5,\n    (q15_t)0x936b, (q15_t)0x43c0, (q15_t)0x9367, (q15_t)0x43bb, (q15_t)0x9364,\n    (q15_t)0x43b5, (q15_t)0x9361, (q15_t)0x43b0, (q15_t)0x935d, (q15_t)0x43ab,\n    (q15_t)0x935a, (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x43a0, (q15_t)0x9353,\n    (q15_t)0x439b, (q15_t)0x9350, (q15_t)0x4395, (q15_t)0x934d, (q15_t)0x4390,\n    (q15_t)0x9349, (q15_t)0x438b, (q15_t)0x9346, (q15_t)0x4385, (q15_t)0x9343,\n    (q15_t)0x4380, (q15_t)0x933f, (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4375,\n    (q15_t)0x9339, (q15_t)0x4370, (q15_t)0x9336, (q15_t)0x436b, (q15_t)0x9332,\n    (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4360, (q15_t)0x932c, (q15_t)0x435b,\n    (q15_t)0x9328, (q15_t)0x4355, (q15_t)0x9325, (q15_t)0x4350, (q15_t)0x9322,\n    (q15_t)0x434b, (q15_t)0x931e, (q15_t)0x4345, (q15_t)0x931b, (q15_t)0x4340,\n    (q15_t)0x9318, (q15_t)0x433b, (q15_t)0x9314, (q15_t)0x4335, (q15_t)0x9311,\n    (q15_t)0x4330, (q15_t)0x930e, (q15_t)0x432b, (q15_t)0x930b, (q15_t)0x4325,\n    (q15_t)0x9307, (q15_t)0x4320, (q15_t)0x9304, (q15_t)0x431b, (q15_t)0x9301,\n    (q15_t)0x4315, (q15_t)0x92fd, (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x430b,\n    (q15_t)0x92f7, (q15_t)0x4305, (q15_t)0x92f4, (q15_t)0x4300, (q15_t)0x92f0,\n    (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42f5, (q15_t)0x92ea, (q15_t)0x42f0,\n    (q15_t)0x92e6, (q15_t)0x42ea, (q15_t)0x92e3, (q15_t)0x42e5, (q15_t)0x92e0,\n    (q15_t)0x42e0, (q15_t)0x92dd, (q15_t)0x42da, (q15_t)0x92d9, (q15_t)0x42d5,\n    (q15_t)0x92d6, (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ca, (q15_t)0x92cf,\n    (q15_t)0x42c5, (q15_t)0x92cc, (q15_t)0x42c0, (q15_t)0x92c9, (q15_t)0x42ba,\n    (q15_t)0x92c6, (q15_t)0x42b5, (q15_t)0x92c2, (q15_t)0x42af, (q15_t)0x92bf,\n    (q15_t)0x42aa, (q15_t)0x92bc, (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x429f,\n    (q15_t)0x92b5, (q15_t)0x429a, (q15_t)0x92b2, (q15_t)0x4295, (q15_t)0x92af,\n    (q15_t)0x428f, (q15_t)0x92ab, (q15_t)0x428a, (q15_t)0x92a8, (q15_t)0x4284,\n    (q15_t)0x92a5, (q15_t)0x427f, (q15_t)0x92a2, (q15_t)0x427a, (q15_t)0x929e,\n    (q15_t)0x4274, (q15_t)0x929b, (q15_t)0x426f, (q15_t)0x9298, (q15_t)0x426a,\n    (q15_t)0x9295, (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x425f, (q15_t)0x928e,\n    (q15_t)0x425a, (q15_t)0x928b, (q15_t)0x4254, (q15_t)0x9288, (q15_t)0x424f,\n    (q15_t)0x9284, (q15_t)0x4249, (q15_t)0x9281, (q15_t)0x4244, (q15_t)0x927e,\n    (q15_t)0x423f, (q15_t)0x927b, (q15_t)0x4239, (q15_t)0x9277, (q15_t)0x4234,\n    (q15_t)0x9274, (q15_t)0x422f, (q15_t)0x9271, (q15_t)0x4229, (q15_t)0x926e,\n    (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x421e, (q15_t)0x9267, (q15_t)0x4219,\n    (q15_t)0x9264, (q15_t)0x4214, (q15_t)0x9261, (q15_t)0x420e, (q15_t)0x925d,\n    (q15_t)0x4209, (q15_t)0x925a, (q15_t)0x4203, (q15_t)0x9257, (q15_t)0x41fe,\n    (q15_t)0x9254, (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41f3, (q15_t)0x924d,\n    (q15_t)0x41ee, (q15_t)0x924a, (q15_t)0x41e9, (q15_t)0x9247, (q15_t)0x41e3,\n    (q15_t)0x9243, (q15_t)0x41de, (q15_t)0x9240, (q15_t)0x41d8, (q15_t)0x923d,\n    (q15_t)0x41d3, (q15_t)0x923a, (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41c8,\n    (q15_t)0x9233, (q15_t)0x41c3, (q15_t)0x9230, (q15_t)0x41bd, (q15_t)0x922d,\n    (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41b3, (q15_t)0x9226, (q15_t)0x41ad,\n    (q15_t)0x9223, (q15_t)0x41a8, (q15_t)0x9220, (q15_t)0x41a2, (q15_t)0x921d,\n    (q15_t)0x419d, (q15_t)0x9219, (q15_t)0x4198, (q15_t)0x9216, (q15_t)0x4192,\n    (q15_t)0x9213, (q15_t)0x418d, (q15_t)0x9210, (q15_t)0x4188, (q15_t)0x920d,\n    (q15_t)0x4182, (q15_t)0x9209, (q15_t)0x417d, (q15_t)0x9206, (q15_t)0x4177,\n    (q15_t)0x9203, (q15_t)0x4172, (q15_t)0x9200, (q15_t)0x416d, (q15_t)0x91fc,\n    (q15_t)0x4167, (q15_t)0x91f9, (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x415c,\n    (q15_t)0x91f3, (q15_t)0x4157, (q15_t)0x91f0, (q15_t)0x4152, (q15_t)0x91ec,\n    (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4147, (q15_t)0x91e6, (q15_t)0x4141,\n    (q15_t)0x91e3, (q15_t)0x413c, (q15_t)0x91e0, (q15_t)0x4136, (q15_t)0x91dc,\n    (q15_t)0x4131, (q15_t)0x91d9, (q15_t)0x412c, (q15_t)0x91d6, (q15_t)0x4126,\n    (q15_t)0x91d3, (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x411b, (q15_t)0x91cc,\n    (q15_t)0x4116, (q15_t)0x91c9, (q15_t)0x4111, (q15_t)0x91c6, (q15_t)0x410b,\n    (q15_t)0x91c3, (q15_t)0x4106, (q15_t)0x91c0, (q15_t)0x4100, (q15_t)0x91bc,\n    (q15_t)0x40fb, (q15_t)0x91b9, (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40f0,\n    (q15_t)0x91b3, (q15_t)0x40eb, (q15_t)0x91b0, (q15_t)0x40e5, (q15_t)0x91ad,\n    (q15_t)0x40e0, (q15_t)0x91a9, (q15_t)0x40da, (q15_t)0x91a6, (q15_t)0x40d5,\n    (q15_t)0x91a3, (q15_t)0x40d0, (q15_t)0x91a0, (q15_t)0x40ca, (q15_t)0x919d,\n    (q15_t)0x40c5, (q15_t)0x9199, (q15_t)0x40bf, (q15_t)0x9196, (q15_t)0x40ba,\n    (q15_t)0x9193, (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x40af, (q15_t)0x918d,\n    (q15_t)0x40aa, (q15_t)0x918a, (q15_t)0x40a4, (q15_t)0x9186, (q15_t)0x409f,\n    (q15_t)0x9183, (q15_t)0x4099, (q15_t)0x9180, (q15_t)0x4094, (q15_t)0x917d,\n    (q15_t)0x408f, (q15_t)0x917a, (q15_t)0x4089, (q15_t)0x9177, (q15_t)0x4084,\n    (q15_t)0x9173, (q15_t)0x407e, (q15_t)0x9170, (q15_t)0x4079, (q15_t)0x916d,\n    (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x406e, (q15_t)0x9167, (q15_t)0x4069,\n    (q15_t)0x9164, (q15_t)0x4063, (q15_t)0x9160, (q15_t)0x405e, (q15_t)0x915d,\n    (q15_t)0x4058, (q15_t)0x915a, (q15_t)0x4053, (q15_t)0x9157, (q15_t)0x404d,\n    (q15_t)0x9154, (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4043, (q15_t)0x914d,\n    (q15_t)0x403d, (q15_t)0x914a, (q15_t)0x4038, (q15_t)0x9147, (q15_t)0x4032,\n    (q15_t)0x9144, (q15_t)0x402d, (q15_t)0x9141, (q15_t)0x4027, (q15_t)0x913e,\n    (q15_t)0x4022, (q15_t)0x913a, (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4017,\n    (q15_t)0x9134, (q15_t)0x4012, (q15_t)0x9131, (q15_t)0x400c, (q15_t)0x912e,\n    (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x4001, (q15_t)0x9128, (q15_t)0x3ffc,\n    (q15_t)0x9124, (q15_t)0x3ff6, (q15_t)0x9121, (q15_t)0x3ff1, (q15_t)0x911e,\n    (q15_t)0x3fec, (q15_t)0x911b, (q15_t)0x3fe6, (q15_t)0x9118, (q15_t)0x3fe1,\n    (q15_t)0x9115, (q15_t)0x3fdb, (q15_t)0x9112, (q15_t)0x3fd6, (q15_t)0x910f,\n    (q15_t)0x3fd0, (q15_t)0x910b, (q15_t)0x3fcb, (q15_t)0x9108, (q15_t)0x3fc5,\n    (q15_t)0x9105, (q15_t)0x3fc0, (q15_t)0x9102, (q15_t)0x3fbb, (q15_t)0x90ff,\n    (q15_t)0x3fb5, (q15_t)0x90fc, (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3faa,\n    (q15_t)0x90f5, (q15_t)0x3fa5, (q15_t)0x90f2, (q15_t)0x3f9f, (q15_t)0x90ef,\n    (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f94, (q15_t)0x90e9, (q15_t)0x3f8f,\n    (q15_t)0x90e6, (q15_t)0x3f89, (q15_t)0x90e3, (q15_t)0x3f84, (q15_t)0x90e0,\n    (q15_t)0x3f7f, (q15_t)0x90dd, (q15_t)0x3f79, (q15_t)0x90d9, (q15_t)0x3f74,\n    (q15_t)0x90d6, (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f69, (q15_t)0x90d0,\n    (q15_t)0x3f63, (q15_t)0x90cd, (q15_t)0x3f5e, (q15_t)0x90ca, (q15_t)0x3f58,\n    (q15_t)0x90c7, (q15_t)0x3f53, (q15_t)0x90c4, (q15_t)0x3f4d, (q15_t)0x90c1,\n    (q15_t)0x3f48, (q15_t)0x90bd, (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f3d,\n    (q15_t)0x90b7, (q15_t)0x3f38, (q15_t)0x90b4, (q15_t)0x3f32, (q15_t)0x90b1,\n    (q15_t)0x3f2d, (q15_t)0x90ae, (q15_t)0x3f27, (q15_t)0x90ab, (q15_t)0x3f22,\n    (q15_t)0x90a8, (q15_t)0x3f1c, (q15_t)0x90a5, (q15_t)0x3f17, (q15_t)0x90a1,\n    (q15_t)0x3f11, (q15_t)0x909e, (q15_t)0x3f0c, (q15_t)0x909b, (q15_t)0x3f06,\n    (q15_t)0x9098, (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3efb, (q15_t)0x9092,\n    (q15_t)0x3ef6, (q15_t)0x908f, (q15_t)0x3ef1, (q15_t)0x908c, (q15_t)0x3eeb,\n    (q15_t)0x9089, (q15_t)0x3ee6, (q15_t)0x9086, (q15_t)0x3ee0, (q15_t)0x9083,\n    (q15_t)0x3edb, (q15_t)0x907f, (q15_t)0x3ed5, (q15_t)0x907c, (q15_t)0x3ed0,\n    (q15_t)0x9079, (q15_t)0x3eca, (q15_t)0x9076, (q15_t)0x3ec5, (q15_t)0x9073,\n    (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3eba, (q15_t)0x906d, (q15_t)0x3eb4,\n    (q15_t)0x906a, (q15_t)0x3eaf, (q15_t)0x9067, (q15_t)0x3ea9, (q15_t)0x9064,\n    (q15_t)0x3ea4, (q15_t)0x9061, (q15_t)0x3e9e, (q15_t)0x905e, (q15_t)0x3e99,\n    (q15_t)0x905b, (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e8e, (q15_t)0x9054,\n    (q15_t)0x3e88, (q15_t)0x9051, (q15_t)0x3e83, (q15_t)0x904e, (q15_t)0x3e7d,\n    (q15_t)0x904b, (q15_t)0x3e78, (q15_t)0x9048, (q15_t)0x3e73, (q15_t)0x9045,\n    (q15_t)0x3e6d, (q15_t)0x9042, (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e62,\n    (q15_t)0x903c, (q15_t)0x3e5d, (q15_t)0x9039, (q15_t)0x3e57, (q15_t)0x9036,\n    (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e4c, (q15_t)0x9030, (q15_t)0x3e47,\n    (q15_t)0x902d, (q15_t)0x3e41, (q15_t)0x902a, (q15_t)0x3e3c, (q15_t)0x9026,\n    (q15_t)0x3e36, (q15_t)0x9023, (q15_t)0x3e31, (q15_t)0x9020, (q15_t)0x3e2b,\n    (q15_t)0x901d, (q15_t)0x3e26, (q15_t)0x901a, (q15_t)0x3e20, (q15_t)0x9017,\n    (q15_t)0x3e1b, (q15_t)0x9014, (q15_t)0x3e15, (q15_t)0x9011, (q15_t)0x3e10,\n    (q15_t)0x900e, (q15_t)0x3e0a, (q15_t)0x900b, (q15_t)0x3e05, (q15_t)0x9008,\n    (q15_t)0x3dff, (q15_t)0x9005, (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3df4,\n    (q15_t)0x8fff, (q15_t)0x3def, (q15_t)0x8ffc, (q15_t)0x3de9, (q15_t)0x8ff9,\n    (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dde, (q15_t)0x8ff3, (q15_t)0x3dd9,\n    (q15_t)0x8ff0, (q15_t)0x3dd3, (q15_t)0x8fed, (q15_t)0x3dce, (q15_t)0x8fea,\n    (q15_t)0x3dc8, (q15_t)0x8fe7, (q15_t)0x3dc3, (q15_t)0x8fe3, (q15_t)0x3dbd,\n    (q15_t)0x8fe0, (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3db2, (q15_t)0x8fda,\n    (q15_t)0x3dad, (q15_t)0x8fd7, (q15_t)0x3da7, (q15_t)0x8fd4, (q15_t)0x3da2,\n    (q15_t)0x8fd1, (q15_t)0x3d9c, (q15_t)0x8fce, (q15_t)0x3d97, (q15_t)0x8fcb,\n    (q15_t)0x3d91, (q15_t)0x8fc8, (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d86,\n    (q15_t)0x8fc2, (q15_t)0x3d81, (q15_t)0x8fbf, (q15_t)0x3d7b, (q15_t)0x8fbc,\n    (q15_t)0x3d76, (q15_t)0x8fb9, (q15_t)0x3d70, (q15_t)0x8fb6, (q15_t)0x3d6b,\n    (q15_t)0x8fb3, (q15_t)0x3d65, (q15_t)0x8fb0, (q15_t)0x3d60, (q15_t)0x8fad,\n    (q15_t)0x3d5a, (q15_t)0x8faa, (q15_t)0x3d55, (q15_t)0x8fa7, (q15_t)0x3d4f,\n    (q15_t)0x8fa4, (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d44, (q15_t)0x8f9e,\n    (q15_t)0x3d3e, (q15_t)0x8f9b, (q15_t)0x3d39, (q15_t)0x8f98, (q15_t)0x3d33,\n    (q15_t)0x8f95, (q15_t)0x3d2e, (q15_t)0x8f92, (q15_t)0x3d28, (q15_t)0x8f8f,\n    (q15_t)0x3d23, (q15_t)0x8f8c, (q15_t)0x3d1d, (q15_t)0x8f89, (q15_t)0x3d18,\n    (q15_t)0x8f86, (q15_t)0x3d12, (q15_t)0x8f83, (q15_t)0x3d0d, (q15_t)0x8f80,\n    (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3d02, (q15_t)0x8f7a, (q15_t)0x3cfc,\n    (q15_t)0x8f77, (q15_t)0x3cf7, (q15_t)0x8f74, (q15_t)0x3cf1, (q15_t)0x8f71,\n    (q15_t)0x3cec, (q15_t)0x8f6e, (q15_t)0x3ce6, (q15_t)0x8f6b, (q15_t)0x3ce1,\n    (q15_t)0x8f68, (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cd6, (q15_t)0x8f62,\n    (q15_t)0x3cd0, (q15_t)0x8f5f, (q15_t)0x3cca, (q15_t)0x8f5c, (q15_t)0x3cc5,\n    (q15_t)0x8f59, (q15_t)0x3cbf, (q15_t)0x8f56, (q15_t)0x3cba, (q15_t)0x8f53,\n    (q15_t)0x3cb4, (q15_t)0x8f50, (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3ca9,\n    (q15_t)0x8f4a, (q15_t)0x3ca4, (q15_t)0x8f47, (q15_t)0x3c9e, (q15_t)0x8f44,\n    (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c93, (q15_t)0x8f3e, (q15_t)0x3c8e,\n    (q15_t)0x8f3b, (q15_t)0x3c88, (q15_t)0x8f38, (q15_t)0x3c83, (q15_t)0x8f35,\n    (q15_t)0x3c7d, (q15_t)0x8f32, (q15_t)0x3c77, (q15_t)0x8f2f, (q15_t)0x3c72,\n    (q15_t)0x8f2d, (q15_t)0x3c6c, (q15_t)0x8f2a, (q15_t)0x3c67, (q15_t)0x8f27,\n    (q15_t)0x3c61, (q15_t)0x8f24, (q15_t)0x3c5c, (q15_t)0x8f21, (q15_t)0x3c56,\n    (q15_t)0x8f1e, (q15_t)0x3c51, (q15_t)0x8f1b, (q15_t)0x3c4b, (q15_t)0x8f18,\n    (q15_t)0x3c46, (q15_t)0x8f15, (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c3b,\n    (q15_t)0x8f0f, (q15_t)0x3c35, (q15_t)0x8f0c, (q15_t)0x3c2f, (q15_t)0x8f09,\n    (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c24, (q15_t)0x8f03, (q15_t)0x3c1f,\n    (q15_t)0x8f00, (q15_t)0x3c19, (q15_t)0x8efd, (q15_t)0x3c14, (q15_t)0x8efa,\n    (q15_t)0x3c0e, (q15_t)0x8ef7, (q15_t)0x3c09, (q15_t)0x8ef4, (q15_t)0x3c03,\n    (q15_t)0x8ef1, (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3bf8, (q15_t)0x8eec,\n    (q15_t)0x3bf2, (q15_t)0x8ee9, (q15_t)0x3bed, (q15_t)0x8ee6, (q15_t)0x3be7,\n    (q15_t)0x8ee3, (q15_t)0x3be2, (q15_t)0x8ee0, (q15_t)0x3bdc, (q15_t)0x8edd,\n    (q15_t)0x3bd7, (q15_t)0x8eda, (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bcc,\n    (q15_t)0x8ed4, (q15_t)0x3bc6, (q15_t)0x8ed1, (q15_t)0x3bc0, (q15_t)0x8ece,\n    (q15_t)0x3bbb, (q15_t)0x8ecb, (q15_t)0x3bb5, (q15_t)0x8ec8, (q15_t)0x3bb0,\n    (q15_t)0x8ec5, (q15_t)0x3baa, (q15_t)0x8ec2, (q15_t)0x3ba5, (q15_t)0x8ebf,\n    (q15_t)0x3b9f, (q15_t)0x8ebd, (q15_t)0x3b99, (q15_t)0x8eba, (q15_t)0x3b94,\n    (q15_t)0x8eb7, (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b89, (q15_t)0x8eb1,\n    (q15_t)0x3b83, (q15_t)0x8eae, (q15_t)0x3b7e, (q15_t)0x8eab, (q15_t)0x3b78,\n    (q15_t)0x8ea8, (q15_t)0x3b73, (q15_t)0x8ea5, (q15_t)0x3b6d, (q15_t)0x8ea2,\n    (q15_t)0x3b67, (q15_t)0x8e9f, (q15_t)0x3b62, (q15_t)0x8e9c, (q15_t)0x3b5c,\n    (q15_t)0x8e99, (q15_t)0x3b57, (q15_t)0x8e97, (q15_t)0x3b51, (q15_t)0x8e94,\n    (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b46, (q15_t)0x8e8e, (q15_t)0x3b40,\n    (q15_t)0x8e8b, (q15_t)0x3b3b, (q15_t)0x8e88, (q15_t)0x3b35, (q15_t)0x8e85,\n    (q15_t)0x3b30, (q15_t)0x8e82, (q15_t)0x3b2a, (q15_t)0x8e7f, (q15_t)0x3b25,\n    (q15_t)0x8e7c, (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b19, (q15_t)0x8e77,\n    (q15_t)0x3b14, (q15_t)0x8e74, (q15_t)0x3b0e, (q15_t)0x8e71, (q15_t)0x3b09,\n    (q15_t)0x8e6e, (q15_t)0x3b03, (q15_t)0x8e6b, (q15_t)0x3afe, (q15_t)0x8e68,\n    (q15_t)0x3af8, (q15_t)0x8e65, (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3aed,\n    (q15_t)0x8e5f, (q15_t)0x3ae7, (q15_t)0x8e5d, (q15_t)0x3ae2, (q15_t)0x8e5a,\n    (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ad7, (q15_t)0x8e54, (q15_t)0x3ad1,\n    (q15_t)0x8e51, (q15_t)0x3acb, (q15_t)0x8e4e, (q15_t)0x3ac6, (q15_t)0x8e4b,\n    (q15_t)0x3ac0, (q15_t)0x8e48, (q15_t)0x3abb, (q15_t)0x8e45, (q15_t)0x3ab5,\n    (q15_t)0x8e43, (q15_t)0x3aaf, (q15_t)0x8e40, (q15_t)0x3aaa, (q15_t)0x8e3d,\n    (q15_t)0x3aa4, (q15_t)0x8e3a, (q15_t)0x3a9f, (q15_t)0x8e37, (q15_t)0x3a99,\n    (q15_t)0x8e34, (q15_t)0x3a94, (q15_t)0x8e31, (q15_t)0x3a8e, (q15_t)0x8e2e,\n    (q15_t)0x3a88, (q15_t)0x8e2c, (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a7d,\n    (q15_t)0x8e26, (q15_t)0x3a78, (q15_t)0x8e23, (q15_t)0x3a72, (q15_t)0x8e20,\n    (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a67, (q15_t)0x8e1a, (q15_t)0x3a61,\n    (q15_t)0x8e17, (q15_t)0x3a5c, (q15_t)0x8e15, (q15_t)0x3a56, (q15_t)0x8e12,\n    (q15_t)0x3a50, (q15_t)0x8e0f, (q15_t)0x3a4b, (q15_t)0x8e0c, (q15_t)0x3a45,\n    (q15_t)0x8e09, (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a3a, (q15_t)0x8e03,\n    (q15_t)0x3a34, (q15_t)0x8e01, (q15_t)0x3a2f, (q15_t)0x8dfe, (q15_t)0x3a29,\n    (q15_t)0x8dfb, (q15_t)0x3a24, (q15_t)0x8df8, (q15_t)0x3a1e, (q15_t)0x8df5,\n    (q15_t)0x3a19, (q15_t)0x8df2, (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x3a0d,\n    (q15_t)0x8ded, (q15_t)0x3a08, (q15_t)0x8dea, (q15_t)0x3a02, (q15_t)0x8de7,\n    (q15_t)0x39fd, (q15_t)0x8de4, (q15_t)0x39f7, (q15_t)0x8de1, (q15_t)0x39f1,\n    (q15_t)0x8dde, (q15_t)0x39ec, (q15_t)0x8ddc, (q15_t)0x39e6, (q15_t)0x8dd9,\n    (q15_t)0x39e0, (q15_t)0x8dd6, (q15_t)0x39db, (q15_t)0x8dd3, (q15_t)0x39d5,\n    (q15_t)0x8dd0, (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39ca, (q15_t)0x8dca,\n    (q15_t)0x39c4, (q15_t)0x8dc8, (q15_t)0x39bf, (q15_t)0x8dc5, (q15_t)0x39b9,\n    (q15_t)0x8dc2, (q15_t)0x39b4, (q15_t)0x8dbf, (q15_t)0x39ae, (q15_t)0x8dbc,\n    (q15_t)0x39a8, (q15_t)0x8db9, (q15_t)0x39a3, (q15_t)0x8db7, (q15_t)0x399d,\n    (q15_t)0x8db4, (q15_t)0x3998, (q15_t)0x8db1, (q15_t)0x3992, (q15_t)0x8dae,\n    (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3987, (q15_t)0x8da9, (q15_t)0x3981,\n    (q15_t)0x8da6, (q15_t)0x397c, (q15_t)0x8da3, (q15_t)0x3976, (q15_t)0x8da0,\n    (q15_t)0x3970, (q15_t)0x8d9d, (q15_t)0x396b, (q15_t)0x8d9a, (q15_t)0x3965,\n    (q15_t)0x8d98, (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x395a, (q15_t)0x8d92,\n    (q15_t)0x3954, (q15_t)0x8d8f, (q15_t)0x394f, (q15_t)0x8d8c, (q15_t)0x3949,\n    (q15_t)0x8d8a, (q15_t)0x3943, (q15_t)0x8d87, (q15_t)0x393e, (q15_t)0x8d84,\n    (q15_t)0x3938, (q15_t)0x8d81, (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x392d,\n    (q15_t)0x8d7b, (q15_t)0x3927, (q15_t)0x8d79, (q15_t)0x3922, (q15_t)0x8d76,\n    (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3916, (q15_t)0x8d70, (q15_t)0x3911,\n    (q15_t)0x8d6d, (q15_t)0x390b, (q15_t)0x8d6b, (q15_t)0x3906, (q15_t)0x8d68,\n    (q15_t)0x3900, (q15_t)0x8d65, (q15_t)0x38fa, (q15_t)0x8d62, (q15_t)0x38f5,\n    (q15_t)0x8d5f, (q15_t)0x38ef, (q15_t)0x8d5d, (q15_t)0x38e9, (q15_t)0x8d5a,\n    (q15_t)0x38e4, (q15_t)0x8d57, (q15_t)0x38de, (q15_t)0x8d54, (q15_t)0x38d8,\n    (q15_t)0x8d51, (q15_t)0x38d3, (q15_t)0x8d4f, (q15_t)0x38cd, (q15_t)0x8d4c,\n    (q15_t)0x38c8, (q15_t)0x8d49, (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38bc,\n    (q15_t)0x8d44, (q15_t)0x38b7, (q15_t)0x8d41, (q15_t)0x38b1, (q15_t)0x8d3e,\n    (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x38a6, (q15_t)0x8d38, (q15_t)0x38a0,\n    (q15_t)0x8d36, (q15_t)0x389b, (q15_t)0x8d33, (q15_t)0x3895, (q15_t)0x8d30,\n    (q15_t)0x388f, (q15_t)0x8d2d, (q15_t)0x388a, (q15_t)0x8d2b, (q15_t)0x3884,\n    (q15_t)0x8d28, (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3879, (q15_t)0x8d22,\n    (q15_t)0x3873, (q15_t)0x8d1f, (q15_t)0x386d, (q15_t)0x8d1d, (q15_t)0x3868,\n    (q15_t)0x8d1a, (q15_t)0x3862, (q15_t)0x8d17, (q15_t)0x385d, (q15_t)0x8d14,\n    (q15_t)0x3857, (q15_t)0x8d12, (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x384c,\n    (q15_t)0x8d0c, (q15_t)0x3846, (q15_t)0x8d09, (q15_t)0x3840, (q15_t)0x8d07,\n    (q15_t)0x383b, (q15_t)0x8d04, (q15_t)0x3835, (q15_t)0x8d01, (q15_t)0x382f,\n    (q15_t)0x8cfe, (q15_t)0x382a, (q15_t)0x8cfb, (q15_t)0x3824, (q15_t)0x8cf9,\n    (q15_t)0x381e, (q15_t)0x8cf6, (q15_t)0x3819, (q15_t)0x8cf3, (q15_t)0x3813,\n    (q15_t)0x8cf0, (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x3808, (q15_t)0x8ceb,\n    (q15_t)0x3802, (q15_t)0x8ce8, (q15_t)0x37fd, (q15_t)0x8ce5, (q15_t)0x37f7,\n    (q15_t)0x8ce3, (q15_t)0x37f1, (q15_t)0x8ce0, (q15_t)0x37ec, (q15_t)0x8cdd,\n    (q15_t)0x37e6, (q15_t)0x8cda, (q15_t)0x37e0, (q15_t)0x8cd8, (q15_t)0x37db,\n    (q15_t)0x8cd5, (q15_t)0x37d5, (q15_t)0x8cd2, (q15_t)0x37cf, (q15_t)0x8cd0,\n    (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37c4, (q15_t)0x8cca, (q15_t)0x37be,\n    (q15_t)0x8cc7, (q15_t)0x37b9, (q15_t)0x8cc5, (q15_t)0x37b3, (q15_t)0x8cc2,\n    (q15_t)0x37ad, (q15_t)0x8cbf, (q15_t)0x37a8, (q15_t)0x8cbc, (q15_t)0x37a2,\n    (q15_t)0x8cba, (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3797, (q15_t)0x8cb4,\n    (q15_t)0x3791, (q15_t)0x8cb1, (q15_t)0x378b, (q15_t)0x8caf, (q15_t)0x3786,\n    (q15_t)0x8cac, (q15_t)0x3780, (q15_t)0x8ca9, (q15_t)0x377a, (q15_t)0x8ca7,\n    (q15_t)0x3775, (q15_t)0x8ca4, (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3769,\n    (q15_t)0x8c9e, (q15_t)0x3764, (q15_t)0x8c9c, (q15_t)0x375e, (q15_t)0x8c99,\n    (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3753, (q15_t)0x8c94, (q15_t)0x374d,\n    (q15_t)0x8c91, (q15_t)0x3747, (q15_t)0x8c8e, (q15_t)0x3742, (q15_t)0x8c8b,\n    (q15_t)0x373c, (q15_t)0x8c89, (q15_t)0x3736, (q15_t)0x8c86, (q15_t)0x3731,\n    (q15_t)0x8c83, (q15_t)0x372b, (q15_t)0x8c81, (q15_t)0x3725, (q15_t)0x8c7e,\n    (q15_t)0x3720, (q15_t)0x8c7b, (q15_t)0x371a, (q15_t)0x8c78, (q15_t)0x3714,\n    (q15_t)0x8c76, (q15_t)0x370f, (q15_t)0x8c73, (q15_t)0x3709, (q15_t)0x8c70,\n    (q15_t)0x3703, (q15_t)0x8c6e, (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36f8,\n    (q15_t)0x8c68, (q15_t)0x36f2, (q15_t)0x8c65, (q15_t)0x36ed, (q15_t)0x8c63,\n    (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36e1, (q15_t)0x8c5d, (q15_t)0x36dc,\n    (q15_t)0x8c5b, (q15_t)0x36d6, (q15_t)0x8c58, (q15_t)0x36d0, (q15_t)0x8c55,\n    (q15_t)0x36cb, (q15_t)0x8c53, (q15_t)0x36c5, (q15_t)0x8c50, (q15_t)0x36bf,\n    (q15_t)0x8c4d, (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36b4, (q15_t)0x8c48,\n    (q15_t)0x36ae, (q15_t)0x8c45, (q15_t)0x36a9, (q15_t)0x8c43, (q15_t)0x36a3,\n    (q15_t)0x8c40, (q15_t)0x369d, (q15_t)0x8c3d, (q15_t)0x3698, (q15_t)0x8c3a,\n    (q15_t)0x3692, (q15_t)0x8c38, (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3686,\n    (q15_t)0x8c32, (q15_t)0x3681, (q15_t)0x8c30, (q15_t)0x367b, (q15_t)0x8c2d,\n    (q15_t)0x3675, (q15_t)0x8c2a, (q15_t)0x3670, (q15_t)0x8c28, (q15_t)0x366a,\n    (q15_t)0x8c25, (q15_t)0x3664, (q15_t)0x8c22, (q15_t)0x365f, (q15_t)0x8c20,\n    (q15_t)0x3659, (q15_t)0x8c1d, (q15_t)0x3653, (q15_t)0x8c1a, (q15_t)0x364e,\n    (q15_t)0x8c18, (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3642, (q15_t)0x8c12,\n    (q15_t)0x363d, (q15_t)0x8c10, (q15_t)0x3637, (q15_t)0x8c0d, (q15_t)0x3631,\n    (q15_t)0x8c0a, (q15_t)0x362b, (q15_t)0x8c08, (q15_t)0x3626, (q15_t)0x8c05,\n    (q15_t)0x3620, (q15_t)0x8c02, (q15_t)0x361a, (q15_t)0x8c00, (q15_t)0x3615,\n    (q15_t)0x8bfd, (q15_t)0x360f, (q15_t)0x8bfa, (q15_t)0x3609, (q15_t)0x8bf8,\n    (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35fe, (q15_t)0x8bf3, (q15_t)0x35f8,\n    (q15_t)0x8bf0, (q15_t)0x35f3, (q15_t)0x8bed, (q15_t)0x35ed, (q15_t)0x8beb,\n    (q15_t)0x35e7, (q15_t)0x8be8, (q15_t)0x35e1, (q15_t)0x8be5, (q15_t)0x35dc,\n    (q15_t)0x8be3, (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35d0, (q15_t)0x8bdd,\n    (q15_t)0x35cb, (q15_t)0x8bdb, (q15_t)0x35c5, (q15_t)0x8bd8, (q15_t)0x35bf,\n    (q15_t)0x8bd5, (q15_t)0x35ba, (q15_t)0x8bd3, (q15_t)0x35b4, (q15_t)0x8bd0,\n    (q15_t)0x35ae, (q15_t)0x8bce, (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x35a3,\n    (q15_t)0x8bc8, (q15_t)0x359d, (q15_t)0x8bc6, (q15_t)0x3597, (q15_t)0x8bc3,\n    (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x358c, (q15_t)0x8bbe, (q15_t)0x3586,\n    (q15_t)0x8bbb, (q15_t)0x3580, (q15_t)0x8bb8, (q15_t)0x357b, (q15_t)0x8bb6,\n    (q15_t)0x3575, (q15_t)0x8bb3, (q15_t)0x356f, (q15_t)0x8bb1, (q15_t)0x356a,\n    (q15_t)0x8bae, (q15_t)0x3564, (q15_t)0x8bab, (q15_t)0x355e, (q15_t)0x8ba9,\n    (q15_t)0x3558, (q15_t)0x8ba6, (q15_t)0x3553, (q15_t)0x8ba4, (q15_t)0x354d,\n    (q15_t)0x8ba1, (q15_t)0x3547, (q15_t)0x8b9e, (q15_t)0x3542, (q15_t)0x8b9c,\n    (q15_t)0x353c, (q15_t)0x8b99, (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x3530,\n    (q15_t)0x8b94, (q15_t)0x352b, (q15_t)0x8b91, (q15_t)0x3525, (q15_t)0x8b8f,\n    (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x351a, (q15_t)0x8b89, (q15_t)0x3514,\n    (q15_t)0x8b87, (q15_t)0x350e, (q15_t)0x8b84, (q15_t)0x3508, (q15_t)0x8b82,\n    (q15_t)0x3503, (q15_t)0x8b7f, (q15_t)0x34fd, (q15_t)0x8b7c, (q15_t)0x34f7,\n    (q15_t)0x8b7a, (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34ec, (q15_t)0x8b75,\n    (q15_t)0x34e6, (q15_t)0x8b72, (q15_t)0x34e0, (q15_t)0x8b6f, (q15_t)0x34db,\n    (q15_t)0x8b6d, (q15_t)0x34d5, (q15_t)0x8b6a, (q15_t)0x34cf, (q15_t)0x8b68,\n    (q15_t)0x34ca, (q15_t)0x8b65, (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34be,\n    (q15_t)0x8b60, (q15_t)0x34b8, (q15_t)0x8b5d, (q15_t)0x34b3, (q15_t)0x8b5b,\n    (q15_t)0x34ad, (q15_t)0x8b58, (q15_t)0x34a7, (q15_t)0x8b55, (q15_t)0x34a1,\n    (q15_t)0x8b53, (q15_t)0x349c, (q15_t)0x8b50, (q15_t)0x3496, (q15_t)0x8b4e,\n    (q15_t)0x3490, (q15_t)0x8b4b, (q15_t)0x348b, (q15_t)0x8b49, (q15_t)0x3485,\n    (q15_t)0x8b46, (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3479, (q15_t)0x8b41,\n    (q15_t)0x3474, (q15_t)0x8b3e, (q15_t)0x346e, (q15_t)0x8b3c, (q15_t)0x3468,\n    (q15_t)0x8b39, (q15_t)0x3462, (q15_t)0x8b37, (q15_t)0x345d, (q15_t)0x8b34,\n    (q15_t)0x3457, (q15_t)0x8b31, (q15_t)0x3451, (q15_t)0x8b2f, (q15_t)0x344b,\n    (q15_t)0x8b2c, (q15_t)0x3446, (q15_t)0x8b2a, (q15_t)0x3440, (q15_t)0x8b27,\n    (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3435, (q15_t)0x8b22, (q15_t)0x342f,\n    (q15_t)0x8b1f, (q15_t)0x3429, (q15_t)0x8b1d, (q15_t)0x3423, (q15_t)0x8b1a,\n    (q15_t)0x341e, (q15_t)0x8b18, (q15_t)0x3418, (q15_t)0x8b15, (q15_t)0x3412,\n    (q15_t)0x8b13, (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x3407, (q15_t)0x8b0e,\n    (q15_t)0x3401, (q15_t)0x8b0b, (q15_t)0x33fb, (q15_t)0x8b08, (q15_t)0x33f5,\n    (q15_t)0x8b06, (q15_t)0x33f0, (q15_t)0x8b03, (q15_t)0x33ea, (q15_t)0x8b01,\n    (q15_t)0x33e4, (q15_t)0x8afe, (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33d9,\n    (q15_t)0x8af9, (q15_t)0x33d3, (q15_t)0x8af7, (q15_t)0x33cd, (q15_t)0x8af4,\n    (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33c2, (q15_t)0x8aef, (q15_t)0x33bc,\n    (q15_t)0x8aec, (q15_t)0x33b6, (q15_t)0x8aea, (q15_t)0x33b0, (q15_t)0x8ae7,\n    (q15_t)0x33ab, (q15_t)0x8ae5, (q15_t)0x33a5, (q15_t)0x8ae2, (q15_t)0x339f,\n    (q15_t)0x8ae0, (q15_t)0x3399, (q15_t)0x8add, (q15_t)0x3394, (q15_t)0x8adb,\n    (q15_t)0x338e, (q15_t)0x8ad8, (q15_t)0x3388, (q15_t)0x8ad6, (q15_t)0x3382,\n    (q15_t)0x8ad3, (q15_t)0x337d, (q15_t)0x8ad1, (q15_t)0x3377, (q15_t)0x8ace,\n    (q15_t)0x3371, (q15_t)0x8acb, (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3366,\n    (q15_t)0x8ac6, (q15_t)0x3360, (q15_t)0x8ac4, (q15_t)0x335a, (q15_t)0x8ac1,\n    (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x334f, (q15_t)0x8abc, (q15_t)0x3349,\n    (q15_t)0x8aba, (q15_t)0x3343, (q15_t)0x8ab7, (q15_t)0x333d, (q15_t)0x8ab5,\n    (q15_t)0x3338, (q15_t)0x8ab2, (q15_t)0x3332, (q15_t)0x8ab0, (q15_t)0x332c,\n    (q15_t)0x8aad, (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x3321, (q15_t)0x8aa8,\n    (q15_t)0x331b, (q15_t)0x8aa6, (q15_t)0x3315, (q15_t)0x8aa3, (q15_t)0x330f,\n    (q15_t)0x8aa1, (q15_t)0x330a, (q15_t)0x8a9e, (q15_t)0x3304, (q15_t)0x8a9c,\n    (q15_t)0x32fe, (q15_t)0x8a99, (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32f3,\n    (q15_t)0x8a94, (q15_t)0x32ed, (q15_t)0x8a92, (q15_t)0x32e7, (q15_t)0x8a8f,\n    (q15_t)0x32e1, (q15_t)0x8a8d, (q15_t)0x32db, (q15_t)0x8a8a, (q15_t)0x32d6,\n    (q15_t)0x8a88, (q15_t)0x32d0, (q15_t)0x8a85, (q15_t)0x32ca, (q15_t)0x8a83,\n    (q15_t)0x32c4, (q15_t)0x8a80, (q15_t)0x32bf, (q15_t)0x8a7e, (q15_t)0x32b9,\n    (q15_t)0x8a7b, (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x32ad, (q15_t)0x8a76,\n    (q15_t)0x32a8, (q15_t)0x8a74, (q15_t)0x32a2, (q15_t)0x8a71, (q15_t)0x329c,\n    (q15_t)0x8a6f, (q15_t)0x3296, (q15_t)0x8a6c, (q15_t)0x3290, (q15_t)0x8a6a,\n    (q15_t)0x328b, (q15_t)0x8a67, (q15_t)0x3285, (q15_t)0x8a65, (q15_t)0x327f,\n    (q15_t)0x8a62, (q15_t)0x3279, (q15_t)0x8a60, (q15_t)0x3274, (q15_t)0x8a5d,\n    (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3268, (q15_t)0x8a59, (q15_t)0x3262,\n    (q15_t)0x8a56, (q15_t)0x325d, (q15_t)0x8a54, (q15_t)0x3257, (q15_t)0x8a51,\n    (q15_t)0x3251, (q15_t)0x8a4f, (q15_t)0x324b, (q15_t)0x8a4c, (q15_t)0x3245,\n    (q15_t)0x8a4a, (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x323a, (q15_t)0x8a45,\n    (q15_t)0x3234, (q15_t)0x8a42, (q15_t)0x322e, (q15_t)0x8a40, (q15_t)0x3228,\n    (q15_t)0x8a3d, (q15_t)0x3223, (q15_t)0x8a3b, (q15_t)0x321d, (q15_t)0x8a38,\n    (q15_t)0x3217, (q15_t)0x8a36, (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x320c,\n    (q15_t)0x8a31, (q15_t)0x3206, (q15_t)0x8a2f, (q15_t)0x3200, (q15_t)0x8a2c,\n    (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31f4, (q15_t)0x8a27, (q15_t)0x31ef,\n    (q15_t)0x8a25, (q15_t)0x31e9, (q15_t)0x8a22, (q15_t)0x31e3, (q15_t)0x8a20,\n    (q15_t)0x31dd, (q15_t)0x8a1d, (q15_t)0x31d8, (q15_t)0x8a1b, (q15_t)0x31d2,\n    (q15_t)0x8a19, (q15_t)0x31cc, (q15_t)0x8a16, (q15_t)0x31c6, (q15_t)0x8a14,\n    (q15_t)0x31c0, (q15_t)0x8a11, (q15_t)0x31bb, (q15_t)0x8a0f, (q15_t)0x31b5,\n    (q15_t)0x8a0c, (q15_t)0x31af, (q15_t)0x8a0a, (q15_t)0x31a9, (q15_t)0x8a07,\n    (q15_t)0x31a3, (q15_t)0x8a05, (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3198,\n    (q15_t)0x8a00, (q15_t)0x3192, (q15_t)0x89fe, (q15_t)0x318c, (q15_t)0x89fb,\n    (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x3181, (q15_t)0x89f6, (q15_t)0x317b,\n    (q15_t)0x89f4, (q15_t)0x3175, (q15_t)0x89f2, (q15_t)0x316f, (q15_t)0x89ef,\n    (q15_t)0x3169, (q15_t)0x89ed, (q15_t)0x3164, (q15_t)0x89ea, (q15_t)0x315e,\n    (q15_t)0x89e8, (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3152, (q15_t)0x89e3,\n    (q15_t)0x314c, (q15_t)0x89e1, (q15_t)0x3147, (q15_t)0x89de, (q15_t)0x3141,\n    (q15_t)0x89dc, (q15_t)0x313b, (q15_t)0x89d9, (q15_t)0x3135, (q15_t)0x89d7,\n    (q15_t)0x312f, (q15_t)0x89d5, (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3124,\n    (q15_t)0x89d0, (q15_t)0x311e, (q15_t)0x89cd, (q15_t)0x3118, (q15_t)0x89cb,\n    (q15_t)0x3112, (q15_t)0x89c8, (q15_t)0x310d, (q15_t)0x89c6, (q15_t)0x3107,\n    (q15_t)0x89c4, (q15_t)0x3101, (q15_t)0x89c1, (q15_t)0x30fb, (q15_t)0x89bf,\n    (q15_t)0x30f5, (q15_t)0x89bc, (q15_t)0x30f0, (q15_t)0x89ba, (q15_t)0x30ea,\n    (q15_t)0x89b8, (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30de, (q15_t)0x89b3,\n    (q15_t)0x30d8, (q15_t)0x89b0, (q15_t)0x30d3, (q15_t)0x89ae, (q15_t)0x30cd,\n    (q15_t)0x89ac, (q15_t)0x30c7, (q15_t)0x89a9, (q15_t)0x30c1, (q15_t)0x89a7,\n    (q15_t)0x30bb, (q15_t)0x89a4, (q15_t)0x30b6, (q15_t)0x89a2, (q15_t)0x30b0,\n    (q15_t)0x89a0, (q15_t)0x30aa, (q15_t)0x899d, (q15_t)0x30a4, (q15_t)0x899b,\n    (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3099, (q15_t)0x8996, (q15_t)0x3093,\n    (q15_t)0x8994, (q15_t)0x308d, (q15_t)0x8991, (q15_t)0x3087, (q15_t)0x898f,\n    (q15_t)0x3081, (q15_t)0x898d, (q15_t)0x307b, (q15_t)0x898a, (q15_t)0x3076,\n    (q15_t)0x8988, (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x306a, (q15_t)0x8983,\n    (q15_t)0x3064, (q15_t)0x8981, (q15_t)0x305e, (q15_t)0x897e, (q15_t)0x3059,\n    (q15_t)0x897c, (q15_t)0x3053, (q15_t)0x897a, (q15_t)0x304d, (q15_t)0x8977,\n    (q15_t)0x3047, (q15_t)0x8975, (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x303b,\n    (q15_t)0x8970, (q15_t)0x3036, (q15_t)0x896e, (q15_t)0x3030, (q15_t)0x896b,\n    (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3024, (q15_t)0x8967, (q15_t)0x301e,\n    (q15_t)0x8964, (q15_t)0x3019, (q15_t)0x8962, (q15_t)0x3013, (q15_t)0x8960,\n    (q15_t)0x300d, (q15_t)0x895d, (q15_t)0x3007, (q15_t)0x895b, (q15_t)0x3001,\n    (q15_t)0x8958, (q15_t)0x2ffb, (q15_t)0x8956, (q15_t)0x2ff6, (q15_t)0x8954,\n    (q15_t)0x2ff0, (q15_t)0x8951, (q15_t)0x2fea, (q15_t)0x894f, (q15_t)0x2fe4,\n    (q15_t)0x894d, (q15_t)0x2fde, (q15_t)0x894a, (q15_t)0x2fd8, (q15_t)0x8948,\n    (q15_t)0x2fd3, (q15_t)0x8946, (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fc7,\n    (q15_t)0x8941, (q15_t)0x2fc1, (q15_t)0x893f, (q15_t)0x2fbb, (q15_t)0x893c,\n    (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2fb0, (q15_t)0x8938, (q15_t)0x2faa,\n    (q15_t)0x8935, (q15_t)0x2fa4, (q15_t)0x8933, (q15_t)0x2f9e, (q15_t)0x8931,\n    (q15_t)0x2f98, (q15_t)0x892e, (q15_t)0x2f92, (q15_t)0x892c, (q15_t)0x2f8d,\n    (q15_t)0x892a, (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f81, (q15_t)0x8925,\n    (q15_t)0x2f7b, (q15_t)0x8923, (q15_t)0x2f75, (q15_t)0x8920, (q15_t)0x2f6f,\n    (q15_t)0x891e, (q15_t)0x2f6a, (q15_t)0x891c, (q15_t)0x2f64, (q15_t)0x8919,\n    (q15_t)0x2f5e, (q15_t)0x8917, (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f52,\n    (q15_t)0x8912, (q15_t)0x2f4c, (q15_t)0x8910, (q15_t)0x2f47, (q15_t)0x890e,\n    (q15_t)0x2f41, (q15_t)0x890b, (q15_t)0x2f3b, (q15_t)0x8909, (q15_t)0x2f35,\n    (q15_t)0x8907, (q15_t)0x2f2f, (q15_t)0x8904, (q15_t)0x2f29, (q15_t)0x8902,\n    (q15_t)0x2f24, (q15_t)0x8900, (q15_t)0x2f1e, (q15_t)0x88fd, (q15_t)0x2f18,\n    (q15_t)0x88fb, (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2f0c, (q15_t)0x88f6,\n    (q15_t)0x2f06, (q15_t)0x88f4, (q15_t)0x2f01, (q15_t)0x88f2, (q15_t)0x2efb,\n    (q15_t)0x88f0, (q15_t)0x2ef5, (q15_t)0x88ed, (q15_t)0x2eef, (q15_t)0x88eb,\n    (q15_t)0x2ee9, (q15_t)0x88e9, (q15_t)0x2ee3, (q15_t)0x88e6, (q15_t)0x2edd,\n    (q15_t)0x88e4, (q15_t)0x2ed8, (q15_t)0x88e2, (q15_t)0x2ed2, (q15_t)0x88df,\n    (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2ec6, (q15_t)0x88db, (q15_t)0x2ec0,\n    (q15_t)0x88d9, (q15_t)0x2eba, (q15_t)0x88d6, (q15_t)0x2eb5, (q15_t)0x88d4,\n    (q15_t)0x2eaf, (q15_t)0x88d2, (q15_t)0x2ea9, (q15_t)0x88cf, (q15_t)0x2ea3,\n    (q15_t)0x88cd, (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e97, (q15_t)0x88c8,\n    (q15_t)0x2e91, (q15_t)0x88c6, (q15_t)0x2e8c, (q15_t)0x88c4, (q15_t)0x2e86,\n    (q15_t)0x88c2, (q15_t)0x2e80, (q15_t)0x88bf, (q15_t)0x2e7a, (q15_t)0x88bd,\n    (q15_t)0x2e74, (q15_t)0x88bb, (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e68,\n    (q15_t)0x88b6, (q15_t)0x2e63, (q15_t)0x88b4, (q15_t)0x2e5d, (q15_t)0x88b2,\n    (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e51, (q15_t)0x88ad, (q15_t)0x2e4b,\n    (q15_t)0x88ab, (q15_t)0x2e45, (q15_t)0x88a9, (q15_t)0x2e3f, (q15_t)0x88a6,\n    (q15_t)0x2e3a, (q15_t)0x88a4, (q15_t)0x2e34, (q15_t)0x88a2, (q15_t)0x2e2e,\n    (q15_t)0x88a0, (q15_t)0x2e28, (q15_t)0x889d, (q15_t)0x2e22, (q15_t)0x889b,\n    (q15_t)0x2e1c, (q15_t)0x8899, (q15_t)0x2e16, (q15_t)0x8896, (q15_t)0x2e11,\n    (q15_t)0x8894, (q15_t)0x2e0b, (q15_t)0x8892, (q15_t)0x2e05, (q15_t)0x8890,\n    (q15_t)0x2dff, (q15_t)0x888d, (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2df3,\n    (q15_t)0x8889, (q15_t)0x2ded, (q15_t)0x8887, (q15_t)0x2de7, (q15_t)0x8884,\n    (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2ddc, (q15_t)0x8880, (q15_t)0x2dd6,\n    (q15_t)0x887e, (q15_t)0x2dd0, (q15_t)0x887b, (q15_t)0x2dca, (q15_t)0x8879,\n    (q15_t)0x2dc4, (q15_t)0x8877, (q15_t)0x2dbe, (q15_t)0x8875, (q15_t)0x2db9,\n    (q15_t)0x8872, (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2dad, (q15_t)0x886e,\n    (q15_t)0x2da7, (q15_t)0x886c, (q15_t)0x2da1, (q15_t)0x8869, (q15_t)0x2d9b,\n    (q15_t)0x8867, (q15_t)0x2d95, (q15_t)0x8865, (q15_t)0x2d8f, (q15_t)0x8863,\n    (q15_t)0x2d8a, (q15_t)0x8860, (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d7e,\n    (q15_t)0x885c, (q15_t)0x2d78, (q15_t)0x885a, (q15_t)0x2d72, (q15_t)0x8858,\n    (q15_t)0x2d6c, (q15_t)0x8855, (q15_t)0x2d66, (q15_t)0x8853, (q15_t)0x2d60,\n    (q15_t)0x8851, (q15_t)0x2d5b, (q15_t)0x884f, (q15_t)0x2d55, (q15_t)0x884c,\n    (q15_t)0x2d4f, (q15_t)0x884a, (q15_t)0x2d49, (q15_t)0x8848, (q15_t)0x2d43,\n    (q15_t)0x8846, (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d37, (q15_t)0x8841,\n    (q15_t)0x2d31, (q15_t)0x883f, (q15_t)0x2d2c, (q15_t)0x883d, (q15_t)0x2d26,\n    (q15_t)0x883b, (q15_t)0x2d20, (q15_t)0x8838, (q15_t)0x2d1a, (q15_t)0x8836,\n    (q15_t)0x2d14, (q15_t)0x8834, (q15_t)0x2d0e, (q15_t)0x8832, (q15_t)0x2d08,\n    (q15_t)0x8830, (q15_t)0x2d02, (q15_t)0x882d, (q15_t)0x2cfd, (q15_t)0x882b,\n    (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cf1, (q15_t)0x8827, (q15_t)0x2ceb,\n    (q15_t)0x8825, (q15_t)0x2ce5, (q15_t)0x8822, (q15_t)0x2cdf, (q15_t)0x8820,\n    (q15_t)0x2cd9, (q15_t)0x881e, (q15_t)0x2cd3, (q15_t)0x881c, (q15_t)0x2ccd,\n    (q15_t)0x881a, (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cc2, (q15_t)0x8815,\n    (q15_t)0x2cbc, (q15_t)0x8813, (q15_t)0x2cb6, (q15_t)0x8811, (q15_t)0x2cb0,\n    (q15_t)0x880f, (q15_t)0x2caa, (q15_t)0x880c, (q15_t)0x2ca4, (q15_t)0x880a,\n    (q15_t)0x2c9e, (q15_t)0x8808, (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c93,\n    (q15_t)0x8804, (q15_t)0x2c8d, (q15_t)0x8801, (q15_t)0x2c87, (q15_t)0x87ff,\n    (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c7b, (q15_t)0x87fb, (q15_t)0x2c75,\n    (q15_t)0x87f9, (q15_t)0x2c6f, (q15_t)0x87f6, (q15_t)0x2c69, (q15_t)0x87f4,\n    (q15_t)0x2c63, (q15_t)0x87f2, (q15_t)0x2c5e, (q15_t)0x87f0, (q15_t)0x2c58,\n    (q15_t)0x87ee, (q15_t)0x2c52, (q15_t)0x87ec, (q15_t)0x2c4c, (q15_t)0x87e9,\n    (q15_t)0x2c46, (q15_t)0x87e7, (q15_t)0x2c40, (q15_t)0x87e5, (q15_t)0x2c3a,\n    (q15_t)0x87e3, (q15_t)0x2c34, (q15_t)0x87e1, (q15_t)0x2c2e, (q15_t)0x87df,\n    (q15_t)0x2c29, (q15_t)0x87dc, (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c1d,\n    (q15_t)0x87d8, (q15_t)0x2c17, (q15_t)0x87d6, (q15_t)0x2c11, (q15_t)0x87d4,\n    (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2c05, (q15_t)0x87cf, (q15_t)0x2bff,\n    (q15_t)0x87cd, (q15_t)0x2bf9, (q15_t)0x87cb, (q15_t)0x2bf3, (q15_t)0x87c9,\n    (q15_t)0x2bee, (q15_t)0x87c7, (q15_t)0x2be8, (q15_t)0x87c5, (q15_t)0x2be2,\n    (q15_t)0x87c2, (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bd6, (q15_t)0x87be,\n    (q15_t)0x2bd0, (q15_t)0x87bc, (q15_t)0x2bca, (q15_t)0x87ba, (q15_t)0x2bc4,\n    (q15_t)0x87b8, (q15_t)0x2bbe, (q15_t)0x87b6, (q15_t)0x2bb8, (q15_t)0x87b3,\n    (q15_t)0x2bb2, (q15_t)0x87b1, (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2ba7,\n    (q15_t)0x87ad, (q15_t)0x2ba1, (q15_t)0x87ab, (q15_t)0x2b9b, (q15_t)0x87a9,\n    (q15_t)0x2b95, (q15_t)0x87a7, (q15_t)0x2b8f, (q15_t)0x87a4, (q15_t)0x2b89,\n    (q15_t)0x87a2, (q15_t)0x2b83, (q15_t)0x87a0, (q15_t)0x2b7d, (q15_t)0x879e,\n    (q15_t)0x2b77, (q15_t)0x879c, (q15_t)0x2b71, (q15_t)0x879a, (q15_t)0x2b6c,\n    (q15_t)0x8798, (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b60, (q15_t)0x8793,\n    (q15_t)0x2b5a, (q15_t)0x8791, (q15_t)0x2b54, (q15_t)0x878f, (q15_t)0x2b4e,\n    (q15_t)0x878d, (q15_t)0x2b48, (q15_t)0x878b, (q15_t)0x2b42, (q15_t)0x8789,\n    (q15_t)0x2b3c, (q15_t)0x8787, (q15_t)0x2b36, (q15_t)0x8784, (q15_t)0x2b30,\n    (q15_t)0x8782, (q15_t)0x2b2b, (q15_t)0x8780, (q15_t)0x2b25, (q15_t)0x877e,\n    (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b19, (q15_t)0x877a, (q15_t)0x2b13,\n    (q15_t)0x8778, (q15_t)0x2b0d, (q15_t)0x8776, (q15_t)0x2b07, (q15_t)0x8774,\n    (q15_t)0x2b01, (q15_t)0x8771, (q15_t)0x2afb, (q15_t)0x876f, (q15_t)0x2af5,\n    (q15_t)0x876d, (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ae9, (q15_t)0x8769,\n    (q15_t)0x2ae4, (q15_t)0x8767, (q15_t)0x2ade, (q15_t)0x8765, (q15_t)0x2ad8,\n    (q15_t)0x8763, (q15_t)0x2ad2, (q15_t)0x8761, (q15_t)0x2acc, (q15_t)0x875e,\n    (q15_t)0x2ac6, (q15_t)0x875c, (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aba,\n    (q15_t)0x8758, (q15_t)0x2ab4, (q15_t)0x8756, (q15_t)0x2aae, (q15_t)0x8754,\n    (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2aa2, (q15_t)0x8750, (q15_t)0x2a9c,\n    (q15_t)0x874e, (q15_t)0x2a97, (q15_t)0x874c, (q15_t)0x2a91, (q15_t)0x874a,\n    (q15_t)0x2a8b, (q15_t)0x8747, (q15_t)0x2a85, (q15_t)0x8745, (q15_t)0x2a7f,\n    (q15_t)0x8743, (q15_t)0x2a79, (q15_t)0x8741, (q15_t)0x2a73, (q15_t)0x873f,\n    (q15_t)0x2a6d, (q15_t)0x873d, (q15_t)0x2a67, (q15_t)0x873b, (q15_t)0x2a61,\n    (q15_t)0x8739, (q15_t)0x2a5b, (q15_t)0x8737, (q15_t)0x2a55, (q15_t)0x8735,\n    (q15_t)0x2a4f, (q15_t)0x8733, (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a44,\n    (q15_t)0x872e, (q15_t)0x2a3e, (q15_t)0x872c, (q15_t)0x2a38, (q15_t)0x872a,\n    (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a2c, (q15_t)0x8726, (q15_t)0x2a26,\n    (q15_t)0x8724, (q15_t)0x2a20, (q15_t)0x8722, (q15_t)0x2a1a, (q15_t)0x8720,\n    (q15_t)0x2a14, (q15_t)0x871e, (q15_t)0x2a0e, (q15_t)0x871c, (q15_t)0x2a08,\n    (q15_t)0x871a, (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29fc, (q15_t)0x8716,\n    (q15_t)0x29f6, (q15_t)0x8714, (q15_t)0x29f0, (q15_t)0x8712, (q15_t)0x29eb,\n    (q15_t)0x870f, (q15_t)0x29e5, (q15_t)0x870d, (q15_t)0x29df, (q15_t)0x870b,\n    (q15_t)0x29d9, (q15_t)0x8709, (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29cd,\n    (q15_t)0x8705, (q15_t)0x29c7, (q15_t)0x8703, (q15_t)0x29c1, (q15_t)0x8701,\n    (q15_t)0x29bb, (q15_t)0x86ff, (q15_t)0x29b5, (q15_t)0x86fd, (q15_t)0x29af,\n    (q15_t)0x86fb, (q15_t)0x29a9, (q15_t)0x86f9, (q15_t)0x29a3, (q15_t)0x86f7,\n    (q15_t)0x299d, (q15_t)0x86f5, (q15_t)0x2997, (q15_t)0x86f3, (q15_t)0x2991,\n    (q15_t)0x86f1, (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2986, (q15_t)0x86ed,\n    (q15_t)0x2980, (q15_t)0x86eb, (q15_t)0x297a, (q15_t)0x86e9, (q15_t)0x2974,\n    (q15_t)0x86e7, (q15_t)0x296e, (q15_t)0x86e4, (q15_t)0x2968, (q15_t)0x86e2,\n    (q15_t)0x2962, (q15_t)0x86e0, (q15_t)0x295c, (q15_t)0x86de, (q15_t)0x2956,\n    (q15_t)0x86dc, (q15_t)0x2950, (q15_t)0x86da, (q15_t)0x294a, (q15_t)0x86d8,\n    (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x293e, (q15_t)0x86d4, (q15_t)0x2938,\n    (q15_t)0x86d2, (q15_t)0x2932, (q15_t)0x86d0, (q15_t)0x292c, (q15_t)0x86ce,\n    (q15_t)0x2926, (q15_t)0x86cc, (q15_t)0x2920, (q15_t)0x86ca, (q15_t)0x291b,\n    (q15_t)0x86c8, (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x290f, (q15_t)0x86c4,\n    (q15_t)0x2909, (q15_t)0x86c2, (q15_t)0x2903, (q15_t)0x86c0, (q15_t)0x28fd,\n    (q15_t)0x86be, (q15_t)0x28f7, (q15_t)0x86bc, (q15_t)0x28f1, (q15_t)0x86ba,\n    (q15_t)0x28eb, (q15_t)0x86b8, (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28df,\n    (q15_t)0x86b4, (q15_t)0x28d9, (q15_t)0x86b2, (q15_t)0x28d3, (q15_t)0x86b0,\n    (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28c7, (q15_t)0x86ac, (q15_t)0x28c1,\n    (q15_t)0x86aa, (q15_t)0x28bb, (q15_t)0x86a8, (q15_t)0x28b5, (q15_t)0x86a6,\n    (q15_t)0x28af, (q15_t)0x86a4, (q15_t)0x28a9, (q15_t)0x86a2, (q15_t)0x28a3,\n    (q15_t)0x86a0, (q15_t)0x289d, (q15_t)0x869e, (q15_t)0x2898, (q15_t)0x869c,\n    (q15_t)0x2892, (q15_t)0x869a, (q15_t)0x288c, (q15_t)0x8698, (q15_t)0x2886,\n    (q15_t)0x8696, (q15_t)0x2880, (q15_t)0x8694, (q15_t)0x287a, (q15_t)0x8692,\n    (q15_t)0x2874, (q15_t)0x8690, (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2868,\n    (q15_t)0x868c, (q15_t)0x2862, (q15_t)0x868a, (q15_t)0x285c, (q15_t)0x8688,\n    (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x2850, (q15_t)0x8684, (q15_t)0x284a,\n    (q15_t)0x8682, (q15_t)0x2844, (q15_t)0x8680, (q15_t)0x283e, (q15_t)0x867e,\n    (q15_t)0x2838, (q15_t)0x867c, (q15_t)0x2832, (q15_t)0x867a, (q15_t)0x282c,\n    (q15_t)0x8678, (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x2820, (q15_t)0x8674,\n    (q15_t)0x281a, (q15_t)0x8672, (q15_t)0x2814, (q15_t)0x8670, (q15_t)0x280e,\n    (q15_t)0x866e, (q15_t)0x2808, (q15_t)0x866d, (q15_t)0x2802, (q15_t)0x866b,\n    (q15_t)0x27fc, (q15_t)0x8669, (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27f1,\n    (q15_t)0x8665, (q15_t)0x27eb, (q15_t)0x8663, (q15_t)0x27e5, (q15_t)0x8661,\n    (q15_t)0x27df, (q15_t)0x865f, (q15_t)0x27d9, (q15_t)0x865d, (q15_t)0x27d3,\n    (q15_t)0x865b, (q15_t)0x27cd, (q15_t)0x8659, (q15_t)0x27c7, (q15_t)0x8657,\n    (q15_t)0x27c1, (q15_t)0x8655, (q15_t)0x27bb, (q15_t)0x8653, (q15_t)0x27b5,\n    (q15_t)0x8651, (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x27a9, (q15_t)0x864d,\n    (q15_t)0x27a3, (q15_t)0x864b, (q15_t)0x279d, (q15_t)0x8649, (q15_t)0x2797,\n    (q15_t)0x8647, (q15_t)0x2791, (q15_t)0x8645, (q15_t)0x278b, (q15_t)0x8644,\n    (q15_t)0x2785, (q15_t)0x8642, (q15_t)0x277f, (q15_t)0x8640, (q15_t)0x2779,\n    (q15_t)0x863e, (q15_t)0x2773, (q15_t)0x863c, (q15_t)0x276d, (q15_t)0x863a,\n    (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2761, (q15_t)0x8636, (q15_t)0x275b,\n    (q15_t)0x8634, (q15_t)0x2755, (q15_t)0x8632, (q15_t)0x274f, (q15_t)0x8630,\n    (q15_t)0x2749, (q15_t)0x862e, (q15_t)0x2743, (q15_t)0x862c, (q15_t)0x273d,\n    (q15_t)0x862a, (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x2731, (q15_t)0x8627,\n    (q15_t)0x272b, (q15_t)0x8625, (q15_t)0x2725, (q15_t)0x8623, (q15_t)0x271f,\n    (q15_t)0x8621, (q15_t)0x2719, (q15_t)0x861f, (q15_t)0x2713, (q15_t)0x861d,\n    (q15_t)0x270d, (q15_t)0x861b, (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x2701,\n    (q15_t)0x8617, (q15_t)0x26fb, (q15_t)0x8615, (q15_t)0x26f5, (q15_t)0x8613,\n    (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26e9, (q15_t)0x8610, (q15_t)0x26e4,\n    (q15_t)0x860e, (q15_t)0x26de, (q15_t)0x860c, (q15_t)0x26d8, (q15_t)0x860a,\n    (q15_t)0x26d2, (q15_t)0x8608, (q15_t)0x26cc, (q15_t)0x8606, (q15_t)0x26c6,\n    (q15_t)0x8604, (q15_t)0x26c0, (q15_t)0x8602, (q15_t)0x26ba, (q15_t)0x8600,\n    (q15_t)0x26b4, (q15_t)0x85fe, (q15_t)0x26ae, (q15_t)0x85fc, (q15_t)0x26a8,\n    (q15_t)0x85fb, (q15_t)0x26a2, (q15_t)0x85f9, (q15_t)0x269c, (q15_t)0x85f7,\n    (q15_t)0x2696, (q15_t)0x85f5, (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x268a,\n    (q15_t)0x85f1, (q15_t)0x2684, (q15_t)0x85ef, (q15_t)0x267e, (q15_t)0x85ed,\n    (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2672, (q15_t)0x85ea, (q15_t)0x266c,\n    (q15_t)0x85e8, (q15_t)0x2666, (q15_t)0x85e6, (q15_t)0x2660, (q15_t)0x85e4,\n    (q15_t)0x265a, (q15_t)0x85e2, (q15_t)0x2654, (q15_t)0x85e0, (q15_t)0x264e,\n    (q15_t)0x85de, (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2642, (q15_t)0x85da,\n    (q15_t)0x263c, (q15_t)0x85d9, (q15_t)0x2636, (q15_t)0x85d7, (q15_t)0x2630,\n    (q15_t)0x85d5, (q15_t)0x262a, (q15_t)0x85d3, (q15_t)0x2624, (q15_t)0x85d1,\n    (q15_t)0x261e, (q15_t)0x85cf, (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2612,\n    (q15_t)0x85cb, (q15_t)0x260c, (q15_t)0x85ca, (q15_t)0x2606, (q15_t)0x85c8,\n    (q15_t)0x2600, (q15_t)0x85c6, (q15_t)0x25fa, (q15_t)0x85c4, (q15_t)0x25f4,\n    (q15_t)0x85c2, (q15_t)0x25ee, (q15_t)0x85c0, (q15_t)0x25e8, (q15_t)0x85be,\n    (q15_t)0x25e2, (q15_t)0x85bd, (q15_t)0x25dc, (q15_t)0x85bb, (q15_t)0x25d6,\n    (q15_t)0x85b9, (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25ca, (q15_t)0x85b5,\n    (q15_t)0x25c4, (q15_t)0x85b3, (q15_t)0x25be, (q15_t)0x85b1, (q15_t)0x25b8,\n    (q15_t)0x85b0, (q15_t)0x25b2, (q15_t)0x85ae, (q15_t)0x25ac, (q15_t)0x85ac,\n    (q15_t)0x25a6, (q15_t)0x85aa, (q15_t)0x25a0, (q15_t)0x85a8, (q15_t)0x259a,\n    (q15_t)0x85a6, (q15_t)0x2594, (q15_t)0x85a4, (q15_t)0x258e, (q15_t)0x85a3,\n    (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2582, (q15_t)0x859f, (q15_t)0x257c,\n    (q15_t)0x859d, (q15_t)0x2576, (q15_t)0x859b, (q15_t)0x2570, (q15_t)0x8599,\n    (q15_t)0x256a, (q15_t)0x8598, (q15_t)0x2564, (q15_t)0x8596, (q15_t)0x255e,\n    (q15_t)0x8594, (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2552, (q15_t)0x8590,\n    (q15_t)0x254c, (q15_t)0x858e, (q15_t)0x2546, (q15_t)0x858d, (q15_t)0x2540,\n    (q15_t)0x858b, (q15_t)0x253a, (q15_t)0x8589, (q15_t)0x2534, (q15_t)0x8587,\n    (q15_t)0x252e, (q15_t)0x8585, (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x2522,\n    (q15_t)0x8582, (q15_t)0x251c, (q15_t)0x8580, (q15_t)0x2516, (q15_t)0x857e,\n    (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x2509, (q15_t)0x857a, (q15_t)0x2503,\n    (q15_t)0x8579, (q15_t)0x24fd, (q15_t)0x8577, (q15_t)0x24f7, (q15_t)0x8575,\n    (q15_t)0x24f1, (q15_t)0x8573, (q15_t)0x24eb, (q15_t)0x8571, (q15_t)0x24e5,\n    (q15_t)0x856f, (q15_t)0x24df, (q15_t)0x856e, (q15_t)0x24d9, (q15_t)0x856c,\n    (q15_t)0x24d3, (q15_t)0x856a, (q15_t)0x24cd, (q15_t)0x8568, (q15_t)0x24c7,\n    (q15_t)0x8566, (q15_t)0x24c1, (q15_t)0x8565, (q15_t)0x24bb, (q15_t)0x8563,\n    (q15_t)0x24b5, (q15_t)0x8561, (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x24a9,\n    (q15_t)0x855d, (q15_t)0x24a3, (q15_t)0x855c, (q15_t)0x249d, (q15_t)0x855a,\n    (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x2491, (q15_t)0x8556, (q15_t)0x248b,\n    (q15_t)0x8554, (q15_t)0x2485, (q15_t)0x8553, (q15_t)0x247f, (q15_t)0x8551,\n    (q15_t)0x2479, (q15_t)0x854f, (q15_t)0x2473, (q15_t)0x854d, (q15_t)0x246d,\n    (q15_t)0x854b, (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2461, (q15_t)0x8548,\n    (q15_t)0x245b, (q15_t)0x8546, (q15_t)0x2455, (q15_t)0x8544, (q15_t)0x244f,\n    (q15_t)0x8543, (q15_t)0x2449, (q15_t)0x8541, (q15_t)0x2443, (q15_t)0x853f,\n    (q15_t)0x243d, (q15_t)0x853d, (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x2431,\n    (q15_t)0x853a, (q15_t)0x242b, (q15_t)0x8538, (q15_t)0x2425, (q15_t)0x8536,\n    (q15_t)0x241f, (q15_t)0x8534, (q15_t)0x2419, (q15_t)0x8533, (q15_t)0x2413,\n    (q15_t)0x8531, (q15_t)0x240d, (q15_t)0x852f, (q15_t)0x2407, (q15_t)0x852d,\n    (q15_t)0x2401, (q15_t)0x852b, (q15_t)0x23fa, (q15_t)0x852a, (q15_t)0x23f4,\n    (q15_t)0x8528, (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23e8, (q15_t)0x8524,\n    (q15_t)0x23e2, (q15_t)0x8523, (q15_t)0x23dc, (q15_t)0x8521, (q15_t)0x23d6,\n    (q15_t)0x851f, (q15_t)0x23d0, (q15_t)0x851d, (q15_t)0x23ca, (q15_t)0x851c,\n    (q15_t)0x23c4, (q15_t)0x851a, (q15_t)0x23be, (q15_t)0x8518, (q15_t)0x23b8,\n    (q15_t)0x8516, (q15_t)0x23b2, (q15_t)0x8515, (q15_t)0x23ac, (q15_t)0x8513,\n    (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x23a0, (q15_t)0x850f, (q15_t)0x239a,\n    (q15_t)0x850e, (q15_t)0x2394, (q15_t)0x850c, (q15_t)0x238e, (q15_t)0x850a,\n    (q15_t)0x2388, (q15_t)0x8508, (q15_t)0x2382, (q15_t)0x8507, (q15_t)0x237c,\n    (q15_t)0x8505, (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x2370, (q15_t)0x8501,\n    (q15_t)0x236a, (q15_t)0x8500, (q15_t)0x2364, (q15_t)0x84fe, (q15_t)0x235e,\n    (q15_t)0x84fc, (q15_t)0x2358, (q15_t)0x84fa, (q15_t)0x2352, (q15_t)0x84f9,\n    (q15_t)0x234b, (q15_t)0x84f7, (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x233f,\n    (q15_t)0x84f4, (q15_t)0x2339, (q15_t)0x84f2, (q15_t)0x2333, (q15_t)0x84f0,\n    (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2327, (q15_t)0x84ed, (q15_t)0x2321,\n    (q15_t)0x84eb, (q15_t)0x231b, (q15_t)0x84e9, (q15_t)0x2315, (q15_t)0x84e7,\n    (q15_t)0x230f, (q15_t)0x84e6, (q15_t)0x2309, (q15_t)0x84e4, (q15_t)0x2303,\n    (q15_t)0x84e2, (q15_t)0x22fd, (q15_t)0x84e1, (q15_t)0x22f7, (q15_t)0x84df,\n    (q15_t)0x22f1, (q15_t)0x84dd, (q15_t)0x22eb, (q15_t)0x84db, (q15_t)0x22e5,\n    (q15_t)0x84da, (q15_t)0x22df, (q15_t)0x84d8, (q15_t)0x22d9, (q15_t)0x84d6,\n    (q15_t)0x22d3, (q15_t)0x84d5, (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22c7,\n    (q15_t)0x84d1, (q15_t)0x22c0, (q15_t)0x84cf, (q15_t)0x22ba, (q15_t)0x84ce,\n    (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x22ae, (q15_t)0x84ca, (q15_t)0x22a8,\n    (q15_t)0x84c9, (q15_t)0x22a2, (q15_t)0x84c7, (q15_t)0x229c, (q15_t)0x84c5,\n    (q15_t)0x2296, (q15_t)0x84c4, (q15_t)0x2290, (q15_t)0x84c2, (q15_t)0x228a,\n    (q15_t)0x84c0, (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x227e, (q15_t)0x84bd,\n    (q15_t)0x2278, (q15_t)0x84bb, (q15_t)0x2272, (q15_t)0x84b9, (q15_t)0x226c,\n    (q15_t)0x84b8, (q15_t)0x2266, (q15_t)0x84b6, (q15_t)0x2260, (q15_t)0x84b4,\n    (q15_t)0x225a, (q15_t)0x84b3, (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x224e,\n    (q15_t)0x84af, (q15_t)0x2247, (q15_t)0x84ae, (q15_t)0x2241, (q15_t)0x84ac,\n    (q15_t)0x223b, (q15_t)0x84aa, (q15_t)0x2235, (q15_t)0x84a9, (q15_t)0x222f,\n    (q15_t)0x84a7, (q15_t)0x2229, (q15_t)0x84a5, (q15_t)0x2223, (q15_t)0x84a3,\n    (q15_t)0x221d, (q15_t)0x84a2, (q15_t)0x2217, (q15_t)0x84a0, (q15_t)0x2211,\n    (q15_t)0x849e, (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x2205, (q15_t)0x849b,\n    (q15_t)0x21ff, (q15_t)0x8499, (q15_t)0x21f9, (q15_t)0x8498, (q15_t)0x21f3,\n    (q15_t)0x8496, (q15_t)0x21ed, (q15_t)0x8494, (q15_t)0x21e7, (q15_t)0x8493,\n    (q15_t)0x21e1, (q15_t)0x8491, (q15_t)0x21da, (q15_t)0x848f, (q15_t)0x21d4,\n    (q15_t)0x848e, (q15_t)0x21ce, (q15_t)0x848c, (q15_t)0x21c8, (q15_t)0x848a,\n    (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21bc, (q15_t)0x8487, (q15_t)0x21b6,\n    (q15_t)0x8486, (q15_t)0x21b0, (q15_t)0x8484, (q15_t)0x21aa, (q15_t)0x8482,\n    (q15_t)0x21a4, (q15_t)0x8481, (q15_t)0x219e, (q15_t)0x847f, (q15_t)0x2198,\n    (q15_t)0x847d, (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x218c, (q15_t)0x847a,\n    (q15_t)0x2186, (q15_t)0x8478, (q15_t)0x2180, (q15_t)0x8477, (q15_t)0x2179,\n    (q15_t)0x8475, (q15_t)0x2173, (q15_t)0x8473, (q15_t)0x216d, (q15_t)0x8472,\n    (q15_t)0x2167, (q15_t)0x8470, (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x215b,\n    (q15_t)0x846d, (q15_t)0x2155, (q15_t)0x846b, (q15_t)0x214f, (q15_t)0x846a,\n    (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2143, (q15_t)0x8466, (q15_t)0x213d,\n    (q15_t)0x8465, (q15_t)0x2137, (q15_t)0x8463, (q15_t)0x2131, (q15_t)0x8461,\n    (q15_t)0x212b, (q15_t)0x8460, (q15_t)0x2125, (q15_t)0x845e, (q15_t)0x211e,\n    (q15_t)0x845d, (q15_t)0x2118, (q15_t)0x845b, (q15_t)0x2112, (q15_t)0x8459,\n    (q15_t)0x210c, (q15_t)0x8458, (q15_t)0x2106, (q15_t)0x8456, (q15_t)0x2100,\n    (q15_t)0x8454, (q15_t)0x20fa, (q15_t)0x8453, (q15_t)0x20f4, (q15_t)0x8451,\n    (q15_t)0x20ee, (q15_t)0x8450, (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20e2,\n    (q15_t)0x844c, (q15_t)0x20dc, (q15_t)0x844b, (q15_t)0x20d6, (q15_t)0x8449,\n    (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20c9, (q15_t)0x8446, (q15_t)0x20c3,\n    (q15_t)0x8444, (q15_t)0x20bd, (q15_t)0x8443, (q15_t)0x20b7, (q15_t)0x8441,\n    (q15_t)0x20b1, (q15_t)0x843f, (q15_t)0x20ab, (q15_t)0x843e, (q15_t)0x20a5,\n    (q15_t)0x843c, (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2099, (q15_t)0x8439,\n    (q15_t)0x2093, (q15_t)0x8437, (q15_t)0x208d, (q15_t)0x8436, (q15_t)0x2087,\n    (q15_t)0x8434, (q15_t)0x2081, (q15_t)0x8433, (q15_t)0x207a, (q15_t)0x8431,\n    (q15_t)0x2074, (q15_t)0x842f, (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2068,\n    (q15_t)0x842c, (q15_t)0x2062, (q15_t)0x842b, (q15_t)0x205c, (q15_t)0x8429,\n    (q15_t)0x2056, (q15_t)0x8427, (q15_t)0x2050, (q15_t)0x8426, (q15_t)0x204a,\n    (q15_t)0x8424, (q15_t)0x2044, (q15_t)0x8423, (q15_t)0x203e, (q15_t)0x8421,\n    (q15_t)0x2038, (q15_t)0x8420, (q15_t)0x2032, (q15_t)0x841e, (q15_t)0x202b,\n    (q15_t)0x841c, (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x201f, (q15_t)0x8419,\n    (q15_t)0x2019, (q15_t)0x8418, (q15_t)0x2013, (q15_t)0x8416, (q15_t)0x200d,\n    (q15_t)0x8415, (q15_t)0x2007, (q15_t)0x8413, (q15_t)0x2001, (q15_t)0x8411,\n    (q15_t)0x1ffb, (q15_t)0x8410, (q15_t)0x1ff5, (q15_t)0x840e, (q15_t)0x1fef,\n    (q15_t)0x840d, (q15_t)0x1fe9, (q15_t)0x840b, (q15_t)0x1fe2, (q15_t)0x840a,\n    (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fd6, (q15_t)0x8406, (q15_t)0x1fd0,\n    (q15_t)0x8405, (q15_t)0x1fca, (q15_t)0x8403, (q15_t)0x1fc4, (q15_t)0x8402,\n    (q15_t)0x1fbe, (q15_t)0x8400, (q15_t)0x1fb8, (q15_t)0x83ff, (q15_t)0x1fb2,\n    (q15_t)0x83fd, (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1fa6, (q15_t)0x83fa,\n    (q15_t)0x1f9f, (q15_t)0x83f8, (q15_t)0x1f99, (q15_t)0x83f7, (q15_t)0x1f93,\n    (q15_t)0x83f5, (q15_t)0x1f8d, (q15_t)0x83f4, (q15_t)0x1f87, (q15_t)0x83f2,\n    (q15_t)0x1f81, (q15_t)0x83f1, (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f75,\n    (q15_t)0x83ee, (q15_t)0x1f6f, (q15_t)0x83ec, (q15_t)0x1f69, (q15_t)0x83ea,\n    (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f5d, (q15_t)0x83e7, (q15_t)0x1f56,\n    (q15_t)0x83e6, (q15_t)0x1f50, (q15_t)0x83e4, (q15_t)0x1f4a, (q15_t)0x83e3,\n    (q15_t)0x1f44, (q15_t)0x83e1, (q15_t)0x1f3e, (q15_t)0x83e0, (q15_t)0x1f38,\n    (q15_t)0x83de, (q15_t)0x1f32, (q15_t)0x83dd, (q15_t)0x1f2c, (q15_t)0x83db,\n    (q15_t)0x1f26, (q15_t)0x83da, (q15_t)0x1f20, (q15_t)0x83d8, (q15_t)0x1f19,\n    (q15_t)0x83d7, (q15_t)0x1f13, (q15_t)0x83d5, (q15_t)0x1f0d, (q15_t)0x83d3,\n    (q15_t)0x1f07, (q15_t)0x83d2, (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1efb,\n    (q15_t)0x83cf, (q15_t)0x1ef5, (q15_t)0x83cd, (q15_t)0x1eef, (q15_t)0x83cc,\n    (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ee3, (q15_t)0x83c9, (q15_t)0x1edd,\n    (q15_t)0x83c7, (q15_t)0x1ed6, (q15_t)0x83c6, (q15_t)0x1ed0, (q15_t)0x83c4,\n    (q15_t)0x1eca, (q15_t)0x83c3, (q15_t)0x1ec4, (q15_t)0x83c1, (q15_t)0x1ebe,\n    (q15_t)0x83c0, (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1eb2, (q15_t)0x83bd,\n    (q15_t)0x1eac, (q15_t)0x83bb, (q15_t)0x1ea6, (q15_t)0x83ba, (q15_t)0x1ea0,\n    (q15_t)0x83b8, (q15_t)0x1e99, (q15_t)0x83b7, (q15_t)0x1e93, (q15_t)0x83b5,\n    (q15_t)0x1e8d, (q15_t)0x83b4, (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e81,\n    (q15_t)0x83b1, (q15_t)0x1e7b, (q15_t)0x83af, (q15_t)0x1e75, (q15_t)0x83ae,\n    (q15_t)0x1e6f, (q15_t)0x83ac, (q15_t)0x1e69, (q15_t)0x83ab, (q15_t)0x1e62,\n    (q15_t)0x83a9, (q15_t)0x1e5c, (q15_t)0x83a8, (q15_t)0x1e56, (q15_t)0x83a6,\n    (q15_t)0x1e50, (q15_t)0x83a5, (q15_t)0x1e4a, (q15_t)0x83a3, (q15_t)0x1e44,\n    (q15_t)0x83a2, (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e38, (q15_t)0x839f,\n    (q15_t)0x1e32, (q15_t)0x839d, (q15_t)0x1e2c, (q15_t)0x839c, (q15_t)0x1e25,\n    (q15_t)0x839a, (q15_t)0x1e1f, (q15_t)0x8399, (q15_t)0x1e19, (q15_t)0x8397,\n    (q15_t)0x1e13, (q15_t)0x8396, (q15_t)0x1e0d, (q15_t)0x8394, (q15_t)0x1e07,\n    (q15_t)0x8393, (q15_t)0x1e01, (q15_t)0x8392, (q15_t)0x1dfb, (q15_t)0x8390,\n    (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1dee, (q15_t)0x838d, (q15_t)0x1de8,\n    (q15_t)0x838c, (q15_t)0x1de2, (q15_t)0x838a, (q15_t)0x1ddc, (q15_t)0x8389,\n    (q15_t)0x1dd6, (q15_t)0x8387, (q15_t)0x1dd0, (q15_t)0x8386, (q15_t)0x1dca,\n    (q15_t)0x8384, (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dbe, (q15_t)0x8381,\n    (q15_t)0x1db7, (q15_t)0x8380, (q15_t)0x1db1, (q15_t)0x837e, (q15_t)0x1dab,\n    (q15_t)0x837d, (q15_t)0x1da5, (q15_t)0x837c, (q15_t)0x1d9f, (q15_t)0x837a,\n    (q15_t)0x1d99, (q15_t)0x8379, (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d8d,\n    (q15_t)0x8376, (q15_t)0x1d87, (q15_t)0x8374, (q15_t)0x1d80, (q15_t)0x8373,\n    (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d74, (q15_t)0x8370, (q15_t)0x1d6e,\n    (q15_t)0x836f, (q15_t)0x1d68, (q15_t)0x836d, (q15_t)0x1d62, (q15_t)0x836c,\n    (q15_t)0x1d5c, (q15_t)0x836a, (q15_t)0x1d56, (q15_t)0x8369, (q15_t)0x1d50,\n    (q15_t)0x8367, (q15_t)0x1d49, (q15_t)0x8366, (q15_t)0x1d43, (q15_t)0x8364,\n    (q15_t)0x1d3d, (q15_t)0x8363, (q15_t)0x1d37, (q15_t)0x8362, (q15_t)0x1d31,\n    (q15_t)0x8360, (q15_t)0x1d2b, (q15_t)0x835f, (q15_t)0x1d25, (q15_t)0x835d,\n    (q15_t)0x1d1f, (q15_t)0x835c, (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d12,\n    (q15_t)0x8359, (q15_t)0x1d0c, (q15_t)0x8358, (q15_t)0x1d06, (q15_t)0x8356,\n    (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1cfa, (q15_t)0x8353, (q15_t)0x1cf4,\n    (q15_t)0x8352, (q15_t)0x1cee, (q15_t)0x8350, (q15_t)0x1ce8, (q15_t)0x834f,\n    (q15_t)0x1ce1, (q15_t)0x834e, (q15_t)0x1cdb, (q15_t)0x834c, (q15_t)0x1cd5,\n    (q15_t)0x834b, (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cc9, (q15_t)0x8348,\n    (q15_t)0x1cc3, (q15_t)0x8347, (q15_t)0x1cbd, (q15_t)0x8345, (q15_t)0x1cb7,\n    (q15_t)0x8344, (q15_t)0x1cb0, (q15_t)0x8342, (q15_t)0x1caa, (q15_t)0x8341,\n    (q15_t)0x1ca4, (q15_t)0x833f, (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c98,\n    (q15_t)0x833d, (q15_t)0x1c92, (q15_t)0x833b, (q15_t)0x1c8c, (q15_t)0x833a,\n    (q15_t)0x1c86, (q15_t)0x8338, (q15_t)0x1c7f, (q15_t)0x8337, (q15_t)0x1c79,\n    (q15_t)0x8336, (q15_t)0x1c73, (q15_t)0x8334, (q15_t)0x1c6d, (q15_t)0x8333,\n    (q15_t)0x1c67, (q15_t)0x8331, (q15_t)0x1c61, (q15_t)0x8330, (q15_t)0x1c5b,\n    (q15_t)0x832f, (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c4e, (q15_t)0x832c,\n    (q15_t)0x1c48, (q15_t)0x832b, (q15_t)0x1c42, (q15_t)0x8329, (q15_t)0x1c3c,\n    (q15_t)0x8328, (q15_t)0x1c36, (q15_t)0x8326, (q15_t)0x1c30, (q15_t)0x8325,\n    (q15_t)0x1c2a, (q15_t)0x8324, (q15_t)0x1c24, (q15_t)0x8322, (q15_t)0x1c1d,\n    (q15_t)0x8321, (q15_t)0x1c17, (q15_t)0x831f, (q15_t)0x1c11, (q15_t)0x831e,\n    (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1c05, (q15_t)0x831b, (q15_t)0x1bff,\n    (q15_t)0x831a, (q15_t)0x1bf9, (q15_t)0x8319, (q15_t)0x1bf2, (q15_t)0x8317,\n    (q15_t)0x1bec, (q15_t)0x8316, (q15_t)0x1be6, (q15_t)0x8314, (q15_t)0x1be0,\n    (q15_t)0x8313, (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bd4, (q15_t)0x8310,\n    (q15_t)0x1bce, (q15_t)0x830f, (q15_t)0x1bc8, (q15_t)0x830e, (q15_t)0x1bc1,\n    (q15_t)0x830c, (q15_t)0x1bbb, (q15_t)0x830b, (q15_t)0x1bb5, (q15_t)0x830a,\n    (q15_t)0x1baf, (q15_t)0x8308, (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1ba3,\n    (q15_t)0x8305, (q15_t)0x1b9d, (q15_t)0x8304, (q15_t)0x1b96, (q15_t)0x8303,\n    (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b8a, (q15_t)0x8300, (q15_t)0x1b84,\n    (q15_t)0x82ff, (q15_t)0x1b7e, (q15_t)0x82fd, (q15_t)0x1b78, (q15_t)0x82fc,\n    (q15_t)0x1b72, (q15_t)0x82fb, (q15_t)0x1b6c, (q15_t)0x82f9, (q15_t)0x1b65,\n    (q15_t)0x82f8, (q15_t)0x1b5f, (q15_t)0x82f7, (q15_t)0x1b59, (q15_t)0x82f5,\n    (q15_t)0x1b53, (q15_t)0x82f4, (q15_t)0x1b4d, (q15_t)0x82f3, (q15_t)0x1b47,\n    (q15_t)0x82f1, (q15_t)0x1b41, (q15_t)0x82f0, (q15_t)0x1b3a, (q15_t)0x82ef,\n    (q15_t)0x1b34, (q15_t)0x82ed, (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b28,\n    (q15_t)0x82eb, (q15_t)0x1b22, (q15_t)0x82e9, (q15_t)0x1b1c, (q15_t)0x82e8,\n    (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1b0f, (q15_t)0x82e5, (q15_t)0x1b09,\n    (q15_t)0x82e4, (q15_t)0x1b03, (q15_t)0x82e3, (q15_t)0x1afd, (q15_t)0x82e1,\n    (q15_t)0x1af7, (q15_t)0x82e0, (q15_t)0x1af1, (q15_t)0x82df, (q15_t)0x1aeb,\n    (q15_t)0x82dd, (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1ade, (q15_t)0x82db,\n    (q15_t)0x1ad8, (q15_t)0x82d9, (q15_t)0x1ad2, (q15_t)0x82d8, (q15_t)0x1acc,\n    (q15_t)0x82d7, (q15_t)0x1ac6, (q15_t)0x82d5, (q15_t)0x1ac0, (q15_t)0x82d4,\n    (q15_t)0x1ab9, (q15_t)0x82d3, (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1aad,\n    (q15_t)0x82d0, (q15_t)0x1aa7, (q15_t)0x82cf, (q15_t)0x1aa1, (q15_t)0x82ce,\n    (q15_t)0x1a9b, (q15_t)0x82cc, (q15_t)0x1a95, (q15_t)0x82cb, (q15_t)0x1a8e,\n    (q15_t)0x82ca, (q15_t)0x1a88, (q15_t)0x82c8, (q15_t)0x1a82, (q15_t)0x82c7,\n    (q15_t)0x1a7c, (q15_t)0x82c6, (q15_t)0x1a76, (q15_t)0x82c4, (q15_t)0x1a70,\n    (q15_t)0x82c3, (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a63, (q15_t)0x82c1,\n    (q15_t)0x1a5d, (q15_t)0x82bf, (q15_t)0x1a57, (q15_t)0x82be, (q15_t)0x1a51,\n    (q15_t)0x82bd, (q15_t)0x1a4b, (q15_t)0x82bb, (q15_t)0x1a45, (q15_t)0x82ba,\n    (q15_t)0x1a3e, (q15_t)0x82b9, (q15_t)0x1a38, (q15_t)0x82b7, (q15_t)0x1a32,\n    (q15_t)0x82b6, (q15_t)0x1a2c, (q15_t)0x82b5, (q15_t)0x1a26, (q15_t)0x82b4,\n    (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a1a, (q15_t)0x82b1, (q15_t)0x1a13,\n    (q15_t)0x82b0, (q15_t)0x1a0d, (q15_t)0x82ae, (q15_t)0x1a07, (q15_t)0x82ad,\n    (q15_t)0x1a01, (q15_t)0x82ac, (q15_t)0x19fb, (q15_t)0x82ab, (q15_t)0x19f5,\n    (q15_t)0x82a9, (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19e8, (q15_t)0x82a7,\n    (q15_t)0x19e2, (q15_t)0x82a6, (q15_t)0x19dc, (q15_t)0x82a4, (q15_t)0x19d6,\n    (q15_t)0x82a3, (q15_t)0x19d0, (q15_t)0x82a2, (q15_t)0x19ca, (q15_t)0x82a0,\n    (q15_t)0x19c3, (q15_t)0x829f, (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19b7,\n    (q15_t)0x829d, (q15_t)0x19b1, (q15_t)0x829b, (q15_t)0x19ab, (q15_t)0x829a,\n    (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x199f, (q15_t)0x8298, (q15_t)0x1998,\n    (q15_t)0x8296, (q15_t)0x1992, (q15_t)0x8295, (q15_t)0x198c, (q15_t)0x8294,\n    (q15_t)0x1986, (q15_t)0x8293, (q15_t)0x1980, (q15_t)0x8291, (q15_t)0x197a,\n    (q15_t)0x8290, (q15_t)0x1973, (q15_t)0x828f, (q15_t)0x196d, (q15_t)0x828e,\n    (q15_t)0x1967, (q15_t)0x828c, (q15_t)0x1961, (q15_t)0x828b, (q15_t)0x195b,\n    (q15_t)0x828a, (q15_t)0x1955, (q15_t)0x8289, (q15_t)0x194e, (q15_t)0x8287,\n    (q15_t)0x1948, (q15_t)0x8286, (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x193c,\n    (q15_t)0x8284, (q15_t)0x1936, (q15_t)0x8282, (q15_t)0x1930, (q15_t)0x8281,\n    (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1923, (q15_t)0x827f, (q15_t)0x191d,\n    (q15_t)0x827e, (q15_t)0x1917, (q15_t)0x827c, (q15_t)0x1911, (q15_t)0x827b,\n    (q15_t)0x190b, (q15_t)0x827a, (q15_t)0x1905, (q15_t)0x8279, (q15_t)0x18fe,\n    (q15_t)0x8277, (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18f2, (q15_t)0x8275,\n    (q15_t)0x18ec, (q15_t)0x8274, (q15_t)0x18e6, (q15_t)0x8272, (q15_t)0x18e0,\n    (q15_t)0x8271, (q15_t)0x18d9, (q15_t)0x8270, (q15_t)0x18d3, (q15_t)0x826f,\n    (q15_t)0x18cd, (q15_t)0x826e, (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18c1,\n    (q15_t)0x826b, (q15_t)0x18bb, (q15_t)0x826a, (q15_t)0x18b4, (q15_t)0x8269,\n    (q15_t)0x18ae, (q15_t)0x8268, (q15_t)0x18a8, (q15_t)0x8266, (q15_t)0x18a2,\n    (q15_t)0x8265, (q15_t)0x189c, (q15_t)0x8264, (q15_t)0x1896, (q15_t)0x8263,\n    (q15_t)0x188f, (q15_t)0x8261, (q15_t)0x1889, (q15_t)0x8260, (q15_t)0x1883,\n    (q15_t)0x825f, (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1877, (q15_t)0x825d,\n    (q15_t)0x1871, (q15_t)0x825b, (q15_t)0x186a, (q15_t)0x825a, (q15_t)0x1864,\n    (q15_t)0x8259, (q15_t)0x185e, (q15_t)0x8258, (q15_t)0x1858, (q15_t)0x8257,\n    (q15_t)0x1852, (q15_t)0x8255, (q15_t)0x184c, (q15_t)0x8254, (q15_t)0x1845,\n    (q15_t)0x8253, (q15_t)0x183f, (q15_t)0x8252, (q15_t)0x1839, (q15_t)0x8251,\n    (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x182d, (q15_t)0x824e, (q15_t)0x1827,\n    (q15_t)0x824d, (q15_t)0x1820, (q15_t)0x824c, (q15_t)0x181a, (q15_t)0x824b,\n    (q15_t)0x1814, (q15_t)0x824a, (q15_t)0x180e, (q15_t)0x8248, (q15_t)0x1808,\n    (q15_t)0x8247, (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17fb, (q15_t)0x8245,\n    (q15_t)0x17f5, (q15_t)0x8244, (q15_t)0x17ef, (q15_t)0x8243, (q15_t)0x17e9,\n    (q15_t)0x8241, (q15_t)0x17e3, (q15_t)0x8240, (q15_t)0x17dd, (q15_t)0x823f,\n    (q15_t)0x17d6, (q15_t)0x823e, (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17ca,\n    (q15_t)0x823b, (q15_t)0x17c4, (q15_t)0x823a, (q15_t)0x17be, (q15_t)0x8239,\n    (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x17b1, (q15_t)0x8237, (q15_t)0x17ab,\n    (q15_t)0x8236, (q15_t)0x17a5, (q15_t)0x8234, (q15_t)0x179f, (q15_t)0x8233,\n    (q15_t)0x1799, (q15_t)0x8232, (q15_t)0x1792, (q15_t)0x8231, (q15_t)0x178c,\n    (q15_t)0x8230, (q15_t)0x1786, (q15_t)0x822f, (q15_t)0x1780, (q15_t)0x822e,\n    (q15_t)0x177a, (q15_t)0x822c, (q15_t)0x1774, (q15_t)0x822b, (q15_t)0x176d,\n    (q15_t)0x822a, (q15_t)0x1767, (q15_t)0x8229, (q15_t)0x1761, (q15_t)0x8228,\n    (q15_t)0x175b, (q15_t)0x8227, (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x174e,\n    (q15_t)0x8224, (q15_t)0x1748, (q15_t)0x8223, (q15_t)0x1742, (q15_t)0x8222,\n    (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1736, (q15_t)0x8220, (q15_t)0x1730,\n    (q15_t)0x821f, (q15_t)0x1729, (q15_t)0x821e, (q15_t)0x1723, (q15_t)0x821c,\n    (q15_t)0x171d, (q15_t)0x821b, (q15_t)0x1717, (q15_t)0x821a, (q15_t)0x1711,\n    (q15_t)0x8219, (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x1704, (q15_t)0x8217,\n    (q15_t)0x16fe, (q15_t)0x8216, (q15_t)0x16f8, (q15_t)0x8214, (q15_t)0x16f2,\n    (q15_t)0x8213, (q15_t)0x16ec, (q15_t)0x8212, (q15_t)0x16e5, (q15_t)0x8211,\n    (q15_t)0x16df, (q15_t)0x8210, (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16d3,\n    (q15_t)0x820e, (q15_t)0x16cd, (q15_t)0x820d, (q15_t)0x16c6, (q15_t)0x820b,\n    (q15_t)0x16c0, (q15_t)0x820a, (q15_t)0x16ba, (q15_t)0x8209, (q15_t)0x16b4,\n    (q15_t)0x8208, (q15_t)0x16ae, (q15_t)0x8207, (q15_t)0x16a8, (q15_t)0x8206,\n    (q15_t)0x16a1, (q15_t)0x8205, (q15_t)0x169b, (q15_t)0x8204, (q15_t)0x1695,\n    (q15_t)0x8203, (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1689, (q15_t)0x8200,\n    (q15_t)0x1682, (q15_t)0x81ff, (q15_t)0x167c, (q15_t)0x81fe, (q15_t)0x1676,\n    (q15_t)0x81fd, (q15_t)0x1670, (q15_t)0x81fc, (q15_t)0x166a, (q15_t)0x81fb,\n    (q15_t)0x1664, (q15_t)0x81fa, (q15_t)0x165d, (q15_t)0x81f9, (q15_t)0x1657,\n    (q15_t)0x81f8, (q15_t)0x1651, (q15_t)0x81f6, (q15_t)0x164b, (q15_t)0x81f5,\n    (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x163e, (q15_t)0x81f3, (q15_t)0x1638,\n    (q15_t)0x81f2, (q15_t)0x1632, (q15_t)0x81f1, (q15_t)0x162c, (q15_t)0x81f0,\n    (q15_t)0x1626, (q15_t)0x81ef, (q15_t)0x161f, (q15_t)0x81ee, (q15_t)0x1619,\n    (q15_t)0x81ed, (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x160d, (q15_t)0x81ea,\n    (q15_t)0x1607, (q15_t)0x81e9, (q15_t)0x1601, (q15_t)0x81e8, (q15_t)0x15fa,\n    (q15_t)0x81e7, (q15_t)0x15f4, (q15_t)0x81e6, (q15_t)0x15ee, (q15_t)0x81e5,\n    (q15_t)0x15e8, (q15_t)0x81e4, (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15db,\n    (q15_t)0x81e2, (q15_t)0x15d5, (q15_t)0x81e1, (q15_t)0x15cf, (q15_t)0x81e0,\n    (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15c3, (q15_t)0x81de, (q15_t)0x15bc,\n    (q15_t)0x81dc, (q15_t)0x15b6, (q15_t)0x81db, (q15_t)0x15b0, (q15_t)0x81da,\n    (q15_t)0x15aa, (q15_t)0x81d9, (q15_t)0x15a4, (q15_t)0x81d8, (q15_t)0x159d,\n    (q15_t)0x81d7, (q15_t)0x1597, (q15_t)0x81d6, (q15_t)0x1591, (q15_t)0x81d5,\n    (q15_t)0x158b, (q15_t)0x81d4, (q15_t)0x1585, (q15_t)0x81d3, (q15_t)0x157f,\n    (q15_t)0x81d2, (q15_t)0x1578, (q15_t)0x81d1, (q15_t)0x1572, (q15_t)0x81d0,\n    (q15_t)0x156c, (q15_t)0x81cf, (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x1560,\n    (q15_t)0x81cd, (q15_t)0x1559, (q15_t)0x81cc, (q15_t)0x1553, (q15_t)0x81cb,\n    (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1547, (q15_t)0x81c8, (q15_t)0x1541,\n    (q15_t)0x81c7, (q15_t)0x153a, (q15_t)0x81c6, (q15_t)0x1534, (q15_t)0x81c5,\n    (q15_t)0x152e, (q15_t)0x81c4, (q15_t)0x1528, (q15_t)0x81c3, (q15_t)0x1522,\n    (q15_t)0x81c2, (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1515, (q15_t)0x81c0,\n    (q15_t)0x150f, (q15_t)0x81bf, (q15_t)0x1509, (q15_t)0x81be, (q15_t)0x1503,\n    (q15_t)0x81bd, (q15_t)0x14fc, (q15_t)0x81bc, (q15_t)0x14f6, (q15_t)0x81bb,\n    (q15_t)0x14f0, (q15_t)0x81ba, (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14e4,\n    (q15_t)0x81b8, (q15_t)0x14dd, (q15_t)0x81b7, (q15_t)0x14d7, (q15_t)0x81b6,\n    (q15_t)0x14d1, (q15_t)0x81b5, (q15_t)0x14cb, (q15_t)0x81b4, (q15_t)0x14c5,\n    (q15_t)0x81b3, (q15_t)0x14be, (q15_t)0x81b2, (q15_t)0x14b8, (q15_t)0x81b1,\n    (q15_t)0x14b2, (q15_t)0x81b0, (q15_t)0x14ac, (q15_t)0x81af, (q15_t)0x14a6,\n    (q15_t)0x81ae, (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1499, (q15_t)0x81ac,\n    (q15_t)0x1493, (q15_t)0x81ab, (q15_t)0x148d, (q15_t)0x81aa, (q15_t)0x1487,\n    (q15_t)0x81a9, (q15_t)0x1480, (q15_t)0x81a8, (q15_t)0x147a, (q15_t)0x81a7,\n    (q15_t)0x1474, (q15_t)0x81a6, (q15_t)0x146e, (q15_t)0x81a5, (q15_t)0x1468,\n    (q15_t)0x81a4, (q15_t)0x1461, (q15_t)0x81a3, (q15_t)0x145b, (q15_t)0x81a2,\n    (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x144f, (q15_t)0x81a0, (q15_t)0x1449,\n    (q15_t)0x819f, (q15_t)0x1442, (q15_t)0x819e, (q15_t)0x143c, (q15_t)0x819d,\n    (q15_t)0x1436, (q15_t)0x819c, (q15_t)0x1430, (q15_t)0x819b, (q15_t)0x142a,\n    (q15_t)0x819a, (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x141d, (q15_t)0x8198,\n    (q15_t)0x1417, (q15_t)0x8197, (q15_t)0x1411, (q15_t)0x8196, (q15_t)0x140b,\n    (q15_t)0x8195, (q15_t)0x1404, (q15_t)0x8194, (q15_t)0x13fe, (q15_t)0x8193,\n    (q15_t)0x13f8, (q15_t)0x8192, (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13eb,\n    (q15_t)0x8190, (q15_t)0x13e5, (q15_t)0x818f, (q15_t)0x13df, (q15_t)0x818e,\n    (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13d3, (q15_t)0x818c, (q15_t)0x13cc,\n    (q15_t)0x818b, (q15_t)0x13c6, (q15_t)0x818a, (q15_t)0x13c0, (q15_t)0x8189,\n    (q15_t)0x13ba, (q15_t)0x8188, (q15_t)0x13b4, (q15_t)0x8187, (q15_t)0x13ad,\n    (q15_t)0x8186, (q15_t)0x13a7, (q15_t)0x8185, (q15_t)0x13a1, (q15_t)0x8184,\n    (q15_t)0x139b, (q15_t)0x8183, (q15_t)0x1395, (q15_t)0x8182, (q15_t)0x138e,\n    (q15_t)0x8181, (q15_t)0x1388, (q15_t)0x8180, (q15_t)0x1382, (q15_t)0x817f,\n    (q15_t)0x137c, (q15_t)0x817e, (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x136f,\n    (q15_t)0x817c, (q15_t)0x1369, (q15_t)0x817c, (q15_t)0x1363, (q15_t)0x817b,\n    (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1356, (q15_t)0x8179, (q15_t)0x1350,\n    (q15_t)0x8178, (q15_t)0x134a, (q15_t)0x8177, (q15_t)0x1344, (q15_t)0x8176,\n    (q15_t)0x133e, (q15_t)0x8175, (q15_t)0x1337, (q15_t)0x8174, (q15_t)0x1331,\n    (q15_t)0x8173, (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1325, (q15_t)0x8171,\n    (q15_t)0x131f, (q15_t)0x8170, (q15_t)0x1318, (q15_t)0x816f, (q15_t)0x1312,\n    (q15_t)0x816e, (q15_t)0x130c, (q15_t)0x816d, (q15_t)0x1306, (q15_t)0x816c,\n    (q15_t)0x12ff, (q15_t)0x816c, (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12f3,\n    (q15_t)0x816a, (q15_t)0x12ed, (q15_t)0x8169, (q15_t)0x12e7, (q15_t)0x8168,\n    (q15_t)0x12e0, (q15_t)0x8167, (q15_t)0x12da, (q15_t)0x8166, (q15_t)0x12d4,\n    (q15_t)0x8165, (q15_t)0x12ce, (q15_t)0x8164, (q15_t)0x12c8, (q15_t)0x8163,\n    (q15_t)0x12c1, (q15_t)0x8162, (q15_t)0x12bb, (q15_t)0x8161, (q15_t)0x12b5,\n    (q15_t)0x8160, (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x12a8, (q15_t)0x815f,\n    (q15_t)0x12a2, (q15_t)0x815e, (q15_t)0x129c, (q15_t)0x815d, (q15_t)0x1296,\n    (q15_t)0x815c, (q15_t)0x1290, (q15_t)0x815b, (q15_t)0x1289, (q15_t)0x815a,\n    (q15_t)0x1283, (q15_t)0x8159, (q15_t)0x127d, (q15_t)0x8158, (q15_t)0x1277,\n    (q15_t)0x8157, (q15_t)0x1271, (q15_t)0x8156, (q15_t)0x126a, (q15_t)0x8155,\n    (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x125e, (q15_t)0x8154, (q15_t)0x1258,\n    (q15_t)0x8153, (q15_t)0x1251, (q15_t)0x8152, (q15_t)0x124b, (q15_t)0x8151,\n    (q15_t)0x1245, (q15_t)0x8150, (q15_t)0x123f, (q15_t)0x814f, (q15_t)0x1239,\n    (q15_t)0x814e, (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x122c, (q15_t)0x814c,\n    (q15_t)0x1226, (q15_t)0x814c, (q15_t)0x1220, (q15_t)0x814b, (q15_t)0x1219,\n    (q15_t)0x814a, (q15_t)0x1213, (q15_t)0x8149, (q15_t)0x120d, (q15_t)0x8148,\n    (q15_t)0x1207, (q15_t)0x8147, (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11fa,\n    (q15_t)0x8145, (q15_t)0x11f4, (q15_t)0x8145, (q15_t)0x11ee, (q15_t)0x8144,\n    (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11e1, (q15_t)0x8142, (q15_t)0x11db,\n    (q15_t)0x8141, (q15_t)0x11d5, (q15_t)0x8140, (q15_t)0x11cf, (q15_t)0x813f,\n    (q15_t)0x11c9, (q15_t)0x813e, (q15_t)0x11c2, (q15_t)0x813d, (q15_t)0x11bc,\n    (q15_t)0x813d, (q15_t)0x11b6, (q15_t)0x813c, (q15_t)0x11b0, (q15_t)0x813b,\n    (q15_t)0x11a9, (q15_t)0x813a, (q15_t)0x11a3, (q15_t)0x8139, (q15_t)0x119d,\n    (q15_t)0x8138, (q15_t)0x1197, (q15_t)0x8137, (q15_t)0x1191, (q15_t)0x8137,\n    (q15_t)0x118a, (q15_t)0x8136, (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x117e,\n    (q15_t)0x8134, (q15_t)0x1178, (q15_t)0x8133, (q15_t)0x1171, (q15_t)0x8132,\n    (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1165, (q15_t)0x8131, (q15_t)0x115f,\n    (q15_t)0x8130, (q15_t)0x1159, (q15_t)0x812f, (q15_t)0x1152, (q15_t)0x812e,\n    (q15_t)0x114c, (q15_t)0x812d, (q15_t)0x1146, (q15_t)0x812c, (q15_t)0x1140,\n    (q15_t)0x812b, (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1133, (q15_t)0x812a,\n    (q15_t)0x112d, (q15_t)0x8129, (q15_t)0x1127, (q15_t)0x8128, (q15_t)0x1121,\n    (q15_t)0x8127, (q15_t)0x111a, (q15_t)0x8126, (q15_t)0x1114, (q15_t)0x8126,\n    (q15_t)0x110e, (q15_t)0x8125, (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x1101,\n    (q15_t)0x8123, (q15_t)0x10fb, (q15_t)0x8122, (q15_t)0x10f5, (q15_t)0x8121,\n    (q15_t)0x10ef, (q15_t)0x8121, (q15_t)0x10e8, (q15_t)0x8120, (q15_t)0x10e2,\n    (q15_t)0x811f, (q15_t)0x10dc, (q15_t)0x811e, (q15_t)0x10d6, (q15_t)0x811d,\n    (q15_t)0x10d0, (q15_t)0x811c, (q15_t)0x10c9, (q15_t)0x811c, (q15_t)0x10c3,\n    (q15_t)0x811b, (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10b7, (q15_t)0x8119,\n    (q15_t)0x10b0, (q15_t)0x8118, (q15_t)0x10aa, (q15_t)0x8117, (q15_t)0x10a4,\n    (q15_t)0x8117, (q15_t)0x109e, (q15_t)0x8116, (q15_t)0x1098, (q15_t)0x8115,\n    (q15_t)0x1091, (q15_t)0x8114, (q15_t)0x108b, (q15_t)0x8113, (q15_t)0x1085,\n    (q15_t)0x8113, (q15_t)0x107f, (q15_t)0x8112, (q15_t)0x1078, (q15_t)0x8111,\n    (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x106c, (q15_t)0x810f, (q15_t)0x1066,\n    (q15_t)0x810f, (q15_t)0x105f, (q15_t)0x810e, (q15_t)0x1059, (q15_t)0x810d,\n    (q15_t)0x1053, (q15_t)0x810c, (q15_t)0x104d, (q15_t)0x810b, (q15_t)0x1047,\n    (q15_t)0x810b, (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x103a, (q15_t)0x8109,\n    (q15_t)0x1034, (q15_t)0x8108, (q15_t)0x102e, (q15_t)0x8107, (q15_t)0x1027,\n    (q15_t)0x8107, (q15_t)0x1021, (q15_t)0x8106, (q15_t)0x101b, (q15_t)0x8105,\n    (q15_t)0x1015, (q15_t)0x8104, (q15_t)0x100e, (q15_t)0x8103, (q15_t)0x1008,\n    (q15_t)0x8103, (q15_t)0x1002, (q15_t)0x8102, (q15_t)0xffc,  (q15_t)0x8101,\n    (q15_t)0xff5,  (q15_t)0x8100, (q15_t)0xfef,  (q15_t)0x80ff, (q15_t)0xfe9,\n    (q15_t)0x80ff, (q15_t)0xfe3,  (q15_t)0x80fe, (q15_t)0xfdd,  (q15_t)0x80fd,\n    (q15_t)0xfd6,  (q15_t)0x80fc, (q15_t)0xfd0,  (q15_t)0x80fc, (q15_t)0xfca,\n    (q15_t)0x80fb, (q15_t)0xfc4,  (q15_t)0x80fa, (q15_t)0xfbd,  (q15_t)0x80f9,\n    (q15_t)0xfb7,  (q15_t)0x80f8, (q15_t)0xfb1,  (q15_t)0x80f8, (q15_t)0xfab,\n    (q15_t)0x80f7, (q15_t)0xfa4,  (q15_t)0x80f6, (q15_t)0xf9e,  (q15_t)0x80f5,\n    (q15_t)0xf98,  (q15_t)0x80f5, (q15_t)0xf92,  (q15_t)0x80f4, (q15_t)0xf8b,\n    (q15_t)0x80f3, (q15_t)0xf85,  (q15_t)0x80f2, (q15_t)0xf7f,  (q15_t)0x80f2,\n    (q15_t)0xf79,  (q15_t)0x80f1, (q15_t)0xf73,  (q15_t)0x80f0, (q15_t)0xf6c,\n    (q15_t)0x80ef, (q15_t)0xf66,  (q15_t)0x80ef, (q15_t)0xf60,  (q15_t)0x80ee,\n    (q15_t)0xf5a,  (q15_t)0x80ed, (q15_t)0xf53,  (q15_t)0x80ec, (q15_t)0xf4d,\n    (q15_t)0x80ec, (q15_t)0xf47,  (q15_t)0x80eb, (q15_t)0xf41,  (q15_t)0x80ea,\n    (q15_t)0xf3a,  (q15_t)0x80e9, (q15_t)0xf34,  (q15_t)0x80e9, (q15_t)0xf2e,\n    (q15_t)0x80e8, (q15_t)0xf28,  (q15_t)0x80e7, (q15_t)0xf21,  (q15_t)0x80e6,\n    (q15_t)0xf1b,  (q15_t)0x80e6, (q15_t)0xf15,  (q15_t)0x80e5, (q15_t)0xf0f,\n    (q15_t)0x80e4, (q15_t)0xf08,  (q15_t)0x80e3, (q15_t)0xf02,  (q15_t)0x80e3,\n    (q15_t)0xefc,  (q15_t)0x80e2, (q15_t)0xef6,  (q15_t)0x80e1, (q15_t)0xef0,\n    (q15_t)0x80e0, (q15_t)0xee9,  (q15_t)0x80e0, (q15_t)0xee3,  (q15_t)0x80df,\n    (q15_t)0xedd,  (q15_t)0x80de, (q15_t)0xed7,  (q15_t)0x80dd, (q15_t)0xed0,\n    (q15_t)0x80dd, (q15_t)0xeca,  (q15_t)0x80dc, (q15_t)0xec4,  (q15_t)0x80db,\n    (q15_t)0xebe,  (q15_t)0x80db, (q15_t)0xeb7,  (q15_t)0x80da, (q15_t)0xeb1,\n    (q15_t)0x80d9, (q15_t)0xeab,  (q15_t)0x80d8, (q15_t)0xea5,  (q15_t)0x80d8,\n    (q15_t)0xe9e,  (q15_t)0x80d7, (q15_t)0xe98,  (q15_t)0x80d6, (q15_t)0xe92,\n    (q15_t)0x80d6, (q15_t)0xe8c,  (q15_t)0x80d5, (q15_t)0xe85,  (q15_t)0x80d4,\n    (q15_t)0xe7f,  (q15_t)0x80d3, (q15_t)0xe79,  (q15_t)0x80d3, (q15_t)0xe73,\n    (q15_t)0x80d2, (q15_t)0xe6c,  (q15_t)0x80d1, (q15_t)0xe66,  (q15_t)0x80d1,\n    (q15_t)0xe60,  (q15_t)0x80d0, (q15_t)0xe5a,  (q15_t)0x80cf, (q15_t)0xe53,\n    (q15_t)0x80ce, (q15_t)0xe4d,  (q15_t)0x80ce, (q15_t)0xe47,  (q15_t)0x80cd,\n    (q15_t)0xe41,  (q15_t)0x80cc, (q15_t)0xe3a,  (q15_t)0x80cc, (q15_t)0xe34,\n    (q15_t)0x80cb, (q15_t)0xe2e,  (q15_t)0x80ca, (q15_t)0xe28,  (q15_t)0x80ca,\n    (q15_t)0xe22,  (q15_t)0x80c9, (q15_t)0xe1b,  (q15_t)0x80c8, (q15_t)0xe15,\n    (q15_t)0x80c7, (q15_t)0xe0f,  (q15_t)0x80c7, (q15_t)0xe09,  (q15_t)0x80c6,\n    (q15_t)0xe02,  (q15_t)0x80c5, (q15_t)0xdfc,  (q15_t)0x80c5, (q15_t)0xdf6,\n    (q15_t)0x80c4, (q15_t)0xdf0,  (q15_t)0x80c3, (q15_t)0xde9,  (q15_t)0x80c3,\n    (q15_t)0xde3,  (q15_t)0x80c2, (q15_t)0xddd,  (q15_t)0x80c1, (q15_t)0xdd7,\n    (q15_t)0x80c1, (q15_t)0xdd0,  (q15_t)0x80c0, (q15_t)0xdca,  (q15_t)0x80bf,\n    (q15_t)0xdc4,  (q15_t)0x80bf, (q15_t)0xdbe,  (q15_t)0x80be, (q15_t)0xdb7,\n    (q15_t)0x80bd, (q15_t)0xdb1,  (q15_t)0x80bd, (q15_t)0xdab,  (q15_t)0x80bc,\n    (q15_t)0xda5,  (q15_t)0x80bb, (q15_t)0xd9e,  (q15_t)0x80bb, (q15_t)0xd98,\n    (q15_t)0x80ba, (q15_t)0xd92,  (q15_t)0x80b9, (q15_t)0xd8c,  (q15_t)0x80b9,\n    (q15_t)0xd85,  (q15_t)0x80b8, (q15_t)0xd7f,  (q15_t)0x80b7, (q15_t)0xd79,\n    (q15_t)0x80b7, (q15_t)0xd73,  (q15_t)0x80b6, (q15_t)0xd6c,  (q15_t)0x80b5,\n    (q15_t)0xd66,  (q15_t)0x80b5, (q15_t)0xd60,  (q15_t)0x80b4, (q15_t)0xd5a,\n    (q15_t)0x80b3, (q15_t)0xd53,  (q15_t)0x80b3, (q15_t)0xd4d,  (q15_t)0x80b2,\n    (q15_t)0xd47,  (q15_t)0x80b1, (q15_t)0xd41,  (q15_t)0x80b1, (q15_t)0xd3a,\n    (q15_t)0x80b0, (q15_t)0xd34,  (q15_t)0x80af, (q15_t)0xd2e,  (q15_t)0x80af,\n    (q15_t)0xd28,  (q15_t)0x80ae, (q15_t)0xd21,  (q15_t)0x80ad, (q15_t)0xd1b,\n    (q15_t)0x80ad, (q15_t)0xd15,  (q15_t)0x80ac, (q15_t)0xd0f,  (q15_t)0x80ab,\n    (q15_t)0xd08,  (q15_t)0x80ab, (q15_t)0xd02,  (q15_t)0x80aa, (q15_t)0xcfc,\n    (q15_t)0x80aa, (q15_t)0xcf6,  (q15_t)0x80a9, (q15_t)0xcef,  (q15_t)0x80a8,\n    (q15_t)0xce9,  (q15_t)0x80a8, (q15_t)0xce3,  (q15_t)0x80a7, (q15_t)0xcdd,\n    (q15_t)0x80a6, (q15_t)0xcd6,  (q15_t)0x80a6, (q15_t)0xcd0,  (q15_t)0x80a5,\n    (q15_t)0xcca,  (q15_t)0x80a5, (q15_t)0xcc4,  (q15_t)0x80a4, (q15_t)0xcbd,\n    (q15_t)0x80a3, (q15_t)0xcb7,  (q15_t)0x80a3, (q15_t)0xcb1,  (q15_t)0x80a2,\n    (q15_t)0xcab,  (q15_t)0x80a1, (q15_t)0xca4,  (q15_t)0x80a1, (q15_t)0xc9e,\n    (q15_t)0x80a0, (q15_t)0xc98,  (q15_t)0x80a0, (q15_t)0xc92,  (q15_t)0x809f,\n    (q15_t)0xc8b,  (q15_t)0x809e, (q15_t)0xc85,  (q15_t)0x809e, (q15_t)0xc7f,\n    (q15_t)0x809d, (q15_t)0xc79,  (q15_t)0x809c, (q15_t)0xc72,  (q15_t)0x809c,\n    (q15_t)0xc6c,  (q15_t)0x809b, (q15_t)0xc66,  (q15_t)0x809b, (q15_t)0xc60,\n    (q15_t)0x809a, (q15_t)0xc59,  (q15_t)0x8099, (q15_t)0xc53,  (q15_t)0x8099,\n    (q15_t)0xc4d,  (q15_t)0x8098, (q15_t)0xc47,  (q15_t)0x8098, (q15_t)0xc40,\n    (q15_t)0x8097, (q15_t)0xc3a,  (q15_t)0x8096, (q15_t)0xc34,  (q15_t)0x8096,\n    (q15_t)0xc2e,  (q15_t)0x8095, (q15_t)0xc27,  (q15_t)0x8095, (q15_t)0xc21,\n    (q15_t)0x8094, (q15_t)0xc1b,  (q15_t)0x8093, (q15_t)0xc14,  (q15_t)0x8093,\n    (q15_t)0xc0e,  (q15_t)0x8092, (q15_t)0xc08,  (q15_t)0x8092, (q15_t)0xc02,\n    (q15_t)0x8091, (q15_t)0xbfb,  (q15_t)0x8090, (q15_t)0xbf5,  (q15_t)0x8090,\n    (q15_t)0xbef,  (q15_t)0x808f, (q15_t)0xbe9,  (q15_t)0x808f, (q15_t)0xbe2,\n    (q15_t)0x808e, (q15_t)0xbdc,  (q15_t)0x808e, (q15_t)0xbd6,  (q15_t)0x808d,\n    (q15_t)0xbd0,  (q15_t)0x808c, (q15_t)0xbc9,  (q15_t)0x808c, (q15_t)0xbc3,\n    (q15_t)0x808b, (q15_t)0xbbd,  (q15_t)0x808b, (q15_t)0xbb7,  (q15_t)0x808a,\n    (q15_t)0xbb0,  (q15_t)0x8089, (q15_t)0xbaa,  (q15_t)0x8089, (q15_t)0xba4,\n    (q15_t)0x8088, (q15_t)0xb9e,  (q15_t)0x8088, (q15_t)0xb97,  (q15_t)0x8087,\n    (q15_t)0xb91,  (q15_t)0x8087, (q15_t)0xb8b,  (q15_t)0x8086, (q15_t)0xb85,\n    (q15_t)0x8085, (q15_t)0xb7e,  (q15_t)0x8085, (q15_t)0xb78,  (q15_t)0x8084,\n    (q15_t)0xb72,  (q15_t)0x8084, (q15_t)0xb6c,  (q15_t)0x8083, (q15_t)0xb65,\n    (q15_t)0x8083, (q15_t)0xb5f,  (q15_t)0x8082, (q15_t)0xb59,  (q15_t)0x8082,\n    (q15_t)0xb53,  (q15_t)0x8081, (q15_t)0xb4c,  (q15_t)0x8080, (q15_t)0xb46,\n    (q15_t)0x8080, (q15_t)0xb40,  (q15_t)0x807f, (q15_t)0xb3a,  (q15_t)0x807f,\n    (q15_t)0xb33,  (q15_t)0x807e, (q15_t)0xb2d,  (q15_t)0x807e, (q15_t)0xb27,\n    (q15_t)0x807d, (q15_t)0xb20,  (q15_t)0x807d, (q15_t)0xb1a,  (q15_t)0x807c,\n    (q15_t)0xb14,  (q15_t)0x807b, (q15_t)0xb0e,  (q15_t)0x807b, (q15_t)0xb07,\n    (q15_t)0x807a, (q15_t)0xb01,  (q15_t)0x807a, (q15_t)0xafb,  (q15_t)0x8079,\n    (q15_t)0xaf5,  (q15_t)0x8079, (q15_t)0xaee,  (q15_t)0x8078, (q15_t)0xae8,\n    (q15_t)0x8078, (q15_t)0xae2,  (q15_t)0x8077, (q15_t)0xadc,  (q15_t)0x8077,\n    (q15_t)0xad5,  (q15_t)0x8076, (q15_t)0xacf,  (q15_t)0x8076, (q15_t)0xac9,\n    (q15_t)0x8075, (q15_t)0xac3,  (q15_t)0x8075, (q15_t)0xabc,  (q15_t)0x8074,\n    (q15_t)0xab6,  (q15_t)0x8073, (q15_t)0xab0,  (q15_t)0x8073, (q15_t)0xaaa,\n    (q15_t)0x8072, (q15_t)0xaa3,  (q15_t)0x8072, (q15_t)0xa9d,  (q15_t)0x8071,\n    (q15_t)0xa97,  (q15_t)0x8071, (q15_t)0xa90,  (q15_t)0x8070, (q15_t)0xa8a,\n    (q15_t)0x8070, (q15_t)0xa84,  (q15_t)0x806f, (q15_t)0xa7e,  (q15_t)0x806f,\n    (q15_t)0xa77,  (q15_t)0x806e, (q15_t)0xa71,  (q15_t)0x806e, (q15_t)0xa6b,\n    (q15_t)0x806d, (q15_t)0xa65,  (q15_t)0x806d, (q15_t)0xa5e,  (q15_t)0x806c,\n    (q15_t)0xa58,  (q15_t)0x806c, (q15_t)0xa52,  (q15_t)0x806b, (q15_t)0xa4c,\n    (q15_t)0x806b, (q15_t)0xa45,  (q15_t)0x806a, (q15_t)0xa3f,  (q15_t)0x806a,\n    (q15_t)0xa39,  (q15_t)0x8069, (q15_t)0xa33,  (q15_t)0x8069, (q15_t)0xa2c,\n    (q15_t)0x8068, (q15_t)0xa26,  (q15_t)0x8068, (q15_t)0xa20,  (q15_t)0x8067,\n    (q15_t)0xa19,  (q15_t)0x8067, (q15_t)0xa13,  (q15_t)0x8066, (q15_t)0xa0d,\n    (q15_t)0x8066, (q15_t)0xa07,  (q15_t)0x8065, (q15_t)0xa00,  (q15_t)0x8065,\n    (q15_t)0x9fa,  (q15_t)0x8064, (q15_t)0x9f4,  (q15_t)0x8064, (q15_t)0x9ee,\n    (q15_t)0x8063, (q15_t)0x9e7,  (q15_t)0x8063, (q15_t)0x9e1,  (q15_t)0x8062,\n    (q15_t)0x9db,  (q15_t)0x8062, (q15_t)0x9d5,  (q15_t)0x8061, (q15_t)0x9ce,\n    (q15_t)0x8061, (q15_t)0x9c8,  (q15_t)0x8060, (q15_t)0x9c2,  (q15_t)0x8060,\n    (q15_t)0x9bc,  (q15_t)0x805f, (q15_t)0x9b5,  (q15_t)0x805f, (q15_t)0x9af,\n    (q15_t)0x805e, (q15_t)0x9a9,  (q15_t)0x805e, (q15_t)0x9a2,  (q15_t)0x805d,\n    (q15_t)0x99c,  (q15_t)0x805d, (q15_t)0x996,  (q15_t)0x805d, (q15_t)0x990,\n    (q15_t)0x805c, (q15_t)0x989,  (q15_t)0x805c, (q15_t)0x983,  (q15_t)0x805b,\n    (q15_t)0x97d,  (q15_t)0x805b, (q15_t)0x977,  (q15_t)0x805a, (q15_t)0x970,\n    (q15_t)0x805a, (q15_t)0x96a,  (q15_t)0x8059, (q15_t)0x964,  (q15_t)0x8059,\n    (q15_t)0x95e,  (q15_t)0x8058, (q15_t)0x957,  (q15_t)0x8058, (q15_t)0x951,\n    (q15_t)0x8057, (q15_t)0x94b,  (q15_t)0x8057, (q15_t)0x944,  (q15_t)0x8057,\n    (q15_t)0x93e,  (q15_t)0x8056, (q15_t)0x938,  (q15_t)0x8056, (q15_t)0x932,\n    (q15_t)0x8055, (q15_t)0x92b,  (q15_t)0x8055, (q15_t)0x925,  (q15_t)0x8054,\n    (q15_t)0x91f,  (q15_t)0x8054, (q15_t)0x919,  (q15_t)0x8053, (q15_t)0x912,\n    (q15_t)0x8053, (q15_t)0x90c,  (q15_t)0x8052, (q15_t)0x906,  (q15_t)0x8052,\n    (q15_t)0x900,  (q15_t)0x8052, (q15_t)0x8f9,  (q15_t)0x8051, (q15_t)0x8f3,\n    (q15_t)0x8051, (q15_t)0x8ed,  (q15_t)0x8050, (q15_t)0x8e6,  (q15_t)0x8050,\n    (q15_t)0x8e0,  (q15_t)0x804f, (q15_t)0x8da,  (q15_t)0x804f, (q15_t)0x8d4,\n    (q15_t)0x804f, (q15_t)0x8cd,  (q15_t)0x804e, (q15_t)0x8c7,  (q15_t)0x804e,\n    (q15_t)0x8c1,  (q15_t)0x804d, (q15_t)0x8bb,  (q15_t)0x804d, (q15_t)0x8b4,\n    (q15_t)0x804c, (q15_t)0x8ae,  (q15_t)0x804c, (q15_t)0x8a8,  (q15_t)0x804c,\n    (q15_t)0x8a2,  (q15_t)0x804b, (q15_t)0x89b,  (q15_t)0x804b, (q15_t)0x895,\n    (q15_t)0x804a, (q15_t)0x88f,  (q15_t)0x804a, (q15_t)0x888,  (q15_t)0x8049,\n    (q15_t)0x882,  (q15_t)0x8049, (q15_t)0x87c,  (q15_t)0x8049, (q15_t)0x876,\n    (q15_t)0x8048, (q15_t)0x86f,  (q15_t)0x8048, (q15_t)0x869,  (q15_t)0x8047,\n    (q15_t)0x863,  (q15_t)0x8047, (q15_t)0x85d,  (q15_t)0x8047, (q15_t)0x856,\n    (q15_t)0x8046, (q15_t)0x850,  (q15_t)0x8046, (q15_t)0x84a,  (q15_t)0x8045,\n    (q15_t)0x843,  (q15_t)0x8045, (q15_t)0x83d,  (q15_t)0x8044, (q15_t)0x837,\n    (q15_t)0x8044, (q15_t)0x831,  (q15_t)0x8044, (q15_t)0x82a,  (q15_t)0x8043,\n    (q15_t)0x824,  (q15_t)0x8043, (q15_t)0x81e,  (q15_t)0x8042, (q15_t)0x818,\n    (q15_t)0x8042, (q15_t)0x811,  (q15_t)0x8042, (q15_t)0x80b,  (q15_t)0x8041,\n    (q15_t)0x805,  (q15_t)0x8041, (q15_t)0x7fe,  (q15_t)0x8040, (q15_t)0x7f8,\n    (q15_t)0x8040, (q15_t)0x7f2,  (q15_t)0x8040, (q15_t)0x7ec,  (q15_t)0x803f,\n    (q15_t)0x7e5,  (q15_t)0x803f, (q15_t)0x7df,  (q15_t)0x803f, (q15_t)0x7d9,\n    (q15_t)0x803e, (q15_t)0x7d3,  (q15_t)0x803e, (q15_t)0x7cc,  (q15_t)0x803d,\n    (q15_t)0x7c6,  (q15_t)0x803d, (q15_t)0x7c0,  (q15_t)0x803d, (q15_t)0x7ba,\n    (q15_t)0x803c, (q15_t)0x7b3,  (q15_t)0x803c, (q15_t)0x7ad,  (q15_t)0x803b,\n    (q15_t)0x7a7,  (q15_t)0x803b, (q15_t)0x7a0,  (q15_t)0x803b, (q15_t)0x79a,\n    (q15_t)0x803a, (q15_t)0x794,  (q15_t)0x803a, (q15_t)0x78e,  (q15_t)0x803a,\n    (q15_t)0x787,  (q15_t)0x8039, (q15_t)0x781,  (q15_t)0x8039, (q15_t)0x77b,\n    (q15_t)0x8039, (q15_t)0x775,  (q15_t)0x8038, (q15_t)0x76e,  (q15_t)0x8038,\n    (q15_t)0x768,  (q15_t)0x8037, (q15_t)0x762,  (q15_t)0x8037, (q15_t)0x75b,\n    (q15_t)0x8037, (q15_t)0x755,  (q15_t)0x8036, (q15_t)0x74f,  (q15_t)0x8036,\n    (q15_t)0x749,  (q15_t)0x8036, (q15_t)0x742,  (q15_t)0x8035, (q15_t)0x73c,\n    (q15_t)0x8035, (q15_t)0x736,  (q15_t)0x8035, (q15_t)0x730,  (q15_t)0x8034,\n    (q15_t)0x729,  (q15_t)0x8034, (q15_t)0x723,  (q15_t)0x8033, (q15_t)0x71d,\n    (q15_t)0x8033, (q15_t)0x716,  (q15_t)0x8033, (q15_t)0x710,  (q15_t)0x8032,\n    (q15_t)0x70a,  (q15_t)0x8032, (q15_t)0x704,  (q15_t)0x8032, (q15_t)0x6fd,\n    (q15_t)0x8031, (q15_t)0x6f7,  (q15_t)0x8031, (q15_t)0x6f1,  (q15_t)0x8031,\n    (q15_t)0x6ea,  (q15_t)0x8030, (q15_t)0x6e4,  (q15_t)0x8030, (q15_t)0x6de,\n    (q15_t)0x8030, (q15_t)0x6d8,  (q15_t)0x802f, (q15_t)0x6d1,  (q15_t)0x802f,\n    (q15_t)0x6cb,  (q15_t)0x802f, (q15_t)0x6c5,  (q15_t)0x802e, (q15_t)0x6bf,\n    (q15_t)0x802e, (q15_t)0x6b8,  (q15_t)0x802e, (q15_t)0x6b2,  (q15_t)0x802d,\n    (q15_t)0x6ac,  (q15_t)0x802d, (q15_t)0x6a5,  (q15_t)0x802d, (q15_t)0x69f,\n    (q15_t)0x802c, (q15_t)0x699,  (q15_t)0x802c, (q15_t)0x693,  (q15_t)0x802c,\n    (q15_t)0x68c,  (q15_t)0x802b, (q15_t)0x686,  (q15_t)0x802b, (q15_t)0x680,\n    (q15_t)0x802b, (q15_t)0x67a,  (q15_t)0x802a, (q15_t)0x673,  (q15_t)0x802a,\n    (q15_t)0x66d,  (q15_t)0x802a, (q15_t)0x667,  (q15_t)0x802a, (q15_t)0x660,\n    (q15_t)0x8029, (q15_t)0x65a,  (q15_t)0x8029, (q15_t)0x654,  (q15_t)0x8029,\n    (q15_t)0x64e,  (q15_t)0x8028, (q15_t)0x647,  (q15_t)0x8028, (q15_t)0x641,\n    (q15_t)0x8028, (q15_t)0x63b,  (q15_t)0x8027, (q15_t)0x635,  (q15_t)0x8027,\n    (q15_t)0x62e,  (q15_t)0x8027, (q15_t)0x628,  (q15_t)0x8026, (q15_t)0x622,\n    (q15_t)0x8026, (q15_t)0x61b,  (q15_t)0x8026, (q15_t)0x615,  (q15_t)0x8026,\n    (q15_t)0x60f,  (q15_t)0x8025, (q15_t)0x609,  (q15_t)0x8025, (q15_t)0x602,\n    (q15_t)0x8025, (q15_t)0x5fc,  (q15_t)0x8024, (q15_t)0x5f6,  (q15_t)0x8024,\n    (q15_t)0x5ef,  (q15_t)0x8024, (q15_t)0x5e9,  (q15_t)0x8023, (q15_t)0x5e3,\n    (q15_t)0x8023, (q15_t)0x5dd,  (q15_t)0x8023, (q15_t)0x5d6,  (q15_t)0x8023,\n    (q15_t)0x5d0,  (q15_t)0x8022, (q15_t)0x5ca,  (q15_t)0x8022, (q15_t)0x5c4,\n    (q15_t)0x8022, (q15_t)0x5bd,  (q15_t)0x8021, (q15_t)0x5b7,  (q15_t)0x8021,\n    (q15_t)0x5b1,  (q15_t)0x8021, (q15_t)0x5aa,  (q15_t)0x8021, (q15_t)0x5a4,\n    (q15_t)0x8020, (q15_t)0x59e,  (q15_t)0x8020, (q15_t)0x598,  (q15_t)0x8020,\n    (q15_t)0x591,  (q15_t)0x8020, (q15_t)0x58b,  (q15_t)0x801f, (q15_t)0x585,\n    (q15_t)0x801f, (q15_t)0x57f,  (q15_t)0x801f, (q15_t)0x578,  (q15_t)0x801e,\n    (q15_t)0x572,  (q15_t)0x801e, (q15_t)0x56c,  (q15_t)0x801e, (q15_t)0x565,\n    (q15_t)0x801e, (q15_t)0x55f,  (q15_t)0x801d, (q15_t)0x559,  (q15_t)0x801d,\n    (q15_t)0x553,  (q15_t)0x801d, (q15_t)0x54c,  (q15_t)0x801d, (q15_t)0x546,\n    (q15_t)0x801c, (q15_t)0x540,  (q15_t)0x801c, (q15_t)0x539,  (q15_t)0x801c,\n    (q15_t)0x533,  (q15_t)0x801c, (q15_t)0x52d,  (q15_t)0x801b, (q15_t)0x527,\n    (q15_t)0x801b, (q15_t)0x520,  (q15_t)0x801b, (q15_t)0x51a,  (q15_t)0x801b,\n    (q15_t)0x514,  (q15_t)0x801a, (q15_t)0x50d,  (q15_t)0x801a, (q15_t)0x507,\n    (q15_t)0x801a, (q15_t)0x501,  (q15_t)0x801a, (q15_t)0x4fb,  (q15_t)0x8019,\n    (q15_t)0x4f4,  (q15_t)0x8019, (q15_t)0x4ee,  (q15_t)0x8019, (q15_t)0x4e8,\n    (q15_t)0x8019, (q15_t)0x4e2,  (q15_t)0x8018, (q15_t)0x4db,  (q15_t)0x8018,\n    (q15_t)0x4d5,  (q15_t)0x8018, (q15_t)0x4cf,  (q15_t)0x8018, (q15_t)0x4c8,\n    (q15_t)0x8017, (q15_t)0x4c2,  (q15_t)0x8017, (q15_t)0x4bc,  (q15_t)0x8017,\n    (q15_t)0x4b6,  (q15_t)0x8017, (q15_t)0x4af,  (q15_t)0x8016, (q15_t)0x4a9,\n    (q15_t)0x8016, (q15_t)0x4a3,  (q15_t)0x8016, (q15_t)0x49c,  (q15_t)0x8016,\n    (q15_t)0x496,  (q15_t)0x8016, (q15_t)0x490,  (q15_t)0x8015, (q15_t)0x48a,\n    (q15_t)0x8015, (q15_t)0x483,  (q15_t)0x8015, (q15_t)0x47d,  (q15_t)0x8015,\n    (q15_t)0x477,  (q15_t)0x8014, (q15_t)0x471,  (q15_t)0x8014, (q15_t)0x46a,\n    (q15_t)0x8014, (q15_t)0x464,  (q15_t)0x8014, (q15_t)0x45e,  (q15_t)0x8014,\n    (q15_t)0x457,  (q15_t)0x8013, (q15_t)0x451,  (q15_t)0x8013, (q15_t)0x44b,\n    (q15_t)0x8013, (q15_t)0x445,  (q15_t)0x8013, (q15_t)0x43e,  (q15_t)0x8013,\n    (q15_t)0x438,  (q15_t)0x8012, (q15_t)0x432,  (q15_t)0x8012, (q15_t)0x42b,\n    (q15_t)0x8012, (q15_t)0x425,  (q15_t)0x8012, (q15_t)0x41f,  (q15_t)0x8012,\n    (q15_t)0x419,  (q15_t)0x8011, (q15_t)0x412,  (q15_t)0x8011, (q15_t)0x40c,\n    (q15_t)0x8011, (q15_t)0x406,  (q15_t)0x8011, (q15_t)0x3ff,  (q15_t)0x8011,\n    (q15_t)0x3f9,  (q15_t)0x8010, (q15_t)0x3f3,  (q15_t)0x8010, (q15_t)0x3ed,\n    (q15_t)0x8010, (q15_t)0x3e6,  (q15_t)0x8010, (q15_t)0x3e0,  (q15_t)0x8010,\n    (q15_t)0x3da,  (q15_t)0x800f, (q15_t)0x3d4,  (q15_t)0x800f, (q15_t)0x3cd,\n    (q15_t)0x800f, (q15_t)0x3c7,  (q15_t)0x800f, (q15_t)0x3c1,  (q15_t)0x800f,\n    (q15_t)0x3ba,  (q15_t)0x800e, (q15_t)0x3b4,  (q15_t)0x800e, (q15_t)0x3ae,\n    (q15_t)0x800e, (q15_t)0x3a8,  (q15_t)0x800e, (q15_t)0x3a1,  (q15_t)0x800e,\n    (q15_t)0x39b,  (q15_t)0x800e, (q15_t)0x395,  (q15_t)0x800d, (q15_t)0x38e,\n    (q15_t)0x800d, (q15_t)0x388,  (q15_t)0x800d, (q15_t)0x382,  (q15_t)0x800d,\n    (q15_t)0x37c,  (q15_t)0x800d, (q15_t)0x375,  (q15_t)0x800c, (q15_t)0x36f,\n    (q15_t)0x800c, (q15_t)0x369,  (q15_t)0x800c, (q15_t)0x362,  (q15_t)0x800c,\n    (q15_t)0x35c,  (q15_t)0x800c, (q15_t)0x356,  (q15_t)0x800c, (q15_t)0x350,\n    (q15_t)0x800b, (q15_t)0x349,  (q15_t)0x800b, (q15_t)0x343,  (q15_t)0x800b,\n    (q15_t)0x33d,  (q15_t)0x800b, (q15_t)0x337,  (q15_t)0x800b, (q15_t)0x330,\n    (q15_t)0x800b, (q15_t)0x32a,  (q15_t)0x800b, (q15_t)0x324,  (q15_t)0x800a,\n    (q15_t)0x31d,  (q15_t)0x800a, (q15_t)0x317,  (q15_t)0x800a, (q15_t)0x311,\n    (q15_t)0x800a, (q15_t)0x30b,  (q15_t)0x800a, (q15_t)0x304,  (q15_t)0x800a,\n    (q15_t)0x2fe,  (q15_t)0x8009, (q15_t)0x2f8,  (q15_t)0x8009, (q15_t)0x2f1,\n    (q15_t)0x8009, (q15_t)0x2eb,  (q15_t)0x8009, (q15_t)0x2e5,  (q15_t)0x8009,\n    (q15_t)0x2df,  (q15_t)0x8009, (q15_t)0x2d8,  (q15_t)0x8009, (q15_t)0x2d2,\n    (q15_t)0x8008, (q15_t)0x2cc,  (q15_t)0x8008, (q15_t)0x2c5,  (q15_t)0x8008,\n    (q15_t)0x2bf,  (q15_t)0x8008, (q15_t)0x2b9,  (q15_t)0x8008, (q15_t)0x2b3,\n    (q15_t)0x8008, (q15_t)0x2ac,  (q15_t)0x8008, (q15_t)0x2a6,  (q15_t)0x8008,\n    (q15_t)0x2a0,  (q15_t)0x8007, (q15_t)0x299,  (q15_t)0x8007, (q15_t)0x293,\n    (q15_t)0x8007, (q15_t)0x28d,  (q15_t)0x8007, (q15_t)0x287,  (q15_t)0x8007,\n    (q15_t)0x280,  (q15_t)0x8007, (q15_t)0x27a,  (q15_t)0x8007, (q15_t)0x274,\n    (q15_t)0x8007, (q15_t)0x26d,  (q15_t)0x8006, (q15_t)0x267,  (q15_t)0x8006,\n    (q15_t)0x261,  (q15_t)0x8006, (q15_t)0x25b,  (q15_t)0x8006, (q15_t)0x254,\n    (q15_t)0x8006, (q15_t)0x24e,  (q15_t)0x8006, (q15_t)0x248,  (q15_t)0x8006,\n    (q15_t)0x242,  (q15_t)0x8006, (q15_t)0x23b,  (q15_t)0x8005, (q15_t)0x235,\n    (q15_t)0x8005, (q15_t)0x22f,  (q15_t)0x8005, (q15_t)0x228,  (q15_t)0x8005,\n    (q15_t)0x222,  (q15_t)0x8005, (q15_t)0x21c,  (q15_t)0x8005, (q15_t)0x216,\n    (q15_t)0x8005, (q15_t)0x20f,  (q15_t)0x8005, (q15_t)0x209,  (q15_t)0x8005,\n    (q15_t)0x203,  (q15_t)0x8005, (q15_t)0x1fc,  (q15_t)0x8004, (q15_t)0x1f6,\n    (q15_t)0x8004, (q15_t)0x1f0,  (q15_t)0x8004, (q15_t)0x1ea,  (q15_t)0x8004,\n    (q15_t)0x1e3,  (q15_t)0x8004, (q15_t)0x1dd,  (q15_t)0x8004, (q15_t)0x1d7,\n    (q15_t)0x8004, (q15_t)0x1d0,  (q15_t)0x8004, (q15_t)0x1ca,  (q15_t)0x8004,\n    (q15_t)0x1c4,  (q15_t)0x8004, (q15_t)0x1be,  (q15_t)0x8004, (q15_t)0x1b7,\n    (q15_t)0x8003, (q15_t)0x1b1,  (q15_t)0x8003, (q15_t)0x1ab,  (q15_t)0x8003,\n    (q15_t)0x1a4,  (q15_t)0x8003, (q15_t)0x19e,  (q15_t)0x8003, (q15_t)0x198,\n    (q15_t)0x8003, (q15_t)0x192,  (q15_t)0x8003, (q15_t)0x18b,  (q15_t)0x8003,\n    (q15_t)0x185,  (q15_t)0x8003, (q15_t)0x17f,  (q15_t)0x8003, (q15_t)0x178,\n    (q15_t)0x8003, (q15_t)0x172,  (q15_t)0x8003, (q15_t)0x16c,  (q15_t)0x8003,\n    (q15_t)0x166,  (q15_t)0x8002, (q15_t)0x15f,  (q15_t)0x8002, (q15_t)0x159,\n    (q15_t)0x8002, (q15_t)0x153,  (q15_t)0x8002, (q15_t)0x14d,  (q15_t)0x8002,\n    (q15_t)0x146,  (q15_t)0x8002, (q15_t)0x140,  (q15_t)0x8002, (q15_t)0x13a,\n    (q15_t)0x8002, (q15_t)0x133,  (q15_t)0x8002, (q15_t)0x12d,  (q15_t)0x8002,\n    (q15_t)0x127,  (q15_t)0x8002, (q15_t)0x121,  (q15_t)0x8002, (q15_t)0x11a,\n    (q15_t)0x8002, (q15_t)0x114,  (q15_t)0x8002, (q15_t)0x10e,  (q15_t)0x8002,\n    (q15_t)0x107,  (q15_t)0x8002, (q15_t)0x101,  (q15_t)0x8002, (q15_t)0xfb,\n    (q15_t)0x8001, (q15_t)0xf5,   (q15_t)0x8001, (q15_t)0xee,   (q15_t)0x8001,\n    (q15_t)0xe8,   (q15_t)0x8001, (q15_t)0xe2,   (q15_t)0x8001, (q15_t)0xdb,\n    (q15_t)0x8001, (q15_t)0xd5,   (q15_t)0x8001, (q15_t)0xcf,   (q15_t)0x8001,\n    (q15_t)0xc9,   (q15_t)0x8001, (q15_t)0xc2,   (q15_t)0x8001, (q15_t)0xbc,\n    (q15_t)0x8001, (q15_t)0xb6,   (q15_t)0x8001, (q15_t)0xaf,   (q15_t)0x8001,\n    (q15_t)0xa9,   (q15_t)0x8001, (q15_t)0xa3,   (q15_t)0x8001, (q15_t)0x9d,\n    (q15_t)0x8001, (q15_t)0x96,   (q15_t)0x8001, (q15_t)0x90,   (q15_t)0x8001,\n    (q15_t)0x8a,   (q15_t)0x8001, (q15_t)0x83,   (q15_t)0x8001, (q15_t)0x7d,\n    (q15_t)0x8001, (q15_t)0x77,   (q15_t)0x8001, (q15_t)0x71,   (q15_t)0x8001,\n    (q15_t)0x6a,   (q15_t)0x8001, (q15_t)0x64,   (q15_t)0x8001, (q15_t)0x5e,\n    (q15_t)0x8001, (q15_t)0x57,   (q15_t)0x8001, (q15_t)0x51,   (q15_t)0x8001,\n    (q15_t)0x4b,   (q15_t)0x8001, (q15_t)0x45,   (q15_t)0x8001, (q15_t)0x3e,\n    (q15_t)0x8001, (q15_t)0x38,   (q15_t)0x8001, (q15_t)0x32,   (q15_t)0x8001,\n    (q15_t)0x2b,   (q15_t)0x8001, (q15_t)0x25,   (q15_t)0x8001, (q15_t)0x1f,\n    (q15_t)0x8001, (q15_t)0x19,   (q15_t)0x8001, (q15_t)0x12,   (q15_t)0x8001,\n    (q15_t)0xc,    (q15_t)0x8001, (q15_t)0x6,    (q15_t)0x8001};\n\n/**\n  @par\n  cosFactor tables are generated using the formula : 
 cos_factors[n] = 2 *\n  cos((2n+1)*pi/(4*N)) 
\n  @par\n  C command to generate the table\n  
\n  for (i = 0; i< N; i++)\n  {\n    cos_factors[i] = 2 * cos((2*i+1)*c/2);\n  } 
\n  @par\n  where N is the number of factors to generate and c\n  is pi/(2*N)\n  @par\n  Then converted to q15 format by multiplying with 2^31 and saturated if\n  required.\n*/\n\nstatic const q15_t __ALIGNED(4) cos_factorsQ15_128[128] = {\n    (q15_t)0x7fff, (q15_t)0x7ffa, (q15_t)0x7ff0, (q15_t)0x7fe1, (q15_t)0x7fce,\n    (q15_t)0x7fb5, (q15_t)0x7f97, (q15_t)0x7f75, (q15_t)0x7f4d, (q15_t)0x7f21,\n    (q15_t)0x7ef0, (q15_t)0x7eba, (q15_t)0x7e7f, (q15_t)0x7e3f, (q15_t)0x7dfa,\n    (q15_t)0x7db0, (q15_t)0x7d62, (q15_t)0x7d0f, (q15_t)0x7cb7, (q15_t)0x7c5a,\n    (q15_t)0x7bf8, (q15_t)0x7b92, (q15_t)0x7b26, (q15_t)0x7ab6, (q15_t)0x7a42,\n    (q15_t)0x79c8, (q15_t)0x794a, (q15_t)0x78c7, (q15_t)0x7840, (q15_t)0x77b4,\n    (q15_t)0x7723, (q15_t)0x768e, (q15_t)0x75f4, (q15_t)0x7555, (q15_t)0x74b2,\n    (q15_t)0x740b, (q15_t)0x735f, (q15_t)0x72af, (q15_t)0x71fa, (q15_t)0x7141,\n    (q15_t)0x7083, (q15_t)0x6fc1, (q15_t)0x6efb, (q15_t)0x6e30, (q15_t)0x6d62,\n    (q15_t)0x6c8f, (q15_t)0x6bb8, (q15_t)0x6adc, (q15_t)0x69fd, (q15_t)0x6919,\n    (q15_t)0x6832, (q15_t)0x6746, (q15_t)0x6657, (q15_t)0x6563, (q15_t)0x646c,\n    (q15_t)0x6371, (q15_t)0x6271, (q15_t)0x616f, (q15_t)0x6068, (q15_t)0x5f5e,\n    (q15_t)0x5e50, (q15_t)0x5d3e, (q15_t)0x5c29, (q15_t)0x5b10, (q15_t)0x59f3,\n    (q15_t)0x58d4, (q15_t)0x57b0, (q15_t)0x568a, (q15_t)0x5560, (q15_t)0x5433,\n    (q15_t)0x5302, (q15_t)0x51ce, (q15_t)0x5097, (q15_t)0x4f5e, (q15_t)0x4e21,\n    (q15_t)0x4ce1, (q15_t)0x4b9e, (q15_t)0x4a58, (q15_t)0x490f, (q15_t)0x47c3,\n    (q15_t)0x4675, (q15_t)0x4524, (q15_t)0x43d0, (q15_t)0x427a, (q15_t)0x4121,\n    (q15_t)0x3fc5, (q15_t)0x3e68, (q15_t)0x3d07, (q15_t)0x3ba5, (q15_t)0x3a40,\n    (q15_t)0x38d8, (q15_t)0x376f, (q15_t)0x3604, (q15_t)0x3496, (q15_t)0x3326,\n    (q15_t)0x31b5, (q15_t)0x3041, (q15_t)0x2ecc, (q15_t)0x2d55, (q15_t)0x2bdc,\n    (q15_t)0x2a61, (q15_t)0x28e5, (q15_t)0x2767, (q15_t)0x25e8, (q15_t)0x2467,\n    (q15_t)0x22e5, (q15_t)0x2161, (q15_t)0x1fdc, (q15_t)0x1e56, (q15_t)0x1ccf,\n    (q15_t)0x1b47, (q15_t)0x19bd, (q15_t)0x1833, (q15_t)0x16a8, (q15_t)0x151b,\n    (q15_t)0x138e, (q15_t)0x1201, (q15_t)0x1072, (q15_t)0xee3,  (q15_t)0xd53,\n    (q15_t)0xbc3,  (q15_t)0xa33,  (q15_t)0x8a2,  (q15_t)0x710,  (q15_t)0x57f,\n    (q15_t)0x3ed,  (q15_t)0x25b,  (q15_t)0xc9};\n\nstatic const q15_t __ALIGNED(4) cos_factorsQ15_512[512] = {\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffc,\n    (q15_t)0x7ffb, (q15_t)0x7ff9, (q15_t)0x7ff7, (q15_t)0x7ff4, (q15_t)0x7ff2,\n    (q15_t)0x7fee, (q15_t)0x7feb, (q15_t)0x7fe7, (q15_t)0x7fe3, (q15_t)0x7fdf,\n    (q15_t)0x7fda, (q15_t)0x7fd6, (q15_t)0x7fd0, (q15_t)0x7fcb, (q15_t)0x7fc5,\n    (q15_t)0x7fbf, (q15_t)0x7fb8, (q15_t)0x7fb1, (q15_t)0x7faa, (q15_t)0x7fa3,\n    (q15_t)0x7f9b, (q15_t)0x7f93, (q15_t)0x7f8b, (q15_t)0x7f82, (q15_t)0x7f79,\n    (q15_t)0x7f70, (q15_t)0x7f67, (q15_t)0x7f5d, (q15_t)0x7f53, (q15_t)0x7f48,\n    (q15_t)0x7f3d, (q15_t)0x7f32, (q15_t)0x7f27, (q15_t)0x7f1b, (q15_t)0x7f0f,\n    (q15_t)0x7f03, (q15_t)0x7ef6, (q15_t)0x7ee9, (q15_t)0x7edc, (q15_t)0x7ecf,\n    (q15_t)0x7ec1, (q15_t)0x7eb3, (q15_t)0x7ea4, (q15_t)0x7e95, (q15_t)0x7e86,\n    (q15_t)0x7e77, (q15_t)0x7e67, (q15_t)0x7e57, (q15_t)0x7e47, (q15_t)0x7e37,\n    (q15_t)0x7e26, (q15_t)0x7e14, (q15_t)0x7e03, (q15_t)0x7df1, (q15_t)0x7ddf,\n    (q15_t)0x7dcd, (q15_t)0x7dba, (q15_t)0x7da7, (q15_t)0x7d94, (q15_t)0x7d80,\n    (q15_t)0x7d6c, (q15_t)0x7d58, (q15_t)0x7d43, (q15_t)0x7d2f, (q15_t)0x7d19,\n    (q15_t)0x7d04, (q15_t)0x7cee, (q15_t)0x7cd8, (q15_t)0x7cc2, (q15_t)0x7cab,\n    (q15_t)0x7c94, (q15_t)0x7c7d, (q15_t)0x7c66, (q15_t)0x7c4e, (q15_t)0x7c36,\n    (q15_t)0x7c1d, (q15_t)0x7c05, (q15_t)0x7beb, (q15_t)0x7bd2, (q15_t)0x7bb9,\n    (q15_t)0x7b9f, (q15_t)0x7b84, (q15_t)0x7b6a, (q15_t)0x7b4f, (q15_t)0x7b34,\n    (q15_t)0x7b19, (q15_t)0x7afd, (q15_t)0x7ae1, (q15_t)0x7ac5, (q15_t)0x7aa8,\n    (q15_t)0x7a8b, (q15_t)0x7a6e, (q15_t)0x7a50, (q15_t)0x7a33, (q15_t)0x7a15,\n    (q15_t)0x79f6, (q15_t)0x79d8, (q15_t)0x79b9, (q15_t)0x7999, (q15_t)0x797a,\n    (q15_t)0x795a, (q15_t)0x793a, (q15_t)0x7919, (q15_t)0x78f9, (q15_t)0x78d8,\n    (q15_t)0x78b6, (q15_t)0x7895, (q15_t)0x7873, (q15_t)0x7851, (q15_t)0x782e,\n    (q15_t)0x780c, (q15_t)0x77e9, (q15_t)0x77c5, (q15_t)0x77a2, (q15_t)0x777e,\n    (q15_t)0x775a, (q15_t)0x7735, (q15_t)0x7710, (q15_t)0x76eb, (q15_t)0x76c6,\n    (q15_t)0x76a0, (q15_t)0x767b, (q15_t)0x7654, (q15_t)0x762e, (q15_t)0x7607,\n    (q15_t)0x75e0, (q15_t)0x75b9, (q15_t)0x7591, (q15_t)0x7569, (q15_t)0x7541,\n    (q15_t)0x7519, (q15_t)0x74f0, (q15_t)0x74c7, (q15_t)0x749e, (q15_t)0x7474,\n    (q15_t)0x744a, (q15_t)0x7420, (q15_t)0x73f6, (q15_t)0x73cb, (q15_t)0x73a0,\n    (q15_t)0x7375, (q15_t)0x7349, (q15_t)0x731d, (q15_t)0x72f1, (q15_t)0x72c5,\n    (q15_t)0x7298, (q15_t)0x726b, (q15_t)0x723e, (q15_t)0x7211, (q15_t)0x71e3,\n    (q15_t)0x71b5, (q15_t)0x7186, (q15_t)0x7158, (q15_t)0x7129, (q15_t)0x70fa,\n    (q15_t)0x70cb, (q15_t)0x709b, (q15_t)0x706b, (q15_t)0x703b, (q15_t)0x700a,\n    (q15_t)0x6fda, (q15_t)0x6fa9, (q15_t)0x6f77, (q15_t)0x6f46, (q15_t)0x6f14,\n    (q15_t)0x6ee2, (q15_t)0x6eaf, (q15_t)0x6e7d, (q15_t)0x6e4a, (q15_t)0x6e17,\n    (q15_t)0x6de3, (q15_t)0x6db0, (q15_t)0x6d7c, (q15_t)0x6d48, (q15_t)0x6d13,\n    (q15_t)0x6cde, (q15_t)0x6ca9, (q15_t)0x6c74, (q15_t)0x6c3f, (q15_t)0x6c09,\n    (q15_t)0x6bd3, (q15_t)0x6b9c, (q15_t)0x6b66, (q15_t)0x6b2f, (q15_t)0x6af8,\n    (q15_t)0x6ac1, (q15_t)0x6a89, (q15_t)0x6a51, (q15_t)0x6a19, (q15_t)0x69e1,\n    (q15_t)0x69a8, (q15_t)0x696f, (q15_t)0x6936, (q15_t)0x68fd, (q15_t)0x68c3,\n    (q15_t)0x6889, (q15_t)0x684f, (q15_t)0x6815, (q15_t)0x67da, (q15_t)0x679f,\n    (q15_t)0x6764, (q15_t)0x6729, (q15_t)0x66ed, (q15_t)0x66b1, (q15_t)0x6675,\n    (q15_t)0x6639, (q15_t)0x65fc, (q15_t)0x65bf, (q15_t)0x6582, (q15_t)0x6545,\n    (q15_t)0x6507, (q15_t)0x64c9, (q15_t)0x648b, (q15_t)0x644d, (q15_t)0x640e,\n    (q15_t)0x63cf, (q15_t)0x6390, (q15_t)0x6351, (q15_t)0x6311, (q15_t)0x62d2,\n    (q15_t)0x6292, (q15_t)0x6251, (q15_t)0x6211, (q15_t)0x61d0, (q15_t)0x618f,\n    (q15_t)0x614e, (q15_t)0x610d, (q15_t)0x60cb, (q15_t)0x6089, (q15_t)0x6047,\n    (q15_t)0x6004, (q15_t)0x5fc2, (q15_t)0x5f7f, (q15_t)0x5f3c, (q15_t)0x5ef9,\n    (q15_t)0x5eb5, (q15_t)0x5e71, (q15_t)0x5e2d, (q15_t)0x5de9, (q15_t)0x5da5,\n    (q15_t)0x5d60, (q15_t)0x5d1b, (q15_t)0x5cd6, (q15_t)0x5c91, (q15_t)0x5c4b,\n    (q15_t)0x5c06, (q15_t)0x5bc0, (q15_t)0x5b79, (q15_t)0x5b33, (q15_t)0x5aec,\n    (q15_t)0x5aa5, (q15_t)0x5a5e, (q15_t)0x5a17, (q15_t)0x59d0, (q15_t)0x5988,\n    (q15_t)0x5940, (q15_t)0x58f8, (q15_t)0x58af, (q15_t)0x5867, (q15_t)0x581e,\n    (q15_t)0x57d5, (q15_t)0x578c, (q15_t)0x5742, (q15_t)0x56f9, (q15_t)0x56af,\n    (q15_t)0x5665, (q15_t)0x561a, (q15_t)0x55d0, (q15_t)0x5585, (q15_t)0x553a,\n    (q15_t)0x54ef, (q15_t)0x54a4, (q15_t)0x5458, (q15_t)0x540d, (q15_t)0x53c1,\n    (q15_t)0x5375, (q15_t)0x5328, (q15_t)0x52dc, (q15_t)0x528f, (q15_t)0x5242,\n    (q15_t)0x51f5, (q15_t)0x51a8, (q15_t)0x515a, (q15_t)0x510c, (q15_t)0x50bf,\n    (q15_t)0x5070, (q15_t)0x5022, (q15_t)0x4fd4, (q15_t)0x4f85, (q15_t)0x4f36,\n    (q15_t)0x4ee7, (q15_t)0x4e98, (q15_t)0x4e48, (q15_t)0x4df9, (q15_t)0x4da9,\n    (q15_t)0x4d59, (q15_t)0x4d09, (q15_t)0x4cb8, (q15_t)0x4c68, (q15_t)0x4c17,\n    (q15_t)0x4bc6, (q15_t)0x4b75, (q15_t)0x4b24, (q15_t)0x4ad2, (q15_t)0x4a81,\n    (q15_t)0x4a2f, (q15_t)0x49dd, (q15_t)0x498a, (q15_t)0x4938, (q15_t)0x48e6,\n    (q15_t)0x4893, (q15_t)0x4840, (q15_t)0x47ed, (q15_t)0x479a, (q15_t)0x4746,\n    (q15_t)0x46f3, (q15_t)0x469f, (q15_t)0x464b, (q15_t)0x45f7, (q15_t)0x45a3,\n    (q15_t)0x454e, (q15_t)0x44fa, (q15_t)0x44a5, (q15_t)0x4450, (q15_t)0x43fb,\n    (q15_t)0x43a5, (q15_t)0x4350, (q15_t)0x42fa, (q15_t)0x42a5, (q15_t)0x424f,\n    (q15_t)0x41f9, (q15_t)0x41a2, (q15_t)0x414c, (q15_t)0x40f6, (q15_t)0x409f,\n    (q15_t)0x4048, (q15_t)0x3ff1, (q15_t)0x3f9a, (q15_t)0x3f43, (q15_t)0x3eeb,\n    (q15_t)0x3e93, (q15_t)0x3e3c, (q15_t)0x3de4, (q15_t)0x3d8c, (q15_t)0x3d33,\n    (q15_t)0x3cdb, (q15_t)0x3c83, (q15_t)0x3c2a, (q15_t)0x3bd1, (q15_t)0x3b78,\n    (q15_t)0x3b1f, (q15_t)0x3ac6, (q15_t)0x3a6c, (q15_t)0x3a13, (q15_t)0x39b9,\n    (q15_t)0x395f, (q15_t)0x3906, (q15_t)0x38ab, (q15_t)0x3851, (q15_t)0x37f7,\n    (q15_t)0x379c, (q15_t)0x3742, (q15_t)0x36e7, (q15_t)0x368c, (q15_t)0x3631,\n    (q15_t)0x35d6, (q15_t)0x357b, (q15_t)0x351f, (q15_t)0x34c4, (q15_t)0x3468,\n    (q15_t)0x340c, (q15_t)0x33b0, (q15_t)0x3354, (q15_t)0x32f8, (q15_t)0x329c,\n    (q15_t)0x3240, (q15_t)0x31e3, (q15_t)0x3186, (q15_t)0x312a, (q15_t)0x30cd,\n    (q15_t)0x3070, (q15_t)0x3013, (q15_t)0x2fb5, (q15_t)0x2f58, (q15_t)0x2efb,\n    (q15_t)0x2e9d, (q15_t)0x2e3f, (q15_t)0x2de2, (q15_t)0x2d84, (q15_t)0x2d26,\n    (q15_t)0x2cc8, (q15_t)0x2c69, (q15_t)0x2c0b, (q15_t)0x2bad, (q15_t)0x2b4e,\n    (q15_t)0x2aef, (q15_t)0x2a91, (q15_t)0x2a32, (q15_t)0x29d3, (q15_t)0x2974,\n    (q15_t)0x2915, (q15_t)0x28b5, (q15_t)0x2856, (q15_t)0x27f6, (q15_t)0x2797,\n    (q15_t)0x2737, (q15_t)0x26d8, (q15_t)0x2678, (q15_t)0x2618, (q15_t)0x25b8,\n    (q15_t)0x2558, (q15_t)0x24f7, (q15_t)0x2497, (q15_t)0x2437, (q15_t)0x23d6,\n    (q15_t)0x2376, (q15_t)0x2315, (q15_t)0x22b4, (q15_t)0x2254, (q15_t)0x21f3,\n    (q15_t)0x2192, (q15_t)0x2131, (q15_t)0x20d0, (q15_t)0x206e, (q15_t)0x200d,\n    (q15_t)0x1fac, (q15_t)0x1f4a, (q15_t)0x1ee9, (q15_t)0x1e87, (q15_t)0x1e25,\n    (q15_t)0x1dc4, (q15_t)0x1d62, (q15_t)0x1d00, (q15_t)0x1c9e, (q15_t)0x1c3c,\n    (q15_t)0x1bda, (q15_t)0x1b78, (q15_t)0x1b16, (q15_t)0x1ab3, (q15_t)0x1a51,\n    (q15_t)0x19ef, (q15_t)0x198c, (q15_t)0x192a, (q15_t)0x18c7, (q15_t)0x1864,\n    (q15_t)0x1802, (q15_t)0x179f, (q15_t)0x173c, (q15_t)0x16d9, (q15_t)0x1676,\n    (q15_t)0x1613, (q15_t)0x15b0, (q15_t)0x154d, (q15_t)0x14ea, (q15_t)0x1487,\n    (q15_t)0x1423, (q15_t)0x13c0, (q15_t)0x135d, (q15_t)0x12f9, (q15_t)0x1296,\n    (q15_t)0x1232, (q15_t)0x11cf, (q15_t)0x116b, (q15_t)0x1108, (q15_t)0x10a4,\n    (q15_t)0x1040, (q15_t)0xfdd,  (q15_t)0xf79,  (q15_t)0xf15,  (q15_t)0xeb1,\n    (q15_t)0xe4d,  (q15_t)0xde9,  (q15_t)0xd85,  (q15_t)0xd21,  (q15_t)0xcbd,\n    (q15_t)0xc59,  (q15_t)0xbf5,  (q15_t)0xb91,  (q15_t)0xb2d,  (q15_t)0xac9,\n    (q15_t)0xa65,  (q15_t)0xa00,  (q15_t)0x99c,  (q15_t)0x938,  (q15_t)0x8d4,\n    (q15_t)0x86f,  (q15_t)0x80b,  (q15_t)0x7a7,  (q15_t)0x742,  (q15_t)0x6de,\n    (q15_t)0x67a,  (q15_t)0x615,  (q15_t)0x5b1,  (q15_t)0x54c,  (q15_t)0x4e8,\n    (q15_t)0x483,  (q15_t)0x41f,  (q15_t)0x3ba,  (q15_t)0x356,  (q15_t)0x2f1,\n    (q15_t)0x28d,  (q15_t)0x228,  (q15_t)0x1c4,  (q15_t)0x15f,  (q15_t)0xfb,\n    (q15_t)0x96,   (q15_t)0x32};\n\nstatic const q15_t __ALIGNED(4) cos_factorsQ15_2048[2048] = {\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd,\n    (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc,\n    (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa, (q15_t)0x7ffa,\n    (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7,\n    (q15_t)0x7ff7, (q15_t)0x7ff6, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4,\n    (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff1, (q15_t)0x7ff0,\n    (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fec,\n    (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7fea, (q15_t)0x7fe9, (q15_t)0x7fe8,\n    (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe3,\n    (q15_t)0x7fe2, (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdd,\n    (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fda, (q15_t)0x7fd9, (q15_t)0x7fd7,\n    (q15_t)0x7fd6, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd2, (q15_t)0x7fd1,\n    (q15_t)0x7fd0, (q15_t)0x7fce, (q15_t)0x7fcd, (q15_t)0x7fcb, (q15_t)0x7fca,\n    (q15_t)0x7fc9, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc4, (q15_t)0x7fc3,\n    (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fbe, (q15_t)0x7fbc, (q15_t)0x7fbb,\n    (q15_t)0x7fb9, (q15_t)0x7fb7, (q15_t)0x7fb6, (q15_t)0x7fb4, (q15_t)0x7fb2,\n    (q15_t)0x7fb1, (q15_t)0x7faf, (q15_t)0x7fad, (q15_t)0x7fab, (q15_t)0x7fa9,\n    (q15_t)0x7fa8, (q15_t)0x7fa6, (q15_t)0x7fa4, (q15_t)0x7fa2, (q15_t)0x7fa0,\n    (q15_t)0x7f9e, (q15_t)0x7f9c, (q15_t)0x7f9a, (q15_t)0x7f98, (q15_t)0x7f96,\n    (q15_t)0x7f94, (q15_t)0x7f92, (q15_t)0x7f90, (q15_t)0x7f8e, (q15_t)0x7f8c,\n    (q15_t)0x7f8a, (q15_t)0x7f88, (q15_t)0x7f86, (q15_t)0x7f83, (q15_t)0x7f81,\n    (q15_t)0x7f7f, (q15_t)0x7f7d, (q15_t)0x7f7b, (q15_t)0x7f78, (q15_t)0x7f76,\n    (q15_t)0x7f74, (q15_t)0x7f71, (q15_t)0x7f6f, (q15_t)0x7f6d, (q15_t)0x7f6a,\n    (q15_t)0x7f68, (q15_t)0x7f65, (q15_t)0x7f63, (q15_t)0x7f60, (q15_t)0x7f5e,\n    (q15_t)0x7f5b, (q15_t)0x7f59, (q15_t)0x7f56, (q15_t)0x7f54, (q15_t)0x7f51,\n    (q15_t)0x7f4f, (q15_t)0x7f4c, (q15_t)0x7f49, (q15_t)0x7f47, (q15_t)0x7f44,\n    (q15_t)0x7f41, (q15_t)0x7f3f, (q15_t)0x7f3c, (q15_t)0x7f39, (q15_t)0x7f36,\n    (q15_t)0x7f34, (q15_t)0x7f31, (q15_t)0x7f2e, (q15_t)0x7f2b, (q15_t)0x7f28,\n    (q15_t)0x7f25, (q15_t)0x7f23, (q15_t)0x7f20, (q15_t)0x7f1d, (q15_t)0x7f1a,\n    (q15_t)0x7f17, (q15_t)0x7f14, (q15_t)0x7f11, (q15_t)0x7f0e, (q15_t)0x7f0b,\n    (q15_t)0x7f08, (q15_t)0x7f04, (q15_t)0x7f01, (q15_t)0x7efe, (q15_t)0x7efb,\n    (q15_t)0x7ef8, (q15_t)0x7ef5, (q15_t)0x7ef1, (q15_t)0x7eee, (q15_t)0x7eeb,\n    (q15_t)0x7ee8, (q15_t)0x7ee4, (q15_t)0x7ee1, (q15_t)0x7ede, (q15_t)0x7eda,\n    (q15_t)0x7ed7, (q15_t)0x7ed4, (q15_t)0x7ed0, (q15_t)0x7ecd, (q15_t)0x7ec9,\n    (q15_t)0x7ec6, (q15_t)0x7ec3, (q15_t)0x7ebf, (q15_t)0x7ebb, (q15_t)0x7eb8,\n    (q15_t)0x7eb4, (q15_t)0x7eb1, (q15_t)0x7ead, (q15_t)0x7eaa, (q15_t)0x7ea6,\n    (q15_t)0x7ea2, (q15_t)0x7e9f, (q15_t)0x7e9b, (q15_t)0x7e97, (q15_t)0x7e94,\n    (q15_t)0x7e90, (q15_t)0x7e8c, (q15_t)0x7e88, (q15_t)0x7e84, (q15_t)0x7e81,\n    (q15_t)0x7e7d, (q15_t)0x7e79, (q15_t)0x7e75, (q15_t)0x7e71, (q15_t)0x7e6d,\n    (q15_t)0x7e69, (q15_t)0x7e65, (q15_t)0x7e61, (q15_t)0x7e5d, (q15_t)0x7e59,\n    (q15_t)0x7e55, (q15_t)0x7e51, (q15_t)0x7e4d, (q15_t)0x7e49, (q15_t)0x7e45,\n    (q15_t)0x7e41, (q15_t)0x7e3d, (q15_t)0x7e39, (q15_t)0x7e34, (q15_t)0x7e30,\n    (q15_t)0x7e2c, (q15_t)0x7e28, (q15_t)0x7e24, (q15_t)0x7e1f, (q15_t)0x7e1b,\n    (q15_t)0x7e17, (q15_t)0x7e12, (q15_t)0x7e0e, (q15_t)0x7e0a, (q15_t)0x7e05,\n    (q15_t)0x7e01, (q15_t)0x7dfc, (q15_t)0x7df8, (q15_t)0x7df3, (q15_t)0x7def,\n    (q15_t)0x7dea, (q15_t)0x7de6, (q15_t)0x7de1, (q15_t)0x7ddd, (q15_t)0x7dd8,\n    (q15_t)0x7dd4, (q15_t)0x7dcf, (q15_t)0x7dca, (q15_t)0x7dc6, (q15_t)0x7dc1,\n    (q15_t)0x7dbc, (q15_t)0x7db8, (q15_t)0x7db3, (q15_t)0x7dae, (q15_t)0x7da9,\n    (q15_t)0x7da5, (q15_t)0x7da0, (q15_t)0x7d9b, (q15_t)0x7d96, (q15_t)0x7d91,\n    (q15_t)0x7d8c, (q15_t)0x7d87, (q15_t)0x7d82, (q15_t)0x7d7e, (q15_t)0x7d79,\n    (q15_t)0x7d74, (q15_t)0x7d6f, (q15_t)0x7d6a, (q15_t)0x7d65, (q15_t)0x7d60,\n    (q15_t)0x7d5a, (q15_t)0x7d55, (q15_t)0x7d50, (q15_t)0x7d4b, (q15_t)0x7d46,\n    (q15_t)0x7d41, (q15_t)0x7d3c, (q15_t)0x7d36, (q15_t)0x7d31, (q15_t)0x7d2c,\n    (q15_t)0x7d27, (q15_t)0x7d21, (q15_t)0x7d1c, (q15_t)0x7d17, (q15_t)0x7d11,\n    (q15_t)0x7d0c, (q15_t)0x7d07, (q15_t)0x7d01, (q15_t)0x7cfc, (q15_t)0x7cf6,\n    (q15_t)0x7cf1, (q15_t)0x7cec, (q15_t)0x7ce6, (q15_t)0x7ce1, (q15_t)0x7cdb,\n    (q15_t)0x7cd5, (q15_t)0x7cd0, (q15_t)0x7cca, (q15_t)0x7cc5, (q15_t)0x7cbf,\n    (q15_t)0x7cb9, (q15_t)0x7cb4, (q15_t)0x7cae, (q15_t)0x7ca8, (q15_t)0x7ca3,\n    (q15_t)0x7c9d, (q15_t)0x7c97, (q15_t)0x7c91, (q15_t)0x7c8c, (q15_t)0x7c86,\n    (q15_t)0x7c80, (q15_t)0x7c7a, (q15_t)0x7c74, (q15_t)0x7c6e, (q15_t)0x7c69,\n    (q15_t)0x7c63, (q15_t)0x7c5d, (q15_t)0x7c57, (q15_t)0x7c51, (q15_t)0x7c4b,\n    (q15_t)0x7c45, (q15_t)0x7c3f, (q15_t)0x7c39, (q15_t)0x7c33, (q15_t)0x7c2d,\n    (q15_t)0x7c26, (q15_t)0x7c20, (q15_t)0x7c1a, (q15_t)0x7c14, (q15_t)0x7c0e,\n    (q15_t)0x7c08, (q15_t)0x7c01, (q15_t)0x7bfb, (q15_t)0x7bf5, (q15_t)0x7bef,\n    (q15_t)0x7be8, (q15_t)0x7be2, (q15_t)0x7bdc, (q15_t)0x7bd5, (q15_t)0x7bcf,\n    (q15_t)0x7bc9, (q15_t)0x7bc2, (q15_t)0x7bbc, (q15_t)0x7bb5, (q15_t)0x7baf,\n    (q15_t)0x7ba8, (q15_t)0x7ba2, (q15_t)0x7b9b, (q15_t)0x7b95, (q15_t)0x7b8e,\n    (q15_t)0x7b88, (q15_t)0x7b81, (q15_t)0x7b7a, (q15_t)0x7b74, (q15_t)0x7b6d,\n    (q15_t)0x7b67, (q15_t)0x7b60, (q15_t)0x7b59, (q15_t)0x7b52, (q15_t)0x7b4c,\n    (q15_t)0x7b45, (q15_t)0x7b3e, (q15_t)0x7b37, (q15_t)0x7b31, (q15_t)0x7b2a,\n    (q15_t)0x7b23, (q15_t)0x7b1c, (q15_t)0x7b15, (q15_t)0x7b0e, (q15_t)0x7b07,\n    (q15_t)0x7b00, (q15_t)0x7af9, (q15_t)0x7af2, (q15_t)0x7aeb, (q15_t)0x7ae4,\n    (q15_t)0x7add, (q15_t)0x7ad6, (q15_t)0x7acf, (q15_t)0x7ac8, (q15_t)0x7ac1,\n    (q15_t)0x7aba, (q15_t)0x7ab3, (q15_t)0x7aac, (q15_t)0x7aa4, (q15_t)0x7a9d,\n    (q15_t)0x7a96, (q15_t)0x7a8f, (q15_t)0x7a87, (q15_t)0x7a80, (q15_t)0x7a79,\n    (q15_t)0x7a72, (q15_t)0x7a6a, (q15_t)0x7a63, (q15_t)0x7a5c, (q15_t)0x7a54,\n    (q15_t)0x7a4d, (q15_t)0x7a45, (q15_t)0x7a3e, (q15_t)0x7a36, (q15_t)0x7a2f,\n    (q15_t)0x7a27, (q15_t)0x7a20, (q15_t)0x7a18, (q15_t)0x7a11, (q15_t)0x7a09,\n    (q15_t)0x7a02, (q15_t)0x79fa, (q15_t)0x79f2, (q15_t)0x79eb, (q15_t)0x79e3,\n    (q15_t)0x79db, (q15_t)0x79d4, (q15_t)0x79cc, (q15_t)0x79c4, (q15_t)0x79bc,\n    (q15_t)0x79b5, (q15_t)0x79ad, (q15_t)0x79a5, (q15_t)0x799d, (q15_t)0x7995,\n    (q15_t)0x798e, (q15_t)0x7986, (q15_t)0x797e, (q15_t)0x7976, (q15_t)0x796e,\n    (q15_t)0x7966, (q15_t)0x795e, (q15_t)0x7956, (q15_t)0x794e, (q15_t)0x7946,\n    (q15_t)0x793e, (q15_t)0x7936, (q15_t)0x792e, (q15_t)0x7926, (q15_t)0x791e,\n    (q15_t)0x7915, (q15_t)0x790d, (q15_t)0x7905, (q15_t)0x78fd, (q15_t)0x78f5,\n    (q15_t)0x78ec, (q15_t)0x78e4, (q15_t)0x78dc, (q15_t)0x78d4, (q15_t)0x78cb,\n    (q15_t)0x78c3, (q15_t)0x78bb, (q15_t)0x78b2, (q15_t)0x78aa, (q15_t)0x78a2,\n    (q15_t)0x7899, (q15_t)0x7891, (q15_t)0x7888, (q15_t)0x7880, (q15_t)0x7877,\n    (q15_t)0x786f, (q15_t)0x7866, (q15_t)0x785e, (q15_t)0x7855, (q15_t)0x784d,\n    (q15_t)0x7844, (q15_t)0x783b, (q15_t)0x7833, (q15_t)0x782a, (q15_t)0x7821,\n    (q15_t)0x7819, (q15_t)0x7810, (q15_t)0x7807, (q15_t)0x77ff, (q15_t)0x77f6,\n    (q15_t)0x77ed, (q15_t)0x77e4, (q15_t)0x77db, (q15_t)0x77d3, (q15_t)0x77ca,\n    (q15_t)0x77c1, (q15_t)0x77b8, (q15_t)0x77af, (q15_t)0x77a6, (q15_t)0x779d,\n    (q15_t)0x7794, (q15_t)0x778b, (q15_t)0x7782, (q15_t)0x7779, (q15_t)0x7770,\n    (q15_t)0x7767, (q15_t)0x775e, (q15_t)0x7755, (q15_t)0x774c, (q15_t)0x7743,\n    (q15_t)0x773a, (q15_t)0x7731, (q15_t)0x7727, (q15_t)0x771e, (q15_t)0x7715,\n    (q15_t)0x770c, (q15_t)0x7703, (q15_t)0x76f9, (q15_t)0x76f0, (q15_t)0x76e7,\n    (q15_t)0x76dd, (q15_t)0x76d4, (q15_t)0x76cb, (q15_t)0x76c1, (q15_t)0x76b8,\n    (q15_t)0x76af, (q15_t)0x76a5, (q15_t)0x769c, (q15_t)0x7692, (q15_t)0x7689,\n    (q15_t)0x767f, (q15_t)0x7676, (q15_t)0x766c, (q15_t)0x7663, (q15_t)0x7659,\n    (q15_t)0x7650, (q15_t)0x7646, (q15_t)0x763c, (q15_t)0x7633, (q15_t)0x7629,\n    (q15_t)0x761f, (q15_t)0x7616, (q15_t)0x760c, (q15_t)0x7602, (q15_t)0x75f9,\n    (q15_t)0x75ef, (q15_t)0x75e5, (q15_t)0x75db, (q15_t)0x75d1, (q15_t)0x75c8,\n    (q15_t)0x75be, (q15_t)0x75b4, (q15_t)0x75aa, (q15_t)0x75a0, (q15_t)0x7596,\n    (q15_t)0x758c, (q15_t)0x7582, (q15_t)0x7578, (q15_t)0x756e, (q15_t)0x7564,\n    (q15_t)0x755a, (q15_t)0x7550, (q15_t)0x7546, (q15_t)0x753c, (q15_t)0x7532,\n    (q15_t)0x7528, (q15_t)0x751e, (q15_t)0x7514, (q15_t)0x7509, (q15_t)0x74ff,\n    (q15_t)0x74f5, (q15_t)0x74eb, (q15_t)0x74e1, (q15_t)0x74d6, (q15_t)0x74cc,\n    (q15_t)0x74c2, (q15_t)0x74b7, (q15_t)0x74ad, (q15_t)0x74a3, (q15_t)0x7498,\n    (q15_t)0x748e, (q15_t)0x7484, (q15_t)0x7479, (q15_t)0x746f, (q15_t)0x7464,\n    (q15_t)0x745a, (q15_t)0x744f, (q15_t)0x7445, (q15_t)0x743a, (q15_t)0x7430,\n    (q15_t)0x7425, (q15_t)0x741b, (q15_t)0x7410, (q15_t)0x7406, (q15_t)0x73fb,\n    (q15_t)0x73f0, (q15_t)0x73e6, (q15_t)0x73db, (q15_t)0x73d0, (q15_t)0x73c6,\n    (q15_t)0x73bb, (q15_t)0x73b0, (q15_t)0x73a5, (q15_t)0x739b, (q15_t)0x7390,\n    (q15_t)0x7385, (q15_t)0x737a, (q15_t)0x736f, (q15_t)0x7364, (q15_t)0x7359,\n    (q15_t)0x734f, (q15_t)0x7344, (q15_t)0x7339, (q15_t)0x732e, (q15_t)0x7323,\n    (q15_t)0x7318, (q15_t)0x730d, (q15_t)0x7302, (q15_t)0x72f7, (q15_t)0x72ec,\n    (q15_t)0x72e1, (q15_t)0x72d5, (q15_t)0x72ca, (q15_t)0x72bf, (q15_t)0x72b4,\n    (q15_t)0x72a9, (q15_t)0x729e, (q15_t)0x7293, (q15_t)0x7287, (q15_t)0x727c,\n    (q15_t)0x7271, (q15_t)0x7266, (q15_t)0x725a, (q15_t)0x724f, (q15_t)0x7244,\n    (q15_t)0x7238, (q15_t)0x722d, (q15_t)0x7222, (q15_t)0x7216, (q15_t)0x720b,\n    (q15_t)0x71ff, (q15_t)0x71f4, (q15_t)0x71e9, (q15_t)0x71dd, (q15_t)0x71d2,\n    (q15_t)0x71c6, (q15_t)0x71bb, (q15_t)0x71af, (q15_t)0x71a3, (q15_t)0x7198,\n    (q15_t)0x718c, (q15_t)0x7181, (q15_t)0x7175, (q15_t)0x7169, (q15_t)0x715e,\n    (q15_t)0x7152, (q15_t)0x7146, (q15_t)0x713b, (q15_t)0x712f, (q15_t)0x7123,\n    (q15_t)0x7117, (q15_t)0x710c, (q15_t)0x7100, (q15_t)0x70f4, (q15_t)0x70e8,\n    (q15_t)0x70dc, (q15_t)0x70d1, (q15_t)0x70c5, (q15_t)0x70b9, (q15_t)0x70ad,\n    (q15_t)0x70a1, (q15_t)0x7095, (q15_t)0x7089, (q15_t)0x707d, (q15_t)0x7071,\n    (q15_t)0x7065, (q15_t)0x7059, (q15_t)0x704d, (q15_t)0x7041, (q15_t)0x7035,\n    (q15_t)0x7029, (q15_t)0x701d, (q15_t)0x7010, (q15_t)0x7004, (q15_t)0x6ff8,\n    (q15_t)0x6fec, (q15_t)0x6fe0, (q15_t)0x6fd3, (q15_t)0x6fc7, (q15_t)0x6fbb,\n    (q15_t)0x6faf, (q15_t)0x6fa2, (q15_t)0x6f96, (q15_t)0x6f8a, (q15_t)0x6f7d,\n    (q15_t)0x6f71, (q15_t)0x6f65, (q15_t)0x6f58, (q15_t)0x6f4c, (q15_t)0x6f3f,\n    (q15_t)0x6f33, (q15_t)0x6f27, (q15_t)0x6f1a, (q15_t)0x6f0e, (q15_t)0x6f01,\n    (q15_t)0x6ef5, (q15_t)0x6ee8, (q15_t)0x6edc, (q15_t)0x6ecf, (q15_t)0x6ec2,\n    (q15_t)0x6eb6, (q15_t)0x6ea9, (q15_t)0x6e9c, (q15_t)0x6e90, (q15_t)0x6e83,\n    (q15_t)0x6e76, (q15_t)0x6e6a, (q15_t)0x6e5d, (q15_t)0x6e50, (q15_t)0x6e44,\n    (q15_t)0x6e37, (q15_t)0x6e2a, (q15_t)0x6e1d, (q15_t)0x6e10, (q15_t)0x6e04,\n    (q15_t)0x6df7, (q15_t)0x6dea, (q15_t)0x6ddd, (q15_t)0x6dd0, (q15_t)0x6dc3,\n    (q15_t)0x6db6, (q15_t)0x6da9, (q15_t)0x6d9c, (q15_t)0x6d8f, (q15_t)0x6d82,\n    (q15_t)0x6d75, (q15_t)0x6d68, (q15_t)0x6d5b, (q15_t)0x6d4e, (q15_t)0x6d41,\n    (q15_t)0x6d34, (q15_t)0x6d27, (q15_t)0x6d1a, (q15_t)0x6d0c, (q15_t)0x6cff,\n    (q15_t)0x6cf2, (q15_t)0x6ce5, (q15_t)0x6cd8, (q15_t)0x6cca, (q15_t)0x6cbd,\n    (q15_t)0x6cb0, (q15_t)0x6ca3, (q15_t)0x6c95, (q15_t)0x6c88, (q15_t)0x6c7b,\n    (q15_t)0x6c6d, (q15_t)0x6c60, (q15_t)0x6c53, (q15_t)0x6c45, (q15_t)0x6c38,\n    (q15_t)0x6c2a, (q15_t)0x6c1d, (q15_t)0x6c0f, (q15_t)0x6c02, (q15_t)0x6bf5,\n    (q15_t)0x6be7, (q15_t)0x6bd9, (q15_t)0x6bcc, (q15_t)0x6bbe, (q15_t)0x6bb1,\n    (q15_t)0x6ba3, (q15_t)0x6b96, (q15_t)0x6b88, (q15_t)0x6b7a, (q15_t)0x6b6d,\n    (q15_t)0x6b5f, (q15_t)0x6b51, (q15_t)0x6b44, (q15_t)0x6b36, (q15_t)0x6b28,\n    (q15_t)0x6b1a, (q15_t)0x6b0d, (q15_t)0x6aff, (q15_t)0x6af1, (q15_t)0x6ae3,\n    (q15_t)0x6ad5, (q15_t)0x6ac8, (q15_t)0x6aba, (q15_t)0x6aac, (q15_t)0x6a9e,\n    (q15_t)0x6a90, (q15_t)0x6a82, (q15_t)0x6a74, (q15_t)0x6a66, (q15_t)0x6a58,\n    (q15_t)0x6a4a, (q15_t)0x6a3c, (q15_t)0x6a2e, (q15_t)0x6a20, (q15_t)0x6a12,\n    (q15_t)0x6a04, (q15_t)0x69f6, (q15_t)0x69e8, (q15_t)0x69da, (q15_t)0x69cb,\n    (q15_t)0x69bd, (q15_t)0x69af, (q15_t)0x69a1, (q15_t)0x6993, (q15_t)0x6985,\n    (q15_t)0x6976, (q15_t)0x6968, (q15_t)0x695a, (q15_t)0x694b, (q15_t)0x693d,\n    (q15_t)0x692f, (q15_t)0x6921, (q15_t)0x6912, (q15_t)0x6904, (q15_t)0x68f5,\n    (q15_t)0x68e7, (q15_t)0x68d9, (q15_t)0x68ca, (q15_t)0x68bc, (q15_t)0x68ad,\n    (q15_t)0x689f, (q15_t)0x6890, (q15_t)0x6882, (q15_t)0x6873, (q15_t)0x6865,\n    (q15_t)0x6856, (q15_t)0x6848, (q15_t)0x6839, (q15_t)0x682b, (q15_t)0x681c,\n    (q15_t)0x680d, (q15_t)0x67ff, (q15_t)0x67f0, (q15_t)0x67e1, (q15_t)0x67d3,\n    (q15_t)0x67c4, (q15_t)0x67b5, (q15_t)0x67a6, (q15_t)0x6798, (q15_t)0x6789,\n    (q15_t)0x677a, (q15_t)0x676b, (q15_t)0x675d, (q15_t)0x674e, (q15_t)0x673f,\n    (q15_t)0x6730, (q15_t)0x6721, (q15_t)0x6712, (q15_t)0x6703, (q15_t)0x66f4,\n    (q15_t)0x66e5, (q15_t)0x66d6, (q15_t)0x66c8, (q15_t)0x66b9, (q15_t)0x66aa,\n    (q15_t)0x669b, (q15_t)0x668b, (q15_t)0x667c, (q15_t)0x666d, (q15_t)0x665e,\n    (q15_t)0x664f, (q15_t)0x6640, (q15_t)0x6631, (q15_t)0x6622, (q15_t)0x6613,\n    (q15_t)0x6603, (q15_t)0x65f4, (q15_t)0x65e5, (q15_t)0x65d6, (q15_t)0x65c7,\n    (q15_t)0x65b7, (q15_t)0x65a8, (q15_t)0x6599, (q15_t)0x658a, (q15_t)0x657a,\n    (q15_t)0x656b, (q15_t)0x655c, (q15_t)0x654c, (q15_t)0x653d, (q15_t)0x652d,\n    (q15_t)0x651e, (q15_t)0x650f, (q15_t)0x64ff, (q15_t)0x64f0, (q15_t)0x64e0,\n    (q15_t)0x64d1, (q15_t)0x64c1, (q15_t)0x64b2, (q15_t)0x64a2, (q15_t)0x6493,\n    (q15_t)0x6483, (q15_t)0x6474, (q15_t)0x6464, (q15_t)0x6454, (q15_t)0x6445,\n    (q15_t)0x6435, (q15_t)0x6426, (q15_t)0x6416, (q15_t)0x6406, (q15_t)0x63f7,\n    (q15_t)0x63e7, (q15_t)0x63d7, (q15_t)0x63c7, (q15_t)0x63b8, (q15_t)0x63a8,\n    (q15_t)0x6398, (q15_t)0x6388, (q15_t)0x6378, (q15_t)0x6369, (q15_t)0x6359,\n    (q15_t)0x6349, (q15_t)0x6339, (q15_t)0x6329, (q15_t)0x6319, (q15_t)0x6309,\n    (q15_t)0x62f9, (q15_t)0x62ea, (q15_t)0x62da, (q15_t)0x62ca, (q15_t)0x62ba,\n    (q15_t)0x62aa, (q15_t)0x629a, (q15_t)0x628a, (q15_t)0x627a, (q15_t)0x6269,\n    (q15_t)0x6259, (q15_t)0x6249, (q15_t)0x6239, (q15_t)0x6229, (q15_t)0x6219,\n    (q15_t)0x6209, (q15_t)0x61f9, (q15_t)0x61e8, (q15_t)0x61d8, (q15_t)0x61c8,\n    (q15_t)0x61b8, (q15_t)0x61a8, (q15_t)0x6197, (q15_t)0x6187, (q15_t)0x6177,\n    (q15_t)0x6166, (q15_t)0x6156, (q15_t)0x6146, (q15_t)0x6135, (q15_t)0x6125,\n    (q15_t)0x6115, (q15_t)0x6104, (q15_t)0x60f4, (q15_t)0x60e4, (q15_t)0x60d3,\n    (q15_t)0x60c3, (q15_t)0x60b2, (q15_t)0x60a2, (q15_t)0x6091, (q15_t)0x6081,\n    (q15_t)0x6070, (q15_t)0x6060, (q15_t)0x604f, (q15_t)0x603f, (q15_t)0x602e,\n    (q15_t)0x601d, (q15_t)0x600d, (q15_t)0x5ffc, (q15_t)0x5fec, (q15_t)0x5fdb,\n    (q15_t)0x5fca, (q15_t)0x5fba, (q15_t)0x5fa9, (q15_t)0x5f98, (q15_t)0x5f87,\n    (q15_t)0x5f77, (q15_t)0x5f66, (q15_t)0x5f55, (q15_t)0x5f44, (q15_t)0x5f34,\n    (q15_t)0x5f23, (q15_t)0x5f12, (q15_t)0x5f01, (q15_t)0x5ef0, (q15_t)0x5edf,\n    (q15_t)0x5ecf, (q15_t)0x5ebe, (q15_t)0x5ead, (q15_t)0x5e9c, (q15_t)0x5e8b,\n    (q15_t)0x5e7a, (q15_t)0x5e69, (q15_t)0x5e58, (q15_t)0x5e47, (q15_t)0x5e36,\n    (q15_t)0x5e25, (q15_t)0x5e14, (q15_t)0x5e03, (q15_t)0x5df2, (q15_t)0x5de1,\n    (q15_t)0x5dd0, (q15_t)0x5dbf, (q15_t)0x5dad, (q15_t)0x5d9c, (q15_t)0x5d8b,\n    (q15_t)0x5d7a, (q15_t)0x5d69, (q15_t)0x5d58, (q15_t)0x5d46, (q15_t)0x5d35,\n    (q15_t)0x5d24, (q15_t)0x5d13, (q15_t)0x5d01, (q15_t)0x5cf0, (q15_t)0x5cdf,\n    (q15_t)0x5cce, (q15_t)0x5cbc, (q15_t)0x5cab, (q15_t)0x5c9a, (q15_t)0x5c88,\n    (q15_t)0x5c77, (q15_t)0x5c66, (q15_t)0x5c54, (q15_t)0x5c43, (q15_t)0x5c31,\n    (q15_t)0x5c20, (q15_t)0x5c0e, (q15_t)0x5bfd, (q15_t)0x5beb, (q15_t)0x5bda,\n    (q15_t)0x5bc8, (q15_t)0x5bb7, (q15_t)0x5ba5, (q15_t)0x5b94, (q15_t)0x5b82,\n    (q15_t)0x5b71, (q15_t)0x5b5f, (q15_t)0x5b4d, (q15_t)0x5b3c, (q15_t)0x5b2a,\n    (q15_t)0x5b19, (q15_t)0x5b07, (q15_t)0x5af5, (q15_t)0x5ae4, (q15_t)0x5ad2,\n    (q15_t)0x5ac0, (q15_t)0x5aae, (q15_t)0x5a9d, (q15_t)0x5a8b, (q15_t)0x5a79,\n    (q15_t)0x5a67, (q15_t)0x5a56, (q15_t)0x5a44, (q15_t)0x5a32, (q15_t)0x5a20,\n    (q15_t)0x5a0e, (q15_t)0x59fc, (q15_t)0x59ea, (q15_t)0x59d9, (q15_t)0x59c7,\n    (q15_t)0x59b5, (q15_t)0x59a3, (q15_t)0x5991, (q15_t)0x597f, (q15_t)0x596d,\n    (q15_t)0x595b, (q15_t)0x5949, (q15_t)0x5937, (q15_t)0x5925, (q15_t)0x5913,\n    (q15_t)0x5901, (q15_t)0x58ef, (q15_t)0x58dd, (q15_t)0x58cb, (q15_t)0x58b8,\n    (q15_t)0x58a6, (q15_t)0x5894, (q15_t)0x5882, (q15_t)0x5870, (q15_t)0x585e,\n    (q15_t)0x584b, (q15_t)0x5839, (q15_t)0x5827, (q15_t)0x5815, (q15_t)0x5803,\n    (q15_t)0x57f0, (q15_t)0x57de, (q15_t)0x57cc, (q15_t)0x57b9, (q15_t)0x57a7,\n    (q15_t)0x5795, (q15_t)0x5783, (q15_t)0x5770, (q15_t)0x575e, (q15_t)0x574b,\n    (q15_t)0x5739, (q15_t)0x5727, (q15_t)0x5714, (q15_t)0x5702, (q15_t)0x56ef,\n    (q15_t)0x56dd, (q15_t)0x56ca, (q15_t)0x56b8, (q15_t)0x56a5, (q15_t)0x5693,\n    (q15_t)0x5680, (q15_t)0x566e, (q15_t)0x565b, (q15_t)0x5649, (q15_t)0x5636,\n    (q15_t)0x5624, (q15_t)0x5611, (q15_t)0x55fe, (q15_t)0x55ec, (q15_t)0x55d9,\n    (q15_t)0x55c7, (q15_t)0x55b4, (q15_t)0x55a1, (q15_t)0x558f, (q15_t)0x557c,\n    (q15_t)0x5569, (q15_t)0x5556, (q15_t)0x5544, (q15_t)0x5531, (q15_t)0x551e,\n    (q15_t)0x550b, (q15_t)0x54f9, (q15_t)0x54e6, (q15_t)0x54d3, (q15_t)0x54c0,\n    (q15_t)0x54ad, (q15_t)0x549a, (q15_t)0x5488, (q15_t)0x5475, (q15_t)0x5462,\n    (q15_t)0x544f, (q15_t)0x543c, (q15_t)0x5429, (q15_t)0x5416, (q15_t)0x5403,\n    (q15_t)0x53f0, (q15_t)0x53dd, (q15_t)0x53ca, (q15_t)0x53b7, (q15_t)0x53a4,\n    (q15_t)0x5391, (q15_t)0x537e, (q15_t)0x536b, (q15_t)0x5358, (q15_t)0x5345,\n    (q15_t)0x5332, (q15_t)0x531f, (q15_t)0x530c, (q15_t)0x52f8, (q15_t)0x52e5,\n    (q15_t)0x52d2, (q15_t)0x52bf, (q15_t)0x52ac, (q15_t)0x5299, (q15_t)0x5285,\n    (q15_t)0x5272, (q15_t)0x525f, (q15_t)0x524c, (q15_t)0x5238, (q15_t)0x5225,\n    (q15_t)0x5212, (q15_t)0x51ff, (q15_t)0x51eb, (q15_t)0x51d8, (q15_t)0x51c5,\n    (q15_t)0x51b1, (q15_t)0x519e, (q15_t)0x518b, (q15_t)0x5177, (q15_t)0x5164,\n    (q15_t)0x5150, (q15_t)0x513d, (q15_t)0x512a, (q15_t)0x5116, (q15_t)0x5103,\n    (q15_t)0x50ef, (q15_t)0x50dc, (q15_t)0x50c8, (q15_t)0x50b5, (q15_t)0x50a1,\n    (q15_t)0x508e, (q15_t)0x507a, (q15_t)0x5067, (q15_t)0x5053, (q15_t)0x503f,\n    (q15_t)0x502c, (q15_t)0x5018, (q15_t)0x5005, (q15_t)0x4ff1, (q15_t)0x4fdd,\n    (q15_t)0x4fca, (q15_t)0x4fb6, (q15_t)0x4fa2, (q15_t)0x4f8f, (q15_t)0x4f7b,\n    (q15_t)0x4f67, (q15_t)0x4f54, (q15_t)0x4f40, (q15_t)0x4f2c, (q15_t)0x4f18,\n    (q15_t)0x4f05, (q15_t)0x4ef1, (q15_t)0x4edd, (q15_t)0x4ec9, (q15_t)0x4eb6,\n    (q15_t)0x4ea2, (q15_t)0x4e8e, (q15_t)0x4e7a, (q15_t)0x4e66, (q15_t)0x4e52,\n    (q15_t)0x4e3e, (q15_t)0x4e2a, (q15_t)0x4e17, (q15_t)0x4e03, (q15_t)0x4def,\n    (q15_t)0x4ddb, (q15_t)0x4dc7, (q15_t)0x4db3, (q15_t)0x4d9f, (q15_t)0x4d8b,\n    (q15_t)0x4d77, (q15_t)0x4d63, (q15_t)0x4d4f, (q15_t)0x4d3b, (q15_t)0x4d27,\n    (q15_t)0x4d13, (q15_t)0x4cff, (q15_t)0x4ceb, (q15_t)0x4cd6, (q15_t)0x4cc2,\n    (q15_t)0x4cae, (q15_t)0x4c9a, (q15_t)0x4c86, (q15_t)0x4c72, (q15_t)0x4c5e,\n    (q15_t)0x4c49, (q15_t)0x4c35, (q15_t)0x4c21, (q15_t)0x4c0d, (q15_t)0x4bf9,\n    (q15_t)0x4be4, (q15_t)0x4bd0, (q15_t)0x4bbc, (q15_t)0x4ba8, (q15_t)0x4b93,\n    (q15_t)0x4b7f, (q15_t)0x4b6b, (q15_t)0x4b56, (q15_t)0x4b42, (q15_t)0x4b2e,\n    (q15_t)0x4b19, (q15_t)0x4b05, (q15_t)0x4af1, (q15_t)0x4adc, (q15_t)0x4ac8,\n    (q15_t)0x4ab4, (q15_t)0x4a9f, (q15_t)0x4a8b, (q15_t)0x4a76, (q15_t)0x4a62,\n    (q15_t)0x4a4d, (q15_t)0x4a39, (q15_t)0x4a24, (q15_t)0x4a10, (q15_t)0x49fb,\n    (q15_t)0x49e7, (q15_t)0x49d2, (q15_t)0x49be, (q15_t)0x49a9, (q15_t)0x4995,\n    (q15_t)0x4980, (q15_t)0x496c, (q15_t)0x4957, (q15_t)0x4942, (q15_t)0x492e,\n    (q15_t)0x4919, (q15_t)0x4905, (q15_t)0x48f0, (q15_t)0x48db, (q15_t)0x48c7,\n    (q15_t)0x48b2, (q15_t)0x489d, (q15_t)0x4888, (q15_t)0x4874, (q15_t)0x485f,\n    (q15_t)0x484a, (q15_t)0x4836, (q15_t)0x4821, (q15_t)0x480c, (q15_t)0x47f7,\n    (q15_t)0x47e2, (q15_t)0x47ce, (q15_t)0x47b9, (q15_t)0x47a4, (q15_t)0x478f,\n    (q15_t)0x477a, (q15_t)0x4765, (q15_t)0x4751, (q15_t)0x473c, (q15_t)0x4727,\n    (q15_t)0x4712, (q15_t)0x46fd, (q15_t)0x46e8, (q15_t)0x46d3, (q15_t)0x46be,\n    (q15_t)0x46a9, (q15_t)0x4694, (q15_t)0x467f, (q15_t)0x466a, (q15_t)0x4655,\n    (q15_t)0x4640, (q15_t)0x462b, (q15_t)0x4616, (q15_t)0x4601, (q15_t)0x45ec,\n    (q15_t)0x45d7, (q15_t)0x45c2, (q15_t)0x45ad, (q15_t)0x4598, (q15_t)0x4583,\n    (q15_t)0x456e, (q15_t)0x4559, (q15_t)0x4544, (q15_t)0x452e, (q15_t)0x4519,\n    (q15_t)0x4504, (q15_t)0x44ef, (q15_t)0x44da, (q15_t)0x44c5, (q15_t)0x44af,\n    (q15_t)0x449a, (q15_t)0x4485, (q15_t)0x4470, (q15_t)0x445a, (q15_t)0x4445,\n    (q15_t)0x4430, (q15_t)0x441b, (q15_t)0x4405, (q15_t)0x43f0, (q15_t)0x43db,\n    (q15_t)0x43c5, (q15_t)0x43b0, (q15_t)0x439b, (q15_t)0x4385, (q15_t)0x4370,\n    (q15_t)0x435b, (q15_t)0x4345, (q15_t)0x4330, (q15_t)0x431b, (q15_t)0x4305,\n    (q15_t)0x42f0, (q15_t)0x42da, (q15_t)0x42c5, (q15_t)0x42af, (q15_t)0x429a,\n    (q15_t)0x4284, (q15_t)0x426f, (q15_t)0x425a, (q15_t)0x4244, (q15_t)0x422f,\n    (q15_t)0x4219, (q15_t)0x4203, (q15_t)0x41ee, (q15_t)0x41d8, (q15_t)0x41c3,\n    (q15_t)0x41ad, (q15_t)0x4198, (q15_t)0x4182, (q15_t)0x416d, (q15_t)0x4157,\n    (q15_t)0x4141, (q15_t)0x412c, (q15_t)0x4116, (q15_t)0x4100, (q15_t)0x40eb,\n    (q15_t)0x40d5, (q15_t)0x40bf, (q15_t)0x40aa, (q15_t)0x4094, (q15_t)0x407e,\n    (q15_t)0x4069, (q15_t)0x4053, (q15_t)0x403d, (q15_t)0x4027, (q15_t)0x4012,\n    (q15_t)0x3ffc, (q15_t)0x3fe6, (q15_t)0x3fd0, (q15_t)0x3fbb, (q15_t)0x3fa5,\n    (q15_t)0x3f8f, (q15_t)0x3f79, (q15_t)0x3f63, (q15_t)0x3f4d, (q15_t)0x3f38,\n    (q15_t)0x3f22, (q15_t)0x3f0c, (q15_t)0x3ef6, (q15_t)0x3ee0, (q15_t)0x3eca,\n    (q15_t)0x3eb4, (q15_t)0x3e9e, (q15_t)0x3e88, (q15_t)0x3e73, (q15_t)0x3e5d,\n    (q15_t)0x3e47, (q15_t)0x3e31, (q15_t)0x3e1b, (q15_t)0x3e05, (q15_t)0x3def,\n    (q15_t)0x3dd9, (q15_t)0x3dc3, (q15_t)0x3dad, (q15_t)0x3d97, (q15_t)0x3d81,\n    (q15_t)0x3d6b, (q15_t)0x3d55, (q15_t)0x3d3e, (q15_t)0x3d28, (q15_t)0x3d12,\n    (q15_t)0x3cfc, (q15_t)0x3ce6, (q15_t)0x3cd0, (q15_t)0x3cba, (q15_t)0x3ca4,\n    (q15_t)0x3c8e, (q15_t)0x3c77, (q15_t)0x3c61, (q15_t)0x3c4b, (q15_t)0x3c35,\n    (q15_t)0x3c1f, (q15_t)0x3c09, (q15_t)0x3bf2, (q15_t)0x3bdc, (q15_t)0x3bc6,\n    (q15_t)0x3bb0, (q15_t)0x3b99, (q15_t)0x3b83, (q15_t)0x3b6d, (q15_t)0x3b57,\n    (q15_t)0x3b40, (q15_t)0x3b2a, (q15_t)0x3b14, (q15_t)0x3afe, (q15_t)0x3ae7,\n    (q15_t)0x3ad1, (q15_t)0x3abb, (q15_t)0x3aa4, (q15_t)0x3a8e, (q15_t)0x3a78,\n    (q15_t)0x3a61, (q15_t)0x3a4b, (q15_t)0x3a34, (q15_t)0x3a1e, (q15_t)0x3a08,\n    (q15_t)0x39f1, (q15_t)0x39db, (q15_t)0x39c4, (q15_t)0x39ae, (q15_t)0x3998,\n    (q15_t)0x3981, (q15_t)0x396b, (q15_t)0x3954, (q15_t)0x393e, (q15_t)0x3927,\n    (q15_t)0x3911, (q15_t)0x38fa, (q15_t)0x38e4, (q15_t)0x38cd, (q15_t)0x38b7,\n    (q15_t)0x38a0, (q15_t)0x388a, (q15_t)0x3873, (q15_t)0x385d, (q15_t)0x3846,\n    (q15_t)0x382f, (q15_t)0x3819, (q15_t)0x3802, (q15_t)0x37ec, (q15_t)0x37d5,\n    (q15_t)0x37be, (q15_t)0x37a8, (q15_t)0x3791, (q15_t)0x377a, (q15_t)0x3764,\n    (q15_t)0x374d, (q15_t)0x3736, (q15_t)0x3720, (q15_t)0x3709, (q15_t)0x36f2,\n    (q15_t)0x36dc, (q15_t)0x36c5, (q15_t)0x36ae, (q15_t)0x3698, (q15_t)0x3681,\n    (q15_t)0x366a, (q15_t)0x3653, (q15_t)0x363d, (q15_t)0x3626, (q15_t)0x360f,\n    (q15_t)0x35f8, (q15_t)0x35e1, (q15_t)0x35cb, (q15_t)0x35b4, (q15_t)0x359d,\n    (q15_t)0x3586, (q15_t)0x356f, (q15_t)0x3558, (q15_t)0x3542, (q15_t)0x352b,\n    (q15_t)0x3514, (q15_t)0x34fd, (q15_t)0x34e6, (q15_t)0x34cf, (q15_t)0x34b8,\n    (q15_t)0x34a1, (q15_t)0x348b, (q15_t)0x3474, (q15_t)0x345d, (q15_t)0x3446,\n    (q15_t)0x342f, (q15_t)0x3418, (q15_t)0x3401, (q15_t)0x33ea, (q15_t)0x33d3,\n    (q15_t)0x33bc, (q15_t)0x33a5, (q15_t)0x338e, (q15_t)0x3377, (q15_t)0x3360,\n    (q15_t)0x3349, (q15_t)0x3332, (q15_t)0x331b, (q15_t)0x3304, (q15_t)0x32ed,\n    (q15_t)0x32d6, (q15_t)0x32bf, (q15_t)0x32a8, (q15_t)0x3290, (q15_t)0x3279,\n    (q15_t)0x3262, (q15_t)0x324b, (q15_t)0x3234, (q15_t)0x321d, (q15_t)0x3206,\n    (q15_t)0x31ef, (q15_t)0x31d8, (q15_t)0x31c0, (q15_t)0x31a9, (q15_t)0x3192,\n    (q15_t)0x317b, (q15_t)0x3164, (q15_t)0x314c, (q15_t)0x3135, (q15_t)0x311e,\n    (q15_t)0x3107, (q15_t)0x30f0, (q15_t)0x30d8, (q15_t)0x30c1, (q15_t)0x30aa,\n    (q15_t)0x3093, (q15_t)0x307b, (q15_t)0x3064, (q15_t)0x304d, (q15_t)0x3036,\n    (q15_t)0x301e, (q15_t)0x3007, (q15_t)0x2ff0, (q15_t)0x2fd8, (q15_t)0x2fc1,\n    (q15_t)0x2faa, (q15_t)0x2f92, (q15_t)0x2f7b, (q15_t)0x2f64, (q15_t)0x2f4c,\n    (q15_t)0x2f35, (q15_t)0x2f1e, (q15_t)0x2f06, (q15_t)0x2eef, (q15_t)0x2ed8,\n    (q15_t)0x2ec0, (q15_t)0x2ea9, (q15_t)0x2e91, (q15_t)0x2e7a, (q15_t)0x2e63,\n    (q15_t)0x2e4b, (q15_t)0x2e34, (q15_t)0x2e1c, (q15_t)0x2e05, (q15_t)0x2ded,\n    (q15_t)0x2dd6, (q15_t)0x2dbe, (q15_t)0x2da7, (q15_t)0x2d8f, (q15_t)0x2d78,\n    (q15_t)0x2d60, (q15_t)0x2d49, (q15_t)0x2d31, (q15_t)0x2d1a, (q15_t)0x2d02,\n    (q15_t)0x2ceb, (q15_t)0x2cd3, (q15_t)0x2cbc, (q15_t)0x2ca4, (q15_t)0x2c8d,\n    (q15_t)0x2c75, (q15_t)0x2c5e, (q15_t)0x2c46, (q15_t)0x2c2e, (q15_t)0x2c17,\n    (q15_t)0x2bff, (q15_t)0x2be8, (q15_t)0x2bd0, (q15_t)0x2bb8, (q15_t)0x2ba1,\n    (q15_t)0x2b89, (q15_t)0x2b71, (q15_t)0x2b5a, (q15_t)0x2b42, (q15_t)0x2b2b,\n    (q15_t)0x2b13, (q15_t)0x2afb, (q15_t)0x2ae4, (q15_t)0x2acc, (q15_t)0x2ab4,\n    (q15_t)0x2a9c, (q15_t)0x2a85, (q15_t)0x2a6d, (q15_t)0x2a55, (q15_t)0x2a3e,\n    (q15_t)0x2a26, (q15_t)0x2a0e, (q15_t)0x29f6, (q15_t)0x29df, (q15_t)0x29c7,\n    (q15_t)0x29af, (q15_t)0x2997, (q15_t)0x2980, (q15_t)0x2968, (q15_t)0x2950,\n    (q15_t)0x2938, (q15_t)0x2920, (q15_t)0x2909, (q15_t)0x28f1, (q15_t)0x28d9,\n    (q15_t)0x28c1, (q15_t)0x28a9, (q15_t)0x2892, (q15_t)0x287a, (q15_t)0x2862,\n    (q15_t)0x284a, (q15_t)0x2832, (q15_t)0x281a, (q15_t)0x2802, (q15_t)0x27eb,\n    (q15_t)0x27d3, (q15_t)0x27bb, (q15_t)0x27a3, (q15_t)0x278b, (q15_t)0x2773,\n    (q15_t)0x275b, (q15_t)0x2743, (q15_t)0x272b, (q15_t)0x2713, (q15_t)0x26fb,\n    (q15_t)0x26e4, (q15_t)0x26cc, (q15_t)0x26b4, (q15_t)0x269c, (q15_t)0x2684,\n    (q15_t)0x266c, (q15_t)0x2654, (q15_t)0x263c, (q15_t)0x2624, (q15_t)0x260c,\n    (q15_t)0x25f4, (q15_t)0x25dc, (q15_t)0x25c4, (q15_t)0x25ac, (q15_t)0x2594,\n    (q15_t)0x257c, (q15_t)0x2564, (q15_t)0x254c, (q15_t)0x2534, (q15_t)0x251c,\n    (q15_t)0x2503, (q15_t)0x24eb, (q15_t)0x24d3, (q15_t)0x24bb, (q15_t)0x24a3,\n    (q15_t)0x248b, (q15_t)0x2473, (q15_t)0x245b, (q15_t)0x2443, (q15_t)0x242b,\n    (q15_t)0x2413, (q15_t)0x23fa, (q15_t)0x23e2, (q15_t)0x23ca, (q15_t)0x23b2,\n    (q15_t)0x239a, (q15_t)0x2382, (q15_t)0x236a, (q15_t)0x2352, (q15_t)0x2339,\n    (q15_t)0x2321, (q15_t)0x2309, (q15_t)0x22f1, (q15_t)0x22d9, (q15_t)0x22c0,\n    (q15_t)0x22a8, (q15_t)0x2290, (q15_t)0x2278, (q15_t)0x2260, (q15_t)0x2247,\n    (q15_t)0x222f, (q15_t)0x2217, (q15_t)0x21ff, (q15_t)0x21e7, (q15_t)0x21ce,\n    (q15_t)0x21b6, (q15_t)0x219e, (q15_t)0x2186, (q15_t)0x216d, (q15_t)0x2155,\n    (q15_t)0x213d, (q15_t)0x2125, (q15_t)0x210c, (q15_t)0x20f4, (q15_t)0x20dc,\n    (q15_t)0x20c3, (q15_t)0x20ab, (q15_t)0x2093, (q15_t)0x207a, (q15_t)0x2062,\n    (q15_t)0x204a, (q15_t)0x2032, (q15_t)0x2019, (q15_t)0x2001, (q15_t)0x1fe9,\n    (q15_t)0x1fd0, (q15_t)0x1fb8, (q15_t)0x1f9f, (q15_t)0x1f87, (q15_t)0x1f6f,\n    (q15_t)0x1f56, (q15_t)0x1f3e, (q15_t)0x1f26, (q15_t)0x1f0d, (q15_t)0x1ef5,\n    (q15_t)0x1edd, (q15_t)0x1ec4, (q15_t)0x1eac, (q15_t)0x1e93, (q15_t)0x1e7b,\n    (q15_t)0x1e62, (q15_t)0x1e4a, (q15_t)0x1e32, (q15_t)0x1e19, (q15_t)0x1e01,\n    (q15_t)0x1de8, (q15_t)0x1dd0, (q15_t)0x1db7, (q15_t)0x1d9f, (q15_t)0x1d87,\n    (q15_t)0x1d6e, (q15_t)0x1d56, (q15_t)0x1d3d, (q15_t)0x1d25, (q15_t)0x1d0c,\n    (q15_t)0x1cf4, (q15_t)0x1cdb, (q15_t)0x1cc3, (q15_t)0x1caa, (q15_t)0x1c92,\n    (q15_t)0x1c79, (q15_t)0x1c61, (q15_t)0x1c48, (q15_t)0x1c30, (q15_t)0x1c17,\n    (q15_t)0x1bff, (q15_t)0x1be6, (q15_t)0x1bce, (q15_t)0x1bb5, (q15_t)0x1b9d,\n    (q15_t)0x1b84, (q15_t)0x1b6c, (q15_t)0x1b53, (q15_t)0x1b3a, (q15_t)0x1b22,\n    (q15_t)0x1b09, (q15_t)0x1af1, (q15_t)0x1ad8, (q15_t)0x1ac0, (q15_t)0x1aa7,\n    (q15_t)0x1a8e, (q15_t)0x1a76, (q15_t)0x1a5d, (q15_t)0x1a45, (q15_t)0x1a2c,\n    (q15_t)0x1a13, (q15_t)0x19fb, (q15_t)0x19e2, (q15_t)0x19ca, (q15_t)0x19b1,\n    (q15_t)0x1998, (q15_t)0x1980, (q15_t)0x1967, (q15_t)0x194e, (q15_t)0x1936,\n    (q15_t)0x191d, (q15_t)0x1905, (q15_t)0x18ec, (q15_t)0x18d3, (q15_t)0x18bb,\n    (q15_t)0x18a2, (q15_t)0x1889, (q15_t)0x1871, (q15_t)0x1858, (q15_t)0x183f,\n    (q15_t)0x1827, (q15_t)0x180e, (q15_t)0x17f5, (q15_t)0x17dd, (q15_t)0x17c4,\n    (q15_t)0x17ab, (q15_t)0x1792, (q15_t)0x177a, (q15_t)0x1761, (q15_t)0x1748,\n    (q15_t)0x1730, (q15_t)0x1717, (q15_t)0x16fe, (q15_t)0x16e5, (q15_t)0x16cd,\n    (q15_t)0x16b4, (q15_t)0x169b, (q15_t)0x1682, (q15_t)0x166a, (q15_t)0x1651,\n    (q15_t)0x1638, (q15_t)0x161f, (q15_t)0x1607, (q15_t)0x15ee, (q15_t)0x15d5,\n    (q15_t)0x15bc, (q15_t)0x15a4, (q15_t)0x158b, (q15_t)0x1572, (q15_t)0x1559,\n    (q15_t)0x1541, (q15_t)0x1528, (q15_t)0x150f, (q15_t)0x14f6, (q15_t)0x14dd,\n    (q15_t)0x14c5, (q15_t)0x14ac, (q15_t)0x1493, (q15_t)0x147a, (q15_t)0x1461,\n    (q15_t)0x1449, (q15_t)0x1430, (q15_t)0x1417, (q15_t)0x13fe, (q15_t)0x13e5,\n    (q15_t)0x13cc, (q15_t)0x13b4, (q15_t)0x139b, (q15_t)0x1382, (q15_t)0x1369,\n    (q15_t)0x1350, (q15_t)0x1337, (q15_t)0x131f, (q15_t)0x1306, (q15_t)0x12ed,\n    (q15_t)0x12d4, (q15_t)0x12bb, (q15_t)0x12a2, (q15_t)0x1289, (q15_t)0x1271,\n    (q15_t)0x1258, (q15_t)0x123f, (q15_t)0x1226, (q15_t)0x120d, (q15_t)0x11f4,\n    (q15_t)0x11db, (q15_t)0x11c2, (q15_t)0x11a9, (q15_t)0x1191, (q15_t)0x1178,\n    (q15_t)0x115f, (q15_t)0x1146, (q15_t)0x112d, (q15_t)0x1114, (q15_t)0x10fb,\n    (q15_t)0x10e2, (q15_t)0x10c9, (q15_t)0x10b0, (q15_t)0x1098, (q15_t)0x107f,\n    (q15_t)0x1066, (q15_t)0x104d, (q15_t)0x1034, (q15_t)0x101b, (q15_t)0x1002,\n    (q15_t)0xfe9,  (q15_t)0xfd0,  (q15_t)0xfb7,  (q15_t)0xf9e,  (q15_t)0xf85,\n    (q15_t)0xf6c,  (q15_t)0xf53,  (q15_t)0xf3a,  (q15_t)0xf21,  (q15_t)0xf08,\n    (q15_t)0xef0,  (q15_t)0xed7,  (q15_t)0xebe,  (q15_t)0xea5,  (q15_t)0xe8c,\n    (q15_t)0xe73,  (q15_t)0xe5a,  (q15_t)0xe41,  (q15_t)0xe28,  (q15_t)0xe0f,\n    (q15_t)0xdf6,  (q15_t)0xddd,  (q15_t)0xdc4,  (q15_t)0xdab,  (q15_t)0xd92,\n    (q15_t)0xd79,  (q15_t)0xd60,  (q15_t)0xd47,  (q15_t)0xd2e,  (q15_t)0xd15,\n    (q15_t)0xcfc,  (q15_t)0xce3,  (q15_t)0xcca,  (q15_t)0xcb1,  (q15_t)0xc98,\n    (q15_t)0xc7f,  (q15_t)0xc66,  (q15_t)0xc4d,  (q15_t)0xc34,  (q15_t)0xc1b,\n    (q15_t)0xc02,  (q15_t)0xbe9,  (q15_t)0xbd0,  (q15_t)0xbb7,  (q15_t)0xb9e,\n    (q15_t)0xb85,  (q15_t)0xb6c,  (q15_t)0xb53,  (q15_t)0xb3a,  (q15_t)0xb20,\n    (q15_t)0xb07,  (q15_t)0xaee,  (q15_t)0xad5,  (q15_t)0xabc,  (q15_t)0xaa3,\n    (q15_t)0xa8a,  (q15_t)0xa71,  (q15_t)0xa58,  (q15_t)0xa3f,  (q15_t)0xa26,\n    (q15_t)0xa0d,  (q15_t)0x9f4,  (q15_t)0x9db,  (q15_t)0x9c2,  (q15_t)0x9a9,\n    (q15_t)0x990,  (q15_t)0x977,  (q15_t)0x95e,  (q15_t)0x944,  (q15_t)0x92b,\n    (q15_t)0x912,  (q15_t)0x8f9,  (q15_t)0x8e0,  (q15_t)0x8c7,  (q15_t)0x8ae,\n    (q15_t)0x895,  (q15_t)0x87c,  (q15_t)0x863,  (q15_t)0x84a,  (q15_t)0x831,\n    (q15_t)0x818,  (q15_t)0x7fe,  (q15_t)0x7e5,  (q15_t)0x7cc,  (q15_t)0x7b3,\n    (q15_t)0x79a,  (q15_t)0x781,  (q15_t)0x768,  (q15_t)0x74f,  (q15_t)0x736,\n    (q15_t)0x71d,  (q15_t)0x704,  (q15_t)0x6ea,  (q15_t)0x6d1,  (q15_t)0x6b8,\n    (q15_t)0x69f,  (q15_t)0x686,  (q15_t)0x66d,  (q15_t)0x654,  (q15_t)0x63b,\n    (q15_t)0x622,  (q15_t)0x609,  (q15_t)0x5ef,  (q15_t)0x5d6,  (q15_t)0x5bd,\n    (q15_t)0x5a4,  (q15_t)0x58b,  (q15_t)0x572,  (q15_t)0x559,  (q15_t)0x540,\n    (q15_t)0x527,  (q15_t)0x50d,  (q15_t)0x4f4,  (q15_t)0x4db,  (q15_t)0x4c2,\n    (q15_t)0x4a9,  (q15_t)0x490,  (q15_t)0x477,  (q15_t)0x45e,  (q15_t)0x445,\n    (q15_t)0x42b,  (q15_t)0x412,  (q15_t)0x3f9,  (q15_t)0x3e0,  (q15_t)0x3c7,\n    (q15_t)0x3ae,  (q15_t)0x395,  (q15_t)0x37c,  (q15_t)0x362,  (q15_t)0x349,\n    (q15_t)0x330,  (q15_t)0x317,  (q15_t)0x2fe,  (q15_t)0x2e5,  (q15_t)0x2cc,\n    (q15_t)0x2b3,  (q15_t)0x299,  (q15_t)0x280,  (q15_t)0x267,  (q15_t)0x24e,\n    (q15_t)0x235,  (q15_t)0x21c,  (q15_t)0x203,  (q15_t)0x1ea,  (q15_t)0x1d0,\n    (q15_t)0x1b7,  (q15_t)0x19e,  (q15_t)0x185,  (q15_t)0x16c,  (q15_t)0x153,\n    (q15_t)0x13a,  (q15_t)0x121,  (q15_t)0x107,  (q15_t)0xee,   (q15_t)0xd5,\n    (q15_t)0xbc,   (q15_t)0xa3,   (q15_t)0x8a,   (q15_t)0x71,   (q15_t)0x57,\n    (q15_t)0x3e,   (q15_t)0x25,   (q15_t)0xc\n\n};\n\nstatic const q15_t __ALIGNED(4) cos_factorsQ15_8192[8192] = {\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,\n    (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,\n    (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,\n    (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,\n    (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd,\n    (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd,\n    (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd,\n    (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc,\n    (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc,\n    (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb,\n    (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb,\n    (q15_t)0x7ffb, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa,\n    (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa,\n    (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9,\n    (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8,\n    (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8,\n    (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7,\n    (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6,\n    (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff5,\n    (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5,\n    (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4,\n    (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3,\n    (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2,\n    (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1,\n    (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff0, (q15_t)0x7ff0,\n    (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fef,\n    (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fee, (q15_t)0x7fee,\n    (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fed,\n    (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec,\n    (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7feb,\n    (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea,\n    (q15_t)0x7fea, (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe9,\n    (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8,\n    (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe6,\n    (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe5, (q15_t)0x7fe5,\n    (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4,\n    (q15_t)0x7fe4, (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe2,\n    (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe1, (q15_t)0x7fe1,\n    (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fe0,\n    (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fde,\n    (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fdd, (q15_t)0x7fdd,\n    (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdb,\n    (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fda, (q15_t)0x7fda,\n    (q15_t)0x7fda, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd8,\n    (q15_t)0x7fd8, (q15_t)0x7fd8, (q15_t)0x7fd8, (q15_t)0x7fd7, (q15_t)0x7fd7,\n    (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd6, (q15_t)0x7fd6, (q15_t)0x7fd5,\n    (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd4,\n    (q15_t)0x7fd3, (q15_t)0x7fd3, (q15_t)0x7fd3, (q15_t)0x7fd2, (q15_t)0x7fd2,\n    (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd0,\n    (q15_t)0x7fd0, (q15_t)0x7fd0, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fcf,\n    (q15_t)0x7fce, (q15_t)0x7fce, (q15_t)0x7fce, (q15_t)0x7fcd, (q15_t)0x7fcd,\n    (q15_t)0x7fcd, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcb,\n    (q15_t)0x7fcb, (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fca, (q15_t)0x7fc9,\n    (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc8, (q15_t)0x7fc8, (q15_t)0x7fc8,\n    (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc6,\n    (q15_t)0x7fc5, (q15_t)0x7fc5, (q15_t)0x7fc5, (q15_t)0x7fc4, (q15_t)0x7fc4,\n    (q15_t)0x7fc4, (q15_t)0x7fc3, (q15_t)0x7fc3, (q15_t)0x7fc2, (q15_t)0x7fc2,\n    (q15_t)0x7fc2, (q15_t)0x7fc1, (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fc0,\n    (q15_t)0x7fc0, (q15_t)0x7fbf, (q15_t)0x7fbf, (q15_t)0x7fbf, (q15_t)0x7fbe,\n    (q15_t)0x7fbe, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbc,\n    (q15_t)0x7fbc, (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fba,\n    (q15_t)0x7fba, (q15_t)0x7fb9, (q15_t)0x7fb9, (q15_t)0x7fb8, (q15_t)0x7fb8,\n    (q15_t)0x7fb8, (q15_t)0x7fb7, (q15_t)0x7fb7, (q15_t)0x7fb6, (q15_t)0x7fb6,\n    (q15_t)0x7fb6, (q15_t)0x7fb5, (q15_t)0x7fb5, (q15_t)0x7fb4, (q15_t)0x7fb4,\n    (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb2, (q15_t)0x7fb2,\n    (q15_t)0x7fb1, (q15_t)0x7fb1, (q15_t)0x7fb0, (q15_t)0x7fb0, (q15_t)0x7faf,\n    (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7fae, (q15_t)0x7fae, (q15_t)0x7fad,\n    (q15_t)0x7fad, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fab,\n    (q15_t)0x7fab, (q15_t)0x7faa, (q15_t)0x7faa, (q15_t)0x7fa9, (q15_t)0x7fa9,\n    (q15_t)0x7fa8, (q15_t)0x7fa8, (q15_t)0x7fa7, (q15_t)0x7fa7, (q15_t)0x7fa6,\n    (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa5, (q15_t)0x7fa5, (q15_t)0x7fa4,\n    (q15_t)0x7fa4, (q15_t)0x7fa3, (q15_t)0x7fa3, (q15_t)0x7fa2, (q15_t)0x7fa2,\n    (q15_t)0x7fa1, (q15_t)0x7fa1, (q15_t)0x7fa0, (q15_t)0x7fa0, (q15_t)0x7f9f,\n    (q15_t)0x7f9f, (q15_t)0x7f9e, (q15_t)0x7f9e, (q15_t)0x7f9d, (q15_t)0x7f9d,\n    (q15_t)0x7f9c, (q15_t)0x7f9c, (q15_t)0x7f9c, (q15_t)0x7f9b, (q15_t)0x7f9b,\n    (q15_t)0x7f9a, (q15_t)0x7f9a, (q15_t)0x7f99, (q15_t)0x7f99, (q15_t)0x7f98,\n    (q15_t)0x7f98, (q15_t)0x7f97, (q15_t)0x7f97, (q15_t)0x7f96, (q15_t)0x7f96,\n    (q15_t)0x7f95, (q15_t)0x7f95, (q15_t)0x7f94, (q15_t)0x7f94, (q15_t)0x7f93,\n    (q15_t)0x7f92, (q15_t)0x7f92, (q15_t)0x7f91, (q15_t)0x7f91, (q15_t)0x7f90,\n    (q15_t)0x7f90, (q15_t)0x7f8f, (q15_t)0x7f8f, (q15_t)0x7f8e, (q15_t)0x7f8e,\n    (q15_t)0x7f8d, (q15_t)0x7f8d, (q15_t)0x7f8c, (q15_t)0x7f8c, (q15_t)0x7f8b,\n    (q15_t)0x7f8b, (q15_t)0x7f8a, (q15_t)0x7f8a, (q15_t)0x7f89, (q15_t)0x7f89,\n    (q15_t)0x7f88, (q15_t)0x7f87, (q15_t)0x7f87, (q15_t)0x7f86, (q15_t)0x7f86,\n    (q15_t)0x7f85, (q15_t)0x7f85, (q15_t)0x7f84, (q15_t)0x7f84, (q15_t)0x7f83,\n    (q15_t)0x7f83, (q15_t)0x7f82, (q15_t)0x7f81, (q15_t)0x7f81, (q15_t)0x7f80,\n    (q15_t)0x7f80, (q15_t)0x7f7f, (q15_t)0x7f7f, (q15_t)0x7f7e, (q15_t)0x7f7e,\n    (q15_t)0x7f7d, (q15_t)0x7f7c, (q15_t)0x7f7c, (q15_t)0x7f7b, (q15_t)0x7f7b,\n    (q15_t)0x7f7a, (q15_t)0x7f7a, (q15_t)0x7f79, (q15_t)0x7f79, (q15_t)0x7f78,\n    (q15_t)0x7f77, (q15_t)0x7f77, (q15_t)0x7f76, (q15_t)0x7f76, (q15_t)0x7f75,\n    (q15_t)0x7f75, (q15_t)0x7f74, (q15_t)0x7f73, (q15_t)0x7f73, (q15_t)0x7f72,\n    (q15_t)0x7f72, (q15_t)0x7f71, (q15_t)0x7f70, (q15_t)0x7f70, (q15_t)0x7f6f,\n    (q15_t)0x7f6f, (q15_t)0x7f6e, (q15_t)0x7f6d, (q15_t)0x7f6d, (q15_t)0x7f6c,\n    (q15_t)0x7f6c, (q15_t)0x7f6b, (q15_t)0x7f6b, (q15_t)0x7f6a, (q15_t)0x7f69,\n    (q15_t)0x7f69, (q15_t)0x7f68, (q15_t)0x7f68, (q15_t)0x7f67, (q15_t)0x7f66,\n    (q15_t)0x7f66, (q15_t)0x7f65, (q15_t)0x7f64, (q15_t)0x7f64, (q15_t)0x7f63,\n    (q15_t)0x7f63, (q15_t)0x7f62, (q15_t)0x7f61, (q15_t)0x7f61, (q15_t)0x7f60,\n    (q15_t)0x7f60, (q15_t)0x7f5f, (q15_t)0x7f5e, (q15_t)0x7f5e, (q15_t)0x7f5d,\n    (q15_t)0x7f5c, (q15_t)0x7f5c, (q15_t)0x7f5b, (q15_t)0x7f5b, (q15_t)0x7f5a,\n    (q15_t)0x7f59, (q15_t)0x7f59, (q15_t)0x7f58, (q15_t)0x7f57, (q15_t)0x7f57,\n    (q15_t)0x7f56, (q15_t)0x7f55, (q15_t)0x7f55, (q15_t)0x7f54, (q15_t)0x7f54,\n    (q15_t)0x7f53, (q15_t)0x7f52, (q15_t)0x7f52, (q15_t)0x7f51, (q15_t)0x7f50,\n    (q15_t)0x7f50, (q15_t)0x7f4f, (q15_t)0x7f4e, (q15_t)0x7f4e, (q15_t)0x7f4d,\n    (q15_t)0x7f4c, (q15_t)0x7f4c, (q15_t)0x7f4b, (q15_t)0x7f4a, (q15_t)0x7f4a,\n    (q15_t)0x7f49, (q15_t)0x7f48, (q15_t)0x7f48, (q15_t)0x7f47, (q15_t)0x7f46,\n    (q15_t)0x7f46, (q15_t)0x7f45, (q15_t)0x7f44, (q15_t)0x7f44, (q15_t)0x7f43,\n    (q15_t)0x7f42, (q15_t)0x7f42, (q15_t)0x7f41, (q15_t)0x7f40, (q15_t)0x7f40,\n    (q15_t)0x7f3f, (q15_t)0x7f3e, (q15_t)0x7f3e, (q15_t)0x7f3d, (q15_t)0x7f3c,\n    (q15_t)0x7f3c, (q15_t)0x7f3b, (q15_t)0x7f3a, (q15_t)0x7f3a, (q15_t)0x7f39,\n    (q15_t)0x7f38, (q15_t)0x7f37, (q15_t)0x7f37, (q15_t)0x7f36, (q15_t)0x7f35,\n    (q15_t)0x7f35, (q15_t)0x7f34, (q15_t)0x7f33, (q15_t)0x7f33, (q15_t)0x7f32,\n    (q15_t)0x7f31, (q15_t)0x7f31, (q15_t)0x7f30, (q15_t)0x7f2f, (q15_t)0x7f2e,\n    (q15_t)0x7f2e, (q15_t)0x7f2d, (q15_t)0x7f2c, (q15_t)0x7f2c, (q15_t)0x7f2b,\n    (q15_t)0x7f2a, (q15_t)0x7f29, (q15_t)0x7f29, (q15_t)0x7f28, (q15_t)0x7f27,\n    (q15_t)0x7f27, (q15_t)0x7f26, (q15_t)0x7f25, (q15_t)0x7f24, (q15_t)0x7f24,\n    (q15_t)0x7f23, (q15_t)0x7f22, (q15_t)0x7f21, (q15_t)0x7f21, (q15_t)0x7f20,\n    (q15_t)0x7f1f, (q15_t)0x7f1f, (q15_t)0x7f1e, (q15_t)0x7f1d, (q15_t)0x7f1c,\n    (q15_t)0x7f1c, (q15_t)0x7f1b, (q15_t)0x7f1a, (q15_t)0x7f19, (q15_t)0x7f19,\n    (q15_t)0x7f18, (q15_t)0x7f17, (q15_t)0x7f16, (q15_t)0x7f16, (q15_t)0x7f15,\n    (q15_t)0x7f14, (q15_t)0x7f13, (q15_t)0x7f13, (q15_t)0x7f12, (q15_t)0x7f11,\n    (q15_t)0x7f10, (q15_t)0x7f10, (q15_t)0x7f0f, (q15_t)0x7f0e, (q15_t)0x7f0d,\n    (q15_t)0x7f0d, (q15_t)0x7f0c, (q15_t)0x7f0b, (q15_t)0x7f0a, (q15_t)0x7f09,\n    (q15_t)0x7f09, (q15_t)0x7f08, (q15_t)0x7f07, (q15_t)0x7f06, (q15_t)0x7f06,\n    (q15_t)0x7f05, (q15_t)0x7f04, (q15_t)0x7f03, (q15_t)0x7f02, (q15_t)0x7f02,\n    (q15_t)0x7f01, (q15_t)0x7f00, (q15_t)0x7eff, (q15_t)0x7eff, (q15_t)0x7efe,\n    (q15_t)0x7efd, (q15_t)0x7efc, (q15_t)0x7efb, (q15_t)0x7efb, (q15_t)0x7efa,\n    (q15_t)0x7ef9, (q15_t)0x7ef8, (q15_t)0x7ef7, (q15_t)0x7ef7, (q15_t)0x7ef6,\n    (q15_t)0x7ef5, (q15_t)0x7ef4, (q15_t)0x7ef3, (q15_t)0x7ef3, (q15_t)0x7ef2,\n    (q15_t)0x7ef1, (q15_t)0x7ef0, (q15_t)0x7eef, (q15_t)0x7eef, (q15_t)0x7eee,\n    (q15_t)0x7eed, (q15_t)0x7eec, (q15_t)0x7eeb, (q15_t)0x7eeb, (q15_t)0x7eea,\n    (q15_t)0x7ee9, (q15_t)0x7ee8, (q15_t)0x7ee7, (q15_t)0x7ee6, (q15_t)0x7ee6,\n    (q15_t)0x7ee5, (q15_t)0x7ee4, (q15_t)0x7ee3, (q15_t)0x7ee2, (q15_t)0x7ee2,\n    (q15_t)0x7ee1, (q15_t)0x7ee0, (q15_t)0x7edf, (q15_t)0x7ede, (q15_t)0x7edd,\n    (q15_t)0x7edd, (q15_t)0x7edc, (q15_t)0x7edb, (q15_t)0x7eda, (q15_t)0x7ed9,\n    (q15_t)0x7ed8, (q15_t)0x7ed8, (q15_t)0x7ed7, (q15_t)0x7ed6, (q15_t)0x7ed5,\n    (q15_t)0x7ed4, (q15_t)0x7ed3, (q15_t)0x7ed2, (q15_t)0x7ed2, (q15_t)0x7ed1,\n    (q15_t)0x7ed0, (q15_t)0x7ecf, (q15_t)0x7ece, (q15_t)0x7ecd, (q15_t)0x7ecc,\n    (q15_t)0x7ecc, (q15_t)0x7ecb, (q15_t)0x7eca, (q15_t)0x7ec9, (q15_t)0x7ec8,\n    (q15_t)0x7ec7, (q15_t)0x7ec6, (q15_t)0x7ec6, (q15_t)0x7ec5, (q15_t)0x7ec4,\n    (q15_t)0x7ec3, (q15_t)0x7ec2, (q15_t)0x7ec1, (q15_t)0x7ec0, (q15_t)0x7ebf,\n    (q15_t)0x7ebf, (q15_t)0x7ebe, (q15_t)0x7ebd, (q15_t)0x7ebc, (q15_t)0x7ebb,\n    (q15_t)0x7eba, (q15_t)0x7eb9, (q15_t)0x7eb8, (q15_t)0x7eb8, (q15_t)0x7eb7,\n    (q15_t)0x7eb6, (q15_t)0x7eb5, (q15_t)0x7eb4, (q15_t)0x7eb3, (q15_t)0x7eb2,\n    (q15_t)0x7eb1, (q15_t)0x7eb0, (q15_t)0x7eaf, (q15_t)0x7eaf, (q15_t)0x7eae,\n    (q15_t)0x7ead, (q15_t)0x7eac, (q15_t)0x7eab, (q15_t)0x7eaa, (q15_t)0x7ea9,\n    (q15_t)0x7ea8, (q15_t)0x7ea7, (q15_t)0x7ea6, (q15_t)0x7ea6, (q15_t)0x7ea5,\n    (q15_t)0x7ea4, (q15_t)0x7ea3, (q15_t)0x7ea2, (q15_t)0x7ea1, (q15_t)0x7ea0,\n    (q15_t)0x7e9f, (q15_t)0x7e9e, (q15_t)0x7e9d, (q15_t)0x7e9c, (q15_t)0x7e9b,\n    (q15_t)0x7e9b, (q15_t)0x7e9a, (q15_t)0x7e99, (q15_t)0x7e98, (q15_t)0x7e97,\n    (q15_t)0x7e96, (q15_t)0x7e95, (q15_t)0x7e94, (q15_t)0x7e93, (q15_t)0x7e92,\n    (q15_t)0x7e91, (q15_t)0x7e90, (q15_t)0x7e8f, (q15_t)0x7e8e, (q15_t)0x7e8d,\n    (q15_t)0x7e8d, (q15_t)0x7e8c, (q15_t)0x7e8b, (q15_t)0x7e8a, (q15_t)0x7e89,\n    (q15_t)0x7e88, (q15_t)0x7e87, (q15_t)0x7e86, (q15_t)0x7e85, (q15_t)0x7e84,\n    (q15_t)0x7e83, (q15_t)0x7e82, (q15_t)0x7e81, (q15_t)0x7e80, (q15_t)0x7e7f,\n    (q15_t)0x7e7e, (q15_t)0x7e7d, (q15_t)0x7e7c, (q15_t)0x7e7b, (q15_t)0x7e7a,\n    (q15_t)0x7e79, (q15_t)0x7e78, (q15_t)0x7e77, (q15_t)0x7e77, (q15_t)0x7e76,\n    (q15_t)0x7e75, (q15_t)0x7e74, (q15_t)0x7e73, (q15_t)0x7e72, (q15_t)0x7e71,\n    (q15_t)0x7e70, (q15_t)0x7e6f, (q15_t)0x7e6e, (q15_t)0x7e6d, (q15_t)0x7e6c,\n    (q15_t)0x7e6b, (q15_t)0x7e6a, (q15_t)0x7e69, (q15_t)0x7e68, (q15_t)0x7e67,\n    (q15_t)0x7e66, (q15_t)0x7e65, (q15_t)0x7e64, (q15_t)0x7e63, (q15_t)0x7e62,\n    (q15_t)0x7e61, (q15_t)0x7e60, (q15_t)0x7e5f, (q15_t)0x7e5e, (q15_t)0x7e5d,\n    (q15_t)0x7e5c, (q15_t)0x7e5b, (q15_t)0x7e5a, (q15_t)0x7e59, (q15_t)0x7e58,\n    (q15_t)0x7e57, (q15_t)0x7e56, (q15_t)0x7e55, (q15_t)0x7e54, (q15_t)0x7e53,\n    (q15_t)0x7e52, (q15_t)0x7e51, (q15_t)0x7e50, (q15_t)0x7e4f, (q15_t)0x7e4e,\n    (q15_t)0x7e4d, (q15_t)0x7e4c, (q15_t)0x7e4b, (q15_t)0x7e4a, (q15_t)0x7e49,\n    (q15_t)0x7e48, (q15_t)0x7e47, (q15_t)0x7e46, (q15_t)0x7e45, (q15_t)0x7e43,\n    (q15_t)0x7e42, (q15_t)0x7e41, (q15_t)0x7e40, (q15_t)0x7e3f, (q15_t)0x7e3e,\n    (q15_t)0x7e3d, (q15_t)0x7e3c, (q15_t)0x7e3b, (q15_t)0x7e3a, (q15_t)0x7e39,\n    (q15_t)0x7e38, (q15_t)0x7e37, (q15_t)0x7e36, (q15_t)0x7e35, (q15_t)0x7e34,\n    (q15_t)0x7e33, (q15_t)0x7e32, (q15_t)0x7e31, (q15_t)0x7e30, (q15_t)0x7e2f,\n    (q15_t)0x7e2e, (q15_t)0x7e2d, (q15_t)0x7e2b, (q15_t)0x7e2a, (q15_t)0x7e29,\n    (q15_t)0x7e28, (q15_t)0x7e27, (q15_t)0x7e26, (q15_t)0x7e25, (q15_t)0x7e24,\n    (q15_t)0x7e23, (q15_t)0x7e22, (q15_t)0x7e21, (q15_t)0x7e20, (q15_t)0x7e1f,\n    (q15_t)0x7e1e, (q15_t)0x7e1d, (q15_t)0x7e1b, (q15_t)0x7e1a, (q15_t)0x7e19,\n    (q15_t)0x7e18, (q15_t)0x7e17, (q15_t)0x7e16, (q15_t)0x7e15, (q15_t)0x7e14,\n    (q15_t)0x7e13, (q15_t)0x7e12, (q15_t)0x7e11, (q15_t)0x7e10, (q15_t)0x7e0e,\n    (q15_t)0x7e0d, (q15_t)0x7e0c, (q15_t)0x7e0b, (q15_t)0x7e0a, (q15_t)0x7e09,\n    (q15_t)0x7e08, (q15_t)0x7e07, (q15_t)0x7e06, (q15_t)0x7e05, (q15_t)0x7e04,\n    (q15_t)0x7e02, (q15_t)0x7e01, (q15_t)0x7e00, (q15_t)0x7dff, (q15_t)0x7dfe,\n    (q15_t)0x7dfd, (q15_t)0x7dfc, (q15_t)0x7dfb, (q15_t)0x7dfa, (q15_t)0x7df8,\n    (q15_t)0x7df7, (q15_t)0x7df6, (q15_t)0x7df5, (q15_t)0x7df4, (q15_t)0x7df3,\n    (q15_t)0x7df2, (q15_t)0x7df1, (q15_t)0x7def, (q15_t)0x7dee, (q15_t)0x7ded,\n    (q15_t)0x7dec, (q15_t)0x7deb, (q15_t)0x7dea, (q15_t)0x7de9, (q15_t)0x7de8,\n    (q15_t)0x7de6, (q15_t)0x7de5, (q15_t)0x7de4, (q15_t)0x7de3, (q15_t)0x7de2,\n    (q15_t)0x7de1, (q15_t)0x7de0, (q15_t)0x7dde, (q15_t)0x7ddd, (q15_t)0x7ddc,\n    (q15_t)0x7ddb, (q15_t)0x7dda, (q15_t)0x7dd9, (q15_t)0x7dd8, (q15_t)0x7dd6,\n    (q15_t)0x7dd5, (q15_t)0x7dd4, (q15_t)0x7dd3, (q15_t)0x7dd2, (q15_t)0x7dd1,\n    (q15_t)0x7dd0, (q15_t)0x7dce, (q15_t)0x7dcd, (q15_t)0x7dcc, (q15_t)0x7dcb,\n    (q15_t)0x7dca, (q15_t)0x7dc9, (q15_t)0x7dc7, (q15_t)0x7dc6, (q15_t)0x7dc5,\n    (q15_t)0x7dc4, (q15_t)0x7dc3, (q15_t)0x7dc2, (q15_t)0x7dc0, (q15_t)0x7dbf,\n    (q15_t)0x7dbe, (q15_t)0x7dbd, (q15_t)0x7dbc, (q15_t)0x7dbb, (q15_t)0x7db9,\n    (q15_t)0x7db8, (q15_t)0x7db7, (q15_t)0x7db6, (q15_t)0x7db5, (q15_t)0x7db3,\n    (q15_t)0x7db2, (q15_t)0x7db1, (q15_t)0x7db0, (q15_t)0x7daf, (q15_t)0x7dae,\n    (q15_t)0x7dac, (q15_t)0x7dab, (q15_t)0x7daa, (q15_t)0x7da9, (q15_t)0x7da8,\n    (q15_t)0x7da6, (q15_t)0x7da5, (q15_t)0x7da4, (q15_t)0x7da3, (q15_t)0x7da2,\n    (q15_t)0x7da0, (q15_t)0x7d9f, (q15_t)0x7d9e, (q15_t)0x7d9d, (q15_t)0x7d9c,\n    (q15_t)0x7d9a, (q15_t)0x7d99, (q15_t)0x7d98, (q15_t)0x7d97, (q15_t)0x7d95,\n    (q15_t)0x7d94, (q15_t)0x7d93, (q15_t)0x7d92, (q15_t)0x7d91, (q15_t)0x7d8f,\n    (q15_t)0x7d8e, (q15_t)0x7d8d, (q15_t)0x7d8c, (q15_t)0x7d8a, (q15_t)0x7d89,\n    (q15_t)0x7d88, (q15_t)0x7d87, (q15_t)0x7d86, (q15_t)0x7d84, (q15_t)0x7d83,\n    (q15_t)0x7d82, (q15_t)0x7d81, (q15_t)0x7d7f, (q15_t)0x7d7e, (q15_t)0x7d7d,\n    (q15_t)0x7d7c, (q15_t)0x7d7a, (q15_t)0x7d79, (q15_t)0x7d78, (q15_t)0x7d77,\n    (q15_t)0x7d75, (q15_t)0x7d74, (q15_t)0x7d73, (q15_t)0x7d72, (q15_t)0x7d70,\n    (q15_t)0x7d6f, (q15_t)0x7d6e, (q15_t)0x7d6d, (q15_t)0x7d6b, (q15_t)0x7d6a,\n    (q15_t)0x7d69, (q15_t)0x7d68, (q15_t)0x7d66, (q15_t)0x7d65, (q15_t)0x7d64,\n    (q15_t)0x7d63, (q15_t)0x7d61, (q15_t)0x7d60, (q15_t)0x7d5f, (q15_t)0x7d5e,\n    (q15_t)0x7d5c, (q15_t)0x7d5b, (q15_t)0x7d5a, (q15_t)0x7d59, (q15_t)0x7d57,\n    (q15_t)0x7d56, (q15_t)0x7d55, (q15_t)0x7d53, (q15_t)0x7d52, (q15_t)0x7d51,\n    (q15_t)0x7d50, (q15_t)0x7d4e, (q15_t)0x7d4d, (q15_t)0x7d4c, (q15_t)0x7d4a,\n    (q15_t)0x7d49, (q15_t)0x7d48, (q15_t)0x7d47, (q15_t)0x7d45, (q15_t)0x7d44,\n    (q15_t)0x7d43, (q15_t)0x7d41, (q15_t)0x7d40, (q15_t)0x7d3f, (q15_t)0x7d3e,\n    (q15_t)0x7d3c, (q15_t)0x7d3b, (q15_t)0x7d3a, (q15_t)0x7d38, (q15_t)0x7d37,\n    (q15_t)0x7d36, (q15_t)0x7d34, (q15_t)0x7d33, (q15_t)0x7d32, (q15_t)0x7d31,\n    (q15_t)0x7d2f, (q15_t)0x7d2e, (q15_t)0x7d2d, (q15_t)0x7d2b, (q15_t)0x7d2a,\n    (q15_t)0x7d29, (q15_t)0x7d27, (q15_t)0x7d26, (q15_t)0x7d25, (q15_t)0x7d23,\n    (q15_t)0x7d22, (q15_t)0x7d21, (q15_t)0x7d1f, (q15_t)0x7d1e, (q15_t)0x7d1d,\n    (q15_t)0x7d1b, (q15_t)0x7d1a, (q15_t)0x7d19, (q15_t)0x7d17, (q15_t)0x7d16,\n    (q15_t)0x7d15, (q15_t)0x7d13, (q15_t)0x7d12, (q15_t)0x7d11, (q15_t)0x7d0f,\n    (q15_t)0x7d0e, (q15_t)0x7d0d, (q15_t)0x7d0b, (q15_t)0x7d0a, (q15_t)0x7d09,\n    (q15_t)0x7d07, (q15_t)0x7d06, (q15_t)0x7d05, (q15_t)0x7d03, (q15_t)0x7d02,\n    (q15_t)0x7d01, (q15_t)0x7cff, (q15_t)0x7cfe, (q15_t)0x7cfd, (q15_t)0x7cfb,\n    (q15_t)0x7cfa, (q15_t)0x7cf9, (q15_t)0x7cf7, (q15_t)0x7cf6, (q15_t)0x7cf4,\n    (q15_t)0x7cf3, (q15_t)0x7cf2, (q15_t)0x7cf0, (q15_t)0x7cef, (q15_t)0x7cee,\n    (q15_t)0x7cec, (q15_t)0x7ceb, (q15_t)0x7ce9, (q15_t)0x7ce8, (q15_t)0x7ce7,\n    (q15_t)0x7ce5, (q15_t)0x7ce4, (q15_t)0x7ce3, (q15_t)0x7ce1, (q15_t)0x7ce0,\n    (q15_t)0x7cde, (q15_t)0x7cdd, (q15_t)0x7cdc, (q15_t)0x7cda, (q15_t)0x7cd9,\n    (q15_t)0x7cd8, (q15_t)0x7cd6, (q15_t)0x7cd5, (q15_t)0x7cd3, (q15_t)0x7cd2,\n    (q15_t)0x7cd1, (q15_t)0x7ccf, (q15_t)0x7cce, (q15_t)0x7ccc, (q15_t)0x7ccb,\n    (q15_t)0x7cca, (q15_t)0x7cc8, (q15_t)0x7cc7, (q15_t)0x7cc5, (q15_t)0x7cc4,\n    (q15_t)0x7cc3, (q15_t)0x7cc1, (q15_t)0x7cc0, (q15_t)0x7cbe, (q15_t)0x7cbd,\n    (q15_t)0x7cbc, (q15_t)0x7cba, (q15_t)0x7cb9, (q15_t)0x7cb7, (q15_t)0x7cb6,\n    (q15_t)0x7cb5, (q15_t)0x7cb3, (q15_t)0x7cb2, (q15_t)0x7cb0, (q15_t)0x7caf,\n    (q15_t)0x7cad, (q15_t)0x7cac, (q15_t)0x7cab, (q15_t)0x7ca9, (q15_t)0x7ca8,\n    (q15_t)0x7ca6, (q15_t)0x7ca5, (q15_t)0x7ca3, (q15_t)0x7ca2, (q15_t)0x7ca1,\n    (q15_t)0x7c9f, (q15_t)0x7c9e, (q15_t)0x7c9c, (q15_t)0x7c9b, (q15_t)0x7c99,\n    (q15_t)0x7c98, (q15_t)0x7c97, (q15_t)0x7c95, (q15_t)0x7c94, (q15_t)0x7c92,\n    (q15_t)0x7c91, (q15_t)0x7c8f, (q15_t)0x7c8e, (q15_t)0x7c8c, (q15_t)0x7c8b,\n    (q15_t)0x7c8a, (q15_t)0x7c88, (q15_t)0x7c87, (q15_t)0x7c85, (q15_t)0x7c84,\n    (q15_t)0x7c82, (q15_t)0x7c81, (q15_t)0x7c7f, (q15_t)0x7c7e, (q15_t)0x7c7c,\n    (q15_t)0x7c7b, (q15_t)0x7c79, (q15_t)0x7c78, (q15_t)0x7c77, (q15_t)0x7c75,\n    (q15_t)0x7c74, (q15_t)0x7c72, (q15_t)0x7c71, (q15_t)0x7c6f, (q15_t)0x7c6e,\n    (q15_t)0x7c6c, (q15_t)0x7c6b, (q15_t)0x7c69, (q15_t)0x7c68, (q15_t)0x7c66,\n    (q15_t)0x7c65, (q15_t)0x7c63, (q15_t)0x7c62, (q15_t)0x7c60, (q15_t)0x7c5f,\n    (q15_t)0x7c5d, (q15_t)0x7c5c, (q15_t)0x7c5a, (q15_t)0x7c59, (q15_t)0x7c58,\n    (q15_t)0x7c56, (q15_t)0x7c55, (q15_t)0x7c53, (q15_t)0x7c52, (q15_t)0x7c50,\n    (q15_t)0x7c4f, (q15_t)0x7c4d, (q15_t)0x7c4c, (q15_t)0x7c4a, (q15_t)0x7c49,\n    (q15_t)0x7c47, (q15_t)0x7c46, (q15_t)0x7c44, (q15_t)0x7c43, (q15_t)0x7c41,\n    (q15_t)0x7c3f, (q15_t)0x7c3e, (q15_t)0x7c3c, (q15_t)0x7c3b, (q15_t)0x7c39,\n    (q15_t)0x7c38, (q15_t)0x7c36, (q15_t)0x7c35, (q15_t)0x7c33, (q15_t)0x7c32,\n    (q15_t)0x7c30, (q15_t)0x7c2f, (q15_t)0x7c2d, (q15_t)0x7c2c, (q15_t)0x7c2a,\n    (q15_t)0x7c29, (q15_t)0x7c27, (q15_t)0x7c26, (q15_t)0x7c24, (q15_t)0x7c23,\n    (q15_t)0x7c21, (q15_t)0x7c20, (q15_t)0x7c1e, (q15_t)0x7c1c, (q15_t)0x7c1b,\n    (q15_t)0x7c19, (q15_t)0x7c18, (q15_t)0x7c16, (q15_t)0x7c15, (q15_t)0x7c13,\n    (q15_t)0x7c12, (q15_t)0x7c10, (q15_t)0x7c0f, (q15_t)0x7c0d, (q15_t)0x7c0b,\n    (q15_t)0x7c0a, (q15_t)0x7c08, (q15_t)0x7c07, (q15_t)0x7c05, (q15_t)0x7c04,\n    (q15_t)0x7c02, (q15_t)0x7c01, (q15_t)0x7bff, (q15_t)0x7bfd, (q15_t)0x7bfc,\n    (q15_t)0x7bfa, (q15_t)0x7bf9, (q15_t)0x7bf7, (q15_t)0x7bf6, (q15_t)0x7bf4,\n    (q15_t)0x7bf3, (q15_t)0x7bf1, (q15_t)0x7bef, (q15_t)0x7bee, (q15_t)0x7bec,\n    (q15_t)0x7beb, (q15_t)0x7be9, (q15_t)0x7be8, (q15_t)0x7be6, (q15_t)0x7be4,\n    (q15_t)0x7be3, (q15_t)0x7be1, (q15_t)0x7be0, (q15_t)0x7bde, (q15_t)0x7bdc,\n    (q15_t)0x7bdb, (q15_t)0x7bd9, (q15_t)0x7bd8, (q15_t)0x7bd6, (q15_t)0x7bd5,\n    (q15_t)0x7bd3, (q15_t)0x7bd1, (q15_t)0x7bd0, (q15_t)0x7bce, (q15_t)0x7bcd,\n    (q15_t)0x7bcb, (q15_t)0x7bc9, (q15_t)0x7bc8, (q15_t)0x7bc6, (q15_t)0x7bc5,\n    (q15_t)0x7bc3, (q15_t)0x7bc1, (q15_t)0x7bc0, (q15_t)0x7bbe, (q15_t)0x7bbd,\n    (q15_t)0x7bbb, (q15_t)0x7bb9, (q15_t)0x7bb8, (q15_t)0x7bb6, (q15_t)0x7bb5,\n    (q15_t)0x7bb3, (q15_t)0x7bb1, (q15_t)0x7bb0, (q15_t)0x7bae, (q15_t)0x7bac,\n    (q15_t)0x7bab, (q15_t)0x7ba9, (q15_t)0x7ba8, (q15_t)0x7ba6, (q15_t)0x7ba4,\n    (q15_t)0x7ba3, (q15_t)0x7ba1, (q15_t)0x7b9f, (q15_t)0x7b9e, (q15_t)0x7b9c,\n    (q15_t)0x7b9b, (q15_t)0x7b99, (q15_t)0x7b97, (q15_t)0x7b96, (q15_t)0x7b94,\n    (q15_t)0x7b92, (q15_t)0x7b91, (q15_t)0x7b8f, (q15_t)0x7b8d, (q15_t)0x7b8c,\n    (q15_t)0x7b8a, (q15_t)0x7b89, (q15_t)0x7b87, (q15_t)0x7b85, (q15_t)0x7b84,\n    (q15_t)0x7b82, (q15_t)0x7b80, (q15_t)0x7b7f, (q15_t)0x7b7d, (q15_t)0x7b7b,\n    (q15_t)0x7b7a, (q15_t)0x7b78, (q15_t)0x7b76, (q15_t)0x7b75, (q15_t)0x7b73,\n    (q15_t)0x7b71, (q15_t)0x7b70, (q15_t)0x7b6e, (q15_t)0x7b6c, (q15_t)0x7b6b,\n    (q15_t)0x7b69, (q15_t)0x7b67, (q15_t)0x7b66, (q15_t)0x7b64, (q15_t)0x7b62,\n    (q15_t)0x7b61, (q15_t)0x7b5f, (q15_t)0x7b5d, (q15_t)0x7b5c, (q15_t)0x7b5a,\n    (q15_t)0x7b58, (q15_t)0x7b57, (q15_t)0x7b55, (q15_t)0x7b53, (q15_t)0x7b52,\n    (q15_t)0x7b50, (q15_t)0x7b4e, (q15_t)0x7b4d, (q15_t)0x7b4b, (q15_t)0x7b49,\n    (q15_t)0x7b47, (q15_t)0x7b46, (q15_t)0x7b44, (q15_t)0x7b42, (q15_t)0x7b41,\n    (q15_t)0x7b3f, (q15_t)0x7b3d, (q15_t)0x7b3c, (q15_t)0x7b3a, (q15_t)0x7b38,\n    (q15_t)0x7b37, (q15_t)0x7b35, (q15_t)0x7b33, (q15_t)0x7b31, (q15_t)0x7b30,\n    (q15_t)0x7b2e, (q15_t)0x7b2c, (q15_t)0x7b2b, (q15_t)0x7b29, (q15_t)0x7b27,\n    (q15_t)0x7b25, (q15_t)0x7b24, (q15_t)0x7b22, (q15_t)0x7b20, (q15_t)0x7b1f,\n    (q15_t)0x7b1d, (q15_t)0x7b1b, (q15_t)0x7b19, (q15_t)0x7b18, (q15_t)0x7b16,\n    (q15_t)0x7b14, (q15_t)0x7b13, (q15_t)0x7b11, (q15_t)0x7b0f, (q15_t)0x7b0d,\n    (q15_t)0x7b0c, (q15_t)0x7b0a, (q15_t)0x7b08, (q15_t)0x7b06, (q15_t)0x7b05,\n    (q15_t)0x7b03, (q15_t)0x7b01, (q15_t)0x7aff, (q15_t)0x7afe, (q15_t)0x7afc,\n    (q15_t)0x7afa, (q15_t)0x7af8, (q15_t)0x7af7, (q15_t)0x7af5, (q15_t)0x7af3,\n    (q15_t)0x7af2, (q15_t)0x7af0, (q15_t)0x7aee, (q15_t)0x7aec, (q15_t)0x7aeb,\n    (q15_t)0x7ae9, (q15_t)0x7ae7, (q15_t)0x7ae5, (q15_t)0x7ae3, (q15_t)0x7ae2,\n    (q15_t)0x7ae0, (q15_t)0x7ade, (q15_t)0x7adc, (q15_t)0x7adb, (q15_t)0x7ad9,\n    (q15_t)0x7ad7, (q15_t)0x7ad5, (q15_t)0x7ad4, (q15_t)0x7ad2, (q15_t)0x7ad0,\n    (q15_t)0x7ace, (q15_t)0x7acd, (q15_t)0x7acb, (q15_t)0x7ac9, (q15_t)0x7ac7,\n    (q15_t)0x7ac5, (q15_t)0x7ac4, (q15_t)0x7ac2, (q15_t)0x7ac0, (q15_t)0x7abe,\n    (q15_t)0x7abd, (q15_t)0x7abb, (q15_t)0x7ab9, (q15_t)0x7ab7, (q15_t)0x7ab5,\n    (q15_t)0x7ab4, (q15_t)0x7ab2, (q15_t)0x7ab0, (q15_t)0x7aae, (q15_t)0x7aac,\n    (q15_t)0x7aab, (q15_t)0x7aa9, (q15_t)0x7aa7, (q15_t)0x7aa5, (q15_t)0x7aa3,\n    (q15_t)0x7aa2, (q15_t)0x7aa0, (q15_t)0x7a9e, (q15_t)0x7a9c, (q15_t)0x7a9a,\n    (q15_t)0x7a99, (q15_t)0x7a97, (q15_t)0x7a95, (q15_t)0x7a93, (q15_t)0x7a91,\n    (q15_t)0x7a90, (q15_t)0x7a8e, (q15_t)0x7a8c, (q15_t)0x7a8a, (q15_t)0x7a88,\n    (q15_t)0x7a87, (q15_t)0x7a85, (q15_t)0x7a83, (q15_t)0x7a81, (q15_t)0x7a7f,\n    (q15_t)0x7a7d, (q15_t)0x7a7c, (q15_t)0x7a7a, (q15_t)0x7a78, (q15_t)0x7a76,\n    (q15_t)0x7a74, (q15_t)0x7a72, (q15_t)0x7a71, (q15_t)0x7a6f, (q15_t)0x7a6d,\n    (q15_t)0x7a6b, (q15_t)0x7a69, (q15_t)0x7a67, (q15_t)0x7a66, (q15_t)0x7a64,\n    (q15_t)0x7a62, (q15_t)0x7a60, (q15_t)0x7a5e, (q15_t)0x7a5c, (q15_t)0x7a5b,\n    (q15_t)0x7a59, (q15_t)0x7a57, (q15_t)0x7a55, (q15_t)0x7a53, (q15_t)0x7a51,\n    (q15_t)0x7a4f, (q15_t)0x7a4e, (q15_t)0x7a4c, (q15_t)0x7a4a, (q15_t)0x7a48,\n    (q15_t)0x7a46, (q15_t)0x7a44, (q15_t)0x7a42, (q15_t)0x7a41, (q15_t)0x7a3f,\n    (q15_t)0x7a3d, (q15_t)0x7a3b, (q15_t)0x7a39, (q15_t)0x7a37, (q15_t)0x7a35,\n    (q15_t)0x7a34, (q15_t)0x7a32, (q15_t)0x7a30, (q15_t)0x7a2e, (q15_t)0x7a2c,\n    (q15_t)0x7a2a, (q15_t)0x7a28, (q15_t)0x7a26, (q15_t)0x7a25, (q15_t)0x7a23,\n    (q15_t)0x7a21, (q15_t)0x7a1f, (q15_t)0x7a1d, (q15_t)0x7a1b, (q15_t)0x7a19,\n    (q15_t)0x7a17, (q15_t)0x7a16, (q15_t)0x7a14, (q15_t)0x7a12, (q15_t)0x7a10,\n    (q15_t)0x7a0e, (q15_t)0x7a0c, (q15_t)0x7a0a, (q15_t)0x7a08, (q15_t)0x7a06,\n    (q15_t)0x7a04, (q15_t)0x7a03, (q15_t)0x7a01, (q15_t)0x79ff, (q15_t)0x79fd,\n    (q15_t)0x79fb, (q15_t)0x79f9, (q15_t)0x79f7, (q15_t)0x79f5, (q15_t)0x79f3,\n    (q15_t)0x79f1, (q15_t)0x79f0, (q15_t)0x79ee, (q15_t)0x79ec, (q15_t)0x79ea,\n    (q15_t)0x79e8, (q15_t)0x79e6, (q15_t)0x79e4, (q15_t)0x79e2, (q15_t)0x79e0,\n    (q15_t)0x79de, (q15_t)0x79dc, (q15_t)0x79da, (q15_t)0x79d9, (q15_t)0x79d7,\n    (q15_t)0x79d5, (q15_t)0x79d3, (q15_t)0x79d1, (q15_t)0x79cf, (q15_t)0x79cd,\n    (q15_t)0x79cb, (q15_t)0x79c9, (q15_t)0x79c7, (q15_t)0x79c5, (q15_t)0x79c3,\n    (q15_t)0x79c1, (q15_t)0x79bf, (q15_t)0x79bd, (q15_t)0x79bc, (q15_t)0x79ba,\n    (q15_t)0x79b8, (q15_t)0x79b6, (q15_t)0x79b4, (q15_t)0x79b2, (q15_t)0x79b0,\n    (q15_t)0x79ae, (q15_t)0x79ac, (q15_t)0x79aa, (q15_t)0x79a8, (q15_t)0x79a6,\n    (q15_t)0x79a4, (q15_t)0x79a2, (q15_t)0x79a0, (q15_t)0x799e, (q15_t)0x799c,\n    (q15_t)0x799a, (q15_t)0x7998, (q15_t)0x7996, (q15_t)0x7994, (q15_t)0x7992,\n    (q15_t)0x7991, (q15_t)0x798f, (q15_t)0x798d, (q15_t)0x798b, (q15_t)0x7989,\n    (q15_t)0x7987, (q15_t)0x7985, (q15_t)0x7983, (q15_t)0x7981, (q15_t)0x797f,\n    (q15_t)0x797d, (q15_t)0x797b, (q15_t)0x7979, (q15_t)0x7977, (q15_t)0x7975,\n    (q15_t)0x7973, (q15_t)0x7971, (q15_t)0x796f, (q15_t)0x796d, (q15_t)0x796b,\n    (q15_t)0x7969, (q15_t)0x7967, (q15_t)0x7965, (q15_t)0x7963, (q15_t)0x7961,\n    (q15_t)0x795f, (q15_t)0x795d, (q15_t)0x795b, (q15_t)0x7959, (q15_t)0x7957,\n    (q15_t)0x7955, (q15_t)0x7953, (q15_t)0x7951, (q15_t)0x794f, (q15_t)0x794d,\n    (q15_t)0x794b, (q15_t)0x7949, (q15_t)0x7947, (q15_t)0x7945, (q15_t)0x7943,\n    (q15_t)0x7941, (q15_t)0x793f, (q15_t)0x793d, (q15_t)0x793b, (q15_t)0x7939,\n    (q15_t)0x7937, (q15_t)0x7935, (q15_t)0x7933, (q15_t)0x7931, (q15_t)0x792f,\n    (q15_t)0x792d, (q15_t)0x792b, (q15_t)0x7929, (q15_t)0x7927, (q15_t)0x7925,\n    (q15_t)0x7923, (q15_t)0x7921, (q15_t)0x791f, (q15_t)0x791d, (q15_t)0x791a,\n    (q15_t)0x7918, (q15_t)0x7916, (q15_t)0x7914, (q15_t)0x7912, (q15_t)0x7910,\n    (q15_t)0x790e, (q15_t)0x790c, (q15_t)0x790a, (q15_t)0x7908, (q15_t)0x7906,\n    (q15_t)0x7904, (q15_t)0x7902, (q15_t)0x7900, (q15_t)0x78fe, (q15_t)0x78fc,\n    (q15_t)0x78fa, (q15_t)0x78f8, (q15_t)0x78f6, (q15_t)0x78f4, (q15_t)0x78f2,\n    (q15_t)0x78f0, (q15_t)0x78ed, (q15_t)0x78eb, (q15_t)0x78e9, (q15_t)0x78e7,\n    (q15_t)0x78e5, (q15_t)0x78e3, (q15_t)0x78e1, (q15_t)0x78df, (q15_t)0x78dd,\n    (q15_t)0x78db, (q15_t)0x78d9, (q15_t)0x78d7, (q15_t)0x78d5, (q15_t)0x78d3,\n    (q15_t)0x78d1, (q15_t)0x78ce, (q15_t)0x78cc, (q15_t)0x78ca, (q15_t)0x78c8,\n    (q15_t)0x78c6, (q15_t)0x78c4, (q15_t)0x78c2, (q15_t)0x78c0, (q15_t)0x78be,\n    (q15_t)0x78bc, (q15_t)0x78ba, (q15_t)0x78b8, (q15_t)0x78b5, (q15_t)0x78b3,\n    (q15_t)0x78b1, (q15_t)0x78af, (q15_t)0x78ad, (q15_t)0x78ab, (q15_t)0x78a9,\n    (q15_t)0x78a7, (q15_t)0x78a5, (q15_t)0x78a3, (q15_t)0x78a0, (q15_t)0x789e,\n    (q15_t)0x789c, (q15_t)0x789a, (q15_t)0x7898, (q15_t)0x7896, (q15_t)0x7894,\n    (q15_t)0x7892, (q15_t)0x7890, (q15_t)0x788e, (q15_t)0x788b, (q15_t)0x7889,\n    (q15_t)0x7887, (q15_t)0x7885, (q15_t)0x7883, (q15_t)0x7881, (q15_t)0x787f,\n    (q15_t)0x787d, (q15_t)0x787a, (q15_t)0x7878, (q15_t)0x7876, (q15_t)0x7874,\n    (q15_t)0x7872, (q15_t)0x7870, (q15_t)0x786e, (q15_t)0x786c, (q15_t)0x7869,\n    (q15_t)0x7867, (q15_t)0x7865, (q15_t)0x7863, (q15_t)0x7861, (q15_t)0x785f,\n    (q15_t)0x785d, (q15_t)0x785b, (q15_t)0x7858, (q15_t)0x7856, (q15_t)0x7854,\n    (q15_t)0x7852, (q15_t)0x7850, (q15_t)0x784e, (q15_t)0x784c, (q15_t)0x7849,\n    (q15_t)0x7847, (q15_t)0x7845, (q15_t)0x7843, (q15_t)0x7841, (q15_t)0x783f,\n    (q15_t)0x783c, (q15_t)0x783a, (q15_t)0x7838, (q15_t)0x7836, (q15_t)0x7834,\n    (q15_t)0x7832, (q15_t)0x7830, (q15_t)0x782d, (q15_t)0x782b, (q15_t)0x7829,\n    (q15_t)0x7827, (q15_t)0x7825, (q15_t)0x7823, (q15_t)0x7820, (q15_t)0x781e,\n    (q15_t)0x781c, (q15_t)0x781a, (q15_t)0x7818, (q15_t)0x7816, (q15_t)0x7813,\n    (q15_t)0x7811, (q15_t)0x780f, (q15_t)0x780d, (q15_t)0x780b, (q15_t)0x7808,\n    (q15_t)0x7806, (q15_t)0x7804, (q15_t)0x7802, (q15_t)0x7800, (q15_t)0x77fe,\n    (q15_t)0x77fb, (q15_t)0x77f9, (q15_t)0x77f7, (q15_t)0x77f5, (q15_t)0x77f3,\n    (q15_t)0x77f0, (q15_t)0x77ee, (q15_t)0x77ec, (q15_t)0x77ea, (q15_t)0x77e8,\n    (q15_t)0x77e5, (q15_t)0x77e3, (q15_t)0x77e1, (q15_t)0x77df, (q15_t)0x77dd,\n    (q15_t)0x77da, (q15_t)0x77d8, (q15_t)0x77d6, (q15_t)0x77d4, (q15_t)0x77d2,\n    (q15_t)0x77cf, (q15_t)0x77cd, (q15_t)0x77cb, (q15_t)0x77c9, (q15_t)0x77c6,\n    (q15_t)0x77c4, (q15_t)0x77c2, (q15_t)0x77c0, (q15_t)0x77be, (q15_t)0x77bb,\n    (q15_t)0x77b9, (q15_t)0x77b7, (q15_t)0x77b5, (q15_t)0x77b2, (q15_t)0x77b0,\n    (q15_t)0x77ae, (q15_t)0x77ac, (q15_t)0x77aa, (q15_t)0x77a7, (q15_t)0x77a5,\n    (q15_t)0x77a3, (q15_t)0x77a1, (q15_t)0x779e, (q15_t)0x779c, (q15_t)0x779a,\n    (q15_t)0x7798, (q15_t)0x7795, (q15_t)0x7793, (q15_t)0x7791, (q15_t)0x778f,\n    (q15_t)0x778c, (q15_t)0x778a, (q15_t)0x7788, (q15_t)0x7786, (q15_t)0x7783,\n    (q15_t)0x7781, (q15_t)0x777f, (q15_t)0x777d, (q15_t)0x777a, (q15_t)0x7778,\n    (q15_t)0x7776, (q15_t)0x7774, (q15_t)0x7771, (q15_t)0x776f, (q15_t)0x776d,\n    (q15_t)0x776b, (q15_t)0x7768, (q15_t)0x7766, (q15_t)0x7764, (q15_t)0x7762,\n    (q15_t)0x775f, (q15_t)0x775d, (q15_t)0x775b, (q15_t)0x7759, (q15_t)0x7756,\n    (q15_t)0x7754, (q15_t)0x7752, (q15_t)0x774f, (q15_t)0x774d, (q15_t)0x774b,\n    (q15_t)0x7749, (q15_t)0x7746, (q15_t)0x7744, (q15_t)0x7742, (q15_t)0x773f,\n    (q15_t)0x773d, (q15_t)0x773b, (q15_t)0x7739, (q15_t)0x7736, (q15_t)0x7734,\n    (q15_t)0x7732, (q15_t)0x772f, (q15_t)0x772d, (q15_t)0x772b, (q15_t)0x7729,\n    (q15_t)0x7726, (q15_t)0x7724, (q15_t)0x7722, (q15_t)0x771f, (q15_t)0x771d,\n    (q15_t)0x771b, (q15_t)0x7719, (q15_t)0x7716, (q15_t)0x7714, (q15_t)0x7712,\n    (q15_t)0x770f, (q15_t)0x770d, (q15_t)0x770b, (q15_t)0x7708, (q15_t)0x7706,\n    (q15_t)0x7704, (q15_t)0x7701, (q15_t)0x76ff, (q15_t)0x76fd, (q15_t)0x76fa,\n    (q15_t)0x76f8, (q15_t)0x76f6, (q15_t)0x76f4, (q15_t)0x76f1, (q15_t)0x76ef,\n    (q15_t)0x76ed, (q15_t)0x76ea, (q15_t)0x76e8, (q15_t)0x76e6, (q15_t)0x76e3,\n    (q15_t)0x76e1, (q15_t)0x76df, (q15_t)0x76dc, (q15_t)0x76da, (q15_t)0x76d8,\n    (q15_t)0x76d5, (q15_t)0x76d3, (q15_t)0x76d1, (q15_t)0x76ce, (q15_t)0x76cc,\n    (q15_t)0x76ca, (q15_t)0x76c7, (q15_t)0x76c5, (q15_t)0x76c3, (q15_t)0x76c0,\n    (q15_t)0x76be, (q15_t)0x76bc, (q15_t)0x76b9, (q15_t)0x76b7, (q15_t)0x76b4,\n    (q15_t)0x76b2, (q15_t)0x76b0, (q15_t)0x76ad, (q15_t)0x76ab, (q15_t)0x76a9,\n    (q15_t)0x76a6, (q15_t)0x76a4, (q15_t)0x76a2, (q15_t)0x769f, (q15_t)0x769d,\n    (q15_t)0x769b, (q15_t)0x7698, (q15_t)0x7696, (q15_t)0x7693, (q15_t)0x7691,\n    (q15_t)0x768f, (q15_t)0x768c, (q15_t)0x768a, (q15_t)0x7688, (q15_t)0x7685,\n    (q15_t)0x7683, (q15_t)0x7681, (q15_t)0x767e, (q15_t)0x767c, (q15_t)0x7679,\n    (q15_t)0x7677, (q15_t)0x7675, (q15_t)0x7672, (q15_t)0x7670, (q15_t)0x766d,\n    (q15_t)0x766b, (q15_t)0x7669, (q15_t)0x7666, (q15_t)0x7664, (q15_t)0x7662,\n    (q15_t)0x765f, (q15_t)0x765d, (q15_t)0x765a, (q15_t)0x7658, (q15_t)0x7656,\n    (q15_t)0x7653, (q15_t)0x7651, (q15_t)0x764e, (q15_t)0x764c, (q15_t)0x764a,\n    (q15_t)0x7647, (q15_t)0x7645, (q15_t)0x7642, (q15_t)0x7640, (q15_t)0x763e,\n    (q15_t)0x763b, (q15_t)0x7639, (q15_t)0x7636, (q15_t)0x7634, (q15_t)0x7632,\n    (q15_t)0x762f, (q15_t)0x762d, (q15_t)0x762a, (q15_t)0x7628, (q15_t)0x7625,\n    (q15_t)0x7623, (q15_t)0x7621, (q15_t)0x761e, (q15_t)0x761c, (q15_t)0x7619,\n    (q15_t)0x7617, (q15_t)0x7615, (q15_t)0x7612, (q15_t)0x7610, (q15_t)0x760d,\n    (q15_t)0x760b, (q15_t)0x7608, (q15_t)0x7606, (q15_t)0x7604, (q15_t)0x7601,\n    (q15_t)0x75ff, (q15_t)0x75fc, (q15_t)0x75fa, (q15_t)0x75f7, (q15_t)0x75f5,\n    (q15_t)0x75f2, (q15_t)0x75f0, (q15_t)0x75ee, (q15_t)0x75eb, (q15_t)0x75e9,\n    (q15_t)0x75e6, (q15_t)0x75e4, (q15_t)0x75e1, (q15_t)0x75df, (q15_t)0x75dc,\n    (q15_t)0x75da, (q15_t)0x75d8, (q15_t)0x75d5, (q15_t)0x75d3, (q15_t)0x75d0,\n    (q15_t)0x75ce, (q15_t)0x75cb, (q15_t)0x75c9, (q15_t)0x75c6, (q15_t)0x75c4,\n    (q15_t)0x75c1, (q15_t)0x75bf, (q15_t)0x75bc, (q15_t)0x75ba, (q15_t)0x75b8,\n    (q15_t)0x75b5, (q15_t)0x75b3, (q15_t)0x75b0, (q15_t)0x75ae, (q15_t)0x75ab,\n    (q15_t)0x75a9, (q15_t)0x75a6, (q15_t)0x75a4, (q15_t)0x75a1, (q15_t)0x759f,\n    (q15_t)0x759c, (q15_t)0x759a, (q15_t)0x7597, (q15_t)0x7595, (q15_t)0x7592,\n    (q15_t)0x7590, (q15_t)0x758d, (q15_t)0x758b, (q15_t)0x7588, (q15_t)0x7586,\n    (q15_t)0x7584, (q15_t)0x7581, (q15_t)0x757f, (q15_t)0x757c, (q15_t)0x757a,\n    (q15_t)0x7577, (q15_t)0x7575, (q15_t)0x7572, (q15_t)0x7570, (q15_t)0x756d,\n    (q15_t)0x756b, (q15_t)0x7568, (q15_t)0x7566, (q15_t)0x7563, (q15_t)0x7561,\n    (q15_t)0x755e, (q15_t)0x755c, (q15_t)0x7559, (q15_t)0x7556, (q15_t)0x7554,\n    (q15_t)0x7551, (q15_t)0x754f, (q15_t)0x754c, (q15_t)0x754a, (q15_t)0x7547,\n    (q15_t)0x7545, (q15_t)0x7542, (q15_t)0x7540, (q15_t)0x753d, (q15_t)0x753b,\n    (q15_t)0x7538, (q15_t)0x7536, (q15_t)0x7533, (q15_t)0x7531, (q15_t)0x752e,\n    (q15_t)0x752c, (q15_t)0x7529, (q15_t)0x7527, (q15_t)0x7524, (q15_t)0x7522,\n    (q15_t)0x751f, (q15_t)0x751c, (q15_t)0x751a, (q15_t)0x7517, (q15_t)0x7515,\n    (q15_t)0x7512, (q15_t)0x7510, (q15_t)0x750d, (q15_t)0x750b, (q15_t)0x7508,\n    (q15_t)0x7506, (q15_t)0x7503, (q15_t)0x7501, (q15_t)0x74fe, (q15_t)0x74fb,\n    (q15_t)0x74f9, (q15_t)0x74f6, (q15_t)0x74f4, (q15_t)0x74f1, (q15_t)0x74ef,\n    (q15_t)0x74ec, (q15_t)0x74ea, (q15_t)0x74e7, (q15_t)0x74e4, (q15_t)0x74e2,\n    (q15_t)0x74df, (q15_t)0x74dd, (q15_t)0x74da, (q15_t)0x74d8, (q15_t)0x74d5,\n    (q15_t)0x74d2, (q15_t)0x74d0, (q15_t)0x74cd, (q15_t)0x74cb, (q15_t)0x74c8,\n    (q15_t)0x74c6, (q15_t)0x74c3, (q15_t)0x74c0, (q15_t)0x74be, (q15_t)0x74bb,\n    (q15_t)0x74b9, (q15_t)0x74b6, (q15_t)0x74b4, (q15_t)0x74b1, (q15_t)0x74ae,\n    (q15_t)0x74ac, (q15_t)0x74a9, (q15_t)0x74a7, (q15_t)0x74a4, (q15_t)0x74a1,\n    (q15_t)0x749f, (q15_t)0x749c, (q15_t)0x749a, (q15_t)0x7497, (q15_t)0x7495,\n    (q15_t)0x7492, (q15_t)0x748f, (q15_t)0x748d, (q15_t)0x748a, (q15_t)0x7488,\n    (q15_t)0x7485, (q15_t)0x7482, (q15_t)0x7480, (q15_t)0x747d, (q15_t)0x747b,\n    (q15_t)0x7478, (q15_t)0x7475, (q15_t)0x7473, (q15_t)0x7470, (q15_t)0x746d,\n    (q15_t)0x746b, (q15_t)0x7468, (q15_t)0x7466, (q15_t)0x7463, (q15_t)0x7460,\n    (q15_t)0x745e, (q15_t)0x745b, (q15_t)0x7459, (q15_t)0x7456, (q15_t)0x7453,\n    (q15_t)0x7451, (q15_t)0x744e, (q15_t)0x744b, (q15_t)0x7449, (q15_t)0x7446,\n    (q15_t)0x7444, (q15_t)0x7441, (q15_t)0x743e, (q15_t)0x743c, (q15_t)0x7439,\n    (q15_t)0x7436, (q15_t)0x7434, (q15_t)0x7431, (q15_t)0x742f, (q15_t)0x742c,\n    (q15_t)0x7429, (q15_t)0x7427, (q15_t)0x7424, (q15_t)0x7421, (q15_t)0x741f,\n    (q15_t)0x741c, (q15_t)0x7419, (q15_t)0x7417, (q15_t)0x7414, (q15_t)0x7411,\n    (q15_t)0x740f, (q15_t)0x740c, (q15_t)0x740a, (q15_t)0x7407, (q15_t)0x7404,\n    (q15_t)0x7402, (q15_t)0x73ff, (q15_t)0x73fc, (q15_t)0x73fa, (q15_t)0x73f7,\n    (q15_t)0x73f4, (q15_t)0x73f2, (q15_t)0x73ef, (q15_t)0x73ec, (q15_t)0x73ea,\n    (q15_t)0x73e7, (q15_t)0x73e4, (q15_t)0x73e2, (q15_t)0x73df, (q15_t)0x73dc,\n    (q15_t)0x73da, (q15_t)0x73d7, (q15_t)0x73d4, (q15_t)0x73d2, (q15_t)0x73cf,\n    (q15_t)0x73cc, (q15_t)0x73ca, (q15_t)0x73c7, (q15_t)0x73c4, (q15_t)0x73c1,\n    (q15_t)0x73bf, (q15_t)0x73bc, (q15_t)0x73b9, (q15_t)0x73b7, (q15_t)0x73b4,\n    (q15_t)0x73b1, (q15_t)0x73af, (q15_t)0x73ac, (q15_t)0x73a9, (q15_t)0x73a7,\n    (q15_t)0x73a4, (q15_t)0x73a1, (q15_t)0x739f, (q15_t)0x739c, (q15_t)0x7399,\n    (q15_t)0x7396, (q15_t)0x7394, (q15_t)0x7391, (q15_t)0x738e, (q15_t)0x738c,\n    (q15_t)0x7389, (q15_t)0x7386, (q15_t)0x7384, (q15_t)0x7381, (q15_t)0x737e,\n    (q15_t)0x737b, (q15_t)0x7379, (q15_t)0x7376, (q15_t)0x7373, (q15_t)0x7371,\n    (q15_t)0x736e, (q15_t)0x736b, (q15_t)0x7368, (q15_t)0x7366, (q15_t)0x7363,\n    (q15_t)0x7360, (q15_t)0x735e, (q15_t)0x735b, (q15_t)0x7358, (q15_t)0x7355,\n    (q15_t)0x7353, (q15_t)0x7350, (q15_t)0x734d, (q15_t)0x734a, (q15_t)0x7348,\n    (q15_t)0x7345, (q15_t)0x7342, (q15_t)0x7340, (q15_t)0x733d, (q15_t)0x733a,\n    (q15_t)0x7337, (q15_t)0x7335, (q15_t)0x7332, (q15_t)0x732f, (q15_t)0x732c,\n    (q15_t)0x732a, (q15_t)0x7327, (q15_t)0x7324, (q15_t)0x7321, (q15_t)0x731f,\n    (q15_t)0x731c, (q15_t)0x7319, (q15_t)0x7316, (q15_t)0x7314, (q15_t)0x7311,\n    (q15_t)0x730e, (q15_t)0x730b, (q15_t)0x7309, (q15_t)0x7306, (q15_t)0x7303,\n    (q15_t)0x7300, (q15_t)0x72fe, (q15_t)0x72fb, (q15_t)0x72f8, (q15_t)0x72f5,\n    (q15_t)0x72f3, (q15_t)0x72f0, (q15_t)0x72ed, (q15_t)0x72ea, (q15_t)0x72e8,\n    (q15_t)0x72e5, (q15_t)0x72e2, (q15_t)0x72df, (q15_t)0x72dc, (q15_t)0x72da,\n    (q15_t)0x72d7, (q15_t)0x72d4, (q15_t)0x72d1, (q15_t)0x72cf, (q15_t)0x72cc,\n    (q15_t)0x72c9, (q15_t)0x72c6, (q15_t)0x72c3, (q15_t)0x72c1, (q15_t)0x72be,\n    (q15_t)0x72bb, (q15_t)0x72b8, (q15_t)0x72b5, (q15_t)0x72b3, (q15_t)0x72b0,\n    (q15_t)0x72ad, (q15_t)0x72aa, (q15_t)0x72a8, (q15_t)0x72a5, (q15_t)0x72a2,\n    (q15_t)0x729f, (q15_t)0x729c, (q15_t)0x729a, (q15_t)0x7297, (q15_t)0x7294,\n    (q15_t)0x7291, (q15_t)0x728e, (q15_t)0x728c, (q15_t)0x7289, (q15_t)0x7286,\n    (q15_t)0x7283, (q15_t)0x7280, (q15_t)0x727e, (q15_t)0x727b, (q15_t)0x7278,\n    (q15_t)0x7275, (q15_t)0x7272, (q15_t)0x726f, (q15_t)0x726d, (q15_t)0x726a,\n    (q15_t)0x7267, (q15_t)0x7264, (q15_t)0x7261, (q15_t)0x725f, (q15_t)0x725c,\n    (q15_t)0x7259, (q15_t)0x7256, (q15_t)0x7253, (q15_t)0x7250, (q15_t)0x724e,\n    (q15_t)0x724b, (q15_t)0x7248, (q15_t)0x7245, (q15_t)0x7242, (q15_t)0x723f,\n    (q15_t)0x723d, (q15_t)0x723a, (q15_t)0x7237, (q15_t)0x7234, (q15_t)0x7231,\n    (q15_t)0x722e, (q15_t)0x722c, (q15_t)0x7229, (q15_t)0x7226, (q15_t)0x7223,\n    (q15_t)0x7220, (q15_t)0x721d, (q15_t)0x721b, (q15_t)0x7218, (q15_t)0x7215,\n    (q15_t)0x7212, (q15_t)0x720f, (q15_t)0x720c, (q15_t)0x7209, (q15_t)0x7207,\n    (q15_t)0x7204, (q15_t)0x7201, (q15_t)0x71fe, (q15_t)0x71fb, (q15_t)0x71f8,\n    (q15_t)0x71f5, (q15_t)0x71f3, (q15_t)0x71f0, (q15_t)0x71ed, (q15_t)0x71ea,\n    (q15_t)0x71e7, (q15_t)0x71e4, (q15_t)0x71e1, (q15_t)0x71df, (q15_t)0x71dc,\n    (q15_t)0x71d9, (q15_t)0x71d6, (q15_t)0x71d3, (q15_t)0x71d0, (q15_t)0x71cd,\n    (q15_t)0x71ca, (q15_t)0x71c8, (q15_t)0x71c5, (q15_t)0x71c2, (q15_t)0x71bf,\n    (q15_t)0x71bc, (q15_t)0x71b9, (q15_t)0x71b6, (q15_t)0x71b3, (q15_t)0x71b0,\n    (q15_t)0x71ae, (q15_t)0x71ab, (q15_t)0x71a8, (q15_t)0x71a5, (q15_t)0x71a2,\n    (q15_t)0x719f, (q15_t)0x719c, (q15_t)0x7199, (q15_t)0x7196, (q15_t)0x7194,\n    (q15_t)0x7191, (q15_t)0x718e, (q15_t)0x718b, (q15_t)0x7188, (q15_t)0x7185,\n    (q15_t)0x7182, (q15_t)0x717f, (q15_t)0x717c, (q15_t)0x7179, (q15_t)0x7177,\n    (q15_t)0x7174, (q15_t)0x7171, (q15_t)0x716e, (q15_t)0x716b, (q15_t)0x7168,\n    (q15_t)0x7165, (q15_t)0x7162, (q15_t)0x715f, (q15_t)0x715c, (q15_t)0x7159,\n    (q15_t)0x7156, (q15_t)0x7154, (q15_t)0x7151, (q15_t)0x714e, (q15_t)0x714b,\n    (q15_t)0x7148, (q15_t)0x7145, (q15_t)0x7142, (q15_t)0x713f, (q15_t)0x713c,\n    (q15_t)0x7139, (q15_t)0x7136, (q15_t)0x7133, (q15_t)0x7130, (q15_t)0x712d,\n    (q15_t)0x712b, (q15_t)0x7128, (q15_t)0x7125, (q15_t)0x7122, (q15_t)0x711f,\n    (q15_t)0x711c, (q15_t)0x7119, (q15_t)0x7116, (q15_t)0x7113, (q15_t)0x7110,\n    (q15_t)0x710d, (q15_t)0x710a, (q15_t)0x7107, (q15_t)0x7104, (q15_t)0x7101,\n    (q15_t)0x70fe, (q15_t)0x70fb, (q15_t)0x70f8, (q15_t)0x70f6, (q15_t)0x70f3,\n    (q15_t)0x70f0, (q15_t)0x70ed, (q15_t)0x70ea, (q15_t)0x70e7, (q15_t)0x70e4,\n    (q15_t)0x70e1, (q15_t)0x70de, (q15_t)0x70db, (q15_t)0x70d8, (q15_t)0x70d5,\n    (q15_t)0x70d2, (q15_t)0x70cf, (q15_t)0x70cc, (q15_t)0x70c9, (q15_t)0x70c6,\n    (q15_t)0x70c3, (q15_t)0x70c0, (q15_t)0x70bd, (q15_t)0x70ba, (q15_t)0x70b7,\n    (q15_t)0x70b4, (q15_t)0x70b1, (q15_t)0x70ae, (q15_t)0x70ab, (q15_t)0x70a8,\n    (q15_t)0x70a5, (q15_t)0x70a2, (q15_t)0x709f, (q15_t)0x709c, (q15_t)0x7099,\n    (q15_t)0x7096, (q15_t)0x7093, (q15_t)0x7090, (q15_t)0x708d, (q15_t)0x708a,\n    (q15_t)0x7087, (q15_t)0x7084, (q15_t)0x7081, (q15_t)0x707e, (q15_t)0x707b,\n    (q15_t)0x7078, (q15_t)0x7075, (q15_t)0x7072, (q15_t)0x706f, (q15_t)0x706c,\n    (q15_t)0x7069, (q15_t)0x7066, (q15_t)0x7063, (q15_t)0x7060, (q15_t)0x705d,\n    (q15_t)0x705a, (q15_t)0x7057, (q15_t)0x7054, (q15_t)0x7051, (q15_t)0x704e,\n    (q15_t)0x704b, (q15_t)0x7048, (q15_t)0x7045, (q15_t)0x7042, (q15_t)0x703f,\n    (q15_t)0x703c, (q15_t)0x7039, (q15_t)0x7036, (q15_t)0x7033, (q15_t)0x7030,\n    (q15_t)0x702d, (q15_t)0x702a, (q15_t)0x7027, (q15_t)0x7024, (q15_t)0x7021,\n    (q15_t)0x701e, (q15_t)0x701b, (q15_t)0x7018, (q15_t)0x7015, (q15_t)0x7012,\n    (q15_t)0x700f, (q15_t)0x700c, (q15_t)0x7009, (q15_t)0x7006, (q15_t)0x7003,\n    (q15_t)0x7000, (q15_t)0x6ffd, (q15_t)0x6ffa, (q15_t)0x6ff7, (q15_t)0x6ff3,\n    (q15_t)0x6ff0, (q15_t)0x6fed, (q15_t)0x6fea, (q15_t)0x6fe7, (q15_t)0x6fe4,\n    (q15_t)0x6fe1, (q15_t)0x6fde, (q15_t)0x6fdb, (q15_t)0x6fd8, (q15_t)0x6fd5,\n    (q15_t)0x6fd2, (q15_t)0x6fcf, (q15_t)0x6fcc, (q15_t)0x6fc9, (q15_t)0x6fc6,\n    (q15_t)0x6fc3, (q15_t)0x6fc0, (q15_t)0x6fbc, (q15_t)0x6fb9, (q15_t)0x6fb6,\n    (q15_t)0x6fb3, (q15_t)0x6fb0, (q15_t)0x6fad, (q15_t)0x6faa, (q15_t)0x6fa7,\n    (q15_t)0x6fa4, (q15_t)0x6fa1, (q15_t)0x6f9e, (q15_t)0x6f9b, (q15_t)0x6f98,\n    (q15_t)0x6f95, (q15_t)0x6f91, (q15_t)0x6f8e, (q15_t)0x6f8b, (q15_t)0x6f88,\n    (q15_t)0x6f85, (q15_t)0x6f82, (q15_t)0x6f7f, (q15_t)0x6f7c, (q15_t)0x6f79,\n    (q15_t)0x6f76, (q15_t)0x6f73, (q15_t)0x6f70, (q15_t)0x6f6c, (q15_t)0x6f69,\n    (q15_t)0x6f66, (q15_t)0x6f63, (q15_t)0x6f60, (q15_t)0x6f5d, (q15_t)0x6f5a,\n    (q15_t)0x6f57, (q15_t)0x6f54, (q15_t)0x6f51, (q15_t)0x6f4d, (q15_t)0x6f4a,\n    (q15_t)0x6f47, (q15_t)0x6f44, (q15_t)0x6f41, (q15_t)0x6f3e, (q15_t)0x6f3b,\n    (q15_t)0x6f38, (q15_t)0x6f35, (q15_t)0x6f31, (q15_t)0x6f2e, (q15_t)0x6f2b,\n    (q15_t)0x6f28, (q15_t)0x6f25, (q15_t)0x6f22, (q15_t)0x6f1f, (q15_t)0x6f1c,\n    (q15_t)0x6f19, (q15_t)0x6f15, (q15_t)0x6f12, (q15_t)0x6f0f, (q15_t)0x6f0c,\n    (q15_t)0x6f09, (q15_t)0x6f06, (q15_t)0x6f03, (q15_t)0x6f00, (q15_t)0x6efc,\n    (q15_t)0x6ef9, (q15_t)0x6ef6, (q15_t)0x6ef3, (q15_t)0x6ef0, (q15_t)0x6eed,\n    (q15_t)0x6eea, (q15_t)0x6ee7, (q15_t)0x6ee3, (q15_t)0x6ee0, (q15_t)0x6edd,\n    (q15_t)0x6eda, (q15_t)0x6ed7, (q15_t)0x6ed4, (q15_t)0x6ed1, (q15_t)0x6ecd,\n    (q15_t)0x6eca, (q15_t)0x6ec7, (q15_t)0x6ec4, (q15_t)0x6ec1, (q15_t)0x6ebe,\n    (q15_t)0x6eba, (q15_t)0x6eb7, (q15_t)0x6eb4, (q15_t)0x6eb1, (q15_t)0x6eae,\n    (q15_t)0x6eab, (q15_t)0x6ea8, (q15_t)0x6ea4, (q15_t)0x6ea1, (q15_t)0x6e9e,\n    (q15_t)0x6e9b, (q15_t)0x6e98, (q15_t)0x6e95, (q15_t)0x6e91, (q15_t)0x6e8e,\n    (q15_t)0x6e8b, (q15_t)0x6e88, (q15_t)0x6e85, (q15_t)0x6e82, (q15_t)0x6e7e,\n    (q15_t)0x6e7b, (q15_t)0x6e78, (q15_t)0x6e75, (q15_t)0x6e72, (q15_t)0x6e6f,\n    (q15_t)0x6e6b, (q15_t)0x6e68, (q15_t)0x6e65, (q15_t)0x6e62, (q15_t)0x6e5f,\n    (q15_t)0x6e5b, (q15_t)0x6e58, (q15_t)0x6e55, (q15_t)0x6e52, (q15_t)0x6e4f,\n    (q15_t)0x6e4c, (q15_t)0x6e48, (q15_t)0x6e45, (q15_t)0x6e42, (q15_t)0x6e3f,\n    (q15_t)0x6e3c, (q15_t)0x6e38, (q15_t)0x6e35, (q15_t)0x6e32, (q15_t)0x6e2f,\n    (q15_t)0x6e2c, (q15_t)0x6e28, (q15_t)0x6e25, (q15_t)0x6e22, (q15_t)0x6e1f,\n    (q15_t)0x6e1c, (q15_t)0x6e18, (q15_t)0x6e15, (q15_t)0x6e12, (q15_t)0x6e0f,\n    (q15_t)0x6e0c, (q15_t)0x6e08, (q15_t)0x6e05, (q15_t)0x6e02, (q15_t)0x6dff,\n    (q15_t)0x6dfb, (q15_t)0x6df8, (q15_t)0x6df5, (q15_t)0x6df2, (q15_t)0x6def,\n    (q15_t)0x6deb, (q15_t)0x6de8, (q15_t)0x6de5, (q15_t)0x6de2, (q15_t)0x6ddf,\n    (q15_t)0x6ddb, (q15_t)0x6dd8, (q15_t)0x6dd5, (q15_t)0x6dd2, (q15_t)0x6dce,\n    (q15_t)0x6dcb, (q15_t)0x6dc8, (q15_t)0x6dc5, (q15_t)0x6dc1, (q15_t)0x6dbe,\n    (q15_t)0x6dbb, (q15_t)0x6db8, (q15_t)0x6db5, (q15_t)0x6db1, (q15_t)0x6dae,\n    (q15_t)0x6dab, (q15_t)0x6da8, (q15_t)0x6da4, (q15_t)0x6da1, (q15_t)0x6d9e,\n    (q15_t)0x6d9b, (q15_t)0x6d97, (q15_t)0x6d94, (q15_t)0x6d91, (q15_t)0x6d8e,\n    (q15_t)0x6d8a, (q15_t)0x6d87, (q15_t)0x6d84, (q15_t)0x6d81, (q15_t)0x6d7d,\n    (q15_t)0x6d7a, (q15_t)0x6d77, (q15_t)0x6d74, (q15_t)0x6d70, (q15_t)0x6d6d,\n    (q15_t)0x6d6a, (q15_t)0x6d67, (q15_t)0x6d63, (q15_t)0x6d60, (q15_t)0x6d5d,\n    (q15_t)0x6d59, (q15_t)0x6d56, (q15_t)0x6d53, (q15_t)0x6d50, (q15_t)0x6d4c,\n    (q15_t)0x6d49, (q15_t)0x6d46, (q15_t)0x6d43, (q15_t)0x6d3f, (q15_t)0x6d3c,\n    (q15_t)0x6d39, (q15_t)0x6d36, (q15_t)0x6d32, (q15_t)0x6d2f, (q15_t)0x6d2c,\n    (q15_t)0x6d28, (q15_t)0x6d25, (q15_t)0x6d22, (q15_t)0x6d1f, (q15_t)0x6d1b,\n    (q15_t)0x6d18, (q15_t)0x6d15, (q15_t)0x6d11, (q15_t)0x6d0e, (q15_t)0x6d0b,\n    (q15_t)0x6d08, (q15_t)0x6d04, (q15_t)0x6d01, (q15_t)0x6cfe, (q15_t)0x6cfa,\n    (q15_t)0x6cf7, (q15_t)0x6cf4, (q15_t)0x6cf0, (q15_t)0x6ced, (q15_t)0x6cea,\n    (q15_t)0x6ce7, (q15_t)0x6ce3, (q15_t)0x6ce0, (q15_t)0x6cdd, (q15_t)0x6cd9,\n    (q15_t)0x6cd6, (q15_t)0x6cd3, (q15_t)0x6ccf, (q15_t)0x6ccc, (q15_t)0x6cc9,\n    (q15_t)0x6cc5, (q15_t)0x6cc2, (q15_t)0x6cbf, (q15_t)0x6cbc, (q15_t)0x6cb8,\n    (q15_t)0x6cb5, (q15_t)0x6cb2, (q15_t)0x6cae, (q15_t)0x6cab, (q15_t)0x6ca8,\n    (q15_t)0x6ca4, (q15_t)0x6ca1, (q15_t)0x6c9e, (q15_t)0x6c9a, (q15_t)0x6c97,\n    (q15_t)0x6c94, (q15_t)0x6c90, (q15_t)0x6c8d, (q15_t)0x6c8a, (q15_t)0x6c86,\n    (q15_t)0x6c83, (q15_t)0x6c80, (q15_t)0x6c7c, (q15_t)0x6c79, (q15_t)0x6c76,\n    (q15_t)0x6c72, (q15_t)0x6c6f, (q15_t)0x6c6c, (q15_t)0x6c68, (q15_t)0x6c65,\n    (q15_t)0x6c62, (q15_t)0x6c5e, (q15_t)0x6c5b, (q15_t)0x6c58, (q15_t)0x6c54,\n    (q15_t)0x6c51, (q15_t)0x6c4e, (q15_t)0x6c4a, (q15_t)0x6c47, (q15_t)0x6c44,\n    (q15_t)0x6c40, (q15_t)0x6c3d, (q15_t)0x6c39, (q15_t)0x6c36, (q15_t)0x6c33,\n    (q15_t)0x6c2f, (q15_t)0x6c2c, (q15_t)0x6c29, (q15_t)0x6c25, (q15_t)0x6c22,\n    (q15_t)0x6c1f, (q15_t)0x6c1b, (q15_t)0x6c18, (q15_t)0x6c15, (q15_t)0x6c11,\n    (q15_t)0x6c0e, (q15_t)0x6c0a, (q15_t)0x6c07, (q15_t)0x6c04, (q15_t)0x6c00,\n    (q15_t)0x6bfd, (q15_t)0x6bfa, (q15_t)0x6bf6, (q15_t)0x6bf3, (q15_t)0x6bef,\n    (q15_t)0x6bec, (q15_t)0x6be9, (q15_t)0x6be5, (q15_t)0x6be2, (q15_t)0x6bdf,\n    (q15_t)0x6bdb, (q15_t)0x6bd8, (q15_t)0x6bd4, (q15_t)0x6bd1, (q15_t)0x6bce,\n    (q15_t)0x6bca, (q15_t)0x6bc7, (q15_t)0x6bc3, (q15_t)0x6bc0, (q15_t)0x6bbd,\n    (q15_t)0x6bb9, (q15_t)0x6bb6, (q15_t)0x6bb2, (q15_t)0x6baf, (q15_t)0x6bac,\n    (q15_t)0x6ba8, (q15_t)0x6ba5, (q15_t)0x6ba1, (q15_t)0x6b9e, (q15_t)0x6b9b,\n    (q15_t)0x6b97, (q15_t)0x6b94, (q15_t)0x6b90, (q15_t)0x6b8d, (q15_t)0x6b8a,\n    (q15_t)0x6b86, (q15_t)0x6b83, (q15_t)0x6b7f, (q15_t)0x6b7c, (q15_t)0x6b79,\n    (q15_t)0x6b75, (q15_t)0x6b72, (q15_t)0x6b6e, (q15_t)0x6b6b, (q15_t)0x6b68,\n    (q15_t)0x6b64, (q15_t)0x6b61, (q15_t)0x6b5d, (q15_t)0x6b5a, (q15_t)0x6b56,\n    (q15_t)0x6b53, (q15_t)0x6b50, (q15_t)0x6b4c, (q15_t)0x6b49, (q15_t)0x6b45,\n    (q15_t)0x6b42, (q15_t)0x6b3e, (q15_t)0x6b3b, (q15_t)0x6b38, (q15_t)0x6b34,\n    (q15_t)0x6b31, (q15_t)0x6b2d, (q15_t)0x6b2a, (q15_t)0x6b26, (q15_t)0x6b23,\n    (q15_t)0x6b20, (q15_t)0x6b1c, (q15_t)0x6b19, (q15_t)0x6b15, (q15_t)0x6b12,\n    (q15_t)0x6b0e, (q15_t)0x6b0b, (q15_t)0x6b07, (q15_t)0x6b04, (q15_t)0x6b01,\n    (q15_t)0x6afd, (q15_t)0x6afa, (q15_t)0x6af6, (q15_t)0x6af3, (q15_t)0x6aef,\n    (q15_t)0x6aec, (q15_t)0x6ae8, (q15_t)0x6ae5, (q15_t)0x6ae1, (q15_t)0x6ade,\n    (q15_t)0x6adb, (q15_t)0x6ad7, (q15_t)0x6ad4, (q15_t)0x6ad0, (q15_t)0x6acd,\n    (q15_t)0x6ac9, (q15_t)0x6ac6, (q15_t)0x6ac2, (q15_t)0x6abf, (q15_t)0x6abb,\n    (q15_t)0x6ab8, (q15_t)0x6ab4, (q15_t)0x6ab1, (q15_t)0x6aae, (q15_t)0x6aaa,\n    (q15_t)0x6aa7, (q15_t)0x6aa3, (q15_t)0x6aa0, (q15_t)0x6a9c, (q15_t)0x6a99,\n    (q15_t)0x6a95, (q15_t)0x6a92, (q15_t)0x6a8e, (q15_t)0x6a8b, (q15_t)0x6a87,\n    (q15_t)0x6a84, (q15_t)0x6a80, (q15_t)0x6a7d, (q15_t)0x6a79, (q15_t)0x6a76,\n    (q15_t)0x6a72, (q15_t)0x6a6f, (q15_t)0x6a6b, (q15_t)0x6a68, (q15_t)0x6a64,\n    (q15_t)0x6a61, (q15_t)0x6a5d, (q15_t)0x6a5a, (q15_t)0x6a56, (q15_t)0x6a53,\n    (q15_t)0x6a4f, (q15_t)0x6a4c, (q15_t)0x6a48, (q15_t)0x6a45, (q15_t)0x6a41,\n    (q15_t)0x6a3e, (q15_t)0x6a3a, (q15_t)0x6a37, (q15_t)0x6a33, (q15_t)0x6a30,\n    (q15_t)0x6a2c, (q15_t)0x6a29, (q15_t)0x6a25, (q15_t)0x6a22, (q15_t)0x6a1e,\n    (q15_t)0x6a1b, (q15_t)0x6a17, (q15_t)0x6a14, (q15_t)0x6a10, (q15_t)0x6a0d,\n    (q15_t)0x6a09, (q15_t)0x6a06, (q15_t)0x6a02, (q15_t)0x69ff, (q15_t)0x69fb,\n    (q15_t)0x69f8, (q15_t)0x69f4, (q15_t)0x69f1, (q15_t)0x69ed, (q15_t)0x69e9,\n    (q15_t)0x69e6, (q15_t)0x69e2, (q15_t)0x69df, (q15_t)0x69db, (q15_t)0x69d8,\n    (q15_t)0x69d4, (q15_t)0x69d1, (q15_t)0x69cd, (q15_t)0x69ca, (q15_t)0x69c6,\n    (q15_t)0x69c3, (q15_t)0x69bf, (q15_t)0x69bc, (q15_t)0x69b8, (q15_t)0x69b4,\n    (q15_t)0x69b1, (q15_t)0x69ad, (q15_t)0x69aa, (q15_t)0x69a6, (q15_t)0x69a3,\n    (q15_t)0x699f, (q15_t)0x699c, (q15_t)0x6998, (q15_t)0x6995, (q15_t)0x6991,\n    (q15_t)0x698d, (q15_t)0x698a, (q15_t)0x6986, (q15_t)0x6983, (q15_t)0x697f,\n    (q15_t)0x697c, (q15_t)0x6978, (q15_t)0x6975, (q15_t)0x6971, (q15_t)0x696d,\n    (q15_t)0x696a, (q15_t)0x6966, (q15_t)0x6963, (q15_t)0x695f, (q15_t)0x695c,\n    (q15_t)0x6958, (q15_t)0x6954, (q15_t)0x6951, (q15_t)0x694d, (q15_t)0x694a,\n    (q15_t)0x6946, (q15_t)0x6943, (q15_t)0x693f, (q15_t)0x693b, (q15_t)0x6938,\n    (q15_t)0x6934, (q15_t)0x6931, (q15_t)0x692d, (q15_t)0x692a, (q15_t)0x6926,\n    (q15_t)0x6922, (q15_t)0x691f, (q15_t)0x691b, (q15_t)0x6918, (q15_t)0x6914,\n    (q15_t)0x6910, (q15_t)0x690d, (q15_t)0x6909, (q15_t)0x6906, (q15_t)0x6902,\n    (q15_t)0x68fe, (q15_t)0x68fb, (q15_t)0x68f7, (q15_t)0x68f4, (q15_t)0x68f0,\n    (q15_t)0x68ec, (q15_t)0x68e9, (q15_t)0x68e5, (q15_t)0x68e2, (q15_t)0x68de,\n    (q15_t)0x68da, (q15_t)0x68d7, (q15_t)0x68d3, (q15_t)0x68d0, (q15_t)0x68cc,\n    (q15_t)0x68c8, (q15_t)0x68c5, (q15_t)0x68c1, (q15_t)0x68be, (q15_t)0x68ba,\n    (q15_t)0x68b6, (q15_t)0x68b3, (q15_t)0x68af, (q15_t)0x68ac, (q15_t)0x68a8,\n    (q15_t)0x68a4, (q15_t)0x68a1, (q15_t)0x689d, (q15_t)0x6899, (q15_t)0x6896,\n    (q15_t)0x6892, (q15_t)0x688f, (q15_t)0x688b, (q15_t)0x6887, (q15_t)0x6884,\n    (q15_t)0x6880, (q15_t)0x687c, (q15_t)0x6879, (q15_t)0x6875, (q15_t)0x6872,\n    (q15_t)0x686e, (q15_t)0x686a, (q15_t)0x6867, (q15_t)0x6863, (q15_t)0x685f,\n    (q15_t)0x685c, (q15_t)0x6858, (q15_t)0x6854, (q15_t)0x6851, (q15_t)0x684d,\n    (q15_t)0x684a, (q15_t)0x6846, (q15_t)0x6842, (q15_t)0x683f, (q15_t)0x683b,\n    (q15_t)0x6837, (q15_t)0x6834, (q15_t)0x6830, (q15_t)0x682c, (q15_t)0x6829,\n    (q15_t)0x6825, (q15_t)0x6821, (q15_t)0x681e, (q15_t)0x681a, (q15_t)0x6816,\n    (q15_t)0x6813, (q15_t)0x680f, (q15_t)0x680b, (q15_t)0x6808, (q15_t)0x6804,\n    (q15_t)0x6800, (q15_t)0x67fd, (q15_t)0x67f9, (q15_t)0x67f5, (q15_t)0x67f2,\n    (q15_t)0x67ee, (q15_t)0x67ea, (q15_t)0x67e7, (q15_t)0x67e3, (q15_t)0x67df,\n    (q15_t)0x67dc, (q15_t)0x67d8, (q15_t)0x67d4, (q15_t)0x67d1, (q15_t)0x67cd,\n    (q15_t)0x67c9, (q15_t)0x67c6, (q15_t)0x67c2, (q15_t)0x67be, (q15_t)0x67bb,\n    (q15_t)0x67b7, (q15_t)0x67b3, (q15_t)0x67b0, (q15_t)0x67ac, (q15_t)0x67a8,\n    (q15_t)0x67a5, (q15_t)0x67a1, (q15_t)0x679d, (q15_t)0x679a, (q15_t)0x6796,\n    (q15_t)0x6792, (q15_t)0x678e, (q15_t)0x678b, (q15_t)0x6787, (q15_t)0x6783,\n    (q15_t)0x6780, (q15_t)0x677c, (q15_t)0x6778, (q15_t)0x6775, (q15_t)0x6771,\n    (q15_t)0x676d, (q15_t)0x6769, (q15_t)0x6766, (q15_t)0x6762, (q15_t)0x675e,\n    (q15_t)0x675b, (q15_t)0x6757, (q15_t)0x6753, (q15_t)0x6750, (q15_t)0x674c,\n    (q15_t)0x6748, (q15_t)0x6744, (q15_t)0x6741, (q15_t)0x673d, (q15_t)0x6739,\n    (q15_t)0x6736, (q15_t)0x6732, (q15_t)0x672e, (q15_t)0x672a, (q15_t)0x6727,\n    (q15_t)0x6723, (q15_t)0x671f, (q15_t)0x671c, (q15_t)0x6718, (q15_t)0x6714,\n    (q15_t)0x6710, (q15_t)0x670d, (q15_t)0x6709, (q15_t)0x6705, (q15_t)0x6701,\n    (q15_t)0x66fe, (q15_t)0x66fa, (q15_t)0x66f6, (q15_t)0x66f3, (q15_t)0x66ef,\n    (q15_t)0x66eb, (q15_t)0x66e7, (q15_t)0x66e4, (q15_t)0x66e0, (q15_t)0x66dc,\n    (q15_t)0x66d8, (q15_t)0x66d5, (q15_t)0x66d1, (q15_t)0x66cd, (q15_t)0x66c9,\n    (q15_t)0x66c6, (q15_t)0x66c2, (q15_t)0x66be, (q15_t)0x66ba, (q15_t)0x66b7,\n    (q15_t)0x66b3, (q15_t)0x66af, (q15_t)0x66ab, (q15_t)0x66a8, (q15_t)0x66a4,\n    (q15_t)0x66a0, (q15_t)0x669c, (q15_t)0x6699, (q15_t)0x6695, (q15_t)0x6691,\n    (q15_t)0x668d, (q15_t)0x668a, (q15_t)0x6686, (q15_t)0x6682, (q15_t)0x667e,\n    (q15_t)0x667b, (q15_t)0x6677, (q15_t)0x6673, (q15_t)0x666f, (q15_t)0x666b,\n    (q15_t)0x6668, (q15_t)0x6664, (q15_t)0x6660, (q15_t)0x665c, (q15_t)0x6659,\n    (q15_t)0x6655, (q15_t)0x6651, (q15_t)0x664d, (q15_t)0x664a, (q15_t)0x6646,\n    (q15_t)0x6642, (q15_t)0x663e, (q15_t)0x663a, (q15_t)0x6637, (q15_t)0x6633,\n    (q15_t)0x662f, (q15_t)0x662b, (q15_t)0x6627, (q15_t)0x6624, (q15_t)0x6620,\n    (q15_t)0x661c, (q15_t)0x6618, (q15_t)0x6615, (q15_t)0x6611, (q15_t)0x660d,\n    (q15_t)0x6609, (q15_t)0x6605, (q15_t)0x6602, (q15_t)0x65fe, (q15_t)0x65fa,\n    (q15_t)0x65f6, (q15_t)0x65f2, (q15_t)0x65ef, (q15_t)0x65eb, (q15_t)0x65e7,\n    (q15_t)0x65e3, (q15_t)0x65df, (q15_t)0x65dc, (q15_t)0x65d8, (q15_t)0x65d4,\n    (q15_t)0x65d0, (q15_t)0x65cc, (q15_t)0x65c9, (q15_t)0x65c5, (q15_t)0x65c1,\n    (q15_t)0x65bd, (q15_t)0x65b9, (q15_t)0x65b5, (q15_t)0x65b2, (q15_t)0x65ae,\n    (q15_t)0x65aa, (q15_t)0x65a6, (q15_t)0x65a2, (q15_t)0x659f, (q15_t)0x659b,\n    (q15_t)0x6597, (q15_t)0x6593, (q15_t)0x658f, (q15_t)0x658b, (q15_t)0x6588,\n    (q15_t)0x6584, (q15_t)0x6580, (q15_t)0x657c, (q15_t)0x6578, (q15_t)0x6574,\n    (q15_t)0x6571, (q15_t)0x656d, (q15_t)0x6569, (q15_t)0x6565, (q15_t)0x6561,\n    (q15_t)0x655d, (q15_t)0x655a, (q15_t)0x6556, (q15_t)0x6552, (q15_t)0x654e,\n    (q15_t)0x654a, (q15_t)0x6546, (q15_t)0x6543, (q15_t)0x653f, (q15_t)0x653b,\n    (q15_t)0x6537, (q15_t)0x6533, (q15_t)0x652f, (q15_t)0x652c, (q15_t)0x6528,\n    (q15_t)0x6524, (q15_t)0x6520, (q15_t)0x651c, (q15_t)0x6518, (q15_t)0x6514,\n    (q15_t)0x6511, (q15_t)0x650d, (q15_t)0x6509, (q15_t)0x6505, (q15_t)0x6501,\n    (q15_t)0x64fd, (q15_t)0x64f9, (q15_t)0x64f6, (q15_t)0x64f2, (q15_t)0x64ee,\n    (q15_t)0x64ea, (q15_t)0x64e6, (q15_t)0x64e2, (q15_t)0x64de, (q15_t)0x64db,\n    (q15_t)0x64d7, (q15_t)0x64d3, (q15_t)0x64cf, (q15_t)0x64cb, (q15_t)0x64c7,\n    (q15_t)0x64c3, (q15_t)0x64bf, (q15_t)0x64bc, (q15_t)0x64b8, (q15_t)0x64b4,\n    (q15_t)0x64b0, (q15_t)0x64ac, (q15_t)0x64a8, (q15_t)0x64a4, (q15_t)0x64a0,\n    (q15_t)0x649c, (q15_t)0x6499, (q15_t)0x6495, (q15_t)0x6491, (q15_t)0x648d,\n    (q15_t)0x6489, (q15_t)0x6485, (q15_t)0x6481, (q15_t)0x647d, (q15_t)0x6479,\n    (q15_t)0x6476, (q15_t)0x6472, (q15_t)0x646e, (q15_t)0x646a, (q15_t)0x6466,\n    (q15_t)0x6462, (q15_t)0x645e, (q15_t)0x645a, (q15_t)0x6456, (q15_t)0x6453,\n    (q15_t)0x644f, (q15_t)0x644b, (q15_t)0x6447, (q15_t)0x6443, (q15_t)0x643f,\n    (q15_t)0x643b, (q15_t)0x6437, (q15_t)0x6433, (q15_t)0x642f, (q15_t)0x642b,\n    (q15_t)0x6428, (q15_t)0x6424, (q15_t)0x6420, (q15_t)0x641c, (q15_t)0x6418,\n    (q15_t)0x6414, (q15_t)0x6410, (q15_t)0x640c, (q15_t)0x6408, (q15_t)0x6404,\n    (q15_t)0x6400, (q15_t)0x63fc, (q15_t)0x63f9, (q15_t)0x63f5, (q15_t)0x63f1,\n    (q15_t)0x63ed, (q15_t)0x63e9, (q15_t)0x63e5, (q15_t)0x63e1, (q15_t)0x63dd,\n    (q15_t)0x63d9, (q15_t)0x63d5, (q15_t)0x63d1, (q15_t)0x63cd, (q15_t)0x63c9,\n    (q15_t)0x63c5, (q15_t)0x63c1, (q15_t)0x63be, (q15_t)0x63ba, (q15_t)0x63b6,\n    (q15_t)0x63b2, (q15_t)0x63ae, (q15_t)0x63aa, (q15_t)0x63a6, (q15_t)0x63a2,\n    (q15_t)0x639e, (q15_t)0x639a, (q15_t)0x6396, (q15_t)0x6392, (q15_t)0x638e,\n    (q15_t)0x638a, (q15_t)0x6386, (q15_t)0x6382, (q15_t)0x637e, (q15_t)0x637a,\n    (q15_t)0x6377, (q15_t)0x6373, (q15_t)0x636f, (q15_t)0x636b, (q15_t)0x6367,\n    (q15_t)0x6363, (q15_t)0x635f, (q15_t)0x635b, (q15_t)0x6357, (q15_t)0x6353,\n    (q15_t)0x634f, (q15_t)0x634b, (q15_t)0x6347, (q15_t)0x6343, (q15_t)0x633f,\n    (q15_t)0x633b, (q15_t)0x6337, (q15_t)0x6333, (q15_t)0x632f, (q15_t)0x632b,\n    (q15_t)0x6327, (q15_t)0x6323, (q15_t)0x631f, (q15_t)0x631b, (q15_t)0x6317,\n    (q15_t)0x6313, (q15_t)0x630f, (q15_t)0x630b, (q15_t)0x6307, (q15_t)0x6303,\n    (q15_t)0x62ff, (q15_t)0x62fb, (q15_t)0x62f7, (q15_t)0x62f3, (q15_t)0x62f0,\n    (q15_t)0x62ec, (q15_t)0x62e8, (q15_t)0x62e4, (q15_t)0x62e0, (q15_t)0x62dc,\n    (q15_t)0x62d8, (q15_t)0x62d4, (q15_t)0x62d0, (q15_t)0x62cc, (q15_t)0x62c8,\n    (q15_t)0x62c4, (q15_t)0x62c0, (q15_t)0x62bc, (q15_t)0x62b8, (q15_t)0x62b4,\n    (q15_t)0x62b0, (q15_t)0x62ac, (q15_t)0x62a8, (q15_t)0x62a4, (q15_t)0x62a0,\n    (q15_t)0x629c, (q15_t)0x6298, (q15_t)0x6294, (q15_t)0x6290, (q15_t)0x628c,\n    (q15_t)0x6288, (q15_t)0x6284, (q15_t)0x6280, (q15_t)0x627c, (q15_t)0x6278,\n    (q15_t)0x6273, (q15_t)0x626f, (q15_t)0x626b, (q15_t)0x6267, (q15_t)0x6263,\n    (q15_t)0x625f, (q15_t)0x625b, (q15_t)0x6257, (q15_t)0x6253, (q15_t)0x624f,\n    (q15_t)0x624b, (q15_t)0x6247, (q15_t)0x6243, (q15_t)0x623f, (q15_t)0x623b,\n    (q15_t)0x6237, (q15_t)0x6233, (q15_t)0x622f, (q15_t)0x622b, (q15_t)0x6227,\n    (q15_t)0x6223, (q15_t)0x621f, (q15_t)0x621b, (q15_t)0x6217, (q15_t)0x6213,\n    (q15_t)0x620f, (q15_t)0x620b, (q15_t)0x6207, (q15_t)0x6203, (q15_t)0x61ff,\n    (q15_t)0x61fb, (q15_t)0x61f7, (q15_t)0x61f3, (q15_t)0x61ee, (q15_t)0x61ea,\n    (q15_t)0x61e6, (q15_t)0x61e2, (q15_t)0x61de, (q15_t)0x61da, (q15_t)0x61d6,\n    (q15_t)0x61d2, (q15_t)0x61ce, (q15_t)0x61ca, (q15_t)0x61c6, (q15_t)0x61c2,\n    (q15_t)0x61be, (q15_t)0x61ba, (q15_t)0x61b6, (q15_t)0x61b2, (q15_t)0x61ae,\n    (q15_t)0x61aa, (q15_t)0x61a6, (q15_t)0x61a1, (q15_t)0x619d, (q15_t)0x6199,\n    (q15_t)0x6195, (q15_t)0x6191, (q15_t)0x618d, (q15_t)0x6189, (q15_t)0x6185,\n    (q15_t)0x6181, (q15_t)0x617d, (q15_t)0x6179, (q15_t)0x6175, (q15_t)0x6171,\n    (q15_t)0x616d, (q15_t)0x6168, (q15_t)0x6164, (q15_t)0x6160, (q15_t)0x615c,\n    (q15_t)0x6158, (q15_t)0x6154, (q15_t)0x6150, (q15_t)0x614c, (q15_t)0x6148,\n    (q15_t)0x6144, (q15_t)0x6140, (q15_t)0x613c, (q15_t)0x6137, (q15_t)0x6133,\n    (q15_t)0x612f, (q15_t)0x612b, (q15_t)0x6127, (q15_t)0x6123, (q15_t)0x611f,\n    (q15_t)0x611b, (q15_t)0x6117, (q15_t)0x6113, (q15_t)0x610f, (q15_t)0x610a,\n    (q15_t)0x6106, (q15_t)0x6102, (q15_t)0x60fe, (q15_t)0x60fa, (q15_t)0x60f6,\n    (q15_t)0x60f2, (q15_t)0x60ee, (q15_t)0x60ea, (q15_t)0x60e6, (q15_t)0x60e1,\n    (q15_t)0x60dd, (q15_t)0x60d9, (q15_t)0x60d5, (q15_t)0x60d1, (q15_t)0x60cd,\n    (q15_t)0x60c9, (q15_t)0x60c5, (q15_t)0x60c1, (q15_t)0x60bc, (q15_t)0x60b8,\n    (q15_t)0x60b4, (q15_t)0x60b0, (q15_t)0x60ac, (q15_t)0x60a8, (q15_t)0x60a4,\n    (q15_t)0x60a0, (q15_t)0x609c, (q15_t)0x6097, (q15_t)0x6093, (q15_t)0x608f,\n    (q15_t)0x608b, (q15_t)0x6087, (q15_t)0x6083, (q15_t)0x607f, (q15_t)0x607b,\n    (q15_t)0x6076, (q15_t)0x6072, (q15_t)0x606e, (q15_t)0x606a, (q15_t)0x6066,\n    (q15_t)0x6062, (q15_t)0x605e, (q15_t)0x6059, (q15_t)0x6055, (q15_t)0x6051,\n    (q15_t)0x604d, (q15_t)0x6049, (q15_t)0x6045, (q15_t)0x6041, (q15_t)0x603c,\n    (q15_t)0x6038, (q15_t)0x6034, (q15_t)0x6030, (q15_t)0x602c, (q15_t)0x6028,\n    (q15_t)0x6024, (q15_t)0x601f, (q15_t)0x601b, (q15_t)0x6017, (q15_t)0x6013,\n    (q15_t)0x600f, (q15_t)0x600b, (q15_t)0x6007, (q15_t)0x6002, (q15_t)0x5ffe,\n    (q15_t)0x5ffa, (q15_t)0x5ff6, (q15_t)0x5ff2, (q15_t)0x5fee, (q15_t)0x5fe9,\n    (q15_t)0x5fe5, (q15_t)0x5fe1, (q15_t)0x5fdd, (q15_t)0x5fd9, (q15_t)0x5fd5,\n    (q15_t)0x5fd0, (q15_t)0x5fcc, (q15_t)0x5fc8, (q15_t)0x5fc4, (q15_t)0x5fc0,\n    (q15_t)0x5fbc, (q15_t)0x5fb7, (q15_t)0x5fb3, (q15_t)0x5faf, (q15_t)0x5fab,\n    (q15_t)0x5fa7, (q15_t)0x5fa3, (q15_t)0x5f9e, (q15_t)0x5f9a, (q15_t)0x5f96,\n    (q15_t)0x5f92, (q15_t)0x5f8e, (q15_t)0x5f8a, (q15_t)0x5f85, (q15_t)0x5f81,\n    (q15_t)0x5f7d, (q15_t)0x5f79, (q15_t)0x5f75, (q15_t)0x5f70, (q15_t)0x5f6c,\n    (q15_t)0x5f68, (q15_t)0x5f64, (q15_t)0x5f60, (q15_t)0x5f5b, (q15_t)0x5f57,\n    (q15_t)0x5f53, (q15_t)0x5f4f, (q15_t)0x5f4b, (q15_t)0x5f46, (q15_t)0x5f42,\n    (q15_t)0x5f3e, (q15_t)0x5f3a, (q15_t)0x5f36, (q15_t)0x5f31, (q15_t)0x5f2d,\n    (q15_t)0x5f29, (q15_t)0x5f25, (q15_t)0x5f21, (q15_t)0x5f1c, (q15_t)0x5f18,\n    (q15_t)0x5f14, (q15_t)0x5f10, (q15_t)0x5f0c, (q15_t)0x5f07, (q15_t)0x5f03,\n    (q15_t)0x5eff, (q15_t)0x5efb, (q15_t)0x5ef7, (q15_t)0x5ef2, (q15_t)0x5eee,\n    (q15_t)0x5eea, (q15_t)0x5ee6, (q15_t)0x5ee2, (q15_t)0x5edd, (q15_t)0x5ed9,\n    (q15_t)0x5ed5, (q15_t)0x5ed1, (q15_t)0x5ecc, (q15_t)0x5ec8, (q15_t)0x5ec4,\n    (q15_t)0x5ec0, (q15_t)0x5ebc, (q15_t)0x5eb7, (q15_t)0x5eb3, (q15_t)0x5eaf,\n    (q15_t)0x5eab, (q15_t)0x5ea6, (q15_t)0x5ea2, (q15_t)0x5e9e, (q15_t)0x5e9a,\n    (q15_t)0x5e95, (q15_t)0x5e91, (q15_t)0x5e8d, (q15_t)0x5e89, (q15_t)0x5e85,\n    (q15_t)0x5e80, (q15_t)0x5e7c, (q15_t)0x5e78, (q15_t)0x5e74, (q15_t)0x5e6f,\n    (q15_t)0x5e6b, (q15_t)0x5e67, (q15_t)0x5e63, (q15_t)0x5e5e, (q15_t)0x5e5a,\n    (q15_t)0x5e56, (q15_t)0x5e52, (q15_t)0x5e4d, (q15_t)0x5e49, (q15_t)0x5e45,\n    (q15_t)0x5e41, (q15_t)0x5e3c, (q15_t)0x5e38, (q15_t)0x5e34, (q15_t)0x5e30,\n    (q15_t)0x5e2b, (q15_t)0x5e27, (q15_t)0x5e23, (q15_t)0x5e1f, (q15_t)0x5e1a,\n    (q15_t)0x5e16, (q15_t)0x5e12, (q15_t)0x5e0e, (q15_t)0x5e09, (q15_t)0x5e05,\n    (q15_t)0x5e01, (q15_t)0x5dfd, (q15_t)0x5df8, (q15_t)0x5df4, (q15_t)0x5df0,\n    (q15_t)0x5deb, (q15_t)0x5de7, (q15_t)0x5de3, (q15_t)0x5ddf, (q15_t)0x5dda,\n    (q15_t)0x5dd6, (q15_t)0x5dd2, (q15_t)0x5dce, (q15_t)0x5dc9, (q15_t)0x5dc5,\n    (q15_t)0x5dc1, (q15_t)0x5dbc, (q15_t)0x5db8, (q15_t)0x5db4, (q15_t)0x5db0,\n    (q15_t)0x5dab, (q15_t)0x5da7, (q15_t)0x5da3, (q15_t)0x5d9e, (q15_t)0x5d9a,\n    (q15_t)0x5d96, (q15_t)0x5d92, (q15_t)0x5d8d, (q15_t)0x5d89, (q15_t)0x5d85,\n    (q15_t)0x5d80, (q15_t)0x5d7c, (q15_t)0x5d78, (q15_t)0x5d74, (q15_t)0x5d6f,\n    (q15_t)0x5d6b, (q15_t)0x5d67, (q15_t)0x5d62, (q15_t)0x5d5e, (q15_t)0x5d5a,\n    (q15_t)0x5d55, (q15_t)0x5d51, (q15_t)0x5d4d, (q15_t)0x5d49, (q15_t)0x5d44,\n    (q15_t)0x5d40, (q15_t)0x5d3c, (q15_t)0x5d37, (q15_t)0x5d33, (q15_t)0x5d2f,\n    (q15_t)0x5d2a, (q15_t)0x5d26, (q15_t)0x5d22, (q15_t)0x5d1e, (q15_t)0x5d19,\n    (q15_t)0x5d15, (q15_t)0x5d11, (q15_t)0x5d0c, (q15_t)0x5d08, (q15_t)0x5d04,\n    (q15_t)0x5cff, (q15_t)0x5cfb, (q15_t)0x5cf7, (q15_t)0x5cf2, (q15_t)0x5cee,\n    (q15_t)0x5cea, (q15_t)0x5ce5, (q15_t)0x5ce1, (q15_t)0x5cdd, (q15_t)0x5cd8,\n    (q15_t)0x5cd4, (q15_t)0x5cd0, (q15_t)0x5ccb, (q15_t)0x5cc7, (q15_t)0x5cc3,\n    (q15_t)0x5cbe, (q15_t)0x5cba, (q15_t)0x5cb6, (q15_t)0x5cb1, (q15_t)0x5cad,\n    (q15_t)0x5ca9, (q15_t)0x5ca4, (q15_t)0x5ca0, (q15_t)0x5c9c, (q15_t)0x5c97,\n    (q15_t)0x5c93, (q15_t)0x5c8f, (q15_t)0x5c8a, (q15_t)0x5c86, (q15_t)0x5c82,\n    (q15_t)0x5c7d, (q15_t)0x5c79, (q15_t)0x5c75, (q15_t)0x5c70, (q15_t)0x5c6c,\n    (q15_t)0x5c68, (q15_t)0x5c63, (q15_t)0x5c5f, (q15_t)0x5c5b, (q15_t)0x5c56,\n    (q15_t)0x5c52, (q15_t)0x5c4e, (q15_t)0x5c49, (q15_t)0x5c45, (q15_t)0x5c41,\n    (q15_t)0x5c3c, (q15_t)0x5c38, (q15_t)0x5c33, (q15_t)0x5c2f, (q15_t)0x5c2b,\n    (q15_t)0x5c26, (q15_t)0x5c22, (q15_t)0x5c1e, (q15_t)0x5c19, (q15_t)0x5c15,\n    (q15_t)0x5c11, (q15_t)0x5c0c, (q15_t)0x5c08, (q15_t)0x5c03, (q15_t)0x5bff,\n    (q15_t)0x5bfb, (q15_t)0x5bf6, (q15_t)0x5bf2, (q15_t)0x5bee, (q15_t)0x5be9,\n    (q15_t)0x5be5, (q15_t)0x5be0, (q15_t)0x5bdc, (q15_t)0x5bd8, (q15_t)0x5bd3,\n    (q15_t)0x5bcf, (q15_t)0x5bcb, (q15_t)0x5bc6, (q15_t)0x5bc2, (q15_t)0x5bbd,\n    (q15_t)0x5bb9, (q15_t)0x5bb5, (q15_t)0x5bb0, (q15_t)0x5bac, (q15_t)0x5ba8,\n    (q15_t)0x5ba3, (q15_t)0x5b9f, (q15_t)0x5b9a, (q15_t)0x5b96, (q15_t)0x5b92,\n    (q15_t)0x5b8d, (q15_t)0x5b89, (q15_t)0x5b84, (q15_t)0x5b80, (q15_t)0x5b7c,\n    (q15_t)0x5b77, (q15_t)0x5b73, (q15_t)0x5b6e, (q15_t)0x5b6a, (q15_t)0x5b66,\n    (q15_t)0x5b61, (q15_t)0x5b5d, (q15_t)0x5b58, (q15_t)0x5b54, (q15_t)0x5b50,\n    (q15_t)0x5b4b, (q15_t)0x5b47, (q15_t)0x5b42, (q15_t)0x5b3e, (q15_t)0x5b3a,\n    (q15_t)0x5b35, (q15_t)0x5b31, (q15_t)0x5b2c, (q15_t)0x5b28, (q15_t)0x5b24,\n    (q15_t)0x5b1f, (q15_t)0x5b1b, (q15_t)0x5b16, (q15_t)0x5b12, (q15_t)0x5b0e,\n    (q15_t)0x5b09, (q15_t)0x5b05, (q15_t)0x5b00, (q15_t)0x5afc, (q15_t)0x5af7,\n    (q15_t)0x5af3, (q15_t)0x5aef, (q15_t)0x5aea, (q15_t)0x5ae6, (q15_t)0x5ae1,\n    (q15_t)0x5add, (q15_t)0x5ad8, (q15_t)0x5ad4, (q15_t)0x5ad0, (q15_t)0x5acb,\n    (q15_t)0x5ac7, (q15_t)0x5ac2, (q15_t)0x5abe, (q15_t)0x5ab9, (q15_t)0x5ab5,\n    (q15_t)0x5ab1, (q15_t)0x5aac, (q15_t)0x5aa8, (q15_t)0x5aa3, (q15_t)0x5a9f,\n    (q15_t)0x5a9a, (q15_t)0x5a96, (q15_t)0x5a92, (q15_t)0x5a8d, (q15_t)0x5a89,\n    (q15_t)0x5a84, (q15_t)0x5a80, (q15_t)0x5a7b, (q15_t)0x5a77, (q15_t)0x5a72,\n    (q15_t)0x5a6e, (q15_t)0x5a6a, (q15_t)0x5a65, (q15_t)0x5a61, (q15_t)0x5a5c,\n    (q15_t)0x5a58, (q15_t)0x5a53, (q15_t)0x5a4f, (q15_t)0x5a4a, (q15_t)0x5a46,\n    (q15_t)0x5a41, (q15_t)0x5a3d, (q15_t)0x5a39, (q15_t)0x5a34, (q15_t)0x5a30,\n    (q15_t)0x5a2b, (q15_t)0x5a27, (q15_t)0x5a22, (q15_t)0x5a1e, (q15_t)0x5a19,\n    (q15_t)0x5a15, (q15_t)0x5a10, (q15_t)0x5a0c, (q15_t)0x5a07, (q15_t)0x5a03,\n    (q15_t)0x59ff, (q15_t)0x59fa, (q15_t)0x59f6, (q15_t)0x59f1, (q15_t)0x59ed,\n    (q15_t)0x59e8, (q15_t)0x59e4, (q15_t)0x59df, (q15_t)0x59db, (q15_t)0x59d6,\n    (q15_t)0x59d2, (q15_t)0x59cd, (q15_t)0x59c9, (q15_t)0x59c4, (q15_t)0x59c0,\n    (q15_t)0x59bb, (q15_t)0x59b7, (q15_t)0x59b2, (q15_t)0x59ae, (q15_t)0x59a9,\n    (q15_t)0x59a5, (q15_t)0x59a1, (q15_t)0x599c, (q15_t)0x5998, (q15_t)0x5993,\n    (q15_t)0x598f, (q15_t)0x598a, (q15_t)0x5986, (q15_t)0x5981, (q15_t)0x597d,\n    (q15_t)0x5978, (q15_t)0x5974, (q15_t)0x596f, (q15_t)0x596b, (q15_t)0x5966,\n    (q15_t)0x5962, (q15_t)0x595d, (q15_t)0x5959, (q15_t)0x5954, (q15_t)0x5950,\n    (q15_t)0x594b, (q15_t)0x5947, (q15_t)0x5942, (q15_t)0x593e, (q15_t)0x5939,\n    (q15_t)0x5935, (q15_t)0x5930, (q15_t)0x592c, (q15_t)0x5927, (q15_t)0x5923,\n    (q15_t)0x591e, (q15_t)0x591a, (q15_t)0x5915, (q15_t)0x5911, (q15_t)0x590c,\n    (q15_t)0x5908, (q15_t)0x5903, (q15_t)0x58fe, (q15_t)0x58fa, (q15_t)0x58f5,\n    (q15_t)0x58f1, (q15_t)0x58ec, (q15_t)0x58e8, (q15_t)0x58e3, (q15_t)0x58df,\n    (q15_t)0x58da, (q15_t)0x58d6, (q15_t)0x58d1, (q15_t)0x58cd, (q15_t)0x58c8,\n    (q15_t)0x58c4, (q15_t)0x58bf, (q15_t)0x58bb, (q15_t)0x58b6, (q15_t)0x58b2,\n    (q15_t)0x58ad, (q15_t)0x58a9, (q15_t)0x58a4, (q15_t)0x589f, (q15_t)0x589b,\n    (q15_t)0x5896, (q15_t)0x5892, (q15_t)0x588d, (q15_t)0x5889, (q15_t)0x5884,\n    (q15_t)0x5880, (q15_t)0x587b, (q15_t)0x5877, (q15_t)0x5872, (q15_t)0x586e,\n    (q15_t)0x5869, (q15_t)0x5864, (q15_t)0x5860, (q15_t)0x585b, (q15_t)0x5857,\n    (q15_t)0x5852, (q15_t)0x584e, (q15_t)0x5849, (q15_t)0x5845, (q15_t)0x5840,\n    (q15_t)0x583c, (q15_t)0x5837, (q15_t)0x5832, (q15_t)0x582e, (q15_t)0x5829,\n    (q15_t)0x5825, (q15_t)0x5820, (q15_t)0x581c, (q15_t)0x5817, (q15_t)0x5813,\n    (q15_t)0x580e, (q15_t)0x5809, (q15_t)0x5805, (q15_t)0x5800, (q15_t)0x57fc,\n    (q15_t)0x57f7, (q15_t)0x57f3, (q15_t)0x57ee, (q15_t)0x57e9, (q15_t)0x57e5,\n    (q15_t)0x57e0, (q15_t)0x57dc, (q15_t)0x57d7, (q15_t)0x57d3, (q15_t)0x57ce,\n    (q15_t)0x57c9, (q15_t)0x57c5, (q15_t)0x57c0, (q15_t)0x57bc, (q15_t)0x57b7,\n    (q15_t)0x57b3, (q15_t)0x57ae, (q15_t)0x57a9, (q15_t)0x57a5, (q15_t)0x57a0,\n    (q15_t)0x579c, (q15_t)0x5797, (q15_t)0x5793, (q15_t)0x578e, (q15_t)0x5789,\n    (q15_t)0x5785, (q15_t)0x5780, (q15_t)0x577c, (q15_t)0x5777, (q15_t)0x5772,\n    (q15_t)0x576e, (q15_t)0x5769, (q15_t)0x5765, (q15_t)0x5760, (q15_t)0x575c,\n    (q15_t)0x5757, (q15_t)0x5752, (q15_t)0x574e, (q15_t)0x5749, (q15_t)0x5745,\n    (q15_t)0x5740, (q15_t)0x573b, (q15_t)0x5737, (q15_t)0x5732, (q15_t)0x572e,\n    (q15_t)0x5729, (q15_t)0x5724, (q15_t)0x5720, (q15_t)0x571b, (q15_t)0x5717,\n    (q15_t)0x5712, (q15_t)0x570d, (q15_t)0x5709, (q15_t)0x5704, (q15_t)0x56ff,\n    (q15_t)0x56fb, (q15_t)0x56f6, (q15_t)0x56f2, (q15_t)0x56ed, (q15_t)0x56e8,\n    (q15_t)0x56e4, (q15_t)0x56df, (q15_t)0x56db, (q15_t)0x56d6, (q15_t)0x56d1,\n    (q15_t)0x56cd, (q15_t)0x56c8, (q15_t)0x56c4, (q15_t)0x56bf, (q15_t)0x56ba,\n    (q15_t)0x56b6, (q15_t)0x56b1, (q15_t)0x56ac, (q15_t)0x56a8, (q15_t)0x56a3,\n    (q15_t)0x569f, (q15_t)0x569a, (q15_t)0x5695, (q15_t)0x5691, (q15_t)0x568c,\n    (q15_t)0x5687, (q15_t)0x5683, (q15_t)0x567e, (q15_t)0x5679, (q15_t)0x5675,\n    (q15_t)0x5670, (q15_t)0x566c, (q15_t)0x5667, (q15_t)0x5662, (q15_t)0x565e,\n    (q15_t)0x5659, (q15_t)0x5654, (q15_t)0x5650, (q15_t)0x564b, (q15_t)0x5646,\n    (q15_t)0x5642, (q15_t)0x563d, (q15_t)0x5639, (q15_t)0x5634, (q15_t)0x562f,\n    (q15_t)0x562b, (q15_t)0x5626, (q15_t)0x5621, (q15_t)0x561d, (q15_t)0x5618,\n    (q15_t)0x5613, (q15_t)0x560f, (q15_t)0x560a, (q15_t)0x5605, (q15_t)0x5601,\n    (q15_t)0x55fc, (q15_t)0x55f7, (q15_t)0x55f3, (q15_t)0x55ee, (q15_t)0x55ea,\n    (q15_t)0x55e5, (q15_t)0x55e0, (q15_t)0x55dc, (q15_t)0x55d7, (q15_t)0x55d2,\n    (q15_t)0x55ce, (q15_t)0x55c9, (q15_t)0x55c4, (q15_t)0x55c0, (q15_t)0x55bb,\n    (q15_t)0x55b6, (q15_t)0x55b2, (q15_t)0x55ad, (q15_t)0x55a8, (q15_t)0x55a4,\n    (q15_t)0x559f, (q15_t)0x559a, (q15_t)0x5596, (q15_t)0x5591, (q15_t)0x558c,\n    (q15_t)0x5588, (q15_t)0x5583, (q15_t)0x557e, (q15_t)0x5579, (q15_t)0x5575,\n    (q15_t)0x5570, (q15_t)0x556b, (q15_t)0x5567, (q15_t)0x5562, (q15_t)0x555d,\n    (q15_t)0x5559, (q15_t)0x5554, (q15_t)0x554f, (q15_t)0x554b, (q15_t)0x5546,\n    (q15_t)0x5541, (q15_t)0x553d, (q15_t)0x5538, (q15_t)0x5533, (q15_t)0x552f,\n    (q15_t)0x552a, (q15_t)0x5525, (q15_t)0x5520, (q15_t)0x551c, (q15_t)0x5517,\n    (q15_t)0x5512, (q15_t)0x550e, (q15_t)0x5509, (q15_t)0x5504, (q15_t)0x5500,\n    (q15_t)0x54fb, (q15_t)0x54f6, (q15_t)0x54f2, (q15_t)0x54ed, (q15_t)0x54e8,\n    (q15_t)0x54e3, (q15_t)0x54df, (q15_t)0x54da, (q15_t)0x54d5, (q15_t)0x54d1,\n    (q15_t)0x54cc, (q15_t)0x54c7, (q15_t)0x54c2, (q15_t)0x54be, (q15_t)0x54b9,\n    (q15_t)0x54b4, (q15_t)0x54b0, (q15_t)0x54ab, (q15_t)0x54a6, (q15_t)0x54a2,\n    (q15_t)0x549d, (q15_t)0x5498, (q15_t)0x5493, (q15_t)0x548f, (q15_t)0x548a,\n    (q15_t)0x5485, (q15_t)0x5480, (q15_t)0x547c, (q15_t)0x5477, (q15_t)0x5472,\n    (q15_t)0x546e, (q15_t)0x5469, (q15_t)0x5464, (q15_t)0x545f, (q15_t)0x545b,\n    (q15_t)0x5456, (q15_t)0x5451, (q15_t)0x544d, (q15_t)0x5448, (q15_t)0x5443,\n    (q15_t)0x543e, (q15_t)0x543a, (q15_t)0x5435, (q15_t)0x5430, (q15_t)0x542b,\n    (q15_t)0x5427, (q15_t)0x5422, (q15_t)0x541d, (q15_t)0x5418, (q15_t)0x5414,\n    (q15_t)0x540f, (q15_t)0x540a, (q15_t)0x5406, (q15_t)0x5401, (q15_t)0x53fc,\n    (q15_t)0x53f7, (q15_t)0x53f3, (q15_t)0x53ee, (q15_t)0x53e9, (q15_t)0x53e4,\n    (q15_t)0x53e0, (q15_t)0x53db, (q15_t)0x53d6, (q15_t)0x53d1, (q15_t)0x53cd,\n    (q15_t)0x53c8, (q15_t)0x53c3, (q15_t)0x53be, (q15_t)0x53ba, (q15_t)0x53b5,\n    (q15_t)0x53b0, (q15_t)0x53ab, (q15_t)0x53a7, (q15_t)0x53a2, (q15_t)0x539d,\n    (q15_t)0x5398, (q15_t)0x5394, (q15_t)0x538f, (q15_t)0x538a, (q15_t)0x5385,\n    (q15_t)0x5380, (q15_t)0x537c, (q15_t)0x5377, (q15_t)0x5372, (q15_t)0x536d,\n    (q15_t)0x5369, (q15_t)0x5364, (q15_t)0x535f, (q15_t)0x535a, (q15_t)0x5356,\n    (q15_t)0x5351, (q15_t)0x534c, (q15_t)0x5347, (q15_t)0x5343, (q15_t)0x533e,\n    (q15_t)0x5339, (q15_t)0x5334, (q15_t)0x532f, (q15_t)0x532b, (q15_t)0x5326,\n    (q15_t)0x5321, (q15_t)0x531c, (q15_t)0x5318, (q15_t)0x5313, (q15_t)0x530e,\n    (q15_t)0x5309, (q15_t)0x5304, (q15_t)0x5300, (q15_t)0x52fb, (q15_t)0x52f6,\n    (q15_t)0x52f1, (q15_t)0x52ec, (q15_t)0x52e8, (q15_t)0x52e3, (q15_t)0x52de,\n    (q15_t)0x52d9, (q15_t)0x52d5, (q15_t)0x52d0, (q15_t)0x52cb, (q15_t)0x52c6,\n    (q15_t)0x52c1, (q15_t)0x52bd, (q15_t)0x52b8, (q15_t)0x52b3, (q15_t)0x52ae,\n    (q15_t)0x52a9, (q15_t)0x52a5, (q15_t)0x52a0, (q15_t)0x529b, (q15_t)0x5296,\n    (q15_t)0x5291, (q15_t)0x528d, (q15_t)0x5288, (q15_t)0x5283, (q15_t)0x527e,\n    (q15_t)0x5279, (q15_t)0x5275, (q15_t)0x5270, (q15_t)0x526b, (q15_t)0x5266,\n    (q15_t)0x5261, (q15_t)0x525d, (q15_t)0x5258, (q15_t)0x5253, (q15_t)0x524e,\n    (q15_t)0x5249, (q15_t)0x5244, (q15_t)0x5240, (q15_t)0x523b, (q15_t)0x5236,\n    (q15_t)0x5231, (q15_t)0x522c, (q15_t)0x5228, (q15_t)0x5223, (q15_t)0x521e,\n    (q15_t)0x5219, (q15_t)0x5214, (q15_t)0x520f, (q15_t)0x520b, (q15_t)0x5206,\n    (q15_t)0x5201, (q15_t)0x51fc, (q15_t)0x51f7, (q15_t)0x51f3, (q15_t)0x51ee,\n    (q15_t)0x51e9, (q15_t)0x51e4, (q15_t)0x51df, (q15_t)0x51da, (q15_t)0x51d6,\n    (q15_t)0x51d1, (q15_t)0x51cc, (q15_t)0x51c7, (q15_t)0x51c2, (q15_t)0x51bd,\n    (q15_t)0x51b9, (q15_t)0x51b4, (q15_t)0x51af, (q15_t)0x51aa, (q15_t)0x51a5,\n    (q15_t)0x51a0, (q15_t)0x519c, (q15_t)0x5197, (q15_t)0x5192, (q15_t)0x518d,\n    (q15_t)0x5188, (q15_t)0x5183, (q15_t)0x517e, (q15_t)0x517a, (q15_t)0x5175,\n    (q15_t)0x5170, (q15_t)0x516b, (q15_t)0x5166, (q15_t)0x5161, (q15_t)0x515d,\n    (q15_t)0x5158, (q15_t)0x5153, (q15_t)0x514e, (q15_t)0x5149, (q15_t)0x5144,\n    (q15_t)0x513f, (q15_t)0x513b, (q15_t)0x5136, (q15_t)0x5131, (q15_t)0x512c,\n    (q15_t)0x5127, (q15_t)0x5122, (q15_t)0x511d, (q15_t)0x5119, (q15_t)0x5114,\n    (q15_t)0x510f, (q15_t)0x510a, (q15_t)0x5105, (q15_t)0x5100, (q15_t)0x50fb,\n    (q15_t)0x50f7, (q15_t)0x50f2, (q15_t)0x50ed, (q15_t)0x50e8, (q15_t)0x50e3,\n    (q15_t)0x50de, (q15_t)0x50d9, (q15_t)0x50d4, (q15_t)0x50d0, (q15_t)0x50cb,\n    (q15_t)0x50c6, (q15_t)0x50c1, (q15_t)0x50bc, (q15_t)0x50b7, (q15_t)0x50b2,\n    (q15_t)0x50ad, (q15_t)0x50a9, (q15_t)0x50a4, (q15_t)0x509f, (q15_t)0x509a,\n    (q15_t)0x5095, (q15_t)0x5090, (q15_t)0x508b, (q15_t)0x5086, (q15_t)0x5082,\n    (q15_t)0x507d, (q15_t)0x5078, (q15_t)0x5073, (q15_t)0x506e, (q15_t)0x5069,\n    (q15_t)0x5064, (q15_t)0x505f, (q15_t)0x505a, (q15_t)0x5056, (q15_t)0x5051,\n    (q15_t)0x504c, (q15_t)0x5047, (q15_t)0x5042, (q15_t)0x503d, (q15_t)0x5038,\n    (q15_t)0x5033, (q15_t)0x502e, (q15_t)0x5029, (q15_t)0x5025, (q15_t)0x5020,\n    (q15_t)0x501b, (q15_t)0x5016, (q15_t)0x5011, (q15_t)0x500c, (q15_t)0x5007,\n    (q15_t)0x5002, (q15_t)0x4ffd, (q15_t)0x4ff8, (q15_t)0x4ff4, (q15_t)0x4fef,\n    (q15_t)0x4fea, (q15_t)0x4fe5, (q15_t)0x4fe0, (q15_t)0x4fdb, (q15_t)0x4fd6,\n    (q15_t)0x4fd1, (q15_t)0x4fcc, (q15_t)0x4fc7, (q15_t)0x4fc2, (q15_t)0x4fbe,\n    (q15_t)0x4fb9, (q15_t)0x4fb4, (q15_t)0x4faf, (q15_t)0x4faa, (q15_t)0x4fa5,\n    (q15_t)0x4fa0, (q15_t)0x4f9b, (q15_t)0x4f96, (q15_t)0x4f91, (q15_t)0x4f8c,\n    (q15_t)0x4f87, (q15_t)0x4f82, (q15_t)0x4f7e, (q15_t)0x4f79, (q15_t)0x4f74,\n    (q15_t)0x4f6f, (q15_t)0x4f6a, (q15_t)0x4f65, (q15_t)0x4f60, (q15_t)0x4f5b,\n    (q15_t)0x4f56, (q15_t)0x4f51, (q15_t)0x4f4c, (q15_t)0x4f47, (q15_t)0x4f42,\n    (q15_t)0x4f3d, (q15_t)0x4f39, (q15_t)0x4f34, (q15_t)0x4f2f, (q15_t)0x4f2a,\n    (q15_t)0x4f25, (q15_t)0x4f20, (q15_t)0x4f1b, (q15_t)0x4f16, (q15_t)0x4f11,\n    (q15_t)0x4f0c, (q15_t)0x4f07, (q15_t)0x4f02, (q15_t)0x4efd, (q15_t)0x4ef8,\n    (q15_t)0x4ef3, (q15_t)0x4eee, (q15_t)0x4ee9, (q15_t)0x4ee5, (q15_t)0x4ee0,\n    (q15_t)0x4edb, (q15_t)0x4ed6, (q15_t)0x4ed1, (q15_t)0x4ecc, (q15_t)0x4ec7,\n    (q15_t)0x4ec2, (q15_t)0x4ebd, (q15_t)0x4eb8, (q15_t)0x4eb3, (q15_t)0x4eae,\n    (q15_t)0x4ea9, (q15_t)0x4ea4, (q15_t)0x4e9f, (q15_t)0x4e9a, (q15_t)0x4e95,\n    (q15_t)0x4e90, (q15_t)0x4e8b, (q15_t)0x4e86, (q15_t)0x4e81, (q15_t)0x4e7c,\n    (q15_t)0x4e78, (q15_t)0x4e73, (q15_t)0x4e6e, (q15_t)0x4e69, (q15_t)0x4e64,\n    (q15_t)0x4e5f, (q15_t)0x4e5a, (q15_t)0x4e55, (q15_t)0x4e50, (q15_t)0x4e4b,\n    (q15_t)0x4e46, (q15_t)0x4e41, (q15_t)0x4e3c, (q15_t)0x4e37, (q15_t)0x4e32,\n    (q15_t)0x4e2d, (q15_t)0x4e28, (q15_t)0x4e23, (q15_t)0x4e1e, (q15_t)0x4e19,\n    (q15_t)0x4e14, (q15_t)0x4e0f, (q15_t)0x4e0a, (q15_t)0x4e05, (q15_t)0x4e00,\n    (q15_t)0x4dfb, (q15_t)0x4df6, (q15_t)0x4df1, (q15_t)0x4dec, (q15_t)0x4de7,\n    (q15_t)0x4de2, (q15_t)0x4ddd, (q15_t)0x4dd8, (q15_t)0x4dd3, (q15_t)0x4dce,\n    (q15_t)0x4dc9, (q15_t)0x4dc4, (q15_t)0x4dbf, (q15_t)0x4dba, (q15_t)0x4db5,\n    (q15_t)0x4db0, (q15_t)0x4dab, (q15_t)0x4da6, (q15_t)0x4da1, (q15_t)0x4d9c,\n    (q15_t)0x4d97, (q15_t)0x4d92, (q15_t)0x4d8d, (q15_t)0x4d88, (q15_t)0x4d83,\n    (q15_t)0x4d7e, (q15_t)0x4d79, (q15_t)0x4d74, (q15_t)0x4d6f, (q15_t)0x4d6a,\n    (q15_t)0x4d65, (q15_t)0x4d60, (q15_t)0x4d5b, (q15_t)0x4d56, (q15_t)0x4d51,\n    (q15_t)0x4d4c, (q15_t)0x4d47, (q15_t)0x4d42, (q15_t)0x4d3d, (q15_t)0x4d38,\n    (q15_t)0x4d33, (q15_t)0x4d2e, (q15_t)0x4d29, (q15_t)0x4d24, (q15_t)0x4d1f,\n    (q15_t)0x4d1a, (q15_t)0x4d15, (q15_t)0x4d10, (q15_t)0x4d0b, (q15_t)0x4d06,\n    (q15_t)0x4d01, (q15_t)0x4cfc, (q15_t)0x4cf7, (q15_t)0x4cf2, (q15_t)0x4ced,\n    (q15_t)0x4ce8, (q15_t)0x4ce3, (q15_t)0x4cde, (q15_t)0x4cd9, (q15_t)0x4cd4,\n    (q15_t)0x4ccf, (q15_t)0x4cca, (q15_t)0x4cc5, (q15_t)0x4cc0, (q15_t)0x4cbb,\n    (q15_t)0x4cb6, (q15_t)0x4cb1, (q15_t)0x4cac, (q15_t)0x4ca7, (q15_t)0x4ca2,\n    (q15_t)0x4c9d, (q15_t)0x4c98, (q15_t)0x4c93, (q15_t)0x4c8e, (q15_t)0x4c88,\n    (q15_t)0x4c83, (q15_t)0x4c7e, (q15_t)0x4c79, (q15_t)0x4c74, (q15_t)0x4c6f,\n    (q15_t)0x4c6a, (q15_t)0x4c65, (q15_t)0x4c60, (q15_t)0x4c5b, (q15_t)0x4c56,\n    (q15_t)0x4c51, (q15_t)0x4c4c, (q15_t)0x4c47, (q15_t)0x4c42, (q15_t)0x4c3d,\n    (q15_t)0x4c38, (q15_t)0x4c33, (q15_t)0x4c2e, (q15_t)0x4c29, (q15_t)0x4c24,\n    (q15_t)0x4c1f, (q15_t)0x4c1a, (q15_t)0x4c14, (q15_t)0x4c0f, (q15_t)0x4c0a,\n    (q15_t)0x4c05, (q15_t)0x4c00, (q15_t)0x4bfb, (q15_t)0x4bf6, (q15_t)0x4bf1,\n    (q15_t)0x4bec, (q15_t)0x4be7, (q15_t)0x4be2, (q15_t)0x4bdd, (q15_t)0x4bd8,\n    (q15_t)0x4bd3, (q15_t)0x4bce, (q15_t)0x4bc9, (q15_t)0x4bc4, (q15_t)0x4bbe,\n    (q15_t)0x4bb9, (q15_t)0x4bb4, (q15_t)0x4baf, (q15_t)0x4baa, (q15_t)0x4ba5,\n    (q15_t)0x4ba0, (q15_t)0x4b9b, (q15_t)0x4b96, (q15_t)0x4b91, (q15_t)0x4b8c,\n    (q15_t)0x4b87, (q15_t)0x4b82, (q15_t)0x4b7d, (q15_t)0x4b77, (q15_t)0x4b72,\n    (q15_t)0x4b6d, (q15_t)0x4b68, (q15_t)0x4b63, (q15_t)0x4b5e, (q15_t)0x4b59,\n    (q15_t)0x4b54, (q15_t)0x4b4f, (q15_t)0x4b4a, (q15_t)0x4b45, (q15_t)0x4b40,\n    (q15_t)0x4b3b, (q15_t)0x4b35, (q15_t)0x4b30, (q15_t)0x4b2b, (q15_t)0x4b26,\n    (q15_t)0x4b21, (q15_t)0x4b1c, (q15_t)0x4b17, (q15_t)0x4b12, (q15_t)0x4b0d,\n    (q15_t)0x4b08, (q15_t)0x4b03, (q15_t)0x4afd, (q15_t)0x4af8, (q15_t)0x4af3,\n    (q15_t)0x4aee, (q15_t)0x4ae9, (q15_t)0x4ae4, (q15_t)0x4adf, (q15_t)0x4ada,\n    (q15_t)0x4ad5, (q15_t)0x4ad0, (q15_t)0x4acb, (q15_t)0x4ac5, (q15_t)0x4ac0,\n    (q15_t)0x4abb, (q15_t)0x4ab6, (q15_t)0x4ab1, (q15_t)0x4aac, (q15_t)0x4aa7,\n    (q15_t)0x4aa2, (q15_t)0x4a9d, (q15_t)0x4a97, (q15_t)0x4a92, (q15_t)0x4a8d,\n    (q15_t)0x4a88, (q15_t)0x4a83, (q15_t)0x4a7e, (q15_t)0x4a79, (q15_t)0x4a74,\n    (q15_t)0x4a6f, (q15_t)0x4a6a, (q15_t)0x4a64, (q15_t)0x4a5f, (q15_t)0x4a5a,\n    (q15_t)0x4a55, (q15_t)0x4a50, (q15_t)0x4a4b, (q15_t)0x4a46, (q15_t)0x4a41,\n    (q15_t)0x4a3b, (q15_t)0x4a36, (q15_t)0x4a31, (q15_t)0x4a2c, (q15_t)0x4a27,\n    (q15_t)0x4a22, (q15_t)0x4a1d, (q15_t)0x4a18, (q15_t)0x4a12, (q15_t)0x4a0d,\n    (q15_t)0x4a08, (q15_t)0x4a03, (q15_t)0x49fe, (q15_t)0x49f9, (q15_t)0x49f4,\n    (q15_t)0x49ef, (q15_t)0x49e9, (q15_t)0x49e4, (q15_t)0x49df, (q15_t)0x49da,\n    (q15_t)0x49d5, (q15_t)0x49d0, (q15_t)0x49cb, (q15_t)0x49c6, (q15_t)0x49c0,\n    (q15_t)0x49bb, (q15_t)0x49b6, (q15_t)0x49b1, (q15_t)0x49ac, (q15_t)0x49a7,\n    (q15_t)0x49a2, (q15_t)0x499c, (q15_t)0x4997, (q15_t)0x4992, (q15_t)0x498d,\n    (q15_t)0x4988, (q15_t)0x4983, (q15_t)0x497e, (q15_t)0x4978, (q15_t)0x4973,\n    (q15_t)0x496e, (q15_t)0x4969, (q15_t)0x4964, (q15_t)0x495f, (q15_t)0x495a,\n    (q15_t)0x4954, (q15_t)0x494f, (q15_t)0x494a, (q15_t)0x4945, (q15_t)0x4940,\n    (q15_t)0x493b, (q15_t)0x4936, (q15_t)0x4930, (q15_t)0x492b, (q15_t)0x4926,\n    (q15_t)0x4921, (q15_t)0x491c, (q15_t)0x4917, (q15_t)0x4911, (q15_t)0x490c,\n    (q15_t)0x4907, (q15_t)0x4902, (q15_t)0x48fd, (q15_t)0x48f8, (q15_t)0x48f2,\n    (q15_t)0x48ed, (q15_t)0x48e8, (q15_t)0x48e3, (q15_t)0x48de, (q15_t)0x48d9,\n    (q15_t)0x48d3, (q15_t)0x48ce, (q15_t)0x48c9, (q15_t)0x48c4, (q15_t)0x48bf,\n    (q15_t)0x48ba, (q15_t)0x48b4, (q15_t)0x48af, (q15_t)0x48aa, (q15_t)0x48a5,\n    (q15_t)0x48a0, (q15_t)0x489b, (q15_t)0x4895, (q15_t)0x4890, (q15_t)0x488b,\n    (q15_t)0x4886, (q15_t)0x4881, (q15_t)0x487c, (q15_t)0x4876, (q15_t)0x4871,\n    (q15_t)0x486c, (q15_t)0x4867, (q15_t)0x4862, (q15_t)0x485c, (q15_t)0x4857,\n    (q15_t)0x4852, (q15_t)0x484d, (q15_t)0x4848, (q15_t)0x4843, (q15_t)0x483d,\n    (q15_t)0x4838, (q15_t)0x4833, (q15_t)0x482e, (q15_t)0x4829, (q15_t)0x4823,\n    (q15_t)0x481e, (q15_t)0x4819, (q15_t)0x4814, (q15_t)0x480f, (q15_t)0x4809,\n    (q15_t)0x4804, (q15_t)0x47ff, (q15_t)0x47fa, (q15_t)0x47f5, (q15_t)0x47ef,\n    (q15_t)0x47ea, (q15_t)0x47e5, (q15_t)0x47e0, (q15_t)0x47db, (q15_t)0x47d5,\n    (q15_t)0x47d0, (q15_t)0x47cb, (q15_t)0x47c6, (q15_t)0x47c1, (q15_t)0x47bb,\n    (q15_t)0x47b6, (q15_t)0x47b1, (q15_t)0x47ac, (q15_t)0x47a7, (q15_t)0x47a1,\n    (q15_t)0x479c, (q15_t)0x4797, (q15_t)0x4792, (q15_t)0x478d, (q15_t)0x4787,\n    (q15_t)0x4782, (q15_t)0x477d, (q15_t)0x4778, (q15_t)0x4773, (q15_t)0x476d,\n    (q15_t)0x4768, (q15_t)0x4763, (q15_t)0x475e, (q15_t)0x4758, (q15_t)0x4753,\n    (q15_t)0x474e, (q15_t)0x4749, (q15_t)0x4744, (q15_t)0x473e, (q15_t)0x4739,\n    (q15_t)0x4734, (q15_t)0x472f, (q15_t)0x4729, (q15_t)0x4724, (q15_t)0x471f,\n    (q15_t)0x471a, (q15_t)0x4715, (q15_t)0x470f, (q15_t)0x470a, (q15_t)0x4705,\n    (q15_t)0x4700, (q15_t)0x46fa, (q15_t)0x46f5, (q15_t)0x46f0, (q15_t)0x46eb,\n    (q15_t)0x46e6, (q15_t)0x46e0, (q15_t)0x46db, (q15_t)0x46d6, (q15_t)0x46d1,\n    (q15_t)0x46cb, (q15_t)0x46c6, (q15_t)0x46c1, (q15_t)0x46bc, (q15_t)0x46b6,\n    (q15_t)0x46b1, (q15_t)0x46ac, (q15_t)0x46a7, (q15_t)0x46a1, (q15_t)0x469c,\n    (q15_t)0x4697, (q15_t)0x4692, (q15_t)0x468d, (q15_t)0x4687, (q15_t)0x4682,\n    (q15_t)0x467d, (q15_t)0x4678, (q15_t)0x4672, (q15_t)0x466d, (q15_t)0x4668,\n    (q15_t)0x4663, (q15_t)0x465d, (q15_t)0x4658, (q15_t)0x4653, (q15_t)0x464e,\n    (q15_t)0x4648, (q15_t)0x4643, (q15_t)0x463e, (q15_t)0x4639, (q15_t)0x4633,\n    (q15_t)0x462e, (q15_t)0x4629, (q15_t)0x4624, (q15_t)0x461e, (q15_t)0x4619,\n    (q15_t)0x4614, (q15_t)0x460e, (q15_t)0x4609, (q15_t)0x4604, (q15_t)0x45ff,\n    (q15_t)0x45f9, (q15_t)0x45f4, (q15_t)0x45ef, (q15_t)0x45ea, (q15_t)0x45e4,\n    (q15_t)0x45df, (q15_t)0x45da, (q15_t)0x45d5, (q15_t)0x45cf, (q15_t)0x45ca,\n    (q15_t)0x45c5, (q15_t)0x45c0, (q15_t)0x45ba, (q15_t)0x45b5, (q15_t)0x45b0,\n    (q15_t)0x45aa, (q15_t)0x45a5, (q15_t)0x45a0, (q15_t)0x459b, (q15_t)0x4595,\n    (q15_t)0x4590, (q15_t)0x458b, (q15_t)0x4586, (q15_t)0x4580, (q15_t)0x457b,\n    (q15_t)0x4576, (q15_t)0x4570, (q15_t)0x456b, (q15_t)0x4566, (q15_t)0x4561,\n    (q15_t)0x455b, (q15_t)0x4556, (q15_t)0x4551, (q15_t)0x454b, (q15_t)0x4546,\n    (q15_t)0x4541, (q15_t)0x453c, (q15_t)0x4536, (q15_t)0x4531, (q15_t)0x452c,\n    (q15_t)0x4526, (q15_t)0x4521, (q15_t)0x451c, (q15_t)0x4517, (q15_t)0x4511,\n    (q15_t)0x450c, (q15_t)0x4507, (q15_t)0x4501, (q15_t)0x44fc, (q15_t)0x44f7,\n    (q15_t)0x44f2, (q15_t)0x44ec, (q15_t)0x44e7, (q15_t)0x44e2, (q15_t)0x44dc,\n    (q15_t)0x44d7, (q15_t)0x44d2, (q15_t)0x44cd, (q15_t)0x44c7, (q15_t)0x44c2,\n    (q15_t)0x44bd, (q15_t)0x44b7, (q15_t)0x44b2, (q15_t)0x44ad, (q15_t)0x44a7,\n    (q15_t)0x44a2, (q15_t)0x449d, (q15_t)0x4497, (q15_t)0x4492, (q15_t)0x448d,\n    (q15_t)0x4488, (q15_t)0x4482, (q15_t)0x447d, (q15_t)0x4478, (q15_t)0x4472,\n    (q15_t)0x446d, (q15_t)0x4468, (q15_t)0x4462, (q15_t)0x445d, (q15_t)0x4458,\n    (q15_t)0x4452, (q15_t)0x444d, (q15_t)0x4448, (q15_t)0x4443, (q15_t)0x443d,\n    (q15_t)0x4438, (q15_t)0x4433, (q15_t)0x442d, (q15_t)0x4428, (q15_t)0x4423,\n    (q15_t)0x441d, (q15_t)0x4418, (q15_t)0x4413, (q15_t)0x440d, (q15_t)0x4408,\n    (q15_t)0x4403, (q15_t)0x43fd, (q15_t)0x43f8, (q15_t)0x43f3, (q15_t)0x43ed,\n    (q15_t)0x43e8, (q15_t)0x43e3, (q15_t)0x43dd, (q15_t)0x43d8, (q15_t)0x43d3,\n    (q15_t)0x43cd, (q15_t)0x43c8, (q15_t)0x43c3, (q15_t)0x43bd, (q15_t)0x43b8,\n    (q15_t)0x43b3, (q15_t)0x43ad, (q15_t)0x43a8, (q15_t)0x43a3, (q15_t)0x439d,\n    (q15_t)0x4398, (q15_t)0x4393, (q15_t)0x438d, (q15_t)0x4388, (q15_t)0x4383,\n    (q15_t)0x437d, (q15_t)0x4378, (q15_t)0x4373, (q15_t)0x436d, (q15_t)0x4368,\n    (q15_t)0x4363, (q15_t)0x435d, (q15_t)0x4358, (q15_t)0x4353, (q15_t)0x434d,\n    (q15_t)0x4348, (q15_t)0x4343, (q15_t)0x433d, (q15_t)0x4338, (q15_t)0x4333,\n    (q15_t)0x432d, (q15_t)0x4328, (q15_t)0x4323, (q15_t)0x431d, (q15_t)0x4318,\n    (q15_t)0x4313, (q15_t)0x430d, (q15_t)0x4308, (q15_t)0x4302, (q15_t)0x42fd,\n    (q15_t)0x42f8, (q15_t)0x42f2, (q15_t)0x42ed, (q15_t)0x42e8, (q15_t)0x42e2,\n    (q15_t)0x42dd, (q15_t)0x42d8, (q15_t)0x42d2, (q15_t)0x42cd, (q15_t)0x42c8,\n    (q15_t)0x42c2, (q15_t)0x42bd, (q15_t)0x42b7, (q15_t)0x42b2, (q15_t)0x42ad,\n    (q15_t)0x42a7, (q15_t)0x42a2, (q15_t)0x429d, (q15_t)0x4297, (q15_t)0x4292,\n    (q15_t)0x428d, (q15_t)0x4287, (q15_t)0x4282, (q15_t)0x427c, (q15_t)0x4277,\n    (q15_t)0x4272, (q15_t)0x426c, (q15_t)0x4267, (q15_t)0x4262, (q15_t)0x425c,\n    (q15_t)0x4257, (q15_t)0x4251, (q15_t)0x424c, (q15_t)0x4247, (q15_t)0x4241,\n    (q15_t)0x423c, (q15_t)0x4237, (q15_t)0x4231, (q15_t)0x422c, (q15_t)0x4226,\n    (q15_t)0x4221, (q15_t)0x421c, (q15_t)0x4216, (q15_t)0x4211, (q15_t)0x420c,\n    (q15_t)0x4206, (q15_t)0x4201, (q15_t)0x41fb, (q15_t)0x41f6, (q15_t)0x41f1,\n    (q15_t)0x41eb, (q15_t)0x41e6, (q15_t)0x41e0, (q15_t)0x41db, (q15_t)0x41d6,\n    (q15_t)0x41d0, (q15_t)0x41cb, (q15_t)0x41c6, (q15_t)0x41c0, (q15_t)0x41bb,\n    (q15_t)0x41b5, (q15_t)0x41b0, (q15_t)0x41ab, (q15_t)0x41a5, (q15_t)0x41a0,\n    (q15_t)0x419a, (q15_t)0x4195, (q15_t)0x4190, (q15_t)0x418a, (q15_t)0x4185,\n    (q15_t)0x417f, (q15_t)0x417a, (q15_t)0x4175, (q15_t)0x416f, (q15_t)0x416a,\n    (q15_t)0x4164, (q15_t)0x415f, (q15_t)0x415a, (q15_t)0x4154, (q15_t)0x414f,\n    (q15_t)0x4149, (q15_t)0x4144, (q15_t)0x413f, (q15_t)0x4139, (q15_t)0x4134,\n    (q15_t)0x412e, (q15_t)0x4129, (q15_t)0x4124, (q15_t)0x411e, (q15_t)0x4119,\n    (q15_t)0x4113, (q15_t)0x410e, (q15_t)0x4108, (q15_t)0x4103, (q15_t)0x40fe,\n    (q15_t)0x40f8, (q15_t)0x40f3, (q15_t)0x40ed, (q15_t)0x40e8, (q15_t)0x40e3,\n    (q15_t)0x40dd, (q15_t)0x40d8, (q15_t)0x40d2, (q15_t)0x40cd, (q15_t)0x40c8,\n    (q15_t)0x40c2, (q15_t)0x40bd, (q15_t)0x40b7, (q15_t)0x40b2, (q15_t)0x40ac,\n    (q15_t)0x40a7, (q15_t)0x40a2, (q15_t)0x409c, (q15_t)0x4097, (q15_t)0x4091,\n    (q15_t)0x408c, (q15_t)0x4086, (q15_t)0x4081, (q15_t)0x407c, (q15_t)0x4076,\n    (q15_t)0x4071, (q15_t)0x406b, (q15_t)0x4066, (q15_t)0x4060, (q15_t)0x405b,\n    (q15_t)0x4056, (q15_t)0x4050, (q15_t)0x404b, (q15_t)0x4045, (q15_t)0x4040,\n    (q15_t)0x403a, (q15_t)0x4035, (q15_t)0x4030, (q15_t)0x402a, (q15_t)0x4025,\n    (q15_t)0x401f, (q15_t)0x401a, (q15_t)0x4014, (q15_t)0x400f, (q15_t)0x4009,\n    (q15_t)0x4004, (q15_t)0x3fff, (q15_t)0x3ff9, (q15_t)0x3ff4, (q15_t)0x3fee,\n    (q15_t)0x3fe9, (q15_t)0x3fe3, (q15_t)0x3fde, (q15_t)0x3fd8, (q15_t)0x3fd3,\n    (q15_t)0x3fce, (q15_t)0x3fc8, (q15_t)0x3fc3, (q15_t)0x3fbd, (q15_t)0x3fb8,\n    (q15_t)0x3fb2, (q15_t)0x3fad, (q15_t)0x3fa7, (q15_t)0x3fa2, (q15_t)0x3f9d,\n    (q15_t)0x3f97, (q15_t)0x3f92, (q15_t)0x3f8c, (q15_t)0x3f87, (q15_t)0x3f81,\n    (q15_t)0x3f7c, (q15_t)0x3f76, (q15_t)0x3f71, (q15_t)0x3f6b, (q15_t)0x3f66,\n    (q15_t)0x3f61, (q15_t)0x3f5b, (q15_t)0x3f56, (q15_t)0x3f50, (q15_t)0x3f4b,\n    (q15_t)0x3f45, (q15_t)0x3f40, (q15_t)0x3f3a, (q15_t)0x3f35, (q15_t)0x3f2f,\n    (q15_t)0x3f2a, (q15_t)0x3f24, (q15_t)0x3f1f, (q15_t)0x3f1a, (q15_t)0x3f14,\n    (q15_t)0x3f0f, (q15_t)0x3f09, (q15_t)0x3f04, (q15_t)0x3efe, (q15_t)0x3ef9,\n    (q15_t)0x3ef3, (q15_t)0x3eee, (q15_t)0x3ee8, (q15_t)0x3ee3, (q15_t)0x3edd,\n    (q15_t)0x3ed8, (q15_t)0x3ed2, (q15_t)0x3ecd, (q15_t)0x3ec7, (q15_t)0x3ec2,\n    (q15_t)0x3ebd, (q15_t)0x3eb7, (q15_t)0x3eb2, (q15_t)0x3eac, (q15_t)0x3ea7,\n    (q15_t)0x3ea1, (q15_t)0x3e9c, (q15_t)0x3e96, (q15_t)0x3e91, (q15_t)0x3e8b,\n    (q15_t)0x3e86, (q15_t)0x3e80, (q15_t)0x3e7b, (q15_t)0x3e75, (q15_t)0x3e70,\n    (q15_t)0x3e6a, (q15_t)0x3e65, (q15_t)0x3e5f, (q15_t)0x3e5a, (q15_t)0x3e54,\n    (q15_t)0x3e4f, (q15_t)0x3e49, (q15_t)0x3e44, (q15_t)0x3e3e, (q15_t)0x3e39,\n    (q15_t)0x3e33, (q15_t)0x3e2e, (q15_t)0x3e28, (q15_t)0x3e23, (q15_t)0x3e1d,\n    (q15_t)0x3e18, (q15_t)0x3e12, (q15_t)0x3e0d, (q15_t)0x3e07, (q15_t)0x3e02,\n    (q15_t)0x3dfc, (q15_t)0x3df7, (q15_t)0x3df1, (q15_t)0x3dec, (q15_t)0x3de6,\n    (q15_t)0x3de1, (q15_t)0x3ddb, (q15_t)0x3dd6, (q15_t)0x3dd0, (q15_t)0x3dcb,\n    (q15_t)0x3dc5, (q15_t)0x3dc0, (q15_t)0x3dba, (q15_t)0x3db5, (q15_t)0x3daf,\n    (q15_t)0x3daa, (q15_t)0x3da4, (q15_t)0x3d9f, (q15_t)0x3d99, (q15_t)0x3d94,\n    (q15_t)0x3d8e, (q15_t)0x3d89, (q15_t)0x3d83, (q15_t)0x3d7e, (q15_t)0x3d78,\n    (q15_t)0x3d73, (q15_t)0x3d6d, (q15_t)0x3d68, (q15_t)0x3d62, (q15_t)0x3d5d,\n    (q15_t)0x3d57, (q15_t)0x3d52, (q15_t)0x3d4c, (q15_t)0x3d47, (q15_t)0x3d41,\n    (q15_t)0x3d3c, (q15_t)0x3d36, (q15_t)0x3d31, (q15_t)0x3d2b, (q15_t)0x3d26,\n    (q15_t)0x3d20, (q15_t)0x3d1b, (q15_t)0x3d15, (q15_t)0x3d10, (q15_t)0x3d0a,\n    (q15_t)0x3d04, (q15_t)0x3cff, (q15_t)0x3cf9, (q15_t)0x3cf4, (q15_t)0x3cee,\n    (q15_t)0x3ce9, (q15_t)0x3ce3, (q15_t)0x3cde, (q15_t)0x3cd8, (q15_t)0x3cd3,\n    (q15_t)0x3ccd, (q15_t)0x3cc8, (q15_t)0x3cc2, (q15_t)0x3cbd, (q15_t)0x3cb7,\n    (q15_t)0x3cb2, (q15_t)0x3cac, (q15_t)0x3ca7, (q15_t)0x3ca1, (q15_t)0x3c9b,\n    (q15_t)0x3c96, (q15_t)0x3c90, (q15_t)0x3c8b, (q15_t)0x3c85, (q15_t)0x3c80,\n    (q15_t)0x3c7a, (q15_t)0x3c75, (q15_t)0x3c6f, (q15_t)0x3c6a, (q15_t)0x3c64,\n    (q15_t)0x3c5f, (q15_t)0x3c59, (q15_t)0x3c53, (q15_t)0x3c4e, (q15_t)0x3c48,\n    (q15_t)0x3c43, (q15_t)0x3c3d, (q15_t)0x3c38, (q15_t)0x3c32, (q15_t)0x3c2d,\n    (q15_t)0x3c27, (q15_t)0x3c22, (q15_t)0x3c1c, (q15_t)0x3c16, (q15_t)0x3c11,\n    (q15_t)0x3c0b, (q15_t)0x3c06, (q15_t)0x3c00, (q15_t)0x3bfb, (q15_t)0x3bf5,\n    (q15_t)0x3bf0, (q15_t)0x3bea, (q15_t)0x3be5, (q15_t)0x3bdf, (q15_t)0x3bd9,\n    (q15_t)0x3bd4, (q15_t)0x3bce, (q15_t)0x3bc9, (q15_t)0x3bc3, (q15_t)0x3bbe,\n    (q15_t)0x3bb8, (q15_t)0x3bb3, (q15_t)0x3bad, (q15_t)0x3ba7, (q15_t)0x3ba2,\n    (q15_t)0x3b9c, (q15_t)0x3b97, (q15_t)0x3b91, (q15_t)0x3b8c, (q15_t)0x3b86,\n    (q15_t)0x3b80, (q15_t)0x3b7b, (q15_t)0x3b75, (q15_t)0x3b70, (q15_t)0x3b6a,\n    (q15_t)0x3b65, (q15_t)0x3b5f, (q15_t)0x3b5a, (q15_t)0x3b54, (q15_t)0x3b4e,\n    (q15_t)0x3b49, (q15_t)0x3b43, (q15_t)0x3b3e, (q15_t)0x3b38, (q15_t)0x3b33,\n    (q15_t)0x3b2d, (q15_t)0x3b27, (q15_t)0x3b22, (q15_t)0x3b1c, (q15_t)0x3b17,\n    (q15_t)0x3b11, (q15_t)0x3b0c, (q15_t)0x3b06, (q15_t)0x3b00, (q15_t)0x3afb,\n    (q15_t)0x3af5, (q15_t)0x3af0, (q15_t)0x3aea, (q15_t)0x3ae4, (q15_t)0x3adf,\n    (q15_t)0x3ad9, (q15_t)0x3ad4, (q15_t)0x3ace, (q15_t)0x3ac9, (q15_t)0x3ac3,\n    (q15_t)0x3abd, (q15_t)0x3ab8, (q15_t)0x3ab2, (q15_t)0x3aad, (q15_t)0x3aa7,\n    (q15_t)0x3aa2, (q15_t)0x3a9c, (q15_t)0x3a96, (q15_t)0x3a91, (q15_t)0x3a8b,\n    (q15_t)0x3a86, (q15_t)0x3a80, (q15_t)0x3a7a, (q15_t)0x3a75, (q15_t)0x3a6f,\n    (q15_t)0x3a6a, (q15_t)0x3a64, (q15_t)0x3a5e, (q15_t)0x3a59, (q15_t)0x3a53,\n    (q15_t)0x3a4e, (q15_t)0x3a48, (q15_t)0x3a42, (q15_t)0x3a3d, (q15_t)0x3a37,\n    (q15_t)0x3a32, (q15_t)0x3a2c, (q15_t)0x3a26, (q15_t)0x3a21, (q15_t)0x3a1b,\n    (q15_t)0x3a16, (q15_t)0x3a10, (q15_t)0x3a0b, (q15_t)0x3a05, (q15_t)0x39ff,\n    (q15_t)0x39fa, (q15_t)0x39f4, (q15_t)0x39ee, (q15_t)0x39e9, (q15_t)0x39e3,\n    (q15_t)0x39de, (q15_t)0x39d8, (q15_t)0x39d2, (q15_t)0x39cd, (q15_t)0x39c7,\n    (q15_t)0x39c2, (q15_t)0x39bc, (q15_t)0x39b6, (q15_t)0x39b1, (q15_t)0x39ab,\n    (q15_t)0x39a6, (q15_t)0x39a0, (q15_t)0x399a, (q15_t)0x3995, (q15_t)0x398f,\n    (q15_t)0x398a, (q15_t)0x3984, (q15_t)0x397e, (q15_t)0x3979, (q15_t)0x3973,\n    (q15_t)0x396d, (q15_t)0x3968, (q15_t)0x3962, (q15_t)0x395d, (q15_t)0x3957,\n    (q15_t)0x3951, (q15_t)0x394c, (q15_t)0x3946, (q15_t)0x3941, (q15_t)0x393b,\n    (q15_t)0x3935, (q15_t)0x3930, (q15_t)0x392a, (q15_t)0x3924, (q15_t)0x391f,\n    (q15_t)0x3919, (q15_t)0x3914, (q15_t)0x390e, (q15_t)0x3908, (q15_t)0x3903,\n    (q15_t)0x38fd, (q15_t)0x38f7, (q15_t)0x38f2, (q15_t)0x38ec, (q15_t)0x38e7,\n    (q15_t)0x38e1, (q15_t)0x38db, (q15_t)0x38d6, (q15_t)0x38d0, (q15_t)0x38ca,\n    (q15_t)0x38c5, (q15_t)0x38bf, (q15_t)0x38ba, (q15_t)0x38b4, (q15_t)0x38ae,\n    (q15_t)0x38a9, (q15_t)0x38a3, (q15_t)0x389d, (q15_t)0x3898, (q15_t)0x3892,\n    (q15_t)0x388c, (q15_t)0x3887, (q15_t)0x3881, (q15_t)0x387c, (q15_t)0x3876,\n    (q15_t)0x3870, (q15_t)0x386b, (q15_t)0x3865, (q15_t)0x385f, (q15_t)0x385a,\n    (q15_t)0x3854, (q15_t)0x384e, (q15_t)0x3849, (q15_t)0x3843, (q15_t)0x383d,\n    (q15_t)0x3838, (q15_t)0x3832, (q15_t)0x382d, (q15_t)0x3827, (q15_t)0x3821,\n    (q15_t)0x381c, (q15_t)0x3816, (q15_t)0x3810, (q15_t)0x380b, (q15_t)0x3805,\n    (q15_t)0x37ff, (q15_t)0x37fa, (q15_t)0x37f4, (q15_t)0x37ee, (q15_t)0x37e9,\n    (q15_t)0x37e3, (q15_t)0x37dd, (q15_t)0x37d8, (q15_t)0x37d2, (q15_t)0x37cc,\n    (q15_t)0x37c7, (q15_t)0x37c1, (q15_t)0x37bc, (q15_t)0x37b6, (q15_t)0x37b0,\n    (q15_t)0x37ab, (q15_t)0x37a5, (q15_t)0x379f, (q15_t)0x379a, (q15_t)0x3794,\n    (q15_t)0x378e, (q15_t)0x3789, (q15_t)0x3783, (q15_t)0x377d, (q15_t)0x3778,\n    (q15_t)0x3772, (q15_t)0x376c, (q15_t)0x3767, (q15_t)0x3761, (q15_t)0x375b,\n    (q15_t)0x3756, (q15_t)0x3750, (q15_t)0x374a, (q15_t)0x3745, (q15_t)0x373f,\n    (q15_t)0x3739, (q15_t)0x3734, (q15_t)0x372e, (q15_t)0x3728, (q15_t)0x3723,\n    (q15_t)0x371d, (q15_t)0x3717, (q15_t)0x3712, (q15_t)0x370c, (q15_t)0x3706,\n    (q15_t)0x3701, (q15_t)0x36fb, (q15_t)0x36f5, (q15_t)0x36f0, (q15_t)0x36ea,\n    (q15_t)0x36e4, (q15_t)0x36df, (q15_t)0x36d9, (q15_t)0x36d3, (q15_t)0x36ce,\n    (q15_t)0x36c8, (q15_t)0x36c2, (q15_t)0x36bc, (q15_t)0x36b7, (q15_t)0x36b1,\n    (q15_t)0x36ab, (q15_t)0x36a6, (q15_t)0x36a0, (q15_t)0x369a, (q15_t)0x3695,\n    (q15_t)0x368f, (q15_t)0x3689, (q15_t)0x3684, (q15_t)0x367e, (q15_t)0x3678,\n    (q15_t)0x3673, (q15_t)0x366d, (q15_t)0x3667, (q15_t)0x3662, (q15_t)0x365c,\n    (q15_t)0x3656, (q15_t)0x3650, (q15_t)0x364b, (q15_t)0x3645, (q15_t)0x363f,\n    (q15_t)0x363a, (q15_t)0x3634, (q15_t)0x362e, (q15_t)0x3629, (q15_t)0x3623,\n    (q15_t)0x361d, (q15_t)0x3618, (q15_t)0x3612, (q15_t)0x360c, (q15_t)0x3606,\n    (q15_t)0x3601, (q15_t)0x35fb, (q15_t)0x35f5, (q15_t)0x35f0, (q15_t)0x35ea,\n    (q15_t)0x35e4, (q15_t)0x35df, (q15_t)0x35d9, (q15_t)0x35d3, (q15_t)0x35cd,\n    (q15_t)0x35c8, (q15_t)0x35c2, (q15_t)0x35bc, (q15_t)0x35b7, (q15_t)0x35b1,\n    (q15_t)0x35ab, (q15_t)0x35a6, (q15_t)0x35a0, (q15_t)0x359a, (q15_t)0x3594,\n    (q15_t)0x358f, (q15_t)0x3589, (q15_t)0x3583, (q15_t)0x357e, (q15_t)0x3578,\n    (q15_t)0x3572, (q15_t)0x356c, (q15_t)0x3567, (q15_t)0x3561, (q15_t)0x355b,\n    (q15_t)0x3556, (q15_t)0x3550, (q15_t)0x354a, (q15_t)0x3544, (q15_t)0x353f,\n    (q15_t)0x3539, (q15_t)0x3533, (q15_t)0x352e, (q15_t)0x3528, (q15_t)0x3522,\n    (q15_t)0x351c, (q15_t)0x3517, (q15_t)0x3511, (q15_t)0x350b, (q15_t)0x3506,\n    (q15_t)0x3500, (q15_t)0x34fa, (q15_t)0x34f4, (q15_t)0x34ef, (q15_t)0x34e9,\n    (q15_t)0x34e3, (q15_t)0x34de, (q15_t)0x34d8, (q15_t)0x34d2, (q15_t)0x34cc,\n    (q15_t)0x34c7, (q15_t)0x34c1, (q15_t)0x34bb, (q15_t)0x34b6, (q15_t)0x34b0,\n    (q15_t)0x34aa, (q15_t)0x34a4, (q15_t)0x349f, (q15_t)0x3499, (q15_t)0x3493,\n    (q15_t)0x348d, (q15_t)0x3488, (q15_t)0x3482, (q15_t)0x347c, (q15_t)0x3476,\n    (q15_t)0x3471, (q15_t)0x346b, (q15_t)0x3465, (q15_t)0x3460, (q15_t)0x345a,\n    (q15_t)0x3454, (q15_t)0x344e, (q15_t)0x3449, (q15_t)0x3443, (q15_t)0x343d,\n    (q15_t)0x3437, (q15_t)0x3432, (q15_t)0x342c, (q15_t)0x3426, (q15_t)0x3420,\n    (q15_t)0x341b, (q15_t)0x3415, (q15_t)0x340f, (q15_t)0x340a, (q15_t)0x3404,\n    (q15_t)0x33fe, (q15_t)0x33f8, (q15_t)0x33f3, (q15_t)0x33ed, (q15_t)0x33e7,\n    (q15_t)0x33e1, (q15_t)0x33dc, (q15_t)0x33d6, (q15_t)0x33d0, (q15_t)0x33ca,\n    (q15_t)0x33c5, (q15_t)0x33bf, (q15_t)0x33b9, (q15_t)0x33b3, (q15_t)0x33ae,\n    (q15_t)0x33a8, (q15_t)0x33a2, (q15_t)0x339c, (q15_t)0x3397, (q15_t)0x3391,\n    (q15_t)0x338b, (q15_t)0x3385, (q15_t)0x3380, (q15_t)0x337a, (q15_t)0x3374,\n    (q15_t)0x336e, (q15_t)0x3369, (q15_t)0x3363, (q15_t)0x335d, (q15_t)0x3357,\n    (q15_t)0x3352, (q15_t)0x334c, (q15_t)0x3346, (q15_t)0x3340, (q15_t)0x333b,\n    (q15_t)0x3335, (q15_t)0x332f, (q15_t)0x3329, (q15_t)0x3324, (q15_t)0x331e,\n    (q15_t)0x3318, (q15_t)0x3312, (q15_t)0x330c, (q15_t)0x3307, (q15_t)0x3301,\n    (q15_t)0x32fb, (q15_t)0x32f5, (q15_t)0x32f0, (q15_t)0x32ea, (q15_t)0x32e4,\n    (q15_t)0x32de, (q15_t)0x32d9, (q15_t)0x32d3, (q15_t)0x32cd, (q15_t)0x32c7,\n    (q15_t)0x32c2, (q15_t)0x32bc, (q15_t)0x32b6, (q15_t)0x32b0, (q15_t)0x32aa,\n    (q15_t)0x32a5, (q15_t)0x329f, (q15_t)0x3299, (q15_t)0x3293, (q15_t)0x328e,\n    (q15_t)0x3288, (q15_t)0x3282, (q15_t)0x327c, (q15_t)0x3276, (q15_t)0x3271,\n    (q15_t)0x326b, (q15_t)0x3265, (q15_t)0x325f, (q15_t)0x325a, (q15_t)0x3254,\n    (q15_t)0x324e, (q15_t)0x3248, (q15_t)0x3243, (q15_t)0x323d, (q15_t)0x3237,\n    (q15_t)0x3231, (q15_t)0x322b, (q15_t)0x3226, (q15_t)0x3220, (q15_t)0x321a,\n    (q15_t)0x3214, (q15_t)0x320e, (q15_t)0x3209, (q15_t)0x3203, (q15_t)0x31fd,\n    (q15_t)0x31f7, (q15_t)0x31f2, (q15_t)0x31ec, (q15_t)0x31e6, (q15_t)0x31e0,\n    (q15_t)0x31da, (q15_t)0x31d5, (q15_t)0x31cf, (q15_t)0x31c9, (q15_t)0x31c3,\n    (q15_t)0x31bd, (q15_t)0x31b8, (q15_t)0x31b2, (q15_t)0x31ac, (q15_t)0x31a6,\n    (q15_t)0x31a1, (q15_t)0x319b, (q15_t)0x3195, (q15_t)0x318f, (q15_t)0x3189,\n    (q15_t)0x3184, (q15_t)0x317e, (q15_t)0x3178, (q15_t)0x3172, (q15_t)0x316c,\n    (q15_t)0x3167, (q15_t)0x3161, (q15_t)0x315b, (q15_t)0x3155, (q15_t)0x314f,\n    (q15_t)0x314a, (q15_t)0x3144, (q15_t)0x313e, (q15_t)0x3138, (q15_t)0x3132,\n    (q15_t)0x312d, (q15_t)0x3127, (q15_t)0x3121, (q15_t)0x311b, (q15_t)0x3115,\n    (q15_t)0x3110, (q15_t)0x310a, (q15_t)0x3104, (q15_t)0x30fe, (q15_t)0x30f8,\n    (q15_t)0x30f3, (q15_t)0x30ed, (q15_t)0x30e7, (q15_t)0x30e1, (q15_t)0x30db,\n    (q15_t)0x30d6, (q15_t)0x30d0, (q15_t)0x30ca, (q15_t)0x30c4, (q15_t)0x30be,\n    (q15_t)0x30b8, (q15_t)0x30b3, (q15_t)0x30ad, (q15_t)0x30a7, (q15_t)0x30a1,\n    (q15_t)0x309b, (q15_t)0x3096, (q15_t)0x3090, (q15_t)0x308a, (q15_t)0x3084,\n    (q15_t)0x307e, (q15_t)0x3079, (q15_t)0x3073, (q15_t)0x306d, (q15_t)0x3067,\n    (q15_t)0x3061, (q15_t)0x305b, (q15_t)0x3056, (q15_t)0x3050, (q15_t)0x304a,\n    (q15_t)0x3044, (q15_t)0x303e, (q15_t)0x3039, (q15_t)0x3033, (q15_t)0x302d,\n    (q15_t)0x3027, (q15_t)0x3021, (q15_t)0x301b, (q15_t)0x3016, (q15_t)0x3010,\n    (q15_t)0x300a, (q15_t)0x3004, (q15_t)0x2ffe, (q15_t)0x2ff8, (q15_t)0x2ff3,\n    (q15_t)0x2fed, (q15_t)0x2fe7, (q15_t)0x2fe1, (q15_t)0x2fdb, (q15_t)0x2fd6,\n    (q15_t)0x2fd0, (q15_t)0x2fca, (q15_t)0x2fc4, (q15_t)0x2fbe, (q15_t)0x2fb8,\n    (q15_t)0x2fb3, (q15_t)0x2fad, (q15_t)0x2fa7, (q15_t)0x2fa1, (q15_t)0x2f9b,\n    (q15_t)0x2f95, (q15_t)0x2f90, (q15_t)0x2f8a, (q15_t)0x2f84, (q15_t)0x2f7e,\n    (q15_t)0x2f78, (q15_t)0x2f72, (q15_t)0x2f6d, (q15_t)0x2f67, (q15_t)0x2f61,\n    (q15_t)0x2f5b, (q15_t)0x2f55, (q15_t)0x2f4f, (q15_t)0x2f4a, (q15_t)0x2f44,\n    (q15_t)0x2f3e, (q15_t)0x2f38, (q15_t)0x2f32, (q15_t)0x2f2c, (q15_t)0x2f27,\n    (q15_t)0x2f21, (q15_t)0x2f1b, (q15_t)0x2f15, (q15_t)0x2f0f, (q15_t)0x2f09,\n    (q15_t)0x2f03, (q15_t)0x2efe, (q15_t)0x2ef8, (q15_t)0x2ef2, (q15_t)0x2eec,\n    (q15_t)0x2ee6, (q15_t)0x2ee0, (q15_t)0x2edb, (q15_t)0x2ed5, (q15_t)0x2ecf,\n    (q15_t)0x2ec9, (q15_t)0x2ec3, (q15_t)0x2ebd, (q15_t)0x2eb7, (q15_t)0x2eb2,\n    (q15_t)0x2eac, (q15_t)0x2ea6, (q15_t)0x2ea0, (q15_t)0x2e9a, (q15_t)0x2e94,\n    (q15_t)0x2e8e, (q15_t)0x2e89, (q15_t)0x2e83, (q15_t)0x2e7d, (q15_t)0x2e77,\n    (q15_t)0x2e71, (q15_t)0x2e6b, (q15_t)0x2e65, (q15_t)0x2e60, (q15_t)0x2e5a,\n    (q15_t)0x2e54, (q15_t)0x2e4e, (q15_t)0x2e48, (q15_t)0x2e42, (q15_t)0x2e3c,\n    (q15_t)0x2e37, (q15_t)0x2e31, (q15_t)0x2e2b, (q15_t)0x2e25, (q15_t)0x2e1f,\n    (q15_t)0x2e19, (q15_t)0x2e13, (q15_t)0x2e0e, (q15_t)0x2e08, (q15_t)0x2e02,\n    (q15_t)0x2dfc, (q15_t)0x2df6, (q15_t)0x2df0, (q15_t)0x2dea, (q15_t)0x2de5,\n    (q15_t)0x2ddf, (q15_t)0x2dd9, (q15_t)0x2dd3, (q15_t)0x2dcd, (q15_t)0x2dc7,\n    (q15_t)0x2dc1, (q15_t)0x2dbb, (q15_t)0x2db6, (q15_t)0x2db0, (q15_t)0x2daa,\n    (q15_t)0x2da4, (q15_t)0x2d9e, (q15_t)0x2d98, (q15_t)0x2d92, (q15_t)0x2d8d,\n    (q15_t)0x2d87, (q15_t)0x2d81, (q15_t)0x2d7b, (q15_t)0x2d75, (q15_t)0x2d6f,\n    (q15_t)0x2d69, (q15_t)0x2d63, (q15_t)0x2d5e, (q15_t)0x2d58, (q15_t)0x2d52,\n    (q15_t)0x2d4c, (q15_t)0x2d46, (q15_t)0x2d40, (q15_t)0x2d3a, (q15_t)0x2d34,\n    (q15_t)0x2d2f, (q15_t)0x2d29, (q15_t)0x2d23, (q15_t)0x2d1d, (q15_t)0x2d17,\n    (q15_t)0x2d11, (q15_t)0x2d0b, (q15_t)0x2d05, (q15_t)0x2cff, (q15_t)0x2cfa,\n    (q15_t)0x2cf4, (q15_t)0x2cee, (q15_t)0x2ce8, (q15_t)0x2ce2, (q15_t)0x2cdc,\n    (q15_t)0x2cd6, (q15_t)0x2cd0, (q15_t)0x2ccb, (q15_t)0x2cc5, (q15_t)0x2cbf,\n    (q15_t)0x2cb9, (q15_t)0x2cb3, (q15_t)0x2cad, (q15_t)0x2ca7, (q15_t)0x2ca1,\n    (q15_t)0x2c9b, (q15_t)0x2c96, (q15_t)0x2c90, (q15_t)0x2c8a, (q15_t)0x2c84,\n    (q15_t)0x2c7e, (q15_t)0x2c78, (q15_t)0x2c72, (q15_t)0x2c6c, (q15_t)0x2c66,\n    (q15_t)0x2c61, (q15_t)0x2c5b, (q15_t)0x2c55, (q15_t)0x2c4f, (q15_t)0x2c49,\n    (q15_t)0x2c43, (q15_t)0x2c3d, (q15_t)0x2c37, (q15_t)0x2c31, (q15_t)0x2c2b,\n    (q15_t)0x2c26, (q15_t)0x2c20, (q15_t)0x2c1a, (q15_t)0x2c14, (q15_t)0x2c0e,\n    (q15_t)0x2c08, (q15_t)0x2c02, (q15_t)0x2bfc, (q15_t)0x2bf6, (q15_t)0x2bf0,\n    (q15_t)0x2beb, (q15_t)0x2be5, (q15_t)0x2bdf, (q15_t)0x2bd9, (q15_t)0x2bd3,\n    (q15_t)0x2bcd, (q15_t)0x2bc7, (q15_t)0x2bc1, (q15_t)0x2bbb, (q15_t)0x2bb5,\n    (q15_t)0x2bb0, (q15_t)0x2baa, (q15_t)0x2ba4, (q15_t)0x2b9e, (q15_t)0x2b98,\n    (q15_t)0x2b92, (q15_t)0x2b8c, (q15_t)0x2b86, (q15_t)0x2b80, (q15_t)0x2b7a,\n    (q15_t)0x2b74, (q15_t)0x2b6f, (q15_t)0x2b69, (q15_t)0x2b63, (q15_t)0x2b5d,\n    (q15_t)0x2b57, (q15_t)0x2b51, (q15_t)0x2b4b, (q15_t)0x2b45, (q15_t)0x2b3f,\n    (q15_t)0x2b39, (q15_t)0x2b33, (q15_t)0x2b2d, (q15_t)0x2b28, (q15_t)0x2b22,\n    (q15_t)0x2b1c, (q15_t)0x2b16, (q15_t)0x2b10, (q15_t)0x2b0a, (q15_t)0x2b04,\n    (q15_t)0x2afe, (q15_t)0x2af8, (q15_t)0x2af2, (q15_t)0x2aec, (q15_t)0x2ae6,\n    (q15_t)0x2ae1, (q15_t)0x2adb, (q15_t)0x2ad5, (q15_t)0x2acf, (q15_t)0x2ac9,\n    (q15_t)0x2ac3, (q15_t)0x2abd, (q15_t)0x2ab7, (q15_t)0x2ab1, (q15_t)0x2aab,\n    (q15_t)0x2aa5, (q15_t)0x2a9f, (q15_t)0x2a99, (q15_t)0x2a94, (q15_t)0x2a8e,\n    (q15_t)0x2a88, (q15_t)0x2a82, (q15_t)0x2a7c, (q15_t)0x2a76, (q15_t)0x2a70,\n    (q15_t)0x2a6a, (q15_t)0x2a64, (q15_t)0x2a5e, (q15_t)0x2a58, (q15_t)0x2a52,\n    (q15_t)0x2a4c, (q15_t)0x2a47, (q15_t)0x2a41, (q15_t)0x2a3b, (q15_t)0x2a35,\n    (q15_t)0x2a2f, (q15_t)0x2a29, (q15_t)0x2a23, (q15_t)0x2a1d, (q15_t)0x2a17,\n    (q15_t)0x2a11, (q15_t)0x2a0b, (q15_t)0x2a05, (q15_t)0x29ff, (q15_t)0x29f9,\n    (q15_t)0x29f3, (q15_t)0x29ee, (q15_t)0x29e8, (q15_t)0x29e2, (q15_t)0x29dc,\n    (q15_t)0x29d6, (q15_t)0x29d0, (q15_t)0x29ca, (q15_t)0x29c4, (q15_t)0x29be,\n    (q15_t)0x29b8, (q15_t)0x29b2, (q15_t)0x29ac, (q15_t)0x29a6, (q15_t)0x29a0,\n    (q15_t)0x299a, (q15_t)0x2994, (q15_t)0x298e, (q15_t)0x2989, (q15_t)0x2983,\n    (q15_t)0x297d, (q15_t)0x2977, (q15_t)0x2971, (q15_t)0x296b, (q15_t)0x2965,\n    (q15_t)0x295f, (q15_t)0x2959, (q15_t)0x2953, (q15_t)0x294d, (q15_t)0x2947,\n    (q15_t)0x2941, (q15_t)0x293b, (q15_t)0x2935, (q15_t)0x292f, (q15_t)0x2929,\n    (q15_t)0x2923, (q15_t)0x291d, (q15_t)0x2918, (q15_t)0x2912, (q15_t)0x290c,\n    (q15_t)0x2906, (q15_t)0x2900, (q15_t)0x28fa, (q15_t)0x28f4, (q15_t)0x28ee,\n    (q15_t)0x28e8, (q15_t)0x28e2, (q15_t)0x28dc, (q15_t)0x28d6, (q15_t)0x28d0,\n    (q15_t)0x28ca, (q15_t)0x28c4, (q15_t)0x28be, (q15_t)0x28b8, (q15_t)0x28b2,\n    (q15_t)0x28ac, (q15_t)0x28a6, (q15_t)0x28a0, (q15_t)0x289a, (q15_t)0x2895,\n    (q15_t)0x288f, (q15_t)0x2889, (q15_t)0x2883, (q15_t)0x287d, (q15_t)0x2877,\n    (q15_t)0x2871, (q15_t)0x286b, (q15_t)0x2865, (q15_t)0x285f, (q15_t)0x2859,\n    (q15_t)0x2853, (q15_t)0x284d, (q15_t)0x2847, (q15_t)0x2841, (q15_t)0x283b,\n    (q15_t)0x2835, (q15_t)0x282f, (q15_t)0x2829, (q15_t)0x2823, (q15_t)0x281d,\n    (q15_t)0x2817, (q15_t)0x2811, (q15_t)0x280b, (q15_t)0x2805, (q15_t)0x27ff,\n    (q15_t)0x27f9, (q15_t)0x27f3, (q15_t)0x27ee, (q15_t)0x27e8, (q15_t)0x27e2,\n    (q15_t)0x27dc, (q15_t)0x27d6, (q15_t)0x27d0, (q15_t)0x27ca, (q15_t)0x27c4,\n    (q15_t)0x27be, (q15_t)0x27b8, (q15_t)0x27b2, (q15_t)0x27ac, (q15_t)0x27a6,\n    (q15_t)0x27a0, (q15_t)0x279a, (q15_t)0x2794, (q15_t)0x278e, (q15_t)0x2788,\n    (q15_t)0x2782, (q15_t)0x277c, (q15_t)0x2776, (q15_t)0x2770, (q15_t)0x276a,\n    (q15_t)0x2764, (q15_t)0x275e, (q15_t)0x2758, (q15_t)0x2752, (q15_t)0x274c,\n    (q15_t)0x2746, (q15_t)0x2740, (q15_t)0x273a, (q15_t)0x2734, (q15_t)0x272e,\n    (q15_t)0x2728, (q15_t)0x2722, (q15_t)0x271c, (q15_t)0x2716, (q15_t)0x2710,\n    (q15_t)0x270a, (q15_t)0x2704, (q15_t)0x26fe, (q15_t)0x26f8, (q15_t)0x26f2,\n    (q15_t)0x26ec, (q15_t)0x26e7, (q15_t)0x26e1, (q15_t)0x26db, (q15_t)0x26d5,\n    (q15_t)0x26cf, (q15_t)0x26c9, (q15_t)0x26c3, (q15_t)0x26bd, (q15_t)0x26b7,\n    (q15_t)0x26b1, (q15_t)0x26ab, (q15_t)0x26a5, (q15_t)0x269f, (q15_t)0x2699,\n    (q15_t)0x2693, (q15_t)0x268d, (q15_t)0x2687, (q15_t)0x2681, (q15_t)0x267b,\n    (q15_t)0x2675, (q15_t)0x266f, (q15_t)0x2669, (q15_t)0x2663, (q15_t)0x265d,\n    (q15_t)0x2657, (q15_t)0x2651, (q15_t)0x264b, (q15_t)0x2645, (q15_t)0x263f,\n    (q15_t)0x2639, (q15_t)0x2633, (q15_t)0x262d, (q15_t)0x2627, (q15_t)0x2621,\n    (q15_t)0x261b, (q15_t)0x2615, (q15_t)0x260f, (q15_t)0x2609, (q15_t)0x2603,\n    (q15_t)0x25fd, (q15_t)0x25f7, (q15_t)0x25f1, (q15_t)0x25eb, (q15_t)0x25e5,\n    (q15_t)0x25df, (q15_t)0x25d9, (q15_t)0x25d3, (q15_t)0x25cd, (q15_t)0x25c7,\n    (q15_t)0x25c1, (q15_t)0x25bb, (q15_t)0x25b5, (q15_t)0x25af, (q15_t)0x25a9,\n    (q15_t)0x25a3, (q15_t)0x259d, (q15_t)0x2597, (q15_t)0x2591, (q15_t)0x258b,\n    (q15_t)0x2585, (q15_t)0x257f, (q15_t)0x2579, (q15_t)0x2573, (q15_t)0x256d,\n    (q15_t)0x2567, (q15_t)0x2561, (q15_t)0x255b, (q15_t)0x2555, (q15_t)0x254f,\n    (q15_t)0x2549, (q15_t)0x2543, (q15_t)0x253d, (q15_t)0x2537, (q15_t)0x2531,\n    (q15_t)0x252b, (q15_t)0x2525, (q15_t)0x251f, (q15_t)0x2519, (q15_t)0x2513,\n    (q15_t)0x250c, (q15_t)0x2506, (q15_t)0x2500, (q15_t)0x24fa, (q15_t)0x24f4,\n    (q15_t)0x24ee, (q15_t)0x24e8, (q15_t)0x24e2, (q15_t)0x24dc, (q15_t)0x24d6,\n    (q15_t)0x24d0, (q15_t)0x24ca, (q15_t)0x24c4, (q15_t)0x24be, (q15_t)0x24b8,\n    (q15_t)0x24b2, (q15_t)0x24ac, (q15_t)0x24a6, (q15_t)0x24a0, (q15_t)0x249a,\n    (q15_t)0x2494, (q15_t)0x248e, (q15_t)0x2488, (q15_t)0x2482, (q15_t)0x247c,\n    (q15_t)0x2476, (q15_t)0x2470, (q15_t)0x246a, (q15_t)0x2464, (q15_t)0x245e,\n    (q15_t)0x2458, (q15_t)0x2452, (q15_t)0x244c, (q15_t)0x2446, (q15_t)0x2440,\n    (q15_t)0x243a, (q15_t)0x2434, (q15_t)0x242e, (q15_t)0x2428, (q15_t)0x2422,\n    (q15_t)0x241c, (q15_t)0x2416, (q15_t)0x2410, (q15_t)0x240a, (q15_t)0x2404,\n    (q15_t)0x23fd, (q15_t)0x23f7, (q15_t)0x23f1, (q15_t)0x23eb, (q15_t)0x23e5,\n    (q15_t)0x23df, (q15_t)0x23d9, (q15_t)0x23d3, (q15_t)0x23cd, (q15_t)0x23c7,\n    (q15_t)0x23c1, (q15_t)0x23bb, (q15_t)0x23b5, (q15_t)0x23af, (q15_t)0x23a9,\n    (q15_t)0x23a3, (q15_t)0x239d, (q15_t)0x2397, (q15_t)0x2391, (q15_t)0x238b,\n    (q15_t)0x2385, (q15_t)0x237f, (q15_t)0x2379, (q15_t)0x2373, (q15_t)0x236d,\n    (q15_t)0x2367, (q15_t)0x2361, (q15_t)0x235b, (q15_t)0x2355, (q15_t)0x234e,\n    (q15_t)0x2348, (q15_t)0x2342, (q15_t)0x233c, (q15_t)0x2336, (q15_t)0x2330,\n    (q15_t)0x232a, (q15_t)0x2324, (q15_t)0x231e, (q15_t)0x2318, (q15_t)0x2312,\n    (q15_t)0x230c, (q15_t)0x2306, (q15_t)0x2300, (q15_t)0x22fa, (q15_t)0x22f4,\n    (q15_t)0x22ee, (q15_t)0x22e8, (q15_t)0x22e2, (q15_t)0x22dc, (q15_t)0x22d6,\n    (q15_t)0x22d0, (q15_t)0x22ca, (q15_t)0x22c4, (q15_t)0x22bd, (q15_t)0x22b7,\n    (q15_t)0x22b1, (q15_t)0x22ab, (q15_t)0x22a5, (q15_t)0x229f, (q15_t)0x2299,\n    (q15_t)0x2293, (q15_t)0x228d, (q15_t)0x2287, (q15_t)0x2281, (q15_t)0x227b,\n    (q15_t)0x2275, (q15_t)0x226f, (q15_t)0x2269, (q15_t)0x2263, (q15_t)0x225d,\n    (q15_t)0x2257, (q15_t)0x2251, (q15_t)0x224a, (q15_t)0x2244, (q15_t)0x223e,\n    (q15_t)0x2238, (q15_t)0x2232, (q15_t)0x222c, (q15_t)0x2226, (q15_t)0x2220,\n    (q15_t)0x221a, (q15_t)0x2214, (q15_t)0x220e, (q15_t)0x2208, (q15_t)0x2202,\n    (q15_t)0x21fc, (q15_t)0x21f6, (q15_t)0x21f0, (q15_t)0x21ea, (q15_t)0x21e4,\n    (q15_t)0x21dd, (q15_t)0x21d7, (q15_t)0x21d1, (q15_t)0x21cb, (q15_t)0x21c5,\n    (q15_t)0x21bf, (q15_t)0x21b9, (q15_t)0x21b3, (q15_t)0x21ad, (q15_t)0x21a7,\n    (q15_t)0x21a1, (q15_t)0x219b, (q15_t)0x2195, (q15_t)0x218f, (q15_t)0x2189,\n    (q15_t)0x2183, (q15_t)0x217c, (q15_t)0x2176, (q15_t)0x2170, (q15_t)0x216a,\n    (q15_t)0x2164, (q15_t)0x215e, (q15_t)0x2158, (q15_t)0x2152, (q15_t)0x214c,\n    (q15_t)0x2146, (q15_t)0x2140, (q15_t)0x213a, (q15_t)0x2134, (q15_t)0x212e,\n    (q15_t)0x2128, (q15_t)0x2121, (q15_t)0x211b, (q15_t)0x2115, (q15_t)0x210f,\n    (q15_t)0x2109, (q15_t)0x2103, (q15_t)0x20fd, (q15_t)0x20f7, (q15_t)0x20f1,\n    (q15_t)0x20eb, (q15_t)0x20e5, (q15_t)0x20df, (q15_t)0x20d9, (q15_t)0x20d3,\n    (q15_t)0x20cc, (q15_t)0x20c6, (q15_t)0x20c0, (q15_t)0x20ba, (q15_t)0x20b4,\n    (q15_t)0x20ae, (q15_t)0x20a8, (q15_t)0x20a2, (q15_t)0x209c, (q15_t)0x2096,\n    (q15_t)0x2090, (q15_t)0x208a, (q15_t)0x2084, (q15_t)0x207e, (q15_t)0x2077,\n    (q15_t)0x2071, (q15_t)0x206b, (q15_t)0x2065, (q15_t)0x205f, (q15_t)0x2059,\n    (q15_t)0x2053, (q15_t)0x204d, (q15_t)0x2047, (q15_t)0x2041, (q15_t)0x203b,\n    (q15_t)0x2035, (q15_t)0x202e, (q15_t)0x2028, (q15_t)0x2022, (q15_t)0x201c,\n    (q15_t)0x2016, (q15_t)0x2010, (q15_t)0x200a, (q15_t)0x2004, (q15_t)0x1ffe,\n    (q15_t)0x1ff8, (q15_t)0x1ff2, (q15_t)0x1fec, (q15_t)0x1fe5, (q15_t)0x1fdf,\n    (q15_t)0x1fd9, (q15_t)0x1fd3, (q15_t)0x1fcd, (q15_t)0x1fc7, (q15_t)0x1fc1,\n    (q15_t)0x1fbb, (q15_t)0x1fb5, (q15_t)0x1faf, (q15_t)0x1fa9, (q15_t)0x1fa3,\n    (q15_t)0x1f9c, (q15_t)0x1f96, (q15_t)0x1f90, (q15_t)0x1f8a, (q15_t)0x1f84,\n    (q15_t)0x1f7e, (q15_t)0x1f78, (q15_t)0x1f72, (q15_t)0x1f6c, (q15_t)0x1f66,\n    (q15_t)0x1f60, (q15_t)0x1f59, (q15_t)0x1f53, (q15_t)0x1f4d, (q15_t)0x1f47,\n    (q15_t)0x1f41, (q15_t)0x1f3b, (q15_t)0x1f35, (q15_t)0x1f2f, (q15_t)0x1f29,\n    (q15_t)0x1f23, (q15_t)0x1f1d, (q15_t)0x1f16, (q15_t)0x1f10, (q15_t)0x1f0a,\n    (q15_t)0x1f04, (q15_t)0x1efe, (q15_t)0x1ef8, (q15_t)0x1ef2, (q15_t)0x1eec,\n    (q15_t)0x1ee6, (q15_t)0x1ee0, (q15_t)0x1ed9, (q15_t)0x1ed3, (q15_t)0x1ecd,\n    (q15_t)0x1ec7, (q15_t)0x1ec1, (q15_t)0x1ebb, (q15_t)0x1eb5, (q15_t)0x1eaf,\n    (q15_t)0x1ea9, (q15_t)0x1ea3, (q15_t)0x1e9c, (q15_t)0x1e96, (q15_t)0x1e90,\n    (q15_t)0x1e8a, (q15_t)0x1e84, (q15_t)0x1e7e, (q15_t)0x1e78, (q15_t)0x1e72,\n    (q15_t)0x1e6c, (q15_t)0x1e66, (q15_t)0x1e5f, (q15_t)0x1e59, (q15_t)0x1e53,\n    (q15_t)0x1e4d, (q15_t)0x1e47, (q15_t)0x1e41, (q15_t)0x1e3b, (q15_t)0x1e35,\n    (q15_t)0x1e2f, (q15_t)0x1e29, (q15_t)0x1e22, (q15_t)0x1e1c, (q15_t)0x1e16,\n    (q15_t)0x1e10, (q15_t)0x1e0a, (q15_t)0x1e04, (q15_t)0x1dfe, (q15_t)0x1df8,\n    (q15_t)0x1df2, (q15_t)0x1deb, (q15_t)0x1de5, (q15_t)0x1ddf, (q15_t)0x1dd9,\n    (q15_t)0x1dd3, (q15_t)0x1dcd, (q15_t)0x1dc7, (q15_t)0x1dc1, (q15_t)0x1dbb,\n    (q15_t)0x1db4, (q15_t)0x1dae, (q15_t)0x1da8, (q15_t)0x1da2, (q15_t)0x1d9c,\n    (q15_t)0x1d96, (q15_t)0x1d90, (q15_t)0x1d8a, (q15_t)0x1d84, (q15_t)0x1d7d,\n    (q15_t)0x1d77, (q15_t)0x1d71, (q15_t)0x1d6b, (q15_t)0x1d65, (q15_t)0x1d5f,\n    (q15_t)0x1d59, (q15_t)0x1d53, (q15_t)0x1d4c, (q15_t)0x1d46, (q15_t)0x1d40,\n    (q15_t)0x1d3a, (q15_t)0x1d34, (q15_t)0x1d2e, (q15_t)0x1d28, (q15_t)0x1d22,\n    (q15_t)0x1d1c, (q15_t)0x1d15, (q15_t)0x1d0f, (q15_t)0x1d09, (q15_t)0x1d03,\n    (q15_t)0x1cfd, (q15_t)0x1cf7, (q15_t)0x1cf1, (q15_t)0x1ceb, (q15_t)0x1ce4,\n    (q15_t)0x1cde, (q15_t)0x1cd8, (q15_t)0x1cd2, (q15_t)0x1ccc, (q15_t)0x1cc6,\n    (q15_t)0x1cc0, (q15_t)0x1cba, (q15_t)0x1cb3, (q15_t)0x1cad, (q15_t)0x1ca7,\n    (q15_t)0x1ca1, (q15_t)0x1c9b, (q15_t)0x1c95, (q15_t)0x1c8f, (q15_t)0x1c89,\n    (q15_t)0x1c83, (q15_t)0x1c7c, (q15_t)0x1c76, (q15_t)0x1c70, (q15_t)0x1c6a,\n    (q15_t)0x1c64, (q15_t)0x1c5e, (q15_t)0x1c58, (q15_t)0x1c51, (q15_t)0x1c4b,\n    (q15_t)0x1c45, (q15_t)0x1c3f, (q15_t)0x1c39, (q15_t)0x1c33, (q15_t)0x1c2d,\n    (q15_t)0x1c27, (q15_t)0x1c20, (q15_t)0x1c1a, (q15_t)0x1c14, (q15_t)0x1c0e,\n    (q15_t)0x1c08, (q15_t)0x1c02, (q15_t)0x1bfc, (q15_t)0x1bf6, (q15_t)0x1bef,\n    (q15_t)0x1be9, (q15_t)0x1be3, (q15_t)0x1bdd, (q15_t)0x1bd7, (q15_t)0x1bd1,\n    (q15_t)0x1bcb, (q15_t)0x1bc4, (q15_t)0x1bbe, (q15_t)0x1bb8, (q15_t)0x1bb2,\n    (q15_t)0x1bac, (q15_t)0x1ba6, (q15_t)0x1ba0, (q15_t)0x1b9a, (q15_t)0x1b93,\n    (q15_t)0x1b8d, (q15_t)0x1b87, (q15_t)0x1b81, (q15_t)0x1b7b, (q15_t)0x1b75,\n    (q15_t)0x1b6f, (q15_t)0x1b68, (q15_t)0x1b62, (q15_t)0x1b5c, (q15_t)0x1b56,\n    (q15_t)0x1b50, (q15_t)0x1b4a, (q15_t)0x1b44, (q15_t)0x1b3d, (q15_t)0x1b37,\n    (q15_t)0x1b31, (q15_t)0x1b2b, (q15_t)0x1b25, (q15_t)0x1b1f, (q15_t)0x1b19,\n    (q15_t)0x1b13, (q15_t)0x1b0c, (q15_t)0x1b06, (q15_t)0x1b00, (q15_t)0x1afa,\n    (q15_t)0x1af4, (q15_t)0x1aee, (q15_t)0x1ae8, (q15_t)0x1ae1, (q15_t)0x1adb,\n    (q15_t)0x1ad5, (q15_t)0x1acf, (q15_t)0x1ac9, (q15_t)0x1ac3, (q15_t)0x1abd,\n    (q15_t)0x1ab6, (q15_t)0x1ab0, (q15_t)0x1aaa, (q15_t)0x1aa4, (q15_t)0x1a9e,\n    (q15_t)0x1a98, (q15_t)0x1a91, (q15_t)0x1a8b, (q15_t)0x1a85, (q15_t)0x1a7f,\n    (q15_t)0x1a79, (q15_t)0x1a73, (q15_t)0x1a6d, (q15_t)0x1a66, (q15_t)0x1a60,\n    (q15_t)0x1a5a, (q15_t)0x1a54, (q15_t)0x1a4e, (q15_t)0x1a48, (q15_t)0x1a42,\n    (q15_t)0x1a3b, (q15_t)0x1a35, (q15_t)0x1a2f, (q15_t)0x1a29, (q15_t)0x1a23,\n    (q15_t)0x1a1d, (q15_t)0x1a17, (q15_t)0x1a10, (q15_t)0x1a0a, (q15_t)0x1a04,\n    (q15_t)0x19fe, (q15_t)0x19f8, (q15_t)0x19f2, (q15_t)0x19eb, (q15_t)0x19e5,\n    (q15_t)0x19df, (q15_t)0x19d9, (q15_t)0x19d3, (q15_t)0x19cd, (q15_t)0x19c7,\n    (q15_t)0x19c0, (q15_t)0x19ba, (q15_t)0x19b4, (q15_t)0x19ae, (q15_t)0x19a8,\n    (q15_t)0x19a2, (q15_t)0x199b, (q15_t)0x1995, (q15_t)0x198f, (q15_t)0x1989,\n    (q15_t)0x1983, (q15_t)0x197d, (q15_t)0x1977, (q15_t)0x1970, (q15_t)0x196a,\n    (q15_t)0x1964, (q15_t)0x195e, (q15_t)0x1958, (q15_t)0x1952, (q15_t)0x194b,\n    (q15_t)0x1945, (q15_t)0x193f, (q15_t)0x1939, (q15_t)0x1933, (q15_t)0x192d,\n    (q15_t)0x1926, (q15_t)0x1920, (q15_t)0x191a, (q15_t)0x1914, (q15_t)0x190e,\n    (q15_t)0x1908, (q15_t)0x1901, (q15_t)0x18fb, (q15_t)0x18f5, (q15_t)0x18ef,\n    (q15_t)0x18e9, (q15_t)0x18e3, (q15_t)0x18dc, (q15_t)0x18d6, (q15_t)0x18d0,\n    (q15_t)0x18ca, (q15_t)0x18c4, (q15_t)0x18be, (q15_t)0x18b8, (q15_t)0x18b1,\n    (q15_t)0x18ab, (q15_t)0x18a5, (q15_t)0x189f, (q15_t)0x1899, (q15_t)0x1893,\n    (q15_t)0x188c, (q15_t)0x1886, (q15_t)0x1880, (q15_t)0x187a, (q15_t)0x1874,\n    (q15_t)0x186e, (q15_t)0x1867, (q15_t)0x1861, (q15_t)0x185b, (q15_t)0x1855,\n    (q15_t)0x184f, (q15_t)0x1848, (q15_t)0x1842, (q15_t)0x183c, (q15_t)0x1836,\n    (q15_t)0x1830, (q15_t)0x182a, (q15_t)0x1823, (q15_t)0x181d, (q15_t)0x1817,\n    (q15_t)0x1811, (q15_t)0x180b, (q15_t)0x1805, (q15_t)0x17fe, (q15_t)0x17f8,\n    (q15_t)0x17f2, (q15_t)0x17ec, (q15_t)0x17e6, (q15_t)0x17e0, (q15_t)0x17d9,\n    (q15_t)0x17d3, (q15_t)0x17cd, (q15_t)0x17c7, (q15_t)0x17c1, (q15_t)0x17bb,\n    (q15_t)0x17b4, (q15_t)0x17ae, (q15_t)0x17a8, (q15_t)0x17a2, (q15_t)0x179c,\n    (q15_t)0x1795, (q15_t)0x178f, (q15_t)0x1789, (q15_t)0x1783, (q15_t)0x177d,\n    (q15_t)0x1777, (q15_t)0x1770, (q15_t)0x176a, (q15_t)0x1764, (q15_t)0x175e,\n    (q15_t)0x1758, (q15_t)0x1752, (q15_t)0x174b, (q15_t)0x1745, (q15_t)0x173f,\n    (q15_t)0x1739, (q15_t)0x1733, (q15_t)0x172c, (q15_t)0x1726, (q15_t)0x1720,\n    (q15_t)0x171a, (q15_t)0x1714, (q15_t)0x170e, (q15_t)0x1707, (q15_t)0x1701,\n    (q15_t)0x16fb, (q15_t)0x16f5, (q15_t)0x16ef, (q15_t)0x16e8, (q15_t)0x16e2,\n    (q15_t)0x16dc, (q15_t)0x16d6, (q15_t)0x16d0, (q15_t)0x16ca, (q15_t)0x16c3,\n    (q15_t)0x16bd, (q15_t)0x16b7, (q15_t)0x16b1, (q15_t)0x16ab, (q15_t)0x16a4,\n    (q15_t)0x169e, (q15_t)0x1698, (q15_t)0x1692, (q15_t)0x168c, (q15_t)0x1686,\n    (q15_t)0x167f, (q15_t)0x1679, (q15_t)0x1673, (q15_t)0x166d, (q15_t)0x1667,\n    (q15_t)0x1660, (q15_t)0x165a, (q15_t)0x1654, (q15_t)0x164e, (q15_t)0x1648,\n    (q15_t)0x1642, (q15_t)0x163b, (q15_t)0x1635, (q15_t)0x162f, (q15_t)0x1629,\n    (q15_t)0x1623, (q15_t)0x161c, (q15_t)0x1616, (q15_t)0x1610, (q15_t)0x160a,\n    (q15_t)0x1604, (q15_t)0x15fd, (q15_t)0x15f7, (q15_t)0x15f1, (q15_t)0x15eb,\n    (q15_t)0x15e5, (q15_t)0x15de, (q15_t)0x15d8, (q15_t)0x15d2, (q15_t)0x15cc,\n    (q15_t)0x15c6, (q15_t)0x15c0, (q15_t)0x15b9, (q15_t)0x15b3, (q15_t)0x15ad,\n    (q15_t)0x15a7, (q15_t)0x15a1, (q15_t)0x159a, (q15_t)0x1594, (q15_t)0x158e,\n    (q15_t)0x1588, (q15_t)0x1582, (q15_t)0x157b, (q15_t)0x1575, (q15_t)0x156f,\n    (q15_t)0x1569, (q15_t)0x1563, (q15_t)0x155c, (q15_t)0x1556, (q15_t)0x1550,\n    (q15_t)0x154a, (q15_t)0x1544, (q15_t)0x153d, (q15_t)0x1537, (q15_t)0x1531,\n    (q15_t)0x152b, (q15_t)0x1525, (q15_t)0x151e, (q15_t)0x1518, (q15_t)0x1512,\n    (q15_t)0x150c, (q15_t)0x1506, (q15_t)0x14ff, (q15_t)0x14f9, (q15_t)0x14f3,\n    (q15_t)0x14ed, (q15_t)0x14e7, (q15_t)0x14e0, (q15_t)0x14da, (q15_t)0x14d4,\n    (q15_t)0x14ce, (q15_t)0x14c8, (q15_t)0x14c1, (q15_t)0x14bb, (q15_t)0x14b5,\n    (q15_t)0x14af, (q15_t)0x14a9, (q15_t)0x14a2, (q15_t)0x149c, (q15_t)0x1496,\n    (q15_t)0x1490, (q15_t)0x148a, (q15_t)0x1483, (q15_t)0x147d, (q15_t)0x1477,\n    (q15_t)0x1471, (q15_t)0x146b, (q15_t)0x1464, (q15_t)0x145e, (q15_t)0x1458,\n    (q15_t)0x1452, (q15_t)0x144c, (q15_t)0x1445, (q15_t)0x143f, (q15_t)0x1439,\n    (q15_t)0x1433, (q15_t)0x142d, (q15_t)0x1426, (q15_t)0x1420, (q15_t)0x141a,\n    (q15_t)0x1414, (q15_t)0x140e, (q15_t)0x1407, (q15_t)0x1401, (q15_t)0x13fb,\n    (q15_t)0x13f5, (q15_t)0x13ef, (q15_t)0x13e8, (q15_t)0x13e2, (q15_t)0x13dc,\n    (q15_t)0x13d6, (q15_t)0x13d0, (q15_t)0x13c9, (q15_t)0x13c3, (q15_t)0x13bd,\n    (q15_t)0x13b7, (q15_t)0x13b1, (q15_t)0x13aa, (q15_t)0x13a4, (q15_t)0x139e,\n    (q15_t)0x1398, (q15_t)0x1391, (q15_t)0x138b, (q15_t)0x1385, (q15_t)0x137f,\n    (q15_t)0x1379, (q15_t)0x1372, (q15_t)0x136c, (q15_t)0x1366, (q15_t)0x1360,\n    (q15_t)0x135a, (q15_t)0x1353, (q15_t)0x134d, (q15_t)0x1347, (q15_t)0x1341,\n    (q15_t)0x133b, (q15_t)0x1334, (q15_t)0x132e, (q15_t)0x1328, (q15_t)0x1322,\n    (q15_t)0x131b, (q15_t)0x1315, (q15_t)0x130f, (q15_t)0x1309, (q15_t)0x1303,\n    (q15_t)0x12fc, (q15_t)0x12f6, (q15_t)0x12f0, (q15_t)0x12ea, (q15_t)0x12e4,\n    (q15_t)0x12dd, (q15_t)0x12d7, (q15_t)0x12d1, (q15_t)0x12cb, (q15_t)0x12c4,\n    (q15_t)0x12be, (q15_t)0x12b8, (q15_t)0x12b2, (q15_t)0x12ac, (q15_t)0x12a5,\n    (q15_t)0x129f, (q15_t)0x1299, (q15_t)0x1293, (q15_t)0x128d, (q15_t)0x1286,\n    (q15_t)0x1280, (q15_t)0x127a, (q15_t)0x1274, (q15_t)0x126d, (q15_t)0x1267,\n    (q15_t)0x1261, (q15_t)0x125b, (q15_t)0x1255, (q15_t)0x124e, (q15_t)0x1248,\n    (q15_t)0x1242, (q15_t)0x123c, (q15_t)0x1235, (q15_t)0x122f, (q15_t)0x1229,\n    (q15_t)0x1223, (q15_t)0x121d, (q15_t)0x1216, (q15_t)0x1210, (q15_t)0x120a,\n    (q15_t)0x1204, (q15_t)0x11fd, (q15_t)0x11f7, (q15_t)0x11f1, (q15_t)0x11eb,\n    (q15_t)0x11e5, (q15_t)0x11de, (q15_t)0x11d8, (q15_t)0x11d2, (q15_t)0x11cc,\n    (q15_t)0x11c5, (q15_t)0x11bf, (q15_t)0x11b9, (q15_t)0x11b3, (q15_t)0x11ad,\n    (q15_t)0x11a6, (q15_t)0x11a0, (q15_t)0x119a, (q15_t)0x1194, (q15_t)0x118d,\n    (q15_t)0x1187, (q15_t)0x1181, (q15_t)0x117b, (q15_t)0x1175, (q15_t)0x116e,\n    (q15_t)0x1168, (q15_t)0x1162, (q15_t)0x115c, (q15_t)0x1155, (q15_t)0x114f,\n    (q15_t)0x1149, (q15_t)0x1143, (q15_t)0x113d, (q15_t)0x1136, (q15_t)0x1130,\n    (q15_t)0x112a, (q15_t)0x1124, (q15_t)0x111d, (q15_t)0x1117, (q15_t)0x1111,\n    (q15_t)0x110b, (q15_t)0x1105, (q15_t)0x10fe, (q15_t)0x10f8, (q15_t)0x10f2,\n    (q15_t)0x10ec, (q15_t)0x10e5, (q15_t)0x10df, (q15_t)0x10d9, (q15_t)0x10d3,\n    (q15_t)0x10cc, (q15_t)0x10c6, (q15_t)0x10c0, (q15_t)0x10ba, (q15_t)0x10b4,\n    (q15_t)0x10ad, (q15_t)0x10a7, (q15_t)0x10a1, (q15_t)0x109b, (q15_t)0x1094,\n    (q15_t)0x108e, (q15_t)0x1088, (q15_t)0x1082, (q15_t)0x107b, (q15_t)0x1075,\n    (q15_t)0x106f, (q15_t)0x1069, (q15_t)0x1063, (q15_t)0x105c, (q15_t)0x1056,\n    (q15_t)0x1050, (q15_t)0x104a, (q15_t)0x1043, (q15_t)0x103d, (q15_t)0x1037,\n    (q15_t)0x1031, (q15_t)0x102a, (q15_t)0x1024, (q15_t)0x101e, (q15_t)0x1018,\n    (q15_t)0x1012, (q15_t)0x100b, (q15_t)0x1005, (q15_t)0xfff,  (q15_t)0xff9,\n    (q15_t)0xff2,  (q15_t)0xfec,  (q15_t)0xfe6,  (q15_t)0xfe0,  (q15_t)0xfd9,\n    (q15_t)0xfd3,  (q15_t)0xfcd,  (q15_t)0xfc7,  (q15_t)0xfc0,  (q15_t)0xfba,\n    (q15_t)0xfb4,  (q15_t)0xfae,  (q15_t)0xfa8,  (q15_t)0xfa1,  (q15_t)0xf9b,\n    (q15_t)0xf95,  (q15_t)0xf8f,  (q15_t)0xf88,  (q15_t)0xf82,  (q15_t)0xf7c,\n    (q15_t)0xf76,  (q15_t)0xf6f,  (q15_t)0xf69,  (q15_t)0xf63,  (q15_t)0xf5d,\n    (q15_t)0xf56,  (q15_t)0xf50,  (q15_t)0xf4a,  (q15_t)0xf44,  (q15_t)0xf3e,\n    (q15_t)0xf37,  (q15_t)0xf31,  (q15_t)0xf2b,  (q15_t)0xf25,  (q15_t)0xf1e,\n    (q15_t)0xf18,  (q15_t)0xf12,  (q15_t)0xf0c,  (q15_t)0xf05,  (q15_t)0xeff,\n    (q15_t)0xef9,  (q15_t)0xef3,  (q15_t)0xeec,  (q15_t)0xee6,  (q15_t)0xee0,\n    (q15_t)0xeda,  (q15_t)0xed3,  (q15_t)0xecd,  (q15_t)0xec7,  (q15_t)0xec1,\n    (q15_t)0xeba,  (q15_t)0xeb4,  (q15_t)0xeae,  (q15_t)0xea8,  (q15_t)0xea1,\n    (q15_t)0xe9b,  (q15_t)0xe95,  (q15_t)0xe8f,  (q15_t)0xe89,  (q15_t)0xe82,\n    (q15_t)0xe7c,  (q15_t)0xe76,  (q15_t)0xe70,  (q15_t)0xe69,  (q15_t)0xe63,\n    (q15_t)0xe5d,  (q15_t)0xe57,  (q15_t)0xe50,  (q15_t)0xe4a,  (q15_t)0xe44,\n    (q15_t)0xe3e,  (q15_t)0xe37,  (q15_t)0xe31,  (q15_t)0xe2b,  (q15_t)0xe25,\n    (q15_t)0xe1e,  (q15_t)0xe18,  (q15_t)0xe12,  (q15_t)0xe0c,  (q15_t)0xe05,\n    (q15_t)0xdff,  (q15_t)0xdf9,  (q15_t)0xdf3,  (q15_t)0xdec,  (q15_t)0xde6,\n    (q15_t)0xde0,  (q15_t)0xdda,  (q15_t)0xdd3,  (q15_t)0xdcd,  (q15_t)0xdc7,\n    (q15_t)0xdc1,  (q15_t)0xdba,  (q15_t)0xdb4,  (q15_t)0xdae,  (q15_t)0xda8,\n    (q15_t)0xda1,  (q15_t)0xd9b,  (q15_t)0xd95,  (q15_t)0xd8f,  (q15_t)0xd88,\n    (q15_t)0xd82,  (q15_t)0xd7c,  (q15_t)0xd76,  (q15_t)0xd6f,  (q15_t)0xd69,\n    (q15_t)0xd63,  (q15_t)0xd5d,  (q15_t)0xd56,  (q15_t)0xd50,  (q15_t)0xd4a,\n    (q15_t)0xd44,  (q15_t)0xd3d,  (q15_t)0xd37,  (q15_t)0xd31,  (q15_t)0xd2b,\n    (q15_t)0xd24,  (q15_t)0xd1e,  (q15_t)0xd18,  (q15_t)0xd12,  (q15_t)0xd0b,\n    (q15_t)0xd05,  (q15_t)0xcff,  (q15_t)0xcf9,  (q15_t)0xcf2,  (q15_t)0xcec,\n    (q15_t)0xce6,  (q15_t)0xce0,  (q15_t)0xcd9,  (q15_t)0xcd3,  (q15_t)0xccd,\n    (q15_t)0xcc7,  (q15_t)0xcc0,  (q15_t)0xcba,  (q15_t)0xcb4,  (q15_t)0xcae,\n    (q15_t)0xca7,  (q15_t)0xca1,  (q15_t)0xc9b,  (q15_t)0xc95,  (q15_t)0xc8e,\n    (q15_t)0xc88,  (q15_t)0xc82,  (q15_t)0xc7c,  (q15_t)0xc75,  (q15_t)0xc6f,\n    (q15_t)0xc69,  (q15_t)0xc63,  (q15_t)0xc5c,  (q15_t)0xc56,  (q15_t)0xc50,\n    (q15_t)0xc4a,  (q15_t)0xc43,  (q15_t)0xc3d,  (q15_t)0xc37,  (q15_t)0xc31,\n    (q15_t)0xc2a,  (q15_t)0xc24,  (q15_t)0xc1e,  (q15_t)0xc18,  (q15_t)0xc11,\n    (q15_t)0xc0b,  (q15_t)0xc05,  (q15_t)0xbff,  (q15_t)0xbf8,  (q15_t)0xbf2,\n    (q15_t)0xbec,  (q15_t)0xbe6,  (q15_t)0xbdf,  (q15_t)0xbd9,  (q15_t)0xbd3,\n    (q15_t)0xbcd,  (q15_t)0xbc6,  (q15_t)0xbc0,  (q15_t)0xbba,  (q15_t)0xbb4,\n    (q15_t)0xbad,  (q15_t)0xba7,  (q15_t)0xba1,  (q15_t)0xb9b,  (q15_t)0xb94,\n    (q15_t)0xb8e,  (q15_t)0xb88,  (q15_t)0xb81,  (q15_t)0xb7b,  (q15_t)0xb75,\n    (q15_t)0xb6f,  (q15_t)0xb68,  (q15_t)0xb62,  (q15_t)0xb5c,  (q15_t)0xb56,\n    (q15_t)0xb4f,  (q15_t)0xb49,  (q15_t)0xb43,  (q15_t)0xb3d,  (q15_t)0xb36,\n    (q15_t)0xb30,  (q15_t)0xb2a,  (q15_t)0xb24,  (q15_t)0xb1d,  (q15_t)0xb17,\n    (q15_t)0xb11,  (q15_t)0xb0b,  (q15_t)0xb04,  (q15_t)0xafe,  (q15_t)0xaf8,\n    (q15_t)0xaf2,  (q15_t)0xaeb,  (q15_t)0xae5,  (q15_t)0xadf,  (q15_t)0xad8,\n    (q15_t)0xad2,  (q15_t)0xacc,  (q15_t)0xac6,  (q15_t)0xabf,  (q15_t)0xab9,\n    (q15_t)0xab3,  (q15_t)0xaad,  (q15_t)0xaa6,  (q15_t)0xaa0,  (q15_t)0xa9a,\n    (q15_t)0xa94,  (q15_t)0xa8d,  (q15_t)0xa87,  (q15_t)0xa81,  (q15_t)0xa7b,\n    (q15_t)0xa74,  (q15_t)0xa6e,  (q15_t)0xa68,  (q15_t)0xa62,  (q15_t)0xa5b,\n    (q15_t)0xa55,  (q15_t)0xa4f,  (q15_t)0xa48,  (q15_t)0xa42,  (q15_t)0xa3c,\n    (q15_t)0xa36,  (q15_t)0xa2f,  (q15_t)0xa29,  (q15_t)0xa23,  (q15_t)0xa1d,\n    (q15_t)0xa16,  (q15_t)0xa10,  (q15_t)0xa0a,  (q15_t)0xa04,  (q15_t)0x9fd,\n    (q15_t)0x9f7,  (q15_t)0x9f1,  (q15_t)0x9eb,  (q15_t)0x9e4,  (q15_t)0x9de,\n    (q15_t)0x9d8,  (q15_t)0x9d1,  (q15_t)0x9cb,  (q15_t)0x9c5,  (q15_t)0x9bf,\n    (q15_t)0x9b8,  (q15_t)0x9b2,  (q15_t)0x9ac,  (q15_t)0x9a6,  (q15_t)0x99f,\n    (q15_t)0x999,  (q15_t)0x993,  (q15_t)0x98d,  (q15_t)0x986,  (q15_t)0x980,\n    (q15_t)0x97a,  (q15_t)0x973,  (q15_t)0x96d,  (q15_t)0x967,  (q15_t)0x961,\n    (q15_t)0x95a,  (q15_t)0x954,  (q15_t)0x94e,  (q15_t)0x948,  (q15_t)0x941,\n    (q15_t)0x93b,  (q15_t)0x935,  (q15_t)0x92f,  (q15_t)0x928,  (q15_t)0x922,\n    (q15_t)0x91c,  (q15_t)0x915,  (q15_t)0x90f,  (q15_t)0x909,  (q15_t)0x903,\n    (q15_t)0x8fc,  (q15_t)0x8f6,  (q15_t)0x8f0,  (q15_t)0x8ea,  (q15_t)0x8e3,\n    (q15_t)0x8dd,  (q15_t)0x8d7,  (q15_t)0x8d1,  (q15_t)0x8ca,  (q15_t)0x8c4,\n    (q15_t)0x8be,  (q15_t)0x8b7,  (q15_t)0x8b1,  (q15_t)0x8ab,  (q15_t)0x8a5,\n    (q15_t)0x89e,  (q15_t)0x898,  (q15_t)0x892,  (q15_t)0x88c,  (q15_t)0x885,\n    (q15_t)0x87f,  (q15_t)0x879,  (q15_t)0x872,  (q15_t)0x86c,  (q15_t)0x866,\n    (q15_t)0x860,  (q15_t)0x859,  (q15_t)0x853,  (q15_t)0x84d,  (q15_t)0x847,\n    (q15_t)0x840,  (q15_t)0x83a,  (q15_t)0x834,  (q15_t)0x82e,  (q15_t)0x827,\n    (q15_t)0x821,  (q15_t)0x81b,  (q15_t)0x814,  (q15_t)0x80e,  (q15_t)0x808,\n    (q15_t)0x802,  (q15_t)0x7fb,  (q15_t)0x7f5,  (q15_t)0x7ef,  (q15_t)0x7e9,\n    (q15_t)0x7e2,  (q15_t)0x7dc,  (q15_t)0x7d6,  (q15_t)0x7cf,  (q15_t)0x7c9,\n    (q15_t)0x7c3,  (q15_t)0x7bd,  (q15_t)0x7b6,  (q15_t)0x7b0,  (q15_t)0x7aa,\n    (q15_t)0x7a4,  (q15_t)0x79d,  (q15_t)0x797,  (q15_t)0x791,  (q15_t)0x78a,\n    (q15_t)0x784,  (q15_t)0x77e,  (q15_t)0x778,  (q15_t)0x771,  (q15_t)0x76b,\n    (q15_t)0x765,  (q15_t)0x75f,  (q15_t)0x758,  (q15_t)0x752,  (q15_t)0x74c,\n    (q15_t)0x745,  (q15_t)0x73f,  (q15_t)0x739,  (q15_t)0x733,  (q15_t)0x72c,\n    (q15_t)0x726,  (q15_t)0x720,  (q15_t)0x71a,  (q15_t)0x713,  (q15_t)0x70d,\n    (q15_t)0x707,  (q15_t)0x700,  (q15_t)0x6fa,  (q15_t)0x6f4,  (q15_t)0x6ee,\n    (q15_t)0x6e7,  (q15_t)0x6e1,  (q15_t)0x6db,  (q15_t)0x6d5,  (q15_t)0x6ce,\n    (q15_t)0x6c8,  (q15_t)0x6c2,  (q15_t)0x6bb,  (q15_t)0x6b5,  (q15_t)0x6af,\n    (q15_t)0x6a9,  (q15_t)0x6a2,  (q15_t)0x69c,  (q15_t)0x696,  (q15_t)0x690,\n    (q15_t)0x689,  (q15_t)0x683,  (q15_t)0x67d,  (q15_t)0x676,  (q15_t)0x670,\n    (q15_t)0x66a,  (q15_t)0x664,  (q15_t)0x65d,  (q15_t)0x657,  (q15_t)0x651,\n    (q15_t)0x64a,  (q15_t)0x644,  (q15_t)0x63e,  (q15_t)0x638,  (q15_t)0x631,\n    (q15_t)0x62b,  (q15_t)0x625,  (q15_t)0x61f,  (q15_t)0x618,  (q15_t)0x612,\n    (q15_t)0x60c,  (q15_t)0x605,  (q15_t)0x5ff,  (q15_t)0x5f9,  (q15_t)0x5f3,\n    (q15_t)0x5ec,  (q15_t)0x5e6,  (q15_t)0x5e0,  (q15_t)0x5da,  (q15_t)0x5d3,\n    (q15_t)0x5cd,  (q15_t)0x5c7,  (q15_t)0x5c0,  (q15_t)0x5ba,  (q15_t)0x5b4,\n    (q15_t)0x5ae,  (q15_t)0x5a7,  (q15_t)0x5a1,  (q15_t)0x59b,  (q15_t)0x594,\n    (q15_t)0x58e,  (q15_t)0x588,  (q15_t)0x582,  (q15_t)0x57b,  (q15_t)0x575,\n    (q15_t)0x56f,  (q15_t)0x569,  (q15_t)0x562,  (q15_t)0x55c,  (q15_t)0x556,\n    (q15_t)0x54f,  (q15_t)0x549,  (q15_t)0x543,  (q15_t)0x53d,  (q15_t)0x536,\n    (q15_t)0x530,  (q15_t)0x52a,  (q15_t)0x523,  (q15_t)0x51d,  (q15_t)0x517,\n    (q15_t)0x511,  (q15_t)0x50a,  (q15_t)0x504,  (q15_t)0x4fe,  (q15_t)0x4f8,\n    (q15_t)0x4f1,  (q15_t)0x4eb,  (q15_t)0x4e5,  (q15_t)0x4de,  (q15_t)0x4d8,\n    (q15_t)0x4d2,  (q15_t)0x4cc,  (q15_t)0x4c5,  (q15_t)0x4bf,  (q15_t)0x4b9,\n    (q15_t)0x4b2,  (q15_t)0x4ac,  (q15_t)0x4a6,  (q15_t)0x4a0,  (q15_t)0x499,\n    (q15_t)0x493,  (q15_t)0x48d,  (q15_t)0x487,  (q15_t)0x480,  (q15_t)0x47a,\n    (q15_t)0x474,  (q15_t)0x46d,  (q15_t)0x467,  (q15_t)0x461,  (q15_t)0x45b,\n    (q15_t)0x454,  (q15_t)0x44e,  (q15_t)0x448,  (q15_t)0x441,  (q15_t)0x43b,\n    (q15_t)0x435,  (q15_t)0x42f,  (q15_t)0x428,  (q15_t)0x422,  (q15_t)0x41c,\n    (q15_t)0x415,  (q15_t)0x40f,  (q15_t)0x409,  (q15_t)0x403,  (q15_t)0x3fc,\n    (q15_t)0x3f6,  (q15_t)0x3f0,  (q15_t)0x3ea,  (q15_t)0x3e3,  (q15_t)0x3dd,\n    (q15_t)0x3d7,  (q15_t)0x3d0,  (q15_t)0x3ca,  (q15_t)0x3c4,  (q15_t)0x3be,\n    (q15_t)0x3b7,  (q15_t)0x3b1,  (q15_t)0x3ab,  (q15_t)0x3a4,  (q15_t)0x39e,\n    (q15_t)0x398,  (q15_t)0x392,  (q15_t)0x38b,  (q15_t)0x385,  (q15_t)0x37f,\n    (q15_t)0x378,  (q15_t)0x372,  (q15_t)0x36c,  (q15_t)0x366,  (q15_t)0x35f,\n    (q15_t)0x359,  (q15_t)0x353,  (q15_t)0x34c,  (q15_t)0x346,  (q15_t)0x340,\n    (q15_t)0x33a,  (q15_t)0x333,  (q15_t)0x32d,  (q15_t)0x327,  (q15_t)0x321,\n    (q15_t)0x31a,  (q15_t)0x314,  (q15_t)0x30e,  (q15_t)0x307,  (q15_t)0x301,\n    (q15_t)0x2fb,  (q15_t)0x2f5,  (q15_t)0x2ee,  (q15_t)0x2e8,  (q15_t)0x2e2,\n    (q15_t)0x2db,  (q15_t)0x2d5,  (q15_t)0x2cf,  (q15_t)0x2c9,  (q15_t)0x2c2,\n    (q15_t)0x2bc,  (q15_t)0x2b6,  (q15_t)0x2af,  (q15_t)0x2a9,  (q15_t)0x2a3,\n    (q15_t)0x29d,  (q15_t)0x296,  (q15_t)0x290,  (q15_t)0x28a,  (q15_t)0x283,\n    (q15_t)0x27d,  (q15_t)0x277,  (q15_t)0x271,  (q15_t)0x26a,  (q15_t)0x264,\n    (q15_t)0x25e,  (q15_t)0x258,  (q15_t)0x251,  (q15_t)0x24b,  (q15_t)0x245,\n    (q15_t)0x23e,  (q15_t)0x238,  (q15_t)0x232,  (q15_t)0x22c,  (q15_t)0x225,\n    (q15_t)0x21f,  (q15_t)0x219,  (q15_t)0x212,  (q15_t)0x20c,  (q15_t)0x206,\n    (q15_t)0x200,  (q15_t)0x1f9,  (q15_t)0x1f3,  (q15_t)0x1ed,  (q15_t)0x1e6,\n    (q15_t)0x1e0,  (q15_t)0x1da,  (q15_t)0x1d4,  (q15_t)0x1cd,  (q15_t)0x1c7,\n    (q15_t)0x1c1,  (q15_t)0x1ba,  (q15_t)0x1b4,  (q15_t)0x1ae,  (q15_t)0x1a8,\n    (q15_t)0x1a1,  (q15_t)0x19b,  (q15_t)0x195,  (q15_t)0x18e,  (q15_t)0x188,\n    (q15_t)0x182,  (q15_t)0x17c,  (q15_t)0x175,  (q15_t)0x16f,  (q15_t)0x169,\n    (q15_t)0x162,  (q15_t)0x15c,  (q15_t)0x156,  (q15_t)0x150,  (q15_t)0x149,\n    (q15_t)0x143,  (q15_t)0x13d,  (q15_t)0x137,  (q15_t)0x130,  (q15_t)0x12a,\n    (q15_t)0x124,  (q15_t)0x11d,  (q15_t)0x117,  (q15_t)0x111,  (q15_t)0x10b,\n    (q15_t)0x104,  (q15_t)0xfe,   (q15_t)0xf8,   (q15_t)0xf1,   (q15_t)0xeb,\n    (q15_t)0xe5,   (q15_t)0xdf,   (q15_t)0xd8,   (q15_t)0xd2,   (q15_t)0xcc,\n    (q15_t)0xc5,   (q15_t)0xbf,   (q15_t)0xb9,   (q15_t)0xb3,   (q15_t)0xac,\n    (q15_t)0xa6,   (q15_t)0xa0,   (q15_t)0x99,   (q15_t)0x93,   (q15_t)0x8d,\n    (q15_t)0x87,   (q15_t)0x80,   (q15_t)0x7a,   (q15_t)0x74,   (q15_t)0x6d,\n    (q15_t)0x67,   (q15_t)0x61,   (q15_t)0x5b,   (q15_t)0x54,   (q15_t)0x4e,\n    (q15_t)0x48,   (q15_t)0x41,   (q15_t)0x3b,   (q15_t)0x35,   (q15_t)0x2f,\n    (q15_t)0x28,   (q15_t)0x22,   (q15_t)0x1c,   (q15_t)0x15,   (q15_t)0xf,\n    (q15_t)0x9,    (q15_t)0x3};\n\n/**\n  @} end of DCT4_IDCT4_Table group\n */\n\n/**\n  @addtogroup DCT4_IDCT4\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 DCT4/IDCT4.\n  @param[in,out] S         points to an instance of Q15 DCT4/IDCT4 structure\n  @param[in]     S_RFFT    points to an instance of Q15 RFFT/RIFFT structure\n  @param[in]     S_CFFT    points to an instance of Q15 CFFT/CIFFT structure\n  @param[in]     N          length of the DCT4\n  @param[in]     Nby2       half of the length of the DCT4\n  @param[in]     normalize  normalizing factor\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : N is not a\n  supported transform length\n\n  @par           Normalizing factor\n                   The normalizing factor is sqrt(2/N), which\n  depends on the size of transform N. Normalizing factors in 1.15\n  format are mentioned in the table below for different DCT sizes:\n\n                   \\image html dct4NormalizingQ15Table.gif\n */\n\narm_status arm_dct4_init_q15(arm_dct4_instance_q15 *S,\n                             arm_rfft_instance_q15 *S_RFFT,\n                             arm_cfft_radix4_instance_q15 *S_CFFT, uint16_t N,\n                             uint16_t Nby2, q15_t normalize) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /* Initializing the pointer array with the weight table base addresses of\n   * different lengths */\n  q15_t *twiddlePtr[4] = {(q15_t *)WeightsQ15_128, (q15_t *)WeightsQ15_512,\n                          (q15_t *)WeightsQ15_2048, (q15_t *)WeightsQ15_8192};\n\n  /* Initializing the pointer array with the cos factor table base addresses of\n   * different lengths */\n  q15_t *pCosFactor[4] = {\n      (q15_t *)cos_factorsQ15_128, (q15_t *)cos_factorsQ15_512,\n      (q15_t *)cos_factorsQ15_2048, (q15_t *)cos_factorsQ15_8192};\n\n  /* Initialize the DCT4 length */\n  S->N = N;\n\n  /* Initialize the half of DCT4 length */\n  S->Nby2 = Nby2;\n\n  /* Initialize the DCT4 Normalizing factor */\n  S->normalize = normalize;\n\n  /* Initialize Real FFT Instance */\n  S->pRfft = S_RFFT;\n\n  /* Initialize Complex FFT Instance */\n  S->pCfft = S_CFFT;\n\n  switch (N) {\n    /* Initialize the table modifier values */\n  case 8192U:\n    S->pTwiddle = twiddlePtr[3];\n    S->pCosFactor = pCosFactor[3];\n    break;\n  case 2048U:\n    S->pTwiddle = twiddlePtr[2];\n    S->pCosFactor = pCosFactor[2];\n    break;\n  case 512U:\n    S->pTwiddle = twiddlePtr[1];\n    S->pCosFactor = pCosFactor[1];\n    break;\n  case 128U:\n    S->pTwiddle = twiddlePtr[0];\n    S->pCosFactor = pCosFactor[0];\n    break;\n  default:\n    status = ARM_MATH_ARGUMENT_ERROR;\n  }\n\n  /* Initialize the RFFT/RIFFT */\n  arm_rfft_init_q15(S->pRfft, S->N, 0U, 1U);\n\n  /* return the status of DCT4 Init function */\n  return (status);\n}\n\n/**\n  @} end of DCT4_IDCT4 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_dct4_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dct4_init_q31.c\n * Description:  Initialization function of DCT-4 & IDCT4 Q31\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup DCT4_IDCT4\n */\n\n/**\n  @addtogroup DCT4_IDCT4_Table DCT Type IV Tables\n  @{\n */\n\n/**\n  @brief  Weights Table\n */\n\n/**\n  @par\n  Weights tables are generated using the formula : 
weights[n] =\n  e^(-j*n*pi/(2*N))
\n  @par\n  C command to generate the table\n  
\n  for (i = 0; i< N; i++)\n  {\n    weights[(2*i)]   =  cos(i*c);\n    weights[(2*i)+1] = -sin(i*c);\n  } 
\n  @par\n  where N is the Number of weights to be calculated and\n  c is pi/(2*N)\n  @par\n  Convert the output to q31 format by multiplying with 2^31 and saturated if\n  required.\n  @par\n  In the tables below the real and imaginary values are placed alternatively,\n  hence the array length is 2*N.\n */\n\nstatic const q31_t WeightsQ31_128[256] = {\n    (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0,\n    (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3,\n    (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fc25596, (q31_t)0xf826a462,\n    (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f872bf3, (q31_t)0xf50497fb,\n    (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c,\n    (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31,\n    (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e5fe493, (q31_t)0xebaa894f,\n    (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7dd6668f, (q31_t)0xe8922622,\n    (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d3980ec, (q31_t)0xe57d5fda,\n    (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7c894bde, (q31_t)0xe26cb01b,\n    (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7bc5e290, (q31_t)0xdf608fe4,\n    (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7aef6323, (q31_t)0xdc597781,\n    (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a05eead, (q31_t)0xd957de7a,\n    (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x7909a92d, (q31_t)0xd65c3b7b,\n    (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x77fab989, (q31_t)0xd3670446,\n    (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x76d94989, (q31_t)0xd078ad9e,\n    (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x75a585cf, (q31_t)0xcd91ab39,\n    (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x745f9dd1, (q31_t)0xcab26fa9,\n    (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x7307c3d0, (q31_t)0xc7db6c50,\n    (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x719e2cd2, (q31_t)0xc50d1149,\n    (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x7023109a, (q31_t)0xc247cd5a,\n    (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3,\n    (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb,\n    (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6b4af279, (q31_t)0xba32ca71,\n    (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x698c246c, (q31_t)0xb796199b,\n    (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x67bd0fbd, (q31_t)0xb5049368,\n    (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c,\n    (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x63ef3290, (q31_t)0xb0049ab3,\n    (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x61f1003f, (q31_t)0xad96ed92,\n    (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5,\n    (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5dc79d7c, (q31_t)0xa8e21106,\n    (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5b9d1154, (q31_t)0xa69b9b68,\n    (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x59646498, (q31_t)0xa462eeac,\n    (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x571deefa, (q31_t)0xa2386284,\n    (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73,\n    (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x5269126e, (q31_t)0x9e0effc1,\n    (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x4ffb654d, (q31_t)0x9c10cd70,\n    (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4d8162c4, (q31_t)0x9a22042d,\n    (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4afb6c98, (q31_t)0x9842f043,\n    (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4869e665, (q31_t)0x9673db94,\n    (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x45cd358f, (q31_t)0x94b50d87,\n    (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4325c135, (q31_t)0x9306cb04,\n    (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4073f21d, (q31_t)0x91695663,\n    (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3db832a6, (q31_t)0x8fdcef66,\n    (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e,\n    (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x382493b0, (q31_t)0x8cf83c30,\n    (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x354d9057, (q31_t)0x8ba0622f,\n    (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x326e54c7, (q31_t)0x8a5a7a31,\n    (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x2f875262, (q31_t)0x8926b677,\n    (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2c98fbba, (q31_t)0x88054677,\n    (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x29a3c485, (q31_t)0x86f656d3,\n    (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x26a82186, (q31_t)0x85fa1153,\n    (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x23a6887f, (q31_t)0x85109cdd,\n    (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x209f701c, (q31_t)0x843a1d70,\n    (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1d934fe5, (q31_t)0x8376b422,\n    (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1a82a026, (q31_t)0x82c67f14,\n    (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x176dd9de, (q31_t)0x82299971,\n    (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x145576b1, (q31_t)0x81a01b6d,\n    (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a,\n    (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a,\n    (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0afb6805, (q31_t)0x8078d40d,\n    (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x07d95b9e, (q31_t)0x803daa6a,\n    (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x04b6195d, (q31_t)0x80163440,\n    (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x01921d20, (q31_t)0x800277a6};\n\nstatic const q31_t WeightsQ31_512[1024] = {\n    (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffd886, (q31_t)0xff9b781d,\n    (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f,\n    (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffc250f, (q31_t)0xfe095d69,\n    (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff871a2, (q31_t)0xfd40565c,\n    (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff38274, (q31_t)0xfc775616,\n    (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fed5791, (q31_t)0xfbae5e89,\n    (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe5f108, (q31_t)0xfae571a4,\n    (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157,\n    (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd37153, (q31_t)0xf953bf91,\n    (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fc85854, (q31_t)0xf88afe42,\n    (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fbc040a, (q31_t)0xf7c24f59,\n    (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6,\n    (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f9faa15, (q31_t)0xf6313077,\n    (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b,\n    (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f7e648c, (q31_t)0xf4a07261,\n    (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77,\n    (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5834b7, (q31_t)0xf310248a,\n    (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f434563, (q31_t)0xf2482c8a,\n    (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f2d1c0e, (q31_t)0xf1805662,\n    (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401,\n    (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7efd1c3c, (q31_t)0xeff11753,\n    (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7ee34636, (q31_t)0xef29b243,\n    (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ec8371a, (q31_t)0xee6276bf,\n    (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eabef2c, (q31_t)0xed9b66b2,\n    (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e8e6eb2, (q31_t)0xecd48407,\n    (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8,\n    (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e4fc53e, (q31_t)0xeb474e81,\n    (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a,\n    (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d,\n    (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7de8a670, (q31_t)0xe8f50273,\n    (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dc3d90d, (q31_t)0xe82f5844,\n    (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8,\n    (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d769bb5, (q31_t)0xe6a4b616,\n    (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5,\n    (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d24881b, (q31_t)0xe51b0e2a,\n    (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb,\n    (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ccda169, (q31_t)0xe3926fad,\n    (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3,\n    (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1,\n    (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c4242f2, (q31_t)0xe14794ba,\n    (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c116853, (q31_t)0xe0848b7f,\n    (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3,\n    (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bac1d31, (q31_t)0xdeff63f4,\n    (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b77ada8, (q31_t)0xde3d4964,\n    (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b420d7a, (q31_t)0xdd7b8220,\n    (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008,\n    (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8,\n    (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd,\n    (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63,\n    (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a24256f, (q31_t)0xd9b7c094,\n    (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79e76ca7, (q31_t)0xd8f81439,\n    (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79a98715, (q31_t)0xd838c82d,\n    (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x796a7554, (q31_t)0xd779de47,\n    (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x792a37fe, (q31_t)0xd6bb585e,\n    (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848,\n    (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78a63d11, (q31_t)0xd53f7fda,\n    (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x786280bf, (q31_t)0xd48230e9,\n    (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x781d9b65, (q31_t)0xd3c54d47,\n    (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77d78daa, (q31_t)0xd308d6c7,\n    (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x7790583e, (q31_t)0xd24ccf39,\n    (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x7747fbce, (q31_t)0xd191386e,\n    (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x76fe790e, (q31_t)0xd0d61434,\n    (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76b3d0b4, (q31_t)0xd01b6459,\n    (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x76680376, (q31_t)0xcf612aaa,\n    (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x761b1211, (q31_t)0xcea768f2,\n    (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ccfd42, (q31_t)0xcdee20fc,\n    (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x757dc5ca, (q31_t)0xcd355491,\n    (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x752d6c6c, (q31_t)0xcc7d0578,\n    (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74dbf1ef, (q31_t)0xcbc53579,\n    (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x7489571c, (q31_t)0xcb0de658,\n    (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74359cbd, (q31_t)0xca5719db,\n    (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5,\n    (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6,\n    (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x7333b883, (q31_t)0xc835d5d0,\n    (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72db8828, (q31_t)0xc7812572,\n    (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72823c67, (q31_t)0xc6cd0079,\n    (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7227d61c, (q31_t)0xc61968a2,\n    (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71cc5626, (q31_t)0xc5665fa9,\n    (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x716fbd68, (q31_t)0xc4b3e746,\n    (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71120cc5, (q31_t)0xc4020133,\n    (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70b34525, (q31_t)0xc350af26,\n    (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70536771, (q31_t)0xc29ff2d4,\n    (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6ff27497, (q31_t)0xc1efcdf3,\n    (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6f906d84, (q31_t)0xc1404233,\n    (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f2d532c, (q31_t)0xc0915148,\n    (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf,\n    (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e63e87f, (q31_t)0xbf3546a8,\n    (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f,\n    (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6d963c54, (q31_t)0xbddbbb7f,\n    (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2,\n    (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cc45698, (q31_t)0xbc84bd1f,\n    (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd,\n    (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6bee3f62, (q31_t)0xbb3058c0,\n    (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6b81a3cd, (q31_t)0xba87246d,\n    (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b13fef5, (q31_t)0xb9de9b83,\n    (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6aa551e9, (q31_t)0xb936bfa4,\n    (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a359db9, (q31_t)0xb88f926d,\n    (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69c4e37a, (q31_t)0xb7e9157a,\n    (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x69532442, (q31_t)0xb7434a67,\n    (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x68e06129, (q31_t)0xb69e32cd,\n    (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x686c9b4b, (q31_t)0xb5f9d043,\n    (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x67f7d3c5, (q31_t)0xb556245e,\n    (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67820bb7, (q31_t)0xb4b330b3,\n    (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x670b4444, (q31_t)0xb410f6d3,\n    (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66937e91, (q31_t)0xb36f784f,\n    (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5,\n    (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65a0fd0b, (q31_t)0xb22eb392,\n    (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x6526438f, (q31_t)0xb18f7071,\n    (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64aa907f, (q31_t)0xb0f0eeda,\n    (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x642de50d, (q31_t)0xb0533055,\n    (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63b0426d, (q31_t)0xafb63667,\n    (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x6331a9d4, (q31_t)0xaf1a0293,\n    (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62b21c7b, (q31_t)0xae7e965b,\n    (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x62319b9d, (q31_t)0xade3f33e,\n    (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61b02876, (q31_t)0xad4a1aba,\n    (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x612dc447, (q31_t)0xacb10e4b,\n    (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60aa7050, (q31_t)0xac18cf69,\n    (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x60262dd6, (q31_t)0xab815f8d,\n    (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c,\n    (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba,\n    (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8,\n    (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e0bec6e, (q31_t)0xa92bd367,\n    (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5d8314b1, (q31_t)0xa8988463,\n    (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5cf95638, (q31_t)0xa8060d08,\n    (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5c6eb258, (q31_t)0xa7746ec0,\n    (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2,\n    (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b56bfbd, (q31_t)0xa653c303,\n    (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5ac973b5, (q31_t)0xa5c4b855,\n    (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b,\n    (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59ac3cfd, (q31_t)0xa4a94043,\n    (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x591c550e, (q31_t)0xa41cd599,\n    (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x588b9140, (q31_t)0xa3914da8,\n    (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8,\n    (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x57677b9d, (q31_t)0xa27ceb4f,\n    (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x56d42c99, (q31_t)0xa1f41392,\n    (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x56400758, (q31_t)0xa16c23e1,\n    (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c,\n    (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x55153fd4, (q31_t)0xa05f01e1,\n    (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x547ea073, (q31_t)0x9fd9d22a,\n    (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x53e73097, (q31_t)0x9f558fb0,\n    (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9,\n    (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52b5e546, (q31_t)0x9e4fd78a,\n    (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x521c0cc2, (q31_t)0x9dce6463,\n    (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x518169a5, (q31_t)0x9d4de385,\n    (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x50e5fd6d, (q31_t)0x9cce562c,\n    (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x5049c999, (q31_t)0x9c4fbd93,\n    (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4faccfab, (q31_t)0x9bd21af3,\n    (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f0f1126, (q31_t)0x9b556f81,\n    (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71,\n    (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5,\n    (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d31494b, (q31_t)0x99e5443b,\n    (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4c9087b1, (q31_t)0x996c816f,\n    (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4bef092d, (q31_t)0x98f4bbbc,\n    (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b4ccf4d, (q31_t)0x987df449,\n    (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4aa9dba2, (q31_t)0x98082c3b,\n    (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a062fbd, (q31_t)0x979364b5,\n    (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4961cd33, (q31_t)0x971f9ed7,\n    (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x48bcb599, (q31_t)0x96acdbbe,\n    (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4816ea86, (q31_t)0x963b1c86,\n    (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47706d93, (q31_t)0x95ca6247,\n    (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x46c9405c, (q31_t)0x955aae17,\n    (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x4621647d, (q31_t)0x94ec010b,\n    (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x4578db93, (q31_t)0x947e5c33,\n    (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x44cfa740, (q31_t)0x9411c09e,\n    (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4425c923, (q31_t)0x93a62f57,\n    (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x437b42e1, (q31_t)0x933ba968,\n    (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x42d0161e, (q31_t)0x92d22fd9,\n    (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x42244481, (q31_t)0x9269c3ac,\n    (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4177cfb1, (q31_t)0x920265e4,\n    (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x40cab958, (q31_t)0x919c1781,\n    (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x401d0321, (q31_t)0x9136d97d,\n    (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4,\n    (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3ebfbdcd, (q31_t)0x906f927c,\n    (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e10320d, (q31_t)0x900d8b69,\n    (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3d600d2c, (q31_t)0x8fac988f,\n    (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3caf50da, (q31_t)0x8f4cbadb,\n    (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b,\n    (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b4c18ba, (q31_t)0x8e904298,\n    (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3a99a057, (q31_t)0x8e33a9da,\n    (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x39e6975e, (q31_t)0x8dd829e4,\n    (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x3932ff87, (q31_t)0x8d7dc399,\n    (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x387eda8e, (q31_t)0x8d2477d8,\n    (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x37ca2a30, (q31_t)0x8ccc477d,\n    (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3714f02a, (q31_t)0x8c753362,\n    (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d,\n    (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35a8e625, (q31_t)0x8bca6343,\n    (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x34f219a8, (q31_t)0x8b76a8e4,\n    (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x343aca87, (q31_t)0x8b240e11,\n    (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x3382fa88, (q31_t)0x8ad29394,\n    (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x32caab6f, (q31_t)0x8a823a36,\n    (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x3211df04, (q31_t)0x8a3302be,\n    (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x3158970e, (q31_t)0x89e4edef,\n    (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x309ed556, (q31_t)0x8997fc8a,\n    (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c,\n    (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f29ebcc, (q31_t)0x890186f2,\n    (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2e6ec792, (q31_t)0x88b80432,\n    (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2db330c7, (q31_t)0x886fa7c2,\n    (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2cf72939, (q31_t)0x88287256,\n    (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b,\n    (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2b7dcf17, (q31_t)0x879d7f41,\n    (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2ac08026, (q31_t)0x8759c2ef,\n    (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a02c7b8, (q31_t)0x8717304e,\n    (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2944a7a2, (q31_t)0x86d5c802,\n    (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x288621b9, (q31_t)0x86958aac,\n    (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x27c737d3, (q31_t)0x865678eb,\n    (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x2707ebc7, (q31_t)0x86189359,\n    (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26483f6c, (q31_t)0x85dbda91,\n    (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x2588349d, (q31_t)0x85a04f28,\n    (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x24c7cd33, (q31_t)0x8565f1b0,\n    (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x24070b08, (q31_t)0x852cc2bb,\n    (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2345eff8, (q31_t)0x84f4c2d4,\n    (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22847de0, (q31_t)0x84bdf286,\n    (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x21c2b69c, (q31_t)0x84885258,\n    (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21009c0c, (q31_t)0x8453e2cf,\n    (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x203e300d, (q31_t)0x8420a46c,\n    (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1f7b7481, (q31_t)0x83ee97ad,\n    (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e,\n    (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1df5163f, (q31_t)0x838e1507,\n    (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d31774d, (q31_t)0x835fa00f,\n    (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1c6d9053, (q31_t)0x83325e97,\n    (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1ba96335, (q31_t)0x83065110,\n    (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5,\n    (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a203e1b, (q31_t)0x82b1d381,\n    (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x195b49ea, (q31_t)0x8289644b,\n    (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18961728, (q31_t)0x82622aa6,\n    (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x17d0a7bc, (q31_t)0x823c26f3,\n    (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x170afd8d, (q31_t)0x82175990,\n    (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16451a83, (q31_t)0x81f3c2d7,\n    (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x157f0086, (q31_t)0x81d16321,\n    (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x14b8b17f, (q31_t)0x81b03ac2,\n    (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x13f22f58, (q31_t)0x81904a0c,\n    (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x132b7bf9, (q31_t)0x8171914e,\n    (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1264994e, (q31_t)0x815410d4,\n    (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x119d8941, (q31_t)0x8137c8e6,\n    (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x10d64dbd, (q31_t)0x811cb9ca,\n    (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x100ee8ad, (q31_t)0x8102e3c4,\n    (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0f475bff, (q31_t)0x80ea4712,\n    (q31_t)0x0ee38766, (q31_t)0x80de6e4c, (q31_t)0x0e7fa99e, (q31_t)0x80d2e3f2,\n    (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a, (q31_t)0x0db7d376, (q31_t)0x80bcba9d,\n    (q31_t)0x0d53db92, (q31_t)0x80b21baf, (q31_t)0x0cefdb76, (q31_t)0x80a7cb49,\n    (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0c27c389, (q31_t)0x8094162c,\n    (q31_t)0x0bc3ac35, (q31_t)0x808ab180, (q31_t)0x0b5f8d9f, (q31_t)0x80819b74,\n    (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x0a973ba5, (q31_t)0x80705b50,\n    (q31_t)0x0a3308bd, (q31_t)0x80683143, (q31_t)0x09cecf89, (q31_t)0x806055eb,\n    (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x09064b3a, (q31_t)0x80518b6b,\n    (q31_t)0x08a2009a, (q31_t)0x804a9c4d, (q31_t)0x083db0a7, (q31_t)0x8043fbf6,\n    (q31_t)0x07d95b9e, (q31_t)0x803daa6a, (q31_t)0x077501be, (q31_t)0x8037a7ac,\n    (q31_t)0x0710a345, (q31_t)0x8031f3c2, (q31_t)0x06ac406f, (q31_t)0x802c8ead,\n    (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x05e36ea9, (q31_t)0x8022b114,\n    (q31_t)0x057f0035, (q31_t)0x801e3895, (q31_t)0x051a8e5c, (q31_t)0x801a0ef8,\n    (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x0451a177, (q31_t)0x8012a86f,\n    (q31_t)0x03ed26e6, (q31_t)0x800f6b88, (q31_t)0x0388a9ea, (q31_t)0x800c7d8c,\n    (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x02bfa9a4, (q31_t)0x80078e5e,\n    (q31_t)0x025b26d7, (q31_t)0x80058d2f, (q31_t)0x01f6a297, (q31_t)0x8003daf1,\n    (q31_t)0x01921d20, (q31_t)0x800277a6, (q31_t)0x012d96b1, (q31_t)0x8001634e,\n    (q31_t)0x00c90f88, (q31_t)0x80009dea, (q31_t)0x006487e3, (q31_t)0x8000277a};\n\nstatic const q31_t WeightsQ31_2048[4096] = {\n    (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffffd88, (q31_t)0xffe6de05,\n    (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7fffe9cb, (q31_t)0xffb49a12,\n    (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffc251, (q31_t)0xff82562c,\n    (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff8719, (q31_t)0xff501258,\n    (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff3824, (q31_t)0xff1dcea0,\n    (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a,\n    (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0,\n    (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffdd4d7, (q31_t)0xfe870467,\n    (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd36ee, (q31_t)0xfe54c169,\n    (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffc8549, (q31_t)0xfe227eac,\n    (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a,\n    (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18,\n    (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850,\n    (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff8f954, (q31_t)0xfd5976e9,\n    (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff7e500, (q31_t)0xfd2735ea,\n    (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c,\n    (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff58125, (q31_t)0xfcc2b545,\n    (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4319d, (q31_t)0xfc9075af,\n    (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0,\n    (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1575d, (q31_t)0xfc2bf821,\n    (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39,\n    (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0,\n    (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fec7c02, (q31_t)0xfb95404d,\n    (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feab61a, (q31_t)0xfb630459,\n    (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b,\n    (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b,\n    (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0,\n    (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3,\n    (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da,\n    (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fde7471, (q31_t)0xfa35ac9f,\n    (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdc247a, (q31_t)0xfa037648,\n    (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de,\n    (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd74964, (q31_t)0xf99f0c68,\n    (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed,\n    (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd21f72, (q31_t)0xf93aa676,\n    (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fcf6ce8, (q31_t)0xf908750a,\n    (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2,\n    (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574,\n    (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc6df08, (q31_t)0xf871e759,\n    (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc3dda9, (q31_t)0xf83fba68,\n    (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9,\n    (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423,\n    (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fba6357, (q31_t)0xf7a93ae0,\n    (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb7132b, (q31_t)0xf77712e5,\n    (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b,\n    (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb037bf, (q31_t)0xf712c6ea,\n    (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa,\n    (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071,\n    (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa55aee, (q31_t)0xf67c5f59,\n    (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8,\n    (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9dbaa0, (q31_t)0xf6182196,\n    (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc,\n    (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0,\n    (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f91b694, (q31_t)0xf581d07b,\n    (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4,\n    (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f895182, (q31_t)0xf51da273,\n    (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f850179, (q31_t)0xf4eb8def,\n    (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f809dc5, (q31_t)0xf4b97b21,\n    (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7c2668, (q31_t)0xf4876a10,\n    (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f779b62, (q31_t)0xf4555ac5,\n    (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f72fcb4, (q31_t)0xf4234d45,\n    (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a,\n    (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f698461, (q31_t)0xf3bf37cb,\n    (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0,\n    (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0,\n    (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5abc8a, (q31_t)0xf32925d3,\n    (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f55a7fa, (q31_t)0xf2f723c1,\n    (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f507fc7, (q31_t)0xf2c523b2,\n    (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4b43f2, (q31_t)0xf29325ad,\n    (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f45f47b, (q31_t)0xf26129ba,\n    (q31_t)0x7f434563, (q31_t)0xf2482c8a, (q31_t)0x7f409164, (q31_t)0xf22f2fe1,\n    (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829,\n    (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f359057, (q31_t)0xf1cb429a,\n    (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f2ff263, (q31_t)0xf1994f3d,\n    (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2a40d2, (q31_t)0xf1675e17,\n    (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f247ba5, (q31_t)0xf1356f32,\n    (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f1ea2dc, (q31_t)0xf1038295,\n    (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f18b679, (q31_t)0xf0d19848,\n    (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f12b67c, (q31_t)0xf09fb051,\n    (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba,\n    (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f067bba, (q31_t)0xf03be78a,\n    (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f0040f6, (q31_t)0xf00a06c8,\n    (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef9f29d, (q31_t)0xefd8287c,\n    (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef390ae, (q31_t)0xefa64cae,\n    (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eed1b2c, (q31_t)0xef747365,\n    (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee69217, (q31_t)0xef429caa,\n    (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7edff570, (q31_t)0xef10c883,\n    (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7ed94538, (q31_t)0xeedef6f9,\n    (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed28171, (q31_t)0xeead2813,\n    (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9,\n    (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec4bf36, (q31_t)0xee499253,\n    (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88,\n    (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb6aeca, (q31_t)0xede60780,\n    (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eaf8943, (q31_t)0xedb44642,\n    (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7ea85033, (q31_t)0xed8287d7,\n    (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea1039b, (q31_t)0xed50cc46,\n    (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e99a37c, (q31_t)0xed1f1396,\n    (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e922fd6, (q31_t)0xeced5dd0,\n    (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb,\n    (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e830dff, (q31_t)0xec89fb1e,\n    (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7b5fce, (q31_t)0xec584e41,\n    (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e739e1d, (q31_t)0xec26a46d,\n    (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8,\n    (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e63e03b, (q31_t)0xebc359fb,\n    (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5be40c, (q31_t)0xeb91b96c,\n    (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e53d462, (q31_t)0xeb601c04,\n    (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca,\n    (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e437a9c, (q31_t)0xeafceac6,\n    (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3b3083, (q31_t)0xeacb56ff,\n    (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e32d2f4, (q31_t)0xea99c67e,\n    (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2a61ed, (q31_t)0xea683949,\n    (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e21dd73, (q31_t)0xea36af69,\n    (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e194584, (q31_t)0xea0528e5,\n    (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5,\n    (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e07db52, (q31_t)0xe9a22610,\n    (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7dff0911, (q31_t)0xe970a9ce,\n    (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df62362, (q31_t)0xe93f3107,\n    (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2,\n    (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07,\n    (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7ddafdce, (q31_t)0xe8aadbde,\n    (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd1ca75, (q31_t)0xe879714d,\n    (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dc883b4, (q31_t)0xe8480a5d,\n    (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dbf298d, (q31_t)0xe816a716,\n    (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db5bc02, (q31_t)0xe7e5477f,\n    (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f,\n    (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da2a6c6, (q31_t)0xe782937e,\n    (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d98ff17, (q31_t)0xe7513f25,\n    (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d8f4409, (q31_t)0xe71fee99,\n    (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d85759f, (q31_t)0xe6eea1e4,\n    (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7b93da, (q31_t)0xe6bd590d,\n    (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d719eba, (q31_t)0xe68c141a,\n    (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d679642, (q31_t)0xe65ad315,\n    (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d5d7a74, (q31_t)0xe6299604,\n    (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d534b50, (q31_t)0xe5f85cef,\n    (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4908d9, (q31_t)0xe5c727dd,\n    (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7,\n    (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3449f5, (q31_t)0xe564c9e3,\n    (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d29cd8c, (q31_t)0xe533a10a,\n    (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53,\n    (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6,\n    (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d09e489, (q31_t)0xe4a03f69,\n    (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7cff1af5, (q31_t)0xe46f2745,\n    (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf43e1a, (q31_t)0xe43e1362,\n    (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6,\n    (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a,\n    (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd333f3, (q31_t)0xe3aaf184,\n    (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cc80a0f, (q31_t)0xe379eeed,\n    (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cbcccec, (q31_t)0xe348f0bd,\n    (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa,\n    (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7ca618f3, (q31_t)0xe2e701ac,\n    (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9aa221, (q31_t)0xe2b610da,\n    (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c8f1817, (q31_t)0xe285248d,\n    (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c837ad8, (q31_t)0xe2543ccc,\n    (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c77ca65, (q31_t)0xe223599e,\n    (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b,\n    (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c602fec, (q31_t)0xe1c1a11b,\n    (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c5445e9, (q31_t)0xe190cbd4,\n    (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f,\n    (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c3c3860, (q31_t)0xe12f2f63,\n    (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c3014de, (q31_t)0xe0fe6848,\n    (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c23de35, (q31_t)0xe0cda5f5,\n    (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c179467, (q31_t)0xe09ce871,\n    (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4,\n    (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7bfec765, (q31_t)0xe03b7bf6,\n    (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf24434, (q31_t)0xe00acd0e,\n    (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7be5ade6, (q31_t)0xdfda2314,\n    (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f,\n    (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bcc47fa, (q31_t)0xdf78de07,\n    (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bbf7860, (q31_t)0xdf484302,\n    (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a,\n    (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7ba59fee, (q31_t)0xdee71c24,\n    (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b989719, (q31_t)0xdeb69059,\n    (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b8b7b36, (q31_t)0xde8609b1,\n    (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b7e4c45, (q31_t)0xde558831,\n    (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b710a49, (q31_t)0xde250be3,\n    (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b63b543, (q31_t)0xddf494ce,\n    (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b564d36, (q31_t)0xddc422f8,\n    (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b48d225, (q31_t)0xdd93b66a,\n    (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b3b4410, (q31_t)0xdd634f2b,\n    (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43,\n    (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b1feee5, (q31_t)0xdd0290b8,\n    (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1227d3, (q31_t)0xdcd23993,\n    (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b044dc7, (q31_t)0xdca1e7da,\n    (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7af660c2, (q31_t)0xdc719b96,\n    (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ae860c7, (q31_t)0xdc4154cd,\n    (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7ada4dd8, (q31_t)0xdc111388,\n    (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd,\n    (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4,\n    (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7aafa367, (q31_t)0xdb807114,\n    (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa144bc, (q31_t)0xdb504626,\n    (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a92d329, (q31_t)0xdb2020e0,\n    (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a844eae, (q31_t)0xdaf00149,\n    (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a75b74f, (q31_t)0xdabfe76a,\n    (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a670d0d, (q31_t)0xda8fd349,\n    (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a584feb, (q31_t)0xda5fc4ef,\n    (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a497feb, (q31_t)0xda2fbc61,\n    (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9,\n    (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd,\n    (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4,\n    (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7,\n    (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79fe5539, (q31_t)0xd93fe9ab,\n    (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79ef1436, (q31_t)0xd910048a,\n    (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79dfc064, (q31_t)0xd8e0256a,\n    (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d059c8, (q31_t)0xd8b04c52,\n    (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c0e062, (q31_t)0xd880794b,\n    (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b15435, (q31_t)0xd850ac5a,\n    (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a1b545, (q31_t)0xd820e589,\n    (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x79920392, (q31_t)0xd7f124dd,\n    (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79823f20, (q31_t)0xd7c16a5f,\n    (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x797267f2, (q31_t)0xd791b616,\n    (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x79627e08, (q31_t)0xd7620808,\n    (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79528167, (q31_t)0xd732603f,\n    (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79427210, (q31_t)0xd702bec0,\n    (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79325006, (q31_t)0xd6d32393,\n    (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79221b4b, (q31_t)0xd6a38ec0,\n    (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7911d3e2, (q31_t)0xd674004e,\n    (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x790179cd, (q31_t)0xd6447844,\n    (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f10d0f, (q31_t)0xd614f6a9,\n    (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e08dab, (q31_t)0xd5e57b85,\n    (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78cffba3, (q31_t)0xd5b606e0,\n    (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78bf56f9, (q31_t)0xd58698c0,\n    (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78ae9fb0, (q31_t)0xd557312d,\n    (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x789dd5cb, (q31_t)0xd527d02e,\n    (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x788cf94c, (q31_t)0xd4f875ca,\n    (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x787c0a36, (q31_t)0xd4c92209,\n    (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x786b088c, (q31_t)0xd499d4f2,\n    (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x7859f44f, (q31_t)0xd46a8e8d,\n    (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x7848cd83, (q31_t)0xd43b4ee0,\n    (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x7837942b, (q31_t)0xd40c15f3,\n    (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x78264849, (q31_t)0xd3dce3cd,\n    (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x7814e9df, (q31_t)0xd3adb876,\n    (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780378f1, (q31_t)0xd37e93f4,\n    (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f1f581, (q31_t)0xd34f764f,\n    (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e05f91, (q31_t)0xd3205f8f,\n    (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77ceb725, (q31_t)0xd2f14fba,\n    (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8,\n    (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77ab2ee2, (q31_t)0xd29344f0,\n    (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77994f11, (q31_t)0xd2644a0a,\n    (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x77875cce, (q31_t)0xd235562b,\n    (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x7775581d, (q31_t)0xd206695d,\n    (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776340ff, (q31_t)0xd1d783a6,\n    (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x77511778, (q31_t)0xd1a8a50d,\n    (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x773edb8b, (q31_t)0xd179cd99,\n    (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x772c8d3a, (q31_t)0xd14afd52,\n    (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x771a2c88, (q31_t)0xd11c343f,\n    (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x7707b979, (q31_t)0xd0ed7267,\n    (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76f5340e, (q31_t)0xd0beb7d2,\n    (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e29c4b, (q31_t)0xd0900486,\n    (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76cff232, (q31_t)0xd061588b,\n    (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76bd35c7, (q31_t)0xd032b3e7,\n    (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76aa670d, (q31_t)0xd00416a3,\n    (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x76978605, (q31_t)0xcfd580c6,\n    (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768492b4, (q31_t)0xcfa6f255,\n    (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x76718d1c, (q31_t)0xcf786b5a,\n    (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x765e7540, (q31_t)0xcf49ebda,\n    (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x764b4b23, (q31_t)0xcf1b73de,\n    (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x76380ec8, (q31_t)0xceed036b,\n    (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x7624c031, (q31_t)0xcebe9a8a,\n    (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x76115f63, (q31_t)0xce903942,\n    (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x75fdec60, (q31_t)0xce61df99,\n    (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ea672a, (q31_t)0xce338d97,\n    (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75d6cfc5, (q31_t)0xce054343,\n    (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75c32634, (q31_t)0xcdd700a4,\n    (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1,\n    (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2,\n    (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x7587bc98, (q31_t)0xcd4c674d,\n    (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7573ca75, (q31_t)0xcd1e43ca,\n    (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x755fc635, (q31_t)0xccf0281f,\n    (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x754bafdc, (q31_t)0xccc21455,\n    (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x7537876c, (q31_t)0xcc940871,\n    (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x75234ce8, (q31_t)0xcc66047b,\n    (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x750f0054, (q31_t)0xcc38087b,\n    (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74faa1b3, (q31_t)0xcc0a1477,\n    (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74e63108, (q31_t)0xcbdc2876,\n    (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d1ae55, (q31_t)0xcbae447f,\n    (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74bd199f, (q31_t)0xcb80689a,\n    (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74a872e8, (q31_t)0xcb5294ce,\n    (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x7493ba34, (q31_t)0xcb24c921,\n    (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x747eef85, (q31_t)0xcaf7059a,\n    (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x746a12df, (q31_t)0xcac94a42,\n    (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74552446, (q31_t)0xca9b971e,\n    (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x744023bc, (q31_t)0xca6dec37,\n    (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x742b1144, (q31_t)0xca404992,\n    (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x7415ece2, (q31_t)0xca12af37,\n    (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7400b69a, (q31_t)0xc9e51d2d,\n    (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a,\n    (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73d61461, (q31_t)0xc98a1227,\n    (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c0a878, (q31_t)0xc95c993a,\n    (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba,\n    (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x73959b1b, (q31_t)0xc901c0ae,\n    (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x737ff9ae, (q31_t)0xc8d4611d,\n    (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x736a4671, (q31_t)0xc8a70a0e,\n    (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x73548168, (q31_t)0xc879bb89,\n    (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x733eaa96, (q31_t)0xc84c7593,\n    (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7328c1ff, (q31_t)0xc81f3834,\n    (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x7312c7a5, (q31_t)0xc7f20373,\n    (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757,\n    (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72e69db7, (q31_t)0xc797b3e7,\n    (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d06e2b, (q31_t)0xc76a992a,\n    (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72ba2cea, (q31_t)0xc73d8727,\n    (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72a3d9f7, (q31_t)0xc7107de4,\n    (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x728d7557, (q31_t)0xc6e37d69,\n    (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x7276ff0d, (q31_t)0xc6b685bd,\n    (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7260771b, (q31_t)0xc68996e7,\n    (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7249dd86, (q31_t)0xc65cb0ed,\n    (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x72333251, (q31_t)0xc62fd3d6,\n    (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x721c7580, (q31_t)0xc602ffaa,\n    (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x7205a716, (q31_t)0xc5d6346f,\n    (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71eec716, (q31_t)0xc5a9722c,\n    (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71d7d585, (q31_t)0xc57cb8e9,\n    (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c0d265, (q31_t)0xc55008ab,\n    (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71a9bdba, (q31_t)0xc523617a,\n    (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x71929789, (q31_t)0xc4f6c35d,\n    (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b,\n    (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x7164169d, (q31_t)0xc49da27a,\n    (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x714cbbeb, (q31_t)0xc4711fc2,\n    (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71354fc0, (q31_t)0xc444a639,\n    (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x711dd220, (q31_t)0xc41835e6,\n    (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x7106430e, (q31_t)0xc3ebced0,\n    (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70eea28e, (q31_t)0xc3bf70fd,\n    (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70d6f0a4, (q31_t)0xc3931c76,\n    (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70bf2d53, (q31_t)0xc366d140,\n    (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70a7589f, (q31_t)0xc33a8f62,\n    (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x708f728b, (q31_t)0xc30e56e4,\n    (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70777b1c, (q31_t)0xc2e227cb,\n    (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x705f7255, (q31_t)0xc2b6021f,\n    (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x70475839, (q31_t)0xc289e5e7,\n    (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x702f2ccd, (q31_t)0xc25dd329,\n    (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x7016f014, (q31_t)0xc231c9ec,\n    (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x6ffea212, (q31_t)0xc205ca38,\n    (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fe642ca, (q31_t)0xc1d9d412,\n    (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fcdd241, (q31_t)0xc1ade781,\n    (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fb5507a, (q31_t)0xc182048d,\n    (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d,\n    (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f841942, (q31_t)0xc12a5b95,\n    (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f,\n    (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f529d40, (q31_t)0xc0d2d960,\n    (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f39c57d, (q31_t)0xc0a726df,\n    (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f20dc92, (q31_t)0xc07b7e23,\n    (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f07e285, (q31_t)0xc04fdf32,\n    (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6eeed758, (q31_t)0xc0244a14,\n    (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6ed5bb10, (q31_t)0xbff8bece,\n    (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69,\n    (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea,\n    (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e89ffb9, (q31_t)0xbf765858,\n    (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba,\n    (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e572d93, (q31_t)0xbf1f9b16,\n    (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e3daaf8, (q31_t)0xbef44b74,\n    (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e24175c, (q31_t)0xbec905d9,\n    (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e,\n    (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6df0bd35, (q31_t)0xbe7298d7,\n    (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c,\n    (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444,\n    (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6da336dc, (q31_t)0xbdf14135,\n    (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d893d93, (q31_t)0xbdc63856,\n    (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad,\n    (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d551858, (q31_t)0xbd704542,\n    (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a,\n    (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d,\n    (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d066215, (q31_t)0xbcefa5b0,\n    (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cec03af, (q31_t)0xbcc4da7b,\n    (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5,\n    (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cb71482, (q31_t)0xbc6f6333,\n    (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c,\n    (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c81e245, (q31_t)0xbc1a1598,\n    (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c67300b, (q31_t)0xbbef7e7c,\n    (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df,\n    (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c319975, (q31_t)0xbb9a6fc7,\n    (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c16b521, (q31_t)0xbb6ff83c,\n    (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6bfbc021, (q31_t)0xbb458b43,\n    (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4,\n    (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bc5a431, (q31_t)0xbaf0d125,\n    (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6baa7d49, (q31_t)0xbac6840c,\n    (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0,\n    (q31_t)0x6b81a3cd, (q31_t)0xba87246d, (q31_t)0x6b73fdae, (q31_t)0xba7209e7,\n    (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b58a503, (q31_t)0xba47dce8,\n    (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa,\n    (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b21c208, (q31_t)0xb9f3a332,\n    (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b0637c1, (q31_t)0xb9c99688,\n    (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2,\n    (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6acef1b2, (q31_t)0xb9759db6,\n    (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6ab335f4, (q31_t)0xb94bb19b,\n    (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6a9769c1, (q31_t)0xb921d067,\n    (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21,\n    (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf,\n    (q31_t)0x6a51a361, (q31_t)0xb8b94d44, (q31_t)0x6a43a29a, (q31_t)0xb8a46e78,\n    (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x6a2794c1, (q31_t)0xb87ab922,\n    (q31_t)0x6a1987b0, (q31_t)0xb865e299, (q31_t)0x6a0b7689, (q31_t)0xb8510ed4,\n    (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69ef47f6, (q31_t)0xb8276f93,\n    (q31_t)0x69e12a8c, (q31_t)0xb812a41a, (q31_t)0x69d3090e, (q31_t)0xb7fddb67,\n    (q31_t)0x69c4e37a, (q31_t)0xb7e9157a, (q31_t)0x69b6b9d3, (q31_t)0xb7d45255,\n    (q31_t)0x69a88c19, (q31_t)0xb7bf91f8, (q31_t)0x699a5a4c, (q31_t)0xb7aad465,\n    (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x697dea7b, (q31_t)0xb781619c,\n    (q31_t)0x696fac78, (q31_t)0xb76cac69, (q31_t)0x69616a65, (q31_t)0xb757fa01,\n    (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x6944da10, (q31_t)0xb72e9d9b,\n    (q31_t)0x69368bce, (q31_t)0xb719f39e, (q31_t)0x6928397e, (q31_t)0xb7054c6f,\n    (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x690b88b5, (q31_t)0xb6dc0685,\n    (q31_t)0x68fd2a3d, (q31_t)0xb6c767ca, (q31_t)0x68eec7b9, (q31_t)0xb6b2cbe2,\n    (q31_t)0x68e06129, (q31_t)0xb69e32cd, (q31_t)0x68d1f68f, (q31_t)0xb6899c8d,\n    (q31_t)0x68c387e9, (q31_t)0xb6750921, (q31_t)0x68b5153a, (q31_t)0xb660788c,\n    (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x689823bf, (q31_t)0xb6375fe5,\n    (q31_t)0x6889a4f6, (q31_t)0xb622d7d6, (q31_t)0x687b2224, (q31_t)0xb60e529f,\n    (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x685e106c, (q31_t)0xb5e550c1,\n    (q31_t)0x684f8186, (q31_t)0xb5d0d41a, (q31_t)0x6840ee9b, (q31_t)0xb5bc5a50,\n    (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x6823bcb7, (q31_t)0xb5936f53,\n    (q31_t)0x68151dbe, (q31_t)0xb57efe22, (q31_t)0x68067ac3, (q31_t)0xb56a8fd0,\n    (q31_t)0x67f7d3c5, (q31_t)0xb556245e, (q31_t)0x67e928c5, (q31_t)0xb541bbcd,\n    (q31_t)0x67da79c3, (q31_t)0xb52d561e, (q31_t)0x67cbc6c0, (q31_t)0xb518f351,\n    (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67ae54ba, (q31_t)0xb4f03663,\n    (q31_t)0x679f95b7, (q31_t)0xb4dbdc42, (q31_t)0x6790d2b6, (q31_t)0xb4c78507,\n    (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x677340ba, (q31_t)0xb49edf45,\n    (q31_t)0x676471c0, (q31_t)0xb48a90c0, (q31_t)0x67559eca, (q31_t)0xb4764523,\n    (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x6737ecea, (q31_t)0xb44db6a8,\n    (q31_t)0x67290e02, (q31_t)0xb43973ca, (q31_t)0x671a2b20, (q31_t)0xb42533d8,\n    (q31_t)0x670b4444, (q31_t)0xb410f6d3, (q31_t)0x66fc596f, (q31_t)0xb3fcbcbb,\n    (q31_t)0x66ed6aa1, (q31_t)0xb3e88592, (q31_t)0x66de77dc, (q31_t)0xb3d45157,\n    (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66c0866d, (q31_t)0xb3abf1b2,\n    (q31_t)0x66b187c3, (q31_t)0xb397c649, (q31_t)0x66a28524, (q31_t)0xb3839dd3,\n    (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x66847408, (q31_t)0xb35b55bf,\n    (q31_t)0x6675658c, (q31_t)0xb3473623, (q31_t)0x6666531d, (q31_t)0xb333197c,\n    (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x66482267, (q31_t)0xb30ae912,\n    (q31_t)0x66390422, (q31_t)0xb2f6d550, (q31_t)0x6629e1ec, (q31_t)0xb2e2c486,\n    (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5, (q31_t)0x660b91af, (q31_t)0xb2baabde,\n    (q31_t)0x65fc63a9, (q31_t)0xb2a6a402, (q31_t)0x65ed31b5, (q31_t)0xb2929f21,\n    (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65cec204, (q31_t)0xb26a9e54,\n    (q31_t)0x65bf8447, (q31_t)0xb256a26a, (q31_t)0x65b0429f, (q31_t)0xb242a97e,\n    (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x6591b38c, (q31_t)0xb21ac0a6,\n    (q31_t)0x65826622, (q31_t)0xb206d0ba, (q31_t)0x657314cf, (q31_t)0xb1f2e3d0,\n    (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x6554666d, (q31_t)0xb1cb1304,\n    (q31_t)0x6545095f, (q31_t)0xb1b72f23, (q31_t)0x6535a86b, (q31_t)0xb1a34e47,\n    (q31_t)0x6526438f, (q31_t)0xb18f7071, (q31_t)0x6516dacd, (q31_t)0xb17b95a0,\n    (q31_t)0x65076e25, (q31_t)0xb167bdd7, (q31_t)0x64f7fd98, (q31_t)0xb153e915,\n    (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64d910d1, (q31_t)0xb12c48ab,\n    (q31_t)0x64c99498, (q31_t)0xb1187d05, (q31_t)0x64ba147d, (q31_t)0xb104b46a,\n    (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x649b08a0, (q31_t)0xb0dd2c56,\n    (q31_t)0x648b7ce0, (q31_t)0xb0c96ce0, (q31_t)0x647bed3f, (q31_t)0xb0b5b077,\n    (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x645cc260, (q31_t)0xb08e40d2,\n    (q31_t)0x644d2722, (q31_t)0xb07a8d97, (q31_t)0x643d8806, (q31_t)0xb066dd6d,\n    (q31_t)0x642de50d, (q31_t)0xb0533055, (q31_t)0x641e3e38, (q31_t)0xb03f864f,\n    (q31_t)0x640e9386, (q31_t)0xb02bdf5c, (q31_t)0x63fee4f8, (q31_t)0xb0183b7d,\n    (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63df7c4d, (q31_t)0xaff0fcfe,\n    (q31_t)0x63cfc231, (q31_t)0xafdd625f, (q31_t)0x63c0043b, (q31_t)0xafc9cad7,\n    (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x63a07cc7, (q31_t)0xafa2a50f,\n    (q31_t)0x6390b34a, (q31_t)0xaf8f16d1, (q31_t)0x6380e5f6, (q31_t)0xaf7b8bac,\n    (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x63613fcd, (q31_t)0xaf547eb3,\n    (q31_t)0x635166f9, (q31_t)0xaf40fce1, (q31_t)0x63418a50, (q31_t)0xaf2d7e2b,\n    (q31_t)0x6331a9d4, (q31_t)0xaf1a0293, (q31_t)0x6321c585, (q31_t)0xaf068a1a,\n    (q31_t)0x6311dd64, (q31_t)0xaef314c0, (q31_t)0x6301f171, (q31_t)0xaedfa285,\n    (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62e20e17, (q31_t)0xaeb8c774,\n    (q31_t)0x62d216b3, (q31_t)0xaea55e9e, (q31_t)0x62c21b7e, (q31_t)0xae91f8eb,\n    (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x62a219aa, (q31_t)0xae6b36f0,\n    (q31_t)0x6292130c, (q31_t)0xae57daab, (q31_t)0x628208a1, (q31_t)0xae44818b,\n    (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x6261e866, (q31_t)0xae1dd8c0,\n    (q31_t)0x6251d298, (q31_t)0xae0a8916, (q31_t)0x6241b8ff, (q31_t)0xadf73c96,\n    (q31_t)0x62319b9d, (q31_t)0xade3f33e, (q31_t)0x62217a72, (q31_t)0xadd0ad12,\n    (q31_t)0x6211557e, (q31_t)0xadbd6a10, (q31_t)0x62012cc2, (q31_t)0xadaa2a3b,\n    (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61e0cff5, (q31_t)0xad83b416,\n    (q31_t)0x61d09be5, (q31_t)0xad707dc8, (q31_t)0x61c06410, (q31_t)0xad5d4aaa,\n    (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x619fe918, (q31_t)0xad36edfc,\n    (q31_t)0x618fa5f7, (q31_t)0xad23c46e, (q31_t)0x617f5f12, (q31_t)0xad109e12,\n    (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x615ec603, (q31_t)0xacea5af2,\n    (q31_t)0x614e73da, (q31_t)0xacd73e30, (q31_t)0x613e1df0, (q31_t)0xacc424a3,\n    (q31_t)0x612dc447, (q31_t)0xacb10e4b, (q31_t)0x611d66de, (q31_t)0xac9dfb29,\n    (q31_t)0x610d05b7, (q31_t)0xac8aeb3e, (q31_t)0x60fca0d2, (q31_t)0xac77de8b,\n    (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60dbcbd1, (q31_t)0xac51cecf,\n    (q31_t)0x60cb5bb7, (q31_t)0xac3ecbc7, (q31_t)0x60bae7e1, (q31_t)0xac2bcbfa,\n    (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x6099f505, (q31_t)0xac05d613,\n    (q31_t)0x60897601, (q31_t)0xabf2dffb, (q31_t)0x6078f344, (q31_t)0xabdfed1f,\n    (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x6057e2a2, (q31_t)0xabba1125,\n    (q31_t)0x604754bf, (q31_t)0xaba72807, (q31_t)0x6036c325, (q31_t)0xab944229,\n    (q31_t)0x60262dd6, (q31_t)0xab815f8d, (q31_t)0x601594d1, (q31_t)0xab6e8032,\n    (q31_t)0x6004f819, (q31_t)0xab5ba41a, (q31_t)0x5ff457ad, (q31_t)0xab48cb46,\n    (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fd30bbc, (q31_t)0xab23236a,\n    (q31_t)0x5fc26038, (q31_t)0xab105464, (q31_t)0x5fb1b104, (q31_t)0xaafd88a4,\n    (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f90478a, (q31_t)0xaad7fafb,\n    (q31_t)0x5f7f8d46, (q31_t)0xaac53912, (q31_t)0x5f6ecf53, (q31_t)0xaab27a73,\n    (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f4d4865, (q31_t)0xaa8d0713,\n    (q31_t)0x5f3c7f6b, (q31_t)0xaa7a5253, (q31_t)0x5f2bb2c5, (q31_t)0xaa67a0e0,\n    (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba, (q31_t)0x5f0a0e77, (q31_t)0xaa4247e1,\n    (q31_t)0x5ef936d1, (q31_t)0xaa2fa056, (q31_t)0x5ee85b82, (q31_t)0xaa1cfc1a,\n    (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5ec699e9, (q31_t)0xa9f7bd92,\n    (q31_t)0x5eb5b3a2, (q31_t)0xa9e52347, (q31_t)0x5ea4c9b3, (q31_t)0xa9d28c4e,\n    (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e82eae5, (q31_t)0xa9ad6855,\n    (q31_t)0x5e71f606, (q31_t)0xa99adb56, (q31_t)0x5e60fd84, (q31_t)0xa98851ac,\n    (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e3f0194, (q31_t)0xa9634858,\n    (q31_t)0x5e2dfe29, (q31_t)0xa950c8b0, (q31_t)0x5e1cf71c, (q31_t)0xa93e4c5f,\n    (q31_t)0x5e0bec6e, (q31_t)0xa92bd367, (q31_t)0x5dfade20, (q31_t)0xa9195dc7,\n    (q31_t)0x5de9cc33, (q31_t)0xa906eb82, (q31_t)0x5dd8b6a7, (q31_t)0xa8f47c97,\n    (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5db680b4, (q31_t)0xa8cfa8d2,\n    (q31_t)0x5da5604f, (q31_t)0xa8bd43fa, (q31_t)0x5d943c4e, (q31_t)0xa8aae280,\n    (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d71e979, (q31_t)0xa88629a5,\n    (q31_t)0x5d60baa7, (q31_t)0xa873d246, (q31_t)0x5d4f883b, (q31_t)0xa8617e48,\n    (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5d2d189a, (q31_t)0xa83ce06e,\n    (q31_t)0x5d1bdb65, (q31_t)0xa82a9693, (q31_t)0x5d0a9a9a, (q31_t)0xa818501c,\n    (q31_t)0x5cf95638, (q31_t)0xa8060d08, (q31_t)0x5ce80e41, (q31_t)0xa7f3cd59,\n    (q31_t)0x5cd6c2b5, (q31_t)0xa7e1910f, (q31_t)0x5cc57394, (q31_t)0xa7cf582a,\n    (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5ca2ca99, (q31_t)0xa7aaf094,\n    (q31_t)0x5c9170bf, (q31_t)0xa798c1e5, (q31_t)0x5c801354, (q31_t)0xa786969e,\n    (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c5d4dcc, (q31_t)0xa7624a4d,\n    (q31_t)0x5c4be5b0, (q31_t)0xa7502943, (q31_t)0x5c3a7a05, (q31_t)0xa73e0ba5,\n    (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5c179806, (q31_t)0xa719daae,\n    (q31_t)0x5c0621b2, (q31_t)0xa707c757, (q31_t)0x5bf4a7d2, (q31_t)0xa6f5b76d,\n    (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2, (q31_t)0x5bd1a971, (q31_t)0xa6d1a1e7,\n    (q31_t)0x5bc024f0, (q31_t)0xa6bf9c4b, (q31_t)0x5bae9ce7, (q31_t)0xa6ad9a21,\n    (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b8b8239, (q31_t)0xa689a022,\n    (q31_t)0x5b79ef96, (q31_t)0xa677a84e, (q31_t)0x5b68596d, (q31_t)0xa665b3ee,\n    (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b452288, (q31_t)0xa641d58c,\n    (q31_t)0x5b3381ce, (q31_t)0xa62feb8b, (q31_t)0x5b21dd90, (q31_t)0xa61e0501,\n    (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5afe8a8b, (q31_t)0xa5fa4252,\n    (q31_t)0x5aecdbc5, (q31_t)0xa5e8662f, (q31_t)0x5adb297d, (q31_t)0xa5d68d85,\n    (q31_t)0x5ac973b5, (q31_t)0xa5c4b855, (q31_t)0x5ab7ba6c, (q31_t)0xa5b2e6a0,\n    (q31_t)0x5aa5fda5, (q31_t)0xa5a11866, (q31_t)0x5a943d5e, (q31_t)0xa58f4da8,\n    (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a70b258, (q31_t)0xa56bc2a2,\n    (q31_t)0x5a5ee79a, (q31_t)0xa55a025b, (q31_t)0x5a4d1960, (q31_t)0xa5484594,\n    (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x5a29727b, (q31_t)0xa524d683,\n    (q31_t)0x5a1799d1, (q31_t)0xa513243b, (q31_t)0x5a05bdae, (q31_t)0xa5017575,\n    (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59e1faff, (q31_t)0xa4de2270,\n    (q31_t)0x59d01475, (q31_t)0xa4cc7e32, (q31_t)0x59be2a74, (q31_t)0xa4badd78,\n    (q31_t)0x59ac3cfd, (q31_t)0xa4a94043, (q31_t)0x599a4c12, (q31_t)0xa497a693,\n    (q31_t)0x598857b2, (q31_t)0xa486106a, (q31_t)0x59765fde, (q31_t)0xa4747dc7,\n    (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x595265df, (q31_t)0xa4516319,\n    (q31_t)0x594063b5, (q31_t)0xa43fdb10, (q31_t)0x592e5e19, (q31_t)0xa42e568f,\n    (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x590a4893, (q31_t)0xa40b582e,\n    (q31_t)0x58f838a9, (q31_t)0xa3f9de4e, (q31_t)0x58e62552, (q31_t)0xa3e867fa,\n    (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x58c1f45b, (q31_t)0xa3c585fb,\n    (q31_t)0x58afd6bd, (q31_t)0xa3b41a50, (q31_t)0x589db5b3, (q31_t)0xa3a2b234,\n    (q31_t)0x588b9140, (q31_t)0xa3914da8, (q31_t)0x58796962, (q31_t)0xa37fecac,\n    (q31_t)0x58673e1b, (q31_t)0xa36e8f41, (q31_t)0x58550f6c, (q31_t)0xa35d3567,\n    (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x5830a7d6, (q31_t)0xa33a8c6c,\n    (q31_t)0x581e6ef1, (q31_t)0xa3293d4b, (q31_t)0x580c32a7, (q31_t)0xa317f1bf,\n    (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57e7afe4, (q31_t)0xa2f56566,\n    (q31_t)0x57d5696d, (q31_t)0xa2e4249b, (q31_t)0x57c31f92, (q31_t)0xa2d2e766,\n    (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x579e81b8, (q31_t)0xa2b077c5,\n    (q31_t)0x578c2dba, (q31_t)0xa29f4559, (q31_t)0x5779d65b, (q31_t)0xa28e1687,\n    (q31_t)0x57677b9d, (q31_t)0xa27ceb4f, (q31_t)0x57551d80, (q31_t)0xa26bc3b2,\n    (q31_t)0x5742bc06, (q31_t)0xa25a9fb1, (q31_t)0x5730572e, (q31_t)0xa2497f4c,\n    (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x570b8369, (q31_t)0xa2274959,\n    (q31_t)0x56f9147e, (q31_t)0xa21633cd, (q31_t)0x56e6a239, (q31_t)0xa20521e0,\n    (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x56c1b3a1, (q31_t)0xa1e308e4,\n    (q31_t)0x56af3750, (q31_t)0xa1d201d7, (q31_t)0x569cb7a8, (q31_t)0xa1c0fe6c,\n    (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x5677ae54, (q31_t)0xa19f027c,\n    (q31_t)0x566524aa, (q31_t)0xa18e09fa, (q31_t)0x565297ab, (q31_t)0xa17d151b,\n    (q31_t)0x56400758, (q31_t)0xa16c23e1, (q31_t)0x562d73b2, (q31_t)0xa15b364d,\n    (q31_t)0x561adcb9, (q31_t)0xa14a4c5e, (q31_t)0x5608426e, (q31_t)0xa1396617,\n    (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55e303e6, (q31_t)0xa117a47e,\n    (q31_t)0x55d05faa, (q31_t)0xa106c92f, (q31_t)0x55bdb81f, (q31_t)0xa0f5f189,\n    (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x55985f20, (q31_t)0xa0d44d3b,\n    (q31_t)0x5585adad, (q31_t)0xa0c38095, (q31_t)0x5572f8ed, (q31_t)0xa0b2b79b,\n    (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x554d858d, (q31_t)0xa09130ad,\n    (q31_t)0x553ac6ee, (q31_t)0xa08072ba, (q31_t)0x55280505, (q31_t)0xa06fb876,\n    (q31_t)0x55153fd4, (q31_t)0xa05f01e1, (q31_t)0x5502775c, (q31_t)0xa04e4efc,\n    (q31_t)0x54efab9c, (q31_t)0xa03d9fc8, (q31_t)0x54dcdc96, (q31_t)0xa02cf444,\n    (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x54b734ba, (q31_t)0xa00ba853,\n    (q31_t)0x54a45be6, (q31_t)0x9ffb07e7, (q31_t)0x54917fce, (q31_t)0x9fea6b2f,\n    (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x546bbdd7, (q31_t)0x9fc93cdb,\n    (q31_t)0x5458d7f9, (q31_t)0x9fb8ab41, (q31_t)0x5445eedb, (q31_t)0x9fa81d5e,\n    (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x542012e1, (q31_t)0x9f870cbc,\n    (q31_t)0x540d2005, (q31_t)0x9f7689ff, (q31_t)0x53fa29ed, (q31_t)0x9f660afb,\n    (q31_t)0x53e73097, (q31_t)0x9f558fb0, (q31_t)0x53d43406, (q31_t)0x9f45181f,\n    (q31_t)0x53c13439, (q31_t)0x9f34a449, (q31_t)0x53ae3131, (q31_t)0x9f24342f,\n    (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x53882175, (q31_t)0x9f035f2e,\n    (q31_t)0x537514c2, (q31_t)0x9ef2fa49, (q31_t)0x536204d7, (q31_t)0x9ee29922,\n    (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x533bdb5d, (q31_t)0x9ec1e210,\n    (q31_t)0x5328c1d0, (q31_t)0x9eb18c26, (q31_t)0x5315a50e, (q31_t)0x9ea139fd,\n    (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52ef61ee, (q31_t)0x9e80a0ee,\n    (q31_t)0x52dc3b92, (q31_t)0x9e705a09, (q31_t)0x52c91204, (q31_t)0x9e6016e8,\n    (q31_t)0x52b5e546, (q31_t)0x9e4fd78a, (q31_t)0x52a2b556, (q31_t)0x9e3f9bf0,\n    (q31_t)0x528f8238, (q31_t)0x9e2f641b, (q31_t)0x527c4bea, (q31_t)0x9e1f300b,\n    (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x5255d5c5, (q31_t)0x9dfed33e,\n    (q31_t)0x524295f0, (q31_t)0x9deeaa82, (q31_t)0x522f52ee, (q31_t)0x9dde858e,\n    (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x5208c36a, (q31_t)0x9dbe4701,\n    (q31_t)0x51f576ea, (q31_t)0x9dae2d68, (q31_t)0x51e22740, (q31_t)0x9d9e179a,\n    (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x51bb7e75, (q31_t)0x9d7df75f,\n    (q31_t)0x51a82555, (q31_t)0x9d6decf4, (q31_t)0x5194c910, (q31_t)0x9d5de656,\n    (q31_t)0x518169a5, (q31_t)0x9d4de385, (q31_t)0x516e0715, (q31_t)0x9d3de482,\n    (q31_t)0x515aa162, (q31_t)0x9d2de94d, (q31_t)0x5147388c, (q31_t)0x9d1df1e9,\n    (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x51205d7b, (q31_t)0x9cfe0e8f,\n    (q31_t)0x510ceb40, (q31_t)0x9cee229c, (q31_t)0x50f975e6, (q31_t)0x9cde3a7b,\n    (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x50d281d5, (q31_t)0x9cbe75b0,\n    (q31_t)0x50bf031f, (q31_t)0x9cae9907, (q31_t)0x50ab814d, (q31_t)0x9c9ec033,\n    (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x50847454, (q31_t)0x9c7f1a0a,\n    (q31_t)0x5070e92f, (q31_t)0x9c6f4cb6, (q31_t)0x505d5af1, (q31_t)0x9c5f8339,\n    (q31_t)0x5049c999, (q31_t)0x9c4fbd93, (q31_t)0x50363529, (q31_t)0x9c3ffbc5,\n    (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x500f0302, (q31_t)0x9c2083b3,\n    (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4fe7c483, (q31_t)0x9c011b08,\n    (q31_t)0x4fd420a4, (q31_t)0x9bf16c7a, (q31_t)0x4fc079b1, (q31_t)0x9be1c1c8,\n    (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4f992293, (q31_t)0x9bc277fa,\n    (q31_t)0x4f857269, (q31_t)0x9bb2d8de, (q31_t)0x4f71bf2e, (q31_t)0x9ba33da0,\n    (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f4a4f89, (q31_t)0x9b8412c1,\n    (q31_t)0x4f369320, (q31_t)0x9b748320, (q31_t)0x4f22d3aa, (q31_t)0x9b64f760,\n    (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4efb4b96, (q31_t)0x9b45eb83,\n    (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f,\n    (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4eac16eb, (q31_t)0x9b080268,\n    (q31_t)0x4e984229, (q31_t)0x9af891db, (q31_t)0x4e846a60, (q31_t)0x9ae92533,\n    (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e5cb1b9, (q31_t)0x9aca5795,\n    (q31_t)0x4e48d0dd, (q31_t)0x9abaf6a1, (q31_t)0x4e34ecfc, (q31_t)0x9aab9993,\n    (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31,\n    (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74,\n    (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61,\n    (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4d9561ac, (q31_t)0x9a313dfc,\n    (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b,\n    (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d455422, (q31_t)0x99f46e51,\n    (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14,\n    (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4cf516ee, (q31_t)0x99b7dd99,\n    (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4ccce684, (q31_t)0x9999ace3,\n    (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8,\n    (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c7c622d, (q31_t)0x995d7adc,\n    (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c540e4e, (q31_t)0x993f7993,\n    (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c2baea9, (q31_t)0x99218824,\n    (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c034345, (q31_t)0x9903a691,\n    (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0,\n    (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bb24958, (q31_t)0x98c81316,\n    (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b89badd, (q31_t)0x98aa6136,\n    (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b6120bb, (q31_t)0x988cbf46,\n    (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b387af9, (q31_t)0x986f2d4a,\n    (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b0fc99d, (q31_t)0x9851ab46,\n    (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4ae70caf, (q31_t)0x98343940,\n    (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4abe4433, (q31_t)0x9816d73b,\n    (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4a957030, (q31_t)0x97f9853d,\n    (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a6c90ad, (q31_t)0x97dc4349,\n    (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a43a5b0, (q31_t)0x97bf1165,\n    (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94,\n    (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x49f1ad61, (q31_t)0x9784dddc,\n    (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49c8a01b, (q31_t)0x9767dc41,\n    (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x499f8774, (q31_t)0x974aeac6,\n    (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x49766373, (q31_t)0x972e0971,\n    (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x494d341e, (q31_t)0x97113847,\n    (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x4923f97b, (q31_t)0x96f4774b,\n    (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x48fab391, (q31_t)0x96d7c682,\n    (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48d16265, (q31_t)0x96bb25f0,\n    (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48a805ff, (q31_t)0x969e959b,\n    (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x487e9e64, (q31_t)0x96821585,\n    (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x48552b9b, (q31_t)0x9665a5b4,\n    (q31_t)0x48406e08, (q31_t)0x965773e7, (q31_t)0x482badab, (q31_t)0x9649462d,\n    (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x48022499, (q31_t)0x962cf6f2,\n    (q31_t)0x47ed5be6, (q31_t)0x961ed574, (q31_t)0x47d8906d, (q31_t)0x9610b80a,\n    (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47aef12c, (q31_t)0x95f48977,\n    (q31_t)0x479a1d67, (q31_t)0x95e67850, (q31_t)0x478546de, (q31_t)0x95d86b3f,\n    (q31_t)0x47706d93, (q31_t)0x95ca6247, (q31_t)0x475b9188, (q31_t)0x95bc5d66,\n    (q31_t)0x4746b2bc, (q31_t)0x95ae5c9f, (q31_t)0x4731d131, (q31_t)0x95a05ff0,\n    (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x470805df, (q31_t)0x958472e2,\n    (q31_t)0x46f31c1a, (q31_t)0x95768283, (q31_t)0x46de2f99, (q31_t)0x9568963f,\n    (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46b44e65, (q31_t)0x954cca0c,\n    (q31_t)0x469f59b4, (q31_t)0x953eea1e, (q31_t)0x468a624a, (q31_t)0x95310e4e,\n    (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x46606b4e, (q31_t)0x95156308,\n    (q31_t)0x464b6bbe, (q31_t)0x95079394, (q31_t)0x46366978, (q31_t)0x94f9c83f,\n    (q31_t)0x4621647d, (q31_t)0x94ec010b, (q31_t)0x460c5cce, (q31_t)0x94de3df8,\n    (q31_t)0x45f7526b, (q31_t)0x94d07f05, (q31_t)0x45e24556, (q31_t)0x94c2c435,\n    (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x45b82318, (q31_t)0x94a75afd,\n    (q31_t)0x45a30df0, (q31_t)0x9499ac95, (q31_t)0x458df619, (q31_t)0x948c0252,\n    (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x4563be60, (q31_t)0x9470ba39,\n    (q31_t)0x454e9e80, (q31_t)0x94631c65, (q31_t)0x45397bf4, (q31_t)0x945582b7,\n    (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x450f2edb, (q31_t)0x943a5bcf,\n    (q31_t)0x44fa0450, (q31_t)0x942cce96, (q31_t)0x44e4d71c, (q31_t)0x941f4585,\n    (q31_t)0x44cfa740, (q31_t)0x9411c09e, (q31_t)0x44ba74bd, (q31_t)0x94043fdf,\n    (q31_t)0x44a53f93, (q31_t)0x93f6c34a, (q31_t)0x449007c4, (q31_t)0x93e94adf,\n    (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x44659039, (q31_t)0x93ce668b,\n    (q31_t)0x4450507e, (q31_t)0x93c0faa3, (q31_t)0x443b0e21, (q31_t)0x93b392e6,\n    (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x44108184, (q31_t)0x9398cff5,\n    (q31_t)0x43fb3746, (q31_t)0x938b74c1, (q31_t)0x43e5ea68, (q31_t)0x937e1dbb,\n    (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x43bb48d4, (q31_t)0x93637c3d,\n    (q31_t)0x43a5f41e, (q31_t)0x935631c5, (q31_t)0x43909ccd, (q31_t)0x9348eb7e,\n    (q31_t)0x437b42e1, (q31_t)0x933ba968, (q31_t)0x4365e65b, (q31_t)0x932e6b84,\n    (q31_t)0x4350873c, (q31_t)0x932131d1, (q31_t)0x433b2585, (q31_t)0x9313fc51,\n    (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x43105a50, (q31_t)0x92f99deb,\n    (q31_t)0x42faf0d4, (q31_t)0x92ec7505, (q31_t)0x42e584c3, (q31_t)0x92df5054,\n    (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x42baa4e6, (q31_t)0x92c51392,\n    (q31_t)0x42a5311b, (q31_t)0x92b7fb82, (q31_t)0x428fbabe, (q31_t)0x92aae7a8,\n    (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x4264c653, (q31_t)0x9290cc9b,\n    (q31_t)0x424f4845, (q31_t)0x9283c568, (q31_t)0x4239c7aa, (q31_t)0x9276c26d,\n    (q31_t)0x42244481, (q31_t)0x9269c3ac, (q31_t)0x420ebecb, (q31_t)0x925cc924,\n    (q31_t)0x41f93689, (q31_t)0x924fd2d7, (q31_t)0x41e3abbc, (q31_t)0x9242e0c4,\n    (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x41b88e84, (q31_t)0x9229094f,\n    (q31_t)0x41a2fc1a, (q31_t)0x921c23ef, (q31_t)0x418d6729, (q31_t)0x920f42cb,\n    (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x416235b2, (q31_t)0x91f58d3b,\n    (q31_t)0x414c992f, (q31_t)0x91e8b8d0, (q31_t)0x4136fa27, (q31_t)0x91dbe8a4,\n    (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x410bb48c, (q31_t)0x91c25508,\n    (q31_t)0x40f60dfb, (q31_t)0x91b5919a, (q31_t)0x40e064ea, (q31_t)0x91a8d26d,\n    (q31_t)0x40cab958, (q31_t)0x919c1781, (q31_t)0x40b50b46, (q31_t)0x918f60d6,\n    (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4089a7a8, (q31_t)0x91760047,\n    (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x405e3a16, (q31_t)0x915cb0c3,\n    (q31_t)0x40487f94, (q31_t)0x91500f67, (q31_t)0x4032c297, (q31_t)0x91437250,\n    (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x40074132, (q31_t)0x912a44f0,\n    (q31_t)0x3ff17cca, (q31_t)0x911db4a9, (q31_t)0x3fdbb5ec, (q31_t)0x911128a8,\n    (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3fb020ce, (q31_t)0x90f81d7b,\n    (q31_t)0x3f9a5290, (q31_t)0x90eb9e50, (q31_t)0x3f8481dd, (q31_t)0x90df236e,\n    (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4, (q31_t)0x3f58d921, (q31_t)0x90c63a83,\n    (q31_t)0x3f430119, (q31_t)0x90b9cc7d, (q31_t)0x3f2d26a0, (q31_t)0x90ad62c0,\n    (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3f016a61, (q31_t)0x90949c28,\n    (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ed5a46b, (q31_t)0x907be6be,\n    (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3ea9d4c3, (q31_t)0x90634287,\n    (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e7dfb73, (q31_t)0x904aaf86,\n    (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e52187f, (q31_t)0x90322dbf,\n    (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e262bee, (q31_t)0x9019bd36,\n    (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3dfa35c8, (q31_t)0x90015dee,\n    (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3dce3614, (q31_t)0x8fe90fec,\n    (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3da22cd7, (q31_t)0x8fd0d333,\n    (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7,\n    (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d49fde1, (q31_t)0x8fa08dab,\n    (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d1dd835, (q31_t)0x8f8884e4,\n    (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3cf1a91c, (q31_t)0x8f708d75,\n    (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cc5709e, (q31_t)0x8f58a761,\n    (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad,\n    (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c,\n    (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c408f03, (q31_t)0x8f115d72,\n    (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c143130, (q31_t)0x8ef9bcf2,\n    (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0,\n    (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bbb59c7, (q31_t)0x8ecab040,\n    (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b8ee03e, (q31_t)0x8eb34415,\n    (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b625d86, (q31_t)0x8e9be963,\n    (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d,\n    (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b093ca3, (q31_t)0x8e6d6877,\n    (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3adc9e86, (q31_t)0x8e564246,\n    (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b,\n    (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a834717, (q31_t)0x8e282a7b,\n    (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a568dd4, (q31_t)0x8e1138ea,\n    (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea,\n    (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x39fd0056, (q31_t)0x8de38a80,\n    (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf,\n    (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39a34f13, (q31_t)0x8db6227a,\n    (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39766919, (q31_t)0x8d9f88e5,\n    (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x39497a43, (q31_t)0x8d8900f3,\n    (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x391c8297, (q31_t)0x8d728aa9,\n    (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x38ef821c, (q31_t)0x8d5c2609,\n    (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38c278d9, (q31_t)0x8d45d316,\n    (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x389566d6, (q31_t)0x8d2f91d5,\n    (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38684c19, (q31_t)0x8d196249,\n    (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x383b28a9, (q31_t)0x8d034474,\n    (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x380dfc8d, (q31_t)0x8ced385b,\n    (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01,\n    (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37b38a6d, (q31_t)0x8cc1556a,\n    (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37864477, (q31_t)0x8cab7e98,\n    (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3758f5f2, (q31_t)0x8c95b98f,\n    (q31_t)0x37424b7b, (q31_t)0x8c8addb7, (q31_t)0x372b9ee3, (q31_t)0x8c800652,\n    (q31_t)0x3714f02a, (q31_t)0x8c753362, (q31_t)0x36fe3f52, (q31_t)0x8c6a64e5,\n    (q31_t)0x36e78c5b, (q31_t)0x8c5f9ade, (q31_t)0x36d0d746, (q31_t)0x8c54d54c,\n    (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x36a366c6, (q31_t)0x8c3f5788,\n    (q31_t)0x368cab5c, (q31_t)0x8c349f58, (q31_t)0x3675edd9, (q31_t)0x8c29eb9f,\n    (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36486c86, (q31_t)0x8c149192,\n    (q31_t)0x3631a8b8, (q31_t)0x8c09eb40, (q31_t)0x361ae2d3, (q31_t)0x8bff4966,\n    (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35ed50c9, (q31_t)0x8bea131e,\n    (q31_t)0x35d684a6, (q31_t)0x8bdf7eb0, (q31_t)0x35bfb66e, (q31_t)0x8bd4eebc,\n    (q31_t)0x35a8e625, (q31_t)0x8bca6343, (q31_t)0x359213c9, (q31_t)0x8bbfdc44,\n    (q31_t)0x357b3f5d, (q31_t)0x8bb559c1, (q31_t)0x356468e2, (q31_t)0x8baadbba,\n    (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x3536b5be, (q31_t)0x8b95ed21,\n    (q31_t)0x351fd918, (q31_t)0x8b8b7c8f, (q31_t)0x3508fa66, (q31_t)0x8b81107b,\n    (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34db36df, (q31_t)0x8b6c45cc,\n    (q31_t)0x34c4520d, (q31_t)0x8b61e733, (q31_t)0x34ad6b32, (q31_t)0x8b578d18,\n    (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x347f9766, (q31_t)0x8b42e661,\n    (q31_t)0x3468aa76, (q31_t)0x8b3899c6, (q31_t)0x3451bb81, (q31_t)0x8b2e51ab,\n    (q31_t)0x343aca87, (q31_t)0x8b240e11, (q31_t)0x3423d78a, (q31_t)0x8b19cef8,\n    (q31_t)0x340ce28b, (q31_t)0x8b0f9462, (q31_t)0x33f5eb89, (q31_t)0x8b055e4d,\n    (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x33c7f785, (q31_t)0x8af0ffac,\n    (q31_t)0x33b0fa84, (q31_t)0x8ae6d720, (q31_t)0x3399fb85, (q31_t)0x8adcb318,\n    (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x336bf78f, (q31_t)0x8ac87894,\n    (q31_t)0x3354f29b, (q31_t)0x8abe6219, (q31_t)0x333debab, (q31_t)0x8ab45024,\n    (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x330fd7e1, (q31_t)0x8aa039cb,\n    (q31_t)0x32f8cb07, (q31_t)0x8a963567, (q31_t)0x32e1bc36, (q31_t)0x8a8c358b,\n    (q31_t)0x32caab6f, (q31_t)0x8a823a36, (q31_t)0x32b398b3, (q31_t)0x8a784368,\n    (q31_t)0x329c8402, (q31_t)0x8a6e5123, (q31_t)0x32856d5e, (q31_t)0x8a646365,\n    (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x32573a3f, (q31_t)0x8a509585,\n    (q31_t)0x32401dc6, (q31_t)0x8a46b564, (q31_t)0x3228ff5c, (q31_t)0x8a3cd9cc,\n    (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x31fabcbd, (q31_t)0x8a29303b,\n    (q31_t)0x31e39889, (q31_t)0x8a1f6243, (q31_t)0x31cc7269, (q31_t)0x8a1598d6,\n    (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x319e2067, (q31_t)0x8a0213a0,\n    (q31_t)0x3186f487, (q31_t)0x89f857d8, (q31_t)0x316fc6be, (q31_t)0x89eea09d,\n    (q31_t)0x3158970e, (q31_t)0x89e4edef, (q31_t)0x31416576, (q31_t)0x89db3fcf,\n    (q31_t)0x312a31f8, (q31_t)0x89d1963c, (q31_t)0x3112fc95, (q31_t)0x89c7f138,\n    (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x30e48c22, (q31_t)0x89b4b4dd,\n    (q31_t)0x30cd5115, (q31_t)0x89ab1d87, (q31_t)0x30b61426, (q31_t)0x89a18ac0,\n    (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x308794a6, (q31_t)0x898e72e4,\n    (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x30590dab, (q31_t)0x897b6d4c,\n    (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x302a7f3a, (q31_t)0x896879fb,\n    (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x2ffbe95d, (q31_t)0x895598f3,\n    (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fcd4c19, (q31_t)0x8942ca39,\n    (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2f9ea775, (q31_t)0x89300dce,\n    (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5,\n    (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f41482e, (q31_t)0x890acbf2,\n    (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f128d99, (q31_t)0x88f84687,\n    (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378,\n    (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2eb502ae, (q31_t)0x88d372c6,\n    (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e863267, (q31_t)0x88c12475,\n    (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e575af3, (q31_t)0x88aee888,\n    (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e287c5a, (q31_t)0x889cbf01,\n    (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2df996a3, (q31_t)0x888aa7e3,\n    (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2dcaa9d5, (q31_t)0x8878a332,\n    (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef,\n    (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d6cbb10, (q31_t)0x8854d11e,\n    (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d3db928, (q31_t)0x884303c1,\n    (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d0eb046, (q31_t)0x883148db,\n    (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cdfa071, (q31_t)0x881fa06f,\n    (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cb089b1, (q31_t)0x880e0a7f,\n    (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c816c0c, (q31_t)0x87fc870f,\n    (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c52478a, (q31_t)0x87eb1621,\n    (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c231c33, (q31_t)0x87d9b7b7,\n    (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5,\n    (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bc4b120, (q31_t)0x87b7327d,\n    (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2b957173, (q31_t)0x87a60bb1,\n    (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b662b0e, (q31_t)0x8794f774,\n    (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca,\n    (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b078a36, (q31_t)0x877306b4,\n    (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ad82fd2, (q31_t)0x87622a35,\n    (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aa8ced3, (q31_t)0x87516050,\n    (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a796740, (q31_t)0x8740a907,\n    (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a49f920, (q31_t)0x8730045d,\n    (q31_t)0x2a323f9e, (q31_t)0x8727b905, (q31_t)0x2a1a847b, (q31_t)0x871f7255,\n    (q31_t)0x2a02c7b8, (q31_t)0x8717304e, (q31_t)0x29eb0957, (q31_t)0x870ef2f1,\n    (q31_t)0x29d34958, (q31_t)0x8706ba3d, (q31_t)0x29bb87bc, (q31_t)0x86fe8633,\n    (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x298bffb2, (q31_t)0x86ee2c1e,\n    (q31_t)0x29743946, (q31_t)0x86e60614, (q31_t)0x295c7140, (q31_t)0x86dde4b5,\n    (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x292cdc6d, (q31_t)0x86cdaffa,\n    (q31_t)0x29150fa1, (q31_t)0x86c59c9f, (q31_t)0x28fd4140, (q31_t)0x86bd8df0,\n    (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x28cd9fc1, (q31_t)0x86ad7e99,\n    (q31_t)0x28b5cca5, (q31_t)0x86a57df2, (q31_t)0x289df7f8, (q31_t)0x869d81f8,\n    (q31_t)0x288621b9, (q31_t)0x86958aac, (q31_t)0x286e49ea, (q31_t)0x868d980e,\n    (q31_t)0x2856708d, (q31_t)0x8685aa20, (q31_t)0x283e95a1, (q31_t)0x867dc0e0,\n    (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x280edb23, (q31_t)0x866dfc6e,\n    (q31_t)0x27f6fb92, (q31_t)0x8666213c, (q31_t)0x27df1a77, (q31_t)0x865e4abb,\n    (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27af53a6, (q31_t)0x864eabcb,\n    (q31_t)0x27976df1, (q31_t)0x8646e35c, (q31_t)0x277f86b5, (q31_t)0x863f1f9e,\n    (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x274fb3ae, (q31_t)0x862fa638,\n    (q31_t)0x2737c7e3, (q31_t)0x8627f091, (q31_t)0x271fda96, (q31_t)0x86203f9c,\n    (q31_t)0x2707ebc7, (q31_t)0x86189359, (q31_t)0x26effb76, (q31_t)0x8610ebca,\n    (q31_t)0x26d809a5, (q31_t)0x860948ef, (q31_t)0x26c01655, (q31_t)0x8601aac7,\n    (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26902b39, (q31_t)0x85f27c93,\n    (q31_t)0x26783370, (q31_t)0x85eaec88, (q31_t)0x26603a2c, (q31_t)0x85e36132,\n    (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x26304333, (q31_t)0x85d458a6,\n    (q31_t)0x26184581, (q31_t)0x85ccdb70, (q31_t)0x26004657, (q31_t)0x85c562f1,\n    (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x25d0439f, (q31_t)0x85b68015,\n    (q31_t)0x25b84012, (q31_t)0x85af15b9, (q31_t)0x25a03b11, (q31_t)0x85a7b015,\n    (q31_t)0x2588349d, (q31_t)0x85a04f28, (q31_t)0x25702cb7, (q31_t)0x8598f2f3,\n    (q31_t)0x2558235f, (q31_t)0x85919b76, (q31_t)0x25401896, (q31_t)0x858a48b1,\n    (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x250ffeb7, (q31_t)0x857bb152,\n    (q31_t)0x24f7efa2, (q31_t)0x85746cb8, (q31_t)0x24dfdf20, (q31_t)0x856d2cd7,\n    (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24afb9da, (q31_t)0x855ebb44,\n    (q31_t)0x2497a517, (q31_t)0x85578991, (q31_t)0x247f8eec, (q31_t)0x85505c99,\n    (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x244f5e5c, (q31_t)0x854210db,\n    (q31_t)0x243743fa, (q31_t)0x853af214, (q31_t)0x241f2833, (q31_t)0x8533d809,\n    (q31_t)0x24070b08, (q31_t)0x852cc2bb, (q31_t)0x23eeec78, (q31_t)0x8525b228,\n    (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23beab33, (q31_t)0x85179f39,\n    (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x238e646a, (q31_t)0x85099f3e,\n    (q31_t)0x23763ef7, (q31_t)0x8502a65c, (q31_t)0x235e1826, (q31_t)0x84fbb239,\n    (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x232dc66d, (q31_t)0x84edd82d,\n    (q31_t)0x23159b88, (q31_t)0x84e6f244, (q31_t)0x22fd6f48, (q31_t)0x84e0111b,\n    (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22cd12bd, (q31_t)0x84d25d06,\n    (q31_t)0x22b4e274, (q31_t)0x84cb8a1b, (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0,\n    (q31_t)0x22847de0, (q31_t)0x84bdf286, (q31_t)0x226c4996, (q31_t)0x84b72ddb,\n    (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x223bdd08, (q31_t)0x84a9b2ca,\n    (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x220b6b32, (q31_t)0x849c4abd,\n    (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21daf41d, (q31_t)0x848ef5b7,\n    (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x21aa77cf, (q31_t)0x8481b3bb,\n    (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x2179f64f, (q31_t)0x847484ca,\n    (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21496fa7, (q31_t)0x846768e7,\n    (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x2118e3dc, (q31_t)0x845a6012,\n    (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20e852f6, (q31_t)0x844d6a50,\n    (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20b7bcfe, (q31_t)0x844087a0,\n    (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x208721f9, (q31_t)0x8433b806,\n    (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x205681f1, (q31_t)0x8426fb84,\n    (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x2025dcec, (q31_t)0x841a521a,\n    (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x1ff532f2, (q31_t)0x840dbbcc,\n    (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fc4840a, (q31_t)0x8401389b,\n    (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1f93d03c, (q31_t)0x83f4c889,\n    (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f63178f, (q31_t)0x83e86b99,\n    (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f325a0b, (q31_t)0x83dc21cb,\n    (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f0197b8, (q31_t)0x83cfeb22,\n    (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0,\n    (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1ea004c1, (q31_t)0x83b7b746,\n    (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e6f342c, (q31_t)0x83abba17,\n    (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e3e5ee5, (q31_t)0x839fd014,\n    (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e0d84f5, (q31_t)0x8393f940,\n    (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1ddca662, (q31_t)0x8388359b,\n    (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dabc334, (q31_t)0x837c8528,\n    (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d7adb73, (q31_t)0x8370e7e9,\n    (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d49ef26, (q31_t)0x83655ddf,\n    (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d18fe54, (q31_t)0x8359e70d,\n    (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1ce80906, (q31_t)0x834e8373,\n    (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cb70f43, (q31_t)0x83433314,\n    (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c861113, (q31_t)0x8337f5f1,\n    (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c550e7c, (q31_t)0x832ccc0d,\n    (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c240786, (q31_t)0x8321b568,\n    (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1bf2fc3a, (q31_t)0x8316b205,\n    (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6,\n    (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b90d8bb, (q31_t)0x8300e50b,\n    (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b5fc097, (q31_t)0x82f61b77,\n    (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b2ea43a, (q31_t)0x82eb652b,\n    (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1afd83ad, (q31_t)0x82e0c22a,\n    (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1acc5ef6, (q31_t)0x82d63274,\n    (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1a9b361d, (q31_t)0x82cbb60b,\n    (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a6a0929, (q31_t)0x82c14cf1,\n    (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a38d823, (q31_t)0x82b6f727,\n    (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a07a311, (q31_t)0x82acb4b0,\n    (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19d669fc, (q31_t)0x82a2858c,\n    (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19a52ceb, (q31_t)0x829869be,\n    (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x1973ebe6, (q31_t)0x828e6146,\n    (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x1942a6f3, (q31_t)0x82846c26,\n    (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x19115e1c, (q31_t)0x827a8a61,\n    (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18e01167, (q31_t)0x8270bbf7,\n    (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18aec0db, (q31_t)0x826700e9,\n    (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x187d6c82, (q31_t)0x825d593a,\n    (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x184c1461, (q31_t)0x8253c4eb,\n    (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x181ab881, (q31_t)0x824a43fe,\n    (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17e958ea, (q31_t)0x8240d673,\n    (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17b7f5a3, (q31_t)0x82377c4c,\n    (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x17868eb3, (q31_t)0x822e358b,\n    (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x17552422, (q31_t)0x82250232,\n    (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x1723b5f9, (q31_t)0x821be240,\n    (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16f2443e, (q31_t)0x8212d5b9,\n    (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16c0cef9, (q31_t)0x8209dc9e,\n    (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x168f5632, (q31_t)0x8200f6ef,\n    (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x165dd9f0, (q31_t)0x81f824ae,\n    (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x162c5a3b, (q31_t)0x81ef65dc,\n    (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x15fad71b, (q31_t)0x81e6ba7c,\n    (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15c95097, (q31_t)0x81de228d,\n    (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x1597c6b7, (q31_t)0x81d59e13,\n    (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x15663982, (q31_t)0x81cd2d0c,\n    (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x1534a901, (q31_t)0x81c4cf7d,\n    (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1503153a, (q31_t)0x81bc8564,\n    (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14d17e36, (q31_t)0x81b44ec4,\n    (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e,\n    (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x146e4694, (q31_t)0x81a41bf4,\n    (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x143ca605, (q31_t)0x819c1fc5,\n    (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x140b0258, (q31_t)0x81943715,\n    (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13d95b93, (q31_t)0x818c61e3,\n    (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13a7b1bf, (q31_t)0x8184a032,\n    (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x137604e2, (q31_t)0x817cf201,\n    (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x13445505, (q31_t)0x81755754,\n    (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x1312a230, (q31_t)0x816dd02a,\n    (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12e0ec6a, (q31_t)0x81665c84,\n    (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12af33ba, (q31_t)0x815efc65,\n    (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x127d7829, (q31_t)0x8157afcd,\n    (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x124bb9be, (q31_t)0x815076bd,\n    (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x1219f880, (q31_t)0x81495136,\n    (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11e83478, (q31_t)0x81423f3a,\n    (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11b66dad, (q31_t)0x813b40ca,\n    (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1184a427, (q31_t)0x813455e6,\n    (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x1152d7ed, (q31_t)0x812d7e8f,\n    (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x11210907, (q31_t)0x8126bac8,\n    (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x10ef377d, (q31_t)0x81200a90,\n    (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10bd6356, (q31_t)0x81196de9,\n    (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x108b8c9b, (q31_t)0x8112e4d4,\n    (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x1059b352, (q31_t)0x810c6f52,\n    (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x1027d784, (q31_t)0x81060d63,\n    (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0xff5f938,  (q31_t)0x80ffbf0a,\n    (q31_t)0xfdd0926,  (q31_t)0x80fc9f35, (q31_t)0xfc41876,  (q31_t)0x80f98446,\n    (q31_t)0xfab272b,  (q31_t)0x80f66e3c, (q31_t)0xf923546,  (q31_t)0x80f35d19,\n    (q31_t)0xf7942c7,  (q31_t)0x80f050db, (q31_t)0xf604faf,  (q31_t)0x80ed4984,\n    (q31_t)0xf475bff,  (q31_t)0x80ea4712, (q31_t)0xf2e67b8,  (q31_t)0x80e74987,\n    (q31_t)0xf1572dc,  (q31_t)0x80e450e2, (q31_t)0xefc7d6b,  (q31_t)0x80e15d24,\n    (q31_t)0xee38766,  (q31_t)0x80de6e4c, (q31_t)0xeca90ce,  (q31_t)0x80db845b,\n    (q31_t)0xeb199a4,  (q31_t)0x80d89f51, (q31_t)0xe98a1e9,  (q31_t)0x80d5bf2e,\n    (q31_t)0xe7fa99e,  (q31_t)0x80d2e3f2, (q31_t)0xe66b0c3,  (q31_t)0x80d00d9d,\n    (q31_t)0xe4db75b,  (q31_t)0x80cd3c2f, (q31_t)0xe34bd66,  (q31_t)0x80ca6fa9,\n    (q31_t)0xe1bc2e4,  (q31_t)0x80c7a80a, (q31_t)0xe02c7d7,  (q31_t)0x80c4e553,\n    (q31_t)0xde9cc40,  (q31_t)0x80c22784, (q31_t)0xdd0d01f,  (q31_t)0x80bf6e9c,\n    (q31_t)0xdb7d376,  (q31_t)0x80bcba9d, (q31_t)0xd9ed646,  (q31_t)0x80ba0b85,\n    (q31_t)0xd85d88f,  (q31_t)0x80b76156, (q31_t)0xd6cda53,  (q31_t)0x80b4bc0e,\n    (q31_t)0xd53db92,  (q31_t)0x80b21baf, (q31_t)0xd3adc4e,  (q31_t)0x80af8039,\n    (q31_t)0xd21dc87,  (q31_t)0x80ace9ab, (q31_t)0xd08dc3f,  (q31_t)0x80aa5806,\n    (q31_t)0xcefdb76,  (q31_t)0x80a7cb49, (q31_t)0xcd6da2d,  (q31_t)0x80a54376,\n    (q31_t)0xcbdd865,  (q31_t)0x80a2c08b, (q31_t)0xca4d620,  (q31_t)0x80a04289,\n    (q31_t)0xc8bd35e,  (q31_t)0x809dc971, (q31_t)0xc72d020,  (q31_t)0x809b5541,\n    (q31_t)0xc59cc68,  (q31_t)0x8098e5fb, (q31_t)0xc40c835,  (q31_t)0x80967b9f,\n    (q31_t)0xc27c389,  (q31_t)0x8094162c, (q31_t)0xc0ebe66,  (q31_t)0x8091b5a2,\n    (q31_t)0xbf5b8cb,  (q31_t)0x808f5a02, (q31_t)0xbdcb2bb,  (q31_t)0x808d034c,\n    (q31_t)0xbc3ac35,  (q31_t)0x808ab180, (q31_t)0xbaaa53b,  (q31_t)0x8088649e,\n    (q31_t)0xb919dcf,  (q31_t)0x80861ca6, (q31_t)0xb7895f0,  (q31_t)0x8083d998,\n    (q31_t)0xb5f8d9f,  (q31_t)0x80819b74, (q31_t)0xb4684df,  (q31_t)0x807f623b,\n    (q31_t)0xb2d7baf,  (q31_t)0x807d2dec, (q31_t)0xb147211,  (q31_t)0x807afe87,\n    (q31_t)0xafb6805,  (q31_t)0x8078d40d, (q31_t)0xae25d8d,  (q31_t)0x8076ae7e,\n    (q31_t)0xac952aa,  (q31_t)0x80748dd9, (q31_t)0xab0475c,  (q31_t)0x8072721f,\n    (q31_t)0xa973ba5,  (q31_t)0x80705b50, (q31_t)0xa7e2f85,  (q31_t)0x806e496c,\n    (q31_t)0xa6522fe,  (q31_t)0x806c3c74, (q31_t)0xa4c1610,  (q31_t)0x806a3466,\n    (q31_t)0xa3308bd,  (q31_t)0x80683143, (q31_t)0xa19fb04,  (q31_t)0x8066330c,\n    (q31_t)0xa00ece8,  (q31_t)0x806439c0, (q31_t)0x9e7de6a,  (q31_t)0x80624560,\n    (q31_t)0x9cecf89,  (q31_t)0x806055eb, (q31_t)0x9b5c048,  (q31_t)0x805e6b62,\n    (q31_t)0x99cb0a7,  (q31_t)0x805c85c4, (q31_t)0x983a0a7,  (q31_t)0x805aa512,\n    (q31_t)0x96a9049,  (q31_t)0x8058c94c, (q31_t)0x9517f8f,  (q31_t)0x8056f272,\n    (q31_t)0x9386e78,  (q31_t)0x80552084, (q31_t)0x91f5d06,  (q31_t)0x80535381,\n    (q31_t)0x9064b3a,  (q31_t)0x80518b6b, (q31_t)0x8ed3916,  (q31_t)0x804fc841,\n    (q31_t)0x8d42699,  (q31_t)0x804e0a04, (q31_t)0x8bb13c5,  (q31_t)0x804c50b2,\n    (q31_t)0x8a2009a,  (q31_t)0x804a9c4d, (q31_t)0x888ed1b,  (q31_t)0x8048ecd5,\n    (q31_t)0x86fd947,  (q31_t)0x80474248, (q31_t)0x856c520,  (q31_t)0x80459ca9,\n    (q31_t)0x83db0a7,  (q31_t)0x8043fbf6, (q31_t)0x8249bdd,  (q31_t)0x80426030,\n    (q31_t)0x80b86c2,  (q31_t)0x8040c956, (q31_t)0x7f27157,  (q31_t)0x803f376a,\n    (q31_t)0x7d95b9e,  (q31_t)0x803daa6a, (q31_t)0x7c04598,  (q31_t)0x803c2257,\n    (q31_t)0x7a72f45,  (q31_t)0x803a9f31, (q31_t)0x78e18a7,  (q31_t)0x803920f8,\n    (q31_t)0x77501be,  (q31_t)0x8037a7ac, (q31_t)0x75bea8c,  (q31_t)0x8036334e,\n    (q31_t)0x742d311,  (q31_t)0x8034c3dd, (q31_t)0x729bb4e,  (q31_t)0x80335959,\n    (q31_t)0x710a345,  (q31_t)0x8031f3c2, (q31_t)0x6f78af6,  (q31_t)0x80309318,\n    (q31_t)0x6de7262,  (q31_t)0x802f375d, (q31_t)0x6c5598a,  (q31_t)0x802de08e,\n    (q31_t)0x6ac406f,  (q31_t)0x802c8ead, (q31_t)0x6932713,  (q31_t)0x802b41ba,\n    (q31_t)0x67a0d76,  (q31_t)0x8029f9b4, (q31_t)0x660f398,  (q31_t)0x8028b69c,\n    (q31_t)0x647d97c,  (q31_t)0x80277872, (q31_t)0x62ebf22,  (q31_t)0x80263f36,\n    (q31_t)0x615a48b,  (q31_t)0x80250ae7, (q31_t)0x5fc89b8,  (q31_t)0x8023db86,\n    (q31_t)0x5e36ea9,  (q31_t)0x8022b114, (q31_t)0x5ca5361,  (q31_t)0x80218b8f,\n    (q31_t)0x5b137df,  (q31_t)0x80206af8, (q31_t)0x5981c26,  (q31_t)0x801f4f4f,\n    (q31_t)0x57f0035,  (q31_t)0x801e3895, (q31_t)0x565e40d,  (q31_t)0x801d26c8,\n    (q31_t)0x54cc7b1,  (q31_t)0x801c19ea, (q31_t)0x533ab20,  (q31_t)0x801b11fa,\n    (q31_t)0x51a8e5c,  (q31_t)0x801a0ef8, (q31_t)0x5017165,  (q31_t)0x801910e4,\n    (q31_t)0x4e8543e,  (q31_t)0x801817bf, (q31_t)0x4cf36e5,  (q31_t)0x80172388,\n    (q31_t)0x4b6195d,  (q31_t)0x80163440, (q31_t)0x49cfba7,  (q31_t)0x801549e6,\n    (q31_t)0x483ddc3,  (q31_t)0x8014647b, (q31_t)0x46abfb3,  (q31_t)0x801383fe,\n    (q31_t)0x451a177,  (q31_t)0x8012a86f, (q31_t)0x4388310,  (q31_t)0x8011d1d0,\n    (q31_t)0x41f6480,  (q31_t)0x8011001f, (q31_t)0x40645c7,  (q31_t)0x8010335c,\n    (q31_t)0x3ed26e6,  (q31_t)0x800f6b88, (q31_t)0x3d407df,  (q31_t)0x800ea8a3,\n    (q31_t)0x3bae8b2,  (q31_t)0x800deaad, (q31_t)0x3a1c960,  (q31_t)0x800d31a5,\n    (q31_t)0x388a9ea,  (q31_t)0x800c7d8c, (q31_t)0x36f8a51,  (q31_t)0x800bce63,\n    (q31_t)0x3566a96,  (q31_t)0x800b2427, (q31_t)0x33d4abb,  (q31_t)0x800a7edb,\n    (q31_t)0x3242abf,  (q31_t)0x8009de7e, (q31_t)0x30b0aa4,  (q31_t)0x80094310,\n    (q31_t)0x2f1ea6c,  (q31_t)0x8008ac90, (q31_t)0x2d8ca16,  (q31_t)0x80081b00,\n    (q31_t)0x2bfa9a4,  (q31_t)0x80078e5e, (q31_t)0x2a68917,  (q31_t)0x800706ac,\n    (q31_t)0x28d6870,  (q31_t)0x800683e8, (q31_t)0x27447b0,  (q31_t)0x80060614,\n    (q31_t)0x25b26d7,  (q31_t)0x80058d2f, (q31_t)0x24205e8,  (q31_t)0x80051939,\n    (q31_t)0x228e4e2,  (q31_t)0x8004aa32, (q31_t)0x20fc3c6,  (q31_t)0x8004401a,\n    (q31_t)0x1f6a297,  (q31_t)0x8003daf1, (q31_t)0x1dd8154,  (q31_t)0x80037ab7,\n    (q31_t)0x1c45ffe,  (q31_t)0x80031f6d, (q31_t)0x1ab3e97,  (q31_t)0x8002c912,\n    (q31_t)0x1921d20,  (q31_t)0x800277a6, (q31_t)0x178fb99,  (q31_t)0x80022b29,\n    (q31_t)0x15fda03,  (q31_t)0x8001e39b, (q31_t)0x146b860,  (q31_t)0x8001a0fd,\n    (q31_t)0x12d96b1,  (q31_t)0x8001634e, (q31_t)0x11474f6,  (q31_t)0x80012a8e,\n    (q31_t)0x0fb5330,  (q31_t)0x8000f6bd, (q31_t)0xe23160,   (q31_t)0x8000c7dc,\n    (q31_t)0x0c90f88,  (q31_t)0x80009dea, (q31_t)0x0afeda8,  (q31_t)0x800078e7,\n    (q31_t)0x096cbc1,  (q31_t)0x800058d4, (q31_t)0x7da9d4,   (q31_t)0x80003daf,\n    (q31_t)0x06487e3,  (q31_t)0x8000277a, (q31_t)0x04b65ee,  (q31_t)0x80001635,\n    (q31_t)0x03243f5,  (q31_t)0x800009df, (q31_t)0x1921fb,   (q31_t)0x80000278};\n\nstatic const q31_t WeightsQ31_8192[16384] = {\n    (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffffd9, (q31_t)0xfff9b781,\n    (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d, (q31_t)0xffed2684,\n    (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586,\n    (q31_t)0x7ffffa73, (q31_t)0xffda4d08, (q31_t)0x7ffff872, (q31_t)0xffd40489,\n    (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c,\n    (q31_t)0x7ffff094, (q31_t)0xffc12b0e, (q31_t)0x7fffed57, (q31_t)0xffbae290,\n    (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195,\n    (q31_t)0x7fffe1c6, (q31_t)0xffa80917, (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a,\n    (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0,\n    (q31_t)0x7fffce09, (q31_t)0xff8ee724, (q31_t)0x7fffc854, (q31_t)0xff889ea7,\n    (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0,\n    (q31_t)0x7fffb55c, (q31_t)0xff75c535, (q31_t)0x7fffae6c, (q31_t)0xff6f7cba,\n    (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5,\n    (q31_t)0x7fff97c1, (q31_t)0xff5ca34b, (q31_t)0x7fff8f94, (q31_t)0xff565ad1,\n    (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df,\n    (q31_t)0x7fff7536, (q31_t)0xff438167, (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef,\n    (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801,\n    (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b, (q31_t)0x7fff4317, (q31_t)0xff241715,\n    (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b,\n    (q31_t)0x7fff2151, (q31_t)0xff113db7, (q31_t)0x7fff1572, (q31_t)0xff0af543,\n    (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e,\n    (q31_t)0x7ffeeff8, (q31_t)0xfef81bec, (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b,\n    (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a,\n    (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b, (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd,\n    (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2,\n    (q31_t)0x7ffe7e79, (q31_t)0xfec5d876, (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a,\n    (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36,\n    (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc, (q31_t)0x7ffe2d83, (q31_t)0xfea66e64,\n    (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96,\n    (q31_t)0x7ffdf93c, (q31_t)0xfe939530, (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb,\n    (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04,\n    (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2, (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41,\n    (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81,\n    (q31_t)0x7ffd6042, (q31_t)0xfe615223, (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5,\n    (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d,\n    (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3, (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a,\n    (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab,\n    (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55, (q31_t)0x7ffc9c92, (q31_t)0xfe28c700,\n    (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a,\n    (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09, (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8,\n    (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c,\n    (q31_t)0x7ffbf319, (q31_t)0xfdfccccf, (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484,\n    (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1,\n    (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9, (q31_t)0x7ffb70cb, (q31_t)0xfddd6363,\n    (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db,\n    (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99, (q31_t)0x7ffb0300, (q31_t)0xfdc44258,\n    (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, (q31_t)0x7ffaca40, (q31_t)0xfdb7b1da,\n    (q31_t)0x7ffaad6a, (q31_t)0xfdb1699e, (q31_t)0x7ffa9045, (q31_t)0xfdab2162,\n    (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ffa550e, (q31_t)0xfd9e90f0,\n    (q31_t)0x7ffa36fc, (q31_t)0xfd9848b9, (q31_t)0x7ffa189c, (q31_t)0xfd920084,\n    (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff9daed, (q31_t)0xfd85701e,\n    (q31_t)0x7ff9bba0, (q31_t)0xfd7f27ed, (q31_t)0x7ff99c03, (q31_t)0xfd78dfbd,\n    (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff95bdd, (q31_t)0xfd6c4f64,\n    (q31_t)0x7ff93b54, (q31_t)0xfd660739, (q31_t)0x7ff91a7b, (q31_t)0xfd5fbf10,\n    (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, (q31_t)0x7ff8d7de, (q31_t)0xfd532ec3,\n    (q31_t)0x7ff8b619, (q31_t)0xfd4ce69f, (q31_t)0x7ff89405, (q31_t)0xfd469e7c,\n    (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff84ef0, (q31_t)0xfd3a0e3d,\n    (q31_t)0x7ff82bef, (q31_t)0xfd33c61f, (q31_t)0x7ff8089f, (q31_t)0xfd2d7e04,\n    (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff7c113, (q31_t)0xfd20edd2,\n    (q31_t)0x7ff79cd6, (q31_t)0xfd1aa5bc, (q31_t)0x7ff7784a, (q31_t)0xfd145da7,\n    (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff72e46, (q31_t)0xfd07cd83,\n    (q31_t)0x7ff708ce, (q31_t)0xfd018574, (q31_t)0x7ff6e307, (q31_t)0xfcfb3d67,\n    (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, (q31_t)0x7ff6968b, (q31_t)0xfceead52,\n    (q31_t)0x7ff66fd7, (q31_t)0xfce8654b, (q31_t)0x7ff648d4, (q31_t)0xfce21d45,\n    (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff5f9e1, (q31_t)0xfcd58d3f,\n    (q31_t)0x7ff5d1f1, (q31_t)0xfccf453f, (q31_t)0x7ff5a9b2, (q31_t)0xfcc8fd41,\n    (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff55848, (q31_t)0xfcbc6d4c,\n    (q31_t)0x7ff52f1d, (q31_t)0xfcb62554, (q31_t)0x7ff505a2, (q31_t)0xfcafdd5e,\n    (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4b1c0, (q31_t)0xfca34d78,\n    (q31_t)0x7ff48759, (q31_t)0xfc9d0588, (q31_t)0x7ff45ca3, (q31_t)0xfc96bd9b,\n    (q31_t)0x7ff4319d, (q31_t)0xfc9075af, (q31_t)0x7ff40649, (q31_t)0xfc8a2dc6,\n    (q31_t)0x7ff3daa6, (q31_t)0xfc83e5de, (q31_t)0x7ff3aeb4, (q31_t)0xfc7d9df9,\n    (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff355e4, (q31_t)0xfc710e36,\n    (q31_t)0x7ff32905, (q31_t)0xfc6ac657, (q31_t)0x7ff2fbd7, (q31_t)0xfc647e7b,\n    (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff2a08f, (q31_t)0xfc57eec9,\n    (q31_t)0x7ff27275, (q31_t)0xfc51a6f3, (q31_t)0x7ff2440b, (q31_t)0xfc4b5f20,\n    (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1e64c, (q31_t)0xfc3ecf80,\n    (q31_t)0x7ff1b6f6, (q31_t)0xfc3887b3, (q31_t)0x7ff18751, (q31_t)0xfc323fe9,\n    (q31_t)0x7ff1575d, (q31_t)0xfc2bf821, (q31_t)0x7ff1271a, (q31_t)0xfc25b05c,\n    (q31_t)0x7ff0f688, (q31_t)0xfc1f6899, (q31_t)0x7ff0c5a7, (q31_t)0xfc1920d8,\n    (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7ff062f9, (q31_t)0xfc0c915e,\n    (q31_t)0x7ff0312c, (q31_t)0xfc0649a5, (q31_t)0x7fefff0f, (q31_t)0xfc0001ee,\n    (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7fef99ea, (q31_t)0xfbf37287,\n    (q31_t)0x7fef66e1, (q31_t)0xfbed2ad8, (q31_t)0x7fef3388, (q31_t)0xfbe6e32b,\n    (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7feecbec, (q31_t)0xfbda53d8,\n    (q31_t)0x7fee97a7, (q31_t)0xfbd40c33, (q31_t)0x7fee6313, (q31_t)0xfbcdc490,\n    (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0, (q31_t)0x7fedf8ff, (q31_t)0xfbc13552,\n    (q31_t)0x7fedc37e, (q31_t)0xfbbaedb7, (q31_t)0x7fed8daf, (q31_t)0xfbb4a61f,\n    (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fed2123, (q31_t)0xfba816f6,\n    (q31_t)0x7fecea67, (q31_t)0xfba1cf66, (q31_t)0x7fecb35c, (q31_t)0xfb9b87d8,\n    (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7fec4459, (q31_t)0xfb8ef8c5,\n    (q31_t)0x7fec0c62, (q31_t)0xfb88b13f, (q31_t)0x7febd41b, (q31_t)0xfb8269bd,\n    (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feb62a1, (q31_t)0xfb75dac0,\n    (q31_t)0x7feb296d, (q31_t)0xfb6f9345, (q31_t)0x7feaefeb, (q31_t)0xfb694bce,\n    (q31_t)0x7feab61a, (q31_t)0xfb630459, (q31_t)0x7fea7bfa, (q31_t)0xfb5cbce7,\n    (q31_t)0x7fea418b, (q31_t)0xfb567578, (q31_t)0x7fea06cd, (q31_t)0xfb502e0c,\n    (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe99064, (q31_t)0xfb439f3c,\n    (q31_t)0x7fe954ba, (q31_t)0xfb3d57d9, (q31_t)0x7fe918c0, (q31_t)0xfb371078,\n    (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe89fe0, (q31_t)0xfb2a81c0,\n    (q31_t)0x7fe862fa, (q31_t)0xfb243a69, (q31_t)0x7fe825c5, (q31_t)0xfb1df314,\n    (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe7aa6e, (q31_t)0xfb116474,\n    (q31_t)0x7fe76c4c, (q31_t)0xfb0b1d28, (q31_t)0x7fe72ddb, (q31_t)0xfb04d5e0,\n    (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b, (q31_t)0x7fe6b00d, (q31_t)0xfaf84758,\n    (q31_t)0x7fe670b0, (q31_t)0xfaf20019, (q31_t)0x7fe63103, (q31_t)0xfaebb8dd,\n    (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe5b0be, (q31_t)0xfadf2a6e,\n    (q31_t)0x7fe57025, (q31_t)0xfad8e33c, (q31_t)0x7fe52f3d, (q31_t)0xfad29c0c,\n    (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe4ac81, (q31_t)0xfac60db7,\n    (q31_t)0x7fe46aac, (q31_t)0xfabfc691, (q31_t)0x7fe42889, (q31_t)0xfab97f6e,\n    (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe3a355, (q31_t)0xfaacf133,\n    (q31_t)0x7fe36045, (q31_t)0xfaa6aa1a, (q31_t)0x7fe31ce6, (q31_t)0xfaa06305,\n    (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3, (q31_t)0x7fe2953b, (q31_t)0xfa93d4e4,\n    (q31_t)0x7fe250ef, (q31_t)0xfa8d8dd8, (q31_t)0x7fe20c55, (q31_t)0xfa8746d0,\n    (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe18233, (q31_t)0xfa7ab8ca,\n    (q31_t)0x7fe13cac, (q31_t)0xfa7471cc, (q31_t)0x7fe0f6d6, (q31_t)0xfa6e2ad1,\n    (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fe06a3d, (q31_t)0xfa619ce7,\n    (q31_t)0x7fe0237a, (q31_t)0xfa5b55f7, (q31_t)0x7fdfdc69, (q31_t)0xfa550f0a,\n    (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fdf4d59, (q31_t)0xfa48813b,\n    (q31_t)0x7fdf055a, (q31_t)0xfa423a59, (q31_t)0x7fdebd0d, (q31_t)0xfa3bf37a,\n    (q31_t)0x7fde7471, (q31_t)0xfa35ac9f, (q31_t)0x7fde2b86, (q31_t)0xfa2f65c8,\n    (q31_t)0x7fdde24d, (q31_t)0xfa291ef4, (q31_t)0x7fdd98c4, (q31_t)0xfa22d823,\n    (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdd04c6, (q31_t)0xfa164a8e,\n    (q31_t)0x7fdcba51, (q31_t)0xfa1003c8, (q31_t)0x7fdc6f8d, (q31_t)0xfa09bd06,\n    (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdbd918, (q31_t)0xf9fd2f8e,\n    (q31_t)0x7fdb8d67, (q31_t)0xf9f6e8d7, (q31_t)0x7fdb4167, (q31_t)0xf9f0a224,\n    (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fdaa87c, (q31_t)0xf9e414ca,\n    (q31_t)0x7fda5b8f, (q31_t)0xf9ddce22, (q31_t)0x7fda0e54, (q31_t)0xf9d7877e,\n    (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de, (q31_t)0x7fd972f2, (q31_t)0xf9cafa42,\n    (q31_t)0x7fd924ca, (q31_t)0xf9c4b3a9, (q31_t)0x7fd8d653, (q31_t)0xf9be6d15,\n    (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd8387a, (q31_t)0xf9b1dff7,\n    (q31_t)0x7fd7e917, (q31_t)0xf9ab996e, (q31_t)0x7fd79965, (q31_t)0xf9a552e9,\n    (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6f914, (q31_t)0xf998c5ea,\n    (q31_t)0x7fd6a875, (q31_t)0xf9927f71, (q31_t)0x7fd65788, (q31_t)0xf98c38fc,\n    (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd5b4c1, (q31_t)0xf97fac1d,\n    (q31_t)0x7fd562e7, (q31_t)0xf97965b4, (q31_t)0x7fd510be, (q31_t)0xf9731f4e,\n    (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed, (q31_t)0x7fd46b80, (q31_t)0xf9669290,\n    (q31_t)0x7fd4186a, (q31_t)0xf9604c37, (q31_t)0x7fd3c506, (q31_t)0xf95a05e2,\n    (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd31d51, (q31_t)0xf94d7944,\n    (q31_t)0x7fd2c900, (q31_t)0xf94732fb, (q31_t)0x7fd27460, (q31_t)0xf940ecb7,\n    (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd1ca35, (q31_t)0xf934603a,\n    (q31_t)0x7fd174a8, (q31_t)0xf92e1a02, (q31_t)0x7fd11ecd, (q31_t)0xf927d3ce,\n    (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fd0722b, (q31_t)0xf91b4773,\n    (q31_t)0x7fd01b63, (q31_t)0xf915014c, (q31_t)0x7fcfc44d, (q31_t)0xf90ebb29,\n    (q31_t)0x7fcf6ce8, (q31_t)0xf908750a, (q31_t)0x7fcf1533, (q31_t)0xf9022ef0,\n    (q31_t)0x7fcebd31, (q31_t)0xf8fbe8da, (q31_t)0x7fce64df, (q31_t)0xf8f5a2c9,\n    (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcdb34f, (q31_t)0xf8e916b2,\n    (q31_t)0x7fcd5a11, (q31_t)0xf8e2d0ae, (q31_t)0x7fcd0083, (q31_t)0xf8dc8aae,\n    (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcc4c7d, (q31_t)0xf8cffebb,\n    (q31_t)0x7fcbf203, (q31_t)0xf8c9b8c8, (q31_t)0x7fcb973b, (q31_t)0xf8c372d9,\n    (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fcae0bd, (q31_t)0xf8b6e70a,\n    (q31_t)0x7fca8508, (q31_t)0xf8b0a129, (q31_t)0x7fca2905, (q31_t)0xf8aa5b4c,\n    (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574, (q31_t)0x7fc97011, (q31_t)0xf89dcfa1,\n    (q31_t)0x7fc91320, (q31_t)0xf89789d2, (q31_t)0x7fc8b5e1, (q31_t)0xf8914407,\n    (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc7fa77, (q31_t)0xf884b880,\n    (q31_t)0x7fc79c4b, (q31_t)0xf87e72c4, (q31_t)0x7fc73dd1, (q31_t)0xf8782d0c,\n    (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc67ff0, (q31_t)0xf86ba1aa,\n    (q31_t)0x7fc62089, (q31_t)0xf8655c00, (q31_t)0x7fc5c0d3, (q31_t)0xf85f165b,\n    (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc5007c, (q31_t)0xf8528b1f,\n    (q31_t)0x7fc49fda, (q31_t)0xf84c4588, (q31_t)0x7fc43ee9, (q31_t)0xf845fff5,\n    (q31_t)0x7fc3dda9, (q31_t)0xf83fba68, (q31_t)0x7fc37c1b, (q31_t)0xf83974df,\n    (q31_t)0x7fc31a3d, (q31_t)0xf8332f5b, (q31_t)0x7fc2b811, (q31_t)0xf82ce9dc,\n    (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc1f2cc, (q31_t)0xf8205eec,\n    (q31_t)0x7fc18fb4, (q31_t)0xf81a197b, (q31_t)0x7fc12c4d, (q31_t)0xf813d410,\n    (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fc06491, (q31_t)0xf8074947,\n    (q31_t)0x7fc0003e, (q31_t)0xf80103ea, (q31_t)0x7fbf9b9b, (q31_t)0xf7fabe92,\n    (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbed16a, (q31_t)0xf7ee33f0,\n    (q31_t)0x7fbe6bdb, (q31_t)0xf7e7eea7, (q31_t)0x7fbe05fd, (q31_t)0xf7e1a963,\n    (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423, (q31_t)0x7fbd3955, (q31_t)0xf7d51ee9,\n    (q31_t)0x7fbcd28b, (q31_t)0xf7ced9b4, (q31_t)0x7fbc6b72, (q31_t)0xf7c89484,\n    (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fbb9c53, (q31_t)0xf7bc0a33,\n    (q31_t)0x7fbb344e, (q31_t)0xf7b5c512, (q31_t)0x7fbacbfa, (q31_t)0xf7af7ff6,\n    (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb9fa65, (q31_t)0xf7a2f5ce,\n    (q31_t)0x7fb99125, (q31_t)0xf79cb0c2, (q31_t)0x7fb92796, (q31_t)0xf7966bbb,\n    (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb8538b, (q31_t)0xf789e1bc,\n    (q31_t)0x7fb7e90f, (q31_t)0xf7839cc4, (q31_t)0x7fb77e45, (q31_t)0xf77d57d2,\n    (q31_t)0x7fb7132b, (q31_t)0xf77712e5, (q31_t)0x7fb6a7c3, (q31_t)0xf770cdfd,\n    (q31_t)0x7fb63c0d, (q31_t)0xf76a891b, (q31_t)0x7fb5d007, (q31_t)0xf764443d,\n    (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb4f710, (q31_t)0xf757ba93,\n    (q31_t)0x7fb48a1e, (q31_t)0xf75175c6, (q31_t)0x7fb41cdd, (q31_t)0xf74b30fe,\n    (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb34170, (q31_t)0xf73ea77e,\n    (q31_t)0x7fb2d343, (q31_t)0xf73862c6, (q31_t)0x7fb264c7, (q31_t)0xf7321e14,\n    (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb186e3, (q31_t)0xf72594c0,\n    (q31_t)0x7fb1177b, (q31_t)0xf71f501e, (q31_t)0x7fb0a7c4, (q31_t)0xf7190b81,\n    (q31_t)0x7fb037bf, (q31_t)0xf712c6ea, (q31_t)0x7fafc76a, (q31_t)0xf70c8259,\n    (q31_t)0x7faf56c7, (q31_t)0xf7063dcd, (q31_t)0x7faee5d5, (q31_t)0xf6fff946,\n    (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7fae0305, (q31_t)0xf6f3704a,\n    (q31_t)0x7fad9127, (q31_t)0xf6ed2bd4, (q31_t)0x7fad1efa, (q31_t)0xf6e6e764,\n    (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7fac39b4, (q31_t)0xf6da5e95,\n    (q31_t)0x7fabc69b, (q31_t)0xf6d41a36, (q31_t)0x7fab5333, (q31_t)0xf6cdd5dc,\n    (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7faa6b77, (q31_t)0xf6c14d3a,\n    (q31_t)0x7fa9f723, (q31_t)0xf6bb08f1, (q31_t)0x7fa98280, (q31_t)0xf6b4c4ae,\n    (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071, (q31_t)0x7fa8984e, (q31_t)0xf6a83c3a,\n    (q31_t)0x7fa822bf, (q31_t)0xf6a1f808, (q31_t)0x7fa7ace1, (q31_t)0xf69bb3dd,\n    (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa6c039, (q31_t)0xf68f2b96,\n    (q31_t)0x7fa6496e, (q31_t)0xf688e77c, (q31_t)0x7fa5d256, (q31_t)0xf682a367,\n    (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa4e338, (q31_t)0xf6761b50,\n    (q31_t)0x7fa46b32, (q31_t)0xf66fd74d, (q31_t)0x7fa3f2df, (q31_t)0xf6699350,\n    (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa3014b, (q31_t)0xf65d0b68,\n    (q31_t)0x7fa2880b, (q31_t)0xf656c77c, (q31_t)0x7fa20e7c, (q31_t)0xf6508397,\n    (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8, (q31_t)0x7fa11a72, (q31_t)0xf643fbdf,\n    (q31_t)0x7fa09ff7, (q31_t)0xf63db80b, (q31_t)0x7fa0252e, (q31_t)0xf637743e,\n    (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9f2eae, (q31_t)0xf62aecb5,\n    (q31_t)0x7f9eb2f8, (q31_t)0xf624a8fa, (q31_t)0x7f9e36f4, (q31_t)0xf61e6545,\n    (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9d3dfe, (q31_t)0xf611dded,\n    (q31_t)0x7f9cc10d, (q31_t)0xf60b9a4b, (q31_t)0x7f9c43ce, (q31_t)0xf60556ae,\n    (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f9b4863, (q31_t)0xf5f8cf87,\n    (q31_t)0x7f9aca37, (q31_t)0xf5f28bfd, (q31_t)0x7f9a4bbd, (q31_t)0xf5ec4879,\n    (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc, (q31_t)0x7f994ddc, (q31_t)0xf5dfc184,\n    (q31_t)0x7f98ce76, (q31_t)0xf5d97e13, (q31_t)0x7f984ec1, (q31_t)0xf5d33aa8,\n    (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f974e6a, (q31_t)0xf5c6b3e5,\n    (q31_t)0x7f96cdc9, (q31_t)0xf5c0708d, (q31_t)0x7f964cd9, (q31_t)0xf5ba2d3b,\n    (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f954a0d, (q31_t)0xf5ada6ab,\n    (q31_t)0x7f94c831, (q31_t)0xf5a7636c, (q31_t)0x7f944606, (q31_t)0xf5a12034,\n    (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f9340c4, (q31_t)0xf59499d6,\n    (q31_t)0x7f92bdad, (q31_t)0xf58e56b1, (q31_t)0x7f923a48, (q31_t)0xf5881393,\n    (q31_t)0x7f91b694, (q31_t)0xf581d07b, (q31_t)0x7f913291, (q31_t)0xf57b8d69,\n    (q31_t)0x7f90ae3f, (q31_t)0xf5754a5e, (q31_t)0x7f90299f, (q31_t)0xf56f0759,\n    (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8f1f72, (q31_t)0xf5628163,\n    (q31_t)0x7f8e99e6, (q31_t)0xf55c3e72, (q31_t)0x7f8e140a, (q31_t)0xf555fb88,\n    (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8d0768, (q31_t)0xf54975c6,\n    (q31_t)0x7f8c80a1, (q31_t)0xf54332ef, (q31_t)0x7f8bf98b, (q31_t)0xf53cf01f,\n    (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f8aea74, (q31_t)0xf5306a93,\n    (q31_t)0x7f8a6272, (q31_t)0xf52a27d7, (q31_t)0x7f89da21, (q31_t)0xf523e521,\n    (q31_t)0x7f895182, (q31_t)0xf51da273, (q31_t)0x7f88c894, (q31_t)0xf5175fca,\n    (q31_t)0x7f883f58, (q31_t)0xf5111d29, (q31_t)0x7f87b5cd, (q31_t)0xf50ada8f,\n    (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f86a1ca, (q31_t)0xf4fe556e,\n    (q31_t)0x7f861753, (q31_t)0xf4f812e7, (q31_t)0x7f858c8d, (q31_t)0xf4f1d068,\n    (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f847616, (q31_t)0xf4e54b7d,\n    (q31_t)0x7f83ea64, (q31_t)0xf4df0912, (q31_t)0x7f835e64, (q31_t)0xf4d8c6ae,\n    (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f824577, (q31_t)0xf4cc41fb,\n    (q31_t)0x7f81b88a, (q31_t)0xf4c5ffab, (q31_t)0x7f812b4f, (q31_t)0xf4bfbd63,\n    (q31_t)0x7f809dc5, (q31_t)0xf4b97b21, (q31_t)0x7f800fed, (q31_t)0xf4b338e7,\n    (q31_t)0x7f7f81c6, (q31_t)0xf4acf6b3, (q31_t)0x7f7ef350, (q31_t)0xf4a6b486,\n    (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7dd579, (q31_t)0xf49a3042,\n    (q31_t)0x7f7d4617, (q31_t)0xf493ee2b, (q31_t)0x7f7cb667, (q31_t)0xf48dac1a,\n    (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f7b961b, (q31_t)0xf481280e,\n    (q31_t)0x7f7b057e, (q31_t)0xf47ae613, (q31_t)0x7f7a7494, (q31_t)0xf474a41f,\n    (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f7951d2, (q31_t)0xf468204b,\n    (q31_t)0x7f78bffb, (q31_t)0xf461de6d, (q31_t)0x7f782dd6, (q31_t)0xf45b9c95,\n    (q31_t)0x7f779b62, (q31_t)0xf4555ac5, (q31_t)0x7f77089f, (q31_t)0xf44f18fb,\n    (q31_t)0x7f76758e, (q31_t)0xf448d739, (q31_t)0x7f75e22e, (q31_t)0xf442957e,\n    (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f74ba83, (q31_t)0xf436121e,\n    (q31_t)0x7f742637, (q31_t)0xf42fd079, (q31_t)0x7f73919d, (q31_t)0xf4298edc,\n    (q31_t)0x7f72fcb4, (q31_t)0xf4234d45, (q31_t)0x7f72677c, (q31_t)0xf41d0bb6,\n    (q31_t)0x7f71d1f6, (q31_t)0xf416ca2e, (q31_t)0x7f713c21, (q31_t)0xf41088ae,\n    (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f700f8c, (q31_t)0xf40405c3,\n    (q31_t)0x7f6f78cb, (q31_t)0xf3fdc459, (q31_t)0x7f6ee1bc, (q31_t)0xf3f782f6,\n    (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a, (q31_t)0x7f6db2b1, (q31_t)0xf3eb0046,\n    (q31_t)0x7f6d1ab6, (q31_t)0xf3e4bef9, (q31_t)0x7f6c826d, (q31_t)0xf3de7db4,\n    (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f6b50ed, (q31_t)0xf3d1fb40,\n    (q31_t)0x7f6ab7b8, (q31_t)0xf3cbba12, (q31_t)0x7f6a1e34, (q31_t)0xf3c578eb,\n    (q31_t)0x7f698461, (q31_t)0xf3bf37cb, (q31_t)0x7f68ea40, (q31_t)0xf3b8f6b3,\n    (q31_t)0x7f684fd0, (q31_t)0xf3b2b5a3, (q31_t)0x7f67b512, (q31_t)0xf3ac749a,\n    (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f667ea9, (q31_t)0xf39ff29f,\n    (q31_t)0x7f65e2ff, (q31_t)0xf399b1ad, (q31_t)0x7f654706, (q31_t)0xf39370c2,\n    (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0, (q31_t)0x7f640e29, (q31_t)0xf386ef05,\n    (q31_t)0x7f637144, (q31_t)0xf380ae31, (q31_t)0x7f62d411, (q31_t)0xf37a6d66,\n    (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f6198bf, (q31_t)0xf36debe6,\n    (q31_t)0x7f60faa0, (q31_t)0xf367ab31, (q31_t)0x7f605c33, (q31_t)0xf3616a85,\n    (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0, (q31_t)0x7f5f1e6c, (q31_t)0xf354e943,\n    (q31_t)0x7f5e7f13, (q31_t)0xf34ea8ae, (q31_t)0x7f5ddf6b, (q31_t)0xf3486820,\n    (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5c9f30, (q31_t)0xf33be71d,\n    (q31_t)0x7f5bfe9d, (q31_t)0xf335a6a7, (q31_t)0x7f5b5dbb, (q31_t)0xf32f6639,\n    (q31_t)0x7f5abc8a, (q31_t)0xf32925d3, (q31_t)0x7f5a1b0b, (q31_t)0xf322e575,\n    (q31_t)0x7f59793e, (q31_t)0xf31ca51f, (q31_t)0x7f58d721, (q31_t)0xf31664d1,\n    (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f5791fd, (q31_t)0xf309e44c,\n    (q31_t)0x7f56eef5, (q31_t)0xf303a416, (q31_t)0x7f564b9f, (q31_t)0xf2fd63e8,\n    (q31_t)0x7f55a7fa, (q31_t)0xf2f723c1, (q31_t)0x7f550407, (q31_t)0xf2f0e3a3,\n    (q31_t)0x7f545fc5, (q31_t)0xf2eaa38d, (q31_t)0x7f53bb34, (q31_t)0xf2e4637f,\n    (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f527127, (q31_t)0xf2d7e37b,\n    (q31_t)0x7f51cbab, (q31_t)0xf2d1a385, (q31_t)0x7f5125e0, (q31_t)0xf2cb6398,\n    (q31_t)0x7f507fc7, (q31_t)0xf2c523b2, (q31_t)0x7f4fd95f, (q31_t)0xf2bee3d5,\n    (q31_t)0x7f4f32a9, (q31_t)0xf2b8a400, (q31_t)0x7f4e8ba4, (q31_t)0xf2b26433,\n    (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4d3caf, (q31_t)0xf2a5e4b1,\n    (q31_t)0x7f4c94be, (q31_t)0xf29fa4fd, (q31_t)0x7f4bec7f, (q31_t)0xf2996551,\n    (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f4a9b16, (q31_t)0xf28ce612,\n    (q31_t)0x7f49f1eb, (q31_t)0xf286a67e, (q31_t)0x7f494872, (q31_t)0xf28066f4,\n    (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f47f494, (q31_t)0xf273e7f7,\n    (q31_t)0x7f474a30, (q31_t)0xf26da885, (q31_t)0x7f469f7d, (q31_t)0xf267691b,\n    (q31_t)0x7f45f47b, (q31_t)0xf26129ba, (q31_t)0x7f45492b, (q31_t)0xf25aea61,\n    (q31_t)0x7f449d8c, (q31_t)0xf254ab11, (q31_t)0x7f43f19f, (q31_t)0xf24e6bc9,\n    (q31_t)0x7f434563, (q31_t)0xf2482c8a, (q31_t)0x7f4298d9, (q31_t)0xf241ed53,\n    (q31_t)0x7f41ec01, (q31_t)0xf23bae24, (q31_t)0x7f413ed9, (q31_t)0xf2356efe,\n    (q31_t)0x7f409164, (q31_t)0xf22f2fe1, (q31_t)0x7f3fe3a0, (q31_t)0xf228f0cc,\n    (q31_t)0x7f3f358d, (q31_t)0xf222b1c0, (q31_t)0x7f3e872c, (q31_t)0xf21c72bc,\n    (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3d297e, (q31_t)0xf20ff4ce,\n    (q31_t)0x7f3c7a31, (q31_t)0xf209b5e4, (q31_t)0x7f3bca96, (q31_t)0xf2037702,\n    (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829, (q31_t)0x7f3a6a75, (q31_t)0xf1f6f959,\n    (q31_t)0x7f39b9ee, (q31_t)0xf1f0ba91, (q31_t)0x7f390919, (q31_t)0xf1ea7bd2,\n    (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f37a684, (q31_t)0xf1ddfe6f,\n    (q31_t)0x7f36f4c3, (q31_t)0xf1d7bfca, (q31_t)0x7f3642b4, (q31_t)0xf1d1812e,\n    (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f34ddab, (q31_t)0xf1c50410,\n    (q31_t)0x7f342ab1, (q31_t)0xf1bec58e, (q31_t)0x7f337768, (q31_t)0xf1b88715,\n    (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f320feb, (q31_t)0xf1ac0a3e,\n    (q31_t)0x7f315bb7, (q31_t)0xf1a5cbdf, (q31_t)0x7f30a734, (q31_t)0xf19f8d89,\n    (q31_t)0x7f2ff263, (q31_t)0xf1994f3d, (q31_t)0x7f2f3d44, (q31_t)0xf19310f9,\n    (q31_t)0x7f2e87d6, (q31_t)0xf18cd2be, (q31_t)0x7f2dd219, (q31_t)0xf186948c,\n    (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2c65b5, (q31_t)0xf17a1842,\n    (q31_t)0x7f2baf0d, (q31_t)0xf173da2b, (q31_t)0x7f2af817, (q31_t)0xf16d9c1d,\n    (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f29893f, (q31_t)0xf161201b,\n    (q31_t)0x7f28d15d, (q31_t)0xf15ae228, (q31_t)0x7f28192d, (q31_t)0xf154a43d,\n    (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f26a7e2, (q31_t)0xf1482884,\n    (q31_t)0x7f25eec7, (q31_t)0xf141eab5, (q31_t)0x7f25355d, (q31_t)0xf13bacef,\n    (q31_t)0x7f247ba5, (q31_t)0xf1356f32, (q31_t)0x7f23c19e, (q31_t)0xf12f317e,\n    (q31_t)0x7f230749, (q31_t)0xf128f3d4, (q31_t)0x7f224ca6, (q31_t)0xf122b632,\n    (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f20d674, (q31_t)0xf1163b0b,\n    (q31_t)0x7f201ae5, (q31_t)0xf10ffd85, (q31_t)0x7f1f5f08, (q31_t)0xf109c009,\n    (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1de662, (q31_t)0xf0fd452b,\n    (q31_t)0x7f1d299a, (q31_t)0xf0f707ca, (q31_t)0x7f1c6c83, (q31_t)0xf0f0ca72,\n    (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f1af16a, (q31_t)0xf0e44fdf,\n    (q31_t)0x7f1a3368, (q31_t)0xf0de12a3, (q31_t)0x7f197518, (q31_t)0xf0d7d571,\n    (q31_t)0x7f18b679, (q31_t)0xf0d19848, (q31_t)0x7f17f78c, (q31_t)0xf0cb5b28,\n    (q31_t)0x7f173850, (q31_t)0xf0c51e12, (q31_t)0x7f1678c6, (q31_t)0xf0bee105,\n    (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f14f8c7, (q31_t)0xf0b26707,\n    (q31_t)0x7f143852, (q31_t)0xf0ac2a16, (q31_t)0x7f13778e, (q31_t)0xf0a5ed2f,\n    (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f11f51c, (q31_t)0xf099737d,\n    (q31_t)0x7f11336d, (q31_t)0xf09336b2, (q31_t)0x7f107170, (q31_t)0xf08cf9f1,\n    (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0eec8b, (q31_t)0xf080808b,\n    (q31_t)0x7f0e29a3, (q31_t)0xf07a43e7, (q31_t)0x7f0d666c, (q31_t)0xf074074c,\n    (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba, (q31_t)0x7f0bdf14, (q31_t)0xf0678e32,\n    (q31_t)0x7f0b1af2, (q31_t)0xf06151b4, (q31_t)0x7f0a5682, (q31_t)0xf05b1540,\n    (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f08ccb7, (q31_t)0xf04e9c73,\n    (q31_t)0x7f08075c, (q31_t)0xf048601c, (q31_t)0x7f0741b2, (q31_t)0xf04223ce,\n    (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f05b574, (q31_t)0xf035ab4f,\n    (q31_t)0x7f04eedf, (q31_t)0xf02f6f1f, (q31_t)0x7f0427fc, (q31_t)0xf02932f8,\n    (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f02994b, (q31_t)0xf01cbac7,\n    (q31_t)0x7f01d17d, (q31_t)0xf0167ebd, (q31_t)0x7f010961, (q31_t)0xf01042be,\n    (q31_t)0x7f0040f6, (q31_t)0xf00a06c8, (q31_t)0x7eff783d, (q31_t)0xf003cadc,\n    (q31_t)0x7efeaf36, (q31_t)0xeffd8ef9, (q31_t)0x7efde5e0, (q31_t)0xeff75321,\n    (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7efc524a, (q31_t)0xefeadb8e,\n    (q31_t)0x7efb8809, (q31_t)0xefe49fd3, (q31_t)0x7efabd7a, (q31_t)0xefde6423,\n    (q31_t)0x7ef9f29d, (q31_t)0xefd8287c, (q31_t)0x7ef92771, (q31_t)0xefd1ecdf,\n    (q31_t)0x7ef85bf7, (q31_t)0xefcbb14c, (q31_t)0x7ef7902f, (q31_t)0xefc575c3,\n    (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef5f7b3, (q31_t)0xefb8fed0,\n    (q31_t)0x7ef52b00, (q31_t)0xefb2c365, (q31_t)0x7ef45dfe, (q31_t)0xefac8804,\n    (q31_t)0x7ef390ae, (q31_t)0xefa64cae, (q31_t)0x7ef2c310, (q31_t)0xefa01161,\n    (q31_t)0x7ef1f524, (q31_t)0xef99d61f, (q31_t)0x7ef126e9, (q31_t)0xef939ae6,\n    (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eef8988, (q31_t)0xef872494,\n    (q31_t)0x7eeeba62, (q31_t)0xef80e97a, (q31_t)0x7eedeaee, (q31_t)0xef7aae6b,\n    (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7eec4b1b, (q31_t)0xef6e386a,\n    (q31_t)0x7eeb7abc, (q31_t)0xef67fd79, (q31_t)0x7eeaaa0f, (q31_t)0xef61c292,\n    (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee907ca, (q31_t)0xef554ce3,\n    (q31_t)0x7ee83632, (q31_t)0xef4f121b, (q31_t)0x7ee7644c, (q31_t)0xef48d75d,\n    (q31_t)0x7ee69217, (q31_t)0xef429caa, (q31_t)0x7ee5bf94, (q31_t)0xef3c6201,\n    (q31_t)0x7ee4ecc3, (q31_t)0xef362762, (q31_t)0x7ee419a3, (q31_t)0xef2feccd,\n    (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7ee2727a, (q31_t)0xef2377c4,\n    (q31_t)0x7ee19e6f, (q31_t)0xef1d3d4e, (q31_t)0x7ee0ca17, (q31_t)0xef1702e4,\n    (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edf207b, (q31_t)0xef0a8e2d,\n    (q31_t)0x7ede4b38, (q31_t)0xef0453e2, (q31_t)0x7edd75a6, (q31_t)0xeefe19a1,\n    (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7edbc998, (q31_t)0xeef1a53e,\n    (q31_t)0x7edaf31c, (q31_t)0xeeeb6b1c, (q31_t)0x7eda1c51, (q31_t)0xeee53105,\n    (q31_t)0x7ed94538, (q31_t)0xeedef6f9, (q31_t)0x7ed86dd1, (q31_t)0xeed8bcf7,\n    (q31_t)0x7ed7961c, (q31_t)0xeed28300, (q31_t)0x7ed6be18, (q31_t)0xeecc4913,\n    (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed50d26, (q31_t)0xeebfd55a,\n    (q31_t)0x7ed43438, (q31_t)0xeeb99b8d, (q31_t)0x7ed35afb, (q31_t)0xeeb361cb,\n    (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ed1a798, (q31_t)0xeea6ee66,\n    (q31_t)0x7ed0cd70, (q31_t)0xeea0b4c4, (q31_t)0x7ecff2fb, (q31_t)0xee9a7b2d,\n    (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ece3d25, (q31_t)0xee8e081e,\n    (q31_t)0x7ecd61c5, (q31_t)0xee87cea7, (q31_t)0x7ecc8617, (q31_t)0xee81953b,\n    (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9, (q31_t)0x7ecacdd0, (q31_t)0xee752283,\n    (q31_t)0x7ec9f137, (q31_t)0xee6ee937, (q31_t)0x7ec9144f, (q31_t)0xee68aff6,\n    (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec75996, (q31_t)0xee5c3d94,\n    (q31_t)0x7ec67bc5, (q31_t)0xee560473, (q31_t)0x7ec59da5, (q31_t)0xee4fcb5e,\n    (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec3e07a, (q31_t)0xee435953,\n    (q31_t)0x7ec3016f, (q31_t)0xee3d205e, (q31_t)0x7ec22217, (q31_t)0xee36e775,\n    (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ec0627a, (q31_t)0xee2a75c2,\n    (q31_t)0x7ebf8237, (q31_t)0xee243cf9, (q31_t)0x7ebea1a6, (q31_t)0xee1e043b,\n    (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88, (q31_t)0x7ebcdf98, (q31_t)0xee1192e0,\n    (q31_t)0x7ebbfe1c, (q31_t)0xee0b5a43, (q31_t)0x7ebb1c52, (q31_t)0xee0521b2,\n    (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb957d2, (q31_t)0xedf8b0b0,\n    (q31_t)0x7eb8751e, (q31_t)0xedf2783f, (q31_t)0x7eb7921b, (q31_t)0xedec3fda,\n    (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb5cb2a, (q31_t)0xeddfcf31,\n    (q31_t)0x7eb4e73d, (q31_t)0xedd996ed, (q31_t)0x7eb40301, (q31_t)0xedd35eb5,\n    (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eb239a0, (q31_t)0xedc6ee65,\n    (q31_t)0x7eb1547a, (q31_t)0xedc0b64e, (q31_t)0x7eb06f05, (q31_t)0xedba7e43,\n    (q31_t)0x7eaf8943, (q31_t)0xedb44642, (q31_t)0x7eaea333, (q31_t)0xedae0e4d,\n    (q31_t)0x7eadbcd4, (q31_t)0xeda7d664, (q31_t)0x7eacd627, (q31_t)0xeda19e85,\n    (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7eab07e3, (q31_t)0xed952eea,\n    (q31_t)0x7eaa204c, (q31_t)0xed8ef72e, (q31_t)0x7ea93867, (q31_t)0xed88bf7d,\n    (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea767b2, (q31_t)0xed7c503d,\n    (q31_t)0x7ea67ee2, (q31_t)0xed7618ae, (q31_t)0x7ea595c4, (q31_t)0xed6fe12b,\n    (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea3c29e, (q31_t)0xed637246,\n    (q31_t)0x7ea2d896, (q31_t)0xed5d3ae5, (q31_t)0x7ea1ee3f, (q31_t)0xed570390,\n    (q31_t)0x7ea1039b, (q31_t)0xed50cc46, (q31_t)0x7ea018a8, (q31_t)0xed4a9507,\n    (q31_t)0x7e9f2d68, (q31_t)0xed445dd5, (q31_t)0x7e9e41d9, (q31_t)0xed3e26ad,\n    (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e9c69d1, (q31_t)0xed31b881,\n    (q31_t)0x7e9b7d58, (q31_t)0xed2b817d, (q31_t)0x7e9a9091, (q31_t)0xed254a84,\n    (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e98b618, (q31_t)0xed18dcb5,\n    (q31_t)0x7e97c867, (q31_t)0xed12a5df, (q31_t)0x7e96da67, (q31_t)0xed0c6f14,\n    (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e94fd7e, (q31_t)0xed0001a3,\n    (q31_t)0x7e940e94, (q31_t)0xecf9cafb, (q31_t)0x7e931f5c, (q31_t)0xecf39460,\n    (q31_t)0x7e922fd6, (q31_t)0xeced5dd0, (q31_t)0x7e914002, (q31_t)0xece7274c,\n    (q31_t)0x7e904fe0, (q31_t)0xece0f0d4, (q31_t)0x7e8f5f70, (q31_t)0xecdaba67,\n    (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8d7da6, (q31_t)0xecce4db2,\n    (q31_t)0x7e8c8c4b, (q31_t)0xecc81769, (q31_t)0x7e8b9aa3, (q31_t)0xecc1e12c,\n    (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e89b668, (q31_t)0xecb574d5,\n    (q31_t)0x7e88c3d5, (q31_t)0xecaf3ebc, (q31_t)0x7e87d0f5, (q31_t)0xeca908ae,\n    (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e85ea49, (q31_t)0xec9c9cb7,\n    (q31_t)0x7e84f67e, (q31_t)0xec9666cd, (q31_t)0x7e840265, (q31_t)0xec9030f0,\n    (q31_t)0x7e830dff, (q31_t)0xec89fb1e, (q31_t)0x7e82194a, (q31_t)0xec83c558,\n    (q31_t)0x7e812447, (q31_t)0xec7d8f9e, (q31_t)0x7e802ef6, (q31_t)0xec7759f1,\n    (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7e436a, (q31_t)0xec6aeeba,\n    (q31_t)0x7e7d4d2f, (q31_t)0xec64b930, (q31_t)0x7e7c56a5, (q31_t)0xec5e83b3,\n    (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e7a68a9, (q31_t)0xec5218dc,\n    (q31_t)0x7e797136, (q31_t)0xec4be383, (q31_t)0x7e787975, (q31_t)0xec45ae36,\n    (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e768908, (q31_t)0xec3943c1,\n    (q31_t)0x7e75905d, (q31_t)0xec330e99, (q31_t)0x7e749764, (q31_t)0xec2cd97d,\n    (q31_t)0x7e739e1d, (q31_t)0xec26a46d, (q31_t)0x7e72a488, (q31_t)0xec206f69,\n    (q31_t)0x7e71aaa4, (q31_t)0xec1a3a72, (q31_t)0x7e70b073, (q31_t)0xec140587,\n    (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6ebb27, (q31_t)0xec079bd6,\n    (q31_t)0x7e6dc00c, (q31_t)0xec01670f, (q31_t)0x7e6cc4a2, (q31_t)0xebfb3256,\n    (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e6acce6, (q31_t)0xebeec907,\n    (q31_t)0x7e69d093, (q31_t)0xebe89472, (q31_t)0x7e68d3f2, (q31_t)0xebe25fea,\n    (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e66d9c6, (q31_t)0xebd5f6fe,\n    (q31_t)0x7e65dc3b, (q31_t)0xebcfc29b, (q31_t)0x7e64de62, (q31_t)0xebc98e45,\n    (q31_t)0x7e63e03b, (q31_t)0xebc359fb, (q31_t)0x7e62e1c6, (q31_t)0xebbd25bd,\n    (q31_t)0x7e61e303, (q31_t)0xebb6f18c, (q31_t)0x7e60e3f2, (q31_t)0xebb0bd67,\n    (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5ee4e6, (q31_t)0xeba45543,\n    (q31_t)0x7e5de4ec, (q31_t)0xeb9e2144, (q31_t)0x7e5ce4a3, (q31_t)0xeb97ed52,\n    (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e5ae328, (q31_t)0xeb8b8593,\n    (q31_t)0x7e59e1f5, (q31_t)0xeb8551c6, (q31_t)0x7e58e075, (q31_t)0xeb7f1e06,\n    (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e56dc8a, (q31_t)0xeb72b6ac,\n    (q31_t)0x7e55da20, (q31_t)0xeb6c8312, (q31_t)0x7e54d768, (q31_t)0xeb664f84,\n    (q31_t)0x7e53d462, (q31_t)0xeb601c04, (q31_t)0x7e52d10e, (q31_t)0xeb59e890,\n    (q31_t)0x7e51cd6c, (q31_t)0xeb53b529, (q31_t)0x7e50c97c, (q31_t)0xeb4d81ce,\n    (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4ec0b2, (q31_t)0xeb411b40,\n    (q31_t)0x7e4dbbd9, (q31_t)0xeb3ae80c, (q31_t)0x7e4cb6b1, (q31_t)0xeb34b4e4,\n    (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e4aab78, (q31_t)0xeb284ebc,\n    (q31_t)0x7e49a567, (q31_t)0xeb221bbb, (q31_t)0x7e489f08, (q31_t)0xeb1be8c8,\n    (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e469160, (q31_t)0xeb0f8307,\n    (q31_t)0x7e458a17, (q31_t)0xeb095039, (q31_t)0x7e448281, (q31_t)0xeb031d79,\n    (q31_t)0x7e437a9c, (q31_t)0xeafceac6, (q31_t)0x7e427269, (q31_t)0xeaf6b81f,\n    (q31_t)0x7e4169e9, (q31_t)0xeaf08586, (q31_t)0x7e40611b, (q31_t)0xeaea52fa,\n    (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3e4e95, (q31_t)0xeaddee08,\n    (q31_t)0x7e3d44dd, (q31_t)0xead7bba3, (q31_t)0x7e3c3ad7, (q31_t)0xead1894b,\n    (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e3a25e2, (q31_t)0xeac524c1,\n    (q31_t)0x7e391af3, (q31_t)0xeabef290, (q31_t)0x7e380fb5, (q31_t)0xeab8c06c,\n    (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e35f851, (q31_t)0xeaac5c4c,\n    (q31_t)0x7e34ec2b, (q31_t)0xeaa62a4f, (q31_t)0x7e33dfb6, (q31_t)0xea9ff860,\n    (q31_t)0x7e32d2f4, (q31_t)0xea99c67e, (q31_t)0x7e31c5e3, (q31_t)0xea9394a9,\n    (q31_t)0x7e30b885, (q31_t)0xea8d62e1, (q31_t)0x7e2faad9, (q31_t)0xea873127,\n    (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2d8e97, (q31_t)0xea7acdda,\n    (q31_t)0x7e2c8002, (q31_t)0xea749c47, (q31_t)0x7e2b711f, (q31_t)0xea6e6ac2,\n    (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e29526e, (q31_t)0xea6207df,\n    (q31_t)0x7e2842a2, (q31_t)0xea5bd681, (q31_t)0x7e273287, (q31_t)0xea55a531,\n    (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e251168, (q31_t)0xea4942b9,\n    (q31_t)0x7e240064, (q31_t)0xea431191, (q31_t)0x7e22ef12, (q31_t)0xea3ce077,\n    (q31_t)0x7e21dd73, (q31_t)0xea36af69, (q31_t)0x7e20cb85, (q31_t)0xea307e6a,\n    (q31_t)0x7e1fb94a, (q31_t)0xea2a4d78, (q31_t)0x7e1ea6c1, (q31_t)0xea241c93,\n    (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e1c80c5, (q31_t)0xea17baf2,\n    (q31_t)0x7e1b6d53, (q31_t)0xea118a35, (q31_t)0x7e1a5992, (q31_t)0xea0b5987,\n    (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e183128, (q31_t)0xe9fef852,\n    (q31_t)0x7e171c7f, (q31_t)0xe9f8c7cc, (q31_t)0x7e160787, (q31_t)0xe9f29753,\n    (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e13dcaf, (q31_t)0xe9e6368b,\n    (q31_t)0x7e12c6ce, (q31_t)0xe9e0063c, (q31_t)0x7e11b0a0, (q31_t)0xe9d9d5fa,\n    (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5, (q31_t)0x7e0f835a, (q31_t)0xe9cd759f,\n    (q31_t)0x7e0e6c42, (q31_t)0xe9c74586, (q31_t)0x7e0d54dc, (q31_t)0xe9c1157a,\n    (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e0b2528, (q31_t)0xe9b4b58d,\n    (q31_t)0x7e0a0cd9, (q31_t)0xe9ae85ab, (q31_t)0x7e08f43d, (q31_t)0xe9a855d7,\n    (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e06c21a, (q31_t)0xe99bf658,\n    (q31_t)0x7e05a894, (q31_t)0xe995c6ad, (q31_t)0x7e048ec1, (q31_t)0xe98f9710,\n    (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7e025a31, (q31_t)0xe98337ff,\n    (q31_t)0x7e013f74, (q31_t)0xe97d088c, (q31_t)0x7e00246a, (q31_t)0xe976d926,\n    (q31_t)0x7dff0911, (q31_t)0xe970a9ce, (q31_t)0x7dfded6c, (q31_t)0xe96a7a85,\n    (q31_t)0x7dfcd178, (q31_t)0xe9644b49, (q31_t)0x7dfbb537, (q31_t)0xe95e1c1b,\n    (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df97bcb, (q31_t)0xe951bde9,\n    (q31_t)0x7df85ea0, (q31_t)0xe94b8ee5, (q31_t)0x7df74128, (q31_t)0xe9455fef,\n    (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df5054f, (q31_t)0xe939022d,\n    (q31_t)0x7df3e6ee, (q31_t)0xe932d361, (q31_t)0x7df2c83f, (q31_t)0xe92ca4a4,\n    (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7df089f8, (q31_t)0xe9204752,\n    (q31_t)0x7def6a60, (q31_t)0xe91a18bf, (q31_t)0x7dee4a7a, (q31_t)0xe913ea39,\n    (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2, (q31_t)0x7dec09c6, (q31_t)0xe9078d59,\n    (q31_t)0x7deae8f7, (q31_t)0xe9015efe, (q31_t)0x7de9c7da, (q31_t)0xe8fb30b1,\n    (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de784b9, (q31_t)0xe8eed443,\n    (q31_t)0x7de662b3, (q31_t)0xe8e8a621, (q31_t)0x7de54060, (q31_t)0xe8e2780d,\n    (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7de2fad1, (q31_t)0xe8d61c10,\n    (q31_t)0x7de1d795, (q31_t)0xe8cfee27, (q31_t)0x7de0b40b, (q31_t)0xe8c9c04c,\n    (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7dde6c0f, (q31_t)0xe8bd64c2,\n    (q31_t)0x7ddd479d, (q31_t)0xe8b73712, (q31_t)0x7ddc22dc, (q31_t)0xe8b10971,\n    (q31_t)0x7ddafdce, (q31_t)0xe8aadbde, (q31_t)0x7dd9d873, (q31_t)0xe8a4ae59,\n    (q31_t)0x7dd8b2ca, (q31_t)0xe89e80e3, (q31_t)0x7dd78cd3, (q31_t)0xe898537b,\n    (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd53ffc, (q31_t)0xe88bf8d7,\n    (q31_t)0x7dd4191d, (q31_t)0xe885cb9a, (q31_t)0x7dd2f1f0, (q31_t)0xe87f9e6c,\n    (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dd0a2ac, (q31_t)0xe873443c,\n    (q31_t)0x7dcf7a96, (q31_t)0xe86d173a, (q31_t)0x7dce5232, (q31_t)0xe866ea46,\n    (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dcc0082, (q31_t)0xe85a908a,\n    (q31_t)0x7dcad736, (q31_t)0xe85463c2, (q31_t)0x7dc9ad9c, (q31_t)0xe84e3708,\n    (q31_t)0x7dc883b4, (q31_t)0xe8480a5d, (q31_t)0x7dc7597f, (q31_t)0xe841ddc1,\n    (q31_t)0x7dc62efc, (q31_t)0xe83bb133, (q31_t)0x7dc5042b, (q31_t)0xe83584b4,\n    (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dc2ada2, (q31_t)0xe8292be3,\n    (q31_t)0x7dc181e8, (q31_t)0xe822ff90, (q31_t)0x7dc055e2, (q31_t)0xe81cd34b,\n    (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dbdfceb, (q31_t)0xe8107aef,\n    (q31_t)0x7dbccffc, (q31_t)0xe80a4ed7, (q31_t)0x7dbba2bf, (q31_t)0xe80422ce,\n    (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db9475c, (q31_t)0xe7f7cae8,\n    (q31_t)0x7db81936, (q31_t)0xe7f19f0c, (q31_t)0x7db6eac3, (q31_t)0xe7eb733e,\n    (q31_t)0x7db5bc02, (q31_t)0xe7e5477f, (q31_t)0x7db48cf4, (q31_t)0xe7df1bcf,\n    (q31_t)0x7db35d98, (q31_t)0xe7d8f02d, (q31_t)0x7db22def, (q31_t)0xe7d2c49b,\n    (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dafcdb3, (q31_t)0xe7c66da3,\n    (q31_t)0x7dae9d21, (q31_t)0xe7c0423d, (q31_t)0x7dad6c42, (q31_t)0xe7ba16e7,\n    (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f, (q31_t)0x7dab099a, (q31_t)0xe7adc066,\n    (q31_t)0x7da9d7d2, (q31_t)0xe7a7953d, (q31_t)0x7da8a5bc, (q31_t)0xe7a16a22,\n    (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da640a9, (q31_t)0xe795141a,\n    (q31_t)0x7da50dab, (q31_t)0xe78ee92c, (q31_t)0x7da3da5f, (q31_t)0xe788be4e,\n    (q31_t)0x7da2a6c6, (q31_t)0xe782937e, (q31_t)0x7da172df, (q31_t)0xe77c68be,\n    (q31_t)0x7da03eab, (q31_t)0xe7763e0d, (q31_t)0x7d9f0a29, (q31_t)0xe770136b,\n    (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d9ca03e, (q31_t)0xe763be55,\n    (q31_t)0x7d9b6ad3, (q31_t)0xe75d93e0, (q31_t)0x7d9a351c, (q31_t)0xe757697b,\n    (q31_t)0x7d98ff17, (q31_t)0xe7513f25, (q31_t)0x7d97c8c4, (q31_t)0xe74b14de,\n    (q31_t)0x7d969224, (q31_t)0xe744eaa6, (q31_t)0x7d955b37, (q31_t)0xe73ec07e,\n    (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d92ec73, (q31_t)0xe7326c5b,\n    (q31_t)0x7d91b49e, (q31_t)0xe72c4260, (q31_t)0x7d907c7a, (q31_t)0xe7261875,\n    (q31_t)0x7d8f4409, (q31_t)0xe71fee99, (q31_t)0x7d8e0b4b, (q31_t)0xe719c4cd,\n    (q31_t)0x7d8cd240, (q31_t)0xe7139b10, (q31_t)0x7d8b98e6, (q31_t)0xe70d7162,\n    (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d89254c, (q31_t)0xe7011e35,\n    (q31_t)0x7d87eb0a, (q31_t)0xe6faf4b5, (q31_t)0x7d86b07c, (q31_t)0xe6f4cb45,\n    (q31_t)0x7d85759f, (q31_t)0xe6eea1e4, (q31_t)0x7d843a76, (q31_t)0xe6e87893,\n    (q31_t)0x7d82fefe, (q31_t)0xe6e24f51, (q31_t)0x7d81c33a, (q31_t)0xe6dc261f,\n    (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7f4ac8, (q31_t)0xe6cfd3e9,\n    (q31_t)0x7d7e0e1c, (q31_t)0xe6c9aae5, (q31_t)0x7d7cd121, (q31_t)0xe6c381f1,\n    (q31_t)0x7d7b93da, (q31_t)0xe6bd590d, (q31_t)0x7d7a5645, (q31_t)0xe6b73038,\n    (q31_t)0x7d791862, (q31_t)0xe6b10772, (q31_t)0x7d77da32, (q31_t)0xe6aadebc,\n    (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d755cea, (q31_t)0xe69e8d80,\n    (q31_t)0x7d741dd2, (q31_t)0xe69864f9, (q31_t)0x7d72de6d, (q31_t)0xe6923c82,\n    (q31_t)0x7d719eba, (q31_t)0xe68c141a, (q31_t)0x7d705eba, (q31_t)0xe685ebc2,\n    (q31_t)0x7d6f1e6c, (q31_t)0xe67fc37a, (q31_t)0x7d6dddd2, (q31_t)0xe6799b42,\n    (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d6b5bb4, (q31_t)0xe66d4b01,\n    (q31_t)0x7d6a1a31, (q31_t)0xe66722f7, (q31_t)0x7d68d860, (q31_t)0xe660fafe,\n    (q31_t)0x7d679642, (q31_t)0xe65ad315, (q31_t)0x7d6653d7, (q31_t)0xe654ab3b,\n    (q31_t)0x7d65111f, (q31_t)0xe64e8371, (q31_t)0x7d63ce19, (q31_t)0xe6485bb7,\n    (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d614725, (q31_t)0xe63c0c73,\n    (q31_t)0x7d600338, (q31_t)0xe635e4e9, (q31_t)0x7d5ebefc, (q31_t)0xe62fbd6e,\n    (q31_t)0x7d5d7a74, (q31_t)0xe6299604, (q31_t)0x7d5c359e, (q31_t)0xe6236ea9,\n    (q31_t)0x7d5af07b, (q31_t)0xe61d475e, (q31_t)0x7d59ab0a, (q31_t)0xe6172024,\n    (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d571f41, (q31_t)0xe60ad1de,\n    (q31_t)0x7d55d8e9, (q31_t)0xe604aad4, (q31_t)0x7d549243, (q31_t)0xe5fe83d9,\n    (q31_t)0x7d534b50, (q31_t)0xe5f85cef, (q31_t)0x7d520410, (q31_t)0xe5f23614,\n    (q31_t)0x7d50bc82, (q31_t)0xe5ec0f4a, (q31_t)0x7d4f74a7, (q31_t)0xe5e5e88f,\n    (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4ce409, (q31_t)0xe5d99b4b,\n    (q31_t)0x7d4b9b46, (q31_t)0xe5d374c1, (q31_t)0x7d4a5236, (q31_t)0xe5cd4e47,\n    (q31_t)0x7d4908d9, (q31_t)0xe5c727dd, (q31_t)0x7d47bf2e, (q31_t)0xe5c10184,\n    (q31_t)0x7d467536, (q31_t)0xe5badb3a, (q31_t)0x7d452af1, (q31_t)0xe5b4b501,\n    (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d42957e, (q31_t)0xe5a868bf,\n    (q31_t)0x7d414a51, (q31_t)0xe5a242b7, (q31_t)0x7d3ffed7, (q31_t)0xe59c1cbf,\n    (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7, (q31_t)0x7d3d66fa, (q31_t)0xe58fd0ff,\n    (q31_t)0x7d3c1a98, (q31_t)0xe589ab38, (q31_t)0x7d3acde9, (q31_t)0xe5838581,\n    (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3833a2, (q31_t)0xe5773a44,\n    (q31_t)0x7d36e60b, (q31_t)0xe57114be, (q31_t)0x7d359827, (q31_t)0xe56aef49,\n    (q31_t)0x7d3449f5, (q31_t)0xe564c9e3, (q31_t)0x7d32fb76, (q31_t)0xe55ea48f,\n    (q31_t)0x7d31acaa, (q31_t)0xe5587f4a, (q31_t)0x7d305d91, (q31_t)0xe5525a17,\n    (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d2dbe77, (q31_t)0xe5460fe0,\n    (q31_t)0x7d2c6e76, (q31_t)0xe53feade, (q31_t)0x7d2b1e28, (q31_t)0xe539c5ec,\n    (q31_t)0x7d29cd8c, (q31_t)0xe533a10a, (q31_t)0x7d287ca4, (q31_t)0xe52d7c39,\n    (q31_t)0x7d272b6e, (q31_t)0xe5275779, (q31_t)0x7d25d9eb, (q31_t)0xe52132c9,\n    (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d2335fe, (q31_t)0xe514e99b,\n    (q31_t)0x7d21e393, (q31_t)0xe50ec51d, (q31_t)0x7d2090db, (q31_t)0xe508a0b0,\n    (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53, (q31_t)0x7d1dea84, (q31_t)0xe4fc5807,\n    (q31_t)0x7d1c96e5, (q31_t)0xe4f633cc, (q31_t)0x7d1b42f9, (q31_t)0xe4f00fa1,\n    (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d189a38, (q31_t)0xe4e3c77d,\n    (q31_t)0x7d174564, (q31_t)0xe4dda385, (q31_t)0x7d15f043, (q31_t)0xe4d77f9d,\n    (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6, (q31_t)0x7d134519, (q31_t)0xe4cb37ff,\n    (q31_t)0x7d11ef11, (q31_t)0xe4c5144a, (q31_t)0x7d1098bb, (q31_t)0xe4bef0a5,\n    (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d0deb28, (q31_t)0xe4b2a98e,\n    (q31_t)0x7d0c93eb, (q31_t)0xe4ac861b, (q31_t)0x7d0b3c60, (q31_t)0xe4a662ba,\n    (q31_t)0x7d09e489, (q31_t)0xe4a03f69, (q31_t)0x7d088c64, (q31_t)0xe49a1c29,\n    (q31_t)0x7d0733f3, (q31_t)0xe493f8fb, (q31_t)0x7d05db34, (q31_t)0xe48dd5dd,\n    (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7d0328cf, (q31_t)0xe4818fd4,\n    (q31_t)0x7d01cf29, (q31_t)0xe47b6ce9, (q31_t)0x7d007535, (q31_t)0xe4754a0e,\n    (q31_t)0x7cff1af5, (q31_t)0xe46f2745, (q31_t)0x7cfdc068, (q31_t)0xe469048d,\n    (q31_t)0x7cfc658d, (q31_t)0xe462e1e6, (q31_t)0x7cfb0a65, (q31_t)0xe45cbf50,\n    (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf8532f, (q31_t)0xe4507a57,\n    (q31_t)0x7cf6f720, (q31_t)0xe44a57f4, (q31_t)0x7cf59ac4, (q31_t)0xe44435a2,\n    (q31_t)0x7cf43e1a, (q31_t)0xe43e1362, (q31_t)0x7cf2e124, (q31_t)0xe437f132,\n    (q31_t)0x7cf183e1, (q31_t)0xe431cf14, (q31_t)0x7cf02651, (q31_t)0xe42bad07,\n    (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ced6a49, (q31_t)0xe41f6920,\n    (q31_t)0x7cec0bd1, (q31_t)0xe4194746, (q31_t)0x7ceaad0c, (q31_t)0xe413257d,\n    (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6, (q31_t)0x7ce7ee9c, (q31_t)0xe406e220,\n    (q31_t)0x7ce68ef0, (q31_t)0xe400c08b, (q31_t)0x7ce52ef7, (q31_t)0xe3fa9f08,\n    (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ce26e1f, (q31_t)0xe3ee5c35,\n    (q31_t)0x7ce10d3f, (q31_t)0xe3e83ae5, (q31_t)0x7cdfac12, (q31_t)0xe3e219a7,\n    (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a, (q31_t)0x7cdce8d1, (q31_t)0xe3d5d75e,\n    (q31_t)0x7cdb86bd, (q31_t)0xe3cfb654, (q31_t)0x7cda245c, (q31_t)0xe3c9955b,\n    (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd75eb3, (q31_t)0xe3bd539e,\n    (q31_t)0x7cd5fb6a, (q31_t)0xe3b732d9, (q31_t)0x7cd497d5, (q31_t)0xe3b11226,\n    (q31_t)0x7cd333f3, (q31_t)0xe3aaf184, (q31_t)0x7cd1cfc4, (q31_t)0xe3a4d0f4,\n    (q31_t)0x7cd06b48, (q31_t)0xe39eb075, (q31_t)0x7ccf067f, (q31_t)0xe3989008,\n    (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7ccc3c06, (q31_t)0xe38c4f63,\n    (q31_t)0x7ccad656, (q31_t)0xe3862f2a, (q31_t)0x7cc97059, (q31_t)0xe3800f03,\n    (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc6a378, (q31_t)0xe373ceea,\n    (q31_t)0x7cc53c94, (q31_t)0xe36daef7, (q31_t)0x7cc3d563, (q31_t)0xe3678f17,\n    (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cc1061a, (q31_t)0xe35b4f8b,\n    (q31_t)0x7cbf9e03, (q31_t)0xe3552fdf, (q31_t)0x7cbe359e, (q31_t)0xe34f1045,\n    (q31_t)0x7cbcccec, (q31_t)0xe348f0bd, (q31_t)0x7cbb63ee, (q31_t)0xe342d146,\n    (q31_t)0x7cb9faa2, (q31_t)0xe33cb1e1, (q31_t)0x7cb8910a, (q31_t)0xe336928e,\n    (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb5bcf2, (q31_t)0xe32a541d,\n    (q31_t)0x7cb45272, (q31_t)0xe3243500, (q31_t)0x7cb2e7a6, (q31_t)0xe31e15f4,\n    (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa, (q31_t)0x7cb01127, (q31_t)0xe311d811,\n    (q31_t)0x7caea574, (q31_t)0xe30bb93b, (q31_t)0x7cad3974, (q31_t)0xe3059a76,\n    (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7caa608e, (q31_t)0xe2f95d23,\n    (q31_t)0x7ca8f3a7, (q31_t)0xe2f33e94, (q31_t)0x7ca78674, (q31_t)0xe2ed2017,\n    (q31_t)0x7ca618f3, (q31_t)0xe2e701ac, (q31_t)0x7ca4ab26, (q31_t)0xe2e0e352,\n    (q31_t)0x7ca33d0c, (q31_t)0xe2dac50b, (q31_t)0x7ca1cea5, (q31_t)0xe2d4a6d6,\n    (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9ef0f0, (q31_t)0xe2c86aa2,\n    (q31_t)0x7c9d81a3, (q31_t)0xe2c24ca2, (q31_t)0x7c9c1208, (q31_t)0xe2bc2eb5,\n    (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c9931ec, (q31_t)0xe2aff311,\n    (q31_t)0x7c97c16b, (q31_t)0xe2a9d55a, (q31_t)0x7c96509d, (q31_t)0xe2a3b7b5,\n    (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c936e1b, (q31_t)0xe2977ca2,\n    (q31_t)0x7c91fc66, (q31_t)0xe2915f34, (q31_t)0x7c908a65, (q31_t)0xe28b41d7,\n    (q31_t)0x7c8f1817, (q31_t)0xe285248d, (q31_t)0x7c8da57c, (q31_t)0xe27f0755,\n    (q31_t)0x7c8c3294, (q31_t)0xe278ea30, (q31_t)0x7c8abf5f, (q31_t)0xe272cd1c,\n    (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c87d810, (q31_t)0xe266932c,\n    (q31_t)0x7c8663f4, (q31_t)0xe260764f, (q31_t)0x7c84ef8c, (q31_t)0xe25a5984,\n    (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c8205d6, (q31_t)0xe24e2026,\n    (q31_t)0x7c809088, (q31_t)0xe2480393, (q31_t)0x7c7f1aed, (q31_t)0xe241e711,\n    (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c7c2ed0, (q31_t)0xe235ae46,\n    (q31_t)0x7c7ab84e, (q31_t)0xe22f91fc, (q31_t)0x7c794180, (q31_t)0xe22975c4,\n    (q31_t)0x7c77ca65, (q31_t)0xe223599e, (q31_t)0x7c7652fd, (q31_t)0xe21d3d8b,\n    (q31_t)0x7c74db48, (q31_t)0xe217218b, (q31_t)0x7c736347, (q31_t)0xe211059d,\n    (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c70725e, (q31_t)0xe204cdf8,\n    (q31_t)0x7c6ef976, (q31_t)0xe1feb241, (q31_t)0x7c6d8041, (q31_t)0xe1f8969d,\n    (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c6a8cf2, (q31_t)0xe1ec5f8c,\n    (q31_t)0x7c6912d7, (q31_t)0xe1e64420, (q31_t)0x7c679870, (q31_t)0xe1e028c6,\n    (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c64a2bb, (q31_t)0xe1d3f24a,\n    (q31_t)0x7c63276d, (q31_t)0xe1cdd727, (q31_t)0x7c61abd3, (q31_t)0xe1c7bc18,\n    (q31_t)0x7c602fec, (q31_t)0xe1c1a11b, (q31_t)0x7c5eb3b8, (q31_t)0xe1bb8631,\n    (q31_t)0x7c5d3737, (q31_t)0xe1b56b59, (q31_t)0x7c5bba6a, (q31_t)0xe1af5094,\n    (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c58bfe9, (q31_t)0xe1a31b42,\n    (q31_t)0x7c574236, (q31_t)0xe19d00b6, (q31_t)0x7c55c436, (q31_t)0xe196e63c,\n    (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c52c74f, (q31_t)0xe18ab180,\n    (q31_t)0x7c514869, (q31_t)0xe184973e, (q31_t)0x7c4fc936, (q31_t)0xe17e7d0f,\n    (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4cc9ea, (q31_t)0xe17248ea,\n    (q31_t)0x7c4b49d2, (q31_t)0xe16c2ef4, (q31_t)0x7c49c96c, (q31_t)0xe1661510,\n    (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f, (q31_t)0x7c46c7bb, (q31_t)0xe159e182,\n    (q31_t)0x7c45466f, (q31_t)0xe153c7d7, (q31_t)0x7c43c4d7, (q31_t)0xe14dae3f,\n    (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c40c0c1, (q31_t)0xe1417b48,\n    (q31_t)0x7c3f3e42, (q31_t)0xe13b61e9, (q31_t)0x7c3dbb78, (q31_t)0xe135489d,\n    (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c3ab4fc, (q31_t)0xe129163d,\n    (q31_t)0x7c39314b, (q31_t)0xe122fd2a, (q31_t)0x7c37ad4e, (q31_t)0xe11ce42a,\n    (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c34a46d, (q31_t)0xe110b263,\n    (q31_t)0x7c331f8a, (q31_t)0xe10a999c, (q31_t)0x7c319a5a, (q31_t)0xe10480e9,\n    (q31_t)0x7c3014de, (q31_t)0xe0fe6848, (q31_t)0x7c2e8f15, (q31_t)0xe0f84fbb,\n    (q31_t)0x7c2d08ff, (q31_t)0xe0f23740, (q31_t)0x7c2b829d, (q31_t)0xe0ec1ed9,\n    (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c2874f3, (q31_t)0xe0dfee44,\n    (q31_t)0x7c26edab, (q31_t)0xe0d9d616, (q31_t)0x7c256616, (q31_t)0xe0d3bdfc,\n    (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c225607, (q31_t)0xe0c78e01,\n    (q31_t)0x7c20cd8d, (q31_t)0xe0c17620, (q31_t)0x7c1f44c6, (q31_t)0xe0bb5e53,\n    (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c1c3253, (q31_t)0xe0af2ef2,\n    (q31_t)0x7c1aa8a6, (q31_t)0xe0a9175e, (q31_t)0x7c191ead, (q31_t)0xe0a2ffde,\n    (q31_t)0x7c179467, (q31_t)0xe09ce871, (q31_t)0x7c1609d5, (q31_t)0xe096d117,\n    (q31_t)0x7c147ef6, (q31_t)0xe090b9d1, (q31_t)0x7c12f3cb, (q31_t)0xe08aa29f,\n    (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0fdc8f, (q31_t)0xe07e7473,\n    (q31_t)0x7c0e507e, (q31_t)0xe0785d7b, (q31_t)0x7c0cc421, (q31_t)0xe0724696,\n    (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4, (q31_t)0x7c09aa80, (q31_t)0xe0661906,\n    (q31_t)0x7c081d3d, (q31_t)0xe060025c, (q31_t)0x7c068fae, (q31_t)0xe059ebc5,\n    (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7c0373a9, (q31_t)0xe04dbed1,\n    (q31_t)0x7c01e534, (q31_t)0xe047a875, (q31_t)0x7c005673, (q31_t)0xe041922c,\n    (q31_t)0x7bfec765, (q31_t)0xe03b7bf6, (q31_t)0x7bfd380a, (q31_t)0xe03565d5,\n    (q31_t)0x7bfba863, (q31_t)0xe02f4fc6, (q31_t)0x7bfa1870, (q31_t)0xe02939cc,\n    (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf6f7a4, (q31_t)0xe01d0e12,\n    (q31_t)0x7bf566cb, (q31_t)0xe016f852, (q31_t)0x7bf3d5a6, (q31_t)0xe010e2a7,\n    (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bf0b276, (q31_t)0xe004b78a,\n    (q31_t)0x7bef206b, (q31_t)0xdffea219, (q31_t)0x7bed8e14, (q31_t)0xdff88cbc,\n    (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7bea6880, (q31_t)0xdfec623e,\n    (q31_t)0x7be8d544, (q31_t)0xdfe64d1c, (q31_t)0x7be741bb, (q31_t)0xdfe0380e,\n    (q31_t)0x7be5ade6, (q31_t)0xdfda2314, (q31_t)0x7be419c4, (q31_t)0xdfd40e2e,\n    (q31_t)0x7be28556, (q31_t)0xdfcdf95c, (q31_t)0x7be0f09b, (q31_t)0xdfc7e49d,\n    (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bddc641, (q31_t)0xdfbbbb5c,\n    (q31_t)0x7bdc30a1, (q31_t)0xdfb5a6d9, (q31_t)0x7bda9ab5, (q31_t)0xdfaf926a,\n    (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd76df7, (q31_t)0xdfa369c8,\n    (q31_t)0x7bd5d726, (q31_t)0xdf9d5595, (q31_t)0x7bd44008, (q31_t)0xdf974176,\n    (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bd110e8, (q31_t)0xdf8b1974,\n    (q31_t)0x7bcf78e5, (q31_t)0xdf850591, (q31_t)0x7bcde095, (q31_t)0xdf7ef1c2,\n    (q31_t)0x7bcc47fa, (q31_t)0xdf78de07, (q31_t)0x7bcaaf12, (q31_t)0xdf72ca60,\n    (q31_t)0x7bc915dd, (q31_t)0xdf6cb6cd, (q31_t)0x7bc77c5d, (q31_t)0xdf66a34e,\n    (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bc44876, (q31_t)0xdf5a7c8d,\n    (q31_t)0x7bc2ae10, (q31_t)0xdf54694b, (q31_t)0x7bc1135e, (q31_t)0xdf4e561c,\n    (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bbddd15, (q31_t)0xdf422ffd,\n    (q31_t)0x7bbc417e, (q31_t)0xdf3c1d0b, (q31_t)0x7bbaa59a, (q31_t)0xdf360a2d,\n    (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb76cef, (q31_t)0xdf29e4af,\n    (q31_t)0x7bb5d026, (q31_t)0xdf23d20e, (q31_t)0x7bb43311, (q31_t)0xdf1dbf82,\n    (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a, (q31_t)0x7bb0f803, (q31_t)0xdf119aa6,\n    (q31_t)0x7baf5a09, (q31_t)0xdf0b8856, (q31_t)0x7badbbc3, (q31_t)0xdf05761b,\n    (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7baa7e53, (q31_t)0xdef951e2,\n    (q31_t)0x7ba8df28, (q31_t)0xdef33fe3, (q31_t)0x7ba73fb1, (q31_t)0xdeed2dfa,\n    (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7ba3ffde, (q31_t)0xdee10a63,\n    (q31_t)0x7ba25f82, (q31_t)0xdedaf8b7, (q31_t)0x7ba0beda, (q31_t)0xded4e71f,\n    (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b9d7ca5, (q31_t)0xdec8c42c,\n    (q31_t)0x7b9bdb18, (q31_t)0xdec2b2d1, (q31_t)0x7b9a393f, (q31_t)0xdebca18b,\n    (q31_t)0x7b989719, (q31_t)0xdeb69059, (q31_t)0x7b96f4a8, (q31_t)0xdeb07f3c,\n    (q31_t)0x7b9551ea, (q31_t)0xdeaa6e34, (q31_t)0x7b93aee0, (q31_t)0xdea45d40,\n    (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b9067e7, (q31_t)0xde983b95,\n    (q31_t)0x7b8ec3f8, (q31_t)0xde922adf, (q31_t)0x7b8d1fbd, (q31_t)0xde8c1a3e,\n    (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b89d662, (q31_t)0xde7ff938,\n    (q31_t)0x7b883143, (q31_t)0xde79e8d5, (q31_t)0x7b868bd7, (q31_t)0xde73d886,\n    (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b83401b, (q31_t)0xde67b826,\n    (q31_t)0x7b8199ca, (q31_t)0xde61a815, (q31_t)0x7b7ff32e, (q31_t)0xde5b9819,\n    (q31_t)0x7b7e4c45, (q31_t)0xde558831, (q31_t)0x7b7ca510, (q31_t)0xde4f785f,\n    (q31_t)0x7b7afd8f, (q31_t)0xde4968a1, (q31_t)0x7b7955c2, (q31_t)0xde4358f8,\n    (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b760542, (q31_t)0xde3739e4,\n    (q31_t)0x7b745c91, (q31_t)0xde312a7a, (q31_t)0x7b72b393, (q31_t)0xde2b1b24,\n    (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6f60b2, (q31_t)0xde1efcb7,\n    (q31_t)0x7b6db6d0, (q31_t)0xde18eda0, (q31_t)0x7b6c0ca2, (q31_t)0xde12de9e,\n    (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b68b760, (q31_t)0xde06c0d9,\n    (q31_t)0x7b670c4d, (q31_t)0xde00b216, (q31_t)0x7b6560ee, (q31_t)0xddfaa367,\n    (q31_t)0x7b63b543, (q31_t)0xddf494ce, (q31_t)0x7b62094c, (q31_t)0xddee8649,\n    (q31_t)0x7b605d09, (q31_t)0xdde877da, (q31_t)0x7b5eb079, (q31_t)0xdde26980,\n    (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b5b5676, (q31_t)0xddd64d0a,\n    (q31_t)0x7b59a902, (q31_t)0xddd03eef, (q31_t)0x7b57fb42, (q31_t)0xddca30e9,\n    (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b549ede, (q31_t)0xddbe151d,\n    (q31_t)0x7b52f03a, (q31_t)0xddb80756, (q31_t)0x7b51414a, (q31_t)0xddb1f9a4,\n    (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b4de286, (q31_t)0xdda5de81,\n    (q31_t)0x7b4c32b1, (q31_t)0xdd9fd10f, (q31_t)0x7b4a8291, (q31_t)0xdd99c3b2,\n    (q31_t)0x7b48d225, (q31_t)0xdd93b66a, (q31_t)0x7b47216c, (q31_t)0xdd8da938,\n    (q31_t)0x7b457068, (q31_t)0xdd879c1b, (q31_t)0x7b43bf17, (q31_t)0xdd818f13,\n    (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b405b92, (q31_t)0xdd757543,\n    (q31_t)0x7b3ea95d, (q31_t)0xdd6f687b, (q31_t)0x7b3cf6dc, (q31_t)0xdd695bc9,\n    (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3990f7, (q31_t)0xdd5d42a3,\n    (q31_t)0x7b37dd92, (q31_t)0xdd573631, (q31_t)0x7b3629e1, (q31_t)0xdd5129d4,\n    (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b32c19c, (q31_t)0xdd451159,\n    (q31_t)0x7b310d07, (q31_t)0xdd3f053c, (q31_t)0x7b2f5826, (q31_t)0xdd38f935,\n    (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43, (q31_t)0x7b2bed81, (q31_t)0xdd2ce166,\n    (q31_t)0x7b2a37bc, (q31_t)0xdd26d59f, (q31_t)0x7b2881ac, (q31_t)0xdd20c9ed,\n    (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b2514a6, (q31_t)0xdd14b2ca,\n    (q31_t)0x7b235db2, (q31_t)0xdd0ea759, (q31_t)0x7b21a671, (q31_t)0xdd089bfe,\n    (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b1e370d, (q31_t)0xdcfc8588,\n    (q31_t)0x7b1c7ee8, (q31_t)0xdcf67a6d, (q31_t)0x7b1ac678, (q31_t)0xdcf06f68,\n    (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1754b3, (q31_t)0xdce4599e,\n    (q31_t)0x7b159b5f, (q31_t)0xdcde4eda, (q31_t)0x7b13e1bf, (q31_t)0xdcd8442b,\n    (q31_t)0x7b1227d3, (q31_t)0xdcd23993, (q31_t)0x7b106d9b, (q31_t)0xdccc2f0f,\n    (q31_t)0x7b0eb318, (q31_t)0xdcc624a2, (q31_t)0x7b0cf848, (q31_t)0xdcc01a4a,\n    (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b0981c5, (q31_t)0xdcb405dc,\n    (q31_t)0x7b07c612, (q31_t)0xdcadfbc5, (q31_t)0x7b060a12, (q31_t)0xdca7f1c5,\n    (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7b029130, (q31_t)0xdc9bde05,\n    (q31_t)0x7b00d44d, (q31_t)0xdc95d446, (q31_t)0x7aff171e, (q31_t)0xdc8fca9c,\n    (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7afb9bdd, (q31_t)0xdc83b78b,\n    (q31_t)0x7af9ddcb, (q31_t)0xdc7dae23, (q31_t)0x7af81f6c, (q31_t)0xdc77a4d2,\n    (q31_t)0x7af660c2, (q31_t)0xdc719b96, (q31_t)0x7af4a1cc, (q31_t)0xdc6b9270,\n    (q31_t)0x7af2e28b, (q31_t)0xdc658960, (q31_t)0x7af122fd, (q31_t)0xdc5f8066,\n    (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7aeda2fe, (q31_t)0xdc536eb3,\n    (q31_t)0x7aebe28d, (q31_t)0xdc4d65fb, (q31_t)0x7aea21d0, (q31_t)0xdc475d59,\n    (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae69f73, (q31_t)0xdc3b4c57,\n    (q31_t)0x7ae4ddd2, (q31_t)0xdc3543f7, (q31_t)0x7ae31be6, (q31_t)0xdc2f3bad,\n    (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7adf972a, (q31_t)0xdc232b5c,\n    (q31_t)0x7addd45b, (q31_t)0xdc1d2354, (q31_t)0x7adc113f, (q31_t)0xdc171b63,\n    (q31_t)0x7ada4dd8, (q31_t)0xdc111388, (q31_t)0x7ad88a25, (q31_t)0xdc0b0bc2,\n    (q31_t)0x7ad6c626, (q31_t)0xdc050414, (q31_t)0x7ad501dc, (q31_t)0xdbfefc7b,\n    (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ad17863, (q31_t)0xdbf2ed8c,\n    (q31_t)0x7acfb336, (q31_t)0xdbece636, (q31_t)0x7acdedbc, (q31_t)0xdbe6def6,\n    (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7aca61e6, (q31_t)0xdbdad0b9,\n    (q31_t)0x7ac89b89, (q31_t)0xdbd4c9bc, (q31_t)0x7ac6d4e0, (q31_t)0xdbcec2d6,\n    (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7ac346ac, (q31_t)0xdbc2b54c,\n    (q31_t)0x7ac17f20, (q31_t)0xdbbcaea8, (q31_t)0x7abfb749, (q31_t)0xdbb6a81b,\n    (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4, (q31_t)0x7abc26b7, (q31_t)0xdbaa9b43,\n    (q31_t)0x7aba5dfc, (q31_t)0xdba494f9, (q31_t)0x7ab894f6, (q31_t)0xdb9e8ec6,\n    (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7ab50206, (q31_t)0xdb9282a2,\n    (q31_t)0x7ab3381d, (q31_t)0xdb8c7cb1, (q31_t)0x7ab16de7, (q31_t)0xdb8676d8,\n    (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aadd89a, (q31_t)0xdb7a6b68,\n    (q31_t)0x7aac0d82, (q31_t)0xdb7465d1, (q31_t)0x7aaa421e, (q31_t)0xdb6e6052,\n    (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa6aa74, (q31_t)0xdb625596,\n    (q31_t)0x7aa4de2d, (q31_t)0xdb5c505a, (q31_t)0x7aa3119a, (q31_t)0xdb564b35,\n    (q31_t)0x7aa144bc, (q31_t)0xdb504626, (q31_t)0x7a9f7793, (q31_t)0xdb4a412e,\n    (q31_t)0x7a9daa1d, (q31_t)0xdb443c4c, (q31_t)0x7a9bdc5c, (q31_t)0xdb3e3781,\n    (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a983ff7, (q31_t)0xdb322e30,\n    (q31_t)0x7a967153, (q31_t)0xdb2c29a9, (q31_t)0x7a94a264, (q31_t)0xdb262539,\n    (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a9103a2, (q31_t)0xdb1a1c9d,\n    (q31_t)0x7a8f33d0, (q31_t)0xdb141871, (q31_t)0x7a8d63b2, (q31_t)0xdb0e145c,\n    (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a89c293, (q31_t)0xdb020c77,\n    (q31_t)0x7a87f192, (q31_t)0xdafc08a6, (q31_t)0x7a862046, (q31_t)0xdaf604ec,\n    (q31_t)0x7a844eae, (q31_t)0xdaf00149, (q31_t)0x7a827ccb, (q31_t)0xdae9fdbd,\n    (q31_t)0x7a80aa9c, (q31_t)0xdae3fa48, (q31_t)0x7a7ed821, (q31_t)0xdaddf6ea,\n    (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a7b3249, (q31_t)0xdad1f072,\n    (q31_t)0x7a795eec, (q31_t)0xdacbed58, (q31_t)0x7a778b43, (q31_t)0xdac5ea56,\n    (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a73e30f, (q31_t)0xdab9e495,\n    (q31_t)0x7a720e84, (q31_t)0xdab3e1d8, (q31_t)0x7a7039ad, (q31_t)0xdaaddf31,\n    (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a6c8f1c, (q31_t)0xdaa1da29,\n    (q31_t)0x7a6ab963, (q31_t)0xda9bd7c7, (q31_t)0x7a68e35e, (q31_t)0xda95d57d,\n    (q31_t)0x7a670d0d, (q31_t)0xda8fd349, (q31_t)0x7a653671, (q31_t)0xda89d12d,\n    (q31_t)0x7a635f8a, (q31_t)0xda83cf28, (q31_t)0x7a618857, (q31_t)0xda7dcd3a,\n    (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a5dd90e, (q31_t)0xda71c9a3,\n    (q31_t)0x7a5c00f9, (q31_t)0xda6bc7fa, (q31_t)0x7a5a2898, (q31_t)0xda65c669,\n    (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a5676f3, (q31_t)0xda59c38c,\n    (q31_t)0x7a549db0, (q31_t)0xda53c240, (q31_t)0x7a52c421, (q31_t)0xda4dc10b,\n    (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a4f1021, (q31_t)0xda41bee8,\n    (q31_t)0x7a4d35b0, (q31_t)0xda3bbdf9, (q31_t)0x7a4b5af3, (q31_t)0xda35bd22,\n    (q31_t)0x7a497feb, (q31_t)0xda2fbc61, (q31_t)0x7a47a498, (q31_t)0xda29bbb9,\n    (q31_t)0x7a45c8f9, (q31_t)0xda23bb27, (q31_t)0x7a43ed0e, (q31_t)0xda1dbaad,\n    (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a403457, (q31_t)0xda11b9ff,\n    (q31_t)0x7a3e578b, (q31_t)0xda0bb9cb, (q31_t)0x7a3c7a73, (q31_t)0xda05b9ae,\n    (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a38bf60, (q31_t)0xd9f9b9bb,\n    (q31_t)0x7a36e166, (q31_t)0xd9f3b9e5, (q31_t)0x7a350321, (q31_t)0xd9edba26,\n    (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a3145b3, (q31_t)0xd9e1baef,\n    (q31_t)0x7a2f668c, (q31_t)0xd9dbbb77, (q31_t)0x7a2d8719, (q31_t)0xd9d5bc16,\n    (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd, (q31_t)0x7a29c750, (q31_t)0xd9c9bd9b,\n    (q31_t)0x7a27e6fb, (q31_t)0xd9c3be81, (q31_t)0x7a26065b, (q31_t)0xd9bdbf7e,\n    (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a224437, (q31_t)0xd9b1c1c0,\n    (q31_t)0x7a2062b5, (q31_t)0xd9abc305, (q31_t)0x7a1e80e7, (q31_t)0xd9a5c461,\n    (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a1abc69, (q31_t)0xd999c75f,\n    (q31_t)0x7a18d9b9, (q31_t)0xd993c902, (q31_t)0x7a16f6be, (q31_t)0xd98dcabd,\n    (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a132fe6, (q31_t)0xd981ce7a,\n    (q31_t)0x7a114c09, (q31_t)0xd97bd07c, (q31_t)0x7a0f67e0, (q31_t)0xd975d295,\n    (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7, (q31_t)0x7a0b9eae, (q31_t)0xd969d710,\n    (q31_t)0x7a09b9a4, (q31_t)0xd963d971, (q31_t)0x7a07d44e, (q31_t)0xd95ddbea,\n    (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x7a0408c1, (q31_t)0xd951e123,\n    (q31_t)0x7a02228a, (q31_t)0xd94be3e3, (q31_t)0x7a003c07, (q31_t)0xd945e6bb,\n    (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79fc6e20, (q31_t)0xd939ecb3,\n    (q31_t)0x79fa86bc, (q31_t)0xd933efd3, (q31_t)0x79f89f0c, (q31_t)0xd92df30b,\n    (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79f4cecb, (q31_t)0xd921f9c3,\n    (q31_t)0x79f2e63a, (q31_t)0xd91bfd43, (q31_t)0x79f0fd5d, (q31_t)0xd91600da,\n    (q31_t)0x79ef1436, (q31_t)0xd910048a, (q31_t)0x79ed2ac3, (q31_t)0xd90a0852,\n    (q31_t)0x79eb4105, (q31_t)0xd9040c32, (q31_t)0x79e956fb, (q31_t)0xd8fe1029,\n    (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79e58207, (q31_t)0xd8f21861,\n    (q31_t)0x79e3971c, (q31_t)0xd8ec1ca1, (q31_t)0x79e1abe6, (q31_t)0xd8e620fa,\n    (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79ddd498, (q31_t)0xd8da29f2,\n    (q31_t)0x79dbe880, (q31_t)0xd8d42e93, (q31_t)0x79d9fc1d, (q31_t)0xd8ce334c,\n    (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d62276, (q31_t)0xd8c23d06,\n    (q31_t)0x79d43532, (q31_t)0xd8bc4207, (q31_t)0x79d247a2, (q31_t)0xd8b64720,\n    (q31_t)0x79d059c8, (q31_t)0xd8b04c52, (q31_t)0x79ce6ba2, (q31_t)0xd8aa519c,\n    (q31_t)0x79cc7d31, (q31_t)0xd8a456ff, (q31_t)0x79ca8e75, (q31_t)0xd89e5c79,\n    (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c6b01b, (q31_t)0xd89267b7,\n    (q31_t)0x79c4c07e, (q31_t)0xd88c6d7b, (q31_t)0x79c2d095, (q31_t)0xd8867356,\n    (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79beefe3, (q31_t)0xd87a7f57,\n    (q31_t)0x79bcff19, (q31_t)0xd874857c, (q31_t)0x79bb0e04, (q31_t)0xd86e8bb9,\n    (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b72af9, (q31_t)0xd862987d,\n    (q31_t)0x79b53903, (q31_t)0xd85c9f04, (q31_t)0x79b346c2, (q31_t)0xd856a5a3,\n    (q31_t)0x79b15435, (q31_t)0xd850ac5a, (q31_t)0x79af615e, (q31_t)0xd84ab32a,\n    (q31_t)0x79ad6e3c, (q31_t)0xd844ba13, (q31_t)0x79ab7ace, (q31_t)0xd83ec114,\n    (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a79312, (q31_t)0xd832cf5f,\n    (q31_t)0x79a59ec3, (q31_t)0xd82cd6aa, (q31_t)0x79a3aa29, (q31_t)0xd826de0d,\n    (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x799fc015, (q31_t)0xd81aed1d,\n    (q31_t)0x799dca9a, (q31_t)0xd814f4ca, (q31_t)0x799bd4d4, (q31_t)0xd80efc8f,\n    (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x7997e868, (q31_t)0xd8030c64,\n    (q31_t)0x7995f1c1, (q31_t)0xd7fd1474, (q31_t)0x7993facf, (q31_t)0xd7f71c9c,\n    (q31_t)0x79920392, (q31_t)0xd7f124dd, (q31_t)0x79900c0a, (q31_t)0xd7eb2d37,\n    (q31_t)0x798e1438, (q31_t)0xd7e535a9, (q31_t)0x798c1c1a, (q31_t)0xd7df3e34,\n    (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79882afd, (q31_t)0xd7d34f94,\n    (q31_t)0x798631ff, (q31_t)0xd7cd586a, (q31_t)0x798438b5, (q31_t)0xd7c76158,\n    (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x79804541, (q31_t)0xd7bb737f,\n    (q31_t)0x797e4b16, (q31_t)0xd7b57cb7, (q31_t)0x797c50a1, (q31_t)0xd7af8609,\n    (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x79785ad5, (q31_t)0xd7a398f6,\n    (q31_t)0x79765f7f, (q31_t)0xd79da293, (q31_t)0x797463de, (q31_t)0xd797ac48,\n    (q31_t)0x797267f2, (q31_t)0xd791b616, (q31_t)0x79706bbb, (q31_t)0xd78bbffc,\n    (q31_t)0x796e6f39, (q31_t)0xd785c9fc, (q31_t)0x796c726c, (q31_t)0xd77fd415,\n    (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x796877f1, (q31_t)0xd773e892,\n    (q31_t)0x79667a44, (q31_t)0xd76df2f6, (q31_t)0x79647c4c, (q31_t)0xd767fd72,\n    (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x79607f7a, (q31_t)0xd75c12b7,\n    (q31_t)0x795e80a1, (q31_t)0xd7561d7f, (q31_t)0x795c817d, (q31_t)0xd7502860,\n    (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79588255, (q31_t)0xd7443e6e,\n    (q31_t)0x79568250, (q31_t)0xd73e499a, (q31_t)0x79548201, (q31_t)0xd73854e0,\n    (q31_t)0x79528167, (q31_t)0xd732603f, (q31_t)0x79508082, (q31_t)0xd72c6bb6,\n    (q31_t)0x794e7f52, (q31_t)0xd7267748, (q31_t)0x794c7dd7, (q31_t)0xd72082f2,\n    (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79487a01, (q31_t)0xd7149a92,\n    (q31_t)0x794677a6, (q31_t)0xd70ea688, (q31_t)0x79447500, (q31_t)0xd708b297,\n    (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x79406ed4, (q31_t)0xd6fccb01,\n    (q31_t)0x793e6b4e, (q31_t)0xd6f6d75d, (q31_t)0x793c677d, (q31_t)0xd6f0e3d1,\n    (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79385efa, (q31_t)0xd6e4fd06,\n    (q31_t)0x79365a49, (q31_t)0xd6df09c6, (q31_t)0x7934554d, (q31_t)0xd6d916a0,\n    (q31_t)0x79325006, (q31_t)0xd6d32393, (q31_t)0x79304a74, (q31_t)0xd6cd30a0,\n    (q31_t)0x792e4497, (q31_t)0xd6c73dc6, (q31_t)0x792c3e70, (q31_t)0xd6c14b05,\n    (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79283141, (q31_t)0xd6b565d0,\n    (q31_t)0x79262a3a, (q31_t)0xd6af735c, (q31_t)0x792422e8, (q31_t)0xd6a98101,\n    (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x79201363, (q31_t)0xd69d9c98,\n    (q31_t)0x791e0b31, (q31_t)0xd697aa8a, (q31_t)0x791c02b4, (q31_t)0xd691b895,\n    (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7917f0d9, (q31_t)0xd685d4f9,\n    (q31_t)0x7915e77c, (q31_t)0xd67fe351, (q31_t)0x7913ddd4, (q31_t)0xd679f1c2,\n    (q31_t)0x7911d3e2, (q31_t)0xd674004e, (q31_t)0x790fc9a4, (q31_t)0xd66e0ef2,\n    (q31_t)0x790dbf1d, (q31_t)0xd6681db1, (q31_t)0x790bb44a, (q31_t)0xd6622c89,\n    (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x79079dc5, (q31_t)0xd6564a87,\n    (q31_t)0x79059212, (q31_t)0xd65059ac, (q31_t)0x79038615, (q31_t)0xd64a68eb,\n    (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78ff6d3b, (q31_t)0xd63e87b6,\n    (q31_t)0x78fd605d, (q31_t)0xd6389742, (q31_t)0x78fb5336, (q31_t)0xd632a6e8,\n    (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f73806, (q31_t)0xd626c681,\n    (q31_t)0x78f529fe, (q31_t)0xd620d675, (q31_t)0x78f31bac, (q31_t)0xd61ae682,\n    (q31_t)0x78f10d0f, (q31_t)0xd614f6a9, (q31_t)0x78eefe28, (q31_t)0xd60f06ea,\n    (q31_t)0x78eceef6, (q31_t)0xd6091745, (q31_t)0x78eadf79, (q31_t)0xd60327b9,\n    (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e6bfa0, (q31_t)0xd5f748f0,\n    (q31_t)0x78e4af44, (q31_t)0xd5f159b3, (q31_t)0x78e29e9d, (q31_t)0xd5eb6a8f,\n    (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78de7c6f, (q31_t)0xd5df8c96,\n    (q31_t)0x78dc6ae8, (q31_t)0xd5d99dc0, (q31_t)0x78da5917, (q31_t)0xd5d3af04,\n    (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78d63495, (q31_t)0xd5c7d1db,\n    (q31_t)0x78d421e4, (q31_t)0xd5c1e36d, (q31_t)0x78d20ee9, (q31_t)0xd5bbf519,\n    (q31_t)0x78cffba3, (q31_t)0xd5b606e0, (q31_t)0x78cde812, (q31_t)0xd5b018c0,\n    (q31_t)0x78cbd437, (q31_t)0xd5aa2abb, (q31_t)0x78c9c012, (q31_t)0xd5a43cd0,\n    (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78c596e7, (q31_t)0xd5986148,\n    (q31_t)0x78c381e2, (q31_t)0xd59273ab, (q31_t)0x78c16c93, (q31_t)0xd58c8628,\n    (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78bd4114, (q31_t)0xd580ab72,\n    (q31_t)0x78bb2ae5, (q31_t)0xd57abe3d, (q31_t)0x78b9146c, (q31_t)0xd574d124,\n    (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78b4e69a, (q31_t)0xd568f73f,\n    (q31_t)0x78b2cf41, (q31_t)0xd5630a74, (q31_t)0x78b0b79e, (q31_t)0xd55d1dc3,\n    (q31_t)0x78ae9fb0, (q31_t)0xd557312d, (q31_t)0x78ac8778, (q31_t)0xd55144b0,\n    (q31_t)0x78aa6ef5, (q31_t)0xd54b584f, (q31_t)0x78a85628, (q31_t)0xd5456c07,\n    (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x78a423af, (q31_t)0xd53993c7,\n    (q31_t)0x78a20a03, (q31_t)0xd533a7cf, (q31_t)0x789ff00c, (q31_t)0xd52dbbf1,\n    (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789bbb3f, (q31_t)0xd521e484,\n    (q31_t)0x7899a06a, (q31_t)0xd51bf8f6, (q31_t)0x78978549, (q31_t)0xd5160d82,\n    (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x78934e2a, (q31_t)0xd50a36e9,\n    (q31_t)0x7891322a, (q31_t)0xd5044bc4, (q31_t)0x788f15e0, (q31_t)0xd4fe60ba,\n    (q31_t)0x788cf94c, (q31_t)0xd4f875ca, (q31_t)0x788adc6e, (q31_t)0xd4f28af5,\n    (q31_t)0x7888bf45, (q31_t)0xd4eca03a, (q31_t)0x7886a1d1, (q31_t)0xd4e6b59a,\n    (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x7882660c, (q31_t)0xd4dae0aa,\n    (q31_t)0x788047ba, (q31_t)0xd4d4f65a, (q31_t)0x787e291d, (q31_t)0xd4cf0c24,\n    (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x7879eb05, (q31_t)0xd4c33809,\n    (q31_t)0x7877cb89, (q31_t)0xd4bd4e23, (q31_t)0x7875abc3, (q31_t)0xd4b76458,\n    (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x78716b59, (q31_t)0xd4ab9112,\n    (q31_t)0x786f4ab4, (q31_t)0xd4a5a798, (q31_t)0x786d29c5, (q31_t)0xd49fbe37,\n    (q31_t)0x786b088c, (q31_t)0xd499d4f2, (q31_t)0x7868e708, (q31_t)0xd493ebc8,\n    (q31_t)0x7866c53a, (q31_t)0xd48e02b8, (q31_t)0x7864a322, (q31_t)0xd48819c3,\n    (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78605e13, (q31_t)0xd47c4829,\n    (q31_t)0x785e3b1c, (q31_t)0xd4765f85, (q31_t)0x785c17db, (q31_t)0xd47076fb,\n    (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7857d079, (q31_t)0xd464a639,\n    (q31_t)0x7855ac5a, (q31_t)0xd45ebe00, (q31_t)0x785387ef, (q31_t)0xd458d5e2,\n    (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x784f3e3c, (q31_t)0xd44d05f6,\n    (q31_t)0x784d18f4, (q31_t)0xd4471e29, (q31_t)0x784af361, (q31_t)0xd4413677,\n    (q31_t)0x7848cd83, (q31_t)0xd43b4ee0, (q31_t)0x7846a75c, (q31_t)0xd4356763,\n    (q31_t)0x784480ea, (q31_t)0xd42f8002, (q31_t)0x78425a2f, (q31_t)0xd42998bc,\n    (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x783e0bd9, (q31_t)0xd41dca81,\n    (q31_t)0x783be43e, (q31_t)0xd417e38c, (q31_t)0x7839bc5a, (q31_t)0xd411fcb2,\n    (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x78356bb2, (q31_t)0xd4062f4f,\n    (q31_t)0x783342ef, (q31_t)0xd40048c6, (q31_t)0x783119e2, (q31_t)0xd3fa6259,\n    (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x782cc6ea, (q31_t)0xd3ee95cf,\n    (q31_t)0x782a9cfe, (q31_t)0xd3e8afb3, (q31_t)0x782872c8, (q31_t)0xd3e2c9b2,\n    (q31_t)0x78264849, (q31_t)0xd3dce3cd, (q31_t)0x78241d7f, (q31_t)0xd3d6fe03,\n    (q31_t)0x7821f26b, (q31_t)0xd3d11853, (q31_t)0x781fc70d, (q31_t)0xd3cb32c0,\n    (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x781b6f72, (q31_t)0xd3bf67ea,\n    (q31_t)0x78194336, (q31_t)0xd3b982a8, (q31_t)0x781716b0, (q31_t)0xd3b39d81,\n    (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x7812bcc4, (q31_t)0xd3a7d385,\n    (q31_t)0x78108f60, (q31_t)0xd3a1eeb1, (q31_t)0x780e61b1, (q31_t)0xd39c09f7,\n    (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780a0575, (q31_t)0xd39040d7,\n    (q31_t)0x7807d6e9, (q31_t)0xd38a5c70, (q31_t)0x7805a812, (q31_t)0xd3847824,\n    (q31_t)0x780378f1, (q31_t)0xd37e93f4, (q31_t)0x78014986, (q31_t)0xd378afdf,\n    (q31_t)0x77ff19d1, (q31_t)0xd372cbe6, (q31_t)0x77fce9d2, (q31_t)0xd36ce808,\n    (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f888f6, (q31_t)0xd361209f,\n    (q31_t)0x77f65819, (q31_t)0xd35b3d13, (q31_t)0x77f426f2, (q31_t)0xd35559a4,\n    (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77efc3c5, (q31_t)0xd3499317,\n    (q31_t)0x77ed91c0, (q31_t)0xd343affa, (q31_t)0x77eb5f71, (q31_t)0xd33dccf8,\n    (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e6f9f6, (q31_t)0xd3320748,\n    (q31_t)0x77e4c6c9, (q31_t)0xd32c2499, (q31_t)0x77e29352, (q31_t)0xd3264206,\n    (q31_t)0x77e05f91, (q31_t)0xd3205f8f, (q31_t)0x77de2b86, (q31_t)0xd31a7d33,\n    (q31_t)0x77dbf732, (q31_t)0xd3149af3, (q31_t)0x77d9c293, (q31_t)0xd30eb8cf,\n    (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77d55878, (q31_t)0xd302f4da,\n    (q31_t)0x77d322fc, (q31_t)0xd2fd1309, (q31_t)0x77d0ed35, (q31_t)0xd2f73154,\n    (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77cc80cb, (q31_t)0xd2eb6e3c,\n    (q31_t)0x77ca4a27, (q31_t)0xd2e58cdb, (q31_t)0x77c81339, (q31_t)0xd2dfab95,\n    (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77c3a47f, (q31_t)0xd2d3e95c,\n    (q31_t)0x77c16cb4, (q31_t)0xd2ce0869, (q31_t)0x77bf349f, (q31_t)0xd2c82793,\n    (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8, (q31_t)0x77bac396, (q31_t)0xd2bc6639,\n    (q31_t)0x77b88aa3, (q31_t)0xd2b685b6, (q31_t)0x77b65166, (q31_t)0xd2b0a54f,\n    (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77b1de0f, (q31_t)0xd2a4e4d5,\n    (q31_t)0x77afa3f5, (q31_t)0xd29f04c2, (q31_t)0x77ad6990, (q31_t)0xd29924cb,\n    (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a8f3ea, (q31_t)0xd28d6531,\n    (q31_t)0x77a6b8a9, (q31_t)0xd287858e, (q31_t)0x77a47d1d, (q31_t)0xd281a607,\n    (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77a00529, (q31_t)0xd275e74d,\n    (q31_t)0x779dc8c0, (q31_t)0xd270081b, (q31_t)0x779b8c0e, (q31_t)0xd26a2904,\n    (q31_t)0x77994f11, (q31_t)0xd2644a0a, (q31_t)0x779711cb, (q31_t)0xd25e6b2b,\n    (q31_t)0x7794d43b, (q31_t)0xd2588c69, (q31_t)0x77929661, (q31_t)0xd252adc3,\n    (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x778e19d0, (q31_t)0xd246f0cb,\n    (q31_t)0x778bdb19, (q31_t)0xd241127a, (q31_t)0x77899c19, (q31_t)0xd23b3444,\n    (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x77851d3a, (q31_t)0xd22f782f,\n    (q31_t)0x7782dd5c, (q31_t)0xd2299a4e, (q31_t)0x77809d35, (q31_t)0xd223bc8a,\n    (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x777c1c08, (q31_t)0xd2180156,\n    (q31_t)0x7779db03, (q31_t)0xd21223e7, (q31_t)0x777799b5, (q31_t)0xd20c4694,\n    (q31_t)0x7775581d, (q31_t)0xd206695d, (q31_t)0x7773163b, (q31_t)0xd2008c43,\n    (q31_t)0x7770d40f, (q31_t)0xd1faaf45, (q31_t)0x776e919a, (q31_t)0xd1f4d263,\n    (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776a0bd3, (q31_t)0xd1e918f5,\n    (q31_t)0x7767c880, (q31_t)0xd1e33c69, (q31_t)0x776584e5, (q31_t)0xd1dd5ff9,\n    (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x7760fcd0, (q31_t)0xd1d1a76f,\n    (q31_t)0x775eb857, (q31_t)0xd1cbcb54, (q31_t)0x775c7395, (q31_t)0xd1c5ef56,\n    (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x7757e933, (q31_t)0xd1ba37b0,\n    (q31_t)0x7755a394, (q31_t)0xd1b45c08, (q31_t)0x77535dab, (q31_t)0xd1ae807c,\n    (q31_t)0x77511778, (q31_t)0xd1a8a50d, (q31_t)0x774ed0fc, (q31_t)0xd1a2c9ba,\n    (q31_t)0x774c8a36, (q31_t)0xd19cee84, (q31_t)0x774a4327, (q31_t)0xd197136b,\n    (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x7745b42c, (q31_t)0xd18b5d8e,\n    (q31_t)0x77436c40, (q31_t)0xd18582ca, (q31_t)0x7741240a, (q31_t)0xd17fa823,\n    (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x773c92c2, (q31_t)0xd173f32c,\n    (q31_t)0x773a49b0, (q31_t)0xd16e18db, (q31_t)0x77380054, (q31_t)0xd1683ea7,\n    (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x77336cc0, (q31_t)0xd15c8a95,\n    (q31_t)0x77312287, (q31_t)0xd156b0b7, (q31_t)0x772ed805, (q31_t)0xd150d6f6,\n    (q31_t)0x772c8d3a, (q31_t)0xd14afd52, (q31_t)0x772a4225, (q31_t)0xd14523cb,\n    (q31_t)0x7727f6c6, (q31_t)0xd13f4a60, (q31_t)0x7725ab1f, (q31_t)0xd1397113,\n    (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x772112f2, (q31_t)0xd12dbece,\n    (q31_t)0x771ec66e, (q31_t)0xd127e5d7, (q31_t)0x771c79a0, (q31_t)0xd1220cfc,\n    (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7717df27, (q31_t)0xd1165b9f,\n    (q31_t)0x7715917d, (q31_t)0xd110831b, (q31_t)0x77134389, (q31_t)0xd10aaab5,\n    (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x770ea6c5, (q31_t)0xd0fefa3f,\n    (q31_t)0x770c57f5, (q31_t)0xd0f9222f, (q31_t)0x770a08dc, (q31_t)0xd0f34a3d,\n    (q31_t)0x7707b979, (q31_t)0xd0ed7267, (q31_t)0x770569cc, (q31_t)0xd0e79aaf,\n    (q31_t)0x770319d6, (q31_t)0xd0e1c313, (q31_t)0x7700c997, (q31_t)0xd0dbeb95,\n    (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76fc283c, (q31_t)0xd0d03cf0,\n    (q31_t)0x76f9d721, (q31_t)0xd0ca65c9, (q31_t)0x76f785bc, (q31_t)0xd0c48ebf,\n    (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76f2e216, (q31_t)0xd0b8e102,\n    (q31_t)0x76f08fd5, (q31_t)0xd0b30a50, (q31_t)0x76ee3d4b, (q31_t)0xd0ad33ba,\n    (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e9975a, (q31_t)0xd0a186e7,\n    (q31_t)0x76e743f4, (q31_t)0xd09bb0aa, (q31_t)0x76e4f044, (q31_t)0xd095da89,\n    (q31_t)0x76e29c4b, (q31_t)0xd0900486, (q31_t)0x76e04808, (q31_t)0xd08a2ea0,\n    (q31_t)0x76ddf37c, (q31_t)0xd08458d7, (q31_t)0x76db9ea7, (q31_t)0xd07e832c,\n    (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76d6f421, (q31_t)0xd072d82d,\n    (q31_t)0x76d49e70, (q31_t)0xd06d02da, (q31_t)0x76d24876, (q31_t)0xd0672da3,\n    (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76cd9ba5, (q31_t)0xd05b838f,\n    (q31_t)0x76cb44cf, (q31_t)0xd055aeb1, (q31_t)0x76c8edb0, (q31_t)0xd04fd9f1,\n    (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76c43e95, (q31_t)0xd04430c8,\n    (q31_t)0x76c1e699, (q31_t)0xd03e5c60, (q31_t)0x76bf8e55, (q31_t)0xd0388815,\n    (q31_t)0x76bd35c7, (q31_t)0xd032b3e7, (q31_t)0x76badcf0, (q31_t)0xd02cdfd8,\n    (q31_t)0x76b883d0, (q31_t)0xd0270be5, (q31_t)0x76b62a66, (q31_t)0xd0213810,\n    (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76b176b8, (q31_t)0xd01590bf,\n    (q31_t)0x76af1c72, (q31_t)0xd00fbd43, (q31_t)0x76acc1e4, (q31_t)0xd009e9e4,\n    (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a80bec, (q31_t)0xcffe4380,\n    (q31_t)0x76a5b082, (q31_t)0xcff8707a, (q31_t)0x76a354cf, (q31_t)0xcff29d92,\n    (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x769e9c8d, (q31_t)0xcfe6f81a,\n    (q31_t)0x769c3ffe, (q31_t)0xcfe1258b, (q31_t)0x7699e326, (q31_t)0xcfdb531a,\n    (q31_t)0x76978605, (q31_t)0xcfd580c6, (q31_t)0x7695289b, (q31_t)0xcfcfae8f,\n    (q31_t)0x7692cae8, (q31_t)0xcfc9dc77, (q31_t)0x76906ceb, (q31_t)0xcfc40a7c,\n    (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768bb017, (q31_t)0xcfb866e0,\n    (q31_t)0x7689513f, (q31_t)0xcfb2953f, (q31_t)0x7686f21e, (q31_t)0xcfacc3bb,\n    (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x76823301, (q31_t)0xcfa1210d,\n    (q31_t)0x767fd304, (q31_t)0xcf9b4fe3, (q31_t)0x767d72bf, (q31_t)0xcf957ed7,\n    (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x7678b159, (q31_t)0xcf89dd18,\n    (q31_t)0x76765038, (q31_t)0xcf840c65, (q31_t)0x7673eecf, (q31_t)0xcf7e3bd1,\n    (q31_t)0x76718d1c, (q31_t)0xcf786b5a, (q31_t)0x766f2b20, (q31_t)0xcf729b01,\n    (q31_t)0x766cc8db, (q31_t)0xcf6ccac6, (q31_t)0x766a664d, (q31_t)0xcf66faa9,\n    (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x7665a056, (q31_t)0xcf5b5ac9,\n    (q31_t)0x76633ced, (q31_t)0xcf558b06, (q31_t)0x7660d93b, (q31_t)0xcf4fbb61,\n    (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x765c10fc, (q31_t)0xcf441c71,\n    (q31_t)0x7659ac6f, (q31_t)0xcf3e4d26, (q31_t)0x76574798, (q31_t)0xcf387dfa,\n    (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x76527d11, (q31_t)0xcf2cdffa,\n    (q31_t)0x76501760, (q31_t)0xcf271128, (q31_t)0x764db166, (q31_t)0xcf214274,\n    (q31_t)0x764b4b23, (q31_t)0xcf1b73de, (q31_t)0x7648e497, (q31_t)0xcf15a566,\n    (q31_t)0x76467dc2, (q31_t)0xcf0fd70c, (q31_t)0x764416a4, (q31_t)0xcf0a08d0,\n    (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x763f478d, (q31_t)0xcefe6cb3,\n    (q31_t)0x763cdf94, (q31_t)0xcef89ed2, (q31_t)0x763a7752, (q31_t)0xcef2d110,\n    (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x7635a5f4, (q31_t)0xcee735e5,\n    (q31_t)0x76333cd8, (q31_t)0xcee1687d, (q31_t)0x7630d372, (q31_t)0xcedb9b33,\n    (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x762bffcd, (q31_t)0xced000fb,\n    (q31_t)0x7629958c, (q31_t)0xceca340c, (q31_t)0x76272b03, (q31_t)0xcec4673c,\n    (q31_t)0x7624c031, (q31_t)0xcebe9a8a, (q31_t)0x76225517, (q31_t)0xceb8cdf7,\n    (q31_t)0x761fe9b3, (q31_t)0xceb30181, (q31_t)0x761d7e06, (q31_t)0xcead352b,\n    (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x7618a5d3, (q31_t)0xcea19cd8,\n    (q31_t)0x7616394c, (q31_t)0xce9bd0dd, (q31_t)0x7613cc7c, (q31_t)0xce960500,\n    (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x760ef201, (q31_t)0xce8a6da2,\n    (q31_t)0x760c8457, (q31_t)0xce84a220, (q31_t)0x760a1664, (q31_t)0xce7ed6bd,\n    (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x760539a3, (q31_t)0xce734053,\n    (q31_t)0x7602cad5, (q31_t)0xce6d754c, (q31_t)0x76005bbf, (q31_t)0xce67aa63,\n    (q31_t)0x75fdec60, (q31_t)0xce61df99, (q31_t)0x75fb7cb8, (q31_t)0xce5c14ed,\n    (q31_t)0x75f90cc7, (q31_t)0xce564a60, (q31_t)0x75f69c8d, (q31_t)0xce507ff2,\n    (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75f1bb40, (q31_t)0xce44eb71,\n    (q31_t)0x75ef4a2c, (q31_t)0xce3f215f, (q31_t)0x75ecd8cf, (q31_t)0xce39576c,\n    (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e7f53c, (q31_t)0xce2dc3e1,\n    (q31_t)0x75e58305, (q31_t)0xce27fa49, (q31_t)0x75e31086, (q31_t)0xce2230d0,\n    (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75de2aac, (q31_t)0xce169e3b,\n    (q31_t)0x75dbb753, (q31_t)0xce10d51f, (q31_t)0x75d943b0, (q31_t)0xce0b0c21,\n    (q31_t)0x75d6cfc5, (q31_t)0xce054343, (q31_t)0x75d45b92, (q31_t)0xcdff7a83,\n    (q31_t)0x75d1e715, (q31_t)0xcdf9b1e2, (q31_t)0x75cf7250, (q31_t)0xcdf3e95f,\n    (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75ca87ec, (q31_t)0xcde858b8,\n    (q31_t)0x75c8124d, (q31_t)0xcde29092, (q31_t)0x75c59c65, (q31_t)0xcddcc88b,\n    (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75c0afbb, (q31_t)0xcdd138db,\n    (q31_t)0x75be38fa, (q31_t)0xcdcb7131, (q31_t)0x75bbc1ef, (q31_t)0xcdc5a9a6,\n    (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75b6d301, (q31_t)0xcdba1aee,\n    (q31_t)0x75b45b1d, (q31_t)0xcdb453c0, (q31_t)0x75b1e2f0, (q31_t)0xcdae8cb1,\n    (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1, (q31_t)0x75acf1bd, (q31_t)0xcda2fef0,\n    (q31_t)0x75aa78b6, (q31_t)0xcd9d383f, (q31_t)0x75a7ff67, (q31_t)0xcd9771ac,\n    (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x75a30bef, (q31_t)0xcd8be4e4,\n    (q31_t)0x75a091c6, (q31_t)0xcd861eaf, (q31_t)0x759e1755, (q31_t)0xcd805899,\n    (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x75992198, (q31_t)0xcd74ccca,\n    (q31_t)0x7596a64d, (q31_t)0xcd6f0711, (q31_t)0x75942ab9, (q31_t)0xcd694178,\n    (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x758f32b9, (q31_t)0xcd5db6a3,\n    (q31_t)0x758cb64c, (q31_t)0xcd57f167, (q31_t)0x758a3996, (q31_t)0xcd522c4a,\n    (q31_t)0x7587bc98, (q31_t)0xcd4c674d, (q31_t)0x75853f51, (q31_t)0xcd46a26f,\n    (q31_t)0x7582c1c2, (q31_t)0xcd40ddb0, (q31_t)0x758043ea, (q31_t)0xcd3b1911,\n    (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x757b4762, (q31_t)0xcd2f9030,\n    (q31_t)0x7578c8b0, (q31_t)0xcd29cbee, (q31_t)0x757649b7, (q31_t)0xcd2407cc,\n    (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x75714aea, (q31_t)0xcd187fe6,\n    (q31_t)0x756ecb18, (q31_t)0xcd12bc22, (q31_t)0x756c4afc, (q31_t)0xcd0cf87e,\n    (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x756749ec, (q31_t)0xcd017193,\n    (q31_t)0x7564c8f8, (q31_t)0xccfbae4d, (q31_t)0x756247bb, (q31_t)0xccf5eb26,\n    (q31_t)0x755fc635, (q31_t)0xccf0281f, (q31_t)0x755d4467, (q31_t)0xccea6538,\n    (q31_t)0x755ac251, (q31_t)0xcce4a26f, (q31_t)0x75583ff3, (q31_t)0xccdedfc7,\n    (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x75533a5c, (q31_t)0xccd35ad4,\n    (q31_t)0x7550b725, (q31_t)0xcccd988a, (q31_t)0x754e33a4, (q31_t)0xccc7d65f,\n    (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75492bcb, (q31_t)0xccbc5269,\n    (q31_t)0x7546a772, (q31_t)0xccb6909e, (q31_t)0x754422d0, (q31_t)0xccb0cef2,\n    (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x753f18b4, (q31_t)0xcca54bf9,\n    (q31_t)0x753c933a, (q31_t)0xcc9f8aac, (q31_t)0x753a0d77, (q31_t)0xcc99c97e,\n    (q31_t)0x7537876c, (q31_t)0xcc940871, (q31_t)0x75350118, (q31_t)0xcc8e4783,\n    (q31_t)0x75327a7d, (q31_t)0xcc8886b5, (q31_t)0x752ff399, (q31_t)0xcc82c607,\n    (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x752ae4f8, (q31_t)0xcc774509,\n    (q31_t)0x75285d3b, (q31_t)0xcc7184ba, (q31_t)0x7525d536, (q31_t)0xcc6bc48b,\n    (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x7520c453, (q31_t)0xcc60448c,\n    (q31_t)0x751e3b75, (q31_t)0xcc5a84bc, (q31_t)0x751bb24f, (q31_t)0xcc54c50c,\n    (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x75169f2a, (q31_t)0xcc49460c,\n    (q31_t)0x7514152b, (q31_t)0xcc4386bc, (q31_t)0x75118ae4, (q31_t)0xcc3dc78b,\n    (q31_t)0x750f0054, (q31_t)0xcc38087b, (q31_t)0x750c757d, (q31_t)0xcc32498a,\n    (q31_t)0x7509ea5d, (q31_t)0xcc2c8aba, (q31_t)0x75075ef5, (q31_t)0xcc26cc09,\n    (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x7502474d, (q31_t)0xcc1b4f08,\n    (q31_t)0x74ffbb0d, (q31_t)0xcc1590b8, (q31_t)0x74fd2e84, (q31_t)0xcc0fd287,\n    (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f8149a, (q31_t)0xcc045686,\n    (q31_t)0x74f58739, (q31_t)0xcbfe98b6, (q31_t)0x74f2f990, (q31_t)0xcbf8db05,\n    (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74eddd65, (q31_t)0xcbed6005,\n    (q31_t)0x74eb4ee3, (q31_t)0xcbe7a2b5, (q31_t)0x74e8c01a, (q31_t)0xcbe1e585,\n    (q31_t)0x74e63108, (q31_t)0xcbdc2876, (q31_t)0x74e3a1ae, (q31_t)0xcbd66b86,\n    (q31_t)0x74e1120c, (q31_t)0xcbd0aeb7, (q31_t)0x74de8221, (q31_t)0xcbcaf208,\n    (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d96175, (q31_t)0xcbbf790a,\n    (q31_t)0x74d6d0b2, (q31_t)0xcbb9bcbb, (q31_t)0x74d43fa8, (q31_t)0xcbb4008d,\n    (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74cf1cbb, (q31_t)0xcba88891,\n    (q31_t)0x74cc8ad8, (q31_t)0xcba2ccc4, (q31_t)0x74c9f8ad, (q31_t)0xcb9d1117,\n    (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74c4d380, (q31_t)0xcb919a1d,\n    (q31_t)0x74c2407d, (q31_t)0xcb8bded1, (q31_t)0x74bfad32, (q31_t)0xcb8623a5,\n    (q31_t)0x74bd199f, (q31_t)0xcb80689a, (q31_t)0x74ba85c4, (q31_t)0xcb7aadaf,\n    (q31_t)0x74b7f1a1, (q31_t)0xcb74f2e4, (q31_t)0x74b55d36, (q31_t)0xcb6f383a,\n    (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74b03389, (q31_t)0xcb63c347,\n    (q31_t)0x74ad9e46, (q31_t)0xcb5e08fe, (q31_t)0x74ab08bb, (q31_t)0xcb584ed6,\n    (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x74a5dccd, (q31_t)0xcb4cdae6,\n    (q31_t)0x74a3466b, (q31_t)0xcb47211f, (q31_t)0x74a0afc0, (q31_t)0xcb416779,\n    (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x749b8193, (q31_t)0xcb35f48d,\n    (q31_t)0x7498ea11, (q31_t)0xcb303b49, (q31_t)0x74965246, (q31_t)0xcb2a8224,\n    (q31_t)0x7493ba34, (q31_t)0xcb24c921, (q31_t)0x749121da, (q31_t)0xcb1f103e,\n    (q31_t)0x748e8938, (q31_t)0xcb19577b, (q31_t)0x748bf04d, (q31_t)0xcb139ed9,\n    (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x7486bda2, (q31_t)0xcb082df8,\n    (q31_t)0x748423e0, (q31_t)0xcb0275b8, (q31_t)0x748189d7, (q31_t)0xcafcbd99,\n    (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x747c54ec, (q31_t)0xcaf14dbd,\n    (q31_t)0x7479ba0b, (q31_t)0xcaeb9600, (q31_t)0x74771ee2, (q31_t)0xcae5de64,\n    (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x7471e7b8, (q31_t)0xcada6f8d,\n    (q31_t)0x746f4bb8, (q31_t)0xcad4b853, (q31_t)0x746caf70, (q31_t)0xcacf013a,\n    (q31_t)0x746a12df, (q31_t)0xcac94a42, (q31_t)0x74677608, (q31_t)0xcac3936b,\n    (q31_t)0x7464d8e8, (q31_t)0xcabddcb4, (q31_t)0x74623b80, (q31_t)0xcab8261e,\n    (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x745cffda, (q31_t)0xcaacb955,\n    (q31_t)0x745a619b, (q31_t)0xcaa70322, (q31_t)0x7457c314, (q31_t)0xcaa14d10,\n    (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x74528530, (q31_t)0xca95e14e,\n    (q31_t)0x744fe5d2, (q31_t)0xca902b9f, (q31_t)0x744d462c, (q31_t)0xca8a7610,\n    (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x7448060a, (q31_t)0xca7f0b56,\n    (q31_t)0x7445658d, (q31_t)0xca79562b, (q31_t)0x7442c4c8, (q31_t)0xca73a120,\n    (q31_t)0x744023bc, (q31_t)0xca6dec37, (q31_t)0x743d8268, (q31_t)0xca68376e,\n    (q31_t)0x743ae0cc, (q31_t)0xca6282c7, (q31_t)0x74383ee9, (q31_t)0xca5cce40,\n    (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x7432fa4b, (q31_t)0xca516597,\n    (q31_t)0x74305790, (q31_t)0xca4bb174, (q31_t)0x742db48e, (q31_t)0xca45fd72,\n    (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74286db3, (q31_t)0xca3a95d2,\n    (q31_t)0x7425c9da, (q31_t)0xca34e234, (q31_t)0x742325b9, (q31_t)0xca2f2eb6,\n    (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x741ddca0, (q31_t)0xca23c820,\n    (q31_t)0x741b37a9, (q31_t)0xca1e1506, (q31_t)0x74189269, (q31_t)0xca18620e,\n    (q31_t)0x7415ece2, (q31_t)0xca12af37, (q31_t)0x74134714, (q31_t)0xca0cfc81,\n    (q31_t)0x7410a0fe, (q31_t)0xca0749ec, (q31_t)0x740dfaa0, (q31_t)0xca019779,\n    (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7408ad0e, (q31_t)0xc9f632f6,\n    (q31_t)0x740605d9, (q31_t)0xc9f080e7, (q31_t)0x74035e5d, (q31_t)0xc9eacef9,\n    (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73fe0e8f, (q31_t)0xc9df6b81,\n    (q31_t)0x73fb663c, (q31_t)0xc9d9b9f7, (q31_t)0x73f8bda2, (q31_t)0xc9d4088f,\n    (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73f36b97, (q31_t)0xc9c8a622,\n    (q31_t)0x73f0c226, (q31_t)0xc9c2f51e, (q31_t)0x73ee186e, (q31_t)0xc9bd443c,\n    (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a, (q31_t)0x73e8c426, (q31_t)0xc9b1e2db,\n    (q31_t)0x73e61997, (q31_t)0xc9ac325d, (q31_t)0x73e36ec1, (q31_t)0xc9a68200,\n    (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73de183e, (q31_t)0xc99b21ab,\n    (q31_t)0x73db6c91, (q31_t)0xc99571b3, (q31_t)0x73d8c09d, (q31_t)0xc98fc1dc,\n    (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73d367de, (q31_t)0xc9846294,\n    (q31_t)0x73d0bb13, (q31_t)0xc97eb322, (q31_t)0x73ce0e01, (q31_t)0xc97903d2,\n    (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c8b307, (q31_t)0xc96da597,\n    (q31_t)0x73c6051f, (q31_t)0xc967f6ac, (q31_t)0x73c356ef, (q31_t)0xc96247e2,\n    (q31_t)0x73c0a878, (q31_t)0xc95c993a, (q31_t)0x73bdf9b9, (q31_t)0xc956eab4,\n    (q31_t)0x73bb4ab3, (q31_t)0xc9513c50, (q31_t)0x73b89b66, (q31_t)0xc94b8e0d,\n    (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73b33bf5, (q31_t)0xc94031ed,\n    (q31_t)0x73b08bd1, (q31_t)0xc93a8410, (q31_t)0x73addb67, (q31_t)0xc934d654,\n    (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a879bb, (q31_t)0xc9297b42,\n    (q31_t)0x73a5c87a, (q31_t)0xc923cdec, (q31_t)0x73a316f2, (q31_t)0xc91e20b8,\n    (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x739db30b, (q31_t)0xc912c6b5,\n    (q31_t)0x739b00ad, (q31_t)0xc90d19e6, (q31_t)0x73984e07, (q31_t)0xc9076d39,\n    (q31_t)0x73959b1b, (q31_t)0xc901c0ae, (q31_t)0x7392e7e6, (q31_t)0xc8fc1445,\n    (q31_t)0x7390346b, (q31_t)0xc8f667fe, (q31_t)0x738d80a8, (q31_t)0xc8f0bbd9,\n    (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x7388184d, (q31_t)0xc8e563f5,\n    (q31_t)0x738563b5, (q31_t)0xc8dfb836, (q31_t)0x7382aed5, (q31_t)0xc8da0c99,\n    (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x737d4440, (q31_t)0xc8ceb5c4,\n    (q31_t)0x737a8e8a, (q31_t)0xc8c90a8d, (q31_t)0x7377d88d, (q31_t)0xc8c35f78,\n    (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x73726bbe, (q31_t)0xc8b809b4,\n    (q31_t)0x736fb4ec, (q31_t)0xc8b25f06, (q31_t)0x736cfdd2, (q31_t)0xc8acb479,\n    (q31_t)0x736a4671, (q31_t)0xc8a70a0e, (q31_t)0x73678ec9, (q31_t)0xc8a15fc6,\n    (q31_t)0x7364d6da, (q31_t)0xc89bb5a0, (q31_t)0x73621ea4, (q31_t)0xc8960b9c,\n    (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x735cad61, (q31_t)0xc88ab7fa,\n    (q31_t)0x7359f456, (q31_t)0xc8850e5d, (q31_t)0x73573b03, (q31_t)0xc87f64e2,\n    (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x7351c787, (q31_t)0xc8741252,\n    (q31_t)0x734f0d5f, (q31_t)0xc86e693d, (q31_t)0x734c52ef, (q31_t)0xc868c04b,\n    (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x7346dd3a, (q31_t)0xc85d6ece,\n    (q31_t)0x734421f6, (q31_t)0xc857c642, (q31_t)0x7341666a, (q31_t)0xc8521dd9,\n    (q31_t)0x733eaa96, (q31_t)0xc84c7593, (q31_t)0x733bee7c, (q31_t)0xc846cd6e,\n    (q31_t)0x7339321b, (q31_t)0xc841256d, (q31_t)0x73367572, (q31_t)0xc83b7d8d,\n    (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7330fb4d, (q31_t)0xc8302e35,\n    (q31_t)0x732e3dcf, (q31_t)0xc82a86bd, (q31_t)0x732b800a, (q31_t)0xc824df67,\n    (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x732603ac, (q31_t)0xc8199123,\n    (q31_t)0x73234512, (q31_t)0xc813ea35, (q31_t)0x73208632, (q31_t)0xc80e4369,\n    (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x731b079b, (q31_t)0xc802f638,\n    (q31_t)0x731847e5, (q31_t)0xc7fd4fd4, (q31_t)0x731587e8, (q31_t)0xc7f7a992,\n    (q31_t)0x7312c7a5, (q31_t)0xc7f20373, (q31_t)0x7310071a, (q31_t)0xc7ec5d76,\n    (q31_t)0x730d4648, (q31_t)0xc7e6b79c, (q31_t)0x730a8530, (q31_t)0xc7e111e5,\n    (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x73050229, (q31_t)0xc7d5c6de,\n    (q31_t)0x7302403c, (q31_t)0xc7d0218e, (q31_t)0x72ff7e07, (q31_t)0xc7ca7c61,\n    (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f9f8c9, (q31_t)0xc7bf3270,\n    (q31_t)0x72f735c0, (q31_t)0xc7b98dab, (q31_t)0x72f47270, (q31_t)0xc7b3e909,\n    (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72eeeafb, (q31_t)0xc7a8a02c,\n    (q31_t)0x72ec26d6, (q31_t)0xc7a2fbf3, (q31_t)0x72e9626a, (q31_t)0xc79d57db,\n    (q31_t)0x72e69db7, (q31_t)0xc797b3e7, (q31_t)0x72e3d8be, (q31_t)0xc7921015,\n    (q31_t)0x72e1137d, (q31_t)0xc78c6c67, (q31_t)0x72de4df6, (q31_t)0xc786c8db,\n    (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d8c213, (q31_t)0xc77b822b,\n    (q31_t)0x72d5fbb7, (q31_t)0xc775df08, (q31_t)0x72d33514, (q31_t)0xc7703c08,\n    (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72cda6fb, (q31_t)0xc764f66f,\n    (q31_t)0x72cadf83, (q31_t)0xc75f53d7, (q31_t)0x72c817c6, (q31_t)0xc759b163,\n    (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72c28775, (q31_t)0xc74e6ce2,\n    (q31_t)0x72bfbee3, (q31_t)0xc748cad6, (q31_t)0x72bcf60a, (q31_t)0xc74328ed,\n    (q31_t)0x72ba2cea, (q31_t)0xc73d8727, (q31_t)0x72b76383, (q31_t)0xc737e584,\n    (q31_t)0x72b499d6, (q31_t)0xc7324404, (q31_t)0x72b1cfe1, (q31_t)0xc72ca2a7,\n    (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72ac3b25, (q31_t)0xc7216056,\n    (q31_t)0x72a9705c, (q31_t)0xc71bbf62, (q31_t)0x72a6a54d, (q31_t)0xc7161e92,\n    (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x72a10e5b, (q31_t)0xc70add5a,\n    (q31_t)0x729e4277, (q31_t)0xc7053cf2, (q31_t)0x729b764d, (q31_t)0xc6ff9cae,\n    (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x7295dd25, (q31_t)0xc6f45c8f,\n    (q31_t)0x72931027, (q31_t)0xc6eebcb5, (q31_t)0x729042e3, (q31_t)0xc6e91cfd,\n    (q31_t)0x728d7557, (q31_t)0xc6e37d69, (q31_t)0x728aa785, (q31_t)0xc6ddddf8,\n    (q31_t)0x7287d96c, (q31_t)0xc6d83eab, (q31_t)0x72850b0d, (q31_t)0xc6d29f80,\n    (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x727f6d7a, (q31_t)0xc6c76195,\n    (q31_t)0x727c9e47, (q31_t)0xc6c1c2d4, (q31_t)0x7279cecd, (q31_t)0xc6bc2437,\n    (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x72742f05, (q31_t)0xc6b0e767,\n    (q31_t)0x72715eb8, (q31_t)0xc6ab4933, (q31_t)0x726e8e23, (q31_t)0xc6a5ab23,\n    (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7268ec27, (q31_t)0xc69a6f6e,\n    (q31_t)0x72661abf, (q31_t)0xc694d1c8, (q31_t)0x72634910, (q31_t)0xc68f3446,\n    (q31_t)0x7260771b, (q31_t)0xc68996e7, (q31_t)0x725da4df, (q31_t)0xc683f9ab,\n    (q31_t)0x725ad25d, (q31_t)0xc67e5c93, (q31_t)0x7257ff94, (q31_t)0xc678bf9f,\n    (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7252592f, (q31_t)0xc66d8620,\n    (q31_t)0x724f8593, (q31_t)0xc667e996, (q31_t)0x724cb1b0, (q31_t)0xc6624d30,\n    (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x72470916, (q31_t)0xc65714cd,\n    (q31_t)0x72443460, (q31_t)0xc65178d1, (q31_t)0x72415f63, (q31_t)0xc64bdcf9,\n    (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x723bb496, (q31_t)0xc640a5b3,\n    (q31_t)0x7238dec5, (q31_t)0xc63b0a46, (q31_t)0x723608af, (q31_t)0xc6356efc,\n    (q31_t)0x72333251, (q31_t)0xc62fd3d6, (q31_t)0x72305bae, (q31_t)0xc62a38d4,\n    (q31_t)0x722d84c4, (q31_t)0xc6249df5, (q31_t)0x722aad93, (q31_t)0xc61f033a,\n    (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x7224fe5f, (q31_t)0xc613ce2f,\n    (q31_t)0x7222265b, (q31_t)0xc60e33df, (q31_t)0x721f4e11, (q31_t)0xc60899b2,\n    (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x72199ca9, (q31_t)0xc5fd65c5,\n    (q31_t)0x7216c38c, (q31_t)0xc5f7cc04, (q31_t)0x7213ea28, (q31_t)0xc5f23267,\n    (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x720e368d, (q31_t)0xc5e6ff98,\n    (q31_t)0x720b5c57, (q31_t)0xc5e16667, (q31_t)0x720881d9, (q31_t)0xc5dbcd59,\n    (q31_t)0x7205a716, (q31_t)0xc5d6346f, (q31_t)0x7202cc0c, (q31_t)0xc5d09ba9,\n    (q31_t)0x71fff0bc, (q31_t)0xc5cb0307, (q31_t)0x71fd1525, (q31_t)0xc5c56a89,\n    (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71f75d25, (q31_t)0xc5ba39f8,\n    (q31_t)0x71f480bc, (q31_t)0xc5b4a1e5, (q31_t)0x71f1a40c, (q31_t)0xc5af09f7,\n    (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71ebe9da, (q31_t)0xc5a3da86,\n    (q31_t)0x71e90c57, (q31_t)0xc59e4303, (q31_t)0x71e62e8f, (q31_t)0xc598aba5,\n    (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71e0722a, (q31_t)0xc58d7d54,\n    (q31_t)0x71dd938f, (q31_t)0xc587e661, (q31_t)0x71dab4ad, (q31_t)0xc5824f93,\n    (q31_t)0x71d7d585, (q31_t)0xc57cb8e9, (q31_t)0x71d4f617, (q31_t)0xc5772263,\n    (q31_t)0x71d21662, (q31_t)0xc5718c00, (q31_t)0x71cf3667, (q31_t)0xc56bf5c2,\n    (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c9759f, (q31_t)0xc560c9b3,\n    (q31_t)0x71c694d2, (q31_t)0xc55b33e2, (q31_t)0x71c3b3bf, (q31_t)0xc5559e34,\n    (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71bdf0c5, (q31_t)0xc54a7346,\n    (q31_t)0x71bb0edf, (q31_t)0xc544de05, (q31_t)0x71b82cb3, (q31_t)0xc53f48e9,\n    (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71b26788, (q31_t)0xc5341f1d,\n    (q31_t)0x71af848a, (q31_t)0xc52e8a6d, (q31_t)0x71aca145, (q31_t)0xc528f5e1,\n    (q31_t)0x71a9bdba, (q31_t)0xc523617a, (q31_t)0x71a6d9e9, (q31_t)0xc51dcd37,\n    (q31_t)0x71a3f5d2, (q31_t)0xc5183919, (q31_t)0x71a11175, (q31_t)0xc512a51f,\n    (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x719b47e9, (q31_t)0xc5077d97,\n    (q31_t)0x719862b9, (q31_t)0xc501ea0a, (q31_t)0x71957d44, (q31_t)0xc4fc56a2,\n    (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x718fb187, (q31_t)0xc4f1303d,\n    (q31_t)0x718ccb3f, (q31_t)0xc4eb9d42, (q31_t)0x7189e4b2, (q31_t)0xc4e60a6b,\n    (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x718416c4, (q31_t)0xc4dae52a,\n    (q31_t)0x71812f65, (q31_t)0xc4d552c1, (q31_t)0x717e47bf, (q31_t)0xc4cfc07c,\n    (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b, (q31_t)0x717877a1, (q31_t)0xc4c49c5f,\n    (q31_t)0x71758f29, (q31_t)0xc4bf0a87, (q31_t)0x7172a66c, (q31_t)0xc4b978d4,\n    (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x716cd41e, (q31_t)0xc4ae55dc,\n    (q31_t)0x7169ea8f, (q31_t)0xc4a8c497, (q31_t)0x716700b9, (q31_t)0xc4a33376,\n    (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71612c3c, (q31_t)0xc49811a3,\n    (q31_t)0x715e4194, (q31_t)0xc49280f0, (q31_t)0x715b56a7, (q31_t)0xc48cf062,\n    (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x71557ffa, (q31_t)0xc481cfb4,\n    (q31_t)0x7152943b, (q31_t)0xc47c3f94, (q31_t)0x714fa836, (q31_t)0xc476af98,\n    (q31_t)0x714cbbeb, (q31_t)0xc4711fc2, (q31_t)0x7149cf5a, (q31_t)0xc46b9010,\n    (q31_t)0x7146e284, (q31_t)0xc4660083, (q31_t)0x7143f567, (q31_t)0xc460711b,\n    (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x713e1a5c, (q31_t)0xc45552b8,\n    (q31_t)0x713b2c6e, (q31_t)0xc44fc3be, (q31_t)0x71383e3a, (q31_t)0xc44a34e9,\n    (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x71326101, (q31_t)0xc43f17ad,\n    (q31_t)0x712f71fb, (q31_t)0xc4398947, (q31_t)0x712c82b0, (q31_t)0xc433fb05,\n    (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x7126a348, (q31_t)0xc428def0,\n    (q31_t)0x7123b32b, (q31_t)0xc423511d, (q31_t)0x7120c2c8, (q31_t)0xc41dc36f,\n    (q31_t)0x711dd220, (q31_t)0xc41835e6, (q31_t)0x711ae132, (q31_t)0xc412a882,\n    (q31_t)0x7117effe, (q31_t)0xc40d1b42, (q31_t)0x7114fe84, (q31_t)0xc4078e28,\n    (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x710f1ac0, (q31_t)0xc3fc7462,\n    (q31_t)0x710c2875, (q31_t)0xc3f6e7b7, (q31_t)0x710935e4, (q31_t)0xc3f15b31,\n    (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x71034ff2, (q31_t)0xc3e64294,\n    (q31_t)0x71005c90, (q31_t)0xc3e0b67d, (q31_t)0x70fd68e9, (q31_t)0xc3db2a8b,\n    (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70f780c9, (q31_t)0xc3d01316,\n    (q31_t)0x70f48c50, (q31_t)0xc3ca8793, (q31_t)0x70f19792, (q31_t)0xc3c4fc36,\n    (q31_t)0x70eea28e, (q31_t)0xc3bf70fd, (q31_t)0x70ebad45, (q31_t)0xc3b9e5ea,\n    (q31_t)0x70e8b7b5, (q31_t)0xc3b45afc, (q31_t)0x70e5c1e1, (q31_t)0xc3aed034,\n    (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70dfd566, (q31_t)0xc3a3bb12,\n    (q31_t)0x70dcdec0, (q31_t)0xc39e30b8, (q31_t)0x70d9e7d5, (q31_t)0xc398a685,\n    (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70d3f92d, (q31_t)0xc38d928d,\n    (q31_t)0x70d10171, (q31_t)0xc38808c9, (q31_t)0x70ce096f, (q31_t)0xc3827f2a,\n    (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70c8189b, (q31_t)0xc3776c5c,\n    (q31_t)0x70c51fc8, (q31_t)0xc371e32d, (q31_t)0x70c226b0, (q31_t)0xc36c5a24,\n    (q31_t)0x70bf2d53, (q31_t)0xc366d140, (q31_t)0x70bc33b0, (q31_t)0xc3614881,\n    (q31_t)0x70b939c7, (q31_t)0xc35bbfe8, (q31_t)0x70b63f99, (q31_t)0xc3563774,\n    (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70b04a6b, (q31_t)0xc34b26fc,\n    (q31_t)0x70ad4f6d, (q31_t)0xc3459ef9, (q31_t)0x70aa5428, (q31_t)0xc340171b,\n    (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x70a45ccf, (q31_t)0xc33507cf,\n    (q31_t)0x70a160ba, (q31_t)0xc32f8061, (q31_t)0x709e6460, (q31_t)0xc329f919,\n    (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x70986adb, (q31_t)0xc31eeaf9,\n    (q31_t)0x70956db1, (q31_t)0xc3196422, (q31_t)0x70927041, (q31_t)0xc313dd70,\n    (q31_t)0x708f728b, (q31_t)0xc30e56e4, (q31_t)0x708c7490, (q31_t)0xc308d07d,\n    (q31_t)0x70897650, (q31_t)0xc3034a3c, (q31_t)0x708677ca, (q31_t)0xc2fdc420,\n    (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x708079ee, (q31_t)0xc2f2b85a,\n    (q31_t)0x707d7a98, (q31_t)0xc2ed32af, (q31_t)0x707a7afd, (q31_t)0xc2e7ad2a,\n    (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x70747af6, (q31_t)0xc2dca291,\n    (q31_t)0x70717a8a, (q31_t)0xc2d71d7e, (q31_t)0x706e79d9, (q31_t)0xc2d1988f,\n    (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x706877a7, (q31_t)0xc2c68f24,\n    (q31_t)0x70657626, (q31_t)0xc2c10aa7, (q31_t)0x70627460, (q31_t)0xc2bb8650,\n    (q31_t)0x705f7255, (q31_t)0xc2b6021f, (q31_t)0x705c7004, (q31_t)0xc2b07e14,\n    (q31_t)0x70596d6d, (q31_t)0xc2aafa2e, (q31_t)0x70566a92, (q31_t)0xc2a5766e,\n    (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x7050640b, (q31_t)0xc29a6f60,\n    (q31_t)0x704d6060, (q31_t)0xc294ec12, (q31_t)0x704a5c6f, (q31_t)0xc28f68e9,\n    (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x704453be, (q31_t)0xc284630a,\n    (q31_t)0x70414efd, (q31_t)0xc27ee054, (q31_t)0x703e49f8, (q31_t)0xc2795dc3,\n    (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x70383f1d, (q31_t)0xc26e5913,\n    (q31_t)0x70353947, (q31_t)0xc268d6f5, (q31_t)0x7032332d, (q31_t)0xc26354fc,\n    (q31_t)0x702f2ccd, (q31_t)0xc25dd329, (q31_t)0x702c2628, (q31_t)0xc258517c,\n    (q31_t)0x70291f3e, (q31_t)0xc252cff5, (q31_t)0x7026180e, (q31_t)0xc24d4e95,\n    (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x702008e0, (q31_t)0xc2424c46,\n    (q31_t)0x701d00e1, (q31_t)0xc23ccb57, (q31_t)0x7019f89d, (q31_t)0xc2374a8f,\n    (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x7013e746, (q31_t)0xc22c4970,\n    (q31_t)0x7010de32, (q31_t)0xc226c91a, (q31_t)0x700dd4da, (q31_t)0xc22148ea,\n    (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x7007c159, (q31_t)0xc21648fd,\n    (q31_t)0x7004b731, (q31_t)0xc210c940, (q31_t)0x7001acc4, (q31_t)0xc20b49a9,\n    (q31_t)0x6ffea212, (q31_t)0xc205ca38, (q31_t)0x6ffb971b, (q31_t)0xc2004aed,\n    (q31_t)0x6ff88bde, (q31_t)0xc1facbc9, (q31_t)0x6ff5805d, (q31_t)0xc1f54cca,\n    (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fef688b, (q31_t)0xc1ea4f41,\n    (q31_t)0x6fec5c3b, (q31_t)0xc1e4d0b6, (q31_t)0x6fe94fa5, (q31_t)0xc1df5251,\n    (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fe335ab, (q31_t)0xc1d455f9,\n    (q31_t)0x6fe02846, (q31_t)0xc1ced807, (q31_t)0x6fdd1a9c, (q31_t)0xc1c95a3c,\n    (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fd6fe7a, (q31_t)0xc1be5f18,\n    (q31_t)0x6fd3f001, (q31_t)0xc1b8e1bf, (q31_t)0x6fd0e144, (q31_t)0xc1b3648d,\n    (q31_t)0x6fcdd241, (q31_t)0xc1ade781, (q31_t)0x6fcac2fa, (q31_t)0xc1a86a9c,\n    (q31_t)0x6fc7b36d, (q31_t)0xc1a2edde, (q31_t)0x6fc4a39c, (q31_t)0xc19d7145,\n    (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fbe832a, (q31_t)0xc1927888,\n    (q31_t)0x6fbb728a, (q31_t)0xc18cfc63, (q31_t)0x6fb861a4, (q31_t)0xc1878065,\n    (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fb23f0b, (q31_t)0xc17c88dc,\n    (q31_t)0x6faf2d57, (q31_t)0xc1770d52, (q31_t)0x6fac1b5f, (q31_t)0xc17191ee,\n    (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6fa5f69e, (q31_t)0xc1669b99,\n    (q31_t)0x6fa2e3d7, (q31_t)0xc16120a9, (q31_t)0x6f9fd0cb, (q31_t)0xc15ba5df,\n    (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d, (q31_t)0x6f99a9e3, (q31_t)0xc150b0c0,\n    (q31_t)0x6f969608, (q31_t)0xc14b366b, (q31_t)0x6f9381e9, (q31_t)0xc145bc3c,\n    (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f8d58db, (q31_t)0xc13ac852,\n    (q31_t)0x6f8a43ed, (q31_t)0xc1354e97, (q31_t)0x6f872eba, (q31_t)0xc12fd503,\n    (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f810386, (q31_t)0xc124e24f,\n    (q31_t)0x6f7ded84, (q31_t)0xc11f692f, (q31_t)0x6f7ad73e, (q31_t)0xc119f036,\n    (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f74a9e4, (q31_t)0xc10efeb8,\n    (q31_t)0x6f7192cf, (q31_t)0xc1098634, (q31_t)0x6f6e7b76, (q31_t)0xc1040dd6,\n    (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f, (q31_t)0x6f684bf6, (q31_t)0xc0f91d8f,\n    (q31_t)0x6f6533ce, (q31_t)0xc0f3a5a6, (q31_t)0x6f621b62, (q31_t)0xc0ee2de3,\n    (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f5be9bc, (q31_t)0xc0e33ed4,\n    (q31_t)0x6f58d082, (q31_t)0xc0ddc786, (q31_t)0x6f55b703, (q31_t)0xc0d8505f,\n    (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f4f8338, (q31_t)0xc0cd6287,\n    (q31_t)0x6f4c68eb, (q31_t)0xc0c7ebd6, (q31_t)0x6f494e5a, (q31_t)0xc0c2754b,\n    (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f431869, (q31_t)0xc0b788ab,\n    (q31_t)0x6f3ffd09, (q31_t)0xc0b21295, (q31_t)0x6f3ce165, (q31_t)0xc0ac9ca6,\n    (q31_t)0x6f39c57d, (q31_t)0xc0a726df, (q31_t)0x6f36a94f, (q31_t)0xc0a1b13e,\n    (q31_t)0x6f338cde, (q31_t)0xc09c3bc5, (q31_t)0x6f307027, (q31_t)0xc096c673,\n    (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f2a35ed, (q31_t)0xc08bdc44,\n    (q31_t)0x6f271868, (q31_t)0xc0866767, (q31_t)0x6f23faa0, (q31_t)0xc080f2b1,\n    (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1dbe41, (q31_t)0xc07609bb,\n    (q31_t)0x6f1a9faa, (q31_t)0xc070957b, (q31_t)0x6f1780cf, (q31_t)0xc06b2162,\n    (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f11424c, (q31_t)0xc06039a6,\n    (q31_t)0x6f0e22a3, (q31_t)0xc05ac603, (q31_t)0x6f0b02b6, (q31_t)0xc0555287,\n    (q31_t)0x6f07e285, (q31_t)0xc04fdf32, (q31_t)0x6f04c20f, (q31_t)0xc04a6c05,\n    (q31_t)0x6f01a155, (q31_t)0xc044f8fe, (q31_t)0x6efe8056, (q31_t)0xc03f8620,\n    (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ef83d8a, (q31_t)0xc034a0d8,\n    (q31_t)0x6ef51bbe, (q31_t)0xc02f2e6f, (q31_t)0x6ef1f9ad, (q31_t)0xc029bc2e,\n    (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6eebb4bf, (q31_t)0xc01ed821,\n    (q31_t)0x6ee891e1, (q31_t)0xc0196656, (q31_t)0x6ee56ebe, (q31_t)0xc013f4b2,\n    (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6edf27ac, (q31_t)0xc00911e1,\n    (q31_t)0x6edc03bc, (q31_t)0xc003a0b3, (q31_t)0x6ed8df88, (q31_t)0xbffe2fad,\n    (q31_t)0x6ed5bb10, (q31_t)0xbff8bece, (q31_t)0x6ed29653, (q31_t)0xbff34e17,\n    (q31_t)0x6ecf7152, (q31_t)0xbfeddd88, (q31_t)0x6ecc4c0d, (q31_t)0xbfe86d20,\n    (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ec600b5, (q31_t)0xbfdd8cc6,\n    (q31_t)0x6ec2daa2, (q31_t)0xbfd81cd5, (q31_t)0x6ebfb44b, (q31_t)0xbfd2ad0b,\n    (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eb966d1, (q31_t)0xbfc7cdee,\n    (q31_t)0x6eb63fad, (q31_t)0xbfc25e9b, (q31_t)0x6eb31845, (q31_t)0xbfbcef70,\n    (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6eacc8a8, (q31_t)0xbfb21190,\n    (q31_t)0x6ea9a073, (q31_t)0xbfaca2dc, (q31_t)0x6ea677fa, (q31_t)0xbfa7344f,\n    (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea, (q31_t)0x6ea0263b, (q31_t)0xbf9c57ac,\n    (q31_t)0x6e9cfcf5, (q31_t)0xbf96e997, (q31_t)0x6e99d36b, (q31_t)0xbf917ba9,\n    (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e937f8a, (q31_t)0xbf86a044,\n    (q31_t)0x6e905534, (q31_t)0xbf8132ce, (q31_t)0x6e8d2a99, (q31_t)0xbf7bc57f,\n    (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e86d496, (q31_t)0xbf70eb59,\n    (q31_t)0x6e83a92f, (q31_t)0xbf6b7e81, (q31_t)0x6e807d83, (q31_t)0xbf6611d2,\n    (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e7a255f, (q31_t)0xbf5b38ea,\n    (q31_t)0x6e76f8e7, (q31_t)0xbf55ccb2, (q31_t)0x6e73cc2b, (q31_t)0xbf5060a2,\n    (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba, (q31_t)0x6e6d71e6, (q31_t)0xbf4588fa,\n    (q31_t)0x6e6a445d, (q31_t)0xbf401d61, (q31_t)0x6e671690, (q31_t)0xbf3ab1f1,\n    (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e60ba2a, (q31_t)0xbf2fdb88,\n    (q31_t)0x6e5d8b91, (q31_t)0xbf2a708f, (q31_t)0x6e5a5cb4, (q31_t)0xbf2505bf,\n    (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e53fe2e, (q31_t)0xbf1a3096,\n    (q31_t)0x6e50ce84, (q31_t)0xbf14c63d, (q31_t)0x6e4d9e97, (q31_t)0xbf0f5c0d,\n    (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e473df0, (q31_t)0xbf048824,\n    (q31_t)0x6e440d37, (q31_t)0xbeff1e6c, (q31_t)0x6e40dc39, (q31_t)0xbef9b4dc,\n    (q31_t)0x6e3daaf8, (q31_t)0xbef44b74, (q31_t)0x6e3a7972, (q31_t)0xbeeee234,\n    (q31_t)0x6e3747a9, (q31_t)0xbee9791c, (q31_t)0x6e34159b, (q31_t)0xbee4102d,\n    (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e2db0b4, (q31_t)0xbed93ec6,\n    (q31_t)0x6e2a7ddb, (q31_t)0xbed3d64f, (q31_t)0x6e274abe, (q31_t)0xbece6e00,\n    (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e20e3b7, (q31_t)0xbec39ddb,\n    (q31_t)0x6e1dafce, (q31_t)0xbebe3605, (q31_t)0x6e1a7ba1, (q31_t)0xbeb8ce57,\n    (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e14127b, (q31_t)0xbeadff74,\n    (q31_t)0x6e10dd82, (q31_t)0xbea8983f, (q31_t)0x6e0da845, (q31_t)0xbea33132,\n    (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e, (q31_t)0x6e073d00, (q31_t)0xbe986391,\n    (q31_t)0x6e0406f8, (q31_t)0xbe92fcfe, (q31_t)0x6e00d0ac, (q31_t)0xbe8d9692,\n    (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6dfa6348, (q31_t)0xbe82ca35,\n    (q31_t)0x6df72c30, (q31_t)0xbe7d6442, (q31_t)0x6df3f4d4, (q31_t)0xbe77fe78,\n    (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6ded8552, (q31_t)0xbe6d335e,\n    (q31_t)0x6dea4d2b, (q31_t)0xbe67ce0d, (q31_t)0x6de714c0, (q31_t)0xbe6268e5,\n    (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6de0a31f, (q31_t)0xbe579f0f,\n    (q31_t)0x6ddd69e9, (q31_t)0xbe523a60, (q31_t)0x6dda306f, (q31_t)0xbe4cd5da,\n    (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c, (q31_t)0x6dd3bcaf, (q31_t)0xbe420d47,\n    (q31_t)0x6dd0826a, (q31_t)0xbe3ca93b, (q31_t)0x6dcd47e1, (q31_t)0xbe374557,\n    (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dc6d204, (q31_t)0xbe2c7e09,\n    (q31_t)0x6dc396b0, (q31_t)0xbe271a9f, (q31_t)0x6dc05b18, (q31_t)0xbe21b75d,\n    (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db9e31d, (q31_t)0xbe16f154,\n    (q31_t)0x6db6a6ba, (q31_t)0xbe118e8c, (q31_t)0x6db36a14, (q31_t)0xbe0c2bed,\n    (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6daceffb, (q31_t)0xbe01672a,\n    (q31_t)0x6da9b28a, (q31_t)0xbdfc0505, (q31_t)0x6da674d5, (q31_t)0xbdf6a309,\n    (q31_t)0x6da336dc, (q31_t)0xbdf14135, (q31_t)0x6d9ff89f, (q31_t)0xbdebdf8b,\n    (q31_t)0x6d9cba1f, (q31_t)0xbde67e09, (q31_t)0x6d997b5b, (q31_t)0xbde11cb0,\n    (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d92fd09, (q31_t)0xbdd65a78,\n    (q31_t)0x6d8fbd7a, (q31_t)0xbdd0f999, (q31_t)0x6d8c7da8, (q31_t)0xbdcb98e3,\n    (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d85fd39, (q31_t)0xbdc0d7f2,\n    (q31_t)0x6d82bc9d, (q31_t)0xbdbb77b7, (q31_t)0x6d7f7bbc, (q31_t)0xbdb617a4,\n    (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d78f931, (q31_t)0xbdab57fa,\n    (q31_t)0x6d75b786, (q31_t)0xbda5f862, (q31_t)0x6d727597, (q31_t)0xbda098f3,\n    (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad, (q31_t)0x6d6bf0f0, (q31_t)0xbd95da91,\n    (q31_t)0x6d68ae37, (q31_t)0xbd907b9d, (q31_t)0x6d656b3a, (q31_t)0xbd8b1cd2,\n    (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d5ee477, (q31_t)0xbd805fb7,\n    (q31_t)0x6d5ba0b0, (q31_t)0xbd7b0167, (q31_t)0x6d585ca6, (q31_t)0xbd75a340,\n    (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d51d3c6, (q31_t)0xbd6ae76d,\n    (q31_t)0x6d4e8ef2, (q31_t)0xbd6589c1, (q31_t)0x6d4b49da, (q31_t)0xbd602c3f,\n    (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d44bedf, (q31_t)0xbd5571b5,\n    (q31_t)0x6d4178fd, (q31_t)0xbd5014ad, (q31_t)0x6d3e32d7, (q31_t)0xbd4ab7cf,\n    (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a, (q31_t)0x6d37a5c1, (q31_t)0xbd3ffe8e,\n    (q31_t)0x6d345ed1, (q31_t)0xbd3aa22c, (q31_t)0x6d31179e, (q31_t)0xbd3545f2,\n    (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d2a886e, (q31_t)0xbd2a8dfb,\n    (q31_t)0x6d274070, (q31_t)0xbd25323d, (q31_t)0x6d23f830, (q31_t)0xbd1fd6a8,\n    (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d1d66e4, (q31_t)0xbd151ffb,\n    (q31_t)0x6d1a1dda, (q31_t)0xbd0fc4e2, (q31_t)0x6d16d48c, (q31_t)0xbd0a69f2,\n    (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d104126, (q31_t)0xbcffb48f,\n    (q31_t)0x6d0cf70f, (q31_t)0xbcfa5a1b, (q31_t)0x6d09acb4, (q31_t)0xbcf4ffd1,\n    (q31_t)0x6d066215, (q31_t)0xbcefa5b0, (q31_t)0x6d031734, (q31_t)0xbcea4bb9,\n    (q31_t)0x6cffcc0f, (q31_t)0xbce4f1eb, (q31_t)0x6cfc80a7, (q31_t)0xbcdf9846,\n    (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cf5e90d, (q31_t)0xbcd4e579,\n    (q31_t)0x6cf29cdc, (q31_t)0xbccf8c50, (q31_t)0x6cef5067, (q31_t)0xbcca3351,\n    (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6ce8b6b4, (q31_t)0xbcbf81cf,\n    (q31_t)0x6ce56975, (q31_t)0xbcba294d, (q31_t)0x6ce21bf4, (q31_t)0xbcb4d0f4,\n    (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cdb8027, (q31_t)0xbcaa20be,\n    (q31_t)0x6cd831dc, (q31_t)0xbca4c8e1, (q31_t)0x6cd4e34e, (q31_t)0xbc9f712e,\n    (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5, (q31_t)0x6cce4568, (q31_t)0xbc94c245,\n    (q31_t)0x6ccaf610, (q31_t)0xbc8f6b0f, (q31_t)0x6cc7a676, (q31_t)0xbc8a1402,\n    (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cc10677, (q31_t)0xbc7f6665,\n    (q31_t)0x6cbdb613, (q31_t)0xbc7a0fd6, (q31_t)0x6cba656c, (q31_t)0xbc74b96f,\n    (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6cb3c355, (q31_t)0xbc6a0d20,\n    (q31_t)0x6cb071e4, (q31_t)0xbc64b737, (q31_t)0x6cad2031, (q31_t)0xbc5f6177,\n    (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6ca67c01, (q31_t)0xbc54b676,\n    (q31_t)0x6ca32985, (q31_t)0xbc4f6134, (q31_t)0x6c9fd6c6, (q31_t)0xbc4a0c1b,\n    (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c, (q31_t)0x6c99307e, (q31_t)0xbc3f6267,\n    (q31_t)0x6c95dcf6, (q31_t)0xbc3a0dcc, (q31_t)0x6c92892a, (q31_t)0xbc34b95b,\n    (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c8be0cb, (q31_t)0xbc2a10f6,\n    (q31_t)0x6c888c36, (q31_t)0xbc24bd02, (q31_t)0x6c85375f, (q31_t)0xbc1f6938,\n    (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c7e8ce8, (q31_t)0xbc14c221,\n    (q31_t)0x6c7b3748, (q31_t)0xbc0f6ed5, (q31_t)0x6c77e165, (q31_t)0xbc0a1bb3,\n    (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c7134d7, (q31_t)0xbbff75ec,\n    (q31_t)0x6c6dde2b, (q31_t)0xbbfa2347, (q31_t)0x6c6a873d, (q31_t)0xbbf4d0cc,\n    (q31_t)0x6c67300b, (q31_t)0xbbef7e7c, (q31_t)0x6c63d897, (q31_t)0xbbea2c55,\n    (q31_t)0x6c6080e0, (q31_t)0xbbe4da58, (q31_t)0x6c5d28e6, (q31_t)0xbbdf8885,\n    (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c56782a, (q31_t)0xbbd4e55e,\n    (q31_t)0x6c531f67, (q31_t)0xbbcf940a, (q31_t)0x6c4fc662, (q31_t)0xbbca42df,\n    (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df, (q31_t)0x6c49138f, (q31_t)0xbbbfa108,\n    (q31_t)0x6c45b9c1, (q31_t)0xbbba505c, (q31_t)0x6c425fb1, (q31_t)0xbbb4ffda,\n    (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c3baac7, (q31_t)0xbbaa5f54,\n    (q31_t)0x6c384fef, (q31_t)0xbba50f50, (q31_t)0x6c34f4d3, (q31_t)0xbb9fbf77,\n    (q31_t)0x6c319975, (q31_t)0xbb9a6fc7, (q31_t)0x6c2e3dd4, (q31_t)0xbb952042,\n    (q31_t)0x6c2ae1f0, (q31_t)0xbb8fd0e7, (q31_t)0x6c2785ca, (q31_t)0xbb8a81b6,\n    (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c20ccb4, (q31_t)0xbb7fe3d3,\n    (q31_t)0x6c1d6fc6, (q31_t)0xbb7a9521, (q31_t)0x6c1a1295, (q31_t)0xbb754699,\n    (q31_t)0x6c16b521, (q31_t)0xbb6ff83c, (q31_t)0x6c13576a, (q31_t)0xbb6aaa09,\n    (q31_t)0x6c0ff971, (q31_t)0xbb655c00, (q31_t)0x6c0c9b35, (q31_t)0xbb600e21,\n    (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6c05ddf5, (q31_t)0xbb5572e3,\n    (q31_t)0x6c027ef1, (q31_t)0xbb502583, (q31_t)0x6bff1faa, (q31_t)0xbb4ad84e,\n    (q31_t)0x6bfbc021, (q31_t)0xbb458b43, (q31_t)0x6bf86055, (q31_t)0xbb403e63,\n    (q31_t)0x6bf50047, (q31_t)0xbb3af1ad, (q31_t)0x6bf19ff6, (q31_t)0xbb35a521,\n    (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6beade8c, (q31_t)0xbb2b0c8a,\n    (q31_t)0x6be77d74, (q31_t)0xbb25c07d, (q31_t)0x6be41c18, (q31_t)0xbb20749c,\n    (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4, (q31_t)0x6bdd589a, (q31_t)0xbb15dd57,\n    (q31_t)0x6bd9f677, (q31_t)0xbb1091f5, (q31_t)0x6bd69412, (q31_t)0xbb0b46bd,\n    (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bcfce80, (q31_t)0xbb00b0ce,\n    (q31_t)0x6bcc6b53, (q31_t)0xbafb6615, (q31_t)0x6bc907e3, (q31_t)0xbaf61b88,\n    (q31_t)0x6bc5a431, (q31_t)0xbaf0d125, (q31_t)0x6bc2403d, (q31_t)0xbaeb86ed,\n    (q31_t)0x6bbedc06, (q31_t)0xbae63cdf, (q31_t)0x6bbb778d, (q31_t)0xbae0f2fc,\n    (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6bb4add3, (q31_t)0xbad65fb5,\n    (q31_t)0x6bb14892, (q31_t)0xbad11652, (q31_t)0x6bade30f, (q31_t)0xbacbcd1a,\n    (q31_t)0x6baa7d49, (q31_t)0xbac6840c, (q31_t)0x6ba71741, (q31_t)0xbac13b29,\n    (q31_t)0x6ba3b0f7, (q31_t)0xbabbf270, (q31_t)0x6ba04a6a, (q31_t)0xbab6a9e3,\n    (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b997c8a, (q31_t)0xbaac1948,\n    (q31_t)0x6b961536, (q31_t)0xbaa6d13a, (q31_t)0x6b92ada0, (q31_t)0xbaa18958,\n    (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0, (q31_t)0x6b8bddac, (q31_t)0xba96fa13,\n    (q31_t)0x6b88754f, (q31_t)0xba91b2b1, (q31_t)0x6b850caf, (q31_t)0xba8c6b79,\n    (q31_t)0x6b81a3cd, (q31_t)0xba87246d, (q31_t)0x6b7e3aa9, (q31_t)0xba81dd8b,\n    (q31_t)0x6b7ad142, (q31_t)0xba7c96d4, (q31_t)0x6b776799, (q31_t)0xba775048,\n    (q31_t)0x6b73fdae, (q31_t)0xba7209e7, (q31_t)0x6b709381, (q31_t)0xba6cc3b1,\n    (q31_t)0x6b6d2911, (q31_t)0xba677da6, (q31_t)0x6b69be5f, (q31_t)0xba6237c5,\n    (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b62e834, (q31_t)0xba57ac86,\n    (q31_t)0x6b5f7cbc, (q31_t)0xba526726, (q31_t)0x6b5c1101, (q31_t)0xba4d21f2,\n    (q31_t)0x6b58a503, (q31_t)0xba47dce8, (q31_t)0x6b5538c4, (q31_t)0xba42980a,\n    (q31_t)0x6b51cc42, (q31_t)0xba3d5356, (q31_t)0x6b4e5f7f, (q31_t)0xba380ece,\n    (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b478530, (q31_t)0xba2d863e,\n    (q31_t)0x6b4417a6, (q31_t)0xba284237, (q31_t)0x6b40a9d9, (q31_t)0xba22fe5b,\n    (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa, (q31_t)0x6b39cd7a, (q31_t)0xba187724,\n    (q31_t)0x6b365ee7, (q31_t)0xba1333c9, (q31_t)0x6b32f012, (q31_t)0xba0df099,\n    (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b2c11a1, (q31_t)0xba036abb,\n    (q31_t)0x6b28a206, (q31_t)0xb9fe280d, (q31_t)0x6b253228, (q31_t)0xb9f8e58a,\n    (q31_t)0x6b21c208, (q31_t)0xb9f3a332, (q31_t)0x6b1e51a7, (q31_t)0xb9ee6106,\n    (q31_t)0x6b1ae103, (q31_t)0xb9e91f04, (q31_t)0x6b17701d, (q31_t)0xb9e3dd2e,\n    (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b108d8b, (q31_t)0xb9d95a03,\n    (q31_t)0x6b0d1bdf, (q31_t)0xb9d418af, (q31_t)0x6b09a9f1, (q31_t)0xb9ced786,\n    (q31_t)0x6b0637c1, (q31_t)0xb9c99688, (q31_t)0x6b02c54f, (q31_t)0xb9c455b6,\n    (q31_t)0x6aff529a, (q31_t)0xb9bf150e, (q31_t)0x6afbdfa4, (q31_t)0xb9b9d493,\n    (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6af4f8f2, (q31_t)0xb9af541d,\n    (q31_t)0x6af18536, (q31_t)0xb9aa1423, (q31_t)0x6aee1138, (q31_t)0xb9a4d455,\n    (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2, (q31_t)0x6ae72876, (q31_t)0xb99a553a,\n    (q31_t)0x6ae3b3b2, (q31_t)0xb99515ee, (q31_t)0x6ae03eac, (q31_t)0xb98fd6cd,\n    (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6ad953db, (q31_t)0xb985590e,\n    (q31_t)0x6ad5de0f, (q31_t)0xb9801a70, (q31_t)0x6ad26802, (q31_t)0xb97adbfd,\n    (q31_t)0x6acef1b2, (q31_t)0xb9759db6, (q31_t)0x6acb7b21, (q31_t)0xb9705f9a,\n    (q31_t)0x6ac8044e, (q31_t)0xb96b21aa, (q31_t)0x6ac48d39, (q31_t)0xb965e3e5,\n    (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6abd9e49, (q31_t)0xb95b68de,\n    (q31_t)0x6aba266e, (q31_t)0xb9562b9c, (q31_t)0x6ab6ae52, (q31_t)0xb950ee86,\n    (q31_t)0x6ab335f4, (q31_t)0xb94bb19b, (q31_t)0x6aafbd54, (q31_t)0xb94674dc,\n    (q31_t)0x6aac4472, (q31_t)0xb9413848, (q31_t)0x6aa8cb4e, (q31_t)0xb93bfbe0,\n    (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6aa1d841, (q31_t)0xb9318393,\n    (q31_t)0x6a9e5e58, (q31_t)0xb92c47ae, (q31_t)0x6a9ae42e, (q31_t)0xb9270bf5,\n    (q31_t)0x6a9769c1, (q31_t)0xb921d067, (q31_t)0x6a93ef13, (q31_t)0xb91c9505,\n    (q31_t)0x6a907423, (q31_t)0xb91759cf, (q31_t)0x6a8cf8f1, (q31_t)0xb9121ec5,\n    (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a8601c8, (q31_t)0xb907a933,\n    (q31_t)0x6a8285d1, (q31_t)0xb9026eac, (q31_t)0x6a7f0999, (q31_t)0xb8fd3451,\n    (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21, (q31_t)0x6a781062, (q31_t)0xb8f2c01d,\n    (q31_t)0x6a749365, (q31_t)0xb8ed8646, (q31_t)0x6a711625, (q31_t)0xb8e84c99,\n    (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a6a1ae2, (q31_t)0xb8ddd9c5,\n    (q31_t)0x6a669cdd, (q31_t)0xb8d8a09d, (q31_t)0x6a631e97, (q31_t)0xb8d367a0,\n    (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf, (q31_t)0x6a5c2147, (q31_t)0xb8c8f62b,\n    (q31_t)0x6a58a23c, (q31_t)0xb8c3bdb2, (q31_t)0x6a5522ef, (q31_t)0xb8be8565,\n    (q31_t)0x6a51a361, (q31_t)0xb8b94d44, (q31_t)0x6a4e2392, (q31_t)0xb8b4154f,\n    (q31_t)0x6a4aa381, (q31_t)0xb8aedd86, (q31_t)0x6a47232e, (q31_t)0xb8a9a5e9,\n    (q31_t)0x6a43a29a, (q31_t)0xb8a46e78, (q31_t)0x6a4021c4, (q31_t)0xb89f3733,\n    (q31_t)0x6a3ca0ad, (q31_t)0xb89a001a, (q31_t)0x6a391f54, (q31_t)0xb894c92d,\n    (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x6a321bdd, (q31_t)0xb88a5bd8,\n    (q31_t)0x6a2e99c0, (q31_t)0xb885256f, (q31_t)0x6a2b1761, (q31_t)0xb87fef33,\n    (q31_t)0x6a2794c1, (q31_t)0xb87ab922, (q31_t)0x6a2411df, (q31_t)0xb875833e,\n    (q31_t)0x6a208ebb, (q31_t)0xb8704d85, (q31_t)0x6a1d0b57, (q31_t)0xb86b17f9,\n    (q31_t)0x6a1987b0, (q31_t)0xb865e299, (q31_t)0x6a1603c8, (q31_t)0xb860ad66,\n    (q31_t)0x6a127f9f, (q31_t)0xb85b785e, (q31_t)0x6a0efb35, (q31_t)0xb8564383,\n    (q31_t)0x6a0b7689, (q31_t)0xb8510ed4, (q31_t)0x6a07f19b, (q31_t)0xb84bda51,\n    (q31_t)0x6a046c6c, (q31_t)0xb846a5fa, (q31_t)0x6a00e6fc, (q31_t)0xb84171cf,\n    (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69f9db57, (q31_t)0xb83709ff,\n    (q31_t)0x69f65523, (q31_t)0xb831d659, (q31_t)0x69f2cead, (q31_t)0xb82ca2e0,\n    (q31_t)0x69ef47f6, (q31_t)0xb8276f93, (q31_t)0x69ebc0fe, (q31_t)0xb8223c72,\n    (q31_t)0x69e839c4, (q31_t)0xb81d097e, (q31_t)0x69e4b249, (q31_t)0xb817d6b6,\n    (q31_t)0x69e12a8c, (q31_t)0xb812a41a, (q31_t)0x69dda28f, (q31_t)0xb80d71aa,\n    (q31_t)0x69da1a50, (q31_t)0xb8083f67, (q31_t)0x69d691cf, (q31_t)0xb8030d51,\n    (q31_t)0x69d3090e, (q31_t)0xb7fddb67, (q31_t)0x69cf800b, (q31_t)0xb7f8a9a9,\n    (q31_t)0x69cbf6c7, (q31_t)0xb7f37818, (q31_t)0x69c86d41, (q31_t)0xb7ee46b3,\n    (q31_t)0x69c4e37a, (q31_t)0xb7e9157a, (q31_t)0x69c15973, (q31_t)0xb7e3e46e,\n    (q31_t)0x69bdcf29, (q31_t)0xb7deb38f, (q31_t)0x69ba449f, (q31_t)0xb7d982dc,\n    (q31_t)0x69b6b9d3, (q31_t)0xb7d45255, (q31_t)0x69b32ec7, (q31_t)0xb7cf21fb,\n    (q31_t)0x69afa378, (q31_t)0xb7c9f1ce, (q31_t)0x69ac17e9, (q31_t)0xb7c4c1cd,\n    (q31_t)0x69a88c19, (q31_t)0xb7bf91f8, (q31_t)0x69a50007, (q31_t)0xb7ba6251,\n    (q31_t)0x69a173b5, (q31_t)0xb7b532d6, (q31_t)0x699de721, (q31_t)0xb7b00387,\n    (q31_t)0x699a5a4c, (q31_t)0xb7aad465, (q31_t)0x6996cd35, (q31_t)0xb7a5a570,\n    (q31_t)0x69933fde, (q31_t)0xb7a076a7, (q31_t)0x698fb246, (q31_t)0xb79b480b,\n    (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x69889651, (q31_t)0xb790eb58,\n    (q31_t)0x698507f6, (q31_t)0xb78bbd42, (q31_t)0x69817959, (q31_t)0xb7868f59,\n    (q31_t)0x697dea7b, (q31_t)0xb781619c, (q31_t)0x697a5b5c, (q31_t)0xb77c340c,\n    (q31_t)0x6976cbfc, (q31_t)0xb77706a9, (q31_t)0x69733c5b, (q31_t)0xb771d972,\n    (q31_t)0x696fac78, (q31_t)0xb76cac69, (q31_t)0x696c1c55, (q31_t)0xb7677f8c,\n    (q31_t)0x69688bf1, (q31_t)0xb76252db, (q31_t)0x6964fb4c, (q31_t)0xb75d2658,\n    (q31_t)0x69616a65, (q31_t)0xb757fa01, (q31_t)0x695dd93e, (q31_t)0xb752cdd8,\n    (q31_t)0x695a47d6, (q31_t)0xb74da1db, (q31_t)0x6956b62d, (q31_t)0xb748760b,\n    (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x694f9217, (q31_t)0xb73e1ef1,\n    (q31_t)0x694bffab, (q31_t)0xb738f3a7, (q31_t)0x69486cfe, (q31_t)0xb733c88b,\n    (q31_t)0x6944da10, (q31_t)0xb72e9d9b, (q31_t)0x694146e1, (q31_t)0xb72972d8,\n    (q31_t)0x693db371, (q31_t)0xb7244842, (q31_t)0x693a1fc0, (q31_t)0xb71f1dd9,\n    (q31_t)0x69368bce, (q31_t)0xb719f39e, (q31_t)0x6932f79b, (q31_t)0xb714c98e,\n    (q31_t)0x692f6328, (q31_t)0xb70f9fac, (q31_t)0x692bce73, (q31_t)0xb70a75f7,\n    (q31_t)0x6928397e, (q31_t)0xb7054c6f, (q31_t)0x6924a448, (q31_t)0xb7002314,\n    (q31_t)0x69210ed1, (q31_t)0xb6faf9e6, (q31_t)0x691d7919, (q31_t)0xb6f5d0e5,\n    (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x69164ce7, (q31_t)0xb6eb7f6b,\n    (q31_t)0x6912b66c, (q31_t)0xb6e656f1, (q31_t)0x690f1fb1, (q31_t)0xb6e12ea4,\n    (q31_t)0x690b88b5, (q31_t)0xb6dc0685, (q31_t)0x6907f178, (q31_t)0xb6d6de92,\n    (q31_t)0x690459fb, (q31_t)0xb6d1b6cd, (q31_t)0x6900c23c, (q31_t)0xb6cc8f35,\n    (q31_t)0x68fd2a3d, (q31_t)0xb6c767ca, (q31_t)0x68f991fd, (q31_t)0xb6c2408c,\n    (q31_t)0x68f5f97d, (q31_t)0xb6bd197c, (q31_t)0x68f260bb, (q31_t)0xb6b7f298,\n    (q31_t)0x68eec7b9, (q31_t)0xb6b2cbe2, (q31_t)0x68eb2e76, (q31_t)0xb6ada559,\n    (q31_t)0x68e794f3, (q31_t)0xb6a87efd, (q31_t)0x68e3fb2e, (q31_t)0xb6a358ce,\n    (q31_t)0x68e06129, (q31_t)0xb69e32cd, (q31_t)0x68dcc6e4, (q31_t)0xb6990cf9,\n    (q31_t)0x68d92c5d, (q31_t)0xb693e752, (q31_t)0x68d59196, (q31_t)0xb68ec1d9,\n    (q31_t)0x68d1f68f, (q31_t)0xb6899c8d, (q31_t)0x68ce5b46, (q31_t)0xb684776e,\n    (q31_t)0x68cabfbd, (q31_t)0xb67f527c, (q31_t)0x68c723f3, (q31_t)0xb67a2db8,\n    (q31_t)0x68c387e9, (q31_t)0xb6750921, (q31_t)0x68bfeb9e, (q31_t)0xb66fe4b8,\n    (q31_t)0x68bc4f13, (q31_t)0xb66ac07c, (q31_t)0x68b8b247, (q31_t)0xb6659c6d,\n    (q31_t)0x68b5153a, (q31_t)0xb660788c, (q31_t)0x68b177ed, (q31_t)0xb65b54d8,\n    (q31_t)0x68adda5f, (q31_t)0xb6563151, (q31_t)0x68aa3c90, (q31_t)0xb6510df8,\n    (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x68a30031, (q31_t)0xb646c7ce,\n    (q31_t)0x689f61a1, (q31_t)0xb641a4fe, (q31_t)0x689bc2d1, (q31_t)0xb63c825b,\n    (q31_t)0x689823bf, (q31_t)0xb6375fe5, (q31_t)0x6894846e, (q31_t)0xb6323d9d,\n    (q31_t)0x6890e4dc, (q31_t)0xb62d1b82, (q31_t)0x688d4509, (q31_t)0xb627f995,\n    (q31_t)0x6889a4f6, (q31_t)0xb622d7d6, (q31_t)0x688604a2, (q31_t)0xb61db644,\n    (q31_t)0x6882640e, (q31_t)0xb61894df, (q31_t)0x687ec339, (q31_t)0xb61373a9,\n    (q31_t)0x687b2224, (q31_t)0xb60e529f, (q31_t)0x687780ce, (q31_t)0xb60931c4,\n    (q31_t)0x6873df38, (q31_t)0xb6041116, (q31_t)0x68703d62, (q31_t)0xb5fef095,\n    (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x6868f8f4, (q31_t)0xb5f4b01e,\n    (q31_t)0x6865565c, (q31_t)0xb5ef9026, (q31_t)0x6861b384, (q31_t)0xb5ea705d,\n    (q31_t)0x685e106c, (q31_t)0xb5e550c1, (q31_t)0x685a6d13, (q31_t)0xb5e03153,\n    (q31_t)0x6856c979, (q31_t)0xb5db1212, (q31_t)0x685325a0, (q31_t)0xb5d5f2ff,\n    (q31_t)0x684f8186, (q31_t)0xb5d0d41a, (q31_t)0x684bdd2c, (q31_t)0xb5cbb563,\n    (q31_t)0x68483891, (q31_t)0xb5c696da, (q31_t)0x684493b6, (q31_t)0xb5c1787e,\n    (q31_t)0x6840ee9b, (q31_t)0xb5bc5a50, (q31_t)0x683d493f, (q31_t)0xb5b73c50,\n    (q31_t)0x6839a3a4, (q31_t)0xb5b21e7e, (q31_t)0x6835fdc7, (q31_t)0xb5ad00d9,\n    (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x682eb14e, (q31_t)0xb5a2c61a,\n    (q31_t)0x682b0ab1, (q31_t)0xb59da8ff, (q31_t)0x682763d4, (q31_t)0xb5988c12,\n    (q31_t)0x6823bcb7, (q31_t)0xb5936f53, (q31_t)0x68201559, (q31_t)0xb58e52c2,\n    (q31_t)0x681c6dbb, (q31_t)0xb589365e, (q31_t)0x6818c5dd, (q31_t)0xb5841a29,\n    (q31_t)0x68151dbe, (q31_t)0xb57efe22, (q31_t)0x68117560, (q31_t)0xb579e248,\n    (q31_t)0x680dccc1, (q31_t)0xb574c69d, (q31_t)0x680a23e2, (q31_t)0xb56fab1f,\n    (q31_t)0x68067ac3, (q31_t)0xb56a8fd0, (q31_t)0x6802d164, (q31_t)0xb56574ae,\n    (q31_t)0x67ff27c4, (q31_t)0xb56059bb, (q31_t)0x67fb7de5, (q31_t)0xb55b3ef5,\n    (q31_t)0x67f7d3c5, (q31_t)0xb556245e, (q31_t)0x67f42965, (q31_t)0xb55109f5,\n    (q31_t)0x67f07ec5, (q31_t)0xb54befba, (q31_t)0x67ecd3e5, (q31_t)0xb546d5ac,\n    (q31_t)0x67e928c5, (q31_t)0xb541bbcd, (q31_t)0x67e57d64, (q31_t)0xb53ca21c,\n    (q31_t)0x67e1d1c4, (q31_t)0xb5378899, (q31_t)0x67de25e3, (q31_t)0xb5326f45,\n    (q31_t)0x67da79c3, (q31_t)0xb52d561e, (q31_t)0x67d6cd62, (q31_t)0xb5283d26,\n    (q31_t)0x67d320c1, (q31_t)0xb523245b, (q31_t)0x67cf73e1, (q31_t)0xb51e0bbf,\n    (q31_t)0x67cbc6c0, (q31_t)0xb518f351, (q31_t)0x67c8195f, (q31_t)0xb513db12,\n    (q31_t)0x67c46bbe, (q31_t)0xb50ec300, (q31_t)0x67c0bddd, (q31_t)0xb509ab1d,\n    (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67b9615c, (q31_t)0xb4ff7be1,\n    (q31_t)0x67b5b2bb, (q31_t)0xb4fa6489, (q31_t)0x67b203da, (q31_t)0xb4f54d5f,\n    (q31_t)0x67ae54ba, (q31_t)0xb4f03663, (q31_t)0x67aaa559, (q31_t)0xb4eb1f95,\n    (q31_t)0x67a6f5b8, (q31_t)0xb4e608f6, (q31_t)0x67a345d8, (q31_t)0xb4e0f285,\n    (q31_t)0x679f95b7, (q31_t)0xb4dbdc42, (q31_t)0x679be557, (q31_t)0xb4d6c62e,\n    (q31_t)0x679834b6, (q31_t)0xb4d1b048, (q31_t)0x679483d6, (q31_t)0xb4cc9a90,\n    (q31_t)0x6790d2b6, (q31_t)0xb4c78507, (q31_t)0x678d2156, (q31_t)0xb4c26fad,\n    (q31_t)0x67896fb6, (q31_t)0xb4bd5a80, (q31_t)0x6785bdd6, (q31_t)0xb4b84582,\n    (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x677e5957, (q31_t)0xb4ae1c12,\n    (q31_t)0x677aa6b8, (q31_t)0xb4a9079f, (q31_t)0x6776f3d9, (q31_t)0xb4a3f35b,\n    (q31_t)0x677340ba, (q31_t)0xb49edf45, (q31_t)0x676f8d5b, (q31_t)0xb499cb5e,\n    (q31_t)0x676bd9bd, (q31_t)0xb494b7a6, (q31_t)0x676825de, (q31_t)0xb48fa41c,\n    (q31_t)0x676471c0, (q31_t)0xb48a90c0, (q31_t)0x6760bd62, (q31_t)0xb4857d93,\n    (q31_t)0x675d08c4, (q31_t)0xb4806a95, (q31_t)0x675953e7, (q31_t)0xb47b57c5,\n    (q31_t)0x67559eca, (q31_t)0xb4764523, (q31_t)0x6751e96d, (q31_t)0xb47132b1,\n    (q31_t)0x674e33d0, (q31_t)0xb46c206d, (q31_t)0x674a7df4, (q31_t)0xb4670e57,\n    (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x6743117c, (q31_t)0xb45ceab8,\n    (q31_t)0x673f5ae0, (q31_t)0xb457d92f, (q31_t)0x673ba405, (q31_t)0xb452c7d4,\n    (q31_t)0x6737ecea, (q31_t)0xb44db6a8, (q31_t)0x67343590, (q31_t)0xb448a5aa,\n    (q31_t)0x67307df5, (q31_t)0xb44394db, (q31_t)0x672cc61c, (q31_t)0xb43e843b,\n    (q31_t)0x67290e02, (q31_t)0xb43973ca, (q31_t)0x672555a9, (q31_t)0xb4346387,\n    (q31_t)0x67219d10, (q31_t)0xb42f5373, (q31_t)0x671de438, (q31_t)0xb42a438e,\n    (q31_t)0x671a2b20, (q31_t)0xb42533d8, (q31_t)0x671671c8, (q31_t)0xb4202451,\n    (q31_t)0x6712b831, (q31_t)0xb41b14f8, (q31_t)0x670efe5a, (q31_t)0xb41605ce,\n    (q31_t)0x670b4444, (q31_t)0xb410f6d3, (q31_t)0x670789ee, (q31_t)0xb40be807,\n    (q31_t)0x6703cf58, (q31_t)0xb406d969, (q31_t)0x67001483, (q31_t)0xb401cafb,\n    (q31_t)0x66fc596f, (q31_t)0xb3fcbcbb, (q31_t)0x66f89e1b, (q31_t)0xb3f7aeaa,\n    (q31_t)0x66f4e287, (q31_t)0xb3f2a0c9, (q31_t)0x66f126b4, (q31_t)0xb3ed9316,\n    (q31_t)0x66ed6aa1, (q31_t)0xb3e88592, (q31_t)0x66e9ae4f, (q31_t)0xb3e3783d,\n    (q31_t)0x66e5f1be, (q31_t)0xb3de6b17, (q31_t)0x66e234ed, (q31_t)0xb3d95e1f,\n    (q31_t)0x66de77dc, (q31_t)0xb3d45157, (q31_t)0x66daba8c, (q31_t)0xb3cf44be,\n    (q31_t)0x66d6fcfd, (q31_t)0xb3ca3854, (q31_t)0x66d33f2e, (q31_t)0xb3c52c19,\n    (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66cbc2d2, (q31_t)0xb3bb142f,\n    (q31_t)0x66c80445, (q31_t)0xb3b60881, (q31_t)0x66c44579, (q31_t)0xb3b0fd02,\n    (q31_t)0x66c0866d, (q31_t)0xb3abf1b2, (q31_t)0x66bcc721, (q31_t)0xb3a6e691,\n    (q31_t)0x66b90797, (q31_t)0xb3a1dba0, (q31_t)0x66b547cd, (q31_t)0xb39cd0dd,\n    (q31_t)0x66b187c3, (q31_t)0xb397c649, (q31_t)0x66adc77b, (q31_t)0xb392bbe5,\n    (q31_t)0x66aa06f3, (q31_t)0xb38db1b0, (q31_t)0x66a6462b, (q31_t)0xb388a7aa,\n    (q31_t)0x66a28524, (q31_t)0xb3839dd3, (q31_t)0x669ec3de, (q31_t)0xb37e942b,\n    (q31_t)0x669b0259, (q31_t)0xb3798ab2, (q31_t)0x66974095, (q31_t)0xb3748169,\n    (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x668fbc4e, (q31_t)0xb36a6f64,\n    (q31_t)0x668bf9cb, (q31_t)0xb36566a8, (q31_t)0x66883709, (q31_t)0xb3605e1c,\n    (q31_t)0x66847408, (q31_t)0xb35b55bf, (q31_t)0x6680b0c8, (q31_t)0xb3564d91,\n    (q31_t)0x667ced49, (q31_t)0xb3514592, (q31_t)0x6679298a, (q31_t)0xb34c3dc3,\n    (q31_t)0x6675658c, (q31_t)0xb3473623, (q31_t)0x6671a14f, (q31_t)0xb3422eb2,\n    (q31_t)0x666ddcd3, (q31_t)0xb33d2771, (q31_t)0x666a1818, (q31_t)0xb338205f,\n    (q31_t)0x6666531d, (q31_t)0xb333197c, (q31_t)0x66628de4, (q31_t)0xb32e12c9,\n    (q31_t)0x665ec86b, (q31_t)0xb3290c45, (q31_t)0x665b02b3, (q31_t)0xb32405f1,\n    (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x66537685, (q31_t)0xb319f9d6,\n    (q31_t)0x664fb010, (q31_t)0xb314f410, (q31_t)0x664be95b, (q31_t)0xb30fee79,\n    (q31_t)0x66482267, (q31_t)0xb30ae912, (q31_t)0x66445b35, (q31_t)0xb305e3da,\n    (q31_t)0x664093c3, (q31_t)0xb300ded2, (q31_t)0x663ccc12, (q31_t)0xb2fbd9f9,\n    (q31_t)0x66390422, (q31_t)0xb2f6d550, (q31_t)0x66353bf3, (q31_t)0xb2f1d0d6,\n    (q31_t)0x66317385, (q31_t)0xb2eccc8c, (q31_t)0x662daad8, (q31_t)0xb2e7c871,\n    (q31_t)0x6629e1ec, (q31_t)0xb2e2c486, (q31_t)0x662618c1, (q31_t)0xb2ddc0ca,\n    (q31_t)0x66224f56, (q31_t)0xb2d8bd3e, (q31_t)0x661e85ad, (q31_t)0xb2d3b9e2,\n    (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5, (q31_t)0x6616f19e, (q31_t)0xb2c9b3b8,\n    (q31_t)0x66132738, (q31_t)0xb2c4b0ea, (q31_t)0x660f5c93, (q31_t)0xb2bfae4c,\n    (q31_t)0x660b91af, (q31_t)0xb2baabde, (q31_t)0x6607c68c, (q31_t)0xb2b5a99f,\n    (q31_t)0x6603fb2a, (q31_t)0xb2b0a790, (q31_t)0x66002f89, (q31_t)0xb2aba5b1,\n    (q31_t)0x65fc63a9, (q31_t)0xb2a6a402, (q31_t)0x65f8978b, (q31_t)0xb2a1a282,\n    (q31_t)0x65f4cb2d, (q31_t)0xb29ca132, (q31_t)0x65f0fe91, (q31_t)0xb297a011,\n    (q31_t)0x65ed31b5, (q31_t)0xb2929f21, (q31_t)0x65e9649b, (q31_t)0xb28d9e60,\n    (q31_t)0x65e59742, (q31_t)0xb2889dcf, (q31_t)0x65e1c9aa, (q31_t)0xb2839d6d,\n    (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65da2dbd, (q31_t)0xb2799d3a,\n    (q31_t)0x65d65f69, (q31_t)0xb2749d68, (q31_t)0x65d290d6, (q31_t)0xb26f9dc6,\n    (q31_t)0x65cec204, (q31_t)0xb26a9e54, (q31_t)0x65caf2f3, (q31_t)0xb2659f12,\n    (q31_t)0x65c723a3, (q31_t)0xb2609fff, (q31_t)0x65c35415, (q31_t)0xb25ba11d,\n    (q31_t)0x65bf8447, (q31_t)0xb256a26a, (q31_t)0x65bbb43b, (q31_t)0xb251a3e7,\n    (q31_t)0x65b7e3f1, (q31_t)0xb24ca594, (q31_t)0x65b41367, (q31_t)0xb247a771,\n    (q31_t)0x65b0429f, (q31_t)0xb242a97e, (q31_t)0x65ac7198, (q31_t)0xb23dabbb,\n    (q31_t)0x65a8a052, (q31_t)0xb238ae28, (q31_t)0x65a4cece, (q31_t)0xb233b0c5,\n    (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x659d2b09, (q31_t)0xb229b68f,\n    (q31_t)0x659958c9, (q31_t)0xb224b9bc, (q31_t)0x6595864a, (q31_t)0xb21fbd19,\n    (q31_t)0x6591b38c, (q31_t)0xb21ac0a6, (q31_t)0x658de08f, (q31_t)0xb215c463,\n    (q31_t)0x658a0d54, (q31_t)0xb210c850, (q31_t)0x658639db, (q31_t)0xb20bcc6d,\n    (q31_t)0x65826622, (q31_t)0xb206d0ba, (q31_t)0x657e922b, (q31_t)0xb201d537,\n    (q31_t)0x657abdf6, (q31_t)0xb1fcd9e5, (q31_t)0x6576e982, (q31_t)0xb1f7dec2,\n    (q31_t)0x657314cf, (q31_t)0xb1f2e3d0, (q31_t)0x656f3fde, (q31_t)0xb1ede90e,\n    (q31_t)0x656b6aae, (q31_t)0xb1e8ee7c, (q31_t)0x6567953f, (q31_t)0xb1e3f41a,\n    (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x655fe9a7, (q31_t)0xb1d9ffe7,\n    (q31_t)0x655c137d, (q31_t)0xb1d50616, (q31_t)0x65583d14, (q31_t)0xb1d00c75,\n    (q31_t)0x6554666d, (q31_t)0xb1cb1304, (q31_t)0x65508f87, (q31_t)0xb1c619c3,\n    (q31_t)0x654cb863, (q31_t)0xb1c120b3, (q31_t)0x6548e101, (q31_t)0xb1bc27d3,\n    (q31_t)0x6545095f, (q31_t)0xb1b72f23, (q31_t)0x65413180, (q31_t)0xb1b236a4,\n    (q31_t)0x653d5962, (q31_t)0xb1ad3e55, (q31_t)0x65398105, (q31_t)0xb1a84636,\n    (q31_t)0x6535a86b, (q31_t)0xb1a34e47, (q31_t)0x6531cf91, (q31_t)0xb19e5689,\n    (q31_t)0x652df679, (q31_t)0xb1995efb, (q31_t)0x652a1d23, (q31_t)0xb194679e,\n    (q31_t)0x6526438f, (q31_t)0xb18f7071, (q31_t)0x652269bc, (q31_t)0xb18a7974,\n    (q31_t)0x651e8faa, (q31_t)0xb18582a8, (q31_t)0x651ab55b, (q31_t)0xb1808c0c,\n    (q31_t)0x6516dacd, (q31_t)0xb17b95a0, (q31_t)0x65130000, (q31_t)0xb1769f65,\n    (q31_t)0x650f24f5, (q31_t)0xb171a95b, (q31_t)0x650b49ac, (q31_t)0xb16cb380,\n    (q31_t)0x65076e25, (q31_t)0xb167bdd7, (q31_t)0x6503925f, (q31_t)0xb162c85d,\n    (q31_t)0x64ffb65b, (q31_t)0xb15dd315, (q31_t)0x64fbda18, (q31_t)0xb158ddfd,\n    (q31_t)0x64f7fd98, (q31_t)0xb153e915, (q31_t)0x64f420d9, (q31_t)0xb14ef45e,\n    (q31_t)0x64f043dc, (q31_t)0xb149ffd7, (q31_t)0x64ec66a0, (q31_t)0xb1450b81,\n    (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64e4ab6e, (q31_t)0xb13b2367,\n    (q31_t)0x64e0cd78, (q31_t)0xb1362fa2, (q31_t)0x64dcef44, (q31_t)0xb1313c0e,\n    (q31_t)0x64d910d1, (q31_t)0xb12c48ab, (q31_t)0x64d53220, (q31_t)0xb1275579,\n    (q31_t)0x64d15331, (q31_t)0xb1226277, (q31_t)0x64cd7404, (q31_t)0xb11d6fa6,\n    (q31_t)0x64c99498, (q31_t)0xb1187d05, (q31_t)0x64c5b4ef, (q31_t)0xb1138a95,\n    (q31_t)0x64c1d507, (q31_t)0xb10e9856, (q31_t)0x64bdf4e1, (q31_t)0xb109a648,\n    (q31_t)0x64ba147d, (q31_t)0xb104b46a, (q31_t)0x64b633da, (q31_t)0xb0ffc2bd,\n    (q31_t)0x64b252fa, (q31_t)0xb0fad140, (q31_t)0x64ae71dc, (q31_t)0xb0f5dff5,\n    (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x64a6aee4, (q31_t)0xb0ebfdf0,\n    (q31_t)0x64a2cd0c, (q31_t)0xb0e70d37, (q31_t)0x649eeaf5, (q31_t)0xb0e21cae,\n    (q31_t)0x649b08a0, (q31_t)0xb0dd2c56, (q31_t)0x6497260d, (q31_t)0xb0d83c2f,\n    (q31_t)0x6493433c, (q31_t)0xb0d34c39, (q31_t)0x648f602d, (q31_t)0xb0ce5c74,\n    (q31_t)0x648b7ce0, (q31_t)0xb0c96ce0, (q31_t)0x64879955, (q31_t)0xb0c47d7c,\n    (q31_t)0x6483b58c, (q31_t)0xb0bf8e4a, (q31_t)0x647fd185, (q31_t)0xb0ba9f48,\n    (q31_t)0x647bed3f, (q31_t)0xb0b5b077, (q31_t)0x647808bc, (q31_t)0xb0b0c1d7,\n    (q31_t)0x647423fb, (q31_t)0xb0abd368, (q31_t)0x64703efc, (q31_t)0xb0a6e52a,\n    (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x64687444, (q31_t)0xb09d0941,\n    (q31_t)0x64648e8c, (q31_t)0xb0981b96, (q31_t)0x6460a895, (q31_t)0xb0932e1b,\n    (q31_t)0x645cc260, (q31_t)0xb08e40d2, (q31_t)0x6458dbed, (q31_t)0xb08953ba,\n    (q31_t)0x6454f53d, (q31_t)0xb08466d3, (q31_t)0x64510e4e, (q31_t)0xb07f7a1c,\n    (q31_t)0x644d2722, (q31_t)0xb07a8d97, (q31_t)0x64493fb8, (q31_t)0xb075a143,\n    (q31_t)0x64455810, (q31_t)0xb070b520, (q31_t)0x6441702a, (q31_t)0xb06bc92e,\n    (q31_t)0x643d8806, (q31_t)0xb066dd6d, (q31_t)0x64399fa5, (q31_t)0xb061f1de,\n    (q31_t)0x6435b706, (q31_t)0xb05d067f, (q31_t)0x6431ce28, (q31_t)0xb0581b51,\n    (q31_t)0x642de50d, (q31_t)0xb0533055, (q31_t)0x6429fbb5, (q31_t)0xb04e458a,\n    (q31_t)0x6426121e, (q31_t)0xb0495af0, (q31_t)0x6422284a, (q31_t)0xb0447087,\n    (q31_t)0x641e3e38, (q31_t)0xb03f864f, (q31_t)0x641a53e8, (q31_t)0xb03a9c49,\n    (q31_t)0x6416695a, (q31_t)0xb035b273, (q31_t)0x64127e8f, (q31_t)0xb030c8cf,\n    (q31_t)0x640e9386, (q31_t)0xb02bdf5c, (q31_t)0x640aa83f, (q31_t)0xb026f61b,\n    (q31_t)0x6406bcba, (q31_t)0xb0220d0a, (q31_t)0x6402d0f8, (q31_t)0xb01d242b,\n    (q31_t)0x63fee4f8, (q31_t)0xb0183b7d, (q31_t)0x63faf8bb, (q31_t)0xb0135301,\n    (q31_t)0x63f70c3f, (q31_t)0xb00e6ab5, (q31_t)0x63f31f86, (q31_t)0xb009829c,\n    (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63eb455c, (q31_t)0xafffb2fc,\n    (q31_t)0x63e757ea, (q31_t)0xaffacb76, (q31_t)0x63e36a3a, (q31_t)0xaff5e421,\n    (q31_t)0x63df7c4d, (q31_t)0xaff0fcfe, (q31_t)0x63db8e22, (q31_t)0xafec160c,\n    (q31_t)0x63d79fba, (q31_t)0xafe72f4c, (q31_t)0x63d3b114, (q31_t)0xafe248bd,\n    (q31_t)0x63cfc231, (q31_t)0xafdd625f, (q31_t)0x63cbd310, (q31_t)0xafd87c33,\n    (q31_t)0x63c7e3b1, (q31_t)0xafd39638, (q31_t)0x63c3f415, (q31_t)0xafceb06f,\n    (q31_t)0x63c0043b, (q31_t)0xafc9cad7, (q31_t)0x63bc1424, (q31_t)0xafc4e571,\n    (q31_t)0x63b823cf, (q31_t)0xafc0003c, (q31_t)0x63b4333d, (q31_t)0xafbb1b39,\n    (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x63ac5160, (q31_t)0xafb151c7,\n    (q31_t)0x63a86015, (q31_t)0xafac6d58, (q31_t)0x63a46e8d, (q31_t)0xafa7891b,\n    (q31_t)0x63a07cc7, (q31_t)0xafa2a50f, (q31_t)0x639c8ac4, (q31_t)0xaf9dc135,\n    (q31_t)0x63989884, (q31_t)0xaf98dd8d, (q31_t)0x6394a606, (q31_t)0xaf93fa16,\n    (q31_t)0x6390b34a, (q31_t)0xaf8f16d1, (q31_t)0x638cc051, (q31_t)0xaf8a33bd,\n    (q31_t)0x6388cd1b, (q31_t)0xaf8550db, (q31_t)0x6384d9a7, (q31_t)0xaf806e2b,\n    (q31_t)0x6380e5f6, (q31_t)0xaf7b8bac, (q31_t)0x637cf208, (q31_t)0xaf76a95f,\n    (q31_t)0x6378fddc, (q31_t)0xaf71c743, (q31_t)0x63750973, (q31_t)0xaf6ce55a,\n    (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x636d1fe9, (q31_t)0xaf63221c,\n    (q31_t)0x63692ac7, (q31_t)0xaf5e40c7, (q31_t)0x63653569, (q31_t)0xaf595fa4,\n    (q31_t)0x63613fcd, (q31_t)0xaf547eb3, (q31_t)0x635d49f4, (q31_t)0xaf4f9df4,\n    (q31_t)0x635953dd, (q31_t)0xaf4abd66, (q31_t)0x63555d8a, (q31_t)0xaf45dd0b,\n    (q31_t)0x635166f9, (q31_t)0xaf40fce1, (q31_t)0x634d702b, (q31_t)0xaf3c1ce9,\n    (q31_t)0x6349791f, (q31_t)0xaf373d22, (q31_t)0x634581d6, (q31_t)0xaf325d8e,\n    (q31_t)0x63418a50, (q31_t)0xaf2d7e2b, (q31_t)0x633d928d, (q31_t)0xaf289efa,\n    (q31_t)0x63399a8d, (q31_t)0xaf23bffb, (q31_t)0x6335a24f, (q31_t)0xaf1ee12e,\n    (q31_t)0x6331a9d4, (q31_t)0xaf1a0293, (q31_t)0x632db11c, (q31_t)0xaf15242a,\n    (q31_t)0x6329b827, (q31_t)0xaf1045f3, (q31_t)0x6325bef5, (q31_t)0xaf0b67ed,\n    (q31_t)0x6321c585, (q31_t)0xaf068a1a, (q31_t)0x631dcbd9, (q31_t)0xaf01ac78,\n    (q31_t)0x6319d1ef, (q31_t)0xaefccf09, (q31_t)0x6315d7c8, (q31_t)0xaef7f1cb,\n    (q31_t)0x6311dd64, (q31_t)0xaef314c0, (q31_t)0x630de2c3, (q31_t)0xaeee37e6,\n    (q31_t)0x6309e7e4, (q31_t)0xaee95b3f, (q31_t)0x6305ecc9, (q31_t)0xaee47ec9,\n    (q31_t)0x6301f171, (q31_t)0xaedfa285, (q31_t)0x62fdf5db, (q31_t)0xaedac674,\n    (q31_t)0x62f9fa09, (q31_t)0xaed5ea95, (q31_t)0x62f5fdf9, (q31_t)0xaed10ee7,\n    (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62ee0523, (q31_t)0xaec75823,\n    (q31_t)0x62ea085c, (q31_t)0xaec27d0c, (q31_t)0x62e60b58, (q31_t)0xaebda227,\n    (q31_t)0x62e20e17, (q31_t)0xaeb8c774, (q31_t)0x62de109a, (q31_t)0xaeb3ecf3,\n    (q31_t)0x62da12df, (q31_t)0xaeaf12a4, (q31_t)0x62d614e7, (q31_t)0xaeaa3888,\n    (q31_t)0x62d216b3, (q31_t)0xaea55e9e, (q31_t)0x62ce1841, (q31_t)0xaea084e6,\n    (q31_t)0x62ca1992, (q31_t)0xae9bab60, (q31_t)0x62c61aa7, (q31_t)0xae96d20c,\n    (q31_t)0x62c21b7e, (q31_t)0xae91f8eb, (q31_t)0x62be1c19, (q31_t)0xae8d1ffb,\n    (q31_t)0x62ba1c77, (q31_t)0xae88473e, (q31_t)0x62b61c98, (q31_t)0xae836eb4,\n    (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x62ae1c23, (q31_t)0xae79be35,\n    (q31_t)0x62aa1b8d, (q31_t)0xae74e641, (q31_t)0x62a61aba, (q31_t)0xae700e80,\n    (q31_t)0x62a219aa, (q31_t)0xae6b36f0, (q31_t)0x629e185e, (q31_t)0xae665f93,\n    (q31_t)0x629a16d5, (q31_t)0xae618869, (q31_t)0x6296150f, (q31_t)0xae5cb171,\n    (q31_t)0x6292130c, (q31_t)0xae57daab, (q31_t)0x628e10cc, (q31_t)0xae530417,\n    (q31_t)0x628a0e50, (q31_t)0xae4e2db6, (q31_t)0x62860b97, (q31_t)0xae495787,\n    (q31_t)0x628208a1, (q31_t)0xae44818b, (q31_t)0x627e056e, (q31_t)0xae3fabc1,\n    (q31_t)0x627a01fe, (q31_t)0xae3ad629, (q31_t)0x6275fe52, (q31_t)0xae3600c4,\n    (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x626df643, (q31_t)0xae2c5691,\n    (q31_t)0x6269f1e1, (q31_t)0xae2781c4, (q31_t)0x6265ed42, (q31_t)0xae22ad29,\n    (q31_t)0x6261e866, (q31_t)0xae1dd8c0, (q31_t)0x625de34e, (q31_t)0xae19048a,\n    (q31_t)0x6259ddf8, (q31_t)0xae143086, (q31_t)0x6255d866, (q31_t)0xae0f5cb5,\n    (q31_t)0x6251d298, (q31_t)0xae0a8916, (q31_t)0x624dcc8d, (q31_t)0xae05b5aa,\n    (q31_t)0x6249c645, (q31_t)0xae00e271, (q31_t)0x6245bfc0, (q31_t)0xadfc0f6a,\n    (q31_t)0x6241b8ff, (q31_t)0xadf73c96, (q31_t)0x623db202, (q31_t)0xadf269f4,\n    (q31_t)0x6239aac7, (q31_t)0xaded9785, (q31_t)0x6235a351, (q31_t)0xade8c548,\n    (q31_t)0x62319b9d, (q31_t)0xade3f33e, (q31_t)0x622d93ad, (q31_t)0xaddf2167,\n    (q31_t)0x62298b81, (q31_t)0xadda4fc3, (q31_t)0x62258317, (q31_t)0xadd57e51,\n    (q31_t)0x62217a72, (q31_t)0xadd0ad12, (q31_t)0x621d7190, (q31_t)0xadcbdc05,\n    (q31_t)0x62196871, (q31_t)0xadc70b2c, (q31_t)0x62155f16, (q31_t)0xadc23a85,\n    (q31_t)0x6211557e, (q31_t)0xadbd6a10, (q31_t)0x620d4baa, (q31_t)0xadb899cf,\n    (q31_t)0x62094199, (q31_t)0xadb3c9c0, (q31_t)0x6205374c, (q31_t)0xadaef9e4,\n    (q31_t)0x62012cc2, (q31_t)0xadaa2a3b, (q31_t)0x61fd21fc, (q31_t)0xada55ac4,\n    (q31_t)0x61f916f9, (q31_t)0xada08b80, (q31_t)0x61f50bba, (q31_t)0xad9bbc70,\n    (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61ecf487, (q31_t)0xad921ee6,\n    (q31_t)0x61e8e893, (q31_t)0xad8d506e, (q31_t)0x61e4dc62, (q31_t)0xad888229,\n    (q31_t)0x61e0cff5, (q31_t)0xad83b416, (q31_t)0x61dcc34c, (q31_t)0xad7ee636,\n    (q31_t)0x61d8b666, (q31_t)0xad7a1889, (q31_t)0x61d4a944, (q31_t)0xad754b0f,\n    (q31_t)0x61d09be5, (q31_t)0xad707dc8, (q31_t)0x61cc8e4b, (q31_t)0xad6bb0b4,\n    (q31_t)0x61c88074, (q31_t)0xad66e3d3, (q31_t)0x61c47260, (q31_t)0xad621725,\n    (q31_t)0x61c06410, (q31_t)0xad5d4aaa, (q31_t)0x61bc5584, (q31_t)0xad587e61,\n    (q31_t)0x61b846bc, (q31_t)0xad53b24c, (q31_t)0x61b437b7, (q31_t)0xad4ee66a,\n    (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x61ac18f9, (q31_t)0xad454f3e,\n    (q31_t)0x61a80940, (q31_t)0xad4083f5, (q31_t)0x61a3f94a, (q31_t)0xad3bb8df,\n    (q31_t)0x619fe918, (q31_t)0xad36edfc, (q31_t)0x619bd8aa, (q31_t)0xad32234b,\n    (q31_t)0x6197c800, (q31_t)0xad2d58ce, (q31_t)0x6193b719, (q31_t)0xad288e85,\n    (q31_t)0x618fa5f7, (q31_t)0xad23c46e, (q31_t)0x618b9498, (q31_t)0xad1efa8a,\n    (q31_t)0x618782fd, (q31_t)0xad1a30d9, (q31_t)0x61837126, (q31_t)0xad15675c,\n    (q31_t)0x617f5f12, (q31_t)0xad109e12, (q31_t)0x617b4cc3, (q31_t)0xad0bd4fb,\n    (q31_t)0x61773a37, (q31_t)0xad070c17, (q31_t)0x61732770, (q31_t)0xad024366,\n    (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x616b012c, (q31_t)0xacf8b29e,\n    (q31_t)0x6166edb0, (q31_t)0xacf3ea87, (q31_t)0x6162d9f8, (q31_t)0xacef22a3,\n    (q31_t)0x615ec603, (q31_t)0xacea5af2, (q31_t)0x615ab1d3, (q31_t)0xace59375,\n    (q31_t)0x61569d67, (q31_t)0xace0cc2b, (q31_t)0x615288be, (q31_t)0xacdc0514,\n    (q31_t)0x614e73da, (q31_t)0xacd73e30, (q31_t)0x614a5eba, (q31_t)0xacd27780,\n    (q31_t)0x6146495d, (q31_t)0xaccdb103, (q31_t)0x614233c5, (q31_t)0xacc8eab9,\n    (q31_t)0x613e1df0, (q31_t)0xacc424a3, (q31_t)0x613a07e0, (q31_t)0xacbf5ec0,\n    (q31_t)0x6135f193, (q31_t)0xacba9910, (q31_t)0x6131db0b, (q31_t)0xacb5d394,\n    (q31_t)0x612dc447, (q31_t)0xacb10e4b, (q31_t)0x6129ad46, (q31_t)0xacac4935,\n    (q31_t)0x6125960a, (q31_t)0xaca78453, (q31_t)0x61217e92, (q31_t)0xaca2bfa4,\n    (q31_t)0x611d66de, (q31_t)0xac9dfb29, (q31_t)0x61194eee, (q31_t)0xac9936e1,\n    (q31_t)0x611536c2, (q31_t)0xac9472cd, (q31_t)0x61111e5b, (q31_t)0xac8faeec,\n    (q31_t)0x610d05b7, (q31_t)0xac8aeb3e, (q31_t)0x6108ecd8, (q31_t)0xac8627c4,\n    (q31_t)0x6104d3bc, (q31_t)0xac81647e, (q31_t)0x6100ba65, (q31_t)0xac7ca16b,\n    (q31_t)0x60fca0d2, (q31_t)0xac77de8b, (q31_t)0x60f88703, (q31_t)0xac731bdf,\n    (q31_t)0x60f46cf9, (q31_t)0xac6e5967, (q31_t)0x60f052b2, (q31_t)0xac699722,\n    (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60e81d72, (q31_t)0xac601333,\n    (q31_t)0x60e40278, (q31_t)0xac5b5189, (q31_t)0x60dfe743, (q31_t)0xac569012,\n    (q31_t)0x60dbcbd1, (q31_t)0xac51cecf, (q31_t)0x60d7b024, (q31_t)0xac4d0dc0,\n    (q31_t)0x60d3943b, (q31_t)0xac484ce4, (q31_t)0x60cf7817, (q31_t)0xac438c3c,\n    (q31_t)0x60cb5bb7, (q31_t)0xac3ecbc7, (q31_t)0x60c73f1b, (q31_t)0xac3a0b87,\n    (q31_t)0x60c32243, (q31_t)0xac354b7a, (q31_t)0x60bf0530, (q31_t)0xac308ba0,\n    (q31_t)0x60bae7e1, (q31_t)0xac2bcbfa, (q31_t)0x60b6ca56, (q31_t)0xac270c88,\n    (q31_t)0x60b2ac8f, (q31_t)0xac224d4a, (q31_t)0x60ae8e8d, (q31_t)0xac1d8e40,\n    (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x60a651d7, (q31_t)0xac1410c6,\n    (q31_t)0x60a23322, (q31_t)0xac0f5256, (q31_t)0x609e1431, (q31_t)0xac0a941b,\n    (q31_t)0x6099f505, (q31_t)0xac05d613, (q31_t)0x6095d59d, (q31_t)0xac01183f,\n    (q31_t)0x6091b5fa, (q31_t)0xabfc5a9f, (q31_t)0x608d961b, (q31_t)0xabf79d33,\n    (q31_t)0x60897601, (q31_t)0xabf2dffb, (q31_t)0x608555ab, (q31_t)0xabee22f6,\n    (q31_t)0x60813519, (q31_t)0xabe96625, (q31_t)0x607d144c, (q31_t)0xabe4a988,\n    (q31_t)0x6078f344, (q31_t)0xabdfed1f, (q31_t)0x6074d200, (q31_t)0xabdb30ea,\n    (q31_t)0x6070b080, (q31_t)0xabd674e9, (q31_t)0x606c8ec5, (q31_t)0xabd1b91c,\n    (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x60644a9d, (q31_t)0xabc8421d,\n    (q31_t)0x6060282f, (q31_t)0xabc386ec, (q31_t)0x605c0587, (q31_t)0xabbecbee,\n    (q31_t)0x6057e2a2, (q31_t)0xabba1125, (q31_t)0x6053bf82, (q31_t)0xabb5568f,\n    (q31_t)0x604f9c27, (q31_t)0xabb09c2e, (q31_t)0x604b7891, (q31_t)0xababe200,\n    (q31_t)0x604754bf, (q31_t)0xaba72807, (q31_t)0x604330b1, (q31_t)0xaba26e41,\n    (q31_t)0x603f0c69, (q31_t)0xab9db4b0, (q31_t)0x603ae7e5, (q31_t)0xab98fb52,\n    (q31_t)0x6036c325, (q31_t)0xab944229, (q31_t)0x60329e2a, (q31_t)0xab8f8934,\n    (q31_t)0x602e78f4, (q31_t)0xab8ad073, (q31_t)0x602a5383, (q31_t)0xab8617e6,\n    (q31_t)0x60262dd6, (q31_t)0xab815f8d, (q31_t)0x602207ee, (q31_t)0xab7ca768,\n    (q31_t)0x601de1ca, (q31_t)0xab77ef77, (q31_t)0x6019bb6b, (q31_t)0xab7337bb,\n    (q31_t)0x601594d1, (q31_t)0xab6e8032, (q31_t)0x60116dfc, (q31_t)0xab69c8de,\n    (q31_t)0x600d46ec, (q31_t)0xab6511be, (q31_t)0x60091fa0, (q31_t)0xab605ad2,\n    (q31_t)0x6004f819, (q31_t)0xab5ba41a, (q31_t)0x6000d057, (q31_t)0xab56ed97,\n    (q31_t)0x5ffca859, (q31_t)0xab523748, (q31_t)0x5ff88021, (q31_t)0xab4d812d,\n    (q31_t)0x5ff457ad, (q31_t)0xab48cb46, (q31_t)0x5ff02efe, (q31_t)0xab441593,\n    (q31_t)0x5fec0613, (q31_t)0xab3f6015, (q31_t)0x5fe7dcee, (q31_t)0xab3aaacb,\n    (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fdf89f2, (q31_t)0xab3140d4,\n    (q31_t)0x5fdb601b, (q31_t)0xab2c8c27, (q31_t)0x5fd73609, (q31_t)0xab27d7ae,\n    (q31_t)0x5fd30bbc, (q31_t)0xab23236a, (q31_t)0x5fcee133, (q31_t)0xab1e6f5a,\n    (q31_t)0x5fcab670, (q31_t)0xab19bb7e, (q31_t)0x5fc68b72, (q31_t)0xab1507d7,\n    (q31_t)0x5fc26038, (q31_t)0xab105464, (q31_t)0x5fbe34c4, (q31_t)0xab0ba125,\n    (q31_t)0x5fba0914, (q31_t)0xab06ee1b, (q31_t)0x5fb5dd29, (q31_t)0xab023b46,\n    (q31_t)0x5fb1b104, (q31_t)0xaafd88a4, (q31_t)0x5fad84a3, (q31_t)0xaaf8d637,\n    (q31_t)0x5fa95807, (q31_t)0xaaf423ff, (q31_t)0x5fa52b31, (q31_t)0xaaef71fb,\n    (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f9cd0d2, (q31_t)0xaae60e91,\n    (q31_t)0x5f98a34a, (q31_t)0xaae15d2a, (q31_t)0x5f947588, (q31_t)0xaadcabf8,\n    (q31_t)0x5f90478a, (q31_t)0xaad7fafb, (q31_t)0x5f8c1951, (q31_t)0xaad34a32,\n    (q31_t)0x5f87eade, (q31_t)0xaace999d, (q31_t)0x5f83bc2f, (q31_t)0xaac9e93e,\n    (q31_t)0x5f7f8d46, (q31_t)0xaac53912, (q31_t)0x5f7b5e22, (q31_t)0xaac0891c,\n    (q31_t)0x5f772ec2, (q31_t)0xaabbd959, (q31_t)0x5f72ff28, (q31_t)0xaab729cc,\n    (q31_t)0x5f6ecf53, (q31_t)0xaab27a73, (q31_t)0x5f6a9f44, (q31_t)0xaaadcb4f,\n    (q31_t)0x5f666ef9, (q31_t)0xaaa91c5f, (q31_t)0x5f623e73, (q31_t)0xaaa46da4,\n    (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f59dcb8, (q31_t)0xaa9b10cc,\n    (q31_t)0x5f55ab82, (q31_t)0xaa9662af, (q31_t)0x5f517a11, (q31_t)0xaa91b4c7,\n    (q31_t)0x5f4d4865, (q31_t)0xaa8d0713, (q31_t)0x5f49167f, (q31_t)0xaa885994,\n    (q31_t)0x5f44e45e, (q31_t)0xaa83ac4a, (q31_t)0x5f40b202, (q31_t)0xaa7eff34,\n    (q31_t)0x5f3c7f6b, (q31_t)0xaa7a5253, (q31_t)0x5f384c9a, (q31_t)0xaa75a5a8,\n    (q31_t)0x5f34198e, (q31_t)0xaa70f930, (q31_t)0x5f2fe647, (q31_t)0xaa6c4cee,\n    (q31_t)0x5f2bb2c5, (q31_t)0xaa67a0e0, (q31_t)0x5f277f09, (q31_t)0xaa62f507,\n    (q31_t)0x5f234b12, (q31_t)0xaa5e4963, (q31_t)0x5f1f16e0, (q31_t)0xaa599df4,\n    (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba, (q31_t)0x5f16adcc, (q31_t)0xaa5047b4,\n    (q31_t)0x5f1278eb, (q31_t)0xaa4b9ce3, (q31_t)0x5f0e43ce, (q31_t)0xaa46f248,\n    (q31_t)0x5f0a0e77, (q31_t)0xaa4247e1, (q31_t)0x5f05d8e6, (q31_t)0xaa3d9daf,\n    (q31_t)0x5f01a31a, (q31_t)0xaa38f3b1, (q31_t)0x5efd6d13, (q31_t)0xaa3449e9,\n    (q31_t)0x5ef936d1, (q31_t)0xaa2fa056, (q31_t)0x5ef50055, (q31_t)0xaa2af6f7,\n    (q31_t)0x5ef0c99f, (q31_t)0xaa264dce, (q31_t)0x5eec92ae, (q31_t)0xaa21a4d9,\n    (q31_t)0x5ee85b82, (q31_t)0xaa1cfc1a, (q31_t)0x5ee4241c, (q31_t)0xaa18538f,\n    (q31_t)0x5edfec7b, (q31_t)0xaa13ab3a, (q31_t)0x5edbb49f, (q31_t)0xaa0f0319,\n    (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5ed34439, (q31_t)0xaa05b377,\n    (q31_t)0x5ecf0baf, (q31_t)0xaa010bf6, (q31_t)0x5ecad2e9, (q31_t)0xa9fc64a9,\n    (q31_t)0x5ec699e9, (q31_t)0xa9f7bd92, (q31_t)0x5ec260af, (q31_t)0xa9f316b0,\n    (q31_t)0x5ebe273b, (q31_t)0xa9ee7002, (q31_t)0x5eb9ed8b, (q31_t)0xa9e9c98a,\n    (q31_t)0x5eb5b3a2, (q31_t)0xa9e52347, (q31_t)0x5eb1797e, (q31_t)0xa9e07d39,\n    (q31_t)0x5ead3f1f, (q31_t)0xa9dbd761, (q31_t)0x5ea90487, (q31_t)0xa9d731bd,\n    (q31_t)0x5ea4c9b3, (q31_t)0xa9d28c4e, (q31_t)0x5ea08ea6, (q31_t)0xa9cde715,\n    (q31_t)0x5e9c535e, (q31_t)0xa9c94211, (q31_t)0x5e9817dc, (q31_t)0xa9c49d42,\n    (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e8fa028, (q31_t)0xa9bb5444,\n    (q31_t)0x5e8b63f7, (q31_t)0xa9b6b014, (q31_t)0x5e87278b, (q31_t)0xa9b20c1a,\n    (q31_t)0x5e82eae5, (q31_t)0xa9ad6855, (q31_t)0x5e7eae05, (q31_t)0xa9a8c4c5,\n    (q31_t)0x5e7a70ea, (q31_t)0xa9a4216b, (q31_t)0x5e763395, (q31_t)0xa99f7e46,\n    (q31_t)0x5e71f606, (q31_t)0xa99adb56, (q31_t)0x5e6db83d, (q31_t)0xa996389b,\n    (q31_t)0x5e697a39, (q31_t)0xa9919616, (q31_t)0x5e653bfc, (q31_t)0xa98cf3c6,\n    (q31_t)0x5e60fd84, (q31_t)0xa98851ac, (q31_t)0x5e5cbed1, (q31_t)0xa983afc6,\n    (q31_t)0x5e587fe5, (q31_t)0xa97f0e16, (q31_t)0x5e5440be, (q31_t)0xa97a6c9c,\n    (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e4bc1c2, (q31_t)0xa9712a47,\n    (q31_t)0x5e4781ed, (q31_t)0xa96c896c, (q31_t)0x5e4341de, (q31_t)0xa967e8c7,\n    (q31_t)0x5e3f0194, (q31_t)0xa9634858, (q31_t)0x5e3ac110, (q31_t)0xa95ea81d,\n    (q31_t)0x5e368053, (q31_t)0xa95a0819, (q31_t)0x5e323f5b, (q31_t)0xa9556849,\n    (q31_t)0x5e2dfe29, (q31_t)0xa950c8b0, (q31_t)0x5e29bcbd, (q31_t)0xa94c294b,\n    (q31_t)0x5e257b17, (q31_t)0xa9478a1c, (q31_t)0x5e213936, (q31_t)0xa942eb23,\n    (q31_t)0x5e1cf71c, (q31_t)0xa93e4c5f, (q31_t)0x5e18b4c8, (q31_t)0xa939add1,\n    (q31_t)0x5e147239, (q31_t)0xa9350f78, (q31_t)0x5e102f71, (q31_t)0xa9307155,\n    (q31_t)0x5e0bec6e, (q31_t)0xa92bd367, (q31_t)0x5e07a932, (q31_t)0xa92735af,\n    (q31_t)0x5e0365bb, (q31_t)0xa922982c, (q31_t)0x5dff220b, (q31_t)0xa91dfadf,\n    (q31_t)0x5dfade20, (q31_t)0xa9195dc7, (q31_t)0x5df699fc, (q31_t)0xa914c0e6,\n    (q31_t)0x5df2559e, (q31_t)0xa9102439, (q31_t)0x5dee1105, (q31_t)0xa90b87c3,\n    (q31_t)0x5de9cc33, (q31_t)0xa906eb82, (q31_t)0x5de58727, (q31_t)0xa9024f76,\n    (q31_t)0x5de141e1, (q31_t)0xa8fdb3a1, (q31_t)0x5ddcfc61, (q31_t)0xa8f91801,\n    (q31_t)0x5dd8b6a7, (q31_t)0xa8f47c97, (q31_t)0x5dd470b3, (q31_t)0xa8efe162,\n    (q31_t)0x5dd02a85, (q31_t)0xa8eb4663, (q31_t)0x5dcbe41d, (q31_t)0xa8e6ab9a,\n    (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5dc356a1, (q31_t)0xa8dd76a9,\n    (q31_t)0x5dbf0f8c, (q31_t)0xa8d8dc81, (q31_t)0x5dbac83d, (q31_t)0xa8d4428f,\n    (q31_t)0x5db680b4, (q31_t)0xa8cfa8d2, (q31_t)0x5db238f1, (q31_t)0xa8cb0f4b,\n    (q31_t)0x5dadf0f5, (q31_t)0xa8c675fb, (q31_t)0x5da9a8bf, (q31_t)0xa8c1dce0,\n    (q31_t)0x5da5604f, (q31_t)0xa8bd43fa, (q31_t)0x5da117a5, (q31_t)0xa8b8ab4b,\n    (q31_t)0x5d9ccec2, (q31_t)0xa8b412d1, (q31_t)0x5d9885a5, (q31_t)0xa8af7a8e,\n    (q31_t)0x5d943c4e, (q31_t)0xa8aae280, (q31_t)0x5d8ff2bd, (q31_t)0xa8a64aa8,\n    (q31_t)0x5d8ba8f3, (q31_t)0xa8a1b306, (q31_t)0x5d875eef, (q31_t)0xa89d1b99,\n    (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d7eca39, (q31_t)0xa893ed63,\n    (q31_t)0x5d7a7f88, (q31_t)0xa88f5698, (q31_t)0x5d76349d, (q31_t)0xa88ac004,\n    (q31_t)0x5d71e979, (q31_t)0xa88629a5, (q31_t)0x5d6d9e1b, (q31_t)0xa881937c,\n    (q31_t)0x5d695283, (q31_t)0xa87cfd8a, (q31_t)0x5d6506b2, (q31_t)0xa87867cd,\n    (q31_t)0x5d60baa7, (q31_t)0xa873d246, (q31_t)0x5d5c6e62, (q31_t)0xa86f3cf6,\n    (q31_t)0x5d5821e4, (q31_t)0xa86aa7db, (q31_t)0x5d53d52d, (q31_t)0xa86612f6,\n    (q31_t)0x5d4f883b, (q31_t)0xa8617e48, (q31_t)0x5d4b3b10, (q31_t)0xa85ce9cf,\n    (q31_t)0x5d46edac, (q31_t)0xa858558d, (q31_t)0x5d42a00e, (q31_t)0xa853c180,\n    (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5d3a0426, (q31_t)0xa84a9a0a,\n    (q31_t)0x5d35b5db, (q31_t)0xa84606a0, (q31_t)0x5d316757, (q31_t)0xa841736c,\n    (q31_t)0x5d2d189a, (q31_t)0xa83ce06e, (q31_t)0x5d28c9a3, (q31_t)0xa8384da6,\n    (q31_t)0x5d247a72, (q31_t)0xa833bb14, (q31_t)0x5d202b09, (q31_t)0xa82f28b9,\n    (q31_t)0x5d1bdb65, (q31_t)0xa82a9693, (q31_t)0x5d178b89, (q31_t)0xa82604a4,\n    (q31_t)0x5d133b72, (q31_t)0xa82172eb, (q31_t)0x5d0eeb23, (q31_t)0xa81ce169,\n    (q31_t)0x5d0a9a9a, (q31_t)0xa818501c, (q31_t)0x5d0649d7, (q31_t)0xa813bf06,\n    (q31_t)0x5d01f8dc, (q31_t)0xa80f2e26, (q31_t)0x5cfda7a7, (q31_t)0xa80a9d7c,\n    (q31_t)0x5cf95638, (q31_t)0xa8060d08, (q31_t)0x5cf50490, (q31_t)0xa8017ccb,\n    (q31_t)0x5cf0b2af, (q31_t)0xa7fcecc4, (q31_t)0x5cec6095, (q31_t)0xa7f85cf3,\n    (q31_t)0x5ce80e41, (q31_t)0xa7f3cd59, (q31_t)0x5ce3bbb4, (q31_t)0xa7ef3df5,\n    (q31_t)0x5cdf68ed, (q31_t)0xa7eaaec7, (q31_t)0x5cdb15ed, (q31_t)0xa7e61fd0,\n    (q31_t)0x5cd6c2b5, (q31_t)0xa7e1910f, (q31_t)0x5cd26f42, (q31_t)0xa7dd0284,\n    (q31_t)0x5cce1b97, (q31_t)0xa7d8742f, (q31_t)0x5cc9c7b2, (q31_t)0xa7d3e611,\n    (q31_t)0x5cc57394, (q31_t)0xa7cf582a, (q31_t)0x5cc11f3d, (q31_t)0xa7caca79,\n    (q31_t)0x5cbccaac, (q31_t)0xa7c63cfe, (q31_t)0x5cb875e3, (q31_t)0xa7c1afb9,\n    (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5cafcba4, (q31_t)0xa7b895d4,\n    (q31_t)0x5cab762f, (q31_t)0xa7b40933, (q31_t)0x5ca72080, (q31_t)0xa7af7cc8,\n    (q31_t)0x5ca2ca99, (q31_t)0xa7aaf094, (q31_t)0x5c9e7478, (q31_t)0xa7a66497,\n    (q31_t)0x5c9a1e1e, (q31_t)0xa7a1d8d0, (q31_t)0x5c95c78b, (q31_t)0xa79d4d3f,\n    (q31_t)0x5c9170bf, (q31_t)0xa798c1e5, (q31_t)0x5c8d19ba, (q31_t)0xa79436c1,\n    (q31_t)0x5c88c27c, (q31_t)0xa78fabd4, (q31_t)0x5c846b05, (q31_t)0xa78b211e,\n    (q31_t)0x5c801354, (q31_t)0xa786969e, (q31_t)0x5c7bbb6b, (q31_t)0xa7820c55,\n    (q31_t)0x5c776348, (q31_t)0xa77d8242, (q31_t)0x5c730aed, (q31_t)0xa778f866,\n    (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c6a598b, (q31_t)0xa76fe551,\n    (q31_t)0x5c660084, (q31_t)0xa76b5c19, (q31_t)0x5c61a745, (q31_t)0xa766d317,\n    (q31_t)0x5c5d4dcc, (q31_t)0xa7624a4d, (q31_t)0x5c58f41a, (q31_t)0xa75dc1b8,\n    (q31_t)0x5c549a30, (q31_t)0xa759395b, (q31_t)0x5c50400d, (q31_t)0xa754b134,\n    (q31_t)0x5c4be5b0, (q31_t)0xa7502943, (q31_t)0x5c478b1b, (q31_t)0xa74ba18a,\n    (q31_t)0x5c43304d, (q31_t)0xa7471a07, (q31_t)0x5c3ed545, (q31_t)0xa74292bb,\n    (q31_t)0x5c3a7a05, (q31_t)0xa73e0ba5, (q31_t)0x5c361e8c, (q31_t)0xa73984c7,\n    (q31_t)0x5c31c2db, (q31_t)0xa734fe1f, (q31_t)0x5c2d66f0, (q31_t)0xa73077ae,\n    (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5c24ae70, (q31_t)0xa7276b70,\n    (q31_t)0x5c2051db, (q31_t)0xa722e5a3, (q31_t)0x5c1bf50d, (q31_t)0xa71e600d,\n    (q31_t)0x5c179806, (q31_t)0xa719daae, (q31_t)0x5c133ac6, (q31_t)0xa7155586,\n    (q31_t)0x5c0edd4e, (q31_t)0xa710d095, (q31_t)0x5c0a7f9c, (q31_t)0xa70c4bda,\n    (q31_t)0x5c0621b2, (q31_t)0xa707c757, (q31_t)0x5c01c38f, (q31_t)0xa703430a,\n    (q31_t)0x5bfd6534, (q31_t)0xa6febef4, (q31_t)0x5bf906a0, (q31_t)0xa6fa3b15,\n    (q31_t)0x5bf4a7d2, (q31_t)0xa6f5b76d, (q31_t)0x5bf048cd, (q31_t)0xa6f133fc,\n    (q31_t)0x5bebe98e, (q31_t)0xa6ecb0c2, (q31_t)0x5be78a17, (q31_t)0xa6e82dbe,\n    (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2, (q31_t)0x5bdeca7f, (q31_t)0xa6df285d,\n    (q31_t)0x5bda6a5d, (q31_t)0xa6daa5fe, (q31_t)0x5bd60a03, (q31_t)0xa6d623d7,\n    (q31_t)0x5bd1a971, (q31_t)0xa6d1a1e7, (q31_t)0x5bcd48a6, (q31_t)0xa6cd202d,\n    (q31_t)0x5bc8e7a2, (q31_t)0xa6c89eab, (q31_t)0x5bc48666, (q31_t)0xa6c41d60,\n    (q31_t)0x5bc024f0, (q31_t)0xa6bf9c4b, (q31_t)0x5bbbc343, (q31_t)0xa6bb1b6e,\n    (q31_t)0x5bb7615d, (q31_t)0xa6b69ac8, (q31_t)0x5bb2ff3e, (q31_t)0xa6b21a59,\n    (q31_t)0x5bae9ce7, (q31_t)0xa6ad9a21, (q31_t)0x5baa3a57, (q31_t)0xa6a91a20,\n    (q31_t)0x5ba5d78e, (q31_t)0xa6a49a56, (q31_t)0x5ba1748d, (q31_t)0xa6a01ac4,\n    (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b98ade2, (q31_t)0xa6971c44,\n    (q31_t)0x5b944a37, (q31_t)0xa6929d57, (q31_t)0x5b8fe654, (q31_t)0xa68e1ea1,\n    (q31_t)0x5b8b8239, (q31_t)0xa689a022, (q31_t)0x5b871de5, (q31_t)0xa68521da,\n    (q31_t)0x5b82b958, (q31_t)0xa680a3ca, (q31_t)0x5b7e5493, (q31_t)0xa67c25f0,\n    (q31_t)0x5b79ef96, (q31_t)0xa677a84e, (q31_t)0x5b758a60, (q31_t)0xa6732ae3,\n    (q31_t)0x5b7124f2, (q31_t)0xa66eadb0, (q31_t)0x5b6cbf4c, (q31_t)0xa66a30b3,\n    (q31_t)0x5b68596d, (q31_t)0xa665b3ee, (q31_t)0x5b63f355, (q31_t)0xa6613760,\n    (q31_t)0x5b5f8d06, (q31_t)0xa65cbb0a, (q31_t)0x5b5b267e, (q31_t)0xa6583eeb,\n    (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b5258c4, (q31_t)0xa64f4752,\n    (q31_t)0x5b4df193, (q31_t)0xa64acbd9, (q31_t)0x5b498a2a, (q31_t)0xa6465097,\n    (q31_t)0x5b452288, (q31_t)0xa641d58c, (q31_t)0x5b40baae, (q31_t)0xa63d5ab9,\n    (q31_t)0x5b3c529c, (q31_t)0xa638e01d, (q31_t)0x5b37ea51, (q31_t)0xa63465b9,\n    (q31_t)0x5b3381ce, (q31_t)0xa62feb8b, (q31_t)0x5b2f1913, (q31_t)0xa62b7196,\n    (q31_t)0x5b2ab020, (q31_t)0xa626f7d7, (q31_t)0x5b2646f4, (q31_t)0xa6227e50,\n    (q31_t)0x5b21dd90, (q31_t)0xa61e0501, (q31_t)0x5b1d73f4, (q31_t)0xa6198be9,\n    (q31_t)0x5b190a20, (q31_t)0xa6151308, (q31_t)0x5b14a014, (q31_t)0xa6109a5f,\n    (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5b0bcb52, (q31_t)0xa607a9b4,\n    (q31_t)0x5b07609d, (q31_t)0xa60331b1, (q31_t)0x5b02f5b0, (q31_t)0xa5feb9e6,\n    (q31_t)0x5afe8a8b, (q31_t)0xa5fa4252, (q31_t)0x5afa1f2e, (q31_t)0xa5f5caf6,\n    (q31_t)0x5af5b398, (q31_t)0xa5f153d2, (q31_t)0x5af147ca, (q31_t)0xa5ecdce5,\n    (q31_t)0x5aecdbc5, (q31_t)0xa5e8662f, (q31_t)0x5ae86f87, (q31_t)0xa5e3efb1,\n    (q31_t)0x5ae40311, (q31_t)0xa5df796b, (q31_t)0x5adf9663, (q31_t)0xa5db035c,\n    (q31_t)0x5adb297d, (q31_t)0xa5d68d85, (q31_t)0x5ad6bc5f, (q31_t)0xa5d217e6,\n    (q31_t)0x5ad24f09, (q31_t)0xa5cda27e, (q31_t)0x5acde17b, (q31_t)0xa5c92d4e,\n    (q31_t)0x5ac973b5, (q31_t)0xa5c4b855, (q31_t)0x5ac505b7, (q31_t)0xa5c04395,\n    (q31_t)0x5ac09781, (q31_t)0xa5bbcf0b, (q31_t)0x5abc2912, (q31_t)0xa5b75aba,\n    (q31_t)0x5ab7ba6c, (q31_t)0xa5b2e6a0, (q31_t)0x5ab34b8e, (q31_t)0xa5ae72be,\n    (q31_t)0x5aaedc78, (q31_t)0xa5a9ff14, (q31_t)0x5aaa6d2b, (q31_t)0xa5a58ba1,\n    (q31_t)0x5aa5fda5, (q31_t)0xa5a11866, (q31_t)0x5aa18de7, (q31_t)0xa59ca563,\n    (q31_t)0x5a9d1df1, (q31_t)0xa5983297, (q31_t)0x5a98adc4, (q31_t)0xa593c004,\n    (q31_t)0x5a943d5e, (q31_t)0xa58f4da8, (q31_t)0x5a8fccc1, (q31_t)0xa58adb84,\n    (q31_t)0x5a8b5bec, (q31_t)0xa5866997, (q31_t)0x5a86eadf, (q31_t)0xa581f7e3,\n    (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a7e081d, (q31_t)0xa5791521,\n    (q31_t)0x5a799669, (q31_t)0xa574a414, (q31_t)0x5a75247c, (q31_t)0xa570333f,\n    (q31_t)0x5a70b258, (q31_t)0xa56bc2a2, (q31_t)0x5a6c3ffc, (q31_t)0xa567523c,\n    (q31_t)0x5a67cd69, (q31_t)0xa562e20f, (q31_t)0x5a635a9d, (q31_t)0xa55e7219,\n    (q31_t)0x5a5ee79a, (q31_t)0xa55a025b, (q31_t)0x5a5a745f, (q31_t)0xa55592d5,\n    (q31_t)0x5a5600ec, (q31_t)0xa5512388, (q31_t)0x5a518d42, (q31_t)0xa54cb472,\n    (q31_t)0x5a4d1960, (q31_t)0xa5484594, (q31_t)0x5a48a546, (q31_t)0xa543d6ee,\n    (q31_t)0x5a4430f5, (q31_t)0xa53f687f, (q31_t)0x5a3fbc6b, (q31_t)0xa53afa49,\n    (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x5a36d2b2, (q31_t)0xa5321e85,\n    (q31_t)0x5a325d82, (q31_t)0xa52db0f7, (q31_t)0x5a2de81a, (q31_t)0xa52943a1,\n    (q31_t)0x5a29727b, (q31_t)0xa524d683, (q31_t)0x5a24fca4, (q31_t)0xa520699d,\n    (q31_t)0x5a208695, (q31_t)0xa51bfcef, (q31_t)0x5a1c104f, (q31_t)0xa5179079,\n    (q31_t)0x5a1799d1, (q31_t)0xa513243b, (q31_t)0x5a13231b, (q31_t)0xa50eb836,\n    (q31_t)0x5a0eac2e, (q31_t)0xa50a4c68, (q31_t)0x5a0a350a, (q31_t)0xa505e0d2,\n    (q31_t)0x5a05bdae, (q31_t)0xa5017575, (q31_t)0x5a01461a, (q31_t)0xa4fd0a50,\n    (q31_t)0x59fcce4f, (q31_t)0xa4f89f63, (q31_t)0x59f8564c, (q31_t)0xa4f434ae,\n    (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59ef65a1, (q31_t)0xa4eb5fec,\n    (q31_t)0x59eaecf8, (q31_t)0xa4e6f5e0, (q31_t)0x59e67417, (q31_t)0xa4e28c0c,\n    (q31_t)0x59e1faff, (q31_t)0xa4de2270, (q31_t)0x59dd81b0, (q31_t)0xa4d9b90c,\n    (q31_t)0x59d90829, (q31_t)0xa4d54fe0, (q31_t)0x59d48e6a, (q31_t)0xa4d0e6ed,\n    (q31_t)0x59d01475, (q31_t)0xa4cc7e32, (q31_t)0x59cb9a47, (q31_t)0xa4c815af,\n    (q31_t)0x59c71fe3, (q31_t)0xa4c3ad64, (q31_t)0x59c2a547, (q31_t)0xa4bf4552,\n    (q31_t)0x59be2a74, (q31_t)0xa4badd78, (q31_t)0x59b9af69, (q31_t)0xa4b675d6,\n    (q31_t)0x59b53427, (q31_t)0xa4b20e6d, (q31_t)0x59b0b8ae, (q31_t)0xa4ada73c,\n    (q31_t)0x59ac3cfd, (q31_t)0xa4a94043, (q31_t)0x59a7c115, (q31_t)0xa4a4d982,\n    (q31_t)0x59a344f6, (q31_t)0xa4a072fa, (q31_t)0x599ec8a0, (q31_t)0xa49c0cab,\n    (q31_t)0x599a4c12, (q31_t)0xa497a693, (q31_t)0x5995cf4d, (q31_t)0xa49340b4,\n    (q31_t)0x59915250, (q31_t)0xa48edb0e, (q31_t)0x598cd51d, (q31_t)0xa48a75a0,\n    (q31_t)0x598857b2, (q31_t)0xa486106a, (q31_t)0x5983da10, (q31_t)0xa481ab6d,\n    (q31_t)0x597f5c36, (q31_t)0xa47d46a8, (q31_t)0x597ade26, (q31_t)0xa478e21b,\n    (q31_t)0x59765fde, (q31_t)0xa4747dc7, (q31_t)0x5971e15f, (q31_t)0xa47019ac,\n    (q31_t)0x596d62a9, (q31_t)0xa46bb5c9, (q31_t)0x5968e3bc, (q31_t)0xa467521e,\n    (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x595fe53c, (q31_t)0xa45e8b73,\n    (q31_t)0x595b65aa, (q31_t)0xa45a2872, (q31_t)0x5956e5e0, (q31_t)0xa455c5a9,\n    (q31_t)0x595265df, (q31_t)0xa4516319, (q31_t)0x594de5a7, (q31_t)0xa44d00c2,\n    (q31_t)0x59496538, (q31_t)0xa4489ea3, (q31_t)0x5944e492, (q31_t)0xa4443cbd,\n    (q31_t)0x594063b5, (q31_t)0xa43fdb10, (q31_t)0x593be2a0, (q31_t)0xa43b799a,\n    (q31_t)0x59376155, (q31_t)0xa437185e, (q31_t)0x5932dfd3, (q31_t)0xa432b75a,\n    (q31_t)0x592e5e19, (q31_t)0xa42e568f, (q31_t)0x5929dc29, (q31_t)0xa429f5fd,\n    (q31_t)0x59255a02, (q31_t)0xa42595a3, (q31_t)0x5920d7a3, (q31_t)0xa4213581,\n    (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x5917d242, (q31_t)0xa41875e9,\n    (q31_t)0x59134f3e, (q31_t)0xa4141672, (q31_t)0x590ecc04, (q31_t)0xa40fb733,\n    (q31_t)0x590a4893, (q31_t)0xa40b582e, (q31_t)0x5905c4eb, (q31_t)0xa406f960,\n    (q31_t)0x5901410c, (q31_t)0xa4029acc, (q31_t)0x58fcbcf6, (q31_t)0xa3fe3c71,\n    (q31_t)0x58f838a9, (q31_t)0xa3f9de4e, (q31_t)0x58f3b426, (q31_t)0xa3f58064,\n    (q31_t)0x58ef2f6b, (q31_t)0xa3f122b2, (q31_t)0x58eaaa7a, (q31_t)0xa3ecc53a,\n    (q31_t)0x58e62552, (q31_t)0xa3e867fa, (q31_t)0x58e19ff3, (q31_t)0xa3e40af3,\n    (q31_t)0x58dd1a5d, (q31_t)0xa3dfae25, (q31_t)0x58d89490, (q31_t)0xa3db5190,\n    (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x58cf8852, (q31_t)0xa3d29910,\n    (q31_t)0x58cb01e1, (q31_t)0xa3ce3d25, (q31_t)0x58c67b39, (q31_t)0xa3c9e174,\n    (q31_t)0x58c1f45b, (q31_t)0xa3c585fb, (q31_t)0x58bd6d45, (q31_t)0xa3c12abb,\n    (q31_t)0x58b8e5f9, (q31_t)0xa3bccfb3, (q31_t)0x58b45e76, (q31_t)0xa3b874e5,\n    (q31_t)0x58afd6bd, (q31_t)0xa3b41a50, (q31_t)0x58ab4ecc, (q31_t)0xa3afbff3,\n    (q31_t)0x58a6c6a5, (q31_t)0xa3ab65d0, (q31_t)0x58a23e48, (q31_t)0xa3a70be6,\n    (q31_t)0x589db5b3, (q31_t)0xa3a2b234, (q31_t)0x58992ce9, (q31_t)0xa39e58bb,\n    (q31_t)0x5894a3e7, (q31_t)0xa399ff7c, (q31_t)0x58901aaf, (q31_t)0xa395a675,\n    (q31_t)0x588b9140, (q31_t)0xa3914da8, (q31_t)0x5887079a, (q31_t)0xa38cf513,\n    (q31_t)0x58827dbe, (q31_t)0xa3889cb8, (q31_t)0x587df3ab, (q31_t)0xa3844495,\n    (q31_t)0x58796962, (q31_t)0xa37fecac, (q31_t)0x5874dee2, (q31_t)0xa37b94fb,\n    (q31_t)0x5870542c, (q31_t)0xa3773d84, (q31_t)0x586bc93f, (q31_t)0xa372e646,\n    (q31_t)0x58673e1b, (q31_t)0xa36e8f41, (q31_t)0x5862b2c1, (q31_t)0xa36a3875,\n    (q31_t)0x585e2730, (q31_t)0xa365e1e2, (q31_t)0x58599b69, (q31_t)0xa3618b88,\n    (q31_t)0x58550f6c, (q31_t)0xa35d3567, (q31_t)0x58508338, (q31_t)0xa358df80,\n    (q31_t)0x584bf6cd, (q31_t)0xa35489d1, (q31_t)0x58476a2c, (q31_t)0xa350345c,\n    (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x583e5047, (q31_t)0xa3478a1d,\n    (q31_t)0x5839c302, (q31_t)0xa3433554, (q31_t)0x58353587, (q31_t)0xa33ee0c3,\n    (q31_t)0x5830a7d6, (q31_t)0xa33a8c6c, (q31_t)0x582c19ef, (q31_t)0xa336384e,\n    (q31_t)0x58278bd1, (q31_t)0xa331e469, (q31_t)0x5822fd7c, (q31_t)0xa32d90be,\n    (q31_t)0x581e6ef1, (q31_t)0xa3293d4b, (q31_t)0x5819e030, (q31_t)0xa324ea13,\n    (q31_t)0x58155139, (q31_t)0xa3209713, (q31_t)0x5810c20b, (q31_t)0xa31c444c,\n    (q31_t)0x580c32a7, (q31_t)0xa317f1bf, (q31_t)0x5807a30d, (q31_t)0xa3139f6b,\n    (q31_t)0x5803133c, (q31_t)0xa30f4d51, (q31_t)0x57fe8335, (q31_t)0xa30afb70,\n    (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57f56284, (q31_t)0xa3025859,\n    (q31_t)0x57f0d1da, (q31_t)0xa2fe0724, (q31_t)0x57ec40fa, (q31_t)0xa2f9b629,\n    (q31_t)0x57e7afe4, (q31_t)0xa2f56566, (q31_t)0x57e31e97, (q31_t)0xa2f114dd,\n    (q31_t)0x57de8d15, (q31_t)0xa2ecc48e, (q31_t)0x57d9fb5c, (q31_t)0xa2e87477,\n    (q31_t)0x57d5696d, (q31_t)0xa2e4249b, (q31_t)0x57d0d747, (q31_t)0xa2dfd4f7,\n    (q31_t)0x57cc44ec, (q31_t)0xa2db858e, (q31_t)0x57c7b25a, (q31_t)0xa2d7365d,\n    (q31_t)0x57c31f92, (q31_t)0xa2d2e766, (q31_t)0x57be8c94, (q31_t)0xa2ce98a9,\n    (q31_t)0x57b9f960, (q31_t)0xa2ca4a25, (q31_t)0x57b565f6, (q31_t)0xa2c5fbda,\n    (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x57ac3e80, (q31_t)0xa2bd5ff2,\n    (q31_t)0x57a7aa73, (q31_t)0xa2b91254, (q31_t)0x57a31631, (q31_t)0xa2b4c4f0,\n    (q31_t)0x579e81b8, (q31_t)0xa2b077c5, (q31_t)0x5799ed0a, (q31_t)0xa2ac2ad3,\n    (q31_t)0x57955825, (q31_t)0xa2a7de1c, (q31_t)0x5790c30a, (q31_t)0xa2a3919e,\n    (q31_t)0x578c2dba, (q31_t)0xa29f4559, (q31_t)0x57879833, (q31_t)0xa29af94e,\n    (q31_t)0x57830276, (q31_t)0xa296ad7d, (q31_t)0x577e6c84, (q31_t)0xa29261e5,\n    (q31_t)0x5779d65b, (q31_t)0xa28e1687, (q31_t)0x57753ffc, (q31_t)0xa289cb63,\n    (q31_t)0x5770a968, (q31_t)0xa2858078, (q31_t)0x576c129d, (q31_t)0xa28135c7,\n    (q31_t)0x57677b9d, (q31_t)0xa27ceb4f, (q31_t)0x5762e467, (q31_t)0xa278a111,\n    (q31_t)0x575e4cfa, (q31_t)0xa274570d, (q31_t)0x5759b558, (q31_t)0xa2700d43,\n    (q31_t)0x57551d80, (q31_t)0xa26bc3b2, (q31_t)0x57508572, (q31_t)0xa2677a5b,\n    (q31_t)0x574bed2f, (q31_t)0xa263313e, (q31_t)0x574754b5, (q31_t)0xa25ee85b,\n    (q31_t)0x5742bc06, (q31_t)0xa25a9fb1, (q31_t)0x573e2320, (q31_t)0xa2565741,\n    (q31_t)0x57398a05, (q31_t)0xa2520f0b, (q31_t)0x5734f0b5, (q31_t)0xa24dc70f,\n    (q31_t)0x5730572e, (q31_t)0xa2497f4c, (q31_t)0x572bbd71, (q31_t)0xa24537c3,\n    (q31_t)0x5727237f, (q31_t)0xa240f074, (q31_t)0x57228957, (q31_t)0xa23ca95f,\n    (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x57195466, (q31_t)0xa2341be3,\n    (q31_t)0x5714b99d, (q31_t)0xa22fd57b, (q31_t)0x57101e9e, (q31_t)0xa22b8f4d,\n    (q31_t)0x570b8369, (q31_t)0xa2274959, (q31_t)0x5706e7ff, (q31_t)0xa223039f,\n    (q31_t)0x57024c5f, (q31_t)0xa21ebe1f, (q31_t)0x56fdb08a, (q31_t)0xa21a78d9,\n    (q31_t)0x56f9147e, (q31_t)0xa21633cd, (q31_t)0x56f4783d, (q31_t)0xa211eefb,\n    (q31_t)0x56efdbc7, (q31_t)0xa20daa62, (q31_t)0x56eb3f1a, (q31_t)0xa2096604,\n    (q31_t)0x56e6a239, (q31_t)0xa20521e0, (q31_t)0x56e20521, (q31_t)0xa200ddf5,\n    (q31_t)0x56dd67d4, (q31_t)0xa1fc9a45, (q31_t)0x56d8ca51, (q31_t)0xa1f856ce,\n    (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x56cf8eab, (q31_t)0xa1efd08f,\n    (q31_t)0x56caf088, (q31_t)0xa1eb8dc7, (q31_t)0x56c6522f, (q31_t)0xa1e74b38,\n    (q31_t)0x56c1b3a1, (q31_t)0xa1e308e4, (q31_t)0x56bd14dd, (q31_t)0xa1dec6ca,\n    (q31_t)0x56b875e4, (q31_t)0xa1da84e9, (q31_t)0x56b3d6b5, (q31_t)0xa1d64343,\n    (q31_t)0x56af3750, (q31_t)0xa1d201d7, (q31_t)0x56aa97b7, (q31_t)0xa1cdc0a5,\n    (q31_t)0x56a5f7e7, (q31_t)0xa1c97fad, (q31_t)0x56a157e3, (q31_t)0xa1c53ef0,\n    (q31_t)0x569cb7a8, (q31_t)0xa1c0fe6c, (q31_t)0x56981739, (q31_t)0xa1bcbe22,\n    (q31_t)0x56937694, (q31_t)0xa1b87e13, (q31_t)0x568ed5b9, (q31_t)0xa1b43e3e,\n    (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x56859364, (q31_t)0xa1abbf42,\n    (q31_t)0x5680f1ea, (q31_t)0xa1a7801b, (q31_t)0x567c503a, (q31_t)0xa1a3412f,\n    (q31_t)0x5677ae54, (q31_t)0xa19f027c, (q31_t)0x56730c3a, (q31_t)0xa19ac404,\n    (q31_t)0x566e69ea, (q31_t)0xa19685c7, (q31_t)0x5669c765, (q31_t)0xa19247c3,\n    (q31_t)0x566524aa, (q31_t)0xa18e09fa, (q31_t)0x566081ba, (q31_t)0xa189cc6b,\n    (q31_t)0x565bde95, (q31_t)0xa1858f16, (q31_t)0x56573b3b, (q31_t)0xa18151fb,\n    (q31_t)0x565297ab, (q31_t)0xa17d151b, (q31_t)0x564df3e6, (q31_t)0xa178d875,\n    (q31_t)0x56494fec, (q31_t)0xa1749c09, (q31_t)0x5644abbc, (q31_t)0xa1705fd8,\n    (q31_t)0x56400758, (q31_t)0xa16c23e1, (q31_t)0x563b62be, (q31_t)0xa167e824,\n    (q31_t)0x5636bdef, (q31_t)0xa163aca2, (q31_t)0x563218eb, (q31_t)0xa15f715a,\n    (q31_t)0x562d73b2, (q31_t)0xa15b364d, (q31_t)0x5628ce43, (q31_t)0xa156fb79,\n    (q31_t)0x5624289f, (q31_t)0xa152c0e1, (q31_t)0x561f82c7, (q31_t)0xa14e8682,\n    (q31_t)0x561adcb9, (q31_t)0xa14a4c5e, (q31_t)0x56163676, (q31_t)0xa1461275,\n    (q31_t)0x56118ffe, (q31_t)0xa141d8c5, (q31_t)0x560ce950, (q31_t)0xa13d9f51,\n    (q31_t)0x5608426e, (q31_t)0xa1396617, (q31_t)0x56039b57, (q31_t)0xa1352d17,\n    (q31_t)0x55fef40a, (q31_t)0xa130f451, (q31_t)0x55fa4c89, (q31_t)0xa12cbbc7,\n    (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55f0fce7, (q31_t)0xa1244b61,\n    (q31_t)0x55ec54c6, (q31_t)0xa1201385, (q31_t)0x55e7ac71, (q31_t)0xa11bdbe4,\n    (q31_t)0x55e303e6, (q31_t)0xa117a47e, (q31_t)0x55de5b27, (q31_t)0xa1136d52,\n    (q31_t)0x55d9b232, (q31_t)0xa10f3661, (q31_t)0x55d50909, (q31_t)0xa10affab,\n    (q31_t)0x55d05faa, (q31_t)0xa106c92f, (q31_t)0x55cbb617, (q31_t)0xa10292ed,\n    (q31_t)0x55c70c4f, (q31_t)0xa0fe5ce6, (q31_t)0x55c26251, (q31_t)0xa0fa271a,\n    (q31_t)0x55bdb81f, (q31_t)0xa0f5f189, (q31_t)0x55b90db8, (q31_t)0xa0f1bc32,\n    (q31_t)0x55b4631d, (q31_t)0xa0ed8715, (q31_t)0x55afb84c, (q31_t)0xa0e95234,\n    (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x55a6620c, (q31_t)0xa0e0e920,\n    (q31_t)0x55a1b69d, (q31_t)0xa0dcb4ee, (q31_t)0x559d0af9, (q31_t)0xa0d880f7,\n    (q31_t)0x55985f20, (q31_t)0xa0d44d3b, (q31_t)0x5593b312, (q31_t)0xa0d019b9,\n    (q31_t)0x558f06d0, (q31_t)0xa0cbe672, (q31_t)0x558a5a58, (q31_t)0xa0c7b366,\n    (q31_t)0x5585adad, (q31_t)0xa0c38095, (q31_t)0x558100cc, (q31_t)0xa0bf4dfe,\n    (q31_t)0x557c53b6, (q31_t)0xa0bb1ba2, (q31_t)0x5577a66c, (q31_t)0xa0b6e981,\n    (q31_t)0x5572f8ed, (q31_t)0xa0b2b79b, (q31_t)0x556e4b39, (q31_t)0xa0ae85ef,\n    (q31_t)0x55699d51, (q31_t)0xa0aa547e, (q31_t)0x5564ef34, (q31_t)0xa0a62348,\n    (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x555b925c, (q31_t)0xa09dc18d,\n    (q31_t)0x5556e3a1, (q31_t)0xa0999107, (q31_t)0x555234b1, (q31_t)0xa09560bc,\n    (q31_t)0x554d858d, (q31_t)0xa09130ad, (q31_t)0x5548d634, (q31_t)0xa08d00d8,\n    (q31_t)0x554426a7, (q31_t)0xa088d13e, (q31_t)0x553f76e4, (q31_t)0xa084a1de,\n    (q31_t)0x553ac6ee, (q31_t)0xa08072ba, (q31_t)0x553616c2, (q31_t)0xa07c43d1,\n    (q31_t)0x55316663, (q31_t)0xa0781522, (q31_t)0x552cb5ce, (q31_t)0xa073e6af,\n    (q31_t)0x55280505, (q31_t)0xa06fb876, (q31_t)0x55235408, (q31_t)0xa06b8a78,\n    (q31_t)0x551ea2d6, (q31_t)0xa0675cb6, (q31_t)0x5519f16f, (q31_t)0xa0632f2e,\n    (q31_t)0x55153fd4, (q31_t)0xa05f01e1, (q31_t)0x55108e05, (q31_t)0xa05ad4cf,\n    (q31_t)0x550bdc01, (q31_t)0xa056a7f9, (q31_t)0x550729c9, (q31_t)0xa0527b5d,\n    (q31_t)0x5502775c, (q31_t)0xa04e4efc, (q31_t)0x54fdc4ba, (q31_t)0xa04a22d7,\n    (q31_t)0x54f911e5, (q31_t)0xa045f6ec, (q31_t)0x54f45edb, (q31_t)0xa041cb3c,\n    (q31_t)0x54efab9c, (q31_t)0xa03d9fc8, (q31_t)0x54eaf829, (q31_t)0xa039748e,\n    (q31_t)0x54e64482, (q31_t)0xa0354990, (q31_t)0x54e190a6, (q31_t)0xa0311ecd,\n    (q31_t)0x54dcdc96, (q31_t)0xa02cf444, (q31_t)0x54d82852, (q31_t)0xa028c9f7,\n    (q31_t)0x54d373d9, (q31_t)0xa0249fe5, (q31_t)0x54cebf2c, (q31_t)0xa020760e,\n    (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x54c55535, (q31_t)0xa0182312,\n    (q31_t)0x54c09feb, (q31_t)0xa013f9ed, (q31_t)0x54bbea6d, (q31_t)0xa00fd102,\n    (q31_t)0x54b734ba, (q31_t)0xa00ba853, (q31_t)0x54b27ed3, (q31_t)0xa0077fdf,\n    (q31_t)0x54adc8b8, (q31_t)0xa00357a7, (q31_t)0x54a91269, (q31_t)0x9fff2fa9,\n    (q31_t)0x54a45be6, (q31_t)0x9ffb07e7, (q31_t)0x549fa52e, (q31_t)0x9ff6e060,\n    (q31_t)0x549aee42, (q31_t)0x9ff2b914, (q31_t)0x54963722, (q31_t)0x9fee9204,\n    (q31_t)0x54917fce, (q31_t)0x9fea6b2f, (q31_t)0x548cc845, (q31_t)0x9fe64495,\n    (q31_t)0x54881089, (q31_t)0x9fe21e36, (q31_t)0x54835898, (q31_t)0x9fddf812,\n    (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x5479e81a, (q31_t)0x9fd5ac7d,\n    (q31_t)0x54752f8d, (q31_t)0x9fd1870c, (q31_t)0x547076cc, (q31_t)0x9fcd61d6,\n    (q31_t)0x546bbdd7, (q31_t)0x9fc93cdb, (q31_t)0x546704ae, (q31_t)0x9fc5181b,\n    (q31_t)0x54624b50, (q31_t)0x9fc0f397, (q31_t)0x545d91bf, (q31_t)0x9fbccf4f,\n    (q31_t)0x5458d7f9, (q31_t)0x9fb8ab41, (q31_t)0x54541e00, (q31_t)0x9fb4876f,\n    (q31_t)0x544f63d2, (q31_t)0x9fb063d9, (q31_t)0x544aa971, (q31_t)0x9fac407e,\n    (q31_t)0x5445eedb, (q31_t)0x9fa81d5e, (q31_t)0x54413412, (q31_t)0x9fa3fa79,\n    (q31_t)0x543c7914, (q31_t)0x9f9fd7d1, (q31_t)0x5437bde3, (q31_t)0x9f9bb563,\n    (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x542e46e4, (q31_t)0x9f93713b,\n    (q31_t)0x54298b17, (q31_t)0x9f8f4f80, (q31_t)0x5424cf16, (q31_t)0x9f8b2e00,\n    (q31_t)0x542012e1, (q31_t)0x9f870cbc, (q31_t)0x541b5678, (q31_t)0x9f82ebb4,\n    (q31_t)0x541699db, (q31_t)0x9f7ecae7, (q31_t)0x5411dd0a, (q31_t)0x9f7aaa55,\n    (q31_t)0x540d2005, (q31_t)0x9f7689ff, (q31_t)0x540862cd, (q31_t)0x9f7269e5,\n    (q31_t)0x5403a561, (q31_t)0x9f6e4a06, (q31_t)0x53fee7c1, (q31_t)0x9f6a2a63,\n    (q31_t)0x53fa29ed, (q31_t)0x9f660afb, (q31_t)0x53f56be5, (q31_t)0x9f61ebcf,\n    (q31_t)0x53f0adaa, (q31_t)0x9f5dccde, (q31_t)0x53ebef3a, (q31_t)0x9f59ae29,\n    (q31_t)0x53e73097, (q31_t)0x9f558fb0, (q31_t)0x53e271c0, (q31_t)0x9f517173,\n    (q31_t)0x53ddb2b6, (q31_t)0x9f4d5371, (q31_t)0x53d8f378, (q31_t)0x9f4935aa,\n    (q31_t)0x53d43406, (q31_t)0x9f45181f, (q31_t)0x53cf7460, (q31_t)0x9f40fad0,\n    (q31_t)0x53cab486, (q31_t)0x9f3cddbd, (q31_t)0x53c5f479, (q31_t)0x9f38c0e5,\n    (q31_t)0x53c13439, (q31_t)0x9f34a449, (q31_t)0x53bc73c4, (q31_t)0x9f3087e9,\n    (q31_t)0x53b7b31c, (q31_t)0x9f2c6bc5, (q31_t)0x53b2f240, (q31_t)0x9f284fdc,\n    (q31_t)0x53ae3131, (q31_t)0x9f24342f, (q31_t)0x53a96fee, (q31_t)0x9f2018bd,\n    (q31_t)0x53a4ae77, (q31_t)0x9f1bfd88, (q31_t)0x539feccd, (q31_t)0x9f17e28e,\n    (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x539668de, (q31_t)0x9f0fad4e,\n    (q31_t)0x5391a699, (q31_t)0x9f0b9307, (q31_t)0x538ce421, (q31_t)0x9f0778fd,\n    (q31_t)0x53882175, (q31_t)0x9f035f2e, (q31_t)0x53835e95, (q31_t)0x9eff459b,\n    (q31_t)0x537e9b82, (q31_t)0x9efb2c44, (q31_t)0x5379d83c, (q31_t)0x9ef71328,\n    (q31_t)0x537514c2, (q31_t)0x9ef2fa49, (q31_t)0x53705114, (q31_t)0x9eeee1a5,\n    (q31_t)0x536b8d33, (q31_t)0x9eeac93e, (q31_t)0x5366c91f, (q31_t)0x9ee6b112,\n    (q31_t)0x536204d7, (q31_t)0x9ee29922, (q31_t)0x535d405c, (q31_t)0x9ede816e,\n    (q31_t)0x53587bad, (q31_t)0x9eda69f6, (q31_t)0x5353b6cb, (q31_t)0x9ed652ba,\n    (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x534a2c6c, (q31_t)0x9ece24f5,\n    (q31_t)0x534566f0, (q31_t)0x9eca0e6d, (q31_t)0x5340a140, (q31_t)0x9ec5f820,\n    (q31_t)0x533bdb5d, (q31_t)0x9ec1e210, (q31_t)0x53371547, (q31_t)0x9ebdcc3b,\n    (q31_t)0x53324efd, (q31_t)0x9eb9b6a3, (q31_t)0x532d8880, (q31_t)0x9eb5a146,\n    (q31_t)0x5328c1d0, (q31_t)0x9eb18c26, (q31_t)0x5323faec, (q31_t)0x9ead7742,\n    (q31_t)0x531f33d5, (q31_t)0x9ea96299, (q31_t)0x531a6c8b, (q31_t)0x9ea54e2d,\n    (q31_t)0x5315a50e, (q31_t)0x9ea139fd, (q31_t)0x5310dd5d, (q31_t)0x9e9d2608,\n    (q31_t)0x530c1579, (q31_t)0x9e991250, (q31_t)0x53074d62, (q31_t)0x9e94fed4,\n    (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52fdbc9a, (q31_t)0x9e8cd890,\n    (q31_t)0x52f8f3e9, (q31_t)0x9e88c5c9, (q31_t)0x52f42b05, (q31_t)0x9e84b33d,\n    (q31_t)0x52ef61ee, (q31_t)0x9e80a0ee, (q31_t)0x52ea98a4, (q31_t)0x9e7c8eda,\n    (q31_t)0x52e5cf27, (q31_t)0x9e787d03, (q31_t)0x52e10576, (q31_t)0x9e746b68,\n    (q31_t)0x52dc3b92, (q31_t)0x9e705a09, (q31_t)0x52d7717b, (q31_t)0x9e6c48e7,\n    (q31_t)0x52d2a732, (q31_t)0x9e683800, (q31_t)0x52cddcb5, (q31_t)0x9e642756,\n    (q31_t)0x52c91204, (q31_t)0x9e6016e8, (q31_t)0x52c44721, (q31_t)0x9e5c06b6,\n    (q31_t)0x52bf7c0b, (q31_t)0x9e57f6c0, (q31_t)0x52bab0c2, (q31_t)0x9e53e707,\n    (q31_t)0x52b5e546, (q31_t)0x9e4fd78a, (q31_t)0x52b11996, (q31_t)0x9e4bc849,\n    (q31_t)0x52ac4db4, (q31_t)0x9e47b944, (q31_t)0x52a7819f, (q31_t)0x9e43aa7c,\n    (q31_t)0x52a2b556, (q31_t)0x9e3f9bf0, (q31_t)0x529de8db, (q31_t)0x9e3b8da0,\n    (q31_t)0x52991c2d, (q31_t)0x9e377f8c, (q31_t)0x52944f4c, (q31_t)0x9e3371b5,\n    (q31_t)0x528f8238, (q31_t)0x9e2f641b, (q31_t)0x528ab4f1, (q31_t)0x9e2b56bc,\n    (q31_t)0x5285e777, (q31_t)0x9e27499a, (q31_t)0x528119ca, (q31_t)0x9e233cb4,\n    (q31_t)0x527c4bea, (q31_t)0x9e1f300b, (q31_t)0x52777dd7, (q31_t)0x9e1b239e,\n    (q31_t)0x5272af92, (q31_t)0x9e17176d, (q31_t)0x526de11a, (q31_t)0x9e130b79,\n    (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x52644390, (q31_t)0x9e0af446,\n    (q31_t)0x525f7480, (q31_t)0x9e06e907, (q31_t)0x525aa53c, (q31_t)0x9e02de04,\n    (q31_t)0x5255d5c5, (q31_t)0x9dfed33e, (q31_t)0x5251061c, (q31_t)0x9dfac8b4,\n    (q31_t)0x524c3640, (q31_t)0x9df6be67, (q31_t)0x52476631, (q31_t)0x9df2b456,\n    (q31_t)0x524295f0, (q31_t)0x9deeaa82, (q31_t)0x523dc57b, (q31_t)0x9deaa0ea,\n    (q31_t)0x5238f4d4, (q31_t)0x9de6978f, (q31_t)0x523423fb, (q31_t)0x9de28e70,\n    (q31_t)0x522f52ee, (q31_t)0x9dde858e, (q31_t)0x522a81af, (q31_t)0x9dda7ce9,\n    (q31_t)0x5225b03d, (q31_t)0x9dd6747f, (q31_t)0x5220de99, (q31_t)0x9dd26c53,\n    (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x52173ab8, (q31_t)0x9dca5caf,\n    (q31_t)0x5212687b, (q31_t)0x9dc65539, (q31_t)0x520d960c, (q31_t)0x9dc24dfe,\n    (q31_t)0x5208c36a, (q31_t)0x9dbe4701, (q31_t)0x5203f096, (q31_t)0x9dba4040,\n    (q31_t)0x51ff1d8f, (q31_t)0x9db639bb, (q31_t)0x51fa4a56, (q31_t)0x9db23373,\n    (q31_t)0x51f576ea, (q31_t)0x9dae2d68, (q31_t)0x51f0a34b, (q31_t)0x9daa279a,\n    (q31_t)0x51ebcf7a, (q31_t)0x9da62208, (q31_t)0x51e6fb76, (q31_t)0x9da21cb2,\n    (q31_t)0x51e22740, (q31_t)0x9d9e179a, (q31_t)0x51dd52d7, (q31_t)0x9d9a12be,\n    (q31_t)0x51d87e3c, (q31_t)0x9d960e1f, (q31_t)0x51d3a96f, (q31_t)0x9d9209bd,\n    (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x51c9ff3c, (q31_t)0x9d8a01ae,\n    (q31_t)0x51c529d7, (q31_t)0x9d85fe02, (q31_t)0x51c0543f, (q31_t)0x9d81fa92,\n    (q31_t)0x51bb7e75, (q31_t)0x9d7df75f, (q31_t)0x51b6a879, (q31_t)0x9d79f469,\n    (q31_t)0x51b1d24a, (q31_t)0x9d75f1b0, (q31_t)0x51acfbe9, (q31_t)0x9d71ef34,\n    (q31_t)0x51a82555, (q31_t)0x9d6decf4, (q31_t)0x51a34e8f, (q31_t)0x9d69eaf1,\n    (q31_t)0x519e7797, (q31_t)0x9d65e92b, (q31_t)0x5199a06d, (q31_t)0x9d61e7a2,\n    (q31_t)0x5194c910, (q31_t)0x9d5de656, (q31_t)0x518ff180, (q31_t)0x9d59e546,\n    (q31_t)0x518b19bf, (q31_t)0x9d55e473, (q31_t)0x518641cb, (q31_t)0x9d51e3dd,\n    (q31_t)0x518169a5, (q31_t)0x9d4de385, (q31_t)0x517c914c, (q31_t)0x9d49e368,\n    (q31_t)0x5177b8c2, (q31_t)0x9d45e389, (q31_t)0x5172e005, (q31_t)0x9d41e3e7,\n    (q31_t)0x516e0715, (q31_t)0x9d3de482, (q31_t)0x51692df4, (q31_t)0x9d39e559,\n    (q31_t)0x516454a0, (q31_t)0x9d35e66e, (q31_t)0x515f7b1a, (q31_t)0x9d31e7bf,\n    (q31_t)0x515aa162, (q31_t)0x9d2de94d, (q31_t)0x5155c778, (q31_t)0x9d29eb19,\n    (q31_t)0x5150ed5c, (q31_t)0x9d25ed21, (q31_t)0x514c130d, (q31_t)0x9d21ef66,\n    (q31_t)0x5147388c, (q31_t)0x9d1df1e9, (q31_t)0x51425dd9, (q31_t)0x9d19f4a8,\n    (q31_t)0x513d82f4, (q31_t)0x9d15f7a4, (q31_t)0x5138a7dd, (q31_t)0x9d11fadd,\n    (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x512ef119, (q31_t)0x9d0a0207,\n    (q31_t)0x512a156b, (q31_t)0x9d0605f7, (q31_t)0x5125398c, (q31_t)0x9d020a25,\n    (q31_t)0x51205d7b, (q31_t)0x9cfe0e8f, (q31_t)0x511b8137, (q31_t)0x9cfa1337,\n    (q31_t)0x5116a4c1, (q31_t)0x9cf6181c, (q31_t)0x5111c81a, (q31_t)0x9cf21d3d,\n    (q31_t)0x510ceb40, (q31_t)0x9cee229c, (q31_t)0x51080e35, (q31_t)0x9cea2838,\n    (q31_t)0x510330f7, (q31_t)0x9ce62e11, (q31_t)0x50fe5388, (q31_t)0x9ce23427,\n    (q31_t)0x50f975e6, (q31_t)0x9cde3a7b, (q31_t)0x50f49813, (q31_t)0x9cda410b,\n    (q31_t)0x50efba0d, (q31_t)0x9cd647d9, (q31_t)0x50eadbd6, (q31_t)0x9cd24ee4,\n    (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x50e11ed2, (q31_t)0x9cca5db1,\n    (q31_t)0x50dc4005, (q31_t)0x9cc66573, (q31_t)0x50d76106, (q31_t)0x9cc26d73,\n    (q31_t)0x50d281d5, (q31_t)0x9cbe75b0, (q31_t)0x50cda272, (q31_t)0x9cba7e2a,\n    (q31_t)0x50c8c2de, (q31_t)0x9cb686e1, (q31_t)0x50c3e317, (q31_t)0x9cb28fd5,\n    (q31_t)0x50bf031f, (q31_t)0x9cae9907, (q31_t)0x50ba22f5, (q31_t)0x9caaa276,\n    (q31_t)0x50b5429a, (q31_t)0x9ca6ac23, (q31_t)0x50b0620c, (q31_t)0x9ca2b60c,\n    (q31_t)0x50ab814d, (q31_t)0x9c9ec033, (q31_t)0x50a6a05c, (q31_t)0x9c9aca97,\n    (q31_t)0x50a1bf39, (q31_t)0x9c96d539, (q31_t)0x509cdde4, (q31_t)0x9c92e017,\n    (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x50931aa6, (q31_t)0x9c8af68d,\n    (q31_t)0x508e38bd, (q31_t)0x9c870224, (q31_t)0x508956a1, (q31_t)0x9c830df8,\n    (q31_t)0x50847454, (q31_t)0x9c7f1a0a, (q31_t)0x507f91d5, (q31_t)0x9c7b2659,\n    (q31_t)0x507aaf25, (q31_t)0x9c7732e5, (q31_t)0x5075cc43, (q31_t)0x9c733faf,\n    (q31_t)0x5070e92f, (q31_t)0x9c6f4cb6, (q31_t)0x506c05ea, (q31_t)0x9c6b59fa,\n    (q31_t)0x50672273, (q31_t)0x9c67677c, (q31_t)0x50623ecb, (q31_t)0x9c63753c,\n    (q31_t)0x505d5af1, (q31_t)0x9c5f8339, (q31_t)0x505876e5, (q31_t)0x9c5b9173,\n    (q31_t)0x505392a8, (q31_t)0x9c579feb, (q31_t)0x504eae39, (q31_t)0x9c53aea0,\n    (q31_t)0x5049c999, (q31_t)0x9c4fbd93, (q31_t)0x5044e4c7, (q31_t)0x9c4bccc3,\n    (q31_t)0x503fffc4, (q31_t)0x9c47dc31, (q31_t)0x503b1a8f, (q31_t)0x9c43ebdc,\n    (q31_t)0x50363529, (q31_t)0x9c3ffbc5, (q31_t)0x50314f91, (q31_t)0x9c3c0beb,\n    (q31_t)0x502c69c8, (q31_t)0x9c381c4f, (q31_t)0x502783cd, (q31_t)0x9c342cf0,\n    (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x501db743, (q31_t)0x9c2c4eec,\n    (q31_t)0x5018d0b4, (q31_t)0x9c286046, (q31_t)0x5013e9f4, (q31_t)0x9c2471de,\n    (q31_t)0x500f0302, (q31_t)0x9c2083b3, (q31_t)0x500a1bdf, (q31_t)0x9c1c95c6,\n    (q31_t)0x5005348a, (q31_t)0x9c18a816, (q31_t)0x50004d04, (q31_t)0x9c14baa4,\n    (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ff67d64, (q31_t)0x9c0ce07a,\n    (q31_t)0x4ff1954b, (q31_t)0x9c08f3c1, (q31_t)0x4fecacff, (q31_t)0x9c050745,\n    (q31_t)0x4fe7c483, (q31_t)0x9c011b08, (q31_t)0x4fe2dbd5, (q31_t)0x9bfd2f08,\n    (q31_t)0x4fddf2f6, (q31_t)0x9bf94346, (q31_t)0x4fd909e5, (q31_t)0x9bf557c1,\n    (q31_t)0x4fd420a4, (q31_t)0x9bf16c7a, (q31_t)0x4fcf3731, (q31_t)0x9bed8171,\n    (q31_t)0x4fca4d8d, (q31_t)0x9be996a6, (q31_t)0x4fc563b7, (q31_t)0x9be5ac18,\n    (q31_t)0x4fc079b1, (q31_t)0x9be1c1c8, (q31_t)0x4fbb8f79, (q31_t)0x9bddd7b6,\n    (q31_t)0x4fb6a510, (q31_t)0x9bd9ede2, (q31_t)0x4fb1ba76, (q31_t)0x9bd6044b,\n    (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4fa7e4af, (q31_t)0x9bce31d8,\n    (q31_t)0x4fa2f981, (q31_t)0x9bca48fa, (q31_t)0x4f9e0e22, (q31_t)0x9bc6605b,\n    (q31_t)0x4f992293, (q31_t)0x9bc277fa, (q31_t)0x4f9436d2, (q31_t)0x9bbe8fd6,\n    (q31_t)0x4f8f4ae0, (q31_t)0x9bbaa7f0, (q31_t)0x4f8a5ebd, (q31_t)0x9bb6c048,\n    (q31_t)0x4f857269, (q31_t)0x9bb2d8de, (q31_t)0x4f8085e4, (q31_t)0x9baef1b2,\n    (q31_t)0x4f7b992d, (q31_t)0x9bab0ac3, (q31_t)0x4f76ac46, (q31_t)0x9ba72413,\n    (q31_t)0x4f71bf2e, (q31_t)0x9ba33da0, (q31_t)0x4f6cd1e5, (q31_t)0x9b9f576b,\n    (q31_t)0x4f67e46a, (q31_t)0x9b9b7174, (q31_t)0x4f62f6bf, (q31_t)0x9b978bbc,\n    (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f591ad6, (q31_t)0x9b8fc104,\n    (q31_t)0x4f542c98, (q31_t)0x9b8bdc05, (q31_t)0x4f4f3e29, (q31_t)0x9b87f744,\n    (q31_t)0x4f4a4f89, (q31_t)0x9b8412c1, (q31_t)0x4f4560b8, (q31_t)0x9b802e7b,\n    (q31_t)0x4f4071b6, (q31_t)0x9b7c4a74, (q31_t)0x4f3b8284, (q31_t)0x9b7866ab,\n    (q31_t)0x4f369320, (q31_t)0x9b748320, (q31_t)0x4f31a38c, (q31_t)0x9b709fd3,\n    (q31_t)0x4f2cb3c7, (q31_t)0x9b6cbcc4, (q31_t)0x4f27c3d1, (q31_t)0x9b68d9f3,\n    (q31_t)0x4f22d3aa, (q31_t)0x9b64f760, (q31_t)0x4f1de352, (q31_t)0x9b61150b,\n    (q31_t)0x4f18f2c9, (q31_t)0x9b5d32f4, (q31_t)0x4f140210, (q31_t)0x9b59511c,\n    (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4f0a200b, (q31_t)0x9b518e24,\n    (q31_t)0x4f052ec0, (q31_t)0x9b4dad06, (q31_t)0x4f003d43, (q31_t)0x9b49cc26,\n    (q31_t)0x4efb4b96, (q31_t)0x9b45eb83, (q31_t)0x4ef659b8, (q31_t)0x9b420b1f,\n    (q31_t)0x4ef167aa, (q31_t)0x9b3e2af9, (q31_t)0x4eec756b, (q31_t)0x9b3a4b11,\n    (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ee2905a, (q31_t)0x9b328bfc,\n    (q31_t)0x4edd9d89, (q31_t)0x9b2eaccf, (q31_t)0x4ed8aa87, (q31_t)0x9b2acde0,\n    (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f, (q31_t)0x4ecec3f2, (q31_t)0x9b2310bc,\n    (q31_t)0x4ec9d05e, (q31_t)0x9b1f3288, (q31_t)0x4ec4dc99, (q31_t)0x9b1b5492,\n    (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4ebaf47f, (q31_t)0x9b139960,\n    (q31_t)0x4eb60029, (q31_t)0x9b0fbc24, (q31_t)0x4eb10ba2, (q31_t)0x9b0bdf27,\n    (q31_t)0x4eac16eb, (q31_t)0x9b080268, (q31_t)0x4ea72203, (q31_t)0x9b0425e8,\n    (q31_t)0x4ea22ceb, (q31_t)0x9b0049a5, (q31_t)0x4e9d37a3, (q31_t)0x9afc6da1,\n    (q31_t)0x4e984229, (q31_t)0x9af891db, (q31_t)0x4e934c80, (q31_t)0x9af4b654,\n    (q31_t)0x4e8e56a5, (q31_t)0x9af0db0b, (q31_t)0x4e89609b, (q31_t)0x9aed0000,\n    (q31_t)0x4e846a60, (q31_t)0x9ae92533, (q31_t)0x4e7f73f4, (q31_t)0x9ae54aa5,\n    (q31_t)0x4e7a7d58, (q31_t)0x9ae17056, (q31_t)0x4e75868c, (q31_t)0x9add9644,\n    (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e6b9862, (q31_t)0x9ad5e2dd,\n    (q31_t)0x4e66a105, (q31_t)0x9ad20987, (q31_t)0x4e61a977, (q31_t)0x9ace306f,\n    (q31_t)0x4e5cb1b9, (q31_t)0x9aca5795, (q31_t)0x4e57b9ca, (q31_t)0x9ac67efb,\n    (q31_t)0x4e52c1ab, (q31_t)0x9ac2a69e, (q31_t)0x4e4dc95c, (q31_t)0x9abece80,\n    (q31_t)0x4e48d0dd, (q31_t)0x9abaf6a1, (q31_t)0x4e43d82d, (q31_t)0x9ab71eff,\n    (q31_t)0x4e3edf4d, (q31_t)0x9ab3479d, (q31_t)0x4e39e63d, (q31_t)0x9aaf7079,\n    (q31_t)0x4e34ecfc, (q31_t)0x9aab9993, (q31_t)0x4e2ff38b, (q31_t)0x9aa7c2ec,\n    (q31_t)0x4e2af9ea, (q31_t)0x9aa3ec83, (q31_t)0x4e260019, (q31_t)0x9aa01659,\n    (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e1c0be6, (q31_t)0x9a986ac1,\n    (q31_t)0x4e171184, (q31_t)0x9a949552, (q31_t)0x4e1216f2, (q31_t)0x9a90c022,\n    (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31, (q31_t)0x4e08213e, (q31_t)0x9a89167e,\n    (q31_t)0x4e03261b, (q31_t)0x9a85420a, (q31_t)0x4dfe2ac9, (q31_t)0x9a816dd5,\n    (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4df43393, (q31_t)0x9a79c625,\n    (q31_t)0x4def37b0, (q31_t)0x9a75f2ac, (q31_t)0x4dea3b9d, (q31_t)0x9a721f71,\n    (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74, (q31_t)0x4de042e7, (q31_t)0x9a6a79b6,\n    (q31_t)0x4ddb4644, (q31_t)0x9a66a737, (q31_t)0x4dd64971, (q31_t)0x9a62d4f7,\n    (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dcc4f3b, (q31_t)0x9a5b3132,\n    (q31_t)0x4dc751d8, (q31_t)0x9a575fae, (q31_t)0x4dc25445, (q31_t)0x9a538e68,\n    (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4db8588f, (q31_t)0x9a4bec99,\n    (q31_t)0x4db35a6c, (q31_t)0x9a481c0f, (q31_t)0x4dae5c19, (q31_t)0x9a444bc5,\n    (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4da45ee3, (q31_t)0x9a3cabeb,\n    (q31_t)0x4d9f6001, (q31_t)0x9a38dc5d, (q31_t)0x4d9a60ee, (q31_t)0x9a350d0d,\n    (q31_t)0x4d9561ac, (q31_t)0x9a313dfc, (q31_t)0x4d90623a, (q31_t)0x9a2d6f2a,\n    (q31_t)0x4d8b6298, (q31_t)0x9a29a097, (q31_t)0x4d8662c6, (q31_t)0x9a25d243,\n    (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d7c6293, (q31_t)0x9a1e3656,\n    (q31_t)0x4d776231, (q31_t)0x9a1a68be, (q31_t)0x4d7261a0, (q31_t)0x9a169b65,\n    (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d685fef, (q31_t)0x9a0f016f,\n    (q31_t)0x4d635ece, (q31_t)0x9a0b34d3, (q31_t)0x4d5e5d7e, (q31_t)0x9a076875,\n    (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d545a4f, (q31_t)0x99ffd077,\n    (q31_t)0x4d4f5870, (q31_t)0x99fc04d6, (q31_t)0x4d4a5661, (q31_t)0x99f83974,\n    (q31_t)0x4d455422, (q31_t)0x99f46e51, (q31_t)0x4d4051b4, (q31_t)0x99f0a36d,\n    (q31_t)0x4d3b4f16, (q31_t)0x99ecd8c8, (q31_t)0x4d364c48, (q31_t)0x99e90e62,\n    (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d2c461e, (q31_t)0x99e17a53,\n    (q31_t)0x4d2742c2, (q31_t)0x99ddb0aa, (q31_t)0x4d223f36, (q31_t)0x99d9e73f,\n    (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14, (q31_t)0x4d18378f, (q31_t)0x99d25528,\n    (q31_t)0x4d133374, (q31_t)0x99ce8c7b, (q31_t)0x4d0e2f2a, (q31_t)0x99cac40d,\n    (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4d042607, (q31_t)0x99c333ee,\n    (q31_t)0x4cff212e, (q31_t)0x99bf6c3d, (q31_t)0x4cfa1c26, (q31_t)0x99bba4cb,\n    (q31_t)0x4cf516ee, (q31_t)0x99b7dd99, (q31_t)0x4cf01187, (q31_t)0x99b416a5,\n    (q31_t)0x4ceb0bf0, (q31_t)0x99b04ff0, (q31_t)0x4ce6062a, (q31_t)0x99ac897b,\n    (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4cdbfa0f, (q31_t)0x99a4fd4d,\n    (q31_t)0x4cd6f3bb, (q31_t)0x99a13795, (q31_t)0x4cd1ed37, (q31_t)0x999d721c,\n    (q31_t)0x4ccce684, (q31_t)0x9999ace3, (q31_t)0x4cc7dfa1, (q31_t)0x9995e7e8,\n    (q31_t)0x4cc2d88f, (q31_t)0x9992232d, (q31_t)0x4cbdd14e, (q31_t)0x998e5eb1,\n    (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4cb3c23d, (q31_t)0x9986d676,\n    (q31_t)0x4caeba6e, (q31_t)0x998312b7, (q31_t)0x4ca9b26f, (q31_t)0x997f4f38,\n    (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8, (q31_t)0x4c9fa1e4, (q31_t)0x9977c8f7,\n    (q31_t)0x4c9a9958, (q31_t)0x99740635, (q31_t)0x4c95909c, (q31_t)0x997043b2,\n    (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c8b7e97, (q31_t)0x9968bf6b,\n    (q31_t)0x4c86754e, (q31_t)0x9964fda7, (q31_t)0x4c816bd5, (q31_t)0x99613c22,\n    (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c775856, (q31_t)0x9959b9d5,\n    (q31_t)0x4c724e50, (q31_t)0x9955f90d, (q31_t)0x4c6d441b, (q31_t)0x99523885,\n    (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c632f23, (q31_t)0x994ab833,\n    (q31_t)0x4c5e2460, (q31_t)0x9946f869, (q31_t)0x4c59196f, (q31_t)0x994338df,\n    (q31_t)0x4c540e4e, (q31_t)0x993f7993, (q31_t)0x4c4f02fe, (q31_t)0x993bba87,\n    (q31_t)0x4c49f77f, (q31_t)0x9937fbbb, (q31_t)0x4c44ebd1, (q31_t)0x99343d2e,\n    (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c3ad3e7, (q31_t)0x992cc0d2,\n    (q31_t)0x4c35c7ac, (q31_t)0x99290303, (q31_t)0x4c30bb42, (q31_t)0x99254574,\n    (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c26a1e1, (q31_t)0x991dcb13,\n    (q31_t)0x4c2194e9, (q31_t)0x991a0e42, (q31_t)0x4c1c87c3, (q31_t)0x991651b1,\n    (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c126cea, (q31_t)0x990ed94c,\n    (q31_t)0x4c0d5f37, (q31_t)0x990b1d79, (q31_t)0x4c085156, (q31_t)0x990761e5,\n    (q31_t)0x4c034345, (q31_t)0x9903a691, (q31_t)0x4bfe3505, (q31_t)0x98ffeb7d,\n    (q31_t)0x4bf92697, (q31_t)0x98fc30a8, (q31_t)0x4bf417f9, (q31_t)0x98f87612,\n    (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4be9fa32, (q31_t)0x98f101a6,\n    (q31_t)0x4be4eb08, (q31_t)0x98ed47cf, (q31_t)0x4bdfdbaf, (q31_t)0x98e98e38,\n    (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0, (q31_t)0x4bd5bc72, (q31_t)0x98e21bc8,\n    (q31_t)0x4bd0ac8d, (q31_t)0x98de62f0, (q31_t)0x4bcb9c79, (q31_t)0x98daaa57,\n    (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bc17bc5, (q31_t)0x98d339e4,\n    (q31_t)0x4bbc6b25, (q31_t)0x98cf820b, (q31_t)0x4bb75a56, (q31_t)0x98cbca70,\n    (q31_t)0x4bb24958, (q31_t)0x98c81316, (q31_t)0x4bad382c, (q31_t)0x98c45bfb,\n    (q31_t)0x4ba826d1, (q31_t)0x98c0a520, (q31_t)0x4ba31548, (q31_t)0x98bcee84,\n    (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b98f1a9, (q31_t)0x98b5820c,\n    (q31_t)0x4b93df93, (q31_t)0x98b1cc30, (q31_t)0x4b8ecd4f, (q31_t)0x98ae1693,\n    (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b84a83b, (q31_t)0x98a6ac19,\n    (q31_t)0x4b7f956b, (q31_t)0x98a2f73c, (q31_t)0x4b7a826d, (q31_t)0x989f429e,\n    (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b705be4, (q31_t)0x9897da22,\n    (q31_t)0x4b6b485a, (q31_t)0x98942643, (q31_t)0x4b6634a2, (q31_t)0x989072a5,\n    (q31_t)0x4b6120bb, (q31_t)0x988cbf46, (q31_t)0x4b5c0ca5, (q31_t)0x98890c27,\n    (q31_t)0x4b56f861, (q31_t)0x98855948, (q31_t)0x4b51e3ee, (q31_t)0x9881a6a9,\n    (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b47ba7e, (q31_t)0x987a422a,\n    (q31_t)0x4b42a580, (q31_t)0x9876904a, (q31_t)0x4b3d9053, (q31_t)0x9872deaa,\n    (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b336570, (q31_t)0x986b7c2a,\n    (q31_t)0x4b2e4fb8, (q31_t)0x9867cb4a, (q31_t)0x4b2939d2, (q31_t)0x98641aa9,\n    (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b1f0d7b, (q31_t)0x985cba28,\n    (q31_t)0x4b19f70a, (q31_t)0x98590a48, (q31_t)0x4b14e06b, (q31_t)0x98555aa7,\n    (q31_t)0x4b0fc99d, (q31_t)0x9851ab46, (q31_t)0x4b0ab2a1, (q31_t)0x984dfc26,\n    (q31_t)0x4b059b77, (q31_t)0x984a4d45, (q31_t)0x4b00841f, (q31_t)0x98469ea4,\n    (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4af654e3, (q31_t)0x983f4223,\n    (q31_t)0x4af13d00, (q31_t)0x983b9442, (q31_t)0x4aec24ee, (q31_t)0x9837e6a1,\n    (q31_t)0x4ae70caf, (q31_t)0x98343940, (q31_t)0x4ae1f441, (q31_t)0x98308c1f,\n    (q31_t)0x4adcdba5, (q31_t)0x982cdf3f, (q31_t)0x4ad7c2da, (q31_t)0x9829329e,\n    (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4acd90bb, (q31_t)0x9821da1d,\n    (q31_t)0x4ac87767, (q31_t)0x981e2e3c, (q31_t)0x4ac35de4, (q31_t)0x981a829c,\n    (q31_t)0x4abe4433, (q31_t)0x9816d73b, (q31_t)0x4ab92a54, (q31_t)0x98132c1b,\n    (q31_t)0x4ab41046, (q31_t)0x980f813b, (q31_t)0x4aaef60b, (q31_t)0x980bd69b,\n    (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4aa4c10b, (q31_t)0x9804821b,\n    (q31_t)0x4a9fa645, (q31_t)0x9800d83c, (q31_t)0x4a9a8b52, (q31_t)0x97fd2e9c,\n    (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a9054e1, (q31_t)0x97f5dc1e,\n    (q31_t)0x4a8b3963, (q31_t)0x97f2333f, (q31_t)0x4a861db8, (q31_t)0x97ee8aa0,\n    (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a7be5d7, (q31_t)0x97e73a23,\n    (q31_t)0x4a76c9a2, (q31_t)0x97e39245, (q31_t)0x4a71ad3e, (q31_t)0x97dfeaa7,\n    (q31_t)0x4a6c90ad, (q31_t)0x97dc4349, (q31_t)0x4a6773ee, (q31_t)0x97d89c2c,\n    (q31_t)0x4a625701, (q31_t)0x97d4f54f, (q31_t)0x4a5d39e6, (q31_t)0x97d14eb2,\n    (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a52ff27, (q31_t)0x97ca0239,\n    (q31_t)0x4a4de182, (q31_t)0x97c65c5c, (q31_t)0x4a48c3b0, (q31_t)0x97c2b6c1,\n    (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a3e8782, (q31_t)0x97bb6c4a,\n    (q31_t)0x4a396926, (q31_t)0x97b7c76f, (q31_t)0x4a344a9d, (q31_t)0x97b422d4,\n    (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a2a0d01, (q31_t)0x97acda60,\n    (q31_t)0x4a24edee, (q31_t)0x97a93687, (q31_t)0x4a1fcead, (q31_t)0x97a592ed,\n    (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94, (q31_t)0x4a158fa3, (q31_t)0x979e4c7c,\n    (q31_t)0x4a106fda, (q31_t)0x979aa9a4, (q31_t)0x4a0b4fe2, (q31_t)0x9797070c,\n    (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x4a010f6b, (q31_t)0x978fc29e,\n    (q31_t)0x49fbeeea, (q31_t)0x978c20c8, (q31_t)0x49f6ce3c, (q31_t)0x97887f32,\n    (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49ec8c57, (q31_t)0x97813cc7,\n    (q31_t)0x49e76b21, (q31_t)0x977d9bf2, (q31_t)0x49e249bc, (q31_t)0x9779fb5e,\n    (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49d8066b, (q31_t)0x9772baf7,\n    (q31_t)0x49d2e47e, (q31_t)0x976f1b24, (q31_t)0x49cdc263, (q31_t)0x976b7b92,\n    (q31_t)0x49c8a01b, (q31_t)0x9767dc41, (q31_t)0x49c37da5, (q31_t)0x97643d2f,\n    (q31_t)0x49be5b02, (q31_t)0x97609e5f, (q31_t)0x49b93832, (q31_t)0x975cffcf,\n    (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x49aef208, (q31_t)0x9755c370,\n    (q31_t)0x49a9ceaf, (q31_t)0x975225a1, (q31_t)0x49a4ab28, (q31_t)0x974e8813,\n    (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x499a6393, (q31_t)0x97474db9,\n    (q31_t)0x49953f84, (q31_t)0x9743b0ed, (q31_t)0x49901b48, (q31_t)0x97401462,\n    (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x4985d248, (q31_t)0x9738dc0d,\n    (q31_t)0x4980ad84, (q31_t)0x97354043, (q31_t)0x497b8892, (q31_t)0x9731a4ba,\n    (q31_t)0x49766373, (q31_t)0x972e0971, (q31_t)0x49713e27, (q31_t)0x972a6e6a,\n    (q31_t)0x496c18ae, (q31_t)0x9726d3a3, (q31_t)0x4966f307, (q31_t)0x9723391c,\n    (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x495ca732, (q31_t)0x971c04d2,\n    (q31_t)0x49578103, (q31_t)0x97186b0d, (q31_t)0x49525aa7, (q31_t)0x9714d18a,\n    (q31_t)0x494d341e, (q31_t)0x97113847, (q31_t)0x49480d68, (q31_t)0x970d9f45,\n    (q31_t)0x4942e684, (q31_t)0x970a0683, (q31_t)0x493dbf74, (q31_t)0x97066e03,\n    (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x493370cb, (q31_t)0x96ff3dc4,\n    (q31_t)0x492e4933, (q31_t)0x96fba605, (q31_t)0x4929216e, (q31_t)0x96f80e88,\n    (q31_t)0x4923f97b, (q31_t)0x96f4774b, (q31_t)0x491ed15c, (q31_t)0x96f0e04f,\n    (q31_t)0x4919a90f, (q31_t)0x96ed4994, (q31_t)0x49148095, (q31_t)0x96e9b319,\n    (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x490a2f1b, (q31_t)0x96e286e7,\n    (q31_t)0x4905061a, (q31_t)0x96def12f, (q31_t)0x48ffdcec, (q31_t)0x96db5bb8,\n    (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48f58a09, (q31_t)0x96d4318d,\n    (q31_t)0x48f06054, (q31_t)0x96d09cd8, (q31_t)0x48eb3672, (q31_t)0x96cd0865,\n    (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48e0e227, (q31_t)0x96c5e040,\n    (q31_t)0x48dbb7be, (q31_t)0x96c24c8f, (q31_t)0x48d68d28, (q31_t)0x96beb91f,\n    (q31_t)0x48d16265, (q31_t)0x96bb25f0, (q31_t)0x48cc3775, (q31_t)0x96b79302,\n    (q31_t)0x48c70c59, (q31_t)0x96b40055, (q31_t)0x48c1e10f, (q31_t)0x96b06de9,\n    (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48b789f5, (q31_t)0x96a949d3,\n    (q31_t)0x48b25e25, (q31_t)0x96a5b82a, (q31_t)0x48ad3228, (q31_t)0x96a226c2,\n    (q31_t)0x48a805ff, (q31_t)0x969e959b, (q31_t)0x48a2d9a8, (q31_t)0x969b04b4,\n    (q31_t)0x489dad25, (q31_t)0x9697740f, (q31_t)0x48988074, (q31_t)0x9693e3ab,\n    (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x488e268e, (q31_t)0x968cc3a5,\n    (q31_t)0x4888f957, (q31_t)0x96893404, (q31_t)0x4883cbf4, (q31_t)0x9685a4a4,\n    (q31_t)0x487e9e64, (q31_t)0x96821585, (q31_t)0x487970a7, (q31_t)0x967e86a7,\n    (q31_t)0x487442be, (q31_t)0x967af80a, (q31_t)0x486f14a8, (q31_t)0x967769af,\n    (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4864b7f5, (q31_t)0x96704dba,\n    (q31_t)0x485f8959, (q31_t)0x966cc022, (q31_t)0x485a5a90, (q31_t)0x966932cb,\n    (q31_t)0x48552b9b, (q31_t)0x9665a5b4, (q31_t)0x484ffc79, (q31_t)0x966218df,\n    (q31_t)0x484acd2a, (q31_t)0x965e8c4b, (q31_t)0x48459daf, (q31_t)0x965afff9,\n    (q31_t)0x48406e08, (q31_t)0x965773e7, (q31_t)0x483b3e33, (q31_t)0x9653e817,\n    (q31_t)0x48360e32, (q31_t)0x96505c88, (q31_t)0x4830de05, (q31_t)0x964cd139,\n    (q31_t)0x482badab, (q31_t)0x9649462d, (q31_t)0x48267d24, (q31_t)0x9645bb61,\n    (q31_t)0x48214c71, (q31_t)0x964230d7, (q31_t)0x481c1b92, (q31_t)0x963ea68d,\n    (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x4811b94d, (q31_t)0x963792bf,\n    (q31_t)0x480c87e8, (q31_t)0x96340939, (q31_t)0x48075657, (q31_t)0x96307ff5,\n    (q31_t)0x48022499, (q31_t)0x962cf6f2, (q31_t)0x47fcf2af, (q31_t)0x96296e31,\n    (q31_t)0x47f7c099, (q31_t)0x9625e5b0, (q31_t)0x47f28e56, (q31_t)0x96225d71,\n    (q31_t)0x47ed5be6, (q31_t)0x961ed574, (q31_t)0x47e8294a, (q31_t)0x961b4db7,\n    (q31_t)0x47e2f682, (q31_t)0x9617c63c, (q31_t)0x47ddc38e, (q31_t)0x96143f02,\n    (q31_t)0x47d8906d, (q31_t)0x9610b80a, (q31_t)0x47d35d20, (q31_t)0x960d3153,\n    (q31_t)0x47ce29a7, (q31_t)0x9609aadd, (q31_t)0x47c8f601, (q31_t)0x960624a9,\n    (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47be8e31, (q31_t)0x95ff1904,\n    (q31_t)0x47b95a06, (q31_t)0x95fb9394, (q31_t)0x47b425af, (q31_t)0x95f80e65,\n    (q31_t)0x47aef12c, (q31_t)0x95f48977, (q31_t)0x47a9bc7d, (q31_t)0x95f104cb,\n    (q31_t)0x47a487a2, (q31_t)0x95ed8061, (q31_t)0x479f529a, (q31_t)0x95e9fc38,\n    (q31_t)0x479a1d67, (q31_t)0x95e67850, (q31_t)0x4794e807, (q31_t)0x95e2f4a9,\n    (q31_t)0x478fb27b, (q31_t)0x95df7145, (q31_t)0x478a7cc2, (q31_t)0x95dbee21,\n    (q31_t)0x478546de, (q31_t)0x95d86b3f, (q31_t)0x478010cd, (q31_t)0x95d4e89f,\n    (q31_t)0x477ada91, (q31_t)0x95d16640, (q31_t)0x4775a428, (q31_t)0x95cde423,\n    (q31_t)0x47706d93, (q31_t)0x95ca6247, (q31_t)0x476b36d3, (q31_t)0x95c6e0ac,\n    (q31_t)0x4765ffe6, (q31_t)0x95c35f53, (q31_t)0x4760c8cd, (q31_t)0x95bfde3c,\n    (q31_t)0x475b9188, (q31_t)0x95bc5d66, (q31_t)0x47565a17, (q31_t)0x95b8dcd2,\n    (q31_t)0x4751227a, (q31_t)0x95b55c7f, (q31_t)0x474beab1, (q31_t)0x95b1dc6e,\n    (q31_t)0x4746b2bc, (q31_t)0x95ae5c9f, (q31_t)0x47417a9b, (q31_t)0x95aadd11,\n    (q31_t)0x473c424e, (q31_t)0x95a75dc4, (q31_t)0x473709d5, (q31_t)0x95a3deb9,\n    (q31_t)0x4731d131, (q31_t)0x95a05ff0, (q31_t)0x472c9860, (q31_t)0x959ce169,\n    (q31_t)0x47275f63, (q31_t)0x95996323, (q31_t)0x4722263b, (q31_t)0x9595e51e,\n    (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x4717b367, (q31_t)0x958ee9db,\n    (q31_t)0x471279ba, (q31_t)0x958b6c9b, (q31_t)0x470d3fe3, (q31_t)0x9587ef9e,\n    (q31_t)0x470805df, (q31_t)0x958472e2, (q31_t)0x4702cbaf, (q31_t)0x9580f667,\n    (q31_t)0x46fd9154, (q31_t)0x957d7a2f, (q31_t)0x46f856cd, (q31_t)0x9579fe38,\n    (q31_t)0x46f31c1a, (q31_t)0x95768283, (q31_t)0x46ede13b, (q31_t)0x9573070f,\n    (q31_t)0x46e8a631, (q31_t)0x956f8bdd, (q31_t)0x46e36afb, (q31_t)0x956c10ed,\n    (q31_t)0x46de2f99, (q31_t)0x9568963f, (q31_t)0x46d8f40b, (q31_t)0x95651bd2,\n    (q31_t)0x46d3b852, (q31_t)0x9561a1a8, (q31_t)0x46ce7c6d, (q31_t)0x955e27bf,\n    (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46c40420, (q31_t)0x955734b2,\n    (q31_t)0x46bec7b8, (q31_t)0x9553bb8e, (q31_t)0x46b98b24, (q31_t)0x955042ac,\n    (q31_t)0x46b44e65, (q31_t)0x954cca0c, (q31_t)0x46af117a, (q31_t)0x954951ae,\n    (q31_t)0x46a9d464, (q31_t)0x9545d992, (q31_t)0x46a49722, (q31_t)0x954261b7,\n    (q31_t)0x469f59b4, (q31_t)0x953eea1e, (q31_t)0x469a1c1b, (q31_t)0x953b72c7,\n    (q31_t)0x4694de56, (q31_t)0x9537fbb2, (q31_t)0x468fa066, (q31_t)0x953484df,\n    (q31_t)0x468a624a, (q31_t)0x95310e4e, (q31_t)0x46852403, (q31_t)0x952d97fe,\n    (q31_t)0x467fe590, (q31_t)0x952a21f1, (q31_t)0x467aa6f2, (q31_t)0x9526ac25,\n    (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x46702933, (q31_t)0x951fc154,\n    (q31_t)0x466aea12, (q31_t)0x951c4c4e, (q31_t)0x4665aac6, (q31_t)0x9518d78a,\n    (q31_t)0x46606b4e, (q31_t)0x95156308, (q31_t)0x465b2bab, (q31_t)0x9511eec8,\n    (q31_t)0x4655ebdd, (q31_t)0x950e7aca, (q31_t)0x4650abe3, (q31_t)0x950b070e,\n    (q31_t)0x464b6bbe, (q31_t)0x95079394, (q31_t)0x46462b6d, (q31_t)0x9504205c,\n    (q31_t)0x4640eaf2, (q31_t)0x9500ad66, (q31_t)0x463baa4a, (q31_t)0x94fd3ab1,\n    (q31_t)0x46366978, (q31_t)0x94f9c83f, (q31_t)0x4631287a, (q31_t)0x94f6560f,\n    (q31_t)0x462be751, (q31_t)0x94f2e421, (q31_t)0x4626a5fd, (q31_t)0x94ef7275,\n    (q31_t)0x4621647d, (q31_t)0x94ec010b, (q31_t)0x461c22d2, (q31_t)0x94e88fe3,\n    (q31_t)0x4616e0fc, (q31_t)0x94e51efd, (q31_t)0x46119efa, (q31_t)0x94e1ae59,\n    (q31_t)0x460c5cce, (q31_t)0x94de3df8, (q31_t)0x46071a76, (q31_t)0x94dacdd8,\n    (q31_t)0x4601d7f3, (q31_t)0x94d75dfa, (q31_t)0x45fc9545, (q31_t)0x94d3ee5f,\n    (q31_t)0x45f7526b, (q31_t)0x94d07f05, (q31_t)0x45f20f67, (q31_t)0x94cd0fee,\n    (q31_t)0x45eccc37, (q31_t)0x94c9a119, (q31_t)0x45e788dc, (q31_t)0x94c63286,\n    (q31_t)0x45e24556, (q31_t)0x94c2c435, (q31_t)0x45dd01a5, (q31_t)0x94bf5627,\n    (q31_t)0x45d7bdc9, (q31_t)0x94bbe85a, (q31_t)0x45d279c2, (q31_t)0x94b87ad0,\n    (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x45c7f132, (q31_t)0x94b1a081,\n    (q31_t)0x45c2acaa, (q31_t)0x94ae33be, (q31_t)0x45bd67f6, (q31_t)0x94aac73c,\n    (q31_t)0x45b82318, (q31_t)0x94a75afd, (q31_t)0x45b2de0e, (q31_t)0x94a3eeff,\n    (q31_t)0x45ad98da, (q31_t)0x94a08344, (q31_t)0x45a8537a, (q31_t)0x949d17cc,\n    (q31_t)0x45a30df0, (q31_t)0x9499ac95, (q31_t)0x459dc83b, (q31_t)0x949641a1,\n    (q31_t)0x4598825a, (q31_t)0x9492d6ef, (q31_t)0x45933c4f, (q31_t)0x948f6c7f,\n    (q31_t)0x458df619, (q31_t)0x948c0252, (q31_t)0x4588afb8, (q31_t)0x94889867,\n    (q31_t)0x4583692c, (q31_t)0x94852ebe, (q31_t)0x457e2275, (q31_t)0x9481c557,\n    (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x45739487, (q31_t)0x947af351,\n    (q31_t)0x456e4d4f, (q31_t)0x94778ab1, (q31_t)0x456905ed, (q31_t)0x94742254,\n    (q31_t)0x4563be60, (q31_t)0x9470ba39, (q31_t)0x455e76a8, (q31_t)0x946d5260,\n    (q31_t)0x45592ec6, (q31_t)0x9469eaca, (q31_t)0x4553e6b8, (q31_t)0x94668376,\n    (q31_t)0x454e9e80, (q31_t)0x94631c65, (q31_t)0x4549561d, (q31_t)0x945fb596,\n    (q31_t)0x45440d90, (q31_t)0x945c4f09, (q31_t)0x453ec4d7, (q31_t)0x9458e8bf,\n    (q31_t)0x45397bf4, (q31_t)0x945582b7, (q31_t)0x453432e6, (q31_t)0x94521cf1,\n    (q31_t)0x452ee9ae, (q31_t)0x944eb76e, (q31_t)0x4529a04b, (q31_t)0x944b522d,\n    (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x451f0d04, (q31_t)0x94448873,\n    (q31_t)0x4519c321, (q31_t)0x944123fa, (q31_t)0x45147913, (q31_t)0x943dbfc3,\n    (q31_t)0x450f2edb, (q31_t)0x943a5bcf, (q31_t)0x4509e478, (q31_t)0x9436f81d,\n    (q31_t)0x450499eb, (q31_t)0x943394ad, (q31_t)0x44ff4f32, (q31_t)0x94303180,\n    (q31_t)0x44fa0450, (q31_t)0x942cce96, (q31_t)0x44f4b943, (q31_t)0x94296bee,\n    (q31_t)0x44ef6e0b, (q31_t)0x94260989, (q31_t)0x44ea22a9, (q31_t)0x9422a766,\n    (q31_t)0x44e4d71c, (q31_t)0x941f4585, (q31_t)0x44df8b64, (q31_t)0x941be3e8,\n    (q31_t)0x44da3f83, (q31_t)0x9418828c, (q31_t)0x44d4f376, (q31_t)0x94152174,\n    (q31_t)0x44cfa740, (q31_t)0x9411c09e, (q31_t)0x44ca5adf, (q31_t)0x940e600a,\n    (q31_t)0x44c50e53, (q31_t)0x940affb9, (q31_t)0x44bfc19d, (q31_t)0x94079fab,\n    (q31_t)0x44ba74bd, (q31_t)0x94043fdf, (q31_t)0x44b527b2, (q31_t)0x9400e056,\n    (q31_t)0x44afda7d, (q31_t)0x93fd810f, (q31_t)0x44aa8d1d, (q31_t)0x93fa220b,\n    (q31_t)0x44a53f93, (q31_t)0x93f6c34a, (q31_t)0x449ff1df, (q31_t)0x93f364cb,\n    (q31_t)0x449aa400, (q31_t)0x93f0068f, (q31_t)0x449555f7, (q31_t)0x93eca896,\n    (q31_t)0x449007c4, (q31_t)0x93e94adf, (q31_t)0x448ab967, (q31_t)0x93e5ed6b,\n    (q31_t)0x44856adf, (q31_t)0x93e2903a, (q31_t)0x44801c2d, (q31_t)0x93df334c,\n    (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x44757e4a, (q31_t)0x93d87a36,\n    (q31_t)0x44702f19, (q31_t)0x93d51e10, (q31_t)0x446adfbe, (q31_t)0x93d1c22c,\n    (q31_t)0x44659039, (q31_t)0x93ce668b, (q31_t)0x44604089, (q31_t)0x93cb0b2d,\n    (q31_t)0x445af0b0, (q31_t)0x93c7b011, (q31_t)0x4455a0ac, (q31_t)0x93c45539,\n    (q31_t)0x4450507e, (q31_t)0x93c0faa3, (q31_t)0x444b0026, (q31_t)0x93bda04f,\n    (q31_t)0x4445afa4, (q31_t)0x93ba463f, (q31_t)0x44405ef8, (q31_t)0x93b6ec71,\n    (q31_t)0x443b0e21, (q31_t)0x93b392e6, (q31_t)0x4435bd21, (q31_t)0x93b0399e,\n    (q31_t)0x44306bf6, (q31_t)0x93ace099, (q31_t)0x442b1aa2, (q31_t)0x93a987d6,\n    (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x4420777b, (q31_t)0x93a2d71a,\n    (q31_t)0x441b25a8, (q31_t)0x939f7f20, (q31_t)0x4415d3ab, (q31_t)0x939c2769,\n    (q31_t)0x44108184, (q31_t)0x9398cff5, (q31_t)0x440b2f34, (q31_t)0x939578c3,\n    (q31_t)0x4405dcb9, (q31_t)0x939221d5, (q31_t)0x44008a14, (q31_t)0x938ecb29,\n    (q31_t)0x43fb3746, (q31_t)0x938b74c1, (q31_t)0x43f5e44d, (q31_t)0x93881e9b,\n    (q31_t)0x43f0912b, (q31_t)0x9384c8b8, (q31_t)0x43eb3ddf, (q31_t)0x93817318,\n    (q31_t)0x43e5ea68, (q31_t)0x937e1dbb, (q31_t)0x43e096c8, (q31_t)0x937ac8a1,\n    (q31_t)0x43db42fe, (q31_t)0x937773ca, (q31_t)0x43d5ef0a, (q31_t)0x93741f35,\n    (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x43cb46a5, (q31_t)0x936d76d6,\n    (q31_t)0x43c5f234, (q31_t)0x936a230a, (q31_t)0x43c09d99, (q31_t)0x9366cf82,\n    (q31_t)0x43bb48d4, (q31_t)0x93637c3d, (q31_t)0x43b5f3e5, (q31_t)0x9360293a,\n    (q31_t)0x43b09ecc, (q31_t)0x935cd67b, (q31_t)0x43ab498a, (q31_t)0x935983ff,\n    (q31_t)0x43a5f41e, (q31_t)0x935631c5, (q31_t)0x43a09e89, (q31_t)0x9352dfcf,\n    (q31_t)0x439b48c9, (q31_t)0x934f8e1c, (q31_t)0x4395f2e0, (q31_t)0x934c3cab,\n    (q31_t)0x43909ccd, (q31_t)0x9348eb7e, (q31_t)0x438b4691, (q31_t)0x93459a94,\n    (q31_t)0x4385f02a, (q31_t)0x934249ed, (q31_t)0x4380999b, (q31_t)0x933ef989,\n    (q31_t)0x437b42e1, (q31_t)0x933ba968, (q31_t)0x4375ebfe, (q31_t)0x9338598a,\n    (q31_t)0x437094f1, (q31_t)0x933509f0, (q31_t)0x436b3dbb, (q31_t)0x9331ba98,\n    (q31_t)0x4365e65b, (q31_t)0x932e6b84, (q31_t)0x43608ed2, (q31_t)0x932b1cb2,\n    (q31_t)0x435b371f, (q31_t)0x9327ce24, (q31_t)0x4355df42, (q31_t)0x93247fd9,\n    (q31_t)0x4350873c, (q31_t)0x932131d1, (q31_t)0x434b2f0c, (q31_t)0x931de40c,\n    (q31_t)0x4345d6b3, (q31_t)0x931a968b, (q31_t)0x43407e31, (q31_t)0x9317494c,\n    (q31_t)0x433b2585, (q31_t)0x9313fc51, (q31_t)0x4335ccaf, (q31_t)0x9310af99,\n    (q31_t)0x433073b0, (q31_t)0x930d6324, (q31_t)0x432b1a87, (q31_t)0x930a16f3,\n    (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x432067ba, (q31_t)0x93037f59,\n    (q31_t)0x431b0e15, (q31_t)0x930033f1, (q31_t)0x4315b447, (q31_t)0x92fce8cc,\n    (q31_t)0x43105a50, (q31_t)0x92f99deb, (q31_t)0x430b002f, (q31_t)0x92f6534c,\n    (q31_t)0x4305a5e5, (q31_t)0x92f308f1, (q31_t)0x43004b71, (q31_t)0x92efbeda,\n    (q31_t)0x42faf0d4, (q31_t)0x92ec7505, (q31_t)0x42f5960e, (q31_t)0x92e92b74,\n    (q31_t)0x42f03b1e, (q31_t)0x92e5e226, (q31_t)0x42eae005, (q31_t)0x92e2991c,\n    (q31_t)0x42e584c3, (q31_t)0x92df5054, (q31_t)0x42e02958, (q31_t)0x92dc07d0,\n    (q31_t)0x42dacdc3, (q31_t)0x92d8bf90, (q31_t)0x42d57205, (q31_t)0x92d57792,\n    (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x42caba0e, (q31_t)0x92cee862,\n    (q31_t)0x42c55dd4, (q31_t)0x92cba12f, (q31_t)0x42c00172, (q31_t)0x92c85a3f,\n    (q31_t)0x42baa4e6, (q31_t)0x92c51392, (q31_t)0x42b54831, (q31_t)0x92c1cd29,\n    (q31_t)0x42afeb53, (q31_t)0x92be8703, (q31_t)0x42aa8e4b, (q31_t)0x92bb4121,\n    (q31_t)0x42a5311b, (q31_t)0x92b7fb82, (q31_t)0x429fd3c1, (q31_t)0x92b4b626,\n    (q31_t)0x429a763f, (q31_t)0x92b1710e, (q31_t)0x42951893, (q31_t)0x92ae2c3a,\n    (q31_t)0x428fbabe, (q31_t)0x92aae7a8, (q31_t)0x428a5cc0, (q31_t)0x92a7a35a,\n    (q31_t)0x4284fe99, (q31_t)0x92a45f50, (q31_t)0x427fa049, (q31_t)0x92a11b89,\n    (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x4274e32e, (q31_t)0x929a94c6,\n    (q31_t)0x426f8463, (q31_t)0x929751c9, (q31_t)0x426a256f, (q31_t)0x92940f10,\n    (q31_t)0x4264c653, (q31_t)0x9290cc9b, (q31_t)0x425f670d, (q31_t)0x928d8a69,\n    (q31_t)0x425a079e, (q31_t)0x928a487a, (q31_t)0x4254a806, (q31_t)0x928706cf,\n    (q31_t)0x424f4845, (q31_t)0x9283c568, (q31_t)0x4249e85c, (q31_t)0x92808444,\n    (q31_t)0x42448849, (q31_t)0x927d4363, (q31_t)0x423f280e, (q31_t)0x927a02c7,\n    (q31_t)0x4239c7aa, (q31_t)0x9276c26d, (q31_t)0x4234671d, (q31_t)0x92738258,\n    (q31_t)0x422f0667, (q31_t)0x92704286, (q31_t)0x4229a588, (q31_t)0x926d02f7,\n    (q31_t)0x42244481, (q31_t)0x9269c3ac, (q31_t)0x421ee350, (q31_t)0x926684a5,\n    (q31_t)0x421981f7, (q31_t)0x926345e1, (q31_t)0x42142075, (q31_t)0x92600761,\n    (q31_t)0x420ebecb, (q31_t)0x925cc924, (q31_t)0x42095cf7, (q31_t)0x92598b2b,\n    (q31_t)0x4203fafb, (q31_t)0x92564d76, (q31_t)0x41fe98d6, (q31_t)0x92531005,\n    (q31_t)0x41f93689, (q31_t)0x924fd2d7, (q31_t)0x41f3d413, (q31_t)0x924c95ec,\n    (q31_t)0x41ee7174, (q31_t)0x92495946, (q31_t)0x41e90eac, (q31_t)0x92461ce3,\n    (q31_t)0x41e3abbc, (q31_t)0x9242e0c4, (q31_t)0x41de48a3, (q31_t)0x923fa4e8,\n    (q31_t)0x41d8e561, (q31_t)0x923c6950, (q31_t)0x41d381f7, (q31_t)0x92392dfc,\n    (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x41c8baa9, (q31_t)0x9232b81f,\n    (q31_t)0x41c356c5, (q31_t)0x922f7d96, (q31_t)0x41bdf2b9, (q31_t)0x922c4351,\n    (q31_t)0x41b88e84, (q31_t)0x9229094f, (q31_t)0x41b32a26, (q31_t)0x9225cf91,\n    (q31_t)0x41adc5a0, (q31_t)0x92229617, (q31_t)0x41a860f1, (q31_t)0x921f5ce1,\n    (q31_t)0x41a2fc1a, (q31_t)0x921c23ef, (q31_t)0x419d971b, (q31_t)0x9218eb40,\n    (q31_t)0x419831f3, (q31_t)0x9215b2d5, (q31_t)0x4192cca2, (q31_t)0x92127aae,\n    (q31_t)0x418d6729, (q31_t)0x920f42cb, (q31_t)0x41880188, (q31_t)0x920c0b2c,\n    (q31_t)0x41829bbe, (q31_t)0x9208d3d0, (q31_t)0x417d35cb, (q31_t)0x92059cb8,\n    (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x4172696e, (q31_t)0x91ff2f54,\n    (q31_t)0x416d0302, (q31_t)0x91fbf908, (q31_t)0x41679c6f, (q31_t)0x91f8c300,\n    (q31_t)0x416235b2, (q31_t)0x91f58d3b, (q31_t)0x415ccece, (q31_t)0x91f257bb,\n    (q31_t)0x415767c1, (q31_t)0x91ef227e, (q31_t)0x4152008c, (q31_t)0x91ebed85,\n    (q31_t)0x414c992f, (q31_t)0x91e8b8d0, (q31_t)0x414731a9, (q31_t)0x91e5845f,\n    (q31_t)0x4141c9fb, (q31_t)0x91e25032, (q31_t)0x413c6225, (q31_t)0x91df1c49,\n    (q31_t)0x4136fa27, (q31_t)0x91dbe8a4, (q31_t)0x41319200, (q31_t)0x91d8b542,\n    (q31_t)0x412c29b1, (q31_t)0x91d58225, (q31_t)0x4126c13a, (q31_t)0x91d24f4c,\n    (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x411befd3, (q31_t)0x91cbea65,\n    (q31_t)0x411686e4, (q31_t)0x91c8b857, (q31_t)0x41111dcc, (q31_t)0x91c5868e,\n    (q31_t)0x410bb48c, (q31_t)0x91c25508, (q31_t)0x41064b24, (q31_t)0x91bf23c7,\n    (q31_t)0x4100e194, (q31_t)0x91bbf2c9, (q31_t)0x40fb77dc, (q31_t)0x91b8c210,\n    (q31_t)0x40f60dfb, (q31_t)0x91b5919a, (q31_t)0x40f0a3f3, (q31_t)0x91b26169,\n    (q31_t)0x40eb39c3, (q31_t)0x91af317c, (q31_t)0x40e5cf6a, (q31_t)0x91ac01d2,\n    (q31_t)0x40e064ea, (q31_t)0x91a8d26d, (q31_t)0x40dafa41, (q31_t)0x91a5a34c,\n    (q31_t)0x40d58f71, (q31_t)0x91a2746f, (q31_t)0x40d02478, (q31_t)0x919f45d6,\n    (q31_t)0x40cab958, (q31_t)0x919c1781, (q31_t)0x40c54e0f, (q31_t)0x9198e970,\n    (q31_t)0x40bfe29f, (q31_t)0x9195bba3, (q31_t)0x40ba7706, (q31_t)0x91928e1a,\n    (q31_t)0x40b50b46, (q31_t)0x918f60d6, (q31_t)0x40af9f5e, (q31_t)0x918c33d5,\n    (q31_t)0x40aa334e, (q31_t)0x91890719, (q31_t)0x40a4c716, (q31_t)0x9185daa1,\n    (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4099ee2e, (q31_t)0x917f827d,\n    (q31_t)0x4094817f, (q31_t)0x917c56d1, (q31_t)0x408f14a7, (q31_t)0x91792b6a,\n    (q31_t)0x4089a7a8, (q31_t)0x91760047, (q31_t)0x40843a81, (q31_t)0x9172d567,\n    (q31_t)0x407ecd32, (q31_t)0x916faacc, (q31_t)0x40795fbc, (q31_t)0x916c8076,\n    (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x406e8457, (q31_t)0x91662c95,\n    (q31_t)0x40691669, (q31_t)0x9163030b, (q31_t)0x4063a854, (q31_t)0x915fd9c5,\n    (q31_t)0x405e3a16, (q31_t)0x915cb0c3, (q31_t)0x4058cbb1, (q31_t)0x91598806,\n    (q31_t)0x40535d24, (q31_t)0x91565f8d, (q31_t)0x404dee70, (q31_t)0x91533758,\n    (q31_t)0x40487f94, (q31_t)0x91500f67, (q31_t)0x40431090, (q31_t)0x914ce7bb,\n    (q31_t)0x403da165, (q31_t)0x9149c053, (q31_t)0x40383212, (q31_t)0x9146992f,\n    (q31_t)0x4032c297, (q31_t)0x91437250, (q31_t)0x402d52f5, (q31_t)0x91404bb5,\n    (q31_t)0x4027e32b, (q31_t)0x913d255e, (q31_t)0x4022733a, (q31_t)0x9139ff4b,\n    (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x401792e0, (q31_t)0x9133b3f3,\n    (q31_t)0x40122278, (q31_t)0x91308eae, (q31_t)0x400cb1e9, (q31_t)0x912d69ad,\n    (q31_t)0x40074132, (q31_t)0x912a44f0, (q31_t)0x4001d053, (q31_t)0x91272078,\n    (q31_t)0x3ffc5f4d, (q31_t)0x9123fc44, (q31_t)0x3ff6ee1f, (q31_t)0x9120d854,\n    (q31_t)0x3ff17cca, (q31_t)0x911db4a9, (q31_t)0x3fec0b4e, (q31_t)0x911a9142,\n    (q31_t)0x3fe699aa, (q31_t)0x91176e1f, (q31_t)0x3fe127df, (q31_t)0x91144b41,\n    (q31_t)0x3fdbb5ec, (q31_t)0x911128a8, (q31_t)0x3fd643d2, (q31_t)0x910e0653,\n    (q31_t)0x3fd0d191, (q31_t)0x910ae442, (q31_t)0x3fcb5f28, (q31_t)0x9107c276,\n    (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3fc079e0, (q31_t)0x91017faa,\n    (q31_t)0x3fbb0702, (q31_t)0x90fe5eab, (q31_t)0x3fb593fb, (q31_t)0x90fb3df1,\n    (q31_t)0x3fb020ce, (q31_t)0x90f81d7b, (q31_t)0x3faaad79, (q31_t)0x90f4fd4a,\n    (q31_t)0x3fa539fd, (q31_t)0x90f1dd5d, (q31_t)0x3f9fc65a, (q31_t)0x90eebdb4,\n    (q31_t)0x3f9a5290, (q31_t)0x90eb9e50, (q31_t)0x3f94de9e, (q31_t)0x90e87f31,\n    (q31_t)0x3f8f6a85, (q31_t)0x90e56056, (q31_t)0x3f89f645, (q31_t)0x90e241bf,\n    (q31_t)0x3f8481dd, (q31_t)0x90df236e, (q31_t)0x3f7f0d4f, (q31_t)0x90dc0560,\n    (q31_t)0x3f799899, (q31_t)0x90d8e798, (q31_t)0x3f7423bc, (q31_t)0x90d5ca13,\n    (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4, (q31_t)0x3f69398d, (q31_t)0x90cf8fd9,\n    (q31_t)0x3f63c43b, (q31_t)0x90cc7322, (q31_t)0x3f5e4ec2, (q31_t)0x90c956b1,\n    (q31_t)0x3f58d921, (q31_t)0x90c63a83, (q31_t)0x3f53635a, (q31_t)0x90c31e9b,\n    (q31_t)0x3f4ded6b, (q31_t)0x90c002f7, (q31_t)0x3f487755, (q31_t)0x90bce797,\n    (q31_t)0x3f430119, (q31_t)0x90b9cc7d, (q31_t)0x3f3d8ab5, (q31_t)0x90b6b1a6,\n    (q31_t)0x3f38142a, (q31_t)0x90b39715, (q31_t)0x3f329d79, (q31_t)0x90b07cc8,\n    (q31_t)0x3f2d26a0, (q31_t)0x90ad62c0, (q31_t)0x3f27afa1, (q31_t)0x90aa48fd,\n    (q31_t)0x3f22387a, (q31_t)0x90a72f7e, (q31_t)0x3f1cc12c, (q31_t)0x90a41644,\n    (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3f11d21d, (q31_t)0x909de49e,\n    (q31_t)0x3f0c5a5a, (q31_t)0x909acc32, (q31_t)0x3f06e271, (q31_t)0x9097b40a,\n    (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3efbf22a, (q31_t)0x9091848a,\n    (q31_t)0x3ef679cc, (q31_t)0x908e6d31, (q31_t)0x3ef10148, (q31_t)0x908b561c,\n    (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ee60fca, (q31_t)0x908528c2,\n    (q31_t)0x3ee096d1, (q31_t)0x9082127c, (q31_t)0x3edb1db1, (q31_t)0x907efc7a,\n    (q31_t)0x3ed5a46b, (q31_t)0x907be6be, (q31_t)0x3ed02afd, (q31_t)0x9078d146,\n    (q31_t)0x3ecab169, (q31_t)0x9075bc13, (q31_t)0x3ec537ae, (q31_t)0x9072a725,\n    (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3eba43c4, (q31_t)0x906c7e17,\n    (q31_t)0x3eb4c995, (q31_t)0x906969f8, (q31_t)0x3eaf4f40, (q31_t)0x9066561d,\n    (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3ea45a21, (q31_t)0x90602f35,\n    (q31_t)0x3e9edf57, (q31_t)0x905d1c29, (q31_t)0x3e996467, (q31_t)0x905a0962,\n    (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e8e6e12, (q31_t)0x9053e4a1,\n    (q31_t)0x3e88f2ae, (q31_t)0x9050d2a9, (q31_t)0x3e837724, (q31_t)0x904dc0f5,\n    (q31_t)0x3e7dfb73, (q31_t)0x904aaf86, (q31_t)0x3e787f9b, (q31_t)0x90479e5c,\n    (q31_t)0x3e73039d, (q31_t)0x90448d76, (q31_t)0x3e6d8778, (q31_t)0x90417cd6,\n    (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e628ebb, (q31_t)0x903b5c64,\n    (q31_t)0x3e5d1222, (q31_t)0x90384c93, (q31_t)0x3e579564, (q31_t)0x90353d06,\n    (q31_t)0x3e52187f, (q31_t)0x90322dbf, (q31_t)0x3e4c9b73, (q31_t)0x902f1ebc,\n    (q31_t)0x3e471e41, (q31_t)0x902c0fff, (q31_t)0x3e41a0e8, (q31_t)0x90290186,\n    (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e36a5c4, (q31_t)0x9022e564,\n    (q31_t)0x3e3127f9, (q31_t)0x901fd7ba, (q31_t)0x3e2baa07, (q31_t)0x901cca55,\n    (q31_t)0x3e262bee, (q31_t)0x9019bd36, (q31_t)0x3e20adaf, (q31_t)0x9016b05b,\n    (q31_t)0x3e1b2f4a, (q31_t)0x9013a3c5, (q31_t)0x3e15b0bf, (q31_t)0x90109775,\n    (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3e0ab336, (q31_t)0x900a7fa3,\n    (q31_t)0x3e053437, (q31_t)0x90077422, (q31_t)0x3dffb513, (q31_t)0x900468e5,\n    (q31_t)0x3dfa35c8, (q31_t)0x90015dee, (q31_t)0x3df4b657, (q31_t)0x8ffe533c,\n    (q31_t)0x3def36c0, (q31_t)0x8ffb48cf, (q31_t)0x3de9b703, (q31_t)0x8ff83ea7,\n    (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3ddeb716, (q31_t)0x8ff22b26,\n    (q31_t)0x3dd936e6, (q31_t)0x8fef21ce, (q31_t)0x3dd3b690, (q31_t)0x8fec18ba,\n    (q31_t)0x3dce3614, (q31_t)0x8fe90fec, (q31_t)0x3dc8b571, (q31_t)0x8fe60763,\n    (q31_t)0x3dc334a9, (q31_t)0x8fe2ff1f, (q31_t)0x3dbdb3ba, (q31_t)0x8fdff720,\n    (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3db2b16b, (q31_t)0x8fd9e7f2,\n    (q31_t)0x3dad300b, (q31_t)0x8fd6e0c2, (q31_t)0x3da7ae84, (q31_t)0x8fd3d9d8,\n    (q31_t)0x3da22cd7, (q31_t)0x8fd0d333, (q31_t)0x3d9cab04, (q31_t)0x8fcdccd3,\n    (q31_t)0x3d97290b, (q31_t)0x8fcac6b9, (q31_t)0x3d91a6ed, (q31_t)0x8fc7c0e3,\n    (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d86a23d, (q31_t)0x8fc1b608,\n    (q31_t)0x3d811fac, (q31_t)0x8fbeb103, (q31_t)0x3d7b9cf6, (q31_t)0x8fbbac42,\n    (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7, (q31_t)0x3d709717, (q31_t)0x8fb5a391,\n    (q31_t)0x3d6b13ee, (q31_t)0x8fb29fa0, (q31_t)0x3d6590a0, (q31_t)0x8faf9bf5,\n    (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d5a8992, (q31_t)0x8fa9956e,\n    (q31_t)0x3d5505d2, (q31_t)0x8fa69293, (q31_t)0x3d4f81ec, (q31_t)0x8fa38ffc,\n    (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d4479b0, (q31_t)0x8f9d8ba0,\n    (q31_t)0x3d3ef559, (q31_t)0x8f9a89da, (q31_t)0x3d3970dc, (q31_t)0x8f978859,\n    (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d2e6771, (q31_t)0x8f918627,\n    (q31_t)0x3d28e282, (q31_t)0x8f8e8576, (q31_t)0x3d235d6f, (q31_t)0x8f8b850a,\n    (q31_t)0x3d1dd835, (q31_t)0x8f8884e4, (q31_t)0x3d1852d6, (q31_t)0x8f858503,\n    (q31_t)0x3d12cd51, (q31_t)0x8f828568, (q31_t)0x3d0d47a6, (q31_t)0x8f7f8612,\n    (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3d023be0, (q31_t)0x8f798836,\n    (q31_t)0x3cfcb5c4, (q31_t)0x8f7689b0, (q31_t)0x3cf72f83, (q31_t)0x8f738b70,\n    (q31_t)0x3cf1a91c, (q31_t)0x8f708d75, (q31_t)0x3cec2290, (q31_t)0x8f6d8fbf,\n    (q31_t)0x3ce69bde, (q31_t)0x8f6a924f, (q31_t)0x3ce11507, (q31_t)0x8f679525,\n    (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cd606e7, (q31_t)0x8f619ba0,\n    (q31_t)0x3cd07f9f, (q31_t)0x8f5e9f46, (q31_t)0x3ccaf831, (q31_t)0x8f5ba331,\n    (q31_t)0x3cc5709e, (q31_t)0x8f58a761, (q31_t)0x3cbfe8e5, (q31_t)0x8f55abd8,\n    (q31_t)0x3cba6107, (q31_t)0x8f52b093, (q31_t)0x3cb4d904, (q31_t)0x8f4fb595,\n    (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3ca9c88c, (q31_t)0x8f49c067,\n    (q31_t)0x3ca44018, (q31_t)0x8f46c639, (q31_t)0x3c9eb77f, (q31_t)0x8f43cc50,\n    (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c93a5dc, (q31_t)0x8f3dd950,\n    (q31_t)0x3c8e1cd3, (q31_t)0x8f3ae038, (q31_t)0x3c8893a4, (q31_t)0x8f37e765,\n    (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c7d80d6, (q31_t)0x8f31f691,\n    (q31_t)0x3c77f737, (q31_t)0x8f2efe8f, (q31_t)0x3c726d73, (q31_t)0x8f2c06d3,\n    (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c, (q31_t)0x3c67597b, (q31_t)0x8f26182b,\n    (q31_t)0x3c61cf48, (q31_t)0x8f232140, (q31_t)0x3c5c44ee, (q31_t)0x8f202a9a,\n    (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c512fcc, (q31_t)0x8f1a3e1f,\n    (q31_t)0x3c4ba504, (q31_t)0x8f17484b, (q31_t)0x3c461a16, (q31_t)0x8f1452bb,\n    (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c3b03ca, (q31_t)0x8f0e686e,\n    (q31_t)0x3c35786d, (q31_t)0x8f0b73b0, (q31_t)0x3c2fecea, (q31_t)0x8f087f37,\n    (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c24d575, (q31_t)0x8f029717,\n    (q31_t)0x3c1f4983, (q31_t)0x8effa370, (q31_t)0x3c19bd6c, (q31_t)0x8efcb00e,\n    (q31_t)0x3c143130, (q31_t)0x8ef9bcf2, (q31_t)0x3c0ea4cf, (q31_t)0x8ef6ca1c,\n    (q31_t)0x3c091849, (q31_t)0x8ef3d78b, (q31_t)0x3c038b9e, (q31_t)0x8ef0e540,\n    (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3bf871d8, (q31_t)0x8eeb017c,\n    (q31_t)0x3bf2e4be, (q31_t)0x8ee81002, (q31_t)0x3bed577e, (q31_t)0x8ee51ece,\n    (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3be23c91, (q31_t)0x8edf3d38,\n    (q31_t)0x3bdcaee3, (q31_t)0x8edc4cd5, (q31_t)0x3bd72110, (q31_t)0x8ed95cb8,\n    (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bcc04fb, (q31_t)0x8ed37d50,\n    (q31_t)0x3bc676b9, (q31_t)0x8ed08e05, (q31_t)0x3bc0e853, (q31_t)0x8ecd9eff,\n    (q31_t)0x3bbb59c7, (q31_t)0x8ecab040, (q31_t)0x3bb5cb17, (q31_t)0x8ec7c1c6,\n    (q31_t)0x3bb03c42, (q31_t)0x8ec4d392, (q31_t)0x3baaad48, (q31_t)0x8ec1e5a4,\n    (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b9f8ee5, (q31_t)0x8ebc0a99,\n    (q31_t)0x3b99ff7d, (q31_t)0x8eb91d7c, (q31_t)0x3b946ff0, (q31_t)0x8eb630a6,\n    (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b895068, (q31_t)0x8eb057ca,\n    (q31_t)0x3b83c06c, (q31_t)0x8ead6bc5, (q31_t)0x3b7e304c, (q31_t)0x8eaa8006,\n    (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b730f9e, (q31_t)0x8ea4a959,\n    (q31_t)0x3b6d7f10, (q31_t)0x8ea1be6c, (q31_t)0x3b67ee5d, (q31_t)0x8e9ed3c4,\n    (q31_t)0x3b625d86, (q31_t)0x8e9be963, (q31_t)0x3b5ccc8a, (q31_t)0x8e98ff47,\n    (q31_t)0x3b573b69, (q31_t)0x8e961571, (q31_t)0x3b51aa24, (q31_t)0x8e932be2,\n    (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b46872c, (q31_t)0x8e8d5994,\n    (q31_t)0x3b40f579, (q31_t)0x8e8a70d7, (q31_t)0x3b3b63a1, (q31_t)0x8e87885f,\n    (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b303f84, (q31_t)0x8e81b841,\n    (q31_t)0x3b2aad3f, (q31_t)0x8e7ed09b, (q31_t)0x3b251ad6, (q31_t)0x8e7be93c,\n    (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b19f595, (q31_t)0x8e761b4e,\n    (q31_t)0x3b1462be, (q31_t)0x8e7334c1, (q31_t)0x3b0ecfc3, (q31_t)0x8e704e79,\n    (q31_t)0x3b093ca3, (q31_t)0x8e6d6877, (q31_t)0x3b03a95e, (q31_t)0x8e6a82bc,\n    (q31_t)0x3afe15f6, (q31_t)0x8e679d47, (q31_t)0x3af88269, (q31_t)0x8e64b817,\n    (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3aed5ae1, (q31_t)0x8e5eee8b,\n    (q31_t)0x3ae7c6e7, (q31_t)0x8e5c0a2e, (q31_t)0x3ae232c9, (q31_t)0x8e592617,\n    (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ad70a1f, (q31_t)0x8e535ebb,\n    (q31_t)0x3ad17593, (q31_t)0x8e507b76, (q31_t)0x3acbe0e3, (q31_t)0x8e4d9878,\n    (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3ac0b717, (q31_t)0x8e47d34d,\n    (q31_t)0x3abb21fb, (q31_t)0x8e44f121, (q31_t)0x3ab58cba, (q31_t)0x8e420f3b,\n    (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b, (q31_t)0x3aaa61cc, (q31_t)0x8e3c4c41,\n    (q31_t)0x3aa4cc1e, (q31_t)0x8e396b2e, (q31_t)0x3a9f364d, (q31_t)0x8e368a61,\n    (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a940a3e, (q31_t)0x8e30c999,\n    (q31_t)0x3a8e7400, (q31_t)0x8e2de99e, (q31_t)0x3a88dd9d, (q31_t)0x8e2b09e9,\n    (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a7db06d, (q31_t)0x8e254b53,\n    (q31_t)0x3a78199f, (q31_t)0x8e226c71, (q31_t)0x3a7282ac, (q31_t)0x8e1f8dd6,\n    (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a67545b, (q31_t)0x8e19d171,\n    (q31_t)0x3a61bcfd, (q31_t)0x8e16f3a9, (q31_t)0x3a5c257a, (q31_t)0x8e141626,\n    (q31_t)0x3a568dd4, (q31_t)0x8e1138ea, (q31_t)0x3a50f609, (q31_t)0x8e0e5bf4,\n    (q31_t)0x3a4b5e1b, (q31_t)0x8e0b7f44, (q31_t)0x3a45c608, (q31_t)0x8e08a2db,\n    (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a3a9577, (q31_t)0x8e02eadb,\n    (q31_t)0x3a34fcf9, (q31_t)0x8e000f44, (q31_t)0x3a2f6457, (q31_t)0x8dfd33f4,\n    (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a2432a7, (q31_t)0x8df77e27,\n    (q31_t)0x3a1e9999, (q31_t)0x8df4a3a9, (q31_t)0x3a190068, (q31_t)0x8df1c973,\n    (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x3a0dcd99, (q31_t)0x8dec15d8,\n    (q31_t)0x3a0833fc, (q31_t)0x8de93c74, (q31_t)0x3a029a3b, (q31_t)0x8de66357,\n    (q31_t)0x39fd0056, (q31_t)0x8de38a80, (q31_t)0x39f7664e, (q31_t)0x8de0b1ef,\n    (q31_t)0x39f1cc21, (q31_t)0x8dddd9a5, (q31_t)0x39ec31d1, (q31_t)0x8ddb01a1,\n    (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39e0fcc6, (q31_t)0x8dd5526d,\n    (q31_t)0x39db620b, (q31_t)0x8dd27b3c, (q31_t)0x39d5c72c, (q31_t)0x8dcfa452,\n    (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39ca9104, (q31_t)0x8dc9f751,\n    (q31_t)0x39c4f5ba, (q31_t)0x8dc7213b, (q31_t)0x39bf5a4d, (q31_t)0x8dc44b6a,\n    (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39b42307, (q31_t)0x8dbea09d,\n    (q31_t)0x39ae872f, (q31_t)0x8dbbcba0, (q31_t)0x39a8eb33, (q31_t)0x8db8f6ea,\n    (q31_t)0x39a34f13, (q31_t)0x8db6227a, (q31_t)0x399db2d0, (q31_t)0x8db34e50,\n    (q31_t)0x3998166a, (q31_t)0x8db07a6d, (q31_t)0x399279e0, (q31_t)0x8dada6d1,\n    (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39874061, (q31_t)0x8da8006c,\n    (q31_t)0x3981a36d, (q31_t)0x8da52da3, (q31_t)0x397c0655, (q31_t)0x8da25b21,\n    (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x3970cbba, (q31_t)0x8d9cb6f0,\n    (q31_t)0x396b2e38, (q31_t)0x8d99e541, (q31_t)0x39659092, (q31_t)0x8d9713d9,\n    (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x395a54dd, (q31_t)0x8d9171dd,\n    (q31_t)0x3954b6cd, (q31_t)0x8d8ea148, (q31_t)0x394f1899, (q31_t)0x8d8bd0fb,\n    (q31_t)0x39497a43, (q31_t)0x8d8900f3, (q31_t)0x3943dbc9, (q31_t)0x8d863133,\n    (q31_t)0x393e3d2c, (q31_t)0x8d8361b9, (q31_t)0x39389e6b, (q31_t)0x8d809286,\n    (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x392d6080, (q31_t)0x8d7af4f3,\n    (q31_t)0x3927c155, (q31_t)0x8d782694, (q31_t)0x39222208, (q31_t)0x8d75587b,\n    (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x3916e303, (q31_t)0x8d6fbd1d,\n    (q31_t)0x3911434b, (q31_t)0x8d6cefd9, (q31_t)0x390ba371, (q31_t)0x8d6a22db,\n    (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x39006352, (q31_t)0x8d6489b3,\n    (q31_t)0x38fac30e, (q31_t)0x8d61bd89, (q31_t)0x38f522a6, (q31_t)0x8d5ef1a5,\n    (q31_t)0x38ef821c, (q31_t)0x8d5c2609, (q31_t)0x38e9e16e, (q31_t)0x8d595ab3,\n    (q31_t)0x38e4409e, (q31_t)0x8d568fa4, (q31_t)0x38de9faa, (q31_t)0x8d53c4db,\n    (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38d35d59, (q31_t)0x8d4e301f,\n    (q31_t)0x38cdbbfc, (q31_t)0x8d4b662a, (q31_t)0x38c81a7c, (q31_t)0x8d489c7d,\n    (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38bcd713, (q31_t)0x8d4309f6,\n    (q31_t)0x38b7352a, (q31_t)0x8d40411d, (q31_t)0x38b1931e, (q31_t)0x8d3d788b,\n    (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x38a64e9d, (q31_t)0x8d37e83a,\n    (q31_t)0x38a0ac29, (q31_t)0x8d35207d, (q31_t)0x389b0991, (q31_t)0x8d325905,\n    (q31_t)0x389566d6, (q31_t)0x8d2f91d5, (q31_t)0x388fc3f8, (q31_t)0x8d2ccaec,\n    (q31_t)0x388a20f8, (q31_t)0x8d2a0449, (q31_t)0x38847dd5, (q31_t)0x8d273ded,\n    (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38793725, (q31_t)0x8d21b20a,\n    (q31_t)0x38739399, (q31_t)0x8d1eec83, (q31_t)0x386defeb, (q31_t)0x8d1c2742,\n    (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3862a825, (q31_t)0x8d169d96,\n    (q31_t)0x385d040d, (q31_t)0x8d13d92a, (q31_t)0x38575fd4, (q31_t)0x8d111505,\n    (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x384c16f7, (q31_t)0x8d0b8d90,\n    (q31_t)0x38467255, (q31_t)0x8d08ca40, (q31_t)0x3840cd90, (q31_t)0x8d060737,\n    (q31_t)0x383b28a9, (q31_t)0x8d034474, (q31_t)0x3835839f, (q31_t)0x8d0081f9,\n    (q31_t)0x382fde72, (q31_t)0x8cfdbfc4, (q31_t)0x382a3922, (q31_t)0x8cfafdd7,\n    (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x381eee1b, (q31_t)0x8cf57ad0,\n    (q31_t)0x38194864, (q31_t)0x8cf2b9b8, (q31_t)0x3813a28a, (q31_t)0x8ceff8e6,\n    (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x3808566e, (q31_t)0x8cea7818,\n    (q31_t)0x3802b02c, (q31_t)0x8ce7b81b, (q31_t)0x37fd09c8, (q31_t)0x8ce4f865,\n    (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37f1bc97, (q31_t)0x8cdf79ce,\n    (q31_t)0x37ec15cb, (q31_t)0x8cdcbaee, (q31_t)0x37e66edd, (q31_t)0x8cd9fc54,\n    (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01, (q31_t)0x37db2099, (q31_t)0x8cd47ff6,\n    (q31_t)0x37d57943, (q31_t)0x8cd1c231, (q31_t)0x37cfd1cb, (q31_t)0x8ccf04b3,\n    (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37c48273, (q31_t)0x8cc98a8e,\n    (q31_t)0x37beda93, (q31_t)0x8cc6cde5, (q31_t)0x37b93292, (q31_t)0x8cc41184,\n    (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x37ade227, (q31_t)0x8cbe9996,\n    (q31_t)0x37a839be, (q31_t)0x8cbbde0a, (q31_t)0x37a29132, (q31_t)0x8cb922c6,\n    (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37973fb5, (q31_t)0x8cb3ad11,\n    (q31_t)0x379196c3, (q31_t)0x8cb0f2a1, (q31_t)0x378bedae, (q31_t)0x8cae3879,\n    (q31_t)0x37864477, (q31_t)0x8cab7e98, (q31_t)0x37809b1e, (q31_t)0x8ca8c4fd,\n    (q31_t)0x377af1a3, (q31_t)0x8ca60baa, (q31_t)0x37754806, (q31_t)0x8ca3529f,\n    (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3769f464, (q31_t)0x8c9de15c,\n    (q31_t)0x37644a60, (q31_t)0x8c9b2926, (q31_t)0x375ea03a, (q31_t)0x8c987137,\n    (q31_t)0x3758f5f2, (q31_t)0x8c95b98f, (q31_t)0x37534b87, (q31_t)0x8c93022e,\n    (q31_t)0x374da0fa, (q31_t)0x8c904b14, (q31_t)0x3747f64c, (q31_t)0x8c8d9442,\n    (q31_t)0x37424b7b, (q31_t)0x8c8addb7, (q31_t)0x373ca088, (q31_t)0x8c882773,\n    (q31_t)0x3736f573, (q31_t)0x8c857176, (q31_t)0x37314a3c, (q31_t)0x8c82bbc0,\n    (q31_t)0x372b9ee3, (q31_t)0x8c800652, (q31_t)0x3725f367, (q31_t)0x8c7d512b,\n    (q31_t)0x372047ca, (q31_t)0x8c7a9c4b, (q31_t)0x371a9c0b, (q31_t)0x8c77e7b3,\n    (q31_t)0x3714f02a, (q31_t)0x8c753362, (q31_t)0x370f4427, (q31_t)0x8c727f58,\n    (q31_t)0x37099802, (q31_t)0x8c6fcb95, (q31_t)0x3703ebbb, (q31_t)0x8c6d181a,\n    (q31_t)0x36fe3f52, (q31_t)0x8c6a64e5, (q31_t)0x36f892c7, (q31_t)0x8c67b1f9,\n    (q31_t)0x36f2e61a, (q31_t)0x8c64ff53, (q31_t)0x36ed394b, (q31_t)0x8c624cf5,\n    (q31_t)0x36e78c5b, (q31_t)0x8c5f9ade, (q31_t)0x36e1df48, (q31_t)0x8c5ce90e,\n    (q31_t)0x36dc3214, (q31_t)0x8c5a3786, (q31_t)0x36d684be, (q31_t)0x8c578645,\n    (q31_t)0x36d0d746, (q31_t)0x8c54d54c, (q31_t)0x36cb29ac, (q31_t)0x8c522499,\n    (q31_t)0x36c57bf0, (q31_t)0x8c4f742f, (q31_t)0x36bfce13, (q31_t)0x8c4cc40b,\n    (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x36b471f3, (q31_t)0x8c47649a,\n    (q31_t)0x36aec3b0, (q31_t)0x8c44b54d, (q31_t)0x36a9154c, (q31_t)0x8c420647,\n    (q31_t)0x36a366c6, (q31_t)0x8c3f5788, (q31_t)0x369db81e, (q31_t)0x8c3ca911,\n    (q31_t)0x36980954, (q31_t)0x8c39fae1, (q31_t)0x36925a69, (q31_t)0x8c374cf9,\n    (q31_t)0x368cab5c, (q31_t)0x8c349f58, (q31_t)0x3686fc2e, (q31_t)0x8c31f1ff,\n    (q31_t)0x36814cde, (q31_t)0x8c2f44ed, (q31_t)0x367b9d6c, (q31_t)0x8c2c9822,\n    (q31_t)0x3675edd9, (q31_t)0x8c29eb9f, (q31_t)0x36703e24, (q31_t)0x8c273f63,\n    (q31_t)0x366a8e4d, (q31_t)0x8c24936f, (q31_t)0x3664de55, (q31_t)0x8c21e7c2,\n    (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36597e00, (q31_t)0x8c1c913f,\n    (q31_t)0x3653cda3, (q31_t)0x8c19e669, (q31_t)0x364e1d25, (q31_t)0x8c173bda,\n    (q31_t)0x36486c86, (q31_t)0x8c149192, (q31_t)0x3642bbc4, (q31_t)0x8c11e792,\n    (q31_t)0x363d0ae2, (q31_t)0x8c0f3dda, (q31_t)0x363759de, (q31_t)0x8c0c9469,\n    (q31_t)0x3631a8b8, (q31_t)0x8c09eb40, (q31_t)0x362bf771, (q31_t)0x8c07425e,\n    (q31_t)0x36264609, (q31_t)0x8c0499c4, (q31_t)0x3620947f, (q31_t)0x8c01f171,\n    (q31_t)0x361ae2d3, (q31_t)0x8bff4966, (q31_t)0x36153107, (q31_t)0x8bfca1a3,\n    (q31_t)0x360f7f19, (q31_t)0x8bf9fa27, (q31_t)0x3609cd0a, (q31_t)0x8bf752f2,\n    (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35fe6887, (q31_t)0x8bf20560,\n    (q31_t)0x35f8b614, (q31_t)0x8bef5f02, (q31_t)0x35f3037f, (q31_t)0x8becb8ec,\n    (q31_t)0x35ed50c9, (q31_t)0x8bea131e, (q31_t)0x35e79df2, (q31_t)0x8be76d97,\n    (q31_t)0x35e1eafa, (q31_t)0x8be4c857, (q31_t)0x35dc37e0, (q31_t)0x8be22360,\n    (q31_t)0x35d684a6, (q31_t)0x8bdf7eb0, (q31_t)0x35d0d14a, (q31_t)0x8bdcda47,\n    (q31_t)0x35cb1dcc, (q31_t)0x8bda3626, (q31_t)0x35c56a2e, (q31_t)0x8bd7924d,\n    (q31_t)0x35bfb66e, (q31_t)0x8bd4eebc, (q31_t)0x35ba028e, (q31_t)0x8bd24b72,\n    (q31_t)0x35b44e8c, (q31_t)0x8bcfa870, (q31_t)0x35ae9a69, (q31_t)0x8bcd05b5,\n    (q31_t)0x35a8e625, (q31_t)0x8bca6343, (q31_t)0x35a331c0, (q31_t)0x8bc7c117,\n    (q31_t)0x359d7d39, (q31_t)0x8bc51f34, (q31_t)0x3597c892, (q31_t)0x8bc27d98,\n    (q31_t)0x359213c9, (q31_t)0x8bbfdc44, (q31_t)0x358c5ee0, (q31_t)0x8bbd3b38,\n    (q31_t)0x3586a9d5, (q31_t)0x8bba9a73, (q31_t)0x3580f4aa, (q31_t)0x8bb7f9f6,\n    (q31_t)0x357b3f5d, (q31_t)0x8bb559c1, (q31_t)0x357589f0, (q31_t)0x8bb2b9d4,\n    (q31_t)0x356fd461, (q31_t)0x8bb01a2e, (q31_t)0x356a1eb2, (q31_t)0x8bad7ad0,\n    (q31_t)0x356468e2, (q31_t)0x8baadbba, (q31_t)0x355eb2f0, (q31_t)0x8ba83cec,\n    (q31_t)0x3558fcde, (q31_t)0x8ba59e65, (q31_t)0x355346ab, (q31_t)0x8ba30026,\n    (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x3547d9e2, (q31_t)0x8b9dc480,\n    (q31_t)0x3542234c, (q31_t)0x8b9b2718, (q31_t)0x353c6c95, (q31_t)0x8b9889f8,\n    (q31_t)0x3536b5be, (q31_t)0x8b95ed21, (q31_t)0x3530fec6, (q31_t)0x8b935090,\n    (q31_t)0x352b47ad, (q31_t)0x8b90b448, (q31_t)0x35259073, (q31_t)0x8b8e1848,\n    (q31_t)0x351fd918, (q31_t)0x8b8b7c8f, (q31_t)0x351a219c, (q31_t)0x8b88e11e,\n    (q31_t)0x35146a00, (q31_t)0x8b8645f5, (q31_t)0x350eb243, (q31_t)0x8b83ab14,\n    (q31_t)0x3508fa66, (q31_t)0x8b81107b, (q31_t)0x35034267, (q31_t)0x8b7e7629,\n    (q31_t)0x34fd8a48, (q31_t)0x8b7bdc20, (q31_t)0x34f7d208, (q31_t)0x8b79425e,\n    (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34ec6127, (q31_t)0x8b740fb3,\n    (q31_t)0x34e6a885, (q31_t)0x8b7176c8, (q31_t)0x34e0efc2, (q31_t)0x8b6ede26,\n    (q31_t)0x34db36df, (q31_t)0x8b6c45cc, (q31_t)0x34d57ddc, (q31_t)0x8b69adba,\n    (q31_t)0x34cfc4b7, (q31_t)0x8b6715ef, (q31_t)0x34ca0b73, (q31_t)0x8b647e6d,\n    (q31_t)0x34c4520d, (q31_t)0x8b61e733, (q31_t)0x34be9887, (q31_t)0x8b5f5040,\n    (q31_t)0x34b8dee1, (q31_t)0x8b5cb995, (q31_t)0x34b3251a, (q31_t)0x8b5a2333,\n    (q31_t)0x34ad6b32, (q31_t)0x8b578d18, (q31_t)0x34a7b12a, (q31_t)0x8b54f745,\n    (q31_t)0x34a1f702, (q31_t)0x8b5261ba, (q31_t)0x349c3cb9, (q31_t)0x8b4fcc77,\n    (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x3490c7c6, (q31_t)0x8b4aa2ca,\n    (q31_t)0x348b0d1c, (q31_t)0x8b480e5f, (q31_t)0x34855251, (q31_t)0x8b457a3c,\n    (q31_t)0x347f9766, (q31_t)0x8b42e661, (q31_t)0x3479dc5b, (q31_t)0x8b4052ce,\n    (q31_t)0x3474212f, (q31_t)0x8b3dbf83, (q31_t)0x346e65e3, (q31_t)0x8b3b2c80,\n    (q31_t)0x3468aa76, (q31_t)0x8b3899c6, (q31_t)0x3462eee9, (q31_t)0x8b360753,\n    (q31_t)0x345d333c, (q31_t)0x8b337528, (q31_t)0x3457776f, (q31_t)0x8b30e345,\n    (q31_t)0x3451bb81, (q31_t)0x8b2e51ab, (q31_t)0x344bff73, (q31_t)0x8b2bc058,\n    (q31_t)0x34464345, (q31_t)0x8b292f4e, (q31_t)0x344086f6, (q31_t)0x8b269e8b,\n    (q31_t)0x343aca87, (q31_t)0x8b240e11, (q31_t)0x34350df8, (q31_t)0x8b217ddf,\n    (q31_t)0x342f5149, (q31_t)0x8b1eedf4, (q31_t)0x3429947a, (q31_t)0x8b1c5e52,\n    (q31_t)0x3423d78a, (q31_t)0x8b19cef8, (q31_t)0x341e1a7b, (q31_t)0x8b173fe6,\n    (q31_t)0x34185d4b, (q31_t)0x8b14b11d, (q31_t)0x34129ffb, (q31_t)0x8b12229b,\n    (q31_t)0x340ce28b, (q31_t)0x8b0f9462, (q31_t)0x340724fb, (q31_t)0x8b0d0670,\n    (q31_t)0x3401674a, (q31_t)0x8b0a78c7, (q31_t)0x33fba97a, (q31_t)0x8b07eb66,\n    (q31_t)0x33f5eb89, (q31_t)0x8b055e4d, (q31_t)0x33f02d79, (q31_t)0x8b02d17c,\n    (q31_t)0x33ea6f48, (q31_t)0x8b0044f3, (q31_t)0x33e4b0f8, (q31_t)0x8afdb8b3,\n    (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x33d933f7, (q31_t)0x8af8a10b,\n    (q31_t)0x33d37546, (q31_t)0x8af615a3, (q31_t)0x33cdb676, (q31_t)0x8af38a83,\n    (q31_t)0x33c7f785, (q31_t)0x8af0ffac, (q31_t)0x33c23875, (q31_t)0x8aee751c,\n    (q31_t)0x33bc7944, (q31_t)0x8aebead5, (q31_t)0x33b6b9f4, (q31_t)0x8ae960d6,\n    (q31_t)0x33b0fa84, (q31_t)0x8ae6d720, (q31_t)0x33ab3af4, (q31_t)0x8ae44db1,\n    (q31_t)0x33a57b44, (q31_t)0x8ae1c48b, (q31_t)0x339fbb74, (q31_t)0x8adf3bad,\n    (q31_t)0x3399fb85, (q31_t)0x8adcb318, (q31_t)0x33943b75, (q31_t)0x8ada2aca,\n    (q31_t)0x338e7b46, (q31_t)0x8ad7a2c5, (q31_t)0x3388baf7, (q31_t)0x8ad51b08,\n    (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x337d39f9, (q31_t)0x8ad00c67,\n    (q31_t)0x3377794b, (q31_t)0x8acd8583, (q31_t)0x3371b87d, (q31_t)0x8acafee8,\n    (q31_t)0x336bf78f, (q31_t)0x8ac87894, (q31_t)0x33663682, (q31_t)0x8ac5f289,\n    (q31_t)0x33607554, (q31_t)0x8ac36cc6, (q31_t)0x335ab407, (q31_t)0x8ac0e74c,\n    (q31_t)0x3354f29b, (q31_t)0x8abe6219, (q31_t)0x334f310e, (q31_t)0x8abbdd30,\n    (q31_t)0x33496f62, (q31_t)0x8ab9588e, (q31_t)0x3343ad97, (q31_t)0x8ab6d435,\n    (q31_t)0x333debab, (q31_t)0x8ab45024, (q31_t)0x333829a1, (q31_t)0x8ab1cc5c,\n    (q31_t)0x33326776, (q31_t)0x8aaf48db, (q31_t)0x332ca52c, (q31_t)0x8aacc5a4,\n    (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x33212039, (q31_t)0x8aa7c00d,\n    (q31_t)0x331b5d91, (q31_t)0x8aa53daf, (q31_t)0x33159ac8, (q31_t)0x8aa2bb99,\n    (q31_t)0x330fd7e1, (q31_t)0x8aa039cb, (q31_t)0x330a14da, (q31_t)0x8a9db845,\n    (q31_t)0x330451b3, (q31_t)0x8a9b3708, (q31_t)0x32fe8e6d, (q31_t)0x8a98b614,\n    (q31_t)0x32f8cb07, (q31_t)0x8a963567, (q31_t)0x32f30782, (q31_t)0x8a93b504,\n    (q31_t)0x32ed43de, (q31_t)0x8a9134e8, (q31_t)0x32e7801a, (q31_t)0x8a8eb516,\n    (q31_t)0x32e1bc36, (q31_t)0x8a8c358b, (q31_t)0x32dbf834, (q31_t)0x8a89b649,\n    (q31_t)0x32d63412, (q31_t)0x8a873750, (q31_t)0x32d06fd0, (q31_t)0x8a84b89e,\n    (q31_t)0x32caab6f, (q31_t)0x8a823a36, (q31_t)0x32c4e6ef, (q31_t)0x8a7fbc16,\n    (q31_t)0x32bf2250, (q31_t)0x8a7d3e3e, (q31_t)0x32b95d91, (q31_t)0x8a7ac0af,\n    (q31_t)0x32b398b3, (q31_t)0x8a784368, (q31_t)0x32add3b6, (q31_t)0x8a75c66a,\n    (q31_t)0x32a80e99, (q31_t)0x8a7349b4, (q31_t)0x32a2495d, (q31_t)0x8a70cd47,\n    (q31_t)0x329c8402, (q31_t)0x8a6e5123, (q31_t)0x3296be88, (q31_t)0x8a6bd547,\n    (q31_t)0x3290f8ef, (q31_t)0x8a6959b3, (q31_t)0x328b3336, (q31_t)0x8a66de68,\n    (q31_t)0x32856d5e, (q31_t)0x8a646365, (q31_t)0x327fa767, (q31_t)0x8a61e8ab,\n    (q31_t)0x3279e151, (q31_t)0x8a5f6e3a, (q31_t)0x32741b1c, (q31_t)0x8a5cf411,\n    (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x32688e54, (q31_t)0x8a580099,\n    (q31_t)0x3262c7c1, (q31_t)0x8a55874a, (q31_t)0x325d0110, (q31_t)0x8a530e43,\n    (q31_t)0x32573a3f, (q31_t)0x8a509585, (q31_t)0x3251734f, (q31_t)0x8a4e1d10,\n    (q31_t)0x324bac40, (q31_t)0x8a4ba4e3, (q31_t)0x3245e512, (q31_t)0x8a492cff,\n    (q31_t)0x32401dc6, (q31_t)0x8a46b564, (q31_t)0x323a565a, (q31_t)0x8a443e11,\n    (q31_t)0x32348ecf, (q31_t)0x8a41c706, (q31_t)0x322ec725, (q31_t)0x8a3f5045,\n    (q31_t)0x3228ff5c, (q31_t)0x8a3cd9cc, (q31_t)0x32233775, (q31_t)0x8a3a639b,\n    (q31_t)0x321d6f6e, (q31_t)0x8a37edb3, (q31_t)0x3217a748, (q31_t)0x8a357814,\n    (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x320c16a1, (q31_t)0x8a308db0,\n    (q31_t)0x32064e1e, (q31_t)0x8a2e18eb, (q31_t)0x3200857d, (q31_t)0x8a2ba46e,\n    (q31_t)0x31fabcbd, (q31_t)0x8a29303b, (q31_t)0x31f4f3df, (q31_t)0x8a26bc50,\n    (q31_t)0x31ef2ae1, (q31_t)0x8a2448ad, (q31_t)0x31e961c5, (q31_t)0x8a21d554,\n    (q31_t)0x31e39889, (q31_t)0x8a1f6243, (q31_t)0x31ddcf30, (q31_t)0x8a1cef7a,\n    (q31_t)0x31d805b7, (q31_t)0x8a1a7cfb, (q31_t)0x31d23c1f, (q31_t)0x8a180ac4,\n    (q31_t)0x31cc7269, (q31_t)0x8a1598d6, (q31_t)0x31c6a894, (q31_t)0x8a132731,\n    (q31_t)0x31c0dea1, (q31_t)0x8a10b5d4, (q31_t)0x31bb148f, (q31_t)0x8a0e44c0,\n    (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x31af800e, (q31_t)0x8a096373,\n    (q31_t)0x31a9b5a0, (q31_t)0x8a06f339, (q31_t)0x31a3eb13, (q31_t)0x8a048348,\n    (q31_t)0x319e2067, (q31_t)0x8a0213a0, (q31_t)0x3198559d, (q31_t)0x89ffa441,\n    (q31_t)0x31928ab4, (q31_t)0x89fd352b, (q31_t)0x318cbfad, (q31_t)0x89fac65d,\n    (q31_t)0x3186f487, (q31_t)0x89f857d8, (q31_t)0x31812943, (q31_t)0x89f5e99c,\n    (q31_t)0x317b5de0, (q31_t)0x89f37ba9, (q31_t)0x3175925e, (q31_t)0x89f10dff,\n    (q31_t)0x316fc6be, (q31_t)0x89eea09d, (q31_t)0x3169fb00, (q31_t)0x89ec3384,\n    (q31_t)0x31642f23, (q31_t)0x89e9c6b4, (q31_t)0x315e6328, (q31_t)0x89e75a2d,\n    (q31_t)0x3158970e, (q31_t)0x89e4edef, (q31_t)0x3152cad5, (q31_t)0x89e281fa,\n    (q31_t)0x314cfe7f, (q31_t)0x89e0164d, (q31_t)0x31473209, (q31_t)0x89ddaae9,\n    (q31_t)0x31416576, (q31_t)0x89db3fcf, (q31_t)0x313b98c4, (q31_t)0x89d8d4fd,\n    (q31_t)0x3135cbf4, (q31_t)0x89d66a74, (q31_t)0x312fff05, (q31_t)0x89d40033,\n    (q31_t)0x312a31f8, (q31_t)0x89d1963c, (q31_t)0x312464cd, (q31_t)0x89cf2c8e,\n    (q31_t)0x311e9783, (q31_t)0x89ccc328, (q31_t)0x3118ca1b, (q31_t)0x89ca5a0c,\n    (q31_t)0x3112fc95, (q31_t)0x89c7f138, (q31_t)0x310d2ef0, (q31_t)0x89c588ae,\n    (q31_t)0x3107612e, (q31_t)0x89c3206c, (q31_t)0x3101934d, (q31_t)0x89c0b873,\n    (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x30f5f730, (q31_t)0x89bbe95c,\n    (q31_t)0x30f028f4, (q31_t)0x89b9823e, (q31_t)0x30ea5a9a, (q31_t)0x89b71b69,\n    (q31_t)0x30e48c22, (q31_t)0x89b4b4dd, (q31_t)0x30debd8c, (q31_t)0x89b24e9a,\n    (q31_t)0x30d8eed8, (q31_t)0x89afe8a0, (q31_t)0x30d32006, (q31_t)0x89ad82ef,\n    (q31_t)0x30cd5115, (q31_t)0x89ab1d87, (q31_t)0x30c78206, (q31_t)0x89a8b868,\n    (q31_t)0x30c1b2da, (q31_t)0x89a65391, (q31_t)0x30bbe38f, (q31_t)0x89a3ef04,\n    (q31_t)0x30b61426, (q31_t)0x89a18ac0, (q31_t)0x30b0449f, (q31_t)0x899f26c5,\n    (q31_t)0x30aa74fa, (q31_t)0x899cc313, (q31_t)0x30a4a537, (q31_t)0x899a5faa,\n    (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x30990557, (q31_t)0x899599b3,\n    (q31_t)0x3093353a, (q31_t)0x89933725, (q31_t)0x308d64ff, (q31_t)0x8990d4e0,\n    (q31_t)0x308794a6, (q31_t)0x898e72e4, (q31_t)0x3081c42f, (q31_t)0x898c1131,\n    (q31_t)0x307bf39b, (q31_t)0x8989afc8, (q31_t)0x307622e8, (q31_t)0x89874ea7,\n    (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x306a8129, (q31_t)0x89828d41,\n    (q31_t)0x3064b01d, (q31_t)0x89802cfc, (q31_t)0x305edef3, (q31_t)0x897dccff,\n    (q31_t)0x30590dab, (q31_t)0x897b6d4c, (q31_t)0x30533c45, (q31_t)0x89790de2,\n    (q31_t)0x304d6ac1, (q31_t)0x8976aec1, (q31_t)0x30479920, (q31_t)0x89744fe9,\n    (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x303bf584, (q31_t)0x896f9315,\n    (q31_t)0x30362389, (q31_t)0x896d3518, (q31_t)0x30305171, (q31_t)0x896ad765,\n    (q31_t)0x302a7f3a, (q31_t)0x896879fb, (q31_t)0x3024ace6, (q31_t)0x89661cda,\n    (q31_t)0x301eda75, (q31_t)0x8963c002, (q31_t)0x301907e6, (q31_t)0x89616373,\n    (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x300d626e, (q31_t)0x895cab31,\n    (q31_t)0x30078f86, (q31_t)0x895a4f7e, (q31_t)0x3001bc80, (q31_t)0x8957f414,\n    (q31_t)0x2ffbe95d, (q31_t)0x895598f3, (q31_t)0x2ff6161c, (q31_t)0x89533e1c,\n    (q31_t)0x2ff042bd, (q31_t)0x8950e38e, (q31_t)0x2fea6f41, (q31_t)0x894e8948,\n    (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fdec7f0, (q31_t)0x8949d59a,\n    (q31_t)0x2fd8f41b, (q31_t)0x89477c30, (q31_t)0x2fd32028, (q31_t)0x89452310,\n    (q31_t)0x2fcd4c19, (q31_t)0x8942ca39, (q31_t)0x2fc777eb, (q31_t)0x894071ab,\n    (q31_t)0x2fc1a3a0, (q31_t)0x893e1967, (q31_t)0x2fbbcf38, (q31_t)0x893bc16b,\n    (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2fb0260f, (q31_t)0x89371250,\n    (q31_t)0x2faa514f, (q31_t)0x8934bb31, (q31_t)0x2fa47c71, (q31_t)0x8932645b,\n    (q31_t)0x2f9ea775, (q31_t)0x89300dce, (q31_t)0x2f98d25d, (q31_t)0x892db78a,\n    (q31_t)0x2f92fd26, (q31_t)0x892b6190, (q31_t)0x2f8d27d3, (q31_t)0x89290bdf,\n    (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f817cd4, (q31_t)0x89246159,\n    (q31_t)0x2f7ba729, (q31_t)0x89220c84, (q31_t)0x2f75d160, (q31_t)0x891fb7f8,\n    (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5, (q31_t)0x2f6a2577, (q31_t)0x891b0fbc,\n    (q31_t)0x2f644f56, (q31_t)0x8918bc0c, (q31_t)0x2f5e7919, (q31_t)0x891668a6,\n    (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f52cc46, (q31_t)0x8911c2b5,\n    (q31_t)0x2f4cf5b0, (q31_t)0x890f702b, (q31_t)0x2f471efe, (q31_t)0x890d1dea,\n    (q31_t)0x2f41482e, (q31_t)0x890acbf2, (q31_t)0x2f3b7141, (q31_t)0x89087a44,\n    (q31_t)0x2f359a37, (q31_t)0x890628df, (q31_t)0x2f2fc310, (q31_t)0x8903d7c4,\n    (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f24146b, (q31_t)0x88ff3669,\n    (q31_t)0x2f1e3ced, (q31_t)0x88fce62a, (q31_t)0x2f186551, (q31_t)0x88fa9634,\n    (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2f0cb5c3, (q31_t)0x88f5f724,\n    (q31_t)0x2f06ddd1, (q31_t)0x88f3a80b, (q31_t)0x2f0105c1, (q31_t)0x88f1593b,\n    (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ef5554b, (q31_t)0x88ecbc77,\n    (q31_t)0x2eef7ce5, (q31_t)0x88ea6e83, (q31_t)0x2ee9a461, (q31_t)0x88e820d9,\n    (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378, (q31_t)0x2eddf304, (q31_t)0x88e38660,\n    (q31_t)0x2ed81a29, (q31_t)0x88e13992, (q31_t)0x2ed24132, (q31_t)0x88deed0e,\n    (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2ec68eed, (q31_t)0x88da54e1,\n    (q31_t)0x2ec0b5a0, (q31_t)0x88d8093a, (q31_t)0x2ebadc35, (q31_t)0x88d5bddb,\n    (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2eaf290a, (q31_t)0x88d127fb,\n    (q31_t)0x2ea94f49, (q31_t)0x88cedd79, (q31_t)0x2ea3756b, (q31_t)0x88cc9340,\n    (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e97c159, (q31_t)0x88c7ffac,\n    (q31_t)0x2e91e725, (q31_t)0x88c5b650, (q31_t)0x2e8c0cd4, (q31_t)0x88c36d3e,\n    (q31_t)0x2e863267, (q31_t)0x88c12475, (q31_t)0x2e8057dd, (q31_t)0x88bedbf6,\n    (q31_t)0x2e7a7d36, (q31_t)0x88bc93c0, (q31_t)0x2e74a272, (q31_t)0x88ba4bd4,\n    (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e68ec95, (q31_t)0x88b5bcd9,\n    (q31_t)0x2e63117c, (q31_t)0x88b375ca, (q31_t)0x2e5d3646, (q31_t)0x88b12f04,\n    (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e517f84, (q31_t)0x88aca255,\n    (q31_t)0x2e4ba3f8, (q31_t)0x88aa5c6c, (q31_t)0x2e45c850, (q31_t)0x88a816cd,\n    (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e3a10aa, (q31_t)0x88a38c6b,\n    (q31_t)0x2e3434ac, (q31_t)0x88a147a9, (q31_t)0x2e2e5891, (q31_t)0x889f0330,\n    (q31_t)0x2e287c5a, (q31_t)0x889cbf01, (q31_t)0x2e22a007, (q31_t)0x889a7b1b,\n    (q31_t)0x2e1cc397, (q31_t)0x88983780, (q31_t)0x2e16e70b, (q31_t)0x8895f42d,\n    (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2e0b2d9d, (q31_t)0x88916e66,\n    (q31_t)0x2e0550bb, (q31_t)0x888f2bf1, (q31_t)0x2dff73bd, (q31_t)0x888ce9c5,\n    (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2df3b96c, (q31_t)0x8888664b,\n    (q31_t)0x2deddc19, (q31_t)0x888624fd, (q31_t)0x2de7feaa, (q31_t)0x8883e3f8,\n    (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2ddc4376, (q31_t)0x887f62cb,\n    (q31_t)0x2dd665b2, (q31_t)0x887d22a4, (q31_t)0x2dd087d1, (q31_t)0x887ae2c6,\n    (q31_t)0x2dcaa9d5, (q31_t)0x8878a332, (q31_t)0x2dc4cbbc, (q31_t)0x887663e7,\n    (q31_t)0x2dbeed86, (q31_t)0x887424e7, (q31_t)0x2db90f35, (q31_t)0x8871e630,\n    (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2dad523d, (q31_t)0x886d699f,\n    (q31_t)0x2da77397, (q31_t)0x886b2bc5, (q31_t)0x2da194d5, (q31_t)0x8868ee35,\n    (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d95d6fc, (q31_t)0x886473f2,\n    (q31_t)0x2d8ff7e5, (q31_t)0x88623740, (q31_t)0x2d8a18b3, (q31_t)0x885ffad7,\n    (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d7e59f9, (q31_t)0x885b82e3,\n    (q31_t)0x2d787a72, (q31_t)0x88594757, (q31_t)0x2d729acf, (q31_t)0x88570c16,\n    (q31_t)0x2d6cbb10, (q31_t)0x8854d11e, (q31_t)0x2d66db35, (q31_t)0x88529670,\n    (q31_t)0x2d60fb3e, (q31_t)0x88505c0b, (q31_t)0x2d5b1b2b, (q31_t)0x884e21f1,\n    (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d4f5ab1, (q31_t)0x8849ae9a,\n    (q31_t)0x2d497a4a, (q31_t)0x8847755d, (q31_t)0x2d4399c7, (q31_t)0x88453c6a,\n    (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d37d86d, (q31_t)0x8840cb61,\n    (q31_t)0x2d31f797, (q31_t)0x883e934c, (q31_t)0x2d2c16a4, (q31_t)0x883c5b81,\n    (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d20546b, (q31_t)0x8837ecc7,\n    (q31_t)0x2d1a7325, (q31_t)0x8835b5d9, (q31_t)0x2d1491c4, (q31_t)0x88337f35,\n    (q31_t)0x2d0eb046, (q31_t)0x883148db, (q31_t)0x2d08ceac, (q31_t)0x882f12cb,\n    (q31_t)0x2d02ecf7, (q31_t)0x882cdd04, (q31_t)0x2cfd0b26, (q31_t)0x882aa788,\n    (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cf14731, (q31_t)0x88263d6d,\n    (q31_t)0x2ceb650d, (q31_t)0x882408ce, (q31_t)0x2ce582cd, (q31_t)0x8821d47a,\n    (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cd9bdfa, (q31_t)0x881d6cae,\n    (q31_t)0x2cd3db67, (q31_t)0x881b3937, (q31_t)0x2ccdf8b8, (q31_t)0x8819060a,\n    (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cc23308, (q31_t)0x8814a08f,\n    (q31_t)0x2cbc5006, (q31_t)0x88126e40, (q31_t)0x2cb66ce9, (q31_t)0x88103c3b,\n    (q31_t)0x2cb089b1, (q31_t)0x880e0a7f, (q31_t)0x2caaa65c, (q31_t)0x880bd90e,\n    (q31_t)0x2ca4c2ed, (q31_t)0x8809a7e7, (q31_t)0x2c9edf61, (q31_t)0x8807770a,\n    (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c9317f8, (q31_t)0x8803162e,\n    (q31_t)0x2c8d341a, (q31_t)0x8800e62f, (q31_t)0x2c875021, (q31_t)0x87feb67a,\n    (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c7b87dc, (q31_t)0x87fa57ee,\n    (q31_t)0x2c75a390, (q31_t)0x87f82917, (q31_t)0x2c6fbf29, (q31_t)0x87f5fa8b,\n    (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c63f609, (q31_t)0x87f19e4f,\n    (q31_t)0x2c5e114f, (q31_t)0x87ef70a0, (q31_t)0x2c582c7b, (q31_t)0x87ed433c,\n    (q31_t)0x2c52478a, (q31_t)0x87eb1621, (q31_t)0x2c4c627f, (q31_t)0x87e8e950,\n    (q31_t)0x2c467d58, (q31_t)0x87e6bcca, (q31_t)0x2c409816, (q31_t)0x87e4908e,\n    (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c34cd40, (q31_t)0x87e038f3,\n    (q31_t)0x2c2ee7ad, (q31_t)0x87de0d95, (q31_t)0x2c2901fd, (q31_t)0x87dbe281,\n    (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c1d364e, (q31_t)0x87d78d38,\n    (q31_t)0x2c17504d, (q31_t)0x87d56302, (q31_t)0x2c116a31, (q31_t)0x87d33916,\n    (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2c059da7, (q31_t)0x87cee61e,\n    (q31_t)0x2bffb73a, (q31_t)0x87ccbd11, (q31_t)0x2bf9d0b1, (q31_t)0x87ca944e,\n    (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5, (q31_t)0x2bee034e, (q31_t)0x87c643a6,\n    (q31_t)0x2be81c74, (q31_t)0x87c41bc2, (q31_t)0x2be2357f, (q31_t)0x87c1f427,\n    (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bd66744, (q31_t)0x87bda5d1,\n    (q31_t)0x2bd07ffe, (q31_t)0x87bb7f16, (q31_t)0x2bca989d, (q31_t)0x87b958a4,\n    (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bbec989, (q31_t)0x87b50c9f,\n    (q31_t)0x2bb8e1d7, (q31_t)0x87b2e70c, (q31_t)0x2bb2fa0a, (q31_t)0x87b0c1c4,\n    (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2ba72a1e, (q31_t)0x87ac7811,\n    (q31_t)0x2ba14200, (q31_t)0x87aa53a6, (q31_t)0x2b9b59c7, (q31_t)0x87a82f87,\n    (q31_t)0x2b957173, (q31_t)0x87a60bb1, (q31_t)0x2b8f8905, (q31_t)0x87a3e825,\n    (q31_t)0x2b89a07b, (q31_t)0x87a1c4e4, (q31_t)0x2b83b7d7, (q31_t)0x879fa1ed,\n    (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b77e63d, (q31_t)0x879b5cde,\n    (q31_t)0x2b71fd48, (q31_t)0x87993ac6, (q31_t)0x2b6c1438, (q31_t)0x879718f8,\n    (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b6041c9, (q31_t)0x8792d63b,\n    (q31_t)0x2b5a5868, (q31_t)0x8790b54c, (q31_t)0x2b546eee, (q31_t)0x878e94a7,\n    (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b489ba8, (q31_t)0x878a543d,\n    (q31_t)0x2b42b1dd, (q31_t)0x87883477, (q31_t)0x2b3cc7f7, (q31_t)0x878614fb,\n    (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca, (q31_t)0x2b30f3dc, (q31_t)0x8781d6e3,\n    (q31_t)0x2b2b09a6, (q31_t)0x877fb846, (q31_t)0x2b251f56, (q31_t)0x877d99f4,\n    (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b194a66, (q31_t)0x87795e2f,\n    (q31_t)0x2b135fc6, (q31_t)0x877740bb, (q31_t)0x2b0d750b, (q31_t)0x87752392,\n    (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2b019f46, (q31_t)0x8770ea20,\n    (q31_t)0x2afbb43c, (q31_t)0x876ecdd6, (q31_t)0x2af5c917, (q31_t)0x876cb1d6,\n    (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ae9f27e, (q31_t)0x87687ab7,\n    (q31_t)0x2ae4070a, (q31_t)0x87665f96, (q31_t)0x2ade1b7c, (q31_t)0x876444c1,\n    (q31_t)0x2ad82fd2, (q31_t)0x87622a35, (q31_t)0x2ad2440f, (q31_t)0x87600ff4,\n    (q31_t)0x2acc5831, (q31_t)0x875df5fd, (q31_t)0x2ac66c39, (q31_t)0x875bdc51,\n    (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aba93f9, (q31_t)0x8757a9d8,\n    (q31_t)0x2ab4a7b1, (q31_t)0x8755910b, (q31_t)0x2aaebb50, (q31_t)0x87537888,\n    (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2aa2e23d, (q31_t)0x874f4862,\n    (q31_t)0x2a9cf58c, (q31_t)0x874d30bf, (q31_t)0x2a9708c1, (q31_t)0x874b1966,\n    (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a8b2edc, (q31_t)0x8746eb94,\n    (q31_t)0x2a8541c3, (q31_t)0x8744d51b, (q31_t)0x2a7f548e, (q31_t)0x8742beec,\n    (q31_t)0x2a796740, (q31_t)0x8740a907, (q31_t)0x2a7379d8, (q31_t)0x873e936d,\n    (q31_t)0x2a6d8c55, (q31_t)0x873c7e1e, (q31_t)0x2a679eb8, (q31_t)0x873a6919,\n    (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a5bc330, (q31_t)0x87363fee,\n    (q31_t)0x2a55d545, (q31_t)0x87342bc9, (q31_t)0x2a4fe740, (q31_t)0x873217ee,\n    (q31_t)0x2a49f920, (q31_t)0x8730045d, (q31_t)0x2a440ae7, (q31_t)0x872df117,\n    (q31_t)0x2a3e1c93, (q31_t)0x872bde1c, (q31_t)0x2a382e25, (q31_t)0x8729cb6b,\n    (q31_t)0x2a323f9e, (q31_t)0x8727b905, (q31_t)0x2a2c50fc, (q31_t)0x8725a6e9,\n    (q31_t)0x2a266240, (q31_t)0x87239518, (q31_t)0x2a20736a, (q31_t)0x87218391,\n    (q31_t)0x2a1a847b, (q31_t)0x871f7255, (q31_t)0x2a149571, (q31_t)0x871d6163,\n    (q31_t)0x2a0ea64d, (q31_t)0x871b50bc, (q31_t)0x2a08b710, (q31_t)0x87194060,\n    (q31_t)0x2a02c7b8, (q31_t)0x8717304e, (q31_t)0x29fcd847, (q31_t)0x87152087,\n    (q31_t)0x29f6e8bb, (q31_t)0x8713110a, (q31_t)0x29f0f916, (q31_t)0x871101d8,\n    (q31_t)0x29eb0957, (q31_t)0x870ef2f1, (q31_t)0x29e5197e, (q31_t)0x870ce454,\n    (q31_t)0x29df298b, (q31_t)0x870ad602, (q31_t)0x29d9397f, (q31_t)0x8708c7fa,\n    (q31_t)0x29d34958, (q31_t)0x8706ba3d, (q31_t)0x29cd5918, (q31_t)0x8704acca,\n    (q31_t)0x29c768be, (q31_t)0x87029fa3, (q31_t)0x29c1784a, (q31_t)0x870092c5,\n    (q31_t)0x29bb87bc, (q31_t)0x86fe8633, (q31_t)0x29b59715, (q31_t)0x86fc79eb,\n    (q31_t)0x29afa654, (q31_t)0x86fa6dee, (q31_t)0x29a9b579, (q31_t)0x86f8623b,\n    (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x299dd377, (q31_t)0x86f44bb6,\n    (q31_t)0x2997e24f, (q31_t)0x86f240e3, (q31_t)0x2991f10e, (q31_t)0x86f0365c,\n    (q31_t)0x298bffb2, (q31_t)0x86ee2c1e, (q31_t)0x29860e3e, (q31_t)0x86ec222c,\n    (q31_t)0x29801caf, (q31_t)0x86ea1884, (q31_t)0x297a2b07, (q31_t)0x86e80f27,\n    (q31_t)0x29743946, (q31_t)0x86e60614, (q31_t)0x296e476b, (q31_t)0x86e3fd4c,\n    (q31_t)0x29685576, (q31_t)0x86e1f4cf, (q31_t)0x29626368, (q31_t)0x86dfec9d,\n    (q31_t)0x295c7140, (q31_t)0x86dde4b5, (q31_t)0x29567eff, (q31_t)0x86dbdd18,\n    (q31_t)0x29508ca4, (q31_t)0x86d9d5c6, (q31_t)0x294a9a30, (q31_t)0x86d7cebf,\n    (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x293eb4fb, (q31_t)0x86d3c190,\n    (q31_t)0x2938c23a, (q31_t)0x86d1bb69, (q31_t)0x2932cf60, (q31_t)0x86cfb58c,\n    (q31_t)0x292cdc6d, (q31_t)0x86cdaffa, (q31_t)0x2926e960, (q31_t)0x86cbaab3,\n    (q31_t)0x2920f63a, (q31_t)0x86c9a5b7, (q31_t)0x291b02fa, (q31_t)0x86c7a106,\n    (q31_t)0x29150fa1, (q31_t)0x86c59c9f, (q31_t)0x290f1c2f, (q31_t)0x86c39883,\n    (q31_t)0x290928a3, (q31_t)0x86c194b2, (q31_t)0x290334ff, (q31_t)0x86bf912c,\n    (q31_t)0x28fd4140, (q31_t)0x86bd8df0, (q31_t)0x28f74d69, (q31_t)0x86bb8b00,\n    (q31_t)0x28f15978, (q31_t)0x86b9885a, (q31_t)0x28eb656e, (q31_t)0x86b785ff,\n    (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x28df7d0e, (q31_t)0x86b38229,\n    (q31_t)0x28d988b8, (q31_t)0x86b180ae, (q31_t)0x28d3944a, (q31_t)0x86af7f7e,\n    (q31_t)0x28cd9fc1, (q31_t)0x86ad7e99, (q31_t)0x28c7ab20, (q31_t)0x86ab7dff,\n    (q31_t)0x28c1b666, (q31_t)0x86a97db0, (q31_t)0x28bbc192, (q31_t)0x86a77dab,\n    (q31_t)0x28b5cca5, (q31_t)0x86a57df2, (q31_t)0x28afd7a0, (q31_t)0x86a37e83,\n    (q31_t)0x28a9e281, (q31_t)0x86a17f5f, (q31_t)0x28a3ed49, (q31_t)0x869f8086,\n    (q31_t)0x289df7f8, (q31_t)0x869d81f8, (q31_t)0x2898028e, (q31_t)0x869b83b4,\n    (q31_t)0x28920d0a, (q31_t)0x869985bc, (q31_t)0x288c176e, (q31_t)0x8697880f,\n    (q31_t)0x288621b9, (q31_t)0x86958aac, (q31_t)0x28802beb, (q31_t)0x86938d94,\n    (q31_t)0x287a3604, (q31_t)0x869190c7, (q31_t)0x28744004, (q31_t)0x868f9445,\n    (q31_t)0x286e49ea, (q31_t)0x868d980e, (q31_t)0x286853b8, (q31_t)0x868b9c22,\n    (q31_t)0x28625d6d, (q31_t)0x8689a081, (q31_t)0x285c670a, (q31_t)0x8687a52b,\n    (q31_t)0x2856708d, (q31_t)0x8685aa20, (q31_t)0x285079f7, (q31_t)0x8683af5f,\n    (q31_t)0x284a8349, (q31_t)0x8681b4ea, (q31_t)0x28448c81, (q31_t)0x867fbabf,\n    (q31_t)0x283e95a1, (q31_t)0x867dc0e0, (q31_t)0x28389ea8, (q31_t)0x867bc74b,\n    (q31_t)0x2832a796, (q31_t)0x8679ce01, (q31_t)0x282cb06c, (q31_t)0x8677d503,\n    (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x2820c1cc, (q31_t)0x8673e3e6,\n    (q31_t)0x281aca57, (q31_t)0x8671ebc8, (q31_t)0x2814d2c9, (q31_t)0x866ff3f6,\n    (q31_t)0x280edb23, (q31_t)0x866dfc6e, (q31_t)0x2808e364, (q31_t)0x866c0531,\n    (q31_t)0x2802eb8c, (q31_t)0x866a0e3f, (q31_t)0x27fcf39c, (q31_t)0x86681798,\n    (q31_t)0x27f6fb92, (q31_t)0x8666213c, (q31_t)0x27f10371, (q31_t)0x86642b2c,\n    (q31_t)0x27eb0b36, (q31_t)0x86623566, (q31_t)0x27e512e3, (q31_t)0x86603feb,\n    (q31_t)0x27df1a77, (q31_t)0x865e4abb, (q31_t)0x27d921f3, (q31_t)0x865c55d7,\n    (q31_t)0x27d32956, (q31_t)0x865a613d, (q31_t)0x27cd30a1, (q31_t)0x86586cee,\n    (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27c13eec, (q31_t)0x86548532,\n    (q31_t)0x27bb45ed, (q31_t)0x865291c4, (q31_t)0x27b54cd6, (q31_t)0x86509ea2,\n    (q31_t)0x27af53a6, (q31_t)0x864eabcb, (q31_t)0x27a95a5d, (q31_t)0x864cb93e,\n    (q31_t)0x27a360fc, (q31_t)0x864ac6fd, (q31_t)0x279d6783, (q31_t)0x8648d507,\n    (q31_t)0x27976df1, (q31_t)0x8646e35c, (q31_t)0x27917447, (q31_t)0x8644f1fc,\n    (q31_t)0x278b7a84, (q31_t)0x864300e7, (q31_t)0x278580a9, (q31_t)0x8641101d,\n    (q31_t)0x277f86b5, (q31_t)0x863f1f9e, (q31_t)0x27798caa, (q31_t)0x863d2f6b,\n    (q31_t)0x27739285, (q31_t)0x863b3f82, (q31_t)0x276d9849, (q31_t)0x86394fe5,\n    (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x2761a387, (q31_t)0x8635718b,\n    (q31_t)0x275ba901, (q31_t)0x863382cf, (q31_t)0x2755ae64, (q31_t)0x8631945e,\n    (q31_t)0x274fb3ae, (q31_t)0x862fa638, (q31_t)0x2749b8e0, (q31_t)0x862db85e,\n    (q31_t)0x2743bdf9, (q31_t)0x862bcace, (q31_t)0x273dc2fa, (q31_t)0x8629dd8a,\n    (q31_t)0x2737c7e3, (q31_t)0x8627f091, (q31_t)0x2731ccb4, (q31_t)0x862603e3,\n    (q31_t)0x272bd16d, (q31_t)0x86241780, (q31_t)0x2725d60e, (q31_t)0x86222b68,\n    (q31_t)0x271fda96, (q31_t)0x86203f9c, (q31_t)0x2719df06, (q31_t)0x861e541a,\n    (q31_t)0x2713e35f, (q31_t)0x861c68e4, (q31_t)0x270de79f, (q31_t)0x861a7df9,\n    (q31_t)0x2707ebc7, (q31_t)0x86189359, (q31_t)0x2701efd7, (q31_t)0x8616a905,\n    (q31_t)0x26fbf3ce, (q31_t)0x8614befb, (q31_t)0x26f5f7ae, (q31_t)0x8612d53d,\n    (q31_t)0x26effb76, (q31_t)0x8610ebca, (q31_t)0x26e9ff26, (q31_t)0x860f02a3,\n    (q31_t)0x26e402bd, (q31_t)0x860d19c6, (q31_t)0x26de063d, (q31_t)0x860b3135,\n    (q31_t)0x26d809a5, (q31_t)0x860948ef, (q31_t)0x26d20cf5, (q31_t)0x860760f4,\n    (q31_t)0x26cc102d, (q31_t)0x86057944, (q31_t)0x26c6134d, (q31_t)0x860391e0,\n    (q31_t)0x26c01655, (q31_t)0x8601aac7, (q31_t)0x26ba1945, (q31_t)0x85ffc3f9,\n    (q31_t)0x26b41c1d, (q31_t)0x85fddd76, (q31_t)0x26ae1edd, (q31_t)0x85fbf73f,\n    (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26a22416, (q31_t)0x85f82bb2,\n    (q31_t)0x269c268f, (q31_t)0x85f6465c, (q31_t)0x269628f0, (q31_t)0x85f46152,\n    (q31_t)0x26902b39, (q31_t)0x85f27c93, (q31_t)0x268a2d6b, (q31_t)0x85f09820,\n    (q31_t)0x26842f84, (q31_t)0x85eeb3f7, (q31_t)0x267e3186, (q31_t)0x85ecd01a,\n    (q31_t)0x26783370, (q31_t)0x85eaec88, (q31_t)0x26723543, (q31_t)0x85e90942,\n    (q31_t)0x266c36fe, (q31_t)0x85e72647, (q31_t)0x266638a1, (q31_t)0x85e54397,\n    (q31_t)0x26603a2c, (q31_t)0x85e36132, (q31_t)0x265a3b9f, (q31_t)0x85e17f19,\n    (q31_t)0x26543cfb, (q31_t)0x85df9d4b, (q31_t)0x264e3e40, (q31_t)0x85ddbbc9,\n    (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x26424082, (q31_t)0x85d9f9a5,\n    (q31_t)0x263c417f, (q31_t)0x85d81905, (q31_t)0x26364265, (q31_t)0x85d638b0,\n    (q31_t)0x26304333, (q31_t)0x85d458a6, (q31_t)0x262a43ea, (q31_t)0x85d278e7,\n    (q31_t)0x26244489, (q31_t)0x85d09974, (q31_t)0x261e4511, (q31_t)0x85ceba4d,\n    (q31_t)0x26184581, (q31_t)0x85ccdb70, (q31_t)0x261245da, (q31_t)0x85cafcdf,\n    (q31_t)0x260c461b, (q31_t)0x85c91e9a, (q31_t)0x26064645, (q31_t)0x85c740a0,\n    (q31_t)0x26004657, (q31_t)0x85c562f1, (q31_t)0x25fa4652, (q31_t)0x85c3858d,\n    (q31_t)0x25f44635, (q31_t)0x85c1a875, (q31_t)0x25ee4601, (q31_t)0x85bfcba9,\n    (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x25e24553, (q31_t)0x85bc12f2,\n    (q31_t)0x25dc44d9, (q31_t)0x85ba3707, (q31_t)0x25d64447, (q31_t)0x85b85b68,\n    (q31_t)0x25d0439f, (q31_t)0x85b68015, (q31_t)0x25ca42de, (q31_t)0x85b4a50d,\n    (q31_t)0x25c44207, (q31_t)0x85b2ca50, (q31_t)0x25be4118, (q31_t)0x85b0efdf,\n    (q31_t)0x25b84012, (q31_t)0x85af15b9, (q31_t)0x25b23ef5, (q31_t)0x85ad3bdf,\n    (q31_t)0x25ac3dc0, (q31_t)0x85ab6250, (q31_t)0x25a63c74, (q31_t)0x85a9890d,\n    (q31_t)0x25a03b11, (q31_t)0x85a7b015, (q31_t)0x259a3997, (q31_t)0x85a5d768,\n    (q31_t)0x25943806, (q31_t)0x85a3ff07, (q31_t)0x258e365d, (q31_t)0x85a226f2,\n    (q31_t)0x2588349d, (q31_t)0x85a04f28, (q31_t)0x258232c6, (q31_t)0x859e77a9,\n    (q31_t)0x257c30d8, (q31_t)0x859ca076, (q31_t)0x25762ed3, (q31_t)0x859ac98f,\n    (q31_t)0x25702cb7, (q31_t)0x8598f2f3, (q31_t)0x256a2a83, (q31_t)0x85971ca2,\n    (q31_t)0x25642839, (q31_t)0x8595469d, (q31_t)0x255e25d7, (q31_t)0x859370e4,\n    (q31_t)0x2558235f, (q31_t)0x85919b76, (q31_t)0x255220cf, (q31_t)0x858fc653,\n    (q31_t)0x254c1e28, (q31_t)0x858df17c, (q31_t)0x25461b6b, (q31_t)0x858c1cf1,\n    (q31_t)0x25401896, (q31_t)0x858a48b1, (q31_t)0x253a15aa, (q31_t)0x858874bd,\n    (q31_t)0x253412a8, (q31_t)0x8586a114, (q31_t)0x252e0f8e, (q31_t)0x8584cdb7,\n    (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x25220916, (q31_t)0x858127df,\n    (q31_t)0x251c05b8, (q31_t)0x857f5564, (q31_t)0x25160243, (q31_t)0x857d8335,\n    (q31_t)0x250ffeb7, (q31_t)0x857bb152, (q31_t)0x2509fb14, (q31_t)0x8579dfba,\n    (q31_t)0x2503f75a, (q31_t)0x85780e6e, (q31_t)0x24fdf389, (q31_t)0x85763d6d,\n    (q31_t)0x24f7efa2, (q31_t)0x85746cb8, (q31_t)0x24f1eba4, (q31_t)0x85729c4e,\n    (q31_t)0x24ebe78f, (q31_t)0x8570cc30, (q31_t)0x24e5e363, (q31_t)0x856efc5e,\n    (q31_t)0x24dfdf20, (q31_t)0x856d2cd7, (q31_t)0x24d9dac7, (q31_t)0x856b5d9c,\n    (q31_t)0x24d3d657, (q31_t)0x85698ead, (q31_t)0x24cdd1d0, (q31_t)0x8567c009,\n    (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24c1c87f, (q31_t)0x856423a4,\n    (q31_t)0x24bbc3b4, (q31_t)0x856255e3, (q31_t)0x24b5bed2, (q31_t)0x8560886d,\n    (q31_t)0x24afb9da, (q31_t)0x855ebb44, (q31_t)0x24a9b4cb, (q31_t)0x855cee66,\n    (q31_t)0x24a3afa6, (q31_t)0x855b21d3, (q31_t)0x249daa6a, (q31_t)0x8559558c,\n    (q31_t)0x2497a517, (q31_t)0x85578991, (q31_t)0x24919fae, (q31_t)0x8555bde2,\n    (q31_t)0x248b9a2f, (q31_t)0x8553f27e, (q31_t)0x24859498, (q31_t)0x85522766,\n    (q31_t)0x247f8eec, (q31_t)0x85505c99, (q31_t)0x24798928, (q31_t)0x854e9219,\n    (q31_t)0x2473834f, (q31_t)0x854cc7e3, (q31_t)0x246d7d5e, (q31_t)0x854afdfa,\n    (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x2461713a, (q31_t)0x85476b0a,\n    (q31_t)0x245b6b07, (q31_t)0x8545a204, (q31_t)0x245564bd, (q31_t)0x8543d949,\n    (q31_t)0x244f5e5c, (q31_t)0x854210db, (q31_t)0x244957e5, (q31_t)0x854048b7,\n    (q31_t)0x24435158, (q31_t)0x853e80e0, (q31_t)0x243d4ab4, (q31_t)0x853cb954,\n    (q31_t)0x243743fa, (q31_t)0x853af214, (q31_t)0x24313d2a, (q31_t)0x85392b20,\n    (q31_t)0x242b3644, (q31_t)0x85376477, (q31_t)0x24252f47, (q31_t)0x85359e1a,\n    (q31_t)0x241f2833, (q31_t)0x8533d809, (q31_t)0x2419210a, (q31_t)0x85321244,\n    (q31_t)0x241319ca, (q31_t)0x85304cca, (q31_t)0x240d1274, (q31_t)0x852e879d,\n    (q31_t)0x24070b08, (q31_t)0x852cc2bb, (q31_t)0x24010385, (q31_t)0x852afe24,\n    (q31_t)0x23fafbec, (q31_t)0x852939da, (q31_t)0x23f4f43e, (q31_t)0x852775db,\n    (q31_t)0x23eeec78, (q31_t)0x8525b228, (q31_t)0x23e8e49d, (q31_t)0x8523eec1,\n    (q31_t)0x23e2dcac, (q31_t)0x85222ba5, (q31_t)0x23dcd4a4, (q31_t)0x852068d6,\n    (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23d0c453, (q31_t)0x851ce41a,\n    (q31_t)0x23cabc09, (q31_t)0x851b222e, (q31_t)0x23c4b3a9, (q31_t)0x8519608d,\n    (q31_t)0x23beab33, (q31_t)0x85179f39, (q31_t)0x23b8a2a7, (q31_t)0x8515de30,\n    (q31_t)0x23b29a05, (q31_t)0x85141d73, (q31_t)0x23ac914d, (q31_t)0x85125d02,\n    (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x23a07f9a, (q31_t)0x850edd03,\n    (q31_t)0x239a76a0, (q31_t)0x850d1d75, (q31_t)0x23946d90, (q31_t)0x850b5e34,\n    (q31_t)0x238e646a, (q31_t)0x85099f3e, (q31_t)0x23885b2e, (q31_t)0x8507e094,\n    (q31_t)0x238251dd, (q31_t)0x85062235, (q31_t)0x237c4875, (q31_t)0x85046423,\n    (q31_t)0x23763ef7, (q31_t)0x8502a65c, (q31_t)0x23703564, (q31_t)0x8500e8e2,\n    (q31_t)0x236a2bba, (q31_t)0x84ff2bb3, (q31_t)0x236421fb, (q31_t)0x84fd6ed0,\n    (q31_t)0x235e1826, (q31_t)0x84fbb239, (q31_t)0x23580e3b, (q31_t)0x84f9f5ee,\n    (q31_t)0x2352043b, (q31_t)0x84f839ee, (q31_t)0x234bfa24, (q31_t)0x84f67e3b,\n    (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x233fe5b6, (q31_t)0x84f307b8,\n    (q31_t)0x2339db5e, (q31_t)0x84f14ce8, (q31_t)0x2333d0f1, (q31_t)0x84ef9265,\n    (q31_t)0x232dc66d, (q31_t)0x84edd82d, (q31_t)0x2327bbd5, (q31_t)0x84ec1e41,\n    (q31_t)0x2321b126, (q31_t)0x84ea64a1, (q31_t)0x231ba662, (q31_t)0x84e8ab4d,\n    (q31_t)0x23159b88, (q31_t)0x84e6f244, (q31_t)0x230f9098, (q31_t)0x84e53988,\n    (q31_t)0x23098593, (q31_t)0x84e38118, (q31_t)0x23037a78, (q31_t)0x84e1c8f3,\n    (q31_t)0x22fd6f48, (q31_t)0x84e0111b, (q31_t)0x22f76402, (q31_t)0x84de598f,\n    (q31_t)0x22f158a7, (q31_t)0x84dca24e, (q31_t)0x22eb4d36, (q31_t)0x84daeb5a,\n    (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22df3613, (q31_t)0x84d77e54,\n    (q31_t)0x22d92a61, (q31_t)0x84d5c844, (q31_t)0x22d31e9a, (q31_t)0x84d4127f,\n    (q31_t)0x22cd12bd, (q31_t)0x84d25d06, (q31_t)0x22c706cb, (q31_t)0x84d0a7da,\n    (q31_t)0x22c0fac4, (q31_t)0x84cef2f9, (q31_t)0x22baeea7, (q31_t)0x84cd3e64,\n    (q31_t)0x22b4e274, (q31_t)0x84cb8a1b, (q31_t)0x22aed62c, (q31_t)0x84c9d61f,\n    (q31_t)0x22a8c9cf, (q31_t)0x84c8226e, (q31_t)0x22a2bd5d, (q31_t)0x84c66f09,\n    (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0, (q31_t)0x2296a437, (q31_t)0x84c30924,\n    (q31_t)0x22909785, (q31_t)0x84c156a3, (q31_t)0x228a8abd, (q31_t)0x84bfa46e,\n    (q31_t)0x22847de0, (q31_t)0x84bdf286, (q31_t)0x227e70ed, (q31_t)0x84bc40e9,\n    (q31_t)0x227863e5, (q31_t)0x84ba8f98, (q31_t)0x227256c8, (q31_t)0x84b8de94,\n    (q31_t)0x226c4996, (q31_t)0x84b72ddb, (q31_t)0x22663c4e, (q31_t)0x84b57d6f,\n    (q31_t)0x22602ef1, (q31_t)0x84b3cd4f, (q31_t)0x225a217f, (q31_t)0x84b21d7a,\n    (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x224e065c, (q31_t)0x84aebeb6,\n    (q31_t)0x2247f8aa, (q31_t)0x84ad0fc6, (q31_t)0x2241eae3, (q31_t)0x84ab6122,\n    (q31_t)0x223bdd08, (q31_t)0x84a9b2ca, (q31_t)0x2235cf17, (q31_t)0x84a804be,\n    (q31_t)0x222fc111, (q31_t)0x84a656fe, (q31_t)0x2229b2f6, (q31_t)0x84a4a98a,\n    (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x221d9680, (q31_t)0x84a14f87,\n    (q31_t)0x22178826, (q31_t)0x849fa2f7, (q31_t)0x221179b7, (q31_t)0x849df6b4,\n    (q31_t)0x220b6b32, (q31_t)0x849c4abd, (q31_t)0x22055c99, (q31_t)0x849a9f12,\n    (q31_t)0x21ff4dea, (q31_t)0x8498f3b3, (q31_t)0x21f93f27, (q31_t)0x849748a0,\n    (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21ed2162, (q31_t)0x8493f35e,\n    (q31_t)0x21e71260, (q31_t)0x84924930, (q31_t)0x21e10349, (q31_t)0x84909f4e,\n    (q31_t)0x21daf41d, (q31_t)0x848ef5b7, (q31_t)0x21d4e4dc, (q31_t)0x848d4c6d,\n    (q31_t)0x21ced586, (q31_t)0x848ba36f, (q31_t)0x21c8c61c, (q31_t)0x8489fabe,\n    (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x21bca708, (q31_t)0x8486aa3e,\n    (q31_t)0x21b6975f, (q31_t)0x84850271, (q31_t)0x21b087a1, (q31_t)0x84835af0,\n    (q31_t)0x21aa77cf, (q31_t)0x8481b3bb, (q31_t)0x21a467e7, (q31_t)0x84800cd2,\n    (q31_t)0x219e57eb, (q31_t)0x847e6636, (q31_t)0x219847da, (q31_t)0x847cbfe5,\n    (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x218c277a, (q31_t)0x84797429,\n    (q31_t)0x2186172b, (q31_t)0x8477cebd, (q31_t)0x218006c8, (q31_t)0x8476299e,\n    (q31_t)0x2179f64f, (q31_t)0x847484ca, (q31_t)0x2173e5c2, (q31_t)0x8472e043,\n    (q31_t)0x216dd521, (q31_t)0x84713c08, (q31_t)0x2167c46b, (q31_t)0x846f9819,\n    (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x215ba2c0, (q31_t)0x846c5120,\n    (q31_t)0x215591cc, (q31_t)0x846aae16, (q31_t)0x214f80c4, (q31_t)0x84690b58,\n    (q31_t)0x21496fa7, (q31_t)0x846768e7, (q31_t)0x21435e75, (q31_t)0x8465c6c1,\n    (q31_t)0x213d4d2f, (q31_t)0x846424e8, (q31_t)0x21373bd4, (q31_t)0x8462835b,\n    (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x212b18e1, (q31_t)0x845f4126,\n    (q31_t)0x21250749, (q31_t)0x845da07e, (q31_t)0x211ef59d, (q31_t)0x845c0022,\n    (q31_t)0x2118e3dc, (q31_t)0x845a6012, (q31_t)0x2112d206, (q31_t)0x8458c04f,\n    (q31_t)0x210cc01d, (q31_t)0x845720d8, (q31_t)0x2106ae1e, (q31_t)0x845581ad,\n    (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20fa89e5, (q31_t)0x8452443d,\n    (q31_t)0x20f477aa, (q31_t)0x8450a5f7, (q31_t)0x20ee655a, (q31_t)0x844f07fd,\n    (q31_t)0x20e852f6, (q31_t)0x844d6a50, (q31_t)0x20e2407e, (q31_t)0x844bccef,\n    (q31_t)0x20dc2df2, (q31_t)0x844a2fda, (q31_t)0x20d61b51, (q31_t)0x84489311,\n    (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20c9f5d3, (q31_t)0x84455a66,\n    (q31_t)0x20c3e2f5, (q31_t)0x8443be82, (q31_t)0x20bdd003, (q31_t)0x844222eb,\n    (q31_t)0x20b7bcfe, (q31_t)0x844087a0, (q31_t)0x20b1a9e4, (q31_t)0x843eeca2,\n    (q31_t)0x20ab96b5, (q31_t)0x843d51f0, (q31_t)0x20a58373, (q31_t)0x843bb78a,\n    (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x20995cb2, (q31_t)0x843883a3,\n    (q31_t)0x20934933, (q31_t)0x8436ea23, (q31_t)0x208d35a0, (q31_t)0x843550ee,\n    (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x20810e3e, (q31_t)0x84321f6b,\n    (q31_t)0x207afa6f, (q31_t)0x8430871b, (q31_t)0x2074e68c, (q31_t)0x842eef18,\n    (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x2068be8a, (q31_t)0x842bbff8,\n    (q31_t)0x2062aa6b, (q31_t)0x842a28da, (q31_t)0x205c9638, (q31_t)0x84289209,\n    (q31_t)0x205681f1, (q31_t)0x8426fb84, (q31_t)0x20506d96, (q31_t)0x8425654b,\n    (q31_t)0x204a5927, (q31_t)0x8423cf5f, (q31_t)0x204444a4, (q31_t)0x842239bf,\n    (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x20381b63, (q31_t)0x841f0f65,\n    (q31_t)0x203206a4, (q31_t)0x841d7aaa, (q31_t)0x202bf1d2, (q31_t)0x841be63c,\n    (q31_t)0x2025dcec, (q31_t)0x841a521a, (q31_t)0x201fc7f2, (q31_t)0x8418be45,\n    (q31_t)0x2019b2e4, (q31_t)0x84172abc, (q31_t)0x20139dc2, (q31_t)0x84159780,\n    (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x20077344, (q31_t)0x841271ec,\n    (q31_t)0x20015de7, (q31_t)0x8410df95, (q31_t)0x1ffb4876, (q31_t)0x840f4d8a,\n    (q31_t)0x1ff532f2, (q31_t)0x840dbbcc, (q31_t)0x1fef1d59, (q31_t)0x840c2a5a,\n    (q31_t)0x1fe907ae, (q31_t)0x840a9935, (q31_t)0x1fe2f1ee, (q31_t)0x8409085c,\n    (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fd6c634, (q31_t)0x8405e790,\n    (q31_t)0x1fd0b03a, (q31_t)0x8404579d, (q31_t)0x1fca9a2b, (q31_t)0x8402c7f6,\n    (q31_t)0x1fc4840a, (q31_t)0x8401389b, (q31_t)0x1fbe6dd4, (q31_t)0x83ffa98d,\n    (q31_t)0x1fb8578b, (q31_t)0x83fe1acc, (q31_t)0x1fb2412f, (q31_t)0x83fc8c57,\n    (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1fa6143b, (q31_t)0x83f97052,\n    (q31_t)0x1f9ffda4, (q31_t)0x83f7e2c3, (q31_t)0x1f99e6fa, (q31_t)0x83f65580,\n    (q31_t)0x1f93d03c, (q31_t)0x83f4c889, (q31_t)0x1f8db96a, (q31_t)0x83f33bdf,\n    (q31_t)0x1f87a285, (q31_t)0x83f1af82, (q31_t)0x1f818b8d, (q31_t)0x83f02371,\n    (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f755d61, (q31_t)0x83ed0c35,\n    (q31_t)0x1f6f462f, (q31_t)0x83eb810a, (q31_t)0x1f692ee9, (q31_t)0x83e9f62b,\n    (q31_t)0x1f63178f, (q31_t)0x83e86b99, (q31_t)0x1f5d0022, (q31_t)0x83e6e153,\n    (q31_t)0x1f56e8a2, (q31_t)0x83e5575a, (q31_t)0x1f50d10e, (q31_t)0x83e3cdad,\n    (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f44a1ad, (q31_t)0x83e0bb3a,\n    (q31_t)0x1f3e89e0, (q31_t)0x83df3273, (q31_t)0x1f3871ff, (q31_t)0x83dda9f9,\n    (q31_t)0x1f325a0b, (q31_t)0x83dc21cb, (q31_t)0x1f2c4204, (q31_t)0x83da99ea,\n    (q31_t)0x1f2629ea, (q31_t)0x83d91255, (q31_t)0x1f2011bc, (q31_t)0x83d78b0d,\n    (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f13e127, (q31_t)0x83d47d63,\n    (q31_t)0x1f0dc8c0, (q31_t)0x83d2f701, (q31_t)0x1f07b045, (q31_t)0x83d170eb,\n    (q31_t)0x1f0197b8, (q31_t)0x83cfeb22, (q31_t)0x1efb7f17, (q31_t)0x83ce65a6,\n    (q31_t)0x1ef56664, (q31_t)0x83cce076, (q31_t)0x1eef4d9d, (q31_t)0x83cb5b93,\n    (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ee31bd6, (q31_t)0x83c852b2,\n    (q31_t)0x1edd02d6, (q31_t)0x83c6ceb5, (q31_t)0x1ed6e9c3, (q31_t)0x83c54b04,\n    (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0, (q31_t)0x1ecab763, (q31_t)0x83c24488,\n    (q31_t)0x1ec49e17, (q31_t)0x83c0c1be, (q31_t)0x1ebe84b8, (q31_t)0x83bf3f3f,\n    (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1eb251c1, (q31_t)0x83bc3b29,\n    (q31_t)0x1eac3829, (q31_t)0x83bab991, (q31_t)0x1ea61e7e, (q31_t)0x83b93845,\n    (q31_t)0x1ea004c1, (q31_t)0x83b7b746, (q31_t)0x1e99eaf0, (q31_t)0x83b63694,\n    (q31_t)0x1e93d10c, (q31_t)0x83b4b62e, (q31_t)0x1e8db716, (q31_t)0x83b33616,\n    (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e8182f1, (q31_t)0x83b036ca,\n    (q31_t)0x1e7b68c2, (q31_t)0x83aeb797, (q31_t)0x1e754e80, (q31_t)0x83ad38b1,\n    (q31_t)0x1e6f342c, (q31_t)0x83abba17, (q31_t)0x1e6919c4, (q31_t)0x83aa3bca,\n    (q31_t)0x1e62ff4a, (q31_t)0x83a8bdca, (q31_t)0x1e5ce4be, (q31_t)0x83a74017,\n    (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e50af6c, (q31_t)0x83a44596,\n    (q31_t)0x1e4a94a7, (q31_t)0x83a2c8c9, (q31_t)0x1e4479cf, (q31_t)0x83a14c48,\n    (q31_t)0x1e3e5ee5, (q31_t)0x839fd014, (q31_t)0x1e3843e8, (q31_t)0x839e542d,\n    (q31_t)0x1e3228d9, (q31_t)0x839cd893, (q31_t)0x1e2c0db6, (q31_t)0x839b5d45,\n    (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e1fd73a, (q31_t)0x83986790,\n    (q31_t)0x1e19bbe0, (q31_t)0x8396ed29, (q31_t)0x1e13a074, (q31_t)0x8395730e,\n    (q31_t)0x1e0d84f5, (q31_t)0x8393f940, (q31_t)0x1e076963, (q31_t)0x83927fbf,\n    (q31_t)0x1e014dbf, (q31_t)0x8391068a, (q31_t)0x1dfb3208, (q31_t)0x838f8da2,\n    (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1deefa63, (q31_t)0x838c9cb9,\n    (q31_t)0x1de8de75, (q31_t)0x838b24b8, (q31_t)0x1de2c275, (q31_t)0x8389ad03,\n    (q31_t)0x1ddca662, (q31_t)0x8388359b, (q31_t)0x1dd68a3c, (q31_t)0x8386be80,\n    (q31_t)0x1dd06e04, (q31_t)0x838547b2, (q31_t)0x1dca51ba, (q31_t)0x8383d130,\n    (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dbe18ef, (q31_t)0x8380e513,\n    (q31_t)0x1db7fc6d, (q31_t)0x837f6f78, (q31_t)0x1db1dfda, (q31_t)0x837dfa2a,\n    (q31_t)0x1dabc334, (q31_t)0x837c8528, (q31_t)0x1da5a67c, (q31_t)0x837b1074,\n    (q31_t)0x1d9f89b1, (q31_t)0x83799c0c, (q31_t)0x1d996cd4, (q31_t)0x837827f0,\n    (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d8d32e4, (q31_t)0x837540a1,\n    (q31_t)0x1d8715d0, (q31_t)0x8373cd6c, (q31_t)0x1d80f8ab, (q31_t)0x83725a84,\n    (q31_t)0x1d7adb73, (q31_t)0x8370e7e9, (q31_t)0x1d74be29, (q31_t)0x836f759b,\n    (q31_t)0x1d6ea0cc, (q31_t)0x836e039a, (q31_t)0x1d68835e, (q31_t)0x836c91e5,\n    (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d5c484b, (q31_t)0x8369af63,\n    (q31_t)0x1d562aa6, (q31_t)0x83683e95, (q31_t)0x1d500cef, (q31_t)0x8366ce14,\n    (q31_t)0x1d49ef26, (q31_t)0x83655ddf, (q31_t)0x1d43d14b, (q31_t)0x8363edf8,\n    (q31_t)0x1d3db35e, (q31_t)0x83627e5d, (q31_t)0x1d37955e, (q31_t)0x83610f10,\n    (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d2b592a, (q31_t)0x835e315b,\n    (q31_t)0x1d253af5, (q31_t)0x835cc2f4, (q31_t)0x1d1f1cae, (q31_t)0x835b54da,\n    (q31_t)0x1d18fe54, (q31_t)0x8359e70d, (q31_t)0x1d12dfe9, (q31_t)0x8358798c,\n    (q31_t)0x1d0cc16c, (q31_t)0x83570c59, (q31_t)0x1d06a2dd, (q31_t)0x83559f72,\n    (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1cfa658a, (q31_t)0x8352c68c,\n    (q31_t)0x1cf446c5, (q31_t)0x83515a8c, (q31_t)0x1cee27ef, (q31_t)0x834feed9,\n    (q31_t)0x1ce80906, (q31_t)0x834e8373, (q31_t)0x1ce1ea0c, (q31_t)0x834d185a,\n    (q31_t)0x1cdbcb00, (q31_t)0x834bad8e, (q31_t)0x1cd5abe3, (q31_t)0x834a430e,\n    (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cc96d72, (q31_t)0x83476ef6,\n    (q31_t)0x1cc34e1f, (q31_t)0x8346055e, (q31_t)0x1cbd2eba, (q31_t)0x83449c12,\n    (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1cb0efbb, (q31_t)0x8341ca62,\n    (q31_t)0x1caad021, (q31_t)0x834061fd, (q31_t)0x1ca4b075, (q31_t)0x833ef9e6,\n    (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c9870e9, (q31_t)0x833c2a9d,\n    (q31_t)0x1c925109, (q31_t)0x833ac36c, (q31_t)0x1c8c3116, (q31_t)0x83395c88,\n    (q31_t)0x1c861113, (q31_t)0x8337f5f1, (q31_t)0x1c7ff0fd, (q31_t)0x83368fa7,\n    (q31_t)0x1c79d0d6, (q31_t)0x833529aa, (q31_t)0x1c73b09d, (q31_t)0x8333c3fa,\n    (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c676ff8, (q31_t)0x8330f981,\n    (q31_t)0x1c614f8b, (q31_t)0x832f94b8, (q31_t)0x1c5b2f0c, (q31_t)0x832e303c,\n    (q31_t)0x1c550e7c, (q31_t)0x832ccc0d, (q31_t)0x1c4eedda, (q31_t)0x832b682b,\n    (q31_t)0x1c48cd27, (q31_t)0x832a0496, (q31_t)0x1c42ac62, (q31_t)0x8328a14d,\n    (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c366aa5, (q31_t)0x8325dba4,\n    (q31_t)0x1c3049ac, (q31_t)0x83247943, (q31_t)0x1c2a28a2, (q31_t)0x8323172f,\n    (q31_t)0x1c240786, (q31_t)0x8321b568, (q31_t)0x1c1de659, (q31_t)0x832053ee,\n    (q31_t)0x1c17c51b, (q31_t)0x831ef2c1, (q31_t)0x1c11a3cb, (q31_t)0x831d91e1,\n    (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1c0560f8, (q31_t)0x831ad109,\n    (q31_t)0x1bff3f75, (q31_t)0x83197110, (q31_t)0x1bf91de0, (q31_t)0x83181164,\n    (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1becda83, (q31_t)0x831552f4,\n    (q31_t)0x1be6b8ba, (q31_t)0x8313f42f, (q31_t)0x1be096e0, (q31_t)0x831295b7,\n    (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bd452f9, (q31_t)0x830fd9af,\n    (q31_t)0x1bce30ec, (q31_t)0x830e7c1f, (q31_t)0x1bc80ece, (q31_t)0x830d1edc,\n    (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6, (q31_t)0x1bbbca5e, (q31_t)0x830a653c,\n    (q31_t)0x1bb5a80c, (q31_t)0x830908e0, (q31_t)0x1baf85a9, (q31_t)0x8307acd1,\n    (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1ba340b0, (q31_t)0x8304f59b,\n    (q31_t)0x1b9d1e1a, (q31_t)0x83039a73, (q31_t)0x1b96fb73, (q31_t)0x83023f98,\n    (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b8ab5f2, (q31_t)0x82ff8acb,\n    (q31_t)0x1b849317, (q31_t)0x82fe30d7, (q31_t)0x1b7e702c, (q31_t)0x82fcd731,\n    (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b722a23, (q31_t)0x82fa24cc,\n    (q31_t)0x1b6c0705, (q31_t)0x82f8cc0d, (q31_t)0x1b65e3d7, (q31_t)0x82f7739c,\n    (q31_t)0x1b5fc097, (q31_t)0x82f61b77, (q31_t)0x1b599d46, (q31_t)0x82f4c3a0,\n    (q31_t)0x1b5379e5, (q31_t)0x82f36c15, (q31_t)0x1b4d5672, (q31_t)0x82f214d8,\n    (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b410f5b, (q31_t)0x82ef6745,\n    (q31_t)0x1b3aebb6, (q31_t)0x82ee10ef, (q31_t)0x1b34c801, (q31_t)0x82ecbae7,\n    (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b288063, (q31_t)0x82ea0fbd,\n    (q31_t)0x1b225c7b, (q31_t)0x82e8ba9c, (q31_t)0x1b1c3883, (q31_t)0x82e765c8,\n    (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1b0ff05f, (q31_t)0x82e4bd07,\n    (q31_t)0x1b09cc34, (q31_t)0x82e3691b, (q31_t)0x1b03a7f9, (q31_t)0x82e2157c,\n    (q31_t)0x1afd83ad, (q31_t)0x82e0c22a, (q31_t)0x1af75f50, (q31_t)0x82df6f25,\n    (q31_t)0x1af13ae3, (q31_t)0x82de1c6d, (q31_t)0x1aeb1665, (q31_t)0x82dcca02,\n    (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1adecd37, (q31_t)0x82da2615,\n    (q31_t)0x1ad8a887, (q31_t)0x82d8d492, (q31_t)0x1ad283c7, (q31_t)0x82d7835c,\n    (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ac63a14, (q31_t)0x82d4e1d8,\n    (q31_t)0x1ac01522, (q31_t)0x82d3918a, (q31_t)0x1ab9f020, (q31_t)0x82d24189,\n    (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1aada5e9, (q31_t)0x82cfa26f,\n    (q31_t)0x1aa780b6, (q31_t)0x82ce5356, (q31_t)0x1aa15b71, (q31_t)0x82cd048a,\n    (q31_t)0x1a9b361d, (q31_t)0x82cbb60b, (q31_t)0x1a9510b7, (q31_t)0x82ca67d9,\n    (q31_t)0x1a8eeb42, (q31_t)0x82c919f5, (q31_t)0x1a88c5bc, (q31_t)0x82c7cc5e,\n    (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a7c7a7f, (q31_t)0x82c53217,\n    (q31_t)0x1a7654c8, (q31_t)0x82c3e568, (q31_t)0x1a702f01, (q31_t)0x82c29906,\n    (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a63e341, (q31_t)0x82c00129,\n    (q31_t)0x1a5dbd49, (q31_t)0x82beb5af, (q31_t)0x1a579741, (q31_t)0x82bd6a82,\n    (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a4b4aff, (q31_t)0x82bad50f,\n    (q31_t)0x1a4524c6, (q31_t)0x82b98aca, (q31_t)0x1a3efe7c, (q31_t)0x82b840d2,\n    (q31_t)0x1a38d823, (q31_t)0x82b6f727, (q31_t)0x1a32b1b9, (q31_t)0x82b5adca,\n    (q31_t)0x1a2c8b3f, (q31_t)0x82b464ba, (q31_t)0x1a2664b5, (q31_t)0x82b31bf7,\n    (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a1a1771, (q31_t)0x82b08b59,\n    (q31_t)0x1a13f0b6, (q31_t)0x82af437e, (q31_t)0x1a0dc9ec, (q31_t)0x82adfbf0,\n    (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x1a017c27, (q31_t)0x82ab6dbd,\n    (q31_t)0x19fb552c, (q31_t)0x82aa2717, (q31_t)0x19f52e22, (q31_t)0x82a8e0bf,\n    (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19e8dfdc, (q31_t)0x82a654f6,\n    (q31_t)0x19e2b8a2, (q31_t)0x82a50f85, (q31_t)0x19dc9157, (q31_t)0x82a3ca62,\n    (q31_t)0x19d669fc, (q31_t)0x82a2858c, (q31_t)0x19d04292, (q31_t)0x82a14104,\n    (q31_t)0x19ca1b17, (q31_t)0x829ffcc8, (q31_t)0x19c3f38d, (q31_t)0x829eb8db,\n    (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19b7a449, (q31_t)0x829c31e7,\n    (q31_t)0x19b17c8f, (q31_t)0x829aeee1, (q31_t)0x19ab54c5, (q31_t)0x8299ac29,\n    (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x199f0502, (q31_t)0x829727a0,\n    (q31_t)0x1998dd09, (q31_t)0x8295e5cf, (q31_t)0x1992b4ff, (q31_t)0x8294a44c,\n    (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x198664be, (q31_t)0x8292222e,\n    (q31_t)0x19803c86, (q31_t)0x8290e194, (q31_t)0x197a143e, (q31_t)0x828fa146,\n    (q31_t)0x1973ebe6, (q31_t)0x828e6146, (q31_t)0x196dc37e, (q31_t)0x828d2193,\n    (q31_t)0x19679b07, (q31_t)0x828be22e, (q31_t)0x19617280, (q31_t)0x828aa316,\n    (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x19552144, (q31_t)0x828825ce,\n    (q31_t)0x194ef88e, (q31_t)0x8286e79e, (q31_t)0x1948cfc8, (q31_t)0x8285a9bb,\n    (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x193c7e0f, (q31_t)0x82832edf,\n    (q31_t)0x1936551b, (q31_t)0x8281f1e4, (q31_t)0x19302c17, (q31_t)0x8280b538,\n    (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x1923d9e1, (q31_t)0x827e3cc6,\n    (q31_t)0x191db0af, (q31_t)0x827d0102, (q31_t)0x1917876d, (q31_t)0x827bc58a,\n    (q31_t)0x19115e1c, (q31_t)0x827a8a61, (q31_t)0x190b34bb, (q31_t)0x82794f84,\n    (q31_t)0x19050b4b, (q31_t)0x827814f6, (q31_t)0x18fee1cb, (q31_t)0x8276dab4,\n    (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18f28e9e, (q31_t)0x8274671a,\n    (q31_t)0x18ec64f0, (q31_t)0x82732dc0, (q31_t)0x18e63b33, (q31_t)0x8271f4b5,\n    (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18d9e78b, (q31_t)0x826f8386,\n    (q31_t)0x18d3bda0, (q31_t)0x826e4b62, (q31_t)0x18cd93a5, (q31_t)0x826d138d,\n    (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18c13f82, (q31_t)0x826aa4c9,\n    (q31_t)0x18bb155a, (q31_t)0x82696ddc, (q31_t)0x18b4eb22, (q31_t)0x8268373c,\n    (q31_t)0x18aec0db, (q31_t)0x826700e9, (q31_t)0x18a89685, (q31_t)0x8265cae4,\n    (q31_t)0x18a26c20, (q31_t)0x8264952d, (q31_t)0x189c41ab, (q31_t)0x82635fc2,\n    (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x188fec95, (q31_t)0x8260f5d7,\n    (q31_t)0x1889c1f3, (q31_t)0x825fc155, (q31_t)0x18839742, (q31_t)0x825e8d21,\n    (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x187741b2, (q31_t)0x825c25a1,\n    (q31_t)0x187116d4, (q31_t)0x825af255, (q31_t)0x186aebe6, (q31_t)0x8259bf57,\n    (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x185e95de, (q31_t)0x82575a44,\n    (q31_t)0x18586ac3, (q31_t)0x8256282e, (q31_t)0x18523f9a, (q31_t)0x8254f666,\n    (q31_t)0x184c1461, (q31_t)0x8253c4eb, (q31_t)0x1845e919, (q31_t)0x825293be,\n    (q31_t)0x183fbdc3, (q31_t)0x825162df, (q31_t)0x1839925d, (q31_t)0x8250324d,\n    (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x182d3b65, (q31_t)0x824dd211,\n    (q31_t)0x18270fd3, (q31_t)0x824ca268, (q31_t)0x1820e431, (q31_t)0x824b730c,\n    (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x18148cc2, (q31_t)0x8249153d,\n    (q31_t)0x180e60f4, (q31_t)0x8247e6ca, (q31_t)0x18083518, (q31_t)0x8246b8a4,\n    (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17fbdd32, (q31_t)0x82445d41,\n    (q31_t)0x17f5b129, (q31_t)0x82433004, (q31_t)0x17ef8511, (q31_t)0x82420315,\n    (q31_t)0x17e958ea, (q31_t)0x8240d673, (q31_t)0x17e32cb5, (q31_t)0x823faa1e,\n    (q31_t)0x17dd0070, (q31_t)0x823e7e18, (q31_t)0x17d6d41d, (q31_t)0x823d525e,\n    (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17ca7b4c, (q31_t)0x823afbd5,\n    (q31_t)0x17c44ecd, (q31_t)0x8239d104, (q31_t)0x17be223f, (q31_t)0x8238a681,\n    (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x17b1c8f8, (q31_t)0x82365264,\n    (q31_t)0x17ab9c3e, (q31_t)0x823528ca, (q31_t)0x17a56f76, (q31_t)0x8233ff7e,\n    (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x179915ba, (q31_t)0x8231adce,\n    (q31_t)0x1792e8c6, (q31_t)0x8230856a, (q31_t)0x178cbbc4, (q31_t)0x822f5d54,\n    (q31_t)0x17868eb3, (q31_t)0x822e358b, (q31_t)0x17806194, (q31_t)0x822d0e10,\n    (q31_t)0x177a3466, (q31_t)0x822be6e3, (q31_t)0x17740729, (q31_t)0x822ac004,\n    (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x1767ac85, (q31_t)0x8228732d,\n    (q31_t)0x17617f1d, (q31_t)0x82274d36, (q31_t)0x175b51a7, (q31_t)0x8226278d,\n    (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x174ef68f, (q31_t)0x8223dd24,\n    (q31_t)0x1748c8ee, (q31_t)0x8222b863, (q31_t)0x17429b3e, (q31_t)0x822193f1,\n    (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x17363fb4, (q31_t)0x821f4bf5,\n    (q31_t)0x173011d9, (q31_t)0x821e286b, (q31_t)0x1729e3f0, (q31_t)0x821d052f,\n    (q31_t)0x1723b5f9, (q31_t)0x821be240, (q31_t)0x171d87f3, (q31_t)0x821abfa0,\n    (q31_t)0x171759df, (q31_t)0x82199d4d, (q31_t)0x17112bbd, (q31_t)0x82187b47,\n    (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x1704cf4f, (q31_t)0x82163826,\n    (q31_t)0x16fea102, (q31_t)0x82151709, (q31_t)0x16f872a7, (q31_t)0x8213f63a,\n    (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16ec15c7, (q31_t)0x8211b586,\n    (q31_t)0x16e5e741, (q31_t)0x821095a0, (q31_t)0x16dfb8ae, (q31_t)0x820f7608,\n    (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16d35b5c, (q31_t)0x820d37c1,\n    (q31_t)0x16cd2c9f, (q31_t)0x820c1912, (q31_t)0x16c6fdd3, (q31_t)0x820afab1,\n    (q31_t)0x16c0cef9, (q31_t)0x8209dc9e, (q31_t)0x16baa011, (q31_t)0x8208bed8,\n    (q31_t)0x16b4711b, (q31_t)0x8207a160, (q31_t)0x16ae4217, (q31_t)0x82068435,\n    (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16a1e3e5, (q31_t)0x82044ac9,\n    (q31_t)0x169bb4b7, (q31_t)0x82032e88, (q31_t)0x1695857b, (q31_t)0x82021294,\n    (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x168926da, (q31_t)0x81ffdb96,\n    (q31_t)0x1682f774, (q31_t)0x81fec08c, (q31_t)0x167cc801, (q31_t)0x81fda5cf,\n    (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x167068f0, (q31_t)0x81fb713f,\n    (q31_t)0x166a3953, (q31_t)0x81fa576c, (q31_t)0x166409a8, (q31_t)0x81f93de6,\n    (q31_t)0x165dd9f0, (q31_t)0x81f824ae, (q31_t)0x1657aa29, (q31_t)0x81f70bc3,\n    (q31_t)0x16517a55, (q31_t)0x81f5f327, (q31_t)0x164b4a73, (q31_t)0x81f4dad8,\n    (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x163eea86, (q31_t)0x81f2ab24,\n    (q31_t)0x1638ba7a, (q31_t)0x81f193be, (q31_t)0x16328a61, (q31_t)0x81f07ca6,\n    (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16262a06, (q31_t)0x81ee4f60,\n    (q31_t)0x161ff9c4, (q31_t)0x81ed3932, (q31_t)0x1619c975, (q31_t)0x81ec2351,\n    (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x160d68ad, (q31_t)0x81e9f879,\n    (q31_t)0x16073834, (q31_t)0x81e8e381, (q31_t)0x160107ae, (q31_t)0x81e7ced8,\n    (q31_t)0x15fad71b, (q31_t)0x81e6ba7c, (q31_t)0x15f4a679, (q31_t)0x81e5a66e,\n    (q31_t)0x15ee75cb, (q31_t)0x81e492ad, (q31_t)0x15e8450e, (q31_t)0x81e37f3b,\n    (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15dbe36d, (q31_t)0x81e1593f,\n    (q31_t)0x15d5b288, (q31_t)0x81e046b6, (q31_t)0x15cf8196, (q31_t)0x81df347b,\n    (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15c31f89, (q31_t)0x81dd10ee,\n    (q31_t)0x15bcee6f, (q31_t)0x81dbff9c, (q31_t)0x15b6bd47, (q31_t)0x81daee98,\n    (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x15aa5acf, (q31_t)0x81d8cd79,\n    (q31_t)0x15a4297f, (q31_t)0x81d7bd5e, (q31_t)0x159df821, (q31_t)0x81d6ad92,\n    (q31_t)0x1597c6b7, (q31_t)0x81d59e13, (q31_t)0x1591953e, (q31_t)0x81d48ee1,\n    (q31_t)0x158b63b9, (q31_t)0x81d37ffe, (q31_t)0x15853226, (q31_t)0x81d27169,\n    (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x1578ced9, (q31_t)0x81d05527,\n    (q31_t)0x15729d1f, (q31_t)0x81cf477b, (q31_t)0x156c6b57, (q31_t)0x81ce3a1d,\n    (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x156007a0, (q31_t)0x81cc204a,\n    (q31_t)0x1559d5b1, (q31_t)0x81cb13d5, (q31_t)0x1553a3b4, (q31_t)0x81ca07af,\n    (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x15473f94, (q31_t)0x81c7f04b,\n    (q31_t)0x15410d70, (q31_t)0x81c6e50d, (q31_t)0x153adb3f, (q31_t)0x81c5da1e,\n    (q31_t)0x1534a901, (q31_t)0x81c4cf7d, (q31_t)0x152e76b5, (q31_t)0x81c3c529,\n    (q31_t)0x1528445d, (q31_t)0x81c2bb23, (q31_t)0x152211f8, (q31_t)0x81c1b16b,\n    (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1515ad06, (q31_t)0x81bf9ee5,\n    (q31_t)0x150f7a7a, (q31_t)0x81be9617, (q31_t)0x150947e1, (q31_t)0x81bd8d97,\n    (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14fce287, (q31_t)0x81bb7d7f,\n    (q31_t)0x14f6afc7, (q31_t)0x81ba75e9, (q31_t)0x14f07cf9, (q31_t)0x81b96ea0,\n    (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14e41738, (q31_t)0x81b760f8,\n    (q31_t)0x14dde445, (q31_t)0x81b65a99, (q31_t)0x14d7b144, (q31_t)0x81b55488,\n    (q31_t)0x14d17e36, (q31_t)0x81b44ec4, (q31_t)0x14cb4b1c, (q31_t)0x81b3494f,\n    (q31_t)0x14c517f4, (q31_t)0x81b24427, (q31_t)0x14bee4c0, (q31_t)0x81b13f4e,\n    (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x14b27e32, (q31_t)0x81af3684,\n    (q31_t)0x14ac4ad7, (q31_t)0x81ae3294, (q31_t)0x14a61770, (q31_t)0x81ad2ef2,\n    (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x1499b07c, (q31_t)0x81ab2898,\n    (q31_t)0x14937cee, (q31_t)0x81aa25e0, (q31_t)0x148d4954, (q31_t)0x81a92376,\n    (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x1480e1fa, (q31_t)0x81a71f8b,\n    (q31_t)0x147aae3a, (q31_t)0x81a61e0b, (q31_t)0x14747a6d, (q31_t)0x81a51cd8,\n    (q31_t)0x146e4694, (q31_t)0x81a41bf4, (q31_t)0x146812ae, (q31_t)0x81a31b5d,\n    (q31_t)0x1461debc, (q31_t)0x81a21b14, (q31_t)0x145baabd, (q31_t)0x81a11b1a,\n    (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x144f4299, (q31_t)0x819f1c0e,\n    (q31_t)0x14490e74, (q31_t)0x819e1cfd, (q31_t)0x1442da43, (q31_t)0x819d1e3a,\n    (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x143671bb, (q31_t)0x819b219e,\n    (q31_t)0x14303d65, (q31_t)0x819a23c5, (q31_t)0x142a0902, (q31_t)0x8199263a,\n    (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x141da016, (q31_t)0x81972c0e,\n    (q31_t)0x14176b8e, (q31_t)0x81962f6d, (q31_t)0x141136f9, (q31_t)0x8195331a,\n    (q31_t)0x140b0258, (q31_t)0x81943715, (q31_t)0x1404cdaa, (q31_t)0x81933b5e,\n    (q31_t)0x13fe98f1, (q31_t)0x81923ff4, (q31_t)0x13f8642a, (q31_t)0x819144d9,\n    (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13ebfa79, (q31_t)0x818f4f8d,\n    (q31_t)0x13e5c58e, (q31_t)0x818e555c, (q31_t)0x13df9097, (q31_t)0x818d5b78,\n    (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13d32683, (q31_t)0x818b689c,\n    (q31_t)0x13ccf167, (q31_t)0x818a6fa3, (q31_t)0x13c6bc3f, (q31_t)0x818976f8,\n    (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13ba51ca, (q31_t)0x8187868b,\n    (q31_t)0x13b41c7d, (q31_t)0x81868eca, (q31_t)0x13ade724, (q31_t)0x81859757,\n    (q31_t)0x13a7b1bf, (q31_t)0x8184a032, (q31_t)0x13a17c4d, (q31_t)0x8183a95b,\n    (q31_t)0x139b46d0, (q31_t)0x8182b2d1, (q31_t)0x13951146, (q31_t)0x8181bc96,\n    (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x1388a60f, (q31_t)0x817fd10a,\n    (q31_t)0x13827062, (q31_t)0x817edbb9, (q31_t)0x137c3aa8, (q31_t)0x817de6b6,\n    (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x136fcf10, (q31_t)0x817bfd9b,\n    (q31_t)0x13699933, (q31_t)0x817b0982, (q31_t)0x13636349, (q31_t)0x817a15b7,\n    (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x1356f752, (q31_t)0x81782f0b,\n    (q31_t)0x1350c144, (q31_t)0x81773c2b, (q31_t)0x134a8b2b, (q31_t)0x81764998,\n    (q31_t)0x13445505, (q31_t)0x81755754, (q31_t)0x133e1ed4, (q31_t)0x8174655d,\n    (q31_t)0x1337e897, (q31_t)0x817373b5, (q31_t)0x1331b24e, (q31_t)0x8172825a,\n    (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x13254599, (q31_t)0x8170a090,\n    (q31_t)0x131f0f2c, (q31_t)0x816fb020, (q31_t)0x1318d8b4, (q31_t)0x816ebffe,\n    (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x130c6ba0, (q31_t)0x816ce0a4,\n    (q31_t)0x13063505, (q31_t)0x816bf16c, (q31_t)0x12fffe5d, (q31_t)0x816b0282,\n    (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12f390ec, (q31_t)0x81692599,\n    (q31_t)0x12ed5a21, (q31_t)0x81683799, (q31_t)0x12e7234b, (q31_t)0x816749e8,\n    (q31_t)0x12e0ec6a, (q31_t)0x81665c84, (q31_t)0x12dab57c, (q31_t)0x81656f6f,\n    (q31_t)0x12d47e83, (q31_t)0x816482a8, (q31_t)0x12ce477f, (q31_t)0x8163962f,\n    (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12c1d953, (q31_t)0x8161be27,\n    (q31_t)0x12bba22b, (q31_t)0x8160d298, (q31_t)0x12b56af9, (q31_t)0x815fe758,\n    (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x12a8fc70, (q31_t)0x815e11c1,\n    (q31_t)0x12a2c51b, (q31_t)0x815d276a, (q31_t)0x129c8dba, (q31_t)0x815c3d62,\n    (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x12901ed5, (q31_t)0x815a6a3c,\n    (q31_t)0x1289e752, (q31_t)0x8159811e, (q31_t)0x1283afc3, (q31_t)0x8158984e,\n    (q31_t)0x127d7829, (q31_t)0x8157afcd, (q31_t)0x12774083, (q31_t)0x8156c799,\n    (q31_t)0x127108d2, (q31_t)0x8155dfb4, (q31_t)0x126ad116, (q31_t)0x8154f81d,\n    (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x125e617b, (q31_t)0x815329d9,\n    (q31_t)0x1258299c, (q31_t)0x8152432c, (q31_t)0x1251f1b3, (q31_t)0x81515ccd,\n    (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x124581bd, (q31_t)0x814f90fb,\n    (q31_t)0x123f49b2, (q31_t)0x814eab86, (q31_t)0x1239119b, (q31_t)0x814dc660,\n    (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x122ca14b, (q31_t)0x814bfcff,\n    (q31_t)0x12266913, (q31_t)0x814b18c3, (q31_t)0x122030cf, (q31_t)0x814a34d6,\n    (q31_t)0x1219f880, (q31_t)0x81495136, (q31_t)0x1213c026, (q31_t)0x81486de5,\n    (q31_t)0x120d87c1, (q31_t)0x81478ae2, (q31_t)0x12074f50, (q31_t)0x8146a82e,\n    (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11fade4e, (q31_t)0x8144e3ae,\n    (q31_t)0x11f4a5bd, (q31_t)0x814401e4, (q31_t)0x11ee6d20, (q31_t)0x81432068,\n    (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11e1fbc5, (q31_t)0x81415e5a,\n    (q31_t)0x11dbc307, (q31_t)0x81407dc9, (q31_t)0x11d58a3e, (q31_t)0x813f9d86,\n    (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11c9188b, (q31_t)0x813ddde9,\n    (q31_t)0x11c2dfa2, (q31_t)0x813cfe91, (q31_t)0x11bca6ad, (q31_t)0x813c1f86,\n    (q31_t)0x11b66dad, (q31_t)0x813b40ca, (q31_t)0x11b034a2, (q31_t)0x813a625b,\n    (q31_t)0x11a9fb8d, (q31_t)0x8139843b, (q31_t)0x11a3c26c, (q31_t)0x8138a66a,\n    (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1197500a, (q31_t)0x8136ebb1,\n    (q31_t)0x119116c9, (q31_t)0x81360ec9, (q31_t)0x118add7d, (q31_t)0x81353230,\n    (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x117e6ac5, (q31_t)0x813379e9,\n    (q31_t)0x11783159, (q31_t)0x81329e3b, (q31_t)0x1171f7e2, (q31_t)0x8131c2db,\n    (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x116584d3, (q31_t)0x81300d05,\n    (q31_t)0x115f4b3c, (q31_t)0x812f3290, (q31_t)0x1159119a, (q31_t)0x812e5868,\n    (q31_t)0x1152d7ed, (q31_t)0x812d7e8f, (q31_t)0x114c9e35, (q31_t)0x812ca505,\n    (q31_t)0x11466473, (q31_t)0x812bcbc8, (q31_t)0x11402aa6, (q31_t)0x812af2da,\n    (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x1133b6ed, (q31_t)0x812941e8,\n    (q31_t)0x112d7d00, (q31_t)0x812869e4, (q31_t)0x11274309, (q31_t)0x8127922f,\n    (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x111acefb, (q31_t)0x8125e3af,\n    (q31_t)0x111494e4, (q31_t)0x81250ce4, (q31_t)0x110e5ac2, (q31_t)0x81243668,\n    (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x1101e65f, (q31_t)0x81228a5a,\n    (q31_t)0x10fbac1e, (q31_t)0x8121b4c8, (q31_t)0x10f571d3, (q31_t)0x8120df85,\n    (q31_t)0x10ef377d, (q31_t)0x81200a90, (q31_t)0x10e8fd1c, (q31_t)0x811f35e9,\n    (q31_t)0x10e2c2b2, (q31_t)0x811e6191, (q31_t)0x10dc883c, (q31_t)0x811d8d86,\n    (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10d01333, (q31_t)0x811be65d,\n    (q31_t)0x10c9d89e, (q31_t)0x811b133d, (q31_t)0x10c39dff, (q31_t)0x811a406c,\n    (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10b728a3, (q31_t)0x81189bb4,\n    (q31_t)0x10b0ede5, (q31_t)0x8117c9ce, (q31_t)0x10aab31d, (q31_t)0x8116f836,\n    (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x109e3d6e, (q31_t)0x811555f1,\n    (q31_t)0x10980287, (q31_t)0x81148544, (q31_t)0x1091c796, (q31_t)0x8113b4e5,\n    (q31_t)0x108b8c9b, (q31_t)0x8112e4d4, (q31_t)0x10855195, (q31_t)0x81121512,\n    (q31_t)0x107f1686, (q31_t)0x8111459e, (q31_t)0x1078db6c, (q31_t)0x81107678,\n    (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x106c651a, (q31_t)0x810ed917,\n    (q31_t)0x106629e1, (q31_t)0x810e0adc, (q31_t)0x105fee9f, (q31_t)0x810d3cf0,\n    (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x105377fc, (q31_t)0x810ba202,\n    (q31_t)0x104d3c9b, (q31_t)0x810ad500, (q31_t)0x10470130, (q31_t)0x810a084d,\n    (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x103a8a3d, (q31_t)0x81086fd1,\n    (q31_t)0x10344eb4, (q31_t)0x8107a409, (q31_t)0x102e1321, (q31_t)0x8106d88f,\n    (q31_t)0x1027d784, (q31_t)0x81060d63, (q31_t)0x10219bdd, (q31_t)0x81054286,\n    (q31_t)0x101b602d, (q31_t)0x810477f7, (q31_t)0x10152472, (q31_t)0x8103adb6,\n    (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0x1008acdf, (q31_t)0x81021a20,\n    (q31_t)0x10027107, (q31_t)0x810150ca, (q31_t)0xffc3524,  (q31_t)0x810087c3,\n    (q31_t)0xff5f938,  (q31_t)0x80ffbf0a, (q31_t)0xfefbd42,  (q31_t)0x80fef69f,\n    (q31_t)0xfe98143,  (q31_t)0x80fe2e83, (q31_t)0xfe34539,  (q31_t)0x80fd66b5,\n    (q31_t)0xfdd0926,  (q31_t)0x80fc9f35, (q31_t)0xfd6cd08,  (q31_t)0x80fbd804,\n    (q31_t)0xfd090e1,  (q31_t)0x80fb1121, (q31_t)0xfca54b1,  (q31_t)0x80fa4a8c,\n    (q31_t)0xfc41876,  (q31_t)0x80f98446, (q31_t)0xfbddc32,  (q31_t)0x80f8be4e,\n    (q31_t)0xfb79fe4,  (q31_t)0x80f7f8a4, (q31_t)0xfb1638d,  (q31_t)0x80f73349,\n    (q31_t)0xfab272b,  (q31_t)0x80f66e3c, (q31_t)0xfa4eac0,  (q31_t)0x80f5a97e,\n    (q31_t)0xf9eae4c,  (q31_t)0x80f4e50e, (q31_t)0xf9871ce,  (q31_t)0x80f420ec,\n    (q31_t)0xf923546,  (q31_t)0x80f35d19, (q31_t)0xf8bf8b4,  (q31_t)0x80f29994,\n    (q31_t)0xf85bc19,  (q31_t)0x80f1d65d, (q31_t)0xf7f7f75,  (q31_t)0x80f11375,\n    (q31_t)0xf7942c7,  (q31_t)0x80f050db, (q31_t)0xf73060f,  (q31_t)0x80ef8e90,\n    (q31_t)0xf6cc94e,  (q31_t)0x80eecc93, (q31_t)0xf668c83,  (q31_t)0x80ee0ae4,\n    (q31_t)0xf604faf,  (q31_t)0x80ed4984, (q31_t)0xf5a12d1,  (q31_t)0x80ec8872,\n    (q31_t)0xf53d5ea,  (q31_t)0x80ebc7ae, (q31_t)0xf4d98f9,  (q31_t)0x80eb0739,\n    (q31_t)0xf475bff,  (q31_t)0x80ea4712, (q31_t)0xf411efb,  (q31_t)0x80e9873a,\n    (q31_t)0xf3ae1ee,  (q31_t)0x80e8c7b0, (q31_t)0xf34a4d8,  (q31_t)0x80e80874,\n    (q31_t)0xf2e67b8,  (q31_t)0x80e74987, (q31_t)0xf282a8f,  (q31_t)0x80e68ae8,\n    (q31_t)0xf21ed5d,  (q31_t)0x80e5cc98, (q31_t)0xf1bb021,  (q31_t)0x80e50e96,\n    (q31_t)0xf1572dc,  (q31_t)0x80e450e2, (q31_t)0xf0f358e,  (q31_t)0x80e3937d,\n    (q31_t)0xf08f836,  (q31_t)0x80e2d666, (q31_t)0xf02bad5,  (q31_t)0x80e2199e,\n    (q31_t)0xefc7d6b,  (q31_t)0x80e15d24, (q31_t)0xef63ff7,  (q31_t)0x80e0a0f8,\n    (q31_t)0xef0027b,  (q31_t)0x80dfe51b, (q31_t)0xee9c4f5,  (q31_t)0x80df298c,\n    (q31_t)0xee38766,  (q31_t)0x80de6e4c, (q31_t)0xedd49ce,  (q31_t)0x80ddb35a,\n    (q31_t)0xed70c2c,  (q31_t)0x80dcf8b7, (q31_t)0xed0ce82,  (q31_t)0x80dc3e62,\n    (q31_t)0xeca90ce,  (q31_t)0x80db845b, (q31_t)0xec45311,  (q31_t)0x80dacaa3,\n    (q31_t)0xebe154b,  (q31_t)0x80da1139, (q31_t)0xeb7d77c,  (q31_t)0x80d9581e,\n    (q31_t)0xeb199a4,  (q31_t)0x80d89f51, (q31_t)0xeab5bc3,  (q31_t)0x80d7e6d3,\n    (q31_t)0xea51dd8,  (q31_t)0x80d72ea3, (q31_t)0xe9edfe5,  (q31_t)0x80d676c1,\n    (q31_t)0xe98a1e9,  (q31_t)0x80d5bf2e, (q31_t)0xe9263e3,  (q31_t)0x80d507e9,\n    (q31_t)0xe8c25d5,  (q31_t)0x80d450f3, (q31_t)0xe85e7be,  (q31_t)0x80d39a4b,\n    (q31_t)0xe7fa99e,  (q31_t)0x80d2e3f2, (q31_t)0xe796b74,  (q31_t)0x80d22de7,\n    (q31_t)0xe732d42,  (q31_t)0x80d1782a, (q31_t)0xe6cef07,  (q31_t)0x80d0c2bc,\n    (q31_t)0xe66b0c3,  (q31_t)0x80d00d9d, (q31_t)0xe607277,  (q31_t)0x80cf58cc,\n    (q31_t)0xe5a3421,  (q31_t)0x80cea449, (q31_t)0xe53f5c2,  (q31_t)0x80cdf015,\n    (q31_t)0xe4db75b,  (q31_t)0x80cd3c2f, (q31_t)0xe4778eb,  (q31_t)0x80cc8898,\n    (q31_t)0xe413a72,  (q31_t)0x80cbd54f, (q31_t)0xe3afbf0,  (q31_t)0x80cb2255,\n    (q31_t)0xe34bd66,  (q31_t)0x80ca6fa9, (q31_t)0xe2e7ed2,  (q31_t)0x80c9bd4c,\n    (q31_t)0xe284036,  (q31_t)0x80c90b3d, (q31_t)0xe220191,  (q31_t)0x80c8597c,\n    (q31_t)0xe1bc2e4,  (q31_t)0x80c7a80a, (q31_t)0xe15842e,  (q31_t)0x80c6f6e7,\n    (q31_t)0xe0f456f,  (q31_t)0x80c64612, (q31_t)0xe0906a7,  (q31_t)0x80c5958b,\n    (q31_t)0xe02c7d7,  (q31_t)0x80c4e553, (q31_t)0xdfc88fe,  (q31_t)0x80c4356a,\n    (q31_t)0xdf64a1c,  (q31_t)0x80c385cf, (q31_t)0xdf00b32,  (q31_t)0x80c2d682,\n    (q31_t)0xde9cc40,  (q31_t)0x80c22784, (q31_t)0xde38d44,  (q31_t)0x80c178d4,\n    (q31_t)0xddd4e40,  (q31_t)0x80c0ca73, (q31_t)0xdd70f34,  (q31_t)0x80c01c60,\n    (q31_t)0xdd0d01f,  (q31_t)0x80bf6e9c, (q31_t)0xdca9102,  (q31_t)0x80bec127,\n    (q31_t)0xdc451dc,  (q31_t)0x80be13ff, (q31_t)0xdbe12ad,  (q31_t)0x80bd6727,\n    (q31_t)0xdb7d376,  (q31_t)0x80bcba9d, (q31_t)0xdb19437,  (q31_t)0x80bc0e61,\n    (q31_t)0xdab54ef,  (q31_t)0x80bb6274, (q31_t)0xda5159f,  (q31_t)0x80bab6d5,\n    (q31_t)0xd9ed646,  (q31_t)0x80ba0b85, (q31_t)0xd9896e5,  (q31_t)0x80b96083,\n    (q31_t)0xd92577b,  (q31_t)0x80b8b5d0, (q31_t)0xd8c1809,  (q31_t)0x80b80b6c,\n    (q31_t)0xd85d88f,  (q31_t)0x80b76156, (q31_t)0xd7f990c,  (q31_t)0x80b6b78e,\n    (q31_t)0xd795982,  (q31_t)0x80b60e15, (q31_t)0xd7319ee,  (q31_t)0x80b564ea,\n    (q31_t)0xd6cda53,  (q31_t)0x80b4bc0e, (q31_t)0xd669aaf,  (q31_t)0x80b41381,\n    (q31_t)0xd605b03,  (q31_t)0x80b36b42, (q31_t)0xd5a1b4f,  (q31_t)0x80b2c351,\n    (q31_t)0xd53db92,  (q31_t)0x80b21baf, (q31_t)0xd4d9bcd,  (q31_t)0x80b1745c,\n    (q31_t)0xd475c00,  (q31_t)0x80b0cd57, (q31_t)0xd411c2b,  (q31_t)0x80b026a1,\n    (q31_t)0xd3adc4e,  (q31_t)0x80af8039, (q31_t)0xd349c68,  (q31_t)0x80aeda20,\n    (q31_t)0xd2e5c7b,  (q31_t)0x80ae3455, (q31_t)0xd281c85,  (q31_t)0x80ad8ed9,\n    (q31_t)0xd21dc87,  (q31_t)0x80ace9ab, (q31_t)0xd1b9c81,  (q31_t)0x80ac44cc,\n    (q31_t)0xd155c73,  (q31_t)0x80aba03b, (q31_t)0xd0f1c5d,  (q31_t)0x80aafbf9,\n    (q31_t)0xd08dc3f,  (q31_t)0x80aa5806, (q31_t)0xd029c18,  (q31_t)0x80a9b461,\n    (q31_t)0xcfc5bea,  (q31_t)0x80a9110b, (q31_t)0xcf61bb4,  (q31_t)0x80a86e03,\n    (q31_t)0xcefdb76,  (q31_t)0x80a7cb49, (q31_t)0xce99b2f,  (q31_t)0x80a728df,\n    (q31_t)0xce35ae1,  (q31_t)0x80a686c2, (q31_t)0xcdd1a8b,  (q31_t)0x80a5e4f5,\n    (q31_t)0xcd6da2d,  (q31_t)0x80a54376, (q31_t)0xcd099c7,  (q31_t)0x80a4a245,\n    (q31_t)0xcca5959,  (q31_t)0x80a40163, (q31_t)0xcc418e3,  (q31_t)0x80a360d0,\n    (q31_t)0xcbdd865,  (q31_t)0x80a2c08b, (q31_t)0xcb797e0,  (q31_t)0x80a22095,\n    (q31_t)0xcb15752,  (q31_t)0x80a180ed, (q31_t)0xcab16bd,  (q31_t)0x80a0e194,\n    (q31_t)0xca4d620,  (q31_t)0x80a04289, (q31_t)0xc9e957b,  (q31_t)0x809fa3cd,\n    (q31_t)0xc9854cf,  (q31_t)0x809f0560, (q31_t)0xc92141a,  (q31_t)0x809e6741,\n    (q31_t)0xc8bd35e,  (q31_t)0x809dc971, (q31_t)0xc85929a,  (q31_t)0x809d2bef,\n    (q31_t)0xc7f51cf,  (q31_t)0x809c8ebc, (q31_t)0xc7910fb,  (q31_t)0x809bf1d7,\n    (q31_t)0xc72d020,  (q31_t)0x809b5541, (q31_t)0xc6c8f3e,  (q31_t)0x809ab8fa,\n    (q31_t)0xc664e53,  (q31_t)0x809a1d01, (q31_t)0xc600d61,  (q31_t)0x80998157,\n    (q31_t)0xc59cc68,  (q31_t)0x8098e5fb, (q31_t)0xc538b66,  (q31_t)0x80984aee,\n    (q31_t)0xc4d4a5d,  (q31_t)0x8097b030, (q31_t)0xc47094d,  (q31_t)0x809715c0,\n    (q31_t)0xc40c835,  (q31_t)0x80967b9f, (q31_t)0xc3a8715,  (q31_t)0x8095e1cc,\n    (q31_t)0xc3445ee,  (q31_t)0x80954848, (q31_t)0xc2e04c0,  (q31_t)0x8094af13,\n    (q31_t)0xc27c389,  (q31_t)0x8094162c, (q31_t)0xc21824c,  (q31_t)0x80937d93,\n    (q31_t)0xc1b4107,  (q31_t)0x8092e54a, (q31_t)0xc14ffba,  (q31_t)0x80924d4f,\n    (q31_t)0xc0ebe66,  (q31_t)0x8091b5a2, (q31_t)0xc087d0a,  (q31_t)0x80911e44,\n    (q31_t)0xc023ba7,  (q31_t)0x80908735, (q31_t)0xbfbfa3d,  (q31_t)0x808ff074,\n    (q31_t)0xbf5b8cb,  (q31_t)0x808f5a02, (q31_t)0xbef7752,  (q31_t)0x808ec3df,\n    (q31_t)0xbe935d2,  (q31_t)0x808e2e0a, (q31_t)0xbe2f44a,  (q31_t)0x808d9884,\n    (q31_t)0xbdcb2bb,  (q31_t)0x808d034c, (q31_t)0xbd67124,  (q31_t)0x808c6e63,\n    (q31_t)0xbd02f87,  (q31_t)0x808bd9c9, (q31_t)0xbc9ede2,  (q31_t)0x808b457d,\n    (q31_t)0xbc3ac35,  (q31_t)0x808ab180, (q31_t)0xbbd6a82,  (q31_t)0x808a1dd2,\n    (q31_t)0xbb728c7,  (q31_t)0x80898a72, (q31_t)0xbb0e705,  (q31_t)0x8088f761,\n    (q31_t)0xbaaa53b,  (q31_t)0x8088649e, (q31_t)0xba4636b,  (q31_t)0x8087d22a,\n    (q31_t)0xb9e2193,  (q31_t)0x80874005, (q31_t)0xb97dfb5,  (q31_t)0x8086ae2e,\n    (q31_t)0xb919dcf,  (q31_t)0x80861ca6, (q31_t)0xb8b5be1,  (q31_t)0x80858b6c,\n    (q31_t)0xb8519ed,  (q31_t)0x8084fa82, (q31_t)0xb7ed7f2,  (q31_t)0x808469e5,\n    (q31_t)0xb7895f0,  (q31_t)0x8083d998, (q31_t)0xb7253e6,  (q31_t)0x80834999,\n    (q31_t)0xb6c11d5,  (q31_t)0x8082b9e9, (q31_t)0xb65cfbe,  (q31_t)0x80822a87,\n    (q31_t)0xb5f8d9f,  (q31_t)0x80819b74, (q31_t)0xb594b7a,  (q31_t)0x80810cb0,\n    (q31_t)0xb53094d,  (q31_t)0x80807e3a, (q31_t)0xb4cc719,  (q31_t)0x807ff013,\n    (q31_t)0xb4684df,  (q31_t)0x807f623b, (q31_t)0xb40429d,  (q31_t)0x807ed4b1,\n    (q31_t)0xb3a0055,  (q31_t)0x807e4776, (q31_t)0xb33be05,  (q31_t)0x807dba89,\n    (q31_t)0xb2d7baf,  (q31_t)0x807d2dec, (q31_t)0xb273952,  (q31_t)0x807ca19c,\n    (q31_t)0xb20f6ee,  (q31_t)0x807c159c, (q31_t)0xb1ab483,  (q31_t)0x807b89ea,\n    (q31_t)0xb147211,  (q31_t)0x807afe87, (q31_t)0xb0e2f98,  (q31_t)0x807a7373,\n    (q31_t)0xb07ed19,  (q31_t)0x8079e8ad, (q31_t)0xb01aa92,  (q31_t)0x80795e36,\n    (q31_t)0xafb6805,  (q31_t)0x8078d40d, (q31_t)0xaf52571,  (q31_t)0x80784a33,\n    (q31_t)0xaeee2d7,  (q31_t)0x8077c0a8, (q31_t)0xae8a036,  (q31_t)0x8077376c,\n    (q31_t)0xae25d8d,  (q31_t)0x8076ae7e, (q31_t)0xadc1adf,  (q31_t)0x807625df,\n    (q31_t)0xad5d829,  (q31_t)0x80759d8e, (q31_t)0xacf956d,  (q31_t)0x8075158c,\n    (q31_t)0xac952aa,  (q31_t)0x80748dd9, (q31_t)0xac30fe1,  (q31_t)0x80740675,\n    (q31_t)0xabccd11,  (q31_t)0x80737f5f, (q31_t)0xab68a3a,  (q31_t)0x8072f898,\n    (q31_t)0xab0475c,  (q31_t)0x8072721f, (q31_t)0xaaa0478,  (q31_t)0x8071ebf6,\n    (q31_t)0xaa3c18e,  (q31_t)0x8071661a, (q31_t)0xa9d7e9d,  (q31_t)0x8070e08e,\n    (q31_t)0xa973ba5,  (q31_t)0x80705b50, (q31_t)0xa90f8a7,  (q31_t)0x806fd661,\n    (q31_t)0xa8ab5a2,  (q31_t)0x806f51c1, (q31_t)0xa847297,  (q31_t)0x806ecd6f,\n    (q31_t)0xa7e2f85,  (q31_t)0x806e496c, (q31_t)0xa77ec6d,  (q31_t)0x806dc5b8,\n    (q31_t)0xa71a94f,  (q31_t)0x806d4253, (q31_t)0xa6b662a,  (q31_t)0x806cbf3c,\n    (q31_t)0xa6522fe,  (q31_t)0x806c3c74, (q31_t)0xa5edfcc,  (q31_t)0x806bb9fa,\n    (q31_t)0xa589c94,  (q31_t)0x806b37cf, (q31_t)0xa525955,  (q31_t)0x806ab5f3,\n    (q31_t)0xa4c1610,  (q31_t)0x806a3466, (q31_t)0xa45d2c5,  (q31_t)0x8069b327,\n    (q31_t)0xa3f8f73,  (q31_t)0x80693237, (q31_t)0xa394c1b,  (q31_t)0x8068b196,\n    (q31_t)0xa3308bd,  (q31_t)0x80683143, (q31_t)0xa2cc558,  (q31_t)0x8067b13f,\n    (q31_t)0xa2681ed,  (q31_t)0x8067318a, (q31_t)0xa203e7c,  (q31_t)0x8066b224,\n    (q31_t)0xa19fb04,  (q31_t)0x8066330c, (q31_t)0xa13b787,  (q31_t)0x8065b443,\n    (q31_t)0xa0d7403,  (q31_t)0x806535c9, (q31_t)0xa073079,  (q31_t)0x8064b79d,\n    (q31_t)0xa00ece8,  (q31_t)0x806439c0, (q31_t)0x9faa952,  (q31_t)0x8063bc32,\n    (q31_t)0x9f465b5,  (q31_t)0x80633ef3, (q31_t)0x9ee2213,  (q31_t)0x8062c202,\n    (q31_t)0x9e7de6a,  (q31_t)0x80624560, (q31_t)0x9e19abb,  (q31_t)0x8061c90c,\n    (q31_t)0x9db5706,  (q31_t)0x80614d08, (q31_t)0x9d5134b,  (q31_t)0x8060d152,\n    (q31_t)0x9cecf89,  (q31_t)0x806055eb, (q31_t)0x9c88bc2,  (q31_t)0x805fdad2,\n    (q31_t)0x9c247f5,  (q31_t)0x805f6009, (q31_t)0x9bc0421,  (q31_t)0x805ee58e,\n    (q31_t)0x9b5c048,  (q31_t)0x805e6b62, (q31_t)0x9af7c69,  (q31_t)0x805df184,\n    (q31_t)0x9a93884,  (q31_t)0x805d77f5, (q31_t)0x9a2f498,  (q31_t)0x805cfeb5,\n    (q31_t)0x99cb0a7,  (q31_t)0x805c85c4, (q31_t)0x9966cb0,  (q31_t)0x805c0d21,\n    (q31_t)0x99028b3,  (q31_t)0x805b94ce, (q31_t)0x989e4b0,  (q31_t)0x805b1cc8,\n    (q31_t)0x983a0a7,  (q31_t)0x805aa512, (q31_t)0x97d5c99,  (q31_t)0x805a2daa,\n    (q31_t)0x9771884,  (q31_t)0x8059b692, (q31_t)0x970d46a,  (q31_t)0x80593fc7,\n    (q31_t)0x96a9049,  (q31_t)0x8058c94c, (q31_t)0x9644c23,  (q31_t)0x8058531f,\n    (q31_t)0x95e07f8,  (q31_t)0x8057dd41, (q31_t)0x957c3c6,  (q31_t)0x805767b2,\n    (q31_t)0x9517f8f,  (q31_t)0x8056f272, (q31_t)0x94b3b52,  (q31_t)0x80567d80,\n    (q31_t)0x944f70f,  (q31_t)0x805608dd, (q31_t)0x93eb2c6,  (q31_t)0x80559489,\n    (q31_t)0x9386e78,  (q31_t)0x80552084, (q31_t)0x9322a24,  (q31_t)0x8054accd,\n    (q31_t)0x92be5ca,  (q31_t)0x80543965, (q31_t)0x925a16b,  (q31_t)0x8053c64c,\n    (q31_t)0x91f5d06,  (q31_t)0x80535381, (q31_t)0x919189c,  (q31_t)0x8052e106,\n    (q31_t)0x912d42c,  (q31_t)0x80526ed9, (q31_t)0x90c8fb6,  (q31_t)0x8051fcfb,\n    (q31_t)0x9064b3a,  (q31_t)0x80518b6b, (q31_t)0x90006ba,  (q31_t)0x80511a2b,\n    (q31_t)0x8f9c233,  (q31_t)0x8050a939, (q31_t)0x8f37da7,  (q31_t)0x80503896,\n    (q31_t)0x8ed3916,  (q31_t)0x804fc841, (q31_t)0x8e6f47f,  (q31_t)0x804f583c,\n    (q31_t)0x8e0afe2,  (q31_t)0x804ee885, (q31_t)0x8da6b40,  (q31_t)0x804e791d,\n    (q31_t)0x8d42699,  (q31_t)0x804e0a04, (q31_t)0x8cde1ec,  (q31_t)0x804d9b39,\n    (q31_t)0x8c79d3a,  (q31_t)0x804d2cbd, (q31_t)0x8c15882,  (q31_t)0x804cbe90,\n    (q31_t)0x8bb13c5,  (q31_t)0x804c50b2, (q31_t)0x8b4cf02,  (q31_t)0x804be323,\n    (q31_t)0x8ae8a3a,  (q31_t)0x804b75e2, (q31_t)0x8a8456d,  (q31_t)0x804b08f0,\n    (q31_t)0x8a2009a,  (q31_t)0x804a9c4d, (q31_t)0x89bbbc3,  (q31_t)0x804a2ff9,\n    (q31_t)0x89576e5,  (q31_t)0x8049c3f3, (q31_t)0x88f3203,  (q31_t)0x8049583d,\n    (q31_t)0x888ed1b,  (q31_t)0x8048ecd5, (q31_t)0x882a82e,  (q31_t)0x804881bb,\n    (q31_t)0x87c633c,  (q31_t)0x804816f1, (q31_t)0x8761e44,  (q31_t)0x8047ac75,\n    (q31_t)0x86fd947,  (q31_t)0x80474248, (q31_t)0x8699445,  (q31_t)0x8046d86a,\n    (q31_t)0x8634f3e,  (q31_t)0x80466edb, (q31_t)0x85d0a32,  (q31_t)0x8046059b,\n    (q31_t)0x856c520,  (q31_t)0x80459ca9, (q31_t)0x850800a,  (q31_t)0x80453406,\n    (q31_t)0x84a3aee,  (q31_t)0x8044cbb2, (q31_t)0x843f5cd,  (q31_t)0x804463ad,\n    (q31_t)0x83db0a7,  (q31_t)0x8043fbf6, (q31_t)0x8376b7c,  (q31_t)0x8043948e,\n    (q31_t)0x831264c,  (q31_t)0x80432d75, (q31_t)0x82ae117,  (q31_t)0x8042c6ab,\n    (q31_t)0x8249bdd,  (q31_t)0x80426030, (q31_t)0x81e569d,  (q31_t)0x8041fa03,\n    (q31_t)0x8181159,  (q31_t)0x80419425, (q31_t)0x811cc10,  (q31_t)0x80412e96,\n    (q31_t)0x80b86c2,  (q31_t)0x8040c956, (q31_t)0x805416e,  (q31_t)0x80406465,\n    (q31_t)0x7fefc16,  (q31_t)0x803fffc2, (q31_t)0x7f8b6b9,  (q31_t)0x803f9b6f,\n    (q31_t)0x7f27157,  (q31_t)0x803f376a, (q31_t)0x7ec2bf0,  (q31_t)0x803ed3b3,\n    (q31_t)0x7e5e685,  (q31_t)0x803e704c, (q31_t)0x7dfa114,  (q31_t)0x803e0d34,\n    (q31_t)0x7d95b9e,  (q31_t)0x803daa6a, (q31_t)0x7d31624,  (q31_t)0x803d47ef,\n    (q31_t)0x7ccd0a5,  (q31_t)0x803ce5c3, (q31_t)0x7c68b21,  (q31_t)0x803c83e5,\n    (q31_t)0x7c04598,  (q31_t)0x803c2257, (q31_t)0x7ba000b,  (q31_t)0x803bc117,\n    (q31_t)0x7b3ba78,  (q31_t)0x803b6026, (q31_t)0x7ad74e1,  (q31_t)0x803aff84,\n    (q31_t)0x7a72f45,  (q31_t)0x803a9f31, (q31_t)0x7a0e9a5,  (q31_t)0x803a3f2d,\n    (q31_t)0x79aa400,  (q31_t)0x8039df77, (q31_t)0x7945e56,  (q31_t)0x80398010,\n    (q31_t)0x78e18a7,  (q31_t)0x803920f8, (q31_t)0x787d2f4,  (q31_t)0x8038c22f,\n    (q31_t)0x7818d3c,  (q31_t)0x803863b5, (q31_t)0x77b4780,  (q31_t)0x80380589,\n    (q31_t)0x77501be,  (q31_t)0x8037a7ac, (q31_t)0x76ebbf9,  (q31_t)0x80374a1f,\n    (q31_t)0x768762e,  (q31_t)0x8036ece0, (q31_t)0x762305f,  (q31_t)0x80368fef,\n    (q31_t)0x75bea8c,  (q31_t)0x8036334e, (q31_t)0x755a4b4,  (q31_t)0x8035d6fb,\n    (q31_t)0x74f5ed7,  (q31_t)0x80357af8, (q31_t)0x74918f6,  (q31_t)0x80351f43,\n    (q31_t)0x742d311,  (q31_t)0x8034c3dd, (q31_t)0x73c8d27,  (q31_t)0x803468c5,\n    (q31_t)0x7364738,  (q31_t)0x80340dfd, (q31_t)0x7300145,  (q31_t)0x8033b383,\n    (q31_t)0x729bb4e,  (q31_t)0x80335959, (q31_t)0x7237552,  (q31_t)0x8032ff7d,\n    (q31_t)0x71d2f52,  (q31_t)0x8032a5ef, (q31_t)0x716e94e,  (q31_t)0x80324cb1,\n    (q31_t)0x710a345,  (q31_t)0x8031f3c2, (q31_t)0x70a5d37,  (q31_t)0x80319b21,\n    (q31_t)0x7041726,  (q31_t)0x803142cf, (q31_t)0x6fdd110,  (q31_t)0x8030eacd,\n    (q31_t)0x6f78af6,  (q31_t)0x80309318, (q31_t)0x6f144d7,  (q31_t)0x80303bb3,\n    (q31_t)0x6eafeb4,  (q31_t)0x802fe49d, (q31_t)0x6e4b88d,  (q31_t)0x802f8dd5,\n    (q31_t)0x6de7262,  (q31_t)0x802f375d, (q31_t)0x6d82c32,  (q31_t)0x802ee133,\n    (q31_t)0x6d1e5fe,  (q31_t)0x802e8b58, (q31_t)0x6cb9fc6,  (q31_t)0x802e35cb,\n    (q31_t)0x6c5598a,  (q31_t)0x802de08e, (q31_t)0x6bf1349,  (q31_t)0x802d8ba0,\n    (q31_t)0x6b8cd05,  (q31_t)0x802d3700, (q31_t)0x6b286bc,  (q31_t)0x802ce2af,\n    (q31_t)0x6ac406f,  (q31_t)0x802c8ead, (q31_t)0x6a5fa1e,  (q31_t)0x802c3afa,\n    (q31_t)0x69fb3c9,  (q31_t)0x802be796, (q31_t)0x6996d70,  (q31_t)0x802b9480,\n    (q31_t)0x6932713,  (q31_t)0x802b41ba, (q31_t)0x68ce0b2,  (q31_t)0x802aef42,\n    (q31_t)0x6869a4c,  (q31_t)0x802a9d19, (q31_t)0x68053e3,  (q31_t)0x802a4b3f,\n    (q31_t)0x67a0d76,  (q31_t)0x8029f9b4, (q31_t)0x673c704,  (q31_t)0x8029a878,\n    (q31_t)0x66d808f,  (q31_t)0x8029578b, (q31_t)0x6673a16,  (q31_t)0x802906ec,\n    (q31_t)0x660f398,  (q31_t)0x8028b69c, (q31_t)0x65aad17,  (q31_t)0x8028669b,\n    (q31_t)0x6546692,  (q31_t)0x802816e9, (q31_t)0x64e2009,  (q31_t)0x8027c786,\n    (q31_t)0x647d97c,  (q31_t)0x80277872, (q31_t)0x64192eb,  (q31_t)0x802729ad,\n    (q31_t)0x63b4c57,  (q31_t)0x8026db36, (q31_t)0x63505be,  (q31_t)0x80268d0e,\n    (q31_t)0x62ebf22,  (q31_t)0x80263f36, (q31_t)0x6287882,  (q31_t)0x8025f1ac,\n    (q31_t)0x62231de,  (q31_t)0x8025a471, (q31_t)0x61beb36,  (q31_t)0x80255784,\n    (q31_t)0x615a48b,  (q31_t)0x80250ae7, (q31_t)0x60f5ddc,  (q31_t)0x8024be99,\n    (q31_t)0x6091729,  (q31_t)0x80247299, (q31_t)0x602d072,  (q31_t)0x802426e8,\n    (q31_t)0x5fc89b8,  (q31_t)0x8023db86, (q31_t)0x5f642fa,  (q31_t)0x80239073,\n    (q31_t)0x5effc38,  (q31_t)0x802345af, (q31_t)0x5e9b572,  (q31_t)0x8022fb3a,\n    (q31_t)0x5e36ea9,  (q31_t)0x8022b114, (q31_t)0x5dd27dd,  (q31_t)0x8022673c,\n    (q31_t)0x5d6e10c,  (q31_t)0x80221db3, (q31_t)0x5d09a38,  (q31_t)0x8021d47a,\n    (q31_t)0x5ca5361,  (q31_t)0x80218b8f, (q31_t)0x5c40c86,  (q31_t)0x802142f3,\n    (q31_t)0x5bdc5a7,  (q31_t)0x8020faa6, (q31_t)0x5b77ec5,  (q31_t)0x8020b2a7,\n    (q31_t)0x5b137df,  (q31_t)0x80206af8, (q31_t)0x5aaf0f6,  (q31_t)0x80202397,\n    (q31_t)0x5a4aa09,  (q31_t)0x801fdc86, (q31_t)0x59e6319,  (q31_t)0x801f95c3,\n    (q31_t)0x5981c26,  (q31_t)0x801f4f4f, (q31_t)0x591d52f,  (q31_t)0x801f092a,\n    (q31_t)0x58b8e34,  (q31_t)0x801ec354, (q31_t)0x5854736,  (q31_t)0x801e7dcd,\n    (q31_t)0x57f0035,  (q31_t)0x801e3895, (q31_t)0x578b930,  (q31_t)0x801df3ab,\n    (q31_t)0x5727228,  (q31_t)0x801daf11, (q31_t)0x56c2b1c,  (q31_t)0x801d6ac5,\n    (q31_t)0x565e40d,  (q31_t)0x801d26c8, (q31_t)0x55f9cfb,  (q31_t)0x801ce31a,\n    (q31_t)0x55955e6,  (q31_t)0x801c9fbb, (q31_t)0x5530ecd,  (q31_t)0x801c5cab,\n    (q31_t)0x54cc7b1,  (q31_t)0x801c19ea, (q31_t)0x5468092,  (q31_t)0x801bd777,\n    (q31_t)0x540396f,  (q31_t)0x801b9554, (q31_t)0x539f249,  (q31_t)0x801b537f,\n    (q31_t)0x533ab20,  (q31_t)0x801b11fa, (q31_t)0x52d63f4,  (q31_t)0x801ad0c3,\n    (q31_t)0x5271cc4,  (q31_t)0x801a8fdb, (q31_t)0x520d592,  (q31_t)0x801a4f42,\n    (q31_t)0x51a8e5c,  (q31_t)0x801a0ef8, (q31_t)0x5144723,  (q31_t)0x8019cefd,\n    (q31_t)0x50dffe7,  (q31_t)0x80198f50, (q31_t)0x507b8a8,  (q31_t)0x80194ff3,\n    (q31_t)0x5017165,  (q31_t)0x801910e4, (q31_t)0x4fb2a20,  (q31_t)0x8018d225,\n    (q31_t)0x4f4e2d8,  (q31_t)0x801893b4, (q31_t)0x4ee9b8c,  (q31_t)0x80185592,\n    (q31_t)0x4e8543e,  (q31_t)0x801817bf, (q31_t)0x4e20cec,  (q31_t)0x8017da3b,\n    (q31_t)0x4dbc597,  (q31_t)0x80179d06, (q31_t)0x4d57e40,  (q31_t)0x80176020,\n    (q31_t)0x4cf36e5,  (q31_t)0x80172388, (q31_t)0x4c8ef88,  (q31_t)0x8016e740,\n    (q31_t)0x4c2a827,  (q31_t)0x8016ab46, (q31_t)0x4bc60c4,  (q31_t)0x80166f9c,\n    (q31_t)0x4b6195d,  (q31_t)0x80163440, (q31_t)0x4afd1f4,  (q31_t)0x8015f933,\n    (q31_t)0x4a98a88,  (q31_t)0x8015be75, (q31_t)0x4a34319,  (q31_t)0x80158406,\n    (q31_t)0x49cfba7,  (q31_t)0x801549e6, (q31_t)0x496b432,  (q31_t)0x80151015,\n    (q31_t)0x4906cbb,  (q31_t)0x8014d693, (q31_t)0x48a2540,  (q31_t)0x80149d5f,\n    (q31_t)0x483ddc3,  (q31_t)0x8014647b, (q31_t)0x47d9643,  (q31_t)0x80142be5,\n    (q31_t)0x4774ec1,  (q31_t)0x8013f39e, (q31_t)0x471073b,  (q31_t)0x8013bba7,\n    (q31_t)0x46abfb3,  (q31_t)0x801383fe, (q31_t)0x4647828,  (q31_t)0x80134ca4,\n    (q31_t)0x45e309a,  (q31_t)0x80131599, (q31_t)0x457e90a,  (q31_t)0x8012dedd,\n    (q31_t)0x451a177,  (q31_t)0x8012a86f, (q31_t)0x44b59e1,  (q31_t)0x80127251,\n    (q31_t)0x4451249,  (q31_t)0x80123c82, (q31_t)0x43ecaae,  (q31_t)0x80120701,\n    (q31_t)0x4388310,  (q31_t)0x8011d1d0, (q31_t)0x4323b70,  (q31_t)0x80119ced,\n    (q31_t)0x42bf3cd,  (q31_t)0x80116859, (q31_t)0x425ac28,  (q31_t)0x80113414,\n    (q31_t)0x41f6480,  (q31_t)0x8011001f, (q31_t)0x4191cd5,  (q31_t)0x8010cc78,\n    (q31_t)0x412d528,  (q31_t)0x8010991f, (q31_t)0x40c8d79,  (q31_t)0x80106616,\n    (q31_t)0x40645c7,  (q31_t)0x8010335c, (q31_t)0x3fffe12,  (q31_t)0x801000f1,\n    (q31_t)0x3f9b65b,  (q31_t)0x800fced4, (q31_t)0x3f36ea2,  (q31_t)0x800f9d07,\n    (q31_t)0x3ed26e6,  (q31_t)0x800f6b88, (q31_t)0x3e6df28,  (q31_t)0x800f3a59,\n    (q31_t)0x3e09767,  (q31_t)0x800f0978, (q31_t)0x3da4fa4,  (q31_t)0x800ed8e6,\n    (q31_t)0x3d407df,  (q31_t)0x800ea8a3, (q31_t)0x3cdc017,  (q31_t)0x800e78af,\n    (q31_t)0x3c7784d,  (q31_t)0x800e490a, (q31_t)0x3c13080,  (q31_t)0x800e19b4,\n    (q31_t)0x3bae8b2,  (q31_t)0x800deaad, (q31_t)0x3b4a0e0,  (q31_t)0x800dbbf5,\n    (q31_t)0x3ae590d,  (q31_t)0x800d8d8b, (q31_t)0x3a81137,  (q31_t)0x800d5f71,\n    (q31_t)0x3a1c960,  (q31_t)0x800d31a5, (q31_t)0x39b8185,  (q31_t)0x800d0429,\n    (q31_t)0x39539a9,  (q31_t)0x800cd6fb, (q31_t)0x38ef1ca,  (q31_t)0x800caa1c,\n    (q31_t)0x388a9ea,  (q31_t)0x800c7d8c, (q31_t)0x3826207,  (q31_t)0x800c514c,\n    (q31_t)0x37c1a22,  (q31_t)0x800c255a, (q31_t)0x375d23a,  (q31_t)0x800bf9b7,\n    (q31_t)0x36f8a51,  (q31_t)0x800bce63, (q31_t)0x3694265,  (q31_t)0x800ba35d,\n    (q31_t)0x362fa78,  (q31_t)0x800b78a7, (q31_t)0x35cb288,  (q31_t)0x800b4e40,\n    (q31_t)0x3566a96,  (q31_t)0x800b2427, (q31_t)0x35022a2,  (q31_t)0x800afa5e,\n    (q31_t)0x349daac,  (q31_t)0x800ad0e3, (q31_t)0x34392b4,  (q31_t)0x800aa7b8,\n    (q31_t)0x33d4abb,  (q31_t)0x800a7edb, (q31_t)0x33702bf,  (q31_t)0x800a564e,\n    (q31_t)0x330bac1,  (q31_t)0x800a2e0f, (q31_t)0x32a72c1,  (q31_t)0x800a061f,\n    (q31_t)0x3242abf,  (q31_t)0x8009de7e, (q31_t)0x31de2bb,  (q31_t)0x8009b72c,\n    (q31_t)0x3179ab5,  (q31_t)0x80099029, (q31_t)0x31152ae,  (q31_t)0x80096975,\n    (q31_t)0x30b0aa4,  (q31_t)0x80094310, (q31_t)0x304c299,  (q31_t)0x80091cf9,\n    (q31_t)0x2fe7a8c,  (q31_t)0x8008f732, (q31_t)0x2f8327d,  (q31_t)0x8008d1ba,\n    (q31_t)0x2f1ea6c,  (q31_t)0x8008ac90, (q31_t)0x2eba259,  (q31_t)0x800887b6,\n    (q31_t)0x2e55a44,  (q31_t)0x8008632a, (q31_t)0x2df122e,  (q31_t)0x80083eed,\n    (q31_t)0x2d8ca16,  (q31_t)0x80081b00, (q31_t)0x2d281fc,  (q31_t)0x8007f761,\n    (q31_t)0x2cc39e1,  (q31_t)0x8007d411, (q31_t)0x2c5f1c3,  (q31_t)0x8007b110,\n    (q31_t)0x2bfa9a4,  (q31_t)0x80078e5e, (q31_t)0x2b96184,  (q31_t)0x80076bfb,\n    (q31_t)0x2b31961,  (q31_t)0x800749e7, (q31_t)0x2acd13d,  (q31_t)0x80072822,\n    (q31_t)0x2a68917,  (q31_t)0x800706ac, (q31_t)0x2a040f0,  (q31_t)0x8006e585,\n    (q31_t)0x299f8c7,  (q31_t)0x8006c4ac, (q31_t)0x293b09c,  (q31_t)0x8006a423,\n    (q31_t)0x28d6870,  (q31_t)0x800683e8, (q31_t)0x2872043,  (q31_t)0x800663fd,\n    (q31_t)0x280d813,  (q31_t)0x80064460, (q31_t)0x27a8fe2,  (q31_t)0x80062513,\n    (q31_t)0x27447b0,  (q31_t)0x80060614, (q31_t)0x26dff7c,  (q31_t)0x8005e764,\n    (q31_t)0x267b747,  (q31_t)0x8005c904, (q31_t)0x2616f10,  (q31_t)0x8005aaf2,\n    (q31_t)0x25b26d7,  (q31_t)0x80058d2f, (q31_t)0x254de9e,  (q31_t)0x80056fbb,\n    (q31_t)0x24e9662,  (q31_t)0x80055296, (q31_t)0x2484e26,  (q31_t)0x800535c0,\n    (q31_t)0x24205e8,  (q31_t)0x80051939, (q31_t)0x23bbda8,  (q31_t)0x8004fd00,\n    (q31_t)0x2357567,  (q31_t)0x8004e117, (q31_t)0x22f2d25,  (q31_t)0x8004c57d,\n    (q31_t)0x228e4e2,  (q31_t)0x8004aa32, (q31_t)0x2229c9d,  (q31_t)0x80048f35,\n    (q31_t)0x21c5457,  (q31_t)0x80047488, (q31_t)0x2160c0f,  (q31_t)0x80045a29,\n    (q31_t)0x20fc3c6,  (q31_t)0x8004401a, (q31_t)0x2097b7c,  (q31_t)0x80042659,\n    (q31_t)0x2033331,  (q31_t)0x80040ce7, (q31_t)0x1fceae4,  (q31_t)0x8003f3c5,\n    (q31_t)0x1f6a297,  (q31_t)0x8003daf1, (q31_t)0x1f05a48,  (q31_t)0x8003c26c,\n    (q31_t)0x1ea11f7,  (q31_t)0x8003aa36, (q31_t)0x1e3c9a6,  (q31_t)0x8003924f,\n    (q31_t)0x1dd8154,  (q31_t)0x80037ab7, (q31_t)0x1d73900,  (q31_t)0x8003636e,\n    (q31_t)0x1d0f0ab,  (q31_t)0x80034c74, (q31_t)0x1caa855,  (q31_t)0x800335c9,\n    (q31_t)0x1c45ffe,  (q31_t)0x80031f6d, (q31_t)0x1be17a6,  (q31_t)0x80030960,\n    (q31_t)0x1b7cf4d,  (q31_t)0x8002f3a1, (q31_t)0x1b186f3,  (q31_t)0x8002de32,\n    (q31_t)0x1ab3e97,  (q31_t)0x8002c912, (q31_t)0x1a4f63b,  (q31_t)0x8002b440,\n    (q31_t)0x19eaddd,  (q31_t)0x80029fbe, (q31_t)0x198657f,  (q31_t)0x80028b8a,\n    (q31_t)0x1921d20,  (q31_t)0x800277a6, (q31_t)0x18bd4bf,  (q31_t)0x80026410,\n    (q31_t)0x1858c5e,  (q31_t)0x800250c9, (q31_t)0x17f43fc,  (q31_t)0x80023dd2,\n    (q31_t)0x178fb99,  (q31_t)0x80022b29, (q31_t)0x172b335,  (q31_t)0x800218cf,\n    (q31_t)0x16c6ad0,  (q31_t)0x800206c4, (q31_t)0x166226a,  (q31_t)0x8001f508,\n    (q31_t)0x15fda03,  (q31_t)0x8001e39b, (q31_t)0x159919c,  (q31_t)0x8001d27d,\n    (q31_t)0x1534934,  (q31_t)0x8001c1ae, (q31_t)0x14d00ca,  (q31_t)0x8001b12e,\n    (q31_t)0x146b860,  (q31_t)0x8001a0fd, (q31_t)0x1406ff6,  (q31_t)0x8001911b,\n    (q31_t)0x13a278a,  (q31_t)0x80018187, (q31_t)0x133df1e,  (q31_t)0x80017243,\n    (q31_t)0x12d96b1,  (q31_t)0x8001634e, (q31_t)0x1274e43,  (q31_t)0x800154a7,\n    (q31_t)0x12105d5,  (q31_t)0x80014650, (q31_t)0x11abd66,  (q31_t)0x80013847,\n    (q31_t)0x11474f6,  (q31_t)0x80012a8e, (q31_t)0x10e2c85,  (q31_t)0x80011d23,\n    (q31_t)0x107e414,  (q31_t)0x80011008, (q31_t)0x1019ba2,  (q31_t)0x8001033b,\n    (q31_t)0x0fb5330,  (q31_t)0x8000f6bd, (q31_t)0x0f50abd,  (q31_t)0x8000ea8e,\n    (q31_t)0x0eec249,  (q31_t)0x8000deaf, (q31_t)0x0e879d5,  (q31_t)0x8000d31e,\n    (q31_t)0x0e23160,  (q31_t)0x8000c7dc, (q31_t)0x0dbe8eb,  (q31_t)0x8000bce9,\n    (q31_t)0x0d5a075,  (q31_t)0x8000b245, (q31_t)0x0cf57ff,  (q31_t)0x8000a7f0,\n    (q31_t)0x0c90f88,  (q31_t)0x80009dea, (q31_t)0x0c2c711,  (q31_t)0x80009433,\n    (q31_t)0x0bc7e99,  (q31_t)0x80008aca, (q31_t)0x0b63621,  (q31_t)0x800081b1,\n    (q31_t)0x0afeda8,  (q31_t)0x800078e7, (q31_t)0x0a9a52f,  (q31_t)0x8000706c,\n    (q31_t)0x0a35cb5,  (q31_t)0x8000683f, (q31_t)0x09d143b,  (q31_t)0x80006062,\n    (q31_t)0x096cbc1,  (q31_t)0x800058d4, (q31_t)0x0908346,  (q31_t)0x80005194,\n    (q31_t)0x08a3acb,  (q31_t)0x80004aa4, (q31_t)0x083f250,  (q31_t)0x80004402,\n    (q31_t)0x07da9d4,  (q31_t)0x80003daf, (q31_t)0x0776159,  (q31_t)0x800037ac,\n    (q31_t)0x07118dc,  (q31_t)0x800031f7, (q31_t)0x06ad060,  (q31_t)0x80002c91,\n    (q31_t)0x06487e3,  (q31_t)0x8000277a, (q31_t)0x05e3f66,  (q31_t)0x800022b3,\n    (q31_t)0x057f6e9,  (q31_t)0x80001e3a, (q31_t)0x051ae6b,  (q31_t)0x80001a10,\n    (q31_t)0x04b65ee,  (q31_t)0x80001635, (q31_t)0x0451d70,  (q31_t)0x800012a9,\n    (q31_t)0x03ed4f2,  (q31_t)0x80000f6c, (q31_t)0x0388c74,  (q31_t)0x80000c7e,\n    (q31_t)0x03243f5,  (q31_t)0x800009df, (q31_t)0x02bfb77,  (q31_t)0x8000078e,\n    (q31_t)0x025b2f8,  (q31_t)0x8000058d, (q31_t)0x01f6a7a,  (q31_t)0x800003db,\n    (q31_t)0x01921fb,  (q31_t)0x80000278, (q31_t)0x012d97c,  (q31_t)0x80000163,\n    (q31_t)0x00c90fe,  (q31_t)0x8000009e, (q31_t)0x006487f,  (q31_t)0x80000027};\n\n/**\n  @par\n  cosFactor tables are generated using the formula : 
cos_factors[n] = 2 *\n  cos((2n+1)*pi/(4*N))
\n  @par\n  C command to generate the table\n  
\n  for (i = 0; i< N; i++)\n  {\n    cos_factors[i] = 2 * cos((2*i+1)*c/2);\n  } 
\n  @par\n  where N is the number of factors to generate and c\n  is pi/(2*N)\n  @par\n  Then converted to q31 format by multiplying with 2^31 and saturated if\n  required.\n*/\n\nstatic const q31_t cos_factorsQ31_128[128] = {\n    (q31_t)0x7fff6216, (q31_t)0x7ffa72d1, (q31_t)0x7ff09478, (q31_t)0x7fe1c76b,\n    (q31_t)0x7fce0c3e, (q31_t)0x7fb563b3, (q31_t)0x7f97cebd, (q31_t)0x7f754e80,\n    (q31_t)0x7f4de451, (q31_t)0x7f2191b4, (q31_t)0x7ef05860, (q31_t)0x7eba3a39,\n    (q31_t)0x7e7f3957, (q31_t)0x7e3f57ff, (q31_t)0x7dfa98a8, (q31_t)0x7db0fdf8,\n    (q31_t)0x7d628ac6, (q31_t)0x7d0f4218, (q31_t)0x7cb72724, (q31_t)0x7c5a3d50,\n    (q31_t)0x7bf88830, (q31_t)0x7b920b89, (q31_t)0x7b26cb4f, (q31_t)0x7ab6cba4,\n    (q31_t)0x7a4210d8, (q31_t)0x79c89f6e, (q31_t)0x794a7c12, (q31_t)0x78c7aba2,\n    (q31_t)0x78403329, (q31_t)0x77b417df, (q31_t)0x77235f2d, (q31_t)0x768e0ea6,\n    (q31_t)0x75f42c0b, (q31_t)0x7555bd4c, (q31_t)0x74b2c884, (q31_t)0x740b53fb,\n    (q31_t)0x735f6626, (q31_t)0x72af05a7, (q31_t)0x71fa3949, (q31_t)0x71410805,\n    (q31_t)0x708378ff, (q31_t)0x6fc19385, (q31_t)0x6efb5f12, (q31_t)0x6e30e34a,\n    (q31_t)0x6d6227fa, (q31_t)0x6c8f351c, (q31_t)0x6bb812d1, (q31_t)0x6adcc964,\n    (q31_t)0x69fd614a, (q31_t)0x6919e320, (q31_t)0x683257ab, (q31_t)0x6746c7d8,\n    (q31_t)0x66573cbb, (q31_t)0x6563bf92, (q31_t)0x646c59bf, (q31_t)0x637114cc,\n    (q31_t)0x6271fa69, (q31_t)0x616f146c, (q31_t)0x60686ccf, (q31_t)0x5f5e0db3,\n    (q31_t)0x5e50015d, (q31_t)0x5d3e5237, (q31_t)0x5c290acc, (q31_t)0x5b1035cf,\n    (q31_t)0x59f3de12, (q31_t)0x58d40e8c, (q31_t)0x57b0d256, (q31_t)0x568a34a9,\n    (q31_t)0x556040e2, (q31_t)0x5433027d, (q31_t)0x53028518, (q31_t)0x51ced46e,\n    (q31_t)0x5097fc5e, (q31_t)0x4f5e08e3, (q31_t)0x4e210617, (q31_t)0x4ce10034,\n    (q31_t)0x4b9e0390, (q31_t)0x4a581c9e, (q31_t)0x490f57ee, (q31_t)0x47c3c22f,\n    (q31_t)0x46756828, (q31_t)0x452456bd, (q31_t)0x43d09aed, (q31_t)0x427a41d0,\n    (q31_t)0x4121589b, (q31_t)0x3fc5ec98, (q31_t)0x3e680b2c, (q31_t)0x3d07c1d6,\n    (q31_t)0x3ba51e29, (q31_t)0x3a402dd2, (q31_t)0x38d8fe93, (q31_t)0x376f9e46,\n    (q31_t)0x36041ad9, (q31_t)0x34968250, (q31_t)0x3326e2c3, (q31_t)0x31b54a5e,\n    (q31_t)0x3041c761, (q31_t)0x2ecc681e, (q31_t)0x2d553afc, (q31_t)0x2bdc4e6f,\n    (q31_t)0x2a61b101, (q31_t)0x28e5714b, (q31_t)0x27679df4, (q31_t)0x25e845b6,\n    (q31_t)0x24677758, (q31_t)0x22e541af, (q31_t)0x2161b3a0, (q31_t)0x1fdcdc1b,\n    (q31_t)0x1e56ca1e, (q31_t)0x1ccf8cb3, (q31_t)0x1b4732ef, (q31_t)0x19bdcbf3,\n    (q31_t)0x183366e9, (q31_t)0x16a81305, (q31_t)0x151bdf86, (q31_t)0x138edbb1,\n    (q31_t)0x120116d5, (q31_t)0x1072a048, (q31_t)0xee38766,  (q31_t)0xd53db92,\n    (q31_t)0xbc3ac35,  (q31_t)0xa3308bd,  (q31_t)0x8a2009a,  (q31_t)0x710a345,\n    (q31_t)0x57f0035,  (q31_t)0x3ed26e6,  (q31_t)0x25b26d7,  (q31_t)0xc90f88};\n\nstatic const q31_t cos_factorsQ31_512[512] = {\n    (q31_t)0x7ffff621, (q31_t)0x7fffa72c, (q31_t)0x7fff0943, (q31_t)0x7ffe1c65,\n    (q31_t)0x7ffce093, (q31_t)0x7ffb55ce, (q31_t)0x7ff97c18, (q31_t)0x7ff75370,\n    (q31_t)0x7ff4dbd9, (q31_t)0x7ff21553, (q31_t)0x7feeffe1, (q31_t)0x7feb9b85,\n    (q31_t)0x7fe7e841, (q31_t)0x7fe3e616, (q31_t)0x7fdf9508, (q31_t)0x7fdaf519,\n    (q31_t)0x7fd6064c, (q31_t)0x7fd0c8a3, (q31_t)0x7fcb3c23, (q31_t)0x7fc560cf,\n    (q31_t)0x7fbf36aa, (q31_t)0x7fb8bdb8, (q31_t)0x7fb1f5fc, (q31_t)0x7faadf7c,\n    (q31_t)0x7fa37a3c, (q31_t)0x7f9bc640, (q31_t)0x7f93c38c, (q31_t)0x7f8b7227,\n    (q31_t)0x7f82d214, (q31_t)0x7f79e35a, (q31_t)0x7f70a5fe, (q31_t)0x7f671a05,\n    (q31_t)0x7f5d3f75, (q31_t)0x7f531655, (q31_t)0x7f489eaa, (q31_t)0x7f3dd87c,\n    (q31_t)0x7f32c3d1, (q31_t)0x7f2760af, (q31_t)0x7f1baf1e, (q31_t)0x7f0faf25,\n    (q31_t)0x7f0360cb, (q31_t)0x7ef6c418, (q31_t)0x7ee9d914, (q31_t)0x7edc9fc6,\n    (q31_t)0x7ecf1837, (q31_t)0x7ec14270, (q31_t)0x7eb31e78, (q31_t)0x7ea4ac58,\n    (q31_t)0x7e95ec1a, (q31_t)0x7e86ddc6, (q31_t)0x7e778166, (q31_t)0x7e67d703,\n    (q31_t)0x7e57dea7, (q31_t)0x7e47985b, (q31_t)0x7e37042a, (q31_t)0x7e26221f,\n    (q31_t)0x7e14f242, (q31_t)0x7e0374a0, (q31_t)0x7df1a942, (q31_t)0x7ddf9034,\n    (q31_t)0x7dcd2981, (q31_t)0x7dba7534, (q31_t)0x7da77359, (q31_t)0x7d9423fc,\n    (q31_t)0x7d808728, (q31_t)0x7d6c9ce9, (q31_t)0x7d58654d, (q31_t)0x7d43e05e,\n    (q31_t)0x7d2f0e2b, (q31_t)0x7d19eebf, (q31_t)0x7d048228, (q31_t)0x7ceec873,\n    (q31_t)0x7cd8c1ae, (q31_t)0x7cc26de5, (q31_t)0x7cabcd28, (q31_t)0x7c94df83,\n    (q31_t)0x7c7da505, (q31_t)0x7c661dbc, (q31_t)0x7c4e49b7, (q31_t)0x7c362904,\n    (q31_t)0x7c1dbbb3, (q31_t)0x7c0501d2, (q31_t)0x7bebfb70, (q31_t)0x7bd2a89e,\n    (q31_t)0x7bb9096b, (q31_t)0x7b9f1de6, (q31_t)0x7b84e61f, (q31_t)0x7b6a6227,\n    (q31_t)0x7b4f920e, (q31_t)0x7b3475e5, (q31_t)0x7b190dbc, (q31_t)0x7afd59a4,\n    (q31_t)0x7ae159ae, (q31_t)0x7ac50dec, (q31_t)0x7aa8766f, (q31_t)0x7a8b9348,\n    (q31_t)0x7a6e648a, (q31_t)0x7a50ea47, (q31_t)0x7a332490, (q31_t)0x7a151378,\n    (q31_t)0x79f6b711, (q31_t)0x79d80f6f, (q31_t)0x79b91ca4, (q31_t)0x7999dec4,\n    (q31_t)0x797a55e0, (q31_t)0x795a820e, (q31_t)0x793a6361, (q31_t)0x7919f9ec,\n    (q31_t)0x78f945c3, (q31_t)0x78d846fb, (q31_t)0x78b6fda8, (q31_t)0x789569df,\n    (q31_t)0x78738bb3, (q31_t)0x7851633b, (q31_t)0x782ef08b, (q31_t)0x780c33b8,\n    (q31_t)0x77e92cd9, (q31_t)0x77c5dc01, (q31_t)0x77a24148, (q31_t)0x777e5cc3,\n    (q31_t)0x775a2e89, (q31_t)0x7735b6af, (q31_t)0x7710f54c, (q31_t)0x76ebea77,\n    (q31_t)0x76c69647, (q31_t)0x76a0f8d2, (q31_t)0x767b1231, (q31_t)0x7654e279,\n    (q31_t)0x762e69c4, (q31_t)0x7607a828, (q31_t)0x75e09dbd, (q31_t)0x75b94a9c,\n    (q31_t)0x7591aedd, (q31_t)0x7569ca99, (q31_t)0x75419de7, (q31_t)0x751928e0,\n    (q31_t)0x74f06b9e, (q31_t)0x74c7663a, (q31_t)0x749e18cd, (q31_t)0x74748371,\n    (q31_t)0x744aa63f, (q31_t)0x74208150, (q31_t)0x73f614c0, (q31_t)0x73cb60a8,\n    (q31_t)0x73a06522, (q31_t)0x73752249, (q31_t)0x73499838, (q31_t)0x731dc70a,\n    (q31_t)0x72f1aed9, (q31_t)0x72c54fc1, (q31_t)0x7298a9dd, (q31_t)0x726bbd48,\n    (q31_t)0x723e8a20, (q31_t)0x7211107e, (q31_t)0x71e35080, (q31_t)0x71b54a41,\n    (q31_t)0x7186fdde, (q31_t)0x71586b74, (q31_t)0x7129931f, (q31_t)0x70fa74fc,\n    (q31_t)0x70cb1128, (q31_t)0x709b67c0, (q31_t)0x706b78e3, (q31_t)0x703b44ad,\n    (q31_t)0x700acb3c, (q31_t)0x6fda0cae, (q31_t)0x6fa90921, (q31_t)0x6f77c0b3,\n    (q31_t)0x6f463383, (q31_t)0x6f1461b0, (q31_t)0x6ee24b57, (q31_t)0x6eaff099,\n    (q31_t)0x6e7d5193, (q31_t)0x6e4a6e66, (q31_t)0x6e174730, (q31_t)0x6de3dc11,\n    (q31_t)0x6db02d29, (q31_t)0x6d7c3a98, (q31_t)0x6d48047e, (q31_t)0x6d138afb,\n    (q31_t)0x6cdece2f, (q31_t)0x6ca9ce3b, (q31_t)0x6c748b3f, (q31_t)0x6c3f055d,\n    (q31_t)0x6c093cb6, (q31_t)0x6bd3316a, (q31_t)0x6b9ce39b, (q31_t)0x6b66536b,\n    (q31_t)0x6b2f80fb, (q31_t)0x6af86c6c, (q31_t)0x6ac115e2, (q31_t)0x6a897d7d,\n    (q31_t)0x6a51a361, (q31_t)0x6a1987b0, (q31_t)0x69e12a8c, (q31_t)0x69a88c19,\n    (q31_t)0x696fac78, (q31_t)0x69368bce, (q31_t)0x68fd2a3d, (q31_t)0x68c387e9,\n    (q31_t)0x6889a4f6, (q31_t)0x684f8186, (q31_t)0x68151dbe, (q31_t)0x67da79c3,\n    (q31_t)0x679f95b7, (q31_t)0x676471c0, (q31_t)0x67290e02, (q31_t)0x66ed6aa1,\n    (q31_t)0x66b187c3, (q31_t)0x6675658c, (q31_t)0x66390422, (q31_t)0x65fc63a9,\n    (q31_t)0x65bf8447, (q31_t)0x65826622, (q31_t)0x6545095f, (q31_t)0x65076e25,\n    (q31_t)0x64c99498, (q31_t)0x648b7ce0, (q31_t)0x644d2722, (q31_t)0x640e9386,\n    (q31_t)0x63cfc231, (q31_t)0x6390b34a, (q31_t)0x635166f9, (q31_t)0x6311dd64,\n    (q31_t)0x62d216b3, (q31_t)0x6292130c, (q31_t)0x6251d298, (q31_t)0x6211557e,\n    (q31_t)0x61d09be5, (q31_t)0x618fa5f7, (q31_t)0x614e73da, (q31_t)0x610d05b7,\n    (q31_t)0x60cb5bb7, (q31_t)0x60897601, (q31_t)0x604754bf, (q31_t)0x6004f819,\n    (q31_t)0x5fc26038, (q31_t)0x5f7f8d46, (q31_t)0x5f3c7f6b, (q31_t)0x5ef936d1,\n    (q31_t)0x5eb5b3a2, (q31_t)0x5e71f606, (q31_t)0x5e2dfe29, (q31_t)0x5de9cc33,\n    (q31_t)0x5da5604f, (q31_t)0x5d60baa7, (q31_t)0x5d1bdb65, (q31_t)0x5cd6c2b5,\n    (q31_t)0x5c9170bf, (q31_t)0x5c4be5b0, (q31_t)0x5c0621b2, (q31_t)0x5bc024f0,\n    (q31_t)0x5b79ef96, (q31_t)0x5b3381ce, (q31_t)0x5aecdbc5, (q31_t)0x5aa5fda5,\n    (q31_t)0x5a5ee79a, (q31_t)0x5a1799d1, (q31_t)0x59d01475, (q31_t)0x598857b2,\n    (q31_t)0x594063b5, (q31_t)0x58f838a9, (q31_t)0x58afd6bd, (q31_t)0x58673e1b,\n    (q31_t)0x581e6ef1, (q31_t)0x57d5696d, (q31_t)0x578c2dba, (q31_t)0x5742bc06,\n    (q31_t)0x56f9147e, (q31_t)0x56af3750, (q31_t)0x566524aa, (q31_t)0x561adcb9,\n    (q31_t)0x55d05faa, (q31_t)0x5585adad, (q31_t)0x553ac6ee, (q31_t)0x54efab9c,\n    (q31_t)0x54a45be6, (q31_t)0x5458d7f9, (q31_t)0x540d2005, (q31_t)0x53c13439,\n    (q31_t)0x537514c2, (q31_t)0x5328c1d0, (q31_t)0x52dc3b92, (q31_t)0x528f8238,\n    (q31_t)0x524295f0, (q31_t)0x51f576ea, (q31_t)0x51a82555, (q31_t)0x515aa162,\n    (q31_t)0x510ceb40, (q31_t)0x50bf031f, (q31_t)0x5070e92f, (q31_t)0x50229da1,\n    (q31_t)0x4fd420a4, (q31_t)0x4f857269, (q31_t)0x4f369320, (q31_t)0x4ee782fb,\n    (q31_t)0x4e984229, (q31_t)0x4e48d0dd, (q31_t)0x4df92f46, (q31_t)0x4da95d96,\n    (q31_t)0x4d595bfe, (q31_t)0x4d092ab0, (q31_t)0x4cb8c9dd, (q31_t)0x4c6839b7,\n    (q31_t)0x4c177a6e, (q31_t)0x4bc68c36, (q31_t)0x4b756f40, (q31_t)0x4b2423be,\n    (q31_t)0x4ad2a9e2, (q31_t)0x4a8101de, (q31_t)0x4a2f2be6, (q31_t)0x49dd282a,\n    (q31_t)0x498af6df, (q31_t)0x49389836, (q31_t)0x48e60c62, (q31_t)0x48935397,\n    (q31_t)0x48406e08, (q31_t)0x47ed5be6, (q31_t)0x479a1d67, (q31_t)0x4746b2bc,\n    (q31_t)0x46f31c1a, (q31_t)0x469f59b4, (q31_t)0x464b6bbe, (q31_t)0x45f7526b,\n    (q31_t)0x45a30df0, (q31_t)0x454e9e80, (q31_t)0x44fa0450, (q31_t)0x44a53f93,\n    (q31_t)0x4450507e, (q31_t)0x43fb3746, (q31_t)0x43a5f41e, (q31_t)0x4350873c,\n    (q31_t)0x42faf0d4, (q31_t)0x42a5311b, (q31_t)0x424f4845, (q31_t)0x41f93689,\n    (q31_t)0x41a2fc1a, (q31_t)0x414c992f, (q31_t)0x40f60dfb, (q31_t)0x409f5ab6,\n    (q31_t)0x40487f94, (q31_t)0x3ff17cca, (q31_t)0x3f9a5290, (q31_t)0x3f430119,\n    (q31_t)0x3eeb889c, (q31_t)0x3e93e950, (q31_t)0x3e3c2369, (q31_t)0x3de4371f,\n    (q31_t)0x3d8c24a8, (q31_t)0x3d33ec39, (q31_t)0x3cdb8e09, (q31_t)0x3c830a50,\n    (q31_t)0x3c2a6142, (q31_t)0x3bd19318, (q31_t)0x3b78a007, (q31_t)0x3b1f8848,\n    (q31_t)0x3ac64c0f, (q31_t)0x3a6ceb96, (q31_t)0x3a136712, (q31_t)0x39b9bebc,\n    (q31_t)0x395ff2c9, (q31_t)0x39060373, (q31_t)0x38abf0ef, (q31_t)0x3851bb77,\n    (q31_t)0x37f76341, (q31_t)0x379ce885, (q31_t)0x37424b7b, (q31_t)0x36e78c5b,\n    (q31_t)0x368cab5c, (q31_t)0x3631a8b8, (q31_t)0x35d684a6, (q31_t)0x357b3f5d,\n    (q31_t)0x351fd918, (q31_t)0x34c4520d, (q31_t)0x3468aa76, (q31_t)0x340ce28b,\n    (q31_t)0x33b0fa84, (q31_t)0x3354f29b, (q31_t)0x32f8cb07, (q31_t)0x329c8402,\n    (q31_t)0x32401dc6, (q31_t)0x31e39889, (q31_t)0x3186f487, (q31_t)0x312a31f8,\n    (q31_t)0x30cd5115, (q31_t)0x30705217, (q31_t)0x30133539, (q31_t)0x2fb5fab2,\n    (q31_t)0x2f58a2be, (q31_t)0x2efb2d95, (q31_t)0x2e9d9b70, (q31_t)0x2e3fec8b,\n    (q31_t)0x2de2211e, (q31_t)0x2d843964, (q31_t)0x2d263596, (q31_t)0x2cc815ee,\n    (q31_t)0x2c69daa6, (q31_t)0x2c0b83fa, (q31_t)0x2bad1221, (q31_t)0x2b4e8558,\n    (q31_t)0x2aefddd8, (q31_t)0x2a911bdc, (q31_t)0x2a323f9e, (q31_t)0x29d34958,\n    (q31_t)0x29743946, (q31_t)0x29150fa1, (q31_t)0x28b5cca5, (q31_t)0x2856708d,\n    (q31_t)0x27f6fb92, (q31_t)0x27976df1, (q31_t)0x2737c7e3, (q31_t)0x26d809a5,\n    (q31_t)0x26783370, (q31_t)0x26184581, (q31_t)0x25b84012, (q31_t)0x2558235f,\n    (q31_t)0x24f7efa2, (q31_t)0x2497a517, (q31_t)0x243743fa, (q31_t)0x23d6cc87,\n    (q31_t)0x23763ef7, (q31_t)0x23159b88, (q31_t)0x22b4e274, (q31_t)0x225413f8,\n    (q31_t)0x21f3304f, (q31_t)0x219237b5, (q31_t)0x21312a65, (q31_t)0x20d0089c,\n    (q31_t)0x206ed295, (q31_t)0x200d888d, (q31_t)0x1fac2abf, (q31_t)0x1f4ab968,\n    (q31_t)0x1ee934c3, (q31_t)0x1e879d0d, (q31_t)0x1e25f282, (q31_t)0x1dc4355e,\n    (q31_t)0x1d6265dd, (q31_t)0x1d00843d, (q31_t)0x1c9e90b8, (q31_t)0x1c3c8b8c,\n    (q31_t)0x1bda74f6, (q31_t)0x1b784d30, (q31_t)0x1b161479, (q31_t)0x1ab3cb0d,\n    (q31_t)0x1a517128, (q31_t)0x19ef0707, (q31_t)0x198c8ce7, (q31_t)0x192a0304,\n    (q31_t)0x18c7699b, (q31_t)0x1864c0ea, (q31_t)0x1802092c, (q31_t)0x179f429f,\n    (q31_t)0x173c6d80, (q31_t)0x16d98a0c, (q31_t)0x1676987f, (q31_t)0x16139918,\n    (q31_t)0x15b08c12, (q31_t)0x154d71aa, (q31_t)0x14ea4a1f, (q31_t)0x148715ae,\n    (q31_t)0x1423d492, (q31_t)0x13c0870a, (q31_t)0x135d2d53, (q31_t)0x12f9c7aa,\n    (q31_t)0x1296564d, (q31_t)0x1232d979, (q31_t)0x11cf516a, (q31_t)0x116bbe60,\n    (q31_t)0x11082096, (q31_t)0x10a4784b, (q31_t)0x1040c5bb, (q31_t)0xfdd0926,\n    (q31_t)0xf7942c7,  (q31_t)0xf1572dc,  (q31_t)0xeb199a4,  (q31_t)0xe4db75b,\n    (q31_t)0xde9cc40,  (q31_t)0xd85d88f,  (q31_t)0xd21dc87,  (q31_t)0xcbdd865,\n    (q31_t)0xc59cc68,  (q31_t)0xbf5b8cb,  (q31_t)0xb919dcf,  (q31_t)0xb2d7baf,\n    (q31_t)0xac952aa,  (q31_t)0xa6522fe,  (q31_t)0xa00ece8,  (q31_t)0x99cb0a7,\n    (q31_t)0x9386e78,  (q31_t)0x8d42699,  (q31_t)0x86fd947,  (q31_t)0x80b86c2,\n    (q31_t)0x7a72f45,  (q31_t)0x742d311,  (q31_t)0x6de7262,  (q31_t)0x67a0d76,\n    (q31_t)0x615a48b,  (q31_t)0x5b137df,  (q31_t)0x54cc7b1,  (q31_t)0x4e8543e,\n    (q31_t)0x483ddc3,  (q31_t)0x41f6480,  (q31_t)0x3bae8b2,  (q31_t)0x3566a96,\n    (q31_t)0x2f1ea6c,  (q31_t)0x28d6870,  (q31_t)0x228e4e2,  (q31_t)0x1c45ffe,\n    (q31_t)0x15fda03,  (q31_t)0xfb5330,   (q31_t)0x96cbc1,   (q31_t)0x3243f5};\n\nstatic const q31_t cos_factorsQ31_2048[2048] = {\n    (q31_t)0x7fffff62, (q31_t)0x7ffffa73, (q31_t)0x7ffff094, (q31_t)0x7fffe1c6,\n    (q31_t)0x7fffce09, (q31_t)0x7fffb55c, (q31_t)0x7fff97c1, (q31_t)0x7fff7536,\n    (q31_t)0x7fff4dbb, (q31_t)0x7fff2151, (q31_t)0x7ffeeff8, (q31_t)0x7ffeb9b0,\n    (q31_t)0x7ffe7e79, (q31_t)0x7ffe3e52, (q31_t)0x7ffdf93c, (q31_t)0x7ffdaf37,\n    (q31_t)0x7ffd6042, (q31_t)0x7ffd0c5f, (q31_t)0x7ffcb38c, (q31_t)0x7ffc55ca,\n    (q31_t)0x7ffbf319, (q31_t)0x7ffb8b78, (q31_t)0x7ffb1ee9, (q31_t)0x7ffaad6a,\n    (q31_t)0x7ffa36fc, (q31_t)0x7ff9bba0, (q31_t)0x7ff93b54, (q31_t)0x7ff8b619,\n    (q31_t)0x7ff82bef, (q31_t)0x7ff79cd6, (q31_t)0x7ff708ce, (q31_t)0x7ff66fd7,\n    (q31_t)0x7ff5d1f1, (q31_t)0x7ff52f1d, (q31_t)0x7ff48759, (q31_t)0x7ff3daa6,\n    (q31_t)0x7ff32905, (q31_t)0x7ff27275, (q31_t)0x7ff1b6f6, (q31_t)0x7ff0f688,\n    (q31_t)0x7ff0312c, (q31_t)0x7fef66e1, (q31_t)0x7fee97a7, (q31_t)0x7fedc37e,\n    (q31_t)0x7fecea67, (q31_t)0x7fec0c62, (q31_t)0x7feb296d, (q31_t)0x7fea418b,\n    (q31_t)0x7fe954ba, (q31_t)0x7fe862fa, (q31_t)0x7fe76c4c, (q31_t)0x7fe670b0,\n    (q31_t)0x7fe57025, (q31_t)0x7fe46aac, (q31_t)0x7fe36045, (q31_t)0x7fe250ef,\n    (q31_t)0x7fe13cac, (q31_t)0x7fe0237a, (q31_t)0x7fdf055a, (q31_t)0x7fdde24d,\n    (q31_t)0x7fdcba51, (q31_t)0x7fdb8d67, (q31_t)0x7fda5b8f, (q31_t)0x7fd924ca,\n    (q31_t)0x7fd7e917, (q31_t)0x7fd6a875, (q31_t)0x7fd562e7, (q31_t)0x7fd4186a,\n    (q31_t)0x7fd2c900, (q31_t)0x7fd174a8, (q31_t)0x7fd01b63, (q31_t)0x7fcebd31,\n    (q31_t)0x7fcd5a11, (q31_t)0x7fcbf203, (q31_t)0x7fca8508, (q31_t)0x7fc91320,\n    (q31_t)0x7fc79c4b, (q31_t)0x7fc62089, (q31_t)0x7fc49fda, (q31_t)0x7fc31a3d,\n    (q31_t)0x7fc18fb4, (q31_t)0x7fc0003e, (q31_t)0x7fbe6bdb, (q31_t)0x7fbcd28b,\n    (q31_t)0x7fbb344e, (q31_t)0x7fb99125, (q31_t)0x7fb7e90f, (q31_t)0x7fb63c0d,\n    (q31_t)0x7fb48a1e, (q31_t)0x7fb2d343, (q31_t)0x7fb1177b, (q31_t)0x7faf56c7,\n    (q31_t)0x7fad9127, (q31_t)0x7fabc69b, (q31_t)0x7fa9f723, (q31_t)0x7fa822bf,\n    (q31_t)0x7fa6496e, (q31_t)0x7fa46b32, (q31_t)0x7fa2880b, (q31_t)0x7fa09ff7,\n    (q31_t)0x7f9eb2f8, (q31_t)0x7f9cc10d, (q31_t)0x7f9aca37, (q31_t)0x7f98ce76,\n    (q31_t)0x7f96cdc9, (q31_t)0x7f94c831, (q31_t)0x7f92bdad, (q31_t)0x7f90ae3f,\n    (q31_t)0x7f8e99e6, (q31_t)0x7f8c80a1, (q31_t)0x7f8a6272, (q31_t)0x7f883f58,\n    (q31_t)0x7f861753, (q31_t)0x7f83ea64, (q31_t)0x7f81b88a, (q31_t)0x7f7f81c6,\n    (q31_t)0x7f7d4617, (q31_t)0x7f7b057e, (q31_t)0x7f78bffb, (q31_t)0x7f76758e,\n    (q31_t)0x7f742637, (q31_t)0x7f71d1f6, (q31_t)0x7f6f78cb, (q31_t)0x7f6d1ab6,\n    (q31_t)0x7f6ab7b8, (q31_t)0x7f684fd0, (q31_t)0x7f65e2ff, (q31_t)0x7f637144,\n    (q31_t)0x7f60faa0, (q31_t)0x7f5e7f13, (q31_t)0x7f5bfe9d, (q31_t)0x7f59793e,\n    (q31_t)0x7f56eef5, (q31_t)0x7f545fc5, (q31_t)0x7f51cbab, (q31_t)0x7f4f32a9,\n    (q31_t)0x7f4c94be, (q31_t)0x7f49f1eb, (q31_t)0x7f474a30, (q31_t)0x7f449d8c,\n    (q31_t)0x7f41ec01, (q31_t)0x7f3f358d, (q31_t)0x7f3c7a31, (q31_t)0x7f39b9ee,\n    (q31_t)0x7f36f4c3, (q31_t)0x7f342ab1, (q31_t)0x7f315bb7, (q31_t)0x7f2e87d6,\n    (q31_t)0x7f2baf0d, (q31_t)0x7f28d15d, (q31_t)0x7f25eec7, (q31_t)0x7f230749,\n    (q31_t)0x7f201ae5, (q31_t)0x7f1d299a, (q31_t)0x7f1a3368, (q31_t)0x7f173850,\n    (q31_t)0x7f143852, (q31_t)0x7f11336d, (q31_t)0x7f0e29a3, (q31_t)0x7f0b1af2,\n    (q31_t)0x7f08075c, (q31_t)0x7f04eedf, (q31_t)0x7f01d17d, (q31_t)0x7efeaf36,\n    (q31_t)0x7efb8809, (q31_t)0x7ef85bf7, (q31_t)0x7ef52b00, (q31_t)0x7ef1f524,\n    (q31_t)0x7eeeba62, (q31_t)0x7eeb7abc, (q31_t)0x7ee83632, (q31_t)0x7ee4ecc3,\n    (q31_t)0x7ee19e6f, (q31_t)0x7ede4b38, (q31_t)0x7edaf31c, (q31_t)0x7ed7961c,\n    (q31_t)0x7ed43438, (q31_t)0x7ed0cd70, (q31_t)0x7ecd61c5, (q31_t)0x7ec9f137,\n    (q31_t)0x7ec67bc5, (q31_t)0x7ec3016f, (q31_t)0x7ebf8237, (q31_t)0x7ebbfe1c,\n    (q31_t)0x7eb8751e, (q31_t)0x7eb4e73d, (q31_t)0x7eb1547a, (q31_t)0x7eadbcd4,\n    (q31_t)0x7eaa204c, (q31_t)0x7ea67ee2, (q31_t)0x7ea2d896, (q31_t)0x7e9f2d68,\n    (q31_t)0x7e9b7d58, (q31_t)0x7e97c867, (q31_t)0x7e940e94, (q31_t)0x7e904fe0,\n    (q31_t)0x7e8c8c4b, (q31_t)0x7e88c3d5, (q31_t)0x7e84f67e, (q31_t)0x7e812447,\n    (q31_t)0x7e7d4d2f, (q31_t)0x7e797136, (q31_t)0x7e75905d, (q31_t)0x7e71aaa4,\n    (q31_t)0x7e6dc00c, (q31_t)0x7e69d093, (q31_t)0x7e65dc3b, (q31_t)0x7e61e303,\n    (q31_t)0x7e5de4ec, (q31_t)0x7e59e1f5, (q31_t)0x7e55da20, (q31_t)0x7e51cd6c,\n    (q31_t)0x7e4dbbd9, (q31_t)0x7e49a567, (q31_t)0x7e458a17, (q31_t)0x7e4169e9,\n    (q31_t)0x7e3d44dd, (q31_t)0x7e391af3, (q31_t)0x7e34ec2b, (q31_t)0x7e30b885,\n    (q31_t)0x7e2c8002, (q31_t)0x7e2842a2, (q31_t)0x7e240064, (q31_t)0x7e1fb94a,\n    (q31_t)0x7e1b6d53, (q31_t)0x7e171c7f, (q31_t)0x7e12c6ce, (q31_t)0x7e0e6c42,\n    (q31_t)0x7e0a0cd9, (q31_t)0x7e05a894, (q31_t)0x7e013f74, (q31_t)0x7dfcd178,\n    (q31_t)0x7df85ea0, (q31_t)0x7df3e6ee, (q31_t)0x7def6a60, (q31_t)0x7deae8f7,\n    (q31_t)0x7de662b3, (q31_t)0x7de1d795, (q31_t)0x7ddd479d, (q31_t)0x7dd8b2ca,\n    (q31_t)0x7dd4191d, (q31_t)0x7dcf7a96, (q31_t)0x7dcad736, (q31_t)0x7dc62efc,\n    (q31_t)0x7dc181e8, (q31_t)0x7dbccffc, (q31_t)0x7db81936, (q31_t)0x7db35d98,\n    (q31_t)0x7dae9d21, (q31_t)0x7da9d7d2, (q31_t)0x7da50dab, (q31_t)0x7da03eab,\n    (q31_t)0x7d9b6ad3, (q31_t)0x7d969224, (q31_t)0x7d91b49e, (q31_t)0x7d8cd240,\n    (q31_t)0x7d87eb0a, (q31_t)0x7d82fefe, (q31_t)0x7d7e0e1c, (q31_t)0x7d791862,\n    (q31_t)0x7d741dd2, (q31_t)0x7d6f1e6c, (q31_t)0x7d6a1a31, (q31_t)0x7d65111f,\n    (q31_t)0x7d600338, (q31_t)0x7d5af07b, (q31_t)0x7d55d8e9, (q31_t)0x7d50bc82,\n    (q31_t)0x7d4b9b46, (q31_t)0x7d467536, (q31_t)0x7d414a51, (q31_t)0x7d3c1a98,\n    (q31_t)0x7d36e60b, (q31_t)0x7d31acaa, (q31_t)0x7d2c6e76, (q31_t)0x7d272b6e,\n    (q31_t)0x7d21e393, (q31_t)0x7d1c96e5, (q31_t)0x7d174564, (q31_t)0x7d11ef11,\n    (q31_t)0x7d0c93eb, (q31_t)0x7d0733f3, (q31_t)0x7d01cf29, (q31_t)0x7cfc658d,\n    (q31_t)0x7cf6f720, (q31_t)0x7cf183e1, (q31_t)0x7cec0bd1, (q31_t)0x7ce68ef0,\n    (q31_t)0x7ce10d3f, (q31_t)0x7cdb86bd, (q31_t)0x7cd5fb6a, (q31_t)0x7cd06b48,\n    (q31_t)0x7ccad656, (q31_t)0x7cc53c94, (q31_t)0x7cbf9e03, (q31_t)0x7cb9faa2,\n    (q31_t)0x7cb45272, (q31_t)0x7caea574, (q31_t)0x7ca8f3a7, (q31_t)0x7ca33d0c,\n    (q31_t)0x7c9d81a3, (q31_t)0x7c97c16b, (q31_t)0x7c91fc66, (q31_t)0x7c8c3294,\n    (q31_t)0x7c8663f4, (q31_t)0x7c809088, (q31_t)0x7c7ab84e, (q31_t)0x7c74db48,\n    (q31_t)0x7c6ef976, (q31_t)0x7c6912d7, (q31_t)0x7c63276d, (q31_t)0x7c5d3737,\n    (q31_t)0x7c574236, (q31_t)0x7c514869, (q31_t)0x7c4b49d2, (q31_t)0x7c45466f,\n    (q31_t)0x7c3f3e42, (q31_t)0x7c39314b, (q31_t)0x7c331f8a, (q31_t)0x7c2d08ff,\n    (q31_t)0x7c26edab, (q31_t)0x7c20cd8d, (q31_t)0x7c1aa8a6, (q31_t)0x7c147ef6,\n    (q31_t)0x7c0e507e, (q31_t)0x7c081d3d, (q31_t)0x7c01e534, (q31_t)0x7bfba863,\n    (q31_t)0x7bf566cb, (q31_t)0x7bef206b, (q31_t)0x7be8d544, (q31_t)0x7be28556,\n    (q31_t)0x7bdc30a1, (q31_t)0x7bd5d726, (q31_t)0x7bcf78e5, (q31_t)0x7bc915dd,\n    (q31_t)0x7bc2ae10, (q31_t)0x7bbc417e, (q31_t)0x7bb5d026, (q31_t)0x7baf5a09,\n    (q31_t)0x7ba8df28, (q31_t)0x7ba25f82, (q31_t)0x7b9bdb18, (q31_t)0x7b9551ea,\n    (q31_t)0x7b8ec3f8, (q31_t)0x7b883143, (q31_t)0x7b8199ca, (q31_t)0x7b7afd8f,\n    (q31_t)0x7b745c91, (q31_t)0x7b6db6d0, (q31_t)0x7b670c4d, (q31_t)0x7b605d09,\n    (q31_t)0x7b59a902, (q31_t)0x7b52f03a, (q31_t)0x7b4c32b1, (q31_t)0x7b457068,\n    (q31_t)0x7b3ea95d, (q31_t)0x7b37dd92, (q31_t)0x7b310d07, (q31_t)0x7b2a37bc,\n    (q31_t)0x7b235db2, (q31_t)0x7b1c7ee8, (q31_t)0x7b159b5f, (q31_t)0x7b0eb318,\n    (q31_t)0x7b07c612, (q31_t)0x7b00d44d, (q31_t)0x7af9ddcb, (q31_t)0x7af2e28b,\n    (q31_t)0x7aebe28d, (q31_t)0x7ae4ddd2, (q31_t)0x7addd45b, (q31_t)0x7ad6c626,\n    (q31_t)0x7acfb336, (q31_t)0x7ac89b89, (q31_t)0x7ac17f20, (q31_t)0x7aba5dfc,\n    (q31_t)0x7ab3381d, (q31_t)0x7aac0d82, (q31_t)0x7aa4de2d, (q31_t)0x7a9daa1d,\n    (q31_t)0x7a967153, (q31_t)0x7a8f33d0, (q31_t)0x7a87f192, (q31_t)0x7a80aa9c,\n    (q31_t)0x7a795eec, (q31_t)0x7a720e84, (q31_t)0x7a6ab963, (q31_t)0x7a635f8a,\n    (q31_t)0x7a5c00f9, (q31_t)0x7a549db0, (q31_t)0x7a4d35b0, (q31_t)0x7a45c8f9,\n    (q31_t)0x7a3e578b, (q31_t)0x7a36e166, (q31_t)0x7a2f668c, (q31_t)0x7a27e6fb,\n    (q31_t)0x7a2062b5, (q31_t)0x7a18d9b9, (q31_t)0x7a114c09, (q31_t)0x7a09b9a4,\n    (q31_t)0x7a02228a, (q31_t)0x79fa86bc, (q31_t)0x79f2e63a, (q31_t)0x79eb4105,\n    (q31_t)0x79e3971c, (q31_t)0x79dbe880, (q31_t)0x79d43532, (q31_t)0x79cc7d31,\n    (q31_t)0x79c4c07e, (q31_t)0x79bcff19, (q31_t)0x79b53903, (q31_t)0x79ad6e3c,\n    (q31_t)0x79a59ec3, (q31_t)0x799dca9a, (q31_t)0x7995f1c1, (q31_t)0x798e1438,\n    (q31_t)0x798631ff, (q31_t)0x797e4b16, (q31_t)0x79765f7f, (q31_t)0x796e6f39,\n    (q31_t)0x79667a44, (q31_t)0x795e80a1, (q31_t)0x79568250, (q31_t)0x794e7f52,\n    (q31_t)0x794677a6, (q31_t)0x793e6b4e, (q31_t)0x79365a49, (q31_t)0x792e4497,\n    (q31_t)0x79262a3a, (q31_t)0x791e0b31, (q31_t)0x7915e77c, (q31_t)0x790dbf1d,\n    (q31_t)0x79059212, (q31_t)0x78fd605d, (q31_t)0x78f529fe, (q31_t)0x78eceef6,\n    (q31_t)0x78e4af44, (q31_t)0x78dc6ae8, (q31_t)0x78d421e4, (q31_t)0x78cbd437,\n    (q31_t)0x78c381e2, (q31_t)0x78bb2ae5, (q31_t)0x78b2cf41, (q31_t)0x78aa6ef5,\n    (q31_t)0x78a20a03, (q31_t)0x7899a06a, (q31_t)0x7891322a, (q31_t)0x7888bf45,\n    (q31_t)0x788047ba, (q31_t)0x7877cb89, (q31_t)0x786f4ab4, (q31_t)0x7866c53a,\n    (q31_t)0x785e3b1c, (q31_t)0x7855ac5a, (q31_t)0x784d18f4, (q31_t)0x784480ea,\n    (q31_t)0x783be43e, (q31_t)0x783342ef, (q31_t)0x782a9cfe, (q31_t)0x7821f26b,\n    (q31_t)0x78194336, (q31_t)0x78108f60, (q31_t)0x7807d6e9, (q31_t)0x77ff19d1,\n    (q31_t)0x77f65819, (q31_t)0x77ed91c0, (q31_t)0x77e4c6c9, (q31_t)0x77dbf732,\n    (q31_t)0x77d322fc, (q31_t)0x77ca4a27, (q31_t)0x77c16cb4, (q31_t)0x77b88aa3,\n    (q31_t)0x77afa3f5, (q31_t)0x77a6b8a9, (q31_t)0x779dc8c0, (q31_t)0x7794d43b,\n    (q31_t)0x778bdb19, (q31_t)0x7782dd5c, (q31_t)0x7779db03, (q31_t)0x7770d40f,\n    (q31_t)0x7767c880, (q31_t)0x775eb857, (q31_t)0x7755a394, (q31_t)0x774c8a36,\n    (q31_t)0x77436c40, (q31_t)0x773a49b0, (q31_t)0x77312287, (q31_t)0x7727f6c6,\n    (q31_t)0x771ec66e, (q31_t)0x7715917d, (q31_t)0x770c57f5, (q31_t)0x770319d6,\n    (q31_t)0x76f9d721, (q31_t)0x76f08fd5, (q31_t)0x76e743f4, (q31_t)0x76ddf37c,\n    (q31_t)0x76d49e70, (q31_t)0x76cb44cf, (q31_t)0x76c1e699, (q31_t)0x76b883d0,\n    (q31_t)0x76af1c72, (q31_t)0x76a5b082, (q31_t)0x769c3ffe, (q31_t)0x7692cae8,\n    (q31_t)0x7689513f, (q31_t)0x767fd304, (q31_t)0x76765038, (q31_t)0x766cc8db,\n    (q31_t)0x76633ced, (q31_t)0x7659ac6f, (q31_t)0x76501760, (q31_t)0x76467dc2,\n    (q31_t)0x763cdf94, (q31_t)0x76333cd8, (q31_t)0x7629958c, (q31_t)0x761fe9b3,\n    (q31_t)0x7616394c, (q31_t)0x760c8457, (q31_t)0x7602cad5, (q31_t)0x75f90cc7,\n    (q31_t)0x75ef4a2c, (q31_t)0x75e58305, (q31_t)0x75dbb753, (q31_t)0x75d1e715,\n    (q31_t)0x75c8124d, (q31_t)0x75be38fa, (q31_t)0x75b45b1d, (q31_t)0x75aa78b6,\n    (q31_t)0x75a091c6, (q31_t)0x7596a64d, (q31_t)0x758cb64c, (q31_t)0x7582c1c2,\n    (q31_t)0x7578c8b0, (q31_t)0x756ecb18, (q31_t)0x7564c8f8, (q31_t)0x755ac251,\n    (q31_t)0x7550b725, (q31_t)0x7546a772, (q31_t)0x753c933a, (q31_t)0x75327a7d,\n    (q31_t)0x75285d3b, (q31_t)0x751e3b75, (q31_t)0x7514152b, (q31_t)0x7509ea5d,\n    (q31_t)0x74ffbb0d, (q31_t)0x74f58739, (q31_t)0x74eb4ee3, (q31_t)0x74e1120c,\n    (q31_t)0x74d6d0b2, (q31_t)0x74cc8ad8, (q31_t)0x74c2407d, (q31_t)0x74b7f1a1,\n    (q31_t)0x74ad9e46, (q31_t)0x74a3466b, (q31_t)0x7498ea11, (q31_t)0x748e8938,\n    (q31_t)0x748423e0, (q31_t)0x7479ba0b, (q31_t)0x746f4bb8, (q31_t)0x7464d8e8,\n    (q31_t)0x745a619b, (q31_t)0x744fe5d2, (q31_t)0x7445658d, (q31_t)0x743ae0cc,\n    (q31_t)0x74305790, (q31_t)0x7425c9da, (q31_t)0x741b37a9, (q31_t)0x7410a0fe,\n    (q31_t)0x740605d9, (q31_t)0x73fb663c, (q31_t)0x73f0c226, (q31_t)0x73e61997,\n    (q31_t)0x73db6c91, (q31_t)0x73d0bb13, (q31_t)0x73c6051f, (q31_t)0x73bb4ab3,\n    (q31_t)0x73b08bd1, (q31_t)0x73a5c87a, (q31_t)0x739b00ad, (q31_t)0x7390346b,\n    (q31_t)0x738563b5, (q31_t)0x737a8e8a, (q31_t)0x736fb4ec, (q31_t)0x7364d6da,\n    (q31_t)0x7359f456, (q31_t)0x734f0d5f, (q31_t)0x734421f6, (q31_t)0x7339321b,\n    (q31_t)0x732e3dcf, (q31_t)0x73234512, (q31_t)0x731847e5, (q31_t)0x730d4648,\n    (q31_t)0x7302403c, (q31_t)0x72f735c0, (q31_t)0x72ec26d6, (q31_t)0x72e1137d,\n    (q31_t)0x72d5fbb7, (q31_t)0x72cadf83, (q31_t)0x72bfbee3, (q31_t)0x72b499d6,\n    (q31_t)0x72a9705c, (q31_t)0x729e4277, (q31_t)0x72931027, (q31_t)0x7287d96c,\n    (q31_t)0x727c9e47, (q31_t)0x72715eb8, (q31_t)0x72661abf, (q31_t)0x725ad25d,\n    (q31_t)0x724f8593, (q31_t)0x72443460, (q31_t)0x7238dec5, (q31_t)0x722d84c4,\n    (q31_t)0x7222265b, (q31_t)0x7216c38c, (q31_t)0x720b5c57, (q31_t)0x71fff0bc,\n    (q31_t)0x71f480bc, (q31_t)0x71e90c57, (q31_t)0x71dd938f, (q31_t)0x71d21662,\n    (q31_t)0x71c694d2, (q31_t)0x71bb0edf, (q31_t)0x71af848a, (q31_t)0x71a3f5d2,\n    (q31_t)0x719862b9, (q31_t)0x718ccb3f, (q31_t)0x71812f65, (q31_t)0x71758f29,\n    (q31_t)0x7169ea8f, (q31_t)0x715e4194, (q31_t)0x7152943b, (q31_t)0x7146e284,\n    (q31_t)0x713b2c6e, (q31_t)0x712f71fb, (q31_t)0x7123b32b, (q31_t)0x7117effe,\n    (q31_t)0x710c2875, (q31_t)0x71005c90, (q31_t)0x70f48c50, (q31_t)0x70e8b7b5,\n    (q31_t)0x70dcdec0, (q31_t)0x70d10171, (q31_t)0x70c51fc8, (q31_t)0x70b939c7,\n    (q31_t)0x70ad4f6d, (q31_t)0x70a160ba, (q31_t)0x70956db1, (q31_t)0x70897650,\n    (q31_t)0x707d7a98, (q31_t)0x70717a8a, (q31_t)0x70657626, (q31_t)0x70596d6d,\n    (q31_t)0x704d6060, (q31_t)0x70414efd, (q31_t)0x70353947, (q31_t)0x70291f3e,\n    (q31_t)0x701d00e1, (q31_t)0x7010de32, (q31_t)0x7004b731, (q31_t)0x6ff88bde,\n    (q31_t)0x6fec5c3b, (q31_t)0x6fe02846, (q31_t)0x6fd3f001, (q31_t)0x6fc7b36d,\n    (q31_t)0x6fbb728a, (q31_t)0x6faf2d57, (q31_t)0x6fa2e3d7, (q31_t)0x6f969608,\n    (q31_t)0x6f8a43ed, (q31_t)0x6f7ded84, (q31_t)0x6f7192cf, (q31_t)0x6f6533ce,\n    (q31_t)0x6f58d082, (q31_t)0x6f4c68eb, (q31_t)0x6f3ffd09, (q31_t)0x6f338cde,\n    (q31_t)0x6f271868, (q31_t)0x6f1a9faa, (q31_t)0x6f0e22a3, (q31_t)0x6f01a155,\n    (q31_t)0x6ef51bbe, (q31_t)0x6ee891e1, (q31_t)0x6edc03bc, (q31_t)0x6ecf7152,\n    (q31_t)0x6ec2daa2, (q31_t)0x6eb63fad, (q31_t)0x6ea9a073, (q31_t)0x6e9cfcf5,\n    (q31_t)0x6e905534, (q31_t)0x6e83a92f, (q31_t)0x6e76f8e7, (q31_t)0x6e6a445d,\n    (q31_t)0x6e5d8b91, (q31_t)0x6e50ce84, (q31_t)0x6e440d37, (q31_t)0x6e3747a9,\n    (q31_t)0x6e2a7ddb, (q31_t)0x6e1dafce, (q31_t)0x6e10dd82, (q31_t)0x6e0406f8,\n    (q31_t)0x6df72c30, (q31_t)0x6dea4d2b, (q31_t)0x6ddd69e9, (q31_t)0x6dd0826a,\n    (q31_t)0x6dc396b0, (q31_t)0x6db6a6ba, (q31_t)0x6da9b28a, (q31_t)0x6d9cba1f,\n    (q31_t)0x6d8fbd7a, (q31_t)0x6d82bc9d, (q31_t)0x6d75b786, (q31_t)0x6d68ae37,\n    (q31_t)0x6d5ba0b0, (q31_t)0x6d4e8ef2, (q31_t)0x6d4178fd, (q31_t)0x6d345ed1,\n    (q31_t)0x6d274070, (q31_t)0x6d1a1dda, (q31_t)0x6d0cf70f, (q31_t)0x6cffcc0f,\n    (q31_t)0x6cf29cdc, (q31_t)0x6ce56975, (q31_t)0x6cd831dc, (q31_t)0x6ccaf610,\n    (q31_t)0x6cbdb613, (q31_t)0x6cb071e4, (q31_t)0x6ca32985, (q31_t)0x6c95dcf6,\n    (q31_t)0x6c888c36, (q31_t)0x6c7b3748, (q31_t)0x6c6dde2b, (q31_t)0x6c6080e0,\n    (q31_t)0x6c531f67, (q31_t)0x6c45b9c1, (q31_t)0x6c384fef, (q31_t)0x6c2ae1f0,\n    (q31_t)0x6c1d6fc6, (q31_t)0x6c0ff971, (q31_t)0x6c027ef1, (q31_t)0x6bf50047,\n    (q31_t)0x6be77d74, (q31_t)0x6bd9f677, (q31_t)0x6bcc6b53, (q31_t)0x6bbedc06,\n    (q31_t)0x6bb14892, (q31_t)0x6ba3b0f7, (q31_t)0x6b961536, (q31_t)0x6b88754f,\n    (q31_t)0x6b7ad142, (q31_t)0x6b6d2911, (q31_t)0x6b5f7cbc, (q31_t)0x6b51cc42,\n    (q31_t)0x6b4417a6, (q31_t)0x6b365ee7, (q31_t)0x6b28a206, (q31_t)0x6b1ae103,\n    (q31_t)0x6b0d1bdf, (q31_t)0x6aff529a, (q31_t)0x6af18536, (q31_t)0x6ae3b3b2,\n    (q31_t)0x6ad5de0f, (q31_t)0x6ac8044e, (q31_t)0x6aba266e, (q31_t)0x6aac4472,\n    (q31_t)0x6a9e5e58, (q31_t)0x6a907423, (q31_t)0x6a8285d1, (q31_t)0x6a749365,\n    (q31_t)0x6a669cdd, (q31_t)0x6a58a23c, (q31_t)0x6a4aa381, (q31_t)0x6a3ca0ad,\n    (q31_t)0x6a2e99c0, (q31_t)0x6a208ebb, (q31_t)0x6a127f9f, (q31_t)0x6a046c6c,\n    (q31_t)0x69f65523, (q31_t)0x69e839c4, (q31_t)0x69da1a50, (q31_t)0x69cbf6c7,\n    (q31_t)0x69bdcf29, (q31_t)0x69afa378, (q31_t)0x69a173b5, (q31_t)0x69933fde,\n    (q31_t)0x698507f6, (q31_t)0x6976cbfc, (q31_t)0x69688bf1, (q31_t)0x695a47d6,\n    (q31_t)0x694bffab, (q31_t)0x693db371, (q31_t)0x692f6328, (q31_t)0x69210ed1,\n    (q31_t)0x6912b66c, (q31_t)0x690459fb, (q31_t)0x68f5f97d, (q31_t)0x68e794f3,\n    (q31_t)0x68d92c5d, (q31_t)0x68cabfbd, (q31_t)0x68bc4f13, (q31_t)0x68adda5f,\n    (q31_t)0x689f61a1, (q31_t)0x6890e4dc, (q31_t)0x6882640e, (q31_t)0x6873df38,\n    (q31_t)0x6865565c, (q31_t)0x6856c979, (q31_t)0x68483891, (q31_t)0x6839a3a4,\n    (q31_t)0x682b0ab1, (q31_t)0x681c6dbb, (q31_t)0x680dccc1, (q31_t)0x67ff27c4,\n    (q31_t)0x67f07ec5, (q31_t)0x67e1d1c4, (q31_t)0x67d320c1, (q31_t)0x67c46bbe,\n    (q31_t)0x67b5b2bb, (q31_t)0x67a6f5b8, (q31_t)0x679834b6, (q31_t)0x67896fb6,\n    (q31_t)0x677aa6b8, (q31_t)0x676bd9bd, (q31_t)0x675d08c4, (q31_t)0x674e33d0,\n    (q31_t)0x673f5ae0, (q31_t)0x67307df5, (q31_t)0x67219d10, (q31_t)0x6712b831,\n    (q31_t)0x6703cf58, (q31_t)0x66f4e287, (q31_t)0x66e5f1be, (q31_t)0x66d6fcfd,\n    (q31_t)0x66c80445, (q31_t)0x66b90797, (q31_t)0x66aa06f3, (q31_t)0x669b0259,\n    (q31_t)0x668bf9cb, (q31_t)0x667ced49, (q31_t)0x666ddcd3, (q31_t)0x665ec86b,\n    (q31_t)0x664fb010, (q31_t)0x664093c3, (q31_t)0x66317385, (q31_t)0x66224f56,\n    (q31_t)0x66132738, (q31_t)0x6603fb2a, (q31_t)0x65f4cb2d, (q31_t)0x65e59742,\n    (q31_t)0x65d65f69, (q31_t)0x65c723a3, (q31_t)0x65b7e3f1, (q31_t)0x65a8a052,\n    (q31_t)0x659958c9, (q31_t)0x658a0d54, (q31_t)0x657abdf6, (q31_t)0x656b6aae,\n    (q31_t)0x655c137d, (q31_t)0x654cb863, (q31_t)0x653d5962, (q31_t)0x652df679,\n    (q31_t)0x651e8faa, (q31_t)0x650f24f5, (q31_t)0x64ffb65b, (q31_t)0x64f043dc,\n    (q31_t)0x64e0cd78, (q31_t)0x64d15331, (q31_t)0x64c1d507, (q31_t)0x64b252fa,\n    (q31_t)0x64a2cd0c, (q31_t)0x6493433c, (q31_t)0x6483b58c, (q31_t)0x647423fb,\n    (q31_t)0x64648e8c, (q31_t)0x6454f53d, (q31_t)0x64455810, (q31_t)0x6435b706,\n    (q31_t)0x6426121e, (q31_t)0x6416695a, (q31_t)0x6406bcba, (q31_t)0x63f70c3f,\n    (q31_t)0x63e757ea, (q31_t)0x63d79fba, (q31_t)0x63c7e3b1, (q31_t)0x63b823cf,\n    (q31_t)0x63a86015, (q31_t)0x63989884, (q31_t)0x6388cd1b, (q31_t)0x6378fddc,\n    (q31_t)0x63692ac7, (q31_t)0x635953dd, (q31_t)0x6349791f, (q31_t)0x63399a8d,\n    (q31_t)0x6329b827, (q31_t)0x6319d1ef, (q31_t)0x6309e7e4, (q31_t)0x62f9fa09,\n    (q31_t)0x62ea085c, (q31_t)0x62da12df, (q31_t)0x62ca1992, (q31_t)0x62ba1c77,\n    (q31_t)0x62aa1b8d, (q31_t)0x629a16d5, (q31_t)0x628a0e50, (q31_t)0x627a01fe,\n    (q31_t)0x6269f1e1, (q31_t)0x6259ddf8, (q31_t)0x6249c645, (q31_t)0x6239aac7,\n    (q31_t)0x62298b81, (q31_t)0x62196871, (q31_t)0x62094199, (q31_t)0x61f916f9,\n    (q31_t)0x61e8e893, (q31_t)0x61d8b666, (q31_t)0x61c88074, (q31_t)0x61b846bc,\n    (q31_t)0x61a80940, (q31_t)0x6197c800, (q31_t)0x618782fd, (q31_t)0x61773a37,\n    (q31_t)0x6166edb0, (q31_t)0x61569d67, (q31_t)0x6146495d, (q31_t)0x6135f193,\n    (q31_t)0x6125960a, (q31_t)0x611536c2, (q31_t)0x6104d3bc, (q31_t)0x60f46cf9,\n    (q31_t)0x60e40278, (q31_t)0x60d3943b, (q31_t)0x60c32243, (q31_t)0x60b2ac8f,\n    (q31_t)0x60a23322, (q31_t)0x6091b5fa, (q31_t)0x60813519, (q31_t)0x6070b080,\n    (q31_t)0x6060282f, (q31_t)0x604f9c27, (q31_t)0x603f0c69, (q31_t)0x602e78f4,\n    (q31_t)0x601de1ca, (q31_t)0x600d46ec, (q31_t)0x5ffca859, (q31_t)0x5fec0613,\n    (q31_t)0x5fdb601b, (q31_t)0x5fcab670, (q31_t)0x5fba0914, (q31_t)0x5fa95807,\n    (q31_t)0x5f98a34a, (q31_t)0x5f87eade, (q31_t)0x5f772ec2, (q31_t)0x5f666ef9,\n    (q31_t)0x5f55ab82, (q31_t)0x5f44e45e, (q31_t)0x5f34198e, (q31_t)0x5f234b12,\n    (q31_t)0x5f1278eb, (q31_t)0x5f01a31a, (q31_t)0x5ef0c99f, (q31_t)0x5edfec7b,\n    (q31_t)0x5ecf0baf, (q31_t)0x5ebe273b, (q31_t)0x5ead3f1f, (q31_t)0x5e9c535e,\n    (q31_t)0x5e8b63f7, (q31_t)0x5e7a70ea, (q31_t)0x5e697a39, (q31_t)0x5e587fe5,\n    (q31_t)0x5e4781ed, (q31_t)0x5e368053, (q31_t)0x5e257b17, (q31_t)0x5e147239,\n    (q31_t)0x5e0365bb, (q31_t)0x5df2559e, (q31_t)0x5de141e1, (q31_t)0x5dd02a85,\n    (q31_t)0x5dbf0f8c, (q31_t)0x5dadf0f5, (q31_t)0x5d9ccec2, (q31_t)0x5d8ba8f3,\n    (q31_t)0x5d7a7f88, (q31_t)0x5d695283, (q31_t)0x5d5821e4, (q31_t)0x5d46edac,\n    (q31_t)0x5d35b5db, (q31_t)0x5d247a72, (q31_t)0x5d133b72, (q31_t)0x5d01f8dc,\n    (q31_t)0x5cf0b2af, (q31_t)0x5cdf68ed, (q31_t)0x5cce1b97, (q31_t)0x5cbccaac,\n    (q31_t)0x5cab762f, (q31_t)0x5c9a1e1e, (q31_t)0x5c88c27c, (q31_t)0x5c776348,\n    (q31_t)0x5c660084, (q31_t)0x5c549a30, (q31_t)0x5c43304d, (q31_t)0x5c31c2db,\n    (q31_t)0x5c2051db, (q31_t)0x5c0edd4e, (q31_t)0x5bfd6534, (q31_t)0x5bebe98e,\n    (q31_t)0x5bda6a5d, (q31_t)0x5bc8e7a2, (q31_t)0x5bb7615d, (q31_t)0x5ba5d78e,\n    (q31_t)0x5b944a37, (q31_t)0x5b82b958, (q31_t)0x5b7124f2, (q31_t)0x5b5f8d06,\n    (q31_t)0x5b4df193, (q31_t)0x5b3c529c, (q31_t)0x5b2ab020, (q31_t)0x5b190a20,\n    (q31_t)0x5b07609d, (q31_t)0x5af5b398, (q31_t)0x5ae40311, (q31_t)0x5ad24f09,\n    (q31_t)0x5ac09781, (q31_t)0x5aaedc78, (q31_t)0x5a9d1df1, (q31_t)0x5a8b5bec,\n    (q31_t)0x5a799669, (q31_t)0x5a67cd69, (q31_t)0x5a5600ec, (q31_t)0x5a4430f5,\n    (q31_t)0x5a325d82, (q31_t)0x5a208695, (q31_t)0x5a0eac2e, (q31_t)0x59fcce4f,\n    (q31_t)0x59eaecf8, (q31_t)0x59d90829, (q31_t)0x59c71fe3, (q31_t)0x59b53427,\n    (q31_t)0x59a344f6, (q31_t)0x59915250, (q31_t)0x597f5c36, (q31_t)0x596d62a9,\n    (q31_t)0x595b65aa, (q31_t)0x59496538, (q31_t)0x59376155, (q31_t)0x59255a02,\n    (q31_t)0x59134f3e, (q31_t)0x5901410c, (q31_t)0x58ef2f6b, (q31_t)0x58dd1a5d,\n    (q31_t)0x58cb01e1, (q31_t)0x58b8e5f9, (q31_t)0x58a6c6a5, (q31_t)0x5894a3e7,\n    (q31_t)0x58827dbe, (q31_t)0x5870542c, (q31_t)0x585e2730, (q31_t)0x584bf6cd,\n    (q31_t)0x5839c302, (q31_t)0x58278bd1, (q31_t)0x58155139, (q31_t)0x5803133c,\n    (q31_t)0x57f0d1da, (q31_t)0x57de8d15, (q31_t)0x57cc44ec, (q31_t)0x57b9f960,\n    (q31_t)0x57a7aa73, (q31_t)0x57955825, (q31_t)0x57830276, (q31_t)0x5770a968,\n    (q31_t)0x575e4cfa, (q31_t)0x574bed2f, (q31_t)0x57398a05, (q31_t)0x5727237f,\n    (q31_t)0x5714b99d, (q31_t)0x57024c5f, (q31_t)0x56efdbc7, (q31_t)0x56dd67d4,\n    (q31_t)0x56caf088, (q31_t)0x56b875e4, (q31_t)0x56a5f7e7, (q31_t)0x56937694,\n    (q31_t)0x5680f1ea, (q31_t)0x566e69ea, (q31_t)0x565bde95, (q31_t)0x56494fec,\n    (q31_t)0x5636bdef, (q31_t)0x5624289f, (q31_t)0x56118ffe, (q31_t)0x55fef40a,\n    (q31_t)0x55ec54c6, (q31_t)0x55d9b232, (q31_t)0x55c70c4f, (q31_t)0x55b4631d,\n    (q31_t)0x55a1b69d, (q31_t)0x558f06d0, (q31_t)0x557c53b6, (q31_t)0x55699d51,\n    (q31_t)0x5556e3a1, (q31_t)0x554426a7, (q31_t)0x55316663, (q31_t)0x551ea2d6,\n    (q31_t)0x550bdc01, (q31_t)0x54f911e5, (q31_t)0x54e64482, (q31_t)0x54d373d9,\n    (q31_t)0x54c09feb, (q31_t)0x54adc8b8, (q31_t)0x549aee42, (q31_t)0x54881089,\n    (q31_t)0x54752f8d, (q31_t)0x54624b50, (q31_t)0x544f63d2, (q31_t)0x543c7914,\n    (q31_t)0x54298b17, (q31_t)0x541699db, (q31_t)0x5403a561, (q31_t)0x53f0adaa,\n    (q31_t)0x53ddb2b6, (q31_t)0x53cab486, (q31_t)0x53b7b31c, (q31_t)0x53a4ae77,\n    (q31_t)0x5391a699, (q31_t)0x537e9b82, (q31_t)0x536b8d33, (q31_t)0x53587bad,\n    (q31_t)0x534566f0, (q31_t)0x53324efd, (q31_t)0x531f33d5, (q31_t)0x530c1579,\n    (q31_t)0x52f8f3e9, (q31_t)0x52e5cf27, (q31_t)0x52d2a732, (q31_t)0x52bf7c0b,\n    (q31_t)0x52ac4db4, (q31_t)0x52991c2d, (q31_t)0x5285e777, (q31_t)0x5272af92,\n    (q31_t)0x525f7480, (q31_t)0x524c3640, (q31_t)0x5238f4d4, (q31_t)0x5225b03d,\n    (q31_t)0x5212687b, (q31_t)0x51ff1d8f, (q31_t)0x51ebcf7a, (q31_t)0x51d87e3c,\n    (q31_t)0x51c529d7, (q31_t)0x51b1d24a, (q31_t)0x519e7797, (q31_t)0x518b19bf,\n    (q31_t)0x5177b8c2, (q31_t)0x516454a0, (q31_t)0x5150ed5c, (q31_t)0x513d82f4,\n    (q31_t)0x512a156b, (q31_t)0x5116a4c1, (q31_t)0x510330f7, (q31_t)0x50efba0d,\n    (q31_t)0x50dc4005, (q31_t)0x50c8c2de, (q31_t)0x50b5429a, (q31_t)0x50a1bf39,\n    (q31_t)0x508e38bd, (q31_t)0x507aaf25, (q31_t)0x50672273, (q31_t)0x505392a8,\n    (q31_t)0x503fffc4, (q31_t)0x502c69c8, (q31_t)0x5018d0b4, (q31_t)0x5005348a,\n    (q31_t)0x4ff1954b, (q31_t)0x4fddf2f6, (q31_t)0x4fca4d8d, (q31_t)0x4fb6a510,\n    (q31_t)0x4fa2f981, (q31_t)0x4f8f4ae0, (q31_t)0x4f7b992d, (q31_t)0x4f67e46a,\n    (q31_t)0x4f542c98, (q31_t)0x4f4071b6, (q31_t)0x4f2cb3c7, (q31_t)0x4f18f2c9,\n    (q31_t)0x4f052ec0, (q31_t)0x4ef167aa, (q31_t)0x4edd9d89, (q31_t)0x4ec9d05e,\n    (q31_t)0x4eb60029, (q31_t)0x4ea22ceb, (q31_t)0x4e8e56a5, (q31_t)0x4e7a7d58,\n    (q31_t)0x4e66a105, (q31_t)0x4e52c1ab, (q31_t)0x4e3edf4d, (q31_t)0x4e2af9ea,\n    (q31_t)0x4e171184, (q31_t)0x4e03261b, (q31_t)0x4def37b0, (q31_t)0x4ddb4644,\n    (q31_t)0x4dc751d8, (q31_t)0x4db35a6c, (q31_t)0x4d9f6001, (q31_t)0x4d8b6298,\n    (q31_t)0x4d776231, (q31_t)0x4d635ece, (q31_t)0x4d4f5870, (q31_t)0x4d3b4f16,\n    (q31_t)0x4d2742c2, (q31_t)0x4d133374, (q31_t)0x4cff212e, (q31_t)0x4ceb0bf0,\n    (q31_t)0x4cd6f3bb, (q31_t)0x4cc2d88f, (q31_t)0x4caeba6e, (q31_t)0x4c9a9958,\n    (q31_t)0x4c86754e, (q31_t)0x4c724e50, (q31_t)0x4c5e2460, (q31_t)0x4c49f77f,\n    (q31_t)0x4c35c7ac, (q31_t)0x4c2194e9, (q31_t)0x4c0d5f37, (q31_t)0x4bf92697,\n    (q31_t)0x4be4eb08, (q31_t)0x4bd0ac8d, (q31_t)0x4bbc6b25, (q31_t)0x4ba826d1,\n    (q31_t)0x4b93df93, (q31_t)0x4b7f956b, (q31_t)0x4b6b485a, (q31_t)0x4b56f861,\n    (q31_t)0x4b42a580, (q31_t)0x4b2e4fb8, (q31_t)0x4b19f70a, (q31_t)0x4b059b77,\n    (q31_t)0x4af13d00, (q31_t)0x4adcdba5, (q31_t)0x4ac87767, (q31_t)0x4ab41046,\n    (q31_t)0x4a9fa645, (q31_t)0x4a8b3963, (q31_t)0x4a76c9a2, (q31_t)0x4a625701,\n    (q31_t)0x4a4de182, (q31_t)0x4a396926, (q31_t)0x4a24edee, (q31_t)0x4a106fda,\n    (q31_t)0x49fbeeea, (q31_t)0x49e76b21, (q31_t)0x49d2e47e, (q31_t)0x49be5b02,\n    (q31_t)0x49a9ceaf, (q31_t)0x49953f84, (q31_t)0x4980ad84, (q31_t)0x496c18ae,\n    (q31_t)0x49578103, (q31_t)0x4942e684, (q31_t)0x492e4933, (q31_t)0x4919a90f,\n    (q31_t)0x4905061a, (q31_t)0x48f06054, (q31_t)0x48dbb7be, (q31_t)0x48c70c59,\n    (q31_t)0x48b25e25, (q31_t)0x489dad25, (q31_t)0x4888f957, (q31_t)0x487442be,\n    (q31_t)0x485f8959, (q31_t)0x484acd2a, (q31_t)0x48360e32, (q31_t)0x48214c71,\n    (q31_t)0x480c87e8, (q31_t)0x47f7c099, (q31_t)0x47e2f682, (q31_t)0x47ce29a7,\n    (q31_t)0x47b95a06, (q31_t)0x47a487a2, (q31_t)0x478fb27b, (q31_t)0x477ada91,\n    (q31_t)0x4765ffe6, (q31_t)0x4751227a, (q31_t)0x473c424e, (q31_t)0x47275f63,\n    (q31_t)0x471279ba, (q31_t)0x46fd9154, (q31_t)0x46e8a631, (q31_t)0x46d3b852,\n    (q31_t)0x46bec7b8, (q31_t)0x46a9d464, (q31_t)0x4694de56, (q31_t)0x467fe590,\n    (q31_t)0x466aea12, (q31_t)0x4655ebdd, (q31_t)0x4640eaf2, (q31_t)0x462be751,\n    (q31_t)0x4616e0fc, (q31_t)0x4601d7f3, (q31_t)0x45eccc37, (q31_t)0x45d7bdc9,\n    (q31_t)0x45c2acaa, (q31_t)0x45ad98da, (q31_t)0x4598825a, (q31_t)0x4583692c,\n    (q31_t)0x456e4d4f, (q31_t)0x45592ec6, (q31_t)0x45440d90, (q31_t)0x452ee9ae,\n    (q31_t)0x4519c321, (q31_t)0x450499eb, (q31_t)0x44ef6e0b, (q31_t)0x44da3f83,\n    (q31_t)0x44c50e53, (q31_t)0x44afda7d, (q31_t)0x449aa400, (q31_t)0x44856adf,\n    (q31_t)0x44702f19, (q31_t)0x445af0b0, (q31_t)0x4445afa4, (q31_t)0x44306bf6,\n    (q31_t)0x441b25a8, (q31_t)0x4405dcb9, (q31_t)0x43f0912b, (q31_t)0x43db42fe,\n    (q31_t)0x43c5f234, (q31_t)0x43b09ecc, (q31_t)0x439b48c9, (q31_t)0x4385f02a,\n    (q31_t)0x437094f1, (q31_t)0x435b371f, (q31_t)0x4345d6b3, (q31_t)0x433073b0,\n    (q31_t)0x431b0e15, (q31_t)0x4305a5e5, (q31_t)0x42f03b1e, (q31_t)0x42dacdc3,\n    (q31_t)0x42c55dd4, (q31_t)0x42afeb53, (q31_t)0x429a763f, (q31_t)0x4284fe99,\n    (q31_t)0x426f8463, (q31_t)0x425a079e, (q31_t)0x42448849, (q31_t)0x422f0667,\n    (q31_t)0x421981f7, (q31_t)0x4203fafb, (q31_t)0x41ee7174, (q31_t)0x41d8e561,\n    (q31_t)0x41c356c5, (q31_t)0x41adc5a0, (q31_t)0x419831f3, (q31_t)0x41829bbe,\n    (q31_t)0x416d0302, (q31_t)0x415767c1, (q31_t)0x4141c9fb, (q31_t)0x412c29b1,\n    (q31_t)0x411686e4, (q31_t)0x4100e194, (q31_t)0x40eb39c3, (q31_t)0x40d58f71,\n    (q31_t)0x40bfe29f, (q31_t)0x40aa334e, (q31_t)0x4094817f, (q31_t)0x407ecd32,\n    (q31_t)0x40691669, (q31_t)0x40535d24, (q31_t)0x403da165, (q31_t)0x4027e32b,\n    (q31_t)0x40122278, (q31_t)0x3ffc5f4d, (q31_t)0x3fe699aa, (q31_t)0x3fd0d191,\n    (q31_t)0x3fbb0702, (q31_t)0x3fa539fd, (q31_t)0x3f8f6a85, (q31_t)0x3f799899,\n    (q31_t)0x3f63c43b, (q31_t)0x3f4ded6b, (q31_t)0x3f38142a, (q31_t)0x3f22387a,\n    (q31_t)0x3f0c5a5a, (q31_t)0x3ef679cc, (q31_t)0x3ee096d1, (q31_t)0x3ecab169,\n    (q31_t)0x3eb4c995, (q31_t)0x3e9edf57, (q31_t)0x3e88f2ae, (q31_t)0x3e73039d,\n    (q31_t)0x3e5d1222, (q31_t)0x3e471e41, (q31_t)0x3e3127f9, (q31_t)0x3e1b2f4a,\n    (q31_t)0x3e053437, (q31_t)0x3def36c0, (q31_t)0x3dd936e6, (q31_t)0x3dc334a9,\n    (q31_t)0x3dad300b, (q31_t)0x3d97290b, (q31_t)0x3d811fac, (q31_t)0x3d6b13ee,\n    (q31_t)0x3d5505d2, (q31_t)0x3d3ef559, (q31_t)0x3d28e282, (q31_t)0x3d12cd51,\n    (q31_t)0x3cfcb5c4, (q31_t)0x3ce69bde, (q31_t)0x3cd07f9f, (q31_t)0x3cba6107,\n    (q31_t)0x3ca44018, (q31_t)0x3c8e1cd3, (q31_t)0x3c77f737, (q31_t)0x3c61cf48,\n    (q31_t)0x3c4ba504, (q31_t)0x3c35786d, (q31_t)0x3c1f4983, (q31_t)0x3c091849,\n    (q31_t)0x3bf2e4be, (q31_t)0x3bdcaee3, (q31_t)0x3bc676b9, (q31_t)0x3bb03c42,\n    (q31_t)0x3b99ff7d, (q31_t)0x3b83c06c, (q31_t)0x3b6d7f10, (q31_t)0x3b573b69,\n    (q31_t)0x3b40f579, (q31_t)0x3b2aad3f, (q31_t)0x3b1462be, (q31_t)0x3afe15f6,\n    (q31_t)0x3ae7c6e7, (q31_t)0x3ad17593, (q31_t)0x3abb21fb, (q31_t)0x3aa4cc1e,\n    (q31_t)0x3a8e7400, (q31_t)0x3a78199f, (q31_t)0x3a61bcfd, (q31_t)0x3a4b5e1b,\n    (q31_t)0x3a34fcf9, (q31_t)0x3a1e9999, (q31_t)0x3a0833fc, (q31_t)0x39f1cc21,\n    (q31_t)0x39db620b, (q31_t)0x39c4f5ba, (q31_t)0x39ae872f, (q31_t)0x3998166a,\n    (q31_t)0x3981a36d, (q31_t)0x396b2e38, (q31_t)0x3954b6cd, (q31_t)0x393e3d2c,\n    (q31_t)0x3927c155, (q31_t)0x3911434b, (q31_t)0x38fac30e, (q31_t)0x38e4409e,\n    (q31_t)0x38cdbbfc, (q31_t)0x38b7352a, (q31_t)0x38a0ac29, (q31_t)0x388a20f8,\n    (q31_t)0x38739399, (q31_t)0x385d040d, (q31_t)0x38467255, (q31_t)0x382fde72,\n    (q31_t)0x38194864, (q31_t)0x3802b02c, (q31_t)0x37ec15cb, (q31_t)0x37d57943,\n    (q31_t)0x37beda93, (q31_t)0x37a839be, (q31_t)0x379196c3, (q31_t)0x377af1a3,\n    (q31_t)0x37644a60, (q31_t)0x374da0fa, (q31_t)0x3736f573, (q31_t)0x372047ca,\n    (q31_t)0x37099802, (q31_t)0x36f2e61a, (q31_t)0x36dc3214, (q31_t)0x36c57bf0,\n    (q31_t)0x36aec3b0, (q31_t)0x36980954, (q31_t)0x36814cde, (q31_t)0x366a8e4d,\n    (q31_t)0x3653cda3, (q31_t)0x363d0ae2, (q31_t)0x36264609, (q31_t)0x360f7f19,\n    (q31_t)0x35f8b614, (q31_t)0x35e1eafa, (q31_t)0x35cb1dcc, (q31_t)0x35b44e8c,\n    (q31_t)0x359d7d39, (q31_t)0x3586a9d5, (q31_t)0x356fd461, (q31_t)0x3558fcde,\n    (q31_t)0x3542234c, (q31_t)0x352b47ad, (q31_t)0x35146a00, (q31_t)0x34fd8a48,\n    (q31_t)0x34e6a885, (q31_t)0x34cfc4b7, (q31_t)0x34b8dee1, (q31_t)0x34a1f702,\n    (q31_t)0x348b0d1c, (q31_t)0x3474212f, (q31_t)0x345d333c, (q31_t)0x34464345,\n    (q31_t)0x342f5149, (q31_t)0x34185d4b, (q31_t)0x3401674a, (q31_t)0x33ea6f48,\n    (q31_t)0x33d37546, (q31_t)0x33bc7944, (q31_t)0x33a57b44, (q31_t)0x338e7b46,\n    (q31_t)0x3377794b, (q31_t)0x33607554, (q31_t)0x33496f62, (q31_t)0x33326776,\n    (q31_t)0x331b5d91, (q31_t)0x330451b3, (q31_t)0x32ed43de, (q31_t)0x32d63412,\n    (q31_t)0x32bf2250, (q31_t)0x32a80e99, (q31_t)0x3290f8ef, (q31_t)0x3279e151,\n    (q31_t)0x3262c7c1, (q31_t)0x324bac40, (q31_t)0x32348ecf, (q31_t)0x321d6f6e,\n    (q31_t)0x32064e1e, (q31_t)0x31ef2ae1, (q31_t)0x31d805b7, (q31_t)0x31c0dea1,\n    (q31_t)0x31a9b5a0, (q31_t)0x31928ab4, (q31_t)0x317b5de0, (q31_t)0x31642f23,\n    (q31_t)0x314cfe7f, (q31_t)0x3135cbf4, (q31_t)0x311e9783, (q31_t)0x3107612e,\n    (q31_t)0x30f028f4, (q31_t)0x30d8eed8, (q31_t)0x30c1b2da, (q31_t)0x30aa74fa,\n    (q31_t)0x3093353a, (q31_t)0x307bf39b, (q31_t)0x3064b01d, (q31_t)0x304d6ac1,\n    (q31_t)0x30362389, (q31_t)0x301eda75, (q31_t)0x30078f86, (q31_t)0x2ff042bd,\n    (q31_t)0x2fd8f41b, (q31_t)0x2fc1a3a0, (q31_t)0x2faa514f, (q31_t)0x2f92fd26,\n    (q31_t)0x2f7ba729, (q31_t)0x2f644f56, (q31_t)0x2f4cf5b0, (q31_t)0x2f359a37,\n    (q31_t)0x2f1e3ced, (q31_t)0x2f06ddd1, (q31_t)0x2eef7ce5, (q31_t)0x2ed81a29,\n    (q31_t)0x2ec0b5a0, (q31_t)0x2ea94f49, (q31_t)0x2e91e725, (q31_t)0x2e7a7d36,\n    (q31_t)0x2e63117c, (q31_t)0x2e4ba3f8, (q31_t)0x2e3434ac, (q31_t)0x2e1cc397,\n    (q31_t)0x2e0550bb, (q31_t)0x2deddc19, (q31_t)0x2dd665b2, (q31_t)0x2dbeed86,\n    (q31_t)0x2da77397, (q31_t)0x2d8ff7e5, (q31_t)0x2d787a72, (q31_t)0x2d60fb3e,\n    (q31_t)0x2d497a4a, (q31_t)0x2d31f797, (q31_t)0x2d1a7325, (q31_t)0x2d02ecf7,\n    (q31_t)0x2ceb650d, (q31_t)0x2cd3db67, (q31_t)0x2cbc5006, (q31_t)0x2ca4c2ed,\n    (q31_t)0x2c8d341a, (q31_t)0x2c75a390, (q31_t)0x2c5e114f, (q31_t)0x2c467d58,\n    (q31_t)0x2c2ee7ad, (q31_t)0x2c17504d, (q31_t)0x2bffb73a, (q31_t)0x2be81c74,\n    (q31_t)0x2bd07ffe, (q31_t)0x2bb8e1d7, (q31_t)0x2ba14200, (q31_t)0x2b89a07b,\n    (q31_t)0x2b71fd48, (q31_t)0x2b5a5868, (q31_t)0x2b42b1dd, (q31_t)0x2b2b09a6,\n    (q31_t)0x2b135fc6, (q31_t)0x2afbb43c, (q31_t)0x2ae4070a, (q31_t)0x2acc5831,\n    (q31_t)0x2ab4a7b1, (q31_t)0x2a9cf58c, (q31_t)0x2a8541c3, (q31_t)0x2a6d8c55,\n    (q31_t)0x2a55d545, (q31_t)0x2a3e1c93, (q31_t)0x2a266240, (q31_t)0x2a0ea64d,\n    (q31_t)0x29f6e8bb, (q31_t)0x29df298b, (q31_t)0x29c768be, (q31_t)0x29afa654,\n    (q31_t)0x2997e24f, (q31_t)0x29801caf, (q31_t)0x29685576, (q31_t)0x29508ca4,\n    (q31_t)0x2938c23a, (q31_t)0x2920f63a, (q31_t)0x290928a3, (q31_t)0x28f15978,\n    (q31_t)0x28d988b8, (q31_t)0x28c1b666, (q31_t)0x28a9e281, (q31_t)0x28920d0a,\n    (q31_t)0x287a3604, (q31_t)0x28625d6d, (q31_t)0x284a8349, (q31_t)0x2832a796,\n    (q31_t)0x281aca57, (q31_t)0x2802eb8c, (q31_t)0x27eb0b36, (q31_t)0x27d32956,\n    (q31_t)0x27bb45ed, (q31_t)0x27a360fc, (q31_t)0x278b7a84, (q31_t)0x27739285,\n    (q31_t)0x275ba901, (q31_t)0x2743bdf9, (q31_t)0x272bd16d, (q31_t)0x2713e35f,\n    (q31_t)0x26fbf3ce, (q31_t)0x26e402bd, (q31_t)0x26cc102d, (q31_t)0x26b41c1d,\n    (q31_t)0x269c268f, (q31_t)0x26842f84, (q31_t)0x266c36fe, (q31_t)0x26543cfb,\n    (q31_t)0x263c417f, (q31_t)0x26244489, (q31_t)0x260c461b, (q31_t)0x25f44635,\n    (q31_t)0x25dc44d9, (q31_t)0x25c44207, (q31_t)0x25ac3dc0, (q31_t)0x25943806,\n    (q31_t)0x257c30d8, (q31_t)0x25642839, (q31_t)0x254c1e28, (q31_t)0x253412a8,\n    (q31_t)0x251c05b8, (q31_t)0x2503f75a, (q31_t)0x24ebe78f, (q31_t)0x24d3d657,\n    (q31_t)0x24bbc3b4, (q31_t)0x24a3afa6, (q31_t)0x248b9a2f, (q31_t)0x2473834f,\n    (q31_t)0x245b6b07, (q31_t)0x24435158, (q31_t)0x242b3644, (q31_t)0x241319ca,\n    (q31_t)0x23fafbec, (q31_t)0x23e2dcac, (q31_t)0x23cabc09, (q31_t)0x23b29a05,\n    (q31_t)0x239a76a0, (q31_t)0x238251dd, (q31_t)0x236a2bba, (q31_t)0x2352043b,\n    (q31_t)0x2339db5e, (q31_t)0x2321b126, (q31_t)0x23098593, (q31_t)0x22f158a7,\n    (q31_t)0x22d92a61, (q31_t)0x22c0fac4, (q31_t)0x22a8c9cf, (q31_t)0x22909785,\n    (q31_t)0x227863e5, (q31_t)0x22602ef1, (q31_t)0x2247f8aa, (q31_t)0x222fc111,\n    (q31_t)0x22178826, (q31_t)0x21ff4dea, (q31_t)0x21e71260, (q31_t)0x21ced586,\n    (q31_t)0x21b6975f, (q31_t)0x219e57eb, (q31_t)0x2186172b, (q31_t)0x216dd521,\n    (q31_t)0x215591cc, (q31_t)0x213d4d2f, (q31_t)0x21250749, (q31_t)0x210cc01d,\n    (q31_t)0x20f477aa, (q31_t)0x20dc2df2, (q31_t)0x20c3e2f5, (q31_t)0x20ab96b5,\n    (q31_t)0x20934933, (q31_t)0x207afa6f, (q31_t)0x2062aa6b, (q31_t)0x204a5927,\n    (q31_t)0x203206a4, (q31_t)0x2019b2e4, (q31_t)0x20015de7, (q31_t)0x1fe907ae,\n    (q31_t)0x1fd0b03a, (q31_t)0x1fb8578b, (q31_t)0x1f9ffda4, (q31_t)0x1f87a285,\n    (q31_t)0x1f6f462f, (q31_t)0x1f56e8a2, (q31_t)0x1f3e89e0, (q31_t)0x1f2629ea,\n    (q31_t)0x1f0dc8c0, (q31_t)0x1ef56664, (q31_t)0x1edd02d6, (q31_t)0x1ec49e17,\n    (q31_t)0x1eac3829, (q31_t)0x1e93d10c, (q31_t)0x1e7b68c2, (q31_t)0x1e62ff4a,\n    (q31_t)0x1e4a94a7, (q31_t)0x1e3228d9, (q31_t)0x1e19bbe0, (q31_t)0x1e014dbf,\n    (q31_t)0x1de8de75, (q31_t)0x1dd06e04, (q31_t)0x1db7fc6d, (q31_t)0x1d9f89b1,\n    (q31_t)0x1d8715d0, (q31_t)0x1d6ea0cc, (q31_t)0x1d562aa6, (q31_t)0x1d3db35e,\n    (q31_t)0x1d253af5, (q31_t)0x1d0cc16c, (q31_t)0x1cf446c5, (q31_t)0x1cdbcb00,\n    (q31_t)0x1cc34e1f, (q31_t)0x1caad021, (q31_t)0x1c925109, (q31_t)0x1c79d0d6,\n    (q31_t)0x1c614f8b, (q31_t)0x1c48cd27, (q31_t)0x1c3049ac, (q31_t)0x1c17c51b,\n    (q31_t)0x1bff3f75, (q31_t)0x1be6b8ba, (q31_t)0x1bce30ec, (q31_t)0x1bb5a80c,\n    (q31_t)0x1b9d1e1a, (q31_t)0x1b849317, (q31_t)0x1b6c0705, (q31_t)0x1b5379e5,\n    (q31_t)0x1b3aebb6, (q31_t)0x1b225c7b, (q31_t)0x1b09cc34, (q31_t)0x1af13ae3,\n    (q31_t)0x1ad8a887, (q31_t)0x1ac01522, (q31_t)0x1aa780b6, (q31_t)0x1a8eeb42,\n    (q31_t)0x1a7654c8, (q31_t)0x1a5dbd49, (q31_t)0x1a4524c6, (q31_t)0x1a2c8b3f,\n    (q31_t)0x1a13f0b6, (q31_t)0x19fb552c, (q31_t)0x19e2b8a2, (q31_t)0x19ca1b17,\n    (q31_t)0x19b17c8f, (q31_t)0x1998dd09, (q31_t)0x19803c86, (q31_t)0x19679b07,\n    (q31_t)0x194ef88e, (q31_t)0x1936551b, (q31_t)0x191db0af, (q31_t)0x19050b4b,\n    (q31_t)0x18ec64f0, (q31_t)0x18d3bda0, (q31_t)0x18bb155a, (q31_t)0x18a26c20,\n    (q31_t)0x1889c1f3, (q31_t)0x187116d4, (q31_t)0x18586ac3, (q31_t)0x183fbdc3,\n    (q31_t)0x18270fd3, (q31_t)0x180e60f4, (q31_t)0x17f5b129, (q31_t)0x17dd0070,\n    (q31_t)0x17c44ecd, (q31_t)0x17ab9c3e, (q31_t)0x1792e8c6, (q31_t)0x177a3466,\n    (q31_t)0x17617f1d, (q31_t)0x1748c8ee, (q31_t)0x173011d9, (q31_t)0x171759df,\n    (q31_t)0x16fea102, (q31_t)0x16e5e741, (q31_t)0x16cd2c9f, (q31_t)0x16b4711b,\n    (q31_t)0x169bb4b7, (q31_t)0x1682f774, (q31_t)0x166a3953, (q31_t)0x16517a55,\n    (q31_t)0x1638ba7a, (q31_t)0x161ff9c4, (q31_t)0x16073834, (q31_t)0x15ee75cb,\n    (q31_t)0x15d5b288, (q31_t)0x15bcee6f, (q31_t)0x15a4297f, (q31_t)0x158b63b9,\n    (q31_t)0x15729d1f, (q31_t)0x1559d5b1, (q31_t)0x15410d70, (q31_t)0x1528445d,\n    (q31_t)0x150f7a7a, (q31_t)0x14f6afc7, (q31_t)0x14dde445, (q31_t)0x14c517f4,\n    (q31_t)0x14ac4ad7, (q31_t)0x14937cee, (q31_t)0x147aae3a, (q31_t)0x1461debc,\n    (q31_t)0x14490e74, (q31_t)0x14303d65, (q31_t)0x14176b8e, (q31_t)0x13fe98f1,\n    (q31_t)0x13e5c58e, (q31_t)0x13ccf167, (q31_t)0x13b41c7d, (q31_t)0x139b46d0,\n    (q31_t)0x13827062, (q31_t)0x13699933, (q31_t)0x1350c144, (q31_t)0x1337e897,\n    (q31_t)0x131f0f2c, (q31_t)0x13063505, (q31_t)0x12ed5a21, (q31_t)0x12d47e83,\n    (q31_t)0x12bba22b, (q31_t)0x12a2c51b, (q31_t)0x1289e752, (q31_t)0x127108d2,\n    (q31_t)0x1258299c, (q31_t)0x123f49b2, (q31_t)0x12266913, (q31_t)0x120d87c1,\n    (q31_t)0x11f4a5bd, (q31_t)0x11dbc307, (q31_t)0x11c2dfa2, (q31_t)0x11a9fb8d,\n    (q31_t)0x119116c9, (q31_t)0x11783159, (q31_t)0x115f4b3c, (q31_t)0x11466473,\n    (q31_t)0x112d7d00, (q31_t)0x111494e4, (q31_t)0x10fbac1e, (q31_t)0x10e2c2b2,\n    (q31_t)0x10c9d89e, (q31_t)0x10b0ede5, (q31_t)0x10980287, (q31_t)0x107f1686,\n    (q31_t)0x106629e1, (q31_t)0x104d3c9b, (q31_t)0x10344eb4, (q31_t)0x101b602d,\n    (q31_t)0x10027107, (q31_t)0xfe98143,  (q31_t)0xfd090e1,  (q31_t)0xfb79fe4,\n    (q31_t)0xf9eae4c,  (q31_t)0xf85bc19,  (q31_t)0xf6cc94e,  (q31_t)0xf53d5ea,\n    (q31_t)0xf3ae1ee,  (q31_t)0xf21ed5d,  (q31_t)0xf08f836,  (q31_t)0xef0027b,\n    (q31_t)0xed70c2c,  (q31_t)0xebe154b,  (q31_t)0xea51dd8,  (q31_t)0xe8c25d5,\n    (q31_t)0xe732d42,  (q31_t)0xe5a3421,  (q31_t)0xe413a72,  (q31_t)0xe284036,\n    (q31_t)0xe0f456f,  (q31_t)0xdf64a1c,  (q31_t)0xddd4e40,  (q31_t)0xdc451dc,\n    (q31_t)0xdab54ef,  (q31_t)0xd92577b,  (q31_t)0xd795982,  (q31_t)0xd605b03,\n    (q31_t)0xd475c00,  (q31_t)0xd2e5c7b,  (q31_t)0xd155c73,  (q31_t)0xcfc5bea,\n    (q31_t)0xce35ae1,  (q31_t)0xcca5959,  (q31_t)0xcb15752,  (q31_t)0xc9854cf,\n    (q31_t)0xc7f51cf,  (q31_t)0xc664e53,  (q31_t)0xc4d4a5d,  (q31_t)0xc3445ee,\n    (q31_t)0xc1b4107,  (q31_t)0xc023ba7,  (q31_t)0xbe935d2,  (q31_t)0xbd02f87,\n    (q31_t)0xbb728c7,  (q31_t)0xb9e2193,  (q31_t)0xb8519ed,  (q31_t)0xb6c11d5,\n    (q31_t)0xb53094d,  (q31_t)0xb3a0055,  (q31_t)0xb20f6ee,  (q31_t)0xb07ed19,\n    (q31_t)0xaeee2d7,  (q31_t)0xad5d829,  (q31_t)0xabccd11,  (q31_t)0xaa3c18e,\n    (q31_t)0xa8ab5a2,  (q31_t)0xa71a94f,  (q31_t)0xa589c94,  (q31_t)0xa3f8f73,\n    (q31_t)0xa2681ed,  (q31_t)0xa0d7403,  (q31_t)0x9f465b5,  (q31_t)0x9db5706,\n    (q31_t)0x9c247f5,  (q31_t)0x9a93884,  (q31_t)0x99028b3,  (q31_t)0x9771884,\n    (q31_t)0x95e07f8,  (q31_t)0x944f70f,  (q31_t)0x92be5ca,  (q31_t)0x912d42c,\n    (q31_t)0x8f9c233,  (q31_t)0x8e0afe2,  (q31_t)0x8c79d3a,  (q31_t)0x8ae8a3a,\n    (q31_t)0x89576e5,  (q31_t)0x87c633c,  (q31_t)0x8634f3e,  (q31_t)0x84a3aee,\n    (q31_t)0x831264c,  (q31_t)0x8181159,  (q31_t)0x7fefc16,  (q31_t)0x7e5e685,\n    (q31_t)0x7ccd0a5,  (q31_t)0x7b3ba78,  (q31_t)0x79aa400,  (q31_t)0x7818d3c,\n    (q31_t)0x768762e,  (q31_t)0x74f5ed7,  (q31_t)0x7364738,  (q31_t)0x71d2f52,\n    (q31_t)0x7041726,  (q31_t)0x6eafeb4,  (q31_t)0x6d1e5fe,  (q31_t)0x6b8cd05,\n    (q31_t)0x69fb3c9,  (q31_t)0x6869a4c,  (q31_t)0x66d808f,  (q31_t)0x6546692,\n    (q31_t)0x63b4c57,  (q31_t)0x62231de,  (q31_t)0x6091729,  (q31_t)0x5effc38,\n    (q31_t)0x5d6e10c,  (q31_t)0x5bdc5a7,  (q31_t)0x5a4aa09,  (q31_t)0x58b8e34,\n    (q31_t)0x5727228,  (q31_t)0x55955e6,  (q31_t)0x540396f,  (q31_t)0x5271cc4,\n    (q31_t)0x50dffe7,  (q31_t)0x4f4e2d8,  (q31_t)0x4dbc597,  (q31_t)0x4c2a827,\n    (q31_t)0x4a98a88,  (q31_t)0x4906cbb,  (q31_t)0x4774ec1,  (q31_t)0x45e309a,\n    (q31_t)0x4451249,  (q31_t)0x42bf3cd,  (q31_t)0x412d528,  (q31_t)0x3f9b65b,\n    (q31_t)0x3e09767,  (q31_t)0x3c7784d,  (q31_t)0x3ae590d,  (q31_t)0x39539a9,\n    (q31_t)0x37c1a22,  (q31_t)0x362fa78,  (q31_t)0x349daac,  (q31_t)0x330bac1,\n    (q31_t)0x3179ab5,  (q31_t)0x2fe7a8c,  (q31_t)0x2e55a44,  (q31_t)0x2cc39e1,\n    (q31_t)0x2b31961,  (q31_t)0x299f8c7,  (q31_t)0x280d813,  (q31_t)0x267b747,\n    (q31_t)0x24e9662,  (q31_t)0x2357567,  (q31_t)0x21c5457,  (q31_t)0x2033331,\n    (q31_t)0x1ea11f7,  (q31_t)0x1d0f0ab,  (q31_t)0x1b7cf4d,  (q31_t)0x19eaddd,\n    (q31_t)0x1858c5e,  (q31_t)0x16c6ad0,  (q31_t)0x1534934,  (q31_t)0x13a278a,\n    (q31_t)0x12105d5,  (q31_t)0x107e414,  (q31_t)0xeec249,   (q31_t)0xd5a075,\n    (q31_t)0xbc7e99,   (q31_t)0xa35cb5,   (q31_t)0x8a3acb,   (q31_t)0x7118dc,\n    (q31_t)0x57f6e9,   (q31_t)0x3ed4f2,   (q31_t)0x25b2f8,   (q31_t)0xc90fe};\n\nstatic const q31_t cos_factorsQ31_8192[8192] = {\n    (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c,\n    (q31_t)0x7ffffce1, (q31_t)0x7ffffb56, (q31_t)0x7ffff97c, (q31_t)0x7ffff753,\n    (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b,\n    (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5, (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3,\n    (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c,\n    (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7, (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6,\n    (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61,\n    (q31_t)0x7fff82be, (q31_t)0x7fff79cc, (q31_t)0x7fff708b, (q31_t)0x7fff66fc,\n    (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8,\n    (q31_t)0x7fff328d, (q31_t)0x7fff2724, (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64,\n    (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31,\n    (q31_t)0x7ffece9f, (q31_t)0x7ffec0be, (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f,\n    (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe,\n    (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c, (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe,\n    (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e,\n    (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc, (q31_t)0x7ffda59d, (q31_t)0x7ffd922f,\n    (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161,\n    (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720, (q31_t)0x7ffd0189, (q31_t)0x7ffceba4,\n    (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7,\n    (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7, (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b,\n    (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0,\n    (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1, (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356,\n    (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed,\n    (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf, (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195,\n    (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e,\n    (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50, (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17,\n    (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2,\n    (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705, (q31_t)0x7ff8a519, (q31_t)0x7ff882dd,\n    (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da,\n    (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe, (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7,\n    (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005,\n    (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b, (q31_t)0x7ff65c5f, (q31_t)0x7ff63535,\n    (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576,\n    (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc, (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7,\n    (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a,\n    (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082, (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e,\n    (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523,\n    (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c, (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9,\n    (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61,\n    (q31_t)0x7ff13f45, (q31_t)0x7ff10edb, (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19,\n    (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4,\n    (q31_t)0x7fefb351, (q31_t)0x7fef806f, (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf,\n    (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac,\n    (q31_t)0x7fee13a1, (q31_t)0x7fedde48, (q31_t)0x7feda8a0, (q31_t)0x7fed72aa,\n    (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9,\n    (q31_t)0x7fec6038, (q31_t)0x7fec2867, (q31_t)0x7febf048, (q31_t)0x7febb7da,\n    (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c,\n    (q31_t)0x7fea9914, (q31_t)0x7fea5ecc, (q31_t)0x7fea2436, (q31_t)0x7fe9e950,\n    (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6,\n    (q31_t)0x7fe8be36, (q31_t)0x7fe88177, (q31_t)0x7fe84469, (q31_t)0x7fe8070d,\n    (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85,\n    (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068, (q31_t)0x7fe650e3, (q31_t)0x7fe61110,\n    (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac,\n    (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0, (q31_t)0x7fe449a4, (q31_t)0x7fe40759,\n    (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19,\n    (q31_t)0x7fe2b743, (q31_t)0x7fe2731f, (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea,\n    (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd,\n    (q31_t)0x7fe08d81, (q31_t)0x7fe046e5, (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2,\n    (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9,\n    (q31_t)0x7fde5006, (q31_t)0x7fde06f3, (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2,\n    (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d,\n    (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349, (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a,\n    (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799,\n    (q31_t)0x7fd999e8, (q31_t)0x7fd94be8, (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa,\n    (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e,\n    (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf, (q31_t)0x7fd68009, (q31_t)0x7fd62ef4,\n    (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c,\n    (q31_t)0x7fd494ed, (q31_t)0x7fd441ff, (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36,\n    (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3,\n    (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78, (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2,\n    (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4,\n    (q31_t)0x7fcf4117, (q31_t)0x7fcee93c, (q31_t)0x7fce9112, (q31_t)0x7fce3898,\n    (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f,\n    (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a, (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9,\n    (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5,\n    (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2, (q31_t)0x7fc8e48b, (q31_t)0x7fc88724,\n    (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76,\n    (q31_t)0x7fc6af86, (q31_t)0x7fc65046, (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db,\n    (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53,\n    (q31_t)0x7fc3acec, (q31_t)0x7fc34b36, (q31_t)0x7fc2e931, (q31_t)0x7fc286de,\n    (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b,\n    (q31_t)0x7fc0969e, (q31_t)0x7fc03271, (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c,\n    (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0,\n    (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa, (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8,\n    (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2,\n    (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf, (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0,\n    (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2,\n    (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2, (q31_t)0x7fb60614, (q31_t)0x7fb599e7,\n    (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f,\n    (q31_t)0x7fb37869, (q31_t)0x7fb30a63, (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c,\n    (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb,\n    (q31_t)0x7fafff9e, (q31_t)0x7faf8f23, (q31_t)0x7faf1e58, (q31_t)0x7faead3f,\n    (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6,\n    (q31_t)0x7fac7323, (q31_t)0x7fac0031, (q31_t)0x7fab8cf1, (q31_t)0x7fab1962,\n    (q31_t)0x7faaa584, (q31_t)0x7faa3157, (q31_t)0x7fa9bcdb, (q31_t)0x7fa94811,\n    (q31_t)0x7fa8d2f8, (q31_t)0x7fa85d90, (q31_t)0x7fa7e7d9, (q31_t)0x7fa771d4,\n    (q31_t)0x7fa6fb80, (q31_t)0x7fa684dd, (q31_t)0x7fa60dec, (q31_t)0x7fa596ac,\n    (q31_t)0x7fa51f1d, (q31_t)0x7fa4a73f, (q31_t)0x7fa42f12, (q31_t)0x7fa3b697,\n    (q31_t)0x7fa33dcd, (q31_t)0x7fa2c4b5, (q31_t)0x7fa24b4d, (q31_t)0x7fa1d197,\n    (q31_t)0x7fa15792, (q31_t)0x7fa0dd3f, (q31_t)0x7fa0629c, (q31_t)0x7f9fe7ab,\n    (q31_t)0x7f9f6c6b, (q31_t)0x7f9ef0dd, (q31_t)0x7f9e7500, (q31_t)0x7f9df8d4,\n    (q31_t)0x7f9d7c59, (q31_t)0x7f9cff90, (q31_t)0x7f9c8278, (q31_t)0x7f9c0511,\n    (q31_t)0x7f9b875b, (q31_t)0x7f9b0957, (q31_t)0x7f9a8b04, (q31_t)0x7f9a0c62,\n    (q31_t)0x7f998d72, (q31_t)0x7f990e33, (q31_t)0x7f988ea5, (q31_t)0x7f980ec8,\n    (q31_t)0x7f978e9d, (q31_t)0x7f970e23, (q31_t)0x7f968d5b, (q31_t)0x7f960c43,\n    (q31_t)0x7f958add, (q31_t)0x7f950929, (q31_t)0x7f948725, (q31_t)0x7f9404d3,\n    (q31_t)0x7f938232, (q31_t)0x7f92ff43, (q31_t)0x7f927c04, (q31_t)0x7f91f878,\n    (q31_t)0x7f91749c, (q31_t)0x7f90f072, (q31_t)0x7f906bf9, (q31_t)0x7f8fe731,\n    (q31_t)0x7f8f621b, (q31_t)0x7f8edcb6, (q31_t)0x7f8e5702, (q31_t)0x7f8dd0ff,\n    (q31_t)0x7f8d4aae, (q31_t)0x7f8cc40f, (q31_t)0x7f8c3d20, (q31_t)0x7f8bb5e3,\n    (q31_t)0x7f8b2e57, (q31_t)0x7f8aa67d, (q31_t)0x7f8a1e54, (q31_t)0x7f8995dc,\n    (q31_t)0x7f890d15, (q31_t)0x7f888400, (q31_t)0x7f87fa9c, (q31_t)0x7f8770ea,\n    (q31_t)0x7f86e6e9, (q31_t)0x7f865c99, (q31_t)0x7f85d1fa, (q31_t)0x7f85470d,\n    (q31_t)0x7f84bbd1, (q31_t)0x7f843047, (q31_t)0x7f83a46e, (q31_t)0x7f831846,\n    (q31_t)0x7f828bcf, (q31_t)0x7f81ff0a, (q31_t)0x7f8171f6, (q31_t)0x7f80e494,\n    (q31_t)0x7f8056e3, (q31_t)0x7f7fc8e3, (q31_t)0x7f7f3a95, (q31_t)0x7f7eabf8,\n    (q31_t)0x7f7e1d0c, (q31_t)0x7f7d8dd2, (q31_t)0x7f7cfe49, (q31_t)0x7f7c6e71,\n    (q31_t)0x7f7bde4b, (q31_t)0x7f7b4dd6, (q31_t)0x7f7abd13, (q31_t)0x7f7a2c01,\n    (q31_t)0x7f799aa0, (q31_t)0x7f7908f0, (q31_t)0x7f7876f2, (q31_t)0x7f77e4a6,\n    (q31_t)0x7f77520a, (q31_t)0x7f76bf21, (q31_t)0x7f762be8, (q31_t)0x7f759861,\n    (q31_t)0x7f75048b, (q31_t)0x7f747067, (q31_t)0x7f73dbf4, (q31_t)0x7f734732,\n    (q31_t)0x7f72b222, (q31_t)0x7f721cc3, (q31_t)0x7f718715, (q31_t)0x7f70f119,\n    (q31_t)0x7f705ace, (q31_t)0x7f6fc435, (q31_t)0x7f6f2d4d, (q31_t)0x7f6e9617,\n    (q31_t)0x7f6dfe91, (q31_t)0x7f6d66be, (q31_t)0x7f6cce9b, (q31_t)0x7f6c362a,\n    (q31_t)0x7f6b9d6b, (q31_t)0x7f6b045d, (q31_t)0x7f6a6b00, (q31_t)0x7f69d154,\n    (q31_t)0x7f69375a, (q31_t)0x7f689d12, (q31_t)0x7f68027b, (q31_t)0x7f676795,\n    (q31_t)0x7f66cc61, (q31_t)0x7f6630de, (q31_t)0x7f65950c, (q31_t)0x7f64f8ec,\n    (q31_t)0x7f645c7d, (q31_t)0x7f63bfc0, (q31_t)0x7f6322b4, (q31_t)0x7f62855a,\n    (q31_t)0x7f61e7b1, (q31_t)0x7f6149b9, (q31_t)0x7f60ab73, (q31_t)0x7f600cdf,\n    (q31_t)0x7f5f6dfb, (q31_t)0x7f5ecec9, (q31_t)0x7f5e2f49, (q31_t)0x7f5d8f7a,\n    (q31_t)0x7f5cef5c, (q31_t)0x7f5c4ef0, (q31_t)0x7f5bae36, (q31_t)0x7f5b0d2c,\n    (q31_t)0x7f5a6bd5, (q31_t)0x7f59ca2e, (q31_t)0x7f592839, (q31_t)0x7f5885f6,\n    (q31_t)0x7f57e364, (q31_t)0x7f574083, (q31_t)0x7f569d54, (q31_t)0x7f55f9d6,\n    (q31_t)0x7f55560a, (q31_t)0x7f54b1ef, (q31_t)0x7f540d86, (q31_t)0x7f5368ce,\n    (q31_t)0x7f52c3c8, (q31_t)0x7f521e73, (q31_t)0x7f5178cf, (q31_t)0x7f50d2dd,\n    (q31_t)0x7f502c9d, (q31_t)0x7f4f860e, (q31_t)0x7f4edf30, (q31_t)0x7f4e3804,\n    (q31_t)0x7f4d9089, (q31_t)0x7f4ce8c0, (q31_t)0x7f4c40a8, (q31_t)0x7f4b9842,\n    (q31_t)0x7f4aef8d, (q31_t)0x7f4a468a, (q31_t)0x7f499d38, (q31_t)0x7f48f398,\n    (q31_t)0x7f4849a9, (q31_t)0x7f479f6c, (q31_t)0x7f46f4e0, (q31_t)0x7f464a06,\n    (q31_t)0x7f459edd, (q31_t)0x7f44f365, (q31_t)0x7f44479f, (q31_t)0x7f439b8b,\n    (q31_t)0x7f42ef28, (q31_t)0x7f424277, (q31_t)0x7f419577, (q31_t)0x7f40e828,\n    (q31_t)0x7f403a8b, (q31_t)0x7f3f8ca0, (q31_t)0x7f3ede66, (q31_t)0x7f3e2fde,\n    (q31_t)0x7f3d8107, (q31_t)0x7f3cd1e2, (q31_t)0x7f3c226e, (q31_t)0x7f3b72ab,\n    (q31_t)0x7f3ac29b, (q31_t)0x7f3a123b, (q31_t)0x7f39618e, (q31_t)0x7f38b091,\n    (q31_t)0x7f37ff47, (q31_t)0x7f374dad, (q31_t)0x7f369bc6, (q31_t)0x7f35e990,\n    (q31_t)0x7f35370b, (q31_t)0x7f348438, (q31_t)0x7f33d116, (q31_t)0x7f331da6,\n    (q31_t)0x7f3269e8, (q31_t)0x7f31b5db, (q31_t)0x7f31017f, (q31_t)0x7f304cd6,\n    (q31_t)0x7f2f97dd, (q31_t)0x7f2ee296, (q31_t)0x7f2e2d01, (q31_t)0x7f2d771e,\n    (q31_t)0x7f2cc0eb, (q31_t)0x7f2c0a6b, (q31_t)0x7f2b539c, (q31_t)0x7f2a9c7e,\n    (q31_t)0x7f29e512, (q31_t)0x7f292d58, (q31_t)0x7f28754f, (q31_t)0x7f27bcf8,\n    (q31_t)0x7f270452, (q31_t)0x7f264b5e, (q31_t)0x7f25921c, (q31_t)0x7f24d88b,\n    (q31_t)0x7f241eab, (q31_t)0x7f23647e, (q31_t)0x7f22aa01, (q31_t)0x7f21ef37,\n    (q31_t)0x7f21341e, (q31_t)0x7f2078b6, (q31_t)0x7f1fbd00, (q31_t)0x7f1f00fc,\n    (q31_t)0x7f1e44a9, (q31_t)0x7f1d8808, (q31_t)0x7f1ccb18, (q31_t)0x7f1c0dda,\n    (q31_t)0x7f1b504e, (q31_t)0x7f1a9273, (q31_t)0x7f19d44a, (q31_t)0x7f1915d2,\n    (q31_t)0x7f18570c, (q31_t)0x7f1797f8, (q31_t)0x7f16d895, (q31_t)0x7f1618e4,\n    (q31_t)0x7f1558e4, (q31_t)0x7f149896, (q31_t)0x7f13d7fa, (q31_t)0x7f13170f,\n    (q31_t)0x7f1255d6, (q31_t)0x7f11944f, (q31_t)0x7f10d279, (q31_t)0x7f101054,\n    (q31_t)0x7f0f4de2, (q31_t)0x7f0e8b21, (q31_t)0x7f0dc811, (q31_t)0x7f0d04b3,\n    (q31_t)0x7f0c4107, (q31_t)0x7f0b7d0d, (q31_t)0x7f0ab8c4, (q31_t)0x7f09f42d,\n    (q31_t)0x7f092f47, (q31_t)0x7f086a13, (q31_t)0x7f07a491, (q31_t)0x7f06dec0,\n    (q31_t)0x7f0618a1, (q31_t)0x7f055233, (q31_t)0x7f048b78, (q31_t)0x7f03c46d,\n    (q31_t)0x7f02fd15, (q31_t)0x7f02356e, (q31_t)0x7f016d79, (q31_t)0x7f00a535,\n    (q31_t)0x7effdca4, (q31_t)0x7eff13c3, (q31_t)0x7efe4a95, (q31_t)0x7efd8118,\n    (q31_t)0x7efcb74d, (q31_t)0x7efbed33, (q31_t)0x7efb22cb, (q31_t)0x7efa5815,\n    (q31_t)0x7ef98d11, (q31_t)0x7ef8c1be, (q31_t)0x7ef7f61d, (q31_t)0x7ef72a2d,\n    (q31_t)0x7ef65def, (q31_t)0x7ef59163, (q31_t)0x7ef4c489, (q31_t)0x7ef3f760,\n    (q31_t)0x7ef329e9, (q31_t)0x7ef25c24, (q31_t)0x7ef18e10, (q31_t)0x7ef0bfae,\n    (q31_t)0x7eeff0fe, (q31_t)0x7eef21ff, (q31_t)0x7eee52b2, (q31_t)0x7eed8317,\n    (q31_t)0x7eecb32d, (q31_t)0x7eebe2f6, (q31_t)0x7eeb1270, (q31_t)0x7eea419b,\n    (q31_t)0x7ee97079, (q31_t)0x7ee89f08, (q31_t)0x7ee7cd49, (q31_t)0x7ee6fb3b,\n    (q31_t)0x7ee628df, (q31_t)0x7ee55635, (q31_t)0x7ee4833d, (q31_t)0x7ee3aff6,\n    (q31_t)0x7ee2dc61, (q31_t)0x7ee2087e, (q31_t)0x7ee1344d, (q31_t)0x7ee05fcd,\n    (q31_t)0x7edf8aff, (q31_t)0x7edeb5e3, (q31_t)0x7edde079, (q31_t)0x7edd0ac0,\n    (q31_t)0x7edc34b9, (q31_t)0x7edb5e64, (q31_t)0x7eda87c0, (q31_t)0x7ed9b0ce,\n    (q31_t)0x7ed8d98e, (q31_t)0x7ed80200, (q31_t)0x7ed72a24, (q31_t)0x7ed651f9,\n    (q31_t)0x7ed57980, (q31_t)0x7ed4a0b9, (q31_t)0x7ed3c7a3, (q31_t)0x7ed2ee40,\n    (q31_t)0x7ed2148e, (q31_t)0x7ed13a8e, (q31_t)0x7ed0603f, (q31_t)0x7ecf85a3,\n    (q31_t)0x7eceaab8, (q31_t)0x7ecdcf7f, (q31_t)0x7eccf3f8, (q31_t)0x7ecc1822,\n    (q31_t)0x7ecb3bff, (q31_t)0x7eca5f8d, (q31_t)0x7ec982cd, (q31_t)0x7ec8a5bf,\n    (q31_t)0x7ec7c862, (q31_t)0x7ec6eab7, (q31_t)0x7ec60cbe, (q31_t)0x7ec52e77,\n    (q31_t)0x7ec44fe2, (q31_t)0x7ec370fe, (q31_t)0x7ec291cd, (q31_t)0x7ec1b24d,\n    (q31_t)0x7ec0d27f, (q31_t)0x7ebff263, (q31_t)0x7ebf11f8, (q31_t)0x7ebe313f,\n    (q31_t)0x7ebd5039, (q31_t)0x7ebc6ee4, (q31_t)0x7ebb8d40, (q31_t)0x7ebaab4f,\n    (q31_t)0x7eb9c910, (q31_t)0x7eb8e682, (q31_t)0x7eb803a6, (q31_t)0x7eb7207c,\n    (q31_t)0x7eb63d04, (q31_t)0x7eb5593d, (q31_t)0x7eb47529, (q31_t)0x7eb390c6,\n    (q31_t)0x7eb2ac15, (q31_t)0x7eb1c716, (q31_t)0x7eb0e1c9, (q31_t)0x7eaffc2e,\n    (q31_t)0x7eaf1645, (q31_t)0x7eae300d, (q31_t)0x7ead4987, (q31_t)0x7eac62b3,\n    (q31_t)0x7eab7b91, (q31_t)0x7eaa9421, (q31_t)0x7ea9ac63, (q31_t)0x7ea8c457,\n    (q31_t)0x7ea7dbfc, (q31_t)0x7ea6f353, (q31_t)0x7ea60a5d, (q31_t)0x7ea52118,\n    (q31_t)0x7ea43785, (q31_t)0x7ea34da4, (q31_t)0x7ea26374, (q31_t)0x7ea178f7,\n    (q31_t)0x7ea08e2b, (q31_t)0x7e9fa312, (q31_t)0x7e9eb7aa, (q31_t)0x7e9dcbf4,\n    (q31_t)0x7e9cdff0, (q31_t)0x7e9bf39e, (q31_t)0x7e9b06fe, (q31_t)0x7e9a1a10,\n    (q31_t)0x7e992cd4, (q31_t)0x7e983f49, (q31_t)0x7e975171, (q31_t)0x7e96634a,\n    (q31_t)0x7e9574d6, (q31_t)0x7e948613, (q31_t)0x7e939702, (q31_t)0x7e92a7a3,\n    (q31_t)0x7e91b7f6, (q31_t)0x7e90c7fb, (q31_t)0x7e8fd7b2, (q31_t)0x7e8ee71b,\n    (q31_t)0x7e8df636, (q31_t)0x7e8d0502, (q31_t)0x7e8c1381, (q31_t)0x7e8b21b1,\n    (q31_t)0x7e8a2f94, (q31_t)0x7e893d28, (q31_t)0x7e884a6f, (q31_t)0x7e875767,\n    (q31_t)0x7e866411, (q31_t)0x7e85706d, (q31_t)0x7e847c7c, (q31_t)0x7e83883c,\n    (q31_t)0x7e8293ae, (q31_t)0x7e819ed2, (q31_t)0x7e80a9a8, (q31_t)0x7e7fb430,\n    (q31_t)0x7e7ebe6a, (q31_t)0x7e7dc856, (q31_t)0x7e7cd1f4, (q31_t)0x7e7bdb44,\n    (q31_t)0x7e7ae446, (q31_t)0x7e79ecf9, (q31_t)0x7e78f55f, (q31_t)0x7e77fd77,\n    (q31_t)0x7e770541, (q31_t)0x7e760cbd, (q31_t)0x7e7513ea, (q31_t)0x7e741aca,\n    (q31_t)0x7e73215c, (q31_t)0x7e7227a0, (q31_t)0x7e712d96, (q31_t)0x7e70333d,\n    (q31_t)0x7e6f3897, (q31_t)0x7e6e3da3, (q31_t)0x7e6d4261, (q31_t)0x7e6c46d1,\n    (q31_t)0x7e6b4af2, (q31_t)0x7e6a4ec6, (q31_t)0x7e69524c, (q31_t)0x7e685584,\n    (q31_t)0x7e67586e, (q31_t)0x7e665b0a, (q31_t)0x7e655d58, (q31_t)0x7e645f58,\n    (q31_t)0x7e63610a, (q31_t)0x7e62626e, (q31_t)0x7e616384, (q31_t)0x7e60644c,\n    (q31_t)0x7e5f64c7, (q31_t)0x7e5e64f3, (q31_t)0x7e5d64d1, (q31_t)0x7e5c6461,\n    (q31_t)0x7e5b63a4, (q31_t)0x7e5a6298, (q31_t)0x7e59613f, (q31_t)0x7e585f97,\n    (q31_t)0x7e575da2, (q31_t)0x7e565b5f, (q31_t)0x7e5558ce, (q31_t)0x7e5455ef,\n    (q31_t)0x7e5352c1, (q31_t)0x7e524f46, (q31_t)0x7e514b7e, (q31_t)0x7e504767,\n    (q31_t)0x7e4f4302, (q31_t)0x7e4e3e4f, (q31_t)0x7e4d394f, (q31_t)0x7e4c3400,\n    (q31_t)0x7e4b2e64, (q31_t)0x7e4a287a, (q31_t)0x7e492241, (q31_t)0x7e481bbb,\n    (q31_t)0x7e4714e7, (q31_t)0x7e460dc5, (q31_t)0x7e450656, (q31_t)0x7e43fe98,\n    (q31_t)0x7e42f68c, (q31_t)0x7e41ee33, (q31_t)0x7e40e58c, (q31_t)0x7e3fdc97,\n    (q31_t)0x7e3ed353, (q31_t)0x7e3dc9c3, (q31_t)0x7e3cbfe4, (q31_t)0x7e3bb5b7,\n    (q31_t)0x7e3aab3c, (q31_t)0x7e39a074, (q31_t)0x7e38955e, (q31_t)0x7e3789fa,\n    (q31_t)0x7e367e48, (q31_t)0x7e357248, (q31_t)0x7e3465fa, (q31_t)0x7e33595e,\n    (q31_t)0x7e324c75, (q31_t)0x7e313f3e, (q31_t)0x7e3031b9, (q31_t)0x7e2f23e6,\n    (q31_t)0x7e2e15c5, (q31_t)0x7e2d0756, (q31_t)0x7e2bf89a, (q31_t)0x7e2ae990,\n    (q31_t)0x7e29da38, (q31_t)0x7e28ca92, (q31_t)0x7e27ba9e, (q31_t)0x7e26aa5d,\n    (q31_t)0x7e2599cd, (q31_t)0x7e2488f0, (q31_t)0x7e2377c5, (q31_t)0x7e22664c,\n    (q31_t)0x7e215486, (q31_t)0x7e204271, (q31_t)0x7e1f300f, (q31_t)0x7e1e1d5f,\n    (q31_t)0x7e1d0a61, (q31_t)0x7e1bf716, (q31_t)0x7e1ae37c, (q31_t)0x7e19cf95,\n    (q31_t)0x7e18bb60, (q31_t)0x7e17a6dd, (q31_t)0x7e16920d, (q31_t)0x7e157cee,\n    (q31_t)0x7e146782, (q31_t)0x7e1351c9, (q31_t)0x7e123bc1, (q31_t)0x7e11256c,\n    (q31_t)0x7e100ec8, (q31_t)0x7e0ef7d7, (q31_t)0x7e0de099, (q31_t)0x7e0cc90c,\n    (q31_t)0x7e0bb132, (q31_t)0x7e0a990a, (q31_t)0x7e098095, (q31_t)0x7e0867d1,\n    (q31_t)0x7e074ec0, (q31_t)0x7e063561, (q31_t)0x7e051bb4, (q31_t)0x7e0401ba,\n    (q31_t)0x7e02e772, (q31_t)0x7e01ccdc, (q31_t)0x7e00b1f9, (q31_t)0x7dff96c7,\n    (q31_t)0x7dfe7b48, (q31_t)0x7dfd5f7b, (q31_t)0x7dfc4361, (q31_t)0x7dfb26f9,\n    (q31_t)0x7dfa0a43, (q31_t)0x7df8ed3f, (q31_t)0x7df7cfee, (q31_t)0x7df6b24f,\n    (q31_t)0x7df59462, (q31_t)0x7df47628, (q31_t)0x7df357a0, (q31_t)0x7df238ca,\n    (q31_t)0x7df119a7, (q31_t)0x7deffa35, (q31_t)0x7deeda77, (q31_t)0x7dedba6a,\n    (q31_t)0x7dec9a10, (q31_t)0x7deb7968, (q31_t)0x7dea5872, (q31_t)0x7de9372f,\n    (q31_t)0x7de8159e, (q31_t)0x7de6f3c0, (q31_t)0x7de5d193, (q31_t)0x7de4af1a,\n    (q31_t)0x7de38c52, (q31_t)0x7de2693d, (q31_t)0x7de145da, (q31_t)0x7de02229,\n    (q31_t)0x7ddefe2b, (q31_t)0x7dddd9e0, (q31_t)0x7ddcb546, (q31_t)0x7ddb905f,\n    (q31_t)0x7dda6b2a, (q31_t)0x7dd945a8, (q31_t)0x7dd81fd8, (q31_t)0x7dd6f9ba,\n    (q31_t)0x7dd5d34f, (q31_t)0x7dd4ac96, (q31_t)0x7dd38590, (q31_t)0x7dd25e3c,\n    (q31_t)0x7dd1369a, (q31_t)0x7dd00eab, (q31_t)0x7dcee66e, (q31_t)0x7dcdbde3,\n    (q31_t)0x7dcc950b, (q31_t)0x7dcb6be6, (q31_t)0x7dca4272, (q31_t)0x7dc918b1,\n    (q31_t)0x7dc7eea3, (q31_t)0x7dc6c447, (q31_t)0x7dc5999d, (q31_t)0x7dc46ea6,\n    (q31_t)0x7dc34361, (q31_t)0x7dc217cf, (q31_t)0x7dc0ebef, (q31_t)0x7dbfbfc1,\n    (q31_t)0x7dbe9346, (q31_t)0x7dbd667d, (q31_t)0x7dbc3967, (q31_t)0x7dbb0c03,\n    (q31_t)0x7db9de52, (q31_t)0x7db8b053, (q31_t)0x7db78207, (q31_t)0x7db6536d,\n    (q31_t)0x7db52485, (q31_t)0x7db3f550, (q31_t)0x7db2c5cd, (q31_t)0x7db195fd,\n    (q31_t)0x7db065df, (q31_t)0x7daf3574, (q31_t)0x7dae04bb, (q31_t)0x7dacd3b5,\n    (q31_t)0x7daba261, (q31_t)0x7daa70c0, (q31_t)0x7da93ed1, (q31_t)0x7da80c95,\n    (q31_t)0x7da6da0b, (q31_t)0x7da5a733, (q31_t)0x7da4740e, (q31_t)0x7da3409c,\n    (q31_t)0x7da20cdc, (q31_t)0x7da0d8cf, (q31_t)0x7d9fa474, (q31_t)0x7d9e6fcb,\n    (q31_t)0x7d9d3ad6, (q31_t)0x7d9c0592, (q31_t)0x7d9ad001, (q31_t)0x7d999a23,\n    (q31_t)0x7d9863f7, (q31_t)0x7d972d7e, (q31_t)0x7d95f6b7, (q31_t)0x7d94bfa3,\n    (q31_t)0x7d938841, (q31_t)0x7d925092, (q31_t)0x7d911896, (q31_t)0x7d8fe04c,\n    (q31_t)0x7d8ea7b4, (q31_t)0x7d8d6ecf, (q31_t)0x7d8c359d, (q31_t)0x7d8afc1d,\n    (q31_t)0x7d89c250, (q31_t)0x7d888835, (q31_t)0x7d874dcd, (q31_t)0x7d861317,\n    (q31_t)0x7d84d814, (q31_t)0x7d839cc4, (q31_t)0x7d826126, (q31_t)0x7d81253a,\n    (q31_t)0x7d7fe902, (q31_t)0x7d7eac7c, (q31_t)0x7d7d6fa8, (q31_t)0x7d7c3287,\n    (q31_t)0x7d7af519, (q31_t)0x7d79b75d, (q31_t)0x7d787954, (q31_t)0x7d773afd,\n    (q31_t)0x7d75fc59, (q31_t)0x7d74bd68, (q31_t)0x7d737e29, (q31_t)0x7d723e9d,\n    (q31_t)0x7d70fec4, (q31_t)0x7d6fbe9d, (q31_t)0x7d6e7e29, (q31_t)0x7d6d3d67,\n    (q31_t)0x7d6bfc58, (q31_t)0x7d6abafc, (q31_t)0x7d697952, (q31_t)0x7d68375b,\n    (q31_t)0x7d66f517, (q31_t)0x7d65b285, (q31_t)0x7d646fa6, (q31_t)0x7d632c79,\n    (q31_t)0x7d61e8ff, (q31_t)0x7d60a538, (q31_t)0x7d5f6124, (q31_t)0x7d5e1cc2,\n    (q31_t)0x7d5cd813, (q31_t)0x7d5b9316, (q31_t)0x7d5a4dcc, (q31_t)0x7d590835,\n    (q31_t)0x7d57c251, (q31_t)0x7d567c1f, (q31_t)0x7d5535a0, (q31_t)0x7d53eed3,\n    (q31_t)0x7d52a7ba, (q31_t)0x7d516053, (q31_t)0x7d50189e, (q31_t)0x7d4ed09d,\n    (q31_t)0x7d4d884e, (q31_t)0x7d4c3fb1, (q31_t)0x7d4af6c8, (q31_t)0x7d49ad91,\n    (q31_t)0x7d48640d, (q31_t)0x7d471a3c, (q31_t)0x7d45d01d, (q31_t)0x7d4485b1,\n    (q31_t)0x7d433af8, (q31_t)0x7d41eff1, (q31_t)0x7d40a49e, (q31_t)0x7d3f58fd,\n    (q31_t)0x7d3e0d0e, (q31_t)0x7d3cc0d3, (q31_t)0x7d3b744a, (q31_t)0x7d3a2774,\n    (q31_t)0x7d38da51, (q31_t)0x7d378ce0, (q31_t)0x7d363f23, (q31_t)0x7d34f118,\n    (q31_t)0x7d33a2bf, (q31_t)0x7d32541a, (q31_t)0x7d310527, (q31_t)0x7d2fb5e7,\n    (q31_t)0x7d2e665a, (q31_t)0x7d2d1680, (q31_t)0x7d2bc659, (q31_t)0x7d2a75e4,\n    (q31_t)0x7d292522, (q31_t)0x7d27d413, (q31_t)0x7d2682b6, (q31_t)0x7d25310d,\n    (q31_t)0x7d23df16, (q31_t)0x7d228cd2, (q31_t)0x7d213a41, (q31_t)0x7d1fe762,\n    (q31_t)0x7d1e9437, (q31_t)0x7d1d40be, (q31_t)0x7d1becf8, (q31_t)0x7d1a98e5,\n    (q31_t)0x7d194485, (q31_t)0x7d17efd8, (q31_t)0x7d169add, (q31_t)0x7d154595,\n    (q31_t)0x7d13f001, (q31_t)0x7d129a1f, (q31_t)0x7d1143ef, (q31_t)0x7d0fed73,\n    (q31_t)0x7d0e96aa, (q31_t)0x7d0d3f93, (q31_t)0x7d0be82f, (q31_t)0x7d0a907e,\n    (q31_t)0x7d093880, (q31_t)0x7d07e035, (q31_t)0x7d06879d, (q31_t)0x7d052eb8,\n    (q31_t)0x7d03d585, (q31_t)0x7d027c05, (q31_t)0x7d012239, (q31_t)0x7cffc81f,\n    (q31_t)0x7cfe6db8, (q31_t)0x7cfd1304, (q31_t)0x7cfbb803, (q31_t)0x7cfa5cb4,\n    (q31_t)0x7cf90119, (q31_t)0x7cf7a531, (q31_t)0x7cf648fb, (q31_t)0x7cf4ec79,\n    (q31_t)0x7cf38fa9, (q31_t)0x7cf2328c, (q31_t)0x7cf0d522, (q31_t)0x7cef776b,\n    (q31_t)0x7cee1967, (q31_t)0x7cecbb16, (q31_t)0x7ceb5c78, (q31_t)0x7ce9fd8d,\n    (q31_t)0x7ce89e55, (q31_t)0x7ce73ed0, (q31_t)0x7ce5defd, (q31_t)0x7ce47ede,\n    (q31_t)0x7ce31e72, (q31_t)0x7ce1bdb8, (q31_t)0x7ce05cb2, (q31_t)0x7cdefb5e,\n    (q31_t)0x7cdd99be, (q31_t)0x7cdc37d0, (q31_t)0x7cdad596, (q31_t)0x7cd9730e,\n    (q31_t)0x7cd8103a, (q31_t)0x7cd6ad18, (q31_t)0x7cd549aa, (q31_t)0x7cd3e5ee,\n    (q31_t)0x7cd281e5, (q31_t)0x7cd11d90, (q31_t)0x7ccfb8ed, (q31_t)0x7cce53fe,\n    (q31_t)0x7ccceec1, (q31_t)0x7ccb8937, (q31_t)0x7cca2361, (q31_t)0x7cc8bd3d,\n    (q31_t)0x7cc756cd, (q31_t)0x7cc5f010, (q31_t)0x7cc48905, (q31_t)0x7cc321ae,\n    (q31_t)0x7cc1ba09, (q31_t)0x7cc05218, (q31_t)0x7cbee9da, (q31_t)0x7cbd814f,\n    (q31_t)0x7cbc1877, (q31_t)0x7cbaaf51, (q31_t)0x7cb945df, (q31_t)0x7cb7dc20,\n    (q31_t)0x7cb67215, (q31_t)0x7cb507bc, (q31_t)0x7cb39d16, (q31_t)0x7cb23223,\n    (q31_t)0x7cb0c6e4, (q31_t)0x7caf5b57, (q31_t)0x7cadef7e, (q31_t)0x7cac8358,\n    (q31_t)0x7cab16e4, (q31_t)0x7ca9aa24, (q31_t)0x7ca83d17, (q31_t)0x7ca6cfbd,\n    (q31_t)0x7ca56216, (q31_t)0x7ca3f423, (q31_t)0x7ca285e2, (q31_t)0x7ca11755,\n    (q31_t)0x7c9fa87a, (q31_t)0x7c9e3953, (q31_t)0x7c9cc9df, (q31_t)0x7c9b5a1e,\n    (q31_t)0x7c99ea10, (q31_t)0x7c9879b6, (q31_t)0x7c97090e, (q31_t)0x7c95981a,\n    (q31_t)0x7c9426d8, (q31_t)0x7c92b54a, (q31_t)0x7c91436f, (q31_t)0x7c8fd148,\n    (q31_t)0x7c8e5ed3, (q31_t)0x7c8cec12, (q31_t)0x7c8b7903, (q31_t)0x7c8a05a8,\n    (q31_t)0x7c889200, (q31_t)0x7c871e0c, (q31_t)0x7c85a9ca, (q31_t)0x7c84353c,\n    (q31_t)0x7c82c060, (q31_t)0x7c814b39, (q31_t)0x7c7fd5c4, (q31_t)0x7c7e6002,\n    (q31_t)0x7c7ce9f4, (q31_t)0x7c7b7399, (q31_t)0x7c79fcf1, (q31_t)0x7c7885fc,\n    (q31_t)0x7c770eba, (q31_t)0x7c75972c, (q31_t)0x7c741f51, (q31_t)0x7c72a729,\n    (q31_t)0x7c712eb5, (q31_t)0x7c6fb5f3, (q31_t)0x7c6e3ce5, (q31_t)0x7c6cc38a,\n    (q31_t)0x7c6b49e3, (q31_t)0x7c69cfee, (q31_t)0x7c6855ad, (q31_t)0x7c66db1f,\n    (q31_t)0x7c656045, (q31_t)0x7c63e51e, (q31_t)0x7c6269aa, (q31_t)0x7c60ede9,\n    (q31_t)0x7c5f71db, (q31_t)0x7c5df581, (q31_t)0x7c5c78da, (q31_t)0x7c5afbe6,\n    (q31_t)0x7c597ea6, (q31_t)0x7c580119, (q31_t)0x7c56833f, (q31_t)0x7c550519,\n    (q31_t)0x7c5386a6, (q31_t)0x7c5207e6, (q31_t)0x7c5088d9, (q31_t)0x7c4f0980,\n    (q31_t)0x7c4d89da, (q31_t)0x7c4c09e8, (q31_t)0x7c4a89a8, (q31_t)0x7c49091c,\n    (q31_t)0x7c478844, (q31_t)0x7c46071f, (q31_t)0x7c4485ad, (q31_t)0x7c4303ee,\n    (q31_t)0x7c4181e3, (q31_t)0x7c3fff8b, (q31_t)0x7c3e7ce7, (q31_t)0x7c3cf9f5,\n    (q31_t)0x7c3b76b8, (q31_t)0x7c39f32d, (q31_t)0x7c386f56, (q31_t)0x7c36eb33,\n    (q31_t)0x7c3566c2, (q31_t)0x7c33e205, (q31_t)0x7c325cfc, (q31_t)0x7c30d7a6,\n    (q31_t)0x7c2f5203, (q31_t)0x7c2dcc14, (q31_t)0x7c2c45d8, (q31_t)0x7c2abf4f,\n    (q31_t)0x7c29387a, (q31_t)0x7c27b158, (q31_t)0x7c2629ea, (q31_t)0x7c24a22f,\n    (q31_t)0x7c231a28, (q31_t)0x7c2191d4, (q31_t)0x7c200933, (q31_t)0x7c1e8046,\n    (q31_t)0x7c1cf70c, (q31_t)0x7c1b6d86, (q31_t)0x7c19e3b3, (q31_t)0x7c185994,\n    (q31_t)0x7c16cf28, (q31_t)0x7c15446f, (q31_t)0x7c13b96a, (q31_t)0x7c122e19,\n    (q31_t)0x7c10a27b, (q31_t)0x7c0f1690, (q31_t)0x7c0d8a59, (q31_t)0x7c0bfdd5,\n    (q31_t)0x7c0a7105, (q31_t)0x7c08e3e8, (q31_t)0x7c07567f, (q31_t)0x7c05c8c9,\n    (q31_t)0x7c043ac7, (q31_t)0x7c02ac78, (q31_t)0x7c011ddd, (q31_t)0x7bff8ef5,\n    (q31_t)0x7bfdffc1, (q31_t)0x7bfc7041, (q31_t)0x7bfae073, (q31_t)0x7bf9505a,\n    (q31_t)0x7bf7bff4, (q31_t)0x7bf62f41, (q31_t)0x7bf49e42, (q31_t)0x7bf30cf6,\n    (q31_t)0x7bf17b5e, (q31_t)0x7befe97a, (q31_t)0x7bee5749, (q31_t)0x7becc4cc,\n    (q31_t)0x7beb3202, (q31_t)0x7be99eec, (q31_t)0x7be80b89, (q31_t)0x7be677da,\n    (q31_t)0x7be4e3df, (q31_t)0x7be34f97, (q31_t)0x7be1bb02, (q31_t)0x7be02621,\n    (q31_t)0x7bde90f4, (q31_t)0x7bdcfb7b, (q31_t)0x7bdb65b5, (q31_t)0x7bd9cfa2,\n    (q31_t)0x7bd83944, (q31_t)0x7bd6a298, (q31_t)0x7bd50ba1, (q31_t)0x7bd3745d,\n    (q31_t)0x7bd1dccc, (q31_t)0x7bd044f0, (q31_t)0x7bceacc7, (q31_t)0x7bcd1451,\n    (q31_t)0x7bcb7b8f, (q31_t)0x7bc9e281, (q31_t)0x7bc84927, (q31_t)0x7bc6af80,\n    (q31_t)0x7bc5158c, (q31_t)0x7bc37b4d, (q31_t)0x7bc1e0c1, (q31_t)0x7bc045e9,\n    (q31_t)0x7bbeaac4, (q31_t)0x7bbd0f53, (q31_t)0x7bbb7396, (q31_t)0x7bb9d78c,\n    (q31_t)0x7bb83b36, (q31_t)0x7bb69e94, (q31_t)0x7bb501a5, (q31_t)0x7bb3646a,\n    (q31_t)0x7bb1c6e3, (q31_t)0x7bb02910, (q31_t)0x7bae8af0, (q31_t)0x7bacec84,\n    (q31_t)0x7bab4dcc, (q31_t)0x7ba9aec7, (q31_t)0x7ba80f76, (q31_t)0x7ba66fd9,\n    (q31_t)0x7ba4cfef, (q31_t)0x7ba32fba, (q31_t)0x7ba18f38, (q31_t)0x7b9fee69,\n    (q31_t)0x7b9e4d4f, (q31_t)0x7b9cabe8, (q31_t)0x7b9b0a35, (q31_t)0x7b996836,\n    (q31_t)0x7b97c5ea, (q31_t)0x7b962352, (q31_t)0x7b94806e, (q31_t)0x7b92dd3e,\n    (q31_t)0x7b9139c2, (q31_t)0x7b8f95f9, (q31_t)0x7b8df1e4, (q31_t)0x7b8c4d83,\n    (q31_t)0x7b8aa8d6, (q31_t)0x7b8903dc, (q31_t)0x7b875e96, (q31_t)0x7b85b904,\n    (q31_t)0x7b841326, (q31_t)0x7b826cfc, (q31_t)0x7b80c686, (q31_t)0x7b7f1fc3,\n    (q31_t)0x7b7d78b4, (q31_t)0x7b7bd159, (q31_t)0x7b7a29b2, (q31_t)0x7b7881be,\n    (q31_t)0x7b76d97f, (q31_t)0x7b7530f3, (q31_t)0x7b73881b, (q31_t)0x7b71def7,\n    (q31_t)0x7b703587, (q31_t)0x7b6e8bcb, (q31_t)0x7b6ce1c2, (q31_t)0x7b6b376e,\n    (q31_t)0x7b698ccd, (q31_t)0x7b67e1e0, (q31_t)0x7b6636a7, (q31_t)0x7b648b22,\n    (q31_t)0x7b62df51, (q31_t)0x7b613334, (q31_t)0x7b5f86ca, (q31_t)0x7b5dda15,\n    (q31_t)0x7b5c2d13, (q31_t)0x7b5a7fc6, (q31_t)0x7b58d22c, (q31_t)0x7b572446,\n    (q31_t)0x7b557614, (q31_t)0x7b53c796, (q31_t)0x7b5218cc, (q31_t)0x7b5069b6,\n    (q31_t)0x7b4eba53, (q31_t)0x7b4d0aa5, (q31_t)0x7b4b5aab, (q31_t)0x7b49aa64,\n    (q31_t)0x7b47f9d2, (q31_t)0x7b4648f3, (q31_t)0x7b4497c9, (q31_t)0x7b42e652,\n    (q31_t)0x7b413490, (q31_t)0x7b3f8281, (q31_t)0x7b3dd026, (q31_t)0x7b3c1d80,\n    (q31_t)0x7b3a6a8d, (q31_t)0x7b38b74e, (q31_t)0x7b3703c3, (q31_t)0x7b354fed,\n    (q31_t)0x7b339bca, (q31_t)0x7b31e75b, (q31_t)0x7b3032a0, (q31_t)0x7b2e7d9a,\n    (q31_t)0x7b2cc847, (q31_t)0x7b2b12a8, (q31_t)0x7b295cbe, (q31_t)0x7b27a687,\n    (q31_t)0x7b25f004, (q31_t)0x7b243936, (q31_t)0x7b22821b, (q31_t)0x7b20cab5,\n    (q31_t)0x7b1f1302, (q31_t)0x7b1d5b04, (q31_t)0x7b1ba2b9, (q31_t)0x7b19ea23,\n    (q31_t)0x7b183141, (q31_t)0x7b167813, (q31_t)0x7b14be99, (q31_t)0x7b1304d3,\n    (q31_t)0x7b114ac1, (q31_t)0x7b0f9063, (q31_t)0x7b0dd5b9, (q31_t)0x7b0c1ac4,\n    (q31_t)0x7b0a5f82, (q31_t)0x7b08a3f5, (q31_t)0x7b06e81b, (q31_t)0x7b052bf6,\n    (q31_t)0x7b036f85, (q31_t)0x7b01b2c8, (q31_t)0x7afff5bf, (q31_t)0x7afe386a,\n    (q31_t)0x7afc7aca, (q31_t)0x7afabcdd, (q31_t)0x7af8fea5, (q31_t)0x7af74021,\n    (q31_t)0x7af58151, (q31_t)0x7af3c235, (q31_t)0x7af202cd, (q31_t)0x7af0431a,\n    (q31_t)0x7aee831a, (q31_t)0x7aecc2cf, (q31_t)0x7aeb0238, (q31_t)0x7ae94155,\n    (q31_t)0x7ae78026, (q31_t)0x7ae5beac, (q31_t)0x7ae3fce6, (q31_t)0x7ae23ad4,\n    (q31_t)0x7ae07876, (q31_t)0x7adeb5cc, (q31_t)0x7adcf2d6, (q31_t)0x7adb2f95,\n    (q31_t)0x7ad96c08, (q31_t)0x7ad7a82f, (q31_t)0x7ad5e40a, (q31_t)0x7ad41f9a,\n    (q31_t)0x7ad25ade, (q31_t)0x7ad095d6, (q31_t)0x7aced082, (q31_t)0x7acd0ae3,\n    (q31_t)0x7acb44f8, (q31_t)0x7ac97ec1, (q31_t)0x7ac7b83e, (q31_t)0x7ac5f170,\n    (q31_t)0x7ac42a55, (q31_t)0x7ac262ef, (q31_t)0x7ac09b3e, (q31_t)0x7abed341,\n    (q31_t)0x7abd0af7, (q31_t)0x7abb4263, (q31_t)0x7ab97982, (q31_t)0x7ab7b056,\n    (q31_t)0x7ab5e6de, (q31_t)0x7ab41d1b, (q31_t)0x7ab2530b, (q31_t)0x7ab088b0,\n    (q31_t)0x7aaebe0a, (q31_t)0x7aacf318, (q31_t)0x7aab27da, (q31_t)0x7aa95c50,\n    (q31_t)0x7aa7907b, (q31_t)0x7aa5c45a, (q31_t)0x7aa3f7ed, (q31_t)0x7aa22b35,\n    (q31_t)0x7aa05e31, (q31_t)0x7a9e90e1, (q31_t)0x7a9cc346, (q31_t)0x7a9af55f,\n    (q31_t)0x7a99272d, (q31_t)0x7a9758af, (q31_t)0x7a9589e5, (q31_t)0x7a93bad0,\n    (q31_t)0x7a91eb6f, (q31_t)0x7a901bc2, (q31_t)0x7a8e4bca, (q31_t)0x7a8c7b87,\n    (q31_t)0x7a8aaaf7, (q31_t)0x7a88da1c, (q31_t)0x7a8708f6, (q31_t)0x7a853784,\n    (q31_t)0x7a8365c6, (q31_t)0x7a8193bd, (q31_t)0x7a7fc168, (q31_t)0x7a7deec8,\n    (q31_t)0x7a7c1bdc, (q31_t)0x7a7a48a4, (q31_t)0x7a787521, (q31_t)0x7a76a153,\n    (q31_t)0x7a74cd38, (q31_t)0x7a72f8d3, (q31_t)0x7a712422, (q31_t)0x7a6f4f25,\n    (q31_t)0x7a6d79dd, (q31_t)0x7a6ba449, (q31_t)0x7a69ce6a, (q31_t)0x7a67f83f,\n    (q31_t)0x7a6621c9, (q31_t)0x7a644b07, (q31_t)0x7a6273fa, (q31_t)0x7a609ca1,\n    (q31_t)0x7a5ec4fc, (q31_t)0x7a5ced0d, (q31_t)0x7a5b14d1, (q31_t)0x7a593c4b,\n    (q31_t)0x7a576379, (q31_t)0x7a558a5b, (q31_t)0x7a53b0f2, (q31_t)0x7a51d73d,\n    (q31_t)0x7a4ffd3d, (q31_t)0x7a4e22f2, (q31_t)0x7a4c485b, (q31_t)0x7a4a6d78,\n    (q31_t)0x7a48924b, (q31_t)0x7a46b6d1, (q31_t)0x7a44db0d, (q31_t)0x7a42fefd,\n    (q31_t)0x7a4122a1, (q31_t)0x7a3f45fa, (q31_t)0x7a3d6908, (q31_t)0x7a3b8bca,\n    (q31_t)0x7a39ae41, (q31_t)0x7a37d06d, (q31_t)0x7a35f24d, (q31_t)0x7a3413e2,\n    (q31_t)0x7a32352b, (q31_t)0x7a305629, (q31_t)0x7a2e76dc, (q31_t)0x7a2c9743,\n    (q31_t)0x7a2ab75f, (q31_t)0x7a28d72f, (q31_t)0x7a26f6b4, (q31_t)0x7a2515ee,\n    (q31_t)0x7a2334dd, (q31_t)0x7a215380, (q31_t)0x7a1f71d7, (q31_t)0x7a1d8fe4,\n    (q31_t)0x7a1bada5, (q31_t)0x7a19cb1b, (q31_t)0x7a17e845, (q31_t)0x7a160524,\n    (q31_t)0x7a1421b8, (q31_t)0x7a123e01, (q31_t)0x7a1059fe, (q31_t)0x7a0e75b0,\n    (q31_t)0x7a0c9117, (q31_t)0x7a0aac32, (q31_t)0x7a08c702, (q31_t)0x7a06e187,\n    (q31_t)0x7a04fbc1, (q31_t)0x7a0315af, (q31_t)0x7a012f52, (q31_t)0x79ff48aa,\n    (q31_t)0x79fd61b6, (q31_t)0x79fb7a77, (q31_t)0x79f992ed, (q31_t)0x79f7ab18,\n    (q31_t)0x79f5c2f8, (q31_t)0x79f3da8c, (q31_t)0x79f1f1d5, (q31_t)0x79f008d3,\n    (q31_t)0x79ee1f86, (q31_t)0x79ec35ed, (q31_t)0x79ea4c09, (q31_t)0x79e861da,\n    (q31_t)0x79e67760, (q31_t)0x79e48c9b, (q31_t)0x79e2a18a, (q31_t)0x79e0b62e,\n    (q31_t)0x79deca87, (q31_t)0x79dcde95, (q31_t)0x79daf258, (q31_t)0x79d905d0,\n    (q31_t)0x79d718fc, (q31_t)0x79d52bdd, (q31_t)0x79d33e73, (q31_t)0x79d150be,\n    (q31_t)0x79cf62be, (q31_t)0x79cd7473, (q31_t)0x79cb85dc, (q31_t)0x79c996fb,\n    (q31_t)0x79c7a7ce, (q31_t)0x79c5b856, (q31_t)0x79c3c893, (q31_t)0x79c1d885,\n    (q31_t)0x79bfe82c, (q31_t)0x79bdf788, (q31_t)0x79bc0698, (q31_t)0x79ba155e,\n    (q31_t)0x79b823d8, (q31_t)0x79b63207, (q31_t)0x79b43fec, (q31_t)0x79b24d85,\n    (q31_t)0x79b05ad3, (q31_t)0x79ae67d6, (q31_t)0x79ac748e, (q31_t)0x79aa80fb,\n    (q31_t)0x79a88d1d, (q31_t)0x79a698f4, (q31_t)0x79a4a480, (q31_t)0x79a2afc1,\n    (q31_t)0x79a0bab6, (q31_t)0x799ec561, (q31_t)0x799ccfc1, (q31_t)0x799ad9d5,\n    (q31_t)0x7998e39f, (q31_t)0x7996ed1e, (q31_t)0x7994f651, (q31_t)0x7992ff3a,\n    (q31_t)0x799107d8, (q31_t)0x798f102a, (q31_t)0x798d1832, (q31_t)0x798b1fef,\n    (q31_t)0x79892761, (q31_t)0x79872e87, (q31_t)0x79853563, (q31_t)0x79833bf4,\n    (q31_t)0x7981423a, (q31_t)0x797f4835, (q31_t)0x797d4de5, (q31_t)0x797b534a,\n    (q31_t)0x79795864, (q31_t)0x79775d33, (q31_t)0x797561b8, (q31_t)0x797365f1,\n    (q31_t)0x797169df, (q31_t)0x796f6d83, (q31_t)0x796d70dc, (q31_t)0x796b73e9,\n    (q31_t)0x796976ac, (q31_t)0x79677924, (q31_t)0x79657b51, (q31_t)0x79637d33,\n    (q31_t)0x79617eca, (q31_t)0x795f8017, (q31_t)0x795d8118, (q31_t)0x795b81cf,\n    (q31_t)0x7959823b, (q31_t)0x7957825c, (q31_t)0x79558232, (q31_t)0x795381bd,\n    (q31_t)0x795180fe, (q31_t)0x794f7ff3, (q31_t)0x794d7e9e, (q31_t)0x794b7cfe,\n    (q31_t)0x79497b13, (q31_t)0x794778dd, (q31_t)0x7945765d, (q31_t)0x79437391,\n    (q31_t)0x7941707b, (q31_t)0x793f6d1a, (q31_t)0x793d696f, (q31_t)0x793b6578,\n    (q31_t)0x79396137, (q31_t)0x79375cab, (q31_t)0x793557d4, (q31_t)0x793352b2,\n    (q31_t)0x79314d46, (q31_t)0x792f478f, (q31_t)0x792d418d, (q31_t)0x792b3b40,\n    (q31_t)0x792934a9, (q31_t)0x79272dc7, (q31_t)0x7925269a, (q31_t)0x79231f22,\n    (q31_t)0x79211760, (q31_t)0x791f0f53, (q31_t)0x791d06fb, (q31_t)0x791afe59,\n    (q31_t)0x7918f56c, (q31_t)0x7916ec34, (q31_t)0x7914e2b2, (q31_t)0x7912d8e4,\n    (q31_t)0x7910cecc, (q31_t)0x790ec46a, (q31_t)0x790cb9bd, (q31_t)0x790aaec5,\n    (q31_t)0x7908a382, (q31_t)0x790697f5, (q31_t)0x79048c1d, (q31_t)0x79027ffa,\n    (q31_t)0x7900738d, (q31_t)0x78fe66d5, (q31_t)0x78fc59d3, (q31_t)0x78fa4c86,\n    (q31_t)0x78f83eee, (q31_t)0x78f6310c, (q31_t)0x78f422df, (q31_t)0x78f21467,\n    (q31_t)0x78f005a5, (q31_t)0x78edf698, (q31_t)0x78ebe741, (q31_t)0x78e9d79f,\n    (q31_t)0x78e7c7b2, (q31_t)0x78e5b77b, (q31_t)0x78e3a6f9, (q31_t)0x78e1962d,\n    (q31_t)0x78df8516, (q31_t)0x78dd73b5, (q31_t)0x78db6209, (q31_t)0x78d95012,\n    (q31_t)0x78d73dd1, (q31_t)0x78d52b46, (q31_t)0x78d31870, (q31_t)0x78d1054f,\n    (q31_t)0x78cef1e4, (q31_t)0x78ccde2e, (q31_t)0x78caca2e, (q31_t)0x78c8b5e3,\n    (q31_t)0x78c6a14e, (q31_t)0x78c48c6e, (q31_t)0x78c27744, (q31_t)0x78c061cf,\n    (q31_t)0x78be4c10, (q31_t)0x78bc3606, (q31_t)0x78ba1fb2, (q31_t)0x78b80913,\n    (q31_t)0x78b5f22a, (q31_t)0x78b3daf7, (q31_t)0x78b1c379, (q31_t)0x78afabb0,\n    (q31_t)0x78ad939d, (q31_t)0x78ab7b40, (q31_t)0x78a96298, (q31_t)0x78a749a6,\n    (q31_t)0x78a53069, (q31_t)0x78a316e2, (q31_t)0x78a0fd11, (q31_t)0x789ee2f5,\n    (q31_t)0x789cc88f, (q31_t)0x789aadde, (q31_t)0x789892e3, (q31_t)0x7896779d,\n    (q31_t)0x78945c0d, (q31_t)0x78924033, (q31_t)0x7890240e, (q31_t)0x788e07a0,\n    (q31_t)0x788beae6, (q31_t)0x7889cde2, (q31_t)0x7887b094, (q31_t)0x788592fc,\n    (q31_t)0x78837519, (q31_t)0x788156ec, (q31_t)0x787f3875, (q31_t)0x787d19b3,\n    (q31_t)0x787afaa7, (q31_t)0x7878db50, (q31_t)0x7876bbb0, (q31_t)0x78749bc5,\n    (q31_t)0x78727b8f, (q31_t)0x78705b10, (q31_t)0x786e3a46, (q31_t)0x786c1932,\n    (q31_t)0x7869f7d3, (q31_t)0x7867d62a, (q31_t)0x7865b437, (q31_t)0x786391fa,\n    (q31_t)0x78616f72, (q31_t)0x785f4ca1, (q31_t)0x785d2984, (q31_t)0x785b061e,\n    (q31_t)0x7858e26e, (q31_t)0x7856be73, (q31_t)0x78549a2e, (q31_t)0x7852759e,\n    (q31_t)0x785050c5, (q31_t)0x784e2ba1, (q31_t)0x784c0633, (q31_t)0x7849e07b,\n    (q31_t)0x7847ba79, (q31_t)0x7845942c, (q31_t)0x78436d96, (q31_t)0x784146b5,\n    (q31_t)0x783f1f8a, (q31_t)0x783cf815, (q31_t)0x783ad055, (q31_t)0x7838a84c,\n    (q31_t)0x78367ff8, (q31_t)0x7834575a, (q31_t)0x78322e72, (q31_t)0x78300540,\n    (q31_t)0x782ddbc4, (q31_t)0x782bb1fd, (q31_t)0x782987ed, (q31_t)0x78275d92,\n    (q31_t)0x782532ed, (q31_t)0x782307fe, (q31_t)0x7820dcc5, (q31_t)0x781eb142,\n    (q31_t)0x781c8575, (q31_t)0x781a595d, (q31_t)0x78182cfc, (q31_t)0x78160051,\n    (q31_t)0x7813d35b, (q31_t)0x7811a61b, (q31_t)0x780f7892, (q31_t)0x780d4abe,\n    (q31_t)0x780b1ca0, (q31_t)0x7808ee38, (q31_t)0x7806bf86, (q31_t)0x7804908a,\n    (q31_t)0x78026145, (q31_t)0x780031b5, (q31_t)0x77fe01db, (q31_t)0x77fbd1b6,\n    (q31_t)0x77f9a148, (q31_t)0x77f77090, (q31_t)0x77f53f8e, (q31_t)0x77f30e42,\n    (q31_t)0x77f0dcac, (q31_t)0x77eeaacc, (q31_t)0x77ec78a2, (q31_t)0x77ea462e,\n    (q31_t)0x77e81370, (q31_t)0x77e5e068, (q31_t)0x77e3ad17, (q31_t)0x77e1797b,\n    (q31_t)0x77df4595, (q31_t)0x77dd1165, (q31_t)0x77dadcec, (q31_t)0x77d8a828,\n    (q31_t)0x77d6731a, (q31_t)0x77d43dc3, (q31_t)0x77d20822, (q31_t)0x77cfd236,\n    (q31_t)0x77cd9c01, (q31_t)0x77cb6582, (q31_t)0x77c92eb9, (q31_t)0x77c6f7a6,\n    (q31_t)0x77c4c04a, (q31_t)0x77c288a3, (q31_t)0x77c050b2, (q31_t)0x77be1878,\n    (q31_t)0x77bbdff4, (q31_t)0x77b9a726, (q31_t)0x77b76e0e, (q31_t)0x77b534ac,\n    (q31_t)0x77b2fb00, (q31_t)0x77b0c10b, (q31_t)0x77ae86cc, (q31_t)0x77ac4c43,\n    (q31_t)0x77aa1170, (q31_t)0x77a7d653, (q31_t)0x77a59aec, (q31_t)0x77a35f3c,\n    (q31_t)0x77a12342, (q31_t)0x779ee6fe, (q31_t)0x779caa70, (q31_t)0x779a6d99,\n    (q31_t)0x77983077, (q31_t)0x7795f30c, (q31_t)0x7793b557, (q31_t)0x77917759,\n    (q31_t)0x778f3910, (q31_t)0x778cfa7e, (q31_t)0x778abba2, (q31_t)0x77887c7d,\n    (q31_t)0x77863d0d, (q31_t)0x7783fd54, (q31_t)0x7781bd52, (q31_t)0x777f7d05,\n    (q31_t)0x777d3c6f, (q31_t)0x777afb8f, (q31_t)0x7778ba65, (q31_t)0x777678f2,\n    (q31_t)0x77743735, (q31_t)0x7771f52e, (q31_t)0x776fb2de, (q31_t)0x776d7044,\n    (q31_t)0x776b2d60, (q31_t)0x7768ea33, (q31_t)0x7766a6bc, (q31_t)0x776462fb,\n    (q31_t)0x77621ef1, (q31_t)0x775fda9d, (q31_t)0x775d95ff, (q31_t)0x775b5118,\n    (q31_t)0x77590be7, (q31_t)0x7756c66c, (q31_t)0x775480a8, (q31_t)0x77523a9b,\n    (q31_t)0x774ff443, (q31_t)0x774dada2, (q31_t)0x774b66b8, (q31_t)0x77491f84,\n    (q31_t)0x7746d806, (q31_t)0x7744903f, (q31_t)0x7742482e, (q31_t)0x773fffd4,\n    (q31_t)0x773db730, (q31_t)0x773b6e42, (q31_t)0x7739250b, (q31_t)0x7736db8b,\n    (q31_t)0x773491c0, (q31_t)0x773247ad, (q31_t)0x772ffd50, (q31_t)0x772db2a9,\n    (q31_t)0x772b67b9, (q31_t)0x77291c7f, (q31_t)0x7726d0fc, (q31_t)0x7724852f,\n    (q31_t)0x77223919, (q31_t)0x771fecb9, (q31_t)0x771da010, (q31_t)0x771b531d,\n    (q31_t)0x771905e1, (q31_t)0x7716b85b, (q31_t)0x77146a8c, (q31_t)0x77121c74,\n    (q31_t)0x770fce12, (q31_t)0x770d7f66, (q31_t)0x770b3072, (q31_t)0x7708e133,\n    (q31_t)0x770691ab, (q31_t)0x770441da, (q31_t)0x7701f1c0, (q31_t)0x76ffa15c,\n    (q31_t)0x76fd50ae, (q31_t)0x76faffb8, (q31_t)0x76f8ae78, (q31_t)0x76f65cee,\n    (q31_t)0x76f40b1b, (q31_t)0x76f1b8ff, (q31_t)0x76ef6699, (q31_t)0x76ed13ea,\n    (q31_t)0x76eac0f2, (q31_t)0x76e86db0, (q31_t)0x76e61a25, (q31_t)0x76e3c650,\n    (q31_t)0x76e17233, (q31_t)0x76df1dcb, (q31_t)0x76dcc91b, (q31_t)0x76da7421,\n    (q31_t)0x76d81ede, (q31_t)0x76d5c952, (q31_t)0x76d3737c, (q31_t)0x76d11d5d,\n    (q31_t)0x76cec6f5, (q31_t)0x76cc7043, (q31_t)0x76ca1948, (q31_t)0x76c7c204,\n    (q31_t)0x76c56a77, (q31_t)0x76c312a0, (q31_t)0x76c0ba80, (q31_t)0x76be6217,\n    (q31_t)0x76bc0965, (q31_t)0x76b9b069, (q31_t)0x76b75724, (q31_t)0x76b4fd96,\n    (q31_t)0x76b2a3bf, (q31_t)0x76b0499e, (q31_t)0x76adef34, (q31_t)0x76ab9481,\n    (q31_t)0x76a93985, (q31_t)0x76a6de40, (q31_t)0x76a482b1, (q31_t)0x76a226da,\n    (q31_t)0x769fcab9, (q31_t)0x769d6e4f, (q31_t)0x769b119b, (q31_t)0x7698b49f,\n    (q31_t)0x76965759, (q31_t)0x7693f9ca, (q31_t)0x76919bf3, (q31_t)0x768f3dd2,\n    (q31_t)0x768cdf67, (q31_t)0x768a80b4, (q31_t)0x768821b8, (q31_t)0x7685c272,\n    (q31_t)0x768362e4, (q31_t)0x7681030c, (q31_t)0x767ea2eb, (q31_t)0x767c4281,\n    (q31_t)0x7679e1ce, (q31_t)0x767780d2, (q31_t)0x76751f8d, (q31_t)0x7672bdfe,\n    (q31_t)0x76705c27, (q31_t)0x766dfa07, (q31_t)0x766b979d, (q31_t)0x766934eb,\n    (q31_t)0x7666d1ef, (q31_t)0x76646eab, (q31_t)0x76620b1d, (q31_t)0x765fa747,\n    (q31_t)0x765d4327, (q31_t)0x765adebe, (q31_t)0x76587a0d, (q31_t)0x76561512,\n    (q31_t)0x7653afce, (q31_t)0x76514a42, (q31_t)0x764ee46c, (q31_t)0x764c7e4d,\n    (q31_t)0x764a17e6, (q31_t)0x7647b135, (q31_t)0x76454a3c, (q31_t)0x7642e2f9,\n    (q31_t)0x76407b6e, (q31_t)0x763e139a, (q31_t)0x763bab7c, (q31_t)0x76394316,\n    (q31_t)0x7636da67, (q31_t)0x7634716f, (q31_t)0x7632082e, (q31_t)0x762f9ea4,\n    (q31_t)0x762d34d1, (q31_t)0x762acab6, (q31_t)0x76286051, (q31_t)0x7625f5a3,\n    (q31_t)0x76238aad, (q31_t)0x76211f6e, (q31_t)0x761eb3e6, (q31_t)0x761c4815,\n    (q31_t)0x7619dbfb, (q31_t)0x76176f98, (q31_t)0x761502ed, (q31_t)0x761295f9,\n    (q31_t)0x761028bb, (q31_t)0x760dbb35, (q31_t)0x760b4d67, (q31_t)0x7608df4f,\n    (q31_t)0x760670ee, (q31_t)0x76040245, (q31_t)0x76019353, (q31_t)0x75ff2418,\n    (q31_t)0x75fcb495, (q31_t)0x75fa44c8, (q31_t)0x75f7d4b3, (q31_t)0x75f56455,\n    (q31_t)0x75f2f3ae, (q31_t)0x75f082bf, (q31_t)0x75ee1187, (q31_t)0x75eba006,\n    (q31_t)0x75e92e3c, (q31_t)0x75e6bc2a, (q31_t)0x75e449ce, (q31_t)0x75e1d72b,\n    (q31_t)0x75df643e, (q31_t)0x75dcf109, (q31_t)0x75da7d8b, (q31_t)0x75d809c4,\n    (q31_t)0x75d595b4, (q31_t)0x75d3215c, (q31_t)0x75d0acbc, (q31_t)0x75ce37d2,\n    (q31_t)0x75cbc2a0, (q31_t)0x75c94d25, (q31_t)0x75c6d762, (q31_t)0x75c46156,\n    (q31_t)0x75c1eb01, (q31_t)0x75bf7464, (q31_t)0x75bcfd7e, (q31_t)0x75ba864f,\n    (q31_t)0x75b80ed8, (q31_t)0x75b59718, (q31_t)0x75b31f0f, (q31_t)0x75b0a6be,\n    (q31_t)0x75ae2e25, (q31_t)0x75abb542, (q31_t)0x75a93c18, (q31_t)0x75a6c2a4,\n    (q31_t)0x75a448e8, (q31_t)0x75a1cee4, (q31_t)0x759f5496, (q31_t)0x759cda01,\n    (q31_t)0x759a5f22, (q31_t)0x7597e3fc, (q31_t)0x7595688c, (q31_t)0x7592ecd4,\n    (q31_t)0x759070d4, (q31_t)0x758df48b, (q31_t)0x758b77fa, (q31_t)0x7588fb20,\n    (q31_t)0x75867dfd, (q31_t)0x75840093, (q31_t)0x758182df, (q31_t)0x757f04e3,\n    (q31_t)0x757c869f, (q31_t)0x757a0812, (q31_t)0x7577893d, (q31_t)0x75750a1f,\n    (q31_t)0x75728ab9, (q31_t)0x75700b0a, (q31_t)0x756d8b13, (q31_t)0x756b0ad3,\n    (q31_t)0x75688a4b, (q31_t)0x7566097b, (q31_t)0x75638862, (q31_t)0x75610701,\n    (q31_t)0x755e8557, (q31_t)0x755c0365, (q31_t)0x7559812b, (q31_t)0x7556fea8,\n    (q31_t)0x75547bdd, (q31_t)0x7551f8c9, (q31_t)0x754f756e, (q31_t)0x754cf1c9,\n    (q31_t)0x754a6ddd, (q31_t)0x7547e9a8, (q31_t)0x7545652a, (q31_t)0x7542e065,\n    (q31_t)0x75405b57, (q31_t)0x753dd600, (q31_t)0x753b5061, (q31_t)0x7538ca7b,\n    (q31_t)0x7536444b, (q31_t)0x7533bdd4, (q31_t)0x75313714, (q31_t)0x752eb00c,\n    (q31_t)0x752c28bb, (q31_t)0x7529a122, (q31_t)0x75271941, (q31_t)0x75249118,\n    (q31_t)0x752208a7, (q31_t)0x751f7fed, (q31_t)0x751cf6eb, (q31_t)0x751a6da0,\n    (q31_t)0x7517e40e, (q31_t)0x75155a33, (q31_t)0x7512d010, (q31_t)0x751045a5,\n    (q31_t)0x750dbaf2, (q31_t)0x750b2ff6, (q31_t)0x7508a4b2, (q31_t)0x75061926,\n    (q31_t)0x75038d52, (q31_t)0x75010136, (q31_t)0x74fe74d1, (q31_t)0x74fbe825,\n    (q31_t)0x74f95b30, (q31_t)0x74f6cdf3, (q31_t)0x74f4406d, (q31_t)0x74f1b2a0,\n    (q31_t)0x74ef248b, (q31_t)0x74ec962d, (q31_t)0x74ea0787, (q31_t)0x74e7789a,\n    (q31_t)0x74e4e964, (q31_t)0x74e259e6, (q31_t)0x74dfca20, (q31_t)0x74dd3a11,\n    (q31_t)0x74daa9bb, (q31_t)0x74d8191d, (q31_t)0x74d58836, (q31_t)0x74d2f708,\n    (q31_t)0x74d06591, (q31_t)0x74cdd3d2, (q31_t)0x74cb41cc, (q31_t)0x74c8af7d,\n    (q31_t)0x74c61ce6, (q31_t)0x74c38a07, (q31_t)0x74c0f6e0, (q31_t)0x74be6372,\n    (q31_t)0x74bbcfbb, (q31_t)0x74b93bbc, (q31_t)0x74b6a775, (q31_t)0x74b412e6,\n    (q31_t)0x74b17e0f, (q31_t)0x74aee8f0, (q31_t)0x74ac5389, (q31_t)0x74a9bddb,\n    (q31_t)0x74a727e4, (q31_t)0x74a491a5, (q31_t)0x74a1fb1e, (q31_t)0x749f6450,\n    (q31_t)0x749ccd39, (q31_t)0x749a35db, (q31_t)0x74979e34, (q31_t)0x74950646,\n    (q31_t)0x74926e10, (q31_t)0x748fd592, (q31_t)0x748d3ccb, (q31_t)0x748aa3be,\n    (q31_t)0x74880a68, (q31_t)0x748570ca, (q31_t)0x7482d6e4, (q31_t)0x74803cb7,\n    (q31_t)0x747da242, (q31_t)0x747b0784, (q31_t)0x74786c7f, (q31_t)0x7475d132,\n    (q31_t)0x7473359e, (q31_t)0x747099c1, (q31_t)0x746dfd9d, (q31_t)0x746b6131,\n    (q31_t)0x7468c47c, (q31_t)0x74662781, (q31_t)0x74638a3d, (q31_t)0x7460ecb2,\n    (q31_t)0x745e4ede, (q31_t)0x745bb0c3, (q31_t)0x74591261, (q31_t)0x745673b6,\n    (q31_t)0x7453d4c4, (q31_t)0x7451358a, (q31_t)0x744e9608, (q31_t)0x744bf63e,\n    (q31_t)0x7449562d, (q31_t)0x7446b5d4, (q31_t)0x74441533, (q31_t)0x7441744b,\n    (q31_t)0x743ed31b, (q31_t)0x743c31a3, (q31_t)0x74398fe3, (q31_t)0x7436eddc,\n    (q31_t)0x74344b8d, (q31_t)0x7431a8f6, (q31_t)0x742f0618, (q31_t)0x742c62f2,\n    (q31_t)0x7429bf84, (q31_t)0x74271bcf, (q31_t)0x742477d2, (q31_t)0x7421d38e,\n    (q31_t)0x741f2f01, (q31_t)0x741c8a2d, (q31_t)0x7419e512, (q31_t)0x74173faf,\n    (q31_t)0x74149a04, (q31_t)0x7411f412, (q31_t)0x740f4dd8, (q31_t)0x740ca756,\n    (q31_t)0x740a008d, (q31_t)0x7407597d, (q31_t)0x7404b224, (q31_t)0x74020a85,\n    (q31_t)0x73ff629d, (q31_t)0x73fcba6e, (q31_t)0x73fa11f8, (q31_t)0x73f7693a,\n    (q31_t)0x73f4c034, (q31_t)0x73f216e7, (q31_t)0x73ef6d53, (q31_t)0x73ecc377,\n    (q31_t)0x73ea1953, (q31_t)0x73e76ee8, (q31_t)0x73e4c435, (q31_t)0x73e2193b,\n    (q31_t)0x73df6df9, (q31_t)0x73dcc270, (q31_t)0x73da16a0, (q31_t)0x73d76a88,\n    (q31_t)0x73d4be28, (q31_t)0x73d21182, (q31_t)0x73cf6493, (q31_t)0x73ccb75d,\n    (q31_t)0x73ca09e0, (q31_t)0x73c75c1c, (q31_t)0x73c4ae10, (q31_t)0x73c1ffbc,\n    (q31_t)0x73bf5121, (q31_t)0x73bca23f, (q31_t)0x73b9f315, (q31_t)0x73b743a4,\n    (q31_t)0x73b493ec, (q31_t)0x73b1e3ec, (q31_t)0x73af33a5, (q31_t)0x73ac8316,\n    (q31_t)0x73a9d240, (q31_t)0x73a72123, (q31_t)0x73a46fbf, (q31_t)0x73a1be13,\n    (q31_t)0x739f0c20, (q31_t)0x739c59e5, (q31_t)0x7399a763, (q31_t)0x7396f49a,\n    (q31_t)0x73944189, (q31_t)0x73918e32, (q31_t)0x738eda93, (q31_t)0x738c26ac,\n    (q31_t)0x7389727f, (q31_t)0x7386be0a, (q31_t)0x7384094e, (q31_t)0x7381544a,\n    (q31_t)0x737e9f00, (q31_t)0x737be96e, (q31_t)0x73793395, (q31_t)0x73767d74,\n    (q31_t)0x7373c70d, (q31_t)0x7371105e, (q31_t)0x736e5968, (q31_t)0x736ba22b,\n    (q31_t)0x7368eaa6, (q31_t)0x736632db, (q31_t)0x73637ac8, (q31_t)0x7360c26e,\n    (q31_t)0x735e09cd, (q31_t)0x735b50e4, (q31_t)0x735897b5, (q31_t)0x7355de3e,\n    (q31_t)0x73532481, (q31_t)0x73506a7c, (q31_t)0x734db030, (q31_t)0x734af59d,\n    (q31_t)0x73483ac2, (q31_t)0x73457fa1, (q31_t)0x7342c438, (q31_t)0x73400889,\n    (q31_t)0x733d4c92, (q31_t)0x733a9054, (q31_t)0x7337d3d0, (q31_t)0x73351704,\n    (q31_t)0x733259f1, (q31_t)0x732f9c97, (q31_t)0x732cdef6, (q31_t)0x732a210d,\n    (q31_t)0x732762de, (q31_t)0x7324a468, (q31_t)0x7321e5ab, (q31_t)0x731f26a7,\n    (q31_t)0x731c675b, (q31_t)0x7319a7c9, (q31_t)0x7316e7f0, (q31_t)0x731427cf,\n    (q31_t)0x73116768, (q31_t)0x730ea6ba, (q31_t)0x730be5c5, (q31_t)0x73092489,\n    (q31_t)0x73066306, (q31_t)0x7303a13b, (q31_t)0x7300df2a, (q31_t)0x72fe1cd2,\n    (q31_t)0x72fb5a34, (q31_t)0x72f8974e, (q31_t)0x72f5d421, (q31_t)0x72f310ad,\n    (q31_t)0x72f04cf3, (q31_t)0x72ed88f1, (q31_t)0x72eac4a9, (q31_t)0x72e8001a,\n    (q31_t)0x72e53b44, (q31_t)0x72e27627, (q31_t)0x72dfb0c3, (q31_t)0x72dceb18,\n    (q31_t)0x72da2526, (q31_t)0x72d75eee, (q31_t)0x72d4986f, (q31_t)0x72d1d1a9,\n    (q31_t)0x72cf0a9c, (q31_t)0x72cc4348, (q31_t)0x72c97bad, (q31_t)0x72c6b3cc,\n    (q31_t)0x72c3eba4, (q31_t)0x72c12335, (q31_t)0x72be5a7f, (q31_t)0x72bb9183,\n    (q31_t)0x72b8c83f, (q31_t)0x72b5feb5, (q31_t)0x72b334e4, (q31_t)0x72b06acd,\n    (q31_t)0x72ada06f, (q31_t)0x72aad5c9, (q31_t)0x72a80ade, (q31_t)0x72a53fab,\n    (q31_t)0x72a27432, (q31_t)0x729fa872, (q31_t)0x729cdc6b, (q31_t)0x729a101e,\n    (q31_t)0x7297438a, (q31_t)0x729476af, (q31_t)0x7291a98e, (q31_t)0x728edc26,\n    (q31_t)0x728c0e77, (q31_t)0x72894082, (q31_t)0x72867245, (q31_t)0x7283a3c3,\n    (q31_t)0x7280d4f9, (q31_t)0x727e05e9, (q31_t)0x727b3693, (q31_t)0x727866f6,\n    (q31_t)0x72759712, (q31_t)0x7272c6e7, (q31_t)0x726ff676, (q31_t)0x726d25bf,\n    (q31_t)0x726a54c1, (q31_t)0x7267837c, (q31_t)0x7264b1f0, (q31_t)0x7261e01e,\n    (q31_t)0x725f0e06, (q31_t)0x725c3ba7, (q31_t)0x72596901, (q31_t)0x72569615,\n    (q31_t)0x7253c2e3, (q31_t)0x7250ef6a, (q31_t)0x724e1baa, (q31_t)0x724b47a4,\n    (q31_t)0x72487357, (q31_t)0x72459ec4, (q31_t)0x7242c9ea, (q31_t)0x723ff4ca,\n    (q31_t)0x723d1f63, (q31_t)0x723a49b6, (q31_t)0x723773c3, (q31_t)0x72349d89,\n    (q31_t)0x7231c708, (q31_t)0x722ef041, (q31_t)0x722c1934, (q31_t)0x722941e0,\n    (q31_t)0x72266a46, (q31_t)0x72239266, (q31_t)0x7220ba3f, (q31_t)0x721de1d1,\n    (q31_t)0x721b091d, (q31_t)0x72183023, (q31_t)0x721556e3, (q31_t)0x72127d5c,\n    (q31_t)0x720fa38e, (q31_t)0x720cc97b, (q31_t)0x7209ef21, (q31_t)0x72071480,\n    (q31_t)0x7204399a, (q31_t)0x72015e6d, (q31_t)0x71fe82f9, (q31_t)0x71fba740,\n    (q31_t)0x71f8cb40, (q31_t)0x71f5eefa, (q31_t)0x71f3126d, (q31_t)0x71f0359a,\n    (q31_t)0x71ed5881, (q31_t)0x71ea7b22, (q31_t)0x71e79d7c, (q31_t)0x71e4bf90,\n    (q31_t)0x71e1e15e, (q31_t)0x71df02e5, (q31_t)0x71dc2427, (q31_t)0x71d94522,\n    (q31_t)0x71d665d6, (q31_t)0x71d38645, (q31_t)0x71d0a66d, (q31_t)0x71cdc650,\n    (q31_t)0x71cae5ec, (q31_t)0x71c80542, (q31_t)0x71c52451, (q31_t)0x71c2431b,\n    (q31_t)0x71bf619e, (q31_t)0x71bc7fdb, (q31_t)0x71b99dd2, (q31_t)0x71b6bb83,\n    (q31_t)0x71b3d8ed, (q31_t)0x71b0f612, (q31_t)0x71ae12f0, (q31_t)0x71ab2f89,\n    (q31_t)0x71a84bdb, (q31_t)0x71a567e7, (q31_t)0x71a283ad, (q31_t)0x719f9f2c,\n    (q31_t)0x719cba66, (q31_t)0x7199d55a, (q31_t)0x7196f008, (q31_t)0x71940a6f,\n    (q31_t)0x71912490, (q31_t)0x718e3e6c, (q31_t)0x718b5801, (q31_t)0x71887151,\n    (q31_t)0x71858a5a, (q31_t)0x7182a31d, (q31_t)0x717fbb9a, (q31_t)0x717cd3d2,\n    (q31_t)0x7179ebc3, (q31_t)0x7177036e, (q31_t)0x71741ad3, (q31_t)0x717131f3,\n    (q31_t)0x716e48cc, (q31_t)0x716b5f5f, (q31_t)0x716875ad, (q31_t)0x71658bb4,\n    (q31_t)0x7162a175, (q31_t)0x715fb6f1, (q31_t)0x715ccc26, (q31_t)0x7159e116,\n    (q31_t)0x7156f5c0, (q31_t)0x71540a24, (q31_t)0x71511e42, (q31_t)0x714e321a,\n    (q31_t)0x714b45ac, (q31_t)0x714858f8, (q31_t)0x71456bfe, (q31_t)0x71427ebf,\n    (q31_t)0x713f9139, (q31_t)0x713ca36e, (q31_t)0x7139b55d, (q31_t)0x7136c706,\n    (q31_t)0x7133d869, (q31_t)0x7130e987, (q31_t)0x712dfa5e, (q31_t)0x712b0af0,\n    (q31_t)0x71281b3c, (q31_t)0x71252b42, (q31_t)0x71223b02, (q31_t)0x711f4a7d,\n    (q31_t)0x711c59b2, (q31_t)0x711968a1, (q31_t)0x7116774a, (q31_t)0x711385ad,\n    (q31_t)0x711093cb, (q31_t)0x710da1a3, (q31_t)0x710aaf35, (q31_t)0x7107bc82,\n    (q31_t)0x7104c989, (q31_t)0x7101d64a, (q31_t)0x70fee2c5, (q31_t)0x70fbeefb,\n    (q31_t)0x70f8faeb, (q31_t)0x70f60695, (q31_t)0x70f311fa, (q31_t)0x70f01d19,\n    (q31_t)0x70ed27f2, (q31_t)0x70ea3286, (q31_t)0x70e73cd4, (q31_t)0x70e446dc,\n    (q31_t)0x70e1509f, (q31_t)0x70de5a1c, (q31_t)0x70db6353, (q31_t)0x70d86c45,\n    (q31_t)0x70d574f1, (q31_t)0x70d27d58, (q31_t)0x70cf8579, (q31_t)0x70cc8d54,\n    (q31_t)0x70c994ea, (q31_t)0x70c69c3a, (q31_t)0x70c3a345, (q31_t)0x70c0aa0a,\n    (q31_t)0x70bdb08a, (q31_t)0x70bab6c4, (q31_t)0x70b7bcb8, (q31_t)0x70b4c267,\n    (q31_t)0x70b1c7d1, (q31_t)0x70aeccf5, (q31_t)0x70abd1d3, (q31_t)0x70a8d66c,\n    (q31_t)0x70a5dac0, (q31_t)0x70a2dece, (q31_t)0x709fe296, (q31_t)0x709ce619,\n    (q31_t)0x7099e957, (q31_t)0x7096ec4f, (q31_t)0x7093ef01, (q31_t)0x7090f16e,\n    (q31_t)0x708df396, (q31_t)0x708af579, (q31_t)0x7087f715, (q31_t)0x7084f86d,\n    (q31_t)0x7081f97f, (q31_t)0x707efa4c, (q31_t)0x707bfad3, (q31_t)0x7078fb15,\n    (q31_t)0x7075fb11, (q31_t)0x7072fac9, (q31_t)0x706ffa3a, (q31_t)0x706cf967,\n    (q31_t)0x7069f84e, (q31_t)0x7066f6f0, (q31_t)0x7063f54c, (q31_t)0x7060f363,\n    (q31_t)0x705df135, (q31_t)0x705aeec1, (q31_t)0x7057ec08, (q31_t)0x7054e90a,\n    (q31_t)0x7051e5c7, (q31_t)0x704ee23e, (q31_t)0x704bde70, (q31_t)0x7048da5d,\n    (q31_t)0x7045d604, (q31_t)0x7042d166, (q31_t)0x703fcc83, (q31_t)0x703cc75b,\n    (q31_t)0x7039c1ed, (q31_t)0x7036bc3b, (q31_t)0x7033b643, (q31_t)0x7030b005,\n    (q31_t)0x702da983, (q31_t)0x702aa2bb, (q31_t)0x70279baf, (q31_t)0x7024945d,\n    (q31_t)0x70218cc6, (q31_t)0x701e84e9, (q31_t)0x701b7cc8, (q31_t)0x70187461,\n    (q31_t)0x70156bb5, (q31_t)0x701262c4, (q31_t)0x700f598e, (q31_t)0x700c5013,\n    (q31_t)0x70094653, (q31_t)0x70063c4e, (q31_t)0x70033203, (q31_t)0x70002774,\n    (q31_t)0x6ffd1c9f, (q31_t)0x6ffa1185, (q31_t)0x6ff70626, (q31_t)0x6ff3fa82,\n    (q31_t)0x6ff0ee99, (q31_t)0x6fede26b, (q31_t)0x6fead5f8, (q31_t)0x6fe7c940,\n    (q31_t)0x6fe4bc43, (q31_t)0x6fe1af01, (q31_t)0x6fdea17a, (q31_t)0x6fdb93ae,\n    (q31_t)0x6fd8859d, (q31_t)0x6fd57746, (q31_t)0x6fd268ab, (q31_t)0x6fcf59cb,\n    (q31_t)0x6fcc4aa6, (q31_t)0x6fc93b3c, (q31_t)0x6fc62b8d, (q31_t)0x6fc31b99,\n    (q31_t)0x6fc00b60, (q31_t)0x6fbcfae2, (q31_t)0x6fb9ea20, (q31_t)0x6fb6d918,\n    (q31_t)0x6fb3c7cb, (q31_t)0x6fb0b63a, (q31_t)0x6fada464, (q31_t)0x6faa9248,\n    (q31_t)0x6fa77fe8, (q31_t)0x6fa46d43, (q31_t)0x6fa15a59, (q31_t)0x6f9e472b,\n    (q31_t)0x6f9b33b7, (q31_t)0x6f981fff, (q31_t)0x6f950c01, (q31_t)0x6f91f7bf,\n    (q31_t)0x6f8ee338, (q31_t)0x6f8bce6c, (q31_t)0x6f88b95c, (q31_t)0x6f85a407,\n    (q31_t)0x6f828e6c, (q31_t)0x6f7f788d, (q31_t)0x6f7c626a, (q31_t)0x6f794c01,\n    (q31_t)0x6f763554, (q31_t)0x6f731e62, (q31_t)0x6f70072b, (q31_t)0x6f6cefb0,\n    (q31_t)0x6f69d7f0, (q31_t)0x6f66bfeb, (q31_t)0x6f63a7a1, (q31_t)0x6f608f13,\n    (q31_t)0x6f5d7640, (q31_t)0x6f5a5d28, (q31_t)0x6f5743cb, (q31_t)0x6f542a2a,\n    (q31_t)0x6f511044, (q31_t)0x6f4df61a, (q31_t)0x6f4adbab, (q31_t)0x6f47c0f7,\n    (q31_t)0x6f44a5ff, (q31_t)0x6f418ac2, (q31_t)0x6f3e6f40, (q31_t)0x6f3b537a,\n    (q31_t)0x6f38376f, (q31_t)0x6f351b1f, (q31_t)0x6f31fe8b, (q31_t)0x6f2ee1b2,\n    (q31_t)0x6f2bc495, (q31_t)0x6f28a733, (q31_t)0x6f25898d, (q31_t)0x6f226ba2,\n    (q31_t)0x6f1f4d72, (q31_t)0x6f1c2efe, (q31_t)0x6f191045, (q31_t)0x6f15f148,\n    (q31_t)0x6f12d206, (q31_t)0x6f0fb280, (q31_t)0x6f0c92b6, (q31_t)0x6f0972a6,\n    (q31_t)0x6f065253, (q31_t)0x6f0331ba, (q31_t)0x6f0010de, (q31_t)0x6efcefbd,\n    (q31_t)0x6ef9ce57, (q31_t)0x6ef6acad, (q31_t)0x6ef38abe, (q31_t)0x6ef0688b,\n    (q31_t)0x6eed4614, (q31_t)0x6eea2358, (q31_t)0x6ee70058, (q31_t)0x6ee3dd13,\n    (q31_t)0x6ee0b98a, (q31_t)0x6edd95bd, (q31_t)0x6eda71ab, (q31_t)0x6ed74d55,\n    (q31_t)0x6ed428ba, (q31_t)0x6ed103db, (q31_t)0x6ecddeb8, (q31_t)0x6ecab950,\n    (q31_t)0x6ec793a4, (q31_t)0x6ec46db4, (q31_t)0x6ec1477f, (q31_t)0x6ebe2106,\n    (q31_t)0x6ebafa49, (q31_t)0x6eb7d347, (q31_t)0x6eb4ac02, (q31_t)0x6eb18477,\n    (q31_t)0x6eae5ca9, (q31_t)0x6eab3496, (q31_t)0x6ea80c3f, (q31_t)0x6ea4e3a4,\n    (q31_t)0x6ea1bac4, (q31_t)0x6e9e91a1, (q31_t)0x6e9b6839, (q31_t)0x6e983e8d,\n    (q31_t)0x6e95149c, (q31_t)0x6e91ea67, (q31_t)0x6e8ebfef, (q31_t)0x6e8b9532,\n    (q31_t)0x6e886a30, (q31_t)0x6e853eeb, (q31_t)0x6e821361, (q31_t)0x6e7ee794,\n    (q31_t)0x6e7bbb82, (q31_t)0x6e788f2c, (q31_t)0x6e756291, (q31_t)0x6e7235b3,\n    (q31_t)0x6e6f0890, (q31_t)0x6e6bdb2a, (q31_t)0x6e68ad7f, (q31_t)0x6e657f90,\n    (q31_t)0x6e62515d, (q31_t)0x6e5f22e6, (q31_t)0x6e5bf42b, (q31_t)0x6e58c52c,\n    (q31_t)0x6e5595e9, (q31_t)0x6e526662, (q31_t)0x6e4f3696, (q31_t)0x6e4c0687,\n    (q31_t)0x6e48d633, (q31_t)0x6e45a59c, (q31_t)0x6e4274c1, (q31_t)0x6e3f43a1,\n    (q31_t)0x6e3c123e, (q31_t)0x6e38e096, (q31_t)0x6e35aeab, (q31_t)0x6e327c7b,\n    (q31_t)0x6e2f4a08, (q31_t)0x6e2c1750, (q31_t)0x6e28e455, (q31_t)0x6e25b115,\n    (q31_t)0x6e227d92, (q31_t)0x6e1f49cb, (q31_t)0x6e1c15c0, (q31_t)0x6e18e171,\n    (q31_t)0x6e15acde, (q31_t)0x6e127807, (q31_t)0x6e0f42ec, (q31_t)0x6e0c0d8e,\n    (q31_t)0x6e08d7eb, (q31_t)0x6e05a205, (q31_t)0x6e026bda, (q31_t)0x6dff356c,\n    (q31_t)0x6dfbfeba, (q31_t)0x6df8c7c4, (q31_t)0x6df5908b, (q31_t)0x6df2590d,\n    (q31_t)0x6def214c, (q31_t)0x6debe947, (q31_t)0x6de8b0fe, (q31_t)0x6de57871,\n    (q31_t)0x6de23fa0, (q31_t)0x6ddf068c, (q31_t)0x6ddbcd34, (q31_t)0x6dd89398,\n    (q31_t)0x6dd559b9, (q31_t)0x6dd21f95, (q31_t)0x6dcee52e, (q31_t)0x6dcbaa83,\n    (q31_t)0x6dc86f95, (q31_t)0x6dc53462, (q31_t)0x6dc1f8ec, (q31_t)0x6dbebd33,\n    (q31_t)0x6dbb8135, (q31_t)0x6db844f4, (q31_t)0x6db5086f, (q31_t)0x6db1cba7,\n    (q31_t)0x6dae8e9b, (q31_t)0x6dab514b, (q31_t)0x6da813b8, (q31_t)0x6da4d5e1,\n    (q31_t)0x6da197c6, (q31_t)0x6d9e5968, (q31_t)0x6d9b1ac6, (q31_t)0x6d97dbe0,\n    (q31_t)0x6d949cb7, (q31_t)0x6d915d4a, (q31_t)0x6d8e1d9a, (q31_t)0x6d8adda6,\n    (q31_t)0x6d879d6e, (q31_t)0x6d845cf3, (q31_t)0x6d811c35, (q31_t)0x6d7ddb33,\n    (q31_t)0x6d7a99ed, (q31_t)0x6d775864, (q31_t)0x6d741697, (q31_t)0x6d70d487,\n    (q31_t)0x6d6d9233, (q31_t)0x6d6a4f9c, (q31_t)0x6d670cc1, (q31_t)0x6d63c9a3,\n    (q31_t)0x6d608641, (q31_t)0x6d5d429c, (q31_t)0x6d59feb3, (q31_t)0x6d56ba87,\n    (q31_t)0x6d537617, (q31_t)0x6d503164, (q31_t)0x6d4cec6e, (q31_t)0x6d49a734,\n    (q31_t)0x6d4661b7, (q31_t)0x6d431bf6, (q31_t)0x6d3fd5f2, (q31_t)0x6d3c8fab,\n    (q31_t)0x6d394920, (q31_t)0x6d360252, (q31_t)0x6d32bb40, (q31_t)0x6d2f73eb,\n    (q31_t)0x6d2c2c53, (q31_t)0x6d28e477, (q31_t)0x6d259c58, (q31_t)0x6d2253f6,\n    (q31_t)0x6d1f0b50, (q31_t)0x6d1bc267, (q31_t)0x6d18793b, (q31_t)0x6d152fcc,\n    (q31_t)0x6d11e619, (q31_t)0x6d0e9c23, (q31_t)0x6d0b51e9, (q31_t)0x6d08076d,\n    (q31_t)0x6d04bcad, (q31_t)0x6d0171aa, (q31_t)0x6cfe2663, (q31_t)0x6cfadada,\n    (q31_t)0x6cf78f0d, (q31_t)0x6cf442fd, (q31_t)0x6cf0f6aa, (q31_t)0x6cedaa13,\n    (q31_t)0x6cea5d3a, (q31_t)0x6ce7101d, (q31_t)0x6ce3c2bd, (q31_t)0x6ce0751a,\n    (q31_t)0x6cdd2733, (q31_t)0x6cd9d90a, (q31_t)0x6cd68a9d, (q31_t)0x6cd33bed,\n    (q31_t)0x6ccfecfa, (q31_t)0x6ccc9dc4, (q31_t)0x6cc94e4b, (q31_t)0x6cc5fe8f,\n    (q31_t)0x6cc2ae90, (q31_t)0x6cbf5e4d, (q31_t)0x6cbc0dc8, (q31_t)0x6cb8bcff,\n    (q31_t)0x6cb56bf4, (q31_t)0x6cb21aa5, (q31_t)0x6caec913, (q31_t)0x6cab773e,\n    (q31_t)0x6ca82527, (q31_t)0x6ca4d2cc, (q31_t)0x6ca1802e, (q31_t)0x6c9e2d4d,\n    (q31_t)0x6c9ada29, (q31_t)0x6c9786c2, (q31_t)0x6c943318, (q31_t)0x6c90df2c,\n    (q31_t)0x6c8d8afc, (q31_t)0x6c8a3689, (q31_t)0x6c86e1d3, (q31_t)0x6c838cdb,\n    (q31_t)0x6c80379f, (q31_t)0x6c7ce220, (q31_t)0x6c798c5f, (q31_t)0x6c76365b,\n    (q31_t)0x6c72e013, (q31_t)0x6c6f8989, (q31_t)0x6c6c32bc, (q31_t)0x6c68dbac,\n    (q31_t)0x6c658459, (q31_t)0x6c622cc4, (q31_t)0x6c5ed4eb, (q31_t)0x6c5b7cd0,\n    (q31_t)0x6c582472, (q31_t)0x6c54cbd1, (q31_t)0x6c5172ed, (q31_t)0x6c4e19c6,\n    (q31_t)0x6c4ac05d, (q31_t)0x6c4766b0, (q31_t)0x6c440cc1, (q31_t)0x6c40b28f,\n    (q31_t)0x6c3d581b, (q31_t)0x6c39fd63, (q31_t)0x6c36a269, (q31_t)0x6c33472c,\n    (q31_t)0x6c2febad, (q31_t)0x6c2c8fea, (q31_t)0x6c2933e5, (q31_t)0x6c25d79d,\n    (q31_t)0x6c227b13, (q31_t)0x6c1f1e45, (q31_t)0x6c1bc136, (q31_t)0x6c1863e3,\n    (q31_t)0x6c15064e, (q31_t)0x6c11a876, (q31_t)0x6c0e4a5b, (q31_t)0x6c0aebfe,\n    (q31_t)0x6c078d5e, (q31_t)0x6c042e7b, (q31_t)0x6c00cf56, (q31_t)0x6bfd6fee,\n    (q31_t)0x6bfa1044, (q31_t)0x6bf6b056, (q31_t)0x6bf35027, (q31_t)0x6befefb5,\n    (q31_t)0x6bec8f00, (q31_t)0x6be92e08, (q31_t)0x6be5ccce, (q31_t)0x6be26b52,\n    (q31_t)0x6bdf0993, (q31_t)0x6bdba791, (q31_t)0x6bd8454d, (q31_t)0x6bd4e2c6,\n    (q31_t)0x6bd17ffd, (q31_t)0x6bce1cf1, (q31_t)0x6bcab9a3, (q31_t)0x6bc75613,\n    (q31_t)0x6bc3f23f, (q31_t)0x6bc08e2a, (q31_t)0x6bbd29d2, (q31_t)0x6bb9c537,\n    (q31_t)0x6bb6605a, (q31_t)0x6bb2fb3b, (q31_t)0x6baf95d9, (q31_t)0x6bac3034,\n    (q31_t)0x6ba8ca4e, (q31_t)0x6ba56425, (q31_t)0x6ba1fdb9, (q31_t)0x6b9e970b,\n    (q31_t)0x6b9b301b, (q31_t)0x6b97c8e8, (q31_t)0x6b946173, (q31_t)0x6b90f9bc,\n    (q31_t)0x6b8d91c2, (q31_t)0x6b8a2986, (q31_t)0x6b86c107, (q31_t)0x6b835846,\n    (q31_t)0x6b7fef43, (q31_t)0x6b7c85fe, (q31_t)0x6b791c76, (q31_t)0x6b75b2ac,\n    (q31_t)0x6b7248a0, (q31_t)0x6b6ede51, (q31_t)0x6b6b73c0, (q31_t)0x6b6808ed,\n    (q31_t)0x6b649dd8, (q31_t)0x6b613280, (q31_t)0x6b5dc6e6, (q31_t)0x6b5a5b0a,\n    (q31_t)0x6b56eeec, (q31_t)0x6b53828b, (q31_t)0x6b5015e9, (q31_t)0x6b4ca904,\n    (q31_t)0x6b493bdd, (q31_t)0x6b45ce73, (q31_t)0x6b4260c8, (q31_t)0x6b3ef2da,\n    (q31_t)0x6b3b84ab, (q31_t)0x6b381639, (q31_t)0x6b34a785, (q31_t)0x6b31388e,\n    (q31_t)0x6b2dc956, (q31_t)0x6b2a59dc, (q31_t)0x6b26ea1f, (q31_t)0x6b237a21,\n    (q31_t)0x6b2009e0, (q31_t)0x6b1c995d, (q31_t)0x6b192898, (q31_t)0x6b15b791,\n    (q31_t)0x6b124648, (q31_t)0x6b0ed4bd, (q31_t)0x6b0b62f0, (q31_t)0x6b07f0e1,\n    (q31_t)0x6b047e90, (q31_t)0x6b010bfd, (q31_t)0x6afd9928, (q31_t)0x6afa2610,\n    (q31_t)0x6af6b2b7, (q31_t)0x6af33f1c, (q31_t)0x6aefcb3f, (q31_t)0x6aec5720,\n    (q31_t)0x6ae8e2bf, (q31_t)0x6ae56e1c, (q31_t)0x6ae1f937, (q31_t)0x6ade8410,\n    (q31_t)0x6adb0ea8, (q31_t)0x6ad798fd, (q31_t)0x6ad42311, (q31_t)0x6ad0ace2,\n    (q31_t)0x6acd3672, (q31_t)0x6ac9bfc0, (q31_t)0x6ac648cb, (q31_t)0x6ac2d195,\n    (q31_t)0x6abf5a1e, (q31_t)0x6abbe264, (q31_t)0x6ab86a68, (q31_t)0x6ab4f22b,\n    (q31_t)0x6ab179ac, (q31_t)0x6aae00eb, (q31_t)0x6aaa87e8, (q31_t)0x6aa70ea4,\n    (q31_t)0x6aa3951d, (q31_t)0x6aa01b55, (q31_t)0x6a9ca14b, (q31_t)0x6a992700,\n    (q31_t)0x6a95ac72, (q31_t)0x6a9231a3, (q31_t)0x6a8eb692, (q31_t)0x6a8b3b3f,\n    (q31_t)0x6a87bfab, (q31_t)0x6a8443d5, (q31_t)0x6a80c7bd, (q31_t)0x6a7d4b64,\n    (q31_t)0x6a79cec8, (q31_t)0x6a7651ec, (q31_t)0x6a72d4cd, (q31_t)0x6a6f576d,\n    (q31_t)0x6a6bd9cb, (q31_t)0x6a685be8, (q31_t)0x6a64ddc2, (q31_t)0x6a615f5c,\n    (q31_t)0x6a5de0b3, (q31_t)0x6a5a61c9, (q31_t)0x6a56e29e, (q31_t)0x6a536331,\n    (q31_t)0x6a4fe382, (q31_t)0x6a4c6391, (q31_t)0x6a48e360, (q31_t)0x6a4562ec,\n    (q31_t)0x6a41e237, (q31_t)0x6a3e6140, (q31_t)0x6a3ae008, (q31_t)0x6a375e8f,\n    (q31_t)0x6a33dcd4, (q31_t)0x6a305ad7, (q31_t)0x6a2cd899, (q31_t)0x6a295619,\n    (q31_t)0x6a25d358, (q31_t)0x6a225055, (q31_t)0x6a1ecd11, (q31_t)0x6a1b498c,\n    (q31_t)0x6a17c5c5, (q31_t)0x6a1441bc, (q31_t)0x6a10bd72, (q31_t)0x6a0d38e7,\n    (q31_t)0x6a09b41a, (q31_t)0x6a062f0c, (q31_t)0x6a02a9bc, (q31_t)0x69ff242b,\n    (q31_t)0x69fb9e59, (q31_t)0x69f81845, (q31_t)0x69f491f0, (q31_t)0x69f10b5a,\n    (q31_t)0x69ed8482, (q31_t)0x69e9fd69, (q31_t)0x69e6760f, (q31_t)0x69e2ee73,\n    (q31_t)0x69df6696, (q31_t)0x69dbde77, (q31_t)0x69d85618, (q31_t)0x69d4cd77,\n    (q31_t)0x69d14494, (q31_t)0x69cdbb71, (q31_t)0x69ca320c, (q31_t)0x69c6a866,\n    (q31_t)0x69c31e7f, (q31_t)0x69bf9456, (q31_t)0x69bc09ec, (q31_t)0x69b87f41,\n    (q31_t)0x69b4f455, (q31_t)0x69b16928, (q31_t)0x69adddb9, (q31_t)0x69aa5209,\n    (q31_t)0x69a6c618, (q31_t)0x69a339e6, (q31_t)0x699fad73, (q31_t)0x699c20be,\n    (q31_t)0x699893c9, (q31_t)0x69950692, (q31_t)0x6991791a, (q31_t)0x698deb61,\n    (q31_t)0x698a5d67, (q31_t)0x6986cf2c, (q31_t)0x698340af, (q31_t)0x697fb1f2,\n    (q31_t)0x697c22f3, (q31_t)0x697893b4, (q31_t)0x69750433, (q31_t)0x69717472,\n    (q31_t)0x696de46f, (q31_t)0x696a542b, (q31_t)0x6966c3a6, (q31_t)0x696332e1,\n    (q31_t)0x695fa1da, (q31_t)0x695c1092, (q31_t)0x69587f09, (q31_t)0x6954ed40,\n    (q31_t)0x69515b35, (q31_t)0x694dc8e9, (q31_t)0x694a365c, (q31_t)0x6946a38f,\n    (q31_t)0x69431080, (q31_t)0x693f7d31, (q31_t)0x693be9a0, (q31_t)0x693855cf,\n    (q31_t)0x6934c1bd, (q31_t)0x69312d6a, (q31_t)0x692d98d6, (q31_t)0x692a0401,\n    (q31_t)0x69266eeb, (q31_t)0x6922d995, (q31_t)0x691f43fd, (q31_t)0x691bae25,\n    (q31_t)0x6918180c, (q31_t)0x691481b2, (q31_t)0x6910eb17, (q31_t)0x690d543b,\n    (q31_t)0x6909bd1f, (q31_t)0x690625c2, (q31_t)0x69028e24, (q31_t)0x68fef645,\n    (q31_t)0x68fb5e25, (q31_t)0x68f7c5c5, (q31_t)0x68f42d24, (q31_t)0x68f09442,\n    (q31_t)0x68ecfb20, (q31_t)0x68e961bd, (q31_t)0x68e5c819, (q31_t)0x68e22e34,\n    (q31_t)0x68de940f, (q31_t)0x68daf9a9, (q31_t)0x68d75f02, (q31_t)0x68d3c41b,\n    (q31_t)0x68d028f2, (q31_t)0x68cc8d8a, (q31_t)0x68c8f1e0, (q31_t)0x68c555f6,\n    (q31_t)0x68c1b9cc, (q31_t)0x68be1d61, (q31_t)0x68ba80b5, (q31_t)0x68b6e3c8,\n    (q31_t)0x68b3469b, (q31_t)0x68afa92e, (q31_t)0x68ac0b7f, (q31_t)0x68a86d91,\n    (q31_t)0x68a4cf61, (q31_t)0x68a130f1, (q31_t)0x689d9241, (q31_t)0x6899f350,\n    (q31_t)0x6896541f, (q31_t)0x6892b4ad, (q31_t)0x688f14fa, (q31_t)0x688b7507,\n    (q31_t)0x6887d4d4, (q31_t)0x68843460, (q31_t)0x688093ab, (q31_t)0x687cf2b6,\n    (q31_t)0x68795181, (q31_t)0x6875b00b, (q31_t)0x68720e55, (q31_t)0x686e6c5e,\n    (q31_t)0x686aca27, (q31_t)0x686727b0, (q31_t)0x686384f8, (q31_t)0x685fe200,\n    (q31_t)0x685c3ec7, (q31_t)0x68589b4e, (q31_t)0x6854f795, (q31_t)0x6851539b,\n    (q31_t)0x684daf61, (q31_t)0x684a0ae6, (q31_t)0x6846662c, (q31_t)0x6842c131,\n    (q31_t)0x683f1bf5, (q31_t)0x683b7679, (q31_t)0x6837d0bd, (q31_t)0x68342ac1,\n    (q31_t)0x68308485, (q31_t)0x682cde08, (q31_t)0x6829374b, (q31_t)0x6825904d,\n    (q31_t)0x6821e910, (q31_t)0x681e4192, (q31_t)0x681a99d4, (q31_t)0x6816f1d6,\n    (q31_t)0x68134997, (q31_t)0x680fa118, (q31_t)0x680bf85a, (q31_t)0x68084f5a,\n    (q31_t)0x6804a61b, (q31_t)0x6800fc9c, (q31_t)0x67fd52dc, (q31_t)0x67f9a8dd,\n    (q31_t)0x67f5fe9d, (q31_t)0x67f2541d, (q31_t)0x67eea95d, (q31_t)0x67eafe5d,\n    (q31_t)0x67e7531c, (q31_t)0x67e3a79c, (q31_t)0x67dffbdc, (q31_t)0x67dc4fdb,\n    (q31_t)0x67d8a39a, (q31_t)0x67d4f71a, (q31_t)0x67d14a59, (q31_t)0x67cd9d58,\n    (q31_t)0x67c9f017, (q31_t)0x67c64297, (q31_t)0x67c294d6, (q31_t)0x67bee6d5,\n    (q31_t)0x67bb3894, (q31_t)0x67b78a13, (q31_t)0x67b3db53, (q31_t)0x67b02c52,\n    (q31_t)0x67ac7d11, (q31_t)0x67a8cd91, (q31_t)0x67a51dd0, (q31_t)0x67a16dcf,\n    (q31_t)0x679dbd8f, (q31_t)0x679a0d0f, (q31_t)0x67965c4e, (q31_t)0x6792ab4e,\n    (q31_t)0x678efa0e, (q31_t)0x678b488e, (q31_t)0x678796ce, (q31_t)0x6783e4cf,\n    (q31_t)0x6780328f, (q31_t)0x677c8010, (q31_t)0x6778cd50, (q31_t)0x67751a51,\n    (q31_t)0x67716713, (q31_t)0x676db394, (q31_t)0x6769ffd5, (q31_t)0x67664bd7,\n    (q31_t)0x67629799, (q31_t)0x675ee31b, (q31_t)0x675b2e5e, (q31_t)0x67577960,\n    (q31_t)0x6753c423, (q31_t)0x67500ea7, (q31_t)0x674c58ea, (q31_t)0x6748a2ee,\n    (q31_t)0x6744ecb2, (q31_t)0x67413636, (q31_t)0x673d7f7b, (q31_t)0x6739c880,\n    (q31_t)0x67361145, (q31_t)0x673259ca, (q31_t)0x672ea210, (q31_t)0x672aea17,\n    (q31_t)0x672731dd, (q31_t)0x67237964, (q31_t)0x671fc0ac, (q31_t)0x671c07b4,\n    (q31_t)0x67184e7c, (q31_t)0x67149504, (q31_t)0x6710db4d, (q31_t)0x670d2157,\n    (q31_t)0x67096721, (q31_t)0x6705acab, (q31_t)0x6701f1f6, (q31_t)0x66fe3701,\n    (q31_t)0x66fa7bcd, (q31_t)0x66f6c059, (q31_t)0x66f304a6, (q31_t)0x66ef48b3,\n    (q31_t)0x66eb8c80, (q31_t)0x66e7d00f, (q31_t)0x66e4135d, (q31_t)0x66e0566c,\n    (q31_t)0x66dc993c, (q31_t)0x66d8dbcd, (q31_t)0x66d51e1d, (q31_t)0x66d1602f,\n    (q31_t)0x66cda201, (q31_t)0x66c9e393, (q31_t)0x66c624e7, (q31_t)0x66c265fa,\n    (q31_t)0x66bea6cf, (q31_t)0x66bae764, (q31_t)0x66b727ba, (q31_t)0x66b367d0,\n    (q31_t)0x66afa7a7, (q31_t)0x66abe73f, (q31_t)0x66a82697, (q31_t)0x66a465b0,\n    (q31_t)0x66a0a489, (q31_t)0x669ce324, (q31_t)0x6699217f, (q31_t)0x66955f9b,\n    (q31_t)0x66919d77, (q31_t)0x668ddb14, (q31_t)0x668a1872, (q31_t)0x66865591,\n    (q31_t)0x66829270, (q31_t)0x667ecf11, (q31_t)0x667b0b72, (q31_t)0x66774793,\n    (q31_t)0x66738376, (q31_t)0x666fbf19, (q31_t)0x666bfa7d, (q31_t)0x666835a2,\n    (q31_t)0x66647088, (q31_t)0x6660ab2f, (q31_t)0x665ce596, (q31_t)0x66591fbf,\n    (q31_t)0x665559a8, (q31_t)0x66519352, (q31_t)0x664dccbd, (q31_t)0x664a05e9,\n    (q31_t)0x66463ed6, (q31_t)0x66427784, (q31_t)0x663eaff2, (q31_t)0x663ae822,\n    (q31_t)0x66372012, (q31_t)0x663357c4, (q31_t)0x662f8f36, (q31_t)0x662bc66a,\n    (q31_t)0x6627fd5e, (q31_t)0x66243413, (q31_t)0x66206a8a, (q31_t)0x661ca0c1,\n    (q31_t)0x6618d6b9, (q31_t)0x66150c73, (q31_t)0x661141ed, (q31_t)0x660d7729,\n    (q31_t)0x6609ac25, (q31_t)0x6605e0e3, (q31_t)0x66021561, (q31_t)0x65fe49a1,\n    (q31_t)0x65fa7da2, (q31_t)0x65f6b164, (q31_t)0x65f2e4e7, (q31_t)0x65ef182b,\n    (q31_t)0x65eb4b30, (q31_t)0x65e77df6, (q31_t)0x65e3b07e, (q31_t)0x65dfe2c6,\n    (q31_t)0x65dc14d0, (q31_t)0x65d8469b, (q31_t)0x65d47827, (q31_t)0x65d0a975,\n    (q31_t)0x65ccda83, (q31_t)0x65c90b53, (q31_t)0x65c53be4, (q31_t)0x65c16c36,\n    (q31_t)0x65bd9c49, (q31_t)0x65b9cc1e, (q31_t)0x65b5fbb4, (q31_t)0x65b22b0b,\n    (q31_t)0x65ae5a23, (q31_t)0x65aa88fd, (q31_t)0x65a6b798, (q31_t)0x65a2e5f4,\n    (q31_t)0x659f1412, (q31_t)0x659b41f1, (q31_t)0x65976f91, (q31_t)0x65939cf3,\n    (q31_t)0x658fca15, (q31_t)0x658bf6fa, (q31_t)0x6588239f, (q31_t)0x65845006,\n    (q31_t)0x65807c2f, (q31_t)0x657ca818, (q31_t)0x6578d3c4, (q31_t)0x6574ff30,\n    (q31_t)0x65712a5e, (q31_t)0x656d554d, (q31_t)0x65697ffe, (q31_t)0x6565aa71,\n    (q31_t)0x6561d4a4, (q31_t)0x655dfe99, (q31_t)0x655a2850, (q31_t)0x655651c8,\n    (q31_t)0x65527b02, (q31_t)0x654ea3fd, (q31_t)0x654accba, (q31_t)0x6546f538,\n    (q31_t)0x65431d77, (q31_t)0x653f4579, (q31_t)0x653b6d3b, (q31_t)0x653794c0,\n    (q31_t)0x6533bc06, (q31_t)0x652fe30d, (q31_t)0x652c09d6, (q31_t)0x65283061,\n    (q31_t)0x652456ad, (q31_t)0x65207cbb, (q31_t)0x651ca28a, (q31_t)0x6518c81b,\n    (q31_t)0x6514ed6e, (q31_t)0x65111283, (q31_t)0x650d3759, (q31_t)0x65095bf0,\n    (q31_t)0x6505804a, (q31_t)0x6501a465, (q31_t)0x64fdc841, (q31_t)0x64f9ebe0,\n    (q31_t)0x64f60f40, (q31_t)0x64f23262, (q31_t)0x64ee5546, (q31_t)0x64ea77eb,\n    (q31_t)0x64e69a52, (q31_t)0x64e2bc7b, (q31_t)0x64dede66, (q31_t)0x64db0012,\n    (q31_t)0x64d72180, (q31_t)0x64d342b0, (q31_t)0x64cf63a2, (q31_t)0x64cb8456,\n    (q31_t)0x64c7a4cb, (q31_t)0x64c3c502, (q31_t)0x64bfe4fc, (q31_t)0x64bc04b6,\n    (q31_t)0x64b82433, (q31_t)0x64b44372, (q31_t)0x64b06273, (q31_t)0x64ac8135,\n    (q31_t)0x64a89fba, (q31_t)0x64a4be00, (q31_t)0x64a0dc08, (q31_t)0x649cf9d2,\n    (q31_t)0x6499175e, (q31_t)0x649534ac, (q31_t)0x649151bc, (q31_t)0x648d6e8e,\n    (q31_t)0x64898b22, (q31_t)0x6485a778, (q31_t)0x6481c390, (q31_t)0x647ddf6a,\n    (q31_t)0x6479fb06, (q31_t)0x64761664, (q31_t)0x64723184, (q31_t)0x646e4c66,\n    (q31_t)0x646a670a, (q31_t)0x64668170, (q31_t)0x64629b98, (q31_t)0x645eb582,\n    (q31_t)0x645acf2e, (q31_t)0x6456e89d, (q31_t)0x645301cd, (q31_t)0x644f1ac0,\n    (q31_t)0x644b3375, (q31_t)0x64474bec, (q31_t)0x64436425, (q31_t)0x643f7c20,\n    (q31_t)0x643b93dd, (q31_t)0x6437ab5d, (q31_t)0x6433c29f, (q31_t)0x642fd9a3,\n    (q31_t)0x642bf069, (q31_t)0x642806f1, (q31_t)0x64241d3c, (q31_t)0x64203348,\n    (q31_t)0x641c4917, (q31_t)0x64185ea9, (q31_t)0x641473fc, (q31_t)0x64108912,\n    (q31_t)0x640c9dea, (q31_t)0x6408b284, (q31_t)0x6404c6e1, (q31_t)0x6400db00,\n    (q31_t)0x63fceee1, (q31_t)0x63f90285, (q31_t)0x63f515eb, (q31_t)0x63f12913,\n    (q31_t)0x63ed3bfd, (q31_t)0x63e94eaa, (q31_t)0x63e5611a, (q31_t)0x63e1734b,\n    (q31_t)0x63dd853f, (q31_t)0x63d996f6, (q31_t)0x63d5a86f, (q31_t)0x63d1b9aa,\n    (q31_t)0x63cdcaa8, (q31_t)0x63c9db68, (q31_t)0x63c5ebeb, (q31_t)0x63c1fc30,\n    (q31_t)0x63be0c37, (q31_t)0x63ba1c01, (q31_t)0x63b62b8e, (q31_t)0x63b23add,\n    (q31_t)0x63ae49ee, (q31_t)0x63aa58c2, (q31_t)0x63a66759, (q31_t)0x63a275b2,\n    (q31_t)0x639e83cd, (q31_t)0x639a91ac, (q31_t)0x63969f4c, (q31_t)0x6392acaf,\n    (q31_t)0x638eb9d5, (q31_t)0x638ac6be, (q31_t)0x6386d369, (q31_t)0x6382dfd6,\n    (q31_t)0x637eec07, (q31_t)0x637af7fa, (q31_t)0x637703af, (q31_t)0x63730f27,\n    (q31_t)0x636f1a62, (q31_t)0x636b2560, (q31_t)0x63673020, (q31_t)0x63633aa3,\n    (q31_t)0x635f44e8, (q31_t)0x635b4ef0, (q31_t)0x635758bb, (q31_t)0x63536249,\n    (q31_t)0x634f6b99, (q31_t)0x634b74ad, (q31_t)0x63477d82, (q31_t)0x6343861b,\n    (q31_t)0x633f8e76, (q31_t)0x633b9695, (q31_t)0x63379e76, (q31_t)0x6333a619,\n    (q31_t)0x632fad80, (q31_t)0x632bb4a9, (q31_t)0x6327bb96, (q31_t)0x6323c245,\n    (q31_t)0x631fc8b7, (q31_t)0x631bceeb, (q31_t)0x6317d4e3, (q31_t)0x6313da9e,\n    (q31_t)0x630fe01b, (q31_t)0x630be55b, (q31_t)0x6307ea5e, (q31_t)0x6303ef25,\n    (q31_t)0x62fff3ae, (q31_t)0x62fbf7fa, (q31_t)0x62f7fc08, (q31_t)0x62f3ffda,\n    (q31_t)0x62f0036f, (q31_t)0x62ec06c7, (q31_t)0x62e809e2, (q31_t)0x62e40cbf,\n    (q31_t)0x62e00f60, (q31_t)0x62dc11c4, (q31_t)0x62d813eb, (q31_t)0x62d415d4,\n    (q31_t)0x62d01781, (q31_t)0x62cc18f1, (q31_t)0x62c81a24, (q31_t)0x62c41b1a,\n    (q31_t)0x62c01bd3, (q31_t)0x62bc1c4f, (q31_t)0x62b81c8f, (q31_t)0x62b41c91,\n    (q31_t)0x62b01c57, (q31_t)0x62ac1bdf, (q31_t)0x62a81b2b, (q31_t)0x62a41a3a,\n    (q31_t)0x62a0190c, (q31_t)0x629c17a1, (q31_t)0x629815fa, (q31_t)0x62941415,\n    (q31_t)0x629011f4, (q31_t)0x628c0f96, (q31_t)0x62880cfb, (q31_t)0x62840a23,\n    (q31_t)0x6280070f, (q31_t)0x627c03be, (q31_t)0x62780030, (q31_t)0x6273fc65,\n    (q31_t)0x626ff85e, (q31_t)0x626bf41a, (q31_t)0x6267ef99, (q31_t)0x6263eadc,\n    (q31_t)0x625fe5e1, (q31_t)0x625be0ab, (q31_t)0x6257db37, (q31_t)0x6253d587,\n    (q31_t)0x624fcf9a, (q31_t)0x624bc970, (q31_t)0x6247c30a, (q31_t)0x6243bc68,\n    (q31_t)0x623fb588, (q31_t)0x623bae6c, (q31_t)0x6237a714, (q31_t)0x62339f7e,\n    (q31_t)0x622f97ad, (q31_t)0x622b8f9e, (q31_t)0x62278754, (q31_t)0x62237ecc,\n    (q31_t)0x621f7608, (q31_t)0x621b6d08, (q31_t)0x621763cb, (q31_t)0x62135a51,\n    (q31_t)0x620f509b, (q31_t)0x620b46a9, (q31_t)0x62073c7a, (q31_t)0x6203320e,\n    (q31_t)0x61ff2766, (q31_t)0x61fb1c82, (q31_t)0x61f71161, (q31_t)0x61f30604,\n    (q31_t)0x61eefa6b, (q31_t)0x61eaee95, (q31_t)0x61e6e282, (q31_t)0x61e2d633,\n    (q31_t)0x61dec9a8, (q31_t)0x61dabce0, (q31_t)0x61d6afdd, (q31_t)0x61d2a29c,\n    (q31_t)0x61ce9520, (q31_t)0x61ca8767, (q31_t)0x61c67971, (q31_t)0x61c26b40,\n    (q31_t)0x61be5cd2, (q31_t)0x61ba4e28, (q31_t)0x61b63f41, (q31_t)0x61b2301e,\n    (q31_t)0x61ae20bf, (q31_t)0x61aa1124, (q31_t)0x61a6014d, (q31_t)0x61a1f139,\n    (q31_t)0x619de0e9, (q31_t)0x6199d05d, (q31_t)0x6195bf94, (q31_t)0x6191ae90,\n    (q31_t)0x618d9d4f, (q31_t)0x61898bd2, (q31_t)0x61857a19, (q31_t)0x61816824,\n    (q31_t)0x617d55f2, (q31_t)0x61794385, (q31_t)0x617530db, (q31_t)0x61711df5,\n    (q31_t)0x616d0ad3, (q31_t)0x6168f775, (q31_t)0x6164e3db, (q31_t)0x6160d005,\n    (q31_t)0x615cbbf3, (q31_t)0x6158a7a4, (q31_t)0x6154931a, (q31_t)0x61507e54,\n    (q31_t)0x614c6951, (q31_t)0x61485413, (q31_t)0x61443e98, (q31_t)0x614028e2,\n    (q31_t)0x613c12f0, (q31_t)0x6137fcc1, (q31_t)0x6133e657, (q31_t)0x612fcfb0,\n    (q31_t)0x612bb8ce, (q31_t)0x6127a1b0, (q31_t)0x61238a56, (q31_t)0x611f72c0,\n    (q31_t)0x611b5aee, (q31_t)0x611742e0, (q31_t)0x61132a96, (q31_t)0x610f1210,\n    (q31_t)0x610af94f, (q31_t)0x6106e051, (q31_t)0x6102c718, (q31_t)0x60feada3,\n    (q31_t)0x60fa93f2, (q31_t)0x60f67a05, (q31_t)0x60f25fdd, (q31_t)0x60ee4579,\n    (q31_t)0x60ea2ad8, (q31_t)0x60e60ffd, (q31_t)0x60e1f4e5, (q31_t)0x60ddd991,\n    (q31_t)0x60d9be02, (q31_t)0x60d5a237, (q31_t)0x60d18631, (q31_t)0x60cd69ee,\n    (q31_t)0x60c94d70, (q31_t)0x60c530b6, (q31_t)0x60c113c1, (q31_t)0x60bcf690,\n    (q31_t)0x60b8d923, (q31_t)0x60b4bb7a, (q31_t)0x60b09d96, (q31_t)0x60ac7f76,\n    (q31_t)0x60a8611b, (q31_t)0x60a44284, (q31_t)0x60a023b1, (q31_t)0x609c04a3,\n    (q31_t)0x6097e559, (q31_t)0x6093c5d3, (q31_t)0x608fa612, (q31_t)0x608b8616,\n    (q31_t)0x608765dd, (q31_t)0x6083456a, (q31_t)0x607f24ba, (q31_t)0x607b03d0,\n    (q31_t)0x6076e2a9, (q31_t)0x6072c148, (q31_t)0x606e9faa, (q31_t)0x606a7dd2,\n    (q31_t)0x60665bbd, (q31_t)0x6062396e, (q31_t)0x605e16e2, (q31_t)0x6059f41c,\n    (q31_t)0x6055d11a, (q31_t)0x6051addc, (q31_t)0x604d8a63, (q31_t)0x604966af,\n    (q31_t)0x604542bf, (q31_t)0x60411e94, (q31_t)0x603cfa2e, (q31_t)0x6038d58c,\n    (q31_t)0x6034b0af, (q31_t)0x60308b97, (q31_t)0x602c6643, (q31_t)0x602840b4,\n    (q31_t)0x60241ae9, (q31_t)0x601ff4e3, (q31_t)0x601bcea2, (q31_t)0x6017a826,\n    (q31_t)0x6013816e, (q31_t)0x600f5a7b, (q31_t)0x600b334d, (q31_t)0x60070be4,\n    (q31_t)0x6002e43f, (q31_t)0x5ffebc5f, (q31_t)0x5ffa9444, (q31_t)0x5ff66bee,\n    (q31_t)0x5ff2435d, (q31_t)0x5fee1a90, (q31_t)0x5fe9f188, (q31_t)0x5fe5c845,\n    (q31_t)0x5fe19ec7, (q31_t)0x5fdd750e, (q31_t)0x5fd94b19, (q31_t)0x5fd520ea,\n    (q31_t)0x5fd0f67f, (q31_t)0x5fcccbd9, (q31_t)0x5fc8a0f8, (q31_t)0x5fc475dc,\n    (q31_t)0x5fc04a85, (q31_t)0x5fbc1ef3, (q31_t)0x5fb7f326, (q31_t)0x5fb3c71e,\n    (q31_t)0x5faf9adb, (q31_t)0x5fab6e5d, (q31_t)0x5fa741a3, (q31_t)0x5fa314af,\n    (q31_t)0x5f9ee780, (q31_t)0x5f9aba16, (q31_t)0x5f968c70, (q31_t)0x5f925e90,\n    (q31_t)0x5f8e3075, (q31_t)0x5f8a021f, (q31_t)0x5f85d38e, (q31_t)0x5f81a4c2,\n    (q31_t)0x5f7d75bb, (q31_t)0x5f794679, (q31_t)0x5f7516fd, (q31_t)0x5f70e745,\n    (q31_t)0x5f6cb753, (q31_t)0x5f688726, (q31_t)0x5f6456be, (q31_t)0x5f60261b,\n    (q31_t)0x5f5bf53d, (q31_t)0x5f57c424, (q31_t)0x5f5392d1, (q31_t)0x5f4f6143,\n    (q31_t)0x5f4b2f7a, (q31_t)0x5f46fd76, (q31_t)0x5f42cb37, (q31_t)0x5f3e98be,\n    (q31_t)0x5f3a660a, (q31_t)0x5f36331b, (q31_t)0x5f31fff1, (q31_t)0x5f2dcc8d,\n    (q31_t)0x5f2998ee, (q31_t)0x5f256515, (q31_t)0x5f213100, (q31_t)0x5f1cfcb1,\n    (q31_t)0x5f18c827, (q31_t)0x5f149363, (q31_t)0x5f105e64, (q31_t)0x5f0c292a,\n    (q31_t)0x5f07f3b6, (q31_t)0x5f03be07, (q31_t)0x5eff881d, (q31_t)0x5efb51f9,\n    (q31_t)0x5ef71b9b, (q31_t)0x5ef2e501, (q31_t)0x5eeeae2d, (q31_t)0x5eea771f,\n    (q31_t)0x5ee63fd6, (q31_t)0x5ee20853, (q31_t)0x5eddd094, (q31_t)0x5ed9989c,\n    (q31_t)0x5ed56069, (q31_t)0x5ed127fb, (q31_t)0x5eccef53, (q31_t)0x5ec8b671,\n    (q31_t)0x5ec47d54, (q31_t)0x5ec043fc, (q31_t)0x5ebc0a6a, (q31_t)0x5eb7d09e,\n    (q31_t)0x5eb39697, (q31_t)0x5eaf5c56, (q31_t)0x5eab21da, (q31_t)0x5ea6e724,\n    (q31_t)0x5ea2ac34, (q31_t)0x5e9e7109, (q31_t)0x5e9a35a4, (q31_t)0x5e95fa05,\n    (q31_t)0x5e91be2b, (q31_t)0x5e8d8217, (q31_t)0x5e8945c8, (q31_t)0x5e85093f,\n    (q31_t)0x5e80cc7c, (q31_t)0x5e7c8f7f, (q31_t)0x5e785247, (q31_t)0x5e7414d5,\n    (q31_t)0x5e6fd729, (q31_t)0x5e6b9943, (q31_t)0x5e675b22, (q31_t)0x5e631cc7,\n    (q31_t)0x5e5ede32, (q31_t)0x5e5a9f62, (q31_t)0x5e566059, (q31_t)0x5e522115,\n    (q31_t)0x5e4de197, (q31_t)0x5e49a1df, (q31_t)0x5e4561ed, (q31_t)0x5e4121c0,\n    (q31_t)0x5e3ce15a, (q31_t)0x5e38a0b9, (q31_t)0x5e345fde, (q31_t)0x5e301ec9,\n    (q31_t)0x5e2bdd7a, (q31_t)0x5e279bf1, (q31_t)0x5e235a2e, (q31_t)0x5e1f1830,\n    (q31_t)0x5e1ad5f9, (q31_t)0x5e169388, (q31_t)0x5e1250dc, (q31_t)0x5e0e0df7,\n    (q31_t)0x5e09cad7, (q31_t)0x5e05877e, (q31_t)0x5e0143ea, (q31_t)0x5dfd001d,\n    (q31_t)0x5df8bc15, (q31_t)0x5df477d4, (q31_t)0x5df03359, (q31_t)0x5debeea3,\n    (q31_t)0x5de7a9b4, (q31_t)0x5de3648b, (q31_t)0x5ddf1f28, (q31_t)0x5ddad98b,\n    (q31_t)0x5dd693b4, (q31_t)0x5dd24da3, (q31_t)0x5dce0759, (q31_t)0x5dc9c0d4,\n    (q31_t)0x5dc57a16, (q31_t)0x5dc1331d, (q31_t)0x5dbcebeb, (q31_t)0x5db8a480,\n    (q31_t)0x5db45cda, (q31_t)0x5db014fa, (q31_t)0x5dabcce1, (q31_t)0x5da7848e,\n    (q31_t)0x5da33c01, (q31_t)0x5d9ef33b, (q31_t)0x5d9aaa3a, (q31_t)0x5d966100,\n    (q31_t)0x5d92178d, (q31_t)0x5d8dcddf, (q31_t)0x5d8983f8, (q31_t)0x5d8539d7,\n    (q31_t)0x5d80ef7c, (q31_t)0x5d7ca4e8, (q31_t)0x5d785a1a, (q31_t)0x5d740f12,\n    (q31_t)0x5d6fc3d1, (q31_t)0x5d6b7856, (q31_t)0x5d672ca2, (q31_t)0x5d62e0b4,\n    (q31_t)0x5d5e948c, (q31_t)0x5d5a482a, (q31_t)0x5d55fb90, (q31_t)0x5d51aebb,\n    (q31_t)0x5d4d61ad, (q31_t)0x5d491465, (q31_t)0x5d44c6e4, (q31_t)0x5d40792a,\n    (q31_t)0x5d3c2b35, (q31_t)0x5d37dd08, (q31_t)0x5d338ea0, (q31_t)0x5d2f4000,\n    (q31_t)0x5d2af125, (q31_t)0x5d26a212, (q31_t)0x5d2252c5, (q31_t)0x5d1e033e,\n    (q31_t)0x5d19b37e, (q31_t)0x5d156385, (q31_t)0x5d111352, (q31_t)0x5d0cc2e5,\n    (q31_t)0x5d087240, (q31_t)0x5d042161, (q31_t)0x5cffd048, (q31_t)0x5cfb7ef7,\n    (q31_t)0x5cf72d6b, (q31_t)0x5cf2dba7, (q31_t)0x5cee89a9, (q31_t)0x5cea3772,\n    (q31_t)0x5ce5e501, (q31_t)0x5ce19258, (q31_t)0x5cdd3f75, (q31_t)0x5cd8ec58,\n    (q31_t)0x5cd49903, (q31_t)0x5cd04574, (q31_t)0x5ccbf1ab, (q31_t)0x5cc79daa,\n    (q31_t)0x5cc3496f, (q31_t)0x5cbef4fc, (q31_t)0x5cbaa04f, (q31_t)0x5cb64b68,\n    (q31_t)0x5cb1f649, (q31_t)0x5cada0f0, (q31_t)0x5ca94b5e, (q31_t)0x5ca4f594,\n    (q31_t)0x5ca09f8f, (q31_t)0x5c9c4952, (q31_t)0x5c97f2dc, (q31_t)0x5c939c2c,\n    (q31_t)0x5c8f4544, (q31_t)0x5c8aee22, (q31_t)0x5c8696c7, (q31_t)0x5c823f34,\n    (q31_t)0x5c7de767, (q31_t)0x5c798f61, (q31_t)0x5c753722, (q31_t)0x5c70deaa,\n    (q31_t)0x5c6c85f9, (q31_t)0x5c682d0f, (q31_t)0x5c63d3eb, (q31_t)0x5c5f7a8f,\n    (q31_t)0x5c5b20fa, (q31_t)0x5c56c72c, (q31_t)0x5c526d25, (q31_t)0x5c4e12e5,\n    (q31_t)0x5c49b86d, (q31_t)0x5c455dbb, (q31_t)0x5c4102d0, (q31_t)0x5c3ca7ad,\n    (q31_t)0x5c384c50, (q31_t)0x5c33f0bb, (q31_t)0x5c2f94ec, (q31_t)0x5c2b38e5,\n    (q31_t)0x5c26dca5, (q31_t)0x5c22802c, (q31_t)0x5c1e237b, (q31_t)0x5c19c690,\n    (q31_t)0x5c15696d, (q31_t)0x5c110c11, (q31_t)0x5c0cae7c, (q31_t)0x5c0850ae,\n    (q31_t)0x5c03f2a8, (q31_t)0x5bff9469, (q31_t)0x5bfb35f1, (q31_t)0x5bf6d740,\n    (q31_t)0x5bf27857, (q31_t)0x5bee1935, (q31_t)0x5be9b9da, (q31_t)0x5be55a46,\n    (q31_t)0x5be0fa7a, (q31_t)0x5bdc9a75, (q31_t)0x5bd83a37, (q31_t)0x5bd3d9c1,\n    (q31_t)0x5bcf7912, (q31_t)0x5bcb182b, (q31_t)0x5bc6b70b, (q31_t)0x5bc255b2,\n    (q31_t)0x5bbdf421, (q31_t)0x5bb99257, (q31_t)0x5bb53054, (q31_t)0x5bb0ce19,\n    (q31_t)0x5bac6ba6, (q31_t)0x5ba808f9, (q31_t)0x5ba3a615, (q31_t)0x5b9f42f7,\n    (q31_t)0x5b9adfa2, (q31_t)0x5b967c13, (q31_t)0x5b92184d, (q31_t)0x5b8db44d,\n    (q31_t)0x5b895016, (q31_t)0x5b84eba6, (q31_t)0x5b8086fd, (q31_t)0x5b7c221c,\n    (q31_t)0x5b77bd02, (q31_t)0x5b7357b0, (q31_t)0x5b6ef226, (q31_t)0x5b6a8c63,\n    (q31_t)0x5b662668, (q31_t)0x5b61c035, (q31_t)0x5b5d59c9, (q31_t)0x5b58f324,\n    (q31_t)0x5b548c48, (q31_t)0x5b502533, (q31_t)0x5b4bbde6, (q31_t)0x5b475660,\n    (q31_t)0x5b42eea2, (q31_t)0x5b3e86ac, (q31_t)0x5b3a1e7e, (q31_t)0x5b35b617,\n    (q31_t)0x5b314d78, (q31_t)0x5b2ce4a1, (q31_t)0x5b287b91, (q31_t)0x5b241249,\n    (q31_t)0x5b1fa8c9, (q31_t)0x5b1b3f11, (q31_t)0x5b16d521, (q31_t)0x5b126af8,\n    (q31_t)0x5b0e0098, (q31_t)0x5b0995ff, (q31_t)0x5b052b2e, (q31_t)0x5b00c025,\n    (q31_t)0x5afc54e3, (q31_t)0x5af7e96a, (q31_t)0x5af37db8, (q31_t)0x5aef11cf,\n    (q31_t)0x5aeaa5ad, (q31_t)0x5ae63953, (q31_t)0x5ae1ccc1, (q31_t)0x5add5ff7,\n    (q31_t)0x5ad8f2f5, (q31_t)0x5ad485bb, (q31_t)0x5ad01849, (q31_t)0x5acbaa9f,\n    (q31_t)0x5ac73cbd, (q31_t)0x5ac2cea3, (q31_t)0x5abe6050, (q31_t)0x5ab9f1c6,\n    (q31_t)0x5ab58304, (q31_t)0x5ab1140a, (q31_t)0x5aaca4d8, (q31_t)0x5aa8356f,\n    (q31_t)0x5aa3c5cd, (q31_t)0x5a9f55f3, (q31_t)0x5a9ae5e2, (q31_t)0x5a967598,\n    (q31_t)0x5a920517, (q31_t)0x5a8d945d, (q31_t)0x5a89236c, (q31_t)0x5a84b243,\n    (q31_t)0x5a8040e3, (q31_t)0x5a7bcf4a, (q31_t)0x5a775d7a, (q31_t)0x5a72eb71,\n    (q31_t)0x5a6e7931, (q31_t)0x5a6a06ba, (q31_t)0x5a65940a, (q31_t)0x5a612123,\n    (q31_t)0x5a5cae04, (q31_t)0x5a583aad, (q31_t)0x5a53c71e, (q31_t)0x5a4f5358,\n    (q31_t)0x5a4adf5a, (q31_t)0x5a466b24, (q31_t)0x5a41f6b7, (q31_t)0x5a3d8212,\n    (q31_t)0x5a390d35, (q31_t)0x5a349821, (q31_t)0x5a3022d5, (q31_t)0x5a2bad51,\n    (q31_t)0x5a273796, (q31_t)0x5a22c1a3, (q31_t)0x5a1e4b79, (q31_t)0x5a19d517,\n    (q31_t)0x5a155e7d, (q31_t)0x5a10e7ac, (q31_t)0x5a0c70a3, (q31_t)0x5a07f963,\n    (q31_t)0x5a0381eb, (q31_t)0x59ff0a3c, (q31_t)0x59fa9255, (q31_t)0x59f61a36,\n    (q31_t)0x59f1a1e0, (q31_t)0x59ed2953, (q31_t)0x59e8b08e, (q31_t)0x59e43792,\n    (q31_t)0x59dfbe5e, (q31_t)0x59db44f3, (q31_t)0x59d6cb50, (q31_t)0x59d25176,\n    (q31_t)0x59cdd765, (q31_t)0x59c95d1c, (q31_t)0x59c4e29c, (q31_t)0x59c067e4,\n    (q31_t)0x59bbecf5, (q31_t)0x59b771cf, (q31_t)0x59b2f671, (q31_t)0x59ae7add,\n    (q31_t)0x59a9ff10, (q31_t)0x59a5830d, (q31_t)0x59a106d2, (q31_t)0x599c8a60,\n    (q31_t)0x59980db6, (q31_t)0x599390d5, (q31_t)0x598f13bd, (q31_t)0x598a966e,\n    (q31_t)0x598618e8, (q31_t)0x59819b2a, (q31_t)0x597d1d35, (q31_t)0x59789f09,\n    (q31_t)0x597420a6, (q31_t)0x596fa20b, (q31_t)0x596b233a, (q31_t)0x5966a431,\n    (q31_t)0x596224f1, (q31_t)0x595da57a, (q31_t)0x595925cc, (q31_t)0x5954a5e6,\n    (q31_t)0x595025ca, (q31_t)0x594ba576, (q31_t)0x594724ec, (q31_t)0x5942a42a,\n    (q31_t)0x593e2331, (q31_t)0x5939a202, (q31_t)0x5935209b, (q31_t)0x59309efd,\n    (q31_t)0x592c1d28, (q31_t)0x59279b1c, (q31_t)0x592318d9, (q31_t)0x591e9660,\n    (q31_t)0x591a13af, (q31_t)0x591590c7, (q31_t)0x59110da8, (q31_t)0x590c8a53,\n    (q31_t)0x590806c6, (q31_t)0x59038302, (q31_t)0x58feff08, (q31_t)0x58fa7ad7,\n    (q31_t)0x58f5f66e, (q31_t)0x58f171cf, (q31_t)0x58ececf9, (q31_t)0x58e867ed,\n    (q31_t)0x58e3e2a9, (q31_t)0x58df5d2e, (q31_t)0x58dad77d, (q31_t)0x58d65195,\n    (q31_t)0x58d1cb76, (q31_t)0x58cd4520, (q31_t)0x58c8be94, (q31_t)0x58c437d1,\n    (q31_t)0x58bfb0d7, (q31_t)0x58bb29a6, (q31_t)0x58b6a23e, (q31_t)0x58b21aa0,\n    (q31_t)0x58ad92cb, (q31_t)0x58a90ac0, (q31_t)0x58a4827d, (q31_t)0x589ffa04,\n    (q31_t)0x589b7155, (q31_t)0x5896e86f, (q31_t)0x58925f52, (q31_t)0x588dd5fe,\n    (q31_t)0x58894c74, (q31_t)0x5884c2b3, (q31_t)0x588038bb, (q31_t)0x587bae8d,\n    (q31_t)0x58772429, (q31_t)0x5872998e, (q31_t)0x586e0ebc, (q31_t)0x586983b4,\n    (q31_t)0x5864f875, (q31_t)0x58606d00, (q31_t)0x585be154, (q31_t)0x58575571,\n    (q31_t)0x5852c958, (q31_t)0x584e3d09, (q31_t)0x5849b083, (q31_t)0x584523c7,\n    (q31_t)0x584096d4, (q31_t)0x583c09ab, (q31_t)0x58377c4c, (q31_t)0x5832eeb6,\n    (q31_t)0x582e60e9, (q31_t)0x5829d2e6, (q31_t)0x582544ad, (q31_t)0x5820b63e,\n    (q31_t)0x581c2798, (q31_t)0x581798bb, (q31_t)0x581309a9, (q31_t)0x580e7a60,\n    (q31_t)0x5809eae1, (q31_t)0x58055b2b, (q31_t)0x5800cb3f, (q31_t)0x57fc3b1d,\n    (q31_t)0x57f7aac5, (q31_t)0x57f31a36, (q31_t)0x57ee8971, (q31_t)0x57e9f876,\n    (q31_t)0x57e56744, (q31_t)0x57e0d5dd, (q31_t)0x57dc443f, (q31_t)0x57d7b26b,\n    (q31_t)0x57d32061, (q31_t)0x57ce8e20, (q31_t)0x57c9fbaa, (q31_t)0x57c568fd,\n    (q31_t)0x57c0d61a, (q31_t)0x57bc4301, (q31_t)0x57b7afb2, (q31_t)0x57b31c2d,\n    (q31_t)0x57ae8872, (q31_t)0x57a9f480, (q31_t)0x57a56059, (q31_t)0x57a0cbfb,\n    (q31_t)0x579c3768, (q31_t)0x5797a29e, (q31_t)0x57930d9e, (q31_t)0x578e7869,\n    (q31_t)0x5789e2fd, (q31_t)0x57854d5b, (q31_t)0x5780b784, (q31_t)0x577c2176,\n    (q31_t)0x57778b32, (q31_t)0x5772f4b9, (q31_t)0x576e5e09, (q31_t)0x5769c724,\n    (q31_t)0x57653009, (q31_t)0x576098b7, (q31_t)0x575c0130, (q31_t)0x57576973,\n    (q31_t)0x5752d180, (q31_t)0x574e3957, (q31_t)0x5749a0f9, (q31_t)0x57450864,\n    (q31_t)0x57406f9a, (q31_t)0x573bd69a, (q31_t)0x57373d64, (q31_t)0x5732a3f8,\n    (q31_t)0x572e0a56, (q31_t)0x5729707f, (q31_t)0x5724d672, (q31_t)0x57203c2f,\n    (q31_t)0x571ba1b7, (q31_t)0x57170708, (q31_t)0x57126c24, (q31_t)0x570dd10a,\n    (q31_t)0x570935bb, (q31_t)0x57049a36, (q31_t)0x56fffe7b, (q31_t)0x56fb628b,\n    (q31_t)0x56f6c664, (q31_t)0x56f22a09, (q31_t)0x56ed8d77, (q31_t)0x56e8f0b0,\n    (q31_t)0x56e453b4, (q31_t)0x56dfb681, (q31_t)0x56db1919, (q31_t)0x56d67b7c,\n    (q31_t)0x56d1dda9, (q31_t)0x56cd3fa1, (q31_t)0x56c8a162, (q31_t)0x56c402ef,\n    (q31_t)0x56bf6446, (q31_t)0x56bac567, (q31_t)0x56b62653, (q31_t)0x56b18709,\n    (q31_t)0x56ace78a, (q31_t)0x56a847d6, (q31_t)0x56a3a7ec, (q31_t)0x569f07cc,\n    (q31_t)0x569a6777, (q31_t)0x5695c6ed, (q31_t)0x5691262d, (q31_t)0x568c8538,\n    (q31_t)0x5687e40e, (q31_t)0x568342ae, (q31_t)0x567ea118, (q31_t)0x5679ff4e,\n    (q31_t)0x56755d4e, (q31_t)0x5670bb19, (q31_t)0x566c18ae, (q31_t)0x5667760e,\n    (q31_t)0x5662d339, (q31_t)0x565e302e, (q31_t)0x56598cee, (q31_t)0x5654e979,\n    (q31_t)0x565045cf, (q31_t)0x564ba1f0, (q31_t)0x5646fddb, (q31_t)0x56425991,\n    (q31_t)0x563db512, (q31_t)0x5639105d, (q31_t)0x56346b74, (q31_t)0x562fc655,\n    (q31_t)0x562b2101, (q31_t)0x56267b78, (q31_t)0x5621d5ba, (q31_t)0x561d2fc6,\n    (q31_t)0x5618899e, (q31_t)0x5613e340, (q31_t)0x560f3cae, (q31_t)0x560a95e6,\n    (q31_t)0x5605eee9, (q31_t)0x560147b7, (q31_t)0x55fca050, (q31_t)0x55f7f8b4,\n    (q31_t)0x55f350e3, (q31_t)0x55eea8dd, (q31_t)0x55ea00a2, (q31_t)0x55e55832,\n    (q31_t)0x55e0af8d, (q31_t)0x55dc06b3, (q31_t)0x55d75da4, (q31_t)0x55d2b460,\n    (q31_t)0x55ce0ae7, (q31_t)0x55c96139, (q31_t)0x55c4b757, (q31_t)0x55c00d3f,\n    (q31_t)0x55bb62f3, (q31_t)0x55b6b871, (q31_t)0x55b20dbb, (q31_t)0x55ad62d0,\n    (q31_t)0x55a8b7b0, (q31_t)0x55a40c5b, (q31_t)0x559f60d1, (q31_t)0x559ab513,\n    (q31_t)0x55960920, (q31_t)0x55915cf8, (q31_t)0x558cb09b, (q31_t)0x55880409,\n    (q31_t)0x55835743, (q31_t)0x557eaa48, (q31_t)0x5579fd18, (q31_t)0x55754fb3,\n    (q31_t)0x5570a21a, (q31_t)0x556bf44c, (q31_t)0x55674649, (q31_t)0x55629812,\n    (q31_t)0x555de9a6, (q31_t)0x55593b05, (q31_t)0x55548c30, (q31_t)0x554fdd26,\n    (q31_t)0x554b2de7, (q31_t)0x55467e74, (q31_t)0x5541cecc, (q31_t)0x553d1ef0,\n    (q31_t)0x55386edf, (q31_t)0x5533be99, (q31_t)0x552f0e1f, (q31_t)0x552a5d70,\n    (q31_t)0x5525ac8d, (q31_t)0x5520fb75, (q31_t)0x551c4a29, (q31_t)0x551798a8,\n    (q31_t)0x5512e6f3, (q31_t)0x550e3509, (q31_t)0x550982eb, (q31_t)0x5504d099,\n    (q31_t)0x55001e12, (q31_t)0x54fb6b56, (q31_t)0x54f6b866, (q31_t)0x54f20542,\n    (q31_t)0x54ed51e9, (q31_t)0x54e89e5c, (q31_t)0x54e3ea9a, (q31_t)0x54df36a5,\n    (q31_t)0x54da827a, (q31_t)0x54d5ce1c, (q31_t)0x54d11989, (q31_t)0x54cc64c2,\n    (q31_t)0x54c7afc6, (q31_t)0x54c2fa96, (q31_t)0x54be4532, (q31_t)0x54b98f9a,\n    (q31_t)0x54b4d9cd, (q31_t)0x54b023cc, (q31_t)0x54ab6d97, (q31_t)0x54a6b72e,\n    (q31_t)0x54a20090, (q31_t)0x549d49bf, (q31_t)0x549892b9, (q31_t)0x5493db7f,\n    (q31_t)0x548f2410, (q31_t)0x548a6c6e, (q31_t)0x5485b497, (q31_t)0x5480fc8c,\n    (q31_t)0x547c444d, (q31_t)0x54778bda, (q31_t)0x5472d333, (q31_t)0x546e1a58,\n    (q31_t)0x54696149, (q31_t)0x5464a805, (q31_t)0x545fee8e, (q31_t)0x545b34e3,\n    (q31_t)0x54567b03, (q31_t)0x5451c0f0, (q31_t)0x544d06a8, (q31_t)0x54484c2d,\n    (q31_t)0x5443917d, (q31_t)0x543ed699, (q31_t)0x543a1b82, (q31_t)0x54356037,\n    (q31_t)0x5430a4b7, (q31_t)0x542be904, (q31_t)0x54272d1d, (q31_t)0x54227102,\n    (q31_t)0x541db4b3, (q31_t)0x5418f830, (q31_t)0x54143b79, (q31_t)0x540f7e8e,\n    (q31_t)0x540ac170, (q31_t)0x5406041d, (q31_t)0x54014697, (q31_t)0x53fc88dd,\n    (q31_t)0x53f7caef, (q31_t)0x53f30cce, (q31_t)0x53ee4e78, (q31_t)0x53e98fef,\n    (q31_t)0x53e4d132, (q31_t)0x53e01242, (q31_t)0x53db531d, (q31_t)0x53d693c5,\n    (q31_t)0x53d1d439, (q31_t)0x53cd147a, (q31_t)0x53c85486, (q31_t)0x53c3945f,\n    (q31_t)0x53bed405, (q31_t)0x53ba1377, (q31_t)0x53b552b5, (q31_t)0x53b091bf,\n    (q31_t)0x53abd096, (q31_t)0x53a70f39, (q31_t)0x53a24da9, (q31_t)0x539d8be5,\n    (q31_t)0x5398c9ed, (q31_t)0x539407c2, (q31_t)0x538f4564, (q31_t)0x538a82d1,\n    (q31_t)0x5385c00c, (q31_t)0x5380fd12, (q31_t)0x537c39e6, (q31_t)0x53777685,\n    (q31_t)0x5372b2f2, (q31_t)0x536def2a, (q31_t)0x53692b30, (q31_t)0x53646701,\n    (q31_t)0x535fa2a0, (q31_t)0x535ade0b, (q31_t)0x53561942, (q31_t)0x53515447,\n    (q31_t)0x534c8f17, (q31_t)0x5347c9b5, (q31_t)0x5343041f, (q31_t)0x533e3e55,\n    (q31_t)0x53397859, (q31_t)0x5334b229, (q31_t)0x532febc5, (q31_t)0x532b252f,\n    (q31_t)0x53265e65, (q31_t)0x53219767, (q31_t)0x531cd037, (q31_t)0x531808d3,\n    (q31_t)0x5313413c, (q31_t)0x530e7972, (q31_t)0x5309b174, (q31_t)0x5304e943,\n    (q31_t)0x530020df, (q31_t)0x52fb5848, (q31_t)0x52f68f7e, (q31_t)0x52f1c680,\n    (q31_t)0x52ecfd4f, (q31_t)0x52e833ec, (q31_t)0x52e36a55, (q31_t)0x52dea08a,\n    (q31_t)0x52d9d68d, (q31_t)0x52d50c5d, (q31_t)0x52d041f9, (q31_t)0x52cb7763,\n    (q31_t)0x52c6ac99, (q31_t)0x52c1e19d, (q31_t)0x52bd166d, (q31_t)0x52b84b0a,\n    (q31_t)0x52b37f74, (q31_t)0x52aeb3ac, (q31_t)0x52a9e7b0, (q31_t)0x52a51b81,\n    (q31_t)0x52a04f1f, (q31_t)0x529b828a, (q31_t)0x5296b5c3, (q31_t)0x5291e8c8,\n    (q31_t)0x528d1b9b, (q31_t)0x52884e3a, (q31_t)0x528380a7, (q31_t)0x527eb2e0,\n    (q31_t)0x5279e4e7, (q31_t)0x527516bb, (q31_t)0x5270485c, (q31_t)0x526b79ca,\n    (q31_t)0x5266ab06, (q31_t)0x5261dc0e, (q31_t)0x525d0ce4, (q31_t)0x52583d87,\n    (q31_t)0x52536df7, (q31_t)0x524e9e34, (q31_t)0x5249ce3f, (q31_t)0x5244fe17,\n    (q31_t)0x52402dbc, (q31_t)0x523b5d2e, (q31_t)0x52368c6e, (q31_t)0x5231bb7b,\n    (q31_t)0x522cea55, (q31_t)0x522818fc, (q31_t)0x52234771, (q31_t)0x521e75b3,\n    (q31_t)0x5219a3c3, (q31_t)0x5214d1a0, (q31_t)0x520fff4a, (q31_t)0x520b2cc2,\n    (q31_t)0x52065a07, (q31_t)0x52018719, (q31_t)0x51fcb3f9, (q31_t)0x51f7e0a6,\n    (q31_t)0x51f30d21, (q31_t)0x51ee3969, (q31_t)0x51e9657e, (q31_t)0x51e49162,\n    (q31_t)0x51dfbd12, (q31_t)0x51dae890, (q31_t)0x51d613dc, (q31_t)0x51d13ef5,\n    (q31_t)0x51cc69db, (q31_t)0x51c79490, (q31_t)0x51c2bf11, (q31_t)0x51bde960,\n    (q31_t)0x51b9137d, (q31_t)0x51b43d68, (q31_t)0x51af6720, (q31_t)0x51aa90a5,\n    (q31_t)0x51a5b9f9, (q31_t)0x51a0e31a, (q31_t)0x519c0c08, (q31_t)0x519734c4,\n    (q31_t)0x51925d4e, (q31_t)0x518d85a6, (q31_t)0x5188adcb, (q31_t)0x5183d5be,\n    (q31_t)0x517efd7f, (q31_t)0x517a250d, (q31_t)0x51754c69, (q31_t)0x51707393,\n    (q31_t)0x516b9a8b, (q31_t)0x5166c150, (q31_t)0x5161e7e4, (q31_t)0x515d0e45,\n    (q31_t)0x51583473, (q31_t)0x51535a70, (q31_t)0x514e803b, (q31_t)0x5149a5d3,\n    (q31_t)0x5144cb39, (q31_t)0x513ff06d, (q31_t)0x513b156f, (q31_t)0x51363a3f,\n    (q31_t)0x51315edd, (q31_t)0x512c8348, (q31_t)0x5127a782, (q31_t)0x5122cb8a,\n    (q31_t)0x511def5f, (q31_t)0x51191302, (q31_t)0x51143674, (q31_t)0x510f59b3,\n    (q31_t)0x510a7cc1, (q31_t)0x51059f9c, (q31_t)0x5100c246, (q31_t)0x50fbe4bd,\n    (q31_t)0x50f70703, (q31_t)0x50f22916, (q31_t)0x50ed4af8, (q31_t)0x50e86ca8,\n    (q31_t)0x50e38e25, (q31_t)0x50deaf71, (q31_t)0x50d9d08b, (q31_t)0x50d4f173,\n    (q31_t)0x50d0122a, (q31_t)0x50cb32ae, (q31_t)0x50c65301, (q31_t)0x50c17322,\n    (q31_t)0x50bc9311, (q31_t)0x50b7b2ce, (q31_t)0x50b2d259, (q31_t)0x50adf1b3,\n    (q31_t)0x50a910db, (q31_t)0x50a42fd1, (q31_t)0x509f4e95, (q31_t)0x509a6d28,\n    (q31_t)0x50958b88, (q31_t)0x5090a9b8, (q31_t)0x508bc7b5, (q31_t)0x5086e581,\n    (q31_t)0x5082031b, (q31_t)0x507d2083, (q31_t)0x50783dba, (q31_t)0x50735abf,\n    (q31_t)0x506e7793, (q31_t)0x50699435, (q31_t)0x5064b0a5, (q31_t)0x505fcce4,\n    (q31_t)0x505ae8f1, (q31_t)0x505604cd, (q31_t)0x50512077, (q31_t)0x504c3bef,\n    (q31_t)0x50475736, (q31_t)0x5042724c, (q31_t)0x503d8d30, (q31_t)0x5038a7e2,\n    (q31_t)0x5033c263, (q31_t)0x502edcb2, (q31_t)0x5029f6d1, (q31_t)0x502510bd,\n    (q31_t)0x50202a78, (q31_t)0x501b4402, (q31_t)0x50165d5a, (q31_t)0x50117681,\n    (q31_t)0x500c8f77, (q31_t)0x5007a83b, (q31_t)0x5002c0cd, (q31_t)0x4ffdd92f,\n    (q31_t)0x4ff8f15f, (q31_t)0x4ff4095e, (q31_t)0x4fef212b, (q31_t)0x4fea38c7,\n    (q31_t)0x4fe55032, (q31_t)0x4fe0676c, (q31_t)0x4fdb7e74, (q31_t)0x4fd6954b,\n    (q31_t)0x4fd1abf0, (q31_t)0x4fccc265, (q31_t)0x4fc7d8a8, (q31_t)0x4fc2eeba,\n    (q31_t)0x4fbe049b, (q31_t)0x4fb91a4b, (q31_t)0x4fb42fc9, (q31_t)0x4faf4517,\n    (q31_t)0x4faa5a33, (q31_t)0x4fa56f1e, (q31_t)0x4fa083d8, (q31_t)0x4f9b9861,\n    (q31_t)0x4f96acb8, (q31_t)0x4f91c0df, (q31_t)0x4f8cd4d4, (q31_t)0x4f87e899,\n    (q31_t)0x4f82fc2c, (q31_t)0x4f7e0f8f, (q31_t)0x4f7922c0, (q31_t)0x4f7435c0,\n    (q31_t)0x4f6f488f, (q31_t)0x4f6a5b2e, (q31_t)0x4f656d9b, (q31_t)0x4f607fd7,\n    (q31_t)0x4f5b91e3, (q31_t)0x4f56a3bd, (q31_t)0x4f51b566, (q31_t)0x4f4cc6df,\n    (q31_t)0x4f47d827, (q31_t)0x4f42e93d, (q31_t)0x4f3dfa23, (q31_t)0x4f390ad8,\n    (q31_t)0x4f341b5c, (q31_t)0x4f2f2baf, (q31_t)0x4f2a3bd2, (q31_t)0x4f254bc3,\n    (q31_t)0x4f205b84, (q31_t)0x4f1b6b14, (q31_t)0x4f167a73, (q31_t)0x4f1189a1,\n    (q31_t)0x4f0c989f, (q31_t)0x4f07a76b, (q31_t)0x4f02b608, (q31_t)0x4efdc473,\n    (q31_t)0x4ef8d2ad, (q31_t)0x4ef3e0b7, (q31_t)0x4eeeee90, (q31_t)0x4ee9fc39,\n    (q31_t)0x4ee509b1, (q31_t)0x4ee016f8, (q31_t)0x4edb240e, (q31_t)0x4ed630f4,\n    (q31_t)0x4ed13da9, (q31_t)0x4ecc4a2e, (q31_t)0x4ec75682, (q31_t)0x4ec262a5,\n    (q31_t)0x4ebd6e98, (q31_t)0x4eb87a5a, (q31_t)0x4eb385ec, (q31_t)0x4eae914d,\n    (q31_t)0x4ea99c7d, (q31_t)0x4ea4a77d, (q31_t)0x4e9fb24d, (q31_t)0x4e9abcec,\n    (q31_t)0x4e95c75b, (q31_t)0x4e90d199, (q31_t)0x4e8bdba6, (q31_t)0x4e86e583,\n    (q31_t)0x4e81ef30, (q31_t)0x4e7cf8ac, (q31_t)0x4e7801f8, (q31_t)0x4e730b14,\n    (q31_t)0x4e6e13ff, (q31_t)0x4e691cba, (q31_t)0x4e642544, (q31_t)0x4e5f2d9e,\n    (q31_t)0x4e5a35c7, (q31_t)0x4e553dc1, (q31_t)0x4e50458a, (q31_t)0x4e4b4d22,\n    (q31_t)0x4e46548b, (q31_t)0x4e415bc3, (q31_t)0x4e3c62cb, (q31_t)0x4e3769a2,\n    (q31_t)0x4e32704a, (q31_t)0x4e2d76c1, (q31_t)0x4e287d08, (q31_t)0x4e23831e,\n    (q31_t)0x4e1e8905, (q31_t)0x4e198ebb, (q31_t)0x4e149441, (q31_t)0x4e0f9997,\n    (q31_t)0x4e0a9ebd, (q31_t)0x4e05a3b2, (q31_t)0x4e00a878, (q31_t)0x4dfbad0d,\n    (q31_t)0x4df6b173, (q31_t)0x4df1b5a8, (q31_t)0x4decb9ad, (q31_t)0x4de7bd82,\n    (q31_t)0x4de2c127, (q31_t)0x4dddc49c, (q31_t)0x4dd8c7e1, (q31_t)0x4dd3caf6,\n    (q31_t)0x4dcecdda, (q31_t)0x4dc9d08f, (q31_t)0x4dc4d314, (q31_t)0x4dbfd569,\n    (q31_t)0x4dbad78e, (q31_t)0x4db5d983, (q31_t)0x4db0db48, (q31_t)0x4dabdcdd,\n    (q31_t)0x4da6de43, (q31_t)0x4da1df78, (q31_t)0x4d9ce07d, (q31_t)0x4d97e153,\n    (q31_t)0x4d92e1f9, (q31_t)0x4d8de26f, (q31_t)0x4d88e2b5, (q31_t)0x4d83e2cb,\n    (q31_t)0x4d7ee2b1, (q31_t)0x4d79e268, (q31_t)0x4d74e1ef, (q31_t)0x4d6fe146,\n    (q31_t)0x4d6ae06d, (q31_t)0x4d65df64, (q31_t)0x4d60de2c, (q31_t)0x4d5bdcc4,\n    (q31_t)0x4d56db2d, (q31_t)0x4d51d965, (q31_t)0x4d4cd76e, (q31_t)0x4d47d547,\n    (q31_t)0x4d42d2f1, (q31_t)0x4d3dd06b, (q31_t)0x4d38cdb5, (q31_t)0x4d33cad0,\n    (q31_t)0x4d2ec7bb, (q31_t)0x4d29c476, (q31_t)0x4d24c102, (q31_t)0x4d1fbd5e,\n    (q31_t)0x4d1ab98b, (q31_t)0x4d15b588, (q31_t)0x4d10b155, (q31_t)0x4d0bacf3,\n    (q31_t)0x4d06a862, (q31_t)0x4d01a3a0, (q31_t)0x4cfc9eb0, (q31_t)0x4cf79990,\n    (q31_t)0x4cf29440, (q31_t)0x4ced8ec1, (q31_t)0x4ce88913, (q31_t)0x4ce38335,\n    (q31_t)0x4cde7d28, (q31_t)0x4cd976eb, (q31_t)0x4cd4707f, (q31_t)0x4ccf69e3,\n    (q31_t)0x4cca6318, (q31_t)0x4cc55c1e, (q31_t)0x4cc054f4, (q31_t)0x4cbb4d9b,\n    (q31_t)0x4cb64613, (q31_t)0x4cb13e5b, (q31_t)0x4cac3674, (q31_t)0x4ca72e5e,\n    (q31_t)0x4ca22619, (q31_t)0x4c9d1da4, (q31_t)0x4c981500, (q31_t)0x4c930c2d,\n    (q31_t)0x4c8e032a, (q31_t)0x4c88f9f8, (q31_t)0x4c83f097, (q31_t)0x4c7ee707,\n    (q31_t)0x4c79dd48, (q31_t)0x4c74d359, (q31_t)0x4c6fc93b, (q31_t)0x4c6abeef,\n    (q31_t)0x4c65b473, (q31_t)0x4c60a9c8, (q31_t)0x4c5b9eed, (q31_t)0x4c5693e4,\n    (q31_t)0x4c5188ac, (q31_t)0x4c4c7d44, (q31_t)0x4c4771ae, (q31_t)0x4c4265e8,\n    (q31_t)0x4c3d59f3, (q31_t)0x4c384dd0, (q31_t)0x4c33417d, (q31_t)0x4c2e34fb,\n    (q31_t)0x4c29284b, (q31_t)0x4c241b6b, (q31_t)0x4c1f0e5c, (q31_t)0x4c1a011f,\n    (q31_t)0x4c14f3b2, (q31_t)0x4c0fe617, (q31_t)0x4c0ad84c, (q31_t)0x4c05ca53,\n    (q31_t)0x4c00bc2b, (q31_t)0x4bfbadd4, (q31_t)0x4bf69f4e, (q31_t)0x4bf19099,\n    (q31_t)0x4bec81b5, (q31_t)0x4be772a3, (q31_t)0x4be26362, (q31_t)0x4bdd53f2,\n    (q31_t)0x4bd84453, (q31_t)0x4bd33485, (q31_t)0x4bce2488, (q31_t)0x4bc9145d,\n    (q31_t)0x4bc40403, (q31_t)0x4bbef37b, (q31_t)0x4bb9e2c3, (q31_t)0x4bb4d1dd,\n    (q31_t)0x4bafc0c8, (q31_t)0x4baaaf85, (q31_t)0x4ba59e12, (q31_t)0x4ba08c72,\n    (q31_t)0x4b9b7aa2, (q31_t)0x4b9668a4, (q31_t)0x4b915677, (q31_t)0x4b8c441c,\n    (q31_t)0x4b873192, (q31_t)0x4b821ed9, (q31_t)0x4b7d0bf2, (q31_t)0x4b77f8dc,\n    (q31_t)0x4b72e598, (q31_t)0x4b6dd225, (q31_t)0x4b68be84, (q31_t)0x4b63aab4,\n    (q31_t)0x4b5e96b6, (q31_t)0x4b598289, (q31_t)0x4b546e2d, (q31_t)0x4b4f59a4,\n    (q31_t)0x4b4a44eb, (q31_t)0x4b453005, (q31_t)0x4b401aef, (q31_t)0x4b3b05ac,\n    (q31_t)0x4b35f03a, (q31_t)0x4b30da9a, (q31_t)0x4b2bc4cb, (q31_t)0x4b26aece,\n    (q31_t)0x4b2198a2, (q31_t)0x4b1c8248, (q31_t)0x4b176bc0, (q31_t)0x4b12550a,\n    (q31_t)0x4b0d3e25, (q31_t)0x4b082712, (q31_t)0x4b030fd1, (q31_t)0x4afdf861,\n    (q31_t)0x4af8e0c3, (q31_t)0x4af3c8f7, (q31_t)0x4aeeb0fd, (q31_t)0x4ae998d4,\n    (q31_t)0x4ae4807d, (q31_t)0x4adf67f8, (q31_t)0x4ada4f45, (q31_t)0x4ad53664,\n    (q31_t)0x4ad01d54, (q31_t)0x4acb0417, (q31_t)0x4ac5eaab, (q31_t)0x4ac0d111,\n    (q31_t)0x4abbb749, (q31_t)0x4ab69d53, (q31_t)0x4ab1832f, (q31_t)0x4aac68dc,\n    (q31_t)0x4aa74e5c, (q31_t)0x4aa233ae, (q31_t)0x4a9d18d1, (q31_t)0x4a97fdc7,\n    (q31_t)0x4a92e28e, (q31_t)0x4a8dc728, (q31_t)0x4a88ab93, (q31_t)0x4a838fd1,\n    (q31_t)0x4a7e73e0, (q31_t)0x4a7957c2, (q31_t)0x4a743b76, (q31_t)0x4a6f1efc,\n    (q31_t)0x4a6a0253, (q31_t)0x4a64e57d, (q31_t)0x4a5fc879, (q31_t)0x4a5aab48,\n    (q31_t)0x4a558de8, (q31_t)0x4a50705a, (q31_t)0x4a4b529f, (q31_t)0x4a4634b6,\n    (q31_t)0x4a41169f, (q31_t)0x4a3bf85a, (q31_t)0x4a36d9e7, (q31_t)0x4a31bb47,\n    (q31_t)0x4a2c9c79, (q31_t)0x4a277d7d, (q31_t)0x4a225e53, (q31_t)0x4a1d3efc,\n    (q31_t)0x4a181f77, (q31_t)0x4a12ffc4, (q31_t)0x4a0ddfe4, (q31_t)0x4a08bfd5,\n    (q31_t)0x4a039f9a, (q31_t)0x49fe7f30, (q31_t)0x49f95e99, (q31_t)0x49f43dd4,\n    (q31_t)0x49ef1ce2, (q31_t)0x49e9fbc2, (q31_t)0x49e4da74, (q31_t)0x49dfb8f9,\n    (q31_t)0x49da9750, (q31_t)0x49d5757a, (q31_t)0x49d05376, (q31_t)0x49cb3145,\n    (q31_t)0x49c60ee6, (q31_t)0x49c0ec59, (q31_t)0x49bbc9a0, (q31_t)0x49b6a6b8,\n    (q31_t)0x49b183a3, (q31_t)0x49ac6061, (q31_t)0x49a73cf1, (q31_t)0x49a21954,\n    (q31_t)0x499cf589, (q31_t)0x4997d191, (q31_t)0x4992ad6c, (q31_t)0x498d8919,\n    (q31_t)0x49886499, (q31_t)0x49833fec, (q31_t)0x497e1b11, (q31_t)0x4978f609,\n    (q31_t)0x4973d0d3, (q31_t)0x496eab70, (q31_t)0x496985e0, (q31_t)0x49646023,\n    (q31_t)0x495f3a38, (q31_t)0x495a1420, (q31_t)0x4954eddb, (q31_t)0x494fc768,\n    (q31_t)0x494aa0c9, (q31_t)0x494579fc, (q31_t)0x49405302, (q31_t)0x493b2bdb,\n    (q31_t)0x49360486, (q31_t)0x4930dd05, (q31_t)0x492bb556, (q31_t)0x49268d7a,\n    (q31_t)0x49216571, (q31_t)0x491c3d3b, (q31_t)0x491714d8, (q31_t)0x4911ec47,\n    (q31_t)0x490cc38a, (q31_t)0x49079aa0, (q31_t)0x49027188, (q31_t)0x48fd4844,\n    (q31_t)0x48f81ed2, (q31_t)0x48f2f534, (q31_t)0x48edcb68, (q31_t)0x48e8a170,\n    (q31_t)0x48e3774a, (q31_t)0x48de4cf8, (q31_t)0x48d92278, (q31_t)0x48d3f7cc,\n    (q31_t)0x48ceccf3, (q31_t)0x48c9a1ed, (q31_t)0x48c476b9, (q31_t)0x48bf4b59,\n    (q31_t)0x48ba1fcd, (q31_t)0x48b4f413, (q31_t)0x48afc82c, (q31_t)0x48aa9c19,\n    (q31_t)0x48a56fd9, (q31_t)0x48a0436c, (q31_t)0x489b16d2, (q31_t)0x4895ea0b,\n    (q31_t)0x4890bd18, (q31_t)0x488b8ff8, (q31_t)0x488662ab, (q31_t)0x48813531,\n    (q31_t)0x487c078b, (q31_t)0x4876d9b8, (q31_t)0x4871abb8, (q31_t)0x486c7d8c,\n    (q31_t)0x48674f33, (q31_t)0x486220ad, (q31_t)0x485cf1fa, (q31_t)0x4857c31b,\n    (q31_t)0x48529410, (q31_t)0x484d64d7, (q31_t)0x48483572, (q31_t)0x484305e1,\n    (q31_t)0x483dd623, (q31_t)0x4838a638, (q31_t)0x48337621, (q31_t)0x482e45dd,\n    (q31_t)0x4829156d, (q31_t)0x4823e4d0, (q31_t)0x481eb407, (q31_t)0x48198311,\n    (q31_t)0x481451ef, (q31_t)0x480f20a0, (q31_t)0x4809ef25, (q31_t)0x4804bd7e,\n    (q31_t)0x47ff8baa, (q31_t)0x47fa59a9, (q31_t)0x47f5277d, (q31_t)0x47eff523,\n    (q31_t)0x47eac29e, (q31_t)0x47e58fec, (q31_t)0x47e05d0e, (q31_t)0x47db2a03,\n    (q31_t)0x47d5f6cc, (q31_t)0x47d0c369, (q31_t)0x47cb8fd9, (q31_t)0x47c65c1d,\n    (q31_t)0x47c12835, (q31_t)0x47bbf421, (q31_t)0x47b6bfe0, (q31_t)0x47b18b74,\n    (q31_t)0x47ac56da, (q31_t)0x47a72215, (q31_t)0x47a1ed24, (q31_t)0x479cb806,\n    (q31_t)0x479782bc, (q31_t)0x47924d46, (q31_t)0x478d17a4, (q31_t)0x4787e1d6,\n    (q31_t)0x4782abdb, (q31_t)0x477d75b5, (q31_t)0x47783f62, (q31_t)0x477308e3,\n    (q31_t)0x476dd239, (q31_t)0x47689b62, (q31_t)0x4763645f, (q31_t)0x475e2d30,\n    (q31_t)0x4758f5d5, (q31_t)0x4753be4e, (q31_t)0x474e869b, (q31_t)0x47494ebc,\n    (q31_t)0x474416b1, (q31_t)0x473ede7a, (q31_t)0x4739a617, (q31_t)0x47346d89,\n    (q31_t)0x472f34ce, (q31_t)0x4729fbe7, (q31_t)0x4724c2d5, (q31_t)0x471f8996,\n    (q31_t)0x471a502c, (q31_t)0x47151696, (q31_t)0x470fdcd4, (q31_t)0x470aa2e6,\n    (q31_t)0x470568cd, (q31_t)0x47002e87, (q31_t)0x46faf416, (q31_t)0x46f5b979,\n    (q31_t)0x46f07eb0, (q31_t)0x46eb43bc, (q31_t)0x46e6089b, (q31_t)0x46e0cd4f,\n    (q31_t)0x46db91d8, (q31_t)0x46d65634, (q31_t)0x46d11a65, (q31_t)0x46cbde6a,\n    (q31_t)0x46c6a244, (q31_t)0x46c165f1, (q31_t)0x46bc2974, (q31_t)0x46b6ecca,\n    (q31_t)0x46b1aff5, (q31_t)0x46ac72f4, (q31_t)0x46a735c8, (q31_t)0x46a1f870,\n    (q31_t)0x469cbaed, (q31_t)0x46977d3e, (q31_t)0x46923f63, (q31_t)0x468d015d,\n    (q31_t)0x4687c32c, (q31_t)0x468284cf, (q31_t)0x467d4646, (q31_t)0x46780792,\n    (q31_t)0x4672c8b3, (q31_t)0x466d89a8, (q31_t)0x46684a71, (q31_t)0x46630b0f,\n    (q31_t)0x465dcb82, (q31_t)0x46588bc9, (q31_t)0x46534be5, (q31_t)0x464e0bd6,\n    (q31_t)0x4648cb9b, (q31_t)0x46438b35, (q31_t)0x463e4aa3, (q31_t)0x463909e7,\n    (q31_t)0x4633c8fe, (q31_t)0x462e87eb, (q31_t)0x462946ac, (q31_t)0x46240542,\n    (q31_t)0x461ec3ad, (q31_t)0x461981ec, (q31_t)0x46144001, (q31_t)0x460efde9,\n    (q31_t)0x4609bba7, (q31_t)0x4604793a, (q31_t)0x45ff36a1, (q31_t)0x45f9f3dd,\n    (q31_t)0x45f4b0ee, (q31_t)0x45ef6dd4, (q31_t)0x45ea2a8f, (q31_t)0x45e4e71f,\n    (q31_t)0x45dfa383, (q31_t)0x45da5fbc, (q31_t)0x45d51bcb, (q31_t)0x45cfd7ae,\n    (q31_t)0x45ca9366, (q31_t)0x45c54ef3, (q31_t)0x45c00a55, (q31_t)0x45bac58c,\n    (q31_t)0x45b58098, (q31_t)0x45b03b79, (q31_t)0x45aaf630, (q31_t)0x45a5b0bb,\n    (q31_t)0x45a06b1b, (q31_t)0x459b2550, (q31_t)0x4595df5a, (q31_t)0x45909939,\n    (q31_t)0x458b52ee, (q31_t)0x45860c77, (q31_t)0x4580c5d6, (q31_t)0x457b7f0a,\n    (q31_t)0x45763813, (q31_t)0x4570f0f1, (q31_t)0x456ba9a4, (q31_t)0x4566622c,\n    (q31_t)0x45611a8a, (q31_t)0x455bd2bc, (q31_t)0x45568ac4, (q31_t)0x455142a2,\n    (q31_t)0x454bfa54, (q31_t)0x4546b1dc, (q31_t)0x45416939, (q31_t)0x453c206b,\n    (q31_t)0x4536d773, (q31_t)0x45318e4f, (q31_t)0x452c4502, (q31_t)0x4526fb89,\n    (q31_t)0x4521b1e6, (q31_t)0x451c6818, (q31_t)0x45171e20, (q31_t)0x4511d3fd,\n    (q31_t)0x450c89af, (q31_t)0x45073f37, (q31_t)0x4501f494, (q31_t)0x44fca9c6,\n    (q31_t)0x44f75ecf, (q31_t)0x44f213ac, (q31_t)0x44ecc85f, (q31_t)0x44e77ce7,\n    (q31_t)0x44e23145, (q31_t)0x44dce579, (q31_t)0x44d79982, (q31_t)0x44d24d60,\n    (q31_t)0x44cd0114, (q31_t)0x44c7b49e, (q31_t)0x44c267fd, (q31_t)0x44bd1b32,\n    (q31_t)0x44b7ce3c, (q31_t)0x44b2811c, (q31_t)0x44ad33d2, (q31_t)0x44a7e65d,\n    (q31_t)0x44a298be, (q31_t)0x449d4af5, (q31_t)0x4497fd01, (q31_t)0x4492aee3,\n    (q31_t)0x448d609b, (q31_t)0x44881228, (q31_t)0x4482c38b, (q31_t)0x447d74c4,\n    (q31_t)0x447825d2, (q31_t)0x4472d6b7, (q31_t)0x446d8771, (q31_t)0x44683801,\n    (q31_t)0x4462e866, (q31_t)0x445d98a2, (q31_t)0x445848b3, (q31_t)0x4452f89b,\n    (q31_t)0x444da858, (q31_t)0x444857ea, (q31_t)0x44430753, (q31_t)0x443db692,\n    (q31_t)0x443865a7, (q31_t)0x44331491, (q31_t)0x442dc351, (q31_t)0x442871e8,\n    (q31_t)0x44232054, (q31_t)0x441dce96, (q31_t)0x44187caf, (q31_t)0x44132a9d,\n    (q31_t)0x440dd861, (q31_t)0x440885fc, (q31_t)0x4403336c, (q31_t)0x43fde0b2,\n    (q31_t)0x43f88dcf, (q31_t)0x43f33ac1, (q31_t)0x43ede78a, (q31_t)0x43e89429,\n    (q31_t)0x43e3409d, (q31_t)0x43ddece8, (q31_t)0x43d8990a, (q31_t)0x43d34501,\n    (q31_t)0x43cdf0ce, (q31_t)0x43c89c72, (q31_t)0x43c347eb, (q31_t)0x43bdf33b,\n    (q31_t)0x43b89e62, (q31_t)0x43b3495e, (q31_t)0x43adf431, (q31_t)0x43a89ed9,\n    (q31_t)0x43a34959, (q31_t)0x439df3ae, (q31_t)0x43989dda, (q31_t)0x439347dc,\n    (q31_t)0x438df1b4, (q31_t)0x43889b63, (q31_t)0x438344e8, (q31_t)0x437dee43,\n    (q31_t)0x43789775, (q31_t)0x4373407d, (q31_t)0x436de95b, (q31_t)0x43689210,\n    (q31_t)0x43633a9c, (q31_t)0x435de2fd, (q31_t)0x43588b36, (q31_t)0x43533344,\n    (q31_t)0x434ddb29, (q31_t)0x434882e5, (q31_t)0x43432a77, (q31_t)0x433dd1e0,\n    (q31_t)0x4338791f, (q31_t)0x43332035, (q31_t)0x432dc721, (q31_t)0x43286de4,\n    (q31_t)0x4323147d, (q31_t)0x431dbaed, (q31_t)0x43186133, (q31_t)0x43130751,\n    (q31_t)0x430dad44, (q31_t)0x4308530f, (q31_t)0x4302f8b0, (q31_t)0x42fd9e28,\n    (q31_t)0x42f84376, (q31_t)0x42f2e89b, (q31_t)0x42ed8d97, (q31_t)0x42e83269,\n    (q31_t)0x42e2d713, (q31_t)0x42dd7b93, (q31_t)0x42d81fe9, (q31_t)0x42d2c417,\n    (q31_t)0x42cd681b, (q31_t)0x42c80bf6, (q31_t)0x42c2afa8, (q31_t)0x42bd5331,\n    (q31_t)0x42b7f690, (q31_t)0x42b299c7, (q31_t)0x42ad3cd4, (q31_t)0x42a7dfb8,\n    (q31_t)0x42a28273, (q31_t)0x429d2505, (q31_t)0x4297c76e, (q31_t)0x429269ae,\n    (q31_t)0x428d0bc4, (q31_t)0x4287adb2, (q31_t)0x42824f76, (q31_t)0x427cf112,\n    (q31_t)0x42779285, (q31_t)0x427233ce, (q31_t)0x426cd4ef, (q31_t)0x426775e6,\n    (q31_t)0x426216b5, (q31_t)0x425cb75a, (q31_t)0x425757d7, (q31_t)0x4251f82b,\n    (q31_t)0x424c9856, (q31_t)0x42473858, (q31_t)0x4241d831, (q31_t)0x423c77e1,\n    (q31_t)0x42371769, (q31_t)0x4231b6c7, (q31_t)0x422c55fd, (q31_t)0x4226f50a,\n    (q31_t)0x422193ee, (q31_t)0x421c32a9, (q31_t)0x4216d13c, (q31_t)0x42116fa5,\n    (q31_t)0x420c0de6, (q31_t)0x4206abfe, (q31_t)0x420149ee, (q31_t)0x41fbe7b5,\n    (q31_t)0x41f68553, (q31_t)0x41f122c8, (q31_t)0x41ebc015, (q31_t)0x41e65d39,\n    (q31_t)0x41e0fa35, (q31_t)0x41db9707, (q31_t)0x41d633b1, (q31_t)0x41d0d033,\n    (q31_t)0x41cb6c8c, (q31_t)0x41c608bc, (q31_t)0x41c0a4c4, (q31_t)0x41bb40a3,\n    (q31_t)0x41b5dc5a, (q31_t)0x41b077e8, (q31_t)0x41ab134e, (q31_t)0x41a5ae8b,\n    (q31_t)0x41a049a0, (q31_t)0x419ae48c, (q31_t)0x41957f4f, (q31_t)0x419019eb,\n    (q31_t)0x418ab45d, (q31_t)0x41854ea8, (q31_t)0x417fe8ca, (q31_t)0x417a82c3,\n    (q31_t)0x41751c94, (q31_t)0x416fb63d, (q31_t)0x416a4fbd, (q31_t)0x4164e916,\n    (q31_t)0x415f8245, (q31_t)0x415a1b4d, (q31_t)0x4154b42c, (q31_t)0x414f4ce2,\n    (q31_t)0x4149e571, (q31_t)0x41447dd7, (q31_t)0x413f1615, (q31_t)0x4139ae2b,\n    (q31_t)0x41344618, (q31_t)0x412edddd, (q31_t)0x4129757b, (q31_t)0x41240cef,\n    (q31_t)0x411ea43c, (q31_t)0x41193b61, (q31_t)0x4113d25d, (q31_t)0x410e6931,\n    (q31_t)0x4108ffdd, (q31_t)0x41039661, (q31_t)0x40fe2cbd, (q31_t)0x40f8c2f1,\n    (q31_t)0x40f358fc, (q31_t)0x40edeee0, (q31_t)0x40e8849b, (q31_t)0x40e31a2f,\n    (q31_t)0x40ddaf9b, (q31_t)0x40d844de, (q31_t)0x40d2d9f9, (q31_t)0x40cd6eed,\n    (q31_t)0x40c803b8, (q31_t)0x40c2985c, (q31_t)0x40bd2cd8, (q31_t)0x40b7c12b,\n    (q31_t)0x40b25557, (q31_t)0x40ace95b, (q31_t)0x40a77d37, (q31_t)0x40a210eb,\n    (q31_t)0x409ca477, (q31_t)0x409737dc, (q31_t)0x4091cb18, (q31_t)0x408c5e2d,\n    (q31_t)0x4086f11a, (q31_t)0x408183df, (q31_t)0x407c167c, (q31_t)0x4076a8f1,\n    (q31_t)0x40713b3f, (q31_t)0x406bcd65, (q31_t)0x40665f63, (q31_t)0x4060f13a,\n    (q31_t)0x405b82e9, (q31_t)0x40561470, (q31_t)0x4050a5cf, (q31_t)0x404b3707,\n    (q31_t)0x4045c817, (q31_t)0x404058ff, (q31_t)0x403ae9c0, (q31_t)0x40357a59,\n    (q31_t)0x40300acb, (q31_t)0x402a9b15, (q31_t)0x40252b37, (q31_t)0x401fbb32,\n    (q31_t)0x401a4b05, (q31_t)0x4014dab1, (q31_t)0x400f6a35, (q31_t)0x4009f992,\n    (q31_t)0x400488c7, (q31_t)0x3fff17d5, (q31_t)0x3ff9a6bb, (q31_t)0x3ff4357a,\n    (q31_t)0x3feec411, (q31_t)0x3fe95281, (q31_t)0x3fe3e0c9, (q31_t)0x3fde6eeb,\n    (q31_t)0x3fd8fce4, (q31_t)0x3fd38ab6, (q31_t)0x3fce1861, (q31_t)0x3fc8a5e5,\n    (q31_t)0x3fc33341, (q31_t)0x3fbdc076, (q31_t)0x3fb84d83, (q31_t)0x3fb2da6a,\n    (q31_t)0x3fad6729, (q31_t)0x3fa7f3c0, (q31_t)0x3fa28031, (q31_t)0x3f9d0c7a,\n    (q31_t)0x3f97989c, (q31_t)0x3f922496, (q31_t)0x3f8cb06a, (q31_t)0x3f873c16,\n    (q31_t)0x3f81c79b, (q31_t)0x3f7c52f9, (q31_t)0x3f76de30, (q31_t)0x3f71693f,\n    (q31_t)0x3f6bf428, (q31_t)0x3f667ee9, (q31_t)0x3f610983, (q31_t)0x3f5b93f6,\n    (q31_t)0x3f561e42, (q31_t)0x3f50a867, (q31_t)0x3f4b3265, (q31_t)0x3f45bc3c,\n    (q31_t)0x3f4045ec, (q31_t)0x3f3acf75, (q31_t)0x3f3558d7, (q31_t)0x3f2fe211,\n    (q31_t)0x3f2a6b25, (q31_t)0x3f24f412, (q31_t)0x3f1f7cd8, (q31_t)0x3f1a0577,\n    (q31_t)0x3f148def, (q31_t)0x3f0f1640, (q31_t)0x3f099e6b, (q31_t)0x3f04266e,\n    (q31_t)0x3efeae4a, (q31_t)0x3ef93600, (q31_t)0x3ef3bd8f, (q31_t)0x3eee44f7,\n    (q31_t)0x3ee8cc38, (q31_t)0x3ee35352, (q31_t)0x3eddda46, (q31_t)0x3ed86113,\n    (q31_t)0x3ed2e7b9, (q31_t)0x3ecd6e38, (q31_t)0x3ec7f491, (q31_t)0x3ec27ac2,\n    (q31_t)0x3ebd00cd, (q31_t)0x3eb786b2, (q31_t)0x3eb20c6f, (q31_t)0x3eac9206,\n    (q31_t)0x3ea71777, (q31_t)0x3ea19cc1, (q31_t)0x3e9c21e4, (q31_t)0x3e96a6e0,\n    (q31_t)0x3e912bb6, (q31_t)0x3e8bb065, (q31_t)0x3e8634ee, (q31_t)0x3e80b950,\n    (q31_t)0x3e7b3d8c, (q31_t)0x3e75c1a1, (q31_t)0x3e70458f, (q31_t)0x3e6ac957,\n    (q31_t)0x3e654cf8, (q31_t)0x3e5fd073, (q31_t)0x3e5a53c8, (q31_t)0x3e54d6f6,\n    (q31_t)0x3e4f59fe, (q31_t)0x3e49dcdf, (q31_t)0x3e445f99, (q31_t)0x3e3ee22e,\n    (q31_t)0x3e39649c, (q31_t)0x3e33e6e3, (q31_t)0x3e2e6904, (q31_t)0x3e28eaff,\n    (q31_t)0x3e236cd4, (q31_t)0x3e1dee82, (q31_t)0x3e18700a, (q31_t)0x3e12f16b,\n    (q31_t)0x3e0d72a6, (q31_t)0x3e07f3bb, (q31_t)0x3e0274aa, (q31_t)0x3dfcf572,\n    (q31_t)0x3df77615, (q31_t)0x3df1f691, (q31_t)0x3dec76e6, (q31_t)0x3de6f716,\n    (q31_t)0x3de1771f, (q31_t)0x3ddbf703, (q31_t)0x3dd676c0, (q31_t)0x3dd0f656,\n    (q31_t)0x3dcb75c7, (q31_t)0x3dc5f512, (q31_t)0x3dc07436, (q31_t)0x3dbaf335,\n    (q31_t)0x3db5720d, (q31_t)0x3daff0c0, (q31_t)0x3daa6f4c, (q31_t)0x3da4edb2,\n    (q31_t)0x3d9f6bf2, (q31_t)0x3d99ea0d, (q31_t)0x3d946801, (q31_t)0x3d8ee5cf,\n    (q31_t)0x3d896377, (q31_t)0x3d83e0f9, (q31_t)0x3d7e5e56, (q31_t)0x3d78db8c,\n    (q31_t)0x3d73589d, (q31_t)0x3d6dd587, (q31_t)0x3d68524c, (q31_t)0x3d62ceeb,\n    (q31_t)0x3d5d4b64, (q31_t)0x3d57c7b7, (q31_t)0x3d5243e4, (q31_t)0x3d4cbfeb,\n    (q31_t)0x3d473bcd, (q31_t)0x3d41b789, (q31_t)0x3d3c331f, (q31_t)0x3d36ae8f,\n    (q31_t)0x3d3129da, (q31_t)0x3d2ba4fe, (q31_t)0x3d261ffd, (q31_t)0x3d209ad7,\n    (q31_t)0x3d1b158a, (q31_t)0x3d159018, (q31_t)0x3d100a80, (q31_t)0x3d0a84c3,\n    (q31_t)0x3d04fee0, (q31_t)0x3cff78d7, (q31_t)0x3cf9f2a9, (q31_t)0x3cf46c55,\n    (q31_t)0x3ceee5db, (q31_t)0x3ce95f3c, (q31_t)0x3ce3d877, (q31_t)0x3cde518d,\n    (q31_t)0x3cd8ca7d, (q31_t)0x3cd34347, (q31_t)0x3ccdbbed, (q31_t)0x3cc8346c,\n    (q31_t)0x3cc2acc6, (q31_t)0x3cbd24fb, (q31_t)0x3cb79d0a, (q31_t)0x3cb214f4,\n    (q31_t)0x3cac8cb8, (q31_t)0x3ca70457, (q31_t)0x3ca17bd0, (q31_t)0x3c9bf324,\n    (q31_t)0x3c966a53, (q31_t)0x3c90e15c, (q31_t)0x3c8b5840, (q31_t)0x3c85cefe,\n    (q31_t)0x3c804598, (q31_t)0x3c7abc0c, (q31_t)0x3c75325a, (q31_t)0x3c6fa883,\n    (q31_t)0x3c6a1e87, (q31_t)0x3c649466, (q31_t)0x3c5f0a20, (q31_t)0x3c597fb4,\n    (q31_t)0x3c53f523, (q31_t)0x3c4e6a6d, (q31_t)0x3c48df91, (q31_t)0x3c435491,\n    (q31_t)0x3c3dc96b, (q31_t)0x3c383e20, (q31_t)0x3c32b2b0, (q31_t)0x3c2d271b,\n    (q31_t)0x3c279b61, (q31_t)0x3c220f81, (q31_t)0x3c1c837d, (q31_t)0x3c16f753,\n    (q31_t)0x3c116b04, (q31_t)0x3c0bde91, (q31_t)0x3c0651f8, (q31_t)0x3c00c53a,\n    (q31_t)0x3bfb3857, (q31_t)0x3bf5ab50, (q31_t)0x3bf01e23, (q31_t)0x3bea90d1,\n    (q31_t)0x3be5035a, (q31_t)0x3bdf75bf, (q31_t)0x3bd9e7fe, (q31_t)0x3bd45a19,\n    (q31_t)0x3bcecc0e, (q31_t)0x3bc93ddf, (q31_t)0x3bc3af8b, (q31_t)0x3bbe2112,\n    (q31_t)0x3bb89274, (q31_t)0x3bb303b1, (q31_t)0x3bad74c9, (q31_t)0x3ba7e5bd,\n    (q31_t)0x3ba2568c, (q31_t)0x3b9cc736, (q31_t)0x3b9737bb, (q31_t)0x3b91a81c,\n    (q31_t)0x3b8c1857, (q31_t)0x3b86886e, (q31_t)0x3b80f861, (q31_t)0x3b7b682e,\n    (q31_t)0x3b75d7d7, (q31_t)0x3b70475c, (q31_t)0x3b6ab6bb, (q31_t)0x3b6525f6,\n    (q31_t)0x3b5f950c, (q31_t)0x3b5a03fe, (q31_t)0x3b5472cb, (q31_t)0x3b4ee173,\n    (q31_t)0x3b494ff7, (q31_t)0x3b43be57, (q31_t)0x3b3e2c91, (q31_t)0x3b389aa8,\n    (q31_t)0x3b330899, (q31_t)0x3b2d7666, (q31_t)0x3b27e40f, (q31_t)0x3b225193,\n    (q31_t)0x3b1cbef3, (q31_t)0x3b172c2e, (q31_t)0x3b119945, (q31_t)0x3b0c0637,\n    (q31_t)0x3b067305, (q31_t)0x3b00dfaf, (q31_t)0x3afb4c34, (q31_t)0x3af5b894,\n    (q31_t)0x3af024d1, (q31_t)0x3aea90e9, (q31_t)0x3ae4fcdc, (q31_t)0x3adf68ac,\n    (q31_t)0x3ad9d457, (q31_t)0x3ad43fdd, (q31_t)0x3aceab40, (q31_t)0x3ac9167e,\n    (q31_t)0x3ac38198, (q31_t)0x3abdec8d, (q31_t)0x3ab8575f, (q31_t)0x3ab2c20c,\n    (q31_t)0x3aad2c95, (q31_t)0x3aa796fa, (q31_t)0x3aa2013a, (q31_t)0x3a9c6b57,\n    (q31_t)0x3a96d54f, (q31_t)0x3a913f23, (q31_t)0x3a8ba8d3, (q31_t)0x3a86125f,\n    (q31_t)0x3a807bc7, (q31_t)0x3a7ae50a, (q31_t)0x3a754e2a, (q31_t)0x3a6fb726,\n    (q31_t)0x3a6a1ffd, (q31_t)0x3a6488b1, (q31_t)0x3a5ef140, (q31_t)0x3a5959ab,\n    (q31_t)0x3a53c1f3, (q31_t)0x3a4e2a16, (q31_t)0x3a489216, (q31_t)0x3a42f9f2,\n    (q31_t)0x3a3d61a9, (q31_t)0x3a37c93d, (q31_t)0x3a3230ad, (q31_t)0x3a2c97f9,\n    (q31_t)0x3a26ff21, (q31_t)0x3a216625, (q31_t)0x3a1bcd05, (q31_t)0x3a1633c1,\n    (q31_t)0x3a109a5a, (q31_t)0x3a0b00cf, (q31_t)0x3a056720, (q31_t)0x39ffcd4d,\n    (q31_t)0x39fa3356, (q31_t)0x39f4993c, (q31_t)0x39eefefe, (q31_t)0x39e9649c,\n    (q31_t)0x39e3ca17, (q31_t)0x39de2f6d, (q31_t)0x39d894a0, (q31_t)0x39d2f9b0,\n    (q31_t)0x39cd5e9b, (q31_t)0x39c7c363, (q31_t)0x39c22808, (q31_t)0x39bc8c89,\n    (q31_t)0x39b6f0e6, (q31_t)0x39b1551f, (q31_t)0x39abb935, (q31_t)0x39a61d28,\n    (q31_t)0x39a080f6, (q31_t)0x399ae4a2, (q31_t)0x39954829, (q31_t)0x398fab8e,\n    (q31_t)0x398a0ece, (q31_t)0x398471ec, (q31_t)0x397ed4e5, (q31_t)0x397937bc,\n    (q31_t)0x39739a6e, (q31_t)0x396dfcfe, (q31_t)0x39685f6a, (q31_t)0x3962c1b2,\n    (q31_t)0x395d23d7, (q31_t)0x395785d9, (q31_t)0x3951e7b8, (q31_t)0x394c4973,\n    (q31_t)0x3946ab0a, (q31_t)0x39410c7f, (q31_t)0x393b6dd0, (q31_t)0x3935cefd,\n    (q31_t)0x39303008, (q31_t)0x392a90ef, (q31_t)0x3924f1b3, (q31_t)0x391f5254,\n    (q31_t)0x3919b2d1, (q31_t)0x3914132b, (q31_t)0x390e7362, (q31_t)0x3908d376,\n    (q31_t)0x39033367, (q31_t)0x38fd9334, (q31_t)0x38f7f2de, (q31_t)0x38f25266,\n    (q31_t)0x38ecb1ca, (q31_t)0x38e7110a, (q31_t)0x38e17028, (q31_t)0x38dbcf23,\n    (q31_t)0x38d62dfb, (q31_t)0x38d08caf, (q31_t)0x38caeb41, (q31_t)0x38c549af,\n    (q31_t)0x38bfa7fb, (q31_t)0x38ba0623, (q31_t)0x38b46429, (q31_t)0x38aec20b,\n    (q31_t)0x38a91fcb, (q31_t)0x38a37d67, (q31_t)0x389ddae1, (q31_t)0x38983838,\n    (q31_t)0x3892956c, (q31_t)0x388cf27d, (q31_t)0x38874f6b, (q31_t)0x3881ac36,\n    (q31_t)0x387c08de, (q31_t)0x38766564, (q31_t)0x3870c1c6, (q31_t)0x386b1e06,\n    (q31_t)0x38657a23, (q31_t)0x385fd61d, (q31_t)0x385a31f5, (q31_t)0x38548daa,\n    (q31_t)0x384ee93b, (q31_t)0x384944ab, (q31_t)0x38439ff7, (q31_t)0x383dfb21,\n    (q31_t)0x38385628, (q31_t)0x3832b10d, (q31_t)0x382d0bce, (q31_t)0x3827666d,\n    (q31_t)0x3821c0ea, (q31_t)0x381c1b44, (q31_t)0x3816757b, (q31_t)0x3810cf90,\n    (q31_t)0x380b2982, (q31_t)0x38058351, (q31_t)0x37ffdcfe, (q31_t)0x37fa3688,\n    (q31_t)0x37f48ff0, (q31_t)0x37eee936, (q31_t)0x37e94259, (q31_t)0x37e39b59,\n    (q31_t)0x37ddf437, (q31_t)0x37d84cf2, (q31_t)0x37d2a58b, (q31_t)0x37ccfe02,\n    (q31_t)0x37c75656, (q31_t)0x37c1ae87, (q31_t)0x37bc0697, (q31_t)0x37b65e84,\n    (q31_t)0x37b0b64e, (q31_t)0x37ab0df6, (q31_t)0x37a5657c, (q31_t)0x379fbce0,\n    (q31_t)0x379a1421, (q31_t)0x37946b40, (q31_t)0x378ec23d, (q31_t)0x37891917,\n    (q31_t)0x37836fcf, (q31_t)0x377dc665, (q31_t)0x37781cd9, (q31_t)0x3772732a,\n    (q31_t)0x376cc959, (q31_t)0x37671f66, (q31_t)0x37617551, (q31_t)0x375bcb1a,\n    (q31_t)0x375620c1, (q31_t)0x37507645, (q31_t)0x374acba7, (q31_t)0x374520e7,\n    (q31_t)0x373f7606, (q31_t)0x3739cb02, (q31_t)0x37341fdc, (q31_t)0x372e7493,\n    (q31_t)0x3728c929, (q31_t)0x37231d9d, (q31_t)0x371d71ef, (q31_t)0x3717c61f,\n    (q31_t)0x37121a2d, (q31_t)0x370c6e19, (q31_t)0x3706c1e2, (q31_t)0x3701158a,\n    (q31_t)0x36fb6910, (q31_t)0x36f5bc75, (q31_t)0x36f00fb7, (q31_t)0x36ea62d7,\n    (q31_t)0x36e4b5d6, (q31_t)0x36df08b2, (q31_t)0x36d95b6d, (q31_t)0x36d3ae06,\n    (q31_t)0x36ce007d, (q31_t)0x36c852d2, (q31_t)0x36c2a506, (q31_t)0x36bcf718,\n    (q31_t)0x36b74908, (q31_t)0x36b19ad6, (q31_t)0x36abec82, (q31_t)0x36a63e0d,\n    (q31_t)0x36a08f76, (q31_t)0x369ae0bd, (q31_t)0x369531e3, (q31_t)0x368f82e7,\n    (q31_t)0x3689d3c9, (q31_t)0x3684248a, (q31_t)0x367e7529, (q31_t)0x3678c5a7,\n    (q31_t)0x36731602, (q31_t)0x366d663d, (q31_t)0x3667b655, (q31_t)0x3662064c,\n    (q31_t)0x365c5622, (q31_t)0x3656a5d6, (q31_t)0x3650f569, (q31_t)0x364b44da,\n    (q31_t)0x36459429, (q31_t)0x363fe357, (q31_t)0x363a3264, (q31_t)0x3634814f,\n    (q31_t)0x362ed019, (q31_t)0x36291ec1, (q31_t)0x36236d48, (q31_t)0x361dbbad,\n    (q31_t)0x361809f1, (q31_t)0x36125814, (q31_t)0x360ca615, (q31_t)0x3606f3f5,\n    (q31_t)0x360141b4, (q31_t)0x35fb8f52, (q31_t)0x35f5dcce, (q31_t)0x35f02a28,\n    (q31_t)0x35ea7762, (q31_t)0x35e4c47a, (q31_t)0x35df1171, (q31_t)0x35d95e47,\n    (q31_t)0x35d3aafc, (q31_t)0x35cdf78f, (q31_t)0x35c84401, (q31_t)0x35c29052,\n    (q31_t)0x35bcdc82, (q31_t)0x35b72891, (q31_t)0x35b1747e, (q31_t)0x35abc04b,\n    (q31_t)0x35a60bf6, (q31_t)0x35a05781, (q31_t)0x359aa2ea, (q31_t)0x3594ee32,\n    (q31_t)0x358f3959, (q31_t)0x3589845f, (q31_t)0x3583cf44, (q31_t)0x357e1a08,\n    (q31_t)0x357864ab, (q31_t)0x3572af2d, (q31_t)0x356cf98e, (q31_t)0x356743ce,\n    (q31_t)0x35618ded, (q31_t)0x355bd7eb, (q31_t)0x355621c9, (q31_t)0x35506b85,\n    (q31_t)0x354ab520, (q31_t)0x3544fe9b, (q31_t)0x353f47f5, (q31_t)0x3539912e,\n    (q31_t)0x3533da46, (q31_t)0x352e233d, (q31_t)0x35286c14, (q31_t)0x3522b4c9,\n    (q31_t)0x351cfd5e, (q31_t)0x351745d2, (q31_t)0x35118e26, (q31_t)0x350bd658,\n    (q31_t)0x35061e6a, (q31_t)0x3500665c, (q31_t)0x34faae2c, (q31_t)0x34f4f5dc,\n    (q31_t)0x34ef3d6b, (q31_t)0x34e984da, (q31_t)0x34e3cc28, (q31_t)0x34de1355,\n    (q31_t)0x34d85a62, (q31_t)0x34d2a14e, (q31_t)0x34cce819, (q31_t)0x34c72ec4,\n    (q31_t)0x34c1754e, (q31_t)0x34bbbbb8, (q31_t)0x34b60202, (q31_t)0x34b0482a,\n    (q31_t)0x34aa8e33, (q31_t)0x34a4d41a, (q31_t)0x349f19e2, (q31_t)0x34995f88,\n    (q31_t)0x3493a50f, (q31_t)0x348dea75, (q31_t)0x34882fba, (q31_t)0x348274e0,\n    (q31_t)0x347cb9e4, (q31_t)0x3476fec9, (q31_t)0x3471438d, (q31_t)0x346b8830,\n    (q31_t)0x3465ccb4, (q31_t)0x34601117, (q31_t)0x345a5559, (q31_t)0x3454997c,\n    (q31_t)0x344edd7e, (q31_t)0x34492160, (q31_t)0x34436521, (q31_t)0x343da8c3,\n    (q31_t)0x3437ec44, (q31_t)0x34322fa5, (q31_t)0x342c72e6, (q31_t)0x3426b606,\n    (q31_t)0x3420f907, (q31_t)0x341b3be7, (q31_t)0x34157ea7, (q31_t)0x340fc147,\n    (q31_t)0x340a03c7, (q31_t)0x34044626, (q31_t)0x33fe8866, (q31_t)0x33f8ca86,\n    (q31_t)0x33f30c85, (q31_t)0x33ed4e65, (q31_t)0x33e79024, (q31_t)0x33e1d1c4,\n    (q31_t)0x33dc1343, (q31_t)0x33d654a2, (q31_t)0x33d095e2, (q31_t)0x33cad701,\n    (q31_t)0x33c51801, (q31_t)0x33bf58e1, (q31_t)0x33b999a0, (q31_t)0x33b3da40,\n    (q31_t)0x33ae1ac0, (q31_t)0x33a85b20, (q31_t)0x33a29b60, (q31_t)0x339cdb81,\n    (q31_t)0x33971b81, (q31_t)0x33915b62, (q31_t)0x338b9b22, (q31_t)0x3385dac4,\n    (q31_t)0x33801a45, (q31_t)0x337a59a6, (q31_t)0x337498e8, (q31_t)0x336ed80a,\n    (q31_t)0x3369170c, (q31_t)0x336355ef, (q31_t)0x335d94b2, (q31_t)0x3357d355,\n    (q31_t)0x335211d8, (q31_t)0x334c503c, (q31_t)0x33468e80, (q31_t)0x3340cca5,\n    (q31_t)0x333b0aaa, (q31_t)0x3335488f, (q31_t)0x332f8655, (q31_t)0x3329c3fb,\n    (q31_t)0x33240182, (q31_t)0x331e3ee9, (q31_t)0x33187c31, (q31_t)0x3312b959,\n    (q31_t)0x330cf661, (q31_t)0x3307334a, (q31_t)0x33017014, (q31_t)0x32fbacbe,\n    (q31_t)0x32f5e948, (q31_t)0x32f025b4, (q31_t)0x32ea61ff, (q31_t)0x32e49e2c,\n    (q31_t)0x32deda39, (q31_t)0x32d91626, (q31_t)0x32d351f5, (q31_t)0x32cd8da4,\n    (q31_t)0x32c7c933, (q31_t)0x32c204a3, (q31_t)0x32bc3ff4, (q31_t)0x32b67b26,\n    (q31_t)0x32b0b638, (q31_t)0x32aaf12b, (q31_t)0x32a52bff, (q31_t)0x329f66b4,\n    (q31_t)0x3299a149, (q31_t)0x3293dbbf, (q31_t)0x328e1616, (q31_t)0x3288504e,\n    (q31_t)0x32828a67, (q31_t)0x327cc460, (q31_t)0x3276fe3a, (q31_t)0x327137f6,\n    (q31_t)0x326b7192, (q31_t)0x3265ab0f, (q31_t)0x325fe46c, (q31_t)0x325a1dab,\n    (q31_t)0x325456cb, (q31_t)0x324e8fcc, (q31_t)0x3248c8ad, (q31_t)0x32430170,\n    (q31_t)0x323d3a14, (q31_t)0x32377298, (q31_t)0x3231aafe, (q31_t)0x322be345,\n    (q31_t)0x32261b6c, (q31_t)0x32205375, (q31_t)0x321a8b5f, (q31_t)0x3214c32a,\n    (q31_t)0x320efad6, (q31_t)0x32093263, (q31_t)0x320369d2, (q31_t)0x31fda121,\n    (q31_t)0x31f7d852, (q31_t)0x31f20f64, (q31_t)0x31ec4657, (q31_t)0x31e67d2b,\n    (q31_t)0x31e0b3e0, (q31_t)0x31daea77, (q31_t)0x31d520ef, (q31_t)0x31cf5748,\n    (q31_t)0x31c98d83, (q31_t)0x31c3c39e, (q31_t)0x31bdf99b, (q31_t)0x31b82f7a,\n    (q31_t)0x31b2653a, (q31_t)0x31ac9adb, (q31_t)0x31a6d05d, (q31_t)0x31a105c1,\n    (q31_t)0x319b3b06, (q31_t)0x3195702d, (q31_t)0x318fa535, (q31_t)0x3189da1e,\n    (q31_t)0x31840ee9, (q31_t)0x317e4395, (q31_t)0x31787823, (q31_t)0x3172ac92,\n    (q31_t)0x316ce0e3, (q31_t)0x31671515, (q31_t)0x31614929, (q31_t)0x315b7d1e,\n    (q31_t)0x3155b0f5, (q31_t)0x314fe4ae, (q31_t)0x314a1848, (q31_t)0x31444bc3,\n    (q31_t)0x313e7f21, (q31_t)0x3138b260, (q31_t)0x3132e580, (q31_t)0x312d1882,\n    (q31_t)0x31274b66, (q31_t)0x31217e2c, (q31_t)0x311bb0d3, (q31_t)0x3115e35c,\n    (q31_t)0x311015c6, (q31_t)0x310a4813, (q31_t)0x31047a41, (q31_t)0x30feac51,\n    (q31_t)0x30f8de42, (q31_t)0x30f31016, (q31_t)0x30ed41cb, (q31_t)0x30e77362,\n    (q31_t)0x30e1a4db, (q31_t)0x30dbd636, (q31_t)0x30d60772, (q31_t)0x30d03891,\n    (q31_t)0x30ca6991, (q31_t)0x30c49a74, (q31_t)0x30becb38, (q31_t)0x30b8fbde,\n    (q31_t)0x30b32c66, (q31_t)0x30ad5cd0, (q31_t)0x30a78d1c, (q31_t)0x30a1bd4a,\n    (q31_t)0x309bed5a, (q31_t)0x30961d4c, (q31_t)0x30904d20, (q31_t)0x308a7cd6,\n    (q31_t)0x3084ac6e, (q31_t)0x307edbe9, (q31_t)0x30790b45, (q31_t)0x30733a83,\n    (q31_t)0x306d69a4, (q31_t)0x306798a7, (q31_t)0x3061c78b, (q31_t)0x305bf652,\n    (q31_t)0x305624fb, (q31_t)0x30505387, (q31_t)0x304a81f4, (q31_t)0x3044b044,\n    (q31_t)0x303ede76, (q31_t)0x30390c8a, (q31_t)0x30333a80, (q31_t)0x302d6859,\n    (q31_t)0x30279614, (q31_t)0x3021c3b1, (q31_t)0x301bf131, (q31_t)0x30161e93,\n    (q31_t)0x30104bd7, (q31_t)0x300a78fe, (q31_t)0x3004a607, (q31_t)0x2ffed2f2,\n    (q31_t)0x2ff8ffc0, (q31_t)0x2ff32c70, (q31_t)0x2fed5902, (q31_t)0x2fe78577,\n    (q31_t)0x2fe1b1cf, (q31_t)0x2fdbde09, (q31_t)0x2fd60a25, (q31_t)0x2fd03624,\n    (q31_t)0x2fca6206, (q31_t)0x2fc48dc9, (q31_t)0x2fbeb970, (q31_t)0x2fb8e4f9,\n    (q31_t)0x2fb31064, (q31_t)0x2fad3bb3, (q31_t)0x2fa766e3, (q31_t)0x2fa191f7,\n    (q31_t)0x2f9bbced, (q31_t)0x2f95e7c5, (q31_t)0x2f901280, (q31_t)0x2f8a3d1e,\n    (q31_t)0x2f84679f, (q31_t)0x2f7e9202, (q31_t)0x2f78bc48, (q31_t)0x2f72e671,\n    (q31_t)0x2f6d107c, (q31_t)0x2f673a6a, (q31_t)0x2f61643b, (q31_t)0x2f5b8def,\n    (q31_t)0x2f55b785, (q31_t)0x2f4fe0ff, (q31_t)0x2f4a0a5b, (q31_t)0x2f44339a,\n    (q31_t)0x2f3e5cbb, (q31_t)0x2f3885c0, (q31_t)0x2f32aea8, (q31_t)0x2f2cd772,\n    (q31_t)0x2f27001f, (q31_t)0x2f2128af, (q31_t)0x2f1b5122, (q31_t)0x2f157979,\n    (q31_t)0x2f0fa1b2, (q31_t)0x2f09c9ce, (q31_t)0x2f03f1cd, (q31_t)0x2efe19ae,\n    (q31_t)0x2ef84173, (q31_t)0x2ef2691b, (q31_t)0x2eec90a7, (q31_t)0x2ee6b815,\n    (q31_t)0x2ee0df66, (q31_t)0x2edb069a, (q31_t)0x2ed52db1, (q31_t)0x2ecf54ac,\n    (q31_t)0x2ec97b89, (q31_t)0x2ec3a24a, (q31_t)0x2ebdc8ee, (q31_t)0x2eb7ef75,\n    (q31_t)0x2eb215df, (q31_t)0x2eac3c2d, (q31_t)0x2ea6625d, (q31_t)0x2ea08871,\n    (q31_t)0x2e9aae68, (q31_t)0x2e94d443, (q31_t)0x2e8efa00, (q31_t)0x2e891fa1,\n    (q31_t)0x2e834525, (q31_t)0x2e7d6a8d, (q31_t)0x2e778fd8, (q31_t)0x2e71b506,\n    (q31_t)0x2e6bda17, (q31_t)0x2e65ff0c, (q31_t)0x2e6023e5, (q31_t)0x2e5a48a0,\n    (q31_t)0x2e546d3f, (q31_t)0x2e4e91c2, (q31_t)0x2e48b628, (q31_t)0x2e42da71,\n    (q31_t)0x2e3cfe9e, (q31_t)0x2e3722ae, (q31_t)0x2e3146a2, (q31_t)0x2e2b6a79,\n    (q31_t)0x2e258e34, (q31_t)0x2e1fb1d3, (q31_t)0x2e19d554, (q31_t)0x2e13f8ba,\n    (q31_t)0x2e0e1c03, (q31_t)0x2e083f30, (q31_t)0x2e026240, (q31_t)0x2dfc8534,\n    (q31_t)0x2df6a80b, (q31_t)0x2df0cac6, (q31_t)0x2deaed65, (q31_t)0x2de50fe8,\n    (q31_t)0x2ddf324e, (q31_t)0x2dd95498, (q31_t)0x2dd376c5, (q31_t)0x2dcd98d7,\n    (q31_t)0x2dc7bacc, (q31_t)0x2dc1dca4, (q31_t)0x2dbbfe61, (q31_t)0x2db62001,\n    (q31_t)0x2db04186, (q31_t)0x2daa62ee, (q31_t)0x2da4843a, (q31_t)0x2d9ea569,\n    (q31_t)0x2d98c67d, (q31_t)0x2d92e774, (q31_t)0x2d8d084f, (q31_t)0x2d87290f,\n    (q31_t)0x2d8149b2, (q31_t)0x2d7b6a39, (q31_t)0x2d758aa4, (q31_t)0x2d6faaf3,\n    (q31_t)0x2d69cb26, (q31_t)0x2d63eb3d, (q31_t)0x2d5e0b38, (q31_t)0x2d582b17,\n    (q31_t)0x2d524ada, (q31_t)0x2d4c6a81, (q31_t)0x2d468a0c, (q31_t)0x2d40a97b,\n    (q31_t)0x2d3ac8ce, (q31_t)0x2d34e805, (q31_t)0x2d2f0721, (q31_t)0x2d292620,\n    (q31_t)0x2d234504, (q31_t)0x2d1d63cc, (q31_t)0x2d178278, (q31_t)0x2d11a108,\n    (q31_t)0x2d0bbf7d, (q31_t)0x2d05ddd5, (q31_t)0x2cfffc12, (q31_t)0x2cfa1a33,\n    (q31_t)0x2cf43839, (q31_t)0x2cee5622, (q31_t)0x2ce873f0, (q31_t)0x2ce291a2,\n    (q31_t)0x2cdcaf39, (q31_t)0x2cd6ccb4, (q31_t)0x2cd0ea13, (q31_t)0x2ccb0756,\n    (q31_t)0x2cc5247e, (q31_t)0x2cbf418b, (q31_t)0x2cb95e7b, (q31_t)0x2cb37b51,\n    (q31_t)0x2cad980a, (q31_t)0x2ca7b4a8, (q31_t)0x2ca1d12a, (q31_t)0x2c9bed91,\n    (q31_t)0x2c9609dd, (q31_t)0x2c90260d, (q31_t)0x2c8a4221, (q31_t)0x2c845e1a,\n    (q31_t)0x2c7e79f7, (q31_t)0x2c7895b9, (q31_t)0x2c72b160, (q31_t)0x2c6ccceb,\n    (q31_t)0x2c66e85b, (q31_t)0x2c6103af, (q31_t)0x2c5b1ee8, (q31_t)0x2c553a06,\n    (q31_t)0x2c4f5508, (q31_t)0x2c496fef, (q31_t)0x2c438abb, (q31_t)0x2c3da56b,\n    (q31_t)0x2c37c000, (q31_t)0x2c31da7a, (q31_t)0x2c2bf4d8, (q31_t)0x2c260f1c,\n    (q31_t)0x2c202944, (q31_t)0x2c1a4351, (q31_t)0x2c145d42, (q31_t)0x2c0e7719,\n    (q31_t)0x2c0890d4, (q31_t)0x2c02aa74, (q31_t)0x2bfcc3f9, (q31_t)0x2bf6dd63,\n    (q31_t)0x2bf0f6b1, (q31_t)0x2beb0fe5, (q31_t)0x2be528fd, (q31_t)0x2bdf41fb,\n    (q31_t)0x2bd95add, (q31_t)0x2bd373a4, (q31_t)0x2bcd8c51, (q31_t)0x2bc7a4e2,\n    (q31_t)0x2bc1bd58, (q31_t)0x2bbbd5b3, (q31_t)0x2bb5edf4, (q31_t)0x2bb00619,\n    (q31_t)0x2baa1e23, (q31_t)0x2ba43613, (q31_t)0x2b9e4de7, (q31_t)0x2b9865a1,\n    (q31_t)0x2b927d3f, (q31_t)0x2b8c94c3, (q31_t)0x2b86ac2c, (q31_t)0x2b80c37a,\n    (q31_t)0x2b7adaae, (q31_t)0x2b74f1c6, (q31_t)0x2b6f08c4, (q31_t)0x2b691fa6,\n    (q31_t)0x2b63366f, (q31_t)0x2b5d4d1c, (q31_t)0x2b5763ae, (q31_t)0x2b517a26,\n    (q31_t)0x2b4b9083, (q31_t)0x2b45a6c6, (q31_t)0x2b3fbced, (q31_t)0x2b39d2fa,\n    (q31_t)0x2b33e8ed, (q31_t)0x2b2dfec5, (q31_t)0x2b281482, (q31_t)0x2b222a24,\n    (q31_t)0x2b1c3fac, (q31_t)0x2b165519, (q31_t)0x2b106a6c, (q31_t)0x2b0a7fa4,\n    (q31_t)0x2b0494c2, (q31_t)0x2afea9c5, (q31_t)0x2af8bead, (q31_t)0x2af2d37b,\n    (q31_t)0x2aece82f, (q31_t)0x2ae6fcc8, (q31_t)0x2ae11146, (q31_t)0x2adb25aa,\n    (q31_t)0x2ad539f4, (q31_t)0x2acf4e23, (q31_t)0x2ac96238, (q31_t)0x2ac37633,\n    (q31_t)0x2abd8a13, (q31_t)0x2ab79dd8, (q31_t)0x2ab1b184, (q31_t)0x2aabc515,\n    (q31_t)0x2aa5d88b, (q31_t)0x2a9febe8, (q31_t)0x2a99ff2a, (q31_t)0x2a941252,\n    (q31_t)0x2a8e255f, (q31_t)0x2a883853, (q31_t)0x2a824b2c, (q31_t)0x2a7c5deb,\n    (q31_t)0x2a76708f, (q31_t)0x2a70831a, (q31_t)0x2a6a958a, (q31_t)0x2a64a7e0,\n    (q31_t)0x2a5eba1c, (q31_t)0x2a58cc3e, (q31_t)0x2a52de46, (q31_t)0x2a4cf033,\n    (q31_t)0x2a470207, (q31_t)0x2a4113c0, (q31_t)0x2a3b2560, (q31_t)0x2a3536e5,\n    (q31_t)0x2a2f4850, (q31_t)0x2a2959a1, (q31_t)0x2a236ad9, (q31_t)0x2a1d7bf6,\n    (q31_t)0x2a178cf9, (q31_t)0x2a119de2, (q31_t)0x2a0baeb2, (q31_t)0x2a05bf67,\n    (q31_t)0x29ffd003, (q31_t)0x29f9e084, (q31_t)0x29f3f0ec, (q31_t)0x29ee013a,\n    (q31_t)0x29e8116e, (q31_t)0x29e22188, (q31_t)0x29dc3188, (q31_t)0x29d6416f,\n    (q31_t)0x29d0513b, (q31_t)0x29ca60ee, (q31_t)0x29c47087, (q31_t)0x29be8007,\n    (q31_t)0x29b88f6c, (q31_t)0x29b29eb8, (q31_t)0x29acadea, (q31_t)0x29a6bd02,\n    (q31_t)0x29a0cc01, (q31_t)0x299adae6, (q31_t)0x2994e9b1, (q31_t)0x298ef863,\n    (q31_t)0x298906fb, (q31_t)0x2983157a, (q31_t)0x297d23df, (q31_t)0x2977322a,\n    (q31_t)0x2971405b, (q31_t)0x296b4e74, (q31_t)0x29655c72, (q31_t)0x295f6a57,\n    (q31_t)0x29597823, (q31_t)0x295385d5, (q31_t)0x294d936d, (q31_t)0x2947a0ec,\n    (q31_t)0x2941ae52, (q31_t)0x293bbb9e, (q31_t)0x2935c8d1, (q31_t)0x292fd5ea,\n    (q31_t)0x2929e2ea, (q31_t)0x2923efd0, (q31_t)0x291dfc9d, (q31_t)0x29180951,\n    (q31_t)0x291215eb, (q31_t)0x290c226c, (q31_t)0x29062ed4, (q31_t)0x29003b23,\n    (q31_t)0x28fa4758, (q31_t)0x28f45374, (q31_t)0x28ee5f76, (q31_t)0x28e86b5f,\n    (q31_t)0x28e27730, (q31_t)0x28dc82e6, (q31_t)0x28d68e84, (q31_t)0x28d09a09,\n    (q31_t)0x28caa574, (q31_t)0x28c4b0c6, (q31_t)0x28bebbff, (q31_t)0x28b8c71f,\n    (q31_t)0x28b2d226, (q31_t)0x28acdd13, (q31_t)0x28a6e7e8, (q31_t)0x28a0f2a3,\n    (q31_t)0x289afd46, (q31_t)0x289507cf, (q31_t)0x288f123f, (q31_t)0x28891c97,\n    (q31_t)0x288326d5, (q31_t)0x287d30fa, (q31_t)0x28773b07, (q31_t)0x287144fa,\n    (q31_t)0x286b4ed5, (q31_t)0x28655896, (q31_t)0x285f623f, (q31_t)0x28596bce,\n    (q31_t)0x28537545, (q31_t)0x284d7ea3, (q31_t)0x284787e8, (q31_t)0x28419114,\n    (q31_t)0x283b9a28, (q31_t)0x2835a322, (q31_t)0x282fac04, (q31_t)0x2829b4cd,\n    (q31_t)0x2823bd7d, (q31_t)0x281dc615, (q31_t)0x2817ce93, (q31_t)0x2811d6f9,\n    (q31_t)0x280bdf46, (q31_t)0x2805e77b, (q31_t)0x27ffef97, (q31_t)0x27f9f79a,\n    (q31_t)0x27f3ff85, (q31_t)0x27ee0756, (q31_t)0x27e80f10, (q31_t)0x27e216b0,\n    (q31_t)0x27dc1e38, (q31_t)0x27d625a8, (q31_t)0x27d02cff, (q31_t)0x27ca343d,\n    (q31_t)0x27c43b63, (q31_t)0x27be4270, (q31_t)0x27b84965, (q31_t)0x27b25041,\n    (q31_t)0x27ac5705, (q31_t)0x27a65db0, (q31_t)0x27a06443, (q31_t)0x279a6abd,\n    (q31_t)0x2794711f, (q31_t)0x278e7768, (q31_t)0x27887d99, (q31_t)0x278283b2,\n    (q31_t)0x277c89b3, (q31_t)0x27768f9b, (q31_t)0x2770956a, (q31_t)0x276a9b21,\n    (q31_t)0x2764a0c0, (q31_t)0x275ea647, (q31_t)0x2758abb6, (q31_t)0x2752b10c,\n    (q31_t)0x274cb64a, (q31_t)0x2746bb6f, (q31_t)0x2740c07d, (q31_t)0x273ac572,\n    (q31_t)0x2734ca4f, (q31_t)0x272ecf14, (q31_t)0x2728d3c0, (q31_t)0x2722d855,\n    (q31_t)0x271cdcd1, (q31_t)0x2716e136, (q31_t)0x2710e582, (q31_t)0x270ae9b6,\n    (q31_t)0x2704edd2, (q31_t)0x26fef1d5, (q31_t)0x26f8f5c1, (q31_t)0x26f2f995,\n    (q31_t)0x26ecfd51, (q31_t)0x26e700f5, (q31_t)0x26e10480, (q31_t)0x26db07f4,\n    (q31_t)0x26d50b50, (q31_t)0x26cf0e94, (q31_t)0x26c911c0, (q31_t)0x26c314d4,\n    (q31_t)0x26bd17d0, (q31_t)0x26b71ab4, (q31_t)0x26b11d80, (q31_t)0x26ab2034,\n    (q31_t)0x26a522d1, (q31_t)0x269f2556, (q31_t)0x269927c3, (q31_t)0x26932a18,\n    (q31_t)0x268d2c55, (q31_t)0x26872e7b, (q31_t)0x26813088, (q31_t)0x267b327e,\n    (q31_t)0x2675345d, (q31_t)0x266f3623, (q31_t)0x266937d2, (q31_t)0x26633969,\n    (q31_t)0x265d3ae9, (q31_t)0x26573c50, (q31_t)0x26513da1, (q31_t)0x264b3ed9,\n    (q31_t)0x26453ffa, (q31_t)0x263f4103, (q31_t)0x263941f5, (q31_t)0x263342cf,\n    (q31_t)0x262d4392, (q31_t)0x2627443d, (q31_t)0x262144d0, (q31_t)0x261b454c,\n    (q31_t)0x261545b0, (q31_t)0x260f45fd, (q31_t)0x26094633, (q31_t)0x26034651,\n    (q31_t)0x25fd4657, (q31_t)0x25f74646, (q31_t)0x25f1461e, (q31_t)0x25eb45de,\n    (q31_t)0x25e54587, (q31_t)0x25df4519, (q31_t)0x25d94493, (q31_t)0x25d343f6,\n    (q31_t)0x25cd4341, (q31_t)0x25c74276, (q31_t)0x25c14192, (q31_t)0x25bb4098,\n    (q31_t)0x25b53f86, (q31_t)0x25af3e5d, (q31_t)0x25a93d1d, (q31_t)0x25a33bc6,\n    (q31_t)0x259d3a57, (q31_t)0x259738d1, (q31_t)0x25913734, (q31_t)0x258b3580,\n    (q31_t)0x258533b5, (q31_t)0x257f31d2, (q31_t)0x25792fd8, (q31_t)0x25732dc8,\n    (q31_t)0x256d2ba0, (q31_t)0x25672961, (q31_t)0x2561270b, (q31_t)0x255b249e,\n    (q31_t)0x2555221a, (q31_t)0x254f1f7e, (q31_t)0x25491ccc, (q31_t)0x25431a03,\n    (q31_t)0x253d1723, (q31_t)0x2537142c, (q31_t)0x2531111e, (q31_t)0x252b0df9,\n    (q31_t)0x25250abd, (q31_t)0x251f076a, (q31_t)0x25190400, (q31_t)0x25130080,\n    (q31_t)0x250cfce8, (q31_t)0x2506f93a, (q31_t)0x2500f574, (q31_t)0x24faf198,\n    (q31_t)0x24f4eda6, (q31_t)0x24eee99c, (q31_t)0x24e8e57c, (q31_t)0x24e2e144,\n    (q31_t)0x24dcdcf6, (q31_t)0x24d6d892, (q31_t)0x24d0d416, (q31_t)0x24cacf84,\n    (q31_t)0x24c4cadb, (q31_t)0x24bec61c, (q31_t)0x24b8c146, (q31_t)0x24b2bc59,\n    (q31_t)0x24acb756, (q31_t)0x24a6b23b, (q31_t)0x24a0ad0b, (q31_t)0x249aa7c4,\n    (q31_t)0x2494a266, (q31_t)0x248e9cf1, (q31_t)0x24889766, (q31_t)0x248291c5,\n    (q31_t)0x247c8c0d, (q31_t)0x2476863e, (q31_t)0x24708059, (q31_t)0x246a7a5e,\n    (q31_t)0x2464744c, (q31_t)0x245e6e23, (q31_t)0x245867e4, (q31_t)0x2452618f,\n    (q31_t)0x244c5b24, (q31_t)0x244654a1, (q31_t)0x24404e09, (q31_t)0x243a475a,\n    (q31_t)0x24344095, (q31_t)0x242e39ba, (q31_t)0x242832c8, (q31_t)0x24222bc0,\n    (q31_t)0x241c24a1, (q31_t)0x24161d6d, (q31_t)0x24101622, (q31_t)0x240a0ec1,\n    (q31_t)0x24040749, (q31_t)0x23fdffbc, (q31_t)0x23f7f818, (q31_t)0x23f1f05e,\n    (q31_t)0x23ebe88e, (q31_t)0x23e5e0a7, (q31_t)0x23dfd8ab, (q31_t)0x23d9d098,\n    (q31_t)0x23d3c86f, (q31_t)0x23cdc031, (q31_t)0x23c7b7dc, (q31_t)0x23c1af71,\n    (q31_t)0x23bba6f0, (q31_t)0x23b59e59, (q31_t)0x23af95ac, (q31_t)0x23a98ce8,\n    (q31_t)0x23a3840f, (q31_t)0x239d7b20, (q31_t)0x2397721b, (q31_t)0x23916900,\n    (q31_t)0x238b5fcf, (q31_t)0x23855688, (q31_t)0x237f4d2b, (q31_t)0x237943b9,\n    (q31_t)0x23733a30, (q31_t)0x236d3092, (q31_t)0x236726dd, (q31_t)0x23611d13,\n    (q31_t)0x235b1333, (q31_t)0x2355093e, (q31_t)0x234eff32, (q31_t)0x2348f511,\n    (q31_t)0x2342eada, (q31_t)0x233ce08d, (q31_t)0x2336d62a, (q31_t)0x2330cbb2,\n    (q31_t)0x232ac124, (q31_t)0x2324b680, (q31_t)0x231eabc7, (q31_t)0x2318a0f8,\n    (q31_t)0x23129613, (q31_t)0x230c8b19, (q31_t)0x23068009, (q31_t)0x230074e3,\n    (q31_t)0x22fa69a8, (q31_t)0x22f45e57, (q31_t)0x22ee52f1, (q31_t)0x22e84775,\n    (q31_t)0x22e23be4, (q31_t)0x22dc303d, (q31_t)0x22d62480, (q31_t)0x22d018ae,\n    (q31_t)0x22ca0cc7, (q31_t)0x22c400ca, (q31_t)0x22bdf4b8, (q31_t)0x22b7e890,\n    (q31_t)0x22b1dc53, (q31_t)0x22abd001, (q31_t)0x22a5c399, (q31_t)0x229fb71b,\n    (q31_t)0x2299aa89, (q31_t)0x22939de1, (q31_t)0x228d9123, (q31_t)0x22878451,\n    (q31_t)0x22817769, (q31_t)0x227b6a6c, (q31_t)0x22755d59, (q31_t)0x226f5032,\n    (q31_t)0x226942f5, (q31_t)0x226335a2, (q31_t)0x225d283b, (q31_t)0x22571abe,\n    (q31_t)0x22510d2d, (q31_t)0x224aff86, (q31_t)0x2244f1c9, (q31_t)0x223ee3f8,\n    (q31_t)0x2238d612, (q31_t)0x2232c816, (q31_t)0x222cba06, (q31_t)0x2226abe0,\n    (q31_t)0x22209da5, (q31_t)0x221a8f56, (q31_t)0x221480f1, (q31_t)0x220e7277,\n    (q31_t)0x220863e8, (q31_t)0x22025544, (q31_t)0x21fc468b, (q31_t)0x21f637be,\n    (q31_t)0x21f028db, (q31_t)0x21ea19e3, (q31_t)0x21e40ad7, (q31_t)0x21ddfbb5,\n    (q31_t)0x21d7ec7f, (q31_t)0x21d1dd34, (q31_t)0x21cbcdd3, (q31_t)0x21c5be5e,\n    (q31_t)0x21bfaed5, (q31_t)0x21b99f36, (q31_t)0x21b38f83, (q31_t)0x21ad7fba,\n    (q31_t)0x21a76fdd, (q31_t)0x21a15fec, (q31_t)0x219b4fe5, (q31_t)0x21953fca,\n    (q31_t)0x218f2f9a, (q31_t)0x21891f55, (q31_t)0x21830efc, (q31_t)0x217cfe8e,\n    (q31_t)0x2176ee0b, (q31_t)0x2170dd74, (q31_t)0x216accc8, (q31_t)0x2164bc08,\n    (q31_t)0x215eab33, (q31_t)0x21589a49, (q31_t)0x2152894b, (q31_t)0x214c7838,\n    (q31_t)0x21466710, (q31_t)0x214055d4, (q31_t)0x213a4484, (q31_t)0x2134331f,\n    (q31_t)0x212e21a6, (q31_t)0x21281018, (q31_t)0x2121fe76, (q31_t)0x211becbf,\n    (q31_t)0x2115daf4, (q31_t)0x210fc914, (q31_t)0x2109b720, (q31_t)0x2103a518,\n    (q31_t)0x20fd92fb, (q31_t)0x20f780ca, (q31_t)0x20f16e84, (q31_t)0x20eb5c2b,\n    (q31_t)0x20e549bd, (q31_t)0x20df373a, (q31_t)0x20d924a4, (q31_t)0x20d311f9,\n    (q31_t)0x20ccff3a, (q31_t)0x20c6ec66, (q31_t)0x20c0d97f, (q31_t)0x20bac683,\n    (q31_t)0x20b4b373, (q31_t)0x20aea04f, (q31_t)0x20a88d17, (q31_t)0x20a279ca,\n    (q31_t)0x209c666a, (q31_t)0x209652f5, (q31_t)0x20903f6c, (q31_t)0x208a2bcf,\n    (q31_t)0x2084181e, (q31_t)0x207e0459, (q31_t)0x2077f080, (q31_t)0x2071dc93,\n    (q31_t)0x206bc892, (q31_t)0x2065b47d, (q31_t)0x205fa054, (q31_t)0x20598c17,\n    (q31_t)0x205377c6, (q31_t)0x204d6361, (q31_t)0x20474ee8, (q31_t)0x20413a5b,\n    (q31_t)0x203b25bb, (q31_t)0x20351106, (q31_t)0x202efc3e, (q31_t)0x2028e761,\n    (q31_t)0x2022d271, (q31_t)0x201cbd6d, (q31_t)0x2016a856, (q31_t)0x2010932a,\n    (q31_t)0x200a7deb, (q31_t)0x20046898, (q31_t)0x1ffe5331, (q31_t)0x1ff83db6,\n    (q31_t)0x1ff22828, (q31_t)0x1fec1286, (q31_t)0x1fe5fcd0, (q31_t)0x1fdfe707,\n    (q31_t)0x1fd9d12a, (q31_t)0x1fd3bb39, (q31_t)0x1fcda535, (q31_t)0x1fc78f1d,\n    (q31_t)0x1fc178f1, (q31_t)0x1fbb62b2, (q31_t)0x1fb54c60, (q31_t)0x1faf35f9,\n    (q31_t)0x1fa91f80, (q31_t)0x1fa308f2, (q31_t)0x1f9cf252, (q31_t)0x1f96db9d,\n    (q31_t)0x1f90c4d5, (q31_t)0x1f8aadfa, (q31_t)0x1f84970b, (q31_t)0x1f7e8009,\n    (q31_t)0x1f7868f4, (q31_t)0x1f7251ca, (q31_t)0x1f6c3a8e, (q31_t)0x1f66233e,\n    (q31_t)0x1f600bdb, (q31_t)0x1f59f465, (q31_t)0x1f53dcdb, (q31_t)0x1f4dc53d,\n    (q31_t)0x1f47ad8d, (q31_t)0x1f4195c9, (q31_t)0x1f3b7df2, (q31_t)0x1f356608,\n    (q31_t)0x1f2f4e0a, (q31_t)0x1f2935f9, (q31_t)0x1f231dd5, (q31_t)0x1f1d059e,\n    (q31_t)0x1f16ed54, (q31_t)0x1f10d4f6, (q31_t)0x1f0abc85, (q31_t)0x1f04a401,\n    (q31_t)0x1efe8b6a, (q31_t)0x1ef872c0, (q31_t)0x1ef25a03, (q31_t)0x1eec4132,\n    (q31_t)0x1ee6284f, (q31_t)0x1ee00f58, (q31_t)0x1ed9f64f, (q31_t)0x1ed3dd32,\n    (q31_t)0x1ecdc402, (q31_t)0x1ec7aac0, (q31_t)0x1ec1916a, (q31_t)0x1ebb7802,\n    (q31_t)0x1eb55e86, (q31_t)0x1eaf44f8, (q31_t)0x1ea92b56, (q31_t)0x1ea311a2,\n    (q31_t)0x1e9cf7db, (q31_t)0x1e96de01, (q31_t)0x1e90c414, (q31_t)0x1e8aaa14,\n    (q31_t)0x1e849001, (q31_t)0x1e7e75dc, (q31_t)0x1e785ba3, (q31_t)0x1e724158,\n    (q31_t)0x1e6c26fa, (q31_t)0x1e660c8a, (q31_t)0x1e5ff206, (q31_t)0x1e59d770,\n    (q31_t)0x1e53bcc7, (q31_t)0x1e4da20c, (q31_t)0x1e47873d, (q31_t)0x1e416c5d,\n    (q31_t)0x1e3b5169, (q31_t)0x1e353663, (q31_t)0x1e2f1b4a, (q31_t)0x1e29001e,\n    (q31_t)0x1e22e4e0, (q31_t)0x1e1cc990, (q31_t)0x1e16ae2c, (q31_t)0x1e1092b6,\n    (q31_t)0x1e0a772e, (q31_t)0x1e045b93, (q31_t)0x1dfe3fe6, (q31_t)0x1df82426,\n    (q31_t)0x1df20853, (q31_t)0x1debec6f, (q31_t)0x1de5d077, (q31_t)0x1ddfb46e,\n    (q31_t)0x1dd99851, (q31_t)0x1dd37c23, (q31_t)0x1dcd5fe2, (q31_t)0x1dc7438e,\n    (q31_t)0x1dc12729, (q31_t)0x1dbb0ab0, (q31_t)0x1db4ee26, (q31_t)0x1daed189,\n    (q31_t)0x1da8b4da, (q31_t)0x1da29819, (q31_t)0x1d9c7b45, (q31_t)0x1d965e5f,\n    (q31_t)0x1d904167, (q31_t)0x1d8a245c, (q31_t)0x1d840740, (q31_t)0x1d7dea11,\n    (q31_t)0x1d77ccd0, (q31_t)0x1d71af7d, (q31_t)0x1d6b9217, (q31_t)0x1d6574a0,\n    (q31_t)0x1d5f5716, (q31_t)0x1d59397a, (q31_t)0x1d531bcc, (q31_t)0x1d4cfe0d,\n    (q31_t)0x1d46e03a, (q31_t)0x1d40c256, (q31_t)0x1d3aa460, (q31_t)0x1d348658,\n    (q31_t)0x1d2e683e, (q31_t)0x1d284a12, (q31_t)0x1d222bd3, (q31_t)0x1d1c0d83,\n    (q31_t)0x1d15ef21, (q31_t)0x1d0fd0ad, (q31_t)0x1d09b227, (q31_t)0x1d03938f,\n    (q31_t)0x1cfd74e5, (q31_t)0x1cf7562a, (q31_t)0x1cf1375c, (q31_t)0x1ceb187d,\n    (q31_t)0x1ce4f98c, (q31_t)0x1cdeda89, (q31_t)0x1cd8bb74, (q31_t)0x1cd29c4d,\n    (q31_t)0x1ccc7d15, (q31_t)0x1cc65dca, (q31_t)0x1cc03e6e, (q31_t)0x1cba1f01,\n    (q31_t)0x1cb3ff81, (q31_t)0x1caddff0, (q31_t)0x1ca7c04d, (q31_t)0x1ca1a099,\n    (q31_t)0x1c9b80d3, (q31_t)0x1c9560fb, (q31_t)0x1c8f4112, (q31_t)0x1c892117,\n    (q31_t)0x1c83010a, (q31_t)0x1c7ce0ec, (q31_t)0x1c76c0bc, (q31_t)0x1c70a07b,\n    (q31_t)0x1c6a8028, (q31_t)0x1c645fc3, (q31_t)0x1c5e3f4d, (q31_t)0x1c581ec6,\n    (q31_t)0x1c51fe2d, (q31_t)0x1c4bdd83, (q31_t)0x1c45bcc7, (q31_t)0x1c3f9bf9,\n    (q31_t)0x1c397b1b, (q31_t)0x1c335a2b, (q31_t)0x1c2d3929, (q31_t)0x1c271816,\n    (q31_t)0x1c20f6f2, (q31_t)0x1c1ad5bc, (q31_t)0x1c14b475, (q31_t)0x1c0e931d,\n    (q31_t)0x1c0871b4, (q31_t)0x1c025039, (q31_t)0x1bfc2ead, (q31_t)0x1bf60d0f,\n    (q31_t)0x1befeb60, (q31_t)0x1be9c9a1, (q31_t)0x1be3a7cf, (q31_t)0x1bdd85ed,\n    (q31_t)0x1bd763fa, (q31_t)0x1bd141f5, (q31_t)0x1bcb1fdf, (q31_t)0x1bc4fdb8,\n    (q31_t)0x1bbedb80, (q31_t)0x1bb8b937, (q31_t)0x1bb296dc, (q31_t)0x1bac7471,\n    (q31_t)0x1ba651f5, (q31_t)0x1ba02f67, (q31_t)0x1b9a0cc8, (q31_t)0x1b93ea19,\n    (q31_t)0x1b8dc758, (q31_t)0x1b87a487, (q31_t)0x1b8181a4, (q31_t)0x1b7b5eb0,\n    (q31_t)0x1b753bac, (q31_t)0x1b6f1897, (q31_t)0x1b68f570, (q31_t)0x1b62d239,\n    (q31_t)0x1b5caef1, (q31_t)0x1b568b98, (q31_t)0x1b50682e, (q31_t)0x1b4a44b3,\n    (q31_t)0x1b442127, (q31_t)0x1b3dfd8b, (q31_t)0x1b37d9de, (q31_t)0x1b31b620,\n    (q31_t)0x1b2b9251, (q31_t)0x1b256e71, (q31_t)0x1b1f4a81, (q31_t)0x1b192680,\n    (q31_t)0x1b13026e, (q31_t)0x1b0cde4c, (q31_t)0x1b06ba19, (q31_t)0x1b0095d5,\n    (q31_t)0x1afa7180, (q31_t)0x1af44d1b, (q31_t)0x1aee28a6, (q31_t)0x1ae8041f,\n    (q31_t)0x1ae1df88, (q31_t)0x1adbbae1, (q31_t)0x1ad59629, (q31_t)0x1acf7160,\n    (q31_t)0x1ac94c87, (q31_t)0x1ac3279d, (q31_t)0x1abd02a3, (q31_t)0x1ab6dd98,\n    (q31_t)0x1ab0b87d, (q31_t)0x1aaa9352, (q31_t)0x1aa46e16, (q31_t)0x1a9e48c9,\n    (q31_t)0x1a98236c, (q31_t)0x1a91fdff, (q31_t)0x1a8bd881, (q31_t)0x1a85b2f3,\n    (q31_t)0x1a7f8d54, (q31_t)0x1a7967a6, (q31_t)0x1a7341e6, (q31_t)0x1a6d1c17,\n    (q31_t)0x1a66f637, (q31_t)0x1a60d047, (q31_t)0x1a5aaa47, (q31_t)0x1a548436,\n    (q31_t)0x1a4e5e15, (q31_t)0x1a4837e4, (q31_t)0x1a4211a3, (q31_t)0x1a3beb52,\n    (q31_t)0x1a35c4f0, (q31_t)0x1a2f9e7e, (q31_t)0x1a2977fc, (q31_t)0x1a23516a,\n    (q31_t)0x1a1d2ac8, (q31_t)0x1a170416, (q31_t)0x1a10dd53, (q31_t)0x1a0ab681,\n    (q31_t)0x1a048f9e, (q31_t)0x19fe68ac, (q31_t)0x19f841a9, (q31_t)0x19f21a96,\n    (q31_t)0x19ebf374, (q31_t)0x19e5cc41, (q31_t)0x19dfa4fe, (q31_t)0x19d97dac,\n    (q31_t)0x19d35649, (q31_t)0x19cd2ed7, (q31_t)0x19c70754, (q31_t)0x19c0dfc2,\n    (q31_t)0x19bab820, (q31_t)0x19b4906e, (q31_t)0x19ae68ac, (q31_t)0x19a840da,\n    (q31_t)0x19a218f9, (q31_t)0x199bf107, (q31_t)0x1995c906, (q31_t)0x198fa0f5,\n    (q31_t)0x198978d4, (q31_t)0x198350a4, (q31_t)0x197d2864, (q31_t)0x19770014,\n    (q31_t)0x1970d7b4, (q31_t)0x196aaf45, (q31_t)0x196486c6, (q31_t)0x195e5e37,\n    (q31_t)0x19583599, (q31_t)0x19520ceb, (q31_t)0x194be42d, (q31_t)0x1945bb60,\n    (q31_t)0x193f9283, (q31_t)0x19396997, (q31_t)0x1933409b, (q31_t)0x192d178f,\n    (q31_t)0x1926ee74, (q31_t)0x1920c54a, (q31_t)0x191a9c10, (q31_t)0x191472c6,\n    (q31_t)0x190e496d, (q31_t)0x19082005, (q31_t)0x1901f68d, (q31_t)0x18fbcd06,\n    (q31_t)0x18f5a36f, (q31_t)0x18ef79c9, (q31_t)0x18e95014, (q31_t)0x18e3264f,\n    (q31_t)0x18dcfc7b, (q31_t)0x18d6d297, (q31_t)0x18d0a8a4, (q31_t)0x18ca7ea2,\n    (q31_t)0x18c45491, (q31_t)0x18be2a70, (q31_t)0x18b80040, (q31_t)0x18b1d601,\n    (q31_t)0x18ababb2, (q31_t)0x18a58154, (q31_t)0x189f56e8, (q31_t)0x18992c6b,\n    (q31_t)0x189301e0, (q31_t)0x188cd746, (q31_t)0x1886ac9c, (q31_t)0x188081e4,\n    (q31_t)0x187a571c, (q31_t)0x18742c45, (q31_t)0x186e015f, (q31_t)0x1867d66a,\n    (q31_t)0x1861ab66, (q31_t)0x185b8053, (q31_t)0x18555530, (q31_t)0x184f29ff,\n    (q31_t)0x1848febf, (q31_t)0x1842d370, (q31_t)0x183ca812, (q31_t)0x18367ca5,\n    (q31_t)0x18305129, (q31_t)0x182a259e, (q31_t)0x1823fa04, (q31_t)0x181dce5b,\n    (q31_t)0x1817a2a4, (q31_t)0x181176dd, (q31_t)0x180b4b08, (q31_t)0x18051f24,\n    (q31_t)0x17fef331, (q31_t)0x17f8c72f, (q31_t)0x17f29b1e, (q31_t)0x17ec6eff,\n    (q31_t)0x17e642d1, (q31_t)0x17e01694, (q31_t)0x17d9ea49, (q31_t)0x17d3bdee,\n    (q31_t)0x17cd9186, (q31_t)0x17c7650e, (q31_t)0x17c13888, (q31_t)0x17bb0bf3,\n    (q31_t)0x17b4df4f, (q31_t)0x17aeb29d, (q31_t)0x17a885dc, (q31_t)0x17a2590d,\n    (q31_t)0x179c2c2f, (q31_t)0x1795ff42, (q31_t)0x178fd247, (q31_t)0x1789a53d,\n    (q31_t)0x17837825, (q31_t)0x177d4afe, (q31_t)0x17771dc9, (q31_t)0x1770f086,\n    (q31_t)0x176ac333, (q31_t)0x176495d3, (q31_t)0x175e6864, (q31_t)0x17583ae7,\n    (q31_t)0x17520d5b, (q31_t)0x174bdfc1, (q31_t)0x1745b218, (q31_t)0x173f8461,\n    (q31_t)0x1739569c, (q31_t)0x173328c8, (q31_t)0x172cfae6, (q31_t)0x1726ccf6,\n    (q31_t)0x17209ef8, (q31_t)0x171a70eb, (q31_t)0x171442d0, (q31_t)0x170e14a7,\n    (q31_t)0x1707e670, (q31_t)0x1701b82a, (q31_t)0x16fb89d6, (q31_t)0x16f55b74,\n    (q31_t)0x16ef2d04, (q31_t)0x16e8fe86, (q31_t)0x16e2cff9, (q31_t)0x16dca15f,\n    (q31_t)0x16d672b6, (q31_t)0x16d043ff, (q31_t)0x16ca153a, (q31_t)0x16c3e667,\n    (q31_t)0x16bdb787, (q31_t)0x16b78898, (q31_t)0x16b1599b, (q31_t)0x16ab2a90,\n    (q31_t)0x16a4fb77, (q31_t)0x169ecc50, (q31_t)0x16989d1b, (q31_t)0x16926dd8,\n    (q31_t)0x168c3e87, (q31_t)0x16860f29, (q31_t)0x167fdfbc, (q31_t)0x1679b042,\n    (q31_t)0x167380ba, (q31_t)0x166d5123, (q31_t)0x1667217f, (q31_t)0x1660f1ce,\n    (q31_t)0x165ac20e, (q31_t)0x16549241, (q31_t)0x164e6266, (q31_t)0x1648327d,\n    (q31_t)0x16420286, (q31_t)0x163bd282, (q31_t)0x1635a270, (q31_t)0x162f7250,\n    (q31_t)0x16294222, (q31_t)0x162311e7, (q31_t)0x161ce19e, (q31_t)0x1616b148,\n    (q31_t)0x161080e4, (q31_t)0x160a5072, (q31_t)0x16041ff3, (q31_t)0x15fdef66,\n    (q31_t)0x15f7becc, (q31_t)0x15f18e24, (q31_t)0x15eb5d6e, (q31_t)0x15e52cab,\n    (q31_t)0x15defbdb, (q31_t)0x15d8cafd, (q31_t)0x15d29a11, (q31_t)0x15cc6918,\n    (q31_t)0x15c63812, (q31_t)0x15c006fe, (q31_t)0x15b9d5dd, (q31_t)0x15b3a4ae,\n    (q31_t)0x15ad7372, (q31_t)0x15a74228, (q31_t)0x15a110d2, (q31_t)0x159adf6e,\n    (q31_t)0x1594adfc, (q31_t)0x158e7c7d, (q31_t)0x15884af1, (q31_t)0x15821958,\n    (q31_t)0x157be7b1, (q31_t)0x1575b5fe, (q31_t)0x156f843c, (q31_t)0x1569526e,\n    (q31_t)0x15632093, (q31_t)0x155ceeaa, (q31_t)0x1556bcb4, (q31_t)0x15508ab1,\n    (q31_t)0x154a58a1, (q31_t)0x15442683, (q31_t)0x153df459, (q31_t)0x1537c221,\n    (q31_t)0x15318fdd, (q31_t)0x152b5d8b, (q31_t)0x15252b2c, (q31_t)0x151ef8c0,\n    (q31_t)0x1518c648, (q31_t)0x151293c2, (q31_t)0x150c612f, (q31_t)0x15062e8f,\n    (q31_t)0x14fffbe2, (q31_t)0x14f9c928, (q31_t)0x14f39662, (q31_t)0x14ed638e,\n    (q31_t)0x14e730ae, (q31_t)0x14e0fdc0, (q31_t)0x14dacac6, (q31_t)0x14d497bf,\n    (q31_t)0x14ce64ab, (q31_t)0x14c8318a, (q31_t)0x14c1fe5c, (q31_t)0x14bbcb22,\n    (q31_t)0x14b597da, (q31_t)0x14af6486, (q31_t)0x14a93125, (q31_t)0x14a2fdb8,\n    (q31_t)0x149cca3e, (q31_t)0x149696b7, (q31_t)0x14906323, (q31_t)0x148a2f82,\n    (q31_t)0x1483fbd5, (q31_t)0x147dc81c, (q31_t)0x14779455, (q31_t)0x14716082,\n    (q31_t)0x146b2ca3, (q31_t)0x1464f8b7, (q31_t)0x145ec4be, (q31_t)0x145890b9,\n    (q31_t)0x14525ca7, (q31_t)0x144c2888, (q31_t)0x1445f45d, (q31_t)0x143fc026,\n    (q31_t)0x14398be2, (q31_t)0x14335792, (q31_t)0x142d2335, (q31_t)0x1426eecb,\n    (q31_t)0x1420ba56, (q31_t)0x141a85d3, (q31_t)0x14145145, (q31_t)0x140e1caa,\n    (q31_t)0x1407e803, (q31_t)0x1401b34f, (q31_t)0x13fb7e8f, (q31_t)0x13f549c3,\n    (q31_t)0x13ef14ea, (q31_t)0x13e8e005, (q31_t)0x13e2ab14, (q31_t)0x13dc7616,\n    (q31_t)0x13d6410d, (q31_t)0x13d00bf7, (q31_t)0x13c9d6d4, (q31_t)0x13c3a1a6,\n    (q31_t)0x13bd6c6b, (q31_t)0x13b73725, (q31_t)0x13b101d2, (q31_t)0x13aacc73,\n    (q31_t)0x13a49707, (q31_t)0x139e6190, (q31_t)0x13982c0d, (q31_t)0x1391f67d,\n    (q31_t)0x138bc0e1, (q31_t)0x13858b3a, (q31_t)0x137f5586, (q31_t)0x13791fc6,\n    (q31_t)0x1372e9fb, (q31_t)0x136cb423, (q31_t)0x13667e3f, (q31_t)0x13604850,\n    (q31_t)0x135a1254, (q31_t)0x1353dc4c, (q31_t)0x134da639, (q31_t)0x1347701a,\n    (q31_t)0x134139ee, (q31_t)0x133b03b7, (q31_t)0x1334cd74, (q31_t)0x132e9725,\n    (q31_t)0x132860ca, (q31_t)0x13222a64, (q31_t)0x131bf3f2, (q31_t)0x1315bd73,\n    (q31_t)0x130f86ea, (q31_t)0x13095054, (q31_t)0x130319b3, (q31_t)0x12fce305,\n    (q31_t)0x12f6ac4d, (q31_t)0x12f07588, (q31_t)0x12ea3eb8, (q31_t)0x12e407dc,\n    (q31_t)0x12ddd0f4, (q31_t)0x12d79a01, (q31_t)0x12d16303, (q31_t)0x12cb2bf8,\n    (q31_t)0x12c4f4e2, (q31_t)0x12bebdc1, (q31_t)0x12b88693, (q31_t)0x12b24f5b,\n    (q31_t)0x12ac1817, (q31_t)0x12a5e0c7, (q31_t)0x129fa96c, (q31_t)0x12997205,\n    (q31_t)0x12933a93, (q31_t)0x128d0315, (q31_t)0x1286cb8c, (q31_t)0x128093f7,\n    (q31_t)0x127a5c57, (q31_t)0x127424ac, (q31_t)0x126decf5, (q31_t)0x1267b533,\n    (q31_t)0x12617d66, (q31_t)0x125b458d, (q31_t)0x12550da9, (q31_t)0x124ed5ba,\n    (q31_t)0x12489dbf, (q31_t)0x124265b9, (q31_t)0x123c2da8, (q31_t)0x1235f58b,\n    (q31_t)0x122fbd63, (q31_t)0x12298530, (q31_t)0x12234cf2, (q31_t)0x121d14a9,\n    (q31_t)0x1216dc54, (q31_t)0x1210a3f5, (q31_t)0x120a6b8a, (q31_t)0x12043314,\n    (q31_t)0x11fdfa93, (q31_t)0x11f7c207, (q31_t)0x11f18970, (q31_t)0x11eb50cd,\n    (q31_t)0x11e51820, (q31_t)0x11dedf68, (q31_t)0x11d8a6a4, (q31_t)0x11d26dd6,\n    (q31_t)0x11cc34fc, (q31_t)0x11c5fc18, (q31_t)0x11bfc329, (q31_t)0x11b98a2e,\n    (q31_t)0x11b35129, (q31_t)0x11ad1819, (q31_t)0x11a6defe, (q31_t)0x11a0a5d8,\n    (q31_t)0x119a6ca7, (q31_t)0x1194336b, (q31_t)0x118dfa25, (q31_t)0x1187c0d3,\n    (q31_t)0x11818777, (q31_t)0x117b4e10, (q31_t)0x1175149e, (q31_t)0x116edb22,\n    (q31_t)0x1168a19b, (q31_t)0x11626809, (q31_t)0x115c2e6c, (q31_t)0x1155f4c4,\n    (q31_t)0x114fbb12, (q31_t)0x11498156, (q31_t)0x1143478e, (q31_t)0x113d0dbc,\n    (q31_t)0x1136d3df, (q31_t)0x113099f8, (q31_t)0x112a6006, (q31_t)0x11242609,\n    (q31_t)0x111dec02, (q31_t)0x1117b1f0, (q31_t)0x111177d4, (q31_t)0x110b3dad,\n    (q31_t)0x1105037c, (q31_t)0x10fec940, (q31_t)0x10f88efa, (q31_t)0x10f254a9,\n    (q31_t)0x10ec1a4e, (q31_t)0x10e5dfe8, (q31_t)0x10dfa578, (q31_t)0x10d96afe,\n    (q31_t)0x10d33079, (q31_t)0x10ccf5ea, (q31_t)0x10c6bb50, (q31_t)0x10c080ac,\n    (q31_t)0x10ba45fe, (q31_t)0x10b40b45, (q31_t)0x10add082, (q31_t)0x10a795b5,\n    (q31_t)0x10a15ade, (q31_t)0x109b1ffc, (q31_t)0x1094e510, (q31_t)0x108eaa1a,\n    (q31_t)0x10886f19, (q31_t)0x1082340f, (q31_t)0x107bf8fa, (q31_t)0x1075bddb,\n    (q31_t)0x106f82b2, (q31_t)0x1069477f, (q31_t)0x10630c41, (q31_t)0x105cd0fa,\n    (q31_t)0x105695a8, (q31_t)0x10505a4d, (q31_t)0x104a1ee7, (q31_t)0x1043e377,\n    (q31_t)0x103da7fd, (q31_t)0x10376c79, (q31_t)0x103130ec, (q31_t)0x102af554,\n    (q31_t)0x1024b9b2, (q31_t)0x101e7e06, (q31_t)0x10184251, (q31_t)0x10120691,\n    (q31_t)0x100bcac7, (q31_t)0x10058ef4, (q31_t)0xfff5317,  (q31_t)0xff91730,\n    (q31_t)0xff2db3e,  (q31_t)0xfec9f44,  (q31_t)0xfe6633f,  (q31_t)0xfe02730,\n    (q31_t)0xfd9eb18,  (q31_t)0xfd3aef6,  (q31_t)0xfcd72ca,  (q31_t)0xfc73695,\n    (q31_t)0xfc0fa55,  (q31_t)0xfbabe0c,  (q31_t)0xfb481ba,  (q31_t)0xfae455d,\n    (q31_t)0xfa808f7,  (q31_t)0xfa1cc87,  (q31_t)0xf9b900e,  (q31_t)0xf95538b,\n    (q31_t)0xf8f16fe,  (q31_t)0xf88da68,  (q31_t)0xf829dc8,  (q31_t)0xf7c611f,\n    (q31_t)0xf76246c,  (q31_t)0xf6fe7af,  (q31_t)0xf69aae9,  (q31_t)0xf636e1a,\n    (q31_t)0xf5d3141,  (q31_t)0xf56f45e,  (q31_t)0xf50b773,  (q31_t)0xf4a7a7d,\n    (q31_t)0xf443d7e,  (q31_t)0xf3e0076,  (q31_t)0xf37c365,  (q31_t)0xf318649,\n    (q31_t)0xf2b4925,  (q31_t)0xf250bf7,  (q31_t)0xf1ecec0,  (q31_t)0xf189180,\n    (q31_t)0xf125436,  (q31_t)0xf0c16e3,  (q31_t)0xf05d987,  (q31_t)0xeff9c21,\n    (q31_t)0xef95eb2,  (q31_t)0xef3213a,  (q31_t)0xeece3b9,  (q31_t)0xee6a62f,\n    (q31_t)0xee0689b,  (q31_t)0xeda2afe,  (q31_t)0xed3ed58,  (q31_t)0xecdafa9,\n    (q31_t)0xec771f1,  (q31_t)0xec1342f,  (q31_t)0xebaf665,  (q31_t)0xeb4b891,\n    (q31_t)0xeae7ab4,  (q31_t)0xea83ccf,  (q31_t)0xea1fee0,  (q31_t)0xe9bc0e8,\n    (q31_t)0xe9582e7,  (q31_t)0xe8f44dd,  (q31_t)0xe8906cb,  (q31_t)0xe82c8af,\n    (q31_t)0xe7c8a8a,  (q31_t)0xe764c5c,  (q31_t)0xe700e26,  (q31_t)0xe69cfe6,\n    (q31_t)0xe63919e,  (q31_t)0xe5d534d,  (q31_t)0xe5714f3,  (q31_t)0xe50d690,\n    (q31_t)0xe4a9824,  (q31_t)0xe4459af,  (q31_t)0xe3e1b32,  (q31_t)0xe37dcac,\n    (q31_t)0xe319e1d,  (q31_t)0xe2b5f85,  (q31_t)0xe2520e5,  (q31_t)0xe1ee23c,\n    (q31_t)0xe18a38a,  (q31_t)0xe1264cf,  (q31_t)0xe0c260c,  (q31_t)0xe05e740,\n    (q31_t)0xdffa86b,  (q31_t)0xdf9698e,  (q31_t)0xdf32aa8,  (q31_t)0xdecebba,\n    (q31_t)0xde6acc3,  (q31_t)0xde06dc3,  (q31_t)0xdda2ebb,  (q31_t)0xdd3efab,\n    (q31_t)0xdcdb091,  (q31_t)0xdc77170,  (q31_t)0xdc13245,  (q31_t)0xdbaf313,\n    (q31_t)0xdb4b3d7,  (q31_t)0xdae7494,  (q31_t)0xda83548,  (q31_t)0xda1f5f3,\n    (q31_t)0xd9bb696,  (q31_t)0xd957731,  (q31_t)0xd8f37c3,  (q31_t)0xd88f84d,\n    (q31_t)0xd82b8cf,  (q31_t)0xd7c7948,  (q31_t)0xd7639b9,  (q31_t)0xd6ffa22,\n    (q31_t)0xd69ba82,  (q31_t)0xd637ada,  (q31_t)0xd5d3b2a,  (q31_t)0xd56fb71,\n    (q31_t)0xd50bbb1,  (q31_t)0xd4a7be8,  (q31_t)0xd443c17,  (q31_t)0xd3dfc3e,\n    (q31_t)0xd37bc5c,  (q31_t)0xd317c73,  (q31_t)0xd2b3c81,  (q31_t)0xd24fc87,\n    (q31_t)0xd1ebc85,  (q31_t)0xd187c7b,  (q31_t)0xd123c69,  (q31_t)0xd0bfc4f,\n    (q31_t)0xd05bc2d,  (q31_t)0xcff7c02,  (q31_t)0xcf93bd0,  (q31_t)0xcf2fb96,\n    (q31_t)0xcecbb53,  (q31_t)0xce67b09,  (q31_t)0xce03ab7,  (q31_t)0xcd9fa5d,\n    (q31_t)0xcd3b9fb,  (q31_t)0xccd7991,  (q31_t)0xcc7391f,  (q31_t)0xcc0f8a5,\n    (q31_t)0xcbab824,  (q31_t)0xcb4779a,  (q31_t)0xcae3709,  (q31_t)0xca7f670,\n    (q31_t)0xca1b5cf,  (q31_t)0xc9b7526,  (q31_t)0xc953475,  (q31_t)0xc8ef3bd,\n    (q31_t)0xc88b2fd,  (q31_t)0xc827235,  (q31_t)0xc7c3166,  (q31_t)0xc75f08f,\n    (q31_t)0xc6fafb0,  (q31_t)0xc696ec9,  (q31_t)0xc632ddb,  (q31_t)0xc5cece5,\n    (q31_t)0xc56abe8,  (q31_t)0xc506ae3,  (q31_t)0xc4a29d6,  (q31_t)0xc43e8c2,\n    (q31_t)0xc3da7a6,  (q31_t)0xc376683,  (q31_t)0xc312558,  (q31_t)0xc2ae425,\n    (q31_t)0xc24a2eb,  (q31_t)0xc1e61aa,  (q31_t)0xc182061,  (q31_t)0xc11df11,\n    (q31_t)0xc0b9db9,  (q31_t)0xc055c5a,  (q31_t)0xbff1af3,  (q31_t)0xbf8d985,\n    (q31_t)0xbf29810,  (q31_t)0xbec5693,  (q31_t)0xbe6150f,  (q31_t)0xbdfd383,\n    (q31_t)0xbd991f0,  (q31_t)0xbd35056,  (q31_t)0xbcd0eb5,  (q31_t)0xbc6cd0c,\n    (q31_t)0xbc08b5c,  (q31_t)0xbba49a5,  (q31_t)0xbb407e7,  (q31_t)0xbadc621,\n    (q31_t)0xba78454,  (q31_t)0xba14280,  (q31_t)0xb9b00a5,  (q31_t)0xb94bec2,\n    (q31_t)0xb8e7cd9,  (q31_t)0xb883ae8,  (q31_t)0xb81f8f0,  (q31_t)0xb7bb6f2,\n    (q31_t)0xb7574ec,  (q31_t)0xb6f32df,  (q31_t)0xb68f0cb,  (q31_t)0xb62aeaf,\n    (q31_t)0xb5c6c8d,  (q31_t)0xb562a64,  (q31_t)0xb4fe834,  (q31_t)0xb49a5fd,\n    (q31_t)0xb4363bf,  (q31_t)0xb3d217a,  (q31_t)0xb36df2e,  (q31_t)0xb309cdb,\n    (q31_t)0xb2a5a81,  (q31_t)0xb241820,  (q31_t)0xb1dd5b9,  (q31_t)0xb17934b,\n    (q31_t)0xb1150d5,  (q31_t)0xb0b0e59,  (q31_t)0xb04cbd6,  (q31_t)0xafe894d,\n    (q31_t)0xaf846bc,  (q31_t)0xaf20425,  (q31_t)0xaebc187,  (q31_t)0xae57ee2,\n    (q31_t)0xadf3c37,  (q31_t)0xad8f985,  (q31_t)0xad2b6cc,  (q31_t)0xacc740c,\n    (q31_t)0xac63146,  (q31_t)0xabfee79,  (q31_t)0xab9aba6,  (q31_t)0xab368cc,\n    (q31_t)0xaad25eb,  (q31_t)0xaa6e304,  (q31_t)0xaa0a016,  (q31_t)0xa9a5d22,\n    (q31_t)0xa941a27,  (q31_t)0xa8dd725,  (q31_t)0xa87941d,  (q31_t)0xa81510f,\n    (q31_t)0xa7b0dfa,  (q31_t)0xa74cadf,  (q31_t)0xa6e87bd,  (q31_t)0xa684495,\n    (q31_t)0xa620166,  (q31_t)0xa5bbe31,  (q31_t)0xa557af5,  (q31_t)0xa4f37b3,\n    (q31_t)0xa48f46b,  (q31_t)0xa42b11d,  (q31_t)0xa3c6dc8,  (q31_t)0xa362a6d,\n    (q31_t)0xa2fe70b,  (q31_t)0xa29a3a3,  (q31_t)0xa236035,  (q31_t)0xa1d1cc1,\n    (q31_t)0xa16d946,  (q31_t)0xa1095c6,  (q31_t)0xa0a523f,  (q31_t)0xa040eb1,\n    (q31_t)0x9fdcb1e,  (q31_t)0x9f78784,  (q31_t)0x9f143e5,  (q31_t)0x9eb003f,\n    (q31_t)0x9e4bc93,  (q31_t)0x9de78e1,  (q31_t)0x9d83529,  (q31_t)0x9d1f16b,\n    (q31_t)0x9cbada7,  (q31_t)0x9c569dc,  (q31_t)0x9bf260c,  (q31_t)0x9b8e236,\n    (q31_t)0x9b29e59,  (q31_t)0x9ac5a77,  (q31_t)0x9a6168f,  (q31_t)0x99fd2a0,\n    (q31_t)0x9998eac,  (q31_t)0x9934ab2,  (q31_t)0x98d06b2,  (q31_t)0x986c2ac,\n    (q31_t)0x9807ea1,  (q31_t)0x97a3a8f,  (q31_t)0x973f678,  (q31_t)0x96db25a,\n    (q31_t)0x9676e37,  (q31_t)0x9612a0e,  (q31_t)0x95ae5e0,  (q31_t)0x954a1ab,\n    (q31_t)0x94e5d71,  (q31_t)0x9481931,  (q31_t)0x941d4eb,  (q31_t)0x93b90a0,\n    (q31_t)0x9354c4f,  (q31_t)0x92f07f8,  (q31_t)0x928c39b,  (q31_t)0x9227f39,\n    (q31_t)0x91c3ad2,  (q31_t)0x915f664,  (q31_t)0x90fb1f1,  (q31_t)0x9096d79,\n    (q31_t)0x90328fb,  (q31_t)0x8fce477,  (q31_t)0x8f69fee,  (q31_t)0x8f05b5f,\n    (q31_t)0x8ea16cb,  (q31_t)0x8e3d231,  (q31_t)0x8dd8d92,  (q31_t)0x8d748ed,\n    (q31_t)0x8d10443,  (q31_t)0x8cabf93,  (q31_t)0x8c47ade,  (q31_t)0x8be3624,\n    (q31_t)0x8b7f164,  (q31_t)0x8b1ac9f,  (q31_t)0x8ab67d4,  (q31_t)0x8a52304,\n    (q31_t)0x89ede2f,  (q31_t)0x8989955,  (q31_t)0x8925475,  (q31_t)0x88c0f90,\n    (q31_t)0x885caa5,  (q31_t)0x87f85b5,  (q31_t)0x87940c1,  (q31_t)0x872fbc6,\n    (q31_t)0x86cb6c7,  (q31_t)0x86671c2,  (q31_t)0x8602cb9,  (q31_t)0x859e7aa,\n    (q31_t)0x853a296,  (q31_t)0x84d5d7d,  (q31_t)0x847185e,  (q31_t)0x840d33b,\n    (q31_t)0x83a8e12,  (q31_t)0x83448e5,  (q31_t)0x82e03b2,  (q31_t)0x827be7a,\n    (q31_t)0x821793e,  (q31_t)0x81b33fc,  (q31_t)0x814eeb5,  (q31_t)0x80ea969,\n    (q31_t)0x8086419,  (q31_t)0x8021ec3,  (q31_t)0x7fbd968,  (q31_t)0x7f59409,\n    (q31_t)0x7ef4ea4,  (q31_t)0x7e9093b,  (q31_t)0x7e2c3cd,  (q31_t)0x7dc7e5a,\n    (q31_t)0x7d638e2,  (q31_t)0x7cff365,  (q31_t)0x7c9ade4,  (q31_t)0x7c3685d,\n    (q31_t)0x7bd22d2,  (q31_t)0x7b6dd42,  (q31_t)0x7b097ad,  (q31_t)0x7aa5214,\n    (q31_t)0x7a40c76,  (q31_t)0x79dc6d3,  (q31_t)0x797812b,  (q31_t)0x7913b7f,\n    (q31_t)0x78af5ce,  (q31_t)0x784b019,  (q31_t)0x77e6a5e,  (q31_t)0x77824a0,\n    (q31_t)0x771dedc,  (q31_t)0x76b9914,  (q31_t)0x7655347,  (q31_t)0x75f0d76,\n    (q31_t)0x758c7a1,  (q31_t)0x75281c6,  (q31_t)0x74c3be7,  (q31_t)0x745f604,\n    (q31_t)0x73fb01c,  (q31_t)0x7396a30,  (q31_t)0x733243f,  (q31_t)0x72cde4a,\n    (q31_t)0x7269851,  (q31_t)0x7205253,  (q31_t)0x71a0c50,  (q31_t)0x713c64a,\n    (q31_t)0x70d803f,  (q31_t)0x7073a2f,  (q31_t)0x700f41b,  (q31_t)0x6faae03,\n    (q31_t)0x6f467e7,  (q31_t)0x6ee21c6,  (q31_t)0x6e7dba1,  (q31_t)0x6e19578,\n    (q31_t)0x6db4f4a,  (q31_t)0x6d50919,  (q31_t)0x6cec2e3,  (q31_t)0x6c87ca9,\n    (q31_t)0x6c2366a,  (q31_t)0x6bbf028,  (q31_t)0x6b5a9e1,  (q31_t)0x6af6396,\n    (q31_t)0x6a91d47,  (q31_t)0x6a2d6f4,  (q31_t)0x69c909d,  (q31_t)0x6964a42,\n    (q31_t)0x69003e3,  (q31_t)0x689bd80,  (q31_t)0x6837718,  (q31_t)0x67d30ad,\n    (q31_t)0x676ea3d,  (q31_t)0x670a3ca,  (q31_t)0x66a5d53,  (q31_t)0x66416d8,\n    (q31_t)0x65dd058,  (q31_t)0x65789d5,  (q31_t)0x651434e,  (q31_t)0x64afcc3,\n    (q31_t)0x644b634,  (q31_t)0x63e6fa2,  (q31_t)0x638290b,  (q31_t)0x631e271,\n    (q31_t)0x62b9bd3,  (q31_t)0x6255531,  (q31_t)0x61f0e8b,  (q31_t)0x618c7e1,\n    (q31_t)0x6128134,  (q31_t)0x60c3a83,  (q31_t)0x605f3ce,  (q31_t)0x5ffad15,\n    (q31_t)0x5f96659,  (q31_t)0x5f31f99,  (q31_t)0x5ecd8d6,  (q31_t)0x5e6920e,\n    (q31_t)0x5e04b43,  (q31_t)0x5da0475,  (q31_t)0x5d3bda3,  (q31_t)0x5cd76cd,\n    (q31_t)0x5c72ff4,  (q31_t)0x5c0e917,  (q31_t)0x5baa237,  (q31_t)0x5b45b53,\n    (q31_t)0x5ae146b,  (q31_t)0x5a7cd80,  (q31_t)0x5a18692,  (q31_t)0x59b3fa0,\n    (q31_t)0x594f8aa,  (q31_t)0x58eb1b2,  (q31_t)0x5886ab5,  (q31_t)0x58223b6,\n    (q31_t)0x57bdcb3,  (q31_t)0x57595ac,  (q31_t)0x56f4ea2,  (q31_t)0x5690795,\n    (q31_t)0x562c085,  (q31_t)0x55c7971,  (q31_t)0x556325a,  (q31_t)0x54feb3f,\n    (q31_t)0x549a422,  (q31_t)0x5435d01,  (q31_t)0x53d15dd,  (q31_t)0x536ceb5,\n    (q31_t)0x530878a,  (q31_t)0x52a405d,  (q31_t)0x523f92c,  (q31_t)0x51db1f7,\n    (q31_t)0x5176ac0,  (q31_t)0x5112385,  (q31_t)0x50adc48,  (q31_t)0x5049507,\n    (q31_t)0x4fe4dc3,  (q31_t)0x4f8067c,  (q31_t)0x4f1bf32,  (q31_t)0x4eb77e5,\n    (q31_t)0x4e53095,  (q31_t)0x4dee942,  (q31_t)0x4d8a1ec,  (q31_t)0x4d25a93,\n    (q31_t)0x4cc1337,  (q31_t)0x4c5cbd8,  (q31_t)0x4bf8476,  (q31_t)0x4b93d11,\n    (q31_t)0x4b2f5a9,  (q31_t)0x4acae3e,  (q31_t)0x4a666d1,  (q31_t)0x4a01f60,\n    (q31_t)0x499d7ed,  (q31_t)0x4939077,  (q31_t)0x48d48fe,  (q31_t)0x4870182,\n    (q31_t)0x480ba04,  (q31_t)0x47a7282,  (q31_t)0x4742afe,  (q31_t)0x46de377,\n    (q31_t)0x4679bee,  (q31_t)0x4615461,  (q31_t)0x45b0cd2,  (q31_t)0x454c541,\n    (q31_t)0x44e7dac,  (q31_t)0x4483615,  (q31_t)0x441ee7c,  (q31_t)0x43ba6df,\n    (q31_t)0x4355f40,  (q31_t)0x42f179f,  (q31_t)0x428cffb,  (q31_t)0x4228854,\n    (q31_t)0x41c40ab,  (q31_t)0x415f8ff,  (q31_t)0x40fb151,  (q31_t)0x40969a0,\n    (q31_t)0x40321ed,  (q31_t)0x3fcda37,  (q31_t)0x3f6927f,  (q31_t)0x3f04ac4,\n    (q31_t)0x3ea0307,  (q31_t)0x3e3bb48,  (q31_t)0x3dd7386,  (q31_t)0x3d72bc2,\n    (q31_t)0x3d0e3fb,  (q31_t)0x3ca9c32,  (q31_t)0x3c45467,  (q31_t)0x3be0c99,\n    (q31_t)0x3b7c4c9,  (q31_t)0x3b17cf7,  (q31_t)0x3ab3523,  (q31_t)0x3a4ed4c,\n    (q31_t)0x39ea573,  (q31_t)0x3985d97,  (q31_t)0x39215ba,  (q31_t)0x38bcdda,\n    (q31_t)0x38585f8,  (q31_t)0x37f3e14,  (q31_t)0x378f62e,  (q31_t)0x372ae46,\n    (q31_t)0x36c665b,  (q31_t)0x3661e6f,  (q31_t)0x35fd680,  (q31_t)0x3598e8f,\n    (q31_t)0x353469c,  (q31_t)0x34cfea8,  (q31_t)0x346b6b1,  (q31_t)0x3406eb8,\n    (q31_t)0x33a26bd,  (q31_t)0x333dec0,  (q31_t)0x32d96c1,  (q31_t)0x3274ec0,\n    (q31_t)0x32106bd,  (q31_t)0x31abeb9,  (q31_t)0x31476b2,  (q31_t)0x30e2ea9,\n    (q31_t)0x307e69f,  (q31_t)0x3019e93,  (q31_t)0x2fb5684,  (q31_t)0x2f50e74,\n    (q31_t)0x2eec663,  (q31_t)0x2e87e4f,  (q31_t)0x2e2363a,  (q31_t)0x2dbee22,\n    (q31_t)0x2d5a609,  (q31_t)0x2cf5def,  (q31_t)0x2c915d2,  (q31_t)0x2c2cdb4,\n    (q31_t)0x2bc8594,  (q31_t)0x2b63d73,  (q31_t)0x2aff54f,  (q31_t)0x2a9ad2a,\n    (q31_t)0x2a36504,  (q31_t)0x29d1cdc,  (q31_t)0x296d4b2,  (q31_t)0x2908c87,\n    (q31_t)0x28a445a,  (q31_t)0x283fc2b,  (q31_t)0x27db3fb,  (q31_t)0x2776bc9,\n    (q31_t)0x2712396,  (q31_t)0x26adb62,  (q31_t)0x264932b,  (q31_t)0x25e4af4,\n    (q31_t)0x25802bb,  (q31_t)0x251ba80,  (q31_t)0x24b7244,  (q31_t)0x2452a07,\n    (q31_t)0x23ee1c8,  (q31_t)0x2389988,  (q31_t)0x2325147,  (q31_t)0x22c0904,\n    (q31_t)0x225c0bf,  (q31_t)0x21f787a,  (q31_t)0x2193033,  (q31_t)0x212e7eb,\n    (q31_t)0x20c9fa1,  (q31_t)0x2065757,  (q31_t)0x2000f0b,  (q31_t)0x1f9c6be,\n    (q31_t)0x1f37e6f,  (q31_t)0x1ed3620,  (q31_t)0x1e6edcf,  (q31_t)0x1e0a57d,\n    (q31_t)0x1da5d2a,  (q31_t)0x1d414d6,  (q31_t)0x1cdcc80,  (q31_t)0x1c7842a,\n    (q31_t)0x1c13bd2,  (q31_t)0x1baf37a,  (q31_t)0x1b4ab20,  (q31_t)0x1ae62c5,\n    (q31_t)0x1a81a69,  (q31_t)0x1a1d20c,  (q31_t)0x19b89ae,  (q31_t)0x1954150,\n    (q31_t)0x18ef8f0,  (q31_t)0x188b08f,  (q31_t)0x182682d,  (q31_t)0x17c1fcb,\n    (q31_t)0x175d767,  (q31_t)0x16f8f03,  (q31_t)0x169469d,  (q31_t)0x162fe37,\n    (q31_t)0x15cb5d0,  (q31_t)0x1566d68,  (q31_t)0x15024ff,  (q31_t)0x149dc96,\n    (q31_t)0x143942b,  (q31_t)0x13d4bc0,  (q31_t)0x1370354,  (q31_t)0x130bae7,\n    (q31_t)0x12a727a,  (q31_t)0x1242a0c,  (q31_t)0x11de19d,  (q31_t)0x117992e,\n    (q31_t)0x11150be,  (q31_t)0x10b084d,  (q31_t)0x104bfdb,  (q31_t)0xfe7769,\n    (q31_t)0xf82ef6,   (q31_t)0xf1e683,   (q31_t)0xeb9e0f,   (q31_t)0xe5559b,\n    (q31_t)0xdf0d26,   (q31_t)0xd8c4b0,   (q31_t)0xd27c3a,   (q31_t)0xcc33c3,\n    (q31_t)0xc5eb4c,   (q31_t)0xbfa2d5,   (q31_t)0xb95a5d,   (q31_t)0xb311e4,\n    (q31_t)0xacc96b,   (q31_t)0xa680f2,   (q31_t)0xa03878,   (q31_t)0x99effe,\n    (q31_t)0x93a784,   (q31_t)0x8d5f09,   (q31_t)0x87168e,   (q31_t)0x80ce12,\n    (q31_t)0x7a8597,   (q31_t)0x743d1a,   (q31_t)0x6df49e,   (q31_t)0x67ac21,\n    (q31_t)0x6163a5,   (q31_t)0x5b1b27,   (q31_t)0x54d2aa,   (q31_t)0x4e8a2c,\n    (q31_t)0x4841af,   (q31_t)0x41f931,   (q31_t)0x3bb0b3,   (q31_t)0x356835,\n    (q31_t)0x2f1fb6,   (q31_t)0x28d738,   (q31_t)0x228eb9,   (q31_t)0x1c463b,\n    (q31_t)0x15fdbc,   (q31_t)0xfb53d,    (q31_t)0x96cbe,    (q31_t)0x3243f};\n\n/**\n  @} end of DCT4_IDCT4_Table group\n */\n\n/**\n  @addtogroup DCT4_IDCT4\n  @{\n */\n\n/**\n  @brief  Initialization function for the Q31 DCT4/IDCT4.\n  @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.\n  @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure\n  @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure\n  @param[in]     N          length of the DCT4.\n  @param[in]     Nby2       half of the length of the DCT4.\n  @param[in]     normalize  normalizing factor.\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : N is not a\n  supported transform length\n\n  @par           Normalizing factor:\n                   The normalizing factor is sqrt(2/N), which\n  depends on the size of transform N. Normalizing factors in 1.31\n  format are mentioned in the table below for different DCT sizes:\n\n                   \\image html dct4NormalizingQ31Table.gif\n */\n\narm_status arm_dct4_init_q31(arm_dct4_instance_q31 *S,\n                             arm_rfft_instance_q31 *S_RFFT,\n                             arm_cfft_radix4_instance_q31 *S_CFFT, uint16_t N,\n                             uint16_t Nby2, q31_t normalize) {\n  /* Initialize the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /* Initializing the pointer array with the weight table base addresses of\n   * different lengths */\n  q31_t *twiddlePtr[4] = {(q31_t *)WeightsQ31_128, (q31_t *)WeightsQ31_512,\n                          (q31_t *)WeightsQ31_2048, (q31_t *)WeightsQ31_8192};\n\n  /* Initializing the pointer array with the cos factor table base addresses of\n   * different lengths */\n  q31_t *pCosFactor[4] = {\n      (q31_t *)cos_factorsQ31_128, (q31_t *)cos_factorsQ31_512,\n      (q31_t *)cos_factorsQ31_2048, (q31_t *)cos_factorsQ31_8192};\n\n  /* Initialize the DCT4 length */\n  S->N = N;\n\n  /* Initialize the half of DCT4 length */\n  S->Nby2 = Nby2;\n\n  /* Initialize the DCT4 Normalizing factor */\n  S->normalize = normalize;\n\n  /* Initialize Real FFT Instance */\n  S->pRfft = S_RFFT;\n\n  /* Initialize Complex FFT Instance */\n  S->pCfft = S_CFFT;\n\n  switch (N) {\n    /* Initialize the table modifier values */\n  case 8192U:\n    S->pTwiddle = twiddlePtr[3];\n    S->pCosFactor = pCosFactor[3];\n    break;\n  case 2048U:\n    S->pTwiddle = twiddlePtr[2];\n    S->pCosFactor = pCosFactor[2];\n    break;\n  case 512U:\n    S->pTwiddle = twiddlePtr[1];\n    S->pCosFactor = pCosFactor[1];\n    break;\n  case 128U:\n    S->pTwiddle = twiddlePtr[0];\n    S->pCosFactor = pCosFactor[0];\n    break;\n  default:\n    status = ARM_MATH_ARGUMENT_ERROR;\n  }\n\n  /* Initialize the RFFT/RIFFT Function */\n  arm_rfft_init_q31(S->pRfft, S->N, 0U, 1U);\n\n  /* return the status of DCT4 Init function */\n  return (status);\n}\n\n/**\n  @} end of DCT4_IDCT4 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_dct4_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dct4_q15.c\n * Description:  Processing function of DCT4 & IDCT4 Q15\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup DCT4_IDCT4\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 DCT4/IDCT4.\n  @param[in]     S             points to an instance of the Q15 DCT4 structure.\n  @param[in]     pState        points to state buffer.\n  @param[in,out] pInlineBuffer points to the in-place input and output buffer.\n  @return        none\n\n  @par           Input an output formats\n                   Internally inputs are downscaled in the RFFT process function\n  to avoid overflows. Number of bits downscaled, depends on the size of the\n  transform. The input and output formats for different DCT sizes and number of\n  bits to upscale are mentioned in the table below:\n\n                   \\image html dct4FormatsQ15Table.gif\n */\n\nvoid arm_dct4_q15(const arm_dct4_instance_q15 *S, q15_t *pState,\n                  q15_t *pInlineBuffer) {\n  const q15_t *weights = S->pTwiddle;   /* Pointer to the Weights table */\n  const q15_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */\n  q15_t *pS1, *pS2,\n      *pbuff; /* Temporary pointers for input buffer and pState buffer */\n  q15_t in;   /* Temporary variable */\n  uint32_t i; /* Loop counter */\n\n  /* DCT4 computation involves DCT2 (which is calculated using RFFT)\n   * along with some pre-processing and post-processing.\n   * Computational procedure is explained as follows:\n   * (a) Pre-processing involves multiplying input with cos factor,\n   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))\n   *              where,\n   *                 r(n) -- output of preprocessing\n   *                 u(n) -- input to preprocessing(actual Source buffer)\n   * (b) Calculation of DCT2 using FFT is divided into three steps:\n   *                  Step1: Re-ordering of even and odd elements of input.\n   *                  Step2: Calculating FFT of the re-ordered input.\n   *                  Step3: Taking the real part of the product of FFT output\n   * and weights. (c) Post-processing - DCT4 can be obtained from DCT2 output\n   * using the following equation: Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *                        where,\n   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output\n   * (d) Multiplying the output with the normalizing factor sqrt(2/N).\n   */\n\n  /*-------- Pre-processing ------------*/\n  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) *\n   * cos(pi*(2*n+1)/(4*n)) */\n  arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N);\n  arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N);\n\n  /* ----------------------------------------------------------------\n   * Step1: Re-ordering of even and odd elements as\n   *             pState[i] =  pInlineBuffer[2*i] and\n   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2\n   ---------------------------------------------------------------------*/\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* pS2 initialized to pState+N-1, so that it points to the end of the state\n   * buffer */\n  pS2 = pState + (S->N - 1U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */\n  i = S->Nby2 >> 2U;\n\n  /* First part of the processing with loop unrolling.  Compute 4 outputs at a\n   *time.\n   ** a second loop below computes the remaining 1 to 3 samples. */\n  do {\n    /* Re-ordering of even and odd elements */\n    /* pState[i] =  pInlineBuffer[2*i] */\n    *pS1++ = *pbuff++;\n    /* pState[N-i-1] = pInlineBuffer[2*i+1] */\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Initializing the loop counter to N/4 instead of N for loop unrolling */\n  i = S->N >> 2U;\n\n  /* Processing with loop unrolling 4 times as N is always multiple of 4.\n   * Compute 4 outputs at a time */\n  do {\n    /* Writing the re-ordered output back to inplace input buffer */\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* ---------------------------------------------------------\n   *     Step2: Calculate RFFT for N-point input\n   * ---------------------------------------------------------- */\n  /* pInlineBuffer is real input of length N , pState is the complex output of\n   * length 2N */\n  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);\n\n  /*----------------------------------------------------------------------\n   *  Step3: Multiply the FFT output with the weights.\n   *----------------------------------------------------------------------*/\n  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);\n\n  /* The output of complex multiplication is in 3.13 format.\n   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15\n   * format by shifting left by 2 bits. */\n  arm_shift_q15(pState, 2, pState, S->N * 2);\n\n  /* ----------- Post-processing ---------- */\n  /* DCT-IV can be obtained from DCT-II by the equation,\n   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *       Hence, Y4(0) = Y2(0)/2  */\n  /* Getting only real part from the output and Converting to DCT-IV */\n\n  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */\n  i = (S->N - 1U) >> 2U;\n\n  /* pbuff initialized to input buffer. */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */\n  in = *pS1++ >> 1U;\n  /* input buffer acts as inplace, so output values are stored in the input\n   * itself. */\n  *pbuff++ = in;\n\n  /* pState pointer is incremented twice as the real values are located\n   * alternatively in the array */\n  pS1++;\n\n  /* First part of the processing with loop unrolling.  Compute 4 outputs at a\n   *time.\n   ** a second loop below computes the remaining 1 to 3 samples. */\n  do {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    /* points to the next real value */\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* If the blockSize is not a multiple of 4, compute any remaining output\n   *samples here.\n   ** No loop unrolling is used. */\n  i = (S->N - 1U) % 0x4U;\n\n  while (i > 0U) {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n\n    /* points to the next real value */\n    pS1++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n\n  /*------------ Normalizing the output by multiplying with the normalizing\n   * factor ----------*/\n\n  /* Initializing the loop counter to N/4 instead of N for loop unrolling */\n  i = S->N >> 2U;\n\n  /* pbuff initialized to the pInlineBuffer(now contains the output values) */\n  pbuff = pInlineBuffer;\n\n  /* Processing with loop unrolling 4 times as N is always multiple of 4.\n   * Compute 4 outputs at a time */\n  do {\n    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */\n    in = *pbuff;\n    *pbuff++ = ((q15_t)(((q31_t)in * S->normalize) >> 15));\n\n    in = *pbuff;\n    *pbuff++ = ((q15_t)(((q31_t)in * S->normalize) >> 15));\n\n    in = *pbuff;\n    *pbuff++ = ((q15_t)(((q31_t)in * S->normalize) >> 15));\n\n    in = *pbuff;\n    *pbuff++ = ((q15_t)(((q31_t)in * S->normalize) >> 15));\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n#else\n\n  /* Initializing the loop counter to N/2 */\n  i = S->Nby2;\n\n  do {\n    /* Re-ordering of even and odd elements */\n    /* pState[i] =  pInlineBuffer[2*i] */\n    *pS1++ = *pbuff++;\n    /* pState[N-i-1] = pInlineBuffer[2*i+1] */\n    *pS2-- = *pbuff++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Initializing the loop counter */\n  i = S->N;\n\n  do {\n    /* Writing the re-ordered output back to inplace input buffer */\n    *pbuff++ = *pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* ---------------------------------------------------------\n   *     Step2: Calculate RFFT for N-point input\n   * ---------------------------------------------------------- */\n  /* pInlineBuffer is real input of length N , pState is the complex output of\n   * length 2N */\n  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);\n\n  /*----------------------------------------------------------------------\n   *  Step3: Multiply the FFT output with the weights.\n   *----------------------------------------------------------------------*/\n  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);\n\n  /* The output of complex multiplication is in 3.13 format.\n   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15\n   * format by shifting left by 2 bits. */\n  arm_shift_q15(pState, 2, pState, S->N * 2);\n\n  /* ----------- Post-processing ---------- */\n  /* DCT-IV can be obtained from DCT-II by the equation,\n   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *       Hence, Y4(0) = Y2(0)/2  */\n  /* Getting only real part from the output and Converting to DCT-IV */\n\n  /* pbuff initialized to input buffer. */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */\n  in = *pS1++ >> 1U;\n  /* input buffer acts as inplace, so output values are stored in the input\n   * itself. */\n  *pbuff++ = in;\n\n  /* pState pointer is incremented twice as the real values are located\n   * alternatively in the array */\n  pS1++;\n\n  /* Initializing the loop counter */\n  i = (S->N - 1U);\n\n  do {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n\n    /* points to the next real value */\n    pS1++;\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n  /*------------ Normalizing the output by multiplying with the normalizing\n   * factor ----------*/\n\n  /* Initializing loop counter */\n  i = S->N;\n\n  /* pbuff initialized to the pInlineBuffer (now contains the output values) */\n  pbuff = pInlineBuffer;\n\n  do {\n    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */\n    in = *pbuff;\n    *pbuff++ = ((q15_t)(((q31_t)in * S->normalize) >> 15));\n\n    /* Decrement loop counter */\n    i--;\n\n  } while (i > 0U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n}\n\n/**\n  @} end of DCT4_IDCT4 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_dct4_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_dct4_q31.c\n * Description:  Processing function of DCT4 & IDCT4 Q31\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @addtogroup DCT4_IDCT4\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 DCT4/IDCT4.\n  @param[in]     S             points to an instance of the Q31 DCT4 structure.\n  @param[in]     pState        points to state buffer.\n  @param[in,out] pInlineBuffer points to the in-place input and output buffer.\n  @return        none\n\n  @par           Input an output formats\n                   Input samples need to be downscaled by 1 bit to avoid\n  saturations in the Q31 DCT process, as the conversion from DCT2 to DCT4\n  involves one subtraction. Internally inputs are downscaled in the RFFT process\n  function to avoid overflows. Number of bits downscaled, depends on the size of\n  the transform. The input and output formats for different DCT sizes and number\n  of bits to upscale are mentioned in the table below:\n\n                   \\image html dct4FormatsQ31Table.gif\n */\n\nvoid arm_dct4_q31(const arm_dct4_instance_q31 *S, q31_t *pState,\n                  q31_t *pInlineBuffer) {\n  const q31_t *weights = S->pTwiddle;   /* Pointer to the Weights table */\n  const q31_t *cosFact = S->pCosFactor; /* Pointer to the cos factors table */\n  q31_t *pS1, *pS2,\n      *pbuff; /* Temporary pointers for input buffer and pState buffer */\n  q31_t in;   /* Temporary variable */\n  uint32_t i; /* Loop counter */\n\n  /* DCT4 computation involves DCT2 (which is calculated using RFFT)\n   * along with some pre-processing and post-processing.\n   * Computational procedure is explained as follows:\n   * (a) Pre-processing involves multiplying input with cos factor,\n   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))\n   *              where,\n   *                 r(n) -- output of preprocessing\n   *                 u(n) -- input to preprocessing(actual Source buffer)\n   * (b) Calculation of DCT2 using FFT is divided into three steps:\n   *                  Step1: Re-ordering of even and odd elements of input.\n   *                  Step2: Calculating FFT of the re-ordered input.\n   *                  Step3: Taking the real part of the product of FFT output\n   * and weights. (c) Post-processing - DCT4 can be obtained from DCT2 output\n   * using the following equation: Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *                        where,\n   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output\n   * (d) Multiplying the output with the normalizing factor sqrt(2/N).\n   */\n\n  /*-------- Pre-processing ------------*/\n  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) *\n   * cos(pi*(2*n+1)/(4*n)) */\n  arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N);\n  arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N);\n\n  /* ----------------------------------------------------------------\n   * Step1: Re-ordering of even and odd elements as\n   *             pState[i] =  pInlineBuffer[2*i] and\n   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2\n   ---------------------------------------------------------------------*/\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* pS2 initialized to pState+N-1, so that it points to the end of the state\n   * buffer */\n  pS2 = pState + (S->N - 1U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n#if defined(ARM_MATH_LOOPUNROLL)\n\n  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */\n  i = S->Nby2 >> 2U;\n\n  /* First part of the processing with loop unrolling.  Compute 4 outputs at a\n   *time.\n   ** a second loop below computes the remaining 1 to 3 samples. */\n  do {\n    /* Re-ordering of even and odd elements */\n    /* pState[i] =  pInlineBuffer[2*i] */\n    *pS1++ = *pbuff++;\n    /* pState[N-i-1] = pInlineBuffer[2*i+1] */\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    *pS1++ = *pbuff++;\n    *pS2-- = *pbuff++;\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Initializing the loop counter to N/4 instead of N for loop unrolling */\n  i = S->N >> 2U;\n\n  /* Processing with loop unrolling 4 times as N is always multiple of 4.\n   * Compute 4 outputs at a time */\n  do {\n    /* Writing the re-ordered output back to inplace input buffer */\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n    *pbuff++ = *pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* ---------------------------------------------------------\n   *     Step2: Calculate RFFT for N-point input\n   * ---------------------------------------------------------- */\n  /* pInlineBuffer is real input of length N , pState is the complex output of\n   * length 2N */\n  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);\n\n  /*----------------------------------------------------------------------\n   *  Step3: Multiply the FFT output with the weights.\n   *----------------------------------------------------------------------*/\n  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);\n\n  /* The output of complex multiplication is in 3.29 format.\n   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31\n   * format by shifting left by 2 bits. */\n  arm_shift_q31(pState, 2, pState, S->N * 2);\n\n  /* ----------- Post-processing ---------- */\n  /* DCT-IV can be obtained from DCT-II by the equation,\n   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *       Hence, Y4(0) = Y2(0)/2  */\n  /* Getting only real part from the output and Converting to DCT-IV */\n\n  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */\n  i = (S->N - 1U) >> 2U;\n\n  /* pbuff initialized to input buffer. */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */\n  in = *pS1++ >> 1U;\n  /* input buffer acts as inplace, so output values are stored in the input\n   * itself. */\n  *pbuff++ = in;\n\n  /* pState pointer is incremented twice as the real values are located\n   * alternatively in the array */\n  pS1++;\n\n  /* First part of the processing with loop unrolling.  Compute 4 outputs at a\n   *time.\n   ** a second loop below computes the remaining 1 to 3 samples. */\n  do {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    /* points to the next real value */\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    in = *pS1++ - in;\n    *pbuff++ = in;\n    pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* If the blockSize is not a multiple of 4, compute any remaining output\n   *samples here.\n   ** No loop unrolling is used. */\n  i = (S->N - 1U) % 0x4U;\n\n  while (i > 0U) {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n\n    /* points to the next real value */\n    pS1++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n\n  /*------------ Normalizing the output by multiplying with the normalizing\n   * factor ----------*/\n\n  /* Initializing the loop counter to N/4 instead of N for loop unrolling */\n  i = S->N >> 2U;\n\n  /* pbuff initialized to the pInlineBuffer(now contains the output values) */\n  pbuff = pInlineBuffer;\n\n  /* Processing with loop unrolling 4 times as N is always multiple of 4.\n   * Compute 4 outputs at a time */\n  do {\n    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */\n    in = *pbuff;\n    *pbuff++ = ((q31_t)(((q63_t)in * S->normalize) >> 31));\n\n    in = *pbuff;\n    *pbuff++ = ((q31_t)(((q63_t)in * S->normalize) >> 31));\n\n    in = *pbuff;\n    *pbuff++ = ((q31_t)(((q63_t)in * S->normalize) >> 31));\n\n    in = *pbuff;\n    *pbuff++ = ((q31_t)(((q63_t)in * S->normalize) >> 31));\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n#else\n\n  /* Initializing the loop counter to N/2 */\n  i = S->Nby2;\n\n  do {\n    /* Re-ordering of even and odd elements */\n    /* pState[i] =  pInlineBuffer[2*i] */\n    *pS1++ = *pbuff++;\n    /* pState[N-i-1] = pInlineBuffer[2*i+1] */\n    *pS2-- = *pbuff++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* pbuff initialized to input buffer */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Initializing the loop counter */\n  i = S->N;\n\n  do {\n    /* Writing the re-ordered output back to inplace input buffer */\n    *pbuff++ = *pS1++;\n\n    /* Decrement the loop counter */\n    i--;\n  } while (i > 0U);\n\n  /* ---------------------------------------------------------\n   *     Step2: Calculate RFFT for N-point input\n   * ---------------------------------------------------------- */\n  /* pInlineBuffer is real input of length N , pState is the complex output of\n   * length 2N */\n  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);\n\n  /*----------------------------------------------------------------------\n   *  Step3: Multiply the FFT output with the weights.\n   *----------------------------------------------------------------------*/\n  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);\n\n  /* The output of complex multiplication is in 3.29 format.\n   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31\n   * format by shifting left by 2 bits. */\n  arm_shift_q31(pState, 2, pState, S->N * 2);\n\n  /* ----------- Post-processing ---------- */\n  /* DCT-IV can be obtained from DCT-II by the equation,\n   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)\n   *       Hence, Y4(0) = Y2(0)/2  */\n  /* Getting only real part from the output and Converting to DCT-IV */\n\n  /* pbuff initialized to input buffer. */\n  pbuff = pInlineBuffer;\n\n  /* pS1 initialized to pState */\n  pS1 = pState;\n\n  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */\n  in = *pS1++ >> 1U;\n  /* input buffer acts as inplace, so output values are stored in the input\n   * itself. */\n  *pbuff++ = in;\n\n  /* pState pointer is incremented twice as the real values are located\n   * alternatively in the array */\n  pS1++;\n\n  /* Initializing the loop counter */\n  i = (S->N - 1U);\n\n  while (i > 0U) {\n    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) -\n     * Y4(k-1) */\n    /* pState pointer (pS1) is incremented twice as the real values are located\n     * alternatively in the array */\n    in = *pS1++ - in;\n    *pbuff++ = in;\n\n    /* points to the next real value */\n    pS1++;\n\n    /* Decrement loop counter */\n    i--;\n  }\n\n  /*------------ Normalizing the output by multiplying with the normalizing\n   * factor ----------*/\n\n  /* Initializing loop counter */\n  i = S->N;\n\n  /* pbuff initialized to the pInlineBuffer (now contains the output values) */\n  pbuff = pInlineBuffer;\n\n  do {\n    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */\n    in = *pbuff;\n    *pbuff++ = ((q31_t)(((q63_t)in * S->normalize) >> 31));\n\n    /* Decrement loop counter */\n    i--;\n  } while (i > 0U);\n\n#endif /* #if defined (ARM_MATH_LOOPUNROLL) */\n}\n\n/**\n  @} end of DCT4_IDCT4 group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_rfft_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rfft_f32.c\n * Description:  RFFT & RIFFT Floating point process function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/* ----------------------------------------------------------------------\n * Internal functions prototypes\n * -------------------------------------------------------------------- */\n\nextern void arm_radix4_butterfly_f32(float32_t *pSrc, uint16_t fftLen,\n                                     const float32_t *pCoef,\n                                     uint16_t twidCoefModifier);\n\nextern void arm_radix4_butterfly_inverse_f32(float32_t *pSrc, uint16_t fftLen,\n                                             const float32_t *pCoef,\n                                             uint16_t twidCoefModifier,\n                                             float32_t onebyfftLen);\n\nextern void arm_bitreversal_f32(float32_t *pSrc, uint16_t fftSize,\n                                uint16_t bitRevFactor,\n                                const uint16_t *pBitRevTab);\n\nvoid arm_split_rfft_f32(float32_t *pSrc, uint32_t fftLen,\n                        const float32_t *pATable, const float32_t *pBTable,\n                        float32_t *pDst, uint32_t modifier);\n\nvoid arm_split_rifft_f32(float32_t *pSrc, uint32_t fftLen,\n                         const float32_t *pATable, const float32_t *pBTable,\n                         float32_t *pDst, uint32_t modifier);\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup RealFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the floating-point RFFT/RIFFT.\n  @deprecated    Do not use this function.  It has been superceded by \\ref\n  arm_rfft_fast_f32 and will be removed in the future.\n  @param[in]     S    points to an instance of the floating-point RFFT/RIFFT\n  structure\n  @param[in]     pSrc points to the input buffer\n  @param[out]    pDst points to the output buffer\n  @return        none\n */\n\nvoid arm_rfft_f32(const arm_rfft_instance_f32 *S, float32_t *pSrc,\n                  float32_t *pDst) {\n  const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;\n\n  /* Calculation of Real IFFT of input */\n  if (S->ifftFlagR == 1U) {\n    /*  Real IFFT core process */\n    arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal,\n                        pDst, S->twidCoefRModifier);\n\n    /* Complex radix-4 IFFT process */\n    arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen, S_CFFT->pTwiddle,\n                                     S_CFFT->twidCoefModifier,\n                                     S_CFFT->onebyfftLen);\n\n    /* Bit reversal process */\n    if (S->bitReverseFlagR == 1U) {\n      arm_bitreversal_f32(pDst, S_CFFT->fftLen, S_CFFT->bitRevFactor,\n                          S_CFFT->pBitRevTable);\n    }\n  } else {\n    /* Calculation of RFFT of input */\n\n    /* Complex radix-4 FFT process */\n    arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen, S_CFFT->pTwiddle,\n                             S_CFFT->twidCoefModifier);\n\n    /* Bit reversal process */\n    if (S->bitReverseFlagR == 1U) {\n      arm_bitreversal_f32(pSrc, S_CFFT->fftLen, S_CFFT->bitRevFactor,\n                          S_CFFT->pBitRevTable);\n    }\n\n    /*  Real FFT core process */\n    arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal,\n                       pDst, S->twidCoefRModifier);\n  }\n}\n\n/**\n  @} end of RealFFT group\n */\n\n/**\n  @brief         Core Real FFT process\n  @param[in]     pSrc      points to input buffer\n  @param[in]     fftLen    length of FFT\n  @param[in]     pATable   points to twiddle Coef A buffer\n  @param[in]     pBTable   points to twiddle Coef B buffer\n  @param[out]    pDst      points to output buffer\n  @param[in]     modifier  twiddle coefficient modifier that supports different\n  size FFTs with the same twiddle factor table\n  @return        none\n */\n\nvoid arm_split_rfft_f32(float32_t *pSrc, uint32_t fftLen,\n                        const float32_t *pATable, const float32_t *pBTable,\n                        float32_t *pDst, uint32_t modifier) {\n  uint32_t i;                       /* Loop Counter */\n  float32_t outR, outI;             /* Temporary variables for output */\n  const float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */\n  float32_t CoefA1, CoefA2,\n      CoefB1; /* Temporary variables for twiddle coefficients */\n  float32_t *pDst1 = &pDst[2],\n            *pDst2 =\n                &pDst[(4U * fftLen) - 1U]; /* temp pointers for output buffer */\n  float32_t *pSrc1 = &pSrc[2],\n            *pSrc2 =\n                &pSrc[(2U * fftLen) - 1U]; /* temp pointers for input buffer */\n\n  /* Init coefficient pointers */\n  pCoefA = &pATable[modifier * 2];\n  pCoefB = &pBTable[modifier * 2];\n\n  i = fftLen - 1U;\n\n  while (i > 0U) {\n    /*\n      outR = (  pSrc[2 * i]             * pATable[2 * i]\n              - pSrc[2 * i + 1]         * pATable[2 * i + 1]\n              + pSrc[2 * n - 2 * i]     * pBTable[2 * i]\n              + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);\n\n      outI = (  pIn[2 * i + 1]         * pATable[2 * i]\n              + pIn[2 * i]             * pATable[2 * i + 1]\n              + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);\n     */\n\n    /* read pATable[2 * i] */\n    CoefA1 = *pCoefA++;\n    /* pATable[2 * i + 1] */\n    CoefA2 = *pCoefA;\n\n    /* pSrc[2 * i] * pATable[2 * i] */\n    outR = *pSrc1 * CoefA1;\n    /* pSrc[2 * i] * CoefA2 */\n    outI = *pSrc1++ * CoefA2;\n\n    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */\n    outR -= (*pSrc1 + *pSrc2) * CoefA2;\n    /* pSrc[2 * i + 1] * CoefA1 */\n    outI += *pSrc1++ * CoefA1;\n\n    CoefB1 = *pCoefB;\n\n    /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */\n    outI -= *pSrc2-- * CoefB1;\n    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */\n    outI -= *pSrc2 * CoefA2;\n\n    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */\n    outR += *pSrc2-- * CoefB1;\n\n    /* write output */\n    *pDst1++ = outR;\n    *pDst1++ = outI;\n\n    /* write complex conjugate output */\n    *pDst2-- = -outI;\n    *pDst2-- = outR;\n\n    /* update coefficient pointer */\n    pCoefB = pCoefB + (modifier * 2U);\n    pCoefA = pCoefA + ((modifier * 2U) - 1U);\n\n    i--;\n  }\n\n  pDst[2U * fftLen] = pSrc[0] - pSrc[1];\n  pDst[(2U * fftLen) + 1U] = 0.0f;\n\n  pDst[0] = pSrc[0] + pSrc[1];\n  pDst[1] = 0.0f;\n}\n\n/**\n  @brief         Core Real IFFT process\n  @param[in]     pSrc      points to input buffer\n  @param[in]     fftLen    length of FFT\n  @param[in]     pATable   points to twiddle Coef A buffer\n  @param[in]     pBTable   points to twiddle Coef B buffer\n  @param[out]    pDst      points to output buffer\n  @param[in]     modifier  twiddle coefficient modifier that supports different\n  size FFTs with the same twiddle factor table\n  @return        none\n */\n\nvoid arm_split_rifft_f32(float32_t *pSrc, uint32_t fftLen,\n                         const float32_t *pATable, const float32_t *pBTable,\n                         float32_t *pDst, uint32_t modifier) {\n  float32_t outR, outI;             /* Temporary variables for output */\n  const float32_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */\n  float32_t CoefA1, CoefA2,\n      CoefB1; /* Temporary variables for twiddle coefficients */\n  float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U];\n\n  pCoefA = &pATable[0];\n  pCoefB = &pBTable[0];\n\n  while (fftLen > 0U) {\n    /*\n      outR = (  pIn[2 * i]             * pATable[2 * i]\n              + pIn[2 * i + 1]         * pATable[2 * i + 1]\n              + pIn[2 * n - 2 * i]     * pBTable[2 * i]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);\n\n      outI = (  pIn[2 * i + 1]         * pATable[2 * i]\n              - pIn[2 * i]             * pATable[2 * i + 1]\n              - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);\n     */\n\n    CoefA1 = *pCoefA++;\n    CoefA2 = *pCoefA;\n\n    /* outR = (pSrc[2 * i] * CoefA1 */\n    outR = *pSrc1 * CoefA1;\n\n    /* - pSrc[2 * i] * CoefA2 */\n    outI = -(*pSrc1++) * CoefA2;\n\n    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */\n    outR += (*pSrc1 + *pSrc2) * CoefA2;\n\n    /* pSrc[2 * i + 1] * CoefA1 */\n    outI += (*pSrc1++) * CoefA1;\n\n    CoefB1 = *pCoefB;\n\n    /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */\n    outI -= *pSrc2-- * CoefB1;\n\n    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */\n    outR += *pSrc2 * CoefB1;\n\n    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */\n    outI += *pSrc2-- * CoefA2;\n\n    /* write output */\n    *pDst++ = outR;\n    *pDst++ = outI;\n\n    /* update coefficient pointer */\n    pCoefB = pCoefB + (modifier * 2);\n    pCoefA = pCoefA + (modifier * 2 - 1);\n\n    /* Decrement loop count */\n    fftLen--;\n  }\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_rfft_fast_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rfft_f32.c\n * Description:  RFFT & RIFFT Floating point process function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\nvoid stage_rfft_f32(const arm_rfft_fast_instance_f32 *S, float32_t *p,\n                    float32_t *pOut) {\n  uint32_t k;         /* Loop Counter */\n  float32_t twR, twI; /* RFFT Twiddle coefficients */\n  const float32_t *pCoeff =\n      S->pTwiddleRFFT;          /* Points to RFFT Twiddle factors */\n  float32_t *pA = p;            /* increasing pointer */\n  float32_t *pB = p;            /* decreasing pointer */\n  float32_t xAR, xAI, xBR, xBI; /* temporary variables */\n  float32_t t1a, t1b;           /* temporary variables */\n  float32_t p0, p1, p2, p3;     /* temporary variables */\n\n  k = (S->Sint).fftLen - 1;\n\n  /* Pack first and last sample of the frequency domain together */\n\n  xBR = pB[0];\n  xBI = pB[1];\n  xAR = pA[0];\n  xAI = pA[1];\n\n  twR = *pCoeff++;\n  twI = *pCoeff++;\n\n  // U1 = XA(1) + XB(1); % It is real\n  t1a = xBR + xAR;\n\n  // U2 = XB(1) - XA(1); % It is imaginary\n  t1b = xBI + xAI;\n\n  // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);\n  // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);\n  *pOut++ = 0.5f * (t1a + t1b);\n  *pOut++ = 0.5f * (t1a - t1b);\n\n  // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));\n  pB = p + 2 * k;\n  pA += 2;\n\n  do {\n    /*\n       function X = my_split_rfft(X, ifftFlag)\n       % X is a series of real numbers\n       L  = length(X);\n       XC = X(1:2:end) +i*X(2:2:end);\n       XA = fft(XC);\n       XB = conj(XA([1 end:-1:2]));\n       TW = i*exp(-2*pi*i*[0:L/2-1]/L).';\n       for l = 2:L/2\n          XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));\n       end\n       XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1)\n       + XB(1) + i*( XA(1) - XB(1)))); X = XA;\n    */\n\n    xBI = pB[1];\n    xBR = pB[0];\n    xAR = pA[0];\n    xAI = pA[1];\n\n    twR = *pCoeff++;\n    twI = *pCoeff++;\n\n    t1a = xBR - xAR;\n    t1b = xBI + xAI;\n\n    // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);\n    // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);\n    p0 = twR * t1a;\n    p1 = twI * t1a;\n    p2 = twR * t1b;\n    p3 = twI * t1b;\n\n    *pOut++ = 0.5f * (xAR + xBR + p0 + p3); // xAR\n    *pOut++ = 0.5f * (xAI - xBI + p1 - p2); // xAI\n\n    pA += 2;\n    pB -= 2;\n    k--;\n  } while (k > 0U);\n}\n\n/* Prepares data for inverse cfft */\nvoid merge_rfft_f32(const arm_rfft_fast_instance_f32 *S, float32_t *p,\n                    float32_t *pOut) {\n  uint32_t k;         /* Loop Counter */\n  float32_t twR, twI; /* RFFT Twiddle coefficients */\n  const float32_t *pCoeff =\n      S->pTwiddleRFFT;            /* Points to RFFT Twiddle factors */\n  float32_t *pA = p;              /* increasing pointer */\n  float32_t *pB = p;              /* decreasing pointer */\n  float32_t xAR, xAI, xBR, xBI;   /* temporary variables */\n  float32_t t1a, t1b, r, s, t, u; /* temporary variables */\n\n  k = (S->Sint).fftLen - 1;\n\n  xAR = pA[0];\n  xAI = pA[1];\n\n  pCoeff += 2;\n\n  *pOut++ = 0.5f * (xAR + xAI);\n  *pOut++ = 0.5f * (xAR - xAI);\n\n  pB = p + 2 * k;\n  pA += 2;\n\n  while (k > 0U) {\n    /* G is half of the frequency complex spectrum */\n    // for k = 2:N\n    //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) -\n    //    conj(G(N-k+2))));\n    xBI = pB[1];\n    xBR = pB[0];\n    xAR = pA[0];\n    xAI = pA[1];\n\n    twR = *pCoeff++;\n    twI = *pCoeff++;\n\n    t1a = xAR - xBR;\n    t1b = xAI + xBI;\n\n    r = twR * t1a;\n    s = twI * t1b;\n    t = twI * t1a;\n    u = twR * t1b;\n\n    // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);\n    // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);\n    *pOut++ = 0.5f * (xAR + xBR - r - s); // xAR\n    *pOut++ = 0.5f * (xAI - xBI + t - u); // xAI\n\n    pA += 2;\n    pB -= 2;\n    k--;\n  }\n}\n\n/**\n  @ingroup groupTransforms\n*/\n\n/**\n  @defgroup RealFFT Real FFT Functions\n\n  @par\n                   The CMSIS DSP library includes specialized algorithms for\n  computing the FFT of real data sequences.  The FFT is defined over complex\n  data but in many applications the input is real.  Real FFT algorithms take\n  advantage of the symmetry properties of the FFT and have a speed advantage\n  over complex algorithms of the same length.\n  @par\n                   The Fast RFFT algorith relays on the mixed radix CFFT that\n  save processor usage.\n  @par\n                   The real length N forward FFT of a sequence is computed using\n  the steps shown below.\n  @par\n                   \\image html RFFT.gif \"Real Fast Fourier Transform\"\n  @par\n                   The real sequence is initially treated as if it were complex\n  to perform a CFFT. Later, a processing stage reshapes the data to obtain half\n  of the frequency spectrum in complex format. Except the first complex number\n  that contains the two real numbers X[0] and X[N/2] all the data is complex. In\n  other words, the first complex sample contains two real values packed.\n  @par\n                   The input for the inverse RFFT should keep the same format as\n  the output of the forward RFFT. A first processing stage pre-process the data\n  to later perform an inverse CFFT.\n  @par\n                   \\image html RIFFT.gif \"Real Inverse Fast Fourier Transform\"\n  @par\n                   The algorithms for floating-point, Q15, and Q31 data are\n  slightly different and we describe each algorithm in turn.\n  @par           Floating-point\n                   The main functions are \\ref arm_rfft_fast_f32() and \\ref\n  arm_rfft_fast_init_f32(). The older functions \\ref arm_rfft_f32() and \\ref\n  arm_rfft_init_f32() have been deprecated but are still documented.\n  @par\n                   The FFT of a real N-point sequence has even symmetry in the\n  frequency domain. The second half of the data equals the conjugate of the\n  first half flipped in frequency. Looking at the data, we see that we can\n  uniquely represent the FFT using only N/2 complex numbers. These are packed\n  into the output array in alternating real and imaginary components:\n  @par\n                   X = { real[0], imag[0], real[1], imag[1], real[2], imag[2]\n  ... real[(N/2)-1], imag[(N/2)-1 }\n  @par\n                   It happens that the first complex number (real[0], imag[0])\n  is actually all real. real[0] represents the DC offset, and imag[0] should be\n  0. (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is the\n  first harmonic and so on.\n  @par\n                   The real FFT functions pack the frequency domain data in this\n  fashion. The forward transform outputs the data in this form and the inverse\n                   transform expects input data in this form. The function\n  always performs the needed bitreversal so that the input and output data is\n  always in normal order. The functions support lengths of [32, 64, 128, ...,\n  4096] samples.\n  @par           Q15 and Q31\n                   The real algorithms are defined in a similar manner and\n  utilize N/2 complex transforms behind the scenes.\n  @par\n                   The complex transforms used internally include scaling to\n  prevent fixed-point overflows.  The overall scaling equals 1/(fftLen/2).\n  @par\n                   A separate instance structure must be defined for each\n  transform used but twiddle factor and bit reversal tables can be reused.\n  @par\n                   There is also an associated initialization function for each\n  data type. The initialization function performs the following operations:\n                    - Sets the values of the internal structure fields.\n                    - Initializes twiddle factor table and bit reversal table\n  pointers.\n                    - Initializes the internal complex FFT data structure.\n  @par\n                   Use of the initialization function is optional.\n                   However, if the initialization function is used, then the\n  instance structure cannot be placed into a const data section. To place an\n  instance structure into a const data section, the instance structure should be\n  manually initialized as follows: 
 arm_rfft_instance_q31 S = {fftLenReal,\n  fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal,\n  pTwiddleBReal, pCfft}; arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2,\n  ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal,\n  pCfft};\n  
\n                   where fftLenReal is the length of the real\n  transform; fftLenBy2 length of  the internal complex transform.\n                   ifftFlagR Selects forward (=0) or inverse (=1)\n  transform. bitReverseFlagR Selects bit reversed output (=0) or\n  normal order output (=1). twidCoefRModifier stride modifier for\n  the twiddle factor table. The value is based on the FFT length;\n                   pTwiddleARealpoints to the A array of twiddle\n  coefficients; pTwiddleBRealpoints to the B array of twiddle\n  coefficients; pCfft points to the CFFT Instance structure. The\n  CFFT structure must also be initialized.  Refer to arm_cfft_radix4_f32() for\n  details regarding static initialization of the complex FFT instance structure.\n */\n\n/**\n  @addtogroup RealFFT\n  @{\n*/\n\n/**\n  @brief         Processing function for the floating-point real FFT.\n  @param[in]     S         points to an arm_rfft_fast_instance_f32 structure\n  @param[in]     p         points to input buffer\n  @param[in]     pOut      points to output buffer\n  @param[in]     ifftFlag\n                   - value = 0: RFFT\n                   - value = 1: RIFFT\n  @return        none\n*/\n\nvoid arm_rfft_fast_f32(arm_rfft_fast_instance_f32 *S, float32_t *p,\n                       float32_t *pOut, uint8_t ifftFlag) {\n  arm_cfft_instance_f32 *Sint = &(S->Sint);\n  Sint->fftLen = S->fftLenRFFT / 2;\n\n  /* Calculation of Real FFT */\n  if (ifftFlag) {\n    /*  Real FFT compression */\n    merge_rfft_f32(S, p, pOut);\n\n    /* Complex radix-4 IFFT process */\n    arm_cfft_f32(Sint, pOut, ifftFlag, 1);\n  } else {\n    /* Calculation of RFFT of input */\n    arm_cfft_f32(Sint, p, ifftFlag, 1);\n\n    /*  Real FFT extraction */\n    stage_rfft_f32(S, p, pOut);\n  }\n}\n\n/**\n * @} end of RealFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_rfft_fast_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_cfft_init_f32.c\n * Description:  Split Radix Decimation in Frequency CFFT Floating point\n * processing function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup groupTransforms\n */\n\n/**\n  @addtogroup RealFFT\n  @{\n */\n\n/**\n  @brief         Initialization function for the 32pt floating-point real FFT.\n  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : an error is detected\n */\n\narm_status arm_rfft_32_fast_init_f32(arm_rfft_fast_instance_f32 *S) {\n\n  arm_cfft_instance_f32 *Sint;\n\n  if (!S)\n    return ARM_MATH_ARGUMENT_ERROR;\n\n  Sint = &(S->Sint);\n  Sint->fftLen = 16U;\n  S->fftLenRFFT = 32U;\n\n  Sint->bitRevLength = ARMBITREVINDEXTABLE_16_TABLE_LENGTH;\n  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;\n  Sint->pTwiddle = (float32_t *)twiddleCoef_16;\n  S->pTwiddleRFFT = (float32_t *)twiddleCoef_rfft_32;\n\n  return ARM_MATH_SUCCESS;\n}\n\n/**\n  @brief         Initialization function for the 64pt floating-point real FFT.\n  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : an error is detected\n */\n\narm_status arm_rfft_64_fast_init_f32(arm_rfft_fast_instance_f32 *S) {\n\n  arm_cfft_instance_f32 *Sint;\n\n  if (!S)\n    return ARM_MATH_ARGUMENT_ERROR;\n\n  Sint = &(S->Sint);\n  Sint->fftLen = 32U;\n  S->fftLenRFFT = 64U;\n\n  Sint->bitRevLength = ARMBITREVINDEXTABLE_32_TABLE_LENGTH;\n  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;\n  Sint->pTwiddle = (float32_t *)twiddleCoef_32;\n  S->pTwiddleRFFT = (float32_t *)twiddleCoef_rfft_64;\n\n  return ARM_MATH_SUCCESS;\n}\n\n/**\n  @brief         Initialization function for the 128pt floating-point real FFT.\n  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : an error is detected\n */\n\narm_status arm_rfft_128_fast_init_f32(arm_rfft_fast_instance_f32 *S) {\n\n  arm_cfft_instance_f32 *Sint;\n\n  if (!S)\n    return ARM_MATH_ARGUMENT_ERROR;\n\n  Sint = &(S->Sint);\n  Sint->fftLen = 64U;\n  S->fftLenRFFT = 128U;\n\n  Sint->bitRevLength = ARMBITREVINDEXTABLE_64_TABLE_LENGTH;\n  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;\n  Sint->pTwiddle = (float32_t *)twiddleCoef_64;\n  S->pTwiddleRFFT = (float32_t *)twiddleCoef_rfft_128;\n\n  return ARM_MATH_SUCCESS;\n}\n\n/**\n  @brief         Initialization function for the 256pt floating-point real FFT.\n  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : an error is detected\n*/\n\narm_status arm_rfft_256_fast_init_f32(arm_rfft_fast_instance_f32 *S) {\n\n  arm_cfft_instance_f32 *Sint;\n\n  if (!S)\n    return ARM_MATH_ARGUMENT_ERROR;\n\n  Sint = &(S->Sint);\n  Sint->fftLen = 128U;\n  S->fftLenRFFT = 256U;\n\n  Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;\n  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;\n  Sint->pTwiddle = (float32_t *)twiddleCoef_128;\n  S->pTwiddleRFFT = (float32_t *)twiddleCoef_rfft_256;\n\n  return ARM_MATH_SUCCESS;\n}\n\n/**\n  @brief         Initialization function for the 512pt floating-point real FFT.\n  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : an error is detected\n */\n\narm_status arm_rfft_512_fast_init_f32(arm_rfft_fast_instance_f32 *S) {\n\n  arm_cfft_instance_f32 *Sint;\n\n  if (!S)\n    return ARM_MATH_ARGUMENT_ERROR;\n\n  Sint = &(S->Sint);\n  Sint->fftLen = 256U;\n  S->fftLenRFFT = 512U;\n\n  Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;\n  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;\n  Sint->pTwiddle = (float32_t *)twiddleCoef_256;\n  S->pTwiddleRFFT = (float32_t *)twiddleCoef_rfft_512;\n\n  return ARM_MATH_SUCCESS;\n}\n\n/**\n  @brief         Initialization function for the 1024pt floating-point real FFT.\n  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : an error is detected\n */\n\narm_status arm_rfft_1024_fast_init_f32(arm_rfft_fast_instance_f32 *S) {\n\n  arm_cfft_instance_f32 *Sint;\n\n  if (!S)\n    return ARM_MATH_ARGUMENT_ERROR;\n\n  Sint = &(S->Sint);\n  Sint->fftLen = 512U;\n  S->fftLenRFFT = 1024U;\n\n  Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;\n  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;\n  Sint->pTwiddle = (float32_t *)twiddleCoef_512;\n  S->pTwiddleRFFT = (float32_t *)twiddleCoef_rfft_1024;\n\n  return ARM_MATH_SUCCESS;\n}\n\n/**\n  @brief         Initialization function for the 2048pt floating-point real FFT.\n  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : an error is detected\n */\narm_status arm_rfft_2048_fast_init_f32(arm_rfft_fast_instance_f32 *S) {\n\n  arm_cfft_instance_f32 *Sint;\n\n  if (!S)\n    return ARM_MATH_ARGUMENT_ERROR;\n\n  Sint = &(S->Sint);\n  Sint->fftLen = 1024U;\n  S->fftLenRFFT = 2048U;\n\n  Sint->bitRevLength = ARMBITREVINDEXTABLE_1024_TABLE_LENGTH;\n  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;\n  Sint->pTwiddle = (float32_t *)twiddleCoef_1024;\n  S->pTwiddleRFFT = (float32_t *)twiddleCoef_rfft_2048;\n\n  return ARM_MATH_SUCCESS;\n}\n\n/**\n* @brief         Initialization function for the 4096pt floating-point real FFT.\n* @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : an error is detected\n */\n\narm_status arm_rfft_4096_fast_init_f32(arm_rfft_fast_instance_f32 *S) {\n\n  arm_cfft_instance_f32 *Sint;\n\n  if (!S)\n    return ARM_MATH_ARGUMENT_ERROR;\n\n  Sint = &(S->Sint);\n  Sint->fftLen = 2048U;\n  S->fftLenRFFT = 4096U;\n\n  Sint->bitRevLength = ARMBITREVINDEXTABLE_2048_TABLE_LENGTH;\n  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;\n  Sint->pTwiddle = (float32_t *)twiddleCoef_2048;\n  S->pTwiddleRFFT = (float32_t *)twiddleCoef_rfft_4096;\n\n  return ARM_MATH_SUCCESS;\n}\n\n/**\n  @brief         Initialization function for the floating-point real FFT.\n  @param[in,out] S       points to an arm_rfft_fast_instance_f32 structure\n  @param[in]     fftLen  length of the Real Sequence\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a\n  supported length\n\n  @par           Description\n                   The parameter fftLen specifies the length of\n  RFFT/CIFFT process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024,\n  2048, 4096.\n  @par\n                   This Function also initializes Twiddle factor table pointer\n  and Bit reversal table pointer.\n */\n\narm_status arm_rfft_fast_init_f32(arm_rfft_fast_instance_f32 *S,\n                                  uint16_t fftLen) {\n  typedef arm_status (*fft_init_ptr)(arm_rfft_fast_instance_f32 *);\n  fft_init_ptr fptr = 0x0;\n\n  switch (fftLen) {\n#ifdef ENABLE_ARM_RFFT_F32_4096\n  case 4096U:\n    fptr = arm_rfft_4096_fast_init_f32;\n    break;\n#endif\n#ifdef ENABLE_ARM_RFFT_F32_4096\n  case 2048U:\n    fptr = arm_rfft_2048_fast_init_f32;\n    break;\n#endif\n  case 1024U:\n    fptr = arm_rfft_1024_fast_init_f32;\n    break;\n  case 512U:\n    fptr = arm_rfft_512_fast_init_f32;\n    break;\n  case 256U:\n    fptr = arm_rfft_256_fast_init_f32;\n    break;\n  case 128U:\n    fptr = arm_rfft_128_fast_init_f32;\n    break;\n  case 64U:\n    fptr = arm_rfft_64_fast_init_f32;\n    break;\n  case 32U:\n    fptr = arm_rfft_32_fast_init_f32;\n    break;\n  default:\n    return ARM_MATH_ARGUMENT_ERROR;\n  }\n\n  if (!fptr)\n    return ARM_MATH_ARGUMENT_ERROR;\n  return fptr(S);\n}\n\n/**\n  @} end of RealFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_rfft_init_f32.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rfft_init_f32.c\n * Description:  RFFT & RIFFT Floating point initialisation function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/**\n  @ingroup RealFFT\n */\n\n/**\n  @addtogroup RealFFT_Table Real FFT Tables\n  @{\n */\n\n/**\n  @par\n  Generation of realCoefA array:\n  @par\n  n = 4096\n  
for (i = 0; i < n; i++)\n  {\n     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) *\n  (double) i)); pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 *\n  n) * (double) i));\n  }
\n */\n\nstatic const float32_t realCoefA[8192] = {\n    0.500000000000000f,  -0.500000000000000f, 0.499616503715515f,\n    -0.499999850988388f, 0.499233007431030f,  -0.499999403953552f,\n    0.498849511146545f,  -0.499998688697815f, 0.498466014862061f,\n    -0.499997645616531f, 0.498082518577576f,  -0.499996334314346f,\n    0.497699022293091f,  -0.499994695186615f, 0.497315555810928f,\n    -0.499992787837982f, 0.496932059526443f,  -0.499990582466125f,\n    0.496548563241959f,  -0.499988079071045f, 0.496165096759796f,\n    -0.499985307455063f, 0.495781600475311f,  -0.499982208013535f,\n    0.495398133993149f,  -0.499978810548782f, 0.495014637708664f,\n    -0.499975144863129f, 0.494631171226501f,  -0.499971181154251f,\n    0.494247704744339f,  -0.499966919422150f, 0.493864238262177f,\n    -0.499962359666824f, 0.493480771780014f,  -0.499957501888275f,\n    0.493097305297852f,  -0.499952346086502f, 0.492713838815689f,\n    -0.499946922063828f, 0.492330402135849f,  -0.499941170215607f,\n    0.491946935653687f,  -0.499935150146484f, 0.491563498973846f,\n    -0.499928832054138f, 0.491180062294006f,  -0.499922215938568f,\n    0.490796625614166f,  -0.499915301799774f, 0.490413218736649f,\n    -0.499908089637756f, 0.490029782056808f,  -0.499900579452515f,\n    0.489646375179291f,  -0.499892801046371f, 0.489262968301773f,\n    -0.499884694814682f, 0.488879561424255f,  -0.499876320362091f,\n    0.488496154546738f,  -0.499867647886276f, 0.488112777471542f,\n    -0.499858677387238f, 0.487729400396347f,  -0.499849408864975f,\n    0.487346023321152f,  -0.499839842319489f, 0.486962646245956f,\n    -0.499830007553101f, 0.486579269170761f,  -0.499819844961166f,\n    0.486195921897888f,  -0.499809414148331f, 0.485812574625015f,\n    -0.499798685312271f, 0.485429257154465f,  -0.499787658452988f,\n    0.485045909881592f,  -0.499776333570480f, 0.484662592411041f,\n    -0.499764710664749f, 0.484279274940491f,  -0.499752789735794f,\n    0.483895987272263f,  -0.499740600585938f, 0.483512699604034f,\n    -0.499728083610535f, 0.483129411935806f,  -0.499715298414230f,\n    0.482746154069901f,  -0.499702215194702f, 0.482362866401672f,\n    -0.499688833951950f, 0.481979638338089f,  -0.499675154685974f,\n    0.481596380472183f,  -0.499661177396774f, 0.481213152408600f,\n    -0.499646931886673f, 0.480829954147339f,  -0.499632388353348f,\n    0.480446726083755f,  -0.499617516994476f, 0.480063527822495f,\n    -0.499602377414703f, 0.479680359363556f,  -0.499586939811707f,\n    0.479297190904617f,  -0.499571204185486f, 0.478914022445679f,\n    -0.499555170536041f, 0.478530883789063f,  -0.499538868665695f,\n    0.478147745132446f,  -0.499522238969803f, 0.477764606475830f,\n    -0.499505341053009f, 0.477381497621536f,  -0.499488145112991f,\n    0.476998418569565f,  -0.499470651149750f, 0.476615339517593f,\n    -0.499452859163284f, 0.476232260465622f,  -0.499434769153595f,\n    0.475849211215973f,  -0.499416410923004f, 0.475466161966324f,\n    -0.499397724866867f, 0.475083142518997f,  -0.499378770589828f,\n    0.474700123071671f,  -0.499359518289566f, 0.474317133426666f,\n    -0.499339967966080f, 0.473934143781662f,  -0.499320119619370f,\n    0.473551183938980f,  -0.499299973249435f, 0.473168224096298f,\n    -0.499279528856277f, 0.472785294055939f,  -0.499258816242218f,\n    0.472402364015579f,  -0.499237775802612f, 0.472019463777542f,\n    -0.499216467142105f, 0.471636593341827f,  -0.499194860458374f,\n    0.471253722906113f,  -0.499172955751419f, 0.470870882272720f,\n    -0.499150782823563f, 0.470488041639328f,  -0.499128282070160f,\n    0.470105201005936f,  -0.499105513095856f, 0.469722419977188f,\n    -0.499082416296005f, 0.469339638948441f,  -0.499059051275253f,\n    0.468956857919693f,  -0.499035388231277f, 0.468574106693268f,\n    -0.499011427164078f, 0.468191385269165f,  -0.498987197875977f,\n    0.467808693647385f,  -0.498962640762329f, 0.467426002025604f,\n    -0.498937815427780f, 0.467043310403824f,  -0.498912662267685f,\n    0.466660678386688f,  -0.498887240886688f, 0.466278046369553f,\n    -0.498861521482468f, 0.465895414352417f,  -0.498835533857346f,\n    0.465512841939926f,  -0.498809218406677f, 0.465130269527435f,\n    -0.498782604932785f, 0.464747726917267f,  -0.498755723237991f,\n    0.464365184307098f,  -0.498728543519974f, 0.463982671499252f,\n    -0.498701065778732f, 0.463600188493729f,  -0.498673290014267f,\n    0.463217705488205f,  -0.498645216226578f, 0.462835282087326f,\n    -0.498616874217987f, 0.462452858686447f,  -0.498588204383850f,\n    0.462070435285568f,  -0.498559266328812f, 0.461688071489334f,\n    -0.498530030250549f, 0.461305707693100f,  -0.498500496149063f,\n    0.460923373699188f,  -0.498470664024353f, 0.460541069507599f,\n    -0.498440563678741f, 0.460158795118332f,  -0.498410135507584f,\n    0.459776520729065f,  -0.498379439115524f, 0.459394276142120f,\n    -0.498348444700241f, 0.459012061357498f,  -0.498317152261734f,\n    0.458629876375198f,  -0.498285561800003f, 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0.422464638948441f,  0.493951678276062f,\n    0.422843515872955f,  0.494011014699936f,  0.423222452402115f,\n    0.494070053100586f,  0.423601418733597f,  0.494128793478012f,\n    0.423980414867401f,  0.494187235832214f,  0.424359470605850f,\n    0.494245409965515f,  0.424738585948944f,  0.494303256273270f,\n    0.425117731094360f,  0.494360834360123f,  0.425496935844421f,\n    0.494418144226074f,  0.425876170396805f,  0.494475126266479f,\n    0.426255434751511f,  0.494531840085983f,  0.426634758710861f,\n    0.494588255882263f,  0.427014142274857f,  0.494644373655319f,\n    0.427393525838852f,  0.494700223207474f,  0.427772998809814f,\n    0.494755744934082f,  0.428152471780777f,  0.494810998439789f,\n    0.428532034158707f,  0.494865983724594f,  0.428911596536636f,\n    0.494920641183853f,  0.429291218519211f,  0.494975030422211f,\n    0.429670870304108f,  0.495029091835022f,  0.430050581693649f,\n    0.495082914829254f,  0.430430322885513f,  0.495136409997940f,\n    0.430810123682022f,  0.495189607143402f,  0.431189924478531f,\n    0.495242536067963f,  0.431569814682007f,  0.495295166969299f,\n    0.431949704885483f,  0.495347499847412f,  0.432329654693604f,\n    0.495399564504623f,  0.432709634304047f,  0.495451331138611f,\n    0.433089673519135f,  0.495502769947052f,  0.433469742536545f,\n    0.495553970336914f,  0.433849841356277f,  0.495604842901230f,\n    0.434229999780655f,  0.495655417442322f,  0.434610158205032f,\n    0.495705723762512f,  0.434990376234055f,  0.495755732059479f,\n    0.435370653867722f,  0.495805442333221f,  0.435750931501389f,\n    0.495854884386063f,  0.436131268739700f,  0.495903998613358f,\n    0.436511665582657f,  0.495952844619751f,  0.436892062425613f,\n    0.496001392602921f,  0.437272518873215f,  0.496049642562866f,\n    0.437653005123138f,  0.496097624301910f,  0.438033521175385f,\n    0.496145308017731f,  0.438414067029953f,  0.496192663908005f,\n    0.438794672489166f,  0.496239781379700f,  0.439175277948380f,\n    0.496286571025848f,  0.439555943012238f,  0.496333062648773f,\n    0.439936667680740f,  0.496379286050797f,  0.440317392349243f,\n    0.496425211429596f,  0.440698176622391f,  0.496470838785172f,\n    0.441078960895538f,  0.496516168117523f,  0.441459804773331f,\n    0.496561229228973f,  0.441840678453445f,  0.496605962514877f,\n    0.442221581935883f,  0.496650427579880f,  0.442602545022964f,\n    0.496694594621658f,  0.442983508110046f,  0.496738493442535f,\n    0.443364530801773f,  0.496782064437866f,  0.443745553493500f,\n    0.496825367212296f,  0.444126635789871f,  0.496868371963501f,\n    0.444507747888565f,  0.496911078691483f,  0.444888889789581f,\n    0.496953487396240f,  0.445270061492920f,  0.496995598077774f,\n    0.445651292800903f,  0.497037440538406f,  0.446032524108887f,\n    0.497078984975815f,  0.446413785219193f,  0.497120231389999f,\n    0.446795076131821f,  0.497161179780960f,  0.447176426649094f,\n    0.497201830148697f,  0.447557777166367f,  0.497242212295532f,\n    0.447939187288284f,  0.497282296419144f,  0.448320597410202f,\n    0.497322082519531f,  0.448702067136765f,  0.497361570596695f,\n    0.449083566665649f,  0.497400760650635f,  0.449465066194534f,\n    0.497439652681351f,  0.449846625328064f,  0.497478276491165f,\n    0.450228184461594f,  0.497516602277756f,  0.450609803199768f,\n    0.497554630041122f,  0.450991421937943f,  0.497592359781265f,\n    0.451373100280762f,  0.497629791498184f,  0.451754778623581f,\n    0.497666954994202f,  0.452136516571045f,  0.497703820466995f,\n    0.452518254518509f,  0.497740387916565f,  0.452900022268295f,\n    0.497776657342911f,  0.453281819820404f,  0.497812628746033f,\n    0.453663676977158f,  0.497848302125931f,  0.454045534133911f,\n    0.497883707284927f,  0.454427421092987f,  0.497918814420700f,\n    0.454809308052063f,  0.497953623533249f,  0.455191254615784f,\n    0.497988134622574f,  0.455573230981827f,  0.498022347688675f,\n    0.455955207347870f,  0.498056292533875f,  0.456337243318558f,\n    0.498089909553528f,  0.456719279289246f,  0.498123258352280f,\n    0.457101345062256f,  0.498156309127808f,  0.457483440637589f,\n    0.498189061880112f,  0.457865566015244f,  0.498221516609192f,\n    0.458247691392899f,  0.498253703117371f,  0.458629876375198f,\n    0.498285561800003f,  0.459012061357498f,  0.498317152261734f,\n    0.459394276142120f,  0.498348444700241f,  0.459776520729065f,\n    0.498379439115524f,  0.460158795118332f,  0.498410135507584f,\n    0.460541069507599f,  0.498440563678741f,  0.460923373699188f,\n    0.498470664024353f,  0.461305707693100f,  0.498500496149063f,\n    0.461688071489334f,  0.498530030250549f,  0.462070435285568f,\n    0.498559266328812f,  0.462452858686447f,  0.498588204383850f,\n    0.462835282087326f,  0.498616874217987f,  0.463217705488205f,\n    0.498645216226578f,  0.463600188493729f,  0.498673290014267f,\n    0.463982671499252f,  0.498701065778732f,  0.464365184307098f,\n    0.498728543519974f,  0.464747726917267f,  0.498755723237991f,\n    0.465130269527435f,  0.498782604932785f,  0.465512841939926f,\n    0.498809218406677f,  0.465895414352417f,  0.498835533857346f,\n    0.466278046369553f,  0.498861521482468f,  0.466660678386688f,\n    0.498887240886688f,  0.467043310403824f,  0.498912662267685f,\n    0.467426002025604f,  0.498937815427780f,  0.467808693647385f,\n    0.498962640762329f,  0.468191385269165f,  0.498987197875977f,\n    0.468574106693268f,  0.499011427164078f,  0.468956857919693f,\n    0.499035388231277f,  0.469339638948441f,  0.499059051275253f,\n    0.469722419977188f,  0.499082416296005f,  0.470105201005936f,\n    0.499105513095856f,  0.470488041639328f,  0.499128282070160f,\n    0.470870882272720f,  0.499150782823563f,  0.471253722906113f,\n    0.499172955751419f,  0.471636593341827f,  0.499194860458374f,\n    0.472019463777542f,  0.499216467142105f,  0.472402364015579f,\n    0.499237775802612f,  0.472785294055939f,  0.499258816242218f,\n    0.473168224096298f,  0.499279528856277f,  0.473551183938980f,\n    0.499299973249435f,  0.473934143781662f,  0.499320119619370f,\n    0.474317133426666f,  0.499339967966080f,  0.474700123071671f,\n    0.499359518289566f,  0.475083142518997f,  0.499378770589828f,\n    0.475466161966324f,  0.499397724866867f,  0.475849211215973f,\n    0.499416410923004f,  0.476232260465622f,  0.499434769153595f,\n    0.476615339517593f,  0.499452859163284f,  0.476998418569565f,\n    0.499470651149750f,  0.477381497621536f,  0.499488145112991f,\n    0.477764606475830f,  0.499505341053009f,  0.478147745132446f,\n    0.499522238969803f,  0.478530883789063f,  0.499538868665695f,\n    0.478914022445679f,  0.499555170536041f,  0.479297190904617f,\n    0.499571204185486f,  0.479680359363556f,  0.499586939811707f,\n    0.480063527822495f,  0.499602377414703f,  0.480446726083755f,\n    0.499617516994476f,  0.480829954147339f,  0.499632388353348f,\n    0.481213152408600f,  0.499646931886673f,  0.481596380472183f,\n    0.499661177396774f,  0.481979638338089f,  0.499675154685974f,\n    0.482362866401672f,  0.499688833951950f,  0.482746154069901f,\n    0.499702215194702f,  0.483129411935806f,  0.499715298414230f,\n    0.483512699604034f,  0.499728083610535f,  0.483895987272263f,\n    0.499740600585938f,  0.484279274940491f,  0.499752789735794f,\n    0.484662592411041f,  0.499764710664749f,  0.485045909881592f,\n    0.499776333570480f,  0.485429257154465f,  0.499787658452988f,\n    0.485812574625015f,  0.499798685312271f,  0.486195921897888f,\n    0.499809414148331f,  0.486579269170761f,  0.499819844961166f,\n    0.486962646245956f,  0.499830007553101f,  0.487346023321152f,\n    0.499839842319489f,  0.487729400396347f,  0.499849408864975f,\n    0.488112777471542f,  0.499858677387238f,  0.488496154546738f,\n    0.499867647886276f,  0.488879561424255f,  0.499876320362091f,\n    0.489262968301773f,  0.499884694814682f,  0.489646375179291f,\n    0.499892801046371f,  0.490029782056808f,  0.499900579452515f,\n    0.490413218736649f,  0.499908089637756f,  0.490796625614166f,\n    0.499915301799774f,  0.491180062294006f,  0.499922215938568f,\n    0.491563498973846f,  0.499928832054138f,  0.491946935653687f,\n    0.499935150146484f,  0.492330402135849f,  0.499941170215607f,\n    0.492713838815689f,  0.499946922063828f,  0.493097305297852f,\n    0.499952346086502f,  0.493480771780014f,  0.499957501888275f,\n    0.493864238262177f,  0.499962359666824f,  0.494247704744339f,\n    0.499966919422150f,  0.494631171226501f,  0.499971181154251f,\n    0.495014637708664f,  0.499975144863129f,  0.495398133993149f,\n    0.499978810548782f,  0.495781600475311f,  0.499982208013535f,\n    0.496165096759796f,  0.499985307455063f,  0.496548563241959f,\n    0.499988079071045f,  0.496932059526443f,  0.499990582466125f,\n    0.497315555810928f,  0.499992787837982f,  0.497699022293091f,\n    0.499994695186615f,  0.498082518577576f,  0.499996334314346f,\n    0.498466014862061f,  0.499997645616531f,  0.498849511146545f,\n    0.499998688697815f,  0.499233007431030f,  0.499999403953552f,\n    0.499616503715515f,  0.499999850988388f,\n};\n\n/**\n  @par\n  Generation of realCoefB array:\n  @par\n  n = 4096\n  
for (i = 0; i < n; i++)\n  {\n     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double)\n  i)); pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) *\n  (double) i));\n  }
\n */\n\nstatic const float32_t realCoefB[8192] = {\n    0.500000000000000f,  0.500000000000000f,  0.500383496284485f,\n    0.499999850988388f,  0.500766992568970f,  0.499999403953552f,\n    0.501150488853455f,  0.499998688697815f,  0.501533985137939f,\n    0.499997645616531f,  0.501917481422424f,  0.499996334314346f,\n    0.502300977706909f,  0.499994695186615f,  0.502684473991394f,\n    0.499992787837982f,  0.503067970275879f,  0.499990582466125f,\n    0.503451406955719f,  0.499988079071045f,  0.503834903240204f,\n    0.499985307455063f,  0.504218399524689f,  0.499982208013535f,\n    0.504601895809174f,  0.499978810548782f,  0.504985332489014f,\n    0.499975144863129f,  0.505368828773499f,  0.499971181154251f,\n    0.505752325057983f,  0.499966919422150f,  0.506135761737823f,\n    0.499962359666824f,  0.506519258022308f,  0.499957501888275f,\n    0.506902694702148f,  0.499952346086502f,  0.507286131381989f,\n    0.499946922063828f,  0.507669627666473f,  0.499941170215607f,\n    0.508053064346313f,  0.499935150146484f,  0.508436501026154f,\n    0.499928832054138f,  0.508819937705994f,  0.499922215938568f,\n    0.509203374385834f,  0.499915301799774f,  0.509586811065674f,\n    0.499908089637756f,  0.509970188140869f,  0.499900579452515f,\n    0.510353624820709f,  0.499892801046371f,  0.510737061500549f,\n    0.499884694814682f,  0.511120438575745f,  0.499876320362091f,\n    0.511503815650940f,  0.499867647886276f,  0.511887252330780f,\n    0.499858677387238f,  0.512270629405975f,  0.499849408864975f,\n    0.512654006481171f,  0.499839842319489f,  0.513037383556366f,\n    0.499830007553101f,  0.513420701026917f,  0.499819844961166f,\n    0.513804078102112f,  0.499809414148331f,  0.514187395572662f,\n    0.499798685312271f,  0.514570772647858f,  0.499787658452988f,\n    0.514954090118408f,  0.499776333570480f,  0.515337407588959f,\n    0.499764710664749f,  0.515720725059509f,  0.499752789735794f,\n    0.516103982925415f,  0.499740600585938f,  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0.610672831535339f,\n    -0.487597703933716f, 0.610298871994019f,  -0.487682431936264f,\n    0.609924793243408f,  -0.487766891717911f, 0.609550595283508f,\n    -0.487851053476334f, 0.609176397323608f,  -0.487934947013855f,\n    0.608802139759064f,  -0.488018542528152f, 0.608427822589874f,\n    -0.488101840019226f, 0.608053386211395f,  -0.488184869289398f,\n    0.607678949832916f,  -0.488267600536346f, 0.607304394245148f,\n    -0.488350033760071f, 0.606929838657379f,  -0.488432198762894f,\n    0.606555163860321f,  -0.488514065742493f, 0.606180429458618f,\n    -0.488595664501190f, 0.605805635452271f,  -0.488676935434341f,\n    0.605430841445923f,  -0.488757967948914f, 0.605055928230286f,\n    -0.488838672637939f, 0.604680955410004f,  -0.488919109106064f,\n    0.604305922985077f,  -0.488999247550964f, 0.603930830955505f,\n    -0.489079117774963f, 0.603555679321289f,  -0.489158689975739f,\n    0.603180468082428f,  -0.489237964153290f, 0.602805197238922f,\n    -0.489316970109940f, 0.602429866790771f,  -0.489395678043365f,\n    0.602054476737976f,  -0.489474087953568f, 0.601679027080536f,\n    -0.489552229642868f, 0.601303517818451f,  -0.489630073308945f,\n    0.600927948951721f,  -0.489707618951797f, 0.600552320480347f,\n    -0.489784896373749f, 0.600176632404327f,  -0.489861875772476f,\n    0.599800884723663f,  -0.489938557147980f, 0.599425077438354f,\n    -0.490014940500259f, 0.599049210548401f,  -0.490091055631638f,\n    0.598673284053802f,  -0.490166902542114f, 0.598297297954559f,\n    -0.490242421627045f, 0.597921252250671f,  -0.490317672491074f,\n    0.597545146942139f,  -0.490392625331879f, 0.597168982028961f,\n    -0.490467309951782f, 0.596792817115784f,  -0.490541696548462f,\n    0.596416532993317f,  -0.490615785121918f, 0.596040189266205f,\n    -0.490689605474472f, 0.595663845539093f,  -0.490763127803802f,\n    0.595287382602692f,  -0.490836352109909f, 0.594910860061646f,\n    -0.490909278392792f, 0.594534337520599f,  -0.490981936454773f,\n    0.594157755374908f,  -0.491054296493530f, 0.593781054019928f,\n    -0.491126358509064f, 0.593404352664948f,  -0.491198152303696f,\n    0.593027591705322f,  -0.491269648075104f, 0.592650771141052f,\n    -0.491340845823288f, 0.592273890972137f,  -0.491411775350571f,\n    0.591896951198578f,  -0.491482406854630f, 0.591519951820374f,\n    -0.491552740335464f, 0.591142892837524f,  -0.491622805595398f,\n    0.590765833854675f,  -0.491692543029785f, 0.590388655662537f,\n    -0.491762012243271f, 0.590011477470398f,  -0.491831213235855f,\n    0.589634180068970f,  -0.491900116205215f, 0.589256882667542f,\n    -0.491968721151352f, 0.588879525661469f,  -0.492037028074265f,\n    0.588502109050751f,  -0.492105036973953f, 0.588124632835388f,\n    -0.492172777652740f, 0.587747097015381f,  -0.492240220308304f,\n    0.587369561195374f,  -0.492307394742966f, 0.586991965770721f,\n    -0.492374241352081f, 0.586614251136780f,  -0.492440819740295f,\n    0.586236536502838f,  -0.492507129907608f, 0.585858762264252f,\n    -0.492573112249374f, 0.585480928421021f,  -0.492638826370239f,\n    0.585103094577789f,  -0.492704242467880f, 0.584725141525269f,\n    -0.492769360542297f, 0.584347188472748f,  -0.492834210395813f,\n    0.583969175815582f,  -0.492898762226105f, 0.583591103553772f,\n    -0.492963016033173f, 0.583212971687317f,  -0.493026971817017f,\n    0.582834780216217f,  -0.493090659379959f, 0.582456588745117f,\n    -0.493154048919678f, 0.582078278064728f,  -0.493217140436172f,\n    0.581699967384338f,  -0.493279963731766f, 0.581321597099304f,\n    -0.493342459201813f, 0.580943167209625f,  -0.493404686450958f,\n    0.580564737319946f,  -0.493466645479202f, 0.580186247825623f,\n    -0.493528276681900f, 0.579807698726654f,  -0.493589639663696f,\n    0.579429090023041f,  -0.493650704622269f, 0.579050421714783f,\n    -0.493711471557617f, 0.578671753406525f,  -0.493771970272064f,\n    0.578292965888977f,  -0.493832170963287f, 0.577914178371429f,\n    -0.493892073631287f, 0.577535390853882f,  -0.493951678276062f,\n    0.577156484127045f,  -0.494011014699936f, 0.576777577400208f,\n    -0.494070053100586f, 0.576398611068726f,  -0.494128793478012f,\n    0.576019585132599f,  -0.494187235832214f, 0.575640499591827f,\n    -0.494245409965515f, 0.575261414051056f,  -0.494303256273270f,\n    0.574882268905640f,  -0.494360834360123f, 0.574503064155579f,\n    -0.494418144226074f, 0.574123859405518f,  -0.494475126266479f,\n    0.573744535446167f,  -0.494531840085983f, 0.573365211486816f,\n    -0.494588255882263f, 0.572985887527466f,  -0.494644373655319f,\n    0.572606444358826f,  -0.494700223207474f, 0.572227001190186f,\n    -0.494755744934082f, 0.571847498416901f,  -0.494810998439789f,\n    0.571467995643616f,  -0.494865983724594f, 0.571088373661041f,\n    -0.494920641183853f, 0.570708811283112f,  -0.494975030422211f,\n    0.570329129695892f,  -0.495029091835022f, 0.569949388504028f,\n    -0.495082914829254f, 0.569569647312164f,  -0.495136409997940f,\n    0.569189906120300f,  -0.495189607143402f, 0.568810045719147f,\n    -0.495242536067963f, 0.568430185317993f,  -0.495295166969299f,\n    0.568050265312195f,  -0.495347499847412f, 0.567670345306396f,\n    -0.495399564504623f, 0.567290365695953f,  -0.495451331138611f,\n    0.566910326480865f,  -0.495502769947052f, 0.566530287265778f,\n    -0.495553970336914f, 0.566150128841400f,  -0.495604842901230f,\n    0.565770030021667f,  -0.495655417442322f, 0.565389811992645f,\n    -0.495705723762512f, 0.565009593963623f,  -0.495755732059479f,\n    0.564629375934601f,  -0.495805442333221f, 0.564249038696289f,\n    -0.495854884386063f, 0.563868701457977f,  -0.495903998613358f,\n    0.563488364219666f,  -0.495952844619751f, 0.563107967376709f,\n    -0.496001392602921f, 0.562727510929108f,  -0.496049642562866f,\n    0.562346994876862f,  -0.496097624301910f, 0.561966478824615f,\n    -0.496145308017731f, 0.561585903167725f,  -0.496192663908005f,\n    0.561205327510834f,  -0.496239781379700f, 0.560824692249298f,\n    -0.496286571025848f, 0.560444056987762f,  -0.496333062648773f,\n    0.560063362121582f,  -0.496379286050797f, 0.559682607650757f,\n    -0.496425211429596f, 0.559301853179932f,  -0.496470838785172f,\n    0.558921039104462f,  -0.496516168117523f, 0.558540165424347f,\n    -0.496561229228973f, 0.558159291744232f,  -0.496605962514877f,\n    0.557778418064117f,  -0.496650427579880f, 0.557397484779358f,\n    -0.496694594621658f, 0.557016491889954f,  -0.496738493442535f,\n    0.556635499000549f,  -0.496782064437866f, 0.556254446506500f,\n    -0.496825367212296f, 0.555873334407806f,  -0.496868371963501f,\n    0.555492222309113f,  -0.496911078691483f, 0.555111110210419f,\n    -0.496953487396240f, 0.554729938507080f,  -0.496995598077774f,\n    0.554348707199097f,  -0.497037440538406f, 0.553967475891113f,\n    -0.497078984975815f, 0.553586184978485f,  -0.497120231389999f,\n    0.553204894065857f,  -0.497161179780960f, 0.552823603153229f,\n    -0.497201830148697f, 0.552442193031311f,  -0.497242212295532f,\n    0.552060842514038f,  -0.497282296419144f, 0.551679372787476f,\n    -0.497322082519531f, 0.551297962665558f,  -0.497361570596695f,\n    0.550916433334351f,  -0.497400760650635f, 0.550534904003143f,\n    -0.497439652681351f, 0.550153374671936f,  -0.497478276491165f,\n    0.549771785736084f,  -0.497516602277756f, 0.549390196800232f,\n    -0.497554630041122f, 0.549008548259735f,  -0.497592359781265f,\n    0.548626899719238f,  -0.497629791498184f, 0.548245191574097f,\n    -0.497666954994202f, 0.547863483428955f,  -0.497703820466995f,\n    0.547481775283813f,  -0.497740387916565f, 0.547099947929382f,\n    -0.497776657342911f, 0.546718180179596f,  -0.497812628746033f,\n    0.546336352825165f,  -0.497848302125931f, 0.545954465866089f,\n    -0.497883707284927f, 0.545572578907013f,  -0.497918814420700f,\n    0.545190691947937f,  -0.497953623533249f, 0.544808745384216f,\n    -0.497988134622574f, 0.544426798820496f,  -0.498022347688675f,\n    0.544044792652130f,  -0.498056292533875f, 0.543662786483765f,\n    -0.498089909553528f, 0.543280720710754f,  -0.498123258352280f,\n    0.542898654937744f,  -0.498156309127808f, 0.542516589164734f,\n    -0.498189061880112f, 0.542134463787079f,  -0.498221516609192f,\n    0.541752278804779f,  -0.498253703117371f, 0.541370153427124f,\n    -0.498285561800003f, 0.540987968444824f,  -0.498317152261734f,\n    0.540605723857880f,  -0.498348444700241f, 0.540223479270935f,\n    -0.498379439115524f, 0.539841234683990f,  -0.498410135507584f,\n    0.539458930492401f,  -0.498440563678741f, 0.539076626300812f,\n    -0.498470664024353f, 0.538694262504578f,  -0.498500496149063f,\n    0.538311958312988f,  -0.498530030250549f, 0.537929534912109f,\n    -0.498559266328812f, 0.537547171115875f,  -0.498588204383850f,\n    0.537164747714996f,  -0.498616874217987f, 0.536782264709473f,\n    -0.498645216226578f, 0.536399841308594f,  -0.498673290014267f,\n    0.536017298698425f,  -0.498701065778732f, 0.535634815692902f,\n    -0.498728543519974f, 0.535252273082733f,  -0.498755723237991f,\n    0.534869730472565f,  -0.498782604932785f, 0.534487187862396f,\n    -0.498809218406677f, 0.534104585647583f,  -0.498835533857346f,\n    0.533721983432770f,  -0.498861521482468f, 0.533339321613312f,\n    -0.498887240886688f, 0.532956659793854f,  -0.498912662267685f,\n    0.532573997974396f,  -0.498937815427780f, 0.532191336154938f,\n    -0.498962640762329f, 0.531808614730835f,  -0.498987197875977f,\n    0.531425893306732f,  -0.499011427164078f, 0.531043112277985f,\n    -0.499035388231277f, 0.530660390853882f,  -0.499059051275253f,\n    0.530277609825134f,  -0.499082416296005f, 0.529894769191742f,\n    -0.499105513095856f, 0.529511988162994f,  -0.499128282070160f,\n    0.529129147529602f,  -0.499150782823563f, 0.528746306896210f,\n    -0.499172955751419f, 0.528363406658173f,  -0.499194860458374f,\n    0.527980506420136f,  -0.499216467142105f, 0.527597606182098f,\n    -0.499237775802612f, 0.527214705944061f,  -0.499258816242218f,\n    0.526831746101379f,  -0.499279528856277f, 0.526448845863342f,\n    -0.499299973249435f, 0.526065826416016f,  -0.499320119619370f,\n    0.525682866573334f,  -0.499339967966080f, 0.525299847126007f,\n    -0.499359518289566f, 0.524916887283325f,  -0.499378770589828f,\n    0.524533808231354f,  -0.499397724866867f, 0.524150788784027f,\n    -0.499416410923004f, 0.523767769336700f,  -0.499434769153595f,\n    0.523384690284729f,  -0.499452859163284f, 0.523001611232758f,\n    -0.499470651149750f, 0.522618472576141f,  -0.499488145112991f,\n    0.522235393524170f,  -0.499505341053009f, 0.521852254867554f,\n    -0.499522238969803f, 0.521469116210938f,  -0.499538868665695f,\n    0.521085977554321f,  -0.499555170536041f, 0.520702838897705f,\n    -0.499571204185486f, 0.520319640636444f,  -0.499586939811707f,\n    0.519936442375183f,  -0.499602377414703f, 0.519553244113922f,\n    -0.499617516994476f, 0.519170045852661f,  -0.499632388353348f,\n    0.518786847591400f,  -0.499646931886673f, 0.518403589725494f,\n    -0.499661177396774f, 0.518020391464233f,  -0.499675154685974f,\n    0.517637133598328f,  -0.499688833951950f, 0.517253875732422f,\n    -0.499702215194702f, 0.516870558261871f,  -0.499715298414230f,\n    0.516487300395966f,  -0.499728083610535f, 0.516103982925415f,\n    -0.499740600585938f, 0.515720725059509f,  -0.499752789735794f,\n    0.515337407588959f,  -0.499764710664749f, 0.514954090118408f,\n    -0.499776333570480f, 0.514570772647858f,  -0.499787658452988f,\n    0.514187395572662f,  -0.499798685312271f, 0.513804078102112f,\n    -0.499809414148331f, 0.513420701026917f,  -0.499819844961166f,\n    0.513037383556366f,  -0.499830007553101f, 0.512654006481171f,\n    -0.499839842319489f, 0.512270629405975f,  -0.499849408864975f,\n    0.511887252330780f,  -0.499858677387238f, 0.511503815650940f,\n    -0.499867647886276f, 0.511120438575745f,  -0.499876320362091f,\n    0.510737061500549f,  -0.499884694814682f, 0.510353624820709f,\n    -0.499892801046371f, 0.509970188140869f,  -0.499900579452515f,\n    0.509586811065674f,  -0.499908089637756f, 0.509203374385834f,\n    -0.499915301799774f, 0.508819937705994f,  -0.499922215938568f,\n    0.508436501026154f,  -0.499928832054138f, 0.508053064346313f,\n    -0.499935150146484f, 0.507669627666473f,  -0.499941170215607f,\n    0.507286131381989f,  -0.499946922063828f, 0.506902694702148f,\n    -0.499952346086502f, 0.506519258022308f,  -0.499957501888275f,\n    0.506135761737823f,  -0.499962359666824f, 0.505752325057983f,\n    -0.499966919422150f, 0.505368828773499f,  -0.499971181154251f,\n    0.504985332489014f,  -0.499975144863129f, 0.504601895809174f,\n    -0.499978810548782f, 0.504218399524689f,  -0.499982208013535f,\n    0.503834903240204f,  -0.499985307455063f, 0.503451406955719f,\n    -0.499988079071045f, 0.503067970275879f,  -0.499990582466125f,\n    0.502684473991394f,  -0.499992787837982f, 0.502300977706909f,\n    -0.499994695186615f, 0.501917481422424f,  -0.499996334314346f,\n    0.501533985137939f,  -0.499997645616531f, 0.501150488853455f,\n    -0.499998688697815f, 0.500766992568970f,  -0.499999403953552f,\n    0.500383496284485f,  -0.499999850988388f,\n};\n\n/**\n  @} end of RealFFT_Table group\n */\n\n/**\n  @addtogroup RealFFT\n  @{\n */\n\n/**\n  @brief         Initialization function for the floating-point RFFT/RIFFT.\n  @deprecated    Do not use this function. It has been superceded by \\ref\n  arm_rfft_fast_init_f32 and will be removed in the future.\n  @param[in,out] S             points to an instance of the floating-point\n  RFFT/RIFFT structure\n  @param[in,out] S_CFFT        points to an instance of the floating-point\n  CFFT/CIFFT structure\n  @param[in]     fftLenReal     length of the FFT.\n  @param[in]     ifftFlagR      flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is\n  not a supported length\n\n  @par Description\n                   The parameter fftLenRealspecifies length of\n  RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.\n  @par\n                   The parameter ifftFlagR controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlagR to calculate\n  RIFFT, otherwise RFFT is calculated.\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   This function also initializes Twiddle factor table.\n */\n\narm_status arm_rfft_init_f32(arm_rfft_instance_f32 *S,\n                             arm_cfft_radix4_instance_f32 *S_CFFT,\n                             uint32_t fftLenReal, uint32_t ifftFlagR,\n                             uint32_t bitReverseFlag) {\n\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /*  Initialize the Real FFT length */\n  S->fftLenReal = (uint16_t)fftLenReal;\n\n  /*  Initialize the Complex FFT length */\n  S->fftLenBy2 = (uint16_t)fftLenReal / 2U;\n\n  /*  Initialize the Twiddle coefficientA pointer */\n  S->pTwiddleAReal = (float32_t *)realCoefA;\n\n  /*  Initialize the Twiddle coefficientB pointer */\n  S->pTwiddleBReal = (float32_t *)realCoefB;\n\n  /*  Initialize the Flag for selection of RFFT or RIFFT */\n  S->ifftFlagR = (uint8_t)ifftFlagR;\n\n  /*  Initialize the Flag for calculation Bit reversal or not */\n  S->bitReverseFlagR = (uint8_t)bitReverseFlag;\n\n  /*  Initializations of structure parameters depending on the FFT length */\n  switch (S->fftLenReal) {\n    /* Init table modifier value */\n  case 8192U:\n    S->twidCoefRModifier = 1U;\n    break;\n  case 2048U:\n    S->twidCoefRModifier = 4U;\n    break;\n  case 512U:\n    S->twidCoefRModifier = 16U;\n    break;\n  case 128U:\n    S->twidCoefRModifier = 64U;\n    break;\n  default:\n    /*  Reporting argument error if rfftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  /* Init Complex FFT Instance */\n  S->pCfft = S_CFFT;\n\n  if (S->ifftFlagR) {\n    /* Initializes the CIFFT Module for fftLenreal/2 length */\n    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1U, 0U);\n  } else {\n    /* Initializes the CFFT Module for fftLenreal/2 length */\n    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0U, 0U);\n  }\n\n  /* return the status of RFFT Init function */\n  return (status);\n}\n\n/**\n  @} end of RealFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_rfft_init_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rfft_init_q15.c\n * Description:  RFFT & RIFFT Q15 initialisation function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_const_structs.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup RealFFT\n */\n\n/**\n  @addtogroup RealFFT_Table Real FFT Tables\n  @{\n */\n\n/**\n  @par\n  Generation fixed-point realCoefAQ15 array in Q15 format:\n  @par\n  n = 4096\n  
for (i = 0; i < n; i++)\n  {\n     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) *\n  (double) i)); pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 *\n  n) * (double) i));\n  }
\n  @par\n  Convert to fixed point Q15 format\n        round(pATable[i] * pow(2, 15))\n */\nconst q15_t __ALIGNED(4) realCoefAQ15[8192] = {\n    (q15_t)0x4000, (q15_t)0xc000, (q15_t)0x3ff3, (q15_t)0xc000, (q15_t)0x3fe7,\n    (q15_t)0xc000, (q15_t)0x3fda, (q15_t)0xc000, (q15_t)0x3fce, (q15_t)0xc000,\n    (q15_t)0x3fc1, (q15_t)0xc000, (q15_t)0x3fb5, (q15_t)0xc000, (q15_t)0x3fa8,\n    (q15_t)0xc000, (q15_t)0x3f9b, (q15_t)0xc000, (q15_t)0x3f8f, (q15_t)0xc000,\n    (q15_t)0x3f82, (q15_t)0xc000, (q15_t)0x3f76, (q15_t)0xc001, (q15_t)0x3f69,\n    (q15_t)0xc001, (q15_t)0x3f5d, (q15_t)0xc001, (q15_t)0x3f50, (q15_t)0xc001,\n    (q15_t)0x3f44, (q15_t)0xc001, (q15_t)0x3f37, (q15_t)0xc001, (q15_t)0x3f2a,\n    (q15_t)0xc001, (q15_t)0x3f1e, (q15_t)0xc002, (q15_t)0x3f11, (q15_t)0xc002,\n    (q15_t)0x3f05, (q15_t)0xc002, (q15_t)0x3ef8, (q15_t)0xc002, (q15_t)0x3eec,\n    (q15_t)0xc002, (q15_t)0x3edf, (q15_t)0xc003, (q15_t)0x3ed2, (q15_t)0xc003,\n    (q15_t)0x3ec6, (q15_t)0xc003, (q15_t)0x3eb9, (q15_t)0xc003, (q15_t)0x3ead,\n    (q15_t)0xc004, (q15_t)0x3ea0, (q15_t)0xc004, (q15_t)0x3e94, (q15_t)0xc004,\n    (q15_t)0x3e87, (q15_t)0xc004, (q15_t)0x3e7a, (q15_t)0xc005, (q15_t)0x3e6e,\n    (q15_t)0xc005, (q15_t)0x3e61, (q15_t)0xc005, (q15_t)0x3e55, (q15_t)0xc006,\n    (q15_t)0x3e48, (q15_t)0xc006, (q15_t)0x3e3c, (q15_t)0xc006, (q15_t)0x3e2f,\n    (q15_t)0xc007, (q15_t)0x3e23, (q15_t)0xc007, (q15_t)0x3e16, (q15_t)0xc007,\n    (q15_t)0x3e09, (q15_t)0xc008, (q15_t)0x3dfd, (q15_t)0xc008, (q15_t)0x3df0,\n    (q15_t)0xc009, (q15_t)0x3de4, (q15_t)0xc009, (q15_t)0x3dd7, (q15_t)0xc009,\n    (q15_t)0x3dcb, (q15_t)0xc00a, (q15_t)0x3dbe, (q15_t)0xc00a, (q15_t)0x3db2,\n    (q15_t)0xc00b, (q15_t)0x3da5, (q15_t)0xc00b, (q15_t)0x3d98, (q15_t)0xc00c,\n    (q15_t)0x3d8c, (q15_t)0xc00c, (q15_t)0x3d7f, (q15_t)0xc00d, (q15_t)0x3d73,\n    (q15_t)0xc00d, (q15_t)0x3d66, (q15_t)0xc00e, (q15_t)0x3d5a, (q15_t)0xc00e,\n    (q15_t)0x3d4d, (q15_t)0xc00f, (q15_t)0x3d40, (q15_t)0xc00f, (q15_t)0x3d34,\n    (q15_t)0xc010, (q15_t)0x3d27, (q15_t)0xc010, (q15_t)0x3d1b, (q15_t)0xc011,\n    (q15_t)0x3d0e, (q15_t)0xc011, (q15_t)0x3d02, (q15_t)0xc012, (q15_t)0x3cf5,\n    (q15_t)0xc013, (q15_t)0x3ce9, (q15_t)0xc013, (q15_t)0x3cdc, (q15_t)0xc014,\n    (q15_t)0x3cd0, (q15_t)0xc014, (q15_t)0x3cc3, (q15_t)0xc015, (q15_t)0x3cb6,\n    (q15_t)0xc016, (q15_t)0x3caa, (q15_t)0xc016, (q15_t)0x3c9d, (q15_t)0xc017,\n    (q15_t)0x3c91, (q15_t)0xc018, (q15_t)0x3c84, (q15_t)0xc018, (q15_t)0x3c78,\n    (q15_t)0xc019, (q15_t)0x3c6b, (q15_t)0xc01a, (q15_t)0x3c5f, (q15_t)0xc01a,\n    (q15_t)0x3c52, (q15_t)0xc01b, (q15_t)0x3c45, (q15_t)0xc01c, (q15_t)0x3c39,\n    (q15_t)0xc01d, (q15_t)0x3c2c, (q15_t)0xc01d, (q15_t)0x3c20, (q15_t)0xc01e,\n    (q15_t)0x3c13, (q15_t)0xc01f, (q15_t)0x3c07, (q15_t)0xc020, (q15_t)0x3bfa,\n    (q15_t)0xc020, (q15_t)0x3bee, (q15_t)0xc021, (q15_t)0x3be1, (q15_t)0xc022,\n    (q15_t)0x3bd5, (q15_t)0xc023, (q15_t)0x3bc8, (q15_t)0xc024, (q15_t)0x3bbc,\n    (q15_t)0xc024, (q15_t)0x3baf, (q15_t)0xc025, (q15_t)0x3ba2, (q15_t)0xc026,\n    (q15_t)0x3b96, (q15_t)0xc027, (q15_t)0x3b89, (q15_t)0xc028, (q15_t)0x3b7d,\n    (q15_t)0xc029, (q15_t)0x3b70, (q15_t)0xc02a, (q15_t)0x3b64, (q15_t)0xc02b,\n    (q15_t)0x3b57, (q15_t)0xc02b, (q15_t)0x3b4b, (q15_t)0xc02c, (q15_t)0x3b3e,\n    (q15_t)0xc02d, (q15_t)0x3b32, (q15_t)0xc02e, (q15_t)0x3b25, (q15_t)0xc02f,\n    (q15_t)0x3b19, (q15_t)0xc030, (q15_t)0x3b0c, (q15_t)0xc031, (q15_t)0x3b00,\n    (q15_t)0xc032, (q15_t)0x3af3, (q15_t)0xc033, (q15_t)0x3ae6, (q15_t)0xc034,\n    (q15_t)0x3ada, (q15_t)0xc035, (q15_t)0x3acd, (q15_t)0xc036, (q15_t)0x3ac1,\n    (q15_t)0xc037, (q15_t)0x3ab4, (q15_t)0xc038, (q15_t)0x3aa8, (q15_t)0xc039,\n    (q15_t)0x3a9b, (q15_t)0xc03a, (q15_t)0x3a8f, (q15_t)0xc03b, (q15_t)0x3a82,\n    (q15_t)0xc03c, (q15_t)0x3a76, (q15_t)0xc03d, (q15_t)0x3a69, (q15_t)0xc03f,\n    (q15_t)0x3a5d, (q15_t)0xc040, (q15_t)0x3a50, (q15_t)0xc041, (q15_t)0x3a44,\n    (q15_t)0xc042, (q15_t)0x3a37, (q15_t)0xc043, (q15_t)0x3a2b, (q15_t)0xc044,\n    (q15_t)0x3a1e, (q15_t)0xc045, (q15_t)0x3a12, (q15_t)0xc047, (q15_t)0x3a05,\n    (q15_t)0xc048, (q15_t)0x39f9, (q15_t)0xc049, (q15_t)0x39ec, (q15_t)0xc04a,\n    (q15_t)0x39e0, (q15_t)0xc04b, (q15_t)0x39d3, (q15_t)0xc04c, (q15_t)0x39c7,\n    (q15_t)0xc04e, (q15_t)0x39ba, (q15_t)0xc04f, (q15_t)0x39ae, (q15_t)0xc050,\n    (q15_t)0x39a1, (q15_t)0xc051, (q15_t)0x3995, (q15_t)0xc053, (q15_t)0x3988,\n    (q15_t)0xc054, (q15_t)0x397c, (q15_t)0xc055, (q15_t)0x396f, (q15_t)0xc056,\n    (q15_t)0x3963, (q15_t)0xc058, (q15_t)0x3956, (q15_t)0xc059, (q15_t)0x394a,\n    (q15_t)0xc05a, (q15_t)0x393d, (q15_t)0xc05c, (q15_t)0x3931, (q15_t)0xc05d,\n    (q15_t)0x3924, (q15_t)0xc05e, (q15_t)0x3918, (q15_t)0xc060, (q15_t)0x390b,\n    (q15_t)0xc061, (q15_t)0x38ff, (q15_t)0xc062, (q15_t)0x38f2, (q15_t)0xc064,\n    (q15_t)0x38e6, (q15_t)0xc065, (q15_t)0x38d9, (q15_t)0xc067, (q15_t)0x38cd,\n    (q15_t)0xc068, (q15_t)0x38c0, (q15_t)0xc069, (q15_t)0x38b4, (q15_t)0xc06b,\n    (q15_t)0x38a7, (q15_t)0xc06c, (q15_t)0x389b, (q15_t)0xc06e, (q15_t)0x388e,\n    (q15_t)0xc06f, (q15_t)0x3882, (q15_t)0xc071, (q15_t)0x3875, (q15_t)0xc072,\n    (q15_t)0x3869, (q15_t)0xc074, (q15_t)0x385c, (q15_t)0xc075, (q15_t)0x3850,\n    (q15_t)0xc077, (q15_t)0x3843, (q15_t)0xc078, (q15_t)0x3837, (q15_t)0xc07a,\n    (q15_t)0x382a, (q15_t)0xc07b, (q15_t)0x381e, (q15_t)0xc07d, (q15_t)0x3811,\n    (q15_t)0xc07e, (q15_t)0x3805, (q15_t)0xc080, (q15_t)0x37f9, (q15_t)0xc081,\n    (q15_t)0x37ec, (q15_t)0xc083, (q15_t)0x37e0, (q15_t)0xc085, (q15_t)0x37d3,\n    (q15_t)0xc086, (q15_t)0x37c7, (q15_t)0xc088, (q15_t)0x37ba, (q15_t)0xc089,\n    (q15_t)0x37ae, (q15_t)0xc08b, (q15_t)0x37a1, (q15_t)0xc08d, (q15_t)0x3795,\n    (q15_t)0xc08e, (q15_t)0x3788, (q15_t)0xc090, (q15_t)0x377c, (q15_t)0xc092,\n    (q15_t)0x376f, (q15_t)0xc093, (q15_t)0x3763, (q15_t)0xc095, (q15_t)0x3757,\n    (q15_t)0xc097, (q15_t)0x374a, (q15_t)0xc098, (q15_t)0x373e, (q15_t)0xc09a,\n    (q15_t)0x3731, (q15_t)0xc09c, (q15_t)0x3725, (q15_t)0xc09e, (q15_t)0x3718,\n    (q15_t)0xc09f, (q15_t)0x370c, (q15_t)0xc0a1, (q15_t)0x36ff, (q15_t)0xc0a3,\n    (q15_t)0x36f3, (q15_t)0xc0a5, (q15_t)0x36e7, (q15_t)0xc0a6, (q15_t)0x36da,\n    (q15_t)0xc0a8, (q15_t)0x36ce, (q15_t)0xc0aa, (q15_t)0x36c1, (q15_t)0xc0ac,\n    (q15_t)0x36b5, (q15_t)0xc0ae, (q15_t)0x36a8, (q15_t)0xc0af, (q15_t)0x369c,\n    (q15_t)0xc0b1, (q15_t)0x3690, (q15_t)0xc0b3, (q15_t)0x3683, (q15_t)0xc0b5,\n    (q15_t)0x3677, (q15_t)0xc0b7, (q15_t)0x366a, (q15_t)0xc0b9, (q15_t)0x365e,\n    (q15_t)0xc0bb, (q15_t)0x3651, (q15_t)0xc0bd, (q15_t)0x3645, (q15_t)0xc0be,\n    (q15_t)0x3639, (q15_t)0xc0c0, (q15_t)0x362c, (q15_t)0xc0c2, (q15_t)0x3620,\n    (q15_t)0xc0c4, (q15_t)0x3613, (q15_t)0xc0c6, (q15_t)0x3607, (q15_t)0xc0c8,\n    (q15_t)0x35fa, (q15_t)0xc0ca, (q15_t)0x35ee, (q15_t)0xc0cc, (q15_t)0x35e2,\n    (q15_t)0xc0ce, (q15_t)0x35d5, (q15_t)0xc0d0, (q15_t)0x35c9, (q15_t)0xc0d2,\n    (q15_t)0x35bc, (q15_t)0xc0d4, (q15_t)0x35b0, (q15_t)0xc0d6, (q15_t)0x35a4,\n    (q15_t)0xc0d8, (q15_t)0x3597, (q15_t)0xc0da, (q15_t)0x358b, (q15_t)0xc0dc,\n    (q15_t)0x357e, (q15_t)0xc0de, (q15_t)0x3572, (q15_t)0xc0e0, (q15_t)0x3566,\n    (q15_t)0xc0e2, (q15_t)0x3559, (q15_t)0xc0e4, (q15_t)0x354d, (q15_t)0xc0e7,\n    (q15_t)0x3540, (q15_t)0xc0e9, (q15_t)0x3534, (q15_t)0xc0eb, (q15_t)0x3528,\n    (q15_t)0xc0ed, (q15_t)0x351b, (q15_t)0xc0ef, (q15_t)0x350f, (q15_t)0xc0f1,\n    (q15_t)0x3503, (q15_t)0xc0f3, (q15_t)0x34f6, (q15_t)0xc0f6, (q15_t)0x34ea,\n    (q15_t)0xc0f8, (q15_t)0x34dd, (q15_t)0xc0fa, (q15_t)0x34d1, (q15_t)0xc0fc,\n    (q15_t)0x34c5, (q15_t)0xc0fe, (q15_t)0x34b8, (q15_t)0xc100, (q15_t)0x34ac,\n    (q15_t)0xc103, (q15_t)0x34a0, (q15_t)0xc105, (q15_t)0x3493, (q15_t)0xc107,\n    (q15_t)0x3487, (q15_t)0xc109, (q15_t)0x347b, (q15_t)0xc10c, (q15_t)0x346e,\n    (q15_t)0xc10e, (q15_t)0x3462, (q15_t)0xc110, (q15_t)0x3455, (q15_t)0xc113,\n    (q15_t)0x3449, (q15_t)0xc115, (q15_t)0x343d, (q15_t)0xc117, (q15_t)0x3430,\n    (q15_t)0xc119, (q15_t)0x3424, (q15_t)0xc11c, (q15_t)0x3418, (q15_t)0xc11e,\n    (q15_t)0x340b, (q15_t)0xc120, (q15_t)0x33ff, (q15_t)0xc123, (q15_t)0x33f3,\n    (q15_t)0xc125, (q15_t)0x33e6, (q15_t)0xc128, (q15_t)0x33da, (q15_t)0xc12a,\n    (q15_t)0x33ce, (q15_t)0xc12c, (q15_t)0x33c1, (q15_t)0xc12f, (q15_t)0x33b5,\n    (q15_t)0xc131, (q15_t)0x33a9, (q15_t)0xc134, (q15_t)0x339c, (q15_t)0xc136,\n    (q15_t)0x3390, (q15_t)0xc138, (q15_t)0x3384, (q15_t)0xc13b, (q15_t)0x3377,\n    (q15_t)0xc13d, (q15_t)0x336b, (q15_t)0xc140, (q15_t)0x335f, (q15_t)0xc142,\n    (q15_t)0x3352, (q15_t)0xc145, (q15_t)0x3346, (q15_t)0xc147, (q15_t)0x333a,\n    (q15_t)0xc14a, (q15_t)0x332d, (q15_t)0xc14c, (q15_t)0x3321, (q15_t)0xc14f,\n    (q15_t)0x3315, (q15_t)0xc151, (q15_t)0x3308, (q15_t)0xc154, (q15_t)0x32fc,\n    (q15_t)0xc156, (q15_t)0x32f0, (q15_t)0xc159, (q15_t)0x32e4, (q15_t)0xc15b,\n    (q15_t)0x32d7, (q15_t)0xc15e, (q15_t)0x32cb, (q15_t)0xc161, (q15_t)0x32bf,\n    (q15_t)0xc163, (q15_t)0x32b2, (q15_t)0xc166, (q15_t)0x32a6, (q15_t)0xc168,\n    (q15_t)0x329a, (q15_t)0xc16b, (q15_t)0x328e, (q15_t)0xc16e, (q15_t)0x3281,\n    (q15_t)0xc170, (q15_t)0x3275, (q15_t)0xc173, (q15_t)0x3269, (q15_t)0xc176,\n    (q15_t)0x325c, (q15_t)0xc178, (q15_t)0x3250, (q15_t)0xc17b, (q15_t)0x3244,\n    (q15_t)0xc17e, (q15_t)0x3238, (q15_t)0xc180, (q15_t)0x322b, (q15_t)0xc183,\n    (q15_t)0x321f, (q15_t)0xc186, (q15_t)0x3213, (q15_t)0xc189, (q15_t)0x3207,\n    (q15_t)0xc18b, (q15_t)0x31fa, (q15_t)0xc18e, (q15_t)0x31ee, (q15_t)0xc191,\n    (q15_t)0x31e2, (q15_t)0xc194, (q15_t)0x31d5, (q15_t)0xc196, (q15_t)0x31c9,\n    (q15_t)0xc199, (q15_t)0x31bd, (q15_t)0xc19c, (q15_t)0x31b1, (q15_t)0xc19f,\n    (q15_t)0x31a4, (q15_t)0xc1a2, (q15_t)0x3198, (q15_t)0xc1a4, (q15_t)0x318c,\n    (q15_t)0xc1a7, (q15_t)0x3180, (q15_t)0xc1aa, (q15_t)0x3174, (q15_t)0xc1ad,\n    (q15_t)0x3167, (q15_t)0xc1b0, (q15_t)0x315b, (q15_t)0xc1b3, (q15_t)0x314f,\n    (q15_t)0xc1b6, (q15_t)0x3143, (q15_t)0xc1b8, (q15_t)0x3136, (q15_t)0xc1bb,\n    (q15_t)0x312a, (q15_t)0xc1be, (q15_t)0x311e, (q15_t)0xc1c1, (q15_t)0x3112,\n    (q15_t)0xc1c4, (q15_t)0x3105, (q15_t)0xc1c7, (q15_t)0x30f9, (q15_t)0xc1ca,\n    (q15_t)0x30ed, (q15_t)0xc1cd, (q15_t)0x30e1, (q15_t)0xc1d0, (q15_t)0x30d5,\n    (q15_t)0xc1d3, (q15_t)0x30c8, (q15_t)0xc1d6, (q15_t)0x30bc, (q15_t)0xc1d9,\n    (q15_t)0x30b0, (q15_t)0xc1dc, (q15_t)0x30a4, (q15_t)0xc1df, (q15_t)0x3098,\n    (q15_t)0xc1e2, (q15_t)0x308b, (q15_t)0xc1e5, (q15_t)0x307f, (q15_t)0xc1e8,\n    (q15_t)0x3073, (q15_t)0xc1eb, (q15_t)0x3067, (q15_t)0xc1ee, (q15_t)0x305b,\n    (q15_t)0xc1f1, (q15_t)0x304e, (q15_t)0xc1f4, (q15_t)0x3042, (q15_t)0xc1f7,\n    (q15_t)0x3036, (q15_t)0xc1fa, (q15_t)0x302a, (q15_t)0xc1fd, (q15_t)0x301e,\n    (q15_t)0xc201, (q15_t)0x3012, (q15_t)0xc204, (q15_t)0x3005, (q15_t)0xc207,\n    (q15_t)0x2ff9, (q15_t)0xc20a, (q15_t)0x2fed, (q15_t)0xc20d, (q15_t)0x2fe1,\n    (q15_t)0xc210, (q15_t)0x2fd5, (q15_t)0xc213, (q15_t)0x2fc9, (q15_t)0xc217,\n    (q15_t)0x2fbc, (q15_t)0xc21a, (q15_t)0x2fb0, (q15_t)0xc21d, (q15_t)0x2fa4,\n    (q15_t)0xc220, (q15_t)0x2f98, (q15_t)0xc223, (q15_t)0x2f8c, (q15_t)0xc227,\n    (q15_t)0x2f80, (q15_t)0xc22a, (q15_t)0x2f74, (q15_t)0xc22d, (q15_t)0x2f67,\n    (q15_t)0xc230, (q15_t)0x2f5b, (q15_t)0xc234, (q15_t)0x2f4f, (q15_t)0xc237,\n    (q15_t)0x2f43, (q15_t)0xc23a, (q15_t)0x2f37, (q15_t)0xc23e, (q15_t)0x2f2b,\n    (q15_t)0xc241, (q15_t)0x2f1f, (q15_t)0xc244, (q15_t)0x2f13, (q15_t)0xc247,\n    (q15_t)0x2f06, (q15_t)0xc24b, (q15_t)0x2efa, (q15_t)0xc24e, (q15_t)0x2eee,\n    (q15_t)0xc251, (q15_t)0x2ee2, (q15_t)0xc255, (q15_t)0x2ed6, (q15_t)0xc258,\n    (q15_t)0x2eca, (q15_t)0xc25c, (q15_t)0x2ebe, (q15_t)0xc25f, (q15_t)0x2eb2,\n    (q15_t)0xc262, (q15_t)0x2ea6, (q15_t)0xc266, (q15_t)0x2e99, (q15_t)0xc269,\n    (q15_t)0x2e8d, (q15_t)0xc26d, (q15_t)0x2e81, (q15_t)0xc270, (q15_t)0x2e75,\n    (q15_t)0xc273, (q15_t)0x2e69, (q15_t)0xc277, (q15_t)0x2e5d, (q15_t)0xc27a,\n    (q15_t)0x2e51, (q15_t)0xc27e, (q15_t)0x2e45, (q15_t)0xc281, (q15_t)0x2e39,\n    (q15_t)0xc285, (q15_t)0x2e2d, (q15_t)0xc288, (q15_t)0x2e21, (q15_t)0xc28c,\n    (q15_t)0x2e15, (q15_t)0xc28f, (q15_t)0x2e09, (q15_t)0xc293, (q15_t)0x2dfc,\n    (q15_t)0xc296, (q15_t)0x2df0, (q15_t)0xc29a, (q15_t)0x2de4, (q15_t)0xc29d,\n    (q15_t)0x2dd8, (q15_t)0xc2a1, (q15_t)0x2dcc, (q15_t)0xc2a5, (q15_t)0x2dc0,\n    (q15_t)0xc2a8, (q15_t)0x2db4, (q15_t)0xc2ac, (q15_t)0x2da8, (q15_t)0xc2af,\n    (q15_t)0x2d9c, (q15_t)0xc2b3, (q15_t)0x2d90, (q15_t)0xc2b7, (q15_t)0x2d84,\n    (q15_t)0xc2ba, (q15_t)0x2d78, (q15_t)0xc2be, (q15_t)0x2d6c, (q15_t)0xc2c1,\n    (q15_t)0x2d60, (q15_t)0xc2c5, (q15_t)0x2d54, (q15_t)0xc2c9, (q15_t)0x2d48,\n    (q15_t)0xc2cc, (q15_t)0x2d3c, (q15_t)0xc2d0, (q15_t)0x2d30, (q15_t)0xc2d4,\n    (q15_t)0x2d24, (q15_t)0xc2d8, (q15_t)0x2d18, (q15_t)0xc2db, (q15_t)0x2d0c,\n    (q15_t)0xc2df, (q15_t)0x2d00, (q15_t)0xc2e3, (q15_t)0x2cf4, (q15_t)0xc2e6,\n    (q15_t)0x2ce8, (q15_t)0xc2ea, (q15_t)0x2cdc, (q15_t)0xc2ee, (q15_t)0x2cd0,\n    (q15_t)0xc2f2, (q15_t)0x2cc4, (q15_t)0xc2f5, (q15_t)0x2cb8, (q15_t)0xc2f9,\n    (q15_t)0x2cac, (q15_t)0xc2fd, (q15_t)0x2ca0, (q15_t)0xc301, (q15_t)0x2c94,\n    (q15_t)0xc305, (q15_t)0x2c88, (q15_t)0xc308, (q15_t)0x2c7c, (q15_t)0xc30c,\n    (q15_t)0x2c70, (q15_t)0xc310, (q15_t)0x2c64, (q15_t)0xc314, (q15_t)0x2c58,\n    (q15_t)0xc318, (q15_t)0x2c4c, (q15_t)0xc31c, (q15_t)0x2c40, (q15_t)0xc320,\n    (q15_t)0x2c34, (q15_t)0xc323, (q15_t)0x2c28, (q15_t)0xc327, (q15_t)0x2c1c,\n    (q15_t)0xc32b, (q15_t)0x2c10, (q15_t)0xc32f, (q15_t)0x2c05, (q15_t)0xc333,\n    (q15_t)0x2bf9, (q15_t)0xc337, (q15_t)0x2bed, (q15_t)0xc33b, (q15_t)0x2be1,\n    (q15_t)0xc33f, (q15_t)0x2bd5, (q15_t)0xc343, (q15_t)0x2bc9, (q15_t)0xc347,\n    (q15_t)0x2bbd, (q15_t)0xc34b, (q15_t)0x2bb1, (q15_t)0xc34f, (q15_t)0x2ba5,\n    (q15_t)0xc353, (q15_t)0x2b99, (q15_t)0xc357, (q15_t)0x2b8d, (q15_t)0xc35b,\n    (q15_t)0x2b81, (q15_t)0xc35f, (q15_t)0x2b75, (q15_t)0xc363, (q15_t)0x2b6a,\n    (q15_t)0xc367, (q15_t)0x2b5e, (q15_t)0xc36b, (q15_t)0x2b52, (q15_t)0xc36f,\n    (q15_t)0x2b46, (q15_t)0xc373, (q15_t)0x2b3a, (q15_t)0xc377, (q15_t)0x2b2e,\n    (q15_t)0xc37b, (q15_t)0x2b22, (q15_t)0xc37f, (q15_t)0x2b16, (q15_t)0xc383,\n    (q15_t)0x2b0a, (q15_t)0xc387, (q15_t)0x2aff, (q15_t)0xc38c, (q15_t)0x2af3,\n    (q15_t)0xc390, (q15_t)0x2ae7, (q15_t)0xc394, (q15_t)0x2adb, (q15_t)0xc398,\n    (q15_t)0x2acf, (q15_t)0xc39c, (q15_t)0x2ac3, (q15_t)0xc3a0, (q15_t)0x2ab7,\n    (q15_t)0xc3a5, (q15_t)0x2aac, (q15_t)0xc3a9, (q15_t)0x2aa0, (q15_t)0xc3ad,\n    (q15_t)0x2a94, (q15_t)0xc3b1, (q15_t)0x2a88, (q15_t)0xc3b5, (q15_t)0x2a7c,\n    (q15_t)0xc3ba, (q15_t)0x2a70, (q15_t)0xc3be, (q15_t)0x2a65, (q15_t)0xc3c2,\n    (q15_t)0x2a59, (q15_t)0xc3c6, (q15_t)0x2a4d, (q15_t)0xc3ca, (q15_t)0x2a41,\n    (q15_t)0xc3cf, (q15_t)0x2a35, (q15_t)0xc3d3, (q15_t)0x2a29, (q15_t)0xc3d7,\n    (q15_t)0x2a1e, (q15_t)0xc3dc, (q15_t)0x2a12, (q15_t)0xc3e0, (q15_t)0x2a06,\n    (q15_t)0xc3e4, (q15_t)0x29fa, (q15_t)0xc3e9, (q15_t)0x29ee, (q15_t)0xc3ed,\n    (q15_t)0x29e3, (q15_t)0xc3f1, (q15_t)0x29d7, (q15_t)0xc3f6, (q15_t)0x29cb,\n    (q15_t)0xc3fa, (q15_t)0x29bf, (q15_t)0xc3fe, (q15_t)0x29b4, (q15_t)0xc403,\n    (q15_t)0x29a8, (q15_t)0xc407, (q15_t)0x299c, (q15_t)0xc40b, (q15_t)0x2990,\n    (q15_t)0xc410, (q15_t)0x2984, (q15_t)0xc414, (q15_t)0x2979, (q15_t)0xc419,\n    (q15_t)0x296d, (q15_t)0xc41d, (q15_t)0x2961, (q15_t)0xc422, (q15_t)0x2955,\n    (q15_t)0xc426, (q15_t)0x294a, (q15_t)0xc42a, (q15_t)0x293e, (q15_t)0xc42f,\n    (q15_t)0x2932, (q15_t)0xc433, (q15_t)0x2926, (q15_t)0xc438, (q15_t)0x291b,\n    (q15_t)0xc43c, (q15_t)0x290f, (q15_t)0xc441, (q15_t)0x2903, (q15_t)0xc445,\n    (q15_t)0x28f7, (q15_t)0xc44a, (q15_t)0x28ec, (q15_t)0xc44e, (q15_t)0x28e0,\n    (q15_t)0xc453, (q15_t)0x28d4, (q15_t)0xc457, (q15_t)0x28c9, (q15_t)0xc45c,\n    (q15_t)0x28bd, (q15_t)0xc461, (q15_t)0x28b1, (q15_t)0xc465, (q15_t)0x28a5,\n    (q15_t)0xc46a, (q15_t)0x289a, (q15_t)0xc46e, (q15_t)0x288e, (q15_t)0xc473,\n    (q15_t)0x2882, (q15_t)0xc478, (q15_t)0x2877, (q15_t)0xc47c, (q15_t)0x286b,\n    (q15_t)0xc481, (q15_t)0x285f, (q15_t)0xc485, (q15_t)0x2854, (q15_t)0xc48a,\n    (q15_t)0x2848, (q15_t)0xc48f, (q15_t)0x283c, (q15_t)0xc493, (q15_t)0x2831,\n    (q15_t)0xc498, (q15_t)0x2825, (q15_t)0xc49d, (q15_t)0x2819, (q15_t)0xc4a1,\n    (q15_t)0x280e, (q15_t)0xc4a6, (q15_t)0x2802, (q15_t)0xc4ab, (q15_t)0x27f6,\n    (q15_t)0xc4b0, (q15_t)0x27eb, (q15_t)0xc4b4, (q15_t)0x27df, (q15_t)0xc4b9,\n    (q15_t)0x27d3, (q15_t)0xc4be, (q15_t)0x27c8, (q15_t)0xc4c2, (q15_t)0x27bc,\n    (q15_t)0xc4c7, (q15_t)0x27b1, (q15_t)0xc4cc, (q15_t)0x27a5, (q15_t)0xc4d1,\n    (q15_t)0x2799, (q15_t)0xc4d6, (q15_t)0x278e, (q15_t)0xc4da, (q15_t)0x2782,\n    (q15_t)0xc4df, (q15_t)0x2777, (q15_t)0xc4e4, (q15_t)0x276b, (q15_t)0xc4e9,\n    (q15_t)0x275f, (q15_t)0xc4ee, (q15_t)0x2754, (q15_t)0xc4f2, (q15_t)0x2748,\n    (q15_t)0xc4f7, (q15_t)0x273d, (q15_t)0xc4fc, (q15_t)0x2731, (q15_t)0xc501,\n    (q15_t)0x2725, (q15_t)0xc506, (q15_t)0x271a, (q15_t)0xc50b, (q15_t)0x270e,\n    (q15_t)0xc510, (q15_t)0x2703, (q15_t)0xc515, (q15_t)0x26f7, (q15_t)0xc51a,\n    (q15_t)0x26ec, (q15_t)0xc51e, (q15_t)0x26e0, (q15_t)0xc523, (q15_t)0x26d4,\n    (q15_t)0xc528, (q15_t)0x26c9, (q15_t)0xc52d, (q15_t)0x26bd, (q15_t)0xc532,\n    (q15_t)0x26b2, (q15_t)0xc537, (q15_t)0x26a6, (q15_t)0xc53c, (q15_t)0x269b,\n    (q15_t)0xc541, (q15_t)0x268f, (q15_t)0xc546, (q15_t)0x2684, (q15_t)0xc54b,\n    (q15_t)0x2678, (q15_t)0xc550, (q15_t)0x266d, (q15_t)0xc555, (q15_t)0x2661,\n    (q15_t)0xc55a, (q15_t)0x2656, (q15_t)0xc55f, (q15_t)0x264a, (q15_t)0xc564,\n    (q15_t)0x263f, (q15_t)0xc569, (q15_t)0x2633, (q15_t)0xc56e, (q15_t)0x2628,\n    (q15_t)0xc573, (q15_t)0x261c, (q15_t)0xc578, (q15_t)0x2611, (q15_t)0xc57e,\n    (q15_t)0x2605, (q15_t)0xc583, (q15_t)0x25fa, (q15_t)0xc588, (q15_t)0x25ee,\n    (q15_t)0xc58d, (q15_t)0x25e3, (q15_t)0xc592, (q15_t)0x25d7, (q15_t)0xc597,\n    (q15_t)0x25cc, (q15_t)0xc59c, (q15_t)0x25c0, (q15_t)0xc5a1, (q15_t)0x25b5,\n    (q15_t)0xc5a7, (q15_t)0x25a9, (q15_t)0xc5ac, (q15_t)0x259e, (q15_t)0xc5b1,\n    (q15_t)0x2592, (q15_t)0xc5b6, (q15_t)0x2587, (q15_t)0xc5bb, (q15_t)0x257c,\n    (q15_t)0xc5c1, (q15_t)0x2570, (q15_t)0xc5c6, (q15_t)0x2565, (q15_t)0xc5cb,\n    (q15_t)0x2559, (q15_t)0xc5d0, (q15_t)0x254e, (q15_t)0xc5d5, (q15_t)0x2542,\n    (q15_t)0xc5db, (q15_t)0x2537, (q15_t)0xc5e0, (q15_t)0x252c, (q15_t)0xc5e5,\n    (q15_t)0x2520, (q15_t)0xc5ea, (q15_t)0x2515, (q15_t)0xc5f0, (q15_t)0x2509,\n    (q15_t)0xc5f5, (q15_t)0x24fe, (q15_t)0xc5fa, (q15_t)0x24f3, (q15_t)0xc600,\n    (q15_t)0x24e7, (q15_t)0xc605, (q15_t)0x24dc, (q15_t)0xc60a, (q15_t)0x24d0,\n    (q15_t)0xc610, (q15_t)0x24c5, (q15_t)0xc615, (q15_t)0x24ba, (q15_t)0xc61a,\n    (q15_t)0x24ae, (q15_t)0xc620, (q15_t)0x24a3, (q15_t)0xc625, (q15_t)0x2498,\n    (q15_t)0xc62a, (q15_t)0x248c, (q15_t)0xc630, (q15_t)0x2481, (q15_t)0xc635,\n    (q15_t)0x2476, (q15_t)0xc63b, (q15_t)0x246a, (q15_t)0xc640, (q15_t)0x245f,\n    (q15_t)0xc645, (q15_t)0x2454, (q15_t)0xc64b, (q15_t)0x2448, (q15_t)0xc650,\n    (q15_t)0x243d, (q15_t)0xc656, (q15_t)0x2432, (q15_t)0xc65b, (q15_t)0x2426,\n    (q15_t)0xc661, (q15_t)0x241b, (q15_t)0xc666, (q15_t)0x2410, (q15_t)0xc66c,\n    (q15_t)0x2404, (q15_t)0xc671, (q15_t)0x23f9, (q15_t)0xc677, (q15_t)0x23ee,\n    (q15_t)0xc67c, (q15_t)0x23e2, (q15_t)0xc682, (q15_t)0x23d7, (q15_t)0xc687,\n    (q15_t)0x23cc, (q15_t)0xc68d, (q15_t)0x23c1, (q15_t)0xc692, (q15_t)0x23b5,\n    (q15_t)0xc698, (q15_t)0x23aa, (q15_t)0xc69d, (q15_t)0x239f, (q15_t)0xc6a3,\n    (q15_t)0x2394, (q15_t)0xc6a8, (q15_t)0x2388, (q15_t)0xc6ae, (q15_t)0x237d,\n    (q15_t)0xc6b4, (q15_t)0x2372, (q15_t)0xc6b9, (q15_t)0x2367, (q15_t)0xc6bf,\n    (q15_t)0x235b, (q15_t)0xc6c5, (q15_t)0x2350, (q15_t)0xc6ca, (q15_t)0x2345,\n    (q15_t)0xc6d0, (q15_t)0x233a, (q15_t)0xc6d5, (q15_t)0x232e, (q15_t)0xc6db,\n    (q15_t)0x2323, (q15_t)0xc6e1, (q15_t)0x2318, (q15_t)0xc6e6, (q15_t)0x230d,\n    (q15_t)0xc6ec, (q15_t)0x2301, (q15_t)0xc6f2, (q15_t)0x22f6, (q15_t)0xc6f7,\n    (q15_t)0x22eb, (q15_t)0xc6fd, (q15_t)0x22e0, (q15_t)0xc703, (q15_t)0x22d5,\n    (q15_t)0xc709, (q15_t)0x22ca, (q15_t)0xc70e, (q15_t)0x22be, (q15_t)0xc714,\n    (q15_t)0x22b3, (q15_t)0xc71a, (q15_t)0x22a8, (q15_t)0xc720, (q15_t)0x229d,\n    (q15_t)0xc725, (q15_t)0x2292, (q15_t)0xc72b, (q15_t)0x2287, (q15_t)0xc731,\n    (q15_t)0x227b, (q15_t)0xc737, (q15_t)0x2270, (q15_t)0xc73d, (q15_t)0x2265,\n    (q15_t)0xc742, (q15_t)0x225a, (q15_t)0xc748, (q15_t)0x224f, (q15_t)0xc74e,\n    (q15_t)0x2244, (q15_t)0xc754, (q15_t)0x2239, (q15_t)0xc75a, (q15_t)0x222d,\n    (q15_t)0xc75f, (q15_t)0x2222, (q15_t)0xc765, (q15_t)0x2217, (q15_t)0xc76b,\n    (q15_t)0x220c, (q15_t)0xc771, (q15_t)0x2201, (q15_t)0xc777, (q15_t)0x21f6,\n    (q15_t)0xc77d, (q15_t)0x21eb, (q15_t)0xc783, (q15_t)0x21e0, (q15_t)0xc789,\n    (q15_t)0x21d5, (q15_t)0xc78f, (q15_t)0x21ca, (q15_t)0xc795, (q15_t)0x21be,\n    (q15_t)0xc79a, (q15_t)0x21b3, (q15_t)0xc7a0, (q15_t)0x21a8, (q15_t)0xc7a6,\n    (q15_t)0x219d, (q15_t)0xc7ac, (q15_t)0x2192, (q15_t)0xc7b2, (q15_t)0x2187,\n    (q15_t)0xc7b8, (q15_t)0x217c, (q15_t)0xc7be, (q15_t)0x2171, (q15_t)0xc7c4,\n    (q15_t)0x2166, (q15_t)0xc7ca, (q15_t)0x215b, (q15_t)0xc7d0, (q15_t)0x2150,\n    (q15_t)0xc7d6, (q15_t)0x2145, (q15_t)0xc7dc, (q15_t)0x213a, (q15_t)0xc7e2,\n    (q15_t)0x212f, (q15_t)0xc7e8, (q15_t)0x2124, (q15_t)0xc7ee, (q15_t)0x2119,\n    (q15_t)0xc7f5, (q15_t)0x210e, (q15_t)0xc7fb, (q15_t)0x2103, (q15_t)0xc801,\n    (q15_t)0x20f8, (q15_t)0xc807, (q15_t)0x20ed, (q15_t)0xc80d, (q15_t)0x20e2,\n    (q15_t)0xc813, (q15_t)0x20d7, (q15_t)0xc819, (q15_t)0x20cc, (q15_t)0xc81f,\n    (q15_t)0x20c1, (q15_t)0xc825, (q15_t)0x20b6, (q15_t)0xc82b, (q15_t)0x20ab,\n    (q15_t)0xc832, (q15_t)0x20a0, (q15_t)0xc838, (q15_t)0x2095, (q15_t)0xc83e,\n    (q15_t)0x208a, (q15_t)0xc844, (q15_t)0x207f, (q15_t)0xc84a, (q15_t)0x2074,\n    (q15_t)0xc850, (q15_t)0x2069, (q15_t)0xc857, (q15_t)0x205e, (q15_t)0xc85d,\n    (q15_t)0x2054, (q15_t)0xc863, (q15_t)0x2049, (q15_t)0xc869, (q15_t)0x203e,\n    (q15_t)0xc870, (q15_t)0x2033, (q15_t)0xc876, (q15_t)0x2028, (q15_t)0xc87c,\n    (q15_t)0x201d, (q15_t)0xc882, (q15_t)0x2012, (q15_t)0xc889, (q15_t)0x2007,\n    (q15_t)0xc88f, (q15_t)0x1ffc, (q15_t)0xc895, (q15_t)0x1ff1, (q15_t)0xc89b,\n    (q15_t)0x1fe7, (q15_t)0xc8a2, (q15_t)0x1fdc, (q15_t)0xc8a8, (q15_t)0x1fd1,\n    (q15_t)0xc8ae, (q15_t)0x1fc6, (q15_t)0xc8b5, (q15_t)0x1fbb, (q15_t)0xc8bb,\n    (q15_t)0x1fb0, (q15_t)0xc8c1, (q15_t)0x1fa5, (q15_t)0xc8c8, (q15_t)0x1f9b,\n    (q15_t)0xc8ce, (q15_t)0x1f90, (q15_t)0xc8d4, (q15_t)0x1f85, (q15_t)0xc8db,\n    (q15_t)0x1f7a, (q15_t)0xc8e1, (q15_t)0x1f6f, (q15_t)0xc8e8, (q15_t)0x1f65,\n    (q15_t)0xc8ee, (q15_t)0x1f5a, (q15_t)0xc8f4, (q15_t)0x1f4f, (q15_t)0xc8fb,\n    (q15_t)0x1f44, (q15_t)0xc901, (q15_t)0x1f39, (q15_t)0xc908, (q15_t)0x1f2f,\n    (q15_t)0xc90e, (q15_t)0x1f24, (q15_t)0xc915, (q15_t)0x1f19, (q15_t)0xc91b,\n    (q15_t)0x1f0e, (q15_t)0xc921, (q15_t)0x1f03, (q15_t)0xc928, (q15_t)0x1ef9,\n    (q15_t)0xc92e, (q15_t)0x1eee, (q15_t)0xc935, (q15_t)0x1ee3, (q15_t)0xc93b,\n    (q15_t)0x1ed8, (q15_t)0xc942, (q15_t)0x1ece, (q15_t)0xc948, (q15_t)0x1ec3,\n    (q15_t)0xc94f, (q15_t)0x1eb8, (q15_t)0xc955, (q15_t)0x1ead, (q15_t)0xc95c,\n    (q15_t)0x1ea3, (q15_t)0xc963, (q15_t)0x1e98, (q15_t)0xc969, (q15_t)0x1e8d,\n    (q15_t)0xc970, (q15_t)0x1e83, (q15_t)0xc976, (q15_t)0x1e78, (q15_t)0xc97d,\n    (q15_t)0x1e6d, (q15_t)0xc983, (q15_t)0x1e62, (q15_t)0xc98a, (q15_t)0x1e58,\n    (q15_t)0xc991, (q15_t)0x1e4d, (q15_t)0xc997, (q15_t)0x1e42, (q15_t)0xc99e,\n    (q15_t)0x1e38, (q15_t)0xc9a4, (q15_t)0x1e2d, (q15_t)0xc9ab, (q15_t)0x1e22,\n    (q15_t)0xc9b2, (q15_t)0x1e18, (q15_t)0xc9b8, (q15_t)0x1e0d, (q15_t)0xc9bf,\n    (q15_t)0x1e02, (q15_t)0xc9c6, (q15_t)0x1df8, (q15_t)0xc9cc, (q15_t)0x1ded,\n    (q15_t)0xc9d3, (q15_t)0x1de2, (q15_t)0xc9da, (q15_t)0x1dd8, (q15_t)0xc9e0,\n    (q15_t)0x1dcd, (q15_t)0xc9e7, (q15_t)0x1dc3, (q15_t)0xc9ee, (q15_t)0x1db8,\n    (q15_t)0xc9f5, (q15_t)0x1dad, (q15_t)0xc9fb, (q15_t)0x1da3, (q15_t)0xca02,\n    (q15_t)0x1d98, (q15_t)0xca09, (q15_t)0x1d8e, (q15_t)0xca10, (q15_t)0x1d83,\n    (q15_t)0xca16, (q15_t)0x1d78, (q15_t)0xca1d, (q15_t)0x1d6e, (q15_t)0xca24,\n    (q15_t)0x1d63, (q15_t)0xca2b, (q15_t)0x1d59, (q15_t)0xca32, (q15_t)0x1d4e,\n    (q15_t)0xca38, (q15_t)0x1d44, (q15_t)0xca3f, (q15_t)0x1d39, (q15_t)0xca46,\n    (q15_t)0x1d2e, (q15_t)0xca4d, (q15_t)0x1d24, (q15_t)0xca54, (q15_t)0x1d19,\n    (q15_t)0xca5b, (q15_t)0x1d0f, (q15_t)0xca61, (q15_t)0x1d04, (q15_t)0xca68,\n    (q15_t)0x1cfa, (q15_t)0xca6f, (q15_t)0x1cef, (q15_t)0xca76, (q15_t)0x1ce5,\n    (q15_t)0xca7d, (q15_t)0x1cda, (q15_t)0xca84, (q15_t)0x1cd0, (q15_t)0xca8b,\n    (q15_t)0x1cc5, (q15_t)0xca92, (q15_t)0x1cbb, (q15_t)0xca99, (q15_t)0x1cb0,\n    (q15_t)0xca9f, (q15_t)0x1ca6, (q15_t)0xcaa6, (q15_t)0x1c9b, (q15_t)0xcaad,\n    (q15_t)0x1c91, (q15_t)0xcab4, (q15_t)0x1c86, (q15_t)0xcabb, (q15_t)0x1c7c,\n    (q15_t)0xcac2, (q15_t)0x1c72, (q15_t)0xcac9, (q15_t)0x1c67, (q15_t)0xcad0,\n    (q15_t)0x1c5d, (q15_t)0xcad7, (q15_t)0x1c52, (q15_t)0xcade, (q15_t)0x1c48,\n    (q15_t)0xcae5, (q15_t)0x1c3d, (q15_t)0xcaec, (q15_t)0x1c33, (q15_t)0xcaf3,\n    (q15_t)0x1c29, (q15_t)0xcafa, (q15_t)0x1c1e, (q15_t)0xcb01, (q15_t)0x1c14,\n    (q15_t)0xcb08, (q15_t)0x1c09, (q15_t)0xcb0f, (q15_t)0x1bff, (q15_t)0xcb16,\n    (q15_t)0x1bf5, (q15_t)0xcb1e, (q15_t)0x1bea, (q15_t)0xcb25, (q15_t)0x1be0,\n    (q15_t)0xcb2c, (q15_t)0x1bd5, (q15_t)0xcb33, (q15_t)0x1bcb, (q15_t)0xcb3a,\n    (q15_t)0x1bc1, (q15_t)0xcb41, (q15_t)0x1bb6, (q15_t)0xcb48, (q15_t)0x1bac,\n    (q15_t)0xcb4f, (q15_t)0x1ba2, (q15_t)0xcb56, (q15_t)0x1b97, (q15_t)0xcb5e,\n    (q15_t)0x1b8d, (q15_t)0xcb65, (q15_t)0x1b83, (q15_t)0xcb6c, (q15_t)0x1b78,\n    (q15_t)0xcb73, (q15_t)0x1b6e, (q15_t)0xcb7a, (q15_t)0x1b64, (q15_t)0xcb81,\n    (q15_t)0x1b59, (q15_t)0xcb89, (q15_t)0x1b4f, (q15_t)0xcb90, (q15_t)0x1b45,\n    (q15_t)0xcb97, (q15_t)0x1b3b, (q15_t)0xcb9e, (q15_t)0x1b30, (q15_t)0xcba5,\n    (q15_t)0x1b26, (q15_t)0xcbad, (q15_t)0x1b1c, (q15_t)0xcbb4, (q15_t)0x1b11,\n    (q15_t)0xcbbb, (q15_t)0x1b07, (q15_t)0xcbc2, (q15_t)0x1afd, (q15_t)0xcbca,\n    (q15_t)0x1af3, (q15_t)0xcbd1, (q15_t)0x1ae8, (q15_t)0xcbd8, (q15_t)0x1ade,\n    (q15_t)0xcbe0, (q15_t)0x1ad4, (q15_t)0xcbe7, (q15_t)0x1aca, (q15_t)0xcbee,\n    (q15_t)0x1abf, (q15_t)0xcbf5, (q15_t)0x1ab5, (q15_t)0xcbfd, (q15_t)0x1aab,\n    (q15_t)0xcc04, (q15_t)0x1aa1, (q15_t)0xcc0b, (q15_t)0x1a97, (q15_t)0xcc13,\n    (q15_t)0x1a8c, (q15_t)0xcc1a, (q15_t)0x1a82, (q15_t)0xcc21, (q15_t)0x1a78,\n    (q15_t)0xcc29, (q15_t)0x1a6e, (q15_t)0xcc30, (q15_t)0x1a64, (q15_t)0xcc38,\n    (q15_t)0x1a5a, (q15_t)0xcc3f, (q15_t)0x1a4f, (q15_t)0xcc46, (q15_t)0x1a45,\n    (q15_t)0xcc4e, (q15_t)0x1a3b, (q15_t)0xcc55, (q15_t)0x1a31, (q15_t)0xcc5d,\n    (q15_t)0x1a27, (q15_t)0xcc64, (q15_t)0x1a1d, (q15_t)0xcc6b, (q15_t)0x1a13,\n    (q15_t)0xcc73, (q15_t)0x1a08, (q15_t)0xcc7a, (q15_t)0x19fe, (q15_t)0xcc82,\n    (q15_t)0x19f4, (q15_t)0xcc89, (q15_t)0x19ea, (q15_t)0xcc91, (q15_t)0x19e0,\n    (q15_t)0xcc98, (q15_t)0x19d6, (q15_t)0xcca0, (q15_t)0x19cc, (q15_t)0xcca7,\n    (q15_t)0x19c2, (q15_t)0xccaf, (q15_t)0x19b8, (q15_t)0xccb6, (q15_t)0x19ae,\n    (q15_t)0xccbe, (q15_t)0x19a4, (q15_t)0xccc5, (q15_t)0x199a, (q15_t)0xcccd,\n    (q15_t)0x198f, (q15_t)0xccd4, (q15_t)0x1985, (q15_t)0xccdc, (q15_t)0x197b,\n    (q15_t)0xcce3, (q15_t)0x1971, (q15_t)0xcceb, (q15_t)0x1967, (q15_t)0xccf3,\n    (q15_t)0x195d, (q15_t)0xccfa, (q15_t)0x1953, (q15_t)0xcd02, (q15_t)0x1949,\n    (q15_t)0xcd09, (q15_t)0x193f, (q15_t)0xcd11, (q15_t)0x1935, (q15_t)0xcd19,\n    (q15_t)0x192b, (q15_t)0xcd20, (q15_t)0x1921, (q15_t)0xcd28, (q15_t)0x1917,\n    (q15_t)0xcd30, (q15_t)0x190d, (q15_t)0xcd37, (q15_t)0x1903, (q15_t)0xcd3f,\n    (q15_t)0x18f9, (q15_t)0xcd46, (q15_t)0x18ef, (q15_t)0xcd4e, (q15_t)0x18e6,\n    (q15_t)0xcd56, (q15_t)0x18dc, (q15_t)0xcd5d, (q15_t)0x18d2, (q15_t)0xcd65,\n    (q15_t)0x18c8, (q15_t)0xcd6d, (q15_t)0x18be, (q15_t)0xcd75, (q15_t)0x18b4,\n    (q15_t)0xcd7c, (q15_t)0x18aa, (q15_t)0xcd84, (q15_t)0x18a0, (q15_t)0xcd8c,\n    (q15_t)0x1896, (q15_t)0xcd93, (q15_t)0x188c, (q15_t)0xcd9b, (q15_t)0x1882,\n    (q15_t)0xcda3, (q15_t)0x1878, (q15_t)0xcdab, (q15_t)0x186f, (q15_t)0xcdb2,\n    (q15_t)0x1865, (q15_t)0xcdba, (q15_t)0x185b, (q15_t)0xcdc2, (q15_t)0x1851,\n    (q15_t)0xcdca, (q15_t)0x1847, (q15_t)0xcdd2, (q15_t)0x183d, (q15_t)0xcdd9,\n    (q15_t)0x1833, (q15_t)0xcde1, (q15_t)0x182a, (q15_t)0xcde9, (q15_t)0x1820,\n    (q15_t)0xcdf1, (q15_t)0x1816, (q15_t)0xcdf9, (q15_t)0x180c, (q15_t)0xce01,\n    (q15_t)0x1802, (q15_t)0xce08, (q15_t)0x17f8, (q15_t)0xce10, (q15_t)0x17ef,\n    (q15_t)0xce18, (q15_t)0x17e5, (q15_t)0xce20, (q15_t)0x17db, (q15_t)0xce28,\n    (q15_t)0x17d1, (q15_t)0xce30, (q15_t)0x17c8, (q15_t)0xce38, (q15_t)0x17be,\n    (q15_t)0xce40, (q15_t)0x17b4, (q15_t)0xce47, (q15_t)0x17aa, (q15_t)0xce4f,\n    (q15_t)0x17a0, (q15_t)0xce57, (q15_t)0x1797, (q15_t)0xce5f, (q15_t)0x178d,\n    (q15_t)0xce67, (q15_t)0x1783, (q15_t)0xce6f, (q15_t)0x177a, (q15_t)0xce77,\n    (q15_t)0x1770, (q15_t)0xce7f, (q15_t)0x1766, (q15_t)0xce87, (q15_t)0x175c,\n    (q15_t)0xce8f, (q15_t)0x1753, (q15_t)0xce97, (q15_t)0x1749, (q15_t)0xce9f,\n    (q15_t)0x173f, (q15_t)0xcea7, (q15_t)0x1736, (q15_t)0xceaf, (q15_t)0x172c,\n    (q15_t)0xceb7, (q15_t)0x1722, (q15_t)0xcebf, (q15_t)0x1719, (q15_t)0xcec7,\n    (q15_t)0x170f, (q15_t)0xcecf, (q15_t)0x1705, (q15_t)0xced7, (q15_t)0x16fc,\n    (q15_t)0xcedf, (q15_t)0x16f2, (q15_t)0xcee7, (q15_t)0x16e8, (q15_t)0xceef,\n    (q15_t)0x16df, (q15_t)0xcef7, (q15_t)0x16d5, (q15_t)0xceff, (q15_t)0x16cb,\n    (q15_t)0xcf07, (q15_t)0x16c2, (q15_t)0xcf10, (q15_t)0x16b8, (q15_t)0xcf18,\n    (q15_t)0x16af, (q15_t)0xcf20, (q15_t)0x16a5, (q15_t)0xcf28, (q15_t)0x169b,\n    (q15_t)0xcf30, (q15_t)0x1692, (q15_t)0xcf38, (q15_t)0x1688, (q15_t)0xcf40,\n    (q15_t)0x167f, (q15_t)0xcf48, (q15_t)0x1675, (q15_t)0xcf51, (q15_t)0x166c,\n    (q15_t)0xcf59, (q15_t)0x1662, (q15_t)0xcf61, (q15_t)0x1659, (q15_t)0xcf69,\n    (q15_t)0x164f, (q15_t)0xcf71, (q15_t)0x1645, (q15_t)0xcf79, (q15_t)0x163c,\n    (q15_t)0xcf82, (q15_t)0x1632, (q15_t)0xcf8a, (q15_t)0x1629, (q15_t)0xcf92,\n    (q15_t)0x161f, (q15_t)0xcf9a, (q15_t)0x1616, (q15_t)0xcfa3, (q15_t)0x160c,\n    (q15_t)0xcfab, (q15_t)0x1603, (q15_t)0xcfb3, (q15_t)0x15f9, (q15_t)0xcfbb,\n    (q15_t)0x15f0, (q15_t)0xcfc4, (q15_t)0x15e6, (q15_t)0xcfcc, (q15_t)0x15dd,\n    (q15_t)0xcfd4, (q15_t)0x15d4, (q15_t)0xcfdc, (q15_t)0x15ca, (q15_t)0xcfe5,\n    (q15_t)0x15c1, (q15_t)0xcfed, (q15_t)0x15b7, (q15_t)0xcff5, (q15_t)0x15ae,\n    (q15_t)0xcffe, (q15_t)0x15a4, (q15_t)0xd006, (q15_t)0x159b, (q15_t)0xd00e,\n    (q15_t)0x1592, (q15_t)0xd016, (q15_t)0x1588, (q15_t)0xd01f, (q15_t)0x157f,\n    (q15_t)0xd027, (q15_t)0x1575, (q15_t)0xd030, (q15_t)0x156c, (q15_t)0xd038,\n    (q15_t)0x1563, (q15_t)0xd040, (q15_t)0x1559, (q15_t)0xd049, (q15_t)0x1550,\n    (q15_t)0xd051, (q15_t)0x1547, (q15_t)0xd059, (q15_t)0x153d, (q15_t)0xd062,\n    (q15_t)0x1534, (q15_t)0xd06a, (q15_t)0x152a, (q15_t)0xd073, (q15_t)0x1521,\n    (q15_t)0xd07b, (q15_t)0x1518, (q15_t)0xd083, (q15_t)0x150e, (q15_t)0xd08c,\n    (q15_t)0x1505, (q15_t)0xd094, (q15_t)0x14fc, (q15_t)0xd09d, (q15_t)0x14f3,\n    (q15_t)0xd0a5, (q15_t)0x14e9, (q15_t)0xd0ae, (q15_t)0x14e0, (q15_t)0xd0b6,\n    (q15_t)0x14d7, (q15_t)0xd0bf, (q15_t)0x14cd, (q15_t)0xd0c7, (q15_t)0x14c4,\n    (q15_t)0xd0d0, (q15_t)0x14bb, (q15_t)0xd0d8, (q15_t)0x14b2, (q15_t)0xd0e0,\n    (q15_t)0x14a8, (q15_t)0xd0e9, (q15_t)0x149f, (q15_t)0xd0f2, (q15_t)0x1496,\n    (q15_t)0xd0fa, (q15_t)0x148d, (q15_t)0xd103, (q15_t)0x1483, (q15_t)0xd10b,\n    (q15_t)0x147a, (q15_t)0xd114, (q15_t)0x1471, (q15_t)0xd11c, (q15_t)0x1468,\n    (q15_t)0xd125, (q15_t)0x145f, (q15_t)0xd12d, (q15_t)0x1455, (q15_t)0xd136,\n    (q15_t)0x144c, (q15_t)0xd13e, (q15_t)0x1443, (q15_t)0xd147, (q15_t)0x143a,\n    (q15_t)0xd150, (q15_t)0x1431, (q15_t)0xd158, (q15_t)0x1428, (q15_t)0xd161,\n    (q15_t)0x141e, (q15_t)0xd169, (q15_t)0x1415, (q15_t)0xd172, (q15_t)0x140c,\n    (q15_t)0xd17b, (q15_t)0x1403, (q15_t)0xd183, (q15_t)0x13fa, (q15_t)0xd18c,\n    (q15_t)0x13f1, (q15_t)0xd195, (q15_t)0x13e8, (q15_t)0xd19d, (q15_t)0x13df,\n    (q15_t)0xd1a6, (q15_t)0x13d5, (q15_t)0xd1af, (q15_t)0x13cc, (q15_t)0xd1b7,\n    (q15_t)0x13c3, (q15_t)0xd1c0, (q15_t)0x13ba, (q15_t)0xd1c9, (q15_t)0x13b1,\n    (q15_t)0xd1d1, (q15_t)0x13a8, (q15_t)0xd1da, (q15_t)0x139f, (q15_t)0xd1e3,\n    (q15_t)0x1396, (q15_t)0xd1eb, (q15_t)0x138d, (q15_t)0xd1f4, (q15_t)0x1384,\n    (q15_t)0xd1fd, (q15_t)0x137b, (q15_t)0xd206, (q15_t)0x1372, (q15_t)0xd20e,\n    (q15_t)0x1369, (q15_t)0xd217, (q15_t)0x1360, (q15_t)0xd220, (q15_t)0x1357,\n    (q15_t)0xd229, (q15_t)0x134e, (q15_t)0xd231, (q15_t)0x1345, (q15_t)0xd23a,\n    (q15_t)0x133c, (q15_t)0xd243, (q15_t)0x1333, (q15_t)0xd24c, (q15_t)0x132a,\n    (q15_t)0xd255, (q15_t)0x1321, (q15_t)0xd25d, (q15_t)0x1318, (q15_t)0xd266,\n    (q15_t)0x130f, (q15_t)0xd26f, (q15_t)0x1306, (q15_t)0xd278, (q15_t)0x12fd,\n    (q15_t)0xd281, (q15_t)0x12f4, (q15_t)0xd28a, (q15_t)0x12eb, (q15_t)0xd292,\n    (q15_t)0x12e2, (q15_t)0xd29b, (q15_t)0x12d9, (q15_t)0xd2a4, (q15_t)0x12d1,\n    (q15_t)0xd2ad, (q15_t)0x12c8, (q15_t)0xd2b6, (q15_t)0x12bf, (q15_t)0xd2bf,\n    (q15_t)0x12b6, (q15_t)0xd2c8, (q15_t)0x12ad, (q15_t)0xd2d1, (q15_t)0x12a4,\n    (q15_t)0xd2d9, (q15_t)0x129b, (q15_t)0xd2e2, (q15_t)0x1292, (q15_t)0xd2eb,\n    (q15_t)0x128a, (q15_t)0xd2f4, (q15_t)0x1281, (q15_t)0xd2fd, (q15_t)0x1278,\n    (q15_t)0xd306, (q15_t)0x126f, (q15_t)0xd30f, (q15_t)0x1266, (q15_t)0xd318,\n    (q15_t)0x125d, (q15_t)0xd321, (q15_t)0x1255, (q15_t)0xd32a, (q15_t)0x124c,\n    (q15_t)0xd333, (q15_t)0x1243, (q15_t)0xd33c, (q15_t)0x123a, (q15_t)0xd345,\n    (q15_t)0x1231, (q15_t)0xd34e, (q15_t)0x1229, (q15_t)0xd357, (q15_t)0x1220,\n    (q15_t)0xd360, (q15_t)0x1217, (q15_t)0xd369, (q15_t)0x120e, (q15_t)0xd372,\n    (q15_t)0x1206, (q15_t)0xd37b, (q15_t)0x11fd, (q15_t)0xd384, (q15_t)0x11f4,\n    (q15_t)0xd38d, (q15_t)0x11eb, (q15_t)0xd396, (q15_t)0x11e3, (q15_t)0xd39f,\n    (q15_t)0x11da, (q15_t)0xd3a8, (q15_t)0x11d1, (q15_t)0xd3b1, (q15_t)0x11c9,\n    (q15_t)0xd3ba, (q15_t)0x11c0, (q15_t)0xd3c3, (q15_t)0x11b7, (q15_t)0xd3cc,\n    (q15_t)0x11af, (q15_t)0xd3d5, (q15_t)0x11a6, (q15_t)0xd3df, (q15_t)0x119d,\n    (q15_t)0xd3e8, (q15_t)0x1195, (q15_t)0xd3f1, (q15_t)0x118c, (q15_t)0xd3fa,\n    (q15_t)0x1183, (q15_t)0xd403, (q15_t)0x117b, (q15_t)0xd40c, (q15_t)0x1172,\n    (q15_t)0xd415, (q15_t)0x1169, (q15_t)0xd41e, (q15_t)0x1161, (q15_t)0xd428,\n    (q15_t)0x1158, (q15_t)0xd431, (q15_t)0x1150, (q15_t)0xd43a, (q15_t)0x1147,\n    (q15_t)0xd443, (q15_t)0x113e, (q15_t)0xd44c, (q15_t)0x1136, (q15_t)0xd455,\n    (q15_t)0x112d, (q15_t)0xd45f, (q15_t)0x1125, (q15_t)0xd468, (q15_t)0x111c,\n    (q15_t)0xd471, (q15_t)0x1114, (q15_t)0xd47a, (q15_t)0x110b, (q15_t)0xd483,\n    (q15_t)0x1103, (q15_t)0xd48d, (q15_t)0x10fa, (q15_t)0xd496, (q15_t)0x10f2,\n    (q15_t)0xd49f, (q15_t)0x10e9, (q15_t)0xd4a8, (q15_t)0x10e0, (q15_t)0xd4b2,\n    (q15_t)0x10d8, (q15_t)0xd4bb, (q15_t)0x10d0, (q15_t)0xd4c4, (q15_t)0x10c7,\n    (q15_t)0xd4cd, (q15_t)0x10bf, (q15_t)0xd4d7, (q15_t)0x10b6, (q15_t)0xd4e0,\n    (q15_t)0x10ae, (q15_t)0xd4e9, (q15_t)0x10a5, (q15_t)0xd4f3, (q15_t)0x109d,\n    (q15_t)0xd4fc, (q15_t)0x1094, (q15_t)0xd505, (q15_t)0x108c, (q15_t)0xd50e,\n    (q15_t)0x1083, (q15_t)0xd518, (q15_t)0x107b, (q15_t)0xd521, (q15_t)0x1073,\n    (q15_t)0xd52a, (q15_t)0x106a, (q15_t)0xd534, (q15_t)0x1062, (q15_t)0xd53d,\n    (q15_t)0x1059, (q15_t)0xd547, (q15_t)0x1051, (q15_t)0xd550, (q15_t)0x1049,\n    (q15_t)0xd559, (q15_t)0x1040, (q15_t)0xd563, (q15_t)0x1038, (q15_t)0xd56c,\n    (q15_t)0x1030, (q15_t)0xd575, (q15_t)0x1027, (q15_t)0xd57f, (q15_t)0x101f,\n    (q15_t)0xd588, (q15_t)0x1016, (q15_t)0xd592, (q15_t)0x100e, (q15_t)0xd59b,\n    (q15_t)0x1006, (q15_t)0xd5a4, (q15_t)0xffe,  (q15_t)0xd5ae, (q15_t)0xff5,\n    (q15_t)0xd5b7, (q15_t)0xfed,  (q15_t)0xd5c1, (q15_t)0xfe5,  (q15_t)0xd5ca,\n    (q15_t)0xfdc,  (q15_t)0xd5d4, (q15_t)0xfd4,  (q15_t)0xd5dd, (q15_t)0xfcc,\n    (q15_t)0xd5e6, (q15_t)0xfc4,  (q15_t)0xd5f0, (q15_t)0xfbb,  (q15_t)0xd5f9,\n    (q15_t)0xfb3,  (q15_t)0xd603, (q15_t)0xfab,  (q15_t)0xd60c, (q15_t)0xfa3,\n    (q15_t)0xd616, (q15_t)0xf9a,  (q15_t)0xd61f, (q15_t)0xf92,  (q15_t)0xd629,\n    (q15_t)0xf8a,  (q15_t)0xd632, (q15_t)0xf82,  (q15_t)0xd63c, (q15_t)0xf79,\n    (q15_t)0xd645, (q15_t)0xf71,  (q15_t)0xd64f, (q15_t)0xf69,  (q15_t)0xd659,\n    (q15_t)0xf61,  (q15_t)0xd662, (q15_t)0xf59,  (q15_t)0xd66c, (q15_t)0xf51,\n    (q15_t)0xd675, (q15_t)0xf48,  (q15_t)0xd67f, (q15_t)0xf40,  (q15_t)0xd688,\n    (q15_t)0xf38,  (q15_t)0xd692, (q15_t)0xf30,  (q15_t)0xd69b, (q15_t)0xf28,\n    (q15_t)0xd6a5, (q15_t)0xf20,  (q15_t)0xd6af, (q15_t)0xf18,  (q15_t)0xd6b8,\n    (q15_t)0xf10,  (q15_t)0xd6c2, (q15_t)0xf07,  (q15_t)0xd6cb, (q15_t)0xeff,\n    (q15_t)0xd6d5, (q15_t)0xef7,  (q15_t)0xd6df, (q15_t)0xeef,  (q15_t)0xd6e8,\n    (q15_t)0xee7,  (q15_t)0xd6f2, (q15_t)0xedf,  (q15_t)0xd6fc, (q15_t)0xed7,\n    (q15_t)0xd705, (q15_t)0xecf,  (q15_t)0xd70f, (q15_t)0xec7,  (q15_t)0xd719,\n    (q15_t)0xebf,  (q15_t)0xd722, (q15_t)0xeb7,  (q15_t)0xd72c, (q15_t)0xeaf,\n    (q15_t)0xd736, (q15_t)0xea7,  (q15_t)0xd73f, (q15_t)0xe9f,  (q15_t)0xd749,\n    (q15_t)0xe97,  (q15_t)0xd753, (q15_t)0xe8f,  (q15_t)0xd75c, (q15_t)0xe87,\n    (q15_t)0xd766, (q15_t)0xe7f,  (q15_t)0xd770, (q15_t)0xe77,  (q15_t)0xd77a,\n    (q15_t)0xe6f,  (q15_t)0xd783, (q15_t)0xe67,  (q15_t)0xd78d, (q15_t)0xe5f,\n    (q15_t)0xd797, (q15_t)0xe57,  (q15_t)0xd7a0, (q15_t)0xe4f,  (q15_t)0xd7aa,\n    (q15_t)0xe47,  (q15_t)0xd7b4, (q15_t)0xe40,  (q15_t)0xd7be, (q15_t)0xe38,\n    (q15_t)0xd7c8, (q15_t)0xe30,  (q15_t)0xd7d1, (q15_t)0xe28,  (q15_t)0xd7db,\n    (q15_t)0xe20,  (q15_t)0xd7e5, (q15_t)0xe18,  (q15_t)0xd7ef, (q15_t)0xe10,\n    (q15_t)0xd7f8, (q15_t)0xe08,  (q15_t)0xd802, (q15_t)0xe01,  (q15_t)0xd80c,\n    (q15_t)0xdf9,  (q15_t)0xd816, (q15_t)0xdf1,  (q15_t)0xd820, (q15_t)0xde9,\n    (q15_t)0xd82a, (q15_t)0xde1,  (q15_t)0xd833, (q15_t)0xdd9,  (q15_t)0xd83d,\n    (q15_t)0xdd2,  (q15_t)0xd847, (q15_t)0xdca,  (q15_t)0xd851, (q15_t)0xdc2,\n    (q15_t)0xd85b, (q15_t)0xdba,  (q15_t)0xd865, (q15_t)0xdb2,  (q15_t)0xd86f,\n    (q15_t)0xdab,  (q15_t)0xd878, (q15_t)0xda3,  (q15_t)0xd882, (q15_t)0xd9b,\n    (q15_t)0xd88c, (q15_t)0xd93,  (q15_t)0xd896, (q15_t)0xd8c,  (q15_t)0xd8a0,\n    (q15_t)0xd84,  (q15_t)0xd8aa, (q15_t)0xd7c,  (q15_t)0xd8b4, (q15_t)0xd75,\n    (q15_t)0xd8be, (q15_t)0xd6d,  (q15_t)0xd8c8, (q15_t)0xd65,  (q15_t)0xd8d2,\n    (q15_t)0xd5d,  (q15_t)0xd8dc, (q15_t)0xd56,  (q15_t)0xd8e6, (q15_t)0xd4e,\n    (q15_t)0xd8ef, (q15_t)0xd46,  (q15_t)0xd8f9, (q15_t)0xd3f,  (q15_t)0xd903,\n    (q15_t)0xd37,  (q15_t)0xd90d, (q15_t)0xd30,  (q15_t)0xd917, (q15_t)0xd28,\n    (q15_t)0xd921, (q15_t)0xd20,  (q15_t)0xd92b, (q15_t)0xd19,  (q15_t)0xd935,\n    (q15_t)0xd11,  (q15_t)0xd93f, (q15_t)0xd09,  (q15_t)0xd949, (q15_t)0xd02,\n    (q15_t)0xd953, (q15_t)0xcfa,  (q15_t)0xd95d, (q15_t)0xcf3,  (q15_t)0xd967,\n    (q15_t)0xceb,  (q15_t)0xd971, (q15_t)0xce3,  (q15_t)0xd97b, (q15_t)0xcdc,\n    (q15_t)0xd985, (q15_t)0xcd4,  (q15_t)0xd98f, (q15_t)0xccd,  (q15_t)0xd99a,\n    (q15_t)0xcc5,  (q15_t)0xd9a4, (q15_t)0xcbe,  (q15_t)0xd9ae, (q15_t)0xcb6,\n    (q15_t)0xd9b8, (q15_t)0xcaf,  (q15_t)0xd9c2, (q15_t)0xca7,  (q15_t)0xd9cc,\n    (q15_t)0xca0,  (q15_t)0xd9d6, (q15_t)0xc98,  (q15_t)0xd9e0, (q15_t)0xc91,\n    (q15_t)0xd9ea, (q15_t)0xc89,  (q15_t)0xd9f4, (q15_t)0xc82,  (q15_t)0xd9fe,\n    (q15_t)0xc7a,  (q15_t)0xda08, (q15_t)0xc73,  (q15_t)0xda13, (q15_t)0xc6b,\n    (q15_t)0xda1d, (q15_t)0xc64,  (q15_t)0xda27, (q15_t)0xc5d,  (q15_t)0xda31,\n    (q15_t)0xc55,  (q15_t)0xda3b, (q15_t)0xc4e,  (q15_t)0xda45, (q15_t)0xc46,\n    (q15_t)0xda4f, (q15_t)0xc3f,  (q15_t)0xda5a, (q15_t)0xc38,  (q15_t)0xda64,\n    (q15_t)0xc30,  (q15_t)0xda6e, (q15_t)0xc29,  (q15_t)0xda78, (q15_t)0xc21,\n    (q15_t)0xda82, (q15_t)0xc1a,  (q15_t)0xda8c, (q15_t)0xc13,  (q15_t)0xda97,\n    (q15_t)0xc0b,  (q15_t)0xdaa1, (q15_t)0xc04,  (q15_t)0xdaab, (q15_t)0xbfd,\n    (q15_t)0xdab5, (q15_t)0xbf5,  (q15_t)0xdabf, (q15_t)0xbee,  (q15_t)0xdaca,\n    (q15_t)0xbe7,  (q15_t)0xdad4, (q15_t)0xbe0,  (q15_t)0xdade, (q15_t)0xbd8,\n    (q15_t)0xdae8, (q15_t)0xbd1,  (q15_t)0xdaf3, (q15_t)0xbca,  (q15_t)0xdafd,\n    (q15_t)0xbc2,  (q15_t)0xdb07, (q15_t)0xbbb,  (q15_t)0xdb11, (q15_t)0xbb4,\n    (q15_t)0xdb1c, (q15_t)0xbad,  (q15_t)0xdb26, (q15_t)0xba5,  (q15_t)0xdb30,\n    (q15_t)0xb9e,  (q15_t)0xdb3b, (q15_t)0xb97,  (q15_t)0xdb45, (q15_t)0xb90,\n    (q15_t)0xdb4f, (q15_t)0xb89,  (q15_t)0xdb59, (q15_t)0xb81,  (q15_t)0xdb64,\n    (q15_t)0xb7a,  (q15_t)0xdb6e, (q15_t)0xb73,  (q15_t)0xdb78, (q15_t)0xb6c,\n    (q15_t)0xdb83, (q15_t)0xb65,  (q15_t)0xdb8d, (q15_t)0xb5e,  (q15_t)0xdb97,\n    (q15_t)0xb56,  (q15_t)0xdba2, (q15_t)0xb4f,  (q15_t)0xdbac, (q15_t)0xb48,\n    (q15_t)0xdbb6, (q15_t)0xb41,  (q15_t)0xdbc1, (q15_t)0xb3a,  (q15_t)0xdbcb,\n    (q15_t)0xb33,  (q15_t)0xdbd5, (q15_t)0xb2c,  (q15_t)0xdbe0, (q15_t)0xb25,\n    (q15_t)0xdbea, (q15_t)0xb1e,  (q15_t)0xdbf5, (q15_t)0xb16,  (q15_t)0xdbff,\n    (q15_t)0xb0f,  (q15_t)0xdc09, (q15_t)0xb08,  (q15_t)0xdc14, (q15_t)0xb01,\n    (q15_t)0xdc1e, (q15_t)0xafa,  (q15_t)0xdc29, (q15_t)0xaf3,  (q15_t)0xdc33,\n    (q15_t)0xaec,  (q15_t)0xdc3d, (q15_t)0xae5,  (q15_t)0xdc48, (q15_t)0xade,\n    (q15_t)0xdc52, (q15_t)0xad7,  (q15_t)0xdc5d, (q15_t)0xad0,  (q15_t)0xdc67,\n    (q15_t)0xac9,  (q15_t)0xdc72, (q15_t)0xac2,  (q15_t)0xdc7c, (q15_t)0xabb,\n    (q15_t)0xdc86, (q15_t)0xab4,  (q15_t)0xdc91, (q15_t)0xaad,  (q15_t)0xdc9b,\n    (q15_t)0xaa6,  (q15_t)0xdca6, (q15_t)0xa9f,  (q15_t)0xdcb0, (q15_t)0xa99,\n    (q15_t)0xdcbb, (q15_t)0xa92,  (q15_t)0xdcc5, (q15_t)0xa8b,  (q15_t)0xdcd0,\n    (q15_t)0xa84,  (q15_t)0xdcda, (q15_t)0xa7d,  (q15_t)0xdce5, (q15_t)0xa76,\n    (q15_t)0xdcef, (q15_t)0xa6f,  (q15_t)0xdcfa, (q15_t)0xa68,  (q15_t)0xdd04,\n    (q15_t)0xa61,  (q15_t)0xdd0f, (q15_t)0xa5b,  (q15_t)0xdd19, (q15_t)0xa54,\n    (q15_t)0xdd24, (q15_t)0xa4d,  (q15_t)0xdd2e, (q15_t)0xa46,  (q15_t)0xdd39,\n    (q15_t)0xa3f,  (q15_t)0xdd44, (q15_t)0xa38,  (q15_t)0xdd4e, (q15_t)0xa32,\n    (q15_t)0xdd59, (q15_t)0xa2b,  (q15_t)0xdd63, (q15_t)0xa24,  (q15_t)0xdd6e,\n    (q15_t)0xa1d,  (q15_t)0xdd78, (q15_t)0xa16,  (q15_t)0xdd83, (q15_t)0xa10,\n    (q15_t)0xdd8e, (q15_t)0xa09,  (q15_t)0xdd98, (q15_t)0xa02,  (q15_t)0xdda3,\n    (q15_t)0x9fb,  (q15_t)0xddad, (q15_t)0x9f5,  (q15_t)0xddb8, (q15_t)0x9ee,\n    (q15_t)0xddc3, (q15_t)0x9e7,  (q15_t)0xddcd, (q15_t)0x9e0,  (q15_t)0xddd8,\n    (q15_t)0x9da,  (q15_t)0xdde2, (q15_t)0x9d3,  (q15_t)0xdded, (q15_t)0x9cc,\n    (q15_t)0xddf8, (q15_t)0x9c6,  (q15_t)0xde02, (q15_t)0x9bf,  (q15_t)0xde0d,\n    (q15_t)0x9b8,  (q15_t)0xde18, (q15_t)0x9b2,  (q15_t)0xde22, (q15_t)0x9ab,\n    (q15_t)0xde2d, (q15_t)0x9a4,  (q15_t)0xde38, (q15_t)0x99e,  (q15_t)0xde42,\n    (q15_t)0x997,  (q15_t)0xde4d, (q15_t)0x991,  (q15_t)0xde58, (q15_t)0x98a,\n    (q15_t)0xde62, (q15_t)0x983,  (q15_t)0xde6d, (q15_t)0x97d,  (q15_t)0xde78,\n    (q15_t)0x976,  (q15_t)0xde83, (q15_t)0x970,  (q15_t)0xde8d, (q15_t)0x969,\n    (q15_t)0xde98, (q15_t)0x963,  (q15_t)0xdea3, (q15_t)0x95c,  (q15_t)0xdead,\n    (q15_t)0x955,  (q15_t)0xdeb8, (q15_t)0x94f,  (q15_t)0xdec3, (q15_t)0x948,\n    (q15_t)0xdece, (q15_t)0x942,  (q15_t)0xded8, (q15_t)0x93b,  (q15_t)0xdee3,\n    (q15_t)0x935,  (q15_t)0xdeee, (q15_t)0x92e,  (q15_t)0xdef9, (q15_t)0x928,\n    (q15_t)0xdf03, (q15_t)0x921,  (q15_t)0xdf0e, (q15_t)0x91b,  (q15_t)0xdf19,\n    (q15_t)0x915,  (q15_t)0xdf24, (q15_t)0x90e,  (q15_t)0xdf2f, (q15_t)0x908,\n    (q15_t)0xdf39, (q15_t)0x901,  (q15_t)0xdf44, (q15_t)0x8fb,  (q15_t)0xdf4f,\n    (q15_t)0x8f4,  (q15_t)0xdf5a, (q15_t)0x8ee,  (q15_t)0xdf65, (q15_t)0x8e8,\n    (q15_t)0xdf6f, (q15_t)0x8e1,  (q15_t)0xdf7a, (q15_t)0x8db,  (q15_t)0xdf85,\n    (q15_t)0x8d4,  (q15_t)0xdf90, (q15_t)0x8ce,  (q15_t)0xdf9b, (q15_t)0x8c8,\n    (q15_t)0xdfa5, (q15_t)0x8c1,  (q15_t)0xdfb0, (q15_t)0x8bb,  (q15_t)0xdfbb,\n    (q15_t)0x8b5,  (q15_t)0xdfc6, (q15_t)0x8ae,  (q15_t)0xdfd1, (q15_t)0x8a8,\n    (q15_t)0xdfdc, (q15_t)0x8a2,  (q15_t)0xdfe7, (q15_t)0x89b,  (q15_t)0xdff1,\n    (q15_t)0x895,  (q15_t)0xdffc, (q15_t)0x88f,  (q15_t)0xe007, (q15_t)0x889,\n    (q15_t)0xe012, (q15_t)0x882,  (q15_t)0xe01d, (q15_t)0x87c,  (q15_t)0xe028,\n    (q15_t)0x876,  (q15_t)0xe033, (q15_t)0x870,  (q15_t)0xe03e, (q15_t)0x869,\n    (q15_t)0xe049, (q15_t)0x863,  (q15_t)0xe054, (q15_t)0x85d,  (q15_t)0xe05e,\n    (q15_t)0x857,  (q15_t)0xe069, (q15_t)0x850,  (q15_t)0xe074, (q15_t)0x84a,\n    (q15_t)0xe07f, (q15_t)0x844,  (q15_t)0xe08a, (q15_t)0x83e,  (q15_t)0xe095,\n    (q15_t)0x838,  (q15_t)0xe0a0, (q15_t)0x832,  (q15_t)0xe0ab, (q15_t)0x82b,\n    (q15_t)0xe0b6, (q15_t)0x825,  (q15_t)0xe0c1, (q15_t)0x81f,  (q15_t)0xe0cc,\n    (q15_t)0x819,  (q15_t)0xe0d7, (q15_t)0x813,  (q15_t)0xe0e2, (q15_t)0x80d,\n    (q15_t)0xe0ed, (q15_t)0x807,  (q15_t)0xe0f8, (q15_t)0x801,  (q15_t)0xe103,\n    (q15_t)0x7fb,  (q15_t)0xe10e, (q15_t)0x7f5,  (q15_t)0xe119, (q15_t)0x7ee,\n    (q15_t)0xe124, (q15_t)0x7e8,  (q15_t)0xe12f, (q15_t)0x7e2,  (q15_t)0xe13a,\n    (q15_t)0x7dc,  (q15_t)0xe145, (q15_t)0x7d6,  (q15_t)0xe150, (q15_t)0x7d0,\n    (q15_t)0xe15b, (q15_t)0x7ca,  (q15_t)0xe166, (q15_t)0x7c4,  (q15_t)0xe171,\n    (q15_t)0x7be,  (q15_t)0xe17c, (q15_t)0x7b8,  (q15_t)0xe187, (q15_t)0x7b2,\n    (q15_t)0xe192, (q15_t)0x7ac,  (q15_t)0xe19d, (q15_t)0x7a6,  (q15_t)0xe1a8,\n    (q15_t)0x7a0,  (q15_t)0xe1b3, (q15_t)0x79a,  (q15_t)0xe1be, (q15_t)0x795,\n    (q15_t)0xe1ca, (q15_t)0x78f,  (q15_t)0xe1d5, (q15_t)0x789,  (q15_t)0xe1e0,\n    (q15_t)0x783,  (q15_t)0xe1eb, (q15_t)0x77d,  (q15_t)0xe1f6, (q15_t)0x777,\n    (q15_t)0xe201, (q15_t)0x771,  (q15_t)0xe20c, (q15_t)0x76b,  (q15_t)0xe217,\n    (q15_t)0x765,  (q15_t)0xe222, (q15_t)0x75f,  (q15_t)0xe22d, (q15_t)0x75a,\n    (q15_t)0xe239, (q15_t)0x754,  (q15_t)0xe244, (q15_t)0x74e,  (q15_t)0xe24f,\n    (q15_t)0x748,  (q15_t)0xe25a, (q15_t)0x742,  (q15_t)0xe265, (q15_t)0x73d,\n    (q15_t)0xe270, (q15_t)0x737,  (q15_t)0xe27b, (q15_t)0x731,  (q15_t)0xe287,\n    (q15_t)0x72b,  (q15_t)0xe292, (q15_t)0x725,  (q15_t)0xe29d, (q15_t)0x720,\n    (q15_t)0xe2a8, (q15_t)0x71a,  (q15_t)0xe2b3, (q15_t)0x714,  (q15_t)0xe2be,\n    (q15_t)0x70e,  (q15_t)0xe2ca, (q15_t)0x709,  (q15_t)0xe2d5, (q15_t)0x703,\n    (q15_t)0xe2e0, (q15_t)0x6fd,  (q15_t)0xe2eb, (q15_t)0x6f7,  (q15_t)0xe2f6,\n    (q15_t)0x6f2,  (q15_t)0xe301, (q15_t)0x6ec,  (q15_t)0xe30d, (q15_t)0x6e6,\n    (q15_t)0xe318, (q15_t)0x6e1,  (q15_t)0xe323, (q15_t)0x6db,  (q15_t)0xe32e,\n    (q15_t)0x6d5,  (q15_t)0xe33a, (q15_t)0x6d0,  (q15_t)0xe345, (q15_t)0x6ca,\n    (q15_t)0xe350, (q15_t)0x6c5,  (q15_t)0xe35b, (q15_t)0x6bf,  (q15_t)0xe367,\n    (q15_t)0x6b9,  (q15_t)0xe372, (q15_t)0x6b4,  (q15_t)0xe37d, (q15_t)0x6ae,\n    (q15_t)0xe388, (q15_t)0x6a8,  (q15_t)0xe394, (q15_t)0x6a3,  (q15_t)0xe39f,\n    (q15_t)0x69d,  (q15_t)0xe3aa, (q15_t)0x698,  (q15_t)0xe3b5, (q15_t)0x692,\n    (q15_t)0xe3c1, (q15_t)0x68d,  (q15_t)0xe3cc, (q15_t)0x687,  (q15_t)0xe3d7,\n    (q15_t)0x682,  (q15_t)0xe3e2, (q15_t)0x67c,  (q15_t)0xe3ee, (q15_t)0x677,\n    (q15_t)0xe3f9, (q15_t)0x671,  (q15_t)0xe404, (q15_t)0x66c,  (q15_t)0xe410,\n    (q15_t)0x666,  (q15_t)0xe41b, (q15_t)0x661,  (q15_t)0xe426, (q15_t)0x65b,\n    (q15_t)0xe432, (q15_t)0x656,  (q15_t)0xe43d, (q15_t)0x650,  (q15_t)0xe448,\n    (q15_t)0x64b,  (q15_t)0xe454, (q15_t)0x645,  (q15_t)0xe45f, (q15_t)0x640,\n    (q15_t)0xe46a, (q15_t)0x63b,  (q15_t)0xe476, (q15_t)0x635,  (q15_t)0xe481,\n    (q15_t)0x630,  (q15_t)0xe48c, (q15_t)0x62a,  (q15_t)0xe498, (q15_t)0x625,\n    (q15_t)0xe4a3, (q15_t)0x620,  (q15_t)0xe4ae, (q15_t)0x61a,  (q15_t)0xe4ba,\n    (q15_t)0x615,  (q15_t)0xe4c5, (q15_t)0x610,  (q15_t)0xe4d0, (q15_t)0x60a,\n    (q15_t)0xe4dc, (q15_t)0x605,  (q15_t)0xe4e7, (q15_t)0x600,  (q15_t)0xe4f3,\n    (q15_t)0x5fa,  (q15_t)0xe4fe, (q15_t)0x5f5,  (q15_t)0xe509, (q15_t)0x5f0,\n    (q15_t)0xe515, (q15_t)0x5ea,  (q15_t)0xe520, (q15_t)0x5e5,  (q15_t)0xe52c,\n    (q15_t)0x5e0,  (q15_t)0xe537, (q15_t)0x5db,  (q15_t)0xe542, (q15_t)0x5d5,\n    (q15_t)0xe54e, (q15_t)0x5d0,  (q15_t)0xe559, (q15_t)0x5cb,  (q15_t)0xe565,\n    (q15_t)0x5c6,  (q15_t)0xe570, (q15_t)0x5c1,  (q15_t)0xe57c, (q15_t)0x5bb,\n    (q15_t)0xe587, (q15_t)0x5b6,  (q15_t)0xe592, (q15_t)0x5b1,  (q15_t)0xe59e,\n    (q15_t)0x5ac,  (q15_t)0xe5a9, (q15_t)0x5a7,  (q15_t)0xe5b5, (q15_t)0x5a1,\n    (q15_t)0xe5c0, (q15_t)0x59c,  (q15_t)0xe5cc, (q15_t)0x597,  (q15_t)0xe5d7,\n    (q15_t)0x592,  (q15_t)0xe5e3, (q15_t)0x58d,  (q15_t)0xe5ee, (q15_t)0x588,\n    (q15_t)0xe5fa, (q15_t)0x583,  (q15_t)0xe605, (q15_t)0x57e,  (q15_t)0xe611,\n    (q15_t)0x578,  (q15_t)0xe61c, (q15_t)0x573,  (q15_t)0xe628, (q15_t)0x56e,\n    (q15_t)0xe633, (q15_t)0x569,  (q15_t)0xe63f, (q15_t)0x564,  (q15_t)0xe64a,\n    (q15_t)0x55f,  (q15_t)0xe656, (q15_t)0x55a,  (q15_t)0xe661, (q15_t)0x555,\n    (q15_t)0xe66d, (q15_t)0x550,  (q15_t)0xe678, (q15_t)0x54b,  (q15_t)0xe684,\n    (q15_t)0x546,  (q15_t)0xe68f, (q15_t)0x541,  (q15_t)0xe69b, (q15_t)0x53c,\n    (q15_t)0xe6a6, (q15_t)0x537,  (q15_t)0xe6b2, (q15_t)0x532,  (q15_t)0xe6bd,\n    (q15_t)0x52d,  (q15_t)0xe6c9, (q15_t)0x528,  (q15_t)0xe6d4, (q15_t)0x523,\n    (q15_t)0xe6e0, (q15_t)0x51e,  (q15_t)0xe6ec, (q15_t)0x51a,  (q15_t)0xe6f7,\n    (q15_t)0x515,  (q15_t)0xe703, (q15_t)0x510,  (q15_t)0xe70e, (q15_t)0x50b,\n    (q15_t)0xe71a, (q15_t)0x506,  (q15_t)0xe725, (q15_t)0x501,  (q15_t)0xe731,\n    (q15_t)0x4fc,  (q15_t)0xe73d, (q15_t)0x4f7,  (q15_t)0xe748, (q15_t)0x4f2,\n    (q15_t)0xe754, (q15_t)0x4ee,  (q15_t)0xe75f, (q15_t)0x4e9,  (q15_t)0xe76b,\n    (q15_t)0x4e4,  (q15_t)0xe777, (q15_t)0x4df,  (q15_t)0xe782, (q15_t)0x4da,\n    (q15_t)0xe78e, (q15_t)0x4d6,  (q15_t)0xe799, (q15_t)0x4d1,  (q15_t)0xe7a5,\n    (q15_t)0x4cc,  (q15_t)0xe7b1, (q15_t)0x4c7,  (q15_t)0xe7bc, (q15_t)0x4c2,\n    (q15_t)0xe7c8, (q15_t)0x4be,  (q15_t)0xe7d3, (q15_t)0x4b9,  (q15_t)0xe7df,\n    (q15_t)0x4b4,  (q15_t)0xe7eb, (q15_t)0x4b0,  (q15_t)0xe7f6, (q15_t)0x4ab,\n    (q15_t)0xe802, (q15_t)0x4a6,  (q15_t)0xe80e, (q15_t)0x4a1,  (q15_t)0xe819,\n    (q15_t)0x49d,  (q15_t)0xe825, (q15_t)0x498,  (q15_t)0xe831, (q15_t)0x493,\n    (q15_t)0xe83c, (q15_t)0x48f,  (q15_t)0xe848, (q15_t)0x48a,  (q15_t)0xe854,\n    (q15_t)0x485,  (q15_t)0xe85f, (q15_t)0x481,  (q15_t)0xe86b, (q15_t)0x47c,\n    (q15_t)0xe877, (q15_t)0x478,  (q15_t)0xe882, (q15_t)0x473,  (q15_t)0xe88e,\n    (q15_t)0x46e,  (q15_t)0xe89a, (q15_t)0x46a,  (q15_t)0xe8a5, (q15_t)0x465,\n    (q15_t)0xe8b1, (q15_t)0x461,  (q15_t)0xe8bd, (q15_t)0x45c,  (q15_t)0xe8c9,\n    (q15_t)0x457,  (q15_t)0xe8d4, (q15_t)0x453,  (q15_t)0xe8e0, (q15_t)0x44e,\n    (q15_t)0xe8ec, (q15_t)0x44a,  (q15_t)0xe8f7, (q15_t)0x445,  (q15_t)0xe903,\n    (q15_t)0x441,  (q15_t)0xe90f, (q15_t)0x43c,  (q15_t)0xe91b, (q15_t)0x438,\n    (q15_t)0xe926, (q15_t)0x433,  (q15_t)0xe932, (q15_t)0x42f,  (q15_t)0xe93e,\n    (q15_t)0x42a,  (q15_t)0xe94a, (q15_t)0x426,  (q15_t)0xe955, (q15_t)0x422,\n    (q15_t)0xe961, (q15_t)0x41d,  (q15_t)0xe96d, (q15_t)0x419,  (q15_t)0xe979,\n    (q15_t)0x414,  (q15_t)0xe984, (q15_t)0x410,  (q15_t)0xe990, (q15_t)0x40b,\n    (q15_t)0xe99c, (q15_t)0x407,  (q15_t)0xe9a8, (q15_t)0x403,  (q15_t)0xe9b4,\n    (q15_t)0x3fe,  (q15_t)0xe9bf, (q15_t)0x3fa,  (q15_t)0xe9cb, (q15_t)0x3f6,\n    (q15_t)0xe9d7, (q15_t)0x3f1,  (q15_t)0xe9e3, (q15_t)0x3ed,  (q15_t)0xe9ee,\n    (q15_t)0x3e9,  (q15_t)0xe9fa, (q15_t)0x3e4,  (q15_t)0xea06, (q15_t)0x3e0,\n    (q15_t)0xea12, (q15_t)0x3dc,  (q15_t)0xea1e, (q15_t)0x3d7,  (q15_t)0xea29,\n    (q15_t)0x3d3,  (q15_t)0xea35, (q15_t)0x3cf,  (q15_t)0xea41, (q15_t)0x3ca,\n    (q15_t)0xea4d, (q15_t)0x3c6,  (q15_t)0xea59, (q15_t)0x3c2,  (q15_t)0xea65,\n    (q15_t)0x3be,  (q15_t)0xea70, (q15_t)0x3ba,  (q15_t)0xea7c, (q15_t)0x3b5,\n    (q15_t)0xea88, (q15_t)0x3b1,  (q15_t)0xea94, (q15_t)0x3ad,  (q15_t)0xeaa0,\n    (q15_t)0x3a9,  (q15_t)0xeaac, (q15_t)0x3a5,  (q15_t)0xeab7, (q15_t)0x3a0,\n    (q15_t)0xeac3, (q15_t)0x39c,  (q15_t)0xeacf, (q15_t)0x398,  (q15_t)0xeadb,\n    (q15_t)0x394,  (q15_t)0xeae7, (q15_t)0x390,  (q15_t)0xeaf3, (q15_t)0x38c,\n    (q15_t)0xeaff, (q15_t)0x387,  (q15_t)0xeb0a, (q15_t)0x383,  (q15_t)0xeb16,\n    (q15_t)0x37f,  (q15_t)0xeb22, (q15_t)0x37b,  (q15_t)0xeb2e, (q15_t)0x377,\n    (q15_t)0xeb3a, (q15_t)0x373,  (q15_t)0xeb46, (q15_t)0x36f,  (q15_t)0xeb52,\n    (q15_t)0x36b,  (q15_t)0xeb5e, (q15_t)0x367,  (q15_t)0xeb6a, (q15_t)0x363,\n    (q15_t)0xeb75, (q15_t)0x35f,  (q15_t)0xeb81, (q15_t)0x35b,  (q15_t)0xeb8d,\n    (q15_t)0x357,  (q15_t)0xeb99, (q15_t)0x353,  (q15_t)0xeba5, (q15_t)0x34f,\n    (q15_t)0xebb1, (q15_t)0x34b,  (q15_t)0xebbd, (q15_t)0x347,  (q15_t)0xebc9,\n    (q15_t)0x343,  (q15_t)0xebd5, (q15_t)0x33f,  (q15_t)0xebe1, (q15_t)0x33b,\n    (q15_t)0xebed, (q15_t)0x337,  (q15_t)0xebf9, (q15_t)0x333,  (q15_t)0xec05,\n    (q15_t)0x32f,  (q15_t)0xec10, (q15_t)0x32b,  (q15_t)0xec1c, (q15_t)0x327,\n    (q15_t)0xec28, (q15_t)0x323,  (q15_t)0xec34, (q15_t)0x320,  (q15_t)0xec40,\n    (q15_t)0x31c,  (q15_t)0xec4c, (q15_t)0x318,  (q15_t)0xec58, (q15_t)0x314,\n    (q15_t)0xec64, (q15_t)0x310,  (q15_t)0xec70, (q15_t)0x30c,  (q15_t)0xec7c,\n    (q15_t)0x308,  (q15_t)0xec88, (q15_t)0x305,  (q15_t)0xec94, (q15_t)0x301,\n    (q15_t)0xeca0, (q15_t)0x2fd,  (q15_t)0xecac, (q15_t)0x2f9,  (q15_t)0xecb8,\n    (q15_t)0x2f5,  (q15_t)0xecc4, (q15_t)0x2f2,  (q15_t)0xecd0, (q15_t)0x2ee,\n    (q15_t)0xecdc, (q15_t)0x2ea,  (q15_t)0xece8, (q15_t)0x2e6,  (q15_t)0xecf4,\n    (q15_t)0x2e3,  (q15_t)0xed00, (q15_t)0x2df,  (q15_t)0xed0c, (q15_t)0x2db,\n    (q15_t)0xed18, (q15_t)0x2d8,  (q15_t)0xed24, (q15_t)0x2d4,  (q15_t)0xed30,\n    (q15_t)0x2d0,  (q15_t)0xed3c, (q15_t)0x2cc,  (q15_t)0xed48, (q15_t)0x2c9,\n    (q15_t)0xed54, (q15_t)0x2c5,  (q15_t)0xed60, (q15_t)0x2c1,  (q15_t)0xed6c,\n    (q15_t)0x2be,  (q15_t)0xed78, (q15_t)0x2ba,  (q15_t)0xed84, (q15_t)0x2b7,\n    (q15_t)0xed90, (q15_t)0x2b3,  (q15_t)0xed9c, (q15_t)0x2af,  (q15_t)0xeda8,\n    (q15_t)0x2ac,  (q15_t)0xedb4, (q15_t)0x2a8,  (q15_t)0xedc0, (q15_t)0x2a5,\n    (q15_t)0xedcc, (q15_t)0x2a1,  (q15_t)0xedd8, (q15_t)0x29d,  (q15_t)0xede4,\n    (q15_t)0x29a,  (q15_t)0xedf0, (q15_t)0x296,  (q15_t)0xedfc, (q15_t)0x293,\n    (q15_t)0xee09, (q15_t)0x28f,  (q15_t)0xee15, (q15_t)0x28c,  (q15_t)0xee21,\n    (q15_t)0x288,  (q15_t)0xee2d, (q15_t)0x285,  (q15_t)0xee39, (q15_t)0x281,\n    (q15_t)0xee45, (q15_t)0x27e,  (q15_t)0xee51, (q15_t)0x27a,  (q15_t)0xee5d,\n    (q15_t)0x277,  (q15_t)0xee69, (q15_t)0x273,  (q15_t)0xee75, (q15_t)0x270,\n    (q15_t)0xee81, (q15_t)0x26d,  (q15_t)0xee8d, (q15_t)0x269,  (q15_t)0xee99,\n    (q15_t)0x266,  (q15_t)0xeea6, (q15_t)0x262,  (q15_t)0xeeb2, (q15_t)0x25f,\n    (q15_t)0xeebe, (q15_t)0x25c,  (q15_t)0xeeca, (q15_t)0x258,  (q15_t)0xeed6,\n    (q15_t)0x255,  (q15_t)0xeee2, (q15_t)0x251,  (q15_t)0xeeee, (q15_t)0x24e,\n    (q15_t)0xeefa, (q15_t)0x24b,  (q15_t)0xef06, (q15_t)0x247,  (q15_t)0xef13,\n    (q15_t)0x244,  (q15_t)0xef1f, (q15_t)0x241,  (q15_t)0xef2b, (q15_t)0x23e,\n    (q15_t)0xef37, (q15_t)0x23a,  (q15_t)0xef43, (q15_t)0x237,  (q15_t)0xef4f,\n    (q15_t)0x234,  (q15_t)0xef5b, (q15_t)0x230,  (q15_t)0xef67, (q15_t)0x22d,\n    (q15_t)0xef74, (q15_t)0x22a,  (q15_t)0xef80, (q15_t)0x227,  (q15_t)0xef8c,\n    (q15_t)0x223,  (q15_t)0xef98, (q15_t)0x220,  (q15_t)0xefa4, (q15_t)0x21d,\n    (q15_t)0xefb0, (q15_t)0x21a,  (q15_t)0xefbc, (q15_t)0x217,  (q15_t)0xefc9,\n    (q15_t)0x213,  (q15_t)0xefd5, (q15_t)0x210,  (q15_t)0xefe1, (q15_t)0x20d,\n    (q15_t)0xefed, (q15_t)0x20a,  (q15_t)0xeff9, (q15_t)0x207,  (q15_t)0xf005,\n    (q15_t)0x204,  (q15_t)0xf012, (q15_t)0x201,  (q15_t)0xf01e, (q15_t)0x1fd,\n    (q15_t)0xf02a, (q15_t)0x1fa,  (q15_t)0xf036, (q15_t)0x1f7,  (q15_t)0xf042,\n    (q15_t)0x1f4,  (q15_t)0xf04e, (q15_t)0x1f1,  (q15_t)0xf05b, (q15_t)0x1ee,\n    (q15_t)0xf067, (q15_t)0x1eb,  (q15_t)0xf073, (q15_t)0x1e8,  (q15_t)0xf07f,\n    (q15_t)0x1e5,  (q15_t)0xf08b, (q15_t)0x1e2,  (q15_t)0xf098, (q15_t)0x1df,\n    (q15_t)0xf0a4, (q15_t)0x1dc,  (q15_t)0xf0b0, (q15_t)0x1d9,  (q15_t)0xf0bc,\n    (q15_t)0x1d6,  (q15_t)0xf0c8, (q15_t)0x1d3,  (q15_t)0xf0d5, (q15_t)0x1d0,\n    (q15_t)0xf0e1, (q15_t)0x1cd,  (q15_t)0xf0ed, (q15_t)0x1ca,  (q15_t)0xf0f9,\n    (q15_t)0x1c7,  (q15_t)0xf105, (q15_t)0x1c4,  (q15_t)0xf112, (q15_t)0x1c1,\n    (q15_t)0xf11e, (q15_t)0x1be,  (q15_t)0xf12a, (q15_t)0x1bb,  (q15_t)0xf136,\n    (q15_t)0x1b8,  (q15_t)0xf143, (q15_t)0x1b6,  (q15_t)0xf14f, (q15_t)0x1b3,\n    (q15_t)0xf15b, (q15_t)0x1b0,  (q15_t)0xf167, (q15_t)0x1ad,  (q15_t)0xf174,\n    (q15_t)0x1aa,  (q15_t)0xf180, (q15_t)0x1a7,  (q15_t)0xf18c, (q15_t)0x1a4,\n    (q15_t)0xf198, (q15_t)0x1a2,  (q15_t)0xf1a4, (q15_t)0x19f,  (q15_t)0xf1b1,\n    (q15_t)0x19c,  (q15_t)0xf1bd, (q15_t)0x199,  (q15_t)0xf1c9, (q15_t)0x196,\n    (q15_t)0xf1d5, (q15_t)0x194,  (q15_t)0xf1e2, (q15_t)0x191,  (q15_t)0xf1ee,\n    (q15_t)0x18e,  (q15_t)0xf1fa, (q15_t)0x18b,  (q15_t)0xf207, (q15_t)0x189,\n    (q15_t)0xf213, (q15_t)0x186,  (q15_t)0xf21f, (q15_t)0x183,  (q15_t)0xf22b,\n    (q15_t)0x180,  (q15_t)0xf238, (q15_t)0x17e,  (q15_t)0xf244, (q15_t)0x17b,\n    (q15_t)0xf250, (q15_t)0x178,  (q15_t)0xf25c, (q15_t)0x176,  (q15_t)0xf269,\n    (q15_t)0x173,  (q15_t)0xf275, (q15_t)0x170,  (q15_t)0xf281, (q15_t)0x16e,\n    (q15_t)0xf28e, (q15_t)0x16b,  (q15_t)0xf29a, (q15_t)0x168,  (q15_t)0xf2a6,\n    (q15_t)0x166,  (q15_t)0xf2b2, (q15_t)0x163,  (q15_t)0xf2bf, (q15_t)0x161,\n    (q15_t)0xf2cb, (q15_t)0x15e,  (q15_t)0xf2d7, (q15_t)0x15b,  (q15_t)0xf2e4,\n    (q15_t)0x159,  (q15_t)0xf2f0, (q15_t)0x156,  (q15_t)0xf2fc, (q15_t)0x154,\n    (q15_t)0xf308, (q15_t)0x151,  (q15_t)0xf315, (q15_t)0x14f,  (q15_t)0xf321,\n    (q15_t)0x14c,  (q15_t)0xf32d, (q15_t)0x14a,  (q15_t)0xf33a, (q15_t)0x147,\n    (q15_t)0xf346, (q15_t)0x145,  (q15_t)0xf352, (q15_t)0x142,  (q15_t)0xf35f,\n    (q15_t)0x140,  (q15_t)0xf36b, (q15_t)0x13d,  (q15_t)0xf377, (q15_t)0x13b,\n    (q15_t)0xf384, (q15_t)0x138,  (q15_t)0xf390, (q15_t)0x136,  (q15_t)0xf39c,\n    (q15_t)0x134,  (q15_t)0xf3a9, (q15_t)0x131,  (q15_t)0xf3b5, (q15_t)0x12f,\n    (q15_t)0xf3c1, (q15_t)0x12c,  (q15_t)0xf3ce, (q15_t)0x12a,  (q15_t)0xf3da,\n    (q15_t)0x128,  (q15_t)0xf3e6, (q15_t)0x125,  (q15_t)0xf3f3, (q15_t)0x123,\n    (q15_t)0xf3ff, (q15_t)0x120,  (q15_t)0xf40b, (q15_t)0x11e,  (q15_t)0xf418,\n    (q15_t)0x11c,  (q15_t)0xf424, (q15_t)0x119,  (q15_t)0xf430, (q15_t)0x117,\n    (q15_t)0xf43d, (q15_t)0x115,  (q15_t)0xf449, (q15_t)0x113,  (q15_t)0xf455,\n    (q15_t)0x110,  (q15_t)0xf462, (q15_t)0x10e,  (q15_t)0xf46e, (q15_t)0x10c,\n    (q15_t)0xf47b, (q15_t)0x109,  (q15_t)0xf487, (q15_t)0x107,  (q15_t)0xf493,\n    (q15_t)0x105,  (q15_t)0xf4a0, (q15_t)0x103,  (q15_t)0xf4ac, (q15_t)0x100,\n    (q15_t)0xf4b8, (q15_t)0xfe,   (q15_t)0xf4c5, (q15_t)0xfc,   (q15_t)0xf4d1,\n    (q15_t)0xfa,   (q15_t)0xf4dd, (q15_t)0xf8,   (q15_t)0xf4ea, (q15_t)0xf6,\n    (q15_t)0xf4f6, (q15_t)0xf3,   (q15_t)0xf503, (q15_t)0xf1,   (q15_t)0xf50f,\n    (q15_t)0xef,   (q15_t)0xf51b, (q15_t)0xed,   (q15_t)0xf528, (q15_t)0xeb,\n    (q15_t)0xf534, (q15_t)0xe9,   (q15_t)0xf540, (q15_t)0xe7,   (q15_t)0xf54d,\n    (q15_t)0xe4,   (q15_t)0xf559, (q15_t)0xe2,   (q15_t)0xf566, (q15_t)0xe0,\n    (q15_t)0xf572, (q15_t)0xde,   (q15_t)0xf57e, (q15_t)0xdc,   (q15_t)0xf58b,\n    (q15_t)0xda,   (q15_t)0xf597, (q15_t)0xd8,   (q15_t)0xf5a4, (q15_t)0xd6,\n    (q15_t)0xf5b0, (q15_t)0xd4,   (q15_t)0xf5bc, (q15_t)0xd2,   (q15_t)0xf5c9,\n    (q15_t)0xd0,   (q15_t)0xf5d5, (q15_t)0xce,   (q15_t)0xf5e2, (q15_t)0xcc,\n    (q15_t)0xf5ee, (q15_t)0xca,   (q15_t)0xf5fa, (q15_t)0xc8,   (q15_t)0xf607,\n    (q15_t)0xc6,   (q15_t)0xf613, (q15_t)0xc4,   (q15_t)0xf620, (q15_t)0xc2,\n    (q15_t)0xf62c, (q15_t)0xc0,   (q15_t)0xf639, (q15_t)0xbe,   (q15_t)0xf645,\n    (q15_t)0xbd,   (q15_t)0xf651, (q15_t)0xbb,   (q15_t)0xf65e, (q15_t)0xb9,\n    (q15_t)0xf66a, (q15_t)0xb7,   (q15_t)0xf677, (q15_t)0xb5,   (q15_t)0xf683,\n    (q15_t)0xb3,   (q15_t)0xf690, (q15_t)0xb1,   (q15_t)0xf69c, (q15_t)0xaf,\n    (q15_t)0xf6a8, (q15_t)0xae,   (q15_t)0xf6b5, (q15_t)0xac,   (q15_t)0xf6c1,\n    (q15_t)0xaa,   (q15_t)0xf6ce, (q15_t)0xa8,   (q15_t)0xf6da, (q15_t)0xa6,\n    (q15_t)0xf6e7, (q15_t)0xa5,   (q15_t)0xf6f3, (q15_t)0xa3,   (q15_t)0xf6ff,\n    (q15_t)0xa1,   (q15_t)0xf70c, (q15_t)0x9f,   (q15_t)0xf718, (q15_t)0x9e,\n    (q15_t)0xf725, (q15_t)0x9c,   (q15_t)0xf731, (q15_t)0x9a,   (q15_t)0xf73e,\n    (q15_t)0x98,   (q15_t)0xf74a, (q15_t)0x97,   (q15_t)0xf757, (q15_t)0x95,\n    (q15_t)0xf763, (q15_t)0x93,   (q15_t)0xf76f, (q15_t)0x92,   (q15_t)0xf77c,\n    (q15_t)0x90,   (q15_t)0xf788, (q15_t)0x8e,   (q15_t)0xf795, (q15_t)0x8d,\n    (q15_t)0xf7a1, (q15_t)0x8b,   (q15_t)0xf7ae, (q15_t)0x89,   (q15_t)0xf7ba,\n    (q15_t)0x88,   (q15_t)0xf7c7, (q15_t)0x86,   (q15_t)0xf7d3, (q15_t)0x85,\n    (q15_t)0xf7e0, (q15_t)0x83,   (q15_t)0xf7ec, (q15_t)0x81,   (q15_t)0xf7f9,\n    (q15_t)0x80,   (q15_t)0xf805, (q15_t)0x7e,   (q15_t)0xf811, (q15_t)0x7d,\n    (q15_t)0xf81e, (q15_t)0x7b,   (q15_t)0xf82a, (q15_t)0x7a,   (q15_t)0xf837,\n    (q15_t)0x78,   (q15_t)0xf843, (q15_t)0x77,   (q15_t)0xf850, (q15_t)0x75,\n    (q15_t)0xf85c, (q15_t)0x74,   (q15_t)0xf869, (q15_t)0x72,   (q15_t)0xf875,\n    (q15_t)0x71,   (q15_t)0xf882, (q15_t)0x6f,   (q15_t)0xf88e, (q15_t)0x6e,\n    (q15_t)0xf89b, (q15_t)0x6c,   (q15_t)0xf8a7, (q15_t)0x6b,   (q15_t)0xf8b4,\n    (q15_t)0x69,   (q15_t)0xf8c0, (q15_t)0x68,   (q15_t)0xf8cd, (q15_t)0x67,\n    (q15_t)0xf8d9, (q15_t)0x65,   (q15_t)0xf8e6, (q15_t)0x64,   (q15_t)0xf8f2,\n    (q15_t)0x62,   (q15_t)0xf8ff, (q15_t)0x61,   (q15_t)0xf90b, (q15_t)0x60,\n    (q15_t)0xf918, (q15_t)0x5e,   (q15_t)0xf924, (q15_t)0x5d,   (q15_t)0xf931,\n    (q15_t)0x5c,   (q15_t)0xf93d, (q15_t)0x5a,   (q15_t)0xf94a, (q15_t)0x59,\n    (q15_t)0xf956, (q15_t)0x58,   (q15_t)0xf963, (q15_t)0x56,   (q15_t)0xf96f,\n    (q15_t)0x55,   (q15_t)0xf97c, (q15_t)0x54,   (q15_t)0xf988, (q15_t)0x53,\n    (q15_t)0xf995, (q15_t)0x51,   (q15_t)0xf9a1, (q15_t)0x50,   (q15_t)0xf9ae,\n    (q15_t)0x4f,   (q15_t)0xf9ba, (q15_t)0x4e,   (q15_t)0xf9c7, (q15_t)0x4c,\n    (q15_t)0xf9d3, (q15_t)0x4b,   (q15_t)0xf9e0, (q15_t)0x4a,   (q15_t)0xf9ec,\n    (q15_t)0x49,   (q15_t)0xf9f9, (q15_t)0x48,   (q15_t)0xfa05, (q15_t)0x47,\n    (q15_t)0xfa12, (q15_t)0x45,   (q15_t)0xfa1e, (q15_t)0x44,   (q15_t)0xfa2b,\n    (q15_t)0x43,   (q15_t)0xfa37, (q15_t)0x42,   (q15_t)0xfa44, (q15_t)0x41,\n    (q15_t)0xfa50, (q15_t)0x40,   (q15_t)0xfa5d, (q15_t)0x3f,   (q15_t)0xfa69,\n    (q15_t)0x3d,   (q15_t)0xfa76, (q15_t)0x3c,   (q15_t)0xfa82, (q15_t)0x3b,\n    (q15_t)0xfa8f, (q15_t)0x3a,   (q15_t)0xfa9b, (q15_t)0x39,   (q15_t)0xfaa8,\n    (q15_t)0x38,   (q15_t)0xfab4, (q15_t)0x37,   (q15_t)0xfac1, (q15_t)0x36,\n    (q15_t)0xfacd, (q15_t)0x35,   (q15_t)0xfada, (q15_t)0x34,   (q15_t)0xfae6,\n    (q15_t)0x33,   (q15_t)0xfaf3, (q15_t)0x32,   (q15_t)0xfb00, (q15_t)0x31,\n    (q15_t)0xfb0c, (q15_t)0x30,   (q15_t)0xfb19, (q15_t)0x2f,   (q15_t)0xfb25,\n    (q15_t)0x2e,   (q15_t)0xfb32, (q15_t)0x2d,   (q15_t)0xfb3e, (q15_t)0x2c,\n    (q15_t)0xfb4b, (q15_t)0x2b,   (q15_t)0xfb57, (q15_t)0x2b,   (q15_t)0xfb64,\n    (q15_t)0x2a,   (q15_t)0xfb70, (q15_t)0x29,   (q15_t)0xfb7d, (q15_t)0x28,\n    (q15_t)0xfb89, (q15_t)0x27,   (q15_t)0xfb96, (q15_t)0x26,   (q15_t)0xfba2,\n    (q15_t)0x25,   (q15_t)0xfbaf, (q15_t)0x24,   (q15_t)0xfbbc, (q15_t)0x24,\n    (q15_t)0xfbc8, (q15_t)0x23,   (q15_t)0xfbd5, (q15_t)0x22,   (q15_t)0xfbe1,\n    (q15_t)0x21,   (q15_t)0xfbee, (q15_t)0x20,   (q15_t)0xfbfa, (q15_t)0x20,\n    (q15_t)0xfc07, (q15_t)0x1f,   (q15_t)0xfc13, (q15_t)0x1e,   (q15_t)0xfc20,\n    (q15_t)0x1d,   (q15_t)0xfc2c, (q15_t)0x1d,   (q15_t)0xfc39, (q15_t)0x1c,\n    (q15_t)0xfc45, (q15_t)0x1b,   (q15_t)0xfc52, (q15_t)0x1a,   (q15_t)0xfc5f,\n    (q15_t)0x1a,   (q15_t)0xfc6b, (q15_t)0x19,   (q15_t)0xfc78, (q15_t)0x18,\n    (q15_t)0xfc84, (q15_t)0x18,   (q15_t)0xfc91, (q15_t)0x17,   (q15_t)0xfc9d,\n    (q15_t)0x16,   (q15_t)0xfcaa, (q15_t)0x16,   (q15_t)0xfcb6, (q15_t)0x15,\n    (q15_t)0xfcc3, (q15_t)0x14,   (q15_t)0xfcd0, (q15_t)0x14,   (q15_t)0xfcdc,\n    (q15_t)0x13,   (q15_t)0xfce9, (q15_t)0x13,   (q15_t)0xfcf5, (q15_t)0x12,\n    (q15_t)0xfd02, (q15_t)0x11,   (q15_t)0xfd0e, (q15_t)0x11,   (q15_t)0xfd1b,\n    (q15_t)0x10,   (q15_t)0xfd27, (q15_t)0x10,   (q15_t)0xfd34, (q15_t)0xf,\n    (q15_t)0xfd40, (q15_t)0xf,    (q15_t)0xfd4d, (q15_t)0xe,    (q15_t)0xfd5a,\n    (q15_t)0xe,    (q15_t)0xfd66, (q15_t)0xd,    (q15_t)0xfd73, (q15_t)0xd,\n    (q15_t)0xfd7f, (q15_t)0xc,    (q15_t)0xfd8c, (q15_t)0xc,    (q15_t)0xfd98,\n    (q15_t)0xb,    (q15_t)0xfda5, (q15_t)0xb,    (q15_t)0xfdb2, (q15_t)0xa,\n    (q15_t)0xfdbe, (q15_t)0xa,    (q15_t)0xfdcb, (q15_t)0x9,    (q15_t)0xfdd7,\n    (q15_t)0x9,    (q15_t)0xfde4, (q15_t)0x9,    (q15_t)0xfdf0, (q15_t)0x8,\n    (q15_t)0xfdfd, (q15_t)0x8,    (q15_t)0xfe09, (q15_t)0x7,    (q15_t)0xfe16,\n    (q15_t)0x7,    (q15_t)0xfe23, (q15_t)0x7,    (q15_t)0xfe2f, (q15_t)0x6,\n    (q15_t)0xfe3c, (q15_t)0x6,    (q15_t)0xfe48, (q15_t)0x6,    (q15_t)0xfe55,\n    (q15_t)0x5,    (q15_t)0xfe61, (q15_t)0x5,    (q15_t)0xfe6e, (q15_t)0x5,\n    (q15_t)0xfe7a, (q15_t)0x4,    (q15_t)0xfe87, (q15_t)0x4,    (q15_t)0xfe94,\n    (q15_t)0x4,    (q15_t)0xfea0, (q15_t)0x4,    (q15_t)0xfead, (q15_t)0x3,\n    (q15_t)0xfeb9, (q15_t)0x3,    (q15_t)0xfec6, (q15_t)0x3,    (q15_t)0xfed2,\n    (q15_t)0x3,    (q15_t)0xfedf, (q15_t)0x2,    (q15_t)0xfeec, (q15_t)0x2,\n    (q15_t)0xfef8, (q15_t)0x2,    (q15_t)0xff05, (q15_t)0x2,    (q15_t)0xff11,\n    (q15_t)0x2,    (q15_t)0xff1e, (q15_t)0x1,    (q15_t)0xff2a, (q15_t)0x1,\n    (q15_t)0xff37, (q15_t)0x1,    (q15_t)0xff44, (q15_t)0x1,    (q15_t)0xff50,\n    (q15_t)0x1,    (q15_t)0xff5d, (q15_t)0x1,    (q15_t)0xff69, (q15_t)0x1,\n    (q15_t)0xff76, (q15_t)0x0,    (q15_t)0xff82, (q15_t)0x0,    (q15_t)0xff8f,\n    (q15_t)0x0,    (q15_t)0xff9b, (q15_t)0x0,    (q15_t)0xffa8, (q15_t)0x0,\n    (q15_t)0xffb5, (q15_t)0x0,    (q15_t)0xffc1, (q15_t)0x0,    (q15_t)0xffce,\n    (q15_t)0x0,    (q15_t)0xffda, (q15_t)0x0,    (q15_t)0xffe7, (q15_t)0x0,\n    (q15_t)0xfff3, (q15_t)0x0,    (q15_t)0x0,    (q15_t)0x0,    (q15_t)0xd,\n    (q15_t)0x0,    (q15_t)0x19,   (q15_t)0x0,    (q15_t)0x26,   (q15_t)0x0,\n    (q15_t)0x32,   (q15_t)0x0,    (q15_t)0x3f,   (q15_t)0x0,    (q15_t)0x4b,\n    (q15_t)0x0,    (q15_t)0x58,   (q15_t)0x0,    (q15_t)0x65,   (q15_t)0x0,\n    (q15_t)0x71,   (q15_t)0x0,    (q15_t)0x7e,   (q15_t)0x1,    (q15_t)0x8a,\n    (q15_t)0x1,    (q15_t)0x97,   (q15_t)0x1,    (q15_t)0xa3,   (q15_t)0x1,\n    (q15_t)0xb0,   (q15_t)0x1,    (q15_t)0xbc,   (q15_t)0x1,    (q15_t)0xc9,\n    (q15_t)0x1,    (q15_t)0xd6,   (q15_t)0x2,    (q15_t)0xe2,   (q15_t)0x2,\n    (q15_t)0xef,   (q15_t)0x2,    (q15_t)0xfb,   (q15_t)0x2,    (q15_t)0x108,\n    (q15_t)0x2,    (q15_t)0x114,  (q15_t)0x3,    (q15_t)0x121,  (q15_t)0x3,\n    (q15_t)0x12e,  (q15_t)0x3,    (q15_t)0x13a,  (q15_t)0x3,    (q15_t)0x147,\n    (q15_t)0x4,    (q15_t)0x153,  (q15_t)0x4,    (q15_t)0x160,  (q15_t)0x4,\n    (q15_t)0x16c,  (q15_t)0x4,    (q15_t)0x179,  (q15_t)0x5,    (q15_t)0x186,\n    (q15_t)0x5,    (q15_t)0x192,  (q15_t)0x5,    (q15_t)0x19f,  (q15_t)0x6,\n    (q15_t)0x1ab,  (q15_t)0x6,    (q15_t)0x1b8,  (q15_t)0x6,    (q15_t)0x1c4,\n    (q15_t)0x7,    (q15_t)0x1d1,  (q15_t)0x7,    (q15_t)0x1dd,  (q15_t)0x7,\n    (q15_t)0x1ea,  (q15_t)0x8,    (q15_t)0x1f7,  (q15_t)0x8,    (q15_t)0x203,\n    (q15_t)0x9,    (q15_t)0x210,  (q15_t)0x9,    (q15_t)0x21c,  (q15_t)0x9,\n    (q15_t)0x229,  (q15_t)0xa,    (q15_t)0x235,  (q15_t)0xa,    (q15_t)0x242,\n    (q15_t)0xb,    (q15_t)0x24e,  (q15_t)0xb,    (q15_t)0x25b,  (q15_t)0xc,\n    (q15_t)0x268,  (q15_t)0xc,    (q15_t)0x274,  (q15_t)0xd,    (q15_t)0x281,\n    (q15_t)0xd,    (q15_t)0x28d,  (q15_t)0xe,    (q15_t)0x29a,  (q15_t)0xe,\n    (q15_t)0x2a6,  (q15_t)0xf,    (q15_t)0x2b3,  (q15_t)0xf,    (q15_t)0x2c0,\n    (q15_t)0x10,   (q15_t)0x2cc,  (q15_t)0x10,   (q15_t)0x2d9,  (q15_t)0x11,\n    (q15_t)0x2e5,  (q15_t)0x11,   (q15_t)0x2f2,  (q15_t)0x12,   (q15_t)0x2fe,\n    (q15_t)0x13,   (q15_t)0x30b,  (q15_t)0x13,   (q15_t)0x317,  (q15_t)0x14,\n    (q15_t)0x324,  (q15_t)0x14,   (q15_t)0x330,  (q15_t)0x15,   (q15_t)0x33d,\n    (q15_t)0x16,   (q15_t)0x34a,  (q15_t)0x16,   (q15_t)0x356,  (q15_t)0x17,\n    (q15_t)0x363,  (q15_t)0x18,   (q15_t)0x36f,  (q15_t)0x18,   (q15_t)0x37c,\n    (q15_t)0x19,   (q15_t)0x388,  (q15_t)0x1a,   (q15_t)0x395,  (q15_t)0x1a,\n    (q15_t)0x3a1,  (q15_t)0x1b,   (q15_t)0x3ae,  (q15_t)0x1c,   (q15_t)0x3bb,\n    (q15_t)0x1d,   (q15_t)0x3c7,  (q15_t)0x1d,   (q15_t)0x3d4,  (q15_t)0x1e,\n    (q15_t)0x3e0,  (q15_t)0x1f,   (q15_t)0x3ed,  (q15_t)0x20,   (q15_t)0x3f9,\n    (q15_t)0x20,   (q15_t)0x406,  (q15_t)0x21,   (q15_t)0x412,  (q15_t)0x22,\n    (q15_t)0x41f,  (q15_t)0x23,   (q15_t)0x42b,  (q15_t)0x24,   (q15_t)0x438,\n    (q15_t)0x24,   (q15_t)0x444,  (q15_t)0x25,   (q15_t)0x451,  (q15_t)0x26,\n    (q15_t)0x45e,  (q15_t)0x27,   (q15_t)0x46a,  (q15_t)0x28,   (q15_t)0x477,\n    (q15_t)0x29,   (q15_t)0x483,  (q15_t)0x2a,   (q15_t)0x490,  (q15_t)0x2b,\n    (q15_t)0x49c,  (q15_t)0x2b,   (q15_t)0x4a9,  (q15_t)0x2c,   (q15_t)0x4b5,\n    (q15_t)0x2d,   (q15_t)0x4c2,  (q15_t)0x2e,   (q15_t)0x4ce,  (q15_t)0x2f,\n    (q15_t)0x4db,  (q15_t)0x30,   (q15_t)0x4e7,  (q15_t)0x31,   (q15_t)0x4f4,\n    (q15_t)0x32,   (q15_t)0x500,  (q15_t)0x33,   (q15_t)0x50d,  (q15_t)0x34,\n    (q15_t)0x51a,  (q15_t)0x35,   (q15_t)0x526,  (q15_t)0x36,   (q15_t)0x533,\n    (q15_t)0x37,   (q15_t)0x53f,  (q15_t)0x38,   (q15_t)0x54c,  (q15_t)0x39,\n    (q15_t)0x558,  (q15_t)0x3a,   (q15_t)0x565,  (q15_t)0x3b,   (q15_t)0x571,\n    (q15_t)0x3c,   (q15_t)0x57e,  (q15_t)0x3d,   (q15_t)0x58a,  (q15_t)0x3f,\n    (q15_t)0x597,  (q15_t)0x40,   (q15_t)0x5a3,  (q15_t)0x41,   (q15_t)0x5b0,\n    (q15_t)0x42,   (q15_t)0x5bc,  (q15_t)0x43,   (q15_t)0x5c9,  (q15_t)0x44,\n    (q15_t)0x5d5,  (q15_t)0x45,   (q15_t)0x5e2,  (q15_t)0x47,   (q15_t)0x5ee,\n    (q15_t)0x48,   (q15_t)0x5fb,  (q15_t)0x49,   (q15_t)0x607,  (q15_t)0x4a,\n    (q15_t)0x614,  (q15_t)0x4b,   (q15_t)0x620,  (q15_t)0x4c,   (q15_t)0x62d,\n    (q15_t)0x4e,   (q15_t)0x639,  (q15_t)0x4f,   (q15_t)0x646,  (q15_t)0x50,\n    (q15_t)0x652,  (q15_t)0x51,   (q15_t)0x65f,  (q15_t)0x53,   (q15_t)0x66b,\n    (q15_t)0x54,   (q15_t)0x678,  (q15_t)0x55,   (q15_t)0x684,  (q15_t)0x56,\n    (q15_t)0x691,  (q15_t)0x58,   (q15_t)0x69d,  (q15_t)0x59,   (q15_t)0x6aa,\n    (q15_t)0x5a,   (q15_t)0x6b6,  (q15_t)0x5c,   (q15_t)0x6c3,  (q15_t)0x5d,\n    (q15_t)0x6cf,  (q15_t)0x5e,   (q15_t)0x6dc,  (q15_t)0x60,   (q15_t)0x6e8,\n    (q15_t)0x61,   (q15_t)0x6f5,  (q15_t)0x62,   (q15_t)0x701,  (q15_t)0x64,\n    (q15_t)0x70e,  (q15_t)0x65,   (q15_t)0x71a,  (q15_t)0x67,   (q15_t)0x727,\n    (q15_t)0x68,   (q15_t)0x733,  (q15_t)0x69,   (q15_t)0x740,  (q15_t)0x6b,\n    (q15_t)0x74c,  (q15_t)0x6c,   (q15_t)0x759,  (q15_t)0x6e,   (q15_t)0x765,\n    (q15_t)0x6f,   (q15_t)0x772,  (q15_t)0x71,   (q15_t)0x77e,  (q15_t)0x72,\n    (q15_t)0x78b,  (q15_t)0x74,   (q15_t)0x797,  (q15_t)0x75,   (q15_t)0x7a4,\n    (q15_t)0x77,   (q15_t)0x7b0,  (q15_t)0x78,   (q15_t)0x7bd,  (q15_t)0x7a,\n    (q15_t)0x7c9,  (q15_t)0x7b,   (q15_t)0x7d6,  (q15_t)0x7d,   (q15_t)0x7e2,\n    (q15_t)0x7e,   (q15_t)0x7ef,  (q15_t)0x80,   (q15_t)0x7fb,  (q15_t)0x81,\n    (q15_t)0x807,  (q15_t)0x83,   (q15_t)0x814,  (q15_t)0x85,   (q15_t)0x820,\n    (q15_t)0x86,   (q15_t)0x82d,  (q15_t)0x88,   (q15_t)0x839,  (q15_t)0x89,\n    (q15_t)0x846,  (q15_t)0x8b,   (q15_t)0x852,  (q15_t)0x8d,   (q15_t)0x85f,\n    (q15_t)0x8e,   (q15_t)0x86b,  (q15_t)0x90,   (q15_t)0x878,  (q15_t)0x92,\n    (q15_t)0x884,  (q15_t)0x93,   (q15_t)0x891,  (q15_t)0x95,   (q15_t)0x89d,\n    (q15_t)0x97,   (q15_t)0x8a9,  (q15_t)0x98,   (q15_t)0x8b6,  (q15_t)0x9a,\n    (q15_t)0x8c2,  (q15_t)0x9c,   (q15_t)0x8cf,  (q15_t)0x9e,   (q15_t)0x8db,\n    (q15_t)0x9f,   (q15_t)0x8e8,  (q15_t)0xa1,   (q15_t)0x8f4,  (q15_t)0xa3,\n    (q15_t)0x901,  (q15_t)0xa5,   (q15_t)0x90d,  (q15_t)0xa6,   (q15_t)0x919,\n    (q15_t)0xa8,   (q15_t)0x926,  (q15_t)0xaa,   (q15_t)0x932,  (q15_t)0xac,\n    (q15_t)0x93f,  (q15_t)0xae,   (q15_t)0x94b,  (q15_t)0xaf,   (q15_t)0x958,\n    (q15_t)0xb1,   (q15_t)0x964,  (q15_t)0xb3,   (q15_t)0x970,  (q15_t)0xb5,\n    (q15_t)0x97d,  (q15_t)0xb7,   (q15_t)0x989,  (q15_t)0xb9,   (q15_t)0x996,\n    (q15_t)0xbb,   (q15_t)0x9a2,  (q15_t)0xbd,   (q15_t)0x9af,  (q15_t)0xbe,\n    (q15_t)0x9bb,  (q15_t)0xc0,   (q15_t)0x9c7,  (q15_t)0xc2,   (q15_t)0x9d4,\n    (q15_t)0xc4,   (q15_t)0x9e0,  (q15_t)0xc6,   (q15_t)0x9ed,  (q15_t)0xc8,\n    (q15_t)0x9f9,  (q15_t)0xca,   (q15_t)0xa06,  (q15_t)0xcc,   (q15_t)0xa12,\n    (q15_t)0xce,   (q15_t)0xa1e,  (q15_t)0xd0,   (q15_t)0xa2b,  (q15_t)0xd2,\n    (q15_t)0xa37,  (q15_t)0xd4,   (q15_t)0xa44,  (q15_t)0xd6,   (q15_t)0xa50,\n    (q15_t)0xd8,   (q15_t)0xa5c,  (q15_t)0xda,   (q15_t)0xa69,  (q15_t)0xdc,\n    (q15_t)0xa75,  (q15_t)0xde,   (q15_t)0xa82,  (q15_t)0xe0,   (q15_t)0xa8e,\n    (q15_t)0xe2,   (q15_t)0xa9a,  (q15_t)0xe4,   (q15_t)0xaa7,  (q15_t)0xe7,\n    (q15_t)0xab3,  (q15_t)0xe9,   (q15_t)0xac0,  (q15_t)0xeb,   (q15_t)0xacc,\n    (q15_t)0xed,   (q15_t)0xad8,  (q15_t)0xef,   (q15_t)0xae5,  (q15_t)0xf1,\n    (q15_t)0xaf1,  (q15_t)0xf3,   (q15_t)0xafd,  (q15_t)0xf6,   (q15_t)0xb0a,\n    (q15_t)0xf8,   (q15_t)0xb16,  (q15_t)0xfa,   (q15_t)0xb23,  (q15_t)0xfc,\n    (q15_t)0xb2f,  (q15_t)0xfe,   (q15_t)0xb3b,  (q15_t)0x100,  (q15_t)0xb48,\n    (q15_t)0x103,  (q15_t)0xb54,  (q15_t)0x105,  (q15_t)0xb60,  (q15_t)0x107,\n    (q15_t)0xb6d,  (q15_t)0x109,  (q15_t)0xb79,  (q15_t)0x10c,  (q15_t)0xb85,\n    (q15_t)0x10e,  (q15_t)0xb92,  (q15_t)0x110,  (q15_t)0xb9e,  (q15_t)0x113,\n    (q15_t)0xbab,  (q15_t)0x115,  (q15_t)0xbb7,  (q15_t)0x117,  (q15_t)0xbc3,\n    (q15_t)0x119,  (q15_t)0xbd0,  (q15_t)0x11c,  (q15_t)0xbdc,  (q15_t)0x11e,\n    (q15_t)0xbe8,  (q15_t)0x120,  (q15_t)0xbf5,  (q15_t)0x123,  (q15_t)0xc01,\n    (q15_t)0x125,  (q15_t)0xc0d,  (q15_t)0x128,  (q15_t)0xc1a,  (q15_t)0x12a,\n    (q15_t)0xc26,  (q15_t)0x12c,  (q15_t)0xc32,  (q15_t)0x12f,  (q15_t)0xc3f,\n    (q15_t)0x131,  (q15_t)0xc4b,  (q15_t)0x134,  (q15_t)0xc57,  (q15_t)0x136,\n    (q15_t)0xc64,  (q15_t)0x138,  (q15_t)0xc70,  (q15_t)0x13b,  (q15_t)0xc7c,\n    (q15_t)0x13d,  (q15_t)0xc89,  (q15_t)0x140,  (q15_t)0xc95,  (q15_t)0x142,\n    (q15_t)0xca1,  (q15_t)0x145,  (q15_t)0xcae,  (q15_t)0x147,  (q15_t)0xcba,\n    (q15_t)0x14a,  (q15_t)0xcc6,  (q15_t)0x14c,  (q15_t)0xcd3,  (q15_t)0x14f,\n    (q15_t)0xcdf,  (q15_t)0x151,  (q15_t)0xceb,  (q15_t)0x154,  (q15_t)0xcf8,\n    (q15_t)0x156,  (q15_t)0xd04,  (q15_t)0x159,  (q15_t)0xd10,  (q15_t)0x15b,\n    (q15_t)0xd1c,  (q15_t)0x15e,  (q15_t)0xd29,  (q15_t)0x161,  (q15_t)0xd35,\n    (q15_t)0x163,  (q15_t)0xd41,  (q15_t)0x166,  (q15_t)0xd4e,  (q15_t)0x168,\n    (q15_t)0xd5a,  (q15_t)0x16b,  (q15_t)0xd66,  (q15_t)0x16e,  (q15_t)0xd72,\n    (q15_t)0x170,  (q15_t)0xd7f,  (q15_t)0x173,  (q15_t)0xd8b,  (q15_t)0x176,\n    (q15_t)0xd97,  (q15_t)0x178,  (q15_t)0xda4,  (q15_t)0x17b,  (q15_t)0xdb0,\n    (q15_t)0x17e,  (q15_t)0xdbc,  (q15_t)0x180,  (q15_t)0xdc8,  (q15_t)0x183,\n    (q15_t)0xdd5,  (q15_t)0x186,  (q15_t)0xde1,  (q15_t)0x189,  (q15_t)0xded,\n    (q15_t)0x18b,  (q15_t)0xdf9,  (q15_t)0x18e,  (q15_t)0xe06,  (q15_t)0x191,\n    (q15_t)0xe12,  (q15_t)0x194,  (q15_t)0xe1e,  (q15_t)0x196,  (q15_t)0xe2b,\n    (q15_t)0x199,  (q15_t)0xe37,  (q15_t)0x19c,  (q15_t)0xe43,  (q15_t)0x19f,\n    (q15_t)0xe4f,  (q15_t)0x1a2,  (q15_t)0xe5c,  (q15_t)0x1a4,  (q15_t)0xe68,\n    (q15_t)0x1a7,  (q15_t)0xe74,  (q15_t)0x1aa,  (q15_t)0xe80,  (q15_t)0x1ad,\n    (q15_t)0xe8c,  (q15_t)0x1b0,  (q15_t)0xe99,  (q15_t)0x1b3,  (q15_t)0xea5,\n    (q15_t)0x1b6,  (q15_t)0xeb1,  (q15_t)0x1b8,  (q15_t)0xebd,  (q15_t)0x1bb,\n    (q15_t)0xeca,  (q15_t)0x1be,  (q15_t)0xed6,  (q15_t)0x1c1,  (q15_t)0xee2,\n    (q15_t)0x1c4,  (q15_t)0xeee,  (q15_t)0x1c7,  (q15_t)0xefb,  (q15_t)0x1ca,\n    (q15_t)0xf07,  (q15_t)0x1cd,  (q15_t)0xf13,  (q15_t)0x1d0,  (q15_t)0xf1f,\n    (q15_t)0x1d3,  (q15_t)0xf2b,  (q15_t)0x1d6,  (q15_t)0xf38,  (q15_t)0x1d9,\n    (q15_t)0xf44,  (q15_t)0x1dc,  (q15_t)0xf50,  (q15_t)0x1df,  (q15_t)0xf5c,\n    (q15_t)0x1e2,  (q15_t)0xf68,  (q15_t)0x1e5,  (q15_t)0xf75,  (q15_t)0x1e8,\n    (q15_t)0xf81,  (q15_t)0x1eb,  (q15_t)0xf8d,  (q15_t)0x1ee,  (q15_t)0xf99,\n    (q15_t)0x1f1,  (q15_t)0xfa5,  (q15_t)0x1f4,  (q15_t)0xfb2,  (q15_t)0x1f7,\n    (q15_t)0xfbe,  (q15_t)0x1fa,  (q15_t)0xfca,  (q15_t)0x1fd,  (q15_t)0xfd6,\n    (q15_t)0x201,  (q15_t)0xfe2,  (q15_t)0x204,  (q15_t)0xfee,  (q15_t)0x207,\n    (q15_t)0xffb,  (q15_t)0x20a,  (q15_t)0x1007, (q15_t)0x20d,  (q15_t)0x1013,\n    (q15_t)0x210,  (q15_t)0x101f, (q15_t)0x213,  (q15_t)0x102b, (q15_t)0x217,\n    (q15_t)0x1037, (q15_t)0x21a,  (q15_t)0x1044, (q15_t)0x21d,  (q15_t)0x1050,\n    (q15_t)0x220,  (q15_t)0x105c, (q15_t)0x223,  (q15_t)0x1068, (q15_t)0x227,\n    (q15_t)0x1074, (q15_t)0x22a,  (q15_t)0x1080, (q15_t)0x22d,  (q15_t)0x108c,\n    (q15_t)0x230,  (q15_t)0x1099, (q15_t)0x234,  (q15_t)0x10a5, (q15_t)0x237,\n    (q15_t)0x10b1, (q15_t)0x23a,  (q15_t)0x10bd, (q15_t)0x23e,  (q15_t)0x10c9,\n    (q15_t)0x241,  (q15_t)0x10d5, (q15_t)0x244,  (q15_t)0x10e1, (q15_t)0x247,\n    (q15_t)0x10ed, (q15_t)0x24b,  (q15_t)0x10fa, (q15_t)0x24e,  (q15_t)0x1106,\n    (q15_t)0x251,  (q15_t)0x1112, (q15_t)0x255,  (q15_t)0x111e, (q15_t)0x258,\n    (q15_t)0x112a, (q15_t)0x25c,  (q15_t)0x1136, (q15_t)0x25f,  (q15_t)0x1142,\n    (q15_t)0x262,  (q15_t)0x114e, (q15_t)0x266,  (q15_t)0x115a, (q15_t)0x269,\n    (q15_t)0x1167, (q15_t)0x26d,  (q15_t)0x1173, (q15_t)0x270,  (q15_t)0x117f,\n    (q15_t)0x273,  (q15_t)0x118b, (q15_t)0x277,  (q15_t)0x1197, (q15_t)0x27a,\n    (q15_t)0x11a3, (q15_t)0x27e,  (q15_t)0x11af, (q15_t)0x281,  (q15_t)0x11bb,\n    (q15_t)0x285,  (q15_t)0x11c7, (q15_t)0x288,  (q15_t)0x11d3, (q15_t)0x28c,\n    (q15_t)0x11df, (q15_t)0x28f,  (q15_t)0x11eb, (q15_t)0x293,  (q15_t)0x11f7,\n    (q15_t)0x296,  (q15_t)0x1204, (q15_t)0x29a,  (q15_t)0x1210, (q15_t)0x29d,\n    (q15_t)0x121c, (q15_t)0x2a1,  (q15_t)0x1228, (q15_t)0x2a5,  (q15_t)0x1234,\n    (q15_t)0x2a8,  (q15_t)0x1240, (q15_t)0x2ac,  (q15_t)0x124c, (q15_t)0x2af,\n    (q15_t)0x1258, (q15_t)0x2b3,  (q15_t)0x1264, (q15_t)0x2b7,  (q15_t)0x1270,\n    (q15_t)0x2ba,  (q15_t)0x127c, (q15_t)0x2be,  (q15_t)0x1288, (q15_t)0x2c1,\n    (q15_t)0x1294, (q15_t)0x2c5,  (q15_t)0x12a0, (q15_t)0x2c9,  (q15_t)0x12ac,\n    (q15_t)0x2cc,  (q15_t)0x12b8, (q15_t)0x2d0,  (q15_t)0x12c4, (q15_t)0x2d4,\n    (q15_t)0x12d0, (q15_t)0x2d8,  (q15_t)0x12dc, (q15_t)0x2db,  (q15_t)0x12e8,\n    (q15_t)0x2df,  (q15_t)0x12f4, (q15_t)0x2e3,  (q15_t)0x1300, (q15_t)0x2e6,\n    (q15_t)0x130c, (q15_t)0x2ea,  (q15_t)0x1318, (q15_t)0x2ee,  (q15_t)0x1324,\n    (q15_t)0x2f2,  (q15_t)0x1330, (q15_t)0x2f5,  (q15_t)0x133c, (q15_t)0x2f9,\n    (q15_t)0x1348, (q15_t)0x2fd,  (q15_t)0x1354, (q15_t)0x301,  (q15_t)0x1360,\n    (q15_t)0x305,  (q15_t)0x136c, (q15_t)0x308,  (q15_t)0x1378, (q15_t)0x30c,\n    (q15_t)0x1384, (q15_t)0x310,  (q15_t)0x1390, (q15_t)0x314,  (q15_t)0x139c,\n    (q15_t)0x318,  (q15_t)0x13a8, (q15_t)0x31c,  (q15_t)0x13b4, (q15_t)0x320,\n    (q15_t)0x13c0, (q15_t)0x323,  (q15_t)0x13cc, (q15_t)0x327,  (q15_t)0x13d8,\n    (q15_t)0x32b,  (q15_t)0x13e4, (q15_t)0x32f,  (q15_t)0x13f0, (q15_t)0x333,\n    (q15_t)0x13fb, (q15_t)0x337,  (q15_t)0x1407, (q15_t)0x33b,  (q15_t)0x1413,\n    (q15_t)0x33f,  (q15_t)0x141f, (q15_t)0x343,  (q15_t)0x142b, (q15_t)0x347,\n    (q15_t)0x1437, (q15_t)0x34b,  (q15_t)0x1443, (q15_t)0x34f,  (q15_t)0x144f,\n    (q15_t)0x353,  (q15_t)0x145b, (q15_t)0x357,  (q15_t)0x1467, (q15_t)0x35b,\n    (q15_t)0x1473, (q15_t)0x35f,  (q15_t)0x147f, (q15_t)0x363,  (q15_t)0x148b,\n    (q15_t)0x367,  (q15_t)0x1496, (q15_t)0x36b,  (q15_t)0x14a2, (q15_t)0x36f,\n    (q15_t)0x14ae, (q15_t)0x373,  (q15_t)0x14ba, (q15_t)0x377,  (q15_t)0x14c6,\n    (q15_t)0x37b,  (q15_t)0x14d2, (q15_t)0x37f,  (q15_t)0x14de, (q15_t)0x383,\n    (q15_t)0x14ea, (q15_t)0x387,  (q15_t)0x14f6, (q15_t)0x38c,  (q15_t)0x1501,\n    (q15_t)0x390,  (q15_t)0x150d, (q15_t)0x394,  (q15_t)0x1519, (q15_t)0x398,\n    (q15_t)0x1525, (q15_t)0x39c,  (q15_t)0x1531, (q15_t)0x3a0,  (q15_t)0x153d,\n    (q15_t)0x3a5,  (q15_t)0x1549, (q15_t)0x3a9,  (q15_t)0x1554, (q15_t)0x3ad,\n    (q15_t)0x1560, (q15_t)0x3b1,  (q15_t)0x156c, (q15_t)0x3b5,  (q15_t)0x1578,\n    (q15_t)0x3ba,  (q15_t)0x1584, (q15_t)0x3be,  (q15_t)0x1590, (q15_t)0x3c2,\n    (q15_t)0x159b, (q15_t)0x3c6,  (q15_t)0x15a7, (q15_t)0x3ca,  (q15_t)0x15b3,\n    (q15_t)0x3cf,  (q15_t)0x15bf, (q15_t)0x3d3,  (q15_t)0x15cb, (q15_t)0x3d7,\n    (q15_t)0x15d7, (q15_t)0x3dc,  (q15_t)0x15e2, (q15_t)0x3e0,  (q15_t)0x15ee,\n    (q15_t)0x3e4,  (q15_t)0x15fa, (q15_t)0x3e9,  (q15_t)0x1606, (q15_t)0x3ed,\n    (q15_t)0x1612, (q15_t)0x3f1,  (q15_t)0x161d, (q15_t)0x3f6,  (q15_t)0x1629,\n    (q15_t)0x3fa,  (q15_t)0x1635, (q15_t)0x3fe,  (q15_t)0x1641, (q15_t)0x403,\n    (q15_t)0x164c, (q15_t)0x407,  (q15_t)0x1658, (q15_t)0x40b,  (q15_t)0x1664,\n    (q15_t)0x410,  (q15_t)0x1670, (q15_t)0x414,  (q15_t)0x167c, (q15_t)0x419,\n    (q15_t)0x1687, (q15_t)0x41d,  (q15_t)0x1693, (q15_t)0x422,  (q15_t)0x169f,\n    (q15_t)0x426,  (q15_t)0x16ab, (q15_t)0x42a,  (q15_t)0x16b6, (q15_t)0x42f,\n    (q15_t)0x16c2, (q15_t)0x433,  (q15_t)0x16ce, (q15_t)0x438,  (q15_t)0x16da,\n    (q15_t)0x43c,  (q15_t)0x16e5, (q15_t)0x441,  (q15_t)0x16f1, (q15_t)0x445,\n    (q15_t)0x16fd, (q15_t)0x44a,  (q15_t)0x1709, (q15_t)0x44e,  (q15_t)0x1714,\n    (q15_t)0x453,  (q15_t)0x1720, (q15_t)0x457,  (q15_t)0x172c, (q15_t)0x45c,\n    (q15_t)0x1737, (q15_t)0x461,  (q15_t)0x1743, (q15_t)0x465,  (q15_t)0x174f,\n    (q15_t)0x46a,  (q15_t)0x175b, (q15_t)0x46e,  (q15_t)0x1766, (q15_t)0x473,\n    (q15_t)0x1772, (q15_t)0x478,  (q15_t)0x177e, (q15_t)0x47c,  (q15_t)0x1789,\n    (q15_t)0x481,  (q15_t)0x1795, (q15_t)0x485,  (q15_t)0x17a1, (q15_t)0x48a,\n    (q15_t)0x17ac, (q15_t)0x48f,  (q15_t)0x17b8, (q15_t)0x493,  (q15_t)0x17c4,\n    (q15_t)0x498,  (q15_t)0x17cf, (q15_t)0x49d,  (q15_t)0x17db, (q15_t)0x4a1,\n    (q15_t)0x17e7, (q15_t)0x4a6,  (q15_t)0x17f2, (q15_t)0x4ab,  (q15_t)0x17fe,\n    (q15_t)0x4b0,  (q15_t)0x180a, (q15_t)0x4b4,  (q15_t)0x1815, (q15_t)0x4b9,\n    (q15_t)0x1821, (q15_t)0x4be,  (q15_t)0x182d, (q15_t)0x4c2,  (q15_t)0x1838,\n    (q15_t)0x4c7,  (q15_t)0x1844, (q15_t)0x4cc,  (q15_t)0x184f, (q15_t)0x4d1,\n    (q15_t)0x185b, (q15_t)0x4d6,  (q15_t)0x1867, (q15_t)0x4da,  (q15_t)0x1872,\n    (q15_t)0x4df,  (q15_t)0x187e, (q15_t)0x4e4,  (q15_t)0x1889, (q15_t)0x4e9,\n    (q15_t)0x1895, (q15_t)0x4ee,  (q15_t)0x18a1, (q15_t)0x4f2,  (q15_t)0x18ac,\n    (q15_t)0x4f7,  (q15_t)0x18b8, (q15_t)0x4fc,  (q15_t)0x18c3, (q15_t)0x501,\n    (q15_t)0x18cf, (q15_t)0x506,  (q15_t)0x18db, (q15_t)0x50b,  (q15_t)0x18e6,\n    (q15_t)0x510,  (q15_t)0x18f2, (q15_t)0x515,  (q15_t)0x18fd, (q15_t)0x51a,\n    (q15_t)0x1909, (q15_t)0x51e,  (q15_t)0x1914, (q15_t)0x523,  (q15_t)0x1920,\n    (q15_t)0x528,  (q15_t)0x192c, (q15_t)0x52d,  (q15_t)0x1937, (q15_t)0x532,\n    (q15_t)0x1943, (q15_t)0x537,  (q15_t)0x194e, (q15_t)0x53c,  (q15_t)0x195a,\n    (q15_t)0x541,  (q15_t)0x1965, (q15_t)0x546,  (q15_t)0x1971, (q15_t)0x54b,\n    (q15_t)0x197c, (q15_t)0x550,  (q15_t)0x1988, (q15_t)0x555,  (q15_t)0x1993,\n    (q15_t)0x55a,  (q15_t)0x199f, (q15_t)0x55f,  (q15_t)0x19aa, (q15_t)0x564,\n    (q15_t)0x19b6, (q15_t)0x569,  (q15_t)0x19c1, (q15_t)0x56e,  (q15_t)0x19cd,\n    (q15_t)0x573,  (q15_t)0x19d8, (q15_t)0x578,  (q15_t)0x19e4, (q15_t)0x57e,\n    (q15_t)0x19ef, (q15_t)0x583,  (q15_t)0x19fb, (q15_t)0x588,  (q15_t)0x1a06,\n    (q15_t)0x58d,  (q15_t)0x1a12, (q15_t)0x592,  (q15_t)0x1a1d, (q15_t)0x597,\n    (q15_t)0x1a29, (q15_t)0x59c,  (q15_t)0x1a34, (q15_t)0x5a1,  (q15_t)0x1a40,\n    (q15_t)0x5a7,  (q15_t)0x1a4b, (q15_t)0x5ac,  (q15_t)0x1a57, (q15_t)0x5b1,\n    (q15_t)0x1a62, (q15_t)0x5b6,  (q15_t)0x1a6e, (q15_t)0x5bb,  (q15_t)0x1a79,\n    (q15_t)0x5c1,  (q15_t)0x1a84, (q15_t)0x5c6,  (q15_t)0x1a90, (q15_t)0x5cb,\n    (q15_t)0x1a9b, (q15_t)0x5d0,  (q15_t)0x1aa7, (q15_t)0x5d5,  (q15_t)0x1ab2,\n    (q15_t)0x5db,  (q15_t)0x1abe, (q15_t)0x5e0,  (q15_t)0x1ac9, (q15_t)0x5e5,\n    (q15_t)0x1ad4, (q15_t)0x5ea,  (q15_t)0x1ae0, (q15_t)0x5f0,  (q15_t)0x1aeb,\n    (q15_t)0x5f5,  (q15_t)0x1af7, (q15_t)0x5fa,  (q15_t)0x1b02, (q15_t)0x600,\n    (q15_t)0x1b0d, (q15_t)0x605,  (q15_t)0x1b19, (q15_t)0x60a,  (q15_t)0x1b24,\n    (q15_t)0x610,  (q15_t)0x1b30, (q15_t)0x615,  (q15_t)0x1b3b, (q15_t)0x61a,\n    (q15_t)0x1b46, (q15_t)0x620,  (q15_t)0x1b52, (q15_t)0x625,  (q15_t)0x1b5d,\n    (q15_t)0x62a,  (q15_t)0x1b68, (q15_t)0x630,  (q15_t)0x1b74, (q15_t)0x635,\n    (q15_t)0x1b7f, (q15_t)0x63b,  (q15_t)0x1b8a, (q15_t)0x640,  (q15_t)0x1b96,\n    (q15_t)0x645,  (q15_t)0x1ba1, (q15_t)0x64b,  (q15_t)0x1bac, (q15_t)0x650,\n    (q15_t)0x1bb8, (q15_t)0x656,  (q15_t)0x1bc3, (q15_t)0x65b,  (q15_t)0x1bce,\n    (q15_t)0x661,  (q15_t)0x1bda, (q15_t)0x666,  (q15_t)0x1be5, (q15_t)0x66c,\n    (q15_t)0x1bf0, (q15_t)0x671,  (q15_t)0x1bfc, (q15_t)0x677,  (q15_t)0x1c07,\n    (q15_t)0x67c,  (q15_t)0x1c12, (q15_t)0x682,  (q15_t)0x1c1e, (q15_t)0x687,\n    (q15_t)0x1c29, (q15_t)0x68d,  (q15_t)0x1c34, (q15_t)0x692,  (q15_t)0x1c3f,\n    (q15_t)0x698,  (q15_t)0x1c4b, (q15_t)0x69d,  (q15_t)0x1c56, (q15_t)0x6a3,\n    (q15_t)0x1c61, (q15_t)0x6a8,  (q15_t)0x1c6c, (q15_t)0x6ae,  (q15_t)0x1c78,\n    (q15_t)0x6b4,  (q15_t)0x1c83, (q15_t)0x6b9,  (q15_t)0x1c8e, (q15_t)0x6bf,\n    (q15_t)0x1c99, (q15_t)0x6c5,  (q15_t)0x1ca5, (q15_t)0x6ca,  (q15_t)0x1cb0,\n    (q15_t)0x6d0,  (q15_t)0x1cbb, (q15_t)0x6d5,  (q15_t)0x1cc6, (q15_t)0x6db,\n    (q15_t)0x1cd2, (q15_t)0x6e1,  (q15_t)0x1cdd, (q15_t)0x6e6,  (q15_t)0x1ce8,\n    (q15_t)0x6ec,  (q15_t)0x1cf3, (q15_t)0x6f2,  (q15_t)0x1cff, (q15_t)0x6f7,\n    (q15_t)0x1d0a, (q15_t)0x6fd,  (q15_t)0x1d15, (q15_t)0x703,  (q15_t)0x1d20,\n    (q15_t)0x709,  (q15_t)0x1d2b, (q15_t)0x70e,  (q15_t)0x1d36, (q15_t)0x714,\n    (q15_t)0x1d42, (q15_t)0x71a,  (q15_t)0x1d4d, (q15_t)0x720,  (q15_t)0x1d58,\n    (q15_t)0x725,  (q15_t)0x1d63, (q15_t)0x72b,  (q15_t)0x1d6e, (q15_t)0x731,\n    (q15_t)0x1d79, (q15_t)0x737,  (q15_t)0x1d85, (q15_t)0x73d,  (q15_t)0x1d90,\n    (q15_t)0x742,  (q15_t)0x1d9b, (q15_t)0x748,  (q15_t)0x1da6, (q15_t)0x74e,\n    (q15_t)0x1db1, (q15_t)0x754,  (q15_t)0x1dbc, (q15_t)0x75a,  (q15_t)0x1dc7,\n    (q15_t)0x75f,  (q15_t)0x1dd3, (q15_t)0x765,  (q15_t)0x1dde, (q15_t)0x76b,\n    (q15_t)0x1de9, (q15_t)0x771,  (q15_t)0x1df4, (q15_t)0x777,  (q15_t)0x1dff,\n    (q15_t)0x77d,  (q15_t)0x1e0a, (q15_t)0x783,  (q15_t)0x1e15, (q15_t)0x789,\n    (q15_t)0x1e20, (q15_t)0x78f,  (q15_t)0x1e2b, (q15_t)0x795,  (q15_t)0x1e36,\n    (q15_t)0x79a,  (q15_t)0x1e42, (q15_t)0x7a0,  (q15_t)0x1e4d, (q15_t)0x7a6,\n    (q15_t)0x1e58, (q15_t)0x7ac,  (q15_t)0x1e63, (q15_t)0x7b2,  (q15_t)0x1e6e,\n    (q15_t)0x7b8,  (q15_t)0x1e79, (q15_t)0x7be,  (q15_t)0x1e84, (q15_t)0x7c4,\n    (q15_t)0x1e8f, (q15_t)0x7ca,  (q15_t)0x1e9a, (q15_t)0x7d0,  (q15_t)0x1ea5,\n    (q15_t)0x7d6,  (q15_t)0x1eb0, (q15_t)0x7dc,  (q15_t)0x1ebb, (q15_t)0x7e2,\n    (q15_t)0x1ec6, (q15_t)0x7e8,  (q15_t)0x1ed1, (q15_t)0x7ee,  (q15_t)0x1edc,\n    (q15_t)0x7f5,  (q15_t)0x1ee7, (q15_t)0x7fb,  (q15_t)0x1ef2, (q15_t)0x801,\n    (q15_t)0x1efd, (q15_t)0x807,  (q15_t)0x1f08, (q15_t)0x80d,  (q15_t)0x1f13,\n    (q15_t)0x813,  (q15_t)0x1f1e, (q15_t)0x819,  (q15_t)0x1f29, (q15_t)0x81f,\n    (q15_t)0x1f34, (q15_t)0x825,  (q15_t)0x1f3f, (q15_t)0x82b,  (q15_t)0x1f4a,\n    (q15_t)0x832,  (q15_t)0x1f55, (q15_t)0x838,  (q15_t)0x1f60, (q15_t)0x83e,\n    (q15_t)0x1f6b, (q15_t)0x844,  (q15_t)0x1f76, (q15_t)0x84a,  (q15_t)0x1f81,\n    (q15_t)0x850,  (q15_t)0x1f8c, (q15_t)0x857,  (q15_t)0x1f97, (q15_t)0x85d,\n    (q15_t)0x1fa2, (q15_t)0x863,  (q15_t)0x1fac, (q15_t)0x869,  (q15_t)0x1fb7,\n    (q15_t)0x870,  (q15_t)0x1fc2, (q15_t)0x876,  (q15_t)0x1fcd, (q15_t)0x87c,\n    (q15_t)0x1fd8, (q15_t)0x882,  (q15_t)0x1fe3, (q15_t)0x889,  (q15_t)0x1fee,\n    (q15_t)0x88f,  (q15_t)0x1ff9, (q15_t)0x895,  (q15_t)0x2004, (q15_t)0x89b,\n    (q15_t)0x200f, (q15_t)0x8a2,  (q15_t)0x2019, (q15_t)0x8a8,  (q15_t)0x2024,\n    (q15_t)0x8ae,  (q15_t)0x202f, (q15_t)0x8b5,  (q15_t)0x203a, (q15_t)0x8bb,\n    (q15_t)0x2045, (q15_t)0x8c1,  (q15_t)0x2050, (q15_t)0x8c8,  (q15_t)0x205b,\n    (q15_t)0x8ce,  (q15_t)0x2065, (q15_t)0x8d4,  (q15_t)0x2070, (q15_t)0x8db,\n    (q15_t)0x207b, (q15_t)0x8e1,  (q15_t)0x2086, (q15_t)0x8e8,  (q15_t)0x2091,\n    (q15_t)0x8ee,  (q15_t)0x209b, (q15_t)0x8f4,  (q15_t)0x20a6, (q15_t)0x8fb,\n    (q15_t)0x20b1, (q15_t)0x901,  (q15_t)0x20bc, (q15_t)0x908,  (q15_t)0x20c7,\n    (q15_t)0x90e,  (q15_t)0x20d1, (q15_t)0x915,  (q15_t)0x20dc, (q15_t)0x91b,\n    (q15_t)0x20e7, (q15_t)0x921,  (q15_t)0x20f2, (q15_t)0x928,  (q15_t)0x20fd,\n    (q15_t)0x92e,  (q15_t)0x2107, (q15_t)0x935,  (q15_t)0x2112, (q15_t)0x93b,\n    (q15_t)0x211d, (q15_t)0x942,  (q15_t)0x2128, (q15_t)0x948,  (q15_t)0x2132,\n    (q15_t)0x94f,  (q15_t)0x213d, (q15_t)0x955,  (q15_t)0x2148, (q15_t)0x95c,\n    (q15_t)0x2153, (q15_t)0x963,  (q15_t)0x215d, (q15_t)0x969,  (q15_t)0x2168,\n    (q15_t)0x970,  (q15_t)0x2173, (q15_t)0x976,  (q15_t)0x217d, (q15_t)0x97d,\n    (q15_t)0x2188, (q15_t)0x983,  (q15_t)0x2193, (q15_t)0x98a,  (q15_t)0x219e,\n    (q15_t)0x991,  (q15_t)0x21a8, (q15_t)0x997,  (q15_t)0x21b3, (q15_t)0x99e,\n    (q15_t)0x21be, (q15_t)0x9a4,  (q15_t)0x21c8, (q15_t)0x9ab,  (q15_t)0x21d3,\n    (q15_t)0x9b2,  (q15_t)0x21de, (q15_t)0x9b8,  (q15_t)0x21e8, (q15_t)0x9bf,\n    (q15_t)0x21f3, (q15_t)0x9c6,  (q15_t)0x21fe, (q15_t)0x9cc,  (q15_t)0x2208,\n    (q15_t)0x9d3,  (q15_t)0x2213, (q15_t)0x9da,  (q15_t)0x221e, (q15_t)0x9e0,\n    (q15_t)0x2228, (q15_t)0x9e7,  (q15_t)0x2233, (q15_t)0x9ee,  (q15_t)0x223d,\n    (q15_t)0x9f5,  (q15_t)0x2248, (q15_t)0x9fb,  (q15_t)0x2253, (q15_t)0xa02,\n    (q15_t)0x225d, (q15_t)0xa09,  (q15_t)0x2268, (q15_t)0xa10,  (q15_t)0x2272,\n    (q15_t)0xa16,  (q15_t)0x227d, (q15_t)0xa1d,  (q15_t)0x2288, (q15_t)0xa24,\n    (q15_t)0x2292, (q15_t)0xa2b,  (q15_t)0x229d, (q15_t)0xa32,  (q15_t)0x22a7,\n    (q15_t)0xa38,  (q15_t)0x22b2, (q15_t)0xa3f,  (q15_t)0x22bc, (q15_t)0xa46,\n    (q15_t)0x22c7, (q15_t)0xa4d,  (q15_t)0x22d2, (q15_t)0xa54,  (q15_t)0x22dc,\n    (q15_t)0xa5b,  (q15_t)0x22e7, (q15_t)0xa61,  (q15_t)0x22f1, (q15_t)0xa68,\n    (q15_t)0x22fc, (q15_t)0xa6f,  (q15_t)0x2306, (q15_t)0xa76,  (q15_t)0x2311,\n    (q15_t)0xa7d,  (q15_t)0x231b, (q15_t)0xa84,  (q15_t)0x2326, (q15_t)0xa8b,\n    (q15_t)0x2330, (q15_t)0xa92,  (q15_t)0x233b, (q15_t)0xa99,  (q15_t)0x2345,\n    (q15_t)0xa9f,  (q15_t)0x2350, (q15_t)0xaa6,  (q15_t)0x235a, (q15_t)0xaad,\n    (q15_t)0x2365, (q15_t)0xab4,  (q15_t)0x236f, (q15_t)0xabb,  (q15_t)0x237a,\n    (q15_t)0xac2,  (q15_t)0x2384, (q15_t)0xac9,  (q15_t)0x238e, (q15_t)0xad0,\n    (q15_t)0x2399, (q15_t)0xad7,  (q15_t)0x23a3, (q15_t)0xade,  (q15_t)0x23ae,\n    (q15_t)0xae5,  (q15_t)0x23b8, (q15_t)0xaec,  (q15_t)0x23c3, (q15_t)0xaf3,\n    (q15_t)0x23cd, (q15_t)0xafa,  (q15_t)0x23d7, (q15_t)0xb01,  (q15_t)0x23e2,\n    (q15_t)0xb08,  (q15_t)0x23ec, (q15_t)0xb0f,  (q15_t)0x23f7, (q15_t)0xb16,\n    (q15_t)0x2401, (q15_t)0xb1e,  (q15_t)0x240b, (q15_t)0xb25,  (q15_t)0x2416,\n    (q15_t)0xb2c,  (q15_t)0x2420, (q15_t)0xb33,  (q15_t)0x242b, (q15_t)0xb3a,\n    (q15_t)0x2435, (q15_t)0xb41,  (q15_t)0x243f, (q15_t)0xb48,  (q15_t)0x244a,\n    (q15_t)0xb4f,  (q15_t)0x2454, (q15_t)0xb56,  (q15_t)0x245e, (q15_t)0xb5e,\n    (q15_t)0x2469, (q15_t)0xb65,  (q15_t)0x2473, (q15_t)0xb6c,  (q15_t)0x247d,\n    (q15_t)0xb73,  (q15_t)0x2488, (q15_t)0xb7a,  (q15_t)0x2492, (q15_t)0xb81,\n    (q15_t)0x249c, (q15_t)0xb89,  (q15_t)0x24a7, (q15_t)0xb90,  (q15_t)0x24b1,\n    (q15_t)0xb97,  (q15_t)0x24bb, (q15_t)0xb9e,  (q15_t)0x24c5, (q15_t)0xba5,\n    (q15_t)0x24d0, (q15_t)0xbad,  (q15_t)0x24da, (q15_t)0xbb4,  (q15_t)0x24e4,\n    (q15_t)0xbbb,  (q15_t)0x24ef, (q15_t)0xbc2,  (q15_t)0x24f9, (q15_t)0xbca,\n    (q15_t)0x2503, (q15_t)0xbd1,  (q15_t)0x250d, (q15_t)0xbd8,  (q15_t)0x2518,\n    (q15_t)0xbe0,  (q15_t)0x2522, (q15_t)0xbe7,  (q15_t)0x252c, (q15_t)0xbee,\n    (q15_t)0x2536, (q15_t)0xbf5,  (q15_t)0x2541, (q15_t)0xbfd,  (q15_t)0x254b,\n    (q15_t)0xc04,  (q15_t)0x2555, (q15_t)0xc0b,  (q15_t)0x255f, (q15_t)0xc13,\n    (q15_t)0x2569, (q15_t)0xc1a,  (q15_t)0x2574, (q15_t)0xc21,  (q15_t)0x257e,\n    (q15_t)0xc29,  (q15_t)0x2588, (q15_t)0xc30,  (q15_t)0x2592, (q15_t)0xc38,\n    (q15_t)0x259c, (q15_t)0xc3f,  (q15_t)0x25a6, (q15_t)0xc46,  (q15_t)0x25b1,\n    (q15_t)0xc4e,  (q15_t)0x25bb, (q15_t)0xc55,  (q15_t)0x25c5, (q15_t)0xc5d,\n    (q15_t)0x25cf, (q15_t)0xc64,  (q15_t)0x25d9, (q15_t)0xc6b,  (q15_t)0x25e3,\n    (q15_t)0xc73,  (q15_t)0x25ed, (q15_t)0xc7a,  (q15_t)0x25f8, (q15_t)0xc82,\n    (q15_t)0x2602, (q15_t)0xc89,  (q15_t)0x260c, (q15_t)0xc91,  (q15_t)0x2616,\n    (q15_t)0xc98,  (q15_t)0x2620, (q15_t)0xca0,  (q15_t)0x262a, (q15_t)0xca7,\n    (q15_t)0x2634, (q15_t)0xcaf,  (q15_t)0x263e, (q15_t)0xcb6,  (q15_t)0x2648,\n    (q15_t)0xcbe,  (q15_t)0x2652, (q15_t)0xcc5,  (q15_t)0x265c, (q15_t)0xccd,\n    (q15_t)0x2666, (q15_t)0xcd4,  (q15_t)0x2671, (q15_t)0xcdc,  (q15_t)0x267b,\n    (q15_t)0xce3,  (q15_t)0x2685, (q15_t)0xceb,  (q15_t)0x268f, (q15_t)0xcf3,\n    (q15_t)0x2699, (q15_t)0xcfa,  (q15_t)0x26a3, (q15_t)0xd02,  (q15_t)0x26ad,\n    (q15_t)0xd09,  (q15_t)0x26b7, (q15_t)0xd11,  (q15_t)0x26c1, (q15_t)0xd19,\n    (q15_t)0x26cb, (q15_t)0xd20,  (q15_t)0x26d5, (q15_t)0xd28,  (q15_t)0x26df,\n    (q15_t)0xd30,  (q15_t)0x26e9, (q15_t)0xd37,  (q15_t)0x26f3, (q15_t)0xd3f,\n    (q15_t)0x26fd, (q15_t)0xd46,  (q15_t)0x2707, (q15_t)0xd4e,  (q15_t)0x2711,\n    (q15_t)0xd56,  (q15_t)0x271a, (q15_t)0xd5d,  (q15_t)0x2724, (q15_t)0xd65,\n    (q15_t)0x272e, (q15_t)0xd6d,  (q15_t)0x2738, (q15_t)0xd75,  (q15_t)0x2742,\n    (q15_t)0xd7c,  (q15_t)0x274c, (q15_t)0xd84,  (q15_t)0x2756, (q15_t)0xd8c,\n    (q15_t)0x2760, (q15_t)0xd93,  (q15_t)0x276a, (q15_t)0xd9b,  (q15_t)0x2774,\n    (q15_t)0xda3,  (q15_t)0x277e, (q15_t)0xdab,  (q15_t)0x2788, (q15_t)0xdb2,\n    (q15_t)0x2791, (q15_t)0xdba,  (q15_t)0x279b, (q15_t)0xdc2,  (q15_t)0x27a5,\n    (q15_t)0xdca,  (q15_t)0x27af, (q15_t)0xdd2,  (q15_t)0x27b9, (q15_t)0xdd9,\n    (q15_t)0x27c3, (q15_t)0xde1,  (q15_t)0x27cd, (q15_t)0xde9,  (q15_t)0x27d6,\n    (q15_t)0xdf1,  (q15_t)0x27e0, (q15_t)0xdf9,  (q15_t)0x27ea, (q15_t)0xe01,\n    (q15_t)0x27f4, (q15_t)0xe08,  (q15_t)0x27fe, (q15_t)0xe10,  (q15_t)0x2808,\n    (q15_t)0xe18,  (q15_t)0x2811, (q15_t)0xe20,  (q15_t)0x281b, (q15_t)0xe28,\n    (q15_t)0x2825, (q15_t)0xe30,  (q15_t)0x282f, (q15_t)0xe38,  (q15_t)0x2838,\n    (q15_t)0xe40,  (q15_t)0x2842, (q15_t)0xe47,  (q15_t)0x284c, (q15_t)0xe4f,\n    (q15_t)0x2856, (q15_t)0xe57,  (q15_t)0x2860, (q15_t)0xe5f,  (q15_t)0x2869,\n    (q15_t)0xe67,  (q15_t)0x2873, (q15_t)0xe6f,  (q15_t)0x287d, (q15_t)0xe77,\n    (q15_t)0x2886, (q15_t)0xe7f,  (q15_t)0x2890, (q15_t)0xe87,  (q15_t)0x289a,\n    (q15_t)0xe8f,  (q15_t)0x28a4, (q15_t)0xe97,  (q15_t)0x28ad, (q15_t)0xe9f,\n    (q15_t)0x28b7, (q15_t)0xea7,  (q15_t)0x28c1, (q15_t)0xeaf,  (q15_t)0x28ca,\n    (q15_t)0xeb7,  (q15_t)0x28d4, (q15_t)0xebf,  (q15_t)0x28de, (q15_t)0xec7,\n    (q15_t)0x28e7, (q15_t)0xecf,  (q15_t)0x28f1, (q15_t)0xed7,  (q15_t)0x28fb,\n    (q15_t)0xedf,  (q15_t)0x2904, (q15_t)0xee7,  (q15_t)0x290e, (q15_t)0xeef,\n    (q15_t)0x2918, (q15_t)0xef7,  (q15_t)0x2921, (q15_t)0xeff,  (q15_t)0x292b,\n    (q15_t)0xf07,  (q15_t)0x2935, (q15_t)0xf10,  (q15_t)0x293e, (q15_t)0xf18,\n    (q15_t)0x2948, (q15_t)0xf20,  (q15_t)0x2951, (q15_t)0xf28,  (q15_t)0x295b,\n    (q15_t)0xf30,  (q15_t)0x2965, (q15_t)0xf38,  (q15_t)0x296e, (q15_t)0xf40,\n    (q15_t)0x2978, (q15_t)0xf48,  (q15_t)0x2981, (q15_t)0xf51,  (q15_t)0x298b,\n    (q15_t)0xf59,  (q15_t)0x2994, (q15_t)0xf61,  (q15_t)0x299e, (q15_t)0xf69,\n    (q15_t)0x29a7, (q15_t)0xf71,  (q15_t)0x29b1, (q15_t)0xf79,  (q15_t)0x29bb,\n    (q15_t)0xf82,  (q15_t)0x29c4, (q15_t)0xf8a,  (q15_t)0x29ce, (q15_t)0xf92,\n    (q15_t)0x29d7, (q15_t)0xf9a,  (q15_t)0x29e1, (q15_t)0xfa3,  (q15_t)0x29ea,\n    (q15_t)0xfab,  (q15_t)0x29f4, (q15_t)0xfb3,  (q15_t)0x29fd, (q15_t)0xfbb,\n    (q15_t)0x2a07, (q15_t)0xfc4,  (q15_t)0x2a10, (q15_t)0xfcc,  (q15_t)0x2a1a,\n    (q15_t)0xfd4,  (q15_t)0x2a23, (q15_t)0xfdc,  (q15_t)0x2a2c, (q15_t)0xfe5,\n    (q15_t)0x2a36, (q15_t)0xfed,  (q15_t)0x2a3f, (q15_t)0xff5,  (q15_t)0x2a49,\n    (q15_t)0xffe,  (q15_t)0x2a52, (q15_t)0x1006, (q15_t)0x2a5c, (q15_t)0x100e,\n    (q15_t)0x2a65, (q15_t)0x1016, (q15_t)0x2a6e, (q15_t)0x101f, (q15_t)0x2a78,\n    (q15_t)0x1027, (q15_t)0x2a81, (q15_t)0x1030, (q15_t)0x2a8b, (q15_t)0x1038,\n    (q15_t)0x2a94, (q15_t)0x1040, (q15_t)0x2a9d, (q15_t)0x1049, (q15_t)0x2aa7,\n    (q15_t)0x1051, (q15_t)0x2ab0, (q15_t)0x1059, (q15_t)0x2ab9, (q15_t)0x1062,\n    (q15_t)0x2ac3, (q15_t)0x106a, (q15_t)0x2acc, (q15_t)0x1073, (q15_t)0x2ad6,\n    (q15_t)0x107b, (q15_t)0x2adf, (q15_t)0x1083, (q15_t)0x2ae8, (q15_t)0x108c,\n    (q15_t)0x2af2, (q15_t)0x1094, (q15_t)0x2afb, (q15_t)0x109d, (q15_t)0x2b04,\n    (q15_t)0x10a5, (q15_t)0x2b0d, (q15_t)0x10ae, (q15_t)0x2b17, (q15_t)0x10b6,\n    (q15_t)0x2b20, (q15_t)0x10bf, (q15_t)0x2b29, (q15_t)0x10c7, (q15_t)0x2b33,\n    (q15_t)0x10d0, (q15_t)0x2b3c, (q15_t)0x10d8, (q15_t)0x2b45, (q15_t)0x10e0,\n    (q15_t)0x2b4e, (q15_t)0x10e9, (q15_t)0x2b58, (q15_t)0x10f2, (q15_t)0x2b61,\n    (q15_t)0x10fa, (q15_t)0x2b6a, (q15_t)0x1103, (q15_t)0x2b73, (q15_t)0x110b,\n    (q15_t)0x2b7d, (q15_t)0x1114, (q15_t)0x2b86, (q15_t)0x111c, (q15_t)0x2b8f,\n    (q15_t)0x1125, (q15_t)0x2b98, (q15_t)0x112d, (q15_t)0x2ba1, (q15_t)0x1136,\n    (q15_t)0x2bab, (q15_t)0x113e, (q15_t)0x2bb4, (q15_t)0x1147, (q15_t)0x2bbd,\n    (q15_t)0x1150, (q15_t)0x2bc6, (q15_t)0x1158, (q15_t)0x2bcf, (q15_t)0x1161,\n    (q15_t)0x2bd8, (q15_t)0x1169, (q15_t)0x2be2, (q15_t)0x1172, (q15_t)0x2beb,\n    (q15_t)0x117b, (q15_t)0x2bf4, (q15_t)0x1183, (q15_t)0x2bfd, (q15_t)0x118c,\n    (q15_t)0x2c06, (q15_t)0x1195, (q15_t)0x2c0f, (q15_t)0x119d, (q15_t)0x2c18,\n    (q15_t)0x11a6, (q15_t)0x2c21, (q15_t)0x11af, (q15_t)0x2c2b, (q15_t)0x11b7,\n    (q15_t)0x2c34, (q15_t)0x11c0, (q15_t)0x2c3d, (q15_t)0x11c9, (q15_t)0x2c46,\n    (q15_t)0x11d1, (q15_t)0x2c4f, (q15_t)0x11da, (q15_t)0x2c58, (q15_t)0x11e3,\n    (q15_t)0x2c61, (q15_t)0x11eb, (q15_t)0x2c6a, (q15_t)0x11f4, (q15_t)0x2c73,\n    (q15_t)0x11fd, (q15_t)0x2c7c, (q15_t)0x1206, (q15_t)0x2c85, (q15_t)0x120e,\n    (q15_t)0x2c8e, (q15_t)0x1217, (q15_t)0x2c97, (q15_t)0x1220, (q15_t)0x2ca0,\n    (q15_t)0x1229, (q15_t)0x2ca9, (q15_t)0x1231, (q15_t)0x2cb2, (q15_t)0x123a,\n    (q15_t)0x2cbb, (q15_t)0x1243, (q15_t)0x2cc4, (q15_t)0x124c, (q15_t)0x2ccd,\n    (q15_t)0x1255, (q15_t)0x2cd6, (q15_t)0x125d, (q15_t)0x2cdf, (q15_t)0x1266,\n    (q15_t)0x2ce8, (q15_t)0x126f, (q15_t)0x2cf1, (q15_t)0x1278, (q15_t)0x2cfa,\n    (q15_t)0x1281, (q15_t)0x2d03, (q15_t)0x128a, (q15_t)0x2d0c, (q15_t)0x1292,\n    (q15_t)0x2d15, (q15_t)0x129b, (q15_t)0x2d1e, (q15_t)0x12a4, (q15_t)0x2d27,\n    (q15_t)0x12ad, (q15_t)0x2d2f, (q15_t)0x12b6, (q15_t)0x2d38, (q15_t)0x12bf,\n    (q15_t)0x2d41, (q15_t)0x12c8, (q15_t)0x2d4a, (q15_t)0x12d1, (q15_t)0x2d53,\n    (q15_t)0x12d9, (q15_t)0x2d5c, (q15_t)0x12e2, (q15_t)0x2d65, (q15_t)0x12eb,\n    (q15_t)0x2d6e, (q15_t)0x12f4, (q15_t)0x2d76, (q15_t)0x12fd, (q15_t)0x2d7f,\n    (q15_t)0x1306, (q15_t)0x2d88, (q15_t)0x130f, (q15_t)0x2d91, (q15_t)0x1318,\n    (q15_t)0x2d9a, (q15_t)0x1321, (q15_t)0x2da3, (q15_t)0x132a, (q15_t)0x2dab,\n    (q15_t)0x1333, (q15_t)0x2db4, (q15_t)0x133c, (q15_t)0x2dbd, (q15_t)0x1345,\n    (q15_t)0x2dc6, (q15_t)0x134e, (q15_t)0x2dcf, (q15_t)0x1357, (q15_t)0x2dd7,\n    (q15_t)0x1360, (q15_t)0x2de0, (q15_t)0x1369, (q15_t)0x2de9, (q15_t)0x1372,\n    (q15_t)0x2df2, (q15_t)0x137b, (q15_t)0x2dfa, (q15_t)0x1384, (q15_t)0x2e03,\n    (q15_t)0x138d, (q15_t)0x2e0c, (q15_t)0x1396, (q15_t)0x2e15, (q15_t)0x139f,\n    (q15_t)0x2e1d, (q15_t)0x13a8, (q15_t)0x2e26, (q15_t)0x13b1, (q15_t)0x2e2f,\n    (q15_t)0x13ba, (q15_t)0x2e37, (q15_t)0x13c3, (q15_t)0x2e40, (q15_t)0x13cc,\n    (q15_t)0x2e49, (q15_t)0x13d5, (q15_t)0x2e51, (q15_t)0x13df, (q15_t)0x2e5a,\n    (q15_t)0x13e8, (q15_t)0x2e63, (q15_t)0x13f1, (q15_t)0x2e6b, (q15_t)0x13fa,\n    (q15_t)0x2e74, (q15_t)0x1403, (q15_t)0x2e7d, (q15_t)0x140c, (q15_t)0x2e85,\n    (q15_t)0x1415, (q15_t)0x2e8e, (q15_t)0x141e, (q15_t)0x2e97, (q15_t)0x1428,\n    (q15_t)0x2e9f, (q15_t)0x1431, (q15_t)0x2ea8, (q15_t)0x143a, (q15_t)0x2eb0,\n    (q15_t)0x1443, (q15_t)0x2eb9, (q15_t)0x144c, (q15_t)0x2ec2, (q15_t)0x1455,\n    (q15_t)0x2eca, (q15_t)0x145f, (q15_t)0x2ed3, (q15_t)0x1468, (q15_t)0x2edb,\n    (q15_t)0x1471, (q15_t)0x2ee4, (q15_t)0x147a, (q15_t)0x2eec, (q15_t)0x1483,\n    (q15_t)0x2ef5, (q15_t)0x148d, (q15_t)0x2efd, (q15_t)0x1496, (q15_t)0x2f06,\n    (q15_t)0x149f, (q15_t)0x2f0e, (q15_t)0x14a8, (q15_t)0x2f17, (q15_t)0x14b2,\n    (q15_t)0x2f20, (q15_t)0x14bb, (q15_t)0x2f28, (q15_t)0x14c4, (q15_t)0x2f30,\n    (q15_t)0x14cd, (q15_t)0x2f39, (q15_t)0x14d7, (q15_t)0x2f41, (q15_t)0x14e0,\n    (q15_t)0x2f4a, (q15_t)0x14e9, (q15_t)0x2f52, (q15_t)0x14f3, (q15_t)0x2f5b,\n    (q15_t)0x14fc, (q15_t)0x2f63, (q15_t)0x1505, (q15_t)0x2f6c, (q15_t)0x150e,\n    (q15_t)0x2f74, (q15_t)0x1518, (q15_t)0x2f7d, (q15_t)0x1521, (q15_t)0x2f85,\n    (q15_t)0x152a, (q15_t)0x2f8d, (q15_t)0x1534, (q15_t)0x2f96, (q15_t)0x153d,\n    (q15_t)0x2f9e, (q15_t)0x1547, (q15_t)0x2fa7, (q15_t)0x1550, (q15_t)0x2faf,\n    (q15_t)0x1559, (q15_t)0x2fb7, (q15_t)0x1563, (q15_t)0x2fc0, (q15_t)0x156c,\n    (q15_t)0x2fc8, (q15_t)0x1575, (q15_t)0x2fd0, (q15_t)0x157f, (q15_t)0x2fd9,\n    (q15_t)0x1588, (q15_t)0x2fe1, (q15_t)0x1592, (q15_t)0x2fea, (q15_t)0x159b,\n    (q15_t)0x2ff2, (q15_t)0x15a4, (q15_t)0x2ffa, (q15_t)0x15ae, (q15_t)0x3002,\n    (q15_t)0x15b7, (q15_t)0x300b, (q15_t)0x15c1, (q15_t)0x3013, (q15_t)0x15ca,\n    (q15_t)0x301b, (q15_t)0x15d4, (q15_t)0x3024, (q15_t)0x15dd, (q15_t)0x302c,\n    (q15_t)0x15e6, (q15_t)0x3034, (q15_t)0x15f0, (q15_t)0x303c, (q15_t)0x15f9,\n    (q15_t)0x3045, (q15_t)0x1603, (q15_t)0x304d, (q15_t)0x160c, (q15_t)0x3055,\n    (q15_t)0x1616, (q15_t)0x305d, (q15_t)0x161f, (q15_t)0x3066, (q15_t)0x1629,\n    (q15_t)0x306e, (q15_t)0x1632, (q15_t)0x3076, (q15_t)0x163c, (q15_t)0x307e,\n    (q15_t)0x1645, (q15_t)0x3087, (q15_t)0x164f, (q15_t)0x308f, (q15_t)0x1659,\n    (q15_t)0x3097, (q15_t)0x1662, (q15_t)0x309f, (q15_t)0x166c, (q15_t)0x30a7,\n    (q15_t)0x1675, (q15_t)0x30af, (q15_t)0x167f, (q15_t)0x30b8, (q15_t)0x1688,\n    (q15_t)0x30c0, (q15_t)0x1692, (q15_t)0x30c8, (q15_t)0x169b, (q15_t)0x30d0,\n    (q15_t)0x16a5, (q15_t)0x30d8, (q15_t)0x16af, (q15_t)0x30e0, (q15_t)0x16b8,\n    (q15_t)0x30e8, (q15_t)0x16c2, (q15_t)0x30f0, (q15_t)0x16cb, (q15_t)0x30f9,\n    (q15_t)0x16d5, (q15_t)0x3101, (q15_t)0x16df, (q15_t)0x3109, (q15_t)0x16e8,\n    (q15_t)0x3111, (q15_t)0x16f2, (q15_t)0x3119, (q15_t)0x16fc, (q15_t)0x3121,\n    (q15_t)0x1705, (q15_t)0x3129, (q15_t)0x170f, (q15_t)0x3131, (q15_t)0x1719,\n    (q15_t)0x3139, (q15_t)0x1722, (q15_t)0x3141, (q15_t)0x172c, (q15_t)0x3149,\n    (q15_t)0x1736, (q15_t)0x3151, (q15_t)0x173f, (q15_t)0x3159, (q15_t)0x1749,\n    (q15_t)0x3161, (q15_t)0x1753, (q15_t)0x3169, (q15_t)0x175c, (q15_t)0x3171,\n    (q15_t)0x1766, (q15_t)0x3179, (q15_t)0x1770, (q15_t)0x3181, (q15_t)0x177a,\n    (q15_t)0x3189, (q15_t)0x1783, (q15_t)0x3191, (q15_t)0x178d, (q15_t)0x3199,\n    (q15_t)0x1797, (q15_t)0x31a1, (q15_t)0x17a0, (q15_t)0x31a9, (q15_t)0x17aa,\n    (q15_t)0x31b1, (q15_t)0x17b4, (q15_t)0x31b9, (q15_t)0x17be, (q15_t)0x31c0,\n    (q15_t)0x17c8, (q15_t)0x31c8, (q15_t)0x17d1, (q15_t)0x31d0, (q15_t)0x17db,\n    (q15_t)0x31d8, (q15_t)0x17e5, (q15_t)0x31e0, (q15_t)0x17ef, (q15_t)0x31e8,\n    (q15_t)0x17f8, (q15_t)0x31f0, (q15_t)0x1802, (q15_t)0x31f8, (q15_t)0x180c,\n    (q15_t)0x31ff, (q15_t)0x1816, (q15_t)0x3207, (q15_t)0x1820, (q15_t)0x320f,\n    (q15_t)0x182a, (q15_t)0x3217, (q15_t)0x1833, (q15_t)0x321f, (q15_t)0x183d,\n    (q15_t)0x3227, (q15_t)0x1847, (q15_t)0x322e, (q15_t)0x1851, (q15_t)0x3236,\n    (q15_t)0x185b, (q15_t)0x323e, (q15_t)0x1865, (q15_t)0x3246, (q15_t)0x186f,\n    (q15_t)0x324e, (q15_t)0x1878, (q15_t)0x3255, (q15_t)0x1882, (q15_t)0x325d,\n    (q15_t)0x188c, (q15_t)0x3265, (q15_t)0x1896, (q15_t)0x326d, (q15_t)0x18a0,\n    (q15_t)0x3274, (q15_t)0x18aa, (q15_t)0x327c, (q15_t)0x18b4, (q15_t)0x3284,\n    (q15_t)0x18be, (q15_t)0x328b, (q15_t)0x18c8, (q15_t)0x3293, (q15_t)0x18d2,\n    (q15_t)0x329b, (q15_t)0x18dc, (q15_t)0x32a3, (q15_t)0x18e6, (q15_t)0x32aa,\n    (q15_t)0x18ef, (q15_t)0x32b2, (q15_t)0x18f9, (q15_t)0x32ba, (q15_t)0x1903,\n    (q15_t)0x32c1, (q15_t)0x190d, (q15_t)0x32c9, (q15_t)0x1917, (q15_t)0x32d0,\n    (q15_t)0x1921, (q15_t)0x32d8, (q15_t)0x192b, (q15_t)0x32e0, (q15_t)0x1935,\n    (q15_t)0x32e7, (q15_t)0x193f, (q15_t)0x32ef, (q15_t)0x1949, (q15_t)0x32f7,\n    (q15_t)0x1953, (q15_t)0x32fe, (q15_t)0x195d, (q15_t)0x3306, (q15_t)0x1967,\n    (q15_t)0x330d, (q15_t)0x1971, (q15_t)0x3315, (q15_t)0x197b, (q15_t)0x331d,\n    (q15_t)0x1985, (q15_t)0x3324, (q15_t)0x198f, (q15_t)0x332c, (q15_t)0x199a,\n    (q15_t)0x3333, (q15_t)0x19a4, (q15_t)0x333b, (q15_t)0x19ae, (q15_t)0x3342,\n    (q15_t)0x19b8, (q15_t)0x334a, (q15_t)0x19c2, (q15_t)0x3351, (q15_t)0x19cc,\n    (q15_t)0x3359, (q15_t)0x19d6, (q15_t)0x3360, (q15_t)0x19e0, (q15_t)0x3368,\n    (q15_t)0x19ea, (q15_t)0x336f, (q15_t)0x19f4, (q15_t)0x3377, (q15_t)0x19fe,\n    (q15_t)0x337e, (q15_t)0x1a08, (q15_t)0x3386, (q15_t)0x1a13, (q15_t)0x338d,\n    (q15_t)0x1a1d, (q15_t)0x3395, (q15_t)0x1a27, (q15_t)0x339c, (q15_t)0x1a31,\n    (q15_t)0x33a3, (q15_t)0x1a3b, (q15_t)0x33ab, (q15_t)0x1a45, (q15_t)0x33b2,\n    (q15_t)0x1a4f, (q15_t)0x33ba, (q15_t)0x1a5a, (q15_t)0x33c1, (q15_t)0x1a64,\n    (q15_t)0x33c8, (q15_t)0x1a6e, (q15_t)0x33d0, (q15_t)0x1a78, (q15_t)0x33d7,\n    (q15_t)0x1a82, (q15_t)0x33df, (q15_t)0x1a8c, (q15_t)0x33e6, (q15_t)0x1a97,\n    (q15_t)0x33ed, (q15_t)0x1aa1, (q15_t)0x33f5, (q15_t)0x1aab, (q15_t)0x33fc,\n    (q15_t)0x1ab5, (q15_t)0x3403, (q15_t)0x1abf, (q15_t)0x340b, (q15_t)0x1aca,\n    (q15_t)0x3412, (q15_t)0x1ad4, (q15_t)0x3419, (q15_t)0x1ade, (q15_t)0x3420,\n    (q15_t)0x1ae8, (q15_t)0x3428, (q15_t)0x1af3, (q15_t)0x342f, (q15_t)0x1afd,\n    (q15_t)0x3436, (q15_t)0x1b07, (q15_t)0x343e, (q15_t)0x1b11, (q15_t)0x3445,\n    (q15_t)0x1b1c, (q15_t)0x344c, (q15_t)0x1b26, (q15_t)0x3453, (q15_t)0x1b30,\n    (q15_t)0x345b, (q15_t)0x1b3b, (q15_t)0x3462, (q15_t)0x1b45, (q15_t)0x3469,\n    (q15_t)0x1b4f, (q15_t)0x3470, (q15_t)0x1b59, (q15_t)0x3477, (q15_t)0x1b64,\n    (q15_t)0x347f, (q15_t)0x1b6e, (q15_t)0x3486, (q15_t)0x1b78, (q15_t)0x348d,\n    (q15_t)0x1b83, (q15_t)0x3494, (q15_t)0x1b8d, (q15_t)0x349b, (q15_t)0x1b97,\n    (q15_t)0x34a2, (q15_t)0x1ba2, (q15_t)0x34aa, (q15_t)0x1bac, (q15_t)0x34b1,\n    (q15_t)0x1bb6, (q15_t)0x34b8, (q15_t)0x1bc1, (q15_t)0x34bf, (q15_t)0x1bcb,\n    (q15_t)0x34c6, (q15_t)0x1bd5, (q15_t)0x34cd, (q15_t)0x1be0, (q15_t)0x34d4,\n    (q15_t)0x1bea, (q15_t)0x34db, (q15_t)0x1bf5, (q15_t)0x34e2, (q15_t)0x1bff,\n    (q15_t)0x34ea, (q15_t)0x1c09, (q15_t)0x34f1, (q15_t)0x1c14, (q15_t)0x34f8,\n    (q15_t)0x1c1e, (q15_t)0x34ff, (q15_t)0x1c29, (q15_t)0x3506, (q15_t)0x1c33,\n    (q15_t)0x350d, (q15_t)0x1c3d, (q15_t)0x3514, (q15_t)0x1c48, (q15_t)0x351b,\n    (q15_t)0x1c52, (q15_t)0x3522, (q15_t)0x1c5d, (q15_t)0x3529, (q15_t)0x1c67,\n    (q15_t)0x3530, (q15_t)0x1c72, (q15_t)0x3537, (q15_t)0x1c7c, (q15_t)0x353e,\n    (q15_t)0x1c86, (q15_t)0x3545, (q15_t)0x1c91, (q15_t)0x354c, (q15_t)0x1c9b,\n    (q15_t)0x3553, (q15_t)0x1ca6, (q15_t)0x355a, (q15_t)0x1cb0, (q15_t)0x3561,\n    (q15_t)0x1cbb, (q15_t)0x3567, (q15_t)0x1cc5, (q15_t)0x356e, (q15_t)0x1cd0,\n    (q15_t)0x3575, (q15_t)0x1cda, (q15_t)0x357c, (q15_t)0x1ce5, (q15_t)0x3583,\n    (q15_t)0x1cef, (q15_t)0x358a, (q15_t)0x1cfa, (q15_t)0x3591, (q15_t)0x1d04,\n    (q15_t)0x3598, (q15_t)0x1d0f, (q15_t)0x359f, (q15_t)0x1d19, (q15_t)0x35a5,\n    (q15_t)0x1d24, (q15_t)0x35ac, (q15_t)0x1d2e, (q15_t)0x35b3, (q15_t)0x1d39,\n    (q15_t)0x35ba, (q15_t)0x1d44, (q15_t)0x35c1, (q15_t)0x1d4e, (q15_t)0x35c8,\n    (q15_t)0x1d59, (q15_t)0x35ce, (q15_t)0x1d63, (q15_t)0x35d5, (q15_t)0x1d6e,\n    (q15_t)0x35dc, (q15_t)0x1d78, (q15_t)0x35e3, (q15_t)0x1d83, (q15_t)0x35ea,\n    (q15_t)0x1d8e, (q15_t)0x35f0, (q15_t)0x1d98, (q15_t)0x35f7, (q15_t)0x1da3,\n    (q15_t)0x35fe, (q15_t)0x1dad, (q15_t)0x3605, (q15_t)0x1db8, (q15_t)0x360b,\n    (q15_t)0x1dc3, (q15_t)0x3612, (q15_t)0x1dcd, (q15_t)0x3619, (q15_t)0x1dd8,\n    (q15_t)0x3620, (q15_t)0x1de2, (q15_t)0x3626, (q15_t)0x1ded, (q15_t)0x362d,\n    (q15_t)0x1df8, (q15_t)0x3634, (q15_t)0x1e02, (q15_t)0x363a, (q15_t)0x1e0d,\n    (q15_t)0x3641, (q15_t)0x1e18, (q15_t)0x3648, (q15_t)0x1e22, (q15_t)0x364e,\n    (q15_t)0x1e2d, (q15_t)0x3655, (q15_t)0x1e38, (q15_t)0x365c, (q15_t)0x1e42,\n    (q15_t)0x3662, (q15_t)0x1e4d, (q15_t)0x3669, (q15_t)0x1e58, (q15_t)0x366f,\n    (q15_t)0x1e62, (q15_t)0x3676, (q15_t)0x1e6d, (q15_t)0x367d, (q15_t)0x1e78,\n    (q15_t)0x3683, (q15_t)0x1e83, (q15_t)0x368a, (q15_t)0x1e8d, (q15_t)0x3690,\n    (q15_t)0x1e98, (q15_t)0x3697, (q15_t)0x1ea3, (q15_t)0x369d, (q15_t)0x1ead,\n    (q15_t)0x36a4, (q15_t)0x1eb8, (q15_t)0x36ab, (q15_t)0x1ec3, (q15_t)0x36b1,\n    (q15_t)0x1ece, (q15_t)0x36b8, (q15_t)0x1ed8, (q15_t)0x36be, (q15_t)0x1ee3,\n    (q15_t)0x36c5, (q15_t)0x1eee, (q15_t)0x36cb, (q15_t)0x1ef9, (q15_t)0x36d2,\n    (q15_t)0x1f03, (q15_t)0x36d8, (q15_t)0x1f0e, (q15_t)0x36df, (q15_t)0x1f19,\n    (q15_t)0x36e5, (q15_t)0x1f24, (q15_t)0x36eb, (q15_t)0x1f2f, (q15_t)0x36f2,\n    (q15_t)0x1f39, (q15_t)0x36f8, (q15_t)0x1f44, (q15_t)0x36ff, (q15_t)0x1f4f,\n    (q15_t)0x3705, (q15_t)0x1f5a, (q15_t)0x370c, (q15_t)0x1f65, (q15_t)0x3712,\n    (q15_t)0x1f6f, (q15_t)0x3718, (q15_t)0x1f7a, (q15_t)0x371f, (q15_t)0x1f85,\n    (q15_t)0x3725, (q15_t)0x1f90, (q15_t)0x372c, (q15_t)0x1f9b, (q15_t)0x3732,\n    (q15_t)0x1fa5, (q15_t)0x3738, (q15_t)0x1fb0, (q15_t)0x373f, (q15_t)0x1fbb,\n    (q15_t)0x3745, (q15_t)0x1fc6, (q15_t)0x374b, (q15_t)0x1fd1, (q15_t)0x3752,\n    (q15_t)0x1fdc, (q15_t)0x3758, (q15_t)0x1fe7, (q15_t)0x375e, (q15_t)0x1ff1,\n    (q15_t)0x3765, (q15_t)0x1ffc, (q15_t)0x376b, (q15_t)0x2007, (q15_t)0x3771,\n    (q15_t)0x2012, (q15_t)0x3777, (q15_t)0x201d, (q15_t)0x377e, (q15_t)0x2028,\n    (q15_t)0x3784, (q15_t)0x2033, (q15_t)0x378a, (q15_t)0x203e, (q15_t)0x3790,\n    (q15_t)0x2049, (q15_t)0x3797, (q15_t)0x2054, (q15_t)0x379d, (q15_t)0x205e,\n    (q15_t)0x37a3, (q15_t)0x2069, (q15_t)0x37a9, (q15_t)0x2074, (q15_t)0x37b0,\n    (q15_t)0x207f, (q15_t)0x37b6, (q15_t)0x208a, (q15_t)0x37bc, (q15_t)0x2095,\n    (q15_t)0x37c2, (q15_t)0x20a0, (q15_t)0x37c8, (q15_t)0x20ab, (q15_t)0x37ce,\n    (q15_t)0x20b6, (q15_t)0x37d5, (q15_t)0x20c1, (q15_t)0x37db, (q15_t)0x20cc,\n    (q15_t)0x37e1, (q15_t)0x20d7, (q15_t)0x37e7, (q15_t)0x20e2, (q15_t)0x37ed,\n    (q15_t)0x20ed, (q15_t)0x37f3, (q15_t)0x20f8, (q15_t)0x37f9, (q15_t)0x2103,\n    (q15_t)0x37ff, (q15_t)0x210e, (q15_t)0x3805, (q15_t)0x2119, (q15_t)0x380b,\n    (q15_t)0x2124, (q15_t)0x3812, (q15_t)0x212f, (q15_t)0x3818, (q15_t)0x213a,\n    (q15_t)0x381e, (q15_t)0x2145, (q15_t)0x3824, (q15_t)0x2150, (q15_t)0x382a,\n    (q15_t)0x215b, (q15_t)0x3830, (q15_t)0x2166, (q15_t)0x3836, (q15_t)0x2171,\n    (q15_t)0x383c, (q15_t)0x217c, (q15_t)0x3842, (q15_t)0x2187, (q15_t)0x3848,\n    (q15_t)0x2192, (q15_t)0x384e, (q15_t)0x219d, (q15_t)0x3854, (q15_t)0x21a8,\n    (q15_t)0x385a, (q15_t)0x21b3, (q15_t)0x3860, (q15_t)0x21be, (q15_t)0x3866,\n    (q15_t)0x21ca, (q15_t)0x386b, (q15_t)0x21d5, (q15_t)0x3871, (q15_t)0x21e0,\n    (q15_t)0x3877, (q15_t)0x21eb, (q15_t)0x387d, (q15_t)0x21f6, (q15_t)0x3883,\n    (q15_t)0x2201, (q15_t)0x3889, (q15_t)0x220c, (q15_t)0x388f, (q15_t)0x2217,\n    (q15_t)0x3895, (q15_t)0x2222, (q15_t)0x389b, (q15_t)0x222d, (q15_t)0x38a1,\n    (q15_t)0x2239, (q15_t)0x38a6, (q15_t)0x2244, (q15_t)0x38ac, (q15_t)0x224f,\n    (q15_t)0x38b2, (q15_t)0x225a, (q15_t)0x38b8, (q15_t)0x2265, (q15_t)0x38be,\n    (q15_t)0x2270, (q15_t)0x38c3, (q15_t)0x227b, (q15_t)0x38c9, (q15_t)0x2287,\n    (q15_t)0x38cf, (q15_t)0x2292, (q15_t)0x38d5, (q15_t)0x229d, (q15_t)0x38db,\n    (q15_t)0x22a8, (q15_t)0x38e0, (q15_t)0x22b3, (q15_t)0x38e6, (q15_t)0x22be,\n    (q15_t)0x38ec, (q15_t)0x22ca, (q15_t)0x38f2, (q15_t)0x22d5, (q15_t)0x38f7,\n    (q15_t)0x22e0, (q15_t)0x38fd, (q15_t)0x22eb, (q15_t)0x3903, (q15_t)0x22f6,\n    (q15_t)0x3909, (q15_t)0x2301, (q15_t)0x390e, (q15_t)0x230d, (q15_t)0x3914,\n    (q15_t)0x2318, (q15_t)0x391a, (q15_t)0x2323, (q15_t)0x391f, (q15_t)0x232e,\n    (q15_t)0x3925, (q15_t)0x233a, (q15_t)0x392b, (q15_t)0x2345, (q15_t)0x3930,\n    (q15_t)0x2350, (q15_t)0x3936, (q15_t)0x235b, (q15_t)0x393b, (q15_t)0x2367,\n    (q15_t)0x3941, (q15_t)0x2372, (q15_t)0x3947, (q15_t)0x237d, (q15_t)0x394c,\n    (q15_t)0x2388, (q15_t)0x3952, (q15_t)0x2394, (q15_t)0x3958, (q15_t)0x239f,\n    (q15_t)0x395d, (q15_t)0x23aa, (q15_t)0x3963, (q15_t)0x23b5, (q15_t)0x3968,\n    (q15_t)0x23c1, (q15_t)0x396e, (q15_t)0x23cc, (q15_t)0x3973, (q15_t)0x23d7,\n    (q15_t)0x3979, (q15_t)0x23e2, (q15_t)0x397e, (q15_t)0x23ee, (q15_t)0x3984,\n    (q15_t)0x23f9, (q15_t)0x3989, (q15_t)0x2404, (q15_t)0x398f, (q15_t)0x2410,\n    (q15_t)0x3994, (q15_t)0x241b, (q15_t)0x399a, (q15_t)0x2426, (q15_t)0x399f,\n    (q15_t)0x2432, (q15_t)0x39a5, (q15_t)0x243d, (q15_t)0x39aa, (q15_t)0x2448,\n    (q15_t)0x39b0, (q15_t)0x2454, (q15_t)0x39b5, (q15_t)0x245f, (q15_t)0x39bb,\n    (q15_t)0x246a, (q15_t)0x39c0, (q15_t)0x2476, (q15_t)0x39c5, (q15_t)0x2481,\n    (q15_t)0x39cb, (q15_t)0x248c, (q15_t)0x39d0, (q15_t)0x2498, (q15_t)0x39d6,\n    (q15_t)0x24a3, (q15_t)0x39db, (q15_t)0x24ae, (q15_t)0x39e0, (q15_t)0x24ba,\n    (q15_t)0x39e6, (q15_t)0x24c5, (q15_t)0x39eb, (q15_t)0x24d0, (q15_t)0x39f0,\n    (q15_t)0x24dc, (q15_t)0x39f6, (q15_t)0x24e7, (q15_t)0x39fb, (q15_t)0x24f3,\n    (q15_t)0x3a00, (q15_t)0x24fe, (q15_t)0x3a06, (q15_t)0x2509, (q15_t)0x3a0b,\n    (q15_t)0x2515, (q15_t)0x3a10, (q15_t)0x2520, (q15_t)0x3a16, (q15_t)0x252c,\n    (q15_t)0x3a1b, (q15_t)0x2537, (q15_t)0x3a20, (q15_t)0x2542, (q15_t)0x3a25,\n    (q15_t)0x254e, (q15_t)0x3a2b, (q15_t)0x2559, (q15_t)0x3a30, (q15_t)0x2565,\n    (q15_t)0x3a35, (q15_t)0x2570, (q15_t)0x3a3a, (q15_t)0x257c, (q15_t)0x3a3f,\n    (q15_t)0x2587, (q15_t)0x3a45, (q15_t)0x2592, (q15_t)0x3a4a, (q15_t)0x259e,\n    (q15_t)0x3a4f, (q15_t)0x25a9, (q15_t)0x3a54, (q15_t)0x25b5, (q15_t)0x3a59,\n    (q15_t)0x25c0, (q15_t)0x3a5f, (q15_t)0x25cc, (q15_t)0x3a64, (q15_t)0x25d7,\n    (q15_t)0x3a69, (q15_t)0x25e3, (q15_t)0x3a6e, (q15_t)0x25ee, (q15_t)0x3a73,\n    (q15_t)0x25fa, (q15_t)0x3a78, (q15_t)0x2605, (q15_t)0x3a7d, (q15_t)0x2611,\n    (q15_t)0x3a82, (q15_t)0x261c, (q15_t)0x3a88, (q15_t)0x2628, (q15_t)0x3a8d,\n    (q15_t)0x2633, (q15_t)0x3a92, (q15_t)0x263f, (q15_t)0x3a97, (q15_t)0x264a,\n    (q15_t)0x3a9c, (q15_t)0x2656, (q15_t)0x3aa1, (q15_t)0x2661, (q15_t)0x3aa6,\n    (q15_t)0x266d, (q15_t)0x3aab, (q15_t)0x2678, (q15_t)0x3ab0, (q15_t)0x2684,\n    (q15_t)0x3ab5, (q15_t)0x268f, (q15_t)0x3aba, (q15_t)0x269b, (q15_t)0x3abf,\n    (q15_t)0x26a6, (q15_t)0x3ac4, (q15_t)0x26b2, (q15_t)0x3ac9, (q15_t)0x26bd,\n    (q15_t)0x3ace, (q15_t)0x26c9, (q15_t)0x3ad3, (q15_t)0x26d4, (q15_t)0x3ad8,\n    (q15_t)0x26e0, (q15_t)0x3add, (q15_t)0x26ec, (q15_t)0x3ae2, (q15_t)0x26f7,\n    (q15_t)0x3ae6, (q15_t)0x2703, (q15_t)0x3aeb, (q15_t)0x270e, (q15_t)0x3af0,\n    (q15_t)0x271a, (q15_t)0x3af5, (q15_t)0x2725, (q15_t)0x3afa, (q15_t)0x2731,\n    (q15_t)0x3aff, (q15_t)0x273d, (q15_t)0x3b04, (q15_t)0x2748, (q15_t)0x3b09,\n    (q15_t)0x2754, (q15_t)0x3b0e, (q15_t)0x275f, (q15_t)0x3b12, (q15_t)0x276b,\n    (q15_t)0x3b17, (q15_t)0x2777, (q15_t)0x3b1c, (q15_t)0x2782, (q15_t)0x3b21,\n    (q15_t)0x278e, (q15_t)0x3b26, (q15_t)0x2799, (q15_t)0x3b2a, (q15_t)0x27a5,\n    (q15_t)0x3b2f, (q15_t)0x27b1, (q15_t)0x3b34, (q15_t)0x27bc, (q15_t)0x3b39,\n    (q15_t)0x27c8, (q15_t)0x3b3e, (q15_t)0x27d3, (q15_t)0x3b42, (q15_t)0x27df,\n    (q15_t)0x3b47, (q15_t)0x27eb, (q15_t)0x3b4c, (q15_t)0x27f6, (q15_t)0x3b50,\n    (q15_t)0x2802, (q15_t)0x3b55, (q15_t)0x280e, (q15_t)0x3b5a, (q15_t)0x2819,\n    (q15_t)0x3b5f, (q15_t)0x2825, (q15_t)0x3b63, (q15_t)0x2831, (q15_t)0x3b68,\n    (q15_t)0x283c, (q15_t)0x3b6d, (q15_t)0x2848, (q15_t)0x3b71, (q15_t)0x2854,\n    (q15_t)0x3b76, (q15_t)0x285f, (q15_t)0x3b7b, (q15_t)0x286b, (q15_t)0x3b7f,\n    (q15_t)0x2877, (q15_t)0x3b84, (q15_t)0x2882, (q15_t)0x3b88, (q15_t)0x288e,\n    (q15_t)0x3b8d, (q15_t)0x289a, (q15_t)0x3b92, (q15_t)0x28a5, (q15_t)0x3b96,\n    (q15_t)0x28b1, (q15_t)0x3b9b, (q15_t)0x28bd, (q15_t)0x3b9f, (q15_t)0x28c9,\n    (q15_t)0x3ba4, (q15_t)0x28d4, (q15_t)0x3ba9, (q15_t)0x28e0, (q15_t)0x3bad,\n    (q15_t)0x28ec, (q15_t)0x3bb2, (q15_t)0x28f7, (q15_t)0x3bb6, (q15_t)0x2903,\n    (q15_t)0x3bbb, (q15_t)0x290f, (q15_t)0x3bbf, (q15_t)0x291b, (q15_t)0x3bc4,\n    (q15_t)0x2926, (q15_t)0x3bc8, (q15_t)0x2932, (q15_t)0x3bcd, (q15_t)0x293e,\n    (q15_t)0x3bd1, (q15_t)0x294a, (q15_t)0x3bd6, (q15_t)0x2955, (q15_t)0x3bda,\n    (q15_t)0x2961, (q15_t)0x3bde, (q15_t)0x296d, (q15_t)0x3be3, (q15_t)0x2979,\n    (q15_t)0x3be7, (q15_t)0x2984, (q15_t)0x3bec, (q15_t)0x2990, (q15_t)0x3bf0,\n    (q15_t)0x299c, (q15_t)0x3bf5, (q15_t)0x29a8, (q15_t)0x3bf9, (q15_t)0x29b4,\n    (q15_t)0x3bfd, (q15_t)0x29bf, (q15_t)0x3c02, (q15_t)0x29cb, (q15_t)0x3c06,\n    (q15_t)0x29d7, (q15_t)0x3c0a, (q15_t)0x29e3, (q15_t)0x3c0f, (q15_t)0x29ee,\n    (q15_t)0x3c13, (q15_t)0x29fa, (q15_t)0x3c17, (q15_t)0x2a06, (q15_t)0x3c1c,\n    (q15_t)0x2a12, (q15_t)0x3c20, (q15_t)0x2a1e, (q15_t)0x3c24, (q15_t)0x2a29,\n    (q15_t)0x3c29, (q15_t)0x2a35, (q15_t)0x3c2d, (q15_t)0x2a41, (q15_t)0x3c31,\n    (q15_t)0x2a4d, (q15_t)0x3c36, (q15_t)0x2a59, (q15_t)0x3c3a, (q15_t)0x2a65,\n    (q15_t)0x3c3e, (q15_t)0x2a70, (q15_t)0x3c42, (q15_t)0x2a7c, (q15_t)0x3c46,\n    (q15_t)0x2a88, (q15_t)0x3c4b, (q15_t)0x2a94, (q15_t)0x3c4f, (q15_t)0x2aa0,\n    (q15_t)0x3c53, (q15_t)0x2aac, (q15_t)0x3c57, (q15_t)0x2ab7, (q15_t)0x3c5b,\n    (q15_t)0x2ac3, (q15_t)0x3c60, (q15_t)0x2acf, (q15_t)0x3c64, (q15_t)0x2adb,\n    (q15_t)0x3c68, (q15_t)0x2ae7, (q15_t)0x3c6c, (q15_t)0x2af3, (q15_t)0x3c70,\n    (q15_t)0x2aff, (q15_t)0x3c74, (q15_t)0x2b0a, (q15_t)0x3c79, (q15_t)0x2b16,\n    (q15_t)0x3c7d, (q15_t)0x2b22, (q15_t)0x3c81, (q15_t)0x2b2e, (q15_t)0x3c85,\n    (q15_t)0x2b3a, (q15_t)0x3c89, (q15_t)0x2b46, (q15_t)0x3c8d, (q15_t)0x2b52,\n    (q15_t)0x3c91, (q15_t)0x2b5e, (q15_t)0x3c95, (q15_t)0x2b6a, (q15_t)0x3c99,\n    (q15_t)0x2b75, (q15_t)0x3c9d, (q15_t)0x2b81, (q15_t)0x3ca1, (q15_t)0x2b8d,\n    (q15_t)0x3ca5, (q15_t)0x2b99, (q15_t)0x3ca9, (q15_t)0x2ba5, (q15_t)0x3cad,\n    (q15_t)0x2bb1, (q15_t)0x3cb1, (q15_t)0x2bbd, (q15_t)0x3cb5, (q15_t)0x2bc9,\n    (q15_t)0x3cb9, (q15_t)0x2bd5, (q15_t)0x3cbd, (q15_t)0x2be1, (q15_t)0x3cc1,\n    (q15_t)0x2bed, (q15_t)0x3cc5, (q15_t)0x2bf9, (q15_t)0x3cc9, (q15_t)0x2c05,\n    (q15_t)0x3ccd, (q15_t)0x2c10, (q15_t)0x3cd1, (q15_t)0x2c1c, (q15_t)0x3cd5,\n    (q15_t)0x2c28, (q15_t)0x3cd9, (q15_t)0x2c34, (q15_t)0x3cdd, (q15_t)0x2c40,\n    (q15_t)0x3ce0, (q15_t)0x2c4c, (q15_t)0x3ce4, (q15_t)0x2c58, (q15_t)0x3ce8,\n    (q15_t)0x2c64, (q15_t)0x3cec, (q15_t)0x2c70, (q15_t)0x3cf0, (q15_t)0x2c7c,\n    (q15_t)0x3cf4, (q15_t)0x2c88, (q15_t)0x3cf8, (q15_t)0x2c94, (q15_t)0x3cfb,\n    (q15_t)0x2ca0, (q15_t)0x3cff, (q15_t)0x2cac, (q15_t)0x3d03, (q15_t)0x2cb8,\n    (q15_t)0x3d07, (q15_t)0x2cc4, (q15_t)0x3d0b, (q15_t)0x2cd0, (q15_t)0x3d0e,\n    (q15_t)0x2cdc, (q15_t)0x3d12, (q15_t)0x2ce8, (q15_t)0x3d16, (q15_t)0x2cf4,\n    (q15_t)0x3d1a, (q15_t)0x2d00, (q15_t)0x3d1d, (q15_t)0x2d0c, (q15_t)0x3d21,\n    (q15_t)0x2d18, (q15_t)0x3d25, (q15_t)0x2d24, (q15_t)0x3d28, (q15_t)0x2d30,\n    (q15_t)0x3d2c, (q15_t)0x2d3c, (q15_t)0x3d30, (q15_t)0x2d48, (q15_t)0x3d34,\n    (q15_t)0x2d54, (q15_t)0x3d37, (q15_t)0x2d60, (q15_t)0x3d3b, (q15_t)0x2d6c,\n    (q15_t)0x3d3f, (q15_t)0x2d78, (q15_t)0x3d42, (q15_t)0x2d84, (q15_t)0x3d46,\n    (q15_t)0x2d90, (q15_t)0x3d49, (q15_t)0x2d9c, (q15_t)0x3d4d, (q15_t)0x2da8,\n    (q15_t)0x3d51, (q15_t)0x2db4, (q15_t)0x3d54, (q15_t)0x2dc0, (q15_t)0x3d58,\n    (q15_t)0x2dcc, (q15_t)0x3d5b, (q15_t)0x2dd8, (q15_t)0x3d5f, (q15_t)0x2de4,\n    (q15_t)0x3d63, (q15_t)0x2df0, (q15_t)0x3d66, (q15_t)0x2dfc, (q15_t)0x3d6a,\n    (q15_t)0x2e09, (q15_t)0x3d6d, (q15_t)0x2e15, (q15_t)0x3d71, (q15_t)0x2e21,\n    (q15_t)0x3d74, (q15_t)0x2e2d, (q15_t)0x3d78, (q15_t)0x2e39, (q15_t)0x3d7b,\n    (q15_t)0x2e45, (q15_t)0x3d7f, (q15_t)0x2e51, (q15_t)0x3d82, (q15_t)0x2e5d,\n    (q15_t)0x3d86, (q15_t)0x2e69, (q15_t)0x3d89, (q15_t)0x2e75, (q15_t)0x3d8d,\n    (q15_t)0x2e81, (q15_t)0x3d90, (q15_t)0x2e8d, (q15_t)0x3d93, (q15_t)0x2e99,\n    (q15_t)0x3d97, (q15_t)0x2ea6, (q15_t)0x3d9a, (q15_t)0x2eb2, (q15_t)0x3d9e,\n    (q15_t)0x2ebe, (q15_t)0x3da1, (q15_t)0x2eca, (q15_t)0x3da4, (q15_t)0x2ed6,\n    (q15_t)0x3da8, (q15_t)0x2ee2, (q15_t)0x3dab, (q15_t)0x2eee, (q15_t)0x3daf,\n    (q15_t)0x2efa, (q15_t)0x3db2, (q15_t)0x2f06, (q15_t)0x3db5, (q15_t)0x2f13,\n    (q15_t)0x3db9, (q15_t)0x2f1f, (q15_t)0x3dbc, (q15_t)0x2f2b, (q15_t)0x3dbf,\n    (q15_t)0x2f37, (q15_t)0x3dc2, (q15_t)0x2f43, (q15_t)0x3dc6, (q15_t)0x2f4f,\n    (q15_t)0x3dc9, (q15_t)0x2f5b, (q15_t)0x3dcc, (q15_t)0x2f67, (q15_t)0x3dd0,\n    (q15_t)0x2f74, (q15_t)0x3dd3, (q15_t)0x2f80, (q15_t)0x3dd6, (q15_t)0x2f8c,\n    (q15_t)0x3dd9, (q15_t)0x2f98, (q15_t)0x3ddd, (q15_t)0x2fa4, (q15_t)0x3de0,\n    (q15_t)0x2fb0, (q15_t)0x3de3, (q15_t)0x2fbc, (q15_t)0x3de6, (q15_t)0x2fc9,\n    (q15_t)0x3de9, (q15_t)0x2fd5, (q15_t)0x3ded, (q15_t)0x2fe1, (q15_t)0x3df0,\n    (q15_t)0x2fed, (q15_t)0x3df3, (q15_t)0x2ff9, (q15_t)0x3df6, (q15_t)0x3005,\n    (q15_t)0x3df9, (q15_t)0x3012, (q15_t)0x3dfc, (q15_t)0x301e, (q15_t)0x3dff,\n    (q15_t)0x302a, (q15_t)0x3e03, (q15_t)0x3036, (q15_t)0x3e06, (q15_t)0x3042,\n    (q15_t)0x3e09, (q15_t)0x304e, (q15_t)0x3e0c, (q15_t)0x305b, (q15_t)0x3e0f,\n    (q15_t)0x3067, (q15_t)0x3e12, (q15_t)0x3073, (q15_t)0x3e15, (q15_t)0x307f,\n    (q15_t)0x3e18, (q15_t)0x308b, (q15_t)0x3e1b, (q15_t)0x3098, (q15_t)0x3e1e,\n    (q15_t)0x30a4, (q15_t)0x3e21, (q15_t)0x30b0, (q15_t)0x3e24, (q15_t)0x30bc,\n    (q15_t)0x3e27, (q15_t)0x30c8, (q15_t)0x3e2a, (q15_t)0x30d5, (q15_t)0x3e2d,\n    (q15_t)0x30e1, (q15_t)0x3e30, (q15_t)0x30ed, (q15_t)0x3e33, (q15_t)0x30f9,\n    (q15_t)0x3e36, (q15_t)0x3105, (q15_t)0x3e39, (q15_t)0x3112, (q15_t)0x3e3c,\n    (q15_t)0x311e, (q15_t)0x3e3f, (q15_t)0x312a, (q15_t)0x3e42, (q15_t)0x3136,\n    (q15_t)0x3e45, (q15_t)0x3143, (q15_t)0x3e48, (q15_t)0x314f, (q15_t)0x3e4a,\n    (q15_t)0x315b, (q15_t)0x3e4d, (q15_t)0x3167, (q15_t)0x3e50, (q15_t)0x3174,\n    (q15_t)0x3e53, (q15_t)0x3180, (q15_t)0x3e56, (q15_t)0x318c, (q15_t)0x3e59,\n    (q15_t)0x3198, (q15_t)0x3e5c, (q15_t)0x31a4, (q15_t)0x3e5e, (q15_t)0x31b1,\n    (q15_t)0x3e61, (q15_t)0x31bd, (q15_t)0x3e64, (q15_t)0x31c9, (q15_t)0x3e67,\n    (q15_t)0x31d5, (q15_t)0x3e6a, (q15_t)0x31e2, (q15_t)0x3e6c, (q15_t)0x31ee,\n    (q15_t)0x3e6f, (q15_t)0x31fa, (q15_t)0x3e72, (q15_t)0x3207, (q15_t)0x3e75,\n    (q15_t)0x3213, (q15_t)0x3e77, (q15_t)0x321f, (q15_t)0x3e7a, (q15_t)0x322b,\n    (q15_t)0x3e7d, (q15_t)0x3238, (q15_t)0x3e80, (q15_t)0x3244, (q15_t)0x3e82,\n    (q15_t)0x3250, (q15_t)0x3e85, (q15_t)0x325c, (q15_t)0x3e88, (q15_t)0x3269,\n    (q15_t)0x3e8a, (q15_t)0x3275, (q15_t)0x3e8d, (q15_t)0x3281, (q15_t)0x3e90,\n    (q15_t)0x328e, (q15_t)0x3e92, (q15_t)0x329a, (q15_t)0x3e95, (q15_t)0x32a6,\n    (q15_t)0x3e98, (q15_t)0x32b2, (q15_t)0x3e9a, (q15_t)0x32bf, (q15_t)0x3e9d,\n    (q15_t)0x32cb, (q15_t)0x3e9f, (q15_t)0x32d7, (q15_t)0x3ea2, (q15_t)0x32e4,\n    (q15_t)0x3ea5, (q15_t)0x32f0, (q15_t)0x3ea7, (q15_t)0x32fc, (q15_t)0x3eaa,\n    (q15_t)0x3308, (q15_t)0x3eac, (q15_t)0x3315, (q15_t)0x3eaf, (q15_t)0x3321,\n    (q15_t)0x3eb1, (q15_t)0x332d, (q15_t)0x3eb4, (q15_t)0x333a, (q15_t)0x3eb6,\n    (q15_t)0x3346, (q15_t)0x3eb9, (q15_t)0x3352, (q15_t)0x3ebb, (q15_t)0x335f,\n    (q15_t)0x3ebe, (q15_t)0x336b, (q15_t)0x3ec0, (q15_t)0x3377, (q15_t)0x3ec3,\n    (q15_t)0x3384, (q15_t)0x3ec5, (q15_t)0x3390, (q15_t)0x3ec8, (q15_t)0x339c,\n    (q15_t)0x3eca, (q15_t)0x33a9, (q15_t)0x3ecc, (q15_t)0x33b5, (q15_t)0x3ecf,\n    (q15_t)0x33c1, (q15_t)0x3ed1, (q15_t)0x33ce, (q15_t)0x3ed4, (q15_t)0x33da,\n    (q15_t)0x3ed6, (q15_t)0x33e6, (q15_t)0x3ed8, (q15_t)0x33f3, (q15_t)0x3edb,\n    (q15_t)0x33ff, (q15_t)0x3edd, (q15_t)0x340b, (q15_t)0x3ee0, (q15_t)0x3418,\n    (q15_t)0x3ee2, (q15_t)0x3424, (q15_t)0x3ee4, (q15_t)0x3430, (q15_t)0x3ee7,\n    (q15_t)0x343d, (q15_t)0x3ee9, (q15_t)0x3449, (q15_t)0x3eeb, (q15_t)0x3455,\n    (q15_t)0x3eed, (q15_t)0x3462, (q15_t)0x3ef0, (q15_t)0x346e, (q15_t)0x3ef2,\n    (q15_t)0x347b, (q15_t)0x3ef4, (q15_t)0x3487, (q15_t)0x3ef7, (q15_t)0x3493,\n    (q15_t)0x3ef9, (q15_t)0x34a0, (q15_t)0x3efb, (q15_t)0x34ac, (q15_t)0x3efd,\n    (q15_t)0x34b8, (q15_t)0x3f00, (q15_t)0x34c5, (q15_t)0x3f02, (q15_t)0x34d1,\n    (q15_t)0x3f04, (q15_t)0x34dd, (q15_t)0x3f06, (q15_t)0x34ea, (q15_t)0x3f08,\n    (q15_t)0x34f6, (q15_t)0x3f0a, (q15_t)0x3503, (q15_t)0x3f0d, (q15_t)0x350f,\n    (q15_t)0x3f0f, (q15_t)0x351b, (q15_t)0x3f11, (q15_t)0x3528, (q15_t)0x3f13,\n    (q15_t)0x3534, (q15_t)0x3f15, (q15_t)0x3540, (q15_t)0x3f17, (q15_t)0x354d,\n    (q15_t)0x3f19, (q15_t)0x3559, (q15_t)0x3f1c, (q15_t)0x3566, (q15_t)0x3f1e,\n    (q15_t)0x3572, (q15_t)0x3f20, (q15_t)0x357e, (q15_t)0x3f22, (q15_t)0x358b,\n    (q15_t)0x3f24, (q15_t)0x3597, (q15_t)0x3f26, (q15_t)0x35a4, (q15_t)0x3f28,\n    (q15_t)0x35b0, (q15_t)0x3f2a, (q15_t)0x35bc, (q15_t)0x3f2c, (q15_t)0x35c9,\n    (q15_t)0x3f2e, (q15_t)0x35d5, (q15_t)0x3f30, (q15_t)0x35e2, (q15_t)0x3f32,\n    (q15_t)0x35ee, (q15_t)0x3f34, (q15_t)0x35fa, (q15_t)0x3f36, (q15_t)0x3607,\n    (q15_t)0x3f38, (q15_t)0x3613, (q15_t)0x3f3a, (q15_t)0x3620, (q15_t)0x3f3c,\n    (q15_t)0x362c, (q15_t)0x3f3e, (q15_t)0x3639, (q15_t)0x3f40, (q15_t)0x3645,\n    (q15_t)0x3f42, (q15_t)0x3651, (q15_t)0x3f43, (q15_t)0x365e, (q15_t)0x3f45,\n    (q15_t)0x366a, (q15_t)0x3f47, (q15_t)0x3677, (q15_t)0x3f49, (q15_t)0x3683,\n    (q15_t)0x3f4b, (q15_t)0x3690, (q15_t)0x3f4d, (q15_t)0x369c, (q15_t)0x3f4f,\n    (q15_t)0x36a8, (q15_t)0x3f51, (q15_t)0x36b5, (q15_t)0x3f52, (q15_t)0x36c1,\n    (q15_t)0x3f54, (q15_t)0x36ce, (q15_t)0x3f56, (q15_t)0x36da, (q15_t)0x3f58,\n    (q15_t)0x36e7, (q15_t)0x3f5a, (q15_t)0x36f3, (q15_t)0x3f5b, (q15_t)0x36ff,\n    (q15_t)0x3f5d, (q15_t)0x370c, (q15_t)0x3f5f, (q15_t)0x3718, (q15_t)0x3f61,\n    (q15_t)0x3725, (q15_t)0x3f62, (q15_t)0x3731, (q15_t)0x3f64, (q15_t)0x373e,\n    (q15_t)0x3f66, (q15_t)0x374a, (q15_t)0x3f68, (q15_t)0x3757, (q15_t)0x3f69,\n    (q15_t)0x3763, (q15_t)0x3f6b, (q15_t)0x376f, (q15_t)0x3f6d, (q15_t)0x377c,\n    (q15_t)0x3f6e, (q15_t)0x3788, (q15_t)0x3f70, (q15_t)0x3795, (q15_t)0x3f72,\n    (q15_t)0x37a1, (q15_t)0x3f73, (q15_t)0x37ae, (q15_t)0x3f75, (q15_t)0x37ba,\n    (q15_t)0x3f77, (q15_t)0x37c7, (q15_t)0x3f78, (q15_t)0x37d3, (q15_t)0x3f7a,\n    (q15_t)0x37e0, (q15_t)0x3f7b, (q15_t)0x37ec, (q15_t)0x3f7d, (q15_t)0x37f9,\n    (q15_t)0x3f7f, (q15_t)0x3805, (q15_t)0x3f80, (q15_t)0x3811, (q15_t)0x3f82,\n    (q15_t)0x381e, (q15_t)0x3f83, (q15_t)0x382a, (q15_t)0x3f85, (q15_t)0x3837,\n    (q15_t)0x3f86, (q15_t)0x3843, (q15_t)0x3f88, (q15_t)0x3850, (q15_t)0x3f89,\n    (q15_t)0x385c, (q15_t)0x3f8b, (q15_t)0x3869, (q15_t)0x3f8c, (q15_t)0x3875,\n    (q15_t)0x3f8e, (q15_t)0x3882, (q15_t)0x3f8f, (q15_t)0x388e, (q15_t)0x3f91,\n    (q15_t)0x389b, (q15_t)0x3f92, (q15_t)0x38a7, (q15_t)0x3f94, (q15_t)0x38b4,\n    (q15_t)0x3f95, (q15_t)0x38c0, (q15_t)0x3f97, (q15_t)0x38cd, (q15_t)0x3f98,\n    (q15_t)0x38d9, (q15_t)0x3f99, (q15_t)0x38e6, (q15_t)0x3f9b, (q15_t)0x38f2,\n    (q15_t)0x3f9c, (q15_t)0x38ff, (q15_t)0x3f9e, (q15_t)0x390b, (q15_t)0x3f9f,\n    (q15_t)0x3918, (q15_t)0x3fa0, (q15_t)0x3924, (q15_t)0x3fa2, (q15_t)0x3931,\n    (q15_t)0x3fa3, (q15_t)0x393d, (q15_t)0x3fa4, (q15_t)0x394a, (q15_t)0x3fa6,\n    (q15_t)0x3956, (q15_t)0x3fa7, (q15_t)0x3963, (q15_t)0x3fa8, (q15_t)0x396f,\n    (q15_t)0x3faa, (q15_t)0x397c, (q15_t)0x3fab, (q15_t)0x3988, (q15_t)0x3fac,\n    (q15_t)0x3995, (q15_t)0x3fad, (q15_t)0x39a1, (q15_t)0x3faf, (q15_t)0x39ae,\n    (q15_t)0x3fb0, (q15_t)0x39ba, (q15_t)0x3fb1, (q15_t)0x39c7, (q15_t)0x3fb2,\n    (q15_t)0x39d3, (q15_t)0x3fb4, (q15_t)0x39e0, (q15_t)0x3fb5, (q15_t)0x39ec,\n    (q15_t)0x3fb6, (q15_t)0x39f9, (q15_t)0x3fb7, (q15_t)0x3a05, (q15_t)0x3fb8,\n    (q15_t)0x3a12, (q15_t)0x3fb9, (q15_t)0x3a1e, (q15_t)0x3fbb, (q15_t)0x3a2b,\n    (q15_t)0x3fbc, (q15_t)0x3a37, (q15_t)0x3fbd, (q15_t)0x3a44, (q15_t)0x3fbe,\n    (q15_t)0x3a50, (q15_t)0x3fbf, (q15_t)0x3a5d, (q15_t)0x3fc0, (q15_t)0x3a69,\n    (q15_t)0x3fc1, (q15_t)0x3a76, (q15_t)0x3fc3, (q15_t)0x3a82, (q15_t)0x3fc4,\n    (q15_t)0x3a8f, (q15_t)0x3fc5, (q15_t)0x3a9b, (q15_t)0x3fc6, (q15_t)0x3aa8,\n    (q15_t)0x3fc7, (q15_t)0x3ab4, (q15_t)0x3fc8, (q15_t)0x3ac1, (q15_t)0x3fc9,\n    (q15_t)0x3acd, (q15_t)0x3fca, (q15_t)0x3ada, (q15_t)0x3fcb, (q15_t)0x3ae6,\n    (q15_t)0x3fcc, (q15_t)0x3af3, (q15_t)0x3fcd, (q15_t)0x3b00, (q15_t)0x3fce,\n    (q15_t)0x3b0c, (q15_t)0x3fcf, (q15_t)0x3b19, (q15_t)0x3fd0, (q15_t)0x3b25,\n    (q15_t)0x3fd1, (q15_t)0x3b32, (q15_t)0x3fd2, (q15_t)0x3b3e, (q15_t)0x3fd3,\n    (q15_t)0x3b4b, (q15_t)0x3fd4, (q15_t)0x3b57, (q15_t)0x3fd5, (q15_t)0x3b64,\n    (q15_t)0x3fd5, (q15_t)0x3b70, (q15_t)0x3fd6, (q15_t)0x3b7d, (q15_t)0x3fd7,\n    (q15_t)0x3b89, (q15_t)0x3fd8, (q15_t)0x3b96, (q15_t)0x3fd9, (q15_t)0x3ba2,\n    (q15_t)0x3fda, (q15_t)0x3baf, (q15_t)0x3fdb, (q15_t)0x3bbc, (q15_t)0x3fdc,\n    (q15_t)0x3bc8, (q15_t)0x3fdc, (q15_t)0x3bd5, (q15_t)0x3fdd, (q15_t)0x3be1,\n    (q15_t)0x3fde, (q15_t)0x3bee, (q15_t)0x3fdf, (q15_t)0x3bfa, (q15_t)0x3fe0,\n    (q15_t)0x3c07, (q15_t)0x3fe0, (q15_t)0x3c13, (q15_t)0x3fe1, (q15_t)0x3c20,\n    (q15_t)0x3fe2, (q15_t)0x3c2c, (q15_t)0x3fe3, (q15_t)0x3c39, (q15_t)0x3fe3,\n    (q15_t)0x3c45, (q15_t)0x3fe4, (q15_t)0x3c52, (q15_t)0x3fe5, (q15_t)0x3c5f,\n    (q15_t)0x3fe6, (q15_t)0x3c6b, (q15_t)0x3fe6, (q15_t)0x3c78, (q15_t)0x3fe7,\n    (q15_t)0x3c84, (q15_t)0x3fe8, (q15_t)0x3c91, (q15_t)0x3fe8, (q15_t)0x3c9d,\n    (q15_t)0x3fe9, (q15_t)0x3caa, (q15_t)0x3fea, (q15_t)0x3cb6, (q15_t)0x3fea,\n    (q15_t)0x3cc3, (q15_t)0x3feb, (q15_t)0x3cd0, (q15_t)0x3fec, (q15_t)0x3cdc,\n    (q15_t)0x3fec, (q15_t)0x3ce9, (q15_t)0x3fed, (q15_t)0x3cf5, (q15_t)0x3fed,\n    (q15_t)0x3d02, (q15_t)0x3fee, (q15_t)0x3d0e, (q15_t)0x3fef, (q15_t)0x3d1b,\n    (q15_t)0x3fef, (q15_t)0x3d27, (q15_t)0x3ff0, (q15_t)0x3d34, (q15_t)0x3ff0,\n    (q15_t)0x3d40, (q15_t)0x3ff1, (q15_t)0x3d4d, (q15_t)0x3ff1, (q15_t)0x3d5a,\n    (q15_t)0x3ff2, (q15_t)0x3d66, (q15_t)0x3ff2, (q15_t)0x3d73, (q15_t)0x3ff3,\n    (q15_t)0x3d7f, (q15_t)0x3ff3, (q15_t)0x3d8c, (q15_t)0x3ff4, (q15_t)0x3d98,\n    (q15_t)0x3ff4, (q15_t)0x3da5, (q15_t)0x3ff5, (q15_t)0x3db2, (q15_t)0x3ff5,\n    (q15_t)0x3dbe, (q15_t)0x3ff6, (q15_t)0x3dcb, (q15_t)0x3ff6, (q15_t)0x3dd7,\n    (q15_t)0x3ff7, (q15_t)0x3de4, (q15_t)0x3ff7, (q15_t)0x3df0, (q15_t)0x3ff7,\n    (q15_t)0x3dfd, (q15_t)0x3ff8, (q15_t)0x3e09, (q15_t)0x3ff8, (q15_t)0x3e16,\n    (q15_t)0x3ff9, (q15_t)0x3e23, (q15_t)0x3ff9, (q15_t)0x3e2f, (q15_t)0x3ff9,\n    (q15_t)0x3e3c, (q15_t)0x3ffa, (q15_t)0x3e48, (q15_t)0x3ffa, (q15_t)0x3e55,\n    (q15_t)0x3ffa, (q15_t)0x3e61, (q15_t)0x3ffb, (q15_t)0x3e6e, (q15_t)0x3ffb,\n    (q15_t)0x3e7a, (q15_t)0x3ffb, (q15_t)0x3e87, (q15_t)0x3ffc, (q15_t)0x3e94,\n    (q15_t)0x3ffc, (q15_t)0x3ea0, (q15_t)0x3ffc, (q15_t)0x3ead, (q15_t)0x3ffc,\n    (q15_t)0x3eb9, (q15_t)0x3ffd, (q15_t)0x3ec6, (q15_t)0x3ffd, (q15_t)0x3ed2,\n    (q15_t)0x3ffd, (q15_t)0x3edf, (q15_t)0x3ffd, (q15_t)0x3eec, (q15_t)0x3ffe,\n    (q15_t)0x3ef8, (q15_t)0x3ffe, (q15_t)0x3f05, (q15_t)0x3ffe, (q15_t)0x3f11,\n    (q15_t)0x3ffe, (q15_t)0x3f1e, (q15_t)0x3ffe, (q15_t)0x3f2a, (q15_t)0x3fff,\n    (q15_t)0x3f37, (q15_t)0x3fff, (q15_t)0x3f44, (q15_t)0x3fff, (q15_t)0x3f50,\n    (q15_t)0x3fff, (q15_t)0x3f5d, (q15_t)0x3fff, (q15_t)0x3f69, (q15_t)0x3fff,\n    (q15_t)0x3f76, (q15_t)0x3fff, (q15_t)0x3f82, (q15_t)0x4000, (q15_t)0x3f8f,\n    (q15_t)0x4000, (q15_t)0x3f9b, (q15_t)0x4000, (q15_t)0x3fa8, (q15_t)0x4000,\n    (q15_t)0x3fb5, (q15_t)0x4000, (q15_t)0x3fc1, (q15_t)0x4000, (q15_t)0x3fce,\n    (q15_t)0x4000, (q15_t)0x3fda, (q15_t)0x4000, (q15_t)0x3fe7, (q15_t)0x4000,\n    (q15_t)0x3ff3, (q15_t)0x4000,\n};\n\n/**\n  @par\n  Generation of real_CoefB array:\n  @par\n  n = 4096\n  
for (i = 0; i < n; i++)\n  {\n     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double)\n  i)); pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) *\n  (double) i));\n  }
\n  @par\n  Convert to fixed point Q15 format\n        round(pBTable[i] * pow(2, 15))\n*/\nconst q15_t __ALIGNED(4) realCoefBQ15[8192] = {\n    (q15_t)0x4000, (q15_t)0x4000, (q15_t)0x400d, (q15_t)0x4000, (q15_t)0x4019,\n    (q15_t)0x4000, (q15_t)0x4026, (q15_t)0x4000, (q15_t)0x4032, (q15_t)0x4000,\n    (q15_t)0x403f, (q15_t)0x4000, (q15_t)0x404b, (q15_t)0x4000, (q15_t)0x4058,\n    (q15_t)0x4000, (q15_t)0x4065, (q15_t)0x4000, (q15_t)0x4071, (q15_t)0x4000,\n    (q15_t)0x407e, (q15_t)0x4000, (q15_t)0x408a, (q15_t)0x3fff, (q15_t)0x4097,\n    (q15_t)0x3fff, (q15_t)0x40a3, (q15_t)0x3fff, (q15_t)0x40b0, (q15_t)0x3fff,\n    (q15_t)0x40bc, (q15_t)0x3fff, (q15_t)0x40c9, (q15_t)0x3fff, (q15_t)0x40d6,\n    (q15_t)0x3fff, (q15_t)0x40e2, (q15_t)0x3ffe, (q15_t)0x40ef, (q15_t)0x3ffe,\n    (q15_t)0x40fb, (q15_t)0x3ffe, (q15_t)0x4108, (q15_t)0x3ffe, (q15_t)0x4114,\n    (q15_t)0x3ffe, (q15_t)0x4121, (q15_t)0x3ffd, (q15_t)0x412e, (q15_t)0x3ffd,\n    (q15_t)0x413a, (q15_t)0x3ffd, (q15_t)0x4147, (q15_t)0x3ffd, (q15_t)0x4153,\n    (q15_t)0x3ffc, (q15_t)0x4160, (q15_t)0x3ffc, (q15_t)0x416c, (q15_t)0x3ffc,\n    (q15_t)0x4179, (q15_t)0x3ffc, (q15_t)0x4186, (q15_t)0x3ffb, (q15_t)0x4192,\n    (q15_t)0x3ffb, (q15_t)0x419f, (q15_t)0x3ffb, (q15_t)0x41ab, (q15_t)0x3ffa,\n    (q15_t)0x41b8, (q15_t)0x3ffa, (q15_t)0x41c4, (q15_t)0x3ffa, (q15_t)0x41d1,\n    (q15_t)0x3ff9, (q15_t)0x41dd, (q15_t)0x3ff9, (q15_t)0x41ea, (q15_t)0x3ff9,\n    (q15_t)0x41f7, (q15_t)0x3ff8, (q15_t)0x4203, (q15_t)0x3ff8, (q15_t)0x4210,\n    (q15_t)0x3ff7, (q15_t)0x421c, (q15_t)0x3ff7, (q15_t)0x4229, (q15_t)0x3ff7,\n    (q15_t)0x4235, (q15_t)0x3ff6, (q15_t)0x4242, (q15_t)0x3ff6, (q15_t)0x424e,\n    (q15_t)0x3ff5, (q15_t)0x425b, (q15_t)0x3ff5, (q15_t)0x4268, (q15_t)0x3ff4,\n    (q15_t)0x4274, (q15_t)0x3ff4, (q15_t)0x4281, (q15_t)0x3ff3, (q15_t)0x428d,\n    (q15_t)0x3ff3, (q15_t)0x429a, (q15_t)0x3ff2, (q15_t)0x42a6, (q15_t)0x3ff2,\n    (q15_t)0x42b3, (q15_t)0x3ff1, (q15_t)0x42c0, (q15_t)0x3ff1, (q15_t)0x42cc,\n    (q15_t)0x3ff0, (q15_t)0x42d9, (q15_t)0x3ff0, (q15_t)0x42e5, (q15_t)0x3fef,\n    (q15_t)0x42f2, (q15_t)0x3fef, (q15_t)0x42fe, (q15_t)0x3fee, (q15_t)0x430b,\n    (q15_t)0x3fed, (q15_t)0x4317, (q15_t)0x3fed, (q15_t)0x4324, (q15_t)0x3fec,\n    (q15_t)0x4330, (q15_t)0x3fec, (q15_t)0x433d, (q15_t)0x3feb, (q15_t)0x434a,\n    (q15_t)0x3fea, (q15_t)0x4356, (q15_t)0x3fea, (q15_t)0x4363, (q15_t)0x3fe9,\n    (q15_t)0x436f, (q15_t)0x3fe8, (q15_t)0x437c, (q15_t)0x3fe8, (q15_t)0x4388,\n    (q15_t)0x3fe7, (q15_t)0x4395, (q15_t)0x3fe6, (q15_t)0x43a1, (q15_t)0x3fe6,\n    (q15_t)0x43ae, (q15_t)0x3fe5, (q15_t)0x43bb, (q15_t)0x3fe4, (q15_t)0x43c7,\n    (q15_t)0x3fe3, (q15_t)0x43d4, (q15_t)0x3fe3, (q15_t)0x43e0, (q15_t)0x3fe2,\n    (q15_t)0x43ed, (q15_t)0x3fe1, (q15_t)0x43f9, (q15_t)0x3fe0, (q15_t)0x4406,\n    (q15_t)0x3fe0, (q15_t)0x4412, (q15_t)0x3fdf, (q15_t)0x441f, (q15_t)0x3fde,\n    (q15_t)0x442b, (q15_t)0x3fdd, (q15_t)0x4438, (q15_t)0x3fdc, (q15_t)0x4444,\n    (q15_t)0x3fdc, (q15_t)0x4451, (q15_t)0x3fdb, (q15_t)0x445e, (q15_t)0x3fda,\n    (q15_t)0x446a, (q15_t)0x3fd9, (q15_t)0x4477, (q15_t)0x3fd8, (q15_t)0x4483,\n    (q15_t)0x3fd7, (q15_t)0x4490, (q15_t)0x3fd6, (q15_t)0x449c, (q15_t)0x3fd5,\n    (q15_t)0x44a9, (q15_t)0x3fd5, (q15_t)0x44b5, (q15_t)0x3fd4, (q15_t)0x44c2,\n    (q15_t)0x3fd3, (q15_t)0x44ce, (q15_t)0x3fd2, (q15_t)0x44db, (q15_t)0x3fd1,\n    (q15_t)0x44e7, (q15_t)0x3fd0, (q15_t)0x44f4, (q15_t)0x3fcf, (q15_t)0x4500,\n    (q15_t)0x3fce, (q15_t)0x450d, (q15_t)0x3fcd, (q15_t)0x451a, (q15_t)0x3fcc,\n    (q15_t)0x4526, (q15_t)0x3fcb, (q15_t)0x4533, (q15_t)0x3fca, (q15_t)0x453f,\n    (q15_t)0x3fc9, (q15_t)0x454c, (q15_t)0x3fc8, (q15_t)0x4558, (q15_t)0x3fc7,\n    (q15_t)0x4565, (q15_t)0x3fc6, (q15_t)0x4571, (q15_t)0x3fc5, (q15_t)0x457e,\n    (q15_t)0x3fc4, (q15_t)0x458a, (q15_t)0x3fc3, (q15_t)0x4597, (q15_t)0x3fc1,\n    (q15_t)0x45a3, (q15_t)0x3fc0, (q15_t)0x45b0, (q15_t)0x3fbf, (q15_t)0x45bc,\n    (q15_t)0x3fbe, (q15_t)0x45c9, (q15_t)0x3fbd, (q15_t)0x45d5, (q15_t)0x3fbc,\n    (q15_t)0x45e2, (q15_t)0x3fbb, (q15_t)0x45ee, (q15_t)0x3fb9, (q15_t)0x45fb,\n    (q15_t)0x3fb8, (q15_t)0x4607, (q15_t)0x3fb7, (q15_t)0x4614, (q15_t)0x3fb6,\n    (q15_t)0x4620, (q15_t)0x3fb5, (q15_t)0x462d, (q15_t)0x3fb4, (q15_t)0x4639,\n    (q15_t)0x3fb2, (q15_t)0x4646, (q15_t)0x3fb1, (q15_t)0x4652, (q15_t)0x3fb0,\n    (q15_t)0x465f, (q15_t)0x3faf, (q15_t)0x466b, (q15_t)0x3fad, (q15_t)0x4678,\n    (q15_t)0x3fac, (q15_t)0x4684, (q15_t)0x3fab, (q15_t)0x4691, (q15_t)0x3faa,\n    (q15_t)0x469d, (q15_t)0x3fa8, (q15_t)0x46aa, (q15_t)0x3fa7, (q15_t)0x46b6,\n    (q15_t)0x3fa6, (q15_t)0x46c3, (q15_t)0x3fa4, (q15_t)0x46cf, (q15_t)0x3fa3,\n    (q15_t)0x46dc, (q15_t)0x3fa2, (q15_t)0x46e8, (q15_t)0x3fa0, (q15_t)0x46f5,\n    (q15_t)0x3f9f, (q15_t)0x4701, (q15_t)0x3f9e, (q15_t)0x470e, (q15_t)0x3f9c,\n    (q15_t)0x471a, (q15_t)0x3f9b, (q15_t)0x4727, (q15_t)0x3f99, (q15_t)0x4733,\n    (q15_t)0x3f98, (q15_t)0x4740, (q15_t)0x3f97, (q15_t)0x474c, (q15_t)0x3f95,\n    (q15_t)0x4759, (q15_t)0x3f94, (q15_t)0x4765, (q15_t)0x3f92, (q15_t)0x4772,\n    (q15_t)0x3f91, (q15_t)0x477e, (q15_t)0x3f8f, (q15_t)0x478b, (q15_t)0x3f8e,\n    (q15_t)0x4797, (q15_t)0x3f8c, (q15_t)0x47a4, (q15_t)0x3f8b, (q15_t)0x47b0,\n    (q15_t)0x3f89, (q15_t)0x47bd, (q15_t)0x3f88, (q15_t)0x47c9, (q15_t)0x3f86,\n    (q15_t)0x47d6, (q15_t)0x3f85, (q15_t)0x47e2, (q15_t)0x3f83, (q15_t)0x47ef,\n    (q15_t)0x3f82, (q15_t)0x47fb, (q15_t)0x3f80, (q15_t)0x4807, (q15_t)0x3f7f,\n    (q15_t)0x4814, (q15_t)0x3f7d, (q15_t)0x4820, (q15_t)0x3f7b, (q15_t)0x482d,\n    (q15_t)0x3f7a, (q15_t)0x4839, (q15_t)0x3f78, (q15_t)0x4846, (q15_t)0x3f77,\n    (q15_t)0x4852, (q15_t)0x3f75, (q15_t)0x485f, (q15_t)0x3f73, (q15_t)0x486b,\n    (q15_t)0x3f72, (q15_t)0x4878, (q15_t)0x3f70, (q15_t)0x4884, (q15_t)0x3f6e,\n    (q15_t)0x4891, (q15_t)0x3f6d, (q15_t)0x489d, (q15_t)0x3f6b, (q15_t)0x48a9,\n    (q15_t)0x3f69, (q15_t)0x48b6, (q15_t)0x3f68, (q15_t)0x48c2, (q15_t)0x3f66,\n    (q15_t)0x48cf, (q15_t)0x3f64, (q15_t)0x48db, (q15_t)0x3f62, (q15_t)0x48e8,\n    (q15_t)0x3f61, (q15_t)0x48f4, (q15_t)0x3f5f, (q15_t)0x4901, (q15_t)0x3f5d,\n    (q15_t)0x490d, (q15_t)0x3f5b, (q15_t)0x4919, (q15_t)0x3f5a, (q15_t)0x4926,\n    (q15_t)0x3f58, (q15_t)0x4932, (q15_t)0x3f56, (q15_t)0x493f, (q15_t)0x3f54,\n    (q15_t)0x494b, (q15_t)0x3f52, (q15_t)0x4958, (q15_t)0x3f51, (q15_t)0x4964,\n    (q15_t)0x3f4f, (q15_t)0x4970, (q15_t)0x3f4d, (q15_t)0x497d, (q15_t)0x3f4b,\n    (q15_t)0x4989, (q15_t)0x3f49, (q15_t)0x4996, (q15_t)0x3f47, (q15_t)0x49a2,\n    (q15_t)0x3f45, (q15_t)0x49af, (q15_t)0x3f43, (q15_t)0x49bb, (q15_t)0x3f42,\n    (q15_t)0x49c7, (q15_t)0x3f40, (q15_t)0x49d4, (q15_t)0x3f3e, (q15_t)0x49e0,\n    (q15_t)0x3f3c, (q15_t)0x49ed, (q15_t)0x3f3a, (q15_t)0x49f9, (q15_t)0x3f38,\n    (q15_t)0x4a06, (q15_t)0x3f36, (q15_t)0x4a12, (q15_t)0x3f34, (q15_t)0x4a1e,\n    (q15_t)0x3f32, (q15_t)0x4a2b, (q15_t)0x3f30, (q15_t)0x4a37, (q15_t)0x3f2e,\n    (q15_t)0x4a44, (q15_t)0x3f2c, (q15_t)0x4a50, (q15_t)0x3f2a, (q15_t)0x4a5c,\n    (q15_t)0x3f28, (q15_t)0x4a69, (q15_t)0x3f26, (q15_t)0x4a75, (q15_t)0x3f24,\n    (q15_t)0x4a82, (q15_t)0x3f22, (q15_t)0x4a8e, (q15_t)0x3f20, (q15_t)0x4a9a,\n    (q15_t)0x3f1e, (q15_t)0x4aa7, (q15_t)0x3f1c, (q15_t)0x4ab3, (q15_t)0x3f19,\n    (q15_t)0x4ac0, (q15_t)0x3f17, (q15_t)0x4acc, (q15_t)0x3f15, (q15_t)0x4ad8,\n    (q15_t)0x3f13, (q15_t)0x4ae5, (q15_t)0x3f11, (q15_t)0x4af1, (q15_t)0x3f0f,\n    (q15_t)0x4afd, (q15_t)0x3f0d, (q15_t)0x4b0a, (q15_t)0x3f0a, (q15_t)0x4b16,\n    (q15_t)0x3f08, (q15_t)0x4b23, (q15_t)0x3f06, (q15_t)0x4b2f, (q15_t)0x3f04,\n    (q15_t)0x4b3b, (q15_t)0x3f02, (q15_t)0x4b48, (q15_t)0x3f00, (q15_t)0x4b54,\n    (q15_t)0x3efd, (q15_t)0x4b60, (q15_t)0x3efb, (q15_t)0x4b6d, (q15_t)0x3ef9,\n    (q15_t)0x4b79, (q15_t)0x3ef7, (q15_t)0x4b85, (q15_t)0x3ef4, (q15_t)0x4b92,\n    (q15_t)0x3ef2, (q15_t)0x4b9e, (q15_t)0x3ef0, (q15_t)0x4bab, (q15_t)0x3eed,\n    (q15_t)0x4bb7, (q15_t)0x3eeb, (q15_t)0x4bc3, (q15_t)0x3ee9, (q15_t)0x4bd0,\n    (q15_t)0x3ee7, (q15_t)0x4bdc, (q15_t)0x3ee4, (q15_t)0x4be8, (q15_t)0x3ee2,\n    (q15_t)0x4bf5, (q15_t)0x3ee0, (q15_t)0x4c01, (q15_t)0x3edd, (q15_t)0x4c0d,\n    (q15_t)0x3edb, (q15_t)0x4c1a, (q15_t)0x3ed8, (q15_t)0x4c26, (q15_t)0x3ed6,\n    (q15_t)0x4c32, (q15_t)0x3ed4, (q15_t)0x4c3f, (q15_t)0x3ed1, (q15_t)0x4c4b,\n    (q15_t)0x3ecf, (q15_t)0x4c57, (q15_t)0x3ecc, (q15_t)0x4c64, (q15_t)0x3eca,\n    (q15_t)0x4c70, (q15_t)0x3ec8, (q15_t)0x4c7c, (q15_t)0x3ec5, (q15_t)0x4c89,\n    (q15_t)0x3ec3, (q15_t)0x4c95, (q15_t)0x3ec0, (q15_t)0x4ca1, (q15_t)0x3ebe,\n    (q15_t)0x4cae, (q15_t)0x3ebb, (q15_t)0x4cba, (q15_t)0x3eb9, (q15_t)0x4cc6,\n    (q15_t)0x3eb6, (q15_t)0x4cd3, (q15_t)0x3eb4, (q15_t)0x4cdf, (q15_t)0x3eb1,\n    (q15_t)0x4ceb, (q15_t)0x3eaf, (q15_t)0x4cf8, (q15_t)0x3eac, (q15_t)0x4d04,\n    (q15_t)0x3eaa, (q15_t)0x4d10, (q15_t)0x3ea7, (q15_t)0x4d1c, (q15_t)0x3ea5,\n    (q15_t)0x4d29, (q15_t)0x3ea2, (q15_t)0x4d35, (q15_t)0x3e9f, (q15_t)0x4d41,\n    (q15_t)0x3e9d, (q15_t)0x4d4e, (q15_t)0x3e9a, (q15_t)0x4d5a, (q15_t)0x3e98,\n    (q15_t)0x4d66, (q15_t)0x3e95, (q15_t)0x4d72, (q15_t)0x3e92, (q15_t)0x4d7f,\n    (q15_t)0x3e90, (q15_t)0x4d8b, (q15_t)0x3e8d, (q15_t)0x4d97, (q15_t)0x3e8a,\n    (q15_t)0x4da4, (q15_t)0x3e88, (q15_t)0x4db0, (q15_t)0x3e85, (q15_t)0x4dbc,\n    (q15_t)0x3e82, (q15_t)0x4dc8, (q15_t)0x3e80, (q15_t)0x4dd5, (q15_t)0x3e7d,\n    (q15_t)0x4de1, (q15_t)0x3e7a, (q15_t)0x4ded, (q15_t)0x3e77, (q15_t)0x4df9,\n    (q15_t)0x3e75, (q15_t)0x4e06, (q15_t)0x3e72, (q15_t)0x4e12, (q15_t)0x3e6f,\n    (q15_t)0x4e1e, (q15_t)0x3e6c, (q15_t)0x4e2b, (q15_t)0x3e6a, (q15_t)0x4e37,\n    (q15_t)0x3e67, (q15_t)0x4e43, (q15_t)0x3e64, (q15_t)0x4e4f, (q15_t)0x3e61,\n    (q15_t)0x4e5c, (q15_t)0x3e5e, (q15_t)0x4e68, (q15_t)0x3e5c, (q15_t)0x4e74,\n    (q15_t)0x3e59, (q15_t)0x4e80, (q15_t)0x3e56, (q15_t)0x4e8c, (q15_t)0x3e53,\n    (q15_t)0x4e99, (q15_t)0x3e50, (q15_t)0x4ea5, (q15_t)0x3e4d, (q15_t)0x4eb1,\n    (q15_t)0x3e4a, (q15_t)0x4ebd, (q15_t)0x3e48, (q15_t)0x4eca, (q15_t)0x3e45,\n    (q15_t)0x4ed6, (q15_t)0x3e42, (q15_t)0x4ee2, (q15_t)0x3e3f, (q15_t)0x4eee,\n    (q15_t)0x3e3c, (q15_t)0x4efb, (q15_t)0x3e39, (q15_t)0x4f07, (q15_t)0x3e36,\n    (q15_t)0x4f13, (q15_t)0x3e33, (q15_t)0x4f1f, (q15_t)0x3e30, (q15_t)0x4f2b,\n    (q15_t)0x3e2d, (q15_t)0x4f38, (q15_t)0x3e2a, (q15_t)0x4f44, (q15_t)0x3e27,\n    (q15_t)0x4f50, (q15_t)0x3e24, (q15_t)0x4f5c, (q15_t)0x3e21, (q15_t)0x4f68,\n    (q15_t)0x3e1e, (q15_t)0x4f75, (q15_t)0x3e1b, (q15_t)0x4f81, (q15_t)0x3e18,\n    (q15_t)0x4f8d, (q15_t)0x3e15, (q15_t)0x4f99, (q15_t)0x3e12, (q15_t)0x4fa5,\n    (q15_t)0x3e0f, (q15_t)0x4fb2, (q15_t)0x3e0c, (q15_t)0x4fbe, (q15_t)0x3e09,\n    (q15_t)0x4fca, (q15_t)0x3e06, (q15_t)0x4fd6, (q15_t)0x3e03, (q15_t)0x4fe2,\n    (q15_t)0x3dff, (q15_t)0x4fee, (q15_t)0x3dfc, (q15_t)0x4ffb, (q15_t)0x3df9,\n    (q15_t)0x5007, (q15_t)0x3df6, (q15_t)0x5013, (q15_t)0x3df3, (q15_t)0x501f,\n    (q15_t)0x3df0, (q15_t)0x502b, (q15_t)0x3ded, (q15_t)0x5037, (q15_t)0x3de9,\n    (q15_t)0x5044, (q15_t)0x3de6, (q15_t)0x5050, (q15_t)0x3de3, (q15_t)0x505c,\n    (q15_t)0x3de0, (q15_t)0x5068, (q15_t)0x3ddd, (q15_t)0x5074, (q15_t)0x3dd9,\n    (q15_t)0x5080, (q15_t)0x3dd6, (q15_t)0x508c, (q15_t)0x3dd3, (q15_t)0x5099,\n    (q15_t)0x3dd0, (q15_t)0x50a5, (q15_t)0x3dcc, (q15_t)0x50b1, (q15_t)0x3dc9,\n    (q15_t)0x50bd, (q15_t)0x3dc6, (q15_t)0x50c9, (q15_t)0x3dc2, (q15_t)0x50d5,\n    (q15_t)0x3dbf, (q15_t)0x50e1, (q15_t)0x3dbc, (q15_t)0x50ed, (q15_t)0x3db9,\n    (q15_t)0x50fa, (q15_t)0x3db5, (q15_t)0x5106, (q15_t)0x3db2, (q15_t)0x5112,\n    (q15_t)0x3daf, (q15_t)0x511e, (q15_t)0x3dab, (q15_t)0x512a, (q15_t)0x3da8,\n    (q15_t)0x5136, (q15_t)0x3da4, (q15_t)0x5142, (q15_t)0x3da1, (q15_t)0x514e,\n    (q15_t)0x3d9e, (q15_t)0x515a, (q15_t)0x3d9a, (q15_t)0x5167, (q15_t)0x3d97,\n    (q15_t)0x5173, (q15_t)0x3d93, (q15_t)0x517f, (q15_t)0x3d90, (q15_t)0x518b,\n    (q15_t)0x3d8d, (q15_t)0x5197, (q15_t)0x3d89, (q15_t)0x51a3, (q15_t)0x3d86,\n    (q15_t)0x51af, (q15_t)0x3d82, (q15_t)0x51bb, (q15_t)0x3d7f, (q15_t)0x51c7,\n    (q15_t)0x3d7b, (q15_t)0x51d3, (q15_t)0x3d78, (q15_t)0x51df, (q15_t)0x3d74,\n    (q15_t)0x51eb, (q15_t)0x3d71, (q15_t)0x51f7, (q15_t)0x3d6d, (q15_t)0x5204,\n    (q15_t)0x3d6a, (q15_t)0x5210, (q15_t)0x3d66, (q15_t)0x521c, (q15_t)0x3d63,\n    (q15_t)0x5228, (q15_t)0x3d5f, (q15_t)0x5234, (q15_t)0x3d5b, (q15_t)0x5240,\n    (q15_t)0x3d58, (q15_t)0x524c, (q15_t)0x3d54, (q15_t)0x5258, (q15_t)0x3d51,\n    (q15_t)0x5264, (q15_t)0x3d4d, (q15_t)0x5270, (q15_t)0x3d49, (q15_t)0x527c,\n    (q15_t)0x3d46, (q15_t)0x5288, (q15_t)0x3d42, (q15_t)0x5294, (q15_t)0x3d3f,\n    (q15_t)0x52a0, (q15_t)0x3d3b, (q15_t)0x52ac, (q15_t)0x3d37, (q15_t)0x52b8,\n    (q15_t)0x3d34, (q15_t)0x52c4, (q15_t)0x3d30, (q15_t)0x52d0, (q15_t)0x3d2c,\n    (q15_t)0x52dc, (q15_t)0x3d28, (q15_t)0x52e8, (q15_t)0x3d25, (q15_t)0x52f4,\n    (q15_t)0x3d21, (q15_t)0x5300, (q15_t)0x3d1d, (q15_t)0x530c, (q15_t)0x3d1a,\n    (q15_t)0x5318, (q15_t)0x3d16, (q15_t)0x5324, (q15_t)0x3d12, (q15_t)0x5330,\n    (q15_t)0x3d0e, (q15_t)0x533c, (q15_t)0x3d0b, (q15_t)0x5348, (q15_t)0x3d07,\n    (q15_t)0x5354, (q15_t)0x3d03, (q15_t)0x5360, (q15_t)0x3cff, (q15_t)0x536c,\n    (q15_t)0x3cfb, (q15_t)0x5378, (q15_t)0x3cf8, (q15_t)0x5384, (q15_t)0x3cf4,\n    (q15_t)0x5390, (q15_t)0x3cf0, (q15_t)0x539c, (q15_t)0x3cec, (q15_t)0x53a8,\n    (q15_t)0x3ce8, (q15_t)0x53b4, (q15_t)0x3ce4, (q15_t)0x53c0, (q15_t)0x3ce0,\n    (q15_t)0x53cc, (q15_t)0x3cdd, (q15_t)0x53d8, (q15_t)0x3cd9, (q15_t)0x53e4,\n    (q15_t)0x3cd5, (q15_t)0x53f0, (q15_t)0x3cd1, (q15_t)0x53fb, (q15_t)0x3ccd,\n    (q15_t)0x5407, (q15_t)0x3cc9, (q15_t)0x5413, (q15_t)0x3cc5, (q15_t)0x541f,\n    (q15_t)0x3cc1, (q15_t)0x542b, (q15_t)0x3cbd, (q15_t)0x5437, (q15_t)0x3cb9,\n    (q15_t)0x5443, (q15_t)0x3cb5, (q15_t)0x544f, (q15_t)0x3cb1, (q15_t)0x545b,\n    (q15_t)0x3cad, (q15_t)0x5467, (q15_t)0x3ca9, (q15_t)0x5473, (q15_t)0x3ca5,\n    (q15_t)0x547f, (q15_t)0x3ca1, (q15_t)0x548b, (q15_t)0x3c9d, (q15_t)0x5496,\n    (q15_t)0x3c99, (q15_t)0x54a2, (q15_t)0x3c95, (q15_t)0x54ae, (q15_t)0x3c91,\n    (q15_t)0x54ba, (q15_t)0x3c8d, (q15_t)0x54c6, (q15_t)0x3c89, (q15_t)0x54d2,\n    (q15_t)0x3c85, (q15_t)0x54de, (q15_t)0x3c81, (q15_t)0x54ea, (q15_t)0x3c7d,\n    (q15_t)0x54f6, (q15_t)0x3c79, (q15_t)0x5501, (q15_t)0x3c74, (q15_t)0x550d,\n    (q15_t)0x3c70, (q15_t)0x5519, (q15_t)0x3c6c, (q15_t)0x5525, (q15_t)0x3c68,\n    (q15_t)0x5531, (q15_t)0x3c64, (q15_t)0x553d, (q15_t)0x3c60, (q15_t)0x5549,\n    (q15_t)0x3c5b, (q15_t)0x5554, (q15_t)0x3c57, (q15_t)0x5560, (q15_t)0x3c53,\n    (q15_t)0x556c, (q15_t)0x3c4f, (q15_t)0x5578, (q15_t)0x3c4b, (q15_t)0x5584,\n    (q15_t)0x3c46, (q15_t)0x5590, (q15_t)0x3c42, (q15_t)0x559b, (q15_t)0x3c3e,\n    (q15_t)0x55a7, (q15_t)0x3c3a, (q15_t)0x55b3, (q15_t)0x3c36, (q15_t)0x55bf,\n    (q15_t)0x3c31, (q15_t)0x55cb, (q15_t)0x3c2d, (q15_t)0x55d7, (q15_t)0x3c29,\n    (q15_t)0x55e2, (q15_t)0x3c24, (q15_t)0x55ee, (q15_t)0x3c20, (q15_t)0x55fa,\n    (q15_t)0x3c1c, (q15_t)0x5606, (q15_t)0x3c17, (q15_t)0x5612, (q15_t)0x3c13,\n    (q15_t)0x561d, (q15_t)0x3c0f, (q15_t)0x5629, (q15_t)0x3c0a, (q15_t)0x5635,\n    (q15_t)0x3c06, (q15_t)0x5641, (q15_t)0x3c02, (q15_t)0x564c, (q15_t)0x3bfd,\n    (q15_t)0x5658, (q15_t)0x3bf9, (q15_t)0x5664, (q15_t)0x3bf5, (q15_t)0x5670,\n    (q15_t)0x3bf0, (q15_t)0x567c, (q15_t)0x3bec, (q15_t)0x5687, (q15_t)0x3be7,\n    (q15_t)0x5693, (q15_t)0x3be3, (q15_t)0x569f, (q15_t)0x3bde, (q15_t)0x56ab,\n    (q15_t)0x3bda, (q15_t)0x56b6, (q15_t)0x3bd6, (q15_t)0x56c2, (q15_t)0x3bd1,\n    (q15_t)0x56ce, (q15_t)0x3bcd, (q15_t)0x56da, (q15_t)0x3bc8, (q15_t)0x56e5,\n    (q15_t)0x3bc4, (q15_t)0x56f1, (q15_t)0x3bbf, (q15_t)0x56fd, (q15_t)0x3bbb,\n    (q15_t)0x5709, (q15_t)0x3bb6, (q15_t)0x5714, (q15_t)0x3bb2, (q15_t)0x5720,\n    (q15_t)0x3bad, (q15_t)0x572c, (q15_t)0x3ba9, (q15_t)0x5737, (q15_t)0x3ba4,\n    (q15_t)0x5743, (q15_t)0x3b9f, (q15_t)0x574f, (q15_t)0x3b9b, (q15_t)0x575b,\n    (q15_t)0x3b96, (q15_t)0x5766, (q15_t)0x3b92, (q15_t)0x5772, (q15_t)0x3b8d,\n    (q15_t)0x577e, (q15_t)0x3b88, (q15_t)0x5789, (q15_t)0x3b84, (q15_t)0x5795,\n    (q15_t)0x3b7f, (q15_t)0x57a1, (q15_t)0x3b7b, (q15_t)0x57ac, (q15_t)0x3b76,\n    (q15_t)0x57b8, (q15_t)0x3b71, (q15_t)0x57c4, (q15_t)0x3b6d, (q15_t)0x57cf,\n    (q15_t)0x3b68, (q15_t)0x57db, (q15_t)0x3b63, (q15_t)0x57e7, (q15_t)0x3b5f,\n    (q15_t)0x57f2, (q15_t)0x3b5a, (q15_t)0x57fe, (q15_t)0x3b55, (q15_t)0x580a,\n    (q15_t)0x3b50, (q15_t)0x5815, (q15_t)0x3b4c, (q15_t)0x5821, (q15_t)0x3b47,\n    (q15_t)0x582d, (q15_t)0x3b42, (q15_t)0x5838, (q15_t)0x3b3e, (q15_t)0x5844,\n    (q15_t)0x3b39, (q15_t)0x584f, (q15_t)0x3b34, (q15_t)0x585b, (q15_t)0x3b2f,\n    (q15_t)0x5867, (q15_t)0x3b2a, (q15_t)0x5872, (q15_t)0x3b26, (q15_t)0x587e,\n    (q15_t)0x3b21, (q15_t)0x5889, (q15_t)0x3b1c, (q15_t)0x5895, (q15_t)0x3b17,\n    (q15_t)0x58a1, (q15_t)0x3b12, (q15_t)0x58ac, (q15_t)0x3b0e, (q15_t)0x58b8,\n    (q15_t)0x3b09, (q15_t)0x58c3, (q15_t)0x3b04, (q15_t)0x58cf, (q15_t)0x3aff,\n    (q15_t)0x58db, (q15_t)0x3afa, (q15_t)0x58e6, (q15_t)0x3af5, (q15_t)0x58f2,\n    (q15_t)0x3af0, (q15_t)0x58fd, (q15_t)0x3aeb, (q15_t)0x5909, (q15_t)0x3ae6,\n    (q15_t)0x5914, (q15_t)0x3ae2, (q15_t)0x5920, (q15_t)0x3add, (q15_t)0x592c,\n    (q15_t)0x3ad8, (q15_t)0x5937, (q15_t)0x3ad3, (q15_t)0x5943, (q15_t)0x3ace,\n    (q15_t)0x594e, (q15_t)0x3ac9, (q15_t)0x595a, (q15_t)0x3ac4, (q15_t)0x5965,\n    (q15_t)0x3abf, (q15_t)0x5971, (q15_t)0x3aba, (q15_t)0x597c, (q15_t)0x3ab5,\n    (q15_t)0x5988, (q15_t)0x3ab0, (q15_t)0x5993, (q15_t)0x3aab, (q15_t)0x599f,\n    (q15_t)0x3aa6, (q15_t)0x59aa, (q15_t)0x3aa1, (q15_t)0x59b6, (q15_t)0x3a9c,\n    (q15_t)0x59c1, (q15_t)0x3a97, (q15_t)0x59cd, (q15_t)0x3a92, (q15_t)0x59d8,\n    (q15_t)0x3a8d, (q15_t)0x59e4, (q15_t)0x3a88, (q15_t)0x59ef, (q15_t)0x3a82,\n    (q15_t)0x59fb, (q15_t)0x3a7d, (q15_t)0x5a06, (q15_t)0x3a78, (q15_t)0x5a12,\n    (q15_t)0x3a73, (q15_t)0x5a1d, (q15_t)0x3a6e, (q15_t)0x5a29, (q15_t)0x3a69,\n    (q15_t)0x5a34, (q15_t)0x3a64, (q15_t)0x5a40, (q15_t)0x3a5f, (q15_t)0x5a4b,\n    (q15_t)0x3a59, (q15_t)0x5a57, (q15_t)0x3a54, (q15_t)0x5a62, (q15_t)0x3a4f,\n    (q15_t)0x5a6e, (q15_t)0x3a4a, (q15_t)0x5a79, (q15_t)0x3a45, (q15_t)0x5a84,\n    (q15_t)0x3a3f, (q15_t)0x5a90, (q15_t)0x3a3a, (q15_t)0x5a9b, (q15_t)0x3a35,\n    (q15_t)0x5aa7, (q15_t)0x3a30, (q15_t)0x5ab2, (q15_t)0x3a2b, (q15_t)0x5abe,\n    (q15_t)0x3a25, (q15_t)0x5ac9, (q15_t)0x3a20, (q15_t)0x5ad4, (q15_t)0x3a1b,\n    (q15_t)0x5ae0, (q15_t)0x3a16, (q15_t)0x5aeb, (q15_t)0x3a10, (q15_t)0x5af7,\n    (q15_t)0x3a0b, (q15_t)0x5b02, (q15_t)0x3a06, (q15_t)0x5b0d, (q15_t)0x3a00,\n    (q15_t)0x5b19, (q15_t)0x39fb, (q15_t)0x5b24, (q15_t)0x39f6, (q15_t)0x5b30,\n    (q15_t)0x39f0, (q15_t)0x5b3b, (q15_t)0x39eb, (q15_t)0x5b46, (q15_t)0x39e6,\n    (q15_t)0x5b52, (q15_t)0x39e0, (q15_t)0x5b5d, (q15_t)0x39db, (q15_t)0x5b68,\n    (q15_t)0x39d6, (q15_t)0x5b74, (q15_t)0x39d0, (q15_t)0x5b7f, (q15_t)0x39cb,\n    (q15_t)0x5b8a, (q15_t)0x39c5, (q15_t)0x5b96, (q15_t)0x39c0, (q15_t)0x5ba1,\n    (q15_t)0x39bb, (q15_t)0x5bac, (q15_t)0x39b5, (q15_t)0x5bb8, (q15_t)0x39b0,\n    (q15_t)0x5bc3, (q15_t)0x39aa, (q15_t)0x5bce, (q15_t)0x39a5, (q15_t)0x5bda,\n    (q15_t)0x399f, (q15_t)0x5be5, (q15_t)0x399a, (q15_t)0x5bf0, (q15_t)0x3994,\n    (q15_t)0x5bfc, (q15_t)0x398f, (q15_t)0x5c07, (q15_t)0x3989, (q15_t)0x5c12,\n    (q15_t)0x3984, (q15_t)0x5c1e, (q15_t)0x397e, (q15_t)0x5c29, (q15_t)0x3979,\n    (q15_t)0x5c34, (q15_t)0x3973, (q15_t)0x5c3f, (q15_t)0x396e, (q15_t)0x5c4b,\n    (q15_t)0x3968, (q15_t)0x5c56, (q15_t)0x3963, (q15_t)0x5c61, (q15_t)0x395d,\n    (q15_t)0x5c6c, (q15_t)0x3958, (q15_t)0x5c78, (q15_t)0x3952, (q15_t)0x5c83,\n    (q15_t)0x394c, (q15_t)0x5c8e, (q15_t)0x3947, (q15_t)0x5c99, (q15_t)0x3941,\n    (q15_t)0x5ca5, (q15_t)0x393b, (q15_t)0x5cb0, (q15_t)0x3936, (q15_t)0x5cbb,\n    (q15_t)0x3930, (q15_t)0x5cc6, (q15_t)0x392b, (q15_t)0x5cd2, (q15_t)0x3925,\n    (q15_t)0x5cdd, (q15_t)0x391f, (q15_t)0x5ce8, (q15_t)0x391a, (q15_t)0x5cf3,\n    (q15_t)0x3914, (q15_t)0x5cff, (q15_t)0x390e, (q15_t)0x5d0a, (q15_t)0x3909,\n    (q15_t)0x5d15, (q15_t)0x3903, (q15_t)0x5d20, (q15_t)0x38fd, (q15_t)0x5d2b,\n    (q15_t)0x38f7, (q15_t)0x5d36, (q15_t)0x38f2, (q15_t)0x5d42, (q15_t)0x38ec,\n    (q15_t)0x5d4d, (q15_t)0x38e6, (q15_t)0x5d58, (q15_t)0x38e0, (q15_t)0x5d63,\n    (q15_t)0x38db, (q15_t)0x5d6e, (q15_t)0x38d5, (q15_t)0x5d79, (q15_t)0x38cf,\n    (q15_t)0x5d85, (q15_t)0x38c9, (q15_t)0x5d90, (q15_t)0x38c3, (q15_t)0x5d9b,\n    (q15_t)0x38be, (q15_t)0x5da6, (q15_t)0x38b8, (q15_t)0x5db1, (q15_t)0x38b2,\n    (q15_t)0x5dbc, (q15_t)0x38ac, (q15_t)0x5dc7, (q15_t)0x38a6, (q15_t)0x5dd3,\n    (q15_t)0x38a1, (q15_t)0x5dde, (q15_t)0x389b, (q15_t)0x5de9, (q15_t)0x3895,\n    (q15_t)0x5df4, (q15_t)0x388f, (q15_t)0x5dff, (q15_t)0x3889, (q15_t)0x5e0a,\n    (q15_t)0x3883, (q15_t)0x5e15, (q15_t)0x387d, (q15_t)0x5e20, (q15_t)0x3877,\n    (q15_t)0x5e2b, (q15_t)0x3871, (q15_t)0x5e36, (q15_t)0x386b, (q15_t)0x5e42,\n    (q15_t)0x3866, (q15_t)0x5e4d, (q15_t)0x3860, (q15_t)0x5e58, (q15_t)0x385a,\n    (q15_t)0x5e63, (q15_t)0x3854, (q15_t)0x5e6e, (q15_t)0x384e, (q15_t)0x5e79,\n    (q15_t)0x3848, (q15_t)0x5e84, (q15_t)0x3842, (q15_t)0x5e8f, (q15_t)0x383c,\n    (q15_t)0x5e9a, (q15_t)0x3836, (q15_t)0x5ea5, (q15_t)0x3830, (q15_t)0x5eb0,\n    (q15_t)0x382a, (q15_t)0x5ebb, (q15_t)0x3824, (q15_t)0x5ec6, (q15_t)0x381e,\n    (q15_t)0x5ed1, (q15_t)0x3818, (q15_t)0x5edc, (q15_t)0x3812, (q15_t)0x5ee7,\n    (q15_t)0x380b, (q15_t)0x5ef2, (q15_t)0x3805, (q15_t)0x5efd, (q15_t)0x37ff,\n    (q15_t)0x5f08, (q15_t)0x37f9, (q15_t)0x5f13, (q15_t)0x37f3, (q15_t)0x5f1e,\n    (q15_t)0x37ed, (q15_t)0x5f29, (q15_t)0x37e7, (q15_t)0x5f34, (q15_t)0x37e1,\n    (q15_t)0x5f3f, (q15_t)0x37db, (q15_t)0x5f4a, (q15_t)0x37d5, (q15_t)0x5f55,\n    (q15_t)0x37ce, (q15_t)0x5f60, (q15_t)0x37c8, (q15_t)0x5f6b, (q15_t)0x37c2,\n    (q15_t)0x5f76, (q15_t)0x37bc, (q15_t)0x5f81, (q15_t)0x37b6, (q15_t)0x5f8c,\n    (q15_t)0x37b0, (q15_t)0x5f97, (q15_t)0x37a9, (q15_t)0x5fa2, (q15_t)0x37a3,\n    (q15_t)0x5fac, (q15_t)0x379d, (q15_t)0x5fb7, (q15_t)0x3797, (q15_t)0x5fc2,\n    (q15_t)0x3790, (q15_t)0x5fcd, (q15_t)0x378a, (q15_t)0x5fd8, (q15_t)0x3784,\n    (q15_t)0x5fe3, (q15_t)0x377e, (q15_t)0x5fee, (q15_t)0x3777, (q15_t)0x5ff9,\n    (q15_t)0x3771, (q15_t)0x6004, (q15_t)0x376b, (q15_t)0x600f, (q15_t)0x3765,\n    (q15_t)0x6019, (q15_t)0x375e, (q15_t)0x6024, (q15_t)0x3758, (q15_t)0x602f,\n    (q15_t)0x3752, (q15_t)0x603a, (q15_t)0x374b, (q15_t)0x6045, (q15_t)0x3745,\n    (q15_t)0x6050, (q15_t)0x373f, (q15_t)0x605b, (q15_t)0x3738, (q15_t)0x6065,\n    (q15_t)0x3732, (q15_t)0x6070, (q15_t)0x372c, (q15_t)0x607b, (q15_t)0x3725,\n    (q15_t)0x6086, (q15_t)0x371f, (q15_t)0x6091, (q15_t)0x3718, (q15_t)0x609b,\n    (q15_t)0x3712, (q15_t)0x60a6, (q15_t)0x370c, (q15_t)0x60b1, (q15_t)0x3705,\n    (q15_t)0x60bc, (q15_t)0x36ff, (q15_t)0x60c7, (q15_t)0x36f8, (q15_t)0x60d1,\n    (q15_t)0x36f2, (q15_t)0x60dc, (q15_t)0x36eb, (q15_t)0x60e7, (q15_t)0x36e5,\n    (q15_t)0x60f2, (q15_t)0x36df, (q15_t)0x60fd, (q15_t)0x36d8, (q15_t)0x6107,\n    (q15_t)0x36d2, (q15_t)0x6112, (q15_t)0x36cb, (q15_t)0x611d, (q15_t)0x36c5,\n    (q15_t)0x6128, (q15_t)0x36be, (q15_t)0x6132, (q15_t)0x36b8, (q15_t)0x613d,\n    (q15_t)0x36b1, (q15_t)0x6148, (q15_t)0x36ab, (q15_t)0x6153, (q15_t)0x36a4,\n    (q15_t)0x615d, (q15_t)0x369d, (q15_t)0x6168, (q15_t)0x3697, (q15_t)0x6173,\n    (q15_t)0x3690, (q15_t)0x617d, (q15_t)0x368a, (q15_t)0x6188, (q15_t)0x3683,\n    (q15_t)0x6193, (q15_t)0x367d, (q15_t)0x619e, (q15_t)0x3676, (q15_t)0x61a8,\n    (q15_t)0x366f, (q15_t)0x61b3, (q15_t)0x3669, (q15_t)0x61be, (q15_t)0x3662,\n    (q15_t)0x61c8, (q15_t)0x365c, (q15_t)0x61d3, (q15_t)0x3655, (q15_t)0x61de,\n    (q15_t)0x364e, (q15_t)0x61e8, (q15_t)0x3648, (q15_t)0x61f3, (q15_t)0x3641,\n    (q15_t)0x61fe, (q15_t)0x363a, (q15_t)0x6208, (q15_t)0x3634, (q15_t)0x6213,\n    (q15_t)0x362d, (q15_t)0x621e, (q15_t)0x3626, (q15_t)0x6228, (q15_t)0x3620,\n    (q15_t)0x6233, (q15_t)0x3619, (q15_t)0x623d, (q15_t)0x3612, (q15_t)0x6248,\n    (q15_t)0x360b, (q15_t)0x6253, (q15_t)0x3605, (q15_t)0x625d, (q15_t)0x35fe,\n    (q15_t)0x6268, (q15_t)0x35f7, (q15_t)0x6272, (q15_t)0x35f0, (q15_t)0x627d,\n    (q15_t)0x35ea, (q15_t)0x6288, (q15_t)0x35e3, (q15_t)0x6292, (q15_t)0x35dc,\n    (q15_t)0x629d, (q15_t)0x35d5, (q15_t)0x62a7, (q15_t)0x35ce, (q15_t)0x62b2,\n    (q15_t)0x35c8, (q15_t)0x62bc, (q15_t)0x35c1, (q15_t)0x62c7, (q15_t)0x35ba,\n    (q15_t)0x62d2, (q15_t)0x35b3, (q15_t)0x62dc, (q15_t)0x35ac, (q15_t)0x62e7,\n    (q15_t)0x35a5, (q15_t)0x62f1, (q15_t)0x359f, (q15_t)0x62fc, (q15_t)0x3598,\n    (q15_t)0x6306, (q15_t)0x3591, (q15_t)0x6311, (q15_t)0x358a, (q15_t)0x631b,\n    (q15_t)0x3583, (q15_t)0x6326, (q15_t)0x357c, (q15_t)0x6330, (q15_t)0x3575,\n    (q15_t)0x633b, (q15_t)0x356e, (q15_t)0x6345, (q15_t)0x3567, (q15_t)0x6350,\n    (q15_t)0x3561, (q15_t)0x635a, (q15_t)0x355a, (q15_t)0x6365, (q15_t)0x3553,\n    (q15_t)0x636f, (q15_t)0x354c, (q15_t)0x637a, (q15_t)0x3545, (q15_t)0x6384,\n    (q15_t)0x353e, (q15_t)0x638e, (q15_t)0x3537, (q15_t)0x6399, (q15_t)0x3530,\n    (q15_t)0x63a3, (q15_t)0x3529, (q15_t)0x63ae, (q15_t)0x3522, (q15_t)0x63b8,\n    (q15_t)0x351b, (q15_t)0x63c3, (q15_t)0x3514, (q15_t)0x63cd, (q15_t)0x350d,\n    (q15_t)0x63d7, (q15_t)0x3506, (q15_t)0x63e2, (q15_t)0x34ff, (q15_t)0x63ec,\n    (q15_t)0x34f8, (q15_t)0x63f7, (q15_t)0x34f1, (q15_t)0x6401, (q15_t)0x34ea,\n    (q15_t)0x640b, (q15_t)0x34e2, (q15_t)0x6416, (q15_t)0x34db, (q15_t)0x6420,\n    (q15_t)0x34d4, (q15_t)0x642b, (q15_t)0x34cd, (q15_t)0x6435, (q15_t)0x34c6,\n    (q15_t)0x643f, (q15_t)0x34bf, (q15_t)0x644a, (q15_t)0x34b8, (q15_t)0x6454,\n    (q15_t)0x34b1, (q15_t)0x645e, (q15_t)0x34aa, (q15_t)0x6469, (q15_t)0x34a2,\n    (q15_t)0x6473, (q15_t)0x349b, (q15_t)0x647d, (q15_t)0x3494, (q15_t)0x6488,\n    (q15_t)0x348d, (q15_t)0x6492, (q15_t)0x3486, (q15_t)0x649c, (q15_t)0x347f,\n    (q15_t)0x64a7, (q15_t)0x3477, (q15_t)0x64b1, (q15_t)0x3470, (q15_t)0x64bb,\n    (q15_t)0x3469, (q15_t)0x64c5, (q15_t)0x3462, (q15_t)0x64d0, (q15_t)0x345b,\n    (q15_t)0x64da, (q15_t)0x3453, (q15_t)0x64e4, (q15_t)0x344c, (q15_t)0x64ef,\n    (q15_t)0x3445, (q15_t)0x64f9, (q15_t)0x343e, (q15_t)0x6503, (q15_t)0x3436,\n    (q15_t)0x650d, (q15_t)0x342f, (q15_t)0x6518, (q15_t)0x3428, (q15_t)0x6522,\n    (q15_t)0x3420, (q15_t)0x652c, (q15_t)0x3419, (q15_t)0x6536, (q15_t)0x3412,\n    (q15_t)0x6541, (q15_t)0x340b, (q15_t)0x654b, (q15_t)0x3403, (q15_t)0x6555,\n    (q15_t)0x33fc, (q15_t)0x655f, (q15_t)0x33f5, (q15_t)0x6569, (q15_t)0x33ed,\n    (q15_t)0x6574, (q15_t)0x33e6, (q15_t)0x657e, (q15_t)0x33df, (q15_t)0x6588,\n    (q15_t)0x33d7, (q15_t)0x6592, (q15_t)0x33d0, (q15_t)0x659c, (q15_t)0x33c8,\n    (q15_t)0x65a6, (q15_t)0x33c1, (q15_t)0x65b1, (q15_t)0x33ba, (q15_t)0x65bb,\n    (q15_t)0x33b2, (q15_t)0x65c5, (q15_t)0x33ab, (q15_t)0x65cf, (q15_t)0x33a3,\n    (q15_t)0x65d9, (q15_t)0x339c, (q15_t)0x65e3, (q15_t)0x3395, (q15_t)0x65ed,\n    (q15_t)0x338d, (q15_t)0x65f8, (q15_t)0x3386, (q15_t)0x6602, (q15_t)0x337e,\n    (q15_t)0x660c, (q15_t)0x3377, (q15_t)0x6616, (q15_t)0x336f, (q15_t)0x6620,\n    (q15_t)0x3368, (q15_t)0x662a, (q15_t)0x3360, (q15_t)0x6634, (q15_t)0x3359,\n    (q15_t)0x663e, (q15_t)0x3351, (q15_t)0x6648, (q15_t)0x334a, (q15_t)0x6652,\n    (q15_t)0x3342, (q15_t)0x665c, (q15_t)0x333b, (q15_t)0x6666, (q15_t)0x3333,\n    (q15_t)0x6671, (q15_t)0x332c, (q15_t)0x667b, (q15_t)0x3324, (q15_t)0x6685,\n    (q15_t)0x331d, (q15_t)0x668f, (q15_t)0x3315, (q15_t)0x6699, (q15_t)0x330d,\n    (q15_t)0x66a3, (q15_t)0x3306, (q15_t)0x66ad, (q15_t)0x32fe, (q15_t)0x66b7,\n    (q15_t)0x32f7, (q15_t)0x66c1, (q15_t)0x32ef, (q15_t)0x66cb, (q15_t)0x32e7,\n    (q15_t)0x66d5, (q15_t)0x32e0, (q15_t)0x66df, (q15_t)0x32d8, (q15_t)0x66e9,\n    (q15_t)0x32d0, (q15_t)0x66f3, (q15_t)0x32c9, (q15_t)0x66fd, (q15_t)0x32c1,\n    (q15_t)0x6707, (q15_t)0x32ba, (q15_t)0x6711, (q15_t)0x32b2, (q15_t)0x671a,\n    (q15_t)0x32aa, (q15_t)0x6724, (q15_t)0x32a3, (q15_t)0x672e, (q15_t)0x329b,\n    (q15_t)0x6738, (q15_t)0x3293, (q15_t)0x6742, (q15_t)0x328b, (q15_t)0x674c,\n    (q15_t)0x3284, (q15_t)0x6756, (q15_t)0x327c, (q15_t)0x6760, (q15_t)0x3274,\n    (q15_t)0x676a, (q15_t)0x326d, (q15_t)0x6774, (q15_t)0x3265, (q15_t)0x677e,\n    (q15_t)0x325d, (q15_t)0x6788, (q15_t)0x3255, (q15_t)0x6791, (q15_t)0x324e,\n    (q15_t)0x679b, (q15_t)0x3246, (q15_t)0x67a5, (q15_t)0x323e, (q15_t)0x67af,\n    (q15_t)0x3236, (q15_t)0x67b9, (q15_t)0x322e, (q15_t)0x67c3, (q15_t)0x3227,\n    (q15_t)0x67cd, (q15_t)0x321f, (q15_t)0x67d6, (q15_t)0x3217, (q15_t)0x67e0,\n    (q15_t)0x320f, (q15_t)0x67ea, (q15_t)0x3207, (q15_t)0x67f4, (q15_t)0x31ff,\n    (q15_t)0x67fe, (q15_t)0x31f8, (q15_t)0x6808, (q15_t)0x31f0, (q15_t)0x6811,\n    (q15_t)0x31e8, (q15_t)0x681b, (q15_t)0x31e0, (q15_t)0x6825, (q15_t)0x31d8,\n    (q15_t)0x682f, (q15_t)0x31d0, (q15_t)0x6838, (q15_t)0x31c8, (q15_t)0x6842,\n    (q15_t)0x31c0, (q15_t)0x684c, (q15_t)0x31b9, (q15_t)0x6856, (q15_t)0x31b1,\n    (q15_t)0x6860, (q15_t)0x31a9, (q15_t)0x6869, (q15_t)0x31a1, (q15_t)0x6873,\n    (q15_t)0x3199, (q15_t)0x687d, (q15_t)0x3191, (q15_t)0x6886, (q15_t)0x3189,\n    (q15_t)0x6890, (q15_t)0x3181, (q15_t)0x689a, (q15_t)0x3179, (q15_t)0x68a4,\n    (q15_t)0x3171, (q15_t)0x68ad, (q15_t)0x3169, (q15_t)0x68b7, (q15_t)0x3161,\n    (q15_t)0x68c1, (q15_t)0x3159, (q15_t)0x68ca, (q15_t)0x3151, (q15_t)0x68d4,\n    (q15_t)0x3149, (q15_t)0x68de, (q15_t)0x3141, (q15_t)0x68e7, (q15_t)0x3139,\n    (q15_t)0x68f1, (q15_t)0x3131, (q15_t)0x68fb, (q15_t)0x3129, (q15_t)0x6904,\n    (q15_t)0x3121, (q15_t)0x690e, (q15_t)0x3119, (q15_t)0x6918, (q15_t)0x3111,\n    (q15_t)0x6921, (q15_t)0x3109, (q15_t)0x692b, (q15_t)0x3101, (q15_t)0x6935,\n    (q15_t)0x30f9, (q15_t)0x693e, (q15_t)0x30f0, (q15_t)0x6948, (q15_t)0x30e8,\n    (q15_t)0x6951, (q15_t)0x30e0, (q15_t)0x695b, (q15_t)0x30d8, (q15_t)0x6965,\n    (q15_t)0x30d0, (q15_t)0x696e, (q15_t)0x30c8, (q15_t)0x6978, (q15_t)0x30c0,\n    (q15_t)0x6981, (q15_t)0x30b8, (q15_t)0x698b, (q15_t)0x30af, (q15_t)0x6994,\n    (q15_t)0x30a7, (q15_t)0x699e, (q15_t)0x309f, (q15_t)0x69a7, (q15_t)0x3097,\n    (q15_t)0x69b1, (q15_t)0x308f, (q15_t)0x69bb, (q15_t)0x3087, (q15_t)0x69c4,\n    (q15_t)0x307e, (q15_t)0x69ce, (q15_t)0x3076, (q15_t)0x69d7, (q15_t)0x306e,\n    (q15_t)0x69e1, (q15_t)0x3066, (q15_t)0x69ea, (q15_t)0x305d, (q15_t)0x69f4,\n    (q15_t)0x3055, (q15_t)0x69fd, (q15_t)0x304d, (q15_t)0x6a07, (q15_t)0x3045,\n    (q15_t)0x6a10, (q15_t)0x303c, (q15_t)0x6a1a, (q15_t)0x3034, (q15_t)0x6a23,\n    (q15_t)0x302c, (q15_t)0x6a2c, (q15_t)0x3024, (q15_t)0x6a36, (q15_t)0x301b,\n    (q15_t)0x6a3f, (q15_t)0x3013, (q15_t)0x6a49, (q15_t)0x300b, (q15_t)0x6a52,\n    (q15_t)0x3002, (q15_t)0x6a5c, (q15_t)0x2ffa, (q15_t)0x6a65, (q15_t)0x2ff2,\n    (q15_t)0x6a6e, (q15_t)0x2fea, (q15_t)0x6a78, (q15_t)0x2fe1, (q15_t)0x6a81,\n    (q15_t)0x2fd9, (q15_t)0x6a8b, (q15_t)0x2fd0, (q15_t)0x6a94, (q15_t)0x2fc8,\n    (q15_t)0x6a9d, (q15_t)0x2fc0, (q15_t)0x6aa7, (q15_t)0x2fb7, (q15_t)0x6ab0,\n    (q15_t)0x2faf, (q15_t)0x6ab9, (q15_t)0x2fa7, (q15_t)0x6ac3, (q15_t)0x2f9e,\n    (q15_t)0x6acc, (q15_t)0x2f96, (q15_t)0x6ad6, (q15_t)0x2f8d, (q15_t)0x6adf,\n    (q15_t)0x2f85, (q15_t)0x6ae8, (q15_t)0x2f7d, (q15_t)0x6af2, (q15_t)0x2f74,\n    (q15_t)0x6afb, (q15_t)0x2f6c, (q15_t)0x6b04, (q15_t)0x2f63, (q15_t)0x6b0d,\n    (q15_t)0x2f5b, (q15_t)0x6b17, (q15_t)0x2f52, (q15_t)0x6b20, (q15_t)0x2f4a,\n    (q15_t)0x6b29, (q15_t)0x2f41, (q15_t)0x6b33, (q15_t)0x2f39, (q15_t)0x6b3c,\n    (q15_t)0x2f30, (q15_t)0x6b45, (q15_t)0x2f28, (q15_t)0x6b4e, (q15_t)0x2f20,\n    (q15_t)0x6b58, (q15_t)0x2f17, (q15_t)0x6b61, (q15_t)0x2f0e, (q15_t)0x6b6a,\n    (q15_t)0x2f06, (q15_t)0x6b73, (q15_t)0x2efd, (q15_t)0x6b7d, (q15_t)0x2ef5,\n    (q15_t)0x6b86, (q15_t)0x2eec, (q15_t)0x6b8f, (q15_t)0x2ee4, (q15_t)0x6b98,\n    (q15_t)0x2edb, (q15_t)0x6ba1, (q15_t)0x2ed3, (q15_t)0x6bab, (q15_t)0x2eca,\n    (q15_t)0x6bb4, (q15_t)0x2ec2, (q15_t)0x6bbd, (q15_t)0x2eb9, (q15_t)0x6bc6,\n    (q15_t)0x2eb0, (q15_t)0x6bcf, (q15_t)0x2ea8, (q15_t)0x6bd8, (q15_t)0x2e9f,\n    (q15_t)0x6be2, (q15_t)0x2e97, (q15_t)0x6beb, (q15_t)0x2e8e, (q15_t)0x6bf4,\n    (q15_t)0x2e85, (q15_t)0x6bfd, (q15_t)0x2e7d, (q15_t)0x6c06, (q15_t)0x2e74,\n    (q15_t)0x6c0f, (q15_t)0x2e6b, (q15_t)0x6c18, (q15_t)0x2e63, (q15_t)0x6c21,\n    (q15_t)0x2e5a, (q15_t)0x6c2b, (q15_t)0x2e51, (q15_t)0x6c34, (q15_t)0x2e49,\n    (q15_t)0x6c3d, (q15_t)0x2e40, (q15_t)0x6c46, (q15_t)0x2e37, (q15_t)0x6c4f,\n    (q15_t)0x2e2f, (q15_t)0x6c58, (q15_t)0x2e26, (q15_t)0x6c61, (q15_t)0x2e1d,\n    (q15_t)0x6c6a, (q15_t)0x2e15, (q15_t)0x6c73, (q15_t)0x2e0c, (q15_t)0x6c7c,\n    (q15_t)0x2e03, (q15_t)0x6c85, (q15_t)0x2dfa, (q15_t)0x6c8e, (q15_t)0x2df2,\n    (q15_t)0x6c97, (q15_t)0x2de9, (q15_t)0x6ca0, (q15_t)0x2de0, (q15_t)0x6ca9,\n    (q15_t)0x2dd7, (q15_t)0x6cb2, (q15_t)0x2dcf, (q15_t)0x6cbb, (q15_t)0x2dc6,\n    (q15_t)0x6cc4, (q15_t)0x2dbd, (q15_t)0x6ccd, (q15_t)0x2db4, (q15_t)0x6cd6,\n    (q15_t)0x2dab, (q15_t)0x6cdf, (q15_t)0x2da3, (q15_t)0x6ce8, (q15_t)0x2d9a,\n    (q15_t)0x6cf1, (q15_t)0x2d91, (q15_t)0x6cfa, (q15_t)0x2d88, (q15_t)0x6d03,\n    (q15_t)0x2d7f, (q15_t)0x6d0c, (q15_t)0x2d76, (q15_t)0x6d15, (q15_t)0x2d6e,\n    (q15_t)0x6d1e, (q15_t)0x2d65, (q15_t)0x6d27, (q15_t)0x2d5c, (q15_t)0x6d2f,\n    (q15_t)0x2d53, (q15_t)0x6d38, (q15_t)0x2d4a, (q15_t)0x6d41, (q15_t)0x2d41,\n    (q15_t)0x6d4a, (q15_t)0x2d38, (q15_t)0x6d53, (q15_t)0x2d2f, (q15_t)0x6d5c,\n    (q15_t)0x2d27, (q15_t)0x6d65, (q15_t)0x2d1e, (q15_t)0x6d6e, (q15_t)0x2d15,\n    (q15_t)0x6d76, (q15_t)0x2d0c, (q15_t)0x6d7f, (q15_t)0x2d03, (q15_t)0x6d88,\n    (q15_t)0x2cfa, (q15_t)0x6d91, (q15_t)0x2cf1, (q15_t)0x6d9a, (q15_t)0x2ce8,\n    (q15_t)0x6da3, (q15_t)0x2cdf, (q15_t)0x6dab, (q15_t)0x2cd6, (q15_t)0x6db4,\n    (q15_t)0x2ccd, (q15_t)0x6dbd, (q15_t)0x2cc4, (q15_t)0x6dc6, (q15_t)0x2cbb,\n    (q15_t)0x6dcf, (q15_t)0x2cb2, (q15_t)0x6dd7, (q15_t)0x2ca9, (q15_t)0x6de0,\n    (q15_t)0x2ca0, (q15_t)0x6de9, (q15_t)0x2c97, (q15_t)0x6df2, (q15_t)0x2c8e,\n    (q15_t)0x6dfa, (q15_t)0x2c85, (q15_t)0x6e03, (q15_t)0x2c7c, (q15_t)0x6e0c,\n    (q15_t)0x2c73, (q15_t)0x6e15, (q15_t)0x2c6a, (q15_t)0x6e1d, (q15_t)0x2c61,\n    (q15_t)0x6e26, (q15_t)0x2c58, (q15_t)0x6e2f, (q15_t)0x2c4f, (q15_t)0x6e37,\n    (q15_t)0x2c46, (q15_t)0x6e40, (q15_t)0x2c3d, (q15_t)0x6e49, (q15_t)0x2c34,\n    (q15_t)0x6e51, (q15_t)0x2c2b, (q15_t)0x6e5a, (q15_t)0x2c21, (q15_t)0x6e63,\n    (q15_t)0x2c18, (q15_t)0x6e6b, (q15_t)0x2c0f, (q15_t)0x6e74, (q15_t)0x2c06,\n    (q15_t)0x6e7d, (q15_t)0x2bfd, (q15_t)0x6e85, (q15_t)0x2bf4, (q15_t)0x6e8e,\n    (q15_t)0x2beb, (q15_t)0x6e97, (q15_t)0x2be2, (q15_t)0x6e9f, (q15_t)0x2bd8,\n    (q15_t)0x6ea8, (q15_t)0x2bcf, (q15_t)0x6eb0, (q15_t)0x2bc6, (q15_t)0x6eb9,\n    (q15_t)0x2bbd, (q15_t)0x6ec2, (q15_t)0x2bb4, (q15_t)0x6eca, (q15_t)0x2bab,\n    (q15_t)0x6ed3, (q15_t)0x2ba1, (q15_t)0x6edb, (q15_t)0x2b98, (q15_t)0x6ee4,\n    (q15_t)0x2b8f, (q15_t)0x6eec, (q15_t)0x2b86, (q15_t)0x6ef5, (q15_t)0x2b7d,\n    (q15_t)0x6efd, (q15_t)0x2b73, (q15_t)0x6f06, (q15_t)0x2b6a, (q15_t)0x6f0e,\n    (q15_t)0x2b61, (q15_t)0x6f17, (q15_t)0x2b58, (q15_t)0x6f20, (q15_t)0x2b4e,\n    (q15_t)0x6f28, (q15_t)0x2b45, (q15_t)0x6f30, (q15_t)0x2b3c, (q15_t)0x6f39,\n    (q15_t)0x2b33, (q15_t)0x6f41, (q15_t)0x2b29, (q15_t)0x6f4a, (q15_t)0x2b20,\n    (q15_t)0x6f52, (q15_t)0x2b17, (q15_t)0x6f5b, (q15_t)0x2b0d, (q15_t)0x6f63,\n    (q15_t)0x2b04, (q15_t)0x6f6c, (q15_t)0x2afb, (q15_t)0x6f74, (q15_t)0x2af2,\n    (q15_t)0x6f7d, (q15_t)0x2ae8, (q15_t)0x6f85, (q15_t)0x2adf, (q15_t)0x6f8d,\n    (q15_t)0x2ad6, (q15_t)0x6f96, (q15_t)0x2acc, (q15_t)0x6f9e, (q15_t)0x2ac3,\n    (q15_t)0x6fa7, (q15_t)0x2ab9, (q15_t)0x6faf, (q15_t)0x2ab0, (q15_t)0x6fb7,\n    (q15_t)0x2aa7, (q15_t)0x6fc0, (q15_t)0x2a9d, (q15_t)0x6fc8, (q15_t)0x2a94,\n    (q15_t)0x6fd0, (q15_t)0x2a8b, (q15_t)0x6fd9, (q15_t)0x2a81, (q15_t)0x6fe1,\n    (q15_t)0x2a78, (q15_t)0x6fea, (q15_t)0x2a6e, (q15_t)0x6ff2, (q15_t)0x2a65,\n    (q15_t)0x6ffa, (q15_t)0x2a5c, (q15_t)0x7002, (q15_t)0x2a52, (q15_t)0x700b,\n    (q15_t)0x2a49, (q15_t)0x7013, (q15_t)0x2a3f, (q15_t)0x701b, (q15_t)0x2a36,\n    (q15_t)0x7024, (q15_t)0x2a2c, (q15_t)0x702c, (q15_t)0x2a23, (q15_t)0x7034,\n    (q15_t)0x2a1a, (q15_t)0x703c, (q15_t)0x2a10, (q15_t)0x7045, (q15_t)0x2a07,\n    (q15_t)0x704d, (q15_t)0x29fd, (q15_t)0x7055, (q15_t)0x29f4, (q15_t)0x705d,\n    (q15_t)0x29ea, (q15_t)0x7066, (q15_t)0x29e1, (q15_t)0x706e, (q15_t)0x29d7,\n    (q15_t)0x7076, (q15_t)0x29ce, (q15_t)0x707e, (q15_t)0x29c4, (q15_t)0x7087,\n    (q15_t)0x29bb, (q15_t)0x708f, (q15_t)0x29b1, (q15_t)0x7097, (q15_t)0x29a7,\n    (q15_t)0x709f, (q15_t)0x299e, (q15_t)0x70a7, (q15_t)0x2994, (q15_t)0x70af,\n    (q15_t)0x298b, (q15_t)0x70b8, (q15_t)0x2981, (q15_t)0x70c0, (q15_t)0x2978,\n    (q15_t)0x70c8, (q15_t)0x296e, (q15_t)0x70d0, (q15_t)0x2965, (q15_t)0x70d8,\n    (q15_t)0x295b, (q15_t)0x70e0, (q15_t)0x2951, (q15_t)0x70e8, (q15_t)0x2948,\n    (q15_t)0x70f0, (q15_t)0x293e, (q15_t)0x70f9, (q15_t)0x2935, (q15_t)0x7101,\n    (q15_t)0x292b, (q15_t)0x7109, (q15_t)0x2921, (q15_t)0x7111, (q15_t)0x2918,\n    (q15_t)0x7119, (q15_t)0x290e, (q15_t)0x7121, (q15_t)0x2904, (q15_t)0x7129,\n    (q15_t)0x28fb, (q15_t)0x7131, (q15_t)0x28f1, (q15_t)0x7139, (q15_t)0x28e7,\n    (q15_t)0x7141, (q15_t)0x28de, (q15_t)0x7149, (q15_t)0x28d4, (q15_t)0x7151,\n    (q15_t)0x28ca, (q15_t)0x7159, (q15_t)0x28c1, (q15_t)0x7161, (q15_t)0x28b7,\n    (q15_t)0x7169, (q15_t)0x28ad, (q15_t)0x7171, (q15_t)0x28a4, (q15_t)0x7179,\n    (q15_t)0x289a, (q15_t)0x7181, (q15_t)0x2890, (q15_t)0x7189, (q15_t)0x2886,\n    (q15_t)0x7191, (q15_t)0x287d, (q15_t)0x7199, (q15_t)0x2873, (q15_t)0x71a1,\n    (q15_t)0x2869, (q15_t)0x71a9, (q15_t)0x2860, (q15_t)0x71b1, (q15_t)0x2856,\n    (q15_t)0x71b9, (q15_t)0x284c, (q15_t)0x71c0, (q15_t)0x2842, (q15_t)0x71c8,\n    (q15_t)0x2838, (q15_t)0x71d0, (q15_t)0x282f, (q15_t)0x71d8, (q15_t)0x2825,\n    (q15_t)0x71e0, (q15_t)0x281b, (q15_t)0x71e8, (q15_t)0x2811, (q15_t)0x71f0,\n    (q15_t)0x2808, (q15_t)0x71f8, (q15_t)0x27fe, (q15_t)0x71ff, (q15_t)0x27f4,\n    (q15_t)0x7207, (q15_t)0x27ea, (q15_t)0x720f, (q15_t)0x27e0, (q15_t)0x7217,\n    (q15_t)0x27d6, (q15_t)0x721f, (q15_t)0x27cd, (q15_t)0x7227, (q15_t)0x27c3,\n    (q15_t)0x722e, (q15_t)0x27b9, (q15_t)0x7236, (q15_t)0x27af, (q15_t)0x723e,\n    (q15_t)0x27a5, (q15_t)0x7246, (q15_t)0x279b, (q15_t)0x724e, (q15_t)0x2791,\n    (q15_t)0x7255, (q15_t)0x2788, (q15_t)0x725d, (q15_t)0x277e, (q15_t)0x7265,\n    (q15_t)0x2774, (q15_t)0x726d, (q15_t)0x276a, (q15_t)0x7274, (q15_t)0x2760,\n    (q15_t)0x727c, (q15_t)0x2756, (q15_t)0x7284, (q15_t)0x274c, (q15_t)0x728b,\n    (q15_t)0x2742, (q15_t)0x7293, (q15_t)0x2738, (q15_t)0x729b, (q15_t)0x272e,\n    (q15_t)0x72a3, (q15_t)0x2724, (q15_t)0x72aa, (q15_t)0x271a, (q15_t)0x72b2,\n    (q15_t)0x2711, (q15_t)0x72ba, (q15_t)0x2707, (q15_t)0x72c1, (q15_t)0x26fd,\n    (q15_t)0x72c9, (q15_t)0x26f3, (q15_t)0x72d0, (q15_t)0x26e9, (q15_t)0x72d8,\n    (q15_t)0x26df, (q15_t)0x72e0, (q15_t)0x26d5, (q15_t)0x72e7, (q15_t)0x26cb,\n    (q15_t)0x72ef, (q15_t)0x26c1, (q15_t)0x72f7, (q15_t)0x26b7, (q15_t)0x72fe,\n    (q15_t)0x26ad, (q15_t)0x7306, (q15_t)0x26a3, (q15_t)0x730d, (q15_t)0x2699,\n    (q15_t)0x7315, (q15_t)0x268f, (q15_t)0x731d, (q15_t)0x2685, (q15_t)0x7324,\n    (q15_t)0x267b, (q15_t)0x732c, (q15_t)0x2671, (q15_t)0x7333, (q15_t)0x2666,\n    (q15_t)0x733b, (q15_t)0x265c, (q15_t)0x7342, (q15_t)0x2652, (q15_t)0x734a,\n    (q15_t)0x2648, (q15_t)0x7351, (q15_t)0x263e, (q15_t)0x7359, (q15_t)0x2634,\n    (q15_t)0x7360, (q15_t)0x262a, (q15_t)0x7368, (q15_t)0x2620, (q15_t)0x736f,\n    (q15_t)0x2616, (q15_t)0x7377, (q15_t)0x260c, (q15_t)0x737e, (q15_t)0x2602,\n    (q15_t)0x7386, (q15_t)0x25f8, (q15_t)0x738d, (q15_t)0x25ed, (q15_t)0x7395,\n    (q15_t)0x25e3, (q15_t)0x739c, (q15_t)0x25d9, (q15_t)0x73a3, (q15_t)0x25cf,\n    (q15_t)0x73ab, (q15_t)0x25c5, (q15_t)0x73b2, (q15_t)0x25bb, (q15_t)0x73ba,\n    (q15_t)0x25b1, (q15_t)0x73c1, (q15_t)0x25a6, (q15_t)0x73c8, (q15_t)0x259c,\n    (q15_t)0x73d0, (q15_t)0x2592, (q15_t)0x73d7, (q15_t)0x2588, (q15_t)0x73df,\n    (q15_t)0x257e, (q15_t)0x73e6, (q15_t)0x2574, (q15_t)0x73ed, (q15_t)0x2569,\n    (q15_t)0x73f5, (q15_t)0x255f, (q15_t)0x73fc, (q15_t)0x2555, (q15_t)0x7403,\n    (q15_t)0x254b, (q15_t)0x740b, (q15_t)0x2541, (q15_t)0x7412, (q15_t)0x2536,\n    (q15_t)0x7419, (q15_t)0x252c, (q15_t)0x7420, (q15_t)0x2522, (q15_t)0x7428,\n    (q15_t)0x2518, (q15_t)0x742f, (q15_t)0x250d, (q15_t)0x7436, (q15_t)0x2503,\n    (q15_t)0x743e, (q15_t)0x24f9, (q15_t)0x7445, (q15_t)0x24ef, (q15_t)0x744c,\n    (q15_t)0x24e4, (q15_t)0x7453, (q15_t)0x24da, (q15_t)0x745b, (q15_t)0x24d0,\n    (q15_t)0x7462, (q15_t)0x24c5, (q15_t)0x7469, (q15_t)0x24bb, (q15_t)0x7470,\n    (q15_t)0x24b1, (q15_t)0x7477, (q15_t)0x24a7, (q15_t)0x747f, (q15_t)0x249c,\n    (q15_t)0x7486, (q15_t)0x2492, (q15_t)0x748d, (q15_t)0x2488, (q15_t)0x7494,\n    (q15_t)0x247d, (q15_t)0x749b, (q15_t)0x2473, (q15_t)0x74a2, (q15_t)0x2469,\n    (q15_t)0x74aa, (q15_t)0x245e, (q15_t)0x74b1, (q15_t)0x2454, (q15_t)0x74b8,\n    (q15_t)0x244a, (q15_t)0x74bf, (q15_t)0x243f, (q15_t)0x74c6, (q15_t)0x2435,\n    (q15_t)0x74cd, (q15_t)0x242b, (q15_t)0x74d4, (q15_t)0x2420, (q15_t)0x74db,\n    (q15_t)0x2416, (q15_t)0x74e2, (q15_t)0x240b, (q15_t)0x74ea, (q15_t)0x2401,\n    (q15_t)0x74f1, (q15_t)0x23f7, (q15_t)0x74f8, (q15_t)0x23ec, (q15_t)0x74ff,\n    (q15_t)0x23e2, (q15_t)0x7506, (q15_t)0x23d7, (q15_t)0x750d, (q15_t)0x23cd,\n    (q15_t)0x7514, (q15_t)0x23c3, (q15_t)0x751b, (q15_t)0x23b8, (q15_t)0x7522,\n    (q15_t)0x23ae, (q15_t)0x7529, (q15_t)0x23a3, (q15_t)0x7530, (q15_t)0x2399,\n    (q15_t)0x7537, (q15_t)0x238e, (q15_t)0x753e, (q15_t)0x2384, (q15_t)0x7545,\n    (q15_t)0x237a, (q15_t)0x754c, (q15_t)0x236f, (q15_t)0x7553, (q15_t)0x2365,\n    (q15_t)0x755a, (q15_t)0x235a, (q15_t)0x7561, (q15_t)0x2350, (q15_t)0x7567,\n    (q15_t)0x2345, (q15_t)0x756e, (q15_t)0x233b, (q15_t)0x7575, (q15_t)0x2330,\n    (q15_t)0x757c, (q15_t)0x2326, (q15_t)0x7583, (q15_t)0x231b, (q15_t)0x758a,\n    (q15_t)0x2311, (q15_t)0x7591, (q15_t)0x2306, (q15_t)0x7598, (q15_t)0x22fc,\n    (q15_t)0x759f, (q15_t)0x22f1, (q15_t)0x75a5, (q15_t)0x22e7, (q15_t)0x75ac,\n    (q15_t)0x22dc, (q15_t)0x75b3, (q15_t)0x22d2, (q15_t)0x75ba, (q15_t)0x22c7,\n    (q15_t)0x75c1, (q15_t)0x22bc, (q15_t)0x75c8, (q15_t)0x22b2, (q15_t)0x75ce,\n    (q15_t)0x22a7, (q15_t)0x75d5, (q15_t)0x229d, (q15_t)0x75dc, (q15_t)0x2292,\n    (q15_t)0x75e3, (q15_t)0x2288, (q15_t)0x75ea, (q15_t)0x227d, (q15_t)0x75f0,\n    (q15_t)0x2272, (q15_t)0x75f7, (q15_t)0x2268, (q15_t)0x75fe, (q15_t)0x225d,\n    (q15_t)0x7605, (q15_t)0x2253, (q15_t)0x760b, (q15_t)0x2248, (q15_t)0x7612,\n    (q15_t)0x223d, (q15_t)0x7619, (q15_t)0x2233, (q15_t)0x7620, (q15_t)0x2228,\n    (q15_t)0x7626, (q15_t)0x221e, (q15_t)0x762d, (q15_t)0x2213, (q15_t)0x7634,\n    (q15_t)0x2208, (q15_t)0x763a, (q15_t)0x21fe, (q15_t)0x7641, (q15_t)0x21f3,\n    (q15_t)0x7648, (q15_t)0x21e8, (q15_t)0x764e, (q15_t)0x21de, (q15_t)0x7655,\n    (q15_t)0x21d3, (q15_t)0x765c, (q15_t)0x21c8, (q15_t)0x7662, (q15_t)0x21be,\n    (q15_t)0x7669, (q15_t)0x21b3, (q15_t)0x766f, (q15_t)0x21a8, (q15_t)0x7676,\n    (q15_t)0x219e, (q15_t)0x767d, (q15_t)0x2193, (q15_t)0x7683, (q15_t)0x2188,\n    (q15_t)0x768a, (q15_t)0x217d, (q15_t)0x7690, (q15_t)0x2173, (q15_t)0x7697,\n    (q15_t)0x2168, (q15_t)0x769d, (q15_t)0x215d, (q15_t)0x76a4, (q15_t)0x2153,\n    (q15_t)0x76ab, (q15_t)0x2148, (q15_t)0x76b1, (q15_t)0x213d, (q15_t)0x76b8,\n    (q15_t)0x2132, (q15_t)0x76be, (q15_t)0x2128, (q15_t)0x76c5, (q15_t)0x211d,\n    (q15_t)0x76cb, (q15_t)0x2112, (q15_t)0x76d2, (q15_t)0x2107, (q15_t)0x76d8,\n    (q15_t)0x20fd, (q15_t)0x76df, (q15_t)0x20f2, (q15_t)0x76e5, (q15_t)0x20e7,\n    (q15_t)0x76eb, (q15_t)0x20dc, (q15_t)0x76f2, (q15_t)0x20d1, (q15_t)0x76f8,\n    (q15_t)0x20c7, (q15_t)0x76ff, (q15_t)0x20bc, (q15_t)0x7705, (q15_t)0x20b1,\n    (q15_t)0x770c, (q15_t)0x20a6, (q15_t)0x7712, (q15_t)0x209b, (q15_t)0x7718,\n    (q15_t)0x2091, (q15_t)0x771f, (q15_t)0x2086, (q15_t)0x7725, (q15_t)0x207b,\n    (q15_t)0x772c, (q15_t)0x2070, (q15_t)0x7732, (q15_t)0x2065, (q15_t)0x7738,\n    (q15_t)0x205b, (q15_t)0x773f, (q15_t)0x2050, (q15_t)0x7745, (q15_t)0x2045,\n    (q15_t)0x774b, (q15_t)0x203a, (q15_t)0x7752, (q15_t)0x202f, (q15_t)0x7758,\n    (q15_t)0x2024, (q15_t)0x775e, (q15_t)0x2019, (q15_t)0x7765, (q15_t)0x200f,\n    (q15_t)0x776b, (q15_t)0x2004, (q15_t)0x7771, (q15_t)0x1ff9, (q15_t)0x7777,\n    (q15_t)0x1fee, (q15_t)0x777e, (q15_t)0x1fe3, (q15_t)0x7784, (q15_t)0x1fd8,\n    (q15_t)0x778a, (q15_t)0x1fcd, (q15_t)0x7790, (q15_t)0x1fc2, (q15_t)0x7797,\n    (q15_t)0x1fb7, (q15_t)0x779d, (q15_t)0x1fac, (q15_t)0x77a3, (q15_t)0x1fa2,\n    (q15_t)0x77a9, (q15_t)0x1f97, (q15_t)0x77b0, (q15_t)0x1f8c, (q15_t)0x77b6,\n    (q15_t)0x1f81, (q15_t)0x77bc, (q15_t)0x1f76, (q15_t)0x77c2, (q15_t)0x1f6b,\n    (q15_t)0x77c8, (q15_t)0x1f60, (q15_t)0x77ce, (q15_t)0x1f55, (q15_t)0x77d5,\n    (q15_t)0x1f4a, (q15_t)0x77db, (q15_t)0x1f3f, (q15_t)0x77e1, (q15_t)0x1f34,\n    (q15_t)0x77e7, (q15_t)0x1f29, (q15_t)0x77ed, (q15_t)0x1f1e, (q15_t)0x77f3,\n    (q15_t)0x1f13, (q15_t)0x77f9, (q15_t)0x1f08, (q15_t)0x77ff, (q15_t)0x1efd,\n    (q15_t)0x7805, (q15_t)0x1ef2, (q15_t)0x780b, (q15_t)0x1ee7, (q15_t)0x7812,\n    (q15_t)0x1edc, (q15_t)0x7818, (q15_t)0x1ed1, (q15_t)0x781e, (q15_t)0x1ec6,\n    (q15_t)0x7824, (q15_t)0x1ebb, (q15_t)0x782a, (q15_t)0x1eb0, (q15_t)0x7830,\n    (q15_t)0x1ea5, (q15_t)0x7836, (q15_t)0x1e9a, (q15_t)0x783c, (q15_t)0x1e8f,\n    (q15_t)0x7842, (q15_t)0x1e84, (q15_t)0x7848, (q15_t)0x1e79, (q15_t)0x784e,\n    (q15_t)0x1e6e, (q15_t)0x7854, (q15_t)0x1e63, (q15_t)0x785a, (q15_t)0x1e58,\n    (q15_t)0x7860, (q15_t)0x1e4d, (q15_t)0x7866, (q15_t)0x1e42, (q15_t)0x786b,\n    (q15_t)0x1e36, (q15_t)0x7871, (q15_t)0x1e2b, (q15_t)0x7877, (q15_t)0x1e20,\n    (q15_t)0x787d, (q15_t)0x1e15, (q15_t)0x7883, (q15_t)0x1e0a, (q15_t)0x7889,\n    (q15_t)0x1dff, (q15_t)0x788f, (q15_t)0x1df4, (q15_t)0x7895, (q15_t)0x1de9,\n    (q15_t)0x789b, (q15_t)0x1dde, (q15_t)0x78a1, (q15_t)0x1dd3, (q15_t)0x78a6,\n    (q15_t)0x1dc7, (q15_t)0x78ac, (q15_t)0x1dbc, (q15_t)0x78b2, (q15_t)0x1db1,\n    (q15_t)0x78b8, (q15_t)0x1da6, (q15_t)0x78be, (q15_t)0x1d9b, (q15_t)0x78c3,\n    (q15_t)0x1d90, (q15_t)0x78c9, (q15_t)0x1d85, (q15_t)0x78cf, (q15_t)0x1d79,\n    (q15_t)0x78d5, (q15_t)0x1d6e, (q15_t)0x78db, (q15_t)0x1d63, (q15_t)0x78e0,\n    (q15_t)0x1d58, (q15_t)0x78e6, (q15_t)0x1d4d, (q15_t)0x78ec, (q15_t)0x1d42,\n    (q15_t)0x78f2, (q15_t)0x1d36, (q15_t)0x78f7, (q15_t)0x1d2b, (q15_t)0x78fd,\n    (q15_t)0x1d20, (q15_t)0x7903, (q15_t)0x1d15, (q15_t)0x7909, (q15_t)0x1d0a,\n    (q15_t)0x790e, (q15_t)0x1cff, (q15_t)0x7914, (q15_t)0x1cf3, (q15_t)0x791a,\n    (q15_t)0x1ce8, (q15_t)0x791f, (q15_t)0x1cdd, (q15_t)0x7925, (q15_t)0x1cd2,\n    (q15_t)0x792b, (q15_t)0x1cc6, (q15_t)0x7930, (q15_t)0x1cbb, (q15_t)0x7936,\n    (q15_t)0x1cb0, (q15_t)0x793b, (q15_t)0x1ca5, (q15_t)0x7941, (q15_t)0x1c99,\n    (q15_t)0x7947, (q15_t)0x1c8e, (q15_t)0x794c, (q15_t)0x1c83, (q15_t)0x7952,\n    (q15_t)0x1c78, (q15_t)0x7958, (q15_t)0x1c6c, (q15_t)0x795d, (q15_t)0x1c61,\n    (q15_t)0x7963, (q15_t)0x1c56, (q15_t)0x7968, (q15_t)0x1c4b, (q15_t)0x796e,\n    (q15_t)0x1c3f, (q15_t)0x7973, (q15_t)0x1c34, (q15_t)0x7979, (q15_t)0x1c29,\n    (q15_t)0x797e, (q15_t)0x1c1e, (q15_t)0x7984, (q15_t)0x1c12, (q15_t)0x7989,\n    (q15_t)0x1c07, (q15_t)0x798f, (q15_t)0x1bfc, (q15_t)0x7994, (q15_t)0x1bf0,\n    (q15_t)0x799a, (q15_t)0x1be5, (q15_t)0x799f, (q15_t)0x1bda, (q15_t)0x79a5,\n    (q15_t)0x1bce, (q15_t)0x79aa, (q15_t)0x1bc3, (q15_t)0x79b0, (q15_t)0x1bb8,\n    (q15_t)0x79b5, (q15_t)0x1bac, (q15_t)0x79bb, (q15_t)0x1ba1, (q15_t)0x79c0,\n    (q15_t)0x1b96, (q15_t)0x79c5, (q15_t)0x1b8a, (q15_t)0x79cb, (q15_t)0x1b7f,\n    (q15_t)0x79d0, (q15_t)0x1b74, (q15_t)0x79d6, (q15_t)0x1b68, (q15_t)0x79db,\n    (q15_t)0x1b5d, (q15_t)0x79e0, (q15_t)0x1b52, (q15_t)0x79e6, (q15_t)0x1b46,\n    (q15_t)0x79eb, (q15_t)0x1b3b, (q15_t)0x79f0, (q15_t)0x1b30, (q15_t)0x79f6,\n    (q15_t)0x1b24, (q15_t)0x79fb, (q15_t)0x1b19, (q15_t)0x7a00, (q15_t)0x1b0d,\n    (q15_t)0x7a06, (q15_t)0x1b02, (q15_t)0x7a0b, (q15_t)0x1af7, (q15_t)0x7a10,\n    (q15_t)0x1aeb, (q15_t)0x7a16, (q15_t)0x1ae0, (q15_t)0x7a1b, (q15_t)0x1ad4,\n    (q15_t)0x7a20, (q15_t)0x1ac9, (q15_t)0x7a25, (q15_t)0x1abe, (q15_t)0x7a2b,\n    (q15_t)0x1ab2, (q15_t)0x7a30, (q15_t)0x1aa7, (q15_t)0x7a35, (q15_t)0x1a9b,\n    (q15_t)0x7a3a, (q15_t)0x1a90, (q15_t)0x7a3f, (q15_t)0x1a84, (q15_t)0x7a45,\n    (q15_t)0x1a79, (q15_t)0x7a4a, (q15_t)0x1a6e, (q15_t)0x7a4f, (q15_t)0x1a62,\n    (q15_t)0x7a54, (q15_t)0x1a57, (q15_t)0x7a59, (q15_t)0x1a4b, (q15_t)0x7a5f,\n    (q15_t)0x1a40, (q15_t)0x7a64, (q15_t)0x1a34, (q15_t)0x7a69, (q15_t)0x1a29,\n    (q15_t)0x7a6e, (q15_t)0x1a1d, (q15_t)0x7a73, (q15_t)0x1a12, (q15_t)0x7a78,\n    (q15_t)0x1a06, (q15_t)0x7a7d, (q15_t)0x19fb, (q15_t)0x7a82, (q15_t)0x19ef,\n    (q15_t)0x7a88, (q15_t)0x19e4, (q15_t)0x7a8d, (q15_t)0x19d8, (q15_t)0x7a92,\n    (q15_t)0x19cd, (q15_t)0x7a97, (q15_t)0x19c1, (q15_t)0x7a9c, (q15_t)0x19b6,\n    (q15_t)0x7aa1, (q15_t)0x19aa, (q15_t)0x7aa6, (q15_t)0x199f, (q15_t)0x7aab,\n    (q15_t)0x1993, (q15_t)0x7ab0, (q15_t)0x1988, (q15_t)0x7ab5, (q15_t)0x197c,\n    (q15_t)0x7aba, (q15_t)0x1971, (q15_t)0x7abf, (q15_t)0x1965, (q15_t)0x7ac4,\n    (q15_t)0x195a, (q15_t)0x7ac9, (q15_t)0x194e, (q15_t)0x7ace, (q15_t)0x1943,\n    (q15_t)0x7ad3, (q15_t)0x1937, (q15_t)0x7ad8, (q15_t)0x192c, (q15_t)0x7add,\n    (q15_t)0x1920, (q15_t)0x7ae2, (q15_t)0x1914, (q15_t)0x7ae6, (q15_t)0x1909,\n    (q15_t)0x7aeb, (q15_t)0x18fd, (q15_t)0x7af0, (q15_t)0x18f2, (q15_t)0x7af5,\n    (q15_t)0x18e6, (q15_t)0x7afa, (q15_t)0x18db, (q15_t)0x7aff, (q15_t)0x18cf,\n    (q15_t)0x7b04, (q15_t)0x18c3, (q15_t)0x7b09, (q15_t)0x18b8, (q15_t)0x7b0e,\n    (q15_t)0x18ac, (q15_t)0x7b12, (q15_t)0x18a1, (q15_t)0x7b17, (q15_t)0x1895,\n    (q15_t)0x7b1c, (q15_t)0x1889, (q15_t)0x7b21, (q15_t)0x187e, (q15_t)0x7b26,\n    (q15_t)0x1872, (q15_t)0x7b2a, (q15_t)0x1867, (q15_t)0x7b2f, (q15_t)0x185b,\n    (q15_t)0x7b34, (q15_t)0x184f, (q15_t)0x7b39, (q15_t)0x1844, (q15_t)0x7b3e,\n    (q15_t)0x1838, (q15_t)0x7b42, (q15_t)0x182d, (q15_t)0x7b47, (q15_t)0x1821,\n    (q15_t)0x7b4c, (q15_t)0x1815, (q15_t)0x7b50, (q15_t)0x180a, (q15_t)0x7b55,\n    (q15_t)0x17fe, (q15_t)0x7b5a, (q15_t)0x17f2, (q15_t)0x7b5f, (q15_t)0x17e7,\n    (q15_t)0x7b63, (q15_t)0x17db, (q15_t)0x7b68, (q15_t)0x17cf, (q15_t)0x7b6d,\n    (q15_t)0x17c4, (q15_t)0x7b71, (q15_t)0x17b8, (q15_t)0x7b76, (q15_t)0x17ac,\n    (q15_t)0x7b7b, (q15_t)0x17a1, (q15_t)0x7b7f, (q15_t)0x1795, (q15_t)0x7b84,\n    (q15_t)0x1789, (q15_t)0x7b88, (q15_t)0x177e, (q15_t)0x7b8d, (q15_t)0x1772,\n    (q15_t)0x7b92, (q15_t)0x1766, (q15_t)0x7b96, (q15_t)0x175b, (q15_t)0x7b9b,\n    (q15_t)0x174f, (q15_t)0x7b9f, (q15_t)0x1743, (q15_t)0x7ba4, (q15_t)0x1737,\n    (q15_t)0x7ba9, (q15_t)0x172c, (q15_t)0x7bad, (q15_t)0x1720, (q15_t)0x7bb2,\n    (q15_t)0x1714, (q15_t)0x7bb6, (q15_t)0x1709, (q15_t)0x7bbb, (q15_t)0x16fd,\n    (q15_t)0x7bbf, (q15_t)0x16f1, (q15_t)0x7bc4, (q15_t)0x16e5, (q15_t)0x7bc8,\n    (q15_t)0x16da, (q15_t)0x7bcd, (q15_t)0x16ce, (q15_t)0x7bd1, (q15_t)0x16c2,\n    (q15_t)0x7bd6, (q15_t)0x16b6, (q15_t)0x7bda, (q15_t)0x16ab, (q15_t)0x7bde,\n    (q15_t)0x169f, (q15_t)0x7be3, (q15_t)0x1693, (q15_t)0x7be7, (q15_t)0x1687,\n    (q15_t)0x7bec, (q15_t)0x167c, (q15_t)0x7bf0, (q15_t)0x1670, (q15_t)0x7bf5,\n    (q15_t)0x1664, (q15_t)0x7bf9, (q15_t)0x1658, (q15_t)0x7bfd, (q15_t)0x164c,\n    (q15_t)0x7c02, (q15_t)0x1641, (q15_t)0x7c06, (q15_t)0x1635, (q15_t)0x7c0a,\n    (q15_t)0x1629, (q15_t)0x7c0f, (q15_t)0x161d, (q15_t)0x7c13, (q15_t)0x1612,\n    (q15_t)0x7c17, (q15_t)0x1606, (q15_t)0x7c1c, (q15_t)0x15fa, (q15_t)0x7c20,\n    (q15_t)0x15ee, (q15_t)0x7c24, (q15_t)0x15e2, (q15_t)0x7c29, (q15_t)0x15d7,\n    (q15_t)0x7c2d, (q15_t)0x15cb, (q15_t)0x7c31, (q15_t)0x15bf, (q15_t)0x7c36,\n    (q15_t)0x15b3, (q15_t)0x7c3a, (q15_t)0x15a7, (q15_t)0x7c3e, (q15_t)0x159b,\n    (q15_t)0x7c42, (q15_t)0x1590, (q15_t)0x7c46, (q15_t)0x1584, (q15_t)0x7c4b,\n    (q15_t)0x1578, (q15_t)0x7c4f, (q15_t)0x156c, (q15_t)0x7c53, (q15_t)0x1560,\n    (q15_t)0x7c57, (q15_t)0x1554, (q15_t)0x7c5b, (q15_t)0x1549, (q15_t)0x7c60,\n    (q15_t)0x153d, (q15_t)0x7c64, (q15_t)0x1531, (q15_t)0x7c68, (q15_t)0x1525,\n    (q15_t)0x7c6c, (q15_t)0x1519, (q15_t)0x7c70, (q15_t)0x150d, (q15_t)0x7c74,\n    (q15_t)0x1501, (q15_t)0x7c79, (q15_t)0x14f6, (q15_t)0x7c7d, (q15_t)0x14ea,\n    (q15_t)0x7c81, (q15_t)0x14de, (q15_t)0x7c85, (q15_t)0x14d2, (q15_t)0x7c89,\n    (q15_t)0x14c6, (q15_t)0x7c8d, (q15_t)0x14ba, (q15_t)0x7c91, (q15_t)0x14ae,\n    (q15_t)0x7c95, (q15_t)0x14a2, (q15_t)0x7c99, (q15_t)0x1496, (q15_t)0x7c9d,\n    (q15_t)0x148b, (q15_t)0x7ca1, (q15_t)0x147f, (q15_t)0x7ca5, (q15_t)0x1473,\n    (q15_t)0x7ca9, (q15_t)0x1467, (q15_t)0x7cad, (q15_t)0x145b, (q15_t)0x7cb1,\n    (q15_t)0x144f, (q15_t)0x7cb5, (q15_t)0x1443, (q15_t)0x7cb9, (q15_t)0x1437,\n    (q15_t)0x7cbd, (q15_t)0x142b, (q15_t)0x7cc1, (q15_t)0x141f, (q15_t)0x7cc5,\n    (q15_t)0x1413, (q15_t)0x7cc9, (q15_t)0x1407, (q15_t)0x7ccd, (q15_t)0x13fb,\n    (q15_t)0x7cd1, (q15_t)0x13f0, (q15_t)0x7cd5, (q15_t)0x13e4, (q15_t)0x7cd9,\n    (q15_t)0x13d8, (q15_t)0x7cdd, (q15_t)0x13cc, (q15_t)0x7ce0, (q15_t)0x13c0,\n    (q15_t)0x7ce4, (q15_t)0x13b4, (q15_t)0x7ce8, (q15_t)0x13a8, (q15_t)0x7cec,\n    (q15_t)0x139c, (q15_t)0x7cf0, (q15_t)0x1390, (q15_t)0x7cf4, (q15_t)0x1384,\n    (q15_t)0x7cf8, (q15_t)0x1378, (q15_t)0x7cfb, (q15_t)0x136c, (q15_t)0x7cff,\n    (q15_t)0x1360, (q15_t)0x7d03, (q15_t)0x1354, (q15_t)0x7d07, (q15_t)0x1348,\n    (q15_t)0x7d0b, (q15_t)0x133c, (q15_t)0x7d0e, (q15_t)0x1330, (q15_t)0x7d12,\n    (q15_t)0x1324, (q15_t)0x7d16, (q15_t)0x1318, (q15_t)0x7d1a, (q15_t)0x130c,\n    (q15_t)0x7d1d, (q15_t)0x1300, (q15_t)0x7d21, (q15_t)0x12f4, (q15_t)0x7d25,\n    (q15_t)0x12e8, (q15_t)0x7d28, (q15_t)0x12dc, (q15_t)0x7d2c, (q15_t)0x12d0,\n    (q15_t)0x7d30, (q15_t)0x12c4, (q15_t)0x7d34, (q15_t)0x12b8, (q15_t)0x7d37,\n    (q15_t)0x12ac, (q15_t)0x7d3b, (q15_t)0x12a0, (q15_t)0x7d3f, (q15_t)0x1294,\n    (q15_t)0x7d42, (q15_t)0x1288, (q15_t)0x7d46, (q15_t)0x127c, (q15_t)0x7d49,\n    (q15_t)0x1270, (q15_t)0x7d4d, (q15_t)0x1264, (q15_t)0x7d51, (q15_t)0x1258,\n    (q15_t)0x7d54, (q15_t)0x124c, (q15_t)0x7d58, (q15_t)0x1240, (q15_t)0x7d5b,\n    (q15_t)0x1234, (q15_t)0x7d5f, (q15_t)0x1228, (q15_t)0x7d63, (q15_t)0x121c,\n    (q15_t)0x7d66, (q15_t)0x1210, (q15_t)0x7d6a, (q15_t)0x1204, (q15_t)0x7d6d,\n    (q15_t)0x11f7, (q15_t)0x7d71, (q15_t)0x11eb, (q15_t)0x7d74, (q15_t)0x11df,\n    (q15_t)0x7d78, (q15_t)0x11d3, (q15_t)0x7d7b, (q15_t)0x11c7, (q15_t)0x7d7f,\n    (q15_t)0x11bb, (q15_t)0x7d82, (q15_t)0x11af, (q15_t)0x7d86, (q15_t)0x11a3,\n    (q15_t)0x7d89, (q15_t)0x1197, (q15_t)0x7d8d, (q15_t)0x118b, (q15_t)0x7d90,\n    (q15_t)0x117f, (q15_t)0x7d93, (q15_t)0x1173, (q15_t)0x7d97, (q15_t)0x1167,\n    (q15_t)0x7d9a, (q15_t)0x115a, (q15_t)0x7d9e, (q15_t)0x114e, (q15_t)0x7da1,\n    (q15_t)0x1142, (q15_t)0x7da4, (q15_t)0x1136, (q15_t)0x7da8, (q15_t)0x112a,\n    (q15_t)0x7dab, (q15_t)0x111e, (q15_t)0x7daf, (q15_t)0x1112, (q15_t)0x7db2,\n    (q15_t)0x1106, (q15_t)0x7db5, (q15_t)0x10fa, (q15_t)0x7db9, (q15_t)0x10ed,\n    (q15_t)0x7dbc, (q15_t)0x10e1, (q15_t)0x7dbf, (q15_t)0x10d5, (q15_t)0x7dc2,\n    (q15_t)0x10c9, (q15_t)0x7dc6, (q15_t)0x10bd, (q15_t)0x7dc9, (q15_t)0x10b1,\n    (q15_t)0x7dcc, (q15_t)0x10a5, (q15_t)0x7dd0, (q15_t)0x1099, (q15_t)0x7dd3,\n    (q15_t)0x108c, (q15_t)0x7dd6, (q15_t)0x1080, (q15_t)0x7dd9, (q15_t)0x1074,\n    (q15_t)0x7ddd, (q15_t)0x1068, (q15_t)0x7de0, (q15_t)0x105c, (q15_t)0x7de3,\n    (q15_t)0x1050, (q15_t)0x7de6, (q15_t)0x1044, (q15_t)0x7de9, (q15_t)0x1037,\n    (q15_t)0x7ded, (q15_t)0x102b, (q15_t)0x7df0, (q15_t)0x101f, (q15_t)0x7df3,\n    (q15_t)0x1013, (q15_t)0x7df6, (q15_t)0x1007, (q15_t)0x7df9, (q15_t)0xffb,\n    (q15_t)0x7dfc, (q15_t)0xfee,  (q15_t)0x7dff, (q15_t)0xfe2,  (q15_t)0x7e03,\n    (q15_t)0xfd6,  (q15_t)0x7e06, (q15_t)0xfca,  (q15_t)0x7e09, (q15_t)0xfbe,\n    (q15_t)0x7e0c, (q15_t)0xfb2,  (q15_t)0x7e0f, (q15_t)0xfa5,  (q15_t)0x7e12,\n    (q15_t)0xf99,  (q15_t)0x7e15, (q15_t)0xf8d,  (q15_t)0x7e18, (q15_t)0xf81,\n    (q15_t)0x7e1b, (q15_t)0xf75,  (q15_t)0x7e1e, (q15_t)0xf68,  (q15_t)0x7e21,\n    (q15_t)0xf5c,  (q15_t)0x7e24, (q15_t)0xf50,  (q15_t)0x7e27, (q15_t)0xf44,\n    (q15_t)0x7e2a, (q15_t)0xf38,  (q15_t)0x7e2d, (q15_t)0xf2b,  (q15_t)0x7e30,\n    (q15_t)0xf1f,  (q15_t)0x7e33, (q15_t)0xf13,  (q15_t)0x7e36, (q15_t)0xf07,\n    (q15_t)0x7e39, (q15_t)0xefb,  (q15_t)0x7e3c, (q15_t)0xeee,  (q15_t)0x7e3f,\n    (q15_t)0xee2,  (q15_t)0x7e42, (q15_t)0xed6,  (q15_t)0x7e45, (q15_t)0xeca,\n    (q15_t)0x7e48, (q15_t)0xebd,  (q15_t)0x7e4a, (q15_t)0xeb1,  (q15_t)0x7e4d,\n    (q15_t)0xea5,  (q15_t)0x7e50, (q15_t)0xe99,  (q15_t)0x7e53, (q15_t)0xe8c,\n    (q15_t)0x7e56, (q15_t)0xe80,  (q15_t)0x7e59, (q15_t)0xe74,  (q15_t)0x7e5c,\n    (q15_t)0xe68,  (q15_t)0x7e5e, (q15_t)0xe5c,  (q15_t)0x7e61, (q15_t)0xe4f,\n    (q15_t)0x7e64, (q15_t)0xe43,  (q15_t)0x7e67, (q15_t)0xe37,  (q15_t)0x7e6a,\n    (q15_t)0xe2b,  (q15_t)0x7e6c, (q15_t)0xe1e,  (q15_t)0x7e6f, (q15_t)0xe12,\n    (q15_t)0x7e72, (q15_t)0xe06,  (q15_t)0x7e75, (q15_t)0xdf9,  (q15_t)0x7e77,\n    (q15_t)0xded,  (q15_t)0x7e7a, (q15_t)0xde1,  (q15_t)0x7e7d, (q15_t)0xdd5,\n    (q15_t)0x7e80, (q15_t)0xdc8,  (q15_t)0x7e82, (q15_t)0xdbc,  (q15_t)0x7e85,\n    (q15_t)0xdb0,  (q15_t)0x7e88, (q15_t)0xda4,  (q15_t)0x7e8a, (q15_t)0xd97,\n    (q15_t)0x7e8d, (q15_t)0xd8b,  (q15_t)0x7e90, (q15_t)0xd7f,  (q15_t)0x7e92,\n    (q15_t)0xd72,  (q15_t)0x7e95, (q15_t)0xd66,  (q15_t)0x7e98, (q15_t)0xd5a,\n    (q15_t)0x7e9a, (q15_t)0xd4e,  (q15_t)0x7e9d, (q15_t)0xd41,  (q15_t)0x7e9f,\n    (q15_t)0xd35,  (q15_t)0x7ea2, (q15_t)0xd29,  (q15_t)0x7ea5, (q15_t)0xd1c,\n    (q15_t)0x7ea7, (q15_t)0xd10,  (q15_t)0x7eaa, (q15_t)0xd04,  (q15_t)0x7eac,\n    (q15_t)0xcf8,  (q15_t)0x7eaf, (q15_t)0xceb,  (q15_t)0x7eb1, (q15_t)0xcdf,\n    (q15_t)0x7eb4, (q15_t)0xcd3,  (q15_t)0x7eb6, (q15_t)0xcc6,  (q15_t)0x7eb9,\n    (q15_t)0xcba,  (q15_t)0x7ebb, (q15_t)0xcae,  (q15_t)0x7ebe, (q15_t)0xca1,\n    (q15_t)0x7ec0, (q15_t)0xc95,  (q15_t)0x7ec3, (q15_t)0xc89,  (q15_t)0x7ec5,\n    (q15_t)0xc7c,  (q15_t)0x7ec8, (q15_t)0xc70,  (q15_t)0x7eca, (q15_t)0xc64,\n    (q15_t)0x7ecc, (q15_t)0xc57,  (q15_t)0x7ecf, (q15_t)0xc4b,  (q15_t)0x7ed1,\n    (q15_t)0xc3f,  (q15_t)0x7ed4, (q15_t)0xc32,  (q15_t)0x7ed6, (q15_t)0xc26,\n    (q15_t)0x7ed8, (q15_t)0xc1a,  (q15_t)0x7edb, (q15_t)0xc0d,  (q15_t)0x7edd,\n    (q15_t)0xc01,  (q15_t)0x7ee0, (q15_t)0xbf5,  (q15_t)0x7ee2, (q15_t)0xbe8,\n    (q15_t)0x7ee4, (q15_t)0xbdc,  (q15_t)0x7ee7, (q15_t)0xbd0,  (q15_t)0x7ee9,\n    (q15_t)0xbc3,  (q15_t)0x7eeb, (q15_t)0xbb7,  (q15_t)0x7eed, (q15_t)0xbab,\n    (q15_t)0x7ef0, (q15_t)0xb9e,  (q15_t)0x7ef2, (q15_t)0xb92,  (q15_t)0x7ef4,\n    (q15_t)0xb85,  (q15_t)0x7ef7, (q15_t)0xb79,  (q15_t)0x7ef9, (q15_t)0xb6d,\n    (q15_t)0x7efb, (q15_t)0xb60,  (q15_t)0x7efd, (q15_t)0xb54,  (q15_t)0x7f00,\n    (q15_t)0xb48,  (q15_t)0x7f02, (q15_t)0xb3b,  (q15_t)0x7f04, (q15_t)0xb2f,\n    (q15_t)0x7f06, (q15_t)0xb23,  (q15_t)0x7f08, (q15_t)0xb16,  (q15_t)0x7f0a,\n    (q15_t)0xb0a,  (q15_t)0x7f0d, (q15_t)0xafd,  (q15_t)0x7f0f, (q15_t)0xaf1,\n    (q15_t)0x7f11, (q15_t)0xae5,  (q15_t)0x7f13, (q15_t)0xad8,  (q15_t)0x7f15,\n    (q15_t)0xacc,  (q15_t)0x7f17, (q15_t)0xac0,  (q15_t)0x7f19, (q15_t)0xab3,\n    (q15_t)0x7f1c, (q15_t)0xaa7,  (q15_t)0x7f1e, (q15_t)0xa9a,  (q15_t)0x7f20,\n    (q15_t)0xa8e,  (q15_t)0x7f22, (q15_t)0xa82,  (q15_t)0x7f24, (q15_t)0xa75,\n    (q15_t)0x7f26, (q15_t)0xa69,  (q15_t)0x7f28, (q15_t)0xa5c,  (q15_t)0x7f2a,\n    (q15_t)0xa50,  (q15_t)0x7f2c, (q15_t)0xa44,  (q15_t)0x7f2e, (q15_t)0xa37,\n    (q15_t)0x7f30, (q15_t)0xa2b,  (q15_t)0x7f32, (q15_t)0xa1e,  (q15_t)0x7f34,\n    (q15_t)0xa12,  (q15_t)0x7f36, (q15_t)0xa06,  (q15_t)0x7f38, (q15_t)0x9f9,\n    (q15_t)0x7f3a, (q15_t)0x9ed,  (q15_t)0x7f3c, (q15_t)0x9e0,  (q15_t)0x7f3e,\n    (q15_t)0x9d4,  (q15_t)0x7f40, (q15_t)0x9c7,  (q15_t)0x7f42, (q15_t)0x9bb,\n    (q15_t)0x7f43, (q15_t)0x9af,  (q15_t)0x7f45, (q15_t)0x9a2,  (q15_t)0x7f47,\n    (q15_t)0x996,  (q15_t)0x7f49, (q15_t)0x989,  (q15_t)0x7f4b, (q15_t)0x97d,\n    (q15_t)0x7f4d, (q15_t)0x970,  (q15_t)0x7f4f, (q15_t)0x964,  (q15_t)0x7f51,\n    (q15_t)0x958,  (q15_t)0x7f52, (q15_t)0x94b,  (q15_t)0x7f54, (q15_t)0x93f,\n    (q15_t)0x7f56, (q15_t)0x932,  (q15_t)0x7f58, (q15_t)0x926,  (q15_t)0x7f5a,\n    (q15_t)0x919,  (q15_t)0x7f5b, (q15_t)0x90d,  (q15_t)0x7f5d, (q15_t)0x901,\n    (q15_t)0x7f5f, (q15_t)0x8f4,  (q15_t)0x7f61, (q15_t)0x8e8,  (q15_t)0x7f62,\n    (q15_t)0x8db,  (q15_t)0x7f64, (q15_t)0x8cf,  (q15_t)0x7f66, (q15_t)0x8c2,\n    (q15_t)0x7f68, (q15_t)0x8b6,  (q15_t)0x7f69, (q15_t)0x8a9,  (q15_t)0x7f6b,\n    (q15_t)0x89d,  (q15_t)0x7f6d, (q15_t)0x891,  (q15_t)0x7f6e, (q15_t)0x884,\n    (q15_t)0x7f70, (q15_t)0x878,  (q15_t)0x7f72, (q15_t)0x86b,  (q15_t)0x7f73,\n    (q15_t)0x85f,  (q15_t)0x7f75, (q15_t)0x852,  (q15_t)0x7f77, (q15_t)0x846,\n    (q15_t)0x7f78, (q15_t)0x839,  (q15_t)0x7f7a, (q15_t)0x82d,  (q15_t)0x7f7b,\n    (q15_t)0x820,  (q15_t)0x7f7d, (q15_t)0x814,  (q15_t)0x7f7f, (q15_t)0x807,\n    (q15_t)0x7f80, (q15_t)0x7fb,  (q15_t)0x7f82, (q15_t)0x7ef,  (q15_t)0x7f83,\n    (q15_t)0x7e2,  (q15_t)0x7f85, (q15_t)0x7d6,  (q15_t)0x7f86, (q15_t)0x7c9,\n    (q15_t)0x7f88, (q15_t)0x7bd,  (q15_t)0x7f89, (q15_t)0x7b0,  (q15_t)0x7f8b,\n    (q15_t)0x7a4,  (q15_t)0x7f8c, (q15_t)0x797,  (q15_t)0x7f8e, (q15_t)0x78b,\n    (q15_t)0x7f8f, (q15_t)0x77e,  (q15_t)0x7f91, (q15_t)0x772,  (q15_t)0x7f92,\n    (q15_t)0x765,  (q15_t)0x7f94, (q15_t)0x759,  (q15_t)0x7f95, (q15_t)0x74c,\n    (q15_t)0x7f97, (q15_t)0x740,  (q15_t)0x7f98, (q15_t)0x733,  (q15_t)0x7f99,\n    (q15_t)0x727,  (q15_t)0x7f9b, (q15_t)0x71a,  (q15_t)0x7f9c, (q15_t)0x70e,\n    (q15_t)0x7f9e, (q15_t)0x701,  (q15_t)0x7f9f, (q15_t)0x6f5,  (q15_t)0x7fa0,\n    (q15_t)0x6e8,  (q15_t)0x7fa2, (q15_t)0x6dc,  (q15_t)0x7fa3, (q15_t)0x6cf,\n    (q15_t)0x7fa4, (q15_t)0x6c3,  (q15_t)0x7fa6, (q15_t)0x6b6,  (q15_t)0x7fa7,\n    (q15_t)0x6aa,  (q15_t)0x7fa8, (q15_t)0x69d,  (q15_t)0x7faa, (q15_t)0x691,\n    (q15_t)0x7fab, (q15_t)0x684,  (q15_t)0x7fac, (q15_t)0x678,  (q15_t)0x7fad,\n    (q15_t)0x66b,  (q15_t)0x7faf, (q15_t)0x65f,  (q15_t)0x7fb0, (q15_t)0x652,\n    (q15_t)0x7fb1, (q15_t)0x646,  (q15_t)0x7fb2, (q15_t)0x639,  (q15_t)0x7fb4,\n    (q15_t)0x62d,  (q15_t)0x7fb5, (q15_t)0x620,  (q15_t)0x7fb6, (q15_t)0x614,\n    (q15_t)0x7fb7, (q15_t)0x607,  (q15_t)0x7fb8, (q15_t)0x5fb,  (q15_t)0x7fb9,\n    (q15_t)0x5ee,  (q15_t)0x7fbb, (q15_t)0x5e2,  (q15_t)0x7fbc, (q15_t)0x5d5,\n    (q15_t)0x7fbd, (q15_t)0x5c9,  (q15_t)0x7fbe, (q15_t)0x5bc,  (q15_t)0x7fbf,\n    (q15_t)0x5b0,  (q15_t)0x7fc0, (q15_t)0x5a3,  (q15_t)0x7fc1, (q15_t)0x597,\n    (q15_t)0x7fc3, (q15_t)0x58a,  (q15_t)0x7fc4, (q15_t)0x57e,  (q15_t)0x7fc5,\n    (q15_t)0x571,  (q15_t)0x7fc6, (q15_t)0x565,  (q15_t)0x7fc7, (q15_t)0x558,\n    (q15_t)0x7fc8, (q15_t)0x54c,  (q15_t)0x7fc9, (q15_t)0x53f,  (q15_t)0x7fca,\n    (q15_t)0x533,  (q15_t)0x7fcb, (q15_t)0x526,  (q15_t)0x7fcc, (q15_t)0x51a,\n    (q15_t)0x7fcd, (q15_t)0x50d,  (q15_t)0x7fce, (q15_t)0x500,  (q15_t)0x7fcf,\n    (q15_t)0x4f4,  (q15_t)0x7fd0, (q15_t)0x4e7,  (q15_t)0x7fd1, (q15_t)0x4db,\n    (q15_t)0x7fd2, (q15_t)0x4ce,  (q15_t)0x7fd3, (q15_t)0x4c2,  (q15_t)0x7fd4,\n    (q15_t)0x4b5,  (q15_t)0x7fd5, (q15_t)0x4a9,  (q15_t)0x7fd5, (q15_t)0x49c,\n    (q15_t)0x7fd6, (q15_t)0x490,  (q15_t)0x7fd7, (q15_t)0x483,  (q15_t)0x7fd8,\n    (q15_t)0x477,  (q15_t)0x7fd9, (q15_t)0x46a,  (q15_t)0x7fda, (q15_t)0x45e,\n    (q15_t)0x7fdb, (q15_t)0x451,  (q15_t)0x7fdc, (q15_t)0x444,  (q15_t)0x7fdc,\n    (q15_t)0x438,  (q15_t)0x7fdd, (q15_t)0x42b,  (q15_t)0x7fde, (q15_t)0x41f,\n    (q15_t)0x7fdf, (q15_t)0x412,  (q15_t)0x7fe0, (q15_t)0x406,  (q15_t)0x7fe0,\n    (q15_t)0x3f9,  (q15_t)0x7fe1, (q15_t)0x3ed,  (q15_t)0x7fe2, (q15_t)0x3e0,\n    (q15_t)0x7fe3, (q15_t)0x3d4,  (q15_t)0x7fe3, (q15_t)0x3c7,  (q15_t)0x7fe4,\n    (q15_t)0x3bb,  (q15_t)0x7fe5, (q15_t)0x3ae,  (q15_t)0x7fe6, (q15_t)0x3a1,\n    (q15_t)0x7fe6, (q15_t)0x395,  (q15_t)0x7fe7, (q15_t)0x388,  (q15_t)0x7fe8,\n    (q15_t)0x37c,  (q15_t)0x7fe8, (q15_t)0x36f,  (q15_t)0x7fe9, (q15_t)0x363,\n    (q15_t)0x7fea, (q15_t)0x356,  (q15_t)0x7fea, (q15_t)0x34a,  (q15_t)0x7feb,\n    (q15_t)0x33d,  (q15_t)0x7fec, (q15_t)0x330,  (q15_t)0x7fec, (q15_t)0x324,\n    (q15_t)0x7fed, (q15_t)0x317,  (q15_t)0x7fed, (q15_t)0x30b,  (q15_t)0x7fee,\n    (q15_t)0x2fe,  (q15_t)0x7fef, (q15_t)0x2f2,  (q15_t)0x7fef, (q15_t)0x2e5,\n    (q15_t)0x7ff0, (q15_t)0x2d9,  (q15_t)0x7ff0, (q15_t)0x2cc,  (q15_t)0x7ff1,\n    (q15_t)0x2c0,  (q15_t)0x7ff1, (q15_t)0x2b3,  (q15_t)0x7ff2, (q15_t)0x2a6,\n    (q15_t)0x7ff2, (q15_t)0x29a,  (q15_t)0x7ff3, (q15_t)0x28d,  (q15_t)0x7ff3,\n    (q15_t)0x281,  (q15_t)0x7ff4, (q15_t)0x274,  (q15_t)0x7ff4, (q15_t)0x268,\n    (q15_t)0x7ff5, (q15_t)0x25b,  (q15_t)0x7ff5, (q15_t)0x24e,  (q15_t)0x7ff6,\n    (q15_t)0x242,  (q15_t)0x7ff6, (q15_t)0x235,  (q15_t)0x7ff7, (q15_t)0x229,\n    (q15_t)0x7ff7, (q15_t)0x21c,  (q15_t)0x7ff7, (q15_t)0x210,  (q15_t)0x7ff8,\n    (q15_t)0x203,  (q15_t)0x7ff8, (q15_t)0x1f7,  (q15_t)0x7ff9, (q15_t)0x1ea,\n    (q15_t)0x7ff9, (q15_t)0x1dd,  (q15_t)0x7ff9, (q15_t)0x1d1,  (q15_t)0x7ffa,\n    (q15_t)0x1c4,  (q15_t)0x7ffa, (q15_t)0x1b8,  (q15_t)0x7ffa, (q15_t)0x1ab,\n    (q15_t)0x7ffb, (q15_t)0x19f,  (q15_t)0x7ffb, (q15_t)0x192,  (q15_t)0x7ffb,\n    (q15_t)0x186,  (q15_t)0x7ffc, (q15_t)0x179,  (q15_t)0x7ffc, (q15_t)0x16c,\n    (q15_t)0x7ffc, (q15_t)0x160,  (q15_t)0x7ffc, (q15_t)0x153,  (q15_t)0x7ffd,\n    (q15_t)0x147,  (q15_t)0x7ffd, (q15_t)0x13a,  (q15_t)0x7ffd, (q15_t)0x12e,\n    (q15_t)0x7ffd, (q15_t)0x121,  (q15_t)0x7ffe, (q15_t)0x114,  (q15_t)0x7ffe,\n    (q15_t)0x108,  (q15_t)0x7ffe, (q15_t)0xfb,   (q15_t)0x7ffe, (q15_t)0xef,\n    (q15_t)0x7ffe, (q15_t)0xe2,   (q15_t)0x7fff, (q15_t)0xd6,   (q15_t)0x7fff,\n    (q15_t)0xc9,   (q15_t)0x7fff, (q15_t)0xbc,   (q15_t)0x7fff, (q15_t)0xb0,\n    (q15_t)0x7fff, (q15_t)0xa3,   (q15_t)0x7fff, (q15_t)0x97,   (q15_t)0x7fff,\n    (q15_t)0x8a,   (q15_t)0x7fff, (q15_t)0x7e,   (q15_t)0x7fff, (q15_t)0x71,\n    (q15_t)0x7fff, (q15_t)0x65,   (q15_t)0x7fff, (q15_t)0x58,   (q15_t)0x7fff,\n    (q15_t)0x4b,   (q15_t)0x7fff, (q15_t)0x3f,   (q15_t)0x7fff, (q15_t)0x32,\n    (q15_t)0x7fff, (q15_t)0x26,   (q15_t)0x7fff, (q15_t)0x19,   (q15_t)0x7fff,\n    (q15_t)0xd,    (q15_t)0x7fff, (q15_t)0x0,    (q15_t)0x7fff, (q15_t)0xfff3,\n    (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffda, (q15_t)0x7fff,\n    (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc1, (q15_t)0x7fff, (q15_t)0xffb5,\n    (q15_t)0x7fff, (q15_t)0xffa8, (q15_t)0x7fff, (q15_t)0xff9b, (q15_t)0x7fff,\n    (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff82, (q15_t)0x7fff, (q15_t)0xff76,\n    (q15_t)0x7fff, (q15_t)0xff69, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff,\n    (q15_t)0xff50, (q15_t)0x7fff, (q15_t)0xff44, (q15_t)0x7fff, (q15_t)0xff37,\n    (q15_t)0x7fff, (q15_t)0xff2a, (q15_t)0x7ffe, (q15_t)0xff1e, (q15_t)0x7ffe,\n    (q15_t)0xff11, (q15_t)0x7ffe, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfef8,\n    (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffd, (q15_t)0xfedf, (q15_t)0x7ffd,\n    (q15_t)0xfed2, (q15_t)0x7ffd, (q15_t)0xfec6, (q15_t)0x7ffd, (q15_t)0xfeb9,\n    (q15_t)0x7ffc, (q15_t)0xfead, (q15_t)0x7ffc, (q15_t)0xfea0, (q15_t)0x7ffc,\n    (q15_t)0xfe94, (q15_t)0x7ffc, (q15_t)0xfe87, (q15_t)0x7ffb, (q15_t)0xfe7a,\n    (q15_t)0x7ffb, (q15_t)0xfe6e, (q15_t)0x7ffb, (q15_t)0xfe61, (q15_t)0x7ffa,\n    (q15_t)0xfe55, (q15_t)0x7ffa, (q15_t)0xfe48, (q15_t)0x7ffa, (q15_t)0xfe3c,\n    (q15_t)0x7ff9, (q15_t)0xfe2f, (q15_t)0x7ff9, (q15_t)0xfe23, (q15_t)0x7ff9,\n    (q15_t)0xfe16, (q15_t)0x7ff8, (q15_t)0xfe09, (q15_t)0x7ff8, (q15_t)0xfdfd,\n    (q15_t)0x7ff7, (q15_t)0xfdf0, (q15_t)0x7ff7, (q15_t)0xfde4, (q15_t)0x7ff7,\n    (q15_t)0xfdd7, (q15_t)0x7ff6, (q15_t)0xfdcb, (q15_t)0x7ff6, (q15_t)0xfdbe,\n    (q15_t)0x7ff5, (q15_t)0xfdb2, (q15_t)0x7ff5, (q15_t)0xfda5, (q15_t)0x7ff4,\n    (q15_t)0xfd98, (q15_t)0x7ff4, (q15_t)0xfd8c, (q15_t)0x7ff3, (q15_t)0xfd7f,\n    (q15_t)0x7ff3, (q15_t)0xfd73, (q15_t)0x7ff2, (q15_t)0xfd66, (q15_t)0x7ff2,\n    (q15_t)0xfd5a, (q15_t)0x7ff1, (q15_t)0xfd4d, (q15_t)0x7ff1, (q15_t)0xfd40,\n    (q15_t)0x7ff0, (q15_t)0xfd34, (q15_t)0x7ff0, (q15_t)0xfd27, (q15_t)0x7fef,\n    (q15_t)0xfd1b, (q15_t)0x7fef, (q15_t)0xfd0e, (q15_t)0x7fee, (q15_t)0xfd02,\n    (q15_t)0x7fed, (q15_t)0xfcf5, (q15_t)0x7fed, (q15_t)0xfce9, (q15_t)0x7fec,\n    (q15_t)0xfcdc, (q15_t)0x7fec, (q15_t)0xfcd0, (q15_t)0x7feb, (q15_t)0xfcc3,\n    (q15_t)0x7fea, (q15_t)0xfcb6, (q15_t)0x7fea, (q15_t)0xfcaa, (q15_t)0x7fe9,\n    (q15_t)0xfc9d, (q15_t)0x7fe8, (q15_t)0xfc91, (q15_t)0x7fe8, (q15_t)0xfc84,\n    (q15_t)0x7fe7, (q15_t)0xfc78, (q15_t)0x7fe6, (q15_t)0xfc6b, (q15_t)0x7fe6,\n    (q15_t)0xfc5f, (q15_t)0x7fe5, (q15_t)0xfc52, (q15_t)0x7fe4, (q15_t)0xfc45,\n    (q15_t)0x7fe3, (q15_t)0xfc39, (q15_t)0x7fe3, (q15_t)0xfc2c, (q15_t)0x7fe2,\n    (q15_t)0xfc20, (q15_t)0x7fe1, (q15_t)0xfc13, (q15_t)0x7fe0, (q15_t)0xfc07,\n    (q15_t)0x7fe0, (q15_t)0xfbfa, (q15_t)0x7fdf, (q15_t)0xfbee, (q15_t)0x7fde,\n    (q15_t)0xfbe1, (q15_t)0x7fdd, (q15_t)0xfbd5, (q15_t)0x7fdc, (q15_t)0xfbc8,\n    (q15_t)0x7fdc, (q15_t)0xfbbc, (q15_t)0x7fdb, (q15_t)0xfbaf, (q15_t)0x7fda,\n    (q15_t)0xfba2, (q15_t)0x7fd9, (q15_t)0xfb96, (q15_t)0x7fd8, (q15_t)0xfb89,\n    (q15_t)0x7fd7, (q15_t)0xfb7d, (q15_t)0x7fd6, (q15_t)0xfb70, (q15_t)0x7fd5,\n    (q15_t)0xfb64, (q15_t)0x7fd5, (q15_t)0xfb57, (q15_t)0x7fd4, (q15_t)0xfb4b,\n    (q15_t)0x7fd3, (q15_t)0xfb3e, (q15_t)0x7fd2, (q15_t)0xfb32, (q15_t)0x7fd1,\n    (q15_t)0xfb25, (q15_t)0x7fd0, (q15_t)0xfb19, (q15_t)0x7fcf, (q15_t)0xfb0c,\n    (q15_t)0x7fce, (q15_t)0xfb00, (q15_t)0x7fcd, (q15_t)0xfaf3, (q15_t)0x7fcc,\n    (q15_t)0xfae6, (q15_t)0x7fcb, (q15_t)0xfada, (q15_t)0x7fca, (q15_t)0xfacd,\n    (q15_t)0x7fc9, (q15_t)0xfac1, (q15_t)0x7fc8, (q15_t)0xfab4, (q15_t)0x7fc7,\n    (q15_t)0xfaa8, (q15_t)0x7fc6, (q15_t)0xfa9b, (q15_t)0x7fc5, (q15_t)0xfa8f,\n    (q15_t)0x7fc4, (q15_t)0xfa82, (q15_t)0x7fc3, (q15_t)0xfa76, (q15_t)0x7fc1,\n    (q15_t)0xfa69, (q15_t)0x7fc0, (q15_t)0xfa5d, (q15_t)0x7fbf, (q15_t)0xfa50,\n    (q15_t)0x7fbe, (q15_t)0xfa44, (q15_t)0x7fbd, (q15_t)0xfa37, (q15_t)0x7fbc,\n    (q15_t)0xfa2b, (q15_t)0x7fbb, (q15_t)0xfa1e, (q15_t)0x7fb9, (q15_t)0xfa12,\n    (q15_t)0x7fb8, (q15_t)0xfa05, (q15_t)0x7fb7, (q15_t)0xf9f9, (q15_t)0x7fb6,\n    (q15_t)0xf9ec, (q15_t)0x7fb5, (q15_t)0xf9e0, (q15_t)0x7fb4, (q15_t)0xf9d3,\n    (q15_t)0x7fb2, (q15_t)0xf9c7, (q15_t)0x7fb1, (q15_t)0xf9ba, (q15_t)0x7fb0,\n    (q15_t)0xf9ae, (q15_t)0x7faf, (q15_t)0xf9a1, (q15_t)0x7fad, (q15_t)0xf995,\n    (q15_t)0x7fac, (q15_t)0xf988, (q15_t)0x7fab, (q15_t)0xf97c, (q15_t)0x7faa,\n    (q15_t)0xf96f, (q15_t)0x7fa8, (q15_t)0xf963, (q15_t)0x7fa7, (q15_t)0xf956,\n    (q15_t)0x7fa6, (q15_t)0xf94a, (q15_t)0x7fa4, (q15_t)0xf93d, (q15_t)0x7fa3,\n    (q15_t)0xf931, (q15_t)0x7fa2, (q15_t)0xf924, (q15_t)0x7fa0, (q15_t)0xf918,\n    (q15_t)0x7f9f, (q15_t)0xf90b, (q15_t)0x7f9e, (q15_t)0xf8ff, (q15_t)0x7f9c,\n    (q15_t)0xf8f2, (q15_t)0x7f9b, (q15_t)0xf8e6, (q15_t)0x7f99, (q15_t)0xf8d9,\n    (q15_t)0x7f98, (q15_t)0xf8cd, (q15_t)0x7f97, (q15_t)0xf8c0, (q15_t)0x7f95,\n    (q15_t)0xf8b4, (q15_t)0x7f94, (q15_t)0xf8a7, (q15_t)0x7f92, (q15_t)0xf89b,\n    (q15_t)0x7f91, (q15_t)0xf88e, (q15_t)0x7f8f, (q15_t)0xf882, (q15_t)0x7f8e,\n    (q15_t)0xf875, (q15_t)0x7f8c, (q15_t)0xf869, (q15_t)0x7f8b, (q15_t)0xf85c,\n    (q15_t)0x7f89, (q15_t)0xf850, (q15_t)0x7f88, (q15_t)0xf843, (q15_t)0x7f86,\n    (q15_t)0xf837, (q15_t)0x7f85, (q15_t)0xf82a, (q15_t)0x7f83, (q15_t)0xf81e,\n    (q15_t)0x7f82, (q15_t)0xf811, (q15_t)0x7f80, (q15_t)0xf805, (q15_t)0x7f7f,\n    (q15_t)0xf7f9, (q15_t)0x7f7d, (q15_t)0xf7ec, (q15_t)0x7f7b, (q15_t)0xf7e0,\n    (q15_t)0x7f7a, (q15_t)0xf7d3, (q15_t)0x7f78, (q15_t)0xf7c7, (q15_t)0x7f77,\n    (q15_t)0xf7ba, (q15_t)0x7f75, (q15_t)0xf7ae, (q15_t)0x7f73, (q15_t)0xf7a1,\n    (q15_t)0x7f72, (q15_t)0xf795, (q15_t)0x7f70, (q15_t)0xf788, (q15_t)0x7f6e,\n    (q15_t)0xf77c, (q15_t)0x7f6d, (q15_t)0xf76f, (q15_t)0x7f6b, (q15_t)0xf763,\n    (q15_t)0x7f69, (q15_t)0xf757, (q15_t)0x7f68, (q15_t)0xf74a, (q15_t)0x7f66,\n    (q15_t)0xf73e, (q15_t)0x7f64, (q15_t)0xf731, (q15_t)0x7f62, (q15_t)0xf725,\n    (q15_t)0x7f61, (q15_t)0xf718, (q15_t)0x7f5f, (q15_t)0xf70c, (q15_t)0x7f5d,\n    (q15_t)0xf6ff, (q15_t)0x7f5b, (q15_t)0xf6f3, (q15_t)0x7f5a, (q15_t)0xf6e7,\n    (q15_t)0x7f58, (q15_t)0xf6da, (q15_t)0x7f56, (q15_t)0xf6ce, (q15_t)0x7f54,\n    (q15_t)0xf6c1, (q15_t)0x7f52, (q15_t)0xf6b5, (q15_t)0x7f51, (q15_t)0xf6a8,\n    (q15_t)0x7f4f, (q15_t)0xf69c, (q15_t)0x7f4d, (q15_t)0xf690, (q15_t)0x7f4b,\n    (q15_t)0xf683, (q15_t)0x7f49, (q15_t)0xf677, (q15_t)0x7f47, (q15_t)0xf66a,\n    (q15_t)0x7f45, (q15_t)0xf65e, (q15_t)0x7f43, (q15_t)0xf651, (q15_t)0x7f42,\n    (q15_t)0xf645, (q15_t)0x7f40, (q15_t)0xf639, (q15_t)0x7f3e, (q15_t)0xf62c,\n    (q15_t)0x7f3c, (q15_t)0xf620, (q15_t)0x7f3a, (q15_t)0xf613, (q15_t)0x7f38,\n    (q15_t)0xf607, (q15_t)0x7f36, (q15_t)0xf5fa, (q15_t)0x7f34, (q15_t)0xf5ee,\n    (q15_t)0x7f32, (q15_t)0xf5e2, (q15_t)0x7f30, (q15_t)0xf5d5, (q15_t)0x7f2e,\n    (q15_t)0xf5c9, (q15_t)0x7f2c, (q15_t)0xf5bc, (q15_t)0x7f2a, (q15_t)0xf5b0,\n    (q15_t)0x7f28, (q15_t)0xf5a4, (q15_t)0x7f26, (q15_t)0xf597, (q15_t)0x7f24,\n    (q15_t)0xf58b, (q15_t)0x7f22, (q15_t)0xf57e, (q15_t)0x7f20, (q15_t)0xf572,\n    (q15_t)0x7f1e, (q15_t)0xf566, (q15_t)0x7f1c, (q15_t)0xf559, (q15_t)0x7f19,\n    (q15_t)0xf54d, (q15_t)0x7f17, (q15_t)0xf540, (q15_t)0x7f15, (q15_t)0xf534,\n    (q15_t)0x7f13, (q15_t)0xf528, (q15_t)0x7f11, (q15_t)0xf51b, (q15_t)0x7f0f,\n    (q15_t)0xf50f, (q15_t)0x7f0d, (q15_t)0xf503, (q15_t)0x7f0a, (q15_t)0xf4f6,\n    (q15_t)0x7f08, (q15_t)0xf4ea, (q15_t)0x7f06, (q15_t)0xf4dd, (q15_t)0x7f04,\n    (q15_t)0xf4d1, (q15_t)0x7f02, (q15_t)0xf4c5, (q15_t)0x7f00, (q15_t)0xf4b8,\n    (q15_t)0x7efd, (q15_t)0xf4ac, (q15_t)0x7efb, (q15_t)0xf4a0, (q15_t)0x7ef9,\n    (q15_t)0xf493, (q15_t)0x7ef7, (q15_t)0xf487, (q15_t)0x7ef4, (q15_t)0xf47b,\n    (q15_t)0x7ef2, (q15_t)0xf46e, (q15_t)0x7ef0, (q15_t)0xf462, (q15_t)0x7eed,\n    (q15_t)0xf455, (q15_t)0x7eeb, (q15_t)0xf449, (q15_t)0x7ee9, (q15_t)0xf43d,\n    (q15_t)0x7ee7, (q15_t)0xf430, (q15_t)0x7ee4, (q15_t)0xf424, (q15_t)0x7ee2,\n    (q15_t)0xf418, (q15_t)0x7ee0, (q15_t)0xf40b, (q15_t)0x7edd, (q15_t)0xf3ff,\n    (q15_t)0x7edb, (q15_t)0xf3f3, (q15_t)0x7ed8, (q15_t)0xf3e6, (q15_t)0x7ed6,\n    (q15_t)0xf3da, (q15_t)0x7ed4, (q15_t)0xf3ce, (q15_t)0x7ed1, (q15_t)0xf3c1,\n    (q15_t)0x7ecf, (q15_t)0xf3b5, (q15_t)0x7ecc, (q15_t)0xf3a9, (q15_t)0x7eca,\n    (q15_t)0xf39c, (q15_t)0x7ec8, (q15_t)0xf390, (q15_t)0x7ec5, (q15_t)0xf384,\n    (q15_t)0x7ec3, (q15_t)0xf377, (q15_t)0x7ec0, (q15_t)0xf36b, (q15_t)0x7ebe,\n    (q15_t)0xf35f, (q15_t)0x7ebb, (q15_t)0xf352, (q15_t)0x7eb9, (q15_t)0xf346,\n    (q15_t)0x7eb6, (q15_t)0xf33a, (q15_t)0x7eb4, (q15_t)0xf32d, (q15_t)0x7eb1,\n    (q15_t)0xf321, (q15_t)0x7eaf, (q15_t)0xf315, (q15_t)0x7eac, (q15_t)0xf308,\n    (q15_t)0x7eaa, (q15_t)0xf2fc, (q15_t)0x7ea7, (q15_t)0xf2f0, (q15_t)0x7ea5,\n    (q15_t)0xf2e4, (q15_t)0x7ea2, (q15_t)0xf2d7, (q15_t)0x7e9f, (q15_t)0xf2cb,\n    (q15_t)0x7e9d, (q15_t)0xf2bf, (q15_t)0x7e9a, (q15_t)0xf2b2, (q15_t)0x7e98,\n    (q15_t)0xf2a6, (q15_t)0x7e95, (q15_t)0xf29a, (q15_t)0x7e92, (q15_t)0xf28e,\n    (q15_t)0x7e90, (q15_t)0xf281, (q15_t)0x7e8d, (q15_t)0xf275, (q15_t)0x7e8a,\n    (q15_t)0xf269, (q15_t)0x7e88, (q15_t)0xf25c, (q15_t)0x7e85, (q15_t)0xf250,\n    (q15_t)0x7e82, (q15_t)0xf244, (q15_t)0x7e80, (q15_t)0xf238, (q15_t)0x7e7d,\n    (q15_t)0xf22b, (q15_t)0x7e7a, (q15_t)0xf21f, (q15_t)0x7e77, (q15_t)0xf213,\n    (q15_t)0x7e75, (q15_t)0xf207, (q15_t)0x7e72, (q15_t)0xf1fa, (q15_t)0x7e6f,\n    (q15_t)0xf1ee, (q15_t)0x7e6c, (q15_t)0xf1e2, (q15_t)0x7e6a, (q15_t)0xf1d5,\n    (q15_t)0x7e67, (q15_t)0xf1c9, (q15_t)0x7e64, (q15_t)0xf1bd, (q15_t)0x7e61,\n    (q15_t)0xf1b1, (q15_t)0x7e5e, (q15_t)0xf1a4, (q15_t)0x7e5c, (q15_t)0xf198,\n    (q15_t)0x7e59, (q15_t)0xf18c, (q15_t)0x7e56, (q15_t)0xf180, (q15_t)0x7e53,\n    (q15_t)0xf174, (q15_t)0x7e50, (q15_t)0xf167, (q15_t)0x7e4d, (q15_t)0xf15b,\n    (q15_t)0x7e4a, (q15_t)0xf14f, (q15_t)0x7e48, (q15_t)0xf143, (q15_t)0x7e45,\n    (q15_t)0xf136, (q15_t)0x7e42, (q15_t)0xf12a, (q15_t)0x7e3f, (q15_t)0xf11e,\n    (q15_t)0x7e3c, (q15_t)0xf112, (q15_t)0x7e39, (q15_t)0xf105, (q15_t)0x7e36,\n    (q15_t)0xf0f9, (q15_t)0x7e33, (q15_t)0xf0ed, (q15_t)0x7e30, (q15_t)0xf0e1,\n    (q15_t)0x7e2d, (q15_t)0xf0d5, (q15_t)0x7e2a, (q15_t)0xf0c8, (q15_t)0x7e27,\n    (q15_t)0xf0bc, (q15_t)0x7e24, (q15_t)0xf0b0, (q15_t)0x7e21, (q15_t)0xf0a4,\n    (q15_t)0x7e1e, (q15_t)0xf098, (q15_t)0x7e1b, (q15_t)0xf08b, (q15_t)0x7e18,\n    (q15_t)0xf07f, (q15_t)0x7e15, (q15_t)0xf073, (q15_t)0x7e12, (q15_t)0xf067,\n    (q15_t)0x7e0f, (q15_t)0xf05b, (q15_t)0x7e0c, (q15_t)0xf04e, (q15_t)0x7e09,\n    (q15_t)0xf042, (q15_t)0x7e06, (q15_t)0xf036, (q15_t)0x7e03, (q15_t)0xf02a,\n    (q15_t)0x7dff, (q15_t)0xf01e, (q15_t)0x7dfc, (q15_t)0xf012, (q15_t)0x7df9,\n    (q15_t)0xf005, (q15_t)0x7df6, (q15_t)0xeff9, (q15_t)0x7df3, (q15_t)0xefed,\n    (q15_t)0x7df0, (q15_t)0xefe1, (q15_t)0x7ded, (q15_t)0xefd5, (q15_t)0x7de9,\n    (q15_t)0xefc9, (q15_t)0x7de6, (q15_t)0xefbc, (q15_t)0x7de3, (q15_t)0xefb0,\n    (q15_t)0x7de0, (q15_t)0xefa4, (q15_t)0x7ddd, (q15_t)0xef98, (q15_t)0x7dd9,\n    (q15_t)0xef8c, (q15_t)0x7dd6, (q15_t)0xef80, (q15_t)0x7dd3, (q15_t)0xef74,\n    (q15_t)0x7dd0, (q15_t)0xef67, (q15_t)0x7dcc, (q15_t)0xef5b, (q15_t)0x7dc9,\n    (q15_t)0xef4f, (q15_t)0x7dc6, (q15_t)0xef43, (q15_t)0x7dc2, (q15_t)0xef37,\n    (q15_t)0x7dbf, (q15_t)0xef2b, (q15_t)0x7dbc, (q15_t)0xef1f, (q15_t)0x7db9,\n    (q15_t)0xef13, (q15_t)0x7db5, (q15_t)0xef06, (q15_t)0x7db2, (q15_t)0xeefa,\n    (q15_t)0x7daf, (q15_t)0xeeee, (q15_t)0x7dab, (q15_t)0xeee2, (q15_t)0x7da8,\n    (q15_t)0xeed6, (q15_t)0x7da4, (q15_t)0xeeca, (q15_t)0x7da1, (q15_t)0xeebe,\n    (q15_t)0x7d9e, (q15_t)0xeeb2, (q15_t)0x7d9a, (q15_t)0xeea6, (q15_t)0x7d97,\n    (q15_t)0xee99, (q15_t)0x7d93, (q15_t)0xee8d, (q15_t)0x7d90, (q15_t)0xee81,\n    (q15_t)0x7d8d, (q15_t)0xee75, (q15_t)0x7d89, (q15_t)0xee69, (q15_t)0x7d86,\n    (q15_t)0xee5d, (q15_t)0x7d82, (q15_t)0xee51, (q15_t)0x7d7f, (q15_t)0xee45,\n    (q15_t)0x7d7b, (q15_t)0xee39, (q15_t)0x7d78, (q15_t)0xee2d, (q15_t)0x7d74,\n    (q15_t)0xee21, (q15_t)0x7d71, (q15_t)0xee15, (q15_t)0x7d6d, (q15_t)0xee09,\n    (q15_t)0x7d6a, (q15_t)0xedfc, (q15_t)0x7d66, (q15_t)0xedf0, (q15_t)0x7d63,\n    (q15_t)0xede4, (q15_t)0x7d5f, (q15_t)0xedd8, (q15_t)0x7d5b, (q15_t)0xedcc,\n    (q15_t)0x7d58, (q15_t)0xedc0, (q15_t)0x7d54, (q15_t)0xedb4, (q15_t)0x7d51,\n    (q15_t)0xeda8, (q15_t)0x7d4d, (q15_t)0xed9c, (q15_t)0x7d49, (q15_t)0xed90,\n    (q15_t)0x7d46, (q15_t)0xed84, (q15_t)0x7d42, (q15_t)0xed78, (q15_t)0x7d3f,\n    (q15_t)0xed6c, (q15_t)0x7d3b, (q15_t)0xed60, (q15_t)0x7d37, (q15_t)0xed54,\n    (q15_t)0x7d34, (q15_t)0xed48, (q15_t)0x7d30, (q15_t)0xed3c, (q15_t)0x7d2c,\n    (q15_t)0xed30, (q15_t)0x7d28, (q15_t)0xed24, (q15_t)0x7d25, (q15_t)0xed18,\n    (q15_t)0x7d21, (q15_t)0xed0c, (q15_t)0x7d1d, (q15_t)0xed00, (q15_t)0x7d1a,\n    (q15_t)0xecf4, (q15_t)0x7d16, (q15_t)0xece8, (q15_t)0x7d12, (q15_t)0xecdc,\n    (q15_t)0x7d0e, (q15_t)0xecd0, (q15_t)0x7d0b, (q15_t)0xecc4, (q15_t)0x7d07,\n    (q15_t)0xecb8, (q15_t)0x7d03, (q15_t)0xecac, (q15_t)0x7cff, (q15_t)0xeca0,\n    (q15_t)0x7cfb, (q15_t)0xec94, (q15_t)0x7cf8, (q15_t)0xec88, (q15_t)0x7cf4,\n    (q15_t)0xec7c, (q15_t)0x7cf0, (q15_t)0xec70, (q15_t)0x7cec, (q15_t)0xec64,\n    (q15_t)0x7ce8, (q15_t)0xec58, (q15_t)0x7ce4, (q15_t)0xec4c, (q15_t)0x7ce0,\n    (q15_t)0xec40, (q15_t)0x7cdd, (q15_t)0xec34, (q15_t)0x7cd9, (q15_t)0xec28,\n    (q15_t)0x7cd5, (q15_t)0xec1c, (q15_t)0x7cd1, (q15_t)0xec10, (q15_t)0x7ccd,\n    (q15_t)0xec05, (q15_t)0x7cc9, (q15_t)0xebf9, (q15_t)0x7cc5, (q15_t)0xebed,\n    (q15_t)0x7cc1, (q15_t)0xebe1, (q15_t)0x7cbd, (q15_t)0xebd5, (q15_t)0x7cb9,\n    (q15_t)0xebc9, (q15_t)0x7cb5, (q15_t)0xebbd, (q15_t)0x7cb1, (q15_t)0xebb1,\n    (q15_t)0x7cad, (q15_t)0xeba5, (q15_t)0x7ca9, (q15_t)0xeb99, (q15_t)0x7ca5,\n    (q15_t)0xeb8d, (q15_t)0x7ca1, (q15_t)0xeb81, (q15_t)0x7c9d, (q15_t)0xeb75,\n    (q15_t)0x7c99, (q15_t)0xeb6a, (q15_t)0x7c95, (q15_t)0xeb5e, (q15_t)0x7c91,\n    (q15_t)0xeb52, (q15_t)0x7c8d, (q15_t)0xeb46, (q15_t)0x7c89, (q15_t)0xeb3a,\n    (q15_t)0x7c85, (q15_t)0xeb2e, (q15_t)0x7c81, (q15_t)0xeb22, (q15_t)0x7c7d,\n    (q15_t)0xeb16, (q15_t)0x7c79, (q15_t)0xeb0a, (q15_t)0x7c74, (q15_t)0xeaff,\n    (q15_t)0x7c70, (q15_t)0xeaf3, (q15_t)0x7c6c, (q15_t)0xeae7, (q15_t)0x7c68,\n    (q15_t)0xeadb, (q15_t)0x7c64, (q15_t)0xeacf, (q15_t)0x7c60, (q15_t)0xeac3,\n    (q15_t)0x7c5b, (q15_t)0xeab7, (q15_t)0x7c57, (q15_t)0xeaac, (q15_t)0x7c53,\n    (q15_t)0xeaa0, (q15_t)0x7c4f, (q15_t)0xea94, (q15_t)0x7c4b, (q15_t)0xea88,\n    (q15_t)0x7c46, (q15_t)0xea7c, (q15_t)0x7c42, (q15_t)0xea70, (q15_t)0x7c3e,\n    (q15_t)0xea65, (q15_t)0x7c3a, (q15_t)0xea59, (q15_t)0x7c36, (q15_t)0xea4d,\n    (q15_t)0x7c31, (q15_t)0xea41, (q15_t)0x7c2d, (q15_t)0xea35, (q15_t)0x7c29,\n    (q15_t)0xea29, (q15_t)0x7c24, (q15_t)0xea1e, (q15_t)0x7c20, (q15_t)0xea12,\n    (q15_t)0x7c1c, (q15_t)0xea06, (q15_t)0x7c17, (q15_t)0xe9fa, (q15_t)0x7c13,\n    (q15_t)0xe9ee, (q15_t)0x7c0f, (q15_t)0xe9e3, (q15_t)0x7c0a, (q15_t)0xe9d7,\n    (q15_t)0x7c06, (q15_t)0xe9cb, (q15_t)0x7c02, (q15_t)0xe9bf, (q15_t)0x7bfd,\n    (q15_t)0xe9b4, (q15_t)0x7bf9, (q15_t)0xe9a8, (q15_t)0x7bf5, (q15_t)0xe99c,\n    (q15_t)0x7bf0, (q15_t)0xe990, (q15_t)0x7bec, (q15_t)0xe984, (q15_t)0x7be7,\n    (q15_t)0xe979, (q15_t)0x7be3, (q15_t)0xe96d, (q15_t)0x7bde, (q15_t)0xe961,\n    (q15_t)0x7bda, (q15_t)0xe955, (q15_t)0x7bd6, (q15_t)0xe94a, (q15_t)0x7bd1,\n    (q15_t)0xe93e, (q15_t)0x7bcd, (q15_t)0xe932, (q15_t)0x7bc8, (q15_t)0xe926,\n    (q15_t)0x7bc4, (q15_t)0xe91b, (q15_t)0x7bbf, (q15_t)0xe90f, (q15_t)0x7bbb,\n    (q15_t)0xe903, (q15_t)0x7bb6, (q15_t)0xe8f7, (q15_t)0x7bb2, (q15_t)0xe8ec,\n    (q15_t)0x7bad, (q15_t)0xe8e0, (q15_t)0x7ba9, (q15_t)0xe8d4, (q15_t)0x7ba4,\n    (q15_t)0xe8c9, (q15_t)0x7b9f, (q15_t)0xe8bd, (q15_t)0x7b9b, (q15_t)0xe8b1,\n    (q15_t)0x7b96, (q15_t)0xe8a5, (q15_t)0x7b92, (q15_t)0xe89a, (q15_t)0x7b8d,\n    (q15_t)0xe88e, (q15_t)0x7b88, (q15_t)0xe882, (q15_t)0x7b84, (q15_t)0xe877,\n    (q15_t)0x7b7f, (q15_t)0xe86b, (q15_t)0x7b7b, (q15_t)0xe85f, (q15_t)0x7b76,\n    (q15_t)0xe854, (q15_t)0x7b71, (q15_t)0xe848, (q15_t)0x7b6d, (q15_t)0xe83c,\n    (q15_t)0x7b68, (q15_t)0xe831, (q15_t)0x7b63, (q15_t)0xe825, (q15_t)0x7b5f,\n    (q15_t)0xe819, (q15_t)0x7b5a, (q15_t)0xe80e, (q15_t)0x7b55, (q15_t)0xe802,\n    (q15_t)0x7b50, (q15_t)0xe7f6, (q15_t)0x7b4c, (q15_t)0xe7eb, (q15_t)0x7b47,\n    (q15_t)0xe7df, (q15_t)0x7b42, (q15_t)0xe7d3, (q15_t)0x7b3e, (q15_t)0xe7c8,\n    (q15_t)0x7b39, (q15_t)0xe7bc, (q15_t)0x7b34, (q15_t)0xe7b1, (q15_t)0x7b2f,\n    (q15_t)0xe7a5, (q15_t)0x7b2a, (q15_t)0xe799, (q15_t)0x7b26, (q15_t)0xe78e,\n    (q15_t)0x7b21, (q15_t)0xe782, (q15_t)0x7b1c, (q15_t)0xe777, (q15_t)0x7b17,\n    (q15_t)0xe76b, (q15_t)0x7b12, (q15_t)0xe75f, (q15_t)0x7b0e, (q15_t)0xe754,\n    (q15_t)0x7b09, (q15_t)0xe748, (q15_t)0x7b04, (q15_t)0xe73d, (q15_t)0x7aff,\n    (q15_t)0xe731, (q15_t)0x7afa, (q15_t)0xe725, (q15_t)0x7af5, (q15_t)0xe71a,\n    (q15_t)0x7af0, (q15_t)0xe70e, (q15_t)0x7aeb, (q15_t)0xe703, (q15_t)0x7ae6,\n    (q15_t)0xe6f7, (q15_t)0x7ae2, (q15_t)0xe6ec, (q15_t)0x7add, (q15_t)0xe6e0,\n    (q15_t)0x7ad8, (q15_t)0xe6d4, (q15_t)0x7ad3, (q15_t)0xe6c9, (q15_t)0x7ace,\n    (q15_t)0xe6bd, (q15_t)0x7ac9, (q15_t)0xe6b2, (q15_t)0x7ac4, (q15_t)0xe6a6,\n    (q15_t)0x7abf, (q15_t)0xe69b, (q15_t)0x7aba, (q15_t)0xe68f, (q15_t)0x7ab5,\n    (q15_t)0xe684, (q15_t)0x7ab0, (q15_t)0xe678, (q15_t)0x7aab, (q15_t)0xe66d,\n    (q15_t)0x7aa6, (q15_t)0xe661, (q15_t)0x7aa1, (q15_t)0xe656, (q15_t)0x7a9c,\n    (q15_t)0xe64a, (q15_t)0x7a97, (q15_t)0xe63f, (q15_t)0x7a92, (q15_t)0xe633,\n    (q15_t)0x7a8d, (q15_t)0xe628, (q15_t)0x7a88, (q15_t)0xe61c, (q15_t)0x7a82,\n    (q15_t)0xe611, (q15_t)0x7a7d, (q15_t)0xe605, (q15_t)0x7a78, (q15_t)0xe5fa,\n    (q15_t)0x7a73, (q15_t)0xe5ee, (q15_t)0x7a6e, (q15_t)0xe5e3, (q15_t)0x7a69,\n    (q15_t)0xe5d7, (q15_t)0x7a64, (q15_t)0xe5cc, (q15_t)0x7a5f, (q15_t)0xe5c0,\n    (q15_t)0x7a59, (q15_t)0xe5b5, (q15_t)0x7a54, (q15_t)0xe5a9, (q15_t)0x7a4f,\n    (q15_t)0xe59e, (q15_t)0x7a4a, (q15_t)0xe592, (q15_t)0x7a45, (q15_t)0xe587,\n    (q15_t)0x7a3f, (q15_t)0xe57c, (q15_t)0x7a3a, (q15_t)0xe570, (q15_t)0x7a35,\n    (q15_t)0xe565, (q15_t)0x7a30, (q15_t)0xe559, (q15_t)0x7a2b, (q15_t)0xe54e,\n    (q15_t)0x7a25, (q15_t)0xe542, (q15_t)0x7a20, (q15_t)0xe537, (q15_t)0x7a1b,\n    (q15_t)0xe52c, (q15_t)0x7a16, (q15_t)0xe520, (q15_t)0x7a10, (q15_t)0xe515,\n    (q15_t)0x7a0b, (q15_t)0xe509, (q15_t)0x7a06, (q15_t)0xe4fe, (q15_t)0x7a00,\n    (q15_t)0xe4f3, (q15_t)0x79fb, (q15_t)0xe4e7, (q15_t)0x79f6, (q15_t)0xe4dc,\n    (q15_t)0x79f0, (q15_t)0xe4d0, (q15_t)0x79eb, (q15_t)0xe4c5, (q15_t)0x79e6,\n    (q15_t)0xe4ba, (q15_t)0x79e0, (q15_t)0xe4ae, (q15_t)0x79db, (q15_t)0xe4a3,\n    (q15_t)0x79d6, (q15_t)0xe498, (q15_t)0x79d0, (q15_t)0xe48c, (q15_t)0x79cb,\n    (q15_t)0xe481, (q15_t)0x79c5, (q15_t)0xe476, (q15_t)0x79c0, (q15_t)0xe46a,\n    (q15_t)0x79bb, (q15_t)0xe45f, (q15_t)0x79b5, (q15_t)0xe454, (q15_t)0x79b0,\n    (q15_t)0xe448, (q15_t)0x79aa, (q15_t)0xe43d, (q15_t)0x79a5, (q15_t)0xe432,\n    (q15_t)0x799f, (q15_t)0xe426, (q15_t)0x799a, (q15_t)0xe41b, (q15_t)0x7994,\n    (q15_t)0xe410, (q15_t)0x798f, (q15_t)0xe404, (q15_t)0x7989, (q15_t)0xe3f9,\n    (q15_t)0x7984, (q15_t)0xe3ee, (q15_t)0x797e, (q15_t)0xe3e2, (q15_t)0x7979,\n    (q15_t)0xe3d7, (q15_t)0x7973, (q15_t)0xe3cc, (q15_t)0x796e, (q15_t)0xe3c1,\n    (q15_t)0x7968, (q15_t)0xe3b5, (q15_t)0x7963, (q15_t)0xe3aa, (q15_t)0x795d,\n    (q15_t)0xe39f, (q15_t)0x7958, (q15_t)0xe394, (q15_t)0x7952, (q15_t)0xe388,\n    (q15_t)0x794c, (q15_t)0xe37d, (q15_t)0x7947, (q15_t)0xe372, (q15_t)0x7941,\n    (q15_t)0xe367, (q15_t)0x793b, (q15_t)0xe35b, (q15_t)0x7936, (q15_t)0xe350,\n    (q15_t)0x7930, (q15_t)0xe345, (q15_t)0x792b, (q15_t)0xe33a, (q15_t)0x7925,\n    (q15_t)0xe32e, (q15_t)0x791f, (q15_t)0xe323, (q15_t)0x791a, (q15_t)0xe318,\n    (q15_t)0x7914, (q15_t)0xe30d, (q15_t)0x790e, (q15_t)0xe301, (q15_t)0x7909,\n    (q15_t)0xe2f6, (q15_t)0x7903, (q15_t)0xe2eb, (q15_t)0x78fd, (q15_t)0xe2e0,\n    (q15_t)0x78f7, (q15_t)0xe2d5, (q15_t)0x78f2, (q15_t)0xe2ca, (q15_t)0x78ec,\n    (q15_t)0xe2be, (q15_t)0x78e6, (q15_t)0xe2b3, (q15_t)0x78e0, (q15_t)0xe2a8,\n    (q15_t)0x78db, (q15_t)0xe29d, (q15_t)0x78d5, (q15_t)0xe292, (q15_t)0x78cf,\n    (q15_t)0xe287, (q15_t)0x78c9, (q15_t)0xe27b, (q15_t)0x78c3, (q15_t)0xe270,\n    (q15_t)0x78be, (q15_t)0xe265, (q15_t)0x78b8, (q15_t)0xe25a, (q15_t)0x78b2,\n    (q15_t)0xe24f, (q15_t)0x78ac, (q15_t)0xe244, (q15_t)0x78a6, (q15_t)0xe239,\n    (q15_t)0x78a1, (q15_t)0xe22d, (q15_t)0x789b, (q15_t)0xe222, (q15_t)0x7895,\n    (q15_t)0xe217, (q15_t)0x788f, (q15_t)0xe20c, (q15_t)0x7889, (q15_t)0xe201,\n    (q15_t)0x7883, (q15_t)0xe1f6, (q15_t)0x787d, (q15_t)0xe1eb, (q15_t)0x7877,\n    (q15_t)0xe1e0, (q15_t)0x7871, (q15_t)0xe1d5, (q15_t)0x786b, (q15_t)0xe1ca,\n    (q15_t)0x7866, (q15_t)0xe1be, (q15_t)0x7860, (q15_t)0xe1b3, (q15_t)0x785a,\n    (q15_t)0xe1a8, (q15_t)0x7854, (q15_t)0xe19d, (q15_t)0x784e, (q15_t)0xe192,\n    (q15_t)0x7848, (q15_t)0xe187, (q15_t)0x7842, (q15_t)0xe17c, (q15_t)0x783c,\n    (q15_t)0xe171, (q15_t)0x7836, (q15_t)0xe166, (q15_t)0x7830, (q15_t)0xe15b,\n    (q15_t)0x782a, (q15_t)0xe150, (q15_t)0x7824, (q15_t)0xe145, (q15_t)0x781e,\n    (q15_t)0xe13a, (q15_t)0x7818, (q15_t)0xe12f, (q15_t)0x7812, (q15_t)0xe124,\n    (q15_t)0x780b, (q15_t)0xe119, (q15_t)0x7805, (q15_t)0xe10e, (q15_t)0x77ff,\n    (q15_t)0xe103, (q15_t)0x77f9, (q15_t)0xe0f8, (q15_t)0x77f3, (q15_t)0xe0ed,\n    (q15_t)0x77ed, (q15_t)0xe0e2, (q15_t)0x77e7, (q15_t)0xe0d7, (q15_t)0x77e1,\n    (q15_t)0xe0cc, (q15_t)0x77db, (q15_t)0xe0c1, (q15_t)0x77d5, (q15_t)0xe0b6,\n    (q15_t)0x77ce, (q15_t)0xe0ab, (q15_t)0x77c8, (q15_t)0xe0a0, (q15_t)0x77c2,\n    (q15_t)0xe095, (q15_t)0x77bc, (q15_t)0xe08a, (q15_t)0x77b6, (q15_t)0xe07f,\n    (q15_t)0x77b0, (q15_t)0xe074, (q15_t)0x77a9, (q15_t)0xe069, (q15_t)0x77a3,\n    (q15_t)0xe05e, (q15_t)0x779d, (q15_t)0xe054, (q15_t)0x7797, (q15_t)0xe049,\n    (q15_t)0x7790, (q15_t)0xe03e, (q15_t)0x778a, (q15_t)0xe033, (q15_t)0x7784,\n    (q15_t)0xe028, (q15_t)0x777e, (q15_t)0xe01d, (q15_t)0x7777, (q15_t)0xe012,\n    (q15_t)0x7771, (q15_t)0xe007, (q15_t)0x776b, (q15_t)0xdffc, (q15_t)0x7765,\n    (q15_t)0xdff1, (q15_t)0x775e, (q15_t)0xdfe7, (q15_t)0x7758, (q15_t)0xdfdc,\n    (q15_t)0x7752, (q15_t)0xdfd1, (q15_t)0x774b, (q15_t)0xdfc6, (q15_t)0x7745,\n    (q15_t)0xdfbb, (q15_t)0x773f, (q15_t)0xdfb0, (q15_t)0x7738, (q15_t)0xdfa5,\n    (q15_t)0x7732, (q15_t)0xdf9b, (q15_t)0x772c, (q15_t)0xdf90, (q15_t)0x7725,\n    (q15_t)0xdf85, (q15_t)0x771f, (q15_t)0xdf7a, (q15_t)0x7718, (q15_t)0xdf6f,\n    (q15_t)0x7712, (q15_t)0xdf65, (q15_t)0x770c, (q15_t)0xdf5a, (q15_t)0x7705,\n    (q15_t)0xdf4f, (q15_t)0x76ff, (q15_t)0xdf44, (q15_t)0x76f8, (q15_t)0xdf39,\n    (q15_t)0x76f2, (q15_t)0xdf2f, (q15_t)0x76eb, (q15_t)0xdf24, (q15_t)0x76e5,\n    (q15_t)0xdf19, (q15_t)0x76df, (q15_t)0xdf0e, (q15_t)0x76d8, (q15_t)0xdf03,\n    (q15_t)0x76d2, (q15_t)0xdef9, (q15_t)0x76cb, (q15_t)0xdeee, (q15_t)0x76c5,\n    (q15_t)0xdee3, (q15_t)0x76be, (q15_t)0xded8, (q15_t)0x76b8, (q15_t)0xdece,\n    (q15_t)0x76b1, (q15_t)0xdec3, (q15_t)0x76ab, (q15_t)0xdeb8, (q15_t)0x76a4,\n    (q15_t)0xdead, (q15_t)0x769d, (q15_t)0xdea3, (q15_t)0x7697, (q15_t)0xde98,\n    (q15_t)0x7690, (q15_t)0xde8d, (q15_t)0x768a, (q15_t)0xde83, (q15_t)0x7683,\n    (q15_t)0xde78, (q15_t)0x767d, (q15_t)0xde6d, (q15_t)0x7676, (q15_t)0xde62,\n    (q15_t)0x766f, (q15_t)0xde58, (q15_t)0x7669, (q15_t)0xde4d, (q15_t)0x7662,\n    (q15_t)0xde42, (q15_t)0x765c, (q15_t)0xde38, (q15_t)0x7655, (q15_t)0xde2d,\n    (q15_t)0x764e, (q15_t)0xde22, (q15_t)0x7648, (q15_t)0xde18, (q15_t)0x7641,\n    (q15_t)0xde0d, (q15_t)0x763a, (q15_t)0xde02, (q15_t)0x7634, (q15_t)0xddf8,\n    (q15_t)0x762d, (q15_t)0xdded, (q15_t)0x7626, (q15_t)0xdde2, (q15_t)0x7620,\n    (q15_t)0xddd8, (q15_t)0x7619, (q15_t)0xddcd, (q15_t)0x7612, (q15_t)0xddc3,\n    (q15_t)0x760b, (q15_t)0xddb8, (q15_t)0x7605, (q15_t)0xddad, (q15_t)0x75fe,\n    (q15_t)0xdda3, (q15_t)0x75f7, (q15_t)0xdd98, (q15_t)0x75f0, (q15_t)0xdd8e,\n    (q15_t)0x75ea, (q15_t)0xdd83, (q15_t)0x75e3, (q15_t)0xdd78, (q15_t)0x75dc,\n    (q15_t)0xdd6e, (q15_t)0x75d5, (q15_t)0xdd63, (q15_t)0x75ce, (q15_t)0xdd59,\n    (q15_t)0x75c8, (q15_t)0xdd4e, (q15_t)0x75c1, (q15_t)0xdd44, (q15_t)0x75ba,\n    (q15_t)0xdd39, (q15_t)0x75b3, (q15_t)0xdd2e, (q15_t)0x75ac, (q15_t)0xdd24,\n    (q15_t)0x75a5, (q15_t)0xdd19, (q15_t)0x759f, (q15_t)0xdd0f, (q15_t)0x7598,\n    (q15_t)0xdd04, (q15_t)0x7591, (q15_t)0xdcfa, (q15_t)0x758a, (q15_t)0xdcef,\n    (q15_t)0x7583, (q15_t)0xdce5, (q15_t)0x757c, (q15_t)0xdcda, (q15_t)0x7575,\n    (q15_t)0xdcd0, (q15_t)0x756e, (q15_t)0xdcc5, (q15_t)0x7567, (q15_t)0xdcbb,\n    (q15_t)0x7561, (q15_t)0xdcb0, (q15_t)0x755a, (q15_t)0xdca6, (q15_t)0x7553,\n    (q15_t)0xdc9b, (q15_t)0x754c, (q15_t)0xdc91, (q15_t)0x7545, (q15_t)0xdc86,\n    (q15_t)0x753e, (q15_t)0xdc7c, (q15_t)0x7537, (q15_t)0xdc72, (q15_t)0x7530,\n    (q15_t)0xdc67, (q15_t)0x7529, (q15_t)0xdc5d, (q15_t)0x7522, (q15_t)0xdc52,\n    (q15_t)0x751b, (q15_t)0xdc48, (q15_t)0x7514, (q15_t)0xdc3d, (q15_t)0x750d,\n    (q15_t)0xdc33, (q15_t)0x7506, (q15_t)0xdc29, (q15_t)0x74ff, (q15_t)0xdc1e,\n    (q15_t)0x74f8, (q15_t)0xdc14, (q15_t)0x74f1, (q15_t)0xdc09, (q15_t)0x74ea,\n    (q15_t)0xdbff, (q15_t)0x74e2, (q15_t)0xdbf5, (q15_t)0x74db, (q15_t)0xdbea,\n    (q15_t)0x74d4, (q15_t)0xdbe0, (q15_t)0x74cd, (q15_t)0xdbd5, (q15_t)0x74c6,\n    (q15_t)0xdbcb, (q15_t)0x74bf, (q15_t)0xdbc1, (q15_t)0x74b8, (q15_t)0xdbb6,\n    (q15_t)0x74b1, (q15_t)0xdbac, (q15_t)0x74aa, (q15_t)0xdba2, (q15_t)0x74a2,\n    (q15_t)0xdb97, (q15_t)0x749b, (q15_t)0xdb8d, (q15_t)0x7494, (q15_t)0xdb83,\n    (q15_t)0x748d, (q15_t)0xdb78, (q15_t)0x7486, (q15_t)0xdb6e, (q15_t)0x747f,\n    (q15_t)0xdb64, (q15_t)0x7477, (q15_t)0xdb59, (q15_t)0x7470, (q15_t)0xdb4f,\n    (q15_t)0x7469, (q15_t)0xdb45, (q15_t)0x7462, (q15_t)0xdb3b, (q15_t)0x745b,\n    (q15_t)0xdb30, (q15_t)0x7453, (q15_t)0xdb26, (q15_t)0x744c, (q15_t)0xdb1c,\n    (q15_t)0x7445, (q15_t)0xdb11, (q15_t)0x743e, (q15_t)0xdb07, (q15_t)0x7436,\n    (q15_t)0xdafd, (q15_t)0x742f, (q15_t)0xdaf3, (q15_t)0x7428, (q15_t)0xdae8,\n    (q15_t)0x7420, (q15_t)0xdade, (q15_t)0x7419, (q15_t)0xdad4, (q15_t)0x7412,\n    (q15_t)0xdaca, (q15_t)0x740b, (q15_t)0xdabf, (q15_t)0x7403, (q15_t)0xdab5,\n    (q15_t)0x73fc, (q15_t)0xdaab, (q15_t)0x73f5, (q15_t)0xdaa1, (q15_t)0x73ed,\n    (q15_t)0xda97, (q15_t)0x73e6, (q15_t)0xda8c, (q15_t)0x73df, (q15_t)0xda82,\n    (q15_t)0x73d7, (q15_t)0xda78, (q15_t)0x73d0, (q15_t)0xda6e, (q15_t)0x73c8,\n    (q15_t)0xda64, (q15_t)0x73c1, (q15_t)0xda5a, (q15_t)0x73ba, (q15_t)0xda4f,\n    (q15_t)0x73b2, (q15_t)0xda45, (q15_t)0x73ab, (q15_t)0xda3b, (q15_t)0x73a3,\n    (q15_t)0xda31, (q15_t)0x739c, (q15_t)0xda27, (q15_t)0x7395, (q15_t)0xda1d,\n    (q15_t)0x738d, (q15_t)0xda13, (q15_t)0x7386, (q15_t)0xda08, (q15_t)0x737e,\n    (q15_t)0xd9fe, (q15_t)0x7377, (q15_t)0xd9f4, (q15_t)0x736f, (q15_t)0xd9ea,\n    (q15_t)0x7368, (q15_t)0xd9e0, (q15_t)0x7360, (q15_t)0xd9d6, (q15_t)0x7359,\n    (q15_t)0xd9cc, (q15_t)0x7351, (q15_t)0xd9c2, (q15_t)0x734a, (q15_t)0xd9b8,\n    (q15_t)0x7342, (q15_t)0xd9ae, (q15_t)0x733b, (q15_t)0xd9a4, (q15_t)0x7333,\n    (q15_t)0xd99a, (q15_t)0x732c, (q15_t)0xd98f, (q15_t)0x7324, (q15_t)0xd985,\n    (q15_t)0x731d, (q15_t)0xd97b, (q15_t)0x7315, (q15_t)0xd971, (q15_t)0x730d,\n    (q15_t)0xd967, (q15_t)0x7306, (q15_t)0xd95d, (q15_t)0x72fe, (q15_t)0xd953,\n    (q15_t)0x72f7, (q15_t)0xd949, (q15_t)0x72ef, (q15_t)0xd93f, (q15_t)0x72e7,\n    (q15_t)0xd935, (q15_t)0x72e0, (q15_t)0xd92b, (q15_t)0x72d8, (q15_t)0xd921,\n    (q15_t)0x72d0, (q15_t)0xd917, (q15_t)0x72c9, (q15_t)0xd90d, (q15_t)0x72c1,\n    (q15_t)0xd903, (q15_t)0x72ba, (q15_t)0xd8f9, (q15_t)0x72b2, (q15_t)0xd8ef,\n    (q15_t)0x72aa, (q15_t)0xd8e6, (q15_t)0x72a3, (q15_t)0xd8dc, (q15_t)0x729b,\n    (q15_t)0xd8d2, (q15_t)0x7293, (q15_t)0xd8c8, (q15_t)0x728b, (q15_t)0xd8be,\n    (q15_t)0x7284, (q15_t)0xd8b4, (q15_t)0x727c, (q15_t)0xd8aa, (q15_t)0x7274,\n    (q15_t)0xd8a0, (q15_t)0x726d, (q15_t)0xd896, (q15_t)0x7265, (q15_t)0xd88c,\n    (q15_t)0x725d, (q15_t)0xd882, (q15_t)0x7255, (q15_t)0xd878, (q15_t)0x724e,\n    (q15_t)0xd86f, (q15_t)0x7246, (q15_t)0xd865, (q15_t)0x723e, (q15_t)0xd85b,\n    (q15_t)0x7236, (q15_t)0xd851, (q15_t)0x722e, (q15_t)0xd847, (q15_t)0x7227,\n    (q15_t)0xd83d, (q15_t)0x721f, (q15_t)0xd833, (q15_t)0x7217, (q15_t)0xd82a,\n    (q15_t)0x720f, (q15_t)0xd820, (q15_t)0x7207, (q15_t)0xd816, (q15_t)0x71ff,\n    (q15_t)0xd80c, (q15_t)0x71f8, (q15_t)0xd802, (q15_t)0x71f0, (q15_t)0xd7f8,\n    (q15_t)0x71e8, (q15_t)0xd7ef, (q15_t)0x71e0, (q15_t)0xd7e5, (q15_t)0x71d8,\n    (q15_t)0xd7db, (q15_t)0x71d0, (q15_t)0xd7d1, (q15_t)0x71c8, (q15_t)0xd7c8,\n    (q15_t)0x71c0, (q15_t)0xd7be, (q15_t)0x71b9, (q15_t)0xd7b4, (q15_t)0x71b1,\n    (q15_t)0xd7aa, (q15_t)0x71a9, (q15_t)0xd7a0, (q15_t)0x71a1, (q15_t)0xd797,\n    (q15_t)0x7199, (q15_t)0xd78d, (q15_t)0x7191, (q15_t)0xd783, (q15_t)0x7189,\n    (q15_t)0xd77a, (q15_t)0x7181, (q15_t)0xd770, (q15_t)0x7179, (q15_t)0xd766,\n    (q15_t)0x7171, (q15_t)0xd75c, (q15_t)0x7169, (q15_t)0xd753, (q15_t)0x7161,\n    (q15_t)0xd749, (q15_t)0x7159, (q15_t)0xd73f, (q15_t)0x7151, (q15_t)0xd736,\n    (q15_t)0x7149, (q15_t)0xd72c, (q15_t)0x7141, (q15_t)0xd722, (q15_t)0x7139,\n    (q15_t)0xd719, (q15_t)0x7131, (q15_t)0xd70f, (q15_t)0x7129, (q15_t)0xd705,\n    (q15_t)0x7121, (q15_t)0xd6fc, (q15_t)0x7119, (q15_t)0xd6f2, (q15_t)0x7111,\n    (q15_t)0xd6e8, (q15_t)0x7109, (q15_t)0xd6df, (q15_t)0x7101, (q15_t)0xd6d5,\n    (q15_t)0x70f9, (q15_t)0xd6cb, (q15_t)0x70f0, (q15_t)0xd6c2, (q15_t)0x70e8,\n    (q15_t)0xd6b8, (q15_t)0x70e0, (q15_t)0xd6af, (q15_t)0x70d8, (q15_t)0xd6a5,\n    (q15_t)0x70d0, (q15_t)0xd69b, (q15_t)0x70c8, (q15_t)0xd692, (q15_t)0x70c0,\n    (q15_t)0xd688, (q15_t)0x70b8, (q15_t)0xd67f, (q15_t)0x70af, (q15_t)0xd675,\n    (q15_t)0x70a7, (q15_t)0xd66c, (q15_t)0x709f, (q15_t)0xd662, (q15_t)0x7097,\n    (q15_t)0xd659, (q15_t)0x708f, (q15_t)0xd64f, (q15_t)0x7087, (q15_t)0xd645,\n    (q15_t)0x707e, (q15_t)0xd63c, (q15_t)0x7076, (q15_t)0xd632, (q15_t)0x706e,\n    (q15_t)0xd629, (q15_t)0x7066, (q15_t)0xd61f, (q15_t)0x705d, (q15_t)0xd616,\n    (q15_t)0x7055, (q15_t)0xd60c, (q15_t)0x704d, (q15_t)0xd603, (q15_t)0x7045,\n    (q15_t)0xd5f9, (q15_t)0x703c, (q15_t)0xd5f0, (q15_t)0x7034, (q15_t)0xd5e6,\n    (q15_t)0x702c, (q15_t)0xd5dd, (q15_t)0x7024, (q15_t)0xd5d4, (q15_t)0x701b,\n    (q15_t)0xd5ca, (q15_t)0x7013, (q15_t)0xd5c1, (q15_t)0x700b, (q15_t)0xd5b7,\n    (q15_t)0x7002, (q15_t)0xd5ae, (q15_t)0x6ffa, (q15_t)0xd5a4, (q15_t)0x6ff2,\n    (q15_t)0xd59b, (q15_t)0x6fea, (q15_t)0xd592, (q15_t)0x6fe1, (q15_t)0xd588,\n    (q15_t)0x6fd9, (q15_t)0xd57f, (q15_t)0x6fd0, (q15_t)0xd575, (q15_t)0x6fc8,\n    (q15_t)0xd56c, (q15_t)0x6fc0, (q15_t)0xd563, (q15_t)0x6fb7, (q15_t)0xd559,\n    (q15_t)0x6faf, (q15_t)0xd550, (q15_t)0x6fa7, (q15_t)0xd547, (q15_t)0x6f9e,\n    (q15_t)0xd53d, (q15_t)0x6f96, (q15_t)0xd534, (q15_t)0x6f8d, (q15_t)0xd52a,\n    (q15_t)0x6f85, (q15_t)0xd521, (q15_t)0x6f7d, (q15_t)0xd518, (q15_t)0x6f74,\n    (q15_t)0xd50e, (q15_t)0x6f6c, (q15_t)0xd505, (q15_t)0x6f63, (q15_t)0xd4fc,\n    (q15_t)0x6f5b, (q15_t)0xd4f3, (q15_t)0x6f52, (q15_t)0xd4e9, (q15_t)0x6f4a,\n    (q15_t)0xd4e0, (q15_t)0x6f41, (q15_t)0xd4d7, (q15_t)0x6f39, (q15_t)0xd4cd,\n    (q15_t)0x6f30, (q15_t)0xd4c4, (q15_t)0x6f28, (q15_t)0xd4bb, (q15_t)0x6f20,\n    (q15_t)0xd4b2, (q15_t)0x6f17, (q15_t)0xd4a8, (q15_t)0x6f0e, (q15_t)0xd49f,\n    (q15_t)0x6f06, (q15_t)0xd496, (q15_t)0x6efd, (q15_t)0xd48d, (q15_t)0x6ef5,\n    (q15_t)0xd483, (q15_t)0x6eec, (q15_t)0xd47a, (q15_t)0x6ee4, (q15_t)0xd471,\n    (q15_t)0x6edb, (q15_t)0xd468, (q15_t)0x6ed3, (q15_t)0xd45f, (q15_t)0x6eca,\n    (q15_t)0xd455, (q15_t)0x6ec2, (q15_t)0xd44c, (q15_t)0x6eb9, (q15_t)0xd443,\n    (q15_t)0x6eb0, (q15_t)0xd43a, (q15_t)0x6ea8, (q15_t)0xd431, (q15_t)0x6e9f,\n    (q15_t)0xd428, (q15_t)0x6e97, (q15_t)0xd41e, (q15_t)0x6e8e, (q15_t)0xd415,\n    (q15_t)0x6e85, (q15_t)0xd40c, (q15_t)0x6e7d, (q15_t)0xd403, (q15_t)0x6e74,\n    (q15_t)0xd3fa, (q15_t)0x6e6b, (q15_t)0xd3f1, (q15_t)0x6e63, (q15_t)0xd3e8,\n    (q15_t)0x6e5a, (q15_t)0xd3df, (q15_t)0x6e51, (q15_t)0xd3d5, (q15_t)0x6e49,\n    (q15_t)0xd3cc, (q15_t)0x6e40, (q15_t)0xd3c3, (q15_t)0x6e37, (q15_t)0xd3ba,\n    (q15_t)0x6e2f, (q15_t)0xd3b1, (q15_t)0x6e26, (q15_t)0xd3a8, (q15_t)0x6e1d,\n    (q15_t)0xd39f, (q15_t)0x6e15, (q15_t)0xd396, (q15_t)0x6e0c, (q15_t)0xd38d,\n    (q15_t)0x6e03, (q15_t)0xd384, (q15_t)0x6dfa, (q15_t)0xd37b, (q15_t)0x6df2,\n    (q15_t)0xd372, (q15_t)0x6de9, (q15_t)0xd369, (q15_t)0x6de0, (q15_t)0xd360,\n    (q15_t)0x6dd7, (q15_t)0xd357, (q15_t)0x6dcf, (q15_t)0xd34e, (q15_t)0x6dc6,\n    (q15_t)0xd345, (q15_t)0x6dbd, (q15_t)0xd33c, (q15_t)0x6db4, (q15_t)0xd333,\n    (q15_t)0x6dab, (q15_t)0xd32a, (q15_t)0x6da3, (q15_t)0xd321, (q15_t)0x6d9a,\n    (q15_t)0xd318, (q15_t)0x6d91, (q15_t)0xd30f, (q15_t)0x6d88, (q15_t)0xd306,\n    (q15_t)0x6d7f, (q15_t)0xd2fd, (q15_t)0x6d76, (q15_t)0xd2f4, (q15_t)0x6d6e,\n    (q15_t)0xd2eb, (q15_t)0x6d65, (q15_t)0xd2e2, (q15_t)0x6d5c, (q15_t)0xd2d9,\n    (q15_t)0x6d53, (q15_t)0xd2d1, (q15_t)0x6d4a, (q15_t)0xd2c8, (q15_t)0x6d41,\n    (q15_t)0xd2bf, (q15_t)0x6d38, (q15_t)0xd2b6, (q15_t)0x6d2f, (q15_t)0xd2ad,\n    (q15_t)0x6d27, (q15_t)0xd2a4, (q15_t)0x6d1e, (q15_t)0xd29b, (q15_t)0x6d15,\n    (q15_t)0xd292, (q15_t)0x6d0c, (q15_t)0xd28a, (q15_t)0x6d03, (q15_t)0xd281,\n    (q15_t)0x6cfa, (q15_t)0xd278, (q15_t)0x6cf1, (q15_t)0xd26f, (q15_t)0x6ce8,\n    (q15_t)0xd266, (q15_t)0x6cdf, (q15_t)0xd25d, (q15_t)0x6cd6, (q15_t)0xd255,\n    (q15_t)0x6ccd, (q15_t)0xd24c, (q15_t)0x6cc4, (q15_t)0xd243, (q15_t)0x6cbb,\n    (q15_t)0xd23a, (q15_t)0x6cb2, (q15_t)0xd231, (q15_t)0x6ca9, (q15_t)0xd229,\n    (q15_t)0x6ca0, (q15_t)0xd220, (q15_t)0x6c97, (q15_t)0xd217, (q15_t)0x6c8e,\n    (q15_t)0xd20e, (q15_t)0x6c85, (q15_t)0xd206, (q15_t)0x6c7c, (q15_t)0xd1fd,\n    (q15_t)0x6c73, (q15_t)0xd1f4, (q15_t)0x6c6a, (q15_t)0xd1eb, (q15_t)0x6c61,\n    (q15_t)0xd1e3, (q15_t)0x6c58, (q15_t)0xd1da, (q15_t)0x6c4f, (q15_t)0xd1d1,\n    (q15_t)0x6c46, (q15_t)0xd1c9, (q15_t)0x6c3d, (q15_t)0xd1c0, (q15_t)0x6c34,\n    (q15_t)0xd1b7, (q15_t)0x6c2b, (q15_t)0xd1af, (q15_t)0x6c21, (q15_t)0xd1a6,\n    (q15_t)0x6c18, (q15_t)0xd19d, (q15_t)0x6c0f, (q15_t)0xd195, (q15_t)0x6c06,\n    (q15_t)0xd18c, (q15_t)0x6bfd, (q15_t)0xd183, (q15_t)0x6bf4, (q15_t)0xd17b,\n    (q15_t)0x6beb, (q15_t)0xd172, (q15_t)0x6be2, (q15_t)0xd169, (q15_t)0x6bd8,\n    (q15_t)0xd161, (q15_t)0x6bcf, (q15_t)0xd158, (q15_t)0x6bc6, (q15_t)0xd150,\n    (q15_t)0x6bbd, (q15_t)0xd147, (q15_t)0x6bb4, (q15_t)0xd13e, (q15_t)0x6bab,\n    (q15_t)0xd136, (q15_t)0x6ba1, (q15_t)0xd12d, (q15_t)0x6b98, (q15_t)0xd125,\n    (q15_t)0x6b8f, (q15_t)0xd11c, (q15_t)0x6b86, (q15_t)0xd114, (q15_t)0x6b7d,\n    (q15_t)0xd10b, (q15_t)0x6b73, (q15_t)0xd103, (q15_t)0x6b6a, (q15_t)0xd0fa,\n    (q15_t)0x6b61, (q15_t)0xd0f2, (q15_t)0x6b58, (q15_t)0xd0e9, (q15_t)0x6b4e,\n    (q15_t)0xd0e0, (q15_t)0x6b45, (q15_t)0xd0d8, (q15_t)0x6b3c, (q15_t)0xd0d0,\n    (q15_t)0x6b33, (q15_t)0xd0c7, (q15_t)0x6b29, (q15_t)0xd0bf, (q15_t)0x6b20,\n    (q15_t)0xd0b6, (q15_t)0x6b17, (q15_t)0xd0ae, (q15_t)0x6b0d, (q15_t)0xd0a5,\n    (q15_t)0x6b04, (q15_t)0xd09d, (q15_t)0x6afb, (q15_t)0xd094, (q15_t)0x6af2,\n    (q15_t)0xd08c, (q15_t)0x6ae8, (q15_t)0xd083, (q15_t)0x6adf, (q15_t)0xd07b,\n    (q15_t)0x6ad6, (q15_t)0xd073, (q15_t)0x6acc, (q15_t)0xd06a, (q15_t)0x6ac3,\n    (q15_t)0xd062, (q15_t)0x6ab9, (q15_t)0xd059, (q15_t)0x6ab0, (q15_t)0xd051,\n    (q15_t)0x6aa7, (q15_t)0xd049, (q15_t)0x6a9d, (q15_t)0xd040, (q15_t)0x6a94,\n    (q15_t)0xd038, (q15_t)0x6a8b, (q15_t)0xd030, (q15_t)0x6a81, (q15_t)0xd027,\n    (q15_t)0x6a78, (q15_t)0xd01f, (q15_t)0x6a6e, (q15_t)0xd016, (q15_t)0x6a65,\n    (q15_t)0xd00e, (q15_t)0x6a5c, (q15_t)0xd006, (q15_t)0x6a52, (q15_t)0xcffe,\n    (q15_t)0x6a49, (q15_t)0xcff5, (q15_t)0x6a3f, (q15_t)0xcfed, (q15_t)0x6a36,\n    (q15_t)0xcfe5, (q15_t)0x6a2c, (q15_t)0xcfdc, (q15_t)0x6a23, (q15_t)0xcfd4,\n    (q15_t)0x6a1a, (q15_t)0xcfcc, (q15_t)0x6a10, (q15_t)0xcfc4, (q15_t)0x6a07,\n    (q15_t)0xcfbb, (q15_t)0x69fd, (q15_t)0xcfb3, (q15_t)0x69f4, (q15_t)0xcfab,\n    (q15_t)0x69ea, (q15_t)0xcfa3, (q15_t)0x69e1, (q15_t)0xcf9a, (q15_t)0x69d7,\n    (q15_t)0xcf92, (q15_t)0x69ce, (q15_t)0xcf8a, (q15_t)0x69c4, (q15_t)0xcf82,\n    (q15_t)0x69bb, (q15_t)0xcf79, (q15_t)0x69b1, (q15_t)0xcf71, (q15_t)0x69a7,\n    (q15_t)0xcf69, (q15_t)0x699e, (q15_t)0xcf61, (q15_t)0x6994, (q15_t)0xcf59,\n    (q15_t)0x698b, (q15_t)0xcf51, (q15_t)0x6981, (q15_t)0xcf48, (q15_t)0x6978,\n    (q15_t)0xcf40, (q15_t)0x696e, (q15_t)0xcf38, (q15_t)0x6965, (q15_t)0xcf30,\n    (q15_t)0x695b, (q15_t)0xcf28, (q15_t)0x6951, (q15_t)0xcf20, (q15_t)0x6948,\n    (q15_t)0xcf18, (q15_t)0x693e, (q15_t)0xcf10, (q15_t)0x6935, (q15_t)0xcf07,\n    (q15_t)0x692b, (q15_t)0xceff, (q15_t)0x6921, (q15_t)0xcef7, (q15_t)0x6918,\n    (q15_t)0xceef, (q15_t)0x690e, (q15_t)0xcee7, (q15_t)0x6904, (q15_t)0xcedf,\n    (q15_t)0x68fb, (q15_t)0xced7, (q15_t)0x68f1, (q15_t)0xcecf, (q15_t)0x68e7,\n    (q15_t)0xcec7, (q15_t)0x68de, (q15_t)0xcebf, (q15_t)0x68d4, (q15_t)0xceb7,\n    (q15_t)0x68ca, (q15_t)0xceaf, (q15_t)0x68c1, (q15_t)0xcea7, (q15_t)0x68b7,\n    (q15_t)0xce9f, (q15_t)0x68ad, (q15_t)0xce97, (q15_t)0x68a4, (q15_t)0xce8f,\n    (q15_t)0x689a, (q15_t)0xce87, (q15_t)0x6890, (q15_t)0xce7f, (q15_t)0x6886,\n    (q15_t)0xce77, (q15_t)0x687d, (q15_t)0xce6f, (q15_t)0x6873, (q15_t)0xce67,\n    (q15_t)0x6869, (q15_t)0xce5f, (q15_t)0x6860, (q15_t)0xce57, (q15_t)0x6856,\n    (q15_t)0xce4f, (q15_t)0x684c, (q15_t)0xce47, (q15_t)0x6842, (q15_t)0xce40,\n    (q15_t)0x6838, (q15_t)0xce38, (q15_t)0x682f, (q15_t)0xce30, (q15_t)0x6825,\n    (q15_t)0xce28, (q15_t)0x681b, (q15_t)0xce20, (q15_t)0x6811, (q15_t)0xce18,\n    (q15_t)0x6808, (q15_t)0xce10, (q15_t)0x67fe, (q15_t)0xce08, (q15_t)0x67f4,\n    (q15_t)0xce01, (q15_t)0x67ea, (q15_t)0xcdf9, (q15_t)0x67e0, (q15_t)0xcdf1,\n    (q15_t)0x67d6, (q15_t)0xcde9, (q15_t)0x67cd, (q15_t)0xcde1, (q15_t)0x67c3,\n    (q15_t)0xcdd9, (q15_t)0x67b9, (q15_t)0xcdd2, (q15_t)0x67af, (q15_t)0xcdca,\n    (q15_t)0x67a5, (q15_t)0xcdc2, (q15_t)0x679b, (q15_t)0xcdba, (q15_t)0x6791,\n    (q15_t)0xcdb2, (q15_t)0x6788, (q15_t)0xcdab, (q15_t)0x677e, (q15_t)0xcda3,\n    (q15_t)0x6774, (q15_t)0xcd9b, (q15_t)0x676a, (q15_t)0xcd93, (q15_t)0x6760,\n    (q15_t)0xcd8c, (q15_t)0x6756, (q15_t)0xcd84, (q15_t)0x674c, (q15_t)0xcd7c,\n    (q15_t)0x6742, (q15_t)0xcd75, (q15_t)0x6738, (q15_t)0xcd6d, (q15_t)0x672e,\n    (q15_t)0xcd65, (q15_t)0x6724, (q15_t)0xcd5d, (q15_t)0x671a, (q15_t)0xcd56,\n    (q15_t)0x6711, (q15_t)0xcd4e, (q15_t)0x6707, (q15_t)0xcd46, (q15_t)0x66fd,\n    (q15_t)0xcd3f, (q15_t)0x66f3, (q15_t)0xcd37, (q15_t)0x66e9, (q15_t)0xcd30,\n    (q15_t)0x66df, (q15_t)0xcd28, (q15_t)0x66d5, (q15_t)0xcd20, (q15_t)0x66cb,\n    (q15_t)0xcd19, (q15_t)0x66c1, (q15_t)0xcd11, (q15_t)0x66b7, (q15_t)0xcd09,\n    (q15_t)0x66ad, (q15_t)0xcd02, (q15_t)0x66a3, (q15_t)0xccfa, (q15_t)0x6699,\n    (q15_t)0xccf3, (q15_t)0x668f, (q15_t)0xcceb, (q15_t)0x6685, (q15_t)0xcce3,\n    (q15_t)0x667b, (q15_t)0xccdc, (q15_t)0x6671, (q15_t)0xccd4, (q15_t)0x6666,\n    (q15_t)0xcccd, (q15_t)0x665c, (q15_t)0xccc5, (q15_t)0x6652, (q15_t)0xccbe,\n    (q15_t)0x6648, (q15_t)0xccb6, (q15_t)0x663e, (q15_t)0xccaf, (q15_t)0x6634,\n    (q15_t)0xcca7, (q15_t)0x662a, (q15_t)0xcca0, (q15_t)0x6620, (q15_t)0xcc98,\n    (q15_t)0x6616, (q15_t)0xcc91, (q15_t)0x660c, (q15_t)0xcc89, (q15_t)0x6602,\n    (q15_t)0xcc82, (q15_t)0x65f8, (q15_t)0xcc7a, (q15_t)0x65ed, (q15_t)0xcc73,\n    (q15_t)0x65e3, (q15_t)0xcc6b, (q15_t)0x65d9, (q15_t)0xcc64, (q15_t)0x65cf,\n    (q15_t)0xcc5d, (q15_t)0x65c5, (q15_t)0xcc55, (q15_t)0x65bb, (q15_t)0xcc4e,\n    (q15_t)0x65b1, (q15_t)0xcc46, (q15_t)0x65a6, (q15_t)0xcc3f, (q15_t)0x659c,\n    (q15_t)0xcc38, (q15_t)0x6592, (q15_t)0xcc30, (q15_t)0x6588, (q15_t)0xcc29,\n    (q15_t)0x657e, (q15_t)0xcc21, (q15_t)0x6574, (q15_t)0xcc1a, (q15_t)0x6569,\n    (q15_t)0xcc13, (q15_t)0x655f, (q15_t)0xcc0b, (q15_t)0x6555, (q15_t)0xcc04,\n    (q15_t)0x654b, (q15_t)0xcbfd, (q15_t)0x6541, (q15_t)0xcbf5, (q15_t)0x6536,\n    (q15_t)0xcbee, (q15_t)0x652c, (q15_t)0xcbe7, (q15_t)0x6522, (q15_t)0xcbe0,\n    (q15_t)0x6518, (q15_t)0xcbd8, (q15_t)0x650d, (q15_t)0xcbd1, (q15_t)0x6503,\n    (q15_t)0xcbca, (q15_t)0x64f9, (q15_t)0xcbc2, (q15_t)0x64ef, (q15_t)0xcbbb,\n    (q15_t)0x64e4, (q15_t)0xcbb4, (q15_t)0x64da, (q15_t)0xcbad, (q15_t)0x64d0,\n    (q15_t)0xcba5, (q15_t)0x64c5, (q15_t)0xcb9e, (q15_t)0x64bb, (q15_t)0xcb97,\n    (q15_t)0x64b1, (q15_t)0xcb90, (q15_t)0x64a7, (q15_t)0xcb89, (q15_t)0x649c,\n    (q15_t)0xcb81, (q15_t)0x6492, (q15_t)0xcb7a, (q15_t)0x6488, (q15_t)0xcb73,\n    (q15_t)0x647d, (q15_t)0xcb6c, (q15_t)0x6473, (q15_t)0xcb65, (q15_t)0x6469,\n    (q15_t)0xcb5e, (q15_t)0x645e, (q15_t)0xcb56, (q15_t)0x6454, (q15_t)0xcb4f,\n    (q15_t)0x644a, (q15_t)0xcb48, (q15_t)0x643f, (q15_t)0xcb41, (q15_t)0x6435,\n    (q15_t)0xcb3a, (q15_t)0x642b, (q15_t)0xcb33, (q15_t)0x6420, (q15_t)0xcb2c,\n    (q15_t)0x6416, (q15_t)0xcb25, (q15_t)0x640b, (q15_t)0xcb1e, (q15_t)0x6401,\n    (q15_t)0xcb16, (q15_t)0x63f7, (q15_t)0xcb0f, (q15_t)0x63ec, (q15_t)0xcb08,\n    (q15_t)0x63e2, (q15_t)0xcb01, (q15_t)0x63d7, (q15_t)0xcafa, (q15_t)0x63cd,\n    (q15_t)0xcaf3, (q15_t)0x63c3, (q15_t)0xcaec, (q15_t)0x63b8, (q15_t)0xcae5,\n    (q15_t)0x63ae, (q15_t)0xcade, (q15_t)0x63a3, (q15_t)0xcad7, (q15_t)0x6399,\n    (q15_t)0xcad0, (q15_t)0x638e, (q15_t)0xcac9, (q15_t)0x6384, (q15_t)0xcac2,\n    (q15_t)0x637a, (q15_t)0xcabb, (q15_t)0x636f, (q15_t)0xcab4, (q15_t)0x6365,\n    (q15_t)0xcaad, (q15_t)0x635a, (q15_t)0xcaa6, (q15_t)0x6350, (q15_t)0xca9f,\n    (q15_t)0x6345, (q15_t)0xca99, (q15_t)0x633b, (q15_t)0xca92, (q15_t)0x6330,\n    (q15_t)0xca8b, (q15_t)0x6326, (q15_t)0xca84, (q15_t)0x631b, (q15_t)0xca7d,\n    (q15_t)0x6311, (q15_t)0xca76, (q15_t)0x6306, (q15_t)0xca6f, (q15_t)0x62fc,\n    (q15_t)0xca68, (q15_t)0x62f1, (q15_t)0xca61, (q15_t)0x62e7, (q15_t)0xca5b,\n    (q15_t)0x62dc, (q15_t)0xca54, (q15_t)0x62d2, (q15_t)0xca4d, (q15_t)0x62c7,\n    (q15_t)0xca46, (q15_t)0x62bc, (q15_t)0xca3f, (q15_t)0x62b2, (q15_t)0xca38,\n    (q15_t)0x62a7, (q15_t)0xca32, (q15_t)0x629d, (q15_t)0xca2b, (q15_t)0x6292,\n    (q15_t)0xca24, (q15_t)0x6288, (q15_t)0xca1d, (q15_t)0x627d, (q15_t)0xca16,\n    (q15_t)0x6272, (q15_t)0xca10, (q15_t)0x6268, (q15_t)0xca09, (q15_t)0x625d,\n    (q15_t)0xca02, (q15_t)0x6253, (q15_t)0xc9fb, (q15_t)0x6248, (q15_t)0xc9f5,\n    (q15_t)0x623d, (q15_t)0xc9ee, (q15_t)0x6233, (q15_t)0xc9e7, (q15_t)0x6228,\n    (q15_t)0xc9e0, (q15_t)0x621e, (q15_t)0xc9da, (q15_t)0x6213, (q15_t)0xc9d3,\n    (q15_t)0x6208, (q15_t)0xc9cc, (q15_t)0x61fe, (q15_t)0xc9c6, (q15_t)0x61f3,\n    (q15_t)0xc9bf, (q15_t)0x61e8, (q15_t)0xc9b8, (q15_t)0x61de, (q15_t)0xc9b2,\n    (q15_t)0x61d3, (q15_t)0xc9ab, (q15_t)0x61c8, (q15_t)0xc9a4, (q15_t)0x61be,\n    (q15_t)0xc99e, (q15_t)0x61b3, (q15_t)0xc997, (q15_t)0x61a8, (q15_t)0xc991,\n    (q15_t)0x619e, (q15_t)0xc98a, (q15_t)0x6193, (q15_t)0xc983, (q15_t)0x6188,\n    (q15_t)0xc97d, (q15_t)0x617d, (q15_t)0xc976, (q15_t)0x6173, (q15_t)0xc970,\n    (q15_t)0x6168, (q15_t)0xc969, (q15_t)0x615d, (q15_t)0xc963, (q15_t)0x6153,\n    (q15_t)0xc95c, (q15_t)0x6148, (q15_t)0xc955, (q15_t)0x613d, (q15_t)0xc94f,\n    (q15_t)0x6132, (q15_t)0xc948, (q15_t)0x6128, (q15_t)0xc942, (q15_t)0x611d,\n    (q15_t)0xc93b, (q15_t)0x6112, (q15_t)0xc935, (q15_t)0x6107, (q15_t)0xc92e,\n    (q15_t)0x60fd, (q15_t)0xc928, (q15_t)0x60f2, (q15_t)0xc921, (q15_t)0x60e7,\n    (q15_t)0xc91b, (q15_t)0x60dc, (q15_t)0xc915, (q15_t)0x60d1, (q15_t)0xc90e,\n    (q15_t)0x60c7, (q15_t)0xc908, (q15_t)0x60bc, (q15_t)0xc901, (q15_t)0x60b1,\n    (q15_t)0xc8fb, (q15_t)0x60a6, (q15_t)0xc8f4, (q15_t)0x609b, (q15_t)0xc8ee,\n    (q15_t)0x6091, (q15_t)0xc8e8, (q15_t)0x6086, (q15_t)0xc8e1, (q15_t)0x607b,\n    (q15_t)0xc8db, (q15_t)0x6070, (q15_t)0xc8d4, (q15_t)0x6065, (q15_t)0xc8ce,\n    (q15_t)0x605b, (q15_t)0xc8c8, (q15_t)0x6050, (q15_t)0xc8c1, (q15_t)0x6045,\n    (q15_t)0xc8bb, (q15_t)0x603a, (q15_t)0xc8b5, (q15_t)0x602f, (q15_t)0xc8ae,\n    (q15_t)0x6024, (q15_t)0xc8a8, (q15_t)0x6019, (q15_t)0xc8a2, (q15_t)0x600f,\n    (q15_t)0xc89b, (q15_t)0x6004, (q15_t)0xc895, (q15_t)0x5ff9, (q15_t)0xc88f,\n    (q15_t)0x5fee, (q15_t)0xc889, (q15_t)0x5fe3, (q15_t)0xc882, (q15_t)0x5fd8,\n    (q15_t)0xc87c, (q15_t)0x5fcd, (q15_t)0xc876, (q15_t)0x5fc2, (q15_t)0xc870,\n    (q15_t)0x5fb7, (q15_t)0xc869, (q15_t)0x5fac, (q15_t)0xc863, (q15_t)0x5fa2,\n    (q15_t)0xc85d, (q15_t)0x5f97, (q15_t)0xc857, (q15_t)0x5f8c, (q15_t)0xc850,\n    (q15_t)0x5f81, (q15_t)0xc84a, (q15_t)0x5f76, (q15_t)0xc844, (q15_t)0x5f6b,\n    (q15_t)0xc83e, (q15_t)0x5f60, (q15_t)0xc838, (q15_t)0x5f55, (q15_t)0xc832,\n    (q15_t)0x5f4a, (q15_t)0xc82b, (q15_t)0x5f3f, (q15_t)0xc825, (q15_t)0x5f34,\n    (q15_t)0xc81f, (q15_t)0x5f29, (q15_t)0xc819, (q15_t)0x5f1e, (q15_t)0xc813,\n    (q15_t)0x5f13, (q15_t)0xc80d, (q15_t)0x5f08, (q15_t)0xc807, (q15_t)0x5efd,\n    (q15_t)0xc801, (q15_t)0x5ef2, (q15_t)0xc7fb, (q15_t)0x5ee7, (q15_t)0xc7f5,\n    (q15_t)0x5edc, (q15_t)0xc7ee, (q15_t)0x5ed1, (q15_t)0xc7e8, (q15_t)0x5ec6,\n    (q15_t)0xc7e2, (q15_t)0x5ebb, (q15_t)0xc7dc, (q15_t)0x5eb0, (q15_t)0xc7d6,\n    (q15_t)0x5ea5, (q15_t)0xc7d0, (q15_t)0x5e9a, (q15_t)0xc7ca, (q15_t)0x5e8f,\n    (q15_t)0xc7c4, (q15_t)0x5e84, (q15_t)0xc7be, (q15_t)0x5e79, (q15_t)0xc7b8,\n    (q15_t)0x5e6e, (q15_t)0xc7b2, (q15_t)0x5e63, (q15_t)0xc7ac, (q15_t)0x5e58,\n    (q15_t)0xc7a6, (q15_t)0x5e4d, (q15_t)0xc7a0, (q15_t)0x5e42, (q15_t)0xc79a,\n    (q15_t)0x5e36, (q15_t)0xc795, (q15_t)0x5e2b, (q15_t)0xc78f, (q15_t)0x5e20,\n    (q15_t)0xc789, (q15_t)0x5e15, (q15_t)0xc783, (q15_t)0x5e0a, (q15_t)0xc77d,\n    (q15_t)0x5dff, (q15_t)0xc777, (q15_t)0x5df4, (q15_t)0xc771, (q15_t)0x5de9,\n    (q15_t)0xc76b, (q15_t)0x5dde, (q15_t)0xc765, (q15_t)0x5dd3, (q15_t)0xc75f,\n    (q15_t)0x5dc7, (q15_t)0xc75a, (q15_t)0x5dbc, (q15_t)0xc754, (q15_t)0x5db1,\n    (q15_t)0xc74e, (q15_t)0x5da6, (q15_t)0xc748, (q15_t)0x5d9b, (q15_t)0xc742,\n    (q15_t)0x5d90, (q15_t)0xc73d, (q15_t)0x5d85, (q15_t)0xc737, (q15_t)0x5d79,\n    (q15_t)0xc731, (q15_t)0x5d6e, (q15_t)0xc72b, (q15_t)0x5d63, (q15_t)0xc725,\n    (q15_t)0x5d58, (q15_t)0xc720, (q15_t)0x5d4d, (q15_t)0xc71a, (q15_t)0x5d42,\n    (q15_t)0xc714, (q15_t)0x5d36, (q15_t)0xc70e, (q15_t)0x5d2b, (q15_t)0xc709,\n    (q15_t)0x5d20, (q15_t)0xc703, (q15_t)0x5d15, (q15_t)0xc6fd, (q15_t)0x5d0a,\n    (q15_t)0xc6f7, (q15_t)0x5cff, (q15_t)0xc6f2, (q15_t)0x5cf3, (q15_t)0xc6ec,\n    (q15_t)0x5ce8, (q15_t)0xc6e6, (q15_t)0x5cdd, (q15_t)0xc6e1, (q15_t)0x5cd2,\n    (q15_t)0xc6db, (q15_t)0x5cc6, (q15_t)0xc6d5, (q15_t)0x5cbb, (q15_t)0xc6d0,\n    (q15_t)0x5cb0, (q15_t)0xc6ca, (q15_t)0x5ca5, (q15_t)0xc6c5, (q15_t)0x5c99,\n    (q15_t)0xc6bf, (q15_t)0x5c8e, (q15_t)0xc6b9, (q15_t)0x5c83, (q15_t)0xc6b4,\n    (q15_t)0x5c78, (q15_t)0xc6ae, (q15_t)0x5c6c, (q15_t)0xc6a8, (q15_t)0x5c61,\n    (q15_t)0xc6a3, (q15_t)0x5c56, (q15_t)0xc69d, (q15_t)0x5c4b, (q15_t)0xc698,\n    (q15_t)0x5c3f, (q15_t)0xc692, (q15_t)0x5c34, (q15_t)0xc68d, (q15_t)0x5c29,\n    (q15_t)0xc687, (q15_t)0x5c1e, (q15_t)0xc682, (q15_t)0x5c12, (q15_t)0xc67c,\n    (q15_t)0x5c07, (q15_t)0xc677, (q15_t)0x5bfc, (q15_t)0xc671, (q15_t)0x5bf0,\n    (q15_t)0xc66c, (q15_t)0x5be5, (q15_t)0xc666, (q15_t)0x5bda, (q15_t)0xc661,\n    (q15_t)0x5bce, (q15_t)0xc65b, (q15_t)0x5bc3, (q15_t)0xc656, (q15_t)0x5bb8,\n    (q15_t)0xc650, (q15_t)0x5bac, (q15_t)0xc64b, (q15_t)0x5ba1, (q15_t)0xc645,\n    (q15_t)0x5b96, (q15_t)0xc640, (q15_t)0x5b8a, (q15_t)0xc63b, (q15_t)0x5b7f,\n    (q15_t)0xc635, (q15_t)0x5b74, (q15_t)0xc630, (q15_t)0x5b68, (q15_t)0xc62a,\n    (q15_t)0x5b5d, (q15_t)0xc625, (q15_t)0x5b52, (q15_t)0xc620, (q15_t)0x5b46,\n    (q15_t)0xc61a, (q15_t)0x5b3b, (q15_t)0xc615, (q15_t)0x5b30, (q15_t)0xc610,\n    (q15_t)0x5b24, (q15_t)0xc60a, (q15_t)0x5b19, (q15_t)0xc605, (q15_t)0x5b0d,\n    (q15_t)0xc600, (q15_t)0x5b02, (q15_t)0xc5fa, (q15_t)0x5af7, (q15_t)0xc5f5,\n    (q15_t)0x5aeb, (q15_t)0xc5f0, (q15_t)0x5ae0, (q15_t)0xc5ea, (q15_t)0x5ad4,\n    (q15_t)0xc5e5, (q15_t)0x5ac9, (q15_t)0xc5e0, (q15_t)0x5abe, (q15_t)0xc5db,\n    (q15_t)0x5ab2, (q15_t)0xc5d5, (q15_t)0x5aa7, (q15_t)0xc5d0, (q15_t)0x5a9b,\n    (q15_t)0xc5cb, (q15_t)0x5a90, (q15_t)0xc5c6, (q15_t)0x5a84, (q15_t)0xc5c1,\n    (q15_t)0x5a79, (q15_t)0xc5bb, (q15_t)0x5a6e, (q15_t)0xc5b6, (q15_t)0x5a62,\n    (q15_t)0xc5b1, (q15_t)0x5a57, (q15_t)0xc5ac, (q15_t)0x5a4b, (q15_t)0xc5a7,\n    (q15_t)0x5a40, (q15_t)0xc5a1, (q15_t)0x5a34, (q15_t)0xc59c, (q15_t)0x5a29,\n    (q15_t)0xc597, (q15_t)0x5a1d, (q15_t)0xc592, (q15_t)0x5a12, (q15_t)0xc58d,\n    (q15_t)0x5a06, (q15_t)0xc588, (q15_t)0x59fb, (q15_t)0xc583, (q15_t)0x59ef,\n    (q15_t)0xc57e, (q15_t)0x59e4, (q15_t)0xc578, (q15_t)0x59d8, (q15_t)0xc573,\n    (q15_t)0x59cd, (q15_t)0xc56e, (q15_t)0x59c1, (q15_t)0xc569, (q15_t)0x59b6,\n    (q15_t)0xc564, (q15_t)0x59aa, (q15_t)0xc55f, (q15_t)0x599f, (q15_t)0xc55a,\n    (q15_t)0x5993, (q15_t)0xc555, (q15_t)0x5988, (q15_t)0xc550, (q15_t)0x597c,\n    (q15_t)0xc54b, (q15_t)0x5971, (q15_t)0xc546, (q15_t)0x5965, (q15_t)0xc541,\n    (q15_t)0x595a, (q15_t)0xc53c, (q15_t)0x594e, (q15_t)0xc537, (q15_t)0x5943,\n    (q15_t)0xc532, (q15_t)0x5937, (q15_t)0xc52d, (q15_t)0x592c, (q15_t)0xc528,\n    (q15_t)0x5920, (q15_t)0xc523, (q15_t)0x5914, (q15_t)0xc51e, (q15_t)0x5909,\n    (q15_t)0xc51a, (q15_t)0x58fd, (q15_t)0xc515, (q15_t)0x58f2, (q15_t)0xc510,\n    (q15_t)0x58e6, (q15_t)0xc50b, (q15_t)0x58db, (q15_t)0xc506, (q15_t)0x58cf,\n    (q15_t)0xc501, (q15_t)0x58c3, (q15_t)0xc4fc, (q15_t)0x58b8, (q15_t)0xc4f7,\n    (q15_t)0x58ac, (q15_t)0xc4f2, (q15_t)0x58a1, (q15_t)0xc4ee, (q15_t)0x5895,\n    (q15_t)0xc4e9, (q15_t)0x5889, (q15_t)0xc4e4, (q15_t)0x587e, (q15_t)0xc4df,\n    (q15_t)0x5872, (q15_t)0xc4da, (q15_t)0x5867, (q15_t)0xc4d6, (q15_t)0x585b,\n    (q15_t)0xc4d1, (q15_t)0x584f, (q15_t)0xc4cc, (q15_t)0x5844, (q15_t)0xc4c7,\n    (q15_t)0x5838, (q15_t)0xc4c2, (q15_t)0x582d, (q15_t)0xc4be, (q15_t)0x5821,\n    (q15_t)0xc4b9, (q15_t)0x5815, (q15_t)0xc4b4, (q15_t)0x580a, (q15_t)0xc4b0,\n    (q15_t)0x57fe, (q15_t)0xc4ab, (q15_t)0x57f2, (q15_t)0xc4a6, (q15_t)0x57e7,\n    (q15_t)0xc4a1, (q15_t)0x57db, (q15_t)0xc49d, (q15_t)0x57cf, (q15_t)0xc498,\n    (q15_t)0x57c4, (q15_t)0xc493, (q15_t)0x57b8, (q15_t)0xc48f, (q15_t)0x57ac,\n    (q15_t)0xc48a, (q15_t)0x57a1, (q15_t)0xc485, (q15_t)0x5795, (q15_t)0xc481,\n    (q15_t)0x5789, (q15_t)0xc47c, (q15_t)0x577e, (q15_t)0xc478, (q15_t)0x5772,\n    (q15_t)0xc473, (q15_t)0x5766, (q15_t)0xc46e, (q15_t)0x575b, (q15_t)0xc46a,\n    (q15_t)0x574f, (q15_t)0xc465, (q15_t)0x5743, (q15_t)0xc461, (q15_t)0x5737,\n    (q15_t)0xc45c, (q15_t)0x572c, (q15_t)0xc457, (q15_t)0x5720, (q15_t)0xc453,\n    (q15_t)0x5714, (q15_t)0xc44e, (q15_t)0x5709, (q15_t)0xc44a, (q15_t)0x56fd,\n    (q15_t)0xc445, (q15_t)0x56f1, (q15_t)0xc441, (q15_t)0x56e5, (q15_t)0xc43c,\n    (q15_t)0x56da, (q15_t)0xc438, (q15_t)0x56ce, (q15_t)0xc433, (q15_t)0x56c2,\n    (q15_t)0xc42f, (q15_t)0x56b6, (q15_t)0xc42a, (q15_t)0x56ab, (q15_t)0xc426,\n    (q15_t)0x569f, (q15_t)0xc422, (q15_t)0x5693, (q15_t)0xc41d, (q15_t)0x5687,\n    (q15_t)0xc419, (q15_t)0x567c, (q15_t)0xc414, (q15_t)0x5670, (q15_t)0xc410,\n    (q15_t)0x5664, (q15_t)0xc40b, (q15_t)0x5658, (q15_t)0xc407, (q15_t)0x564c,\n    (q15_t)0xc403, (q15_t)0x5641, (q15_t)0xc3fe, (q15_t)0x5635, (q15_t)0xc3fa,\n    (q15_t)0x5629, (q15_t)0xc3f6, (q15_t)0x561d, (q15_t)0xc3f1, (q15_t)0x5612,\n    (q15_t)0xc3ed, (q15_t)0x5606, (q15_t)0xc3e9, (q15_t)0x55fa, (q15_t)0xc3e4,\n    (q15_t)0x55ee, (q15_t)0xc3e0, (q15_t)0x55e2, (q15_t)0xc3dc, (q15_t)0x55d7,\n    (q15_t)0xc3d7, (q15_t)0x55cb, (q15_t)0xc3d3, (q15_t)0x55bf, (q15_t)0xc3cf,\n    (q15_t)0x55b3, (q15_t)0xc3ca, (q15_t)0x55a7, (q15_t)0xc3c6, (q15_t)0x559b,\n    (q15_t)0xc3c2, (q15_t)0x5590, (q15_t)0xc3be, (q15_t)0x5584, (q15_t)0xc3ba,\n    (q15_t)0x5578, (q15_t)0xc3b5, (q15_t)0x556c, (q15_t)0xc3b1, (q15_t)0x5560,\n    (q15_t)0xc3ad, (q15_t)0x5554, (q15_t)0xc3a9, (q15_t)0x5549, (q15_t)0xc3a5,\n    (q15_t)0x553d, (q15_t)0xc3a0, (q15_t)0x5531, (q15_t)0xc39c, (q15_t)0x5525,\n    (q15_t)0xc398, (q15_t)0x5519, (q15_t)0xc394, (q15_t)0x550d, (q15_t)0xc390,\n    (q15_t)0x5501, (q15_t)0xc38c, (q15_t)0x54f6, (q15_t)0xc387, (q15_t)0x54ea,\n    (q15_t)0xc383, (q15_t)0x54de, (q15_t)0xc37f, (q15_t)0x54d2, (q15_t)0xc37b,\n    (q15_t)0x54c6, (q15_t)0xc377, (q15_t)0x54ba, (q15_t)0xc373, (q15_t)0x54ae,\n    (q15_t)0xc36f, (q15_t)0x54a2, (q15_t)0xc36b, (q15_t)0x5496, (q15_t)0xc367,\n    (q15_t)0x548b, (q15_t)0xc363, (q15_t)0x547f, (q15_t)0xc35f, (q15_t)0x5473,\n    (q15_t)0xc35b, (q15_t)0x5467, (q15_t)0xc357, (q15_t)0x545b, (q15_t)0xc353,\n    (q15_t)0x544f, (q15_t)0xc34f, (q15_t)0x5443, (q15_t)0xc34b, (q15_t)0x5437,\n    (q15_t)0xc347, (q15_t)0x542b, (q15_t)0xc343, (q15_t)0x541f, (q15_t)0xc33f,\n    (q15_t)0x5413, (q15_t)0xc33b, (q15_t)0x5407, (q15_t)0xc337, (q15_t)0x53fb,\n    (q15_t)0xc333, (q15_t)0x53f0, (q15_t)0xc32f, (q15_t)0x53e4, (q15_t)0xc32b,\n    (q15_t)0x53d8, (q15_t)0xc327, (q15_t)0x53cc, (q15_t)0xc323, (q15_t)0x53c0,\n    (q15_t)0xc320, (q15_t)0x53b4, (q15_t)0xc31c, (q15_t)0x53a8, (q15_t)0xc318,\n    (q15_t)0x539c, (q15_t)0xc314, (q15_t)0x5390, (q15_t)0xc310, (q15_t)0x5384,\n    (q15_t)0xc30c, (q15_t)0x5378, (q15_t)0xc308, (q15_t)0x536c, (q15_t)0xc305,\n    (q15_t)0x5360, (q15_t)0xc301, (q15_t)0x5354, (q15_t)0xc2fd, (q15_t)0x5348,\n    (q15_t)0xc2f9, (q15_t)0x533c, (q15_t)0xc2f5, (q15_t)0x5330, (q15_t)0xc2f2,\n    (q15_t)0x5324, (q15_t)0xc2ee, (q15_t)0x5318, (q15_t)0xc2ea, (q15_t)0x530c,\n    (q15_t)0xc2e6, (q15_t)0x5300, (q15_t)0xc2e3, (q15_t)0x52f4, (q15_t)0xc2df,\n    (q15_t)0x52e8, (q15_t)0xc2db, (q15_t)0x52dc, (q15_t)0xc2d8, (q15_t)0x52d0,\n    (q15_t)0xc2d4, (q15_t)0x52c4, (q15_t)0xc2d0, (q15_t)0x52b8, (q15_t)0xc2cc,\n    (q15_t)0x52ac, (q15_t)0xc2c9, (q15_t)0x52a0, (q15_t)0xc2c5, (q15_t)0x5294,\n    (q15_t)0xc2c1, (q15_t)0x5288, (q15_t)0xc2be, (q15_t)0x527c, (q15_t)0xc2ba,\n    (q15_t)0x5270, (q15_t)0xc2b7, (q15_t)0x5264, (q15_t)0xc2b3, (q15_t)0x5258,\n    (q15_t)0xc2af, (q15_t)0x524c, (q15_t)0xc2ac, (q15_t)0x5240, (q15_t)0xc2a8,\n    (q15_t)0x5234, (q15_t)0xc2a5, (q15_t)0x5228, (q15_t)0xc2a1, (q15_t)0x521c,\n    (q15_t)0xc29d, (q15_t)0x5210, (q15_t)0xc29a, (q15_t)0x5204, (q15_t)0xc296,\n    (q15_t)0x51f7, (q15_t)0xc293, (q15_t)0x51eb, (q15_t)0xc28f, (q15_t)0x51df,\n    (q15_t)0xc28c, (q15_t)0x51d3, (q15_t)0xc288, (q15_t)0x51c7, (q15_t)0xc285,\n    (q15_t)0x51bb, (q15_t)0xc281, (q15_t)0x51af, (q15_t)0xc27e, (q15_t)0x51a3,\n    (q15_t)0xc27a, (q15_t)0x5197, (q15_t)0xc277, (q15_t)0x518b, (q15_t)0xc273,\n    (q15_t)0x517f, (q15_t)0xc270, (q15_t)0x5173, (q15_t)0xc26d, (q15_t)0x5167,\n    (q15_t)0xc269, (q15_t)0x515a, (q15_t)0xc266, (q15_t)0x514e, (q15_t)0xc262,\n    (q15_t)0x5142, (q15_t)0xc25f, (q15_t)0x5136, (q15_t)0xc25c, (q15_t)0x512a,\n    (q15_t)0xc258, (q15_t)0x511e, (q15_t)0xc255, (q15_t)0x5112, (q15_t)0xc251,\n    (q15_t)0x5106, (q15_t)0xc24e, (q15_t)0x50fa, (q15_t)0xc24b, (q15_t)0x50ed,\n    (q15_t)0xc247, (q15_t)0x50e1, (q15_t)0xc244, (q15_t)0x50d5, (q15_t)0xc241,\n    (q15_t)0x50c9, (q15_t)0xc23e, (q15_t)0x50bd, (q15_t)0xc23a, (q15_t)0x50b1,\n    (q15_t)0xc237, (q15_t)0x50a5, (q15_t)0xc234, (q15_t)0x5099, (q15_t)0xc230,\n    (q15_t)0x508c, (q15_t)0xc22d, (q15_t)0x5080, (q15_t)0xc22a, (q15_t)0x5074,\n    (q15_t)0xc227, (q15_t)0x5068, (q15_t)0xc223, (q15_t)0x505c, (q15_t)0xc220,\n    (q15_t)0x5050, (q15_t)0xc21d, (q15_t)0x5044, (q15_t)0xc21a, (q15_t)0x5037,\n    (q15_t)0xc217, (q15_t)0x502b, (q15_t)0xc213, (q15_t)0x501f, (q15_t)0xc210,\n    (q15_t)0x5013, (q15_t)0xc20d, (q15_t)0x5007, (q15_t)0xc20a, (q15_t)0x4ffb,\n    (q15_t)0xc207, (q15_t)0x4fee, (q15_t)0xc204, (q15_t)0x4fe2, (q15_t)0xc201,\n    (q15_t)0x4fd6, (q15_t)0xc1fd, (q15_t)0x4fca, (q15_t)0xc1fa, (q15_t)0x4fbe,\n    (q15_t)0xc1f7, (q15_t)0x4fb2, (q15_t)0xc1f4, (q15_t)0x4fa5, (q15_t)0xc1f1,\n    (q15_t)0x4f99, (q15_t)0xc1ee, (q15_t)0x4f8d, (q15_t)0xc1eb, (q15_t)0x4f81,\n    (q15_t)0xc1e8, (q15_t)0x4f75, (q15_t)0xc1e5, (q15_t)0x4f68, (q15_t)0xc1e2,\n    (q15_t)0x4f5c, (q15_t)0xc1df, (q15_t)0x4f50, (q15_t)0xc1dc, (q15_t)0x4f44,\n    (q15_t)0xc1d9, (q15_t)0x4f38, (q15_t)0xc1d6, (q15_t)0x4f2b, (q15_t)0xc1d3,\n    (q15_t)0x4f1f, (q15_t)0xc1d0, (q15_t)0x4f13, (q15_t)0xc1cd, (q15_t)0x4f07,\n    (q15_t)0xc1ca, (q15_t)0x4efb, (q15_t)0xc1c7, (q15_t)0x4eee, (q15_t)0xc1c4,\n    (q15_t)0x4ee2, (q15_t)0xc1c1, (q15_t)0x4ed6, (q15_t)0xc1be, (q15_t)0x4eca,\n    (q15_t)0xc1bb, (q15_t)0x4ebd, (q15_t)0xc1b8, (q15_t)0x4eb1, (q15_t)0xc1b6,\n    (q15_t)0x4ea5, (q15_t)0xc1b3, (q15_t)0x4e99, (q15_t)0xc1b0, (q15_t)0x4e8c,\n    (q15_t)0xc1ad, (q15_t)0x4e80, (q15_t)0xc1aa, (q15_t)0x4e74, (q15_t)0xc1a7,\n    (q15_t)0x4e68, (q15_t)0xc1a4, (q15_t)0x4e5c, (q15_t)0xc1a2, (q15_t)0x4e4f,\n    (q15_t)0xc19f, (q15_t)0x4e43, (q15_t)0xc19c, (q15_t)0x4e37, (q15_t)0xc199,\n    (q15_t)0x4e2b, (q15_t)0xc196, (q15_t)0x4e1e, (q15_t)0xc194, (q15_t)0x4e12,\n    (q15_t)0xc191, (q15_t)0x4e06, (q15_t)0xc18e, (q15_t)0x4df9, (q15_t)0xc18b,\n    (q15_t)0x4ded, (q15_t)0xc189, (q15_t)0x4de1, (q15_t)0xc186, (q15_t)0x4dd5,\n    (q15_t)0xc183, (q15_t)0x4dc8, (q15_t)0xc180, (q15_t)0x4dbc, (q15_t)0xc17e,\n    (q15_t)0x4db0, (q15_t)0xc17b, (q15_t)0x4da4, (q15_t)0xc178, (q15_t)0x4d97,\n    (q15_t)0xc176, (q15_t)0x4d8b, (q15_t)0xc173, (q15_t)0x4d7f, (q15_t)0xc170,\n    (q15_t)0x4d72, (q15_t)0xc16e, (q15_t)0x4d66, (q15_t)0xc16b, (q15_t)0x4d5a,\n    (q15_t)0xc168, (q15_t)0x4d4e, (q15_t)0xc166, (q15_t)0x4d41, (q15_t)0xc163,\n    (q15_t)0x4d35, (q15_t)0xc161, (q15_t)0x4d29, (q15_t)0xc15e, (q15_t)0x4d1c,\n    (q15_t)0xc15b, (q15_t)0x4d10, (q15_t)0xc159, (q15_t)0x4d04, (q15_t)0xc156,\n    (q15_t)0x4cf8, (q15_t)0xc154, (q15_t)0x4ceb, (q15_t)0xc151, (q15_t)0x4cdf,\n    (q15_t)0xc14f, (q15_t)0x4cd3, (q15_t)0xc14c, (q15_t)0x4cc6, (q15_t)0xc14a,\n    (q15_t)0x4cba, (q15_t)0xc147, (q15_t)0x4cae, (q15_t)0xc145, (q15_t)0x4ca1,\n    (q15_t)0xc142, (q15_t)0x4c95, (q15_t)0xc140, (q15_t)0x4c89, (q15_t)0xc13d,\n    (q15_t)0x4c7c, (q15_t)0xc13b, (q15_t)0x4c70, (q15_t)0xc138, (q15_t)0x4c64,\n    (q15_t)0xc136, (q15_t)0x4c57, (q15_t)0xc134, (q15_t)0x4c4b, (q15_t)0xc131,\n    (q15_t)0x4c3f, (q15_t)0xc12f, (q15_t)0x4c32, (q15_t)0xc12c, (q15_t)0x4c26,\n    (q15_t)0xc12a, (q15_t)0x4c1a, (q15_t)0xc128, (q15_t)0x4c0d, (q15_t)0xc125,\n    (q15_t)0x4c01, (q15_t)0xc123, (q15_t)0x4bf5, (q15_t)0xc120, (q15_t)0x4be8,\n    (q15_t)0xc11e, (q15_t)0x4bdc, (q15_t)0xc11c, (q15_t)0x4bd0, (q15_t)0xc119,\n    (q15_t)0x4bc3, (q15_t)0xc117, (q15_t)0x4bb7, (q15_t)0xc115, (q15_t)0x4bab,\n    (q15_t)0xc113, (q15_t)0x4b9e, (q15_t)0xc110, (q15_t)0x4b92, (q15_t)0xc10e,\n    (q15_t)0x4b85, (q15_t)0xc10c, (q15_t)0x4b79, (q15_t)0xc109, (q15_t)0x4b6d,\n    (q15_t)0xc107, (q15_t)0x4b60, (q15_t)0xc105, (q15_t)0x4b54, (q15_t)0xc103,\n    (q15_t)0x4b48, (q15_t)0xc100, (q15_t)0x4b3b, (q15_t)0xc0fe, (q15_t)0x4b2f,\n    (q15_t)0xc0fc, (q15_t)0x4b23, (q15_t)0xc0fa, (q15_t)0x4b16, (q15_t)0xc0f8,\n    (q15_t)0x4b0a, (q15_t)0xc0f6, (q15_t)0x4afd, (q15_t)0xc0f3, (q15_t)0x4af1,\n    (q15_t)0xc0f1, (q15_t)0x4ae5, (q15_t)0xc0ef, (q15_t)0x4ad8, (q15_t)0xc0ed,\n    (q15_t)0x4acc, (q15_t)0xc0eb, (q15_t)0x4ac0, (q15_t)0xc0e9, (q15_t)0x4ab3,\n    (q15_t)0xc0e7, (q15_t)0x4aa7, (q15_t)0xc0e4, (q15_t)0x4a9a, (q15_t)0xc0e2,\n    (q15_t)0x4a8e, (q15_t)0xc0e0, (q15_t)0x4a82, (q15_t)0xc0de, (q15_t)0x4a75,\n    (q15_t)0xc0dc, (q15_t)0x4a69, (q15_t)0xc0da, (q15_t)0x4a5c, (q15_t)0xc0d8,\n    (q15_t)0x4a50, (q15_t)0xc0d6, (q15_t)0x4a44, (q15_t)0xc0d4, (q15_t)0x4a37,\n    (q15_t)0xc0d2, (q15_t)0x4a2b, (q15_t)0xc0d0, (q15_t)0x4a1e, (q15_t)0xc0ce,\n    (q15_t)0x4a12, (q15_t)0xc0cc, (q15_t)0x4a06, (q15_t)0xc0ca, (q15_t)0x49f9,\n    (q15_t)0xc0c8, (q15_t)0x49ed, (q15_t)0xc0c6, (q15_t)0x49e0, (q15_t)0xc0c4,\n    (q15_t)0x49d4, (q15_t)0xc0c2, (q15_t)0x49c7, (q15_t)0xc0c0, (q15_t)0x49bb,\n    (q15_t)0xc0be, (q15_t)0x49af, (q15_t)0xc0bd, (q15_t)0x49a2, (q15_t)0xc0bb,\n    (q15_t)0x4996, (q15_t)0xc0b9, (q15_t)0x4989, (q15_t)0xc0b7, (q15_t)0x497d,\n    (q15_t)0xc0b5, (q15_t)0x4970, (q15_t)0xc0b3, (q15_t)0x4964, (q15_t)0xc0b1,\n    (q15_t)0x4958, (q15_t)0xc0af, (q15_t)0x494b, (q15_t)0xc0ae, (q15_t)0x493f,\n    (q15_t)0xc0ac, (q15_t)0x4932, (q15_t)0xc0aa, (q15_t)0x4926, (q15_t)0xc0a8,\n    (q15_t)0x4919, (q15_t)0xc0a6, (q15_t)0x490d, (q15_t)0xc0a5, (q15_t)0x4901,\n    (q15_t)0xc0a3, (q15_t)0x48f4, (q15_t)0xc0a1, (q15_t)0x48e8, (q15_t)0xc09f,\n    (q15_t)0x48db, (q15_t)0xc09e, (q15_t)0x48cf, (q15_t)0xc09c, (q15_t)0x48c2,\n    (q15_t)0xc09a, (q15_t)0x48b6, (q15_t)0xc098, (q15_t)0x48a9, (q15_t)0xc097,\n    (q15_t)0x489d, (q15_t)0xc095, (q15_t)0x4891, (q15_t)0xc093, (q15_t)0x4884,\n    (q15_t)0xc092, (q15_t)0x4878, (q15_t)0xc090, (q15_t)0x486b, (q15_t)0xc08e,\n    (q15_t)0x485f, (q15_t)0xc08d, (q15_t)0x4852, (q15_t)0xc08b, (q15_t)0x4846,\n    (q15_t)0xc089, (q15_t)0x4839, (q15_t)0xc088, (q15_t)0x482d, (q15_t)0xc086,\n    (q15_t)0x4820, (q15_t)0xc085, (q15_t)0x4814, (q15_t)0xc083, (q15_t)0x4807,\n    (q15_t)0xc081, (q15_t)0x47fb, (q15_t)0xc080, (q15_t)0x47ef, (q15_t)0xc07e,\n    (q15_t)0x47e2, (q15_t)0xc07d, (q15_t)0x47d6, (q15_t)0xc07b, (q15_t)0x47c9,\n    (q15_t)0xc07a, (q15_t)0x47bd, (q15_t)0xc078, (q15_t)0x47b0, (q15_t)0xc077,\n    (q15_t)0x47a4, (q15_t)0xc075, (q15_t)0x4797, (q15_t)0xc074, (q15_t)0x478b,\n    (q15_t)0xc072, (q15_t)0x477e, (q15_t)0xc071, (q15_t)0x4772, (q15_t)0xc06f,\n    (q15_t)0x4765, (q15_t)0xc06e, (q15_t)0x4759, (q15_t)0xc06c, (q15_t)0x474c,\n    (q15_t)0xc06b, (q15_t)0x4740, (q15_t)0xc069, (q15_t)0x4733, (q15_t)0xc068,\n    (q15_t)0x4727, (q15_t)0xc067, (q15_t)0x471a, (q15_t)0xc065, (q15_t)0x470e,\n    (q15_t)0xc064, (q15_t)0x4701, (q15_t)0xc062, (q15_t)0x46f5, (q15_t)0xc061,\n    (q15_t)0x46e8, (q15_t)0xc060, (q15_t)0x46dc, (q15_t)0xc05e, (q15_t)0x46cf,\n    (q15_t)0xc05d, (q15_t)0x46c3, (q15_t)0xc05c, (q15_t)0x46b6, (q15_t)0xc05a,\n    (q15_t)0x46aa, (q15_t)0xc059, (q15_t)0x469d, (q15_t)0xc058, (q15_t)0x4691,\n    (q15_t)0xc056, (q15_t)0x4684, (q15_t)0xc055, (q15_t)0x4678, (q15_t)0xc054,\n    (q15_t)0x466b, (q15_t)0xc053, (q15_t)0x465f, (q15_t)0xc051, (q15_t)0x4652,\n    (q15_t)0xc050, (q15_t)0x4646, (q15_t)0xc04f, (q15_t)0x4639, (q15_t)0xc04e,\n    (q15_t)0x462d, (q15_t)0xc04c, (q15_t)0x4620, (q15_t)0xc04b, (q15_t)0x4614,\n    (q15_t)0xc04a, (q15_t)0x4607, (q15_t)0xc049, (q15_t)0x45fb, (q15_t)0xc048,\n    (q15_t)0x45ee, (q15_t)0xc047, (q15_t)0x45e2, (q15_t)0xc045, (q15_t)0x45d5,\n    (q15_t)0xc044, (q15_t)0x45c9, (q15_t)0xc043, (q15_t)0x45bc, (q15_t)0xc042,\n    (q15_t)0x45b0, (q15_t)0xc041, (q15_t)0x45a3, (q15_t)0xc040, (q15_t)0x4597,\n    (q15_t)0xc03f, (q15_t)0x458a, (q15_t)0xc03d, (q15_t)0x457e, (q15_t)0xc03c,\n    (q15_t)0x4571, (q15_t)0xc03b, (q15_t)0x4565, (q15_t)0xc03a, (q15_t)0x4558,\n    (q15_t)0xc039, (q15_t)0x454c, (q15_t)0xc038, (q15_t)0x453f, (q15_t)0xc037,\n    (q15_t)0x4533, (q15_t)0xc036, (q15_t)0x4526, (q15_t)0xc035, (q15_t)0x451a,\n    (q15_t)0xc034, (q15_t)0x450d, (q15_t)0xc033, (q15_t)0x4500, (q15_t)0xc032,\n    (q15_t)0x44f4, (q15_t)0xc031, (q15_t)0x44e7, (q15_t)0xc030, (q15_t)0x44db,\n    (q15_t)0xc02f, (q15_t)0x44ce, (q15_t)0xc02e, (q15_t)0x44c2, (q15_t)0xc02d,\n    (q15_t)0x44b5, (q15_t)0xc02c, (q15_t)0x44a9, (q15_t)0xc02b, (q15_t)0x449c,\n    (q15_t)0xc02b, (q15_t)0x4490, (q15_t)0xc02a, (q15_t)0x4483, (q15_t)0xc029,\n    (q15_t)0x4477, (q15_t)0xc028, (q15_t)0x446a, (q15_t)0xc027, (q15_t)0x445e,\n    (q15_t)0xc026, (q15_t)0x4451, (q15_t)0xc025, (q15_t)0x4444, (q15_t)0xc024,\n    (q15_t)0x4438, (q15_t)0xc024, (q15_t)0x442b, (q15_t)0xc023, (q15_t)0x441f,\n    (q15_t)0xc022, (q15_t)0x4412, (q15_t)0xc021, (q15_t)0x4406, (q15_t)0xc020,\n    (q15_t)0x43f9, (q15_t)0xc020, (q15_t)0x43ed, (q15_t)0xc01f, (q15_t)0x43e0,\n    (q15_t)0xc01e, (q15_t)0x43d4, (q15_t)0xc01d, (q15_t)0x43c7, (q15_t)0xc01d,\n    (q15_t)0x43bb, (q15_t)0xc01c, (q15_t)0x43ae, (q15_t)0xc01b, (q15_t)0x43a1,\n    (q15_t)0xc01a, (q15_t)0x4395, (q15_t)0xc01a, (q15_t)0x4388, (q15_t)0xc019,\n    (q15_t)0x437c, (q15_t)0xc018, (q15_t)0x436f, (q15_t)0xc018, (q15_t)0x4363,\n    (q15_t)0xc017, (q15_t)0x4356, (q15_t)0xc016, (q15_t)0x434a, (q15_t)0xc016,\n    (q15_t)0x433d, (q15_t)0xc015, (q15_t)0x4330, (q15_t)0xc014, (q15_t)0x4324,\n    (q15_t)0xc014, (q15_t)0x4317, (q15_t)0xc013, (q15_t)0x430b, (q15_t)0xc013,\n    (q15_t)0x42fe, (q15_t)0xc012, (q15_t)0x42f2, (q15_t)0xc011, (q15_t)0x42e5,\n    (q15_t)0xc011, (q15_t)0x42d9, (q15_t)0xc010, (q15_t)0x42cc, (q15_t)0xc010,\n    (q15_t)0x42c0, (q15_t)0xc00f, (q15_t)0x42b3, (q15_t)0xc00f, (q15_t)0x42a6,\n    (q15_t)0xc00e, (q15_t)0x429a, (q15_t)0xc00e, (q15_t)0x428d, (q15_t)0xc00d,\n    (q15_t)0x4281, (q15_t)0xc00d, (q15_t)0x4274, (q15_t)0xc00c, (q15_t)0x4268,\n    (q15_t)0xc00c, (q15_t)0x425b, (q15_t)0xc00b, (q15_t)0x424e, (q15_t)0xc00b,\n    (q15_t)0x4242, (q15_t)0xc00a, (q15_t)0x4235, (q15_t)0xc00a, (q15_t)0x4229,\n    (q15_t)0xc009, (q15_t)0x421c, (q15_t)0xc009, (q15_t)0x4210, (q15_t)0xc009,\n    (q15_t)0x4203, (q15_t)0xc008, (q15_t)0x41f7, (q15_t)0xc008, (q15_t)0x41ea,\n    (q15_t)0xc007, (q15_t)0x41dd, (q15_t)0xc007, (q15_t)0x41d1, (q15_t)0xc007,\n    (q15_t)0x41c4, (q15_t)0xc006, (q15_t)0x41b8, (q15_t)0xc006, (q15_t)0x41ab,\n    (q15_t)0xc006, (q15_t)0x419f, (q15_t)0xc005, (q15_t)0x4192, (q15_t)0xc005,\n    (q15_t)0x4186, (q15_t)0xc005, (q15_t)0x4179, (q15_t)0xc004, (q15_t)0x416c,\n    (q15_t)0xc004, (q15_t)0x4160, (q15_t)0xc004, (q15_t)0x4153, (q15_t)0xc004,\n    (q15_t)0x4147, (q15_t)0xc003, (q15_t)0x413a, (q15_t)0xc003, (q15_t)0x412e,\n    (q15_t)0xc003, (q15_t)0x4121, (q15_t)0xc003, (q15_t)0x4114, (q15_t)0xc002,\n    (q15_t)0x4108, (q15_t)0xc002, (q15_t)0x40fb, (q15_t)0xc002, (q15_t)0x40ef,\n    (q15_t)0xc002, (q15_t)0x40e2, (q15_t)0xc002, (q15_t)0x40d6, (q15_t)0xc001,\n    (q15_t)0x40c9, (q15_t)0xc001, (q15_t)0x40bc, (q15_t)0xc001, (q15_t)0x40b0,\n    (q15_t)0xc001, (q15_t)0x40a3, (q15_t)0xc001, (q15_t)0x4097, (q15_t)0xc001,\n    (q15_t)0x408a, (q15_t)0xc001, (q15_t)0x407e, (q15_t)0xc000, (q15_t)0x4071,\n    (q15_t)0xc000, (q15_t)0x4065, (q15_t)0xc000, (q15_t)0x4058, (q15_t)0xc000,\n    (q15_t)0x404b, (q15_t)0xc000, (q15_t)0x403f, (q15_t)0xc000, (q15_t)0x4032,\n    (q15_t)0xc000, (q15_t)0x4026, (q15_t)0xc000, (q15_t)0x4019, (q15_t)0xc000,\n    (q15_t)0x400d, (q15_t)0xc000,\n};\n\n/**\n  @} end of RealFFT_Table group\n */\n\n/**\n  @addtogroup RealFFT\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q15 RFFT/RIFFT.\n  @param[in,out] S              points to an instance of the Q15 RFFT/RIFFT\n  structure\n  @param[in]     fftLenReal     length of the FFT\n  @param[in]     ifftFlagR      flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is\n  not a supported length\n\n  @par           Details\n                   The parameter fftLenReal specifies length of\n  RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024,\n  2048, 4096, 8192.\n  @par\n                   The parameter ifftFlagR controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlagR to calculate\n  RIFFT, otherwise RFFT is calculated.\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   This function also initializes Twiddle factor table.\n */\n\narm_status arm_rfft_init_q15(arm_rfft_instance_q15 *S, uint32_t fftLenReal,\n                             uint32_t ifftFlagR, uint32_t bitReverseFlag) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /*  Initialize the Real FFT length */\n  S->fftLenReal = (uint16_t)fftLenReal;\n\n  /*  Initialize the Twiddle coefficientA pointer */\n  S->pTwiddleAReal = (q15_t *)realCoefAQ15;\n\n  /*  Initialize the Twiddle coefficientB pointer */\n  S->pTwiddleBReal = (q15_t *)realCoefBQ15;\n\n  /*  Initialize the Flag for selection of RFFT or RIFFT */\n  S->ifftFlagR = (uint8_t)ifftFlagR;\n\n  /*  Initialize the Flag for calculation Bit reversal or not */\n  S->bitReverseFlagR = (uint8_t)bitReverseFlag;\n\n  /*  Initialization of coef modifier depending on the FFT length */\n  switch (S->fftLenReal) {\n  case 8192U:\n    S->twidCoefRModifier = 1U;\n    S->pCfft = &arm_cfft_sR_q15_len4096;\n    break;\n  case 4096U:\n    S->twidCoefRModifier = 2U;\n    S->pCfft = &arm_cfft_sR_q15_len2048;\n    break;\n  case 2048U:\n    S->twidCoefRModifier = 4U;\n    S->pCfft = &arm_cfft_sR_q15_len1024;\n    break;\n  case 1024U:\n    S->twidCoefRModifier = 8U;\n    S->pCfft = &arm_cfft_sR_q15_len512;\n    break;\n  case 512U:\n    S->twidCoefRModifier = 16U;\n    S->pCfft = &arm_cfft_sR_q15_len256;\n    break;\n  case 256U:\n    S->twidCoefRModifier = 32U;\n    S->pCfft = &arm_cfft_sR_q15_len128;\n    break;\n  case 128U:\n    S->twidCoefRModifier = 64U;\n    S->pCfft = &arm_cfft_sR_q15_len64;\n    break;\n  case 64U:\n    S->twidCoefRModifier = 128U;\n    S->pCfft = &arm_cfft_sR_q15_len32;\n    break;\n  case 32U:\n    S->twidCoefRModifier = 256U;\n    S->pCfft = &arm_cfft_sR_q15_len16;\n    break;\n  default:\n    /*  Reporting argument error if rfftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  /* return the status of RFFT Init function */\n  return (status);\n}\n\n/**\n  @} end of RealFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_rfft_init_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rfft_init_q31.c\n * Description:  RFFT & RIFFT Q31 initialisation function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_common_tables.h\"\n#include \"arm_const_structs.h\"\n#include \"arm_math.h\"\n\n/**\n  @ingroup RealFFT\n */\n\n/**\n  @addtogroup RealFFT_Table Real FFT Tables\n  @{\n */\n\n/**\n  @par\n  Generation fixed-point realCoefAQ31 array in Q31 format:\n  @par\n  n = 4096\n  
for (i = 0; i < n; i++)\n  {\n     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) *\n  (double) i)); pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 *\n  n) * (double) i));\n  }
\n  @par\n  Convert to fixed point Q31 format\n      round(pATable[i] * pow(2, 31))\n*/\nconst q31_t realCoefAQ31[8192] = {\n    (q31_t)0x40000000, (q31_t)0xc0000000, (q31_t)0x3ff36f02, (q31_t)0xc000013c,\n    (q31_t)0x3fe6de05, (q31_t)0xc00004ef, (q31_t)0x3fda4d09, (q31_t)0xc0000b1a,\n    (q31_t)0x3fcdbc0f, (q31_t)0xc00013bd, (q31_t)0x3fc12b16, (q31_t)0xc0001ed8,\n    (q31_t)0x3fb49a1f, (q31_t)0xc0002c6a, (q31_t)0x3fa8092c, (q31_t)0xc0003c74,\n    (q31_t)0x3f9b783c, (q31_t)0xc0004ef5, (q31_t)0x3f8ee750, (q31_t)0xc00063ee,\n    (q31_t)0x3f825668, (q31_t)0xc0007b5f, (q31_t)0x3f75c585, (q31_t)0xc0009547,\n    (q31_t)0x3f6934a8, (q31_t)0xc000b1a7, (q31_t)0x3f5ca3d0, (q31_t)0xc000d07e,\n    (q31_t)0x3f5012fe, (q31_t)0xc000f1ce, (q31_t)0x3f438234, (q31_t)0xc0011594,\n    (q31_t)0x3f36f170, (q31_t)0xc0013bd3, (q31_t)0x3f2a60b4, (q31_t)0xc0016489,\n    (q31_t)0x3f1dd001, (q31_t)0xc0018fb6, (q31_t)0x3f113f56, (q31_t)0xc001bd5c,\n    (q31_t)0x3f04aeb5, (q31_t)0xc001ed78, (q31_t)0x3ef81e1d, (q31_t)0xc002200d,\n    (q31_t)0x3eeb8d8f, (q31_t)0xc0025519, (q31_t)0x3edefd0c, (q31_t)0xc0028c9c,\n    (q31_t)0x3ed26c94, (q31_t)0xc002c697, (q31_t)0x3ec5dc28, (q31_t)0xc003030a,\n    (q31_t)0x3eb94bc8, (q31_t)0xc00341f4, (q31_t)0x3eacbb74, (q31_t)0xc0038356,\n    (q31_t)0x3ea02b2e, (q31_t)0xc003c72f, (q31_t)0x3e939af5, (q31_t)0xc0040d80,\n    (q31_t)0x3e870aca, (q31_t)0xc0045648, (q31_t)0x3e7a7aae, (q31_t)0xc004a188,\n    (q31_t)0x3e6deaa1, (q31_t)0xc004ef3f, (q31_t)0x3e615aa3, (q31_t)0xc0053f6e,\n    (q31_t)0x3e54cab5, (q31_t)0xc0059214, (q31_t)0x3e483ad8, (q31_t)0xc005e731,\n    (q31_t)0x3e3bab0b, (q31_t)0xc0063ec6, (q31_t)0x3e2f1b50, (q31_t)0xc00698d3,\n    (q31_t)0x3e228ba7, (q31_t)0xc006f556, (q31_t)0x3e15fc11, (q31_t)0xc0075452,\n    (q31_t)0x3e096c8d, (q31_t)0xc007b5c4, (q31_t)0x3dfcdd1d, (q31_t)0xc00819ae,\n    (q31_t)0x3df04dc0, (q31_t)0xc008800f, (q31_t)0x3de3be78, (q31_t)0xc008e8e8,\n    (q31_t)0x3dd72f45, (q31_t)0xc0095438, (q31_t)0x3dcaa027, (q31_t)0xc009c1ff,\n    (q31_t)0x3dbe111e, (q31_t)0xc00a323d, (q31_t)0x3db1822c, (q31_t)0xc00aa4f3,\n    (q31_t)0x3da4f351, (q31_t)0xc00b1a20, (q31_t)0x3d98648d, (q31_t)0xc00b91c4,\n    (q31_t)0x3d8bd5e1, (q31_t)0xc00c0be0, (q31_t)0x3d7f474d, (q31_t)0xc00c8872,\n    (q31_t)0x3d72b8d2, (q31_t)0xc00d077c, (q31_t)0x3d662a70, (q31_t)0xc00d88fd,\n    (q31_t)0x3d599c28, (q31_t)0xc00e0cf5, (q31_t)0x3d4d0df9, (q31_t)0xc00e9364,\n    (q31_t)0x3d407fe6, (q31_t)0xc00f1c4a, (q31_t)0x3d33f1ed, (q31_t)0xc00fa7a8,\n    (q31_t)0x3d276410, (q31_t)0xc010357c, (q31_t)0x3d1ad650, (q31_t)0xc010c5c7,\n    (q31_t)0x3d0e48ab, (q31_t)0xc011588a, (q31_t)0x3d01bb24, (q31_t)0xc011edc3,\n    (q31_t)0x3cf52dbb, (q31_t)0xc0128574, (q31_t)0x3ce8a06f, (q31_t)0xc0131f9b,\n    (q31_t)0x3cdc1342, (q31_t)0xc013bc39, (q31_t)0x3ccf8634, (q31_t)0xc0145b4e,\n    (q31_t)0x3cc2f945, (q31_t)0xc014fcda, (q31_t)0x3cb66c77, (q31_t)0xc015a0dd,\n    (q31_t)0x3ca9dfc8, (q31_t)0xc0164757, (q31_t)0x3c9d533b, (q31_t)0xc016f047,\n    (q31_t)0x3c90c6cf, (q31_t)0xc0179bae, (q31_t)0x3c843a85, (q31_t)0xc018498c,\n    (q31_t)0x3c77ae5e, (q31_t)0xc018f9e1, (q31_t)0x3c6b2259, (q31_t)0xc019acac,\n    (q31_t)0x3c5e9678, (q31_t)0xc01a61ee, (q31_t)0x3c520aba, (q31_t)0xc01b19a7,\n    (q31_t)0x3c457f21, (q31_t)0xc01bd3d6, (q31_t)0x3c38f3ac, (q31_t)0xc01c907c,\n    (q31_t)0x3c2c685d, (q31_t)0xc01d4f99, (q31_t)0x3c1fdd34, (q31_t)0xc01e112b,\n    (q31_t)0x3c135231, (q31_t)0xc01ed535, (q31_t)0x3c06c754, (q31_t)0xc01f9bb5,\n    (q31_t)0x3bfa3c9f, (q31_t)0xc02064ab, (q31_t)0x3bedb212, (q31_t)0xc0213018,\n    (q31_t)0x3be127ac, (q31_t)0xc021fdfb, (q31_t)0x3bd49d70, (q31_t)0xc022ce54,\n    (q31_t)0x3bc8135c, (q31_t)0xc023a124, (q31_t)0x3bbb8973, (q31_t)0xc024766a,\n    (q31_t)0x3baeffb3, (q31_t)0xc0254e27, (q31_t)0x3ba2761e, (q31_t)0xc0262859,\n    (q31_t)0x3b95ecb4, (q31_t)0xc0270502, (q31_t)0x3b896375, (q31_t)0xc027e421,\n    (q31_t)0x3b7cda63, (q31_t)0xc028c5b6, (q31_t)0x3b70517d, (q31_t)0xc029a9c1,\n    (q31_t)0x3b63c8c4, (q31_t)0xc02a9042, (q31_t)0x3b574039, (q31_t)0xc02b7939,\n    (q31_t)0x3b4ab7db, (q31_t)0xc02c64a6, (q31_t)0x3b3e2fac, (q31_t)0xc02d5289,\n    (q31_t)0x3b31a7ac, (q31_t)0xc02e42e2, (q31_t)0x3b251fdc, (q31_t)0xc02f35b1,\n    (q31_t)0x3b18983b, (q31_t)0xc0302af5, (q31_t)0x3b0c10cb, (q31_t)0xc03122b0,\n    (q31_t)0x3aff898c, (q31_t)0xc0321ce0, (q31_t)0x3af3027e, (q31_t)0xc0331986,\n    (q31_t)0x3ae67ba2, (q31_t)0xc03418a2, (q31_t)0x3ad9f4f8, (q31_t)0xc0351a33,\n    (q31_t)0x3acd6e81, (q31_t)0xc0361e3a, (q31_t)0x3ac0e83d, (q31_t)0xc03724b6,\n    (q31_t)0x3ab4622d, (q31_t)0xc0382da8, (q31_t)0x3aa7dc52, (q31_t)0xc0393910,\n    (q31_t)0x3a9b56ab, (q31_t)0xc03a46ed, (q31_t)0x3a8ed139, (q31_t)0xc03b573f,\n    (q31_t)0x3a824bfd, (q31_t)0xc03c6a07, (q31_t)0x3a75c6f8, (q31_t)0xc03d7f44,\n    (q31_t)0x3a694229, (q31_t)0xc03e96f6, (q31_t)0x3a5cbd91, (q31_t)0xc03fb11d,\n    (q31_t)0x3a503930, (q31_t)0xc040cdba, (q31_t)0x3a43b508, (q31_t)0xc041eccc,\n    (q31_t)0x3a373119, (q31_t)0xc0430e53, (q31_t)0x3a2aad62, (q31_t)0xc044324f,\n    (q31_t)0x3a1e29e5, (q31_t)0xc04558c0, (q31_t)0x3a11a6a3, (q31_t)0xc04681a6,\n    (q31_t)0x3a05239a, (q31_t)0xc047ad01, (q31_t)0x39f8a0cd, (q31_t)0xc048dad1,\n    (q31_t)0x39ec1e3b, (q31_t)0xc04a0b16, (q31_t)0x39df9be6, (q31_t)0xc04b3dcf,\n    (q31_t)0x39d319cc, (q31_t)0xc04c72fe, (q31_t)0x39c697f0, (q31_t)0xc04daaa1,\n    (q31_t)0x39ba1651, (q31_t)0xc04ee4b8, (q31_t)0x39ad94f0, (q31_t)0xc0502145,\n    (q31_t)0x39a113cd, (q31_t)0xc0516045, (q31_t)0x399492ea, (q31_t)0xc052a1bb,\n    (q31_t)0x39881245, (q31_t)0xc053e5a5, (q31_t)0x397b91e1, (q31_t)0xc0552c03,\n    (q31_t)0x396f11bc, (q31_t)0xc05674d6, (q31_t)0x396291d9, (q31_t)0xc057c01d,\n    (q31_t)0x39561237, (q31_t)0xc0590dd8, (q31_t)0x394992d7, (q31_t)0xc05a5e07,\n    (q31_t)0x393d13b8, (q31_t)0xc05bb0ab, (q31_t)0x393094dd, (q31_t)0xc05d05c3,\n    (q31_t)0x39241645, (q31_t)0xc05e5d4e, (q31_t)0x391797f0, (q31_t)0xc05fb74e,\n    (q31_t)0x390b19e0, (q31_t)0xc06113c2, (q31_t)0x38fe9c15, (q31_t)0xc06272aa,\n    (q31_t)0x38f21e8e, (q31_t)0xc063d405, (q31_t)0x38e5a14d, (q31_t)0xc06537d4,\n    (q31_t)0x38d92452, (q31_t)0xc0669e18, (q31_t)0x38cca79e, (q31_t)0xc06806ce,\n    (q31_t)0x38c02b31, (q31_t)0xc06971f9, (q31_t)0x38b3af0c, (q31_t)0xc06adf97,\n    (q31_t)0x38a7332e, (q31_t)0xc06c4fa8, (q31_t)0x389ab799, (q31_t)0xc06dc22e,\n    (q31_t)0x388e3c4d, (q31_t)0xc06f3726, (q31_t)0x3881c14b, (q31_t)0xc070ae92,\n    (q31_t)0x38754692, (q31_t)0xc0722871, (q31_t)0x3868cc24, (q31_t)0xc073a4c3,\n    (q31_t)0x385c5201, (q31_t)0xc0752389, (q31_t)0x384fd829, (q31_t)0xc076a4c2,\n    (q31_t)0x38435e9d, (q31_t)0xc078286e, (q31_t)0x3836e55d, (q31_t)0xc079ae8c,\n    (q31_t)0x382a6c6a, (q31_t)0xc07b371e, (q31_t)0x381df3c5, (q31_t)0xc07cc223,\n    (q31_t)0x38117b6d, (q31_t)0xc07e4f9b, (q31_t)0x38050364, (q31_t)0xc07fdf85,\n    (q31_t)0x37f88ba9, (q31_t)0xc08171e2, (q31_t)0x37ec143e, (q31_t)0xc08306b2,\n    (q31_t)0x37df9d22, (q31_t)0xc0849df4, (q31_t)0x37d32657, (q31_t)0xc08637a9,\n    (q31_t)0x37c6afdc, (q31_t)0xc087d3d0, (q31_t)0x37ba39b3, (q31_t)0xc089726a,\n    (q31_t)0x37adc3db, (q31_t)0xc08b1376, (q31_t)0x37a14e55, (q31_t)0xc08cb6f5,\n    (q31_t)0x3794d922, (q31_t)0xc08e5ce5, (q31_t)0x37886442, (q31_t)0xc0900548,\n    (q31_t)0x377befb5, (q31_t)0xc091b01d, (q31_t)0x376f7b7d, (q31_t)0xc0935d64,\n    (q31_t)0x37630799, (q31_t)0xc0950d1d, (q31_t)0x3756940a, (q31_t)0xc096bf48,\n    (q31_t)0x374a20d0, (q31_t)0xc09873e4, (q31_t)0x373daded, (q31_t)0xc09a2af3,\n    (q31_t)0x37313b60, (q31_t)0xc09be473, (q31_t)0x3724c92a, (q31_t)0xc09da065,\n    (q31_t)0x3718574b, (q31_t)0xc09f5ec8, (q31_t)0x370be5c4, (q31_t)0xc0a11f9d,\n    (q31_t)0x36ff7496, (q31_t)0xc0a2e2e3, (q31_t)0x36f303c0, (q31_t)0xc0a4a89b,\n    (q31_t)0x36e69344, (q31_t)0xc0a670c4, (q31_t)0x36da2321, (q31_t)0xc0a83b5e,\n    (q31_t)0x36cdb359, (q31_t)0xc0aa086a, (q31_t)0x36c143ec, (q31_t)0xc0abd7e6,\n    (q31_t)0x36b4d4d9, (q31_t)0xc0ada9d4, (q31_t)0x36a86623, (q31_t)0xc0af7e33,\n    (q31_t)0x369bf7c9, (q31_t)0xc0b15502, (q31_t)0x368f89cb, (q31_t)0xc0b32e42,\n    (q31_t)0x36831c2b, (q31_t)0xc0b509f3, (q31_t)0x3676aee8, (q31_t)0xc0b6e815,\n    (q31_t)0x366a4203, (q31_t)0xc0b8c8a7, (q31_t)0x365dd57d, (q31_t)0xc0baabaa,\n    (q31_t)0x36516956, (q31_t)0xc0bc911d, (q31_t)0x3644fd8f, (q31_t)0xc0be7901,\n    (q31_t)0x36389228, (q31_t)0xc0c06355, (q31_t)0x362c2721, (q31_t)0xc0c25019,\n    (q31_t)0x361fbc7b, (q31_t)0xc0c43f4d, (q31_t)0x36135237, (q31_t)0xc0c630f2,\n    (q31_t)0x3606e854, (q31_t)0xc0c82506, (q31_t)0x35fa7ed4, (q31_t)0xc0ca1b8a,\n    (q31_t)0x35ee15b7, (q31_t)0xc0cc147f, (q31_t)0x35e1acfd, (q31_t)0xc0ce0fe3,\n    (q31_t)0x35d544a7, (q31_t)0xc0d00db6, (q31_t)0x35c8dcb6, (q31_t)0xc0d20dfa,\n    (q31_t)0x35bc7529, (q31_t)0xc0d410ad, (q31_t)0x35b00e02, (q31_t)0xc0d615cf,\n    (q31_t)0x35a3a740, (q31_t)0xc0d81d61, (q31_t)0x359740e5, (q31_t)0xc0da2762,\n    (q31_t)0x358adaf0, (q31_t)0xc0dc33d2, (q31_t)0x357e7563, (q31_t)0xc0de42b2,\n    (q31_t)0x3572103d, (q31_t)0xc0e05401, (q31_t)0x3565ab80, (q31_t)0xc0e267be,\n    (q31_t)0x3559472b, (q31_t)0xc0e47deb, (q31_t)0x354ce33f, (q31_t)0xc0e69686,\n    (q31_t)0x35407fbd, (q31_t)0xc0e8b190, (q31_t)0x35341ca5, (q31_t)0xc0eacf09,\n    (q31_t)0x3527b9f7, (q31_t)0xc0eceef1, (q31_t)0x351b57b5, (q31_t)0xc0ef1147,\n    (q31_t)0x350ef5de, (q31_t)0xc0f1360b, (q31_t)0x35029473, (q31_t)0xc0f35d3e,\n    (q31_t)0x34f63374, (q31_t)0xc0f586df, (q31_t)0x34e9d2e3, (q31_t)0xc0f7b2ee,\n    (q31_t)0x34dd72be, (q31_t)0xc0f9e16b, (q31_t)0x34d11308, (q31_t)0xc0fc1257,\n    (q31_t)0x34c4b3c0, (q31_t)0xc0fe45b0, (q31_t)0x34b854e7, (q31_t)0xc1007b77,\n    (q31_t)0x34abf67e, (q31_t)0xc102b3ac, (q31_t)0x349f9884, (q31_t)0xc104ee4f,\n    (q31_t)0x34933afa, (q31_t)0xc1072b5f, (q31_t)0x3486dde1, (q31_t)0xc1096add,\n    (q31_t)0x347a8139, (q31_t)0xc10bacc8, (q31_t)0x346e2504, (q31_t)0xc10df120,\n    (q31_t)0x3461c940, (q31_t)0xc11037e6, (q31_t)0x34556def, (q31_t)0xc1128119,\n    (q31_t)0x34491311, (q31_t)0xc114ccb9, (q31_t)0x343cb8a7, (q31_t)0xc1171ac6,\n    (q31_t)0x34305eb0, (q31_t)0xc1196b3f, (q31_t)0x3424052f, (q31_t)0xc11bbe26,\n    (q31_t)0x3417ac22, (q31_t)0xc11e1379, (q31_t)0x340b538b, (q31_t)0xc1206b39,\n    (q31_t)0x33fefb6a, (q31_t)0xc122c566, (q31_t)0x33f2a3bf, (q31_t)0xc12521ff,\n    (q31_t)0x33e64c8c, (q31_t)0xc1278104, (q31_t)0x33d9f5cf, (q31_t)0xc129e276,\n    (q31_t)0x33cd9f8b, (q31_t)0xc12c4653, (q31_t)0x33c149bf, (q31_t)0xc12eac9d,\n    (q31_t)0x33b4f46c, (q31_t)0xc1311553, (q31_t)0x33a89f92, (q31_t)0xc1338075,\n    (q31_t)0x339c4b32, (q31_t)0xc135ee02, (q31_t)0x338ff74d, (q31_t)0xc1385dfb,\n    (q31_t)0x3383a3e2, (q31_t)0xc13ad060, (q31_t)0x337750f2, (q31_t)0xc13d4530,\n    (q31_t)0x336afe7e, (q31_t)0xc13fbc6c, (q31_t)0x335eac86, (q31_t)0xc1423613,\n    (q31_t)0x33525b0b, (q31_t)0xc144b225, (q31_t)0x33460a0d, (q31_t)0xc14730a3,\n    (q31_t)0x3339b98d, (q31_t)0xc149b18b, (q31_t)0x332d698a, (q31_t)0xc14c34df,\n    (q31_t)0x33211a07, (q31_t)0xc14eba9d, (q31_t)0x3314cb02, (q31_t)0xc15142c6,\n    (q31_t)0x33087c7d, (q31_t)0xc153cd5a, (q31_t)0x32fc2e77, (q31_t)0xc1565a58,\n    (q31_t)0x32efe0f2, (q31_t)0xc158e9c1, (q31_t)0x32e393ef, (q31_t)0xc15b7b94,\n    (q31_t)0x32d7476c, (q31_t)0xc15e0fd1, (q31_t)0x32cafb6b, (q31_t)0xc160a678,\n    (q31_t)0x32beafed, (q31_t)0xc1633f8a, (q31_t)0x32b264f2, (q31_t)0xc165db05,\n    (q31_t)0x32a61a7a, (q31_t)0xc16878eb, (q31_t)0x3299d085, (q31_t)0xc16b193a,\n    (q31_t)0x328d8715, (q31_t)0xc16dbbf3, (q31_t)0x32813e2a, (q31_t)0xc1706115,\n    (q31_t)0x3274f5c3, (q31_t)0xc17308a1, (q31_t)0x3268ade3, (q31_t)0xc175b296,\n    (q31_t)0x325c6688, (q31_t)0xc1785ef4, (q31_t)0x32501fb5, (q31_t)0xc17b0dbb,\n    (q31_t)0x3243d968, (q31_t)0xc17dbeec, (q31_t)0x323793a3, (q31_t)0xc1807285,\n    (q31_t)0x322b4e66, (q31_t)0xc1832888, (q31_t)0x321f09b1, (q31_t)0xc185e0f3,\n    (q31_t)0x3212c585, (q31_t)0xc1889bc6, (q31_t)0x320681e3, (q31_t)0xc18b5903,\n    (q31_t)0x31fa3ecb, (q31_t)0xc18e18a7, (q31_t)0x31edfc3d, (q31_t)0xc190dab4,\n    (q31_t)0x31e1ba3a, (q31_t)0xc1939f29, (q31_t)0x31d578c2, (q31_t)0xc1966606,\n    (q31_t)0x31c937d6, (q31_t)0xc1992f4c, (q31_t)0x31bcf777, (q31_t)0xc19bfaf9,\n    (q31_t)0x31b0b7a4, (q31_t)0xc19ec90d, (q31_t)0x31a4785e, (q31_t)0xc1a1998a,\n    (q31_t)0x319839a6, (q31_t)0xc1a46c6e, (q31_t)0x318bfb7d, (q31_t)0xc1a741b9,\n    (q31_t)0x317fbde2, (q31_t)0xc1aa196c, (q31_t)0x317380d6, (q31_t)0xc1acf386,\n    (q31_t)0x31674459, (q31_t)0xc1afd007, (q31_t)0x315b086d, (q31_t)0xc1b2aef0,\n    (q31_t)0x314ecd11, (q31_t)0xc1b5903f, (q31_t)0x31429247, (q31_t)0xc1b873f5,\n    (q31_t)0x3136580d, (q31_t)0xc1bb5a11, (q31_t)0x312a1e66, (q31_t)0xc1be4294,\n    (q31_t)0x311de551, (q31_t)0xc1c12d7e, (q31_t)0x3111accf, (q31_t)0xc1c41ace,\n    (q31_t)0x310574e0, (q31_t)0xc1c70a84, (q31_t)0x30f93d86, (q31_t)0xc1c9fca0,\n    (q31_t)0x30ed06bf, (q31_t)0xc1ccf122, (q31_t)0x30e0d08d, (q31_t)0xc1cfe80a,\n    (q31_t)0x30d49af1, (q31_t)0xc1d2e158, (q31_t)0x30c865ea, (q31_t)0xc1d5dd0c,\n    (q31_t)0x30bc317a, (q31_t)0xc1d8db25, (q31_t)0x30affda0, (q31_t)0xc1dbdba3,\n    (q31_t)0x30a3ca5d, (q31_t)0xc1dede87, (q31_t)0x309797b2, (q31_t)0xc1e1e3d0,\n    (q31_t)0x308b659f, (q31_t)0xc1e4eb7e, (q31_t)0x307f3424, (q31_t)0xc1e7f591,\n    (q31_t)0x30730342, (q31_t)0xc1eb0209, (q31_t)0x3066d2fa, (q31_t)0xc1ee10e5,\n    (q31_t)0x305aa34c, (q31_t)0xc1f12227, (q31_t)0x304e7438, (q31_t)0xc1f435cc,\n    (q31_t)0x304245c0, (q31_t)0xc1f74bd6, (q31_t)0x303617e2, (q31_t)0xc1fa6445,\n    (q31_t)0x3029eaa1, (q31_t)0xc1fd7f17, (q31_t)0x301dbdfb, (q31_t)0xc2009c4e,\n    (q31_t)0x301191f3, (q31_t)0xc203bbe8, (q31_t)0x30056687, (q31_t)0xc206dde6,\n    (q31_t)0x2ff93bba, (q31_t)0xc20a0248, (q31_t)0x2fed118a, (q31_t)0xc20d290d,\n    (q31_t)0x2fe0e7f9, (q31_t)0xc2105236, (q31_t)0x2fd4bf08, (q31_t)0xc2137dc2,\n    (q31_t)0x2fc896b5, (q31_t)0xc216abb1, (q31_t)0x2fbc6f03, (q31_t)0xc219dc03,\n    (q31_t)0x2fb047f2, (q31_t)0xc21d0eb8, (q31_t)0x2fa42181, (q31_t)0xc22043d0,\n    (q31_t)0x2f97fbb2, (q31_t)0xc2237b4b, (q31_t)0x2f8bd685, (q31_t)0xc226b528,\n    (q31_t)0x2f7fb1fa, (q31_t)0xc229f167, (q31_t)0x2f738e12, (q31_t)0xc22d3009,\n    (q31_t)0x2f676ace, (q31_t)0xc230710d, (q31_t)0x2f5b482d, (q31_t)0xc233b473,\n    (q31_t)0x2f4f2630, (q31_t)0xc236fa3b, (q31_t)0x2f4304d8, (q31_t)0xc23a4265,\n    (q31_t)0x2f36e426, (q31_t)0xc23d8cf1, (q31_t)0x2f2ac419, (q31_t)0xc240d9de,\n    (q31_t)0x2f1ea4b2, (q31_t)0xc244292c, (q31_t)0x2f1285f2, (q31_t)0xc2477adc,\n    (q31_t)0x2f0667d9, (q31_t)0xc24aceed, (q31_t)0x2efa4a67, (q31_t)0xc24e255e,\n    (q31_t)0x2eee2d9d, (q31_t)0xc2517e31, (q31_t)0x2ee2117c, (q31_t)0xc254d965,\n    (q31_t)0x2ed5f604, (q31_t)0xc25836f9, (q31_t)0x2ec9db35, (q31_t)0xc25b96ee,\n    (q31_t)0x2ebdc110, (q31_t)0xc25ef943, (q31_t)0x2eb1a796, (q31_t)0xc2625df8,\n    (q31_t)0x2ea58ec6, (q31_t)0xc265c50e, (q31_t)0x2e9976a1, (q31_t)0xc2692e83,\n    (q31_t)0x2e8d5f29, (q31_t)0xc26c9a58, (q31_t)0x2e81485c, (q31_t)0xc270088e,\n    (q31_t)0x2e75323c, (q31_t)0xc2737922, (q31_t)0x2e691cc9, (q31_t)0xc276ec16,\n    (q31_t)0x2e5d0804, (q31_t)0xc27a616a, (q31_t)0x2e50f3ed, (q31_t)0xc27dd91c,\n    (q31_t)0x2e44e084, (q31_t)0xc281532e, (q31_t)0x2e38cdcb, (q31_t)0xc284cf9f,\n    (q31_t)0x2e2cbbc1, (q31_t)0xc2884e6e, (q31_t)0x2e20aa67, (q31_t)0xc28bcf9c,\n    (q31_t)0x2e1499bd, (q31_t)0xc28f5329, (q31_t)0x2e0889c4, (q31_t)0xc292d914,\n    (q31_t)0x2dfc7a7c, (q31_t)0xc296615d, (q31_t)0x2df06be6, (q31_t)0xc299ec05,\n    (q31_t)0x2de45e03, (q31_t)0xc29d790a, (q31_t)0x2dd850d2, (q31_t)0xc2a1086d,\n    (q31_t)0x2dcc4454, (q31_t)0xc2a49a2e, (q31_t)0x2dc0388a, (q31_t)0xc2a82e4d,\n    (q31_t)0x2db42d74, (q31_t)0xc2abc4c9, (q31_t)0x2da82313, (q31_t)0xc2af5da2,\n    (q31_t)0x2d9c1967, (q31_t)0xc2b2f8d8, (q31_t)0x2d901070, (q31_t)0xc2b6966c,\n    (q31_t)0x2d84082f, (q31_t)0xc2ba365c, (q31_t)0x2d7800a5, (q31_t)0xc2bdd8a9,\n    (q31_t)0x2d6bf9d1, (q31_t)0xc2c17d52, (q31_t)0x2d5ff3b5, (q31_t)0xc2c52459,\n    (q31_t)0x2d53ee51, (q31_t)0xc2c8cdbb, (q31_t)0x2d47e9a5, (q31_t)0xc2cc7979,\n    (q31_t)0x2d3be5b1, (q31_t)0xc2d02794, (q31_t)0x2d2fe277, (q31_t)0xc2d3d80a,\n    (q31_t)0x2d23dff7, (q31_t)0xc2d78add, (q31_t)0x2d17de31, (q31_t)0xc2db400a,\n    (q31_t)0x2d0bdd25, (q31_t)0xc2def794, (q31_t)0x2cffdcd4, (q31_t)0xc2e2b178,\n    (q31_t)0x2cf3dd3f, (q31_t)0xc2e66db8, (q31_t)0x2ce7de66, (q31_t)0xc2ea2c53,\n    (q31_t)0x2cdbe04a, (q31_t)0xc2eded49, (q31_t)0x2ccfe2ea, (q31_t)0xc2f1b099,\n    (q31_t)0x2cc3e648, (q31_t)0xc2f57644, (q31_t)0x2cb7ea63, (q31_t)0xc2f93e4a,\n    (q31_t)0x2cabef3d, (q31_t)0xc2fd08a9, (q31_t)0x2c9ff4d6, (q31_t)0xc300d563,\n    (q31_t)0x2c93fb2e, (q31_t)0xc304a477, (q31_t)0x2c880245, (q31_t)0xc30875e5,\n    (q31_t)0x2c7c0a1d, (q31_t)0xc30c49ad, (q31_t)0x2c7012b5, (q31_t)0xc3101fce,\n    (q31_t)0x2c641c0e, (q31_t)0xc313f848, (q31_t)0x2c582629, (q31_t)0xc317d31c,\n    (q31_t)0x2c4c3106, (q31_t)0xc31bb049, (q31_t)0x2c403ca5, (q31_t)0xc31f8fcf,\n    (q31_t)0x2c344908, (q31_t)0xc32371ae, (q31_t)0x2c28562d, (q31_t)0xc32755e5,\n    (q31_t)0x2c1c6417, (q31_t)0xc32b3c75, (q31_t)0x2c1072c4, (q31_t)0xc32f255e,\n    (q31_t)0x2c048237, (q31_t)0xc333109e, (q31_t)0x2bf8926f, (q31_t)0xc336fe37,\n    (q31_t)0x2beca36c, (q31_t)0xc33aee27, (q31_t)0x2be0b52f, (q31_t)0xc33ee070,\n    (q31_t)0x2bd4c7ba, (q31_t)0xc342d510, (q31_t)0x2bc8db0b, (q31_t)0xc346cc07,\n    (q31_t)0x2bbcef23, (q31_t)0xc34ac556, (q31_t)0x2bb10404, (q31_t)0xc34ec0fc,\n    (q31_t)0x2ba519ad, (q31_t)0xc352bef9, (q31_t)0x2b99301f, (q31_t)0xc356bf4d,\n    (q31_t)0x2b8d475b, (q31_t)0xc35ac1f7, (q31_t)0x2b815f60, (q31_t)0xc35ec6f8,\n    (q31_t)0x2b75782f, (q31_t)0xc362ce50, (q31_t)0x2b6991ca, (q31_t)0xc366d7fd,\n    (q31_t)0x2b5dac2f, (q31_t)0xc36ae401, (q31_t)0x2b51c760, (q31_t)0xc36ef25b,\n    (q31_t)0x2b45e35d, (q31_t)0xc373030a, (q31_t)0x2b3a0027, (q31_t)0xc377160f,\n    (q31_t)0x2b2e1dbe, (q31_t)0xc37b2b6a, (q31_t)0x2b223c22, (q31_t)0xc37f4319,\n    (q31_t)0x2b165b54, (q31_t)0xc3835d1e, (q31_t)0x2b0a7b54, (q31_t)0xc3877978,\n    (q31_t)0x2afe9c24, (q31_t)0xc38b9827, (q31_t)0x2af2bdc3, (q31_t)0xc38fb92a,\n    (q31_t)0x2ae6e031, (q31_t)0xc393dc82, (q31_t)0x2adb0370, (q31_t)0xc398022f,\n    (q31_t)0x2acf277f, (q31_t)0xc39c2a2f, (q31_t)0x2ac34c60, (q31_t)0xc3a05484,\n    (q31_t)0x2ab77212, (q31_t)0xc3a4812c, (q31_t)0x2aab9896, (q31_t)0xc3a8b028,\n    (q31_t)0x2a9fbfed, (q31_t)0xc3ace178, (q31_t)0x2a93e817, (q31_t)0xc3b1151b,\n    (q31_t)0x2a881114, (q31_t)0xc3b54b11, (q31_t)0x2a7c3ae5, (q31_t)0xc3b9835a,\n    (q31_t)0x2a70658a, (q31_t)0xc3bdbdf6, (q31_t)0x2a649105, (q31_t)0xc3c1fae5,\n    (q31_t)0x2a58bd54, (q31_t)0xc3c63a26, (q31_t)0x2a4cea79, (q31_t)0xc3ca7bba,\n    (q31_t)0x2a411874, (q31_t)0xc3cebfa0, (q31_t)0x2a354746, (q31_t)0xc3d305d8,\n    (q31_t)0x2a2976ef, (q31_t)0xc3d74e62, (q31_t)0x2a1da770, (q31_t)0xc3db993e,\n    (q31_t)0x2a11d8c8, (q31_t)0xc3dfe66c, (q31_t)0x2a060af9, (q31_t)0xc3e435ea,\n    (q31_t)0x29fa3e03, (q31_t)0xc3e887bb, (q31_t)0x29ee71e6, (q31_t)0xc3ecdbdc,\n    (q31_t)0x29e2a6a3, (q31_t)0xc3f1324e, (q31_t)0x29d6dc3b, (q31_t)0xc3f58b10,\n    (q31_t)0x29cb12ad, (q31_t)0xc3f9e624, (q31_t)0x29bf49fa, (q31_t)0xc3fe4388,\n    (q31_t)0x29b38223, (q31_t)0xc402a33c, (q31_t)0x29a7bb28, (q31_t)0xc4070540,\n    (q31_t)0x299bf509, (q31_t)0xc40b6994, (q31_t)0x29902fc7, (q31_t)0xc40fd037,\n    (q31_t)0x29846b63, (q31_t)0xc414392b, (q31_t)0x2978a7dd, (q31_t)0xc418a46d,\n    (q31_t)0x296ce535, (q31_t)0xc41d11ff, (q31_t)0x2961236c, (q31_t)0xc42181e0,\n    (q31_t)0x29556282, (q31_t)0xc425f410, (q31_t)0x2949a278, (q31_t)0xc42a688f,\n    (q31_t)0x293de34e, (q31_t)0xc42edf5c, (q31_t)0x29322505, (q31_t)0xc4335877,\n    (q31_t)0x2926679c, (q31_t)0xc437d3e1, (q31_t)0x291aab16, (q31_t)0xc43c5199,\n    (q31_t)0x290eef71, (q31_t)0xc440d19e, (q31_t)0x290334af, (q31_t)0xc44553f2,\n    (q31_t)0x28f77acf, (q31_t)0xc449d892, (q31_t)0x28ebc1d3, (q31_t)0xc44e5f80,\n    (q31_t)0x28e009ba, (q31_t)0xc452e8bc, (q31_t)0x28d45286, (q31_t)0xc4577444,\n    (q31_t)0x28c89c37, (q31_t)0xc45c0219, (q31_t)0x28bce6cd, (q31_t)0xc460923b,\n    (q31_t)0x28b13248, (q31_t)0xc46524a9, (q31_t)0x28a57ea9, (q31_t)0xc469b963,\n    (q31_t)0x2899cbf1, (q31_t)0xc46e5069, (q31_t)0x288e1a20, (q31_t)0xc472e9bc,\n    (q31_t)0x28826936, (q31_t)0xc477855a, (q31_t)0x2876b934, (q31_t)0xc47c2344,\n    (q31_t)0x286b0a1a, (q31_t)0xc480c379, (q31_t)0x285f5be9, (q31_t)0xc48565f9,\n    (q31_t)0x2853aea1, (q31_t)0xc48a0ac4, (q31_t)0x28480243, (q31_t)0xc48eb1db,\n    (q31_t)0x283c56cf, (q31_t)0xc4935b3c, (q31_t)0x2830ac45, (q31_t)0xc49806e7,\n    (q31_t)0x282502a7, (q31_t)0xc49cb4dd, (q31_t)0x281959f4, (q31_t)0xc4a1651c,\n    (q31_t)0x280db22d, (q31_t)0xc4a617a6, (q31_t)0x28020b52, (q31_t)0xc4aacc7a,\n    (q31_t)0x27f66564, (q31_t)0xc4af8397, (q31_t)0x27eac063, (q31_t)0xc4b43cfd,\n    (q31_t)0x27df1c50, (q31_t)0xc4b8f8ad, (q31_t)0x27d3792b, (q31_t)0xc4bdb6a6,\n    (q31_t)0x27c7d6f4, (q31_t)0xc4c276e8, (q31_t)0x27bc35ad, (q31_t)0xc4c73972,\n    (q31_t)0x27b09555, (q31_t)0xc4cbfe45, (q31_t)0x27a4f5ed, (q31_t)0xc4d0c560,\n    (q31_t)0x27995776, (q31_t)0xc4d58ec3, (q31_t)0x278db9ef, (q31_t)0xc4da5a6f,\n    (q31_t)0x27821d59, (q31_t)0xc4df2862, (q31_t)0x277681b6, (q31_t)0xc4e3f89c,\n    (q31_t)0x276ae704, (q31_t)0xc4e8cb1e, (q31_t)0x275f4d45, (q31_t)0xc4ed9fe7,\n    (q31_t)0x2753b479, (q31_t)0xc4f276f7, (q31_t)0x27481ca1, (q31_t)0xc4f7504e,\n    (q31_t)0x273c85bc, (q31_t)0xc4fc2bec, (q31_t)0x2730efcc, (q31_t)0xc50109d0,\n    (q31_t)0x27255ad1, (q31_t)0xc505e9fb, (q31_t)0x2719c6cb, (q31_t)0xc50acc6b,\n    (q31_t)0x270e33bb, (q31_t)0xc50fb121, (q31_t)0x2702a1a1, (q31_t)0xc514981d,\n    (q31_t)0x26f7107e, (q31_t)0xc519815f, (q31_t)0x26eb8052, (q31_t)0xc51e6ce6,\n    (q31_t)0x26dff11d, (q31_t)0xc5235ab2, (q31_t)0x26d462e1, (q31_t)0xc5284ac3,\n    (q31_t)0x26c8d59c, (q31_t)0xc52d3d18, (q31_t)0x26bd4951, (q31_t)0xc53231b3,\n    (q31_t)0x26b1bdff, (q31_t)0xc5372891, (q31_t)0x26a633a6, (q31_t)0xc53c21b4,\n    (q31_t)0x269aaa48, (q31_t)0xc5411d1b, (q31_t)0x268f21e5, (q31_t)0xc5461ac6,\n    (q31_t)0x26839a7c, (q31_t)0xc54b1ab4, (q31_t)0x26781410, (q31_t)0xc5501ce5,\n    (q31_t)0x266c8e9f, (q31_t)0xc555215a, (q31_t)0x26610a2a, (q31_t)0xc55a2812,\n    (q31_t)0x265586b3, (q31_t)0xc55f310d, (q31_t)0x264a0438, (q31_t)0xc5643c4a,\n    (q31_t)0x263e82bc, (q31_t)0xc56949ca, (q31_t)0x2633023e, (q31_t)0xc56e598c,\n    (q31_t)0x262782be, (q31_t)0xc5736b90, (q31_t)0x261c043d, (q31_t)0xc5787fd6,\n    (q31_t)0x261086bc, (q31_t)0xc57d965d, (q31_t)0x26050a3b, (q31_t)0xc582af26,\n    (q31_t)0x25f98ebb, (q31_t)0xc587ca31, (q31_t)0x25ee143b, (q31_t)0xc58ce77c,\n    (q31_t)0x25e29abc, (q31_t)0xc5920708, (q31_t)0x25d72240, (q31_t)0xc59728d5,\n    (q31_t)0x25cbaac5, (q31_t)0xc59c4ce3, (q31_t)0x25c0344d, (q31_t)0xc5a17330,\n    (q31_t)0x25b4bed8, (q31_t)0xc5a69bbe, (q31_t)0x25a94a67, (q31_t)0xc5abc68c,\n    (q31_t)0x259dd6f9, (q31_t)0xc5b0f399, (q31_t)0x25926490, (q31_t)0xc5b622e6,\n    (q31_t)0x2586f32c, (q31_t)0xc5bb5472, (q31_t)0x257b82cd, (q31_t)0xc5c0883d,\n    (q31_t)0x25701374, (q31_t)0xc5c5be47, (q31_t)0x2564a521, (q31_t)0xc5caf690,\n    (q31_t)0x255937d5, (q31_t)0xc5d03118, (q31_t)0x254dcb8f, (q31_t)0xc5d56ddd,\n    (q31_t)0x25426051, (q31_t)0xc5daace1, (q31_t)0x2536f61b, (q31_t)0xc5dfee22,\n    (q31_t)0x252b8cee, (q31_t)0xc5e531a1, (q31_t)0x252024c9, (q31_t)0xc5ea775e,\n    (q31_t)0x2514bdad, (q31_t)0xc5efbf58, (q31_t)0x2509579b, (q31_t)0xc5f5098f,\n    (q31_t)0x24fdf294, (q31_t)0xc5fa5603, (q31_t)0x24f28e96, (q31_t)0xc5ffa4b3,\n    (q31_t)0x24e72ba4, (q31_t)0xc604f5a0, (q31_t)0x24dbc9bd, (q31_t)0xc60a48c9,\n    (q31_t)0x24d068e2, (q31_t)0xc60f9e2e, (q31_t)0x24c50914, (q31_t)0xc614f5cf,\n    (q31_t)0x24b9aa52, (q31_t)0xc61a4fac, (q31_t)0x24ae4c9d, (q31_t)0xc61fabc4,\n    (q31_t)0x24a2eff6, (q31_t)0xc6250a18, (q31_t)0x2497945d, (q31_t)0xc62a6aa6,\n    (q31_t)0x248c39d3, (q31_t)0xc62fcd6f, (q31_t)0x2480e057, (q31_t)0xc6353273,\n    (q31_t)0x247587eb, (q31_t)0xc63a99b1, (q31_t)0x246a308f, (q31_t)0xc6400329,\n    (q31_t)0x245eda43, (q31_t)0xc6456edb, (q31_t)0x24538507, (q31_t)0xc64adcc7,\n    (q31_t)0x244830dd, (q31_t)0xc6504ced, (q31_t)0x243cddc4, (q31_t)0xc655bf4c,\n    (q31_t)0x24318bbe, (q31_t)0xc65b33e4, (q31_t)0x24263ac9, (q31_t)0xc660aab5,\n    (q31_t)0x241aeae8, (q31_t)0xc66623be, (q31_t)0x240f9c1a, (q31_t)0xc66b9f01,\n    (q31_t)0x24044e60, (q31_t)0xc6711c7b, (q31_t)0x23f901ba, (q31_t)0xc6769c2e,\n    (q31_t)0x23edb628, (q31_t)0xc67c1e18, (q31_t)0x23e26bac, (q31_t)0xc681a23a,\n    (q31_t)0x23d72245, (q31_t)0xc6872894, (q31_t)0x23cbd9f4, (q31_t)0xc68cb124,\n    (q31_t)0x23c092b9, (q31_t)0xc6923bec, (q31_t)0x23b54c95, (q31_t)0xc697c8eb,\n    (q31_t)0x23aa0788, (q31_t)0xc69d5820, (q31_t)0x239ec393, (q31_t)0xc6a2e98b,\n    (q31_t)0x239380b6, (q31_t)0xc6a87d2d, (q31_t)0x23883ef2, (q31_t)0xc6ae1304,\n    (q31_t)0x237cfe47, (q31_t)0xc6b3ab12, (q31_t)0x2371beb5, (q31_t)0xc6b94554,\n    (q31_t)0x2366803c, (q31_t)0xc6bee1cd, (q31_t)0x235b42df, (q31_t)0xc6c4807a,\n    (q31_t)0x2350069b, (q31_t)0xc6ca215c, (q31_t)0x2344cb73, (q31_t)0xc6cfc472,\n    (q31_t)0x23399167, (q31_t)0xc6d569be, (q31_t)0x232e5876, (q31_t)0xc6db113d,\n    (q31_t)0x232320a2, (q31_t)0xc6e0baf0, (q31_t)0x2317e9eb, (q31_t)0xc6e666d7,\n    (q31_t)0x230cb451, (q31_t)0xc6ec14f2, (q31_t)0x23017fd5, (q31_t)0xc6f1c540,\n    (q31_t)0x22f64c77, (q31_t)0xc6f777c1, (q31_t)0x22eb1a37, (q31_t)0xc6fd2c75,\n    (q31_t)0x22dfe917, (q31_t)0xc702e35c, (q31_t)0x22d4b916, (q31_t)0xc7089c75,\n    (q31_t)0x22c98a35, (q31_t)0xc70e57c0, (q31_t)0x22be5c74, (q31_t)0xc714153e,\n    (q31_t)0x22b32fd4, (q31_t)0xc719d4ed, (q31_t)0x22a80456, (q31_t)0xc71f96ce,\n    (q31_t)0x229cd9f8, (q31_t)0xc7255ae0, (q31_t)0x2291b0bd, (q31_t)0xc72b2123,\n    (q31_t)0x228688a4, (q31_t)0xc730e997, (q31_t)0x227b61af, (q31_t)0xc736b43c,\n    (q31_t)0x22703bdc, (q31_t)0xc73c8111, (q31_t)0x2265172e, (q31_t)0xc7425016,\n    (q31_t)0x2259f3a3, (q31_t)0xc748214c, (q31_t)0x224ed13d, (q31_t)0xc74df4b1,\n    (q31_t)0x2243affc, (q31_t)0xc753ca46, (q31_t)0x22388fe1, (q31_t)0xc759a20a,\n    (q31_t)0x222d70eb, (q31_t)0xc75f7bfe, (q31_t)0x2222531c, (q31_t)0xc7655820,\n    (q31_t)0x22173674, (q31_t)0xc76b3671, (q31_t)0x220c1af3, (q31_t)0xc77116f0,\n    (q31_t)0x22010099, (q31_t)0xc776f99d, (q31_t)0x21f5e768, (q31_t)0xc77cde79,\n    (q31_t)0x21eacf5f, (q31_t)0xc782c582, (q31_t)0x21dfb87f, (q31_t)0xc788aeb9,\n    (q31_t)0x21d4a2c8, (q31_t)0xc78e9a1d, (q31_t)0x21c98e3b, (q31_t)0xc79487ae,\n    (q31_t)0x21be7ad8, (q31_t)0xc79a776c, (q31_t)0x21b368a0, (q31_t)0xc7a06957,\n    (q31_t)0x21a85793, (q31_t)0xc7a65d6e, (q31_t)0x219d47b1, (q31_t)0xc7ac53b1,\n    (q31_t)0x219238fb, (q31_t)0xc7b24c20, (q31_t)0x21872b72, (q31_t)0xc7b846ba,\n    (q31_t)0x217c1f15, (q31_t)0xc7be4381, (q31_t)0x217113e5, (q31_t)0xc7c44272,\n    (q31_t)0x216609e3, (q31_t)0xc7ca438f, (q31_t)0x215b0110, (q31_t)0xc7d046d6,\n    (q31_t)0x214ff96a, (q31_t)0xc7d64c47, (q31_t)0x2144f2f3, (q31_t)0xc7dc53e3,\n    (q31_t)0x2139edac, (q31_t)0xc7e25daa, (q31_t)0x212ee995, (q31_t)0xc7e8699a,\n    (q31_t)0x2123e6ad, (q31_t)0xc7ee77b3, (q31_t)0x2118e4f6, (q31_t)0xc7f487f6,\n    (q31_t)0x210de470, (q31_t)0xc7fa9a62, (q31_t)0x2102e51c, (q31_t)0xc800aef7,\n    (q31_t)0x20f7e6f9, (q31_t)0xc806c5b5, (q31_t)0x20ecea09, (q31_t)0xc80cde9b,\n    (q31_t)0x20e1ee4b, (q31_t)0xc812f9a9, (q31_t)0x20d6f3c1, (q31_t)0xc81916df,\n    (q31_t)0x20cbfa6a, (q31_t)0xc81f363d, (q31_t)0x20c10247, (q31_t)0xc82557c3,\n    (q31_t)0x20b60b58, (q31_t)0xc82b7b70, (q31_t)0x20ab159e, (q31_t)0xc831a143,\n    (q31_t)0x20a0211a, (q31_t)0xc837c93e, (q31_t)0x20952dcb, (q31_t)0xc83df35f,\n    (q31_t)0x208a3bb2, (q31_t)0xc8441fa6, (q31_t)0x207f4acf, (q31_t)0xc84a4e14,\n    (q31_t)0x20745b24, (q31_t)0xc8507ea7, (q31_t)0x20696cb0, (q31_t)0xc856b160,\n    (q31_t)0x205e7f74, (q31_t)0xc85ce63e, (q31_t)0x2053936f, (q31_t)0xc8631d42,\n    (q31_t)0x2048a8a4, (q31_t)0xc869566a, (q31_t)0x203dbf11, (q31_t)0xc86f91b7,\n    (q31_t)0x2032d6b8, (q31_t)0xc875cf28, (q31_t)0x2027ef99, (q31_t)0xc87c0ebd,\n    (q31_t)0x201d09b4, (q31_t)0xc8825077, (q31_t)0x2012250a, (q31_t)0xc8889454,\n    (q31_t)0x2007419b, (q31_t)0xc88eda54, (q31_t)0x1ffc5f67, (q31_t)0xc8952278,\n    (q31_t)0x1ff17e70, (q31_t)0xc89b6cbf, (q31_t)0x1fe69eb4, (q31_t)0xc8a1b928,\n    (q31_t)0x1fdbc036, (q31_t)0xc8a807b4, (q31_t)0x1fd0e2f5, (q31_t)0xc8ae5862,\n    (q31_t)0x1fc606f1, (q31_t)0xc8b4ab32, (q31_t)0x1fbb2c2c, (q31_t)0xc8bb0023,\n    (q31_t)0x1fb052a5, (q31_t)0xc8c15736, (q31_t)0x1fa57a5d, (q31_t)0xc8c7b06b,\n    (q31_t)0x1f9aa354, (q31_t)0xc8ce0bc0, (q31_t)0x1f8fcd8b, (q31_t)0xc8d46936,\n    (q31_t)0x1f84f902, (q31_t)0xc8dac8cd, (q31_t)0x1f7a25ba, (q31_t)0xc8e12a84,\n    (q31_t)0x1f6f53b3, (q31_t)0xc8e78e5b, (q31_t)0x1f6482ed, (q31_t)0xc8edf452,\n    (q31_t)0x1f59b369, (q31_t)0xc8f45c68, (q31_t)0x1f4ee527, (q31_t)0xc8fac69e,\n    (q31_t)0x1f441828, (q31_t)0xc90132f2, (q31_t)0x1f394c6b, (q31_t)0xc907a166,\n    (q31_t)0x1f2e81f3, (q31_t)0xc90e11f7, (q31_t)0x1f23b8be, (q31_t)0xc91484a8,\n    (q31_t)0x1f18f0ce, (q31_t)0xc91af976, (q31_t)0x1f0e2a22, (q31_t)0xc9217062,\n    (q31_t)0x1f0364bc, (q31_t)0xc927e96b, (q31_t)0x1ef8a09b, (q31_t)0xc92e6492,\n    (q31_t)0x1eedddc0, (q31_t)0xc934e1d6, (q31_t)0x1ee31c2b, (q31_t)0xc93b6137,\n    (q31_t)0x1ed85bdd, (q31_t)0xc941e2b4, (q31_t)0x1ecd9cd7, (q31_t)0xc948664d,\n    (q31_t)0x1ec2df18, (q31_t)0xc94eec03, (q31_t)0x1eb822a1, (q31_t)0xc95573d4,\n    (q31_t)0x1ead6773, (q31_t)0xc95bfdc1, (q31_t)0x1ea2ad8d, (q31_t)0xc96289c9,\n    (q31_t)0x1e97f4f1, (q31_t)0xc96917ec, (q31_t)0x1e8d3d9e, (q31_t)0xc96fa82a,\n    (q31_t)0x1e828796, (q31_t)0xc9763a83, (q31_t)0x1e77d2d8, (q31_t)0xc97ccef5,\n    (q31_t)0x1e6d1f65, (q31_t)0xc9836582, (q31_t)0x1e626d3e, (q31_t)0xc989fe29,\n    (q31_t)0x1e57bc62, (q31_t)0xc99098e9, (q31_t)0x1e4d0cd2, (q31_t)0xc99735c2,\n    (q31_t)0x1e425e8f, (q31_t)0xc99dd4b4, (q31_t)0x1e37b199, (q31_t)0xc9a475bf,\n    (q31_t)0x1e2d05f1, (q31_t)0xc9ab18e3, (q31_t)0x1e225b96, (q31_t)0xc9b1be1e,\n    (q31_t)0x1e17b28a, (q31_t)0xc9b86572, (q31_t)0x1e0d0acc, (q31_t)0xc9bf0edd,\n    (q31_t)0x1e02645d, (q31_t)0xc9c5ba60, (q31_t)0x1df7bf3e, (q31_t)0xc9cc67fa,\n    (q31_t)0x1ded1b6e, (q31_t)0xc9d317ab, (q31_t)0x1de278ef, (q31_t)0xc9d9c973,\n    (q31_t)0x1dd7d7c1, (q31_t)0xc9e07d51, (q31_t)0x1dcd37e4, (q31_t)0xc9e73346,\n    (q31_t)0x1dc29958, (q31_t)0xc9edeb50, (q31_t)0x1db7fc1e, (q31_t)0xc9f4a570,\n    (q31_t)0x1dad6036, (q31_t)0xc9fb61a5, (q31_t)0x1da2c5a2, (q31_t)0xca021fef,\n    (q31_t)0x1d982c60, (q31_t)0xca08e04f, (q31_t)0x1d8d9472, (q31_t)0xca0fa2c3,\n    (q31_t)0x1d82fdd8, (q31_t)0xca16674b, (q31_t)0x1d786892, (q31_t)0xca1d2de7,\n    (q31_t)0x1d6dd4a2, (q31_t)0xca23f698, (q31_t)0x1d634206, (q31_t)0xca2ac15b,\n    (q31_t)0x1d58b0c0, (q31_t)0xca318e32, (q31_t)0x1d4e20d0, (q31_t)0xca385d1d,\n    (q31_t)0x1d439236, (q31_t)0xca3f2e19, (q31_t)0x1d3904f4, (q31_t)0xca460129,\n    (q31_t)0x1d2e7908, (q31_t)0xca4cd64b, (q31_t)0x1d23ee74, (q31_t)0xca53ad7e,\n    (q31_t)0x1d196538, (q31_t)0xca5a86c4, (q31_t)0x1d0edd55, (q31_t)0xca61621b,\n    (q31_t)0x1d0456ca, (q31_t)0xca683f83, (q31_t)0x1cf9d199, (q31_t)0xca6f1efc,\n    (q31_t)0x1cef4dc2, (q31_t)0xca760086, (q31_t)0x1ce4cb44, (q31_t)0xca7ce420,\n    (q31_t)0x1cda4a21, (q31_t)0xca83c9ca, (q31_t)0x1ccfca59, (q31_t)0xca8ab184,\n    (q31_t)0x1cc54bec, (q31_t)0xca919b4e, (q31_t)0x1cbacedb, (q31_t)0xca988727,\n    (q31_t)0x1cb05326, (q31_t)0xca9f750f, (q31_t)0x1ca5d8cd, (q31_t)0xcaa66506,\n    (q31_t)0x1c9b5fd2, (q31_t)0xcaad570c, (q31_t)0x1c90e834, (q31_t)0xcab44b1f,\n    (q31_t)0x1c8671f3, (q31_t)0xcabb4141, (q31_t)0x1c7bfd11, (q31_t)0xcac23971,\n    (q31_t)0x1c71898d, (q31_t)0xcac933ae, (q31_t)0x1c671768, (q31_t)0xcad02ff8,\n    (q31_t)0x1c5ca6a2, (q31_t)0xcad72e4f, (q31_t)0x1c52373c, (q31_t)0xcade2eb3,\n    (q31_t)0x1c47c936, (q31_t)0xcae53123, (q31_t)0x1c3d5c91, (q31_t)0xcaec35a0,\n    (q31_t)0x1c32f14d, (q31_t)0xcaf33c28, (q31_t)0x1c28876a, (q31_t)0xcafa44bc,\n    (q31_t)0x1c1e1ee9, (q31_t)0xcb014f5b, (q31_t)0x1c13b7c9, (q31_t)0xcb085c05,\n    (q31_t)0x1c09520d, (q31_t)0xcb0f6aba, (q31_t)0x1bfeedb3, (q31_t)0xcb167b79,\n    (q31_t)0x1bf48abd, (q31_t)0xcb1d8e43, (q31_t)0x1bea292b, (q31_t)0xcb24a316,\n    (q31_t)0x1bdfc8fc, (q31_t)0xcb2bb9f4, (q31_t)0x1bd56a32, (q31_t)0xcb32d2da,\n    (q31_t)0x1bcb0cce, (q31_t)0xcb39edca, (q31_t)0x1bc0b0ce, (q31_t)0xcb410ac3,\n    (q31_t)0x1bb65634, (q31_t)0xcb4829c4, (q31_t)0x1babfd01, (q31_t)0xcb4f4acd,\n    (q31_t)0x1ba1a534, (q31_t)0xcb566ddf, (q31_t)0x1b974ece, (q31_t)0xcb5d92f8,\n    (q31_t)0x1b8cf9cf, (q31_t)0xcb64ba19, (q31_t)0x1b82a638, (q31_t)0xcb6be341,\n    (q31_t)0x1b785409, (q31_t)0xcb730e70, (q31_t)0x1b6e0342, (q31_t)0xcb7a3ba5,\n    (q31_t)0x1b63b3e5, (q31_t)0xcb816ae1, (q31_t)0x1b5965f1, (q31_t)0xcb889c23,\n    (q31_t)0x1b4f1967, (q31_t)0xcb8fcf6b, (q31_t)0x1b44ce46, (q31_t)0xcb9704b9,\n    (q31_t)0x1b3a8491, (q31_t)0xcb9e3c0b, (q31_t)0x1b303c46, (q31_t)0xcba57563,\n    (q31_t)0x1b25f566, (q31_t)0xcbacb0bf, (q31_t)0x1b1baff2, (q31_t)0xcbb3ee20,\n    (q31_t)0x1b116beb, (q31_t)0xcbbb2d85, (q31_t)0x1b072950, (q31_t)0xcbc26eee,\n    (q31_t)0x1afce821, (q31_t)0xcbc9b25a, (q31_t)0x1af2a860, (q31_t)0xcbd0f7ca,\n    (q31_t)0x1ae86a0d, (q31_t)0xcbd83f3d, (q31_t)0x1ade2d28, (q31_t)0xcbdf88b3,\n    (q31_t)0x1ad3f1b1, (q31_t)0xcbe6d42b, (q31_t)0x1ac9b7a9, (q31_t)0xcbee21a5,\n    (q31_t)0x1abf7f11, (q31_t)0xcbf57121, (q31_t)0x1ab547e8, (q31_t)0xcbfcc29f,\n    (q31_t)0x1aab122f, (q31_t)0xcc04161e, (q31_t)0x1aa0dde7, (q31_t)0xcc0b6b9e,\n    (q31_t)0x1a96ab0f, (q31_t)0xcc12c31f, (q31_t)0x1a8c79a9, (q31_t)0xcc1a1ca0,\n    (q31_t)0x1a8249b4, (q31_t)0xcc217822, (q31_t)0x1a781b31, (q31_t)0xcc28d5a3,\n    (q31_t)0x1a6dee21, (q31_t)0xcc303524, (q31_t)0x1a63c284, (q31_t)0xcc3796a5,\n    (q31_t)0x1a599859, (q31_t)0xcc3efa25, (q31_t)0x1a4f6fa3, (q31_t)0xcc465fa3,\n    (q31_t)0x1a454860, (q31_t)0xcc4dc720, (q31_t)0x1a3b2292, (q31_t)0xcc55309b,\n    (q31_t)0x1a30fe38, (q31_t)0xcc5c9c14, (q31_t)0x1a26db54, (q31_t)0xcc64098b,\n    (q31_t)0x1a1cb9e5, (q31_t)0xcc6b78ff, (q31_t)0x1a1299ec, (q31_t)0xcc72ea70,\n    (q31_t)0x1a087b69, (q31_t)0xcc7a5dde, (q31_t)0x19fe5e5e, (q31_t)0xcc81d349,\n    (q31_t)0x19f442c9, (q31_t)0xcc894aaf, (q31_t)0x19ea28ac, (q31_t)0xcc90c412,\n    (q31_t)0x19e01006, (q31_t)0xcc983f70, (q31_t)0x19d5f8d9, (q31_t)0xcc9fbcca,\n    (q31_t)0x19cbe325, (q31_t)0xcca73c1e, (q31_t)0x19c1cee9, (q31_t)0xccaebd6e,\n    (q31_t)0x19b7bc27, (q31_t)0xccb640b8, (q31_t)0x19adaadf, (q31_t)0xccbdc5fc,\n    (q31_t)0x19a39b11, (q31_t)0xccc54d3a, (q31_t)0x19998cbe, (q31_t)0xccccd671,\n    (q31_t)0x198f7fe6, (q31_t)0xccd461a2, (q31_t)0x19857489, (q31_t)0xccdbeecc,\n    (q31_t)0x197b6aa8, (q31_t)0xcce37def, (q31_t)0x19716243, (q31_t)0xcceb0f0a,\n    (q31_t)0x19675b5a, (q31_t)0xccf2a21d, (q31_t)0x195d55ef, (q31_t)0xccfa3729,\n    (q31_t)0x19535201, (q31_t)0xcd01ce2b, (q31_t)0x19494f90, (q31_t)0xcd096725,\n    (q31_t)0x193f4e9e, (q31_t)0xcd110216, (q31_t)0x19354f2a, (q31_t)0xcd189efe,\n    (q31_t)0x192b5135, (q31_t)0xcd203ddc, (q31_t)0x192154bf, (q31_t)0xcd27deb0,\n    (q31_t)0x191759c9, (q31_t)0xcd2f817b, (q31_t)0x190d6053, (q31_t)0xcd37263a,\n    (q31_t)0x1903685d, (q31_t)0xcd3eccef, (q31_t)0x18f971e8, (q31_t)0xcd467599,\n    (q31_t)0x18ef7cf4, (q31_t)0xcd4e2037, (q31_t)0x18e58982, (q31_t)0xcd55ccca,\n    (q31_t)0x18db9792, (q31_t)0xcd5d7b50, (q31_t)0x18d1a724, (q31_t)0xcd652bcb,\n    (q31_t)0x18c7b838, (q31_t)0xcd6cde39, (q31_t)0x18bdcad0, (q31_t)0xcd74929a,\n    (q31_t)0x18b3deeb, (q31_t)0xcd7c48ee, (q31_t)0x18a9f48a, (q31_t)0xcd840134,\n    (q31_t)0x18a00bae, (q31_t)0xcd8bbb6d, (q31_t)0x18962456, (q31_t)0xcd937798,\n    (q31_t)0x188c3e83, (q31_t)0xcd9b35b4, (q31_t)0x18825a35, (q31_t)0xcda2f5c2,\n    (q31_t)0x1878776d, (q31_t)0xcdaab7c0, (q31_t)0x186e962b, (q31_t)0xcdb27bb0,\n    (q31_t)0x1864b670, (q31_t)0xcdba4190, (q31_t)0x185ad83c, (q31_t)0xcdc20960,\n    (q31_t)0x1850fb8e, (q31_t)0xcdc9d320, (q31_t)0x18472069, (q31_t)0xcdd19ed0,\n    (q31_t)0x183d46cc, (q31_t)0xcdd96c6f, (q31_t)0x18336eb7, (q31_t)0xcde13bfd,\n    (q31_t)0x1829982b, (q31_t)0xcde90d79, (q31_t)0x181fc328, (q31_t)0xcdf0e0e4,\n    (q31_t)0x1815efae, (q31_t)0xcdf8b63d, (q31_t)0x180c1dbf, (q31_t)0xce008d84,\n    (q31_t)0x18024d59, (q31_t)0xce0866b8, (q31_t)0x17f87e7f, (q31_t)0xce1041d9,\n    (q31_t)0x17eeb130, (q31_t)0xce181ee8, (q31_t)0x17e4e56c, (q31_t)0xce1ffde2,\n    (q31_t)0x17db1b34, (q31_t)0xce27dec9, (q31_t)0x17d15288, (q31_t)0xce2fc19c,\n    (q31_t)0x17c78b68, (q31_t)0xce37a65b, (q31_t)0x17bdc5d6, (q31_t)0xce3f8d05,\n    (q31_t)0x17b401d1, (q31_t)0xce47759a, (q31_t)0x17aa3f5a, (q31_t)0xce4f6019,\n    (q31_t)0x17a07e70, (q31_t)0xce574c84, (q31_t)0x1796bf16, (q31_t)0xce5f3ad8,\n    (q31_t)0x178d014a, (q31_t)0xce672b16, (q31_t)0x1783450d, (q31_t)0xce6f1d3d,\n    (q31_t)0x17798a60, (q31_t)0xce77114e, (q31_t)0x176fd143, (q31_t)0xce7f0748,\n    (q31_t)0x176619b6, (q31_t)0xce86ff2a, (q31_t)0x175c63ba, (q31_t)0xce8ef8f4,\n    (q31_t)0x1752af4f, (q31_t)0xce96f4a7, (q31_t)0x1748fc75, (q31_t)0xce9ef241,\n    (q31_t)0x173f4b2e, (q31_t)0xcea6f1c2, (q31_t)0x17359b78, (q31_t)0xceaef32b,\n    (q31_t)0x172bed55, (q31_t)0xceb6f67a, (q31_t)0x172240c5, (q31_t)0xcebefbb0,\n    (q31_t)0x171895c9, (q31_t)0xcec702cb, (q31_t)0x170eec60, (q31_t)0xcecf0bcd,\n    (q31_t)0x1705448b, (q31_t)0xced716b4, (q31_t)0x16fb9e4b, (q31_t)0xcedf2380,\n    (q31_t)0x16f1f99f, (q31_t)0xcee73231, (q31_t)0x16e85689, (q31_t)0xceef42c7,\n    (q31_t)0x16deb508, (q31_t)0xcef75541, (q31_t)0x16d5151d, (q31_t)0xceff699f,\n    (q31_t)0x16cb76c9, (q31_t)0xcf077fe1, (q31_t)0x16c1da0b, (q31_t)0xcf0f9805,\n    (q31_t)0x16b83ee4, (q31_t)0xcf17b20d, (q31_t)0x16aea555, (q31_t)0xcf1fcdf8,\n    (q31_t)0x16a50d5d, (q31_t)0xcf27ebc5, (q31_t)0x169b76fe, (q31_t)0xcf300b74,\n    (q31_t)0x1691e237, (q31_t)0xcf382d05, (q31_t)0x16884f09, (q31_t)0xcf405077,\n    (q31_t)0x167ebd74, (q31_t)0xcf4875ca, (q31_t)0x16752d79, (q31_t)0xcf509cfe,\n    (q31_t)0x166b9f18, (q31_t)0xcf58c613, (q31_t)0x16621251, (q31_t)0xcf60f108,\n    (q31_t)0x16588725, (q31_t)0xcf691ddd, (q31_t)0x164efd94, (q31_t)0xcf714c91,\n    (q31_t)0x1645759f, (q31_t)0xcf797d24, (q31_t)0x163bef46, (q31_t)0xcf81af97,\n    (q31_t)0x16326a88, (q31_t)0xcf89e3e8, (q31_t)0x1628e767, (q31_t)0xcf921a17,\n    (q31_t)0x161f65e4, (q31_t)0xcf9a5225, (q31_t)0x1615e5fd, (q31_t)0xcfa28c10,\n    (q31_t)0x160c67b4, (q31_t)0xcfaac7d8, (q31_t)0x1602eb0a, (q31_t)0xcfb3057d,\n    (q31_t)0x15f96ffd, (q31_t)0xcfbb4500, (q31_t)0x15eff690, (q31_t)0xcfc3865e,\n    (q31_t)0x15e67ec1, (q31_t)0xcfcbc999, (q31_t)0x15dd0892, (q31_t)0xcfd40eaf,\n    (q31_t)0x15d39403, (q31_t)0xcfdc55a1, (q31_t)0x15ca2115, (q31_t)0xcfe49e6d,\n    (q31_t)0x15c0afc6, (q31_t)0xcfece915, (q31_t)0x15b74019, (q31_t)0xcff53597,\n    (q31_t)0x15add20d, (q31_t)0xcffd83f4, (q31_t)0x15a465a3, (q31_t)0xd005d42a,\n    (q31_t)0x159afadb, (q31_t)0xd00e2639, (q31_t)0x159191b5, (q31_t)0xd0167a22,\n    (q31_t)0x15882a32, (q31_t)0xd01ecfe4, (q31_t)0x157ec452, (q31_t)0xd027277e,\n    (q31_t)0x15756016, (q31_t)0xd02f80f1, (q31_t)0x156bfd7d, (q31_t)0xd037dc3b,\n    (q31_t)0x15629c89, (q31_t)0xd040395d, (q31_t)0x15593d3a, (q31_t)0xd0489856,\n    (q31_t)0x154fdf8f, (q31_t)0xd050f926, (q31_t)0x15468389, (q31_t)0xd0595bcd,\n    (q31_t)0x153d292a, (q31_t)0xd061c04a, (q31_t)0x1533d070, (q31_t)0xd06a269d,\n    (q31_t)0x152a795d, (q31_t)0xd0728ec6, (q31_t)0x152123f0, (q31_t)0xd07af8c4,\n    (q31_t)0x1517d02b, (q31_t)0xd0836497, (q31_t)0x150e7e0d, (q31_t)0xd08bd23f,\n    (q31_t)0x15052d97, (q31_t)0xd09441bb, (q31_t)0x14fbdec9, (q31_t)0xd09cb30b,\n    (q31_t)0x14f291a4, (q31_t)0xd0a5262f, (q31_t)0x14e94627, (q31_t)0xd0ad9b26,\n    (q31_t)0x14dffc54, (q31_t)0xd0b611f1, (q31_t)0x14d6b42b, (q31_t)0xd0be8a8d,\n    (q31_t)0x14cd6dab, (q31_t)0xd0c704fd, (q31_t)0x14c428d6, (q31_t)0xd0cf813e,\n    (q31_t)0x14bae5ab, (q31_t)0xd0d7ff51, (q31_t)0x14b1a42c, (q31_t)0xd0e07f36,\n    (q31_t)0x14a86458, (q31_t)0xd0e900ec, (q31_t)0x149f2630, (q31_t)0xd0f18472,\n    (q31_t)0x1495e9b3, (q31_t)0xd0fa09c9, (q31_t)0x148caee4, (q31_t)0xd10290f0,\n    (q31_t)0x148375c1, (q31_t)0xd10b19e7, (q31_t)0x147a3e4b, (q31_t)0xd113a4ad,\n    (q31_t)0x14710883, (q31_t)0xd11c3142, (q31_t)0x1467d469, (q31_t)0xd124bfa6,\n    (q31_t)0x145ea1fd, (q31_t)0xd12d4fd9, (q31_t)0x14557140, (q31_t)0xd135e1d9,\n    (q31_t)0x144c4232, (q31_t)0xd13e75a8, (q31_t)0x144314d3, (q31_t)0xd1470b44,\n    (q31_t)0x1439e923, (q31_t)0xd14fa2ad, (q31_t)0x1430bf24, (q31_t)0xd1583be2,\n    (q31_t)0x142796d5, (q31_t)0xd160d6e5, (q31_t)0x141e7037, (q31_t)0xd16973b3,\n    (q31_t)0x14154b4a, (q31_t)0xd172124d, (q31_t)0x140c280e, (q31_t)0xd17ab2b3,\n    (q31_t)0x14030684, (q31_t)0xd18354e4, (q31_t)0x13f9e6ad, (q31_t)0xd18bf8e0,\n    (q31_t)0x13f0c887, (q31_t)0xd1949ea6, (q31_t)0x13e7ac15, (q31_t)0xd19d4636,\n    (q31_t)0x13de9156, (q31_t)0xd1a5ef90, (q31_t)0x13d5784a, (q31_t)0xd1ae9ab4,\n    (q31_t)0x13cc60f2, (q31_t)0xd1b747a0, (q31_t)0x13c34b4f, (q31_t)0xd1bff656,\n    (q31_t)0x13ba3760, (q31_t)0xd1c8a6d4, (q31_t)0x13b12526, (q31_t)0xd1d1591a,\n    (q31_t)0x13a814a2, (q31_t)0xd1da0d28, (q31_t)0x139f05d3, (q31_t)0xd1e2c2fd,\n    (q31_t)0x1395f8ba, (q31_t)0xd1eb7a9a, (q31_t)0x138ced57, (q31_t)0xd1f433fd,\n    (q31_t)0x1383e3ab, (q31_t)0xd1fcef27, (q31_t)0x137adbb6, (q31_t)0xd205ac17,\n    (q31_t)0x1371d579, (q31_t)0xd20e6acc, (q31_t)0x1368d0f3, (q31_t)0xd2172b48,\n    (q31_t)0x135fce26, (q31_t)0xd21fed88, (q31_t)0x1356cd11, (q31_t)0xd228b18d,\n    (q31_t)0x134dcdb4, (q31_t)0xd2317756, (q31_t)0x1344d011, (q31_t)0xd23a3ee4,\n    (q31_t)0x133bd427, (q31_t)0xd2430835, (q31_t)0x1332d9f7, (q31_t)0xd24bd34a,\n    (q31_t)0x1329e181, (q31_t)0xd254a021, (q31_t)0x1320eac6, (q31_t)0xd25d6ebc,\n    (q31_t)0x1317f5c6, (q31_t)0xd2663f19, (q31_t)0x130f0280, (q31_t)0xd26f1138,\n    (q31_t)0x130610f7, (q31_t)0xd277e518, (q31_t)0x12fd2129, (q31_t)0xd280babb,\n    (q31_t)0x12f43318, (q31_t)0xd289921e, (q31_t)0x12eb46c3, (q31_t)0xd2926b41,\n    (q31_t)0x12e25c2b, (q31_t)0xd29b4626, (q31_t)0x12d97350, (q31_t)0xd2a422ca,\n    (q31_t)0x12d08c33, (q31_t)0xd2ad012e, (q31_t)0x12c7a6d4, (q31_t)0xd2b5e151,\n    (q31_t)0x12bec333, (q31_t)0xd2bec333, (q31_t)0x12b5e151, (q31_t)0xd2c7a6d4,\n    (q31_t)0x12ad012e, (q31_t)0xd2d08c33, (q31_t)0x12a422ca, (q31_t)0xd2d97350,\n    (q31_t)0x129b4626, (q31_t)0xd2e25c2b, (q31_t)0x12926b41, (q31_t)0xd2eb46c3,\n    (q31_t)0x1289921e, (q31_t)0xd2f43318, (q31_t)0x1280babb, (q31_t)0xd2fd2129,\n    (q31_t)0x1277e518, (q31_t)0xd30610f7, (q31_t)0x126f1138, (q31_t)0xd30f0280,\n    (q31_t)0x12663f19, (q31_t)0xd317f5c6, (q31_t)0x125d6ebc, (q31_t)0xd320eac6,\n    (q31_t)0x1254a021, (q31_t)0xd329e181, (q31_t)0x124bd34a, (q31_t)0xd332d9f7,\n    (q31_t)0x12430835, (q31_t)0xd33bd427, (q31_t)0x123a3ee4, (q31_t)0xd344d011,\n    (q31_t)0x12317756, (q31_t)0xd34dcdb4, (q31_t)0x1228b18d, (q31_t)0xd356cd11,\n    (q31_t)0x121fed88, (q31_t)0xd35fce26, (q31_t)0x12172b48, (q31_t)0xd368d0f3,\n    (q31_t)0x120e6acc, (q31_t)0xd371d579, (q31_t)0x1205ac17, (q31_t)0xd37adbb6,\n    (q31_t)0x11fcef27, (q31_t)0xd383e3ab, (q31_t)0x11f433fd, (q31_t)0xd38ced57,\n    (q31_t)0x11eb7a9a, (q31_t)0xd395f8ba, (q31_t)0x11e2c2fd, (q31_t)0xd39f05d3,\n    (q31_t)0x11da0d28, (q31_t)0xd3a814a2, (q31_t)0x11d1591a, (q31_t)0xd3b12526,\n    (q31_t)0x11c8a6d4, (q31_t)0xd3ba3760, (q31_t)0x11bff656, (q31_t)0xd3c34b4f,\n    (q31_t)0x11b747a0, (q31_t)0xd3cc60f2, (q31_t)0x11ae9ab4, (q31_t)0xd3d5784a,\n    (q31_t)0x11a5ef90, (q31_t)0xd3de9156, (q31_t)0x119d4636, (q31_t)0xd3e7ac15,\n    (q31_t)0x11949ea6, (q31_t)0xd3f0c887, (q31_t)0x118bf8e0, (q31_t)0xd3f9e6ad,\n    (q31_t)0x118354e4, (q31_t)0xd4030684, (q31_t)0x117ab2b3, (q31_t)0xd40c280e,\n    (q31_t)0x1172124d, (q31_t)0xd4154b4a, (q31_t)0x116973b3, (q31_t)0xd41e7037,\n    (q31_t)0x1160d6e5, (q31_t)0xd42796d5, (q31_t)0x11583be2, (q31_t)0xd430bf24,\n    (q31_t)0x114fa2ad, (q31_t)0xd439e923, (q31_t)0x11470b44, (q31_t)0xd44314d3,\n    (q31_t)0x113e75a8, (q31_t)0xd44c4232, (q31_t)0x1135e1d9, (q31_t)0xd4557140,\n    (q31_t)0x112d4fd9, (q31_t)0xd45ea1fd, (q31_t)0x1124bfa6, (q31_t)0xd467d469,\n    (q31_t)0x111c3142, (q31_t)0xd4710883, (q31_t)0x1113a4ad, (q31_t)0xd47a3e4b,\n    (q31_t)0x110b19e7, (q31_t)0xd48375c1, (q31_t)0x110290f0, (q31_t)0xd48caee4,\n    (q31_t)0x10fa09c9, (q31_t)0xd495e9b3, (q31_t)0x10f18472, (q31_t)0xd49f2630,\n    (q31_t)0x10e900ec, (q31_t)0xd4a86458, (q31_t)0x10e07f36, (q31_t)0xd4b1a42c,\n    (q31_t)0x10d7ff51, (q31_t)0xd4bae5ab, (q31_t)0x10cf813e, (q31_t)0xd4c428d6,\n    (q31_t)0x10c704fd, (q31_t)0xd4cd6dab, (q31_t)0x10be8a8d, (q31_t)0xd4d6b42b,\n    (q31_t)0x10b611f1, (q31_t)0xd4dffc54, (q31_t)0x10ad9b26, (q31_t)0xd4e94627,\n    (q31_t)0x10a5262f, (q31_t)0xd4f291a4, (q31_t)0x109cb30b, (q31_t)0xd4fbdec9,\n    (q31_t)0x109441bb, (q31_t)0xd5052d97, (q31_t)0x108bd23f, (q31_t)0xd50e7e0d,\n    (q31_t)0x10836497, (q31_t)0xd517d02b, (q31_t)0x107af8c4, (q31_t)0xd52123f0,\n    (q31_t)0x10728ec6, (q31_t)0xd52a795d, (q31_t)0x106a269d, (q31_t)0xd533d070,\n    (q31_t)0x1061c04a, (q31_t)0xd53d292a, (q31_t)0x10595bcd, (q31_t)0xd5468389,\n    (q31_t)0x1050f926, (q31_t)0xd54fdf8f, (q31_t)0x10489856, (q31_t)0xd5593d3a,\n    (q31_t)0x1040395d, (q31_t)0xd5629c89, (q31_t)0x1037dc3b, (q31_t)0xd56bfd7d,\n    (q31_t)0x102f80f1, (q31_t)0xd5756016, (q31_t)0x1027277e, (q31_t)0xd57ec452,\n    (q31_t)0x101ecfe4, (q31_t)0xd5882a32, (q31_t)0x10167a22, (q31_t)0xd59191b5,\n    (q31_t)0x100e2639, (q31_t)0xd59afadb, (q31_t)0x1005d42a, (q31_t)0xd5a465a3,\n    (q31_t)0xffd83f4,  (q31_t)0xd5add20d, (q31_t)0xff53597,  (q31_t)0xd5b74019,\n    (q31_t)0xfece915,  (q31_t)0xd5c0afc6, (q31_t)0xfe49e6d,  (q31_t)0xd5ca2115,\n    (q31_t)0xfdc55a1,  (q31_t)0xd5d39403, (q31_t)0xfd40eaf,  (q31_t)0xd5dd0892,\n    (q31_t)0xfcbc999,  (q31_t)0xd5e67ec1, (q31_t)0xfc3865e,  (q31_t)0xd5eff690,\n    (q31_t)0xfbb4500,  (q31_t)0xd5f96ffd, (q31_t)0xfb3057d,  (q31_t)0xd602eb0a,\n    (q31_t)0xfaac7d8,  (q31_t)0xd60c67b4, (q31_t)0xfa28c10,  (q31_t)0xd615e5fd,\n    (q31_t)0xf9a5225,  (q31_t)0xd61f65e4, (q31_t)0xf921a17,  (q31_t)0xd628e767,\n    (q31_t)0xf89e3e8,  (q31_t)0xd6326a88, (q31_t)0xf81af97,  (q31_t)0xd63bef46,\n    (q31_t)0xf797d24,  (q31_t)0xd645759f, (q31_t)0xf714c91,  (q31_t)0xd64efd94,\n    (q31_t)0xf691ddd,  (q31_t)0xd6588725, (q31_t)0xf60f108,  (q31_t)0xd6621251,\n    (q31_t)0xf58c613,  (q31_t)0xd66b9f18, (q31_t)0xf509cfe,  (q31_t)0xd6752d79,\n    (q31_t)0xf4875ca,  (q31_t)0xd67ebd74, (q31_t)0xf405077,  (q31_t)0xd6884f09,\n    (q31_t)0xf382d05,  (q31_t)0xd691e237, (q31_t)0xf300b74,  (q31_t)0xd69b76fe,\n    (q31_t)0xf27ebc5,  (q31_t)0xd6a50d5d, (q31_t)0xf1fcdf8,  (q31_t)0xd6aea555,\n    (q31_t)0xf17b20d,  (q31_t)0xd6b83ee4, (q31_t)0xf0f9805,  (q31_t)0xd6c1da0b,\n    (q31_t)0xf077fe1,  (q31_t)0xd6cb76c9, (q31_t)0xeff699f,  (q31_t)0xd6d5151d,\n    (q31_t)0xef75541,  (q31_t)0xd6deb508, (q31_t)0xeef42c7,  (q31_t)0xd6e85689,\n    (q31_t)0xee73231,  (q31_t)0xd6f1f99f, (q31_t)0xedf2380,  (q31_t)0xd6fb9e4b,\n    (q31_t)0xed716b4,  (q31_t)0xd705448b, (q31_t)0xecf0bcd,  (q31_t)0xd70eec60,\n    (q31_t)0xec702cb,  (q31_t)0xd71895c9, (q31_t)0xebefbb0,  (q31_t)0xd72240c5,\n    (q31_t)0xeb6f67a,  (q31_t)0xd72bed55, (q31_t)0xeaef32b,  (q31_t)0xd7359b78,\n    (q31_t)0xea6f1c2,  (q31_t)0xd73f4b2e, (q31_t)0xe9ef241,  (q31_t)0xd748fc75,\n    (q31_t)0xe96f4a7,  (q31_t)0xd752af4f, (q31_t)0xe8ef8f4,  (q31_t)0xd75c63ba,\n    (q31_t)0xe86ff2a,  (q31_t)0xd76619b6, (q31_t)0xe7f0748,  (q31_t)0xd76fd143,\n    (q31_t)0xe77114e,  (q31_t)0xd7798a60, (q31_t)0xe6f1d3d,  (q31_t)0xd783450d,\n    (q31_t)0xe672b16,  (q31_t)0xd78d014a, (q31_t)0xe5f3ad8,  (q31_t)0xd796bf16,\n    (q31_t)0xe574c84,  (q31_t)0xd7a07e70, (q31_t)0xe4f6019,  (q31_t)0xd7aa3f5a,\n    (q31_t)0xe47759a,  (q31_t)0xd7b401d1, (q31_t)0xe3f8d05,  (q31_t)0xd7bdc5d6,\n    (q31_t)0xe37a65b,  (q31_t)0xd7c78b68, (q31_t)0xe2fc19c,  (q31_t)0xd7d15288,\n    (q31_t)0xe27dec9,  (q31_t)0xd7db1b34, (q31_t)0xe1ffde2,  (q31_t)0xd7e4e56c,\n    (q31_t)0xe181ee8,  (q31_t)0xd7eeb130, (q31_t)0xe1041d9,  (q31_t)0xd7f87e7f,\n    (q31_t)0xe0866b8,  (q31_t)0xd8024d59, (q31_t)0xe008d84,  (q31_t)0xd80c1dbf,\n    (q31_t)0xdf8b63d,  (q31_t)0xd815efae, (q31_t)0xdf0e0e4,  (q31_t)0xd81fc328,\n    (q31_t)0xde90d79,  (q31_t)0xd829982b, (q31_t)0xde13bfd,  (q31_t)0xd8336eb7,\n    (q31_t)0xdd96c6f,  (q31_t)0xd83d46cc, (q31_t)0xdd19ed0,  (q31_t)0xd8472069,\n    (q31_t)0xdc9d320,  (q31_t)0xd850fb8e, (q31_t)0xdc20960,  (q31_t)0xd85ad83c,\n    (q31_t)0xdba4190,  (q31_t)0xd864b670, (q31_t)0xdb27bb0,  (q31_t)0xd86e962b,\n    (q31_t)0xdaab7c0,  (q31_t)0xd878776d, (q31_t)0xda2f5c2,  (q31_t)0xd8825a35,\n    (q31_t)0xd9b35b4,  (q31_t)0xd88c3e83, (q31_t)0xd937798,  (q31_t)0xd8962456,\n    (q31_t)0xd8bbb6d,  (q31_t)0xd8a00bae, (q31_t)0xd840134,  (q31_t)0xd8a9f48a,\n    (q31_t)0xd7c48ee,  (q31_t)0xd8b3deeb, (q31_t)0xd74929a,  (q31_t)0xd8bdcad0,\n    (q31_t)0xd6cde39,  (q31_t)0xd8c7b838, (q31_t)0xd652bcb,  (q31_t)0xd8d1a724,\n    (q31_t)0xd5d7b50,  (q31_t)0xd8db9792, (q31_t)0xd55ccca,  (q31_t)0xd8e58982,\n    (q31_t)0xd4e2037,  (q31_t)0xd8ef7cf4, (q31_t)0xd467599,  (q31_t)0xd8f971e8,\n    (q31_t)0xd3eccef,  (q31_t)0xd903685d, (q31_t)0xd37263a,  (q31_t)0xd90d6053,\n    (q31_t)0xd2f817b,  (q31_t)0xd91759c9, (q31_t)0xd27deb0,  (q31_t)0xd92154bf,\n    (q31_t)0xd203ddc,  (q31_t)0xd92b5135, (q31_t)0xd189efe,  (q31_t)0xd9354f2a,\n    (q31_t)0xd110216,  (q31_t)0xd93f4e9e, (q31_t)0xd096725,  (q31_t)0xd9494f90,\n    (q31_t)0xd01ce2b,  (q31_t)0xd9535201, (q31_t)0xcfa3729,  (q31_t)0xd95d55ef,\n    (q31_t)0xcf2a21d,  (q31_t)0xd9675b5a, (q31_t)0xceb0f0a,  (q31_t)0xd9716243,\n    (q31_t)0xce37def,  (q31_t)0xd97b6aa8, (q31_t)0xcdbeecc,  (q31_t)0xd9857489,\n    (q31_t)0xcd461a2,  (q31_t)0xd98f7fe6, (q31_t)0xcccd671,  (q31_t)0xd9998cbe,\n    (q31_t)0xcc54d3a,  (q31_t)0xd9a39b11, (q31_t)0xcbdc5fc,  (q31_t)0xd9adaadf,\n    (q31_t)0xcb640b8,  (q31_t)0xd9b7bc27, (q31_t)0xcaebd6e,  (q31_t)0xd9c1cee9,\n    (q31_t)0xca73c1e,  (q31_t)0xd9cbe325, (q31_t)0xc9fbcca,  (q31_t)0xd9d5f8d9,\n    (q31_t)0xc983f70,  (q31_t)0xd9e01006, (q31_t)0xc90c412,  (q31_t)0xd9ea28ac,\n    (q31_t)0xc894aaf,  (q31_t)0xd9f442c9, (q31_t)0xc81d349,  (q31_t)0xd9fe5e5e,\n    (q31_t)0xc7a5dde,  (q31_t)0xda087b69, (q31_t)0xc72ea70,  (q31_t)0xda1299ec,\n    (q31_t)0xc6b78ff,  (q31_t)0xda1cb9e5, (q31_t)0xc64098b,  (q31_t)0xda26db54,\n    (q31_t)0xc5c9c14,  (q31_t)0xda30fe38, (q31_t)0xc55309b,  (q31_t)0xda3b2292,\n    (q31_t)0xc4dc720,  (q31_t)0xda454860, (q31_t)0xc465fa3,  (q31_t)0xda4f6fa3,\n    (q31_t)0xc3efa25,  (q31_t)0xda599859, (q31_t)0xc3796a5,  (q31_t)0xda63c284,\n    (q31_t)0xc303524,  (q31_t)0xda6dee21, (q31_t)0xc28d5a3,  (q31_t)0xda781b31,\n    (q31_t)0xc217822,  (q31_t)0xda8249b4, (q31_t)0xc1a1ca0,  (q31_t)0xda8c79a9,\n    (q31_t)0xc12c31f,  (q31_t)0xda96ab0f, (q31_t)0xc0b6b9e,  (q31_t)0xdaa0dde7,\n    (q31_t)0xc04161e,  (q31_t)0xdaab122f, (q31_t)0xbfcc29f,  (q31_t)0xdab547e8,\n    (q31_t)0xbf57121,  (q31_t)0xdabf7f11, (q31_t)0xbee21a5,  (q31_t)0xdac9b7a9,\n    (q31_t)0xbe6d42b,  (q31_t)0xdad3f1b1, (q31_t)0xbdf88b3,  (q31_t)0xdade2d28,\n    (q31_t)0xbd83f3d,  (q31_t)0xdae86a0d, (q31_t)0xbd0f7ca,  (q31_t)0xdaf2a860,\n    (q31_t)0xbc9b25a,  (q31_t)0xdafce821, (q31_t)0xbc26eee,  (q31_t)0xdb072950,\n    (q31_t)0xbbb2d85,  (q31_t)0xdb116beb, (q31_t)0xbb3ee20,  (q31_t)0xdb1baff2,\n    (q31_t)0xbacb0bf,  (q31_t)0xdb25f566, (q31_t)0xba57563,  (q31_t)0xdb303c46,\n    (q31_t)0xb9e3c0b,  (q31_t)0xdb3a8491, (q31_t)0xb9704b9,  (q31_t)0xdb44ce46,\n    (q31_t)0xb8fcf6b,  (q31_t)0xdb4f1967, (q31_t)0xb889c23,  (q31_t)0xdb5965f1,\n    (q31_t)0xb816ae1,  (q31_t)0xdb63b3e5, (q31_t)0xb7a3ba5,  (q31_t)0xdb6e0342,\n    (q31_t)0xb730e70,  (q31_t)0xdb785409, (q31_t)0xb6be341,  (q31_t)0xdb82a638,\n    (q31_t)0xb64ba19,  (q31_t)0xdb8cf9cf, (q31_t)0xb5d92f8,  (q31_t)0xdb974ece,\n    (q31_t)0xb566ddf,  (q31_t)0xdba1a534, (q31_t)0xb4f4acd,  (q31_t)0xdbabfd01,\n    (q31_t)0xb4829c4,  (q31_t)0xdbb65634, (q31_t)0xb410ac3,  (q31_t)0xdbc0b0ce,\n    (q31_t)0xb39edca,  (q31_t)0xdbcb0cce, (q31_t)0xb32d2da,  (q31_t)0xdbd56a32,\n    (q31_t)0xb2bb9f4,  (q31_t)0xdbdfc8fc, (q31_t)0xb24a316,  (q31_t)0xdbea292b,\n    (q31_t)0xb1d8e43,  (q31_t)0xdbf48abd, (q31_t)0xb167b79,  (q31_t)0xdbfeedb3,\n    (q31_t)0xb0f6aba,  (q31_t)0xdc09520d, (q31_t)0xb085c05,  (q31_t)0xdc13b7c9,\n    (q31_t)0xb014f5b,  (q31_t)0xdc1e1ee9, (q31_t)0xafa44bc,  (q31_t)0xdc28876a,\n    (q31_t)0xaf33c28,  (q31_t)0xdc32f14d, (q31_t)0xaec35a0,  (q31_t)0xdc3d5c91,\n    (q31_t)0xae53123,  (q31_t)0xdc47c936, (q31_t)0xade2eb3,  (q31_t)0xdc52373c,\n    (q31_t)0xad72e4f,  (q31_t)0xdc5ca6a2, (q31_t)0xad02ff8,  (q31_t)0xdc671768,\n    (q31_t)0xac933ae,  (q31_t)0xdc71898d, (q31_t)0xac23971,  (q31_t)0xdc7bfd11,\n    (q31_t)0xabb4141,  (q31_t)0xdc8671f3, (q31_t)0xab44b1f,  (q31_t)0xdc90e834,\n    (q31_t)0xaad570c,  (q31_t)0xdc9b5fd2, (q31_t)0xaa66506,  (q31_t)0xdca5d8cd,\n    (q31_t)0xa9f750f,  (q31_t)0xdcb05326, (q31_t)0xa988727,  (q31_t)0xdcbacedb,\n    (q31_t)0xa919b4e,  (q31_t)0xdcc54bec, (q31_t)0xa8ab184,  (q31_t)0xdccfca59,\n    (q31_t)0xa83c9ca,  (q31_t)0xdcda4a21, (q31_t)0xa7ce420,  (q31_t)0xdce4cb44,\n    (q31_t)0xa760086,  (q31_t)0xdcef4dc2, (q31_t)0xa6f1efc,  (q31_t)0xdcf9d199,\n    (q31_t)0xa683f83,  (q31_t)0xdd0456ca, (q31_t)0xa61621b,  (q31_t)0xdd0edd55,\n    (q31_t)0xa5a86c4,  (q31_t)0xdd196538, (q31_t)0xa53ad7e,  (q31_t)0xdd23ee74,\n    (q31_t)0xa4cd64b,  (q31_t)0xdd2e7908, (q31_t)0xa460129,  (q31_t)0xdd3904f4,\n    (q31_t)0xa3f2e19,  (q31_t)0xdd439236, (q31_t)0xa385d1d,  (q31_t)0xdd4e20d0,\n    (q31_t)0xa318e32,  (q31_t)0xdd58b0c0, (q31_t)0xa2ac15b,  (q31_t)0xdd634206,\n    (q31_t)0xa23f698,  (q31_t)0xdd6dd4a2, (q31_t)0xa1d2de7,  (q31_t)0xdd786892,\n    (q31_t)0xa16674b,  (q31_t)0xdd82fdd8, (q31_t)0xa0fa2c3,  (q31_t)0xdd8d9472,\n    (q31_t)0xa08e04f,  (q31_t)0xdd982c60, (q31_t)0xa021fef,  (q31_t)0xdda2c5a2,\n    (q31_t)0x9fb61a5,  (q31_t)0xddad6036, (q31_t)0x9f4a570,  (q31_t)0xddb7fc1e,\n    (q31_t)0x9edeb50,  (q31_t)0xddc29958, (q31_t)0x9e73346,  (q31_t)0xddcd37e4,\n    (q31_t)0x9e07d51,  (q31_t)0xddd7d7c1, (q31_t)0x9d9c973,  (q31_t)0xdde278ef,\n    (q31_t)0x9d317ab,  (q31_t)0xdded1b6e, (q31_t)0x9cc67fa,  (q31_t)0xddf7bf3e,\n    (q31_t)0x9c5ba60,  (q31_t)0xde02645d, (q31_t)0x9bf0edd,  (q31_t)0xde0d0acc,\n    (q31_t)0x9b86572,  (q31_t)0xde17b28a, (q31_t)0x9b1be1e,  (q31_t)0xde225b96,\n    (q31_t)0x9ab18e3,  (q31_t)0xde2d05f1, (q31_t)0x9a475bf,  (q31_t)0xde37b199,\n    (q31_t)0x99dd4b4,  (q31_t)0xde425e8f, (q31_t)0x99735c2,  (q31_t)0xde4d0cd2,\n    (q31_t)0x99098e9,  (q31_t)0xde57bc62, (q31_t)0x989fe29,  (q31_t)0xde626d3e,\n    (q31_t)0x9836582,  (q31_t)0xde6d1f65, (q31_t)0x97ccef5,  (q31_t)0xde77d2d8,\n    (q31_t)0x9763a83,  (q31_t)0xde828796, (q31_t)0x96fa82a,  (q31_t)0xde8d3d9e,\n    (q31_t)0x96917ec,  (q31_t)0xde97f4f1, (q31_t)0x96289c9,  (q31_t)0xdea2ad8d,\n    (q31_t)0x95bfdc1,  (q31_t)0xdead6773, (q31_t)0x95573d4,  (q31_t)0xdeb822a1,\n    (q31_t)0x94eec03,  (q31_t)0xdec2df18, (q31_t)0x948664d,  (q31_t)0xdecd9cd7,\n    (q31_t)0x941e2b4,  (q31_t)0xded85bdd, (q31_t)0x93b6137,  (q31_t)0xdee31c2b,\n    (q31_t)0x934e1d6,  (q31_t)0xdeedddc0, (q31_t)0x92e6492,  (q31_t)0xdef8a09b,\n    (q31_t)0x927e96b,  (q31_t)0xdf0364bc, (q31_t)0x9217062,  (q31_t)0xdf0e2a22,\n    (q31_t)0x91af976,  (q31_t)0xdf18f0ce, (q31_t)0x91484a8,  (q31_t)0xdf23b8be,\n    (q31_t)0x90e11f7,  (q31_t)0xdf2e81f3, (q31_t)0x907a166,  (q31_t)0xdf394c6b,\n    (q31_t)0x90132f2,  (q31_t)0xdf441828, (q31_t)0x8fac69e,  (q31_t)0xdf4ee527,\n    (q31_t)0x8f45c68,  (q31_t)0xdf59b369, (q31_t)0x8edf452,  (q31_t)0xdf6482ed,\n    (q31_t)0x8e78e5b,  (q31_t)0xdf6f53b3, (q31_t)0x8e12a84,  (q31_t)0xdf7a25ba,\n    (q31_t)0x8dac8cd,  (q31_t)0xdf84f902, (q31_t)0x8d46936,  (q31_t)0xdf8fcd8b,\n    (q31_t)0x8ce0bc0,  (q31_t)0xdf9aa354, (q31_t)0x8c7b06b,  (q31_t)0xdfa57a5d,\n    (q31_t)0x8c15736,  (q31_t)0xdfb052a5, (q31_t)0x8bb0023,  (q31_t)0xdfbb2c2c,\n    (q31_t)0x8b4ab32,  (q31_t)0xdfc606f1, (q31_t)0x8ae5862,  (q31_t)0xdfd0e2f5,\n    (q31_t)0x8a807b4,  (q31_t)0xdfdbc036, (q31_t)0x8a1b928,  (q31_t)0xdfe69eb4,\n    (q31_t)0x89b6cbf,  (q31_t)0xdff17e70, (q31_t)0x8952278,  (q31_t)0xdffc5f67,\n    (q31_t)0x88eda54,  (q31_t)0xe007419b, (q31_t)0x8889454,  (q31_t)0xe012250a,\n    (q31_t)0x8825077,  (q31_t)0xe01d09b4, (q31_t)0x87c0ebd,  (q31_t)0xe027ef99,\n    (q31_t)0x875cf28,  (q31_t)0xe032d6b8, (q31_t)0x86f91b7,  (q31_t)0xe03dbf11,\n    (q31_t)0x869566a,  (q31_t)0xe048a8a4, (q31_t)0x8631d42,  (q31_t)0xe053936f,\n    (q31_t)0x85ce63e,  (q31_t)0xe05e7f74, (q31_t)0x856b160,  (q31_t)0xe0696cb0,\n    (q31_t)0x8507ea7,  (q31_t)0xe0745b24, (q31_t)0x84a4e14,  (q31_t)0xe07f4acf,\n    (q31_t)0x8441fa6,  (q31_t)0xe08a3bb2, (q31_t)0x83df35f,  (q31_t)0xe0952dcb,\n    (q31_t)0x837c93e,  (q31_t)0xe0a0211a, (q31_t)0x831a143,  (q31_t)0xe0ab159e,\n    (q31_t)0x82b7b70,  (q31_t)0xe0b60b58, (q31_t)0x82557c3,  (q31_t)0xe0c10247,\n    (q31_t)0x81f363d,  (q31_t)0xe0cbfa6a, (q31_t)0x81916df,  (q31_t)0xe0d6f3c1,\n    (q31_t)0x812f9a9,  (q31_t)0xe0e1ee4b, (q31_t)0x80cde9b,  (q31_t)0xe0ecea09,\n    (q31_t)0x806c5b5,  (q31_t)0xe0f7e6f9, (q31_t)0x800aef7,  (q31_t)0xe102e51c,\n    (q31_t)0x7fa9a62,  (q31_t)0xe10de470, (q31_t)0x7f487f6,  (q31_t)0xe118e4f6,\n    (q31_t)0x7ee77b3,  (q31_t)0xe123e6ad, (q31_t)0x7e8699a,  (q31_t)0xe12ee995,\n    (q31_t)0x7e25daa,  (q31_t)0xe139edac, (q31_t)0x7dc53e3,  (q31_t)0xe144f2f3,\n    (q31_t)0x7d64c47,  (q31_t)0xe14ff96a, (q31_t)0x7d046d6,  (q31_t)0xe15b0110,\n    (q31_t)0x7ca438f,  (q31_t)0xe16609e3, (q31_t)0x7c44272,  (q31_t)0xe17113e5,\n    (q31_t)0x7be4381,  (q31_t)0xe17c1f15, (q31_t)0x7b846ba,  (q31_t)0xe1872b72,\n    (q31_t)0x7b24c20,  (q31_t)0xe19238fb, (q31_t)0x7ac53b1,  (q31_t)0xe19d47b1,\n    (q31_t)0x7a65d6e,  (q31_t)0xe1a85793, (q31_t)0x7a06957,  (q31_t)0xe1b368a0,\n    (q31_t)0x79a776c,  (q31_t)0xe1be7ad8, (q31_t)0x79487ae,  (q31_t)0xe1c98e3b,\n    (q31_t)0x78e9a1d,  (q31_t)0xe1d4a2c8, (q31_t)0x788aeb9,  (q31_t)0xe1dfb87f,\n    (q31_t)0x782c582,  (q31_t)0xe1eacf5f, (q31_t)0x77cde79,  (q31_t)0xe1f5e768,\n    (q31_t)0x776f99d,  (q31_t)0xe2010099, (q31_t)0x77116f0,  (q31_t)0xe20c1af3,\n    (q31_t)0x76b3671,  (q31_t)0xe2173674, (q31_t)0x7655820,  (q31_t)0xe222531c,\n    (q31_t)0x75f7bfe,  (q31_t)0xe22d70eb, (q31_t)0x759a20a,  (q31_t)0xe2388fe1,\n    (q31_t)0x753ca46,  (q31_t)0xe243affc, (q31_t)0x74df4b1,  (q31_t)0xe24ed13d,\n    (q31_t)0x748214c,  (q31_t)0xe259f3a3, (q31_t)0x7425016,  (q31_t)0xe265172e,\n    (q31_t)0x73c8111,  (q31_t)0xe2703bdc, (q31_t)0x736b43c,  (q31_t)0xe27b61af,\n    (q31_t)0x730e997,  (q31_t)0xe28688a4, (q31_t)0x72b2123,  (q31_t)0xe291b0bd,\n    (q31_t)0x7255ae0,  (q31_t)0xe29cd9f8, (q31_t)0x71f96ce,  (q31_t)0xe2a80456,\n    (q31_t)0x719d4ed,  (q31_t)0xe2b32fd4, (q31_t)0x714153e,  (q31_t)0xe2be5c74,\n    (q31_t)0x70e57c0,  (q31_t)0xe2c98a35, (q31_t)0x7089c75,  (q31_t)0xe2d4b916,\n    (q31_t)0x702e35c,  (q31_t)0xe2dfe917, (q31_t)0x6fd2c75,  (q31_t)0xe2eb1a37,\n    (q31_t)0x6f777c1,  (q31_t)0xe2f64c77, (q31_t)0x6f1c540,  (q31_t)0xe3017fd5,\n    (q31_t)0x6ec14f2,  (q31_t)0xe30cb451, (q31_t)0x6e666d7,  (q31_t)0xe317e9eb,\n    (q31_t)0x6e0baf0,  (q31_t)0xe32320a2, (q31_t)0x6db113d,  (q31_t)0xe32e5876,\n    (q31_t)0x6d569be,  (q31_t)0xe3399167, (q31_t)0x6cfc472,  (q31_t)0xe344cb73,\n    (q31_t)0x6ca215c,  (q31_t)0xe350069b, (q31_t)0x6c4807a,  (q31_t)0xe35b42df,\n    (q31_t)0x6bee1cd,  (q31_t)0xe366803c, (q31_t)0x6b94554,  (q31_t)0xe371beb5,\n    (q31_t)0x6b3ab12,  (q31_t)0xe37cfe47, (q31_t)0x6ae1304,  (q31_t)0xe3883ef2,\n    (q31_t)0x6a87d2d,  (q31_t)0xe39380b6, (q31_t)0x6a2e98b,  (q31_t)0xe39ec393,\n    (q31_t)0x69d5820,  (q31_t)0xe3aa0788, (q31_t)0x697c8eb,  (q31_t)0xe3b54c95,\n    (q31_t)0x6923bec,  (q31_t)0xe3c092b9, (q31_t)0x68cb124,  (q31_t)0xe3cbd9f4,\n    (q31_t)0x6872894,  (q31_t)0xe3d72245, (q31_t)0x681a23a,  (q31_t)0xe3e26bac,\n    (q31_t)0x67c1e18,  (q31_t)0xe3edb628, (q31_t)0x6769c2e,  (q31_t)0xe3f901ba,\n    (q31_t)0x6711c7b,  (q31_t)0xe4044e60, (q31_t)0x66b9f01,  (q31_t)0xe40f9c1a,\n    (q31_t)0x66623be,  (q31_t)0xe41aeae8, (q31_t)0x660aab5,  (q31_t)0xe4263ac9,\n    (q31_t)0x65b33e4,  (q31_t)0xe4318bbe, (q31_t)0x655bf4c,  (q31_t)0xe43cddc4,\n    (q31_t)0x6504ced,  (q31_t)0xe44830dd, (q31_t)0x64adcc7,  (q31_t)0xe4538507,\n    (q31_t)0x6456edb,  (q31_t)0xe45eda43, (q31_t)0x6400329,  (q31_t)0xe46a308f,\n    (q31_t)0x63a99b1,  (q31_t)0xe47587eb, (q31_t)0x6353273,  (q31_t)0xe480e057,\n    (q31_t)0x62fcd6f,  (q31_t)0xe48c39d3, (q31_t)0x62a6aa6,  (q31_t)0xe497945d,\n    (q31_t)0x6250a18,  (q31_t)0xe4a2eff6, (q31_t)0x61fabc4,  (q31_t)0xe4ae4c9d,\n    (q31_t)0x61a4fac,  (q31_t)0xe4b9aa52, (q31_t)0x614f5cf,  (q31_t)0xe4c50914,\n    (q31_t)0x60f9e2e,  (q31_t)0xe4d068e2, (q31_t)0x60a48c9,  (q31_t)0xe4dbc9bd,\n    (q31_t)0x604f5a0,  (q31_t)0xe4e72ba4, (q31_t)0x5ffa4b3,  (q31_t)0xe4f28e96,\n    (q31_t)0x5fa5603,  (q31_t)0xe4fdf294, (q31_t)0x5f5098f,  (q31_t)0xe509579b,\n    (q31_t)0x5efbf58,  (q31_t)0xe514bdad, (q31_t)0x5ea775e,  (q31_t)0xe52024c9,\n    (q31_t)0x5e531a1,  (q31_t)0xe52b8cee, (q31_t)0x5dfee22,  (q31_t)0xe536f61b,\n    (q31_t)0x5daace1,  (q31_t)0xe5426051, (q31_t)0x5d56ddd,  (q31_t)0xe54dcb8f,\n    (q31_t)0x5d03118,  (q31_t)0xe55937d5, (q31_t)0x5caf690,  (q31_t)0xe564a521,\n    (q31_t)0x5c5be47,  (q31_t)0xe5701374, (q31_t)0x5c0883d,  (q31_t)0xe57b82cd,\n    (q31_t)0x5bb5472,  (q31_t)0xe586f32c, (q31_t)0x5b622e6,  (q31_t)0xe5926490,\n    (q31_t)0x5b0f399,  (q31_t)0xe59dd6f9, (q31_t)0x5abc68c,  (q31_t)0xe5a94a67,\n    (q31_t)0x5a69bbe,  (q31_t)0xe5b4bed8, (q31_t)0x5a17330,  (q31_t)0xe5c0344d,\n    (q31_t)0x59c4ce3,  (q31_t)0xe5cbaac5, (q31_t)0x59728d5,  (q31_t)0xe5d72240,\n    (q31_t)0x5920708,  (q31_t)0xe5e29abc, (q31_t)0x58ce77c,  (q31_t)0xe5ee143b,\n    (q31_t)0x587ca31,  (q31_t)0xe5f98ebb, (q31_t)0x582af26,  (q31_t)0xe6050a3b,\n    (q31_t)0x57d965d,  (q31_t)0xe61086bc, (q31_t)0x5787fd6,  (q31_t)0xe61c043d,\n    (q31_t)0x5736b90,  (q31_t)0xe62782be, (q31_t)0x56e598c,  (q31_t)0xe633023e,\n    (q31_t)0x56949ca,  (q31_t)0xe63e82bc, (q31_t)0x5643c4a,  (q31_t)0xe64a0438,\n    (q31_t)0x55f310d,  (q31_t)0xe65586b3, (q31_t)0x55a2812,  (q31_t)0xe6610a2a,\n    (q31_t)0x555215a,  (q31_t)0xe66c8e9f, (q31_t)0x5501ce5,  (q31_t)0xe6781410,\n    (q31_t)0x54b1ab4,  (q31_t)0xe6839a7c, (q31_t)0x5461ac6,  (q31_t)0xe68f21e5,\n    (q31_t)0x5411d1b,  (q31_t)0xe69aaa48, (q31_t)0x53c21b4,  (q31_t)0xe6a633a6,\n    (q31_t)0x5372891,  (q31_t)0xe6b1bdff, (q31_t)0x53231b3,  (q31_t)0xe6bd4951,\n    (q31_t)0x52d3d18,  (q31_t)0xe6c8d59c, (q31_t)0x5284ac3,  (q31_t)0xe6d462e1,\n    (q31_t)0x5235ab2,  (q31_t)0xe6dff11d, (q31_t)0x51e6ce6,  (q31_t)0xe6eb8052,\n    (q31_t)0x519815f,  (q31_t)0xe6f7107e, (q31_t)0x514981d,  (q31_t)0xe702a1a1,\n    (q31_t)0x50fb121,  (q31_t)0xe70e33bb, (q31_t)0x50acc6b,  (q31_t)0xe719c6cb,\n    (q31_t)0x505e9fb,  (q31_t)0xe7255ad1, (q31_t)0x50109d0,  (q31_t)0xe730efcc,\n    (q31_t)0x4fc2bec,  (q31_t)0xe73c85bc, (q31_t)0x4f7504e,  (q31_t)0xe7481ca1,\n    (q31_t)0x4f276f7,  (q31_t)0xe753b479, (q31_t)0x4ed9fe7,  (q31_t)0xe75f4d45,\n    (q31_t)0x4e8cb1e,  (q31_t)0xe76ae704, (q31_t)0x4e3f89c,  (q31_t)0xe77681b6,\n    (q31_t)0x4df2862,  (q31_t)0xe7821d59, (q31_t)0x4da5a6f,  (q31_t)0xe78db9ef,\n    (q31_t)0x4d58ec3,  (q31_t)0xe7995776, (q31_t)0x4d0c560,  (q31_t)0xe7a4f5ed,\n    (q31_t)0x4cbfe45,  (q31_t)0xe7b09555, (q31_t)0x4c73972,  (q31_t)0xe7bc35ad,\n    (q31_t)0x4c276e8,  (q31_t)0xe7c7d6f4, (q31_t)0x4bdb6a6,  (q31_t)0xe7d3792b,\n    (q31_t)0x4b8f8ad,  (q31_t)0xe7df1c50, (q31_t)0x4b43cfd,  (q31_t)0xe7eac063,\n    (q31_t)0x4af8397,  (q31_t)0xe7f66564, (q31_t)0x4aacc7a,  (q31_t)0xe8020b52,\n    (q31_t)0x4a617a6,  (q31_t)0xe80db22d, (q31_t)0x4a1651c,  (q31_t)0xe81959f4,\n    (q31_t)0x49cb4dd,  (q31_t)0xe82502a7, (q31_t)0x49806e7,  (q31_t)0xe830ac45,\n    (q31_t)0x4935b3c,  (q31_t)0xe83c56cf, (q31_t)0x48eb1db,  (q31_t)0xe8480243,\n    (q31_t)0x48a0ac4,  (q31_t)0xe853aea1, (q31_t)0x48565f9,  (q31_t)0xe85f5be9,\n    (q31_t)0x480c379,  (q31_t)0xe86b0a1a, (q31_t)0x47c2344,  (q31_t)0xe876b934,\n    (q31_t)0x477855a,  (q31_t)0xe8826936, (q31_t)0x472e9bc,  (q31_t)0xe88e1a20,\n    (q31_t)0x46e5069,  (q31_t)0xe899cbf1, (q31_t)0x469b963,  (q31_t)0xe8a57ea9,\n    (q31_t)0x46524a9,  (q31_t)0xe8b13248, (q31_t)0x460923b,  (q31_t)0xe8bce6cd,\n    (q31_t)0x45c0219,  (q31_t)0xe8c89c37, (q31_t)0x4577444,  (q31_t)0xe8d45286,\n    (q31_t)0x452e8bc,  (q31_t)0xe8e009ba, (q31_t)0x44e5f80,  (q31_t)0xe8ebc1d3,\n    (q31_t)0x449d892,  (q31_t)0xe8f77acf, (q31_t)0x44553f2,  (q31_t)0xe90334af,\n    (q31_t)0x440d19e,  (q31_t)0xe90eef71, (q31_t)0x43c5199,  (q31_t)0xe91aab16,\n    (q31_t)0x437d3e1,  (q31_t)0xe926679c, (q31_t)0x4335877,  (q31_t)0xe9322505,\n    (q31_t)0x42edf5c,  (q31_t)0xe93de34e, (q31_t)0x42a688f,  (q31_t)0xe949a278,\n    (q31_t)0x425f410,  (q31_t)0xe9556282, (q31_t)0x42181e0,  (q31_t)0xe961236c,\n    (q31_t)0x41d11ff,  (q31_t)0xe96ce535, (q31_t)0x418a46d,  (q31_t)0xe978a7dd,\n    (q31_t)0x414392b,  (q31_t)0xe9846b63, (q31_t)0x40fd037,  (q31_t)0xe9902fc7,\n    (q31_t)0x40b6994,  (q31_t)0xe99bf509, (q31_t)0x4070540,  (q31_t)0xe9a7bb28,\n    (q31_t)0x402a33c,  (q31_t)0xe9b38223, (q31_t)0x3fe4388,  (q31_t)0xe9bf49fa,\n    (q31_t)0x3f9e624,  (q31_t)0xe9cb12ad, (q31_t)0x3f58b10,  (q31_t)0xe9d6dc3b,\n    (q31_t)0x3f1324e,  (q31_t)0xe9e2a6a3, (q31_t)0x3ecdbdc,  (q31_t)0xe9ee71e6,\n    (q31_t)0x3e887bb,  (q31_t)0xe9fa3e03, (q31_t)0x3e435ea,  (q31_t)0xea060af9,\n    (q31_t)0x3dfe66c,  (q31_t)0xea11d8c8, (q31_t)0x3db993e,  (q31_t)0xea1da770,\n    (q31_t)0x3d74e62,  (q31_t)0xea2976ef, (q31_t)0x3d305d8,  (q31_t)0xea354746,\n    (q31_t)0x3cebfa0,  (q31_t)0xea411874, (q31_t)0x3ca7bba,  (q31_t)0xea4cea79,\n    (q31_t)0x3c63a26,  (q31_t)0xea58bd54, (q31_t)0x3c1fae5,  (q31_t)0xea649105,\n    (q31_t)0x3bdbdf6,  (q31_t)0xea70658a, (q31_t)0x3b9835a,  (q31_t)0xea7c3ae5,\n    (q31_t)0x3b54b11,  (q31_t)0xea881114, (q31_t)0x3b1151b,  (q31_t)0xea93e817,\n    (q31_t)0x3ace178,  (q31_t)0xea9fbfed, (q31_t)0x3a8b028,  (q31_t)0xeaab9896,\n    (q31_t)0x3a4812c,  (q31_t)0xeab77212, (q31_t)0x3a05484,  (q31_t)0xeac34c60,\n    (q31_t)0x39c2a2f,  (q31_t)0xeacf277f, (q31_t)0x398022f,  (q31_t)0xeadb0370,\n    (q31_t)0x393dc82,  (q31_t)0xeae6e031, (q31_t)0x38fb92a,  (q31_t)0xeaf2bdc3,\n    (q31_t)0x38b9827,  (q31_t)0xeafe9c24, (q31_t)0x3877978,  (q31_t)0xeb0a7b54,\n    (q31_t)0x3835d1e,  (q31_t)0xeb165b54, (q31_t)0x37f4319,  (q31_t)0xeb223c22,\n    (q31_t)0x37b2b6a,  (q31_t)0xeb2e1dbe, (q31_t)0x377160f,  (q31_t)0xeb3a0027,\n    (q31_t)0x373030a,  (q31_t)0xeb45e35d, (q31_t)0x36ef25b,  (q31_t)0xeb51c760,\n    (q31_t)0x36ae401,  (q31_t)0xeb5dac2f, (q31_t)0x366d7fd,  (q31_t)0xeb6991ca,\n    (q31_t)0x362ce50,  (q31_t)0xeb75782f, (q31_t)0x35ec6f8,  (q31_t)0xeb815f60,\n    (q31_t)0x35ac1f7,  (q31_t)0xeb8d475b, (q31_t)0x356bf4d,  (q31_t)0xeb99301f,\n    (q31_t)0x352bef9,  (q31_t)0xeba519ad, (q31_t)0x34ec0fc,  (q31_t)0xebb10404,\n    (q31_t)0x34ac556,  (q31_t)0xebbcef23, (q31_t)0x346cc07,  (q31_t)0xebc8db0b,\n    (q31_t)0x342d510,  (q31_t)0xebd4c7ba, (q31_t)0x33ee070,  (q31_t)0xebe0b52f,\n    (q31_t)0x33aee27,  (q31_t)0xebeca36c, (q31_t)0x336fe37,  (q31_t)0xebf8926f,\n    (q31_t)0x333109e,  (q31_t)0xec048237, (q31_t)0x32f255e,  (q31_t)0xec1072c4,\n    (q31_t)0x32b3c75,  (q31_t)0xec1c6417, (q31_t)0x32755e5,  (q31_t)0xec28562d,\n    (q31_t)0x32371ae,  (q31_t)0xec344908, (q31_t)0x31f8fcf,  (q31_t)0xec403ca5,\n    (q31_t)0x31bb049,  (q31_t)0xec4c3106, (q31_t)0x317d31c,  (q31_t)0xec582629,\n    (q31_t)0x313f848,  (q31_t)0xec641c0e, (q31_t)0x3101fce,  (q31_t)0xec7012b5,\n    (q31_t)0x30c49ad,  (q31_t)0xec7c0a1d, (q31_t)0x30875e5,  (q31_t)0xec880245,\n    (q31_t)0x304a477,  (q31_t)0xec93fb2e, (q31_t)0x300d563,  (q31_t)0xec9ff4d6,\n    (q31_t)0x2fd08a9,  (q31_t)0xecabef3d, (q31_t)0x2f93e4a,  (q31_t)0xecb7ea63,\n    (q31_t)0x2f57644,  (q31_t)0xecc3e648, (q31_t)0x2f1b099,  (q31_t)0xeccfe2ea,\n    (q31_t)0x2eded49,  (q31_t)0xecdbe04a, (q31_t)0x2ea2c53,  (q31_t)0xece7de66,\n    (q31_t)0x2e66db8,  (q31_t)0xecf3dd3f, (q31_t)0x2e2b178,  (q31_t)0xecffdcd4,\n    (q31_t)0x2def794,  (q31_t)0xed0bdd25, (q31_t)0x2db400a,  (q31_t)0xed17de31,\n    (q31_t)0x2d78add,  (q31_t)0xed23dff7, (q31_t)0x2d3d80a,  (q31_t)0xed2fe277,\n    (q31_t)0x2d02794,  (q31_t)0xed3be5b1, (q31_t)0x2cc7979,  (q31_t)0xed47e9a5,\n    (q31_t)0x2c8cdbb,  (q31_t)0xed53ee51, (q31_t)0x2c52459,  (q31_t)0xed5ff3b5,\n    (q31_t)0x2c17d52,  (q31_t)0xed6bf9d1, (q31_t)0x2bdd8a9,  (q31_t)0xed7800a5,\n    (q31_t)0x2ba365c,  (q31_t)0xed84082f, (q31_t)0x2b6966c,  (q31_t)0xed901070,\n    (q31_t)0x2b2f8d8,  (q31_t)0xed9c1967, (q31_t)0x2af5da2,  (q31_t)0xeda82313,\n    (q31_t)0x2abc4c9,  (q31_t)0xedb42d74, (q31_t)0x2a82e4d,  (q31_t)0xedc0388a,\n    (q31_t)0x2a49a2e,  (q31_t)0xedcc4454, (q31_t)0x2a1086d,  (q31_t)0xedd850d2,\n    (q31_t)0x29d790a,  (q31_t)0xede45e03, (q31_t)0x299ec05,  (q31_t)0xedf06be6,\n    (q31_t)0x296615d,  (q31_t)0xedfc7a7c, (q31_t)0x292d914,  (q31_t)0xee0889c4,\n    (q31_t)0x28f5329,  (q31_t)0xee1499bd, (q31_t)0x28bcf9c,  (q31_t)0xee20aa67,\n    (q31_t)0x2884e6e,  (q31_t)0xee2cbbc1, (q31_t)0x284cf9f,  (q31_t)0xee38cdcb,\n    (q31_t)0x281532e,  (q31_t)0xee44e084, (q31_t)0x27dd91c,  (q31_t)0xee50f3ed,\n    (q31_t)0x27a616a,  (q31_t)0xee5d0804, (q31_t)0x276ec16,  (q31_t)0xee691cc9,\n    (q31_t)0x2737922,  (q31_t)0xee75323c, (q31_t)0x270088e,  (q31_t)0xee81485c,\n    (q31_t)0x26c9a58,  (q31_t)0xee8d5f29, (q31_t)0x2692e83,  (q31_t)0xee9976a1,\n    (q31_t)0x265c50e,  (q31_t)0xeea58ec6, (q31_t)0x2625df8,  (q31_t)0xeeb1a796,\n    (q31_t)0x25ef943,  (q31_t)0xeebdc110, (q31_t)0x25b96ee,  (q31_t)0xeec9db35,\n    (q31_t)0x25836f9,  (q31_t)0xeed5f604, (q31_t)0x254d965,  (q31_t)0xeee2117c,\n    (q31_t)0x2517e31,  (q31_t)0xeeee2d9d, (q31_t)0x24e255e,  (q31_t)0xeefa4a67,\n    (q31_t)0x24aceed,  (q31_t)0xef0667d9, (q31_t)0x2477adc,  (q31_t)0xef1285f2,\n    (q31_t)0x244292c,  (q31_t)0xef1ea4b2, (q31_t)0x240d9de,  (q31_t)0xef2ac419,\n    (q31_t)0x23d8cf1,  (q31_t)0xef36e426, (q31_t)0x23a4265,  (q31_t)0xef4304d8,\n    (q31_t)0x236fa3b,  (q31_t)0xef4f2630, (q31_t)0x233b473,  (q31_t)0xef5b482d,\n    (q31_t)0x230710d,  (q31_t)0xef676ace, (q31_t)0x22d3009,  (q31_t)0xef738e12,\n    (q31_t)0x229f167,  (q31_t)0xef7fb1fa, (q31_t)0x226b528,  (q31_t)0xef8bd685,\n    (q31_t)0x2237b4b,  (q31_t)0xef97fbb2, (q31_t)0x22043d0,  (q31_t)0xefa42181,\n    (q31_t)0x21d0eb8,  (q31_t)0xefb047f2, (q31_t)0x219dc03,  (q31_t)0xefbc6f03,\n    (q31_t)0x216abb1,  (q31_t)0xefc896b5, (q31_t)0x2137dc2,  (q31_t)0xefd4bf08,\n    (q31_t)0x2105236,  (q31_t)0xefe0e7f9, (q31_t)0x20d290d,  (q31_t)0xefed118a,\n    (q31_t)0x20a0248,  (q31_t)0xeff93bba, (q31_t)0x206dde6,  (q31_t)0xf0056687,\n    (q31_t)0x203bbe8,  (q31_t)0xf01191f3, (q31_t)0x2009c4e,  (q31_t)0xf01dbdfb,\n    (q31_t)0x1fd7f17,  (q31_t)0xf029eaa1, (q31_t)0x1fa6445,  (q31_t)0xf03617e2,\n    (q31_t)0x1f74bd6,  (q31_t)0xf04245c0, (q31_t)0x1f435cc,  (q31_t)0xf04e7438,\n    (q31_t)0x1f12227,  (q31_t)0xf05aa34c, (q31_t)0x1ee10e5,  (q31_t)0xf066d2fa,\n    (q31_t)0x1eb0209,  (q31_t)0xf0730342, (q31_t)0x1e7f591,  (q31_t)0xf07f3424,\n    (q31_t)0x1e4eb7e,  (q31_t)0xf08b659f, (q31_t)0x1e1e3d0,  (q31_t)0xf09797b2,\n    (q31_t)0x1dede87,  (q31_t)0xf0a3ca5d, (q31_t)0x1dbdba3,  (q31_t)0xf0affda0,\n    (q31_t)0x1d8db25,  (q31_t)0xf0bc317a, (q31_t)0x1d5dd0c,  (q31_t)0xf0c865ea,\n    (q31_t)0x1d2e158,  (q31_t)0xf0d49af1, (q31_t)0x1cfe80a,  (q31_t)0xf0e0d08d,\n    (q31_t)0x1ccf122,  (q31_t)0xf0ed06bf, (q31_t)0x1c9fca0,  (q31_t)0xf0f93d86,\n    (q31_t)0x1c70a84,  (q31_t)0xf10574e0, (q31_t)0x1c41ace,  (q31_t)0xf111accf,\n    (q31_t)0x1c12d7e,  (q31_t)0xf11de551, (q31_t)0x1be4294,  (q31_t)0xf12a1e66,\n    (q31_t)0x1bb5a11,  (q31_t)0xf136580d, (q31_t)0x1b873f5,  (q31_t)0xf1429247,\n    (q31_t)0x1b5903f,  (q31_t)0xf14ecd11, (q31_t)0x1b2aef0,  (q31_t)0xf15b086d,\n    (q31_t)0x1afd007,  (q31_t)0xf1674459, (q31_t)0x1acf386,  (q31_t)0xf17380d6,\n    (q31_t)0x1aa196c,  (q31_t)0xf17fbde2, (q31_t)0x1a741b9,  (q31_t)0xf18bfb7d,\n    (q31_t)0x1a46c6e,  (q31_t)0xf19839a6, (q31_t)0x1a1998a,  (q31_t)0xf1a4785e,\n    (q31_t)0x19ec90d,  (q31_t)0xf1b0b7a4, (q31_t)0x19bfaf9,  (q31_t)0xf1bcf777,\n    (q31_t)0x1992f4c,  (q31_t)0xf1c937d6, (q31_t)0x1966606,  (q31_t)0xf1d578c2,\n    (q31_t)0x1939f29,  (q31_t)0xf1e1ba3a, (q31_t)0x190dab4,  (q31_t)0xf1edfc3d,\n    (q31_t)0x18e18a7,  (q31_t)0xf1fa3ecb, (q31_t)0x18b5903,  (q31_t)0xf20681e3,\n    (q31_t)0x1889bc6,  (q31_t)0xf212c585, (q31_t)0x185e0f3,  (q31_t)0xf21f09b1,\n    (q31_t)0x1832888,  (q31_t)0xf22b4e66, (q31_t)0x1807285,  (q31_t)0xf23793a3,\n    (q31_t)0x17dbeec,  (q31_t)0xf243d968, (q31_t)0x17b0dbb,  (q31_t)0xf2501fb5,\n    (q31_t)0x1785ef4,  (q31_t)0xf25c6688, (q31_t)0x175b296,  (q31_t)0xf268ade3,\n    (q31_t)0x17308a1,  (q31_t)0xf274f5c3, (q31_t)0x1706115,  (q31_t)0xf2813e2a,\n    (q31_t)0x16dbbf3,  (q31_t)0xf28d8715, (q31_t)0x16b193a,  (q31_t)0xf299d085,\n    (q31_t)0x16878eb,  (q31_t)0xf2a61a7a, (q31_t)0x165db05,  (q31_t)0xf2b264f2,\n    (q31_t)0x1633f8a,  (q31_t)0xf2beafed, (q31_t)0x160a678,  (q31_t)0xf2cafb6b,\n    (q31_t)0x15e0fd1,  (q31_t)0xf2d7476c, (q31_t)0x15b7b94,  (q31_t)0xf2e393ef,\n    (q31_t)0x158e9c1,  (q31_t)0xf2efe0f2, (q31_t)0x1565a58,  (q31_t)0xf2fc2e77,\n    (q31_t)0x153cd5a,  (q31_t)0xf3087c7d, (q31_t)0x15142c6,  (q31_t)0xf314cb02,\n    (q31_t)0x14eba9d,  (q31_t)0xf3211a07, (q31_t)0x14c34df,  (q31_t)0xf32d698a,\n    (q31_t)0x149b18b,  (q31_t)0xf339b98d, (q31_t)0x14730a3,  (q31_t)0xf3460a0d,\n    (q31_t)0x144b225,  (q31_t)0xf3525b0b, (q31_t)0x1423613,  (q31_t)0xf35eac86,\n    (q31_t)0x13fbc6c,  (q31_t)0xf36afe7e, (q31_t)0x13d4530,  (q31_t)0xf37750f2,\n    (q31_t)0x13ad060,  (q31_t)0xf383a3e2, (q31_t)0x1385dfb,  (q31_t)0xf38ff74d,\n    (q31_t)0x135ee02,  (q31_t)0xf39c4b32, (q31_t)0x1338075,  (q31_t)0xf3a89f92,\n    (q31_t)0x1311553,  (q31_t)0xf3b4f46c, (q31_t)0x12eac9d,  (q31_t)0xf3c149bf,\n    (q31_t)0x12c4653,  (q31_t)0xf3cd9f8b, (q31_t)0x129e276,  (q31_t)0xf3d9f5cf,\n    (q31_t)0x1278104,  (q31_t)0xf3e64c8c, (q31_t)0x12521ff,  (q31_t)0xf3f2a3bf,\n    (q31_t)0x122c566,  (q31_t)0xf3fefb6a, (q31_t)0x1206b39,  (q31_t)0xf40b538b,\n    (q31_t)0x11e1379,  (q31_t)0xf417ac22, (q31_t)0x11bbe26,  (q31_t)0xf424052f,\n    (q31_t)0x1196b3f,  (q31_t)0xf4305eb0, (q31_t)0x1171ac6,  (q31_t)0xf43cb8a7,\n    (q31_t)0x114ccb9,  (q31_t)0xf4491311, (q31_t)0x1128119,  (q31_t)0xf4556def,\n    (q31_t)0x11037e6,  (q31_t)0xf461c940, (q31_t)0x10df120,  (q31_t)0xf46e2504,\n    (q31_t)0x10bacc8,  (q31_t)0xf47a8139, (q31_t)0x1096add,  (q31_t)0xf486dde1,\n    (q31_t)0x1072b5f,  (q31_t)0xf4933afa, (q31_t)0x104ee4f,  (q31_t)0xf49f9884,\n    (q31_t)0x102b3ac,  (q31_t)0xf4abf67e, (q31_t)0x1007b77,  (q31_t)0xf4b854e7,\n    (q31_t)0xfe45b0,   (q31_t)0xf4c4b3c0, (q31_t)0xfc1257,   (q31_t)0xf4d11308,\n    (q31_t)0xf9e16b,   (q31_t)0xf4dd72be, (q31_t)0xf7b2ee,   (q31_t)0xf4e9d2e3,\n    (q31_t)0xf586df,   (q31_t)0xf4f63374, (q31_t)0xf35d3e,   (q31_t)0xf5029473,\n    (q31_t)0xf1360b,   (q31_t)0xf50ef5de, (q31_t)0xef1147,   (q31_t)0xf51b57b5,\n    (q31_t)0xeceef1,   (q31_t)0xf527b9f7, (q31_t)0xeacf09,   (q31_t)0xf5341ca5,\n    (q31_t)0xe8b190,   (q31_t)0xf5407fbd, (q31_t)0xe69686,   (q31_t)0xf54ce33f,\n    (q31_t)0xe47deb,   (q31_t)0xf559472b, (q31_t)0xe267be,   (q31_t)0xf565ab80,\n    (q31_t)0xe05401,   (q31_t)0xf572103d, (q31_t)0xde42b2,   (q31_t)0xf57e7563,\n    (q31_t)0xdc33d2,   (q31_t)0xf58adaf0, (q31_t)0xda2762,   (q31_t)0xf59740e5,\n    (q31_t)0xd81d61,   (q31_t)0xf5a3a740, (q31_t)0xd615cf,   (q31_t)0xf5b00e02,\n    (q31_t)0xd410ad,   (q31_t)0xf5bc7529, (q31_t)0xd20dfa,   (q31_t)0xf5c8dcb6,\n    (q31_t)0xd00db6,   (q31_t)0xf5d544a7, (q31_t)0xce0fe3,   (q31_t)0xf5e1acfd,\n    (q31_t)0xcc147f,   (q31_t)0xf5ee15b7, (q31_t)0xca1b8a,   (q31_t)0xf5fa7ed4,\n    (q31_t)0xc82506,   (q31_t)0xf606e854, (q31_t)0xc630f2,   (q31_t)0xf6135237,\n    (q31_t)0xc43f4d,   (q31_t)0xf61fbc7b, (q31_t)0xc25019,   (q31_t)0xf62c2721,\n    (q31_t)0xc06355,   (q31_t)0xf6389228, (q31_t)0xbe7901,   (q31_t)0xf644fd8f,\n    (q31_t)0xbc911d,   (q31_t)0xf6516956, (q31_t)0xbaabaa,   (q31_t)0xf65dd57d,\n    (q31_t)0xb8c8a7,   (q31_t)0xf66a4203, (q31_t)0xb6e815,   (q31_t)0xf676aee8,\n    (q31_t)0xb509f3,   (q31_t)0xf6831c2b, (q31_t)0xb32e42,   (q31_t)0xf68f89cb,\n    (q31_t)0xb15502,   (q31_t)0xf69bf7c9, (q31_t)0xaf7e33,   (q31_t)0xf6a86623,\n    (q31_t)0xada9d4,   (q31_t)0xf6b4d4d9, (q31_t)0xabd7e6,   (q31_t)0xf6c143ec,\n    (q31_t)0xaa086a,   (q31_t)0xf6cdb359, (q31_t)0xa83b5e,   (q31_t)0xf6da2321,\n    (q31_t)0xa670c4,   (q31_t)0xf6e69344, (q31_t)0xa4a89b,   (q31_t)0xf6f303c0,\n    (q31_t)0xa2e2e3,   (q31_t)0xf6ff7496, (q31_t)0xa11f9d,   (q31_t)0xf70be5c4,\n    (q31_t)0x9f5ec8,   (q31_t)0xf718574b, (q31_t)0x9da065,   (q31_t)0xf724c92a,\n    (q31_t)0x9be473,   (q31_t)0xf7313b60, (q31_t)0x9a2af3,   (q31_t)0xf73daded,\n    (q31_t)0x9873e4,   (q31_t)0xf74a20d0, (q31_t)0x96bf48,   (q31_t)0xf756940a,\n    (q31_t)0x950d1d,   (q31_t)0xf7630799, (q31_t)0x935d64,   (q31_t)0xf76f7b7d,\n    (q31_t)0x91b01d,   (q31_t)0xf77befb5, (q31_t)0x900548,   (q31_t)0xf7886442,\n    (q31_t)0x8e5ce5,   (q31_t)0xf794d922, (q31_t)0x8cb6f5,   (q31_t)0xf7a14e55,\n    (q31_t)0x8b1376,   (q31_t)0xf7adc3db, (q31_t)0x89726a,   (q31_t)0xf7ba39b3,\n    (q31_t)0x87d3d0,   (q31_t)0xf7c6afdc, (q31_t)0x8637a9,   (q31_t)0xf7d32657,\n    (q31_t)0x849df4,   (q31_t)0xf7df9d22, (q31_t)0x8306b2,   (q31_t)0xf7ec143e,\n    (q31_t)0x8171e2,   (q31_t)0xf7f88ba9, (q31_t)0x7fdf85,   (q31_t)0xf8050364,\n    (q31_t)0x7e4f9b,   (q31_t)0xf8117b6d, (q31_t)0x7cc223,   (q31_t)0xf81df3c5,\n    (q31_t)0x7b371e,   (q31_t)0xf82a6c6a, (q31_t)0x79ae8c,   (q31_t)0xf836e55d,\n    (q31_t)0x78286e,   (q31_t)0xf8435e9d, (q31_t)0x76a4c2,   (q31_t)0xf84fd829,\n    (q31_t)0x752389,   (q31_t)0xf85c5201, (q31_t)0x73a4c3,   (q31_t)0xf868cc24,\n    (q31_t)0x722871,   (q31_t)0xf8754692, (q31_t)0x70ae92,   (q31_t)0xf881c14b,\n    (q31_t)0x6f3726,   (q31_t)0xf88e3c4d, (q31_t)0x6dc22e,   (q31_t)0xf89ab799,\n    (q31_t)0x6c4fa8,   (q31_t)0xf8a7332e, (q31_t)0x6adf97,   (q31_t)0xf8b3af0c,\n    (q31_t)0x6971f9,   (q31_t)0xf8c02b31, (q31_t)0x6806ce,   (q31_t)0xf8cca79e,\n    (q31_t)0x669e18,   (q31_t)0xf8d92452, (q31_t)0x6537d4,   (q31_t)0xf8e5a14d,\n    (q31_t)0x63d405,   (q31_t)0xf8f21e8e, (q31_t)0x6272aa,   (q31_t)0xf8fe9c15,\n    (q31_t)0x6113c2,   (q31_t)0xf90b19e0, (q31_t)0x5fb74e,   (q31_t)0xf91797f0,\n    (q31_t)0x5e5d4e,   (q31_t)0xf9241645, (q31_t)0x5d05c3,   (q31_t)0xf93094dd,\n    (q31_t)0x5bb0ab,   (q31_t)0xf93d13b8, (q31_t)0x5a5e07,   (q31_t)0xf94992d7,\n    (q31_t)0x590dd8,   (q31_t)0xf9561237, (q31_t)0x57c01d,   (q31_t)0xf96291d9,\n    (q31_t)0x5674d6,   (q31_t)0xf96f11bc, (q31_t)0x552c03,   (q31_t)0xf97b91e1,\n    (q31_t)0x53e5a5,   (q31_t)0xf9881245, (q31_t)0x52a1bb,   (q31_t)0xf99492ea,\n    (q31_t)0x516045,   (q31_t)0xf9a113cd, (q31_t)0x502145,   (q31_t)0xf9ad94f0,\n    (q31_t)0x4ee4b8,   (q31_t)0xf9ba1651, (q31_t)0x4daaa1,   (q31_t)0xf9c697f0,\n    (q31_t)0x4c72fe,   (q31_t)0xf9d319cc, (q31_t)0x4b3dcf,   (q31_t)0xf9df9be6,\n    (q31_t)0x4a0b16,   (q31_t)0xf9ec1e3b, (q31_t)0x48dad1,   (q31_t)0xf9f8a0cd,\n    (q31_t)0x47ad01,   (q31_t)0xfa05239a, (q31_t)0x4681a6,   (q31_t)0xfa11a6a3,\n    (q31_t)0x4558c0,   (q31_t)0xfa1e29e5, (q31_t)0x44324f,   (q31_t)0xfa2aad62,\n    (q31_t)0x430e53,   (q31_t)0xfa373119, (q31_t)0x41eccc,   (q31_t)0xfa43b508,\n    (q31_t)0x40cdba,   (q31_t)0xfa503930, (q31_t)0x3fb11d,   (q31_t)0xfa5cbd91,\n    (q31_t)0x3e96f6,   (q31_t)0xfa694229, (q31_t)0x3d7f44,   (q31_t)0xfa75c6f8,\n    (q31_t)0x3c6a07,   (q31_t)0xfa824bfd, (q31_t)0x3b573f,   (q31_t)0xfa8ed139,\n    (q31_t)0x3a46ed,   (q31_t)0xfa9b56ab, (q31_t)0x393910,   (q31_t)0xfaa7dc52,\n    (q31_t)0x382da8,   (q31_t)0xfab4622d, (q31_t)0x3724b6,   (q31_t)0xfac0e83d,\n    (q31_t)0x361e3a,   (q31_t)0xfacd6e81, (q31_t)0x351a33,   (q31_t)0xfad9f4f8,\n    (q31_t)0x3418a2,   (q31_t)0xfae67ba2, (q31_t)0x331986,   (q31_t)0xfaf3027e,\n    (q31_t)0x321ce0,   (q31_t)0xfaff898c, (q31_t)0x3122b0,   (q31_t)0xfb0c10cb,\n    (q31_t)0x302af5,   (q31_t)0xfb18983b, (q31_t)0x2f35b1,   (q31_t)0xfb251fdc,\n    (q31_t)0x2e42e2,   (q31_t)0xfb31a7ac, (q31_t)0x2d5289,   (q31_t)0xfb3e2fac,\n    (q31_t)0x2c64a6,   (q31_t)0xfb4ab7db, (q31_t)0x2b7939,   (q31_t)0xfb574039,\n    (q31_t)0x2a9042,   (q31_t)0xfb63c8c4, (q31_t)0x29a9c1,   (q31_t)0xfb70517d,\n    (q31_t)0x28c5b6,   (q31_t)0xfb7cda63, (q31_t)0x27e421,   (q31_t)0xfb896375,\n    (q31_t)0x270502,   (q31_t)0xfb95ecb4, (q31_t)0x262859,   (q31_t)0xfba2761e,\n    (q31_t)0x254e27,   (q31_t)0xfbaeffb3, (q31_t)0x24766a,   (q31_t)0xfbbb8973,\n    (q31_t)0x23a124,   (q31_t)0xfbc8135c, (q31_t)0x22ce54,   (q31_t)0xfbd49d70,\n    (q31_t)0x21fdfb,   (q31_t)0xfbe127ac, (q31_t)0x213018,   (q31_t)0xfbedb212,\n    (q31_t)0x2064ab,   (q31_t)0xfbfa3c9f, (q31_t)0x1f9bb5,   (q31_t)0xfc06c754,\n    (q31_t)0x1ed535,   (q31_t)0xfc135231, (q31_t)0x1e112b,   (q31_t)0xfc1fdd34,\n    (q31_t)0x1d4f99,   (q31_t)0xfc2c685d, (q31_t)0x1c907c,   (q31_t)0xfc38f3ac,\n    (q31_t)0x1bd3d6,   (q31_t)0xfc457f21, (q31_t)0x1b19a7,   (q31_t)0xfc520aba,\n    (q31_t)0x1a61ee,   (q31_t)0xfc5e9678, (q31_t)0x19acac,   (q31_t)0xfc6b2259,\n    (q31_t)0x18f9e1,   (q31_t)0xfc77ae5e, (q31_t)0x18498c,   (q31_t)0xfc843a85,\n    (q31_t)0x179bae,   (q31_t)0xfc90c6cf, (q31_t)0x16f047,   (q31_t)0xfc9d533b,\n    (q31_t)0x164757,   (q31_t)0xfca9dfc8, (q31_t)0x15a0dd,   (q31_t)0xfcb66c77,\n    (q31_t)0x14fcda,   (q31_t)0xfcc2f945, (q31_t)0x145b4e,   (q31_t)0xfccf8634,\n    (q31_t)0x13bc39,   (q31_t)0xfcdc1342, (q31_t)0x131f9b,   (q31_t)0xfce8a06f,\n    (q31_t)0x128574,   (q31_t)0xfcf52dbb, (q31_t)0x11edc3,   (q31_t)0xfd01bb24,\n    (q31_t)0x11588a,   (q31_t)0xfd0e48ab, (q31_t)0x10c5c7,   (q31_t)0xfd1ad650,\n    (q31_t)0x10357c,   (q31_t)0xfd276410, (q31_t)0xfa7a8,    (q31_t)0xfd33f1ed,\n    (q31_t)0xf1c4a,    (q31_t)0xfd407fe6, (q31_t)0xe9364,    (q31_t)0xfd4d0df9,\n    (q31_t)0xe0cf5,    (q31_t)0xfd599c28, (q31_t)0xd88fd,    (q31_t)0xfd662a70,\n    (q31_t)0xd077c,    (q31_t)0xfd72b8d2, (q31_t)0xc8872,    (q31_t)0xfd7f474d,\n    (q31_t)0xc0be0,    (q31_t)0xfd8bd5e1, (q31_t)0xb91c4,    (q31_t)0xfd98648d,\n    (q31_t)0xb1a20,    (q31_t)0xfda4f351, (q31_t)0xaa4f3,    (q31_t)0xfdb1822c,\n    (q31_t)0xa323d,    (q31_t)0xfdbe111e, (q31_t)0x9c1ff,    (q31_t)0xfdcaa027,\n    (q31_t)0x95438,    (q31_t)0xfdd72f45, (q31_t)0x8e8e8,    (q31_t)0xfde3be78,\n    (q31_t)0x8800f,    (q31_t)0xfdf04dc0, (q31_t)0x819ae,    (q31_t)0xfdfcdd1d,\n    (q31_t)0x7b5c4,    (q31_t)0xfe096c8d, (q31_t)0x75452,    (q31_t)0xfe15fc11,\n    (q31_t)0x6f556,    (q31_t)0xfe228ba7, (q31_t)0x698d3,    (q31_t)0xfe2f1b50,\n    (q31_t)0x63ec6,    (q31_t)0xfe3bab0b, (q31_t)0x5e731,    (q31_t)0xfe483ad8,\n    (q31_t)0x59214,    (q31_t)0xfe54cab5, (q31_t)0x53f6e,    (q31_t)0xfe615aa3,\n    (q31_t)0x4ef3f,    (q31_t)0xfe6deaa1, (q31_t)0x4a188,    (q31_t)0xfe7a7aae,\n    (q31_t)0x45648,    (q31_t)0xfe870aca, (q31_t)0x40d80,    (q31_t)0xfe939af5,\n    (q31_t)0x3c72f,    (q31_t)0xfea02b2e, (q31_t)0x38356,    (q31_t)0xfeacbb74,\n    (q31_t)0x341f4,    (q31_t)0xfeb94bc8, (q31_t)0x3030a,    (q31_t)0xfec5dc28,\n    (q31_t)0x2c697,    (q31_t)0xfed26c94, (q31_t)0x28c9c,    (q31_t)0xfedefd0c,\n    (q31_t)0x25519,    (q31_t)0xfeeb8d8f, (q31_t)0x2200d,    (q31_t)0xfef81e1d,\n    (q31_t)0x1ed78,    (q31_t)0xff04aeb5, (q31_t)0x1bd5c,    (q31_t)0xff113f56,\n    (q31_t)0x18fb6,    (q31_t)0xff1dd001, (q31_t)0x16489,    (q31_t)0xff2a60b4,\n    (q31_t)0x13bd3,    (q31_t)0xff36f170, (q31_t)0x11594,    (q31_t)0xff438234,\n    (q31_t)0xf1ce,     (q31_t)0xff5012fe, (q31_t)0xd07e,     (q31_t)0xff5ca3d0,\n    (q31_t)0xb1a7,     (q31_t)0xff6934a8, (q31_t)0x9547,     (q31_t)0xff75c585,\n    (q31_t)0x7b5f,     (q31_t)0xff825668, (q31_t)0x63ee,     (q31_t)0xff8ee750,\n    (q31_t)0x4ef5,     (q31_t)0xff9b783c, (q31_t)0x3c74,     (q31_t)0xffa8092c,\n    (q31_t)0x2c6a,     (q31_t)0xffb49a1f, (q31_t)0x1ed8,     (q31_t)0xffc12b16,\n    (q31_t)0x13bd,     (q31_t)0xffcdbc0f, (q31_t)0xb1a,      (q31_t)0xffda4d09,\n    (q31_t)0x4ef,      (q31_t)0xffe6de05, (q31_t)0x13c,      (q31_t)0xfff36f02,\n    (q31_t)0x0,        (q31_t)0x0,        (q31_t)0x13c,      (q31_t)0xc90fe,\n    (q31_t)0x4ef,      (q31_t)0x1921fb,   (q31_t)0xb1a,      (q31_t)0x25b2f7,\n    (q31_t)0x13bd,     (q31_t)0x3243f1,   (q31_t)0x1ed8,     (q31_t)0x3ed4ea,\n    (q31_t)0x2c6a,     (q31_t)0x4b65e1,   (q31_t)0x3c74,     (q31_t)0x57f6d4,\n    (q31_t)0x4ef5,     (q31_t)0x6487c4,   (q31_t)0x63ee,     (q31_t)0x7118b0,\n    (q31_t)0x7b5f,     (q31_t)0x7da998,   (q31_t)0x9547,     (q31_t)0x8a3a7b,\n    (q31_t)0xb1a7,     (q31_t)0x96cb58,   (q31_t)0xd07e,     (q31_t)0xa35c30,\n    (q31_t)0xf1ce,     (q31_t)0xafed02,   (q31_t)0x11594,    (q31_t)0xbc7dcc,\n    (q31_t)0x13bd3,    (q31_t)0xc90e90,   (q31_t)0x16489,    (q31_t)0xd59f4c,\n    (q31_t)0x18fb6,    (q31_t)0xe22fff,   (q31_t)0x1bd5c,    (q31_t)0xeec0aa,\n    (q31_t)0x1ed78,    (q31_t)0xfb514b,   (q31_t)0x2200d,    (q31_t)0x107e1e3,\n    (q31_t)0x25519,    (q31_t)0x1147271,  (q31_t)0x28c9c,    (q31_t)0x12102f4,\n    (q31_t)0x2c697,    (q31_t)0x12d936c,  (q31_t)0x3030a,    (q31_t)0x13a23d8,\n    (q31_t)0x341f4,    (q31_t)0x146b438,  (q31_t)0x38356,    (q31_t)0x153448c,\n    (q31_t)0x3c72f,    (q31_t)0x15fd4d2,  (q31_t)0x40d80,    (q31_t)0x16c650b,\n    (q31_t)0x45648,    (q31_t)0x178f536,  (q31_t)0x4a188,    (q31_t)0x1858552,\n    (q31_t)0x4ef3f,    (q31_t)0x192155f,  (q31_t)0x53f6e,    (q31_t)0x19ea55d,\n    (q31_t)0x59214,    (q31_t)0x1ab354b,  (q31_t)0x5e731,    (q31_t)0x1b7c528,\n    (q31_t)0x63ec6,    (q31_t)0x1c454f5,  (q31_t)0x698d3,    (q31_t)0x1d0e4b0,\n    (q31_t)0x6f556,    (q31_t)0x1dd7459,  (q31_t)0x75452,    (q31_t)0x1ea03ef,\n    (q31_t)0x7b5c4,    (q31_t)0x1f69373,  (q31_t)0x819ae,    (q31_t)0x20322e3,\n    (q31_t)0x8800f,    (q31_t)0x20fb240,  (q31_t)0x8e8e8,    (q31_t)0x21c4188,\n    (q31_t)0x95438,    (q31_t)0x228d0bb,  (q31_t)0x9c1ff,    (q31_t)0x2355fd9,\n    (q31_t)0xa323d,    (q31_t)0x241eee2,  (q31_t)0xaa4f3,    (q31_t)0x24e7dd4,\n    (q31_t)0xb1a20,    (q31_t)0x25b0caf,  (q31_t)0xb91c4,    (q31_t)0x2679b73,\n    (q31_t)0xc0be0,    (q31_t)0x2742a1f,  (q31_t)0xc8872,    (q31_t)0x280b8b3,\n    (q31_t)0xd077c,    (q31_t)0x28d472e,  (q31_t)0xd88fd,    (q31_t)0x299d590,\n    (q31_t)0xe0cf5,    (q31_t)0x2a663d8,  (q31_t)0xe9364,    (q31_t)0x2b2f207,\n    (q31_t)0xf1c4a,    (q31_t)0x2bf801a,  (q31_t)0xfa7a8,    (q31_t)0x2cc0e13,\n    (q31_t)0x10357c,   (q31_t)0x2d89bf0,  (q31_t)0x10c5c7,   (q31_t)0x2e529b0,\n    (q31_t)0x11588a,   (q31_t)0x2f1b755,  (q31_t)0x11edc3,   (q31_t)0x2fe44dc,\n    (q31_t)0x128574,   (q31_t)0x30ad245,  (q31_t)0x131f9b,   (q31_t)0x3175f91,\n    (q31_t)0x13bc39,   (q31_t)0x323ecbe,  (q31_t)0x145b4e,   (q31_t)0x33079cc,\n    (q31_t)0x14fcda,   (q31_t)0x33d06bb,  (q31_t)0x15a0dd,   (q31_t)0x3499389,\n    (q31_t)0x164757,   (q31_t)0x3562038,  (q31_t)0x16f047,   (q31_t)0x362acc5,\n    (q31_t)0x179bae,   (q31_t)0x36f3931,  (q31_t)0x18498c,   (q31_t)0x37bc57b,\n    (q31_t)0x18f9e1,   (q31_t)0x38851a2,  (q31_t)0x19acac,   (q31_t)0x394dda7,\n    (q31_t)0x1a61ee,   (q31_t)0x3a16988,  (q31_t)0x1b19a7,   (q31_t)0x3adf546,\n    (q31_t)0x1bd3d6,   (q31_t)0x3ba80df,  (q31_t)0x1c907c,   (q31_t)0x3c70c54,\n    (q31_t)0x1d4f99,   (q31_t)0x3d397a3,  (q31_t)0x1e112b,   (q31_t)0x3e022cc,\n    (q31_t)0x1ed535,   (q31_t)0x3ecadcf,  (q31_t)0x1f9bb5,   (q31_t)0x3f938ac,\n    (q31_t)0x2064ab,   (q31_t)0x405c361,  (q31_t)0x213018,   (q31_t)0x4124dee,\n    (q31_t)0x21fdfb,   (q31_t)0x41ed854,  (q31_t)0x22ce54,   (q31_t)0x42b6290,\n    (q31_t)0x23a124,   (q31_t)0x437eca4,  (q31_t)0x24766a,   (q31_t)0x444768d,\n    (q31_t)0x254e27,   (q31_t)0x451004d,  (q31_t)0x262859,   (q31_t)0x45d89e2,\n    (q31_t)0x270502,   (q31_t)0x46a134c,  (q31_t)0x27e421,   (q31_t)0x4769c8b,\n    (q31_t)0x28c5b6,   (q31_t)0x483259d,  (q31_t)0x29a9c1,   (q31_t)0x48fae83,\n    (q31_t)0x2a9042,   (q31_t)0x49c373c,  (q31_t)0x2b7939,   (q31_t)0x4a8bfc7,\n    (q31_t)0x2c64a6,   (q31_t)0x4b54825,  (q31_t)0x2d5289,   (q31_t)0x4c1d054,\n    (q31_t)0x2e42e2,   (q31_t)0x4ce5854,  (q31_t)0x2f35b1,   (q31_t)0x4dae024,\n    (q31_t)0x302af5,   (q31_t)0x4e767c5,  (q31_t)0x3122b0,   (q31_t)0x4f3ef35,\n    (q31_t)0x321ce0,   (q31_t)0x5007674,  (q31_t)0x331986,   (q31_t)0x50cfd82,\n    (q31_t)0x3418a2,   (q31_t)0x519845e,  (q31_t)0x351a33,   (q31_t)0x5260b08,\n    (q31_t)0x361e3a,   (q31_t)0x532917f,  (q31_t)0x3724b6,   (q31_t)0x53f17c3,\n    (q31_t)0x382da8,   (q31_t)0x54b9dd3,  (q31_t)0x393910,   (q31_t)0x55823ae,\n    (q31_t)0x3a46ed,   (q31_t)0x564a955,  (q31_t)0x3b573f,   (q31_t)0x5712ec7,\n    (q31_t)0x3c6a07,   (q31_t)0x57db403,  (q31_t)0x3d7f44,   (q31_t)0x58a3908,\n    (q31_t)0x3e96f6,   (q31_t)0x596bdd7,  (q31_t)0x3fb11d,   (q31_t)0x5a3426f,\n    (q31_t)0x40cdba,   (q31_t)0x5afc6d0,  (q31_t)0x41eccc,   (q31_t)0x5bc4af8,\n    (q31_t)0x430e53,   (q31_t)0x5c8cee7,  (q31_t)0x44324f,   (q31_t)0x5d5529e,\n    (q31_t)0x4558c0,   (q31_t)0x5e1d61b,  (q31_t)0x4681a6,   (q31_t)0x5ee595d,\n    (q31_t)0x47ad01,   (q31_t)0x5fadc66,  (q31_t)0x48dad1,   (q31_t)0x6075f33,\n    (q31_t)0x4a0b16,   (q31_t)0x613e1c5,  (q31_t)0x4b3dcf,   (q31_t)0x620641a,\n    (q31_t)0x4c72fe,   (q31_t)0x62ce634,  (q31_t)0x4daaa1,   (q31_t)0x6396810,\n    (q31_t)0x4ee4b8,   (q31_t)0x645e9af,  (q31_t)0x502145,   (q31_t)0x6526b10,\n    (q31_t)0x516045,   (q31_t)0x65eec33,  (q31_t)0x52a1bb,   (q31_t)0x66b6d16,\n    (q31_t)0x53e5a5,   (q31_t)0x677edbb,  (q31_t)0x552c03,   (q31_t)0x6846e1f,\n    (q31_t)0x5674d6,   (q31_t)0x690ee44,  (q31_t)0x57c01d,   (q31_t)0x69d6e27,\n    (q31_t)0x590dd8,   (q31_t)0x6a9edc9,  (q31_t)0x5a5e07,   (q31_t)0x6b66d29,\n    (q31_t)0x5bb0ab,   (q31_t)0x6c2ec48,  (q31_t)0x5d05c3,   (q31_t)0x6cf6b23,\n    (q31_t)0x5e5d4e,   (q31_t)0x6dbe9bb,  (q31_t)0x5fb74e,   (q31_t)0x6e86810,\n    (q31_t)0x6113c2,   (q31_t)0x6f4e620,  (q31_t)0x6272aa,   (q31_t)0x70163eb,\n    (q31_t)0x63d405,   (q31_t)0x70de172,  (q31_t)0x6537d4,   (q31_t)0x71a5eb3,\n    (q31_t)0x669e18,   (q31_t)0x726dbae,  (q31_t)0x6806ce,   (q31_t)0x7335862,\n    (q31_t)0x6971f9,   (q31_t)0x73fd4cf,  (q31_t)0x6adf97,   (q31_t)0x74c50f4,\n    (q31_t)0x6c4fa8,   (q31_t)0x758ccd2,  (q31_t)0x6dc22e,   (q31_t)0x7654867,\n    (q31_t)0x6f3726,   (q31_t)0x771c3b3,  (q31_t)0x70ae92,   (q31_t)0x77e3eb5,\n    (q31_t)0x722871,   (q31_t)0x78ab96e,  (q31_t)0x73a4c3,   (q31_t)0x79733dc,\n    (q31_t)0x752389,   (q31_t)0x7a3adff,  (q31_t)0x76a4c2,   (q31_t)0x7b027d7,\n    (q31_t)0x78286e,   (q31_t)0x7bca163,  (q31_t)0x79ae8c,   (q31_t)0x7c91aa3,\n    (q31_t)0x7b371e,   (q31_t)0x7d59396,  (q31_t)0x7cc223,   (q31_t)0x7e20c3b,\n    (q31_t)0x7e4f9b,   (q31_t)0x7ee8493,  (q31_t)0x7fdf85,   (q31_t)0x7fafc9c,\n    (q31_t)0x8171e2,   (q31_t)0x8077457,  (q31_t)0x8306b2,   (q31_t)0x813ebc2,\n    (q31_t)0x849df4,   (q31_t)0x82062de,  (q31_t)0x8637a9,   (q31_t)0x82cd9a9,\n    (q31_t)0x87d3d0,   (q31_t)0x8395024,  (q31_t)0x89726a,   (q31_t)0x845c64d,\n    (q31_t)0x8b1376,   (q31_t)0x8523c25,  (q31_t)0x8cb6f5,   (q31_t)0x85eb1ab,\n    (q31_t)0x8e5ce5,   (q31_t)0x86b26de,  (q31_t)0x900548,   (q31_t)0x8779bbe,\n    (q31_t)0x91b01d,   (q31_t)0x884104b,  (q31_t)0x935d64,   (q31_t)0x8908483,\n    (q31_t)0x950d1d,   (q31_t)0x89cf867,  (q31_t)0x96bf48,   (q31_t)0x8a96bf6,\n    (q31_t)0x9873e4,   (q31_t)0x8b5df30,  (q31_t)0x9a2af3,   (q31_t)0x8c25213,\n    (q31_t)0x9be473,   (q31_t)0x8cec4a0,  (q31_t)0x9da065,   (q31_t)0x8db36d6,\n    (q31_t)0x9f5ec8,   (q31_t)0x8e7a8b5,  (q31_t)0xa11f9d,   (q31_t)0x8f41a3c,\n    (q31_t)0xa2e2e3,   (q31_t)0x9008b6a,  (q31_t)0xa4a89b,   (q31_t)0x90cfc40,\n    (q31_t)0xa670c4,   (q31_t)0x9196cbc,  (q31_t)0xa83b5e,   (q31_t)0x925dcdf,\n    (q31_t)0xaa086a,   (q31_t)0x9324ca7,  (q31_t)0xabd7e6,   (q31_t)0x93ebc14,\n    (q31_t)0xada9d4,   (q31_t)0x94b2b27,  (q31_t)0xaf7e33,   (q31_t)0x95799dd,\n    (q31_t)0xb15502,   (q31_t)0x9640837,  (q31_t)0xb32e42,   (q31_t)0x9707635,\n    (q31_t)0xb509f3,   (q31_t)0x97ce3d5,  (q31_t)0xb6e815,   (q31_t)0x9895118,\n    (q31_t)0xb8c8a7,   (q31_t)0x995bdfd,  (q31_t)0xbaabaa,   (q31_t)0x9a22a83,\n    (q31_t)0xbc911d,   (q31_t)0x9ae96aa,  (q31_t)0xbe7901,   (q31_t)0x9bb0271,\n    (q31_t)0xc06355,   (q31_t)0x9c76dd8,  (q31_t)0xc25019,   (q31_t)0x9d3d8df,\n    (q31_t)0xc43f4d,   (q31_t)0x9e04385,  (q31_t)0xc630f2,   (q31_t)0x9ecadc9,\n    (q31_t)0xc82506,   (q31_t)0x9f917ac,  (q31_t)0xca1b8a,   (q31_t)0xa05812c,\n    (q31_t)0xcc147f,   (q31_t)0xa11ea49,  (q31_t)0xce0fe3,   (q31_t)0xa1e5303,\n    (q31_t)0xd00db6,   (q31_t)0xa2abb59,  (q31_t)0xd20dfa,   (q31_t)0xa37234a,\n    (q31_t)0xd410ad,   (q31_t)0xa438ad7,  (q31_t)0xd615cf,   (q31_t)0xa4ff1fe,\n    (q31_t)0xd81d61,   (q31_t)0xa5c58c0,  (q31_t)0xda2762,   (q31_t)0xa68bf1b,\n    (q31_t)0xdc33d2,   (q31_t)0xa752510,  (q31_t)0xde42b2,   (q31_t)0xa818a9d,\n    (q31_t)0xe05401,   (q31_t)0xa8defc3,  (q31_t)0xe267be,   (q31_t)0xa9a5480,\n    (q31_t)0xe47deb,   (q31_t)0xaa6b8d5,  (q31_t)0xe69686,   (q31_t)0xab31cc1,\n    (q31_t)0xe8b190,   (q31_t)0xabf8043,  (q31_t)0xeacf09,   (q31_t)0xacbe35b,\n    (q31_t)0xeceef1,   (q31_t)0xad84609,  (q31_t)0xef1147,   (q31_t)0xae4a84b,\n    (q31_t)0xf1360b,   (q31_t)0xaf10a22,  (q31_t)0xf35d3e,   (q31_t)0xafd6b8d,\n    (q31_t)0xf586df,   (q31_t)0xb09cc8c,  (q31_t)0xf7b2ee,   (q31_t)0xb162d1d,\n    (q31_t)0xf9e16b,   (q31_t)0xb228d42,  (q31_t)0xfc1257,   (q31_t)0xb2eecf8,\n    (q31_t)0xfe45b0,   (q31_t)0xb3b4c40,  (q31_t)0x1007b77,  (q31_t)0xb47ab19,\n    (q31_t)0x102b3ac,  (q31_t)0xb540982,  (q31_t)0x104ee4f,  (q31_t)0xb60677c,\n    (q31_t)0x1072b5f,  (q31_t)0xb6cc506,  (q31_t)0x1096add,  (q31_t)0xb79221f,\n    (q31_t)0x10bacc8,  (q31_t)0xb857ec7,  (q31_t)0x10df120,  (q31_t)0xb91dafc,\n    (q31_t)0x11037e6,  (q31_t)0xb9e36c0,  (q31_t)0x1128119,  (q31_t)0xbaa9211,\n    (q31_t)0x114ccb9,  (q31_t)0xbb6ecef,  (q31_t)0x1171ac6,  (q31_t)0xbc34759,\n    (q31_t)0x1196b3f,  (q31_t)0xbcfa150,  (q31_t)0x11bbe26,  (q31_t)0xbdbfad1,\n    (q31_t)0x11e1379,  (q31_t)0xbe853de,  (q31_t)0x1206b39,  (q31_t)0xbf4ac75,\n    (q31_t)0x122c566,  (q31_t)0xc010496,  (q31_t)0x12521ff,  (q31_t)0xc0d5c41,\n    (q31_t)0x1278104,  (q31_t)0xc19b374,  (q31_t)0x129e276,  (q31_t)0xc260a31,\n    (q31_t)0x12c4653,  (q31_t)0xc326075,  (q31_t)0x12eac9d,  (q31_t)0xc3eb641,\n    (q31_t)0x1311553,  (q31_t)0xc4b0b94,  (q31_t)0x1338075,  (q31_t)0xc57606e,\n    (q31_t)0x135ee02,  (q31_t)0xc63b4ce,  (q31_t)0x1385dfb,  (q31_t)0xc7008b3,\n    (q31_t)0x13ad060,  (q31_t)0xc7c5c1e,  (q31_t)0x13d4530,  (q31_t)0xc88af0e,\n    (q31_t)0x13fbc6c,  (q31_t)0xc950182,  (q31_t)0x1423613,  (q31_t)0xca1537a,\n    (q31_t)0x144b225,  (q31_t)0xcada4f5,  (q31_t)0x14730a3,  (q31_t)0xcb9f5f3,\n    (q31_t)0x149b18b,  (q31_t)0xcc64673,  (q31_t)0x14c34df,  (q31_t)0xcd29676,\n    (q31_t)0x14eba9d,  (q31_t)0xcdee5f9,  (q31_t)0x15142c6,  (q31_t)0xceb34fe,\n    (q31_t)0x153cd5a,  (q31_t)0xcf78383,  (q31_t)0x1565a58,  (q31_t)0xd03d189,\n    (q31_t)0x158e9c1,  (q31_t)0xd101f0e,  (q31_t)0x15b7b94,  (q31_t)0xd1c6c11,\n    (q31_t)0x15e0fd1,  (q31_t)0xd28b894,  (q31_t)0x160a678,  (q31_t)0xd350495,\n    (q31_t)0x1633f8a,  (q31_t)0xd415013,  (q31_t)0x165db05,  (q31_t)0xd4d9b0e,\n    (q31_t)0x16878eb,  (q31_t)0xd59e586,  (q31_t)0x16b193a,  (q31_t)0xd662f7b,\n    (q31_t)0x16dbbf3,  (q31_t)0xd7278eb,  (q31_t)0x1706115,  (q31_t)0xd7ec1d6,\n    (q31_t)0x17308a1,  (q31_t)0xd8b0a3d,  (q31_t)0x175b296,  (q31_t)0xd97521d,\n    (q31_t)0x1785ef4,  (q31_t)0xda39978,  (q31_t)0x17b0dbb,  (q31_t)0xdafe04b,\n    (q31_t)0x17dbeec,  (q31_t)0xdbc2698,  (q31_t)0x1807285,  (q31_t)0xdc86c5d,\n    (q31_t)0x1832888,  (q31_t)0xdd4b19a,  (q31_t)0x185e0f3,  (q31_t)0xde0f64f,\n    (q31_t)0x1889bc6,  (q31_t)0xded3a7b,  (q31_t)0x18b5903,  (q31_t)0xdf97e1d,\n    (q31_t)0x18e18a7,  (q31_t)0xe05c135,  (q31_t)0x190dab4,  (q31_t)0xe1203c3,\n    (q31_t)0x1939f29,  (q31_t)0xe1e45c6,  (q31_t)0x1966606,  (q31_t)0xe2a873e,\n    (q31_t)0x1992f4c,  (q31_t)0xe36c82a,  (q31_t)0x19bfaf9,  (q31_t)0xe430889,\n    (q31_t)0x19ec90d,  (q31_t)0xe4f485c,  (q31_t)0x1a1998a,  (q31_t)0xe5b87a2,\n    (q31_t)0x1a46c6e,  (q31_t)0xe67c65a,  (q31_t)0x1a741b9,  (q31_t)0xe740483,\n    (q31_t)0x1aa196c,  (q31_t)0xe80421e,  (q31_t)0x1acf386,  (q31_t)0xe8c7f2a,\n    (q31_t)0x1afd007,  (q31_t)0xe98bba7,  (q31_t)0x1b2aef0,  (q31_t)0xea4f793,\n    (q31_t)0x1b5903f,  (q31_t)0xeb132ef,  (q31_t)0x1b873f5,  (q31_t)0xebd6db9,\n    (q31_t)0x1bb5a11,  (q31_t)0xec9a7f3,  (q31_t)0x1be4294,  (q31_t)0xed5e19a,\n    (q31_t)0x1c12d7e,  (q31_t)0xee21aaf,  (q31_t)0x1c41ace,  (q31_t)0xeee5331,\n    (q31_t)0x1c70a84,  (q31_t)0xefa8b20,  (q31_t)0x1c9fca0,  (q31_t)0xf06c27a,\n    (q31_t)0x1ccf122,  (q31_t)0xf12f941,  (q31_t)0x1cfe80a,  (q31_t)0xf1f2f73,\n    (q31_t)0x1d2e158,  (q31_t)0xf2b650f,  (q31_t)0x1d5dd0c,  (q31_t)0xf379a16,\n    (q31_t)0x1d8db25,  (q31_t)0xf43ce86,  (q31_t)0x1dbdba3,  (q31_t)0xf500260,\n    (q31_t)0x1dede87,  (q31_t)0xf5c35a3,  (q31_t)0x1e1e3d0,  (q31_t)0xf68684e,\n    (q31_t)0x1e4eb7e,  (q31_t)0xf749a61,  (q31_t)0x1e7f591,  (q31_t)0xf80cbdc,\n    (q31_t)0x1eb0209,  (q31_t)0xf8cfcbe,  (q31_t)0x1ee10e5,  (q31_t)0xf992d06,\n    (q31_t)0x1f12227,  (q31_t)0xfa55cb4,  (q31_t)0x1f435cc,  (q31_t)0xfb18bc8,\n    (q31_t)0x1f74bd6,  (q31_t)0xfbdba40,  (q31_t)0x1fa6445,  (q31_t)0xfc9e81e,\n    (q31_t)0x1fd7f17,  (q31_t)0xfd6155f,  (q31_t)0x2009c4e,  (q31_t)0xfe24205,\n    (q31_t)0x203bbe8,  (q31_t)0xfee6e0d,  (q31_t)0x206dde6,  (q31_t)0xffa9979,\n    (q31_t)0x20a0248,  (q31_t)0x1006c446, (q31_t)0x20d290d,  (q31_t)0x1012ee76,\n    (q31_t)0x2105236,  (q31_t)0x101f1807, (q31_t)0x2137dc2,  (q31_t)0x102b40f8,\n    (q31_t)0x216abb1,  (q31_t)0x1037694b, (q31_t)0x219dc03,  (q31_t)0x104390fd,\n    (q31_t)0x21d0eb8,  (q31_t)0x104fb80e, (q31_t)0x22043d0,  (q31_t)0x105bde7f,\n    (q31_t)0x2237b4b,  (q31_t)0x1068044e, (q31_t)0x226b528,  (q31_t)0x1074297b,\n    (q31_t)0x229f167,  (q31_t)0x10804e06, (q31_t)0x22d3009,  (q31_t)0x108c71ee,\n    (q31_t)0x230710d,  (q31_t)0x10989532, (q31_t)0x233b473,  (q31_t)0x10a4b7d3,\n    (q31_t)0x236fa3b,  (q31_t)0x10b0d9d0, (q31_t)0x23a4265,  (q31_t)0x10bcfb28,\n    (q31_t)0x23d8cf1,  (q31_t)0x10c91bda, (q31_t)0x240d9de,  (q31_t)0x10d53be7,\n    (q31_t)0x244292c,  (q31_t)0x10e15b4e, (q31_t)0x2477adc,  (q31_t)0x10ed7a0e,\n    (q31_t)0x24aceed,  (q31_t)0x10f99827, (q31_t)0x24e255e,  (q31_t)0x1105b599,\n    (q31_t)0x2517e31,  (q31_t)0x1111d263, (q31_t)0x254d965,  (q31_t)0x111dee84,\n    (q31_t)0x25836f9,  (q31_t)0x112a09fc, (q31_t)0x25b96ee,  (q31_t)0x113624cb,\n    (q31_t)0x25ef943,  (q31_t)0x11423ef0, (q31_t)0x2625df8,  (q31_t)0x114e586a,\n    (q31_t)0x265c50e,  (q31_t)0x115a713a, (q31_t)0x2692e83,  (q31_t)0x1166895f,\n    (q31_t)0x26c9a58,  (q31_t)0x1172a0d7, (q31_t)0x270088e,  (q31_t)0x117eb7a4,\n    (q31_t)0x2737922,  (q31_t)0x118acdc4, (q31_t)0x276ec16,  (q31_t)0x1196e337,\n    (q31_t)0x27a616a,  (q31_t)0x11a2f7fc, (q31_t)0x27dd91c,  (q31_t)0x11af0c13,\n    (q31_t)0x281532e,  (q31_t)0x11bb1f7c, (q31_t)0x284cf9f,  (q31_t)0x11c73235,\n    (q31_t)0x2884e6e,  (q31_t)0x11d3443f, (q31_t)0x28bcf9c,  (q31_t)0x11df5599,\n    (q31_t)0x28f5329,  (q31_t)0x11eb6643, (q31_t)0x292d914,  (q31_t)0x11f7763c,\n    (q31_t)0x296615d,  (q31_t)0x12038584, (q31_t)0x299ec05,  (q31_t)0x120f941a,\n    (q31_t)0x29d790a,  (q31_t)0x121ba1fd, (q31_t)0x2a1086d,  (q31_t)0x1227af2e,\n    (q31_t)0x2a49a2e,  (q31_t)0x1233bbac, (q31_t)0x2a82e4d,  (q31_t)0x123fc776,\n    (q31_t)0x2abc4c9,  (q31_t)0x124bd28c, (q31_t)0x2af5da2,  (q31_t)0x1257dced,\n    (q31_t)0x2b2f8d8,  (q31_t)0x1263e699, (q31_t)0x2b6966c,  (q31_t)0x126fef90,\n    (q31_t)0x2ba365c,  (q31_t)0x127bf7d1, (q31_t)0x2bdd8a9,  (q31_t)0x1287ff5b,\n    (q31_t)0x2c17d52,  (q31_t)0x1294062f, (q31_t)0x2c52459,  (q31_t)0x12a00c4b,\n    (q31_t)0x2c8cdbb,  (q31_t)0x12ac11af, (q31_t)0x2cc7979,  (q31_t)0x12b8165b,\n    (q31_t)0x2d02794,  (q31_t)0x12c41a4f, (q31_t)0x2d3d80a,  (q31_t)0x12d01d89,\n    (q31_t)0x2d78add,  (q31_t)0x12dc2009, (q31_t)0x2db400a,  (q31_t)0x12e821cf,\n    (q31_t)0x2def794,  (q31_t)0x12f422db, (q31_t)0x2e2b178,  (q31_t)0x1300232c,\n    (q31_t)0x2e66db8,  (q31_t)0x130c22c1, (q31_t)0x2ea2c53,  (q31_t)0x1318219a,\n    (q31_t)0x2eded49,  (q31_t)0x13241fb6, (q31_t)0x2f1b099,  (q31_t)0x13301d16,\n    (q31_t)0x2f57644,  (q31_t)0x133c19b8, (q31_t)0x2f93e4a,  (q31_t)0x1348159d,\n    (q31_t)0x2fd08a9,  (q31_t)0x135410c3, (q31_t)0x300d563,  (q31_t)0x13600b2a,\n    (q31_t)0x304a477,  (q31_t)0x136c04d2, (q31_t)0x30875e5,  (q31_t)0x1377fdbb,\n    (q31_t)0x30c49ad,  (q31_t)0x1383f5e3, (q31_t)0x3101fce,  (q31_t)0x138fed4b,\n    (q31_t)0x313f848,  (q31_t)0x139be3f2, (q31_t)0x317d31c,  (q31_t)0x13a7d9d7,\n    (q31_t)0x31bb049,  (q31_t)0x13b3cefa, (q31_t)0x31f8fcf,  (q31_t)0x13bfc35b,\n    (q31_t)0x32371ae,  (q31_t)0x13cbb6f8, (q31_t)0x32755e5,  (q31_t)0x13d7a9d3,\n    (q31_t)0x32b3c75,  (q31_t)0x13e39be9, (q31_t)0x32f255e,  (q31_t)0x13ef8d3c,\n    (q31_t)0x333109e,  (q31_t)0x13fb7dc9, (q31_t)0x336fe37,  (q31_t)0x14076d91,\n    (q31_t)0x33aee27,  (q31_t)0x14135c94, (q31_t)0x33ee070,  (q31_t)0x141f4ad1,\n    (q31_t)0x342d510,  (q31_t)0x142b3846, (q31_t)0x346cc07,  (q31_t)0x143724f5,\n    (q31_t)0x34ac556,  (q31_t)0x144310dd, (q31_t)0x34ec0fc,  (q31_t)0x144efbfc,\n    (q31_t)0x352bef9,  (q31_t)0x145ae653, (q31_t)0x356bf4d,  (q31_t)0x1466cfe1,\n    (q31_t)0x35ac1f7,  (q31_t)0x1472b8a5, (q31_t)0x35ec6f8,  (q31_t)0x147ea0a0,\n    (q31_t)0x362ce50,  (q31_t)0x148a87d1, (q31_t)0x366d7fd,  (q31_t)0x14966e36,\n    (q31_t)0x36ae401,  (q31_t)0x14a253d1, (q31_t)0x36ef25b,  (q31_t)0x14ae38a0,\n    (q31_t)0x373030a,  (q31_t)0x14ba1ca3, (q31_t)0x377160f,  (q31_t)0x14c5ffd9,\n    (q31_t)0x37b2b6a,  (q31_t)0x14d1e242, (q31_t)0x37f4319,  (q31_t)0x14ddc3de,\n    (q31_t)0x3835d1e,  (q31_t)0x14e9a4ac, (q31_t)0x3877978,  (q31_t)0x14f584ac,\n    (q31_t)0x38b9827,  (q31_t)0x150163dc, (q31_t)0x38fb92a,  (q31_t)0x150d423d,\n    (q31_t)0x393dc82,  (q31_t)0x15191fcf, (q31_t)0x398022f,  (q31_t)0x1524fc90,\n    (q31_t)0x39c2a2f,  (q31_t)0x1530d881, (q31_t)0x3a05484,  (q31_t)0x153cb3a0,\n    (q31_t)0x3a4812c,  (q31_t)0x15488dee, (q31_t)0x3a8b028,  (q31_t)0x1554676a,\n    (q31_t)0x3ace178,  (q31_t)0x15604013, (q31_t)0x3b1151b,  (q31_t)0x156c17e9,\n    (q31_t)0x3b54b11,  (q31_t)0x1577eeec, (q31_t)0x3b9835a,  (q31_t)0x1583c51b,\n    (q31_t)0x3bdbdf6,  (q31_t)0x158f9a76, (q31_t)0x3c1fae5,  (q31_t)0x159b6efb,\n    (q31_t)0x3c63a26,  (q31_t)0x15a742ac, (q31_t)0x3ca7bba,  (q31_t)0x15b31587,\n    (q31_t)0x3cebfa0,  (q31_t)0x15bee78c, (q31_t)0x3d305d8,  (q31_t)0x15cab8ba,\n    (q31_t)0x3d74e62,  (q31_t)0x15d68911, (q31_t)0x3db993e,  (q31_t)0x15e25890,\n    (q31_t)0x3dfe66c,  (q31_t)0x15ee2738, (q31_t)0x3e435ea,  (q31_t)0x15f9f507,\n    (q31_t)0x3e887bb,  (q31_t)0x1605c1fd, (q31_t)0x3ecdbdc,  (q31_t)0x16118e1a,\n    (q31_t)0x3f1324e,  (q31_t)0x161d595d, (q31_t)0x3f58b10,  (q31_t)0x162923c5,\n    (q31_t)0x3f9e624,  (q31_t)0x1634ed53, (q31_t)0x3fe4388,  (q31_t)0x1640b606,\n    (q31_t)0x402a33c,  (q31_t)0x164c7ddd, (q31_t)0x4070540,  (q31_t)0x165844d8,\n    (q31_t)0x40b6994,  (q31_t)0x16640af7, (q31_t)0x40fd037,  (q31_t)0x166fd039,\n    (q31_t)0x414392b,  (q31_t)0x167b949d, (q31_t)0x418a46d,  (q31_t)0x16875823,\n    (q31_t)0x41d11ff,  (q31_t)0x16931acb, (q31_t)0x42181e0,  (q31_t)0x169edc94,\n    (q31_t)0x425f410,  (q31_t)0x16aa9d7e, (q31_t)0x42a688f,  (q31_t)0x16b65d88,\n    (q31_t)0x42edf5c,  (q31_t)0x16c21cb2, (q31_t)0x4335877,  (q31_t)0x16cddafb,\n    (q31_t)0x437d3e1,  (q31_t)0x16d99864, (q31_t)0x43c5199,  (q31_t)0x16e554ea,\n    (q31_t)0x440d19e,  (q31_t)0x16f1108f, (q31_t)0x44553f2,  (q31_t)0x16fccb51,\n    (q31_t)0x449d892,  (q31_t)0x17088531, (q31_t)0x44e5f80,  (q31_t)0x17143e2d,\n    (q31_t)0x452e8bc,  (q31_t)0x171ff646, (q31_t)0x4577444,  (q31_t)0x172bad7a,\n    (q31_t)0x45c0219,  (q31_t)0x173763c9, (q31_t)0x460923b,  (q31_t)0x17431933,\n    (q31_t)0x46524a9,  (q31_t)0x174ecdb8, (q31_t)0x469b963,  (q31_t)0x175a8157,\n    (q31_t)0x46e5069,  (q31_t)0x1766340f, (q31_t)0x472e9bc,  (q31_t)0x1771e5e0,\n    (q31_t)0x477855a,  (q31_t)0x177d96ca, (q31_t)0x47c2344,  (q31_t)0x178946cc,\n    (q31_t)0x480c379,  (q31_t)0x1794f5e6, (q31_t)0x48565f9,  (q31_t)0x17a0a417,\n    (q31_t)0x48a0ac4,  (q31_t)0x17ac515f, (q31_t)0x48eb1db,  (q31_t)0x17b7fdbd,\n    (q31_t)0x4935b3c,  (q31_t)0x17c3a931, (q31_t)0x49806e7,  (q31_t)0x17cf53bb,\n    (q31_t)0x49cb4dd,  (q31_t)0x17dafd59, (q31_t)0x4a1651c,  (q31_t)0x17e6a60c,\n    (q31_t)0x4a617a6,  (q31_t)0x17f24dd3, (q31_t)0x4aacc7a,  (q31_t)0x17fdf4ae,\n    (q31_t)0x4af8397,  (q31_t)0x18099a9c, (q31_t)0x4b43cfd,  (q31_t)0x18153f9d,\n    (q31_t)0x4b8f8ad,  (q31_t)0x1820e3b0, (q31_t)0x4bdb6a6,  (q31_t)0x182c86d5,\n    (q31_t)0x4c276e8,  (q31_t)0x1838290c, (q31_t)0x4c73972,  (q31_t)0x1843ca53,\n    (q31_t)0x4cbfe45,  (q31_t)0x184f6aab, (q31_t)0x4d0c560,  (q31_t)0x185b0a13,\n    (q31_t)0x4d58ec3,  (q31_t)0x1866a88a, (q31_t)0x4da5a6f,  (q31_t)0x18724611,\n    (q31_t)0x4df2862,  (q31_t)0x187de2a7, (q31_t)0x4e3f89c,  (q31_t)0x18897e4a,\n    (q31_t)0x4e8cb1e,  (q31_t)0x189518fc, (q31_t)0x4ed9fe7,  (q31_t)0x18a0b2bb,\n    (q31_t)0x4f276f7,  (q31_t)0x18ac4b87, (q31_t)0x4f7504e,  (q31_t)0x18b7e35f,\n    (q31_t)0x4fc2bec,  (q31_t)0x18c37a44, (q31_t)0x50109d0,  (q31_t)0x18cf1034,\n    (q31_t)0x505e9fb,  (q31_t)0x18daa52f, (q31_t)0x50acc6b,  (q31_t)0x18e63935,\n    (q31_t)0x50fb121,  (q31_t)0x18f1cc45, (q31_t)0x514981d,  (q31_t)0x18fd5e5f,\n    (q31_t)0x519815f,  (q31_t)0x1908ef82, (q31_t)0x51e6ce6,  (q31_t)0x19147fae,\n    (q31_t)0x5235ab2,  (q31_t)0x19200ee3, (q31_t)0x5284ac3,  (q31_t)0x192b9d1f,\n    (q31_t)0x52d3d18,  (q31_t)0x19372a64, (q31_t)0x53231b3,  (q31_t)0x1942b6af,\n    (q31_t)0x5372891,  (q31_t)0x194e4201, (q31_t)0x53c21b4,  (q31_t)0x1959cc5a,\n    (q31_t)0x5411d1b,  (q31_t)0x196555b8, (q31_t)0x5461ac6,  (q31_t)0x1970de1b,\n    (q31_t)0x54b1ab4,  (q31_t)0x197c6584, (q31_t)0x5501ce5,  (q31_t)0x1987ebf0,\n    (q31_t)0x555215a,  (q31_t)0x19937161, (q31_t)0x55a2812,  (q31_t)0x199ef5d6,\n    (q31_t)0x55f310d,  (q31_t)0x19aa794d, (q31_t)0x5643c4a,  (q31_t)0x19b5fbc8,\n    (q31_t)0x56949ca,  (q31_t)0x19c17d44, (q31_t)0x56e598c,  (q31_t)0x19ccfdc2,\n    (q31_t)0x5736b90,  (q31_t)0x19d87d42, (q31_t)0x5787fd6,  (q31_t)0x19e3fbc3,\n    (q31_t)0x57d965d,  (q31_t)0x19ef7944, (q31_t)0x582af26,  (q31_t)0x19faf5c5,\n    (q31_t)0x587ca31,  (q31_t)0x1a067145, (q31_t)0x58ce77c,  (q31_t)0x1a11ebc5,\n    (q31_t)0x5920708,  (q31_t)0x1a1d6544, (q31_t)0x59728d5,  (q31_t)0x1a28ddc0,\n    (q31_t)0x59c4ce3,  (q31_t)0x1a34553b, (q31_t)0x5a17330,  (q31_t)0x1a3fcbb3,\n    (q31_t)0x5a69bbe,  (q31_t)0x1a4b4128, (q31_t)0x5abc68c,  (q31_t)0x1a56b599,\n    (q31_t)0x5b0f399,  (q31_t)0x1a622907, (q31_t)0x5b622e6,  (q31_t)0x1a6d9b70,\n    (q31_t)0x5bb5472,  (q31_t)0x1a790cd4, (q31_t)0x5c0883d,  (q31_t)0x1a847d33,\n    (q31_t)0x5c5be47,  (q31_t)0x1a8fec8c, (q31_t)0x5caf690,  (q31_t)0x1a9b5adf,\n    (q31_t)0x5d03118,  (q31_t)0x1aa6c82b, (q31_t)0x5d56ddd,  (q31_t)0x1ab23471,\n    (q31_t)0x5daace1,  (q31_t)0x1abd9faf, (q31_t)0x5dfee22,  (q31_t)0x1ac909e5,\n    (q31_t)0x5e531a1,  (q31_t)0x1ad47312, (q31_t)0x5ea775e,  (q31_t)0x1adfdb37,\n    (q31_t)0x5efbf58,  (q31_t)0x1aeb4253, (q31_t)0x5f5098f,  (q31_t)0x1af6a865,\n    (q31_t)0x5fa5603,  (q31_t)0x1b020d6c, (q31_t)0x5ffa4b3,  (q31_t)0x1b0d716a,\n    (q31_t)0x604f5a0,  (q31_t)0x1b18d45c, (q31_t)0x60a48c9,  (q31_t)0x1b243643,\n    (q31_t)0x60f9e2e,  (q31_t)0x1b2f971e, (q31_t)0x614f5cf,  (q31_t)0x1b3af6ec,\n    (q31_t)0x61a4fac,  (q31_t)0x1b4655ae, (q31_t)0x61fabc4,  (q31_t)0x1b51b363,\n    (q31_t)0x6250a18,  (q31_t)0x1b5d100a, (q31_t)0x62a6aa6,  (q31_t)0x1b686ba3,\n    (q31_t)0x62fcd6f,  (q31_t)0x1b73c62d, (q31_t)0x6353273,  (q31_t)0x1b7f1fa9,\n    (q31_t)0x63a99b1,  (q31_t)0x1b8a7815, (q31_t)0x6400329,  (q31_t)0x1b95cf71,\n    (q31_t)0x6456edb,  (q31_t)0x1ba125bd, (q31_t)0x64adcc7,  (q31_t)0x1bac7af9,\n    (q31_t)0x6504ced,  (q31_t)0x1bb7cf23, (q31_t)0x655bf4c,  (q31_t)0x1bc3223c,\n    (q31_t)0x65b33e4,  (q31_t)0x1bce7442, (q31_t)0x660aab5,  (q31_t)0x1bd9c537,\n    (q31_t)0x66623be,  (q31_t)0x1be51518, (q31_t)0x66b9f01,  (q31_t)0x1bf063e6,\n    (q31_t)0x6711c7b,  (q31_t)0x1bfbb1a0, (q31_t)0x6769c2e,  (q31_t)0x1c06fe46,\n    (q31_t)0x67c1e18,  (q31_t)0x1c1249d8, (q31_t)0x681a23a,  (q31_t)0x1c1d9454,\n    (q31_t)0x6872894,  (q31_t)0x1c28ddbb, (q31_t)0x68cb124,  (q31_t)0x1c34260c,\n    (q31_t)0x6923bec,  (q31_t)0x1c3f6d47, (q31_t)0x697c8eb,  (q31_t)0x1c4ab36b,\n    (q31_t)0x69d5820,  (q31_t)0x1c55f878, (q31_t)0x6a2e98b,  (q31_t)0x1c613c6d,\n    (q31_t)0x6a87d2d,  (q31_t)0x1c6c7f4a, (q31_t)0x6ae1304,  (q31_t)0x1c77c10e,\n    (q31_t)0x6b3ab12,  (q31_t)0x1c8301b9, (q31_t)0x6b94554,  (q31_t)0x1c8e414b,\n    (q31_t)0x6bee1cd,  (q31_t)0x1c997fc4, (q31_t)0x6c4807a,  (q31_t)0x1ca4bd21,\n    (q31_t)0x6ca215c,  (q31_t)0x1caff965, (q31_t)0x6cfc472,  (q31_t)0x1cbb348d,\n    (q31_t)0x6d569be,  (q31_t)0x1cc66e99, (q31_t)0x6db113d,  (q31_t)0x1cd1a78a,\n    (q31_t)0x6e0baf0,  (q31_t)0x1cdcdf5e, (q31_t)0x6e666d7,  (q31_t)0x1ce81615,\n    (q31_t)0x6ec14f2,  (q31_t)0x1cf34baf, (q31_t)0x6f1c540,  (q31_t)0x1cfe802b,\n    (q31_t)0x6f777c1,  (q31_t)0x1d09b389, (q31_t)0x6fd2c75,  (q31_t)0x1d14e5c9,\n    (q31_t)0x702e35c,  (q31_t)0x1d2016e9, (q31_t)0x7089c75,  (q31_t)0x1d2b46ea,\n    (q31_t)0x70e57c0,  (q31_t)0x1d3675cb, (q31_t)0x714153e,  (q31_t)0x1d41a38c,\n    (q31_t)0x719d4ed,  (q31_t)0x1d4cd02c, (q31_t)0x71f96ce,  (q31_t)0x1d57fbaa,\n    (q31_t)0x7255ae0,  (q31_t)0x1d632608, (q31_t)0x72b2123,  (q31_t)0x1d6e4f43,\n    (q31_t)0x730e997,  (q31_t)0x1d79775c, (q31_t)0x736b43c,  (q31_t)0x1d849e51,\n    (q31_t)0x73c8111,  (q31_t)0x1d8fc424, (q31_t)0x7425016,  (q31_t)0x1d9ae8d2,\n    (q31_t)0x748214c,  (q31_t)0x1da60c5d, (q31_t)0x74df4b1,  (q31_t)0x1db12ec3,\n    (q31_t)0x753ca46,  (q31_t)0x1dbc5004, (q31_t)0x759a20a,  (q31_t)0x1dc7701f,\n    (q31_t)0x75f7bfe,  (q31_t)0x1dd28f15, (q31_t)0x7655820,  (q31_t)0x1dddace4,\n    (q31_t)0x76b3671,  (q31_t)0x1de8c98c, (q31_t)0x77116f0,  (q31_t)0x1df3e50d,\n    (q31_t)0x776f99d,  (q31_t)0x1dfeff67, (q31_t)0x77cde79,  (q31_t)0x1e0a1898,\n    (q31_t)0x782c582,  (q31_t)0x1e1530a1, (q31_t)0x788aeb9,  (q31_t)0x1e204781,\n    (q31_t)0x78e9a1d,  (q31_t)0x1e2b5d38, (q31_t)0x79487ae,  (q31_t)0x1e3671c5,\n    (q31_t)0x79a776c,  (q31_t)0x1e418528, (q31_t)0x7a06957,  (q31_t)0x1e4c9760,\n    (q31_t)0x7a65d6e,  (q31_t)0x1e57a86d, (q31_t)0x7ac53b1,  (q31_t)0x1e62b84f,\n    (q31_t)0x7b24c20,  (q31_t)0x1e6dc705, (q31_t)0x7b846ba,  (q31_t)0x1e78d48e,\n    (q31_t)0x7be4381,  (q31_t)0x1e83e0eb, (q31_t)0x7c44272,  (q31_t)0x1e8eec1b,\n    (q31_t)0x7ca438f,  (q31_t)0x1e99f61d, (q31_t)0x7d046d6,  (q31_t)0x1ea4fef0,\n    (q31_t)0x7d64c47,  (q31_t)0x1eb00696, (q31_t)0x7dc53e3,  (q31_t)0x1ebb0d0d,\n    (q31_t)0x7e25daa,  (q31_t)0x1ec61254, (q31_t)0x7e8699a,  (q31_t)0x1ed1166b,\n    (q31_t)0x7ee77b3,  (q31_t)0x1edc1953, (q31_t)0x7f487f6,  (q31_t)0x1ee71b0a,\n    (q31_t)0x7fa9a62,  (q31_t)0x1ef21b90, (q31_t)0x800aef7,  (q31_t)0x1efd1ae4,\n    (q31_t)0x806c5b5,  (q31_t)0x1f081907, (q31_t)0x80cde9b,  (q31_t)0x1f1315f7,\n    (q31_t)0x812f9a9,  (q31_t)0x1f1e11b5, (q31_t)0x81916df,  (q31_t)0x1f290c3f,\n    (q31_t)0x81f363d,  (q31_t)0x1f340596, (q31_t)0x82557c3,  (q31_t)0x1f3efdb9,\n    (q31_t)0x82b7b70,  (q31_t)0x1f49f4a8, (q31_t)0x831a143,  (q31_t)0x1f54ea62,\n    (q31_t)0x837c93e,  (q31_t)0x1f5fdee6, (q31_t)0x83df35f,  (q31_t)0x1f6ad235,\n    (q31_t)0x8441fa6,  (q31_t)0x1f75c44e, (q31_t)0x84a4e14,  (q31_t)0x1f80b531,\n    (q31_t)0x8507ea7,  (q31_t)0x1f8ba4dc, (q31_t)0x856b160,  (q31_t)0x1f969350,\n    (q31_t)0x85ce63e,  (q31_t)0x1fa1808c, (q31_t)0x8631d42,  (q31_t)0x1fac6c91,\n    (q31_t)0x869566a,  (q31_t)0x1fb7575c, (q31_t)0x86f91b7,  (q31_t)0x1fc240ef,\n    (q31_t)0x875cf28,  (q31_t)0x1fcd2948, (q31_t)0x87c0ebd,  (q31_t)0x1fd81067,\n    (q31_t)0x8825077,  (q31_t)0x1fe2f64c, (q31_t)0x8889454,  (q31_t)0x1feddaf6,\n    (q31_t)0x88eda54,  (q31_t)0x1ff8be65, (q31_t)0x8952278,  (q31_t)0x2003a099,\n    (q31_t)0x89b6cbf,  (q31_t)0x200e8190, (q31_t)0x8a1b928,  (q31_t)0x2019614c,\n    (q31_t)0x8a807b4,  (q31_t)0x20243fca, (q31_t)0x8ae5862,  (q31_t)0x202f1d0b,\n    (q31_t)0x8b4ab32,  (q31_t)0x2039f90f, (q31_t)0x8bb0023,  (q31_t)0x2044d3d4,\n    (q31_t)0x8c15736,  (q31_t)0x204fad5b, (q31_t)0x8c7b06b,  (q31_t)0x205a85a3,\n    (q31_t)0x8ce0bc0,  (q31_t)0x20655cac, (q31_t)0x8d46936,  (q31_t)0x20703275,\n    (q31_t)0x8dac8cd,  (q31_t)0x207b06fe, (q31_t)0x8e12a84,  (q31_t)0x2085da46,\n    (q31_t)0x8e78e5b,  (q31_t)0x2090ac4d, (q31_t)0x8edf452,  (q31_t)0x209b7d13,\n    (q31_t)0x8f45c68,  (q31_t)0x20a64c97, (q31_t)0x8fac69e,  (q31_t)0x20b11ad9,\n    (q31_t)0x90132f2,  (q31_t)0x20bbe7d8, (q31_t)0x907a166,  (q31_t)0x20c6b395,\n    (q31_t)0x90e11f7,  (q31_t)0x20d17e0d, (q31_t)0x91484a8,  (q31_t)0x20dc4742,\n    (q31_t)0x91af976,  (q31_t)0x20e70f32, (q31_t)0x9217062,  (q31_t)0x20f1d5de,\n    (q31_t)0x927e96b,  (q31_t)0x20fc9b44, (q31_t)0x92e6492,  (q31_t)0x21075f65,\n    (q31_t)0x934e1d6,  (q31_t)0x21122240, (q31_t)0x93b6137,  (q31_t)0x211ce3d5,\n    (q31_t)0x941e2b4,  (q31_t)0x2127a423, (q31_t)0x948664d,  (q31_t)0x21326329,\n    (q31_t)0x94eec03,  (q31_t)0x213d20e8, (q31_t)0x95573d4,  (q31_t)0x2147dd5f,\n    (q31_t)0x95bfdc1,  (q31_t)0x2152988d, (q31_t)0x96289c9,  (q31_t)0x215d5273,\n    (q31_t)0x96917ec,  (q31_t)0x21680b0f, (q31_t)0x96fa82a,  (q31_t)0x2172c262,\n    (q31_t)0x9763a83,  (q31_t)0x217d786a, (q31_t)0x97ccef5,  (q31_t)0x21882d28,\n    (q31_t)0x9836582,  (q31_t)0x2192e09b, (q31_t)0x989fe29,  (q31_t)0x219d92c2,\n    (q31_t)0x99098e9,  (q31_t)0x21a8439e, (q31_t)0x99735c2,  (q31_t)0x21b2f32e,\n    (q31_t)0x99dd4b4,  (q31_t)0x21bda171, (q31_t)0x9a475bf,  (q31_t)0x21c84e67,\n    (q31_t)0x9ab18e3,  (q31_t)0x21d2fa0f, (q31_t)0x9b1be1e,  (q31_t)0x21dda46a,\n    (q31_t)0x9b86572,  (q31_t)0x21e84d76, (q31_t)0x9bf0edd,  (q31_t)0x21f2f534,\n    (q31_t)0x9c5ba60,  (q31_t)0x21fd9ba3, (q31_t)0x9cc67fa,  (q31_t)0x220840c2,\n    (q31_t)0x9d317ab,  (q31_t)0x2212e492, (q31_t)0x9d9c973,  (q31_t)0x221d8711,\n    (q31_t)0x9e07d51,  (q31_t)0x2228283f, (q31_t)0x9e73346,  (q31_t)0x2232c81c,\n    (q31_t)0x9edeb50,  (q31_t)0x223d66a8, (q31_t)0x9f4a570,  (q31_t)0x224803e2,\n    (q31_t)0x9fb61a5,  (q31_t)0x22529fca, (q31_t)0xa021fef,  (q31_t)0x225d3a5e,\n    (q31_t)0xa08e04f,  (q31_t)0x2267d3a0, (q31_t)0xa0fa2c3,  (q31_t)0x22726b8e,\n    (q31_t)0xa16674b,  (q31_t)0x227d0228, (q31_t)0xa1d2de7,  (q31_t)0x2287976e,\n    (q31_t)0xa23f698,  (q31_t)0x22922b5e, (q31_t)0xa2ac15b,  (q31_t)0x229cbdfa,\n    (q31_t)0xa318e32,  (q31_t)0x22a74f40, (q31_t)0xa385d1d,  (q31_t)0x22b1df30,\n    (q31_t)0xa3f2e19,  (q31_t)0x22bc6dca, (q31_t)0xa460129,  (q31_t)0x22c6fb0c,\n    (q31_t)0xa4cd64b,  (q31_t)0x22d186f8, (q31_t)0xa53ad7e,  (q31_t)0x22dc118c,\n    (q31_t)0xa5a86c4,  (q31_t)0x22e69ac8, (q31_t)0xa61621b,  (q31_t)0x22f122ab,\n    (q31_t)0xa683f83,  (q31_t)0x22fba936, (q31_t)0xa6f1efc,  (q31_t)0x23062e67,\n    (q31_t)0xa760086,  (q31_t)0x2310b23e, (q31_t)0xa7ce420,  (q31_t)0x231b34bc,\n    (q31_t)0xa83c9ca,  (q31_t)0x2325b5df, (q31_t)0xa8ab184,  (q31_t)0x233035a7,\n    (q31_t)0xa919b4e,  (q31_t)0x233ab414, (q31_t)0xa988727,  (q31_t)0x23453125,\n    (q31_t)0xa9f750f,  (q31_t)0x234facda, (q31_t)0xaa66506,  (q31_t)0x235a2733,\n    (q31_t)0xaad570c,  (q31_t)0x2364a02e, (q31_t)0xab44b1f,  (q31_t)0x236f17cc,\n    (q31_t)0xabb4141,  (q31_t)0x23798e0d, (q31_t)0xac23971,  (q31_t)0x238402ef,\n    (q31_t)0xac933ae,  (q31_t)0x238e7673, (q31_t)0xad02ff8,  (q31_t)0x2398e898,\n    (q31_t)0xad72e4f,  (q31_t)0x23a3595e, (q31_t)0xade2eb3,  (q31_t)0x23adc8c4,\n    (q31_t)0xae53123,  (q31_t)0x23b836ca, (q31_t)0xaec35a0,  (q31_t)0x23c2a36f,\n    (q31_t)0xaf33c28,  (q31_t)0x23cd0eb3, (q31_t)0xafa44bc,  (q31_t)0x23d77896,\n    (q31_t)0xb014f5b,  (q31_t)0x23e1e117, (q31_t)0xb085c05,  (q31_t)0x23ec4837,\n    (q31_t)0xb0f6aba,  (q31_t)0x23f6adf3, (q31_t)0xb167b79,  (q31_t)0x2401124d,\n    (q31_t)0xb1d8e43,  (q31_t)0x240b7543, (q31_t)0xb24a316,  (q31_t)0x2415d6d5,\n    (q31_t)0xb2bb9f4,  (q31_t)0x24203704, (q31_t)0xb32d2da,  (q31_t)0x242a95ce,\n    (q31_t)0xb39edca,  (q31_t)0x2434f332, (q31_t)0xb410ac3,  (q31_t)0x243f4f32,\n    (q31_t)0xb4829c4,  (q31_t)0x2449a9cc, (q31_t)0xb4f4acd,  (q31_t)0x245402ff,\n    (q31_t)0xb566ddf,  (q31_t)0x245e5acc, (q31_t)0xb5d92f8,  (q31_t)0x2468b132,\n    (q31_t)0xb64ba19,  (q31_t)0x24730631, (q31_t)0xb6be341,  (q31_t)0x247d59c8,\n    (q31_t)0xb730e70,  (q31_t)0x2487abf7, (q31_t)0xb7a3ba5,  (q31_t)0x2491fcbe,\n    (q31_t)0xb816ae1,  (q31_t)0x249c4c1b, (q31_t)0xb889c23,  (q31_t)0x24a69a0f,\n    (q31_t)0xb8fcf6b,  (q31_t)0x24b0e699, (q31_t)0xb9704b9,  (q31_t)0x24bb31ba,\n    (q31_t)0xb9e3c0b,  (q31_t)0x24c57b6f, (q31_t)0xba57563,  (q31_t)0x24cfc3ba,\n    (q31_t)0xbacb0bf,  (q31_t)0x24da0a9a, (q31_t)0xbb3ee20,  (q31_t)0x24e4500e,\n    (q31_t)0xbbb2d85,  (q31_t)0x24ee9415, (q31_t)0xbc26eee,  (q31_t)0x24f8d6b0,\n    (q31_t)0xbc9b25a,  (q31_t)0x250317df, (q31_t)0xbd0f7ca,  (q31_t)0x250d57a0,\n    (q31_t)0xbd83f3d,  (q31_t)0x251795f3, (q31_t)0xbdf88b3,  (q31_t)0x2521d2d8,\n    (q31_t)0xbe6d42b,  (q31_t)0x252c0e4f, (q31_t)0xbee21a5,  (q31_t)0x25364857,\n    (q31_t)0xbf57121,  (q31_t)0x254080ef, (q31_t)0xbfcc29f,  (q31_t)0x254ab818,\n    (q31_t)0xc04161e,  (q31_t)0x2554edd1, (q31_t)0xc0b6b9e,  (q31_t)0x255f2219,\n    (q31_t)0xc12c31f,  (q31_t)0x256954f1, (q31_t)0xc1a1ca0,  (q31_t)0x25738657,\n    (q31_t)0xc217822,  (q31_t)0x257db64c, (q31_t)0xc28d5a3,  (q31_t)0x2587e4cf,\n    (q31_t)0xc303524,  (q31_t)0x259211df, (q31_t)0xc3796a5,  (q31_t)0x259c3d7c,\n    (q31_t)0xc3efa25,  (q31_t)0x25a667a7, (q31_t)0xc465fa3,  (q31_t)0x25b0905d,\n    (q31_t)0xc4dc720,  (q31_t)0x25bab7a0, (q31_t)0xc55309b,  (q31_t)0x25c4dd6e,\n    (q31_t)0xc5c9c14,  (q31_t)0x25cf01c8, (q31_t)0xc64098b,  (q31_t)0x25d924ac,\n    (q31_t)0xc6b78ff,  (q31_t)0x25e3461b, (q31_t)0xc72ea70,  (q31_t)0x25ed6614,\n    (q31_t)0xc7a5dde,  (q31_t)0x25f78497, (q31_t)0xc81d349,  (q31_t)0x2601a1a2,\n    (q31_t)0xc894aaf,  (q31_t)0x260bbd37, (q31_t)0xc90c412,  (q31_t)0x2615d754,\n    (q31_t)0xc983f70,  (q31_t)0x261feffa, (q31_t)0xc9fbcca,  (q31_t)0x262a0727,\n    (q31_t)0xca73c1e,  (q31_t)0x26341cdb, (q31_t)0xcaebd6e,  (q31_t)0x263e3117,\n    (q31_t)0xcb640b8,  (q31_t)0x264843d9, (q31_t)0xcbdc5fc,  (q31_t)0x26525521,\n    (q31_t)0xcc54d3a,  (q31_t)0x265c64ef, (q31_t)0xcccd671,  (q31_t)0x26667342,\n    (q31_t)0xcd461a2,  (q31_t)0x2670801a, (q31_t)0xcdbeecc,  (q31_t)0x267a8b77,\n    (q31_t)0xce37def,  (q31_t)0x26849558, (q31_t)0xceb0f0a,  (q31_t)0x268e9dbd,\n    (q31_t)0xcf2a21d,  (q31_t)0x2698a4a6, (q31_t)0xcfa3729,  (q31_t)0x26a2aa11,\n    (q31_t)0xd01ce2b,  (q31_t)0x26acadff, (q31_t)0xd096725,  (q31_t)0x26b6b070,\n    (q31_t)0xd110216,  (q31_t)0x26c0b162, (q31_t)0xd189efe,  (q31_t)0x26cab0d6,\n    (q31_t)0xd203ddc,  (q31_t)0x26d4aecb, (q31_t)0xd27deb0,  (q31_t)0x26deab41,\n    (q31_t)0xd2f817b,  (q31_t)0x26e8a637, (q31_t)0xd37263a,  (q31_t)0x26f29fad,\n    (q31_t)0xd3eccef,  (q31_t)0x26fc97a3, (q31_t)0xd467599,  (q31_t)0x27068e18,\n    (q31_t)0xd4e2037,  (q31_t)0x2710830c, (q31_t)0xd55ccca,  (q31_t)0x271a767e,\n    (q31_t)0xd5d7b50,  (q31_t)0x2724686e, (q31_t)0xd652bcb,  (q31_t)0x272e58dc,\n    (q31_t)0xd6cde39,  (q31_t)0x273847c8, (q31_t)0xd74929a,  (q31_t)0x27423530,\n    (q31_t)0xd7c48ee,  (q31_t)0x274c2115, (q31_t)0xd840134,  (q31_t)0x27560b76,\n    (q31_t)0xd8bbb6d,  (q31_t)0x275ff452, (q31_t)0xd937798,  (q31_t)0x2769dbaa,\n    (q31_t)0xd9b35b4,  (q31_t)0x2773c17d, (q31_t)0xda2f5c2,  (q31_t)0x277da5cb,\n    (q31_t)0xdaab7c0,  (q31_t)0x27878893, (q31_t)0xdb27bb0,  (q31_t)0x279169d5,\n    (q31_t)0xdba4190,  (q31_t)0x279b4990, (q31_t)0xdc20960,  (q31_t)0x27a527c4,\n    (q31_t)0xdc9d320,  (q31_t)0x27af0472, (q31_t)0xdd19ed0,  (q31_t)0x27b8df97,\n    (q31_t)0xdd96c6f,  (q31_t)0x27c2b934, (q31_t)0xde13bfd,  (q31_t)0x27cc9149,\n    (q31_t)0xde90d79,  (q31_t)0x27d667d5, (q31_t)0xdf0e0e4,  (q31_t)0x27e03cd8,\n    (q31_t)0xdf8b63d,  (q31_t)0x27ea1052, (q31_t)0xe008d84,  (q31_t)0x27f3e241,\n    (q31_t)0xe0866b8,  (q31_t)0x27fdb2a7, (q31_t)0xe1041d9,  (q31_t)0x28078181,\n    (q31_t)0xe181ee8,  (q31_t)0x28114ed0, (q31_t)0xe1ffde2,  (q31_t)0x281b1a94,\n    (q31_t)0xe27dec9,  (q31_t)0x2824e4cc, (q31_t)0xe2fc19c,  (q31_t)0x282ead78,\n    (q31_t)0xe37a65b,  (q31_t)0x28387498, (q31_t)0xe3f8d05,  (q31_t)0x28423a2a,\n    (q31_t)0xe47759a,  (q31_t)0x284bfe2f, (q31_t)0xe4f6019,  (q31_t)0x2855c0a6,\n    (q31_t)0xe574c84,  (q31_t)0x285f8190, (q31_t)0xe5f3ad8,  (q31_t)0x286940ea,\n    (q31_t)0xe672b16,  (q31_t)0x2872feb6, (q31_t)0xe6f1d3d,  (q31_t)0x287cbaf3,\n    (q31_t)0xe77114e,  (q31_t)0x288675a0, (q31_t)0xe7f0748,  (q31_t)0x28902ebd,\n    (q31_t)0xe86ff2a,  (q31_t)0x2899e64a, (q31_t)0xe8ef8f4,  (q31_t)0x28a39c46,\n    (q31_t)0xe96f4a7,  (q31_t)0x28ad50b1, (q31_t)0xe9ef241,  (q31_t)0x28b7038b,\n    (q31_t)0xea6f1c2,  (q31_t)0x28c0b4d2, (q31_t)0xeaef32b,  (q31_t)0x28ca6488,\n    (q31_t)0xeb6f67a,  (q31_t)0x28d412ab, (q31_t)0xebefbb0,  (q31_t)0x28ddbf3b,\n    (q31_t)0xec702cb,  (q31_t)0x28e76a37, (q31_t)0xecf0bcd,  (q31_t)0x28f113a0,\n    (q31_t)0xed716b4,  (q31_t)0x28fabb75, (q31_t)0xedf2380,  (q31_t)0x290461b5,\n    (q31_t)0xee73231,  (q31_t)0x290e0661, (q31_t)0xeef42c7,  (q31_t)0x2917a977,\n    (q31_t)0xef75541,  (q31_t)0x29214af8, (q31_t)0xeff699f,  (q31_t)0x292aeae3,\n    (q31_t)0xf077fe1,  (q31_t)0x29348937, (q31_t)0xf0f9805,  (q31_t)0x293e25f5,\n    (q31_t)0xf17b20d,  (q31_t)0x2947c11c, (q31_t)0xf1fcdf8,  (q31_t)0x29515aab,\n    (q31_t)0xf27ebc5,  (q31_t)0x295af2a3, (q31_t)0xf300b74,  (q31_t)0x29648902,\n    (q31_t)0xf382d05,  (q31_t)0x296e1dc9, (q31_t)0xf405077,  (q31_t)0x2977b0f7,\n    (q31_t)0xf4875ca,  (q31_t)0x2981428c, (q31_t)0xf509cfe,  (q31_t)0x298ad287,\n    (q31_t)0xf58c613,  (q31_t)0x299460e8, (q31_t)0xf60f108,  (q31_t)0x299dedaf,\n    (q31_t)0xf691ddd,  (q31_t)0x29a778db, (q31_t)0xf714c91,  (q31_t)0x29b1026c,\n    (q31_t)0xf797d24,  (q31_t)0x29ba8a61, (q31_t)0xf81af97,  (q31_t)0x29c410ba,\n    (q31_t)0xf89e3e8,  (q31_t)0x29cd9578, (q31_t)0xf921a17,  (q31_t)0x29d71899,\n    (q31_t)0xf9a5225,  (q31_t)0x29e09a1c, (q31_t)0xfa28c10,  (q31_t)0x29ea1a03,\n    (q31_t)0xfaac7d8,  (q31_t)0x29f3984c, (q31_t)0xfb3057d,  (q31_t)0x29fd14f6,\n    (q31_t)0xfbb4500,  (q31_t)0x2a069003, (q31_t)0xfc3865e,  (q31_t)0x2a100970,\n    (q31_t)0xfcbc999,  (q31_t)0x2a19813f, (q31_t)0xfd40eaf,  (q31_t)0x2a22f76e,\n    (q31_t)0xfdc55a1,  (q31_t)0x2a2c6bfd, (q31_t)0xfe49e6d,  (q31_t)0x2a35deeb,\n    (q31_t)0xfece915,  (q31_t)0x2a3f503a, (q31_t)0xff53597,  (q31_t)0x2a48bfe7,\n    (q31_t)0xffd83f4,  (q31_t)0x2a522df3, (q31_t)0x1005d42a, (q31_t)0x2a5b9a5d,\n    (q31_t)0x100e2639, (q31_t)0x2a650525, (q31_t)0x10167a22, (q31_t)0x2a6e6e4b,\n    (q31_t)0x101ecfe4, (q31_t)0x2a77d5ce, (q31_t)0x1027277e, (q31_t)0x2a813bae,\n    (q31_t)0x102f80f1, (q31_t)0x2a8a9fea, (q31_t)0x1037dc3b, (q31_t)0x2a940283,\n    (q31_t)0x1040395d, (q31_t)0x2a9d6377, (q31_t)0x10489856, (q31_t)0x2aa6c2c6,\n    (q31_t)0x1050f926, (q31_t)0x2ab02071, (q31_t)0x10595bcd, (q31_t)0x2ab97c77,\n    (q31_t)0x1061c04a, (q31_t)0x2ac2d6d6, (q31_t)0x106a269d, (q31_t)0x2acc2f90,\n    (q31_t)0x10728ec6, (q31_t)0x2ad586a3, (q31_t)0x107af8c4, (q31_t)0x2adedc10,\n    (q31_t)0x10836497, (q31_t)0x2ae82fd5, (q31_t)0x108bd23f, (q31_t)0x2af181f3,\n    (q31_t)0x109441bb, (q31_t)0x2afad269, (q31_t)0x109cb30b, (q31_t)0x2b042137,\n    (q31_t)0x10a5262f, (q31_t)0x2b0d6e5c, (q31_t)0x10ad9b26, (q31_t)0x2b16b9d9,\n    (q31_t)0x10b611f1, (q31_t)0x2b2003ac, (q31_t)0x10be8a8d, (q31_t)0x2b294bd5,\n    (q31_t)0x10c704fd, (q31_t)0x2b329255, (q31_t)0x10cf813e, (q31_t)0x2b3bd72a,\n    (q31_t)0x10d7ff51, (q31_t)0x2b451a55, (q31_t)0x10e07f36, (q31_t)0x2b4e5bd4,\n    (q31_t)0x10e900ec, (q31_t)0x2b579ba8, (q31_t)0x10f18472, (q31_t)0x2b60d9d0,\n    (q31_t)0x10fa09c9, (q31_t)0x2b6a164d, (q31_t)0x110290f0, (q31_t)0x2b73511c,\n    (q31_t)0x110b19e7, (q31_t)0x2b7c8a3f, (q31_t)0x1113a4ad, (q31_t)0x2b85c1b5,\n    (q31_t)0x111c3142, (q31_t)0x2b8ef77d, (q31_t)0x1124bfa6, (q31_t)0x2b982b97,\n    (q31_t)0x112d4fd9, (q31_t)0x2ba15e03, (q31_t)0x1135e1d9, (q31_t)0x2baa8ec0,\n    (q31_t)0x113e75a8, (q31_t)0x2bb3bdce, (q31_t)0x11470b44, (q31_t)0x2bbceb2d,\n    (q31_t)0x114fa2ad, (q31_t)0x2bc616dd, (q31_t)0x11583be2, (q31_t)0x2bcf40dc,\n    (q31_t)0x1160d6e5, (q31_t)0x2bd8692b, (q31_t)0x116973b3, (q31_t)0x2be18fc9,\n    (q31_t)0x1172124d, (q31_t)0x2beab4b6, (q31_t)0x117ab2b3, (q31_t)0x2bf3d7f2,\n    (q31_t)0x118354e4, (q31_t)0x2bfcf97c, (q31_t)0x118bf8e0, (q31_t)0x2c061953,\n    (q31_t)0x11949ea6, (q31_t)0x2c0f3779, (q31_t)0x119d4636, (q31_t)0x2c1853eb,\n    (q31_t)0x11a5ef90, (q31_t)0x2c216eaa, (q31_t)0x11ae9ab4, (q31_t)0x2c2a87b6,\n    (q31_t)0x11b747a0, (q31_t)0x2c339f0e, (q31_t)0x11bff656, (q31_t)0x2c3cb4b1,\n    (q31_t)0x11c8a6d4, (q31_t)0x2c45c8a0, (q31_t)0x11d1591a, (q31_t)0x2c4edada,\n    (q31_t)0x11da0d28, (q31_t)0x2c57eb5e, (q31_t)0x11e2c2fd, (q31_t)0x2c60fa2d,\n    (q31_t)0x11eb7a9a, (q31_t)0x2c6a0746, (q31_t)0x11f433fd, (q31_t)0x2c7312a9,\n    (q31_t)0x11fcef27, (q31_t)0x2c7c1c55, (q31_t)0x1205ac17, (q31_t)0x2c85244a,\n    (q31_t)0x120e6acc, (q31_t)0x2c8e2a87, (q31_t)0x12172b48, (q31_t)0x2c972f0d,\n    (q31_t)0x121fed88, (q31_t)0x2ca031da, (q31_t)0x1228b18d, (q31_t)0x2ca932ef,\n    (q31_t)0x12317756, (q31_t)0x2cb2324c, (q31_t)0x123a3ee4, (q31_t)0x2cbb2fef,\n    (q31_t)0x12430835, (q31_t)0x2cc42bd9, (q31_t)0x124bd34a, (q31_t)0x2ccd2609,\n    (q31_t)0x1254a021, (q31_t)0x2cd61e7f, (q31_t)0x125d6ebc, (q31_t)0x2cdf153a,\n    (q31_t)0x12663f19, (q31_t)0x2ce80a3a, (q31_t)0x126f1138, (q31_t)0x2cf0fd80,\n    (q31_t)0x1277e518, (q31_t)0x2cf9ef09, (q31_t)0x1280babb, (q31_t)0x2d02ded7,\n    (q31_t)0x1289921e, (q31_t)0x2d0bcce8, (q31_t)0x12926b41, (q31_t)0x2d14b93d,\n    (q31_t)0x129b4626, (q31_t)0x2d1da3d5, (q31_t)0x12a422ca, (q31_t)0x2d268cb0,\n    (q31_t)0x12ad012e, (q31_t)0x2d2f73cd, (q31_t)0x12b5e151, (q31_t)0x2d38592c,\n    (q31_t)0x12bec333, (q31_t)0x2d413ccd, (q31_t)0x12c7a6d4, (q31_t)0x2d4a1eaf,\n    (q31_t)0x12d08c33, (q31_t)0x2d52fed2, (q31_t)0x12d97350, (q31_t)0x2d5bdd36,\n    (q31_t)0x12e25c2b, (q31_t)0x2d64b9da, (q31_t)0x12eb46c3, (q31_t)0x2d6d94bf,\n    (q31_t)0x12f43318, (q31_t)0x2d766de2, (q31_t)0x12fd2129, (q31_t)0x2d7f4545,\n    (q31_t)0x130610f7, (q31_t)0x2d881ae8, (q31_t)0x130f0280, (q31_t)0x2d90eec8,\n    (q31_t)0x1317f5c6, (q31_t)0x2d99c0e7, (q31_t)0x1320eac6, (q31_t)0x2da29144,\n    (q31_t)0x1329e181, (q31_t)0x2dab5fdf, (q31_t)0x1332d9f7, (q31_t)0x2db42cb6,\n    (q31_t)0x133bd427, (q31_t)0x2dbcf7cb, (q31_t)0x1344d011, (q31_t)0x2dc5c11c,\n    (q31_t)0x134dcdb4, (q31_t)0x2dce88aa, (q31_t)0x1356cd11, (q31_t)0x2dd74e73,\n    (q31_t)0x135fce26, (q31_t)0x2de01278, (q31_t)0x1368d0f3, (q31_t)0x2de8d4b8,\n    (q31_t)0x1371d579, (q31_t)0x2df19534, (q31_t)0x137adbb6, (q31_t)0x2dfa53e9,\n    (q31_t)0x1383e3ab, (q31_t)0x2e0310d9, (q31_t)0x138ced57, (q31_t)0x2e0bcc03,\n    (q31_t)0x1395f8ba, (q31_t)0x2e148566, (q31_t)0x139f05d3, (q31_t)0x2e1d3d03,\n    (q31_t)0x13a814a2, (q31_t)0x2e25f2d8, (q31_t)0x13b12526, (q31_t)0x2e2ea6e6,\n    (q31_t)0x13ba3760, (q31_t)0x2e37592c, (q31_t)0x13c34b4f, (q31_t)0x2e4009aa,\n    (q31_t)0x13cc60f2, (q31_t)0x2e48b860, (q31_t)0x13d5784a, (q31_t)0x2e51654c,\n    (q31_t)0x13de9156, (q31_t)0x2e5a1070, (q31_t)0x13e7ac15, (q31_t)0x2e62b9ca,\n    (q31_t)0x13f0c887, (q31_t)0x2e6b615a, (q31_t)0x13f9e6ad, (q31_t)0x2e740720,\n    (q31_t)0x14030684, (q31_t)0x2e7cab1c, (q31_t)0x140c280e, (q31_t)0x2e854d4d,\n    (q31_t)0x14154b4a, (q31_t)0x2e8dedb3, (q31_t)0x141e7037, (q31_t)0x2e968c4d,\n    (q31_t)0x142796d5, (q31_t)0x2e9f291b, (q31_t)0x1430bf24, (q31_t)0x2ea7c41e,\n    (q31_t)0x1439e923, (q31_t)0x2eb05d53, (q31_t)0x144314d3, (q31_t)0x2eb8f4bc,\n    (q31_t)0x144c4232, (q31_t)0x2ec18a58, (q31_t)0x14557140, (q31_t)0x2eca1e27,\n    (q31_t)0x145ea1fd, (q31_t)0x2ed2b027, (q31_t)0x1467d469, (q31_t)0x2edb405a,\n    (q31_t)0x14710883, (q31_t)0x2ee3cebe, (q31_t)0x147a3e4b, (q31_t)0x2eec5b53,\n    (q31_t)0x148375c1, (q31_t)0x2ef4e619, (q31_t)0x148caee4, (q31_t)0x2efd6f10,\n    (q31_t)0x1495e9b3, (q31_t)0x2f05f637, (q31_t)0x149f2630, (q31_t)0x2f0e7b8e,\n    (q31_t)0x14a86458, (q31_t)0x2f16ff14, (q31_t)0x14b1a42c, (q31_t)0x2f1f80ca,\n    (q31_t)0x14bae5ab, (q31_t)0x2f2800af, (q31_t)0x14c428d6, (q31_t)0x2f307ec2,\n    (q31_t)0x14cd6dab, (q31_t)0x2f38fb03, (q31_t)0x14d6b42b, (q31_t)0x2f417573,\n    (q31_t)0x14dffc54, (q31_t)0x2f49ee0f, (q31_t)0x14e94627, (q31_t)0x2f5264da,\n    (q31_t)0x14f291a4, (q31_t)0x2f5ad9d1, (q31_t)0x14fbdec9, (q31_t)0x2f634cf5,\n    (q31_t)0x15052d97, (q31_t)0x2f6bbe45, (q31_t)0x150e7e0d, (q31_t)0x2f742dc1,\n    (q31_t)0x1517d02b, (q31_t)0x2f7c9b69, (q31_t)0x152123f0, (q31_t)0x2f85073c,\n    (q31_t)0x152a795d, (q31_t)0x2f8d713a, (q31_t)0x1533d070, (q31_t)0x2f95d963,\n    (q31_t)0x153d292a, (q31_t)0x2f9e3fb6, (q31_t)0x15468389, (q31_t)0x2fa6a433,\n    (q31_t)0x154fdf8f, (q31_t)0x2faf06da, (q31_t)0x15593d3a, (q31_t)0x2fb767aa,\n    (q31_t)0x15629c89, (q31_t)0x2fbfc6a3, (q31_t)0x156bfd7d, (q31_t)0x2fc823c5,\n    (q31_t)0x15756016, (q31_t)0x2fd07f0f, (q31_t)0x157ec452, (q31_t)0x2fd8d882,\n    (q31_t)0x15882a32, (q31_t)0x2fe1301c, (q31_t)0x159191b5, (q31_t)0x2fe985de,\n    (q31_t)0x159afadb, (q31_t)0x2ff1d9c7, (q31_t)0x15a465a3, (q31_t)0x2ffa2bd6,\n    (q31_t)0x15add20d, (q31_t)0x30027c0c, (q31_t)0x15b74019, (q31_t)0x300aca69,\n    (q31_t)0x15c0afc6, (q31_t)0x301316eb, (q31_t)0x15ca2115, (q31_t)0x301b6193,\n    (q31_t)0x15d39403, (q31_t)0x3023aa5f, (q31_t)0x15dd0892, (q31_t)0x302bf151,\n    (q31_t)0x15e67ec1, (q31_t)0x30343667, (q31_t)0x15eff690, (q31_t)0x303c79a2,\n    (q31_t)0x15f96ffd, (q31_t)0x3044bb00, (q31_t)0x1602eb0a, (q31_t)0x304cfa83,\n    (q31_t)0x160c67b4, (q31_t)0x30553828, (q31_t)0x1615e5fd, (q31_t)0x305d73f0,\n    (q31_t)0x161f65e4, (q31_t)0x3065addb, (q31_t)0x1628e767, (q31_t)0x306de5e9,\n    (q31_t)0x16326a88, (q31_t)0x30761c18, (q31_t)0x163bef46, (q31_t)0x307e5069,\n    (q31_t)0x1645759f, (q31_t)0x308682dc, (q31_t)0x164efd94, (q31_t)0x308eb36f,\n    (q31_t)0x16588725, (q31_t)0x3096e223, (q31_t)0x16621251, (q31_t)0x309f0ef8,\n    (q31_t)0x166b9f18, (q31_t)0x30a739ed, (q31_t)0x16752d79, (q31_t)0x30af6302,\n    (q31_t)0x167ebd74, (q31_t)0x30b78a36, (q31_t)0x16884f09, (q31_t)0x30bfaf89,\n    (q31_t)0x1691e237, (q31_t)0x30c7d2fb, (q31_t)0x169b76fe, (q31_t)0x30cff48c,\n    (q31_t)0x16a50d5d, (q31_t)0x30d8143b, (q31_t)0x16aea555, (q31_t)0x30e03208,\n    (q31_t)0x16b83ee4, (q31_t)0x30e84df3, (q31_t)0x16c1da0b, (q31_t)0x30f067fb,\n    (q31_t)0x16cb76c9, (q31_t)0x30f8801f, (q31_t)0x16d5151d, (q31_t)0x31009661,\n    (q31_t)0x16deb508, (q31_t)0x3108aabf, (q31_t)0x16e85689, (q31_t)0x3110bd39,\n    (q31_t)0x16f1f99f, (q31_t)0x3118cdcf, (q31_t)0x16fb9e4b, (q31_t)0x3120dc80,\n    (q31_t)0x1705448b, (q31_t)0x3128e94c, (q31_t)0x170eec60, (q31_t)0x3130f433,\n    (q31_t)0x171895c9, (q31_t)0x3138fd35, (q31_t)0x172240c5, (q31_t)0x31410450,\n    (q31_t)0x172bed55, (q31_t)0x31490986, (q31_t)0x17359b78, (q31_t)0x31510cd5,\n    (q31_t)0x173f4b2e, (q31_t)0x31590e3e, (q31_t)0x1748fc75, (q31_t)0x31610dbf,\n    (q31_t)0x1752af4f, (q31_t)0x31690b59, (q31_t)0x175c63ba, (q31_t)0x3171070c,\n    (q31_t)0x176619b6, (q31_t)0x317900d6, (q31_t)0x176fd143, (q31_t)0x3180f8b8,\n    (q31_t)0x17798a60, (q31_t)0x3188eeb2, (q31_t)0x1783450d, (q31_t)0x3190e2c3,\n    (q31_t)0x178d014a, (q31_t)0x3198d4ea, (q31_t)0x1796bf16, (q31_t)0x31a0c528,\n    (q31_t)0x17a07e70, (q31_t)0x31a8b37c, (q31_t)0x17aa3f5a, (q31_t)0x31b09fe7,\n    (q31_t)0x17b401d1, (q31_t)0x31b88a66, (q31_t)0x17bdc5d6, (q31_t)0x31c072fb,\n    (q31_t)0x17c78b68, (q31_t)0x31c859a5, (q31_t)0x17d15288, (q31_t)0x31d03e64,\n    (q31_t)0x17db1b34, (q31_t)0x31d82137, (q31_t)0x17e4e56c, (q31_t)0x31e0021e,\n    (q31_t)0x17eeb130, (q31_t)0x31e7e118, (q31_t)0x17f87e7f, (q31_t)0x31efbe27,\n    (q31_t)0x18024d59, (q31_t)0x31f79948, (q31_t)0x180c1dbf, (q31_t)0x31ff727c,\n    (q31_t)0x1815efae, (q31_t)0x320749c3, (q31_t)0x181fc328, (q31_t)0x320f1f1c,\n    (q31_t)0x1829982b, (q31_t)0x3216f287, (q31_t)0x18336eb7, (q31_t)0x321ec403,\n    (q31_t)0x183d46cc, (q31_t)0x32269391, (q31_t)0x18472069, (q31_t)0x322e6130,\n    (q31_t)0x1850fb8e, (q31_t)0x32362ce0, (q31_t)0x185ad83c, (q31_t)0x323df6a0,\n    (q31_t)0x1864b670, (q31_t)0x3245be70, (q31_t)0x186e962b, (q31_t)0x324d8450,\n    (q31_t)0x1878776d, (q31_t)0x32554840, (q31_t)0x18825a35, (q31_t)0x325d0a3e,\n    (q31_t)0x188c3e83, (q31_t)0x3264ca4c, (q31_t)0x18962456, (q31_t)0x326c8868,\n    (q31_t)0x18a00bae, (q31_t)0x32744493, (q31_t)0x18a9f48a, (q31_t)0x327bfecc,\n    (q31_t)0x18b3deeb, (q31_t)0x3283b712, (q31_t)0x18bdcad0, (q31_t)0x328b6d66,\n    (q31_t)0x18c7b838, (q31_t)0x329321c7, (q31_t)0x18d1a724, (q31_t)0x329ad435,\n    (q31_t)0x18db9792, (q31_t)0x32a284b0, (q31_t)0x18e58982, (q31_t)0x32aa3336,\n    (q31_t)0x18ef7cf4, (q31_t)0x32b1dfc9, (q31_t)0x18f971e8, (q31_t)0x32b98a67,\n    (q31_t)0x1903685d, (q31_t)0x32c13311, (q31_t)0x190d6053, (q31_t)0x32c8d9c6,\n    (q31_t)0x191759c9, (q31_t)0x32d07e85, (q31_t)0x192154bf, (q31_t)0x32d82150,\n    (q31_t)0x192b5135, (q31_t)0x32dfc224, (q31_t)0x19354f2a, (q31_t)0x32e76102,\n    (q31_t)0x193f4e9e, (q31_t)0x32eefdea, (q31_t)0x19494f90, (q31_t)0x32f698db,\n    (q31_t)0x19535201, (q31_t)0x32fe31d5, (q31_t)0x195d55ef, (q31_t)0x3305c8d7,\n    (q31_t)0x19675b5a, (q31_t)0x330d5de3, (q31_t)0x19716243, (q31_t)0x3314f0f6,\n    (q31_t)0x197b6aa8, (q31_t)0x331c8211, (q31_t)0x19857489, (q31_t)0x33241134,\n    (q31_t)0x198f7fe6, (q31_t)0x332b9e5e, (q31_t)0x19998cbe, (q31_t)0x3333298f,\n    (q31_t)0x19a39b11, (q31_t)0x333ab2c6, (q31_t)0x19adaadf, (q31_t)0x33423a04,\n    (q31_t)0x19b7bc27, (q31_t)0x3349bf48, (q31_t)0x19c1cee9, (q31_t)0x33514292,\n    (q31_t)0x19cbe325, (q31_t)0x3358c3e2, (q31_t)0x19d5f8d9, (q31_t)0x33604336,\n    (q31_t)0x19e01006, (q31_t)0x3367c090, (q31_t)0x19ea28ac, (q31_t)0x336f3bee,\n    (q31_t)0x19f442c9, (q31_t)0x3376b551, (q31_t)0x19fe5e5e, (q31_t)0x337e2cb7,\n    (q31_t)0x1a087b69, (q31_t)0x3385a222, (q31_t)0x1a1299ec, (q31_t)0x338d1590,\n    (q31_t)0x1a1cb9e5, (q31_t)0x33948701, (q31_t)0x1a26db54, (q31_t)0x339bf675,\n    (q31_t)0x1a30fe38, (q31_t)0x33a363ec, (q31_t)0x1a3b2292, (q31_t)0x33aacf65,\n    (q31_t)0x1a454860, (q31_t)0x33b238e0, (q31_t)0x1a4f6fa3, (q31_t)0x33b9a05d,\n    (q31_t)0x1a599859, (q31_t)0x33c105db, (q31_t)0x1a63c284, (q31_t)0x33c8695b,\n    (q31_t)0x1a6dee21, (q31_t)0x33cfcadc, (q31_t)0x1a781b31, (q31_t)0x33d72a5d,\n    (q31_t)0x1a8249b4, (q31_t)0x33de87de, (q31_t)0x1a8c79a9, (q31_t)0x33e5e360,\n    (q31_t)0x1a96ab0f, (q31_t)0x33ed3ce1, (q31_t)0x1aa0dde7, (q31_t)0x33f49462,\n    (q31_t)0x1aab122f, (q31_t)0x33fbe9e2, (q31_t)0x1ab547e8, (q31_t)0x34033d61,\n    (q31_t)0x1abf7f11, (q31_t)0x340a8edf, (q31_t)0x1ac9b7a9, (q31_t)0x3411de5b,\n    (q31_t)0x1ad3f1b1, (q31_t)0x34192bd5, (q31_t)0x1ade2d28, (q31_t)0x3420774d,\n    (q31_t)0x1ae86a0d, (q31_t)0x3427c0c3, (q31_t)0x1af2a860, (q31_t)0x342f0836,\n    (q31_t)0x1afce821, (q31_t)0x34364da6, (q31_t)0x1b072950, (q31_t)0x343d9112,\n    (q31_t)0x1b116beb, (q31_t)0x3444d27b, (q31_t)0x1b1baff2, (q31_t)0x344c11e0,\n    (q31_t)0x1b25f566, (q31_t)0x34534f41, (q31_t)0x1b303c46, (q31_t)0x345a8a9d,\n    (q31_t)0x1b3a8491, (q31_t)0x3461c3f5, (q31_t)0x1b44ce46, (q31_t)0x3468fb47,\n    (q31_t)0x1b4f1967, (q31_t)0x34703095, (q31_t)0x1b5965f1, (q31_t)0x347763dd,\n    (q31_t)0x1b63b3e5, (q31_t)0x347e951f, (q31_t)0x1b6e0342, (q31_t)0x3485c45b,\n    (q31_t)0x1b785409, (q31_t)0x348cf190, (q31_t)0x1b82a638, (q31_t)0x34941cbf,\n    (q31_t)0x1b8cf9cf, (q31_t)0x349b45e7, (q31_t)0x1b974ece, (q31_t)0x34a26d08,\n    (q31_t)0x1ba1a534, (q31_t)0x34a99221, (q31_t)0x1babfd01, (q31_t)0x34b0b533,\n    (q31_t)0x1bb65634, (q31_t)0x34b7d63c, (q31_t)0x1bc0b0ce, (q31_t)0x34bef53d,\n    (q31_t)0x1bcb0cce, (q31_t)0x34c61236, (q31_t)0x1bd56a32, (q31_t)0x34cd2d26,\n    (q31_t)0x1bdfc8fc, (q31_t)0x34d4460c, (q31_t)0x1bea292b, (q31_t)0x34db5cea,\n    (q31_t)0x1bf48abd, (q31_t)0x34e271bd, (q31_t)0x1bfeedb3, (q31_t)0x34e98487,\n    (q31_t)0x1c09520d, (q31_t)0x34f09546, (q31_t)0x1c13b7c9, (q31_t)0x34f7a3fb,\n    (q31_t)0x1c1e1ee9, (q31_t)0x34feb0a5, (q31_t)0x1c28876a, (q31_t)0x3505bb44,\n    (q31_t)0x1c32f14d, (q31_t)0x350cc3d8, (q31_t)0x1c3d5c91, (q31_t)0x3513ca60,\n    (q31_t)0x1c47c936, (q31_t)0x351acedd, (q31_t)0x1c52373c, (q31_t)0x3521d14d,\n    (q31_t)0x1c5ca6a2, (q31_t)0x3528d1b1, (q31_t)0x1c671768, (q31_t)0x352fd008,\n    (q31_t)0x1c71898d, (q31_t)0x3536cc52, (q31_t)0x1c7bfd11, (q31_t)0x353dc68f,\n    (q31_t)0x1c8671f3, (q31_t)0x3544bebf, (q31_t)0x1c90e834, (q31_t)0x354bb4e1,\n    (q31_t)0x1c9b5fd2, (q31_t)0x3552a8f4, (q31_t)0x1ca5d8cd, (q31_t)0x35599afa,\n    (q31_t)0x1cb05326, (q31_t)0x35608af1, (q31_t)0x1cbacedb, (q31_t)0x356778d9,\n    (q31_t)0x1cc54bec, (q31_t)0x356e64b2, (q31_t)0x1ccfca59, (q31_t)0x35754e7c,\n    (q31_t)0x1cda4a21, (q31_t)0x357c3636, (q31_t)0x1ce4cb44, (q31_t)0x35831be0,\n    (q31_t)0x1cef4dc2, (q31_t)0x3589ff7a, (q31_t)0x1cf9d199, (q31_t)0x3590e104,\n    (q31_t)0x1d0456ca, (q31_t)0x3597c07d, (q31_t)0x1d0edd55, (q31_t)0x359e9de5,\n    (q31_t)0x1d196538, (q31_t)0x35a5793c, (q31_t)0x1d23ee74, (q31_t)0x35ac5282,\n    (q31_t)0x1d2e7908, (q31_t)0x35b329b5, (q31_t)0x1d3904f4, (q31_t)0x35b9fed7,\n    (q31_t)0x1d439236, (q31_t)0x35c0d1e7, (q31_t)0x1d4e20d0, (q31_t)0x35c7a2e3,\n    (q31_t)0x1d58b0c0, (q31_t)0x35ce71ce, (q31_t)0x1d634206, (q31_t)0x35d53ea5,\n    (q31_t)0x1d6dd4a2, (q31_t)0x35dc0968, (q31_t)0x1d786892, (q31_t)0x35e2d219,\n    (q31_t)0x1d82fdd8, (q31_t)0x35e998b5, (q31_t)0x1d8d9472, (q31_t)0x35f05d3d,\n    (q31_t)0x1d982c60, (q31_t)0x35f71fb1, (q31_t)0x1da2c5a2, (q31_t)0x35fde011,\n    (q31_t)0x1dad6036, (q31_t)0x36049e5b, (q31_t)0x1db7fc1e, (q31_t)0x360b5a90,\n    (q31_t)0x1dc29958, (q31_t)0x361214b0, (q31_t)0x1dcd37e4, (q31_t)0x3618ccba,\n    (q31_t)0x1dd7d7c1, (q31_t)0x361f82af, (q31_t)0x1de278ef, (q31_t)0x3626368d,\n    (q31_t)0x1ded1b6e, (q31_t)0x362ce855, (q31_t)0x1df7bf3e, (q31_t)0x36339806,\n    (q31_t)0x1e02645d, (q31_t)0x363a45a0, (q31_t)0x1e0d0acc, (q31_t)0x3640f123,\n    (q31_t)0x1e17b28a, (q31_t)0x36479a8e, (q31_t)0x1e225b96, (q31_t)0x364e41e2,\n    (q31_t)0x1e2d05f1, (q31_t)0x3654e71d, (q31_t)0x1e37b199, (q31_t)0x365b8a41,\n    (q31_t)0x1e425e8f, (q31_t)0x36622b4c, (q31_t)0x1e4d0cd2, (q31_t)0x3668ca3e,\n    (q31_t)0x1e57bc62, (q31_t)0x366f6717, (q31_t)0x1e626d3e, (q31_t)0x367601d7,\n    (q31_t)0x1e6d1f65, (q31_t)0x367c9a7e, (q31_t)0x1e77d2d8, (q31_t)0x3683310b,\n    (q31_t)0x1e828796, (q31_t)0x3689c57d, (q31_t)0x1e8d3d9e, (q31_t)0x369057d6,\n    (q31_t)0x1e97f4f1, (q31_t)0x3696e814, (q31_t)0x1ea2ad8d, (q31_t)0x369d7637,\n    (q31_t)0x1ead6773, (q31_t)0x36a4023f, (q31_t)0x1eb822a1, (q31_t)0x36aa8c2c,\n    (q31_t)0x1ec2df18, (q31_t)0x36b113fd, (q31_t)0x1ecd9cd7, (q31_t)0x36b799b3,\n    (q31_t)0x1ed85bdd, (q31_t)0x36be1d4c, (q31_t)0x1ee31c2b, (q31_t)0x36c49ec9,\n    (q31_t)0x1eedddc0, (q31_t)0x36cb1e2a, (q31_t)0x1ef8a09b, (q31_t)0x36d19b6e,\n    (q31_t)0x1f0364bc, (q31_t)0x36d81695, (q31_t)0x1f0e2a22, (q31_t)0x36de8f9e,\n    (q31_t)0x1f18f0ce, (q31_t)0x36e5068a, (q31_t)0x1f23b8be, (q31_t)0x36eb7b58,\n    (q31_t)0x1f2e81f3, (q31_t)0x36f1ee09, (q31_t)0x1f394c6b, (q31_t)0x36f85e9a,\n    (q31_t)0x1f441828, (q31_t)0x36fecd0e, (q31_t)0x1f4ee527, (q31_t)0x37053962,\n    (q31_t)0x1f59b369, (q31_t)0x370ba398, (q31_t)0x1f6482ed, (q31_t)0x37120bae,\n    (q31_t)0x1f6f53b3, (q31_t)0x371871a5, (q31_t)0x1f7a25ba, (q31_t)0x371ed57c,\n    (q31_t)0x1f84f902, (q31_t)0x37253733, (q31_t)0x1f8fcd8b, (q31_t)0x372b96ca,\n    (q31_t)0x1f9aa354, (q31_t)0x3731f440, (q31_t)0x1fa57a5d, (q31_t)0x37384f95,\n    (q31_t)0x1fb052a5, (q31_t)0x373ea8ca, (q31_t)0x1fbb2c2c, (q31_t)0x3744ffdd,\n    (q31_t)0x1fc606f1, (q31_t)0x374b54ce, (q31_t)0x1fd0e2f5, (q31_t)0x3751a79e,\n    (q31_t)0x1fdbc036, (q31_t)0x3757f84c, (q31_t)0x1fe69eb4, (q31_t)0x375e46d8,\n    (q31_t)0x1ff17e70, (q31_t)0x37649341, (q31_t)0x1ffc5f67, (q31_t)0x376add88,\n    (q31_t)0x2007419b, (q31_t)0x377125ac, (q31_t)0x2012250a, (q31_t)0x37776bac,\n    (q31_t)0x201d09b4, (q31_t)0x377daf89, (q31_t)0x2027ef99, (q31_t)0x3783f143,\n    (q31_t)0x2032d6b8, (q31_t)0x378a30d8, (q31_t)0x203dbf11, (q31_t)0x37906e49,\n    (q31_t)0x2048a8a4, (q31_t)0x3796a996, (q31_t)0x2053936f, (q31_t)0x379ce2be,\n    (q31_t)0x205e7f74, (q31_t)0x37a319c2, (q31_t)0x20696cb0, (q31_t)0x37a94ea0,\n    (q31_t)0x20745b24, (q31_t)0x37af8159, (q31_t)0x207f4acf, (q31_t)0x37b5b1ec,\n    (q31_t)0x208a3bb2, (q31_t)0x37bbe05a, (q31_t)0x20952dcb, (q31_t)0x37c20ca1,\n    (q31_t)0x20a0211a, (q31_t)0x37c836c2, (q31_t)0x20ab159e, (q31_t)0x37ce5ebd,\n    (q31_t)0x20b60b58, (q31_t)0x37d48490, (q31_t)0x20c10247, (q31_t)0x37daa83d,\n    (q31_t)0x20cbfa6a, (q31_t)0x37e0c9c3, (q31_t)0x20d6f3c1, (q31_t)0x37e6e921,\n    (q31_t)0x20e1ee4b, (q31_t)0x37ed0657, (q31_t)0x20ecea09, (q31_t)0x37f32165,\n    (q31_t)0x20f7e6f9, (q31_t)0x37f93a4b, (q31_t)0x2102e51c, (q31_t)0x37ff5109,\n    (q31_t)0x210de470, (q31_t)0x3805659e, (q31_t)0x2118e4f6, (q31_t)0x380b780a,\n    (q31_t)0x2123e6ad, (q31_t)0x3811884d, (q31_t)0x212ee995, (q31_t)0x38179666,\n    (q31_t)0x2139edac, (q31_t)0x381da256, (q31_t)0x2144f2f3, (q31_t)0x3823ac1d,\n    (q31_t)0x214ff96a, (q31_t)0x3829b3b9, (q31_t)0x215b0110, (q31_t)0x382fb92a,\n    (q31_t)0x216609e3, (q31_t)0x3835bc71, (q31_t)0x217113e5, (q31_t)0x383bbd8e,\n    (q31_t)0x217c1f15, (q31_t)0x3841bc7f, (q31_t)0x21872b72, (q31_t)0x3847b946,\n    (q31_t)0x219238fb, (q31_t)0x384db3e0, (q31_t)0x219d47b1, (q31_t)0x3853ac4f,\n    (q31_t)0x21a85793, (q31_t)0x3859a292, (q31_t)0x21b368a0, (q31_t)0x385f96a9,\n    (q31_t)0x21be7ad8, (q31_t)0x38658894, (q31_t)0x21c98e3b, (q31_t)0x386b7852,\n    (q31_t)0x21d4a2c8, (q31_t)0x387165e3, (q31_t)0x21dfb87f, (q31_t)0x38775147,\n    (q31_t)0x21eacf5f, (q31_t)0x387d3a7e, (q31_t)0x21f5e768, (q31_t)0x38832187,\n    (q31_t)0x22010099, (q31_t)0x38890663, (q31_t)0x220c1af3, (q31_t)0x388ee910,\n    (q31_t)0x22173674, (q31_t)0x3894c98f, (q31_t)0x2222531c, (q31_t)0x389aa7e0,\n    (q31_t)0x222d70eb, (q31_t)0x38a08402, (q31_t)0x22388fe1, (q31_t)0x38a65df6,\n    (q31_t)0x2243affc, (q31_t)0x38ac35ba, (q31_t)0x224ed13d, (q31_t)0x38b20b4f,\n    (q31_t)0x2259f3a3, (q31_t)0x38b7deb4, (q31_t)0x2265172e, (q31_t)0x38bdafea,\n    (q31_t)0x22703bdc, (q31_t)0x38c37eef, (q31_t)0x227b61af, (q31_t)0x38c94bc4,\n    (q31_t)0x228688a4, (q31_t)0x38cf1669, (q31_t)0x2291b0bd, (q31_t)0x38d4dedd,\n    (q31_t)0x229cd9f8, (q31_t)0x38daa520, (q31_t)0x22a80456, (q31_t)0x38e06932,\n    (q31_t)0x22b32fd4, (q31_t)0x38e62b13, (q31_t)0x22be5c74, (q31_t)0x38ebeac2,\n    (q31_t)0x22c98a35, (q31_t)0x38f1a840, (q31_t)0x22d4b916, (q31_t)0x38f7638b,\n    (q31_t)0x22dfe917, (q31_t)0x38fd1ca4, (q31_t)0x22eb1a37, (q31_t)0x3902d38b,\n    (q31_t)0x22f64c77, (q31_t)0x3908883f, (q31_t)0x23017fd5, (q31_t)0x390e3ac0,\n    (q31_t)0x230cb451, (q31_t)0x3913eb0e, (q31_t)0x2317e9eb, (q31_t)0x39199929,\n    (q31_t)0x232320a2, (q31_t)0x391f4510, (q31_t)0x232e5876, (q31_t)0x3924eec3,\n    (q31_t)0x23399167, (q31_t)0x392a9642, (q31_t)0x2344cb73, (q31_t)0x39303b8e,\n    (q31_t)0x2350069b, (q31_t)0x3935dea4, (q31_t)0x235b42df, (q31_t)0x393b7f86,\n    (q31_t)0x2366803c, (q31_t)0x39411e33, (q31_t)0x2371beb5, (q31_t)0x3946baac,\n    (q31_t)0x237cfe47, (q31_t)0x394c54ee, (q31_t)0x23883ef2, (q31_t)0x3951ecfc,\n    (q31_t)0x239380b6, (q31_t)0x395782d3, (q31_t)0x239ec393, (q31_t)0x395d1675,\n    (q31_t)0x23aa0788, (q31_t)0x3962a7e0, (q31_t)0x23b54c95, (q31_t)0x39683715,\n    (q31_t)0x23c092b9, (q31_t)0x396dc414, (q31_t)0x23cbd9f4, (q31_t)0x39734edc,\n    (q31_t)0x23d72245, (q31_t)0x3978d76c, (q31_t)0x23e26bac, (q31_t)0x397e5dc6,\n    (q31_t)0x23edb628, (q31_t)0x3983e1e8, (q31_t)0x23f901ba, (q31_t)0x398963d2,\n    (q31_t)0x24044e60, (q31_t)0x398ee385, (q31_t)0x240f9c1a, (q31_t)0x399460ff,\n    (q31_t)0x241aeae8, (q31_t)0x3999dc42, (q31_t)0x24263ac9, (q31_t)0x399f554b,\n    (q31_t)0x24318bbe, (q31_t)0x39a4cc1c, (q31_t)0x243cddc4, (q31_t)0x39aa40b4,\n    (q31_t)0x244830dd, (q31_t)0x39afb313, (q31_t)0x24538507, (q31_t)0x39b52339,\n    (q31_t)0x245eda43, (q31_t)0x39ba9125, (q31_t)0x246a308f, (q31_t)0x39bffcd7,\n    (q31_t)0x247587eb, (q31_t)0x39c5664f, (q31_t)0x2480e057, (q31_t)0x39cacd8d,\n    (q31_t)0x248c39d3, (q31_t)0x39d03291, (q31_t)0x2497945d, (q31_t)0x39d5955a,\n    (q31_t)0x24a2eff6, (q31_t)0x39daf5e8, (q31_t)0x24ae4c9d, (q31_t)0x39e0543c,\n    (q31_t)0x24b9aa52, (q31_t)0x39e5b054, (q31_t)0x24c50914, (q31_t)0x39eb0a31,\n    (q31_t)0x24d068e2, (q31_t)0x39f061d2, (q31_t)0x24dbc9bd, (q31_t)0x39f5b737,\n    (q31_t)0x24e72ba4, (q31_t)0x39fb0a60, (q31_t)0x24f28e96, (q31_t)0x3a005b4d,\n    (q31_t)0x24fdf294, (q31_t)0x3a05a9fd, (q31_t)0x2509579b, (q31_t)0x3a0af671,\n    (q31_t)0x2514bdad, (q31_t)0x3a1040a8, (q31_t)0x252024c9, (q31_t)0x3a1588a2,\n    (q31_t)0x252b8cee, (q31_t)0x3a1ace5f, (q31_t)0x2536f61b, (q31_t)0x3a2011de,\n    (q31_t)0x25426051, (q31_t)0x3a25531f, (q31_t)0x254dcb8f, (q31_t)0x3a2a9223,\n    (q31_t)0x255937d5, (q31_t)0x3a2fcee8, (q31_t)0x2564a521, (q31_t)0x3a350970,\n    (q31_t)0x25701374, (q31_t)0x3a3a41b9, (q31_t)0x257b82cd, (q31_t)0x3a3f77c3,\n    (q31_t)0x2586f32c, (q31_t)0x3a44ab8e, (q31_t)0x25926490, (q31_t)0x3a49dd1a,\n    (q31_t)0x259dd6f9, (q31_t)0x3a4f0c67, (q31_t)0x25a94a67, (q31_t)0x3a543974,\n    (q31_t)0x25b4bed8, (q31_t)0x3a596442, (q31_t)0x25c0344d, (q31_t)0x3a5e8cd0,\n    (q31_t)0x25cbaac5, (q31_t)0x3a63b31d, (q31_t)0x25d72240, (q31_t)0x3a68d72b,\n    (q31_t)0x25e29abc, (q31_t)0x3a6df8f8, (q31_t)0x25ee143b, (q31_t)0x3a731884,\n    (q31_t)0x25f98ebb, (q31_t)0x3a7835cf, (q31_t)0x26050a3b, (q31_t)0x3a7d50da,\n    (q31_t)0x261086bc, (q31_t)0x3a8269a3, (q31_t)0x261c043d, (q31_t)0x3a87802a,\n    (q31_t)0x262782be, (q31_t)0x3a8c9470, (q31_t)0x2633023e, (q31_t)0x3a91a674,\n    (q31_t)0x263e82bc, (q31_t)0x3a96b636, (q31_t)0x264a0438, (q31_t)0x3a9bc3b6,\n    (q31_t)0x265586b3, (q31_t)0x3aa0cef3, (q31_t)0x26610a2a, (q31_t)0x3aa5d7ee,\n    (q31_t)0x266c8e9f, (q31_t)0x3aaadea6, (q31_t)0x26781410, (q31_t)0x3aafe31b,\n    (q31_t)0x26839a7c, (q31_t)0x3ab4e54c, (q31_t)0x268f21e5, (q31_t)0x3ab9e53a,\n    (q31_t)0x269aaa48, (q31_t)0x3abee2e5, (q31_t)0x26a633a6, (q31_t)0x3ac3de4c,\n    (q31_t)0x26b1bdff, (q31_t)0x3ac8d76f, (q31_t)0x26bd4951, (q31_t)0x3acdce4d,\n    (q31_t)0x26c8d59c, (q31_t)0x3ad2c2e8, (q31_t)0x26d462e1, (q31_t)0x3ad7b53d,\n    (q31_t)0x26dff11d, (q31_t)0x3adca54e, (q31_t)0x26eb8052, (q31_t)0x3ae1931a,\n    (q31_t)0x26f7107e, (q31_t)0x3ae67ea1, (q31_t)0x2702a1a1, (q31_t)0x3aeb67e3,\n    (q31_t)0x270e33bb, (q31_t)0x3af04edf, (q31_t)0x2719c6cb, (q31_t)0x3af53395,\n    (q31_t)0x27255ad1, (q31_t)0x3afa1605, (q31_t)0x2730efcc, (q31_t)0x3afef630,\n    (q31_t)0x273c85bc, (q31_t)0x3b03d414, (q31_t)0x27481ca1, (q31_t)0x3b08afb2,\n    (q31_t)0x2753b479, (q31_t)0x3b0d8909, (q31_t)0x275f4d45, (q31_t)0x3b126019,\n    (q31_t)0x276ae704, (q31_t)0x3b1734e2, (q31_t)0x277681b6, (q31_t)0x3b1c0764,\n    (q31_t)0x27821d59, (q31_t)0x3b20d79e, (q31_t)0x278db9ef, (q31_t)0x3b25a591,\n    (q31_t)0x27995776, (q31_t)0x3b2a713d, (q31_t)0x27a4f5ed, (q31_t)0x3b2f3aa0,\n    (q31_t)0x27b09555, (q31_t)0x3b3401bb, (q31_t)0x27bc35ad, (q31_t)0x3b38c68e,\n    (q31_t)0x27c7d6f4, (q31_t)0x3b3d8918, (q31_t)0x27d3792b, (q31_t)0x3b42495a,\n    (q31_t)0x27df1c50, (q31_t)0x3b470753, (q31_t)0x27eac063, (q31_t)0x3b4bc303,\n    (q31_t)0x27f66564, (q31_t)0x3b507c69, (q31_t)0x28020b52, (q31_t)0x3b553386,\n    (q31_t)0x280db22d, (q31_t)0x3b59e85a, (q31_t)0x281959f4, (q31_t)0x3b5e9ae4,\n    (q31_t)0x282502a7, (q31_t)0x3b634b23, (q31_t)0x2830ac45, (q31_t)0x3b67f919,\n    (q31_t)0x283c56cf, (q31_t)0x3b6ca4c4, (q31_t)0x28480243, (q31_t)0x3b714e25,\n    (q31_t)0x2853aea1, (q31_t)0x3b75f53c, (q31_t)0x285f5be9, (q31_t)0x3b7a9a07,\n    (q31_t)0x286b0a1a, (q31_t)0x3b7f3c87, (q31_t)0x2876b934, (q31_t)0x3b83dcbc,\n    (q31_t)0x28826936, (q31_t)0x3b887aa6, (q31_t)0x288e1a20, (q31_t)0x3b8d1644,\n    (q31_t)0x2899cbf1, (q31_t)0x3b91af97, (q31_t)0x28a57ea9, (q31_t)0x3b96469d,\n    (q31_t)0x28b13248, (q31_t)0x3b9adb57, (q31_t)0x28bce6cd, (q31_t)0x3b9f6dc5,\n    (q31_t)0x28c89c37, (q31_t)0x3ba3fde7, (q31_t)0x28d45286, (q31_t)0x3ba88bbc,\n    (q31_t)0x28e009ba, (q31_t)0x3bad1744, (q31_t)0x28ebc1d3, (q31_t)0x3bb1a080,\n    (q31_t)0x28f77acf, (q31_t)0x3bb6276e, (q31_t)0x290334af, (q31_t)0x3bbaac0e,\n    (q31_t)0x290eef71, (q31_t)0x3bbf2e62, (q31_t)0x291aab16, (q31_t)0x3bc3ae67,\n    (q31_t)0x2926679c, (q31_t)0x3bc82c1f, (q31_t)0x29322505, (q31_t)0x3bcca789,\n    (q31_t)0x293de34e, (q31_t)0x3bd120a4, (q31_t)0x2949a278, (q31_t)0x3bd59771,\n    (q31_t)0x29556282, (q31_t)0x3bda0bf0, (q31_t)0x2961236c, (q31_t)0x3bde7e20,\n    (q31_t)0x296ce535, (q31_t)0x3be2ee01, (q31_t)0x2978a7dd, (q31_t)0x3be75b93,\n    (q31_t)0x29846b63, (q31_t)0x3bebc6d5, (q31_t)0x29902fc7, (q31_t)0x3bf02fc9,\n    (q31_t)0x299bf509, (q31_t)0x3bf4966c, (q31_t)0x29a7bb28, (q31_t)0x3bf8fac0,\n    (q31_t)0x29b38223, (q31_t)0x3bfd5cc4, (q31_t)0x29bf49fa, (q31_t)0x3c01bc78,\n    (q31_t)0x29cb12ad, (q31_t)0x3c0619dc, (q31_t)0x29d6dc3b, (q31_t)0x3c0a74f0,\n    (q31_t)0x29e2a6a3, (q31_t)0x3c0ecdb2, (q31_t)0x29ee71e6, (q31_t)0x3c132424,\n    (q31_t)0x29fa3e03, (q31_t)0x3c177845, (q31_t)0x2a060af9, (q31_t)0x3c1bca16,\n    (q31_t)0x2a11d8c8, (q31_t)0x3c201994, (q31_t)0x2a1da770, (q31_t)0x3c2466c2,\n    (q31_t)0x2a2976ef, (q31_t)0x3c28b19e, (q31_t)0x2a354746, (q31_t)0x3c2cfa28,\n    (q31_t)0x2a411874, (q31_t)0x3c314060, (q31_t)0x2a4cea79, (q31_t)0x3c358446,\n    (q31_t)0x2a58bd54, (q31_t)0x3c39c5da, (q31_t)0x2a649105, (q31_t)0x3c3e051b,\n    (q31_t)0x2a70658a, (q31_t)0x3c42420a, (q31_t)0x2a7c3ae5, (q31_t)0x3c467ca6,\n    (q31_t)0x2a881114, (q31_t)0x3c4ab4ef, (q31_t)0x2a93e817, (q31_t)0x3c4eeae5,\n    (q31_t)0x2a9fbfed, (q31_t)0x3c531e88, (q31_t)0x2aab9896, (q31_t)0x3c574fd8,\n    (q31_t)0x2ab77212, (q31_t)0x3c5b7ed4, (q31_t)0x2ac34c60, (q31_t)0x3c5fab7c,\n    (q31_t)0x2acf277f, (q31_t)0x3c63d5d1, (q31_t)0x2adb0370, (q31_t)0x3c67fdd1,\n    (q31_t)0x2ae6e031, (q31_t)0x3c6c237e, (q31_t)0x2af2bdc3, (q31_t)0x3c7046d6,\n    (q31_t)0x2afe9c24, (q31_t)0x3c7467d9, (q31_t)0x2b0a7b54, (q31_t)0x3c788688,\n    (q31_t)0x2b165b54, (q31_t)0x3c7ca2e2, (q31_t)0x2b223c22, (q31_t)0x3c80bce7,\n    (q31_t)0x2b2e1dbe, (q31_t)0x3c84d496, (q31_t)0x2b3a0027, (q31_t)0x3c88e9f1,\n    (q31_t)0x2b45e35d, (q31_t)0x3c8cfcf6, (q31_t)0x2b51c760, (q31_t)0x3c910da5,\n    (q31_t)0x2b5dac2f, (q31_t)0x3c951bff, (q31_t)0x2b6991ca, (q31_t)0x3c992803,\n    (q31_t)0x2b75782f, (q31_t)0x3c9d31b0, (q31_t)0x2b815f60, (q31_t)0x3ca13908,\n    (q31_t)0x2b8d475b, (q31_t)0x3ca53e09, (q31_t)0x2b99301f, (q31_t)0x3ca940b3,\n    (q31_t)0x2ba519ad, (q31_t)0x3cad4107, (q31_t)0x2bb10404, (q31_t)0x3cb13f04,\n    (q31_t)0x2bbcef23, (q31_t)0x3cb53aaa, (q31_t)0x2bc8db0b, (q31_t)0x3cb933f9,\n    (q31_t)0x2bd4c7ba, (q31_t)0x3cbd2af0, (q31_t)0x2be0b52f, (q31_t)0x3cc11f90,\n    (q31_t)0x2beca36c, (q31_t)0x3cc511d9, (q31_t)0x2bf8926f, (q31_t)0x3cc901c9,\n    (q31_t)0x2c048237, (q31_t)0x3cccef62, (q31_t)0x2c1072c4, (q31_t)0x3cd0daa2,\n    (q31_t)0x2c1c6417, (q31_t)0x3cd4c38b, (q31_t)0x2c28562d, (q31_t)0x3cd8aa1b,\n    (q31_t)0x2c344908, (q31_t)0x3cdc8e52, (q31_t)0x2c403ca5, (q31_t)0x3ce07031,\n    (q31_t)0x2c4c3106, (q31_t)0x3ce44fb7, (q31_t)0x2c582629, (q31_t)0x3ce82ce4,\n    (q31_t)0x2c641c0e, (q31_t)0x3cec07b8, (q31_t)0x2c7012b5, (q31_t)0x3cefe032,\n    (q31_t)0x2c7c0a1d, (q31_t)0x3cf3b653, (q31_t)0x2c880245, (q31_t)0x3cf78a1b,\n    (q31_t)0x2c93fb2e, (q31_t)0x3cfb5b89, (q31_t)0x2c9ff4d6, (q31_t)0x3cff2a9d,\n    (q31_t)0x2cabef3d, (q31_t)0x3d02f757, (q31_t)0x2cb7ea63, (q31_t)0x3d06c1b6,\n    (q31_t)0x2cc3e648, (q31_t)0x3d0a89bc, (q31_t)0x2ccfe2ea, (q31_t)0x3d0e4f67,\n    (q31_t)0x2cdbe04a, (q31_t)0x3d1212b7, (q31_t)0x2ce7de66, (q31_t)0x3d15d3ad,\n    (q31_t)0x2cf3dd3f, (q31_t)0x3d199248, (q31_t)0x2cffdcd4, (q31_t)0x3d1d4e88,\n    (q31_t)0x2d0bdd25, (q31_t)0x3d21086c, (q31_t)0x2d17de31, (q31_t)0x3d24bff6,\n    (q31_t)0x2d23dff7, (q31_t)0x3d287523, (q31_t)0x2d2fe277, (q31_t)0x3d2c27f6,\n    (q31_t)0x2d3be5b1, (q31_t)0x3d2fd86c, (q31_t)0x2d47e9a5, (q31_t)0x3d338687,\n    (q31_t)0x2d53ee51, (q31_t)0x3d373245, (q31_t)0x2d5ff3b5, (q31_t)0x3d3adba7,\n    (q31_t)0x2d6bf9d1, (q31_t)0x3d3e82ae, (q31_t)0x2d7800a5, (q31_t)0x3d422757,\n    (q31_t)0x2d84082f, (q31_t)0x3d45c9a4, (q31_t)0x2d901070, (q31_t)0x3d496994,\n    (q31_t)0x2d9c1967, (q31_t)0x3d4d0728, (q31_t)0x2da82313, (q31_t)0x3d50a25e,\n    (q31_t)0x2db42d74, (q31_t)0x3d543b37, (q31_t)0x2dc0388a, (q31_t)0x3d57d1b3,\n    (q31_t)0x2dcc4454, (q31_t)0x3d5b65d2, (q31_t)0x2dd850d2, (q31_t)0x3d5ef793,\n    (q31_t)0x2de45e03, (q31_t)0x3d6286f6, (q31_t)0x2df06be6, (q31_t)0x3d6613fb,\n    (q31_t)0x2dfc7a7c, (q31_t)0x3d699ea3, (q31_t)0x2e0889c4, (q31_t)0x3d6d26ec,\n    (q31_t)0x2e1499bd, (q31_t)0x3d70acd7, (q31_t)0x2e20aa67, (q31_t)0x3d743064,\n    (q31_t)0x2e2cbbc1, (q31_t)0x3d77b192, (q31_t)0x2e38cdcb, (q31_t)0x3d7b3061,\n    (q31_t)0x2e44e084, (q31_t)0x3d7eacd2, (q31_t)0x2e50f3ed, (q31_t)0x3d8226e4,\n    (q31_t)0x2e5d0804, (q31_t)0x3d859e96, (q31_t)0x2e691cc9, (q31_t)0x3d8913ea,\n    (q31_t)0x2e75323c, (q31_t)0x3d8c86de, (q31_t)0x2e81485c, (q31_t)0x3d8ff772,\n    (q31_t)0x2e8d5f29, (q31_t)0x3d9365a8, (q31_t)0x2e9976a1, (q31_t)0x3d96d17d,\n    (q31_t)0x2ea58ec6, (q31_t)0x3d9a3af2, (q31_t)0x2eb1a796, (q31_t)0x3d9da208,\n    (q31_t)0x2ebdc110, (q31_t)0x3da106bd, (q31_t)0x2ec9db35, (q31_t)0x3da46912,\n    (q31_t)0x2ed5f604, (q31_t)0x3da7c907, (q31_t)0x2ee2117c, (q31_t)0x3dab269b,\n    (q31_t)0x2eee2d9d, (q31_t)0x3dae81cf, (q31_t)0x2efa4a67, (q31_t)0x3db1daa2,\n    (q31_t)0x2f0667d9, (q31_t)0x3db53113, (q31_t)0x2f1285f2, (q31_t)0x3db88524,\n    (q31_t)0x2f1ea4b2, (q31_t)0x3dbbd6d4, (q31_t)0x2f2ac419, (q31_t)0x3dbf2622,\n    (q31_t)0x2f36e426, (q31_t)0x3dc2730f, (q31_t)0x2f4304d8, (q31_t)0x3dc5bd9b,\n    (q31_t)0x2f4f2630, (q31_t)0x3dc905c5, (q31_t)0x2f5b482d, (q31_t)0x3dcc4b8d,\n    (q31_t)0x2f676ace, (q31_t)0x3dcf8ef3, (q31_t)0x2f738e12, (q31_t)0x3dd2cff7,\n    (q31_t)0x2f7fb1fa, (q31_t)0x3dd60e99, (q31_t)0x2f8bd685, (q31_t)0x3dd94ad8,\n    (q31_t)0x2f97fbb2, (q31_t)0x3ddc84b5, (q31_t)0x2fa42181, (q31_t)0x3ddfbc30,\n    (q31_t)0x2fb047f2, (q31_t)0x3de2f148, (q31_t)0x2fbc6f03, (q31_t)0x3de623fd,\n    (q31_t)0x2fc896b5, (q31_t)0x3de9544f, (q31_t)0x2fd4bf08, (q31_t)0x3dec823e,\n    (q31_t)0x2fe0e7f9, (q31_t)0x3defadca, (q31_t)0x2fed118a, (q31_t)0x3df2d6f3,\n    (q31_t)0x2ff93bba, (q31_t)0x3df5fdb8, (q31_t)0x30056687, (q31_t)0x3df9221a,\n    (q31_t)0x301191f3, (q31_t)0x3dfc4418, (q31_t)0x301dbdfb, (q31_t)0x3dff63b2,\n    (q31_t)0x3029eaa1, (q31_t)0x3e0280e9, (q31_t)0x303617e2, (q31_t)0x3e059bbb,\n    (q31_t)0x304245c0, (q31_t)0x3e08b42a, (q31_t)0x304e7438, (q31_t)0x3e0bca34,\n    (q31_t)0x305aa34c, (q31_t)0x3e0eddd9, (q31_t)0x3066d2fa, (q31_t)0x3e11ef1b,\n    (q31_t)0x30730342, (q31_t)0x3e14fdf7, (q31_t)0x307f3424, (q31_t)0x3e180a6f,\n    (q31_t)0x308b659f, (q31_t)0x3e1b1482, (q31_t)0x309797b2, (q31_t)0x3e1e1c30,\n    (q31_t)0x30a3ca5d, (q31_t)0x3e212179, (q31_t)0x30affda0, (q31_t)0x3e24245d,\n    (q31_t)0x30bc317a, (q31_t)0x3e2724db, (q31_t)0x30c865ea, (q31_t)0x3e2a22f4,\n    (q31_t)0x30d49af1, (q31_t)0x3e2d1ea8, (q31_t)0x30e0d08d, (q31_t)0x3e3017f6,\n    (q31_t)0x30ed06bf, (q31_t)0x3e330ede, (q31_t)0x30f93d86, (q31_t)0x3e360360,\n    (q31_t)0x310574e0, (q31_t)0x3e38f57c, (q31_t)0x3111accf, (q31_t)0x3e3be532,\n    (q31_t)0x311de551, (q31_t)0x3e3ed282, (q31_t)0x312a1e66, (q31_t)0x3e41bd6c,\n    (q31_t)0x3136580d, (q31_t)0x3e44a5ef, (q31_t)0x31429247, (q31_t)0x3e478c0b,\n    (q31_t)0x314ecd11, (q31_t)0x3e4a6fc1, (q31_t)0x315b086d, (q31_t)0x3e4d5110,\n    (q31_t)0x31674459, (q31_t)0x3e502ff9, (q31_t)0x317380d6, (q31_t)0x3e530c7a,\n    (q31_t)0x317fbde2, (q31_t)0x3e55e694, (q31_t)0x318bfb7d, (q31_t)0x3e58be47,\n    (q31_t)0x319839a6, (q31_t)0x3e5b9392, (q31_t)0x31a4785e, (q31_t)0x3e5e6676,\n    (q31_t)0x31b0b7a4, (q31_t)0x3e6136f3, (q31_t)0x31bcf777, (q31_t)0x3e640507,\n    (q31_t)0x31c937d6, (q31_t)0x3e66d0b4, (q31_t)0x31d578c2, (q31_t)0x3e6999fa,\n    (q31_t)0x31e1ba3a, (q31_t)0x3e6c60d7, (q31_t)0x31edfc3d, (q31_t)0x3e6f254c,\n    (q31_t)0x31fa3ecb, (q31_t)0x3e71e759, (q31_t)0x320681e3, (q31_t)0x3e74a6fd,\n    (q31_t)0x3212c585, (q31_t)0x3e77643a, (q31_t)0x321f09b1, (q31_t)0x3e7a1f0d,\n    (q31_t)0x322b4e66, (q31_t)0x3e7cd778, (q31_t)0x323793a3, (q31_t)0x3e7f8d7b,\n    (q31_t)0x3243d968, (q31_t)0x3e824114, (q31_t)0x32501fb5, (q31_t)0x3e84f245,\n    (q31_t)0x325c6688, (q31_t)0x3e87a10c, (q31_t)0x3268ade3, (q31_t)0x3e8a4d6a,\n    (q31_t)0x3274f5c3, (q31_t)0x3e8cf75f, (q31_t)0x32813e2a, (q31_t)0x3e8f9eeb,\n    (q31_t)0x328d8715, (q31_t)0x3e92440d, (q31_t)0x3299d085, (q31_t)0x3e94e6c6,\n    (q31_t)0x32a61a7a, (q31_t)0x3e978715, (q31_t)0x32b264f2, (q31_t)0x3e9a24fb,\n    (q31_t)0x32beafed, (q31_t)0x3e9cc076, (q31_t)0x32cafb6b, (q31_t)0x3e9f5988,\n    (q31_t)0x32d7476c, (q31_t)0x3ea1f02f, (q31_t)0x32e393ef, (q31_t)0x3ea4846c,\n    (q31_t)0x32efe0f2, (q31_t)0x3ea7163f, (q31_t)0x32fc2e77, (q31_t)0x3ea9a5a8,\n    (q31_t)0x33087c7d, (q31_t)0x3eac32a6, (q31_t)0x3314cb02, (q31_t)0x3eaebd3a,\n    (q31_t)0x33211a07, (q31_t)0x3eb14563, (q31_t)0x332d698a, (q31_t)0x3eb3cb21,\n    (q31_t)0x3339b98d, (q31_t)0x3eb64e75, (q31_t)0x33460a0d, (q31_t)0x3eb8cf5d,\n    (q31_t)0x33525b0b, (q31_t)0x3ebb4ddb, (q31_t)0x335eac86, (q31_t)0x3ebdc9ed,\n    (q31_t)0x336afe7e, (q31_t)0x3ec04394, (q31_t)0x337750f2, (q31_t)0x3ec2bad0,\n    (q31_t)0x3383a3e2, (q31_t)0x3ec52fa0, (q31_t)0x338ff74d, (q31_t)0x3ec7a205,\n    (q31_t)0x339c4b32, (q31_t)0x3eca11fe, (q31_t)0x33a89f92, (q31_t)0x3ecc7f8b,\n    (q31_t)0x33b4f46c, (q31_t)0x3eceeaad, (q31_t)0x33c149bf, (q31_t)0x3ed15363,\n    (q31_t)0x33cd9f8b, (q31_t)0x3ed3b9ad, (q31_t)0x33d9f5cf, (q31_t)0x3ed61d8a,\n    (q31_t)0x33e64c8c, (q31_t)0x3ed87efc, (q31_t)0x33f2a3bf, (q31_t)0x3edade01,\n    (q31_t)0x33fefb6a, (q31_t)0x3edd3a9a, (q31_t)0x340b538b, (q31_t)0x3edf94c7,\n    (q31_t)0x3417ac22, (q31_t)0x3ee1ec87, (q31_t)0x3424052f, (q31_t)0x3ee441da,\n    (q31_t)0x34305eb0, (q31_t)0x3ee694c1, (q31_t)0x343cb8a7, (q31_t)0x3ee8e53a,\n    (q31_t)0x34491311, (q31_t)0x3eeb3347, (q31_t)0x34556def, (q31_t)0x3eed7ee7,\n    (q31_t)0x3461c940, (q31_t)0x3eefc81a, (q31_t)0x346e2504, (q31_t)0x3ef20ee0,\n    (q31_t)0x347a8139, (q31_t)0x3ef45338, (q31_t)0x3486dde1, (q31_t)0x3ef69523,\n    (q31_t)0x34933afa, (q31_t)0x3ef8d4a1, (q31_t)0x349f9884, (q31_t)0x3efb11b1,\n    (q31_t)0x34abf67e, (q31_t)0x3efd4c54, (q31_t)0x34b854e7, (q31_t)0x3eff8489,\n    (q31_t)0x34c4b3c0, (q31_t)0x3f01ba50, (q31_t)0x34d11308, (q31_t)0x3f03eda9,\n    (q31_t)0x34dd72be, (q31_t)0x3f061e95, (q31_t)0x34e9d2e3, (q31_t)0x3f084d12,\n    (q31_t)0x34f63374, (q31_t)0x3f0a7921, (q31_t)0x35029473, (q31_t)0x3f0ca2c2,\n    (q31_t)0x350ef5de, (q31_t)0x3f0ec9f5, (q31_t)0x351b57b5, (q31_t)0x3f10eeb9,\n    (q31_t)0x3527b9f7, (q31_t)0x3f13110f, (q31_t)0x35341ca5, (q31_t)0x3f1530f7,\n    (q31_t)0x35407fbd, (q31_t)0x3f174e70, (q31_t)0x354ce33f, (q31_t)0x3f19697a,\n    (q31_t)0x3559472b, (q31_t)0x3f1b8215, (q31_t)0x3565ab80, (q31_t)0x3f1d9842,\n    (q31_t)0x3572103d, (q31_t)0x3f1fabff, (q31_t)0x357e7563, (q31_t)0x3f21bd4e,\n    (q31_t)0x358adaf0, (q31_t)0x3f23cc2e, (q31_t)0x359740e5, (q31_t)0x3f25d89e,\n    (q31_t)0x35a3a740, (q31_t)0x3f27e29f, (q31_t)0x35b00e02, (q31_t)0x3f29ea31,\n    (q31_t)0x35bc7529, (q31_t)0x3f2bef53, (q31_t)0x35c8dcb6, (q31_t)0x3f2df206,\n    (q31_t)0x35d544a7, (q31_t)0x3f2ff24a, (q31_t)0x35e1acfd, (q31_t)0x3f31f01d,\n    (q31_t)0x35ee15b7, (q31_t)0x3f33eb81, (q31_t)0x35fa7ed4, (q31_t)0x3f35e476,\n    (q31_t)0x3606e854, (q31_t)0x3f37dafa, (q31_t)0x36135237, (q31_t)0x3f39cf0e,\n    (q31_t)0x361fbc7b, (q31_t)0x3f3bc0b3, (q31_t)0x362c2721, (q31_t)0x3f3dafe7,\n    (q31_t)0x36389228, (q31_t)0x3f3f9cab, (q31_t)0x3644fd8f, (q31_t)0x3f4186ff,\n    (q31_t)0x36516956, (q31_t)0x3f436ee3, (q31_t)0x365dd57d, (q31_t)0x3f455456,\n    (q31_t)0x366a4203, (q31_t)0x3f473759, (q31_t)0x3676aee8, (q31_t)0x3f4917eb,\n    (q31_t)0x36831c2b, (q31_t)0x3f4af60d, (q31_t)0x368f89cb, (q31_t)0x3f4cd1be,\n    (q31_t)0x369bf7c9, (q31_t)0x3f4eaafe, (q31_t)0x36a86623, (q31_t)0x3f5081cd,\n    (q31_t)0x36b4d4d9, (q31_t)0x3f52562c, (q31_t)0x36c143ec, (q31_t)0x3f54281a,\n    (q31_t)0x36cdb359, (q31_t)0x3f55f796, (q31_t)0x36da2321, (q31_t)0x3f57c4a2,\n    (q31_t)0x36e69344, (q31_t)0x3f598f3c, (q31_t)0x36f303c0, (q31_t)0x3f5b5765,\n    (q31_t)0x36ff7496, (q31_t)0x3f5d1d1d, (q31_t)0x370be5c4, (q31_t)0x3f5ee063,\n    (q31_t)0x3718574b, (q31_t)0x3f60a138, (q31_t)0x3724c92a, (q31_t)0x3f625f9b,\n    (q31_t)0x37313b60, (q31_t)0x3f641b8d, (q31_t)0x373daded, (q31_t)0x3f65d50d,\n    (q31_t)0x374a20d0, (q31_t)0x3f678c1c, (q31_t)0x3756940a, (q31_t)0x3f6940b8,\n    (q31_t)0x37630799, (q31_t)0x3f6af2e3, (q31_t)0x376f7b7d, (q31_t)0x3f6ca29c,\n    (q31_t)0x377befb5, (q31_t)0x3f6e4fe3, (q31_t)0x37886442, (q31_t)0x3f6ffab8,\n    (q31_t)0x3794d922, (q31_t)0x3f71a31b, (q31_t)0x37a14e55, (q31_t)0x3f73490b,\n    (q31_t)0x37adc3db, (q31_t)0x3f74ec8a, (q31_t)0x37ba39b3, (q31_t)0x3f768d96,\n    (q31_t)0x37c6afdc, (q31_t)0x3f782c30, (q31_t)0x37d32657, (q31_t)0x3f79c857,\n    (q31_t)0x37df9d22, (q31_t)0x3f7b620c, (q31_t)0x37ec143e, (q31_t)0x3f7cf94e,\n    (q31_t)0x37f88ba9, (q31_t)0x3f7e8e1e, (q31_t)0x38050364, (q31_t)0x3f80207b,\n    (q31_t)0x38117b6d, (q31_t)0x3f81b065, (q31_t)0x381df3c5, (q31_t)0x3f833ddd,\n    (q31_t)0x382a6c6a, (q31_t)0x3f84c8e2, (q31_t)0x3836e55d, (q31_t)0x3f865174,\n    (q31_t)0x38435e9d, (q31_t)0x3f87d792, (q31_t)0x384fd829, (q31_t)0x3f895b3e,\n    (q31_t)0x385c5201, (q31_t)0x3f8adc77, (q31_t)0x3868cc24, (q31_t)0x3f8c5b3d,\n    (q31_t)0x38754692, (q31_t)0x3f8dd78f, (q31_t)0x3881c14b, (q31_t)0x3f8f516e,\n    (q31_t)0x388e3c4d, (q31_t)0x3f90c8da, (q31_t)0x389ab799, (q31_t)0x3f923dd2,\n    (q31_t)0x38a7332e, (q31_t)0x3f93b058, (q31_t)0x38b3af0c, (q31_t)0x3f952069,\n    (q31_t)0x38c02b31, (q31_t)0x3f968e07, (q31_t)0x38cca79e, (q31_t)0x3f97f932,\n    (q31_t)0x38d92452, (q31_t)0x3f9961e8, (q31_t)0x38e5a14d, (q31_t)0x3f9ac82c,\n    (q31_t)0x38f21e8e, (q31_t)0x3f9c2bfb, (q31_t)0x38fe9c15, (q31_t)0x3f9d8d56,\n    (q31_t)0x390b19e0, (q31_t)0x3f9eec3e, (q31_t)0x391797f0, (q31_t)0x3fa048b2,\n    (q31_t)0x39241645, (q31_t)0x3fa1a2b2, (q31_t)0x393094dd, (q31_t)0x3fa2fa3d,\n    (q31_t)0x393d13b8, (q31_t)0x3fa44f55, (q31_t)0x394992d7, (q31_t)0x3fa5a1f9,\n    (q31_t)0x39561237, (q31_t)0x3fa6f228, (q31_t)0x396291d9, (q31_t)0x3fa83fe3,\n    (q31_t)0x396f11bc, (q31_t)0x3fa98b2a, (q31_t)0x397b91e1, (q31_t)0x3faad3fd,\n    (q31_t)0x39881245, (q31_t)0x3fac1a5b, (q31_t)0x399492ea, (q31_t)0x3fad5e45,\n    (q31_t)0x39a113cd, (q31_t)0x3fae9fbb, (q31_t)0x39ad94f0, (q31_t)0x3fafdebb,\n    (q31_t)0x39ba1651, (q31_t)0x3fb11b48, (q31_t)0x39c697f0, (q31_t)0x3fb2555f,\n    (q31_t)0x39d319cc, (q31_t)0x3fb38d02, (q31_t)0x39df9be6, (q31_t)0x3fb4c231,\n    (q31_t)0x39ec1e3b, (q31_t)0x3fb5f4ea, (q31_t)0x39f8a0cd, (q31_t)0x3fb7252f,\n    (q31_t)0x3a05239a, (q31_t)0x3fb852ff, (q31_t)0x3a11a6a3, (q31_t)0x3fb97e5a,\n    (q31_t)0x3a1e29e5, (q31_t)0x3fbaa740, (q31_t)0x3a2aad62, (q31_t)0x3fbbcdb1,\n    (q31_t)0x3a373119, (q31_t)0x3fbcf1ad, (q31_t)0x3a43b508, (q31_t)0x3fbe1334,\n    (q31_t)0x3a503930, (q31_t)0x3fbf3246, (q31_t)0x3a5cbd91, (q31_t)0x3fc04ee3,\n    (q31_t)0x3a694229, (q31_t)0x3fc1690a, (q31_t)0x3a75c6f8, (q31_t)0x3fc280bc,\n    (q31_t)0x3a824bfd, (q31_t)0x3fc395f9, (q31_t)0x3a8ed139, (q31_t)0x3fc4a8c1,\n    (q31_t)0x3a9b56ab, (q31_t)0x3fc5b913, (q31_t)0x3aa7dc52, (q31_t)0x3fc6c6f0,\n    (q31_t)0x3ab4622d, (q31_t)0x3fc7d258, (q31_t)0x3ac0e83d, (q31_t)0x3fc8db4a,\n    (q31_t)0x3acd6e81, (q31_t)0x3fc9e1c6, (q31_t)0x3ad9f4f8, (q31_t)0x3fcae5cd,\n    (q31_t)0x3ae67ba2, (q31_t)0x3fcbe75e, (q31_t)0x3af3027e, (q31_t)0x3fcce67a,\n    (q31_t)0x3aff898c, (q31_t)0x3fcde320, (q31_t)0x3b0c10cb, (q31_t)0x3fcedd50,\n    (q31_t)0x3b18983b, (q31_t)0x3fcfd50b, (q31_t)0x3b251fdc, (q31_t)0x3fd0ca4f,\n    (q31_t)0x3b31a7ac, (q31_t)0x3fd1bd1e, (q31_t)0x3b3e2fac, (q31_t)0x3fd2ad77,\n    (q31_t)0x3b4ab7db, (q31_t)0x3fd39b5a, (q31_t)0x3b574039, (q31_t)0x3fd486c7,\n    (q31_t)0x3b63c8c4, (q31_t)0x3fd56fbe, (q31_t)0x3b70517d, (q31_t)0x3fd6563f,\n    (q31_t)0x3b7cda63, (q31_t)0x3fd73a4a, (q31_t)0x3b896375, (q31_t)0x3fd81bdf,\n    (q31_t)0x3b95ecb4, (q31_t)0x3fd8fafe, (q31_t)0x3ba2761e, (q31_t)0x3fd9d7a7,\n    (q31_t)0x3baeffb3, (q31_t)0x3fdab1d9, (q31_t)0x3bbb8973, (q31_t)0x3fdb8996,\n    (q31_t)0x3bc8135c, (q31_t)0x3fdc5edc, (q31_t)0x3bd49d70, (q31_t)0x3fdd31ac,\n    (q31_t)0x3be127ac, (q31_t)0x3fde0205, (q31_t)0x3bedb212, (q31_t)0x3fdecfe8,\n    (q31_t)0x3bfa3c9f, (q31_t)0x3fdf9b55, (q31_t)0x3c06c754, (q31_t)0x3fe0644b,\n    (q31_t)0x3c135231, (q31_t)0x3fe12acb, (q31_t)0x3c1fdd34, (q31_t)0x3fe1eed5,\n    (q31_t)0x3c2c685d, (q31_t)0x3fe2b067, (q31_t)0x3c38f3ac, (q31_t)0x3fe36f84,\n    (q31_t)0x3c457f21, (q31_t)0x3fe42c2a, (q31_t)0x3c520aba, (q31_t)0x3fe4e659,\n    (q31_t)0x3c5e9678, (q31_t)0x3fe59e12, (q31_t)0x3c6b2259, (q31_t)0x3fe65354,\n    (q31_t)0x3c77ae5e, (q31_t)0x3fe7061f, (q31_t)0x3c843a85, (q31_t)0x3fe7b674,\n    (q31_t)0x3c90c6cf, (q31_t)0x3fe86452, (q31_t)0x3c9d533b, (q31_t)0x3fe90fb9,\n    (q31_t)0x3ca9dfc8, (q31_t)0x3fe9b8a9, (q31_t)0x3cb66c77, (q31_t)0x3fea5f23,\n    (q31_t)0x3cc2f945, (q31_t)0x3feb0326, (q31_t)0x3ccf8634, (q31_t)0x3feba4b2,\n    (q31_t)0x3cdc1342, (q31_t)0x3fec43c7, (q31_t)0x3ce8a06f, (q31_t)0x3fece065,\n    (q31_t)0x3cf52dbb, (q31_t)0x3fed7a8c, (q31_t)0x3d01bb24, (q31_t)0x3fee123d,\n    (q31_t)0x3d0e48ab, (q31_t)0x3feea776, (q31_t)0x3d1ad650, (q31_t)0x3fef3a39,\n    (q31_t)0x3d276410, (q31_t)0x3fefca84, (q31_t)0x3d33f1ed, (q31_t)0x3ff05858,\n    (q31_t)0x3d407fe6, (q31_t)0x3ff0e3b6, (q31_t)0x3d4d0df9, (q31_t)0x3ff16c9c,\n    (q31_t)0x3d599c28, (q31_t)0x3ff1f30b, (q31_t)0x3d662a70, (q31_t)0x3ff27703,\n    (q31_t)0x3d72b8d2, (q31_t)0x3ff2f884, (q31_t)0x3d7f474d, (q31_t)0x3ff3778e,\n    (q31_t)0x3d8bd5e1, (q31_t)0x3ff3f420, (q31_t)0x3d98648d, (q31_t)0x3ff46e3c,\n    (q31_t)0x3da4f351, (q31_t)0x3ff4e5e0, (q31_t)0x3db1822c, (q31_t)0x3ff55b0d,\n    (q31_t)0x3dbe111e, (q31_t)0x3ff5cdc3, (q31_t)0x3dcaa027, (q31_t)0x3ff63e01,\n    (q31_t)0x3dd72f45, (q31_t)0x3ff6abc8, (q31_t)0x3de3be78, (q31_t)0x3ff71718,\n    (q31_t)0x3df04dc0, (q31_t)0x3ff77ff1, (q31_t)0x3dfcdd1d, (q31_t)0x3ff7e652,\n    (q31_t)0x3e096c8d, (q31_t)0x3ff84a3c, (q31_t)0x3e15fc11, (q31_t)0x3ff8abae,\n    (q31_t)0x3e228ba7, (q31_t)0x3ff90aaa, (q31_t)0x3e2f1b50, (q31_t)0x3ff9672d,\n    (q31_t)0x3e3bab0b, (q31_t)0x3ff9c13a, (q31_t)0x3e483ad8, (q31_t)0x3ffa18cf,\n    (q31_t)0x3e54cab5, (q31_t)0x3ffa6dec, (q31_t)0x3e615aa3, (q31_t)0x3ffac092,\n    (q31_t)0x3e6deaa1, (q31_t)0x3ffb10c1, (q31_t)0x3e7a7aae, (q31_t)0x3ffb5e78,\n    (q31_t)0x3e870aca, (q31_t)0x3ffba9b8, (q31_t)0x3e939af5, (q31_t)0x3ffbf280,\n    (q31_t)0x3ea02b2e, (q31_t)0x3ffc38d1, (q31_t)0x3eacbb74, (q31_t)0x3ffc7caa,\n    (q31_t)0x3eb94bc8, (q31_t)0x3ffcbe0c, (q31_t)0x3ec5dc28, (q31_t)0x3ffcfcf6,\n    (q31_t)0x3ed26c94, (q31_t)0x3ffd3969, (q31_t)0x3edefd0c, (q31_t)0x3ffd7364,\n    (q31_t)0x3eeb8d8f, (q31_t)0x3ffdaae7, (q31_t)0x3ef81e1d, (q31_t)0x3ffddff3,\n    (q31_t)0x3f04aeb5, (q31_t)0x3ffe1288, (q31_t)0x3f113f56, (q31_t)0x3ffe42a4,\n    (q31_t)0x3f1dd001, (q31_t)0x3ffe704a, (q31_t)0x3f2a60b4, (q31_t)0x3ffe9b77,\n    (q31_t)0x3f36f170, (q31_t)0x3ffec42d, (q31_t)0x3f438234, (q31_t)0x3ffeea6c,\n    (q31_t)0x3f5012fe, (q31_t)0x3fff0e32, (q31_t)0x3f5ca3d0, (q31_t)0x3fff2f82,\n    (q31_t)0x3f6934a8, (q31_t)0x3fff4e59, (q31_t)0x3f75c585, (q31_t)0x3fff6ab9,\n    (q31_t)0x3f825668, (q31_t)0x3fff84a1, (q31_t)0x3f8ee750, (q31_t)0x3fff9c12,\n    (q31_t)0x3f9b783c, (q31_t)0x3fffb10b, (q31_t)0x3fa8092c, (q31_t)0x3fffc38c,\n    (q31_t)0x3fb49a1f, (q31_t)0x3fffd396, (q31_t)0x3fc12b16, (q31_t)0x3fffe128,\n    (q31_t)0x3fcdbc0f, (q31_t)0x3fffec43, (q31_t)0x3fda4d09, (q31_t)0x3ffff4e6,\n    (q31_t)0x3fe6de05, (q31_t)0x3ffffb11, (q31_t)0x3ff36f02, (q31_t)0x3ffffec4,\n};\n\n/**\n  @par\n  Generation of realCoefBQ31 array:\n  @par\n   n = 4096\n  
for (i = 0; i < n; i++)\n  {\n     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double)\n  i)); pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) *\n  (double) i)); } 
\n  @par\n  Convert to fixed point Q31 format\n      round(pBTable[i] * pow(2, 31))\n */\n\nconst q31_t realCoefBQ31[8192] = {\n    (q31_t)0x40000000, (q31_t)0x40000000, (q31_t)0x400c90fe, (q31_t)0x3ffffec4,\n    (q31_t)0x401921fb, (q31_t)0x3ffffb11, (q31_t)0x4025b2f7, (q31_t)0x3ffff4e6,\n    (q31_t)0x403243f1, (q31_t)0x3fffec43, (q31_t)0x403ed4ea, (q31_t)0x3fffe128,\n    (q31_t)0x404b65e1, (q31_t)0x3fffd396, (q31_t)0x4057f6d4, (q31_t)0x3fffc38c,\n    (q31_t)0x406487c4, (q31_t)0x3fffb10b, (q31_t)0x407118b0, (q31_t)0x3fff9c12,\n    (q31_t)0x407da998, (q31_t)0x3fff84a1, (q31_t)0x408a3a7b, (q31_t)0x3fff6ab9,\n    (q31_t)0x4096cb58, (q31_t)0x3fff4e59, (q31_t)0x40a35c30, (q31_t)0x3fff2f82,\n    (q31_t)0x40afed02, (q31_t)0x3fff0e32, (q31_t)0x40bc7dcc, (q31_t)0x3ffeea6c,\n    (q31_t)0x40c90e90, (q31_t)0x3ffec42d, (q31_t)0x40d59f4c, (q31_t)0x3ffe9b77,\n    (q31_t)0x40e22fff, (q31_t)0x3ffe704a, (q31_t)0x40eec0aa, (q31_t)0x3ffe42a4,\n    (q31_t)0x40fb514b, (q31_t)0x3ffe1288, (q31_t)0x4107e1e3, (q31_t)0x3ffddff3,\n    (q31_t)0x41147271, (q31_t)0x3ffdaae7, (q31_t)0x412102f4, (q31_t)0x3ffd7364,\n    (q31_t)0x412d936c, (q31_t)0x3ffd3969, (q31_t)0x413a23d8, (q31_t)0x3ffcfcf6,\n    (q31_t)0x4146b438, (q31_t)0x3ffcbe0c, (q31_t)0x4153448c, (q31_t)0x3ffc7caa,\n    (q31_t)0x415fd4d2, (q31_t)0x3ffc38d1, (q31_t)0x416c650b, (q31_t)0x3ffbf280,\n    (q31_t)0x4178f536, (q31_t)0x3ffba9b8, (q31_t)0x41858552, (q31_t)0x3ffb5e78,\n    (q31_t)0x4192155f, (q31_t)0x3ffb10c1, (q31_t)0x419ea55d, (q31_t)0x3ffac092,\n    (q31_t)0x41ab354b, (q31_t)0x3ffa6dec, (q31_t)0x41b7c528, (q31_t)0x3ffa18cf,\n    (q31_t)0x41c454f5, (q31_t)0x3ff9c13a, (q31_t)0x41d0e4b0, (q31_t)0x3ff9672d,\n    (q31_t)0x41dd7459, (q31_t)0x3ff90aaa, (q31_t)0x41ea03ef, (q31_t)0x3ff8abae,\n    (q31_t)0x41f69373, (q31_t)0x3ff84a3c, (q31_t)0x420322e3, (q31_t)0x3ff7e652,\n    (q31_t)0x420fb240, (q31_t)0x3ff77ff1, (q31_t)0x421c4188, (q31_t)0x3ff71718,\n    (q31_t)0x4228d0bb, (q31_t)0x3ff6abc8, (q31_t)0x42355fd9, (q31_t)0x3ff63e01,\n    (q31_t)0x4241eee2, (q31_t)0x3ff5cdc3, (q31_t)0x424e7dd4, (q31_t)0x3ff55b0d,\n    (q31_t)0x425b0caf, (q31_t)0x3ff4e5e0, (q31_t)0x42679b73, (q31_t)0x3ff46e3c,\n    (q31_t)0x42742a1f, (q31_t)0x3ff3f420, (q31_t)0x4280b8b3, (q31_t)0x3ff3778e,\n    (q31_t)0x428d472e, (q31_t)0x3ff2f884, (q31_t)0x4299d590, (q31_t)0x3ff27703,\n    (q31_t)0x42a663d8, (q31_t)0x3ff1f30b, (q31_t)0x42b2f207, (q31_t)0x3ff16c9c,\n    (q31_t)0x42bf801a, (q31_t)0x3ff0e3b6, (q31_t)0x42cc0e13, (q31_t)0x3ff05858,\n    (q31_t)0x42d89bf0, (q31_t)0x3fefca84, (q31_t)0x42e529b0, (q31_t)0x3fef3a39,\n    (q31_t)0x42f1b755, (q31_t)0x3feea776, (q31_t)0x42fe44dc, (q31_t)0x3fee123d,\n    (q31_t)0x430ad245, (q31_t)0x3fed7a8c, (q31_t)0x43175f91, (q31_t)0x3fece065,\n    (q31_t)0x4323ecbe, (q31_t)0x3fec43c7, (q31_t)0x433079cc, (q31_t)0x3feba4b2,\n    (q31_t)0x433d06bb, (q31_t)0x3feb0326, (q31_t)0x43499389, (q31_t)0x3fea5f23,\n    (q31_t)0x43562038, (q31_t)0x3fe9b8a9, (q31_t)0x4362acc5, (q31_t)0x3fe90fb9,\n    (q31_t)0x436f3931, (q31_t)0x3fe86452, (q31_t)0x437bc57b, (q31_t)0x3fe7b674,\n    (q31_t)0x438851a2, (q31_t)0x3fe7061f, (q31_t)0x4394dda7, (q31_t)0x3fe65354,\n    (q31_t)0x43a16988, (q31_t)0x3fe59e12, (q31_t)0x43adf546, (q31_t)0x3fe4e659,\n    (q31_t)0x43ba80df, (q31_t)0x3fe42c2a, (q31_t)0x43c70c54, (q31_t)0x3fe36f84,\n    (q31_t)0x43d397a3, (q31_t)0x3fe2b067, (q31_t)0x43e022cc, (q31_t)0x3fe1eed5,\n    (q31_t)0x43ecadcf, (q31_t)0x3fe12acb, (q31_t)0x43f938ac, (q31_t)0x3fe0644b,\n    (q31_t)0x4405c361, (q31_t)0x3fdf9b55, (q31_t)0x44124dee, (q31_t)0x3fdecfe8,\n    (q31_t)0x441ed854, (q31_t)0x3fde0205, (q31_t)0x442b6290, (q31_t)0x3fdd31ac,\n    (q31_t)0x4437eca4, (q31_t)0x3fdc5edc, (q31_t)0x4444768d, (q31_t)0x3fdb8996,\n    (q31_t)0x4451004d, (q31_t)0x3fdab1d9, (q31_t)0x445d89e2, (q31_t)0x3fd9d7a7,\n    (q31_t)0x446a134c, (q31_t)0x3fd8fafe, (q31_t)0x44769c8b, (q31_t)0x3fd81bdf,\n    (q31_t)0x4483259d, (q31_t)0x3fd73a4a, (q31_t)0x448fae83, (q31_t)0x3fd6563f,\n    (q31_t)0x449c373c, (q31_t)0x3fd56fbe, (q31_t)0x44a8bfc7, (q31_t)0x3fd486c7,\n    (q31_t)0x44b54825, (q31_t)0x3fd39b5a, (q31_t)0x44c1d054, (q31_t)0x3fd2ad77,\n    (q31_t)0x44ce5854, (q31_t)0x3fd1bd1e, (q31_t)0x44dae024, (q31_t)0x3fd0ca4f,\n    (q31_t)0x44e767c5, (q31_t)0x3fcfd50b, (q31_t)0x44f3ef35, (q31_t)0x3fcedd50,\n    (q31_t)0x45007674, (q31_t)0x3fcde320, (q31_t)0x450cfd82, (q31_t)0x3fcce67a,\n    (q31_t)0x4519845e, (q31_t)0x3fcbe75e, (q31_t)0x45260b08, (q31_t)0x3fcae5cd,\n    (q31_t)0x4532917f, (q31_t)0x3fc9e1c6, (q31_t)0x453f17c3, (q31_t)0x3fc8db4a,\n    (q31_t)0x454b9dd3, (q31_t)0x3fc7d258, (q31_t)0x455823ae, (q31_t)0x3fc6c6f0,\n    (q31_t)0x4564a955, (q31_t)0x3fc5b913, (q31_t)0x45712ec7, (q31_t)0x3fc4a8c1,\n    (q31_t)0x457db403, (q31_t)0x3fc395f9, (q31_t)0x458a3908, (q31_t)0x3fc280bc,\n    (q31_t)0x4596bdd7, (q31_t)0x3fc1690a, (q31_t)0x45a3426f, (q31_t)0x3fc04ee3,\n    (q31_t)0x45afc6d0, (q31_t)0x3fbf3246, (q31_t)0x45bc4af8, (q31_t)0x3fbe1334,\n    (q31_t)0x45c8cee7, (q31_t)0x3fbcf1ad, (q31_t)0x45d5529e, (q31_t)0x3fbbcdb1,\n    (q31_t)0x45e1d61b, (q31_t)0x3fbaa740, (q31_t)0x45ee595d, (q31_t)0x3fb97e5a,\n    (q31_t)0x45fadc66, (q31_t)0x3fb852ff, (q31_t)0x46075f33, (q31_t)0x3fb7252f,\n    (q31_t)0x4613e1c5, (q31_t)0x3fb5f4ea, (q31_t)0x4620641a, (q31_t)0x3fb4c231,\n    (q31_t)0x462ce634, (q31_t)0x3fb38d02, (q31_t)0x46396810, (q31_t)0x3fb2555f,\n    (q31_t)0x4645e9af, (q31_t)0x3fb11b48, (q31_t)0x46526b10, (q31_t)0x3fafdebb,\n    (q31_t)0x465eec33, (q31_t)0x3fae9fbb, (q31_t)0x466b6d16, (q31_t)0x3fad5e45,\n    (q31_t)0x4677edbb, (q31_t)0x3fac1a5b, (q31_t)0x46846e1f, (q31_t)0x3faad3fd,\n    (q31_t)0x4690ee44, (q31_t)0x3fa98b2a, (q31_t)0x469d6e27, (q31_t)0x3fa83fe3,\n    (q31_t)0x46a9edc9, (q31_t)0x3fa6f228, (q31_t)0x46b66d29, (q31_t)0x3fa5a1f9,\n    (q31_t)0x46c2ec48, (q31_t)0x3fa44f55, (q31_t)0x46cf6b23, (q31_t)0x3fa2fa3d,\n    (q31_t)0x46dbe9bb, (q31_t)0x3fa1a2b2, (q31_t)0x46e86810, (q31_t)0x3fa048b2,\n    (q31_t)0x46f4e620, (q31_t)0x3f9eec3e, (q31_t)0x470163eb, (q31_t)0x3f9d8d56,\n    (q31_t)0x470de172, (q31_t)0x3f9c2bfb, (q31_t)0x471a5eb3, (q31_t)0x3f9ac82c,\n    (q31_t)0x4726dbae, (q31_t)0x3f9961e8, (q31_t)0x47335862, (q31_t)0x3f97f932,\n    (q31_t)0x473fd4cf, (q31_t)0x3f968e07, (q31_t)0x474c50f4, (q31_t)0x3f952069,\n    (q31_t)0x4758ccd2, (q31_t)0x3f93b058, (q31_t)0x47654867, (q31_t)0x3f923dd2,\n    (q31_t)0x4771c3b3, (q31_t)0x3f90c8da, (q31_t)0x477e3eb5, (q31_t)0x3f8f516e,\n    (q31_t)0x478ab96e, (q31_t)0x3f8dd78f, (q31_t)0x479733dc, (q31_t)0x3f8c5b3d,\n    (q31_t)0x47a3adff, (q31_t)0x3f8adc77, (q31_t)0x47b027d7, (q31_t)0x3f895b3e,\n    (q31_t)0x47bca163, (q31_t)0x3f87d792, (q31_t)0x47c91aa3, (q31_t)0x3f865174,\n    (q31_t)0x47d59396, (q31_t)0x3f84c8e2, (q31_t)0x47e20c3b, (q31_t)0x3f833ddd,\n    (q31_t)0x47ee8493, (q31_t)0x3f81b065, (q31_t)0x47fafc9c, (q31_t)0x3f80207b,\n    (q31_t)0x48077457, (q31_t)0x3f7e8e1e, (q31_t)0x4813ebc2, (q31_t)0x3f7cf94e,\n    (q31_t)0x482062de, (q31_t)0x3f7b620c, (q31_t)0x482cd9a9, (q31_t)0x3f79c857,\n    (q31_t)0x48395024, (q31_t)0x3f782c30, (q31_t)0x4845c64d, (q31_t)0x3f768d96,\n    (q31_t)0x48523c25, (q31_t)0x3f74ec8a, (q31_t)0x485eb1ab, (q31_t)0x3f73490b,\n    (q31_t)0x486b26de, (q31_t)0x3f71a31b, (q31_t)0x48779bbe, (q31_t)0x3f6ffab8,\n    (q31_t)0x4884104b, (q31_t)0x3f6e4fe3, (q31_t)0x48908483, (q31_t)0x3f6ca29c,\n    (q31_t)0x489cf867, (q31_t)0x3f6af2e3, (q31_t)0x48a96bf6, (q31_t)0x3f6940b8,\n    (q31_t)0x48b5df30, (q31_t)0x3f678c1c, (q31_t)0x48c25213, (q31_t)0x3f65d50d,\n    (q31_t)0x48cec4a0, (q31_t)0x3f641b8d, (q31_t)0x48db36d6, (q31_t)0x3f625f9b,\n    (q31_t)0x48e7a8b5, (q31_t)0x3f60a138, (q31_t)0x48f41a3c, (q31_t)0x3f5ee063,\n    (q31_t)0x49008b6a, (q31_t)0x3f5d1d1d, (q31_t)0x490cfc40, (q31_t)0x3f5b5765,\n    (q31_t)0x49196cbc, (q31_t)0x3f598f3c, (q31_t)0x4925dcdf, (q31_t)0x3f57c4a2,\n    (q31_t)0x49324ca7, (q31_t)0x3f55f796, (q31_t)0x493ebc14, (q31_t)0x3f54281a,\n    (q31_t)0x494b2b27, (q31_t)0x3f52562c, (q31_t)0x495799dd, (q31_t)0x3f5081cd,\n    (q31_t)0x49640837, (q31_t)0x3f4eaafe, (q31_t)0x49707635, (q31_t)0x3f4cd1be,\n    (q31_t)0x497ce3d5, (q31_t)0x3f4af60d, (q31_t)0x49895118, (q31_t)0x3f4917eb,\n    (q31_t)0x4995bdfd, (q31_t)0x3f473759, (q31_t)0x49a22a83, (q31_t)0x3f455456,\n    (q31_t)0x49ae96aa, (q31_t)0x3f436ee3, (q31_t)0x49bb0271, (q31_t)0x3f4186ff,\n    (q31_t)0x49c76dd8, (q31_t)0x3f3f9cab, (q31_t)0x49d3d8df, (q31_t)0x3f3dafe7,\n    (q31_t)0x49e04385, (q31_t)0x3f3bc0b3, (q31_t)0x49ecadc9, (q31_t)0x3f39cf0e,\n    (q31_t)0x49f917ac, (q31_t)0x3f37dafa, (q31_t)0x4a05812c, (q31_t)0x3f35e476,\n    (q31_t)0x4a11ea49, (q31_t)0x3f33eb81, (q31_t)0x4a1e5303, (q31_t)0x3f31f01d,\n    (q31_t)0x4a2abb59, (q31_t)0x3f2ff24a, (q31_t)0x4a37234a, (q31_t)0x3f2df206,\n    (q31_t)0x4a438ad7, (q31_t)0x3f2bef53, (q31_t)0x4a4ff1fe, (q31_t)0x3f29ea31,\n    (q31_t)0x4a5c58c0, (q31_t)0x3f27e29f, (q31_t)0x4a68bf1b, (q31_t)0x3f25d89e,\n    (q31_t)0x4a752510, (q31_t)0x3f23cc2e, (q31_t)0x4a818a9d, (q31_t)0x3f21bd4e,\n    (q31_t)0x4a8defc3, (q31_t)0x3f1fabff, (q31_t)0x4a9a5480, (q31_t)0x3f1d9842,\n    (q31_t)0x4aa6b8d5, (q31_t)0x3f1b8215, (q31_t)0x4ab31cc1, (q31_t)0x3f19697a,\n    (q31_t)0x4abf8043, (q31_t)0x3f174e70, (q31_t)0x4acbe35b, (q31_t)0x3f1530f7,\n    (q31_t)0x4ad84609, (q31_t)0x3f13110f, (q31_t)0x4ae4a84b, (q31_t)0x3f10eeb9,\n    (q31_t)0x4af10a22, (q31_t)0x3f0ec9f5, (q31_t)0x4afd6b8d, (q31_t)0x3f0ca2c2,\n    (q31_t)0x4b09cc8c, (q31_t)0x3f0a7921, (q31_t)0x4b162d1d, (q31_t)0x3f084d12,\n    (q31_t)0x4b228d42, (q31_t)0x3f061e95, (q31_t)0x4b2eecf8, (q31_t)0x3f03eda9,\n    (q31_t)0x4b3b4c40, (q31_t)0x3f01ba50, (q31_t)0x4b47ab19, (q31_t)0x3eff8489,\n    (q31_t)0x4b540982, (q31_t)0x3efd4c54, (q31_t)0x4b60677c, (q31_t)0x3efb11b1,\n    (q31_t)0x4b6cc506, (q31_t)0x3ef8d4a1, (q31_t)0x4b79221f, (q31_t)0x3ef69523,\n    (q31_t)0x4b857ec7, (q31_t)0x3ef45338, (q31_t)0x4b91dafc, (q31_t)0x3ef20ee0,\n    (q31_t)0x4b9e36c0, (q31_t)0x3eefc81a, (q31_t)0x4baa9211, (q31_t)0x3eed7ee7,\n    (q31_t)0x4bb6ecef, (q31_t)0x3eeb3347, (q31_t)0x4bc34759, (q31_t)0x3ee8e53a,\n    (q31_t)0x4bcfa150, (q31_t)0x3ee694c1, (q31_t)0x4bdbfad1, (q31_t)0x3ee441da,\n    (q31_t)0x4be853de, (q31_t)0x3ee1ec87, (q31_t)0x4bf4ac75, (q31_t)0x3edf94c7,\n    (q31_t)0x4c010496, (q31_t)0x3edd3a9a, (q31_t)0x4c0d5c41, (q31_t)0x3edade01,\n    (q31_t)0x4c19b374, (q31_t)0x3ed87efc, (q31_t)0x4c260a31, (q31_t)0x3ed61d8a,\n    (q31_t)0x4c326075, (q31_t)0x3ed3b9ad, (q31_t)0x4c3eb641, (q31_t)0x3ed15363,\n    (q31_t)0x4c4b0b94, (q31_t)0x3eceeaad, (q31_t)0x4c57606e, (q31_t)0x3ecc7f8b,\n    (q31_t)0x4c63b4ce, (q31_t)0x3eca11fe, (q31_t)0x4c7008b3, (q31_t)0x3ec7a205,\n    (q31_t)0x4c7c5c1e, (q31_t)0x3ec52fa0, (q31_t)0x4c88af0e, (q31_t)0x3ec2bad0,\n    (q31_t)0x4c950182, (q31_t)0x3ec04394, (q31_t)0x4ca1537a, (q31_t)0x3ebdc9ed,\n    (q31_t)0x4cada4f5, (q31_t)0x3ebb4ddb, (q31_t)0x4cb9f5f3, (q31_t)0x3eb8cf5d,\n    (q31_t)0x4cc64673, (q31_t)0x3eb64e75, (q31_t)0x4cd29676, (q31_t)0x3eb3cb21,\n    (q31_t)0x4cdee5f9, (q31_t)0x3eb14563, (q31_t)0x4ceb34fe, (q31_t)0x3eaebd3a,\n    (q31_t)0x4cf78383, (q31_t)0x3eac32a6, (q31_t)0x4d03d189, (q31_t)0x3ea9a5a8,\n    (q31_t)0x4d101f0e, (q31_t)0x3ea7163f, (q31_t)0x4d1c6c11, (q31_t)0x3ea4846c,\n    (q31_t)0x4d28b894, (q31_t)0x3ea1f02f, (q31_t)0x4d350495, (q31_t)0x3e9f5988,\n    (q31_t)0x4d415013, (q31_t)0x3e9cc076, (q31_t)0x4d4d9b0e, (q31_t)0x3e9a24fb,\n    (q31_t)0x4d59e586, (q31_t)0x3e978715, (q31_t)0x4d662f7b, (q31_t)0x3e94e6c6,\n    (q31_t)0x4d7278eb, (q31_t)0x3e92440d, (q31_t)0x4d7ec1d6, (q31_t)0x3e8f9eeb,\n    (q31_t)0x4d8b0a3d, (q31_t)0x3e8cf75f, (q31_t)0x4d97521d, (q31_t)0x3e8a4d6a,\n    (q31_t)0x4da39978, (q31_t)0x3e87a10c, (q31_t)0x4dafe04b, (q31_t)0x3e84f245,\n    (q31_t)0x4dbc2698, (q31_t)0x3e824114, (q31_t)0x4dc86c5d, (q31_t)0x3e7f8d7b,\n    (q31_t)0x4dd4b19a, (q31_t)0x3e7cd778, (q31_t)0x4de0f64f, (q31_t)0x3e7a1f0d,\n    (q31_t)0x4ded3a7b, (q31_t)0x3e77643a, (q31_t)0x4df97e1d, (q31_t)0x3e74a6fd,\n    (q31_t)0x4e05c135, (q31_t)0x3e71e759, (q31_t)0x4e1203c3, (q31_t)0x3e6f254c,\n    (q31_t)0x4e1e45c6, (q31_t)0x3e6c60d7, (q31_t)0x4e2a873e, (q31_t)0x3e6999fa,\n    (q31_t)0x4e36c82a, (q31_t)0x3e66d0b4, (q31_t)0x4e430889, (q31_t)0x3e640507,\n    (q31_t)0x4e4f485c, (q31_t)0x3e6136f3, (q31_t)0x4e5b87a2, (q31_t)0x3e5e6676,\n    (q31_t)0x4e67c65a, (q31_t)0x3e5b9392, (q31_t)0x4e740483, (q31_t)0x3e58be47,\n    (q31_t)0x4e80421e, (q31_t)0x3e55e694, (q31_t)0x4e8c7f2a, (q31_t)0x3e530c7a,\n    (q31_t)0x4e98bba7, (q31_t)0x3e502ff9, (q31_t)0x4ea4f793, (q31_t)0x3e4d5110,\n    (q31_t)0x4eb132ef, (q31_t)0x3e4a6fc1, (q31_t)0x4ebd6db9, (q31_t)0x3e478c0b,\n    (q31_t)0x4ec9a7f3, (q31_t)0x3e44a5ef, (q31_t)0x4ed5e19a, (q31_t)0x3e41bd6c,\n    (q31_t)0x4ee21aaf, (q31_t)0x3e3ed282, (q31_t)0x4eee5331, (q31_t)0x3e3be532,\n    (q31_t)0x4efa8b20, (q31_t)0x3e38f57c, (q31_t)0x4f06c27a, (q31_t)0x3e360360,\n    (q31_t)0x4f12f941, (q31_t)0x3e330ede, (q31_t)0x4f1f2f73, (q31_t)0x3e3017f6,\n    (q31_t)0x4f2b650f, (q31_t)0x3e2d1ea8, (q31_t)0x4f379a16, (q31_t)0x3e2a22f4,\n    (q31_t)0x4f43ce86, (q31_t)0x3e2724db, (q31_t)0x4f500260, (q31_t)0x3e24245d,\n    (q31_t)0x4f5c35a3, (q31_t)0x3e212179, (q31_t)0x4f68684e, (q31_t)0x3e1e1c30,\n    (q31_t)0x4f749a61, (q31_t)0x3e1b1482, (q31_t)0x4f80cbdc, (q31_t)0x3e180a6f,\n    (q31_t)0x4f8cfcbe, (q31_t)0x3e14fdf7, (q31_t)0x4f992d06, (q31_t)0x3e11ef1b,\n    (q31_t)0x4fa55cb4, (q31_t)0x3e0eddd9, (q31_t)0x4fb18bc8, (q31_t)0x3e0bca34,\n    (q31_t)0x4fbdba40, (q31_t)0x3e08b42a, (q31_t)0x4fc9e81e, (q31_t)0x3e059bbb,\n    (q31_t)0x4fd6155f, (q31_t)0x3e0280e9, (q31_t)0x4fe24205, (q31_t)0x3dff63b2,\n    (q31_t)0x4fee6e0d, (q31_t)0x3dfc4418, (q31_t)0x4ffa9979, (q31_t)0x3df9221a,\n    (q31_t)0x5006c446, (q31_t)0x3df5fdb8, (q31_t)0x5012ee76, (q31_t)0x3df2d6f3,\n    (q31_t)0x501f1807, (q31_t)0x3defadca, (q31_t)0x502b40f8, (q31_t)0x3dec823e,\n    (q31_t)0x5037694b, (q31_t)0x3de9544f, (q31_t)0x504390fd, (q31_t)0x3de623fd,\n    (q31_t)0x504fb80e, (q31_t)0x3de2f148, (q31_t)0x505bde7f, (q31_t)0x3ddfbc30,\n    (q31_t)0x5068044e, (q31_t)0x3ddc84b5, (q31_t)0x5074297b, (q31_t)0x3dd94ad8,\n    (q31_t)0x50804e06, (q31_t)0x3dd60e99, (q31_t)0x508c71ee, (q31_t)0x3dd2cff7,\n    (q31_t)0x50989532, (q31_t)0x3dcf8ef3, (q31_t)0x50a4b7d3, (q31_t)0x3dcc4b8d,\n    (q31_t)0x50b0d9d0, (q31_t)0x3dc905c5, (q31_t)0x50bcfb28, (q31_t)0x3dc5bd9b,\n    (q31_t)0x50c91bda, (q31_t)0x3dc2730f, (q31_t)0x50d53be7, (q31_t)0x3dbf2622,\n    (q31_t)0x50e15b4e, (q31_t)0x3dbbd6d4, (q31_t)0x50ed7a0e, (q31_t)0x3db88524,\n    (q31_t)0x50f99827, (q31_t)0x3db53113, (q31_t)0x5105b599, (q31_t)0x3db1daa2,\n    (q31_t)0x5111d263, (q31_t)0x3dae81cf, (q31_t)0x511dee84, (q31_t)0x3dab269b,\n    (q31_t)0x512a09fc, (q31_t)0x3da7c907, (q31_t)0x513624cb, (q31_t)0x3da46912,\n    (q31_t)0x51423ef0, (q31_t)0x3da106bd, (q31_t)0x514e586a, (q31_t)0x3d9da208,\n    (q31_t)0x515a713a, (q31_t)0x3d9a3af2, (q31_t)0x5166895f, (q31_t)0x3d96d17d,\n    (q31_t)0x5172a0d7, (q31_t)0x3d9365a8, (q31_t)0x517eb7a4, (q31_t)0x3d8ff772,\n    (q31_t)0x518acdc4, (q31_t)0x3d8c86de, (q31_t)0x5196e337, (q31_t)0x3d8913ea,\n    (q31_t)0x51a2f7fc, (q31_t)0x3d859e96, (q31_t)0x51af0c13, (q31_t)0x3d8226e4,\n    (q31_t)0x51bb1f7c, (q31_t)0x3d7eacd2, (q31_t)0x51c73235, (q31_t)0x3d7b3061,\n    (q31_t)0x51d3443f, (q31_t)0x3d77b192, (q31_t)0x51df5599, (q31_t)0x3d743064,\n    (q31_t)0x51eb6643, (q31_t)0x3d70acd7, (q31_t)0x51f7763c, (q31_t)0x3d6d26ec,\n    (q31_t)0x52038584, (q31_t)0x3d699ea3, (q31_t)0x520f941a, (q31_t)0x3d6613fb,\n    (q31_t)0x521ba1fd, (q31_t)0x3d6286f6, (q31_t)0x5227af2e, (q31_t)0x3d5ef793,\n    (q31_t)0x5233bbac, (q31_t)0x3d5b65d2, (q31_t)0x523fc776, (q31_t)0x3d57d1b3,\n    (q31_t)0x524bd28c, (q31_t)0x3d543b37, (q31_t)0x5257dced, (q31_t)0x3d50a25e,\n    (q31_t)0x5263e699, (q31_t)0x3d4d0728, (q31_t)0x526fef90, (q31_t)0x3d496994,\n    (q31_t)0x527bf7d1, (q31_t)0x3d45c9a4, (q31_t)0x5287ff5b, (q31_t)0x3d422757,\n    (q31_t)0x5294062f, (q31_t)0x3d3e82ae, (q31_t)0x52a00c4b, (q31_t)0x3d3adba7,\n    (q31_t)0x52ac11af, (q31_t)0x3d373245, (q31_t)0x52b8165b, (q31_t)0x3d338687,\n    (q31_t)0x52c41a4f, (q31_t)0x3d2fd86c, (q31_t)0x52d01d89, (q31_t)0x3d2c27f6,\n    (q31_t)0x52dc2009, (q31_t)0x3d287523, (q31_t)0x52e821cf, (q31_t)0x3d24bff6,\n    (q31_t)0x52f422db, (q31_t)0x3d21086c, (q31_t)0x5300232c, (q31_t)0x3d1d4e88,\n    (q31_t)0x530c22c1, (q31_t)0x3d199248, (q31_t)0x5318219a, (q31_t)0x3d15d3ad,\n    (q31_t)0x53241fb6, (q31_t)0x3d1212b7, (q31_t)0x53301d16, (q31_t)0x3d0e4f67,\n    (q31_t)0x533c19b8, (q31_t)0x3d0a89bc, (q31_t)0x5348159d, (q31_t)0x3d06c1b6,\n    (q31_t)0x535410c3, (q31_t)0x3d02f757, (q31_t)0x53600b2a, (q31_t)0x3cff2a9d,\n    (q31_t)0x536c04d2, (q31_t)0x3cfb5b89, (q31_t)0x5377fdbb, (q31_t)0x3cf78a1b,\n    (q31_t)0x5383f5e3, (q31_t)0x3cf3b653, (q31_t)0x538fed4b, (q31_t)0x3cefe032,\n    (q31_t)0x539be3f2, (q31_t)0x3cec07b8, (q31_t)0x53a7d9d7, (q31_t)0x3ce82ce4,\n    (q31_t)0x53b3cefa, (q31_t)0x3ce44fb7, (q31_t)0x53bfc35b, (q31_t)0x3ce07031,\n    (q31_t)0x53cbb6f8, (q31_t)0x3cdc8e52, (q31_t)0x53d7a9d3, (q31_t)0x3cd8aa1b,\n    (q31_t)0x53e39be9, (q31_t)0x3cd4c38b, (q31_t)0x53ef8d3c, (q31_t)0x3cd0daa2,\n    (q31_t)0x53fb7dc9, (q31_t)0x3cccef62, (q31_t)0x54076d91, (q31_t)0x3cc901c9,\n    (q31_t)0x54135c94, (q31_t)0x3cc511d9, (q31_t)0x541f4ad1, (q31_t)0x3cc11f90,\n    (q31_t)0x542b3846, (q31_t)0x3cbd2af0, (q31_t)0x543724f5, (q31_t)0x3cb933f9,\n    (q31_t)0x544310dd, (q31_t)0x3cb53aaa, (q31_t)0x544efbfc, (q31_t)0x3cb13f04,\n    (q31_t)0x545ae653, (q31_t)0x3cad4107, (q31_t)0x5466cfe1, (q31_t)0x3ca940b3,\n    (q31_t)0x5472b8a5, (q31_t)0x3ca53e09, (q31_t)0x547ea0a0, (q31_t)0x3ca13908,\n    (q31_t)0x548a87d1, (q31_t)0x3c9d31b0, (q31_t)0x54966e36, (q31_t)0x3c992803,\n    (q31_t)0x54a253d1, (q31_t)0x3c951bff, (q31_t)0x54ae38a0, (q31_t)0x3c910da5,\n    (q31_t)0x54ba1ca3, (q31_t)0x3c8cfcf6, (q31_t)0x54c5ffd9, (q31_t)0x3c88e9f1,\n    (q31_t)0x54d1e242, (q31_t)0x3c84d496, (q31_t)0x54ddc3de, (q31_t)0x3c80bce7,\n    (q31_t)0x54e9a4ac, (q31_t)0x3c7ca2e2, (q31_t)0x54f584ac, (q31_t)0x3c788688,\n    (q31_t)0x550163dc, (q31_t)0x3c7467d9, (q31_t)0x550d423d, (q31_t)0x3c7046d6,\n    (q31_t)0x55191fcf, (q31_t)0x3c6c237e, (q31_t)0x5524fc90, (q31_t)0x3c67fdd1,\n    (q31_t)0x5530d881, (q31_t)0x3c63d5d1, (q31_t)0x553cb3a0, (q31_t)0x3c5fab7c,\n    (q31_t)0x55488dee, (q31_t)0x3c5b7ed4, (q31_t)0x5554676a, (q31_t)0x3c574fd8,\n    (q31_t)0x55604013, (q31_t)0x3c531e88, (q31_t)0x556c17e9, (q31_t)0x3c4eeae5,\n    (q31_t)0x5577eeec, (q31_t)0x3c4ab4ef, (q31_t)0x5583c51b, (q31_t)0x3c467ca6,\n    (q31_t)0x558f9a76, (q31_t)0x3c42420a, (q31_t)0x559b6efb, (q31_t)0x3c3e051b,\n    (q31_t)0x55a742ac, (q31_t)0x3c39c5da, (q31_t)0x55b31587, (q31_t)0x3c358446,\n    (q31_t)0x55bee78c, (q31_t)0x3c314060, (q31_t)0x55cab8ba, (q31_t)0x3c2cfa28,\n    (q31_t)0x55d68911, (q31_t)0x3c28b19e, (q31_t)0x55e25890, (q31_t)0x3c2466c2,\n    (q31_t)0x55ee2738, (q31_t)0x3c201994, (q31_t)0x55f9f507, (q31_t)0x3c1bca16,\n    (q31_t)0x5605c1fd, (q31_t)0x3c177845, (q31_t)0x56118e1a, (q31_t)0x3c132424,\n    (q31_t)0x561d595d, (q31_t)0x3c0ecdb2, (q31_t)0x562923c5, (q31_t)0x3c0a74f0,\n    (q31_t)0x5634ed53, (q31_t)0x3c0619dc, (q31_t)0x5640b606, (q31_t)0x3c01bc78,\n    (q31_t)0x564c7ddd, (q31_t)0x3bfd5cc4, (q31_t)0x565844d8, (q31_t)0x3bf8fac0,\n    (q31_t)0x56640af7, (q31_t)0x3bf4966c, (q31_t)0x566fd039, (q31_t)0x3bf02fc9,\n    (q31_t)0x567b949d, (q31_t)0x3bebc6d5, (q31_t)0x56875823, (q31_t)0x3be75b93,\n    (q31_t)0x56931acb, (q31_t)0x3be2ee01, (q31_t)0x569edc94, (q31_t)0x3bde7e20,\n    (q31_t)0x56aa9d7e, (q31_t)0x3bda0bf0, (q31_t)0x56b65d88, (q31_t)0x3bd59771,\n    (q31_t)0x56c21cb2, (q31_t)0x3bd120a4, (q31_t)0x56cddafb, (q31_t)0x3bcca789,\n    (q31_t)0x56d99864, (q31_t)0x3bc82c1f, (q31_t)0x56e554ea, (q31_t)0x3bc3ae67,\n    (q31_t)0x56f1108f, (q31_t)0x3bbf2e62, (q31_t)0x56fccb51, (q31_t)0x3bbaac0e,\n    (q31_t)0x57088531, (q31_t)0x3bb6276e, (q31_t)0x57143e2d, (q31_t)0x3bb1a080,\n    (q31_t)0x571ff646, (q31_t)0x3bad1744, (q31_t)0x572bad7a, (q31_t)0x3ba88bbc,\n    (q31_t)0x573763c9, (q31_t)0x3ba3fde7, (q31_t)0x57431933, (q31_t)0x3b9f6dc5,\n    (q31_t)0x574ecdb8, (q31_t)0x3b9adb57, (q31_t)0x575a8157, (q31_t)0x3b96469d,\n    (q31_t)0x5766340f, (q31_t)0x3b91af97, (q31_t)0x5771e5e0, (q31_t)0x3b8d1644,\n    (q31_t)0x577d96ca, (q31_t)0x3b887aa6, (q31_t)0x578946cc, (q31_t)0x3b83dcbc,\n    (q31_t)0x5794f5e6, (q31_t)0x3b7f3c87, (q31_t)0x57a0a417, (q31_t)0x3b7a9a07,\n    (q31_t)0x57ac515f, (q31_t)0x3b75f53c, (q31_t)0x57b7fdbd, (q31_t)0x3b714e25,\n    (q31_t)0x57c3a931, (q31_t)0x3b6ca4c4, (q31_t)0x57cf53bb, (q31_t)0x3b67f919,\n    (q31_t)0x57dafd59, (q31_t)0x3b634b23, (q31_t)0x57e6a60c, (q31_t)0x3b5e9ae4,\n    (q31_t)0x57f24dd3, (q31_t)0x3b59e85a, (q31_t)0x57fdf4ae, (q31_t)0x3b553386,\n    (q31_t)0x58099a9c, (q31_t)0x3b507c69, (q31_t)0x58153f9d, (q31_t)0x3b4bc303,\n    (q31_t)0x5820e3b0, (q31_t)0x3b470753, (q31_t)0x582c86d5, (q31_t)0x3b42495a,\n    (q31_t)0x5838290c, (q31_t)0x3b3d8918, (q31_t)0x5843ca53, (q31_t)0x3b38c68e,\n    (q31_t)0x584f6aab, (q31_t)0x3b3401bb, (q31_t)0x585b0a13, (q31_t)0x3b2f3aa0,\n    (q31_t)0x5866a88a, (q31_t)0x3b2a713d, (q31_t)0x58724611, (q31_t)0x3b25a591,\n    (q31_t)0x587de2a7, (q31_t)0x3b20d79e, (q31_t)0x58897e4a, (q31_t)0x3b1c0764,\n    (q31_t)0x589518fc, (q31_t)0x3b1734e2, (q31_t)0x58a0b2bb, (q31_t)0x3b126019,\n    (q31_t)0x58ac4b87, (q31_t)0x3b0d8909, (q31_t)0x58b7e35f, (q31_t)0x3b08afb2,\n    (q31_t)0x58c37a44, (q31_t)0x3b03d414, (q31_t)0x58cf1034, (q31_t)0x3afef630,\n    (q31_t)0x58daa52f, (q31_t)0x3afa1605, (q31_t)0x58e63935, (q31_t)0x3af53395,\n    (q31_t)0x58f1cc45, (q31_t)0x3af04edf, (q31_t)0x58fd5e5f, (q31_t)0x3aeb67e3,\n    (q31_t)0x5908ef82, (q31_t)0x3ae67ea1, (q31_t)0x59147fae, (q31_t)0x3ae1931a,\n    (q31_t)0x59200ee3, (q31_t)0x3adca54e, (q31_t)0x592b9d1f, (q31_t)0x3ad7b53d,\n    (q31_t)0x59372a64, (q31_t)0x3ad2c2e8, (q31_t)0x5942b6af, (q31_t)0x3acdce4d,\n    (q31_t)0x594e4201, (q31_t)0x3ac8d76f, (q31_t)0x5959cc5a, (q31_t)0x3ac3de4c,\n    (q31_t)0x596555b8, (q31_t)0x3abee2e5, (q31_t)0x5970de1b, (q31_t)0x3ab9e53a,\n    (q31_t)0x597c6584, (q31_t)0x3ab4e54c, (q31_t)0x5987ebf0, (q31_t)0x3aafe31b,\n    (q31_t)0x59937161, (q31_t)0x3aaadea6, (q31_t)0x599ef5d6, (q31_t)0x3aa5d7ee,\n    (q31_t)0x59aa794d, (q31_t)0x3aa0cef3, (q31_t)0x59b5fbc8, (q31_t)0x3a9bc3b6,\n    (q31_t)0x59c17d44, (q31_t)0x3a96b636, (q31_t)0x59ccfdc2, (q31_t)0x3a91a674,\n    (q31_t)0x59d87d42, (q31_t)0x3a8c9470, (q31_t)0x59e3fbc3, (q31_t)0x3a87802a,\n    (q31_t)0x59ef7944, (q31_t)0x3a8269a3, (q31_t)0x59faf5c5, (q31_t)0x3a7d50da,\n    (q31_t)0x5a067145, (q31_t)0x3a7835cf, (q31_t)0x5a11ebc5, (q31_t)0x3a731884,\n    (q31_t)0x5a1d6544, (q31_t)0x3a6df8f8, (q31_t)0x5a28ddc0, (q31_t)0x3a68d72b,\n    (q31_t)0x5a34553b, (q31_t)0x3a63b31d, (q31_t)0x5a3fcbb3, (q31_t)0x3a5e8cd0,\n    (q31_t)0x5a4b4128, (q31_t)0x3a596442, (q31_t)0x5a56b599, (q31_t)0x3a543974,\n    (q31_t)0x5a622907, (q31_t)0x3a4f0c67, (q31_t)0x5a6d9b70, (q31_t)0x3a49dd1a,\n    (q31_t)0x5a790cd4, (q31_t)0x3a44ab8e, (q31_t)0x5a847d33, (q31_t)0x3a3f77c3,\n    (q31_t)0x5a8fec8c, (q31_t)0x3a3a41b9, (q31_t)0x5a9b5adf, (q31_t)0x3a350970,\n    (q31_t)0x5aa6c82b, (q31_t)0x3a2fcee8, (q31_t)0x5ab23471, (q31_t)0x3a2a9223,\n    (q31_t)0x5abd9faf, (q31_t)0x3a25531f, (q31_t)0x5ac909e5, (q31_t)0x3a2011de,\n    (q31_t)0x5ad47312, (q31_t)0x3a1ace5f, (q31_t)0x5adfdb37, (q31_t)0x3a1588a2,\n    (q31_t)0x5aeb4253, (q31_t)0x3a1040a8, (q31_t)0x5af6a865, (q31_t)0x3a0af671,\n    (q31_t)0x5b020d6c, (q31_t)0x3a05a9fd, (q31_t)0x5b0d716a, (q31_t)0x3a005b4d,\n    (q31_t)0x5b18d45c, (q31_t)0x39fb0a60, (q31_t)0x5b243643, (q31_t)0x39f5b737,\n    (q31_t)0x5b2f971e, (q31_t)0x39f061d2, (q31_t)0x5b3af6ec, (q31_t)0x39eb0a31,\n    (q31_t)0x5b4655ae, (q31_t)0x39e5b054, (q31_t)0x5b51b363, (q31_t)0x39e0543c,\n    (q31_t)0x5b5d100a, (q31_t)0x39daf5e8, (q31_t)0x5b686ba3, (q31_t)0x39d5955a,\n    (q31_t)0x5b73c62d, (q31_t)0x39d03291, (q31_t)0x5b7f1fa9, (q31_t)0x39cacd8d,\n    (q31_t)0x5b8a7815, (q31_t)0x39c5664f, (q31_t)0x5b95cf71, (q31_t)0x39bffcd7,\n    (q31_t)0x5ba125bd, (q31_t)0x39ba9125, (q31_t)0x5bac7af9, (q31_t)0x39b52339,\n    (q31_t)0x5bb7cf23, (q31_t)0x39afb313, (q31_t)0x5bc3223c, (q31_t)0x39aa40b4,\n    (q31_t)0x5bce7442, (q31_t)0x39a4cc1c, (q31_t)0x5bd9c537, (q31_t)0x399f554b,\n    (q31_t)0x5be51518, (q31_t)0x3999dc42, (q31_t)0x5bf063e6, (q31_t)0x399460ff,\n    (q31_t)0x5bfbb1a0, (q31_t)0x398ee385, (q31_t)0x5c06fe46, (q31_t)0x398963d2,\n    (q31_t)0x5c1249d8, (q31_t)0x3983e1e8, (q31_t)0x5c1d9454, (q31_t)0x397e5dc6,\n    (q31_t)0x5c28ddbb, (q31_t)0x3978d76c, (q31_t)0x5c34260c, (q31_t)0x39734edc,\n    (q31_t)0x5c3f6d47, (q31_t)0x396dc414, (q31_t)0x5c4ab36b, (q31_t)0x39683715,\n    (q31_t)0x5c55f878, (q31_t)0x3962a7e0, (q31_t)0x5c613c6d, (q31_t)0x395d1675,\n    (q31_t)0x5c6c7f4a, (q31_t)0x395782d3, (q31_t)0x5c77c10e, (q31_t)0x3951ecfc,\n    (q31_t)0x5c8301b9, (q31_t)0x394c54ee, (q31_t)0x5c8e414b, (q31_t)0x3946baac,\n    (q31_t)0x5c997fc4, (q31_t)0x39411e33, (q31_t)0x5ca4bd21, (q31_t)0x393b7f86,\n    (q31_t)0x5caff965, (q31_t)0x3935dea4, (q31_t)0x5cbb348d, (q31_t)0x39303b8e,\n    (q31_t)0x5cc66e99, (q31_t)0x392a9642, (q31_t)0x5cd1a78a, (q31_t)0x3924eec3,\n    (q31_t)0x5cdcdf5e, (q31_t)0x391f4510, (q31_t)0x5ce81615, (q31_t)0x39199929,\n    (q31_t)0x5cf34baf, (q31_t)0x3913eb0e, (q31_t)0x5cfe802b, (q31_t)0x390e3ac0,\n    (q31_t)0x5d09b389, (q31_t)0x3908883f, (q31_t)0x5d14e5c9, (q31_t)0x3902d38b,\n    (q31_t)0x5d2016e9, (q31_t)0x38fd1ca4, (q31_t)0x5d2b46ea, (q31_t)0x38f7638b,\n    (q31_t)0x5d3675cb, (q31_t)0x38f1a840, (q31_t)0x5d41a38c, (q31_t)0x38ebeac2,\n    (q31_t)0x5d4cd02c, (q31_t)0x38e62b13, (q31_t)0x5d57fbaa, (q31_t)0x38e06932,\n    (q31_t)0x5d632608, (q31_t)0x38daa520, (q31_t)0x5d6e4f43, (q31_t)0x38d4dedd,\n    (q31_t)0x5d79775c, (q31_t)0x38cf1669, (q31_t)0x5d849e51, (q31_t)0x38c94bc4,\n    (q31_t)0x5d8fc424, (q31_t)0x38c37eef, (q31_t)0x5d9ae8d2, (q31_t)0x38bdafea,\n    (q31_t)0x5da60c5d, (q31_t)0x38b7deb4, (q31_t)0x5db12ec3, (q31_t)0x38b20b4f,\n    (q31_t)0x5dbc5004, (q31_t)0x38ac35ba, (q31_t)0x5dc7701f, (q31_t)0x38a65df6,\n    (q31_t)0x5dd28f15, (q31_t)0x38a08402, (q31_t)0x5dddace4, (q31_t)0x389aa7e0,\n    (q31_t)0x5de8c98c, (q31_t)0x3894c98f, (q31_t)0x5df3e50d, (q31_t)0x388ee910,\n    (q31_t)0x5dfeff67, (q31_t)0x38890663, (q31_t)0x5e0a1898, (q31_t)0x38832187,\n    (q31_t)0x5e1530a1, (q31_t)0x387d3a7e, (q31_t)0x5e204781, (q31_t)0x38775147,\n    (q31_t)0x5e2b5d38, (q31_t)0x387165e3, (q31_t)0x5e3671c5, (q31_t)0x386b7852,\n    (q31_t)0x5e418528, (q31_t)0x38658894, (q31_t)0x5e4c9760, (q31_t)0x385f96a9,\n    (q31_t)0x5e57a86d, (q31_t)0x3859a292, (q31_t)0x5e62b84f, (q31_t)0x3853ac4f,\n    (q31_t)0x5e6dc705, (q31_t)0x384db3e0, (q31_t)0x5e78d48e, (q31_t)0x3847b946,\n    (q31_t)0x5e83e0eb, (q31_t)0x3841bc7f, (q31_t)0x5e8eec1b, (q31_t)0x383bbd8e,\n    (q31_t)0x5e99f61d, (q31_t)0x3835bc71, (q31_t)0x5ea4fef0, (q31_t)0x382fb92a,\n    (q31_t)0x5eb00696, (q31_t)0x3829b3b9, (q31_t)0x5ebb0d0d, (q31_t)0x3823ac1d,\n    (q31_t)0x5ec61254, (q31_t)0x381da256, (q31_t)0x5ed1166b, (q31_t)0x38179666,\n    (q31_t)0x5edc1953, (q31_t)0x3811884d, (q31_t)0x5ee71b0a, (q31_t)0x380b780a,\n    (q31_t)0x5ef21b90, (q31_t)0x3805659e, (q31_t)0x5efd1ae4, (q31_t)0x37ff5109,\n    (q31_t)0x5f081907, (q31_t)0x37f93a4b, (q31_t)0x5f1315f7, (q31_t)0x37f32165,\n    (q31_t)0x5f1e11b5, (q31_t)0x37ed0657, (q31_t)0x5f290c3f, (q31_t)0x37e6e921,\n    (q31_t)0x5f340596, (q31_t)0x37e0c9c3, (q31_t)0x5f3efdb9, (q31_t)0x37daa83d,\n    (q31_t)0x5f49f4a8, (q31_t)0x37d48490, (q31_t)0x5f54ea62, (q31_t)0x37ce5ebd,\n    (q31_t)0x5f5fdee6, (q31_t)0x37c836c2, (q31_t)0x5f6ad235, (q31_t)0x37c20ca1,\n    (q31_t)0x5f75c44e, (q31_t)0x37bbe05a, (q31_t)0x5f80b531, (q31_t)0x37b5b1ec,\n    (q31_t)0x5f8ba4dc, (q31_t)0x37af8159, (q31_t)0x5f969350, (q31_t)0x37a94ea0,\n    (q31_t)0x5fa1808c, (q31_t)0x37a319c2, (q31_t)0x5fac6c91, (q31_t)0x379ce2be,\n    (q31_t)0x5fb7575c, (q31_t)0x3796a996, (q31_t)0x5fc240ef, (q31_t)0x37906e49,\n    (q31_t)0x5fcd2948, (q31_t)0x378a30d8, (q31_t)0x5fd81067, (q31_t)0x3783f143,\n    (q31_t)0x5fe2f64c, (q31_t)0x377daf89, (q31_t)0x5feddaf6, (q31_t)0x37776bac,\n    (q31_t)0x5ff8be65, (q31_t)0x377125ac, (q31_t)0x6003a099, (q31_t)0x376add88,\n    (q31_t)0x600e8190, (q31_t)0x37649341, (q31_t)0x6019614c, (q31_t)0x375e46d8,\n    (q31_t)0x60243fca, (q31_t)0x3757f84c, (q31_t)0x602f1d0b, (q31_t)0x3751a79e,\n    (q31_t)0x6039f90f, (q31_t)0x374b54ce, (q31_t)0x6044d3d4, (q31_t)0x3744ffdd,\n    (q31_t)0x604fad5b, (q31_t)0x373ea8ca, (q31_t)0x605a85a3, (q31_t)0x37384f95,\n    (q31_t)0x60655cac, (q31_t)0x3731f440, (q31_t)0x60703275, (q31_t)0x372b96ca,\n    (q31_t)0x607b06fe, (q31_t)0x37253733, (q31_t)0x6085da46, (q31_t)0x371ed57c,\n    (q31_t)0x6090ac4d, (q31_t)0x371871a5, (q31_t)0x609b7d13, (q31_t)0x37120bae,\n    (q31_t)0x60a64c97, (q31_t)0x370ba398, (q31_t)0x60b11ad9, (q31_t)0x37053962,\n    (q31_t)0x60bbe7d8, (q31_t)0x36fecd0e, (q31_t)0x60c6b395, (q31_t)0x36f85e9a,\n    (q31_t)0x60d17e0d, (q31_t)0x36f1ee09, (q31_t)0x60dc4742, (q31_t)0x36eb7b58,\n    (q31_t)0x60e70f32, (q31_t)0x36e5068a, (q31_t)0x60f1d5de, (q31_t)0x36de8f9e,\n    (q31_t)0x60fc9b44, (q31_t)0x36d81695, (q31_t)0x61075f65, (q31_t)0x36d19b6e,\n    (q31_t)0x61122240, (q31_t)0x36cb1e2a, (q31_t)0x611ce3d5, (q31_t)0x36c49ec9,\n    (q31_t)0x6127a423, (q31_t)0x36be1d4c, (q31_t)0x61326329, (q31_t)0x36b799b3,\n    (q31_t)0x613d20e8, (q31_t)0x36b113fd, (q31_t)0x6147dd5f, (q31_t)0x36aa8c2c,\n    (q31_t)0x6152988d, (q31_t)0x36a4023f, (q31_t)0x615d5273, (q31_t)0x369d7637,\n    (q31_t)0x61680b0f, (q31_t)0x3696e814, (q31_t)0x6172c262, (q31_t)0x369057d6,\n    (q31_t)0x617d786a, (q31_t)0x3689c57d, (q31_t)0x61882d28, (q31_t)0x3683310b,\n    (q31_t)0x6192e09b, (q31_t)0x367c9a7e, (q31_t)0x619d92c2, (q31_t)0x367601d7,\n    (q31_t)0x61a8439e, (q31_t)0x366f6717, (q31_t)0x61b2f32e, (q31_t)0x3668ca3e,\n    (q31_t)0x61bda171, (q31_t)0x36622b4c, (q31_t)0x61c84e67, (q31_t)0x365b8a41,\n    (q31_t)0x61d2fa0f, (q31_t)0x3654e71d, (q31_t)0x61dda46a, (q31_t)0x364e41e2,\n    (q31_t)0x61e84d76, (q31_t)0x36479a8e, (q31_t)0x61f2f534, (q31_t)0x3640f123,\n    (q31_t)0x61fd9ba3, (q31_t)0x363a45a0, (q31_t)0x620840c2, (q31_t)0x36339806,\n    (q31_t)0x6212e492, (q31_t)0x362ce855, (q31_t)0x621d8711, (q31_t)0x3626368d,\n    (q31_t)0x6228283f, (q31_t)0x361f82af, (q31_t)0x6232c81c, (q31_t)0x3618ccba,\n    (q31_t)0x623d66a8, (q31_t)0x361214b0, (q31_t)0x624803e2, (q31_t)0x360b5a90,\n    (q31_t)0x62529fca, (q31_t)0x36049e5b, (q31_t)0x625d3a5e, (q31_t)0x35fde011,\n    (q31_t)0x6267d3a0, (q31_t)0x35f71fb1, (q31_t)0x62726b8e, (q31_t)0x35f05d3d,\n    (q31_t)0x627d0228, (q31_t)0x35e998b5, (q31_t)0x6287976e, (q31_t)0x35e2d219,\n    (q31_t)0x62922b5e, (q31_t)0x35dc0968, (q31_t)0x629cbdfa, (q31_t)0x35d53ea5,\n    (q31_t)0x62a74f40, (q31_t)0x35ce71ce, (q31_t)0x62b1df30, (q31_t)0x35c7a2e3,\n    (q31_t)0x62bc6dca, (q31_t)0x35c0d1e7, (q31_t)0x62c6fb0c, (q31_t)0x35b9fed7,\n    (q31_t)0x62d186f8, (q31_t)0x35b329b5, (q31_t)0x62dc118c, (q31_t)0x35ac5282,\n    (q31_t)0x62e69ac8, (q31_t)0x35a5793c, (q31_t)0x62f122ab, (q31_t)0x359e9de5,\n    (q31_t)0x62fba936, (q31_t)0x3597c07d, (q31_t)0x63062e67, (q31_t)0x3590e104,\n    (q31_t)0x6310b23e, (q31_t)0x3589ff7a, (q31_t)0x631b34bc, (q31_t)0x35831be0,\n    (q31_t)0x6325b5df, (q31_t)0x357c3636, (q31_t)0x633035a7, (q31_t)0x35754e7c,\n    (q31_t)0x633ab414, (q31_t)0x356e64b2, (q31_t)0x63453125, (q31_t)0x356778d9,\n    (q31_t)0x634facda, (q31_t)0x35608af1, (q31_t)0x635a2733, (q31_t)0x35599afa,\n    (q31_t)0x6364a02e, (q31_t)0x3552a8f4, (q31_t)0x636f17cc, (q31_t)0x354bb4e1,\n    (q31_t)0x63798e0d, (q31_t)0x3544bebf, (q31_t)0x638402ef, (q31_t)0x353dc68f,\n    (q31_t)0x638e7673, (q31_t)0x3536cc52, (q31_t)0x6398e898, (q31_t)0x352fd008,\n    (q31_t)0x63a3595e, (q31_t)0x3528d1b1, (q31_t)0x63adc8c4, (q31_t)0x3521d14d,\n    (q31_t)0x63b836ca, (q31_t)0x351acedd, (q31_t)0x63c2a36f, (q31_t)0x3513ca60,\n    (q31_t)0x63cd0eb3, (q31_t)0x350cc3d8, (q31_t)0x63d77896, (q31_t)0x3505bb44,\n    (q31_t)0x63e1e117, (q31_t)0x34feb0a5, (q31_t)0x63ec4837, (q31_t)0x34f7a3fb,\n    (q31_t)0x63f6adf3, (q31_t)0x34f09546, (q31_t)0x6401124d, (q31_t)0x34e98487,\n    (q31_t)0x640b7543, (q31_t)0x34e271bd, (q31_t)0x6415d6d5, (q31_t)0x34db5cea,\n    (q31_t)0x64203704, (q31_t)0x34d4460c, (q31_t)0x642a95ce, (q31_t)0x34cd2d26,\n    (q31_t)0x6434f332, (q31_t)0x34c61236, (q31_t)0x643f4f32, (q31_t)0x34bef53d,\n    (q31_t)0x6449a9cc, (q31_t)0x34b7d63c, (q31_t)0x645402ff, (q31_t)0x34b0b533,\n    (q31_t)0x645e5acc, (q31_t)0x34a99221, (q31_t)0x6468b132, (q31_t)0x34a26d08,\n    (q31_t)0x64730631, (q31_t)0x349b45e7, (q31_t)0x647d59c8, (q31_t)0x34941cbf,\n    (q31_t)0x6487abf7, (q31_t)0x348cf190, (q31_t)0x6491fcbe, (q31_t)0x3485c45b,\n    (q31_t)0x649c4c1b, (q31_t)0x347e951f, (q31_t)0x64a69a0f, (q31_t)0x347763dd,\n    (q31_t)0x64b0e699, (q31_t)0x34703095, (q31_t)0x64bb31ba, (q31_t)0x3468fb47,\n    (q31_t)0x64c57b6f, (q31_t)0x3461c3f5, (q31_t)0x64cfc3ba, (q31_t)0x345a8a9d,\n    (q31_t)0x64da0a9a, (q31_t)0x34534f41, (q31_t)0x64e4500e, (q31_t)0x344c11e0,\n    (q31_t)0x64ee9415, (q31_t)0x3444d27b, (q31_t)0x64f8d6b0, (q31_t)0x343d9112,\n    (q31_t)0x650317df, (q31_t)0x34364da6, (q31_t)0x650d57a0, (q31_t)0x342f0836,\n    (q31_t)0x651795f3, (q31_t)0x3427c0c3, (q31_t)0x6521d2d8, (q31_t)0x3420774d,\n    (q31_t)0x652c0e4f, (q31_t)0x34192bd5, (q31_t)0x65364857, (q31_t)0x3411de5b,\n    (q31_t)0x654080ef, (q31_t)0x340a8edf, (q31_t)0x654ab818, (q31_t)0x34033d61,\n    (q31_t)0x6554edd1, (q31_t)0x33fbe9e2, (q31_t)0x655f2219, (q31_t)0x33f49462,\n    (q31_t)0x656954f1, (q31_t)0x33ed3ce1, (q31_t)0x65738657, (q31_t)0x33e5e360,\n    (q31_t)0x657db64c, (q31_t)0x33de87de, (q31_t)0x6587e4cf, (q31_t)0x33d72a5d,\n    (q31_t)0x659211df, (q31_t)0x33cfcadc, (q31_t)0x659c3d7c, (q31_t)0x33c8695b,\n    (q31_t)0x65a667a7, (q31_t)0x33c105db, (q31_t)0x65b0905d, (q31_t)0x33b9a05d,\n    (q31_t)0x65bab7a0, (q31_t)0x33b238e0, (q31_t)0x65c4dd6e, (q31_t)0x33aacf65,\n    (q31_t)0x65cf01c8, (q31_t)0x33a363ec, (q31_t)0x65d924ac, (q31_t)0x339bf675,\n    (q31_t)0x65e3461b, (q31_t)0x33948701, (q31_t)0x65ed6614, (q31_t)0x338d1590,\n    (q31_t)0x65f78497, (q31_t)0x3385a222, (q31_t)0x6601a1a2, (q31_t)0x337e2cb7,\n    (q31_t)0x660bbd37, (q31_t)0x3376b551, (q31_t)0x6615d754, (q31_t)0x336f3bee,\n    (q31_t)0x661feffa, (q31_t)0x3367c090, (q31_t)0x662a0727, (q31_t)0x33604336,\n    (q31_t)0x66341cdb, (q31_t)0x3358c3e2, (q31_t)0x663e3117, (q31_t)0x33514292,\n    (q31_t)0x664843d9, (q31_t)0x3349bf48, (q31_t)0x66525521, (q31_t)0x33423a04,\n    (q31_t)0x665c64ef, (q31_t)0x333ab2c6, (q31_t)0x66667342, (q31_t)0x3333298f,\n    (q31_t)0x6670801a, (q31_t)0x332b9e5e, (q31_t)0x667a8b77, (q31_t)0x33241134,\n    (q31_t)0x66849558, (q31_t)0x331c8211, (q31_t)0x668e9dbd, (q31_t)0x3314f0f6,\n    (q31_t)0x6698a4a6, (q31_t)0x330d5de3, (q31_t)0x66a2aa11, (q31_t)0x3305c8d7,\n    (q31_t)0x66acadff, (q31_t)0x32fe31d5, (q31_t)0x66b6b070, (q31_t)0x32f698db,\n    (q31_t)0x66c0b162, (q31_t)0x32eefdea, (q31_t)0x66cab0d6, (q31_t)0x32e76102,\n    (q31_t)0x66d4aecb, (q31_t)0x32dfc224, (q31_t)0x66deab41, (q31_t)0x32d82150,\n    (q31_t)0x66e8a637, (q31_t)0x32d07e85, (q31_t)0x66f29fad, (q31_t)0x32c8d9c6,\n    (q31_t)0x66fc97a3, (q31_t)0x32c13311, (q31_t)0x67068e18, (q31_t)0x32b98a67,\n    (q31_t)0x6710830c, (q31_t)0x32b1dfc9, (q31_t)0x671a767e, (q31_t)0x32aa3336,\n    (q31_t)0x6724686e, (q31_t)0x32a284b0, (q31_t)0x672e58dc, (q31_t)0x329ad435,\n    (q31_t)0x673847c8, (q31_t)0x329321c7, (q31_t)0x67423530, (q31_t)0x328b6d66,\n    (q31_t)0x674c2115, (q31_t)0x3283b712, (q31_t)0x67560b76, (q31_t)0x327bfecc,\n    (q31_t)0x675ff452, (q31_t)0x32744493, (q31_t)0x6769dbaa, (q31_t)0x326c8868,\n    (q31_t)0x6773c17d, (q31_t)0x3264ca4c, (q31_t)0x677da5cb, (q31_t)0x325d0a3e,\n    (q31_t)0x67878893, (q31_t)0x32554840, (q31_t)0x679169d5, (q31_t)0x324d8450,\n    (q31_t)0x679b4990, (q31_t)0x3245be70, (q31_t)0x67a527c4, (q31_t)0x323df6a0,\n    (q31_t)0x67af0472, (q31_t)0x32362ce0, (q31_t)0x67b8df97, (q31_t)0x322e6130,\n    (q31_t)0x67c2b934, (q31_t)0x32269391, (q31_t)0x67cc9149, (q31_t)0x321ec403,\n    (q31_t)0x67d667d5, (q31_t)0x3216f287, (q31_t)0x67e03cd8, (q31_t)0x320f1f1c,\n    (q31_t)0x67ea1052, (q31_t)0x320749c3, (q31_t)0x67f3e241, (q31_t)0x31ff727c,\n    (q31_t)0x67fdb2a7, (q31_t)0x31f79948, (q31_t)0x68078181, (q31_t)0x31efbe27,\n    (q31_t)0x68114ed0, (q31_t)0x31e7e118, (q31_t)0x681b1a94, (q31_t)0x31e0021e,\n    (q31_t)0x6824e4cc, (q31_t)0x31d82137, (q31_t)0x682ead78, (q31_t)0x31d03e64,\n    (q31_t)0x68387498, (q31_t)0x31c859a5, (q31_t)0x68423a2a, (q31_t)0x31c072fb,\n    (q31_t)0x684bfe2f, (q31_t)0x31b88a66, (q31_t)0x6855c0a6, (q31_t)0x31b09fe7,\n    (q31_t)0x685f8190, (q31_t)0x31a8b37c, (q31_t)0x686940ea, (q31_t)0x31a0c528,\n    (q31_t)0x6872feb6, (q31_t)0x3198d4ea, (q31_t)0x687cbaf3, (q31_t)0x3190e2c3,\n    (q31_t)0x688675a0, (q31_t)0x3188eeb2, (q31_t)0x68902ebd, (q31_t)0x3180f8b8,\n    (q31_t)0x6899e64a, (q31_t)0x317900d6, (q31_t)0x68a39c46, (q31_t)0x3171070c,\n    (q31_t)0x68ad50b1, (q31_t)0x31690b59, (q31_t)0x68b7038b, (q31_t)0x31610dbf,\n    (q31_t)0x68c0b4d2, (q31_t)0x31590e3e, (q31_t)0x68ca6488, (q31_t)0x31510cd5,\n    (q31_t)0x68d412ab, (q31_t)0x31490986, (q31_t)0x68ddbf3b, (q31_t)0x31410450,\n    (q31_t)0x68e76a37, (q31_t)0x3138fd35, (q31_t)0x68f113a0, (q31_t)0x3130f433,\n    (q31_t)0x68fabb75, (q31_t)0x3128e94c, (q31_t)0x690461b5, (q31_t)0x3120dc80,\n    (q31_t)0x690e0661, (q31_t)0x3118cdcf, (q31_t)0x6917a977, (q31_t)0x3110bd39,\n    (q31_t)0x69214af8, (q31_t)0x3108aabf, (q31_t)0x692aeae3, (q31_t)0x31009661,\n    (q31_t)0x69348937, (q31_t)0x30f8801f, (q31_t)0x693e25f5, (q31_t)0x30f067fb,\n    (q31_t)0x6947c11c, (q31_t)0x30e84df3, (q31_t)0x69515aab, (q31_t)0x30e03208,\n    (q31_t)0x695af2a3, (q31_t)0x30d8143b, (q31_t)0x69648902, (q31_t)0x30cff48c,\n    (q31_t)0x696e1dc9, (q31_t)0x30c7d2fb, (q31_t)0x6977b0f7, (q31_t)0x30bfaf89,\n    (q31_t)0x6981428c, (q31_t)0x30b78a36, (q31_t)0x698ad287, (q31_t)0x30af6302,\n    (q31_t)0x699460e8, (q31_t)0x30a739ed, (q31_t)0x699dedaf, (q31_t)0x309f0ef8,\n    (q31_t)0x69a778db, (q31_t)0x3096e223, (q31_t)0x69b1026c, (q31_t)0x308eb36f,\n    (q31_t)0x69ba8a61, (q31_t)0x308682dc, (q31_t)0x69c410ba, (q31_t)0x307e5069,\n    (q31_t)0x69cd9578, (q31_t)0x30761c18, (q31_t)0x69d71899, (q31_t)0x306de5e9,\n    (q31_t)0x69e09a1c, (q31_t)0x3065addb, (q31_t)0x69ea1a03, (q31_t)0x305d73f0,\n    (q31_t)0x69f3984c, (q31_t)0x30553828, (q31_t)0x69fd14f6, (q31_t)0x304cfa83,\n    (q31_t)0x6a069003, (q31_t)0x3044bb00, (q31_t)0x6a100970, (q31_t)0x303c79a2,\n    (q31_t)0x6a19813f, (q31_t)0x30343667, (q31_t)0x6a22f76e, (q31_t)0x302bf151,\n    (q31_t)0x6a2c6bfd, (q31_t)0x3023aa5f, (q31_t)0x6a35deeb, (q31_t)0x301b6193,\n    (q31_t)0x6a3f503a, (q31_t)0x301316eb, (q31_t)0x6a48bfe7, (q31_t)0x300aca69,\n    (q31_t)0x6a522df3, (q31_t)0x30027c0c, (q31_t)0x6a5b9a5d, (q31_t)0x2ffa2bd6,\n    (q31_t)0x6a650525, (q31_t)0x2ff1d9c7, (q31_t)0x6a6e6e4b, (q31_t)0x2fe985de,\n    (q31_t)0x6a77d5ce, (q31_t)0x2fe1301c, (q31_t)0x6a813bae, (q31_t)0x2fd8d882,\n    (q31_t)0x6a8a9fea, (q31_t)0x2fd07f0f, (q31_t)0x6a940283, (q31_t)0x2fc823c5,\n    (q31_t)0x6a9d6377, (q31_t)0x2fbfc6a3, (q31_t)0x6aa6c2c6, (q31_t)0x2fb767aa,\n    (q31_t)0x6ab02071, (q31_t)0x2faf06da, (q31_t)0x6ab97c77, (q31_t)0x2fa6a433,\n    (q31_t)0x6ac2d6d6, (q31_t)0x2f9e3fb6, (q31_t)0x6acc2f90, (q31_t)0x2f95d963,\n    (q31_t)0x6ad586a3, (q31_t)0x2f8d713a, (q31_t)0x6adedc10, (q31_t)0x2f85073c,\n    (q31_t)0x6ae82fd5, (q31_t)0x2f7c9b69, (q31_t)0x6af181f3, (q31_t)0x2f742dc1,\n    (q31_t)0x6afad269, (q31_t)0x2f6bbe45, (q31_t)0x6b042137, (q31_t)0x2f634cf5,\n    (q31_t)0x6b0d6e5c, (q31_t)0x2f5ad9d1, (q31_t)0x6b16b9d9, (q31_t)0x2f5264da,\n    (q31_t)0x6b2003ac, (q31_t)0x2f49ee0f, (q31_t)0x6b294bd5, (q31_t)0x2f417573,\n    (q31_t)0x6b329255, (q31_t)0x2f38fb03, (q31_t)0x6b3bd72a, (q31_t)0x2f307ec2,\n    (q31_t)0x6b451a55, (q31_t)0x2f2800af, (q31_t)0x6b4e5bd4, (q31_t)0x2f1f80ca,\n    (q31_t)0x6b579ba8, (q31_t)0x2f16ff14, (q31_t)0x6b60d9d0, (q31_t)0x2f0e7b8e,\n    (q31_t)0x6b6a164d, (q31_t)0x2f05f637, (q31_t)0x6b73511c, (q31_t)0x2efd6f10,\n    (q31_t)0x6b7c8a3f, (q31_t)0x2ef4e619, (q31_t)0x6b85c1b5, (q31_t)0x2eec5b53,\n    (q31_t)0x6b8ef77d, (q31_t)0x2ee3cebe, (q31_t)0x6b982b97, (q31_t)0x2edb405a,\n    (q31_t)0x6ba15e03, (q31_t)0x2ed2b027, (q31_t)0x6baa8ec0, (q31_t)0x2eca1e27,\n    (q31_t)0x6bb3bdce, (q31_t)0x2ec18a58, (q31_t)0x6bbceb2d, (q31_t)0x2eb8f4bc,\n    (q31_t)0x6bc616dd, (q31_t)0x2eb05d53, (q31_t)0x6bcf40dc, (q31_t)0x2ea7c41e,\n    (q31_t)0x6bd8692b, (q31_t)0x2e9f291b, (q31_t)0x6be18fc9, (q31_t)0x2e968c4d,\n    (q31_t)0x6beab4b6, (q31_t)0x2e8dedb3, (q31_t)0x6bf3d7f2, (q31_t)0x2e854d4d,\n    (q31_t)0x6bfcf97c, (q31_t)0x2e7cab1c, (q31_t)0x6c061953, (q31_t)0x2e740720,\n    (q31_t)0x6c0f3779, (q31_t)0x2e6b615a, (q31_t)0x6c1853eb, (q31_t)0x2e62b9ca,\n    (q31_t)0x6c216eaa, (q31_t)0x2e5a1070, (q31_t)0x6c2a87b6, (q31_t)0x2e51654c,\n    (q31_t)0x6c339f0e, (q31_t)0x2e48b860, (q31_t)0x6c3cb4b1, (q31_t)0x2e4009aa,\n    (q31_t)0x6c45c8a0, (q31_t)0x2e37592c, (q31_t)0x6c4edada, (q31_t)0x2e2ea6e6,\n    (q31_t)0x6c57eb5e, (q31_t)0x2e25f2d8, (q31_t)0x6c60fa2d, (q31_t)0x2e1d3d03,\n    (q31_t)0x6c6a0746, (q31_t)0x2e148566, (q31_t)0x6c7312a9, (q31_t)0x2e0bcc03,\n    (q31_t)0x6c7c1c55, (q31_t)0x2e0310d9, (q31_t)0x6c85244a, (q31_t)0x2dfa53e9,\n    (q31_t)0x6c8e2a87, (q31_t)0x2df19534, (q31_t)0x6c972f0d, (q31_t)0x2de8d4b8,\n    (q31_t)0x6ca031da, (q31_t)0x2de01278, (q31_t)0x6ca932ef, (q31_t)0x2dd74e73,\n    (q31_t)0x6cb2324c, (q31_t)0x2dce88aa, (q31_t)0x6cbb2fef, (q31_t)0x2dc5c11c,\n    (q31_t)0x6cc42bd9, (q31_t)0x2dbcf7cb, (q31_t)0x6ccd2609, (q31_t)0x2db42cb6,\n    (q31_t)0x6cd61e7f, (q31_t)0x2dab5fdf, (q31_t)0x6cdf153a, (q31_t)0x2da29144,\n    (q31_t)0x6ce80a3a, (q31_t)0x2d99c0e7, (q31_t)0x6cf0fd80, (q31_t)0x2d90eec8,\n    (q31_t)0x6cf9ef09, (q31_t)0x2d881ae8, (q31_t)0x6d02ded7, (q31_t)0x2d7f4545,\n    (q31_t)0x6d0bcce8, (q31_t)0x2d766de2, (q31_t)0x6d14b93d, (q31_t)0x2d6d94bf,\n    (q31_t)0x6d1da3d5, (q31_t)0x2d64b9da, (q31_t)0x6d268cb0, (q31_t)0x2d5bdd36,\n    (q31_t)0x6d2f73cd, (q31_t)0x2d52fed2, (q31_t)0x6d38592c, (q31_t)0x2d4a1eaf,\n    (q31_t)0x6d413ccd, (q31_t)0x2d413ccd, (q31_t)0x6d4a1eaf, (q31_t)0x2d38592c,\n    (q31_t)0x6d52fed2, (q31_t)0x2d2f73cd, (q31_t)0x6d5bdd36, (q31_t)0x2d268cb0,\n    (q31_t)0x6d64b9da, (q31_t)0x2d1da3d5, (q31_t)0x6d6d94bf, (q31_t)0x2d14b93d,\n    (q31_t)0x6d766de2, (q31_t)0x2d0bcce8, (q31_t)0x6d7f4545, (q31_t)0x2d02ded7,\n    (q31_t)0x6d881ae8, (q31_t)0x2cf9ef09, (q31_t)0x6d90eec8, (q31_t)0x2cf0fd80,\n    (q31_t)0x6d99c0e7, (q31_t)0x2ce80a3a, (q31_t)0x6da29144, (q31_t)0x2cdf153a,\n    (q31_t)0x6dab5fdf, (q31_t)0x2cd61e7f, (q31_t)0x6db42cb6, (q31_t)0x2ccd2609,\n    (q31_t)0x6dbcf7cb, (q31_t)0x2cc42bd9, (q31_t)0x6dc5c11c, (q31_t)0x2cbb2fef,\n    (q31_t)0x6dce88aa, (q31_t)0x2cb2324c, (q31_t)0x6dd74e73, (q31_t)0x2ca932ef,\n    (q31_t)0x6de01278, (q31_t)0x2ca031da, (q31_t)0x6de8d4b8, (q31_t)0x2c972f0d,\n    (q31_t)0x6df19534, (q31_t)0x2c8e2a87, (q31_t)0x6dfa53e9, (q31_t)0x2c85244a,\n    (q31_t)0x6e0310d9, (q31_t)0x2c7c1c55, (q31_t)0x6e0bcc03, (q31_t)0x2c7312a9,\n    (q31_t)0x6e148566, (q31_t)0x2c6a0746, (q31_t)0x6e1d3d03, (q31_t)0x2c60fa2d,\n    (q31_t)0x6e25f2d8, (q31_t)0x2c57eb5e, (q31_t)0x6e2ea6e6, (q31_t)0x2c4edada,\n    (q31_t)0x6e37592c, (q31_t)0x2c45c8a0, (q31_t)0x6e4009aa, (q31_t)0x2c3cb4b1,\n    (q31_t)0x6e48b860, (q31_t)0x2c339f0e, (q31_t)0x6e51654c, (q31_t)0x2c2a87b6,\n    (q31_t)0x6e5a1070, (q31_t)0x2c216eaa, (q31_t)0x6e62b9ca, (q31_t)0x2c1853eb,\n    (q31_t)0x6e6b615a, (q31_t)0x2c0f3779, (q31_t)0x6e740720, (q31_t)0x2c061953,\n    (q31_t)0x6e7cab1c, (q31_t)0x2bfcf97c, (q31_t)0x6e854d4d, (q31_t)0x2bf3d7f2,\n    (q31_t)0x6e8dedb3, (q31_t)0x2beab4b6, (q31_t)0x6e968c4d, (q31_t)0x2be18fc9,\n    (q31_t)0x6e9f291b, (q31_t)0x2bd8692b, (q31_t)0x6ea7c41e, (q31_t)0x2bcf40dc,\n    (q31_t)0x6eb05d53, (q31_t)0x2bc616dd, (q31_t)0x6eb8f4bc, (q31_t)0x2bbceb2d,\n    (q31_t)0x6ec18a58, (q31_t)0x2bb3bdce, (q31_t)0x6eca1e27, (q31_t)0x2baa8ec0,\n    (q31_t)0x6ed2b027, (q31_t)0x2ba15e03, (q31_t)0x6edb405a, (q31_t)0x2b982b97,\n    (q31_t)0x6ee3cebe, (q31_t)0x2b8ef77d, (q31_t)0x6eec5b53, (q31_t)0x2b85c1b5,\n    (q31_t)0x6ef4e619, (q31_t)0x2b7c8a3f, (q31_t)0x6efd6f10, (q31_t)0x2b73511c,\n    (q31_t)0x6f05f637, (q31_t)0x2b6a164d, (q31_t)0x6f0e7b8e, (q31_t)0x2b60d9d0,\n    (q31_t)0x6f16ff14, (q31_t)0x2b579ba8, (q31_t)0x6f1f80ca, (q31_t)0x2b4e5bd4,\n    (q31_t)0x6f2800af, (q31_t)0x2b451a55, (q31_t)0x6f307ec2, (q31_t)0x2b3bd72a,\n    (q31_t)0x6f38fb03, (q31_t)0x2b329255, (q31_t)0x6f417573, (q31_t)0x2b294bd5,\n    (q31_t)0x6f49ee0f, (q31_t)0x2b2003ac, (q31_t)0x6f5264da, (q31_t)0x2b16b9d9,\n    (q31_t)0x6f5ad9d1, (q31_t)0x2b0d6e5c, (q31_t)0x6f634cf5, (q31_t)0x2b042137,\n    (q31_t)0x6f6bbe45, (q31_t)0x2afad269, (q31_t)0x6f742dc1, (q31_t)0x2af181f3,\n    (q31_t)0x6f7c9b69, (q31_t)0x2ae82fd5, (q31_t)0x6f85073c, (q31_t)0x2adedc10,\n    (q31_t)0x6f8d713a, (q31_t)0x2ad586a3, (q31_t)0x6f95d963, (q31_t)0x2acc2f90,\n    (q31_t)0x6f9e3fb6, (q31_t)0x2ac2d6d6, (q31_t)0x6fa6a433, (q31_t)0x2ab97c77,\n    (q31_t)0x6faf06da, (q31_t)0x2ab02071, (q31_t)0x6fb767aa, (q31_t)0x2aa6c2c6,\n    (q31_t)0x6fbfc6a3, (q31_t)0x2a9d6377, (q31_t)0x6fc823c5, (q31_t)0x2a940283,\n    (q31_t)0x6fd07f0f, (q31_t)0x2a8a9fea, (q31_t)0x6fd8d882, (q31_t)0x2a813bae,\n    (q31_t)0x6fe1301c, (q31_t)0x2a77d5ce, (q31_t)0x6fe985de, (q31_t)0x2a6e6e4b,\n    (q31_t)0x6ff1d9c7, (q31_t)0x2a650525, (q31_t)0x6ffa2bd6, (q31_t)0x2a5b9a5d,\n    (q31_t)0x70027c0c, (q31_t)0x2a522df3, (q31_t)0x700aca69, (q31_t)0x2a48bfe7,\n    (q31_t)0x701316eb, (q31_t)0x2a3f503a, (q31_t)0x701b6193, (q31_t)0x2a35deeb,\n    (q31_t)0x7023aa5f, (q31_t)0x2a2c6bfd, (q31_t)0x702bf151, (q31_t)0x2a22f76e,\n    (q31_t)0x70343667, (q31_t)0x2a19813f, (q31_t)0x703c79a2, (q31_t)0x2a100970,\n    (q31_t)0x7044bb00, (q31_t)0x2a069003, (q31_t)0x704cfa83, (q31_t)0x29fd14f6,\n    (q31_t)0x70553828, (q31_t)0x29f3984c, (q31_t)0x705d73f0, (q31_t)0x29ea1a03,\n    (q31_t)0x7065addb, (q31_t)0x29e09a1c, (q31_t)0x706de5e9, (q31_t)0x29d71899,\n    (q31_t)0x70761c18, (q31_t)0x29cd9578, (q31_t)0x707e5069, (q31_t)0x29c410ba,\n    (q31_t)0x708682dc, (q31_t)0x29ba8a61, (q31_t)0x708eb36f, (q31_t)0x29b1026c,\n    (q31_t)0x7096e223, (q31_t)0x29a778db, (q31_t)0x709f0ef8, (q31_t)0x299dedaf,\n    (q31_t)0x70a739ed, (q31_t)0x299460e8, (q31_t)0x70af6302, (q31_t)0x298ad287,\n    (q31_t)0x70b78a36, (q31_t)0x2981428c, (q31_t)0x70bfaf89, (q31_t)0x2977b0f7,\n    (q31_t)0x70c7d2fb, (q31_t)0x296e1dc9, (q31_t)0x70cff48c, (q31_t)0x29648902,\n    (q31_t)0x70d8143b, (q31_t)0x295af2a3, (q31_t)0x70e03208, (q31_t)0x29515aab,\n    (q31_t)0x70e84df3, (q31_t)0x2947c11c, (q31_t)0x70f067fb, (q31_t)0x293e25f5,\n    (q31_t)0x70f8801f, (q31_t)0x29348937, (q31_t)0x71009661, (q31_t)0x292aeae3,\n    (q31_t)0x7108aabf, (q31_t)0x29214af8, (q31_t)0x7110bd39, (q31_t)0x2917a977,\n    (q31_t)0x7118cdcf, (q31_t)0x290e0661, (q31_t)0x7120dc80, (q31_t)0x290461b5,\n    (q31_t)0x7128e94c, (q31_t)0x28fabb75, (q31_t)0x7130f433, (q31_t)0x28f113a0,\n    (q31_t)0x7138fd35, (q31_t)0x28e76a37, (q31_t)0x71410450, (q31_t)0x28ddbf3b,\n    (q31_t)0x71490986, (q31_t)0x28d412ab, (q31_t)0x71510cd5, (q31_t)0x28ca6488,\n    (q31_t)0x71590e3e, (q31_t)0x28c0b4d2, (q31_t)0x71610dbf, (q31_t)0x28b7038b,\n    (q31_t)0x71690b59, (q31_t)0x28ad50b1, (q31_t)0x7171070c, (q31_t)0x28a39c46,\n    (q31_t)0x717900d6, (q31_t)0x2899e64a, (q31_t)0x7180f8b8, (q31_t)0x28902ebd,\n    (q31_t)0x7188eeb2, (q31_t)0x288675a0, (q31_t)0x7190e2c3, (q31_t)0x287cbaf3,\n    (q31_t)0x7198d4ea, (q31_t)0x2872feb6, (q31_t)0x71a0c528, (q31_t)0x286940ea,\n    (q31_t)0x71a8b37c, (q31_t)0x285f8190, (q31_t)0x71b09fe7, (q31_t)0x2855c0a6,\n    (q31_t)0x71b88a66, (q31_t)0x284bfe2f, (q31_t)0x71c072fb, (q31_t)0x28423a2a,\n    (q31_t)0x71c859a5, (q31_t)0x28387498, (q31_t)0x71d03e64, (q31_t)0x282ead78,\n    (q31_t)0x71d82137, (q31_t)0x2824e4cc, (q31_t)0x71e0021e, (q31_t)0x281b1a94,\n    (q31_t)0x71e7e118, (q31_t)0x28114ed0, (q31_t)0x71efbe27, (q31_t)0x28078181,\n    (q31_t)0x71f79948, (q31_t)0x27fdb2a7, (q31_t)0x71ff727c, (q31_t)0x27f3e241,\n    (q31_t)0x720749c3, (q31_t)0x27ea1052, (q31_t)0x720f1f1c, (q31_t)0x27e03cd8,\n    (q31_t)0x7216f287, (q31_t)0x27d667d5, (q31_t)0x721ec403, (q31_t)0x27cc9149,\n    (q31_t)0x72269391, (q31_t)0x27c2b934, (q31_t)0x722e6130, (q31_t)0x27b8df97,\n    (q31_t)0x72362ce0, (q31_t)0x27af0472, (q31_t)0x723df6a0, (q31_t)0x27a527c4,\n    (q31_t)0x7245be70, (q31_t)0x279b4990, (q31_t)0x724d8450, (q31_t)0x279169d5,\n    (q31_t)0x72554840, (q31_t)0x27878893, (q31_t)0x725d0a3e, (q31_t)0x277da5cb,\n    (q31_t)0x7264ca4c, (q31_t)0x2773c17d, (q31_t)0x726c8868, (q31_t)0x2769dbaa,\n    (q31_t)0x72744493, (q31_t)0x275ff452, (q31_t)0x727bfecc, (q31_t)0x27560b76,\n    (q31_t)0x7283b712, (q31_t)0x274c2115, (q31_t)0x728b6d66, (q31_t)0x27423530,\n    (q31_t)0x729321c7, (q31_t)0x273847c8, (q31_t)0x729ad435, (q31_t)0x272e58dc,\n    (q31_t)0x72a284b0, (q31_t)0x2724686e, (q31_t)0x72aa3336, (q31_t)0x271a767e,\n    (q31_t)0x72b1dfc9, (q31_t)0x2710830c, (q31_t)0x72b98a67, (q31_t)0x27068e18,\n    (q31_t)0x72c13311, (q31_t)0x26fc97a3, (q31_t)0x72c8d9c6, (q31_t)0x26f29fad,\n    (q31_t)0x72d07e85, (q31_t)0x26e8a637, (q31_t)0x72d82150, (q31_t)0x26deab41,\n    (q31_t)0x72dfc224, (q31_t)0x26d4aecb, (q31_t)0x72e76102, (q31_t)0x26cab0d6,\n    (q31_t)0x72eefdea, (q31_t)0x26c0b162, (q31_t)0x72f698db, (q31_t)0x26b6b070,\n    (q31_t)0x72fe31d5, (q31_t)0x26acadff, (q31_t)0x7305c8d7, (q31_t)0x26a2aa11,\n    (q31_t)0x730d5de3, (q31_t)0x2698a4a6, (q31_t)0x7314f0f6, (q31_t)0x268e9dbd,\n    (q31_t)0x731c8211, (q31_t)0x26849558, (q31_t)0x73241134, (q31_t)0x267a8b77,\n    (q31_t)0x732b9e5e, (q31_t)0x2670801a, (q31_t)0x7333298f, (q31_t)0x26667342,\n    (q31_t)0x733ab2c6, (q31_t)0x265c64ef, (q31_t)0x73423a04, (q31_t)0x26525521,\n    (q31_t)0x7349bf48, (q31_t)0x264843d9, (q31_t)0x73514292, (q31_t)0x263e3117,\n    (q31_t)0x7358c3e2, (q31_t)0x26341cdb, (q31_t)0x73604336, (q31_t)0x262a0727,\n    (q31_t)0x7367c090, (q31_t)0x261feffa, (q31_t)0x736f3bee, (q31_t)0x2615d754,\n    (q31_t)0x7376b551, (q31_t)0x260bbd37, (q31_t)0x737e2cb7, (q31_t)0x2601a1a2,\n    (q31_t)0x7385a222, (q31_t)0x25f78497, (q31_t)0x738d1590, (q31_t)0x25ed6614,\n    (q31_t)0x73948701, (q31_t)0x25e3461b, (q31_t)0x739bf675, (q31_t)0x25d924ac,\n    (q31_t)0x73a363ec, (q31_t)0x25cf01c8, (q31_t)0x73aacf65, (q31_t)0x25c4dd6e,\n    (q31_t)0x73b238e0, (q31_t)0x25bab7a0, (q31_t)0x73b9a05d, (q31_t)0x25b0905d,\n    (q31_t)0x73c105db, (q31_t)0x25a667a7, (q31_t)0x73c8695b, (q31_t)0x259c3d7c,\n    (q31_t)0x73cfcadc, (q31_t)0x259211df, (q31_t)0x73d72a5d, (q31_t)0x2587e4cf,\n    (q31_t)0x73de87de, (q31_t)0x257db64c, (q31_t)0x73e5e360, (q31_t)0x25738657,\n    (q31_t)0x73ed3ce1, (q31_t)0x256954f1, (q31_t)0x73f49462, (q31_t)0x255f2219,\n    (q31_t)0x73fbe9e2, (q31_t)0x2554edd1, (q31_t)0x74033d61, (q31_t)0x254ab818,\n    (q31_t)0x740a8edf, (q31_t)0x254080ef, (q31_t)0x7411de5b, (q31_t)0x25364857,\n    (q31_t)0x74192bd5, (q31_t)0x252c0e4f, (q31_t)0x7420774d, (q31_t)0x2521d2d8,\n    (q31_t)0x7427c0c3, (q31_t)0x251795f3, (q31_t)0x742f0836, (q31_t)0x250d57a0,\n    (q31_t)0x74364da6, (q31_t)0x250317df, (q31_t)0x743d9112, (q31_t)0x24f8d6b0,\n    (q31_t)0x7444d27b, (q31_t)0x24ee9415, (q31_t)0x744c11e0, (q31_t)0x24e4500e,\n    (q31_t)0x74534f41, (q31_t)0x24da0a9a, (q31_t)0x745a8a9d, (q31_t)0x24cfc3ba,\n    (q31_t)0x7461c3f5, (q31_t)0x24c57b6f, (q31_t)0x7468fb47, (q31_t)0x24bb31ba,\n    (q31_t)0x74703095, (q31_t)0x24b0e699, (q31_t)0x747763dd, (q31_t)0x24a69a0f,\n    (q31_t)0x747e951f, (q31_t)0x249c4c1b, (q31_t)0x7485c45b, (q31_t)0x2491fcbe,\n    (q31_t)0x748cf190, (q31_t)0x2487abf7, (q31_t)0x74941cbf, (q31_t)0x247d59c8,\n    (q31_t)0x749b45e7, (q31_t)0x24730631, (q31_t)0x74a26d08, (q31_t)0x2468b132,\n    (q31_t)0x74a99221, (q31_t)0x245e5acc, (q31_t)0x74b0b533, (q31_t)0x245402ff,\n    (q31_t)0x74b7d63c, (q31_t)0x2449a9cc, (q31_t)0x74bef53d, (q31_t)0x243f4f32,\n    (q31_t)0x74c61236, (q31_t)0x2434f332, (q31_t)0x74cd2d26, (q31_t)0x242a95ce,\n    (q31_t)0x74d4460c, (q31_t)0x24203704, (q31_t)0x74db5cea, (q31_t)0x2415d6d5,\n    (q31_t)0x74e271bd, (q31_t)0x240b7543, (q31_t)0x74e98487, (q31_t)0x2401124d,\n    (q31_t)0x74f09546, (q31_t)0x23f6adf3, (q31_t)0x74f7a3fb, (q31_t)0x23ec4837,\n    (q31_t)0x74feb0a5, (q31_t)0x23e1e117, (q31_t)0x7505bb44, (q31_t)0x23d77896,\n    (q31_t)0x750cc3d8, (q31_t)0x23cd0eb3, (q31_t)0x7513ca60, (q31_t)0x23c2a36f,\n    (q31_t)0x751acedd, (q31_t)0x23b836ca, (q31_t)0x7521d14d, (q31_t)0x23adc8c4,\n    (q31_t)0x7528d1b1, (q31_t)0x23a3595e, (q31_t)0x752fd008, (q31_t)0x2398e898,\n    (q31_t)0x7536cc52, (q31_t)0x238e7673, (q31_t)0x753dc68f, (q31_t)0x238402ef,\n    (q31_t)0x7544bebf, (q31_t)0x23798e0d, (q31_t)0x754bb4e1, (q31_t)0x236f17cc,\n    (q31_t)0x7552a8f4, (q31_t)0x2364a02e, (q31_t)0x75599afa, (q31_t)0x235a2733,\n    (q31_t)0x75608af1, (q31_t)0x234facda, (q31_t)0x756778d9, (q31_t)0x23453125,\n    (q31_t)0x756e64b2, (q31_t)0x233ab414, (q31_t)0x75754e7c, (q31_t)0x233035a7,\n    (q31_t)0x757c3636, (q31_t)0x2325b5df, (q31_t)0x75831be0, (q31_t)0x231b34bc,\n    (q31_t)0x7589ff7a, (q31_t)0x2310b23e, (q31_t)0x7590e104, (q31_t)0x23062e67,\n    (q31_t)0x7597c07d, (q31_t)0x22fba936, (q31_t)0x759e9de5, (q31_t)0x22f122ab,\n    (q31_t)0x75a5793c, (q31_t)0x22e69ac8, (q31_t)0x75ac5282, (q31_t)0x22dc118c,\n    (q31_t)0x75b329b5, (q31_t)0x22d186f8, (q31_t)0x75b9fed7, (q31_t)0x22c6fb0c,\n    (q31_t)0x75c0d1e7, (q31_t)0x22bc6dca, (q31_t)0x75c7a2e3, (q31_t)0x22b1df30,\n    (q31_t)0x75ce71ce, (q31_t)0x22a74f40, (q31_t)0x75d53ea5, (q31_t)0x229cbdfa,\n    (q31_t)0x75dc0968, (q31_t)0x22922b5e, (q31_t)0x75e2d219, (q31_t)0x2287976e,\n    (q31_t)0x75e998b5, (q31_t)0x227d0228, (q31_t)0x75f05d3d, (q31_t)0x22726b8e,\n    (q31_t)0x75f71fb1, (q31_t)0x2267d3a0, (q31_t)0x75fde011, (q31_t)0x225d3a5e,\n    (q31_t)0x76049e5b, (q31_t)0x22529fca, (q31_t)0x760b5a90, (q31_t)0x224803e2,\n    (q31_t)0x761214b0, (q31_t)0x223d66a8, (q31_t)0x7618ccba, (q31_t)0x2232c81c,\n    (q31_t)0x761f82af, (q31_t)0x2228283f, (q31_t)0x7626368d, (q31_t)0x221d8711,\n    (q31_t)0x762ce855, (q31_t)0x2212e492, (q31_t)0x76339806, (q31_t)0x220840c2,\n    (q31_t)0x763a45a0, (q31_t)0x21fd9ba3, (q31_t)0x7640f123, (q31_t)0x21f2f534,\n    (q31_t)0x76479a8e, (q31_t)0x21e84d76, (q31_t)0x764e41e2, (q31_t)0x21dda46a,\n    (q31_t)0x7654e71d, (q31_t)0x21d2fa0f, (q31_t)0x765b8a41, (q31_t)0x21c84e67,\n    (q31_t)0x76622b4c, (q31_t)0x21bda171, (q31_t)0x7668ca3e, (q31_t)0x21b2f32e,\n    (q31_t)0x766f6717, (q31_t)0x21a8439e, (q31_t)0x767601d7, (q31_t)0x219d92c2,\n    (q31_t)0x767c9a7e, (q31_t)0x2192e09b, (q31_t)0x7683310b, (q31_t)0x21882d28,\n    (q31_t)0x7689c57d, (q31_t)0x217d786a, (q31_t)0x769057d6, (q31_t)0x2172c262,\n    (q31_t)0x7696e814, (q31_t)0x21680b0f, (q31_t)0x769d7637, (q31_t)0x215d5273,\n    (q31_t)0x76a4023f, (q31_t)0x2152988d, (q31_t)0x76aa8c2c, (q31_t)0x2147dd5f,\n    (q31_t)0x76b113fd, (q31_t)0x213d20e8, (q31_t)0x76b799b3, (q31_t)0x21326329,\n    (q31_t)0x76be1d4c, (q31_t)0x2127a423, (q31_t)0x76c49ec9, (q31_t)0x211ce3d5,\n    (q31_t)0x76cb1e2a, (q31_t)0x21122240, (q31_t)0x76d19b6e, (q31_t)0x21075f65,\n    (q31_t)0x76d81695, (q31_t)0x20fc9b44, (q31_t)0x76de8f9e, (q31_t)0x20f1d5de,\n    (q31_t)0x76e5068a, (q31_t)0x20e70f32, (q31_t)0x76eb7b58, (q31_t)0x20dc4742,\n    (q31_t)0x76f1ee09, (q31_t)0x20d17e0d, (q31_t)0x76f85e9a, (q31_t)0x20c6b395,\n    (q31_t)0x76fecd0e, (q31_t)0x20bbe7d8, (q31_t)0x77053962, (q31_t)0x20b11ad9,\n    (q31_t)0x770ba398, (q31_t)0x20a64c97, (q31_t)0x77120bae, (q31_t)0x209b7d13,\n    (q31_t)0x771871a5, (q31_t)0x2090ac4d, (q31_t)0x771ed57c, (q31_t)0x2085da46,\n    (q31_t)0x77253733, (q31_t)0x207b06fe, (q31_t)0x772b96ca, (q31_t)0x20703275,\n    (q31_t)0x7731f440, (q31_t)0x20655cac, (q31_t)0x77384f95, (q31_t)0x205a85a3,\n    (q31_t)0x773ea8ca, (q31_t)0x204fad5b, (q31_t)0x7744ffdd, (q31_t)0x2044d3d4,\n    (q31_t)0x774b54ce, (q31_t)0x2039f90f, (q31_t)0x7751a79e, (q31_t)0x202f1d0b,\n    (q31_t)0x7757f84c, (q31_t)0x20243fca, (q31_t)0x775e46d8, (q31_t)0x2019614c,\n    (q31_t)0x77649341, (q31_t)0x200e8190, (q31_t)0x776add88, (q31_t)0x2003a099,\n    (q31_t)0x777125ac, (q31_t)0x1ff8be65, (q31_t)0x77776bac, (q31_t)0x1feddaf6,\n    (q31_t)0x777daf89, (q31_t)0x1fe2f64c, (q31_t)0x7783f143, (q31_t)0x1fd81067,\n    (q31_t)0x778a30d8, (q31_t)0x1fcd2948, (q31_t)0x77906e49, (q31_t)0x1fc240ef,\n    (q31_t)0x7796a996, (q31_t)0x1fb7575c, (q31_t)0x779ce2be, (q31_t)0x1fac6c91,\n    (q31_t)0x77a319c2, (q31_t)0x1fa1808c, (q31_t)0x77a94ea0, (q31_t)0x1f969350,\n    (q31_t)0x77af8159, (q31_t)0x1f8ba4dc, (q31_t)0x77b5b1ec, (q31_t)0x1f80b531,\n    (q31_t)0x77bbe05a, (q31_t)0x1f75c44e, (q31_t)0x77c20ca1, (q31_t)0x1f6ad235,\n    (q31_t)0x77c836c2, (q31_t)0x1f5fdee6, (q31_t)0x77ce5ebd, (q31_t)0x1f54ea62,\n    (q31_t)0x77d48490, (q31_t)0x1f49f4a8, (q31_t)0x77daa83d, (q31_t)0x1f3efdb9,\n    (q31_t)0x77e0c9c3, (q31_t)0x1f340596, (q31_t)0x77e6e921, (q31_t)0x1f290c3f,\n    (q31_t)0x77ed0657, (q31_t)0x1f1e11b5, (q31_t)0x77f32165, (q31_t)0x1f1315f7,\n    (q31_t)0x77f93a4b, (q31_t)0x1f081907, (q31_t)0x77ff5109, (q31_t)0x1efd1ae4,\n    (q31_t)0x7805659e, (q31_t)0x1ef21b90, (q31_t)0x780b780a, (q31_t)0x1ee71b0a,\n    (q31_t)0x7811884d, (q31_t)0x1edc1953, (q31_t)0x78179666, (q31_t)0x1ed1166b,\n    (q31_t)0x781da256, (q31_t)0x1ec61254, (q31_t)0x7823ac1d, (q31_t)0x1ebb0d0d,\n    (q31_t)0x7829b3b9, (q31_t)0x1eb00696, (q31_t)0x782fb92a, (q31_t)0x1ea4fef0,\n    (q31_t)0x7835bc71, (q31_t)0x1e99f61d, (q31_t)0x783bbd8e, (q31_t)0x1e8eec1b,\n    (q31_t)0x7841bc7f, (q31_t)0x1e83e0eb, (q31_t)0x7847b946, (q31_t)0x1e78d48e,\n    (q31_t)0x784db3e0, (q31_t)0x1e6dc705, (q31_t)0x7853ac4f, (q31_t)0x1e62b84f,\n    (q31_t)0x7859a292, (q31_t)0x1e57a86d, (q31_t)0x785f96a9, (q31_t)0x1e4c9760,\n    (q31_t)0x78658894, (q31_t)0x1e418528, (q31_t)0x786b7852, (q31_t)0x1e3671c5,\n    (q31_t)0x787165e3, (q31_t)0x1e2b5d38, (q31_t)0x78775147, (q31_t)0x1e204781,\n    (q31_t)0x787d3a7e, (q31_t)0x1e1530a1, (q31_t)0x78832187, (q31_t)0x1e0a1898,\n    (q31_t)0x78890663, (q31_t)0x1dfeff67, (q31_t)0x788ee910, (q31_t)0x1df3e50d,\n    (q31_t)0x7894c98f, (q31_t)0x1de8c98c, (q31_t)0x789aa7e0, (q31_t)0x1dddace4,\n    (q31_t)0x78a08402, (q31_t)0x1dd28f15, (q31_t)0x78a65df6, (q31_t)0x1dc7701f,\n    (q31_t)0x78ac35ba, (q31_t)0x1dbc5004, (q31_t)0x78b20b4f, (q31_t)0x1db12ec3,\n    (q31_t)0x78b7deb4, (q31_t)0x1da60c5d, (q31_t)0x78bdafea, (q31_t)0x1d9ae8d2,\n    (q31_t)0x78c37eef, (q31_t)0x1d8fc424, (q31_t)0x78c94bc4, (q31_t)0x1d849e51,\n    (q31_t)0x78cf1669, (q31_t)0x1d79775c, (q31_t)0x78d4dedd, (q31_t)0x1d6e4f43,\n    (q31_t)0x78daa520, (q31_t)0x1d632608, (q31_t)0x78e06932, (q31_t)0x1d57fbaa,\n    (q31_t)0x78e62b13, (q31_t)0x1d4cd02c, (q31_t)0x78ebeac2, (q31_t)0x1d41a38c,\n    (q31_t)0x78f1a840, (q31_t)0x1d3675cb, (q31_t)0x78f7638b, (q31_t)0x1d2b46ea,\n    (q31_t)0x78fd1ca4, (q31_t)0x1d2016e9, (q31_t)0x7902d38b, (q31_t)0x1d14e5c9,\n    (q31_t)0x7908883f, (q31_t)0x1d09b389, (q31_t)0x790e3ac0, (q31_t)0x1cfe802b,\n    (q31_t)0x7913eb0e, (q31_t)0x1cf34baf, (q31_t)0x79199929, (q31_t)0x1ce81615,\n    (q31_t)0x791f4510, (q31_t)0x1cdcdf5e, (q31_t)0x7924eec3, (q31_t)0x1cd1a78a,\n    (q31_t)0x792a9642, (q31_t)0x1cc66e99, (q31_t)0x79303b8e, (q31_t)0x1cbb348d,\n    (q31_t)0x7935dea4, (q31_t)0x1caff965, (q31_t)0x793b7f86, (q31_t)0x1ca4bd21,\n    (q31_t)0x79411e33, (q31_t)0x1c997fc4, (q31_t)0x7946baac, (q31_t)0x1c8e414b,\n    (q31_t)0x794c54ee, (q31_t)0x1c8301b9, (q31_t)0x7951ecfc, (q31_t)0x1c77c10e,\n    (q31_t)0x795782d3, (q31_t)0x1c6c7f4a, (q31_t)0x795d1675, (q31_t)0x1c613c6d,\n    (q31_t)0x7962a7e0, (q31_t)0x1c55f878, (q31_t)0x79683715, (q31_t)0x1c4ab36b,\n    (q31_t)0x796dc414, (q31_t)0x1c3f6d47, (q31_t)0x79734edc, (q31_t)0x1c34260c,\n    (q31_t)0x7978d76c, (q31_t)0x1c28ddbb, (q31_t)0x797e5dc6, (q31_t)0x1c1d9454,\n    (q31_t)0x7983e1e8, (q31_t)0x1c1249d8, (q31_t)0x798963d2, (q31_t)0x1c06fe46,\n    (q31_t)0x798ee385, (q31_t)0x1bfbb1a0, (q31_t)0x799460ff, (q31_t)0x1bf063e6,\n    (q31_t)0x7999dc42, (q31_t)0x1be51518, (q31_t)0x799f554b, (q31_t)0x1bd9c537,\n    (q31_t)0x79a4cc1c, (q31_t)0x1bce7442, (q31_t)0x79aa40b4, (q31_t)0x1bc3223c,\n    (q31_t)0x79afb313, (q31_t)0x1bb7cf23, (q31_t)0x79b52339, (q31_t)0x1bac7af9,\n    (q31_t)0x79ba9125, (q31_t)0x1ba125bd, (q31_t)0x79bffcd7, (q31_t)0x1b95cf71,\n    (q31_t)0x79c5664f, (q31_t)0x1b8a7815, (q31_t)0x79cacd8d, (q31_t)0x1b7f1fa9,\n    (q31_t)0x79d03291, (q31_t)0x1b73c62d, (q31_t)0x79d5955a, (q31_t)0x1b686ba3,\n    (q31_t)0x79daf5e8, (q31_t)0x1b5d100a, (q31_t)0x79e0543c, (q31_t)0x1b51b363,\n    (q31_t)0x79e5b054, (q31_t)0x1b4655ae, (q31_t)0x79eb0a31, (q31_t)0x1b3af6ec,\n    (q31_t)0x79f061d2, (q31_t)0x1b2f971e, (q31_t)0x79f5b737, (q31_t)0x1b243643,\n    (q31_t)0x79fb0a60, (q31_t)0x1b18d45c, (q31_t)0x7a005b4d, (q31_t)0x1b0d716a,\n    (q31_t)0x7a05a9fd, (q31_t)0x1b020d6c, (q31_t)0x7a0af671, (q31_t)0x1af6a865,\n    (q31_t)0x7a1040a8, (q31_t)0x1aeb4253, (q31_t)0x7a1588a2, (q31_t)0x1adfdb37,\n    (q31_t)0x7a1ace5f, (q31_t)0x1ad47312, (q31_t)0x7a2011de, (q31_t)0x1ac909e5,\n    (q31_t)0x7a25531f, (q31_t)0x1abd9faf, (q31_t)0x7a2a9223, (q31_t)0x1ab23471,\n    (q31_t)0x7a2fcee8, (q31_t)0x1aa6c82b, (q31_t)0x7a350970, (q31_t)0x1a9b5adf,\n    (q31_t)0x7a3a41b9, (q31_t)0x1a8fec8c, (q31_t)0x7a3f77c3, (q31_t)0x1a847d33,\n    (q31_t)0x7a44ab8e, (q31_t)0x1a790cd4, (q31_t)0x7a49dd1a, (q31_t)0x1a6d9b70,\n    (q31_t)0x7a4f0c67, (q31_t)0x1a622907, (q31_t)0x7a543974, (q31_t)0x1a56b599,\n    (q31_t)0x7a596442, (q31_t)0x1a4b4128, (q31_t)0x7a5e8cd0, (q31_t)0x1a3fcbb3,\n    (q31_t)0x7a63b31d, (q31_t)0x1a34553b, (q31_t)0x7a68d72b, (q31_t)0x1a28ddc0,\n    (q31_t)0x7a6df8f8, (q31_t)0x1a1d6544, (q31_t)0x7a731884, (q31_t)0x1a11ebc5,\n    (q31_t)0x7a7835cf, (q31_t)0x1a067145, (q31_t)0x7a7d50da, (q31_t)0x19faf5c5,\n    (q31_t)0x7a8269a3, (q31_t)0x19ef7944, (q31_t)0x7a87802a, (q31_t)0x19e3fbc3,\n    (q31_t)0x7a8c9470, (q31_t)0x19d87d42, (q31_t)0x7a91a674, (q31_t)0x19ccfdc2,\n    (q31_t)0x7a96b636, (q31_t)0x19c17d44, (q31_t)0x7a9bc3b6, (q31_t)0x19b5fbc8,\n    (q31_t)0x7aa0cef3, (q31_t)0x19aa794d, (q31_t)0x7aa5d7ee, (q31_t)0x199ef5d6,\n    (q31_t)0x7aaadea6, (q31_t)0x19937161, (q31_t)0x7aafe31b, (q31_t)0x1987ebf0,\n    (q31_t)0x7ab4e54c, (q31_t)0x197c6584, (q31_t)0x7ab9e53a, (q31_t)0x1970de1b,\n    (q31_t)0x7abee2e5, (q31_t)0x196555b8, (q31_t)0x7ac3de4c, (q31_t)0x1959cc5a,\n    (q31_t)0x7ac8d76f, (q31_t)0x194e4201, (q31_t)0x7acdce4d, (q31_t)0x1942b6af,\n    (q31_t)0x7ad2c2e8, (q31_t)0x19372a64, (q31_t)0x7ad7b53d, (q31_t)0x192b9d1f,\n    (q31_t)0x7adca54e, (q31_t)0x19200ee3, (q31_t)0x7ae1931a, (q31_t)0x19147fae,\n    (q31_t)0x7ae67ea1, (q31_t)0x1908ef82, (q31_t)0x7aeb67e3, (q31_t)0x18fd5e5f,\n    (q31_t)0x7af04edf, (q31_t)0x18f1cc45, (q31_t)0x7af53395, (q31_t)0x18e63935,\n    (q31_t)0x7afa1605, (q31_t)0x18daa52f, (q31_t)0x7afef630, (q31_t)0x18cf1034,\n    (q31_t)0x7b03d414, (q31_t)0x18c37a44, (q31_t)0x7b08afb2, (q31_t)0x18b7e35f,\n    (q31_t)0x7b0d8909, (q31_t)0x18ac4b87, (q31_t)0x7b126019, (q31_t)0x18a0b2bb,\n    (q31_t)0x7b1734e2, (q31_t)0x189518fc, (q31_t)0x7b1c0764, (q31_t)0x18897e4a,\n    (q31_t)0x7b20d79e, (q31_t)0x187de2a7, (q31_t)0x7b25a591, (q31_t)0x18724611,\n    (q31_t)0x7b2a713d, (q31_t)0x1866a88a, (q31_t)0x7b2f3aa0, (q31_t)0x185b0a13,\n    (q31_t)0x7b3401bb, (q31_t)0x184f6aab, (q31_t)0x7b38c68e, (q31_t)0x1843ca53,\n    (q31_t)0x7b3d8918, (q31_t)0x1838290c, (q31_t)0x7b42495a, (q31_t)0x182c86d5,\n    (q31_t)0x7b470753, (q31_t)0x1820e3b0, (q31_t)0x7b4bc303, (q31_t)0x18153f9d,\n    (q31_t)0x7b507c69, (q31_t)0x18099a9c, (q31_t)0x7b553386, (q31_t)0x17fdf4ae,\n    (q31_t)0x7b59e85a, (q31_t)0x17f24dd3, (q31_t)0x7b5e9ae4, (q31_t)0x17e6a60c,\n    (q31_t)0x7b634b23, (q31_t)0x17dafd59, (q31_t)0x7b67f919, (q31_t)0x17cf53bb,\n    (q31_t)0x7b6ca4c4, (q31_t)0x17c3a931, (q31_t)0x7b714e25, (q31_t)0x17b7fdbd,\n    (q31_t)0x7b75f53c, (q31_t)0x17ac515f, (q31_t)0x7b7a9a07, (q31_t)0x17a0a417,\n    (q31_t)0x7b7f3c87, (q31_t)0x1794f5e6, (q31_t)0x7b83dcbc, (q31_t)0x178946cc,\n    (q31_t)0x7b887aa6, (q31_t)0x177d96ca, (q31_t)0x7b8d1644, (q31_t)0x1771e5e0,\n    (q31_t)0x7b91af97, (q31_t)0x1766340f, (q31_t)0x7b96469d, (q31_t)0x175a8157,\n    (q31_t)0x7b9adb57, (q31_t)0x174ecdb8, (q31_t)0x7b9f6dc5, (q31_t)0x17431933,\n    (q31_t)0x7ba3fde7, (q31_t)0x173763c9, (q31_t)0x7ba88bbc, (q31_t)0x172bad7a,\n    (q31_t)0x7bad1744, (q31_t)0x171ff646, (q31_t)0x7bb1a080, (q31_t)0x17143e2d,\n    (q31_t)0x7bb6276e, (q31_t)0x17088531, (q31_t)0x7bbaac0e, (q31_t)0x16fccb51,\n    (q31_t)0x7bbf2e62, (q31_t)0x16f1108f, (q31_t)0x7bc3ae67, (q31_t)0x16e554ea,\n    (q31_t)0x7bc82c1f, (q31_t)0x16d99864, (q31_t)0x7bcca789, (q31_t)0x16cddafb,\n    (q31_t)0x7bd120a4, (q31_t)0x16c21cb2, (q31_t)0x7bd59771, (q31_t)0x16b65d88,\n    (q31_t)0x7bda0bf0, (q31_t)0x16aa9d7e, (q31_t)0x7bde7e20, (q31_t)0x169edc94,\n    (q31_t)0x7be2ee01, (q31_t)0x16931acb, (q31_t)0x7be75b93, (q31_t)0x16875823,\n    (q31_t)0x7bebc6d5, (q31_t)0x167b949d, (q31_t)0x7bf02fc9, (q31_t)0x166fd039,\n    (q31_t)0x7bf4966c, (q31_t)0x16640af7, (q31_t)0x7bf8fac0, (q31_t)0x165844d8,\n    (q31_t)0x7bfd5cc4, (q31_t)0x164c7ddd, (q31_t)0x7c01bc78, (q31_t)0x1640b606,\n    (q31_t)0x7c0619dc, (q31_t)0x1634ed53, (q31_t)0x7c0a74f0, (q31_t)0x162923c5,\n    (q31_t)0x7c0ecdb2, (q31_t)0x161d595d, (q31_t)0x7c132424, (q31_t)0x16118e1a,\n    (q31_t)0x7c177845, (q31_t)0x1605c1fd, (q31_t)0x7c1bca16, (q31_t)0x15f9f507,\n    (q31_t)0x7c201994, (q31_t)0x15ee2738, (q31_t)0x7c2466c2, (q31_t)0x15e25890,\n    (q31_t)0x7c28b19e, (q31_t)0x15d68911, (q31_t)0x7c2cfa28, (q31_t)0x15cab8ba,\n    (q31_t)0x7c314060, (q31_t)0x15bee78c, (q31_t)0x7c358446, (q31_t)0x15b31587,\n    (q31_t)0x7c39c5da, (q31_t)0x15a742ac, (q31_t)0x7c3e051b, (q31_t)0x159b6efb,\n    (q31_t)0x7c42420a, (q31_t)0x158f9a76, (q31_t)0x7c467ca6, (q31_t)0x1583c51b,\n    (q31_t)0x7c4ab4ef, (q31_t)0x1577eeec, (q31_t)0x7c4eeae5, (q31_t)0x156c17e9,\n    (q31_t)0x7c531e88, (q31_t)0x15604013, (q31_t)0x7c574fd8, (q31_t)0x1554676a,\n    (q31_t)0x7c5b7ed4, (q31_t)0x15488dee, (q31_t)0x7c5fab7c, (q31_t)0x153cb3a0,\n    (q31_t)0x7c63d5d1, (q31_t)0x1530d881, (q31_t)0x7c67fdd1, (q31_t)0x1524fc90,\n    (q31_t)0x7c6c237e, (q31_t)0x15191fcf, (q31_t)0x7c7046d6, (q31_t)0x150d423d,\n    (q31_t)0x7c7467d9, (q31_t)0x150163dc, (q31_t)0x7c788688, (q31_t)0x14f584ac,\n    (q31_t)0x7c7ca2e2, (q31_t)0x14e9a4ac, (q31_t)0x7c80bce7, (q31_t)0x14ddc3de,\n    (q31_t)0x7c84d496, (q31_t)0x14d1e242, (q31_t)0x7c88e9f1, (q31_t)0x14c5ffd9,\n    (q31_t)0x7c8cfcf6, (q31_t)0x14ba1ca3, (q31_t)0x7c910da5, (q31_t)0x14ae38a0,\n    (q31_t)0x7c951bff, (q31_t)0x14a253d1, (q31_t)0x7c992803, (q31_t)0x14966e36,\n    (q31_t)0x7c9d31b0, (q31_t)0x148a87d1, (q31_t)0x7ca13908, (q31_t)0x147ea0a0,\n    (q31_t)0x7ca53e09, (q31_t)0x1472b8a5, (q31_t)0x7ca940b3, (q31_t)0x1466cfe1,\n    (q31_t)0x7cad4107, (q31_t)0x145ae653, (q31_t)0x7cb13f04, (q31_t)0x144efbfc,\n    (q31_t)0x7cb53aaa, (q31_t)0x144310dd, (q31_t)0x7cb933f9, (q31_t)0x143724f5,\n    (q31_t)0x7cbd2af0, (q31_t)0x142b3846, (q31_t)0x7cc11f90, (q31_t)0x141f4ad1,\n    (q31_t)0x7cc511d9, (q31_t)0x14135c94, (q31_t)0x7cc901c9, (q31_t)0x14076d91,\n    (q31_t)0x7cccef62, (q31_t)0x13fb7dc9, (q31_t)0x7cd0daa2, (q31_t)0x13ef8d3c,\n    (q31_t)0x7cd4c38b, (q31_t)0x13e39be9, (q31_t)0x7cd8aa1b, (q31_t)0x13d7a9d3,\n    (q31_t)0x7cdc8e52, (q31_t)0x13cbb6f8, (q31_t)0x7ce07031, (q31_t)0x13bfc35b,\n    (q31_t)0x7ce44fb7, (q31_t)0x13b3cefa, (q31_t)0x7ce82ce4, (q31_t)0x13a7d9d7,\n    (q31_t)0x7cec07b8, (q31_t)0x139be3f2, (q31_t)0x7cefe032, (q31_t)0x138fed4b,\n    (q31_t)0x7cf3b653, (q31_t)0x1383f5e3, (q31_t)0x7cf78a1b, (q31_t)0x1377fdbb,\n    (q31_t)0x7cfb5b89, (q31_t)0x136c04d2, (q31_t)0x7cff2a9d, (q31_t)0x13600b2a,\n    (q31_t)0x7d02f757, (q31_t)0x135410c3, (q31_t)0x7d06c1b6, (q31_t)0x1348159d,\n    (q31_t)0x7d0a89bc, (q31_t)0x133c19b8, (q31_t)0x7d0e4f67, (q31_t)0x13301d16,\n    (q31_t)0x7d1212b7, (q31_t)0x13241fb6, (q31_t)0x7d15d3ad, (q31_t)0x1318219a,\n    (q31_t)0x7d199248, (q31_t)0x130c22c1, (q31_t)0x7d1d4e88, (q31_t)0x1300232c,\n    (q31_t)0x7d21086c, (q31_t)0x12f422db, (q31_t)0x7d24bff6, (q31_t)0x12e821cf,\n    (q31_t)0x7d287523, (q31_t)0x12dc2009, (q31_t)0x7d2c27f6, (q31_t)0x12d01d89,\n    (q31_t)0x7d2fd86c, (q31_t)0x12c41a4f, (q31_t)0x7d338687, (q31_t)0x12b8165b,\n    (q31_t)0x7d373245, (q31_t)0x12ac11af, (q31_t)0x7d3adba7, (q31_t)0x12a00c4b,\n    (q31_t)0x7d3e82ae, (q31_t)0x1294062f, (q31_t)0x7d422757, (q31_t)0x1287ff5b,\n    (q31_t)0x7d45c9a4, (q31_t)0x127bf7d1, (q31_t)0x7d496994, (q31_t)0x126fef90,\n    (q31_t)0x7d4d0728, (q31_t)0x1263e699, (q31_t)0x7d50a25e, (q31_t)0x1257dced,\n    (q31_t)0x7d543b37, (q31_t)0x124bd28c, (q31_t)0x7d57d1b3, (q31_t)0x123fc776,\n    (q31_t)0x7d5b65d2, (q31_t)0x1233bbac, (q31_t)0x7d5ef793, (q31_t)0x1227af2e,\n    (q31_t)0x7d6286f6, (q31_t)0x121ba1fd, (q31_t)0x7d6613fb, (q31_t)0x120f941a,\n    (q31_t)0x7d699ea3, (q31_t)0x12038584, (q31_t)0x7d6d26ec, (q31_t)0x11f7763c,\n    (q31_t)0x7d70acd7, (q31_t)0x11eb6643, (q31_t)0x7d743064, (q31_t)0x11df5599,\n    (q31_t)0x7d77b192, (q31_t)0x11d3443f, (q31_t)0x7d7b3061, (q31_t)0x11c73235,\n    (q31_t)0x7d7eacd2, (q31_t)0x11bb1f7c, (q31_t)0x7d8226e4, (q31_t)0x11af0c13,\n    (q31_t)0x7d859e96, (q31_t)0x11a2f7fc, (q31_t)0x7d8913ea, (q31_t)0x1196e337,\n    (q31_t)0x7d8c86de, (q31_t)0x118acdc4, (q31_t)0x7d8ff772, (q31_t)0x117eb7a4,\n    (q31_t)0x7d9365a8, (q31_t)0x1172a0d7, (q31_t)0x7d96d17d, (q31_t)0x1166895f,\n    (q31_t)0x7d9a3af2, (q31_t)0x115a713a, (q31_t)0x7d9da208, (q31_t)0x114e586a,\n    (q31_t)0x7da106bd, (q31_t)0x11423ef0, (q31_t)0x7da46912, (q31_t)0x113624cb,\n    (q31_t)0x7da7c907, (q31_t)0x112a09fc, (q31_t)0x7dab269b, (q31_t)0x111dee84,\n    (q31_t)0x7dae81cf, (q31_t)0x1111d263, (q31_t)0x7db1daa2, (q31_t)0x1105b599,\n    (q31_t)0x7db53113, (q31_t)0x10f99827, (q31_t)0x7db88524, (q31_t)0x10ed7a0e,\n    (q31_t)0x7dbbd6d4, (q31_t)0x10e15b4e, (q31_t)0x7dbf2622, (q31_t)0x10d53be7,\n    (q31_t)0x7dc2730f, (q31_t)0x10c91bda, (q31_t)0x7dc5bd9b, (q31_t)0x10bcfb28,\n    (q31_t)0x7dc905c5, (q31_t)0x10b0d9d0, (q31_t)0x7dcc4b8d, (q31_t)0x10a4b7d3,\n    (q31_t)0x7dcf8ef3, (q31_t)0x10989532, (q31_t)0x7dd2cff7, (q31_t)0x108c71ee,\n    (q31_t)0x7dd60e99, (q31_t)0x10804e06, (q31_t)0x7dd94ad8, (q31_t)0x1074297b,\n    (q31_t)0x7ddc84b5, (q31_t)0x1068044e, (q31_t)0x7ddfbc30, (q31_t)0x105bde7f,\n    (q31_t)0x7de2f148, (q31_t)0x104fb80e, (q31_t)0x7de623fd, (q31_t)0x104390fd,\n    (q31_t)0x7de9544f, (q31_t)0x1037694b, (q31_t)0x7dec823e, (q31_t)0x102b40f8,\n    (q31_t)0x7defadca, (q31_t)0x101f1807, (q31_t)0x7df2d6f3, (q31_t)0x1012ee76,\n    (q31_t)0x7df5fdb8, (q31_t)0x1006c446, (q31_t)0x7df9221a, (q31_t)0xffa9979,\n    (q31_t)0x7dfc4418, (q31_t)0xfee6e0d,  (q31_t)0x7dff63b2, (q31_t)0xfe24205,\n    (q31_t)0x7e0280e9, (q31_t)0xfd6155f,  (q31_t)0x7e059bbb, (q31_t)0xfc9e81e,\n    (q31_t)0x7e08b42a, (q31_t)0xfbdba40,  (q31_t)0x7e0bca34, (q31_t)0xfb18bc8,\n    (q31_t)0x7e0eddd9, (q31_t)0xfa55cb4,  (q31_t)0x7e11ef1b, (q31_t)0xf992d06,\n    (q31_t)0x7e14fdf7, (q31_t)0xf8cfcbe,  (q31_t)0x7e180a6f, (q31_t)0xf80cbdc,\n    (q31_t)0x7e1b1482, (q31_t)0xf749a61,  (q31_t)0x7e1e1c30, (q31_t)0xf68684e,\n    (q31_t)0x7e212179, (q31_t)0xf5c35a3,  (q31_t)0x7e24245d, (q31_t)0xf500260,\n    (q31_t)0x7e2724db, (q31_t)0xf43ce86,  (q31_t)0x7e2a22f4, (q31_t)0xf379a16,\n    (q31_t)0x7e2d1ea8, (q31_t)0xf2b650f,  (q31_t)0x7e3017f6, (q31_t)0xf1f2f73,\n    (q31_t)0x7e330ede, (q31_t)0xf12f941,  (q31_t)0x7e360360, (q31_t)0xf06c27a,\n    (q31_t)0x7e38f57c, (q31_t)0xefa8b20,  (q31_t)0x7e3be532, (q31_t)0xeee5331,\n    (q31_t)0x7e3ed282, (q31_t)0xee21aaf,  (q31_t)0x7e41bd6c, (q31_t)0xed5e19a,\n    (q31_t)0x7e44a5ef, (q31_t)0xec9a7f3,  (q31_t)0x7e478c0b, (q31_t)0xebd6db9,\n    (q31_t)0x7e4a6fc1, (q31_t)0xeb132ef,  (q31_t)0x7e4d5110, (q31_t)0xea4f793,\n    (q31_t)0x7e502ff9, (q31_t)0xe98bba7,  (q31_t)0x7e530c7a, (q31_t)0xe8c7f2a,\n    (q31_t)0x7e55e694, (q31_t)0xe80421e,  (q31_t)0x7e58be47, (q31_t)0xe740483,\n    (q31_t)0x7e5b9392, (q31_t)0xe67c65a,  (q31_t)0x7e5e6676, (q31_t)0xe5b87a2,\n    (q31_t)0x7e6136f3, (q31_t)0xe4f485c,  (q31_t)0x7e640507, (q31_t)0xe430889,\n    (q31_t)0x7e66d0b4, (q31_t)0xe36c82a,  (q31_t)0x7e6999fa, (q31_t)0xe2a873e,\n    (q31_t)0x7e6c60d7, (q31_t)0xe1e45c6,  (q31_t)0x7e6f254c, (q31_t)0xe1203c3,\n    (q31_t)0x7e71e759, (q31_t)0xe05c135,  (q31_t)0x7e74a6fd, (q31_t)0xdf97e1d,\n    (q31_t)0x7e77643a, (q31_t)0xded3a7b,  (q31_t)0x7e7a1f0d, (q31_t)0xde0f64f,\n    (q31_t)0x7e7cd778, (q31_t)0xdd4b19a,  (q31_t)0x7e7f8d7b, (q31_t)0xdc86c5d,\n    (q31_t)0x7e824114, (q31_t)0xdbc2698,  (q31_t)0x7e84f245, (q31_t)0xdafe04b,\n    (q31_t)0x7e87a10c, (q31_t)0xda39978,  (q31_t)0x7e8a4d6a, (q31_t)0xd97521d,\n    (q31_t)0x7e8cf75f, (q31_t)0xd8b0a3d,  (q31_t)0x7e8f9eeb, (q31_t)0xd7ec1d6,\n    (q31_t)0x7e92440d, (q31_t)0xd7278eb,  (q31_t)0x7e94e6c6, (q31_t)0xd662f7b,\n    (q31_t)0x7e978715, (q31_t)0xd59e586,  (q31_t)0x7e9a24fb, (q31_t)0xd4d9b0e,\n    (q31_t)0x7e9cc076, (q31_t)0xd415013,  (q31_t)0x7e9f5988, (q31_t)0xd350495,\n    (q31_t)0x7ea1f02f, (q31_t)0xd28b894,  (q31_t)0x7ea4846c, (q31_t)0xd1c6c11,\n    (q31_t)0x7ea7163f, (q31_t)0xd101f0e,  (q31_t)0x7ea9a5a8, (q31_t)0xd03d189,\n    (q31_t)0x7eac32a6, (q31_t)0xcf78383,  (q31_t)0x7eaebd3a, (q31_t)0xceb34fe,\n    (q31_t)0x7eb14563, (q31_t)0xcdee5f9,  (q31_t)0x7eb3cb21, (q31_t)0xcd29676,\n    (q31_t)0x7eb64e75, (q31_t)0xcc64673,  (q31_t)0x7eb8cf5d, (q31_t)0xcb9f5f3,\n    (q31_t)0x7ebb4ddb, (q31_t)0xcada4f5,  (q31_t)0x7ebdc9ed, (q31_t)0xca1537a,\n    (q31_t)0x7ec04394, (q31_t)0xc950182,  (q31_t)0x7ec2bad0, (q31_t)0xc88af0e,\n    (q31_t)0x7ec52fa0, (q31_t)0xc7c5c1e,  (q31_t)0x7ec7a205, (q31_t)0xc7008b3,\n    (q31_t)0x7eca11fe, (q31_t)0xc63b4ce,  (q31_t)0x7ecc7f8b, (q31_t)0xc57606e,\n    (q31_t)0x7eceeaad, (q31_t)0xc4b0b94,  (q31_t)0x7ed15363, (q31_t)0xc3eb641,\n    (q31_t)0x7ed3b9ad, (q31_t)0xc326075,  (q31_t)0x7ed61d8a, (q31_t)0xc260a31,\n    (q31_t)0x7ed87efc, (q31_t)0xc19b374,  (q31_t)0x7edade01, (q31_t)0xc0d5c41,\n    (q31_t)0x7edd3a9a, (q31_t)0xc010496,  (q31_t)0x7edf94c7, (q31_t)0xbf4ac75,\n    (q31_t)0x7ee1ec87, (q31_t)0xbe853de,  (q31_t)0x7ee441da, (q31_t)0xbdbfad1,\n    (q31_t)0x7ee694c1, (q31_t)0xbcfa150,  (q31_t)0x7ee8e53a, (q31_t)0xbc34759,\n    (q31_t)0x7eeb3347, (q31_t)0xbb6ecef,  (q31_t)0x7eed7ee7, (q31_t)0xbaa9211,\n    (q31_t)0x7eefc81a, (q31_t)0xb9e36c0,  (q31_t)0x7ef20ee0, (q31_t)0xb91dafc,\n    (q31_t)0x7ef45338, (q31_t)0xb857ec7,  (q31_t)0x7ef69523, (q31_t)0xb79221f,\n    (q31_t)0x7ef8d4a1, (q31_t)0xb6cc506,  (q31_t)0x7efb11b1, (q31_t)0xb60677c,\n    (q31_t)0x7efd4c54, (q31_t)0xb540982,  (q31_t)0x7eff8489, (q31_t)0xb47ab19,\n    (q31_t)0x7f01ba50, (q31_t)0xb3b4c40,  (q31_t)0x7f03eda9, (q31_t)0xb2eecf8,\n    (q31_t)0x7f061e95, (q31_t)0xb228d42,  (q31_t)0x7f084d12, (q31_t)0xb162d1d,\n    (q31_t)0x7f0a7921, (q31_t)0xb09cc8c,  (q31_t)0x7f0ca2c2, (q31_t)0xafd6b8d,\n    (q31_t)0x7f0ec9f5, (q31_t)0xaf10a22,  (q31_t)0x7f10eeb9, (q31_t)0xae4a84b,\n    (q31_t)0x7f13110f, (q31_t)0xad84609,  (q31_t)0x7f1530f7, (q31_t)0xacbe35b,\n    (q31_t)0x7f174e70, (q31_t)0xabf8043,  (q31_t)0x7f19697a, (q31_t)0xab31cc1,\n    (q31_t)0x7f1b8215, (q31_t)0xaa6b8d5,  (q31_t)0x7f1d9842, (q31_t)0xa9a5480,\n    (q31_t)0x7f1fabff, (q31_t)0xa8defc3,  (q31_t)0x7f21bd4e, (q31_t)0xa818a9d,\n    (q31_t)0x7f23cc2e, (q31_t)0xa752510,  (q31_t)0x7f25d89e, (q31_t)0xa68bf1b,\n    (q31_t)0x7f27e29f, (q31_t)0xa5c58c0,  (q31_t)0x7f29ea31, (q31_t)0xa4ff1fe,\n    (q31_t)0x7f2bef53, (q31_t)0xa438ad7,  (q31_t)0x7f2df206, (q31_t)0xa37234a,\n    (q31_t)0x7f2ff24a, (q31_t)0xa2abb59,  (q31_t)0x7f31f01d, (q31_t)0xa1e5303,\n    (q31_t)0x7f33eb81, (q31_t)0xa11ea49,  (q31_t)0x7f35e476, (q31_t)0xa05812c,\n    (q31_t)0x7f37dafa, (q31_t)0x9f917ac,  (q31_t)0x7f39cf0e, (q31_t)0x9ecadc9,\n    (q31_t)0x7f3bc0b3, (q31_t)0x9e04385,  (q31_t)0x7f3dafe7, (q31_t)0x9d3d8df,\n    (q31_t)0x7f3f9cab, (q31_t)0x9c76dd8,  (q31_t)0x7f4186ff, (q31_t)0x9bb0271,\n    (q31_t)0x7f436ee3, (q31_t)0x9ae96aa,  (q31_t)0x7f455456, (q31_t)0x9a22a83,\n    (q31_t)0x7f473759, (q31_t)0x995bdfd,  (q31_t)0x7f4917eb, (q31_t)0x9895118,\n    (q31_t)0x7f4af60d, (q31_t)0x97ce3d5,  (q31_t)0x7f4cd1be, (q31_t)0x9707635,\n    (q31_t)0x7f4eaafe, (q31_t)0x9640837,  (q31_t)0x7f5081cd, (q31_t)0x95799dd,\n    (q31_t)0x7f52562c, (q31_t)0x94b2b27,  (q31_t)0x7f54281a, (q31_t)0x93ebc14,\n    (q31_t)0x7f55f796, (q31_t)0x9324ca7,  (q31_t)0x7f57c4a2, (q31_t)0x925dcdf,\n    (q31_t)0x7f598f3c, (q31_t)0x9196cbc,  (q31_t)0x7f5b5765, (q31_t)0x90cfc40,\n    (q31_t)0x7f5d1d1d, (q31_t)0x9008b6a,  (q31_t)0x7f5ee063, (q31_t)0x8f41a3c,\n    (q31_t)0x7f60a138, (q31_t)0x8e7a8b5,  (q31_t)0x7f625f9b, (q31_t)0x8db36d6,\n    (q31_t)0x7f641b8d, (q31_t)0x8cec4a0,  (q31_t)0x7f65d50d, (q31_t)0x8c25213,\n    (q31_t)0x7f678c1c, (q31_t)0x8b5df30,  (q31_t)0x7f6940b8, (q31_t)0x8a96bf6,\n    (q31_t)0x7f6af2e3, (q31_t)0x89cf867,  (q31_t)0x7f6ca29c, (q31_t)0x8908483,\n    (q31_t)0x7f6e4fe3, (q31_t)0x884104b,  (q31_t)0x7f6ffab8, (q31_t)0x8779bbe,\n    (q31_t)0x7f71a31b, (q31_t)0x86b26de,  (q31_t)0x7f73490b, (q31_t)0x85eb1ab,\n    (q31_t)0x7f74ec8a, (q31_t)0x8523c25,  (q31_t)0x7f768d96, (q31_t)0x845c64d,\n    (q31_t)0x7f782c30, (q31_t)0x8395024,  (q31_t)0x7f79c857, (q31_t)0x82cd9a9,\n    (q31_t)0x7f7b620c, (q31_t)0x82062de,  (q31_t)0x7f7cf94e, (q31_t)0x813ebc2,\n    (q31_t)0x7f7e8e1e, (q31_t)0x8077457,  (q31_t)0x7f80207b, (q31_t)0x7fafc9c,\n    (q31_t)0x7f81b065, (q31_t)0x7ee8493,  (q31_t)0x7f833ddd, (q31_t)0x7e20c3b,\n    (q31_t)0x7f84c8e2, (q31_t)0x7d59396,  (q31_t)0x7f865174, (q31_t)0x7c91aa3,\n    (q31_t)0x7f87d792, (q31_t)0x7bca163,  (q31_t)0x7f895b3e, (q31_t)0x7b027d7,\n    (q31_t)0x7f8adc77, (q31_t)0x7a3adff,  (q31_t)0x7f8c5b3d, (q31_t)0x79733dc,\n    (q31_t)0x7f8dd78f, (q31_t)0x78ab96e,  (q31_t)0x7f8f516e, (q31_t)0x77e3eb5,\n    (q31_t)0x7f90c8da, (q31_t)0x771c3b3,  (q31_t)0x7f923dd2, (q31_t)0x7654867,\n    (q31_t)0x7f93b058, (q31_t)0x758ccd2,  (q31_t)0x7f952069, (q31_t)0x74c50f4,\n    (q31_t)0x7f968e07, (q31_t)0x73fd4cf,  (q31_t)0x7f97f932, (q31_t)0x7335862,\n    (q31_t)0x7f9961e8, (q31_t)0x726dbae,  (q31_t)0x7f9ac82c, (q31_t)0x71a5eb3,\n    (q31_t)0x7f9c2bfb, (q31_t)0x70de172,  (q31_t)0x7f9d8d56, (q31_t)0x70163eb,\n    (q31_t)0x7f9eec3e, (q31_t)0x6f4e620,  (q31_t)0x7fa048b2, (q31_t)0x6e86810,\n    (q31_t)0x7fa1a2b2, (q31_t)0x6dbe9bb,  (q31_t)0x7fa2fa3d, (q31_t)0x6cf6b23,\n    (q31_t)0x7fa44f55, (q31_t)0x6c2ec48,  (q31_t)0x7fa5a1f9, (q31_t)0x6b66d29,\n    (q31_t)0x7fa6f228, (q31_t)0x6a9edc9,  (q31_t)0x7fa83fe3, (q31_t)0x69d6e27,\n    (q31_t)0x7fa98b2a, (q31_t)0x690ee44,  (q31_t)0x7faad3fd, (q31_t)0x6846e1f,\n    (q31_t)0x7fac1a5b, (q31_t)0x677edbb,  (q31_t)0x7fad5e45, (q31_t)0x66b6d16,\n    (q31_t)0x7fae9fbb, (q31_t)0x65eec33,  (q31_t)0x7fafdebb, (q31_t)0x6526b10,\n    (q31_t)0x7fb11b48, (q31_t)0x645e9af,  (q31_t)0x7fb2555f, (q31_t)0x6396810,\n    (q31_t)0x7fb38d02, (q31_t)0x62ce634,  (q31_t)0x7fb4c231, (q31_t)0x620641a,\n    (q31_t)0x7fb5f4ea, (q31_t)0x613e1c5,  (q31_t)0x7fb7252f, (q31_t)0x6075f33,\n    (q31_t)0x7fb852ff, (q31_t)0x5fadc66,  (q31_t)0x7fb97e5a, (q31_t)0x5ee595d,\n    (q31_t)0x7fbaa740, (q31_t)0x5e1d61b,  (q31_t)0x7fbbcdb1, (q31_t)0x5d5529e,\n    (q31_t)0x7fbcf1ad, (q31_t)0x5c8cee7,  (q31_t)0x7fbe1334, (q31_t)0x5bc4af8,\n    (q31_t)0x7fbf3246, (q31_t)0x5afc6d0,  (q31_t)0x7fc04ee3, (q31_t)0x5a3426f,\n    (q31_t)0x7fc1690a, (q31_t)0x596bdd7,  (q31_t)0x7fc280bc, (q31_t)0x58a3908,\n    (q31_t)0x7fc395f9, (q31_t)0x57db403,  (q31_t)0x7fc4a8c1, (q31_t)0x5712ec7,\n    (q31_t)0x7fc5b913, (q31_t)0x564a955,  (q31_t)0x7fc6c6f0, (q31_t)0x55823ae,\n    (q31_t)0x7fc7d258, (q31_t)0x54b9dd3,  (q31_t)0x7fc8db4a, (q31_t)0x53f17c3,\n    (q31_t)0x7fc9e1c6, (q31_t)0x532917f,  (q31_t)0x7fcae5cd, (q31_t)0x5260b08,\n    (q31_t)0x7fcbe75e, (q31_t)0x519845e,  (q31_t)0x7fcce67a, (q31_t)0x50cfd82,\n    (q31_t)0x7fcde320, (q31_t)0x5007674,  (q31_t)0x7fcedd50, (q31_t)0x4f3ef35,\n    (q31_t)0x7fcfd50b, (q31_t)0x4e767c5,  (q31_t)0x7fd0ca4f, (q31_t)0x4dae024,\n    (q31_t)0x7fd1bd1e, (q31_t)0x4ce5854,  (q31_t)0x7fd2ad77, (q31_t)0x4c1d054,\n    (q31_t)0x7fd39b5a, (q31_t)0x4b54825,  (q31_t)0x7fd486c7, (q31_t)0x4a8bfc7,\n    (q31_t)0x7fd56fbe, (q31_t)0x49c373c,  (q31_t)0x7fd6563f, (q31_t)0x48fae83,\n    (q31_t)0x7fd73a4a, (q31_t)0x483259d,  (q31_t)0x7fd81bdf, (q31_t)0x4769c8b,\n    (q31_t)0x7fd8fafe, (q31_t)0x46a134c,  (q31_t)0x7fd9d7a7, (q31_t)0x45d89e2,\n    (q31_t)0x7fdab1d9, (q31_t)0x451004d,  (q31_t)0x7fdb8996, (q31_t)0x444768d,\n    (q31_t)0x7fdc5edc, (q31_t)0x437eca4,  (q31_t)0x7fdd31ac, (q31_t)0x42b6290,\n    (q31_t)0x7fde0205, (q31_t)0x41ed854,  (q31_t)0x7fdecfe8, (q31_t)0x4124dee,\n    (q31_t)0x7fdf9b55, (q31_t)0x405c361,  (q31_t)0x7fe0644b, (q31_t)0x3f938ac,\n    (q31_t)0x7fe12acb, (q31_t)0x3ecadcf,  (q31_t)0x7fe1eed5, (q31_t)0x3e022cc,\n    (q31_t)0x7fe2b067, (q31_t)0x3d397a3,  (q31_t)0x7fe36f84, (q31_t)0x3c70c54,\n    (q31_t)0x7fe42c2a, (q31_t)0x3ba80df,  (q31_t)0x7fe4e659, (q31_t)0x3adf546,\n    (q31_t)0x7fe59e12, (q31_t)0x3a16988,  (q31_t)0x7fe65354, (q31_t)0x394dda7,\n    (q31_t)0x7fe7061f, (q31_t)0x38851a2,  (q31_t)0x7fe7b674, (q31_t)0x37bc57b,\n    (q31_t)0x7fe86452, (q31_t)0x36f3931,  (q31_t)0x7fe90fb9, (q31_t)0x362acc5,\n    (q31_t)0x7fe9b8a9, (q31_t)0x3562038,  (q31_t)0x7fea5f23, (q31_t)0x3499389,\n    (q31_t)0x7feb0326, (q31_t)0x33d06bb,  (q31_t)0x7feba4b2, (q31_t)0x33079cc,\n    (q31_t)0x7fec43c7, (q31_t)0x323ecbe,  (q31_t)0x7fece065, (q31_t)0x3175f91,\n    (q31_t)0x7fed7a8c, (q31_t)0x30ad245,  (q31_t)0x7fee123d, (q31_t)0x2fe44dc,\n    (q31_t)0x7feea776, (q31_t)0x2f1b755,  (q31_t)0x7fef3a39, (q31_t)0x2e529b0,\n    (q31_t)0x7fefca84, (q31_t)0x2d89bf0,  (q31_t)0x7ff05858, (q31_t)0x2cc0e13,\n    (q31_t)0x7ff0e3b6, (q31_t)0x2bf801a,  (q31_t)0x7ff16c9c, (q31_t)0x2b2f207,\n    (q31_t)0x7ff1f30b, (q31_t)0x2a663d8,  (q31_t)0x7ff27703, (q31_t)0x299d590,\n    (q31_t)0x7ff2f884, (q31_t)0x28d472e,  (q31_t)0x7ff3778e, (q31_t)0x280b8b3,\n    (q31_t)0x7ff3f420, (q31_t)0x2742a1f,  (q31_t)0x7ff46e3c, (q31_t)0x2679b73,\n    (q31_t)0x7ff4e5e0, (q31_t)0x25b0caf,  (q31_t)0x7ff55b0d, (q31_t)0x24e7dd4,\n    (q31_t)0x7ff5cdc3, (q31_t)0x241eee2,  (q31_t)0x7ff63e01, (q31_t)0x2355fd9,\n    (q31_t)0x7ff6abc8, (q31_t)0x228d0bb,  (q31_t)0x7ff71718, (q31_t)0x21c4188,\n    (q31_t)0x7ff77ff1, (q31_t)0x20fb240,  (q31_t)0x7ff7e652, (q31_t)0x20322e3,\n    (q31_t)0x7ff84a3c, (q31_t)0x1f69373,  (q31_t)0x7ff8abae, (q31_t)0x1ea03ef,\n    (q31_t)0x7ff90aaa, (q31_t)0x1dd7459,  (q31_t)0x7ff9672d, (q31_t)0x1d0e4b0,\n    (q31_t)0x7ff9c13a, (q31_t)0x1c454f5,  (q31_t)0x7ffa18cf, (q31_t)0x1b7c528,\n    (q31_t)0x7ffa6dec, (q31_t)0x1ab354b,  (q31_t)0x7ffac092, (q31_t)0x19ea55d,\n    (q31_t)0x7ffb10c1, (q31_t)0x192155f,  (q31_t)0x7ffb5e78, (q31_t)0x1858552,\n    (q31_t)0x7ffba9b8, (q31_t)0x178f536,  (q31_t)0x7ffbf280, (q31_t)0x16c650b,\n    (q31_t)0x7ffc38d1, (q31_t)0x15fd4d2,  (q31_t)0x7ffc7caa, (q31_t)0x153448c,\n    (q31_t)0x7ffcbe0c, (q31_t)0x146b438,  (q31_t)0x7ffcfcf6, (q31_t)0x13a23d8,\n    (q31_t)0x7ffd3969, (q31_t)0x12d936c,  (q31_t)0x7ffd7364, (q31_t)0x12102f4,\n    (q31_t)0x7ffdaae7, (q31_t)0x1147271,  (q31_t)0x7ffddff3, (q31_t)0x107e1e3,\n    (q31_t)0x7ffe1288, (q31_t)0xfb514b,   (q31_t)0x7ffe42a4, (q31_t)0xeec0aa,\n    (q31_t)0x7ffe704a, (q31_t)0xe22fff,   (q31_t)0x7ffe9b77, (q31_t)0xd59f4c,\n    (q31_t)0x7ffec42d, (q31_t)0xc90e90,   (q31_t)0x7ffeea6c, (q31_t)0xbc7dcc,\n    (q31_t)0x7fff0e32, (q31_t)0xafed02,   (q31_t)0x7fff2f82, (q31_t)0xa35c30,\n    (q31_t)0x7fff4e59, (q31_t)0x96cb58,   (q31_t)0x7fff6ab9, (q31_t)0x8a3a7b,\n    (q31_t)0x7fff84a1, (q31_t)0x7da998,   (q31_t)0x7fff9c12, (q31_t)0x7118b0,\n    (q31_t)0x7fffb10b, (q31_t)0x6487c4,   (q31_t)0x7fffc38c, (q31_t)0x57f6d4,\n    (q31_t)0x7fffd396, (q31_t)0x4b65e1,   (q31_t)0x7fffe128, (q31_t)0x3ed4ea,\n    (q31_t)0x7fffec43, (q31_t)0x3243f1,   (q31_t)0x7ffff4e6, (q31_t)0x25b2f7,\n    (q31_t)0x7ffffb11, (q31_t)0x1921fb,   (q31_t)0x7ffffec4, (q31_t)0xc90fe,\n    (q31_t)0x7fffffff, (q31_t)0x0,        (q31_t)0x7ffffec4, (q31_t)0xfff36f02,\n    (q31_t)0x7ffffb11, (q31_t)0xffe6de05, (q31_t)0x7ffff4e6, (q31_t)0xffda4d09,\n    (q31_t)0x7fffec43, (q31_t)0xffcdbc0f, (q31_t)0x7fffe128, (q31_t)0xffc12b16,\n    (q31_t)0x7fffd396, (q31_t)0xffb49a1f, (q31_t)0x7fffc38c, (q31_t)0xffa8092c,\n    (q31_t)0x7fffb10b, (q31_t)0xff9b783c, (q31_t)0x7fff9c12, (q31_t)0xff8ee750,\n    (q31_t)0x7fff84a1, (q31_t)0xff825668, (q31_t)0x7fff6ab9, (q31_t)0xff75c585,\n    (q31_t)0x7fff4e59, (q31_t)0xff6934a8, (q31_t)0x7fff2f82, (q31_t)0xff5ca3d0,\n    (q31_t)0x7fff0e32, (q31_t)0xff5012fe, (q31_t)0x7ffeea6c, (q31_t)0xff438234,\n    (q31_t)0x7ffec42d, (q31_t)0xff36f170, (q31_t)0x7ffe9b77, (q31_t)0xff2a60b4,\n    (q31_t)0x7ffe704a, (q31_t)0xff1dd001, (q31_t)0x7ffe42a4, (q31_t)0xff113f56,\n    (q31_t)0x7ffe1288, (q31_t)0xff04aeb5, (q31_t)0x7ffddff3, (q31_t)0xfef81e1d,\n    (q31_t)0x7ffdaae7, (q31_t)0xfeeb8d8f, (q31_t)0x7ffd7364, (q31_t)0xfedefd0c,\n    (q31_t)0x7ffd3969, (q31_t)0xfed26c94, (q31_t)0x7ffcfcf6, (q31_t)0xfec5dc28,\n    (q31_t)0x7ffcbe0c, (q31_t)0xfeb94bc8, (q31_t)0x7ffc7caa, (q31_t)0xfeacbb74,\n    (q31_t)0x7ffc38d1, (q31_t)0xfea02b2e, (q31_t)0x7ffbf280, (q31_t)0xfe939af5,\n    (q31_t)0x7ffba9b8, (q31_t)0xfe870aca, (q31_t)0x7ffb5e78, (q31_t)0xfe7a7aae,\n    (q31_t)0x7ffb10c1, (q31_t)0xfe6deaa1, (q31_t)0x7ffac092, (q31_t)0xfe615aa3,\n    (q31_t)0x7ffa6dec, (q31_t)0xfe54cab5, (q31_t)0x7ffa18cf, (q31_t)0xfe483ad8,\n    (q31_t)0x7ff9c13a, (q31_t)0xfe3bab0b, (q31_t)0x7ff9672d, (q31_t)0xfe2f1b50,\n    (q31_t)0x7ff90aaa, (q31_t)0xfe228ba7, (q31_t)0x7ff8abae, (q31_t)0xfe15fc11,\n    (q31_t)0x7ff84a3c, (q31_t)0xfe096c8d, (q31_t)0x7ff7e652, (q31_t)0xfdfcdd1d,\n    (q31_t)0x7ff77ff1, (q31_t)0xfdf04dc0, (q31_t)0x7ff71718, (q31_t)0xfde3be78,\n    (q31_t)0x7ff6abc8, (q31_t)0xfdd72f45, (q31_t)0x7ff63e01, (q31_t)0xfdcaa027,\n    (q31_t)0x7ff5cdc3, (q31_t)0xfdbe111e, (q31_t)0x7ff55b0d, (q31_t)0xfdb1822c,\n    (q31_t)0x7ff4e5e0, (q31_t)0xfda4f351, (q31_t)0x7ff46e3c, (q31_t)0xfd98648d,\n    (q31_t)0x7ff3f420, (q31_t)0xfd8bd5e1, (q31_t)0x7ff3778e, (q31_t)0xfd7f474d,\n    (q31_t)0x7ff2f884, (q31_t)0xfd72b8d2, (q31_t)0x7ff27703, (q31_t)0xfd662a70,\n    (q31_t)0x7ff1f30b, (q31_t)0xfd599c28, (q31_t)0x7ff16c9c, (q31_t)0xfd4d0df9,\n    (q31_t)0x7ff0e3b6, (q31_t)0xfd407fe6, (q31_t)0x7ff05858, (q31_t)0xfd33f1ed,\n    (q31_t)0x7fefca84, (q31_t)0xfd276410, (q31_t)0x7fef3a39, (q31_t)0xfd1ad650,\n    (q31_t)0x7feea776, (q31_t)0xfd0e48ab, (q31_t)0x7fee123d, (q31_t)0xfd01bb24,\n    (q31_t)0x7fed7a8c, (q31_t)0xfcf52dbb, (q31_t)0x7fece065, (q31_t)0xfce8a06f,\n    (q31_t)0x7fec43c7, (q31_t)0xfcdc1342, (q31_t)0x7feba4b2, (q31_t)0xfccf8634,\n    (q31_t)0x7feb0326, (q31_t)0xfcc2f945, (q31_t)0x7fea5f23, (q31_t)0xfcb66c77,\n    (q31_t)0x7fe9b8a9, (q31_t)0xfca9dfc8, (q31_t)0x7fe90fb9, (q31_t)0xfc9d533b,\n    (q31_t)0x7fe86452, (q31_t)0xfc90c6cf, (q31_t)0x7fe7b674, (q31_t)0xfc843a85,\n    (q31_t)0x7fe7061f, (q31_t)0xfc77ae5e, (q31_t)0x7fe65354, (q31_t)0xfc6b2259,\n    (q31_t)0x7fe59e12, (q31_t)0xfc5e9678, (q31_t)0x7fe4e659, (q31_t)0xfc520aba,\n    (q31_t)0x7fe42c2a, (q31_t)0xfc457f21, (q31_t)0x7fe36f84, (q31_t)0xfc38f3ac,\n    (q31_t)0x7fe2b067, (q31_t)0xfc2c685d, (q31_t)0x7fe1eed5, (q31_t)0xfc1fdd34,\n    (q31_t)0x7fe12acb, (q31_t)0xfc135231, (q31_t)0x7fe0644b, (q31_t)0xfc06c754,\n    (q31_t)0x7fdf9b55, (q31_t)0xfbfa3c9f, (q31_t)0x7fdecfe8, (q31_t)0xfbedb212,\n    (q31_t)0x7fde0205, (q31_t)0xfbe127ac, (q31_t)0x7fdd31ac, (q31_t)0xfbd49d70,\n    (q31_t)0x7fdc5edc, (q31_t)0xfbc8135c, (q31_t)0x7fdb8996, (q31_t)0xfbbb8973,\n    (q31_t)0x7fdab1d9, (q31_t)0xfbaeffb3, (q31_t)0x7fd9d7a7, (q31_t)0xfba2761e,\n    (q31_t)0x7fd8fafe, (q31_t)0xfb95ecb4, (q31_t)0x7fd81bdf, (q31_t)0xfb896375,\n    (q31_t)0x7fd73a4a, (q31_t)0xfb7cda63, (q31_t)0x7fd6563f, (q31_t)0xfb70517d,\n    (q31_t)0x7fd56fbe, (q31_t)0xfb63c8c4, (q31_t)0x7fd486c7, (q31_t)0xfb574039,\n    (q31_t)0x7fd39b5a, (q31_t)0xfb4ab7db, (q31_t)0x7fd2ad77, (q31_t)0xfb3e2fac,\n    (q31_t)0x7fd1bd1e, (q31_t)0xfb31a7ac, (q31_t)0x7fd0ca4f, (q31_t)0xfb251fdc,\n    (q31_t)0x7fcfd50b, (q31_t)0xfb18983b, (q31_t)0x7fcedd50, (q31_t)0xfb0c10cb,\n    (q31_t)0x7fcde320, (q31_t)0xfaff898c, (q31_t)0x7fcce67a, (q31_t)0xfaf3027e,\n    (q31_t)0x7fcbe75e, (q31_t)0xfae67ba2, (q31_t)0x7fcae5cd, (q31_t)0xfad9f4f8,\n    (q31_t)0x7fc9e1c6, (q31_t)0xfacd6e81, (q31_t)0x7fc8db4a, (q31_t)0xfac0e83d,\n    (q31_t)0x7fc7d258, (q31_t)0xfab4622d, (q31_t)0x7fc6c6f0, (q31_t)0xfaa7dc52,\n    (q31_t)0x7fc5b913, (q31_t)0xfa9b56ab, (q31_t)0x7fc4a8c1, (q31_t)0xfa8ed139,\n    (q31_t)0x7fc395f9, (q31_t)0xfa824bfd, (q31_t)0x7fc280bc, (q31_t)0xfa75c6f8,\n    (q31_t)0x7fc1690a, (q31_t)0xfa694229, (q31_t)0x7fc04ee3, (q31_t)0xfa5cbd91,\n    (q31_t)0x7fbf3246, (q31_t)0xfa503930, (q31_t)0x7fbe1334, (q31_t)0xfa43b508,\n    (q31_t)0x7fbcf1ad, (q31_t)0xfa373119, (q31_t)0x7fbbcdb1, (q31_t)0xfa2aad62,\n    (q31_t)0x7fbaa740, (q31_t)0xfa1e29e5, (q31_t)0x7fb97e5a, (q31_t)0xfa11a6a3,\n    (q31_t)0x7fb852ff, (q31_t)0xfa05239a, (q31_t)0x7fb7252f, (q31_t)0xf9f8a0cd,\n    (q31_t)0x7fb5f4ea, (q31_t)0xf9ec1e3b, (q31_t)0x7fb4c231, (q31_t)0xf9df9be6,\n    (q31_t)0x7fb38d02, (q31_t)0xf9d319cc, (q31_t)0x7fb2555f, (q31_t)0xf9c697f0,\n    (q31_t)0x7fb11b48, (q31_t)0xf9ba1651, (q31_t)0x7fafdebb, (q31_t)0xf9ad94f0,\n    (q31_t)0x7fae9fbb, (q31_t)0xf9a113cd, (q31_t)0x7fad5e45, (q31_t)0xf99492ea,\n    (q31_t)0x7fac1a5b, (q31_t)0xf9881245, (q31_t)0x7faad3fd, (q31_t)0xf97b91e1,\n    (q31_t)0x7fa98b2a, (q31_t)0xf96f11bc, (q31_t)0x7fa83fe3, (q31_t)0xf96291d9,\n    (q31_t)0x7fa6f228, (q31_t)0xf9561237, (q31_t)0x7fa5a1f9, (q31_t)0xf94992d7,\n    (q31_t)0x7fa44f55, (q31_t)0xf93d13b8, (q31_t)0x7fa2fa3d, (q31_t)0xf93094dd,\n    (q31_t)0x7fa1a2b2, (q31_t)0xf9241645, (q31_t)0x7fa048b2, (q31_t)0xf91797f0,\n    (q31_t)0x7f9eec3e, (q31_t)0xf90b19e0, (q31_t)0x7f9d8d56, (q31_t)0xf8fe9c15,\n    (q31_t)0x7f9c2bfb, (q31_t)0xf8f21e8e, (q31_t)0x7f9ac82c, (q31_t)0xf8e5a14d,\n    (q31_t)0x7f9961e8, (q31_t)0xf8d92452, (q31_t)0x7f97f932, (q31_t)0xf8cca79e,\n    (q31_t)0x7f968e07, (q31_t)0xf8c02b31, (q31_t)0x7f952069, (q31_t)0xf8b3af0c,\n    (q31_t)0x7f93b058, (q31_t)0xf8a7332e, (q31_t)0x7f923dd2, (q31_t)0xf89ab799,\n    (q31_t)0x7f90c8da, (q31_t)0xf88e3c4d, (q31_t)0x7f8f516e, (q31_t)0xf881c14b,\n    (q31_t)0x7f8dd78f, (q31_t)0xf8754692, (q31_t)0x7f8c5b3d, (q31_t)0xf868cc24,\n    (q31_t)0x7f8adc77, (q31_t)0xf85c5201, (q31_t)0x7f895b3e, (q31_t)0xf84fd829,\n    (q31_t)0x7f87d792, (q31_t)0xf8435e9d, (q31_t)0x7f865174, (q31_t)0xf836e55d,\n    (q31_t)0x7f84c8e2, (q31_t)0xf82a6c6a, (q31_t)0x7f833ddd, (q31_t)0xf81df3c5,\n    (q31_t)0x7f81b065, (q31_t)0xf8117b6d, (q31_t)0x7f80207b, (q31_t)0xf8050364,\n    (q31_t)0x7f7e8e1e, (q31_t)0xf7f88ba9, (q31_t)0x7f7cf94e, (q31_t)0xf7ec143e,\n    (q31_t)0x7f7b620c, (q31_t)0xf7df9d22, (q31_t)0x7f79c857, (q31_t)0xf7d32657,\n    (q31_t)0x7f782c30, (q31_t)0xf7c6afdc, (q31_t)0x7f768d96, (q31_t)0xf7ba39b3,\n    (q31_t)0x7f74ec8a, (q31_t)0xf7adc3db, (q31_t)0x7f73490b, (q31_t)0xf7a14e55,\n    (q31_t)0x7f71a31b, (q31_t)0xf794d922, (q31_t)0x7f6ffab8, (q31_t)0xf7886442,\n    (q31_t)0x7f6e4fe3, (q31_t)0xf77befb5, (q31_t)0x7f6ca29c, (q31_t)0xf76f7b7d,\n    (q31_t)0x7f6af2e3, (q31_t)0xf7630799, (q31_t)0x7f6940b8, (q31_t)0xf756940a,\n    (q31_t)0x7f678c1c, (q31_t)0xf74a20d0, (q31_t)0x7f65d50d, (q31_t)0xf73daded,\n    (q31_t)0x7f641b8d, (q31_t)0xf7313b60, (q31_t)0x7f625f9b, (q31_t)0xf724c92a,\n    (q31_t)0x7f60a138, (q31_t)0xf718574b, (q31_t)0x7f5ee063, (q31_t)0xf70be5c4,\n    (q31_t)0x7f5d1d1d, (q31_t)0xf6ff7496, (q31_t)0x7f5b5765, (q31_t)0xf6f303c0,\n    (q31_t)0x7f598f3c, (q31_t)0xf6e69344, (q31_t)0x7f57c4a2, (q31_t)0xf6da2321,\n    (q31_t)0x7f55f796, (q31_t)0xf6cdb359, (q31_t)0x7f54281a, (q31_t)0xf6c143ec,\n    (q31_t)0x7f52562c, (q31_t)0xf6b4d4d9, (q31_t)0x7f5081cd, (q31_t)0xf6a86623,\n    (q31_t)0x7f4eaafe, (q31_t)0xf69bf7c9, (q31_t)0x7f4cd1be, (q31_t)0xf68f89cb,\n    (q31_t)0x7f4af60d, (q31_t)0xf6831c2b, (q31_t)0x7f4917eb, (q31_t)0xf676aee8,\n    (q31_t)0x7f473759, (q31_t)0xf66a4203, (q31_t)0x7f455456, (q31_t)0xf65dd57d,\n    (q31_t)0x7f436ee3, (q31_t)0xf6516956, (q31_t)0x7f4186ff, (q31_t)0xf644fd8f,\n    (q31_t)0x7f3f9cab, (q31_t)0xf6389228, (q31_t)0x7f3dafe7, (q31_t)0xf62c2721,\n    (q31_t)0x7f3bc0b3, (q31_t)0xf61fbc7b, (q31_t)0x7f39cf0e, (q31_t)0xf6135237,\n    (q31_t)0x7f37dafa, (q31_t)0xf606e854, (q31_t)0x7f35e476, (q31_t)0xf5fa7ed4,\n    (q31_t)0x7f33eb81, (q31_t)0xf5ee15b7, (q31_t)0x7f31f01d, (q31_t)0xf5e1acfd,\n    (q31_t)0x7f2ff24a, (q31_t)0xf5d544a7, (q31_t)0x7f2df206, (q31_t)0xf5c8dcb6,\n    (q31_t)0x7f2bef53, (q31_t)0xf5bc7529, (q31_t)0x7f29ea31, (q31_t)0xf5b00e02,\n    (q31_t)0x7f27e29f, (q31_t)0xf5a3a740, (q31_t)0x7f25d89e, (q31_t)0xf59740e5,\n    (q31_t)0x7f23cc2e, (q31_t)0xf58adaf0, (q31_t)0x7f21bd4e, (q31_t)0xf57e7563,\n    (q31_t)0x7f1fabff, (q31_t)0xf572103d, (q31_t)0x7f1d9842, (q31_t)0xf565ab80,\n    (q31_t)0x7f1b8215, (q31_t)0xf559472b, (q31_t)0x7f19697a, (q31_t)0xf54ce33f,\n    (q31_t)0x7f174e70, (q31_t)0xf5407fbd, (q31_t)0x7f1530f7, (q31_t)0xf5341ca5,\n    (q31_t)0x7f13110f, (q31_t)0xf527b9f7, (q31_t)0x7f10eeb9, (q31_t)0xf51b57b5,\n    (q31_t)0x7f0ec9f5, (q31_t)0xf50ef5de, (q31_t)0x7f0ca2c2, (q31_t)0xf5029473,\n    (q31_t)0x7f0a7921, (q31_t)0xf4f63374, (q31_t)0x7f084d12, (q31_t)0xf4e9d2e3,\n    (q31_t)0x7f061e95, (q31_t)0xf4dd72be, (q31_t)0x7f03eda9, (q31_t)0xf4d11308,\n    (q31_t)0x7f01ba50, (q31_t)0xf4c4b3c0, (q31_t)0x7eff8489, (q31_t)0xf4b854e7,\n    (q31_t)0x7efd4c54, (q31_t)0xf4abf67e, (q31_t)0x7efb11b1, (q31_t)0xf49f9884,\n    (q31_t)0x7ef8d4a1, (q31_t)0xf4933afa, (q31_t)0x7ef69523, (q31_t)0xf486dde1,\n    (q31_t)0x7ef45338, (q31_t)0xf47a8139, (q31_t)0x7ef20ee0, (q31_t)0xf46e2504,\n    (q31_t)0x7eefc81a, (q31_t)0xf461c940, (q31_t)0x7eed7ee7, (q31_t)0xf4556def,\n    (q31_t)0x7eeb3347, (q31_t)0xf4491311, (q31_t)0x7ee8e53a, (q31_t)0xf43cb8a7,\n    (q31_t)0x7ee694c1, (q31_t)0xf4305eb0, (q31_t)0x7ee441da, (q31_t)0xf424052f,\n    (q31_t)0x7ee1ec87, (q31_t)0xf417ac22, (q31_t)0x7edf94c7, (q31_t)0xf40b538b,\n    (q31_t)0x7edd3a9a, (q31_t)0xf3fefb6a, (q31_t)0x7edade01, (q31_t)0xf3f2a3bf,\n    (q31_t)0x7ed87efc, (q31_t)0xf3e64c8c, (q31_t)0x7ed61d8a, (q31_t)0xf3d9f5cf,\n    (q31_t)0x7ed3b9ad, (q31_t)0xf3cd9f8b, (q31_t)0x7ed15363, (q31_t)0xf3c149bf,\n    (q31_t)0x7eceeaad, (q31_t)0xf3b4f46c, (q31_t)0x7ecc7f8b, (q31_t)0xf3a89f92,\n    (q31_t)0x7eca11fe, (q31_t)0xf39c4b32, (q31_t)0x7ec7a205, (q31_t)0xf38ff74d,\n    (q31_t)0x7ec52fa0, (q31_t)0xf383a3e2, (q31_t)0x7ec2bad0, (q31_t)0xf37750f2,\n    (q31_t)0x7ec04394, (q31_t)0xf36afe7e, (q31_t)0x7ebdc9ed, (q31_t)0xf35eac86,\n    (q31_t)0x7ebb4ddb, (q31_t)0xf3525b0b, (q31_t)0x7eb8cf5d, (q31_t)0xf3460a0d,\n    (q31_t)0x7eb64e75, (q31_t)0xf339b98d, (q31_t)0x7eb3cb21, (q31_t)0xf32d698a,\n    (q31_t)0x7eb14563, (q31_t)0xf3211a07, (q31_t)0x7eaebd3a, (q31_t)0xf314cb02,\n    (q31_t)0x7eac32a6, (q31_t)0xf3087c7d, (q31_t)0x7ea9a5a8, (q31_t)0xf2fc2e77,\n    (q31_t)0x7ea7163f, (q31_t)0xf2efe0f2, (q31_t)0x7ea4846c, (q31_t)0xf2e393ef,\n    (q31_t)0x7ea1f02f, (q31_t)0xf2d7476c, (q31_t)0x7e9f5988, (q31_t)0xf2cafb6b,\n    (q31_t)0x7e9cc076, (q31_t)0xf2beafed, (q31_t)0x7e9a24fb, (q31_t)0xf2b264f2,\n    (q31_t)0x7e978715, (q31_t)0xf2a61a7a, (q31_t)0x7e94e6c6, (q31_t)0xf299d085,\n    (q31_t)0x7e92440d, (q31_t)0xf28d8715, (q31_t)0x7e8f9eeb, (q31_t)0xf2813e2a,\n    (q31_t)0x7e8cf75f, (q31_t)0xf274f5c3, (q31_t)0x7e8a4d6a, (q31_t)0xf268ade3,\n    (q31_t)0x7e87a10c, (q31_t)0xf25c6688, (q31_t)0x7e84f245, (q31_t)0xf2501fb5,\n    (q31_t)0x7e824114, (q31_t)0xf243d968, (q31_t)0x7e7f8d7b, (q31_t)0xf23793a3,\n    (q31_t)0x7e7cd778, (q31_t)0xf22b4e66, (q31_t)0x7e7a1f0d, (q31_t)0xf21f09b1,\n    (q31_t)0x7e77643a, (q31_t)0xf212c585, (q31_t)0x7e74a6fd, (q31_t)0xf20681e3,\n    (q31_t)0x7e71e759, (q31_t)0xf1fa3ecb, (q31_t)0x7e6f254c, (q31_t)0xf1edfc3d,\n    (q31_t)0x7e6c60d7, (q31_t)0xf1e1ba3a, (q31_t)0x7e6999fa, (q31_t)0xf1d578c2,\n    (q31_t)0x7e66d0b4, (q31_t)0xf1c937d6, (q31_t)0x7e640507, (q31_t)0xf1bcf777,\n    (q31_t)0x7e6136f3, (q31_t)0xf1b0b7a4, (q31_t)0x7e5e6676, (q31_t)0xf1a4785e,\n    (q31_t)0x7e5b9392, (q31_t)0xf19839a6, (q31_t)0x7e58be47, (q31_t)0xf18bfb7d,\n    (q31_t)0x7e55e694, (q31_t)0xf17fbde2, (q31_t)0x7e530c7a, (q31_t)0xf17380d6,\n    (q31_t)0x7e502ff9, (q31_t)0xf1674459, (q31_t)0x7e4d5110, (q31_t)0xf15b086d,\n    (q31_t)0x7e4a6fc1, (q31_t)0xf14ecd11, (q31_t)0x7e478c0b, (q31_t)0xf1429247,\n    (q31_t)0x7e44a5ef, (q31_t)0xf136580d, (q31_t)0x7e41bd6c, (q31_t)0xf12a1e66,\n    (q31_t)0x7e3ed282, (q31_t)0xf11de551, (q31_t)0x7e3be532, (q31_t)0xf111accf,\n    (q31_t)0x7e38f57c, (q31_t)0xf10574e0, (q31_t)0x7e360360, (q31_t)0xf0f93d86,\n    (q31_t)0x7e330ede, (q31_t)0xf0ed06bf, (q31_t)0x7e3017f6, (q31_t)0xf0e0d08d,\n    (q31_t)0x7e2d1ea8, (q31_t)0xf0d49af1, (q31_t)0x7e2a22f4, (q31_t)0xf0c865ea,\n    (q31_t)0x7e2724db, (q31_t)0xf0bc317a, (q31_t)0x7e24245d, (q31_t)0xf0affda0,\n    (q31_t)0x7e212179, (q31_t)0xf0a3ca5d, (q31_t)0x7e1e1c30, (q31_t)0xf09797b2,\n    (q31_t)0x7e1b1482, (q31_t)0xf08b659f, (q31_t)0x7e180a6f, (q31_t)0xf07f3424,\n    (q31_t)0x7e14fdf7, (q31_t)0xf0730342, (q31_t)0x7e11ef1b, (q31_t)0xf066d2fa,\n    (q31_t)0x7e0eddd9, (q31_t)0xf05aa34c, (q31_t)0x7e0bca34, (q31_t)0xf04e7438,\n    (q31_t)0x7e08b42a, (q31_t)0xf04245c0, (q31_t)0x7e059bbb, (q31_t)0xf03617e2,\n    (q31_t)0x7e0280e9, (q31_t)0xf029eaa1, (q31_t)0x7dff63b2, (q31_t)0xf01dbdfb,\n    (q31_t)0x7dfc4418, (q31_t)0xf01191f3, (q31_t)0x7df9221a, (q31_t)0xf0056687,\n    (q31_t)0x7df5fdb8, (q31_t)0xeff93bba, (q31_t)0x7df2d6f3, (q31_t)0xefed118a,\n    (q31_t)0x7defadca, (q31_t)0xefe0e7f9, (q31_t)0x7dec823e, (q31_t)0xefd4bf08,\n    (q31_t)0x7de9544f, (q31_t)0xefc896b5, (q31_t)0x7de623fd, (q31_t)0xefbc6f03,\n    (q31_t)0x7de2f148, (q31_t)0xefb047f2, (q31_t)0x7ddfbc30, (q31_t)0xefa42181,\n    (q31_t)0x7ddc84b5, (q31_t)0xef97fbb2, (q31_t)0x7dd94ad8, (q31_t)0xef8bd685,\n    (q31_t)0x7dd60e99, (q31_t)0xef7fb1fa, (q31_t)0x7dd2cff7, (q31_t)0xef738e12,\n    (q31_t)0x7dcf8ef3, (q31_t)0xef676ace, (q31_t)0x7dcc4b8d, (q31_t)0xef5b482d,\n    (q31_t)0x7dc905c5, (q31_t)0xef4f2630, (q31_t)0x7dc5bd9b, (q31_t)0xef4304d8,\n    (q31_t)0x7dc2730f, (q31_t)0xef36e426, (q31_t)0x7dbf2622, (q31_t)0xef2ac419,\n    (q31_t)0x7dbbd6d4, (q31_t)0xef1ea4b2, (q31_t)0x7db88524, (q31_t)0xef1285f2,\n    (q31_t)0x7db53113, (q31_t)0xef0667d9, (q31_t)0x7db1daa2, (q31_t)0xeefa4a67,\n    (q31_t)0x7dae81cf, (q31_t)0xeeee2d9d, (q31_t)0x7dab269b, (q31_t)0xeee2117c,\n    (q31_t)0x7da7c907, (q31_t)0xeed5f604, (q31_t)0x7da46912, (q31_t)0xeec9db35,\n    (q31_t)0x7da106bd, (q31_t)0xeebdc110, (q31_t)0x7d9da208, (q31_t)0xeeb1a796,\n    (q31_t)0x7d9a3af2, (q31_t)0xeea58ec6, (q31_t)0x7d96d17d, (q31_t)0xee9976a1,\n    (q31_t)0x7d9365a8, (q31_t)0xee8d5f29, (q31_t)0x7d8ff772, (q31_t)0xee81485c,\n    (q31_t)0x7d8c86de, (q31_t)0xee75323c, (q31_t)0x7d8913ea, (q31_t)0xee691cc9,\n    (q31_t)0x7d859e96, (q31_t)0xee5d0804, (q31_t)0x7d8226e4, (q31_t)0xee50f3ed,\n    (q31_t)0x7d7eacd2, (q31_t)0xee44e084, (q31_t)0x7d7b3061, (q31_t)0xee38cdcb,\n    (q31_t)0x7d77b192, (q31_t)0xee2cbbc1, (q31_t)0x7d743064, (q31_t)0xee20aa67,\n    (q31_t)0x7d70acd7, (q31_t)0xee1499bd, (q31_t)0x7d6d26ec, (q31_t)0xee0889c4,\n    (q31_t)0x7d699ea3, (q31_t)0xedfc7a7c, (q31_t)0x7d6613fb, (q31_t)0xedf06be6,\n    (q31_t)0x7d6286f6, (q31_t)0xede45e03, (q31_t)0x7d5ef793, (q31_t)0xedd850d2,\n    (q31_t)0x7d5b65d2, (q31_t)0xedcc4454, (q31_t)0x7d57d1b3, (q31_t)0xedc0388a,\n    (q31_t)0x7d543b37, (q31_t)0xedb42d74, (q31_t)0x7d50a25e, (q31_t)0xeda82313,\n    (q31_t)0x7d4d0728, (q31_t)0xed9c1967, (q31_t)0x7d496994, (q31_t)0xed901070,\n    (q31_t)0x7d45c9a4, (q31_t)0xed84082f, (q31_t)0x7d422757, (q31_t)0xed7800a5,\n    (q31_t)0x7d3e82ae, (q31_t)0xed6bf9d1, (q31_t)0x7d3adba7, (q31_t)0xed5ff3b5,\n    (q31_t)0x7d373245, (q31_t)0xed53ee51, (q31_t)0x7d338687, (q31_t)0xed47e9a5,\n    (q31_t)0x7d2fd86c, (q31_t)0xed3be5b1, (q31_t)0x7d2c27f6, (q31_t)0xed2fe277,\n    (q31_t)0x7d287523, (q31_t)0xed23dff7, (q31_t)0x7d24bff6, (q31_t)0xed17de31,\n    (q31_t)0x7d21086c, (q31_t)0xed0bdd25, (q31_t)0x7d1d4e88, (q31_t)0xecffdcd4,\n    (q31_t)0x7d199248, (q31_t)0xecf3dd3f, (q31_t)0x7d15d3ad, (q31_t)0xece7de66,\n    (q31_t)0x7d1212b7, (q31_t)0xecdbe04a, (q31_t)0x7d0e4f67, (q31_t)0xeccfe2ea,\n    (q31_t)0x7d0a89bc, (q31_t)0xecc3e648, (q31_t)0x7d06c1b6, (q31_t)0xecb7ea63,\n    (q31_t)0x7d02f757, (q31_t)0xecabef3d, (q31_t)0x7cff2a9d, (q31_t)0xec9ff4d6,\n    (q31_t)0x7cfb5b89, (q31_t)0xec93fb2e, (q31_t)0x7cf78a1b, (q31_t)0xec880245,\n    (q31_t)0x7cf3b653, (q31_t)0xec7c0a1d, (q31_t)0x7cefe032, (q31_t)0xec7012b5,\n    (q31_t)0x7cec07b8, (q31_t)0xec641c0e, (q31_t)0x7ce82ce4, (q31_t)0xec582629,\n    (q31_t)0x7ce44fb7, (q31_t)0xec4c3106, (q31_t)0x7ce07031, (q31_t)0xec403ca5,\n    (q31_t)0x7cdc8e52, (q31_t)0xec344908, (q31_t)0x7cd8aa1b, (q31_t)0xec28562d,\n    (q31_t)0x7cd4c38b, (q31_t)0xec1c6417, (q31_t)0x7cd0daa2, (q31_t)0xec1072c4,\n    (q31_t)0x7cccef62, (q31_t)0xec048237, (q31_t)0x7cc901c9, (q31_t)0xebf8926f,\n    (q31_t)0x7cc511d9, (q31_t)0xebeca36c, (q31_t)0x7cc11f90, (q31_t)0xebe0b52f,\n    (q31_t)0x7cbd2af0, (q31_t)0xebd4c7ba, (q31_t)0x7cb933f9, (q31_t)0xebc8db0b,\n    (q31_t)0x7cb53aaa, (q31_t)0xebbcef23, (q31_t)0x7cb13f04, (q31_t)0xebb10404,\n    (q31_t)0x7cad4107, (q31_t)0xeba519ad, (q31_t)0x7ca940b3, (q31_t)0xeb99301f,\n    (q31_t)0x7ca53e09, (q31_t)0xeb8d475b, (q31_t)0x7ca13908, (q31_t)0xeb815f60,\n    (q31_t)0x7c9d31b0, (q31_t)0xeb75782f, (q31_t)0x7c992803, (q31_t)0xeb6991ca,\n    (q31_t)0x7c951bff, (q31_t)0xeb5dac2f, (q31_t)0x7c910da5, (q31_t)0xeb51c760,\n    (q31_t)0x7c8cfcf6, (q31_t)0xeb45e35d, (q31_t)0x7c88e9f1, (q31_t)0xeb3a0027,\n    (q31_t)0x7c84d496, (q31_t)0xeb2e1dbe, (q31_t)0x7c80bce7, (q31_t)0xeb223c22,\n    (q31_t)0x7c7ca2e2, (q31_t)0xeb165b54, (q31_t)0x7c788688, (q31_t)0xeb0a7b54,\n    (q31_t)0x7c7467d9, (q31_t)0xeafe9c24, (q31_t)0x7c7046d6, (q31_t)0xeaf2bdc3,\n    (q31_t)0x7c6c237e, (q31_t)0xeae6e031, (q31_t)0x7c67fdd1, (q31_t)0xeadb0370,\n    (q31_t)0x7c63d5d1, (q31_t)0xeacf277f, (q31_t)0x7c5fab7c, (q31_t)0xeac34c60,\n    (q31_t)0x7c5b7ed4, (q31_t)0xeab77212, (q31_t)0x7c574fd8, (q31_t)0xeaab9896,\n    (q31_t)0x7c531e88, (q31_t)0xea9fbfed, (q31_t)0x7c4eeae5, (q31_t)0xea93e817,\n    (q31_t)0x7c4ab4ef, (q31_t)0xea881114, (q31_t)0x7c467ca6, (q31_t)0xea7c3ae5,\n    (q31_t)0x7c42420a, (q31_t)0xea70658a, (q31_t)0x7c3e051b, (q31_t)0xea649105,\n    (q31_t)0x7c39c5da, (q31_t)0xea58bd54, (q31_t)0x7c358446, (q31_t)0xea4cea79,\n    (q31_t)0x7c314060, (q31_t)0xea411874, (q31_t)0x7c2cfa28, (q31_t)0xea354746,\n    (q31_t)0x7c28b19e, (q31_t)0xea2976ef, (q31_t)0x7c2466c2, (q31_t)0xea1da770,\n    (q31_t)0x7c201994, (q31_t)0xea11d8c8, (q31_t)0x7c1bca16, (q31_t)0xea060af9,\n    (q31_t)0x7c177845, (q31_t)0xe9fa3e03, (q31_t)0x7c132424, (q31_t)0xe9ee71e6,\n    (q31_t)0x7c0ecdb2, (q31_t)0xe9e2a6a3, (q31_t)0x7c0a74f0, (q31_t)0xe9d6dc3b,\n    (q31_t)0x7c0619dc, (q31_t)0xe9cb12ad, (q31_t)0x7c01bc78, (q31_t)0xe9bf49fa,\n    (q31_t)0x7bfd5cc4, (q31_t)0xe9b38223, (q31_t)0x7bf8fac0, (q31_t)0xe9a7bb28,\n    (q31_t)0x7bf4966c, (q31_t)0xe99bf509, (q31_t)0x7bf02fc9, (q31_t)0xe9902fc7,\n    (q31_t)0x7bebc6d5, (q31_t)0xe9846b63, (q31_t)0x7be75b93, (q31_t)0xe978a7dd,\n    (q31_t)0x7be2ee01, (q31_t)0xe96ce535, (q31_t)0x7bde7e20, (q31_t)0xe961236c,\n    (q31_t)0x7bda0bf0, (q31_t)0xe9556282, (q31_t)0x7bd59771, (q31_t)0xe949a278,\n    (q31_t)0x7bd120a4, (q31_t)0xe93de34e, (q31_t)0x7bcca789, (q31_t)0xe9322505,\n    (q31_t)0x7bc82c1f, (q31_t)0xe926679c, (q31_t)0x7bc3ae67, (q31_t)0xe91aab16,\n    (q31_t)0x7bbf2e62, (q31_t)0xe90eef71, (q31_t)0x7bbaac0e, (q31_t)0xe90334af,\n    (q31_t)0x7bb6276e, (q31_t)0xe8f77acf, (q31_t)0x7bb1a080, (q31_t)0xe8ebc1d3,\n    (q31_t)0x7bad1744, (q31_t)0xe8e009ba, (q31_t)0x7ba88bbc, (q31_t)0xe8d45286,\n    (q31_t)0x7ba3fde7, (q31_t)0xe8c89c37, (q31_t)0x7b9f6dc5, (q31_t)0xe8bce6cd,\n    (q31_t)0x7b9adb57, (q31_t)0xe8b13248, (q31_t)0x7b96469d, (q31_t)0xe8a57ea9,\n    (q31_t)0x7b91af97, (q31_t)0xe899cbf1, (q31_t)0x7b8d1644, (q31_t)0xe88e1a20,\n    (q31_t)0x7b887aa6, (q31_t)0xe8826936, (q31_t)0x7b83dcbc, (q31_t)0xe876b934,\n    (q31_t)0x7b7f3c87, (q31_t)0xe86b0a1a, (q31_t)0x7b7a9a07, (q31_t)0xe85f5be9,\n    (q31_t)0x7b75f53c, (q31_t)0xe853aea1, (q31_t)0x7b714e25, (q31_t)0xe8480243,\n    (q31_t)0x7b6ca4c4, (q31_t)0xe83c56cf, (q31_t)0x7b67f919, (q31_t)0xe830ac45,\n    (q31_t)0x7b634b23, (q31_t)0xe82502a7, (q31_t)0x7b5e9ae4, (q31_t)0xe81959f4,\n    (q31_t)0x7b59e85a, (q31_t)0xe80db22d, (q31_t)0x7b553386, (q31_t)0xe8020b52,\n    (q31_t)0x7b507c69, (q31_t)0xe7f66564, (q31_t)0x7b4bc303, (q31_t)0xe7eac063,\n    (q31_t)0x7b470753, (q31_t)0xe7df1c50, (q31_t)0x7b42495a, (q31_t)0xe7d3792b,\n    (q31_t)0x7b3d8918, (q31_t)0xe7c7d6f4, (q31_t)0x7b38c68e, (q31_t)0xe7bc35ad,\n    (q31_t)0x7b3401bb, (q31_t)0xe7b09555, (q31_t)0x7b2f3aa0, (q31_t)0xe7a4f5ed,\n    (q31_t)0x7b2a713d, (q31_t)0xe7995776, (q31_t)0x7b25a591, (q31_t)0xe78db9ef,\n    (q31_t)0x7b20d79e, (q31_t)0xe7821d59, (q31_t)0x7b1c0764, (q31_t)0xe77681b6,\n    (q31_t)0x7b1734e2, (q31_t)0xe76ae704, (q31_t)0x7b126019, (q31_t)0xe75f4d45,\n    (q31_t)0x7b0d8909, (q31_t)0xe753b479, (q31_t)0x7b08afb2, (q31_t)0xe7481ca1,\n    (q31_t)0x7b03d414, (q31_t)0xe73c85bc, (q31_t)0x7afef630, (q31_t)0xe730efcc,\n    (q31_t)0x7afa1605, (q31_t)0xe7255ad1, (q31_t)0x7af53395, (q31_t)0xe719c6cb,\n    (q31_t)0x7af04edf, (q31_t)0xe70e33bb, (q31_t)0x7aeb67e3, (q31_t)0xe702a1a1,\n    (q31_t)0x7ae67ea1, (q31_t)0xe6f7107e, (q31_t)0x7ae1931a, (q31_t)0xe6eb8052,\n    (q31_t)0x7adca54e, (q31_t)0xe6dff11d, (q31_t)0x7ad7b53d, (q31_t)0xe6d462e1,\n    (q31_t)0x7ad2c2e8, (q31_t)0xe6c8d59c, (q31_t)0x7acdce4d, (q31_t)0xe6bd4951,\n    (q31_t)0x7ac8d76f, (q31_t)0xe6b1bdff, (q31_t)0x7ac3de4c, (q31_t)0xe6a633a6,\n    (q31_t)0x7abee2e5, (q31_t)0xe69aaa48, (q31_t)0x7ab9e53a, (q31_t)0xe68f21e5,\n    (q31_t)0x7ab4e54c, (q31_t)0xe6839a7c, (q31_t)0x7aafe31b, (q31_t)0xe6781410,\n    (q31_t)0x7aaadea6, (q31_t)0xe66c8e9f, (q31_t)0x7aa5d7ee, (q31_t)0xe6610a2a,\n    (q31_t)0x7aa0cef3, (q31_t)0xe65586b3, (q31_t)0x7a9bc3b6, (q31_t)0xe64a0438,\n    (q31_t)0x7a96b636, (q31_t)0xe63e82bc, (q31_t)0x7a91a674, (q31_t)0xe633023e,\n    (q31_t)0x7a8c9470, (q31_t)0xe62782be, (q31_t)0x7a87802a, (q31_t)0xe61c043d,\n    (q31_t)0x7a8269a3, (q31_t)0xe61086bc, (q31_t)0x7a7d50da, (q31_t)0xe6050a3b,\n    (q31_t)0x7a7835cf, (q31_t)0xe5f98ebb, (q31_t)0x7a731884, (q31_t)0xe5ee143b,\n    (q31_t)0x7a6df8f8, (q31_t)0xe5e29abc, (q31_t)0x7a68d72b, (q31_t)0xe5d72240,\n    (q31_t)0x7a63b31d, (q31_t)0xe5cbaac5, (q31_t)0x7a5e8cd0, (q31_t)0xe5c0344d,\n    (q31_t)0x7a596442, (q31_t)0xe5b4bed8, (q31_t)0x7a543974, (q31_t)0xe5a94a67,\n    (q31_t)0x7a4f0c67, (q31_t)0xe59dd6f9, (q31_t)0x7a49dd1a, (q31_t)0xe5926490,\n    (q31_t)0x7a44ab8e, (q31_t)0xe586f32c, (q31_t)0x7a3f77c3, (q31_t)0xe57b82cd,\n    (q31_t)0x7a3a41b9, (q31_t)0xe5701374, (q31_t)0x7a350970, (q31_t)0xe564a521,\n    (q31_t)0x7a2fcee8, (q31_t)0xe55937d5, (q31_t)0x7a2a9223, (q31_t)0xe54dcb8f,\n    (q31_t)0x7a25531f, (q31_t)0xe5426051, (q31_t)0x7a2011de, (q31_t)0xe536f61b,\n    (q31_t)0x7a1ace5f, (q31_t)0xe52b8cee, (q31_t)0x7a1588a2, (q31_t)0xe52024c9,\n    (q31_t)0x7a1040a8, (q31_t)0xe514bdad, (q31_t)0x7a0af671, (q31_t)0xe509579b,\n    (q31_t)0x7a05a9fd, (q31_t)0xe4fdf294, (q31_t)0x7a005b4d, (q31_t)0xe4f28e96,\n    (q31_t)0x79fb0a60, (q31_t)0xe4e72ba4, (q31_t)0x79f5b737, (q31_t)0xe4dbc9bd,\n    (q31_t)0x79f061d2, (q31_t)0xe4d068e2, (q31_t)0x79eb0a31, (q31_t)0xe4c50914,\n    (q31_t)0x79e5b054, (q31_t)0xe4b9aa52, (q31_t)0x79e0543c, (q31_t)0xe4ae4c9d,\n    (q31_t)0x79daf5e8, (q31_t)0xe4a2eff6, (q31_t)0x79d5955a, (q31_t)0xe497945d,\n    (q31_t)0x79d03291, (q31_t)0xe48c39d3, (q31_t)0x79cacd8d, (q31_t)0xe480e057,\n    (q31_t)0x79c5664f, (q31_t)0xe47587eb, (q31_t)0x79bffcd7, (q31_t)0xe46a308f,\n    (q31_t)0x79ba9125, (q31_t)0xe45eda43, (q31_t)0x79b52339, (q31_t)0xe4538507,\n    (q31_t)0x79afb313, (q31_t)0xe44830dd, (q31_t)0x79aa40b4, (q31_t)0xe43cddc4,\n    (q31_t)0x79a4cc1c, (q31_t)0xe4318bbe, (q31_t)0x799f554b, (q31_t)0xe4263ac9,\n    (q31_t)0x7999dc42, (q31_t)0xe41aeae8, (q31_t)0x799460ff, (q31_t)0xe40f9c1a,\n    (q31_t)0x798ee385, (q31_t)0xe4044e60, (q31_t)0x798963d2, (q31_t)0xe3f901ba,\n    (q31_t)0x7983e1e8, (q31_t)0xe3edb628, (q31_t)0x797e5dc6, (q31_t)0xe3e26bac,\n    (q31_t)0x7978d76c, (q31_t)0xe3d72245, (q31_t)0x79734edc, (q31_t)0xe3cbd9f4,\n    (q31_t)0x796dc414, (q31_t)0xe3c092b9, (q31_t)0x79683715, (q31_t)0xe3b54c95,\n    (q31_t)0x7962a7e0, (q31_t)0xe3aa0788, (q31_t)0x795d1675, (q31_t)0xe39ec393,\n    (q31_t)0x795782d3, (q31_t)0xe39380b6, (q31_t)0x7951ecfc, (q31_t)0xe3883ef2,\n    (q31_t)0x794c54ee, (q31_t)0xe37cfe47, (q31_t)0x7946baac, (q31_t)0xe371beb5,\n    (q31_t)0x79411e33, (q31_t)0xe366803c, (q31_t)0x793b7f86, (q31_t)0xe35b42df,\n    (q31_t)0x7935dea4, (q31_t)0xe350069b, (q31_t)0x79303b8e, (q31_t)0xe344cb73,\n    (q31_t)0x792a9642, (q31_t)0xe3399167, (q31_t)0x7924eec3, (q31_t)0xe32e5876,\n    (q31_t)0x791f4510, (q31_t)0xe32320a2, (q31_t)0x79199929, (q31_t)0xe317e9eb,\n    (q31_t)0x7913eb0e, (q31_t)0xe30cb451, (q31_t)0x790e3ac0, (q31_t)0xe3017fd5,\n    (q31_t)0x7908883f, (q31_t)0xe2f64c77, (q31_t)0x7902d38b, (q31_t)0xe2eb1a37,\n    (q31_t)0x78fd1ca4, (q31_t)0xe2dfe917, (q31_t)0x78f7638b, (q31_t)0xe2d4b916,\n    (q31_t)0x78f1a840, (q31_t)0xe2c98a35, (q31_t)0x78ebeac2, (q31_t)0xe2be5c74,\n    (q31_t)0x78e62b13, (q31_t)0xe2b32fd4, (q31_t)0x78e06932, (q31_t)0xe2a80456,\n    (q31_t)0x78daa520, (q31_t)0xe29cd9f8, (q31_t)0x78d4dedd, (q31_t)0xe291b0bd,\n    (q31_t)0x78cf1669, (q31_t)0xe28688a4, (q31_t)0x78c94bc4, (q31_t)0xe27b61af,\n    (q31_t)0x78c37eef, (q31_t)0xe2703bdc, (q31_t)0x78bdafea, (q31_t)0xe265172e,\n    (q31_t)0x78b7deb4, (q31_t)0xe259f3a3, (q31_t)0x78b20b4f, (q31_t)0xe24ed13d,\n    (q31_t)0x78ac35ba, (q31_t)0xe243affc, (q31_t)0x78a65df6, (q31_t)0xe2388fe1,\n    (q31_t)0x78a08402, (q31_t)0xe22d70eb, (q31_t)0x789aa7e0, (q31_t)0xe222531c,\n    (q31_t)0x7894c98f, (q31_t)0xe2173674, (q31_t)0x788ee910, (q31_t)0xe20c1af3,\n    (q31_t)0x78890663, (q31_t)0xe2010099, (q31_t)0x78832187, (q31_t)0xe1f5e768,\n    (q31_t)0x787d3a7e, (q31_t)0xe1eacf5f, (q31_t)0x78775147, (q31_t)0xe1dfb87f,\n    (q31_t)0x787165e3, (q31_t)0xe1d4a2c8, (q31_t)0x786b7852, (q31_t)0xe1c98e3b,\n    (q31_t)0x78658894, (q31_t)0xe1be7ad8, (q31_t)0x785f96a9, (q31_t)0xe1b368a0,\n    (q31_t)0x7859a292, (q31_t)0xe1a85793, (q31_t)0x7853ac4f, (q31_t)0xe19d47b1,\n    (q31_t)0x784db3e0, (q31_t)0xe19238fb, (q31_t)0x7847b946, (q31_t)0xe1872b72,\n    (q31_t)0x7841bc7f, (q31_t)0xe17c1f15, (q31_t)0x783bbd8e, (q31_t)0xe17113e5,\n    (q31_t)0x7835bc71, (q31_t)0xe16609e3, (q31_t)0x782fb92a, (q31_t)0xe15b0110,\n    (q31_t)0x7829b3b9, (q31_t)0xe14ff96a, (q31_t)0x7823ac1d, (q31_t)0xe144f2f3,\n    (q31_t)0x781da256, (q31_t)0xe139edac, (q31_t)0x78179666, (q31_t)0xe12ee995,\n    (q31_t)0x7811884d, (q31_t)0xe123e6ad, (q31_t)0x780b780a, (q31_t)0xe118e4f6,\n    (q31_t)0x7805659e, (q31_t)0xe10de470, (q31_t)0x77ff5109, (q31_t)0xe102e51c,\n    (q31_t)0x77f93a4b, (q31_t)0xe0f7e6f9, (q31_t)0x77f32165, (q31_t)0xe0ecea09,\n    (q31_t)0x77ed0657, (q31_t)0xe0e1ee4b, (q31_t)0x77e6e921, (q31_t)0xe0d6f3c1,\n    (q31_t)0x77e0c9c3, (q31_t)0xe0cbfa6a, (q31_t)0x77daa83d, (q31_t)0xe0c10247,\n    (q31_t)0x77d48490, (q31_t)0xe0b60b58, (q31_t)0x77ce5ebd, (q31_t)0xe0ab159e,\n    (q31_t)0x77c836c2, (q31_t)0xe0a0211a, (q31_t)0x77c20ca1, (q31_t)0xe0952dcb,\n    (q31_t)0x77bbe05a, (q31_t)0xe08a3bb2, (q31_t)0x77b5b1ec, (q31_t)0xe07f4acf,\n    (q31_t)0x77af8159, (q31_t)0xe0745b24, (q31_t)0x77a94ea0, (q31_t)0xe0696cb0,\n    (q31_t)0x77a319c2, (q31_t)0xe05e7f74, (q31_t)0x779ce2be, (q31_t)0xe053936f,\n    (q31_t)0x7796a996, (q31_t)0xe048a8a4, (q31_t)0x77906e49, (q31_t)0xe03dbf11,\n    (q31_t)0x778a30d8, (q31_t)0xe032d6b8, (q31_t)0x7783f143, (q31_t)0xe027ef99,\n    (q31_t)0x777daf89, (q31_t)0xe01d09b4, (q31_t)0x77776bac, (q31_t)0xe012250a,\n    (q31_t)0x777125ac, (q31_t)0xe007419b, (q31_t)0x776add88, (q31_t)0xdffc5f67,\n    (q31_t)0x77649341, (q31_t)0xdff17e70, (q31_t)0x775e46d8, (q31_t)0xdfe69eb4,\n    (q31_t)0x7757f84c, (q31_t)0xdfdbc036, (q31_t)0x7751a79e, (q31_t)0xdfd0e2f5,\n    (q31_t)0x774b54ce, (q31_t)0xdfc606f1, (q31_t)0x7744ffdd, (q31_t)0xdfbb2c2c,\n    (q31_t)0x773ea8ca, (q31_t)0xdfb052a5, (q31_t)0x77384f95, (q31_t)0xdfa57a5d,\n    (q31_t)0x7731f440, (q31_t)0xdf9aa354, (q31_t)0x772b96ca, (q31_t)0xdf8fcd8b,\n    (q31_t)0x77253733, (q31_t)0xdf84f902, (q31_t)0x771ed57c, (q31_t)0xdf7a25ba,\n    (q31_t)0x771871a5, (q31_t)0xdf6f53b3, (q31_t)0x77120bae, (q31_t)0xdf6482ed,\n    (q31_t)0x770ba398, (q31_t)0xdf59b369, (q31_t)0x77053962, (q31_t)0xdf4ee527,\n    (q31_t)0x76fecd0e, (q31_t)0xdf441828, (q31_t)0x76f85e9a, (q31_t)0xdf394c6b,\n    (q31_t)0x76f1ee09, (q31_t)0xdf2e81f3, (q31_t)0x76eb7b58, (q31_t)0xdf23b8be,\n    (q31_t)0x76e5068a, (q31_t)0xdf18f0ce, (q31_t)0x76de8f9e, (q31_t)0xdf0e2a22,\n    (q31_t)0x76d81695, (q31_t)0xdf0364bc, (q31_t)0x76d19b6e, (q31_t)0xdef8a09b,\n    (q31_t)0x76cb1e2a, (q31_t)0xdeedddc0, (q31_t)0x76c49ec9, (q31_t)0xdee31c2b,\n    (q31_t)0x76be1d4c, (q31_t)0xded85bdd, (q31_t)0x76b799b3, (q31_t)0xdecd9cd7,\n    (q31_t)0x76b113fd, (q31_t)0xdec2df18, (q31_t)0x76aa8c2c, (q31_t)0xdeb822a1,\n    (q31_t)0x76a4023f, (q31_t)0xdead6773, (q31_t)0x769d7637, (q31_t)0xdea2ad8d,\n    (q31_t)0x7696e814, (q31_t)0xde97f4f1, (q31_t)0x769057d6, (q31_t)0xde8d3d9e,\n    (q31_t)0x7689c57d, (q31_t)0xde828796, (q31_t)0x7683310b, (q31_t)0xde77d2d8,\n    (q31_t)0x767c9a7e, (q31_t)0xde6d1f65, (q31_t)0x767601d7, (q31_t)0xde626d3e,\n    (q31_t)0x766f6717, (q31_t)0xde57bc62, (q31_t)0x7668ca3e, (q31_t)0xde4d0cd2,\n    (q31_t)0x76622b4c, (q31_t)0xde425e8f, (q31_t)0x765b8a41, (q31_t)0xde37b199,\n    (q31_t)0x7654e71d, (q31_t)0xde2d05f1, (q31_t)0x764e41e2, (q31_t)0xde225b96,\n    (q31_t)0x76479a8e, (q31_t)0xde17b28a, (q31_t)0x7640f123, (q31_t)0xde0d0acc,\n    (q31_t)0x763a45a0, (q31_t)0xde02645d, (q31_t)0x76339806, (q31_t)0xddf7bf3e,\n    (q31_t)0x762ce855, (q31_t)0xdded1b6e, (q31_t)0x7626368d, (q31_t)0xdde278ef,\n    (q31_t)0x761f82af, (q31_t)0xddd7d7c1, (q31_t)0x7618ccba, (q31_t)0xddcd37e4,\n    (q31_t)0x761214b0, (q31_t)0xddc29958, (q31_t)0x760b5a90, (q31_t)0xddb7fc1e,\n    (q31_t)0x76049e5b, (q31_t)0xddad6036, (q31_t)0x75fde011, (q31_t)0xdda2c5a2,\n    (q31_t)0x75f71fb1, (q31_t)0xdd982c60, (q31_t)0x75f05d3d, (q31_t)0xdd8d9472,\n    (q31_t)0x75e998b5, (q31_t)0xdd82fdd8, (q31_t)0x75e2d219, (q31_t)0xdd786892,\n    (q31_t)0x75dc0968, (q31_t)0xdd6dd4a2, (q31_t)0x75d53ea5, (q31_t)0xdd634206,\n    (q31_t)0x75ce71ce, (q31_t)0xdd58b0c0, (q31_t)0x75c7a2e3, (q31_t)0xdd4e20d0,\n    (q31_t)0x75c0d1e7, (q31_t)0xdd439236, (q31_t)0x75b9fed7, (q31_t)0xdd3904f4,\n    (q31_t)0x75b329b5, (q31_t)0xdd2e7908, (q31_t)0x75ac5282, (q31_t)0xdd23ee74,\n    (q31_t)0x75a5793c, (q31_t)0xdd196538, (q31_t)0x759e9de5, (q31_t)0xdd0edd55,\n    (q31_t)0x7597c07d, (q31_t)0xdd0456ca, (q31_t)0x7590e104, (q31_t)0xdcf9d199,\n    (q31_t)0x7589ff7a, (q31_t)0xdcef4dc2, (q31_t)0x75831be0, (q31_t)0xdce4cb44,\n    (q31_t)0x757c3636, (q31_t)0xdcda4a21, (q31_t)0x75754e7c, (q31_t)0xdccfca59,\n    (q31_t)0x756e64b2, (q31_t)0xdcc54bec, (q31_t)0x756778d9, (q31_t)0xdcbacedb,\n    (q31_t)0x75608af1, (q31_t)0xdcb05326, (q31_t)0x75599afa, (q31_t)0xdca5d8cd,\n    (q31_t)0x7552a8f4, (q31_t)0xdc9b5fd2, (q31_t)0x754bb4e1, (q31_t)0xdc90e834,\n    (q31_t)0x7544bebf, (q31_t)0xdc8671f3, (q31_t)0x753dc68f, (q31_t)0xdc7bfd11,\n    (q31_t)0x7536cc52, (q31_t)0xdc71898d, (q31_t)0x752fd008, (q31_t)0xdc671768,\n    (q31_t)0x7528d1b1, (q31_t)0xdc5ca6a2, (q31_t)0x7521d14d, (q31_t)0xdc52373c,\n    (q31_t)0x751acedd, (q31_t)0xdc47c936, (q31_t)0x7513ca60, (q31_t)0xdc3d5c91,\n    (q31_t)0x750cc3d8, (q31_t)0xdc32f14d, (q31_t)0x7505bb44, (q31_t)0xdc28876a,\n    (q31_t)0x74feb0a5, (q31_t)0xdc1e1ee9, (q31_t)0x74f7a3fb, (q31_t)0xdc13b7c9,\n    (q31_t)0x74f09546, (q31_t)0xdc09520d, (q31_t)0x74e98487, (q31_t)0xdbfeedb3,\n    (q31_t)0x74e271bd, (q31_t)0xdbf48abd, (q31_t)0x74db5cea, (q31_t)0xdbea292b,\n    (q31_t)0x74d4460c, (q31_t)0xdbdfc8fc, (q31_t)0x74cd2d26, (q31_t)0xdbd56a32,\n    (q31_t)0x74c61236, (q31_t)0xdbcb0cce, (q31_t)0x74bef53d, (q31_t)0xdbc0b0ce,\n    (q31_t)0x74b7d63c, (q31_t)0xdbb65634, (q31_t)0x74b0b533, (q31_t)0xdbabfd01,\n    (q31_t)0x74a99221, (q31_t)0xdba1a534, (q31_t)0x74a26d08, (q31_t)0xdb974ece,\n    (q31_t)0x749b45e7, (q31_t)0xdb8cf9cf, (q31_t)0x74941cbf, (q31_t)0xdb82a638,\n    (q31_t)0x748cf190, (q31_t)0xdb785409, (q31_t)0x7485c45b, (q31_t)0xdb6e0342,\n    (q31_t)0x747e951f, (q31_t)0xdb63b3e5, (q31_t)0x747763dd, (q31_t)0xdb5965f1,\n    (q31_t)0x74703095, (q31_t)0xdb4f1967, (q31_t)0x7468fb47, (q31_t)0xdb44ce46,\n    (q31_t)0x7461c3f5, (q31_t)0xdb3a8491, (q31_t)0x745a8a9d, (q31_t)0xdb303c46,\n    (q31_t)0x74534f41, (q31_t)0xdb25f566, (q31_t)0x744c11e0, (q31_t)0xdb1baff2,\n    (q31_t)0x7444d27b, (q31_t)0xdb116beb, (q31_t)0x743d9112, (q31_t)0xdb072950,\n    (q31_t)0x74364da6, (q31_t)0xdafce821, (q31_t)0x742f0836, (q31_t)0xdaf2a860,\n    (q31_t)0x7427c0c3, (q31_t)0xdae86a0d, (q31_t)0x7420774d, (q31_t)0xdade2d28,\n    (q31_t)0x74192bd5, (q31_t)0xdad3f1b1, (q31_t)0x7411de5b, (q31_t)0xdac9b7a9,\n    (q31_t)0x740a8edf, (q31_t)0xdabf7f11, (q31_t)0x74033d61, (q31_t)0xdab547e8,\n    (q31_t)0x73fbe9e2, (q31_t)0xdaab122f, (q31_t)0x73f49462, (q31_t)0xdaa0dde7,\n    (q31_t)0x73ed3ce1, (q31_t)0xda96ab0f, (q31_t)0x73e5e360, (q31_t)0xda8c79a9,\n    (q31_t)0x73de87de, (q31_t)0xda8249b4, (q31_t)0x73d72a5d, (q31_t)0xda781b31,\n    (q31_t)0x73cfcadc, (q31_t)0xda6dee21, (q31_t)0x73c8695b, (q31_t)0xda63c284,\n    (q31_t)0x73c105db, (q31_t)0xda599859, (q31_t)0x73b9a05d, (q31_t)0xda4f6fa3,\n    (q31_t)0x73b238e0, (q31_t)0xda454860, (q31_t)0x73aacf65, (q31_t)0xda3b2292,\n    (q31_t)0x73a363ec, (q31_t)0xda30fe38, (q31_t)0x739bf675, (q31_t)0xda26db54,\n    (q31_t)0x73948701, (q31_t)0xda1cb9e5, (q31_t)0x738d1590, (q31_t)0xda1299ec,\n    (q31_t)0x7385a222, (q31_t)0xda087b69, (q31_t)0x737e2cb7, (q31_t)0xd9fe5e5e,\n    (q31_t)0x7376b551, (q31_t)0xd9f442c9, (q31_t)0x736f3bee, (q31_t)0xd9ea28ac,\n    (q31_t)0x7367c090, (q31_t)0xd9e01006, (q31_t)0x73604336, (q31_t)0xd9d5f8d9,\n    (q31_t)0x7358c3e2, (q31_t)0xd9cbe325, (q31_t)0x73514292, (q31_t)0xd9c1cee9,\n    (q31_t)0x7349bf48, (q31_t)0xd9b7bc27, (q31_t)0x73423a04, (q31_t)0xd9adaadf,\n    (q31_t)0x733ab2c6, (q31_t)0xd9a39b11, (q31_t)0x7333298f, (q31_t)0xd9998cbe,\n    (q31_t)0x732b9e5e, (q31_t)0xd98f7fe6, (q31_t)0x73241134, (q31_t)0xd9857489,\n    (q31_t)0x731c8211, (q31_t)0xd97b6aa8, (q31_t)0x7314f0f6, (q31_t)0xd9716243,\n    (q31_t)0x730d5de3, (q31_t)0xd9675b5a, (q31_t)0x7305c8d7, (q31_t)0xd95d55ef,\n    (q31_t)0x72fe31d5, (q31_t)0xd9535201, (q31_t)0x72f698db, (q31_t)0xd9494f90,\n    (q31_t)0x72eefdea, (q31_t)0xd93f4e9e, (q31_t)0x72e76102, (q31_t)0xd9354f2a,\n    (q31_t)0x72dfc224, (q31_t)0xd92b5135, (q31_t)0x72d82150, (q31_t)0xd92154bf,\n    (q31_t)0x72d07e85, (q31_t)0xd91759c9, (q31_t)0x72c8d9c6, (q31_t)0xd90d6053,\n    (q31_t)0x72c13311, (q31_t)0xd903685d, (q31_t)0x72b98a67, (q31_t)0xd8f971e8,\n    (q31_t)0x72b1dfc9, (q31_t)0xd8ef7cf4, (q31_t)0x72aa3336, (q31_t)0xd8e58982,\n    (q31_t)0x72a284b0, (q31_t)0xd8db9792, (q31_t)0x729ad435, (q31_t)0xd8d1a724,\n    (q31_t)0x729321c7, (q31_t)0xd8c7b838, (q31_t)0x728b6d66, (q31_t)0xd8bdcad0,\n    (q31_t)0x7283b712, (q31_t)0xd8b3deeb, (q31_t)0x727bfecc, (q31_t)0xd8a9f48a,\n    (q31_t)0x72744493, (q31_t)0xd8a00bae, (q31_t)0x726c8868, (q31_t)0xd8962456,\n    (q31_t)0x7264ca4c, (q31_t)0xd88c3e83, (q31_t)0x725d0a3e, (q31_t)0xd8825a35,\n    (q31_t)0x72554840, (q31_t)0xd878776d, (q31_t)0x724d8450, (q31_t)0xd86e962b,\n    (q31_t)0x7245be70, (q31_t)0xd864b670, (q31_t)0x723df6a0, (q31_t)0xd85ad83c,\n    (q31_t)0x72362ce0, (q31_t)0xd850fb8e, (q31_t)0x722e6130, (q31_t)0xd8472069,\n    (q31_t)0x72269391, (q31_t)0xd83d46cc, (q31_t)0x721ec403, (q31_t)0xd8336eb7,\n    (q31_t)0x7216f287, (q31_t)0xd829982b, (q31_t)0x720f1f1c, (q31_t)0xd81fc328,\n    (q31_t)0x720749c3, (q31_t)0xd815efae, (q31_t)0x71ff727c, (q31_t)0xd80c1dbf,\n    (q31_t)0x71f79948, (q31_t)0xd8024d59, (q31_t)0x71efbe27, (q31_t)0xd7f87e7f,\n    (q31_t)0x71e7e118, (q31_t)0xd7eeb130, (q31_t)0x71e0021e, (q31_t)0xd7e4e56c,\n    (q31_t)0x71d82137, (q31_t)0xd7db1b34, (q31_t)0x71d03e64, (q31_t)0xd7d15288,\n    (q31_t)0x71c859a5, (q31_t)0xd7c78b68, (q31_t)0x71c072fb, (q31_t)0xd7bdc5d6,\n    (q31_t)0x71b88a66, (q31_t)0xd7b401d1, (q31_t)0x71b09fe7, (q31_t)0xd7aa3f5a,\n    (q31_t)0x71a8b37c, (q31_t)0xd7a07e70, (q31_t)0x71a0c528, (q31_t)0xd796bf16,\n    (q31_t)0x7198d4ea, (q31_t)0xd78d014a, (q31_t)0x7190e2c3, (q31_t)0xd783450d,\n    (q31_t)0x7188eeb2, (q31_t)0xd7798a60, (q31_t)0x7180f8b8, (q31_t)0xd76fd143,\n    (q31_t)0x717900d6, (q31_t)0xd76619b6, (q31_t)0x7171070c, (q31_t)0xd75c63ba,\n    (q31_t)0x71690b59, (q31_t)0xd752af4f, (q31_t)0x71610dbf, (q31_t)0xd748fc75,\n    (q31_t)0x71590e3e, (q31_t)0xd73f4b2e, (q31_t)0x71510cd5, (q31_t)0xd7359b78,\n    (q31_t)0x71490986, (q31_t)0xd72bed55, (q31_t)0x71410450, (q31_t)0xd72240c5,\n    (q31_t)0x7138fd35, (q31_t)0xd71895c9, (q31_t)0x7130f433, (q31_t)0xd70eec60,\n    (q31_t)0x7128e94c, (q31_t)0xd705448b, (q31_t)0x7120dc80, (q31_t)0xd6fb9e4b,\n    (q31_t)0x7118cdcf, (q31_t)0xd6f1f99f, (q31_t)0x7110bd39, (q31_t)0xd6e85689,\n    (q31_t)0x7108aabf, (q31_t)0xd6deb508, (q31_t)0x71009661, (q31_t)0xd6d5151d,\n    (q31_t)0x70f8801f, (q31_t)0xd6cb76c9, (q31_t)0x70f067fb, (q31_t)0xd6c1da0b,\n    (q31_t)0x70e84df3, (q31_t)0xd6b83ee4, (q31_t)0x70e03208, (q31_t)0xd6aea555,\n    (q31_t)0x70d8143b, (q31_t)0xd6a50d5d, (q31_t)0x70cff48c, (q31_t)0xd69b76fe,\n    (q31_t)0x70c7d2fb, (q31_t)0xd691e237, (q31_t)0x70bfaf89, (q31_t)0xd6884f09,\n    (q31_t)0x70b78a36, (q31_t)0xd67ebd74, (q31_t)0x70af6302, (q31_t)0xd6752d79,\n    (q31_t)0x70a739ed, (q31_t)0xd66b9f18, (q31_t)0x709f0ef8, (q31_t)0xd6621251,\n    (q31_t)0x7096e223, (q31_t)0xd6588725, (q31_t)0x708eb36f, (q31_t)0xd64efd94,\n    (q31_t)0x708682dc, (q31_t)0xd645759f, (q31_t)0x707e5069, (q31_t)0xd63bef46,\n    (q31_t)0x70761c18, (q31_t)0xd6326a88, (q31_t)0x706de5e9, (q31_t)0xd628e767,\n    (q31_t)0x7065addb, (q31_t)0xd61f65e4, (q31_t)0x705d73f0, (q31_t)0xd615e5fd,\n    (q31_t)0x70553828, (q31_t)0xd60c67b4, (q31_t)0x704cfa83, (q31_t)0xd602eb0a,\n    (q31_t)0x7044bb00, (q31_t)0xd5f96ffd, (q31_t)0x703c79a2, (q31_t)0xd5eff690,\n    (q31_t)0x70343667, (q31_t)0xd5e67ec1, (q31_t)0x702bf151, (q31_t)0xd5dd0892,\n    (q31_t)0x7023aa5f, (q31_t)0xd5d39403, (q31_t)0x701b6193, (q31_t)0xd5ca2115,\n    (q31_t)0x701316eb, (q31_t)0xd5c0afc6, (q31_t)0x700aca69, (q31_t)0xd5b74019,\n    (q31_t)0x70027c0c, (q31_t)0xd5add20d, (q31_t)0x6ffa2bd6, (q31_t)0xd5a465a3,\n    (q31_t)0x6ff1d9c7, (q31_t)0xd59afadb, (q31_t)0x6fe985de, (q31_t)0xd59191b5,\n    (q31_t)0x6fe1301c, (q31_t)0xd5882a32, (q31_t)0x6fd8d882, (q31_t)0xd57ec452,\n    (q31_t)0x6fd07f0f, (q31_t)0xd5756016, (q31_t)0x6fc823c5, (q31_t)0xd56bfd7d,\n    (q31_t)0x6fbfc6a3, (q31_t)0xd5629c89, (q31_t)0x6fb767aa, (q31_t)0xd5593d3a,\n    (q31_t)0x6faf06da, (q31_t)0xd54fdf8f, (q31_t)0x6fa6a433, (q31_t)0xd5468389,\n    (q31_t)0x6f9e3fb6, (q31_t)0xd53d292a, (q31_t)0x6f95d963, (q31_t)0xd533d070,\n    (q31_t)0x6f8d713a, (q31_t)0xd52a795d, (q31_t)0x6f85073c, (q31_t)0xd52123f0,\n    (q31_t)0x6f7c9b69, (q31_t)0xd517d02b, (q31_t)0x6f742dc1, (q31_t)0xd50e7e0d,\n    (q31_t)0x6f6bbe45, (q31_t)0xd5052d97, (q31_t)0x6f634cf5, (q31_t)0xd4fbdec9,\n    (q31_t)0x6f5ad9d1, (q31_t)0xd4f291a4, (q31_t)0x6f5264da, (q31_t)0xd4e94627,\n    (q31_t)0x6f49ee0f, (q31_t)0xd4dffc54, (q31_t)0x6f417573, (q31_t)0xd4d6b42b,\n    (q31_t)0x6f38fb03, (q31_t)0xd4cd6dab, (q31_t)0x6f307ec2, (q31_t)0xd4c428d6,\n    (q31_t)0x6f2800af, (q31_t)0xd4bae5ab, (q31_t)0x6f1f80ca, (q31_t)0xd4b1a42c,\n    (q31_t)0x6f16ff14, (q31_t)0xd4a86458, (q31_t)0x6f0e7b8e, (q31_t)0xd49f2630,\n    (q31_t)0x6f05f637, (q31_t)0xd495e9b3, (q31_t)0x6efd6f10, (q31_t)0xd48caee4,\n    (q31_t)0x6ef4e619, (q31_t)0xd48375c1, (q31_t)0x6eec5b53, (q31_t)0xd47a3e4b,\n    (q31_t)0x6ee3cebe, (q31_t)0xd4710883, (q31_t)0x6edb405a, (q31_t)0xd467d469,\n    (q31_t)0x6ed2b027, (q31_t)0xd45ea1fd, (q31_t)0x6eca1e27, (q31_t)0xd4557140,\n    (q31_t)0x6ec18a58, (q31_t)0xd44c4232, (q31_t)0x6eb8f4bc, (q31_t)0xd44314d3,\n    (q31_t)0x6eb05d53, (q31_t)0xd439e923, (q31_t)0x6ea7c41e, (q31_t)0xd430bf24,\n    (q31_t)0x6e9f291b, (q31_t)0xd42796d5, (q31_t)0x6e968c4d, (q31_t)0xd41e7037,\n    (q31_t)0x6e8dedb3, (q31_t)0xd4154b4a, (q31_t)0x6e854d4d, (q31_t)0xd40c280e,\n    (q31_t)0x6e7cab1c, (q31_t)0xd4030684, (q31_t)0x6e740720, (q31_t)0xd3f9e6ad,\n    (q31_t)0x6e6b615a, (q31_t)0xd3f0c887, (q31_t)0x6e62b9ca, (q31_t)0xd3e7ac15,\n    (q31_t)0x6e5a1070, (q31_t)0xd3de9156, (q31_t)0x6e51654c, (q31_t)0xd3d5784a,\n    (q31_t)0x6e48b860, (q31_t)0xd3cc60f2, (q31_t)0x6e4009aa, (q31_t)0xd3c34b4f,\n    (q31_t)0x6e37592c, (q31_t)0xd3ba3760, (q31_t)0x6e2ea6e6, (q31_t)0xd3b12526,\n    (q31_t)0x6e25f2d8, (q31_t)0xd3a814a2, (q31_t)0x6e1d3d03, (q31_t)0xd39f05d3,\n    (q31_t)0x6e148566, (q31_t)0xd395f8ba, (q31_t)0x6e0bcc03, (q31_t)0xd38ced57,\n    (q31_t)0x6e0310d9, (q31_t)0xd383e3ab, (q31_t)0x6dfa53e9, (q31_t)0xd37adbb6,\n    (q31_t)0x6df19534, (q31_t)0xd371d579, (q31_t)0x6de8d4b8, (q31_t)0xd368d0f3,\n    (q31_t)0x6de01278, (q31_t)0xd35fce26, (q31_t)0x6dd74e73, (q31_t)0xd356cd11,\n    (q31_t)0x6dce88aa, (q31_t)0xd34dcdb4, (q31_t)0x6dc5c11c, (q31_t)0xd344d011,\n    (q31_t)0x6dbcf7cb, (q31_t)0xd33bd427, (q31_t)0x6db42cb6, (q31_t)0xd332d9f7,\n    (q31_t)0x6dab5fdf, (q31_t)0xd329e181, (q31_t)0x6da29144, (q31_t)0xd320eac6,\n    (q31_t)0x6d99c0e7, (q31_t)0xd317f5c6, (q31_t)0x6d90eec8, (q31_t)0xd30f0280,\n    (q31_t)0x6d881ae8, (q31_t)0xd30610f7, (q31_t)0x6d7f4545, (q31_t)0xd2fd2129,\n    (q31_t)0x6d766de2, (q31_t)0xd2f43318, (q31_t)0x6d6d94bf, (q31_t)0xd2eb46c3,\n    (q31_t)0x6d64b9da, (q31_t)0xd2e25c2b, (q31_t)0x6d5bdd36, (q31_t)0xd2d97350,\n    (q31_t)0x6d52fed2, (q31_t)0xd2d08c33, (q31_t)0x6d4a1eaf, (q31_t)0xd2c7a6d4,\n    (q31_t)0x6d413ccd, (q31_t)0xd2bec333, (q31_t)0x6d38592c, (q31_t)0xd2b5e151,\n    (q31_t)0x6d2f73cd, (q31_t)0xd2ad012e, (q31_t)0x6d268cb0, (q31_t)0xd2a422ca,\n    (q31_t)0x6d1da3d5, (q31_t)0xd29b4626, (q31_t)0x6d14b93d, (q31_t)0xd2926b41,\n    (q31_t)0x6d0bcce8, (q31_t)0xd289921e, (q31_t)0x6d02ded7, (q31_t)0xd280babb,\n    (q31_t)0x6cf9ef09, (q31_t)0xd277e518, (q31_t)0x6cf0fd80, (q31_t)0xd26f1138,\n    (q31_t)0x6ce80a3a, (q31_t)0xd2663f19, (q31_t)0x6cdf153a, (q31_t)0xd25d6ebc,\n    (q31_t)0x6cd61e7f, (q31_t)0xd254a021, (q31_t)0x6ccd2609, (q31_t)0xd24bd34a,\n    (q31_t)0x6cc42bd9, (q31_t)0xd2430835, (q31_t)0x6cbb2fef, (q31_t)0xd23a3ee4,\n    (q31_t)0x6cb2324c, (q31_t)0xd2317756, (q31_t)0x6ca932ef, (q31_t)0xd228b18d,\n    (q31_t)0x6ca031da, (q31_t)0xd21fed88, (q31_t)0x6c972f0d, (q31_t)0xd2172b48,\n    (q31_t)0x6c8e2a87, (q31_t)0xd20e6acc, (q31_t)0x6c85244a, (q31_t)0xd205ac17,\n    (q31_t)0x6c7c1c55, (q31_t)0xd1fcef27, (q31_t)0x6c7312a9, (q31_t)0xd1f433fd,\n    (q31_t)0x6c6a0746, (q31_t)0xd1eb7a9a, (q31_t)0x6c60fa2d, (q31_t)0xd1e2c2fd,\n    (q31_t)0x6c57eb5e, (q31_t)0xd1da0d28, (q31_t)0x6c4edada, (q31_t)0xd1d1591a,\n    (q31_t)0x6c45c8a0, (q31_t)0xd1c8a6d4, (q31_t)0x6c3cb4b1, (q31_t)0xd1bff656,\n    (q31_t)0x6c339f0e, (q31_t)0xd1b747a0, (q31_t)0x6c2a87b6, (q31_t)0xd1ae9ab4,\n    (q31_t)0x6c216eaa, (q31_t)0xd1a5ef90, (q31_t)0x6c1853eb, (q31_t)0xd19d4636,\n    (q31_t)0x6c0f3779, (q31_t)0xd1949ea6, (q31_t)0x6c061953, (q31_t)0xd18bf8e0,\n    (q31_t)0x6bfcf97c, (q31_t)0xd18354e4, (q31_t)0x6bf3d7f2, (q31_t)0xd17ab2b3,\n    (q31_t)0x6beab4b6, (q31_t)0xd172124d, (q31_t)0x6be18fc9, (q31_t)0xd16973b3,\n    (q31_t)0x6bd8692b, (q31_t)0xd160d6e5, (q31_t)0x6bcf40dc, (q31_t)0xd1583be2,\n    (q31_t)0x6bc616dd, (q31_t)0xd14fa2ad, (q31_t)0x6bbceb2d, (q31_t)0xd1470b44,\n    (q31_t)0x6bb3bdce, (q31_t)0xd13e75a8, (q31_t)0x6baa8ec0, (q31_t)0xd135e1d9,\n    (q31_t)0x6ba15e03, (q31_t)0xd12d4fd9, (q31_t)0x6b982b97, (q31_t)0xd124bfa6,\n    (q31_t)0x6b8ef77d, (q31_t)0xd11c3142, (q31_t)0x6b85c1b5, (q31_t)0xd113a4ad,\n    (q31_t)0x6b7c8a3f, (q31_t)0xd10b19e7, (q31_t)0x6b73511c, (q31_t)0xd10290f0,\n    (q31_t)0x6b6a164d, (q31_t)0xd0fa09c9, (q31_t)0x6b60d9d0, (q31_t)0xd0f18472,\n    (q31_t)0x6b579ba8, (q31_t)0xd0e900ec, (q31_t)0x6b4e5bd4, (q31_t)0xd0e07f36,\n    (q31_t)0x6b451a55, (q31_t)0xd0d7ff51, (q31_t)0x6b3bd72a, (q31_t)0xd0cf813e,\n    (q31_t)0x6b329255, (q31_t)0xd0c704fd, (q31_t)0x6b294bd5, (q31_t)0xd0be8a8d,\n    (q31_t)0x6b2003ac, (q31_t)0xd0b611f1, (q31_t)0x6b16b9d9, (q31_t)0xd0ad9b26,\n    (q31_t)0x6b0d6e5c, (q31_t)0xd0a5262f, (q31_t)0x6b042137, (q31_t)0xd09cb30b,\n    (q31_t)0x6afad269, (q31_t)0xd09441bb, (q31_t)0x6af181f3, (q31_t)0xd08bd23f,\n    (q31_t)0x6ae82fd5, (q31_t)0xd0836497, (q31_t)0x6adedc10, (q31_t)0xd07af8c4,\n    (q31_t)0x6ad586a3, (q31_t)0xd0728ec6, (q31_t)0x6acc2f90, (q31_t)0xd06a269d,\n    (q31_t)0x6ac2d6d6, (q31_t)0xd061c04a, (q31_t)0x6ab97c77, (q31_t)0xd0595bcd,\n    (q31_t)0x6ab02071, (q31_t)0xd050f926, (q31_t)0x6aa6c2c6, (q31_t)0xd0489856,\n    (q31_t)0x6a9d6377, (q31_t)0xd040395d, (q31_t)0x6a940283, (q31_t)0xd037dc3b,\n    (q31_t)0x6a8a9fea, (q31_t)0xd02f80f1, (q31_t)0x6a813bae, (q31_t)0xd027277e,\n    (q31_t)0x6a77d5ce, (q31_t)0xd01ecfe4, (q31_t)0x6a6e6e4b, (q31_t)0xd0167a22,\n    (q31_t)0x6a650525, (q31_t)0xd00e2639, (q31_t)0x6a5b9a5d, (q31_t)0xd005d42a,\n    (q31_t)0x6a522df3, (q31_t)0xcffd83f4, (q31_t)0x6a48bfe7, (q31_t)0xcff53597,\n    (q31_t)0x6a3f503a, (q31_t)0xcfece915, (q31_t)0x6a35deeb, (q31_t)0xcfe49e6d,\n    (q31_t)0x6a2c6bfd, (q31_t)0xcfdc55a1, (q31_t)0x6a22f76e, (q31_t)0xcfd40eaf,\n    (q31_t)0x6a19813f, (q31_t)0xcfcbc999, (q31_t)0x6a100970, (q31_t)0xcfc3865e,\n    (q31_t)0x6a069003, (q31_t)0xcfbb4500, (q31_t)0x69fd14f6, (q31_t)0xcfb3057d,\n    (q31_t)0x69f3984c, (q31_t)0xcfaac7d8, (q31_t)0x69ea1a03, (q31_t)0xcfa28c10,\n    (q31_t)0x69e09a1c, (q31_t)0xcf9a5225, (q31_t)0x69d71899, (q31_t)0xcf921a17,\n    (q31_t)0x69cd9578, (q31_t)0xcf89e3e8, (q31_t)0x69c410ba, (q31_t)0xcf81af97,\n    (q31_t)0x69ba8a61, (q31_t)0xcf797d24, (q31_t)0x69b1026c, (q31_t)0xcf714c91,\n    (q31_t)0x69a778db, (q31_t)0xcf691ddd, (q31_t)0x699dedaf, (q31_t)0xcf60f108,\n    (q31_t)0x699460e8, (q31_t)0xcf58c613, (q31_t)0x698ad287, (q31_t)0xcf509cfe,\n    (q31_t)0x6981428c, (q31_t)0xcf4875ca, (q31_t)0x6977b0f7, (q31_t)0xcf405077,\n    (q31_t)0x696e1dc9, (q31_t)0xcf382d05, (q31_t)0x69648902, (q31_t)0xcf300b74,\n    (q31_t)0x695af2a3, (q31_t)0xcf27ebc5, (q31_t)0x69515aab, (q31_t)0xcf1fcdf8,\n    (q31_t)0x6947c11c, (q31_t)0xcf17b20d, (q31_t)0x693e25f5, (q31_t)0xcf0f9805,\n    (q31_t)0x69348937, (q31_t)0xcf077fe1, (q31_t)0x692aeae3, (q31_t)0xceff699f,\n    (q31_t)0x69214af8, (q31_t)0xcef75541, (q31_t)0x6917a977, (q31_t)0xceef42c7,\n    (q31_t)0x690e0661, (q31_t)0xcee73231, (q31_t)0x690461b5, (q31_t)0xcedf2380,\n    (q31_t)0x68fabb75, (q31_t)0xced716b4, (q31_t)0x68f113a0, (q31_t)0xcecf0bcd,\n    (q31_t)0x68e76a37, (q31_t)0xcec702cb, (q31_t)0x68ddbf3b, (q31_t)0xcebefbb0,\n    (q31_t)0x68d412ab, (q31_t)0xceb6f67a, (q31_t)0x68ca6488, (q31_t)0xceaef32b,\n    (q31_t)0x68c0b4d2, (q31_t)0xcea6f1c2, (q31_t)0x68b7038b, (q31_t)0xce9ef241,\n    (q31_t)0x68ad50b1, (q31_t)0xce96f4a7, (q31_t)0x68a39c46, (q31_t)0xce8ef8f4,\n    (q31_t)0x6899e64a, (q31_t)0xce86ff2a, (q31_t)0x68902ebd, (q31_t)0xce7f0748,\n    (q31_t)0x688675a0, (q31_t)0xce77114e, (q31_t)0x687cbaf3, (q31_t)0xce6f1d3d,\n    (q31_t)0x6872feb6, (q31_t)0xce672b16, (q31_t)0x686940ea, (q31_t)0xce5f3ad8,\n    (q31_t)0x685f8190, (q31_t)0xce574c84, (q31_t)0x6855c0a6, (q31_t)0xce4f6019,\n    (q31_t)0x684bfe2f, (q31_t)0xce47759a, (q31_t)0x68423a2a, (q31_t)0xce3f8d05,\n    (q31_t)0x68387498, (q31_t)0xce37a65b, (q31_t)0x682ead78, (q31_t)0xce2fc19c,\n    (q31_t)0x6824e4cc, (q31_t)0xce27dec9, (q31_t)0x681b1a94, (q31_t)0xce1ffde2,\n    (q31_t)0x68114ed0, (q31_t)0xce181ee8, (q31_t)0x68078181, (q31_t)0xce1041d9,\n    (q31_t)0x67fdb2a7, (q31_t)0xce0866b8, (q31_t)0x67f3e241, (q31_t)0xce008d84,\n    (q31_t)0x67ea1052, (q31_t)0xcdf8b63d, (q31_t)0x67e03cd8, (q31_t)0xcdf0e0e4,\n    (q31_t)0x67d667d5, (q31_t)0xcde90d79, (q31_t)0x67cc9149, (q31_t)0xcde13bfd,\n    (q31_t)0x67c2b934, (q31_t)0xcdd96c6f, (q31_t)0x67b8df97, (q31_t)0xcdd19ed0,\n    (q31_t)0x67af0472, (q31_t)0xcdc9d320, (q31_t)0x67a527c4, (q31_t)0xcdc20960,\n    (q31_t)0x679b4990, (q31_t)0xcdba4190, (q31_t)0x679169d5, (q31_t)0xcdb27bb0,\n    (q31_t)0x67878893, (q31_t)0xcdaab7c0, (q31_t)0x677da5cb, (q31_t)0xcda2f5c2,\n    (q31_t)0x6773c17d, (q31_t)0xcd9b35b4, (q31_t)0x6769dbaa, (q31_t)0xcd937798,\n    (q31_t)0x675ff452, (q31_t)0xcd8bbb6d, (q31_t)0x67560b76, (q31_t)0xcd840134,\n    (q31_t)0x674c2115, (q31_t)0xcd7c48ee, (q31_t)0x67423530, (q31_t)0xcd74929a,\n    (q31_t)0x673847c8, (q31_t)0xcd6cde39, (q31_t)0x672e58dc, (q31_t)0xcd652bcb,\n    (q31_t)0x6724686e, (q31_t)0xcd5d7b50, (q31_t)0x671a767e, (q31_t)0xcd55ccca,\n    (q31_t)0x6710830c, (q31_t)0xcd4e2037, (q31_t)0x67068e18, (q31_t)0xcd467599,\n    (q31_t)0x66fc97a3, (q31_t)0xcd3eccef, (q31_t)0x66f29fad, (q31_t)0xcd37263a,\n    (q31_t)0x66e8a637, (q31_t)0xcd2f817b, (q31_t)0x66deab41, (q31_t)0xcd27deb0,\n    (q31_t)0x66d4aecb, (q31_t)0xcd203ddc, (q31_t)0x66cab0d6, (q31_t)0xcd189efe,\n    (q31_t)0x66c0b162, (q31_t)0xcd110216, (q31_t)0x66b6b070, (q31_t)0xcd096725,\n    (q31_t)0x66acadff, (q31_t)0xcd01ce2b, (q31_t)0x66a2aa11, (q31_t)0xccfa3729,\n    (q31_t)0x6698a4a6, (q31_t)0xccf2a21d, (q31_t)0x668e9dbd, (q31_t)0xcceb0f0a,\n    (q31_t)0x66849558, (q31_t)0xcce37def, (q31_t)0x667a8b77, (q31_t)0xccdbeecc,\n    (q31_t)0x6670801a, (q31_t)0xccd461a2, (q31_t)0x66667342, (q31_t)0xccccd671,\n    (q31_t)0x665c64ef, (q31_t)0xccc54d3a, (q31_t)0x66525521, (q31_t)0xccbdc5fc,\n    (q31_t)0x664843d9, (q31_t)0xccb640b8, (q31_t)0x663e3117, (q31_t)0xccaebd6e,\n    (q31_t)0x66341cdb, (q31_t)0xcca73c1e, (q31_t)0x662a0727, (q31_t)0xcc9fbcca,\n    (q31_t)0x661feffa, (q31_t)0xcc983f70, (q31_t)0x6615d754, (q31_t)0xcc90c412,\n    (q31_t)0x660bbd37, (q31_t)0xcc894aaf, (q31_t)0x6601a1a2, (q31_t)0xcc81d349,\n    (q31_t)0x65f78497, (q31_t)0xcc7a5dde, (q31_t)0x65ed6614, (q31_t)0xcc72ea70,\n    (q31_t)0x65e3461b, (q31_t)0xcc6b78ff, (q31_t)0x65d924ac, (q31_t)0xcc64098b,\n    (q31_t)0x65cf01c8, (q31_t)0xcc5c9c14, (q31_t)0x65c4dd6e, (q31_t)0xcc55309b,\n    (q31_t)0x65bab7a0, (q31_t)0xcc4dc720, (q31_t)0x65b0905d, (q31_t)0xcc465fa3,\n    (q31_t)0x65a667a7, (q31_t)0xcc3efa25, (q31_t)0x659c3d7c, (q31_t)0xcc3796a5,\n    (q31_t)0x659211df, (q31_t)0xcc303524, (q31_t)0x6587e4cf, (q31_t)0xcc28d5a3,\n    (q31_t)0x657db64c, (q31_t)0xcc217822, (q31_t)0x65738657, (q31_t)0xcc1a1ca0,\n    (q31_t)0x656954f1, (q31_t)0xcc12c31f, (q31_t)0x655f2219, (q31_t)0xcc0b6b9e,\n    (q31_t)0x6554edd1, (q31_t)0xcc04161e, (q31_t)0x654ab818, (q31_t)0xcbfcc29f,\n    (q31_t)0x654080ef, (q31_t)0xcbf57121, (q31_t)0x65364857, (q31_t)0xcbee21a5,\n    (q31_t)0x652c0e4f, (q31_t)0xcbe6d42b, (q31_t)0x6521d2d8, (q31_t)0xcbdf88b3,\n    (q31_t)0x651795f3, (q31_t)0xcbd83f3d, (q31_t)0x650d57a0, (q31_t)0xcbd0f7ca,\n    (q31_t)0x650317df, (q31_t)0xcbc9b25a, (q31_t)0x64f8d6b0, (q31_t)0xcbc26eee,\n    (q31_t)0x64ee9415, (q31_t)0xcbbb2d85, (q31_t)0x64e4500e, (q31_t)0xcbb3ee20,\n    (q31_t)0x64da0a9a, (q31_t)0xcbacb0bf, (q31_t)0x64cfc3ba, (q31_t)0xcba57563,\n    (q31_t)0x64c57b6f, (q31_t)0xcb9e3c0b, (q31_t)0x64bb31ba, (q31_t)0xcb9704b9,\n    (q31_t)0x64b0e699, (q31_t)0xcb8fcf6b, (q31_t)0x64a69a0f, (q31_t)0xcb889c23,\n    (q31_t)0x649c4c1b, (q31_t)0xcb816ae1, (q31_t)0x6491fcbe, (q31_t)0xcb7a3ba5,\n    (q31_t)0x6487abf7, (q31_t)0xcb730e70, (q31_t)0x647d59c8, (q31_t)0xcb6be341,\n    (q31_t)0x64730631, (q31_t)0xcb64ba19, (q31_t)0x6468b132, (q31_t)0xcb5d92f8,\n    (q31_t)0x645e5acc, (q31_t)0xcb566ddf, (q31_t)0x645402ff, (q31_t)0xcb4f4acd,\n    (q31_t)0x6449a9cc, (q31_t)0xcb4829c4, (q31_t)0x643f4f32, (q31_t)0xcb410ac3,\n    (q31_t)0x6434f332, (q31_t)0xcb39edca, (q31_t)0x642a95ce, (q31_t)0xcb32d2da,\n    (q31_t)0x64203704, (q31_t)0xcb2bb9f4, (q31_t)0x6415d6d5, (q31_t)0xcb24a316,\n    (q31_t)0x640b7543, (q31_t)0xcb1d8e43, (q31_t)0x6401124d, (q31_t)0xcb167b79,\n    (q31_t)0x63f6adf3, (q31_t)0xcb0f6aba, (q31_t)0x63ec4837, (q31_t)0xcb085c05,\n    (q31_t)0x63e1e117, (q31_t)0xcb014f5b, (q31_t)0x63d77896, (q31_t)0xcafa44bc,\n    (q31_t)0x63cd0eb3, (q31_t)0xcaf33c28, (q31_t)0x63c2a36f, (q31_t)0xcaec35a0,\n    (q31_t)0x63b836ca, (q31_t)0xcae53123, (q31_t)0x63adc8c4, (q31_t)0xcade2eb3,\n    (q31_t)0x63a3595e, (q31_t)0xcad72e4f, (q31_t)0x6398e898, (q31_t)0xcad02ff8,\n    (q31_t)0x638e7673, (q31_t)0xcac933ae, (q31_t)0x638402ef, (q31_t)0xcac23971,\n    (q31_t)0x63798e0d, (q31_t)0xcabb4141, (q31_t)0x636f17cc, (q31_t)0xcab44b1f,\n    (q31_t)0x6364a02e, (q31_t)0xcaad570c, (q31_t)0x635a2733, (q31_t)0xcaa66506,\n    (q31_t)0x634facda, (q31_t)0xca9f750f, (q31_t)0x63453125, (q31_t)0xca988727,\n    (q31_t)0x633ab414, (q31_t)0xca919b4e, (q31_t)0x633035a7, (q31_t)0xca8ab184,\n    (q31_t)0x6325b5df, (q31_t)0xca83c9ca, (q31_t)0x631b34bc, (q31_t)0xca7ce420,\n    (q31_t)0x6310b23e, (q31_t)0xca760086, (q31_t)0x63062e67, (q31_t)0xca6f1efc,\n    (q31_t)0x62fba936, (q31_t)0xca683f83, (q31_t)0x62f122ab, (q31_t)0xca61621b,\n    (q31_t)0x62e69ac8, (q31_t)0xca5a86c4, (q31_t)0x62dc118c, (q31_t)0xca53ad7e,\n    (q31_t)0x62d186f8, (q31_t)0xca4cd64b, (q31_t)0x62c6fb0c, (q31_t)0xca460129,\n    (q31_t)0x62bc6dca, (q31_t)0xca3f2e19, (q31_t)0x62b1df30, (q31_t)0xca385d1d,\n    (q31_t)0x62a74f40, (q31_t)0xca318e32, (q31_t)0x629cbdfa, (q31_t)0xca2ac15b,\n    (q31_t)0x62922b5e, (q31_t)0xca23f698, (q31_t)0x6287976e, (q31_t)0xca1d2de7,\n    (q31_t)0x627d0228, (q31_t)0xca16674b, (q31_t)0x62726b8e, (q31_t)0xca0fa2c3,\n    (q31_t)0x6267d3a0, (q31_t)0xca08e04f, (q31_t)0x625d3a5e, (q31_t)0xca021fef,\n    (q31_t)0x62529fca, (q31_t)0xc9fb61a5, (q31_t)0x624803e2, (q31_t)0xc9f4a570,\n    (q31_t)0x623d66a8, (q31_t)0xc9edeb50, (q31_t)0x6232c81c, (q31_t)0xc9e73346,\n    (q31_t)0x6228283f, (q31_t)0xc9e07d51, (q31_t)0x621d8711, (q31_t)0xc9d9c973,\n    (q31_t)0x6212e492, (q31_t)0xc9d317ab, (q31_t)0x620840c2, (q31_t)0xc9cc67fa,\n    (q31_t)0x61fd9ba3, (q31_t)0xc9c5ba60, (q31_t)0x61f2f534, (q31_t)0xc9bf0edd,\n    (q31_t)0x61e84d76, (q31_t)0xc9b86572, (q31_t)0x61dda46a, (q31_t)0xc9b1be1e,\n    (q31_t)0x61d2fa0f, (q31_t)0xc9ab18e3, (q31_t)0x61c84e67, (q31_t)0xc9a475bf,\n    (q31_t)0x61bda171, (q31_t)0xc99dd4b4, (q31_t)0x61b2f32e, (q31_t)0xc99735c2,\n    (q31_t)0x61a8439e, (q31_t)0xc99098e9, (q31_t)0x619d92c2, (q31_t)0xc989fe29,\n    (q31_t)0x6192e09b, (q31_t)0xc9836582, (q31_t)0x61882d28, (q31_t)0xc97ccef5,\n    (q31_t)0x617d786a, (q31_t)0xc9763a83, (q31_t)0x6172c262, (q31_t)0xc96fa82a,\n    (q31_t)0x61680b0f, (q31_t)0xc96917ec, (q31_t)0x615d5273, (q31_t)0xc96289c9,\n    (q31_t)0x6152988d, (q31_t)0xc95bfdc1, (q31_t)0x6147dd5f, (q31_t)0xc95573d4,\n    (q31_t)0x613d20e8, (q31_t)0xc94eec03, (q31_t)0x61326329, (q31_t)0xc948664d,\n    (q31_t)0x6127a423, (q31_t)0xc941e2b4, (q31_t)0x611ce3d5, (q31_t)0xc93b6137,\n    (q31_t)0x61122240, (q31_t)0xc934e1d6, (q31_t)0x61075f65, (q31_t)0xc92e6492,\n    (q31_t)0x60fc9b44, (q31_t)0xc927e96b, (q31_t)0x60f1d5de, (q31_t)0xc9217062,\n    (q31_t)0x60e70f32, (q31_t)0xc91af976, (q31_t)0x60dc4742, (q31_t)0xc91484a8,\n    (q31_t)0x60d17e0d, (q31_t)0xc90e11f7, (q31_t)0x60c6b395, (q31_t)0xc907a166,\n    (q31_t)0x60bbe7d8, (q31_t)0xc90132f2, (q31_t)0x60b11ad9, (q31_t)0xc8fac69e,\n    (q31_t)0x60a64c97, (q31_t)0xc8f45c68, (q31_t)0x609b7d13, (q31_t)0xc8edf452,\n    (q31_t)0x6090ac4d, (q31_t)0xc8e78e5b, (q31_t)0x6085da46, (q31_t)0xc8e12a84,\n    (q31_t)0x607b06fe, (q31_t)0xc8dac8cd, (q31_t)0x60703275, (q31_t)0xc8d46936,\n    (q31_t)0x60655cac, (q31_t)0xc8ce0bc0, (q31_t)0x605a85a3, (q31_t)0xc8c7b06b,\n    (q31_t)0x604fad5b, (q31_t)0xc8c15736, (q31_t)0x6044d3d4, (q31_t)0xc8bb0023,\n    (q31_t)0x6039f90f, (q31_t)0xc8b4ab32, (q31_t)0x602f1d0b, (q31_t)0xc8ae5862,\n    (q31_t)0x60243fca, (q31_t)0xc8a807b4, (q31_t)0x6019614c, (q31_t)0xc8a1b928,\n    (q31_t)0x600e8190, (q31_t)0xc89b6cbf, (q31_t)0x6003a099, (q31_t)0xc8952278,\n    (q31_t)0x5ff8be65, (q31_t)0xc88eda54, (q31_t)0x5feddaf6, (q31_t)0xc8889454,\n    (q31_t)0x5fe2f64c, (q31_t)0xc8825077, (q31_t)0x5fd81067, (q31_t)0xc87c0ebd,\n    (q31_t)0x5fcd2948, (q31_t)0xc875cf28, (q31_t)0x5fc240ef, (q31_t)0xc86f91b7,\n    (q31_t)0x5fb7575c, (q31_t)0xc869566a, (q31_t)0x5fac6c91, (q31_t)0xc8631d42,\n    (q31_t)0x5fa1808c, (q31_t)0xc85ce63e, (q31_t)0x5f969350, (q31_t)0xc856b160,\n    (q31_t)0x5f8ba4dc, (q31_t)0xc8507ea7, (q31_t)0x5f80b531, (q31_t)0xc84a4e14,\n    (q31_t)0x5f75c44e, (q31_t)0xc8441fa6, (q31_t)0x5f6ad235, (q31_t)0xc83df35f,\n    (q31_t)0x5f5fdee6, (q31_t)0xc837c93e, (q31_t)0x5f54ea62, (q31_t)0xc831a143,\n    (q31_t)0x5f49f4a8, (q31_t)0xc82b7b70, (q31_t)0x5f3efdb9, (q31_t)0xc82557c3,\n    (q31_t)0x5f340596, (q31_t)0xc81f363d, (q31_t)0x5f290c3f, (q31_t)0xc81916df,\n    (q31_t)0x5f1e11b5, (q31_t)0xc812f9a9, (q31_t)0x5f1315f7, (q31_t)0xc80cde9b,\n    (q31_t)0x5f081907, (q31_t)0xc806c5b5, (q31_t)0x5efd1ae4, (q31_t)0xc800aef7,\n    (q31_t)0x5ef21b90, (q31_t)0xc7fa9a62, (q31_t)0x5ee71b0a, (q31_t)0xc7f487f6,\n    (q31_t)0x5edc1953, (q31_t)0xc7ee77b3, (q31_t)0x5ed1166b, (q31_t)0xc7e8699a,\n    (q31_t)0x5ec61254, (q31_t)0xc7e25daa, (q31_t)0x5ebb0d0d, (q31_t)0xc7dc53e3,\n    (q31_t)0x5eb00696, (q31_t)0xc7d64c47, (q31_t)0x5ea4fef0, (q31_t)0xc7d046d6,\n    (q31_t)0x5e99f61d, (q31_t)0xc7ca438f, (q31_t)0x5e8eec1b, (q31_t)0xc7c44272,\n    (q31_t)0x5e83e0eb, (q31_t)0xc7be4381, (q31_t)0x5e78d48e, (q31_t)0xc7b846ba,\n    (q31_t)0x5e6dc705, (q31_t)0xc7b24c20, (q31_t)0x5e62b84f, (q31_t)0xc7ac53b1,\n    (q31_t)0x5e57a86d, (q31_t)0xc7a65d6e, (q31_t)0x5e4c9760, (q31_t)0xc7a06957,\n    (q31_t)0x5e418528, (q31_t)0xc79a776c, (q31_t)0x5e3671c5, (q31_t)0xc79487ae,\n    (q31_t)0x5e2b5d38, (q31_t)0xc78e9a1d, (q31_t)0x5e204781, (q31_t)0xc788aeb9,\n    (q31_t)0x5e1530a1, (q31_t)0xc782c582, (q31_t)0x5e0a1898, (q31_t)0xc77cde79,\n    (q31_t)0x5dfeff67, (q31_t)0xc776f99d, (q31_t)0x5df3e50d, (q31_t)0xc77116f0,\n    (q31_t)0x5de8c98c, (q31_t)0xc76b3671, (q31_t)0x5dddace4, (q31_t)0xc7655820,\n    (q31_t)0x5dd28f15, (q31_t)0xc75f7bfe, (q31_t)0x5dc7701f, (q31_t)0xc759a20a,\n    (q31_t)0x5dbc5004, (q31_t)0xc753ca46, (q31_t)0x5db12ec3, (q31_t)0xc74df4b1,\n    (q31_t)0x5da60c5d, (q31_t)0xc748214c, (q31_t)0x5d9ae8d2, (q31_t)0xc7425016,\n    (q31_t)0x5d8fc424, (q31_t)0xc73c8111, (q31_t)0x5d849e51, (q31_t)0xc736b43c,\n    (q31_t)0x5d79775c, (q31_t)0xc730e997, (q31_t)0x5d6e4f43, (q31_t)0xc72b2123,\n    (q31_t)0x5d632608, (q31_t)0xc7255ae0, (q31_t)0x5d57fbaa, (q31_t)0xc71f96ce,\n    (q31_t)0x5d4cd02c, (q31_t)0xc719d4ed, (q31_t)0x5d41a38c, (q31_t)0xc714153e,\n    (q31_t)0x5d3675cb, (q31_t)0xc70e57c0, (q31_t)0x5d2b46ea, (q31_t)0xc7089c75,\n    (q31_t)0x5d2016e9, (q31_t)0xc702e35c, (q31_t)0x5d14e5c9, (q31_t)0xc6fd2c75,\n    (q31_t)0x5d09b389, (q31_t)0xc6f777c1, (q31_t)0x5cfe802b, (q31_t)0xc6f1c540,\n    (q31_t)0x5cf34baf, (q31_t)0xc6ec14f2, (q31_t)0x5ce81615, (q31_t)0xc6e666d7,\n    (q31_t)0x5cdcdf5e, (q31_t)0xc6e0baf0, (q31_t)0x5cd1a78a, (q31_t)0xc6db113d,\n    (q31_t)0x5cc66e99, (q31_t)0xc6d569be, (q31_t)0x5cbb348d, (q31_t)0xc6cfc472,\n    (q31_t)0x5caff965, (q31_t)0xc6ca215c, (q31_t)0x5ca4bd21, (q31_t)0xc6c4807a,\n    (q31_t)0x5c997fc4, (q31_t)0xc6bee1cd, (q31_t)0x5c8e414b, (q31_t)0xc6b94554,\n    (q31_t)0x5c8301b9, (q31_t)0xc6b3ab12, (q31_t)0x5c77c10e, (q31_t)0xc6ae1304,\n    (q31_t)0x5c6c7f4a, (q31_t)0xc6a87d2d, (q31_t)0x5c613c6d, (q31_t)0xc6a2e98b,\n    (q31_t)0x5c55f878, (q31_t)0xc69d5820, (q31_t)0x5c4ab36b, (q31_t)0xc697c8eb,\n    (q31_t)0x5c3f6d47, (q31_t)0xc6923bec, (q31_t)0x5c34260c, (q31_t)0xc68cb124,\n    (q31_t)0x5c28ddbb, (q31_t)0xc6872894, (q31_t)0x5c1d9454, (q31_t)0xc681a23a,\n    (q31_t)0x5c1249d8, (q31_t)0xc67c1e18, (q31_t)0x5c06fe46, (q31_t)0xc6769c2e,\n    (q31_t)0x5bfbb1a0, (q31_t)0xc6711c7b, (q31_t)0x5bf063e6, (q31_t)0xc66b9f01,\n    (q31_t)0x5be51518, (q31_t)0xc66623be, (q31_t)0x5bd9c537, (q31_t)0xc660aab5,\n    (q31_t)0x5bce7442, (q31_t)0xc65b33e4, (q31_t)0x5bc3223c, (q31_t)0xc655bf4c,\n    (q31_t)0x5bb7cf23, (q31_t)0xc6504ced, (q31_t)0x5bac7af9, (q31_t)0xc64adcc7,\n    (q31_t)0x5ba125bd, (q31_t)0xc6456edb, (q31_t)0x5b95cf71, (q31_t)0xc6400329,\n    (q31_t)0x5b8a7815, (q31_t)0xc63a99b1, (q31_t)0x5b7f1fa9, (q31_t)0xc6353273,\n    (q31_t)0x5b73c62d, (q31_t)0xc62fcd6f, (q31_t)0x5b686ba3, (q31_t)0xc62a6aa6,\n    (q31_t)0x5b5d100a, (q31_t)0xc6250a18, (q31_t)0x5b51b363, (q31_t)0xc61fabc4,\n    (q31_t)0x5b4655ae, (q31_t)0xc61a4fac, (q31_t)0x5b3af6ec, (q31_t)0xc614f5cf,\n    (q31_t)0x5b2f971e, (q31_t)0xc60f9e2e, (q31_t)0x5b243643, (q31_t)0xc60a48c9,\n    (q31_t)0x5b18d45c, (q31_t)0xc604f5a0, (q31_t)0x5b0d716a, (q31_t)0xc5ffa4b3,\n    (q31_t)0x5b020d6c, (q31_t)0xc5fa5603, (q31_t)0x5af6a865, (q31_t)0xc5f5098f,\n    (q31_t)0x5aeb4253, (q31_t)0xc5efbf58, (q31_t)0x5adfdb37, (q31_t)0xc5ea775e,\n    (q31_t)0x5ad47312, (q31_t)0xc5e531a1, (q31_t)0x5ac909e5, (q31_t)0xc5dfee22,\n    (q31_t)0x5abd9faf, (q31_t)0xc5daace1, (q31_t)0x5ab23471, (q31_t)0xc5d56ddd,\n    (q31_t)0x5aa6c82b, (q31_t)0xc5d03118, (q31_t)0x5a9b5adf, (q31_t)0xc5caf690,\n    (q31_t)0x5a8fec8c, (q31_t)0xc5c5be47, (q31_t)0x5a847d33, (q31_t)0xc5c0883d,\n    (q31_t)0x5a790cd4, (q31_t)0xc5bb5472, (q31_t)0x5a6d9b70, (q31_t)0xc5b622e6,\n    (q31_t)0x5a622907, (q31_t)0xc5b0f399, (q31_t)0x5a56b599, (q31_t)0xc5abc68c,\n    (q31_t)0x5a4b4128, (q31_t)0xc5a69bbe, (q31_t)0x5a3fcbb3, (q31_t)0xc5a17330,\n    (q31_t)0x5a34553b, (q31_t)0xc59c4ce3, (q31_t)0x5a28ddc0, (q31_t)0xc59728d5,\n    (q31_t)0x5a1d6544, (q31_t)0xc5920708, (q31_t)0x5a11ebc5, (q31_t)0xc58ce77c,\n    (q31_t)0x5a067145, (q31_t)0xc587ca31, (q31_t)0x59faf5c5, (q31_t)0xc582af26,\n    (q31_t)0x59ef7944, (q31_t)0xc57d965d, (q31_t)0x59e3fbc3, (q31_t)0xc5787fd6,\n    (q31_t)0x59d87d42, (q31_t)0xc5736b90, (q31_t)0x59ccfdc2, (q31_t)0xc56e598c,\n    (q31_t)0x59c17d44, (q31_t)0xc56949ca, (q31_t)0x59b5fbc8, (q31_t)0xc5643c4a,\n    (q31_t)0x59aa794d, (q31_t)0xc55f310d, (q31_t)0x599ef5d6, (q31_t)0xc55a2812,\n    (q31_t)0x59937161, (q31_t)0xc555215a, (q31_t)0x5987ebf0, (q31_t)0xc5501ce5,\n    (q31_t)0x597c6584, (q31_t)0xc54b1ab4, (q31_t)0x5970de1b, (q31_t)0xc5461ac6,\n    (q31_t)0x596555b8, (q31_t)0xc5411d1b, (q31_t)0x5959cc5a, (q31_t)0xc53c21b4,\n    (q31_t)0x594e4201, (q31_t)0xc5372891, (q31_t)0x5942b6af, (q31_t)0xc53231b3,\n    (q31_t)0x59372a64, (q31_t)0xc52d3d18, (q31_t)0x592b9d1f, (q31_t)0xc5284ac3,\n    (q31_t)0x59200ee3, (q31_t)0xc5235ab2, (q31_t)0x59147fae, (q31_t)0xc51e6ce6,\n    (q31_t)0x5908ef82, (q31_t)0xc519815f, (q31_t)0x58fd5e5f, (q31_t)0xc514981d,\n    (q31_t)0x58f1cc45, (q31_t)0xc50fb121, (q31_t)0x58e63935, (q31_t)0xc50acc6b,\n    (q31_t)0x58daa52f, (q31_t)0xc505e9fb, (q31_t)0x58cf1034, (q31_t)0xc50109d0,\n    (q31_t)0x58c37a44, (q31_t)0xc4fc2bec, (q31_t)0x58b7e35f, (q31_t)0xc4f7504e,\n    (q31_t)0x58ac4b87, (q31_t)0xc4f276f7, (q31_t)0x58a0b2bb, (q31_t)0xc4ed9fe7,\n    (q31_t)0x589518fc, (q31_t)0xc4e8cb1e, (q31_t)0x58897e4a, (q31_t)0xc4e3f89c,\n    (q31_t)0x587de2a7, (q31_t)0xc4df2862, (q31_t)0x58724611, (q31_t)0xc4da5a6f,\n    (q31_t)0x5866a88a, (q31_t)0xc4d58ec3, (q31_t)0x585b0a13, (q31_t)0xc4d0c560,\n    (q31_t)0x584f6aab, (q31_t)0xc4cbfe45, (q31_t)0x5843ca53, (q31_t)0xc4c73972,\n    (q31_t)0x5838290c, (q31_t)0xc4c276e8, (q31_t)0x582c86d5, (q31_t)0xc4bdb6a6,\n    (q31_t)0x5820e3b0, (q31_t)0xc4b8f8ad, (q31_t)0x58153f9d, (q31_t)0xc4b43cfd,\n    (q31_t)0x58099a9c, (q31_t)0xc4af8397, (q31_t)0x57fdf4ae, (q31_t)0xc4aacc7a,\n    (q31_t)0x57f24dd3, (q31_t)0xc4a617a6, (q31_t)0x57e6a60c, (q31_t)0xc4a1651c,\n    (q31_t)0x57dafd59, (q31_t)0xc49cb4dd, (q31_t)0x57cf53bb, (q31_t)0xc49806e7,\n    (q31_t)0x57c3a931, (q31_t)0xc4935b3c, (q31_t)0x57b7fdbd, (q31_t)0xc48eb1db,\n    (q31_t)0x57ac515f, (q31_t)0xc48a0ac4, (q31_t)0x57a0a417, (q31_t)0xc48565f9,\n    (q31_t)0x5794f5e6, (q31_t)0xc480c379, (q31_t)0x578946cc, (q31_t)0xc47c2344,\n    (q31_t)0x577d96ca, (q31_t)0xc477855a, (q31_t)0x5771e5e0, (q31_t)0xc472e9bc,\n    (q31_t)0x5766340f, (q31_t)0xc46e5069, (q31_t)0x575a8157, (q31_t)0xc469b963,\n    (q31_t)0x574ecdb8, (q31_t)0xc46524a9, (q31_t)0x57431933, (q31_t)0xc460923b,\n    (q31_t)0x573763c9, (q31_t)0xc45c0219, (q31_t)0x572bad7a, (q31_t)0xc4577444,\n    (q31_t)0x571ff646, (q31_t)0xc452e8bc, (q31_t)0x57143e2d, (q31_t)0xc44e5f80,\n    (q31_t)0x57088531, (q31_t)0xc449d892, (q31_t)0x56fccb51, (q31_t)0xc44553f2,\n    (q31_t)0x56f1108f, (q31_t)0xc440d19e, (q31_t)0x56e554ea, (q31_t)0xc43c5199,\n    (q31_t)0x56d99864, (q31_t)0xc437d3e1, (q31_t)0x56cddafb, (q31_t)0xc4335877,\n    (q31_t)0x56c21cb2, (q31_t)0xc42edf5c, (q31_t)0x56b65d88, (q31_t)0xc42a688f,\n    (q31_t)0x56aa9d7e, (q31_t)0xc425f410, (q31_t)0x569edc94, (q31_t)0xc42181e0,\n    (q31_t)0x56931acb, (q31_t)0xc41d11ff, (q31_t)0x56875823, (q31_t)0xc418a46d,\n    (q31_t)0x567b949d, (q31_t)0xc414392b, (q31_t)0x566fd039, (q31_t)0xc40fd037,\n    (q31_t)0x56640af7, (q31_t)0xc40b6994, (q31_t)0x565844d8, (q31_t)0xc4070540,\n    (q31_t)0x564c7ddd, (q31_t)0xc402a33c, (q31_t)0x5640b606, (q31_t)0xc3fe4388,\n    (q31_t)0x5634ed53, (q31_t)0xc3f9e624, (q31_t)0x562923c5, (q31_t)0xc3f58b10,\n    (q31_t)0x561d595d, (q31_t)0xc3f1324e, (q31_t)0x56118e1a, (q31_t)0xc3ecdbdc,\n    (q31_t)0x5605c1fd, (q31_t)0xc3e887bb, (q31_t)0x55f9f507, (q31_t)0xc3e435ea,\n    (q31_t)0x55ee2738, (q31_t)0xc3dfe66c, (q31_t)0x55e25890, (q31_t)0xc3db993e,\n    (q31_t)0x55d68911, (q31_t)0xc3d74e62, (q31_t)0x55cab8ba, (q31_t)0xc3d305d8,\n    (q31_t)0x55bee78c, (q31_t)0xc3cebfa0, (q31_t)0x55b31587, (q31_t)0xc3ca7bba,\n    (q31_t)0x55a742ac, (q31_t)0xc3c63a26, (q31_t)0x559b6efb, (q31_t)0xc3c1fae5,\n    (q31_t)0x558f9a76, (q31_t)0xc3bdbdf6, (q31_t)0x5583c51b, (q31_t)0xc3b9835a,\n    (q31_t)0x5577eeec, (q31_t)0xc3b54b11, (q31_t)0x556c17e9, (q31_t)0xc3b1151b,\n    (q31_t)0x55604013, (q31_t)0xc3ace178, (q31_t)0x5554676a, (q31_t)0xc3a8b028,\n    (q31_t)0x55488dee, (q31_t)0xc3a4812c, (q31_t)0x553cb3a0, (q31_t)0xc3a05484,\n    (q31_t)0x5530d881, (q31_t)0xc39c2a2f, (q31_t)0x5524fc90, (q31_t)0xc398022f,\n    (q31_t)0x55191fcf, (q31_t)0xc393dc82, (q31_t)0x550d423d, (q31_t)0xc38fb92a,\n    (q31_t)0x550163dc, (q31_t)0xc38b9827, (q31_t)0x54f584ac, (q31_t)0xc3877978,\n    (q31_t)0x54e9a4ac, (q31_t)0xc3835d1e, (q31_t)0x54ddc3de, (q31_t)0xc37f4319,\n    (q31_t)0x54d1e242, (q31_t)0xc37b2b6a, (q31_t)0x54c5ffd9, (q31_t)0xc377160f,\n    (q31_t)0x54ba1ca3, (q31_t)0xc373030a, (q31_t)0x54ae38a0, (q31_t)0xc36ef25b,\n    (q31_t)0x54a253d1, (q31_t)0xc36ae401, (q31_t)0x54966e36, (q31_t)0xc366d7fd,\n    (q31_t)0x548a87d1, (q31_t)0xc362ce50, (q31_t)0x547ea0a0, (q31_t)0xc35ec6f8,\n    (q31_t)0x5472b8a5, (q31_t)0xc35ac1f7, (q31_t)0x5466cfe1, (q31_t)0xc356bf4d,\n    (q31_t)0x545ae653, (q31_t)0xc352bef9, (q31_t)0x544efbfc, (q31_t)0xc34ec0fc,\n    (q31_t)0x544310dd, (q31_t)0xc34ac556, (q31_t)0x543724f5, (q31_t)0xc346cc07,\n    (q31_t)0x542b3846, (q31_t)0xc342d510, (q31_t)0x541f4ad1, (q31_t)0xc33ee070,\n    (q31_t)0x54135c94, (q31_t)0xc33aee27, (q31_t)0x54076d91, (q31_t)0xc336fe37,\n    (q31_t)0x53fb7dc9, (q31_t)0xc333109e, (q31_t)0x53ef8d3c, (q31_t)0xc32f255e,\n    (q31_t)0x53e39be9, (q31_t)0xc32b3c75, (q31_t)0x53d7a9d3, (q31_t)0xc32755e5,\n    (q31_t)0x53cbb6f8, (q31_t)0xc32371ae, (q31_t)0x53bfc35b, (q31_t)0xc31f8fcf,\n    (q31_t)0x53b3cefa, (q31_t)0xc31bb049, (q31_t)0x53a7d9d7, (q31_t)0xc317d31c,\n    (q31_t)0x539be3f2, (q31_t)0xc313f848, (q31_t)0x538fed4b, (q31_t)0xc3101fce,\n    (q31_t)0x5383f5e3, (q31_t)0xc30c49ad, (q31_t)0x5377fdbb, (q31_t)0xc30875e5,\n    (q31_t)0x536c04d2, (q31_t)0xc304a477, (q31_t)0x53600b2a, (q31_t)0xc300d563,\n    (q31_t)0x535410c3, (q31_t)0xc2fd08a9, (q31_t)0x5348159d, (q31_t)0xc2f93e4a,\n    (q31_t)0x533c19b8, (q31_t)0xc2f57644, (q31_t)0x53301d16, (q31_t)0xc2f1b099,\n    (q31_t)0x53241fb6, (q31_t)0xc2eded49, (q31_t)0x5318219a, (q31_t)0xc2ea2c53,\n    (q31_t)0x530c22c1, (q31_t)0xc2e66db8, (q31_t)0x5300232c, (q31_t)0xc2e2b178,\n    (q31_t)0x52f422db, (q31_t)0xc2def794, (q31_t)0x52e821cf, (q31_t)0xc2db400a,\n    (q31_t)0x52dc2009, (q31_t)0xc2d78add, (q31_t)0x52d01d89, (q31_t)0xc2d3d80a,\n    (q31_t)0x52c41a4f, (q31_t)0xc2d02794, (q31_t)0x52b8165b, (q31_t)0xc2cc7979,\n    (q31_t)0x52ac11af, (q31_t)0xc2c8cdbb, (q31_t)0x52a00c4b, (q31_t)0xc2c52459,\n    (q31_t)0x5294062f, (q31_t)0xc2c17d52, (q31_t)0x5287ff5b, (q31_t)0xc2bdd8a9,\n    (q31_t)0x527bf7d1, (q31_t)0xc2ba365c, (q31_t)0x526fef90, (q31_t)0xc2b6966c,\n    (q31_t)0x5263e699, (q31_t)0xc2b2f8d8, (q31_t)0x5257dced, (q31_t)0xc2af5da2,\n    (q31_t)0x524bd28c, (q31_t)0xc2abc4c9, (q31_t)0x523fc776, (q31_t)0xc2a82e4d,\n    (q31_t)0x5233bbac, (q31_t)0xc2a49a2e, (q31_t)0x5227af2e, (q31_t)0xc2a1086d,\n    (q31_t)0x521ba1fd, (q31_t)0xc29d790a, (q31_t)0x520f941a, (q31_t)0xc299ec05,\n    (q31_t)0x52038584, (q31_t)0xc296615d, (q31_t)0x51f7763c, (q31_t)0xc292d914,\n    (q31_t)0x51eb6643, (q31_t)0xc28f5329, (q31_t)0x51df5599, (q31_t)0xc28bcf9c,\n    (q31_t)0x51d3443f, (q31_t)0xc2884e6e, (q31_t)0x51c73235, (q31_t)0xc284cf9f,\n    (q31_t)0x51bb1f7c, (q31_t)0xc281532e, (q31_t)0x51af0c13, (q31_t)0xc27dd91c,\n    (q31_t)0x51a2f7fc, (q31_t)0xc27a616a, (q31_t)0x5196e337, (q31_t)0xc276ec16,\n    (q31_t)0x518acdc4, (q31_t)0xc2737922, (q31_t)0x517eb7a4, (q31_t)0xc270088e,\n    (q31_t)0x5172a0d7, (q31_t)0xc26c9a58, (q31_t)0x5166895f, (q31_t)0xc2692e83,\n    (q31_t)0x515a713a, (q31_t)0xc265c50e, (q31_t)0x514e586a, (q31_t)0xc2625df8,\n    (q31_t)0x51423ef0, (q31_t)0xc25ef943, (q31_t)0x513624cb, (q31_t)0xc25b96ee,\n    (q31_t)0x512a09fc, (q31_t)0xc25836f9, (q31_t)0x511dee84, (q31_t)0xc254d965,\n    (q31_t)0x5111d263, (q31_t)0xc2517e31, (q31_t)0x5105b599, (q31_t)0xc24e255e,\n    (q31_t)0x50f99827, (q31_t)0xc24aceed, (q31_t)0x50ed7a0e, (q31_t)0xc2477adc,\n    (q31_t)0x50e15b4e, (q31_t)0xc244292c, (q31_t)0x50d53be7, (q31_t)0xc240d9de,\n    (q31_t)0x50c91bda, (q31_t)0xc23d8cf1, (q31_t)0x50bcfb28, (q31_t)0xc23a4265,\n    (q31_t)0x50b0d9d0, (q31_t)0xc236fa3b, (q31_t)0x50a4b7d3, (q31_t)0xc233b473,\n    (q31_t)0x50989532, (q31_t)0xc230710d, (q31_t)0x508c71ee, (q31_t)0xc22d3009,\n    (q31_t)0x50804e06, (q31_t)0xc229f167, (q31_t)0x5074297b, (q31_t)0xc226b528,\n    (q31_t)0x5068044e, (q31_t)0xc2237b4b, (q31_t)0x505bde7f, (q31_t)0xc22043d0,\n    (q31_t)0x504fb80e, (q31_t)0xc21d0eb8, (q31_t)0x504390fd, (q31_t)0xc219dc03,\n    (q31_t)0x5037694b, (q31_t)0xc216abb1, (q31_t)0x502b40f8, (q31_t)0xc2137dc2,\n    (q31_t)0x501f1807, (q31_t)0xc2105236, (q31_t)0x5012ee76, (q31_t)0xc20d290d,\n    (q31_t)0x5006c446, (q31_t)0xc20a0248, (q31_t)0x4ffa9979, (q31_t)0xc206dde6,\n    (q31_t)0x4fee6e0d, (q31_t)0xc203bbe8, (q31_t)0x4fe24205, (q31_t)0xc2009c4e,\n    (q31_t)0x4fd6155f, (q31_t)0xc1fd7f17, (q31_t)0x4fc9e81e, (q31_t)0xc1fa6445,\n    (q31_t)0x4fbdba40, (q31_t)0xc1f74bd6, (q31_t)0x4fb18bc8, (q31_t)0xc1f435cc,\n    (q31_t)0x4fa55cb4, (q31_t)0xc1f12227, (q31_t)0x4f992d06, (q31_t)0xc1ee10e5,\n    (q31_t)0x4f8cfcbe, (q31_t)0xc1eb0209, (q31_t)0x4f80cbdc, (q31_t)0xc1e7f591,\n    (q31_t)0x4f749a61, (q31_t)0xc1e4eb7e, (q31_t)0x4f68684e, (q31_t)0xc1e1e3d0,\n    (q31_t)0x4f5c35a3, (q31_t)0xc1dede87, (q31_t)0x4f500260, (q31_t)0xc1dbdba3,\n    (q31_t)0x4f43ce86, (q31_t)0xc1d8db25, (q31_t)0x4f379a16, (q31_t)0xc1d5dd0c,\n    (q31_t)0x4f2b650f, (q31_t)0xc1d2e158, (q31_t)0x4f1f2f73, (q31_t)0xc1cfe80a,\n    (q31_t)0x4f12f941, (q31_t)0xc1ccf122, (q31_t)0x4f06c27a, (q31_t)0xc1c9fca0,\n    (q31_t)0x4efa8b20, (q31_t)0xc1c70a84, (q31_t)0x4eee5331, (q31_t)0xc1c41ace,\n    (q31_t)0x4ee21aaf, (q31_t)0xc1c12d7e, (q31_t)0x4ed5e19a, (q31_t)0xc1be4294,\n    (q31_t)0x4ec9a7f3, (q31_t)0xc1bb5a11, (q31_t)0x4ebd6db9, (q31_t)0xc1b873f5,\n    (q31_t)0x4eb132ef, (q31_t)0xc1b5903f, (q31_t)0x4ea4f793, (q31_t)0xc1b2aef0,\n    (q31_t)0x4e98bba7, (q31_t)0xc1afd007, (q31_t)0x4e8c7f2a, (q31_t)0xc1acf386,\n    (q31_t)0x4e80421e, (q31_t)0xc1aa196c, (q31_t)0x4e740483, (q31_t)0xc1a741b9,\n    (q31_t)0x4e67c65a, (q31_t)0xc1a46c6e, (q31_t)0x4e5b87a2, (q31_t)0xc1a1998a,\n    (q31_t)0x4e4f485c, (q31_t)0xc19ec90d, (q31_t)0x4e430889, (q31_t)0xc19bfaf9,\n    (q31_t)0x4e36c82a, (q31_t)0xc1992f4c, (q31_t)0x4e2a873e, (q31_t)0xc1966606,\n    (q31_t)0x4e1e45c6, (q31_t)0xc1939f29, (q31_t)0x4e1203c3, (q31_t)0xc190dab4,\n    (q31_t)0x4e05c135, (q31_t)0xc18e18a7, (q31_t)0x4df97e1d, (q31_t)0xc18b5903,\n    (q31_t)0x4ded3a7b, (q31_t)0xc1889bc6, (q31_t)0x4de0f64f, (q31_t)0xc185e0f3,\n    (q31_t)0x4dd4b19a, (q31_t)0xc1832888, (q31_t)0x4dc86c5d, (q31_t)0xc1807285,\n    (q31_t)0x4dbc2698, (q31_t)0xc17dbeec, (q31_t)0x4dafe04b, (q31_t)0xc17b0dbb,\n    (q31_t)0x4da39978, (q31_t)0xc1785ef4, (q31_t)0x4d97521d, (q31_t)0xc175b296,\n    (q31_t)0x4d8b0a3d, (q31_t)0xc17308a1, (q31_t)0x4d7ec1d6, (q31_t)0xc1706115,\n    (q31_t)0x4d7278eb, (q31_t)0xc16dbbf3, (q31_t)0x4d662f7b, (q31_t)0xc16b193a,\n    (q31_t)0x4d59e586, (q31_t)0xc16878eb, (q31_t)0x4d4d9b0e, (q31_t)0xc165db05,\n    (q31_t)0x4d415013, (q31_t)0xc1633f8a, (q31_t)0x4d350495, (q31_t)0xc160a678,\n    (q31_t)0x4d28b894, (q31_t)0xc15e0fd1, (q31_t)0x4d1c6c11, (q31_t)0xc15b7b94,\n    (q31_t)0x4d101f0e, (q31_t)0xc158e9c1, (q31_t)0x4d03d189, (q31_t)0xc1565a58,\n    (q31_t)0x4cf78383, (q31_t)0xc153cd5a, (q31_t)0x4ceb34fe, (q31_t)0xc15142c6,\n    (q31_t)0x4cdee5f9, (q31_t)0xc14eba9d, (q31_t)0x4cd29676, (q31_t)0xc14c34df,\n    (q31_t)0x4cc64673, (q31_t)0xc149b18b, (q31_t)0x4cb9f5f3, (q31_t)0xc14730a3,\n    (q31_t)0x4cada4f5, (q31_t)0xc144b225, (q31_t)0x4ca1537a, (q31_t)0xc1423613,\n    (q31_t)0x4c950182, (q31_t)0xc13fbc6c, (q31_t)0x4c88af0e, (q31_t)0xc13d4530,\n    (q31_t)0x4c7c5c1e, (q31_t)0xc13ad060, (q31_t)0x4c7008b3, (q31_t)0xc1385dfb,\n    (q31_t)0x4c63b4ce, (q31_t)0xc135ee02, (q31_t)0x4c57606e, (q31_t)0xc1338075,\n    (q31_t)0x4c4b0b94, (q31_t)0xc1311553, (q31_t)0x4c3eb641, (q31_t)0xc12eac9d,\n    (q31_t)0x4c326075, (q31_t)0xc12c4653, (q31_t)0x4c260a31, (q31_t)0xc129e276,\n    (q31_t)0x4c19b374, (q31_t)0xc1278104, (q31_t)0x4c0d5c41, (q31_t)0xc12521ff,\n    (q31_t)0x4c010496, (q31_t)0xc122c566, (q31_t)0x4bf4ac75, (q31_t)0xc1206b39,\n    (q31_t)0x4be853de, (q31_t)0xc11e1379, (q31_t)0x4bdbfad1, (q31_t)0xc11bbe26,\n    (q31_t)0x4bcfa150, (q31_t)0xc1196b3f, (q31_t)0x4bc34759, (q31_t)0xc1171ac6,\n    (q31_t)0x4bb6ecef, (q31_t)0xc114ccb9, (q31_t)0x4baa9211, (q31_t)0xc1128119,\n    (q31_t)0x4b9e36c0, (q31_t)0xc11037e6, (q31_t)0x4b91dafc, (q31_t)0xc10df120,\n    (q31_t)0x4b857ec7, (q31_t)0xc10bacc8, (q31_t)0x4b79221f, (q31_t)0xc1096add,\n    (q31_t)0x4b6cc506, (q31_t)0xc1072b5f, (q31_t)0x4b60677c, (q31_t)0xc104ee4f,\n    (q31_t)0x4b540982, (q31_t)0xc102b3ac, (q31_t)0x4b47ab19, (q31_t)0xc1007b77,\n    (q31_t)0x4b3b4c40, (q31_t)0xc0fe45b0, (q31_t)0x4b2eecf8, (q31_t)0xc0fc1257,\n    (q31_t)0x4b228d42, (q31_t)0xc0f9e16b, (q31_t)0x4b162d1d, (q31_t)0xc0f7b2ee,\n    (q31_t)0x4b09cc8c, (q31_t)0xc0f586df, (q31_t)0x4afd6b8d, (q31_t)0xc0f35d3e,\n    (q31_t)0x4af10a22, (q31_t)0xc0f1360b, (q31_t)0x4ae4a84b, (q31_t)0xc0ef1147,\n    (q31_t)0x4ad84609, (q31_t)0xc0eceef1, (q31_t)0x4acbe35b, (q31_t)0xc0eacf09,\n    (q31_t)0x4abf8043, (q31_t)0xc0e8b190, (q31_t)0x4ab31cc1, (q31_t)0xc0e69686,\n    (q31_t)0x4aa6b8d5, (q31_t)0xc0e47deb, (q31_t)0x4a9a5480, (q31_t)0xc0e267be,\n    (q31_t)0x4a8defc3, (q31_t)0xc0e05401, (q31_t)0x4a818a9d, (q31_t)0xc0de42b2,\n    (q31_t)0x4a752510, (q31_t)0xc0dc33d2, (q31_t)0x4a68bf1b, (q31_t)0xc0da2762,\n    (q31_t)0x4a5c58c0, (q31_t)0xc0d81d61, (q31_t)0x4a4ff1fe, (q31_t)0xc0d615cf,\n    (q31_t)0x4a438ad7, (q31_t)0xc0d410ad, (q31_t)0x4a37234a, (q31_t)0xc0d20dfa,\n    (q31_t)0x4a2abb59, (q31_t)0xc0d00db6, (q31_t)0x4a1e5303, (q31_t)0xc0ce0fe3,\n    (q31_t)0x4a11ea49, (q31_t)0xc0cc147f, (q31_t)0x4a05812c, (q31_t)0xc0ca1b8a,\n    (q31_t)0x49f917ac, (q31_t)0xc0c82506, (q31_t)0x49ecadc9, (q31_t)0xc0c630f2,\n    (q31_t)0x49e04385, (q31_t)0xc0c43f4d, (q31_t)0x49d3d8df, (q31_t)0xc0c25019,\n    (q31_t)0x49c76dd8, (q31_t)0xc0c06355, (q31_t)0x49bb0271, (q31_t)0xc0be7901,\n    (q31_t)0x49ae96aa, (q31_t)0xc0bc911d, (q31_t)0x49a22a83, (q31_t)0xc0baabaa,\n    (q31_t)0x4995bdfd, (q31_t)0xc0b8c8a7, (q31_t)0x49895118, (q31_t)0xc0b6e815,\n    (q31_t)0x497ce3d5, (q31_t)0xc0b509f3, (q31_t)0x49707635, (q31_t)0xc0b32e42,\n    (q31_t)0x49640837, (q31_t)0xc0b15502, (q31_t)0x495799dd, (q31_t)0xc0af7e33,\n    (q31_t)0x494b2b27, (q31_t)0xc0ada9d4, (q31_t)0x493ebc14, (q31_t)0xc0abd7e6,\n    (q31_t)0x49324ca7, (q31_t)0xc0aa086a, (q31_t)0x4925dcdf, (q31_t)0xc0a83b5e,\n    (q31_t)0x49196cbc, (q31_t)0xc0a670c4, (q31_t)0x490cfc40, (q31_t)0xc0a4a89b,\n    (q31_t)0x49008b6a, (q31_t)0xc0a2e2e3, (q31_t)0x48f41a3c, (q31_t)0xc0a11f9d,\n    (q31_t)0x48e7a8b5, (q31_t)0xc09f5ec8, (q31_t)0x48db36d6, (q31_t)0xc09da065,\n    (q31_t)0x48cec4a0, (q31_t)0xc09be473, (q31_t)0x48c25213, (q31_t)0xc09a2af3,\n    (q31_t)0x48b5df30, (q31_t)0xc09873e4, (q31_t)0x48a96bf6, (q31_t)0xc096bf48,\n    (q31_t)0x489cf867, (q31_t)0xc0950d1d, (q31_t)0x48908483, (q31_t)0xc0935d64,\n    (q31_t)0x4884104b, (q31_t)0xc091b01d, (q31_t)0x48779bbe, (q31_t)0xc0900548,\n    (q31_t)0x486b26de, (q31_t)0xc08e5ce5, (q31_t)0x485eb1ab, (q31_t)0xc08cb6f5,\n    (q31_t)0x48523c25, (q31_t)0xc08b1376, (q31_t)0x4845c64d, (q31_t)0xc089726a,\n    (q31_t)0x48395024, (q31_t)0xc087d3d0, (q31_t)0x482cd9a9, (q31_t)0xc08637a9,\n    (q31_t)0x482062de, (q31_t)0xc0849df4, (q31_t)0x4813ebc2, (q31_t)0xc08306b2,\n    (q31_t)0x48077457, (q31_t)0xc08171e2, (q31_t)0x47fafc9c, (q31_t)0xc07fdf85,\n    (q31_t)0x47ee8493, (q31_t)0xc07e4f9b, (q31_t)0x47e20c3b, (q31_t)0xc07cc223,\n    (q31_t)0x47d59396, (q31_t)0xc07b371e, (q31_t)0x47c91aa3, (q31_t)0xc079ae8c,\n    (q31_t)0x47bca163, (q31_t)0xc078286e, (q31_t)0x47b027d7, (q31_t)0xc076a4c2,\n    (q31_t)0x47a3adff, (q31_t)0xc0752389, (q31_t)0x479733dc, (q31_t)0xc073a4c3,\n    (q31_t)0x478ab96e, (q31_t)0xc0722871, (q31_t)0x477e3eb5, (q31_t)0xc070ae92,\n    (q31_t)0x4771c3b3, (q31_t)0xc06f3726, (q31_t)0x47654867, (q31_t)0xc06dc22e,\n    (q31_t)0x4758ccd2, (q31_t)0xc06c4fa8, (q31_t)0x474c50f4, (q31_t)0xc06adf97,\n    (q31_t)0x473fd4cf, (q31_t)0xc06971f9, (q31_t)0x47335862, (q31_t)0xc06806ce,\n    (q31_t)0x4726dbae, (q31_t)0xc0669e18, (q31_t)0x471a5eb3, (q31_t)0xc06537d4,\n    (q31_t)0x470de172, (q31_t)0xc063d405, (q31_t)0x470163eb, (q31_t)0xc06272aa,\n    (q31_t)0x46f4e620, (q31_t)0xc06113c2, (q31_t)0x46e86810, (q31_t)0xc05fb74e,\n    (q31_t)0x46dbe9bb, (q31_t)0xc05e5d4e, (q31_t)0x46cf6b23, (q31_t)0xc05d05c3,\n    (q31_t)0x46c2ec48, (q31_t)0xc05bb0ab, (q31_t)0x46b66d29, (q31_t)0xc05a5e07,\n    (q31_t)0x46a9edc9, (q31_t)0xc0590dd8, (q31_t)0x469d6e27, (q31_t)0xc057c01d,\n    (q31_t)0x4690ee44, (q31_t)0xc05674d6, (q31_t)0x46846e1f, (q31_t)0xc0552c03,\n    (q31_t)0x4677edbb, (q31_t)0xc053e5a5, (q31_t)0x466b6d16, (q31_t)0xc052a1bb,\n    (q31_t)0x465eec33, (q31_t)0xc0516045, (q31_t)0x46526b10, (q31_t)0xc0502145,\n    (q31_t)0x4645e9af, (q31_t)0xc04ee4b8, (q31_t)0x46396810, (q31_t)0xc04daaa1,\n    (q31_t)0x462ce634, (q31_t)0xc04c72fe, (q31_t)0x4620641a, (q31_t)0xc04b3dcf,\n    (q31_t)0x4613e1c5, (q31_t)0xc04a0b16, (q31_t)0x46075f33, (q31_t)0xc048dad1,\n    (q31_t)0x45fadc66, (q31_t)0xc047ad01, (q31_t)0x45ee595d, (q31_t)0xc04681a6,\n    (q31_t)0x45e1d61b, (q31_t)0xc04558c0, (q31_t)0x45d5529e, (q31_t)0xc044324f,\n    (q31_t)0x45c8cee7, (q31_t)0xc0430e53, (q31_t)0x45bc4af8, (q31_t)0xc041eccc,\n    (q31_t)0x45afc6d0, (q31_t)0xc040cdba, (q31_t)0x45a3426f, (q31_t)0xc03fb11d,\n    (q31_t)0x4596bdd7, (q31_t)0xc03e96f6, (q31_t)0x458a3908, (q31_t)0xc03d7f44,\n    (q31_t)0x457db403, (q31_t)0xc03c6a07, (q31_t)0x45712ec7, (q31_t)0xc03b573f,\n    (q31_t)0x4564a955, (q31_t)0xc03a46ed, (q31_t)0x455823ae, (q31_t)0xc0393910,\n    (q31_t)0x454b9dd3, (q31_t)0xc0382da8, (q31_t)0x453f17c3, (q31_t)0xc03724b6,\n    (q31_t)0x4532917f, (q31_t)0xc0361e3a, (q31_t)0x45260b08, (q31_t)0xc0351a33,\n    (q31_t)0x4519845e, (q31_t)0xc03418a2, (q31_t)0x450cfd82, (q31_t)0xc0331986,\n    (q31_t)0x45007674, (q31_t)0xc0321ce0, (q31_t)0x44f3ef35, (q31_t)0xc03122b0,\n    (q31_t)0x44e767c5, (q31_t)0xc0302af5, (q31_t)0x44dae024, (q31_t)0xc02f35b1,\n    (q31_t)0x44ce5854, (q31_t)0xc02e42e2, (q31_t)0x44c1d054, (q31_t)0xc02d5289,\n    (q31_t)0x44b54825, (q31_t)0xc02c64a6, (q31_t)0x44a8bfc7, (q31_t)0xc02b7939,\n    (q31_t)0x449c373c, (q31_t)0xc02a9042, (q31_t)0x448fae83, (q31_t)0xc029a9c1,\n    (q31_t)0x4483259d, (q31_t)0xc028c5b6, (q31_t)0x44769c8b, (q31_t)0xc027e421,\n    (q31_t)0x446a134c, (q31_t)0xc0270502, (q31_t)0x445d89e2, (q31_t)0xc0262859,\n    (q31_t)0x4451004d, (q31_t)0xc0254e27, (q31_t)0x4444768d, (q31_t)0xc024766a,\n    (q31_t)0x4437eca4, (q31_t)0xc023a124, (q31_t)0x442b6290, (q31_t)0xc022ce54,\n    (q31_t)0x441ed854, (q31_t)0xc021fdfb, (q31_t)0x44124dee, (q31_t)0xc0213018,\n    (q31_t)0x4405c361, (q31_t)0xc02064ab, (q31_t)0x43f938ac, (q31_t)0xc01f9bb5,\n    (q31_t)0x43ecadcf, (q31_t)0xc01ed535, (q31_t)0x43e022cc, (q31_t)0xc01e112b,\n    (q31_t)0x43d397a3, (q31_t)0xc01d4f99, (q31_t)0x43c70c54, (q31_t)0xc01c907c,\n    (q31_t)0x43ba80df, (q31_t)0xc01bd3d6, (q31_t)0x43adf546, (q31_t)0xc01b19a7,\n    (q31_t)0x43a16988, (q31_t)0xc01a61ee, (q31_t)0x4394dda7, (q31_t)0xc019acac,\n    (q31_t)0x438851a2, (q31_t)0xc018f9e1, (q31_t)0x437bc57b, (q31_t)0xc018498c,\n    (q31_t)0x436f3931, (q31_t)0xc0179bae, (q31_t)0x4362acc5, (q31_t)0xc016f047,\n    (q31_t)0x43562038, (q31_t)0xc0164757, (q31_t)0x43499389, (q31_t)0xc015a0dd,\n    (q31_t)0x433d06bb, (q31_t)0xc014fcda, (q31_t)0x433079cc, (q31_t)0xc0145b4e,\n    (q31_t)0x4323ecbe, (q31_t)0xc013bc39, (q31_t)0x43175f91, (q31_t)0xc0131f9b,\n    (q31_t)0x430ad245, (q31_t)0xc0128574, (q31_t)0x42fe44dc, (q31_t)0xc011edc3,\n    (q31_t)0x42f1b755, (q31_t)0xc011588a, (q31_t)0x42e529b0, (q31_t)0xc010c5c7,\n    (q31_t)0x42d89bf0, (q31_t)0xc010357c, (q31_t)0x42cc0e13, (q31_t)0xc00fa7a8,\n    (q31_t)0x42bf801a, (q31_t)0xc00f1c4a, (q31_t)0x42b2f207, (q31_t)0xc00e9364,\n    (q31_t)0x42a663d8, (q31_t)0xc00e0cf5, (q31_t)0x4299d590, (q31_t)0xc00d88fd,\n    (q31_t)0x428d472e, (q31_t)0xc00d077c, (q31_t)0x4280b8b3, (q31_t)0xc00c8872,\n    (q31_t)0x42742a1f, (q31_t)0xc00c0be0, (q31_t)0x42679b73, (q31_t)0xc00b91c4,\n    (q31_t)0x425b0caf, (q31_t)0xc00b1a20, (q31_t)0x424e7dd4, (q31_t)0xc00aa4f3,\n    (q31_t)0x4241eee2, (q31_t)0xc00a323d, (q31_t)0x42355fd9, (q31_t)0xc009c1ff,\n    (q31_t)0x4228d0bb, (q31_t)0xc0095438, (q31_t)0x421c4188, (q31_t)0xc008e8e8,\n    (q31_t)0x420fb240, (q31_t)0xc008800f, (q31_t)0x420322e3, (q31_t)0xc00819ae,\n    (q31_t)0x41f69373, (q31_t)0xc007b5c4, (q31_t)0x41ea03ef, (q31_t)0xc0075452,\n    (q31_t)0x41dd7459, (q31_t)0xc006f556, (q31_t)0x41d0e4b0, (q31_t)0xc00698d3,\n    (q31_t)0x41c454f5, (q31_t)0xc0063ec6, (q31_t)0x41b7c528, (q31_t)0xc005e731,\n    (q31_t)0x41ab354b, (q31_t)0xc0059214, (q31_t)0x419ea55d, (q31_t)0xc0053f6e,\n    (q31_t)0x4192155f, (q31_t)0xc004ef3f, (q31_t)0x41858552, (q31_t)0xc004a188,\n    (q31_t)0x4178f536, (q31_t)0xc0045648, (q31_t)0x416c650b, (q31_t)0xc0040d80,\n    (q31_t)0x415fd4d2, (q31_t)0xc003c72f, (q31_t)0x4153448c, (q31_t)0xc0038356,\n    (q31_t)0x4146b438, (q31_t)0xc00341f4, (q31_t)0x413a23d8, (q31_t)0xc003030a,\n    (q31_t)0x412d936c, (q31_t)0xc002c697, (q31_t)0x412102f4, (q31_t)0xc0028c9c,\n    (q31_t)0x41147271, (q31_t)0xc0025519, (q31_t)0x4107e1e3, (q31_t)0xc002200d,\n    (q31_t)0x40fb514b, (q31_t)0xc001ed78, (q31_t)0x40eec0aa, (q31_t)0xc001bd5c,\n    (q31_t)0x40e22fff, (q31_t)0xc0018fb6, (q31_t)0x40d59f4c, (q31_t)0xc0016489,\n    (q31_t)0x40c90e90, (q31_t)0xc0013bd3, (q31_t)0x40bc7dcc, (q31_t)0xc0011594,\n    (q31_t)0x40afed02, (q31_t)0xc000f1ce, (q31_t)0x40a35c30, (q31_t)0xc000d07e,\n    (q31_t)0x4096cb58, (q31_t)0xc000b1a7, (q31_t)0x408a3a7b, (q31_t)0xc0009547,\n    (q31_t)0x407da998, (q31_t)0xc0007b5f, (q31_t)0x407118b0, (q31_t)0xc00063ee,\n    (q31_t)0x406487c4, (q31_t)0xc0004ef5, (q31_t)0x4057f6d4, (q31_t)0xc0003c74,\n    (q31_t)0x404b65e1, (q31_t)0xc0002c6a, (q31_t)0x403ed4ea, (q31_t)0xc0001ed8,\n    (q31_t)0x403243f1, (q31_t)0xc00013bd, (q31_t)0x4025b2f7, (q31_t)0xc0000b1a,\n    (q31_t)0x401921fb, (q31_t)0xc00004ef, (q31_t)0x400c90fe, (q31_t)0xc000013c,\n};\n\n/**\n  @} end of RealFFT_Table group\n */\n\n/**\n  @addtogroup RealFFT\n  @{\n */\n\n/**\n  @brief         Initialization function for the Q31 RFFT/RIFFT.\n  @param[in,out] S              points to an instance of the Q31 RFFT/RIFFT\n  structure\n  @param[in]     fftLenReal     length of the FFT\n  @param[in]     ifftFlagR      flag that selects transform direction\n                   - value = 0: forward transform\n                   - value = 1: inverse transform\n  @param[in]     bitReverseFlag flag that enables / disables bit reversal of\n  output\n                   - value = 0: disables bit reversal of output\n                   - value = 1: enables bit reversal of output\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : Operation successful\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is\n  not a supported length\n\n  @par           Details\n                   The parameter fftLenReal specifies length of\n  RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024,\n  2048, 4096, 8192.\n  @par\n                   The parameter ifftFlagR controls whether a\n  forward or inverse transform is computed. Set(=1) ifftFlagR to calculate\n  RIFFT, otherwise RFFT is calculated.\n  @par\n                   The parameter bitReverseFlag controls whether\n  output is in normal order or bit reversed order. Set(=1) bitReverseFlag for\n  output to be in normal order otherwise output is in bit reversed order.\n  @par\n                   This function also initializes Twiddle factor table.\n*/\n\narm_status arm_rfft_init_q31(arm_rfft_instance_q31 *S, uint32_t fftLenReal,\n                             uint32_t ifftFlagR, uint32_t bitReverseFlag) {\n  /*  Initialise the default arm status */\n  arm_status status = ARM_MATH_SUCCESS;\n\n  /*  Initialize the Real FFT length */\n  S->fftLenReal = (uint16_t)fftLenReal;\n\n  /*  Initialize the Twiddle coefficientA pointer */\n  S->pTwiddleAReal = (q31_t *)realCoefAQ31;\n\n  /*  Initialize the Twiddle coefficientB pointer */\n  S->pTwiddleBReal = (q31_t *)realCoefBQ31;\n\n  /*  Initialize the Flag for selection of RFFT or RIFFT */\n  S->ifftFlagR = (uint8_t)ifftFlagR;\n\n  /*  Initialize the Flag for calculation Bit reversal or not */\n  S->bitReverseFlagR = (uint8_t)bitReverseFlag;\n\n  /*  Initialization of coef modifier depending on the FFT length */\n  switch (S->fftLenReal) {\n  case 8192U:\n    S->twidCoefRModifier = 1U;\n    S->pCfft = &arm_cfft_sR_q31_len4096;\n    break;\n  case 4096U:\n    S->twidCoefRModifier = 2U;\n    S->pCfft = &arm_cfft_sR_q31_len2048;\n    break;\n  case 2048U:\n    S->twidCoefRModifier = 4U;\n    S->pCfft = &arm_cfft_sR_q31_len1024;\n    break;\n  case 1024U:\n    S->twidCoefRModifier = 8U;\n    S->pCfft = &arm_cfft_sR_q31_len512;\n    break;\n  case 512U:\n    S->twidCoefRModifier = 16U;\n    S->pCfft = &arm_cfft_sR_q31_len256;\n    break;\n  case 256U:\n    S->twidCoefRModifier = 32U;\n    S->pCfft = &arm_cfft_sR_q31_len128;\n    break;\n  case 128U:\n    S->twidCoefRModifier = 64U;\n    S->pCfft = &arm_cfft_sR_q31_len64;\n    break;\n  case 64U:\n    S->twidCoefRModifier = 128U;\n    S->pCfft = &arm_cfft_sR_q31_len32;\n    break;\n  case 32U:\n    S->twidCoefRModifier = 256U;\n    S->pCfft = &arm_cfft_sR_q31_len16;\n    break;\n  default:\n    /*  Reporting argument error if rfftSize is not valid value */\n    status = ARM_MATH_ARGUMENT_ERROR;\n    break;\n  }\n\n  /* return the status of RFFT Init function */\n  return (status);\n}\n\n/**\n  @} end of RealFFT group\n */\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_rfft_q15.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rfft_q15.c\n * Description:  RFFT & RIFFT Q15 process function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/* ----------------------------------------------------------------------\n * Internal functions prototypes\n * -------------------------------------------------------------------- */\n\nvoid arm_split_rfft_q15(q15_t *pSrc, uint32_t fftLen, const q15_t *pATable,\n                        const q15_t *pBTable, q15_t *pDst, uint32_t modifier);\n\nvoid arm_split_rifft_q15(q15_t *pSrc, uint32_t fftLen, const q15_t *pATable,\n                         const q15_t *pBTable, q15_t *pDst, uint32_t modifier);\n\n/**\n  @addtogroup RealFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the Q15 RFFT/RIFFT.\n  @param[in]     S     points to an instance of the Q15 RFFT/RIFFT structure\n  @param[in]     pSrc  points to input buffer\n  @param[out]    pDst  points to output buffer\n  @return        none\n\n  @par           Input an output formats\n                   Internally input is downscaled by 2 for every stage to avoid\n  saturations inside CFFT/CIFFT process. Hence the output format is different\n  for different RFFT sizes. The input and output formats for different RFFT\n  sizes and number of bits to upscale are mentioned in the tables below for RFFT\n  and RIFFT:\n  @par\n                   \\image html RFFTQ15.gif \"Input and Output Formats for Q15\n  RFFT\"\n  @par\n                   \\image html RIFFTQ15.gif \"Input and Output Formats for Q15\n  RIFFT\"\n */\n\nvoid arm_rfft_q15(const arm_rfft_instance_q15 *S, q15_t *pSrc, q15_t *pDst) {\n  const arm_cfft_instance_q15 *S_CFFT = S->pCfft;\n  uint32_t L2 = S->fftLenReal >> 1U;\n  uint32_t i;\n\n  /* Calculation of RIFFT of input */\n  if (S->ifftFlagR == 1U) {\n    /*  Real IFFT core process */\n    arm_split_rifft_q15(pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst,\n                        S->twidCoefRModifier);\n\n    /* Complex IFFT process */\n    arm_cfft_q15(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);\n\n    for (i = 0; i < S->fftLenReal; i++) {\n      pDst[i] = pDst[i] << 1U;\n    }\n  } else {\n    /* Calculation of RFFT of input */\n\n    /* Complex FFT process */\n    arm_cfft_q15(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);\n\n    /*  Real FFT core process */\n    arm_split_rfft_q15(pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst,\n                       S->twidCoefRModifier);\n  }\n}\n\n/**\n  @} end of RealFFT group\n */\n\n/**\n  @brief         Core Real FFT process\n  @param[in]     pSrc      points to input buffer\n  @param[in]     fftLen    length of FFT\n  @param[in]     pATable   points to twiddle Coef A buffer\n  @param[in]     pBTable   points to twiddle Coef B buffer\n  @param[out]    pDst      points to output buffer\n  @param[in]     modifier  twiddle coefficient modifier that supports different\n  size FFTs with the same twiddle factor table\n  @return        none\n\n  @par\n                   The function implements a Real FFT\n */\n\nvoid arm_split_rfft_q15(q15_t *pSrc, uint32_t fftLen, const q15_t *pATable,\n                        const q15_t *pBTable, q15_t *pDst, uint32_t modifier) {\n  uint32_t i;                   /* Loop Counter */\n  q31_t outR, outI;             /* Temporary variables for output */\n  const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */\n  q15_t *pSrc1, *pSrc2;\n#if defined(ARM_MATH_DSP)\n  q15_t *pD1, *pD2;\n#endif\n\n  /* Init coefficient pointers */\n  pCoefA = &pATable[modifier * 2];\n  pCoefB = &pBTable[modifier * 2];\n\n  pSrc1 = &pSrc[2];\n  pSrc2 = &pSrc[(2U * fftLen) - 2U];\n\n#if defined(ARM_MATH_DSP)\n\n  i = 1U;\n  pD1 = pDst + 2;\n  pD2 = pDst + (4U * fftLen) - 2;\n\n  for (i = fftLen - 1; i > 0; i--) {\n    /*\n      outR = (  pSrc[2 * i]             * pATable[2 * i]\n              - pSrc[2 * i + 1]         * pATable[2 * i + 1]\n              + pSrc[2 * n - 2 * i]     * pBTable[2 * i]\n              + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);\n\n      outI = (  pIn[2 * i + 1]         * pATable[2 * i]\n              + pIn[2 * i]             * pATable[2 * i + 1]\n              + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i])\n     */\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */\n    outR = __SMUSD(read_q15x2(pSrc1), read_q15x2((q15_t *)pCoefA));\n#else\n    /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */\n    outR = -(__SMUSD(read_q15x2(pSrc1), read_q15x2((q15_t *)pCoefA)));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + pSrc[2 * n - 2 * i + 1] *\n     * pBTable[2 * i + 1]) */\n    outR = __SMLAD(read_q15x2(pSrc2), read_q15x2((q15_t *)pCoefB), outR) >> 16U;\n\n    /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - pIn[2 * n - 2 * i + 1] *\n     * pBTable[2 * i] */\n#ifndef ARM_MATH_BIG_ENDIAN\n    outI = __SMUSDX(read_q15x2_da(&pSrc2), read_q15x2((q15_t *)pCoefB));\n#else\n    outI = __SMUSDX(read_q15x2((q15_t *)pCoefB), read_q15x2_da(&pSrc2));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */\n    outI = __SMLADX(read_q15x2_ia(&pSrc1), read_q15x2((q15_t *)pCoefA), outI);\n\n    /* write output */\n    *pD1++ = (q15_t)outR;\n    *pD1++ = outI >> 16U;\n\n    /* write complex conjugate output */\n    pD2[0] = (q15_t)outR;\n    pD2[1] = -(outI >> 16U);\n    pD2 -= 2;\n\n    /* update coefficient pointer */\n    pCoefB = pCoefB + (2U * modifier);\n    pCoefA = pCoefA + (2U * modifier);\n  }\n\n  pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1U;\n  pDst[2U * fftLen + 1U] = 0;\n\n  pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;\n  pDst[1] = 0;\n\n#else\n\n  i = 1U;\n\n  while (i < fftLen) {\n    /*\n      outR = (  pSrc[2 * i]             * pATable[2 * i]\n              - pSrc[2 * i + 1]         * pATable[2 * i + 1]\n              + pSrc[2 * n - 2 * i]     * pBTable[2 * i]\n              + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);\n    */\n\n    outR = *pSrc1 * *pCoefA;\n    outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));\n    outR = outR + (*pSrc2 * *pCoefB);\n    outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;\n\n    /*\n      outI = (  pIn[2 * i + 1]         * pATable[2 * i]\n              + pIn[2 * i]             * pATable[2 * i + 1]\n              + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);\n    */\n\n    outI = *pSrc2 * *(pCoefB + 1);\n    outI = outI - (*(pSrc2 + 1) * *pCoefB);\n    outI = outI + (*(pSrc1 + 1) * *pCoefA);\n    outI = outI + (*pSrc1 * *(pCoefA + 1));\n\n    /* update input pointers */\n    pSrc1 += 2U;\n    pSrc2 -= 2U;\n\n    /* write output */\n    pDst[2U * i] = (q15_t)outR;\n    pDst[2U * i + 1U] = outI >> 16U;\n\n    /* write complex conjugate output */\n    pDst[(4U * fftLen) - (2U * i)] = (q15_t)outR;\n    pDst[((4U * fftLen) - (2U * i)) + 1U] = -(outI >> 16U);\n\n    /* update coefficient pointer */\n    pCoefB = pCoefB + (2U * modifier);\n    pCoefA = pCoefA + (2U * modifier);\n\n    i++;\n  }\n\n  pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;\n  pDst[2U * fftLen + 1U] = 0;\n\n  pDst[0] = (pSrc[0] + pSrc[1]) >> 1;\n  pDst[1] = 0;\n\n#endif /* #if defined (ARM_MATH_DSP) */\n}\n\n/**\n  @brief         Core Real IFFT process\n  @param[in]     pSrc      points to input buffer\n  @param[in]     fftLen    length of FFT\n  @param[in]     pATable   points to twiddle Coef A buffer\n  @param[in]     pBTable   points to twiddle Coef B buffer\n  @param[out]    pDst      points to output buffer\n  @param[in]     modifier  twiddle coefficient modifier that supports different\n  size FFTs with the same twiddle factor table\n  @return        none\n\n  @par\n                   The function implements a Real IFFT\n */\n\nvoid arm_split_rifft_q15(q15_t *pSrc, uint32_t fftLen, const q15_t *pATable,\n                         const q15_t *pBTable, q15_t *pDst, uint32_t modifier) {\n  uint32_t i;                   /* Loop Counter */\n  q31_t outR, outI;             /* Temporary variables for output */\n  const q15_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */\n  q15_t *pSrc1, *pSrc2;\n  q15_t *pDst1 = &pDst[0];\n\n  pCoefA = &pATable[0];\n  pCoefB = &pBTable[0];\n\n  pSrc1 = &pSrc[0];\n  pSrc2 = &pSrc[2 * fftLen];\n\n  i = fftLen;\n  while (i > 0U) {\n    /*\n      outR = (  pIn[2 * i]             * pATable[2 * i]\n              + pIn[2 * i + 1]         * pATable[2 * i + 1]\n              + pIn[2 * n - 2 * i]     * pBTable[2 * i]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);\n\n      outI = (  pIn[2 * i + 1]         * pATable[2 * i]\n              - pIn[2 * i]             * pATable[2 * i + 1]\n              - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);\n     */\n\n#if defined(ARM_MATH_DSP)\n\n#ifndef ARM_MATH_BIG_ENDIAN\n    /* pIn[2 * n - 2 * i] * pBTable[2 * i] - pIn[2 * n - 2 * i + 1] * pBTable[2\n     * * i + 1]) */\n    outR = __SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *)pCoefB));\n#else\n    /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + pIn[2 * n - 2 * i + 1] *\n     * pBTable[2 * i + 1])) */\n    outR = -(__SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *)pCoefB)));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + pIn[2\n     * * n - 2 * i] * pBTable[2 * i] */\n    outR = __SMLAD(read_q15x2(pSrc1), read_q15x2((q15_t *)pCoefA), outR) >> 16U;\n\n    /* -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + pIn[2 * n - 2 * i + 1] *\n     * pBTable[2 * i] */\n    outI = __SMUADX(read_q15x2_da(&pSrc2), read_q15x2((q15_t *)pCoefB));\n\n    /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */\n#ifndef ARM_MATH_BIG_ENDIAN\n    outI = __SMLSDX(read_q15x2((q15_t *)pCoefA), read_q15x2_ia(&pSrc1), -outI);\n#else\n    outI = __SMLSDX(read_q15x2_ia(&pSrc1), read_q15x2((q15_t *)pCoefA), -outI);\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n    /* write output */\n#ifndef ARM_MATH_BIG_ENDIAN\n    write_q15x2_ia(&pDst1, __PKHBT(outR, (outI >> 16U), 16));\n#else\n    write_q15x2_ia(&pDst1, __PKHBT((outI >> 16U), outR, 16));\n#endif /* #ifndef ARM_MATH_BIG_ENDIAN */\n\n#else /* #if defined (ARM_MATH_DSP) */\n\n    outR = *pSrc2 * *pCoefB;\n    outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));\n    outR = outR + (*pSrc1 * *pCoefA);\n    outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;\n\n    outI = *(pSrc1 + 1) * *pCoefA;\n    outI = outI - (*pSrc1 * *(pCoefA + 1));\n    outI = outI - (*pSrc2 * *(pCoefB + 1));\n    outI = outI - (*(pSrc2 + 1) * *(pCoefB));\n\n    /* update input pointers */\n    pSrc1 += 2U;\n    pSrc2 -= 2U;\n\n    /* write output */\n    *pDst1++ = (q15_t)outR;\n    *pDst1++ = (q15_t)(outI >> 16);\n\n#endif /* #if defined (ARM_MATH_DSP) */\n\n    /* update coefficient pointer */\n    pCoefB = pCoefB + (2 * modifier);\n    pCoefA = pCoefA + (2 * modifier);\n\n    i--;\n  }\n}\n"
  },
  {
    "path": "platform/cmsis/DSP_Lib/TransformFunctions/arm_rfft_q31.c",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_rfft_q31.c\n * Description:  FFT & RIFFT Q31 process function\n *\n * $Date:        18. March 2019\n * $Revision:    V1.6.0\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"arm_math.h\"\n\n/* ----------------------------------------------------------------------\n * Internal functions prototypes\n * -------------------------------------------------------------------- */\n\nvoid arm_split_rfft_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pATable,\n                        const q31_t *pBTable, q31_t *pDst, uint32_t modifier);\n\nvoid arm_split_rifft_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pATable,\n                         const q31_t *pBTable, q31_t *pDst, uint32_t modifier);\n\n/**\n  @addtogroup RealFFT\n  @{\n */\n\n/**\n  @brief         Processing function for the Q31 RFFT/RIFFT.\n  @param[in]     S     points to an instance of the Q31 RFFT/RIFFT structure\n  @param[in]     pSrc  points to input buffer\n  @param[out]    pDst  points to output buffer\n  @return        none\n\n  @par           Input an output formats\n                   Internally input is downscaled by 2 for every stage to avoid\n  saturations inside CFFT/CIFFT process. Hence the output format is different\n  for different RFFT sizes. The input and output formats for different RFFT\n  sizes and number of bits to upscale are mentioned in the tables below for RFFT\n  and RIFFT:\n  @par\n                   \\image html RFFTQ31.gif \"Input and Output Formats for Q31\n  RFFT\"\n  @par\n                   \\image html RIFFTQ31.gif \"Input and Output Formats for Q31\n  RIFFT\"\n */\n\nvoid arm_rfft_q31(const arm_rfft_instance_q31 *S, q31_t *pSrc, q31_t *pDst) {\n  const arm_cfft_instance_q31 *S_CFFT = S->pCfft;\n  uint32_t L2 = S->fftLenReal >> 1U;\n  uint32_t i;\n\n  /* Calculation of RIFFT of input */\n  if (S->ifftFlagR == 1U) {\n    /*  Real IFFT core process */\n    arm_split_rifft_q31(pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst,\n                        S->twidCoefRModifier);\n\n    /* Complex IFFT process */\n    arm_cfft_q31(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);\n\n    for (i = 0; i < S->fftLenReal; i++) {\n      pDst[i] = pDst[i] << 1U;\n    }\n  } else {\n    /* Calculation of RFFT of input */\n\n    /* Complex FFT process */\n    arm_cfft_q31(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);\n\n    /*  Real FFT core process */\n    arm_split_rfft_q31(pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst,\n                       S->twidCoefRModifier);\n  }\n}\n\n/**\n  @} end of RealFFT group\n */\n\n/**\n  @brief         Core Real FFT process\n  @param[in]     pSrc      points to input buffer\n  @param[in]     fftLen    length of FFT\n  @param[in]     pATable   points to twiddle Coef A buffer\n  @param[in]     pBTable   points to twiddle Coef B buffer\n  @param[out]    pDst      points to output buffer\n  @param[in]     modifier  twiddle coefficient modifier that supports different\n  size FFTs with the same twiddle factor table\n  @return        none\n */\n\nvoid arm_split_rfft_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pATable,\n                        const q31_t *pBTable, q31_t *pDst, uint32_t modifier) {\n  uint32_t i;                   /* Loop Counter */\n  q31_t outR, outI;             /* Temporary variables for output */\n  const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */\n  q31_t CoefA1, CoefA2,\n      CoefB1; /* Temporary variables for twiddle coefficients */\n  q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[4 * fftLen - 1];\n  q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[2 * fftLen - 1];\n\n  /* Init coefficient pointers */\n  pCoefA = &pATable[modifier * 2];\n  pCoefB = &pBTable[modifier * 2];\n\n  i = fftLen - 1U;\n\n  while (i > 0U) {\n    /*\n      outR = (  pSrc[2 * i]             * pATable[2 * i]\n              - pSrc[2 * i + 1]         * pATable[2 * i + 1]\n              + pSrc[2 * n - 2 * i]     * pBTable[2 * i]\n              + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);\n\n      outI = (  pIn[2 * i + 1]         * pATable[2 * i]\n              + pIn[2 * i]             * pATable[2 * i + 1]\n              + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);\n     */\n\n    CoefA1 = *pCoefA++;\n    CoefA2 = *pCoefA;\n\n    /* outR = (pSrc[2 * i] * pATable[2 * i] */\n    mult_32x32_keep32_R(outR, *pIn1, CoefA1);\n\n    /* outI = pIn[2 * i] * pATable[2 * i + 1] */\n    mult_32x32_keep32_R(outI, *pIn1++, CoefA2);\n\n    /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */\n    multSub_32x32_keep32_R(outR, *pIn1, CoefA2);\n\n    /* (pIn[2 * i + 1] * pATable[2 * i] */\n    multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);\n\n    /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */\n    multSub_32x32_keep32_R(outR, *pIn2, CoefA2);\n    CoefB1 = *pCoefB;\n\n    /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */\n    multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);\n\n    /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */\n    multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);\n\n    /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */\n    multSub_32x32_keep32_R(outI, *pIn2--, CoefA2);\n\n    /* write output */\n    *pOut1++ = outR;\n    *pOut1++ = outI;\n\n    /* write complex conjugate output */\n    *pOut2-- = -outI;\n    *pOut2-- = outR;\n\n    /* update coefficient pointer */\n    pCoefB = pCoefB + (2 * modifier);\n    pCoefA = pCoefA + (2 * modifier - 1);\n\n    /* Decrement loop count */\n    i--;\n  }\n\n  pDst[2 * fftLen] = (pSrc[0] - pSrc[1]) >> 1U;\n  pDst[2 * fftLen + 1] = 0;\n\n  pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;\n  pDst[1] = 0;\n}\n\n/**\n  @brief         Core Real IFFT process\n  @param[in]     pSrc      points to input buffer\n  @param[in]     fftLen    length of FFT\n  @param[in]     pATable   points to twiddle Coef A buffer\n  @param[in]     pBTable   points to twiddle Coef B buffer\n  @param[out]    pDst      points to output buffer\n  @param[in]     modifier  twiddle coefficient modifier that supports different\n  size FFTs with the same twiddle factor table\n  @return        none\n */\n\nvoid arm_split_rifft_q31(q31_t *pSrc, uint32_t fftLen, const q31_t *pATable,\n                         const q31_t *pBTable, q31_t *pDst, uint32_t modifier) {\n  q31_t outR, outI;             /* Temporary variables for output */\n  const q31_t *pCoefA, *pCoefB; /* Temporary pointers for twiddle factors */\n  q31_t CoefA1, CoefA2,\n      CoefB1; /* Temporary variables for twiddle coefficients */\n  q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[2 * fftLen + 1];\n\n  pCoefA = &pATable[0];\n  pCoefB = &pBTable[0];\n\n  while (fftLen > 0U) {\n    /*\n      outR = (  pIn[2 * i]             * pATable[2 * i]\n              + pIn[2 * i + 1]         * pATable[2 * i + 1]\n              + pIn[2 * n - 2 * i]     * pBTable[2 * i]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);\n\n      outI = (  pIn[2 * i + 1]         * pATable[2 * i]\n              - pIn[2 * i]             * pATable[2 * i + 1]\n              - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]\n              - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);\n     */\n\n    CoefA1 = *pCoefA++;\n    CoefA2 = *pCoefA;\n\n    /* outR = (pIn[2 * i] * pATable[2 * i] */\n    mult_32x32_keep32_R(outR, *pIn1, CoefA1);\n\n    /* - pIn[2 * i] * pATable[2 * i + 1] */\n    mult_32x32_keep32_R(outI, *pIn1++, -CoefA2);\n\n    /* pIn[2 * i + 1] * pATable[2 * i + 1] */\n    multAcc_32x32_keep32_R(outR, *pIn1, CoefA2);\n\n    /* pIn[2 * i + 1] * pATable[2 * i] */\n    multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);\n\n    /* pIn[2 * n - 2 * i] * pBTable[2 * i] */\n    multAcc_32x32_keep32_R(outR, *pIn2, CoefA2);\n    CoefB1 = *pCoefB;\n\n    /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */\n    multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);\n\n    /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */\n    multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);\n\n    /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */\n    multAcc_32x32_keep32_R(outI, *pIn2--, CoefA2);\n\n    /* write output */\n    *pDst++ = outR;\n    *pDst++ = outI;\n\n    /* update coefficient pointer */\n    pCoefB = pCoefB + (modifier * 2);\n    pCoefA = pCoefA + (modifier * 2 - 1);\n\n    /* Decrement loop count */\n    fftLen--;\n  }\n}\n"
  },
  {
    "path": "platform/cmsis/LICENSE.txt",
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  },
  {
    "path": "platform/cmsis/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := cmsis_nvic.o patch.o patch_armv7m.o retarget_armclang_asm.o retarget_armclang.o \\\n                retarget_gcc.o system_ARMCM.o system_cp.o system_utils.o \\\n\t\tstack_protector.o\n\nifeq ($(CPU),m4)\nobj-y += mpu_armv7m.o\nelse\nobj-y += mpu_armv8m.o\nendif\n\nifeq ($(DSP_LIB),1)\nobj-y += DSP_Lib/\nendif\n\nifneq ($(filter a%,$(CPU)),)\nobj-y += ca/\nendif\n\nccflags-y := -I$(obj)/inc\n\nFAULT_FLAGS :=\nUSAGE_FAULT ?= 1\nifeq ($(USAGE_FAULT),1)\nFAULT_FLAGS += -DUSAGE_FAULT\nendif\nBUS_FAULT ?= 1\nifeq ($(BUS_FAULT),1)\nFAULT_FLAGS += -DBUS_FAULT\nendif\nMEM_FAULT ?= 1\nifeq ($(MEM_FAULT),1)\nFAULT_FLAGS += -DMEM_FAULT\nendif\nCFLAGS_system_ARMCM.o += $(FAULT_FLAGS)\nCFLAGS_system_cp.o += $(FAULT_FLAGS)\n\nifeq ($(ACCURATE_DB_TO_FLOAT),1)\nCFLAGS_system_utils.o += -DACCURATE_DB_TO_FLOAT\nendif\nifeq ($(BOOT_CODE_IN_RAM),1)\nCFLAGS_system_utils.o += -DBOOT_CODE_IN_RAM\nendif\n\nifeq ($(CHIP_HAS_PSRAM),1)\nCFLAGS_system_utils.o += -DCHIP_HAS_PSRAM\nendif\nifeq ($(PSRAM_ENABLE),1)\nCFLAGS_system_utils.o += -DPSRAM_ENABLE\nendif\nifeq ($(CHIP_HAS_PSRAMUHS),1)\nCFLAGS_system_utils.o += -DCHIP_HAS_PSRAMUHS\nendif\nifeq ($(PSRAMUHS_ENABLE),1)\nCFLAGS_system_utils.o += -DPSRAMUHS_ENABLE\nendif\n\nCFLAGS_retarget_armclang.o += \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/drivers/codec \\\n\t-Iplatform/drivers/norflash\n\nifeq ($(SPI_ROM_ONLY),1)\nCFLAGS_retarget_armclang.o += -DSPI_ROM_ONLY\nendif\n\n"
  },
  {
    "path": "platform/cmsis/ca/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S $(cur_dir)*.cpp))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\nobj-y := $(obj-y:.cpp=.o)\n\nccflags-y := -I$(obj)/../inc/ca\n\nCFLAGS_mmu_ARMCA.o += -DFLASH_SIZE=$(FLASH_SIZE)\nifneq ($(PSRAM_SIZE),)\nCFLAGS_mmu_ARMCA.o += -DPSRAM_SIZE=$(PSRAM_SIZE)\nendif\nifneq ($(PSRAMUHS_SIZE),)\nCFLAGS_mmu_ARMCA.o += -DPSRAMUHS_SIZE=$(PSRAMUHS_SIZE)\nendif\n\nifeq ($(CHIP_HAS_PSRAMUHS),1)\nCFLAGS_system_ARMCA.o += -DCHIP_HAS_PSRAMUHS\nifeq ($(PSRAMUHS_ENABLE),1)\nCFLAGS_system_ARMCA.o += -DPSRAMUHS_ENABLE\nendif\nendif\n"
  },
  {
    "path": "platform/cmsis/ca/cmsis_gic.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"cmsis.h\"\n\n#if defined(__GIC_PRESENT) && (__GIC_PRESENT)\n\n#include \"cmsis_nvic.h\"\n#include \"hal_location.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n\nextern void Reset_Handler(void);\nextern void Undef_Handler(void);\nextern void SVC_Handler(void);\nextern void PAbt_Handler(void);\nextern void DAbt_Handler(void);\nextern void IRQ_Handler(void);\nextern void FIQ_Handler(void);\n\nstruct VECTOR_HDLR_T {\n  uint32_t reset_hdlr;\n  uint32_t undef_hdlr;\n  uint32_t svc_hdlr;\n  uint32_t pabt_hdlr;\n  uint32_t dabt_hdlr;\n  uint32_t hyp_hdlr;\n  uint32_t irq_hdlr;\n  uint32_t fiq_hdlr;\n};\n\nstatic struct VECTOR_HDLR_T *const exc_vector =\n    (struct VECTOR_HDLR_T *)(DSP_BOOT_REG + 0x20);\n\nstatic IRQn_ID_t cur_act_irq = EXCEPTION_NONE;\nstatic uint32_t cur_irq_level;\n\nstatic GIC_FAULT_DUMP_HANDLER_T dump_hdlr;\n\nvoid c_irq_handler(void) {\n  const IRQn_ID_t irqn = IRQ_GetActiveIRQ();\n  const IRQn_ID_t old_irq = cur_act_irq;\n\n  cur_irq_level++;\n  cur_act_irq = irqn;\n\n  IRQHandler_t const handler = IRQ_GetHandler(irqn);\n  if (handler != NULL) {\n    __enable_irq();\n    handler();\n    __disable_irq();\n  }\n  IRQ_EndOfInterrupt(irqn);\n\n  cur_act_irq = old_irq;\n  cur_irq_level--;\n}\n\nvoid c_undef_handler(uint32_t opcode, uint32_t state,\n                     const struct FAULT_REGS_T *regs) {\n  const IRQn_ID_t old_irq = cur_act_irq;\n  cur_act_irq = EXCEPTION_UNDEF;\n\n  if (dump_hdlr) {\n    struct UNDEF_FAULT_INFO_T info;\n\n    info.id = cur_act_irq;\n    info.opcode = opcode;\n    info.state = state;\n    dump_hdlr((uint32_t *)regs, (uint32_t *)&info, sizeof(info));\n  }\n  // ASSERT(false, \"Undefined Instruction!\");\n\n  cur_act_irq = old_irq;\n}\n\nvoid c_svc_handler(uint32_t svc_num, const struct FAULT_REGS_T *regs) {\n  const IRQn_ID_t old_irq = cur_act_irq;\n  cur_act_irq = EXCEPTION_SVC;\n\n  if (dump_hdlr) {\n    struct SVC_FAULT_INFO_T info;\n\n    info.id = cur_act_irq;\n    info.svc_num = svc_num;\n    dump_hdlr((uint32_t *)regs, (uint32_t *)&info, sizeof(info));\n  }\n  // ASSERT(false, \"SVC!\");\n\n  cur_act_irq = old_irq;\n}\n\nvoid c_pabt_handler(uint32_t IFSR, uint32_t IFAR,\n                    const struct FAULT_REGS_T *regs) {\n  const IRQn_ID_t old_irq = cur_act_irq;\n  cur_act_irq = EXCEPTION_PABT;\n\n  if (dump_hdlr) {\n    struct PABT_FAULT_INFO_T info;\n\n    info.id = cur_act_irq;\n    info.IFSR = IFSR;\n    info.IFAR = IFAR;\n    dump_hdlr((uint32_t *)regs, (uint32_t *)&info, sizeof(info));\n  }\n  // ASSERT(false, \"Prefetch Abort!\");\n\n  cur_act_irq = old_irq;\n}\n\nvoid c_dabt_handler(uint32_t DFSR, uint32_t DFAR,\n                    const struct FAULT_REGS_T *regs) {\n  const IRQn_ID_t old_irq = cur_act_irq;\n  cur_act_irq = EXCEPTION_DABT;\n\n  if (dump_hdlr) {\n    struct DABT_FAULT_INFO_T info;\n\n    info.id = cur_act_irq;\n    info.DFSR = DFSR;\n    info.DFAR = DFAR;\n    dump_hdlr((uint32_t *)regs, (uint32_t *)&info, sizeof(info));\n  }\n  // ASSERT(false, \"Data Abort!\");\n\n  cur_act_irq = old_irq;\n}\n\nvoid c_fiq_handler(void) { c_irq_handler(); }\n\nvoid GIC_DisableAllIRQs(void) {\n  int i;\n\n  for (i = 0; i < (USER_IRQn_QTY + 31) / 32; i++) {\n    GICDistributor->ICENABLER[i] = ~0UL;\n  }\n}\nvoid NVIC_DisableAllIRQs(void) __attribute__((alias(\"GIC_DisableAllIRQs\")));\n\nvoid GIC_InitVectors(void) {\n  volatile uint32_t *boot = (volatile uint32_t *)DSP_BOOT_REG;\n\n  // Unlock\n  boot[32] = 0xCAFE0001;\n  __DMB();\n\n  exc_vector->reset_hdlr = (uint32_t)Reset_Handler;\n  exc_vector->undef_hdlr = (uint32_t)Undef_Handler;\n  exc_vector->svc_hdlr = (uint32_t)SVC_Handler;\n  exc_vector->pabt_hdlr = (uint32_t)PAbt_Handler;\n  exc_vector->dabt_hdlr = (uint32_t)DAbt_Handler;\n  exc_vector->irq_hdlr = (uint32_t)IRQ_Handler;\n  exc_vector->fiq_hdlr = (uint32_t)FIQ_Handler;\n\n  // Lock\n  __DMB();\n  boot[32] = 0xCAFE0000;\n  __DMB();\n}\nvoid NVIC_InitVectors(void) __attribute__((alias(\"GIC_InitVectors\")));\n\nvoid GIC_SetFaultDumpHandler(GIC_FAULT_DUMP_HANDLER_T handler) {\n  dump_hdlr = handler;\n}\n\nIRQn_Type IRQ_GetCurrentActiveIRQ(void) { return cur_act_irq; }\nIRQn_Type NVIC_GetCurrentActiveIRQ(void)\n    __attribute__((alias(\"IRQ_GetCurrentActiveIRQ\")));\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/ca/default_irq_ca.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n                .syntax  unified\n                .align   4\n\n                .equ   MODE_USR,        0x10\n                .equ   MODE_FIQ,        0x11\n                .equ   MODE_IRQ,        0x12\n                .equ   MODE_SVC,        0x13\n                .equ   MODE_ABT,        0x17\n                .equ   MODE_UND,        0x1B\n                .equ   MODE_SYS,        0x1F\n                .equ   MODE_MASK,       0x1F\n\n                .equ   CPSR_BIT_T,      0x20\n\n                .equ   SAVED_REG_NUM,   17\n\n//-------------------------------------------------------\n                .section \".text.IRQ_Handler\"\n                .type    IRQ_Handler, %function\n                .global  IRQ_Handler\n                .weak    IRQ_Handler\n                .fnstart\n                .cantunwind\nIRQ_Handler:\n                SUB     LR, LR, #4                  // Pre-adjust LR\n                SRSFD   SP!, #MODE_SVC              // Save LR_irq and SPSR_irq on to the SVC stack\n                CPS     #MODE_SVC                   // Change to SVC mode\n                PUSH    {R0-R3, R12, LR}            // Save APCS corruptible registers\n\n                MOV     R3, SP                      // Move SP into R3\n                AND     R3, R3, #4                  // Get stack adjustment to ensure 8-byte alignment\n                SUB     SP, SP, R3                  // Adjust stack\n                PUSH    {R3, R4}                    // Store stack adjustment(R3) and user data(R4)\n\n                BLX     c_irq_handler\n\n                POP     {R3, R4}                    // Restore stack adjustment(R3) and user data(R4)\n                ADD     SP, SP, R3                  // Unadjust stack\n\n                CLREX                               // Clear exclusive monitor for interrupted code\n                POP     {R0-R3, R12, LR}            // Restore stacked APCS registers\n                RFEFD   SP!                         // Return from IRQ handler\n\n                .fnend\n                .size    IRQ_Handler, .-IRQ_Handler\n\n//-------------------------------------------------------\n                .section \".text.Save_Registers\"\n                .type    Save_Registers, %function\n                .fnstart\n                .cantunwind\nSave_Registers:\n                PUSH    {R12}\n                SUB     SP, SP, #SAVED_REG_NUM*4\n\n                // Save r0-r7\n                STMFD   SP, {R0-R7}\n\n                // Switch to the mode in SPSR\n                LDR     R12,[SP, #(SAVED_REG_NUM+2)*4]\n                MRS     R1, CPSR\n                AND     R2, R1, #MODE_MASK\n                BIC     R3, R1, #MODE_MASK\n                AND     R0, R12, #MODE_MASK\n                CMP     R0, #MODE_USR\n                MOVEQ   R0, #MODE_SYS\n                ORR     R3, R3, R0\n                MSR     CPSR, R3\n\n                // Save r8-r14\n                ADD     R0, SP, #8*4\n                STMFD   R0, {R8-R14}\n\n                // Switch back to the original CPSR\n                MSR     CPSR, R1\n\n                // LR already saved by SRSFD\n                LDR     R2, [SP, #(SAVED_REG_NUM+1)*4]\n\n                // Save pc, spsr\n                STR     R2, [SP, #15*4]\n                STR     R12,[SP, #16*4]\n\n                BX      LR\n\n                .fnend\n                .size    Save_Registers, .-Save_Registers\n\n//-------------------------------------------------------\n                .section \".text.Restore_Registers\"\n                .type    Restore_Registers, %function\n                .fnstart\n                .cantunwind\nRestore_Registers:\n                // Restore APCS corruptible registers\n                LDMFD   SP, {R0-R3}\n                ADD     SP, SP, #SAVED_REG_NUM*4\n                POP     {R12}\n                BX      LR\n\n                .fnend\n                .size    Restore_Registers, .-Restore_Registers\n\n//-------------------------------------------------------\n                .section \".text.SVC_Handler\"\n                .type    SVC_Handler, %function\n                .global  SVC_Handler\n                .weak    SVC_Handler\n                .fnstart\n                .cantunwind\nSVC_Handler:\n                SRSFD   SP!, #MODE_SVC              // Store SPSR_svc and LR_svc onto SVC stack\n\n                BLX     Save_Registers\n\n                MRS     R12, SPSR                   // Load SPSR\n                TST     R12, #CPSR_BIT_T            // Thumb bit set?\n                LDRHNE  R12, [LR,#-2]               // Thumb: load halfword\n                BICNE   R12, R12, #0xFF00           //        extract SVC number\n                LDREQ   R12, [LR,#-4]               // ARM:   load word\n                BICEQ   R12, R12, #0xFF000000       //        extract SVC number\n                MOV     R0,  R12                    // Save SVC number\n\n                MOV     R1, SP\n\n                MOV     R3, SP                      // Move SP into R3\n                AND     R3, R3, #4                  // Get stack adjustment to ensure 8-byte alignment\n                SUB     SP, SP, R3                  // Adjust stack\n                PUSH    {R3, R4}                    // Store stack adjustment(R3) and user data(R4)\n\n                BLX     c_svc_handler             // Call SVC Function\n\n                POP     {R3, R4}                    // Restore stack adjustment(R3) and user data(R4)\n                ADD     SP, SP, R3                  // Unadjust stack\n\n                BLX     Restore_Registers\n                CLREX                               // Clear exclusive monitor\n                RFEFD   SP!                         // Return from exception\n\n                .fnend\n                .size    SVC_Handler, .-SVC_Handler\n\n//-------------------------------------------------------\n                .section \".text.Undef_Handler\"\n                .type    Undef_Handler, %function\n                .global  Undef_Handler\n                .weak    Undef_Handler\n                .fnstart\n                .cantunwind\nUndef_Handler:\n                SRSFD   SP!, #MODE_SVC              // Save LR_irq and SPSR_irq on to the SVC stack\n                CPS     #MODE_SVC                   // Change to SVC mode\n\n                BLX     Save_Registers\n\n                TST     R12,#CPSR_BIT_T             // Check mode\n                MOVEQ   R1, #4                      // R1 = 4 ARM mode\n                MOVNE   R1, #2                      // R1 = 2 Thumb mode\n\n                // Get offending instruction address\n                LDR     LR, [SP, #15*4]\n                SUB     LR, LR, R1\n                STR     LR, [SP, #15*4]\n\n                SUB     R0, LR, R1\n                CMP     R1, 4\n                LDREQ   R0, [R0]                    // ARM mode - R0 points to offending instruction\n                BEQ     Undef_Cont\n\n                // Thumb instruction\n                // Determine if it is a 32-bit Thumb instruction\n                LDRH    R0, [R0]\n                MOV     R2, #0x1C\n                CMP     R2, R0, LSR #11\n                BHS     Undef_Cont                  // 16-bit Thumb instruction\n\n                // 32-bit Thumb instruction. Unaligned - reconstruct the offending instruction\n                LDRH    R2, [LR]\n                ORR     R0, R2, R0, LSL #16\nUndef_Cont:\n                MOV     R2, SP                      // Set SP to third argument\n\n                AND     R12, SP, #4                 // Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 // Adjust stack\n                PUSH    {R12, LR}                   // Store stack adjustment and dummy LR\n\n                // R0 =Offending instruction, R1 =2(Thumb) or =4(ARM)\n                BLX     c_undef_handler\n\n                POP     {R12, LR}                   // Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 // Unadjust stack\n\n                LDR     LR, [SP, #15*4]             // Restore stacked LR and possibly adjust for retry\n                PUSH    {LR}\n                BLX     Restore_Registers\n                POP     {LR}\n                STR     LR, [SP]\n                CLREX                               // Clear exclusive monitor\n                RFEFD   SP!                         // Return from exception\n\n                .fnend\n                .size    Undef_Handler, .-Undef_Handler\n\n//-------------------------------------------------------\n                .section \".text.PAbt_Handler\"\n                .type    PAbt_Handler, %function\n                .global  PAbt_Handler\n                .weak    PAbt_Handler\n                .fnstart\n                .cantunwind\nPAbt_Handler:\n                SUB     LR, LR, #4                  // Pre-adjust LR\n                SRSFD   SP!, #MODE_SVC              // Save LR_irq and SPSR_irq on to the SVC stack\n                CPS     #MODE_SVC                   // Change to SVC mode\n\n                BLX     Save_Registers\n\n                MRC     p15, 0, R0, c5, c0, 1       // IFSR\n                MRC     p15, 0, R1, c6, c0, 2       // IFAR\n\n                MOV     R2, SP                      // Set SP to third argument\n\n                AND     R12, SP, #4                 // Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 // Adjust stack\n                PUSH    {R12, LR}                   // Store stack adjustment and dummy LR\n\n                BLX     c_pabt_handler\n\n                POP     {R12, LR}                   // Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 // Unadjust stack\n\n                CLREX                               // Clear exclusive monitor\n                BLX     Restore_Registers\n                RFEFD   SP!                         // Return from exception\n\n                .fnend\n                .size    PAbt_Handler, .-PAbt_Handler\n\n//-------------------------------------------------------\n                .section \".text.DAbt_Handler\"\n                .type    DAbt_Handler, %function\n                .global  DAbt_Handler\n                .weak    DAbt_Handler\n                .fnstart\n                .cantunwind\nDAbt_Handler:\n                SUB     LR, LR, #8                  // Pre-adjust LR\n                SRSFD   SP!, #MODE_SVC              // Save LR_irq and SPSR_irq on to the SVC stack\n                CPS     #MODE_SVC                   // Change to SVC mode\n\n                BLX     Save_Registers\n\n                MRC     p15, 0, R0, c5, c0, 0       // DFSR\n                MRC     p15, 0, R1, c6, c0, 0       // DFAR\n\n                MOV     R2, SP                      // Set SP to third argument\n\n                AND     R12, SP, #4                 // Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 // Adjust stack\n                PUSH    {R12, LR}                   // Store stack adjustment and dummy LR\n\n                BLX     c_dabt_handler\n\n                POP     {R12, LR}                   // Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 // Unadjust stack\n\n                CLREX                               // Clear exclusive monitor\n                BLX     Restore_Registers\n                RFEFD   SP!                         // Return from exception\n\n                .fnend\n                .size    DAbt_Handler, .-DAbt_Handler\n\n                .end\n"
  },
  {
    "path": "platform/cmsis/ca/irq_ctrl_gic.c",
    "content": "/**************************************************************************/ /**\n                                                                              * @file     irq_ctrl_gic.c\n                                                                              * @brief    Interrupt controller handling implementation for GIC\n                                                                              * @version  V1.0.1\n                                                                              * @date     9. April 2018\n                                                                              ******************************************************************************/\n/*\n * Copyright (c) 2017 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"cmsis.h\"\n#include \"irq_ctrl.h\"\n#include \n\n#if defined(__GIC_PRESENT) && (__GIC_PRESENT == 1U)\n\n/// Number of implemented interrupt lines\n#define IRQ_GIC_LINE_COUNT USER_IRQn_QTY\n\nstatic IRQHandler_t IRQTable[IRQ_GIC_LINE_COUNT] = {0U};\nstatic uint32_t IRQ_ID0;\n\n/// Initialize interrupt controller.\n__WEAK int32_t IRQ_Initialize(void) {\n  uint32_t i;\n\n  for (i = 0U; i < IRQ_GIC_LINE_COUNT; i++) {\n    IRQTable[i] = (IRQHandler_t)NULL;\n  }\n  GIC_Enable();\n  return (0);\n}\n\n/// Register interrupt handler.\n__WEAK int32_t IRQ_SetHandler(IRQn_ID_t irqn, IRQHandler_t handler) {\n  int32_t status;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    IRQTable[irqn] = handler;\n    status = 0;\n  } else {\n    status = -1;\n  }\n\n  return (status);\n}\n\n/// Get the registered interrupt handler.\n__WEAK IRQHandler_t IRQ_GetHandler(IRQn_ID_t irqn) {\n  IRQHandler_t h;\n\n  // Ignore CPUID field (software generated interrupts)\n  irqn &= 0x3FFU;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    h = IRQTable[irqn];\n  } else {\n    h = (IRQHandler_t)0;\n  }\n\n  return (h);\n}\n\n/// Enable interrupt.\n__WEAK int32_t IRQ_Enable(IRQn_ID_t irqn) {\n  int32_t status;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    GIC_EnableIRQ((IRQn_Type)irqn);\n    status = 0;\n  } else {\n    status = -1;\n  }\n\n  return (status);\n}\n\n/// Disable interrupt.\n__WEAK int32_t IRQ_Disable(IRQn_ID_t irqn) {\n  int32_t status;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    GIC_DisableIRQ((IRQn_Type)irqn);\n    status = 0;\n  } else {\n    status = -1;\n  }\n\n  return (status);\n}\n\n/// Get interrupt enable state.\n__WEAK uint32_t IRQ_GetEnableState(IRQn_ID_t irqn) {\n  uint32_t enable;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    enable = GIC_GetEnableIRQ((IRQn_Type)irqn);\n  } else {\n    enable = 0U;\n  }\n\n  return (enable);\n}\n\n/// Configure interrupt request mode.\n__WEAK int32_t IRQ_SetMode(IRQn_ID_t irqn, uint32_t mode) {\n  uint32_t val;\n  uint8_t cfg;\n  uint8_t secure;\n  uint8_t cpu;\n  int32_t status = 0;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    // Check triggering mode\n    val = (mode & IRQ_MODE_TRIG_Msk);\n\n    if (val == IRQ_MODE_TRIG_LEVEL) {\n      cfg = 0x00U;\n    } else if (val == IRQ_MODE_TRIG_EDGE) {\n      cfg = 0x02U;\n    } else {\n      cfg = 0x00U;\n      status = -1;\n    }\n\n    // Check interrupt type\n    val = mode & IRQ_MODE_TYPE_Msk;\n\n    if (val != IRQ_MODE_TYPE_IRQ) {\n      status = -1;\n    }\n\n    // Check interrupt domain\n    val = mode & IRQ_MODE_DOMAIN_Msk;\n\n    if (val == IRQ_MODE_DOMAIN_NONSECURE) {\n      secure = 0U;\n    } else {\n      // Check security extensions support\n      val = GIC_DistributorInfo() & (1UL << 10U);\n\n      if (val != 0U) {\n        // Security extensions are supported\n        secure = 1U;\n      } else {\n        secure = 0U;\n        status = -1;\n      }\n    }\n\n    // Check interrupt CPU targets\n    val = mode & IRQ_MODE_CPU_Msk;\n\n    if (val == IRQ_MODE_CPU_ALL) {\n      cpu = 0xFFU;\n    } else {\n      cpu = val >> IRQ_MODE_CPU_Pos;\n    }\n\n    // Apply configuration if no mode error\n    if (status == 0) {\n      GIC_SetConfiguration((IRQn_Type)irqn, cfg);\n      GIC_SetTarget((IRQn_Type)irqn, cpu);\n\n      if (secure != 0U) {\n        GIC_SetGroup((IRQn_Type)irqn, secure);\n      }\n    }\n  }\n\n  return (status);\n}\n\n/// Get interrupt mode configuration.\n__WEAK uint32_t IRQ_GetMode(IRQn_ID_t irqn) {\n  uint32_t mode;\n  uint32_t val;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    mode = IRQ_MODE_TYPE_IRQ;\n\n    // Get trigger mode\n    val = GIC_GetConfiguration((IRQn_Type)irqn);\n\n    if ((val & 2U) != 0U) {\n      // Corresponding interrupt is edge triggered\n      mode |= IRQ_MODE_TRIG_EDGE;\n    } else {\n      // Corresponding interrupt is level triggered\n      mode |= IRQ_MODE_TRIG_LEVEL;\n    }\n\n    // Get interrupt CPU targets\n    mode |= GIC_GetTarget((IRQn_Type)irqn) << IRQ_MODE_CPU_Pos;\n\n  } else {\n    mode = IRQ_MODE_ERROR;\n  }\n\n  return (mode);\n}\n\n/// Get ID number of current interrupt request (IRQ).\n__WEAK IRQn_ID_t IRQ_GetActiveIRQ(void) {\n  IRQn_ID_t irqn;\n  uint32_t prio;\n\n  /* Dummy read to avoid GIC 390 errata 801120 */\n  GIC_GetHighPendingIRQ();\n\n  irqn = GIC_AcknowledgePending();\n\n  __DSB();\n\n  /* Workaround GIC 390 errata 733075 (GIC-390_Errata_Notice_v6.pdf,\n   * 09-Jul-2014)  */\n  /* The following workaround code is for a single-core system.  It would be */\n  /* different in a multi-core system. */\n  /* If the ID is 0 or 0x3FE or 0x3FF, then the GIC CPU interface may be\n   * locked-up */\n  /* so unlock it, otherwise service the interrupt as normal. */\n  /* Special IDs 1020=0x3FC and 1021=0x3FD are reserved values in GICv1 and\n   * GICv2  */\n  /* so will not occur here. */\n\n  if ((irqn == 0) || (irqn >= 0x3FE)) {\n    /* Unlock the CPU interface with a dummy write to Interrupt Priority\n     * Register */\n    prio = GIC_GetPriority((IRQn_Type)0);\n    GIC_SetPriority((IRQn_Type)0, prio);\n\n    __DSB();\n\n    if ((irqn == 0U) && ((GIC_GetIRQStatus((IRQn_Type)irqn) & 1U) != 0U) &&\n        (IRQ_ID0 == 0U)) {\n      /* If the ID is 0, is active and has not been seen before */\n      IRQ_ID0 = 1U;\n    }\n    /* End of Workaround GIC 390 errata 733075 */\n  }\n\n  return (irqn);\n}\n\n/// Get ID number of current fast interrupt request (FIQ).\n__WEAK IRQn_ID_t IRQ_GetActiveFIQ(void) { return ((IRQn_ID_t)-1); }\n\n/// Signal end of interrupt processing.\n__WEAK int32_t IRQ_EndOfInterrupt(IRQn_ID_t irqn) {\n  int32_t status;\n  IRQn_Type irq = (IRQn_Type)irqn;\n\n  irqn &= 0x3FFU;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    GIC_EndInterrupt(irq);\n\n    if (irqn == 0) {\n      IRQ_ID0 = 0U;\n    }\n\n    status = 0;\n  } else {\n    status = -1;\n  }\n\n  return (status);\n}\n\n/// Set interrupt pending flag.\n__WEAK int32_t IRQ_SetPending(IRQn_ID_t irqn) {\n  int32_t status;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    GIC_SetPendingIRQ((IRQn_Type)irqn);\n    status = 0;\n  } else {\n    status = -1;\n  }\n\n  return (status);\n}\n\n/// Get interrupt pending flag.\n__WEAK uint32_t IRQ_GetPending(IRQn_ID_t irqn) {\n  uint32_t pending;\n\n  if ((irqn >= 16) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    pending = GIC_GetPendingIRQ((IRQn_Type)irqn);\n  } else {\n    pending = 0U;\n  }\n\n  return (pending & 1U);\n}\n\n/// Clear interrupt pending flag.\n__WEAK int32_t IRQ_ClearPending(IRQn_ID_t irqn) {\n  int32_t status;\n\n  if ((irqn >= 16) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    GIC_ClearPendingIRQ((IRQn_Type)irqn);\n    status = 0;\n  } else {\n    status = -1;\n  }\n\n  return (status);\n}\n\n/// Set interrupt priority value.\n__WEAK int32_t IRQ_SetPriority(IRQn_ID_t irqn, uint32_t priority) {\n  int32_t status;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    GIC_SetPriority((IRQn_Type)irqn, priority);\n    status = 0;\n  } else {\n    status = -1;\n  }\n\n  return (status);\n}\n\n/// Get interrupt priority.\n__WEAK uint32_t IRQ_GetPriority(IRQn_ID_t irqn) {\n  uint32_t priority;\n\n  if ((irqn >= 0) && (irqn < (IRQn_ID_t)IRQ_GIC_LINE_COUNT)) {\n    priority = GIC_GetPriority((IRQn_Type)irqn);\n  } else {\n    priority = IRQ_PRIORITY_ERROR;\n  }\n\n  return (priority);\n}\n\n/// Set priority masking threshold.\n__WEAK int32_t IRQ_SetPriorityMask(uint32_t priority) {\n  GIC_SetInterfacePriorityMask(priority);\n  return (0);\n}\n\n/// Get priority masking threshold\n__WEAK uint32_t IRQ_GetPriorityMask(void) {\n  return GIC_GetInterfacePriorityMask();\n}\n\n/// Set priority grouping field split point\n__WEAK int32_t IRQ_SetPriorityGroupBits(uint32_t bits) {\n  int32_t status;\n\n  if (bits == IRQ_PRIORITY_Msk) {\n    bits = 7U;\n  }\n\n  if (bits < 8U) {\n    GIC_SetBinaryPoint(7U - bits);\n    status = 0;\n  } else {\n    status = -1;\n  }\n\n  return (status);\n}\n\n/// Get priority grouping field split point\n__WEAK uint32_t IRQ_GetPriorityGroupBits(void) {\n  uint32_t bp;\n\n  bp = GIC_GetBinaryPoint() & 0x07U;\n\n  return (7U - bp);\n}\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/ca/mmu_ARMCA.c",
    "content": "/**************************************************************************/ /**\n                                                                              * @file     mmu_ARMCA7.c\n                                                                              * @brief    MMU Configuration for Arm Cortex-A7 Device Series\n                                                                              * @version  V1.2.0\n                                                                              * @date     15. May 2019\n                                                                              *\n                                                                              * @note\n                                                                              *\n                                                                              ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n/* Memory map description from: DUI0447G_v2m_p1_trm.pdf 4.2.2 Arm Cortex-A\nSeries memory map\n\n                                                     Memory Type\n0xffffffff |--------------------------|             ------------\n           |       FLAG SYNC          |             Device Memory\n0xfffff000 |--------------------------|             ------------\n           |         Fault            |                Fault\n0xfff00000 |--------------------------|             ------------\n           |                          |                Normal\n           |                          |\n           |      Daughterboard       |\n           |         memory           |\n           |                          |\n0x80505000 |--------------------------|             ------------\n           |TTB (L2 Sync Flags   ) 4k |                Normal\n0x80504C00 |--------------------------|             ------------\n           |TTB (L2 Peripherals-B) 16k|                Normal\n0x80504800 |--------------------------|             ------------\n           |TTB (L2 Peripherals-A) 16k|                Normal\n0x80504400 |--------------------------|             ------------\n           |TTB (L2 Priv Periphs)  4k |                Normal\n0x80504000 |--------------------------|             ------------\n           |    TTB (L1 Descriptors)  |                Normal\n0x80500000 |--------------------------|             ------------\n           |          Stack           |                Normal\n           |--------------------------|             ------------\n           |          Heap            |                Normal\n0x80400000 |--------------------------|             ------------\n           |         ZI Data          |                Normal\n0x80300000 |--------------------------|             ------------\n           |         RW Data          |                Normal\n0x80200000 |--------------------------|             ------------\n           |         RO Data          |                Normal\n           |--------------------------|             ------------\n           |         RO Code          |              USH Normal\n0x80000000 |--------------------------|             ------------\n           |      Daughterboard       |                Fault\n           |      HSB AXI buses       |\n0x40000000 |--------------------------|             ------------\n           |      Daughterboard       |                Fault\n           |  test chips peripherals  |\n0x2c002000 |--------------------------|             ------------\n           |     Private Address      |            Device Memory\n0x2c000000 |--------------------------|             ------------\n           |      Daughterboard       |                Fault\n           |  test chips peripherals  |\n0x20000000 |--------------------------|             ------------\n           |       Peripherals        |           Device Memory RW/RO\n           |                          |              & Fault\n0x00000000 |--------------------------|\n*/\n\n// L1 Cache info and restrictions about architecture of the caches (CCSIR\n// register): Write-Through support *not* available Write-Back support\n// available. Read allocation support available. Write allocation support\n// available.\n\n// Note: You should use the Shareable attribute carefully.\n// For cores without coherency logic (such as SCU) marking a region as shareable\n// forces the processor to not cache that region regardless of the inner cache\n// settings. Cortex-A versions of RTX use LDREX/STREX instructions relying on\n// Local monitors. Local monitors will be used only when the region gets cached,\n// regions that are not cached will use the Global Monitor. Some Cortex-A\n// implementations do not include Global Monitors, so wrongly setting the\n// attribute Shareable may cause STREX to fail.\n\n// Recall: When the Shareable attribute is applied to a memory region that is\n// not Write-Back, Normal memory, data held in this region is treated as\n// Non-cacheable. When SMP bit = 0, Inner WB/WA Cacheable Shareable attributes\n// are treated as Non-cacheable. When SMP bit = 1, Inner WB/WA Cacheable\n// Shareable attributes are treated as Cacheable.\n\n// Following MMU configuration is expected\n// SCTLR.AFE == 1 (Simplified access permissions model - AP[2:1] define access\n// permissions, AP[0] is an access flag) SCTLR.TRE == 0 (TEX remap disabled, so\n// memory type and attributes are described directly by bits in the descriptor)\n// Domain 0 is always the Client domain\n// Descriptors should place all memory in domain 0\n\n#include \"cmsis.h\"\n#include \"mem_ARMCA.h\"\n#include \"plat_types.h\"\n\nextern uint32_t __sync_flags_start[];\nextern uint32_t __sync_flags_end[];\n\n#define SECTION_SIZE 0x00100000\n#define SECTION_ADDR(n) ((n)&0xFFF00000)\n#define SECTION_CNT(n) (((n) + SECTION_SIZE - 1) / SECTION_SIZE)\n\n#define PAGE16K_SIZE 0x00004000\n#define PAGE16K_ADDR(n) ((n)&0xFFFFC000)\n#define PAGE16K_CNT(n) (((n) + PAGE16K_SIZE - 1) / PAGE16K_SIZE)\n\n#define PAGE4K_SIZE 0x00001000\n#define PAGE4K_ADDR(n) ((n)&0xFFFFF000)\n#define PAGE4K_CNT(n) (((n) + PAGE4K_SIZE - 1) / PAGE4K_SIZE)\n\n// TTB base address\n#define TTB_BASE (l1)\n\n// L2 table pointers\n//----------------------------------------\n#define TTB_L1_SIZE                                                            \\\n  (0x00004000) // The L1 translation table divides the full 4GB address space of\n               // a 32-bit core into 4096 equally sized sections, each of which\n               // describes 1MB of virtual memory space. The L1 translation\n               // table therefore contains 4096 32-bit (word-sized) entries.\n\n#define PRIVATE_TABLE_L2_4K_SIZE (0x400)\n#define PERIPHERAL_A_TABLE_L2_4K_SIZE (0x400)\n#define PERIPHERAL_B_TABLE_L2_64K_SIZE (0x400)\n#define SYNC_FLAGS_TABLE_L2_4K_SIZE (0x400)\n\n#define PRIVATE_TABLE_L2_BASE_4k (l2.pri) // Map 4k Private Address space\n#define PERIPHERAL_A_TABLE_L2_BASE_4k                                          \\\n  (l2.periph_a) // Map 64k Peripheral #1 0x1C000000 - 0x1C00FFFFF\n#define PERIPHERAL_B_TABLE_L2_BASE_64k                                         \\\n  (l2.periph_b) // Map 64k Peripheral #2 0x1C100000 - 0x1C1FFFFFF\n#define SYNC_FLAGS_TABLE_L2_BASE_4k (l2.sync) // Map 4k Flag synchronization\n\n//--------------------- PERIPHERALS -------------------\n//#define PERIPHERAL_A_FAULT (0x00000000 + 0x1c000000) //0x1C000000-0x1C00FFFF\n//(1M) #define PERIPHERAL_B_FAULT (0x00100000 + 0x1c000000)\n////0x1C100000-0x1C10FFFF (1M)\n\n//--------------------- SYNC FLAGS --------------------\n//#define FLAG_SYNC     0xFFFFF000\n//#define F_SYNC_BASE   0xFFF00000  //1M aligned\n#define SYNC_FLAG_SIZE                                                         \\\n  ((uint32_t)__sync_flags_end - (uint32_t)__sync_flags_start)\n#define FLAG_SYNC ((uint32_t)__sync_flags_start)\n\nstatic uint32_t Sect_Normal; // outer & inner wb/wa, non-shareable, executable,\n                             // rw, domain 0, base addr 0\nstatic uint32_t Sect_Normal_Cod; // outer & inner wb/wa, non-shareable,\n                                 // executable, ro, domain 0, base addr 0\nstatic uint32_t Sect_Normal_RO;  // as Sect_Normal_Cod, but not executable\nstatic uint32_t\n    Sect_Normal_RW; // as Sect_Normal_Cod, but writeable and not executable\nstatic uint32_t Sect_Device_RO; // device, non-shareable, non-executable, ro,\n                                // domain 0, base addr 0\nstatic uint32_t Sect_Device_RW; // as Sect_Device_RO, but writeable\n\nstatic uint32_t Sect_Normal_NC;    // outer & inner uncached, non-shareable,\n                                   // executable, rw, domain 0, base addr 0\nstatic uint32_t Sect_Normal_RO_NC; // outer & inner uncached, non-shareable,\n                                   // executable, ro, domain 0, base addr 0\n\n/* Define global descriptors */\nstatic uint32_t Page_L1_4k = 0x0;  // generic\nstatic uint32_t Page_L1_64k = 0x0; // generic\nstatic uint32_t Page_4k_Device_RW; // Shared device, not executable, rw, domain\n                                   // 0\nstatic uint32_t\n    Page_64k_Device_RW; // Shared device, not executable, rw, domain 0\n\nstatic uint32_t Page_4k_Normal; // outer & inner wb/wa, non-shareable,\n                                // executable, rw, domain 0\n\nstruct TTB_L2_T {\n  uint32_t pri[PRIVATE_TABLE_L2_4K_SIZE / 4];\n  uint32_t periph_a[PERIPHERAL_A_TABLE_L2_4K_SIZE / 4];\n  uint32_t periph_b[PERIPHERAL_B_TABLE_L2_64K_SIZE / 4];\n  uint32_t sync[SYNC_FLAGS_TABLE_L2_4K_SIZE / 4];\n};\n\n__attribute__((section(\".ttb_l1\"),\n               aligned(0x4000))) static uint32_t l1[TTB_L1_SIZE / 4];\n__attribute__((section(\".ttb_l2\"), aligned(0x400))) static struct TTB_L2_T l2;\n\nvoid MMU_CreateTranslationTable(void) {\n  mmu_region_attributes_Type region;\n\n  // Create 4GB of faulting entries\n  MMU_TTSection(TTB_BASE, 0, 4096, DESCRIPTOR_FAULT);\n\n  /*\n   * Generate descriptors. Refer to core_ca.h to get information about\n   * attributes\n   *\n   */\n  // Create descriptors for Vectors, RO, RW, ZI sections\n  section_normal(Sect_Normal, region);\n  section_normal_cod(Sect_Normal_Cod, region);\n  section_normal_ro(Sect_Normal_RO, region);\n  section_normal_rw(Sect_Normal_RW, region);\n  // Create descriptors for peripherals\n  section_device_ro(Sect_Device_RO, region);\n  section_device_rw(Sect_Device_RW, region);\n  // Create descriptors for 64k pages\n  page64k_device_rw(Page_L1_64k, Page_64k_Device_RW, region);\n  // Create descriptors for 4k pages\n  page4k_device_rw(Page_L1_4k, Page_4k_Device_RW, region);\n  page4k_normal(Page_L1_4k, Page_4k_Normal, region);\n\n  section_normal_nc(Sect_Normal_NC, region);\n  section_normal_ro_nc(Sect_Normal_RO_NC, region);\n\n  /*\n   *  Define MMU flat-map regions and attributes\n   *\n   */\n\n  // Define Image\n  MMU_TTSection(TTB_BASE, FLASH_BASE, SECTION_CNT(FLASH_SIZE),\n                Sect_Normal_Cod); // multiple of 1MB sections\n  MMU_TTSection(TTB_BASE, FLASH_NC_BASE, SECTION_CNT(FLASH_SIZE),\n                Sect_Normal_RO_NC); // multiple of 1MB sections\n#ifdef PSRAM_SIZE\n  MMU_TTSection(TTB_BASE, PSRAM_BASE, SECTION_CNT(PSRAM_SIZE),\n                Sect_Normal); // multiple of 1MB sections\n  MMU_TTSection(TTB_BASE, PSRAM_NC_BASE, SECTION_CNT(PSRAM_SIZE),\n                Sect_Normal_NC); // multiple of 1MB sections\n#endif\n#ifdef PSRAMUHS_SIZE\n  MMU_TTSection(TTB_BASE, PSRAMUHS_BASE, SECTION_CNT(PSRAMUHS_SIZE),\n                Sect_Normal); // multiple of 1MB sections\n  MMU_TTSection(TTB_BASE, PSRAMUHS_NC_BASE, SECTION_CNT(PSRAMUHS_SIZE),\n                Sect_Normal_NC); // multiple of 1MB sections\n  MMU_TTSection(TTB_BASE, PSRAMUHSX_BASE, SECTION_CNT(PSRAMUHS_SIZE),\n                Sect_Normal_Cod); // multiple of 1MB sections\n#endif\n\n  MMU_TTSection(TTB_BASE, DSP_RAM_BASE, SECTION_CNT(MAX_DSP_RAM_SIZE),\n                Sect_Normal); // multiple of 1MB sections\n\n  MMU_TTSection(TTB_BASE, ROMD_BASE, 1,\n                Sect_Normal_Cod); // multiple of 1MB sections\n  MMU_TTSection(TTB_BASE, RAM_BASE, SECTION_CNT(MAX_RAM_SIZE),\n                Sect_Normal_NC); // multiple of 1MB sections\n\n  //--------------------- PERIPHERALS -------------------\n  // Create (256 * 4k)=1MB faulting entries to cover peripheral range A\n  MMU_TTPage4k(TTB_BASE, SECTION_ADDR(DSP_BOOT_REG), 256, Page_L1_4k,\n               (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, DESCRIPTOR_FAULT);\n  // Define peripheral range A\n  MMU_TTPage4k(TTB_BASE, DSP_BOOT_REG, 1, Page_L1_4k,\n               (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_4k_Normal);\n  MMU_TTPage4k(TTB_BASE, DSP_TRANSQM_BASE, 1, Page_L1_4k,\n               (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n  MMU_TTPage4k(TTB_BASE, DSP_TIMER0_BASE, 1, Page_L1_4k,\n               (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n  MMU_TTPage4k(TTB_BASE, DSP_TIMER1_BASE, 1, Page_L1_4k,\n               (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n  MMU_TTPage4k(TTB_BASE, DSP_WDT_BASE, 1, Page_L1_4k,\n               (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n  MMU_TTPage4k(TTB_BASE, DSP_DEBUGSYS_APB_BASE, 1, Page_L1_4k,\n               (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n\n  MMU_TTSection(TTB_BASE, DSP_XDMA_BASE, 1,\n                Sect_Device_RW); // multiple of 1MB sections\n\n  MMU_TTSection(TTB_BASE, CMU_BASE, 1, Sect_Device_RW);      // AHB0/APB0\n  MMU_TTSection(TTB_BASE, CHECKSUM_BASE, 1, Sect_Device_RW); // AHB1\n  MMU_TTSection(TTB_BASE, CODEC_BASE, 1, Sect_Device_RW);    // CODEC\n\n  MMU_TTSection(TTB_BASE, BT_RAM_BASE, 1, Sect_Device_RW);\n  MMU_TTSection(TTB_BASE, BT_CMU_BASE, 1, Sect_Device_RW);\n\n  MMU_TTSection(TTB_BASE, WIFI_RAM_BASE, 1, Sect_Device_RW);\n  MMU_TTSection(TTB_BASE, WIFI_PAS_BASE, 1, Sect_Device_RW);\n  MMU_TTSection(TTB_BASE, WIFI_TRANSQM_BASE, 1, Sect_Device_RW);\n\n#if 0\n    MMU_TTSection (TTB_BASE, VE_A7_MP_FLASH_BASE0   , 64, Sect_Device_RO); // 64MB NOR\n    MMU_TTSection (TTB_BASE, VE_A7_MP_FLASH_BASE1   , 64, Sect_Device_RO); // 64MB NOR\n    MMU_TTSection (TTB_BASE, VE_A7_MP_SRAM_BASE     , 32, Sect_Device_RW); // 32MB RAM\n    MMU_TTSection (TTB_BASE, VE_A7_MP_VRAM_BASE     , 32, Sect_Device_RW); // 32MB RAM\n    MMU_TTSection (TTB_BASE, VE_A7_MP_ETHERNET_BASE , 16, Sect_Device_RW);\n    MMU_TTSection (TTB_BASE, VE_A7_MP_USB_BASE      , 16, Sect_Device_RW);\n\n    // Create (16 * 64k)=1MB faulting entries to cover peripheral range 0x1C000000-0x1C00FFFF\n    MMU_TTPage64k(TTB_BASE, PERIPHERAL_A_FAULT      , 16, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, DESCRIPTOR_FAULT);\n    // Define peripheral range 0x1C000000-0x1C00FFFF\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_DAP_BASE       ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_SYSTEM_REG_BASE,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_SERIAL_BASE    ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_AACI_BASE      ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_MMCI_BASE      ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_KMI0_BASE      ,  2, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_UART_BASE      ,  4, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_WDT_BASE       ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_A_TABLE_L2_BASE_4k, Page_64k_Device_RW);\n\n    // Create (16 * 64k)=1MB faulting entries to cover peripheral range 0x1C100000-0x1C10FFFF\n    MMU_TTPage64k(TTB_BASE, PERIPHERAL_B_FAULT      , 16, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, DESCRIPTOR_FAULT);\n    // Define peripheral range 0x1C100000-0x1C10FFFF\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_TIMER_BASE     ,  2, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_DVI_BASE       ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_RTC_BASE       ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_UART4_BASE     ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);\n    MMU_TTPage64k(TTB_BASE, VE_A7_MP_CLCD_BASE      ,  1, Page_L1_64k, (uint32_t *)PERIPHERAL_B_TABLE_L2_BASE_64k, Page_64k_Device_RW);\n#endif\n\n  // Create (256 * 4k)=1MB faulting entries to cover private address space.\n  // Needs to be marked as Device memory\n  MMU_TTPage4k(TTB_BASE, __get_CBAR(), 256, Page_L1_4k,\n               (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, DESCRIPTOR_FAULT);\n  // Define private address space entry.\n  MMU_TTPage4k(TTB_BASE, __get_CBAR(), 3, Page_L1_4k,\n               (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n#if 0 // defined(__L2C_PRESENT) && (__L2C_PRESENT)\n    // Define L2CC entry.  Uncomment if PL310 is present\n    MMU_TTPage4k (TTB_BASE, VE_A5_MP_PL310_BASE     ,  1,  Page_L1_4k, (uint32_t *)PRIVATE_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n#endif\n\n#if 0\n    // Create (256 * 4k)=1MB faulting entries to synchronization space (Useful if some non-cacheable DMA agent is present in the SoC)\n    MMU_TTPage4k (TTB_BASE, F_SYNC_BASE             , 256, Page_L1_4k, (uint32_t *)SYNC_FLAGS_TABLE_L2_BASE_4k, DESCRIPTOR_FAULT);\n    // Define synchronization space entry.\n    MMU_TTPage4k (TTB_BASE, FLAG_SYNC               ,   1, Page_L1_4k, (uint32_t *)SYNC_FLAGS_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n#endif\n  // Define synchronization space entry.\n  MMU_TTPage4k(TTB_BASE, SECTION_ADDR(FLAG_SYNC), 256, Page_L1_4k,\n               (uint32_t *)SYNC_FLAGS_TABLE_L2_BASE_4k, Page_4k_Normal);\n  // Define synchronization space entry.\n  MMU_TTPage4k(TTB_BASE, FLAG_SYNC, PAGE4K_CNT(SYNC_FLAG_SIZE), Page_L1_4k,\n               (uint32_t *)SYNC_FLAGS_TABLE_L2_BASE_4k, Page_4k_Device_RW);\n\n  /* Set location of level 1 page table\n  ; 31:14 - Translation table base addr (31:14-TTBCR.N, TTBCR.N is 0 out of\n  reset) ; 13:7  - 0x0 ; 6     - IRGN[0] 0x1  (Inner WB WA) ; 5     - NOS 0x0\n  (Non-shared) ; 4:3   - RGN     0x01 (Outer WB WA) ; 2     - IMP     0x0\n  (Implementation Defined) ; 1     - S       0x0  (Non-shared)\n  ; 0     - IRGN[1] 0x0  (Inner WB WA) */\n  __set_TTBR0((uint32_t)TTB_BASE | 0x48);\n  __ISB();\n\n  /* Set up domain access control register\n  ; We set domain 0 to Client and all other domains to No Access.\n  ; All translation table entries specify domain 0 */\n  __set_DACR(1);\n  __ISB();\n}\n"
  },
  {
    "path": "platform/cmsis/ca/startup_ARMCA.c",
    "content": "/******************************************************************************\n * @file     startup_ARMCA7.c\n * @brief    CMSIS Device System Source File for Arm Cortex-A9 Device Series\n * @version  V1.00\n * @date     10. January 2018\n *\n * @note\n *\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"cmsis.h\"\n#include \"plat_addr_map.h\"\n\n/*----------------------------------------------------------------------------\n  Definitions\n *----------------------------------------------------------------------------*/\n#define USR_MODE 0x10 // User mode\n#define FIQ_MODE 0x11 // Fast Interrupt Request mode\n#define IRQ_MODE 0x12 // Interrupt Request mode\n#define SVC_MODE 0x13 // Supervisor mode\n#define ABT_MODE 0x17 // Abort mode\n#define UND_MODE 0x1B // Undefined Instruction mode\n#define SYS_MODE 0x1F // System mode\n\n/*----------------------------------------------------------------------------\n  Internal References\n *----------------------------------------------------------------------------*/\nvoid Vectors(void) __attribute__((naked, target(\"arm\"), section(\".vectors\")));\nvoid Reset_Handler(void) __attribute__((naked, section(\".boot_loader\")));\n\n/*----------------------------------------------------------------------------\n  Exception / Interrupt Handler\n *----------------------------------------------------------------------------*/\nvoid Undef_Handler(void) __attribute__((weak, alias(\"Default_Handler\")));\nvoid SVC_Handler(void) __attribute__((weak, alias(\"Default_Handler\")));\nvoid PAbt_Handler(void) __attribute__((weak, alias(\"Default_Handler\")));\nvoid DAbt_Handler(void) __attribute__((weak, alias(\"Default_Handler\")));\nvoid IRQ_Handler(void) __attribute__((weak, alias(\"Default_Handler\")));\nvoid FIQ_Handler(void) __attribute__((weak, alias(\"Default_Handler\")));\n\n/*----------------------------------------------------------------------------\n  Exception / Interrupt Vector Table\n *----------------------------------------------------------------------------*/\nvoid Vectors(void) {\n  __ASM volatile(\"LDR    PC, ResetVectorPtr                        \\n\"\n                 \"LDR    PC, UndefVectorPtr                        \\n\"\n                 \"LDR    PC, SVCVectorPtr                          \\n\"\n                 \"LDR    PC, PAbtVectorPtr                         \\n\"\n                 \"LDR    PC, DAbtVectorPtr                         \\n\"\n                 \"LDR    PC, HypVectorPtr                          \\n\"\n                 \"LDR    PC, IRQVectorPtr                          \\n\"\n                 \"LDR    PC, FIQVectorPtr                          \\n\"\n                 \"ResetVectorPtr:  .LONG   Init_Handler            \\n\"\n                 \"UndefVectorPtr:  .LONG   Init_Handler            \\n\"\n                 \"SVCVectorPtr:    .LONG   Init_Handler            \\n\"\n                 \"PAbtVectorPtr:   .LONG   Init_Handler            \\n\"\n                 \"DAbtVectorPtr:   .LONG   Init_Handler            \\n\"\n                 \"HypVectorPtr:    .LONG   Init_Handler            \\n\"\n                 \"IRQVectorPtr:    .LONG   Init_Handler            \\n\"\n                 \"FIQVectorPtr:    .LONG   Init_Handler            \\n\"\n                 \"Init_Handler:    b       Init_Handler            \\n\");\n}\n\n/*----------------------------------------------------------------------------\n  Reset Handler called on controller reset\n *----------------------------------------------------------------------------*/\nvoid Reset_Handler(void) {\n  __ASM volatile(\n\n      // Mask interrupts\n      \"CPSID   if                                      \\n\"\n\n      // Put any cores other than 0 to sleep\n      \"MRC     p15, 0, R0, c0, c0, 5                   \\n\" // Read MPIDR\n      \"ANDS    R0, R0, #3                              \\n\"\n      \"goToSleep:                                      \\n\"\n      \"IT      NE                                      \\n\"\n      \"WFINE                                           \\n\"\n      \"BNE     goToSleep                               \\n\"\n\n      // Reset SCTLR Settings\n      \"MRC     p15, 0, R0, c1, c0, 0                   \\n\" // Read CP15 System\n                                                           // Control register\n      \"BIC     R0, R0, #(0x1 << 12)                    \\n\" // Clear I bit 12 to\n                                                           // disable I Cache\n      \"BIC     R0, R0, #(0x1 <<  2)                    \\n\" // Clear C bit  2 to\n                                                           // disable D Cache\n      \"BIC     R0, R0, #0x1                            \\n\" // Clear M bit  0 to\n                                                           // disable MMU\n      \"BIC     R0, R0, #(0x1 << 11)                    \\n\" // Clear Z bit 11 to\n                                                           // disable branch\n                                                           // prediction\n      \"BIC     R0, R0, #(0x1 << 13)                    \\n\" // Clear V bit 13 to\n                                                           // disable hivecs\n      \"MCR     p15, 0, R0, c1, c0, 0                   \\n\" // Write value back\n                                                           // to CP15 System\n                                                           // Control register\n      \"ISB                                             \\n\"\n\n      // Configure ACTLR\n      \"MRC     p15, 0, r0, c1, c0, 1                   \\n\" // Read CP15\n                                                           // Auxiliary Control\n                                                           // Register\n      //\"ORR     r0, r0, #(1 <<  1)                      \\n\"  // Enable L2\n      // prefetch hint (UNK/WI since r4p1)\n      \"ORR     r0, r0, #(1 <<  6)                      \\n\" // Enable SMP\n      \"MCR     p15, 0, r0, c1, c0, 1                   \\n\" // Write CP15\n                                                           // Auxiliary Control\n                                                           // Register\n\n      // Set Vector Base Address Register (VBAR) to point to this application's\n      // vector table\n      //\"LDR    R0, =Vectors                             \\n\"\n      \"LDR    R0, =\" _TO_STRING(\n          DSP_BOOT_REG) \"        \\n\"\n                        \"MCR    p15, 0, R0, c12, c0, 0                   \\n\"\n\n                        // Setup Stack for each exceptional mode\n                        \"CPS    #0x11                                    \\n\"\n                        \"LDR    SP, =Image$$FIQ_STACK$$ZI$$Limit         \\n\"\n                        \"CPS    #0x12                                    \\n\"\n                        \"LDR    SP, =Image$$IRQ_STACK$$ZI$$Limit         \\n\"\n                        \"CPS    #0x13                                    \\n\"\n                        \"LDR    SP, =Image$$SVC_STACK$$ZI$$Limit         \\n\"\n                        \"CPS    #0x17                                    \\n\"\n                        \"LDR    SP, =Image$$ABT_STACK$$ZI$$Limit         \\n\"\n                        \"CPS    #0x1B                                    \\n\"\n                        \"LDR    SP, =Image$$UND_STACK$$ZI$$Limit         \\n\"\n                        \"CPS    #0x1F                                    \\n\"\n                        \"LDR    SP, =Image$$SYS_STACK$$ZI$$Limit         \\n\"\n\n                        // Call SystemInit\n                        \"BL     SystemInit                               \\n\"\n\n                        // Unmask interrupts\n                        \"CPSIE  if                                       \\n\"\n\n                        // Call __main\n                        \"BL     _start                                   \\n\");\n}\n\n/*----------------------------------------------------------------------------\n  Default Handler for Exceptions / Interrupts\n *----------------------------------------------------------------------------*/\nvoid Default_Handler(void) {\n  while (1)\n    ;\n}\n"
  },
  {
    "path": "platform/cmsis/ca/system_ARMCA.c",
    "content": "/******************************************************************************\n * @file     system_ARMCA7.c\n * @brief    CMSIS Device System Source File for Arm Cortex-A7 Device Series\n * @version  V1.0.1\n * @date     13. February 2019\n *\n * @note\n *\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#include \"ca/system_ARMCA.h\"\n#include \"ca/irq_ctrl.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n\nextern uint32_t __sram_text_data_start_load__[];\nextern uint32_t __sram_text_data_end_load__[];\nextern uint32_t __sram_text_data_start__[];\nextern uint32_t __sram_bss_start__[];\nextern uint32_t __sram_bss_end__[];\nextern uint32_t __bss_start__[];\nextern uint32_t __bss_end__[];\nextern uint32_t __sync_flags_start[];\nextern uint32_t __sync_flags_end[];\nextern uint32_t __psramuhs_text_data_start_load__[];\nextern uint32_t __psramuhs_text_data_end_load__[];\nextern uint32_t __psramuhs_text_start[];\n\n/*----------------------------------------------------------------------------\n  System Initialization\n *----------------------------------------------------------------------------*/\nvoid SystemInit(void) {\n  uint32_t *dst, *src;\n\n  if (__sram_text_data_start__ != __sram_text_data_start_load__) {\n    for (dst = __sram_text_data_start__, src = __sram_text_data_start_load__;\n         src < __sram_text_data_end_load__; dst++, src++) {\n      *dst = *src;\n    }\n  }\n\n  hal_cmu_dsp_setup();\n  /*psramhus_test load region covers sram_bss, and it needs to be copyed first*/\n#if defined(CHIP_HAS_PSRAMUHS) && defined(PSRAMUHS_ENABLE)\n  for (dst = __psramuhs_text_start, src = __psramuhs_text_data_start_load__;\n       src < __psramuhs_text_data_end_load__; dst++, src++) {\n    *dst = *src;\n  }\n#endif\n\n  for (dst = __sram_bss_start__; dst < __sram_bss_end__; dst++) {\n    *dst = 0;\n  }\n\n#ifdef NOSTD\n  for (dst = __bss_start__; dst < __bss_end__; dst++) {\n    *dst = 0;\n  }\n#endif\n\n  for (dst = __sync_flags_start; dst < __sync_flags_end; dst++) {\n    *dst = 0;\n  }\n\n  /* do not use global variables because this function is called before\n     reaching pre-main. RW section may be overwritten afterwards.          */\n\n  // Init exception vectors\n  GIC_InitVectors();\n\n  // Invalidate entire Unified TLB\n  __set_TLBIALL(0);\n\n  // Invalidate entire branch predictor array\n  __set_BPIALL(0);\n  __DSB();\n  __ISB();\n\n  //  Invalidate instruction cache and flush branch target cache\n  __set_ICIALLU(0);\n  __DSB();\n  __ISB();\n\n  //  Invalidate data cache\n  L1C_InvalidateDCacheAll();\n\n#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))\n  // Enable FPU\n  __FPU_Enable();\n#endif\n\n  // Create Translation Table\n  MMU_CreateTranslationTable();\n\n  // Enable MMU\n  MMU_Enable();\n\n  // Enable Caches\n  L1C_EnableCaches();\n  L1C_EnableBTAC();\n\n#if (__L2C_PRESENT == 1)\n  // Enable GIC\n  L2C_Enable();\n#endif\n\n  // IRQ Initialize\n  IRQ_Initialize();\n}\n\nuint32_t BOOT_TEXT_SRAM_DEF(get_cpu_id)(void) { return __get_MPIDR() & 3; }\n"
  },
  {
    "path": "platform/cmsis/cmsis_nvic.c",
    "content": "/* mbed Microcontroller Library\n * CMSIS-style functionality to support dynamic vectors\n *******************************************************************************\n * Copyright (c) 2011 ARM Limited. All rights reserved.\n * All rights reserved.\n *\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *\n * 1. Redistributions of source code must retain the above copyright notice,\n *    this list of conditions and the following disclaimer.\n * 2. Redistributions in binary form must reproduce the above copyright notice,\n *    this list of conditions and the following disclaimer in the documentation\n *    and/or other materials provided with the distribution.\n * 3. Neither the name of ARM Limited nor the names of its contributors\n *    may be used to endorse or promote products derived from this software\n *    without specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE\n *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n *POSSIBILITY OF SUCH DAMAGE.\n *******************************************************************************\n */\n#ifndef __ARM_ARCH_ISA_ARM\n\n#include \"cmsis_nvic.h\"\n#include \"hal_location.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#ifdef __ARMCC_VERSION\n#include \"link_sym_armclang.h\"\n#endif\n\nSTATIC_ASSERT(NVIC_NUM_VECTORS * 4 <= VECTOR_SECTION_SIZE,\n              \"ERROR: VECTOR_SECTION_SIZE too small!\");\n\n// The vector table must be aligned to NVIC_NUM_VECTORS-word boundary, rounding\n// up to the next power of two\n// -- 0x100 for 33~64 vectors, and 0x200 for 65~128 vectors\n#ifdef __ARMCC_VERSION\n#define VECTOR_LOC __attribute__((section(\".bss.vector_table\")))\n#else\n#define VECTOR_LOC __attribute__((section(\".vector_table\")))\n#endif\n\n#define FAULT_HANDLER __attribute__((weak, alias(\"NVIC_default_handler\")))\n\nstatic uint32_t VECTOR_LOC vector_table[NVIC_NUM_VECTORS];\n\nvoid NVIC_DisableAllIRQs(void) {\n  int i;\n\n  for (i = 0; i < (USER_IRQn_QTY + 31) / 32; i++) {\n    NVIC->ICER[i] = ~0UL;\n  }\n  SCB->VTOR = 0;\n}\n\nstatic void NAKED BOOT_TEXT_FLASH_LOC NVIC_default_handler(void) {\n  asm volatile(\"_loop:; nop; nop; nop; nop; b _loop;\");\n}\n\nvoid FAULT_HANDLER Reset_Handler(void);\nvoid FAULT_HANDLER NMI_Handler(void);\nvoid FAULT_HANDLER HardFault_Handler(void);\nvoid FAULT_HANDLER MemManage_Handler(void);\nvoid FAULT_HANDLER BusFault_Handler(void);\nvoid FAULT_HANDLER UsageFault_Handler(void);\nvoid FAULT_HANDLER SecureFault_Handler(void);\nvoid FAULT_HANDLER SVC_Handler(void);\nvoid FAULT_HANDLER DebugMon_Handler(void);\nvoid FAULT_HANDLER PendSV_Handler(void);\nvoid FAULT_HANDLER SysTick_Handler(void);\nextern uint32_t __rom_stack[];\nextern uint32_t __stack[];\n\nstatic const uint32_t BOOT_RODATA_FLASH_LOC\n    fault_handlers[NVIC_USER_IRQ_OFFSET] = {\n#if defined(ROM_BUILD) && !defined(ROM_IN_FLASH)\n        (uint32_t)__rom_stack,\n#else\n    (uint32_t)__stack,\n#endif\n        (uint32_t)Reset_Handler,        (uint32_t)NMI_Handler,\n        (uint32_t)HardFault_Handler,    (uint32_t)MemManage_Handler,\n        (uint32_t)BusFault_Handler,     (uint32_t)UsageFault_Handler,\n        (uint32_t)SecureFault_Handler,  (uint32_t)NVIC_default_handler,\n        (uint32_t)NVIC_default_handler, (uint32_t)NVIC_default_handler,\n        (uint32_t)SVC_Handler,          (uint32_t)DebugMon_Handler,\n        (uint32_t)NVIC_default_handler, (uint32_t)PendSV_Handler,\n        (uint32_t)SysTick_Handler,\n};\n\nvoid BOOT_TEXT_FLASH_LOC NVIC_InitVectors(void) {\n  int i;\n\n  for (i = 0; i < NVIC_NUM_VECTORS; i++) {\n    vector_table[i] = (i < ARRAY_SIZE(fault_handlers))\n                          ? fault_handlers[i]\n                          : (uint32_t)NVIC_default_handler;\n  }\n\n  SCB->VTOR = (uint32_t)vector_table;\n  __DSB();\n}\n\nvoid NVIC_SetDefaultFaultHandler(NVIC_DEFAULT_FAULT_HANDLER_T handler) {\n  int i;\n\n  for (i = 1; i < ARRAY_SIZE(fault_handlers); i++) {\n    if (vector_table[i] == (uint32_t)NVIC_default_handler) {\n      vector_table[i] = (uint32_t)handler;\n    }\n  }\n}\n\nIRQn_Type NVIC_GetCurrentActiveIRQ(void) {\n  IRQn_Type irq = (__get_IPSR() & IPSR_ISR_Msk) - NVIC_USER_IRQ_OFFSET;\n  return irq;\n}\n\n#ifdef CORE_SLEEP_POWER_DOWN\n\nvoid SRAM_TEXT_LOC NVIC_PowerDownSleep(uint32_t *buf, uint32_t cnt) {\n  int i;\n  uint32_t idx;\n  __IO uint32_t *regs;\n\n  idx = 0;\n  for (i = 0; i < (NVIC_NUM_VECTORS - NVIC_USER_IRQ_OFFSET + 31) / 32; i++) {\n    buf[idx++] = NVIC->ISER[i];\n  }\n#if (__CORTEX_M <= 4)\n  regs = (__IO uint32_t *)&NVIC->IP[0];\n#else\n  regs = (__IO uint32_t *)&NVIC->IPR[0];\n#endif\n  for (i = 0; i < (NVIC_NUM_VECTORS - NVIC_USER_IRQ_OFFSET + 3) / 4; i++) {\n    buf[idx++] = regs[i];\n  }\n  buf[idx++] = SCnSCB->ACTLR;\n  buf[idx++] = SCB->ICSR;\n  buf[idx++] = SCB->AIRCR;\n  buf[idx++] = SCB->SCR;\n  buf[idx++] = SCB->CCR;\n#if (__CORTEX_M <= 4)\n  regs = (__IO uint32_t *)&SCB->SHP[0];\n#else\n  regs = (__IO uint32_t *)&SCB->SHPR[0];\n#endif\n  buf[idx++] = regs[0];\n  buf[idx++] = regs[1];\n  buf[idx++] = regs[2];\n  buf[idx++] = SCB->SHCSR;\n  buf[idx++] = SysTick->CTRL;\n  buf[idx++] = SysTick->LOAD;\n\n  if (idx > cnt) {\n    do {\n      asm volatile(\"nop \\n nop \\n nop \\n nop\");\n    } while (1);\n  }\n}\n\nvoid SRAM_TEXT_LOC NVIC_PowerDownWakeup(uint32_t *buf, uint32_t cnt) {\n  int i;\n  uint32_t idx;\n  __IO uint32_t *regs;\n\n  idx = 0;\n  for (i = 0; i < (NVIC_NUM_VECTORS - NVIC_USER_IRQ_OFFSET + 31) / 32; i++) {\n    NVIC->ISER[i] = buf[idx++];\n  }\n#if (__CORTEX_M <= 4)\n  regs = (__IO uint32_t *)&NVIC->IP[0];\n#else\n  regs = (__IO uint32_t *)&NVIC->IPR[0];\n#endif\n  for (i = 0; i < (NVIC_NUM_VECTORS - NVIC_USER_IRQ_OFFSET + 3) / 4; i++) {\n    regs[i] = buf[idx++];\n  }\n  SCnSCB->ACTLR = buf[idx++];\n  SCB->ICSR = buf[idx++];\n  SCB->AIRCR = buf[idx++];\n  SCB->SCR = buf[idx++];\n  SCB->CCR = buf[idx++];\n#if (__CORTEX_M <= 4)\n  regs = (__IO uint32_t *)&SCB->SHP[0];\n#else\n  regs = (__IO uint32_t *)&SCB->SHPR[0];\n#endif\n  regs[0] = buf[idx++];\n  regs[1] = buf[idx++];\n  regs[2] = buf[idx++];\n  SCB->SHCSR = buf[idx++];\n  SysTick->CTRL = buf[idx++];\n  SysTick->LOAD = buf[idx++];\n\n  SCB->VTOR = (uint32_t)vector_table;\n  SysTick->VAL = 0;\n}\n\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/arm_common_tables.h",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_common_tables.h\n * Description:  Extern declaration for common tables\n *\n * $Date:        27. January 2017\n * $Revision:    V.1.5.1\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef _ARM_COMMON_TABLES_H\n#define _ARM_COMMON_TABLES_H\n\n#include \"arm_math.h\"\n\nextern const uint16_t armBitRevTable[1024];\nextern const q15_t armRecipTableQ15[64];\nextern const q31_t armRecipTableQ31[64];\nextern const float32_t twiddleCoef_16[32];\nextern const float32_t twiddleCoef_32[64];\nextern const float32_t twiddleCoef_64[128];\nextern const float32_t twiddleCoef_128[256];\nextern const float32_t twiddleCoef_256[512];\nextern const float32_t twiddleCoef_512[1024];\nextern const float32_t twiddleCoef_1024[2048];\nextern const float32_t twiddleCoef_2048[4096];\nextern const float32_t twiddleCoef_4096[8192];\n#define twiddleCoef twiddleCoef_4096\nextern const q31_t twiddleCoef_16_q31[24];\nextern const q31_t twiddleCoef_32_q31[48];\nextern const q31_t twiddleCoef_64_q31[96];\nextern const q31_t twiddleCoef_128_q31[192];\nextern const q31_t twiddleCoef_256_q31[384];\nextern const q31_t twiddleCoef_512_q31[768];\nextern const q31_t twiddleCoef_1024_q31[1536];\nextern const q31_t twiddleCoef_2048_q31[3072];\nextern const q31_t twiddleCoef_4096_q31[6144];\nextern const q15_t twiddleCoef_16_q15[24];\nextern const q15_t twiddleCoef_32_q15[48];\nextern const q15_t twiddleCoef_64_q15[96];\nextern const q15_t twiddleCoef_128_q15[192];\nextern const q15_t twiddleCoef_256_q15[384];\nextern const q15_t twiddleCoef_512_q15[768];\nextern const q15_t twiddleCoef_1024_q15[1536];\nextern const q15_t twiddleCoef_2048_q15[3072];\nextern const q15_t twiddleCoef_4096_q15[6144];\nextern const float32_t twiddleCoef_rfft_32[32];\nextern const float32_t twiddleCoef_rfft_64[64];\nextern const float32_t twiddleCoef_rfft_128[128];\nextern const float32_t twiddleCoef_rfft_256[256];\nextern const float32_t twiddleCoef_rfft_512[512];\nextern const float32_t twiddleCoef_rfft_1024[1024];\nextern const float32_t twiddleCoef_rfft_2048[2048];\nextern const float32_t twiddleCoef_rfft_4096[4096];\n\n/* floating-point bit reversal tables */\n#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)\n#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)\n#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)\n#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)\n#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)\n#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)\n#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)\n#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)\n#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)\n\nextern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];\n\n/* fixed-point bit reversal tables */\n#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)\n#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)\n#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)\n#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)\n#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)\n#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)\n#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)\n#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)\n#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)\n\nextern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];\nextern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];\n\n/* Tables for Fast Math Sine and Cosine */\nextern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];\nextern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];\nextern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];\n\n#endif /*  ARM_COMMON_TABLES_H */\n"
  },
  {
    "path": "platform/cmsis/inc/arm_const_structs.h",
    "content": "/* ----------------------------------------------------------------------\n * Project:      CMSIS DSP Library\n * Title:        arm_const_structs.h\n * Description:  Constant structs that are initialized for user convenience.\n *               For example, some can be given as arguments to the arm_cfft_f32() function.\n *\n * $Date:        27. January 2017\n * $Revision:    V.1.5.1\n *\n * Target Processor: Cortex-M cores\n * -------------------------------------------------------------------- */\n/*\n * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef _ARM_CONST_STRUCTS_H\n#define _ARM_CONST_STRUCTS_H\n\n#include \"arm_math.h\"\n#include \"arm_common_tables.h\"\n\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;\n   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;\n\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;\n   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;\n\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;\n   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/arm_math.h",
    "content": "/******************************************************************************\n * @file     arm_math.h\n * @brief    Public header file for CMSIS DSP Library\n * @version  V1.6.0\n * @date     18. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n/**\n   \\mainpage CMSIS DSP Software Library\n   *\n   * Introduction\n   * ------------\n   *\n   * This user manual describes the CMSIS DSP software library,\n   * a suite of common signal processing functions for use on Cortex-M processor based devices.\n   *\n   * The library is divided into a number of functions each covering a specific category:\n   * - Basic math functions\n   * - Fast math functions\n   * - Complex math functions\n   * - Filters\n   * - Matrix functions\n   * - Transform functions\n   * - Motor control functions\n   * - Statistical functions\n   * - Support functions\n   * - Interpolation functions\n   *\n   * The library has separate functions for operating on 8-bit integers, 16-bit integers,\n   * 32-bit integer and 32-bit floating-point values.\n   *\n   * Using the Library\n   * ------------\n   *\n   * The library installer contains prebuilt versions of the libraries in the Lib folder.\n   * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit)\n   * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit)\n   * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit)\n   * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on)\n   * - arm_cortexM7l_math.lib (Cortex-M7, Little endian)\n   * - arm_cortexM7b_math.lib (Cortex-M7, Big endian)\n   * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit)\n   * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit)\n   * - arm_cortexM4l_math.lib (Cortex-M4, Little endian)\n   * - arm_cortexM4b_math.lib (Cortex-M4, Big endian)\n   * - arm_cortexM3l_math.lib (Cortex-M3, Little endian)\n   * - arm_cortexM3b_math.lib (Cortex-M3, Big endian)\n   * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian)\n   * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian)\n   * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian)\n   * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian)\n   * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point Unit)\n   * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions)\n   * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precision Floating Point Unit)\n   *\n   * The library functions are declared in the public file arm_math.h which is placed in the Include folder.\n   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single\n   * public header file  arm_math.h for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.\n   *\n   *\n   * Examples\n   * --------\n   *\n   * The library ships with a number of examples which demonstrate how to use the library functions.\n   *\n   * Toolchain Support\n   * ------------\n   *\n   * The library has been developed and tested with MDK version 5.14.0.0\n   * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.\n   *\n   * Building the Library\n   * ------------\n   *\n   * The library installer contains a project file to rebuild libraries on MDK toolchain in the CMSIS\\\\DSP\\\\Projects\\\\ARM folder.\n   * - arm_cortexM_math.uvprojx\n   *\n   *\n   * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional preprocessor macros detailed above.\n   *\n   * Preprocessor Macros\n   * ------------\n   *\n   * Each library project have different preprocessor macros.\n   *\n   * - ARM_MATH_BIG_ENDIAN:\n   *\n   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.\n   *\n   * - ARM_MATH_MATRIX_CHECK:\n   *\n   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices\n   *\n   * - ARM_MATH_ROUNDING:\n   *\n   * Define macro ARM_MATH_ROUNDING for rounding on support functions\n   *\n   * - ARM_MATH_LOOPUNROLL:\n   *\n   * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions\n   *\n   * 
\n   * CMSIS-DSP in ARM::CMSIS Pack\n   * -----------------------------\n   *\n   * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories:\n   * |File/Folder                      |Content                                                                 |\n   * |---------------------------------|------------------------------------------------------------------------|\n   * |\\b CMSIS\\\\Documentation\\\\DSP     | This documentation                                                     |\n   * |\\b CMSIS\\\\DSP\\\\DSP_Lib_TestSuite | DSP_Lib test suite                                                     |\n   * |\\b CMSIS\\\\DSP\\\\Examples          | Example projects demonstrating the usage of the library functions      |\n   * |\\b CMSIS\\\\DSP\\\\Include           | DSP_Lib include files                                                  |\n   * |\\b CMSIS\\\\DSP\\\\Lib               | DSP_Lib binaries                                                       |\n   * |\\b CMSIS\\\\DSP\\\\Projects          | Projects to rebuild DSP_Lib binaries                                   |\n   * |\\b CMSIS\\\\DSP\\\\Source            | DSP_Lib source files                                                   |\n   *\n   * 
\n   * Revision History of CMSIS-DSP\n   * ------------\n   * Please refer to \\ref ChangeLog_pg.\n   */\n\n\n/**\n * @defgroup groupMath Basic Math Functions\n */\n\n/**\n * @defgroup groupFastMath Fast Math Functions\n * This set of functions provides a fast approximation to sine, cosine, and square root.\n * As compared to most of the other functions in the CMSIS math library, the fast math functions\n * operate on individual values and not arrays.\n * There are separate functions for Q15, Q31, and floating-point data.\n *\n */\n\n/**\n * @defgroup groupCmplxMath Complex Math Functions\n * This set of functions operates on complex data vectors.\n * The data in the complex arrays is stored in an interleaved fashion\n * (real, imag, real, imag, ...).\n * In the API functions, the number of samples in a complex array refers\n * to the number of complex values; the array contains twice this number of\n * real values.\n */\n\n/**\n * @defgroup groupFilters Filtering Functions\n */\n\n/**\n * @defgroup groupMatrix Matrix Functions\n *\n * This set of functions provides basic matrix math operations.\n * The functions operate on matrix data structures.  For example,\n * the type\n * definition for the floating-point matrix structure is shown\n * below:\n * 
\n *     typedef struct\n *     {\n *       uint16_t numRows;     // number of rows of the matrix.\n *       uint16_t numCols;     // number of columns of the matrix.\n *       float32_t *pData;     // points to the data of the matrix.\n *     } arm_matrix_instance_f32;\n * 
\n * There are similar definitions for Q15 and Q31 data types.\n *\n * The structure specifies the size of the matrix and then points to\n * an array of data.  The array is of size numRows X numCols\n * and the values are arranged in row order.  That is, the\n * matrix element (i, j) is stored at:\n * 
\n *     pData[i*numCols + j]\n * 
\n *\n * \\par Init Functions\n * There is an associated initialization function for each type of matrix\n * data structure.\n * The initialization function sets the values of the internal structure fields.\n * Refer to \\ref arm_mat_init_f32(), \\ref arm_mat_init_q31() and \\ref arm_mat_init_q15()\n * for floating-point, Q31 and Q15 types,  respectively.\n *\n * \\par\n * Use of the initialization function is optional. However, if initialization function is used\n * then the instance structure cannot be placed into a const data section.\n * To place the instance structure in a const data\n * section, manually initialize the data structure.  For example:\n * 
\n * arm_matrix_instance_f32 S = {nRows, nColumns, pData};\n * arm_matrix_instance_q31 S = {nRows, nColumns, pData};\n * arm_matrix_instance_q15 S = {nRows, nColumns, pData};\n * 
\n * where nRows specifies the number of rows, nColumns\n * specifies the number of columns, and pData points to the\n * data array.\n *\n * \\par Size Checking\n * By default all of the matrix functions perform size checking on the input and\n * output matrices. For example, the matrix addition function verifies that the\n * two input matrices and the output matrix all have the same number of rows and\n * columns. If the size check fails the functions return:\n * 
\n *     ARM_MATH_SIZE_MISMATCH\n * 
\n * Otherwise the functions return\n * 
\n *     ARM_MATH_SUCCESS\n * 
\n * There is some overhead associated with this matrix size checking.\n * The matrix size checking is enabled via the \\#define\n * 
\n *     ARM_MATH_MATRIX_CHECK\n * 
\n * within the library project settings.  By default this macro is defined\n * and size checking is enabled. By changing the project settings and\n * undefining this macro size checking is eliminated and the functions\n * run a bit faster. With size checking disabled the functions always\n * return ARM_MATH_SUCCESS.\n */\n\n/**\n * @defgroup groupTransforms Transform Functions\n */\n\n/**\n * @defgroup groupController Controller Functions\n */\n\n/**\n * @defgroup groupStats Statistics Functions\n */\n\n/**\n * @defgroup groupSupport Support Functions\n */\n\n/**\n * @defgroup groupInterpolation Interpolation Functions\n * These functions perform 1- and 2-dimensional interpolation of data.\n * Linear interpolation is used for 1-dimensional data and\n * bilinear interpolation is used for 2-dimensional data.\n */\n\n/**\n * @defgroup groupExamples Examples\n */\n\n#ifndef _ARM_MATH_H\n#define _ARM_MATH_H\n\n#ifndef __uint32_t_defined\ntypedef unsigned int uint32_t;\n# define __uint32_t_defined\n#endif\n\n/* Compiler specific diagnostic adjustment */\n#if   defined ( __CC_ARM )\n\n#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )\n\n#elif defined ( __GNUC__ )\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wsign-conversion\"\n  #pragma GCC diagnostic ignored \"-Wconversion\"\n  #pragma GCC diagnostic ignored \"-Wunused-parameter\"\n\n#elif defined ( __ICCARM__ )\n\n#elif defined ( __TI_ARM__ )\n\n#elif defined ( __CSMC__ )\n\n#elif defined ( __TASKING__ )\n\n#else\n  #error Unknown compiler\n#endif\n\n\n#include \"cmsis_compiler.h\"\n#include \"string.h\"\n#include \"math.h\"\n\n/* evaluate ARM architecture */\n#if   defined (__ARM_ARCH_6M__)\n  #define ARM_MATH_CM0_FAMILY            1\n#elif defined (__ARM_ARCH_7M__)\n//#define ARM_MATH_CM0_FAMILY            0\n#elif defined (__ARM_ARCH_7EM__)\n//#define ARM_MATH_CM0_FAMILY            0\n#elif defined (__ARM_ARCH_8M_BASE__)\n  #define ARM_MATH_CM0_FAMILY            1\n#elif defined (__ARM_ARCH_8M_MAIN__)\n//#define ARM_MATH_CM0_FAMILY            0\n#else\n  #error \"Unknown Arm Architecture!\"\n#endif\n\n/* evaluate ARM DSP feature */\n#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))\n  #define ARM_MATH_DSP                   1\n#endif\n\n\n\n\n#ifdef   __cplusplus\nextern \"C\"\n{\n#endif\n\n\n  /**\n   * @brief Macros required for reciprocal calculation in Normalized LMS\n   */\n\n#define DELTA_Q31          (0x100)\n#define DELTA_Q15          0x5\n#define INDEX_MASK         0x0000003F\n#ifndef PI\n  #define PI               3.14159265358979f\n#endif\n\n  /**\n   * @brief Macros required for SINE and COSINE Fast math approximations\n   */\n\n#define FAST_MATH_TABLE_SIZE  512\n#define FAST_MATH_Q31_SHIFT   (32 - 10)\n#define FAST_MATH_Q15_SHIFT   (16 - 10)\n#define CONTROLLER_Q31_SHIFT  (32 - 9)\n#define TABLE_SPACING_Q31     0x400000\n#define TABLE_SPACING_Q15     0x80\n\n  /**\n   * @brief Macros required for SINE and COSINE Controller functions\n   */\n  /* 1.31(q31) Fixed value of 2/360 */\n  /* -1 to +1 is divided into 360 values so total spacing is (2/360) */\n#define INPUT_SPACING         0xB60B61\n\n\n  /**\n   * @brief Error status returned by some functions in the library.\n   */\n\n  typedef enum\n  {\n    ARM_MATH_SUCCESS        =  0,        /**< No error */\n    ARM_MATH_ARGUMENT_ERROR = -1,        /**< One or more arguments are incorrect */\n    ARM_MATH_LENGTH_ERROR   = -2,        /**< Length of data buffer is incorrect */\n    ARM_MATH_SIZE_MISMATCH  = -3,        /**< Size of matrices is not compatible with the operation */\n    ARM_MATH_NANINF         = -4,        /**< Not-a-number (NaN) or infinity is generated */\n    ARM_MATH_SINGULAR       = -5,        /**< Input matrix is singular and cannot be inverted */\n    ARM_MATH_TEST_FAILURE   = -6         /**< Test Failed */\n  } arm_status;\n\n  /**\n   * @brief 8-bit fractional data type in 1.7 format.\n   */\n  typedef int8_t q7_t;\n\n  /**\n   * @brief 16-bit fractional data type in 1.15 format.\n   */\n  typedef int16_t q15_t;\n\n  /**\n   * @brief 32-bit fractional data type in 1.31 format.\n   */\n  typedef int32_t q31_t;\n\n  /**\n   * @brief 64-bit fractional data type in 1.63 format.\n   */\n  typedef int64_t q63_t;\n\n  /**\n   * @brief 32-bit floating-point type definition.\n   */\n  typedef float float32_t;\n\n  /**\n   * @brief 64-bit floating-point type definition.\n   */\n  typedef double float64_t;\n\n\n/**\n  @brief definition to read/write two 16 bit values.\n  @deprecated\n */\n#if   defined ( __CC_ARM )\n  #define __SIMD32_TYPE int32_t __packed\n#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )\n  #define __SIMD32_TYPE int32_t\n#elif defined ( __GNUC__ )\n  #define __SIMD32_TYPE int32_t\n#elif defined ( __ICCARM__ )\n  #define __SIMD32_TYPE int32_t __packed\n#elif defined ( __TI_ARM__ )\n  #define __SIMD32_TYPE int32_t\n#elif defined ( __CSMC__ )\n  #define __SIMD32_TYPE int32_t\n#elif defined ( __TASKING__ )\n  #define __SIMD32_TYPE __unaligned int32_t\n#else\n  #error Unknown compiler\n#endif\n\n#define __SIMD32(addr)        (*(__SIMD32_TYPE **) & (addr))\n#define __SIMD32_CONST(addr)  ( (__SIMD32_TYPE * )   (addr))\n#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE * )   (addr))\n#define __SIMD64(addr)        (*(      int64_t **) & (addr))\n\n/* SIMD replacement */\n\n/**\n  @brief         Read 2 Q15 from Q15 pointer.\n  @param[in]     pQ15      points to input value\n  @return        Q31 value\n */\n__STATIC_FORCEINLINE q31_t read_q15x2 (\n  q15_t * pQ15)\n{\n  q31_t val;\n\n  memcpy (&val, pQ15, 4);\n\n  return (val);\n}\n\n/**\n  @brief         Read 2 Q15 from Q15 pointer and increment pointer afterwards.\n  @param[in]     pQ15      points to input value\n  @return        Q31 value\n */\n__STATIC_FORCEINLINE q31_t read_q15x2_ia (\n  q15_t ** pQ15)\n{\n  q31_t val;\n\n  memcpy (&val, *pQ15, 4);\n  *pQ15 += 2;\n\n  return (val);\n}\n\n/**\n  @brief         Read 2 Q15 from Q15 pointer and decrement pointer afterwards.\n  @param[in]     pQ15      points to input value\n  @return        Q31 value\n */\n__STATIC_FORCEINLINE q31_t read_q15x2_da (\n  q15_t ** pQ15)\n{\n  q31_t val;\n\n  memcpy (&val, *pQ15, 4);\n  *pQ15 -= 2;\n\n  return (val);\n}\n\n/**\n  @brief         Write 2 Q15 to Q15 pointer and increment pointer afterwards.\n  @param[in]     pQ15      points to input value\n  @param[in]     value     Q31 value\n  @return        none\n */\n__STATIC_FORCEINLINE void write_q15x2_ia (\n  q15_t ** pQ15,\n  q31_t    value)\n{\n  q31_t val = value;\n\n  memcpy (*pQ15, &val, 4);\n  *pQ15 += 2;\n}\n\n/**\n  @brief         Write 2 Q15 to Q15 pointer.\n  @param[in]     pQ15      points to input value\n  @param[in]     value     Q31 value\n  @return        none\n */\n__STATIC_FORCEINLINE void write_q15x2 (\n  q15_t * pQ15,\n  q31_t   value)\n{\n  q31_t val = value;\n\n  memcpy (pQ15, &val, 4);\n}\n\n\n/**\n  @brief         Read 4 Q7 from Q7 pointer and increment pointer afterwards.\n  @param[in]     pQ7       points to input value\n  @return        Q31 value\n */\n__STATIC_FORCEINLINE q31_t read_q7x4_ia (\n  q7_t ** pQ7)\n{\n  q31_t val;\n\n  memcpy (&val, *pQ7, 4);\n  *pQ7 += 4;\n\n  return (val);\n}\n\n/**\n  @brief         Read 4 Q7 from Q7 pointer and decrement pointer afterwards.\n  @param[in]     pQ7       points to input value\n  @return        Q31 value\n */\n__STATIC_FORCEINLINE q31_t read_q7x4_da (\n  q7_t ** pQ7)\n{\n  q31_t val;\n\n  memcpy (&val, *pQ7, 4);\n  *pQ7 -= 4;\n\n  return (val);\n}\n\n/**\n  @brief         Write 4 Q7 to Q7 pointer and increment pointer afterwards.\n  @param[in]     pQ7       points to input value\n  @param[in]     value     Q31 value\n  @return        none\n */\n__STATIC_FORCEINLINE void write_q7x4_ia (\n  q7_t ** pQ7,\n  q31_t   value)\n{\n  q31_t val = value;\n\n  memcpy (*pQ7, &val, 4);\n  *pQ7 += 4;\n}\n\n\n#ifndef ARM_MATH_DSP\n  /**\n   * @brief definition to pack two 16 bit values.\n   */\n  #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0x0000FFFF) | \\\n                                      (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )\n  #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0xFFFF0000) | \\\n                                      (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )\n#endif\n\n   /**\n   * @brief definition to pack four 8 bit values.\n   */\n#ifndef ARM_MATH_BIG_ENDIAN\n  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \\\n                                  (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \\\n                                  (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \\\n                                  (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )\n#else\n  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \\\n                                  (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \\\n                                  (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \\\n                                  (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )\n#endif\n\n\n  /**\n   * @brief Clips Q63 to Q31 values.\n   */\n  __STATIC_FORCEINLINE q31_t clip_q63_to_q31(\n  q63_t x)\n  {\n    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?\n      ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;\n  }\n\n  /**\n   * @brief Clips Q63 to Q15 values.\n   */\n  __STATIC_FORCEINLINE q15_t clip_q63_to_q15(\n  q63_t x)\n  {\n    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?\n      ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);\n  }\n\n  /**\n   * @brief Clips Q31 to Q7 values.\n   */\n  __STATIC_FORCEINLINE q7_t clip_q31_to_q7(\n  q31_t x)\n  {\n    return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?\n      ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;\n  }\n\n  /**\n   * @brief Clips Q31 to Q15 values.\n   */\n  __STATIC_FORCEINLINE q15_t clip_q31_to_q15(\n  q31_t x)\n  {\n    return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?\n      ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;\n  }\n\n  /**\n   * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.\n   */\n  __STATIC_FORCEINLINE q63_t mult32x64(\n  q63_t x,\n  q31_t y)\n  {\n    return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +\n            (((q63_t) (x >> 32)                * y)      )  );\n  }\n\n  /**\n   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.\n   */\n  __STATIC_FORCEINLINE uint32_t arm_recip_q31(\n        q31_t in,\n        q31_t * dst,\n  const q31_t * pRecipTable)\n  {\n    q31_t out;\n    uint32_t tempVal;\n    uint32_t index, i;\n    uint32_t signBits;\n\n    if (in > 0)\n    {\n      signBits = ((uint32_t) (__CLZ( in) - 1));\n    }\n    else\n    {\n      signBits = ((uint32_t) (__CLZ(-in) - 1));\n    }\n\n    /* Convert input sample to 1.31 format */\n    in = (in << signBits);\n\n    /* calculation of index for initial approximated Val */\n    index = (uint32_t)(in >> 24);\n    index = (index & INDEX_MASK);\n\n    /* 1.31 with exp 1 */\n    out = pRecipTable[index];\n\n    /* calculation of reciprocal value */\n    /* running approximation for two iterations */\n    for (i = 0U; i < 2U; i++)\n    {\n      tempVal = (uint32_t) (((q63_t) in * out) >> 31);\n      tempVal = 0x7FFFFFFFu - tempVal;\n      /*      1.31 with exp 1 */\n      /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */\n      out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);\n    }\n\n    /* write output */\n    *dst = out;\n\n    /* return num of signbits of out = 1/in value */\n    return (signBits + 1U);\n  }\n\n\n  /**\n   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.\n   */\n  __STATIC_FORCEINLINE uint32_t arm_recip_q15(\n        q15_t in,\n        q15_t * dst,\n  const q15_t * pRecipTable)\n  {\n    q15_t out = 0;\n    uint32_t tempVal = 0;\n    uint32_t index = 0, i = 0;\n    uint32_t signBits = 0;\n\n    if (in > 0)\n    {\n      signBits = ((uint32_t)(__CLZ( in) - 17));\n    }\n    else\n    {\n      signBits = ((uint32_t)(__CLZ(-in) - 17));\n    }\n\n    /* Convert input sample to 1.15 format */\n    in = (in << signBits);\n\n    /* calculation of index for initial approximated Val */\n    index = (uint32_t)(in >>  8);\n    index = (index & INDEX_MASK);\n\n    /*      1.15 with exp 1  */\n    out = pRecipTable[index];\n\n    /* calculation of reciprocal value */\n    /* running approximation for two iterations */\n    for (i = 0U; i < 2U; i++)\n    {\n      tempVal = (uint32_t) (((q31_t) in * out) >> 15);\n      tempVal = 0x7FFFu - tempVal;\n      /*      1.15 with exp 1 */\n      out = (q15_t) (((q31_t) out * tempVal) >> 14);\n      /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */\n    }\n\n    /* write output */\n    *dst = out;\n\n    /* return num of signbits of out = 1/in value */\n    return (signBits + 1);\n  }\n\n\n/*\n * @brief C custom defined intrinsic functions\n */\n#if !defined (ARM_MATH_DSP)\n\n  /*\n   * @brief C custom defined QADD8\n   */\n  __STATIC_FORCEINLINE uint32_t __QADD8(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s, t, u;\n\n    r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;\n    s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;\n    t = __SSAT(((((q31_t)x <<  8) >> 24) + (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;\n    u = __SSAT(((((q31_t)x      ) >> 24) + (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;\n\n    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined QSUB8\n   */\n  __STATIC_FORCEINLINE uint32_t __QSUB8(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s, t, u;\n\n    r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;\n    s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;\n    t = __SSAT(((((q31_t)x <<  8) >> 24) - (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;\n    u = __SSAT(((((q31_t)x      ) >> 24) - (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;\n\n    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined QADD16\n   */\n  __STATIC_FORCEINLINE uint32_t __QADD16(\n  uint32_t x,\n  uint32_t y)\n  {\n/*  q31_t r,     s;  without initialisation 'arm_offset_q15 test' fails  but 'intrinsic' tests pass! for armCC */\n    q31_t r = 0, s = 0;\n\n    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;\n    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;\n\n    return ((uint32_t)((s << 16) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined SHADD16\n   */\n  __STATIC_FORCEINLINE uint32_t __SHADD16(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s;\n\n    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;\n    s = (((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;\n\n    return ((uint32_t)((s << 16) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined QSUB16\n   */\n  __STATIC_FORCEINLINE uint32_t __QSUB16(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s;\n\n    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;\n    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;\n\n    return ((uint32_t)((s << 16) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined SHSUB16\n   */\n  __STATIC_FORCEINLINE uint32_t __SHSUB16(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s;\n\n    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;\n    s = (((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;\n\n    return ((uint32_t)((s << 16) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined QASX\n   */\n  __STATIC_FORCEINLINE uint32_t __QASX(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s;\n\n    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;\n    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;\n\n    return ((uint32_t)((s << 16) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined SHASX\n   */\n  __STATIC_FORCEINLINE uint32_t __SHASX(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s;\n\n    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;\n    s = (((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;\n\n    return ((uint32_t)((s << 16) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined QSAX\n   */\n  __STATIC_FORCEINLINE uint32_t __QSAX(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s;\n\n    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;\n    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;\n\n    return ((uint32_t)((s << 16) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined SHSAX\n   */\n  __STATIC_FORCEINLINE uint32_t __SHSAX(\n  uint32_t x,\n  uint32_t y)\n  {\n    q31_t r, s;\n\n    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;\n    s = (((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;\n\n    return ((uint32_t)((s << 16) | (r      )));\n  }\n\n\n  /*\n   * @brief C custom defined SMUSDX\n   */\n  __STATIC_FORCEINLINE uint32_t __SMUSDX(\n  uint32_t x,\n  uint32_t y)\n  {\n    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));\n  }\n\n  /*\n   * @brief C custom defined SMUADX\n   */\n  __STATIC_FORCEINLINE uint32_t __SMUADX(\n  uint32_t x,\n  uint32_t y)\n  {\n    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));\n  }\n\n\n  /*\n   * @brief C custom defined QADD\n   */\n  __STATIC_FORCEINLINE int32_t __QADD(\n  int32_t x,\n  int32_t y)\n  {\n    return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));\n  }\n\n\n  /*\n   * @brief C custom defined QSUB\n   */\n  __STATIC_FORCEINLINE int32_t __QSUB(\n  int32_t x,\n  int32_t y)\n  {\n    return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));\n  }\n\n\n  /*\n   * @brief C custom defined SMLAD\n   */\n  __STATIC_FORCEINLINE uint32_t __SMLAD(\n  uint32_t x,\n  uint32_t y,\n  uint32_t sum)\n  {\n    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +\n                       ( ((q31_t)sum    )                                  )   ));\n  }\n\n\n  /*\n   * @brief C custom defined SMLADX\n   */\n  __STATIC_FORCEINLINE uint32_t __SMLADX(\n  uint32_t x,\n  uint32_t y,\n  uint32_t sum)\n  {\n    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +\n                       ( ((q31_t)sum    )                                  )   ));\n  }\n\n\n  /*\n   * @brief C custom defined SMLSDX\n   */\n  __STATIC_FORCEINLINE uint32_t __SMLSDX(\n  uint32_t x,\n  uint32_t y,\n  uint32_t sum)\n  {\n    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +\n                       ( ((q31_t)sum    )                                  )   ));\n  }\n\n\n  /*\n   * @brief C custom defined SMLALD\n   */\n  __STATIC_FORCEINLINE uint64_t __SMLALD(\n  uint32_t x,\n  uint32_t y,\n  uint64_t sum)\n  {\n/*  return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */\n    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +\n                       ( ((q63_t)sum    )                                  )   ));\n  }\n\n\n  /*\n   * @brief C custom defined SMLALDX\n   */\n  __STATIC_FORCEINLINE uint64_t __SMLALDX(\n  uint32_t x,\n  uint32_t y,\n  uint64_t sum)\n  {\n/*  return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */\n    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +\n                       ( ((q63_t)sum    )                                  )   ));\n  }\n\n\n  /*\n   * @brief C custom defined SMUAD\n   */\n  __STATIC_FORCEINLINE uint32_t __SMUAD(\n  uint32_t x,\n  uint32_t y)\n  {\n    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));\n  }\n\n\n  /*\n   * @brief C custom defined SMUSD\n   */\n  __STATIC_FORCEINLINE uint32_t __SMUSD(\n  uint32_t x,\n  uint32_t y)\n  {\n    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -\n                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));\n  }\n\n\n  /*\n   * @brief C custom defined SXTB16\n   */\n  __STATIC_FORCEINLINE uint32_t __SXTB16(\n  uint32_t x)\n  {\n    return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |\n                       ((((q31_t)x <<  8) >>  8) & (q31_t)0xFFFF0000)  ));\n  }\n\n  /*\n   * @brief C custom defined SMMLA\n   */\n  __STATIC_FORCEINLINE int32_t __SMMLA(\n  int32_t x,\n  int32_t y,\n  int32_t sum)\n  {\n    return (sum + (int32_t) (((int64_t) x * y) >> 32));\n  }\n\n#endif /* !defined (ARM_MATH_DSP) */\n\n\n  /**\n   * @brief Instance structure for the Q7 FIR filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;        /**< number of filter coefficients in the filter. */\n          q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n    const q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/\n  } arm_fir_instance_q7;\n\n  /**\n   * @brief Instance structure for the Q15 FIR filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;         /**< number of filter coefficients in the filter. */\n          q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n    const q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/\n  } arm_fir_instance_q15;\n\n  /**\n   * @brief Instance structure for the Q31 FIR filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;         /**< number of filter coefficients in the filter. */\n          q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n    const q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */\n  } arm_fir_instance_q31;\n\n  /**\n   * @brief Instance structure for the floating-point FIR filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;     /**< number of filter coefficients in the filter. */\n          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n    const float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */\n  } arm_fir_instance_f32;\n\n  /**\n   * @brief Processing function for the Q7 FIR filter.\n   * @param[in]  S          points to an instance of the Q7 FIR filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_q7(\n  const arm_fir_instance_q7 * S,\n  const q7_t * pSrc,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief  Initialization function for the Q7 FIR filter.\n   * @param[in,out] S          points to an instance of the Q7 FIR structure.\n   * @param[in]     numTaps    Number of filter coefficients in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of samples that are processed.\n   */\n  void arm_fir_init_q7(\n        arm_fir_instance_q7 * S,\n        uint16_t numTaps,\n  const q7_t * pCoeffs,\n        q7_t * pState,\n        uint32_t blockSize);\n\n  /**\n   * @brief Processing function for the Q15 FIR filter.\n   * @param[in]  S          points to an instance of the Q15 FIR structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_q15(\n  const arm_fir_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief Processing function for the fast Q15 FIR filter (fast version).\n   * @param[in]  S          points to an instance of the Q15 FIR filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_fast_q15(\n  const arm_fir_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief  Initialization function for the Q15 FIR filter.\n   * @param[in,out] S          points to an instance of the Q15 FIR filter structure.\n   * @param[in]     numTaps    Number of filter coefficients in the filter. Must be even and greater than or equal to 4.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of samples that are processed at a time.\n   * @return     The function returns either\n   * ARM_MATH_SUCCESS if initialization was successful or\n   * ARM_MATH_ARGUMENT_ERROR if numTaps is not a supported value.\n   */\n  arm_status arm_fir_init_q15(\n        arm_fir_instance_q15 * S,\n        uint16_t numTaps,\n  const q15_t * pCoeffs,\n        q15_t * pState,\n        uint32_t blockSize);\n\n  /**\n   * @brief Processing function for the Q31 FIR filter.\n   * @param[in]  S          points to an instance of the Q31 FIR filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_q31(\n  const arm_fir_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief Processing function for the fast Q31 FIR filter (fast version).\n   * @param[in]  S          points to an instance of the Q31 FIR filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_fast_q31(\n  const arm_fir_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief  Initialization function for the Q31 FIR filter.\n   * @param[in,out] S          points to an instance of the Q31 FIR structure.\n   * @param[in]     numTaps    Number of filter coefficients in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of samples that are processed at a time.\n   */\n  void arm_fir_init_q31(\n        arm_fir_instance_q31 * S,\n        uint16_t numTaps,\n  const q31_t * pCoeffs,\n        q31_t * pState,\n        uint32_t blockSize);\n\n  /**\n   * @brief Processing function for the floating-point FIR filter.\n   * @param[in]  S          points to an instance of the floating-point FIR structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_f32(\n  const arm_fir_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief  Initialization function for the floating-point FIR filter.\n   * @param[in,out] S          points to an instance of the floating-point FIR filter structure.\n   * @param[in]     numTaps    Number of filter coefficients in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of samples that are processed at a time.\n   */\n  void arm_fir_init_f32(\n        arm_fir_instance_f32 * S,\n        uint16_t numTaps,\n  const float32_t * pCoeffs,\n        float32_t * pState,\n        uint32_t blockSize);\n\n  /**\n   * @brief Instance structure for the Q15 Biquad cascade filter.\n   */\n  typedef struct\n  {\n          int8_t numStages;        /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */\n          q15_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */\n    const q15_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */\n          int8_t postShift;        /**< Additional shift, in bits, applied to each output sample. */\n  } arm_biquad_casd_df1_inst_q15;\n\n  /**\n   * @brief Instance structure for the Q31 Biquad cascade filter.\n   */\n  typedef struct\n  {\n          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */\n          q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */\n    const q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */\n          uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */\n  } arm_biquad_casd_df1_inst_q31;\n\n  /**\n   * @brief Instance structure for the floating-point Biquad cascade filter.\n   */\n  typedef struct\n  {\n          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */\n          float32_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */\n    const float32_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */\n  } arm_biquad_casd_df1_inst_f32;\n\n  /**\n   * @brief Processing function for the Q15 Biquad cascade filter.\n   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cascade_df1_q15(\n  const arm_biquad_casd_df1_inst_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief  Initialization function for the Q15 Biquad cascade filter.\n   * @param[in,out] S          points to an instance of the Q15 Biquad cascade structure.\n   * @param[in]     numStages  number of 2nd order stages in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format\n   */\n  void arm_biquad_cascade_df1_init_q15(\n        arm_biquad_casd_df1_inst_q15 * S,\n        uint8_t numStages,\n  const q15_t * pCoeffs,\n        q15_t * pState,\n        int8_t postShift);\n\n  /**\n   * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.\n   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cascade_df1_fast_q15(\n  const arm_biquad_casd_df1_inst_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief Processing function for the Q31 Biquad cascade filter\n   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cascade_df1_q31(\n  const arm_biquad_casd_df1_inst_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.\n   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cascade_df1_fast_q31(\n  const arm_biquad_casd_df1_inst_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief  Initialization function for the Q31 Biquad cascade filter.\n   * @param[in,out] S          points to an instance of the Q31 Biquad cascade structure.\n   * @param[in]     numStages  number of 2nd order stages in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format\n   */\n  void arm_biquad_cascade_df1_init_q31(\n        arm_biquad_casd_df1_inst_q31 * S,\n        uint8_t numStages,\n  const q31_t * pCoeffs,\n        q31_t * pState,\n        int8_t postShift);\n\n  /**\n   * @brief Processing function for the floating-point Biquad cascade filter.\n   * @param[in]  S          points to an instance of the floating-point Biquad cascade structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cascade_df1_f32(\n  const arm_biquad_casd_df1_inst_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief  Initialization function for the floating-point Biquad cascade filter.\n   * @param[in,out] S          points to an instance of the floating-point Biquad cascade structure.\n   * @param[in]     numStages  number of 2nd order stages in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   */\n  void arm_biquad_cascade_df1_init_f32(\n        arm_biquad_casd_df1_inst_f32 * S,\n        uint8_t numStages,\n  const float32_t * pCoeffs,\n        float32_t * pState);\n\n  /**\n   * @brief Instance structure for the floating-point matrix structure.\n   */\n  typedef struct\n  {\n    uint16_t numRows;     /**< number of rows of the matrix.     */\n    uint16_t numCols;     /**< number of columns of the matrix.  */\n    float32_t *pData;     /**< points to the data of the matrix. */\n  } arm_matrix_instance_f32;\n\n\n  /**\n   * @brief Instance structure for the floating-point matrix structure.\n   */\n  typedef struct\n  {\n    uint16_t numRows;     /**< number of rows of the matrix.     */\n    uint16_t numCols;     /**< number of columns of the matrix.  */\n    float64_t *pData;     /**< points to the data of the matrix. */\n  } arm_matrix_instance_f64;\n\n  /**\n   * @brief Instance structure for the Q15 matrix structure.\n   */\n  typedef struct\n  {\n    uint16_t numRows;     /**< number of rows of the matrix.     */\n    uint16_t numCols;     /**< number of columns of the matrix.  */\n    q15_t *pData;         /**< points to the data of the matrix. */\n  } arm_matrix_instance_q15;\n\n  /**\n   * @brief Instance structure for the Q31 matrix structure.\n   */\n  typedef struct\n  {\n    uint16_t numRows;     /**< number of rows of the matrix.     */\n    uint16_t numCols;     /**< number of columns of the matrix.  */\n    q31_t *pData;         /**< points to the data of the matrix. */\n  } arm_matrix_instance_q31;\n\n  /**\n   * @brief Floating-point matrix addition.\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_add_f32(\n  const arm_matrix_instance_f32 * pSrcA,\n  const arm_matrix_instance_f32 * pSrcB,\n        arm_matrix_instance_f32 * pDst);\n\n  /**\n   * @brief Q15 matrix addition.\n   * @param[in]   pSrcA  points to the first input matrix structure\n   * @param[in]   pSrcB  points to the second input matrix structure\n   * @param[out]  pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_add_q15(\n  const arm_matrix_instance_q15 * pSrcA,\n  const arm_matrix_instance_q15 * pSrcB,\n        arm_matrix_instance_q15 * pDst);\n\n  /**\n   * @brief Q31 matrix addition.\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_add_q31(\n  const arm_matrix_instance_q31 * pSrcA,\n  const arm_matrix_instance_q31 * pSrcB,\n        arm_matrix_instance_q31 * pDst);\n\n  /**\n   * @brief Floating-point, complex, matrix multiplication.\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_cmplx_mult_f32(\n  const arm_matrix_instance_f32 * pSrcA,\n  const arm_matrix_instance_f32 * pSrcB,\n        arm_matrix_instance_f32 * pDst);\n\n  /**\n   * @brief Q15, complex,  matrix multiplication.\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_cmplx_mult_q15(\n  const arm_matrix_instance_q15 * pSrcA,\n  const arm_matrix_instance_q15 * pSrcB,\n        arm_matrix_instance_q15 * pDst,\n        q15_t * pScratch);\n\n  /**\n   * @brief Q31, complex, matrix multiplication.\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_cmplx_mult_q31(\n  const arm_matrix_instance_q31 * pSrcA,\n  const arm_matrix_instance_q31 * pSrcB,\n        arm_matrix_instance_q31 * pDst);\n\n  /**\n   * @brief Floating-point matrix transpose.\n   * @param[in]  pSrc  points to the input matrix\n   * @param[out] pDst  points to the output matrix\n   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH\n   * or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_trans_f32(\n  const arm_matrix_instance_f32 * pSrc,\n        arm_matrix_instance_f32 * pDst);\n\n  /**\n   * @brief Q15 matrix transpose.\n   * @param[in]  pSrc  points to the input matrix\n   * @param[out] pDst  points to the output matrix\n   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH\n   * or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_trans_q15(\n  const arm_matrix_instance_q15 * pSrc,\n        arm_matrix_instance_q15 * pDst);\n\n  /**\n   * @brief Q31 matrix transpose.\n   * @param[in]  pSrc  points to the input matrix\n   * @param[out] pDst  points to the output matrix\n   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH\n   * or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_trans_q31(\n  const arm_matrix_instance_q31 * pSrc,\n        arm_matrix_instance_q31 * pDst);\n\n  /**\n   * @brief Floating-point matrix multiplication\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_mult_f32(\n  const arm_matrix_instance_f32 * pSrcA,\n  const arm_matrix_instance_f32 * pSrcB,\n        arm_matrix_instance_f32 * pDst);\n\n  /**\n   * @brief Q15 matrix multiplication\n   * @param[in]  pSrcA   points to the first input matrix structure\n   * @param[in]  pSrcB   points to the second input matrix structure\n   * @param[out] pDst    points to output matrix structure\n   * @param[in]  pState  points to the array for storing intermediate results\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_mult_q15(\n  const arm_matrix_instance_q15 * pSrcA,\n  const arm_matrix_instance_q15 * pSrcB,\n        arm_matrix_instance_q15 * pDst,\n        q15_t * pState);\n\n  /**\n   * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4\n   * @param[in]  pSrcA   points to the first input matrix structure\n   * @param[in]  pSrcB   points to the second input matrix structure\n   * @param[out] pDst    points to output matrix structure\n   * @param[in]  pState  points to the array for storing intermediate results\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_mult_fast_q15(\n  const arm_matrix_instance_q15 * pSrcA,\n  const arm_matrix_instance_q15 * pSrcB,\n        arm_matrix_instance_q15 * pDst,\n        q15_t * pState);\n\n  /**\n   * @brief Q31 matrix multiplication\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_mult_q31(\n  const arm_matrix_instance_q31 * pSrcA,\n  const arm_matrix_instance_q31 * pSrcB,\n        arm_matrix_instance_q31 * pDst);\n\n  /**\n   * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_mult_fast_q31(\n  const arm_matrix_instance_q31 * pSrcA,\n  const arm_matrix_instance_q31 * pSrcB,\n        arm_matrix_instance_q31 * pDst);\n\n  /**\n   * @brief Floating-point matrix subtraction\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_sub_f32(\n  const arm_matrix_instance_f32 * pSrcA,\n  const arm_matrix_instance_f32 * pSrcB,\n        arm_matrix_instance_f32 * pDst);\n\n  /**\n   * @brief Q15 matrix subtraction\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_sub_q15(\n  const arm_matrix_instance_q15 * pSrcA,\n  const arm_matrix_instance_q15 * pSrcB,\n        arm_matrix_instance_q15 * pDst);\n\n  /**\n   * @brief Q31 matrix subtraction\n   * @param[in]  pSrcA  points to the first input matrix structure\n   * @param[in]  pSrcB  points to the second input matrix structure\n   * @param[out] pDst   points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_sub_q31(\n  const arm_matrix_instance_q31 * pSrcA,\n  const arm_matrix_instance_q31 * pSrcB,\n        arm_matrix_instance_q31 * pDst);\n\n  /**\n   * @brief Floating-point matrix scaling.\n   * @param[in]  pSrc   points to the input matrix\n   * @param[in]  scale  scale factor\n   * @param[out] pDst   points to the output matrix\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_scale_f32(\n  const arm_matrix_instance_f32 * pSrc,\n        float32_t scale,\n        arm_matrix_instance_f32 * pDst);\n\n  /**\n   * @brief Q15 matrix scaling.\n   * @param[in]  pSrc        points to input matrix\n   * @param[in]  scaleFract  fractional portion of the scale factor\n   * @param[in]  shift       number of bits to shift the result by\n   * @param[out] pDst        points to output matrix\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_scale_q15(\n  const arm_matrix_instance_q15 * pSrc,\n        q15_t scaleFract,\n        int32_t shift,\n        arm_matrix_instance_q15 * pDst);\n\n  /**\n   * @brief Q31 matrix scaling.\n   * @param[in]  pSrc        points to input matrix\n   * @param[in]  scaleFract  fractional portion of the scale factor\n   * @param[in]  shift       number of bits to shift the result by\n   * @param[out] pDst        points to output matrix structure\n   * @return     The function returns either\n   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.\n   */\narm_status arm_mat_scale_q31(\n  const arm_matrix_instance_q31 * pSrc,\n        q31_t scaleFract,\n        int32_t shift,\n        arm_matrix_instance_q31 * pDst);\n\n  /**\n   * @brief  Q31 matrix initialization.\n   * @param[in,out] S         points to an instance of the floating-point matrix structure.\n   * @param[in]     nRows     number of rows in the matrix.\n   * @param[in]     nColumns  number of columns in the matrix.\n   * @param[in]     pData     points to the matrix data array.\n   */\nvoid arm_mat_init_q31(\n        arm_matrix_instance_q31 * S,\n        uint16_t nRows,\n        uint16_t nColumns,\n        q31_t * pData);\n\n  /**\n   * @brief  Q15 matrix initialization.\n   * @param[in,out] S         points to an instance of the floating-point matrix structure.\n   * @param[in]     nRows     number of rows in the matrix.\n   * @param[in]     nColumns  number of columns in the matrix.\n   * @param[in]     pData     points to the matrix data array.\n   */\nvoid arm_mat_init_q15(\n        arm_matrix_instance_q15 * S,\n        uint16_t nRows,\n        uint16_t nColumns,\n        q15_t * pData);\n\n  /**\n   * @brief  Floating-point matrix initialization.\n   * @param[in,out] S         points to an instance of the floating-point matrix structure.\n   * @param[in]     nRows     number of rows in the matrix.\n   * @param[in]     nColumns  number of columns in the matrix.\n   * @param[in]     pData     points to the matrix data array.\n   */\nvoid arm_mat_init_f32(\n        arm_matrix_instance_f32 * S,\n        uint16_t nRows,\n        uint16_t nColumns,\n        float32_t * pData);\n\n\n  /**\n   * @brief Instance structure for the Q15 PID Control.\n   */\n  typedef struct\n  {\n          q15_t A0;           /**< The derived gain, A0 = Kp + Ki + Kd . */\n#if !defined (ARM_MATH_DSP)\n          q15_t A1;\n          q15_t A2;\n#else\n          q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/\n#endif\n          q15_t state[3];     /**< The state array of length 3. */\n          q15_t Kp;           /**< The proportional gain. */\n          q15_t Ki;           /**< The integral gain. */\n          q15_t Kd;           /**< The derivative gain. */\n  } arm_pid_instance_q15;\n\n  /**\n   * @brief Instance structure for the Q31 PID Control.\n   */\n  typedef struct\n  {\n          q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */\n          q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */\n          q31_t A2;            /**< The derived gain, A2 = Kd . */\n          q31_t state[3];      /**< The state array of length 3. */\n          q31_t Kp;            /**< The proportional gain. */\n          q31_t Ki;            /**< The integral gain. */\n          q31_t Kd;            /**< The derivative gain. */\n  } arm_pid_instance_q31;\n\n  /**\n   * @brief Instance structure for the floating-point PID Control.\n   */\n  typedef struct\n  {\n          float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */\n          float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */\n          float32_t A2;          /**< The derived gain, A2 = Kd . */\n          float32_t state[3];    /**< The state array of length 3. */\n          float32_t Kp;          /**< The proportional gain. */\n          float32_t Ki;          /**< The integral gain. */\n          float32_t Kd;          /**< The derivative gain. */\n  } arm_pid_instance_f32;\n\n\n\n  /**\n   * @brief  Initialization function for the floating-point PID Control.\n   * @param[in,out] S               points to an instance of the PID structure.\n   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.\n   */\n  void arm_pid_init_f32(\n        arm_pid_instance_f32 * S,\n        int32_t resetStateFlag);\n\n\n  /**\n   * @brief  Reset function for the floating-point PID Control.\n   * @param[in,out] S  is an instance of the floating-point PID Control structure\n   */\n  void arm_pid_reset_f32(\n        arm_pid_instance_f32 * S);\n\n\n  /**\n   * @brief  Initialization function for the Q31 PID Control.\n   * @param[in,out] S               points to an instance of the Q15 PID structure.\n   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.\n   */\n  void arm_pid_init_q31(\n        arm_pid_instance_q31 * S,\n        int32_t resetStateFlag);\n\n\n  /**\n   * @brief  Reset function for the Q31 PID Control.\n   * @param[in,out] S   points to an instance of the Q31 PID Control structure\n   */\n\n  void arm_pid_reset_q31(\n        arm_pid_instance_q31 * S);\n\n\n  /**\n   * @brief  Initialization function for the Q15 PID Control.\n   * @param[in,out] S               points to an instance of the Q15 PID structure.\n   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.\n   */\n  void arm_pid_init_q15(\n        arm_pid_instance_q15 * S,\n        int32_t resetStateFlag);\n\n\n  /**\n   * @brief  Reset function for the Q15 PID Control.\n   * @param[in,out] S  points to an instance of the q15 PID Control structure\n   */\n  void arm_pid_reset_q15(\n        arm_pid_instance_q15 * S);\n\n\n  /**\n   * @brief Instance structure for the floating-point Linear Interpolate function.\n   */\n  typedef struct\n  {\n          uint32_t nValues;           /**< nValues */\n          float32_t x1;               /**< x1 */\n          float32_t xSpacing;         /**< xSpacing */\n          float32_t *pYData;          /**< pointer to the table of Y values */\n  } arm_linear_interp_instance_f32;\n\n  /**\n   * @brief Instance structure for the floating-point bilinear interpolation function.\n   */\n  typedef struct\n  {\n          uint16_t numRows;   /**< number of rows in the data table. */\n          uint16_t numCols;   /**< number of columns in the data table. */\n          float32_t *pData;   /**< points to the data table. */\n  } arm_bilinear_interp_instance_f32;\n\n   /**\n   * @brief Instance structure for the Q31 bilinear interpolation function.\n   */\n  typedef struct\n  {\n          uint16_t numRows;   /**< number of rows in the data table. */\n          uint16_t numCols;   /**< number of columns in the data table. */\n          q31_t *pData;       /**< points to the data table. */\n  } arm_bilinear_interp_instance_q31;\n\n   /**\n   * @brief Instance structure for the Q15 bilinear interpolation function.\n   */\n  typedef struct\n  {\n          uint16_t numRows;   /**< number of rows in the data table. */\n          uint16_t numCols;   /**< number of columns in the data table. */\n          q15_t *pData;       /**< points to the data table. */\n  } arm_bilinear_interp_instance_q15;\n\n   /**\n   * @brief Instance structure for the Q15 bilinear interpolation function.\n   */\n  typedef struct\n  {\n          uint16_t numRows;   /**< number of rows in the data table. */\n          uint16_t numCols;   /**< number of columns in the data table. */\n          q7_t *pData;        /**< points to the data table. */\n  } arm_bilinear_interp_instance_q7;\n\n\n  /**\n   * @brief Q7 vector multiplication.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_mult_q7(\n  const q7_t * pSrcA,\n  const q7_t * pSrcB,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q15 vector multiplication.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_mult_q15(\n  const q15_t * pSrcA,\n  const q15_t * pSrcB,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q31 vector multiplication.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_mult_q31(\n  const q31_t * pSrcA,\n  const q31_t * pSrcB,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Floating-point vector multiplication.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_mult_f32(\n  const float32_t * pSrcA,\n  const float32_t * pSrcB,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Instance structure for the Q15 CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                 /**< length of the FFT. */\n          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */\n          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */\n    const q15_t *pTwiddle;                 /**< points to the Sin twiddle factor table. */\n    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */\n          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */\n  } arm_cfft_radix2_instance_q15;\n\n/* Deprecated */\n  arm_status arm_cfft_radix2_init_q15(\n        arm_cfft_radix2_instance_q15 * S,\n        uint16_t fftLen,\n        uint8_t ifftFlag,\n        uint8_t bitReverseFlag);\n\n/* Deprecated */\n  void arm_cfft_radix2_q15(\n  const arm_cfft_radix2_instance_q15 * S,\n        q15_t * pSrc);\n\n\n  /**\n   * @brief Instance structure for the Q15 CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                 /**< length of the FFT. */\n          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */\n          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */\n    const q15_t *pTwiddle;                 /**< points to the twiddle factor table. */\n    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */\n          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */\n  } arm_cfft_radix4_instance_q15;\n\n/* Deprecated */\n  arm_status arm_cfft_radix4_init_q15(\n        arm_cfft_radix4_instance_q15 * S,\n        uint16_t fftLen,\n        uint8_t ifftFlag,\n        uint8_t bitReverseFlag);\n\n/* Deprecated */\n  void arm_cfft_radix4_q15(\n  const arm_cfft_radix4_instance_q15 * S,\n        q15_t * pSrc);\n\n  /**\n   * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                 /**< length of the FFT. */\n          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */\n          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */\n    const q31_t *pTwiddle;                 /**< points to the Twiddle factor table. */\n    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */\n          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */\n  } arm_cfft_radix2_instance_q31;\n\n/* Deprecated */\n  arm_status arm_cfft_radix2_init_q31(\n        arm_cfft_radix2_instance_q31 * S,\n        uint16_t fftLen,\n        uint8_t ifftFlag,\n        uint8_t bitReverseFlag);\n\n/* Deprecated */\n  void arm_cfft_radix2_q31(\n  const arm_cfft_radix2_instance_q31 * S,\n        q31_t * pSrc);\n\n  /**\n   * @brief Instance structure for the Q31 CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                 /**< length of the FFT. */\n          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */\n          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */\n    const q31_t *pTwiddle;                 /**< points to the twiddle factor table. */\n    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */\n          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */\n  } arm_cfft_radix4_instance_q31;\n\n/* Deprecated */\n  void arm_cfft_radix4_q31(\n  const arm_cfft_radix4_instance_q31 * S,\n        q31_t * pSrc);\n\n/* Deprecated */\n  arm_status arm_cfft_radix4_init_q31(\n        arm_cfft_radix4_instance_q31 * S,\n        uint16_t fftLen,\n        uint8_t ifftFlag,\n        uint8_t bitReverseFlag);\n\n  /**\n   * @brief Instance structure for the floating-point CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                   /**< length of the FFT. */\n          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */\n          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */\n    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */\n    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */\n          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */\n          float32_t onebyfftLen;             /**< value of 1/fftLen. */\n  } arm_cfft_radix2_instance_f32;\n\n/* Deprecated */\n  arm_status arm_cfft_radix2_init_f32(\n        arm_cfft_radix2_instance_f32 * S,\n        uint16_t fftLen,\n        uint8_t ifftFlag,\n        uint8_t bitReverseFlag);\n\n/* Deprecated */\n  void arm_cfft_radix2_f32(\n  const arm_cfft_radix2_instance_f32 * S,\n        float32_t * pSrc);\n\n  /**\n   * @brief Instance structure for the floating-point CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                   /**< length of the FFT. */\n          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */\n          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */\n    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */\n    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */\n          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */\n          float32_t onebyfftLen;             /**< value of 1/fftLen. */\n  } arm_cfft_radix4_instance_f32;\n\n/* Deprecated */\n  arm_status arm_cfft_radix4_init_f32(\n        arm_cfft_radix4_instance_f32 * S,\n        uint16_t fftLen,\n        uint8_t ifftFlag,\n        uint8_t bitReverseFlag);\n\n/* Deprecated */\n  void arm_cfft_radix4_f32(\n  const arm_cfft_radix4_instance_f32 * S,\n        float32_t * pSrc);\n\n  /**\n   * @brief Instance structure for the fixed-point CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                   /**< length of the FFT. */\n    const q15_t *pTwiddle;             /**< points to the Twiddle factor table. */\n    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */\n          uint16_t bitRevLength;             /**< bit reversal table length. */\n  } arm_cfft_instance_q15;\n\nvoid arm_cfft_q15(\n    const arm_cfft_instance_q15 * S,\n          q15_t * p1,\n          uint8_t ifftFlag,\n          uint8_t bitReverseFlag);\n\n  /**\n   * @brief Instance structure for the fixed-point CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                   /**< length of the FFT. */\n    const q31_t *pTwiddle;             /**< points to the Twiddle factor table. */\n    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */\n          uint16_t bitRevLength;             /**< bit reversal table length. */\n  } arm_cfft_instance_q31;\n\nvoid arm_cfft_q31(\n    const arm_cfft_instance_q31 * S,\n          q31_t * p1,\n          uint8_t ifftFlag,\n          uint8_t bitReverseFlag);\n\n  /**\n   * @brief Instance structure for the floating-point CFFT/CIFFT function.\n   */\n  typedef struct\n  {\n          uint16_t fftLen;                   /**< length of the FFT. */\n    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */\n    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */\n          uint16_t bitRevLength;             /**< bit reversal table length. */\n  } arm_cfft_instance_f32;\n\n  void arm_cfft_f32(\n  const arm_cfft_instance_f32 * S,\n        float32_t * p1,\n        uint8_t ifftFlag,\n        uint8_t bitReverseFlag);\n\n  /**\n   * @brief Instance structure for the Q15 RFFT/RIFFT function.\n   */\n  typedef struct\n  {\n          uint32_t fftLenReal;                      /**< length of the real FFT. */\n          uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */\n          uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */\n          uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n    const q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */\n    const q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */\n    const arm_cfft_instance_q15 *pCfft;       /**< points to the complex FFT instance. */\n  } arm_rfft_instance_q15;\n\n  arm_status arm_rfft_init_q15(\n        arm_rfft_instance_q15 * S,\n        uint32_t fftLenReal,\n        uint32_t ifftFlagR,\n        uint32_t bitReverseFlag);\n\n  void arm_rfft_q15(\n  const arm_rfft_instance_q15 * S,\n        q15_t * pSrc,\n        q15_t * pDst);\n\n  /**\n   * @brief Instance structure for the Q31 RFFT/RIFFT function.\n   */\n  typedef struct\n  {\n          uint32_t fftLenReal;                        /**< length of the real FFT. */\n          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */\n          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */\n          uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n    const q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */\n    const q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */\n    const arm_cfft_instance_q31 *pCfft;         /**< points to the complex FFT instance. */\n  } arm_rfft_instance_q31;\n\n  arm_status arm_rfft_init_q31(\n        arm_rfft_instance_q31 * S,\n        uint32_t fftLenReal,\n        uint32_t ifftFlagR,\n        uint32_t bitReverseFlag);\n\n  void arm_rfft_q31(\n  const arm_rfft_instance_q31 * S,\n        q31_t * pSrc,\n        q31_t * pDst);\n\n  /**\n   * @brief Instance structure for the floating-point RFFT/RIFFT function.\n   */\n  typedef struct\n  {\n          uint32_t fftLenReal;                        /**< length of the real FFT. */\n          uint16_t fftLenBy2;                         /**< length of the complex FFT. */\n          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */\n          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */\n          uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */\n    const float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */\n    const float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */\n          arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */\n  } arm_rfft_instance_f32;\n\n  arm_status arm_rfft_init_f32(\n        arm_rfft_instance_f32 * S,\n        arm_cfft_radix4_instance_f32 * S_CFFT,\n        uint32_t fftLenReal,\n        uint32_t ifftFlagR,\n        uint32_t bitReverseFlag);\n\n  void arm_rfft_f32(\n  const arm_rfft_instance_f32 * S,\n        float32_t * pSrc,\n        float32_t * pDst);\n\n  /**\n   * @brief Instance structure for the floating-point RFFT/RIFFT function.\n   */\ntypedef struct\n  {\n          arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */\n          uint16_t fftLenRFFT;             /**< length of the real sequence */\n    const float32_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */\n  } arm_rfft_fast_instance_f32 ;\n\narm_status arm_rfft_fast_init_f32 (\n         arm_rfft_fast_instance_f32 * S,\n         uint16_t fftLen);\n\narm_status arm_rfft_32_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );\n\narm_status arm_rfft_64_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );\n\narm_status arm_rfft_128_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );\n\narm_status arm_rfft_256_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );\n\narm_status arm_rfft_512_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );\n\narm_status arm_rfft_1024_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );\n\narm_status arm_rfft_2048_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );\n\narm_status arm_rfft_4096_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );\n\n\n  void arm_rfft_fast_f32(\n        arm_rfft_fast_instance_f32 * S,\n        float32_t * p, float32_t * pOut,\n        uint8_t ifftFlag);\n\n  /**\n   * @brief Instance structure for the floating-point DCT4/IDCT4 function.\n   */\n  typedef struct\n  {\n          uint16_t N;                          /**< length of the DCT4. */\n          uint16_t Nby2;                       /**< half of the length of the DCT4. */\n          float32_t normalize;                 /**< normalizing factor. */\n    const float32_t *pTwiddle;                 /**< points to the twiddle factor table. */\n    const float32_t *pCosFactor;               /**< points to the cosFactor table. */\n          arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */\n          arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */\n  } arm_dct4_instance_f32;\n\n\n  /**\n   * @brief  Initialization function for the floating-point DCT4/IDCT4.\n   * @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure.\n   * @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure.\n   * @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure.\n   * @param[in]     N          length of the DCT4.\n   * @param[in]     Nby2       half of the length of the DCT4.\n   * @param[in]     normalize  normalizing factor.\n   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.\n   */\n  arm_status arm_dct4_init_f32(\n        arm_dct4_instance_f32 * S,\n        arm_rfft_instance_f32 * S_RFFT,\n        arm_cfft_radix4_instance_f32 * S_CFFT,\n        uint16_t N,\n        uint16_t Nby2,\n        float32_t normalize);\n\n\n  /**\n   * @brief Processing function for the floating-point DCT4/IDCT4.\n   * @param[in]     S              points to an instance of the floating-point DCT4/IDCT4 structure.\n   * @param[in]     pState         points to state buffer.\n   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.\n   */\n  void arm_dct4_f32(\n  const arm_dct4_instance_f32 * S,\n        float32_t * pState,\n        float32_t * pInlineBuffer);\n\n\n  /**\n   * @brief Instance structure for the Q31 DCT4/IDCT4 function.\n   */\n  typedef struct\n  {\n          uint16_t N;                          /**< length of the DCT4. */\n          uint16_t Nby2;                       /**< half of the length of the DCT4. */\n          q31_t normalize;                     /**< normalizing factor. */\n    const q31_t *pTwiddle;                     /**< points to the twiddle factor table. */\n    const q31_t *pCosFactor;                   /**< points to the cosFactor table. */\n          arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */\n          arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */\n  } arm_dct4_instance_q31;\n\n\n  /**\n   * @brief  Initialization function for the Q31 DCT4/IDCT4.\n   * @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.\n   * @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure\n   * @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure\n   * @param[in]     N          length of the DCT4.\n   * @param[in]     Nby2       half of the length of the DCT4.\n   * @param[in]     normalize  normalizing factor.\n   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.\n   */\n  arm_status arm_dct4_init_q31(\n        arm_dct4_instance_q31 * S,\n        arm_rfft_instance_q31 * S_RFFT,\n        arm_cfft_radix4_instance_q31 * S_CFFT,\n        uint16_t N,\n        uint16_t Nby2,\n        q31_t normalize);\n\n\n  /**\n   * @brief Processing function for the Q31 DCT4/IDCT4.\n   * @param[in]     S              points to an instance of the Q31 DCT4 structure.\n   * @param[in]     pState         points to state buffer.\n   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.\n   */\n  void arm_dct4_q31(\n  const arm_dct4_instance_q31 * S,\n        q31_t * pState,\n        q31_t * pInlineBuffer);\n\n\n  /**\n   * @brief Instance structure for the Q15 DCT4/IDCT4 function.\n   */\n  typedef struct\n  {\n          uint16_t N;                          /**< length of the DCT4. */\n          uint16_t Nby2;                       /**< half of the length of the DCT4. */\n          q15_t normalize;                     /**< normalizing factor. */\n    const q15_t *pTwiddle;                     /**< points to the twiddle factor table. */\n    const q15_t *pCosFactor;                   /**< points to the cosFactor table. */\n          arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */\n          arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */\n  } arm_dct4_instance_q15;\n\n\n  /**\n   * @brief  Initialization function for the Q15 DCT4/IDCT4.\n   * @param[in,out] S          points to an instance of Q15 DCT4/IDCT4 structure.\n   * @param[in]     S_RFFT     points to an instance of Q15 RFFT/RIFFT structure.\n   * @param[in]     S_CFFT     points to an instance of Q15 CFFT/CIFFT structure.\n   * @param[in]     N          length of the DCT4.\n   * @param[in]     Nby2       half of the length of the DCT4.\n   * @param[in]     normalize  normalizing factor.\n   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.\n   */\n  arm_status arm_dct4_init_q15(\n        arm_dct4_instance_q15 * S,\n        arm_rfft_instance_q15 * S_RFFT,\n        arm_cfft_radix4_instance_q15 * S_CFFT,\n        uint16_t N,\n        uint16_t Nby2,\n        q15_t normalize);\n\n\n  /**\n   * @brief Processing function for the Q15 DCT4/IDCT4.\n   * @param[in]     S              points to an instance of the Q15 DCT4 structure.\n   * @param[in]     pState         points to state buffer.\n   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.\n   */\n  void arm_dct4_q15(\n  const arm_dct4_instance_q15 * S,\n        q15_t * pState,\n        q15_t * pInlineBuffer);\n\n\n  /**\n   * @brief Floating-point vector addition.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_add_f32(\n  const float32_t * pSrcA,\n  const float32_t * pSrcB,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q7 vector addition.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_add_q7(\n  const q7_t * pSrcA,\n  const q7_t * pSrcB,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q15 vector addition.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_add_q15(\n  const q15_t * pSrcA,\n  const q15_t * pSrcB,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q31 vector addition.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_add_q31(\n  const q31_t * pSrcA,\n  const q31_t * pSrcB,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Floating-point vector subtraction.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_sub_f32(\n  const float32_t * pSrcA,\n  const float32_t * pSrcB,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q7 vector subtraction.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_sub_q7(\n  const q7_t * pSrcA,\n  const q7_t * pSrcB,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q15 vector subtraction.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_sub_q15(\n  const q15_t * pSrcA,\n  const q15_t * pSrcB,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q31 vector subtraction.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_sub_q31(\n  const q31_t * pSrcA,\n  const q31_t * pSrcB,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Multiplies a floating-point vector by a scalar.\n   * @param[in]  pSrc       points to the input vector\n   * @param[in]  scale      scale factor to be applied\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_scale_f32(\n  const float32_t * pSrc,\n        float32_t scale,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Multiplies a Q7 vector by a scalar.\n   * @param[in]  pSrc        points to the input vector\n   * @param[in]  scaleFract  fractional portion of the scale value\n   * @param[in]  shift       number of bits to shift the result by\n   * @param[out] pDst        points to the output vector\n   * @param[in]  blockSize   number of samples in the vector\n   */\n  void arm_scale_q7(\n  const q7_t * pSrc,\n        q7_t scaleFract,\n        int8_t shift,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Multiplies a Q15 vector by a scalar.\n   * @param[in]  pSrc        points to the input vector\n   * @param[in]  scaleFract  fractional portion of the scale value\n   * @param[in]  shift       number of bits to shift the result by\n   * @param[out] pDst        points to the output vector\n   * @param[in]  blockSize   number of samples in the vector\n   */\n  void arm_scale_q15(\n  const q15_t * pSrc,\n        q15_t scaleFract,\n        int8_t shift,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Multiplies a Q31 vector by a scalar.\n   * @param[in]  pSrc        points to the input vector\n   * @param[in]  scaleFract  fractional portion of the scale value\n   * @param[in]  shift       number of bits to shift the result by\n   * @param[out] pDst        points to the output vector\n   * @param[in]  blockSize   number of samples in the vector\n   */\n  void arm_scale_q31(\n  const q31_t * pSrc,\n        q31_t scaleFract,\n        int8_t shift,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q7 vector absolute value.\n   * @param[in]  pSrc       points to the input buffer\n   * @param[out] pDst       points to the output buffer\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_abs_q7(\n  const q7_t * pSrc,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Floating-point vector absolute value.\n   * @param[in]  pSrc       points to the input buffer\n   * @param[out] pDst       points to the output buffer\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_abs_f32(\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q15 vector absolute value.\n   * @param[in]  pSrc       points to the input buffer\n   * @param[out] pDst       points to the output buffer\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_abs_q15(\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Q31 vector absolute value.\n   * @param[in]  pSrc       points to the input buffer\n   * @param[out] pDst       points to the output buffer\n   * @param[in]  blockSize  number of samples in each vector\n   */\n  void arm_abs_q31(\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Dot product of floating-point vectors.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[in]  blockSize  number of samples in each vector\n   * @param[out] result     output result returned here\n   */\n  void arm_dot_prod_f32(\n  const float32_t * pSrcA,\n  const float32_t * pSrcB,\n        uint32_t blockSize,\n        float32_t * result);\n\n\n  /**\n   * @brief Dot product of Q7 vectors.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[in]  blockSize  number of samples in each vector\n   * @param[out] result     output result returned here\n   */\n  void arm_dot_prod_q7(\n  const q7_t * pSrcA,\n  const q7_t * pSrcB,\n        uint32_t blockSize,\n        q31_t * result);\n\n\n  /**\n   * @brief Dot product of Q15 vectors.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[in]  blockSize  number of samples in each vector\n   * @param[out] result     output result returned here\n   */\n  void arm_dot_prod_q15(\n  const q15_t * pSrcA,\n  const q15_t * pSrcB,\n        uint32_t blockSize,\n        q63_t * result);\n\n\n  /**\n   * @brief Dot product of Q31 vectors.\n   * @param[in]  pSrcA      points to the first input vector\n   * @param[in]  pSrcB      points to the second input vector\n   * @param[in]  blockSize  number of samples in each vector\n   * @param[out] result     output result returned here\n   */\n  void arm_dot_prod_q31(\n  const q31_t * pSrcA,\n  const q31_t * pSrcB,\n        uint32_t blockSize,\n        q63_t * result);\n\n\n  /**\n   * @brief  Shifts the elements of a Q7 vector a specified number of bits.\n   * @param[in]  pSrc       points to the input vector\n   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_shift_q7(\n  const q7_t * pSrc,\n        int8_t shiftBits,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Shifts the elements of a Q15 vector a specified number of bits.\n   * @param[in]  pSrc       points to the input vector\n   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_shift_q15(\n  const q15_t * pSrc,\n        int8_t shiftBits,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Shifts the elements of a Q31 vector a specified number of bits.\n   * @param[in]  pSrc       points to the input vector\n   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_shift_q31(\n  const q31_t * pSrc,\n        int8_t shiftBits,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Adds a constant offset to a floating-point vector.\n   * @param[in]  pSrc       points to the input vector\n   * @param[in]  offset     is the offset to be added\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_offset_f32(\n  const float32_t * pSrc,\n        float32_t offset,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Adds a constant offset to a Q7 vector.\n   * @param[in]  pSrc       points to the input vector\n   * @param[in]  offset     is the offset to be added\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_offset_q7(\n  const q7_t * pSrc,\n        q7_t offset,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Adds a constant offset to a Q15 vector.\n   * @param[in]  pSrc       points to the input vector\n   * @param[in]  offset     is the offset to be added\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_offset_q15(\n  const q15_t * pSrc,\n        q15_t offset,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Adds a constant offset to a Q31 vector.\n   * @param[in]  pSrc       points to the input vector\n   * @param[in]  offset     is the offset to be added\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_offset_q31(\n  const q31_t * pSrc,\n        q31_t offset,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Negates the elements of a floating-point vector.\n   * @param[in]  pSrc       points to the input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_negate_f32(\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Negates the elements of a Q7 vector.\n   * @param[in]  pSrc       points to the input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_negate_q7(\n  const q7_t * pSrc,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Negates the elements of a Q15 vector.\n   * @param[in]  pSrc       points to the input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_negate_q15(\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Negates the elements of a Q31 vector.\n   * @param[in]  pSrc       points to the input vector\n   * @param[out] pDst       points to the output vector\n   * @param[in]  blockSize  number of samples in the vector\n   */\n  void arm_negate_q31(\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Copies the elements of a floating-point vector.\n   * @param[in]  pSrc       input pointer\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_copy_f32(\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Copies the elements of a Q7 vector.\n   * @param[in]  pSrc       input pointer\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_copy_q7(\n  const q7_t * pSrc,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Copies the elements of a Q15 vector.\n   * @param[in]  pSrc       input pointer\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_copy_q15(\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Copies the elements of a Q31 vector.\n   * @param[in]  pSrc       input pointer\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_copy_q31(\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Fills a constant value into a floating-point vector.\n   * @param[in]  value      input value to be filled\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_fill_f32(\n        float32_t value,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Fills a constant value into a Q7 vector.\n   * @param[in]  value      input value to be filled\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_fill_q7(\n        q7_t value,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Fills a constant value into a Q15 vector.\n   * @param[in]  value      input value to be filled\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_fill_q15(\n        q15_t value,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Fills a constant value into a Q31 vector.\n   * @param[in]  value      input value to be filled\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_fill_q31(\n        q31_t value,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n/**\n * @brief Convolution of floating-point sequences.\n * @param[in]  pSrcA    points to the first input sequence.\n * @param[in]  srcALen  length of the first input sequence.\n * @param[in]  pSrcB    points to the second input sequence.\n * @param[in]  srcBLen  length of the second input sequence.\n * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.\n */\n  void arm_conv_f32(\n  const float32_t * pSrcA,\n        uint32_t srcALen,\n  const float32_t * pSrcB,\n        uint32_t srcBLen,\n        float32_t * pDst);\n\n\n  /**\n   * @brief Convolution of Q15 sequences.\n   * @param[in]  pSrcA      points to the first input sequence.\n   * @param[in]  srcALen    length of the first input sequence.\n   * @param[in]  pSrcB      points to the second input sequence.\n   * @param[in]  srcBLen    length of the second input sequence.\n   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.\n   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).\n   */\n  void arm_conv_opt_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst,\n        q15_t * pScratch1,\n        q15_t * pScratch2);\n\n\n/**\n * @brief Convolution of Q15 sequences.\n * @param[in]  pSrcA    points to the first input sequence.\n * @param[in]  srcALen  length of the first input sequence.\n * @param[in]  pSrcB    points to the second input sequence.\n * @param[in]  srcBLen  length of the second input sequence.\n * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.\n */\n  void arm_conv_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst);\n\n\n  /**\n   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4\n   * @param[in]  pSrcA    points to the first input sequence.\n   * @param[in]  srcALen  length of the first input sequence.\n   * @param[in]  pSrcB    points to the second input sequence.\n   * @param[in]  srcBLen  length of the second input sequence.\n   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.\n   */\n  void arm_conv_fast_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst);\n\n\n  /**\n   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4\n   * @param[in]  pSrcA      points to the first input sequence.\n   * @param[in]  srcALen    length of the first input sequence.\n   * @param[in]  pSrcB      points to the second input sequence.\n   * @param[in]  srcBLen    length of the second input sequence.\n   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.\n   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).\n   */\n  void arm_conv_fast_opt_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst,\n        q15_t * pScratch1,\n        q15_t * pScratch2);\n\n\n  /**\n   * @brief Convolution of Q31 sequences.\n   * @param[in]  pSrcA    points to the first input sequence.\n   * @param[in]  srcALen  length of the first input sequence.\n   * @param[in]  pSrcB    points to the second input sequence.\n   * @param[in]  srcBLen  length of the second input sequence.\n   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.\n   */\n  void arm_conv_q31(\n  const q31_t * pSrcA,\n        uint32_t srcALen,\n  const q31_t * pSrcB,\n        uint32_t srcBLen,\n        q31_t * pDst);\n\n\n  /**\n   * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4\n   * @param[in]  pSrcA    points to the first input sequence.\n   * @param[in]  srcALen  length of the first input sequence.\n   * @param[in]  pSrcB    points to the second input sequence.\n   * @param[in]  srcBLen  length of the second input sequence.\n   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.\n   */\n  void arm_conv_fast_q31(\n  const q31_t * pSrcA,\n        uint32_t srcALen,\n  const q31_t * pSrcB,\n        uint32_t srcBLen,\n        q31_t * pDst);\n\n\n    /**\n   * @brief Convolution of Q7 sequences.\n   * @param[in]  pSrcA      points to the first input sequence.\n   * @param[in]  srcALen    length of the first input sequence.\n   * @param[in]  pSrcB      points to the second input sequence.\n   * @param[in]  srcBLen    length of the second input sequence.\n   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.\n   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).\n   */\n  void arm_conv_opt_q7(\n  const q7_t * pSrcA,\n        uint32_t srcALen,\n  const q7_t * pSrcB,\n        uint32_t srcBLen,\n        q7_t * pDst,\n        q15_t * pScratch1,\n        q15_t * pScratch2);\n\n\n  /**\n   * @brief Convolution of Q7 sequences.\n   * @param[in]  pSrcA    points to the first input sequence.\n   * @param[in]  srcALen  length of the first input sequence.\n   * @param[in]  pSrcB    points to the second input sequence.\n   * @param[in]  srcBLen  length of the second input sequence.\n   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.\n   */\n  void arm_conv_q7(\n  const q7_t * pSrcA,\n        uint32_t srcALen,\n  const q7_t * pSrcB,\n        uint32_t srcBLen,\n        q7_t * pDst);\n\n\n  /**\n   * @brief Partial convolution of floating-point sequences.\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_f32(\n  const float32_t * pSrcA,\n        uint32_t srcALen,\n  const float32_t * pSrcB,\n        uint32_t srcBLen,\n        float32_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints);\n\n\n  /**\n   * @brief Partial convolution of Q15 sequences.\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_opt_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints,\n        q15_t * pScratch1,\n        q15_t * pScratch2);\n\n\n  /**\n   * @brief Partial convolution of Q15 sequences.\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints);\n\n\n  /**\n   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_fast_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints);\n\n\n  /**\n   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_fast_opt_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints,\n        q15_t * pScratch1,\n        q15_t * pScratch2);\n\n\n  /**\n   * @brief Partial convolution of Q31 sequences.\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_q31(\n  const q31_t * pSrcA,\n        uint32_t srcALen,\n  const q31_t * pSrcB,\n        uint32_t srcBLen,\n        q31_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints);\n\n\n  /**\n   * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_fast_q31(\n  const q31_t * pSrcA,\n        uint32_t srcALen,\n  const q31_t * pSrcB,\n        uint32_t srcBLen,\n        q31_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints);\n\n\n  /**\n   * @brief Partial convolution of Q7 sequences\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @param[in]  pScratch1   points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n   * @param[in]  pScratch2   points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_opt_q7(\n  const q7_t * pSrcA,\n        uint32_t srcALen,\n  const q7_t * pSrcB,\n        uint32_t srcBLen,\n        q7_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints,\n        q15_t * pScratch1,\n        q15_t * pScratch2);\n\n\n/**\n   * @brief Partial convolution of Q7 sequences.\n   * @param[in]  pSrcA       points to the first input sequence.\n   * @param[in]  srcALen     length of the first input sequence.\n   * @param[in]  pSrcB       points to the second input sequence.\n   * @param[in]  srcBLen     length of the second input sequence.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  firstIndex  is the first output sample to start with.\n   * @param[in]  numPoints   is the number of output points to be computed.\n   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].\n   */\n  arm_status arm_conv_partial_q7(\n  const q7_t * pSrcA,\n        uint32_t srcALen,\n  const q7_t * pSrcB,\n        uint32_t srcBLen,\n        q7_t * pDst,\n        uint32_t firstIndex,\n        uint32_t numPoints);\n\n\n  /**\n   * @brief Instance structure for the Q15 FIR decimator.\n   */\n  typedef struct\n  {\n          uint8_t M;                  /**< decimation factor. */\n          uint16_t numTaps;           /**< number of coefficients in the filter. */\n    const q15_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/\n          q15_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n  } arm_fir_decimate_instance_q15;\n\n  /**\n   * @brief Instance structure for the Q31 FIR decimator.\n   */\n  typedef struct\n  {\n          uint8_t M;                  /**< decimation factor. */\n          uint16_t numTaps;           /**< number of coefficients in the filter. */\n    const q31_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/\n          q31_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n  } arm_fir_decimate_instance_q31;\n\n/**\n  @brief Instance structure for floating-point FIR decimator.\n */\ntypedef struct\n  {\n          uint8_t M;                  /**< decimation factor. */\n          uint16_t numTaps;           /**< number of coefficients in the filter. */\n    const float32_t *pCoeffs;         /**< points to the coefficient array. The array is of length numTaps.*/\n          float32_t *pState;          /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n  } arm_fir_decimate_instance_f32;\n\n\n/**\n  @brief         Processing function for floating-point FIR decimator.\n  @param[in]     S         points to an instance of the floating-point FIR decimator structure\n  @param[in]     pSrc      points to the block of input data\n  @param[out]    pDst      points to the block of output data\n  @param[in]     blockSize number of samples to process\n */\nvoid arm_fir_decimate_f32(\n  const arm_fir_decimate_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n/**\n  @brief         Initialization function for the floating-point FIR decimator.\n  @param[in,out] S          points to an instance of the floating-point FIR decimator structure\n  @param[in]     numTaps    number of coefficients in the filter\n  @param[in]     M          decimation factor\n  @param[in]     pCoeffs    points to the filter coefficients\n  @param[in]     pState     points to the state buffer\n  @param[in]     blockSize  number of input samples to process per call\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS      : Operation successful\n                   - \\ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M\n */\narm_status arm_fir_decimate_init_f32(\n        arm_fir_decimate_instance_f32 * S,\n        uint16_t numTaps,\n        uint8_t M,\n  const float32_t * pCoeffs,\n        float32_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q15 FIR decimator.\n   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of input samples to process per call.\n   */\n  void arm_fir_decimate_q15(\n  const arm_fir_decimate_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.\n   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of input samples to process per call.\n   */\n  void arm_fir_decimate_fast_q15(\n  const arm_fir_decimate_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the Q15 FIR decimator.\n   * @param[in,out] S          points to an instance of the Q15 FIR decimator structure.\n   * @param[in]     numTaps    number of coefficients in the filter.\n   * @param[in]     M          decimation factor.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of input samples to process per call.\n   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if\n   * blockSize is not a multiple of M.\n   */\n  arm_status arm_fir_decimate_init_q15(\n        arm_fir_decimate_instance_q15 * S,\n        uint16_t numTaps,\n        uint8_t M,\n  const q15_t * pCoeffs,\n        q15_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q31 FIR decimator.\n   * @param[in]  S     points to an instance of the Q31 FIR decimator structure.\n   * @param[in]  pSrc  points to the block of input data.\n   * @param[out] pDst  points to the block of output data\n   * @param[in] blockSize number of input samples to process per call.\n   */\n  void arm_fir_decimate_q31(\n  const arm_fir_decimate_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n  /**\n   * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.\n   * @param[in]  S          points to an instance of the Q31 FIR decimator structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of input samples to process per call.\n   */\n  void arm_fir_decimate_fast_q31(\n  const arm_fir_decimate_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the Q31 FIR decimator.\n   * @param[in,out] S          points to an instance of the Q31 FIR decimator structure.\n   * @param[in]     numTaps    number of coefficients in the filter.\n   * @param[in]     M          decimation factor.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of input samples to process per call.\n   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if\n   * blockSize is not a multiple of M.\n   */\n  arm_status arm_fir_decimate_init_q31(\n        arm_fir_decimate_instance_q31 * S,\n        uint16_t numTaps,\n        uint8_t M,\n  const q31_t * pCoeffs,\n        q31_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Instance structure for the Q15 FIR interpolator.\n   */\n  typedef struct\n  {\n        uint8_t L;                      /**< upsample factor. */\n        uint16_t phaseLength;           /**< length of each polyphase filter component. */\n  const q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */\n        q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */\n  } arm_fir_interpolate_instance_q15;\n\n  /**\n   * @brief Instance structure for the Q31 FIR interpolator.\n   */\n  typedef struct\n  {\n        uint8_t L;                      /**< upsample factor. */\n        uint16_t phaseLength;           /**< length of each polyphase filter component. */\n  const q31_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */\n        q31_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */\n  } arm_fir_interpolate_instance_q31;\n\n  /**\n   * @brief Instance structure for the floating-point FIR interpolator.\n   */\n  typedef struct\n  {\n        uint8_t L;                     /**< upsample factor. */\n        uint16_t phaseLength;          /**< length of each polyphase filter component. */\n  const float32_t *pCoeffs;            /**< points to the coefficient array. The array is of length L*phaseLength. */\n        float32_t *pState;             /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */\n  } arm_fir_interpolate_instance_f32;\n\n\n  /**\n   * @brief Processing function for the Q15 FIR interpolator.\n   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of input samples to process per call.\n   */\n  void arm_fir_interpolate_q15(\n  const arm_fir_interpolate_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the Q15 FIR interpolator.\n   * @param[in,out] S          points to an instance of the Q15 FIR interpolator structure.\n   * @param[in]     L          upsample factor.\n   * @param[in]     numTaps    number of filter coefficients in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficient buffer.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of input samples to process per call.\n   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if\n   * the filter length numTaps is not a multiple of the interpolation factor L.\n   */\n  arm_status arm_fir_interpolate_init_q15(\n        arm_fir_interpolate_instance_q15 * S,\n        uint8_t L,\n        uint16_t numTaps,\n  const q15_t * pCoeffs,\n        q15_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q31 FIR interpolator.\n   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of input samples to process per call.\n   */\n  void arm_fir_interpolate_q31(\n  const arm_fir_interpolate_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the Q31 FIR interpolator.\n   * @param[in,out] S          points to an instance of the Q31 FIR interpolator structure.\n   * @param[in]     L          upsample factor.\n   * @param[in]     numTaps    number of filter coefficients in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficient buffer.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of input samples to process per call.\n   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if\n   * the filter length numTaps is not a multiple of the interpolation factor L.\n   */\n  arm_status arm_fir_interpolate_init_q31(\n        arm_fir_interpolate_instance_q31 * S,\n        uint8_t L,\n        uint16_t numTaps,\n  const q31_t * pCoeffs,\n        q31_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the floating-point FIR interpolator.\n   * @param[in]  S          points to an instance of the floating-point FIR interpolator structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of input samples to process per call.\n   */\n  void arm_fir_interpolate_f32(\n  const arm_fir_interpolate_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the floating-point FIR interpolator.\n   * @param[in,out] S          points to an instance of the floating-point FIR interpolator structure.\n   * @param[in]     L          upsample factor.\n   * @param[in]     numTaps    number of filter coefficients in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficient buffer.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     blockSize  number of input samples to process per call.\n   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if\n   * the filter length numTaps is not a multiple of the interpolation factor L.\n   */\n  arm_status arm_fir_interpolate_init_f32(\n        arm_fir_interpolate_instance_f32 * S,\n        uint8_t L,\n        uint16_t numTaps,\n  const float32_t * pCoeffs,\n        float32_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Instance structure for the high precision Q31 Biquad cascade filter.\n   */\n  typedef struct\n  {\n          uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */\n          q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */\n    const q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */\n          uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */\n  } arm_biquad_cas_df1_32x64_ins_q31;\n\n\n  /**\n   * @param[in]  S          points to an instance of the high precision Q31 Biquad cascade filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cas_df1_32x64_q31(\n  const arm_biquad_cas_df1_32x64_ins_q31 * S,\n        q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @param[in,out] S          points to an instance of the high precision Q31 Biquad cascade filter structure.\n   * @param[in]     numStages  number of 2nd order stages in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     postShift  shift to be applied to the output. Varies according to the coefficients format\n   */\n  void arm_biquad_cas_df1_32x64_init_q31(\n        arm_biquad_cas_df1_32x64_ins_q31 * S,\n        uint8_t numStages,\n  const q31_t * pCoeffs,\n        q63_t * pState,\n        uint8_t postShift);\n\n\n  /**\n   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.\n   */\n  typedef struct\n  {\n          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */\n          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */\n    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */\n  } arm_biquad_cascade_df2T_instance_f32;\n\n  /**\n   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.\n   */\n  typedef struct\n  {\n          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */\n          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */\n    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */\n  } arm_biquad_cascade_stereo_df2T_instance_f32;\n\n  /**\n   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.\n   */\n  typedef struct\n  {\n          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */\n          float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */\n          float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */\n  } arm_biquad_cascade_df2T_instance_f64;\n\n\n  /**\n   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.\n   * @param[in]  S          points to an instance of the filter data structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cascade_df2T_f32(\n  const arm_biquad_cascade_df2T_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels\n   * @param[in]  S          points to an instance of the filter data structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cascade_stereo_df2T_f32(\n  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.\n   * @param[in]  S          points to an instance of the filter data structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_biquad_cascade_df2T_f64(\n  const arm_biquad_cascade_df2T_instance_f64 * S,\n        float64_t * pSrc,\n        float64_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.\n   * @param[in,out] S          points to an instance of the filter data structure.\n   * @param[in]     numStages  number of 2nd order stages in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   */\n  void arm_biquad_cascade_df2T_init_f32(\n        arm_biquad_cascade_df2T_instance_f32 * S,\n        uint8_t numStages,\n  const float32_t * pCoeffs,\n        float32_t * pState);\n\n\n  /**\n   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.\n   * @param[in,out] S          points to an instance of the filter data structure.\n   * @param[in]     numStages  number of 2nd order stages in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   */\n  void arm_biquad_cascade_stereo_df2T_init_f32(\n        arm_biquad_cascade_stereo_df2T_instance_f32 * S,\n        uint8_t numStages,\n  const float32_t * pCoeffs,\n        float32_t * pState);\n\n\n  /**\n   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.\n   * @param[in,out] S          points to an instance of the filter data structure.\n   * @param[in]     numStages  number of 2nd order stages in the filter.\n   * @param[in]     pCoeffs    points to the filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   */\n  void arm_biquad_cascade_df2T_init_f64(\n        arm_biquad_cascade_df2T_instance_f64 * S,\n        uint8_t numStages,\n        float64_t * pCoeffs,\n        float64_t * pState);\n\n\n  /**\n   * @brief Instance structure for the Q15 FIR lattice filter.\n   */\n  typedef struct\n  {\n          uint16_t numStages;                  /**< number of filter stages. */\n          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages. */\n    const q15_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */\n  } arm_fir_lattice_instance_q15;\n\n  /**\n   * @brief Instance structure for the Q31 FIR lattice filter.\n   */\n  typedef struct\n  {\n          uint16_t numStages;                  /**< number of filter stages. */\n          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages. */\n    const q31_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */\n  } arm_fir_lattice_instance_q31;\n\n  /**\n   * @brief Instance structure for the floating-point FIR lattice filter.\n   */\n  typedef struct\n  {\n          uint16_t numStages;                  /**< number of filter stages. */\n          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */\n    const float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */\n  } arm_fir_lattice_instance_f32;\n\n\n  /**\n   * @brief Initialization function for the Q15 FIR lattice filter.\n   * @param[in] S          points to an instance of the Q15 FIR lattice structure.\n   * @param[in] numStages  number of filter stages.\n   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.\n   * @param[in] pState     points to the state buffer.  The array is of length numStages.\n   */\n  void arm_fir_lattice_init_q15(\n        arm_fir_lattice_instance_q15 * S,\n        uint16_t numStages,\n  const q15_t * pCoeffs,\n        q15_t * pState);\n\n\n  /**\n   * @brief Processing function for the Q15 FIR lattice filter.\n   * @param[in]  S          points to an instance of the Q15 FIR lattice structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_lattice_q15(\n  const arm_fir_lattice_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Initialization function for the Q31 FIR lattice filter.\n   * @param[in] S          points to an instance of the Q31 FIR lattice structure.\n   * @param[in] numStages  number of filter stages.\n   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.\n   * @param[in] pState     points to the state buffer.   The array is of length numStages.\n   */\n  void arm_fir_lattice_init_q31(\n        arm_fir_lattice_instance_q31 * S,\n        uint16_t numStages,\n  const q31_t * pCoeffs,\n        q31_t * pState);\n\n\n  /**\n   * @brief Processing function for the Q31 FIR lattice filter.\n   * @param[in]  S          points to an instance of the Q31 FIR lattice structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_lattice_q31(\n  const arm_fir_lattice_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n/**\n * @brief Initialization function for the floating-point FIR lattice filter.\n * @param[in] S          points to an instance of the floating-point FIR lattice structure.\n * @param[in] numStages  number of filter stages.\n * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.\n * @param[in] pState     points to the state buffer.  The array is of length numStages.\n */\n  void arm_fir_lattice_init_f32(\n        arm_fir_lattice_instance_f32 * S,\n        uint16_t numStages,\n  const float32_t * pCoeffs,\n        float32_t * pState);\n\n\n  /**\n   * @brief Processing function for the floating-point FIR lattice filter.\n   * @param[in]  S          points to an instance of the floating-point FIR lattice structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_fir_lattice_f32(\n  const arm_fir_lattice_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Instance structure for the Q15 IIR lattice filter.\n   */\n  typedef struct\n  {\n          uint16_t numStages;                  /**< number of stages in the filter. */\n          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */\n          q15_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */\n          q15_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */\n  } arm_iir_lattice_instance_q15;\n\n  /**\n   * @brief Instance structure for the Q31 IIR lattice filter.\n   */\n  typedef struct\n  {\n          uint16_t numStages;                  /**< number of stages in the filter. */\n          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */\n          q31_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */\n          q31_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */\n  } arm_iir_lattice_instance_q31;\n\n  /**\n   * @brief Instance structure for the floating-point IIR lattice filter.\n   */\n  typedef struct\n  {\n          uint16_t numStages;                  /**< number of stages in the filter. */\n          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages+blockSize. */\n          float32_t *pkCoeffs;                 /**< points to the reflection coefficient array. The array is of length numStages. */\n          float32_t *pvCoeffs;                 /**< points to the ladder coefficient array. The array is of length numStages+1. */\n  } arm_iir_lattice_instance_f32;\n\n\n  /**\n   * @brief Processing function for the floating-point IIR lattice filter.\n   * @param[in]  S          points to an instance of the floating-point IIR lattice structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_iir_lattice_f32(\n  const arm_iir_lattice_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Initialization function for the floating-point IIR lattice filter.\n   * @param[in] S          points to an instance of the floating-point IIR lattice structure.\n   * @param[in] numStages  number of stages in the filter.\n   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.\n   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.\n   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize-1.\n   * @param[in] blockSize  number of samples to process.\n   */\n  void arm_iir_lattice_init_f32(\n        arm_iir_lattice_instance_f32 * S,\n        uint16_t numStages,\n        float32_t * pkCoeffs,\n        float32_t * pvCoeffs,\n        float32_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q31 IIR lattice filter.\n   * @param[in]  S          points to an instance of the Q31 IIR lattice structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_iir_lattice_q31(\n  const arm_iir_lattice_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Initialization function for the Q31 IIR lattice filter.\n   * @param[in] S          points to an instance of the Q31 IIR lattice structure.\n   * @param[in] numStages  number of stages in the filter.\n   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.\n   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.\n   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize.\n   * @param[in] blockSize  number of samples to process.\n   */\n  void arm_iir_lattice_init_q31(\n        arm_iir_lattice_instance_q31 * S,\n        uint16_t numStages,\n        q31_t * pkCoeffs,\n        q31_t * pvCoeffs,\n        q31_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q15 IIR lattice filter.\n   * @param[in]  S          points to an instance of the Q15 IIR lattice structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[out] pDst       points to the block of output data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_iir_lattice_q15(\n  const arm_iir_lattice_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n/**\n * @brief Initialization function for the Q15 IIR lattice filter.\n * @param[in] S          points to an instance of the fixed-point Q15 IIR lattice structure.\n * @param[in] numStages  number of stages in the filter.\n * @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages.\n * @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1.\n * @param[in] pState     points to state buffer.  The array is of length numStages+blockSize.\n * @param[in] blockSize  number of samples to process per call.\n */\n  void arm_iir_lattice_init_q15(\n        arm_iir_lattice_instance_q15 * S,\n        uint16_t numStages,\n        q15_t * pkCoeffs,\n        q15_t * pvCoeffs,\n        q15_t * pState,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Instance structure for the floating-point LMS filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;    /**< number of coefficients in the filter. */\n          float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n          float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */\n          float32_t mu;        /**< step size that controls filter coefficient updates. */\n  } arm_lms_instance_f32;\n\n\n  /**\n   * @brief Processing function for floating-point LMS filter.\n   * @param[in]  S          points to an instance of the floating-point LMS filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[in]  pRef       points to the block of reference data.\n   * @param[out] pOut       points to the block of output data.\n   * @param[out] pErr       points to the block of error data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_lms_f32(\n  const arm_lms_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pRef,\n        float32_t * pOut,\n        float32_t * pErr,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Initialization function for floating-point LMS filter.\n   * @param[in] S          points to an instance of the floating-point LMS filter structure.\n   * @param[in] numTaps    number of filter coefficients.\n   * @param[in] pCoeffs    points to the coefficient buffer.\n   * @param[in] pState     points to state buffer.\n   * @param[in] mu         step size that controls filter coefficient updates.\n   * @param[in] blockSize  number of samples to process.\n   */\n  void arm_lms_init_f32(\n        arm_lms_instance_f32 * S,\n        uint16_t numTaps,\n        float32_t * pCoeffs,\n        float32_t * pState,\n        float32_t mu,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Instance structure for the Q15 LMS filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;    /**< number of coefficients in the filter. */\n          q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n          q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */\n          q15_t mu;            /**< step size that controls filter coefficient updates. */\n          uint32_t postShift;  /**< bit shift applied to coefficients. */\n  } arm_lms_instance_q15;\n\n\n  /**\n   * @brief Initialization function for the Q15 LMS filter.\n   * @param[in] S          points to an instance of the Q15 LMS filter structure.\n   * @param[in] numTaps    number of filter coefficients.\n   * @param[in] pCoeffs    points to the coefficient buffer.\n   * @param[in] pState     points to the state buffer.\n   * @param[in] mu         step size that controls filter coefficient updates.\n   * @param[in] blockSize  number of samples to process.\n   * @param[in] postShift  bit shift applied to coefficients.\n   */\n  void arm_lms_init_q15(\n        arm_lms_instance_q15 * S,\n        uint16_t numTaps,\n        q15_t * pCoeffs,\n        q15_t * pState,\n        q15_t mu,\n        uint32_t blockSize,\n        uint32_t postShift);\n\n\n  /**\n   * @brief Processing function for Q15 LMS filter.\n   * @param[in]  S          points to an instance of the Q15 LMS filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[in]  pRef       points to the block of reference data.\n   * @param[out] pOut       points to the block of output data.\n   * @param[out] pErr       points to the block of error data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_lms_q15(\n  const arm_lms_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pRef,\n        q15_t * pOut,\n        q15_t * pErr,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Instance structure for the Q31 LMS filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;    /**< number of coefficients in the filter. */\n          q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n          q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */\n          q31_t mu;            /**< step size that controls filter coefficient updates. */\n          uint32_t postShift;  /**< bit shift applied to coefficients. */\n  } arm_lms_instance_q31;\n\n\n  /**\n   * @brief Processing function for Q31 LMS filter.\n   * @param[in]  S          points to an instance of the Q15 LMS filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[in]  pRef       points to the block of reference data.\n   * @param[out] pOut       points to the block of output data.\n   * @param[out] pErr       points to the block of error data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_lms_q31(\n  const arm_lms_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pRef,\n        q31_t * pOut,\n        q31_t * pErr,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Initialization function for Q31 LMS filter.\n   * @param[in] S          points to an instance of the Q31 LMS filter structure.\n   * @param[in] numTaps    number of filter coefficients.\n   * @param[in] pCoeffs    points to coefficient buffer.\n   * @param[in] pState     points to state buffer.\n   * @param[in] mu         step size that controls filter coefficient updates.\n   * @param[in] blockSize  number of samples to process.\n   * @param[in] postShift  bit shift applied to coefficients.\n   */\n  void arm_lms_init_q31(\n        arm_lms_instance_q31 * S,\n        uint16_t numTaps,\n        q31_t * pCoeffs,\n        q31_t * pState,\n        q31_t mu,\n        uint32_t blockSize,\n        uint32_t postShift);\n\n\n  /**\n   * @brief Instance structure for the floating-point normalized LMS filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;     /**< number of coefficients in the filter. */\n          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n          float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */\n          float32_t mu;         /**< step size that control filter coefficient updates. */\n          float32_t energy;     /**< saves previous frame energy. */\n          float32_t x0;         /**< saves previous input sample. */\n  } arm_lms_norm_instance_f32;\n\n\n  /**\n   * @brief Processing function for floating-point normalized LMS filter.\n   * @param[in]  S          points to an instance of the floating-point normalized LMS filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[in]  pRef       points to the block of reference data.\n   * @param[out] pOut       points to the block of output data.\n   * @param[out] pErr       points to the block of error data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_lms_norm_f32(\n        arm_lms_norm_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pRef,\n        float32_t * pOut,\n        float32_t * pErr,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Initialization function for floating-point normalized LMS filter.\n   * @param[in] S          points to an instance of the floating-point LMS filter structure.\n   * @param[in] numTaps    number of filter coefficients.\n   * @param[in] pCoeffs    points to coefficient buffer.\n   * @param[in] pState     points to state buffer.\n   * @param[in] mu         step size that controls filter coefficient updates.\n   * @param[in] blockSize  number of samples to process.\n   */\n  void arm_lms_norm_init_f32(\n        arm_lms_norm_instance_f32 * S,\n        uint16_t numTaps,\n        float32_t * pCoeffs,\n        float32_t * pState,\n        float32_t mu,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Instance structure for the Q31 normalized LMS filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;     /**< number of coefficients in the filter. */\n          q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n          q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */\n          q31_t mu;             /**< step size that controls filter coefficient updates. */\n          uint8_t postShift;    /**< bit shift applied to coefficients. */\n    const q31_t *recipTable;    /**< points to the reciprocal initial value table. */\n          q31_t energy;         /**< saves previous frame energy. */\n          q31_t x0;             /**< saves previous input sample. */\n  } arm_lms_norm_instance_q31;\n\n\n  /**\n   * @brief Processing function for Q31 normalized LMS filter.\n   * @param[in]  S          points to an instance of the Q31 normalized LMS filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[in]  pRef       points to the block of reference data.\n   * @param[out] pOut       points to the block of output data.\n   * @param[out] pErr       points to the block of error data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_lms_norm_q31(\n        arm_lms_norm_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pRef,\n        q31_t * pOut,\n        q31_t * pErr,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Initialization function for Q31 normalized LMS filter.\n   * @param[in] S          points to an instance of the Q31 normalized LMS filter structure.\n   * @param[in] numTaps    number of filter coefficients.\n   * @param[in] pCoeffs    points to coefficient buffer.\n   * @param[in] pState     points to state buffer.\n   * @param[in] mu         step size that controls filter coefficient updates.\n   * @param[in] blockSize  number of samples to process.\n   * @param[in] postShift  bit shift applied to coefficients.\n   */\n  void arm_lms_norm_init_q31(\n        arm_lms_norm_instance_q31 * S,\n        uint16_t numTaps,\n        q31_t * pCoeffs,\n        q31_t * pState,\n        q31_t mu,\n        uint32_t blockSize,\n        uint8_t postShift);\n\n\n  /**\n   * @brief Instance structure for the Q15 normalized LMS filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;     /**< Number of coefficients in the filter. */\n          q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */\n          q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */\n          q15_t mu;             /**< step size that controls filter coefficient updates. */\n          uint8_t postShift;    /**< bit shift applied to coefficients. */\n    const q15_t *recipTable;    /**< Points to the reciprocal initial value table. */\n          q15_t energy;         /**< saves previous frame energy. */\n          q15_t x0;             /**< saves previous input sample. */\n  } arm_lms_norm_instance_q15;\n\n\n  /**\n   * @brief Processing function for Q15 normalized LMS filter.\n   * @param[in]  S          points to an instance of the Q15 normalized LMS filter structure.\n   * @param[in]  pSrc       points to the block of input data.\n   * @param[in]  pRef       points to the block of reference data.\n   * @param[out] pOut       points to the block of output data.\n   * @param[out] pErr       points to the block of error data.\n   * @param[in]  blockSize  number of samples to process.\n   */\n  void arm_lms_norm_q15(\n        arm_lms_norm_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pRef,\n        q15_t * pOut,\n        q15_t * pErr,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Initialization function for Q15 normalized LMS filter.\n   * @param[in] S          points to an instance of the Q15 normalized LMS filter structure.\n   * @param[in] numTaps    number of filter coefficients.\n   * @param[in] pCoeffs    points to coefficient buffer.\n   * @param[in] pState     points to state buffer.\n   * @param[in] mu         step size that controls filter coefficient updates.\n   * @param[in] blockSize  number of samples to process.\n   * @param[in] postShift  bit shift applied to coefficients.\n   */\n  void arm_lms_norm_init_q15(\n        arm_lms_norm_instance_q15 * S,\n        uint16_t numTaps,\n        q15_t * pCoeffs,\n        q15_t * pState,\n        q15_t mu,\n        uint32_t blockSize,\n        uint8_t postShift);\n\n\n  /**\n   * @brief Correlation of floating-point sequences.\n   * @param[in]  pSrcA    points to the first input sequence.\n   * @param[in]  srcALen  length of the first input sequence.\n   * @param[in]  pSrcB    points to the second input sequence.\n   * @param[in]  srcBLen  length of the second input sequence.\n   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.\n   */\n  void arm_correlate_f32(\n  const float32_t * pSrcA,\n        uint32_t srcALen,\n  const float32_t * pSrcB,\n        uint32_t srcBLen,\n        float32_t * pDst);\n\n\n/**\n @brief Correlation of Q15 sequences\n @param[in]  pSrcA     points to the first input sequence\n @param[in]  srcALen   length of the first input sequence\n @param[in]  pSrcB     points to the second input sequence\n @param[in]  srcBLen   length of the second input sequence\n @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.\n @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n*/\nvoid arm_correlate_opt_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst,\n        q15_t * pScratch);\n\n\n/**\n  @brief Correlation of Q15 sequences.\n  @param[in]  pSrcA    points to the first input sequence\n  @param[in]  srcALen  length of the first input sequence\n  @param[in]  pSrcB    points to the second input sequence\n  @param[in]  srcBLen  length of the second input sequence\n  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.\n */\n  void arm_correlate_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst);\n\n\n/**\n  @brief         Correlation of Q15 sequences (fast version).\n  @param[in]     pSrcA      points to the first input sequence\n  @param[in]     srcALen    length of the first input sequence\n  @param[in]     pSrcB      points to the second input sequence\n  @param[in]     srcBLen    length of the second input sequence\n  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.\n  @return        none\n */\nvoid arm_correlate_fast_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst);\n\n\n/**\n  @brief Correlation of Q15 sequences (fast version).\n  @param[in]  pSrcA     points to the first input sequence.\n  @param[in]  srcALen   length of the first input sequence.\n  @param[in]  pSrcB     points to the second input sequence.\n  @param[in]  srcBLen   length of the second input sequence.\n  @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.\n  @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n */\nvoid arm_correlate_fast_opt_q15(\n  const q15_t * pSrcA,\n        uint32_t srcALen,\n  const q15_t * pSrcB,\n        uint32_t srcBLen,\n        q15_t * pDst,\n        q15_t * pScratch);\n\n\n  /**\n   * @brief Correlation of Q31 sequences.\n   * @param[in]  pSrcA    points to the first input sequence.\n   * @param[in]  srcALen  length of the first input sequence.\n   * @param[in]  pSrcB    points to the second input sequence.\n   * @param[in]  srcBLen  length of the second input sequence.\n   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.\n   */\n  void arm_correlate_q31(\n  const q31_t * pSrcA,\n        uint32_t srcALen,\n  const q31_t * pSrcB,\n        uint32_t srcBLen,\n        q31_t * pDst);\n\n\n/**\n  @brief Correlation of Q31 sequences (fast version).\n  @param[in]  pSrcA    points to the first input sequence\n  @param[in]  srcALen  length of the first input sequence\n  @param[in]  pSrcB    points to the second input sequence\n  @param[in]  srcBLen  length of the second input sequence\n  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.\n */\nvoid arm_correlate_fast_q31(\n  const q31_t * pSrcA,\n        uint32_t srcALen,\n  const q31_t * pSrcB,\n        uint32_t srcBLen,\n        q31_t * pDst);\n\n\n /**\n   * @brief Correlation of Q7 sequences.\n   * @param[in]  pSrcA      points to the first input sequence.\n   * @param[in]  srcALen    length of the first input sequence.\n   * @param[in]  pSrcB      points to the second input sequence.\n   * @param[in]  srcBLen    length of the second input sequence.\n   * @param[out] pDst       points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.\n   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.\n   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).\n   */\n  void arm_correlate_opt_q7(\n  const q7_t * pSrcA,\n        uint32_t srcALen,\n  const q7_t * pSrcB,\n        uint32_t srcBLen,\n        q7_t * pDst,\n        q15_t * pScratch1,\n        q15_t * pScratch2);\n\n\n  /**\n   * @brief Correlation of Q7 sequences.\n   * @param[in]  pSrcA    points to the first input sequence.\n   * @param[in]  srcALen  length of the first input sequence.\n   * @param[in]  pSrcB    points to the second input sequence.\n   * @param[in]  srcBLen  length of the second input sequence.\n   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.\n   */\n  void arm_correlate_q7(\n  const q7_t * pSrcA,\n        uint32_t srcALen,\n  const q7_t * pSrcB,\n        uint32_t srcBLen,\n        q7_t * pDst);\n\n\n  /**\n   * @brief Instance structure for the floating-point sparse FIR filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;             /**< number of coefficients in the filter. */\n          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */\n          float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */\n    const float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/\n          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */\n          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */\n  } arm_fir_sparse_instance_f32;\n\n  /**\n   * @brief Instance structure for the Q31 sparse FIR filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;             /**< number of coefficients in the filter. */\n          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */\n          q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */\n    const q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/\n          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */\n          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */\n  } arm_fir_sparse_instance_q31;\n\n  /**\n   * @brief Instance structure for the Q15 sparse FIR filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;             /**< number of coefficients in the filter. */\n          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */\n          q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */\n    const q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/\n          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */\n          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */\n  } arm_fir_sparse_instance_q15;\n\n  /**\n   * @brief Instance structure for the Q7 sparse FIR filter.\n   */\n  typedef struct\n  {\n          uint16_t numTaps;             /**< number of coefficients in the filter. */\n          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */\n          q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */\n    const q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/\n          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */\n          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */\n  } arm_fir_sparse_instance_q7;\n\n\n  /**\n   * @brief Processing function for the floating-point sparse FIR filter.\n   * @param[in]  S           points to an instance of the floating-point sparse FIR structure.\n   * @param[in]  pSrc        points to the block of input data.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.\n   * @param[in]  blockSize   number of input samples to process per call.\n   */\n  void arm_fir_sparse_f32(\n        arm_fir_sparse_instance_f32 * S,\n  const float32_t * pSrc,\n        float32_t * pDst,\n        float32_t * pScratchIn,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the floating-point sparse FIR filter.\n   * @param[in,out] S          points to an instance of the floating-point sparse FIR structure.\n   * @param[in]     numTaps    number of nonzero coefficients in the filter.\n   * @param[in]     pCoeffs    points to the array of filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     pTapDelay  points to the array of offset times.\n   * @param[in]     maxDelay   maximum offset time supported.\n   * @param[in]     blockSize  number of samples that will be processed per block.\n   */\n  void arm_fir_sparse_init_f32(\n        arm_fir_sparse_instance_f32 * S,\n        uint16_t numTaps,\n  const float32_t * pCoeffs,\n        float32_t * pState,\n        int32_t * pTapDelay,\n        uint16_t maxDelay,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q31 sparse FIR filter.\n   * @param[in]  S           points to an instance of the Q31 sparse FIR structure.\n   * @param[in]  pSrc        points to the block of input data.\n   * @param[out] pDst        points to the block of output data\n   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.\n   * @param[in]  blockSize   number of input samples to process per call.\n   */\n  void arm_fir_sparse_q31(\n        arm_fir_sparse_instance_q31 * S,\n  const q31_t * pSrc,\n        q31_t * pDst,\n        q31_t * pScratchIn,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the Q31 sparse FIR filter.\n   * @param[in,out] S          points to an instance of the Q31 sparse FIR structure.\n   * @param[in]     numTaps    number of nonzero coefficients in the filter.\n   * @param[in]     pCoeffs    points to the array of filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     pTapDelay  points to the array of offset times.\n   * @param[in]     maxDelay   maximum offset time supported.\n   * @param[in]     blockSize  number of samples that will be processed per block.\n   */\n  void arm_fir_sparse_init_q31(\n        arm_fir_sparse_instance_q31 * S,\n        uint16_t numTaps,\n  const q31_t * pCoeffs,\n        q31_t * pState,\n        int32_t * pTapDelay,\n        uint16_t maxDelay,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q15 sparse FIR filter.\n   * @param[in]  S            points to an instance of the Q15 sparse FIR structure.\n   * @param[in]  pSrc         points to the block of input data.\n   * @param[out] pDst         points to the block of output data\n   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.\n   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.\n   * @param[in]  blockSize    number of input samples to process per call.\n   */\n  void arm_fir_sparse_q15(\n        arm_fir_sparse_instance_q15 * S,\n  const q15_t * pSrc,\n        q15_t * pDst,\n        q15_t * pScratchIn,\n        q31_t * pScratchOut,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the Q15 sparse FIR filter.\n   * @param[in,out] S          points to an instance of the Q15 sparse FIR structure.\n   * @param[in]     numTaps    number of nonzero coefficients in the filter.\n   * @param[in]     pCoeffs    points to the array of filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     pTapDelay  points to the array of offset times.\n   * @param[in]     maxDelay   maximum offset time supported.\n   * @param[in]     blockSize  number of samples that will be processed per block.\n   */\n  void arm_fir_sparse_init_q15(\n        arm_fir_sparse_instance_q15 * S,\n        uint16_t numTaps,\n  const q15_t * pCoeffs,\n        q15_t * pState,\n        int32_t * pTapDelay,\n        uint16_t maxDelay,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Processing function for the Q7 sparse FIR filter.\n   * @param[in]  S            points to an instance of the Q7 sparse FIR structure.\n   * @param[in]  pSrc         points to the block of input data.\n   * @param[out] pDst         points to the block of output data\n   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.\n   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.\n   * @param[in]  blockSize    number of input samples to process per call.\n   */\n  void arm_fir_sparse_q7(\n        arm_fir_sparse_instance_q7 * S,\n  const q7_t * pSrc,\n        q7_t * pDst,\n        q7_t * pScratchIn,\n        q31_t * pScratchOut,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Initialization function for the Q7 sparse FIR filter.\n   * @param[in,out] S          points to an instance of the Q7 sparse FIR structure.\n   * @param[in]     numTaps    number of nonzero coefficients in the filter.\n   * @param[in]     pCoeffs    points to the array of filter coefficients.\n   * @param[in]     pState     points to the state buffer.\n   * @param[in]     pTapDelay  points to the array of offset times.\n   * @param[in]     maxDelay   maximum offset time supported.\n   * @param[in]     blockSize  number of samples that will be processed per block.\n   */\n  void arm_fir_sparse_init_q7(\n        arm_fir_sparse_instance_q7 * S,\n        uint16_t numTaps,\n  const q7_t * pCoeffs,\n        q7_t * pState,\n        int32_t * pTapDelay,\n        uint16_t maxDelay,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Floating-point sin_cos function.\n   * @param[in]  theta   input value in degrees\n   * @param[out] pSinVal  points to the processed sine output.\n   * @param[out] pCosVal  points to the processed cos output.\n   */\n  void arm_sin_cos_f32(\n        float32_t theta,\n        float32_t * pSinVal,\n        float32_t * pCosVal);\n\n\n  /**\n   * @brief  Q31 sin_cos function.\n   * @param[in]  theta    scaled input value in degrees\n   * @param[out] pSinVal  points to the processed sine output.\n   * @param[out] pCosVal  points to the processed cosine output.\n   */\n  void arm_sin_cos_q31(\n        q31_t theta,\n        q31_t * pSinVal,\n        q31_t * pCosVal);\n\n\n  /**\n   * @brief  Floating-point complex conjugate.\n   * @param[in]  pSrc        points to the input vector\n   * @param[out] pDst        points to the output vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   */\n  void arm_cmplx_conj_f32(\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t numSamples);\n\n  /**\n   * @brief  Q31 complex conjugate.\n   * @param[in]  pSrc        points to the input vector\n   * @param[out] pDst        points to the output vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   */\n  void arm_cmplx_conj_q31(\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Q15 complex conjugate.\n   * @param[in]  pSrc        points to the input vector\n   * @param[out] pDst        points to the output vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   */\n  void arm_cmplx_conj_q15(\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Floating-point complex magnitude squared\n   * @param[in]  pSrc        points to the complex input vector\n   * @param[out] pDst        points to the real output vector\n   * @param[in]  numSamples  number of complex samples in the input vector\n   */\n  void arm_cmplx_mag_squared_f32(\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Q31 complex magnitude squared\n   * @param[in]  pSrc        points to the complex input vector\n   * @param[out] pDst        points to the real output vector\n   * @param[in]  numSamples  number of complex samples in the input vector\n   */\n  void arm_cmplx_mag_squared_q31(\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Q15 complex magnitude squared\n   * @param[in]  pSrc        points to the complex input vector\n   * @param[out] pDst        points to the real output vector\n   * @param[in]  numSamples  number of complex samples in the input vector\n   */\n  void arm_cmplx_mag_squared_q15(\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t numSamples);\n\n\n /**\n   * @ingroup groupController\n   */\n\n  /**\n   * @defgroup PID PID Motor Control\n   *\n   * A Proportional Integral Derivative (PID) controller is a generic feedback control\n   * loop mechanism widely used in industrial control systems.\n   * A PID controller is the most commonly used type of feedback controller.\n   *\n   * This set of functions implements (PID) controllers\n   * for Q15, Q31, and floating-point data types.  The functions operate on a single sample\n   * of data and each call to the function returns a single processed value.\n   * S points to an instance of the PID control data structure.  in\n   * is the input sample value. The functions return the output value.\n   *\n   * \\par Algorithm:\n   * 
\n   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]\n   *    A0 = Kp + Ki + Kd\n   *    A1 = (-Kp ) - (2 * Kd )\n   *    A2 = Kd\n   * 
\n   *\n   * \\par\n   * where \\c Kp is proportional constant, \\c Ki is Integral constant and \\c Kd is Derivative constant\n   *\n   * \\par\n   * \\image html PID.gif \"Proportional Integral Derivative Controller\"\n   *\n   * \\par\n   * The PID controller calculates an \"error\" value as the difference between\n   * the measured output and the reference input.\n   * The controller attempts to minimize the error by adjusting the process control inputs.\n   * The proportional value determines the reaction to the current error,\n   * the integral value determines the reaction based on the sum of recent errors,\n   * and the derivative value determines the reaction based on the rate at which the error has been changing.\n   *\n   * \\par Instance Structure\n   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.\n   * A separate instance structure must be defined for each PID Controller.\n   * There are separate instance structure declarations for each of the 3 supported data types.\n   *\n   * \\par Reset Functions\n   * There is also an associated reset function for each data type which clears the state array.\n   *\n   * \\par Initialization Functions\n   * There is also an associated initialization function for each data type.\n   * The initialization function performs the following operations:\n   * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.\n   * - Zeros out the values in the state buffer.\n   *\n   * \\par\n   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.\n   *\n   * \\par Fixed-Point Behavior\n   * Care must be taken when using the fixed-point versions of the PID Controller functions.\n   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.\n   * Refer to the function specific documentation below for usage guidelines.\n   */\n\n  /**\n   * @addtogroup PID\n   * @{\n   */\n\n  /**\n   * @brief         Process function for the floating-point PID Control.\n   * @param[in,out] S   is an instance of the floating-point PID Control structure\n   * @param[in]     in  input sample to process\n   * @return        processed output sample.\n   */\n  __STATIC_FORCEINLINE float32_t arm_pid_f32(\n  arm_pid_instance_f32 * S,\n  float32_t in)\n  {\n    float32_t out;\n\n    /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */\n    out = (S->A0 * in) +\n      (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);\n\n    /* Update state */\n    S->state[1] = S->state[0];\n    S->state[0] = in;\n    S->state[2] = out;\n\n    /* return to application */\n    return (out);\n\n  }\n\n/**\n  @brief         Process function for the Q31 PID Control.\n  @param[in,out] S  points to an instance of the Q31 PID Control structure\n  @param[in]     in  input sample to process\n  @return        processed output sample.\n\n  \\par Scaling and Overflow Behavior\n         The function is implemented using an internal 64-bit accumulator.\n         The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.\n         Thus, if the accumulator result overflows it wraps around rather than clip.\n         In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.\n         After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.\n */\n__STATIC_FORCEINLINE q31_t arm_pid_q31(\n  arm_pid_instance_q31 * S,\n  q31_t in)\n  {\n    q63_t acc;\n    q31_t out;\n\n    /* acc = A0 * x[n]  */\n    acc = (q63_t) S->A0 * in;\n\n    /* acc += A1 * x[n-1] */\n    acc += (q63_t) S->A1 * S->state[0];\n\n    /* acc += A2 * x[n-2]  */\n    acc += (q63_t) S->A2 * S->state[1];\n\n    /* convert output to 1.31 format to add y[n-1] */\n    out = (q31_t) (acc >> 31U);\n\n    /* out += y[n-1] */\n    out += S->state[2];\n\n    /* Update state */\n    S->state[1] = S->state[0];\n    S->state[0] = in;\n    S->state[2] = out;\n\n    /* return to application */\n    return (out);\n  }\n\n\n/**\n  @brief         Process function for the Q15 PID Control.\n  @param[in,out] S   points to an instance of the Q15 PID Control structure\n  @param[in]     in  input sample to process\n  @return        processed output sample.\n\n  \\par Scaling and Overflow Behavior\n         The function is implemented using a 64-bit internal accumulator.\n         Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.\n         The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.\n         There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.\n         After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.\n         Lastly, the accumulator is saturated to yield a result in 1.15 format.\n */\n__STATIC_FORCEINLINE q15_t arm_pid_q15(\n  arm_pid_instance_q15 * S,\n  q15_t in)\n  {\n    q63_t acc;\n    q15_t out;\n\n#if defined (ARM_MATH_DSP)\n    /* Implementation of PID controller */\n\n    /* acc = A0 * x[n]  */\n    acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);\n\n    /* acc += A1 * x[n-1] + A2 * x[n-2]  */\n    acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc);\n#else\n    /* acc = A0 * x[n]  */\n    acc = ((q31_t) S->A0) * in;\n\n    /* acc += A1 * x[n-1] + A2 * x[n-2]  */\n    acc += (q31_t) S->A1 * S->state[0];\n    acc += (q31_t) S->A2 * S->state[1];\n#endif\n\n    /* acc += y[n-1] */\n    acc += (q31_t) S->state[2] << 15;\n\n    /* saturate the output */\n    out = (q15_t) (__SSAT((acc >> 15), 16));\n\n    /* Update state */\n    S->state[1] = S->state[0];\n    S->state[0] = in;\n    S->state[2] = out;\n\n    /* return to application */\n    return (out);\n  }\n\n  /**\n   * @} end of PID group\n   */\n\n\n  /**\n   * @brief Floating-point matrix inverse.\n   * @param[in]  src   points to the instance of the input floating-point matrix structure.\n   * @param[out] dst   points to the instance of the output floating-point matrix structure.\n   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.\n   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.\n   */\n  arm_status arm_mat_inverse_f32(\n  const arm_matrix_instance_f32 * src,\n  arm_matrix_instance_f32 * dst);\n\n\n  /**\n   * @brief Floating-point matrix inverse.\n   * @param[in]  src   points to the instance of the input floating-point matrix structure.\n   * @param[out] dst   points to the instance of the output floating-point matrix structure.\n   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.\n   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.\n   */\n  arm_status arm_mat_inverse_f64(\n  const arm_matrix_instance_f64 * src,\n  arm_matrix_instance_f64 * dst);\n\n\n\n  /**\n   * @ingroup groupController\n   */\n\n  /**\n   * @defgroup clarke Vector Clarke Transform\n   * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.\n   * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents\n   * in the two-phase orthogonal stator axis Ialpha and Ibeta.\n   * When Ialpha is superposed with Ia as shown in the figure below\n   * \\image html clarke.gif Stator current space vector and its components in (a,b).\n   * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta\n   * can be calculated using only Ia and Ib.\n   *\n   * The function operates on a single sample of data and each call to the function returns the processed output.\n   * The library provides separate functions for Q31 and floating-point data types.\n   * \\par Algorithm\n   * \\image html clarkeFormula.gif\n   * where Ia and Ib are the instantaneous stator phases and\n   * pIalpha and pIbeta are the two coordinates of time invariant vector.\n   * \\par Fixed-Point Behavior\n   * Care must be taken when using the Q31 version of the Clarke transform.\n   * In particular, the overflow and saturation behavior of the accumulator used must be considered.\n   * Refer to the function specific documentation below for usage guidelines.\n   */\n\n  /**\n   * @addtogroup clarke\n   * @{\n   */\n\n  /**\n   *\n   * @brief  Floating-point Clarke transform\n   * @param[in]  Ia       input three-phase coordinate a\n   * @param[in]  Ib       input three-phase coordinate b\n   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha\n   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta\n   * @return        none\n   */\n  __STATIC_FORCEINLINE void arm_clarke_f32(\n  float32_t Ia,\n  float32_t Ib,\n  float32_t * pIalpha,\n  float32_t * pIbeta)\n  {\n    /* Calculate pIalpha using the equation, pIalpha = Ia */\n    *pIalpha = Ia;\n\n    /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */\n    *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);\n  }\n\n\n/**\n  @brief  Clarke transform for Q31 version\n  @param[in]  Ia       input three-phase coordinate a\n  @param[in]  Ib       input three-phase coordinate b\n  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha\n  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta\n  @return     none\n\n  \\par Scaling and Overflow Behavior\n         The function is implemented using an internal 32-bit accumulator.\n         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.\n         There is saturation on the addition, hence there is no risk of overflow.\n */\n__STATIC_FORCEINLINE void arm_clarke_q31(\n  q31_t Ia,\n  q31_t Ib,\n  q31_t * pIalpha,\n  q31_t * pIbeta)\n  {\n    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */\n\n    /* Calculating pIalpha from Ia by equation pIalpha = Ia */\n    *pIalpha = Ia;\n\n    /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */\n    product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);\n\n    /* Intermediate product is calculated by (2/sqrt(3) * Ib) */\n    product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);\n\n    /* pIbeta is calculated by adding the intermediate products */\n    *pIbeta = __QADD(product1, product2);\n  }\n\n  /**\n   * @} end of clarke group\n   */\n\n\n  /**\n   * @ingroup groupController\n   */\n\n  /**\n   * @defgroup inv_clarke Vector Inverse Clarke Transform\n   * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.\n   *\n   * The function operates on a single sample of data and each call to the function returns the processed output.\n   * The library provides separate functions for Q31 and floating-point data types.\n   * \\par Algorithm\n   * \\image html clarkeInvFormula.gif\n   * where pIa and pIb are the instantaneous stator phases and\n   * Ialpha and Ibeta are the two coordinates of time invariant vector.\n   * \\par Fixed-Point Behavior\n   * Care must be taken when using the Q31 version of the Clarke transform.\n   * In particular, the overflow and saturation behavior of the accumulator used must be considered.\n   * Refer to the function specific documentation below for usage guidelines.\n   */\n\n  /**\n   * @addtogroup inv_clarke\n   * @{\n   */\n\n   /**\n   * @brief  Floating-point Inverse Clarke transform\n   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha\n   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta\n   * @param[out] pIa     points to output three-phase coordinate a\n   * @param[out] pIb     points to output three-phase coordinate b\n   * @return     none\n   */\n  __STATIC_FORCEINLINE void arm_inv_clarke_f32(\n  float32_t Ialpha,\n  float32_t Ibeta,\n  float32_t * pIa,\n  float32_t * pIb)\n  {\n    /* Calculating pIa from Ialpha by equation pIa = Ialpha */\n    *pIa = Ialpha;\n\n    /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */\n    *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;\n  }\n\n\n/**\n  @brief  Inverse Clarke transform for Q31 version\n  @param[in]  Ialpha  input two-phase orthogonal vector axis alpha\n  @param[in]  Ibeta   input two-phase orthogonal vector axis beta\n  @param[out] pIa     points to output three-phase coordinate a\n  @param[out] pIb     points to output three-phase coordinate b\n  @return     none\n\n  \\par Scaling and Overflow Behavior\n         The function is implemented using an internal 32-bit accumulator.\n         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.\n         There is saturation on the subtraction, hence there is no risk of overflow.\n */\n__STATIC_FORCEINLINE void arm_inv_clarke_q31(\n  q31_t Ialpha,\n  q31_t Ibeta,\n  q31_t * pIa,\n  q31_t * pIb)\n  {\n    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */\n\n    /* Calculating pIa from Ialpha by equation pIa = Ialpha */\n    *pIa = Ialpha;\n\n    /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */\n    product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);\n\n    /* Intermediate product is calculated by (1/sqrt(3) * pIb) */\n    product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);\n\n    /* pIb is calculated by subtracting the products */\n    *pIb = __QSUB(product2, product1);\n  }\n\n  /**\n   * @} end of inv_clarke group\n   */\n\n\n\n  /**\n   * @ingroup groupController\n   */\n\n  /**\n   * @defgroup park Vector Park Transform\n   *\n   * Forward Park transform converts the input two-coordinate vector to flux and torque components.\n   * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents\n   * from the stationary to the moving reference frame and control the spatial relationship between\n   * the stator vector current and rotor flux vector.\n   * If we consider the d axis aligned with the rotor flux, the diagram below shows the\n   * current vector and the relationship from the two reference frames:\n   * \\image html park.gif \"Stator current space vector and its component in (a,b) and in the d,q rotating reference frame\"\n   *\n   * The function operates on a single sample of data and each call to the function returns the processed output.\n   * The library provides separate functions for Q31 and floating-point data types.\n   * \\par Algorithm\n   * \\image html parkFormula.gif\n   * where Ialpha and Ibeta are the stator vector components,\n   * pId and pIq are rotor vector components and cosVal and sinVal are the\n   * cosine and sine values of theta (rotor flux position).\n   * \\par Fixed-Point Behavior\n   * Care must be taken when using the Q31 version of the Park transform.\n   * In particular, the overflow and saturation behavior of the accumulator used must be considered.\n   * Refer to the function specific documentation below for usage guidelines.\n   */\n\n  /**\n   * @addtogroup park\n   * @{\n   */\n\n  /**\n   * @brief Floating-point Park transform\n   * @param[in]  Ialpha  input two-phase vector coordinate alpha\n   * @param[in]  Ibeta   input two-phase vector coordinate beta\n   * @param[out] pId     points to output   rotor reference frame d\n   * @param[out] pIq     points to output   rotor reference frame q\n   * @param[in]  sinVal  sine value of rotation angle theta\n   * @param[in]  cosVal  cosine value of rotation angle theta\n   * @return     none\n   *\n   * The function implements the forward Park transform.\n   *\n   */\n  __STATIC_FORCEINLINE void arm_park_f32(\n  float32_t Ialpha,\n  float32_t Ibeta,\n  float32_t * pId,\n  float32_t * pIq,\n  float32_t sinVal,\n  float32_t cosVal)\n  {\n    /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */\n    *pId = Ialpha * cosVal + Ibeta * sinVal;\n\n    /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */\n    *pIq = -Ialpha * sinVal + Ibeta * cosVal;\n  }\n\n\n/**\n  @brief  Park transform for Q31 version\n  @param[in]  Ialpha  input two-phase vector coordinate alpha\n  @param[in]  Ibeta   input two-phase vector coordinate beta\n  @param[out] pId     points to output rotor reference frame d\n  @param[out] pIq     points to output rotor reference frame q\n  @param[in]  sinVal  sine value of rotation angle theta\n  @param[in]  cosVal  cosine value of rotation angle theta\n  @return     none\n\n  \\par Scaling and Overflow Behavior\n         The function is implemented using an internal 32-bit accumulator.\n         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.\n         There is saturation on the addition and subtraction, hence there is no risk of overflow.\n */\n__STATIC_FORCEINLINE void arm_park_q31(\n  q31_t Ialpha,\n  q31_t Ibeta,\n  q31_t * pId,\n  q31_t * pIq,\n  q31_t sinVal,\n  q31_t cosVal)\n  {\n    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */\n    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */\n\n    /* Intermediate product is calculated by (Ialpha * cosVal) */\n    product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);\n\n    /* Intermediate product is calculated by (Ibeta * sinVal) */\n    product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);\n\n\n    /* Intermediate product is calculated by (Ialpha * sinVal) */\n    product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);\n\n    /* Intermediate product is calculated by (Ibeta * cosVal) */\n    product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);\n\n    /* Calculate pId by adding the two intermediate products 1 and 2 */\n    *pId = __QADD(product1, product2);\n\n    /* Calculate pIq by subtracting the two intermediate products 3 from 4 */\n    *pIq = __QSUB(product4, product3);\n  }\n\n  /**\n   * @} end of park group\n   */\n\n\n  /**\n   * @ingroup groupController\n   */\n\n  /**\n   * @defgroup inv_park Vector Inverse Park transform\n   * Inverse Park transform converts the input flux and torque components to two-coordinate vector.\n   *\n   * The function operates on a single sample of data and each call to the function returns the processed output.\n   * The library provides separate functions for Q31 and floating-point data types.\n   * \\par Algorithm\n   * \\image html parkInvFormula.gif\n   * where pIalpha and pIbeta are the stator vector components,\n   * Id and Iq are rotor vector components and cosVal and sinVal are the\n   * cosine and sine values of theta (rotor flux position).\n   * \\par Fixed-Point Behavior\n   * Care must be taken when using the Q31 version of the Park transform.\n   * In particular, the overflow and saturation behavior of the accumulator used must be considered.\n   * Refer to the function specific documentation below for usage guidelines.\n   */\n\n  /**\n   * @addtogroup inv_park\n   * @{\n   */\n\n   /**\n   * @brief  Floating-point Inverse Park transform\n   * @param[in]  Id       input coordinate of rotor reference frame d\n   * @param[in]  Iq       input coordinate of rotor reference frame q\n   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha\n   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta\n   * @param[in]  sinVal   sine value of rotation angle theta\n   * @param[in]  cosVal   cosine value of rotation angle theta\n   * @return     none\n   */\n  __STATIC_FORCEINLINE void arm_inv_park_f32(\n  float32_t Id,\n  float32_t Iq,\n  float32_t * pIalpha,\n  float32_t * pIbeta,\n  float32_t sinVal,\n  float32_t cosVal)\n  {\n    /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */\n    *pIalpha = Id * cosVal - Iq * sinVal;\n\n    /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */\n    *pIbeta = Id * sinVal + Iq * cosVal;\n  }\n\n\n/**\n  @brief  Inverse Park transform for   Q31 version\n  @param[in]  Id       input coordinate of rotor reference frame d\n  @param[in]  Iq       input coordinate of rotor reference frame q\n  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha\n  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta\n  @param[in]  sinVal   sine value of rotation angle theta\n  @param[in]  cosVal   cosine value of rotation angle theta\n  @return     none\n\n  @par Scaling and Overflow Behavior\n         The function is implemented using an internal 32-bit accumulator.\n         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.\n         There is saturation on the addition, hence there is no risk of overflow.\n */\n__STATIC_FORCEINLINE void arm_inv_park_q31(\n  q31_t Id,\n  q31_t Iq,\n  q31_t * pIalpha,\n  q31_t * pIbeta,\n  q31_t sinVal,\n  q31_t cosVal)\n  {\n    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */\n    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */\n\n    /* Intermediate product is calculated by (Id * cosVal) */\n    product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);\n\n    /* Intermediate product is calculated by (Iq * sinVal) */\n    product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);\n\n\n    /* Intermediate product is calculated by (Id * sinVal) */\n    product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);\n\n    /* Intermediate product is calculated by (Iq * cosVal) */\n    product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);\n\n    /* Calculate pIalpha by using the two intermediate products 1 and 2 */\n    *pIalpha = __QSUB(product1, product2);\n\n    /* Calculate pIbeta by using the two intermediate products 3 and 4 */\n    *pIbeta = __QADD(product4, product3);\n  }\n\n  /**\n   * @} end of Inverse park group\n   */\n\n\n  /**\n   * @ingroup groupInterpolation\n   */\n\n  /**\n   * @defgroup LinearInterpolate Linear Interpolation\n   *\n   * Linear interpolation is a method of curve fitting using linear polynomials.\n   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line\n   *\n   * \\par\n   * \\image html LinearInterp.gif \"Linear interpolation\"\n   *\n   * \\par\n   * A  Linear Interpolate function calculates an output value(y), for the input(x)\n   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)\n   *\n   * \\par Algorithm:\n   * 
\n   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))\n   *       where x0, x1 are nearest values of input x\n   *             y0, y1 are nearest values to output y\n   * 
\n   *\n   * \\par\n   * This set of functions implements Linear interpolation process\n   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single\n   * sample of data and each call to the function returns a single processed value.\n   * S points to an instance of the Linear Interpolate function data structure.\n   * x is the input sample value. The functions returns the output value.\n   *\n   * \\par\n   * if x is outside of the table boundary, Linear interpolation returns first value of the table\n   * if x is below input range and returns last value of table if x is above range.\n   */\n\n  /**\n   * @addtogroup LinearInterpolate\n   * @{\n   */\n\n  /**\n   * @brief  Process function for the floating-point Linear Interpolation Function.\n   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure\n   * @param[in]     x  input sample to process\n   * @return y processed output sample.\n   *\n   */\n  __STATIC_FORCEINLINE float32_t arm_linear_interp_f32(\n  arm_linear_interp_instance_f32 * S,\n  float32_t x)\n  {\n    float32_t y;\n    float32_t x0, x1;                            /* Nearest input values */\n    float32_t y0, y1;                            /* Nearest output values */\n    float32_t xSpacing = S->xSpacing;            /* spacing between input values */\n    int32_t i;                                   /* Index variable */\n    float32_t *pYData = S->pYData;               /* pointer to output table */\n\n    /* Calculation of index */\n    i = (int32_t) ((x - S->x1) / xSpacing);\n\n    if (i < 0)\n    {\n      /* Iniatilize output for below specified range as least output value of table */\n      y = pYData[0];\n    }\n    else if ((uint32_t)i >= S->nValues)\n    {\n      /* Iniatilize output for above specified range as last output value of table */\n      y = pYData[S->nValues - 1];\n    }\n    else\n    {\n      /* Calculation of nearest input values */\n      x0 = S->x1 +  i      * xSpacing;\n      x1 = S->x1 + (i + 1) * xSpacing;\n\n      /* Read of nearest output values */\n      y0 = pYData[i];\n      y1 = pYData[i + 1];\n\n      /* Calculation of output */\n      y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));\n\n    }\n\n    /* returns output value */\n    return (y);\n  }\n\n\n   /**\n   *\n   * @brief  Process function for the Q31 Linear Interpolation Function.\n   * @param[in] pYData   pointer to Q31 Linear Interpolation table\n   * @param[in] x        input sample to process\n   * @param[in] nValues  number of table values\n   * @return y processed output sample.\n   *\n   * \\par\n   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.\n   * This function can support maximum of table size 2^12.\n   *\n   */\n  __STATIC_FORCEINLINE q31_t arm_linear_interp_q31(\n  q31_t * pYData,\n  q31_t x,\n  uint32_t nValues)\n  {\n    q31_t y;                                     /* output */\n    q31_t y0, y1;                                /* Nearest output values */\n    q31_t fract;                                 /* fractional part */\n    int32_t index;                               /* Index to read nearest output values */\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    index = ((x & (q31_t)0xFFF00000) >> 20);\n\n    if (index >= (int32_t)(nValues - 1))\n    {\n      return (pYData[nValues - 1]);\n    }\n    else if (index < 0)\n    {\n      return (pYData[0]);\n    }\n    else\n    {\n      /* 20 bits for the fractional part */\n      /* shift left by 11 to keep fract in 1.31 format */\n      fract = (x & 0x000FFFFF) << 11;\n\n      /* Read two nearest output values from the index in 1.31(q31) format */\n      y0 = pYData[index];\n      y1 = pYData[index + 1];\n\n      /* Calculation of y0 * (1-fract) and y is in 2.30 format */\n      y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));\n\n      /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */\n      y += ((q31_t) (((q63_t) y1 * fract) >> 32));\n\n      /* Convert y to 1.31 format */\n      return (y << 1U);\n    }\n  }\n\n\n  /**\n   *\n   * @brief  Process function for the Q15 Linear Interpolation Function.\n   * @param[in] pYData   pointer to Q15 Linear Interpolation table\n   * @param[in] x        input sample to process\n   * @param[in] nValues  number of table values\n   * @return y processed output sample.\n   *\n   * \\par\n   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.\n   * This function can support maximum of table size 2^12.\n   *\n   */\n  __STATIC_FORCEINLINE q15_t arm_linear_interp_q15(\n  q15_t * pYData,\n  q31_t x,\n  uint32_t nValues)\n  {\n    q63_t y;                                     /* output */\n    q15_t y0, y1;                                /* Nearest output values */\n    q31_t fract;                                 /* fractional part */\n    int32_t index;                               /* Index to read nearest output values */\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    index = ((x & (int32_t)0xFFF00000) >> 20);\n\n    if (index >= (int32_t)(nValues - 1))\n    {\n      return (pYData[nValues - 1]);\n    }\n    else if (index < 0)\n    {\n      return (pYData[0]);\n    }\n    else\n    {\n      /* 20 bits for the fractional part */\n      /* fract is in 12.20 format */\n      fract = (x & 0x000FFFFF);\n\n      /* Read two nearest output values from the index */\n      y0 = pYData[index];\n      y1 = pYData[index + 1];\n\n      /* Calculation of y0 * (1-fract) and y is in 13.35 format */\n      y = ((q63_t) y0 * (0xFFFFF - fract));\n\n      /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */\n      y += ((q63_t) y1 * (fract));\n\n      /* convert y to 1.15 format */\n      return (q15_t) (y >> 20);\n    }\n  }\n\n\n  /**\n   *\n   * @brief  Process function for the Q7 Linear Interpolation Function.\n   * @param[in] pYData   pointer to Q7 Linear Interpolation table\n   * @param[in] x        input sample to process\n   * @param[in] nValues  number of table values\n   * @return y processed output sample.\n   *\n   * \\par\n   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.\n   * This function can support maximum of table size 2^12.\n   */\n  __STATIC_FORCEINLINE q7_t arm_linear_interp_q7(\n  q7_t * pYData,\n  q31_t x,\n  uint32_t nValues)\n  {\n    q31_t y;                                     /* output */\n    q7_t y0, y1;                                 /* Nearest output values */\n    q31_t fract;                                 /* fractional part */\n    uint32_t index;                              /* Index to read nearest output values */\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    if (x < 0)\n    {\n      return (pYData[0]);\n    }\n    index = (x >> 20) & 0xfff;\n\n    if (index >= (nValues - 1))\n    {\n      return (pYData[nValues - 1]);\n    }\n    else\n    {\n      /* 20 bits for the fractional part */\n      /* fract is in 12.20 format */\n      fract = (x & 0x000FFFFF);\n\n      /* Read two nearest output values from the index and are in 1.7(q7) format */\n      y0 = pYData[index];\n      y1 = pYData[index + 1];\n\n      /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */\n      y = ((y0 * (0xFFFFF - fract)));\n\n      /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */\n      y += (y1 * fract);\n\n      /* convert y to 1.7(q7) format */\n      return (q7_t) (y >> 20);\n     }\n  }\n\n  /**\n   * @} end of LinearInterpolate group\n   */\n\n  /**\n   * @brief  Fast approximation to the trigonometric sine function for floating-point data.\n   * @param[in] x  input value in radians.\n   * @return  sin(x).\n   */\n  float32_t arm_sin_f32(\n  float32_t x);\n\n\n  /**\n   * @brief  Fast approximation to the trigonometric sine function for Q31 data.\n   * @param[in] x  Scaled input value in radians.\n   * @return  sin(x).\n   */\n  q31_t arm_sin_q31(\n  q31_t x);\n\n\n  /**\n   * @brief  Fast approximation to the trigonometric sine function for Q15 data.\n   * @param[in] x  Scaled input value in radians.\n   * @return  sin(x).\n   */\n  q15_t arm_sin_q15(\n  q15_t x);\n\n\n  /**\n   * @brief  Fast approximation to the trigonometric cosine function for floating-point data.\n   * @param[in] x  input value in radians.\n   * @return  cos(x).\n   */\n  float32_t arm_cos_f32(\n  float32_t x);\n\n\n  /**\n   * @brief Fast approximation to the trigonometric cosine function for Q31 data.\n   * @param[in] x  Scaled input value in radians.\n   * @return  cos(x).\n   */\n  q31_t arm_cos_q31(\n  q31_t x);\n\n\n  /**\n   * @brief  Fast approximation to the trigonometric cosine function for Q15 data.\n   * @param[in] x  Scaled input value in radians.\n   * @return  cos(x).\n   */\n  q15_t arm_cos_q15(\n  q15_t x);\n\n\n  /**\n   * @ingroup groupFastMath\n   */\n\n\n  /**\n   * @defgroup SQRT Square Root\n   *\n   * Computes the square root of a number.\n   * There are separate functions for Q15, Q31, and floating-point data types.\n   * The square root function is computed using the Newton-Raphson algorithm.\n   * This is an iterative algorithm of the form:\n   * 
\n   *      x1 = x0 - f(x0)/f'(x0)\n   * 
\n   * where x1 is the current estimate,\n   * x0 is the previous estimate, and\n   * f'(x0) is the derivative of f() evaluated at x0.\n   * For the square root function, the algorithm reduces to:\n   * 
\n   *     x0 = in/2                         [initial guess]\n   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]\n   * 
\n   */\n\n\n  /**\n   * @addtogroup SQRT\n   * @{\n   */\n\n/**\n  @brief         Floating-point square root function.\n  @param[in]     in    input value\n  @param[out]    pOut  square root of input value\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : input value is positive\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0\n */\n__STATIC_FORCEINLINE arm_status arm_sqrt_f32(\n  float32_t in,\n  float32_t * pOut)\n  {\n    if (in >= 0.0f)\n    {\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n      *pOut = __sqrtf(in);\n  #else\n      *pOut = sqrtf(in);\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n      __ASM(\"VSQRT.F32 %0,%1\" : \"=t\"(*pOut) : \"t\"(in));\n  #else\n      *pOut = sqrtf(in);\n  #endif\n\n#else\n      *pOut = sqrtf(in);\n#endif\n\n      return (ARM_MATH_SUCCESS);\n    }\n    else\n    {\n      *pOut = 0.0f;\n      return (ARM_MATH_ARGUMENT_ERROR);\n    }\n  }\n\n\n/**\n  @brief         Q31 square root function.\n  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF\n  @param[out]    pOut  points to square root of input value\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : input value is positive\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0\n */\narm_status arm_sqrt_q31(\n  q31_t in,\n  q31_t * pOut);\n\n\n/**\n  @brief         Q15 square root function.\n  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF\n  @param[out]    pOut  points to square root of input value\n  @return        execution status\n                   - \\ref ARM_MATH_SUCCESS        : input value is positive\n                   - \\ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0\n */\narm_status arm_sqrt_q15(\n  q15_t in,\n  q15_t * pOut);\n\n  /**\n   * @} end of SQRT group\n   */\n\n\n  /**\n   * @brief floating-point Circular write function.\n   */\n  __STATIC_FORCEINLINE void arm_circularWrite_f32(\n  int32_t * circBuffer,\n  int32_t L,\n  uint16_t * writeOffset,\n  int32_t bufferInc,\n  const int32_t * src,\n  int32_t srcInc,\n  uint32_t blockSize)\n  {\n    uint32_t i = 0U;\n    int32_t wOffset;\n\n    /* Copy the value of Index pointer that points\n     * to the current location where the input samples to be copied */\n    wOffset = *writeOffset;\n\n    /* Loop over the blockSize */\n    i = blockSize;\n\n    while (i > 0U)\n    {\n      /* copy the input sample to the circular buffer */\n      circBuffer[wOffset] = *src;\n\n      /* Update the input pointer */\n      src += srcInc;\n\n      /* Circularly update wOffset.  Watch out for positive and negative value */\n      wOffset += bufferInc;\n      if (wOffset >= L)\n        wOffset -= L;\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Update the index pointer */\n    *writeOffset = (uint16_t)wOffset;\n  }\n\n\n\n  /**\n   * @brief floating-point Circular Read function.\n   */\n  __STATIC_FORCEINLINE void arm_circularRead_f32(\n  int32_t * circBuffer,\n  int32_t L,\n  int32_t * readOffset,\n  int32_t bufferInc,\n  int32_t * dst,\n  int32_t * dst_base,\n  int32_t dst_length,\n  int32_t dstInc,\n  uint32_t blockSize)\n  {\n    uint32_t i = 0U;\n    int32_t rOffset;\n    int32_t* dst_end;\n\n    /* Copy the value of Index pointer that points\n     * to the current location from where the input samples to be read */\n    rOffset = *readOffset;\n    dst_end = dst_base + dst_length;\n\n    /* Loop over the blockSize */\n    i = blockSize;\n\n    while (i > 0U)\n    {\n      /* copy the sample from the circular buffer to the destination buffer */\n      *dst = circBuffer[rOffset];\n\n      /* Update the input pointer */\n      dst += dstInc;\n\n      if (dst == dst_end)\n      {\n        dst = dst_base;\n      }\n\n      /* Circularly update rOffset.  Watch out for positive and negative value  */\n      rOffset += bufferInc;\n\n      if (rOffset >= L)\n      {\n        rOffset -= L;\n      }\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Update the index pointer */\n    *readOffset = rOffset;\n  }\n\n\n  /**\n   * @brief Q15 Circular write function.\n   */\n  __STATIC_FORCEINLINE void arm_circularWrite_q15(\n  q15_t * circBuffer,\n  int32_t L,\n  uint16_t * writeOffset,\n  int32_t bufferInc,\n  const q15_t * src,\n  int32_t srcInc,\n  uint32_t blockSize)\n  {\n    uint32_t i = 0U;\n    int32_t wOffset;\n\n    /* Copy the value of Index pointer that points\n     * to the current location where the input samples to be copied */\n    wOffset = *writeOffset;\n\n    /* Loop over the blockSize */\n    i = blockSize;\n\n    while (i > 0U)\n    {\n      /* copy the input sample to the circular buffer */\n      circBuffer[wOffset] = *src;\n\n      /* Update the input pointer */\n      src += srcInc;\n\n      /* Circularly update wOffset.  Watch out for positive and negative value */\n      wOffset += bufferInc;\n      if (wOffset >= L)\n        wOffset -= L;\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Update the index pointer */\n    *writeOffset = (uint16_t)wOffset;\n  }\n\n\n  /**\n   * @brief Q15 Circular Read function.\n   */\n  __STATIC_FORCEINLINE void arm_circularRead_q15(\n  q15_t * circBuffer,\n  int32_t L,\n  int32_t * readOffset,\n  int32_t bufferInc,\n  q15_t * dst,\n  q15_t * dst_base,\n  int32_t dst_length,\n  int32_t dstInc,\n  uint32_t blockSize)\n  {\n    uint32_t i = 0;\n    int32_t rOffset;\n    q15_t* dst_end;\n\n    /* Copy the value of Index pointer that points\n     * to the current location from where the input samples to be read */\n    rOffset = *readOffset;\n\n    dst_end = dst_base + dst_length;\n\n    /* Loop over the blockSize */\n    i = blockSize;\n\n    while (i > 0U)\n    {\n      /* copy the sample from the circular buffer to the destination buffer */\n      *dst = circBuffer[rOffset];\n\n      /* Update the input pointer */\n      dst += dstInc;\n\n      if (dst == dst_end)\n      {\n        dst = dst_base;\n      }\n\n      /* Circularly update wOffset.  Watch out for positive and negative value */\n      rOffset += bufferInc;\n\n      if (rOffset >= L)\n      {\n        rOffset -= L;\n      }\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Update the index pointer */\n    *readOffset = rOffset;\n  }\n\n\n  /**\n   * @brief Q7 Circular write function.\n   */\n  __STATIC_FORCEINLINE void arm_circularWrite_q7(\n  q7_t * circBuffer,\n  int32_t L,\n  uint16_t * writeOffset,\n  int32_t bufferInc,\n  const q7_t * src,\n  int32_t srcInc,\n  uint32_t blockSize)\n  {\n    uint32_t i = 0U;\n    int32_t wOffset;\n\n    /* Copy the value of Index pointer that points\n     * to the current location where the input samples to be copied */\n    wOffset = *writeOffset;\n\n    /* Loop over the blockSize */\n    i = blockSize;\n\n    while (i > 0U)\n    {\n      /* copy the input sample to the circular buffer */\n      circBuffer[wOffset] = *src;\n\n      /* Update the input pointer */\n      src += srcInc;\n\n      /* Circularly update wOffset.  Watch out for positive and negative value */\n      wOffset += bufferInc;\n      if (wOffset >= L)\n        wOffset -= L;\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Update the index pointer */\n    *writeOffset = (uint16_t)wOffset;\n  }\n\n\n  /**\n   * @brief Q7 Circular Read function.\n   */\n  __STATIC_FORCEINLINE void arm_circularRead_q7(\n  q7_t * circBuffer,\n  int32_t L,\n  int32_t * readOffset,\n  int32_t bufferInc,\n  q7_t * dst,\n  q7_t * dst_base,\n  int32_t dst_length,\n  int32_t dstInc,\n  uint32_t blockSize)\n  {\n    uint32_t i = 0;\n    int32_t rOffset;\n    q7_t* dst_end;\n\n    /* Copy the value of Index pointer that points\n     * to the current location from where the input samples to be read */\n    rOffset = *readOffset;\n\n    dst_end = dst_base + dst_length;\n\n    /* Loop over the blockSize */\n    i = blockSize;\n\n    while (i > 0U)\n    {\n      /* copy the sample from the circular buffer to the destination buffer */\n      *dst = circBuffer[rOffset];\n\n      /* Update the input pointer */\n      dst += dstInc;\n\n      if (dst == dst_end)\n      {\n        dst = dst_base;\n      }\n\n      /* Circularly update rOffset.  Watch out for positive and negative value */\n      rOffset += bufferInc;\n\n      if (rOffset >= L)\n      {\n        rOffset -= L;\n      }\n\n      /* Decrement the loop counter */\n      i--;\n    }\n\n    /* Update the index pointer */\n    *readOffset = rOffset;\n  }\n\n\n  /**\n   * @brief  Sum of the squares of the elements of a Q31 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_power_q31(\n  const q31_t * pSrc,\n        uint32_t blockSize,\n        q63_t * pResult);\n\n\n  /**\n   * @brief  Sum of the squares of the elements of a floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_power_f32(\n  const float32_t * pSrc,\n        uint32_t blockSize,\n        float32_t * pResult);\n\n\n  /**\n   * @brief  Sum of the squares of the elements of a Q15 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_power_q15(\n  const q15_t * pSrc,\n        uint32_t blockSize,\n        q63_t * pResult);\n\n\n  /**\n   * @brief  Sum of the squares of the elements of a Q7 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_power_q7(\n  const q7_t * pSrc,\n        uint32_t blockSize,\n        q31_t * pResult);\n\n\n  /**\n   * @brief  Mean value of a Q7 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_mean_q7(\n  const q7_t * pSrc,\n        uint32_t blockSize,\n        q7_t * pResult);\n\n\n  /**\n   * @brief  Mean value of a Q15 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_mean_q15(\n  const q15_t * pSrc,\n        uint32_t blockSize,\n        q15_t * pResult);\n\n\n  /**\n   * @brief  Mean value of a Q31 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_mean_q31(\n  const q31_t * pSrc,\n        uint32_t blockSize,\n        q31_t * pResult);\n\n\n  /**\n   * @brief  Mean value of a floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_mean_f32(\n  const float32_t * pSrc,\n        uint32_t blockSize,\n        float32_t * pResult);\n\n\n  /**\n   * @brief  Variance of the elements of a floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_var_f32(\n  const float32_t * pSrc,\n        uint32_t blockSize,\n        float32_t * pResult);\n\n\n  /**\n   * @brief  Variance of the elements of a Q31 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_var_q31(\n  const q31_t * pSrc,\n        uint32_t blockSize,\n        q31_t * pResult);\n\n\n  /**\n   * @brief  Variance of the elements of a Q15 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_var_q15(\n  const q15_t * pSrc,\n        uint32_t blockSize,\n        q15_t * pResult);\n\n\n  /**\n   * @brief  Root Mean Square of the elements of a floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_rms_f32(\n  const float32_t * pSrc,\n        uint32_t blockSize,\n        float32_t * pResult);\n\n\n  /**\n   * @brief  Root Mean Square of the elements of a Q31 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_rms_q31(\n  const q31_t * pSrc,\n        uint32_t blockSize,\n        q31_t * pResult);\n\n\n  /**\n   * @brief  Root Mean Square of the elements of a Q15 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_rms_q15(\n  const q15_t * pSrc,\n        uint32_t blockSize,\n        q15_t * pResult);\n\n\n  /**\n   * @brief  Standard deviation of the elements of a floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_std_f32(\n  const float32_t * pSrc,\n        uint32_t blockSize,\n        float32_t * pResult);\n\n\n  /**\n   * @brief  Standard deviation of the elements of a Q31 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_std_q31(\n  const q31_t * pSrc,\n        uint32_t blockSize,\n        q31_t * pResult);\n\n\n  /**\n   * @brief  Standard deviation of the elements of a Q15 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output value.\n   */\n  void arm_std_q15(\n  const q15_t * pSrc,\n        uint32_t blockSize,\n        q15_t * pResult);\n\n\n  /**\n   * @brief  Floating-point complex magnitude\n   * @param[in]  pSrc        points to the complex input vector\n   * @param[out] pDst        points to the real output vector\n   * @param[in]  numSamples  number of complex samples in the input vector\n   */\n  void arm_cmplx_mag_f32(\n  const float32_t * pSrc,\n        float32_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Q31 complex magnitude\n   * @param[in]  pSrc        points to the complex input vector\n   * @param[out] pDst        points to the real output vector\n   * @param[in]  numSamples  number of complex samples in the input vector\n   */\n  void arm_cmplx_mag_q31(\n  const q31_t * pSrc,\n        q31_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Q15 complex magnitude\n   * @param[in]  pSrc        points to the complex input vector\n   * @param[out] pDst        points to the real output vector\n   * @param[in]  numSamples  number of complex samples in the input vector\n   */\n  void arm_cmplx_mag_q15(\n  const q15_t * pSrc,\n        q15_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Q15 complex dot product\n   * @param[in]  pSrcA       points to the first input vector\n   * @param[in]  pSrcB       points to the second input vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   * @param[out] realResult  real part of the result returned here\n   * @param[out] imagResult  imaginary part of the result returned here\n   */\n  void arm_cmplx_dot_prod_q15(\n  const q15_t * pSrcA,\n  const q15_t * pSrcB,\n        uint32_t numSamples,\n        q31_t * realResult,\n        q31_t * imagResult);\n\n\n  /**\n   * @brief  Q31 complex dot product\n   * @param[in]  pSrcA       points to the first input vector\n   * @param[in]  pSrcB       points to the second input vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   * @param[out] realResult  real part of the result returned here\n   * @param[out] imagResult  imaginary part of the result returned here\n   */\n  void arm_cmplx_dot_prod_q31(\n  const q31_t * pSrcA,\n  const q31_t * pSrcB,\n        uint32_t numSamples,\n        q63_t * realResult,\n        q63_t * imagResult);\n\n\n  /**\n   * @brief  Floating-point complex dot product\n   * @param[in]  pSrcA       points to the first input vector\n   * @param[in]  pSrcB       points to the second input vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   * @param[out] realResult  real part of the result returned here\n   * @param[out] imagResult  imaginary part of the result returned here\n   */\n  void arm_cmplx_dot_prod_f32(\n  const float32_t * pSrcA,\n  const float32_t * pSrcB,\n        uint32_t numSamples,\n        float32_t * realResult,\n        float32_t * imagResult);\n\n\n  /**\n   * @brief  Q15 complex-by-real multiplication\n   * @param[in]  pSrcCmplx   points to the complex input vector\n   * @param[in]  pSrcReal    points to the real input vector\n   * @param[out] pCmplxDst   points to the complex output vector\n   * @param[in]  numSamples  number of samples in each vector\n   */\n  void arm_cmplx_mult_real_q15(\n  const q15_t * pSrcCmplx,\n  const q15_t * pSrcReal,\n        q15_t * pCmplxDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Q31 complex-by-real multiplication\n   * @param[in]  pSrcCmplx   points to the complex input vector\n   * @param[in]  pSrcReal    points to the real input vector\n   * @param[out] pCmplxDst   points to the complex output vector\n   * @param[in]  numSamples  number of samples in each vector\n   */\n  void arm_cmplx_mult_real_q31(\n  const q31_t * pSrcCmplx,\n  const q31_t * pSrcReal,\n        q31_t * pCmplxDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Floating-point complex-by-real multiplication\n   * @param[in]  pSrcCmplx   points to the complex input vector\n   * @param[in]  pSrcReal    points to the real input vector\n   * @param[out] pCmplxDst   points to the complex output vector\n   * @param[in]  numSamples  number of samples in each vector\n   */\n  void arm_cmplx_mult_real_f32(\n  const float32_t * pSrcCmplx,\n  const float32_t * pSrcReal,\n        float32_t * pCmplxDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Minimum value of a Q7 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] result     is output pointer\n   * @param[in]  index      is the array index of the minimum value in the input buffer.\n   */\n  void arm_min_q7(\n  const q7_t * pSrc,\n        uint32_t blockSize,\n        q7_t * result,\n        uint32_t * index);\n\n\n  /**\n   * @brief  Minimum value of a Q15 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output pointer\n   * @param[in]  pIndex     is the array index of the minimum value in the input buffer.\n   */\n  void arm_min_q15(\n  const q15_t * pSrc,\n        uint32_t blockSize,\n        q15_t * pResult,\n        uint32_t * pIndex);\n\n\n  /**\n   * @brief  Minimum value of a Q31 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output pointer\n   * @param[out] pIndex     is the array index of the minimum value in the input buffer.\n   */\n  void arm_min_q31(\n  const q31_t * pSrc,\n        uint32_t blockSize,\n        q31_t * pResult,\n        uint32_t * pIndex);\n\n\n  /**\n   * @brief  Minimum value of a floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[in]  blockSize  is the number of samples to process\n   * @param[out] pResult    is output pointer\n   * @param[out] pIndex     is the array index of the minimum value in the input buffer.\n   */\n  void arm_min_f32(\n  const float32_t * pSrc,\n        uint32_t blockSize,\n        float32_t * pResult,\n        uint32_t * pIndex);\n\n\n/**\n * @brief Maximum value of a Q7 vector.\n * @param[in]  pSrc       points to the input buffer\n * @param[in]  blockSize  length of the input vector\n * @param[out] pResult    maximum value returned here\n * @param[out] pIndex     index of maximum value returned here\n */\n  void arm_max_q7(\n  const q7_t * pSrc,\n        uint32_t blockSize,\n        q7_t * pResult,\n        uint32_t * pIndex);\n\n\n/**\n * @brief Maximum value of a Q15 vector.\n * @param[in]  pSrc       points to the input buffer\n * @param[in]  blockSize  length of the input vector\n * @param[out] pResult    maximum value returned here\n * @param[out] pIndex     index of maximum value returned here\n */\n  void arm_max_q15(\n  const q15_t * pSrc,\n        uint32_t blockSize,\n        q15_t * pResult,\n        uint32_t * pIndex);\n\n\n/**\n * @brief Maximum value of a Q31 vector.\n * @param[in]  pSrc       points to the input buffer\n * @param[in]  blockSize  length of the input vector\n * @param[out] pResult    maximum value returned here\n * @param[out] pIndex     index of maximum value returned here\n */\n  void arm_max_q31(\n  const q31_t * pSrc,\n        uint32_t blockSize,\n        q31_t * pResult,\n        uint32_t * pIndex);\n\n\n/**\n * @brief Maximum value of a floating-point vector.\n * @param[in]  pSrc       points to the input buffer\n * @param[in]  blockSize  length of the input vector\n * @param[out] pResult    maximum value returned here\n * @param[out] pIndex     index of maximum value returned here\n */\n  void arm_max_f32(\n  const float32_t * pSrc,\n        uint32_t blockSize,\n        float32_t * pResult,\n        uint32_t * pIndex);\n\n\n  /**\n   * @brief  Q15 complex-by-complex multiplication\n   * @param[in]  pSrcA       points to the first input vector\n   * @param[in]  pSrcB       points to the second input vector\n   * @param[out] pDst        points to the output vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   */\n  void arm_cmplx_mult_cmplx_q15(\n  const q15_t * pSrcA,\n  const q15_t * pSrcB,\n        q15_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Q31 complex-by-complex multiplication\n   * @param[in]  pSrcA       points to the first input vector\n   * @param[in]  pSrcB       points to the second input vector\n   * @param[out] pDst        points to the output vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   */\n  void arm_cmplx_mult_cmplx_q31(\n  const q31_t * pSrcA,\n  const q31_t * pSrcB,\n        q31_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief  Floating-point complex-by-complex multiplication\n   * @param[in]  pSrcA       points to the first input vector\n   * @param[in]  pSrcB       points to the second input vector\n   * @param[out] pDst        points to the output vector\n   * @param[in]  numSamples  number of complex samples in each vector\n   */\n  void arm_cmplx_mult_cmplx_f32(\n  const float32_t * pSrcA,\n  const float32_t * pSrcB,\n        float32_t * pDst,\n        uint32_t numSamples);\n\n\n  /**\n   * @brief Converts the elements of the floating-point vector to Q31 vector.\n   * @param[in]  pSrc       points to the floating-point input vector\n   * @param[out] pDst       points to the Q31 output vector\n   * @param[in]  blockSize  length of the input vector\n   */\n  void arm_float_to_q31(\n  const float32_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Converts the elements of the floating-point vector to Q15 vector.\n   * @param[in]  pSrc       points to the floating-point input vector\n   * @param[out] pDst       points to the Q15 output vector\n   * @param[in]  blockSize  length of the input vector\n   */\n  void arm_float_to_q15(\n  const float32_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief Converts the elements of the floating-point vector to Q7 vector.\n   * @param[in]  pSrc       points to the floating-point input vector\n   * @param[out] pDst       points to the Q7 output vector\n   * @param[in]  blockSize  length of the input vector\n   */\n  void arm_float_to_q7(\n  const float32_t * pSrc,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q31 vector to floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[out] pDst       is output pointer\n   * @param[in]  blockSize  is the number of samples to process\n   */\n  void arm_q31_to_float(\n  const q31_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q31 vector to Q15 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[out] pDst       is output pointer\n   * @param[in]  blockSize  is the number of samples to process\n   */\n  void arm_q31_to_q15(\n  const q31_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q31 vector to Q7 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[out] pDst       is output pointer\n   * @param[in]  blockSize  is the number of samples to process\n   */\n  void arm_q31_to_q7(\n  const q31_t * pSrc,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q15 vector to floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[out] pDst       is output pointer\n   * @param[in]  blockSize  is the number of samples to process\n   */\n  void arm_q15_to_float(\n  const q15_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q15 vector to Q31 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[out] pDst       is output pointer\n   * @param[in]  blockSize  is the number of samples to process\n   */\n  void arm_q15_to_q31(\n  const q15_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q15 vector to Q7 vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[out] pDst       is output pointer\n   * @param[in]  blockSize  is the number of samples to process\n   */\n  void arm_q15_to_q7(\n  const q15_t * pSrc,\n        q7_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q7 vector to floating-point vector.\n   * @param[in]  pSrc       is input pointer\n   * @param[out] pDst       is output pointer\n   * @param[in]  blockSize  is the number of samples to process\n   */\n  void arm_q7_to_float(\n  const q7_t * pSrc,\n        float32_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q7 vector to Q31 vector.\n   * @param[in]  pSrc       input pointer\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_q7_to_q31(\n  const q7_t * pSrc,\n        q31_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @brief  Converts the elements of the Q7 vector to Q15 vector.\n   * @param[in]  pSrc       input pointer\n   * @param[out] pDst       output pointer\n   * @param[in]  blockSize  number of samples to process\n   */\n  void arm_q7_to_q15(\n  const q7_t * pSrc,\n        q15_t * pDst,\n        uint32_t blockSize);\n\n\n  /**\n   * @ingroup groupInterpolation\n   */\n\n  /**\n   * @defgroup BilinearInterpolate Bilinear Interpolation\n   *\n   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.\n   * The underlying function f(x, y) is sampled on a regular grid and the interpolation process\n   * determines values between the grid points.\n   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.\n   * Bilinear interpolation is often used in image processing to rescale images.\n   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.\n   *\n   * Algorithm\n   * \\par\n   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.\n   * For floating-point, the instance structure is defined as:\n   * 
\n   *   typedef struct\n   *   {\n   *     uint16_t numRows;\n   *     uint16_t numCols;\n   *     float32_t *pData;\n   * } arm_bilinear_interp_instance_f32;\n   * 
\n   *\n   * \\par\n   * where numRows specifies the number of rows in the table;\n   * numCols specifies the number of columns in the table;\n   * and pData points to an array of size numRows*numCols values.\n   * The data table pTable is organized in row order and the supplied data values fall on integer indexes.\n   * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers.\n   *\n   * \\par\n   * Let (x, y) specify the desired interpolation point.  Then define:\n   * 
\n   *     XF = floor(x)\n   *     YF = floor(y)\n   * 
\n   * \\par\n   * The interpolated output point is computed as:\n   * 
\n   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))\n   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))\n   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)\n   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)\n   * 
\n   * Note that the coordinates (x, y) contain integer and fractional components.\n   * The integer components specify which portion of the table to use while the\n   * fractional components control the interpolation processor.\n   *\n   * \\par\n   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.\n   */\n\n\n  /**\n   * @addtogroup BilinearInterpolate\n   * @{\n   */\n\n  /**\n  * @brief  Floating-point bilinear interpolation.\n  * @param[in,out] S  points to an instance of the interpolation structure.\n  * @param[in]     X  interpolation coordinate.\n  * @param[in]     Y  interpolation coordinate.\n  * @return out interpolated value.\n  */\n  __STATIC_FORCEINLINE float32_t arm_bilinear_interp_f32(\n  const arm_bilinear_interp_instance_f32 * S,\n  float32_t X,\n  float32_t Y)\n  {\n    float32_t out;\n    float32_t f00, f01, f10, f11;\n    float32_t *pData = S->pData;\n    int32_t xIndex, yIndex, index;\n    float32_t xdiff, ydiff;\n    float32_t b1, b2, b3, b4;\n\n    xIndex = (int32_t) X;\n    yIndex = (int32_t) Y;\n\n    /* Care taken for table outside boundary */\n    /* Returns zero output when values are outside table boundary */\n    if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))\n    {\n      return (0);\n    }\n\n    /* Calculation of index for two nearest points in X-direction */\n    index = (xIndex - 1) + (yIndex - 1) * S->numCols;\n\n\n    /* Read two nearest points in X-direction */\n    f00 = pData[index];\n    f01 = pData[index + 1];\n\n    /* Calculation of index for two nearest points in Y-direction */\n    index = (xIndex - 1) + (yIndex) * S->numCols;\n\n\n    /* Read two nearest points in Y-direction */\n    f10 = pData[index];\n    f11 = pData[index + 1];\n\n    /* Calculation of intermediate values */\n    b1 = f00;\n    b2 = f01 - f00;\n    b3 = f10 - f00;\n    b4 = f00 - f01 - f10 + f11;\n\n    /* Calculation of fractional part in X */\n    xdiff = X - xIndex;\n\n    /* Calculation of fractional part in Y */\n    ydiff = Y - yIndex;\n\n    /* Calculation of bi-linear interpolated output */\n    out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;\n\n    /* return to application */\n    return (out);\n  }\n\n\n  /**\n  * @brief  Q31 bilinear interpolation.\n  * @param[in,out] S  points to an instance of the interpolation structure.\n  * @param[in]     X  interpolation coordinate in 12.20 format.\n  * @param[in]     Y  interpolation coordinate in 12.20 format.\n  * @return out interpolated value.\n  */\n  __STATIC_FORCEINLINE q31_t arm_bilinear_interp_q31(\n  arm_bilinear_interp_instance_q31 * S,\n  q31_t X,\n  q31_t Y)\n  {\n    q31_t out;                                   /* Temporary output */\n    q31_t acc = 0;                               /* output */\n    q31_t xfract, yfract;                        /* X, Y fractional parts */\n    q31_t x1, x2, y1, y2;                        /* Nearest output values */\n    int32_t rI, cI;                              /* Row and column indices */\n    q31_t *pYData = S->pData;                    /* pointer to output table values */\n    uint32_t nCols = S->numCols;                 /* num of rows */\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    rI = ((X & (q31_t)0xFFF00000) >> 20);\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    cI = ((Y & (q31_t)0xFFF00000) >> 20);\n\n    /* Care taken for table outside boundary */\n    /* Returns zero output when values are outside table boundary */\n    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))\n    {\n      return (0);\n    }\n\n    /* 20 bits for the fractional part */\n    /* shift left xfract by 11 to keep 1.31 format */\n    xfract = (X & 0x000FFFFF) << 11U;\n\n    /* Read two nearest output values from the index */\n    x1 = pYData[(rI) + (int32_t)nCols * (cI)    ];\n    x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];\n\n    /* 20 bits for the fractional part */\n    /* shift left yfract by 11 to keep 1.31 format */\n    yfract = (Y & 0x000FFFFF) << 11U;\n\n    /* Read two nearest output values from the index */\n    y1 = pYData[(rI) + (int32_t)nCols * (cI + 1)    ];\n    y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];\n\n    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */\n    out = ((q31_t) (((q63_t) x1  * (0x7FFFFFFF - xfract)) >> 32));\n    acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));\n\n    /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */\n    out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));\n    acc += ((q31_t) ((q63_t) out * (xfract) >> 32));\n\n    /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */\n    out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));\n    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));\n\n    /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */\n    out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));\n    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));\n\n    /* Convert acc to 1.31(q31) format */\n    return ((q31_t)(acc << 2));\n  }\n\n\n  /**\n  * @brief  Q15 bilinear interpolation.\n  * @param[in,out] S  points to an instance of the interpolation structure.\n  * @param[in]     X  interpolation coordinate in 12.20 format.\n  * @param[in]     Y  interpolation coordinate in 12.20 format.\n  * @return out interpolated value.\n  */\n  __STATIC_FORCEINLINE q15_t arm_bilinear_interp_q15(\n  arm_bilinear_interp_instance_q15 * S,\n  q31_t X,\n  q31_t Y)\n  {\n    q63_t acc = 0;                               /* output */\n    q31_t out;                                   /* Temporary output */\n    q15_t x1, x2, y1, y2;                        /* Nearest output values */\n    q31_t xfract, yfract;                        /* X, Y fractional parts */\n    int32_t rI, cI;                              /* Row and column indices */\n    q15_t *pYData = S->pData;                    /* pointer to output table values */\n    uint32_t nCols = S->numCols;                 /* num of rows */\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    rI = ((X & (q31_t)0xFFF00000) >> 20);\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    cI = ((Y & (q31_t)0xFFF00000) >> 20);\n\n    /* Care taken for table outside boundary */\n    /* Returns zero output when values are outside table boundary */\n    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))\n    {\n      return (0);\n    }\n\n    /* 20 bits for the fractional part */\n    /* xfract should be in 12.20 format */\n    xfract = (X & 0x000FFFFF);\n\n    /* Read two nearest output values from the index */\n    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];\n    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];\n\n    /* 20 bits for the fractional part */\n    /* yfract should be in 12.20 format */\n    yfract = (Y & 0x000FFFFF);\n\n    /* Read two nearest output values from the index */\n    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];\n    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];\n\n    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */\n\n    /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */\n    /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */\n    out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4U);\n    acc = ((q63_t) out * (0xFFFFF - yfract));\n\n    /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */\n    out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4U);\n    acc += ((q63_t) out * (xfract));\n\n    /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */\n    out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4U);\n    acc += ((q63_t) out * (yfract));\n\n    /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */\n    out = (q31_t) (((q63_t) y2 * (xfract)) >> 4U);\n    acc += ((q63_t) out * (yfract));\n\n    /* acc is in 13.51 format and down shift acc by 36 times */\n    /* Convert out to 1.15 format */\n    return ((q15_t)(acc >> 36));\n  }\n\n\n  /**\n  * @brief  Q7 bilinear interpolation.\n  * @param[in,out] S  points to an instance of the interpolation structure.\n  * @param[in]     X  interpolation coordinate in 12.20 format.\n  * @param[in]     Y  interpolation coordinate in 12.20 format.\n  * @return out interpolated value.\n  */\n  __STATIC_FORCEINLINE q7_t arm_bilinear_interp_q7(\n  arm_bilinear_interp_instance_q7 * S,\n  q31_t X,\n  q31_t Y)\n  {\n    q63_t acc = 0;                               /* output */\n    q31_t out;                                   /* Temporary output */\n    q31_t xfract, yfract;                        /* X, Y fractional parts */\n    q7_t x1, x2, y1, y2;                         /* Nearest output values */\n    int32_t rI, cI;                              /* Row and column indices */\n    q7_t *pYData = S->pData;                     /* pointer to output table values */\n    uint32_t nCols = S->numCols;                 /* num of rows */\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    rI = ((X & (q31_t)0xFFF00000) >> 20);\n\n    /* Input is in 12.20 format */\n    /* 12 bits for the table index */\n    /* Index value calculation */\n    cI = ((Y & (q31_t)0xFFF00000) >> 20);\n\n    /* Care taken for table outside boundary */\n    /* Returns zero output when values are outside table boundary */\n    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))\n    {\n      return (0);\n    }\n\n    /* 20 bits for the fractional part */\n    /* xfract should be in 12.20 format */\n    xfract = (X & (q31_t)0x000FFFFF);\n\n    /* Read two nearest output values from the index */\n    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];\n    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];\n\n    /* 20 bits for the fractional part */\n    /* yfract should be in 12.20 format */\n    yfract = (Y & (q31_t)0x000FFFFF);\n\n    /* Read two nearest output values from the index */\n    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];\n    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];\n\n    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */\n    out = ((x1 * (0xFFFFF - xfract)));\n    acc = (((q63_t) out * (0xFFFFF - yfract)));\n\n    /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */\n    out = ((x2 * (0xFFFFF - yfract)));\n    acc += (((q63_t) out * (xfract)));\n\n    /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */\n    out = ((y1 * (0xFFFFF - xfract)));\n    acc += (((q63_t) out * (yfract)));\n\n    /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */\n    out = ((y2 * (yfract)));\n    acc += (((q63_t) out * (xfract)));\n\n    /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */\n    return ((q7_t)(acc >> 40));\n  }\n\n  /**\n   * @} end of BilinearInterpolate group\n   */\n\n\n/* SMMLAR */\n#define multAcc_32x32_keep32_R(a, x, y) \\\n    a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)\n\n/* SMMLSR */\n#define multSub_32x32_keep32_R(a, x, y) \\\n    a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)\n\n/* SMMULR */\n#define mult_32x32_keep32_R(a, x, y) \\\n    a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)\n\n/* SMMLA */\n#define multAcc_32x32_keep32(a, x, y) \\\n    a += (q31_t) (((q63_t) x * y) >> 32)\n\n/* SMMLS */\n#define multSub_32x32_keep32(a, x, y) \\\n    a -= (q31_t) (((q63_t) x * y) >> 32)\n\n/* SMMUL */\n#define mult_32x32_keep32(a, x, y) \\\n    a = (q31_t) (((q63_t) x * y ) >> 32)\n\n\n#if   defined ( __CC_ARM )\n  /* Enter low optimization region - place directly above function definition */\n  #if defined( __ARM_ARCH_7EM__ )\n    #define LOW_OPTIMIZATION_ENTER \\\n       _Pragma (\"push\")         \\\n       _Pragma (\"O1\")\n  #else\n    #define LOW_OPTIMIZATION_ENTER\n  #endif\n\n  /* Exit low optimization region - place directly after end of function definition */\n  #if defined ( __ARM_ARCH_7EM__ )\n    #define LOW_OPTIMIZATION_EXIT \\\n       _Pragma (\"pop\")\n  #else\n    #define LOW_OPTIMIZATION_EXIT\n  #endif\n\n  /* Enter low optimization region - place directly above function definition */\n  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER\n\n  /* Exit low optimization region - place directly after end of function definition */\n  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT\n\n#elif defined (__ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )\n  #define LOW_OPTIMIZATION_ENTER\n  #define LOW_OPTIMIZATION_EXIT\n  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER\n  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT\n\n#elif defined ( __GNUC__ )\n  #define LOW_OPTIMIZATION_ENTER \\\n       __attribute__(( optimize(\"-O1\") ))\n  #define LOW_OPTIMIZATION_EXIT\n  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER\n  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT\n\n#elif defined ( __ICCARM__ )\n  /* Enter low optimization region - place directly above function definition */\n  #if defined ( __ARM_ARCH_7EM__ )\n    #define LOW_OPTIMIZATION_ENTER \\\n       _Pragma (\"optimize=low\")\n  #else\n    #define LOW_OPTIMIZATION_ENTER\n  #endif\n\n  /* Exit low optimization region - place directly after end of function definition */\n  #define LOW_OPTIMIZATION_EXIT\n\n  /* Enter low optimization region - place directly above function definition */\n  #if defined ( __ARM_ARCH_7EM__ )\n    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \\\n       _Pragma (\"optimize=low\")\n  #else\n    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER\n  #endif\n\n  /* Exit low optimization region - place directly after end of function definition */\n  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT\n\n#elif defined ( __TI_ARM__ )\n  #define LOW_OPTIMIZATION_ENTER\n  #define LOW_OPTIMIZATION_EXIT\n  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER\n  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT\n\n#elif defined ( __CSMC__ )\n  #define LOW_OPTIMIZATION_ENTER\n  #define LOW_OPTIMIZATION_EXIT\n  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER\n  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT\n\n#elif defined ( __TASKING__ )\n  #define LOW_OPTIMIZATION_ENTER\n  #define LOW_OPTIMIZATION_EXIT\n  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER\n  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT\n\n#endif\n\n\n#ifdef   __cplusplus\n}\n#endif\n\n/* Compiler specific diagnostic adjustment */\n#if   defined ( __CC_ARM )\n\n#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )\n\n#elif defined ( __GNUC__ )\n#pragma GCC diagnostic pop\n\n#elif defined ( __ICCARM__ )\n\n#elif defined ( __TI_ARM__ )\n\n#elif defined ( __CSMC__ )\n\n#elif defined ( __TASKING__ )\n\n#else\n  #error Unknown compiler\n#endif\n\n#endif /* _ARM_MATH_H */\n\n/**\n *\n * End of file.\n */\n"
  },
  {
    "path": "platform/cmsis/inc/best1000.h",
    "content": "/**************************************************************************//**\n * @file     best1000.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM4 Device Series\n * @version  V2.02\n * @date     10. September 2014\n *\n * @note     configured for CM4 with FPU\n *\n ******************************************************************************/\n/* Copyright (c) 2011 - 2014 ARM LIMITED\n\n   All rights reserved.\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions are met:\n   - Redistributions of source code must retain the above copyright\n     notice, this list of conditions and the following disclaimer.\n   - Redistributions in binary form must reproduce the above copyright\n     notice, this list of conditions and the following disclaimer in the\n     documentation and/or other materials provided with the distribution.\n   - Neither the name of ARM nor the names of its contributors may be used\n     to endorse or promote products derived from this software without\n     specific prior written permission.\n   *\n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n   POSSIBILITY OF SUCH DAMAGE.\n   ---------------------------------------------------------------------------*/\n\n\n#ifndef __BEST1000_H__\n#define __BEST1000_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M4 Processor Exceptions Numbers  ------------------- */\n  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt          */\n  HardFault_IRQn                = -13,      /*!<  3 HardFault Interrupt             */\n  MemoryManagement_IRQn         = -12,      /*!<  4 Memory Management Interrupt     */\n  BusFault_IRQn                 = -11,      /*!<  5 Bus Fault Interrupt             */\n  UsageFault_IRQn               = -10,      /*!<  6 Usage Fault Interrupt           */\n  SVCall_IRQn                   =  -5,      /*!< 11 SV Call Interrupt               */\n  DebugMonitor_IRQn             =  -4,      /*!< 12 Debug Monitor Interrupt         */\n  PendSV_IRQn                   =  -2,      /*!< 14 Pend SV Interrupt               */\n  SysTick_IRQn                  =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* ----------------------  BEST1000 Specific Interrupt Numbers  --------------------- */\n  FPU_IRQn                      =   0,      /*!< FPU Interrupt                      */\n  SDIO_IRQn                     =   1,      /*!< SDIO Interrupt                     */\n  SDMMC_IRQn                    =   2,      /*!< SDMMC Interrupt                    */\n  AUDMA_IRQn                    =   3,      /*!< Audio DMA Interrupt                */\n  GPDMA_IRQn                    =   4,      /*!< General Purpose DMA Interrupt      */\n  DPDRX_IRQn                    =   5,      /*!< DPD RX Interrupt                   */\n  DPDTX_IRQn                    =   6,      /*!< DPD TX Interrupt                   */\n  USB_IRQn                      =   7,      /*!< USB Interrupt                      */\n  WAKEUP_IRQn                   =   8,      /*!< Reserved Interrupt                 */\n  GPIO_IRQn                     =   9,      /*!< GPIO Interrupt                     */\n  WDT_IRQn                      =  10,      /*!< Watchdog Timer Interrupt           */\n  RTC_IRQn                      =  11,      /*!< RTC Interrupt                      */\n  TIMER00_IRQn                  =  12,      /*!< Timer00 Interrupt                  */\n  TIMER01_IRQn                  =  13,      /*!< Timer01 Interrupt                  */\n  I2C0_IRQn                     =  14,      /*!< I2C0 Interrupt                     */\n  SPI0_IRQn                     =  15,      /*!< SPI0 Interrupt                     */\n  SPILCD_IRQn                   =  16,      /*!< SPILCD Interrupt                   */\n  UART0_IRQn                    =  17,      /*!< UART0 Interrupt                    */\n  UART1_IRQn                    =  18,      /*!< UART1 Interrupt                    */\n  CODEC_IRQn                    =  19,      /*!< CODEC Interrupt                    */\n  BTPCM_IRQn                    =  20,      /*!< BTPCM Interrupt                    */\n  I2S0_IRQn                     =  21,      /*!< I2S0 Interrupt                     */\n  SPDIF_IRQn                    =  22,      /*!< SPDIF Interrupt                    */\n  ITNSPI_IRQn                   =  23,      /*!< Reserved Interrupt                 */\n  BT_IRQn                       =  24,      /*!< Reserved Interrupt                 */\n  GPADC_IRQn                    =  25,      /*!< Reserved Interrupt                 */\n  NONE4_IRQn                    =  26,      /*!< Reserved Interrupt                 */\n  USB_PIN_IRQn                  =  27,      /*!< Reserved Interrupt                 */\n  ISDONE_IRQn                   =  28,      /*!< Intersys MCU2BT Data Done Interrupt */\n  ISDONE1_IRQn                  =  29,      /*!< Intersys MCU2BT Data1 Done Interrupt */\n  ISDATA_IRQn                   =  30,      /*!< Intersys BT2MCU Data Indication Interrupt */\n  ISDATA1_IRQn                  =  31,      /*!< Intersys BT2MCU Data1 Indication Interrupt */\n  CHARGER_IRQn                  =  32,      /*!< Charger IRQ                        */\n  PWRKEY_IRQn                   =  33,      /*!< Power key IRQ                      */\n\n  USER_IRQn_QTY,\n  INVALID_IRQn                  = USER_IRQn_QTY,\n} IRQn_Type;\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of the Cortex-M4 Processor and Core Peripherals  ------- */\n#define __CM4_REV                 0x0001    /*!< Core revision r0p1                              */\n#define __MPU_PRESENT             1         /*!< MPU present or not                              */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3         /*!< Number of Bits used for Priority Levels         */\n#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used    */\n#define __FPU_PRESENT             1         /*!< FPU present                                     */\n#define __NUM_CODE_PATCH          32\n#define __NUM_LIT_PATCH           32\n\n#include \"core_cm4.h\"                       /* Processor and core peripherals                    */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/best1400.h",
    "content": "/**************************************************************************//**\n * @file     best1400.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM4 Device Series\n * @version  V2.02\n * @date     10. September 2014\n *\n * @note     configured for CM4 with FPU\n *\n ******************************************************************************/\n/* Copyright (c) 2011 - 2014 ARM LIMITED\n\n   All rights reserved.\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions are met:\n   - Redistributions of source code must retain the above copyright\n     notice, this list of conditions and the following disclaimer.\n   - Redistributions in binary form must reproduce the above copyright\n     notice, this list of conditions and the following disclaimer in the\n     documentation and/or other materials provided with the distribution.\n   - Neither the name of ARM nor the names of its contributors may be used\n     to endorse or promote products derived from this software without\n     specific prior written permission.\n   *\n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n   POSSIBILITY OF SUCH DAMAGE.\n   ---------------------------------------------------------------------------*/\n\n\n#ifndef __BEST1400_H__\n#define __BEST1400_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M4 Processor Exceptions Numbers  ------------------- */\n  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt          */\n  HardFault_IRQn                = -13,      /*!<  3 HardFault Interrupt             */\n  MemoryManagement_IRQn         = -12,      /*!<  4 Memory Management Interrupt     */\n  BusFault_IRQn                 = -11,      /*!<  5 Bus Fault Interrupt             */\n  UsageFault_IRQn               = -10,      /*!<  6 Usage Fault Interrupt           */\n  SVCall_IRQn                   =  -5,      /*!< 11 SV Call Interrupt               */\n  DebugMonitor_IRQn             =  -4,      /*!< 12 Debug Monitor Interrupt         */\n  PendSV_IRQn                   =  -2,      /*!< 14 Pend SV Interrupt               */\n  SysTick_IRQn                  =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* ----------------------  BEST1400 Specific Interrupt Numbers  --------------------- */\n  FPU_IRQn                      =   0,      /*!< FPU Interrupt                      */\n  RESERVED01_IRQn               =   1,      /*!< Reserved Interrupt                 */\n  RESERVED02_IRQn               =   2,      /*!< Reserved Interrupt                 */\n  RESERVED03_IRQn               =   3,      /*!< Reserved Interrupt                 */\n  AUDMA_IRQn                    =   4,      /*!< General Purpose DMA Interrupt      */\n  MCU_TIMER1_IRQ2n              =   5,      /*!< MCU Timer1 Interrupt1              */\n  MCU_TIMER1_IRQ1n              =   6,      /*!< MCU Timer1 Interrupt2              */\n  USB_IRQn                      =   7,      /*!< USB Interrupt                      */\n  WAKEUP_IRQn                   =   8,      /*!< Wakeup Interrupt                   */\n  GPIO_IRQn                     =   9,      /*!< GPIO Interrupt                     */\n  WDT_IRQn                      =  10,      /*!< Watchdog Timer Interrupt           */\n  RTC_IRQn                      =  11,      /*!< RTC Interrupt                      */\n  MCU_TIMER00_IRQn              =  12,      /*!< MCU Timer0 Interrupt               */\n  MCU_TIMER01_IRQn              =  13,      /*!< MCU Timer0 Interrupt               */\n  I2C0_IRQn                     =  14,      /*!< I2C0 Interrupt                     */\n  SPI0_IRQn                     =  15,      /*!< SPI0 Interrupt                     */\n  UART2_IRQn                    =  16,      /*!< Reserved Interrupt                 */\n  UART0_IRQn                    =  17,      /*!< UART0 Interrupt                    */\n  UART1_IRQn                    =  18,      /*!< UART1 Interrupt                    */\n  CODEC_IRQn                    =  19,      /*!< CODEC Interrupt                    */\n  PCM_IRQn                      =  20,      /*!< PCM Interrupt                      */\n  I2S0_IRQn                     =  21,      /*!< I2S0 Interrupt                     */\n  RESERVED22_IRQn               =  22,      /*!< SPDIF0 Interrupt                   */\n  SPI_ITN_IRQn                  =  23,      /*!< Internal SPI Interrupt             */\n  RESERVED24_IRQn               =  24,      /*!< Reserved Interrupt                 */\n  GPADC_IRQn                    =  25,      /*!< GPADC Interrupt                    */\n  RESERVED26_IRQn               =  26,      /*!< Reserved Interrupt                 */\n  USB_PIN_IRQn                  =  27,      /*!< PMU USB Interrupt                  */\n  RESERVED28_IRQn               =  28,      /*!< Reserved Interrupt                 */\n  RESERVED29_IRQn               =  29,      /*!< Reserved Interrupt                 */\n  USB_CALIB_IRQn                =  30,      /*!< USB CALIB Interrupt                */\n  USB_SOF_IRQn                  =  31,      /*!< USB SOF Interrupt                  */\n  CHARGER_IRQn                  =  32,      /*!< Charger Interrupt                  */\n  PWRKEY_IRQn                   =  33,      /*!< POWER KEY Interrupt                */\n  DUMP_IRQn                     =  34,      /*!< DUMP Interrupt                     */\n  BT2MCU_IRQn                   =  35,      /*!< BT2MCU Interrupt                   */\n  ISDONE_IRQn                   =  36,      /*!< MCU2BT Data0 Done Interrupt        */\n  ISDONE1_IRQn                  =  37,      /*!< MCU2BT Data1 Done Interrupt        */\n  ISDATA_IRQn                   =  38,      /*!< BT2MCU Data0 Ind Interrupt         */\n  ISDATA1_IRQn                  =  39,      /*!< BT2MCU Data1 Ind Interrupt         */\n  RESERVED40_IRQn               =  40,      /*!< Reserved Interrupt                 */\n  RESERVED41_IRQn               =  41,      /*!< Reserved Interrupt                 */\n  RESERVED42_IRQn               =  42,      /*!< Reserved Interrupt                 */\n  RESERVED43_IRQn               =  43,      /*!< Reserved Interrupt                 */\n  RESERVED44_IRQn               =  44,      /*!< Reserved Interrupt                 */\n  RESERVED45_IRQn               =  45,      /*!< Reserved Interrupt                 */\n  RESERVED46_IRQn               =  46,      /*!< Reserved Interrupt                 */\n  RESERVED47_IRQn               =  47,      /*!< Reserved Interrupt                 */\n  USER_IRQn_QTY,\n  INVALID_IRQn                  = USER_IRQn_QTY,\n} IRQn_Type;\n\n#define TIMER00_IRQn            MCU_TIMER00_IRQn\n#define TIMER01_IRQn            MCU_TIMER01_IRQn\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of the Cortex-M4 Processor and Core Peripherals  ------- */\n#define __CM4_REV                 0x0001    /*!< Core revision r0p1                              */\n#define __MPU_PRESENT             1         /*!< MPU present or not                              */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3         /*!< Number of Bits used for Priority Levels         */\n#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used    */\n#define __FPU_PRESENT             1         /*!< FPU present                                     */\n#define __NUM_CODE_PATCH          6\n#define __NUM_LIT_PATCH           2\n\n#include \"core_cm4.h\"                       /* Processor and core peripherals                    */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/best2000.h",
    "content": "/**************************************************************************//**\n * @file     best2000.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM4 Device Series\n * @version  V2.02\n * @date     10. September 2014\n *\n * @note     configured for CM4 with FPU\n *\n ******************************************************************************/\n/* Copyright (c) 2011 - 2014 ARM LIMITED\n\n   All rights reserved.\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions are met:\n   - Redistributions of source code must retain the above copyright\n     notice, this list of conditions and the following disclaimer.\n   - Redistributions in binary form must reproduce the above copyright\n     notice, this list of conditions and the following disclaimer in the\n     documentation and/or other materials provided with the distribution.\n   - Neither the name of ARM nor the names of its contributors may be used\n     to endorse or promote products derived from this software without\n     specific prior written permission.\n   *\n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n   POSSIBILITY OF SUCH DAMAGE.\n   ---------------------------------------------------------------------------*/\n\n\n#ifndef __BEST2000_H__\n#define __BEST2000_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M4 Processor Exceptions Numbers  ------------------- */\n  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt          */\n  HardFault_IRQn                = -13,      /*!<  3 HardFault Interrupt             */\n  MemoryManagement_IRQn         = -12,      /*!<  4 Memory Management Interrupt     */\n  BusFault_IRQn                 = -11,      /*!<  5 Bus Fault Interrupt             */\n  UsageFault_IRQn               = -10,      /*!<  6 Usage Fault Interrupt           */\n  SVCall_IRQn                   =  -5,      /*!< 11 SV Call Interrupt               */\n  DebugMonitor_IRQn             =  -4,      /*!< 12 Debug Monitor Interrupt         */\n  PendSV_IRQn                   =  -2,      /*!< 14 Pend SV Interrupt               */\n  SysTick_IRQn                  =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* ----------------------  BEST1000 Specific Interrupt Numbers  --------------------- */\n  FPU_IRQn                      =   0,      /*!< FPU Interrupt                      */\n  SDIO_IRQn                     =   1,      /*!< SDIO Interrupt                     */\n  SDMMC_IRQn                    =   2,      /*!< SDMMC Interrupt                    */\n  AUDMA_IRQn                    =   3,      /*!< Audio DMA Interrupt                */\n  GPDMA_IRQn                    =   4,      /*!< General Purpose DMA Interrupt      */\n  RESERVED5_IRQn                =   5,      /*!< Reserved Interrupt                 */\n  RESERVED6_IRQn                =   6,      /*!< Reserved Interrupt                 */\n  USB_IRQn                      =   7,      /*!< USB Interrupt                      */\n  WAKEUP_IRQn                   =   8,      /*!< Wakeup Interrupt                   */\n  GPIO_IRQn                     =   9,      /*!< GPIO Interrupt                     */\n  MCU_WDT_IRQn                  =  10,      /*!< Watchdog Timer Interrupt           */\n  RTC_IRQn                      =  11,      /*!< RTC Interrupt                      */\n  TIMER00_IRQn                  =  12,      /*!< Timer00 Interrupt                  */\n  TIMER01_IRQn                  =  13,      /*!< Timer01 Interrupt                  */\n  I2C0_IRQn                     =  14,      /*!< I2C0 Interrupt                     */\n  SPI0_IRQn                     =  15,      /*!< SPI0 Interrupt                     */\n  SPILCD_IRQn                   =  16,      /*!< SPILCD Interrupt                   */\n  UART0_IRQn                    =  17,      /*!< UART0 Interrupt                    */\n  UART1_IRQn                    =  18,      /*!< UART1 Interrupt                    */\n  CODEC_IRQn                    =  19,      /*!< CODEC Interrupt                    */\n  BTPCM_IRQn                    =  20,      /*!< BTPCM Interrupt                    */\n  I2S0_IRQn                     =  21,      /*!< I2S0 Interrupt                     */\n  SPDIF0_IRQn                   =  22,      /*!< SPDIF0 Interrupt                   */\n  ITNSPI_IRQn                   =  23,      /*!< Internal SPI Interrupt             */\n  BT_IRQn                       =  24,      /*!< BT to MCU Interrupt                */\n  GPADC_IRQn                    =  25,      /*!< GPADC Interrupt                    */\n  UART2_IRQn                    =  26,      /*!< UART2 Interrupt                    */\n  SPDIF1_IRQn                   =  27,      /*!< SPDIF1 Interrupt                   */\n  CAM_IRQn                      =  28,      /*!< CAM Interrupt                      */\n  DSDIF_IRQn                    =  29,      /*!< DSDIF Interrupt                    */\n  GPIOAUX_IRQn                  =  30,      /*!< GPIO AUX Interrupt                 */\n  RESERVED31_IRQn               =  31,      /*!< Reserved Interrupt                 */\n  ISDONE_IRQn                   =  32,      /*!< Intersys MCU2BT Data Done Interrupt */\n  ISDONE1_IRQn                  =  33,      /*!< Intersys MCU2BT Data1 Done Interrupt */\n  ISDATA_IRQn                   =  34,      /*!< Intersys BT2MCU Data Indication Interrupt */\n  ISDATA1_IRQn                  =  35,      /*!< Intersys BT2MCU Data1 Indication Interrupt */\n  WIFI_IRQn                     =  36,      /*!< WIFI to MCU Interrupt              */\n  TRANSQW_LCL_IRQn              =  37,      /*!< TRANSQ-WIFI Local Interrupt        */\n  TRANSQW_RMT_IRQn              =  38,      /*!< TRANSQ-WIFI Peer Remote Interrupt  */\n  RESERVED39_IRQn               =  39,      /*!< Reserved Interrupt                 */\n  RESERVED40_IRQn               =  40,      /*!< Reserved Interrupt                 */\n  USB_PIN_IRQn                  =  41,      /*!< USB Pin Interrupt                  */\n  CHARGER_IRQn                  =  42,      /*!< Charger Interrupt                  */\n  PWRKEY_IRQn                   =  43,      /*!< Power key Interrupt                */\n  AON_IRQn                      =  44,      /*!< AON Interrupt                      */\n  RESERVED45_IRQn               =  45,      /*!< Reserved Interrupt                 */\n\n  USER_IRQn_QTY,\n  INVALID_IRQn                  = USER_IRQn_QTY,\n} IRQn_Type;\n\n#define WDT_IRQn                AON_IRQn\n\n#define TRANSQ0_RMT_IRQn        TRANSQW_RMT_IRQn\n#define TRANSQ0_LCL_IRQn        TRANSQW_LCL_IRQn\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of the Cortex-M4 Processor and Core Peripherals  ------- */\n#define __CM4_REV                 0x0001    /*!< Core revision r0p1                              */\n#define __MPU_PRESENT             1         /*!< MPU present or not                              */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3         /*!< Number of Bits used for Priority Levels         */\n#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used    */\n#define __FPU_PRESENT             1         /*!< FPU present                                     */\n#define __NUM_CODE_PATCH          32\n#define __NUM_LIT_PATCH           32\n\n#include \"core_cm4.h\"                       /* Processor and core peripherals                    */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/best2001.h",
    "content": "/**************************************************************************//**\n * @file     best2001.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM4 Device Series\n * @version  V2.02\n * @date     10. September 2014\n *\n * @note     configured for CM4 with FPU\n *\n ******************************************************************************/\n/* Copyright (c) 2011 - 2014 ARM LIMITED\n\n   All rights reserved.\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions are met:\n   - Redistributions of source code must retain the above copyright\n     notice, this list of conditions and the following disclaimer.\n   - Redistributions in binary form must reproduce the above copyright\n     notice, this list of conditions and the following disclaimer in the\n     documentation and/or other materials provided with the distribution.\n   - Neither the name of ARM nor the names of its contributors may be used\n     to endorse or promote products derived from this software without\n     specific prior written permission.\n   *\n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n   POSSIBILITY OF SUCH DAMAGE.\n   ---------------------------------------------------------------------------*/\n\n\n#ifndef __BEST2001_H__\n#define __BEST2001_H__\n\n#ifdef CHIP_BEST2001_DSP\n\n#include \"ca/best2001_dsp.h\"\n\n#else\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M33 Processor Exceptions Numbers  ------------------ */\n    NonMaskableInt_IRQn         = -14,      /*!<  2 Non Maskable Interrupt          */\n    HardFault_IRQn              = -13,      /*!<  3 HardFault Interrupt             */\n    MemoryManagement_IRQn       = -12,      /*!<  4 Memory Management Interrupt     */\n    BusFault_IRQn               = -11,      /*!<  5 Bus Fault Interrupt             */\n    UsageFault_IRQn             = -10,      /*!<  6 Usage Fault Interrupt           */\n    SVCall_IRQn                 =  -5,      /*!< 11 SV Call Interrupt               */\n    DebugMonitor_IRQn           =  -4,      /*!< 12 Debug Monitor Interrupt         */\n    PendSV_IRQn                 =  -2,      /*!< 14 Pend SV Interrupt               */\n    SysTick_IRQn                =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* ----------------------  Chip Specific Interrupt Numbers  ----------------------- */\n    FPU_IRQn                    =   0,      /*!< FPU Interrupt                      */\n    WAKEUP_IRQn                 =   1,      /*!< Wakeup Interrupt                   */\n    CODEC_IRQn                  =   2,      /*!< CODEC Interrupt                    */\n    CODEC_TX_PEAK_IRQn          =   3,      /*!< CODEC TX PEAK Interrupt            */\n    SDMMC_IRQn                  =   4,      /*!< SDMMC Interrupt                    */\n    BES2001_AUDMA_IRQn          =   5,      /*!< Audio DMA Interrupt                */\n    BES2001_GPDMA_IRQn          =   6,      /*!< General Purpose DMA Interrupt      */\n    USB_IRQn                    =   7,      /*!< USB Interrupt                      */\n    USB_PHY_IRQn                =   8,      /*!< USB PHY Interrupt                  */\n    USB_CAL_IRQn                =   9,      /*!< USB Calibration Interrupt          */\n    USB_PIN_IRQn                =  10,      /*!< USB Pin Interrupt                  */\n    SEC_ENG_IRQn                =  11,      /*!< Security Engine Interrupt          */\n    SEDMA_IRQn                  =  12,      /*!< Security Engine DMA Interrupt      */\n    DUMP_IRQn                   =  13,      /*!< DUMP Interrupt                     */\n    MCU_WDT_IRQn                =  14,      /*!< Watchdog Timer Interrupt           */\n    MCU_TIMER00_IRQn            =  15,      /*!< Timer00 Interrupt                  */\n    MCU_TIMER01_IRQn            =  16,      /*!< Timer01 Interrupt                  */\n    MCU_TIMER10_IRQn            =  17,      /*!< Timer10 Interrupt                  */\n    MCU_TIMER11_IRQn            =  18,      /*!< Timer11 Interrupt                  */\n    MCU_TIMER20_IRQn            =  19,      /*!< Timer20 Interrupt                  */\n    MCU_TIMER21_IRQn            =  20,      /*!< Timer21 Interrupt                  */\n    I2C0_IRQn                   =  21,      /*!< I2C0 Interrupt                     */\n    I2C1_IRQn                   =  22,      /*!< I2C1 Interrupt                     */\n    SPI0_IRQn                   =  23,      /*!< SPI0 Interrupt                     */\n    SPILCD_IRQn                 =  24,      /*!< SPILCD Interrupt                   */\n    ITNSPI_IRQn                 =  25,      /*!< Internal SPI Interrupt             */\n    SPIPHY_IRQn                 =  26,      /*!< SPIPHY Interrupt                   */\n    UART0_IRQn                  =  27,      /*!< UART0 Interrupt                    */\n    UART1_IRQn                  =  28,      /*!< UART1 Interrupt                    */\n    UART2_IRQn                  =  29,      /*!< UART2 Interrupt                    */\n    BTPCM_IRQn                  =  30,      /*!< BTPCM Interrupt                    */\n    I2S0_IRQn                   =  31,      /*!< I2S0 Interrupt                     */\n    SPDIF0_IRQn                 =  32,      /*!< SPDIF0 Interrupt                   */\n    TRNG_IRQn                   =  33,      /*!< TRNG Interrupt                     */\n    AON_GPIO_IRQn               =  34,      /*!< AON GPIO Interrupt                 */\n    AON_GPIOAUX_IRQn            =  35,      /*!< AON GPIOAUX Interrupt              */\n    AON_WDT_IRQn                =  36,      /*!< AON Watchdog Timer Interrupt       */\n    AON_TIMER00_IRQn            =  37,      /*!< AON Timer00 Interrupt              */\n    AON_TIMER01_IRQn            =  38,      /*!< AON Timer01 Interrupt              */\n    MCU2CP_DONE_IRQn            =  39,      /*!< Intersys MCU2CP Data Done Interrupt */\n    MCU2CP_DONE1_IRQn           =  40,      /*!< Intersys MCU2CP Data Done Interrupt */\n    MCU2CP_DONE2_IRQn           =  41,      /*!< Intersys MCU2CP Data Done Interrupt */\n    MCU2CP_DONE3_IRQn           =  42,      /*!< Intersys MCU2CP Data Done Interrupt */\n    CP2MCU_DATA_IRQn            =  43,      /*!< Intersys CP2MCU Data Indication Interrupt */\n    CP2MCU_DATA1_IRQn           =  44,      /*!< Intersys CP2MCU Data1 Indication Interrupt */\n    CP2MCU_DATA2_IRQn           =  45,      /*!< Intersys CP2MCU Data Indication Interrupt */\n    CP2MCU_DATA3_IRQn           =  46,      /*!< Intersys CP2MCU Data1 Indication Interrupt */\n    TRANSQD_LCL_IRQn            =  47,      /*!< TRANSQ-DSP Local Interrupt         */\n    TRANSQD_RMT_IRQn            =  48,      /*!< TRANSQ-DSP Peer Remote Interrupt   */\n    DSP_IRQn                    =  49,      /*!< DSP to MCU Interrupt               */\n    TRANSQW_LCL_IRQn            =  50,      /*!< TRANSQ-WIFI Local Interrupt        */\n    TRANSQW_RMT_IRQn            =  51,      /*!< TRANSQ-WIFI Peer Remote Interrupt  */\n    WIFI_IRQn                   =  52,      /*!< DSP to MCU Interrupt               */\n    ISDONE_IRQn                 =  53,      /*!< Intersys MCU2BT Data Done Interrupt */\n    ISDONE1_IRQn                =  54,      /*!< Intersys MCU2BT Data1 Done Interrupt */\n    ISDATA_IRQn                 =  55,      /*!< Intersys BT2MCU Data Indication Interrupt */\n    ISDATA1_IRQn                =  56,      /*!< Intersys BT2MCU Data1 Indication Interrupt */\n    BT_IRQn                     =  57,      /*!< BT to MCU Interrupt                */\n    RESERVED58_IRQn             =  58,      /*!< Reserved Interrupt                 */\n    RTC_IRQn                    =  59,      /*!< RTC Interrupt                      */\n    GPADC_IRQn                  =  60,      /*!< GPADC Interrupt                    */\n    CHARGER_IRQn                =  61,      /*!< Charger Interrupt                  */\n    PWRKEY_IRQn                 =  62,      /*!< Power key Interrupt                */\n    WIFIDUMP_IRQn               =  63,      /*!< WIFIDUMP Interrupt                 */\n    CHKSUM_IRQn                 =  64,      /*!< Checksum Interrupt                 */\n    CRC_IRQn                    =  65,      /*!< CRC Interrupt                      */\n    CP_DSLP_IRQn                =  66,      /*!< CP Deep Sleep Interrupt            */\n    AON_SPIDPD_IRQn             =  67,      /*!< AON SPIDPD Interrupt               */\n    TRUSTZONE_IRQn              =  68,      /*!< TrustZone Interrupt                */\n\n    USER_IRQn_QTY,\n    INVALID_IRQn                = USER_IRQn_QTY,\n} IRQn_Type;\n\n#ifndef DSP_USE_AUDMA\n#define AUDMA_IRQn              BES2001_AUDMA_IRQn\n#define GPDMA_IRQn              BES2001_GPDMA_IRQn\n#else\n#define AUDMA_IRQn              BES2001_GPDMA_IRQn //MCU use GPDMA\n#endif\n\n#define GPIO_IRQn               AON_GPIO_IRQn\n#define GPIOAUX_IRQn            AON_GPIOAUX_IRQn\n#define TIMER00_IRQn            MCU_TIMER00_IRQn\n#define TIMER01_IRQn            MCU_TIMER01_IRQn\n#define WDT_IRQn                AON_WDT_IRQn\n\n#define TRANSQ0_RMT_IRQn        TRANSQW_RMT_IRQn\n#define TRANSQ0_LCL_IRQn        TRANSQW_LCL_IRQn\n#define TRANSQ1_RMT_IRQn        TRANSQD_RMT_IRQn\n#define TRANSQ1_LCL_IRQn        TRANSQD_LCL_IRQn\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of Core Peripherals  ----------------------------------- */\n#define __CM33_REV                0x0000U   /* Core revision r0p1 */\n#define __SAUREGION_PRESENT       0U        /* SAU regions present */\n#define __MPU_PRESENT             1U        /* MPU present */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3U        /* Number of Bits used for Priority Levels */\n#define __Vendor_SysTickConfig    0U        /* Set to 1 if different SysTick Config is used */\n#define __FPU_PRESENT             1U        /* FPU present */\n#define __DSP_PRESENT             1U        /* DSP extension present */\n\n#include \"core_cm33.h\"                      /* Processor and core peripherals */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/best2300.h",
    "content": "/**************************************************************************//**\n * @file     best2300.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM4 Device Series\n * @version  V2.02\n * @date     10. September 2014\n *\n * @note     configured for CM4 with FPU\n *\n ******************************************************************************/\n/* Copyright (c) 2011 - 2014 ARM LIMITED\n\n   All rights reserved.\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions are met:\n   - Redistributions of source code must retain the above copyright\n     notice, this list of conditions and the following disclaimer.\n   - Redistributions in binary form must reproduce the above copyright\n     notice, this list of conditions and the following disclaimer in the\n     documentation and/or other materials provided with the distribution.\n   - Neither the name of ARM nor the names of its contributors may be used\n     to endorse or promote products derived from this software without\n     specific prior written permission.\n   *\n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n   POSSIBILITY OF SUCH DAMAGE.\n   ---------------------------------------------------------------------------*/\n\n\n#ifndef __BEST2300_H__\n#define __BEST2300_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M4 Processor Exceptions Numbers  ------------------- */\n  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt          */\n  HardFault_IRQn                = -13,      /*!<  3 HardFault Interrupt             */\n  MemoryManagement_IRQn         = -12,      /*!<  4 Memory Management Interrupt     */\n  BusFault_IRQn                 = -11,      /*!<  5 Bus Fault Interrupt             */\n  UsageFault_IRQn               = -10,      /*!<  6 Usage Fault Interrupt           */\n  SVCall_IRQn                   =  -5,      /*!< 11 SV Call Interrupt               */\n  DebugMonitor_IRQn             =  -4,      /*!< 12 Debug Monitor Interrupt         */\n  PendSV_IRQn                   =  -2,      /*!< 14 Pend SV Interrupt               */\n  SysTick_IRQn                  =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* ----------------------  BEST1000 Specific Interrupt Numbers  --------------------- */\n  FPU_IRQn                      =   0,      /*!< FPU Interrupt                      */\n  SENSOR_WKUP_IRQn              =   1,      /*!< SENSOR Wakeup Interrupt            */\n  SDMMC_IRQn                    =   2,      /*!< SDMMC Interrupt                    */\n  AUDMA_IRQn                    =   3,      /*!< Audio DMA Interrupt                */\n  GPDMA_IRQn                    =   4,      /*!< General Purpose DMA Interrupt      */\n  AON_WDT_IRQn                  =   5,      /*!< AON Watchdog Timer Interrupt       */\n  USB_PHY_IRQn                  =   6,      /*!< USB PHY Interrupt                  */\n  USB_IRQn                      =   7,      /*!< USB Interrupt                      */\n  WAKEUP_IRQn                   =   8,      /*!< Wakeup Interrupt                   */\n  AON_GPIO_IRQn                 =   9,      /*!< AON GPIO Interrupt                 */\n  MCU_WDT_IRQn                  =  10,      /*!< Watchdog Timer Interrupt           */\n  RESERVED11_IRQn               =  11,      /*!< Reserved Interrupt                 */\n  MCU_TIMER00_IRQn              =  12,      /*!< Timer00 Interrupt                  */\n  MCU_TIMER01_IRQn              =  13,      /*!< Timer01 Interrupt                  */\n  I2C0_IRQn                     =  14,      /*!< I2C0 Interrupt                     */\n  SPI0_IRQn                     =  15,      /*!< SPI0 Interrupt                     */\n  SPILCD_IRQn                   =  16,      /*!< SPILCD Interrupt                   */\n  UART0_IRQn                    =  17,      /*!< UART0 Interrupt                    */\n  UART1_IRQn                    =  18,      /*!< UART1 Interrupt                    */\n  CODEC_IRQn                    =  19,      /*!< CODEC Interrupt                    */\n  BTPCM_IRQn                    =  20,      /*!< BTPCM Interrupt                    */\n  I2S0_IRQn                     =  21,      /*!< I2S0 Interrupt                     */\n  SPDIF0_IRQn                   =  22,      /*!< SPDIF0 Interrupt                   */\n  ITNSPI_IRQn                   =  23,      /*!< Internal SPI Interrupt             */\n  BT_IRQn                       =  24,      /*!< BT to MCU Interrupt                */\n  RESERVED25_IRQn               =  25,      /*!< Reserved Interrupt                 */\n  UART2_IRQn                    =  26,      /*!< UART2 Interrupt                    */\n  MCU_TIMER10_IRQn              =  27,      /*!< Timer10 Interrupt                  */\n  MCU_TIMER11_IRQn              =  28,      /*!< Timer11 Interrupt                  */\n  I2C1_IRQn                     =  29,      /*!< I2C1 Interrupt                     */\n  DUMP_IRQn                     =  30,      /*!< DUMP Interrupt                     */\n  SPIPHY_IRQn                   =  31,      /*!< SPIPHY Interrupt                   */\n  ISDONE_IRQn                   =  32,      /*!< Intersys MCU2BT Data Done Interrupt */\n  ISDONE1_IRQn                  =  33,      /*!< Intersys MCU2BT Data1 Done Interrupt */\n  ISDATA_IRQn                   =  34,      /*!< Intersys BT2MCU Data Indication Interrupt */\n  ISDATA1_IRQn                  =  35,      /*!< Intersys BT2MCU Data1 Indication Interrupt */\n  SENSOR0_IRQn                  =  36,      /*!< SENSOR0 Interrupt                  */\n  SENSOR1_IRQn                  =  37,      /*!< SENSOR1 Interrupt                  */\n  SENSOR2_IRQn                  =  38,      /*!< SENSOR2 Interrupt                  */\n  SENSOR3_IRQn                  =  39,      /*!< SENSOR3 Interrupt                  */\n  USB_CAL_IRQn                  =  40,      /*!< USB Calibration Interrupt          */\n  USB_PIN_IRQn                  =  41,      /*!< USB Pin Interrupt                  */\n  PMU_IRQn                      =  42,      /*!< PMU Interrupt                      */\n  RESERVED43_IRQn               =  43,      /*!< Reserved Interrupt                 */\n  AON_IRQn                      =  44,      /*!< AON Interrupt                      */\n  AON_TIMER00_IRQn              =  45,      /*!< AON Timer00 Interrupt              */\n  AON_TIMER01_IRQn              =  46,      /*!< AON Timer01 Interrupt              */\n  RESERVED47_IRQn               =  47,      /*!< Reserved Interrupt                 */\n\n  USER_IRQn_QTY,\n  INVALID_IRQn                  = USER_IRQn_QTY,\n} IRQn_Type;\n\n#define GPIO_IRQn               AON_GPIO_IRQn\n#define GPADC_IRQn              INVALID_IRQn\n#define PWRKEY_IRQn             INVALID_IRQn\n#ifdef MCU_SLEEP_POWER_DOWN\n#define TIMER00_IRQn            AON_TIMER00_IRQn\n#define TIMER01_IRQn            AON_TIMER01_IRQn\n#else\n#define TIMER00_IRQn            MCU_TIMER00_IRQn\n#define TIMER01_IRQn            MCU_TIMER01_IRQn\n#endif\n#define WDT_IRQn                AON_WDT_IRQn\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of the Cortex-M4 Processor and Core Peripherals  ------- */\n#define __CM4_REV                 0x0001    /*!< Core revision r0p1                              */\n#define __MPU_PRESENT             1         /*!< MPU present or not                              */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3         /*!< Number of Bits used for Priority Levels         */\n#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used    */\n#define __FPU_PRESENT             1         /*!< FPU present                                     */\n#define __NUM_CODE_PATCH          56\n#define __NUM_LIT_PATCH           8\n\n#include \"core_cm4.h\"                       /* Processor and core peripherals                    */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/best2300a.h",
    "content": "/**************************************************************************//**\n * @file     best2300a.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM4 Device Series\n * @version  V2.02\n * @date     10. September 2014\n *\n * @note     configured for CM4 with FPU\n *\n ******************************************************************************/\n/* Copyright (c) 2011 - 2014 ARM LIMITED\n\n   All rights reserved.\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions are met:\n   - Redistributions of source code must retain the above copyright\n     notice, this list of conditions and the following disclaimer.\n   - Redistributions in binary form must reproduce the above copyright\n     notice, this list of conditions and the following disclaimer in the\n     documentation and/or other materials provided with the distribution.\n   - Neither the name of ARM nor the names of its contributors may be used\n     to endorse or promote products derived from this software without\n     specific prior written permission.\n   *\n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n   POSSIBILITY OF SUCH DAMAGE.\n   ---------------------------------------------------------------------------*/\n\n\n#ifndef __BEST2300A_H__\n#define __BEST2300A_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M33 Processor Exceptions Numbers  ------------------ */\n    NonMaskableInt_IRQn         = -14,      /*!<  2 Non Maskable Interrupt          */\n    HardFault_IRQn              = -13,      /*!<  3 HardFault Interrupt             */\n    MemoryManagement_IRQn       = -12,      /*!<  4 Memory Management Interrupt     */\n    BusFault_IRQn               = -11,      /*!<  5 Bus Fault Interrupt             */\n    UsageFault_IRQn             = -10,      /*!<  6 Usage Fault Interrupt           */\n    SVCall_IRQn                 =  -5,      /*!< 11 SV Call Interrupt               */\n    DebugMonitor_IRQn           =  -4,      /*!< 12 Debug Monitor Interrupt         */\n    PendSV_IRQn                 =  -2,      /*!< 14 Pend SV Interrupt               */\n    SysTick_IRQn                =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* --------------------  BEST2300A Specific Interrupt Numbers  -------------------- */\n    FPU_IRQn                    =   0,      /*!< FPU Interrupt                      */\n    SENSOR_WKUP_IRQn            =   1,      /*!< SENSOR Wakeup Interrupt            */\n    SDMMC_IRQn                  =   2,      /*!< SDMMC Interrupt                    */\n    AUDMA_IRQn                  =   3,      /*!< Audio DMA Interrupt                */\n    GPDMA_IRQn                  =   4,      /*!< General Purpose DMA Interrupt      */\n    AON_WDT_IRQn                =   5,      /*!< AON Watchdog Timer Interrupt       */\n    USB_PHY_IRQn                =   6,      /*!< USB PHY Interrupt                  */\n    USB_IRQn                    =   7,      /*!< USB Interrupt                      */\n    WAKEUP_IRQn                 =   8,      /*!< Wakeup Interrupt                   */\n    AON_GPIO_IRQn               =   9,      /*!< AON GPIO Interrupt                 */\n    MCU_WDT_IRQn                =  10,      /*!< Watchdog Timer Interrupt           */\n    SENSOR_ENG_IRQn             =  11,      /*!< Sensor Engine Interrupt            */\n    MCU_TIMER00_IRQn            =  12,      /*!< Timer00 Interrupt                  */\n    MCU_TIMER01_IRQn            =  13,      /*!< Timer01 Interrupt                  */\n    I2C0_IRQn                   =  14,      /*!< I2C0 Interrupt                     */\n    SPI0_IRQn                   =  15,      /*!< SPI0 Interrupt                     */\n    SPILCD_IRQn                 =  16,      /*!< SPILCD Interrupt                   */\n    UART0_IRQn                  =  17,      /*!< UART0 Interrupt                    */\n    UART1_IRQn                  =  18,      /*!< UART1 Interrupt                    */\n    CODEC_IRQn                  =  19,      /*!< CODEC Interrupt                    */\n    BTPCM_IRQn                  =  20,      /*!< BTPCM Interrupt                    */\n    I2S0_IRQn                   =  21,      /*!< I2S0 Interrupt                     */\n    SPDIF0_IRQn                 =  22,      /*!< SPDIF0 Interrupt                   */\n    I2S1_IRQn                   =  23,      /*!< I2S1 Interrupt                     */\n    BT_IRQn                     =  24,      /*!< BT to MCU Interrupt                */\n    CODEC_TX_PEAK_IRQn          =  25,      /*!< CODEC TX PEAK Interrupt            */\n    UART2_IRQn                  =  26,      /*!< UART2 Interrupt                    */\n    MCU_TIMER10_IRQn            =  27,      /*!< Timer10 Interrupt                  */\n    MCU_TIMER11_IRQn            =  28,      /*!< Timer11 Interrupt                  */\n    I2C1_IRQn                   =  29,      /*!< I2C1 Interrupt                     */\n    DUMP_IRQn                   =  30,      /*!< DUMP Interrupt                     */\n    SPIPHY_IRQn                 =  31,      /*!< SPIPHY Interrupt                   */\n    ISDONE_IRQn                 =  32,      /*!< Intersys MCU2BT Data Done Interrupt */\n    ISDONE1_IRQn                =  33,      /*!< Intersys MCU2BT Data1 Done Interrupt */\n    ISDATA_IRQn                 =  34,      /*!< Intersys BT2MCU Data Indication Interrupt */\n    ISDATA1_IRQn                =  35,      /*!< Intersys BT2MCU Data1 Indication Interrupt */\n    CP2MCU_DATA_IRQn            =  36,      /*!< Intersys CP2MCU Data Indication Interrupt */\n    CP2MCU_DATA1_IRQn           =  37,      /*!< Intersys CP2MCU Data1 Indication Interrupt */\n    CP2MCU_DATA2_IRQn           =  38,      /*!< Intersys CP2MCU Data Indication Interrupt */\n    CP2MCU_DATA3_IRQn           =  39,      /*!< Intersys CP2MCU Data1 Indication Interrupt */\n    USB_CAL_IRQn                =  40,      /*!< USB Calibration Interrupt          */\n    USB_PIN_IRQn                =  41,      /*!< USB Pin Interrupt                  */\n    PMU_IRQn                    =  42,      /*!< PMU Interrupt                      */\n    SEC_ENG_IRQn                =  43,      /*!< Security Engine Interrupt          */\n    AON_IRQn                    =  44,      /*!< AON Interrupt                      */\n    AON_TIMER00_IRQn            =  45,      /*!< AON Timer00 Interrupt              */\n    AON_TIMER01_IRQn            =  46,      /*!< AON Timer01 Interrupt              */\n    SEDMA_IRQn                  =  47,      /*!< Security Engine DMA Interrupt      */\n    MCU2CP_DONE_IRQn            =  48,      /*!< Intersys MCU2CP Data Done Interrupt */\n    MCU2CP_DONE1_IRQn           =  49,      /*!< Intersys MCU2CP Data Done Interrupt */\n    MCU2CP_DONE2_IRQn           =  50,      /*!< Intersys MCU2CP Data Done Interrupt */\n    MCU2CP_DONE3_IRQn           =  51,      /*!< Intersys MCU2CP Data Done Interrupt */\n    TRNG_IRQn                   =  52,      /*!< TRNG Interrupt                     */\n    BT_STAMP_IRQn               =  53,      /*!< BT Playtime Stamp Interrupt        */\n    I2S_HS_SLAVE_IRQn           =  54,      /*!< I2S HS Slave Interrupt             */\n    PWRKEY_IRQn                 =  55,      /*!< Power Key Interrupt                */\n    ITNPMU_IRQn                 =  56,      /*!< Internal PMU Interrupt             */\n    I2C2_IRQn                   =  57,      /*!< I2C2 Interrupt                     */\n\n    USER_IRQn_QTY,\n    INVALID_IRQn                = USER_IRQn_QTY,\n} IRQn_Type;\n\n#define GPIO_IRQn               AON_GPIO_IRQn\n#define GPADC_IRQn              INVALID_IRQn\n#define PWRKEY_IRQn             INVALID_IRQn\n#ifdef CORE_SLEEP_POWER_DOWN\n#define TIMER00_IRQn            AON_TIMER00_IRQn\n#define TIMER01_IRQn            AON_TIMER01_IRQn\n#else\n#define TIMER00_IRQn            MCU_TIMER00_IRQn\n#define TIMER01_IRQn            MCU_TIMER01_IRQn\n#endif\n#define WDT_IRQn                AON_WDT_IRQn\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of Core Peripherals  ----------------------------------- */\n#define __CM33_REV                0x0000U   /* Core revision r0p1 */\n#define __SAUREGION_PRESENT       0U        /* SAU regions present */\n#define __MPU_PRESENT             1U        /* MPU present */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3U        /* Number of Bits used for Priority Levels */\n#define __Vendor_SysTickConfig    0U        /* Set to 1 if different SysTick Config is used */\n#define __FPU_PRESENT             1U        /* FPU present */\n#define __DSP_PRESENT             1U        /* DSP extension present */\n\n#include \"core_cm33.h\"                      /* Processor and core peripherals */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/best2300p.h",
    "content": "/**************************************************************************//**\n * @file     best2300p.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM4 Device Series\n * @version  V2.02\n * @date     10. September 2014\n *\n * @note     configured for CM4 with FPU\n *\n ******************************************************************************/\n/* Copyright (c) 2011 - 2014 ARM LIMITED\n\n   All rights reserved.\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions are met:\n   - Redistributions of source code must retain the above copyright\n     notice, this list of conditions and the following disclaimer.\n   - Redistributions in binary form must reproduce the above copyright\n     notice, this list of conditions and the following disclaimer in the\n     documentation and/or other materials provided with the distribution.\n   - Neither the name of ARM nor the names of its contributors may be used\n     to endorse or promote products derived from this software without\n     specific prior written permission.\n   *\n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n   POSSIBILITY OF SUCH DAMAGE.\n   ---------------------------------------------------------------------------*/\n\n\n#ifndef __BEST2300P_H__\n#define __BEST2300P_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M4 Processor Exceptions Numbers  ------------------- */\n  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt          */\n  HardFault_IRQn                = -13,      /*!<  3 HardFault Interrupt             */\n  MemoryManagement_IRQn         = -12,      /*!<  4 Memory Management Interrupt     */\n  BusFault_IRQn                 = -11,      /*!<  5 Bus Fault Interrupt             */\n  UsageFault_IRQn               = -10,      /*!<  6 Usage Fault Interrupt           */\n  SVCall_IRQn                   =  -5,      /*!< 11 SV Call Interrupt               */\n  DebugMonitor_IRQn             =  -4,      /*!< 12 Debug Monitor Interrupt         */\n  PendSV_IRQn                   =  -2,      /*!< 14 Pend SV Interrupt               */\n  SysTick_IRQn                  =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* ----------------------  BEST1000 Specific Interrupt Numbers  --------------------- */\n  FPU_IRQn                      =   0,      /*!< FPU Interrupt                      */\n  SENSOR_WKUP_IRQn              =   1,      /*!< SENSOR Wakeup Interrupt            */\n  SDMMC_IRQn                    =   2,      /*!< SDMMC Interrupt                    */\n  AUDMA_IRQn                    =   3,      /*!< Audio DMA Interrupt                */\n  GPDMA_IRQn                    =   4,      /*!< General Purpose DMA Interrupt      */\n  AON_WDT_IRQn                  =   5,      /*!< AON Watchdog Timer Interrupt       */\n  USB_PHY_IRQn                  =   6,      /*!< USB PHY Interrupt                  */\n  USB_IRQn                      =   7,      /*!< USB Interrupt                      */\n  WAKEUP_IRQn                   =   8,      /*!< Wakeup Interrupt                   */\n  AON_GPIO_IRQn                 =   9,      /*!< AON GPIO Interrupt                 */\n  MCU_WDT_IRQn                  =  10,      /*!< Watchdog Timer Interrupt           */\n  SENSOR_ENG_IRQn               =  11,      /*!< Sensor Engine Interrupt            */\n  MCU_TIMER00_IRQn              =  12,      /*!< Timer00 Interrupt                  */\n  MCU_TIMER01_IRQn              =  13,      /*!< Timer01 Interrupt                  */\n  I2C0_IRQn                     =  14,      /*!< I2C0 Interrupt                     */\n  SPI0_IRQn                     =  15,      /*!< SPI0 Interrupt                     */\n  SPILCD_IRQn                   =  16,      /*!< SPILCD Interrupt                   */\n  UART0_IRQn                    =  17,      /*!< UART0 Interrupt                    */\n  UART1_IRQn                    =  18,      /*!< UART1 Interrupt                    */\n  CODEC_IRQn                    =  19,      /*!< CODEC Interrupt                    */\n  BTPCM_IRQn                    =  20,      /*!< BTPCM Interrupt                    */\n  I2S0_IRQn                     =  21,      /*!< I2S0 Interrupt                     */\n  SPDIF0_IRQn                   =  22,      /*!< SPDIF0 Interrupt                   */\n  I2S1_IRQn                     =  23,      /*!< I2S1 Interrupt                     */\n  BT_IRQn                       =  24,      /*!< BT to MCU Interrupt                */\n  CODEC_TX_PEAK_IRQn            =  25,      /*!< CODEC TX PEAK Interrupt            */\n  UART2_IRQn                    =  26,      /*!< UART2 Interrupt                    */\n  MCU_TIMER10_IRQn              =  27,      /*!< Timer10 Interrupt                  */\n  MCU_TIMER11_IRQn              =  28,      /*!< Timer11 Interrupt                  */\n  I2C1_IRQn                     =  29,      /*!< I2C1 Interrupt                     */\n  DUMP_IRQn                     =  30,      /*!< DUMP Interrupt                     */\n  SPIPHY_IRQn                   =  31,      /*!< SPIPHY Interrupt                   */\n  ISDONE_IRQn                   =  32,      /*!< Intersys MCU2BT Data Done Interrupt */\n  ISDONE1_IRQn                  =  33,      /*!< Intersys MCU2BT Data1 Done Interrupt */\n  ISDATA_IRQn                   =  34,      /*!< Intersys BT2MCU Data Indication Interrupt */\n  ISDATA1_IRQn                  =  35,      /*!< Intersys BT2MCU Data1 Indication Interrupt */\n  CP2MCU_DATA_IRQn              =  36,      /*!< Intersys CP2MCU Data Indication Interrupt */\n  CP2MCU_DATA1_IRQn             =  37,      /*!< Intersys CP2MCU Data1 Indication Interrupt */\n  CP2MCU_DATA2_IRQn             =  38,      /*!< Intersys CP2MCU Data Indication Interrupt */\n  CP2MCU_DATA3_IRQn             =  39,      /*!< Intersys CP2MCU Data1 Indication Interrupt */\n  USB_CAL_IRQn                  =  40,      /*!< USB Calibration Interrupt          */\n  USB_PIN_IRQn                  =  41,      /*!< USB Pin Interrupt                  */\n  PMU_IRQn                      =  42,      /*!< PMU Interrupt                      */\n  SEC_ENG_IRQn                  =  43,      /*!< Security Engine Interrupt          */\n  AON_IRQn                      =  44,      /*!< AON Interrupt                      */\n  AON_TIMER00_IRQn              =  45,      /*!< AON Timer00 Interrupt              */\n  AON_TIMER01_IRQn              =  46,      /*!< AON Timer01 Interrupt              */\n  SEDMA_IRQn                    =  47,      /*!< Security Engine DMA Interrupt      */\n  MCU2CP_DONE_IRQn              =  48,      /*!< Intersys MCU2CP Data Done Interrupt */\n  MCU2CP_DONE1_IRQn             =  49,      /*!< Intersys MCU2CP Data Done Interrupt */\n  MCU2CP_DONE2_IRQn             =  50,      /*!< Intersys MCU2CP Data Done Interrupt */\n  MCU2CP_DONE3_IRQn             =  51,      /*!< Intersys MCU2CP Data Done Interrupt */\n\n  USER_IRQn_QTY,\n  INVALID_IRQn                  = USER_IRQn_QTY,\n} IRQn_Type;\n\n#define GPIO_IRQn               AON_GPIO_IRQn\n#define GPADC_IRQn              INVALID_IRQn\n#define PWRKEY_IRQn             INVALID_IRQn\n#ifdef CORE_SLEEP_POWER_DOWN\n#define TIMER00_IRQn            AON_TIMER00_IRQn\n#define TIMER01_IRQn            AON_TIMER01_IRQn\n#else\n#define TIMER00_IRQn            MCU_TIMER00_IRQn\n#define TIMER01_IRQn            MCU_TIMER01_IRQn\n#endif\n#define WDT_IRQn                AON_WDT_IRQn\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of the Cortex-M4 Processor and Core Peripherals  ------- */\n#define __CM4_REV                 0x0001    /*!< Core revision r0p1                              */\n#define __MPU_PRESENT             1         /*!< MPU present or not                              */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3         /*!< Number of Bits used for Priority Levels         */\n#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used    */\n#define __FPU_PRESENT             1         /*!< FPU present                                     */\n#define __NUM_CODE_PATCH          6\n#define __NUM_LIT_PATCH           2\n\n#include \"core_cm4.h\"                       /* Processor and core peripherals                    */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/best3001.h",
    "content": "/**************************************************************************//**\n * @file     best3001.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM4 Device Series\n * @version  V2.02\n * @date     10. September 2014\n *\n * @note     configured for CM4 with FPU\n *\n ******************************************************************************/\n/* Copyright (c) 2011 - 2014 ARM LIMITED\n\n   All rights reserved.\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions are met:\n   - Redistributions of source code must retain the above copyright\n     notice, this list of conditions and the following disclaimer.\n   - Redistributions in binary form must reproduce the above copyright\n     notice, this list of conditions and the following disclaimer in the\n     documentation and/or other materials provided with the distribution.\n   - Neither the name of ARM nor the names of its contributors may be used\n     to endorse or promote products derived from this software without\n     specific prior written permission.\n   *\n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n   POSSIBILITY OF SUCH DAMAGE.\n   ---------------------------------------------------------------------------*/\n\n\n#ifndef __BEST3001_H__\n#define __BEST3001_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M4 Processor Exceptions Numbers  ------------------- */\n  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt          */\n  HardFault_IRQn                = -13,      /*!<  3 HardFault Interrupt             */\n  MemoryManagement_IRQn         = -12,      /*!<  4 Memory Management Interrupt     */\n  BusFault_IRQn                 = -11,      /*!<  5 Bus Fault Interrupt             */\n  UsageFault_IRQn               = -10,      /*!<  6 Usage Fault Interrupt           */\n  SVCall_IRQn                   =  -5,      /*!< 11 SV Call Interrupt               */\n  DebugMonitor_IRQn             =  -4,      /*!< 12 Debug Monitor Interrupt         */\n  PendSV_IRQn                   =  -2,      /*!< 14 Pend SV Interrupt               */\n  SysTick_IRQn                  =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* ----------------------  BEST1000 Specific Interrupt Numbers  --------------------- */\n  FPU_IRQn                      =   0,      /*!< FPU Interrupt                      */\n  RESERVED01_IRQn               =   1,      /*!< Reserved Interrupt                 */\n  RESERVED02_IRQn               =   2,      /*!< Reserved Interrupt                 */\n  RESERVED03_IRQn               =   3,      /*!< Reserved Interrupt                 */\n  AUDMA_IRQn                    =   4,      /*!< General Purpose DMA Interrupt      */\n  MCU_TIMER1_IRQ2n              =   5,      /*!< MCU Timer1 Interrupt1              */\n  MCU_TIMER1_IRQ1n              =   6,      /*!< MCU Timer1 Interrupt2              */\n  USB_IRQn                      =   7,      /*!< USB Interrupt                      */\n  WAKEUP_IRQn                   =   8,      /*!< Wakeup Interrupt                   */\n  GPIO_IRQn                     =   9,      /*!< GPIO Interrupt                     */\n  WDT_IRQn                      =  10,      /*!< Watchdog Timer Interrupt           */\n  RTC_IRQn                      =  11,      /*!< RTC Interrupt                      */\n  MCU_TIMER00_IRQn              =  12,      /*!< MCU Timer0 Interrupt               */\n  MCU_TIMER01_IRQn              =  13,      /*!< MCU Timer0 Interrupt               */\n  I2C0_IRQn                     =  14,      /*!< I2C0 Interrupt                     */\n  SPI0_IRQn                     =  15,      /*!< SPI0 Interrupt                     */\n  RESERVED16_IRQn               =  16,      /*!< Reserved Interrupt                 */\n  UART0_IRQn                    =  17,      /*!< UART0 Interrupt                    */\n  UART1_IRQn                    =  18,      /*!< UART1 Interrupt                    */\n  CODEC_IRQn                    =  19,      /*!< CODEC Interrupt                    */\n  RESERVED20_IRQn               =  20,      /*!< Reserved Interrupt                 */\n  I2S0_IRQn                     =  21,      /*!< I2S0 Interrupt                     */\n  SPDIF0_IRQn                   =  22,      /*!< SPDIF0 Interrupt                   */\n  SPI_ITN_IRQn                  =  23,      /*!< Internal SPI Interrupt             */\n  RESERVED24_IRQn               =  24,      /*!< Reserved Interrupt                 */\n  GPADC_IRQn                    =  25,      /*!< GPADC Interrupt                    */\n  RESERVED26_IRQn               =  26,      /*!< Reserved Interrupt                 */\n  USB_PIN_IRQn                  =  27,      /*!< PMU USB Interrupt                  */\n  RESERVED28_IRQn               =  28,      /*!< Reserved Interrupt                 */\n  RESERVED29_IRQn               =  29,      /*!< Reserved Interrupt                 */\n  USB_CALIB_IRQn                =  30,      /*!< Reserved Interrupt                 */\n  USB_SOF_IRQn                  =  31,      /*!< Reserved Interrupt                 */\n  CHARGER_IRQn                  =  32,      /*!< Charger Interrupt                  */\n  PWRKEY_IRQn                   =  33,      /*!< POWER KEY Interrupt                */\n  RESERVED34_IRQn               =  34,      /*!< Reserved Interrupt                 */\n  RESERVED35_IRQn               =  35,      /*!< Reserved Interrupt                 */\n  RESERVED36_IRQn               =  36,      /*!< Reserved Interrupt                 */\n\n  USER_IRQn_QTY,\n  INVALID_IRQn                  = USER_IRQn_QTY,\n} IRQn_Type;\n\n#define TIMER00_IRQn            MCU_TIMER00_IRQn\n#define TIMER01_IRQn            MCU_TIMER01_IRQn\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of the Cortex-M4 Processor and Core Peripherals  ------- */\n#define __CM4_REV                 0x0001    /*!< Core revision r0p1                              */\n#define __MPU_PRESENT             1         /*!< MPU present or not                              */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3         /*!< Number of Bits used for Priority Levels         */\n#define __Vendor_SysTickConfig    0         /*!< Set to 1 if different SysTick Config is used    */\n#define __FPU_PRESENT             1         /*!< FPU present                                     */\n#define __NUM_CODE_PATCH          56\n#define __NUM_LIT_PATCH           8\n\n#include \"core_cm4.h\"                       /* Processor and core peripherals                    */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/best3003.h",
    "content": "/**************************************************************************//**\n * @file     best3003.h\n * @brief    CMSIS Core Peripheral Access Layer Header File for\n *           ARMCM33 Device (configured for ARMCM33 with FPU, with DSP extension)\n * @version  V5.3.1\n * @date     09. July 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n\n#ifndef __BEST3003_H__\n#define __BEST3003_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\ntypedef enum IRQn\n{\n/* -------------------  Cortex-M33 Processor Exceptions Numbers  ------------------ */\n  NonMaskableInt_IRQn           = -14,      /*!<  2 Non Maskable Interrupt          */\n  HardFault_IRQn                = -13,      /*!<  3 HardFault Interrupt             */\n  MemoryManagement_IRQn         = -12,      /*!<  4 Memory Management Interrupt     */\n  BusFault_IRQn                 = -11,      /*!<  5 Bus Fault Interrupt             */\n  UsageFault_IRQn               = -10,      /*!<  6 Usage Fault Interrupt           */\n  SVCall_IRQn                   =  -5,      /*!< 11 SV Call Interrupt               */\n  DebugMonitor_IRQn             =  -4,      /*!< 12 Debug Monitor Interrupt         */\n  PendSV_IRQn                   =  -2,      /*!< 14 Pend SV Interrupt               */\n  SysTick_IRQn                  =  -1,      /*!< 15 System Tick Interrupt           */\n\n/* ----------------------  Chip Specific Interrupt Numbers  ----------------------- */\n  FPU_IRQn                      =   0,      /*!< FPU Interrupt                      */\n  RESERVED01_IRQn               =   1,      /*!< Reserved Interrupt                 */\n  RESERVED02_IRQn               =   2,      /*!< Reserved Interrupt                 */\n  GPDMA_IRQn                    =   3,      /*!< General Purpose DMA Interrupt      */\n  AUDMA_IRQn                    =   4,      /*!< Audio DMA Interrupt                */\n  MCU_TIMER1_IRQ2n              =   5,      /*!< MCU Timer1 Interrupt1              */\n  MCU_TIMER1_IRQ1n              =   6,      /*!< MCU Timer1 Interrupt2              */\n  USB_IRQn                      =   7,      /*!< USB Interrupt                      */\n  WAKEUP_IRQn                   =   8,      /*!< Wakeup Interrupt                   */\n  GPIO_IRQn                     =   9,      /*!< GPIO Interrupt                     */\n  WDT_IRQn                      =  10,      /*!< Watchdog Timer Interrupt           */\n  RTC_IRQn                      =  11,      /*!< RTC Interrupt                      */\n  MCU_TIMER00_IRQn              =  12,      /*!< MCU Timer0 Interrupt               */\n  MCU_TIMER01_IRQn              =  13,      /*!< MCU Timer0 Interrupt               */\n  I2C0_IRQn                     =  14,      /*!< I2C0 Interrupt                     */\n  SPI0_IRQn                     =  15,      /*!< SPI0 Interrupt                     */\n  FMDUMP0_IRQn                  =  16,      /*!< FM DUMP0 Interrupt                 */\n  UART0_IRQn                    =  17,      /*!< UART0 Interrupt                    */\n  UART1_IRQn                    =  18,      /*!< UART1 Interrupt                    */\n  CODEC_IRQn                    =  19,      /*!< CODEC Interrupt                    */\n  FMDUMP1_IRQn                  =  20,      /*!< FM DUMP1 Interrupt                 */\n  I2S0_IRQn                     =  21,      /*!< I2S0 Interrupt                     */\n  SPDIF0_IRQn                   =  22,      /*!< SPDIF0 Interrupt                   */\n  SPI_ITN_IRQn                  =  23,      /*!< Internal SPI Interrupt             */\n  RESERVED24_IRQn               =  24,      /*!< Reserved Interrupt                 */\n  GPADC_IRQn                    =  25,      /*!< GPADC Interrupt                    */\n  RESERVED26_IRQn               =  26,      /*!< Reserved Interrupt                 */\n  USB_PIN_IRQn                  =  27,      /*!< PMU USB Interrupt                  */\n  RESERVED28_IRQn               =  28,      /*!< Reserved Interrupt                 */\n  RESERVED29_IRQn               =  29,      /*!< Reserved Interrupt                 */\n  USB_CALIB_IRQn                =  30,      /*!< Reserved Interrupt                 */\n  USB_SOF_IRQn                  =  31,      /*!< Reserved Interrupt                 */\n  CHARGER_IRQn                  =  32,      /*!< Charger Interrupt                  */\n  PWRKEY_IRQn                   =  33,      /*!< POWER KEY Interrupt                */\n  EARDET_IRQn                   =  34,      /*!< EAR DET Interrupt                  */\n  RESERVED35_IRQn               =  35,      /*!< Reserved Interrupt                 */\n  RESERVED36_IRQn               =  36,      /*!< Reserved Interrupt                 */\n\n  USER_IRQn_QTY,\n  INVALID_IRQn                  = USER_IRQn_QTY,\n} IRQn_Type;\n\n#define TIMER00_IRQn            MCU_TIMER00_IRQn\n#define TIMER01_IRQn            MCU_TIMER01_IRQn\n\n#endif\n\n/* ================================================================================ */\n/* ================      Processor and Core Peripheral Section     ================ */\n/* ================================================================================ */\n\n/* --------  Configuration of Core Peripherals  ----------------------------------- */\n#define __CM33_REV                0x0000U   /* Core revision r0p1 */\n#define __SAUREGION_PRESENT       0U        /* SAU regions present */\n#define __MPU_PRESENT             1U        /* MPU present */\n#define __VTOR_PRESENT            1U        /* VTOR present */\n#define __NVIC_PRIO_BITS          3U        /* Number of Bits used for Priority Levels */\n#define __Vendor_SysTickConfig    0U        /* Set to 1 if different SysTick Config is used */\n#define __FPU_PRESENT             1U        /* FPU present */\n#define __DSP_PRESENT             1U        /* DSP extension present */\n\n#include \"core_cm33.h\"                      /* Processor and core peripherals */\n\n#ifndef __ASSEMBLER__\n\n#include \"system_ARMCM.h\"                  /* System Header                                     */\n\n#endif\n\n/* ================================================================================ */\n/* ================       Device Specific Peripheral Section       ================ */\n/* ================================================================================ */\n\n/* -------------------  Start of section using anonymous unions  ------------------ */\n#if   defined (__CC_ARM)\n  #pragma push\n  #pragma anon_unions\n#elif defined (__ICCARM__)\n  #pragma language=extended\n#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wc11-extensions\"\n  #pragma clang diagnostic ignored \"-Wreserved-id-macro\"\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning 586\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n/* --------------------  End of section using anonymous unions  ------------------- */\n#if   defined (__CC_ARM)\n  #pragma pop\n#elif defined (__ICCARM__)\n  /* leave anonymous unions enabled */\n#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n  #pragma clang diagnostic pop\n#elif defined (__GNUC__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TMS470__)\n  /* anonymous unions are enabled by default */\n#elif defined (__TASKING__)\n  #pragma warning restore\n#elif defined (__CSMC__)\n  /* anonymous unions are enabled by default */\n#else\n  #warning Not supported compiler type\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/ca/best2001_dsp.h",
    "content": "/******************************************************************************\n * @file     ARMCA7.h\n * @brief    CMSIS Cortex-A7 Core Peripheral Access Layer Header File\n * @version  V1.1.0\n * @date     15. May 2019\n *\n * @note\n *\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __BEST2001_DSP_H__\n#define __BEST2001_DSP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n\n/* -------------------------  Interrupt Number Definition  ------------------------ */\n\n/** Device specific Interrupt IDs */\ntypedef enum IRQn\n{\n    /******  SGI Interrupts Numbers                 ****************************************/\n    SGI0_IRQn                   =  0,       /*!< Software Generated Interrupt 0 */\n    SGI1_IRQn                   =  1,       /*!< Software Generated Interrupt 1 */\n    SGI2_IRQn                   =  2,       /*!< Software Generated Interrupt 2 */\n    SGI3_IRQn                   =  3,       /*!< Software Generated Interrupt 3 */\n    SGI4_IRQn                   =  4,       /*!< Software Generated Interrupt 4 */\n    SGI5_IRQn                   =  5,       /*!< Software Generated Interrupt 5 */\n    SGI6_IRQn                   =  6,       /*!< Software Generated Interrupt 6 */\n    SGI7_IRQn                   =  7,       /*!< Software Generated Interrupt 7 */\n    SGI8_IRQn                   =  8,       /*!< Software Generated Interrupt 8 */\n    SGI9_IRQn                   =  9,       /*!< Software Generated Interrupt 9 */\n    SGI10_IRQn                  = 10,       /*!< Software Generated Interrupt 10 */\n    SGI11_IRQn                  = 11,       /*!< Software Generated Interrupt 11 */\n    SGI12_IRQn                  = 12,       /*!< Software Generated Interrupt 12 */\n    SGI13_IRQn                  = 13,       /*!< Software Generated Interrupt 13 */\n    SGI14_IRQn                  = 14,       /*!< Software Generated Interrupt 14 */\n    SGI15_IRQn                  = 15,       /*!< Software Generated Interrupt 15 */\n\n    /******  Cortex-A7 Processor Exceptions Numbers ****************************************/\n    SecurePhyTimer_IRQn         = 29,       /*!< Physical Timer Interrupt                      */\n\n    /******  Platform Exceptions Numbers ***************************************************/\n    WAKEUP_IRQn                 = 32,       /*!< Wakeup Interrupt                   */\n    CODEC_IRQn                  = 33,       /*!< CODEC Interrupt                    */\n    CODEC_TX_PEAK_IRQn          = 34,       /*!< CODEC TX PEAK Interrupt            */\n    SDMMC_IRQn                  = 35,       /*!< SDMMC Interrupt                    */\n    BES2001_AUDMA_IRQn          = 36,       /*!< Audio DMA Interrupt                */\n    BES2001_GPDMA_IRQn          = 37,       /*!< General Purpose DMA Interrupt      */\n    USB_IRQn                    = 38,       /*!< USB Interrupt                      */\n    USB_PHY_IRQn                = 39,       /*!< USB PHY Interrupt                  */\n    USB_CAL_IRQn                = 40,       /*!< USB Calibration Interrupt          */\n    USB_PIN_IRQn                = 41,       /*!< USB Pin Interrupt                  */\n    SEC_ENG_IRQn                = 42,       /*!< Security Engine Interrupt          */\n    SEDMA_IRQn                  = 43,       /*!< SEDMA Interrupt                    */\n    DUMP_IRQn                   = 44,       /*!< DUMP Interrupt                     */\n    MCU_WDT_IRQn                = 45,       /*!< Watchdog Timer Interrupt           */\n    MCU_TIMER00_IRQn            = 46,       /*!< Timer00 Interrupt                  */\n    MCU_TIMER01_IRQn            = 47,       /*!< Timer01 Interrupt                  */\n    MCU_TIMER10_IRQn            = 48,       /*!< Timer10 Interrupt                  */\n    MCU_TIMER11_IRQn            = 49,       /*!< Timer11 Interrupt                  */\n    MCU_TIMER20_IRQn            = 50,       /*!< Timer20 Interrupt                  */\n    MCU_TIMER21_IRQn            = 51,       /*!< Timer21 Interrupt                  */\n    I2C0_IRQn                   = 52,       /*!< I2C0 Interrupt                     */\n    I2C1_IRQn                   = 53,       /*!< I2C1 Interrupt                     */\n    SPI0_IRQn                   = 54,       /*!< SPI0 Interrupt                     */\n    SPILCD_IRQn                 = 55,       /*!< SPILCD Interrupt                   */\n    ITNSPI_IRQn                 = 56,       /*!< Internal SPI Interrupt             */\n    SPIPHY_IRQn                 = 57,       /*!< SPIPHY Interrupt                   */\n    UART0_IRQn                  = 58,       /*!< UART0 Interrupt                    */\n    UART1_IRQn                  = 59,       /*!< UART1 Interrupt                    */\n    UART2_IRQn                  = 60,       /*!< UART2 Interrupt                    */\n    BTPCM_IRQn                  = 61,       /*!< BTPCM Interrupt                    */\n    I2S0_IRQn                   = 62,       /*!< I2S0 Interrupt                     */\n    SPDIF0_IRQn                 = 63,       /*!< SPDIF0 Interrupt                   */\n    TRNG_IRQn                   = 64,       /*!< TRNG Interrupt                     */\n    AON_GPIO_IRQn               = 65,       /*!< AON GPIO Interrupt                 */\n    AON_GPIOAUX_IRQn            = 66,       /*!< AON GPIOAUX Interrupt              */\n    AON_WDT_IRQn                = 67,       /*!< AON Watchdog Timer Interrupt       */\n    AON_TIMER00_IRQn            = 68,       /*!< AON Timer00 Interrupt              */\n    AON_TIMER01_IRQn            = 69,       /*!< AON Timer01 Interrupt              */\n    TRANSQW_LCL_IRQn            = 70,       /*!< TRANSQ-WIFI Local Interrupt        */\n    TRANSQW_RMT_IRQn            = 71,       /*!< TRANSQ-WIFI Peer Remote Interrupt  */\n    WIFI_IRQn                   = 72,       /*!< DSP to MCU Interrupt               */\n    ISDONE_IRQn                 = 73,       /*!< Intersys MCU2BT Data Done Interrupt */\n    ISDONE1_IRQn                = 74,       /*!< Intersys MCU2BT Data1 Done Interrupt */\n    ISDATA_IRQn                 = 75,       /*!< Intersys BT2MCU Data Indication Interrupt */\n    ISDATA1_IRQn                = 76,       /*!< Intersys BT2MCU Data1 Indication Interrupt */\n    BT_IRQn                     = 77,       /*!< BT to MCU Interrupt                */\n    RESERVED58_IRQn             = 78,       /*!< Reserved Interrupt                 */\n    RTC_IRQn                    = 79,       /*!< RTC Interrupt                      */\n    GPADC_IRQn                  = 80,       /*!< GPADC Interrupt                    */\n    CHARGER_IRQn                = 81,       /*!< Charger Interrupt                  */\n    PWRKEY_IRQn                 = 82,       /*!< Power key Interrupt                */\n    WIFIDUMP_IRQn               = 83,       /*!< WIFIDUMP Interrupt                 */\n    CHKSUM_IRQn                 = 84,       /*!< Checksum Interrupt                 */\n    CRC_IRQn                    = 85,       /*!< CRC Interrupt                      */\n    AON_SPIDPD_IRQn             = 86,       /*!< AON SPIDPD Interrupt               */\n    TRUSTZONE_IRQn              = 87,       /*!< TrustZone Interrupt                */\n    TRANSQM_LCL_IRQn            = 88,       /*!< TRANSQ-MCU Local Interrupt         */\n    TRANSQM_RMT_IRQn            = 89,       /*!< TRANSQ-MCU Peer Remote Interrupt   */\n    MCU_IRQn                    = 90,       /*!< MCU to DSP Interrupt               */\n    DSP_WDT_IRQn                = 91,       /*!< Watchdog Timer Interrupt           */\n    DSP_TIMER00_IRQn            = 92,       /*!< Timer00 Interrupt                  */\n    DSP_TIMER01_IRQn            = 93,       /*!< Timer01 Interrupt                  */\n    DSP_TIMER10_IRQn            = 94,       /*!< Timer10 Interrupt                  */\n    DSP_TIMER11_IRQn            = DSP_TIMER10_IRQn, /*!< Timer11 Interrupt          */\n    XDMA_IRQn                   = 95,       /*!< DSP XDMA Interrupt                 */\n\n    USER_IRQn_QTY,\n    INVALID_IRQn                = USER_IRQn_QTY,\n} IRQn_Type;\n\n#define AUDMA_IRQn              BES2001_AUDMA_IRQn //A7 use AUDMA\n\n#define GPIO_IRQn               AON_GPIO_IRQn\n#define GPIOAUX_IRQn            AON_GPIOAUX_IRQn\n#define TIMER00_IRQn            DSP_TIMER00_IRQn\n#define TIMER01_IRQn            DSP_TIMER01_IRQn\n#define WDT_IRQn                AON_WDT_IRQn\n\n#define TRANSQ0_RMT_IRQn        TRANSQW_RMT_IRQn//use MCU's transq\n#define TRANSQ0_LCL_IRQn        TRANSQW_LCL_IRQn\n#define TRANSQ1_RMT_IRQn        TRANSQM_RMT_IRQn\n#define TRANSQ1_LCL_IRQn        TRANSQM_LCL_IRQn\n\n#endif\n\n#if 0\n/******************************************************************************/\n/*                         Peripheral memory map                              */\n/******************************************************************************/\n\n/* Peripheral and RAM base address */\n#define VE_A7_MP_FLASH_BASE0                  (0x00000000UL)                                /*!< (FLASH0     ) Base Address */\n#define VE_A7_MP_FLASH_BASE1                  (0x0C000000UL)                                /*!< (FLASH1     ) Base Address */\n#define VE_A7_MP_SRAM_BASE                    (0x14000000UL)                                /*!< (SRAM       ) Base Address */\n#define VE_A7_MP_PERIPH_BASE_CS2              (0x18000000UL)                                /*!< (Peripheral ) Base Address */\n#define VE_A7_MP_VRAM_BASE                    (0x00000000UL + VE_A7_MP_PERIPH_BASE_CS2)     /*!< (VRAM       ) Base Address */\n#define VE_A7_MP_ETHERNET_BASE                (0x02000000UL + VE_A7_MP_PERIPH_BASE_CS2)     /*!< (ETHERNET   ) Base Address */\n#define VE_A7_MP_USB_BASE                     (0x03000000UL + VE_A7_MP_PERIPH_BASE_CS2)     /*!< (USB        ) Base Address */\n#define VE_A7_MP_PERIPH_BASE_CS3              (0x1C000000UL)                                /*!< (Peripheral ) Base Address */\n#define VE_A7_MP_DAP_BASE                     (0x00000000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (LOCAL DAP  ) Base Address */\n#define VE_A7_MP_SYSTEM_REG_BASE              (0x00010000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (SYSTEM REG ) Base Address */\n#define VE_A7_MP_SERIAL_BASE                  (0x00030000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (SERIAL     ) Base Address */\n#define VE_A7_MP_AACI_BASE                    (0x00040000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (AACI       ) Base Address */\n#define VE_A7_MP_MMCI_BASE                    (0x00050000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (MMCI       ) Base Address */\n#define VE_A7_MP_KMI0_BASE                    (0x00060000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (KMI0       ) Base Address */\n#define VE_A7_MP_UART_BASE                    (0x00090000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (UART       ) Base Address */\n#define VE_A7_MP_WDT_BASE                     (0x000F0000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (WDT        ) Base Address */\n#define VE_A7_MP_TIMER_BASE                   (0x00110000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (TIMER      ) Base Address */\n#define VE_A7_MP_DVI_BASE                     (0x00160000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (DVI        ) Base Address */\n#define VE_A7_MP_RTC_BASE                     (0x00170000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (RTC        ) Base Address */\n#define VE_A7_MP_UART4_BASE                   (0x001B0000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (UART4      ) Base Address */\n#define VE_A7_MP_CLCD_BASE                    (0x001F0000UL + VE_A7_MP_PERIPH_BASE_CS3)     /*!< (CLCD       ) Base Address */\n#define VE_A7_MP_PRIVATE_PERIPH_BASE          (0x2C000000UL)                                /*!< (Peripheral ) Base Address */\n#define VE_A7_MP_GIC_DISTRIBUTOR_BASE         (0x00001000UL + VE_A7_MP_PRIVATE_PERIPH_BASE) /*!< (GIC DIST   ) Base Address */\n#define VE_A7_MP_GIC_INTERFACE_BASE           (0x00002000UL + VE_A7_MP_PRIVATE_PERIPH_BASE) /*!< (GIC CPU IF ) Base Address */\n#define VE_A7_MP_PL310_BASE                   (0x000F0000UL + VE_A7_MP_PRIVATE_PERIPH_BASE) /*!< (L2C-310    ) Base Address */\n#define VE_A7_MP_SSRAM_BASE                   (0x2E000000UL)                                /*!< (System SRAM) Base Address */\n#define VE_A7_MP_DRAM_BASE                    (0x80000000UL)                                /*!< (DRAM       ) Base Address */\n#define GIC_DISTRIBUTOR_BASE                  VE_A7_MP_GIC_DISTRIBUTOR_BASE\n#define GIC_INTERFACE_BASE                    VE_A7_MP_GIC_INTERFACE_BASE\n\n//The VE-A7 model implements L1 cache as architecturally defined, but does not implement L2 cache.\n//Do not enable the L2 cache if you are running RTX on a VE-A7 model as it may cause a data abort.\n#define L2C_310_BASE                          VE_A7_MP_PL310_BASE\n#endif\n\n/* --------  Configuration of the Cortex-A7 Processor and Core Peripherals  ------- */\n#define __CA_REV        0x0000U    /* Core revision r0p0                            */\n#define __CORTEX_A           7U    /* Cortex-A7 Core                                */\n#define __FPU_PRESENT        1U    /* FPU present                                   */\n#define __GIC_PRESENT        1U    /* GIC present                                   */\n#define __TIM_PRESENT        1U    /* TIM present                                   */\n#define __L2C_PRESENT        0U    /* L2C present                                   */\n#define __GIC_PRIO_BITS      3U    /* Number of Bits used for Priority Levels       */\n\n#include \"ca/core_ca.h\"\n\n#ifndef __ASSEMBLER__\n#include \"ca/system_ARMCA.h\"\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/ca/cmsis_armcc_ca.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_armcc.h\n * @brief    CMSIS compiler specific macros, functions, instructions\n * @version  V1.0.3\n * @date     15. May 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __CMSIS_ARMCC_CA_H\n#define __CMSIS_ARMCC_CA_H\n\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)\n  #error \"Please use Arm Compiler Toolchain V4.0.677 or later!\"\n#endif\n\n/* CMSIS compiler control architecture macros */\n#if (defined (__TARGET_ARCH_7_A ) && (__TARGET_ARCH_7_A  == 1))\n  #define __ARM_ARCH_7A__           1\n#endif\n\n/* CMSIS compiler specific defines */\n#ifndef   __ASM\n  #define __ASM                                  __asm\n#endif\n#ifndef   __INLINE\n  #define __INLINE                               __inline\n#endif\n#ifndef   __FORCEINLINE\n  #define __FORCEINLINE                          __forceinline\n#endif\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE                        static __inline\n#endif\n#ifndef   __STATIC_FORCEINLINE\n  #define __STATIC_FORCEINLINE                   static __forceinline\n#endif\n#ifndef   __NO_RETURN\n  #define __NO_RETURN                            __declspec(noreturn)\n#endif\n#ifndef   CMSIS_DEPRECATED\n  #define CMSIS_DEPRECATED                       __attribute__((deprecated))\n#endif\n#ifndef   __USED\n  #define __USED                                 __attribute__((used))\n#endif\n#ifndef   __WEAK\n  #define __WEAK                                 __attribute__((weak))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed))\n#endif\n#ifndef   __PACKED_STRUCT\n  #define __PACKED_STRUCT                        __packed struct\n#endif\n#ifndef   __UNALIGNED_UINT16_WRITE\n  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT16_READ\n  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))\n#endif\n#ifndef   __UNALIGNED_UINT32_WRITE\n  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT32_READ\n  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))\n#endif\n#ifndef   __ALIGNED\n  #define __ALIGNED(x)                           __attribute__((aligned(x)))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed))\n#endif\n#ifndef   __COMPILER_BARRIER\n  #define __COMPILER_BARRIER()                   __memory_changed()\n#endif\n\n/* ##########################  Core Instruction Access  ######################### */\n/**\n  \\brief   No Operation\n */\n#define __NOP                             __nop\n\n/**\n  \\brief   Wait For Interrupt\n */\n#define __WFI                             __wfi\n\n/**\n  \\brief   Wait For Event\n */\n#define __WFE                             __wfe\n\n/**\n  \\brief   Send Event\n */\n#define __SEV                             __sev\n\n/**\n  \\brief   Instruction Synchronization Barrier\n */\n#define __ISB() do {\\\n                   __schedule_barrier();\\\n                   __isb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n/**\n  \\brief   Data Synchronization Barrier\n */\n#define __DSB() do {\\\n                   __schedule_barrier();\\\n                   __dsb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n/**\n  \\brief   Data Memory Barrier\n */\n#define __DMB() do {\\\n                   __schedule_barrier();\\\n                   __dmb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n/**\n  \\brief   Reverse byte order (32 bit)\n  \\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REV                             __rev\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#ifndef __NO_EMBEDDED_ASM\n__attribute__((section(\".rev16_text\"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)\n{\n  rev16 r0, r0\n  bx lr\n}\n#endif\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#ifndef __NO_EMBEDDED_ASM\n__attribute__((section(\".revsh_text\"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)\n{\n  revsh r0, r0\n  bx lr\n}\n#endif\n\n/**\n  \\brief   Rotate Right in unsigned value (32 bit)\n  \\param [in]    op1  Value to rotate\n  \\param [in]    op2  Number of Bits to rotate\n  \\return               Rotated value\n */\n#define __ROR                             __ror\n\n/**\n  \\brief   Breakpoint\n  \\param [in]    value  is ignored by the processor.\n                 If required, a debugger can use it to store additional information about the breakpoint.\n */\n#define __BKPT(value)                     __breakpoint(value)\n\n/**\n  \\brief   Reverse bit order of value\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __RBIT                            __rbit\n\n/**\n  \\brief   Count leading zeros\n  \\param [in]  value  Value to count the leading zeros\n  \\return             number of leading zeros in value\n */\n#define __CLZ                             __clz\n\n/**\n  \\brief   LDR Exclusive (8 bit)\n  \\details Executes a exclusive LDR instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))\n#else\n  #define __LDREXB(ptr)          _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") ((uint8_t ) __ldrex(ptr))  _Pragma(\"pop\")\n#endif\n\n/**\n  \\brief   LDR Exclusive (16 bit)\n  \\details Executes a exclusive LDR instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))\n#else\n  #define __LDREXH(ptr)          _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") ((uint16_t) __ldrex(ptr))  _Pragma(\"pop\")\n#endif\n\n/**\n  \\brief   LDR Exclusive (32 bit)\n  \\details Executes a exclusive LDR instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))\n#else\n  #define __LDREXW(ptr)          _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") ((uint32_t ) __ldrex(ptr))  _Pragma(\"pop\")\n#endif\n\n/**\n  \\brief   STR Exclusive (8 bit)\n  \\details Executes a exclusive STR instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __STREXB(value, ptr)                                                 __strex(value, ptr)\n#else\n  #define __STREXB(value, ptr)   _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") __strex(value, ptr)        _Pragma(\"pop\")\n#endif\n\n/**\n  \\brief   STR Exclusive (16 bit)\n  \\details Executes a exclusive STR instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __STREXH(value, ptr)                                                 __strex(value, ptr)\n#else\n  #define __STREXH(value, ptr)   _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") __strex(value, ptr)        _Pragma(\"pop\")\n#endif\n\n/**\n  \\brief   STR Exclusive (32 bit)\n  \\details Executes a exclusive STR instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __STREXW(value, ptr)                                                 __strex(value, ptr)\n#else\n  #define __STREXW(value, ptr)   _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") __strex(value, ptr)        _Pragma(\"pop\")\n#endif\n\n/**\n  \\brief   Remove the exclusive lock\n  \\details Removes the exclusive lock which is created by LDREX.\n */\n#define __CLREX                           __clrex\n\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n#define __SSAT                            __ssat\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n#define __USAT                            __usat\n\n/* ###########################  Core Function Access  ########################### */\n\n/**\n  \\brief   Get FPSCR (Floating Point Status/Control)\n  \\return               Floating Point Status/Control register value\n */\n__STATIC_INLINE uint32_t __get_FPSCR(void)\n{\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n  register uint32_t __regfpscr         __ASM(\"fpscr\");\n  return(__regfpscr);\n#else\n   return(0U);\n#endif\n}\n\n/**\n  \\brief   Set FPSCR (Floating Point Status/Control)\n  \\param [in]    fpscr  Floating Point Status/Control value to set\n */\n__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)\n{\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n  register uint32_t __regfpscr         __ASM(\"fpscr\");\n  __regfpscr = (fpscr);\n#else\n  (void)fpscr;\n#endif\n}\n\n/** \\brief  Get CPSR (Current Program Status Register)\n    \\return               CPSR Register value\n */\n__STATIC_INLINE uint32_t __get_CPSR(void)\n{\n  register uint32_t __regCPSR          __ASM(\"cpsr\");\n  return(__regCPSR);\n}\n\n\n/** \\brief  Set CPSR (Current Program Status Register)\n    \\param [in]    cpsr  CPSR value to set\n */\n__STATIC_INLINE void __set_CPSR(uint32_t cpsr)\n{\n  register uint32_t __regCPSR          __ASM(\"cpsr\");\n  __regCPSR = cpsr;\n}\n\n/** \\brief  Get Mode\n    \\return                Processor Mode\n */\n__STATIC_INLINE uint32_t __get_mode(void)\n{\n  return (__get_CPSR() & 0x1FU);\n}\n\n/** \\brief  Set Mode\n    \\param [in]    mode  Mode value to set\n */\n__STATIC_INLINE __ASM void __set_mode(uint32_t mode)\n{\n  MOV  r1, lr\n  MSR  CPSR_C, r0\n  BX   r1\n}\n\n/** \\brief  Get Stack Pointer\n    \\return Stack Pointer\n */\n__STATIC_INLINE __ASM uint32_t __get_SP(void)\n{\n  MOV  r0, sp\n  BX   lr\n}\n\n/** \\brief  Set Stack Pointer\n    \\param [in]    stack  Stack Pointer value to set\n */\n__STATIC_INLINE __ASM void __set_SP(uint32_t stack)\n{\n  MOV  sp, r0\n  BX   lr\n}\n\n\n/** \\brief  Get USR/SYS Stack Pointer\n    \\return USR/SYSStack Pointer\n */\n__STATIC_INLINE __ASM uint32_t __get_SP_usr(void)\n{\n  ARM\n  PRESERVE8\n\n  MRS     R1, CPSR\n  CPS     #0x1F       ;no effect in USR mode\n  MOV     R0, SP\n  MSR     CPSR_c, R1  ;no effect in USR mode\n  ISB\n  BX      LR\n}\n\n/** \\brief  Set USR/SYS Stack Pointer\n    \\param [in]    topOfProcStack  USR/SYS Stack Pointer value to set\n */\n__STATIC_INLINE __ASM void __set_SP_usr(uint32_t topOfProcStack)\n{\n  ARM\n  PRESERVE8\n\n  MRS     R1, CPSR\n  CPS     #0x1F       ;no effect in USR mode\n  MOV     SP, R0\n  MSR     CPSR_c, R1  ;no effect in USR mode\n  ISB\n  BX      LR\n}\n\n/** \\brief  Get FPEXC (Floating Point Exception Control Register)\n    \\return               Floating Point Exception Control Register value\n */\n__STATIC_INLINE uint32_t __get_FPEXC(void)\n{\n#if (__FPU_PRESENT == 1)\n  register uint32_t __regfpexc         __ASM(\"fpexc\");\n  return(__regfpexc);\n#else\n  return(0);\n#endif\n}\n\n/** \\brief  Set FPEXC (Floating Point Exception Control Register)\n    \\param [in]    fpexc  Floating Point Exception Control value to set\n */\n__STATIC_INLINE void __set_FPEXC(uint32_t fpexc)\n{\n#if (__FPU_PRESENT == 1)\n  register uint32_t __regfpexc         __ASM(\"fpexc\");\n  __regfpexc = (fpexc);\n#endif\n}\n\n/*\n * Include common core functions to access Coprocessor 15 registers\n */\n\n#define __get_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM(\"cp\" # cp \":\" # op1 \":c\" # CRn \":c\" # CRm \":\" # op2); (Rt) = tmp; } while(0)\n#define __set_CP(cp, op1, Rt, CRn, CRm, op2) do { register volatile uint32_t tmp __ASM(\"cp\" # cp \":\" # op1 \":c\" # CRn \":c\" # CRm \":\" # op2); tmp = (Rt); } while(0)\n#define __get_CP64(cp, op1, Rt, CRm) \\\n  do { \\\n    uint32_t ltmp, htmp; \\\n    __ASM volatile(\"MRRC p\" # cp \", \" # op1 \", ltmp, htmp, c\" # CRm); \\\n    (Rt) = ((((uint64_t)htmp) << 32U) | ((uint64_t)ltmp)); \\\n  } while(0)\n\n#define __set_CP64(cp, op1, Rt, CRm) \\\n  do { \\\n    const uint64_t tmp = (Rt); \\\n    const uint32_t ltmp = (uint32_t)(tmp); \\\n    const uint32_t htmp = (uint32_t)(tmp >> 32U); \\\n    __ASM volatile(\"MCRR p\" # cp \", \" # op1 \", ltmp, htmp, c\" # CRm); \\\n  } while(0)\n\n#include \"ca/cmsis_cp15_ca.h\"\n\n/** \\brief  Enable Floating Point Unit\n\n  Critical section, called from undef handler, so systick is disabled\n */\n__STATIC_INLINE __ASM void __FPU_Enable(void)\n{\n        ARM\n\n        //Permit access to VFP/NEON, registers by modifying CPACR\n        MRC     p15,0,R1,c1,c0,2\n        ORR     R1,R1,#0x00F00000\n        MCR     p15,0,R1,c1,c0,2\n\n        //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted\n        ISB\n\n        //Enable VFP/NEON\n        VMRS    R1,FPEXC\n        ORR     R1,R1,#0x40000000\n        VMSR    FPEXC,R1\n\n        //Initialise VFP/NEON registers to 0\n        MOV     R2,#0\n\n        //Initialise D16 registers to 0\n        VMOV    D0, R2,R2\n        VMOV    D1, R2,R2\n        VMOV    D2, R2,R2\n        VMOV    D3, R2,R2\n        VMOV    D4, R2,R2\n        VMOV    D5, R2,R2\n        VMOV    D6, R2,R2\n        VMOV    D7, R2,R2\n        VMOV    D8, R2,R2\n        VMOV    D9, R2,R2\n        VMOV    D10,R2,R2\n        VMOV    D11,R2,R2\n        VMOV    D12,R2,R2\n        VMOV    D13,R2,R2\n        VMOV    D14,R2,R2\n        VMOV    D15,R2,R2\n\n  IF {TARGET_FEATURE_EXTENSION_REGISTER_COUNT} == 32\n        //Initialise D32 registers to 0\n        VMOV    D16,R2,R2\n        VMOV    D17,R2,R2\n        VMOV    D18,R2,R2\n        VMOV    D19,R2,R2\n        VMOV    D20,R2,R2\n        VMOV    D21,R2,R2\n        VMOV    D22,R2,R2\n        VMOV    D23,R2,R2\n        VMOV    D24,R2,R2\n        VMOV    D25,R2,R2\n        VMOV    D26,R2,R2\n        VMOV    D27,R2,R2\n        VMOV    D28,R2,R2\n        VMOV    D29,R2,R2\n        VMOV    D30,R2,R2\n        VMOV    D31,R2,R2\n  ENDIF\n\n        //Initialise FPSCR to a known state\n        VMRS    R1,FPSCR\n        LDR     R2,=0x00086060 //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.\n        AND     R1,R1,R2\n        VMSR    FPSCR,R1\n\n        BX      LR\n}\n\n#endif /* __CMSIS_ARMCC_CA_H */\n"
  },
  {
    "path": "platform/cmsis/inc/ca/cmsis_armclang_ca.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_armclang.h\n * @brief    CMSIS compiler specific macros, functions, instructions\n * @version  V1.1.1\n * @date     15. May 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __CMSIS_ARMCLANG_CA_H\n#define __CMSIS_ARMCLANG_CA_H\n\n#pragma clang system_header   /* treat file as system include file */\n\n#ifndef __ARM_COMPAT_CA_H\n#include     /* Compatibility header for Arm Compiler 5 intrinsics */\n#endif\n\n/* CMSIS compiler specific defines */\n#ifndef   __ASM\n  #define __ASM                                  __asm\n#endif\n#ifndef   __INLINE\n  #define __INLINE                               __inline\n#endif\n#ifndef   __FORCEINLINE\n  #define __FORCEINLINE                          __attribute__((always_inline))\n#endif\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE                        static __inline\n#endif\n#ifndef   __STATIC_FORCEINLINE\n  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline\n#endif\n#ifndef   __NO_RETURN\n  #define __NO_RETURN                            __attribute__((__noreturn__))\n#endif\n#ifndef   CMSIS_DEPRECATED\n  #define CMSIS_DEPRECATED                       __attribute__((deprecated))\n#endif\n#ifndef   __USED\n  #define __USED                                 __attribute__((used))\n#endif\n#ifndef   __WEAK\n  #define __WEAK                                 __attribute__((weak))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __PACKED_STRUCT\n  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __UNALIGNED_UINT16_WRITE\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */\n  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT16_READ\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */\n  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __UNALIGNED_UINT32_WRITE\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */\n  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT32_READ\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __ALIGNED\n  #define __ALIGNED(x)                           __attribute__((aligned(x)))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed))\n#endif\n#ifndef   __COMPILER_BARRIER\n  #define __COMPILER_BARRIER()                   __ASM volatile(\"\":::\"memory\")\n#endif\n\n/* ##########################  Core Instruction Access  ######################### */\n/**\n  \\brief   No Operation\n */\n#define __NOP                             __builtin_arm_nop\n\n/**\n  \\brief   Wait For Interrupt\n */\n#define __WFI                             __builtin_arm_wfi\n\n/**\n  \\brief   Wait For Event\n */\n#define __WFE                             __builtin_arm_wfe\n\n/**\n  \\brief   Send Event\n */\n#define __SEV                             __builtin_arm_sev\n\n/**\n  \\brief   Instruction Synchronization Barrier\n */\n#define __ISB() do {\\\n                   __schedule_barrier();\\\n                   __builtin_arm_isb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n/**\n  \\brief   Data Synchronization Barrier\n */\n#define __DSB() do {\\\n                   __schedule_barrier();\\\n                   __builtin_arm_dsb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n/**\n  \\brief   Data Memory Barrier\n */\n#define __DMB() do {\\\n                   __schedule_barrier();\\\n                   __builtin_arm_dmb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n/**\n  \\brief   Reverse byte order (32 bit)\n  \\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REV(value)   __builtin_bswap32(value)\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REV16(value) __ROR(__REV(value), 16)\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REVSH(value) (int16_t)__builtin_bswap16(value)\n\n\n/**\n  \\brief   Rotate Right in unsigned value (32 bit)\n  \\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.\n  \\param [in]    op1  Value to rotate\n  \\param [in]    op2  Number of Bits to rotate\n  \\return               Rotated value\n */\n__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)\n{\n  op2 %= 32U;\n  if (op2 == 0U)\n  {\n    return op1;\n  }\n  return (op1 >> op2) | (op1 << (32U - op2));\n}\n\n\n/**\n  \\brief   Breakpoint\n  \\param [in]    value  is ignored by the processor.\n                 If required, a debugger can use it to store additional information about the breakpoint.\n */\n#define __BKPT(value)   __ASM volatile (\"bkpt \"#value)\n\n/**\n  \\brief   Reverse bit order of value\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __RBIT          __builtin_arm_rbit\n\n/**\n  \\brief   Count leading zeros\n  \\param [in]  value  Value to count the leading zeros\n  \\return             number of leading zeros in value\n */\n__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)\n{\n  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally\n     __builtin_clz(0) is undefined behaviour, so handle this case specially.\n     This guarantees ARM-compatible results if happening to compile on a non-ARM\n     target, and ensures the compiler doesn't decide to activate any\n     optimisations using the logic \"value was passed to __builtin_clz, so it\n     is non-zero\".\n     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a\n     single CLZ instruction.\n   */\n  if (value == 0U)\n  {\n    return 32U;\n  }\n  return __builtin_clz(value);\n}\n\n/**\n  \\brief   LDR Exclusive (8 bit)\n  \\details Executes a exclusive LDR instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n#define __LDREXB        (uint8_t)__builtin_arm_ldrex\n\n\n/**\n  \\brief   LDR Exclusive (16 bit)\n  \\details Executes a exclusive LDR instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n#define __LDREXH        (uint16_t)__builtin_arm_ldrex\n\n/**\n  \\brief   LDR Exclusive (32 bit)\n  \\details Executes a exclusive LDR instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n#define __LDREXW        (uint32_t)__builtin_arm_ldrex\n\n/**\n  \\brief   STR Exclusive (8 bit)\n  \\details Executes a exclusive STR instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXB        (uint32_t)__builtin_arm_strex\n\n/**\n  \\brief   STR Exclusive (16 bit)\n  \\details Executes a exclusive STR instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXH        (uint32_t)__builtin_arm_strex\n\n/**\n  \\brief   STR Exclusive (32 bit)\n  \\details Executes a exclusive STR instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXW        (uint32_t)__builtin_arm_strex\n\n/**\n  \\brief   Remove the exclusive lock\n  \\details Removes the exclusive lock which is created by LDREX.\n */\n#define __CLREX             __builtin_arm_clrex\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n#define __SSAT             __builtin_arm_ssat\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n#define __USAT             __builtin_arm_usat\n\n/* ###################  Compiler specific Intrinsics  ########################### */\n/** \\defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics\n  Access to dedicated SIMD instructions\n  @{\n*/\n\n#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))\n\n#define     __QADD8                 __builtin_arm_qadd8\n#define     __QSUB8                 __builtin_arm_qsub8\n#define     __QADD16                __builtin_arm_qadd16\n#define     __SHADD16               __builtin_arm_shadd16\n#define     __QSUB16                __builtin_arm_qsub16\n#define     __SHSUB16               __builtin_arm_shsub16\n#define     __QASX                  __builtin_arm_qasx\n#define     __SHASX                 __builtin_arm_shasx\n#define     __QSAX                  __builtin_arm_qsax\n#define     __SHSAX                 __builtin_arm_shsax\n#define     __SXTB16                __builtin_arm_sxtb16\n#define     __SMUAD                 __builtin_arm_smuad\n#define     __SMUADX                __builtin_arm_smuadx\n#define     __SMLAD                 __builtin_arm_smlad\n#define     __SMLADX                __builtin_arm_smladx\n#define     __SMLALD                __builtin_arm_smlald\n#define     __SMLALDX               __builtin_arm_smlaldx\n#define     __SMUSD                 __builtin_arm_smusd\n#define     __SMUSDX                __builtin_arm_smusdx\n#define     __SMLSDX                __builtin_arm_smlsdx\n\n\n\n__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"qadd %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"qsub %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \\\n                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )\n\n#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \\\n                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )\n\n__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)\n{\n  int32_t result;\n\n  __ASM volatile (\"smmla %0, %1, %2, %3\" : \"=r\" (result): \"r\"  (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n#endif /* (__ARM_FEATURE_DSP == 1) */\n\n/* ###########################  Core Function Access  ########################### */\n\n/**\n  \\brief   Get FPSCR\n  \\details Returns the current value of the Floating Point Status/Control register.\n  \\return               Floating Point Status/Control register value\n */\n#define __get_FPSCR      __builtin_arm_get_fpscr\n\n/**\n  \\brief   Set FPSCR\n  \\details Assigns the given value to the Floating Point Status/Control register.\n  \\param [in]    fpscr  Floating Point Status/Control value to set\n */\n#define __set_FPSCR      __builtin_arm_set_fpscr\n\n/** \\brief  Get CPSR Register\n    \\return               CPSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CPSR(void)\n{\n  uint32_t result;\n  __ASM volatile(\"MRS %0, cpsr\" : \"=r\" (result) );\n  return(result);\n}\n\n/** \\brief  Set CPSR Register\n    \\param [in]    cpsr  CPSR value to set\n */\n__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)\n{\n__ASM volatile (\"MSR cpsr, %0\" : : \"r\" (cpsr) : \"memory\");\n}\n\n/** \\brief  Get Mode\n    \\return                Processor Mode\n */\n__STATIC_FORCEINLINE uint32_t __get_mode(void)\n{\n\treturn (__get_CPSR() & 0x1FU);\n}\n\n/** \\brief  Set Mode\n    \\param [in]    mode  Mode value to set\n */\n__STATIC_FORCEINLINE void __set_mode(uint32_t mode)\n{\n  __ASM volatile(\"MSR  cpsr_c, %0\" : : \"r\" (mode) : \"memory\");\n}\n\n/** \\brief  Get Stack Pointer\n    \\return Stack Pointer value\n */\n__STATIC_FORCEINLINE uint32_t __get_SP()\n{\n  uint32_t result;\n  __ASM volatile(\"MOV  %0, sp\" : \"=r\" (result) : : \"memory\");\n  return result;\n}\n\n/** \\brief  Set Stack Pointer\n    \\param [in]    stack  Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_SP(uint32_t stack)\n{\n  __ASM volatile(\"MOV  sp, %0\" : : \"r\" (stack) : \"memory\");\n}\n\n/** \\brief  Get USR/SYS Stack Pointer\n    \\return USR/SYS Stack Pointer value\n */\n__STATIC_FORCEINLINE uint32_t __get_SP_usr()\n{\n  uint32_t cpsr;\n  uint32_t result;\n  __ASM volatile(\n    \"MRS     %0, cpsr   \\n\"\n    \"CPS     #0x1F      \\n\" // no effect in USR mode\n    \"MOV     %1, sp     \\n\"\n    \"MSR     cpsr_c, %0 \\n\" // no effect in USR mode\n    \"ISB\" :  \"=r\"(cpsr), \"=r\"(result) : : \"memory\"\n   );\n  return result;\n}\n\n/** \\brief  Set USR/SYS Stack Pointer\n    \\param [in]    topOfProcStack  USR/SYS Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)\n{\n  uint32_t cpsr;\n  __ASM volatile(\n    \"MRS     %0, cpsr   \\n\"\n    \"CPS     #0x1F      \\n\" // no effect in USR mode\n    \"MOV     sp, %1     \\n\"\n    \"MSR     cpsr_c, %0 \\n\" // no effect in USR mode\n    \"ISB\" : \"=r\"(cpsr) : \"r\" (topOfProcStack) : \"memory\"\n   );\n}\n\n/** \\brief  Get FPEXC\n    \\return               Floating Point Exception Control register value\n */\n__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)\n{\n#if (__FPU_PRESENT == 1)\n  uint32_t result;\n  __ASM volatile(\"VMRS %0, fpexc\" : \"=r\" (result) : : \"memory\");\n  return(result);\n#else\n  return(0);\n#endif\n}\n\n/** \\brief  Set FPEXC\n    \\param [in]    fpexc  Floating Point Exception Control value to set\n */\n__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)\n{\n#if (__FPU_PRESENT == 1)\n  __ASM volatile (\"VMSR fpexc, %0\" : : \"r\" (fpexc) : \"memory\");\n#endif\n}\n\n/*\n * Include common core functions to access Coprocessor 15 registers\n */\n\n#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile(\"MRC p\" # cp \", \" # op1 \", %0, c\" # CRn \", c\" # CRm \", \" # op2 : \"=r\" (Rt) : : \"memory\" )\n#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile(\"MCR p\" # cp \", \" # op1 \", %0, c\" # CRn \", c\" # CRm \", \" # op2 : : \"r\" (Rt) : \"memory\" )\n#define __get_CP64(cp, op1, Rt, CRm)         __ASM volatile(\"MRRC p\" # cp \", \" # op1 \", %Q0, %R0, c\" # CRm  : \"=r\" (Rt) : : \"memory\" )\n#define __set_CP64(cp, op1, Rt, CRm)         __ASM volatile(\"MCRR p\" # cp \", \" # op1 \", %Q0, %R0, c\" # CRm  : : \"r\" (Rt) : \"memory\" )\n\n#include \"ca/cmsis_cp15_ca.h\"\n\n/** \\brief  Enable Floating Point Unit\n\n  Critical section, called from undef handler, so systick is disabled\n */\n__STATIC_INLINE void __FPU_Enable(void)\n{\n  __ASM volatile(\n    //Permit access to VFP/NEON, registers by modifying CPACR\n    \"        MRC     p15,0,R1,c1,c0,2  \\n\"\n    \"        ORR     R1,R1,#0x00F00000 \\n\"\n    \"        MCR     p15,0,R1,c1,c0,2  \\n\"\n\n    //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted\n    \"        ISB                       \\n\"\n\n    //Enable VFP/NEON\n    \"        VMRS    R1,FPEXC          \\n\"\n    \"        ORR     R1,R1,#0x40000000 \\n\"\n    \"        VMSR    FPEXC,R1          \\n\"\n\n    //Initialise VFP/NEON registers to 0\n    \"        MOV     R2,#0             \\n\"\n\n    //Initialise D16 registers to 0\n    \"        VMOV    D0, R2,R2         \\n\"\n    \"        VMOV    D1, R2,R2         \\n\"\n    \"        VMOV    D2, R2,R2         \\n\"\n    \"        VMOV    D3, R2,R2         \\n\"\n    \"        VMOV    D4, R2,R2         \\n\"\n    \"        VMOV    D5, R2,R2         \\n\"\n    \"        VMOV    D6, R2,R2         \\n\"\n    \"        VMOV    D7, R2,R2         \\n\"\n    \"        VMOV    D8, R2,R2         \\n\"\n    \"        VMOV    D9, R2,R2         \\n\"\n    \"        VMOV    D10,R2,R2         \\n\"\n    \"        VMOV    D11,R2,R2         \\n\"\n    \"        VMOV    D12,R2,R2         \\n\"\n    \"        VMOV    D13,R2,R2         \\n\"\n    \"        VMOV    D14,R2,R2         \\n\"\n    \"        VMOV    D15,R2,R2         \\n\"\n\n#if __ARM_NEON == 1\n    //Initialise D32 registers to 0\n    \"        VMOV    D16,R2,R2         \\n\"\n    \"        VMOV    D17,R2,R2         \\n\"\n    \"        VMOV    D18,R2,R2         \\n\"\n    \"        VMOV    D19,R2,R2         \\n\"\n    \"        VMOV    D20,R2,R2         \\n\"\n    \"        VMOV    D21,R2,R2         \\n\"\n    \"        VMOV    D22,R2,R2         \\n\"\n    \"        VMOV    D23,R2,R2         \\n\"\n    \"        VMOV    D24,R2,R2         \\n\"\n    \"        VMOV    D25,R2,R2         \\n\"\n    \"        VMOV    D26,R2,R2         \\n\"\n    \"        VMOV    D27,R2,R2         \\n\"\n    \"        VMOV    D28,R2,R2         \\n\"\n    \"        VMOV    D29,R2,R2         \\n\"\n    \"        VMOV    D30,R2,R2         \\n\"\n    \"        VMOV    D31,R2,R2         \\n\"\n#endif\n\n    //Initialise FPSCR to a known state\n    \"        VMRS    R1,FPSCR          \\n\"\n    \"        LDR     R2,=0x00086060    \\n\" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.\n    \"        AND     R1,R1,R2          \\n\"\n    \"        VMSR    FPSCR,R1            \"\n    : : : \"cc\", \"r1\", \"r2\"\n  );\n}\n\n#endif /* __CMSIS_ARMCLANG_CA_H */\n"
  },
  {
    "path": "platform/cmsis/inc/ca/cmsis_compiler_ca.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_compiler.h\n * @brief    CMSIS compiler specific macros, functions, instructions\n * @version  V1.0.2\n * @date     10. January 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __CMSIS_COMPILER_CA_H\n#define __CMSIS_COMPILER_CA_H\n\n#include \n\n/*\n * Arm Compiler 4/5\n */\n#if   defined ( __CC_ARM )\n  #include \"ca/cmsis_armcc_ca.h\"\n\n\n/*\n * Arm Compiler 6 (armclang)\n */\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #include \"ca/cmsis_armclang_ca.h\"\n\n\n/*\n * GNU Compiler\n */\n#elif defined ( __GNUC__ )\n  #include \"ca/cmsis_gcc_ca.h\"\n\n\n/*\n * IAR Compiler\n */\n#elif defined ( __ICCARM__ )\n  #include \"ca/cmsis_iccarm_ca.h\"\n\n\n/*\n * TI Arm Compiler\n */\n#elif defined ( __TI_ARM__ )\n  #include \n\n  #ifndef   __ASM\n    #define __ASM                     __asm\n  #endif\n  #ifndef   __INLINE\n    #define __INLINE                  inline\n  #endif\n  #ifndef   __STATIC_INLINE\n    #define __STATIC_INLINE           static inline\n  #endif\n  #ifndef   __STATIC_INLINE\n    #define __STATIC_INLINE           static inline\n  #endif\n  #ifndef   __STATIC_FORCEINLINE\n    #define __STATIC_FORCEINLINE      __STATIC_INLINE\n  #endif\n  #ifndef   __NO_RETURN\n    #define __NO_RETURN               __attribute__((noreturn))\n  #endif\n  #ifndef   CMSIS_DEPRECATED\n    #define CMSIS_DEPRECATED          __attribute__((deprecated))\n  #endif\n  #ifndef   __USED\n    #define __USED                    __attribute__((used))\n  #endif\n  #ifndef   __WEAK\n    #define __WEAK                    __attribute__((weak))\n  #endif\n  #ifndef   __UNALIGNED_UINT32\n    struct __attribute__((packed)) T_UINT32 { uint32_t v; };\n    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)\n  #endif\n  #ifndef   __ALIGNED\n    #define __ALIGNED(x)              __attribute__((aligned(x)))\n  #endif\n  #ifndef   __PACKED\n    #define __PACKED                  __attribute__((packed))\n  #endif\n  #ifndef   __COMPILER_BARRIER\n    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.\n    #define __COMPILER_BARRIER()      (void)0\n  #endif\n\n\n/*\n * TASKING Compiler\n */\n#elif defined ( __TASKING__ )\n  /*\n   * The CMSIS functions have been implemented as intrinsics in the compiler.\n   * Please use \"carm -?i\" to get an up to date list of all intrinsics,\n   * Including the CMSIS ones.\n   */\n\n  #ifndef   __ASM\n    #define __ASM                     __asm\n  #endif\n  #ifndef   __INLINE\n    #define __INLINE                  inline\n  #endif\n  #ifndef   __STATIC_INLINE\n    #define __STATIC_INLINE           static inline\n  #endif\n  #ifndef   __STATIC_FORCEINLINE\n    #define __STATIC_FORCEINLINE      __STATIC_INLINE\n  #endif\n  #ifndef   __NO_RETURN\n    #define __NO_RETURN               __attribute__((noreturn))\n  #endif\n  #ifndef   CMSIS_DEPRECATED\n    #define CMSIS_DEPRECATED          __attribute__((deprecated))\n  #endif\n  #ifndef   __USED\n    #define __USED                    __attribute__((used))\n  #endif\n  #ifndef   __WEAK\n    #define __WEAK                    __attribute__((weak))\n  #endif\n  #ifndef   __UNALIGNED_UINT32\n    struct __packed__ T_UINT32 { uint32_t v; };\n    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)\n  #endif\n  #ifndef   __ALIGNED\n    #define __ALIGNED(x)              __align(x)\n  #endif\n  #ifndef   __PACKED\n    #define __PACKED                  __packed__\n  #endif\n  #ifndef   __COMPILER_BARRIER\n    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.\n    #define __COMPILER_BARRIER()      (void)0\n  #endif\n\n\n/*\n * COSMIC Compiler\n */\n#elif defined ( __CSMC__ )\n   #include \n\n #ifndef   __ASM\n    #define __ASM                     _asm\n  #endif\n  #ifndef   __INLINE\n    #define __INLINE                  inline\n  #endif\n  #ifndef   __STATIC_INLINE\n    #define __STATIC_INLINE           static inline\n  #endif\n  #ifndef   __STATIC_FORCEINLINE\n    #define __STATIC_FORCEINLINE      __STATIC_INLINE\n  #endif\n  #ifndef   __NO_RETURN\n    // NO RETURN is automatically detected hence no warning here\n    #define __NO_RETURN\n  #endif\n  #ifndef   __USED\n    #warning No compiler specific solution for __USED. __USED is ignored.\n    #define __USED\n  #endif\n  #ifndef   CMSIS_DEPRECATED\n    #warning No compiler specific solution for CMSIS_DEPRECATED. CMSIS_DEPRECATED is ignored.\n    #define CMSIS_DEPRECATED\n  #endif\n  #ifndef   __WEAK\n    #define __WEAK                    __weak\n  #endif\n  #ifndef   __UNALIGNED_UINT32\n    @packed struct T_UINT32 { uint32_t v; };\n    #define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)\n  #endif\n  #ifndef   __ALIGNED\n    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.\n    #define __ALIGNED(x)\n  #endif\n  #ifndef   __PACKED\n    #define __PACKED                  @packed\n  #endif\n  #ifndef   __COMPILER_BARRIER\n    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.\n    #define __COMPILER_BARRIER()      (void)0\n  #endif\n\n\n#else\n  #error Unknown compiler.\n#endif\n\n\n#endif /* __CMSIS_COMPILER_CA_H */\n\n"
  },
  {
    "path": "platform/cmsis/inc/ca/cmsis_cp15_ca.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_cp15.h\n * @brief    CMSIS compiler specific macros, functions, instructions\n * @version  V1.0.1\n * @date     07. Sep 2017\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2017 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CMSIS_CP15_CA_H\n#define __CMSIS_CP15_CA_H\n\n/** \\brief  Get ACTLR\n    \\return               Auxiliary Control register value\n */\n__STATIC_FORCEINLINE uint32_t __get_ACTLR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 1, 0, 1);\n  return(result);\n}\n\n/** \\brief  Set ACTLR\n    \\param [in]    actlr  Auxiliary Control value to set\n */\n__STATIC_FORCEINLINE void __set_ACTLR(uint32_t actlr)\n{\n  __set_CP(15, 0, actlr, 1, 0, 1);\n}\n\n/** \\brief  Get CPACR\n    \\return               Coprocessor Access Control register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CPACR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 1, 0, 2);\n  return result;\n}\n\n/** \\brief  Set CPACR\n    \\param [in]    cpacr  Coprocessor Access Control value to set\n */\n__STATIC_FORCEINLINE void __set_CPACR(uint32_t cpacr)\n{\n  __set_CP(15, 0, cpacr, 1, 0, 2);\n}\n\n/** \\brief  Get DFSR\n    \\return               Data Fault Status Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_DFSR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 5, 0, 0);\n  return result;\n}\n\n/** \\brief  Set DFSR\n    \\param [in]    dfsr  Data Fault Status value to set\n */\n__STATIC_FORCEINLINE void __set_DFSR(uint32_t dfsr)\n{\n  __set_CP(15, 0, dfsr, 5, 0, 0);\n}\n\n/** \\brief  Get IFSR\n    \\return               Instruction Fault Status Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_IFSR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 5, 0, 1);\n  return result;\n}\n\n/** \\brief  Set IFSR\n    \\param [in]    ifsr  Instruction Fault Status value to set\n */\n__STATIC_FORCEINLINE void __set_IFSR(uint32_t ifsr)\n{\n  __set_CP(15, 0, ifsr, 5, 0, 1);\n}\n\n/** \\brief  Get ISR\n    \\return               Interrupt Status Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_ISR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 12, 1, 0);\n  return result;\n}\n\n/** \\brief  Get CBAR\n    \\return               Configuration Base Address register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CBAR(void)\n{\n  uint32_t result;\n  __get_CP(15, 4, result, 15, 0, 0);\n  return result;\n}\n\n/** \\brief  Get TTBR0\n\n    This function returns the value of the Translation Table Base Register 0.\n\n    \\return               Translation Table Base Register 0 value\n */\n__STATIC_FORCEINLINE uint32_t __get_TTBR0(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 2, 0, 0);\n  return result;\n}\n\n/** \\brief  Set TTBR0\n\n    This function assigns the given value to the Translation Table Base Register 0.\n\n    \\param [in]    ttbr0  Translation Table Base Register 0 value to set\n */\n__STATIC_FORCEINLINE void __set_TTBR0(uint32_t ttbr0)\n{\n  __set_CP(15, 0, ttbr0, 2, 0, 0);\n}\n\n/** \\brief  Get DACR\n\n    This function returns the value of the Domain Access Control Register.\n\n    \\return               Domain Access Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_DACR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 3, 0, 0);\n  return result;\n}\n\n/** \\brief  Set DACR\n\n    This function assigns the given value to the Domain Access Control Register.\n\n    \\param [in]    dacr   Domain Access Control Register value to set\n */\n__STATIC_FORCEINLINE void __set_DACR(uint32_t dacr)\n{\n  __set_CP(15, 0, dacr, 3, 0, 0);\n}\n\n/** \\brief  Set SCTLR\n\n    This function assigns the given value to the System Control Register.\n\n    \\param [in]    sctlr  System Control Register value to set\n */\n__STATIC_FORCEINLINE void __set_SCTLR(uint32_t sctlr)\n{\n  __set_CP(15, 0, sctlr, 1, 0, 0);\n}\n\n/** \\brief  Get SCTLR\n    \\return               System Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_SCTLR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 1, 0, 0);\n  return result;\n}\n\n/** \\brief  Set ACTRL\n    \\param [in]    actrl  Auxiliary Control Register value to set\n */\n__STATIC_FORCEINLINE void __set_ACTRL(uint32_t actrl)\n{\n  __set_CP(15, 0, actrl, 1, 0, 1);\n}\n\n/** \\brief  Get ACTRL\n    \\return               Auxiliary Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_ACTRL(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 1, 0, 1);\n  return result;\n}\n\n/** \\brief  Get MPIDR\n\n    This function returns the value of the Multiprocessor Affinity Register.\n\n    \\return               Multiprocessor Affinity Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_MPIDR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 0, 0, 5);\n  return result;\n}\n\n/** \\brief  Get VBAR\n\n    This function returns the value of the Vector Base Address Register.\n\n    \\return               Vector Base Address Register\n */\n__STATIC_FORCEINLINE uint32_t __get_VBAR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 12, 0, 0);\n  return result;\n}\n\n/** \\brief  Set VBAR\n\n    This function assigns the given value to the Vector Base Address Register.\n\n    \\param [in]    vbar  Vector Base Address Register value to set\n */\n__STATIC_FORCEINLINE void __set_VBAR(uint32_t vbar)\n{\n  __set_CP(15, 0, vbar, 12, 0, 0);\n}\n\n/** \\brief  Get MVBAR\n\n    This function returns the value of the Monitor Vector Base Address Register.\n\n    \\return               Monitor Vector Base Address Register\n */\n__STATIC_FORCEINLINE uint32_t __get_MVBAR(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 12, 0, 1);\n  return result;\n}\n\n/** \\brief  Set MVBAR\n\n    This function assigns the given value to the Monitor Vector Base Address Register.\n\n    \\param [in]    mvbar  Monitor Vector Base Address Register value to set\n */\n__STATIC_FORCEINLINE void __set_MVBAR(uint32_t mvbar)\n{\n  __set_CP(15, 0, mvbar, 12, 0, 1);\n}\n\n#if (defined(__CORTEX_A) && (__CORTEX_A == 7U) && \\\n    defined(__TIM_PRESENT) && (__TIM_PRESENT == 1U)) || \\\n    defined(DOXYGEN)\n\n/** \\brief  Set CNTFRQ\n\n  This function assigns the given value to PL1 Physical Timer Counter Frequency Register (CNTFRQ).\n\n  \\param [in]    value  CNTFRQ Register value to set\n*/\n__STATIC_FORCEINLINE void __set_CNTFRQ(uint32_t value)\n{\n  __set_CP(15, 0, value, 14, 0, 0);\n}\n\n/** \\brief  Get CNTFRQ\n\n    This function returns the value of the PL1 Physical Timer Counter Frequency Register (CNTFRQ).\n\n    \\return               CNTFRQ Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CNTFRQ(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 14, 0 , 0);\n  return result;\n}\n\n/** \\brief  Set CNTP_TVAL\n\n  This function assigns the given value to PL1 Physical Timer Value Register (CNTP_TVAL).\n\n  \\param [in]    value  CNTP_TVAL Register value to set\n*/\n__STATIC_FORCEINLINE void __set_CNTP_TVAL(uint32_t value)\n{\n  __set_CP(15, 0, value, 14, 2, 0);\n}\n\n/** \\brief  Get CNTP_TVAL\n\n    This function returns the value of the PL1 Physical Timer Value Register (CNTP_TVAL).\n\n    \\return               CNTP_TVAL Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CNTP_TVAL(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 14, 2, 0);\n  return result;\n}\n\n/** \\brief  Get CNTPCT\n\n    This function returns the value of the 64 bits PL1 Physical Count Register (CNTPCT).\n\n    \\return               CNTPCT Register value\n */\n__STATIC_FORCEINLINE uint64_t __get_CNTPCT(void)\n{\n  uint64_t result;\n  __get_CP64(15, 0, result, 14);\n  return result;\n}\n\n/** \\brief  Set CNTP_CVAL\n\n  This function assigns the given value to 64bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).\n\n  \\param [in]    value  CNTP_CVAL Register value to set\n*/\n__STATIC_FORCEINLINE void __set_CNTP_CVAL(uint64_t value)\n{\n  __set_CP64(15, 2, value, 14);\n}\n\n/** \\brief  Get CNTP_CVAL\n\n    This function returns the value of the 64 bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).\n\n    \\return               CNTP_CVAL Register value\n */\n__STATIC_FORCEINLINE uint64_t __get_CNTP_CVAL(void)\n{\n  uint64_t result;\n  __get_CP64(15, 2, result, 14);\n  return result;\n}\n\n/** \\brief  Set CNTP_CTL\n\n  This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL).\n\n  \\param [in]    value  CNTP_CTL Register value to set\n*/\n__STATIC_FORCEINLINE void __set_CNTP_CTL(uint32_t value)\n{\n  __set_CP(15, 0, value, 14, 2, 1);\n}\n\n/** \\brief  Get CNTP_CTL register\n    \\return               CNTP_CTL Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CNTP_CTL(void)\n{\n  uint32_t result;\n  __get_CP(15, 0, result, 14, 2, 1);\n  return result;\n}\n\n#endif\n\n/** \\brief  Set TLBIALL\n\n  TLB Invalidate All\n */\n__STATIC_FORCEINLINE void __set_TLBIALL(uint32_t value)\n{\n  __set_CP(15, 0, value, 8, 7, 0);\n}\n\n/** \\brief  Set BPIALL.\n\n  Branch Predictor Invalidate All\n */\n__STATIC_FORCEINLINE void __set_BPIALL(uint32_t value)\n{\n  __set_CP(15, 0, value, 7, 5, 6);\n}\n\n/** \\brief  Set ICIALLU\n\n  Instruction Cache Invalidate All\n */\n__STATIC_FORCEINLINE void __set_ICIALLU(uint32_t value)\n{\n  __set_CP(15, 0, value, 7, 5, 0);\n}\n\n/** \\brief  Set DCCMVAC\n\n  Data cache clean\n */\n__STATIC_FORCEINLINE void __set_DCCMVAC(uint32_t value)\n{\n  __set_CP(15, 0, value, 7, 10, 1);\n}\n\n/** \\brief  Set DCIMVAC\n\n  Data cache invalidate\n */\n__STATIC_FORCEINLINE void __set_DCIMVAC(uint32_t value)\n{\n  __set_CP(15, 0, value, 7, 6, 1);\n}\n\n/** \\brief  Set DCCIMVAC\n\n  Data cache clean and invalidate\n */\n__STATIC_FORCEINLINE void __set_DCCIMVAC(uint32_t value)\n{\n  __set_CP(15, 0, value, 7, 14, 1);\n}\n\n/** \\brief  Set CSSELR\n */\n__STATIC_FORCEINLINE void __set_CSSELR(uint32_t value)\n{\n//  __ASM volatile(\"MCR p15, 2, %0, c0, c0, 0\" : : \"r\"(value) : \"memory\");\n  __set_CP(15, 2, value, 0, 0, 0);\n}\n\n/** \\brief  Get CSSELR\n    \\return CSSELR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CSSELR(void)\n{\n  uint32_t result;\n//  __ASM volatile(\"MRC p15, 2, %0, c0, c0, 0\" : \"=r\"(result) : : \"memory\");\n  __get_CP(15, 2, result, 0, 0, 0);\n  return result;\n}\n\n/** \\brief  Set CCSIDR\n    \\deprecated CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead.\n */\nCMSIS_DEPRECATED\n__STATIC_FORCEINLINE void __set_CCSIDR(uint32_t value)\n{\n  __set_CSSELR(value);\n}\n\n/** \\brief  Get CCSIDR\n    \\return CCSIDR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CCSIDR(void)\n{\n  uint32_t result;\n//  __ASM volatile(\"MRC p15, 1, %0, c0, c0, 0\" : \"=r\"(result) : : \"memory\");\n  __get_CP(15, 1, result, 0, 0, 0);\n  return result;\n}\n\n/** \\brief  Get CLIDR\n    \\return CLIDR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CLIDR(void)\n{\n  uint32_t result;\n//  __ASM volatile(\"MRC p15, 1, %0, c0, c0, 1\" : \"=r\"(result) : : \"memory\");\n  __get_CP(15, 1, result, 0, 0, 1);\n  return result;\n}\n\n/** \\brief  Set DCISW\n */\n__STATIC_FORCEINLINE void __set_DCISW(uint32_t value)\n{\n//  __ASM volatile(\"MCR p15, 0, %0, c7, c6, 2\" : : \"r\"(value) : \"memory\")\n  __set_CP(15, 0, value, 7, 6, 2);\n}\n\n/** \\brief  Set DCCSW\n */\n__STATIC_FORCEINLINE void __set_DCCSW(uint32_t value)\n{\n//  __ASM volatile(\"MCR p15, 0, %0, c7, c10, 2\" : : \"r\"(value) : \"memory\")\n  __set_CP(15, 0, value, 7, 10, 2);\n}\n\n/** \\brief  Set DCCISW\n */\n__STATIC_FORCEINLINE void __set_DCCISW(uint32_t value)\n{\n//  __ASM volatile(\"MCR p15, 0, %0, c7, c14, 2\" : : \"r\"(value) : \"memory\")\n  __set_CP(15, 0, value, 7, 14, 2);\n}\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/ca/cmsis_gcc_ca.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_gcc.h\n * @brief    CMSIS compiler specific macros, functions, instructions\n * @version  V1.2.0\n * @date     17. May 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __CMSIS_GCC_CA_H\n#define __CMSIS_GCC_CA_H\n\n/* ignore some GCC warnings */\n#pragma GCC diagnostic push\n#pragma GCC diagnostic ignored \"-Wsign-conversion\"\n#pragma GCC diagnostic ignored \"-Wconversion\"\n#pragma GCC diagnostic ignored \"-Wunused-parameter\"\n\n/* Fallback for __has_builtin */\n#ifndef __has_builtin\n  #define __has_builtin(x) (0)\n#endif\n\n/* CMSIS compiler specific defines */\n\n#ifndef   __ASM\n  #define __ASM                                  __asm\n#endif\n#ifndef   __INLINE\n  #define __INLINE                               inline\n#endif\n#ifndef   __FORCEINLINE\n  #define __FORCEINLINE                          __attribute__((always_inline))\n#endif\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE                        static inline\n#endif\n#ifndef   __STATIC_FORCEINLINE\n  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline\n#endif\n#ifndef   __NO_RETURN\n  #define __NO_RETURN                            __attribute__((__noreturn__))\n#endif\n#ifndef   CMSIS_DEPRECATED\n #define  CMSIS_DEPRECATED                       __attribute__((deprecated))\n#endif\n#ifndef   __USED\n  #define __USED                                 __attribute__((used))\n#endif\n#ifndef   __WEAK\n  #define __WEAK                                 __attribute__((weak))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __PACKED_STRUCT\n  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __UNALIGNED_UINT16_WRITE\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */\n  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT16_READ\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */\n  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __UNALIGNED_UINT32_WRITE\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */\n  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT32_READ\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __ALIGNED\n  #define __ALIGNED(x)                           __attribute__((aligned(x)))\n#endif\n#ifndef   __COMPILER_BARRIER\n  #define __COMPILER_BARRIER()                   __ASM volatile(\"\":::\"memory\")\n#endif\n\n\n__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n\n__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"qadd %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    uint64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlald %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlald %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"qsub %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smuad %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \\\n                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )\n\n__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smlad %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smuadx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smladx %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    uint64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlaldx %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlaldx %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)\n{\n int32_t result;\n\n __ASM volatile (\"smmla %0, %1, %2, %3\" : \"=r\" (result): \"r\"  (op1), \"r\" (op2), \"r\" (op3) );\n return(result);\n}\n\n\n\n\n/* ##########################  Core Instruction Access  ######################### */\n/**\n  \\brief   No Operation\n */\n#define __NOP()                             __ASM volatile (\"nop\")\n\n/**\n  \\brief   Wait For Interrupt\n */\n#define __WFI()                             __ASM volatile (\"wfi\")\n\n/**\n  \\brief   Wait For Event\n */\n#define __WFE()                             __ASM volatile (\"wfe\")\n\n/**\n  \\brief   Send Event\n */\n#define __SEV()                             __ASM volatile (\"sev\")\n\n/**\n  \\brief   Instruction Synchronization Barrier\n  \\details Instruction Synchronization Barrier flushes the pipeline in the processor,\n           so that all instructions following the ISB are fetched from cache or memory,\n           after the instruction has been completed.\n */\n__STATIC_FORCEINLINE  void __ISB(void)\n{\n  __ASM volatile (\"isb 0xF\":::\"memory\");\n}\n\n\n/**\n  \\brief   Data Synchronization Barrier\n  \\details Acts as a special kind of Data Memory Barrier.\n           It completes when all explicit memory accesses before this instruction complete.\n */\n__STATIC_FORCEINLINE  void __DSB(void)\n{\n  __ASM volatile (\"dsb 0xF\":::\"memory\");\n}\n\n/**\n  \\brief   Data Memory Barrier\n  \\details Ensures the apparent order of the explicit memory operations before\n           and after the instruction, without ensuring their completion.\n */\n__STATIC_FORCEINLINE  void __DMB(void)\n{\n  __ASM volatile (\"dmb 0xF\":::\"memory\");\n}\n\n/**\n  \\brief   Reverse byte order (32 bit)\n  \\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n__STATIC_FORCEINLINE  uint32_t __REV(uint32_t value)\n{\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)\n  return __builtin_bswap32(value);\n#else\n  uint32_t result;\n\n  __ASM volatile (\"rev %0, %1\" : \"=r\" (result) : \"r\" (value) );\n  return result;\n#endif\n}\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#ifndef __NO_EMBEDDED_ASM\n__attribute__((section(\".rev16_text\"))) __STATIC_INLINE uint32_t __REV16(uint32_t value)\n{\n  uint32_t result;\n  __ASM volatile(\"rev16 %0, %1\" : \"=r\" (result) : \"r\" (value));\n  return result;\n}\n#endif\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n__STATIC_FORCEINLINE  int16_t __REVSH(int16_t value)\n{\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\n  return (int16_t)__builtin_bswap16(value);\n#else\n  int16_t result;\n\n  __ASM volatile (\"revsh %0, %1\" : \"=r\" (result) : \"r\" (value) );\n  return result;\n#endif\n}\n\n/**\n  \\brief   Rotate Right in unsigned value (32 bit)\n  \\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.\n  \\param [in]    op1  Value to rotate\n  \\param [in]    op2  Number of Bits to rotate\n  \\return               Rotated value\n */\n__STATIC_FORCEINLINE  uint32_t __ROR(uint32_t op1, uint32_t op2)\n{\n  op2 %= 32U;\n  if (op2 == 0U) {\n    return op1;\n  }\n  return (op1 >> op2) | (op1 << (32U - op2));\n}\n\n\n/**\n  \\brief   Breakpoint\n  \\param [in]    value  is ignored by the processor.\n                 If required, a debugger can use it to store additional information about the breakpoint.\n */\n#define __BKPT(value)                       __ASM volatile (\"bkpt \"#value)\n\n/**\n  \\brief   Reverse bit order of value\n  \\details Reverses the bit order of the given value.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n__STATIC_FORCEINLINE  uint32_t __RBIT(uint32_t value)\n{\n  uint32_t result;\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )\n   __ASM volatile (\"rbit %0, %1\" : \"=r\" (result) : \"r\" (value) );\n#else\n  int32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */\n\n  result = value;                      /* r will be reversed bits of v; first get LSB of v */\n  for (value >>= 1U; value; value >>= 1U)\n  {\n    result <<= 1U;\n    result |= value & 1U;\n    s--;\n  }\n  result <<= s;                        /* shift when v's highest bits are zero */\n#endif\n  return result;\n}\n\n/**\n  \\brief   Count leading zeros\n  \\param [in]  value  Value to count the leading zeros\n  \\return             number of leading zeros in value\n */\n__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)\n{\n  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally\n     __builtin_clz(0) is undefined behaviour, so handle this case specially.\n     This guarantees ARM-compatible results if happening to compile on a non-ARM\n     target, and ensures the compiler doesn't decide to activate any\n     optimisations using the logic \"value was passed to __builtin_clz, so it\n     is non-zero\".\n     ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a\n     single CLZ instruction.\n   */\n  if (value == 0U)\n  {\n    return 32U;\n  }\n  return __builtin_clz(value);\n}\n\n/**\n  \\brief   LDR Exclusive (8 bit)\n  \\details Executes a exclusive LDR instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE  uint8_t __LDREXB(volatile uint8_t *addr)\n{\n    uint32_t result;\n\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\n   __ASM volatile (\"ldrexb %0, %1\" : \"=r\" (result) : \"Q\" (*addr) );\n#else\n    /* Prior to GCC 4.8, \"Q\" will be expanded to [rx, #0] which is not\n       accepted by assembler. So has to use following less efficient pattern.\n    */\n   __ASM volatile (\"ldrexb %0, [%1]\" : \"=r\" (result) : \"r\" (addr) : \"memory\" );\n#endif\n   return ((uint8_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDR Exclusive (16 bit)\n  \\details Executes a exclusive LDR instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE  uint16_t __LDREXH(volatile uint16_t *addr)\n{\n    uint32_t result;\n\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\n   __ASM volatile (\"ldrexh %0, %1\" : \"=r\" (result) : \"Q\" (*addr) );\n#else\n    /* Prior to GCC 4.8, \"Q\" will be expanded to [rx, #0] which is not\n       accepted by assembler. So has to use following less efficient pattern.\n    */\n   __ASM volatile (\"ldrexh %0, [%1]\" : \"=r\" (result) : \"r\" (addr) : \"memory\" );\n#endif\n   return ((uint16_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDR Exclusive (32 bit)\n  \\details Executes a exclusive LDR instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE  uint32_t __LDREXW(volatile uint32_t *addr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"ldrex %0, %1\" : \"=r\" (result) : \"Q\" (*addr) );\n   return(result);\n}\n\n\n/**\n  \\brief   STR Exclusive (8 bit)\n  \\details Executes a exclusive STR instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE  uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"strexb %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*addr) : \"r\" ((uint32_t)value) );\n   return(result);\n}\n\n\n/**\n  \\brief   STR Exclusive (16 bit)\n  \\details Executes a exclusive STR instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE  uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"strexh %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*addr) : \"r\" ((uint32_t)value) );\n   return(result);\n}\n\n\n/**\n  \\brief   STR Exclusive (32 bit)\n  \\details Executes a exclusive STR instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE  uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"strex %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*addr) : \"r\" (value) );\n   return(result);\n}\n\n\n/**\n  \\brief   Remove the exclusive lock\n  \\details Removes the exclusive lock which is created by LDREX.\n */\n__STATIC_FORCEINLINE  void __CLREX(void)\n{\n  __ASM volatile (\"clrex\" ::: \"memory\");\n}\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n#define __SSAT(ARG1,ARG2) \\\n__extension__ \\\n({                          \\\n  int32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"ssat %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n#define __USAT(ARG1,ARG2) \\\n__extension__ \\\n({                          \\\n  uint32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"usat %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n\n/* ###########################  Core Function Access  ########################### */\n\n/**\n  \\brief   Enable IRQ Interrupts\n  \\details Enables IRQ interrupts by clearing the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n__STATIC_FORCEINLINE void __enable_irq(void)\n{\n  __ASM volatile (\"cpsie i\" : : : \"memory\");\n}\n\n/**\n  \\brief   Disable IRQ Interrupts\n  \\details Disables IRQ interrupts by setting the I-bit in the CPSR.\n  Can only be executed in Privileged modes.\n */\n__STATIC_FORCEINLINE  void __disable_irq(void)\n{\n  __ASM volatile (\"cpsid i\" : : : \"memory\");\n}\n\n/**\n  \\brief   Get FPSCR\n  \\details Returns the current value of the Floating Point Status/Control register.\n  \\return Floating Point Status/Control register value\n*/\n__STATIC_FORCEINLINE  uint32_t __get_FPSCR(void)\n{\n  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n  #if __has_builtin(__builtin_arm_get_fpscr) \n  // Re-enable using built-in when GCC has been fixed\n  // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)\n    /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */\n    return __builtin_arm_get_fpscr();\n  #else\n    uint32_t result;\n\n    __ASM volatile (\"VMRS %0, fpscr\" : \"=r\" (result) );\n    return(result);\n  #endif\n  #else\n    return(0U);\n  #endif\n}\n\n/**\n  \\brief   Set FPSCR\n  \\details Assigns the given value to the Floating Point Status/Control register.\n  \\param [in] fpscr  Floating Point Status/Control value to set\n*/\n__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)\n{\n  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n  #if __has_builtin(__builtin_arm_set_fpscr)\n  // Re-enable using built-in when GCC has been fixed\n  // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)\n    /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */\n    __builtin_arm_set_fpscr(fpscr);\n  #else\n    __ASM volatile (\"VMSR fpscr, %0\" : : \"r\" (fpscr) : \"vfpcc\", \"memory\");\n  #endif\n  #else\n    (void)fpscr;\n  #endif\n}\n\n/** \\brief  Get CPSR Register\n    \\return               CPSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CPSR(void)\n{\n  uint32_t result;\n  __ASM volatile(\"MRS %0, cpsr\" : \"=r\" (result) );\n  return(result);\n}\n\n/** \\brief  Set CPSR Register\n    \\param [in]    cpsr  CPSR value to set\n */\n__STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr)\n{\n__ASM volatile (\"MSR cpsr, %0\" : : \"r\" (cpsr) : \"memory\");\n}\n\n/** \\brief  Get Mode\n    \\return                Processor Mode\n */\n__STATIC_FORCEINLINE uint32_t __get_mode(void)\n{\n    return (__get_CPSR() & 0x1FU);\n}\n\n/** \\brief  Set Mode\n    \\param [in]    mode  Mode value to set\n */\n__STATIC_FORCEINLINE void __set_mode(uint32_t mode)\n{\n  __ASM volatile(\"MSR  cpsr_c, %0\" : : \"r\" (mode) : \"memory\");\n}\n\n/** \\brief  Get Stack Pointer\n    \\return Stack Pointer value\n */\n__STATIC_FORCEINLINE uint32_t __get_SP(void)\n{\n  uint32_t result;\n  __ASM volatile(\"MOV  %0, sp\" : \"=r\" (result) : : \"memory\");\n  return result;\n}\n\n/** \\brief  Set Stack Pointer\n    \\param [in]    stack  Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_SP(uint32_t stack)\n{\n  __ASM volatile(\"MOV  sp, %0\" : : \"r\" (stack) : \"memory\");\n}\n\n/** \\brief  Get USR/SYS Stack Pointer\n    \\return USR/SYS Stack Pointer value\n */\n__STATIC_FORCEINLINE uint32_t __get_SP_usr(void)\n{\n  uint32_t cpsr = __get_CPSR();\n  uint32_t result;\n  __ASM volatile(\n    \"CPS     #0x1F  \\n\"\n    \"MOV     %0, sp   \" : \"=r\"(result) : : \"memory\"\n   );\n  __set_CPSR(cpsr);\n  __ISB();\n  return result;\n}\n\n/** \\brief  Set USR/SYS Stack Pointer\n    \\param [in]    topOfProcStack  USR/SYS Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack)\n{\n  uint32_t cpsr = __get_CPSR();\n  __ASM volatile(\n    \"CPS     #0x1F  \\n\"\n    \"MOV     sp, %0   \" : : \"r\" (topOfProcStack) : \"memory\"\n   );\n  __set_CPSR(cpsr);\n  __ISB();\n}\n\n/** \\brief  Get FPEXC\n    \\return               Floating Point Exception Control register value\n */\n__STATIC_FORCEINLINE uint32_t __get_FPEXC(void)\n{\n#if (__FPU_PRESENT == 1)\n  uint32_t result;\n  __ASM volatile(\"VMRS %0, fpexc\" : \"=r\" (result) );\n  return(result);\n#else\n  return(0);\n#endif\n}\n\n/** \\brief  Set FPEXC\n    \\param [in]    fpexc  Floating Point Exception Control value to set\n */\n__STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc)\n{\n#if (__FPU_PRESENT == 1)\n  __ASM volatile (\"VMSR fpexc, %0\" : : \"r\" (fpexc) : \"memory\");\n#endif\n}\n\n/*\n * Include common core functions to access Coprocessor 15 registers\n */\n\n#define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile(\"MRC p\" # cp \", \" # op1 \", %0, c\" # CRn \", c\" # CRm \", \" # op2 : \"=r\" (Rt) : : \"memory\" )\n#define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile(\"MCR p\" # cp \", \" # op1 \", %0, c\" # CRn \", c\" # CRm \", \" # op2 : : \"r\" (Rt) : \"memory\" )\n#define __get_CP64(cp, op1, Rt, CRm) __ASM volatile(\"MRRC p\" # cp \", \" # op1 \", %Q0, %R0, c\" # CRm  : \"=r\" (Rt) : : \"memory\" )\n#define __set_CP64(cp, op1, Rt, CRm) __ASM volatile(\"MCRR p\" # cp \", \" # op1 \", %Q0, %R0, c\" # CRm  : : \"r\" (Rt) : \"memory\" )\n\n#include \"ca/cmsis_cp15_ca.h\"\n\n/** \\brief  Enable Floating Point Unit\n\n  Critical section, called from undef handler, so systick is disabled\n */\n__STATIC_INLINE void __FPU_Enable(void)\n{\n  __ASM volatile(\n    //Permit access to VFP/NEON, registers by modifying CPACR\n    \"        MRC     p15,0,R1,c1,c0,2  \\n\"\n    \"        ORR     R1,R1,#0x00F00000 \\n\"\n    \"        MCR     p15,0,R1,c1,c0,2  \\n\"\n\n    //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted\n    \"        ISB                       \\n\"\n\n    //Enable VFP/NEON\n    \"        VMRS    R1,FPEXC          \\n\"\n    \"        ORR     R1,R1,#0x40000000 \\n\"\n    \"        VMSR    FPEXC,R1          \\n\"\n\n    //Initialise VFP/NEON registers to 0\n    \"        MOV     R2,#0             \\n\"\n\n    //Initialise D16 registers to 0\n    \"        VMOV    D0, R2,R2         \\n\"\n    \"        VMOV    D1, R2,R2         \\n\"\n    \"        VMOV    D2, R2,R2         \\n\"\n    \"        VMOV    D3, R2,R2         \\n\"\n    \"        VMOV    D4, R2,R2         \\n\"\n    \"        VMOV    D5, R2,R2         \\n\"\n    \"        VMOV    D6, R2,R2         \\n\"\n    \"        VMOV    D7, R2,R2         \\n\"\n    \"        VMOV    D8, R2,R2         \\n\"\n    \"        VMOV    D9, R2,R2         \\n\"\n    \"        VMOV    D10,R2,R2         \\n\"\n    \"        VMOV    D11,R2,R2         \\n\"\n    \"        VMOV    D12,R2,R2         \\n\"\n    \"        VMOV    D13,R2,R2         \\n\"\n    \"        VMOV    D14,R2,R2         \\n\"\n    \"        VMOV    D15,R2,R2         \\n\"\n\n#if (defined(__ARM_NEON) && (__ARM_NEON == 1))\n    //Initialise D32 registers to 0\n    \"        VMOV    D16,R2,R2         \\n\"\n    \"        VMOV    D17,R2,R2         \\n\"\n    \"        VMOV    D18,R2,R2         \\n\"\n    \"        VMOV    D19,R2,R2         \\n\"\n    \"        VMOV    D20,R2,R2         \\n\"\n    \"        VMOV    D21,R2,R2         \\n\"\n    \"        VMOV    D22,R2,R2         \\n\"\n    \"        VMOV    D23,R2,R2         \\n\"\n    \"        VMOV    D24,R2,R2         \\n\"\n    \"        VMOV    D25,R2,R2         \\n\"\n    \"        VMOV    D26,R2,R2         \\n\"\n    \"        VMOV    D27,R2,R2         \\n\"\n    \"        VMOV    D28,R2,R2         \\n\"\n    \"        VMOV    D29,R2,R2         \\n\"\n    \"        VMOV    D30,R2,R2         \\n\"\n    \"        VMOV    D31,R2,R2         \\n\"\n#endif\n\n    //Initialise FPSCR to a known state\n    \"        VMRS    R1,FPSCR          \\n\"\n    \"        LDR     R2,=0x00086060    \\n\" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.\n    \"        AND     R1,R1,R2          \\n\"\n    \"        VMSR    FPSCR,R1            \"\n    : : : \"cc\", \"r1\", \"r2\"\n  );\n}\n\n#pragma GCC diagnostic pop\n\n#endif /* __CMSIS_GCC_CA_H */\n"
  },
  {
    "path": "platform/cmsis/inc/ca/cmsis_iccarm_ca.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_iccarm.h\n * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file\n * @version  V5.0.7\n * @date     15. May 2019\n ******************************************************************************/\n\n//------------------------------------------------------------------------------\n//\n// Copyright (c) 2017-2018 IAR Systems\n// Copyright (c) 2018-2019 Arm Limited \n//\n// Licensed under the Apache License, Version 2.0 (the \"License\")\n// you may not use this file except in compliance with the License.\n// You may obtain a copy of the License at\n//     http://www.apache.org/licenses/LICENSE-2.0\n//\n// Unless required by applicable law or agreed to in writing, software\n// distributed under the License is distributed on an \"AS IS\" BASIS,\n// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n// See the License for the specific language governing permissions and\n// limitations under the License.\n//\n//------------------------------------------------------------------------------\n\n\n#ifndef __CMSIS_ICCARM_CA_H__\n#define __CMSIS_ICCARM_CA_H__\n\n#ifndef __ICCARM__\n  #error This file should only be compiled by ICCARM\n#endif\n\n#pragma system_include\n\n#define __IAR_FT _Pragma(\"inline=forced\") __intrinsic\n\n#if (__VER__ >= 8000000)\n  #define __ICCARM_V8 1\n#else\n  #define __ICCARM_V8 0\n#endif\n\n#pragma language=extended\n\n#ifndef __ALIGNED\n  #if __ICCARM_V8\n    #define __ALIGNED(x) __attribute__((aligned(x)))\n  #elif (__VER__ >= 7080000)\n    /* Needs IAR language extensions */\n    #define __ALIGNED(x) __attribute__((aligned(x)))\n  #else\n    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.\n    #define __ALIGNED(x)\n  #endif\n#endif\n\n\n/* Define compiler macros for CPU architecture, used in CMSIS 5.\n */\n#if __ARM_ARCH_7A__\n/* Macro already defined */\n#else\n  #if defined(__ARM7A__)\n    #define __ARM_ARCH_7A__ 1\n  #endif\n#endif\n\n#ifndef __ASM\n  #define __ASM __asm\n#endif\n\n#ifndef   __COMPILER_BARRIER\n  #define __COMPILER_BARRIER() __ASM volatile(\"\":::\"memory\")\n#endif\n\n#ifndef __INLINE\n  #define __INLINE inline\n#endif\n\n#ifndef   __NO_RETURN\n  #if __ICCARM_V8\n    #define __NO_RETURN __attribute__((__noreturn__))\n  #else\n    #define __NO_RETURN _Pragma(\"object_attribute=__noreturn\")\n  #endif\n#endif\n\n#ifndef   __PACKED\n  /* Needs IAR language extensions */\n  #if __ICCARM_V8\n    #define __PACKED __attribute__((packed, aligned(1)))\n  #else\n    #define __PACKED __packed\n  #endif\n#endif\n\n#ifndef   __PACKED_STRUCT\n  /* Needs IAR language extensions */\n  #if __ICCARM_V8\n    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))\n  #else\n    #define __PACKED_STRUCT __packed struct\n  #endif\n#endif\n\n#ifndef   __PACKED_UNION\n  /* Needs IAR language extensions */\n  #if __ICCARM_V8\n    #define __PACKED_UNION union __attribute__((packed, aligned(1)))\n  #else\n    #define __PACKED_UNION __packed union\n  #endif\n#endif\n\n#ifndef   __RESTRICT\n  #if __ICCARM_V8\n    #define __RESTRICT            __restrict\n  #else\n    /* Needs IAR language extensions */\n    #define __RESTRICT            restrict\n  #endif\n#endif\n\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE       static inline\n#endif\n\n#ifndef   __FORCEINLINE\n  #define __FORCEINLINE         _Pragma(\"inline=forced\")\n#endif\n\n#ifndef   __STATIC_FORCEINLINE\n  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE\n#endif\n\n#ifndef   CMSIS_DEPRECATED\n  #define CMSIS_DEPRECATED      __attribute__((deprecated))\n#endif\n\n#ifndef __UNALIGNED_UINT16_READ\n  #pragma language=save\n  #pragma language=extended\n  __IAR_FT uint16_t __iar_uint16_read(void const *ptr)\n  {\n    return *(__packed uint16_t*)(ptr);\n  }\n  #pragma language=restore\n  #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)\n#endif\n\n\n#ifndef __UNALIGNED_UINT16_WRITE\n  #pragma language=save\n  #pragma language=extended\n  __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)\n  {\n    *(__packed uint16_t*)(ptr) = val;;\n  }\n  #pragma language=restore\n  #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)\n#endif\n\n#ifndef __UNALIGNED_UINT32_READ\n  #pragma language=save\n  #pragma language=extended\n  __IAR_FT uint32_t __iar_uint32_read(void const *ptr)\n  {\n    return *(__packed uint32_t*)(ptr);\n  }\n  #pragma language=restore\n  #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)\n#endif\n\n#ifndef __UNALIGNED_UINT32_WRITE\n  #pragma language=save\n  #pragma language=extended\n  __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)\n  {\n    *(__packed uint32_t*)(ptr) = val;;\n  }\n  #pragma language=restore\n  #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)\n#endif\n\n#if 0\n#ifndef __UNALIGNED_UINT32   /* deprecated */\n  #pragma language=save\n  #pragma language=extended\n  __packed struct  __iar_u32 { uint32_t v; };\n  #pragma language=restore\n  #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)\n#endif\n#endif\n\n#ifndef   __USED\n  #if __ICCARM_V8\n    #define __USED __attribute__((used))\n  #else\n    #define __USED _Pragma(\"__root\")\n  #endif\n#endif\n\n#ifndef   __WEAK\n  #if __ICCARM_V8\n    #define __WEAK __attribute__((weak))\n  #else\n    #define __WEAK _Pragma(\"__weak\")\n  #endif\n#endif\n\n\n#ifndef __ICCARM_INTRINSICS_VERSION__\n  #define __ICCARM_INTRINSICS_VERSION__  0\n#endif\n\n#if __ICCARM_INTRINSICS_VERSION__ == 2\n\n  #if defined(__CLZ)\n    #undef __CLZ\n  #endif\n  #if defined(__REVSH)\n    #undef __REVSH\n  #endif\n  #if defined(__RBIT)\n    #undef __RBIT\n  #endif\n  #if defined(__SSAT)\n    #undef __SSAT\n  #endif\n  #if defined(__USAT)\n    #undef __USAT\n  #endif\n\n  #include \"iccarm_builtin.h\"\n\n  #define __enable_irq        __iar_builtin_enable_interrupt\n  #define __disable_irq       __iar_builtin_disable_interrupt\n  #define __enable_fault_irq    __iar_builtin_enable_fiq\n  #define __disable_fault_irq   __iar_builtin_disable_fiq\n  #define __arm_rsr           __iar_builtin_rsr\n  #define __arm_wsr           __iar_builtin_wsr\n\n  #if __FPU_PRESENT\n    #define __get_FPSCR()             (__arm_rsr(\"FPSCR\"))\n  #else\n    #define __get_FPSCR()             ( 0 )\n  #endif\n\n  #define __set_FPSCR(VALUE)          (__arm_wsr(\"FPSCR\", VALUE))\n\n  #define __get_CPSR()                (__arm_rsr(\"CPSR\"))\n  #define __get_mode()                (__get_CPSR() & 0x1FU)\n\n  #define __set_CPSR(VALUE)           (__arm_wsr(\"CPSR\", (VALUE)))\n  #define __set_mode(VALUE)           (__arm_wsr(\"CPSR_c\", (VALUE)))\n\n\n  #define __get_FPEXC()       (__arm_rsr(\"FPEXC\"))\n  #define __set_FPEXC(VALUE)    (__arm_wsr(\"FPEXC\", VALUE))\n\n  #define __get_CP(cp, op1, RT, CRn, CRm, op2) \\\n    ((RT) = __arm_rsr(\"p\" # cp \":\" # op1 \":c\" # CRn \":c\" # CRm \":\" # op2))\n\n  #define __set_CP(cp, op1, RT, CRn, CRm, op2) \\\n    (__arm_wsr(\"p\" # cp \":\" # op1 \":c\" # CRn \":c\" # CRm \":\" # op2, (RT)))\n\n  #define __get_CP64(cp, op1, Rt, CRm) \\\n    __ASM volatile(\"MRRC p\" # cp \", \" # op1 \", %Q0, %R0, c\" # CRm  : \"=r\" (Rt) : : \"memory\" )\n\n  #define __set_CP64(cp, op1, Rt, CRm) \\\n    __ASM volatile(\"MCRR p\" # cp \", \" # op1 \", %Q0, %R0, c\" # CRm  : : \"r\" (Rt) : \"memory\" )\n\n  #include \"ca/cmsis_cp15_ca.h\"\n\n  #define __NOP     __iar_builtin_no_operation\n\n  #define __CLZ     __iar_builtin_CLZ\n  #define __CLREX   __iar_builtin_CLREX\n\n  #define __DMB     __iar_builtin_DMB\n  #define __DSB     __iar_builtin_DSB\n  #define __ISB     __iar_builtin_ISB\n\n  #define __LDREXB  __iar_builtin_LDREXB\n  #define __LDREXH  __iar_builtin_LDREXH\n  #define __LDREXW  __iar_builtin_LDREX\n\n  #define __RBIT    __iar_builtin_RBIT\n  #define __REV     __iar_builtin_REV\n  #define __REV16   __iar_builtin_REV16\n\n  __IAR_FT int16_t __REVSH(int16_t val)\n  {\n    return (int16_t) __iar_builtin_REVSH(val);\n  }\n\n  #define __ROR     __iar_builtin_ROR\n  #define __RRX     __iar_builtin_RRX\n\n  #define __SEV     __iar_builtin_SEV\n\n  #define __SSAT    __iar_builtin_SSAT\n\n  #define __STREXB  __iar_builtin_STREXB\n  #define __STREXH  __iar_builtin_STREXH\n  #define __STREXW  __iar_builtin_STREX\n\n  #define __USAT    __iar_builtin_USAT\n\n  #define __WFE     __iar_builtin_WFE\n  #define __WFI     __iar_builtin_WFI\n\n  #define __SADD8   __iar_builtin_SADD8\n  #define __QADD8   __iar_builtin_QADD8\n  #define __SHADD8  __iar_builtin_SHADD8\n  #define __UADD8   __iar_builtin_UADD8\n  #define __UQADD8  __iar_builtin_UQADD8\n  #define __UHADD8  __iar_builtin_UHADD8\n  #define __SSUB8   __iar_builtin_SSUB8\n  #define __QSUB8   __iar_builtin_QSUB8\n  #define __SHSUB8  __iar_builtin_SHSUB8\n  #define __USUB8   __iar_builtin_USUB8\n  #define __UQSUB8  __iar_builtin_UQSUB8\n  #define __UHSUB8  __iar_builtin_UHSUB8\n  #define __SADD16  __iar_builtin_SADD16\n  #define __QADD16  __iar_builtin_QADD16\n  #define __SHADD16 __iar_builtin_SHADD16\n  #define __UADD16  __iar_builtin_UADD16\n  #define __UQADD16 __iar_builtin_UQADD16\n  #define __UHADD16 __iar_builtin_UHADD16\n  #define __SSUB16  __iar_builtin_SSUB16\n  #define __QSUB16  __iar_builtin_QSUB16\n  #define __SHSUB16 __iar_builtin_SHSUB16\n  #define __USUB16  __iar_builtin_USUB16\n  #define __UQSUB16 __iar_builtin_UQSUB16\n  #define __UHSUB16 __iar_builtin_UHSUB16\n  #define __SASX    __iar_builtin_SASX\n  #define __QASX    __iar_builtin_QASX\n  #define __SHASX   __iar_builtin_SHASX\n  #define __UASX    __iar_builtin_UASX\n  #define __UQASX   __iar_builtin_UQASX\n  #define __UHASX   __iar_builtin_UHASX\n  #define __SSAX    __iar_builtin_SSAX\n  #define __QSAX    __iar_builtin_QSAX\n  #define __SHSAX   __iar_builtin_SHSAX\n  #define __USAX    __iar_builtin_USAX\n  #define __UQSAX   __iar_builtin_UQSAX\n  #define __UHSAX   __iar_builtin_UHSAX\n  #define __USAD8   __iar_builtin_USAD8\n  #define __USADA8  __iar_builtin_USADA8\n  #define __SSAT16  __iar_builtin_SSAT16\n  #define __USAT16  __iar_builtin_USAT16\n  #define __UXTB16  __iar_builtin_UXTB16\n  #define __UXTAB16 __iar_builtin_UXTAB16\n  #define __SXTB16  __iar_builtin_SXTB16\n  #define __SXTAB16 __iar_builtin_SXTAB16\n  #define __SMUAD   __iar_builtin_SMUAD\n  #define __SMUADX  __iar_builtin_SMUADX\n  #define __SMMLA   __iar_builtin_SMMLA\n  #define __SMLAD   __iar_builtin_SMLAD\n  #define __SMLADX  __iar_builtin_SMLADX\n  #define __SMLALD  __iar_builtin_SMLALD\n  #define __SMLALDX __iar_builtin_SMLALDX\n  #define __SMUSD   __iar_builtin_SMUSD\n  #define __SMUSDX  __iar_builtin_SMUSDX\n  #define __SMLSD   __iar_builtin_SMLSD\n  #define __SMLSDX  __iar_builtin_SMLSDX\n  #define __SMLSLD  __iar_builtin_SMLSLD\n  #define __SMLSLDX __iar_builtin_SMLSLDX\n  #define __SEL     __iar_builtin_SEL\n  #define __QADD    __iar_builtin_QADD\n  #define __QSUB    __iar_builtin_QSUB\n  #define __PKHBT   __iar_builtin_PKHBT\n  #define __PKHTB   __iar_builtin_PKHTB\n\n#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */\n\n  #if !__FPU_PRESENT\n  #define __get_FPSCR __cmsis_iar_get_FPSR_not_active\n  #endif\n\n  #ifdef __INTRINSICS_INCLUDED\n  #error intrinsics.h is already included previously!\n  #endif\n\n  #include \n\n  #if !__FPU_PRESENT\n  #define __get_FPSCR() (0)\n  #endif\n\n  #pragma diag_suppress=Pe940\n  #pragma diag_suppress=Pe177\n\n  #define __enable_irq        __enable_interrupt\n  #define __disable_irq       __disable_interrupt\n  #define __enable_fault_irq    __enable_fiq\n  #define __disable_fault_irq   __disable_fiq\n  #define __NOP               __no_operation\n\n  #define __get_xPSR          __get_PSR\n\n  __IAR_FT void __set_mode(uint32_t mode)\n  {\n    __ASM volatile(\"MSR  cpsr_c, %0\" : : \"r\" (mode) : \"memory\");\n  }\n\n  __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)\n  {\n    return __LDREX((unsigned long *)ptr);\n  }\n\n  __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)\n  {\n    return __STREX(value, (unsigned long *)ptr);\n  }\n\n\n  __IAR_FT uint32_t __RRX(uint32_t value)\n  {\n    uint32_t result;\n    __ASM(\"RRX      %0, %1\" : \"=r\"(result) : \"r\" (value) : \"cc\");\n    return(result);\n  }\n\n\n  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)\n  {\n    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));\n  }\n\n  __IAR_FT uint32_t __get_FPEXC(void)\n  {\n  #if (__FPU_PRESENT == 1)\n    uint32_t result;\n    __ASM volatile(\"VMRS %0, fpexc\" : \"=r\" (result) : : \"memory\");\n    return(result);\n  #else\n    return(0);\n  #endif\n  }\n\n  __IAR_FT void __set_FPEXC(uint32_t fpexc)\n  {\n  #if (__FPU_PRESENT == 1)\n    __ASM volatile (\"VMSR fpexc, %0\" : : \"r\" (fpexc) : \"memory\");\n  #endif\n  }\n\n\n  #define __get_CP(cp, op1, Rt, CRn, CRm, op2) \\\n    __ASM volatile(\"MRC p\" # cp \", \" # op1 \", %0, c\" # CRn \", c\" # CRm \", \" # op2 : \"=r\" (Rt) : : \"memory\" )\n  #define __set_CP(cp, op1, Rt, CRn, CRm, op2) \\\n    __ASM volatile(\"MCR p\" # cp \", \" # op1 \", %0, c\" # CRn \", c\" # CRm \", \" # op2 : : \"r\" (Rt) : \"memory\" )\n  #define __get_CP64(cp, op1, Rt, CRm) \\\n    __ASM volatile(\"MRRC p\" # cp \", \" # op1 \", %Q0, %R0, c\" # CRm  : \"=r\" (Rt) : : \"memory\" )\n  #define __set_CP64(cp, op1, Rt, CRm) \\\n    __ASM volatile(\"MCRR p\" # cp \", \" # op1 \", %Q0, %R0, c\" # CRm  : : \"r\" (Rt) : \"memory\" )\n\n  #include \"ca/cmsis_cp15_ca.h\"\n\n#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */\n\n#define __BKPT(value)    __asm volatile (\"BKPT     %0\" : : \"i\"(value))\n\n\n__IAR_FT uint32_t __get_SP_usr(void)\n{\n  uint32_t cpsr;\n  uint32_t result;\n  __ASM volatile(\n    \"MRS     %0, cpsr   \\n\"\n    \"CPS     #0x1F      \\n\" // no effect in USR mode\n    \"MOV     %1, sp     \\n\"\n    \"MSR     cpsr_c, %2 \\n\" // no effect in USR mode\n    \"ISB\" :  \"=r\"(cpsr), \"=r\"(result) : \"r\"(cpsr) : \"memory\"\n   );\n  return result;\n}\n\n__IAR_FT void __set_SP_usr(uint32_t topOfProcStack)\n{\n  uint32_t cpsr;\n  __ASM volatile(\n    \"MRS     %0, cpsr   \\n\"\n    \"CPS     #0x1F      \\n\" // no effect in USR mode\n    \"MOV     sp, %1     \\n\"\n    \"MSR     cpsr_c, %2 \\n\" // no effect in USR mode\n    \"ISB\" : \"=r\"(cpsr) : \"r\" (topOfProcStack), \"r\"(cpsr) : \"memory\"\n   );\n}\n\n#define __get_mode()                (__get_CPSR() & 0x1FU)\n\n__STATIC_INLINE\nvoid __FPU_Enable(void)\n{\n  __ASM volatile(\n    //Permit access to VFP/NEON, registers by modifying CPACR\n    \"        MRC     p15,0,R1,c1,c0,2  \\n\"\n    \"        ORR     R1,R1,#0x00F00000 \\n\"\n    \"        MCR     p15,0,R1,c1,c0,2  \\n\"\n\n    //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted\n    \"        ISB                       \\n\"\n\n    //Enable VFP/NEON\n    \"        VMRS    R1,FPEXC          \\n\"\n    \"        ORR     R1,R1,#0x40000000 \\n\"\n    \"        VMSR    FPEXC,R1          \\n\"\n\n    //Initialise VFP/NEON registers to 0\n    \"        MOV     R2,#0             \\n\"\n\n    //Initialise D16 registers to 0\n    \"        VMOV    D0, R2,R2         \\n\"\n    \"        VMOV    D1, R2,R2         \\n\"\n    \"        VMOV    D2, R2,R2         \\n\"\n    \"        VMOV    D3, R2,R2         \\n\"\n    \"        VMOV    D4, R2,R2         \\n\"\n    \"        VMOV    D5, R2,R2         \\n\"\n    \"        VMOV    D6, R2,R2         \\n\"\n    \"        VMOV    D7, R2,R2         \\n\"\n    \"        VMOV    D8, R2,R2         \\n\"\n    \"        VMOV    D9, R2,R2         \\n\"\n    \"        VMOV    D10,R2,R2         \\n\"\n    \"        VMOV    D11,R2,R2         \\n\"\n    \"        VMOV    D12,R2,R2         \\n\"\n    \"        VMOV    D13,R2,R2         \\n\"\n    \"        VMOV    D14,R2,R2         \\n\"\n    \"        VMOV    D15,R2,R2         \\n\"\n\n#ifdef __ARM_ADVANCED_SIMD__\n    //Initialise D32 registers to 0\n    \"        VMOV    D16,R2,R2         \\n\"\n    \"        VMOV    D17,R2,R2         \\n\"\n    \"        VMOV    D18,R2,R2         \\n\"\n    \"        VMOV    D19,R2,R2         \\n\"\n    \"        VMOV    D20,R2,R2         \\n\"\n    \"        VMOV    D21,R2,R2         \\n\"\n    \"        VMOV    D22,R2,R2         \\n\"\n    \"        VMOV    D23,R2,R2         \\n\"\n    \"        VMOV    D24,R2,R2         \\n\"\n    \"        VMOV    D25,R2,R2         \\n\"\n    \"        VMOV    D26,R2,R2         \\n\"\n    \"        VMOV    D27,R2,R2         \\n\"\n    \"        VMOV    D28,R2,R2         \\n\"\n    \"        VMOV    D29,R2,R2         \\n\"\n    \"        VMOV    D30,R2,R2         \\n\"\n    \"        VMOV    D31,R2,R2         \\n\"\n#endif\n\n    //Initialise FPSCR to a known state\n    \"        VMRS    R1,FPSCR          \\n\"\n    \"        MOV32   R2,#0x00086060    \\n\" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero.\n    \"        AND     R1,R1,R2          \\n\"\n    \"        VMSR    FPSCR,R1          \\n\"\n    : : : \"cc\", \"r1\", \"r2\"\n  );\n}\n\n\n\n#undef __IAR_FT\n#undef __ICCARM_V8\n\n#pragma diag_default=Pe940\n#pragma diag_default=Pe177\n\n#endif /* __CMSIS_ICCARM_CA_H__ */\n"
  },
  {
    "path": "platform/cmsis/inc/ca/core_ca.h",
    "content": "/**************************************************************************//**\n * @file     core_ca.h\n * @brief    CMSIS Cortex-A Core Peripheral Access Layer Header File\n * @version  V1.0.2\n * @date     12. November 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CA_H_GENERIC\n#define __CORE_CA_H_GENERIC\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n#ifndef __ASSEMBLER__\n#define NVIC_SetPriority(irq, prio)         GIC_SetPriority(irq, ((prio) << (8 - __GIC_PRIO_BITS)))\n#define NVIC_ClearPendingIRQ(irq)           GIC_ClearPendingIRQ(irq)\n#define NVIC_EnableIRQ(irq)                 GIC_EnableIRQ(irq)\n#define NVIC_DisableIRQ(irq)                GIC_DisableIRQ(irq)\n//#define NVIC_GetActive(irq)                 (GIC_GetIRQStatus(irq) & (1 << 1))\n#define NVIC_GetActive(irq)                 (((GICDistributor->ISACTIVER[(irq) / 32U])  >> ((irq) % 32U)) & 1UL)\n\n#include \"ca/irq_ctrl.h\"\n#define NVIC_SetVector(irq, vector)         IRQ_SetHandler(irq, (IRQHandler_t)(vector))\n\nuint32_t __get_SPSR(void);\nvoid __set_SPSR(uint32_t spsr);\n#endif\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n\n/*  CMSIS CA definitions */\n#define __CA_CMSIS_VERSION_MAIN  (1U)                                      /*!< \\brief [31:16] CMSIS-Core(A) main version   */\n#define __CA_CMSIS_VERSION_SUB   (1U)                                      /*!< \\brief [15:0]  CMSIS-Core(A) sub version    */\n#define __CA_CMSIS_VERSION       ((__CA_CMSIS_VERSION_MAIN << 16U) | \\\n                                   __CA_CMSIS_VERSION_SUB          )       /*!< \\brief CMSIS-Core(A) version number         */\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #if (__FPU_PRESENT == 1)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #if (__FPU_PRESENT == 1)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TMS470__ )\n  #if defined __TI_VFP_SUPPORT__\n    #if (__FPU_PRESENT == 1)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #if (__FPU_PRESENT == 1)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #if (__FPU_PRESENT == 1)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n#endif\n\n#ifndef __ASSEMBLER__\n#include \"ca/cmsis_compiler_ca.h\"               /* CMSIS compiler specific defines */\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CA_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CA_H_DEPENDANT\n#define __CORE_CA_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n /* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CA_REV\n    #define __CA_REV              0x0000U\n    #warning \"__CA_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __GIC_PRESENT\n    #define __GIC_PRESENT             1U\n    #warning \"__GIC_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __TIM_PRESENT\n    #define __TIM_PRESENT             1U\n    #warning \"__TIM_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __L2C_PRESENT\n    #define __L2C_PRESENT             0U\n    #warning \"__L2C_PRESENT not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< \\brief Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< \\brief Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< \\brief Defines 'write only' permissions */\n#define     __IO    volatile             /*!< \\brief Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*!< \\brief Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*!< \\brief Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*!< \\brief Defines 'read / write' structure member permissions */\n#define RESERVED(N, T) T RESERVED##N;    // placeholder struct members used for \"reserved\" areas\n\n#ifndef __ASSEMBLER__\n\n /*******************************************************************************\n  *                 Register Abstraction\n   Core Register contain:\n   - CPSR\n   - CP15 Registers\n   - L2C-310 Cache Controller\n   - Generic Interrupt Controller Distributor\n   - Generic Interrupt Controller Interface\n  ******************************************************************************/\n\n/* Core Register CPSR */\ntypedef union\n{\n  struct\n  {\n    uint32_t M:5;                        /*!< \\brief bit:  0.. 4  Mode field */\n    uint32_t T:1;                        /*!< \\brief bit:      5  Thumb execution state bit */\n    uint32_t F:1;                        /*!< \\brief bit:      6  FIQ mask bit */\n    uint32_t I:1;                        /*!< \\brief bit:      7  IRQ mask bit */\n    uint32_t A:1;                        /*!< \\brief bit:      8  Asynchronous abort mask bit */\n    uint32_t E:1;                        /*!< \\brief bit:      9  Endianness execution state bit */\n    uint32_t IT1:6;                      /*!< \\brief bit: 10..15  If-Then execution state bits 2-7 */\n    uint32_t GE:4;                       /*!< \\brief bit: 16..19  Greater than or Equal flags */\n    RESERVED(0:4, uint32_t)\n    uint32_t J:1;                        /*!< \\brief bit:     24  Jazelle bit */\n    uint32_t IT0:2;                      /*!< \\brief bit: 25..26  If-Then execution state bits 0-1 */\n    uint32_t Q:1;                        /*!< \\brief bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< \\brief bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< \\brief bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< \\brief bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< \\brief bit:     31  Negative condition code flag */\n  } b;                                   /*!< \\brief Structure used for bit  access */\n  uint32_t w;                            /*!< \\brief Type      used for word access */\n} CPSR_Type;\n\n\n\n/* CPSR Register Definitions */\n#define CPSR_N_Pos                       31U                                    /*!< \\brief CPSR: N Position */\n#define CPSR_N_Msk                       (1UL << CPSR_N_Pos)                    /*!< \\brief CPSR: N Mask */\n\n#define CPSR_Z_Pos                       30U                                    /*!< \\brief CPSR: Z Position */\n#define CPSR_Z_Msk                       (1UL << CPSR_Z_Pos)                    /*!< \\brief CPSR: Z Mask */\n\n#define CPSR_C_Pos                       29U                                    /*!< \\brief CPSR: C Position */\n#define CPSR_C_Msk                       (1UL << CPSR_C_Pos)                    /*!< \\brief CPSR: C Mask */\n\n#define CPSR_V_Pos                       28U                                    /*!< \\brief CPSR: V Position */\n#define CPSR_V_Msk                       (1UL << CPSR_V_Pos)                    /*!< \\brief CPSR: V Mask */\n\n#define CPSR_Q_Pos                       27U                                    /*!< \\brief CPSR: Q Position */\n#define CPSR_Q_Msk                       (1UL << CPSR_Q_Pos)                    /*!< \\brief CPSR: Q Mask */\n\n#define CPSR_IT0_Pos                     25U                                    /*!< \\brief CPSR: IT0 Position */\n#define CPSR_IT0_Msk                     (3UL << CPSR_IT0_Pos)                  /*!< \\brief CPSR: IT0 Mask */\n\n#define CPSR_J_Pos                       24U                                    /*!< \\brief CPSR: J Position */\n#define CPSR_J_Msk                       (1UL << CPSR_J_Pos)                    /*!< \\brief CPSR: J Mask */\n\n#define CPSR_GE_Pos                      16U                                    /*!< \\brief CPSR: GE Position */\n#define CPSR_GE_Msk                      (0xFUL << CPSR_GE_Pos)                 /*!< \\brief CPSR: GE Mask */\n\n#define CPSR_IT1_Pos                     10U                                    /*!< \\brief CPSR: IT1 Position */\n#define CPSR_IT1_Msk                     (0x3FUL << CPSR_IT1_Pos)               /*!< \\brief CPSR: IT1 Mask */\n\n#define CPSR_E_Pos                       9U                                     /*!< \\brief CPSR: E Position */\n#define CPSR_E_Msk                       (1UL << CPSR_E_Pos)                    /*!< \\brief CPSR: E Mask */\n\n#define CPSR_A_Pos                       8U                                     /*!< \\brief CPSR: A Position */\n#define CPSR_A_Msk                       (1UL << CPSR_A_Pos)                    /*!< \\brief CPSR: A Mask */\n\n#define CPSR_I_Pos                       7U                                     /*!< \\brief CPSR: I Position */\n#define CPSR_I_Msk                       (1UL << CPSR_I_Pos)                    /*!< \\brief CPSR: I Mask */\n\n#define CPSR_F_Pos                       6U                                     /*!< \\brief CPSR: F Position */\n#define CPSR_F_Msk                       (1UL << CPSR_F_Pos)                    /*!< \\brief CPSR: F Mask */\n\n#define CPSR_T_Pos                       5U                                     /*!< \\brief CPSR: T Position */\n#define CPSR_T_Msk                       (1UL << CPSR_T_Pos)                    /*!< \\brief CPSR: T Mask */\n\n#define CPSR_M_Pos                       0U                                     /*!< \\brief CPSR: M Position */\n#define CPSR_M_Msk                       (0x1FUL << CPSR_M_Pos)                 /*!< \\brief CPSR: M Mask */\n\n#define CPSR_M_USR                       0x10U                                  /*!< \\brief CPSR: M User mode (PL0) */\n#define CPSR_M_FIQ                       0x11U                                  /*!< \\brief CPSR: M Fast Interrupt mode (PL1) */\n#define CPSR_M_IRQ                       0x12U                                  /*!< \\brief CPSR: M Interrupt mode (PL1) */\n#define CPSR_M_SVC                       0x13U                                  /*!< \\brief CPSR: M Supervisor mode (PL1) */\n#define CPSR_M_MON                       0x16U                                  /*!< \\brief CPSR: M Monitor mode (PL1) */\n#define CPSR_M_ABT                       0x17U                                  /*!< \\brief CPSR: M Abort mode (PL1) */\n#define CPSR_M_HYP                       0x1AU                                  /*!< \\brief CPSR: M Hypervisor mode (PL2) */\n#define CPSR_M_UND                       0x1BU                                  /*!< \\brief CPSR: M Undefined mode (PL1) */\n#define CPSR_M_SYS                       0x1FU                                  /*!< \\brief CPSR: M System mode (PL1) */\n\n/* CP15 Register SCTLR */\ntypedef union\n{\n  struct\n  {\n    uint32_t M:1;                        /*!< \\brief bit:     0  MMU enable */\n    uint32_t A:1;                        /*!< \\brief bit:     1  Alignment check enable */\n    uint32_t C:1;                        /*!< \\brief bit:     2  Cache enable */\n    RESERVED(0:2, uint32_t)\n    uint32_t CP15BEN:1;                  /*!< \\brief bit:     5  CP15 barrier enable */\n    RESERVED(1:1, uint32_t)\n    uint32_t B:1;                        /*!< \\brief bit:     7  Endianness model */\n    RESERVED(2:2, uint32_t)\n    uint32_t SW:1;                       /*!< \\brief bit:    10  SWP and SWPB enable */\n    uint32_t Z:1;                        /*!< \\brief bit:    11  Branch prediction enable */\n    uint32_t I:1;                        /*!< \\brief bit:    12  Instruction cache enable */\n    uint32_t V:1;                        /*!< \\brief bit:    13  Vectors bit */\n    uint32_t RR:1;                       /*!< \\brief bit:    14  Round Robin select */\n    RESERVED(3:2, uint32_t)\n    uint32_t HA:1;                       /*!< \\brief bit:    17  Hardware Access flag enable */\n    RESERVED(4:1, uint32_t)\n    uint32_t WXN:1;                      /*!< \\brief bit:    19  Write permission implies XN */\n    uint32_t UWXN:1;                     /*!< \\brief bit:    20  Unprivileged write permission implies PL1 XN */\n    uint32_t FI:1;                       /*!< \\brief bit:    21  Fast interrupts configuration enable */\n    uint32_t U:1;                        /*!< \\brief bit:    22  Alignment model */\n    RESERVED(5:1, uint32_t)\n    uint32_t VE:1;                       /*!< \\brief bit:    24  Interrupt Vectors Enable */\n    uint32_t EE:1;                       /*!< \\brief bit:    25  Exception Endianness */\n    RESERVED(6:1, uint32_t)\n    uint32_t NMFI:1;                     /*!< \\brief bit:    27  Non-maskable FIQ (NMFI) support */\n    uint32_t TRE:1;                      /*!< \\brief bit:    28  TEX remap enable. */\n    uint32_t AFE:1;                      /*!< \\brief bit:    29  Access flag enable */\n    uint32_t TE:1;                       /*!< \\brief bit:    30  Thumb Exception enable */\n    RESERVED(7:1, uint32_t)\n  } b;                                   /*!< \\brief Structure used for bit  access */\n  uint32_t w;                            /*!< \\brief Type      used for word access */\n} SCTLR_Type;\n\n#define SCTLR_TE_Pos                     30U                                    /*!< \\brief SCTLR: TE Position */\n#define SCTLR_TE_Msk                     (1UL << SCTLR_TE_Pos)                  /*!< \\brief SCTLR: TE Mask */\n\n#define SCTLR_AFE_Pos                    29U                                    /*!< \\brief SCTLR: AFE Position */\n#define SCTLR_AFE_Msk                    (1UL << SCTLR_AFE_Pos)                 /*!< \\brief SCTLR: AFE Mask */\n\n#define SCTLR_TRE_Pos                    28U                                    /*!< \\brief SCTLR: TRE Position */\n#define SCTLR_TRE_Msk                    (1UL << SCTLR_TRE_Pos)                 /*!< \\brief SCTLR: TRE Mask */\n\n#define SCTLR_NMFI_Pos                   27U                                    /*!< \\brief SCTLR: NMFI Position */\n#define SCTLR_NMFI_Msk                   (1UL << SCTLR_NMFI_Pos)                /*!< \\brief SCTLR: NMFI Mask */\n\n#define SCTLR_EE_Pos                     25U                                    /*!< \\brief SCTLR: EE Position */\n#define SCTLR_EE_Msk                     (1UL << SCTLR_EE_Pos)                  /*!< \\brief SCTLR: EE Mask */\n\n#define SCTLR_VE_Pos                     24U                                    /*!< \\brief SCTLR: VE Position */\n#define SCTLR_VE_Msk                     (1UL << SCTLR_VE_Pos)                  /*!< \\brief SCTLR: VE Mask */\n\n#define SCTLR_U_Pos                      22U                                    /*!< \\brief SCTLR: U Position */\n#define SCTLR_U_Msk                      (1UL << SCTLR_U_Pos)                   /*!< \\brief SCTLR: U Mask */\n\n#define SCTLR_FI_Pos                     21U                                    /*!< \\brief SCTLR: FI Position */\n#define SCTLR_FI_Msk                     (1UL << SCTLR_FI_Pos)                  /*!< \\brief SCTLR: FI Mask */\n\n#define SCTLR_UWXN_Pos                   20U                                    /*!< \\brief SCTLR: UWXN Position */\n#define SCTLR_UWXN_Msk                   (1UL << SCTLR_UWXN_Pos)                /*!< \\brief SCTLR: UWXN Mask */\n\n#define SCTLR_WXN_Pos                    19U                                    /*!< \\brief SCTLR: WXN Position */\n#define SCTLR_WXN_Msk                    (1UL << SCTLR_WXN_Pos)                 /*!< \\brief SCTLR: WXN Mask */\n\n#define SCTLR_HA_Pos                     17U                                    /*!< \\brief SCTLR: HA Position */\n#define SCTLR_HA_Msk                     (1UL << SCTLR_HA_Pos)                  /*!< \\brief SCTLR: HA Mask */\n\n#define SCTLR_RR_Pos                     14U                                    /*!< \\brief SCTLR: RR Position */\n#define SCTLR_RR_Msk                     (1UL << SCTLR_RR_Pos)                  /*!< \\brief SCTLR: RR Mask */\n\n#define SCTLR_V_Pos                      13U                                    /*!< \\brief SCTLR: V Position */\n#define SCTLR_V_Msk                      (1UL << SCTLR_V_Pos)                   /*!< \\brief SCTLR: V Mask */\n\n#define SCTLR_I_Pos                      12U                                    /*!< \\brief SCTLR: I Position */\n#define SCTLR_I_Msk                      (1UL << SCTLR_I_Pos)                   /*!< \\brief SCTLR: I Mask */\n\n#define SCTLR_Z_Pos                      11U                                    /*!< \\brief SCTLR: Z Position */\n#define SCTLR_Z_Msk                      (1UL << SCTLR_Z_Pos)                   /*!< \\brief SCTLR: Z Mask */\n\n#define SCTLR_SW_Pos                     10U                                    /*!< \\brief SCTLR: SW Position */\n#define SCTLR_SW_Msk                     (1UL << SCTLR_SW_Pos)                  /*!< \\brief SCTLR: SW Mask */\n\n#define SCTLR_B_Pos                      7U                                     /*!< \\brief SCTLR: B Position */\n#define SCTLR_B_Msk                      (1UL << SCTLR_B_Pos)                   /*!< \\brief SCTLR: B Mask */\n\n#define SCTLR_CP15BEN_Pos                5U                                     /*!< \\brief SCTLR: CP15BEN Position */\n#define SCTLR_CP15BEN_Msk                (1UL << SCTLR_CP15BEN_Pos)             /*!< \\brief SCTLR: CP15BEN Mask */\n\n#define SCTLR_C_Pos                      2U                                     /*!< \\brief SCTLR: C Position */\n#define SCTLR_C_Msk                      (1UL << SCTLR_C_Pos)                   /*!< \\brief SCTLR: C Mask */\n\n#define SCTLR_A_Pos                      1U                                     /*!< \\brief SCTLR: A Position */\n#define SCTLR_A_Msk                      (1UL << SCTLR_A_Pos)                   /*!< \\brief SCTLR: A Mask */\n\n#define SCTLR_M_Pos                      0U                                     /*!< \\brief SCTLR: M Position */\n#define SCTLR_M_Msk                      (1UL << SCTLR_M_Pos)                   /*!< \\brief SCTLR: M Mask */\n\n/* CP15 Register ACTLR */\ntypedef union\n{\n#if __CORTEX_A == 5 || defined(DOXYGEN)\n  /** \\brief Structure used for bit access on Cortex-A5 */\n  struct\n  {\n    uint32_t FW:1;                      /*!< \\brief bit:      0  Cache and TLB maintenance broadcast */\n    RESERVED(0:5, uint32_t)\n    uint32_t SMP:1;                      /*!< \\brief bit:     6  Enables coherent requests to the processor */\n    uint32_t EXCL:1;                     /*!< \\brief bit:     7  Exclusive L1/L2 cache control */\n    RESERVED(1:2, uint32_t)\n    uint32_t DODMBS:1;                   /*!< \\brief bit:    10  Disable optimized data memory barrier behavior */\n    uint32_t DWBST:1;                    /*!< \\brief bit:    11  AXI data write bursts to Normal memory */\n    uint32_t RADIS:1;                    /*!< \\brief bit:    12  L1 Data Cache read-allocate mode disable */\n    uint32_t L1PCTL:2;                   /*!< \\brief bit:13..14  L1 Data prefetch control */\n    uint32_t BP:2;                       /*!< \\brief bit:16..15  Branch prediction policy */\n    uint32_t RSDIS:1;                    /*!< \\brief bit:    17  Disable return stack operation */\n    uint32_t BTDIS:1;                    /*!< \\brief bit:    18  Disable indirect Branch Target Address Cache (BTAC) */\n    RESERVED(3:9, uint32_t)\n    uint32_t DBDI:1;                     /*!< \\brief bit:    28  Disable branch dual issue */\n    RESERVED(7:3, uint32_t)\n } b;\n#endif\n#if __CORTEX_A == 7 || defined(DOXYGEN)\n  /** \\brief Structure used for bit access on Cortex-A7 */\n  struct\n  {\n    RESERVED(0:6, uint32_t)\n    uint32_t SMP:1;                      /*!< \\brief bit:     6  Enables coherent requests to the processor */\n    RESERVED(1:3, uint32_t)\n    uint32_t DODMBS:1;                   /*!< \\brief bit:    10  Disable optimized data memory barrier behavior */\n    uint32_t L2RADIS:1;                  /*!< \\brief bit:    11  L2 Data Cache read-allocate mode disable */\n    uint32_t L1RADIS:1;                  /*!< \\brief bit:    12  L1 Data Cache read-allocate mode disable */\n    uint32_t L1PCTL:2;                   /*!< \\brief bit:13..14  L1 Data prefetch control */\n    uint32_t DDVM:1;                     /*!< \\brief bit:    15  Disable Distributed Virtual Memory (DVM) transactions */\n    RESERVED(3:12, uint32_t)\n    uint32_t DDI:1;                      /*!< \\brief bit:    28  Disable dual issue */\n    RESERVED(7:3, uint32_t)\n  } b;\n#endif\n#if __CORTEX_A == 9 || defined(DOXYGEN)\n  /** \\brief Structure used for bit access on Cortex-A9 */\n  struct\n  {\n    uint32_t FW:1;                       /*!< \\brief bit:     0  Cache and TLB maintenance broadcast */\n    RESERVED(0:1, uint32_t)\n    uint32_t L1PE:1;                     /*!< \\brief bit:     2  Dside prefetch */\n    uint32_t WFLZM:1;                    /*!< \\brief bit:     3  Cache and TLB maintenance broadcast */\n    RESERVED(1:2, uint32_t)\n    uint32_t SMP:1;                      /*!< \\brief bit:     6  Enables coherent requests to the processor */\n    uint32_t EXCL:1;                     /*!< \\brief bit:     7  Exclusive L1/L2 cache control */\n    uint32_t AOW:1;                      /*!< \\brief bit:     8  Enable allocation in one cache way only */\n    uint32_t PARITY:1;                   /*!< \\brief bit:     9  Support for parity checking, if implemented */\n    RESERVED(7:22, uint32_t)\n  } b;\n#endif\n  uint32_t w;                            /*!< \\brief Type      used for word access */\n} ACTLR_Type;\n\n#define ACTLR_DDI_Pos                    28U                                     /*!< \\brief ACTLR: DDI Position */\n#define ACTLR_DDI_Msk                    (1UL << ACTLR_DDI_Pos)                  /*!< \\brief ACTLR: DDI Mask */\n\n#define ACTLR_DBDI_Pos                   28U                                     /*!< \\brief ACTLR: DBDI Position */\n#define ACTLR_DBDI_Msk                   (1UL << ACTLR_DBDI_Pos)                 /*!< \\brief ACTLR: DBDI Mask */\n\n#define ACTLR_BTDIS_Pos                  18U                                     /*!< \\brief ACTLR: BTDIS Position */\n#define ACTLR_BTDIS_Msk                  (1UL << ACTLR_BTDIS_Pos)                /*!< \\brief ACTLR: BTDIS Mask */\n\n#define ACTLR_RSDIS_Pos                  17U                                     /*!< \\brief ACTLR: RSDIS Position */\n#define ACTLR_RSDIS_Msk                  (1UL << ACTLR_RSDIS_Pos)                /*!< \\brief ACTLR: RSDIS Mask */\n\n#define ACTLR_BP_Pos                     15U                                     /*!< \\brief ACTLR: BP Position */\n#define ACTLR_BP_Msk                     (3UL << ACTLR_BP_Pos)                   /*!< \\brief ACTLR: BP Mask */\n\n#define ACTLR_DDVM_Pos                   15U                                     /*!< \\brief ACTLR: DDVM Position */\n#define ACTLR_DDVM_Msk                   (1UL << ACTLR_DDVM_Pos)                 /*!< \\brief ACTLR: DDVM Mask */\n\n#define ACTLR_L1PCTL_Pos                 13U                                     /*!< \\brief ACTLR: L1PCTL Position */\n#define ACTLR_L1PCTL_Msk                 (3UL << ACTLR_L1PCTL_Pos)               /*!< \\brief ACTLR: L1PCTL Mask */\n\n#define ACTLR_RADIS_Pos                  12U                                     /*!< \\brief ACTLR: RADIS Position */\n#define ACTLR_RADIS_Msk                  (1UL << ACTLR_RADIS_Pos)                /*!< \\brief ACTLR: RADIS Mask */\n\n#define ACTLR_L1RADIS_Pos                12U                                     /*!< \\brief ACTLR: L1RADIS Position */\n#define ACTLR_L1RADIS_Msk                (1UL << ACTLR_L1RADIS_Pos)              /*!< \\brief ACTLR: L1RADIS Mask */\n\n#define ACTLR_DWBST_Pos                  11U                                     /*!< \\brief ACTLR: DWBST Position */\n#define ACTLR_DWBST_Msk                  (1UL << ACTLR_DWBST_Pos)                /*!< \\brief ACTLR: DWBST Mask */\n\n#define ACTLR_L2RADIS_Pos                11U                                     /*!< \\brief ACTLR: L2RADIS Position */\n#define ACTLR_L2RADIS_Msk                (1UL << ACTLR_L2RADIS_Pos)              /*!< \\brief ACTLR: L2RADIS Mask */\n\n#define ACTLR_DODMBS_Pos                 10U                                     /*!< \\brief ACTLR: DODMBS Position */\n#define ACTLR_DODMBS_Msk                 (1UL << ACTLR_DODMBS_Pos)               /*!< \\brief ACTLR: DODMBS Mask */\n\n#define ACTLR_PARITY_Pos                 9U                                      /*!< \\brief ACTLR: PARITY Position */\n#define ACTLR_PARITY_Msk                 (1UL << ACTLR_PARITY_Pos)               /*!< \\brief ACTLR: PARITY Mask */\n\n#define ACTLR_AOW_Pos                    8U                                      /*!< \\brief ACTLR: AOW Position */\n#define ACTLR_AOW_Msk                    (1UL << ACTLR_AOW_Pos)                  /*!< \\brief ACTLR: AOW Mask */\n\n#define ACTLR_EXCL_Pos                   7U                                      /*!< \\brief ACTLR: EXCL Position */\n#define ACTLR_EXCL_Msk                   (1UL << ACTLR_EXCL_Pos)                 /*!< \\brief ACTLR: EXCL Mask */\n\n#define ACTLR_SMP_Pos                    6U                                      /*!< \\brief ACTLR: SMP Position */\n#define ACTLR_SMP_Msk                    (1UL << ACTLR_SMP_Pos)                  /*!< \\brief ACTLR: SMP Mask */\n\n#define ACTLR_WFLZM_Pos                  3U                                      /*!< \\brief ACTLR: WFLZM Position */\n#define ACTLR_WFLZM_Msk                  (1UL << ACTLR_WFLZM_Pos)                /*!< \\brief ACTLR: WFLZM Mask */\n\n#define ACTLR_L1PE_Pos                   2U                                      /*!< \\brief ACTLR: L1PE Position */\n#define ACTLR_L1PE_Msk                   (1UL << ACTLR_L1PE_Pos)                 /*!< \\brief ACTLR: L1PE Mask */\n\n#define ACTLR_FW_Pos                     0U                                      /*!< \\brief ACTLR: FW Position */\n#define ACTLR_FW_Msk                     (1UL << ACTLR_FW_Pos)                   /*!< \\brief ACTLR: FW Mask */\n\n/* CP15 Register CPACR */\ntypedef union\n{\n  struct\n  {\n    uint32_t CP0:2;                      /*!< \\brief bit:  0..1  Access rights for coprocessor 0 */\n    uint32_t CP1:2;                      /*!< \\brief bit:  2..3  Access rights for coprocessor 1 */\n    uint32_t CP2:2;                      /*!< \\brief bit:  4..5  Access rights for coprocessor 2 */\n    uint32_t CP3:2;                      /*!< \\brief bit:  6..7  Access rights for coprocessor 3 */\n    uint32_t CP4:2;                      /*!< \\brief bit:  8..9  Access rights for coprocessor 4 */\n    uint32_t CP5:2;                      /*!< \\brief bit:10..11  Access rights for coprocessor 5 */\n    uint32_t CP6:2;                      /*!< \\brief bit:12..13  Access rights for coprocessor 6 */\n    uint32_t CP7:2;                      /*!< \\brief bit:14..15  Access rights for coprocessor 7 */\n    uint32_t CP8:2;                      /*!< \\brief bit:16..17  Access rights for coprocessor 8 */\n    uint32_t CP9:2;                      /*!< \\brief bit:18..19  Access rights for coprocessor 9 */\n    uint32_t CP10:2;                     /*!< \\brief bit:20..21  Access rights for coprocessor 10 */\n    uint32_t CP11:2;                     /*!< \\brief bit:22..23  Access rights for coprocessor 11 */\n    uint32_t CP12:2;                     /*!< \\brief bit:24..25  Access rights for coprocessor 11 */\n    uint32_t CP13:2;                     /*!< \\brief bit:26..27  Access rights for coprocessor 11 */\n    uint32_t TRCDIS:1;                   /*!< \\brief bit:    28  Disable CP14 access to trace registers */\n    RESERVED(0:1, uint32_t)\n    uint32_t D32DIS:1;                   /*!< \\brief bit:    30  Disable use of registers D16-D31 of the VFP register file */\n    uint32_t ASEDIS:1;                   /*!< \\brief bit:    31  Disable Advanced SIMD Functionality */\n  } b;                                   /*!< \\brief Structure used for bit  access */\n  uint32_t w;                            /*!< \\brief Type      used for word access */\n} CPACR_Type;\n\n#define CPACR_ASEDIS_Pos                 31U                                    /*!< \\brief CPACR: ASEDIS Position */\n#define CPACR_ASEDIS_Msk                 (1UL << CPACR_ASEDIS_Pos)              /*!< \\brief CPACR: ASEDIS Mask */\n\n#define CPACR_D32DIS_Pos                 30U                                    /*!< \\brief CPACR: D32DIS Position */\n#define CPACR_D32DIS_Msk                 (1UL << CPACR_D32DIS_Pos)              /*!< \\brief CPACR: D32DIS Mask */\n\n#define CPACR_TRCDIS_Pos                 28U                                    /*!< \\brief CPACR: D32DIS Position */\n#define CPACR_TRCDIS_Msk                 (1UL << CPACR_D32DIS_Pos)              /*!< \\brief CPACR: D32DIS Mask */\n\n#define CPACR_CP_Pos_(n)                 (n*2U)                                 /*!< \\brief CPACR: CPn Position */\n#define CPACR_CP_Msk_(n)                 (3UL << CPACR_CP_Pos_(n))              /*!< \\brief CPACR: CPn Mask */\n\n#define CPACR_CP_NA                      0U                                     /*!< \\brief CPACR CPn field: Access denied. */\n#define CPACR_CP_PL1                     1U                                     /*!< \\brief CPACR CPn field: Accessible from PL1 only. */\n#define CPACR_CP_FA                      3U                                     /*!< \\brief CPACR CPn field: Full access. */\n\n/* CP15 Register DFSR */\ntypedef union\n{\n  struct\n  {\n    uint32_t FS0:4;                      /*!< \\brief bit: 0.. 3  Fault Status bits bit 0-3 */\n    uint32_t Domain:4;                   /*!< \\brief bit: 4.. 7  Fault on which domain */\n    RESERVED(0:1, uint32_t)\n    uint32_t LPAE:1;                     /*!< \\brief bit:     9  Large Physical Address Extension */\n    uint32_t FS1:1;                      /*!< \\brief bit:    10  Fault Status bits bit 4 */\n    uint32_t WnR:1;                      /*!< \\brief bit:    11  Write not Read bit */\n    uint32_t ExT:1;                      /*!< \\brief bit:    12  External abort type */\n    uint32_t CM:1;                       /*!< \\brief bit:    13  Cache maintenance fault */\n    RESERVED(1:18, uint32_t)\n  } s;                                   /*!< \\brief Structure used for bit  access in short format */\n  struct\n  {\n    uint32_t STATUS:5;                   /*!< \\brief bit: 0.. 5  Fault Status bits */\n    RESERVED(0:3, uint32_t)\n    uint32_t LPAE:1;                     /*!< \\brief bit:     9  Large Physical Address Extension */\n    RESERVED(1:1, uint32_t)\n    uint32_t WnR:1;                      /*!< \\brief bit:    11  Write not Read bit */\n    uint32_t ExT:1;                      /*!< \\brief bit:    12  External abort type */\n    uint32_t CM:1;                       /*!< \\brief bit:    13  Cache maintenance fault */\n    RESERVED(2:18, uint32_t)\n  } l;                                   /*!< \\brief Structure used for bit  access in long format */\n  uint32_t w;                            /*!< \\brief Type      used for word access */\n} DFSR_Type;\n\n#define DFSR_CM_Pos                      13U                                    /*!< \\brief DFSR: CM Position */\n#define DFSR_CM_Msk                      (1UL << DFSR_CM_Pos)                   /*!< \\brief DFSR: CM Mask */\n\n#define DFSR_Ext_Pos                     12U                                    /*!< \\brief DFSR: Ext Position */\n#define DFSR_Ext_Msk                     (1UL << DFSR_Ext_Pos)                  /*!< \\brief DFSR: Ext Mask */\n\n#define DFSR_WnR_Pos                     11U                                    /*!< \\brief DFSR: WnR Position */\n#define DFSR_WnR_Msk                     (1UL << DFSR_WnR_Pos)                  /*!< \\brief DFSR: WnR Mask */\n\n#define DFSR_FS1_Pos                     10U                                    /*!< \\brief DFSR: FS1 Position */\n#define DFSR_FS1_Msk                     (1UL << DFSR_FS1_Pos)                  /*!< \\brief DFSR: FS1 Mask */\n\n#define DFSR_LPAE_Pos                    9U                                    /*!< \\brief DFSR: LPAE Position */\n#define DFSR_LPAE_Msk                    (1UL << DFSR_LPAE_Pos)                /*!< \\brief DFSR: LPAE Mask */\n\n#define DFSR_Domain_Pos                  4U                                     /*!< \\brief DFSR: Domain Position */\n#define DFSR_Domain_Msk                  (0xFUL << DFSR_Domain_Pos)             /*!< \\brief DFSR: Domain Mask */\n\n#define DFSR_FS0_Pos                     0U                                     /*!< \\brief DFSR: FS0 Position */\n#define DFSR_FS0_Msk                     (0xFUL << DFSR_FS0_Pos)                /*!< \\brief DFSR: FS0 Mask */\n\n#define DFSR_STATUS_Pos                  0U                                     /*!< \\brief DFSR: STATUS Position */\n#define DFSR_STATUS_Msk                  (0x3FUL << DFSR_STATUS_Pos)            /*!< \\brief DFSR: STATUS Mask */\n\n/* CP15 Register IFSR */\ntypedef union\n{\n  struct\n  {\n    uint32_t FS0:4;                      /*!< \\brief bit: 0.. 3  Fault Status bits bit 0-3 */\n    RESERVED(0:5, uint32_t)\n    uint32_t LPAE:1;                     /*!< \\brief bit:     9  Large Physical Address Extension */\n    uint32_t FS1:1;                      /*!< \\brief bit:    10  Fault Status bits bit 4 */\n    RESERVED(1:1, uint32_t)\n    uint32_t ExT:1;                      /*!< \\brief bit:    12  External abort type */\n    RESERVED(2:19, uint32_t)\n  } s;                                   /*!< \\brief Structure used for bit access in short format */\n  struct\n  {\n    uint32_t STATUS:6;                   /*!< \\brief bit: 0.. 5  Fault Status bits */\n    RESERVED(0:3, uint32_t)\n    uint32_t LPAE:1;                     /*!< \\brief bit:     9  Large Physical Address Extension */\n    RESERVED(1:2, uint32_t)\n    uint32_t ExT:1;                      /*!< \\brief bit:    12  External abort type */\n    RESERVED(2:19, uint32_t)\n  } l;                                   /*!< \\brief Structure used for bit access in long format */\n  uint32_t w;                            /*!< \\brief Type      used for word access */\n} IFSR_Type;\n\n#define IFSR_ExT_Pos                     12U                                    /*!< \\brief IFSR: ExT Position */\n#define IFSR_ExT_Msk                     (1UL << IFSR_ExT_Pos)                  /*!< \\brief IFSR: ExT Mask */\n\n#define IFSR_FS1_Pos                     10U                                    /*!< \\brief IFSR: FS1 Position */\n#define IFSR_FS1_Msk                     (1UL << IFSR_FS1_Pos)                  /*!< \\brief IFSR: FS1 Mask */\n\n#define IFSR_LPAE_Pos                    9U                                     /*!< \\brief IFSR: LPAE Position */\n#define IFSR_LPAE_Msk                    (0x1UL << IFSR_LPAE_Pos)               /*!< \\brief IFSR: LPAE Mask */\n\n#define IFSR_FS0_Pos                     0U                                     /*!< \\brief IFSR: FS0 Position */\n#define IFSR_FS0_Msk                     (0xFUL << IFSR_FS0_Pos)                /*!< \\brief IFSR: FS0 Mask */\n\n#define IFSR_STATUS_Pos                  0U                                     /*!< \\brief IFSR: STATUS Position */\n#define IFSR_STATUS_Msk                  (0x3FUL << IFSR_STATUS_Pos)            /*!< \\brief IFSR: STATUS Mask */\n\n/* CP15 Register ISR */\ntypedef union\n{\n  struct\n  {\n    RESERVED(0:6, uint32_t)\n    uint32_t F:1;                        /*!< \\brief bit:     6  FIQ pending bit */\n    uint32_t I:1;                        /*!< \\brief bit:     7  IRQ pending bit */\n    uint32_t A:1;                        /*!< \\brief bit:     8  External abort pending bit */\n    RESERVED(1:23, uint32_t)\n  } b;                                   /*!< \\brief Structure used for bit  access */\n  uint32_t w;                            /*!< \\brief Type      used for word access */\n} ISR_Type;\n\n#define ISR_A_Pos                        13U                                    /*!< \\brief ISR: A Position */\n#define ISR_A_Msk                        (1UL << ISR_A_Pos)                     /*!< \\brief ISR: A Mask */\n\n#define ISR_I_Pos                        12U                                    /*!< \\brief ISR: I Position */\n#define ISR_I_Msk                        (1UL << ISR_I_Pos)                     /*!< \\brief ISR: I Mask */\n\n#define ISR_F_Pos                        11U                                    /*!< \\brief ISR: F Position */\n#define ISR_F_Msk                        (1UL << ISR_F_Pos)                     /*!< \\brief ISR: F Mask */\n\n/* DACR Register */\n#define DACR_D_Pos_(n)                   (2U*n)                                 /*!< \\brief DACR: Dn Position */\n#define DACR_D_Msk_(n)                   (3UL << DACR_D_Pos_(n))                /*!< \\brief DACR: Dn Mask */\n#define DACR_Dn_NOACCESS                 0U                                     /*!< \\brief DACR Dn field: No access */\n#define DACR_Dn_CLIENT                   1U                                     /*!< \\brief DACR Dn field: Client */\n#define DACR_Dn_MANAGER                  3U                                     /*!< \\brief DACR Dn field: Manager */\n\n/**\n  \\brief     Mask and shift a bit field value for use in a register bit range.\n  \\param [in] field  Name of the register bit field.\n  \\param [in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param [in] field  Name of the register bit field.\n  \\param [in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n\n/**\n \\brief  Union type to access the L2C_310 Cache Controller.\n*/\n#if (__L2C_PRESENT == 1U) || defined(DOXYGEN)\ntypedef struct\n{\n  __IM  uint32_t CACHE_ID;                   /*!< \\brief Offset: 0x0000 (R/ ) Cache ID Register               */\n  __IM  uint32_t CACHE_TYPE;                 /*!< \\brief Offset: 0x0004 (R/ ) Cache Type Register             */\n        RESERVED(0[0x3e], uint32_t)\n  __IOM uint32_t CONTROL;                    /*!< \\brief Offset: 0x0100 (R/W) Control Register                */\n  __IOM uint32_t AUX_CNT;                    /*!< \\brief Offset: 0x0104 (R/W) Auxiliary Control               */\n        RESERVED(1[0x3e], uint32_t)\n  __IOM uint32_t EVENT_CONTROL;              /*!< \\brief Offset: 0x0200 (R/W) Event Counter Control           */\n  __IOM uint32_t EVENT_COUNTER1_CONF;        /*!< \\brief Offset: 0x0204 (R/W) Event Counter 1 Configuration   */\n  __IOM uint32_t EVENT_COUNTER0_CONF;        /*!< \\brief Offset: 0x0208 (R/W) Event Counter 1 Configuration   */\n        RESERVED(2[0x2], uint32_t)\n  __IOM uint32_t INTERRUPT_MASK;             /*!< \\brief Offset: 0x0214 (R/W) Interrupt Mask                  */\n  __IM  uint32_t MASKED_INT_STATUS;          /*!< \\brief Offset: 0x0218 (R/ ) Masked Interrupt Status         */\n  __IM  uint32_t RAW_INT_STATUS;             /*!< \\brief Offset: 0x021c (R/ ) Raw Interrupt Status            */\n  __OM  uint32_t INTERRUPT_CLEAR;            /*!< \\brief Offset: 0x0220 ( /W) Interrupt Clear                 */\n        RESERVED(3[0x143], uint32_t)\n  __IOM uint32_t CACHE_SYNC;                 /*!< \\brief Offset: 0x0730 (R/W) Cache Sync                      */\n        RESERVED(4[0xf], uint32_t)\n  __IOM uint32_t INV_LINE_PA;                /*!< \\brief Offset: 0x0770 (R/W) Invalidate Line By PA           */\n        RESERVED(6[2], uint32_t)\n  __IOM uint32_t INV_WAY;                    /*!< \\brief Offset: 0x077c (R/W) Invalidate by Way               */\n        RESERVED(5[0xc], uint32_t)\n  __IOM uint32_t CLEAN_LINE_PA;              /*!< \\brief Offset: 0x07b0 (R/W) Clean Line by PA                */\n        RESERVED(7[1], uint32_t)\n  __IOM uint32_t CLEAN_LINE_INDEX_WAY;       /*!< \\brief Offset: 0x07b8 (R/W) Clean Line by Index/Way         */\n  __IOM uint32_t CLEAN_WAY;                  /*!< \\brief Offset: 0x07bc (R/W) Clean by Way                    */\n        RESERVED(8[0xc], uint32_t)\n  __IOM uint32_t CLEAN_INV_LINE_PA;          /*!< \\brief Offset: 0x07f0 (R/W) Clean and Invalidate Line by PA  */\n        RESERVED(9[1], uint32_t)\n  __IOM uint32_t CLEAN_INV_LINE_INDEX_WAY;   /*!< \\brief Offset: 0x07f8 (R/W) Clean and Invalidate Line by Index/Way  */\n  __IOM uint32_t CLEAN_INV_WAY;              /*!< \\brief Offset: 0x07fc (R/W) Clean and Invalidate by Way     */\n        RESERVED(10[0x40], uint32_t)\n  __IOM uint32_t DATA_LOCK_0_WAY;            /*!< \\brief Offset: 0x0900 (R/W) Data Lockdown 0 by Way          */\n  __IOM uint32_t INST_LOCK_0_WAY;            /*!< \\brief Offset: 0x0904 (R/W) Instruction Lockdown 0 by Way   */\n  __IOM uint32_t DATA_LOCK_1_WAY;            /*!< \\brief Offset: 0x0908 (R/W) Data Lockdown 1 by Way          */\n  __IOM uint32_t INST_LOCK_1_WAY;            /*!< \\brief Offset: 0x090c (R/W) Instruction Lockdown 1 by Way   */\n  __IOM uint32_t DATA_LOCK_2_WAY;            /*!< \\brief Offset: 0x0910 (R/W) Data Lockdown 2 by Way          */\n  __IOM uint32_t INST_LOCK_2_WAY;            /*!< \\brief Offset: 0x0914 (R/W) Instruction Lockdown 2 by Way   */\n  __IOM uint32_t DATA_LOCK_3_WAY;            /*!< \\brief Offset: 0x0918 (R/W) Data Lockdown 3 by Way          */\n  __IOM uint32_t INST_LOCK_3_WAY;            /*!< \\brief Offset: 0x091c (R/W) Instruction Lockdown 3 by Way   */\n  __IOM uint32_t DATA_LOCK_4_WAY;            /*!< \\brief Offset: 0x0920 (R/W) Data Lockdown 4 by Way          */\n  __IOM uint32_t INST_LOCK_4_WAY;            /*!< \\brief Offset: 0x0924 (R/W) Instruction Lockdown 4 by Way   */\n  __IOM uint32_t DATA_LOCK_5_WAY;            /*!< \\brief Offset: 0x0928 (R/W) Data Lockdown 5 by Way          */\n  __IOM uint32_t INST_LOCK_5_WAY;            /*!< \\brief Offset: 0x092c (R/W) Instruction Lockdown 5 by Way   */\n  __IOM uint32_t DATA_LOCK_6_WAY;            /*!< \\brief Offset: 0x0930 (R/W) Data Lockdown 5 by Way          */\n  __IOM uint32_t INST_LOCK_6_WAY;            /*!< \\brief Offset: 0x0934 (R/W) Instruction Lockdown 5 by Way   */\n  __IOM uint32_t DATA_LOCK_7_WAY;            /*!< \\brief Offset: 0x0938 (R/W) Data Lockdown 6 by Way          */\n  __IOM uint32_t INST_LOCK_7_WAY;            /*!< \\brief Offset: 0x093c (R/W) Instruction Lockdown 6 by Way   */\n        RESERVED(11[0x4], uint32_t)\n  __IOM uint32_t LOCK_LINE_EN;               /*!< \\brief Offset: 0x0950 (R/W) Lockdown by Line Enable         */\n  __IOM uint32_t UNLOCK_ALL_BY_WAY;          /*!< \\brief Offset: 0x0954 (R/W) Unlock All Lines by Way         */\n        RESERVED(12[0xaa], uint32_t)\n  __IOM uint32_t ADDRESS_FILTER_START;       /*!< \\brief Offset: 0x0c00 (R/W) Address Filtering Start         */\n  __IOM uint32_t ADDRESS_FILTER_END;         /*!< \\brief Offset: 0x0c04 (R/W) Address Filtering End           */\n        RESERVED(13[0xce], uint32_t)\n  __IOM uint32_t DEBUG_CONTROL;              /*!< \\brief Offset: 0x0f40 (R/W) Debug Control Register          */\n} L2C_310_TypeDef;\n\n#define L2C_310           ((L2C_310_TypeDef *)L2C_310_BASE) /*!< \\brief L2C_310 register set access pointer */\n#endif\n\n#if (__GIC_PRESENT == 1U) || defined(DOXYGEN)\n\n/** \\brief  Structure type to access the Generic Interrupt Controller Distributor (GICD)\n*/\ntypedef struct\n{\n  __IOM uint32_t CTLR;                 /*!< \\brief  Offset: 0x000 (R/W) Distributor Control Register */\n  __IM  uint32_t TYPER;                /*!< \\brief  Offset: 0x004 (R/ ) Interrupt Controller Type Register */\n  __IM  uint32_t IIDR;                 /*!< \\brief  Offset: 0x008 (R/ ) Distributor Implementer Identification Register */\n        RESERVED(0, uint32_t)\n  __IOM uint32_t STATUSR;              /*!< \\brief  Offset: 0x010 (R/W) Error Reporting Status Register, optional */\n        RESERVED(1[11], uint32_t)\n  __OM  uint32_t SETSPI_NSR;           /*!< \\brief  Offset: 0x040 ( /W) Set SPI Register */\n        RESERVED(2, uint32_t)\n  __OM  uint32_t CLRSPI_NSR;           /*!< \\brief  Offset: 0x048 ( /W) Clear SPI Register */\n        RESERVED(3, uint32_t)\n  __OM  uint32_t SETSPI_SR;            /*!< \\brief  Offset: 0x050 ( /W) Set SPI, Secure Register */\n        RESERVED(4, uint32_t)\n  __OM  uint32_t CLRSPI_SR;            /*!< \\brief  Offset: 0x058 ( /W) Clear SPI, Secure Register */\n        RESERVED(5[9], uint32_t)\n  __IOM uint32_t IGROUPR[32];          /*!< \\brief  Offset: 0x080 (R/W) Interrupt Group Registers */\n  __IOM uint32_t ISENABLER[32];        /*!< \\brief  Offset: 0x100 (R/W) Interrupt Set-Enable Registers */\n  __IOM uint32_t ICENABLER[32];        /*!< \\brief  Offset: 0x180 (R/W) Interrupt Clear-Enable Registers */\n  __IOM uint32_t ISPENDR[32];          /*!< \\brief  Offset: 0x200 (R/W) Interrupt Set-Pending Registers */\n  __IOM uint32_t ICPENDR[32];          /*!< \\brief  Offset: 0x280 (R/W) Interrupt Clear-Pending Registers */\n  __IOM uint32_t ISACTIVER[32];        /*!< \\brief  Offset: 0x300 (R/W) Interrupt Set-Active Registers */\n  __IOM uint32_t ICACTIVER[32];        /*!< \\brief  Offset: 0x380 (R/W) Interrupt Clear-Active Registers */\n  __IOM uint32_t IPRIORITYR[255];      /*!< \\brief  Offset: 0x400 (R/W) Interrupt Priority Registers */\n        RESERVED(6, uint32_t)\n  __IOM uint32_t  ITARGETSR[255];      /*!< \\brief  Offset: 0x800 (R/W) Interrupt Targets Registers */\n        RESERVED(7, uint32_t)\n  __IOM uint32_t ICFGR[64];            /*!< \\brief  Offset: 0xC00 (R/W) Interrupt Configuration Registers */\n  __IOM uint32_t IGRPMODR[32];         /*!< \\brief  Offset: 0xD00 (R/W) Interrupt Group Modifier Registers */\n        RESERVED(8[32], uint32_t)\n  __IOM uint32_t NSACR[64];            /*!< \\brief  Offset: 0xE00 (R/W) Non-secure Access Control Registers */\n  __OM  uint32_t SGIR;                 /*!< \\brief  Offset: 0xF00 ( /W) Software Generated Interrupt Register */\n        RESERVED(9[3], uint32_t)\n  __IOM uint32_t CPENDSGIR[4];         /*!< \\brief  Offset: 0xF10 (R/W) SGI Clear-Pending Registers */\n  __IOM uint32_t SPENDSGIR[4];         /*!< \\brief  Offset: 0xF20 (R/W) SGI Set-Pending Registers */\n        RESERVED(10[5236], uint32_t)\n  __IOM uint64_t IROUTER[988];         /*!< \\brief  Offset: 0x6100(R/W) Interrupt Routing Registers */\n}  GICDistributor_Type;\n\n#define GICDistributor      ((GICDistributor_Type      *)     GIC_DISTRIBUTOR_BASE ) /*!< \\brief GIC Distributor register set access pointer */\n\n/** \\brief  Structure type to access the Generic Interrupt Controller Interface (GICC)\n*/\ntypedef struct\n{\n  __IOM uint32_t CTLR;                 /*!< \\brief  Offset: 0x000 (R/W) CPU Interface Control Register */\n  __IOM uint32_t PMR;                  /*!< \\brief  Offset: 0x004 (R/W) Interrupt Priority Mask Register */\n  __IOM uint32_t BPR;                  /*!< \\brief  Offset: 0x008 (R/W) Binary Point Register */\n  __IM  uint32_t IAR;                  /*!< \\brief  Offset: 0x00C (R/ ) Interrupt Acknowledge Register */\n  __OM  uint32_t EOIR;                 /*!< \\brief  Offset: 0x010 ( /W) End Of Interrupt Register */\n  __IM  uint32_t RPR;                  /*!< \\brief  Offset: 0x014 (R/ ) Running Priority Register */\n  __IM  uint32_t HPPIR;                /*!< \\brief  Offset: 0x018 (R/ ) Highest Priority Pending Interrupt Register */\n  __IOM uint32_t ABPR;                 /*!< \\brief  Offset: 0x01C (R/W) Aliased Binary Point Register */\n  __IM  uint32_t AIAR;                 /*!< \\brief  Offset: 0x020 (R/ ) Aliased Interrupt Acknowledge Register */\n  __OM  uint32_t AEOIR;                /*!< \\brief  Offset: 0x024 ( /W) Aliased End Of Interrupt Register */\n  __IM  uint32_t AHPPIR;               /*!< \\brief  Offset: 0x028 (R/ ) Aliased Highest Priority Pending Interrupt Register */\n  __IOM uint32_t STATUSR;              /*!< \\brief  Offset: 0x02C (R/W) Error Reporting Status Register, optional */\n        RESERVED(1[40], uint32_t)\n  __IOM uint32_t APR[4];               /*!< \\brief  Offset: 0x0D0 (R/W) Active Priority Register */\n  __IOM uint32_t NSAPR[4];             /*!< \\brief  Offset: 0x0E0 (R/W) Non-secure Active Priority Register */\n        RESERVED(2[3], uint32_t)\n  __IM  uint32_t IIDR;                 /*!< \\brief  Offset: 0x0FC (R/ ) CPU Interface Identification Register */\n        RESERVED(3[960], uint32_t)\n  __OM  uint32_t DIR;                  /*!< \\brief  Offset: 0x1000( /W) Deactivate Interrupt Register */\n}  GICInterface_Type;\n\n#define GICInterface        ((GICInterface_Type        *)     GIC_INTERFACE_BASE )   /*!< \\brief GIC Interface register set access pointer */\n#endif\n\n#if (__TIM_PRESENT == 1U) || defined(DOXYGEN)\n#if ((__CORTEX_A == 5U) || (__CORTEX_A == 9U)) || defined(DOXYGEN)\n/** \\brief Structure type to access the Private Timer\n*/\ntypedef struct\n{\n  __IOM uint32_t LOAD;            //!< \\brief  Offset: 0x000 (R/W) Private Timer Load Register\n  __IOM uint32_t COUNTER;         //!< \\brief  Offset: 0x004 (R/W) Private Timer Counter Register\n  __IOM uint32_t CONTROL;         //!< \\brief  Offset: 0x008 (R/W) Private Timer Control Register\n  __IOM uint32_t ISR;             //!< \\brief  Offset: 0x00C (R/W) Private Timer Interrupt Status Register\n        RESERVED(0[4], uint32_t)\n  __IOM uint32_t WLOAD;           //!< \\brief  Offset: 0x020 (R/W) Watchdog Load Register\n  __IOM uint32_t WCOUNTER;        //!< \\brief  Offset: 0x024 (R/W) Watchdog Counter Register\n  __IOM uint32_t WCONTROL;        //!< \\brief  Offset: 0x028 (R/W) Watchdog Control Register\n  __IOM uint32_t WISR;            //!< \\brief  Offset: 0x02C (R/W) Watchdog Interrupt Status Register\n  __IOM uint32_t WRESET;          //!< \\brief  Offset: 0x030 (R/W) Watchdog Reset Status Register\n  __OM  uint32_t WDISABLE;        //!< \\brief  Offset: 0x034 ( /W) Watchdog Disable Register\n} Timer_Type;\n#define PTIM ((Timer_Type *) TIMER_BASE )   /*!< \\brief Timer register struct */\n#endif\n#endif\n\n /*******************************************************************************\n  *                Hardware Abstraction Layer\n   Core Function Interface contains:\n   - L1 Cache Functions\n   - L2C-310 Cache Controller Functions\n   - PL1 Timer Functions\n   - GIC Functions\n   - MMU Functions\n  ******************************************************************************/\n\n/* ##########################  L1 Cache functions  ################################# */\n\n/** \\brief Enable Caches by setting I and C bits in SCTLR register.\n*/\n__STATIC_FORCEINLINE void L1C_EnableCaches(void) {\n  __set_SCTLR( __get_SCTLR() | SCTLR_I_Msk | SCTLR_C_Msk);\n  __ISB();\n}\n\n/** \\brief Disable Caches by clearing I and C bits in SCTLR register.\n*/\n__STATIC_FORCEINLINE void L1C_DisableCaches(void) {\n  __set_SCTLR( __get_SCTLR() & (~SCTLR_I_Msk) & (~SCTLR_C_Msk));\n  __ISB();\n}\n\n/** \\brief  Enable Branch Prediction by setting Z bit in SCTLR register.\n*/\n__STATIC_FORCEINLINE void L1C_EnableBTAC(void) {\n  __set_SCTLR( __get_SCTLR() | SCTLR_Z_Msk);\n  __ISB();\n}\n\n/** \\brief  Disable Branch Prediction by clearing Z bit in SCTLR register.\n*/\n__STATIC_FORCEINLINE void L1C_DisableBTAC(void) {\n  __set_SCTLR( __get_SCTLR() & (~SCTLR_Z_Msk));\n  __ISB();\n}\n\n/** \\brief  Invalidate entire branch predictor array\n*/\n__STATIC_FORCEINLINE void L1C_InvalidateBTAC(void) {\n  __set_BPIALL(0);\n  __DSB();     //ensure completion of the invalidation\n  __ISB();     //ensure instruction fetch path sees new state\n}\n\n/** \\brief  Invalidate the whole instruction cache\n*/\n__STATIC_FORCEINLINE void L1C_InvalidateICacheAll(void) {\n  __set_ICIALLU(0);\n  __DSB();     //ensure completion of the invalidation\n  __ISB();     //ensure instruction fetch path sees new I cache state\n}\n\n/** \\brief  Clean data cache line by address.\n* \\param [in] va Pointer to data to clear the cache for.\n*/\n__STATIC_FORCEINLINE void L1C_CleanDCacheMVA(void *va) {\n  __set_DCCMVAC((uint32_t)va);\n  __DMB();     //ensure the ordering of data cache maintenance operations and their effects\n}\n\n/** \\brief  Invalidate data cache line by address.\n* \\param [in] va Pointer to data to invalidate the cache for.\n*/\n__STATIC_FORCEINLINE void L1C_InvalidateDCacheMVA(void *va) {\n  __set_DCIMVAC((uint32_t)va);\n  __DMB();     //ensure the ordering of data cache maintenance operations and their effects\n}\n\n/** \\brief  Clean and Invalidate data cache by address.\n* \\param [in] va Pointer to data to invalidate the cache for.\n*/\n__STATIC_FORCEINLINE void L1C_CleanInvalidateDCacheMVA(void *va) {\n  __set_DCCIMVAC((uint32_t)va);\n  __DMB();     //ensure the ordering of data cache maintenance operations and their effects\n}\n\n/** \\brief Calculate log2 rounded up\n*  - log(0)  => 0\n*  - log(1)  => 0\n*  - log(2)  => 1\n*  - log(3)  => 2\n*  - log(4)  => 2\n*  - log(5)  => 3\n*        :      :\n*  - log(16) => 4\n*  - log(32) => 5\n*        :      :\n* \\param [in] n input value parameter\n* \\return log2(n)\n*/\n__STATIC_FORCEINLINE uint8_t __log2_up(uint32_t n)\n{\n  if (n < 2U) {\n    return 0U;\n  }\n  uint8_t log = 0U;\n  uint32_t t = n;\n  while(t > 1U)\n  {\n    log++;\n    t >>= 1U;\n  }\n  if (n & 1U) { log++; }\n  return log;\n}\n\n/** \\brief  Apply cache maintenance to given cache level.\n* \\param [in] level cache level to be maintained\n* \\param [in] maint 0 - invalidate, 1 - clean, otherwise - invalidate and clean\n*/\n__STATIC_FORCEINLINE void __L1C_MaintainDCacheSetWay(uint32_t level, uint32_t maint)\n{\n  uint32_t Dummy;\n  uint32_t ccsidr;\n  uint32_t num_sets;\n  uint32_t num_ways;\n  uint32_t shift_way;\n  uint32_t log2_linesize;\n   int32_t log2_num_ways;\n\n  Dummy = level << 1U;\n  /* set csselr, select ccsidr register */\n  __set_CSSELR(Dummy);\n  /* get current ccsidr register */\n  ccsidr = __get_CCSIDR();\n  num_sets = ((ccsidr & 0x0FFFE000U) >> 13U) + 1U;\n  num_ways = ((ccsidr & 0x00001FF8U) >> 3U) + 1U;\n  log2_linesize = (ccsidr & 0x00000007U) + 2U + 2U;\n  log2_num_ways = __log2_up(num_ways);\n  if ((log2_num_ways < 0) || (log2_num_ways > 32)) {\n    return; // FATAL ERROR\n  }\n  shift_way = 32U - (uint32_t)log2_num_ways;\n  for(int32_t way = num_ways-1; way >= 0; way--)\n  {\n    for(int32_t set = num_sets-1; set >= 0; set--)\n    {\n      Dummy = (level << 1U) | (((uint32_t)set) << log2_linesize) | (((uint32_t)way) << shift_way);\n      switch (maint)\n      {\n        case 0U: __set_DCISW(Dummy);  break;\n        case 1U: __set_DCCSW(Dummy);  break;\n        default: __set_DCCISW(Dummy); break;\n      }\n    }\n  }\n  __DMB();\n}\n\n/** \\brief  Clean and Invalidate the entire data or unified cache\n* Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency\n* \\param [in] op 0 - invalidate, 1 - clean, otherwise - invalidate and clean\n*/\n__STATIC_FORCEINLINE void L1C_CleanInvalidateCache(uint32_t op) {\n  uint32_t clidr;\n  uint32_t cache_type;\n  clidr =  __get_CLIDR();\n  for(uint32_t i = 0U; i<7U; i++)\n  {\n    cache_type = (clidr >> i*3U) & 0x7UL;\n    if ((cache_type >= 2U) && (cache_type <= 4U))\n    {\n      __L1C_MaintainDCacheSetWay(i, op);\n    }\n  }\n}\n\n/** \\brief  Clean and Invalidate the entire data or unified cache\n* Generic mechanism for cleaning/invalidating the entire data or unified cache to the point of coherency\n* \\param [in] op 0 - invalidate, 1 - clean, otherwise - invalidate and clean\n* \\deprecated Use generic L1C_CleanInvalidateCache instead.\n*/\nCMSIS_DEPRECATED\n__STATIC_FORCEINLINE void __L1C_CleanInvalidateCache(uint32_t op) {\n  L1C_CleanInvalidateCache(op);\n}\n\n/** \\brief  Invalidate the whole data cache.\n*/\n__STATIC_FORCEINLINE void L1C_InvalidateDCacheAll(void) {\n  L1C_CleanInvalidateCache(0);\n}\n\n/** \\brief  Clean the whole data cache.\n */\n__STATIC_FORCEINLINE void L1C_CleanDCacheAll(void) {\n  L1C_CleanInvalidateCache(1);\n}\n\n/** \\brief  Clean and invalidate the whole data cache.\n */\n__STATIC_FORCEINLINE void L1C_CleanInvalidateDCacheAll(void) {\n  L1C_CleanInvalidateCache(2);\n}\n\n/* ##########################  L2 Cache functions  ################################# */\n#if (__L2C_PRESENT == 1U) || defined(DOXYGEN)\n/** \\brief Cache Sync operation by writing CACHE_SYNC register.\n*/\n__STATIC_INLINE void L2C_Sync(void)\n{\n  L2C_310->CACHE_SYNC = 0x0;\n}\n\n/** \\brief Read cache controller cache ID from CACHE_ID register.\n * \\return L2C_310_TypeDef::CACHE_ID\n */\n__STATIC_INLINE int L2C_GetID (void)\n{\n  return L2C_310->CACHE_ID;\n}\n\n/** \\brief Read cache controller cache type from CACHE_TYPE register.\n*  \\return L2C_310_TypeDef::CACHE_TYPE\n*/\n__STATIC_INLINE int L2C_GetType (void)\n{\n  return L2C_310->CACHE_TYPE;\n}\n\n/** \\brief Invalidate all cache by way\n*/\n__STATIC_INLINE void L2C_InvAllByWay (void)\n{\n  unsigned int assoc;\n\n  if (L2C_310->AUX_CNT & (1U << 16U)) {\n    assoc = 16U;\n  } else {\n    assoc =  8U;\n  }\n\n  L2C_310->INV_WAY = (1U << assoc) - 1U;\n  while(L2C_310->INV_WAY & ((1U << assoc) - 1U)); //poll invalidate\n\n  L2C_Sync();\n}\n\n/** \\brief Clean and Invalidate all cache by way\n*/\n__STATIC_INLINE void L2C_CleanInvAllByWay (void)\n{\n  unsigned int assoc;\n\n  if (L2C_310->AUX_CNT & (1U << 16U)) {\n    assoc = 16U;\n  } else {\n    assoc =  8U;\n  }\n\n  L2C_310->CLEAN_INV_WAY = (1U << assoc) - 1U;\n  while(L2C_310->CLEAN_INV_WAY & ((1U << assoc) - 1U)); //poll invalidate\n\n  L2C_Sync();\n}\n\n/** \\brief Enable Level 2 Cache\n*/\n__STATIC_INLINE void L2C_Enable(void)\n{\n  L2C_310->CONTROL = 0;\n  L2C_310->INTERRUPT_CLEAR = 0x000001FFuL;\n  L2C_310->DEBUG_CONTROL = 0;\n  L2C_310->DATA_LOCK_0_WAY = 0;\n  L2C_310->CACHE_SYNC = 0;\n  L2C_310->CONTROL = 0x01;\n  L2C_Sync();\n}\n\n/** \\brief Disable Level 2 Cache\n*/\n__STATIC_INLINE void L2C_Disable(void)\n{\n  L2C_310->CONTROL = 0x00;\n  L2C_Sync();\n}\n\n/** \\brief Invalidate cache by physical address\n* \\param [in] pa Pointer to data to invalidate cache for.\n*/\n__STATIC_INLINE void L2C_InvPa (void *pa)\n{\n  L2C_310->INV_LINE_PA = (unsigned int)pa;\n  L2C_Sync();\n}\n\n/** \\brief Clean cache by physical address\n* \\param [in] pa Pointer to data to invalidate cache for.\n*/\n__STATIC_INLINE void L2C_CleanPa (void *pa)\n{\n  L2C_310->CLEAN_LINE_PA = (unsigned int)pa;\n  L2C_Sync();\n}\n\n/** \\brief Clean and invalidate cache by physical address\n* \\param [in] pa Pointer to data to invalidate cache for.\n*/\n__STATIC_INLINE void L2C_CleanInvPa (void *pa)\n{\n  L2C_310->CLEAN_INV_LINE_PA = (unsigned int)pa;\n  L2C_Sync();\n}\n#endif\n\n/* ##########################  GIC functions  ###################################### */\n#if (__GIC_PRESENT == 1U) || defined(DOXYGEN)\n\n/** \\brief  Enable the interrupt distributor using the GIC's CTLR register.\n*/\n__STATIC_INLINE void GIC_EnableDistributor(void)\n{\n  GICDistributor->CTLR |= 1U;\n}\n\n/** \\brief Disable the interrupt distributor using the GIC's CTLR register.\n*/\n__STATIC_INLINE void GIC_DisableDistributor(void)\n{\n  GICDistributor->CTLR &=~1U;\n}\n\n/** \\brief Read the GIC's TYPER register.\n* \\return GICDistributor_Type::TYPER\n*/\n__STATIC_INLINE uint32_t GIC_DistributorInfo(void)\n{\n  return (GICDistributor->TYPER);\n}\n\n/** \\brief Reads the GIC's IIDR register.\n* \\return GICDistributor_Type::IIDR\n*/\n__STATIC_INLINE uint32_t GIC_DistributorImplementer(void)\n{\n  return (GICDistributor->IIDR);\n}\n\n/** \\brief Sets the GIC's ITARGETSR register for the given interrupt.\n* \\param [in] IRQn Interrupt to be configured.\n* \\param [in] cpu_target CPU interfaces to assign this interrupt to.\n*/\n__STATIC_INLINE void GIC_SetTarget(IRQn_Type IRQn, uint32_t cpu_target)\n{\n  uint32_t mask = GICDistributor->ITARGETSR[IRQn / 4U] & ~(0xFFUL << ((IRQn % 4U) * 8U));\n  GICDistributor->ITARGETSR[IRQn / 4U] = mask | ((cpu_target & 0xFFUL) << ((IRQn % 4U) * 8U));\n}\n\n/** \\brief Read the GIC's ITARGETSR register.\n* \\param [in] IRQn Interrupt to acquire the configuration for.\n* \\return GICDistributor_Type::ITARGETSR\n*/\n__STATIC_INLINE uint32_t GIC_GetTarget(IRQn_Type IRQn)\n{\n  return (GICDistributor->ITARGETSR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL;\n}\n\n/** \\brief Enable the CPU's interrupt interface.\n*/\n__STATIC_INLINE void GIC_EnableInterface(void)\n{\n  GICInterface->CTLR |= 1U; //enable interface\n}\n\n/** \\brief Disable the CPU's interrupt interface.\n*/\n__STATIC_INLINE void GIC_DisableInterface(void)\n{\n  GICInterface->CTLR &=~1U; //disable distributor\n}\n\n/** \\brief Read the CPU's IAR register.\n* \\return GICInterface_Type::IAR\n*/\n__STATIC_INLINE IRQn_Type GIC_AcknowledgePending(void)\n{\n  return (IRQn_Type)(GICInterface->IAR);\n}\n\n/** \\brief Writes the given interrupt number to the CPU's EOIR register.\n* \\param [in] IRQn The interrupt to be signaled as finished.\n*/\n__STATIC_INLINE void GIC_EndInterrupt(IRQn_Type IRQn)\n{\n  GICInterface->EOIR = IRQn;\n}\n\n/** \\brief Enables the given interrupt using GIC's ISENABLER register.\n* \\param [in] IRQn The interrupt to be enabled.\n*/\n__STATIC_INLINE void GIC_EnableIRQ(IRQn_Type IRQn)\n{\n  GICDistributor->ISENABLER[IRQn / 32U] = 1U << (IRQn % 32U);\n}\n\n/** \\brief Get interrupt enable status using GIC's ISENABLER register.\n* \\param [in] IRQn The interrupt to be queried.\n* \\return 0 - interrupt is not enabled, 1 - interrupt is enabled.\n*/\n__STATIC_INLINE uint32_t GIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  return (GICDistributor->ISENABLER[IRQn / 32U] >> (IRQn % 32U)) & 1UL;\n}\n\n/** \\brief Disables the given interrupt using GIC's ICENABLER register.\n* \\param [in] IRQn The interrupt to be disabled.\n*/\n__STATIC_INLINE void GIC_DisableIRQ(IRQn_Type IRQn)\n{\n  GICDistributor->ICENABLER[IRQn / 32U] = 1U << (IRQn % 32U);\n}\n\n/** \\brief Get interrupt pending status from GIC's ISPENDR register.\n* \\param [in] IRQn The interrupt to be queried.\n* \\return 0 - interrupt is not pending, 1 - interrupt is pendig.\n*/\n__STATIC_INLINE uint32_t GIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  uint32_t pend;\n\n  if (IRQn >= 16U) {\n    pend = (GICDistributor->ISPENDR[IRQn / 32U] >> (IRQn % 32U)) & 1UL;\n  } else {\n    // INTID 0-15 Software Generated Interrupt\n    pend = (GICDistributor->SPENDSGIR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL;\n    // No CPU identification offered\n    if (pend != 0U) {\n      pend = 1U;\n    } else {\n      pend = 0U;\n    }\n  }\n\n  return (pend);\n}\n\n/** \\brief Sets the given interrupt as pending using GIC's ISPENDR register.\n* \\param [in] IRQn The interrupt to be enabled.\n*/\n__STATIC_INLINE void GIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if (IRQn >= 16U) {\n    GICDistributor->ISPENDR[IRQn / 32U] = 1U << (IRQn % 32U);\n  } else {\n    // INTID 0-15 Software Generated Interrupt\n    GICDistributor->SPENDSGIR[IRQn / 4U] = 1U << ((IRQn % 4U) * 8U);\n  }\n}\n\n/** \\brief Clears the given interrupt from being pending using GIC's ICPENDR register.\n* \\param [in] IRQn The interrupt to be enabled.\n*/\n__STATIC_INLINE void GIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if (IRQn >= 16U) {\n    GICDistributor->ICPENDR[IRQn / 32U] = 1U << (IRQn % 32U);\n  } else {\n    // INTID 0-15 Software Generated Interrupt\n    GICDistributor->CPENDSGIR[IRQn / 4U] = 1U << ((IRQn % 4U) * 8U);\n  }\n}\n\n/** \\brief Sets the interrupt configuration using GIC's ICFGR register.\n* \\param [in] IRQn The interrupt to be configured.\n* \\param [in] int_config Int_config field value. Bit 0: Reserved (0 - N-N model, 1 - 1-N model for some GIC before v1)\n*                                           Bit 1: 0 - level sensitive, 1 - edge triggered\n*/\n__STATIC_INLINE void GIC_SetConfiguration(IRQn_Type IRQn, uint32_t int_config)\n{\n  uint32_t icfgr = GICDistributor->ICFGR[IRQn / 16U];\n  uint32_t shift = (IRQn % 16U) << 1U;\n\n  icfgr &= (~(3U         << shift));\n  icfgr |= (  int_config << shift);\n\n  GICDistributor->ICFGR[IRQn / 16U] = icfgr;\n}\n\n/** \\brief Get the interrupt configuration from the GIC's ICFGR register.\n* \\param [in] IRQn Interrupt to acquire the configuration for.\n* \\return Int_config field value. Bit 0: Reserved (0 - N-N model, 1 - 1-N model for some GIC before v1)\n*                                 Bit 1: 0 - level sensitive, 1 - edge triggered\n*/\n__STATIC_INLINE uint32_t GIC_GetConfiguration(IRQn_Type IRQn)\n{\n  return (GICDistributor->ICFGR[IRQn / 16U] >> ((IRQn % 16U) >> 1U));\n}\n\n/** \\brief Set the priority for the given interrupt in the GIC's IPRIORITYR register.\n* \\param [in] IRQn The interrupt to be configured.\n* \\param [in] priority The priority for the interrupt, lower values denote higher priorities.\n*/\n__STATIC_INLINE void GIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  uint32_t mask = GICDistributor->IPRIORITYR[IRQn / 4U] & ~(0xFFUL << ((IRQn % 4U) * 8U));\n  GICDistributor->IPRIORITYR[IRQn / 4U] = mask | ((priority & 0xFFUL) << ((IRQn % 4U) * 8U));\n}\n\n/** \\brief Read the current interrupt priority from GIC's IPRIORITYR register.\n* \\param [in] IRQn The interrupt to be queried.\n*/\n__STATIC_INLINE uint32_t GIC_GetPriority(IRQn_Type IRQn)\n{\n  return (GICDistributor->IPRIORITYR[IRQn / 4U] >> ((IRQn % 4U) * 8U)) & 0xFFUL;\n}\n\n/** \\brief Set the interrupt priority mask using CPU's PMR register.\n* \\param [in] priority Priority mask to be set.\n*/\n__STATIC_INLINE void GIC_SetInterfacePriorityMask(uint32_t priority)\n{\n  GICInterface->PMR = priority & 0xFFUL; //set priority mask\n}\n\n/** \\brief Read the current interrupt priority mask from CPU's PMR register.\n* \\result GICInterface_Type::PMR\n*/\n__STATIC_INLINE uint32_t GIC_GetInterfacePriorityMask(void)\n{\n  return GICInterface->PMR;\n}\n\n/** \\brief Configures the group priority and subpriority split point using CPU's BPR register.\n* \\param [in] binary_point Amount of bits used as subpriority.\n*/\n__STATIC_INLINE void GIC_SetBinaryPoint(uint32_t binary_point)\n{\n  GICInterface->BPR = binary_point & 7U; //set binary point\n}\n\n/** \\brief Read the current group priority and subpriority split point from CPU's BPR register.\n* \\return GICInterface_Type::BPR\n*/\n__STATIC_INLINE uint32_t GIC_GetBinaryPoint(void)\n{\n  return GICInterface->BPR;\n}\n\n/** \\brief Get the status for a given interrupt.\n* \\param [in] IRQn The interrupt to get status for.\n* \\return 0 - not pending/active, 1 - pending, 2 - active, 3 - pending and active\n*/\n__STATIC_INLINE uint32_t GIC_GetIRQStatus(IRQn_Type IRQn)\n{\n  uint32_t pending, active;\n\n  active = ((GICDistributor->ISACTIVER[IRQn / 32U])  >> (IRQn % 32U)) & 1UL;\n  pending = ((GICDistributor->ISPENDR[IRQn / 32U]) >> (IRQn % 32U)) & 1UL;\n\n  return ((active<<1U) | pending);\n}\n\n/** \\brief Generate a software interrupt using GIC's SGIR register.\n* \\param [in] IRQn Software interrupt to be generated.\n* \\param [in] target_list List of CPUs the software interrupt should be forwarded to.\n* \\param [in] filter_list Filter to be applied to determine interrupt receivers.\n*/\n__STATIC_INLINE void GIC_SendSGI(IRQn_Type IRQn, uint32_t target_list, uint32_t filter_list)\n{\n  GICDistributor->SGIR = ((filter_list & 3U) << 24U) | ((target_list & 0xFFUL) << 16U) | (IRQn & 0x0FUL);\n}\n\n/** \\brief Get the interrupt number of the highest interrupt pending from CPU's HPPIR register.\n* \\return GICInterface_Type::HPPIR\n*/\n__STATIC_INLINE uint32_t GIC_GetHighPendingIRQ(void)\n{\n  return GICInterface->HPPIR;\n}\n\n/** \\brief Provides information about the implementer and revision of the CPU interface.\n* \\return GICInterface_Type::IIDR\n*/\n__STATIC_INLINE uint32_t GIC_GetInterfaceId(void)\n{\n  return GICInterface->IIDR;\n}\n\n/** \\brief Set the interrupt group from the GIC's IGROUPR register.\n* \\param [in] IRQn The interrupt to be queried.\n* \\param [in] group Interrupt group number: 0 - Group 0, 1 - Group 1\n*/\n__STATIC_INLINE void GIC_SetGroup(IRQn_Type IRQn, uint32_t group)\n{\n  uint32_t igroupr = GICDistributor->IGROUPR[IRQn / 32U];\n  uint32_t shift   = (IRQn % 32U);\n\n  igroupr &= (~(1U          << shift));\n  igroupr |= ( (group & 1U) << shift);\n\n  GICDistributor->IGROUPR[IRQn / 32U] = igroupr;\n}\n#define GIC_SetSecurity         GIC_SetGroup\n\n/** \\brief Get the interrupt group from the GIC's IGROUPR register.\n* \\param [in] IRQn The interrupt to be queried.\n* \\return 0 - Group 0, 1 - Group 1\n*/\n__STATIC_INLINE uint32_t GIC_GetGroup(IRQn_Type IRQn)\n{\n  return (GICDistributor->IGROUPR[IRQn / 32U] >> (IRQn % 32U)) & 1UL;\n}\n#define GIC_GetSecurity         GIC_GetGroup\n\n/** \\brief Initialize the interrupt distributor.\n*/\n__STATIC_INLINE void GIC_DistInit(void)\n{\n  uint32_t i;\n  uint32_t num_irq = 0U;\n  uint32_t priority_field;\n\n  //A reset sets all bits in the IGROUPRs corresponding to the SPIs to 0,\n  //configuring all of the interrupts as Secure.\n\n  //Disable interrupt forwarding\n  GIC_DisableDistributor();\n  //Get the maximum number of interrupts that the GIC supports\n  num_irq = 32U * ((GIC_DistributorInfo() & 0x1FU) + 1U);\n\n  /* Priority level is implementation defined.\n   To determine the number of priority bits implemented write 0xFF to an IPRIORITYR\n   priority field and read back the value stored.*/\n  GIC_SetPriority((IRQn_Type)0U, 0xFFU);\n  priority_field = GIC_GetPriority((IRQn_Type)0U);\n\n  for (i = 32U; i < num_irq; i++)\n  {\n      //Disable the SPI interrupt\n      GIC_DisableIRQ((IRQn_Type)i);\n      //Set level-sensitive (and N-N model)\n      GIC_SetConfiguration((IRQn_Type)i, 0U);\n      //Set priority\n      GIC_SetPriority((IRQn_Type)i, priority_field/2U);\n      //Set target list to CPU0\n      GIC_SetTarget((IRQn_Type)i, 1U);\n  }\n  //Enable distributor\n  GIC_EnableDistributor();\n}\n\n/** \\brief Initialize the CPU's interrupt interface\n*/\n__STATIC_INLINE void GIC_CPUInterfaceInit(void)\n{\n  uint32_t i;\n  uint32_t priority_field;\n\n  //A reset sets all bits in the IGROUPRs corresponding to the SPIs to 0,\n  //configuring all of the interrupts as Secure.\n\n  //Disable interrupt forwarding\n  GIC_DisableInterface();\n\n  /* Priority level is implementation defined.\n   To determine the number of priority bits implemented write 0xFF to an IPRIORITYR\n   priority field and read back the value stored.*/\n  GIC_SetPriority((IRQn_Type)0U, 0xFFU);\n  priority_field = GIC_GetPriority((IRQn_Type)0U);\n\n  //SGI and PPI\n  for (i = 0U; i < 32U; i++)\n  {\n    if(i > 15U) {\n      //Set level-sensitive (and N-N model) for PPI\n      GIC_SetConfiguration((IRQn_Type)i, 0U);\n    }\n    //Disable SGI and PPI interrupts\n    GIC_DisableIRQ((IRQn_Type)i);\n    //Set priority\n    GIC_SetPriority((IRQn_Type)i, priority_field/2U);\n  }\n  //Enable interface\n  GIC_EnableInterface();\n  //Set binary point to 0\n  GIC_SetBinaryPoint(0U);\n  //Set priority mask\n  GIC_SetInterfacePriorityMask(0xFFU);\n}\n\n/** \\brief Initialize and enable the GIC\n*/\n__STATIC_INLINE void GIC_Enable(void)\n{\n  GIC_DistInit();\n  GIC_CPUInterfaceInit(); //per CPU\n}\n#endif\n\n/* ##########################  Generic Timer functions  ############################ */\n#if (__TIM_PRESENT == 1U) || defined(DOXYGEN)\n\n/* PL1 Physical Timer */\n#if (__CORTEX_A == 7U) || defined(DOXYGEN)\n\n/** \\brief Physical Timer Control register */\ntypedef union\n{\n  struct\n  {\n    uint32_t ENABLE:1;      /*!< \\brief bit: 0      Enables the timer. */\n    uint32_t IMASK:1;       /*!< \\brief bit: 1      Timer output signal mask bit. */\n    uint32_t ISTATUS:1;     /*!< \\brief bit: 2      The status of the timer. */\n    RESERVED(0:29, uint32_t)\n  } b;                      /*!< \\brief Structure used for bit  access */\n  uint32_t w;               /*!< \\brief Type      used for word access */\n} CNTP_CTL_Type;\n\n/** \\brief Configures the frequency the timer shall run at.\n* \\param [in] value The timer frequency in Hz.\n*/\n__STATIC_INLINE void PL1_SetCounterFrequency(uint32_t value)\n{\n  __set_CNTFRQ(value);\n  __ISB();\n}\n\n/** \\brief Sets the reset value of the timer.\n* \\param [in] value The value the timer is loaded with.\n*/\n__STATIC_INLINE void PL1_SetLoadValue(uint32_t value)\n{\n  __set_CNTP_TVAL(value);\n  __ISB();\n}\n\n/** \\brief Get the current counter value.\n* \\return Current counter value.\n*/\n__STATIC_INLINE uint32_t PL1_GetCurrentValue(void)\n{\n  return(__get_CNTP_TVAL());\n}\n\n/** \\brief Get the current physical counter value.\n* \\return Current physical counter value.\n*/\n__STATIC_INLINE uint64_t PL1_GetCurrentPhysicalValue(void)\n{\n  return(__get_CNTPCT());\n}\n\n/** \\brief Set the physical compare value.\n* \\param [in] value New physical timer compare value.\n*/\n__STATIC_INLINE void PL1_SetPhysicalCompareValue(uint64_t value)\n{\n  __set_CNTP_CVAL(value);\n  __ISB();\n}\n\n/** \\brief Get the physical compare value.\n* \\return Physical compare value.\n*/\n__STATIC_INLINE uint64_t PL1_GetPhysicalCompareValue(void)\n{\n  return(__get_CNTP_CVAL());\n}\n\n/** \\brief Configure the timer by setting the control value.\n* \\param [in] value New timer control value.\n*/\n__STATIC_INLINE void PL1_SetControl(uint32_t value)\n{\n  __set_CNTP_CTL(value);\n  __ISB();\n}\n\n/** \\brief Get the control value.\n* \\return Control value.\n*/\n__STATIC_INLINE uint32_t PL1_GetControl(void)\n{\n  return(__get_CNTP_CTL());\n}\n#endif\n\n/* Private Timer */\n#if ((__CORTEX_A == 5U) || (__CORTEX_A == 9U)) || defined(DOXYGEN)\n/** \\brief Set the load value to timers LOAD register.\n* \\param [in] value The load value to be set.\n*/\n__STATIC_INLINE void PTIM_SetLoadValue(uint32_t value)\n{\n  PTIM->LOAD = value;\n}\n\n/** \\brief Get the load value from timers LOAD register.\n* \\return Timer_Type::LOAD\n*/\n__STATIC_INLINE uint32_t PTIM_GetLoadValue(void)\n{\n  return(PTIM->LOAD);\n}\n\n/** \\brief Set current counter value from its COUNTER register.\n*/\n__STATIC_INLINE void PTIM_SetCurrentValue(uint32_t value)\n{\n  PTIM->COUNTER = value;\n}\n\n/** \\brief Get current counter value from timers COUNTER register.\n* \\result Timer_Type::COUNTER\n*/\n__STATIC_INLINE uint32_t PTIM_GetCurrentValue(void)\n{\n  return(PTIM->COUNTER);\n}\n\n/** \\brief Configure the timer using its CONTROL register.\n* \\param [in] value The new configuration value to be set.\n*/\n__STATIC_INLINE void PTIM_SetControl(uint32_t value)\n{\n  PTIM->CONTROL = value;\n}\n\n/** ref Timer_Type::CONTROL Get the current timer configuration from its CONTROL register.\n* \\return Timer_Type::CONTROL\n*/\n__STATIC_INLINE uint32_t PTIM_GetControl(void)\n{\n  return(PTIM->CONTROL);\n}\n\n/** ref Timer_Type::CONTROL Get the event flag in timers ISR register.\n* \\return 0 - flag is not set, 1- flag is set\n*/\n__STATIC_INLINE uint32_t PTIM_GetEventFlag(void)\n{\n  return (PTIM->ISR & 1UL);\n}\n\n/** ref Timer_Type::CONTROL Clears the event flag in timers ISR register.\n*/\n__STATIC_INLINE void PTIM_ClearEventFlag(void)\n{\n  PTIM->ISR = 1;\n}\n#endif\n#endif\n\n/* ##########################  MMU functions  ###################################### */\n\n#define SECTION_DESCRIPTOR      (0x2)\n#define SECTION_MASK            (0xFFFFFFFC)\n\n#define SECTION_TEXCB_MASK      (0xFFFF8FF3)\n#define SECTION_B_SHIFT         (2)\n#define SECTION_C_SHIFT         (3)\n#define SECTION_TEX0_SHIFT      (12)\n#define SECTION_TEX1_SHIFT      (13)\n#define SECTION_TEX2_SHIFT      (14)\n\n#define SECTION_XN_MASK         (0xFFFFFFEF)\n#define SECTION_XN_SHIFT        (4)\n\n#define SECTION_DOMAIN_MASK     (0xFFFFFE1F)\n#define SECTION_DOMAIN_SHIFT    (5)\n\n#define SECTION_P_MASK          (0xFFFFFDFF)\n#define SECTION_P_SHIFT         (9)\n\n#define SECTION_AP_MASK         (0xFFFF73FF)\n#define SECTION_AP_SHIFT        (10)\n#define SECTION_AP2_SHIFT       (15)\n\n#define SECTION_S_MASK          (0xFFFEFFFF)\n#define SECTION_S_SHIFT         (16)\n\n#define SECTION_NG_MASK         (0xFFFDFFFF)\n#define SECTION_NG_SHIFT        (17)\n\n#define SECTION_SUPER_MASK      (0xFFF7FFFF)\n#define SECTION_SUPER_SHIFT     (18)\n\n#define SECTION_NS_MASK         (0xFFF7FFFF)\n#define SECTION_NS_SHIFT        (19)\n\n#define PAGE_L1_DESCRIPTOR      (0x1)\n#define PAGE_L1_MASK            (0xFFFFFFFC)\n\n#define PAGE_L2_4K_DESC         (0x2)\n#define PAGE_L2_4K_MASK         (0xFFFFFFFD)\n\n#define PAGE_L2_64K_DESC        (0x1)\n#define PAGE_L2_64K_MASK        (0xFFFFFFFC)\n\n#define PAGE_4K_TEXCB_MASK      (0xFFFFFE33)\n#define PAGE_4K_B_SHIFT         (2)\n#define PAGE_4K_C_SHIFT         (3)\n#define PAGE_4K_TEX0_SHIFT      (6)\n#define PAGE_4K_TEX1_SHIFT      (7)\n#define PAGE_4K_TEX2_SHIFT      (8)\n\n#define PAGE_64K_TEXCB_MASK     (0xFFFF8FF3)\n#define PAGE_64K_B_SHIFT        (2)\n#define PAGE_64K_C_SHIFT        (3)\n#define PAGE_64K_TEX0_SHIFT     (12)\n#define PAGE_64K_TEX1_SHIFT     (13)\n#define PAGE_64K_TEX2_SHIFT     (14)\n\n#define PAGE_TEXCB_MASK         (0xFFFF8FF3)\n#define PAGE_B_SHIFT            (2)\n#define PAGE_C_SHIFT            (3)\n#define PAGE_TEX_SHIFT          (12)\n\n#define PAGE_XN_4K_MASK         (0xFFFFFFFE)\n#define PAGE_XN_4K_SHIFT        (0)\n#define PAGE_XN_64K_MASK        (0xFFFF7FFF)\n#define PAGE_XN_64K_SHIFT       (15)\n\n#define PAGE_DOMAIN_MASK        (0xFFFFFE1F)\n#define PAGE_DOMAIN_SHIFT       (5)\n\n#define PAGE_P_MASK             (0xFFFFFDFF)\n#define PAGE_P_SHIFT            (9)\n\n#define PAGE_AP_MASK            (0xFFFFFDCF)\n#define PAGE_AP_SHIFT           (4)\n#define PAGE_AP2_SHIFT          (9)\n\n#define PAGE_S_MASK             (0xFFFFFBFF)\n#define PAGE_S_SHIFT            (10)\n\n#define PAGE_NG_MASK            (0xFFFFF7FF)\n#define PAGE_NG_SHIFT           (11)\n\n#define PAGE_NS_MASK            (0xFFFFFFF7)\n#define PAGE_NS_SHIFT           (3)\n\n#define OFFSET_1M               (0x00100000)\n#define OFFSET_64K              (0x00010000)\n#define OFFSET_4K               (0x00001000)\n\n#define DESCRIPTOR_FAULT        (0x00000000)\n\n/* Attributes enumerations */\n\n/* Region size attributes */\ntypedef enum\n{\n   SECTION,\n   PAGE_4k,\n   PAGE_64k,\n} mmu_region_size_Type;\n\n/* Region type attributes */\ntypedef enum\n{\n   NORMAL,\n   DEVICE,\n   SHARED_DEVICE,\n   NON_SHARED_DEVICE,\n   STRONGLY_ORDERED\n} mmu_memory_Type;\n\n/* Region cacheability attributes */\ntypedef enum\n{\n   NON_CACHEABLE,\n   WB_WA,\n   WT,\n   WB_NO_WA,\n} mmu_cacheability_Type;\n\n/* Region parity check attributes */\ntypedef enum\n{\n   ECC_DISABLED,\n   ECC_ENABLED,\n} mmu_ecc_check_Type;\n\n/* Region execution attributes */\ntypedef enum\n{\n   EXECUTE,\n   NON_EXECUTE,\n} mmu_execute_Type;\n\n/* Region global attributes */\ntypedef enum\n{\n   GLOBAL,\n   NON_GLOBAL,\n} mmu_global_Type;\n\n/* Region shareability attributes */\ntypedef enum\n{\n   NON_SHARED,\n   SHARED,\n} mmu_shared_Type;\n\n/* Region security attributes */\ntypedef enum\n{\n   SECURE,\n   NON_SECURE,\n} mmu_secure_Type;\n\n/* Region access attributes */\ntypedef enum\n{\n   NO_ACCESS,\n   RW,\n   READ,\n} mmu_access_Type;\n\n/* Memory Region definition */\ntypedef struct RegionStruct {\n    mmu_region_size_Type rg_t;\n    mmu_memory_Type mem_t;\n    uint8_t domain;\n    mmu_cacheability_Type inner_norm_t;\n    mmu_cacheability_Type outer_norm_t;\n    mmu_ecc_check_Type e_t;\n    mmu_execute_Type xn_t;\n    mmu_global_Type g_t;\n    mmu_secure_Type sec_t;\n    mmu_access_Type priv_t;\n    mmu_access_Type user_t;\n    mmu_shared_Type sh_t;\n\n} mmu_region_attributes_Type;\n\n//Following macros define the descriptors and attributes\n//Sect_Normal. Outer & inner wb/wa, non-shareable, executable, rw, domain 0\n#define section_normal(descriptor_l1, region)     region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = WB_WA; \\\n                                   region.outer_norm_t = WB_WA; \\\n                                   region.mem_t = NORMAL; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n\n//Sect_Normal_NC. Outer & inner non-cacheable, non-shareable, executable, rw, domain 0\n#define section_normal_nc(descriptor_l1, region)    region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = NORMAL; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n\n//Sect_Normal_RO_NC. Outer & inner non-cacheable, non-shareable, executable, ro, domain 0\n#define section_normal_ro_nc(descriptor_l1, region) region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = NORMAL; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = EXECUTE; \\\n                                   region.priv_t = READ; \\\n                                   region.user_t = READ; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n\n//Sect_Normal_Cod. Outer & inner wb/wa, non-shareable, executable, ro, domain 0\n#define section_normal_cod(descriptor_l1, region) region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = WB_WA; \\\n                                   region.outer_norm_t = WB_WA; \\\n                                   region.mem_t = NORMAL; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = EXECUTE; \\\n                                   region.priv_t = READ; \\\n                                   region.user_t = READ; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n\n//Sect_Normal_RO. Sect_Normal_Cod, but not executable\n#define section_normal_ro(descriptor_l1, region)  region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = WB_WA; \\\n                                   region.outer_norm_t = WB_WA; \\\n                                   region.mem_t = NORMAL; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = READ; \\\n                                   region.user_t = READ; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n\n//Sect_Normal_RW. Sect_Normal_Cod, but writeable and not executable\n#define section_normal_rw(descriptor_l1, region) region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = WB_WA; \\\n                                   region.outer_norm_t = WB_WA; \\\n                                   region.mem_t = NORMAL; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n//Sect_SO. Strongly-ordered (therefore shareable), not executable, rw, domain 0, base addr 0\n#define section_so(descriptor_l1, region) region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = STRONGLY_ORDERED; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n\n#if 0\n//Sect_Device_RO. Device, non-shareable, non-executable, ro, domain 0, base addr 0\n#define section_device_ro(descriptor_l1, region) region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = STRONGLY_ORDERED; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = READ; \\\n                                   region.user_t = READ; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n\n//Sect_Device_RW. Sect_Device_RO, but writeable\n#define section_device_rw(descriptor_l1, region) region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = STRONGLY_ORDERED; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n#else\n//Sect_Device_RO. Device, non-shareable, non-executable, ro, domain 0, base addr 0\n#define section_device_ro(descriptor_l1, region) region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = SHARED_DEVICE; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = READ; \\\n                                   region.user_t = READ; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n\n//Sect_Device_RW. Sect_Device_RO, but writeable\n#define section_device_rw(descriptor_l1, region) region.rg_t = SECTION; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = SHARED_DEVICE; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetSectionDescriptor(&descriptor_l1, region);\n#endif\n\n//Page_4k_Device_RW.  Shared device, not executable, rw, domain 0\n#define page4k_device_rw(descriptor_l1, descriptor_l2, region) region.rg_t = PAGE_4k; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = SHARED_DEVICE; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetPageDescriptor(&descriptor_l1, &descriptor_l2, region);\n\n//Page_4k_Normal. Outer & inner wb/wa, non-shareable, executable, rw, domain 0\n#define page4k_normal(descriptor_l1, descriptor_l2, region) region.rg_t = PAGE_4k; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = WB_WA; \\\n                                   region.outer_norm_t = WB_WA; \\\n                                   region.mem_t = NORMAL; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetPageDescriptor(&descriptor_l1, &descriptor_l2, region);\n\n//Page_64k_Device_RW.  Shared device, not executable, rw, domain 0\n#define page64k_device_rw(descriptor_l1, descriptor_l2, region)  region.rg_t = PAGE_64k; \\\n                                   region.domain = 0x0; \\\n                                   region.e_t = ECC_DISABLED; \\\n                                   region.g_t = GLOBAL; \\\n                                   region.inner_norm_t = NON_CACHEABLE; \\\n                                   region.outer_norm_t = NON_CACHEABLE; \\\n                                   region.mem_t = SHARED_DEVICE; \\\n                                   region.sec_t = SECURE; \\\n                                   region.xn_t = NON_EXECUTE; \\\n                                   region.priv_t = RW; \\\n                                   region.user_t = RW; \\\n                                   region.sh_t = NON_SHARED; \\\n                                   MMU_GetPageDescriptor(&descriptor_l1, &descriptor_l2, region);\n\n/** \\brief  Set section execution-never attribute\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]                xn  Section execution-never attribute : EXECUTE , NON_EXECUTE.\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_XNSection(uint32_t *descriptor_l1, mmu_execute_Type xn)\n{\n  *descriptor_l1 &= SECTION_XN_MASK;\n  *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set section domain\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]            domain  Section domain\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_DomainSection(uint32_t *descriptor_l1, uint8_t domain)\n{\n  *descriptor_l1 &= SECTION_DOMAIN_MASK;\n  *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set section parity check\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]              p_bit Parity check: ECC_DISABLED, ECC_ENABLED\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_PSection(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)\n{\n  *descriptor_l1 &= SECTION_P_MASK;\n  *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set section access privileges\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]              user  User Level Access: NO_ACCESS, RW, READ\n  \\param [in]              priv  Privilege Level Access: NO_ACCESS, RW, READ\n  \\param [in]               afe  Access flag enable\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_APSection(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)\n{\n  uint32_t ap = 0;\n\n  if (afe == 0) { //full access\n    if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }\n    else if ((priv == RW) && (user == NO_ACCESS))   { ap = 0x1; }\n    else if ((priv == RW) && (user == READ))        { ap = 0x2; }\n    else if ((priv == RW) && (user == RW))          { ap = 0x3; }\n    else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }\n    else if ((priv == READ) && (user == READ))      { ap = 0x7; }\n  }\n\n  else { //Simplified access\n    if ((priv == RW) && (user == NO_ACCESS))        { ap = 0x1; }\n    else if ((priv == RW) && (user == RW))          { ap = 0x3; }\n    else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }\n    else if ((priv == READ) && (user == READ))      { ap = 0x7; }\n  }\n\n  *descriptor_l1 &= SECTION_AP_MASK;\n  *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;\n  *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;\n\n  return 0;\n}\n\n/** \\brief  Set section shareability\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]             s_bit  Section shareability: NON_SHARED, SHARED\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_SharedSection(uint32_t *descriptor_l1, mmu_shared_Type s_bit)\n{\n  *descriptor_l1 &= SECTION_S_MASK;\n  *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set section Global attribute\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]             g_bit  Section attribute: GLOBAL, NON_GLOBAL\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_GlobalSection(uint32_t *descriptor_l1, mmu_global_Type g_bit)\n{\n  *descriptor_l1 &= SECTION_NG_MASK;\n  *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);\n  return 0;\n}\n\n__STATIC_INLINE int MMU_SuperSection(uint32_t *descriptor_l1, mmu_secure_Type s_bit)\n{\n  *descriptor_l1 &= SECTION_SUPER_MASK;\n  *descriptor_l1 |= ((s_bit & 0x1) << SECTION_SUPER_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set section Security attribute\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]             s_bit  Section Security attribute: SECURE, NON_SECURE\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_SecureSection(uint32_t *descriptor_l1, mmu_secure_Type s_bit)\n{\n  *descriptor_l1 &= SECTION_NS_MASK;\n  *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);\n  return 0;\n}\n\n/* Page 4k or 64k */\n/** \\brief  Set 4k/64k page execution-never attribute\n\n  \\param [out]    descriptor_l2  L2 descriptor.\n  \\param [in]                xn  Page execution-never attribute : EXECUTE , NON_EXECUTE.\n  \\param [in]              page  Page size: PAGE_4k, PAGE_64k,\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_XNPage(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)\n{\n  if (page == PAGE_4k)\n  {\n      *descriptor_l2 &= PAGE_XN_4K_MASK;\n      *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);\n  }\n  else\n  {\n      *descriptor_l2 &= PAGE_XN_64K_MASK;\n      *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);\n  }\n  return 0;\n}\n\n/** \\brief  Set 4k/64k page domain\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]            domain  Page domain\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_DomainPage(uint32_t *descriptor_l1, uint8_t domain)\n{\n  *descriptor_l1 &= PAGE_DOMAIN_MASK;\n  *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set 4k/64k page parity check\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]              p_bit Parity check: ECC_DISABLED, ECC_ENABLED\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_PPage(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)\n{\n  *descriptor_l1 &= SECTION_P_MASK;\n  *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set 4k/64k page access privileges\n\n  \\param [out]    descriptor_l2  L2 descriptor.\n  \\param [in]              user  User Level Access: NO_ACCESS, RW, READ\n  \\param [in]              priv  Privilege Level Access: NO_ACCESS, RW, READ\n  \\param [in]               afe  Access flag enable\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_APPage(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)\n{\n  uint32_t ap = 0;\n\n  if (afe == 0) { //full access\n    if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }\n    else if ((priv == RW) && (user == NO_ACCESS))   { ap = 0x1; }\n    else if ((priv == RW) && (user == READ))        { ap = 0x2; }\n    else if ((priv == RW) && (user == RW))          { ap = 0x3; }\n    else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }\n    else if ((priv == READ) && (user == READ))      { ap = 0x6; }\n  }\n\n  else { //Simplified access\n    if ((priv == RW) && (user == NO_ACCESS))        { ap = 0x1; }\n    else if ((priv == RW) && (user == RW))          { ap = 0x3; }\n    else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }\n    else if ((priv == READ) && (user == READ))      { ap = 0x7; }\n  }\n\n  *descriptor_l2 &= PAGE_AP_MASK;\n  *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;\n  *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;\n\n  return 0;\n}\n\n/** \\brief  Set 4k/64k page shareability\n\n  \\param [out]    descriptor_l2  L2 descriptor.\n  \\param [in]             s_bit  4k/64k page shareability: NON_SHARED, SHARED\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_SharedPage(uint32_t *descriptor_l2, mmu_shared_Type s_bit)\n{\n  *descriptor_l2 &= PAGE_S_MASK;\n  *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set 4k/64k page Global attribute\n\n  \\param [out]    descriptor_l2  L2 descriptor.\n  \\param [in]             g_bit  4k/64k page attribute: GLOBAL, NON_GLOBAL\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_GlobalPage(uint32_t *descriptor_l2, mmu_global_Type g_bit)\n{\n  *descriptor_l2 &= PAGE_NG_MASK;\n  *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set 4k/64k page Security attribute\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]             s_bit  4k/64k page Security attribute: SECURE, NON_SECURE\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_SecurePage(uint32_t *descriptor_l1, mmu_secure_Type s_bit)\n{\n  *descriptor_l1 &= PAGE_NS_MASK;\n  *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);\n  return 0;\n}\n\n/** \\brief  Set Section memory attributes\n\n  \\param [out]    descriptor_l1  L1 descriptor.\n  \\param [in]               mem  Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED\n  \\param [in]             outer  Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,\n  \\param [in]             inner  Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_MemorySection(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)\n{\n  *descriptor_l1 &= SECTION_TEXCB_MASK;\n\n  if (STRONGLY_ORDERED == mem)\n  {\n    return 0;\n  }\n  else if (SHARED_DEVICE == mem)\n  {\n    *descriptor_l1 |= (1 << SECTION_B_SHIFT);\n  }\n  else if (NON_SHARED_DEVICE == mem)\n  {\n    *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);\n  }\n  else if (NORMAL == mem)\n  {\n   *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;\n   switch(inner)\n   {\n      case NON_CACHEABLE:\n        break;\n      case WB_WA:\n        *descriptor_l1 |= (1 << SECTION_B_SHIFT);\n        break;\n      case WT:\n        *descriptor_l1 |= 1 << SECTION_C_SHIFT;\n        break;\n      case WB_NO_WA:\n        *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);\n        break;\n    }\n    switch(outer)\n    {\n      case NON_CACHEABLE:\n        break;\n      case WB_WA:\n        *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);\n        break;\n      case WT:\n        *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;\n        break;\n      case WB_NO_WA:\n        *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);\n        break;\n    }\n  }\n  return 0;\n}\n\n/** \\brief  Set 4k/64k page memory attributes\n\n  \\param [out]    descriptor_l2  L2 descriptor.\n  \\param [in]               mem  4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED\n  \\param [in]             outer  Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,\n  \\param [in]             inner  Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,\n  \\param [in]              page  Page size\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_MemoryPage(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)\n{\n  *descriptor_l2 &= PAGE_4K_TEXCB_MASK;\n\n  if (page == PAGE_64k)\n  {\n    //same as section\n    MMU_MemorySection(descriptor_l2, mem, outer, inner);\n  }\n  else\n  {\n    if (STRONGLY_ORDERED == mem)\n    {\n      return 0;\n    }\n    else if (SHARED_DEVICE == mem)\n    {\n      *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);\n    }\n    else if (NON_SHARED_DEVICE == mem)\n    {\n      *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);\n    }\n    else if (NORMAL == mem)\n    {\n      *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;\n      switch(inner)\n      {\n        case NON_CACHEABLE:\n          break;\n        case WB_WA:\n          *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);\n          break;\n        case WT:\n          *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;\n          break;\n        case WB_NO_WA:\n          *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);\n          break;\n      }\n      switch(outer)\n      {\n        case NON_CACHEABLE:\n          break;\n        case WB_WA:\n          *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);\n          break;\n        case WT:\n          *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;\n          break;\n        case WB_NO_WA:\n          *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX1_SHIFT);\n          break;\n      }\n    }\n  }\n\n  return 0;\n}\n\n/** \\brief  Create a L1 section descriptor\n\n  \\param [out]     descriptor  L1 descriptor\n  \\param [in]      reg  Section attributes\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_GetSectionDescriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)\n{\n  *descriptor  = 0;\n\n  MMU_MemorySection(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);\n  MMU_XNSection(descriptor,reg.xn_t);\n  MMU_DomainSection(descriptor, reg.domain);\n  MMU_PSection(descriptor, reg.e_t);\n  MMU_APSection(descriptor, reg.priv_t, reg.user_t, 1);\n  MMU_SharedSection(descriptor,reg.sh_t);\n  MMU_GlobalSection(descriptor,reg.g_t);\n  MMU_SecureSection(descriptor,reg.sec_t);\n  *descriptor &= SECTION_MASK;\n  *descriptor |= SECTION_DESCRIPTOR;\n\n  return 0;\n}\n\n/** \\brief  Create a L1 and L2 4k/64k page descriptor\n\n  \\param [out]       descriptor  L1 descriptor\n  \\param [out]      descriptor2  L2 descriptor\n  \\param [in]               reg  4k/64k page attributes\n\n  \\return          0\n*/\n__STATIC_INLINE int MMU_GetPageDescriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)\n{\n  *descriptor  = 0;\n  *descriptor2 = 0;\n\n  switch (reg.rg_t)\n  {\n    case PAGE_4k:\n      MMU_MemoryPage(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);\n      MMU_XNPage(descriptor2, reg.xn_t, PAGE_4k);\n      MMU_DomainPage(descriptor, reg.domain);\n      MMU_PPage(descriptor, reg.e_t);\n      MMU_APPage(descriptor2, reg.priv_t, reg.user_t, 1);\n      MMU_SharedPage(descriptor2,reg.sh_t);\n      MMU_GlobalPage(descriptor2,reg.g_t);\n      MMU_SecurePage(descriptor,reg.sec_t);\n      *descriptor &= PAGE_L1_MASK;\n      *descriptor |= PAGE_L1_DESCRIPTOR;\n      *descriptor2 &= PAGE_L2_4K_MASK;\n      *descriptor2 |= PAGE_L2_4K_DESC;\n      break;\n\n    case PAGE_64k:\n      MMU_MemoryPage(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);\n      MMU_XNPage(descriptor2, reg.xn_t, PAGE_64k);\n      MMU_DomainPage(descriptor, reg.domain);\n      MMU_PPage(descriptor, reg.e_t);\n      MMU_APPage(descriptor2, reg.priv_t, reg.user_t, 1);\n      MMU_SharedPage(descriptor2,reg.sh_t);\n      MMU_GlobalPage(descriptor2,reg.g_t);\n      MMU_SecurePage(descriptor,reg.sec_t);\n      *descriptor &= PAGE_L1_MASK;\n      *descriptor |= PAGE_L1_DESCRIPTOR;\n      *descriptor2 &= PAGE_L2_64K_MASK;\n      *descriptor2 |= PAGE_L2_64K_DESC;\n      break;\n\n    case SECTION:\n      //error\n      break;\n  }\n\n  return 0;\n}\n\n/** \\brief  Create a 1MB Section\n\n  \\param [in]               ttb  Translation table base address\n  \\param [in]      base_address  Section base address\n  \\param [in]             count  Number of sections to create\n  \\param [in]     descriptor_l1  L1 descriptor (region attributes)\n\n*/\n__STATIC_INLINE void MMU_TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)\n{\n  uint32_t offset;\n  uint32_t entry;\n  uint32_t i;\n\n  offset = base_address >> 20;\n  entry  = (base_address & 0xFFF00000) | descriptor_l1;\n\n  //4 bytes aligned\n  ttb = ttb + offset;\n\n  for (i = 0; i < count; i++ )\n  {\n    //4 bytes aligned\n    *(volatile uint32_t *)ttb++ = entry;\n    entry += OFFSET_1M;\n  }\n}\n\n__STATIC_INLINE void MMU_TTSuperSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)\n{\n  uint32_t offset;\n  uint32_t entry;\n  uint32_t i;\n\n  offset = base_address >> 20;\n  entry  = (base_address & 0xFF000000) | descriptor_l1 | (1 << SECTION_SUPER_SHIFT);\n\n  //4 bytes aligned\n  ttb = ttb + offset;\n\n  for (i = 0; i < count; i++ )\n  {\n    //4 bytes aligned\n    *(volatile uint32_t *)ttb++ = entry;\n    entry += OFFSET_1M;\n  }\n}\n\n/** \\brief  Create a 4k page entry\n\n  \\param [in]               ttb  L1 table base address\n  \\param [in]      base_address  4k base address\n  \\param [in]             count  Number of 4k pages to create\n  \\param [in]     descriptor_l1  L1 descriptor (region attributes)\n  \\param [in]            ttb_l2  L2 table base address\n  \\param [in]     descriptor_l2  L2 descriptor (region attributes)\n\n*/\n__STATIC_INLINE void MMU_TTPage4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )\n{\n\n  uint32_t offset, offset2;\n  uint32_t entry, entry2;\n  uint32_t i;\n\n  offset = base_address >> 20;\n  entry  = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;\n\n  //4 bytes aligned\n  ttb += offset;\n  //create l1_entry\n  *(volatile uint32_t *)ttb = entry;\n\n  offset2 = (base_address & 0xff000) >> 12;\n  ttb_l2 += offset2;\n  entry2 = (base_address & 0xFFFFF000) | descriptor_l2;\n  for (i = 0; i < count; i++ )\n  {\n    //4 bytes aligned\n    *(volatile uint32_t *)ttb_l2++ = entry2;\n    entry2 += OFFSET_4K;\n  }\n}\n\n/** \\brief  Create a 64k page entry\n\n  \\param [in]               ttb  L1 table base address\n  \\param [in]      base_address  64k base address\n  \\param [in]             count  Number of 64k pages to create\n  \\param [in]     descriptor_l1  L1 descriptor (region attributes)\n  \\param [in]            ttb_l2  L2 table base address\n  \\param [in]     descriptor_l2  L2 descriptor (region attributes)\n\n*/\n__STATIC_INLINE void MMU_TTPage64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )\n{\n  uint32_t offset, offset2;\n  uint32_t entry, entry2;\n  uint32_t i,j;\n\n\n  offset = base_address >> 20;\n  entry  = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;\n\n  //4 bytes aligned\n  ttb += offset;\n  //create l1_entry\n  *(volatile uint32_t *)ttb = entry;\n\n  offset2 = (base_address & 0xff000) >> 12;\n  ttb_l2 += offset2;\n  entry2 = (base_address & 0xFFFF0000) | descriptor_l2;\n  for (i = 0; i < count; i++ )\n  {\n    //create 16 entries\n    for (j = 0; j < 16; j++)\n    {\n      //4 bytes aligned\n      *(volatile uint32_t *)ttb_l2++ = entry2;\n    }\n    entry2 += OFFSET_64K;\n  }\n}\n\n/** \\brief  Enable MMU\n*/\n__STATIC_INLINE void MMU_Enable(void)\n{\n  // Set M bit 0 to enable the MMU\n  // Set AFE bit to enable simplified access permissions model\n  // Clear TRE bit to disable TEX remap and A bit to disable strict alignment fault checking\n  __set_SCTLR( (__get_SCTLR() & ~(1 << 28) & ~(1 << 1)) | 1 | (1 << 29));\n  __ISB();\n}\n\n/** \\brief  Disable MMU\n*/\n__STATIC_INLINE void MMU_Disable(void)\n{\n  // Clear M bit 0 to disable the MMU\n  __set_SCTLR( __get_SCTLR() & ~1);\n  __ISB();\n}\n\n/** \\brief  Invalidate entire unified TLB\n*/\n\n__STATIC_INLINE void MMU_InvalidateTLB(void)\n{\n  __set_TLBIALL(0);\n  __DSB();     //ensure completion of the invalidation\n  __ISB();     //ensure instruction fetch path sees new state\n}\n\n\n#endif // !__ASSEMBLER__\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CA_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/ca/irq_ctrl.h",
    "content": "/**************************************************************************//**\n * @file     irq_ctrl.h\n * @brief    Interrupt Controller API header file\n * @version  V1.0.0\n * @date     23. June 2017\n ******************************************************************************/\n/*\n * Copyright (c) 2017 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef IRQ_CTRL_H_\n#define IRQ_CTRL_H_\n\n#include \n\n#ifndef IRQHANDLER_T\n#define IRQHANDLER_T\n/// Interrupt handler data type\ntypedef void (*IRQHandler_t) (void);\n#endif\n\n#ifndef IRQN_ID_T\n#define IRQN_ID_T\n/// Interrupt ID number data type\ntypedef int32_t IRQn_ID_t;\n#endif\n\n/* Interrupt mode bit-masks */\n#define IRQ_MODE_TRIG_Pos           (0U)\n#define IRQ_MODE_TRIG_Msk           (0x07UL /*<< IRQ_MODE_TRIG_Pos*/)\n#define IRQ_MODE_TRIG_LEVEL         (0x00UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: level triggered interrupt\n#define IRQ_MODE_TRIG_LEVEL_LOW     (0x01UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: low level triggered interrupt\n#define IRQ_MODE_TRIG_LEVEL_HIGH    (0x02UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: high level triggered interrupt\n#define IRQ_MODE_TRIG_EDGE          (0x04UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: edge triggered interrupt\n#define IRQ_MODE_TRIG_EDGE_RISING   (0x05UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising edge triggered interrupt\n#define IRQ_MODE_TRIG_EDGE_FALLING  (0x06UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: falling edge triggered interrupt\n#define IRQ_MODE_TRIG_EDGE_BOTH     (0x07UL /*<< IRQ_MODE_TRIG_Pos*/) ///< Trigger: rising and falling edge triggered interrupt\n\n#define IRQ_MODE_TYPE_Pos           (3U)\n#define IRQ_MODE_TYPE_Msk           (0x01UL << IRQ_MODE_TYPE_Pos)\n#define IRQ_MODE_TYPE_IRQ           (0x00UL << IRQ_MODE_TYPE_Pos)     ///< Type: interrupt source triggers CPU IRQ line\n#define IRQ_MODE_TYPE_FIQ           (0x01UL << IRQ_MODE_TYPE_Pos)     ///< Type: interrupt source triggers CPU FIQ line\n\n#define IRQ_MODE_DOMAIN_Pos         (4U)\n#define IRQ_MODE_DOMAIN_Msk         (0x01UL << IRQ_MODE_DOMAIN_Pos)\n#define IRQ_MODE_DOMAIN_NONSECURE   (0x00UL << IRQ_MODE_DOMAIN_Pos)   ///< Domain: interrupt is targeting non-secure domain\n#define IRQ_MODE_DOMAIN_SECURE      (0x01UL << IRQ_MODE_DOMAIN_Pos)   ///< Domain: interrupt is targeting secure domain\n\n#define IRQ_MODE_CPU_Pos            (5U)\n#define IRQ_MODE_CPU_Msk            (0xFFUL << IRQ_MODE_CPU_Pos)\n#define IRQ_MODE_CPU_ALL            (0x00UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets all CPUs\n#define IRQ_MODE_CPU_0              (0x01UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 0\n#define IRQ_MODE_CPU_1              (0x02UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 1\n#define IRQ_MODE_CPU_2              (0x04UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 2\n#define IRQ_MODE_CPU_3              (0x08UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 3\n#define IRQ_MODE_CPU_4              (0x10UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 4\n#define IRQ_MODE_CPU_5              (0x20UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 5\n#define IRQ_MODE_CPU_6              (0x40UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 6\n#define IRQ_MODE_CPU_7              (0x80UL << IRQ_MODE_CPU_Pos)      ///< CPU: interrupt targets CPU 7\n\n#define IRQ_MODE_ERROR              (0x80000000UL)                    ///< Bit indicating mode value error\n\n/* Interrupt priority bit-masks */\n#define IRQ_PRIORITY_Msk            (0x0000FFFFUL)                    ///< Interrupt priority value bit-mask\n#define IRQ_PRIORITY_ERROR          (0x80000000UL)                    ///< Bit indicating priority value error\n\n/// Initialize interrupt controller.\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_Initialize (void);\n\n/// Register interrupt handler.\n/// \\param[in]     irqn          interrupt ID number\n/// \\param[in]     handler       interrupt handler function address\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_SetHandler (IRQn_ID_t irqn, IRQHandler_t handler);\n\n/// Get the registered interrupt handler.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return registered interrupt handler function address.\nIRQHandler_t IRQ_GetHandler (IRQn_ID_t irqn);\n\n/// Enable interrupt.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_Enable (IRQn_ID_t irqn);\n\n/// Disable interrupt.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_Disable (IRQn_ID_t irqn);\n\n/// Get interrupt enable state.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return 0 - interrupt is disabled, 1 - interrupt is enabled.\nuint32_t IRQ_GetEnableState (IRQn_ID_t irqn);\n\n/// Configure interrupt request mode.\n/// \\param[in]     irqn          interrupt ID number\n/// \\param[in]     mode          mode configuration\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_SetMode (IRQn_ID_t irqn, uint32_t mode);\n\n/// Get interrupt mode configuration.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return current interrupt mode configuration with optional IRQ_MODE_ERROR bit set.\nuint32_t IRQ_GetMode (IRQn_ID_t irqn);\n\n/// Get ID number of current interrupt request (IRQ).\n/// \\return interrupt ID number.\nIRQn_ID_t IRQ_GetActiveIRQ (void);\n\n/// Get ID number of current fast interrupt request (FIQ).\n/// \\return interrupt ID number.\nIRQn_ID_t IRQ_GetActiveFIQ (void);\n\n/// Signal end of interrupt processing.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_EndOfInterrupt (IRQn_ID_t irqn);\n\n/// Set interrupt pending flag.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_SetPending (IRQn_ID_t irqn);\n\n/// Get interrupt pending flag.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return 0 - interrupt is not pending, 1 - interrupt is pending.\nuint32_t IRQ_GetPending (IRQn_ID_t irqn);\n\n/// Clear interrupt pending flag.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_ClearPending (IRQn_ID_t irqn);\n\n/// Set interrupt priority value.\n/// \\param[in]     irqn          interrupt ID number\n/// \\param[in]     priority      interrupt priority value\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_SetPriority (IRQn_ID_t irqn, uint32_t priority);\n\n/// Get interrupt priority.\n/// \\param[in]     irqn          interrupt ID number\n/// \\return current interrupt priority value with optional IRQ_PRIORITY_ERROR bit set.\nuint32_t IRQ_GetPriority (IRQn_ID_t irqn);\n\n/// Set priority masking threshold.\n/// \\param[in]     priority      priority masking threshold value\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_SetPriorityMask (uint32_t priority);\n\n/// Get priority masking threshold\n/// \\return current priority masking threshold value with optional IRQ_PRIORITY_ERROR bit set.\nuint32_t IRQ_GetPriorityMask (void);\n\n/// Set priority grouping field split point\n/// \\param[in]     bits          number of MSB bits included in the group priority field comparison\n/// \\return 0 on success, -1 on error.\nint32_t IRQ_SetPriorityGroupBits (uint32_t bits);\n\n/// Get priority grouping field split point\n/// \\return current number of MSB bits included in the group priority field comparison with\n///         optional IRQ_PRIORITY_ERROR bit set.\nuint32_t IRQ_GetPriorityGroupBits (void);\n\n#endif  // IRQ_CTRL_H_\n"
  },
  {
    "path": "platform/cmsis/inc/ca/mem_ARMCA.h",
    "content": "/**************************************************************************//**\n * @file     mem_ARMCA7.h\n * @brief    Memory base and size definitions (used in scatter file)\n * @version  V1.1.0\n * @date     15. May 2019\n *\n * @note\n *\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __MEM_ARMCA7_H\n#define __MEM_ARMCA7_H\n\n/*----------------------------------------------------------------------------\n  User Stack & Heap size definition\n *----------------------------------------------------------------------------*/\n/*\n//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------\n*/\n\n#if 0\n/*--------------------- ROM Configuration ------------------------------------\n//\n//  ROM Configuration\n//    For compatibility with MMU config the sections must be multiple of 1MB\n//    ROM Base Address <0x0-0xFFFFFFFF:0x100000>\n//    ROM Size (in Bytes) <0x0-0xFFFFFFFF:0x100000>\n// \n *----------------------------------------------------------------------------*/\n#define __ROM_BASE       0x80000000\n#define __ROM_SIZE       0x00200000\n\n/*--------------------- RAM Configuration -----------------------------------\n//  RAM Configuration\n//    For compatibility with MMU config the sections must be multiple of 1MB\n//    RAM Base Address    <0x0-0xFFFFFFFF:0x100000>\n//    RAM Total Size (in Bytes) <0x0-0xFFFFFFFF:0x100000>\n//    Data Sections\n//      RW_DATA Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//      ZI_DATA Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//   \n//    Stack / Heap Configuration\n//       Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//       Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//      Exceptional Modes\n//        UND Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//        ABT Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//        SVC Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//        IRQ Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//        FIQ Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\n//     \n//   \n// \n *----------------------------------------------------------------------------*/\n#define __RAM_BASE       0x80200000\n#define __RAM_SIZE       0x00200000\n\n#define __RW_DATA_SIZE   0x00100000\n#define __ZI_DATA_SIZE   0x000F0000\n\n#define __STACK_SIZE     0x00001000\n#define __HEAP_SIZE      0x00008000\n\n#define __UND_STACK_SIZE 0x00000100\n#define __ABT_STACK_SIZE 0x00000100\n#define __SVC_STACK_SIZE 0x00000100\n#define __IRQ_STACK_SIZE 0x00000100\n#define __FIQ_STACK_SIZE 0x00000100\n\n/*----------------------------------------------------------------------------*/\n\n/*--------------------- TTB Configuration ------------------------------------\n//\n//  TTB Configuration\n//    The TLB L1 contains 4096 32-bit entries and must be 16kB aligned\n//    The TLB L2 entries are placed after the L1 in the MMU config\n//    TTB Base Address <0x0-0xFFFFFFFF:0x4000>\n//    TTB Size (in Bytes) <0x0-0xFFFFFFFF:8>\n// \n *----------------------------------------------------------------------------*/\n#define __TTB_BASE       0x80500000\n#define __TTB_SIZE       0x00005000\n\n#endif\n\n#endif /* __MEM_ARMCA7_H */\n"
  },
  {
    "path": "platform/cmsis/inc/ca/system_ARMCA.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SYSTEM_ARMCA_H__\n#define __SYSTEM_ARMCA_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"system_ARMCM.h\"\n\nvoid MMU_CreateTranslationTable(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis.h",
    "content": "/* mbed Microcontroller Library - CMSIS\n * Copyright (C) 2009-2011 ARM Limited. All rights reserved.\n *\n * A generic CMSIS include header, pulling in LPC11U24 specifics\n */\n\n#ifndef MBED_CMSIS_H\n#define MBED_CMSIS_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_addr_map.h\"\n#include _TO_STRING(CONCAT_SUFFIX(CHIP_ID_LITERAL, h))\n\n#define IRQ_PRIORITY_REALTIME               0\n#define IRQ_PRIORITY_HIGHPLUSPLUS           1\n#define IRQ_PRIORITY_HIGHPLUS               2\n#define IRQ_PRIORITY_HIGH                   3\n#define IRQ_PRIORITY_ABOVENORMAL            4\n#define IRQ_PRIORITY_NORMAL                 5\n#define IRQ_PRIORITY_BELOWNORMAL            6\n#define IRQ_PRIORITY_LOW                    7\n\n#ifdef __ARM_ARCH_ISA_ARM\n#define IRQ_LOCK_MASK                       (CPSR_I_Msk | CPSR_F_Msk)\n#else\n#define NVIC_USER_IRQ_OFFSET                16\n#define NVIC_NUM_VECTORS                    (NVIC_USER_IRQ_OFFSET + USER_IRQn_QTY)\n#endif\n\n#ifndef __ASSEMBLER__\n\n#ifdef __ARMCC_VERSION\n// Stupid armclang\n#undef __SSAT\n#define __SSAT(ARG1,ARG2) \\\n__extension__ \\\n({                          \\\n  int32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"ssat %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n#endif\n\n__STATIC_FORCEINLINE uint32_t int_lock_global(void)\n{\n#ifdef __ARM_ARCH_ISA_ARM\n    uint32_t cpsr = __get_CPSR();\n    uint32_t st = cpsr & IRQ_LOCK_MASK;\n    if (st != IRQ_LOCK_MASK) {\n        cpsr |= IRQ_LOCK_MASK;\n        __set_CPSR(cpsr);\n    }\n    return st;\n#else\n\tuint32_t pri = __get_PRIMASK();\n\tif ((pri & 0x1) == 0) {\n\t\t__disable_irq();\n\t}\n\treturn pri;\n#endif\n}\n\n__STATIC_FORCEINLINE void int_unlock_global(uint32_t pri)\n{\n#ifdef __ARM_ARCH_ISA_ARM\n    if (pri != IRQ_LOCK_MASK) {\n        uint32_t cpsr = __get_CPSR();\n        cpsr = (cpsr & ~IRQ_LOCK_MASK) | pri;\n        __set_CPSR(cpsr);\n    }\n#else\n\tif ((pri & 0x1) == 0) {\n\t\t__enable_irq();\n\t}\n#endif\n}\n\n__STATIC_FORCEINLINE uint32_t int_lock(void)\n{\n#ifdef INT_LOCK_EXCEPTION\n#ifdef __ARM_ARCH_ISA_ARM\n    uint32_t mask = GIC_GetInterfacePriorityMask();\n    // Only allow IRQs with priority IRQ_PRIORITY_HIGHPLUSPLUS and IRQ_PRIORITY_REALTIME\n    GIC_SetInterfacePriorityMask(((IRQ_PRIORITY_HIGHPLUS << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL));\n    return mask;\n#else\n    uint32_t pri = __get_BASEPRI();\n    // Only allow IRQs with priority IRQ_PRIORITY_HIGHPLUSPLUS and IRQ_PRIORITY_REALTIME\n    __set_BASEPRI(((IRQ_PRIORITY_HIGHPLUS << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL));\n    return pri;\n#endif\n#else\n    return int_lock_global();\n#endif\n}\n\n__STATIC_FORCEINLINE void int_unlock(uint32_t pri)\n{\n#ifdef INT_LOCK_EXCEPTION\n#ifdef __ARM_ARCH_ISA_ARM\n    GIC_SetInterfacePriorityMask(pri);\n#else\n    __set_BASEPRI(pri);\n#endif\n#else\n    int_unlock_global(pri);\n#endif\n}\n\n__STATIC_FORCEINLINE int in_isr(void)\n{\n#ifdef __ARM_ARCH_ISA_ARM\n    uint32_t mode = __get_mode();\n    return mode != CPSR_M_USR && mode != CPSR_M_SYS;\n#else\n    return __get_IPSR() != 0;\n#endif\n}\n\n__STATIC_FORCEINLINE int32_t ftoi_nearest(float f)\n{\n    return (f >= 0) ? (int32_t)(f + 0.5) : (int32_t)(f - 0.5);\n}\n\nvoid GotBaseInit(void);\n\nint set_bool_flag(bool *flag);\n\nvoid clear_bool_flag(bool *flag);\n\nfloat db_to_float(float db);\n\nuint32_t get_msb_pos(uint32_t val);\n\nuint32_t get_lsb_pos(uint32_t val);\n\nuint32_t integer_sqrt(uint32_t val);\n\nuint32_t integer_sqrt_nearest(uint32_t val);\n\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis_armcc.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_armcc.h\n * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file\n * @version  V5.0.5\n * @date     14. December 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __CMSIS_ARMCC_H\n#define __CMSIS_ARMCC_H\n\n\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)\n  #error \"Please use Arm Compiler Toolchain V4.0.677 or later!\"\n#endif\n\n/* CMSIS compiler control architecture macros */\n#if ((defined (__TARGET_ARCH_6_M  ) && (__TARGET_ARCH_6_M   == 1)) || \\\n     (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M  == 1))   )\n  #define __ARM_ARCH_6M__           1\n#endif\n\n#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M  == 1))\n  #define __ARM_ARCH_7M__           1\n#endif\n\n#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))\n  #define __ARM_ARCH_7EM__          1\n#endif\n\n  /* __ARM_ARCH_8M_BASE__  not applicable */\n  /* __ARM_ARCH_8M_MAIN__  not applicable */\n\n/* CMSIS compiler control DSP macros */\n#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )\n  #define __ARM_FEATURE_DSP         1\n#endif\n\n/* CMSIS compiler specific defines */\n#ifndef   __ASM\n  #define __ASM                                  __asm\n#endif\n#ifndef   __INLINE\n  #define __INLINE                               __inline\n#endif\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE                        static __inline\n#endif\n#ifndef   __STATIC_FORCEINLINE                 \n  #define __STATIC_FORCEINLINE                   static __forceinline\n#endif           \n#ifndef   __NO_RETURN\n  #define __NO_RETURN                            __declspec(noreturn)\n#endif\n#ifndef   __USED\n  #define __USED                                 __attribute__((used))\n#endif\n#ifndef   __WEAK\n  #define __WEAK                                 __attribute__((weak))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed))\n#endif\n#ifndef   __PACKED_STRUCT\n  #define __PACKED_STRUCT                        __packed struct\n#endif\n#ifndef   __PACKED_UNION\n  #define __PACKED_UNION                         __packed union\n#endif\n#ifndef   __UNALIGNED_UINT32        /* deprecated */\n  #define __UNALIGNED_UINT32(x)                  (*((__packed uint32_t *)(x)))\n#endif\n#ifndef   __UNALIGNED_UINT16_WRITE\n  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT16_READ\n  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))\n#endif\n#ifndef   __UNALIGNED_UINT32_WRITE\n  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT32_READ\n  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))\n#endif\n#ifndef   __ALIGNED\n  #define __ALIGNED(x)                           __attribute__((aligned(x)))\n#endif\n#ifndef   __RESTRICT\n  #define __RESTRICT                             __restrict\n#endif\n\n/* ###########################  Core Function Access  ########################### */\n/** \\ingroup  CMSIS_Core_FunctionInterface\n    \\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions\n  @{\n */\n\n/**\n  \\brief   Enable IRQ Interrupts\n  \\details Enables IRQ interrupts by clearing the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n/* intrinsic void __enable_irq();     */\n\n\n/**\n  \\brief   Disable IRQ Interrupts\n  \\details Disables IRQ interrupts by setting the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n/* intrinsic void __disable_irq();    */\n\n/**\n  \\brief   Get Control Register\n  \\details Returns the content of the Control Register.\n  \\return               Control Register value\n */\n__STATIC_INLINE uint32_t __get_CONTROL(void)\n{\n  register uint32_t __regControl         __ASM(\"control\");\n  return(__regControl);\n}\n\n\n/**\n  \\brief   Set Control Register\n  \\details Writes the given value to the Control Register.\n  \\param [in]    control  Control Register value to set\n */\n__STATIC_INLINE void __set_CONTROL(uint32_t control)\n{\n  register uint32_t __regControl         __ASM(\"control\");\n  __regControl = control;\n}\n\n\n/**\n  \\brief   Get IPSR Register\n  \\details Returns the content of the IPSR Register.\n  \\return               IPSR Register value\n */\n__STATIC_INLINE uint32_t __get_IPSR(void)\n{\n  register uint32_t __regIPSR          __ASM(\"ipsr\");\n  return(__regIPSR);\n}\n\n\n/**\n  \\brief   Get APSR Register\n  \\details Returns the content of the APSR Register.\n  \\return               APSR Register value\n */\n__STATIC_INLINE uint32_t __get_APSR(void)\n{\n  register uint32_t __regAPSR          __ASM(\"apsr\");\n  return(__regAPSR);\n}\n\n\n/**\n  \\brief   Get xPSR Register\n  \\details Returns the content of the xPSR Register.\n  \\return               xPSR Register value\n */\n__STATIC_INLINE uint32_t __get_xPSR(void)\n{\n  register uint32_t __regXPSR          __ASM(\"xpsr\");\n  return(__regXPSR);\n}\n\n\n/**\n  \\brief   Get Process Stack Pointer\n  \\details Returns the current value of the Process Stack Pointer (PSP).\n  \\return               PSP Register value\n */\n__STATIC_INLINE uint32_t __get_PSP(void)\n{\n  register uint32_t __regProcessStackPointer  __ASM(\"psp\");\n  return(__regProcessStackPointer);\n}\n\n\n/**\n  \\brief   Set Process Stack Pointer\n  \\details Assigns the given value to the Process Stack Pointer (PSP).\n  \\param [in]    topOfProcStack  Process Stack Pointer value to set\n */\n__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)\n{\n  register uint32_t __regProcessStackPointer  __ASM(\"psp\");\n  __regProcessStackPointer = topOfProcStack;\n}\n\n\n/**\n  \\brief   Get Main Stack Pointer\n  \\details Returns the current value of the Main Stack Pointer (MSP).\n  \\return               MSP Register value\n */\n__STATIC_INLINE uint32_t __get_MSP(void)\n{\n  register uint32_t __regMainStackPointer     __ASM(\"msp\");\n  return(__regMainStackPointer);\n}\n\n\n/**\n  \\brief   Set Main Stack Pointer\n  \\details Assigns the given value to the Main Stack Pointer (MSP).\n  \\param [in]    topOfMainStack  Main Stack Pointer value to set\n */\n__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)\n{\n  register uint32_t __regMainStackPointer     __ASM(\"msp\");\n  __regMainStackPointer = topOfMainStack;\n}\n\n\n/**\n  \\brief   Get Priority Mask\n  \\details Returns the current state of the priority mask bit from the Priority Mask Register.\n  \\return               Priority Mask value\n */\n__STATIC_INLINE uint32_t __get_PRIMASK(void)\n{\n  register uint32_t __regPriMask         __ASM(\"primask\");\n  return(__regPriMask);\n}\n\n\n/**\n  \\brief   Set Priority Mask\n  \\details Assigns the given value to the Priority Mask Register.\n  \\param [in]    priMask  Priority Mask\n */\n__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)\n{\n  register uint32_t __regPriMask         __ASM(\"primask\");\n  __regPriMask = (priMask);\n}\n\n\n#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \\\n     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )\n\n/**\n  \\brief   Enable FIQ\n  \\details Enables FIQ interrupts by clearing the F-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n#define __enable_fault_irq                __enable_fiq\n\n\n/**\n  \\brief   Disable FIQ\n  \\details Disables FIQ interrupts by setting the F-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n#define __disable_fault_irq               __disable_fiq\n\n\n/**\n  \\brief   Get Base Priority\n  \\details Returns the current value of the Base Priority register.\n  \\return               Base Priority register value\n */\n__STATIC_INLINE uint32_t  __get_BASEPRI(void)\n{\n  register uint32_t __regBasePri         __ASM(\"basepri\");\n  return(__regBasePri);\n}\n\n\n/**\n  \\brief   Set Base Priority\n  \\details Assigns the given value to the Base Priority register.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)\n{\n  register uint32_t __regBasePri         __ASM(\"basepri\");\n  __regBasePri = (basePri & 0xFFU);\n}\n\n\n/**\n  \\brief   Set Base Priority with condition\n  \\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,\n           or the new value increases the BASEPRI priority level.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)\n{\n  register uint32_t __regBasePriMax      __ASM(\"basepri_max\");\n  __regBasePriMax = (basePri & 0xFFU);\n}\n\n\n/**\n  \\brief   Get Fault Mask\n  \\details Returns the current value of the Fault Mask register.\n  \\return               Fault Mask register value\n */\n__STATIC_INLINE uint32_t __get_FAULTMASK(void)\n{\n  register uint32_t __regFaultMask       __ASM(\"faultmask\");\n  return(__regFaultMask);\n}\n\n\n/**\n  \\brief   Set Fault Mask\n  \\details Assigns the given value to the Fault Mask register.\n  \\param [in]    faultMask  Fault Mask value to set\n */\n__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)\n{\n  register uint32_t __regFaultMask       __ASM(\"faultmask\");\n  __regFaultMask = (faultMask & (uint32_t)1U);\n}\n\n#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \\\n           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */\n\n\n/**\n  \\brief   Get FPSCR\n  \\details Returns the current value of the Floating Point Status/Control register.\n  \\return               Floating Point Status/Control register value\n */\n__STATIC_INLINE uint32_t __get_FPSCR(void)\n{\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n  register uint32_t __regfpscr         __ASM(\"fpscr\");\n  return(__regfpscr);\n#else\n   return(0U);\n#endif\n}\n\n\n/**\n  \\brief   Set FPSCR\n  \\details Assigns the given value to the Floating Point Status/Control register.\n  \\param [in]    fpscr  Floating Point Status/Control value to set\n */\n__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)\n{\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n  register uint32_t __regfpscr         __ASM(\"fpscr\");\n  __regfpscr = (fpscr);\n#else\n  (void)fpscr;\n#endif\n}\n\n\n/*@} end of CMSIS_Core_RegAccFunctions */\n\n\n/* ##########################  Core Instruction Access  ######################### */\n/** \\defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface\n  Access to dedicated instructions\n  @{\n*/\n\n/**\n  \\brief   No Operation\n  \\details No Operation does nothing. This instruction can be used for code alignment purposes.\n */\n#define __NOP                             __nop\n\n\n/**\n  \\brief   Wait For Interrupt\n  \\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.\n */\n#define __WFI                             __wfi\n\n\n/**\n  \\brief   Wait For Event\n  \\details Wait For Event is a hint instruction that permits the processor to enter\n           a low-power state until one of a number of events occurs.\n */\n#define __WFE                             __wfe\n\n\n/**\n  \\brief   Send Event\n  \\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.\n */\n#define __SEV                             __sev\n\n\n/**\n  \\brief   Instruction Synchronization Barrier\n  \\details Instruction Synchronization Barrier flushes the pipeline in the processor,\n           so that all instructions following the ISB are fetched from cache or memory,\n           after the instruction has been completed.\n */\n#define __ISB() do {\\\n                   __schedule_barrier();\\\n                   __isb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n/**\n  \\brief   Data Synchronization Barrier\n  \\details Acts as a special kind of Data Memory Barrier.\n           It completes when all explicit memory accesses before this instruction complete.\n */\n#define __DSB() do {\\\n                   __schedule_barrier();\\\n                   __dsb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n/**\n  \\brief   Data Memory Barrier\n  \\details Ensures the apparent order of the explicit memory operations before\n           and after the instruction, without ensuring their completion.\n */\n#define __DMB() do {\\\n                   __schedule_barrier();\\\n                   __dmb(0xF);\\\n                   __schedule_barrier();\\\n                } while (0U)\n\n                  \n/**\n  \\brief   Reverse byte order (32 bit)\n  \\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REV                             __rev\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#ifndef __NO_EMBEDDED_ASM\n__attribute__((section(\".rev16_text\"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)\n{\n  rev16 r0, r0\n  bx lr\n}\n#endif\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#ifndef __NO_EMBEDDED_ASM\n__attribute__((section(\".revsh_text\"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)\n{\n  revsh r0, r0\n  bx lr\n}\n#endif\n\n\n/**\n  \\brief   Rotate Right in unsigned value (32 bit)\n  \\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.\n  \\param [in]    op1  Value to rotate\n  \\param [in]    op2  Number of Bits to rotate\n  \\return               Rotated value\n */\n#define __ROR                             __ror\n\n\n/**\n  \\brief   Breakpoint\n  \\details Causes the processor to enter Debug state.\n           Debug tools can use this to investigate system state when the instruction at a particular address is reached.\n  \\param [in]    value  is ignored by the processor.\n                 If required, a debugger can use it to store additional information about the breakpoint.\n */\n#define __BKPT(value)                       __breakpoint(value)\n\n\n/**\n  \\brief   Reverse bit order of value\n  \\details Reverses the bit order of the given value.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \\\n     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )\n  #define __RBIT                          __rbit\n#else\n__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)\n{\n  uint32_t result;\n  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */\n\n  result = value;                      /* r will be reversed bits of v; first get LSB of v */\n  for (value >>= 1U; value != 0U; value >>= 1U)\n  {\n    result <<= 1U;\n    result |= value & 1U;\n    s--;\n  }\n  result <<= s;                        /* shift when v's highest bits are zero */\n  return result;\n}\n#endif\n\n\n/**\n  \\brief   Count leading zeros\n  \\details Counts the number of leading zeros of a data value.\n  \\param [in]  value  Value to count the leading zeros\n  \\return             number of leading zeros in value\n */\n#define __CLZ                             __clz\n\n\n#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \\\n     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )\n\n/**\n  \\brief   LDR Exclusive (8 bit)\n  \\details Executes a exclusive LDR instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))\n#else\n  #define __LDREXB(ptr)          _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") ((uint8_t ) __ldrex(ptr))  _Pragma(\"pop\")\n#endif\n\n\n/**\n  \\brief   LDR Exclusive (16 bit)\n  \\details Executes a exclusive LDR instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))\n#else\n  #define __LDREXH(ptr)          _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") ((uint16_t) __ldrex(ptr))  _Pragma(\"pop\")\n#endif\n\n\n/**\n  \\brief   LDR Exclusive (32 bit)\n  \\details Executes a exclusive LDR instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))\n#else\n  #define __LDREXW(ptr)          _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") ((uint32_t ) __ldrex(ptr))  _Pragma(\"pop\")\n#endif\n\n\n/**\n  \\brief   STR Exclusive (8 bit)\n  \\details Executes a exclusive STR instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __STREXB(value, ptr)                                                 __strex(value, ptr)\n#else\n  #define __STREXB(value, ptr)   _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") __strex(value, ptr)        _Pragma(\"pop\")\n#endif\n\n\n/**\n  \\brief   STR Exclusive (16 bit)\n  \\details Executes a exclusive STR instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __STREXH(value, ptr)                                                 __strex(value, ptr)\n#else\n  #define __STREXH(value, ptr)   _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") __strex(value, ptr)        _Pragma(\"pop\")\n#endif\n\n\n/**\n  \\brief   STR Exclusive (32 bit)\n  \\details Executes a exclusive STR instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)\n  #define __STREXW(value, ptr)                                                 __strex(value, ptr)\n#else\n  #define __STREXW(value, ptr)   _Pragma(\"push\") _Pragma(\"diag_suppress 3731\") __strex(value, ptr)        _Pragma(\"pop\")\n#endif\n\n\n/**\n  \\brief   Remove the exclusive lock\n  \\details Removes the exclusive lock which is created by LDREX.\n */\n#define __CLREX                           __clrex\n\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n#define __SSAT                            __ssat\n\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n#define __USAT                            __usat\n\n\n/**\n  \\brief   Rotate Right with Extend (32 bit)\n  \\details Moves each bit of a bitstring right by one bit.\n           The carry input is shifted in at the left end of the bitstring.\n  \\param [in]    value  Value to rotate\n  \\return               Rotated value\n */\n#ifndef __NO_EMBEDDED_ASM\n__attribute__((section(\".rrx_text\"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)\n{\n  rrx r0, r0\n  bx lr\n}\n#endif\n\n\n/**\n  \\brief   LDRT Unprivileged (8 bit)\n  \\details Executes a Unprivileged LDRT instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))\n\n\n/**\n  \\brief   LDRT Unprivileged (16 bit)\n  \\details Executes a Unprivileged LDRT instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))\n\n\n/**\n  \\brief   LDRT Unprivileged (32 bit)\n  \\details Executes a Unprivileged LDRT instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))\n\n\n/**\n  \\brief   STRT Unprivileged (8 bit)\n  \\details Executes a Unprivileged STRT instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n#define __STRBT(value, ptr)               __strt(value, ptr)\n\n\n/**\n  \\brief   STRT Unprivileged (16 bit)\n  \\details Executes a Unprivileged STRT instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n#define __STRHT(value, ptr)               __strt(value, ptr)\n\n\n/**\n  \\brief   STRT Unprivileged (32 bit)\n  \\details Executes a Unprivileged STRT instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n#define __STRT(value, ptr)                __strt(value, ptr)\n\n#else  /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \\\n           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)\n{\n  if ((sat >= 1U) && (sat <= 32U))\n  {\n    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);\n    const int32_t min = -1 - max ;\n    if (val > max)\n    {\n      return max;\n    }\n    else if (val < min)\n    {\n      return min;\n    }\n  }\n  return val;\n}\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)\n{\n  if (sat <= 31U)\n  {\n    const uint32_t max = ((1U << sat) - 1U);\n    if (val > (int32_t)max)\n    {\n      return max;\n    }\n    else if (val < 0)\n    {\n      return 0U;\n    }\n  }\n  return (uint32_t)val;\n}\n\n#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \\\n           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */\n\n/*@}*/ /* end of group CMSIS_Core_InstructionInterface */\n\n\n/* ###################  Compiler specific Intrinsics  ########################### */\n/** \\defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics\n  Access to dedicated SIMD instructions\n  @{\n*/\n\n#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )\n\n#define __SADD8                           __sadd8\n#define __QADD8                           __qadd8\n#define __SHADD8                          __shadd8\n#define __UADD8                           __uadd8\n#define __UQADD8                          __uqadd8\n#define __UHADD8                          __uhadd8\n#define __SSUB8                           __ssub8\n#define __QSUB8                           __qsub8\n#define __SHSUB8                          __shsub8\n#define __USUB8                           __usub8\n#define __UQSUB8                          __uqsub8\n#define __UHSUB8                          __uhsub8\n#define __SADD16                          __sadd16\n#define __QADD16                          __qadd16\n#define __SHADD16                         __shadd16\n#define __UADD16                          __uadd16\n#define __UQADD16                         __uqadd16\n#define __UHADD16                         __uhadd16\n#define __SSUB16                          __ssub16\n#define __QSUB16                          __qsub16\n#define __SHSUB16                         __shsub16\n#define __USUB16                          __usub16\n#define __UQSUB16                         __uqsub16\n#define __UHSUB16                         __uhsub16\n#define __SASX                            __sasx\n#define __QASX                            __qasx\n#define __SHASX                           __shasx\n#define __UASX                            __uasx\n#define __UQASX                           __uqasx\n#define __UHASX                           __uhasx\n#define __SSAX                            __ssax\n#define __QSAX                            __qsax\n#define __SHSAX                           __shsax\n#define __USAX                            __usax\n#define __UQSAX                           __uqsax\n#define __UHSAX                           __uhsax\n#define __USAD8                           __usad8\n#define __USADA8                          __usada8\n#define __SSAT16                          __ssat16\n#define __USAT16                          __usat16\n#define __UXTB16                          __uxtb16\n#define __UXTAB16                         __uxtab16\n#define __SXTB16                          __sxtb16\n#define __SXTAB16                         __sxtab16\n#define __SMUAD                           __smuad\n#define __SMUADX                          __smuadx\n#define __SMLAD                           __smlad\n#define __SMLADX                          __smladx\n#define __SMLALD                          __smlald\n#define __SMLALDX                         __smlaldx\n#define __SMUSD                           __smusd\n#define __SMUSDX                          __smusdx\n#define __SMLSD                           __smlsd\n#define __SMLSDX                          __smlsdx\n#define __SMLSLD                          __smlsld\n#define __SMLSLDX                         __smlsldx\n#define __SEL                             __sel\n#define __QADD                            __qadd\n#define __QSUB                            __qsub\n\n#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \\\n                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )\n\n#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \\\n                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )\n\n#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \\\n                                                      ((int64_t)(ARG3) << 32U)     ) >> 32U))\n\n#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */\n/*@} end of group CMSIS_SIMD_intrinsics */\n\n\n#endif /* __CMSIS_ARMCC_H */\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis_armclang.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_armclang.h\n * @brief    CMSIS compiler armclang (Arm Compiler 6) header file\n * @version  V5.1.0\n * @date     14. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */\n\n#ifndef __CMSIS_ARMCLANG_H\n#define __CMSIS_ARMCLANG_H\n\n#pragma clang system_header   /* treat file as system include file */\n\n#ifndef __ARM_COMPAT_H\n#include     /* Compatibility header for Arm Compiler 5 intrinsics */\n#endif\n\n/* CMSIS compiler specific defines */\n#ifndef   __ASM\n  #define __ASM                                  __asm\n#endif\n#ifndef   __INLINE\n  #define __INLINE                               __inline\n#endif\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE                        static __inline\n#endif\n#ifndef   __STATIC_FORCEINLINE\n  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline\n#endif\n#ifndef   __NO_RETURN\n  #define __NO_RETURN                            __attribute__((__noreturn__))\n#endif\n#ifndef   __USED\n  #define __USED                                 __attribute__((used))\n#endif\n#ifndef   __WEAK\n  #define __WEAK                                 __attribute__((weak))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __PACKED_STRUCT\n  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __PACKED_UNION\n  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __UNALIGNED_UINT32        /* deprecated */\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */\n  struct __attribute__((packed)) T_UINT32 { uint32_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)\n#endif\n#ifndef   __UNALIGNED_UINT16_WRITE\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */\n  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT16_READ\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */\n  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __UNALIGNED_UINT32_WRITE\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */\n  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT32_READ\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */\n  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __ALIGNED\n  #define __ALIGNED(x)                           __attribute__((aligned(x)))\n#endif\n#ifndef   __RESTRICT\n  #define __RESTRICT                             __restrict\n#endif\n\n\n/* ###########################  Core Function Access  ########################### */\n/** \\ingroup  CMSIS_Core_FunctionInterface\n    \\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions\n  @{\n */\n\n/**\n  \\brief   Enable IRQ Interrupts\n  \\details Enables IRQ interrupts by clearing the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n/* intrinsic void __enable_irq();  see arm_compat.h */\n\n\n/**\n  \\brief   Disable IRQ Interrupts\n  \\details Disables IRQ interrupts by setting the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n/* intrinsic void __disable_irq();  see arm_compat.h */\n\n\n/**\n  \\brief   Get Control Register\n  \\details Returns the content of the Control Register.\n  \\return               Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, control\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Control Register (non-secure)\n  \\details Returns the content of the non-secure Control Register when in secure mode.\n  \\return               non-secure Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, control_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Control Register\n  \\details Writes the given value to the Control Register.\n  \\param [in]    control  Control Register value to set\n */\n__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)\n{\n  __ASM volatile (\"MSR control, %0\" : : \"r\" (control) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Control Register (non-secure)\n  \\details Writes the given value to the non-secure Control Register when in secure state.\n  \\param [in]    control  Control Register value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)\n{\n  __ASM volatile (\"MSR control_ns, %0\" : : \"r\" (control) : \"memory\");\n}\n#endif\n\n\n/**\n  \\brief   Get IPSR Register\n  \\details Returns the content of the IPSR Register.\n  \\return               IPSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_IPSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, ipsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get APSR Register\n  \\details Returns the content of the APSR Register.\n  \\return               APSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_APSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, apsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get xPSR Register\n  \\details Returns the content of the xPSR Register.\n  \\return               xPSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_xPSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, xpsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get Process Stack Pointer\n  \\details Returns the current value of the Process Stack Pointer (PSP).\n  \\return               PSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_PSP(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, psp\"  : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Process Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.\n  \\return               PSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, psp_ns\"  : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Process Stack Pointer\n  \\details Assigns the given value to the Process Stack Pointer (PSP).\n  \\param [in]    topOfProcStack  Process Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)\n{\n  __ASM volatile (\"MSR psp, %0\" : : \"r\" (topOfProcStack) : );\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Process Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.\n  \\param [in]    topOfProcStack  Process Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)\n{\n  __ASM volatile (\"MSR psp_ns, %0\" : : \"r\" (topOfProcStack) : );\n}\n#endif\n\n\n/**\n  \\brief   Get Main Stack Pointer\n  \\details Returns the current value of the Main Stack Pointer (MSP).\n  \\return               MSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_MSP(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, msp\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Main Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.\n  \\return               MSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, msp_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Main Stack Pointer\n  \\details Assigns the given value to the Main Stack Pointer (MSP).\n  \\param [in]    topOfMainStack  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)\n{\n  __ASM volatile (\"MSR msp, %0\" : : \"r\" (topOfMainStack) : );\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Main Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.\n  \\param [in]    topOfMainStack  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)\n{\n  __ASM volatile (\"MSR msp_ns, %0\" : : \"r\" (topOfMainStack) : );\n}\n#endif\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.\n  \\return               SP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, sp_ns\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Set Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.\n  \\param [in]    topOfStack  Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)\n{\n  __ASM volatile (\"MSR sp_ns, %0\" : : \"r\" (topOfStack) : );\n}\n#endif\n\n\n/**\n  \\brief   Get Priority Mask\n  \\details Returns the current state of the priority mask bit from the Priority Mask Register.\n  \\return               Priority Mask value\n */\n__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, primask\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Priority Mask (non-secure)\n  \\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.\n  \\return               Priority Mask value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, primask_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Priority Mask\n  \\details Assigns the given value to the Priority Mask Register.\n  \\param [in]    priMask  Priority Mask\n */\n__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)\n{\n  __ASM volatile (\"MSR primask, %0\" : : \"r\" (priMask) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Priority Mask (non-secure)\n  \\details Assigns the given value to the non-secure Priority Mask Register when in secure state.\n  \\param [in]    priMask  Priority Mask\n */\n__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)\n{\n  __ASM volatile (\"MSR primask_ns, %0\" : : \"r\" (priMask) : \"memory\");\n}\n#endif\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )\n/**\n  \\brief   Enable FIQ\n  \\details Enables FIQ interrupts by clearing the F-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */\n\n\n/**\n  \\brief   Disable FIQ\n  \\details Disables FIQ interrupts by setting the F-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */\n\n\n/**\n  \\brief   Get Base Priority\n  \\details Returns the current value of the Base Priority register.\n  \\return               Base Priority register value\n */\n__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, basepri\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Base Priority (non-secure)\n  \\details Returns the current value of the non-secure Base Priority register when in secure state.\n  \\return               Base Priority register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, basepri_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Base Priority\n  \\details Assigns the given value to the Base Priority register.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri, %0\" : : \"r\" (basePri) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Base Priority (non-secure)\n  \\details Assigns the given value to the non-secure Base Priority register when in secure state.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri_ns, %0\" : : \"r\" (basePri) : \"memory\");\n}\n#endif\n\n\n/**\n  \\brief   Set Base Priority with condition\n  \\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,\n           or the new value increases the BASEPRI priority level.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri_max, %0\" : : \"r\" (basePri) : \"memory\");\n}\n\n\n/**\n  \\brief   Get Fault Mask\n  \\details Returns the current value of the Fault Mask register.\n  \\return               Fault Mask register value\n */\n__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, faultmask\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Fault Mask (non-secure)\n  \\details Returns the current value of the non-secure Fault Mask register when in secure state.\n  \\return               Fault Mask register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, faultmask_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Fault Mask\n  \\details Assigns the given value to the Fault Mask register.\n  \\param [in]    faultMask  Fault Mask value to set\n */\n__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)\n{\n  __ASM volatile (\"MSR faultmask, %0\" : : \"r\" (faultMask) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Fault Mask (non-secure)\n  \\details Assigns the given value to the non-secure Fault Mask register when in secure state.\n  \\param [in]    faultMask  Fault Mask value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)\n{\n  __ASM volatile (\"MSR faultmask_ns, %0\" : : \"r\" (faultMask) : \"memory\");\n}\n#endif\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n\n/**\n  \\brief   Get Process Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always in non-secure\n  mode.\n  \n  \\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).\n  \\return               PSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n    // without main extensions, the non-secure PSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, psplim\"  : \"=r\" (result) );\n  return result;\n#endif\n}\n\n#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Process Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always in non-secure\n  mode.\n\n  \\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.\n  \\return               PSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, psplim_ns\"  : \"=r\" (result) );\n  return result;\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Set Process Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored in non-secure\n  mode.\n  \n  \\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).\n  \\param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  (void)ProcStackPtrLimit;\n#else\n  __ASM volatile (\"MSR psplim, %0\" : : \"r\" (ProcStackPtrLimit));\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Set Process Stack Pointer (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored in non-secure\n  mode.\n\n  \\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.\n  \\param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  (void)ProcStackPtrLimit;\n#else\n  __ASM volatile (\"MSR psplim_ns, %0\\n\" : : \"r\" (ProcStackPtrLimit));\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Get Main Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always.\n\n  \\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).\n  \\return               MSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, msplim\" : \"=r\" (result) );\n  return result;\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Get Main Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always.\n\n  \\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.\n  \\return               MSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, msplim_ns\" : \"=r\" (result) );\n  return result;\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Set Main Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored.\n\n  \\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).\n  \\param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  (void)MainStackPtrLimit;\n#else\n  __ASM volatile (\"MSR msplim, %0\" : : \"r\" (MainStackPtrLimit));\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Set Main Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored.\n\n  \\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.\n  \\param [in]    MainStackPtrLimit  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  (void)MainStackPtrLimit;\n#else\n  __ASM volatile (\"MSR msplim_ns, %0\" : : \"r\" (MainStackPtrLimit));\n#endif\n}\n#endif\n\n#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n/**\n  \\brief   Get FPSCR\n  \\details Returns the current value of the Floating Point Status/Control register.\n  \\return               Floating Point Status/Control register value\n */\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr\n#else\n#define __get_FPSCR()      ((uint32_t)0U)\n#endif\n\n/**\n  \\brief   Set FPSCR\n  \\details Assigns the given value to the Floating Point Status/Control register.\n  \\param [in]    fpscr  Floating Point Status/Control value to set\n */\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n#define __set_FPSCR      __builtin_arm_set_fpscr\n#else\n#define __set_FPSCR(x)      ((void)(x))\n#endif\n\n\n/*@} end of CMSIS_Core_RegAccFunctions */\n\n\n/* ##########################  Core Instruction Access  ######################### */\n/** \\defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface\n  Access to dedicated instructions\n  @{\n*/\n\n/* Define macros for porting to both thumb1 and thumb2.\n * For thumb1, use low register (r0-r7), specified by constraint \"l\"\n * Otherwise, use general registers, specified by constraint \"r\" */\n#if defined (__thumb__) && !defined (__thumb2__)\n#define __CMSIS_GCC_OUT_REG(r) \"=l\" (r)\n#define __CMSIS_GCC_RW_REG(r) \"+l\" (r)\n#define __CMSIS_GCC_USE_REG(r) \"l\" (r)\n#else\n#define __CMSIS_GCC_OUT_REG(r) \"=r\" (r)\n#define __CMSIS_GCC_RW_REG(r) \"+r\" (r)\n#define __CMSIS_GCC_USE_REG(r) \"r\" (r)\n#endif\n\n/**\n  \\brief   No Operation\n  \\details No Operation does nothing. This instruction can be used for code alignment purposes.\n */\n#define __NOP          __builtin_arm_nop\n\n/**\n  \\brief   Wait For Interrupt\n  \\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.\n */\n#define __WFI          __builtin_arm_wfi\n\n\n/**\n  \\brief   Wait For Event\n  \\details Wait For Event is a hint instruction that permits the processor to enter\n           a low-power state until one of a number of events occurs.\n */\n#define __WFE          __builtin_arm_wfe\n\n\n/**\n  \\brief   Send Event\n  \\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.\n */\n#define __SEV          __builtin_arm_sev\n\n\n/**\n  \\brief   Instruction Synchronization Barrier\n  \\details Instruction Synchronization Barrier flushes the pipeline in the processor,\n           so that all instructions following the ISB are fetched from cache or memory,\n           after the instruction has been completed.\n */\n#define __ISB()        __builtin_arm_isb(0xF)\n\n/**\n  \\brief   Data Synchronization Barrier\n  \\details Acts as a special kind of Data Memory Barrier.\n           It completes when all explicit memory accesses before this instruction complete.\n */\n#define __DSB()        __builtin_arm_dsb(0xF)\n\n\n/**\n  \\brief   Data Memory Barrier\n  \\details Ensures the apparent order of the explicit memory operations before\n           and after the instruction, without ensuring their completion.\n */\n#define __DMB()        __builtin_arm_dmb(0xF)\n\n\n/**\n  \\brief   Reverse byte order (32 bit)\n  \\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REV(value)   __builtin_bswap32(value)\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REV16(value) __ROR(__REV(value), 16)\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REVSH(value) (int16_t)__builtin_bswap16(value)\n\n\n/**\n  \\brief   Rotate Right in unsigned value (32 bit)\n  \\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.\n  \\param [in]    op1  Value to rotate\n  \\param [in]    op2  Number of Bits to rotate\n  \\return               Rotated value\n */\n__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)\n{\n  op2 %= 32U;\n  if (op2 == 0U)\n  {\n    return op1;\n  }\n  return (op1 >> op2) | (op1 << (32U - op2));\n}\n\n\n/**\n  \\brief   Breakpoint\n  \\details Causes the processor to enter Debug state.\n           Debug tools can use this to investigate system state when the instruction at a particular address is reached.\n  \\param [in]    value  is ignored by the processor.\n                 If required, a debugger can use it to store additional information about the breakpoint.\n */\n#define __BKPT(value)     __ASM volatile (\"bkpt \"#value)\n\n\n/**\n  \\brief   Reverse bit order of value\n  \\details Reverses the bit order of the given value.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __RBIT            __builtin_arm_rbit\n\n/**\n  \\brief   Count leading zeros\n  \\details Counts the number of leading zeros of a data value.\n  \\param [in]  value  Value to count the leading zeros\n  \\return             number of leading zeros in value\n */\n__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)\n{\n  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally\n     __builtin_clz(0) is undefined behaviour, so handle this case specially.\n     This guarantees ARM-compatible results if happening to compile on a non-ARM\n     target, and ensures the compiler doesn't decide to activate any\n     optimisations using the logic \"value was passed to __builtin_clz, so it\n     is non-zero\".\n     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a\n     single CLZ instruction.\n   */\n  if (value == 0U)\n  {\n    return 32U;\n  }\n  return __builtin_clz(value);\n}\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n/**\n  \\brief   LDR Exclusive (8 bit)\n  \\details Executes a exclusive LDR instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n#define __LDREXB        (uint8_t)__builtin_arm_ldrex\n\n\n/**\n  \\brief   LDR Exclusive (16 bit)\n  \\details Executes a exclusive LDR instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n#define __LDREXH        (uint16_t)__builtin_arm_ldrex\n\n\n/**\n  \\brief   LDR Exclusive (32 bit)\n  \\details Executes a exclusive LDR instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n#define __LDREXW        (uint32_t)__builtin_arm_ldrex\n\n\n/**\n  \\brief   STR Exclusive (8 bit)\n  \\details Executes a exclusive STR instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXB        (uint32_t)__builtin_arm_strex\n\n\n/**\n  \\brief   STR Exclusive (16 bit)\n  \\details Executes a exclusive STR instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXH        (uint32_t)__builtin_arm_strex\n\n\n/**\n  \\brief   STR Exclusive (32 bit)\n  \\details Executes a exclusive STR instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXW        (uint32_t)__builtin_arm_strex\n\n\n/**\n  \\brief   Remove the exclusive lock\n  \\details Removes the exclusive lock which is created by LDREX.\n */\n#define __CLREX             __builtin_arm_clrex\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n#define __SSAT             __builtin_arm_ssat\n\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n#define __USAT             __builtin_arm_usat\n\n\n/**\n  \\brief   Rotate Right with Extend (32 bit)\n  \\details Moves each bit of a bitstring right by one bit.\n           The carry input is shifted in at the left end of the bitstring.\n  \\param [in]    value  Value to rotate\n  \\return               Rotated value\n */\n__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)\n{\n  uint32_t result;\n\n  __ASM volatile (\"rrx %0, %1\" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\n  return(result);\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (8 bit)\n  \\details Executes a Unprivileged LDRT instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldrbt %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return ((uint8_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (16 bit)\n  \\details Executes a Unprivileged LDRT instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldrht %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return ((uint16_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (32 bit)\n  \\details Executes a Unprivileged LDRT instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldrt %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return(result);\n}\n\n\n/**\n  \\brief   STRT Unprivileged (8 bit)\n  \\details Executes a Unprivileged STRT instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)\n{\n  __ASM volatile (\"strbt %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   STRT Unprivileged (16 bit)\n  \\details Executes a Unprivileged STRT instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)\n{\n  __ASM volatile (\"strht %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   STRT Unprivileged (32 bit)\n  \\details Executes a Unprivileged STRT instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)\n{\n  __ASM volatile (\"strt %1, %0\" : \"=Q\" (*ptr) : \"r\" (value) );\n}\n\n#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)\n{\n  if ((sat >= 1U) && (sat <= 32U))\n  {\n    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);\n    const int32_t min = -1 - max ;\n    if (val > max)\n    {\n      return max;\n    }\n    else if (val < min)\n    {\n      return min;\n    }\n  }\n  return val;\n}\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)\n{\n  if (sat <= 31U)\n  {\n    const uint32_t max = ((1U << sat) - 1U);\n    if (val > (int32_t)max)\n    {\n      return max;\n    }\n    else if (val < 0)\n    {\n      return 0U;\n    }\n  }\n  return (uint32_t)val;\n}\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n/**\n  \\brief   Load-Acquire (8 bit)\n  \\details Executes a LDAB instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldab %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return ((uint8_t) result);\n}\n\n\n/**\n  \\brief   Load-Acquire (16 bit)\n  \\details Executes a LDAH instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldah %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return ((uint16_t) result);\n}\n\n\n/**\n  \\brief   Load-Acquire (32 bit)\n  \\details Executes a LDA instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"lda %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return(result);\n}\n\n\n/**\n  \\brief   Store-Release (8 bit)\n  \\details Executes a STLB instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)\n{\n  __ASM volatile (\"stlb %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Store-Release (16 bit)\n  \\details Executes a STLH instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)\n{\n  __ASM volatile (\"stlh %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Store-Release (32 bit)\n  \\details Executes a STL instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)\n{\n  __ASM volatile (\"stl %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Load-Acquire Exclusive (8 bit)\n  \\details Executes a LDAB exclusive instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex\n\n\n/**\n  \\brief   Load-Acquire Exclusive (16 bit)\n  \\details Executes a LDAH exclusive instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex\n\n\n/**\n  \\brief   Load-Acquire Exclusive (32 bit)\n  \\details Executes a LDA exclusive instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex\n\n\n/**\n  \\brief   Store-Release Exclusive (8 bit)\n  \\details Executes a STLB exclusive instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define     __STLEXB                 (uint32_t)__builtin_arm_stlex\n\n\n/**\n  \\brief   Store-Release Exclusive (16 bit)\n  \\details Executes a STLH exclusive instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define     __STLEXH                 (uint32_t)__builtin_arm_stlex\n\n\n/**\n  \\brief   Store-Release Exclusive (32 bit)\n  \\details Executes a STL exclusive instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define     __STLEX                  (uint32_t)__builtin_arm_stlex\n\n#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n/*@}*/ /* end of group CMSIS_Core_InstructionInterface */\n\n\n/* ###################  Compiler specific Intrinsics  ########################### */\n/** \\defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics\n  Access to dedicated SIMD instructions\n  @{\n*/\n\n#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))\n\n#define     __SADD8                 __builtin_arm_sadd8\n#define     __QADD8                 __builtin_arm_qadd8\n#define     __SHADD8                __builtin_arm_shadd8\n#define     __UADD8                 __builtin_arm_uadd8\n#define     __UQADD8                __builtin_arm_uqadd8\n#define     __UHADD8                __builtin_arm_uhadd8\n#define     __SSUB8                 __builtin_arm_ssub8\n#define     __QSUB8                 __builtin_arm_qsub8\n#define     __SHSUB8                __builtin_arm_shsub8\n#define     __USUB8                 __builtin_arm_usub8\n#define     __UQSUB8                __builtin_arm_uqsub8\n#define     __UHSUB8                __builtin_arm_uhsub8\n#define     __SADD16                __builtin_arm_sadd16\n#define     __QADD16                __builtin_arm_qadd16\n#define     __SHADD16               __builtin_arm_shadd16\n#define     __UADD16                __builtin_arm_uadd16\n#define     __UQADD16               __builtin_arm_uqadd16\n#define     __UHADD16               __builtin_arm_uhadd16\n#define     __SSUB16                __builtin_arm_ssub16\n#define     __QSUB16                __builtin_arm_qsub16\n#define     __SHSUB16               __builtin_arm_shsub16\n#define     __USUB16                __builtin_arm_usub16\n#define     __UQSUB16               __builtin_arm_uqsub16\n#define     __UHSUB16               __builtin_arm_uhsub16\n#define     __SASX                  __builtin_arm_sasx\n#define     __QASX                  __builtin_arm_qasx\n#define     __SHASX                 __builtin_arm_shasx\n#define     __UASX                  __builtin_arm_uasx\n#define     __UQASX                 __builtin_arm_uqasx\n#define     __UHASX                 __builtin_arm_uhasx\n#define     __SSAX                  __builtin_arm_ssax\n#define     __QSAX                  __builtin_arm_qsax\n#define     __SHSAX                 __builtin_arm_shsax\n#define     __USAX                  __builtin_arm_usax\n#define     __UQSAX                 __builtin_arm_uqsax\n#define     __UHSAX                 __builtin_arm_uhsax\n#define     __USAD8                 __builtin_arm_usad8\n#define     __USADA8                __builtin_arm_usada8\n#define     __SSAT16                __builtin_arm_ssat16\n#define     __USAT16                __builtin_arm_usat16\n#define     __UXTB16                __builtin_arm_uxtb16\n#define     __UXTAB16               __builtin_arm_uxtab16\n#define     __SXTB16                __builtin_arm_sxtb16\n#define     __SXTAB16               __builtin_arm_sxtab16\n#define     __SMUAD                 __builtin_arm_smuad\n#define     __SMUADX                __builtin_arm_smuadx\n#define     __SMLAD                 __builtin_arm_smlad\n#define     __SMLADX                __builtin_arm_smladx\n#define     __SMLALD                __builtin_arm_smlald\n#define     __SMLALDX               __builtin_arm_smlaldx\n#define     __SMUSD                 __builtin_arm_smusd\n#define     __SMUSDX                __builtin_arm_smusdx\n#define     __SMLSD                 __builtin_arm_smlsd\n#define     __SMLSDX                __builtin_arm_smlsdx\n#define     __SMLSLD                __builtin_arm_smlsld\n#define     __SMLSLDX               __builtin_arm_smlsldx\n#define     __SEL                   __builtin_arm_sel\n#define     __QADD                  __builtin_arm_qadd\n#define     __QSUB                  __builtin_arm_qsub\n\n#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \\\n                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )\n\n#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \\\n                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )\n\n__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)\n{\n  int32_t result;\n\n  __ASM volatile (\"smmla %0, %1, %2, %3\" : \"=r\" (result): \"r\"  (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n#endif /* (__ARM_FEATURE_DSP == 1) */\n/*@} end of group CMSIS_SIMD_intrinsics */\n\n\n#endif /* __CMSIS_ARMCLANG_H */\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis_armclang_ltm.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_armclang_ltm.h\n * @brief    CMSIS compiler armclang (Arm Compiler 6) header file\n * @version  V1.0.1\n * @date     19. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2018-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */\n\n#ifndef __CMSIS_ARMCLANG_H\n#define __CMSIS_ARMCLANG_H\n\n#pragma clang system_header   /* treat file as system include file */\n\n#ifndef __ARM_COMPAT_H\n#include     /* Compatibility header for Arm Compiler 5 intrinsics */\n#endif\n\n/* CMSIS compiler specific defines */\n#ifndef   __ASM\n  #define __ASM                                  __asm\n#endif\n#ifndef   __INLINE\n  #define __INLINE                               __inline\n#endif\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE                        static __inline\n#endif\n#ifndef   __STATIC_FORCEINLINE\n  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline\n#endif\n#ifndef   __NO_RETURN\n  #define __NO_RETURN                            __attribute__((__noreturn__))\n#endif\n#ifndef   __USED\n  #define __USED                                 __attribute__((used))\n#endif\n#ifndef   __WEAK\n  #define __WEAK                                 __attribute__((weak))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __PACKED_STRUCT\n  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __PACKED_UNION\n  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __UNALIGNED_UINT32        /* deprecated */\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */\n  struct __attribute__((packed)) T_UINT32 { uint32_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)\n#endif\n#ifndef   __UNALIGNED_UINT16_WRITE\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */\n  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT16_READ\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */\n  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __UNALIGNED_UINT32_WRITE\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */\n  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT32_READ\n  #pragma clang diagnostic push\n  #pragma clang diagnostic ignored \"-Wpacked\"\n/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */\n  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };\n  #pragma clang diagnostic pop\n  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __ALIGNED\n  #define __ALIGNED(x)                           __attribute__((aligned(x)))\n#endif\n#ifndef   __RESTRICT\n  #define __RESTRICT                             __restrict\n#endif\n\n\n/* ###########################  Core Function Access  ########################### */\n/** \\ingroup  CMSIS_Core_FunctionInterface\n    \\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions\n  @{\n */\n\n/**\n  \\brief   Enable IRQ Interrupts\n  \\details Enables IRQ interrupts by clearing the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n/* intrinsic void __enable_irq();  see arm_compat.h */\n\n\n/**\n  \\brief   Disable IRQ Interrupts\n  \\details Disables IRQ interrupts by setting the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n/* intrinsic void __disable_irq();  see arm_compat.h */\n\n\n/**\n  \\brief   Get Control Register\n  \\details Returns the content of the Control Register.\n  \\return               Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, control\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Control Register (non-secure)\n  \\details Returns the content of the non-secure Control Register when in secure mode.\n  \\return               non-secure Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, control_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Control Register\n  \\details Writes the given value to the Control Register.\n  \\param [in]    control  Control Register value to set\n */\n__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)\n{\n  __ASM volatile (\"MSR control, %0\" : : \"r\" (control) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Control Register (non-secure)\n  \\details Writes the given value to the non-secure Control Register when in secure state.\n  \\param [in]    control  Control Register value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)\n{\n  __ASM volatile (\"MSR control_ns, %0\" : : \"r\" (control) : \"memory\");\n}\n#endif\n\n\n/**\n  \\brief   Get IPSR Register\n  \\details Returns the content of the IPSR Register.\n  \\return               IPSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_IPSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, ipsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get APSR Register\n  \\details Returns the content of the APSR Register.\n  \\return               APSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_APSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, apsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get xPSR Register\n  \\details Returns the content of the xPSR Register.\n  \\return               xPSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_xPSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, xpsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get Process Stack Pointer\n  \\details Returns the current value of the Process Stack Pointer (PSP).\n  \\return               PSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_PSP(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, psp\"  : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Process Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.\n  \\return               PSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, psp_ns\"  : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Process Stack Pointer\n  \\details Assigns the given value to the Process Stack Pointer (PSP).\n  \\param [in]    topOfProcStack  Process Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)\n{\n  __ASM volatile (\"MSR psp, %0\" : : \"r\" (topOfProcStack) : );\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Process Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.\n  \\param [in]    topOfProcStack  Process Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)\n{\n  __ASM volatile (\"MSR psp_ns, %0\" : : \"r\" (topOfProcStack) : );\n}\n#endif\n\n\n/**\n  \\brief   Get Main Stack Pointer\n  \\details Returns the current value of the Main Stack Pointer (MSP).\n  \\return               MSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_MSP(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, msp\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Main Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.\n  \\return               MSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, msp_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Main Stack Pointer\n  \\details Assigns the given value to the Main Stack Pointer (MSP).\n  \\param [in]    topOfMainStack  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)\n{\n  __ASM volatile (\"MSR msp, %0\" : : \"r\" (topOfMainStack) : );\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Main Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.\n  \\param [in]    topOfMainStack  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)\n{\n  __ASM volatile (\"MSR msp_ns, %0\" : : \"r\" (topOfMainStack) : );\n}\n#endif\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.\n  \\return               SP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, sp_ns\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Set Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.\n  \\param [in]    topOfStack  Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)\n{\n  __ASM volatile (\"MSR sp_ns, %0\" : : \"r\" (topOfStack) : );\n}\n#endif\n\n\n/**\n  \\brief   Get Priority Mask\n  \\details Returns the current state of the priority mask bit from the Priority Mask Register.\n  \\return               Priority Mask value\n */\n__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, primask\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Priority Mask (non-secure)\n  \\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.\n  \\return               Priority Mask value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, primask_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Priority Mask\n  \\details Assigns the given value to the Priority Mask Register.\n  \\param [in]    priMask  Priority Mask\n */\n__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)\n{\n  __ASM volatile (\"MSR primask, %0\" : : \"r\" (priMask) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Priority Mask (non-secure)\n  \\details Assigns the given value to the non-secure Priority Mask Register when in secure state.\n  \\param [in]    priMask  Priority Mask\n */\n__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)\n{\n  __ASM volatile (\"MSR primask_ns, %0\" : : \"r\" (priMask) : \"memory\");\n}\n#endif\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )\n/**\n  \\brief   Enable FIQ\n  \\details Enables FIQ interrupts by clearing the F-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */\n\n\n/**\n  \\brief   Disable FIQ\n  \\details Disables FIQ interrupts by setting the F-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */\n\n\n/**\n  \\brief   Get Base Priority\n  \\details Returns the current value of the Base Priority register.\n  \\return               Base Priority register value\n */\n__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, basepri\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Base Priority (non-secure)\n  \\details Returns the current value of the non-secure Base Priority register when in secure state.\n  \\return               Base Priority register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, basepri_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Base Priority\n  \\details Assigns the given value to the Base Priority register.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri, %0\" : : \"r\" (basePri) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Base Priority (non-secure)\n  \\details Assigns the given value to the non-secure Base Priority register when in secure state.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri_ns, %0\" : : \"r\" (basePri) : \"memory\");\n}\n#endif\n\n\n/**\n  \\brief   Set Base Priority with condition\n  \\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,\n           or the new value increases the BASEPRI priority level.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri_max, %0\" : : \"r\" (basePri) : \"memory\");\n}\n\n\n/**\n  \\brief   Get Fault Mask\n  \\details Returns the current value of the Fault Mask register.\n  \\return               Fault Mask register value\n */\n__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, faultmask\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Fault Mask (non-secure)\n  \\details Returns the current value of the non-secure Fault Mask register when in secure state.\n  \\return               Fault Mask register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, faultmask_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Fault Mask\n  \\details Assigns the given value to the Fault Mask register.\n  \\param [in]    faultMask  Fault Mask value to set\n */\n__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)\n{\n  __ASM volatile (\"MSR faultmask, %0\" : : \"r\" (faultMask) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Fault Mask (non-secure)\n  \\details Assigns the given value to the non-secure Fault Mask register when in secure state.\n  \\param [in]    faultMask  Fault Mask value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)\n{\n  __ASM volatile (\"MSR faultmask_ns, %0\" : : \"r\" (faultMask) : \"memory\");\n}\n#endif\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n\n/**\n  \\brief   Get Process Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always in non-secure\n  mode.\n  \n  \\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).\n  \\return               PSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n    // without main extensions, the non-secure PSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, psplim\"  : \"=r\" (result) );\n  return result;\n#endif\n}\n\n#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Process Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always in non-secure\n  mode.\n\n  \\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.\n  \\return               PSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, psplim_ns\"  : \"=r\" (result) );\n  return result;\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Set Process Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored in non-secure\n  mode.\n  \n  \\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).\n  \\param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  (void)ProcStackPtrLimit;\n#else\n  __ASM volatile (\"MSR psplim, %0\" : : \"r\" (ProcStackPtrLimit));\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Set Process Stack Pointer (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored in non-secure\n  mode.\n\n  \\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.\n  \\param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  (void)ProcStackPtrLimit;\n#else\n  __ASM volatile (\"MSR psplim_ns, %0\\n\" : : \"r\" (ProcStackPtrLimit));\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Get Main Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always.\n\n  \\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).\n  \\return               MSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, msplim\" : \"=r\" (result) );\n  return result;\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Get Main Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always.\n\n  \\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.\n  \\return               MSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, msplim_ns\" : \"=r\" (result) );\n  return result;\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Set Main Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored.\n\n  \\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).\n  \\param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  (void)MainStackPtrLimit;\n#else\n  __ASM volatile (\"MSR msplim, %0\" : : \"r\" (MainStackPtrLimit));\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Set Main Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored.\n\n  \\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.\n  \\param [in]    MainStackPtrLimit  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  (void)MainStackPtrLimit;\n#else\n  __ASM volatile (\"MSR msplim_ns, %0\" : : \"r\" (MainStackPtrLimit));\n#endif\n}\n#endif\n\n#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n/**\n  \\brief   Get FPSCR\n  \\details Returns the current value of the Floating Point Status/Control register.\n  \\return               Floating Point Status/Control register value\n */\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr\n#else\n#define __get_FPSCR()      ((uint32_t)0U)\n#endif\n\n/**\n  \\brief   Set FPSCR\n  \\details Assigns the given value to the Floating Point Status/Control register.\n  \\param [in]    fpscr  Floating Point Status/Control value to set\n */\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n#define __set_FPSCR      __builtin_arm_set_fpscr\n#else\n#define __set_FPSCR(x)      ((void)(x))\n#endif\n\n\n/*@} end of CMSIS_Core_RegAccFunctions */\n\n\n/* ##########################  Core Instruction Access  ######################### */\n/** \\defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface\n  Access to dedicated instructions\n  @{\n*/\n\n/* Define macros for porting to both thumb1 and thumb2.\n * For thumb1, use low register (r0-r7), specified by constraint \"l\"\n * Otherwise, use general registers, specified by constraint \"r\" */\n#if defined (__thumb__) && !defined (__thumb2__)\n#define __CMSIS_GCC_OUT_REG(r) \"=l\" (r)\n#define __CMSIS_GCC_USE_REG(r) \"l\" (r)\n#else\n#define __CMSIS_GCC_OUT_REG(r) \"=r\" (r)\n#define __CMSIS_GCC_USE_REG(r) \"r\" (r)\n#endif\n\n/**\n  \\brief   No Operation\n  \\details No Operation does nothing. This instruction can be used for code alignment purposes.\n */\n#define __NOP          __builtin_arm_nop\n\n/**\n  \\brief   Wait For Interrupt\n  \\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.\n */\n#define __WFI          __builtin_arm_wfi\n\n\n/**\n  \\brief   Wait For Event\n  \\details Wait For Event is a hint instruction that permits the processor to enter\n           a low-power state until one of a number of events occurs.\n */\n#define __WFE          __builtin_arm_wfe\n\n\n/**\n  \\brief   Send Event\n  \\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.\n */\n#define __SEV          __builtin_arm_sev\n\n\n/**\n  \\brief   Instruction Synchronization Barrier\n  \\details Instruction Synchronization Barrier flushes the pipeline in the processor,\n           so that all instructions following the ISB are fetched from cache or memory,\n           after the instruction has been completed.\n */\n#define __ISB()        __builtin_arm_isb(0xF)\n\n/**\n  \\brief   Data Synchronization Barrier\n  \\details Acts as a special kind of Data Memory Barrier.\n           It completes when all explicit memory accesses before this instruction complete.\n */\n#define __DSB()        __builtin_arm_dsb(0xF)\n\n\n/**\n  \\brief   Data Memory Barrier\n  \\details Ensures the apparent order of the explicit memory operations before\n           and after the instruction, without ensuring their completion.\n */\n#define __DMB()        __builtin_arm_dmb(0xF)\n\n\n/**\n  \\brief   Reverse byte order (32 bit)\n  \\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REV(value)   __builtin_bswap32(value)\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REV16(value) __ROR(__REV(value), 16)\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __REVSH(value) (int16_t)__builtin_bswap16(value)\n\n\n/**\n  \\brief   Rotate Right in unsigned value (32 bit)\n  \\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.\n  \\param [in]    op1  Value to rotate\n  \\param [in]    op2  Number of Bits to rotate\n  \\return               Rotated value\n */\n__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)\n{\n  op2 %= 32U;\n  if (op2 == 0U)\n  {\n    return op1;\n  }\n  return (op1 >> op2) | (op1 << (32U - op2));\n}\n\n\n/**\n  \\brief   Breakpoint\n  \\details Causes the processor to enter Debug state.\n           Debug tools can use this to investigate system state when the instruction at a particular address is reached.\n  \\param [in]    value  is ignored by the processor.\n                 If required, a debugger can use it to store additional information about the breakpoint.\n */\n#define __BKPT(value)     __ASM volatile (\"bkpt \"#value)\n\n\n/**\n  \\brief   Reverse bit order of value\n  \\details Reverses the bit order of the given value.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n#define __RBIT            __builtin_arm_rbit\n\n/**\n  \\brief   Count leading zeros\n  \\details Counts the number of leading zeros of a data value.\n  \\param [in]  value  Value to count the leading zeros\n  \\return             number of leading zeros in value\n */\n__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)\n{\n  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally\n     __builtin_clz(0) is undefined behaviour, so handle this case specially.\n     This guarantees ARM-compatible results if happening to compile on a non-ARM\n     target, and ensures the compiler doesn't decide to activate any\n     optimisations using the logic \"value was passed to __builtin_clz, so it\n     is non-zero\".\n     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a\n     single CLZ instruction.\n   */\n  if (value == 0U)\n  {\n    return 32U;\n  }\n  return __builtin_clz(value);\n}\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n/**\n  \\brief   LDR Exclusive (8 bit)\n  \\details Executes a exclusive LDR instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n#define __LDREXB        (uint8_t)__builtin_arm_ldrex\n\n\n/**\n  \\brief   LDR Exclusive (16 bit)\n  \\details Executes a exclusive LDR instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n#define __LDREXH        (uint16_t)__builtin_arm_ldrex\n\n\n/**\n  \\brief   LDR Exclusive (32 bit)\n  \\details Executes a exclusive LDR instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n#define __LDREXW        (uint32_t)__builtin_arm_ldrex\n\n\n/**\n  \\brief   STR Exclusive (8 bit)\n  \\details Executes a exclusive STR instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXB        (uint32_t)__builtin_arm_strex\n\n\n/**\n  \\brief   STR Exclusive (16 bit)\n  \\details Executes a exclusive STR instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXH        (uint32_t)__builtin_arm_strex\n\n\n/**\n  \\brief   STR Exclusive (32 bit)\n  \\details Executes a exclusive STR instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define __STREXW        (uint32_t)__builtin_arm_strex\n\n\n/**\n  \\brief   Remove the exclusive lock\n  \\details Removes the exclusive lock which is created by LDREX.\n */\n#define __CLREX             __builtin_arm_clrex\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n#define __SSAT             __builtin_arm_ssat\n\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n#define __USAT             __builtin_arm_usat\n\n\n/**\n  \\brief   Rotate Right with Extend (32 bit)\n  \\details Moves each bit of a bitstring right by one bit.\n           The carry input is shifted in at the left end of the bitstring.\n  \\param [in]    value  Value to rotate\n  \\return               Rotated value\n */\n__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)\n{\n  uint32_t result;\n\n  __ASM volatile (\"rrx %0, %1\" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\n  return(result);\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (8 bit)\n  \\details Executes a Unprivileged LDRT instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldrbt %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return ((uint8_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (16 bit)\n  \\details Executes a Unprivileged LDRT instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldrht %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return ((uint16_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (32 bit)\n  \\details Executes a Unprivileged LDRT instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldrt %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return(result);\n}\n\n\n/**\n  \\brief   STRT Unprivileged (8 bit)\n  \\details Executes a Unprivileged STRT instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)\n{\n  __ASM volatile (\"strbt %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   STRT Unprivileged (16 bit)\n  \\details Executes a Unprivileged STRT instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)\n{\n  __ASM volatile (\"strht %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   STRT Unprivileged (32 bit)\n  \\details Executes a Unprivileged STRT instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)\n{\n  __ASM volatile (\"strt %1, %0\" : \"=Q\" (*ptr) : \"r\" (value) );\n}\n\n#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)\n{\n  if ((sat >= 1U) && (sat <= 32U))\n  {\n    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);\n    const int32_t min = -1 - max ;\n    if (val > max)\n    {\n      return max;\n    }\n    else if (val < min)\n    {\n      return min;\n    }\n  }\n  return val;\n}\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)\n{\n  if (sat <= 31U)\n  {\n    const uint32_t max = ((1U << sat) - 1U);\n    if (val > (int32_t)max)\n    {\n      return max;\n    }\n    else if (val < 0)\n    {\n      return 0U;\n    }\n  }\n  return (uint32_t)val;\n}\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n/**\n  \\brief   Load-Acquire (8 bit)\n  \\details Executes a LDAB instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldab %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return ((uint8_t) result);\n}\n\n\n/**\n  \\brief   Load-Acquire (16 bit)\n  \\details Executes a LDAH instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ldah %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return ((uint16_t) result);\n}\n\n\n/**\n  \\brief   Load-Acquire (32 bit)\n  \\details Executes a LDA instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)\n{\n  uint32_t result;\n\n  __ASM volatile (\"lda %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n  return(result);\n}\n\n\n/**\n  \\brief   Store-Release (8 bit)\n  \\details Executes a STLB instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)\n{\n  __ASM volatile (\"stlb %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Store-Release (16 bit)\n  \\details Executes a STLH instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)\n{\n  __ASM volatile (\"stlh %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Store-Release (32 bit)\n  \\details Executes a STL instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)\n{\n  __ASM volatile (\"stl %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Load-Acquire Exclusive (8 bit)\n  \\details Executes a LDAB exclusive instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex\n\n\n/**\n  \\brief   Load-Acquire Exclusive (16 bit)\n  \\details Executes a LDAH exclusive instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex\n\n\n/**\n  \\brief   Load-Acquire Exclusive (32 bit)\n  \\details Executes a LDA exclusive instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex\n\n\n/**\n  \\brief   Store-Release Exclusive (8 bit)\n  \\details Executes a STLB exclusive instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define     __STLEXB                 (uint32_t)__builtin_arm_stlex\n\n\n/**\n  \\brief   Store-Release Exclusive (16 bit)\n  \\details Executes a STLH exclusive instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define     __STLEXH                 (uint32_t)__builtin_arm_stlex\n\n\n/**\n  \\brief   Store-Release Exclusive (32 bit)\n  \\details Executes a STL exclusive instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n#define     __STLEX                  (uint32_t)__builtin_arm_stlex\n\n#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n/*@}*/ /* end of group CMSIS_Core_InstructionInterface */\n\n\n/* ###################  Compiler specific Intrinsics  ########################### */\n/** \\defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics\n  Access to dedicated SIMD instructions\n  @{\n*/\n\n#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))\n\n__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n\n__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ssub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qsub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shsub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqsub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhsub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n\n__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ssub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ssax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qsax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shsax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqsax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhsax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usad8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usada8 %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n#define __SSAT16(ARG1,ARG2) \\\n({                          \\\n  int32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"ssat16 %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n\n#define __USAT16(ARG1,ARG2) \\\n({                          \\\n  uint32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"usat16 %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n\n__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uxtb16 %0, %1\" : \"=r\" (result) : \"r\" (op1));\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uxtab16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sxtb16 %0, %1\" : \"=r\" (result) : \"r\" (op1));\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sxtab16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smuad %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smuadx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smlad %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smladx %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    uint64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlald %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlald %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    uint64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlaldx %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlaldx %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smusd %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smusdx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smlsd %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  uint32_t result;\n\n  __ASM volatile (\"smlsdx %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    uint64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlsld %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlsld %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    uint64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlsldx %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlsldx %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sel %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"qadd %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"qsub %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \\\n                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )\n\n#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \\\n                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )\n\n__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)\n{\n  int32_t result;\n\n  __ASM volatile (\"smmla %0, %1, %2, %3\" : \"=r\" (result): \"r\"  (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n#endif /* (__ARM_FEATURE_DSP == 1) */\n/*@} end of group CMSIS_SIMD_intrinsics */\n\n\n#endif /* __CMSIS_ARMCLANG_H */\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis_compiler.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_compiler.h\n * @brief    CMSIS compiler generic header file\n * @version  V5.1.0\n * @date     09. October 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __CMSIS_COMPILER_H\n#define __CMSIS_COMPILER_H\n\n#include \n\n/*\n * Arm Compiler 4/5\n */\n#if   defined ( __CC_ARM )\n  #include \"cmsis_armcc.h\"\n\n\n/*\n * Arm Compiler 6.6 LTM (armclang)\n */\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)\n  #include \"cmsis_armclang_ltm.h\"\n\n  /*\n * Arm Compiler above 6.10.1 (armclang)\n */\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)\n  #include \"cmsis_armclang.h\"\n\n\n/*\n * GNU Compiler\n */\n#elif defined ( __GNUC__ )\n  #include \"cmsis_gcc.h\"\n\n\n/*\n * IAR Compiler\n */\n#elif defined ( __ICCARM__ )\n  #include \n\n\n/*\n * TI Arm Compiler\n */\n#elif defined ( __TI_ARM__ )\n  #include \n\n  #ifndef   __ASM\n    #define __ASM                                  __asm\n  #endif\n  #ifndef   __INLINE\n    #define __INLINE                               inline\n  #endif\n  #ifndef   __STATIC_INLINE\n    #define __STATIC_INLINE                        static inline\n  #endif\n  #ifndef   __STATIC_FORCEINLINE\n    #define __STATIC_FORCEINLINE                   __STATIC_INLINE\n  #endif\n  #ifndef   __NO_RETURN\n    #define __NO_RETURN                            __attribute__((noreturn))\n  #endif\n  #ifndef   __USED\n    #define __USED                                 __attribute__((used))\n  #endif\n  #ifndef   __WEAK\n    #define __WEAK                                 __attribute__((weak))\n  #endif\n  #ifndef   __PACKED\n    #define __PACKED                               __attribute__((packed))\n  #endif\n  #ifndef   __PACKED_STRUCT\n    #define __PACKED_STRUCT                        struct __attribute__((packed))\n  #endif\n  #ifndef   __PACKED_UNION\n    #define __PACKED_UNION                         union __attribute__((packed))\n  #endif\n  #ifndef   __UNALIGNED_UINT32        /* deprecated */\n    struct __attribute__((packed)) T_UINT32 { uint32_t v; };\n    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)\n  #endif\n  #ifndef   __UNALIGNED_UINT16_WRITE\n    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };\n    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))\n  #endif\n  #ifndef   __UNALIGNED_UINT16_READ\n    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };\n    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)\n  #endif\n  #ifndef   __UNALIGNED_UINT32_WRITE\n    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };\n    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))\n  #endif\n  #ifndef   __UNALIGNED_UINT32_READ\n    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };\n    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)\n  #endif\n  #ifndef   __ALIGNED\n    #define __ALIGNED(x)                           __attribute__((aligned(x)))\n  #endif\n  #ifndef   __RESTRICT\n    #define __RESTRICT                             __restrict\n  #endif\n\n\n/*\n * TASKING Compiler\n */\n#elif defined ( __TASKING__ )\n  /*\n   * The CMSIS functions have been implemented as intrinsics in the compiler.\n   * Please use \"carm -?i\" to get an up to date list of all intrinsics,\n   * Including the CMSIS ones.\n   */\n\n  #ifndef   __ASM\n    #define __ASM                                  __asm\n  #endif\n  #ifndef   __INLINE\n    #define __INLINE                               inline\n  #endif\n  #ifndef   __STATIC_INLINE\n    #define __STATIC_INLINE                        static inline\n  #endif\n  #ifndef   __STATIC_FORCEINLINE\n    #define __STATIC_FORCEINLINE                   __STATIC_INLINE\n  #endif\n  #ifndef   __NO_RETURN\n    #define __NO_RETURN                            __attribute__((noreturn))\n  #endif\n  #ifndef   __USED\n    #define __USED                                 __attribute__((used))\n  #endif\n  #ifndef   __WEAK\n    #define __WEAK                                 __attribute__((weak))\n  #endif\n  #ifndef   __PACKED\n    #define __PACKED                               __packed__\n  #endif\n  #ifndef   __PACKED_STRUCT\n    #define __PACKED_STRUCT                        struct __packed__\n  #endif\n  #ifndef   __PACKED_UNION\n    #define __PACKED_UNION                         union __packed__\n  #endif\n  #ifndef   __UNALIGNED_UINT32        /* deprecated */\n    struct __packed__ T_UINT32 { uint32_t v; };\n    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)\n  #endif\n  #ifndef   __UNALIGNED_UINT16_WRITE\n    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };\n    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))\n  #endif\n  #ifndef   __UNALIGNED_UINT16_READ\n    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };\n    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)\n  #endif\n  #ifndef   __UNALIGNED_UINT32_WRITE\n    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };\n    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))\n  #endif\n  #ifndef   __UNALIGNED_UINT32_READ\n    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };\n    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)\n  #endif\n  #ifndef   __ALIGNED\n    #define __ALIGNED(x)              __align(x)\n  #endif\n  #ifndef   __RESTRICT\n    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.\n    #define __RESTRICT\n  #endif\n\n\n/*\n * COSMIC Compiler\n */\n#elif defined ( __CSMC__ )\n   #include \n\n #ifndef   __ASM\n    #define __ASM                                  _asm\n  #endif\n  #ifndef   __INLINE\n    #define __INLINE                               inline\n  #endif\n  #ifndef   __STATIC_INLINE\n    #define __STATIC_INLINE                        static inline\n  #endif\n  #ifndef   __STATIC_FORCEINLINE\n    #define __STATIC_FORCEINLINE                   __STATIC_INLINE\n  #endif\n  #ifndef   __NO_RETURN\n    // NO RETURN is automatically detected hence no warning here\n    #define __NO_RETURN\n  #endif\n  #ifndef   __USED\n    #warning No compiler specific solution for __USED. __USED is ignored.\n    #define __USED\n  #endif\n  #ifndef   __WEAK\n    #define __WEAK                                 __weak\n  #endif\n  #ifndef   __PACKED\n    #define __PACKED                               @packed\n  #endif\n  #ifndef   __PACKED_STRUCT\n    #define __PACKED_STRUCT                        @packed struct\n  #endif\n  #ifndef   __PACKED_UNION\n    #define __PACKED_UNION                         @packed union\n  #endif\n  #ifndef   __UNALIGNED_UINT32        /* deprecated */\n    @packed struct T_UINT32 { uint32_t v; };\n    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)\n  #endif\n  #ifndef   __UNALIGNED_UINT16_WRITE\n    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };\n    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))\n  #endif\n  #ifndef   __UNALIGNED_UINT16_READ\n    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };\n    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)\n  #endif\n  #ifndef   __UNALIGNED_UINT32_WRITE\n    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };\n    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))\n  #endif\n  #ifndef   __UNALIGNED_UINT32_READ\n    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };\n    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)\n  #endif\n  #ifndef   __ALIGNED\n    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.\n    #define __ALIGNED(x)\n  #endif\n  #ifndef   __RESTRICT\n    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.\n    #define __RESTRICT\n  #endif\n\n\n#else\n  #error Unknown compiler.\n#endif\n\n\n#endif /* __CMSIS_COMPILER_H */\n\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis_gcc.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_gcc.h\n * @brief    CMSIS compiler GCC header file\n * @version  V5.1.0\n * @date     20. December 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __CMSIS_GCC_H\n#define __CMSIS_GCC_H\n\n/* ignore some GCC warnings */\n#pragma GCC diagnostic push\n#pragma GCC diagnostic ignored \"-Wsign-conversion\"\n#pragma GCC diagnostic ignored \"-Wconversion\"\n#pragma GCC diagnostic ignored \"-Wunused-parameter\"\n\n/* Fallback for __has_builtin */\n#ifndef __has_builtin\n  #define __has_builtin(x) (0)\n#endif\n\n#ifndef __uint32_t_defined\ntypedef unsigned int uint32_t;\n# define __uint32_t_defined\n#endif\n\n/* CMSIS compiler specific defines */\n#ifndef   __ASM\n  #define __ASM                                  __asm\n#endif\n#ifndef   __INLINE\n  #define __INLINE                               inline\n#endif\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE                        static inline\n#endif\n#ifndef   __STATIC_FORCEINLINE                 \n  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline\n#endif                                           \n#ifndef   __NO_RETURN\n  #define __NO_RETURN                            __attribute__((__noreturn__))\n#endif\n#ifndef   __USED\n  #define __USED                                 __attribute__((used))\n#endif\n#ifndef   __WEAK\n  #define __WEAK                                 __attribute__((weak))\n#endif\n#ifndef   __PACKED\n  #define __PACKED                               __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __PACKED_STRUCT\n  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __PACKED_UNION\n  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))\n#endif\n#ifndef   __UNALIGNED_UINT32        /* deprecated */\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n  #pragma GCC diagnostic ignored \"-Wattributes\"\n  struct __attribute__((packed)) T_UINT32 { uint32_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)\n#endif\n#ifndef   __UNALIGNED_UINT16_WRITE\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n  #pragma GCC diagnostic ignored \"-Wattributes\"\n  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT16_READ\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n  #pragma GCC diagnostic ignored \"-Wattributes\"\n  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __UNALIGNED_UINT32_WRITE\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n  #pragma GCC diagnostic ignored \"-Wattributes\"\n  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))\n#endif\n#ifndef   __UNALIGNED_UINT32_READ\n  #pragma GCC diagnostic push\n  #pragma GCC diagnostic ignored \"-Wpacked\"\n  #pragma GCC diagnostic ignored \"-Wattributes\"\n  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };\n  #pragma GCC diagnostic pop\n  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)\n#endif\n#ifndef   __ALIGNED\n  #define __ALIGNED(x)                           __attribute__((aligned(x)))\n#endif\n#ifndef   __RESTRICT\n  #define __RESTRICT                             __restrict\n#endif\n\n\n/* ###########################  Core Function Access  ########################### */\n/** \\ingroup  CMSIS_Core_FunctionInterface\n    \\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions\n  @{\n */\n\n/**\n  \\brief   Enable IRQ Interrupts\n  \\details Enables IRQ interrupts by clearing the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n__STATIC_FORCEINLINE void __enable_irq(void)\n{\n  __ASM volatile (\"cpsie i\" : : : \"memory\");\n}\n\n\n/**\n  \\brief   Disable IRQ Interrupts\n  \\details Disables IRQ interrupts by setting the I-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n__STATIC_FORCEINLINE void __disable_irq(void)\n{\n  __ASM volatile (\"cpsid i\" : : : \"memory\");\n}\n\n\n/**\n  \\brief   Get Control Register\n  \\details Returns the content of the Control Register.\n  \\return               Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, control\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Control Register (non-secure)\n  \\details Returns the content of the non-secure Control Register when in secure mode.\n  \\return               non-secure Control Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, control_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Control Register\n  \\details Writes the given value to the Control Register.\n  \\param [in]    control  Control Register value to set\n */\n__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)\n{\n  __ASM volatile (\"MSR control, %0\" : : \"r\" (control) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Control Register (non-secure)\n  \\details Writes the given value to the non-secure Control Register when in secure state.\n  \\param [in]    control  Control Register value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)\n{\n  __ASM volatile (\"MSR control_ns, %0\" : : \"r\" (control) : \"memory\");\n}\n#endif\n\n\n/**\n  \\brief   Get IPSR Register\n  \\details Returns the content of the IPSR Register.\n  \\return               IPSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_IPSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, ipsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get APSR Register\n  \\details Returns the content of the APSR Register.\n  \\return               APSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_APSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, apsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get xPSR Register\n  \\details Returns the content of the xPSR Register.\n  \\return               xPSR Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_xPSR(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, xpsr\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Get Process Stack Pointer\n  \\details Returns the current value of the Process Stack Pointer (PSP).\n  \\return               PSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_PSP(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, psp\"  : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Process Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.\n  \\return               PSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, psp_ns\"  : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Process Stack Pointer\n  \\details Assigns the given value to the Process Stack Pointer (PSP).\n  \\param [in]    topOfProcStack  Process Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)\n{\n  __ASM volatile (\"MSR psp, %0\" : : \"r\" (topOfProcStack) : );\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Process Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.\n  \\param [in]    topOfProcStack  Process Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)\n{\n  __ASM volatile (\"MSR psp_ns, %0\" : : \"r\" (topOfProcStack) : );\n}\n#endif\n\n\n/**\n  \\brief   Get Main Stack Pointer\n  \\details Returns the current value of the Main Stack Pointer (MSP).\n  \\return               MSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_MSP(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, msp\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Main Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.\n  \\return               MSP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, msp_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Main Stack Pointer\n  \\details Assigns the given value to the Main Stack Pointer (MSP).\n  \\param [in]    topOfMainStack  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)\n{\n  __ASM volatile (\"MSR msp, %0\" : : \"r\" (topOfMainStack) : );\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Main Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.\n  \\param [in]    topOfMainStack  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)\n{\n  __ASM volatile (\"MSR msp_ns, %0\" : : \"r\" (topOfMainStack) : );\n}\n#endif\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Stack Pointer (non-secure)\n  \\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.\n  \\return               SP Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, sp_ns\" : \"=r\" (result) );\n  return(result);\n}\n\n\n/**\n  \\brief   Set Stack Pointer (non-secure)\n  \\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.\n  \\param [in]    topOfStack  Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)\n{\n  __ASM volatile (\"MSR sp_ns, %0\" : : \"r\" (topOfStack) : );\n}\n#endif\n\n\n/**\n  \\brief   Get Priority Mask\n  \\details Returns the current state of the priority mask bit from the Priority Mask Register.\n  \\return               Priority Mask value\n */\n__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, primask\" : \"=r\" (result) :: \"memory\");\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Priority Mask (non-secure)\n  \\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.\n  \\return               Priority Mask value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, primask_ns\" : \"=r\" (result) :: \"memory\");\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Priority Mask\n  \\details Assigns the given value to the Priority Mask Register.\n  \\param [in]    priMask  Priority Mask\n */\n__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)\n{\n  __ASM volatile (\"MSR primask, %0\" : : \"r\" (priMask) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Priority Mask (non-secure)\n  \\details Assigns the given value to the non-secure Priority Mask Register when in secure state.\n  \\param [in]    priMask  Priority Mask\n */\n__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)\n{\n  __ASM volatile (\"MSR primask_ns, %0\" : : \"r\" (priMask) : \"memory\");\n}\n#endif\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )\n/**\n  \\brief   Enable FIQ\n  \\details Enables FIQ interrupts by clearing the F-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n__STATIC_FORCEINLINE void __enable_fault_irq(void)\n{\n  __ASM volatile (\"cpsie f\" : : : \"memory\");\n}\n\n\n/**\n  \\brief   Disable FIQ\n  \\details Disables FIQ interrupts by setting the F-bit in the CPSR.\n           Can only be executed in Privileged modes.\n */\n__STATIC_FORCEINLINE void __disable_fault_irq(void)\n{\n  __ASM volatile (\"cpsid f\" : : : \"memory\");\n}\n\n\n/**\n  \\brief   Get Base Priority\n  \\details Returns the current value of the Base Priority register.\n  \\return               Base Priority register value\n */\n__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, basepri\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Base Priority (non-secure)\n  \\details Returns the current value of the non-secure Base Priority register when in secure state.\n  \\return               Base Priority register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, basepri_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Base Priority\n  \\details Assigns the given value to the Base Priority register.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri, %0\" : : \"r\" (basePri) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Base Priority (non-secure)\n  \\details Assigns the given value to the non-secure Base Priority register when in secure state.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri_ns, %0\" : : \"r\" (basePri) : \"memory\");\n}\n#endif\n\n\n/**\n  \\brief   Set Base Priority with condition\n  \\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,\n           or the new value increases the BASEPRI priority level.\n  \\param [in]    basePri  Base Priority value to set\n */\n__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)\n{\n  __ASM volatile (\"MSR basepri_max, %0\" : : \"r\" (basePri) : \"memory\");\n}\n\n\n/**\n  \\brief   Get Fault Mask\n  \\details Returns the current value of the Fault Mask register.\n  \\return               Fault Mask register value\n */\n__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, faultmask\" : \"=r\" (result) );\n  return(result);\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Fault Mask (non-secure)\n  \\details Returns the current value of the non-secure Fault Mask register when in secure state.\n  \\return               Fault Mask register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)\n{\n  uint32_t result;\n\n  __ASM volatile (\"MRS %0, faultmask_ns\" : \"=r\" (result) );\n  return(result);\n}\n#endif\n\n\n/**\n  \\brief   Set Fault Mask\n  \\details Assigns the given value to the Fault Mask register.\n  \\param [in]    faultMask  Fault Mask value to set\n */\n__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)\n{\n  __ASM volatile (\"MSR faultmask, %0\" : : \"r\" (faultMask) : \"memory\");\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Set Fault Mask (non-secure)\n  \\details Assigns the given value to the non-secure Fault Mask register when in secure state.\n  \\param [in]    faultMask  Fault Mask value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)\n{\n  __ASM volatile (\"MSR faultmask_ns, %0\" : : \"r\" (faultMask) : \"memory\");\n}\n#endif\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n\n/**\n  \\brief   Get Process Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always in non-secure\n  mode.\n  \n  \\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).\n  \\return               PSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n    // without main extensions, the non-secure PSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, psplim\"  : \"=r\" (result) );\n  return result;\n#endif\n}\n\n#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))\n/**\n  \\brief   Get Process Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always.\n\n  \\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.\n  \\return               PSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, psplim_ns\"  : \"=r\" (result) );\n  return result;\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Set Process Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored in non-secure\n  mode.\n  \n  \\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).\n  \\param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  (void)ProcStackPtrLimit;\n#else\n  __ASM volatile (\"MSR psplim, %0\" : : \"r\" (ProcStackPtrLimit));\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Set Process Stack Pointer (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored.\n\n  \\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.\n  \\param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure PSPLIM is RAZ/WI\n  (void)ProcStackPtrLimit;\n#else\n  __ASM volatile (\"MSR psplim_ns, %0\\n\" : : \"r\" (ProcStackPtrLimit));\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Get Main Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always in non-secure\n  mode.\n\n  \\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).\n  \\return               MSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, msplim\" : \"=r\" (result) );\n  return result;\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Get Main Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence zero is returned always.\n\n  \\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.\n  \\return               MSPLIM Register value\n */\n__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  return 0U;\n#else\n  uint32_t result;\n  __ASM volatile (\"MRS %0, msplim_ns\" : \"=r\" (result) );\n  return result;\n#endif\n}\n#endif\n\n\n/**\n  \\brief   Set Main Stack Pointer Limit\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored in non-secure\n  mode.\n\n  \\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).\n  \\param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set\n */\n__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  (void)MainStackPtrLimit;\n#else\n  __ASM volatile (\"MSR msplim, %0\" : : \"r\" (MainStackPtrLimit));\n#endif\n}\n\n\n#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))\n/**\n  \\brief   Set Main Stack Pointer Limit (non-secure)\n  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure\n  Stack Pointer Limit register hence the write is silently ignored.\n\n  \\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.\n  \\param [in]    MainStackPtrLimit  Main Stack Pointer value to set\n */\n__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)\n{\n#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))\n  // without main extensions, the non-secure MSPLIM is RAZ/WI\n  (void)MainStackPtrLimit;\n#else\n  __ASM volatile (\"MSR msplim_ns, %0\" : : \"r\" (MainStackPtrLimit));\n#endif\n}\n#endif\n\n#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n\n/**\n  \\brief   Get FPSCR\n  \\details Returns the current value of the Floating Point Status/Control register.\n  \\return               Floating Point Status/Control register value\n */\n__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)\n{\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n#if __has_builtin(__builtin_arm_get_fpscr) \n// Re-enable using built-in when GCC has been fixed\n// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)\n  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */\n  return __builtin_arm_get_fpscr();\n#else\n  uint32_t result;\n\n  __ASM volatile (\"VMRS %0, fpscr\" : \"=r\" (result) );\n  return(result);\n#endif\n#else\n  return(0U);\n#endif\n}\n\n\n/**\n  \\brief   Set FPSCR\n  \\details Assigns the given value to the Floating Point Status/Control register.\n  \\param [in]    fpscr  Floating Point Status/Control value to set\n */\n__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)\n{\n#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n#if __has_builtin(__builtin_arm_set_fpscr)\n// Re-enable using built-in when GCC has been fixed\n// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)\n  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */\n  __builtin_arm_set_fpscr(fpscr);\n#else\n  __ASM volatile (\"VMSR fpscr, %0\" : : \"r\" (fpscr) : \"vfpcc\", \"memory\");\n#endif\n#else\n  (void)fpscr;\n#endif\n}\n\n\n/*@} end of CMSIS_Core_RegAccFunctions */\n\n\n/* ##########################  Core Instruction Access  ######################### */\n/** \\defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface\n  Access to dedicated instructions\n  @{\n*/\n\n/* Define macros for porting to both thumb1 and thumb2.\n * For thumb1, use low register (r0-r7), specified by constraint \"l\"\n * Otherwise, use general registers, specified by constraint \"r\" */\n#if defined (__thumb__) && !defined (__thumb2__)\n#define __CMSIS_GCC_OUT_REG(r) \"=l\" (r)\n#define __CMSIS_GCC_RW_REG(r) \"+l\" (r)\n#define __CMSIS_GCC_USE_REG(r) \"l\" (r)\n#else\n#define __CMSIS_GCC_OUT_REG(r) \"=r\" (r)\n#define __CMSIS_GCC_RW_REG(r) \"+r\" (r)\n#define __CMSIS_GCC_USE_REG(r) \"r\" (r)\n#endif\n\n/**\n  \\brief   No Operation\n  \\details No Operation does nothing. This instruction can be used for code alignment purposes.\n */\n#define __NOP()                             __ASM volatile (\"nop\")\n\n/**\n  \\brief   Wait For Interrupt\n  \\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.\n */\n#define __WFI()                             __ASM volatile (\"wfi\")\n\n\n/**\n  \\brief   Wait For Event\n  \\details Wait For Event is a hint instruction that permits the processor to enter\n           a low-power state until one of a number of events occurs.\n */\n#define __WFE()                             __ASM volatile (\"wfe\")\n\n\n/**\n  \\brief   Send Event\n  \\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.\n */\n#define __SEV()                             __ASM volatile (\"sev\")\n\n\n/**\n  \\brief   Instruction Synchronization Barrier\n  \\details Instruction Synchronization Barrier flushes the pipeline in the processor,\n           so that all instructions following the ISB are fetched from cache or memory,\n           after the instruction has been completed.\n */\n__STATIC_FORCEINLINE void __ISB(void)\n{\n  __ASM volatile (\"isb 0xF\":::\"memory\");\n}\n\n\n/**\n  \\brief   Data Synchronization Barrier\n  \\details Acts as a special kind of Data Memory Barrier.\n           It completes when all explicit memory accesses before this instruction complete.\n */\n__STATIC_FORCEINLINE void __DSB(void)\n{\n  __ASM volatile (\"dsb 0xF\":::\"memory\");\n}\n\n\n/**\n  \\brief   Data Memory Barrier\n  \\details Ensures the apparent order of the explicit memory operations before\n           and after the instruction, without ensuring their completion.\n */\n__STATIC_FORCEINLINE void __DMB(void)\n{\n  __ASM volatile (\"dmb 0xF\":::\"memory\");\n}\n\n\n/**\n  \\brief   Reverse byte order (32 bit)\n  \\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)\n{\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)\n  return __builtin_bswap32(value);\n#else\n  uint32_t result;\n\n  __ASM volatile (\"rev %0, %1\" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\n  return result;\n#endif\n}\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)\n{\n  uint32_t result;\n\n  __ASM volatile (\"rev16 %0, %1\" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\n  return result;\n}\n\n\n/**\n  \\brief   Reverse byte order (16 bit)\n  \\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n__STATIC_FORCEINLINE int16_t __REVSH(int16_t value)\n{\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\n  return (int16_t)__builtin_bswap16(value);\n#else\n  int16_t result;\n\n  __ASM volatile (\"revsh %0, %1\" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\n  return result;\n#endif\n}\n\n\n/**\n  \\brief   Rotate Right in unsigned value (32 bit)\n  \\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.\n  \\param [in]    op1  Value to rotate\n  \\param [in]    op2  Number of Bits to rotate\n  \\return               Rotated value\n */\n__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)\n{\n  op2 %= 32U;\n  if (op2 == 0U)\n  {\n    return op1;\n  }\n  return (op1 >> op2) | (op1 << (32U - op2));\n}\n\n\n/**\n  \\brief   Breakpoint\n  \\details Causes the processor to enter Debug state.\n           Debug tools can use this to investigate system state when the instruction at a particular address is reached.\n  \\param [in]    value  is ignored by the processor.\n                 If required, a debugger can use it to store additional information about the breakpoint.\n */\n#define __BKPT(value)                       __ASM volatile (\"bkpt \"#value)\n\n\n/**\n  \\brief   Reverse bit order of value\n  \\details Reverses the bit order of the given value.\n  \\param [in]    value  Value to reverse\n  \\return               Reversed value\n */\n__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)\n{\n  uint32_t result;\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )\n   __ASM volatile (\"rbit %0, %1\" : \"=r\" (result) : \"r\" (value) );\n#else\n  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */\n\n  result = value;                      /* r will be reversed bits of v; first get LSB of v */\n  for (value >>= 1U; value != 0U; value >>= 1U)\n  {\n    result <<= 1U;\n    result |= value & 1U;\n    s--;\n  }\n  result <<= s;                        /* shift when v's highest bits are zero */\n#endif\n  return result;\n}\n\n\n/**\n  \\brief   Count leading zeros\n  \\details Counts the number of leading zeros of a data value.\n  \\param [in]  value  Value to count the leading zeros\n  \\return             number of leading zeros in value\n */\n__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)\n{\n  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally\n     __builtin_clz(0) is undefined behaviour, so handle this case specially.\n     This guarantees ARM-compatible results if happening to compile on a non-ARM\n     target, and ensures the compiler doesn't decide to activate any\n     optimisations using the logic \"value was passed to __builtin_clz, so it\n     is non-zero\".\n     ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a\n     single CLZ instruction.\n   */\n  if (value == 0U)\n  {\n    return 32U;\n  }\n  return __builtin_clz(value);\n}\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n/**\n  \\brief   LDR Exclusive (8 bit)\n  \\details Executes a exclusive LDR instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)\n{\n    uint32_t result;\n\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\n   __ASM volatile (\"ldrexb %0, %1\" : \"=r\" (result) : \"Q\" (*addr) );\n#else\n    /* Prior to GCC 4.8, \"Q\" will be expanded to [rx, #0] which is not\n       accepted by assembler. So has to use following less efficient pattern.\n    */\n   __ASM volatile (\"ldrexb %0, [%1]\" : \"=r\" (result) : \"r\" (addr) : \"memory\" );\n#endif\n   return ((uint8_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDR Exclusive (16 bit)\n  \\details Executes a exclusive LDR instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)\n{\n    uint32_t result;\n\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\n   __ASM volatile (\"ldrexh %0, %1\" : \"=r\" (result) : \"Q\" (*addr) );\n#else\n    /* Prior to GCC 4.8, \"Q\" will be expanded to [rx, #0] which is not\n       accepted by assembler. So has to use following less efficient pattern.\n    */\n   __ASM volatile (\"ldrexh %0, [%1]\" : \"=r\" (result) : \"r\" (addr) : \"memory\" );\n#endif\n   return ((uint16_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDR Exclusive (32 bit)\n  \\details Executes a exclusive LDR instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"ldrex %0, %1\" : \"=r\" (result) : \"Q\" (*addr) );\n   return(result);\n}\n\n\n/**\n  \\brief   STR Exclusive (8 bit)\n  \\details Executes a exclusive STR instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"strexb %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*addr) : \"r\" ((uint32_t)value) );\n   return(result);\n}\n\n\n/**\n  \\brief   STR Exclusive (16 bit)\n  \\details Executes a exclusive STR instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"strexh %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*addr) : \"r\" ((uint32_t)value) );\n   return(result);\n}\n\n\n/**\n  \\brief   STR Exclusive (32 bit)\n  \\details Executes a exclusive STR instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"strex %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*addr) : \"r\" (value) );\n   return(result);\n}\n\n\n/**\n  \\brief   Remove the exclusive lock\n  \\details Removes the exclusive lock which is created by LDREX.\n */\n__STATIC_FORCEINLINE void __CLREX(void)\n{\n  __ASM volatile (\"clrex\" ::: \"memory\");\n}\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  ARG1  Value to be saturated\n  \\param [in]  ARG2  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n#define __SSAT(ARG1,ARG2) \\\n__extension__ \\\n({                          \\\n  int32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"ssat %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  ARG1  Value to be saturated\n  \\param [in]  ARG2  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n#define __USAT(ARG1,ARG2) \\\n __extension__ \\\n({                          \\\n  uint32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"usat %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n\n\n/**\n  \\brief   Rotate Right with Extend (32 bit)\n  \\details Moves each bit of a bitstring right by one bit.\n           The carry input is shifted in at the left end of the bitstring.\n  \\param [in]    value  Value to rotate\n  \\return               Rotated value\n */\n__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)\n{\n  uint32_t result;\n\n  __ASM volatile (\"rrx %0, %1\" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );\n  return(result);\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (8 bit)\n  \\details Executes a Unprivileged LDRT instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)\n{\n    uint32_t result;\n\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\n   __ASM volatile (\"ldrbt %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n#else\n    /* Prior to GCC 4.8, \"Q\" will be expanded to [rx, #0] which is not\n       accepted by assembler. So has to use following less efficient pattern.\n    */\n   __ASM volatile (\"ldrbt %0, [%1]\" : \"=r\" (result) : \"r\" (ptr) : \"memory\" );\n#endif\n   return ((uint8_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (16 bit)\n  \\details Executes a Unprivileged LDRT instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)\n{\n    uint32_t result;\n\n#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)\n   __ASM volatile (\"ldrht %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n#else\n    /* Prior to GCC 4.8, \"Q\" will be expanded to [rx, #0] which is not\n       accepted by assembler. So has to use following less efficient pattern.\n    */\n   __ASM volatile (\"ldrht %0, [%1]\" : \"=r\" (result) : \"r\" (ptr) : \"memory\" );\n#endif\n   return ((uint16_t) result);    /* Add explicit type cast here */\n}\n\n\n/**\n  \\brief   LDRT Unprivileged (32 bit)\n  \\details Executes a Unprivileged LDRT instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"ldrt %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n   return(result);\n}\n\n\n/**\n  \\brief   STRT Unprivileged (8 bit)\n  \\details Executes a Unprivileged STRT instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)\n{\n   __ASM volatile (\"strbt %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   STRT Unprivileged (16 bit)\n  \\details Executes a Unprivileged STRT instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)\n{\n   __ASM volatile (\"strht %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   STRT Unprivileged (32 bit)\n  \\details Executes a Unprivileged STRT instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)\n{\n   __ASM volatile (\"strt %1, %0\" : \"=Q\" (*ptr) : \"r\" (value) );\n}\n\n#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n/**\n  \\brief   Signed Saturate\n  \\details Saturates a signed value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (1..32)\n  \\return             Saturated value\n */\n__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)\n{\n  if ((sat >= 1U) && (sat <= 32U))\n  {\n    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);\n    const int32_t min = -1 - max ;\n    if (val > max)\n    {\n      return max;\n    }\n    else if (val < min)\n    {\n      return min;\n    }\n  }\n  return val;\n}\n\n/**\n  \\brief   Unsigned Saturate\n  \\details Saturates an unsigned value.\n  \\param [in]  value  Value to be saturated\n  \\param [in]    sat  Bit position to saturate to (0..31)\n  \\return             Saturated value\n */\n__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)\n{\n  if (sat <= 31U)\n  {\n    const uint32_t max = ((1U << sat) - 1U);\n    if (val > (int32_t)max)\n    {\n      return max;\n    }\n    else if (val < 0)\n    {\n      return 0U;\n    }\n  }\n  return (uint32_t)val;\n}\n\n#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \\\n           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \\\n           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */\n\n\n#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n/**\n  \\brief   Load-Acquire (8 bit)\n  \\details Executes a LDAB instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"ldab %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n   return ((uint8_t) result);\n}\n\n\n/**\n  \\brief   Load-Acquire (16 bit)\n  \\details Executes a LDAH instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"ldah %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n   return ((uint16_t) result);\n}\n\n\n/**\n  \\brief   Load-Acquire (32 bit)\n  \\details Executes a LDA instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"lda %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n   return(result);\n}\n\n\n/**\n  \\brief   Store-Release (8 bit)\n  \\details Executes a STLB instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)\n{\n   __ASM volatile (\"stlb %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Store-Release (16 bit)\n  \\details Executes a STLH instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)\n{\n   __ASM volatile (\"stlh %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Store-Release (32 bit)\n  \\details Executes a STL instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n */\n__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)\n{\n   __ASM volatile (\"stl %1, %0\" : \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n}\n\n\n/**\n  \\brief   Load-Acquire Exclusive (8 bit)\n  \\details Executes a LDAB exclusive instruction for 8 bit value.\n  \\param [in]    ptr  Pointer to data\n  \\return             value of type uint8_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"ldaexb %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n   return ((uint8_t) result);\n}\n\n\n/**\n  \\brief   Load-Acquire Exclusive (16 bit)\n  \\details Executes a LDAH exclusive instruction for 16 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint16_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"ldaexh %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n   return ((uint16_t) result);\n}\n\n\n/**\n  \\brief   Load-Acquire Exclusive (32 bit)\n  \\details Executes a LDA exclusive instruction for 32 bit values.\n  \\param [in]    ptr  Pointer to data\n  \\return        value of type uint32_t at (*ptr)\n */\n__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)\n{\n    uint32_t result;\n\n   __ASM volatile (\"ldaex %0, %1\" : \"=r\" (result) : \"Q\" (*ptr) );\n   return(result);\n}\n\n\n/**\n  \\brief   Store-Release Exclusive (8 bit)\n  \\details Executes a STLB exclusive instruction for 8 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"stlexb %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n   return(result);\n}\n\n\n/**\n  \\brief   Store-Release Exclusive (16 bit)\n  \\details Executes a STLH exclusive instruction for 16 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"stlexh %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n   return(result);\n}\n\n\n/**\n  \\brief   Store-Release Exclusive (32 bit)\n  \\details Executes a STL exclusive instruction for 32 bit values.\n  \\param [in]  value  Value to store\n  \\param [in]    ptr  Pointer to location\n  \\return          0  Function succeeded\n  \\return          1  Function failed\n */\n__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)\n{\n   uint32_t result;\n\n   __ASM volatile (\"stlex %0, %2, %1\" : \"=&r\" (result), \"=Q\" (*ptr) : \"r\" ((uint32_t)value) );\n   return(result);\n}\n\n#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */\n\n/*@}*/ /* end of group CMSIS_Core_InstructionInterface */\n\n\n/* ###################  Compiler specific Intrinsics  ########################### */\n/** \\defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics\n  Access to dedicated SIMD instructions\n  @{\n*/\n\n#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))\n\n__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhadd8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n\n__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ssub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qsub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shsub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqsub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhsub8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n\n__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhadd16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ssub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhsub16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhasx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"ssax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"qsax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"shsax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uqsax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uhsax %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usad8 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  uint32_t result;\n\n  __ASM volatile (\"usada8 %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n#define __SSAT16(ARG1,ARG2) \\\n({                          \\\n  int32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"ssat16 %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n\n#define __USAT16(ARG1,ARG2) \\\n({                          \\\n  uint32_t __RES, __ARG1 = (ARG1); \\\n  __ASM (\"usat16 %0, %1, %2\" : \"=r\" (__RES) :  \"I\" (ARG2), \"r\" (__ARG1) ); \\\n  __RES; \\\n })\n\n__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uxtb16 %0, %1\" : \"=r\" (result) : \"r\" (op1));\n  return(result);\n}\n\n__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"uxtab16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SXTB16(uint32_t op1)\n{\n  int32_t result;\n\n  __ASM volatile (\"sxtb16 %0, %1\" : \"=r\" (result) : \"r\" (op1));\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SXTAB16(uint32_t op1, uint32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"sxtab16 %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SMUAD  (uint32_t op1, uint32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"smuad %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SMUADX (uint32_t op1, uint32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"smuadx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  int32_t result;\n\n  __ASM volatile (\"smlad %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  int32_t result;\n\n  __ASM volatile (\"smladx %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int64_t __SMLALD (uint32_t op1, uint32_t op2, int64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    int64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlald %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlald %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE int64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    int64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlaldx %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlaldx %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE int32_t __SMUSD  (uint32_t op1, uint32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"smusd %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SMUSDX (uint32_t op1, uint32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"smusdx %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  int32_t result;\n\n  __ASM volatile (\"smlsd %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)\n{\n  int32_t result;\n\n  __ASM volatile (\"smlsdx %0, %1, %2, %3\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2), \"r\" (op3) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE int64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    int64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlsld %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlsld %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE int64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)\n{\n  union llreg_u{\n    uint32_t w32[2];\n    int64_t w64;\n  } llr;\n  llr.w64 = acc;\n\n#ifndef __ARMEB__   /* Little endian */\n  __ASM volatile (\"smlsldx %0, %1, %2, %3\" : \"=r\" (llr.w32[0]), \"=r\" (llr.w32[1]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[0]), \"1\" (llr.w32[1]) );\n#else               /* Big endian */\n  __ASM volatile (\"smlsldx %0, %1, %2, %3\" : \"=r\" (llr.w32[1]), \"=r\" (llr.w32[0]): \"r\" (op1), \"r\" (op2) , \"0\" (llr.w32[1]), \"1\" (llr.w32[0]) );\n#endif\n\n  return(llr.w64);\n}\n\n__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)\n{\n  uint32_t result;\n\n  __ASM volatile (\"sel %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"qadd %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)\n{\n  int32_t result;\n\n  __ASM volatile (\"qsub %0, %1, %2\" : \"=r\" (result) : \"r\" (op1), \"r\" (op2) );\n  return(result);\n}\n\n#if 0\n#define __PKHBT(ARG1,ARG2,ARG3) \\\n({                          \\\n  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \\\n  __ASM (\"pkhbt %0, %1, %2, lsl %3\" : \"=r\" (__RES) :  \"r\" (__ARG1), \"r\" (__ARG2), \"I\" (ARG3)  ); \\\n  __RES; \\\n })\n\n#define __PKHTB(ARG1,ARG2,ARG3) \\\n({                          \\\n  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \\\n  if (ARG3 == 0) \\\n    __ASM (\"pkhtb %0, %1, %2\" : \"=r\" (__RES) :  \"r\" (__ARG1), \"r\" (__ARG2)  ); \\\n  else \\\n    __ASM (\"pkhtb %0, %1, %2, asr %3\" : \"=r\" (__RES) :  \"r\" (__ARG1), \"r\" (__ARG2), \"I\" (ARG3)  ); \\\n  __RES; \\\n })\n#endif\n\n#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \\\n                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )\n\n#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \\\n                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )\n\n__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)\n{\n int32_t result;\n\n __ASM volatile (\"smmla %0, %1, %2, %3\" : \"=r\" (result): \"r\"  (op1), \"r\" (op2), \"r\" (op3) );\n return(result);\n}\n\n#endif /* (__ARM_FEATURE_DSP == 1) */\n/*@} end of group CMSIS_SIMD_intrinsics */\n\n\n#pragma GCC diagnostic pop\n\n#endif /* __CMSIS_GCC_H */\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis_iccarm.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_iccarm.h\n * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file\n * @version  V5.0.8\n * @date     04. September 2018\n ******************************************************************************/\n\n//------------------------------------------------------------------------------\n//\n// Copyright (c) 2017-2018 IAR Systems\n//\n// Licensed under the Apache License, Version 2.0 (the \"License\")\n// you may not use this file except in compliance with the License.\n// You may obtain a copy of the License at\n//     http://www.apache.org/licenses/LICENSE-2.0\n//\n// Unless required by applicable law or agreed to in writing, software\n// distributed under the License is distributed on an \"AS IS\" BASIS,\n// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n// See the License for the specific language governing permissions and\n// limitations under the License.\n//\n//------------------------------------------------------------------------------\n\n\n#ifndef __CMSIS_ICCARM_H__\n#define __CMSIS_ICCARM_H__\n\n#ifndef __ICCARM__\n  #error This file should only be compiled by ICCARM\n#endif\n\n#pragma system_include\n\n#define __IAR_FT _Pragma(\"inline=forced\") __intrinsic\n\n#if (__VER__ >= 8000000)\n  #define __ICCARM_V8 1\n#else\n  #define __ICCARM_V8 0\n#endif\n\n#ifndef __ALIGNED\n  #if __ICCARM_V8\n    #define __ALIGNED(x) __attribute__((aligned(x)))\n  #elif (__VER__ >= 7080000)\n    /* Needs IAR language extensions */\n    #define __ALIGNED(x) __attribute__((aligned(x)))\n  #else\n    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.\n    #define __ALIGNED(x)\n  #endif\n#endif\n\n\n/* Define compiler macros for CPU architecture, used in CMSIS 5.\n */\n#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__\n/* Macros already defined */\n#else\n  #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)\n    #define __ARM_ARCH_8M_MAIN__ 1\n  #elif defined(__ARM8M_BASELINE__)\n    #define __ARM_ARCH_8M_BASE__ 1\n  #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'\n    #if __ARM_ARCH == 6\n      #define __ARM_ARCH_6M__ 1\n    #elif __ARM_ARCH == 7\n      #if __ARM_FEATURE_DSP\n        #define __ARM_ARCH_7EM__ 1\n      #else\n        #define __ARM_ARCH_7M__ 1\n      #endif\n    #endif /* __ARM_ARCH */\n  #endif /* __ARM_ARCH_PROFILE == 'M' */\n#endif\n\n/* Alternativ core deduction for older ICCARM's */\n#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \\\n    !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)\n  #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)\n    #define __ARM_ARCH_6M__ 1\n  #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)\n    #define __ARM_ARCH_7M__ 1\n  #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)\n    #define __ARM_ARCH_7EM__  1\n  #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)\n    #define __ARM_ARCH_8M_BASE__ 1\n  #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)\n    #define __ARM_ARCH_8M_MAIN__ 1\n  #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)\n    #define __ARM_ARCH_8M_MAIN__ 1\n  #else\n    #error \"Unknown target.\"\n  #endif\n#endif\n\n\n\n#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1\n  #define __IAR_M0_FAMILY  1\n#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1\n  #define __IAR_M0_FAMILY  1\n#else\n  #define __IAR_M0_FAMILY  0\n#endif\n\n\n#ifndef __ASM\n  #define __ASM __asm\n#endif\n\n#ifndef __INLINE\n  #define __INLINE inline\n#endif\n\n#ifndef   __NO_RETURN\n  #if __ICCARM_V8\n    #define __NO_RETURN __attribute__((__noreturn__))\n  #else\n    #define __NO_RETURN _Pragma(\"object_attribute=__noreturn\")\n  #endif\n#endif\n\n#ifndef   __PACKED\n  #if __ICCARM_V8\n    #define __PACKED __attribute__((packed, aligned(1)))\n  #else\n    /* Needs IAR language extensions */\n    #define __PACKED __packed\n  #endif\n#endif\n\n#ifndef   __PACKED_STRUCT\n  #if __ICCARM_V8\n    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))\n  #else\n    /* Needs IAR language extensions */\n    #define __PACKED_STRUCT __packed struct\n  #endif\n#endif\n\n#ifndef   __PACKED_UNION\n  #if __ICCARM_V8\n    #define __PACKED_UNION union __attribute__((packed, aligned(1)))\n  #else\n    /* Needs IAR language extensions */\n    #define __PACKED_UNION __packed union\n  #endif\n#endif\n\n#ifndef   __RESTRICT\n  #if __ICCARM_V8\n    #define __RESTRICT            __restrict\n  #else\n    /* Needs IAR language extensions */\n    #define __RESTRICT            restrict\n  #endif\n#endif\n\n#ifndef   __STATIC_INLINE\n  #define __STATIC_INLINE       static inline\n#endif\n\n#ifndef   __FORCEINLINE\n  #define __FORCEINLINE         _Pragma(\"inline=forced\")\n#endif\n\n#ifndef   __STATIC_FORCEINLINE\n  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE\n#endif\n\n#ifndef __UNALIGNED_UINT16_READ\n#pragma language=save\n#pragma language=extended\n__IAR_FT uint16_t __iar_uint16_read(void const *ptr)\n{\n  return *(__packed uint16_t*)(ptr);\n}\n#pragma language=restore\n#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)\n#endif\n\n\n#ifndef __UNALIGNED_UINT16_WRITE\n#pragma language=save\n#pragma language=extended\n__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)\n{\n  *(__packed uint16_t*)(ptr) = val;;\n}\n#pragma language=restore\n#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)\n#endif\n\n#ifndef __UNALIGNED_UINT32_READ\n#pragma language=save\n#pragma language=extended\n__IAR_FT uint32_t __iar_uint32_read(void const *ptr)\n{\n  return *(__packed uint32_t*)(ptr);\n}\n#pragma language=restore\n#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)\n#endif\n\n#ifndef __UNALIGNED_UINT32_WRITE\n#pragma language=save\n#pragma language=extended\n__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)\n{\n  *(__packed uint32_t*)(ptr) = val;;\n}\n#pragma language=restore\n#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)\n#endif\n\n#ifndef __UNALIGNED_UINT32   /* deprecated */\n#pragma language=save\n#pragma language=extended\n__packed struct  __iar_u32 { uint32_t v; };\n#pragma language=restore\n#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)\n#endif\n\n#ifndef   __USED\n  #if __ICCARM_V8\n    #define __USED __attribute__((used))\n  #else\n    #define __USED _Pragma(\"__root\")\n  #endif\n#endif\n\n#ifndef   __WEAK\n  #if __ICCARM_V8\n    #define __WEAK __attribute__((weak))\n  #else\n    #define __WEAK _Pragma(\"__weak\")\n  #endif\n#endif\n\n\n#ifndef __ICCARM_INTRINSICS_VERSION__\n  #define __ICCARM_INTRINSICS_VERSION__  0\n#endif\n\n#if __ICCARM_INTRINSICS_VERSION__ == 2\n\n  #if defined(__CLZ)\n    #undef __CLZ\n  #endif\n  #if defined(__REVSH)\n    #undef __REVSH\n  #endif\n  #if defined(__RBIT)\n    #undef __RBIT\n  #endif\n  #if defined(__SSAT)\n    #undef __SSAT\n  #endif\n  #if defined(__USAT)\n    #undef __USAT\n  #endif\n\n  #include \"iccarm_builtin.h\"\n\n  #define __disable_fault_irq __iar_builtin_disable_fiq\n  #define __disable_irq       __iar_builtin_disable_interrupt\n  #define __enable_fault_irq  __iar_builtin_enable_fiq\n  #define __enable_irq        __iar_builtin_enable_interrupt\n  #define __arm_rsr           __iar_builtin_rsr\n  #define __arm_wsr           __iar_builtin_wsr\n\n\n  #define __get_APSR()                (__arm_rsr(\"APSR\"))\n  #define __get_BASEPRI()             (__arm_rsr(\"BASEPRI\"))\n  #define __get_CONTROL()             (__arm_rsr(\"CONTROL\"))\n  #define __get_FAULTMASK()           (__arm_rsr(\"FAULTMASK\"))\n\n  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )\n    #define __get_FPSCR()             (__arm_rsr(\"FPSCR\"))\n    #define __set_FPSCR(VALUE)        (__arm_wsr(\"FPSCR\", (VALUE)))\n  #else\n    #define __get_FPSCR()             ( 0 )\n    #define __set_FPSCR(VALUE)        ((void)VALUE)\n  #endif\n\n  #define __get_IPSR()                (__arm_rsr(\"IPSR\"))\n  #define __get_MSP()                 (__arm_rsr(\"MSP\"))\n  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n    // without main extensions, the non-secure MSPLIM is RAZ/WI\n    #define __get_MSPLIM()            (0U)\n  #else\n    #define __get_MSPLIM()            (__arm_rsr(\"MSPLIM\"))\n  #endif\n  #define __get_PRIMASK()             (__arm_rsr(\"PRIMASK\"))\n  #define __get_PSP()                 (__arm_rsr(\"PSP\"))\n\n  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n    // without main extensions, the non-secure PSPLIM is RAZ/WI\n    #define __get_PSPLIM()            (0U)\n  #else\n    #define __get_PSPLIM()            (__arm_rsr(\"PSPLIM\"))\n  #endif\n\n  #define __get_xPSR()                (__arm_rsr(\"xPSR\"))\n\n  #define __set_BASEPRI(VALUE)        (__arm_wsr(\"BASEPRI\", (VALUE)))\n  #define __set_BASEPRI_MAX(VALUE)    (__arm_wsr(\"BASEPRI_MAX\", (VALUE)))\n  #define __set_CONTROL(VALUE)        (__arm_wsr(\"CONTROL\", (VALUE)))\n  #define __set_FAULTMASK(VALUE)      (__arm_wsr(\"FAULTMASK\", (VALUE)))\n  #define __set_MSP(VALUE)            (__arm_wsr(\"MSP\", (VALUE)))\n\n  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n    // without main extensions, the non-secure MSPLIM is RAZ/WI\n    #define __set_MSPLIM(VALUE)       ((void)(VALUE))\n  #else\n    #define __set_MSPLIM(VALUE)       (__arm_wsr(\"MSPLIM\", (VALUE)))\n  #endif\n  #define __set_PRIMASK(VALUE)        (__arm_wsr(\"PRIMASK\", (VALUE)))\n  #define __set_PSP(VALUE)            (__arm_wsr(\"PSP\", (VALUE)))\n  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n    // without main extensions, the non-secure PSPLIM is RAZ/WI\n    #define __set_PSPLIM(VALUE)       ((void)(VALUE))\n  #else\n    #define __set_PSPLIM(VALUE)       (__arm_wsr(\"PSPLIM\", (VALUE)))\n  #endif\n\n  #define __TZ_get_CONTROL_NS()       (__arm_rsr(\"CONTROL_NS\"))\n  #define __TZ_set_CONTROL_NS(VALUE)  (__arm_wsr(\"CONTROL_NS\", (VALUE)))\n  #define __TZ_get_PSP_NS()           (__arm_rsr(\"PSP_NS\"))\n  #define __TZ_set_PSP_NS(VALUE)      (__arm_wsr(\"PSP_NS\", (VALUE)))\n  #define __TZ_get_MSP_NS()           (__arm_rsr(\"MSP_NS\"))\n  #define __TZ_set_MSP_NS(VALUE)      (__arm_wsr(\"MSP_NS\", (VALUE)))\n  #define __TZ_get_SP_NS()            (__arm_rsr(\"SP_NS\"))\n  #define __TZ_set_SP_NS(VALUE)       (__arm_wsr(\"SP_NS\", (VALUE)))\n  #define __TZ_get_PRIMASK_NS()       (__arm_rsr(\"PRIMASK_NS\"))\n  #define __TZ_set_PRIMASK_NS(VALUE)  (__arm_wsr(\"PRIMASK_NS\", (VALUE)))\n  #define __TZ_get_BASEPRI_NS()       (__arm_rsr(\"BASEPRI_NS\"))\n  #define __TZ_set_BASEPRI_NS(VALUE)  (__arm_wsr(\"BASEPRI_NS\", (VALUE)))\n  #define __TZ_get_FAULTMASK_NS()     (__arm_rsr(\"FAULTMASK_NS\"))\n  #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr(\"FAULTMASK_NS\", (VALUE)))\n\n  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))\n    // without main extensions, the non-secure PSPLIM is RAZ/WI\n    #define __TZ_get_PSPLIM_NS()      (0U)\n    #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))\n  #else\n    #define __TZ_get_PSPLIM_NS()      (__arm_rsr(\"PSPLIM_NS\"))\n    #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr(\"PSPLIM_NS\", (VALUE)))\n  #endif\n\n  #define __TZ_get_MSPLIM_NS()        (__arm_rsr(\"MSPLIM_NS\"))\n  #define __TZ_set_MSPLIM_NS(VALUE)   (__arm_wsr(\"MSPLIM_NS\", (VALUE)))\n\n  #define __NOP     __iar_builtin_no_operation\n\n  #define __CLZ     __iar_builtin_CLZ\n  #define __CLREX   __iar_builtin_CLREX\n\n  #define __DMB     __iar_builtin_DMB\n  #define __DSB     __iar_builtin_DSB\n  #define __ISB     __iar_builtin_ISB\n\n  #define __LDREXB  __iar_builtin_LDREXB\n  #define __LDREXH  __iar_builtin_LDREXH\n  #define __LDREXW  __iar_builtin_LDREX\n\n  #define __RBIT    __iar_builtin_RBIT\n  #define __REV     __iar_builtin_REV\n  #define __REV16   __iar_builtin_REV16\n\n  __IAR_FT int16_t __REVSH(int16_t val)\n  {\n    return (int16_t) __iar_builtin_REVSH(val);\n  }\n\n  #define __ROR     __iar_builtin_ROR\n  #define __RRX     __iar_builtin_RRX\n\n  #define __SEV     __iar_builtin_SEV\n\n  #if !__IAR_M0_FAMILY\n    #define __SSAT    __iar_builtin_SSAT\n  #endif\n\n  #define __STREXB  __iar_builtin_STREXB\n  #define __STREXH  __iar_builtin_STREXH\n  #define __STREXW  __iar_builtin_STREX\n\n  #if !__IAR_M0_FAMILY\n    #define __USAT    __iar_builtin_USAT\n  #endif\n\n  #define __WFE     __iar_builtin_WFE\n  #define __WFI     __iar_builtin_WFI\n\n  #if __ARM_MEDIA__\n    #define __SADD8   __iar_builtin_SADD8\n    #define __QADD8   __iar_builtin_QADD8\n    #define __SHADD8  __iar_builtin_SHADD8\n    #define __UADD8   __iar_builtin_UADD8\n    #define __UQADD8  __iar_builtin_UQADD8\n    #define __UHADD8  __iar_builtin_UHADD8\n    #define __SSUB8   __iar_builtin_SSUB8\n    #define __QSUB8   __iar_builtin_QSUB8\n    #define __SHSUB8  __iar_builtin_SHSUB8\n    #define __USUB8   __iar_builtin_USUB8\n    #define __UQSUB8  __iar_builtin_UQSUB8\n    #define __UHSUB8  __iar_builtin_UHSUB8\n    #define __SADD16  __iar_builtin_SADD16\n    #define __QADD16  __iar_builtin_QADD16\n    #define __SHADD16 __iar_builtin_SHADD16\n    #define __UADD16  __iar_builtin_UADD16\n    #define __UQADD16 __iar_builtin_UQADD16\n    #define __UHADD16 __iar_builtin_UHADD16\n    #define __SSUB16  __iar_builtin_SSUB16\n    #define __QSUB16  __iar_builtin_QSUB16\n    #define __SHSUB16 __iar_builtin_SHSUB16\n    #define __USUB16  __iar_builtin_USUB16\n    #define __UQSUB16 __iar_builtin_UQSUB16\n    #define __UHSUB16 __iar_builtin_UHSUB16\n    #define __SASX    __iar_builtin_SASX\n    #define __QASX    __iar_builtin_QASX\n    #define __SHASX   __iar_builtin_SHASX\n    #define __UASX    __iar_builtin_UASX\n    #define __UQASX   __iar_builtin_UQASX\n    #define __UHASX   __iar_builtin_UHASX\n    #define __SSAX    __iar_builtin_SSAX\n    #define __QSAX    __iar_builtin_QSAX\n    #define __SHSAX   __iar_builtin_SHSAX\n    #define __USAX    __iar_builtin_USAX\n    #define __UQSAX   __iar_builtin_UQSAX\n    #define __UHSAX   __iar_builtin_UHSAX\n    #define __USAD8   __iar_builtin_USAD8\n    #define __USADA8  __iar_builtin_USADA8\n    #define __SSAT16  __iar_builtin_SSAT16\n    #define __USAT16  __iar_builtin_USAT16\n    #define __UXTB16  __iar_builtin_UXTB16\n    #define __UXTAB16 __iar_builtin_UXTAB16\n    #define __SXTB16  __iar_builtin_SXTB16\n    #define __SXTAB16 __iar_builtin_SXTAB16\n    #define __SMUAD   __iar_builtin_SMUAD\n    #define __SMUADX  __iar_builtin_SMUADX\n    #define __SMMLA   __iar_builtin_SMMLA\n    #define __SMLAD   __iar_builtin_SMLAD\n    #define __SMLADX  __iar_builtin_SMLADX\n    #define __SMLALD  __iar_builtin_SMLALD\n    #define __SMLALDX __iar_builtin_SMLALDX\n    #define __SMUSD   __iar_builtin_SMUSD\n    #define __SMUSDX  __iar_builtin_SMUSDX\n    #define __SMLSD   __iar_builtin_SMLSD\n    #define __SMLSDX  __iar_builtin_SMLSDX\n    #define __SMLSLD  __iar_builtin_SMLSLD\n    #define __SMLSLDX __iar_builtin_SMLSLDX\n    #define __SEL     __iar_builtin_SEL\n    #define __QADD    __iar_builtin_QADD\n    #define __QSUB    __iar_builtin_QSUB\n    #define __PKHBT   __iar_builtin_PKHBT\n    #define __PKHTB   __iar_builtin_PKHTB\n  #endif\n\n#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */\n\n  #if __IAR_M0_FAMILY\n   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */\n    #define __CLZ  __cmsis_iar_clz_not_active\n    #define __SSAT __cmsis_iar_ssat_not_active\n    #define __USAT __cmsis_iar_usat_not_active\n    #define __RBIT __cmsis_iar_rbit_not_active\n    #define __get_APSR  __cmsis_iar_get_APSR_not_active\n  #endif\n\n\n  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))\n    #define __get_FPSCR __cmsis_iar_get_FPSR_not_active\n    #define __set_FPSCR __cmsis_iar_set_FPSR_not_active\n  #endif\n\n  #ifdef __INTRINSICS_INCLUDED\n  #error intrinsics.h is already included previously!\n  #endif\n\n  #include \n\n  #if __IAR_M0_FAMILY\n   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */\n    #undef __CLZ\n    #undef __SSAT\n    #undef __USAT\n    #undef __RBIT\n    #undef __get_APSR\n\n    __STATIC_INLINE uint8_t __CLZ(uint32_t data)\n    {\n      if (data == 0U) { return 32U; }\n\n      uint32_t count = 0U;\n      uint32_t mask = 0x80000000U;\n\n      while ((data & mask) == 0U)\n      {\n        count += 1U;\n        mask = mask >> 1U;\n      }\n      return count;\n    }\n\n    __STATIC_INLINE uint32_t __RBIT(uint32_t v)\n    {\n      uint8_t sc = 31U;\n      uint32_t r = v;\n      for (v >>= 1U; v; v >>= 1U)\n      {\n        r <<= 1U;\n        r |= v & 1U;\n        sc--;\n      }\n      return (r << sc);\n    }\n\n    __STATIC_INLINE  uint32_t __get_APSR(void)\n    {\n      uint32_t res;\n      __asm(\"MRS      %0,APSR\" : \"=r\" (res));\n      return res;\n    }\n\n  #endif\n\n  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \\\n         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))\n    #undef __get_FPSCR\n    #undef __set_FPSCR\n    #define __get_FPSCR()       (0)\n    #define __set_FPSCR(VALUE)  ((void)VALUE)\n  #endif\n\n  #pragma diag_suppress=Pe940\n  #pragma diag_suppress=Pe177\n\n  #define __enable_irq    __enable_interrupt\n  #define __disable_irq   __disable_interrupt\n  #define __NOP           __no_operation\n\n  #define __get_xPSR      __get_PSR\n\n  #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)\n\n    __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)\n    {\n      return __LDREX((unsigned long *)ptr);\n    }\n\n    __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)\n    {\n      return __STREX(value, (unsigned long *)ptr);\n    }\n  #endif\n\n\n  /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */\n  #if (__CORTEX_M >= 0x03)\n\n    __IAR_FT uint32_t __RRX(uint32_t value)\n    {\n      uint32_t result;\n      __ASM(\"RRX      %0, %1\" : \"=r\"(result) : \"r\" (value) : \"cc\");\n      return(result);\n    }\n\n    __IAR_FT void __set_BASEPRI_MAX(uint32_t value)\n    {\n      __asm volatile(\"MSR      BASEPRI_MAX,%0\"::\"r\" (value));\n    }\n\n\n    #define __enable_fault_irq  __enable_fiq\n    #define __disable_fault_irq __disable_fiq\n\n\n  #endif /* (__CORTEX_M >= 0x03) */\n\n  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)\n  {\n    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));\n  }\n\n  #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n       (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n\n   __IAR_FT uint32_t __get_MSPLIM(void)\n    {\n      uint32_t res;\n    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))\n      // without main extensions, the non-secure MSPLIM is RAZ/WI\n      res = 0U;\n    #else\n      __asm volatile(\"MRS      %0,MSPLIM\" : \"=r\" (res));\n    #endif\n      return res;\n    }\n\n    __IAR_FT void   __set_MSPLIM(uint32_t value)\n    {\n    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))\n      // without main extensions, the non-secure MSPLIM is RAZ/WI\n      (void)value;\n    #else\n      __asm volatile(\"MSR      MSPLIM,%0\" :: \"r\" (value));\n    #endif\n    }\n\n    __IAR_FT uint32_t __get_PSPLIM(void)\n    {\n      uint32_t res;\n    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))\n      // without main extensions, the non-secure PSPLIM is RAZ/WI\n      res = 0U;\n    #else\n      __asm volatile(\"MRS      %0,PSPLIM\" : \"=r\" (res));\n    #endif\n      return res;\n    }\n\n    __IAR_FT void   __set_PSPLIM(uint32_t value)\n    {\n    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))\n      // without main extensions, the non-secure PSPLIM is RAZ/WI\n      (void)value;\n    #else\n      __asm volatile(\"MSR      PSPLIM,%0\" :: \"r\" (value));\n    #endif\n    }\n\n    __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)\n    {\n      uint32_t res;\n      __asm volatile(\"MRS      %0,CONTROL_NS\" : \"=r\" (res));\n      return res;\n    }\n\n    __IAR_FT void   __TZ_set_CONTROL_NS(uint32_t value)\n    {\n      __asm volatile(\"MSR      CONTROL_NS,%0\" :: \"r\" (value));\n    }\n\n    __IAR_FT uint32_t   __TZ_get_PSP_NS(void)\n    {\n      uint32_t res;\n      __asm volatile(\"MRS      %0,PSP_NS\" : \"=r\" (res));\n      return res;\n    }\n\n    __IAR_FT void   __TZ_set_PSP_NS(uint32_t value)\n    {\n      __asm volatile(\"MSR      PSP_NS,%0\" :: \"r\" (value));\n    }\n\n    __IAR_FT uint32_t   __TZ_get_MSP_NS(void)\n    {\n      uint32_t res;\n      __asm volatile(\"MRS      %0,MSP_NS\" : \"=r\" (res));\n      return res;\n    }\n\n    __IAR_FT void   __TZ_set_MSP_NS(uint32_t value)\n    {\n      __asm volatile(\"MSR      MSP_NS,%0\" :: \"r\" (value));\n    }\n\n    __IAR_FT uint32_t   __TZ_get_SP_NS(void)\n    {\n      uint32_t res;\n      __asm volatile(\"MRS      %0,SP_NS\" : \"=r\" (res));\n      return res;\n    }\n    __IAR_FT void   __TZ_set_SP_NS(uint32_t value)\n    {\n      __asm volatile(\"MSR      SP_NS,%0\" :: \"r\" (value));\n    }\n\n    __IAR_FT uint32_t   __TZ_get_PRIMASK_NS(void)\n    {\n      uint32_t res;\n      __asm volatile(\"MRS      %0,PRIMASK_NS\" : \"=r\" (res));\n      return res;\n    }\n\n    __IAR_FT void   __TZ_set_PRIMASK_NS(uint32_t value)\n    {\n      __asm volatile(\"MSR      PRIMASK_NS,%0\" :: \"r\" (value));\n    }\n\n    __IAR_FT uint32_t   __TZ_get_BASEPRI_NS(void)\n    {\n      uint32_t res;\n      __asm volatile(\"MRS      %0,BASEPRI_NS\" : \"=r\" (res));\n      return res;\n    }\n\n    __IAR_FT void   __TZ_set_BASEPRI_NS(uint32_t value)\n    {\n      __asm volatile(\"MSR      BASEPRI_NS,%0\" :: \"r\" (value));\n    }\n\n    __IAR_FT uint32_t   __TZ_get_FAULTMASK_NS(void)\n    {\n      uint32_t res;\n      __asm volatile(\"MRS      %0,FAULTMASK_NS\" : \"=r\" (res));\n      return res;\n    }\n\n    __IAR_FT void   __TZ_set_FAULTMASK_NS(uint32_t value)\n    {\n      __asm volatile(\"MSR      FAULTMASK_NS,%0\" :: \"r\" (value));\n    }\n\n    __IAR_FT uint32_t   __TZ_get_PSPLIM_NS(void)\n    {\n      uint32_t res;\n    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))\n      // without main extensions, the non-secure PSPLIM is RAZ/WI\n      res = 0U;\n    #else\n      __asm volatile(\"MRS      %0,PSPLIM_NS\" : \"=r\" (res));\n    #endif\n      return res;\n    }\n\n    __IAR_FT void   __TZ_set_PSPLIM_NS(uint32_t value)\n    {\n    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \\\n         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))\n      // without main extensions, the non-secure PSPLIM is RAZ/WI\n      (void)value;\n    #else\n      __asm volatile(\"MSR      PSPLIM_NS,%0\" :: \"r\" (value));\n    #endif\n    }\n\n    __IAR_FT uint32_t   __TZ_get_MSPLIM_NS(void)\n    {\n      uint32_t res;\n      __asm volatile(\"MRS      %0,MSPLIM_NS\" : \"=r\" (res));\n      return res;\n    }\n\n    __IAR_FT void   __TZ_set_MSPLIM_NS(uint32_t value)\n    {\n      __asm volatile(\"MSR      MSPLIM_NS,%0\" :: \"r\" (value));\n    }\n\n  #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */\n\n#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */\n\n#define __BKPT(value)    __asm volatile (\"BKPT     %0\" : : \"i\"(value))\n\n#if __IAR_M0_FAMILY\n  __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)\n  {\n    if ((sat >= 1U) && (sat <= 32U))\n    {\n      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);\n      const int32_t min = -1 - max ;\n      if (val > max)\n      {\n        return max;\n      }\n      else if (val < min)\n      {\n        return min;\n      }\n    }\n    return val;\n  }\n\n  __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)\n  {\n    if (sat <= 31U)\n    {\n      const uint32_t max = ((1U << sat) - 1U);\n      if (val > (int32_t)max)\n      {\n        return max;\n      }\n      else if (val < 0)\n      {\n        return 0U;\n      }\n    }\n    return (uint32_t)val;\n  }\n#endif\n\n#if (__CORTEX_M >= 0x03)   /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */\n\n  __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)\n  {\n    uint32_t res;\n    __ASM(\"LDRBT %0, [%1]\" : \"=r\" (res) : \"r\" (addr) : \"memory\");\n    return ((uint8_t)res);\n  }\n\n  __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)\n  {\n    uint32_t res;\n    __ASM(\"LDRHT %0, [%1]\" : \"=r\" (res) : \"r\" (addr) : \"memory\");\n    return ((uint16_t)res);\n  }\n\n  __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)\n  {\n    uint32_t res;\n    __ASM(\"LDRT %0, [%1]\" : \"=r\" (res) : \"r\" (addr) : \"memory\");\n    return res;\n  }\n\n  __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)\n  {\n    __ASM(\"STRBT %1, [%0]\" : : \"r\" (addr), \"r\" ((uint32_t)value) : \"memory\");\n  }\n\n  __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)\n  {\n    __ASM(\"STRHT %1, [%0]\" : : \"r\" (addr), \"r\" ((uint32_t)value) : \"memory\");\n  }\n\n  __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)\n  {\n    __ASM(\"STRT %1, [%0]\" : : \"r\" (addr), \"r\" (value) : \"memory\");\n  }\n\n#endif /* (__CORTEX_M >= 0x03) */\n\n#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \\\n     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )\n\n\n  __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"LDAB %0, [%1]\" : \"=r\" (res) : \"r\" (ptr) : \"memory\");\n    return ((uint8_t)res);\n  }\n\n  __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"LDAH %0, [%1]\" : \"=r\" (res) : \"r\" (ptr) : \"memory\");\n    return ((uint16_t)res);\n  }\n\n  __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"LDA %0, [%1]\" : \"=r\" (res) : \"r\" (ptr) : \"memory\");\n    return res;\n  }\n\n  __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)\n  {\n    __ASM volatile (\"STLB %1, [%0]\" :: \"r\" (ptr), \"r\" (value) : \"memory\");\n  }\n\n  __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)\n  {\n    __ASM volatile (\"STLH %1, [%0]\" :: \"r\" (ptr), \"r\" (value) : \"memory\");\n  }\n\n  __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)\n  {\n    __ASM volatile (\"STL %1, [%0]\" :: \"r\" (ptr), \"r\" (value) : \"memory\");\n  }\n\n  __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"LDAEXB %0, [%1]\" : \"=r\" (res) : \"r\" (ptr) : \"memory\");\n    return ((uint8_t)res);\n  }\n\n  __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"LDAEXH %0, [%1]\" : \"=r\" (res) : \"r\" (ptr) : \"memory\");\n    return ((uint16_t)res);\n  }\n\n  __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"LDAEX %0, [%1]\" : \"=r\" (res) : \"r\" (ptr) : \"memory\");\n    return res;\n  }\n\n  __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"STLEXB %0, %2, [%1]\" : \"=r\" (res) : \"r\" (ptr), \"r\" (value) : \"memory\");\n    return res;\n  }\n\n  __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"STLEXH %0, %2, [%1]\" : \"=r\" (res) : \"r\" (ptr), \"r\" (value) : \"memory\");\n    return res;\n  }\n\n  __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)\n  {\n    uint32_t res;\n    __ASM volatile (\"STLEX %0, %2, [%1]\" : \"=r\" (res) : \"r\" (ptr), \"r\" (value) : \"memory\");\n    return res;\n  }\n\n#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */\n\n#undef __IAR_FT\n#undef __IAR_M0_FAMILY\n#undef __ICCARM_V8\n\n#pragma diag_default=Pe940\n#pragma diag_default=Pe177\n\n#endif /* __CMSIS_ICCARM_H__ */\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis_nvic.h",
    "content": "/* mbed Microcontroller Library\n * CMSIS-style functionality to support dynamic vectors\n *******************************************************************************\n * Copyright (c) 2011 ARM Limited. All rights reserved.\n * All rights reserved.\n *\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *\n * 1. Redistributions of source code must retain the above copyright notice,\n *    this list of conditions and the following disclaimer.\n * 2. Redistributions in binary form must reproduce the above copyright notice,\n *    this list of conditions and the following disclaimer in the documentation\n *    and/or other materials provided with the distribution.\n * 3. Neither the name of ARM Limited nor the names of its contributors\n *    may be used to endorse or promote products derived from this software\n *    without specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\n * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\n * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\n * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\n * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n *******************************************************************************\n */\n\n#ifndef MBED_CMSIS_NVIC_H\n#define MBED_CMSIS_NVIC_H\n\n#include \"cmsis.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef void (*NVIC_DEFAULT_FAULT_HANDLER_T)(void);\n\nvoid NVIC_DisableAllIRQs(void);\n\nvoid NVIC_InitVectors(void);\n\nvoid NVIC_SetDefaultFaultHandler(NVIC_DEFAULT_FAULT_HANDLER_T handler);\n\nvoid NVIC_SetDefaultFaultHandler_cp(NVIC_DEFAULT_FAULT_HANDLER_T handler);\n\nIRQn_Type NVIC_GetCurrentActiveIRQ(void);\n\nvoid NVIC_PowerDownSleep(uint32_t *buf, uint32_t cnt);\n\nvoid NVIC_PowerDownWakeup(uint32_t *buf, uint32_t cnt);\n\n#ifdef __ARM_ARCH_ISA_ARM\nenum EXCEPTION_ID_T {\n    EXCEPTION_NONE = -1,\n    EXCEPTION_UNDEF = -2,\n    EXCEPTION_SVC = -3,\n    EXCEPTION_PABT = -4,\n    EXCEPTION_DABT = -5,\n    EXCEPTION_HYP = -6,\n    EXCEPTION_IRQ = -7,\n    EXCEPTION_FIQ = -8,\n};\n\nstruct FAULT_REGS_T {\n    uint32_t r[16];\n    uint32_t spsr;\n};\n\nstruct UNDEF_FAULT_INFO_T {\n    enum EXCEPTION_ID_T id;\n    uint32_t opcode;\n    uint32_t state;\n};\n\nstruct SVC_FAULT_INFO_T {\n    enum EXCEPTION_ID_T id;\n    uint32_t svc_num;\n};\n\nstruct PABT_FAULT_INFO_T {\n    enum EXCEPTION_ID_T id;\n    uint32_t IFSR;\n    uint32_t IFAR;\n};\n\nstruct DABT_FAULT_INFO_T {\n    enum EXCEPTION_ID_T id;\n    uint32_t DFSR;\n    uint32_t DFAR;\n};\n\ntypedef void (*GIC_FAULT_DUMP_HANDLER_T)(const uint32_t *regs, const uint32_t *extra, uint32_t extra_len);\n\nvoid GIC_DisableAllIRQs(void);\n\nvoid GIC_InitVectors(void);\n\nvoid GIC_SetFaultDumpHandler(GIC_FAULT_DUMP_HANDLER_T handler);\n\nIRQn_Type IRQ_GetCurrentActiveIRQ(void);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/cmsis_version.h",
    "content": "/**************************************************************************//**\n * @file     cmsis_version.h\n * @brief    CMSIS Core(M) Version definitions\n * @version  V5.0.2\n * @date     19. April 2017\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2017 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CMSIS_VERSION_H\n#define __CMSIS_VERSION_H\n\n/*  CMSIS Version definitions */\n#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */\n#define __CM_CMSIS_VERSION_SUB   ( 1U)                                      /*!< [15:0]  CMSIS Core(M) sub version */\n#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \\\n                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/core_armv81mml.h",
    "content": "/**************************************************************************//**\n * @file     core_armv81mml.h\n * @brief    CMSIS Armv8.1-M Mainline Core Peripheral Access Layer Header File\n * @version  V1.0.0\n * @date     15. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2018-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_ARMV81MML_H_GENERIC\n#define __CORE_ARMV81MML_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_ARMV81MML\n  @{\n */\n\n#include \"cmsis_version.h\"\n \n#define __ARM_ARCH_8M_MAIN__    1  // patching for now\n/*  CMSIS ARMV81MML definitions */\n#define __ARMv81MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __ARMv81MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __ARMv81MML_CMSIS_VERSION       ((__ARMv81MML_CMSIS_VERSION_MAIN << 16U) | \\\n                                         __ARMv81MML_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.\n*/\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined(__ARM_FEATURE_DSP)\n    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U    \n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n  \n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined(__ARM_FEATURE_DSP)\n    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U    \n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n  \n  #if defined(__ARM_FEATURE_DSP)\n    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U    \n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n  \n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined(__ARM_FEATURE_DSP)\n    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U    \n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n  \n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_ARMV81MML_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_ARMV81MML_H_DEPENDANT\n#define __CORE_ARMV81MML_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __ARMv81MML_REV\n    #define __ARMv81MML_REV               0x0000U\n    #warning \"__ARMv81MML_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __SAUREGION_PRESENT\n    #define __SAUREGION_PRESENT       0U\n    #warning \"__SAUREGION_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __DSP_PRESENT\n    #define __DSP_PRESENT             0U\n    #warning \"__DSP_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          3U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group ARMv81MML */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n  - Core SAU Register\n  - Core FPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */\n#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */\n\n#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */\n#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */\n#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */\n\n#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */\n#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */\n#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */\n    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */\n    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */\n    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */\n#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */\n\n#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */\n#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */\n\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[16U];\n  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[16U];\n  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[16U];\n  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[16U];\n  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[16U];\n  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */\n        uint32_t RESERVED5[16U];\n  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\n        uint32_t RESERVED6[580U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */\n}  NVIC_Type;\n\n/* Software Triggered Interrupt Register Definitions */\n#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */\n#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */\n  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */\n  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */\n  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */\n  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */\n  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */\n  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */\n  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */\n  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */\n  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */\n  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */\n  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */\n  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */\n  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */\n  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */\n  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */\n  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */\n        uint32_t RESERVED3[92U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */\n        uint32_t RESERVED4[15U];\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */\n  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */\n        uint32_t RESERVED5[1U];\n  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */\n        uint32_t RESERVED6[1U];\n  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */\n  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */\n  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */\n  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */\n  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */\n  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */\n  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */\n  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */\n        uint32_t RESERVED7[6U];\n  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */\n  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */\n  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */\n  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */\n  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */\n        uint32_t RESERVED8[1U];\n  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */\n#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */\n\n#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */\n#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */\n\n#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */\n#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */\n#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */\n#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */\n\n#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */\n#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */\n\n#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */\n#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\n\n#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */\n#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */\n#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */\n#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */\n\n#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */\n#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */\n\n#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */\n#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */\n\n#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */\n#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */\n#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */\n\n#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */\n#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */\n\n#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */\n#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */\n\n#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */\n#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\n\n#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */\n#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\n\n#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */\n#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */\n#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\n\n#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */\n#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\n\n#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */\n#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */\n#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */\n#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */\n\n#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */\n#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */\n\n#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */\n#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\n\n#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */\n#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */\n\n#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */\n#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\n\n#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */\n#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */\n\n/* SCB Configurable Fault Status Register Definitions */\n#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */\n#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\n\n#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */\n#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\n\n#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */\n#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\n\n/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */\n#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */\n\n#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */\n#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */\n\n#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */\n#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */\n\n#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */\n#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */\n\n#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */\n#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */\n\n#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */\n#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */\n\n/* BusFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */\n#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */\n\n#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */\n#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */\n\n#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */\n#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */\n\n#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */\n#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */\n\n#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */\n#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */\n\n#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */\n#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */\n\n#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */\n#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */\n\n/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */\n#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */\n\n#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */\n#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */\n\n#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */\n#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */\n\n#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */\n#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */\n\n#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */\n#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */\n\n#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */\n#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */\n\n#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */\n#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */\n\n/* SCB Hard Fault Status Register Definitions */\n#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */\n#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\n\n#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */\n#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\n\n#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */\n#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\n\n/* SCB Debug Fault Status Register Definitions */\n#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */\n#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\n\n#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */\n#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\n\n#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */\n#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\n\n#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */\n#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\n\n#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */\n#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */\n\n/* SCB Non-Secure Access Control Register Definitions */\n#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */\n#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */\n\n#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */\n#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */\n\n#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */\n#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */\n\n/* SCB Cache Level ID Register Definitions */\n#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */\n#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */\n\n#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */\n#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */\n\n/* SCB Cache Type Register Definitions */\n#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */\n#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */\n\n#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */\n#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */\n\n#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */\n#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */\n\n#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */\n#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */\n\n#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */\n#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */\n\n/* SCB Cache Size ID Register Definitions */\n#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */\n#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */\n\n#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */\n#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */\n\n#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */\n#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */\n\n#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */\n#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */\n\n#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */\n#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */\n\n#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */\n#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */\n\n#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */\n#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */\n\n/* SCB Cache Size Selection Register Definitions */\n#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */\n#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */\n\n#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */\n#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */\n\n/* SCB Software Triggered Interrupt Register Definitions */\n#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */\n#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */\n\n/* SCB D-Cache Invalidate by Set-way Register Definitions */\n#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */\n#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */\n\n#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */\n#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */\n\n/* SCB D-Cache Clean by Set-way Register Definitions */\n#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */\n#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */\n\n#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */\n#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */\n\n/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */\n#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */\n#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */\n\n#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */\n#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */\n\n/* Instruction Tightly-Coupled Memory Control Register Definitions */\n#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */\n#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */\n\n#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */\n#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */\n\n#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */\n#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */\n\n#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */\n#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */\n\n/* Data Tightly-Coupled Memory Control Register Definitions */\n#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */\n#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */\n\n#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */\n#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */\n\n#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */\n#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */\n\n#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */\n#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */\n\n/* AHBP Control Register Definitions */\n#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */\n#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */\n\n#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */\n#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */\n\n/* L1 Cache Control Register Definitions */\n#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */\n#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */\n\n#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */\n#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */\n\n#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */\n#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */\n\n/* AHBS Control Register Definitions */\n#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */\n#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */\n\n#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */\n#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */\n\n#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/\n#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */\n\n/* Auxiliary Bus Fault Status Register Definitions */\n#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/\n#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */\n\n#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/\n#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */\n\n#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/\n#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */\n\n#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/\n#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */\n\n#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/\n#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */\n\n#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/\n#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */\n} SCnSCB_Type;\n\n/* Interrupt Controller Type Register Definitions */\n#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */\n#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\n  \\brief    Type definitions for the Instrumentation Trace Macrocell (ITM)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\n */\ntypedef struct\n{\n  __OM  union\n  {\n    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */\n    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */\n    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */\n  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */\n        uint32_t RESERVED0[864U];\n  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */\n        uint32_t RESERVED1[15U];\n  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */\n        uint32_t RESERVED2[15U];\n  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */\n        uint32_t RESERVED3[29U];\n  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */\n  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */\n  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */\n        uint32_t RESERVED4[43U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */\n        uint32_t RESERVED5[1U];\n  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */\n        uint32_t RESERVED6[4U];\n  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\n  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\n  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\n  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\n  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\n  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\n  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\n  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\n  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\n  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\n  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\n  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\n} ITM_Type;\n\n/* ITM Stimulus Port Register Definitions */\n#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */\n#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */\n\n#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */\n#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */\n\n/* ITM Trace Privilege Register Definitions */\n#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */\n#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */\n\n/* ITM Trace Control Register Definitions */\n#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */\n#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\n\n#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */\n#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */\n\n#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */\n#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\n\n#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */\n#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */\n\n#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */\n#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */\n\n#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */\n#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\n\n#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */\n#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\n\n#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */\n#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\n\n#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */\n#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\n\n#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */\n#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */\n\n/* ITM Integration Write Register Definitions */\n#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */\n#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */\n\n/* ITM Integration Read Register Definitions */\n#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */\n#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */\n\n/* ITM Integration Mode Control Register Definitions */\n#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */\n#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */\n\n/* ITM Lock Status Register Definitions */\n#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */\n#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\n\n#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */\n#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\n\n#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */\n#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */\n\n/*@}*/ /* end of group CMSIS_ITM */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */\n  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */\n  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */\n  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */\n  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */\n  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n        uint32_t RESERVED3[1U];\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n        uint32_t RESERVED5[1U];\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED6[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n        uint32_t RESERVED7[1U];\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n        uint32_t RESERVED8[1U];\n  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */\n        uint32_t RESERVED9[1U];\n  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */\n        uint32_t RESERVED10[1U];\n  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */\n        uint32_t RESERVED11[1U];\n  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */\n        uint32_t RESERVED12[1U];\n  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */\n        uint32_t RESERVED13[1U];\n  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */\n        uint32_t RESERVED14[1U];\n  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */\n        uint32_t RESERVED15[1U];\n  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */\n        uint32_t RESERVED16[1U];\n  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */\n        uint32_t RESERVED17[1U];\n  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */\n        uint32_t RESERVED18[1U];\n  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */\n        uint32_t RESERVED19[1U];\n  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */\n        uint32_t RESERVED20[1U];\n  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */\n        uint32_t RESERVED21[1U];\n  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */\n        uint32_t RESERVED22[1U];\n  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */\n        uint32_t RESERVED23[1U];\n  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */\n        uint32_t RESERVED24[1U];\n  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */\n        uint32_t RESERVED25[1U];\n  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */\n        uint32_t RESERVED26[1U];\n  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */\n        uint32_t RESERVED27[1U];\n  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */\n        uint32_t RESERVED28[1U];\n  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */\n        uint32_t RESERVED29[1U];\n  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */\n        uint32_t RESERVED30[1U];\n  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */\n        uint32_t RESERVED31[1U];\n  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */\n        uint32_t RESERVED32[934U];\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */\n        uint32_t RESERVED33[1U];\n  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */\n#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */\n\n#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */\n#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\n\n#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */\n#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\n\n#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */\n#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\n\n#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */\n#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\n\n#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */\n#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\n\n#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */\n#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\n\n#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */\n#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\n\n#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */\n#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\n\n#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */\n#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\n\n#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */\n#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\n\n#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */\n#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\n\n#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */\n#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\n\n#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */\n#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */\n\n/* DWT CPI Count Register Definitions */\n#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */\n#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */\n\n/* DWT Exception Overhead Count Register Definitions */\n#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */\n#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */\n\n/* DWT Sleep Count Register Definitions */\n#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */\n#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */\n\n/* DWT LSU Count Register Definitions */\n#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */\n#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */\n\n/* DWT Folded-instruction Count Register Definitions */\n#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */\n#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */\n#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */\n\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */\n#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */\n\n#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */\n#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */\n        uint32_t RESERVED3[759U];\n  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */\n  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */\n  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */\n        uint32_t RESERVED4[1U];\n  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */\n  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */\n  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\n        uint32_t RESERVED5[39U];\n  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */\n  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\n        uint32_t RESERVED7[8U];\n  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */\n#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI TRIGGER Register Definitions */\n#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */\n#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */\n\n/* TPI Integration ETM Data Register Definitions (FIFO0) */\n#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */\n#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */\n\n#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */\n#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */\n\n#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */\n#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */\n\n#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */\n#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */\n\n#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */\n#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */\n\n#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */\n#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */\n\n#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */\n#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */\n\n/* TPI ITATBCTR2 Register Definitions */\n#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */\n#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */\n\n/* TPI Integration ITM Data Register Definitions (FIFO1) */\n#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */\n#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */\n\n#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */\n#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */\n\n#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */\n#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */\n\n#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */\n#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */\n\n#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */\n#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */\n\n#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */\n#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */\n\n#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */\n#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */\n\n/* TPI ITATBCTR0 Register Definitions */\n#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */\n#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */\n\n/* TPI Integration Mode Control Register Definitions */\n#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */\n#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */\n#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */\n\n#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */\n#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */\n\n#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */\n#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */\n  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */\n  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */\n  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */\n  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */\n  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */\n  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */\n        uint32_t RESERVED0[1];\n  union {\n  __IOM uint32_t MAIR[2];\n  struct {\n  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */\n  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */\n  };\n  };\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  4U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */\n#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */\n\n#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */\n#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */\n\n#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */\n#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */\n\n#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */\n#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */\n\n/* MPU Region Limit Address Register Definitions */\n#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */\n#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */\n\n#define MPU_RLAR_PXN_Pos                    4U                                            /*!< MPU RLAR: PXN Position */\n#define MPU_RLAR_PXN_Msk                   (0x1UL << MPU_RLAR_PXN_Pos)                    /*!< MPU RLAR: PXN Mask */\n\n#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */\n#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */\n\n#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */\n#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */\n\n/* MPU Memory Attribute Indirection Register 0 Definitions */\n#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */\n#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */\n\n#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */\n#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */\n\n#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */\n#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */\n\n#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */\n#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */\n\n/* MPU Memory Attribute Indirection Register 1 Definitions */\n#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */\n#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */\n\n#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */\n#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */\n\n#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */\n#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */\n\n#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */\n#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SAU     Security Attribution Unit (SAU)\n  \\brief    Type definitions for the Security Attribution Unit (SAU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Security Attribution Unit (SAU).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */\n#else\n        uint32_t RESERVED0[3];\n#endif\n  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */\n  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */\n} SAU_Type;\n\n/* SAU Control Register Definitions */\n#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */\n#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */\n\n#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */\n#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */\n\n/* SAU Type Register Definitions */\n#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */\n#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */\n\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n/* SAU Region Number Register Definitions */\n#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */\n#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */\n\n/* SAU Region Base Address Register Definitions */\n#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */\n#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */\n\n/* SAU Region Limit Address Register Definitions */\n#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */\n#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */\n\n#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */\n#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */\n\n#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */\n#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */\n\n#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */\n\n/* Secure Fault Status Register Definitions */\n#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */\n#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */\n\n#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */\n#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */\n\n#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */\n#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */\n\n#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */\n#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */\n\n#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */\n#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */\n\n#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */\n#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */\n\n#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */\n#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */\n\n#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */\n#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */\n\n/*@} end of group CMSIS_SAU */\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_FPU     Floating Point Unit (FPU)\n  \\brief    Type definitions for the Floating Point Unit (FPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Floating Point Unit (FPU).\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */\n  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */\n  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */\n} FPU_Type;\n\n/* Floating-Point Context Control Register Definitions */\n#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */\n#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */\n\n#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */\n#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */\n\n#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */\n#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */\n\n#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */\n#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */\n\n#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */\n#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */\n\n#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */\n#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */\n\n#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */\n#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */\n\n#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */\n#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */\n\n#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */\n#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */\n\n#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */\n#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */\n\n#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */\n#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */\n\n#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */\n#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */\n\n#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */\n#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */\n\n#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */\n#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */\n\n#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */\n#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */\n\n#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */\n#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */\n\n#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */\n#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */\n\n/* Floating-Point Context Address Register Definitions */\n#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */\n#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */\n\n/* Floating-Point Default Status Control Register Definitions */\n#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */\n#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */\n\n#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */\n#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */\n\n#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */\n#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */\n\n#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */\n#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */\n\n/* Media and FP Feature Register 0 Definitions */\n#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */\n#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */\n\n#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */\n#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */\n\n#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */\n#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */\n\n#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */\n#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */\n\n#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */\n#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */\n\n#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */\n#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */\n\n#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */\n#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */\n\n#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */\n#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */\n\n/* Media and FP Feature Register 1 Definitions */\n#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */\n#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */\n\n#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */\n#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */\n\n#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */\n#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */\n\n#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */\n#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */\n\n/*@} end of group CMSIS_FPU */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */\n  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */\n#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\n#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register Definitions */\n#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */\n#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\n\n#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */\n#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\n\n#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */\n#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\n\n#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */\n#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\n\n#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */\n#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */\n#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\n\n#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */\n#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\n\n#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */\n#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\n\n#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */\n#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\n\n#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */\n#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\n\n#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */\n#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/* Debug Authentication Control Register Definitions */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */\n\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */\n\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */\n\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */\n\n/* Debug Security Control and Status Register Definitions */\n#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */\n#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */\n\n#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */\n#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */\n\n#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */\n#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */\n  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */\n  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */\n  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */\n  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */\n  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */\n  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */\n  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */\n\n  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */\n  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */\n  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */\n  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */\n  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */\n  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */\n  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */\n  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */\n    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */\n  #endif\n\n  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */\n    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */\n  #endif\n\n  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */\n  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */\n  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */\n  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */\n  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */\n  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */\n\n  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */\n  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */\n  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */\n  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */\n  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */\n    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */\n  #endif\n\n  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */\n  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Debug Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n\n/**\n  \\brief   Set Priority Grouping\n  \\details Sets the priority grouping field using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */\n  SCB->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping\n  \\details Reads the priority grouping field from the NVIC Interrupt Controller.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)\n{\n  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Get Interrupt Target State\n  \\details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n  \\return             1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Target State\n  \\details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Clear Interrupt Target State\n  \\details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |\n                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\n                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Set Priority Grouping (non-secure)\n  \\details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */\n  SCB_NS->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping (non-secure)\n  \\details Reads the priority grouping field from the non-secure NVIC when in secure state.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)\n{\n  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt (non-secure)\n  \\details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status (non-secure)\n  \\details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt (non-secure)\n  \\details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt (non-secure)\n  \\details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt (non-secure)\n  \\details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt (non-secure)\n  \\details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt (non-secure)\n  \\details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority (non-secure)\n  \\details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every non-secure processor exception.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority (non-secure)\n  \\details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv8.h\"\n\n#endif\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n  uint32_t mvfr0;\n\n  mvfr0 = FPU->MVFR0;\n  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)\n  {\n    return 2U;           /* Double + Single precision FPU */\n  }\n  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)\n  {\n    return 1U;           /* Single precision FPU */\n  }\n  else\n  {\n    return 0U;           /* No FPU */\n  }\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##########################   SAU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SAUFunctions SAU Functions\n  \\brief    Functions that configure the SAU.\n  @{\n */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n\n/**\n  \\brief   Enable SAU\n  \\details Enables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Enable(void)\n{\n    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);\n}\n\n\n\n/**\n  \\brief   Disable SAU\n  \\details Disables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Disable(void)\n{\n    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);\n}\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_SAUFunctions */\n\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   System Tick Configuration (non-secure)\n  \\details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function TZ_SysTick_Config_NS is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n\n */\n__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                         /* Reload value impossible */\n  }\n\n  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */\n  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */\n  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                      SysTick_CTRL_TICKINT_Msk   |\n                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                           /* Function successful */\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n/* ##################################### Debug In/Output function ########################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_core_DebugFunctions ITM Functions\n  \\brief    Functions that access the ITM debug interface.\n  @{\n */\n\nextern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */\n#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \\ref ITM_RxBuffer is ready for next character. */\n\n\n/**\n  \\brief   ITM Send Character\n  \\details Transmits a character via the ITM channel 0, and\n           \\li Just returns when no debugger is connected that has booked the output.\n           \\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\n  \\param [in]     ch  Character to transmit.\n  \\returns            Character to transmit.\n */\n__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\n{\n  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */\n      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */\n  {\n    while (ITM->PORT[0U].u32 == 0UL)\n    {\n      __NOP();\n    }\n    ITM->PORT[0U].u8 = (uint8_t)ch;\n  }\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Receive Character\n  \\details Inputs a character via the external variable \\ref ITM_RxBuffer.\n  \\return             Received character.\n  \\return         -1  No character pending.\n */\n__STATIC_INLINE int32_t ITM_ReceiveChar (void)\n{\n  int32_t ch = -1;                           /* no character available */\n\n  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)\n  {\n    ch = ITM_RxBuffer;\n    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\n  }\n\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Check Character\n  \\details Checks whether a character is pending for reading in the variable \\ref ITM_RxBuffer.\n  \\return          0  No character available.\n  \\return          1  Character available.\n */\n__STATIC_INLINE int32_t ITM_CheckChar (void)\n{\n\n  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)\n  {\n    return (0);                              /* no character available */\n  }\n  else\n  {\n    return (1);                              /*    character available */\n  }\n}\n\n/*@} end of CMSIS_core_DebugFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_ARMV81MML_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_armv8mbl.h",
    "content": "/**************************************************************************//**\n * @file     core_armv8mbl.h\n * @brief    CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File\n * @version  V5.0.8\n * @date     12. November 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_ARMV8MBL_H_GENERIC\n#define __CORE_ARMV8MBL_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_ARMv8MBL\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/*  CMSIS definitions */\n#define __ARMv8MBL_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __ARMv8MBL_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __ARMv8MBL_CMSIS_VERSION       ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \\\n                                         __ARMv8MBL_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                     ( 2U)                                            /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    This core does not support an FPU at all\n*/\n#define __FPU_USED       0U\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_ARMV8MBL_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_ARMV8MBL_H_DEPENDANT\n#define __CORE_ARMV8MBL_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __ARMv8MBL_REV\n    #define __ARMv8MBL_REV               0x0000U\n    #warning \"__ARMv8MBL_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __SAUREGION_PRESENT\n    #define __SAUREGION_PRESENT       0U\n    #warning \"__SAUREGION_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __VTOR_PRESENT\n    #define __VTOR_PRESENT            0U\n    #warning \"__VTOR_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          2U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __ETM_PRESENT\n    #define __ETM_PRESENT             0U\n    #warning \"__ETM_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MTB_PRESENT\n    #define __MTB_PRESENT             0U\n    #warning \"__MTB_PRESENT not defined in device header file; using default!\"\n  #endif\n\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group ARMv8MBL */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n  - Core SAU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */\n    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[16U];\n  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[16U];\n  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[16U];\n  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[16U];\n  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[16U];\n  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */\n        uint32_t RESERVED5[16U];\n  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */\n}  NVIC_Type;\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n#else\n        uint32_t RESERVED0;\n#endif\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n        uint32_t RESERVED1;\n  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */\n#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */\n\n#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */\n#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */\n\n#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */\n#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */\n#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n#endif\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */\n#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */\n\n#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */\n#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */\n\n#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */\n#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */\n#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */\n#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */\n\n#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */\n#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */\n\n#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */\n#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */\n\n#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */\n#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */\n#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */\n#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */\n\n#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */\n#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n        uint32_t RESERVED0[6U];\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n        uint32_t RESERVED3[1U];\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n        uint32_t RESERVED5[1U];\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED6[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n        uint32_t RESERVED7[1U];\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n        uint32_t RESERVED8[1U];\n  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */\n        uint32_t RESERVED9[1U];\n  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */\n        uint32_t RESERVED10[1U];\n  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */\n        uint32_t RESERVED11[1U];\n  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */\n        uint32_t RESERVED12[1U];\n  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */\n        uint32_t RESERVED13[1U];\n  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */\n        uint32_t RESERVED14[1U];\n  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */\n        uint32_t RESERVED15[1U];\n  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */\n        uint32_t RESERVED16[1U];\n  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */\n        uint32_t RESERVED17[1U];\n  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */\n        uint32_t RESERVED18[1U];\n  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */\n        uint32_t RESERVED19[1U];\n  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */\n        uint32_t RESERVED20[1U];\n  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */\n        uint32_t RESERVED21[1U];\n  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */\n        uint32_t RESERVED22[1U];\n  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */\n        uint32_t RESERVED23[1U];\n  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */\n        uint32_t RESERVED24[1U];\n  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */\n        uint32_t RESERVED25[1U];\n  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */\n        uint32_t RESERVED26[1U];\n  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */\n        uint32_t RESERVED27[1U];\n  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */\n        uint32_t RESERVED28[1U];\n  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */\n        uint32_t RESERVED29[1U];\n  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */\n        uint32_t RESERVED30[1U];\n  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */\n        uint32_t RESERVED31[1U];\n  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */\n#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */\n\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */\n#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */\n\n#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */\n#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */\n        uint32_t RESERVED3[809U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */\n        uint32_t RESERVED4[4U];\n  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */\n#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */\n#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI Periodic Synchronization Control Register Definitions */\n#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */\n#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */\n\n/* TPI Software Lock Status Register Definitions */\n#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */\n#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */\n\n#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */\n#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */\n\n#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */\n#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */\n#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */\n        uint32_t RESERVED0[7U];\n  union {\n  __IOM uint32_t MAIR[2];\n  struct {\n  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */\n  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */\n  };\n  };\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  1U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */\n#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */\n\n#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */\n#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */\n\n#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */\n#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */\n\n#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */\n#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */\n\n/* MPU Region Limit Address Register Definitions */\n#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */\n#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */\n\n#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */\n#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */\n\n#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */\n#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */\n\n/* MPU Memory Attribute Indirection Register 0 Definitions */\n#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */\n#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */\n\n#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */\n#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */\n\n#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */\n#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */\n\n#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */\n#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */\n\n/* MPU Memory Attribute Indirection Register 1 Definitions */\n#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */\n#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */\n\n#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */\n#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */\n\n#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */\n#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */\n\n#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */\n#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SAU     Security Attribution Unit (SAU)\n  \\brief    Type definitions for the Security Attribution Unit (SAU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Security Attribution Unit (SAU).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */\n#endif\n} SAU_Type;\n\n/* SAU Control Register Definitions */\n#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */\n#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */\n\n#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */\n#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */\n\n/* SAU Type Register Definitions */\n#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */\n#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */\n\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n/* SAU Region Number Register Definitions */\n#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */\n#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */\n\n/* SAU Region Base Address Register Definitions */\n#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */\n#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */\n\n/* SAU Region Limit Address Register Definitions */\n#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */\n#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */\n\n#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */\n#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */\n\n#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */\n#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */\n\n#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */\n\n/*@} end of group CMSIS_SAU */\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */\n  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */\n#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register */\n#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< CoreDebug DEMCR: DWTENA Position */\n#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< CoreDebug DEMCR: DWTENA Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/* Debug Authentication Control Register Definitions */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */\n\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */\n\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */\n\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */\n\n/* Debug Security Control and Status Register Definitions */\n#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */\n#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */\n\n#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */\n#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */\n\n#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */\n#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */\n  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */\n  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */\n  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */\n  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */\n  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */\n  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */\n\n\n  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */\n  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */\n  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */\n  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */\n  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */\n  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */\n    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */\n  #endif\n\n  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */\n    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */\n  #endif\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */\n  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */\n  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */\n  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */\n  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */\n\n  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */\n  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */\n  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */\n  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */\n    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */\n  #endif\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */\n\n/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */\n#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */\n\n/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */\n#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */\n#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */\n#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */\n#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */\n#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */\n#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */\n#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */\n\n/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */\n#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */\n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */\n#else\n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */\n#endif\n\n\n/* Interrupt Priorities are WORD accessible only under Armv6-M                  */\n/* The following MACROS handle generation of the register offset and byte masks */\n#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)\n#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )\n#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )\n\n#define __NVIC_SetPriorityGrouping(X) (void)(X)\n#define __NVIC_GetPriorityGrouping()  (0U)\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Get Interrupt Target State\n  \\details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n  \\return             1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Target State\n  \\details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Clear Interrupt Target State\n  \\details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n  else\n  {\n    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n           If VTOR is not present address 0 must be mapped to SRAM.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n#else\n  uint32_t *vectors = (uint32_t *)0x0U;\n#endif\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n#else\n  uint32_t *vectors = (uint32_t *)0x0U;\n#endif\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                 SCB_AIRCR_SYSRESETREQ_Msk);\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Enable Interrupt (non-secure)\n  \\details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status (non-secure)\n  \\details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt (non-secure)\n  \\details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt (non-secure)\n  \\details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt (non-secure)\n  \\details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt (non-secure)\n  \\details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt (non-secure)\n  \\details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority (non-secure)\n  \\details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every non-secure processor exception.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n  else\n  {\n    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority (non-secure)\n  \\details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv8.h\"\n\n#endif\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n    return 0U;           /* No FPU */\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##########################   SAU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SAUFunctions SAU Functions\n  \\brief    Functions that configure the SAU.\n  @{\n */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n\n/**\n  \\brief   Enable SAU\n  \\details Enables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Enable(void)\n{\n    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);\n}\n\n\n\n/**\n  \\brief   Disable SAU\n  \\details Disables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Disable(void)\n{\n    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);\n}\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_SAUFunctions */\n\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   System Tick Configuration (non-secure)\n  \\details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function TZ_SysTick_Config_NS is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n\n */\n__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                         /* Reload value impossible */\n  }\n\n  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */\n  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */\n  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                      SysTick_CTRL_TICKINT_Msk   |\n                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                           /* Function successful */\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_ARMV8MBL_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_armv8mml.h",
    "content": "/**************************************************************************//**\n * @file     core_armv8mml.h\n * @brief    CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File\n * @version  V5.1.0\n * @date     12. September 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_ARMV8MML_H_GENERIC\n#define __CORE_ARMV8MML_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_ARMv8MML\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/*  CMSIS Armv8MML definitions */\n#define __ARMv8MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __ARMv8MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __ARMv8MML_CMSIS_VERSION       ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \\\n                                         __ARMv8MML_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.\n*/\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined(__ARM_FEATURE_DSP)\n    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined(__ARM_FEATURE_DSP)\n    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined(__ARM_FEATURE_DSP)\n    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined(__ARM_FEATURE_DSP)\n    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_ARMV8MML_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_ARMV8MML_H_DEPENDANT\n#define __CORE_ARMV8MML_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __ARMv8MML_REV\n    #define __ARMv8MML_REV               0x0000U\n    #warning \"__ARMv8MML_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __SAUREGION_PRESENT\n    #define __SAUREGION_PRESENT       0U\n    #warning \"__SAUREGION_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __DSP_PRESENT\n    #define __DSP_PRESENT             0U\n    #warning \"__DSP_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          3U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group ARMv8MML */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n  - Core SAU Register\n  - Core FPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */\n#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */\n\n#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */\n#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */\n#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */\n\n#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */\n#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */\n#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */\n    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */\n    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */\n    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */\n#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */\n\n#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */\n#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */\n\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[16U];\n  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[16U];\n  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[16U];\n  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[16U];\n  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[16U];\n  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */\n        uint32_t RESERVED5[16U];\n  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\n        uint32_t RESERVED6[580U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */\n}  NVIC_Type;\n\n/* Software Triggered Interrupt Register Definitions */\n#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */\n#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */\n  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */\n  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */\n  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */\n  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */\n  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */\n  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */\n  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */\n  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */\n  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */\n  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */\n  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */\n  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */\n  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */\n  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */\n  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */\n  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */\n        uint32_t RESERVED3[92U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */\n        uint32_t RESERVED4[15U];\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */\n  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */\n        uint32_t RESERVED5[1U];\n  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */\n        uint32_t RESERVED6[1U];\n  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */\n  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */\n  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */\n  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */\n  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */\n  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */\n  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */\n  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */\n#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */\n\n#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */\n#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */\n\n#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */\n#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */\n#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */\n#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */\n\n#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */\n#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */\n\n#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */\n#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\n\n#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */\n#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */\n#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */\n#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */\n\n#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */\n#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */\n\n#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */\n#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */\n\n#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */\n#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */\n#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */\n\n#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */\n#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */\n\n#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */\n#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */\n\n#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */\n#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\n\n#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */\n#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\n\n#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */\n#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */\n#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\n\n#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */\n#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\n\n#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */\n#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */\n#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */\n#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */\n\n#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */\n#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */\n\n#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */\n#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\n\n#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */\n#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */\n\n#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */\n#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\n\n#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */\n#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */\n\n/* SCB Configurable Fault Status Register Definitions */\n#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */\n#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\n\n#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */\n#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\n\n#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */\n#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\n\n/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */\n#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */\n\n#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */\n#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */\n\n#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */\n#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */\n\n#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */\n#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */\n\n#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */\n#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */\n\n#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */\n#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */\n\n/* BusFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */\n#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */\n\n#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */\n#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */\n\n#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */\n#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */\n\n#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */\n#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */\n\n#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */\n#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */\n\n#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */\n#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */\n\n#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */\n#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */\n\n/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */\n#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */\n\n#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */\n#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */\n\n#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */\n#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */\n\n#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */\n#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */\n\n#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */\n#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */\n\n#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */\n#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */\n\n#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */\n#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */\n\n/* SCB Hard Fault Status Register Definitions */\n#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */\n#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\n\n#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */\n#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\n\n#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */\n#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\n\n/* SCB Debug Fault Status Register Definitions */\n#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */\n#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\n\n#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */\n#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\n\n#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */\n#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\n\n#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */\n#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\n\n#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */\n#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */\n\n/* SCB Non-Secure Access Control Register Definitions */\n#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */\n#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */\n\n#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */\n#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */\n\n#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */\n#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */\n\n/* SCB Cache Level ID Register Definitions */\n#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */\n#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */\n\n#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */\n#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */\n\n/* SCB Cache Type Register Definitions */\n#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */\n#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */\n\n#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */\n#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */\n\n#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */\n#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */\n\n#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */\n#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */\n\n#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */\n#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */\n\n/* SCB Cache Size ID Register Definitions */\n#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */\n#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */\n\n#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */\n#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */\n\n#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */\n#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */\n\n#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */\n#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */\n\n#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */\n#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */\n\n#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */\n#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */\n\n#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */\n#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */\n\n/* SCB Cache Size Selection Register Definitions */\n#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */\n#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */\n\n#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */\n#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */\n\n/* SCB Software Triggered Interrupt Register Definitions */\n#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */\n#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */\n\n/* SCB D-Cache Invalidate by Set-way Register Definitions */\n#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */\n#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */\n\n#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */\n#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */\n\n/* SCB D-Cache Clean by Set-way Register Definitions */\n#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */\n#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */\n\n#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */\n#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */\n\n/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */\n#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */\n#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */\n\n#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */\n#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */\n} SCnSCB_Type;\n\n/* Interrupt Controller Type Register Definitions */\n#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */\n#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\n  \\brief    Type definitions for the Instrumentation Trace Macrocell (ITM)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\n */\ntypedef struct\n{\n  __OM  union\n  {\n    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */\n    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */\n    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */\n  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */\n        uint32_t RESERVED0[864U];\n  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */\n        uint32_t RESERVED1[15U];\n  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */\n        uint32_t RESERVED2[15U];\n  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */\n        uint32_t RESERVED3[32U];\n        uint32_t RESERVED4[43U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */\n        uint32_t RESERVED5[1U];\n  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */\n        uint32_t RESERVED6[4U];\n  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\n  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\n  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\n  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\n  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\n  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\n  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\n  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\n  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\n  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\n  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\n  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\n} ITM_Type;\n\n/* ITM Stimulus Port Register Definitions */\n#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */\n#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */\n\n#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */\n#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */\n\n/* ITM Trace Privilege Register Definitions */\n#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */\n#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */\n\n/* ITM Trace Control Register Definitions */\n#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */\n#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\n\n#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */\n#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */\n\n#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */\n#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\n\n#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */\n#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */\n\n#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */\n#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */\n\n#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */\n#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\n\n#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */\n#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\n\n#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */\n#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\n\n#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */\n#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\n\n#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */\n#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */\n\n/* ITM Lock Status Register Definitions */\n#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */\n#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\n\n#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */\n#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\n\n#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */\n#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */\n\n/*@}*/ /* end of group CMSIS_ITM */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */\n  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */\n  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */\n  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */\n  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */\n  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n        uint32_t RESERVED3[1U];\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n        uint32_t RESERVED5[1U];\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED6[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n        uint32_t RESERVED7[1U];\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n        uint32_t RESERVED8[1U];\n  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */\n        uint32_t RESERVED9[1U];\n  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */\n        uint32_t RESERVED10[1U];\n  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */\n        uint32_t RESERVED11[1U];\n  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */\n        uint32_t RESERVED12[1U];\n  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */\n        uint32_t RESERVED13[1U];\n  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */\n        uint32_t RESERVED14[1U];\n  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */\n        uint32_t RESERVED15[1U];\n  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */\n        uint32_t RESERVED16[1U];\n  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */\n        uint32_t RESERVED17[1U];\n  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */\n        uint32_t RESERVED18[1U];\n  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */\n        uint32_t RESERVED19[1U];\n  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */\n        uint32_t RESERVED20[1U];\n  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */\n        uint32_t RESERVED21[1U];\n  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */\n        uint32_t RESERVED22[1U];\n  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */\n        uint32_t RESERVED23[1U];\n  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */\n        uint32_t RESERVED24[1U];\n  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */\n        uint32_t RESERVED25[1U];\n  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */\n        uint32_t RESERVED26[1U];\n  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */\n        uint32_t RESERVED27[1U];\n  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */\n        uint32_t RESERVED28[1U];\n  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */\n        uint32_t RESERVED29[1U];\n  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */\n        uint32_t RESERVED30[1U];\n  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */\n        uint32_t RESERVED31[1U];\n  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */\n        uint32_t RESERVED32[934U];\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */\n        uint32_t RESERVED33[1U];\n  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */\n#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */\n\n#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */\n#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\n\n#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */\n#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\n\n#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */\n#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\n\n#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */\n#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\n\n#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */\n#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\n\n#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */\n#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\n\n#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */\n#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\n\n#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */\n#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\n\n#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */\n#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\n\n#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */\n#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\n\n#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */\n#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\n\n#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */\n#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\n\n#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */\n#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */\n\n/* DWT CPI Count Register Definitions */\n#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */\n#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */\n\n/* DWT Exception Overhead Count Register Definitions */\n#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */\n#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */\n\n/* DWT Sleep Count Register Definitions */\n#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */\n#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */\n\n/* DWT LSU Count Register Definitions */\n#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */\n#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */\n\n/* DWT Folded-instruction Count Register Definitions */\n#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */\n#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */\n#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */\n\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */\n#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */\n\n#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */\n#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */\n        uint32_t RESERVED3[809U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */\n        uint32_t RESERVED4[4U];\n  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */\n#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */\n#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI Periodic Synchronization Control Register Definitions */\n#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */\n#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */\n\n/* TPI Software Lock Status Register Definitions */\n#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */\n#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */\n\n#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */\n#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */\n\n#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */\n#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */\n#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */\n  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */\n  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */\n  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */\n  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */\n  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */\n  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */\n        uint32_t RESERVED0[1];\n  union {\n  __IOM uint32_t MAIR[2];\n  struct {\n  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */\n  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */\n  };\n  };\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  4U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */\n#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */\n\n#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */\n#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */\n\n#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */\n#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */\n\n#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */\n#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */\n\n/* MPU Region Limit Address Register Definitions */\n#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */\n#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */\n\n#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */\n#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */\n\n#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */\n#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */\n\n/* MPU Memory Attribute Indirection Register 0 Definitions */\n#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */\n#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */\n\n#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */\n#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */\n\n#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */\n#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */\n\n#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */\n#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */\n\n/* MPU Memory Attribute Indirection Register 1 Definitions */\n#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */\n#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */\n\n#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */\n#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */\n\n#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */\n#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */\n\n#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */\n#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SAU     Security Attribution Unit (SAU)\n  \\brief    Type definitions for the Security Attribution Unit (SAU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Security Attribution Unit (SAU).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */\n#else\n        uint32_t RESERVED0[3];\n#endif\n  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */\n  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */\n} SAU_Type;\n\n/* SAU Control Register Definitions */\n#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */\n#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */\n\n#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */\n#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */\n\n/* SAU Type Register Definitions */\n#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */\n#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */\n\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n/* SAU Region Number Register Definitions */\n#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */\n#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */\n\n/* SAU Region Base Address Register Definitions */\n#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */\n#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */\n\n/* SAU Region Limit Address Register Definitions */\n#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */\n#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */\n\n#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */\n#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */\n\n#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */\n#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */\n\n#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */\n\n/* Secure Fault Status Register Definitions */\n#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */\n#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */\n\n#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */\n#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */\n\n#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */\n#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */\n\n#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */\n#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */\n\n#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */\n#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */\n\n#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */\n#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */\n\n#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */\n#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */\n\n#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */\n#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */\n\n/*@} end of group CMSIS_SAU */\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_FPU     Floating Point Unit (FPU)\n  \\brief    Type definitions for the Floating Point Unit (FPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Floating Point Unit (FPU).\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */\n  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */\n  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */\n} FPU_Type;\n\n/* Floating-Point Context Control Register Definitions */\n#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */\n#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */\n\n#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */\n#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */\n\n#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */\n#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */\n\n#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */\n#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */\n\n#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */\n#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */\n\n#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */\n#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */\n\n#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */\n#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */\n\n#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */\n#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */\n\n#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */\n#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */\n\n#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */\n#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */\n\n#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */\n#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */\n\n#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */\n#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */\n\n#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */\n#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */\n\n#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */\n#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */\n\n#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */\n#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */\n\n#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */\n#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */\n\n#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */\n#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */\n\n/* Floating-Point Context Address Register Definitions */\n#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */\n#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */\n\n/* Floating-Point Default Status Control Register Definitions */\n#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */\n#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */\n\n#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */\n#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */\n\n#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */\n#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */\n\n#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */\n#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */\n\n/* Media and FP Feature Register 0 Definitions */\n#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */\n#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */\n\n#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */\n#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */\n\n#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */\n#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */\n\n#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */\n#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */\n\n#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */\n#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */\n\n#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */\n#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */\n\n#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */\n#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */\n\n#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */\n#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */\n\n/* Media and FP Feature Register 1 Definitions */\n#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */\n#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */\n\n#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */\n#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */\n\n#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */\n#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */\n\n#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */\n#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */\n\n/*@} end of group CMSIS_FPU */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */\n  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */\n#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\n#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register Definitions */\n#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */\n#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\n\n#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */\n#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\n\n#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */\n#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\n\n#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */\n#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\n\n#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */\n#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */\n#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\n\n#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */\n#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\n\n#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */\n#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\n\n#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */\n#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\n\n#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */\n#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\n\n#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */\n#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/* Debug Authentication Control Register Definitions */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */\n\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */\n\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */\n\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */\n\n/* Debug Security Control and Status Register Definitions */\n#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */\n#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */\n\n#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */\n#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */\n\n#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */\n#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */\n  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */\n  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */\n  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */\n  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */\n  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */\n  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */\n  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */\n\n  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */\n  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */\n  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */\n  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */\n  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */\n  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */\n  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */\n  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */\n    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */\n  #endif\n\n  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */\n    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */\n  #endif\n\n  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */\n  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */\n  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */\n  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */\n  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */\n  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */\n\n  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */\n  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */\n  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */\n  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */\n  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */\n    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */\n  #endif\n\n  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */\n  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Debug Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */\n\n/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */\n#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */\n\n/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */\n#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */\n#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */\n#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */\n#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */\n#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */\n#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */\n#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */\n\n/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */\n#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */\n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */\n#else\n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */\n#endif\n\n\n/**\n  \\brief   Set Priority Grouping\n  \\details Sets the priority grouping field using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */\n  SCB->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping\n  \\details Reads the priority grouping field from the NVIC Interrupt Controller.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)\n{\n  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Get Interrupt Target State\n  \\details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n  \\return             1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Target State\n  \\details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Clear Interrupt Target State\n  \\details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |\n                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\n                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Set Priority Grouping (non-secure)\n  \\details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)                      );              /* Insert write key and priority group */\n  SCB_NS->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping (non-secure)\n  \\details Reads the priority grouping field from the non-secure NVIC when in secure state.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)\n{\n  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt (non-secure)\n  \\details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status (non-secure)\n  \\details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt (non-secure)\n  \\details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt (non-secure)\n  \\details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt (non-secure)\n  \\details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt (non-secure)\n  \\details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt (non-secure)\n  \\details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority (non-secure)\n  \\details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every non-secure processor exception.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority (non-secure)\n  \\details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv8.h\"\n\n#endif\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n  uint32_t mvfr0;\n\n  mvfr0 = FPU->MVFR0;\n  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)\n  {\n    return 2U;           /* Double + Single precision FPU */\n  }\n  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)\n  {\n    return 1U;           /* Single precision FPU */\n  }\n  else\n  {\n    return 0U;           /* No FPU */\n  }\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##########################   SAU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SAUFunctions SAU Functions\n  \\brief    Functions that configure the SAU.\n  @{\n */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n\n/**\n  \\brief   Enable SAU\n  \\details Enables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Enable(void)\n{\n    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);\n}\n\n\n\n/**\n  \\brief   Disable SAU\n  \\details Disables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Disable(void)\n{\n    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);\n}\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_SAUFunctions */\n\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   System Tick Configuration (non-secure)\n  \\details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function TZ_SysTick_Config_NS is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n\n */\n__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                         /* Reload value impossible */\n  }\n\n  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */\n  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */\n  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                      SysTick_CTRL_TICKINT_Msk   |\n                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                           /* Function successful */\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n/* ##################################### Debug In/Output function ########################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_core_DebugFunctions ITM Functions\n  \\brief    Functions that access the ITM debug interface.\n  @{\n */\n\nextern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */\n#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \\ref ITM_RxBuffer is ready for next character. */\n\n\n/**\n  \\brief   ITM Send Character\n  \\details Transmits a character via the ITM channel 0, and\n           \\li Just returns when no debugger is connected that has booked the output.\n           \\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\n  \\param [in]     ch  Character to transmit.\n  \\returns            Character to transmit.\n */\n__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\n{\n  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */\n      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */\n  {\n    while (ITM->PORT[0U].u32 == 0UL)\n    {\n      __NOP();\n    }\n    ITM->PORT[0U].u8 = (uint8_t)ch;\n  }\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Receive Character\n  \\details Inputs a character via the external variable \\ref ITM_RxBuffer.\n  \\return             Received character.\n  \\return         -1  No character pending.\n */\n__STATIC_INLINE int32_t ITM_ReceiveChar (void)\n{\n  int32_t ch = -1;                           /* no character available */\n\n  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)\n  {\n    ch = ITM_RxBuffer;\n    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\n  }\n\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Check Character\n  \\details Checks whether a character is pending for reading in the variable \\ref ITM_RxBuffer.\n  \\return          0  No character available.\n  \\return          1  Character available.\n */\n__STATIC_INLINE int32_t ITM_CheckChar (void)\n{\n\n  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)\n  {\n    return (0);                              /* no character available */\n  }\n  else\n  {\n    return (1);                              /*    character available */\n  }\n}\n\n/*@} end of CMSIS_core_DebugFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_ARMV8MML_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm0.h",
    "content": "/**************************************************************************//**\n * @file     core_cm0.h\n * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File\n * @version  V5.0.6\n * @date     13. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM0_H_GENERIC\n#define __CORE_CM0_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_M0\n  @{\n */\n\n#include \"cmsis_version.h\"\n \n/*  CMSIS CM0 definitions */\n#define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16U) | \\\n                                    __CM0_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                (0U)                                   /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    This core does not support an FPU at all\n*/\n#define __FPU_USED       0U\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM0_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM0_H_DEPENDANT\n#define __CORE_CM0_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM0_REV\n    #define __CM0_REV               0x0000U\n    #warning \"__CM0_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          2U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex_M0 */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */\n    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[31U];\n  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RESERVED1[31U];\n  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[31U];\n  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[31U];\n        uint32_t RESERVED4[64U];\n  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */\n}  NVIC_Type;\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n        uint32_t RESERVED0;\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n        uint32_t RESERVED1;\n  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */\n#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */\n#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.\n            Therefore they are not covered by the Cortex-M0 header file.\n  @{\n */\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */\n#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */\n#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */\n#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */\n\n#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */\n#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */\n#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */\n\n\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0 */\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* The following EXC_RETURN values are saved the LR on exception entry */\n#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */\n#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */\n#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */\n\n\n/* Interrupt Priorities are WORD accessible only under Armv6-M                  */\n/* The following MACROS handle generation of the register offset and byte masks */\n#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)\n#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )\n#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )\n\n#define __NVIC_SetPriorityGrouping(X) (void)(X)\n#define __NVIC_GetPriorityGrouping()  (0U)\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n  else\n  {\n    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           Address 0 must be mapped to SRAM.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t vectors = 0x0U;\n  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t vectors = 0x0U;\n  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                 SCB_AIRCR_SYSRESETREQ_Msk);\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n    return 0U;           /* No FPU */\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM0_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm0plus.h",
    "content": "/**************************************************************************//**\n * @file     core_cm0plus.h\n * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File\n * @version  V5.0.7\n * @date     13. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM0PLUS_H_GENERIC\n#define __CORE_CM0PLUS_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex-M0+\n  @{\n */\n\n#include \"cmsis_version.h\"\n \n/*  CMSIS CM0+ definitions */\n#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)                  /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM0PLUS_CMSIS_VERSION_SUB  (__CM_CMSIS_VERSION_SUB)                   /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM0PLUS_CMSIS_VERSION      ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \\\n                                       __CM0PLUS_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                   (0U)                                       /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    This core does not support an FPU at all\n*/\n#define __FPU_USED       0U\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM0PLUS_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM0PLUS_H_DEPENDANT\n#define __CORE_CM0PLUS_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM0PLUS_REV\n    #define __CM0PLUS_REV             0x0000U\n    #warning \"__CM0PLUS_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __VTOR_PRESENT\n    #define __VTOR_PRESENT            0U\n    #warning \"__VTOR_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          2U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex-M0+ */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core MPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */\n    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[31U];\n  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RESERVED1[31U];\n  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[31U];\n  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[31U];\n        uint32_t RESERVED4[64U];\n  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */\n}  NVIC_Type;\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n#else\n        uint32_t RESERVED0;\n#endif\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n        uint32_t RESERVED1;\n  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */\n#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 8U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */\n#endif\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */\n#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  1U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */\n#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */\n\n#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */\n#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */\n\n#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */\n#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */\n\n/* MPU Region Attribute and Size Register Definitions */\n#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */\n#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */\n\n#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */\n#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */\n\n#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */\n#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */\n\n#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */\n#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */\n\n#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */\n#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */\n\n#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */\n#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */\n\n#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */\n#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */\n\n#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */\n#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */\n\n#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */\n#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */\n\n#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */\n#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.\n            Therefore they are not covered by the Cortex-M0+ header file.\n  @{\n */\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */\n#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */\n#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */\n#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */\n\n#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */\n#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */\n#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */\n  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */\n#endif\n\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0+ */\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* The following EXC_RETURN values are saved the LR on exception entry */\n#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */\n#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */\n#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */\n\n\n/* Interrupt Priorities are WORD accessible only under Armv6-M                  */\n/* The following MACROS handle generation of the register offset and byte masks */\n#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)\n#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )\n#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )\n\n#define __NVIC_SetPriorityGrouping(X) (void)(X)\n#define __NVIC_GetPriorityGrouping()  (0U)\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n  else\n  {\n    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n           If VTOR is not present address 0 must be mapped to SRAM.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  uint32_t vectors = SCB->VTOR;\n#else\n  uint32_t vectors = 0x0U;\n#endif\n  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  uint32_t vectors = SCB->VTOR;\n#else\n  uint32_t vectors = 0x0U;\n#endif\n  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                 SCB_AIRCR_SYSRESETREQ_Msk);\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv7.h\"\n\n#endif\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n    return 0U;           /* No FPU */\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM0PLUS_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm1.h",
    "content": "/**************************************************************************//**\n * @file     core_cm1.h\n * @brief    CMSIS Cortex-M1 Core Peripheral Access Layer Header File\n * @version  V1.0.1\n * @date     12. November 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM1_H_GENERIC\n#define __CORE_CM1_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_M1\n  @{\n */\n\n#include \"cmsis_version.h\"\n \n/*  CMSIS CM1 definitions */\n#define __CM1_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM1_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM1_CMSIS_VERSION       ((__CM1_CMSIS_VERSION_MAIN << 16U) | \\\n                                    __CM1_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                (1U)                                   /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    This core does not support an FPU at all\n*/\n#define __FPU_USED       0U\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM1_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM1_H_DEPENDANT\n#define __CORE_CM1_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM1_REV\n    #define __CM1_REV               0x0100U\n    #warning \"__CM1_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          2U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex_M1 */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */\n    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[31U];\n  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[31U];\n  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[31U];\n  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[31U];\n        uint32_t RESERVED4[64U];\n  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */\n}  NVIC_Type;\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n        uint32_t RESERVED0;\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n        uint32_t RESERVED1;\n  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */\n#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */\n#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n} SCnSCB_Type;\n\n/* Auxiliary Control Register Definitions */\n#define SCnSCB_ACTLR_ITCMUAEN_Pos            4U                                        /*!< ACTLR: Instruction TCM Upper Alias Enable Position */\n#define SCnSCB_ACTLR_ITCMUAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos)         /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */\n\n#define SCnSCB_ACTLR_ITCMLAEN_Pos            3U                                        /*!< ACTLR: Instruction TCM Lower Alias Enable Position */\n#define SCnSCB_ACTLR_ITCMLAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos)         /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.\n            Therefore they are not covered by the Cortex-M1 header file.\n  @{\n */\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */\n#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */\n#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */\n#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */\n\n#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */\n#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */\n#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */\n#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */\n\n\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M1 */\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* The following EXC_RETURN values are saved the LR on exception entry */\n#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */\n#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */\n#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */\n\n\n/* Interrupt Priorities are WORD accessible only under Armv6-M                  */\n/* The following MACROS handle generation of the register offset and byte masks */\n#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)\n#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )\n#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )\n\n#define __NVIC_SetPriorityGrouping(X) (void)(X)\n#define __NVIC_GetPriorityGrouping()  (0U)\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n  else\n  {\n    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           Address 0 must be mapped to SRAM.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t *vectors = (uint32_t *)0x0U;\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t *vectors = (uint32_t *)0x0U;\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                 SCB_AIRCR_SYSRESETREQ_Msk);\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n    return 0U;           /* No FPU */\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM1_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm23.h",
    "content": "/**************************************************************************//**\n * @file     core_cm23.h\n * @brief    CMSIS Cortex-M23 Core Peripheral Access Layer Header File\n * @version  V5.0.8\n * @date     12. November 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM23_H_GENERIC\n#define __CORE_CM23_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_M23\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/*  CMSIS definitions */\n#define __CM23_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM23_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM23_CMSIS_VERSION       ((__CM23_CMSIS_VERSION_MAIN << 16U) | \\\n                                     __CM23_CMSIS_VERSION_SUB           )      /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                 (23U)                                       /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    This core does not support an FPU at all\n*/\n#define __FPU_USED       0U\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM23_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM23_H_DEPENDANT\n#define __CORE_CM23_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM23_REV\n    #define __CM23_REV                0x0000U\n    #warning \"__CM23_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __SAUREGION_PRESENT\n    #define __SAUREGION_PRESENT       0U\n    #warning \"__SAUREGION_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __VTOR_PRESENT\n    #define __VTOR_PRESENT            0U\n    #warning \"__VTOR_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          2U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __ETM_PRESENT\n    #define __ETM_PRESENT             0U\n    #warning \"__ETM_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MTB_PRESENT\n    #define __MTB_PRESENT             0U\n    #warning \"__MTB_PRESENT not defined in device header file; using default!\"\n  #endif\n\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex_M23 */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n  - Core SAU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */\n    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[16U];\n  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[16U];\n  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[16U];\n  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[16U];\n  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[16U];\n  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */\n        uint32_t RESERVED5[16U];\n  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */\n}  NVIC_Type;\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n#else\n        uint32_t RESERVED0;\n#endif\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n        uint32_t RESERVED1;\n  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */\n#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */\n\n#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */\n#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */\n\n#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */\n#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */\n#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n#endif\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */\n#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */\n\n#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */\n#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */\n\n#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */\n#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */\n#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */\n#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */\n\n#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */\n#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */\n\n#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */\n#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */\n\n#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */\n#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */\n#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */\n#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */\n\n#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */\n#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n        uint32_t RESERVED0[6U];\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n        uint32_t RESERVED3[1U];\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n        uint32_t RESERVED5[1U];\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED6[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n        uint32_t RESERVED7[1U];\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n        uint32_t RESERVED8[1U];\n  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */\n        uint32_t RESERVED9[1U];\n  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */\n        uint32_t RESERVED10[1U];\n  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */\n        uint32_t RESERVED11[1U];\n  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */\n        uint32_t RESERVED12[1U];\n  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */\n        uint32_t RESERVED13[1U];\n  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */\n        uint32_t RESERVED14[1U];\n  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */\n        uint32_t RESERVED15[1U];\n  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */\n        uint32_t RESERVED16[1U];\n  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */\n        uint32_t RESERVED17[1U];\n  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */\n        uint32_t RESERVED18[1U];\n  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */\n        uint32_t RESERVED19[1U];\n  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */\n        uint32_t RESERVED20[1U];\n  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */\n        uint32_t RESERVED21[1U];\n  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */\n        uint32_t RESERVED22[1U];\n  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */\n        uint32_t RESERVED23[1U];\n  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */\n        uint32_t RESERVED24[1U];\n  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */\n        uint32_t RESERVED25[1U];\n  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */\n        uint32_t RESERVED26[1U];\n  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */\n        uint32_t RESERVED27[1U];\n  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */\n        uint32_t RESERVED28[1U];\n  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */\n        uint32_t RESERVED29[1U];\n  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */\n        uint32_t RESERVED30[1U];\n  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */\n        uint32_t RESERVED31[1U];\n  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */\n#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */\n\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */\n#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */\n\n#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */\n#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */\n        uint32_t RESERVED3[759U];\n  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */\n  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */\n  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */\n        uint32_t RESERVED4[1U];\n  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */\n  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */\n  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\n        uint32_t RESERVED5[39U];\n  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */\n  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\n        uint32_t RESERVED7[8U];\n  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */\n#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */\n#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI TRIGGER Register Definitions */\n#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */\n#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */\n\n/* TPI Integration Test FIFO Test Data 0 Register Definitions */\n#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */\n#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */\n\n#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */\n#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */\n#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */\n#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */\n#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */\n#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */\n#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */\n\n/* TPI Integration Test ATB Control Register 2 Register Definitions */\n#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */\n#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */\n\n#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */\n#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */\n\n#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */\n#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */\n\n#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */\n#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */\n\n/* TPI Integration Test FIFO Test Data 1 Register Definitions */\n#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */\n#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */\n#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */\n\n#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */\n#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */\n\n#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */\n#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */\n#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */\n#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */\n#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */\n\n/* TPI Integration Test ATB Control Register 0 Definitions */\n#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */\n#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */\n\n#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */\n#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */\n\n#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */\n#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */\n\n#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */\n#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */\n\n/* TPI Integration Mode Control Register Definitions */\n#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */\n#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */\n#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */\n\n#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */\n#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */\n        uint32_t RESERVED0[7U];\n  union {\n  __IOM uint32_t MAIR[2];\n  struct {\n  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */\n  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */\n  };\n  };\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  1U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */\n#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */\n\n#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */\n#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */\n\n#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */\n#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */\n\n#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */\n#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */\n\n/* MPU Region Limit Address Register Definitions */\n#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */\n#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */\n\n#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */\n#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */\n\n#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */\n#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */\n\n/* MPU Memory Attribute Indirection Register 0 Definitions */\n#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */\n#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */\n\n#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */\n#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */\n\n#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */\n#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */\n\n#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */\n#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */\n\n/* MPU Memory Attribute Indirection Register 1 Definitions */\n#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */\n#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */\n\n#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */\n#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */\n\n#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */\n#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */\n\n#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */\n#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SAU     Security Attribution Unit (SAU)\n  \\brief    Type definitions for the Security Attribution Unit (SAU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Security Attribution Unit (SAU).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */\n#endif\n} SAU_Type;\n\n/* SAU Control Register Definitions */\n#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */\n#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */\n\n#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */\n#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */\n\n/* SAU Type Register Definitions */\n#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */\n#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */\n\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n/* SAU Region Number Register Definitions */\n#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */\n#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */\n\n/* SAU Region Base Address Register Definitions */\n#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */\n#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */\n\n/* SAU Region Limit Address Register Definitions */\n#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */\n#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */\n\n#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */\n#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */\n\n#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */\n#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */\n\n#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */\n\n/*@} end of group CMSIS_SAU */\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */\n  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */\n#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register */\n#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< CoreDebug DEMCR: DWTENA Position */\n#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< CoreDebug DEMCR: DWTENA Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/* Debug Authentication Control Register Definitions */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */\n\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */\n\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */\n\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */\n\n/* Debug Security Control and Status Register Definitions */\n#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */\n#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */\n\n#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */\n#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */\n\n#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */\n#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */\n  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */\n  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */\n  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */\n  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */\n  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */\n  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */\n\n\n  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */\n  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */\n  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */\n  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */\n  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */\n  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */\n    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */\n  #endif\n\n  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */\n    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */\n  #endif\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */\n  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */\n  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */\n  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */\n  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */\n\n  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */\n  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */\n  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */\n  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */\n    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */\n  #endif\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n/*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for Cortex-M23 */\n/*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for Cortex-M23 */\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */\n\n/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ \n#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */\n\n/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */\n#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */\n#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */\n#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */\n#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */\n#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */\n#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */\n#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */\n\n/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */\n#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */\n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */\n#else \n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */\n#endif\n\n\t\n/* Interrupt Priorities are WORD accessible only under Armv6-M                  */\n/* The following MACROS handle generation of the register offset and byte masks */\n#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)\n#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )\n#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )\n\n#define __NVIC_SetPriorityGrouping(X) (void)(X)\n#define __NVIC_GetPriorityGrouping()  (0U)\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Get Interrupt Target State\n  \\details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n  \\return             1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Target State\n  \\details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Clear Interrupt Target State\n  \\details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n  else\n  {\n    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n           If VTOR is not present address 0 must be mapped to SRAM.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n#else\n  uint32_t *vectors = (uint32_t *)0x0U;\n#endif\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n#else\n  uint32_t *vectors = (uint32_t *)0x0U;\n#endif\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                 SCB_AIRCR_SYSRESETREQ_Msk);\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Enable Interrupt (non-secure)\n  \\details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status (non-secure)\n  \\details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt (non-secure)\n  \\details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt (non-secure)\n  \\details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt (non-secure)\n  \\details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt (non-secure)\n  \\details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt (non-secure)\n  \\details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority (non-secure)\n  \\details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every non-secure processor exception.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n  else\n  {\n    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority (non-secure)\n  \\details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv8.h\"\n\n#endif\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n    return 0U;           /* No FPU */\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##########################   SAU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SAUFunctions SAU Functions\n  \\brief    Functions that configure the SAU.\n  @{\n */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n\n/**\n  \\brief   Enable SAU\n  \\details Enables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Enable(void)\n{\n    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);\n}\n\n\n\n/**\n  \\brief   Disable SAU\n  \\details Disables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Disable(void)\n{\n    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);\n}\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_SAUFunctions */\n\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   System Tick Configuration (non-secure)\n  \\details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function TZ_SysTick_Config_NS is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n\n */\n__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                         /* Reload value impossible */\n  }\n\n  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */\n  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */\n  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                      SysTick_CTRL_TICKINT_Msk   |\n                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                           /* Function successful */\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM23_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm3.h",
    "content": "/**************************************************************************//**\n * @file     core_cm3.h\n * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File\n * @version  V5.1.0\n * @date     13. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM3_H_GENERIC\n#define __CORE_CM3_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_M3\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/*  CMSIS CM3 definitions */\n#define __CM3_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM3_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16U) | \\\n                                    __CM3_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                (3U)                                   /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    This core does not support an FPU at all\n*/\n#define __FPU_USED       0U\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM3_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM3_H_DEPENDANT\n#define __CORE_CM3_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM3_REV\n    #define __CM3_REV               0x0200U\n    #warning \"__CM3_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          3U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex_M3 */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */\n#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */\n    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */\n    uint32_t _reserved1:8;               /*!< bit: 16..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit */\n    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */\n#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */\n\n#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */\n#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */\n#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */\n    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[24U];\n  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RESERVED1[24U];\n  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[24U];\n  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[24U];\n  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[56U];\n  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\n        uint32_t RESERVED5[644U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */\n}  NVIC_Type;\n\n/* Software Triggered Interrupt Register Definitions */\n#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */\n#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */\n  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */\n  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */\n  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */\n  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */\n  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */\n  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */\n  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */\n  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */\n  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */\n  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */\n        uint32_t RESERVED0[5U];\n  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */\n#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Vector Table Offset Register Definitions */\n#if defined (__CM3_REV) && (__CM3_REV < 0x0201U)                   /* core r2p1 */\n#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */\n#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */\n\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */\n#else\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n#endif\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */\n#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */\n#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */\n#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */\n#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */\n#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\n\n#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */\n#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\n\n#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */\n#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */\n#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\n\n#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */\n#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\n\n#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */\n#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */\n#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */\n#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\n\n#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */\n#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\n\n#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */\n#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */\n\n/* SCB Configurable Fault Status Register Definitions */\n#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */\n#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\n\n#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */\n#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\n\n#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */\n#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\n\n/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */\n#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */\n\n#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */\n#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */\n\n#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */\n#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */\n\n#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */\n#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */\n\n#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */\n#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */\n\n/* BusFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */\n#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */\n\n#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */\n#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */\n\n#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */\n#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */\n\n#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */\n#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */\n\n#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */\n#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */\n\n#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */\n#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */\n\n/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */\n#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */\n\n#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */\n#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */\n\n#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */\n#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */\n\n#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */\n#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */\n\n#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */\n#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */\n\n#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */\n#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */\n\n/* SCB Hard Fault Status Register Definitions */\n#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */\n#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\n\n#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */\n#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\n\n#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */\n#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\n\n/* SCB Debug Fault Status Register Definitions */\n#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */\n#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\n\n#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */\n#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\n\n#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */\n#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\n\n#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */\n#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\n\n#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */\n#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */\n#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n#else\n        uint32_t RESERVED1[1U];\n#endif\n} SCnSCB_Type;\n\n/* Interrupt Controller Type Register Definitions */\n#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */\n#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */\n\n/* Auxiliary Control Register Definitions */\n#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)\n#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */\n#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */\n\n#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */\n#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */\n\n#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */\n#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */\n\n#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */\n#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */\n\n#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */\n#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */\n#endif\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\n  \\brief    Type definitions for the Instrumentation Trace Macrocell (ITM)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\n */\ntypedef struct\n{\n  __OM  union\n  {\n    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */\n    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */\n    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */\n  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */\n        uint32_t RESERVED0[864U];\n  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */\n        uint32_t RESERVED1[15U];\n  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */\n        uint32_t RESERVED2[15U];\n  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */\n        uint32_t RESERVED3[32U];\n        uint32_t RESERVED4[43U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */\n        uint32_t RESERVED5[6U];\n  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\n  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\n  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\n  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\n  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\n  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\n  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\n  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\n  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\n  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\n  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\n  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\n} ITM_Type;\n\n/* ITM Trace Privilege Register Definitions */\n#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */\n#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */\n\n/* ITM Trace Control Register Definitions */\n#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */\n#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\n\n#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */\n#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */\n\n#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */\n#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\n\n#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */\n#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */\n\n#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */\n#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\n\n#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */\n#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\n\n#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */\n#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\n\n#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */\n#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\n\n#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */\n#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */\n\n/* ITM Lock Status Register Definitions */\n#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */\n#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\n\n#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */\n#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\n\n#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */\n#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */\n\n/*@}*/ /* end of group CMSIS_ITM */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */\n  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */\n  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */\n  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */\n  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */\n  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */\n#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\n\n#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */\n#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\n\n#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */\n#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\n\n#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */\n#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\n\n#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */\n#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\n\n#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */\n#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\n\n#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */\n#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\n\n#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */\n#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\n\n#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */\n#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\n\n#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */\n#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\n\n#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */\n#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\n\n#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */\n#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\n\n#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */\n#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */\n\n/* DWT CPI Count Register Definitions */\n#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */\n#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */\n\n/* DWT Exception Overhead Count Register Definitions */\n#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */\n#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */\n\n/* DWT Sleep Count Register Definitions */\n#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */\n#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */\n\n/* DWT LSU Count Register Definitions */\n#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */\n#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */\n\n/* DWT Folded-instruction Count Register Definitions */\n#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */\n#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */\n\n/* DWT Comparator Mask Register Definitions */\n#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */\n#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */\n#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */\n\n#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */\n#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */\n#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */\n\n#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */\n#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */\n\n#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */\n#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */\n\n#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */\n#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */\n\n#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */\n#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */\n        uint32_t RESERVED3[759U];\n  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */\n  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */\n  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */\n        uint32_t RESERVED4[1U];\n  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */\n  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */\n  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\n        uint32_t RESERVED5[39U];\n  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */\n  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\n        uint32_t RESERVED7[8U];\n  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */\n#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI TRIGGER Register Definitions */\n#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */\n#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */\n\n/* TPI Integration ETM Data Register Definitions (FIFO0) */\n#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */\n#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */\n\n#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */\n#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */\n\n#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */\n#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */\n\n#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */\n#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */\n\n#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */\n#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */\n\n#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */\n#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */\n\n#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */\n#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */\n\n/* TPI ITATBCTR2 Register Definitions */\n#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */\n#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */\n\n#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */\n#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */\n\n/* TPI Integration ITM Data Register Definitions (FIFO1) */\n#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */\n#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */\n\n#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */\n#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */\n\n#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */\n#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */\n\n#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */\n#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */\n\n#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */\n#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */\n\n#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */\n#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */\n\n#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */\n#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */\n\n/* TPI ITATBCTR0 Register Definitions */\n#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */\n#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */\n\n#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */\n#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */\n\n/* TPI Integration Mode Control Register Definitions */\n#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */\n#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */\n#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */\n\n#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */\n#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */\n\n#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */\n#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */\n  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */\n  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */\n  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  4U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */\n#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */\n\n#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */\n#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */\n\n#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */\n#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */\n\n/* MPU Region Attribute and Size Register Definitions */\n#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */\n#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */\n\n#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */\n#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */\n\n#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */\n#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */\n\n#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */\n#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */\n\n#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */\n#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */\n\n#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */\n#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */\n\n#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */\n#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */\n\n#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */\n#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */\n\n#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */\n#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */\n\n#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */\n#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\n#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register Definitions */\n#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */\n#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\n\n#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */\n#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\n\n#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */\n#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\n\n#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */\n#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\n\n#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */\n#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */\n#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\n\n#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */\n#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\n\n#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */\n#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\n\n#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */\n#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\n\n#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */\n#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\n\n#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */\n#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */\n#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */\n#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */\n#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */\n#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */\n#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */\n#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */\n#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */\n\n#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */\n#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */\n#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */\n#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */\n#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */\n#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */\n#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */\n#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */\n  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */\n#endif\n\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Debug Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n   #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* The following EXC_RETURN values are saved the LR on exception entry */\n#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */\n#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */\n#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */\n\n\n/**\n  \\brief   Set Priority Grouping\n  \\details Sets the priority grouping field using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) );               /* Insert write key and priority group */\n  SCB->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping\n  \\details Reads the priority grouping field from the NVIC Interrupt Controller.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)\n{\n  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t vectors = (uint32_t )SCB->VTOR;\n  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t vectors = (uint32_t )SCB->VTOR;\n  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |\n                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\n                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv7.h\"\n\n#endif\n\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n    return 0U;           /* No FPU */\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n/* ##################################### Debug In/Output function ########################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_core_DebugFunctions ITM Functions\n  \\brief    Functions that access the ITM debug interface.\n  @{\n */\n\nextern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */\n#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \\ref ITM_RxBuffer is ready for next character. */\n\n\n/**\n  \\brief   ITM Send Character\n  \\details Transmits a character via the ITM channel 0, and\n           \\li Just returns when no debugger is connected that has booked the output.\n           \\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\n  \\param [in]     ch  Character to transmit.\n  \\returns            Character to transmit.\n */\n__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\n{\n  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */\n      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */\n  {\n    while (ITM->PORT[0U].u32 == 0UL)\n    {\n      __NOP();\n    }\n    ITM->PORT[0U].u8 = (uint8_t)ch;\n  }\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Receive Character\n  \\details Inputs a character via the external variable \\ref ITM_RxBuffer.\n  \\return             Received character.\n  \\return         -1  No character pending.\n */\n__STATIC_INLINE int32_t ITM_ReceiveChar (void)\n{\n  int32_t ch = -1;                           /* no character available */\n\n  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)\n  {\n    ch = ITM_RxBuffer;\n    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\n  }\n\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Check Character\n  \\details Checks whether a character is pending for reading in the variable \\ref ITM_RxBuffer.\n  \\return          0  No character available.\n  \\return          1  Character available.\n */\n__STATIC_INLINE int32_t ITM_CheckChar (void)\n{\n\n  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)\n  {\n    return (0);                              /* no character available */\n  }\n  else\n  {\n    return (1);                              /*    character available */\n  }\n}\n\n/*@} end of CMSIS_core_DebugFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM3_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm33.h",
    "content": "/**************************************************************************//**\n * @file     core_cm33.h\n * @brief    CMSIS Cortex-M33 Core Peripheral Access Layer Header File\n * @version  V5.1.0\n * @date     12. November 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM33_H_GENERIC\n#define __CORE_CM33_H_GENERIC\n\n#ifndef __ASSEMBLER__\n#include \n#endif\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_M33\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/*  CMSIS CM33 definitions */\n#define __CM33_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM33_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM33_CMSIS_VERSION       ((__CM33_CMSIS_VERSION_MAIN << 16U) | \\\n                                     __CM33_CMSIS_VERSION_SUB           )      /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                 (33U)                                       /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.\n*/\n#if defined ( __CC_ARM )\n  #if defined (__TARGET_FPU_VFP)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)\n    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined (__ARM_FP)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)\n    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)\n    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined (__ARMVFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)\n    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined (__TI_VFP_SUPPORT__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined (__FPU_VFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#endif\n\n#ifndef __ASSEMBLER__\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n#endif\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM33_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM33_H_DEPENDANT\n#define __CORE_CM33_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM33_REV\n    #define __CM33_REV                0x0000U\n    #warning \"__CM33_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __SAUREGION_PRESENT\n    #define __SAUREGION_PRESENT       0U\n    #warning \"__SAUREGION_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __DSP_PRESENT\n    #define __DSP_PRESENT             0U\n    #warning \"__DSP_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          3U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex_M33 */\n\n\n\n#ifndef __ASSEMBLER__\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n  - Core SAU Register\n  - Core FPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */\n#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */\n\n#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */\n#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */\n#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */\n\n#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */\n#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */\n#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */\n    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */\n    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */\n    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */\n#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */\n\n#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */\n#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */\n\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[16U];\n  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[16U];\n  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[16U];\n  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[16U];\n  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[16U];\n  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */\n        uint32_t RESERVED5[16U];\n  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\n        uint32_t RESERVED6[580U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */\n}  NVIC_Type;\n\n/* Software Triggered Interrupt Register Definitions */\n#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */\n#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */\n  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */\n  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */\n  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */\n  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */\n  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */\n  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */\n  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */\n  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */\n  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */\n  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */\n  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */\n  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */\n  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */\n  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */\n  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */\n  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */\n        uint32_t RESERVED3[92U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */\n        uint32_t RESERVED4[15U];\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */\n  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */\n        uint32_t RESERVED5[1U];\n  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */\n        uint32_t RESERVED6[1U];\n  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */\n  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */\n  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */\n  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */\n  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */\n  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */\n  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */\n  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */\n#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */\n\n#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */\n#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */\n\n#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */\n#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */\n#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */\n#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */\n\n#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */\n#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */\n\n#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */\n#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\n\n#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */\n#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */\n#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */\n#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */\n\n#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */\n#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */\n\n#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */\n#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */\n\n#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */\n#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */\n#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */\n\n#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */\n#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */\n\n#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */\n#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */\n\n#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */\n#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\n\n#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */\n#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\n\n#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */\n#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */\n#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\n\n#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */\n#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\n\n#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */\n#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */\n#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */\n#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */\n\n#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */\n#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */\n\n#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */\n#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\n\n#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */\n#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */\n\n#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */\n#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\n\n#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */\n#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */\n\n/* SCB Configurable Fault Status Register Definitions */\n#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */\n#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\n\n#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */\n#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\n\n#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */\n#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\n\n/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */\n#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */\n\n#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */\n#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */\n\n#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */\n#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */\n\n#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */\n#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */\n\n#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */\n#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */\n\n#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */\n#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */\n\n/* BusFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */\n#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */\n\n#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */\n#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */\n\n#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */\n#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */\n\n#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */\n#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */\n\n#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */\n#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */\n\n#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */\n#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */\n\n#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */\n#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */\n\n/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */\n#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */\n\n#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */\n#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */\n\n#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */\n#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */\n\n#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */\n#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */\n\n#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */\n#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */\n\n#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */\n#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */\n\n#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */\n#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */\n\n/* SCB Hard Fault Status Register Definitions */\n#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */\n#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\n\n#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */\n#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\n\n#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */\n#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\n\n/* SCB Debug Fault Status Register Definitions */\n#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */\n#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\n\n#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */\n#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\n\n#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */\n#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\n\n#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */\n#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\n\n#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */\n#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */\n\n/* SCB Non-Secure Access Control Register Definitions */\n#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */\n#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */\n\n#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */\n#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */\n\n#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */\n#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */\n\n/* SCB Cache Level ID Register Definitions */\n#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */\n#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */\n\n#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */\n#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */\n\n/* SCB Cache Type Register Definitions */\n#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */\n#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */\n\n#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */\n#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */\n\n#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */\n#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */\n\n#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */\n#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */\n\n#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */\n#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */\n\n/* SCB Cache Size ID Register Definitions */\n#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */\n#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */\n\n#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */\n#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */\n\n#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */\n#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */\n\n#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */\n#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */\n\n#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */\n#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */\n\n#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */\n#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */\n\n#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */\n#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */\n\n/* SCB Cache Size Selection Register Definitions */\n#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */\n#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */\n\n#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */\n#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */\n\n/* SCB Software Triggered Interrupt Register Definitions */\n#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */\n#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */\n\n/* SCB D-Cache Invalidate by Set-way Register Definitions */\n#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */\n#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */\n\n#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */\n#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */\n\n/* SCB D-Cache Clean by Set-way Register Definitions */\n#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */\n#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */\n\n#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */\n#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */\n\n/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */\n#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */\n#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */\n\n#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */\n#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */\n} SCnSCB_Type;\n\n/* Interrupt Controller Type Register Definitions */\n#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */\n#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\n  \\brief    Type definitions for the Instrumentation Trace Macrocell (ITM)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\n */\ntypedef struct\n{\n  __OM  union\n  {\n    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */\n    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */\n    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */\n  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */\n        uint32_t RESERVED0[864U];\n  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */\n        uint32_t RESERVED1[15U];\n  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */\n        uint32_t RESERVED2[15U];\n  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */\n        uint32_t RESERVED3[32U];\n        uint32_t RESERVED4[43U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */\n        uint32_t RESERVED5[1U];\n  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */\n        uint32_t RESERVED6[4U];\n  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\n  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\n  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\n  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\n  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\n  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\n  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\n  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\n  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\n  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\n  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\n  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\n} ITM_Type;\n\n/* ITM Stimulus Port Register Definitions */\n#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */\n#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */\n\n#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */\n#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */\n\n/* ITM Trace Privilege Register Definitions */\n#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */\n#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */\n\n/* ITM Trace Control Register Definitions */\n#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */\n#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\n\n#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */\n#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */\n\n#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */\n#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\n\n#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */\n#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */\n\n#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */\n#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */\n\n#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */\n#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\n\n#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */\n#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\n\n#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */\n#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\n\n#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */\n#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\n\n#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */\n#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */\n\n/* ITM Lock Status Register Definitions */\n#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */\n#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\n\n#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */\n#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\n\n#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */\n#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */\n\n/*@}*/ /* end of group CMSIS_ITM */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */\n  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */\n  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */\n  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */\n  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */\n  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n        uint32_t RESERVED3[1U];\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n        uint32_t RESERVED5[1U];\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED6[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n        uint32_t RESERVED7[1U];\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n        uint32_t RESERVED8[1U];\n  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */\n        uint32_t RESERVED9[1U];\n  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */\n        uint32_t RESERVED10[1U];\n  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */\n        uint32_t RESERVED11[1U];\n  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */\n        uint32_t RESERVED12[1U];\n  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */\n        uint32_t RESERVED13[1U];\n  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */\n        uint32_t RESERVED14[1U];\n  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */\n        uint32_t RESERVED15[1U];\n  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */\n        uint32_t RESERVED16[1U];\n  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */\n        uint32_t RESERVED17[1U];\n  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */\n        uint32_t RESERVED18[1U];\n  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */\n        uint32_t RESERVED19[1U];\n  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */\n        uint32_t RESERVED20[1U];\n  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */\n        uint32_t RESERVED21[1U];\n  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */\n        uint32_t RESERVED22[1U];\n  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */\n        uint32_t RESERVED23[1U];\n  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */\n        uint32_t RESERVED24[1U];\n  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */\n        uint32_t RESERVED25[1U];\n  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */\n        uint32_t RESERVED26[1U];\n  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */\n        uint32_t RESERVED27[1U];\n  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */\n        uint32_t RESERVED28[1U];\n  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */\n        uint32_t RESERVED29[1U];\n  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */\n        uint32_t RESERVED30[1U];\n  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */\n        uint32_t RESERVED31[1U];\n  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */\n        uint32_t RESERVED32[934U];\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */\n        uint32_t RESERVED33[1U];\n  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */\n#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */\n\n#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */\n#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\n\n#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */\n#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\n\n#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */\n#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\n\n#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */\n#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\n\n#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */\n#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\n\n#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */\n#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\n\n#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */\n#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\n\n#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */\n#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\n\n#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */\n#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\n\n#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */\n#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\n\n#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */\n#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\n\n#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */\n#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\n\n#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */\n#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */\n\n/* DWT CPI Count Register Definitions */\n#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */\n#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */\n\n/* DWT Exception Overhead Count Register Definitions */\n#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */\n#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */\n\n/* DWT Sleep Count Register Definitions */\n#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */\n#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */\n\n/* DWT LSU Count Register Definitions */\n#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */\n#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */\n\n/* DWT Folded-instruction Count Register Definitions */\n#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */\n#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */\n#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */\n\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */\n#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */\n\n#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */\n#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */\n        uint32_t RESERVED3[759U];\n  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */\n  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */\n  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */\n        uint32_t RESERVED4[1U];\n  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */\n  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */\n  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\n        uint32_t RESERVED5[39U];\n  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */\n  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\n        uint32_t RESERVED7[8U];\n  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */\n#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */\n#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI TRIGGER Register Definitions */\n#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */\n#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */\n\n/* TPI Integration Test FIFO Test Data 0 Register Definitions */\n#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */\n#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */\n\n#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */\n#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */\n#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */\n#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */\n#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */\n#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */\n#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */\n\n/* TPI Integration Test ATB Control Register 2 Register Definitions */\n#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */\n#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */\n\n#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */\n#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */\n\n#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */\n#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */\n\n#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */\n#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */\n\n/* TPI Integration Test FIFO Test Data 1 Register Definitions */\n#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */\n#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */\n#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */\n\n#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */\n#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */\n\n#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */\n#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */\n#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */\n#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */\n#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */\n\n/* TPI Integration Test ATB Control Register 0 Definitions */\n#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */\n#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */\n\n#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */\n#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */\n\n#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */\n#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */\n\n#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */\n#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */\n\n/* TPI Integration Mode Control Register Definitions */\n#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */\n#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */\n#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */\n\n#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */\n#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */\n  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */\n  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */\n  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */\n  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */\n  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */\n  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */\n        uint32_t RESERVED0[1];\n  union {\n  __IOM uint32_t MAIR[2];\n  struct {\n  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */\n  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */\n  };\n  };\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  4U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */\n#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */\n\n#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */\n#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */\n\n#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */\n#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */\n\n#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */\n#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */\n\n/* MPU Region Limit Address Register Definitions */\n#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */\n#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */\n\n#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */\n#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */\n\n#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */\n#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */\n\n/* MPU Memory Attribute Indirection Register 0 Definitions */\n#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */\n#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */\n\n#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */\n#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */\n\n#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */\n#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */\n\n#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */\n#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */\n\n/* MPU Memory Attribute Indirection Register 1 Definitions */\n#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */\n#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */\n\n#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */\n#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */\n\n#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */\n#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */\n\n#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */\n#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SAU     Security Attribution Unit (SAU)\n  \\brief    Type definitions for the Security Attribution Unit (SAU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Security Attribution Unit (SAU).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */\n#else\n        uint32_t RESERVED0[3];\n#endif\n  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */\n  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */\n} SAU_Type;\n\n/* SAU Control Register Definitions */\n#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */\n#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */\n\n#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */\n#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */\n\n/* SAU Type Register Definitions */\n#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */\n#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */\n\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n/* SAU Region Number Register Definitions */\n#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */\n#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */\n\n/* SAU Region Base Address Register Definitions */\n#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */\n#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */\n\n/* SAU Region Limit Address Register Definitions */\n#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */\n#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */\n\n#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */\n#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */\n\n#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */\n#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */\n\n#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */\n\n/* Secure Fault Status Register Definitions */\n#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */\n#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */\n\n#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */\n#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */\n\n#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */\n#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */\n\n#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */\n#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */\n\n#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */\n#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */\n\n#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */\n#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */\n\n#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */\n#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */\n\n#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */\n#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */\n\n/*@} end of group CMSIS_SAU */\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_FPU     Floating Point Unit (FPU)\n  \\brief    Type definitions for the Floating Point Unit (FPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Floating Point Unit (FPU).\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */\n  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */\n  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */\n} FPU_Type;\n\n/* Floating-Point Context Control Register Definitions */\n#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */\n#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */\n\n#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */\n#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */\n\n#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */\n#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */\n\n#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */\n#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */\n\n#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */\n#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */\n\n#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */\n#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */\n\n#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */\n#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */\n\n#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */\n#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */\n\n#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */\n#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */\n\n#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */\n#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */\n\n#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */\n#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */\n\n#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */\n#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */\n\n#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */\n#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */\n\n#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */\n#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */\n\n#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */\n#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */\n\n#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */\n#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */\n\n#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */\n#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */\n\n/* Floating-Point Context Address Register Definitions */\n#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */\n#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */\n\n/* Floating-Point Default Status Control Register Definitions */\n#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */\n#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */\n\n#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */\n#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */\n\n#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */\n#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */\n\n#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */\n#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */\n\n/* Media and FP Feature Register 0 Definitions */\n#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */\n#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */\n\n#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */\n#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */\n\n#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */\n#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */\n\n#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */\n#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */\n\n#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */\n#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */\n\n#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */\n#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */\n\n#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */\n#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */\n\n#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */\n#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */\n\n/* Media and FP Feature Register 1 Definitions */\n#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */\n#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */\n\n#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */\n#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */\n\n#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */\n#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */\n\n#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */\n#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */\n\n/*@} end of group CMSIS_FPU */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */\n  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */\n#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\n#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register Definitions */\n#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */\n#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\n\n#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */\n#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\n\n#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */\n#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\n\n#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */\n#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\n\n#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */\n#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */\n#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\n\n#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */\n#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\n\n#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */\n#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\n\n#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */\n#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\n\n#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */\n#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\n\n#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */\n#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/* Debug Authentication Control Register Definitions */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */\n\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */\n\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */\n\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */\n\n/* Debug Security Control and Status Register Definitions */\n#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */\n#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */\n\n#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */\n#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */\n\n#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */\n#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */\n  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */\n  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */\n  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */\n  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */\n  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */\n  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */\n  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */\n\n  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */\n  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */\n  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */\n  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */\n  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */\n  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */\n  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */\n  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */\n    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */\n  #endif\n\n  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */\n    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */\n  #endif\n\n  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */\n  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */\n  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */\n  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */\n  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */\n  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */\n\n  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */\n  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */\n  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */\n  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */\n  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */\n    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */\n  #endif\n\n  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */\n  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Debug Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */\n\n/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */\n#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */\n\n/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */\n#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */\n#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */\n#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */\n#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */\n#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */\n#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */\n#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */\n\n/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */\n#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */\n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */\n#else\n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */\n#endif\n\n\n/**\n  \\brief   Set Priority Grouping\n  \\details Sets the priority grouping field using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */\n  SCB->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping\n  \\details Reads the priority grouping field from the NVIC Interrupt Controller.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)\n{\n  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Get Interrupt Target State\n  \\details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n  \\return             1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Target State\n  \\details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Clear Interrupt Target State\n  \\details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |\n                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\n                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Set Priority Grouping (non-secure)\n  \\details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */\n  SCB_NS->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping (non-secure)\n  \\details Reads the priority grouping field from the non-secure NVIC when in secure state.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)\n{\n  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt (non-secure)\n  \\details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status (non-secure)\n  \\details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt (non-secure)\n  \\details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt (non-secure)\n  \\details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt (non-secure)\n  \\details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt (non-secure)\n  \\details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt (non-secure)\n  \\details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority (non-secure)\n  \\details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every non-secure processor exception.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority (non-secure)\n  \\details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv8.h\"\n\n#endif\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n  uint32_t mvfr0;\n\n  mvfr0 = FPU->MVFR0;\n  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)\n  {\n    return 2U;           /* Double + Single precision FPU */\n  }\n  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)\n  {\n    return 1U;           /* Single precision FPU */\n  }\n  else\n  {\n    return 0U;           /* No FPU */\n  }\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##########################   SAU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SAUFunctions SAU Functions\n  \\brief    Functions that configure the SAU.\n  @{\n */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n\n/**\n  \\brief   Enable SAU\n  \\details Enables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Enable(void)\n{\n    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);\n}\n\n\n\n/**\n  \\brief   Disable SAU\n  \\details Disables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Disable(void)\n{\n    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);\n}\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_SAUFunctions */\n\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   System Tick Configuration (non-secure)\n  \\details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function TZ_SysTick_Config_NS is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n\n */\n__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                         /* Reload value impossible */\n  }\n\n  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */\n  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */\n  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                      SysTick_CTRL_TICKINT_Msk   |\n                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                           /* Function successful */\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n/* ##################################### Debug In/Output function ########################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_core_DebugFunctions ITM Functions\n  \\brief    Functions that access the ITM debug interface.\n  @{\n */\n\nextern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */\n#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \\ref ITM_RxBuffer is ready for next character. */\n\n\n/**\n  \\brief   ITM Send Character\n  \\details Transmits a character via the ITM channel 0, and\n           \\li Just returns when no debugger is connected that has booked the output.\n           \\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\n  \\param [in]     ch  Character to transmit.\n  \\returns            Character to transmit.\n */\n__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\n{\n  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */\n      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */\n  {\n    while (ITM->PORT[0U].u32 == 0UL)\n    {\n      __NOP();\n    }\n    ITM->PORT[0U].u8 = (uint8_t)ch;\n  }\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Receive Character\n  \\details Inputs a character via the external variable \\ref ITM_RxBuffer.\n  \\return             Received character.\n  \\return         -1  No character pending.\n */\n__STATIC_INLINE int32_t ITM_ReceiveChar (void)\n{\n  int32_t ch = -1;                           /* no character available */\n\n  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)\n  {\n    ch = ITM_RxBuffer;\n    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\n  }\n\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Check Character\n  \\details Checks whether a character is pending for reading in the variable \\ref ITM_RxBuffer.\n  \\return          0  No character available.\n  \\return          1  Character available.\n */\n__STATIC_INLINE int32_t ITM_CheckChar (void)\n{\n\n  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)\n  {\n    return (0);                              /* no character available */\n  }\n  else\n  {\n    return (1);                              /*    character available */\n  }\n}\n\n/*@} end of CMSIS_core_DebugFunctions */\n\n\n\n#endif // !__ASSEMBLER__\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM33_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm35p.h",
    "content": "/**************************************************************************//**\n * @file     core_cm35p.h\n * @brief    CMSIS Cortex-M35P Core Peripheral Access Layer Header File\n * @version  V1.0.0\n * @date     12. November 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM35P_H_GENERIC\n#define __CORE_CM35P_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_M35P\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/*  CMSIS CM35P definitions */\n#define __CM35P_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM35P_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                   /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM35P_CMSIS_VERSION       ((__CM35P_CMSIS_VERSION_MAIN << 16U) | \\\n                                      __CM35P_CMSIS_VERSION_SUB           )    /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                 (35U)                                       /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.\n*/\n#if defined ( __CC_ARM )\n  #if defined (__TARGET_FPU_VFP)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)\n    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined (__ARM_FP)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)\n    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)\n    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined (__ARMVFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)\n    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)\n      #define __DSP_USED       1U\n    #else\n      #error \"Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)\"\n      #define __DSP_USED         0U\n    #endif\n  #else\n    #define __DSP_USED         0U\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined (__TI_VFP_SUPPORT__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined (__FPU_VFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM35P_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM35P_H_DEPENDANT\n#define __CORE_CM35P_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM35P_REV\n    #define __CM35P_REV               0x0000U\n    #warning \"__CM35P_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __SAUREGION_PRESENT\n    #define __SAUREGION_PRESENT       0U\n    #warning \"__SAUREGION_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __DSP_PRESENT\n    #define __DSP_PRESENT             0U\n    #warning \"__DSP_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          3U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex_M35P */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n  - Core SAU Register\n  - Core FPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */\n#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */\n\n#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */\n#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */\n#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */\n\n#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */\n#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */\n#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */\n    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */\n    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */\n    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */\n#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */\n\n#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */\n#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */\n\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[16U];\n  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[16U];\n  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[16U];\n  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[16U];\n  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[16U];\n  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */\n        uint32_t RESERVED5[16U];\n  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\n        uint32_t RESERVED6[580U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */\n}  NVIC_Type;\n\n/* Software Triggered Interrupt Register Definitions */\n#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */\n#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */\n  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */\n  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */\n  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */\n  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */\n  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */\n  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */\n  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */\n  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */\n  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */\n  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */\n  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */\n  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */\n  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */\n  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */\n  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */\n  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */\n        uint32_t RESERVED3[92U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */\n        uint32_t RESERVED4[15U];\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */\n  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */\n        uint32_t RESERVED5[1U];\n  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */\n        uint32_t RESERVED6[1U];\n  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */\n  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */\n  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */\n  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */\n  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */\n  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */\n  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */\n  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */\n#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */\n\n#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */\n#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */\n\n#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */\n#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */\n#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */\n#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */\n\n#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */\n#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */\n\n#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */\n#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\n\n#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */\n#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */\n#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */\n#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */\n\n#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */\n#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */\n\n#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */\n#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */\n\n#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */\n#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */\n#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */\n\n#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */\n#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */\n\n#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */\n#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */\n\n#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */\n#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\n\n#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */\n#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\n\n#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */\n#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */\n#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\n\n#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */\n#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\n\n#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */\n#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */\n#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */\n#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */\n\n#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */\n#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */\n\n#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */\n#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\n\n#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */\n#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */\n\n#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */\n#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\n\n#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */\n#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */\n\n/* SCB Configurable Fault Status Register Definitions */\n#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */\n#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\n\n#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */\n#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\n\n#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */\n#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\n\n/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */\n#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */\n\n#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */\n#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */\n\n#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */\n#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */\n\n#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */\n#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */\n\n#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */\n#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */\n\n#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */\n#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */\n\n/* BusFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */\n#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */\n\n#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */\n#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */\n\n#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */\n#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */\n\n#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */\n#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */\n\n#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */\n#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */\n\n#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */\n#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */\n\n#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */\n#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */\n\n/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */\n#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */\n\n#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */\n#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */\n\n#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */\n#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */\n\n#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */\n#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */\n\n#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */\n#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */\n\n#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */\n#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */\n\n#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */\n#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */\n\n/* SCB Hard Fault Status Register Definitions */\n#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */\n#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\n\n#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */\n#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\n\n#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */\n#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\n\n/* SCB Debug Fault Status Register Definitions */\n#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */\n#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\n\n#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */\n#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\n\n#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */\n#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\n\n#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */\n#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\n\n#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */\n#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */\n\n/* SCB Non-Secure Access Control Register Definitions */\n#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */\n#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */\n\n#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */\n#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */\n\n#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */\n#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */\n\n/* SCB Cache Level ID Register Definitions */\n#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */\n#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */\n\n#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */\n#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */\n\n/* SCB Cache Type Register Definitions */\n#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */\n#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */\n\n#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */\n#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */\n\n#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */\n#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */\n\n#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */\n#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */\n\n#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */\n#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */\n\n/* SCB Cache Size ID Register Definitions */\n#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */\n#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */\n\n#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */\n#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */\n\n#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */\n#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */\n\n#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */\n#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */\n\n#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */\n#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */\n\n#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */\n#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */\n\n#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */\n#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */\n\n/* SCB Cache Size Selection Register Definitions */\n#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */\n#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */\n\n#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */\n#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */\n\n/* SCB Software Triggered Interrupt Register Definitions */\n#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */\n#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */\n\n/* SCB D-Cache Invalidate by Set-way Register Definitions */\n#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */\n#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */\n\n#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */\n#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */\n\n/* SCB D-Cache Clean by Set-way Register Definitions */\n#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */\n#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */\n\n#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */\n#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */\n\n/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */\n#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */\n#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */\n\n#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */\n#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */\n} SCnSCB_Type;\n\n/* Interrupt Controller Type Register Definitions */\n#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */\n#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\n  \\brief    Type definitions for the Instrumentation Trace Macrocell (ITM)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\n */\ntypedef struct\n{\n  __OM  union\n  {\n    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */\n    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */\n    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */\n  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */\n        uint32_t RESERVED0[864U];\n  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */\n        uint32_t RESERVED1[15U];\n  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */\n        uint32_t RESERVED2[15U];\n  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */\n        uint32_t RESERVED3[32U];\n        uint32_t RESERVED4[43U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */\n        uint32_t RESERVED5[1U];\n  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */\n        uint32_t RESERVED6[4U];\n  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\n  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\n  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\n  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\n  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\n  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\n  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\n  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\n  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\n  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\n  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\n  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\n} ITM_Type;\n\n/* ITM Stimulus Port Register Definitions */\n#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */\n#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */\n\n#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */\n#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */\n\n/* ITM Trace Privilege Register Definitions */\n#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */\n#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */\n\n/* ITM Trace Control Register Definitions */\n#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */\n#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\n\n#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */\n#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */\n\n#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */\n#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\n\n#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */\n#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */\n\n#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */\n#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */\n\n#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */\n#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\n\n#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */\n#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\n\n#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */\n#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\n\n#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */\n#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\n\n#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */\n#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */\n\n/* ITM Lock Status Register Definitions */\n#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */\n#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\n\n#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */\n#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\n\n#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */\n#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */\n\n/*@}*/ /* end of group CMSIS_ITM */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */\n  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */\n  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */\n  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */\n  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */\n  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n        uint32_t RESERVED3[1U];\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n        uint32_t RESERVED5[1U];\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED6[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n        uint32_t RESERVED7[1U];\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n        uint32_t RESERVED8[1U];\n  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */\n        uint32_t RESERVED9[1U];\n  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */\n        uint32_t RESERVED10[1U];\n  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */\n        uint32_t RESERVED11[1U];\n  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */\n        uint32_t RESERVED12[1U];\n  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */\n        uint32_t RESERVED13[1U];\n  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */\n        uint32_t RESERVED14[1U];\n  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */\n        uint32_t RESERVED15[1U];\n  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */\n        uint32_t RESERVED16[1U];\n  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */\n        uint32_t RESERVED17[1U];\n  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */\n        uint32_t RESERVED18[1U];\n  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */\n        uint32_t RESERVED19[1U];\n  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */\n        uint32_t RESERVED20[1U];\n  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */\n        uint32_t RESERVED21[1U];\n  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */\n        uint32_t RESERVED22[1U];\n  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */\n        uint32_t RESERVED23[1U];\n  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */\n        uint32_t RESERVED24[1U];\n  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */\n        uint32_t RESERVED25[1U];\n  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */\n        uint32_t RESERVED26[1U];\n  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */\n        uint32_t RESERVED27[1U];\n  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */\n        uint32_t RESERVED28[1U];\n  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */\n        uint32_t RESERVED29[1U];\n  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */\n        uint32_t RESERVED30[1U];\n  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */\n        uint32_t RESERVED31[1U];\n  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */\n        uint32_t RESERVED32[934U];\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */\n        uint32_t RESERVED33[1U];\n  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */\n#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */\n\n#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */\n#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\n\n#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */\n#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\n\n#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */\n#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\n\n#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */\n#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\n\n#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */\n#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\n\n#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */\n#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\n\n#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */\n#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\n\n#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */\n#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\n\n#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */\n#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\n\n#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */\n#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\n\n#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */\n#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\n\n#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */\n#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\n\n#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */\n#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */\n\n/* DWT CPI Count Register Definitions */\n#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */\n#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */\n\n/* DWT Exception Overhead Count Register Definitions */\n#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */\n#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */\n\n/* DWT Sleep Count Register Definitions */\n#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */\n#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */\n\n/* DWT LSU Count Register Definitions */\n#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */\n#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */\n\n/* DWT Folded-instruction Count Register Definitions */\n#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */\n#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */\n#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */\n\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */\n#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */\n\n#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */\n#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */\n        uint32_t RESERVED3[759U];\n  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */\n  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */\n  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */\n        uint32_t RESERVED4[1U];\n  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */\n  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */\n  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\n        uint32_t RESERVED5[39U];\n  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */\n  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\n        uint32_t RESERVED7[8U];\n  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */\n#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */\n#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI TRIGGER Register Definitions */\n#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */\n#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */\n\n/* TPI Integration Test FIFO Test Data 0 Register Definitions */\n#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */\n#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */\n\n#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */\n#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */\n#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */\n#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */\n#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */\n#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */\n\n#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */\n#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */\n\n/* TPI Integration Test ATB Control Register 2 Register Definitions */\n#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */\n#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */\n\n#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */\n#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */\n\n#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */\n#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */\n\n#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */\n#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */\n\n/* TPI Integration Test FIFO Test Data 1 Register Definitions */\n#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */\n#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */\n#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */\n\n#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */\n#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */\n\n#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */\n#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */\n#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */\n#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */\n\n#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */\n#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */\n\n/* TPI Integration Test ATB Control Register 0 Definitions */\n#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */\n#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */\n\n#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */\n#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */\n\n#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */\n#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */\n\n#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */\n#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */\n\n/* TPI Integration Mode Control Register Definitions */\n#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */\n#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */\n#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */\n\n#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */\n#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */\n  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */\n  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */\n  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */\n  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */\n  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */\n  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */\n        uint32_t RESERVED0[1];\n  union {\n  __IOM uint32_t MAIR[2];\n  struct {\n  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */\n  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */\n  };\n  };\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  4U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */\n#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */\n\n#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */\n#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */\n\n#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */\n#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */\n\n#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */\n#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */\n\n/* MPU Region Limit Address Register Definitions */\n#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */\n#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */\n\n#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */\n#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */\n\n#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */\n#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */\n\n/* MPU Memory Attribute Indirection Register 0 Definitions */\n#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */\n#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */\n\n#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */\n#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */\n\n#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */\n#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */\n\n#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */\n#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */\n\n/* MPU Memory Attribute Indirection Register 1 Definitions */\n#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */\n#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */\n\n#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */\n#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */\n\n#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */\n#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */\n\n#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */\n#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SAU     Security Attribution Unit (SAU)\n  \\brief    Type definitions for the Security Attribution Unit (SAU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Security Attribution Unit (SAU).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */\n  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */\n#else\n        uint32_t RESERVED0[3];\n#endif\n  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */\n  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */\n} SAU_Type;\n\n/* SAU Control Register Definitions */\n#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */\n#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */\n\n#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */\n#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */\n\n/* SAU Type Register Definitions */\n#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */\n#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */\n\n#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)\n/* SAU Region Number Register Definitions */\n#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */\n#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */\n\n/* SAU Region Base Address Register Definitions */\n#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */\n#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */\n\n/* SAU Region Limit Address Register Definitions */\n#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */\n#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */\n\n#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */\n#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */\n\n#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */\n#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */\n\n#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */\n\n/* Secure Fault Status Register Definitions */\n#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */\n#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */\n\n#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */\n#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */\n\n#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */\n#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */\n\n#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */\n#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */\n\n#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */\n#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */\n\n#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */\n#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */\n\n#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */\n#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */\n\n#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */\n#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */\n\n/*@} end of group CMSIS_SAU */\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_FPU     Floating Point Unit (FPU)\n  \\brief    Type definitions for the Floating Point Unit (FPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Floating Point Unit (FPU).\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */\n  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */\n  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */\n} FPU_Type;\n\n/* Floating-Point Context Control Register Definitions */\n#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */\n#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */\n\n#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */\n#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */\n\n#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */\n#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */\n\n#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */\n#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */\n\n#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */\n#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */\n\n#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */\n#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */\n\n#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */\n#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */\n\n#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */\n#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */\n\n#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */\n#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */\n\n#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */\n#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */\n\n#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */\n#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */\n\n#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */\n#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */\n\n#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */\n#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */\n\n#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */\n#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */\n\n#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */\n#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */\n\n#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */\n#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */\n\n#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */\n#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */\n\n/* Floating-Point Context Address Register Definitions */\n#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */\n#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */\n\n/* Floating-Point Default Status Control Register Definitions */\n#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */\n#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */\n\n#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */\n#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */\n\n#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */\n#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */\n\n#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */\n#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */\n\n/* Media and FP Feature Register 0 Definitions */\n#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */\n#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */\n\n#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */\n#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */\n\n#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */\n#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */\n\n#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */\n#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */\n\n#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */\n#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */\n\n#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */\n#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */\n\n#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */\n#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */\n\n#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */\n#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */\n\n/* Media and FP Feature Register 1 Definitions */\n#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */\n#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */\n\n#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */\n#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */\n\n#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */\n#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */\n\n#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */\n#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */\n\n/*@} end of group CMSIS_FPU */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n        uint32_t RESERVED4[1U];\n  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */\n  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */\n#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\n#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register Definitions */\n#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */\n#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\n\n#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */\n#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\n\n#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */\n#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\n\n#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */\n#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\n\n#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */\n#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */\n#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\n\n#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */\n#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\n\n#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */\n#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\n\n#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */\n#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\n\n#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */\n#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\n\n#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */\n#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/* Debug Authentication Control Register Definitions */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */\n#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */\n\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */\n\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */\n#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */\n\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */\n#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */\n\n/* Debug Security Control and Status Register Definitions */\n#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */\n#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */\n\n#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */\n#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */\n\n#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */\n#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */\n  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */\n  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */\n  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */\n  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */\n  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */\n  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */\n  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */\n\n  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */\n  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */\n  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */\n  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */\n  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */\n  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */\n  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */\n  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */\n    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */\n  #endif\n\n  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */\n    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */\n  #endif\n\n  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */\n  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */\n  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */\n  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */\n  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */\n  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */\n\n  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */\n  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */\n  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */\n  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */\n  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */\n\n  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */\n    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */\n  #endif\n\n  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */\n  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Debug Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */\n\n/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ \n#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */\n\n/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */\n#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */\n#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */\n#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */\n#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */\n#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */\n#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */\n#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */\n\n/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */\n#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */\n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */\n#else \n#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */\n#endif\n\n\n/**\n  \\brief   Set Priority Grouping\n  \\details Sets the priority grouping field using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */\n  SCB->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping\n  \\details Reads the priority grouping field from the NVIC Interrupt Controller.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)\n{\n  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Get Interrupt Target State\n  \\details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n  \\return             1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Target State\n  \\details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Clear Interrupt Target State\n  \\details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  if interrupt is assigned to Secure\n                      1  if interrupt is assigned to Non Secure\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));\n    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |\n                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\n                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   Set Priority Grouping (non-secure)\n  \\details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */\n  SCB_NS->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping (non-secure)\n  \\details Reads the priority grouping field from the non-secure NVIC when in secure state.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)\n{\n  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt (non-secure)\n  \\details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status (non-secure)\n  \\details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt (non-secure)\n  \\details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt (non-secure)\n  \\details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt (non-secure)\n  \\details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt (non-secure)\n  \\details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt (non-secure)\n  \\details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority (non-secure)\n  \\details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every non-secure processor exception.\n */\n__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority (non-secure)\n  \\details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv8.h\"\n\n#endif\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n  uint32_t mvfr0;\n\n  mvfr0 = FPU->MVFR0;\n  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)\n  {\n    return 2U;           /* Double + Single precision FPU */\n  }\n  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)\n  {\n    return 1U;           /* Single precision FPU */\n  }\n  else\n  {\n    return 0U;           /* No FPU */\n  }\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##########################   SAU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SAUFunctions SAU Functions\n  \\brief    Functions that configure the SAU.\n  @{\n */\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n\n/**\n  \\brief   Enable SAU\n  \\details Enables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Enable(void)\n{\n    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);\n}\n\n\n\n/**\n  \\brief   Disable SAU\n  \\details Disables the Security Attribution Unit (SAU).\n */\n__STATIC_INLINE void TZ_SAU_Disable(void)\n{\n    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);\n}\n\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n/*@} end of CMSIS_Core_SAUFunctions */\n\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n/**\n  \\brief   System Tick Configuration (non-secure)\n  \\details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function TZ_SysTick_Config_NS is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n\n */\n__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                         /* Reload value impossible */\n  }\n\n  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */\n  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */\n  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                      SysTick_CTRL_TICKINT_Msk   |\n                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                           /* Function successful */\n}\n#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n/* ##################################### Debug In/Output function ########################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_core_DebugFunctions ITM Functions\n  \\brief    Functions that access the ITM debug interface.\n  @{\n */\n\nextern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */\n#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \\ref ITM_RxBuffer is ready for next character. */\n\n\n/**\n  \\brief   ITM Send Character\n  \\details Transmits a character via the ITM channel 0, and\n           \\li Just returns when no debugger is connected that has booked the output.\n           \\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\n  \\param [in]     ch  Character to transmit.\n  \\returns            Character to transmit.\n */\n__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\n{\n  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */\n      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */\n  {\n    while (ITM->PORT[0U].u32 == 0UL)\n    {\n      __NOP();\n    }\n    ITM->PORT[0U].u8 = (uint8_t)ch;\n  }\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Receive Character\n  \\details Inputs a character via the external variable \\ref ITM_RxBuffer.\n  \\return             Received character.\n  \\return         -1  No character pending.\n */\n__STATIC_INLINE int32_t ITM_ReceiveChar (void)\n{\n  int32_t ch = -1;                           /* no character available */\n\n  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)\n  {\n    ch = ITM_RxBuffer;\n    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\n  }\n\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Check Character\n  \\details Checks whether a character is pending for reading in the variable \\ref ITM_RxBuffer.\n  \\return          0  No character available.\n  \\return          1  Character available.\n */\n__STATIC_INLINE int32_t ITM_CheckChar (void)\n{\n\n  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)\n  {\n    return (0);                              /* no character available */\n  }\n  else\n  {\n    return (1);                              /*    character available */\n  }\n}\n\n/*@} end of CMSIS_core_DebugFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM35P_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm4.h",
    "content": "/**************************************************************************//**\n * @file     core_cm4.h\n * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File\n * @version  V5.1.0\n * @date     13. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM4_H_GENERIC\n#define __CORE_CM4_H_GENERIC\n\n#ifndef __ASSEMBLER__\n#include \n\n#ifndef __uint32_t_defined\ntypedef unsigned int uint32_t;\n# define __uint32_t_defined\n#endif\n\n#endif\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_M4\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/* CMSIS CM4 definitions */\n#define __CM4_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM4_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16U) | \\\n                                    __CM4_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                (4U)                                   /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.\n*/\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#endif\n\n#ifndef __ASSEMBLER__\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM4_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM4_H_DEPENDANT\n#define __CORE_CM4_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM4_REV\n    #define __CM4_REV               0x0000U\n    #warning \"__CM4_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          3U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex_M4 */\n\n\n#ifndef __ASSEMBLER__\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n  - Core FPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */\n#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */\n\n#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */\n#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */\n    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit */\n    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */\n#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */\n\n#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */\n#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */\n#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */\n\n#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */\n#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */\n    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */\n    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */\n#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */\n\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[24U];\n  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RESERVED1[24U];\n  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[24U];\n  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[24U];\n  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[56U];\n  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\n        uint32_t RESERVED5[644U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */\n}  NVIC_Type;\n\n/* Software Triggered Interrupt Register Definitions */\n#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */\n#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */\n  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */\n  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */\n  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */\n  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */\n  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */\n  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */\n  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */\n  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */\n  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */\n  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */\n        uint32_t RESERVED0[5U];\n  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */\n#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */\n#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */\n#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */\n#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */\n#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */\n#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\n\n#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */\n#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\n\n#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */\n#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */\n#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\n\n#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */\n#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\n\n#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */\n#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */\n#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */\n#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\n\n#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */\n#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\n\n#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */\n#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */\n\n/* SCB Configurable Fault Status Register Definitions */\n#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */\n#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\n\n#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */\n#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\n\n#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */\n#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\n\n/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */\n#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */\n\n#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */\n#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */\n\n#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */\n#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */\n\n#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */\n#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */\n\n#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */\n#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */\n\n#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */\n#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */\n\n/* BusFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */\n#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */\n\n#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */\n#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */\n\n#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */\n#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */\n\n#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */\n#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */\n\n#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */\n#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */\n\n#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */\n#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */\n\n#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */\n#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */\n\n/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */\n#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */\n\n#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */\n#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */\n\n#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */\n#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */\n\n#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */\n#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */\n\n#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */\n#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */\n\n#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */\n#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */\n\n/* SCB Hard Fault Status Register Definitions */\n#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */\n#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\n\n#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */\n#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\n\n#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */\n#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\n\n/* SCB Debug Fault Status Register Definitions */\n#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */\n#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\n\n#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */\n#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\n\n#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */\n#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\n\n#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */\n#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\n\n#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */\n#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n} SCnSCB_Type;\n\n/* Interrupt Controller Type Register Definitions */\n#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */\n#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */\n\n/* Auxiliary Control Register Definitions */\n#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */\n#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */\n\n#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */\n#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */\n\n#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */\n#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */\n\n#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */\n#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */\n\n#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */\n#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\n  \\brief    Type definitions for the Instrumentation Trace Macrocell (ITM)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\n */\ntypedef struct\n{\n  __OM  union\n  {\n    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */\n    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */\n    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */\n  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */\n        uint32_t RESERVED0[864U];\n  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */\n        uint32_t RESERVED1[15U];\n  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */\n        uint32_t RESERVED2[15U];\n  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */\n        uint32_t RESERVED3[32U];\n        uint32_t RESERVED4[43U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */\n        uint32_t RESERVED5[6U];\n  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\n  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\n  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\n  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\n  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\n  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\n  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\n  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\n  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\n  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\n  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\n  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\n} ITM_Type;\n\n/* ITM Trace Privilege Register Definitions */\n#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */\n#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */\n\n/* ITM Trace Control Register Definitions */\n#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */\n#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\n\n#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */\n#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */\n\n#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */\n#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\n\n#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */\n#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */\n\n#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */\n#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\n\n#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */\n#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\n\n#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */\n#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\n\n#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */\n#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\n\n#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */\n#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */\n\n/* ITM Lock Status Register Definitions */\n#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */\n#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\n\n#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */\n#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\n\n#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */\n#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */\n\n/*@}*/ /* end of group CMSIS_ITM */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */\n  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */\n  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */\n  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */\n  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */\n  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */\n#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\n\n#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */\n#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\n\n#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */\n#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\n\n#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */\n#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\n\n#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */\n#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\n\n#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */\n#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\n\n#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */\n#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\n\n#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */\n#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\n\n#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */\n#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\n\n#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */\n#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\n\n#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */\n#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\n\n#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */\n#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\n\n#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */\n#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */\n\n/* DWT CPI Count Register Definitions */\n#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */\n#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */\n\n/* DWT Exception Overhead Count Register Definitions */\n#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */\n#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */\n\n/* DWT Sleep Count Register Definitions */\n#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */\n#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */\n\n/* DWT LSU Count Register Definitions */\n#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */\n#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */\n\n/* DWT Folded-instruction Count Register Definitions */\n#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */\n#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */\n\n/* DWT Comparator Mask Register Definitions */\n#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */\n#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */\n#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */\n\n#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */\n#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */\n#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */\n\n#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */\n#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */\n\n#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */\n#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */\n\n#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */\n#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */\n\n#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */\n#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */\n        uint32_t RESERVED3[759U];\n  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */\n  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */\n  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */\n        uint32_t RESERVED4[1U];\n  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */\n  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */\n  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\n        uint32_t RESERVED5[39U];\n  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */\n  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\n        uint32_t RESERVED7[8U];\n  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */\n#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI TRIGGER Register Definitions */\n#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */\n#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */\n\n/* TPI Integration ETM Data Register Definitions (FIFO0) */\n#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */\n#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */\n\n#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */\n#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */\n\n#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */\n#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */\n\n#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */\n#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */\n\n#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */\n#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */\n\n#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */\n#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */\n\n#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */\n#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */\n\n/* TPI ITATBCTR2 Register Definitions */\n#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */\n#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */\n\n#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */\n#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */\n\n/* TPI Integration ITM Data Register Definitions (FIFO1) */\n#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */\n#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */\n\n#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */\n#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */\n\n#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */\n#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */\n\n#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */\n#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */\n\n#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */\n#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */\n\n#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */\n#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */\n\n#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */\n#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */\n\n/* TPI ITATBCTR0 Register Definitions */\n#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */\n#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */\n\n#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */\n#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */\n\n/* TPI Integration Mode Control Register Definitions */\n#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */\n#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */\n#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */\n\n#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */\n#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */\n\n#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */\n#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */\n  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */\n  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */\n  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  4U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */\n#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */\n\n#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */\n#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */\n\n#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */\n#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */\n\n/* MPU Region Attribute and Size Register Definitions */\n#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */\n#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */\n\n#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */\n#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */\n\n#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */\n#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */\n\n#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */\n#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */\n\n#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */\n#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */\n\n#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */\n#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */\n\n#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */\n#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */\n\n#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */\n#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */\n\n#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */\n#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */\n\n#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */\n#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_FPU     Floating Point Unit (FPU)\n  \\brief    Type definitions for the Floating Point Unit (FPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Floating Point Unit (FPU).\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */\n  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */\n  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */\n  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */\n} FPU_Type;\n\n/* Floating-Point Context Control Register Definitions */\n#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */\n#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */\n\n#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */\n#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */\n\n#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */\n#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */\n\n#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */\n#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */\n\n#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */\n#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */\n\n#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */\n#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */\n\n#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */\n#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */\n\n#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */\n#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */\n\n#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */\n#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */\n\n/* Floating-Point Context Address Register Definitions */\n#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */\n#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */\n\n/* Floating-Point Default Status Control Register Definitions */\n#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */\n#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */\n\n#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */\n#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */\n\n#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */\n#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */\n\n#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */\n#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */\n\n/* Media and FP Feature Register 0 Definitions */\n#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */\n#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */\n\n#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */\n#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */\n\n#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */\n#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */\n\n#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */\n#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */\n\n#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */\n#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */\n\n#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */\n#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */\n\n#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */\n#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */\n\n#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */\n#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */\n\n/* Media and FP Feature Register 1 Definitions */\n#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */\n#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */\n\n#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */\n#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */\n\n#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */\n#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */\n\n#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */\n#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */\n\n/* Media and FP Feature Register 2 Definitions */\n\n#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */\n#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */\n\n/*@} end of group CMSIS_FPU */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\n#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register Definitions */\n#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */\n#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\n\n#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */\n#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\n\n#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */\n#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\n\n#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */\n#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\n\n#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */\n#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */\n#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\n\n#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */\n#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\n\n#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */\n#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\n\n#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */\n#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\n\n#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */\n#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\n\n#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */\n#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */\n#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */\n#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */\n#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */\n#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */\n#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */\n#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */\n#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */\n\n#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */\n#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */\n#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */\n#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */\n#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */\n#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */\n#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */\n#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */\n  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */\n#endif\n\n#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */\n#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */\n\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Debug Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* The following EXC_RETURN values are saved the LR on exception entry */\n#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */\n#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */\n#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */\n#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     /* return to Handler mode, uses MSP after return, restore floating-point state */\n#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after return, restore floating-point state  */\n#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after return, restore floating-point state  */\n\n\n/**\n  \\brief   Set Priority Grouping\n  \\details Sets the priority grouping field using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */\n  SCB->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping\n  \\details Reads the priority grouping field from the NVIC Interrupt Controller.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)\n{\n  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t vectors = (uint32_t )SCB->VTOR;\n  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t vectors = (uint32_t )SCB->VTOR;\n  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |\n                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\n                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv7.h\"\n\n#endif\n\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n  uint32_t mvfr0;\n\n  mvfr0 = FPU->MVFR0;\n  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)\n  {\n    return 1U;           /* Single precision FPU */\n  }\n  else\n  {\n    return 0U;           /* No FPU */\n  }\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n/* ##################################### Debug In/Output function ########################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_core_DebugFunctions ITM Functions\n  \\brief    Functions that access the ITM debug interface.\n  @{\n */\n\nextern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */\n#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \\ref ITM_RxBuffer is ready for next character. */\n\n\n/**\n  \\brief   ITM Send Character\n  \\details Transmits a character via the ITM channel 0, and\n           \\li Just returns when no debugger is connected that has booked the output.\n           \\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\n  \\param [in]     ch  Character to transmit.\n  \\returns            Character to transmit.\n */\n__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\n{\n  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */\n      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */\n  {\n    while (ITM->PORT[0U].u32 == 0UL)\n    {\n      __NOP();\n    }\n    ITM->PORT[0U].u8 = (uint8_t)ch;\n  }\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Receive Character\n  \\details Inputs a character via the external variable \\ref ITM_RxBuffer.\n  \\return             Received character.\n  \\return         -1  No character pending.\n */\n__STATIC_INLINE int32_t ITM_ReceiveChar (void)\n{\n  int32_t ch = -1;                           /* no character available */\n\n  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)\n  {\n    ch = ITM_RxBuffer;\n    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\n  }\n\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Check Character\n  \\details Checks whether a character is pending for reading in the variable \\ref ITM_RxBuffer.\n  \\return          0  No character available.\n  \\return          1  Character available.\n */\n__STATIC_INLINE int32_t ITM_CheckChar (void)\n{\n\n  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)\n  {\n    return (0);                              /* no character available */\n  }\n  else\n  {\n    return (1);                              /*    character available */\n  }\n}\n\n/*@} end of CMSIS_core_DebugFunctions */\n\n#endif // !__ASSEMBLER__\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM4_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_cm7.h",
    "content": "/**************************************************************************//**\n * @file     core_cm7.h\n * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File\n * @version  V5.1.0\n * @date     13. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_CM7_H_GENERIC\n#define __CORE_CM7_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup Cortex_M7\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/* CMSIS CM7 definitions */\n#define __CM7_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __CM7_CMSIS_VERSION_SUB   ( __CM_CMSIS_VERSION_SUB)                  /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __CM7_CMSIS_VERSION       ((__CM7_CMSIS_VERSION_MAIN << 16U) | \\\n                                    __CM7_CMSIS_VERSION_SUB           )      /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_M                (7U)                                       /*!< Cortex-M Core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.\n*/\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #warning \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)\n      #define __FPU_USED       1U\n    #else\n      #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n      #define __FPU_USED       0U\n    #endif\n  #else\n    #define __FPU_USED         0U\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM7_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_CM7_H_DEPENDANT\n#define __CORE_CM7_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __CM7_REV\n    #define __CM7_REV               0x0000U\n    #warning \"__CM7_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __FPU_PRESENT\n    #define __FPU_PRESENT             0U\n    #warning \"__FPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __ICACHE_PRESENT\n    #define __ICACHE_PRESENT          0U\n    #warning \"__ICACHE_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __DCACHE_PRESENT\n    #define __DCACHE_PRESENT          0U\n    #warning \"__DCACHE_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __DTCM_PRESENT\n    #define __DTCM_PRESENT            0U\n    #warning \"__DTCM_PRESENT        not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          3U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group Cortex_M7 */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n  - Core FPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */\n#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */\n\n#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */\n#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */\n    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */\n    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */\n    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit */\n    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */\n#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */\n\n#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */\n#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */\n#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */\n\n#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */\n#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */\n    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */\n    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */\n#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */\n\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[24U];\n  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RESERVED1[24U];\n  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[24U];\n  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[24U];\n  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[56U];\n  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\n        uint32_t RESERVED5[644U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */\n}  NVIC_Type;\n\n/* Software Triggered Interrupt Register Definitions */\n#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */\n#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */\n  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */\n  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */\n  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */\n  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */\n  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */\n  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */\n  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */\n  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */\n  __IM  uint32_t ID_MFR[4U];             /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */\n  __IM  uint32_t ID_ISAR[5U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */\n  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */\n  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */\n  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */\n  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */\n        uint32_t RESERVED3[93U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */\n        uint32_t RESERVED4[15U];\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */\n  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */\n        uint32_t RESERVED5[1U];\n  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */\n        uint32_t RESERVED6[1U];\n  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */\n  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */\n  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */\n  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */\n  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */\n  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */\n  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */\n  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */\n        uint32_t RESERVED7[6U];\n  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */\n  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */\n  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */\n  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */\n  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */\n        uint32_t RESERVED8[1U];\n  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */\n#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */\n#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */\n#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_BP_Pos                      18U                                           /*!< SCB CCR: Branch prediction enable bit Position */\n#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: Branch prediction enable bit Mask */\n\n#define SCB_CCR_IC_Pos                      17U                                           /*!< SCB CCR: Instruction cache enable bit Position */\n#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: Instruction cache enable bit Mask */\n\n#define SCB_CCR_DC_Pos                      16U                                           /*!< SCB CCR: Cache enable bit Position */\n#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: Cache enable bit Mask */\n\n#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */\n#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */\n#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */\n#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\n\n#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */\n#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\n\n#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */\n#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */\n#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\n\n#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */\n#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\n\n#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */\n#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */\n#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */\n#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\n\n#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */\n#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\n\n#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */\n#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */\n\n/* SCB Configurable Fault Status Register Definitions */\n#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */\n#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\n\n#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */\n#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\n\n#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */\n#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\n\n/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */\n#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */\n\n#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */\n#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */\n\n#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */\n#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */\n\n#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */\n#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */\n\n#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */\n#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */\n\n#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */\n#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */\n\n/* BusFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */\n#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */\n\n#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */\n#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */\n\n#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */\n#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */\n\n#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */\n#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */\n\n#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */\n#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */\n\n#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */\n#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */\n\n#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */\n#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */\n\n/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */\n#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */\n\n#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */\n#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */\n\n#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */\n#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */\n\n#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */\n#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */\n\n#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */\n#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */\n\n#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */\n#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */\n\n/* SCB Hard Fault Status Register Definitions */\n#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */\n#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\n\n#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */\n#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\n\n#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */\n#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\n\n/* SCB Debug Fault Status Register Definitions */\n#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */\n#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\n\n#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */\n#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\n\n#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */\n#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\n\n#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */\n#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\n\n#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */\n#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */\n\n/* SCB Cache Level ID Register Definitions */\n#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */\n#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */\n\n#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */\n#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */\n\n/* SCB Cache Type Register Definitions */\n#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */\n#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */\n\n#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */\n#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */\n\n#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */\n#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */\n\n#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */\n#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */\n\n#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */\n#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */\n\n/* SCB Cache Size ID Register Definitions */\n#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */\n#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */\n\n#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */\n#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */\n\n#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */\n#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */\n\n#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */\n#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */\n\n#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */\n#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */\n\n#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */\n#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */\n\n#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */\n#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */\n\n/* SCB Cache Size Selection Register Definitions */\n#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */\n#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */\n\n#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */\n#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */\n\n/* SCB Software Triggered Interrupt Register Definitions */\n#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */\n#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */\n\n/* SCB D-Cache Invalidate by Set-way Register Definitions */\n#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */\n#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */\n\n#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */\n#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */\n\n/* SCB D-Cache Clean by Set-way Register Definitions */\n#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */\n#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */\n\n#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */\n#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */\n\n/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */\n#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */\n#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */\n\n#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */\n#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */\n\n/* Instruction Tightly-Coupled Memory Control Register Definitions */\n#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */\n#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */\n\n#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */\n#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */\n\n#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */\n#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */\n\n#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */\n#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */\n\n/* Data Tightly-Coupled Memory Control Register Definitions */\n#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */\n#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */\n\n#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */\n#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */\n\n#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */\n#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */\n\n#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */\n#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */\n\n/* AHBP Control Register Definitions */\n#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */\n#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */\n\n#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */\n#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */\n\n/* L1 Cache Control Register Definitions */\n#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */\n#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */\n\n#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */\n#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */\n\n#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */\n#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */\n\n/* AHBS Control Register Definitions */\n#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */\n#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */\n\n#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */\n#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */\n\n#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/\n#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */\n\n/* Auxiliary Bus Fault Status Register Definitions */\n#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/\n#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */\n\n#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/\n#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */\n\n#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/\n#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */\n\n#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/\n#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */\n\n#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/\n#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */\n\n#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/\n#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n} SCnSCB_Type;\n\n/* Interrupt Controller Type Register Definitions */\n#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */\n#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */\n\n/* Auxiliary Control Register Definitions */\n#define SCnSCB_ACTLR_DISDYNADD_Pos         26U                                         /*!< ACTLR: DISDYNADD Position */\n#define SCnSCB_ACTLR_DISDYNADD_Msk         (1UL << SCnSCB_ACTLR_DISDYNADD_Pos)         /*!< ACTLR: DISDYNADD Mask */\n\n#define SCnSCB_ACTLR_DISISSCH1_Pos         21U                                         /*!< ACTLR: DISISSCH1 Position */\n#define SCnSCB_ACTLR_DISISSCH1_Msk         (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos)      /*!< ACTLR: DISISSCH1 Mask */\n\n#define SCnSCB_ACTLR_DISDI_Pos             16U                                         /*!< ACTLR: DISDI Position */\n#define SCnSCB_ACTLR_DISDI_Msk             (0x1FUL << SCnSCB_ACTLR_DISDI_Pos)          /*!< ACTLR: DISDI Mask */\n\n#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos     15U                                         /*!< ACTLR: DISCRITAXIRUR Position */\n#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk     (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos)     /*!< ACTLR: DISCRITAXIRUR Mask */\n\n#define SCnSCB_ACTLR_DISBTACALLOC_Pos      14U                                         /*!< ACTLR: DISBTACALLOC Position */\n#define SCnSCB_ACTLR_DISBTACALLOC_Msk      (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos)      /*!< ACTLR: DISBTACALLOC Mask */\n\n#define SCnSCB_ACTLR_DISBTACREAD_Pos       13U                                         /*!< ACTLR: DISBTACREAD Position */\n#define SCnSCB_ACTLR_DISBTACREAD_Msk       (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos)       /*!< ACTLR: DISBTACREAD Mask */\n\n#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12U                                         /*!< ACTLR: DISITMATBFLUSH Position */\n#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk    (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)    /*!< ACTLR: DISITMATBFLUSH Mask */\n\n#define SCnSCB_ACTLR_DISRAMODE_Pos         11U                                         /*!< ACTLR: DISRAMODE Position */\n#define SCnSCB_ACTLR_DISRAMODE_Msk         (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)         /*!< ACTLR: DISRAMODE Mask */\n\n#define SCnSCB_ACTLR_FPEXCODIS_Pos         10U                                         /*!< ACTLR: FPEXCODIS Position */\n#define SCnSCB_ACTLR_FPEXCODIS_Msk         (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)         /*!< ACTLR: FPEXCODIS Mask */\n\n#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */\n#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */\n\n#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */\n#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\n  \\brief    Type definitions for the Instrumentation Trace Macrocell (ITM)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\n */\ntypedef struct\n{\n  __OM  union\n  {\n    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */\n    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */\n    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */\n  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */\n        uint32_t RESERVED0[864U];\n  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */\n        uint32_t RESERVED1[15U];\n  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */\n        uint32_t RESERVED2[15U];\n  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */\n        uint32_t RESERVED3[32U];\n        uint32_t RESERVED4[43U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */\n        uint32_t RESERVED5[6U];\n  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\n  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\n  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\n  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\n  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\n  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\n  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\n  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\n  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\n  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\n  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\n  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\n} ITM_Type;\n\n/* ITM Trace Privilege Register Definitions */\n#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */\n#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */\n\n/* ITM Trace Control Register Definitions */\n#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */\n#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\n\n#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */\n#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */\n\n#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */\n#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\n\n#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */\n#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */\n\n#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */\n#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\n\n#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */\n#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\n\n#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */\n#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\n\n#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */\n#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\n\n#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */\n#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */\n\n/* ITM Lock Status Register Definitions */\n#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */\n#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\n\n#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */\n#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\n\n#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */\n#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */\n\n/*@}*/ /* end of group CMSIS_ITM */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */\n  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */\n  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */\n  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */\n  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */\n  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n        uint32_t RESERVED3[981U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 (  W)  Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */\n#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\n\n#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */\n#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\n\n#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */\n#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\n\n#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */\n#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\n\n#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */\n#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\n\n#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */\n#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\n\n#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */\n#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\n\n#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */\n#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\n\n#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */\n#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\n\n#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */\n#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\n\n#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */\n#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\n\n#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */\n#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\n\n#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */\n#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */\n\n/* DWT CPI Count Register Definitions */\n#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */\n#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */\n\n/* DWT Exception Overhead Count Register Definitions */\n#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */\n#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */\n\n/* DWT Sleep Count Register Definitions */\n#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */\n#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */\n\n/* DWT LSU Count Register Definitions */\n#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */\n#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */\n\n/* DWT Folded-instruction Count Register Definitions */\n#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */\n#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */\n\n/* DWT Comparator Mask Register Definitions */\n#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */\n#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */\n#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */\n\n#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */\n#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */\n#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */\n\n#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */\n#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */\n\n#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */\n#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */\n\n#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */\n#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */\n\n#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */\n#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */\n        uint32_t RESERVED3[759U];\n  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */\n  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */\n  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */\n        uint32_t RESERVED4[1U];\n  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */\n  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */\n  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\n        uint32_t RESERVED5[39U];\n  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */\n  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\n        uint32_t RESERVED7[8U];\n  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */\n#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI TRIGGER Register Definitions */\n#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */\n#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */\n\n/* TPI Integration ETM Data Register Definitions (FIFO0) */\n#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */\n#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */\n\n#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */\n#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */\n\n#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */\n#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */\n\n#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */\n#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */\n\n#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */\n#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */\n\n#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */\n#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */\n\n#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */\n#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */\n\n/* TPI ITATBCTR2 Register Definitions */\n#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */\n#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */\n\n#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */\n#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */\n\n/* TPI Integration ITM Data Register Definitions (FIFO1) */\n#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */\n#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */\n\n#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */\n#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */\n\n#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */\n#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */\n\n#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */\n#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */\n\n#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */\n#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */\n\n#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */\n#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */\n\n#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */\n#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */\n\n/* TPI ITATBCTR0 Register Definitions */\n#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */\n#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */\n\n#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */\n#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */\n\n/* TPI Integration Mode Control Register Definitions */\n#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */\n#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */\n#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */\n\n#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */\n#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */\n\n#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */\n#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */\n  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */\n  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */\n  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */\n} MPU_Type;\n\n#define MPU_TYPE_RALIASES                  4U\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */\n#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */\n\n#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */\n#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */\n\n#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */\n#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */\n\n/* MPU Region Attribute and Size Register Definitions */\n#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */\n#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */\n\n#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */\n#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */\n\n#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */\n#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */\n\n#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */\n#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */\n\n#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */\n#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */\n\n#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */\n#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */\n\n#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */\n#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */\n\n#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */\n#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */\n\n#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */\n#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */\n\n#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */\n#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_FPU     Floating Point Unit (FPU)\n  \\brief    Type definitions for the Floating Point Unit (FPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Floating Point Unit (FPU).\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */\n  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */\n  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */\n  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */\n  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */\n  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */\n} FPU_Type;\n\n/* Floating-Point Context Control Register Definitions */\n#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */\n#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */\n\n#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */\n#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */\n\n#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */\n#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */\n\n#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */\n#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */\n\n#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */\n#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */\n\n#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */\n#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */\n\n#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */\n#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */\n\n#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */\n#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */\n\n#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */\n#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */\n\n/* Floating-Point Context Address Register Definitions */\n#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */\n#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */\n\n/* Floating-Point Default Status Control Register Definitions */\n#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */\n#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */\n\n#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */\n#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */\n\n#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */\n#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */\n\n#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */\n#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */\n\n/* Media and FP Feature Register 0 Definitions */\n#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */\n#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */\n\n#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */\n#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */\n\n#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */\n#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */\n\n#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */\n#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */\n\n#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */\n#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */\n\n#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */\n#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */\n\n#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */\n#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */\n\n#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */\n#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */\n\n/* Media and FP Feature Register 1 Definitions */\n#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */\n#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */\n\n#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */\n#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */\n\n#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */\n#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */\n\n#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */\n#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */\n\n/* Media and FP Feature Register 2 Definitions */\n\n#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */\n#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */\n\n/*@} end of group CMSIS_FPU */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\n#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register Definitions */\n#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */\n#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\n\n#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */\n#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\n\n#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */\n#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\n\n#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */\n#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\n\n#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */\n#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */\n#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\n\n#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */\n#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\n\n#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */\n#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\n\n#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */\n#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\n\n#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */\n#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\n\n#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */\n#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */\n#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */\n#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */\n#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */\n#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */\n#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */\n#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */\n#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */\n\n#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */\n#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */\n#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */\n#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */\n#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */\n#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */\n#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */\n#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */\n  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */\n#endif\n\n#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */\n#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */\n\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Debug Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* The following EXC_RETURN values are saved the LR on exception entry */\n#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */\n#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */\n#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */\n#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     /* return to Handler mode, uses MSP after return, restore floating-point state */\n#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after return, restore floating-point state  */\n#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after return, restore floating-point state  */\n\n\n/**\n  \\brief   Set Priority Grouping\n  \\details Sets the priority grouping field using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */\n  SCB->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping\n  \\details Reads the priority grouping field from the NVIC Interrupt Controller.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)\n{\n  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]                >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t vectors = (uint32_t )SCB->VTOR;\n  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t vectors = (uint32_t )SCB->VTOR;\n  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |\n                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\n                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n\n/* ##########################  MPU functions  #################################### */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n\n#include \"mpu_armv7.h\"\n\n#endif\n\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n  uint32_t mvfr0;\n\n  mvfr0 = SCB->MVFR0;\n  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)\n  {\n    return 2U;           /* Double + Single precision FPU */\n  }\n  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)\n  {\n    return 1U;           /* Single precision FPU */\n  }\n  else\n  {\n    return 0U;           /* No FPU */\n  }\n}\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##########################  Cache functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_CacheFunctions Cache Functions\n  \\brief    Functions that configure Instruction and Data cache.\n  @{\n */\n\n/* Cache Size ID Register Macros */\n#define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)\n#define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )\n\n#define __SCB_DCACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */\n\n/**\n  \\brief   Enable I-Cache\n  \\details Turns on I-Cache\n  */\n__STATIC_FORCEINLINE void SCB_EnableICache (void)\n{\n  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)\n    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */\n\n    __DSB();\n    __ISB();\n    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */\n    __DSB();\n    __ISB();\n    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */\n    __DSB();\n    __ISB();\n  #endif\n}\n\n\n/**\n  \\brief   Disable I-Cache\n  \\details Turns off I-Cache\n  */\n__STATIC_FORCEINLINE void SCB_DisableICache (void)\n{\n  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)\n    __DSB();\n    __ISB();\n    SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk;  /* disable I-Cache */\n    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */\n    __DSB();\n    __ISB();\n  #endif\n}\n\n\n/**\n  \\brief   Invalidate I-Cache\n  \\details Invalidates I-Cache\n  */\n__STATIC_FORCEINLINE void SCB_InvalidateICache (void)\n{\n  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)\n    __DSB();\n    __ISB();\n    SCB->ICIALLU = 0UL;\n    __DSB();\n    __ISB();\n  #endif\n}\n\n\n/**\n  \\brief   Enable D-Cache\n  \\details Turns on D-Cache\n  */\n__STATIC_FORCEINLINE void SCB_EnableDCache (void)\n{\n  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)\n    uint32_t ccsidr;\n    uint32_t sets;\n    uint32_t ways;\n\n    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */\n\n    SCB->CSSELR = 0U;                       /* select Level 1 data cache */\n    __DSB();\n\n    ccsidr = SCB->CCSIDR;\n\n                                            /* invalidate D-Cache */\n    sets = (uint32_t)(CCSIDR_SETS(ccsidr));\n    do {\n      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));\n      do {\n        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |\n                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );\n        #if defined ( __CC_ARM )\n          __schedule_barrier();\n        #endif\n      } while (ways-- != 0U);\n    } while(sets-- != 0U);\n    __DSB();\n\n    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */\n\n    __DSB();\n    __ISB();\n  #endif\n}\n\n\n/**\n  \\brief   Disable D-Cache\n  \\details Turns off D-Cache\n  */\n__STATIC_FORCEINLINE void SCB_DisableDCache (void)\n{\n  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)\n    uint32_t ccsidr;\n    uint32_t sets;\n    uint32_t ways;\n\n    SCB->CSSELR = 0U;                       /* select Level 1 data cache */\n    __DSB();\n\n    SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */\n    __DSB();\n\n    ccsidr = SCB->CCSIDR;\n\n                                            /* clean & invalidate D-Cache */\n    sets = (uint32_t)(CCSIDR_SETS(ccsidr));\n    do {\n      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));\n      do {\n        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |\n                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );\n        #if defined ( __CC_ARM )\n          __schedule_barrier();\n        #endif\n      } while (ways-- != 0U);\n    } while(sets-- != 0U);\n\n    __DSB();\n    __ISB();\n  #endif\n}\n\n\n/**\n  \\brief   Invalidate D-Cache\n  \\details Invalidates D-Cache\n  */\n__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)\n{\n  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)\n    uint32_t ccsidr;\n    uint32_t sets;\n    uint32_t ways;\n\n    SCB->CSSELR = 0U;                       /* select Level 1 data cache */\n    __DSB();\n\n    ccsidr = SCB->CCSIDR;\n\n                                            /* invalidate D-Cache */\n    sets = (uint32_t)(CCSIDR_SETS(ccsidr));\n    do {\n      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));\n      do {\n        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |\n                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );\n        #if defined ( __CC_ARM )\n          __schedule_barrier();\n        #endif\n      } while (ways-- != 0U);\n    } while(sets-- != 0U);\n\n    __DSB();\n    __ISB();\n  #endif\n}\n\n\n/**\n  \\brief   Clean D-Cache\n  \\details Cleans D-Cache\n  */\n__STATIC_FORCEINLINE void SCB_CleanDCache (void)\n{\n  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)\n    uint32_t ccsidr;\n    uint32_t sets;\n    uint32_t ways;\n\n    SCB->CSSELR = 0U;                       /* select Level 1 data cache */\n    __DSB();\n\n    ccsidr = SCB->CCSIDR;\n\n                                            /* clean D-Cache */\n    sets = (uint32_t)(CCSIDR_SETS(ccsidr));\n    do {\n      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));\n      do {\n        SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |\n                      ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk)  );\n        #if defined ( __CC_ARM )\n          __schedule_barrier();\n        #endif\n      } while (ways-- != 0U);\n    } while(sets-- != 0U);\n\n    __DSB();\n    __ISB();\n  #endif\n}\n\n\n/**\n  \\brief   Clean & Invalidate D-Cache\n  \\details Cleans and Invalidates D-Cache\n  */\n__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)\n{\n  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)\n    uint32_t ccsidr;\n    uint32_t sets;\n    uint32_t ways;\n\n    SCB->CSSELR = 0U;                       /* select Level 1 data cache */\n    __DSB();\n\n    ccsidr = SCB->CCSIDR;\n\n                                            /* clean & invalidate D-Cache */\n    sets = (uint32_t)(CCSIDR_SETS(ccsidr));\n    do {\n      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));\n      do {\n        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |\n                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );\n        #if defined ( __CC_ARM )\n          __schedule_barrier();\n        #endif\n      } while (ways-- != 0U);\n    } while(sets-- != 0U);\n\n    __DSB();\n    __ISB();\n  #endif\n}\n\n\n/**\n  \\brief   D-Cache Invalidate by address\n  \\details Invalidates D-Cache for the given address.\n           D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.\n           D-Cache memory blocks which are part of given address + given size are invalidated.\n  \\param[in]   addr    address\n  \\param[in]   dsize   size of memory block (in number of bytes)\n*/\n__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)\n{\n  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)\n    if ( dsize > 0 ) { \n       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));\n      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;\n    \n      __DSB();\n\n      do {\n        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */\n        op_addr += __SCB_DCACHE_LINE_SIZE;\n        op_size -= __SCB_DCACHE_LINE_SIZE;\n      } while ( op_size > 0 );\n\n      __DSB();\n      __ISB();\n    }\n  #endif\n}\n\n\n/**\n  \\brief   D-Cache Clean by address\n  \\details Cleans D-Cache for the given address\n           D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.\n           D-Cache memory blocks which are part of given address + given size are cleaned.\n  \\param[in]   addr    address\n  \\param[in]   dsize   size of memory block (in number of bytes)\n*/\n__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)\n{\n  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)\n    if ( dsize > 0 ) { \n       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));\n      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;\n    \n      __DSB();\n\n      do {\n        SCB->DCCMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */\n        op_addr += __SCB_DCACHE_LINE_SIZE;\n        op_size -= __SCB_DCACHE_LINE_SIZE;\n      } while ( op_size > 0 );\n\n      __DSB();\n      __ISB();\n    }\n  #endif\n}\n\n\n/**\n  \\brief   D-Cache Clean and Invalidate by address\n  \\details Cleans and invalidates D_Cache for the given address\n           D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.\n           D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.\n  \\param[in]   addr    address (aligned to 32-byte boundary)\n  \\param[in]   dsize   size of memory block (in number of bytes)\n*/\n__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)\n{\n  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)\n    if ( dsize > 0 ) { \n       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));\n      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;\n    \n      __DSB();\n\n      do {\n        SCB->DCCIMVAC = op_addr;            /* register accepts only 32byte aligned values, only bits 31..5 are valid */\n        op_addr +=          __SCB_DCACHE_LINE_SIZE;\n        op_size -=          __SCB_DCACHE_LINE_SIZE;\n      } while ( op_size > 0 );\n\n      __DSB();\n      __ISB();\n    }\n  #endif\n}\n\n/*@} end of CMSIS_Core_CacheFunctions */\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n/* ##################################### Debug In/Output function ########################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_core_DebugFunctions ITM Functions\n  \\brief    Functions that access the ITM debug interface.\n  @{\n */\n\nextern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */\n#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \\ref ITM_RxBuffer is ready for next character. */\n\n\n/**\n  \\brief   ITM Send Character\n  \\details Transmits a character via the ITM channel 0, and\n           \\li Just returns when no debugger is connected that has booked the output.\n           \\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\n  \\param [in]     ch  Character to transmit.\n  \\returns            Character to transmit.\n */\n__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\n{\n  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */\n      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */\n  {\n    while (ITM->PORT[0U].u32 == 0UL)\n    {\n      __NOP();\n    }\n    ITM->PORT[0U].u8 = (uint8_t)ch;\n  }\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Receive Character\n  \\details Inputs a character via the external variable \\ref ITM_RxBuffer.\n  \\return             Received character.\n  \\return         -1  No character pending.\n */\n__STATIC_INLINE int32_t ITM_ReceiveChar (void)\n{\n  int32_t ch = -1;                           /* no character available */\n\n  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)\n  {\n    ch = ITM_RxBuffer;\n    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\n  }\n\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Check Character\n  \\details Checks whether a character is pending for reading in the variable \\ref ITM_RxBuffer.\n  \\return          0  No character available.\n  \\return          1  Character available.\n */\n__STATIC_INLINE int32_t ITM_CheckChar (void)\n{\n\n  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)\n  {\n    return (0);                              /* no character available */\n  }\n  else\n  {\n    return (1);                              /*    character available */\n  }\n}\n\n/*@} end of CMSIS_core_DebugFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_CM7_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_sc000.h",
    "content": "/**************************************************************************//**\n * @file     core_sc000.h\n * @brief    CMSIS SC000 Core Peripheral Access Layer Header File\n * @version  V5.0.6\n * @date     12. November 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_SC000_H_GENERIC\n#define __CORE_SC000_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup SC000\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/*  CMSIS SC000 definitions */\n#define __SC000_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __SC000_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                 /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN << 16U) | \\\n                                      __SC000_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_SC                 (000U)                                   /*!< Cortex secure core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    This core does not support an FPU at all\n*/\n#define __FPU_USED       0U\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_SC000_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_SC000_H_DEPENDANT\n#define __CORE_SC000_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __SC000_REV\n    #define __SC000_REV             0x0000U\n    #warning \"__SC000_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          2U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group SC000 */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core MPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */\n    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */\n    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[31U];\n  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[31U];\n  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[31U];\n  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[31U];\n        uint32_t RESERVED4[64U];\n  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */\n}  NVIC_Type;\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n        uint32_t RESERVED1[154U];\n  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */\n#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */\n#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */\n} SCnSCB_Type;\n\n/* Auxiliary Control Register Definitions */\n#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */\n#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */\n} MPU_Type;\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */\n#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */\n\n#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */\n#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */\n\n#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */\n#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */\n\n/* MPU Region Attribute and Size Register Definitions */\n#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */\n#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */\n\n#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */\n#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */\n\n#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */\n#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */\n\n#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */\n#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */\n\n#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */\n#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */\n\n#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */\n#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */\n\n#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */\n#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */\n\n#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */\n#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */\n\n#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */\n#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */\n\n#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */\n#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.\n            Therefore they are not covered by the SC000 header file.\n  @{\n */\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */\n#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */\n#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */\n#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */\n\n#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */\n#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */\n#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */\n#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */\n  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */\n#endif\n\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n/*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for SC000 */\n/*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for SC000 */\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n/*#define NVIC_GetActive              __NVIC_GetActive             not available for SC000 */\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* The following EXC_RETURN values are saved the LR on exception entry */\n#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */\n#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */\n#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */\n\n\n/* Interrupt Priorities are WORD accessible only under Armv6-M                  */\n/* The following MACROS handle generation of the register offset and byte masks */\n#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)\n#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )\n#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n  else\n  {\n    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |\n       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                 SCB_AIRCR_SYSRESETREQ_Msk);\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n    return 0U;           /* No FPU */\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_SC000_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/core_sc300.h",
    "content": "/**************************************************************************//**\n * @file     core_sc300.h\n * @brief    CMSIS SC300 Core Peripheral Access Layer Header File\n * @version  V5.0.7\n * @date     12. November 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef __CORE_SC300_H_GENERIC\n#define __CORE_SC300_H_GENERIC\n\n#include \n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/**\n  \\page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions\n  CMSIS violates the following MISRA-C:2004 rules:\n\n   \\li Required Rule 8.5, object/function definition in header file.
\n     Function definitions in header files are used to allow 'inlining'.\n\n   \\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
\n     Unions are used for effective representation of core registers.\n\n   \\li Advisory Rule 19.7, Function-like macro defined.
\n     Function-like macros are used to allow more efficient code.\n */\n\n\n/*******************************************************************************\n *                 CMSIS definitions\n ******************************************************************************/\n/**\n  \\ingroup SC3000\n  @{\n */\n\n#include \"cmsis_version.h\"\n\n/*  CMSIS SC300 definitions */\n#define __SC300_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                /*!< \\deprecated [31:16] CMSIS HAL main version */\n#define __SC300_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                 /*!< \\deprecated [15:0]  CMSIS HAL sub version */\n#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN << 16U) | \\\n                                      __SC300_CMSIS_VERSION_SUB           )  /*!< \\deprecated CMSIS HAL version number */\n\n#define __CORTEX_SC                 (300U)                                   /*!< Cortex secure core */\n\n/** __FPU_USED indicates whether an FPU is used or not.\n    This core does not support an FPU at all\n*/\n#define __FPU_USED       0U\n\n#if defined ( __CC_ARM )\n  #if defined __TARGET_FPU_VFP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)\n  #if defined __ARM_FP\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __GNUC__ )\n  #if defined (__VFP_FP__) && !defined(__SOFTFP__)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __ICCARM__ )\n  #if defined __ARMVFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TI_ARM__ )\n  #if defined __TI_VFP_SUPPORT__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __TASKING__ )\n  #if defined __FPU_VFP__\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#elif defined ( __CSMC__ )\n  #if ( __CSMC__ & 0x400U)\n    #error \"Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)\"\n  #endif\n\n#endif\n\n#include \"cmsis_compiler.h\"               /* CMSIS compiler specific defines */\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_SC300_H_GENERIC */\n\n#ifndef __CMSIS_GENERIC\n\n#ifndef __CORE_SC300_H_DEPENDANT\n#define __CORE_SC300_H_DEPENDANT\n\n#ifdef __cplusplus\n extern \"C\" {\n#endif\n\n/* check device defines and use defaults */\n#if defined __CHECK_DEVICE_DEFINES\n  #ifndef __SC300_REV\n    #define __SC300_REV               0x0000U\n    #warning \"__SC300_REV not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __MPU_PRESENT\n    #define __MPU_PRESENT             0U\n    #warning \"__MPU_PRESENT not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __NVIC_PRIO_BITS\n    #define __NVIC_PRIO_BITS          3U\n    #warning \"__NVIC_PRIO_BITS not defined in device header file; using default!\"\n  #endif\n\n  #ifndef __Vendor_SysTickConfig\n    #define __Vendor_SysTickConfig    0U\n    #warning \"__Vendor_SysTickConfig not defined in device header file; using default!\"\n  #endif\n#endif\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions */\n\n/* following defines should be used for structure members */\n#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */\n#define     __OM     volatile            /*! Defines 'write only' structure member permissions */\n#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */\n\n/*@} end of group SC300 */\n\n\n\n/*******************************************************************************\n *                 Register Abstraction\n  Core Register contain:\n  - Core Register\n  - Core NVIC Register\n  - Core SCB Register\n  - Core SysTick Register\n  - Core Debug Register\n  - Core MPU Register\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_core_register Defines and Type Definitions\n  \\brief Type definitions and defines for Cortex-M processor based devices.\n*/\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_CORE  Status and Control Registers\n  \\brief      Core Register type definitions.\n  @{\n */\n\n/**\n  \\brief  Union type to access the Application Program Status Register (APSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} APSR_Type;\n\n/* APSR Register Definitions */\n#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */\n#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */\n\n#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */\n#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */\n\n#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */\n#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */\n\n#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */\n#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */\n\n#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */\n#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */\n\n\n/**\n  \\brief  Union type to access the Interrupt Program Status Register (IPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} IPSR_Type;\n\n/* IPSR Register Definitions */\n#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */\n#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Special-Purpose Program Status Registers (xPSR).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */\n    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */\n    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */\n    uint32_t _reserved1:8;               /*!< bit: 16..23  Reserved */\n    uint32_t T:1;                        /*!< bit:     24  Thumb bit */\n    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */\n    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */\n    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */\n    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */\n    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */\n    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} xPSR_Type;\n\n/* xPSR Register Definitions */\n#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */\n#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */\n\n#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */\n#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */\n\n#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */\n#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */\n\n#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */\n#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */\n\n#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */\n#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */\n\n#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */\n#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */\n\n#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */\n#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */\n\n#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */\n#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */\n\n#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */\n#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */\n\n\n/**\n  \\brief  Union type to access the Control Registers (CONTROL).\n */\ntypedef union\n{\n  struct\n  {\n    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */\n    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */\n    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */\n  } b;                                   /*!< Structure used for bit  access */\n  uint32_t w;                            /*!< Type      used for word access */\n} CONTROL_Type;\n\n/* CONTROL Register Definitions */\n#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */\n#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */\n\n#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */\n#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */\n\n/*@} end of group CMSIS_CORE */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)\n  \\brief      Type definitions for the NVIC Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).\n */\ntypedef struct\n{\n  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */\n        uint32_t RESERVED0[24U];\n  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */\n        uint32_t RSERVED1[24U];\n  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */\n        uint32_t RESERVED2[24U];\n  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */\n        uint32_t RESERVED3[24U];\n  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */\n        uint32_t RESERVED4[56U];\n  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */\n        uint32_t RESERVED5[644U];\n  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */\n}  NVIC_Type;\n\n/* Software Triggered Interrupt Register Definitions */\n#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */\n#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_NVIC */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCB     System Control Block (SCB)\n  \\brief    Type definitions for the System Control Block Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control Block (SCB).\n */\ntypedef struct\n{\n  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */\n  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */\n  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */\n  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */\n  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */\n  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */\n  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */\n  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */\n  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */\n  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */\n  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */\n  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */\n  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */\n  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */\n  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */\n  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */\n  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */\n  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */\n  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */\n        uint32_t RESERVED0[5U];\n  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */\n        uint32_t RESERVED1[129U];\n  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */\n} SCB_Type;\n\n/* SCB CPUID Register Definitions */\n#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */\n#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */\n\n#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */\n#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */\n\n#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */\n#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */\n\n#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */\n#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */\n\n#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */\n#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */\n\n/* SCB Interrupt Control State Register Definitions */\n#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */\n#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */\n\n#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */\n#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */\n\n#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */\n#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */\n\n#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */\n#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */\n\n#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */\n#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */\n\n#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */\n#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */\n\n#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */\n#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */\n\n#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */\n#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */\n\n#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */\n#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */\n\n#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */\n#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */\n\n/* SCB Vector Table Offset Register Definitions */\n#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */\n#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */\n\n#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */\n#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */\n\n/* SCB Application Interrupt and Reset Control Register Definitions */\n#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */\n#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */\n\n#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */\n#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */\n\n#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */\n#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */\n\n#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */\n#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */\n\n#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */\n#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */\n\n#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */\n#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */\n\n#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */\n#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */\n\n/* SCB System Control Register Definitions */\n#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */\n#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */\n\n#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */\n#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */\n\n#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */\n#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */\n\n/* SCB Configuration Control Register Definitions */\n#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */\n#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */\n\n#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */\n#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */\n\n#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */\n#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */\n\n#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */\n#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */\n\n#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */\n#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */\n\n#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */\n#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */\n\n/* SCB System Handler Control and State Register Definitions */\n#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */\n#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */\n\n#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */\n#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */\n\n#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */\n#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */\n\n#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */\n#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */\n\n#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */\n#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */\n\n#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */\n#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */\n\n#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */\n#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */\n\n#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */\n#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */\n\n#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */\n#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */\n\n#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */\n#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */\n\n#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */\n#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */\n\n#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */\n#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */\n\n#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */\n#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */\n\n#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */\n#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */\n\n/* SCB Configurable Fault Status Register Definitions */\n#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */\n#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */\n\n#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */\n#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */\n\n#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */\n#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */\n\n/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */\n#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */\n\n#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */\n#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */\n\n#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */\n#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */\n\n#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */\n#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */\n\n#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */\n#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */\n\n/* BusFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */\n#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */\n\n#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */\n#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */\n\n#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */\n#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */\n\n#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */\n#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */\n\n#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */\n#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */\n\n#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */\n#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */\n\n/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */\n#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */\n#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */\n\n#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */\n#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */\n\n#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */\n#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */\n\n#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */\n#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */\n\n#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */\n#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */\n\n#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */\n#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */\n\n/* SCB Hard Fault Status Register Definitions */\n#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */\n#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */\n\n#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */\n#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */\n\n#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */\n#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */\n\n/* SCB Debug Fault Status Register Definitions */\n#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */\n#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */\n\n#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */\n#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */\n\n#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */\n#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */\n\n#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */\n#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */\n\n#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */\n#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */\n\n/*@} end of group CMSIS_SCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)\n  \\brief    Type definitions for the System Control and ID Register not in the SCB\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Control and ID Register not in the SCB.\n */\ntypedef struct\n{\n        uint32_t RESERVED0[1U];\n  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */\n        uint32_t RESERVED1[1U];\n} SCnSCB_Type;\n\n/* Interrupt Controller Type Register Definitions */\n#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */\n#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */\n\n/*@} end of group CMSIS_SCnotSCB */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_SysTick     System Tick Timer (SysTick)\n  \\brief    Type definitions for the System Timer Registers.\n  @{\n */\n\n/**\n  \\brief  Structure type to access the System Timer (SysTick).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */\n  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */\n  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */\n  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */\n} SysTick_Type;\n\n/* SysTick Control / Status Register Definitions */\n#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */\n#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */\n\n#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */\n#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */\n\n#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */\n#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */\n\n#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */\n#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */\n\n/* SysTick Reload Register Definitions */\n#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */\n#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */\n\n/* SysTick Current Register Definitions */\n#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */\n#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */\n\n/* SysTick Calibration Register Definitions */\n#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */\n#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */\n\n#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */\n#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */\n\n#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */\n#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */\n\n/*@} end of group CMSIS_SysTick */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)\n  \\brief    Type definitions for the Instrumentation Trace Macrocell (ITM)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).\n */\ntypedef struct\n{\n  __OM  union\n  {\n    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */\n    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */\n    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */\n  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */\n        uint32_t RESERVED0[864U];\n  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */\n        uint32_t RESERVED1[15U];\n  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */\n        uint32_t RESERVED2[15U];\n  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */\n        uint32_t RESERVED3[29U];\n  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */\n  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */\n  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */\n        uint32_t RESERVED4[43U];\n  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */\n  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */\n        uint32_t RESERVED5[6U];\n  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */\n  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */\n  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */\n  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */\n  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */\n  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */\n  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */\n  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */\n  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */\n  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */\n  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */\n  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */\n} ITM_Type;\n\n/* ITM Trace Privilege Register Definitions */\n#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */\n#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */\n\n/* ITM Trace Control Register Definitions */\n#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */\n#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */\n\n#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */\n#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */\n\n#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */\n#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */\n\n#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */\n#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */\n\n#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */\n#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */\n\n#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */\n#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */\n\n#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */\n#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */\n\n#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */\n#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */\n\n#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */\n#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */\n\n/* ITM Integration Write Register Definitions */\n#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */\n#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */\n\n/* ITM Integration Read Register Definitions */\n#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */\n#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */\n\n/* ITM Integration Mode Control Register Definitions */\n#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */\n#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */\n\n/* ITM Lock Status Register Definitions */\n#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */\n#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */\n\n#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */\n#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */\n\n#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */\n#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */\n\n/*@}*/ /* end of group CMSIS_ITM */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)\n  \\brief    Type definitions for the Data Watchpoint and Trace (DWT)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Data Watchpoint and Trace Register (DWT).\n */\ntypedef struct\n{\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */\n  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */\n  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */\n  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */\n  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */\n  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */\n  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */\n  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */\n  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */\n  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */\n  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */\n        uint32_t RESERVED0[1U];\n  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */\n  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */\n  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */\n        uint32_t RESERVED1[1U];\n  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */\n  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */\n  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */\n        uint32_t RESERVED2[1U];\n  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */\n  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */\n  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */\n} DWT_Type;\n\n/* DWT Control Register Definitions */\n#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */\n#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */\n\n#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */\n#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */\n\n#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */\n#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */\n\n#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */\n#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */\n\n#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */\n#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */\n\n#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */\n#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */\n\n#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */\n#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */\n\n#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */\n#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */\n\n#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */\n#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */\n\n#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */\n#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */\n\n#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */\n#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */\n\n#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */\n#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */\n\n#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */\n#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */\n\n#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */\n#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */\n\n#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */\n#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */\n\n#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */\n#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */\n\n#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */\n#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */\n\n#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */\n#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */\n\n/* DWT CPI Count Register Definitions */\n#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */\n#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */\n\n/* DWT Exception Overhead Count Register Definitions */\n#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */\n#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */\n\n/* DWT Sleep Count Register Definitions */\n#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */\n#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */\n\n/* DWT LSU Count Register Definitions */\n#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */\n#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */\n\n/* DWT Folded-instruction Count Register Definitions */\n#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */\n#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */\n\n/* DWT Comparator Mask Register Definitions */\n#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */\n#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */\n\n/* DWT Comparator Function Register Definitions */\n#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */\n#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */\n\n#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */\n#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */\n\n#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */\n#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */\n\n#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */\n#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */\n\n#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */\n#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */\n\n#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */\n#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */\n\n#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */\n#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */\n\n#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */\n#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */\n\n#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */\n#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */\n\n/*@}*/ /* end of group CMSIS_DWT */\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_TPI     Trace Port Interface (TPI)\n  \\brief    Type definitions for the Trace Port Interface (TPI)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Trace Port Interface Register (TPI).\n */\ntypedef struct\n{\n  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */\n  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */\n        uint32_t RESERVED0[2U];\n  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */\n        uint32_t RESERVED1[55U];\n  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */\n        uint32_t RESERVED2[131U];\n  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */\n  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */\n  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */\n        uint32_t RESERVED3[759U];\n  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */\n  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */\n  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */\n        uint32_t RESERVED4[1U];\n  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */\n  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */\n  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */\n        uint32_t RESERVED5[39U];\n  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */\n  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */\n        uint32_t RESERVED7[8U];\n  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */\n  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */\n} TPI_Type;\n\n/* TPI Asynchronous Clock Prescaler Register Definitions */\n#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */\n#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */\n\n/* TPI Selected Pin Protocol Register Definitions */\n#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */\n#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */\n\n/* TPI Formatter and Flush Status Register Definitions */\n#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */\n#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */\n\n#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */\n#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */\n\n#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */\n#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */\n\n#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */\n#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */\n\n/* TPI Formatter and Flush Control Register Definitions */\n#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */\n#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */\n\n#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */\n#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */\n\n/* TPI TRIGGER Register Definitions */\n#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */\n#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */\n\n/* TPI Integration ETM Data Register Definitions (FIFO0) */\n#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */\n#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */\n\n#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */\n#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */\n\n#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */\n#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */\n\n#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */\n#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */\n\n#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */\n#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */\n\n#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */\n#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */\n\n#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */\n#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */\n\n/* TPI ITATBCTR2 Register Definitions */\n#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */\n#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */\n\n#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */\n#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */\n\n/* TPI Integration ITM Data Register Definitions (FIFO1) */\n#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */\n#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */\n\n#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */\n#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */\n\n#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */\n#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */\n\n#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */\n#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */\n\n#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */\n#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */\n\n#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */\n#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */\n\n#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */\n#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */\n\n/* TPI ITATBCTR0 Register Definitions */\n#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */\n#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */\n\n#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */\n#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */\n\n/* TPI Integration Mode Control Register Definitions */\n#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */\n#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */\n\n/* TPI DEVID Register Definitions */\n#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */\n#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */\n\n#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */\n#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */\n\n#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */\n#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */\n\n#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */\n#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */\n\n#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */\n#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */\n\n#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */\n#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */\n\n/* TPI DEVTYPE Register Definitions */\n#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */\n#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */\n\n#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */\n#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */\n\n/*@}*/ /* end of group CMSIS_TPI */\n\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_MPU     Memory Protection Unit (MPU)\n  \\brief    Type definitions for the Memory Protection Unit (MPU)\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Memory Protection Unit (MPU).\n */\ntypedef struct\n{\n  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */\n  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */\n  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */\n  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */\n  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */\n  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */\n  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */\n  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */\n  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */\n} MPU_Type;\n\n/* MPU Type Register Definitions */\n#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */\n#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */\n\n#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */\n#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */\n\n#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */\n#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */\n\n/* MPU Control Register Definitions */\n#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */\n#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */\n\n#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */\n#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */\n\n#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */\n#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */\n\n/* MPU Region Number Register Definitions */\n#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */\n#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */\n\n/* MPU Region Base Address Register Definitions */\n#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */\n#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */\n\n#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */\n#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */\n\n#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */\n#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */\n\n/* MPU Region Attribute and Size Register Definitions */\n#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */\n#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */\n\n#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */\n#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */\n\n#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */\n#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */\n\n#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */\n#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */\n\n#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */\n#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */\n\n#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */\n#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */\n\n#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */\n#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */\n\n#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */\n#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */\n\n#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */\n#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */\n\n#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */\n#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */\n\n/*@} end of group CMSIS_MPU */\n#endif\n\n\n/**\n  \\ingroup  CMSIS_core_register\n  \\defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)\n  \\brief    Type definitions for the Core Debug Registers\n  @{\n */\n\n/**\n  \\brief  Structure type to access the Core Debug Register (CoreDebug).\n */\ntypedef struct\n{\n  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */\n  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */\n  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */\n  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */\n} CoreDebug_Type;\n\n/* Debug Halting Control and Status Register Definitions */\n#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */\n#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */\n\n#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */\n#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */\n\n#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */\n#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */\n\n#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */\n#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */\n\n#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */\n#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */\n\n#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */\n#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */\n\n#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */\n#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */\n\n#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */\n#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */\n\n#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */\n#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */\n\n#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */\n#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */\n\n#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */\n#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */\n\n#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */\n#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */\n\n/* Debug Core Register Selector Register Definitions */\n#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */\n#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */\n\n#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */\n#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */\n\n/* Debug Exception and Monitor Control Register Definitions */\n#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */\n#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */\n\n#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */\n#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */\n\n#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */\n#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */\n\n#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */\n#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */\n\n#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */\n#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */\n\n#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */\n#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */\n\n#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */\n#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */\n\n#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */\n#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */\n\n#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */\n#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */\n\n#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */\n#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */\n\n#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */\n#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */\n\n#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */\n#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */\n\n#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */\n#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */\n\n/*@} end of group CMSIS_CoreDebug */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_bitfield     Core register bit field macros\n  \\brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).\n  @{\n */\n\n/**\n  \\brief   Mask and shift a bit field value for use in a register bit range.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted value.\n*/\n#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)\n\n/**\n  \\brief     Mask and shift a register value to extract a bit filed value.\n  \\param[in] field  Name of the register bit field.\n  \\param[in] value  Value of register. This parameter is interpreted as an uint32_t type.\n  \\return           Masked and shifted bit field value.\n*/\n#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)\n\n/*@} end of group CMSIS_core_bitfield */\n\n\n/**\n  \\ingroup    CMSIS_core_register\n  \\defgroup   CMSIS_core_base     Core Definitions\n  \\brief      Definitions for base addresses, unions, and structures.\n  @{\n */\n\n/* Memory mapping of Core Hardware */\n#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */\n#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */\n#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */\n#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */\n#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */\n#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */\n#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */\n#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */\n\n#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */\n#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */\n#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */\n#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */\n#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */\n#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */\n#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */\n#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */\n\n#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)\n  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */\n  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */\n#endif\n\n/*@} */\n\n\n\n/*******************************************************************************\n *                Hardware Abstraction Layer\n  Core Function Interface contains:\n  - Core NVIC Functions\n  - Core SysTick Functions\n  - Core Debug Functions\n  - Core Register Access Functions\n ******************************************************************************/\n/**\n  \\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference\n*/\n\n\n\n/* ##########################   NVIC functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_NVICFunctions NVIC Functions\n  \\brief    Functions that manage interrupts and exceptions via the NVIC.\n  @{\n */\n\n#ifdef CMSIS_NVIC_VIRTUAL\n  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE\n    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE \"cmsis_nvic_virtual.h\"\n  #endif\n  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping\n  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping\n  #define NVIC_EnableIRQ              __NVIC_EnableIRQ\n  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ\n  #define NVIC_DisableIRQ             __NVIC_DisableIRQ\n  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ\n  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ\n  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ\n  #define NVIC_GetActive              __NVIC_GetActive\n  #define NVIC_SetPriority            __NVIC_SetPriority\n  #define NVIC_GetPriority            __NVIC_GetPriority\n  #define NVIC_SystemReset            __NVIC_SystemReset\n#endif /* CMSIS_NVIC_VIRTUAL */\n\n#ifdef CMSIS_VECTAB_VIRTUAL\n  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE \"cmsis_vectab_virtual.h\"\n  #endif\n  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE\n#else\n  #define NVIC_SetVector              __NVIC_SetVector\n  #define NVIC_GetVector              __NVIC_GetVector\n#endif  /* (CMSIS_VECTAB_VIRTUAL) */\n\n#define NVIC_USER_IRQ_OFFSET          16\n\n\n/* The following EXC_RETURN values are saved the LR on exception entry */\n#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */\n#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */\n#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */\n\n\n\n/**\n  \\brief   Set Priority Grouping\n  \\details Sets the priority grouping field using the required unlock sequence.\n           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.\n           Only values from 0..7 are used.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]      PriorityGroup  Priority grouping field.\n */\n__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)\n{\n  uint32_t reg_value;\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */\n\n  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */\n  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */\n  reg_value  =  (reg_value                                   |\n                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |\n                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */\n  SCB->AIRCR =  reg_value;\n}\n\n\n/**\n  \\brief   Get Priority Grouping\n  \\details Reads the priority grouping field from the NVIC Interrupt Controller.\n  \\return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)\n{\n  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));\n}\n\n\n/**\n  \\brief   Enable Interrupt\n  \\details Enables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Enable status\n  \\details Returns a device specific interrupt enable status from the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt is not enabled.\n  \\return             1  Interrupt is enabled.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Disable Interrupt\n  \\details Disables a device specific interrupt in the NVIC interrupt controller.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n    __DSB();\n    __ISB();\n  }\n}\n\n\n/**\n  \\brief   Get Pending Interrupt\n  \\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not pending.\n  \\return             1  Interrupt status is pending.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Pending Interrupt\n  \\details Sets the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Clear Pending Interrupt\n  \\details Clears the pending bit of a device specific interrupt in the NVIC pending register.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));\n  }\n}\n\n\n/**\n  \\brief   Get Active Interrupt\n  \\details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.\n  \\param [in]      IRQn  Device specific interrupt number.\n  \\return             0  Interrupt status is not active.\n  \\return             1  Interrupt status is active.\n  \\note    IRQn must not be negative.\n */\n__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));\n  }\n  else\n  {\n    return(0U);\n  }\n}\n\n\n/**\n  \\brief   Set Interrupt Priority\n  \\details Sets the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]      IRQn  Interrupt number.\n  \\param [in]  priority  Priority to set.\n  \\note    The priority cannot be set for every processor exception.\n */\n__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)\n{\n  if ((int32_t)(IRQn) >= 0)\n  {\n    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n  else\n  {\n    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);\n  }\n}\n\n\n/**\n  \\brief   Get Interrupt Priority\n  \\details Reads the priority of a device specific interrupt or a processor exception.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn  Interrupt number.\n  \\return             Interrupt Priority.\n                      Value is aligned automatically to the implemented priority bits of the microcontroller.\n */\n__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)\n{\n\n  if ((int32_t)(IRQn) >= 0)\n  {\n    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));\n  }\n  else\n  {\n    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));\n  }\n}\n\n\n/**\n  \\brief   Encode Priority\n  \\details Encodes the priority for an interrupt with the given priority group,\n           preemptive priority value, and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [in]   PreemptPriority  Preemptive priority value (starting from 0).\n  \\param [in]       SubPriority  Subpriority value (starting from 0).\n  \\return                        Encoded priority. Value can be used in the function \\ref NVIC_SetPriority().\n */\n__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  return (\n           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |\n           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))\n         );\n}\n\n\n/**\n  \\brief   Decode Priority\n  \\details Decodes an interrupt priority value with a given priority group to\n           preemptive priority value and subpriority value.\n           In case of a conflict between priority grouping and available\n           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.\n  \\param [in]         Priority   Priority value, which can be retrieved with the function \\ref NVIC_GetPriority().\n  \\param [in]     PriorityGroup  Used priority group.\n  \\param [out] pPreemptPriority  Preemptive priority value (starting from 0).\n  \\param [out]     pSubPriority  Subpriority value (starting from 0).\n */\n__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)\n{\n  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */\n  uint32_t PreemptPriorityBits;\n  uint32_t SubPriorityBits;\n\n  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);\n  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));\n\n  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);\n  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);\n}\n\n\n/**\n  \\brief   Set Interrupt Vector\n  \\details Sets an interrupt vector in SRAM based interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n           VTOR must been relocated to SRAM before.\n  \\param [in]   IRQn      Interrupt number\n  \\param [in]   vector    Address of interrupt handler function\n */\n__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;\n}\n\n\n/**\n  \\brief   Get Interrupt Vector\n  \\details Reads an interrupt vector from interrupt vector table.\n           The interrupt number can be positive to specify a device specific interrupt,\n           or negative to specify a processor exception.\n  \\param [in]   IRQn      Interrupt number.\n  \\return                 Address of interrupt handler function\n */\n__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)\n{\n  uint32_t *vectors = (uint32_t *)SCB->VTOR;\n  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];\n}\n\n\n/**\n  \\brief   System Reset\n  \\details Initiates a system reset request to reset the MCU.\n */\n__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)\n{\n  __DSB();                                                          /* Ensure all outstanding memory accesses included\n                                                                       buffered write are completed before reset */\n  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |\n                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |\n                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */\n  __DSB();                                                          /* Ensure completion of memory access */\n\n  for(;;)                                                           /* wait until reset */\n  {\n    __NOP();\n  }\n}\n\n/*@} end of CMSIS_Core_NVICFunctions */\n\n\n/* ##########################  FPU functions  #################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_FpuFunctions FPU Functions\n  \\brief    Function that provides FPU type.\n  @{\n */\n\n/**\n  \\brief   get FPU type\n  \\details returns the FPU type\n  \\returns\n   - \\b  0: No FPU\n   - \\b  1: Single precision FPU\n   - \\b  2: Double + Single precision FPU\n */\n__STATIC_INLINE uint32_t SCB_GetFPUType(void)\n{\n    return 0U;           /* No FPU */\n}\n\n\n/*@} end of CMSIS_Core_FpuFunctions */\n\n\n\n/* ##################################    SysTick function  ############################################ */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_Core_SysTickFunctions SysTick Functions\n  \\brief    Functions that configure the System.\n  @{\n */\n\n#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)\n\n/**\n  \\brief   System Tick Configuration\n  \\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.\n           Counter is in free running mode to generate periodic interrupts.\n  \\param [in]  ticks  Number of ticks between two interrupts.\n  \\return          0  Function succeeded.\n  \\return          1  Function failed.\n  \\note    When the variable __Vendor_SysTickConfig is set to 1, then the\n           function SysTick_Config is not included. In this case, the file device.h\n           must contain a vendor-specific implementation of this function.\n */\n__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)\n{\n  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)\n  {\n    return (1UL);                                                   /* Reload value impossible */\n  }\n\n  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */\n  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */\n  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */\n  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |\n                   SysTick_CTRL_TICKINT_Msk   |\n                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */\n  return (0UL);                                                     /* Function successful */\n}\n\n#endif\n\n/*@} end of CMSIS_Core_SysTickFunctions */\n\n\n\n/* ##################################### Debug In/Output function ########################################### */\n/**\n  \\ingroup  CMSIS_Core_FunctionInterface\n  \\defgroup CMSIS_core_DebugFunctions ITM Functions\n  \\brief    Functions that access the ITM debug interface.\n  @{\n */\n\nextern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */\n#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \\ref ITM_RxBuffer is ready for next character. */\n\n\n/**\n  \\brief   ITM Send Character\n  \\details Transmits a character via the ITM channel 0, and\n           \\li Just returns when no debugger is connected that has booked the output.\n           \\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.\n  \\param [in]     ch  Character to transmit.\n  \\returns            Character to transmit.\n */\n__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)\n{\n  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */\n      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */\n  {\n    while (ITM->PORT[0U].u32 == 0UL)\n    {\n      __NOP();\n    }\n    ITM->PORT[0U].u8 = (uint8_t)ch;\n  }\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Receive Character\n  \\details Inputs a character via the external variable \\ref ITM_RxBuffer.\n  \\return             Received character.\n  \\return         -1  No character pending.\n */\n__STATIC_INLINE int32_t ITM_ReceiveChar (void)\n{\n  int32_t ch = -1;                           /* no character available */\n\n  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)\n  {\n    ch = ITM_RxBuffer;\n    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */\n  }\n\n  return (ch);\n}\n\n\n/**\n  \\brief   ITM Check Character\n  \\details Checks whether a character is pending for reading in the variable \\ref ITM_RxBuffer.\n  \\return          0  No character available.\n  \\return          1  Character available.\n */\n__STATIC_INLINE int32_t ITM_CheckChar (void)\n{\n\n  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)\n  {\n    return (0);                              /* no character available */\n  }\n  else\n  {\n    return (1);                              /*    character available */\n  }\n}\n\n/*@} end of CMSIS_core_DebugFunctions */\n\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CORE_SC300_H_DEPENDANT */\n\n#endif /* __CMSIS_GENERIC */\n"
  },
  {
    "path": "platform/cmsis/inc/link_sym_armclang.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __LINK_SYM_ARMCLANG_H__\n#define __LINK_SYM_ARMCLANG_H__\n\n#ifdef __ARMCC_VERSION\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_addr_map.h\"\n\n#ifdef ROM_BUILD\n\n#define __rom_got_info_start                Image$$rom_got_info$$Base\n#define __audio_const_rom_start             Image$$rom_audio_const$$Base\n#define __audio_const_rom_end               Image$$rom_audio_const$$Limit\n#define __audio_const_rom_size              Image$$rom_audio_const$$Length\n#define __rom_text0_end                     Load$$rom_ramx$$Base\n#define __rom_ramx_start                    Image$$rom_ramx$$Base\n#define __rom_ramx_end                      Image$$rom_ramx$$Limit\n#define __rom_etext                         Load$$rom_data$$Base\n#define __rom_data_start__                  Image$$rom_data$$Base\n#define __rom_data_end__                    Image$$rom_data$$Limit\n#define __rom_bss_start__                   Image$$rom_bss$$Base\n#define __rom_bss_end__                     Image$$rom_bss$$ZI$$Limit\n#define __rom_HeapBase                      Image$$ARM_LIB_HEAP$$Base\n#define __rom_HeapLimit                     Image$$ARM_LIB_HEAP$$ZI$$Limit\n#define __rom_StackTop                      Image$$ARM_LIB_STACK$$ZI$$Limit\n#define __rom_stack                         __rom_StackTop\n#define __rom_StackLimit                    Image$$ARM_LIB_STACK$$Base\n#define __cp_ramx_last_dummy_start          Image$$cp_ramx_last_dummy$$Base\n#define __cp_ram_last_dummy_start           Image$$cp_ram_last_dummy$$Base\n#define __cp_stack_limit                    Image$$cp_stack$$Base\n#define __cp_stack_top                      Image$$cp_stack$$ZI$$Limit\n#define __export_fn_rom                     Image$$rom_export_fn$$Base\n\n#define __boot_sram_start_flash__           __rom_HeapLimit\n#define __boot_sram_start__                 __rom_HeapLimit\n#define __boot_sram_end_flash__             __rom_HeapLimit\n#define __boot_bss_sram_start__             __rom_HeapLimit\n#define __boot_bss_sram_end__               __rom_HeapLimit\n#define __fast_sram_text_data_start_flash__ __rom_HeapLimit\n#define __fast_sram_text_data_start__       __rom_HeapLimit\n#define __fast_sram_text_data_end__         __rom_HeapLimit\n#define __fast_sram_text_data_end_flash__   __rom_HeapLimit\n#define __sram_text_data_start_flash__      __rom_HeapLimit\n#define __sram_text_data_start__            __rom_HeapLimit\n#define __sram_text_data_end_flash__        __rom_HeapLimit\n#define __sram_bss_start__                  __rom_HeapLimit\n#define __sram_bss_end__                    __rom_HeapLimit\n\n#ifndef NOSTD\n#define __bss_start__                       __rom_bss_start__\n#define __bss_end__                         __rom_bss_end__\n#define __end__                             __rom_HeapBase\n/*\n#define end                                 __rom_HeapBase\n*/\n#define __StackTop                          __rom_StackTop\n#define __stack                             __rom_StackTop\n#endif\n\n#elif defined(PROGRAMMER)\n\n#define __exec_struct_start                 Image$$exec_struct$$Base\n#define __got_info_start                    Image$$got_info$$Base\n#define __cust_cmd_init_tbl_start           Image$$cust_cmd_init_tbl$$Base\n#define __cust_cmd_init_tbl_end             Image$$cust_cmd_init_tbl$$Limit\n#define __cust_cmd_hldr_tbl_start           Image$$cust_cmd_hdlr_tbl$$Base\n#define __cust_cmd_hldr_tbl_end             Image$$cust_cmd_hdlr_tbl$$Limit\n#define __etext                             Load$$data$$Base\n#define __data_start__                      Image$$data$$Base\n#define __data_end__                        Image$$data$$Limit\n#define __bss_start__                       Image$$bss$$Base\n#define __bss_end__                         Image$$bss$$ZI$$Limit\n#define __HeapBase                          Image$$ARM_LIB_HEAP$$Base\n#define __end__                             __HeapBase\n/*\n#define end                                 __HeapBase\n*/\n#define __HeapLimit                         Image$$ARM_LIB_HEAP$$ZI$$Limit\n#define __StackTop                          Image$$ARM_LIB_STACK$$ZI$$Limit\n#define __stack                             __StackTop\n#define __StackLimit                        Image$$ARM_LIB_STACK$$Base\n\n#define __boot_sram_start_flash__           __HeapLimit\n#define __boot_sram_start__                 __HeapLimit\n#define __boot_sram_end_flash__             __HeapLimit\n#define __boot_bss_sram_start__             __HeapLimit\n#define __boot_bss_sram_end__               __HeapLimit\n#define __fast_sram_text_data_start_flash__ __HeapLimit\n#define __fast_sram_text_data_start__       __HeapLimit\n#define __fast_sram_text_data_end__         __HeapLimit\n#define __fast_sram_text_data_end_flash__   __HeapLimit\n#define __sram_text_data_start_flash__      __HeapLimit\n#define __sram_text_data_start__            __HeapLimit\n#define __sram_text_data_end_flash__        __HeapLimit\n#define __sram_bss_start__                  __HeapLimit\n#define __sram_bss_end__                    __HeapLimit\n#define __cp_stack_limit                    __HeapLimit\n#define __cp_stack_top                      __HeapLimit\n\n#else\n\n#define Boot_Loader                         __main\n#define __flash_start                       Image$$boot_struct$$Base\n#define __userdata_pool_end__               Image$$userdata_pool$$Base\n#define __boot_sram_start_flash__           Load$$boot_text_sram$$Base\n#define __boot_sram_start__                 Image$$boot_text_sram$$Base\n#define __boot_sram_end_flash__             Load$$boot_data_sram$$Limit\n/*\n * CAUTION:\n * If the section name of BSS variables has no \".bss.\" prefix, they will be considered as DATA, not BSS (ZI) !\n */\n#define __boot_bss_sram_start__             Image$$boot_bss_sram$$Base\n#define __boot_bss_sram_end__               Image$$boot_bss_sram$$ZI$$Limit\n#define __fast_sram_text_data_start_flash__ Load$$fast_text_sram$$Base\n#define __fast_sram_text_data_start__       Image$$fast_text_sram$$Base\n#define __fast_sram_text_data_end__         Image$$fast_text_sram$$Limit\n#define __fast_sram_text_data_end_flash__   Load$$fast_text_sram$$Limit\n\n#define __cp_text_sram_start_flash__        Load$$cp_text_sram$$Base\n#define __cp_text_sram_exec_start__         Image$$cp_text_sram$$Base\n#define __cp_text_sram_exec_end__           Image$$cp_text_sram$$Limit\n#define __cp_text_sram_start                Image$$cp_text_sram_start$$Base\n#define __cp_text_sram_end                  Image$$cp_text_sram_start$$Limit\n#define __cp_data_sram_start_flash__        Load$$cp_data_sram$$Base\n#define __cp_data_sram_start                Image$$cp_data_sram$$Base\n#define __cp_data_sram_end                  Image$$cp_data_sram$$Limit\n#define __cp_sram_end_flash__               Load$$cp_data_sram$$Limit\n#define __cp_bss_sram_start                 Image$$cp_bss_sram$$Base\n#define __cp_bss_sram_end                   Image$$cp_bss_sram$$ZI$$Limit\n#define __cp_stack_limit                    Image$$cp_stack$$Base\n#define __cp_stack_top                      Image$$cp_stack$$ZI$$Limit\n\n#define __overlay_text_start__              Image$$overlay_start$$Base\n#define __overlay_text_exec_start__         Image$$overlay_text0$$Base\n\n#define __load_start_overlay_text0          Load$$overlay_text0$$Base\n#define __load_stop_overlay_text0           Load$$overlay_text0$$Limit\n#define __load_start_overlay_text1          Load$$overlay_text1$$Base\n#define __load_stop_overlay_text1           Load$$overlay_text1$$Limit\n#define __load_start_overlay_text2          Load$$overlay_text2$$Base\n#define __load_stop_overlay_text2           Load$$overlay_text2$$Limit\n#define __load_start_overlay_text3          Load$$overlay_text3$$Base\n#define __load_stop_overlay_text3           Load$$overlay_text3$$Limit\n#define __load_start_overlay_text4          Load$$overlay_text4$$Base\n#define __load_stop_overlay_text4           Load$$overlay_text4$$Limit\n#define __load_start_overlay_text5          Load$$overlay_text5$$Base\n#define __load_stop_overlay_text5           Load$$overlay_text5$$Limit\n#define __load_start_overlay_text6          Load$$overlay_text6$$Base\n#define __load_stop_overlay_text6           Load$$overlay_text6$$Limit\n#define __load_start_overlay_text7          Load$$overlay_text7$$Base\n#define __load_stop_overlay_text7           Load$$overlay_text7$$Limit\n\n#define __overlay_text_exec_end__           Image$$overlay_text_end$$Base\n#define __overlay_data_start__              Image$$overlay_data0$$Base\n\n#define __load_start_overlay_data0          Load$$overlay_data0$$Base\n#define __load_stop_overlay_data0           Load$$overlay_data0$$Limit\n#define __load_start_overlay_data1          Load$$overlay_data1$$Base\n#define __load_stop_overlay_data1           Load$$overlay_data1$$Limit\n#define __load_start_overlay_data2          Load$$overlay_data2$$Base\n#define __load_stop_overlay_data2           Load$$overlay_data2$$Limit\n#define __load_start_overlay_data3          Load$$overlay_data3$$Base\n#define __load_stop_overlay_data3           Load$$overlay_data3$$Limit\n#define __load_start_overlay_data4          Load$$overlay_data4$$Base\n#define __load_stop_overlay_data4           Load$$overlay_data4$$Limit\n#define __load_start_overlay_data5          Load$$overlay_data5$$Base\n#define __load_stop_overlay_data5           Load$$overlay_data5$$Limit\n#define __load_start_overlay_data6          Load$$overlay_data6$$Base\n#define __load_stop_overlay_data6           Load$$overlay_data6$$Limit\n#define __load_start_overlay_data7          Load$$overlay_data7$$Base\n#define __load_stop_overlay_data7           Load$$overlay_data7$$Limit\n\n#define __sram_text_data_start_flash__      Load$$sram_text$$Base\n#define __sram_text_data_start__            Image$$sram_text$$Base\n#define __sram_text_data_end_flash__        Load$$sram_data$$Limit\n#define __sram_bss_start__                  Image$$sram_bss$$Base\n#define __sram_bss_end__                    Image$$sram_bss$$ZI$$Limit\n#define __etext                             Load$$data$$Base\n#define __data_start__                      Image$$data$$Base\n#define __data_end__                        Image$$data$$Limit\n#define __bss_start__                       Image$$bss$$Base\n#define __bss_end__                         Image$$bss$$ZI$$Limit\n#define __HeapBase                          Image$$ARM_LIB_HEAP$$Base\n#define __end__                             __HeapBase\n/*\n#define end                                 __HeapBase\n*/\n#define __HeapLimit                         Image$$ARM_LIB_HEAP$$ZI$$Limit\n#define __StackTop                          Image$$ARM_LIB_STACK$$ZI$$Limit\n#define __stack                             __StackTop\n#define __StackLimit                        Image$$ARM_LIB_STACK$$Base\n#define __flash_end                         Image$$code_start_addr$$Limit\n#define __custom_parameter_start            Image$$custom_parameter$$Base\n#define __custom_parameter_end              Image$$custom_parameter$$ZI$$Limit\n#define __lhdc_license_start                Image$$lhdc_license$$Base\n#define __lhdc_license_end                  Image$$lhdc_license$$ZI$$Limit\n#define __userdata_start                    Image$$userdata$$Base\n#define __userdata_end                      Image$$userdata$$ZI$$Limit\n#define __aud_start                         Image$$audio$$Base\n#define __aud_end                           Image$$audio$$ZI$$Limit\n#define __reserved_start                    Image$$reserved$$Base\n#define __reserved_end                      Image$$reserved$$ZI$$Limit\n#define __hotword_model_start               Image$$hotword_model$$Base\n#define __hotword_model_end                 Image$$hotword_model$$ZI$$Limit\n#define __factory_start                     Image$$factory$$Base\n#define __factory_end                       Image$$factory$$ZI$$Limit\n\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/cmsis/inc/main_entry.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __MAIN_ENTRY_H__\n#define __MAIN_ENTRY_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef NOSTD\n#define MAIN_ENTRY(...)                 _start(__VA_ARGS__)\n#else\n#define MAIN_ENTRY(...)                 main(__VA_ARGS__)\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/mpu.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __MPU_H__\n#define __MPU_H__\n\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum MPU_ID_T {\n    MPU_ID_NULL_POINTER = 0,\n    MPU_ID_1,\n    MPU_ID_2,\n    MPU_ID_3,\n    MPU_ID_4,\n    MPU_ID_5,\n    MPU_ID_6,\n    MPU_ID_7,\n\n    MPU_ID_QTY,\n};\n\n/*mcu sections */\n#define MPU_ID_USER_DATA_SECTION    MPU_ID_1\n#define MPU_ID_FRAM_TEXT1           MPU_ID_2\n#define MPU_ID_FRAM_TEXT2           MPU_ID_3\n#define MPU_ID_CODE                 MPU_ID_4\n#define MPU_ID_SRAM_TEXT            MPU_ID_5\n\n/*cp sections */\n#define MPU_ID_CP_FLASHX            MPU_ID_2\n#define MPU_ID_CP_FLASH             MPU_ID_3\n#define MPU_ID_CP_FLASH_NC          MPU_ID_4\n\nenum MPU_ATTR_T {\n    MPU_ATTR_READ_WRITE_EXEC = 0,\n    MPU_ATTR_READ_EXEC,\n    MPU_ATTR_EXEC,\n    MPU_ATTR_READ_WRITE,\n    MPU_ATTR_READ,\n    MPU_ATTR_NO_ACCESS,\n\n    MPU_ATTR_QTY,\n};\n\n#if defined(__ARM_ARCH_8M_MAIN__)\n\nenum MAIR_ATTR_TYPE_T {\n    MAIR_ATTR_FLASH,\n    MAIR_ATTR_INT_SRAM,\n    MAIR_ATTR_EXT_SRAM,\n    MAIR_ATTR_DEVICE,\n    MAIR_ATTR_4,\n    MAIR_ATTR_5,\n    MAIR_ATTR_6,\n    MAIR_ATTR_7,\n\n    MAIR_ATTR_QTY,\n};\n#endif\n\ntypedef struct\n{\n    uint32_t addr;\n    uint32_t len;\n    enum MPU_ATTR_T ap_attr;\n#if defined(__ARM_ARCH_8M_MAIN__)\n    enum MAIR_ATTR_TYPE_T mem_attr;\n#endif\n} mpu_regions_t;\n\nint mpu_open(void);\n\nint mpu_close(void);\n\n// VALID LENGTH: 32, 64, 128, 256, 512, 1K, 2K, ..., 4G\n// ADDR must be aligned to len\n// Note, srd_bits, mpu subregion bits, which can be divided to 8 sub regions\n// per region, if don't need, always set the arguments to 0;\nint mpu_set(enum MPU_ID_T id, uint32_t addr, uint32_t len, int srd_bits,\n                                                    enum MPU_ATTR_T attr);\n\nint mpu_clear(enum MPU_ID_T id);\n\n/*mpu setup for mcu */\nint mpu_setup(void);\n\n/*mpu setup for cp mcu */\nint mpu_setup_cp(const mpu_regions_t *mpu_table, uint32_t region_num);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/cmsis/inc/mpu_armv7.h",
    "content": "/******************************************************************************\n * @file     mpu_armv7.h\n * @brief    CMSIS MPU API for Armv7-M MPU\n * @version  V5.1.0\n * @date     08. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2017-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#ifndef __uint32_t_defined\ntypedef unsigned int uint32_t;\n# define __uint32_t_defined\n#endif\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header    /* treat file as system include file */\n#endif\n\n#ifndef ARM_MPU_ARMV7_H\n#define ARM_MPU_ARMV7_H\n\n#define ARM_MPU_REGION_SIZE_32B      ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes\n#define ARM_MPU_REGION_SIZE_64B      ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes\n#define ARM_MPU_REGION_SIZE_128B     ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes\n#define ARM_MPU_REGION_SIZE_256B     ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes\n#define ARM_MPU_REGION_SIZE_512B     ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes\n#define ARM_MPU_REGION_SIZE_1KB      ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte\n#define ARM_MPU_REGION_SIZE_2KB      ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes\n#define ARM_MPU_REGION_SIZE_4KB      ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes\n#define ARM_MPU_REGION_SIZE_8KB      ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes\n#define ARM_MPU_REGION_SIZE_16KB     ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes\n#define ARM_MPU_REGION_SIZE_32KB     ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes\n#define ARM_MPU_REGION_SIZE_64KB     ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes\n#define ARM_MPU_REGION_SIZE_128KB    ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes\n#define ARM_MPU_REGION_SIZE_256KB    ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes\n#define ARM_MPU_REGION_SIZE_512KB    ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes\n#define ARM_MPU_REGION_SIZE_1MB      ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte\n#define ARM_MPU_REGION_SIZE_2MB      ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes\n#define ARM_MPU_REGION_SIZE_4MB      ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes\n#define ARM_MPU_REGION_SIZE_8MB      ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes\n#define ARM_MPU_REGION_SIZE_16MB     ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes\n#define ARM_MPU_REGION_SIZE_32MB     ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes\n#define ARM_MPU_REGION_SIZE_64MB     ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes\n#define ARM_MPU_REGION_SIZE_128MB    ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes\n#define ARM_MPU_REGION_SIZE_256MB    ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes\n#define ARM_MPU_REGION_SIZE_512MB    ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes\n#define ARM_MPU_REGION_SIZE_1GB      ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte\n#define ARM_MPU_REGION_SIZE_2GB      ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes\n#define ARM_MPU_REGION_SIZE_4GB      ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes\n\n#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access\n#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only\n#define ARM_MPU_AP_URO  2U ///!< MPU Access Permission unprivileged access read-only\n#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access\n#define ARM_MPU_AP_PRO  5U ///!< MPU Access Permission privileged access read-only\n#define ARM_MPU_AP_RO   6U ///!< MPU Access Permission read-only access\n\n/** MPU Region Base Address Register Value\n*\n* \\param Region The region to be configured, number 0 to 15.\n* \\param BaseAddress The base address for the region.\n*/\n#define ARM_MPU_RBAR(Region, BaseAddress) \\\n  (((BaseAddress) & MPU_RBAR_ADDR_Msk) |  \\\n   ((Region) & MPU_RBAR_REGION_Msk)    |  \\\n   (MPU_RBAR_VALID_Msk))\n\n/**\n* MPU Memory Access Attributes\n*\n* \\param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.\n* \\param IsShareable       Region is shareable between multiple bus masters.\n* \\param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.\n* \\param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.\n*/\n#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable)   \\\n  ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                  | \\\n   (((IsShareable)  << MPU_RASR_S_Pos)   & MPU_RASR_S_Msk)                    | \\\n   (((IsCacheable)  << MPU_RASR_C_Pos)   & MPU_RASR_C_Msk)                    | \\\n   (((IsBufferable) << MPU_RASR_B_Pos)   & MPU_RASR_B_Msk))\n\n/**\n* MPU Region Attribute and Size Register Value\n*\n* \\param DisableExec       Instruction access disable bit, 1= disable instruction fetches.\n* \\param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.\n* \\param AccessAttributes  Memory access attribution, see \\ref ARM_MPU_ACCESS_.\n* \\param SubRegionDisable  Sub-region disable field.\n* \\param Size              Region size of the region to be configured, for example 4K, 8K.\n*/\n#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)    \\\n  ((((DisableExec)      << MPU_RASR_XN_Pos)   & MPU_RASR_XN_Msk)                                  | \\\n   (((AccessPermission) << MPU_RASR_AP_Pos)   & MPU_RASR_AP_Msk)                                  | \\\n   (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \\\n   (((SubRegionDisable) << MPU_RASR_SRD_Pos)  & MPU_RASR_SRD_Msk)                                 | \\\n   (((Size)             << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk)                                | \\\n   (((MPU_RASR_ENABLE_Msk))))\n\n/**\n* MPU Region Attribute and Size Register Value\n*\n* \\param DisableExec       Instruction access disable bit, 1= disable instruction fetches.\n* \\param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.\n* \\param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.\n* \\param IsShareable       Region is shareable between multiple bus masters.\n* \\param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.\n* \\param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.\n* \\param SubRegionDisable  Sub-region disable field.\n* \\param Size              Region size of the region to be configured, for example 4K, 8K.\n*/\n#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \\\n  ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)\n\n/**\n* MPU Memory Access Attribute for strongly ordered memory.\n*  - TEX: 000b\n*  - Shareable\n*  - Non-cacheable\n*  - Non-bufferable\n*/\n#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)\n\n/**\n* MPU Memory Access Attribute for device memory.\n*  - TEX: 000b (if shareable) or 010b (if non-shareable)\n*  - Shareable or non-shareable\n*  - Non-cacheable\n*  - Bufferable (if shareable) or non-bufferable (if non-shareable)\n*\n* \\param IsShareable Configures the device memory as shareable or non-shareable.\n*/\n#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))\n\n/**\n* MPU Memory Access Attribute for normal memory.\n*  - TEX: 1BBb (reflecting outer cacheability rules)\n*  - Shareable or non-shareable\n*  - Cacheable or non-cacheable (reflecting inner cacheability rules)\n*  - Bufferable or non-bufferable (reflecting inner cacheability rules)\n*\n* \\param OuterCp Configures the outer cache policy.\n* \\param InnerCp Configures the inner cache policy.\n* \\param IsShareable Configures the memory as shareable or non-shareable.\n*/\n#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))\n\n/**\n* MPU Memory Access Attribute non-cacheable policy.\n*/\n#define ARM_MPU_CACHEP_NOCACHE 0U\n\n/**\n* MPU Memory Access Attribute write-back, write and read allocate policy.\n*/\n#define ARM_MPU_CACHEP_WB_WRA 1U\n\n/**\n* MPU Memory Access Attribute write-through, no write allocate policy.\n*/\n#define ARM_MPU_CACHEP_WT_NWA 2U\n\n/**\n* MPU Memory Access Attribute write-back, no write allocate policy.\n*/\n#define ARM_MPU_CACHEP_WB_NWA 3U\n\n\n/**\n* Struct for a single MPU Region\n*/\ntypedef struct {\n  uint32_t RBAR; //!< The region base address register value (RBAR)\n  uint32_t RASR; //!< The region attribute and size register value (RASR) \\ref MPU_RASR\n} ARM_MPU_Region_t;\n\n/** Enable the MPU.\n* \\param MPU_Control Default access permissions for unconfigured regions.\n*/\n__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)\n{\n  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;\n#ifdef SCB_SHCSR_MEMFAULTENA_Msk\n  //SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;\n#endif\n  __DSB();\n  __ISB();\n}\n\n/** Disable the MPU.\n*/\n__STATIC_INLINE void ARM_MPU_Disable(void)\n{\n  __DMB();\n#ifdef SCB_SHCSR_MEMFAULTENA_Msk\n  //SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;\n#endif\n  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;\n}\n\n/** Clear and disable the given MPU region.\n* \\param rnr Region number to be cleared.\n*/\n__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)\n{\n  MPU->RNR = rnr;\n  MPU->RASR = 0U;\n}\n\n/** Configure an MPU region.\n* \\param rbar Value for RBAR register.\n* \\param rsar Value for RSAR register.\n*/\n__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)\n{\n  MPU->RBAR = rbar;\n  MPU->RASR = rasr;\n}\n\n/** Configure the given MPU region.\n* \\param rnr Region number to be configured.\n* \\param rbar Value for RBAR register.\n* \\param rsar Value for RSAR register.\n*/\n__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)\n{\n  MPU->RNR = rnr;\n  MPU->RBAR = rbar;\n  MPU->RASR = rasr;\n}\n\n/** Configure the given MPU region.\n* \\param rnr Region number to be configured.\n* \\param rbar Value for RBAR register.\n* \\param rsar Value for RSAR register.\n*/\n__STATIC_INLINE void ARM_MPU_SetSubRegion(uint32_t rnr, uint32_t subRegion)\n{\n  uint32_t rasr;\n\n  MPU->RNR = rnr;\n  rasr = MPU->RASR;\n  rasr &= ~MPU_RASR_SRD_Msk;\n  rasr |= (subRegion << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk;\n\n  MPU->RASR = rasr;\n}\n\n/** Memcopy with strictly ordered memory access, e.g. for register targets.\n* \\param dst Destination data is copied to.\n* \\param src Source data is copied from.\n* \\param len Amount of data words to be copied.\n*/\n__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)\n{\n  uint32_t i;\n  for (i = 0U; i < len; ++i)\n  {\n    dst[i] = src[i];\n  }\n}\n\n/** Load the given number of MPU regions from a table.\n* \\param table Pointer to the MPU configuration table.\n* \\param cnt Amount of regions to be configured.\n*/\n__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)\n{\n  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;\n  while (cnt > MPU_TYPE_RALIASES) {\n    ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);\n    table += MPU_TYPE_RALIASES;\n    cnt -= MPU_TYPE_RALIASES;\n  }\n  ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);\n}\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/mpu_armv8.h",
    "content": "/******************************************************************************\n * @file     mpu_armv8.h\n * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU\n * @version  V5.1.0\n * @date     08. March 2019\n ******************************************************************************/\n/*\n * Copyright (c) 2017-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header    /* treat file as system include file */\n#endif\n\n#ifndef ARM_MPU_ARMV8_H\n#define ARM_MPU_ARMV8_H\n\n/** \\brief Attribute for device memory (outer only) */\n#define ARM_MPU_ATTR_DEVICE                           ( 0U )\n\n/** \\brief Attribute for non-cacheable, normal memory */\n#define ARM_MPU_ATTR_NON_CACHEABLE                    ( 4U )\n\n/** \\brief Attribute for normal memory (outer and inner)\n* \\param NT Non-Transient: Set to 1 for non-transient data.\n* \\param WB Write-Back: Set to 1 to use write-back update policy.\n* \\param RA Read Allocation: Set to 1 to use cache allocation on read miss.\n* \\param WA Write Allocation: Set to 1 to use cache allocation on write miss.\n*/\n#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \\\n  (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))\n\n/** \\brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */\n#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)\n\n/** \\brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */\n#define ARM_MPU_ATTR_DEVICE_nGnRE  (1U)\n\n/** \\brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */\n#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)\n\n/** \\brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */\n#define ARM_MPU_ATTR_DEVICE_GRE    (3U)\n\n/** \\brief Memory Attribute\n* \\param O Outer memory attributes\n* \\param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes\n*/\n#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))\n\n/** \\brief Normal memory non-shareable  */\n#define ARM_MPU_SH_NON   (0U)\n\n/** \\brief Normal memory outer shareable  */\n#define ARM_MPU_SH_OUTER (2U)\n\n/** \\brief Normal memory inner shareable  */\n#define ARM_MPU_SH_INNER (3U)\n\n/** \\brief Memory access permissions\n* \\param RO Read-Only: Set to 1 for read-only memory.\n* \\param NP Non-Privileged: Set to 1 for non-privileged memory.\n*/\n#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))\n\n/** \\brief Region Base Address Register value\n* \\param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.\n* \\param SH Defines the Shareability domain for this memory region.\n* \\param RO Read-Only: Set to 1 for a read-only memory region.\n* \\param NP Non-Privileged: Set to 1 for a non-privileged memory region.\n* \\oaram XN eXecute Never: Set to 1 for a non-executable memory region.\n*/\n#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \\\n  ((BASE & MPU_RBAR_BASE_Msk) | \\\n  ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \\\n  ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \\\n  ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))\n\n/** \\brief Region Limit Address Register value\n* \\param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.\n* \\param IDX The attribute index to be associated with this memory region.\n*/\n#define ARM_MPU_RLAR(LIMIT, IDX) \\\n  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \\\n  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \\\n  (MPU_RLAR_EN_Msk))\n\n#if defined(MPU_RLAR_PXN_Pos)\n  \n/** \\brief Region Limit Address Register with PXN value\n* \\param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.\n* \\param PXN Privileged execute never. Defines whether code can be executed from this privileged region.\n* \\param IDX The attribute index to be associated with this memory region.\n*/\n#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \\\n  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \\\n  ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \\\n  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \\\n  (MPU_RLAR_EN_Msk))\n  \n#endif\n\n/**\n* Struct for a single MPU Region\n*/\ntypedef struct {\n  uint32_t RBAR;                   /*!< Region Base Address Register value */\n  uint32_t RLAR;                   /*!< Region Limit Address Register value */\n} ARM_MPU_Region_t;\n    \n/** Enable the MPU.\n* \\param MPU_Control Default access permissions for unconfigured regions.\n*/\n__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)\n{\n  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;\n#ifdef SCB_SHCSR_MEMFAULTENA_Msk\n  //SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;\n#endif\n  __DSB();\n  __ISB();\n}\n\n/** Disable the MPU.\n*/\n__STATIC_INLINE void ARM_MPU_Disable(void)\n{\n  __DMB();\n#ifdef SCB_SHCSR_MEMFAULTENA_Msk\n  //SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;\n#endif\n  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;\n}\n\n#ifdef MPU_NS\n/** Enable the Non-secure MPU.\n* \\param MPU_Control Default access permissions for unconfigured regions.\n*/\n__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)\n{\n  MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;\n#ifdef SCB_SHCSR_MEMFAULTENA_Msk\n  //SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;\n#endif\n  __DSB();\n  __ISB();\n}\n\n/** Disable the Non-secure MPU.\n*/\n__STATIC_INLINE void ARM_MPU_Disable_NS(void)\n{\n  __DMB();\n#ifdef SCB_SHCSR_MEMFAULTENA_Msk\n  //SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;\n#endif\n  MPU_NS->CTRL  &= ~MPU_CTRL_ENABLE_Msk;\n}\n#endif\n\n/** Set the memory attribute encoding to the given MPU.\n* \\param mpu Pointer to the MPU to be configured.\n* \\param idx The attribute index to be set [0-7]\n* \\param attr The attribute value to be set.\n*/\n__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)\n{\n  const uint8_t reg = idx / 4U;\n  const uint32_t pos = ((idx % 4U) * 8U);\n  const uint32_t mask = 0xFFU << pos;\n  \n  if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {\n    return; // invalid index\n  }\n  \n  mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));\n}\n\n/** Set the memory attribute encoding.\n* \\param idx The attribute index to be set [0-7]\n* \\param attr The attribute value to be set.\n*/\n__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)\n{\n  ARM_MPU_SetMemAttrEx(MPU, idx, attr);\n}\n\n#ifdef MPU_NS\n/** Set the memory attribute encoding to the Non-secure MPU.\n* \\param idx The attribute index to be set [0-7]\n* \\param attr The attribute value to be set.\n*/\n__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)\n{\n  ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);\n}\n#endif\n\n/** Clear and disable the given MPU region of the given MPU.\n* \\param mpu Pointer to MPU to be used.\n* \\param rnr Region number to be cleared.\n*/\n__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)\n{\n  mpu->RNR = rnr;\n  mpu->RLAR = 0U;\n}\n\n/** Clear and disable the given MPU region.\n* \\param rnr Region number to be cleared.\n*/\n__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)\n{\n  ARM_MPU_ClrRegionEx(MPU, rnr);\n}\n\n#ifdef MPU_NS\n/** Clear and disable the given Non-secure MPU region.\n* \\param rnr Region number to be cleared.\n*/\n__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)\n{  \n  ARM_MPU_ClrRegionEx(MPU_NS, rnr);\n}\n#endif\n\n/** Configure the given MPU region of the given MPU.\n* \\param mpu Pointer to MPU to be used.\n* \\param rnr Region number to be configured.\n* \\param rbar Value for RBAR register.\n* \\param rlar Value for RLAR register.\n*/   \n__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)\n{\n  mpu->RNR = rnr;\n  mpu->RBAR = rbar;\n  mpu->RLAR = rlar;\n}\n\n/** Configure the given MPU region.\n* \\param rnr Region number to be configured.\n* \\param rbar Value for RBAR register.\n* \\param rlar Value for RLAR register.\n*/   \n__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)\n{\n  ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);\n}\n\n#ifdef MPU_NS\n/** Configure the given Non-secure MPU region.\n* \\param rnr Region number to be configured.\n* \\param rbar Value for RBAR register.\n* \\param rlar Value for RLAR register.\n*/   \n__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)\n{\n  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  \n}\n#endif\n\n/** Memcopy with strictly ordered memory access, e.g. for register targets.\n* \\param dst Destination data is copied to.\n* \\param src Source data is copied from.\n* \\param len Amount of data words to be copied.\n*/\n__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)\n{\n  uint32_t i;\n  for (i = 0U; i < len; ++i) \n  {\n    dst[i] = src[i];\n  }\n}\n\n/** Load the given number of MPU regions from a table to the given MPU.\n* \\param mpu Pointer to the MPU registers to be used.\n* \\param rnr First region number to be configured.\n* \\param table Pointer to the MPU configuration table.\n* \\param cnt Amount of regions to be configured.\n*/\n__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) \n{\n  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;\n  if (cnt == 1U) {\n    mpu->RNR = rnr;\n    ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);\n  } else {\n    uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);\n    uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;\n    \n    mpu->RNR = rnrBase;\n    while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {\n      uint32_t c = MPU_TYPE_RALIASES - rnrOffset;\n      ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);\n      table += c;\n      cnt -= c;\n      rnrOffset = 0U;\n      rnrBase += MPU_TYPE_RALIASES;\n      mpu->RNR = rnrBase;\n    }\n    \n    ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);\n  }\n}\n\n/** Load the given number of MPU regions from a table.\n* \\param rnr First region number to be configured.\n* \\param table Pointer to the MPU configuration table.\n* \\param cnt Amount of regions to be configured.\n*/\n__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) \n{\n  ARM_MPU_LoadEx(MPU, rnr, table, cnt);\n}\n\n#ifdef MPU_NS\n/** Load the given number of MPU regions from a table to the Non-secure MPU.\n* \\param rnr First region number to be configured.\n* \\param table Pointer to the MPU configuration table.\n* \\param cnt Amount of regions to be configured.\n*/\n__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) \n{\n  ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/cmsis/inc/patch.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PATCH_H__\n#define __PATCH_H__\n\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum PATCH_TYPE_T {\n    PATCH_TYPE_CODE,\n    PATCH_TYPE_DATA,\n    PATCH_TYPE_FUNC,\n\n    PATCH_TYPE_QTY\n};\n\ntypedef int PATCH_ID;\n\nint patch_open(uint32_t remap_addr);\n\nPATCH_ID patch_enable(enum PATCH_TYPE_T type, uint32_t addr, uint32_t data);\n\nint patch_disable(PATCH_ID patch_id);\n\nvoid patch_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/system_ARMCM.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SYSTEM_ARMCM_H__\n#define __SYSTEM_ARMCM_H__\n#include \"cmsis_compiler.h\"\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdbool.h\"\n\nvoid SystemInit(void);\n\n#ifdef UNALIGNED_ACCESS\n\n__STATIC_FORCEINLINE bool get_unaligned_access_status(void) { return true; }\n\n__STATIC_FORCEINLINE bool config_unaligned_access(bool enable) { return true; }\n\n#else\n\nbool get_unaligned_access_status(void);\n\nbool config_unaligned_access(bool enable);\n\n#endif\n\nuint32_t get_cpu_id(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/system_cp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SYSTEM_CP_H__\n#define __SYSTEM_CP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n\nvoid system_cp_reset_handler(void);\n\nvoid system_cp_init(int load_code);\n\nvoid system_cp_term(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/inc/tz_context.h",
    "content": "/******************************************************************************\n * @file     tz_context.h\n * @brief    Context Management for Armv8-M TrustZone\n * @version  V1.0.1\n * @date     10. January 2018\n ******************************************************************************/\n/*\n * Copyright (c) 2017-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n\n#if   defined ( __ICCARM__ )\n  #pragma system_include         /* treat file as system include file for MISRA check */\n#elif defined (__clang__)\n  #pragma clang system_header   /* treat file as system include file */\n#endif\n\n#ifndef TZ_CONTEXT_H\n#define TZ_CONTEXT_H\n \n#include \n \n#ifndef TZ_MODULEID_T\n#define TZ_MODULEID_T\n/// \\details Data type that identifies secure software modules called by a process.\ntypedef uint32_t TZ_ModuleId_t;\n#endif\n \n/// \\details TZ Memory ID identifies an allocated memory slot.\ntypedef uint32_t TZ_MemoryId_t;\n  \n/// Initialize secure context memory system\n/// \\return execution status (1: success, 0: error)\nuint32_t TZ_InitContextSystem_S (void);\n \n/// Allocate context memory for calling secure software modules in TrustZone\n/// \\param[in]  module   identifies software modules called from non-secure mode\n/// \\return value != 0 id TrustZone memory slot identifier\n/// \\return value 0    no memory available or internal error\nTZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);\n \n/// Free context memory that was previously allocated with \\ref TZ_AllocModuleContext_S\n/// \\param[in]  id  TrustZone memory slot identifier\n/// \\return execution status (1: success, 0: error)\nuint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);\n \n/// Load secure context (called on RTOS thread context switch)\n/// \\param[in]  id  TrustZone memory slot identifier\n/// \\return execution status (1: success, 0: error)\nuint32_t TZ_LoadContext_S (TZ_MemoryId_t id);\n \n/// Store secure context (called on RTOS thread context switch)\n/// \\param[in]  id  TrustZone memory slot identifier\n/// \\return execution status (1: success, 0: error)\nuint32_t TZ_StoreContext_S (TZ_MemoryId_t id);\n \n#endif  // TZ_CONTEXT_H\n"
  },
  {
    "path": "platform/cmsis/mpu_armv7m.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ARM_ARCH_ISA_ARM\n\n#include \"cmsis.h\"\n#include \"hal_trace.h\"\n#include \"mpu.h\"\n\nint mpu_open(void) {\n  int i;\n\n  if ((MPU->TYPE & MPU_TYPE_DREGION_Msk) == 0) {\n    return 1;\n  }\n\n  ARM_MPU_Disable();\n\n  for (i = 0; i < MPU_ID_QTY; i++) {\n    ARM_MPU_ClrRegion(i);\n  }\n\n  ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);\n\n  return 0;\n}\n\nint mpu_close(void) {\n  ARM_MPU_Disable();\n\n  return 0;\n}\n\nstatic int mpu_set_armv7(enum MPU_ID_T id, uint32_t addr, uint32_t len,\n                         int srd_bits, enum MPU_ATTR_T attr) {\n  int ret;\n  uint32_t rbar;\n  uint32_t rasr;\n  uint8_t xn;\n  uint8_t ap;\n  uint8_t size;\n\n  if ((MPU->CTRL & MPU_CTRL_ENABLE_Msk) == 0) {\n    ret = mpu_open();\n    if (ret) {\n      return ret;\n    }\n  }\n\n  if (id >= MPU_ID_QTY) {\n    return 2;\n  }\n  if (len < 32 || (len & (len - 1))) {\n    return 3;\n  }\n  if (addr & (len - 1)) {\n    return 4;\n  }\n  if (attr >= MPU_ATTR_QTY) {\n    return 5;\n  }\n\n  if (attr == MPU_ATTR_READ_WRITE_EXEC || attr == MPU_ATTR_READ_EXEC ||\n      attr == MPU_ATTR_EXEC) {\n    xn = 0;\n  } else {\n    xn = 1;\n  }\n\n  ap = ARM_MPU_AP_NONE;\n  if (attr == MPU_ATTR_READ_WRITE_EXEC || attr == MPU_ATTR_READ_WRITE) {\n    ap = ARM_MPU_AP_FULL;\n  } else if (attr == MPU_ATTR_READ_EXEC || attr == MPU_ATTR_READ) {\n    ap = ARM_MPU_AP_RO;\n  }\n\n  size = __CLZ(__RBIT(len)) - 1;\n\n  ARM_MPU_Disable();\n  rbar = ARM_MPU_RBAR(id, addr);\n  // Type Extention: 0\n  // Shareable: 1\n  // Cacheable: 1\n  // Bufferable: 1\n  // Subregion: 0\n  rasr = ARM_MPU_RASR(xn, ap, 0, 1, 1, 1, srd_bits, size);\n\n  ARM_MPU_SetRegion(rbar, rasr);\n  ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);\n  __DSB();\n  __ISB();\n\n  return 0;\n}\n\n/*\n * sub region is 8 bits, and if one bits is 1, the sub resion will be\n * disabled\n * like 0b00011111, the top 3 sub region will be disabled\n * if it is 0b11110000, the bottom 4 sub region will be disabled.\n */\nstatic int mpu_get_top_srd(uint32_t rg_end, uint32_t fr_end,\n                           uint32_t sub_rg_sz) {\n  int dis_nums;\n  uint8_t srd_bits;\n\n  dis_nums = (rg_end - fr_end) / sub_rg_sz;\n  if ((fr_end & (sub_rg_sz - 1)) != 0)\n    dis_nums += 1;\n\n  srd_bits = 0xff;\n  srd_bits &= ~((1UL << (8 - dis_nums)) - 1);\n\n  return srd_bits;\n}\n\nstatic int mpu_get_bottom_srd(uint32_t rg_start, uint32_t fr_start,\n                              uint32_t sub_rg_sz) {\n  int dis_nums;\n  uint8_t srd_bits;\n\n  dis_nums = (fr_start - rg_start) / sub_rg_sz;\n  srd_bits = 0xff;\n  srd_bits &= ((1UL << dis_nums) - 1);\n\n  return srd_bits;\n}\n\nstatic int calc_sub_region_size(uint32_t fr_start) {\n  int lsb_bit;\n  uint32_t sz;\n\n  // sub region size aligned to fram start\n  lsb_bit = get_lsb_pos(fr_start);\n  sz = 1 << lsb_bit;\n  if (sz < 0x80) {\n    /*cortex-m4 doesn't support sub region size less than 128 */\n    TRACE(1, \"no mpu region for fram start %x\", fr_start);\n    return -1;\n  }\n  if (sz > 0x4000)\n    sz = 0x4000;\n\n  return sz;\n}\n\n/*\nAllocate two mpu sections to protect the fast ram.  The cortext M4\nmpu has a lot of restrict, such as one region's start address must\nbe aligned to the size of region, and the sub region number is fixed\nto 8.\nThe layout like:\n          ------------------\n          | sub region 8   |\n          ------------------\n          | sub region 7   |\n          | .....          |\n          |                |\n          ------------------>fast_ram_end\n          |////////////////|\n          |////////////////|\n          |////////////////|\n          |////////////////|\n          ------------------>mpu region2\n          |//sub region 8//|\n          |////////////////|\n          |////////////////|\n          |////////////////|\n          ------------------>fast_ram_start aligned to sub region size\n          | .....          |\n          |                |\n          |sub region 1    |\n          ------------------\n          |sub region 0    |\n          ------------------>mpu region1\n\nIf the __fast_sram_text_exec_end__ exceed the region2's end, just leave\nthe rest unprotect.\n*/\nstatic int mpu_fram_protect_armv7(uint32_t fr_start, uint32_t fr_end) {\n  uint32_t fr_sz;\n  uint32_t sub_rg_sz;\n  uint32_t rg_sz;\n  uint32_t rg_start;\n  uint32_t rg_end;\n  int ret = 0;\n  int srd_bits;\n  int finished = 0;\n\n  fr_sz = fr_end - fr_start;\n  sub_rg_sz = calc_sub_region_size(fr_start);\n  if (sub_rg_sz < 0)\n    return -1;\n\n  /* according to cortex-m4 spec, the region is divived to 8 sub region*/\n  rg_sz = sub_rg_sz * 8;\n  /*now we just protect two region */\n  if (fr_sz > (rg_sz * 2)) {\n    TRACE(0, \"Warning fram is too big, mpu can not protect so much\");\n    TRACE(2, \"region_sz %x, fram size %x\", rg_sz, fr_sz);\n  }\n\n  /*aliged the region start to region size according to cortext m4 spec*/\n  srd_bits = 0;\n  rg_start = fr_start & ~(rg_sz - 1);\n  if (fr_start > rg_start) {\n    int b_srd_bits = 0;\n\n    b_srd_bits = mpu_get_bottom_srd(rg_start, fr_start, sub_rg_sz);\n    srd_bits |= b_srd_bits;\n  }\n\n  rg_end = rg_start + rg_sz;\n  if (fr_end < rg_end) {\n    int t_srd_bits = 0;\n\n    t_srd_bits = mpu_get_top_srd(rg_end, fr_end, sub_rg_sz);\n    srd_bits |= t_srd_bits;\n    finished = 1;\n  }\n\n  ret = mpu_set(MPU_ID_FRAM_TEXT1, rg_start, rg_sz, srd_bits, MPU_ATTR_READ);\n  if (ret || finished)\n    goto out;\n\n  /* need another section, and start from next region*/\n  rg_start += rg_sz;\n\n  srd_bits = 0;\n  rg_end = rg_start + rg_sz;\n  if (fr_end < rg_end) {\n    srd_bits = mpu_get_top_srd(rg_end, fr_end, sub_rg_sz);\n  }\n\n  ret =\n      mpu_set(MPU_ID_FRAM_TEXT2, rg_start, rg_sz, srd_bits, MPU_ATTR_READ_EXEC);\n  /* if fr_end large than two section, just pass */\nout:\n  return ret;\n}\n\nint mpu_set(enum MPU_ID_T id, uint32_t addr, uint32_t len, int srd_bits,\n            enum MPU_ATTR_T attr) {\n  return mpu_set_armv7(id, addr, len, srd_bits, attr);\n}\n\nint mpu_clear(enum MPU_ID_T id) {\n  uint32_t lock;\n\n  if (id >= MPU_ID_QTY) {\n    return 2;\n  }\n\n  lock = int_lock();\n\n  ARM_MPU_ClrRegion(id);\n  __DSB();\n  __ISB();\n\n  int_unlock(lock);\n\n  return 0;\n}\n\nstatic int mpu_null_check_enable(void) {\n#ifdef CHIP_BEST1000\n  uint32_t len = 0x400;\n#else\n  uint32_t len = 0x800;\n#endif\n\n  return mpu_set(MPU_ID_NULL_POINTER, 0, len, 0, MPU_ATTR_NO_ACCESS);\n}\n\nextern uint32_t __fast_sram_text_exec_start__[];\nextern uint32_t __fast_sram_text_exec_end__[];\n\nstatic int mpu_fast_ram_protect(void) {\n  uint32_t ramx_start = (uint32_t)__fast_sram_text_exec_start__;\n  uint32_t ramx_end = (uint32_t)__fast_sram_text_exec_end__;\n  uint32_t ram_start = RAMX_TO_RAM(ramx_start);\n  uint32_t ram_end = RAMX_TO_RAM(ramx_end);\n\n  return mpu_fram_protect_armv7(ram_start, ram_end);\n}\n\n#if 0\nint mpu_fram_test(void)\n{\n    uint32_t ramx_start  = (uint32_t)__fast_sram_text_exec_start__;\n    uint32_t ram_start = RAMX_TO_RAM(ramx_start);\n    uint32_t test_start =  ram_start - 1024;\n\n    for (int i = 0; i < 1024; i++) {\n        TRACE(1,\"test_start %x\", test_start);\n        *(volatile uint32_t *)test_start = 0x1;\n        test_start += 128;\n    }\n\n    uint32_t ramx_end = (uint32_t)__fast_sram_text_exec_end__;\n    uint32_t ram_end = RAMX_TO_RAM(ramx_end);\n    uint32_t test_end =  ram_end + 1024;\n    for (int i = 0; i < 1024; i++) {\n        TRACE(1,\"test_end %x\", test_end);\n        *(volatile uint32_t *)test_end = 0x1;\n        test_end -= 128;\n    }\n\n    return 0;\n}\n#endif\n\nint mpu_setup(void) {\n  mpu_null_check_enable();\n  mpu_fast_ram_protect();\n\n  return 0;\n}\n\nint mpu_setup_cp(const mpu_regions_t *mpu_table, uint32_t region_num) {\n  int ret;\n  int i;\n\n  ret = mpu_open();\n  if (ret) {\n    return ret;\n  }\n\n  if (region_num > MPU_ID_QTY) {\n    return -1;\n  }\n\n  for (i = 0; i < region_num; i++) {\n    const mpu_regions_t *region;\n    region = &mpu_table[i];\n    ret = mpu_set(i, region->addr, region->len, 0, region->ap_attr);\n    if (ret)\n      break;\n  }\n\n  return ret;\n}\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/mpu_armv8m.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ARM_ARCH_ISA_ARM\n\n#include \"cmsis.h\"\n#include \"hal_trace.h\"\n#include \"mpu.h\"\n\n#define NORM_MEM_WT_RA_ATTR ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0)\n#define NORM_MEM_WB_WA_ATTR ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1)\n#define DEV_MEM_ATTR_OUTER ARM_MPU_ATTR_MEMORY_(0, 0, 0, 0)\n\nstatic void init_mair_attr(void) {\n  ARM_MPU_SetMemAttr(MAIR_ATTR_FLASH,\n                     ARM_MPU_ATTR(NORM_MEM_WT_RA_ATTR, NORM_MEM_WT_RA_ATTR));\n  ARM_MPU_SetMemAttr(MAIR_ATTR_INT_SRAM,\n                     ARM_MPU_ATTR(NORM_MEM_WT_RA_ATTR, NORM_MEM_WT_RA_ATTR));\n  ARM_MPU_SetMemAttr(MAIR_ATTR_EXT_SRAM,\n                     ARM_MPU_ATTR(NORM_MEM_WB_WA_ATTR, NORM_MEM_WB_WA_ATTR));\n  ARM_MPU_SetMemAttr(\n      MAIR_ATTR_DEVICE,\n      ARM_MPU_ATTR(DEV_MEM_ATTR_OUTER, ARM_MPU_ATTR_DEVICE_nGnRnE));\n}\n\nstatic int mpu_enable(void) {\n  int flags = 0;\n\n  if (get_cpu_id()) {\n    /*\n     * if cpu is CP, we will use different mpu maps, that is, every map needed\n     * by CP will be mapped, and the memory is not mapped will issue abort when\n     * access\n     */\n    flags = MPU_CTRL_HFNMIENA_Msk;\n  } else {\n    /*\n     * mpu maps use default map designed by arm, that is, if the memory is not\n     * mapped, the mpu attibutes will use the default setting by ARM.\n     */\n    flags = MPU_CTRL_PRIVDEFENA_Msk;\n  }\n  ARM_MPU_Enable(flags);\n  __DSB();\n  __ISB();\n  return 0;\n}\n\nstatic int mpu_disable(void) {\n  __DMB();\n  ARM_MPU_Disable();\n  return 0;\n}\n\nint mpu_open(void) {\n  int i;\n\n  if ((MPU->TYPE & MPU_TYPE_DREGION_Msk) == 0) {\n    return 1;\n  }\n\n  for (i = 0; i < MPU_ID_QTY; i++) {\n    ARM_MPU_ClrRegion(i);\n  }\n\n  init_mair_attr();\n\n  return 0;\n}\n\nint mpu_close(void) {\n  ARM_MPU_Disable();\n\n  return 0;\n}\n\nstatic int mpu_set_armv8(enum MPU_ID_T id, uint32_t addr, uint32_t len,\n                         enum MPU_ATTR_T ap_attr,\n                         enum MAIR_ATTR_TYPE_T mem_attr) {\n  uint32_t rbar;\n  uint32_t rlar;\n  uint8_t xn;\n  uint8_t ro;\n  uint32_t lock;\n\n  if (id >= MPU_ID_QTY) {\n    return 2;\n  }\n  if (len < 32) {\n    return 3;\n  }\n  if (addr & 0x1F) {\n    return 4;\n  }\n  if (ap_attr >= MPU_ATTR_QTY) {\n    return 5;\n  }\n\n  if (ap_attr == MPU_ATTR_READ_WRITE_EXEC || ap_attr == MPU_ATTR_READ_EXEC ||\n      ap_attr == MPU_ATTR_EXEC) {\n    xn = 0;\n  } else {\n    xn = 1;\n  }\n\n  if (ap_attr == MPU_ATTR_READ_WRITE_EXEC || ap_attr == MPU_ATTR_READ_WRITE) {\n    ro = 0;\n  } else if (ap_attr == MPU_ATTR_READ_EXEC || ap_attr == MPU_ATTR_READ ||\n             ap_attr == MPU_ATTR_EXEC) {\n    ro = 1;\n  } else {\n    // Cannot support no access\n    return 6;\n  }\n\n  // Sharebility: Outer Shareable\n  // Non-privilege Access: Enabled\n  rbar = ARM_MPU_RBAR(addr, 2, ro, 1, xn);\n  /* rlar = ARM_MPU_RLAR((addr + len - 1), MAIR_ATTR_INT_SRAM); */\n  rlar = ARM_MPU_RLAR((addr + len - 1), mem_attr);\n\n  lock = int_lock();\n\n  ARM_MPU_SetRegion(id, rbar, rlar);\n  int_unlock(lock);\n\n  return 0;\n}\n\nstatic inline int mpu_fram_protect_armv8(uint32_t fr_start, uint32_t fr_end) {\n  uint32_t len = fr_end - fr_start;\n  int ret;\n\n  if ((fr_start % 32 != 0) || (len % 32 != 0))\n    ASSERT(0, \"fr_start %x and len %d must be aligned to 32\", fr_start, len);\n\n  mpu_disable();\n  ret = mpu_set_armv8(MPU_ID_FRAM_TEXT1, fr_start, len, MPU_ATTR_EXEC,\n                      MAIR_ATTR_INT_SRAM);\n  mpu_enable();\n\n  return ret;\n}\n\nstatic int mpu_code_region_protect(void) {\n  uint32_t code_start = RAMX_BASE;\n  uint32_t len = RAM_SIZE;\n\n  return mpu_set(MPU_ID_CODE, code_start, len, 0, MPU_ATTR_EXEC);\n}\n\nextern uint32_t __sram_text_data_start__[];\nextern uint32_t __sram_text_end__[];\nstatic int mpu_sram_text_protect(void) {\n  int ret;\n  uint32_t start = (uint32_t)__sram_text_data_start__;\n  uint32_t end = RAMX_TO_RAM((uint32_t)__sram_text_end__);\n  uint32_t len = end - start;\n\n  TRACE(1, \"sram start %x size %x\", start, len);\n  if ((start % 32 != 0) || (len % 32 != 0))\n    ASSERT(0, \"sram start %x and len %d must be aligned to 32\", start, len);\n\n  ret = mpu_set(MPU_ID_SRAM_TEXT, start, len, 0, MPU_ATTR_READ_EXEC);\n  return ret;\n}\n\nint mpu_set(enum MPU_ID_T id, uint32_t addr, uint32_t len, int srd_bits,\n            enum MPU_ATTR_T attr) {\n  int ret = -1;\n  uint32_t lock;\n\n  lock = int_lock();\n\n  mpu_disable();\n  ret = mpu_set_armv8(id, addr, len, attr, MAIR_ATTR_INT_SRAM);\n  mpu_enable();\n\n  int_unlock(lock);\n\n  return ret;\n}\n\nint mpu_clear(enum MPU_ID_T id) {\n  uint32_t lock;\n\n  if (id >= MPU_ID_QTY) {\n    return 2;\n  }\n\n  lock = int_lock();\n\n  mpu_disable();\n  ARM_MPU_ClrRegion(id);\n  __DSB();\n  __ISB();\n  mpu_enable();\n\n  int_unlock(lock);\n\n  return 0;\n}\n\nstatic int mpu_null_check_enable(void) {\n  return mpu_set(MPU_ID_NULL_POINTER, 0, 0x800, 0, MPU_ATTR_EXEC);\n}\n\nextern uint32_t __fast_sram_text_exec_start__[];\nextern uint32_t __fast_sram_text_exec_end__[];\n\nstatic int mpu_fast_ram_protect(void) {\n  uint32_t ramx_start = (uint32_t)__fast_sram_text_exec_start__;\n  uint32_t ramx_end = (uint32_t)__fast_sram_text_exec_end__;\n  uint32_t ram_start = RAMX_TO_RAM(ramx_start);\n  uint32_t ram_end = RAMX_TO_RAM(ramx_end);\n  int ret = -1;\n\n  ret = mpu_fram_protect_armv8(ram_start, ram_end);\n  return ret;\n}\n\nint mpu_setup(void) {\n  mpu_null_check_enable();\n\n  mpu_code_region_protect();\n  mpu_sram_text_protect();\n\n  mpu_fast_ram_protect();\n  return 0;\n}\n\nint mpu_setup_cp(const mpu_regions_t *mpu_table, uint32_t region_num) {\n  int ret;\n  int i;\n  uint32_t lock;\n\n  ret = mpu_open();\n  if (ret) {\n    return ret;\n  }\n\n  if (region_num > MPU_ID_QTY) {\n    return -1;\n  }\n\n  lock = int_lock();\n  mpu_disable();\n  for (i = 0; i < region_num; i++) {\n    const mpu_regions_t *region;\n    region = &mpu_table[i];\n    ret = mpu_set_armv8(i, region->addr, region->len, region->ap_attr,\n                        region->mem_attr);\n    if (ret)\n      break;\n  }\n\n  mpu_enable();\n  int_unlock(lock);\n\n  return ret;\n}\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/patch.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef __ARM_ARCH_8M_MAIN__\n#include \"patch.h\"\n#include \"reg_patch.h\"\n\n#ifdef PATCH_CTRL_BASE\n\nstatic struct PATCH_CTRL_T *const patch_ctrl =\n    (struct PATCH_CTRL_T *)PATCH_CTRL_BASE;\nstatic struct PATCH_DATA_T *const patch_data =\n    (struct PATCH_DATA_T *)PATCH_DATA_BASE;\n\nstatic uint32_t patch_map[(PATCH_ENTRY_NUM + 31) / 32];\n\nint patch_open(uint32_t remap_addr) {\n  patch_ctrl->CTRL[0] |= PATCH_CTRL_GLOBAL_EN;\n  return 0;\n}\n\nint patch_code_enable_id(uint32_t id, uint32_t addr, uint32_t data) {\n  if (id >= PATCH_ENTRY_NUM) {\n    return 1;\n  }\n\n  patch_data->DATA[id] = data;\n  patch_ctrl->CTRL[id] = (patch_ctrl->CTRL[id] & ~PATCH_CTRL_ADDR_MASK) |\n                         PATCH_CTRL_ADDR(addr) | PATCH_CTRL_ENTRY_EN;\n  return 0;\n}\n\nint patch_code_disable_id(uint32_t id) {\n  if (id >= PATCH_ENTRY_NUM) {\n    return 1;\n  }\n\n  patch_ctrl->CTRL[id] &= ~PATCH_CTRL_ENTRY_EN;\n  return 0;\n}\n\nint patch_data_enable_id(uint32_t id, uint32_t addr, uint32_t data) {\n  return patch_code_enable_id(id, addr, data);\n}\n\nint patch_data_disable_id(uint32_t id) { return patch_code_disable_id(id); }\n\nstatic uint32_t func_patch_ins(uint32_t old_func, uint32_t new_func) {\n#if defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)\n  union {\n    uint32_t d32;\n    uint16_t d16[2];\n  } ins;\n  uint32_t immd;\n  uint8_t j1, j2, s;\n\n  ins.d32 = 0x9000F000;\n  immd = (new_func & ~1) - ((old_func + 4) & ~1);\n  s = immd >> 31;\n  j1 = s ^ !((immd >> 23) & 1);\n  j2 = s ^ !((immd >> 22) & 1);\n  ins.d16[0] |= (s << 10) | ((immd >> 12) & 0x3FF);\n  ins.d16[1] |= (j1 << 13) | (j2 << 11) | ((immd >> 1) & 0x7FF);\n\n  return ins.d32;\n#else\n#error \"Only ARMv7-M/ARMv8-M function can be patched\"\n#endif\n}\n\nPATCH_ID patch_enable(enum PATCH_TYPE_T type, uint32_t addr, uint32_t data) {\n  uint8_t id, idfunc;\n  uint8_t cnt;\n  uint32_t bit;\n  uint32_t offset;\n\n  if (addr < ROM_BASE || addr >= (ROM_BASE + 0x20000000)) {\n    // Not in code region\n    return -1;\n  }\n  if (type == PATCH_TYPE_FUNC) {\n    if (data >= addr) {\n      offset = data - addr;\n    } else {\n      offset = addr - data;\n    }\n    if (offset >= 0x01000000) {\n      // Branch distance too long to fit in a 32-bit branch instruction\n      return -2;\n    }\n  }\n\n  if (!(type == PATCH_TYPE_CODE || type == PATCH_TYPE_FUNC ||\n        type == PATCH_TYPE_DATA)) {\n    return -3;\n  }\n\n  for (id = 0; id < PATCH_ENTRY_NUM; id++) {\n    cnt = id / 32;\n    bit = (1 << (id % 32));\n    if ((patch_map[cnt] & bit) == 0) {\n      patch_map[cnt] |= bit;\n      break;\n    }\n  }\n  if (id >= PATCH_ENTRY_NUM) {\n    return -4;\n  }\n\n  idfunc = 0xFF;\n\n  if (type == PATCH_TYPE_FUNC && (addr & 2)) {\n    for (idfunc = id; idfunc < PATCH_ENTRY_NUM; idfunc++) {\n      cnt = idfunc / 32;\n      bit = (1 << (idfunc % 32));\n      if ((patch_map[cnt] & bit) == 0) {\n        patch_map[cnt] |= bit;\n        break;\n      }\n    }\n    if (idfunc >= PATCH_ENTRY_NUM) {\n      // Release previous patch\n      patch_map[cnt] &= ~bit;\n      return -5;\n    }\n  }\n\n  if (type == PATCH_TYPE_CODE) {\n    patch_code_enable_id(id, addr, data);\n  } else if (type == PATCH_TYPE_DATA) {\n    patch_data_enable_id(id, addr, data);\n  } else if (type == PATCH_TYPE_FUNC) {\n    uint32_t ins;\n\n    ins = func_patch_ins(addr, data);\n\n    if (addr & 2) {\n      uint32_t real_addr[2];\n      uint32_t real_data[2];\n\n      real_addr[0] = addr & ~3;\n      real_addr[1] = (addr + 4) & ~3;\n\n      real_data[0] = *(volatile uint32_t *)real_addr[0];\n      real_data[1] = *(volatile uint32_t *)real_addr[1];\n      real_data[0] = (real_data[0] & 0x0000FFFF) | ((ins & 0xFFFF) << 16);\n      real_data[1] = (real_data[1] & 0xFFFF0000) | ((ins >> 16) & 0xFFFF);\n\n      patch_code_enable_id(id, real_addr[0], real_data[0]);\n      patch_code_enable_id(idfunc, real_addr[1], real_data[1]);\n    } else {\n      patch_code_enable_id(id, addr, ins);\n    }\n  }\n\n  return ((id + 1) & 0xFF) | (((idfunc + 1) & 0xFF) << 8);\n}\n\nint patch_disable(PATCH_ID patch_id) {\n  uint8_t id;\n  uint8_t cnt, bit;\n  int i;\n\n  for (i = 0; i < 2; i++) {\n    id = (uint8_t)(patch_id >> (8 * i)) - 1;\n\n    if (id == 0xFF) {\n      return 0;\n    } else if (id >= PATCH_ENTRY_NUM) {\n      return -1;\n    }\n\n    patch_code_disable_id(id);\n\n    cnt = id / 32;\n    bit = (1 << (id % 32));\n    patch_map[cnt] &= ~bit;\n  }\n\n  return 0;\n}\n\nvoid patch_close(void) {\n  int i;\n\n  patch_ctrl->CTRL[0] &= ~PATCH_CTRL_GLOBAL_EN;\n\n  for (i = 0; i < PATCH_ENTRY_NUM; i++) {\n    patch_code_disable_id(i);\n  }\n\n  for (i = 0; i < ARRAY_SIZE(patch_map); i++) {\n    patch_map[i] = 0;\n  }\n}\n#endif\n#endif\n"
  },
  {
    "path": "platform/cmsis/patch_armv7m.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef __ARM_ARCH_7EM__\n\n#include \"cmsis.h\"\n#include \"patch.h\"\n#include \"plat_addr_map.h\"\n#include \"reg_patch_armv7m.h\"\n\nstatic struct PATCH_ARMV7M_T *const patch = (struct PATCH_ARMV7M_T *)0xE0002000;\n\nstatic uint32_t patch_map[(__NUM_CODE_PATCH + __NUM_LIT_PATCH + 31) / 32];\n\nstatic uint32_t get_num_code(void) { return __NUM_CODE_PATCH; }\n\nstatic uint32_t get_num_lit(void) { return __NUM_LIT_PATCH; }\n\nstatic uint32_t get_remap_addr(void) {\n  return GET_BITFIELD(patch->FP_REMAP, REMAP_ADDR) | (RAM_BASE & 0xE0000000);\n}\n\nint patch_open(uint32_t remap_addr) {\n  patch->FP_REMAP = REMAP_ADDR(remap_addr);\n  patch->FP_CTRL = FP_CTRL_KEY | FP_CTRL_ENABLE;\n  return 0;\n}\n\nint patch_code_enable_id(uint32_t id, uint32_t addr, uint32_t data) {\n  uint32_t *remap_addr;\n\n  if (id >= get_num_code()) {\n    return 1;\n  }\n\n  remap_addr = (uint32_t *)get_remap_addr();\n  remap_addr[id] = data;\n  patch->FP_COMP[id] = COMP_REPLACE(0) | COMP_ADDR(addr) | COMP_ENABLE;\n  return 0;\n}\n\nint patch_code_disable_id(uint32_t id) {\n  if (id >= get_num_code()) {\n    return 1;\n  }\n\n  patch->FP_COMP[id] = 0;\n  return 0;\n}\n\nint patch_data_enable_id(uint32_t id, uint32_t addr, uint32_t data) {\n  uint32_t *remap_addr;\n\n  if (id >= get_num_lit()) {\n    return 1;\n  }\n  id += get_num_code();\n\n  remap_addr = (uint32_t *)get_remap_addr();\n  remap_addr[id] = data;\n  patch->FP_COMP[id] = COMP_REPLACE(0) | COMP_ADDR(addr) | COMP_ENABLE;\n  return 0;\n}\n\nint patch_data_disable_id(uint32_t id) {\n  if (id >= get_num_lit()) {\n    return 1;\n  }\n  id += get_num_code();\n\n  patch->FP_COMP[id] = 0;\n  return 0;\n}\n\nstatic uint32_t func_patch_ins(uint32_t old_func, uint32_t new_func) {\n#ifdef __ARM_ARCH_7EM__\n  union {\n    uint32_t d32;\n    uint16_t d16[2];\n  } ins;\n  uint32_t immd;\n  uint8_t j1, j2, s;\n\n  ins.d32 = 0x9000F000;\n  immd = (new_func & ~1) - ((old_func + 4) & ~1);\n  s = immd >> 31;\n  j1 = s ^ !((immd >> 23) & 1);\n  j2 = s ^ !((immd >> 22) & 1);\n  ins.d16[0] |= (s << 10) | ((immd >> 12) & 0x3FF);\n  ins.d16[1] |= (j1 << 13) | (j2 << 11) | ((immd >> 1) & 0x7FF);\n\n  return ins.d32;\n#else\n#error \"Only ARMv7-M function can be patched\"\n#endif\n}\n\nPATCH_ID patch_enable(enum PATCH_TYPE_T type, uint32_t addr, uint32_t data) {\n  uint8_t start, end;\n  uint8_t id, idfunc;\n  uint8_t cnt;\n  uint32_t bit;\n  uint32_t offset;\n\n  if (addr < ROM_BASE || addr >= (ROM_BASE + 0x20000000)) {\n    // Not in code region\n    return -1;\n  }\n  if (type == PATCH_TYPE_FUNC) {\n    if (data >= addr) {\n      offset = data - addr;\n    } else {\n      offset = addr - data;\n    }\n    if (offset >= 0x01000000) {\n      // Branch distance too long to fit in a 32-bit branch instruction\n      return -2;\n    }\n  }\n\n  if (type == PATCH_TYPE_CODE || type == PATCH_TYPE_FUNC) {\n    start = 0;\n    end = start + get_num_code();\n  } else if (type == PATCH_TYPE_DATA) {\n    start = get_num_code();\n    end = start + get_num_lit();\n  } else {\n    return -3;\n  }\n\n  for (id = start; id < end; id++) {\n    cnt = id / 32;\n    bit = (1 << (id % 32));\n    if ((patch_map[cnt] & bit) == 0) {\n      patch_map[cnt] |= bit;\n      break;\n    }\n  }\n  if (id >= end) {\n    return -4;\n  }\n\n  idfunc = 0xFF;\n\n  if (type == PATCH_TYPE_FUNC && (addr & 2)) {\n    for (idfunc = id; idfunc < end; idfunc++) {\n      cnt = idfunc / 32;\n      bit = (1 << (idfunc % 32));\n      if ((patch_map[cnt] & bit) == 0) {\n        patch_map[cnt] |= bit;\n        break;\n      }\n    }\n    if (idfunc >= end) {\n      // Release previous patch\n      patch_map[cnt] &= ~bit;\n      return -5;\n    }\n  }\n\n  if (type == PATCH_TYPE_CODE) {\n    patch_code_enable_id(id - start, addr, data);\n  } else if (type == PATCH_TYPE_DATA) {\n    patch_data_enable_id(id - start, addr, data);\n  } else if (type == PATCH_TYPE_FUNC) {\n    uint32_t ins;\n\n    ins = func_patch_ins(addr, data);\n\n    if (addr & 2) {\n      uint32_t real_addr[2];\n      uint32_t real_data[2];\n\n      real_addr[0] = addr & ~3;\n      real_addr[1] = (addr + 4) & ~3;\n\n      real_data[0] = *(volatile uint32_t *)real_addr[0];\n      real_data[1] = *(volatile uint32_t *)real_addr[1];\n      real_data[0] = (real_data[0] & 0x0000FFFF) | ((ins & 0xFFFF) << 16);\n      real_data[1] = (real_data[1] & 0xFFFF0000) | ((ins >> 16) & 0xFFFF);\n\n      patch_code_enable_id(id - start, real_addr[0], real_data[0]);\n      patch_code_enable_id(idfunc - start, real_addr[1], real_data[1]);\n    } else {\n      patch_code_enable_id(id - start, addr, ins);\n    }\n  }\n\n  return ((id + 1) & 0xFF) | (((idfunc + 1) & 0xFF) << 8);\n}\n\nint patch_disable(PATCH_ID patch_id) {\n  uint8_t id;\n  uint8_t code_start, code_end, data_start, data_end;\n  uint8_t cnt, bit;\n  int i;\n\n  code_start = 0;\n  code_end = code_start + get_num_code();\n  data_start = code_end;\n  data_end = data_start + get_num_lit();\n\n  for (i = 0; i < 2; i++) {\n    id = (uint8_t)(patch_id >> (8 * i)) - 1;\n\n    if (id == 0xFF) {\n      return 0;\n    } else if (id >= code_start && id < code_end) {\n      patch_code_disable_id(id);\n    } else if (id >= data_start && id < data_end) {\n      patch_data_disable_id(id - data_start);\n    } else {\n      return -1;\n    }\n\n    cnt = id / 32;\n    bit = (1 << (id % 32));\n    patch_map[cnt] &= ~bit;\n  }\n\n  return 0;\n}\n\nvoid patch_close(void) {\n  int i;\n\n  patch->FP_CTRL = FP_CTRL_KEY;\n\n  for (i = 0; i < get_num_code(); i++) {\n    patch_code_disable_id(i);\n  }\n\n  for (i = get_num_code(); i < (get_num_code() + get_num_lit()); i++) {\n    patch_data_disable_id(i);\n  }\n\n  for (i = 0; i < ARRAY_SIZE(patch_map); i++) {\n    patch_map[i] = 0;\n  }\n}\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/reg_patch.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_PATCH_H__\n#define __REG_PATCH_H__\n\n#include \"plat_types.h\"\n#include \"plat_addr_map.h\"\n\n#ifdef PATCH_CTRL_BASE\n\nstruct PATCH_CTRL_T {\n    __IO uint32_t CTRL[PATCH_ENTRY_NUM];\n};\n\nstruct PATCH_DATA_T {\n    __IO uint32_t DATA[PATCH_ENTRY_NUM];\n};\n\n#define PATCH_CTRL_ENTRY_EN                     (1 << 0)\n#define PATCH_CTRL_ADDR_17_2_SHIFT              2\n#define PATCH_CTRL_ADDR_17_2_MASK               (0xFFFF << PATCH_CTRL_ADDR_17_2_SHIFT)\n#define PATCH_CTRL_17_2_ADDR(n)                 BITFIELD_VAL(PATCH_CTRL_30_2_ADDR, n)\n// For entry 0 only\n#define PATCH_CTRL_GLOBAL_EN                    (1 << 31)\n\n#define PATCH_CTRL_ADDR_MASK                    PATCH_CTRL_ADDR_17_2_MASK\n#define PATCH_CTRL_ADDR(n)                      ((n) & PATCH_CTRL_ADDR_17_2_MASK)\n\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/reg_patch_armv7m.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_PATCH_ARMV7M_H__\n#define __REG_PATCH_ARMV7M_H__\n\n#ifdef __ARM_ARCH_7EM__\n\n#include \"plat_types.h\"\n#include \"cmsis.h\"\n\nstruct PATCH_ARMV7M_T {\n    __IO uint32_t FP_CTRL;\n    __IO uint32_t FP_REMAP;\n    __IO uint32_t FP_COMP[512];\n};\n\n#define NUM_CODE_6_4_SHIFT                      12\n#define NUM_CODE_6_4_MASK                       (0x7 << NUM_CODE_6_4_SHIFT)\n#define NUM_CODE_6_4(n)                         BITFIELD_VAL(NUM_CODE_6_4, n)\n#define NUM_LIT_SHIFT                           8\n#define NUM_LIT_MASK                            (0xF << NUM_LIT_SHIFT)\n#define NUM_LIT(n)                              BITFIELD_VAL(NUM_LIT, n)\n#define NUM_CODE_3_0_SHIFT                      4\n#define NUM_CODE_3_0_MASK                       (0xF << NUM_CODE_3_0_SHIFT)\n#define NUM_CODE_3_0(n)                         BITFIELD_VAL(NUM_CODE_3_0, n)\n#define FP_CTRL_KEY                             (1 << 1)\n#define FP_CTRL_ENABLE                          (1 << 0)\n\n#define REMAP_RMPSPT                            (1 << 29)\n#define REMAP_ADDR_28_5_SHIFT                   5\n#define REMAP_ADDR_28_5_MASK                    (0xFFFFFF << REMAP_ADDR_28_5_SHIFT)\n#define REMAP_ADDR_28_5(n)                      BITFIELD_VAL(REMAP_ADDR_28_5, n)\n#define REMAP_ADDR_SHIFT                        0\n#define REMAP_ADDR_MASK                         (0x1FFFFFFF << REMAP_ADDR_SHIFT)\n#define REMAP_ADDR(n)                           BITFIELD_VAL(REMAP_ADDR, n)\n\n#define COMP_REPLACE_SHIFT                      30\n#define COMP_REPLACE_MASK                       (0x3 << COMP_REPLACE_SHIFT)\n#define COMP_REPLACE(n)                         BITFIELD_VAL(COMP_REPLACE, n)\n#define COMP_ADDR_28_2_SHIFT                    2\n#define COMP_ADDR_28_2_MASK                     (0x7FFFFFF << COMP_ADDR_28_2_SHIFT)\n#define COMP_ADDR_28_2(n)                       BITFIELD_VAL(COMP_ADDR_28_2, n)\n#define COMP_ADDR_SHIFT                         0\n#define COMP_ADDR_MASK                          (0x1FFFFFFF << COMP_ADDR_SHIFT)\n#define COMP_ADDR(n)                            BITFIELD_VAL(COMP_ADDR, n)\n#define COMP_ENABLE                             (1 << 0)\n\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/retarget_armclang.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef __ARMCC_VERSION\n\nextern \"C\" {\n\n#include \"analog.h\"\n#include \"codec_int.h\"\n#include \"hal_codec.h\"\n#include \"hal_trace.h\"\n#include \"norflash_drv.h\"\n#include \"pmu.h\"\n\n#ifdef NOSTD\n\nvoid __rt_raise(int sig, intptr_t type) {\n  ASSERT(false, \"__rt_raise: sig=%d type=%p\", sig, type);\n}\n\n#endif\n\n// Stupid armlink\nWEAK void analog_aud_xtal_tune(float ratio) {}\nWEAK void\nhal_codec_dac_gain_m60db_check(enum HAL_CODEC_PERF_TEST_POWER_T type) {}\nWEAK void hal_codec_set_noise_reduction(bool enable) {}\nWEAK void hal_codec_tune_both_resample_rate(float ratio) {}\nWEAK void\nhal_codec_set_bt_trigger_callback(HAL_CODEC_BT_TRIGGER_CALLBACK callback) {}\nWEAK int hal_codec_bt_trigger_start(void) { return 0; }\nWEAK int hal_codec_bt_trigger_stop(void) { return 0; }\nWEAK void hal_codec_sync_dac_enable(enum HAL_CODEC_SYNC_TYPE_T type) {}\nWEAK void hal_codec_sync_dac_disable(void) {}\nWEAK void hal_codec_sync_adc_enable(enum HAL_CODEC_SYNC_TYPE_T type) {}\nWEAK void hal_codec_sync_adc_disable(void) {}\nWEAK void\nhal_codec_sync_dac_resample_rate_enable(enum HAL_CODEC_SYNC_TYPE_T type) {}\nWEAK void hal_codec_sync_dac_resample_rate_disable(void) {}\nWEAK void\nhal_codec_sync_adc_resample_rate_enable(enum HAL_CODEC_SYNC_TYPE_T type) {}\nWEAK void hal_codec_sync_adc_resample_rate_disable(void) {}\nWEAK void hal_codec_sync_dac_gain_enable(enum HAL_CODEC_SYNC_TYPE_T type) {}\nWEAK void hal_codec_sync_dac_gain_disable(void) {}\nWEAK void hal_codec_sync_adc_gain_enable(enum HAL_CODEC_SYNC_TYPE_T type) {}\nWEAK void hal_codec_sync_adc_gain_disable(void) {}\nWEAK int codec_anc_open(enum ANC_TYPE_T type, enum AUD_SAMPRATE_T dac_rate,\n                        enum AUD_SAMPRATE_T adc_rate, CODEC_ANC_HANDLER hdlr) {\n  return 0;\n}\nWEAK int codec_anc_close(enum ANC_TYPE_T type) { return 0; }\n\n#ifdef ROM_BUILD\nWEAK void norflash_reset(void) {}\nWEAK int norflash_get_size(uint32_t *total_size, uint32_t *block_size,\n                           uint32_t *sector_size, uint32_t *page_size) {\n  return HAL_NORFLASH_OK;\n}\nWEAK int norflash_set_mode(uint32_t op) { return HAL_NORFLASH_OK; }\nWEAK int norflash_pre_operation(void) { return HAL_NORFLASH_OK; }\nWEAK int norflash_post_operation(void) { return HAL_NORFLASH_OK; }\nWEAK int norflash_init_sample_delay_by_div(uint32_t div) {\n  return HAL_NORFLASH_OK;\n}\nWEAK void norflash_set_sample_delay(uint32_t index) {}\nWEAK int norflash_sample_delay_calib(void) { return HAL_NORFLASH_OK; }\nWEAK int norflash_init_div(const struct HAL_NORFLASH_CONFIG_T *cfg) {\n  return HAL_NORFLASH_OK;\n}\nWEAK int norflash_match_chip(const uint8_t *id, uint32_t len) {\n  return HAL_NORFLASH_OK;\n}\nWEAK int norflash_get_id(uint8_t *value, uint32_t len) {\n  return HAL_NORFLASH_OK;\n}\nWEAK int norflash_get_unique_id(uint8_t *value, uint32_t len) {\n  return HAL_NORFLASH_OK;\n}\nWEAK enum HAL_NORFLASH_RET_T norflash_erase(uint32_t start_address,\n                                            enum DRV_NORFLASH_ERASE_T type,\n                                            int suspend) {\n  return HAL_NORFLASH_OK;\n}\nWEAK enum HAL_NORFLASH_RET_T norflash_write(uint32_t start_address,\n                                            const uint8_t *buffer, uint32_t len,\n                                            int suspend) {\n  return HAL_NORFLASH_OK;\n}\nWEAK int norflash_read(uint32_t start_address, uint8_t *buffer, uint32_t len) {\n  return HAL_NORFLASH_OK;\n}\n\nWEAK void pmu_flash_freq_config(uint32_t freq) {}\nWEAK void pmu_rs_freq_config(uint32_t freq) {}\nWEAK void\npmu_led_set_voltage_domains(enum HAL_IOMUX_PIN_T pin,\n                            enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt) {}\nWEAK void pmu_led_set_pull_select(enum HAL_IOMUX_PIN_T pin,\n                                  enum HAL_IOMUX_PIN_PULL_SELECT_T pull_sel) {}\n\n#ifdef SPI_ROM_ONLY\nWEAK int hal_ispi_open(const struct HAL_SPI_CFG_T *cfg) { return 0; }\nWEAK int hal_ispi_send(const void *data, uint32_t len) { return 0; }\nWEAK int hal_ispi_recv(const void *cmd, void *data, uint32_t len) { return 0; }\n#endif\n\nWEAK void analog_aud_freq_pll_config(uint32_t freq, uint32_t div) {}\nWEAK void analog_aud_pll_open(enum ANA_AUD_PLL_USER_T user) {}\nWEAK void analog_aud_pll_close(enum ANA_AUD_PLL_USER_T user) {}\nWEAK void analog_aud_codec_speaker_enable(bool en) {}\nWEAK void analog_aud_set_dac_gain(int32_t v) {}\nWEAK uint32_t analog_aud_get_max_dre_gain(void) { return 0; }\nWEAK void analog_aud_vad_adc_enable(bool en) {}\nWEAK void analog_aud_vad_enable(enum AUD_VAD_TYPE_T type, bool en) {}\n#endif\n}\n\n#endif // __ARMCC_VERSION\n"
  },
  {
    "path": "platform/cmsis/retarget_armclang_asm.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef __ARMCC_VERSION\n\n#include \"plat_addr_map.h\"\n#include \"link_sym_armclang.h\"\n\n\t.syntax  unified\n\n\t.text\n\n\t.macro def_sym, name:req, val:req\n\t.global \\name\n\t.set \\name, \\val\n\t.endm\n\n\tdef_sym __export_fn_rom, (ROM_BASE + ROM_SIZE - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE)\n\n\t.section .code_start_addr, \"a\", %progbits\n\t.word BUILD_INFO_MAGIC\n#ifdef PROGRAMMER\n\t.word __exec_struct_start\n#else\n\t.word __flash_start\n#endif\n\n\t.end\n\n#endif // __ARMCC_VERSION\n\n"
  },
  {
    "path": "platform/cmsis/retarget_gcc.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if (defined(__GNUC__) && !defined(__ARMCC_VERSION))\n\n#if !defined(NOSTD) && !defined(MBED)\n#define LIBC_HOOKS\n#endif\n\n#ifdef LIBC_HOOKS\n\n#include \"hal_trace.h\"\n#include \n\n#ifndef FILEHANDLE\ntypedef int FILEHANDLE;\n#endif\n\n#define WEAK __attribute__((weak))\n#define PACKED __attribute__((packed))\n\n#include \n#include \n#include \n#define PREFIX(x) x\n\nextern \"C\" int PREFIX(_write)(FILEHANDLE fh, const unsigned char *buffer,\n                              unsigned int length, int mode) {\n  int n = 0; // n is the number of bytes written\n  if (fh < 3) {\n    hal_trace_output(buffer, length);\n    n = length;\n  }\n  return n;\n}\n\nextern \"C\" int PREFIX(_read)(FILEHANDLE fh, unsigned char *buffer,\n                             unsigned int length, int mode) {\n  int n = 0; // n is the number of bytes read\n  if (fh < 3) {\n    // only read a character at a time from stdin\n    // TODO: Read from trace uart input\n    n = 1;\n  }\n  return n;\n}\n\n#if defined(__GNUC__)\n/* prevents the exception handling name demangling code getting pulled in */\nnamespace __gnu_cxx {\nvoid __verbose_terminate_handler() { ASSERT(0, \"Exception\"); }\n}\nextern \"C\" WEAK void __cxa_pure_virtual(void);\nextern \"C\" WEAK void __cxa_pure_virtual(void) { _exit(1); }\n\n#endif\n\n// Provide implementation of _sbrk (low-level dynamic memory allocation\n// routine) for GCC_ARM which compares new heap pointer with MSP instead of\n// SP.  This make it compatible with RTX RTOS thread stacks.\n#if defined(__GNUC__) && defined(__arm__)\n// Linker defined symbol used by _sbrk to indicate where heap should start.\nextern \"C\" int __end__;\nextern \"C\" uint32_t __HeapLimit;\n\n// Turn off the errno macro and use actual global variable instead.\n#undef errno\nextern \"C\" int errno;\n\n// For ARM7 only\nregister unsigned char *stack_ptr __asm(\"sp\");\n\n// Dynamic memory allocation related syscall.\nextern \"C\" caddr_t _sbrk(int incr) {\n  static unsigned char *heap = (unsigned char *)&__end__;\n  unsigned char *prev_heap = heap;\n  unsigned char *new_heap = heap + incr;\n\n#if defined(TARGET_ARM7)\n  if (new_heap >= stack_ptr) {\n#elif defined(TARGET_CORTEX_A)\n  if (new_heap >=\n      (unsigned char *)&__HeapLimit) { /* __HeapLimit is end of heap section */\n#else\n  if (new_heap >=\n      (unsigned char *)&__HeapLimit) { /* __HeapLimit is end of heap section */\n#endif\n    ASSERT(false, \"_sbrk:Heap overflowed: start=%p end=%p cur=%p incr=%d\",\n           (unsigned char *)&__end__, (unsigned char *)&__HeapLimit, heap,\n           incr);\n    errno = ENOMEM;\n    return (caddr_t)-1;\n  }\n\n  TRACE(2, \"_sbrk: incr %d cur=%p\\n\", incr, heap);\n\n  heap = new_heap;\n  return (caddr_t)prev_heap;\n}\n#endif\n\n#if defined(__GNUC__) && defined(__arm__)\nextern \"C\" void _exit(int return_code) {\n#else\nnamespace std {\nextern \"C\" void exit(int return_code) {\n#endif\n  if (return_code) {\n    ASSERT(false, \"system die: %d\", return_code);\n  }\n\n  do {\n    volatile int i = 0;\n    i++;\n  } while (1);\n}\n\n#if !(defined(__GNUC__) && defined(__arm__)) && !defined(TOOLCHAIN_GCC_CW)\n} // namespace std\n#endif\n\n#endif /*LIBC_HOOKS*/\n\n#endif // __GNUC__ && !__ARMCC_VERSION\n"
  },
  {
    "path": "platform/cmsis/stack_protector.c",
    "content": "#include \n#include \n#include \n\nuint32_t __stack_chk_guard = 0xdeadbeef;\n\nvoid __attribute__((__constructor__)) __stack_chk_init(void) {\n  if (__stack_chk_guard != 0)\n    return;\n}\n\nvoid __attribute__((__noreturn__)) __stack_chk_fail(void) {\n  const char *msg = \"*** stack smashing detected ***: terminated\\n\";\n  ASSERT(0, \"%s\", msg);\n}\n"
  },
  {
    "path": "platform/cmsis/system_ARMCM.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ARM_ARCH_ISA_ARM\n\n#include \"system_ARMCM.h\"\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n\nvoid BOOT_TEXT_FLASH_LOC SystemInit(void) {\n#if (__FPU_USED == 1)\n  SCB->CPACR |= ((3UL << 10 * 2) | /* set CP10 Full Access */\n                 (3UL << 11 * 2)); /* set CP11 Full Access */\n#endif\n\n  SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;\n#ifdef __ARM_ARCH_8M_MAIN__\n  // Disable stack limit check on hard fault, NMI and reset\n  // (The check will generate STKOF usage fault)\n  SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk;\n#endif\n#ifdef UNALIGNED_ACCESS\n  SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk;\n#else\n  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;\n#endif\n#ifdef USAGE_FAULT\n  SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk;\n  NVIC_SetPriority(UsageFault_IRQn, IRQ_PRIORITY_REALTIME);\n#else\n  SCB->SHCSR &= ~SCB_SHCSR_USGFAULTENA_Msk;\n#endif\n#ifdef BUS_FAULT\n  SCB->SHCSR |= SCB_SHCSR_BUSFAULTENA_Msk;\n  NVIC_SetPriority(BusFault_IRQn, IRQ_PRIORITY_REALTIME);\n#else\n  SCB->SHCSR &= ~SCB_SHCSR_BUSFAULTENA_Msk;\n#endif\n#ifdef MEM_FAULT\n  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;\n  NVIC_SetPriority(MemoryManagement_IRQn, IRQ_PRIORITY_REALTIME);\n#else\n  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;\n#endif\n\n#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n  TZ_SAU_Setup();\n#endif\n}\n\n#ifndef UNALIGNED_ACCESS\n\nbool get_unaligned_access_status(void) {\n  return !(SCB->CCR & SCB_CCR_UNALIGN_TRP_Msk);\n}\n\nbool config_unaligned_access(bool enable) {\n  bool en;\n\n  en = !(SCB->CCR & SCB_CCR_UNALIGN_TRP_Msk);\n\n  if (enable) {\n    SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk;\n  } else {\n    SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;\n  }\n\n  return en;\n}\n\n#endif\n\n// -----------------------------------------------------------\n// CPU ID\n// -----------------------------------------------------------\n\nuint32_t BOOT_TEXT_SRAM_DEF(get_cpu_id)(void) {\n#ifdef CHIP_HAS_CP\n#ifdef __ARM_ARCH_8M_MAIN__\n  return (SCB->ID_ADR & 3);\n#else  /*__ARM_ARCH_8M_MAIN__*/\n  return (SCB->ADR & 3);\n#endif /*__ARM_ARCH_8M_MAIN__*/\n#else\n  return 0;\n#endif\n}\n\n#endif\n"
  },
  {
    "path": "platform/cmsis/system_cp.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ARM_ARCH_ISA_ARM\n#ifdef CHIP_HAS_CP\n\n#include \"cmsis_nvic.h\"\n#include \"hal_cache.h\"\n#include \"hal_location.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#ifdef __ARMCC_VERSION\n#include \"link_sym_armclang.h\"\n#endif\n\n// The vector table must be aligned to NVIC_NUM_VECTORS-word boundary, rounding\n// up to the next power of two\n// -- 0x100 for 33~64 vectors, and 0x200 for 65~128 vectors\n#if defined(ROM_BUILD) || defined(PROGRAMMER) || (RAMCP_SIZE <= 0)\n#define VECTOR_LOC_CP ALIGNED(0x200)\n#else\n#define VECTOR_LOC_CP __attribute__((section(\".vector_table_cp\")))\n#endif\n\n#define FAULT_HANDLER_CP __attribute__((weak, alias(\"NVIC_default_handler_cp\")))\n\nstatic uint32_t VECTOR_LOC_CP vector_table_cp[NVIC_NUM_VECTORS];\n\nstatic void NAKED NVIC_default_handler_cp(void) {\n  asm volatile(\"_loop:; nop; nop; nop; nop; b _loop;\");\n}\n\nvoid FAULT_HANDLER_CP Reset_Handler_cp(void);\nvoid FAULT_HANDLER_CP NMI_Handler_cp(void);\nvoid FAULT_HANDLER_CP HardFault_Handler_cp(void);\nvoid FAULT_HANDLER_CP MemManage_Handler_cp(void);\nvoid FAULT_HANDLER_CP BusFault_Handler_cp(void);\nvoid FAULT_HANDLER_CP UsageFault_Handler_cp(void);\nvoid FAULT_HANDLER_CP SVC_Handler_cp(void);\nvoid FAULT_HANDLER_CP DebugMon_Handler_cp(void);\nvoid FAULT_HANDLER_CP PendSV_Handler_cp(void);\nvoid FAULT_HANDLER_CP SysTick_Handler_cp(void);\n\nstatic const uint32_t fault_handlers_cp[NVIC_USER_IRQ_OFFSET] = {\n    (uint32_t)0,\n    (uint32_t)Reset_Handler_cp,\n    (uint32_t)NMI_Handler_cp,\n    (uint32_t)HardFault_Handler_cp,\n    (uint32_t)MemManage_Handler_cp,\n    (uint32_t)BusFault_Handler_cp,\n    (uint32_t)UsageFault_Handler_cp,\n    (uint32_t)NVIC_default_handler_cp,\n    (uint32_t)NVIC_default_handler_cp,\n    (uint32_t)NVIC_default_handler_cp,\n    (uint32_t)NVIC_default_handler_cp,\n    (uint32_t)SVC_Handler_cp,\n    (uint32_t)DebugMon_Handler_cp,\n    (uint32_t)NVIC_default_handler_cp,\n    (uint32_t)PendSV_Handler_cp,\n    (uint32_t)SysTick_Handler_cp,\n};\n\nvoid NVIC_InitVectors_cp(void) {\n  int i;\n\n  for (i = 0; i < NVIC_NUM_VECTORS; i++) {\n    vector_table_cp[i] = (i < ARRAY_SIZE(fault_handlers_cp))\n                             ? fault_handlers_cp[i]\n                             : (uint32_t)NVIC_default_handler_cp;\n  }\n\n  SCB->VTOR = (uint32_t)vector_table_cp;\n}\n\nvoid NVIC_SetDefaultFaultHandler_cp(NVIC_DEFAULT_FAULT_HANDLER_T handler) {\n  int i;\n\n  for (i = 1; i < ARRAY_SIZE(fault_handlers_cp); i++) {\n    if (vector_table_cp[i] == (uint32_t)NVIC_default_handler_cp) {\n      vector_table_cp[i] = (uint32_t)handler;\n    }\n  }\n}\n\nvoid SystemInit_cp(void) {\n#if (__FPU_USED == 1)\n  SCB->CPACR |= ((3UL << 10 * 2) | /* set CP10 Full Access */\n                 (3UL << 11 * 2)); /* set CP11 Full Access */\n#endif\n\n  SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;\n#ifdef __ARM_ARCH_8M_MAIN__\n  // Disable stack limit check on hard fault, NMI and reset\n  // (The check will generate STKOF usage fault)\n  SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk;\n#endif\n#ifdef UNALIGNED_ACCESS\n  SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk;\n#else\n  SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;\n#endif\n#ifdef USAGE_FAULT\n  SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk;\n  NVIC_SetPriority(UsageFault_IRQn, IRQ_PRIORITY_REALTIME);\n#else\n  SCB->SHCSR &= ~SCB_SHCSR_USGFAULTENA_Msk;\n#endif\n#ifdef BUS_FAULT\n  SCB->SHCSR |= SCB_SHCSR_BUSFAULTENA_Msk;\n  NVIC_SetPriority(BusFault_IRQn, IRQ_PRIORITY_REALTIME);\n#else\n  SCB->SHCSR &= ~SCB_SHCSR_BUSFAULTENA_Msk;\n#endif\n#ifdef MEM_FAULT\n  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;\n  NVIC_SetPriority(MemoryManagement_IRQn, IRQ_PRIORITY_REALTIME);\n#else\n  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;\n#endif\n}\n\nextern uint32_t __cp_text_sram_start_flash__[];\nextern uint32_t __cp_text_sram_start[];\nextern uint32_t __cp_text_sram_end[];\nextern uint32_t __cp_data_sram_start_flash__[];\nextern uint32_t __cp_data_sram_start[];\nextern uint32_t __cp_data_sram_end[];\nextern uint32_t __cp_bss_sram_start[];\nextern uint32_t __cp_bss_sram_end[];\n\nvoid NAKED system_cp_reset_handler(void) {\n  asm volatile(\n#ifdef __ARM_ARCH_8M_MAIN__\n      \"ldr r0, =\" TO_STRING(\n          __cp_stack_limit) \";\"\n                            \"msr msplim, r0;\"\n#endif\n                            \"ldr r3, =\" TO_STRING(\n                                __cp_stack_top) \";\"\n                                                \"msr msp, r3;\"\n                                                \"movs r4, 0;\"\n                                                \"mov r5, r4;\"\n                                                \"mov r6, r4;\"\n                                                \"mov r7, r4;\"\n                                                \"mov r8, r4;\"\n                                                \"mov r9, r4;\"\n                                                \"mov r10, r4;\"\n                                                \"mov r11, r4;\"\n                                                \"mov r12, r4;\"\n#if !defined(__SOFTFP__) && defined(__ARM_FP) && (__ARM_FP >= 4)\n                                                \"ldr.w r0, =0xE000ED88;\"\n                                                \"ldr r1, [r0];\"\n                                                \"orr r1, r1, #(0xF << 20);\"\n                                                \"str r1, [r0];\"\n                                                \"dsb;\"\n                                                \"isb;\"\n                                                \"vmov s0, s1, r4, r5;\"\n                                                \"vmov s2, s3, r4, r5;\"\n                                                \"vmov s4, s5, r4, r5;\"\n                                                \"vmov s6, s7, r4, r5;\"\n                                                \"vmov s8, s9, r4, r5;\"\n                                                \"vmov s10, s11, r4, r5;\"\n                                                \"vmov s12, s13, r4, r5;\"\n                                                \"vmov s14, s15, r4, r5;\"\n                                                \"vmov s16, s17, r4, r5;\"\n                                                \"vmov s18, s19, r4, r5;\"\n                                                \"vmov s20, s21, r4, r5;\"\n                                                \"vmov s22, s23, r4, r5;\"\n                                                \"vmov s24, s25, r4, r5;\"\n                                                \"vmov s26, s27, r4, r5;\"\n                                                \"vmov s28, s29, r4, r5;\"\n                                                \"vmov s30, s31, r4, r5;\"\n#endif\n                                                \"bl hal_cmu_cp_get_entry_addr;\"\n                                                \"blx r0;\");\n}\n\nvoid system_cp_init(int load_code) {\n  NVIC_InitVectors_cp();\n\n  // Enable icache\n  hal_cachecp_enable(HAL_CACHE_ID_I_CACHE);\n  // Enable dcache\n  hal_cachecp_enable(HAL_CACHE_ID_D_CACHE);\n  // Enable write back\n  hal_cachecp_writeback_enable(HAL_CACHE_ID_D_CACHE);\n\n  SystemInit_cp();\n\n#if !(defined(ROM_BUILD) || defined(PROGRAMMER))\n  uint32_t *dst;\n  uint32_t *src;\n\n  if (load_code) {\n    dst = __cp_text_sram_start;\n    src = __cp_text_sram_start_flash__;\n    for (; dst < __cp_text_sram_end; dst++, src++) {\n      *dst = *src;\n    }\n  }\n\n  dst = __cp_data_sram_start;\n  src = __cp_data_sram_start_flash__;\n  for (; dst < __cp_data_sram_end; dst++, src++) {\n    *dst = *src;\n  }\n\n  dst = __cp_bss_sram_start;\n  for (; dst < __cp_bss_sram_end; dst++) {\n    *dst = 0;\n  }\n#endif\n}\n\nvoid system_cp_term(void) {\n  // Disable dcache\n  hal_cachecp_disable(HAL_CACHE_ID_D_CACHE);\n  // Disable icache\n  hal_cachecp_disable(HAL_CACHE_ID_I_CACHE);\n}\n\n#endif\n#endif\n"
  },
  {
    "path": "platform/cmsis/system_utils.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"cmsis.h\"\n#include \"hal_cache.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_psram.h\"\n#include \"hal_psramuhs.h\"\n#if !defined(NOSTD) && defined(ACCURATE_DB_TO_FLOAT)\n#include \n#endif\n#ifdef __ARMCC_VERSION\n#include \"link_sym_armclang.h\"\n#endif\n\n#ifdef BOOT_CODE_IN_RAM\n#define MUTEX_CODE_LOC BOOT_TEXT_SRAM_LOC\n#else\n#define MUTEX_CODE_LOC\n#endif\n\nextern uint32_t __got_info_start[];\n\nvoid BOOT_TEXT_FLASH_LOC GotBaseInit(void) {\n#ifndef __ARMCC_VERSION\n  asm volatile(\"ldr r9, =__got_info_start\");\n#endif\n}\n\n#ifndef __ARM_ARCH_ISA_ARM\n// -----------------------------------------------------------\n// Boot initialization\n// CAUTION: This function and all the functions it called must\n//          NOT access global data/bss, for the global data/bss\n//          is not available at that time.\n// -----------------------------------------------------------\nextern uint32_t __boot_sram_start_flash__[];\nextern uint32_t __boot_sram_end_flash__[];\nextern uint32_t __boot_sram_start__[];\nextern uint32_t __boot_bss_sram_start__[];\nextern uint32_t __boot_bss_sram_end__[];\n\nextern uint32_t __sram_text_data_start_flash__[];\nextern uint32_t __sram_text_data_end_flash__[];\nextern uint32_t __sram_text_data_start__[];\nextern uint32_t __sram_bss_start__[];\nextern uint32_t __sram_bss_end__[];\nextern uint32_t __fast_sram_text_data_start__[];\nextern uint32_t __fast_sram_text_data_end__[];\nextern uint32_t __fast_sram_text_data_start_flash__[];\nextern uint32_t __fast_sram_text_data_end_flash__[];\n\nvoid BOOT_TEXT_FLASH_LOC BootInit(void) {\n  uint32_t *dst, *src;\n\n  // Enable icache\n  hal_cache_enable(HAL_CACHE_ID_I_CACHE);\n  // Enable dcache\n  hal_cache_enable(HAL_CACHE_ID_D_CACHE);\n  // Enable write buffer\n  hal_cache_writebuffer_enable(HAL_CACHE_ID_D_CACHE);\n  // Enable write back\n  hal_cache_writeback_enable(HAL_CACHE_ID_D_CACHE);\n\n  // Init GOT base register\n  GotBaseInit();\n\n  // Init boot sections\n  for (dst = __boot_sram_start__, src = __boot_sram_start_flash__;\n       src < __boot_sram_end_flash__; dst++, src++) {\n    *dst = *src;\n  }\n\n  for (dst = __boot_bss_sram_start__; dst < __boot_bss_sram_end__; dst++) {\n    *dst = 0;\n  }\n\n  hal_cmu_setup();\n\n  for (dst = __sram_text_data_start__, src = __sram_text_data_start_flash__;\n       src < __sram_text_data_end_flash__; dst++, src++) {\n    *dst = *src;\n  }\n\n  for (dst = __sram_bss_start__; dst < __sram_bss_end__; dst++) {\n    *dst = 0;\n  }\n\n  for (dst = __fast_sram_text_data_start__,\n      src = __fast_sram_text_data_start_flash__;\n       src < __fast_sram_text_data_end_flash__; dst++, src++) {\n    *dst = *src;\n  }\n\n  // Init psram\n#if defined(CHIP_HAS_PSRAM) && defined(PSRAM_ENABLE)\n  hal_psram_init();\n#endif\n\n  // Init psramuhs\n#if defined(CHIP_HAS_PSRAMUHS) && defined(PSRAMUHS_ENABLE)\n  hal_cmu_dsp_clock_enable();\n  hal_cmu_dsp_reset_clear();\n  hal_psramuhs_init();\n#endif\n}\n#endif\n\n// -----------------------------------------------------------\n// Mutex flag\n// -----------------------------------------------------------\n\nint MUTEX_CODE_LOC set_bool_flag(bool *flag) {\n  bool busy;\n\n  do {\n    busy = (bool)__LDREXB((unsigned char *)flag);\n    if (busy) {\n      __CLREX();\n      return -1;\n    }\n  } while (__STREXB(true, (unsigned char *)flag));\n  __DMB();\n\n  return 0;\n}\n\nvoid MUTEX_CODE_LOC clear_bool_flag(bool *flag) {\n  *flag = false;\n  __DMB();\n}\n\n// -----------------------------------------------------------\n// Misc\n// -----------------------------------------------------------\n\nfloat db_to_float(float db) {\n  float coef;\n\n#if !defined(NOSTD) && defined(ACCURATE_DB_TO_FLOAT)\n  // The math lib will consume 4K+ bytes of space\n  coef = powf(10, db / 20);\n#else\n  static const float factor_m9db = 0.354813389234;\n  static const float factor_m3db = 0.707945784384;\n  static const float factor_m1db = 0.891250938134;\n  static const float factor_m0p5db = 0.944060876286;\n  static const float factor_m0p1db = 0.988553094657;\n\n  coef = 1.0;\n\n  if (db < 0) {\n    while (1) {\n      if (db <= -9.0) {\n        db += 9.0;\n        coef *= factor_m9db;\n      } else if (db <= -3.0) {\n        db += 3.0;\n        coef *= factor_m3db;\n      } else if (db <= -1.0) {\n        db += 1.0;\n        coef *= factor_m1db;\n      } else if (db <= -0.5) {\n        db += 0.5;\n        coef *= factor_m0p5db;\n      } else if (db <= -0.1 / 2) {\n        db += 0.1;\n        coef *= factor_m0p1db;\n      } else {\n        break;\n      }\n    }\n  } else if (db > 0) {\n    while (1) {\n      if (db >= 9.0) {\n        db -= 9.0;\n        coef /= factor_m9db;\n      } else if (db >= 3.0) {\n        db -= 3.0;\n        coef /= factor_m3db;\n      } else if (db >= 1.0) {\n        db -= 1.0;\n        coef /= factor_m1db;\n      } else if (db >= 0.5) {\n        db -= 0.5;\n        coef /= factor_m0p5db;\n      } else if (db >= 0.1 / 2) {\n        db -= 0.1;\n        coef /= factor_m0p1db;\n      } else {\n        break;\n      }\n    }\n  }\n#endif\n\n  return coef;\n}\n\nuint32_t get_msb_pos(uint32_t val) {\n  uint32_t lead_zero;\n\n  lead_zero = __CLZ(val);\n  return (lead_zero >= 32) ? 32 : 31 - lead_zero;\n}\n\nuint32_t get_lsb_pos(uint32_t val) { return __CLZ(__RBIT(val)); }\n\nuint32_t integer_sqrt(uint32_t val) {\n  unsigned int msb;\n  unsigned int x;\n  unsigned int y;\n\n  if (val == 0) {\n    return 0;\n  }\n\n  for (msb = 31; msb > 0; msb--) {\n    if (val & (1 << msb)) {\n      break;\n    }\n  }\n\n  x = ((1 << msb) + 1) / 2;\n\n  while (1) {\n    y = (x + val / x) / 2;\n    if (y >= x) {\n      break;\n    }\n    x = y;\n  }\n\n  return x;\n}\n\nuint32_t integer_sqrt_nearest(uint32_t val) {\n  unsigned int s;\n\n  s = integer_sqrt(val * 4);\n  return (s + 1) / 2;\n}\n"
  },
  {
    "path": "platform/drivers/Makefile",
    "content": "obj-y := ana/ codec/ norflash/ bt/ btpcm/ sbcacc/\n\nsubdir-ccflags-y += -Iplatform/drivers/ana  \\\n\t\t\t\t\t\t\t\t\t\t-Iplatform/drivers/bt\n\t\t\t\t\t\t\t\t\t\t\nVCO_TEST_TOOL ?= 1\nifeq ($(VCO_TEST_TOOL),1)\nsubdir-ccflags-y += -DVCO_TEST_TOOL\nendif\n"
  },
  {
    "path": "platform/drivers/ana/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\nobj-y += $(CHIP)/\n\nsubdir-ccflags-y += -Iplatform/drivers/ana\n\n# PMU settings\nexport PMU_CFG_FLAGS :=\n\n# ANALOG settings\nexport ANA_CFG_FLAGS :=\n\n# USBPHY settings\nexport USBPHY_CFG_FLAGS :=\n\nexport PMU_DCDC_CALIB ?= 1\nifeq ($(PMU_DCDC_CALIB),1)\nPMU_CFG_FLAGS += -DPMU_DCDC_CALIB\nendif\n\nifeq ($(PMU_FULL_INIT),1)\nPMU_CFG_FLAGS += -DPMU_FULL_INIT\nPMU_INIT := 1\nendif\nifeq ($(PMU_INIT),1)\nPMU_CFG_FLAGS += -DPMU_INIT\nendif\n\nifeq ($(NO_SLEEP),1)\nPMU_CFG_FLAGS += -DNO_SLEEP\nendif\n\nifeq ($(MCU_HIGH_PERFORMANCE_MODE),1)\nPMU_CFG_FLAGS += -DMCU_HIGH_PERFORMANCE_MODE\nendif\n\nifneq ($(CHIP),best1000)\nifneq ($(PROGRAMMER),1)\nVCRYSTAL_OFF ?= 1\nendif\nendif\nifeq ($(VCRYSTAL_OFF),1)\nPMU_CFG_FLAGS += -DVCRYSTAL_OFF\nendif\n\nifeq ($(VMEM_ON),1)\nPMU_CFG_FLAGS += -DVMEM_ON\nendif\n\nifeq ($(VUSB_ON),1)\nPMU_CFG_FLAGS += -DVUSB_ON\nendif\n\nifeq ($(ULTRA_LOW_POWER),1)\nPMU_CFG_FLAGS += -DULTRA_LOW_POWER\nendif\n\nifeq ($(DIGMIC_HIGH_VOLT),1)\nPMU_CFG_FLAGS += -DDIGMIC_HIGH_VOLT\nendif\n\nifeq ($(ANA_26M_X4_ENABLE),1)\nPMU_CFG_FLAGS += -DANA_26M_X4_ENABLE\nendif\nifeq ($(OSC_26M_X4_AUD2BB),1)\nPMU_CFG_FLAGS += -DOSC_26M_X4_AUD2BB\nendif\n\nifeq ($(DIG_OSC_X4_ENABLE),1)\nPMU_CFG_FLAGS += -DDIG_OSC_X4_ENABLE\nendif\n\nifeq ($(RTC_ENABLE),1)\nPMU_CFG_FLAGS += -DRTC_ENABLE\nendif\n\nifeq ($(CLK_32K_FROM_OSC),1)\nPMU_CFG_FLAGS += -DCLK_32K_FROM_OSC\nendif\n\nifeq ($(CHIP_HAS_DCO),1)\nPMU_CFG_FLAGS += -DCHIP_HAS_DCO\nANA_CFG_FLAGS += -DCHIP_HAS_DCO\nendif\n\nifeq ($(USB_HIGH_SPEED),1)\nPMU_CFG_FLAGS += -DUSB_HIGH_SPEED\nUSBPHY_CFG_FLAGS += -DUSB_HIGH_SPEED\nendif\n\nifeq ($(CHIP_HAS_USBPHY),1)\nUSBPHY_CFG_FLAGS += -DCHIP_HAS_USBPHY\nifeq ($(CHIP_HAS_SPIPHY),1)\nUSBPHY_CFG_FLAGS += -DCHIP_HAS_SPIPHY\nPMU_CFG_FLAGS += -DCHIP_HAS_SPIPHY\nendif\nendif\n\nifeq ($(USB_HS_LOOPBACK_TEST),1)\nUSBPHY_CFG_FLAGS += -DUSB_HS_LOOPBACK_TEST\nendif\n\nexport PLL_CFG_FLAGS :=\nifeq ($(CHIP_HAS_SPIPHY),1)\nPLL_CFG_FLAGS += -DCHIP_HAS_SPIPHY\nendif\n\nifeq ($(POWER_MODE),LDO)\nPMU_CFG_FLAGS += -DLDO_MODE\nelse\nifeq ($(POWER_MODE),DIG_DCDC)\nPMU_CFG_FLAGS += -DDIG_DCDC_MODE\nelse\nifeq ($(POWER_MODE),ANA_DCDC)\nPMU_CFG_FLAGS += -DANA_DCDC_MODE\nelse\nifneq ($(POWER_MODE),)\n$(error Invalid POWER_MODE: $(POWER_MODE))\nendif\nendif\nendif\nendif\n\nifeq ($(MTEST_ENABLED),1)\nPMU_CFG_FLAGS +=-DMTEST_ENABLED\nifneq ($(MTEST_CLK_MHZ),)\nPMU_CFG_FLAGS +=-DMTEST_CLK_MHZ=$(MTEST_CLK_MHZ)\nendif # MTEST_CLK_MHZ\nifneq ($(MTEST_VOLT),)\nVCORE_STEM :=$(subst .,_,$(MTEST_VOLT))\nifeq ($(POWER_MODE),LDO)\nPMU_CFG_FLAGS += -DMTEST_VOLT=PMU_VDIG_$(VCORE_STEM)\nelse\nPMU_CFG_FLAGS += -DMTEST_VOLT=PMU_DCDC_DIG_$(VCORE_STEM)\nendif\nendif # MTEST_VOLT\nendif # MTEST_ENABLED\n\nANA_CFG_FLAGS += $(MAX_DAC_OUTPUT_FLAGS)\n\nifeq ($(AUDIO_INPUT_CAPLESSMODE),1)\nANA_CFG_FLAGS += -D_MIC_CAPLESSMODE_\nendif\n\nifeq ($(AUDIO_INPUT_LARGEGAIN),1)\nANA_CFG_FLAGS += -D_MIC_LARGEGAIN_\nendif\n\nifeq ($(AUDIO_OUTPUT_DIFF),1)\nANA_CFG_FLAGS += -DAUDIO_OUTPUT_DIFF\nPMU_CFG_FLAGS += -DAUDIO_OUTPUT_DIFF\nendif\n\nifeq ($(AUDIO_OUTPUT_DC_CALIB),1)\nANA_CFG_FLAGS += -DAUDIO_OUTPUT_DC_CALIB\nendif\nifeq ($(AUDIO_OUTPUT_DC_CALIB_ANA),1)\nANA_CFG_FLAGS += -DAUDIO_OUTPUT_DC_CALIB_ANA\nendif\n\nifeq ($(CODEC_HIGH_QUALITY),1)\nANA_CFG_FLAGS += -DCODEC_HIGH_QUALITY\nPMU_CFG_FLAGS += -DCODEC_HIGH_QUALITY\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\nANA_CFG_FLAGS += -D__AUDIO_RESAMPLE__\nPMU_CFG_FLAGS += -D__AUDIO_RESAMPLE__\nendif\n\nifeq ($(ANC_APP),1)\nANA_CFG_FLAGS += -DANC_APP\nPMU_CFG_FLAGS += -DANC_APP\nendif\n\nifeq ($(ANC_INIT_SPEEDUP),1)\nANA_CFG_FLAGS += -DANC_INIT_SPEEDUP\nendif\nifeq ($(ANC_FF_ENABLED),1)\nANA_CFG_FLAGS += -DANC_FF_ENABLED\nendif\nifeq ($(ANC_FB_ENABLED),1)\nANA_CFG_FLAGS += -DANC_FB_ENABLED\nendif\n\nifneq ($(ANA_DC_CALIB_L),)\nANA_CFG_FLAGS += -DANA_DC_CALIB_L=$(ANA_DC_CALIB_L)\nendif\nifneq ($(ANA_DC_CALIB_R),)\nANA_CFG_FLAGS += -DANA_DC_CALIB_R=$(ANA_DC_CALIB_R)\nendif\n\nifeq ($(DYN_ADC_GAIN),1)\nANA_CFG_FLAGS += -DDYN_ADC_GAIN\nendif\n\n"
  },
  {
    "path": "platform/drivers/ana/analog.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ANALOG_H__\n#define __ANALOG_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdbool.h\"\n#include \"hal_analogif.h\"\n#include \"hal_cmu.h\"\n#include \"hal_aud.h\"\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(analog)\n\n#define ANALOG_DEBUG_TRACE(n, s, ...)\n//TRACE(n, s, ##__VA_ARGS__)\n#define ANALOG_DEBUG_TRACE_IMM(n, s, ...)  TRACE_IMM(n, s, ##__VA_ARGS__)\n#define ANALOG_INFO_TRACE(n, s, ...)       TRACE(n, s, ##__VA_ARGS__)\n\n#ifndef ISPI_ANA_REG\n#define ISPI_ANA_REG(reg)               (reg)\n#endif\n#define analog_read(reg, val)           hal_analogif_reg_read(ISPI_ANA_REG(reg), val)\n#define analog_write(reg, val)          hal_analogif_reg_write(ISPI_ANA_REG(reg), val)\n\n#define FLOAT_TO_PPB_INT(f)             ((int)(f * 1000 * 1000 * 1000))\n\nenum ANA_AUD_PLL_USER_T {\n    ANA_AUD_PLL_USER_CODEC      = (1 << 0),\n    ANA_AUD_PLL_USER_I2S        = (1 << 1),\n    ANA_AUD_PLL_USER_SPDIF      = (1 << 2),\n    ANA_AUD_PLL_USER_PCM        = (1 << 3),\n\n    ANA_AUD_PLL_USER_END        = (1 << 4),\n};\n\nvoid analog_aud_freq_pll_config(uint32_t freq, uint32_t div);\n\nvoid analog_aud_get_dc_calib_value(int16_t *dc_l, int16_t *dc_r);\n\nvoid analog_open(void);\n\nvoid analog_aud_xtal_tune(float ratio);\n\nvoid analog_aud_pll_tune(float ratio);\n\nvoid analog_aud_pll_open(enum ANA_AUD_PLL_USER_T user);\n\nvoid analog_aud_pll_close(enum ANA_AUD_PLL_USER_T user);\n\nvoid analog_aud_set_dac_gain(int32_t v);\n\nuint32_t analog_codec_get_dac_gain(void);\n\nuint32_t analog_codec_dac_gain_to_db(int32_t gain);\n\nint32_t analog_codec_dac_max_attn_db(void);\n\nvoid analog_aud_apply_anc_adc_gain_offset(enum ANC_TYPE_T type, int16_t offset_l, int16_t offset_r);\n\nvoid analog_aud_apply_adc_gain_offset(enum AUD_CHANNEL_MAP_T ch_map, int16_t offset);\n\nvoid analog_aud_codec_open(void);\n\nvoid analog_aud_codec_close(void);\n\nvoid analog_aud_codec_mute(void);\n\nvoid analog_aud_codec_nomute(void);\n\nvoid analog_aud_codec_adc_enable(enum AUD_IO_PATH_T input_path, enum AUD_CHANNEL_MAP_T ch_map, bool en);\n\nvoid analog_aud_codec_dac_enable(bool en);\n\nvoid analog_aud_codec_speaker_enable(bool en);\n\nvoid analog_aud_codec_anc_enable(enum ANC_TYPE_T type, bool en);\n\nvoid analog_aud_mickey_enable(bool en);\n\nvoid analog_sleep(void);\n\nvoid analog_wakeup(void);\n\nint analog_debug_config_audio_output(bool diff);\n\nint analog_debug_config_codec(uint16_t mv);\n\nint analog_debug_config_low_power_adc(bool enable);\n\nvoid analog_debug_config_anc_calib_mode(bool enable);\n\nbool analog_debug_get_anc_calib_mode(void);\n\nvoid analog_productiontest_settings_checker(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/ana/best2300p/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\nifeq ($(CODEC_HIGH_QUALITY),1)\nVCODEC_VOLT ?= 1.95V\nelse\nVCODEC_VOLT ?= 1.7V\nendif\nifneq ($(filter-out 1.6V 1.7V 1.8V 1.9V 1.95V,$(VCODEC_VOLT)),)\n$(error Invalid VCODEC_VOLT=$(VCODEC_VOLT))\nendif\nifneq ($(VCODEC_VOLT),)\nANA_CFG_FLAGS += -DVCODEC_VOLT=$(subst V,,$(VCODEC_VOLT))\nPMU_CFG_FLAGS += -DVCODEC_VOLT=$(subst V,,$(VCODEC_VOLT))\nifneq ($(filter 1.6V 1.7V 1.8V 1.9V 1.95V,$(VCODEC_VOLT)),)\nVCODEC_OFF ?= 1\nifeq ($(VHPPA_VOLT),)\nVHPPA_VOLT := $(VCODEC_VOLT)\nendif\nifneq ($(VCODEC_VOLT),$(VHPPA_VOLT))\n$(error Incompatible VCODEC_VOLT=$(VCODEC_VOLT) with VHPPA_VOLT=$(VHPPA_VOLT))\nendif\nendif\nendif\n\nifeq ($(VCODEC_OFF),1)\nPMU_CFG_FLAGS += -DVCODEC_OFF\nendif\n\nifeq ($(VHPPA2VCODEC),1)\nPMU_CFG_FLAGS += -DVHPPA2VCODEC\nendif\n\nifeq ($(HPPA_LDO_ON),1)\nPMU_CFG_FLAGS += -DHPPA_LDO_ON\nendif\n\nVHPPA_VOLT ?= 1.8V\nifneq ($(filter-out 1.6V 1.7V 1.8V 1.9V 1.95V,$(VHPPA_VOLT)),)\n$(error Invalid VHPPA_VOLT=$(VHPPA_VOLT))\nendif\nifneq ($(VHPPA_VOLT),)\nPMU_CFG_FLAGS += -DVHPPA_VOLT=$(subst V,,$(VHPPA_VOLT))\nendif\n\nHIGH_VCORE ?= 1\nifeq ($(HIGH_VCORE),1)\nPMU_CFG_FLAGS += -DHIGH_VCORE\nendif\n\nifeq ($(USE_CYBERON),1)\nPMU_CFG_FLAGS += -DUSE_CYBERON\nendif\n\nifneq ($(EFUSE_BLOCK_NUM),)\nPMU_CFG_FLAGS += -DEFUSE_BLOCK_NUM=$(EFUSE_BLOCK_NUM)\nendif\n\nifeq ($(LBRT),1)\nVANA_VOLT ?= 1.4V\nelse\nVANA_VOLT ?= 1.3V\nendif\nifneq ($(filter-out 1.2V 1.3V 1.35V 1.4V 1.5V 1.6V,$(VANA_VOLT)),)\n$(error Invalid VANA_VOLT=$(VANA_VOLT))\nendif\nifneq ($(VANA_VOLT),)\nVANA_STEM := $(subst .,P,$(VANA_VOLT))\nPMU_CFG_FLAGS += -DVANA_$(VANA_STEM)\nendif\n\nLOW_POWER_ADC ?= 1\nifeq ($(LOW_POWER_ADC),1)\nANA_CFG_FLAGS += -DLOW_POWER_ADC\nendif\n\nifeq ($(DAC_DRE_GAIN_DC_UPDATE),1)\nANA_CFG_FLAGS += -DDAC_DRE_GAIN_DC_UPDATE\nendif\n\nifeq ($(AUDIO_USE_BBPLL),1)\nANA_CFG_FLAGS += -DAUDIO_USE_BBPLL\nPMU_CFG_FLAGS += -DAUDIO_USE_BBPLL\nendif\n\nifeq ($(USB_USE_USBPLL),1)\nPMU_CFG_FLAGS += -DUSB_USE_USBPLL\nUSBPHY_CFG_FLAGS += -DUSB_USE_USBPLL\nendif\n\nCFLAGS_pmu_$(CHIP).o += $(PMU_CFG_FLAGS)\n\nCFLAGS_analog_$(CHIP).o += $(ANA_CFG_FLAGS)\n\nCFLAGS_usbphy_$(CHIP).o += $(USBPHY_CFG_FLAGS)\n\n"
  },
  {
    "path": "platform/drivers/ana/best2300p/analog_best2300p.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"cmsis.h\"\n#include \"plat_types.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_codec.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"tgt_hardware.h\"\n\n#define VCM_ON\n\n// Not using 1uF\n#define VCM_CAP_100NF\n\n#if defined(CODEC_HIGH_QUALITY)\n#undef LOW_CODEC_BIAS\n#else\n#define LOW_CODEC_BIAS\n#endif\n\n#define DAC_DC_CALIB_BIT_WIDTH 14\n\n#define DEFAULT_ANC_FF_ADC_GAIN_DB 6\n#define DEFAULT_ANC_FB_ADC_GAIN_DB 6\n#define DEFAULT_VOICE_ADC_GAIN_DB 12\n\n#ifndef ANALOG_ADC_A_GAIN_DB\n#if defined(ANC_APP) && defined(ANC_FF_ENABLED) &&                             \\\n    ((ANC_FF_MIC_CH_L == AUD_CHANNEL_MAP_CH0) ||                               \\\n     (ANC_FF_MIC_CH_R == AUD_CHANNEL_MAP_CH0))\n#define ANALOG_ADC_A_GAIN_DB DEFAULT_ANC_FF_ADC_GAIN_DB\n#elif defined(ANC_APP) && defined(ANC_FB_ENABLED) &&                           \\\n    ((ANC_FB_MIC_CH_L == AUD_CHANNEL_MAP_CH0) ||                               \\\n     (ANC_FB_MIC_CH_R == AUD_CHANNEL_MAP_CH0))\n#define ANALOG_ADC_A_GAIN_DB DEFAULT_ANC_FB_ADC_GAIN_DB\n#else\n#define ANALOG_ADC_A_GAIN_DB DEFAULT_VOICE_ADC_GAIN_DB\n#endif\n#endif\n\n#ifndef ANALOG_ADC_B_GAIN_DB\n#if defined(ANC_APP) && defined(ANC_FF_ENABLED) &&                             \\\n    ((ANC_FF_MIC_CH_L == AUD_CHANNEL_MAP_CH1) ||                               \\\n     (ANC_FF_MIC_CH_R == AUD_CHANNEL_MAP_CH1))\n#define ANALOG_ADC_B_GAIN_DB DEFAULT_ANC_FF_ADC_GAIN_DB\n#elif defined(ANC_APP) && defined(ANC_FB_ENABLED) &&                           \\\n    ((ANC_FB_MIC_CH_L == AUD_CHANNEL_MAP_CH1) ||                               \\\n     (ANC_FB_MIC_CH_R == AUD_CHANNEL_MAP_CH1))\n#define ANALOG_ADC_B_GAIN_DB DEFAULT_ANC_FB_ADC_GAIN_DB\n#else\n#define ANALOG_ADC_B_GAIN_DB DEFAULT_VOICE_ADC_GAIN_DB\n#endif\n#endif\n\n#ifndef ANALOG_ADC_C_GAIN_DB\n#if defined(ANC_APP) && defined(ANC_FF_ENABLED) &&                             \\\n    ((ANC_FF_MIC_CH_L == AUD_CHANNEL_MAP_CH2) ||                               \\\n     (ANC_FF_MIC_CH_R == AUD_CHANNEL_MAP_CH2))\n#define ANALOG_ADC_C_GAIN_DB DEFAULT_ANC_FF_ADC_GAIN_DB\n#elif defined(ANC_APP) && defined(ANC_FB_ENABLED) &&                           \\\n    ((ANC_FB_MIC_CH_L == AUD_CHANNEL_MAP_CH2) ||                               \\\n     (ANC_FB_MIC_CH_R == AUD_CHANNEL_MAP_CH2))\n#define ANALOG_ADC_C_GAIN_DB DEFAULT_ANC_FB_ADC_GAIN_DB\n#else\n#define ANALOG_ADC_C_GAIN_DB DEFAULT_VOICE_ADC_GAIN_DB\n#endif\n#endif\n\n#ifndef ANALOG_ADC_D_GAIN_DB\n#if defined(ANC_APP) && defined(ANC_FF_ENABLED) &&                             \\\n    ((ANC_FF_MIC_CH_L == AUD_CHANNEL_MAP_CH3) ||                               \\\n     (ANC_FF_MIC_CH_R == AUD_CHANNEL_MAP_CH3))\n#define ANALOG_ADC_D_GAIN_DB DEFAULT_ANC_FF_ADC_GAIN_DB\n#elif defined(ANC_APP) && defined(ANC_FB_ENABLED) &&                           \\\n    ((ANC_FB_MIC_CH_L == AUD_CHANNEL_MAP_CH3) ||                               \\\n     (ANC_FB_MIC_CH_R == AUD_CHANNEL_MAP_CH3))\n#define ANALOG_ADC_D_GAIN_DB DEFAULT_ANC_FB_ADC_GAIN_DB\n#else\n#define ANALOG_ADC_D_GAIN_DB DEFAULT_VOICE_ADC_GAIN_DB\n#endif\n#endif\n\n#ifndef ANALOG_ADC_E_GAIN_DB\n#if defined(ANC_APP) && defined(ANC_FF_ENABLED) &&                             \\\n    ((ANC_FF_MIC_CH_L == AUD_CHANNEL_MAP_CH4) ||                               \\\n     (ANC_FF_MIC_CH_R == AUD_CHANNEL_MAP_CH4))\n#define ANALOG_ADC_E_GAIN_DB DEFAULT_ANC_FF_ADC_GAIN_DB\n#elif defined(ANC_APP) && defined(ANC_FB_ENABLED) &&                           \\\n    ((ANC_FB_MIC_CH_L == AUD_CHANNEL_MAP_CH4) ||                               \\\n     (ANC_FB_MIC_CH_R == AUD_CHANNEL_MAP_CH4))\n#define ANALOG_ADC_E_GAIN_DB DEFAULT_ANC_FB_ADC_GAIN_DB\n#else\n#define ANALOG_ADC_E_GAIN_DB DEFAULT_VOICE_ADC_GAIN_DB\n#endif\n#endif\n\n#ifndef LINEIN_ADC_GAIN_DB\n#define LINEIN_ADC_GAIN_DB 0\n#endif\n\n#ifndef CFG_HW_AUD_MICKEY_DEV\n#define CFG_HW_AUD_MICKEY_DEV (AUD_VMIC_MAP_VMIC1)\n#endif\n\n#ifndef ANC_VMIC_CFG\n#error \"No ANC VMIC configured\"\n#define ANC_VMIC_CFG (AUD_VMIC_MAP_VMIC1)\n#endif\n\n// 61\n#define REG_CODEC_EN_ADCA (1 << 0)\n#define REG_CODEC_EN_ADCB (1 << 1)\n#define REG_CODEC_EN_ADCC (1 << 2)\n#define REG_CODEC_EN_ADCD (1 << 3)\n#define REG_CODEC_ADCA_DITHER_EN (1 << 4)\n#define REG_CODEC_ADCB_DITHER_EN (1 << 5)\n#define REG_CODEC_ADCC_DITHER_EN (1 << 6)\n#define REG_CODEC_ADCD_DITHER_EN (1 << 7)\n#define REG_CODEC_ADCA_CH_SEL_SHIFT 8\n#define REG_CODEC_ADCA_CH_SEL_MASK (0x3 << REG_CODEC_ADCA_CH_SEL_SHIFT)\n#define REG_CODEC_ADCA_CH_SEL(n) BITFIELD_VAL(REG_CODEC_ADCA_CH_SEL, n)\n#define REG_CODEC_ADCB_CH_SEL_SHIFT 10\n#define REG_CODEC_ADCB_CH_SEL_MASK (0x3 << REG_CODEC_ADCB_CH_SEL_SHIFT)\n#define REG_CODEC_ADCB_CH_SEL(n) BITFIELD_VAL(REG_CODEC_ADCB_CH_SEL, n)\n#define REG_CODEC_ADCC_CH_SEL_SHIFT 12\n#define REG_CODEC_ADCC_CH_SEL_MASK (0x3 << REG_CODEC_ADCC_CH_SEL_SHIFT)\n#define REG_CODEC_ADCC_CH_SEL(n) BITFIELD_VAL(REG_CODEC_ADCC_CH_SEL, n)\n#define REG_CODEC_ADCD_CH_SEL_SHIFT 14\n#define REG_CODEC_ADCD_CH_SEL_MASK (0x3 << REG_CODEC_ADCD_CH_SEL_SHIFT)\n#define REG_CODEC_ADCD_CH_SEL(n) BITFIELD_VAL(REG_CODEC_ADCD_CH_SEL, n)\n\n// 62\n#define REG_CODEC_RESET_ADCA (1 << 0)\n#define REG_CODEC_RESET_ADCB (1 << 1)\n#define REG_CODEC_RESET_ADCC (1 << 2)\n#define REG_CODEC_RESET_ADCD (1 << 3)\n#define CFG_RESET_ADCA_DR (1 << 4)\n#define CFG_RESET_ADCB_DR (1 << 5)\n#define CFG_RESET_ADCC_DR (1 << 6)\n#define CFG_RESET_ADCD_DR (1 << 7)\n#define REG_RX_PGAA_RESET (1 << 8)\n#define REG_RX_PGAB_RESET (1 << 9)\n#define REG_RX_PGAC_RESET (1 << 10)\n#define REG_RX_PGAD_RESET (1 << 11)\n#define CFG_RESET_PGAA_DR (1 << 12)\n#define CFG_RESET_PGAB_DR (1 << 13)\n#define CFG_RESET_PGAC_DR (1 << 14)\n#define CFG_RESET_PGAD_DR (1 << 15)\n\n// 63\n#define REG_CODEC_ADCA_GAIN_BIT_SHIFT 0\n#define REG_CODEC_ADCA_GAIN_BIT_MASK (0x7 << REG_CODEC_ADCA_GAIN_BIT_SHIFT)\n#define REG_CODEC_ADCA_GAIN_BIT(n) BITFIELD_VAL(REG_CODEC_ADCA_GAIN_BIT, n)\n#define REG_CODEC_ADCB_GAIN_BIT_SHIFT 3\n#define REG_CODEC_ADCB_GAIN_BIT_MASK (0x7 << REG_CODEC_ADCB_GAIN_BIT_SHIFT)\n#define REG_CODEC_ADCB_GAIN_BIT(n) BITFIELD_VAL(REG_CODEC_ADCB_GAIN_BIT, n)\n#define REG_CODEC_ADCC_GAIN_BIT_SHIFT 6\n#define REG_CODEC_ADCC_GAIN_BIT_MASK (0x7 << REG_CODEC_ADCC_GAIN_BIT_SHIFT)\n#define REG_CODEC_ADCC_GAIN_BIT(n) BITFIELD_VAL(REG_CODEC_ADCC_GAIN_BIT, n)\n#define REG_CODEC_ADCD_GAIN_BIT_SHIFT 9\n#define REG_CODEC_ADCD_GAIN_BIT_MASK (0x7 << REG_CODEC_ADCD_GAIN_BIT_SHIFT)\n#define REG_CODEC_ADCD_GAIN_BIT(n) BITFIELD_VAL(REG_CODEC_ADCD_GAIN_BIT, n)\n#define REG_CODEC_ADCA_GAIN_UPDATE (1 << 12)\n#define REG_CODEC_ADCB_GAIN_UPDATE (1 << 13)\n#define REG_CODEC_ADCC_GAIN_UPDATE (1 << 14)\n#define REG_CODEC_ADCD_GAIN_UPDATE (1 << 15)\n\n// 67\n#define REG_CODEC_ADC_IBSEL_REG_SHIFT 0\n#define REG_CODEC_ADC_IBSEL_REG_MASK (0xF << REG_CODEC_ADC_IBSEL_REG_SHIFT)\n#define REG_CODEC_ADC_IBSEL_REG(n) BITFIELD_VAL(REG_CODEC_ADC_IBSEL_REG, n)\n#define REG_CODEC_ADC_IBSEL_VCOMP_SHIFT 4\n#define REG_CODEC_ADC_IBSEL_VCOMP_MASK (0xF << REG_CODEC_ADC_IBSEL_VCOMP_SHIFT)\n#define REG_CODEC_ADC_IBSEL_VCOMP(n) BITFIELD_VAL(REG_CODEC_ADC_IBSEL_VCOMP, n)\n#define REG_CODEC_ADC_IBSEL_VREF_SHIFT 8\n#define REG_CODEC_ADC_IBSEL_VREF_MASK (0xF << REG_CODEC_ADC_IBSEL_VREF_SHIFT)\n#define REG_CODEC_ADC_IBSEL_VREF(n) BITFIELD_VAL(REG_CODEC_ADC_IBSEL_VREF, n)\n#define REG_CODEC_ADC_LPFVCM_SW_SHIFT 12\n#define REG_CODEC_ADC_LPFVCM_SW_MASK (0xF << REG_CODEC_ADC_LPFVCM_SW_SHIFT)\n#define REG_CODEC_ADC_LPFVCM_SW(n) BITFIELD_VAL(REG_CODEC_ADC_LPFVCM_SW, n)\n\n// 68\n#define REG_CODEC_ADC_OP1_IBIT_SHIFT 0\n#define REG_CODEC_ADC_OP1_IBIT_MASK (0x3 << REG_CODEC_ADC_OP1_IBIT_SHIFT)\n#define REG_CODEC_ADC_OP1_IBIT(n) BITFIELD_VAL(REG_CODEC_ADC_OP1_IBIT, n)\n#define REG_CODEC_ADC_OP1_R_SEL (1 << 2)\n#define REG_CODEC_ADC_OP2_IBIT_SHIFT 3\n#define REG_CODEC_ADC_OP2_IBIT_MASK (0x3 << REG_CODEC_ADC_OP2_IBIT_SHIFT)\n#define REG_CODEC_ADC_OP2_IBIT(n) BITFIELD_VAL(REG_CODEC_ADC_OP2_IBIT, n)\n#define REG_CODEC_ADC_OP2_R_SEL (1 << 5)\n#define REG_CODEC_ADC_OP3_IBIT_SHIFT 6\n#define REG_CODEC_ADC_OP3_IBIT_MASK (0x3 << REG_CODEC_ADC_OP3_IBIT_SHIFT)\n#define REG_CODEC_ADC_OP3_IBIT(n) BITFIELD_VAL(REG_CODEC_ADC_OP3_IBIT, n)\n#define REG_CODEC_ADC_OP3_R_SEL (1 << 8)\n#define REG_CODEC_ADC_OP4_IBIT_SHIFT 9\n#define REG_CODEC_ADC_OP4_IBIT_MASK (0x3 << REG_CODEC_ADC_OP4_IBIT_SHIFT)\n#define REG_CODEC_ADC_OP4_IBIT(n) BITFIELD_VAL(REG_CODEC_ADC_OP4_IBIT, n)\n#define REG_CODEC_ADC_OP4_R_SEL (1 << 11)\n#define REG_CODEC_ADC_VREF_SEL_SHIFT 12\n#define REG_CODEC_ADC_VREF_SEL_MASK (0xF << REG_CODEC_ADC_VREF_SEL_SHIFT)\n#define REG_CODEC_ADC_VREF_SEL(n) BITFIELD_VAL(REG_CODEC_ADC_VREF_SEL, n)\n\n// 69\n#define REG_CODEC_BIAS_IBSEL_SHIFT 0\n#define REG_CODEC_BIAS_IBSEL_MASK (0xF << REG_CODEC_BIAS_IBSEL_SHIFT)\n#define REG_CODEC_BIAS_IBSEL(n) BITFIELD_VAL(REG_CODEC_BIAS_IBSEL, n)\n#define REG_CODEC_BIAS_IBSEL_TX_SHIFT 4\n#define REG_CODEC_BIAS_IBSEL_TX_MASK (0xF << REG_CODEC_BIAS_IBSEL_TX_SHIFT)\n#define REG_CODEC_BIAS_IBSEL_TX(n) BITFIELD_VAL(REG_CODEC_BIAS_IBSEL_TX, n)\n#define REG_CODEC_BIAS_IBSEL_VOICE_SHIFT 8\n#define REG_CODEC_BIAS_IBSEL_VOICE_MASK                                        \\\n  (0xF << REG_CODEC_BIAS_IBSEL_VOICE_SHIFT)\n#define REG_CODEC_BIAS_IBSEL_VOICE(n)                                          \\\n  BITFIELD_VAL(REG_CODEC_BIAS_IBSEL_VOICE, n)\n#define REG_CODEC_BIAS_LOWV (1 << 12)\n#define REG_CODEC_BIAS_LOWV_LP (1 << 13)\n#define REG_CODEC_BUF_LOWPOWER (1 << 14)\n#define REG_CODEC_BUF_LOWPOWER2 (1 << 15)\n\n// 6A\n#define REG_CODEC_ADC_REG_VSEL_SHIFT 0\n#define REG_CODEC_ADC_REG_VSEL_MASK (0x7 << REG_CODEC_ADC_REG_VSEL_SHIFT)\n#define REG_CODEC_ADC_REG_VSEL(n) BITFIELD_VAL(REG_CODEC_ADC_REG_VSEL, n)\n#define REG_CODEC_ADC_RES_SEL_SHIFT 3\n#define REG_CODEC_ADC_RES_SEL_MASK (0x7 << REG_CODEC_ADC_RES_SEL_SHIFT)\n#define REG_CODEC_ADC_RES_SEL(n) BITFIELD_VAL(REG_CODEC_ADC_RES_SEL, n)\n#define REG_CODEC_BUF_LOWVCM_SHIFT 6\n#define REG_CODEC_BUF_LOWVCM_MASK (0x7 << REG_CODEC_BUF_LOWVCM_SHIFT)\n#define REG_CODEC_BUF_LOWVCM(n) BITFIELD_VAL(REG_CODEC_BUF_LOWVCM, n)\n#define REG_CODEC_EN_BIAS (1 << 9)\n#define REG_CODEC_EN_BIAS_LP (1 << 10)\n#define REG_CODEC_EN_RX_EXT (1 << 11)\n#define REG_CODEC_EN_TX_EXT (1 << 12)\n#define REG_CODEC_DAC_CLK_EDGE_SEL (1 << 13)\n#define CFG_TX_CH0_MUTE (1 << 14)\n#define CFG_TX_CH1_MUTE (1 << 15)\n\n// 6B\n#define REG_CODEC_EN_VCM (1 << 0)\n#define REG_CODEC_VCM_EN_LPF (1 << 1)\n#define REG_CODEC_LP_VCM (1 << 2)\n#define REG_CODEC_VCM_LOW_VCM_SHIFT 3\n#define REG_CODEC_VCM_LOW_VCM_MASK (0xF << REG_CODEC_VCM_LOW_VCM_SHIFT)\n#define REG_CODEC_VCM_LOW_VCM(n) BITFIELD_VAL(REG_CODEC_VCM_LOW_VCM, n)\n#define REG_CODEC_VCM_LOW_VCM_LP_SHIFT 7\n#define REG_CODEC_VCM_LOW_VCM_LP_MASK (0xF << REG_CODEC_VCM_LOW_VCM_LP_SHIFT)\n#define REG_CODEC_VCM_LOW_VCM_LP(n) BITFIELD_VAL(REG_CODEC_VCM_LOW_VCM_LP, n)\n#define REG_CODEC_VCM_LOW_VCM_LPF_SHIFT 11\n#define REG_CODEC_VCM_LOW_VCM_LPF_MASK (0xF << REG_CODEC_VCM_LOW_VCM_LPF_SHIFT)\n#define REG_CODEC_VCM_LOW_VCM_LPF(n) BITFIELD_VAL(REG_CODEC_VCM_LOW_VCM_LPF, n)\n#define REG_CODEC_EN_VCM_BUFFER (1 << 15)\n\n// 6C\n#define REG_CODEC_RX_EN_VTOI (1 << 0)\n#define REG_CODEC_RX_VTOI_I_DAC2_SHIFT 1\n#define REG_CODEC_RX_VTOI_I_DAC2_MASK (0x7 << REG_CODEC_RX_VTOI_I_DAC2_SHIFT)\n#define REG_CODEC_RX_VTOI_I_DAC2(n) BITFIELD_VAL(REG_CODEC_RX_VTOI_I_DAC2, n)\n#define REG_CODEC_RX_VTOI_IDAC_SEL_SHIFT 4\n#define REG_CODEC_RX_VTOI_IDAC_SEL_MASK                                        \\\n  (0xF << REG_CODEC_RX_VTOI_IDAC_SEL_SHIFT)\n#define REG_CODEC_RX_VTOI_IDAC_SEL(n)                                          \\\n  BITFIELD_VAL(REG_CODEC_RX_VTOI_IDAC_SEL, n)\n#define REG_CODEC_RX_VTOI_VCS_SEL_SHIFT 8\n#define REG_CODEC_RX_VTOI_VCS_SEL_MASK (0x1F << REG_CODEC_RX_VTOI_VCS_SEL_SHIFT)\n#define REG_CODEC_RX_VTOI_VCS_SEL(n) BITFIELD_VAL(REG_CODEC_RX_VTOI_VCS_SEL, n)\n#define REG_CODEC_ADCA_RES_2P5K_DR (1 << 13)\n#define REG_CODEC_ADCB_RES_2P5K_DR (1 << 14)\n#define REG_CODEC_ADCC_RES_2P5K_DR (1 << 15)\n\n// 6D\n#define REG_CODEC_TX_DAC_MUTEL (1 << 0)\n#define REG_CODEC_TX_DAC_MUTER (1 << 1)\n#define REG_CODEC_TX_DAC_SWR_SHIFT 2\n#define REG_CODEC_TX_DAC_SWR_MASK (0x3 << REG_CODEC_TX_DAC_SWR_SHIFT)\n#define REG_CODEC_TX_DAC_SWR(n) BITFIELD_VAL(REG_CODEC_TX_DAC_SWR, n)\n#define REG_CODEC_TX_DAC_VREF_L_SHIFT 4\n#define REG_CODEC_TX_DAC_VREF_L_MASK (0xF << REG_CODEC_TX_DAC_VREF_L_SHIFT)\n#define REG_CODEC_TX_DAC_VREF_L(n) BITFIELD_VAL(REG_CODEC_TX_DAC_VREF_L, n)\n#define REG_CODEC_TX_DAC_VREF_R_SHIFT 8\n#define REG_CODEC_TX_DAC_VREF_R_MASK (0xF << REG_CODEC_TX_DAC_VREF_R_SHIFT)\n#define REG_CODEC_TX_DAC_VREF_R(n) BITFIELD_VAL(REG_CODEC_TX_DAC_VREF_R, n)\n#define REG_CODEC_TX_EAR_CAS_BIT_SHIFT 12\n#define REG_CODEC_TX_EAR_CAS_BIT_MASK (0x3 << REG_CODEC_TX_EAR_CAS_BIT_SHIFT)\n#define REG_CODEC_TX_EAR_CAS_BIT(n) BITFIELD_VAL(REG_CODEC_TX_EAR_CAS_BIT, n)\n#define REG_CODEC_TX_EAR_DIS_SHIFT 14\n#define REG_CODEC_TX_EAR_DIS_MASK (0x3 << REG_CODEC_TX_EAR_DIS_SHIFT)\n#define REG_CODEC_TX_EAR_DIS(n) BITFIELD_VAL(REG_CODEC_TX_EAR_DIS, n)\n\n// 6E\n#define REG_CODEC_TX_EAR_COMP_L_SHIFT 0\n#define REG_CODEC_TX_EAR_COMP_L_MASK (0x7 << REG_CODEC_TX_EAR_COMP_L_SHIFT)\n#define REG_CODEC_TX_EAR_COMP_L(n) BITFIELD_VAL(REG_CODEC_TX_EAR_COMP_L, n)\n#define REG_CODEC_TX_EAR_COMP_R_SHIFT 3\n#define REG_CODEC_TX_EAR_COMP_R_MASK (0x7 << REG_CODEC_TX_EAR_COMP_R_SHIFT)\n#define REG_CODEC_TX_EAR_COMP_R(n) BITFIELD_VAL(REG_CODEC_TX_EAR_COMP_R, n)\n#define REG_CODEC_TX_EAR_DOUBLEBIAS (1 << 6)\n#define REG_CODEC_TX_EAR_DR_EN (1 << 7)\n#define REG_CODEC_TX_EAR_DR_ST_SHIFT 8\n#define REG_CODEC_TX_EAR_DR_ST_MASK (0x7 << REG_CODEC_TX_EAR_DR_ST_SHIFT)\n#define REG_CODEC_TX_EAR_DR_ST(n) BITFIELD_VAL(REG_CODEC_TX_EAR_DR_ST, n)\n#define REG_CODEC_TX_EAR_ENBIAS (1 << 11)\n#define REG_CODEC_TX_EAR_FBCAP_SHIFT 12\n#define REG_CODEC_TX_EAR_FBCAP_MASK (0x3 << REG_CODEC_TX_EAR_FBCAP_SHIFT)\n#define REG_CODEC_TX_EAR_FBCAP(n) BITFIELD_VAL(REG_CODEC_TX_EAR_FBCAP, n)\n#define REG_CODEC_TX_EAR_IBSEL_SHIFT 14\n#define REG_CODEC_TX_EAR_IBSEL_MASK (0x3 << REG_CODEC_TX_EAR_IBSEL_SHIFT)\n#define REG_CODEC_TX_EAR_IBSEL(n) BITFIELD_VAL(REG_CODEC_TX_EAR_IBSEL, n)\n\n// 6F\n#define REG_CODEC_TX_EAR_DRE_GAIN_L_SHIFT 0\n#define REG_CODEC_TX_EAR_DRE_GAIN_L_MASK                                       \\\n  (0x1F << REG_CODEC_TX_EAR_DRE_GAIN_L_SHIFT)\n#define REG_CODEC_TX_EAR_DRE_GAIN_L(n)                                         \\\n  BITFIELD_VAL(REG_CODEC_TX_EAR_DRE_GAIN_L, n)\n#define REG_CODEC_TX_EAR_DRE_GAIN_R_SHIFT 5\n#define REG_CODEC_TX_EAR_DRE_GAIN_R_MASK                                       \\\n  (0x1F << REG_CODEC_TX_EAR_DRE_GAIN_R_SHIFT)\n#define REG_CODEC_TX_EAR_DRE_GAIN_R(n)                                         \\\n  BITFIELD_VAL(REG_CODEC_TX_EAR_DRE_GAIN_R, n)\n#define DRE_GAIN_SEL_L (1 << 10)\n#define DRE_GAIN_SEL_R (1 << 11)\n#define REG_CODEC_TX_EAR_DRE_GAIN_L_UPDATE (1 << 12)\n#define REG_CODEC_TX_EAR_DRE_GAIN_R_UPDATE (1 << 13)\n#define REG_CODEC_TX_EAR_GAIN_SHIFT 14\n#define REG_CODEC_TX_EAR_GAIN_MASK (0x3 << REG_CODEC_TX_EAR_GAIN_SHIFT)\n#define REG_CODEC_TX_EAR_GAIN(n) BITFIELD_VAL(REG_CODEC_TX_EAR_GAIN, n)\n\n// 70\n#define REG_CODEC_TX_EAR_LCAL (1 << 0)\n#define REG_CODEC_TX_EAR_RCAL (1 << 1)\n#define REG_CODEC_TX_EAR_LPBIAS (1 << 2)\n#define REG_CODEC_TX_EAR_OCEN (1 << 3)\n#define REG_CODEC_TX_EAR_OFFEN (1 << 4)\n#define REG_CODEC_TX_EAR_OUTPUTSEL_SHIFT 5\n#define REG_CODEC_TX_EAR_OUTPUTSEL_MASK                                        \\\n  (0xF << REG_CODEC_TX_EAR_OUTPUTSEL_SHIFT)\n#define REG_CODEC_TX_EAR_OUTPUTSEL(n)                                          \\\n  BITFIELD_VAL(REG_CODEC_TX_EAR_OUTPUTSEL, n)\n#define REG_CODEC_TX_EAR_SOFTSTART_SHIFT 9\n#define REG_CODEC_TX_EAR_SOFTSTART_MASK                                        \\\n  (0x3F << REG_CODEC_TX_EAR_SOFTSTART_SHIFT)\n#define REG_CODEC_TX_EAR_SOFTSTART(n)                                          \\\n  BITFIELD_VAL(REG_CODEC_TX_EAR_SOFTSTART, n)\n#define CFG_TX_TREE_EN (1 << 15)\n\n// 71\n#define REG_CODEC_TX_EAR_LOWGAINL_SHIFT 0\n#define REG_CODEC_TX_EAR_LOWGAINL_MASK (0x3 << REG_CODEC_TX_EAR_LOWGAINL_SHIFT)\n#define REG_CODEC_TX_EAR_LOWGAINL(n) BITFIELD_VAL(REG_CODEC_TX_EAR_LOWGAINL, n)\n#define REG_CODEC_TX_EAR_OFF_BITL_SHIFT 2\n#define REG_CODEC_TX_EAR_OFF_BITL_MASK                                         \\\n  (0x3FFF << REG_CODEC_TX_EAR_OFF_BITL_SHIFT)\n#define REG_CODEC_TX_EAR_OFF_BITL(n) BITFIELD_VAL(REG_CODEC_TX_EAR_OFF_BITL, n)\n\n// 72\n#define REG_CODEC_TX_EAR_LOWGAINR_SHIFT 0\n#define REG_CODEC_TX_EAR_LOWGAINR_MASK (0x3 << REG_CODEC_TX_EAR_LOWGAINR_SHIFT)\n#define REG_CODEC_TX_EAR_LOWGAINR(n) BITFIELD_VAL(REG_CODEC_TX_EAR_LOWGAINR, n)\n#define REG_CODEC_TX_EAR_OFF_BITR_SHIFT 2\n#define REG_CODEC_TX_EAR_OFF_BITR_MASK                                         \\\n  (0x3FFF << REG_CODEC_TX_EAR_OFF_BITR_SHIFT)\n#define REG_CODEC_TX_EAR_OFF_BITR(n) BITFIELD_VAL(REG_CODEC_TX_EAR_OFF_BITR, n)\n\n// 73\n#define REG_CODEC_TX_EN_DACLDO (1 << 0)\n#define REG_CODEC_TX_EN_EARPA_L (1 << 1)\n#define REG_CODEC_TX_EN_EARPA_R (1 << 2)\n#define REG_CODEC_TX_EN_LCLK (1 << 3)\n#define REG_CODEC_TX_EN_RCLK (1 << 4)\n#define REG_CODEC_TX_EN_LDAC (1 << 5)\n#define REG_CODEC_TX_EN_RDAC (1 << 6)\n#define REG_CODEC_TX_EN_LPPA (1 << 7)\n#define REG_CODEC_TX_EN_S1PA (1 << 8)\n#define REG_CODEC_TX_EN_S2PA (1 << 9)\n#define REG_CODEC_TX_EN_S3PA (1 << 10)\n#define REG_CODEC_TX_EN_S4PA (1 << 11)\n#define REG_CODEC_TX_EN_S5PA (1 << 12)\n#define REG_IDETLEAR_EN (1 << 13)\n#define REG_IDETREAR_EN (1 << 14)\n#define REG_CODEC_TX_SW_MODE (1 << 15)\n\n// 74\n#define REG_CODEC_TX_RVREF_CAP_BIT (1 << 0)\n#define REG_DAC_LDO0P9_VSEL_SHIFT 1\n#define REG_DAC_LDO0P9_VSEL_MASK (0x1F << REG_DAC_LDO0P9_VSEL_SHIFT)\n#define REG_DAC_LDO0P9_VSEL(n) BITFIELD_VAL(REG_DAC_LDO0P9_VSEL, n)\n#define REG_BYPASS_TX_REGULATOR (1 << 6)\n#define REG_PU_TX_REGULATOR (1 << 7)\n#define REG_TX_REGULATOR_BIT_SHIFT 8\n#define REG_TX_REGULATOR_BIT_MASK (0xF << REG_TX_REGULATOR_BIT_SHIFT)\n#define REG_TX_REGULATOR_BIT(n) BITFIELD_VAL(REG_TX_REGULATOR_BIT, n)\n#define REG_TX_REG_CAP_BIT (1 << 12)\n#define REG_CODEC_TX_EAR_VCM_BIT_SHIFT 13\n#define REG_CODEC_TX_EAR_VCM_BIT_MASK (0x3 << REG_CODEC_TX_EAR_VCM_BIT_SHIFT)\n#define REG_CODEC_TX_EAR_VCM_BIT(n) BITFIELD_VAL(REG_CODEC_TX_EAR_VCM_BIT, n)\n#define REG_CODEC_TX_EAR_VCM_SEL (1 << 15)\n\n// 75\n#define REG_CRYSTAL_SEL_LV (1 << 0)\n#define REG_EXTPLL_SEL (1 << 1)\n#define REG_AUDPLL_CAL_EN (1 << 2)\n#define REG_AUDPLL_CP_IEN_SHIFT 3\n#define REG_AUDPLL_CP_IEN_MASK (0xF << REG_AUDPLL_CP_IEN_SHIFT)\n#define REG_AUDPLL_CP_IEN(n) BITFIELD_VAL(REG_AUDPLL_CP_IEN, n)\n#define REG_AUDPLL_CP_SWRC_SHIFT 7\n#define REG_AUDPLL_CP_SWRC_MASK (0x3 << REG_AUDPLL_CP_SWRC_SHIFT)\n#define REG_AUDPLL_CP_SWRC(n) BITFIELD_VAL(REG_AUDPLL_CP_SWRC, n)\n#define REG_AUDPLL_DIG_SWRC_SHIFT 9\n#define REG_AUDPLL_DIG_SWRC_MASK (0x3 << REG_AUDPLL_DIG_SWRC_SHIFT)\n#define REG_AUDPLL_DIG_SWRC(n) BITFIELD_VAL(REG_AUDPLL_DIG_SWRC, n)\n#define REG_AUDPLL_VCO_SPD_SHIFT 11\n#define REG_AUDPLL_VCO_SPD_MASK (0x7 << REG_AUDPLL_VCO_SPD_SHIFT)\n#define REG_AUDPLL_VCO_SPD(n) BITFIELD_VAL(REG_AUDPLL_VCO_SPD, n)\n#define REG_AUDPLL_VCO_SWRC_SHIFT 14\n#define REG_AUDPLL_VCO_SWRC_MASK (0x3 << REG_AUDPLL_VCO_SWRC_SHIFT)\n#define REG_AUDPLL_VCO_SWRC(n) BITFIELD_VAL(REG_AUDPLL_VCO_SWRC, n)\n\n// 7A\n#define REG_PU_OSC (1 << 0)\n#define REG_BBPLL_TST_EN (1 << 1)\n#define REG_AUDPLL_TRIGGER_EN (1 << 2)\n#define REG_AUDPLL_FREQ_EN (1 << 3)\n#define REG_AUDPLL_CLK_FBC_EDGE (1 << 4)\n#define REG_AUDPLL_INT_DEC_SEL_SHIFT 5\n#define REG_AUDPLL_INT_DEC_SEL_MASK (0x7 << REG_AUDPLL_INT_DEC_SEL_SHIFT)\n#define REG_AUDPLL_INT_DEC_SEL(n) BITFIELD_VAL(REG_AUDPLL_INT_DEC_SEL, n)\n#define REG_AUDPLL_DITHER_BYPASS (1 << 8)\n#define REG_AUDPLL_PRESCALER_DEL_SEL_SHIFT 9\n#define REG_AUDPLL_PRESCALER_DEL_SEL_MASK                                      \\\n  (0xF << REG_AUDPLL_PRESCALER_DEL_SEL_SHIFT)\n#define REG_AUDPLL_PRESCALER_DEL_SEL(n)                                        \\\n  BITFIELD_VAL(REG_AUDPLL_PRESCALER_DEL_SEL, n)\n#define REG_AUDPLL_FREQ_34_32_SHIFT 13\n#define REG_AUDPLL_FREQ_34_32_MASK (0x7 << REG_AUDPLL_FREQ_34_32_SHIFT)\n#define REG_AUDPLL_FREQ_34_32(n) BITFIELD_VAL(REG_AUDPLL_FREQ_34_32, n)\n\n// 7E\n#define REG_CLKMUX_DVDD_SEL (1 << 0)\n#define REG_CLKMUX_LDO0P9_VSEL_SHIFT 1\n#define REG_CLKMUX_LDO0P9_VSEL_MASK (0x1F << REG_CLKMUX_LDO0P9_VSEL_SHIFT)\n#define REG_CLKMUX_LDO0P9_VSEL(n) BITFIELD_VAL(REG_CLKMUX_LDO0P9_VSEL, n)\n#define REG_PU_CLKMUX_LDO0P9 (1 << 6)\n#define REG_AUDPLL_LDO_VREF_SHIFT 7\n#define REG_AUDPLL_LDO_VREF_MASK (0x7 << REG_AUDPLL_LDO_VREF_SHIFT)\n#define REG_AUDPLL_LDO_VREF(n) BITFIELD_VAL(REG_AUDPLL_LDO_VREF, n)\n#define REG_AUDPLL_LPF_BW_SEL (1 << 10)\n#define REG_CODEC_ADC_DITHER0P5_EN (1 << 11)\n#define REG_CODEC_ADC_DITHER0P25_EN (1 << 12)\n#define REG_CODEC_ADC_DITHER1_EN (1 << 13)\n#define REG_CODEC_ADC_DITHER2_EN (1 << 14)\n#define REG_CODEC_ADC_DITHER_PHASE_SEL (1 << 15)\n\n// 174\n#define CFG_TX_PEAK_OFF_ADC_EN (1 << 0)\n#define CFG_TX_PEAK_OFF_DAC_EN (1 << 1)\n#define CFG_PEAK_DET_DR (1 << 2)\n#define CFG_TX_PEAK_OFF_ADC (1 << 3)\n#define CFG_TX_PEAK_OFF_DAC (1 << 4)\n#define CFG_PEAK_DET_DB_DELAY_SHIFT 5\n#define CFG_PEAK_DET_DB_DELAY_MASK (0x7 << CFG_PEAK_DET_DB_DELAY_SHIFT)\n#define CFG_PEAK_DET_DB_DELAY(n) BITFIELD_VAL(CFG_PEAK_DET_DB_DELAY, n)\n#define REG_CODEC_TX_PEAK_DET_BIT (1 << 8)\n#define REG_CODEC_TX_PEAK_NL_EN (1 << 9)\n#define REG_CODEC_TX_PEAK_NR_EN (1 << 10)\n#define REG_CODEC_TX_PEAK_PL_EN (1 << 11)\n#define REG_CODEC_TX_PEAK_PR_EN (1 << 12)\n#define CFG_TX_CLK_INV (1 << 13)\n#define CFG_CODEC_DIN_L_RST (1 << 14)\n#define CFG_CODEC_DIN_R_RST (1 << 15)\n\n// C4\n#define CODEC_RESAMPLE_CLK_BUF_PU (1 << 2)\n\n// 16A\n#define REG_CODEC_EN_ADCE (1 << 0)\n#define DIG_CODEC_ADCE_DITHER_EN (1 << 1)\n#define DIG_CODEC_ADCE_CH_SEL_SHIFT 2\n#define DIG_CODEC_ADCE_CH_SEL_MASK (0x3 << DIG_CODEC_ADCE_CH_SEL_SHIFT)\n#define DIG_CODEC_ADCE_CH_SEL(n) BITFIELD_VAL(DIG_CODEC_ADCE_CH_SEL, n)\n#define REG_CODEC_RESET_ADCE (1 << 4)\n#define CFG_RESET_ADCE_DR (1 << 5)\n#define REG_CODEC_ADCE_GAIN_BIT_SHIFT 6\n#define REG_CODEC_ADCE_GAIN_BIT_MASK (0x7 << REG_CODEC_ADCE_GAIN_BIT_SHIFT)\n#define REG_CODEC_ADCE_GAIN_BIT(n) BITFIELD_VAL(REG_CODEC_ADCE_GAIN_BIT, n)\n#define REG_CODEC_ADCE_GAIN_UPDATE (1 << 9)\n#define REG_CODEC_ADCE_RES_2P5K (1 << 10)\n#define REG_CODEC_ADCE_RES_2P5K_UPDATE (1 << 11)\n#define DIG_CODEC_ADCE_IDETE_EN (1 << 12)\n#define REG_RX_ADCE_ZERO_DET_EN (1 << 13)\n#define CFG_ADCE_DITHER_CLK_INV (1 << 14)\n#define DIG_CODEC_ADCE_CLK_SEL (1 << 15)\n\n// 16B\n#define DIG_CODEC_ADCE_IBSEL_OP1_SHIFT 0\n#define DIG_CODEC_ADCE_IBSEL_OP1_MASK (0xF << DIG_CODEC_ADCE_IBSEL_OP1_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_OP1(n) BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_OP1, n)\n#define DIG_CODEC_ADCE_IBSEL_OP2_SHIFT 4\n#define DIG_CODEC_ADCE_IBSEL_OP2_MASK (0xF << DIG_CODEC_ADCE_IBSEL_OP2_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_OP2(n) BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_OP2, n)\n#define DIG_CODEC_ADCE_IBSEL_OP3_SHIFT 8\n#define DIG_CODEC_ADCE_IBSEL_OP3_MASK (0xF << DIG_CODEC_ADCE_IBSEL_OP3_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_OP3(n) BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_OP3, n)\n#define DIG_CODEC_ADCE_IBSEL_OP4_SHIFT 12\n#define DIG_CODEC_ADCE_IBSEL_OP4_MASK (0xF << DIG_CODEC_ADCE_IBSEL_OP4_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_OP4(n) BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_OP4, n)\n\n// 16C\n#define DIG_CODEC_ADCE_IBSEL_REG_SHIFT 0\n#define DIG_CODEC_ADCE_IBSEL_REG_MASK (0xF << DIG_CODEC_ADCE_IBSEL_REG_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_REG(n) BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_REG, n)\n#define DIG_CODEC_ADCE_IBSEL_VCOMP_SHIFT 4\n#define DIG_CODEC_ADCE_IBSEL_VCOMP_MASK                                        \\\n  (0xF << DIG_CODEC_ADCE_IBSEL_VCOMP_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_VCOMP(n)                                          \\\n  BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_VCOMP, n)\n#define DIG_CODEC_ADCE_IBSEL_VREF_SHIFT 8\n#define DIG_CODEC_ADCE_IBSEL_VREF_MASK (0xF << DIG_CODEC_ADCE_IBSEL_VREF_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_VREF(n) BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_VREF, n)\n#define DIG_CODEC_ADCE_IBSEL_VREFBUF_SHIFT 12\n#define DIG_CODEC_ADCE_IBSEL_VREFBUF_MASK                                      \\\n  (0xF << DIG_CODEC_ADCE_IBSEL_VREFBUF_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_VREFBUF(n)                                        \\\n  BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_VREFBUF, n)\n\n// 16D\n#define DIG_CODEC_ADCE_IBSEL_IDAC2_SHIFT 0\n#define DIG_CODEC_ADCE_IBSEL_IDAC2_MASK                                        \\\n  (0xF << DIG_CODEC_ADCE_IBSEL_IDAC2_SHIFT)\n#define DIG_CODEC_ADCE_IBSEL_IDAC2(n)                                          \\\n  BITFIELD_VAL(DIG_CODEC_ADCE_IBSEL_IDAC2, n)\n#define DIG_CODEC_ADCE_OP1_IBIT_SHIFT 4\n#define DIG_CODEC_ADCE_OP1_IBIT_MASK (0x3 << DIG_CODEC_ADCE_OP1_IBIT_SHIFT)\n#define DIG_CODEC_ADCE_OP1_IBIT(n) BITFIELD_VAL(DIG_CODEC_ADCE_OP1_IBIT, n)\n#define DIG_CODEC_ADCE_OP1_R_SEL (1 << 6)\n#define DIG_CODEC_ADCE_OP2_IBIT_SHIFT 7\n#define DIG_CODEC_ADCE_OP2_IBIT_MASK (0x3 << DIG_CODEC_ADCE_OP2_IBIT_SHIFT)\n#define DIG_CODEC_ADCE_OP2_IBIT(n) BITFIELD_VAL(DIG_CODEC_ADCE_OP2_IBIT, n)\n#define DIG_CODEC_ADCE_OP2_R_SEL (1 << 9)\n#define DIG_CODEC_ADCE_OP3_IBIT_SHIFT 10\n#define DIG_CODEC_ADCE_OP3_IBIT_MASK (0x3 << DIG_CODEC_ADCE_OP3_IBIT_SHIFT)\n#define DIG_CODEC_ADCE_OP3_IBIT(n) BITFIELD_VAL(DIG_CODEC_ADCE_OP3_IBIT, n)\n#define DIG_CODEC_ADCE_OP3_R_SEL (1 << 12)\n#define DIG_CODEC_ADCE_OP4_IBIT_SHIFT 13\n#define DIG_CODEC_ADCE_OP4_IBIT_MASK (0x3 << DIG_CODEC_ADCE_OP4_IBIT_SHIFT)\n#define DIG_CODEC_ADCE_OP4_IBIT(n) BITFIELD_VAL(DIG_CODEC_ADCE_OP4_IBIT, n)\n#define DIG_CODEC_ADCE_OP4_R_SEL (1 << 15)\n\n// 16E\n#define DIG_CODEC_ADCE_VREF_SEL_SHIFT 0\n#define DIG_CODEC_ADCE_VREF_SEL_MASK (0xF << DIG_CODEC_ADCE_VREF_SEL_SHIFT)\n#define DIG_CODEC_ADCE_VREF_SEL(n) BITFIELD_VAL(DIG_CODEC_ADCE_VREF_SEL, n)\n#define DIG_CODEC_ADCE_VREFBUF_BIT_SHIFT 4\n#define DIG_CODEC_ADCE_VREFBUF_BIT_MASK                                        \\\n  (0xF << DIG_CODEC_ADCE_VREFBUF_BIT_SHIFT)\n#define DIG_CODEC_ADCE_VREFBUF_BIT(n)                                          \\\n  BITFIELD_VAL(DIG_CODEC_ADCE_VREFBUF_BIT, n)\n#define DIG_CODEC_ADCE_REG_VSEL_SHIFT 8\n#define DIG_CODEC_ADCE_REG_VSEL_MASK (0x7 << DIG_CODEC_ADCE_REG_VSEL_SHIFT)\n#define DIG_CODEC_ADCE_REG_VSEL(n) BITFIELD_VAL(DIG_CODEC_ADCE_REG_VSEL, n)\n#define DIG_CODEC_ADCE_CAP_BIT (1 << 11)\n#define REG_VOICE_SEL_VREF_BIN_SHIFT 12\n#define REG_VOICE_SEL_VREF_BIN_MASK (0xF << REG_VOICE_SEL_VREF_BIN_SHIFT)\n#define REG_VOICE_SEL_VREF_BIN(n) BITFIELD_VAL(REG_VOICE_SEL_VREF_BIN, n)\n\n// 16F\n#define REG_VOICE_LP_COMP_SHIFT 0\n#define REG_VOICE_LP_COMP_MASK (0x7 << REG_VOICE_LP_COMP_SHIFT)\n#define REG_VOICE_LP_COMP(n) BITFIELD_VAL(REG_VOICE_LP_COMP, n)\n#define REG_VOICE_LP_AMPA_SHIFT 3\n#define REG_VOICE_LP_AMPA_MASK (0x7 << REG_VOICE_LP_AMPA_SHIFT)\n#define REG_VOICE_LP_AMPA(n) BITFIELD_VAL(REG_VOICE_LP_AMPA, n)\n#define REG_VOICE_LP_AMPB_SHIFT 6\n#define REG_VOICE_LP_AMPB_MASK (0x7 << REG_VOICE_LP_AMPB_SHIFT)\n#define REG_VOICE_LP_AMPB(n) BITFIELD_VAL(REG_VOICE_LP_AMPB, n)\n#define REG_VOICE_LP_LDO_SHIFT 9\n#define REG_VOICE_LP_LDO_MASK (0x7 << REG_VOICE_LP_LDO_SHIFT)\n#define REG_VOICE_LP_LDO(n) BITFIELD_VAL(REG_VOICE_LP_LDO, n)\n#define REG_VOICE_LP_VREF_SHIFT 12\n#define REG_VOICE_LP_VREF_MASK (0x7 << REG_VOICE_LP_VREF_SHIFT)\n#define REG_VOICE_LP_VREF(n) BITFIELD_VAL(REG_VOICE_LP_VREF, n)\n#define CFG_REG_VOICE_TRIG_ADCE_EN (1 << 15)\n\n// 170\n#define REG_VOICE_HIGH_TUNE_A_SHIFT 0\n#define REG_VOICE_HIGH_TUNE_A_MASK (0xF << REG_VOICE_HIGH_TUNE_A_SHIFT)\n#define REG_VOICE_HIGH_TUNE_A(n) BITFIELD_VAL(REG_VOICE_HIGH_TUNE_A, n)\n#define REG_VOICE_HIGH_TUNE_B_SHIFT 4\n#define REG_VOICE_HIGH_TUNE_B_MASK (0xF << REG_VOICE_HIGH_TUNE_B_SHIFT)\n#define REG_VOICE_HIGH_TUNE_B(n) BITFIELD_VAL(REG_VOICE_HIGH_TUNE_B, n)\n#define REG_VOICE_GAIN_A_SHIFT 8\n#define REG_VOICE_GAIN_A_MASK (0x7 << REG_VOICE_GAIN_A_SHIFT)\n#define REG_VOICE_GAIN_A(n) BITFIELD_VAL(REG_VOICE_GAIN_A, n)\n#define REG_VOICE_GAIN_B_SHIFT 11\n#define REG_VOICE_GAIN_B_MASK (0x7 << REG_VOICE_GAIN_B_SHIFT)\n#define REG_VOICE_GAIN_B(n) BITFIELD_VAL(REG_VOICE_GAIN_B, n)\n#define CFG_ADC_START (1 << 14)\n#define CFG_VOICE2ADCE (1 << 15)\n\n// 171\n#define CFG_VOICE_POWER_ON (1 << 0)\n#define CFG_VOICE_TRIG_ENABLE (1 << 1)\n#define CFG_VOICE_RESET (1 << 2)\n#define CFG_VOICE_DR (1 << 3)\n#define CFG_VOICE_PU_DELAY_SHIFT 4\n#define CFG_VOICE_PU_DELAY_MASK (0x7 << CFG_VOICE_PU_DELAY_SHIFT)\n#define CFG_VOICE_PU_DELAY(n) BITFIELD_VAL(CFG_VOICE_PU_DELAY, n)\n#define CFG_VOICE_PRECH_DELAY_SHIFT 7\n#define CFG_VOICE_PRECH_DELAY_MASK (0xFF << CFG_VOICE_PRECH_DELAY_SHIFT)\n#define CFG_VOICE_PRECH_DELAY(n) BITFIELD_VAL(CFG_VOICE_PRECH_DELAY, n)\n#define REG_VOICE_EN_AGPIO_TEST (1 << 15)\n\n// 172\n#define REG_VOICE_CLK_EDGE_SEL (1 << 0)\n#define REG_VOICE_PRECH (1 << 1)\n#define REG_VOICE_PU (1 << 2)\n#define REG_VOICE_PU_LDO (1 << 3)\n#define REG_VOICE_SEL_VCM0P3_BIN_SHIFT 4\n#define REG_VOICE_SEL_VCM0P3_BIN_MASK (0x7 << REG_VOICE_SEL_VCM0P3_BIN_SHIFT)\n#define REG_VOICE_SEL_VCM0P3_BIN(n) BITFIELD_VAL(REG_VOICE_SEL_VCM0P3_BIN, n)\n#define REG_VOICE_SEL_VCM_BIN_SHIFT 7\n#define REG_VOICE_SEL_VCM_BIN_MASK (0xF << REG_VOICE_SEL_VCM_BIN_SHIFT)\n#define REG_VOICE_SEL_VCM_BIN(n) BITFIELD_VAL(REG_VOICE_SEL_VCM_BIN, n)\n#define REG_VOICE_SEL_VCMIN_BIN_SHIFT 11\n#define REG_VOICE_SEL_VCMIN_BIN_MASK (0xF << REG_VOICE_SEL_VCMIN_BIN_SHIFT)\n#define REG_VOICE_SEL_VCMIN_BIN(n) BITFIELD_VAL(REG_VOICE_SEL_VCMIN_BIN, n)\n#define REG_VOICE_PU_OSC (1 << 15)\n\n// 173\n#define REG_VOICE_LDO_VBIT_SHIFT 0\n#define REG_VOICE_LDO_VBIT_MASK (0x7 << REG_VOICE_LDO_VBIT_SHIFT)\n#define REG_VOICE_LDO_VBIT(n) BITFIELD_VAL(REG_VOICE_LDO_VBIT, n)\n#define REG_VOICE_OSC_FR_SHIFT 3\n#define REG_VOICE_OSC_FR_MASK (0x7 << REG_VOICE_OSC_FR_SHIFT)\n#define REG_VOICE_OSC_FR(n) BITFIELD_VAL(REG_VOICE_OSC_FR, n)\n#define REG_VOICE_OSC_PWR_SHIFT 6\n#define REG_VOICE_OSC_PWR_MASK (0x3 << REG_VOICE_OSC_PWR_SHIFT)\n#define REG_VOICE_OSC_PWR(n) BITFIELD_VAL(REG_VOICE_OSC_PWR, n)\n#define CFG_VOICE_DET_DELAY_SHIFT 8\n#define CFG_VOICE_DET_DELAY_MASK (0xFF << CFG_VOICE_DET_DELAY_SHIFT)\n#define CFG_VOICE_DET_DELAY(n) BITFIELD_VAL(CFG_VOICE_DET_DELAY, n)\n\n// 174\n#define CFG_TX_PEAK_OFF_ADC_EN (1 << 0)\n#define CFG_TX_PEAK_OFF_DAC_EN (1 << 1)\n#define CFG_PEAK_DET_DR (1 << 2)\n#define CFG_TX_PEAK_OFF_ADC (1 << 3)\n#define CFG_TX_PEAK_OFF_DAC (1 << 4)\n#define CFG_PEAK_DET_DB_DELAY_SHIFT 5\n#define CFG_PEAK_DET_DB_DELAY_MASK (0x7 << CFG_PEAK_DET_DB_DELAY_SHIFT)\n#define CFG_PEAK_DET_DB_DELAY(n) BITFIELD_VAL(CFG_PEAK_DET_DB_DELAY, n)\n#define REG_CODEC_TX_PEAK_DET_BIT (1 << 8)\n#define REG_CODEC_TX_PEAK_NL_EN (1 << 9)\n#define REG_CODEC_TX_PEAK_NR_EN (1 << 10)\n#define REG_CODEC_TX_PEAK_PL_EN (1 << 11)\n#define REG_CODEC_TX_PEAK_PR_EN (1 << 12)\n#define CFG_TX_CLK_INV (1 << 13)\n#define CFG_CODEC_DIN_L_RST (1 << 14)\n#define CFG_CODEC_DIN_R_RST (1 << 15)\n\n// 175\n#define CODEC_DIN_L_HI_RSTVAL_SHIFT 0\n#define CODEC_DIN_L_HI_RSTVAL_MASK (0xFFFF << CODEC_DIN_L_HI_RSTVAL_SHIFT)\n#define CODEC_DIN_L_HI_RSTVAL(n) BITFIELD_VAL(CODEC_DIN_L_HI_RSTVAL, n)\n\n// 176\n#define CODEC_DIN_L_LO_RSTVAL_SHIFT 0\n#define CODEC_DIN_L_LO_RSTVAL_MASK (0xFFFF << CODEC_DIN_L_LO_RSTVAL_SHIFT)\n#define CODEC_DIN_L_LO_RSTVAL(n) BITFIELD_VAL(CODEC_DIN_L_LO_RSTVAL, n)\n\n// 177\n#define CODEC_DIN_R_HI_RSTVAL_SHIFT 0\n#define CODEC_DIN_R_HI_RSTVAL_MASK (0xFFFF << CODEC_DIN_R_HI_RSTVAL_SHIFT)\n#define CODEC_DIN_R_HI_RSTVAL(n) BITFIELD_VAL(CODEC_DIN_R_HI_RSTVAL, n)\n\n// 178\n#define CODEC_DIN_R_LO_RSTVAL_SHIFT 0\n#define CODEC_DIN_R_LO_RSTVAL_MASK (0xFFFF << CODEC_DIN_R_LO_RSTVAL_SHIFT)\n#define CODEC_DIN_R_LO_RSTVAL(n) BITFIELD_VAL(CODEC_DIN_R_LO_RSTVAL, n)\n\n// 179\n#define REG_AUDPLL_LDOPRECHG_TIMER_SHIFT 0\n#define REG_AUDPLL_LDOPRECHG_TIMER_MASK                                        \\\n  (0x1F << REG_AUDPLL_LDOPRECHG_TIMER_SHIFT)\n#define REG_AUDPLL_LDOPRECHG_TIMER(n)                                          \\\n  BITFIELD_VAL(REG_AUDPLL_LDOPRECHG_TIMER, n)\n#define REG_AUDPLL_PRECHG_BEGIN_TIMER_SHIFT 5\n#define REG_AUDPLL_PRECHG_BEGIN_TIMER_MASK                                     \\\n  (0x1F << REG_AUDPLL_PRECHG_BEGIN_TIMER_SHIFT)\n#define REG_AUDPLL_PRECHG_BEGIN_TIMER(n)                                       \\\n  BITFIELD_VAL(REG_AUDPLL_PRECHG_BEGIN_TIMER, n)\n#define REG_AUDPLL_PRECHG_END_TIMER_SHIFT 10\n#define REG_AUDPLL_PRECHG_END_TIMER_MASK                                       \\\n  (0x1F << REG_AUDPLL_PRECHG_END_TIMER_SHIFT)\n#define REG_AUDPLL_PRECHG_END_TIMER(n)                                         \\\n  BITFIELD_VAL(REG_AUDPLL_PRECHG_END_TIMER, n)\n#define REG_CODEC_ADCD_RES_2P5K_DR (1 << 15)\n\n// 17A\n#define CFG_PRE_CHARGE_ADCE_DR (1 << 0)\n#define REG_CODEC_ADCE_PRE_CHARGE (1 << 1)\n#define ADCE_OPEN_TIMER_DLY_SHIFT 2\n#define ADCE_OPEN_TIMER_DLY_MASK (0xF << ADCE_OPEN_TIMER_DLY_SHIFT)\n#define ADCE_OPEN_TIMER_DLY(n) BITFIELD_VAL(ADCE_OPEN_TIMER_DLY, n)\n#define ADCE_PRE_CHARGE_TIMER_DLY_SHIFT 6\n#define ADCE_PRE_CHARGE_TIMER_DLY_MASK (0xFF << ADCE_PRE_CHARGE_TIMER_DLY_SHIFT)\n#define ADCE_PRE_CHARGE_TIMER_DLY(n) BITFIELD_VAL(ADCE_PRE_CHARGE_TIMER_DLY, n)\n#define REG_VOICE_LOW_TUNE_SHIFT 14\n#define REG_VOICE_LOW_TUNE_MASK (0x3 << REG_VOICE_LOW_TUNE_SHIFT)\n#define REG_VOICE_LOW_TUNE(n) BITFIELD_VAL(REG_VOICE_LOW_TUNE, n)\n\n// 17B\n#define REG_COARSE_EN (1 << 0)\n#define REG_XTAL_FREQ_LLC_SFT_RSTN (1 << 1)\n#define REG_COARSE_POLAR_SEL (1 << 2)\n#define REG_AUDPLL_RSTB_TIMER_SHIFT 3\n#define REG_AUDPLL_RSTB_TIMER_MASK (0x1F << REG_AUDPLL_RSTB_TIMER_SHIFT)\n#define REG_AUDPLL_RSTB_TIMER(n) BITFIELD_VAL(REG_AUDPLL_RSTB_TIMER, n)\n#define RX_TIMER_RSTN_DLY_SHIFT 8\n#define RX_TIMER_RSTN_DLY_MASK (0xFF << RX_TIMER_RSTN_DLY_SHIFT)\n#define RX_TIMER_RSTN_DLY(n) BITFIELD_VAL(RX_TIMER_RSTN_DLY, n)\n\n// 17C\n#define REG_CNT_COARSE_MARK_SHIFT 0\n#define REG_CNT_COARSE_MARK_MASK (0xFFFF << REG_CNT_COARSE_MARK_SHIFT)\n#define REG_CNT_COARSE_MARK(n) BITFIELD_VAL(REG_CNT_COARSE_MARK, n)\n\n// 17D\n#define REG_CLK_GOAL_DIV_NUM_SHIFT 0\n#define REG_CLK_GOAL_DIV_NUM_MASK (0x1FF << REG_CLK_GOAL_DIV_NUM_SHIFT)\n#define REG_CLK_GOAL_DIV_NUM(n) BITFIELD_VAL(REG_CLK_GOAL_DIV_NUM, n)\n#define REG_COARSE_TUN_CODE_SHIFT 9\n#define REG_COARSE_TUN_CODE_MASK (0x3F << REG_COARSE_TUN_CODE_SHIFT)\n#define REG_COARSE_TUN_CODE(n) BITFIELD_VAL(REG_COARSE_TUN_CODE, n)\n#define REG_COARSE_TUN_CODE_DR (1 << 15)\n\n// 17E\n#define SSC_ENABLE (1 << 0)\n#define TRI_FREQ_OFST_SEL_SHIFT 1\n#define TRI_FREQ_OFST_SEL_MASK (0x7 << TRI_FREQ_OFST_SEL_SHIFT)\n#define TRI_FREQ_OFST_SEL(n) BITFIELD_VAL(TRI_FREQ_OFST_SEL, n)\n#define TRI_FREQ_SEL_SHIFT 4\n#define TRI_FREQ_SEL_MASK (0x3 << TRI_FREQ_SEL_SHIFT)\n#define TRI_FREQ_SEL(n) BITFIELD_VAL(TRI_FREQ_SEL, n)\n#define REG_VOICE_EN_REF_TEST (1 << 6)\n#define REG_VOICE_GAIN_BASE_SHIFT 7\n#define REG_VOICE_GAIN_BASE_MASK (0x7 << REG_VOICE_GAIN_BASE_SHIFT)\n#define REG_VOICE_GAIN_BASE(n) BITFIELD_VAL(REG_VOICE_GAIN_BASE, n)\n#define CFG_VOICE_PRECH_DONE_DELAY_SHIFT 10\n#define CFG_VOICE_PRECH_DONE_DELAY_MASK                                        \\\n  (0x1F << CFG_VOICE_PRECH_DONE_DELAY_SHIFT)\n#define CFG_VOICE_PRECH_DONE_DELAY(n)                                          \\\n  BITFIELD_VAL(CFG_VOICE_PRECH_DONE_DELAY, n)\n#define REG_CODEC_LP_VCM_DR (1 << 15)\n\n// 17F\n#define TX_PEAK_DET_STATUS (1 << 0)\n#define TX_PEAK_DET_NL_STATUS (1 << 1)\n#define TX_PEAK_DET_NR_STATUS (1 << 2)\n#define TX_PEAK_DET_PL_STATUS (1 << 3)\n#define TX_PEAK_DET_PR_STATUS (1 << 4)\n#define DBG_STATE_SHIFT 5\n#define DBG_STATE_MASK (0x3 << DBG_STATE_SHIFT)\n#define DBG_STATE(n) BITFIELD_VAL(DBG_STATE, n)\n\nenum ANA_REG_T {\n  ANA_REG_61 = 0x61,\n  ANA_REG_62,\n  ANA_REG_63,\n  ANA_REG_64,\n  ANA_REG_65,\n  ANA_REG_66,\n  ANA_REG_67,\n  ANA_REG_68,\n  ANA_REG_69,\n  ANA_REG_6A,\n  ANA_REG_6B,\n  ANA_REG_6C,\n  ANA_REG_6D,\n  ANA_REG_6E,\n  ANA_REG_6F,\n  ANA_REG_70,\n  ANA_REG_71,\n  ANA_REG_72,\n  ANA_REG_73,\n  ANA_REG_74,\n  ANA_REG_75,\n  ANA_REG_76,\n  ANA_REG_77,\n  ANA_REG_78,\n  ANA_REG_79,\n  ANA_REG_7A,\n  ANA_REG_7B,\n  ANA_REG_7C,\n  ANA_REG_7D,\n  ANA_REG_7E,\n  ANA_REG_7F,\n\n  ANA_REG_161 = 0x161,\n  ANA_REG_162,\n  ANA_REG_163,\n  ANA_REG_164,\n  ANA_REG_165,\n  ANA_REG_166,\n  ANA_REG_167,\n  ANA_REG_168,\n  ANA_REG_169,\n  ANA_REG_16A,\n  ANA_REG_16B,\n  ANA_REG_16C,\n  ANA_REG_16D,\n  ANA_REG_16E,\n  ANA_REG_16F,\n  ANA_REG_170,\n  ANA_REG_171,\n  ANA_REG_172,\n  ANA_REG_173,\n  ANA_REG_174,\n  ANA_REG_175,\n  ANA_REG_176,\n  ANA_REG_177,\n  ANA_REG_178,\n  ANA_REG_179,\n  ANA_REG_17A,\n  ANA_REG_17B,\n  ANA_REG_17C,\n  ANA_REG_17D,\n  ANA_REG_17E,\n  ANA_REG_17F,\n\n  ANA_REG_RF_C4 = 0xC4,\n};\n\nenum ANA_CODEC_USER_T {\n  ANA_CODEC_USER_DAC = (1 << 0),\n  ANA_CODEC_USER_ADC = (1 << 1),\n\n  ANA_CODEC_USER_CODEC = (1 << 2),\n  ANA_CODEC_USER_MICKEY = (1 << 3),\n\n  ANA_CODEC_USER_ANC_FF = (1 << 4),\n  ANA_CODEC_USER_ANC_FB = (1 << 5),\n\n  ANA_CODEC_USER_VAD = (1 << 6),\n};\n\nstruct ANALOG_PLL_CFG_T {\n  uint32_t freq;\n  uint8_t div;\n  uint64_t val;\n};\n\n#ifdef ANC_PROD_TEST\n#define OPT_TYPE\n#else\n#define OPT_TYPE const\n#endif\n\nstatic OPT_TYPE uint16_t vcodec_mv = (uint16_t)(VCODEC_VOLT * 1000);\n\nstatic bool ana_spk_req;\nstatic bool ana_spk_muted;\nstatic bool ana_spk_enabled;\n\nstatic bool anc_calib_mode;\n\nstatic enum ANA_CODEC_USER_T adc_map[MAX_ANA_MIC_CH_NUM];\nstatic enum ANA_CODEC_USER_T vmic_map[MAX_ANA_MIC_CH_NUM];\nstatic enum ANA_CODEC_USER_T codec_common_map;\nstatic enum ANA_CODEC_USER_T adda_common_map;\nstatic enum ANA_CODEC_USER_T vcodec_map;\n\nstatic enum ANA_AUD_PLL_USER_T ana_aud_pll_map;\n\n#ifdef ANC_APP\n#ifndef DYN_ADC_GAIN\n#define DYN_ADC_GAIN\n#endif\n#endif\n\n#ifdef DYN_ADC_GAIN\nstatic int8_t adc_gain_offset[MAX_ANA_MIC_CH_NUM];\n#endif\n\nstatic const int8_t adc_db[] = {\n    -9, -6, -3, 0, 3, 6, 9, 12,\n};\n\nstatic const int8_t tgt_adc_db[MAX_ANA_MIC_CH_NUM] = {\n    ANALOG_ADC_A_GAIN_DB, ANALOG_ADC_B_GAIN_DB, ANALOG_ADC_C_GAIN_DB,\n    ANALOG_ADC_D_GAIN_DB, ANALOG_ADC_E_GAIN_DB,\n};\n\n// Max allowed total tune ratio (5000ppm)\n#define MAX_TOTAL_TUNE_RATIO 0.005000\n\nstatic struct ANALOG_PLL_CFG_T ana_pll_cfg[2];\nstatic int pll_cfg_idx;\n\nvoid analog_aud_freq_pll_config(uint32_t freq, uint32_t div) {\n  // CODEC_FREQ is likely 24.576M (48K series) or 22.5792M (44.1K series)\n  // PLL_nominal = CODEC_FREQ * CODEC_DIV\n  // PLL_cfg_val = ((CODEC_FREQ * CODEC_DIV) / 26M) * (1 << 28)\n\n  int i, j;\n  uint64_t PLL_cfg_val;\n  uint16_t high, low, bit34_32;\n  uint16_t val;\n\n  if (pll_cfg_idx < ARRAY_SIZE(ana_pll_cfg) &&\n      ana_pll_cfg[pll_cfg_idx].freq == freq &&\n      ana_pll_cfg[pll_cfg_idx].div == div) {\n    return;\n  }\n\n  j = ARRAY_SIZE(ana_pll_cfg);\n  for (i = 0; i < ARRAY_SIZE(ana_pll_cfg); i++) {\n    if (ana_pll_cfg[i].freq == freq && ana_pll_cfg[i].div == div) {\n      break;\n    }\n    if (j == ARRAY_SIZE(ana_pll_cfg) && ana_pll_cfg[i].freq == 0) {\n      j = i;\n    }\n  }\n\n  if (i < ARRAY_SIZE(ana_pll_cfg)) {\n    pll_cfg_idx = i;\n    PLL_cfg_val = ana_pll_cfg[pll_cfg_idx].val;\n  } else {\n    if (j < ARRAY_SIZE(ana_pll_cfg)) {\n      pll_cfg_idx = j;\n    } else {\n      pll_cfg_idx = 0;\n    }\n\n    PLL_cfg_val = ((uint64_t)(1 << 28) * freq * div + 26000000 / 2) / 26000000;\n\n    ana_pll_cfg[pll_cfg_idx].freq = freq;\n    ana_pll_cfg[pll_cfg_idx].div = div;\n    ana_pll_cfg[pll_cfg_idx].val = PLL_cfg_val;\n  }\n\n  low = PLL_cfg_val & 0xFFFF;\n  high = (PLL_cfg_val >> 16) & 0xFFFF;\n  bit34_32 = (PLL_cfg_val >> 32) & 0xFFFF;\n\n  pmu_pll_div_set(HAL_CMU_PLL_AUD, PMU_PLL_DIV_CODEC, div);\n\n  analog_write(ANA_REG_7C, low);\n  analog_write(ANA_REG_7B, high);\n  analog_read(ANA_REG_7A, &val);\n  val = SET_BITFIELD(val, REG_AUDPLL_FREQ_34_32, bit34_32) | REG_AUDPLL_FREQ_EN;\n  analog_write(ANA_REG_7A, val);\n}\n\nvoid analog_aud_pll_tune(float ratio) {\n#ifdef __AUDIO_RESAMPLE__\n  if (hal_cmu_get_audio_resample_status()) {\n    return;\n  }\n#endif\n\n  // CODEC_FREQ is likely 24.576M (48K series) or 22.5792M (44.1K series)\n  // PLL_nominal = CODEC_FREQ * CODEC_DIV\n  // PLL_cfg_val = ((CODEC_FREQ * CODEC_DIV) / 26M) * (1 << 28)\n  // Delta = ((SampleDiff / Fs) / TimeDiff) * PLL_cfg_val\n\n  int64_t delta, new_pll;\n  uint16_t new_high, new_low;\n  uint16_t val, new_bit34_32;\n\n  if (pll_cfg_idx >= ARRAY_SIZE(ana_pll_cfg) ||\n      ana_pll_cfg[pll_cfg_idx].freq == 0) {\n    ANALOG_INFO_TRACE(1,\n                      \"%s: WARNING: aud pll config cache invalid. Skip tuning\",\n                      __FUNCTION__);\n    return;\n  }\n\n  if (ABS(ratio) > MAX_TOTAL_TUNE_RATIO) {\n    ANALOG_INFO_TRACE(1,\n                      \"\\n------\\nWARNING: TUNE: ratio=%d is too large and will \"\n                      \"be cut\\n------\\n\",\n                      FLOAT_TO_PPB_INT(ratio));\n    if (ratio > 0) {\n      ratio = MAX_TOTAL_TUNE_RATIO;\n    } else {\n      ratio = -MAX_TOTAL_TUNE_RATIO;\n    }\n  }\n\n  ANALOG_INFO_TRACE(2, \"%s: ratio=%d\", __FUNCTION__, FLOAT_TO_PPB_INT(ratio));\n\n  new_pll = (int64_t)ana_pll_cfg[pll_cfg_idx].val;\n  delta = (int64_t)(new_pll * ratio);\n\n  new_pll += delta;\n\n  new_low = new_pll & 0xFFFF;\n  new_high = (new_pll >> 16) & 0xFFFF;\n  new_bit34_32 = (new_pll >> 32) & 0xFFFF;\n\n  analog_write(ANA_REG_7C, new_low);\n  analog_write(ANA_REG_7B, new_high);\n  analog_read(ANA_REG_7A, &val);\n  val = SET_BITFIELD(val, REG_AUDPLL_FREQ_34_32, new_bit34_32) |\n        REG_AUDPLL_FREQ_EN;\n  analog_write(ANA_REG_7A, val);\n}\n\nvoid analog_aud_osc_clk_enable(bool enable) {\n  uint16_t val;\n\n  if (enable) {\n    analog_read(ANA_REG_RF_C4, &val);\n    val |= CODEC_RESAMPLE_CLK_BUF_PU;\n    analog_write(ANA_REG_RF_C4, val);\n\n    analog_read(ANA_REG_7A, &val);\n    val |= REG_PU_OSC;\n    analog_write(ANA_REG_7A, val);\n\n    analog_read(ANA_REG_75, &val);\n    val |= REG_CRYSTAL_SEL_LV;\n    analog_write(ANA_REG_75, val);\n#if 0\n        analog_read(ANA_REG_174, &val);\n        val |= CFG_TX_CLK_INV;\n        analog_write(ANA_REG_174, val);\n#endif\n  } else {\n#if 0\n        analog_read(ANA_REG_174, &val);\n        val &= ~CFG_TX_CLK_INV;\n        analog_write(ANA_REG_174, val);\n#endif\n    analog_read(ANA_REG_75, &val);\n    val &= ~REG_CRYSTAL_SEL_LV;\n    analog_write(ANA_REG_75, val);\n\n    analog_read(ANA_REG_7A, &val);\n    val &= ~REG_PU_OSC;\n    analog_write(ANA_REG_7A, val);\n\n    analog_read(ANA_REG_RF_C4, &val);\n    val &= ~CODEC_RESAMPLE_CLK_BUF_PU;\n    analog_write(ANA_REG_RF_C4, val);\n  }\n}\n\nvoid analog_aud_pll_open(enum ANA_AUD_PLL_USER_T user) {\n  if (user >= ANA_AUD_PLL_USER_END) {\n    return;\n  }\n\n#ifdef __AUDIO_RESAMPLE__\n  if (user == ANA_AUD_PLL_USER_CODEC && hal_cmu_get_audio_resample_status()) {\n\n    analog_aud_osc_clk_enable(true);\n    return;\n  }\n#endif\n\n  if (ana_aud_pll_map == 0) {\n    hal_cmu_pll_enable(HAL_CMU_PLL_AUD, HAL_CMU_PLL_USER_AUD);\n  }\n  ana_aud_pll_map |= user;\n}\n\nvoid analog_aud_pll_close(enum ANA_AUD_PLL_USER_T user) {\n  if (user >= ANA_AUD_PLL_USER_END) {\n    return;\n  }\n\n#ifdef __AUDIO_RESAMPLE__\n  if (user == ANA_AUD_PLL_USER_CODEC && hal_cmu_get_audio_resample_status()) {\n\n    analog_aud_osc_clk_enable(false);\n    return;\n  }\n#endif\n\n  ana_aud_pll_map &= ~user;\n  if (ana_aud_pll_map == 0) {\n    hal_cmu_pll_disable(HAL_CMU_PLL_AUD, HAL_CMU_PLL_USER_AUD);\n  }\n}\n\nstatic void analog_aud_enable_dac(uint32_t dac) {\n  uint16_t val_6e;\n  uint16_t val_70;\n  uint16_t val_73;\n\n  analog_read(ANA_REG_6E, &val_6e);\n  analog_read(ANA_REG_70, &val_70);\n\n  if (dac & (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)) {\n    val_6e |= REG_CODEC_TX_EAR_DR_EN | REG_CODEC_TX_EAR_ENBIAS;\n    analog_write(ANA_REG_6E, val_6e);\n    osDelay(1);\n    val_70 |= CFG_TX_TREE_EN;\n    analog_write(ANA_REG_70, val_70);\n    osDelay(1);\n\n    val_73 = 0;\n    if (dac & AUD_CHANNEL_MAP_CH0) {\n      val_73 |=\n          REG_CODEC_TX_EN_EARPA_L | REG_CODEC_TX_EN_LCLK | REG_CODEC_TX_EN_LDAC;\n    }\n    if (dac & AUD_CHANNEL_MAP_CH1) {\n      val_73 |= REG_CODEC_TX_EN_EARPA_R | REG_CODEC_TX_EN_RCLK |\n                REG_CODEC_TX_EN_RDAC | REG_CODEC_TX_EN_LDAC;\n    }\n    val_73 |= REG_CODEC_TX_EN_DACLDO | REG_CODEC_TX_EN_LPPA;\n    analog_write(ANA_REG_73, val_73);\n    osDelay(1);\n    val_73 |= REG_CODEC_TX_EN_S1PA;\n    analog_write(ANA_REG_73, val_73);\n    // Ensure 1ms delay before enabling dac_pa\n    osDelay(1);\n  } else {\n    // Ensure 1ms delay after disabling dac_pa\n    osDelay(1);\n    analog_read(ANA_REG_73, &val_73);\n    val_73 &= ~REG_CODEC_TX_EN_S1PA;\n    analog_write(ANA_REG_73, val_73);\n    osDelay(1);\n    val_73 = 0;\n    analog_write(ANA_REG_73, val_73);\n    osDelay(1);\n\n    val_70 &= ~CFG_TX_TREE_EN;\n    analog_write(ANA_REG_70, val_70);\n    osDelay(1);\n\n    val_6e &= ~(REG_CODEC_TX_EAR_DR_EN | REG_CODEC_TX_EAR_ENBIAS);\n    analog_write(ANA_REG_6E, val_6e);\n  }\n}\n\nstatic void analog_aud_enable_dac_pa(uint32_t dac) {\n  uint16_t val_73;\n\n  analog_read(ANA_REG_73, &val_73);\n\n  if (dac & (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)) {\n    val_73 |= REG_CODEC_TX_EN_S4PA;\n    analog_write(ANA_REG_73, val_73);\n\n#ifdef AUDIO_OUTPUT_DC_CALIB_ANA\n    hal_codec_dac_sdm_reset_clear();\n#endif\n  } else {\n#ifdef AUDIO_OUTPUT_DC_CALIB_ANA\n    hal_codec_dac_sdm_reset_set();\n#endif\n\n    val_73 &= ~REG_CODEC_TX_EN_S4PA;\n    analog_write(ANA_REG_73, val_73);\n  }\n}\n\nstatic void analog_aud_enable_adc(enum ANA_CODEC_USER_T user,\n                                  enum AUD_CHANNEL_MAP_T ch_map, bool en) {\n  int i;\n  uint16_t val_61, val_6c, val_16a;\n  enum ANA_CODEC_USER_T old_map;\n  bool set;\n  bool global_update;\n\n  ANALOG_DEBUG_TRACE(3, \"[%s] user=%d ch_map=0x%x\", __func__, user, ch_map);\n\n  global_update = false;\n\n  analog_read(ANA_REG_61, &val_61);\n  analog_read(ANA_REG_16A, &val_16a);\n\n  for (i = 0; i < MAX_ANA_MIC_CH_NUM; i++) {\n    if (ch_map & (AUD_CHANNEL_MAP_CH0 << i)) {\n      set = false;\n      if (en) {\n        if (adc_map[i] == 0) {\n          set = true;\n        }\n        adc_map[i] |= user;\n      } else {\n        old_map = adc_map[i];\n        adc_map[i] &= ~user;\n        if (old_map != 0 && adc_map[i] == 0) {\n          set = true;\n        }\n      }\n      if (set) {\n        global_update = true;\n        if (i == 4) {\n          if (adc_map[i]) {\n            val_16a |= REG_CODEC_EN_ADCE;\n          } else {\n            val_16a &= ~REG_CODEC_EN_ADCE;\n          }\n        } else {\n          if (adc_map[i]) {\n            val_61 |= (REG_CODEC_EN_ADCA << i);\n          } else {\n            val_61 &= ~(REG_CODEC_EN_ADCA << i);\n          }\n        }\n      }\n    }\n  }\n\n  analog_write(ANA_REG_61, val_61);\n  analog_write(ANA_REG_16A, val_16a);\n\n  if (global_update) {\n    for (i = 0; i < MAX_ANA_MIC_CH_NUM; i++) {\n      if (adc_map[i]) {\n        break;\n      }\n    }\n    analog_read(ANA_REG_6C, &val_6c);\n    if (i < MAX_ANA_MIC_CH_NUM) {\n      val_6c |= REG_CODEC_RX_EN_VTOI;\n    } else {\n      val_6c &= ~REG_CODEC_RX_EN_VTOI;\n    }\n    analog_write(ANA_REG_6C, val_6c);\n  }\n}\n\nstatic uint32_t db_to_adc_gain(int db) {\n  int i;\n  uint8_t cnt;\n  const int8_t *list;\n\n  list = adc_db;\n  cnt = ARRAY_SIZE(adc_db);\n\n  for (i = 0; i < cnt - 1; i++) {\n    if (db < list[i + 1]) {\n      break;\n    }\n  }\n\n  if (i == cnt - 1) {\n    return i;\n  } else if (db * 2 < list[i] + list[i + 1]) {\n    return i;\n  } else {\n    return i + 1;\n  }\n}\n\nstatic int8_t get_chan_adc_gain(uint32_t i) {\n  int8_t gain;\n\n  gain = tgt_adc_db[i];\n\n#ifdef DYN_ADC_GAIN\n  if (adc_gain_offset[i] < 0 && -adc_gain_offset[i] > gain) {\n    gain = 0;\n  } else {\n    gain += adc_gain_offset[i];\n  }\n#endif\n\n  return gain;\n}\n\nstatic void analog_aud_set_adc_gain(enum AUD_IO_PATH_T input_path,\n                                    enum AUD_CHANNEL_MAP_T ch_map) {\n  int i;\n  int gain;\n  uint16_t gain_val;\n  uint16_t val, val_16a;\n\n  analog_read(ANA_REG_63, &val);\n  if (ch_map & AUD_CHANNEL_MAP_CH4) {\n    analog_read(ANA_REG_16A, &val_16a);\n  } else {\n    val_16a = 0;\n  }\n\n  for (i = 0; i < MAX_ANA_MIC_CH_NUM; i++) {\n    if (ch_map & (AUD_CHANNEL_MAP_CH0 << i)) {\n      if (0) {\n#ifdef ANC_APP\n#ifdef ANC_FF_ENABLED\n      } else if ((ANC_FF_MIC_CH_L | ANC_FF_MIC_CH_R) &\n                 (AUD_CHANNEL_MAP_CH0 << i)) {\n        gain = get_chan_adc_gain(i);\n#endif\n#ifdef ANC_FB_ENABLED\n      } else if ((ANC_FB_MIC_CH_L | ANC_FB_MIC_CH_R) &\n                 (AUD_CHANNEL_MAP_CH0 << i)) {\n        gain = get_chan_adc_gain(i);\n#endif\n#endif\n      } else if (input_path == AUD_INPUT_PATH_LINEIN) {\n        gain = LINEIN_ADC_GAIN_DB;\n      } else {\n        gain = get_chan_adc_gain(i);\n      }\n      gain_val = db_to_adc_gain(gain);\n      if (i < MAX_ANA_MIC_CH_NUM - 1) {\n        val = (val & ~(REG_CODEC_ADCA_GAIN_BIT_MASK << 3 * i)) |\n              (REG_CODEC_ADCA_GAIN_BIT(gain_val) << 3 * i);\n      } else {\n        val_16a = SET_BITFIELD(val_16a, REG_CODEC_ADCE_GAIN_BIT, gain_val);\n      }\n    }\n  }\n\n  analog_write(ANA_REG_63, val);\n  if (ch_map & AUD_CHANNEL_MAP_CH4) {\n    analog_write(ANA_REG_16A, val_16a);\n  }\n}\n\n#ifdef ANC_APP\nvoid analog_aud_apply_anc_adc_gain_offset(enum ANC_TYPE_T type,\n                                          int16_t offset_l, int16_t offset_r) {\n  enum ANC_TYPE_T single_type;\n  enum AUD_CHANNEL_MAP_T ch_map;\n  uint32_t l, r;\n  int8_t org_l, adj_l;\n  int8_t org_r, adj_r;\n\n  // qdb to db\n  offset_l /= 4;\n  offset_r /= 4;\n\n  while (type) {\n    l = get_msb_pos(type);\n    single_type = (1 << l);\n    type &= ~single_type;\n\n    ch_map = 0;\n    l = r = 32;\n    if (0) {\n#if defined(ANC_FF_MIC_CH_L) || defined(ANC_FF_MIC_CH_R)\n    } else if (single_type == ANC_FEEDFORWARD) {\n      ch_map |= ANC_FF_MIC_CH_L | ANC_FF_MIC_CH_R;\n      l = get_msb_pos(ANC_FF_MIC_CH_L);\n      r = get_msb_pos(ANC_FF_MIC_CH_R);\n#endif\n#if defined(ANC_FB_MIC_CH_L) || defined(ANC_FB_MIC_CH_R)\n    } else if (single_type == ANC_FEEDBACK) {\n      ch_map = ANC_FB_MIC_CH_L | ANC_FB_MIC_CH_R;\n      l = get_msb_pos(ANC_FB_MIC_CH_L);\n      r = get_msb_pos(ANC_FB_MIC_CH_R);\n#endif\n    } else {\n      continue;\n    }\n\n    if ((l >= MAX_ANA_MIC_CH_NUM || adc_gain_offset[l] == offset_l) &&\n        (r >= MAX_ANA_MIC_CH_NUM || adc_gain_offset[r] == offset_r)) {\n      continue;\n    }\n\n    ANALOG_INFO_TRACE(0, \"ana: apply anc adc gain offset: type=%d offset=%d/%d\",\n                      single_type, offset_l, offset_r);\n\n    org_l = adj_l = 0;\n    if (l < MAX_ANA_MIC_CH_NUM) {\n      adc_gain_offset[l] = 0;\n      if (offset_l) {\n        org_l = adc_db[db_to_adc_gain(get_chan_adc_gain(l))];\n        adc_gain_offset[l] = offset_l;\n        adj_l = adc_db[db_to_adc_gain(get_chan_adc_gain(l))];\n      }\n    }\n\n    org_r = adj_r = 0;\n    if (r < MAX_ANA_MIC_CH_NUM) {\n      adc_gain_offset[r] = 0;\n      if (offset_r) {\n        org_r = adc_db[db_to_adc_gain(get_chan_adc_gain(r))];\n        adc_gain_offset[r] = offset_r;\n        adj_r = adc_db[db_to_adc_gain(get_chan_adc_gain(r))];\n      }\n    }\n\n    hal_codec_apply_anc_adc_gain_offset(single_type, (org_l - adj_l),\n                                        (org_r - adj_r));\n    analog_aud_set_adc_gain(AUD_INPUT_PATH_MAINMIC, ch_map);\n  }\n}\n#endif\n\n#ifdef DYN_ADC_GAIN\nvoid analog_aud_apply_adc_gain_offset(enum AUD_CHANNEL_MAP_T ch_map,\n                                      int16_t offset) {\n  enum AUD_CHANNEL_MAP_T map;\n  int i;\n\n#ifdef ANC_APP\n#ifdef ANC_FF_ENABLED\n  ch_map &= ~(ANC_FF_MIC_CH_L | ANC_FF_MIC_CH_R);\n#endif\n#ifdef ANC_FB_ENABLED\n  ch_map &= ~(ANC_FB_MIC_CH_L | ANC_FB_MIC_CH_R);\n#endif\n#endif\n\n  if (ch_map) {\n    map = ch_map;\n\n    while (map) {\n      i = get_msb_pos(map);\n      map &= ~(1 << i);\n      if (i < MAX_ANA_MIC_CH_NUM) {\n        adc_gain_offset[i] = offset;\n      }\n    }\n\n    ANALOG_INFO_TRACE(2, \"ana: apply adc gain offset: ch_map=0x%X offset=%d\",\n                      ch_map, offset);\n\n    analog_aud_set_adc_gain(AUD_INPUT_PATH_MAINMIC, ch_map);\n  }\n}\n#endif\n\nvoid analog_aud_set_dac_gain(int32_t v) {}\n\nuint32_t analog_codec_get_dac_gain(void) { return 0; }\n\nuint32_t analog_codec_dac_gain_to_db(int32_t gain) { return 0; }\n\nint32_t analog_codec_dac_max_attn_db(void) { return 0; }\n\nstatic int POSSIBLY_UNUSED dc_calib_checksum_valid(uint32_t efuse) {\n  int i;\n  uint32_t cnt = 0;\n  uint32_t chksum_mask = (1 << (16 - DAC_DC_CALIB_BIT_WIDTH)) - 1;\n\n  for (i = 0; i < DAC_DC_CALIB_BIT_WIDTH; i++) {\n    if (efuse & (1 << i)) {\n      cnt++;\n    }\n  }\n\n  return (((~cnt) & chksum_mask) ==\n          ((efuse >> DAC_DC_CALIB_BIT_WIDTH) & chksum_mask));\n}\n\nstatic int16_t dc_calib_val_decode(int16_t val) {\n#ifdef AUDIO_OUTPUT_DC_CALIB_ANA\n  uint32_t sign_bit = (1 << (DAC_DC_CALIB_BIT_WIDTH - 1));\n  uint32_t num_mask = sign_bit - 1;\n\n  if (val & sign_bit) {\n    val = -(val & num_mask);\n  }\n#endif\n  return val;\n}\n\nvoid analog_aud_get_dc_calib_value(int16_t *dc_l, int16_t *dc_r) {\n  static const uint8_t EFUSE_PAGE_DIFF_1P7V[2] = {\n      PMU_EFUSE_PAGE_DCCALIB2_L,\n      PMU_EFUSE_PAGE_DCCALIB2_R,\n  };\n  static const uint8_t EFUSE_PAGE_DIFF_1P95V[2] = {\n      PMU_EFUSE_PAGE_DCCALIB_L,\n      PMU_EFUSE_PAGE_DCCALIB_R,\n  };\n  const uint8_t *page;\n  uint16_t efuse;\n\n  union DC_EFUSE_T {\n    struct DC_VALUE_T {\n      int16_t dc : DAC_DC_CALIB_BIT_WIDTH;\n      uint16_t checksum : (16 - DAC_DC_CALIB_BIT_WIDTH);\n    } val;\n    uint16_t reg;\n  };\n  union DC_EFUSE_T dc;\n\n  if (vcodec_mv >= 1900) {\n    page = EFUSE_PAGE_DIFF_1P95V;\n  } else {\n    page = EFUSE_PAGE_DIFF_1P7V;\n  }\n\n  pmu_get_efuse(page[0], &efuse);\n  if (dc_calib_checksum_valid(efuse)) {\n    ANALOG_INFO_TRACE(1, \"Dc calib L OK: 0x%04x\", efuse);\n    dc.reg = efuse;\n    *dc_l = dc.val.dc;\n  } else {\n    ANALOG_INFO_TRACE(1, \"Warning: Bad dc calib efuse L: 0x%04x\", efuse);\n    *dc_l = 0;\n  }\n\n  pmu_get_efuse(page[1], &efuse);\n  if (dc_calib_checksum_valid(efuse)) {\n    ANALOG_INFO_TRACE(1, \"Dc calib R OK: 0x%04x\", efuse);\n    dc.reg = efuse;\n    *dc_r = dc.val.dc;\n  } else {\n    ANALOG_INFO_TRACE(1, \"Warning: Bad dc calib efuse R: 0x%04x\", efuse);\n    *dc_r = 0;\n  }\n\n  ANALOG_INFO_TRACE(2, \"ANA: DC CALIB L=0x%04hX/%d R=0x%04hX/%d\", *dc_l,\n                    dc_calib_val_decode(*dc_l), *dc_r,\n                    dc_calib_val_decode(*dc_r));\n\n#if defined(ANA_DC_CALIB_L) || defined(ANA_DC_CALIB_R)\n#ifdef ANA_DC_CALIB_L\n  *dc_l = ANA_DC_CALIB_L;\n#endif\n#ifdef ANA_DC_CALIB_R\n  *dc_r = ANA_DC_CALIB_R;\n#endif\n  ANALOG_INFO_TRACE(2, \"ANA: OVERRIDE DC CALIB L=0x%04hX/%d R=0x%04hX/%d\",\n                    *dc_l, dc_calib_val_decode(*dc_l), *dc_r,\n                    dc_calib_val_decode(*dc_r));\n#endif\n\n  return;\n}\n\n#ifdef AUDIO_OUTPUT_DC_CALIB_ANA\nstatic void analog_aud_dc_calib_init(void) {\n  uint16_t val;\n  int16_t dc_l, dc_r;\n\n  analog_aud_get_dc_calib_value(&dc_l, &dc_r);\n\n  analog_read(ANA_REG_71, &val);\n  val = SET_BITFIELD(val, REG_CODEC_TX_EAR_OFF_BITL, dc_l);\n  analog_write(ANA_REG_71, val);\n\n  analog_read(ANA_REG_72, &val);\n  val = SET_BITFIELD(val, REG_CODEC_TX_EAR_OFF_BITR, dc_r);\n  analog_write(ANA_REG_72, val);\n}\n\nstatic void analog_aud_dc_calib_enable(bool en) {\n  uint16_t val;\n\n  analog_read(ANA_REG_70, &val);\n  val |= REG_CODEC_TX_EAR_OFFEN;\n  analog_write(ANA_REG_70, val);\n}\n#endif\n\nstatic void analog_aud_vcodec_enable(enum ANA_CODEC_USER_T user, bool en) {\n  uint32_t lock;\n  bool set = false;\n\n  lock = int_lock();\n  if (en) {\n    if (vcodec_map == 0) {\n      set = true;\n    }\n    vcodec_map |= user;\n  } else {\n    vcodec_map &= ~user;\n    if (vcodec_map == 0) {\n      set = true;\n    }\n  }\n  int_unlock(lock);\n\n  if (set) {\n    pmu_codec_config(!!vcodec_map);\n  }\n}\n\nstatic void analog_aud_enable_common_internal(enum ANA_CODEC_USER_T user,\n                                              bool en) {\n  uint32_t lock;\n  uint16_t val_6b;\n  bool set = false;\n\n  lock = int_lock();\n  if (en) {\n    if (codec_common_map == 0) {\n      set = true;\n    }\n    codec_common_map |= user;\n  } else {\n    codec_common_map &= ~user;\n    if (codec_common_map == 0) {\n      set = true;\n    }\n  }\n  int_unlock(lock);\n\n  if (set) {\n    analog_read(ANA_REG_6B, &val_6b);\n    if (codec_common_map) {\n      val_6b |= REG_CODEC_EN_VCM;\n    } else {\n      val_6b &= ~(REG_CODEC_EN_VCM | REG_CODEC_VCM_EN_LPF);\n    }\n    if (codec_common_map) {\n      // RTOS application startup time is long enougth for VCM charging\n#if !(defined(VCM_ON) && defined(RTOS))\n      // VCM fully stable time is about 60ms/1.95V or 150ms/1.7V\n      // Quick startup:\n      // 1) Disable VCM LPF and target to a higher voltage than the required one\n      // 2) Wait for a short time when VCM is in quick charge (high voltage)\n      // 3) Enable VCM LPF and target to the required VCM LPF voltage\n      analog_write(ANA_REG_6B, SET_BITFIELD(val_6b, REG_CODEC_VCM_LOW_VCM, 0));\n      uint32_t delay;\n\n#if defined(VCM_CAP_100NF)\n      if (vcodec_mv >= 1900) {\n        delay = 6;\n      } else {\n        delay = 10;\n      }\n#else\n      if (vcodec_mv >= 1900) {\n        delay = 25;\n      } else {\n        delay = 100;\n      }\n#endif\n      osDelay(delay);\n#if 0\n            // Target to a voltage near the required one\n            analog_write(ANA_REG_6B, val_6b);\n            osDelay(10);\n#endif\n#endif // !(VCM_ON && RTOS)\n      val_6b |= REG_CODEC_VCM_EN_LPF;\n    }\n    analog_write(ANA_REG_6B, val_6b);\n  }\n}\n\nstatic void analog_aud_enable_codec_common(enum ANA_CODEC_USER_T user,\n                                           bool en) {\n#ifndef VCM_ON\n  analog_aud_enable_common_internal(user, en);\n#endif\n}\n\nstatic void analog_aud_enable_adda_common(enum ANA_CODEC_USER_T user, bool en) {\n  uint32_t lock;\n  uint16_t val_6a, val_6b, val_74, val_7e;\n  bool set = false;\n\n  lock = int_lock();\n  if (en) {\n    if (adda_common_map == 0) {\n      set = true;\n    }\n    adda_common_map |= user;\n  } else {\n    adda_common_map &= ~user;\n    if (adda_common_map == 0) {\n      set = true;\n    }\n  }\n  int_unlock(lock);\n\n  if (set) {\n    analog_read(ANA_REG_6A, &val_6a);\n    analog_read(ANA_REG_6B, &val_6b);\n    if (vcodec_mv >= 1700) {\n      analog_read(ANA_REG_74, &val_74);\n    } else {\n      val_74 = 0;\n    }\n    analog_read(ANA_REG_7E, &val_7e);\n    if (adda_common_map) {\n      val_6a |= REG_CODEC_EN_BIAS;\n      analog_write(ANA_REG_6A, val_6a);\n      if (vcodec_mv >= 1700) {\n        val_74 |= REG_PU_TX_REGULATOR;\n        analog_write(ANA_REG_74, val_74);\n        hal_sys_timer_delay_us(10);\n        val_74 &= ~REG_BYPASS_TX_REGULATOR;\n        analog_write(ANA_REG_74, val_74);\n      }\n      val_6b |= REG_CODEC_EN_VCM_BUFFER;\n      val_7e |= REG_PU_CLKMUX_LDO0P9;\n    } else {\n      val_6b &= ~REG_CODEC_EN_VCM_BUFFER;\n      val_7e &= ~REG_PU_CLKMUX_LDO0P9;\n      if (vcodec_mv >= 1700) {\n        val_74 |= REG_BYPASS_TX_REGULATOR;\n        analog_write(ANA_REG_74, val_74);\n        val_74 &= ~REG_PU_TX_REGULATOR;\n        analog_write(ANA_REG_74, val_74);\n      }\n      val_6a &= ~REG_CODEC_EN_BIAS;\n      analog_write(ANA_REG_6A, val_6a);\n    }\n    analog_write(ANA_REG_6B, val_6b);\n    analog_write(ANA_REG_7E, val_7e);\n  }\n}\n\nstatic void analog_aud_enable_vmic(enum ANA_CODEC_USER_T user, uint32_t dev) {\n  uint32_t lock;\n  enum ANA_CODEC_USER_T old_map;\n  bool set = false;\n  int i;\n  uint32_t pmu_map = 0;\n\n  lock = int_lock();\n\n  for (i = 0; i < MAX_ANA_MIC_CH_NUM; i++) {\n    if (dev & (AUD_VMIC_MAP_VMIC1 << i)) {\n      if (vmic_map[i] == 0) {\n        set = true;\n      }\n      vmic_map[i] |= user;\n    } else {\n      old_map = vmic_map[i];\n      vmic_map[i] &= ~user;\n      if (old_map != 0 && vmic_map[i] == 0) {\n        set = true;\n      }\n    }\n\n    if (vmic_map[i]) {\n      pmu_map |= (AUD_VMIC_MAP_VMIC1 << i);\n    }\n  }\n\n  int_unlock(lock);\n\n  if (set) {\n    pmu_codec_mic_bias_enable(pmu_map);\n#ifdef VOICE_DETECTOR_EN\n    pmu_codec_mic_bias_lowpower_mode(pmu_map);\n#endif\n    if (pmu_map) {\n      osDelay(1);\n    }\n  }\n}\n\nuint32_t analog_aud_get_max_dre_gain(void) {\n  if (vcodec_mv >= 1900) {\n    return 0x11;\n  } else {\n    return 0xF;\n  }\n}\n\nint analog_reset(void) { return 0; }\n\nvoid analog_open(void) {\n  uint16_t val;\n\n  val = REG_CODEC_ADCA_CH_SEL(1) | REG_CODEC_ADCB_CH_SEL(1) |\n        REG_CODEC_ADCC_CH_SEL(1) | REG_CODEC_ADCD_CH_SEL(1);\n  analog_write(ANA_REG_61, val);\n\n  val = CFG_RESET_PGAA_DR | CFG_RESET_PGAB_DR | CFG_RESET_PGAC_DR |\n        CFG_RESET_PGAD_DR;\n  analog_write(ANA_REG_62, val);\n\n  val = 0; // REG_CODEC_ADCA_GAIN_UPDATE | REG_CODEC_ADCB_GAIN_UPDATE |\n           // REG_CODEC_ADCC_GAIN_UPDATE | REG_CODEC_ADCD_GAIN_UPDATE;\n  analog_write(ANA_REG_63, val);\n\n  val = REG_CODEC_ADC_IBSEL_REG(8) | REG_CODEC_ADC_IBSEL_VCOMP(8) |\n        REG_CODEC_ADC_IBSEL_VREF(8) | REG_CODEC_ADC_LPFVCM_SW(7);\n  analog_write(ANA_REG_67, val);\n\n  val = REG_CODEC_ADC_OP1_IBIT(2) | REG_CODEC_ADC_VREF_SEL(4);\n  analog_write(ANA_REG_68, val);\n\n  val = REG_CODEC_BIAS_IBSEL(8) | REG_CODEC_BIAS_IBSEL_VOICE(8);\n  if (vcodec_mv >= 1900) {\n    val |= REG_CODEC_BIAS_IBSEL_TX(5);\n  } else {\n#ifdef LOW_CODEC_BIAS\n    val |= REG_CODEC_BIAS_IBSEL_TX(1);\n#else\n    val |= REG_CODEC_BIAS_IBSEL_TX(3);\n#endif\n  }\n  analog_write(ANA_REG_69, val);\n\n  val = REG_CODEC_ADC_REG_VSEL(3) | REG_CODEC_BUF_LOWVCM(4) |\n        REG_CODEC_EN_RX_EXT | REG_CODEC_EN_TX_EXT | REG_CODEC_DAC_CLK_EDGE_SEL;\n  val |= REG_CODEC_EN_BIAS_LP;\n  analog_write(ANA_REG_6A, val);\n\n  uint16_t vcm, vcm_lpf;\n  if (vcodec_mv >= 1900) {\n    vcm = 7;\n    vcm_lpf = 0xA;\n  } else if (vcodec_mv >= 1800) {\n    vcm = vcm_lpf = 7;\n  } else {\n    vcm = vcm_lpf = 7;\n  }\n  val = REG_CODEC_VCM_LOW_VCM(vcm) | REG_CODEC_VCM_LOW_VCM_LP(vcm) |\n        REG_CODEC_VCM_LOW_VCM_LPF(vcm_lpf);\n  analog_write(ANA_REG_6B, val);\n\n  val = REG_CODEC_RX_VTOI_I_DAC2(4) | REG_CODEC_RX_VTOI_IDAC_SEL(8) |\n        REG_CODEC_RX_VTOI_VCS_SEL(0x10);\n  analog_write(ANA_REG_6C, val);\n\n  if (vcodec_mv > 1900) {\n    val = REG_CODEC_TX_DAC_VREF_L(9) | REG_CODEC_TX_DAC_VREF_R(9) |\n          REG_CODEC_TX_EAR_CAS_BIT(3);\n  } else if (vcodec_mv == 1900) {\n    val = REG_CODEC_TX_DAC_VREF_L(0xA) | REG_CODEC_TX_DAC_VREF_R(0xA) |\n          REG_CODEC_TX_EAR_CAS_BIT(3);\n  } else {\n    val = REG_CODEC_TX_DAC_VREF_L(2) | REG_CODEC_TX_DAC_VREF_R(2) |\n          REG_CODEC_TX_EAR_CAS_BIT(1);\n  }\n  analog_write(ANA_REG_6D, val);\n\n  val = REG_CODEC_TX_EAR_IBSEL(2);\n#ifdef LOW_CODEC_BIAS\n  if (vcodec_mv < 1900) {\n    val = REG_CODEC_TX_EAR_IBSEL(0);\n  }\n#endif\n  val |= REG_CODEC_TX_EAR_COMP_L(7) | REG_CODEC_TX_EAR_COMP_R(7) |\n         REG_CODEC_TX_EAR_DR_ST(1) | REG_CODEC_TX_EAR_FBCAP(3);\n  analog_write(ANA_REG_6E, val);\n\n  val = REG_CODEC_TX_EAR_DRE_GAIN_L(0xF) | REG_CODEC_TX_EAR_DRE_GAIN_R(0xF) |\n        DRE_GAIN_SEL_L | DRE_GAIN_SEL_R | REG_CODEC_TX_EAR_GAIN(1);\n#ifdef DAC_DRE_GAIN_DC_UPDATE\n  val |=\n      REG_CODEC_TX_EAR_DRE_GAIN_L_UPDATE | REG_CODEC_TX_EAR_DRE_GAIN_R_UPDATE;\n#endif\n  analog_write(ANA_REG_6F, val);\n\n  val = REG_CODEC_TX_EAR_OUTPUTSEL(1) | REG_CODEC_TX_EAR_SOFTSTART(8) |\n        REG_CODEC_TX_EAR_OCEN | REG_CODEC_TX_EAR_LPBIAS;\n  analog_write(ANA_REG_70, val);\n\n  val = REG_DAC_LDO0P9_VSEL(2) | REG_BYPASS_TX_REGULATOR |\n        REG_CODEC_TX_EAR_VCM_BIT(3) | REG_CODEC_TX_EAR_VCM_SEL;\n  if (vcodec_mv >= 1900) {\n    val |= REG_CODEC_TX_RVREF_CAP_BIT | REG_TX_REGULATOR_BIT(0xD);\n  } else {\n    val |= REG_TX_REGULATOR_BIT(4);\n  }\n  analog_write(ANA_REG_74, val);\n\n  val = REG_CLKMUX_DVDD_SEL | REG_CLKMUX_LDO0P9_VSEL(2) |\n        REG_AUDPLL_LDO_VREF(4) | REG_AUDPLL_LPF_BW_SEL;\n  analog_write(ANA_REG_7E, val);\n\n  // Optimize bottom noise, dig_codec_adcE_vref_sel[3:0] should be 0x4 ————by\n  // jeff 20200916\n  analog_read(ANA_REG_16E, &val);\n  val = SET_BITFIELD(val, DIG_CODEC_ADCE_VREF_SEL, 0x4);\n  analog_write(ANA_REG_16E, val);\n\n#ifdef AUDIO_OUTPUT_DC_CALIB_ANA\n  analog_aud_dc_calib_init();\n  analog_aud_dc_calib_enable(true);\n#endif\n\n#ifdef VCM_ON\n  analog_aud_enable_common_internal(ANA_CODEC_USER_DAC, true);\n#endif\n}\n\nvoid analog_sleep(void) {\n#ifdef VOICE_DETECTOR_EN\n  if ((adda_common_map & ANA_CODEC_USER_VAD) &&\n      (adc_map[4] & ANA_CODEC_USER_VAD) == 0) {\n    uint16_t val;\n\n    analog_read(ANA_REG_6B, &val);\n    val = (val & ~REG_CODEC_EN_VCM_BUFFER) | REG_CODEC_LP_VCM;\n    analog_write(ANA_REG_6B, val);\n  }\n#endif\n}\n\nvoid analog_wakeup(void) {\n#ifdef VOICE_DETECTOR_EN\n  if ((adda_common_map & ANA_CODEC_USER_VAD) &&\n      (adc_map[4] & ANA_CODEC_USER_VAD) == 0) {\n    uint16_t val;\n\n    analog_read(ANA_REG_6B, &val);\n    val = (val & ~REG_CODEC_LP_VCM) | REG_CODEC_EN_VCM_BUFFER;\n    analog_write(ANA_REG_6B, val);\n  }\n#endif\n}\n\nvoid analog_aud_codec_anc_enable(enum ANC_TYPE_T type, bool en) {\n  enum ANA_CODEC_USER_T user;\n  enum AUD_CHANNEL_MAP_T ch_map;\n\n  user = 0;\n  ch_map = 0;\n#if defined(ANC_FF_MIC_CH_L) || defined(ANC_FF_MIC_CH_R)\n  if (type & ANC_FEEDFORWARD) {\n    user |= ANA_CODEC_USER_ANC_FF;\n    ch_map |= ANC_FF_MIC_CH_L | ANC_FF_MIC_CH_R;\n  }\n#endif\n#if defined(ANC_FB_MIC_CH_L) || defined(ANC_FB_MIC_CH_R)\n  if (type & ANC_FEEDFORWARD) {\n    user |= ANA_CODEC_USER_ANC_FB;\n    ch_map |= ANC_FB_MIC_CH_L | ANC_FB_MIC_CH_R;\n  }\n#endif\n\n  ANALOG_DEBUG_TRACE(0, \"%s: type=%d en=%d ch_map=0x%x\", __func__, type, en,\n                     ch_map);\n\n  if (en) {\n    analog_aud_enable_vmic(user, ANC_VMIC_CFG);\n    analog_aud_enable_codec_common(user, true);\n    analog_aud_enable_adda_common(user, true);\n    analog_aud_set_adc_gain(AUD_INPUT_PATH_MAINMIC, ch_map);\n    analog_aud_enable_adc(user, ch_map, true);\n  } else {\n    analog_aud_apply_anc_adc_gain_offset(type, 0, 0);\n    analog_aud_enable_adc(user, ch_map, false);\n    analog_aud_enable_adda_common(user, false);\n    analog_aud_enable_codec_common(user, false);\n    analog_aud_enable_vmic(user, 0);\n  }\n}\n\nvoid analog_aud_codec_anc_boost(bool en,\n                                ANALOG_ANC_BOOST_DELAY_FUNC delay_func) {\n  uint16_t val;\n  int ret;\n\n  if (vcodec_mv >= 1800) {\n    return;\n  }\n\n  if (delay_func == NULL) {\n    delay_func = (ANALOG_ANC_BOOST_DELAY_FUNC)osDelay;\n  }\n\n  if (en) {\n    // -2.1 dB\n    hal_codec_set_anc_boost_gain_attn(0.78523563f);\n    delay_func(1);\n  }\n\n  analog_read(ANA_REG_6B, &val);\n  val &= ~REG_CODEC_VCM_EN_LPF;\n  analog_write(ANA_REG_6B, val);\n  osDelay(1);\n\n  do {\n    if (en) {\n      ret = pmu_codec_volt_ramp_up();\n    } else {\n      ret = pmu_codec_volt_ramp_down();\n    }\n    delay_func(1);\n  } while (ret);\n\n  analog_read(ANA_REG_6B, &val);\n  val |= REG_CODEC_VCM_EN_LPF;\n  analog_write(ANA_REG_6B, val);\n\n  if (!en) {\n    delay_func(1);\n    // 0 dB\n    hal_codec_set_anc_boost_gain_attn(1.0f);\n  }\n}\n\nvoid analog_aud_mickey_enable(bool en) {\n  if (en) {\n    analog_aud_vcodec_enable(ANA_CODEC_USER_MICKEY, true);\n    analog_aud_enable_vmic(ANA_CODEC_USER_MICKEY, CFG_HW_AUD_MICKEY_DEV);\n    analog_aud_enable_codec_common(ANA_CODEC_USER_MICKEY, true);\n  } else {\n    analog_aud_enable_codec_common(ANA_CODEC_USER_MICKEY, false);\n    analog_aud_enable_vmic(ANA_CODEC_USER_MICKEY, 0);\n    analog_aud_vcodec_enable(ANA_CODEC_USER_MICKEY, false);\n  }\n}\n\nvoid analog_aud_codec_adc_enable(enum AUD_IO_PATH_T input_path,\n                                 enum AUD_CHANNEL_MAP_T ch_map, bool en) {\n  uint32_t dev;\n\n  if (en) {\n    dev = hal_codec_get_input_path_cfg(input_path);\n    // Enable vmic first to overlap vmic stable time with codec vcm stable time\n    analog_aud_enable_vmic(ANA_CODEC_USER_ADC, dev);\n    analog_aud_enable_codec_common(ANA_CODEC_USER_ADC, true);\n    analog_aud_enable_adda_common(ANA_CODEC_USER_ADC, true);\n    analog_aud_set_adc_gain(input_path, ch_map);\n    analog_aud_enable_adc(ANA_CODEC_USER_ADC, ch_map, true);\n  } else {\n    analog_aud_enable_adc(ANA_CODEC_USER_ADC, ch_map, false);\n    analog_aud_enable_adda_common(ANA_CODEC_USER_ADC, false);\n    analog_aud_enable_codec_common(ANA_CODEC_USER_ADC, false);\n    analog_aud_enable_vmic(ANA_CODEC_USER_ADC, 0);\n  }\n}\n\nstatic void analog_aud_codec_config_speaker(void) {\n  bool en;\n\n  if (ana_spk_req && !ana_spk_muted) {\n    en = true;\n  } else {\n    en = false;\n  }\n\n  if (ana_spk_enabled != en) {\n    ana_spk_enabled = en;\n    if (en) {\n      analog_aud_enable_dac_pa(CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV);\n    } else {\n      analog_aud_enable_dac_pa(0);\n    }\n  }\n}\n\nvoid analog_aud_codec_speaker_enable(bool en) {\n  ana_spk_req = en;\n  analog_aud_codec_config_speaker();\n}\n\nvoid analog_aud_codec_dac_enable(bool en) {\n  if (en) {\n    analog_aud_enable_codec_common(ANA_CODEC_USER_DAC, true);\n    analog_aud_enable_adda_common(ANA_CODEC_USER_DAC, true);\n    pmu_codec_hppa_enable(1);\n    analog_aud_enable_dac(CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV);\n#if !defined(AUDIO_OUTPUT_DC_CALIB_ANA) && !defined(AUDIO_OUTPUT_DC_CALIB)\n    osDelay(1);\n    analog_aud_codec_speaker_enable(true);\n#endif\n  } else {\n#if !defined(AUDIO_OUTPUT_DC_CALIB_ANA) && !defined(AUDIO_OUTPUT_DC_CALIB)\n    analog_aud_codec_speaker_enable(false);\n    osDelay(1);\n#endif\n    analog_aud_enable_dac(0);\n    pmu_codec_hppa_enable(0);\n    analog_aud_enable_adda_common(ANA_CODEC_USER_DAC, false);\n    analog_aud_enable_codec_common(ANA_CODEC_USER_DAC, false);\n  }\n}\n\nvoid analog_aud_codec_open(void) {\n  analog_aud_vcodec_enable(ANA_CODEC_USER_CODEC, true);\n\n#ifdef _AUTO_SWITCH_POWER_MODE__\n  // pmu_mode_change(PMU_POWER_MODE_DIG_DCDC);\n#endif\n}\n\nvoid analog_aud_codec_close(void) {\n  static const enum AUD_CHANNEL_MAP_T all_ch =\n      AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH2 |\n      AUD_CHANNEL_MAP_CH3 | AUD_CHANNEL_MAP_CH4;\n\n  analog_aud_codec_speaker_enable(false);\n  osDelay(1);\n  analog_aud_codec_dac_enable(false);\n\n  analog_aud_codec_adc_enable(AUD_IO_PATH_NULL, all_ch, false);\n\n#ifdef _AUTO_SWITCH_POWER_MODE__\n  // pmu_mode_change(PMU_POWER_MODE_ANA_DCDC);\n#endif\n\n  analog_aud_vcodec_enable(ANA_CODEC_USER_CODEC, false);\n}\n\nvoid analog_aud_codec_mute(void) {\n#ifndef AUDIO_OUTPUT_DC_CALIB\n  // analog_codec_tx_pa_gain_sel(0);\n#endif\n\n  ana_spk_muted = true;\n  analog_aud_codec_config_speaker();\n}\n\nvoid analog_aud_codec_nomute(void) {\n  ana_spk_muted = false;\n  analog_aud_codec_config_speaker();\n\n#ifndef AUDIO_OUTPUT_DC_CALIB\n  // analog_aud_set_dac_gain(dac_gain);\n#endif\n}\n\nint analog_debug_config_audio_output(bool diff) { return 0; }\n\nint analog_debug_config_codec(uint16_t mv) {\n#ifdef ANC_PROD_TEST\n  int ret;\n\n  ret = pmu_debug_config_codec(mv);\n  if (ret) {\n    return ret;\n  }\n\n  vcodec_mv = mv;\n#endif\n  return 0;\n}\n\nint analog_debug_config_low_power_adc(bool enable) { return 0; }\n\nvoid analog_debug_config_anc_calib_mode(bool enable) {\n  anc_calib_mode = enable;\n}\n\nbool analog_debug_get_anc_calib_mode(void) { return anc_calib_mode; }\n\nint analog_debug_config_vad_mic(bool enable) { return 0; }\n\n#ifdef VOICE_DETECTOR_EN\n\nstatic void analog_aud_codec_vad_ini(void) {\n#if 1\n  unsigned short v;\n\n#if 0\n    //0x6a,0x0503\n    analog_read(ANA_REG_6A, &v);\n    v = SET_BITFIELD(v, REG_CODEC_ADC_REG_VSEL, 0x3);\n    v = SET_BITFIELD(v, REG_CODEC_BUF_LOWVCM, 0x4);\n    v |= REG_CODEC_EN_BIAS_LP;\n    analog_write(ANA_REG_6A, v);\n\n    //0x6b,0x3bbf\n    analog_read(ANA_REG_6B, &v);\n#if 0\n    v = SET_BITFIELD(v, REG_CODEC_VCM_LOW_VCM, 0x7);\n    v = SET_BITFIELD(v, REG_CODEC_VCM_LOW_VCM_LP, 0x7);\n    v = SET_BITFIELD(v, REG_CODEC_VCM_LOW_VCM_LPF, 0x7);\n    v &= ~REG_CODEC_EN_VCM_BUFFER;\n#else\n    v = SET_BITFIELD(v, REG_CODEC_VCM_LOW_VCM, 0x6);\n    v = SET_BITFIELD(v, REG_CODEC_VCM_LOW_VCM_LP, 0x6);\n    v = SET_BITFIELD(v, REG_CODEC_VCM_LOW_VCM_LPF, 0x6);\n    v |= REG_CODEC_EN_VCM_BUFFER;\n#endif\n    analog_write(ANA_REG_6B, v);\n\n    //0x74,0xc544\n    analog_read(ANA_REG_74, &v);\n    v &= ~REG_CODEC_TX_RVREF_CAP_BIT;\n    v = SET_BITFIELD(v, REG_DAC_LDO0P9_VSEL, 0x2);\n#if 0\n    v |= REG_BYPASS_TX_REGULATOR;\n    v &= ~REG_PU_TX_REGULATOR;\n#else\n    v &= ~REG_BYPASS_TX_REGULATOR;\n    v |= REG_PU_TX_REGULATOR;\n#endif\n    v = SET_BITFIELD(v, REG_TX_REGULATOR_BIT, 0x5);\n    v = SET_BITFIELD(v, REG_CODEC_TX_EAR_VCM_BIT, 0x2);\n    v |= REG_CODEC_TX_EAR_VCM_SEL;\n    analog_write(ANA_REG_74, v);\n#endif\n\n  // 0x173, 0x0805\n  v = REG_VOICE_LDO_VBIT(5) | CFG_VOICE_DET_DELAY(8);\n  analog_write(ANA_REG_173, v);\n\n  // 0x17d,0x817f\n  v = REG_CLK_GOAL_DIV_NUM(0x17f) | REG_COARSE_TUN_CODE_DR;\n  analog_write(ANA_REG_17D, v);\n\n#if 1\n  // 0x171,0x1047\n  v = CFG_VOICE_RESET | CFG_VOICE_PU_DELAY(4) | CFG_VOICE_PRECH_DELAY(0x7f);\n  analog_write(ANA_REG_171, v);\n#endif\n\n  // 0x17a\n  analog_read(ANA_REG_17A, &v);\n  v = SET_BITFIELD(v, REG_VOICE_LOW_TUNE, 0x3);\n  analog_write(ANA_REG_17A, v);\n\n  // 0x161[15] = 1;   //cfg_reg_clkmux_dvdd_sel\n  analog_read(ANA_REG_161, &v);\n  v |= 1 << 15;\n  analog_write(ANA_REG_161, v);\n\n  // 0x170[15] = 1;   //cfg_voice2adcE\n  analog_read(ANA_REG_170, &v);\n  v = SET_BITFIELD(v, REG_VOICE_GAIN_A, 0x3);\n  v = SET_BITFIELD(v, REG_VOICE_GAIN_B, 0x3);\n  v = SET_BITFIELD(v, REG_VOICE_HIGH_TUNE_A, 0xa);\n  v = SET_BITFIELD(v, REG_VOICE_HIGH_TUNE_B, 0x4);\n  v |= CFG_VOICE2ADCE;\n  analog_write(ANA_REG_170, v);\n\n  osDelay(1);\n#endif\n}\n\nstatic void analog_aud_codec_vad_fin(void) {\n  unsigned short v;\n\n  analog_read(ANA_REG_170, &v);\n  v &= ~CFG_VOICE2ADCE;\n  analog_write(ANA_REG_170, v);\n}\n\nstatic void analog_aud_codec_vad_trig_en(bool en) {\n#if 1\n  unsigned short v;\n  uint32_t lock;\n\n  lock = int_lock();\n  analog_read(ANA_REG_171, &v);\n  if (en)\n    v |= CFG_VOICE_TRIG_ENABLE;\n  else\n    v &= ~CFG_VOICE_TRIG_ENABLE;\n\n  analog_write(ANA_REG_171, v);\n\n  int_unlock(lock);\n#endif\n}\n\nstatic void analog_aud_codec_vad_pu(bool en) {\n#if 1\n  unsigned short v;\n  uint32_t lock;\n\n  lock = int_lock();\n  analog_read(ANA_REG_171, &v);\n  if (en)\n    v |= CFG_VOICE_POWER_ON;\n  else\n    v &= ~CFG_VOICE_POWER_ON;\n\n  analog_write(ANA_REG_171, v);\n  int_unlock(lock);\n#endif\n}\n\nvoid analog_aud_vad_enable(enum AUD_VAD_TYPE_T type, bool en) {\n  if (type == AUD_VAD_TYPE_DIG) {\n    uint32_t dev;\n    enum AUD_CHANNEL_MAP_T ch_map;\n\n    dev = hal_codec_get_input_path_cfg(AUD_INPUT_PATH_VADMIC);\n    ch_map = dev & AUD_CHANNEL_MAP_ANA_ALL;\n    analog_aud_enable_adc(ANA_CODEC_USER_VAD, ch_map, en);\n  } else if (type == AUD_VAD_TYPE_MIX || type == AUD_VAD_TYPE_ANA) {\n    if (en) {\n      analog_aud_codec_vad_ini();\n      analog_aud_codec_vad_pu(true);\n      osDelay(1);\n      analog_aud_codec_vad_trig_en(true);\n      // pmu_codec_vad_save_power();\n    } else {\n      // pmu_codec_vad_restore_power();\n      // Must power off before disabling trigger\n      analog_aud_codec_vad_pu(false);\n      osDelay(1);\n      analog_aud_codec_vad_trig_en(false);\n      analog_aud_codec_vad_fin();\n    }\n  }\n}\n\nvoid analog_aud_vad_adc_enable(bool en) {\n  uint32_t dev;\n  enum AUD_CHANNEL_MAP_T ch_map;\n\n  dev = hal_codec_get_input_path_cfg(AUD_INPUT_PATH_VADMIC);\n  ch_map = dev & AUD_CHANNEL_MAP_ANA_ALL;\n\n  if (en) {\n    // Enable vmic first to overlap vmic stable time with codec vcm stable time\n    analog_aud_enable_vmic(ANA_CODEC_USER_VAD, dev);\n    analog_aud_enable_codec_common(ANA_CODEC_USER_VAD, true);\n    analog_aud_enable_adda_common(ANA_CODEC_USER_VAD, true);\n    analog_aud_set_adc_gain(AUD_INPUT_PATH_VADMIC, ch_map);\n  } else {\n    analog_aud_enable_adda_common(ANA_CODEC_USER_VAD, false);\n    analog_aud_enable_codec_common(ANA_CODEC_USER_VAD, false);\n    analog_aud_enable_vmic(ANA_CODEC_USER_VAD, 0);\n  }\n}\n\n#endif\n"
  },
  {
    "path": "platform/drivers/ana/best2300p/analog_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ANALOG_BEST2300P_H__\n#define __ANALOG_BEST2300P_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define MAX_ANA_MIC_CH_NUM                  5\n\ntypedef void (*ANALOG_ANC_BOOST_DELAY_FUNC)(uint32_t ms);\n\nuint32_t analog_aud_get_max_dre_gain(void);\n\nvoid analog_aud_codec_anc_boost(bool en, ANALOG_ANC_BOOST_DELAY_FUNC delay_func);\n\nint analog_debug_config_vad_mic(bool enable);\n\nvoid analog_aud_vad_enable(enum AUD_VAD_TYPE_T type, bool en);\n\nvoid analog_aud_vad_adc_enable(bool en);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/ana/best2300p/pmu_best2300p.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"cmsis.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_aud.h\"\n#include \"hal_cache.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_psc.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"tgt_hardware.h\"\n#include \"usbphy.h\"\n\n#define PMU_LED_VIA_PWM\n#define DCDC_ULP_LP_ON\n\n// LDO soft start interval is about 1000 us\n#define PMU_LDO_PU_STABLE_TIME_US 1800\n#define PMU_DCDC_PU_STABLE_TIME_US 100\n#define PMU_VANA_STABLE_TIME_US 10\n#define PMU_VCORE_STABLE_TIME_US 10\n\n#ifdef __PMU_VIO_DYNAMIC_CTRL_MODE__\n#define IO_VOLT_ACTIVE_NORMAL PMU_IO_2_6V\n#else\n#define IO_VOLT_ACTIVE_NORMAL PMU_IO_2_6V\n#endif\n#ifdef DIGMIC_HIGH_VOLT\n#define IO_VOLT_ACTIVE_RISE PMU_IO_3_0V\n#else\n#define IO_VOLT_ACTIVE_RISE PMU_IO_2_8V\n#endif\n#define IO_VOLT_SLEEP PMU_IO_2_6V\n\n#define HPPA_RAMP_UP_VOLT_MV 1950\n\n#define PMU_DCDC_ANA_2_1V 0xF0\n#define PMU_DCDC_ANA_2_0V 0xE0\n#define PMU_DCDC_ANA_1_9V 0xD0\n#define PMU_DCDC_ANA_1_8V 0xC0\n#define PMU_DCDC_ANA_1_7V 0xB0\n#define PMU_DCDC_ANA_1_6V 0xA0\n#define PMU_DCDC_ANA_1_5V 0x90\n#define PMU_DCDC_ANA_1_4V 0x80\n#define PMU_DCDC_ANA_1_35V 0x77\n#define PMU_DCDC_ANA_1_3V 0x70\n#define PMU_DCDC_ANA_1_2V 0x60\n#define PMU_DCDC_ANA_1_1V 0x50\n#define PMU_DCDC_ANA_1_0V 0x40\n\n#define PMU_DCDC_ANA_SLEEP_1_3V PMU_DCDC_ANA_1_3V\n#define PMU_DCDC_ANA_SLEEP_1_2V PMU_DCDC_ANA_1_2V\n#define PMU_DCDC_ANA_SLEEP_1_1V PMU_DCDC_ANA_1_1V\n#define PMU_DCDC_ANA_SLEEP_1_0V PMU_DCDC_ANA_1_0V\n\n#define PMU_VBUCK2ANA_1_5V 0x30\n#define PMU_VBUCK2ANA_1_4V 0x2C\n#define PMU_VBUCK2ANA_1_3V 0x28\n#define PMU_VBUCK2ANA_1_2V 0x24\n#define PMU_VBUCK2ANA_1_1V 0x20\n#define PMU_VBUCK2ANA_1_0V 0x1C\n\n#define PMU_DCDC_DIG_1_1V 0xFF\n#define PMU_DCDC_DIG_1_05V 0xF0\n#define PMU_DCDC_DIG_1_0V 0xE0\n#define PMU_DCDC_DIG_0_95V 0xD0\n#define PMU_DCDC_DIG_0_9V 0xC0\n#define PMU_DCDC_DIG_0_85V 0xB0\n#define PMU_DCDC_DIG_0_8V 0xA0\n#define PMU_DCDC_DIG_0_75V 0x90\n#define PMU_DCDC_DIG_0_7V 0x80\n#define PMU_DCDC_DIG_0_65V 0x70\n#define PMU_DCDC_DIG_0_6V 0x60\n#define PMU_DCDC_DIG_0_55V 0x50\n#define PMU_DCDC_DIG_0_5V 0x40\n#define PMU_DCDC_DIG_0_45V 0x30\n#define PMU_DCDC_DIG_0_4V 0x20\n\n#define PMU_VDIG_1_2V 0x24\n#define PMU_VDIG_1_1V 0x20\n#define PMU_VDIG_1_05V 0x1E\n#define PMU_VDIG_1_0V 0x1C\n#define PMU_VDIG_0_95V 0x1A\n#define PMU_VDIG_0_9V 0x18\n#define PMU_VDIG_0_85V 0x16\n#define PMU_VDIG_0_8V 0x14\n#define PMU_VDIG_0_75V 0x12\n#define PMU_VDIG_0_7V 0x10\n#define PMU_VDIG_0_65V 0x0E\n#define PMU_VDIG_0_6V 0x0C\n#define PMU_VDIG_0_55V 0x0A\n#define PMU_VDIG_0_5V 0x08\n#define PMU_VDIG_0_45V 0x06\n#define PMU_VDIG_0_4V 0x04\n#define PMU_VDIG_MAX PMU_VDIG_1_2V\n\n#define PMU_IO_3_3V 0x15\n#define PMU_IO_3_2V 0x14\n#define PMU_IO_3_1V 0x13\n#define PMU_IO_3_0V 0x12\n#define PMU_IO_2_9V 0x11\n#define PMU_IO_2_8V 0x10\n#define PMU_IO_2_7V 0xF\n#define PMU_IO_2_6V 0xE\n#define PMU_IO_2_5V 0xD\n#define PMU_IO_2_4V 0xC\n#define PMU_IO_2_3V 0xB\n#define PMU_IO_2_2V 0xA\n#define PMU_IO_2_1V 0x9\n#define PMU_IO_2_0V 0x8\n#define PMU_IO_1_9V 0x7\n#define PMU_IO_1_8V 0x6\n#define PMU_IO_1_7V 0x5\n\n#define PMU_VMEM_2_8V 0x10\n#define PMU_VMEM_2_0V 0x8\n#define PMU_VMEM_1_9V 0x7\n#define PMU_VMEM_1_8V 0x6\n#define PMU_VMEM_1_7V 0x5\n#define PMU_VMEM_1_6V 0x4\n\n#define PMU_CODEC_2_7V 0xF\n#define PMU_CODEC_2_6V 0xE\n#define PMU_CODEC_2_5V 0xD\n#define PMU_CODEC_2_4V 0xC\n#define PMU_CODEC_2_3V 0xB\n#define PMU_CODEC_2_2V 0xA\n#define PMU_CODEC_2_1V 0x9\n#define PMU_CODEC_2_0V 0x8\n#define PMU_CODEC_1_9V 0x7\n#define PMU_CODEC_1_8V 0x6\n#define PMU_CODEC_1_7V 0x5\n#define PMU_CODEC_1_6V 0x4\n#define PMU_CODEC_1_5V 0x3\n\n#define PMU_HPPA2CODEC_2_3V 0x1C\n#define PMU_HPPA2CODEC_2_2V 0x18\n#define PMU_HPPA2CODEC_2_1V 0x14\n#define PMU_HPPA2CODEC_2_0V 0x10\n#define PMU_HPPA2CODEC_1_95V 0xE\n#define PMU_HPPA2CODEC_1_9V 0xC\n#define PMU_HPPA2CODEC_1_8V 0x8\n#define PMU_HPPA2CODEC_1_7V 0x4\n#define PMU_HPPA2CODEC_1_6V 0x0\n\n#define PMU_USB_3_4V 0xA\n#define PMU_USB_3_3V 0x9\n#define PMU_USB_3_2V 0x8\n#define PMU_USB_3_1V 0x7\n#define PMU_USB_3_0V 0x6\n#define PMU_USB_2_9V 0x5\n#define PMU_USB_2_8V 0x4\n#define PMU_USB_2_7V 0x3\n#define PMU_USB_2_6V 0x2\n\n#define PMU_VHPPA_2_0V 0x8\n#define PMU_VHPPA_1_9V 0x7\n#define PMU_VHPPA_1_8V 0x6\n#define PMU_VHPPA_1_7V 0x5\n#define PMU_VHPPA_1_6V 0x4\n#define PMU_VHPPA_1_5V 0x3\n\n#define PMU_DCDC_HPPA_2_1V 0xF0\n#define PMU_DCDC_HPPA_2_0V 0xE0\n#define PMU_DCDC_HPPA_1_95V 0xD8\n#define PMU_DCDC_HPPA_1_9V 0xD0\n#define PMU_DCDC_HPPA_1_8V 0xC0\n#define PMU_DCDC_HPPA_1_7V 0xB0\n#define PMU_DCDC_HPPA_1_6V 0xA0\n#define PMU_DCDC_HPPA_1_5V 0x90\n#define PMU_DCDC_HPPA_1_4V 0x80\n#define PMU_DCDC_HPPA_1_3V 0x70\n#define PMU_DCDC_HPPA_1_2V 0x60\n\n#define PMU_VMIC_3_3V 0x14\n#define PMU_VMIC_3_2V 0x13\n#define PMU_VMIC_3_1V 0x12\n#define PMU_VMIC_3_0V 0x11\n#define PMU_VMIC_2_9V 0x10\n#define PMU_VMIC_2_8V 0xF\n#define PMU_VMIC_2_7V 0xF\n#define PMU_VMIC_2_6V 0xE\n#define PMU_VMIC_2_5V 0xD\n#define PMU_VMIC_2_4V 0xC\n#define PMU_VMIC_2_3V 0xB\n#define PMU_VMIC_2_2V 0xA\n#define PMU_VMIC_2_1V 0x9\n#define PMU_VMIC_2_0V 0x8\n#define PMU_VMIC_1_9V 0x7\n#define PMU_VMIC_1_8V 0x6\n#define PMU_VMIC_1_7V 0x5\n#define PMU_VMIC_1_6V 0x4\n\n#define PMU_VMIC_RES_3_3V 0xF\n#define PMU_VMIC_RES_2_8V 0xA\n#define PMU_VMIC_RES_2_2V 0x4\n\n// 00   PMU_REG_METAL_ID\n#define PMU_METAL_ID_SHIFT 0\n#define PMU_METAL_ID_MASK (0xF << PMU_METAL_ID_SHIFT)\n#define PMU_METAL_ID(n) (((n)&0xF) << PMU_METAL_ID_SHIFT)\n\n// 02   PMU_REG_POWER_KEY_CFG\n#define REG_PU_VBAT_DIV (1 << 15)\n#define PU_LPO_DR (1 << 14)\n#define PU_LPO_REG (1 << 13)\n#define POWERKEY_WAKEUP_OSC_EN (1 << 12)\n#define RTC_POWER_ON_EN (1 << 11)\n#define PU_ALL_REG (1 << 10)\n#define CLK_32K_SEL_SHIFT 8\n#define CLK_32K_SEL_MASK (0x3 << CLK_32K_SEL_SHIFT)\n#define CLK_32K_SEL(n) BITFIELD_VAL(CLK_32K_SEL, n)\n#define DEEPSLEEP_MODE_DIGI_DR (1 << 7)\n#define DEEPSLEEP_MODE_DIGI_REG (1 << 6)\n#define REG_VCORE_SSTIME_MODE_SHIFT 4\n#define REG_VCORE_SSTIME_MODE_MASK (0x3 << REG_VCORE_SSTIME_MODE_SHIFT)\n#define REG_VCORE_SSTIME_MODE(n) BITFIELD_VAL(REG_VCORE_SSTIME_MODE, n)\n#define REG_LDO_SS_BIAS_EN_DR (1 << 3)\n#define REG_LDO_SS_BIAS_EN (1 << 2)\n#define REG_LP_EN_VHPPA_DSLEEP (1 << 1)\n#define REG_LP_EN_VHPPA_NORMAL (1 << 0)\n\n// 03   PMU_REG_BIAS_CFG\n#define REG_VSENSE_SEL_VMEM (1 << 15)\n#define PU_LP_BIAS_LDO_DSLEEP (1 << 14)\n#define PU_LP_BIAS_LDO_DR (1 << 13)\n#define PU_LP_BIAS_LDO_REG (1 << 12)\n#define PU_BIAS_LDO_DR (1 << 11)\n#define PU_BIAS_LDO_REG (1 << 10)\n#define BG_VBG_SEL_DR (1 << 9)\n#define BG_VBG_SEL_REG (1 << 8)\n#define BG_CONSTANT_GM_BIAS_DR (1 << 7)\n#define BG_CONSTANT_GM_BIAS_REG (1 << 6)\n#define BG_CORE_EN_DR (1 << 5)\n#define BG_CORE_EN_REG (1 << 4)\n#define REG_PU_LDO_VANA_DR (1 << 3)\n#define REG_PU_LDO_VANA (1 << 2)\n#define BG_NOTCH_EN_DR (1 << 1)\n#define BG_NOTCH_EN_REG (1 << 0)\n\n#define REG_PU_LDO_VANA_REG REG_PU_LDO_VANA\n\n// 05   PMU_REG_CHARGER_CFG\n#define REG_PU_LDO_VRTC_RF_DSLEEP (1 << 15)\n#define REG_PU_LDO_VRTC_RF_DR (1 << 14)\n#define REG_PU_LDO_VRTC_RF_REG (1 << 13)\n#define REG_CHARGE_OUT_INTR_MSK (1 << 12)\n#define REG_CHARGE_IN_INTR_MSK (1 << 11)\n#define REG_AC_ON_OUT_EN (1 << 10)\n#define REG_AC_ON_IN_EN (1 << 9)\n#define REG_CHARGE_INTR_EN (1 << 8)\n#define REG_AC_ON_DB_VALUE_SHIFT 0\n#define REG_AC_ON_DB_VALUE_MASK (0xFF << REG_AC_ON_DB_VALUE_SHIFT)\n#define REG_AC_ON_DB_VALUE(n) BITFIELD_VAL(REG_AC_ON_DB_VALUE, n)\n\n// 07   PMU_REG_ANA_CFG\n#define REG_LIGHT_LOAD_VANA_BUCK_LDO (1 << 15)\n#define REG_PULLDOWN_VANA_LDO (1 << 14)\n#define LP_EN_VANA_LDO_DSLEEP (1 << 13)\n#define LP_EN_VANA_LDO_DR (1 << 12)\n#define LP_EN_VANA_LDO_REG (1 << 11)\n#define REG_PU_LDO_VANA_DSLEEP (1 << 10)\n#define LDO_ANA_VBIT_DSLEEP_SHIFT 5\n#define LDO_ANA_VBIT_DSLEEP_MASK (0x1F << LDO_ANA_VBIT_DSLEEP_SHIFT)\n#define LDO_ANA_VBIT_DSLEEP(n) BITFIELD_VAL(LDO_ANA_VBIT_DSLEEP, n)\n#define LDO_ANA_VBIT_NORMAL_SHIFT 0\n#define LDO_ANA_VBIT_NORMAL_MASK (0x1F << LDO_ANA_VBIT_NORMAL_SHIFT)\n#define LDO_ANA_VBIT_NORMAL(n) BITFIELD_VAL(LDO_ANA_VBIT_NORMAL, n)\n\n#define LDO_VANA_VBIT_DSLEEP_SHIFT LDO_ANA_VBIT_DSLEEP_SHIFT\n#define LDO_VANA_VBIT_DSLEEP_MASK LDO_ANA_VBIT_DSLEEP_MASK\n#define LDO_VANA_VBIT_NORMAL_SHIFT LDO_ANA_VBIT_NORMAL_SHIFT\n#define LDO_VANA_VBIT_NORMAL_MASK LDO_ANA_VBIT_NORMAL_MASK\n\n// 08   PMU_REG_DIG_CFG\n#define REG_DCDC_CLK_SE_EN (1 << 15)\n#define LP_EN_VCORE_LDO_DSLEEP (1 << 14)\n#define LP_EN_VCORE_LDO_DR (1 << 13)\n#define LP_EN_VCORE_LDO_REG (1 << 12)\n#define LDO_DIG_VBIT_DSLEEP_SHIFT 6\n#define LDO_DIG_VBIT_DSLEEP_MASK (0x3F << LDO_DIG_VBIT_DSLEEP_SHIFT)\n#define LDO_DIG_VBIT_DSLEEP(n) BITFIELD_VAL(LDO_DIG_VBIT_DSLEEP, n)\n#define LDO_DIG_VBIT_NORMAL_SHIFT 0\n#define LDO_DIG_VBIT_NORMAL_MASK (0x3F << LDO_DIG_VBIT_NORMAL_SHIFT)\n#define LDO_DIG_VBIT_NORMAL(n) BITFIELD_VAL(LDO_DIG_VBIT_NORMAL, n)\n\n#define LDO_VCORE_VBIT_DSLEEP_SHIFT LDO_DIG_VBIT_DSLEEP_SHIFT\n#define LDO_VCORE_VBIT_DSLEEP_MASK LDO_DIG_VBIT_DSLEEP_MASK\n#define LDO_VCORE_VBIT_NORMAL_SHIFT LDO_DIG_VBIT_NORMAL_SHIFT\n#define LDO_VCORE_VBIT_NORMAL_MASK LDO_DIG_VBIT_NORMAL_MASK\n\n// Real bit is in REG_101 -- but we never change the default value\n#define REG_PU_LDO_VCORE_DSLEEP 0\n\n// 09   PMU_REG_IO_CFG\n#define LP_EN_VIO_LDO_DSLEEP (1 << 15)\n#define LP_EN_VIO_LDO_DR (1 << 14)\n#define LP_EN_VIO_LDO_REG (1 << 13)\n#define REG_PU_LDO_VIO_DSLEEP (1 << 12)\n#define REG_PU_LDO_VIO_DR (1 << 11)\n#define REG_PU_LDO_VIO (1 << 10)\n#define LDO_VIO_VBIT_NORMAL_SHIFT 5\n#define LDO_VIO_VBIT_NORMAL_MASK (0x1F << LDO_VIO_VBIT_NORMAL_SHIFT)\n#define LDO_VIO_VBIT_NORMAL(n) BITFIELD_VAL(LDO_VIO_VBIT_NORMAL, n)\n#define LDO_VIO_VBIT_DSLEEP_SHIFT 0\n#define LDO_VIO_VBIT_DSLEEP_MASK (0x1F << LDO_VIO_VBIT_DSLEEP_SHIFT)\n#define LDO_VIO_VBIT_DSLEEP(n) BITFIELD_VAL(LDO_VIO_VBIT_DSLEEP, n)\n\n#define REG_PU_LDO_VIO_REG REG_PU_LDO_VIO\n\n// 0A   PMU_REG_MEM_CFG\n#define LP_EN_VMEM_LDO_DSLEEP (1 << 15)\n#define LP_EN_VMEM_LDO_DR (1 << 14)\n#define LP_EN_VMEM_LDO_REG (1 << 13)\n#define REG_PU_LDO_VMEM_DSLEEP (1 << 12)\n#define REG_PU_LDO_VMEM_DR (1 << 11)\n#define REG_PU_LDO_VMEM_REG (1 << 10)\n#define LDO_VMEM_VBIT_NORMAL_SHIFT 5\n#define LDO_VMEM_VBIT_NORMAL_MASK (0x1F << LDO_VMEM_VBIT_NORMAL_SHIFT)\n#define LDO_VMEM_VBIT_NORMAL(n) BITFIELD_VAL(LDO_VMEM_VBIT_NORMAL, n)\n#define LDO_VMEM_VBIT_DSLEEP_SHIFT 0\n#define LDO_VMEM_VBIT_DSLEEP_MASK (0x1F << LDO_VMEM_VBIT_DSLEEP_SHIFT)\n#define LDO_VMEM_VBIT_DSLEEP(n) BITFIELD_VAL(LDO_VMEM_VBIT_DSLEEP, n)\n\n// 0B   PMU_REG_GP_CFG\n#define LP_EN_VGP_LDO_DSLEEP (1 << 15)\n#define LP_EN_VGP_LDO_DR (1 << 14)\n#define LP_EN_VGP_LDO_REG (1 << 13)\n#define REG_PU_LDO_VGP_DSLEEP (1 << 12)\n#define REG_PU_LDO_VGP_DR (1 << 11)\n#define REG_PU_LDO_VGP_REG (1 << 10)\n#define LDO_VGP_VBIT_NORMAL_SHIFT 5\n#define LDO_VGP_VBIT_NORMAL_MASK (0x1F << LDO_VGP_VBIT_NORMAL_SHIFT)\n#define LDO_VGP_VBIT_NORMAL(n) BITFIELD_VAL(LDO_VGP_VBIT_NORMAL, n)\n#define LDO_VGP_VBIT_DSLEEP_SHIFT 0\n#define LDO_VGP_VBIT_DSLEEP_MASK (0x1F << LDO_VGP_VBIT_DSLEEP_SHIFT)\n#define LDO_VGP_VBIT_DSLEEP(n) BITFIELD_VAL(LDO_VGP_VBIT_DSLEEP, n)\n\n// 0C   PMU_REG_USB_CFG\n#define REG_LDO_VANA_LV_MODE (1 << 15)\n#define REG_PULLDOWN_VUSB (1 << 14)\n#define LP_EN_VUSB_LDO_DSLEEP (1 << 13)\n#define LP_EN_VUSB_LDO_DR (1 << 12)\n#define LP_EN_VUSB_LDO_REG (1 << 11)\n#define PU_LDO_VUSB_DSLEEP (1 << 10)\n#define PU_LDO_VUSB_DR (1 << 9)\n#define PU_LDO_VUSB_REG (1 << 8)\n#define LDO_VUSB_VBIT_NORMAL_SHIFT 4\n#define LDO_VUSB_VBIT_NORMAL_MASK (0xF << LDO_VUSB_VBIT_NORMAL_SHIFT)\n#define LDO_VUSB_VBIT_NORMAL(n) BITFIELD_VAL(LDO_VUSB_VBIT_NORMAL, n)\n#define LDO_VUSB_VBIT_DSLEEP_SHIFT 0\n#define LDO_VUSB_VBIT_DSLEEP_MASK (0xF << LDO_VUSB_VBIT_DSLEEP_SHIFT)\n#define LDO_VUSB_VBIT_DSLEEP(n) BITFIELD_VAL(LDO_VUSB_VBIT_DSLEEP, n)\n\n#define REG_PU_LDO_VUSB_DSLEEP PU_LDO_VUSB_DSLEEP\n#define REG_PU_LDO_VUSB_DR PU_LDO_VUSB_DR\n#define REG_PU_LDO_VUSB_REG PU_LDO_VUSB_REG\n\n// 0D   PMU_REG_BAT2DIG_CFG\n#define LP_EN_VBAT2VCORE_LDO_DR (1 << 15)\n#define LP_EN_VBAT2VCORE_LDO (1 << 14)\n#define REG_PU_VBAT2VCORE_LDO_DR (1 << 13)\n#define REG_PU_VBAT2VCORE_LDO (1 << 12)\n#define LDO_VBAT2VCORE_VBIT_DSLEEP_SHIFT 6\n#define LDO_VBAT2VCORE_VBIT_DSLEEP_MASK                                        \\\n  (0x3F << LDO_VBAT2VCORE_VBIT_DSLEEP_SHIFT)\n#define LDO_VBAT2VCORE_VBIT_DSLEEP(n)                                          \\\n  BITFIELD_VAL(LDO_VBAT2VCORE_VBIT_DSLEEP, n)\n#define LDO_VBAT2VCORE_VBIT_NORMAL_SHIFT 0\n#define LDO_VBAT2VCORE_VBIT_NORMAL_MASK                                        \\\n  (0x3F << LDO_VBAT2VCORE_VBIT_NORMAL_SHIFT)\n#define LDO_VBAT2VCORE_VBIT_NORMAL(n)                                          \\\n  BITFIELD_VAL(LDO_VBAT2VCORE_VBIT_NORMAL, n)\n\n#define LP_EN_VBAT2VCORE_LDO_REG LP_EN_VBAT2VCORE_LDO\n#define REG_PU_LDO_VBAT2VCORE_DR REG_PU_VBAT2VCORE_LDO_DR\n#define REG_PU_LDO_VBAT2VCORE_REG REG_PU_VBAT2VCORE_LDO\n// Real bit is in REG_101 -- but we never change the default value\n#define REG_PU_LDO_VBAT2VCORE_DSLEEP 0\n\n// 0E   PMU_REG_HPPA_LDO_EN\n#define REG_PULL_DOWN_VHPPA (1 << 15)\n#define REG_PU_LDO_VHPPA_DSLEEP (1 << 14)\n#define REG_PU_LDO_VHPPA_EN (1 << 13)\n#define REG_RES_SEL_VHPPA_SHIFT 8\n#define REG_RES_SEL_VHPPA_MASK (0x1F << REG_RES_SEL_VHPPA_SHIFT)\n#define REG_RES_SEL_VHPPA(n) BITFIELD_VAL(REG_RES_SEL_VHPPA, n)\n#define REG_LP_BIAS_SEL_LDO_SHIFT 6\n#define REG_LP_BIAS_SEL_LDO_MASK (0x3 << REG_LP_BIAS_SEL_LDO_SHIFT)\n#define REG_LP_BIAS_SEL_LDO(n) BITFIELD_VAL(REG_LP_BIAS_SEL_LDO, n)\n#define REG_BYPASS_VBUCK2ANA (1 << 5)\n#define REG_PULLDOWN_VBUCK2ANA (1 << 4)\n#define REG_PULLDOWN_VIO (1 << 3)\n#define REG_PULLDOWN_VMEM (1 << 2)\n#define REG_PULLDOWN_VCORE (1 << 1)\n#define REG_PULLDOWN_VHPPA2VCODEC (1 << 0)\n\n// 0F   PMU_REG_HPPA2CODEC_CFG\n#define PU_LDO_VCODEC_DSLEEP (1 << 15)\n#define REG_BYPASS_VCORE (1 << 14)\n#define REG_PU_LDO_VHPPA2VCODEC_DR (1 << 13)\n#define REG_PU_LDO_VHPPA2VCODEC (1 << 12)\n#define LP_EN_VHPPA2VCODEC_LDO_DR (1 << 11)\n#define LP_EN_VHPPA2VCODEC_LDO (1 << 10)\n#define LDO_VHPPA2VCODEC_VBIT_DSLEEP_SHIFT 5\n#define LDO_VHPPA2VCODEC_VBIT_DSLEEP_MASK                                      \\\n  (0x1F << LDO_VHPPA2VCODEC_VBIT_DSLEEP_SHIFT)\n#define LDO_VHPPA2VCODEC_VBIT_DSLEEP(n)                                        \\\n  BITFIELD_VAL(LDO_VHPPA2VCODEC_VBIT_DSLEEP, n)\n#define LDO_VHPPA2VCODEC_VBIT_NORMAL_SHIFT 0\n#define LDO_VHPPA2VCODEC_VBIT_NORMAL_MASK                                      \\\n  (0x1F << LDO_VHPPA2VCODEC_VBIT_NORMAL_SHIFT)\n#define LDO_VHPPA2VCODEC_VBIT_NORMAL(n)                                        \\\n  BITFIELD_VAL(LDO_VHPPA2VCODEC_VBIT_NORMAL, n)\n\n#define REG_PU_LDO_VHPPA2VCODEC_REG REG_PU_LDO_VHPPA2VCODEC\n#define LP_EN_VHPPA2VCODEC_LDO_REG LP_EN_VHPPA2VCODEC_LDO\n#define REG_PU_LDO_VCODEC_DSLEEP PU_LDO_VCODEC_DSLEEP\n\n// 10   PMU_REG_CODEC_CFG\n#define PU_LDO_VCODEC_DR (1 << 15)\n#define PU_LDO_VCODEC_REG (1 << 14)\n#define LP_EN_VCODEC_LDO_DSLEEP (1 << 13)\n#define LP_EN_VCODEC_LDO_DR (1 << 12)\n#define LP_EN_VCODEC_LDO_REG (1 << 11)\n#define REG_PULLDOWN_VCODEC (1 << 10)\n#define LDO_VCODEC_VBIT_NORMAL_SHIFT 5\n#define LDO_VCODEC_VBIT_NORMAL_MASK (0x1F << LDO_VCODEC_VBIT_NORMAL_SHIFT)\n#define LDO_VCODEC_VBIT_NORMAL(n) BITFIELD_VAL(LDO_VCODEC_VBIT_NORMAL, n)\n#define LDO_VCODEC_VBIT_DSLEEP_SHIFT 0\n#define LDO_VCODEC_VBIT_DSLEEP_MASK (0x1F << LDO_VCODEC_VBIT_DSLEEP_SHIFT)\n#define LDO_VCODEC_VBIT_DSLEEP(n) BITFIELD_VAL(LDO_VCODEC_VBIT_DSLEEP, n)\n\n#define REG_PU_LDO_VCODEC_DR PU_LDO_VCODEC_DR\n#define REG_PU_LDO_VCODEC_REG PU_LDO_VCODEC_REG\n\n// 15   PMU_REG_DCDC_DIG_EN\n#define REG_UVLO_SEL_SHIFT 14\n#define REG_UVLO_SEL_MASK (0x3 << REG_UVLO_SEL_SHIFT)\n#define REG_UVLO_SEL(n) BITFIELD_VAL(REG_UVLO_SEL, n)\n#define REG_PU_LDO_DIG_DR (1 << 13)\n#define REG_PU_LDO_DIG_REG (1 << 12)\n#define REG_DCDC1_PFM_SEL_DSLEEP (1 << 11)\n#define REG_DCDC1_PFM_SEL_NORMAL (1 << 10)\n#define REG_DCDC1_ULP_MODE_DSLEEP (1 << 9)\n#define REG_DCDC1_ULP_MODE_NORMAL (1 << 8)\n#define REG_DCDC1_BURST_MODE_SEL_DSLEEP (1 << 7)\n#define REG_DCDC1_BURST_MODE_SEL_NORMAL (1 << 6)\n#define REG_DCDC1_VREF_SEL_DSLEEP_SHIFT 4\n#define REG_DCDC1_VREF_SEL_DSLEEP_MASK (0x3 << REG_DCDC1_VREF_SEL_DSLEEP_SHIFT)\n#define REG_DCDC1_VREF_SEL_DSLEEP(n) BITFIELD_VAL(REG_DCDC1_VREF_SEL_DSLEEP, n)\n#define REG_DCDC1_VREF_SEL_NORMAL_SHIFT 2\n#define REG_DCDC1_VREF_SEL_NORMAL_MASK (0x3 << REG_DCDC1_VREF_SEL_NORMAL_SHIFT)\n#define REG_DCDC1_VREF_SEL_NORMAL(n) BITFIELD_VAL(REG_DCDC1_VREF_SEL_NORMAL, n)\n#define REG_PU_DCDC1_DR (1 << 1)\n#define REG_PU_DCDC1 (1 << 0)\n\n#define REG_PU_LDO_VCORE_DR REG_PU_LDO_DIG_DR\n#define REG_PU_LDO_VCORE_REG REG_PU_LDO_DIG_REG\n\n// 19   PMU_REG_DCDC_ANA_CFG_19\n#define DCDC2_IX2_ERR (1 << 15)\n#define DCDC2_IX2_IRCOMP (1 << 14)\n#define DCDC2_LP_ERR (1 << 13)\n#define DCDC2_LP_VCOMP (1 << 12)\n#define DCDC2_PULLDOWN_EN (1 << 11)\n#define DCDC2_SLOPE_DOUBLE (1 << 10)\n#define DCDC2_SLOPE_EN_BURST (1 << 9)\n#define DCDC2_SOFT_START_EN (1 << 8)\n#define DCDC2_SS_TIME_SEL (1 << 7)\n#define DCDC2_SYNC_DISABLE (1 << 6)\n#define DCDC2_TEST_MODE_EN (1 << 5)\n#define DCDC2_ZCD_CAL_BIT_SHIFT 1\n#define DCDC2_ZCD_CAL_BIT_MASK (0xF << DCDC2_ZCD_CAL_BIT_SHIFT)\n#define DCDC2_ZCD_CAL_BIT(n) BITFIELD_VAL(DCDC2_ZCD_CAL_BIT, n)\n#define DCDC2_REG_BYPASS (1 << 0)\n\n// 1D   PMU_REG_DCDC_HPPA_CFG_1D\n#define DCDC3_IX2_ERR (1 << 15)\n#define DCDC3_IX2_IRCOMP (1 << 14)\n#define DCDC3_LP_ERR (1 << 13)\n#define DCDC3_LP_VCOMP (1 << 12)\n#define DCDC3_PULLDOWN_EN (1 << 11)\n#define DCDC3_SLOPE_DOUBLE (1 << 10)\n#define DCDC3_SLOPE_EN_BURST (1 << 9)\n#define DCDC3_SOFT_START_EN (1 << 8)\n#define DCDC3_SS_TIME_SEL (1 << 7)\n#define DCDC3_SYNC_DISABLE (1 << 6)\n#define DCDC3_TEST_MODE_EN (1 << 5)\n#define DCDC3_ZCD_CAL_BIT_SHIFT 1\n#define DCDC3_ZCD_CAL_BIT_MASK (0xF << DCDC3_ZCD_CAL_BIT_SHIFT)\n#define DCDC3_ZCD_CAL_BIT(n) BITFIELD_VAL(DCDC3_ZCD_CAL_BIT, n)\n#define DCDC3_REG_BYPASS (1 << 0)\n\n// 21   PMU_REG_PWR_SEL\n#define REG_PMU_VSEL1_SHIFT 13\n#define REG_PMU_VSEL1_MASK (0x7 << REG_PMU_VSEL1_SHIFT)\n#define REG_PMU_VSEL1(n) BITFIELD_VAL(REG_PMU_VSEL1, n)\n#define REG_POWER_SEL_CNT_SHIFT 8\n#define REG_POWER_SEL_CNT_MASK (0x1F << REG_POWER_SEL_CNT_SHIFT)\n#define REG_POWER_SEL_CNT(n) BITFIELD_VAL(REG_POWER_SEL_CNT, n)\n#define REG_PWR_SEL_DR (1 << 7)\n#define REG_PWR_SEL (1 << 6)\n#define CLK_BG_EN (1 << 5)\n#define CLK_BG_DIV_VALUE_SHIFT 0\n#define CLK_BG_DIV_VALUE_MASK (0x1F << CLK_BG_DIV_VALUE_SHIFT)\n#define CLK_BG_DIV_VALUE(n) BITFIELD_VAL(CLK_BG_DIV_VALUE, n)\n\n// 26   PMU_REG_INT_MASK\n#define RESET_EN_VCORE_LOW (1 << 15)\n#define RTC_INT1_MSK (1 << 14)\n#define RTC_INT0_MSK (1 << 13)\n#define KEY_ERR1_INTR_MSK (1 << 12)\n#define KEY_ERR0_INTR_MSK (1 << 11)\n#define KEY_PRESS_INTR_MSK (1 << 10)\n#define KEY_RELEASE_INTR_MSK (1 << 9)\n#define SAMPLE_DONE_INTR_MSK (1 << 8)\n#define CHAN_DATA_INTR_MSK_SHIFT 0\n#define CHAN_DATA_INTR_MSK_MASK (0xFF << CHAN_DATA_INTR_MSK_SHIFT)\n#define CHAN_DATA_INTR_MSK(n) BITFIELD_VAL(CHAN_DATA_INTR_MSK, n)\n\n// 27   PMU_REG_INT_EN\n#define REG_BG_SLEEP_MSK (1 << 15)\n#define RTC_INT_EN_1 (1 << 14)\n#define RTC_INT_EN_0 (1 << 13)\n#define KEY_ERR1_INTR_EN (1 << 12)\n#define KEY_ERR0_INTR_EN (1 << 11)\n#define KEY_PRESS_INTR_EN (1 << 10)\n#define KEY_RELEASE_INTR_EN (1 << 9)\n#define SAMPLE_DONE_INTR_EN (1 << 8)\n#define CHAN_DATA_INTR_EN_SHIFT 0\n#define CHAN_DATA_INTR_EN_MASK (0xFF << CHAN_DATA_INTR_EN_SHIFT)\n#define CHAN_DATA_INTR_EN(n) BITFIELD_VAL(CHAN_DATA_INTR_EN, n)\n\n// 36   PMU_REG_DCDC_DIG_CFG_36\n#define DCDC1_IX2_ERR (1 << 15)\n#define DCDC1_IX2_IRCOMP (1 << 14)\n#define DCDC1_LP_ERR (1 << 13)\n#define DCDC1_LP_VCOMP (1 << 12)\n#define DCDC1_PULLDOWN_EN (1 << 11)\n#define DCDC1_SLOPE_DOUBLE (1 << 10)\n#define DCDC1_SLOPE_EN_BURST (1 << 9)\n#define DCDC1_SOFT_START_EN (1 << 8)\n#define DCDC1_SS_TIME_SEL (1 << 7)\n#define DCDC1_SYNC_DISABLE (1 << 6)\n#define DCDC1_TEST_MODE_EN (1 << 5)\n#define DCDC1_ZCD_CAL_BIT_SHIFT 1\n#define DCDC1_ZCD_CAL_BIT_MASK (0xF << DCDC1_ZCD_CAL_BIT_SHIFT)\n#define DCDC1_ZCD_CAL_BIT(n) BITFIELD_VAL(DCDC1_ZCD_CAL_BIT, n)\n#define DCDC1_REG_BYPASS (1 << 0)\n\n// 38   PMU_REG_MIC_BIAS_E\n#define REG_MIC_BIASE_CHANSEL_SHIFT 14\n#define REG_MIC_BIASE_CHANSEL_MASK (0x3 << REG_MIC_BIASE_CHANSEL_SHIFT)\n#define REG_MIC_BIASE_CHANSEL(n) BITFIELD_VAL(REG_MIC_BIASE_CHANSEL, n)\n#define REG_MIC_BIASE_EN (1 << 13)\n#define REG_MIC_BIASE_ENLPF (1 << 12)\n#define REG_MIC_BIASE_LPFSEL_SHIFT 10\n#define REG_MIC_BIASE_LPFSEL_MASK (0x3 << REG_MIC_BIASE_LPFSEL_SHIFT)\n#define REG_MIC_BIASE_LPFSEL(n) BITFIELD_VAL(REG_MIC_BIASE_LPFSEL, n)\n#define REG_MIC_BIASE_VSEL_SHIFT 5\n#define REG_MIC_BIASE_VSEL_MASK (0x1F << REG_MIC_BIASE_VSEL_SHIFT)\n#define REG_MIC_BIASE_VSEL(n) BITFIELD_VAL(REG_MIC_BIASE_VSEL, n)\n#define REG_MIC_LDOE_RES_SHIFT 1\n#define REG_MIC_LDOE_RES_MASK (0xF << REG_MIC_LDOE_RES_SHIFT)\n#define REG_MIC_LDOE_RES(n) BITFIELD_VAL(REG_MIC_LDOE_RES, n)\n#define REG_MIC_LDOE_LOOPCTRL (1 << 0)\n\n// 39   PMU_REG_MIC_LDO_EN\n#define REG_LED_IO1_AIO_EN (1 << 15)\n#define REG_LED_IO2_AIO_EN (1 << 14)\n#define REG_LED_IO1_RX_EN (1 << 13)\n#define REG_LED_IO2_RX_EN (1 << 12)\n#define REG_MIC_LDOA_EN (1 << 11)\n#define REG_MIC_LDOB_EN (1 << 10)\n#define REG_MIC_LDOC_EN (1 << 9)\n#define REG_MIC_LDOD_EN (1 << 8)\n#define REG_MIC_LDOE_EN (1 << 7)\n#define DCDC1_OFFSET_CURRENT_EN (1 << 6)\n#define DCDC2_OFFSET_CURRENT_EN (1 << 5)\n#define DCDC3_OFFSET_CURRENT_EN (1 << 4)\n#define DCDC4_OFFSET_CURRENT_EN (1 << 3)\n\n// 3A   PMU_REG_LED_CFG\n#define REG_LED_IO1_IBIT_SHIFT 14\n#define REG_LED_IO1_IBIT_MASK (0x3 << REG_LED_IO1_IBIT_SHIFT)\n#define REG_LED_IO1_IBIT(n) BITFIELD_VAL(REG_LED_IO1_IBIT, n)\n#define REG_LED_IO1_OENB (1 << 13)\n#define REG_LED_IO1_PDEN (1 << 12)\n#define REG_LED_IO1_PU (1 << 11)\n#define REG_LED_IO1_PUEN (1 << 10)\n#define REG_LED_IO1_SEL_SHIFT 8\n#define REG_LED_IO1_SEL_MASK (0x3 << REG_LED_IO1_SEL_SHIFT)\n#define REG_LED_IO1_SEL(n) BITFIELD_VAL(REG_LED_IO1_SEL, n)\n#define REG_LED_IO2_IBIT_SHIFT 6\n#define REG_LED_IO2_IBIT_MASK (0x3 << REG_LED_IO2_IBIT_SHIFT)\n#define REG_LED_IO2_IBIT(n) BITFIELD_VAL(REG_LED_IO2_IBIT, n)\n#define REG_LED_IO2_OENB (1 << 5)\n#define REG_LED_IO2_PDEN (1 << 4)\n#define REG_LED_IO2_PU (1 << 3)\n#define REG_LED_IO2_PUEN (1 << 2)\n#define REG_LED_IO2_SEL_SHIFT 0\n#define REG_LED_IO2_SEL_MASK (0x3 << REG_LED_IO2_SEL_SHIFT)\n#define REG_LED_IO2_SEL(n) BITFIELD_VAL(REG_LED_IO2_SEL, n)\n\n// 3B   PMU_REG_MIC_BIAS_A\n#define REG_MIC_BIASA_CHANSEL_SHIFT 14\n#define REG_MIC_BIASA_CHANSEL_MASK (0x3 << REG_MIC_BIASA_CHANSEL_SHIFT)\n#define REG_MIC_BIASA_CHANSEL(n) BITFIELD_VAL(REG_MIC_BIASA_CHANSEL, n)\n#define REG_MIC_BIASA_EN (1 << 13)\n#define REG_MIC_BIASA_ENLPF (1 << 12)\n#define REG_MIC_BIASA_LPFSEL_SHIFT 10\n#define REG_MIC_BIASA_LPFSEL_MASK (0x3 << REG_MIC_BIASA_LPFSEL_SHIFT)\n#define REG_MIC_BIASA_LPFSEL(n) BITFIELD_VAL(REG_MIC_BIASA_LPFSEL, n)\n#define REG_MIC_BIASA_VSEL_SHIFT 5\n#define REG_MIC_BIASA_VSEL_MASK (0x1F << REG_MIC_BIASA_VSEL_SHIFT)\n#define REG_MIC_BIASA_VSEL(n) BITFIELD_VAL(REG_MIC_BIASA_VSEL, n)\n#define REG_MIC_LDOA_RES_SHIFT 1\n#define REG_MIC_LDOA_RES_MASK (0xF << REG_MIC_LDOA_RES_SHIFT)\n#define REG_MIC_LDOA_RES(n) BITFIELD_VAL(REG_MIC_LDOA_RES, n)\n#define REG_MIC_LDOA_LOOPCTRL (1 << 0)\n\n// 3C   PMU_REG_MIC_BIAS_B\n#define REG_MIC_BIASB_CHANSEL_SHIFT 14\n#define REG_MIC_BIASB_CHANSEL_MASK (0x3 << REG_MIC_BIASB_CHANSEL_SHIFT)\n#define REG_MIC_BIASB_CHANSEL(n) BITFIELD_VAL(REG_MIC_BIASB_CHANSEL, n)\n#define REG_MIC_BIASB_EN (1 << 13)\n#define REG_MIC_BIASB_ENLPF (1 << 12)\n#define REG_MIC_BIASB_LPFSEL_SHIFT 10\n#define REG_MIC_BIASB_LPFSEL_MASK (0x3 << REG_MIC_BIASB_LPFSEL_SHIFT)\n#define REG_MIC_BIASB_LPFSEL(n) BITFIELD_VAL(REG_MIC_BIASB_LPFSEL, n)\n#define REG_MIC_BIASB_VSEL_SHIFT 5\n#define REG_MIC_BIASB_VSEL_MASK (0x1F << REG_MIC_BIASB_VSEL_SHIFT)\n#define REG_MIC_BIASB_VSEL(n) BITFIELD_VAL(REG_MIC_BIASB_VSEL, n)\n#define REG_MIC_LDOB_RES_SHIFT 1\n#define REG_MIC_LDOB_RES_MASK (0xF << REG_MIC_LDOB_RES_SHIFT)\n#define REG_MIC_LDOB_RES(n) BITFIELD_VAL(REG_MIC_LDOB_RES, n)\n#define REG_MIC_LDOB_LOOPCTRL (1 << 0)\n\n// 3D   PMU_REG_MIC_BIAS_C\n#define REG_MIC_BIASC_CHANSEL_SHIFT 14\n#define REG_MIC_BIASC_CHANSEL_MASK (0x3 << REG_MIC_BIASC_CHANSEL_SHIFT)\n#define REG_MIC_BIASC_CHANSEL(n) BITFIELD_VAL(REG_MIC_BIASC_CHANSEL, n)\n#define REG_MIC_BIASC_EN (1 << 13)\n#define REG_MIC_BIASC_ENLPF (1 << 12)\n#define REG_MIC_BIASC_LPFSEL_SHIFT 10\n#define REG_MIC_BIASC_LPFSEL_MASK (0x3 << REG_MIC_BIASC_LPFSEL_SHIFT)\n#define REG_MIC_BIASC_LPFSEL(n) BITFIELD_VAL(REG_MIC_BIASC_LPFSEL, n)\n#define REG_MIC_BIASC_VSEL_SHIFT 5\n#define REG_MIC_BIASC_VSEL_MASK (0x1F << REG_MIC_BIASC_VSEL_SHIFT)\n#define REG_MIC_BIASC_VSEL(n) BITFIELD_VAL(REG_MIC_BIASC_VSEL, n)\n#define REG_MIC_LDOC_RES_SHIFT 1\n#define REG_MIC_LDOC_RES_MASK (0xF << REG_MIC_LDOC_RES_SHIFT)\n#define REG_MIC_LDOC_RES(n) BITFIELD_VAL(REG_MIC_LDOC_RES, n)\n#define REG_MIC_LDOC_LOOPCTRL (1 << 0)\n\n// 3E   PMU_REG_MIC_BIAS_D\n#define REG_MIC_BIASD_CHANSEL_SHIFT 14\n#define REG_MIC_BIASD_CHANSEL_MASK (0x3 << REG_MIC_BIASD_CHANSEL_SHIFT)\n#define REG_MIC_BIASD_CHANSEL(n) BITFIELD_VAL(REG_MIC_BIASD_CHANSEL, n)\n#define REG_MIC_BIASD_EN (1 << 13)\n#define REG_MIC_BIASD_ENLPF (1 << 12)\n#define REG_MIC_BIASD_LPFSEL_SHIFT 10\n#define REG_MIC_BIASD_LPFSEL_MASK (0x3 << REG_MIC_BIASD_LPFSEL_SHIFT)\n#define REG_MIC_BIASD_LPFSEL(n) BITFIELD_VAL(REG_MIC_BIASD_LPFSEL, n)\n#define REG_MIC_BIASD_VSEL_SHIFT 5\n#define REG_MIC_BIASD_VSEL_MASK (0x1F << REG_MIC_BIASD_VSEL_SHIFT)\n#define REG_MIC_BIASD_VSEL(n) BITFIELD_VAL(REG_MIC_BIASD_VSEL, n)\n#define REG_MIC_LDOD_RES_SHIFT 1\n#define REG_MIC_LDOD_RES_MASK (0xF << REG_MIC_LDOD_RES_SHIFT)\n#define REG_MIC_LDOD_RES(n) BITFIELD_VAL(REG_MIC_LDOD_RES, n)\n#define REG_MIC_LDOD_LOOPCTRL (1 << 0)\n\n// 3F   PMU_REG_EFUSE_CTRL\n#define TSMC_EFUSE_A_SHIFT 0\n#define TSMC_EFUSE_A_MASK (0x3F << TSMC_EFUSE_A_SHIFT)\n#define TSMC_EFUSE_A(n) BITFIELD_VAL(TSMC_EFUSE_A, n)\n#define TSMC_EFUSE_CLK_EN (1 << 8)\n#define TSMC_EFUSE_NR (1 << 9)\n#define TSMC_EFUSE_MR (1 << 10)\n#define MANUAL_MODE (1 << 11)\n#define TSMC_EFUSE_PGENB (1 << 12)\n#define REG_MARGIN_READ (1 << 13)\n\n// 40   PMU_REG_EFUSE_SEL\n#define TSMC_EFUSE_STROBE_TRIG (1 << 0)\n#define TSMC_EFUSE_STROBE_WIDTH_SHIFT 1\n#define TSMC_EFUSE_STROBE_WIDTH_MASK (0xFF << TSMC_EFUSE_STROBE_WIDTH_SHIFT)\n#define TSMC_EFUSE_STROBE_WIDTH(n) BITFIELD_VAL(TSMC_EFUSE_STROBE_WIDTH, n)\n#define REG_READ_STROBE_WIDTH_SHIFT 9\n#define REG_READ_STROBE_WIDTH_MASK (0xF << REG_READ_STROBE_WIDTH_SHIFT)\n#define REG_READ_STROBE_WIDTH(n) BITFIELD_VAL(REG_READ_STROBE_WIDTH, n)\n#define EFUSE_SEL_SHIFT 13\n#define EFUSE_SEL_MASK (0x7 << EFUSE_SEL_SHIFT)\n#define EFUSE_SEL(n) BITFIELD_VAL(EFUSE_SEL, n)\n\n// 41   PMU_REG_DCDC1_OFFSET\n#define DCDC1_OFFSET_BIT_SHIFT 8\n#define DCDC1_OFFSET_BIT_MASK (0xFF << DCDC1_OFFSET_BIT_SHIFT)\n#define DCDC1_OFFSET_BIT(n) BITFIELD_VAL(DCDC1_OFFSET_BIT, n)\n#define DCDC2_OFFSET_BIT_SHIFT 0\n#define DCDC2_OFFSET_BIT_MASK (0xFF << DCDC2_OFFSET_BIT_SHIFT)\n#define DCDC2_OFFSET_BIT(n) BITFIELD_VAL(DCDC2_OFFSET_BIT, n)\n\n// 43   PMU_REG_BUCK2ANA_CFG\n#define REG_PU_VBUCK2ANA_LDO_DR (1 << 15)\n#define REG_PU_VBUCK2ANA_LDO (1 << 14)\n#define LP_EN_VBUCK2ANA_LDO_DR (1 << 13)\n#define LP_EN_VBUCK2ANA_LDO (1 << 12)\n#define LDO_VBUCK2ANA_VBIT_DSLEEP_SHIFT 6\n#define LDO_VBUCK2ANA_VBIT_DSLEEP_MASK (0x3F << LDO_VBUCK2ANA_VBIT_DSLEEP_SHIFT)\n#define LDO_VBUCK2ANA_VBIT_DSLEEP(n) BITFIELD_VAL(LDO_VBUCK2ANA_VBIT_DSLEEP, n)\n#define LDO_VBUCK2ANA_VBIT_NORMAL_SHIFT 0\n#define LDO_VBUCK2ANA_VBIT_NORMAL_MASK (0x3F << LDO_VBUCK2ANA_VBIT_NORMAL_SHIFT)\n#define LDO_VBUCK2ANA_VBIT_NORMAL(n) BITFIELD_VAL(LDO_VBUCK2ANA_VBIT_NORMAL, n)\n\n#define REG_PU_LDO_VBUCK2ANA_DR REG_PU_VBUCK2ANA_LDO_DR\n#define REG_PU_LDO_VBUCK2ANA_REG REG_PU_VBUCK2ANA_LDO\n#define LP_EN_VBUCK2ANA_LDO_REG LP_EN_VBUCK2ANA_LDO\n// No pu dsleep cfg\n#define REG_PU_LDO_VBUCK2ANA_DSLEEP 0\n\n// 44   PMU_REG_SLEEP_CFG\n#define PMIC_TMODE_1300_SHIFT 0\n#define PMIC_TMODE_1300_MASK (0x7 << PMIC_TMODE_1300_SHIFT)\n#define PMIC_TMODE_1300(n) BITFIELD_VAL(PMIC_TMODE_1300, n)\n#define POWERON_PRESS_EN (1 << 3)\n#define POWERON_RELEASE_EN (1 << 4)\n#define SLEEP_ALLOW (1 << 5)\n#define REG_VHPPA2VCODEC_SLP_ON (1 << 6)\n\n#define REG_PU_LDO_VHPPA2VCODEC_DSLEEP REG_VHPPA2VCODEC_SLP_ON\n\n// 46   PMU_REG_DCDC_DIG_VOLT\n#define REG_DCDC1_VBIT_DSLEEP_SHIFT 8\n#define REG_DCDC1_VBIT_DSLEEP_MASK (0xFF << REG_DCDC1_VBIT_DSLEEP_SHIFT)\n#define REG_DCDC1_VBIT_DSLEEP(n) BITFIELD_VAL(REG_DCDC1_VBIT_DSLEEP, n)\n#define REG_DCDC1_VBIT_NORMAL_SHIFT 0\n#define REG_DCDC1_VBIT_NORMAL_MASK (0xFF << REG_DCDC1_VBIT_NORMAL_SHIFT)\n#define REG_DCDC1_VBIT_NORMAL(n) BITFIELD_VAL(REG_DCDC1_VBIT_NORMAL, n)\n#define MAX_DCDC1_VBIT_VAL                                                     \\\n  (REG_DCDC1_VBIT_NORMAL_MASK >> REG_DCDC1_VBIT_NORMAL_SHIFT)\n\n// 47   PMU_REG_DCDC_ANA_VOLT\n#define REG_DCDC2_VBIT_DSLEEP_SHIFT 8\n#define REG_DCDC2_VBIT_DSLEEP_MASK (0xFF << REG_DCDC2_VBIT_DSLEEP_SHIFT)\n#define REG_DCDC2_VBIT_DSLEEP(n) BITFIELD_VAL(REG_DCDC2_VBIT_DSLEEP, n)\n#define REG_DCDC2_VBIT_NORMAL_SHIFT 0\n#define REG_DCDC2_VBIT_NORMAL_MASK (0xFF << REG_DCDC2_VBIT_NORMAL_SHIFT)\n#define REG_DCDC2_VBIT_NORMAL(n) BITFIELD_VAL(REG_DCDC2_VBIT_NORMAL, n)\n#define MAX_DCDC2_VBIT_VAL                                                     \\\n  (REG_DCDC2_VBIT_NORMAL_MASK >> REG_DCDC2_VBIT_NORMAL_SHIFT)\n\n// 48   PMU_REG_DCDC_HPPA_VOLT\n#define REG_DCDC3_VBIT_DSLEEP_SHIFT 8\n#define REG_DCDC3_VBIT_DSLEEP_MASK (0xFF << REG_DCDC3_VBIT_DSLEEP_SHIFT)\n#define REG_DCDC3_VBIT_DSLEEP(n) BITFIELD_VAL(REG_DCDC3_VBIT_DSLEEP, n)\n#define REG_DCDC3_VBIT_NORMAL_SHIFT 0\n#define REG_DCDC3_VBIT_NORMAL_MASK (0xFF << REG_DCDC3_VBIT_NORMAL_SHIFT)\n#define REG_DCDC3_VBIT_NORMAL(n) BITFIELD_VAL(REG_DCDC3_VBIT_NORMAL, n)\n#define MAX_DCDC3_VBIT_VAL                                                     \\\n  (REG_DCDC3_VBIT_NORMAL_MASK >> REG_DCDC3_VBIT_NORMAL_SHIFT)\n\n// 49   PMU_REG_DCDC4_VOLT\n#define REG_DCDC4_VBIT_DSLEEP_SHIFT 8\n#define REG_DCDC4_VBIT_DSLEEP_MASK (0xFF << REG_DCDC4_VBIT_DSLEEP_SHIFT)\n#define REG_DCDC4_VBIT_DSLEEP(n) BITFIELD_VAL(REG_DCDC4_VBIT_DSLEEP, n)\n#define REG_DCDC4_VBIT_NORMAL_SHIFT 0\n#define REG_DCDC4_VBIT_NORMAL_MASK (0xFF << REG_DCDC4_VBIT_NORMAL_SHIFT)\n#define REG_DCDC4_VBIT_NORMAL(n) BITFIELD_VAL(REG_DCDC4_VBIT_NORMAL, n)\n\n// 4A   PMU_REG_DCDC_ANA_EN\n#define REG_DCDC2_PFM_SEL_DSLEEP (1 << 11)\n#define REG_DCDC2_PFM_SEL_NORMAL (1 << 10)\n#define REG_DCDC2_ULP_MODE_DSLEEP (1 << 9)\n#define REG_DCDC2_ULP_MODE_NORMAL (1 << 8)\n#define REG_DCDC2_BURST_MODE_SEL_DSLEEP (1 << 7)\n#define REG_DCDC2_BURST_MODE_SEL_NORMAL (1 << 6)\n#define REG_DCDC2_VREF_SEL_DSLEEP_SHIFT 4\n#define REG_DCDC2_VREF_SEL_DSLEEP_MASK (0x3 << REG_DCDC2_VREF_SEL_DSLEEP_SHIFT)\n#define REG_DCDC2_VREF_SEL_DSLEEP(n) BITFIELD_VAL(REG_DCDC2_VREF_SEL_DSLEEP, n)\n#define REG_DCDC2_VREF_SEL_NORMAL_SHIFT 2\n#define REG_DCDC2_VREF_SEL_NORMAL_MASK (0x3 << REG_DCDC2_VREF_SEL_NORMAL_SHIFT)\n#define REG_DCDC2_VREF_SEL_NORMAL(n) BITFIELD_VAL(REG_DCDC2_VREF_SEL_NORMAL, n)\n#define REG_PU_DCDC2_DR (1 << 1)\n#define REG_PU_DCDC2 (1 << 0)\n\n// 4B   PMU_REG_DCDC_HPPA_EN\n#define REG_DCDC3_PFM_SEL_DSLEEP (1 << 11)\n#define REG_DCDC3_PFM_SEL_NORMAL (1 << 10)\n#define REG_DCDC3_ULP_MODE_DSLEEP (1 << 9)\n#define REG_DCDC3_ULP_MODE_NORMAL (1 << 8)\n#define REG_DCDC3_BURST_MODE_SEL_DSLEEP (1 << 7)\n#define REG_DCDC3_BURST_MODE_SEL_NORMAL (1 << 6)\n#define REG_DCDC3_VREF_SEL_DSLEEP_SHIFT 4\n#define REG_DCDC3_VREF_SEL_DSLEEP_MASK (0x3 << REG_DCDC3_VREF_SEL_DSLEEP_SHIFT)\n#define REG_DCDC3_VREF_SEL_DSLEEP(n) BITFIELD_VAL(REG_DCDC3_VREF_SEL_DSLEEP, n)\n#define REG_DCDC3_VREF_SEL_NORMAL_SHIFT 2\n#define REG_DCDC3_VREF_SEL_NORMAL_MASK (0x3 << REG_DCDC3_VREF_SEL_NORMAL_SHIFT)\n#define REG_DCDC3_VREF_SEL_NORMAL(n) BITFIELD_VAL(REG_DCDC3_VREF_SEL_NORMAL, n)\n#define REG_PU_DCDC3_DR (1 << 1)\n#define REG_PU_DCDC3 (1 << 0)\n\n// 4C   PMU_REG_DCDC4_EN\n#define REG_DCDC4_PFM_SEL_DSLEEP (1 << 11)\n#define REG_DCDC4_PFM_SEL_NORMAL (1 << 10)\n#define REG_DCDC4_ULP_MODE_DSLEEP (1 << 9)\n#define REG_DCDC4_ULP_MODE_NORMAL (1 << 8)\n#define REG_DCDC4_BURST_MODE_SEL_DSLEEP (1 << 7)\n#define REG_DCDC4_BURST_MODE_SEL_NORMAL (1 << 6)\n#define REG_DCDC4_VREF_SEL_DSLEEP_SHIFT 4\n#define REG_DCDC4_VREF_SEL_DSLEEP_MASK (0x3 << REG_DCDC4_VREF_SEL_DSLEEP_SHIFT)\n#define REG_DCDC4_VREF_SEL_DSLEEP(n) BITFIELD_VAL(REG_DCDC4_VREF_SEL_DSLEEP, n)\n#define REG_DCDC4_VREF_SEL_NORMAL_SHIFT 2\n#define REG_DCDC4_VREF_SEL_NORMAL_MASK (0x3 << REG_DCDC4_VREF_SEL_NORMAL_SHIFT)\n#define REG_DCDC4_VREF_SEL_NORMAL(n) BITFIELD_VAL(REG_DCDC4_VREF_SEL_NORMAL, n)\n#define REG_PU_DCDC4_DR (1 << 1)\n#define REG_PU_DCDC4 (1 << 0)\n\n// 4F   PMU_REG_POWER_OFF\n#define SOFT_POWER_OFF (1 << 0)\n#define HARDWARE_POWER_OFF_EN (1 << 1)\n#define AC_ON_EN (1 << 2)\n#define RC_CAL_READY (1 << 3)\n#define KEY_START (1 << 4)\n#define GPADC_START (1 << 5)\n#define EFUSE_READ_DONE (1 << 6)\n#define EFUSE_READ_BUSY (1 << 7)\n#define VBAT_OVP (1 << 8)\n#define VCORE_LOW (1 << 9)\n#define REG_LED_IO1_DATA_IN (1 << 10)\n#define REG_LED_IO2_DATA_IN (1 << 11)\n#define RD_EFUSE_REG (1 << 12)\n#define REG_WDT_LOAD (1 << 13)\n\n#define EFUSE_READ_TRIG_SHIFT (12)\n#define EFUSE_READ_TRIG_MASK (0xF << EFUSE_READ_TRIG_SHIFT)\n#define EFUSE_READ_TRIG(n) BITFIELD_VAL(EFUSE_READ_TRIG, n)\n#define EFUSE_READ_TRIG_WORD (0xA)\n\n// 52   PMU_REG_INT_STATUS\n#define RD_RES1 (1 << 15)\n#define RTC_INT_1 (1 << 14)\n#define RTC_INT_0 (1 << 13)\n#define KEY_ERR1_INTR (1 << 12)\n#define KEY_ERR0_INTR (1 << 11)\n#define KEY_PRESS_INTR (1 << 10)\n#define KEY_RELEASE_INTR (1 << 9)\n#define SAMPLE_PERIOD_DONE_INTR (1 << 8)\n#define CHAN_DATA_VALID_INTR_SHIFT 0\n#define CHAN_DATA_VALID_INTR_MASK (0xFF << CHAN_DATA_VALID_INTR_SHIFT)\n#define CHAN_DATA_VALID_INTR(n) BITFIELD_VAL(CHAN_DATA_VALID_INTR, n)\n\n// 53   PMU_REG_INT_MSKED_STATUS\n// 51   PMU_REG_INT_CLR\n#define PMIC_CODEC_PWM (1 << 15)\n#define RTC_INT1_MSKED (1 << 14)\n#define RTC_INT0_MSKED (1 << 13)\n#define KEY_ERR1_INTR_MSKED (1 << 12)\n#define KEY_ERR0_INTR_MSKED (1 << 11)\n#define KEY_PRESS_INTR_MSKED (1 << 10)\n#define KEY_RELEASE_INTR_MSKED (1 << 9)\n#define SAMPLE_DONE_INTR_MSKED (1 << 8)\n#define CHAN_DATA_INTR_MSKED_SHIFT 0\n#define CHAN_DATA_INTR_MSKED_MASK (0xFF << CHAN_DATA_INTR_MSKED_SHIFT)\n#define CHAN_DATA_INTR_MSKED(n) BITFIELD_VAL(CHAN_DATA_INTR_MSKED, n)\n\n// 5E   PMU_REG_CHARGER_STATUS\n#define DIG_PU_VHPPA (1 << 15)\n#define DIG_PU_VRTC_RF (1 << 14)\n#define DIG_PU_VCODEC (1 << 13)\n#define DIG_PU_VUSB (1 << 12)\n#define POWER_ON_RELEASE (1 << 11)\n#define POWER_ON_PRESS (1 << 10)\n#define POWER_ON (1 << 9)\n#define DEEPSLEEP_MODE (1 << 8)\n// #define PMU_LDO_ON                          (1 << 7)\n#define PU_OSC_OUT (1 << 6)\n#define UVLO_LV (1 << 5)\n#define AC_ON_DET_OUT_MASKED (1 << 4)\n#define AC_ON_DET_IN_MASKED (1 << 3)\n#define AC_ON (1 << 2)\n#define AC_ON_DET_OUT (1 << 1)\n#define AC_ON_DET_IN (1 << 0)\n\n// 77   PMU_REG_ANA_77\n#define REG_AUDPLL_DIVN_SHIFT 0\n#define REG_AUDPLL_DIVN_MASK (0x1F << REG_AUDPLL_DIVN_SHIFT)\n#define REG_AUDPLL_DIVN(n) BITFIELD_VAL(REG_AUDPLL_DIVN, n)\n#define REG_AUDPLL_DIVN_RST (1 << 5)\n#define REG_AUDPLL_DIV_DR (1 << 6)\n#define REG_AUDPLL_EN_CLKA (1 << 7)\n#define REG_AUDPLL_EN_CLKD (1 << 8)\n#define REG_AUDPLL_FORCE_LK (1 << 9)\n#define REG_AUDPLL_LK_ERR23 (1 << 10)\n#define REG_AUDPLL_LK_LONG (1 << 11)\n#define REG_AUDPLL_LK_RSTB (1 << 12)\n#define REG_AUDPLL_LK_WIN_SHIFT 13\n#define REG_AUDPLL_LK_WIN_MASK (0x7 << REG_AUDPLL_LK_WIN_SHIFT)\n#define REG_AUDPLL_LK_WIN(n) BITFIELD_VAL(REG_AUDPLL_LK_WIN, n)\n\n// 101  PMU_REG_DCDC_RAMP_EN\n#define REG_MIC_BIASA_IX2 (1 << 15)\n#define REG_MIC_BIASB_IX2 (1 << 14)\n#define REG_MIC_BIASC_IX2 (1 << 13)\n#define REG_MIC_BIASD_IX2 (1 << 12)\n#define REG_MIC_BIASE_IX2 (1 << 11)\n#define REG_PULLDOWN_VGP (1 << 10)\n#define REG_PU_LDO_DIG_DSLEEP (1 << 9)\n#define LDO_VHPPA2VCODEC_BYPASS (1 << 8)\n#define LDO_VGP_LV_MODE (1 << 7)\n#define IPTAT_EN (1 << 6)\n#define REG_PU_AVDD25_ANA (1 << 5)\n#define REG_DCDC1_RAMP_EN (1 << 4)\n#define REG_DCDC2_RAMP_EN (1 << 3)\n#define REG_DCDC3_RAMP_EN (1 << 2)\n#define REG_PU_VMEM_DELAY_DR (1 << 1)\n#define REG_PU_VMEM_DELAY (1 << 0)\n\n// 107  PMU_REG_SUBCNT_DATA\n#define SUBCNT_DATA2_SHIFT 8\n#define SUBCNT_DATA2_MASK (0xFF << SUBCNT_DATA2_SHIFT)\n#define SUBCNT_DATA2(n) BITFIELD_VAL(SUBCNT_DATA2, n)\n#define SUBCNT_DATA3_SHIFT 0\n#define SUBCNT_DATA3_MASK (0xFF << SUBCNT_DATA3_SHIFT)\n#define SUBCNT_DATA3(n) BITFIELD_VAL(SUBCNT_DATA3, n)\n\n// 108  PMU_REG_PWM_BR_EN\n#define TG_SUBCNT_D2_ST_SHIFT 9\n#define TG_SUBCNT_D2_ST_MASK (0x7F << TG_SUBCNT_D2_ST_SHIFT)\n#define TG_SUBCNT_D2_ST(n) BITFIELD_VAL(TG_SUBCNT_D2_ST, n)\n#define REG_PWM2_BR_EN (1 << 8)\n#define TG_SUBCNT_D3_ST_SHIFT 1\n#define TG_SUBCNT_D3_ST_MASK (0x7F << TG_SUBCNT_D3_ST_SHIFT)\n#define TG_SUBCNT_D3_ST(n) BITFIELD_VAL(TG_SUBCNT_D3_ST, n)\n#define REG_PWM3_BR_EN (1 << 0)\n\n// 109  PMU_REG_PWM_EN\n#define REG_LED0_OUT (1 << 15)\n#define REG_LED1_OUT (1 << 14)\n#define PWM_SELECT_EN_SHIFT 12\n#define PWM_SELECT_EN_MASK (0x3 << PWM_SELECT_EN_SHIFT)\n#define PWM_SELECT_EN(n) BITFIELD_VAL(PWM_SELECT_EN, n)\n#define PWM_SELECT_INV_SHIFT 10\n#define PWM_SELECT_INV_MASK (0x3 << PWM_SELECT_INV_SHIFT)\n#define PWM_SELECT_INV(n) BITFIELD_VAL(PWM_SELECT_INV, n)\n#define REG_CLK_PWM_DIV_SHIFT 5\n#define REG_CLK_PWM_DIV_MASK (0x1F << REG_CLK_PWM_DIV_SHIFT)\n#define REG_CLK_PWM_DIV(n) BITFIELD_VAL(REG_CLK_PWM_DIV, n)\n\n// 10B  PMU_REG_WDT_TIMER\n#define REG_WDT_TIMER_SHIFT 0\n#define REG_WDT_TIMER_MASK (0xFFFF << REG_WDT_TIMER_SHIFT)\n#define REG_WDT_TIMER(n) BITFIELD_VAL(REG_WDT_TIMER, n)\n\n// 10C  PMU_REG_WDT_CFG\n#define REG_HW_RESET_TIME_SHIFT 10\n#define REG_HW_RESET_TIME_MASK (0x3F << REG_HW_RESET_TIME_SHIFT)\n#define REG_HW_RESET_TIME(n) BITFIELD_VAL(REG_HW_RESET_TIME, n)\n#define REG_HW_RESET_EN (1 << 9)\n#define REG_WDT_RESET_EN (1 << 8)\n#define REG_WDT_EN (1 << 7)\n#define BG_R_TEMP_SHIFT 4\n#define BG_R_TEMP_MASK (0x7 << BG_R_TEMP_SHIFT)\n#define BG_R_TEMP(n) BITFIELD_VAL(BG_R_TEMP, n)\n#define BG_TRIM_VBG_SHIFT 1\n#define BG_TRIM_VBG_MASK (0x7 << BG_TRIM_VBG_SHIFT)\n#define BG_TRIM_VBG(n) BITFIELD_VAL(BG_TRIM_VBG, n)\n#define SAR_PU_OVP (1 << 0)\n\n// 80   PMU_REG_RF_80\n#define RF_80_PAGE_IDX (1 << 15)\n#define RF_80_S_DONE_SHIFT 4\n#define RF_80_S_DONE_MASK (0x7FF << RF_80_S_DONE_SHIFT)\n#define RF_80_S_DONE(n) BITFIELD_VAL(RF_80_S_DONE, n)\n#define RF_80_REVID_SHIFT 0\n#define RF_80_REVID_MASK (0xF << RF_80_REVID_SHIFT)\n#define RF_80_REVID(n) BITFIELD_VAL(RF_80_REVID, n)\n\n// BD   PMU_REG_RF_BD\n#define REG_BBPLL_FREQ_34_32_SHIFT 0\n#define REG_BBPLL_FREQ_34_32_MASK (0x7 << REG_BBPLL_FREQ_34_32_SHIFT)\n#define REG_BBPLL_FREQ_34_32(n) BITFIELD_VAL(REG_BBPLL_FREQ_34_32, n)\n#define REG_BBPLL_FREQ_EN (1 << 3)\n\nenum PMU_REG_T {\n  PMU_REG_METAL_ID = 0x00,\n  PMU_REG_POWER_KEY_CFG = 0x02,\n  PMU_REG_BIAS_CFG = 0x03,\n  PMU_REG_CHARGER_CFG = 0x05,\n  PMU_REG_ANA_CFG = 0x07,\n  PMU_REG_DIG_CFG = 0x08,\n  PMU_REG_IO_CFG = 0x09,\n  PMU_REG_MEM_CFG = 0x0A,\n  PMU_REG_GP_CFG = 0x0B,\n  PMU_REG_USB_CFG = 0x0C,\n  PMU_REG_BAT2DIG_CFG = 0x0D,\n  PMU_REG_HPPA_LDO_EN = 0x0E,\n  PMU_REG_HPPA2CODEC_CFG = 0x0F,\n  PMU_REG_CODEC_CFG = 0x10,\n  PMU_REG_DCDC_DIG_EN = 0x15,\n  PMU_REG_DCDC_ANA_CFG_16 = 0x16,\n  PMU_REG_DCDC_ANA_CFG_17 = 0x17,\n  PMU_REG_DCDC_ANA_CFG_18 = 0x18,\n  PMU_REG_DCDC_ANA_CFG_19 = 0x19,\n  PMU_REG_DCDC_HPPA_CFG_1A = 0x1A,\n  PMU_REG_DCDC_HPPA_CFG_1B = 0x1B,\n  PMU_REG_DCDC_HPPA_CFG_1C = 0x1C,\n  PMU_REG_DCDC_HPPA_CFG_1D = 0x1D,\n  PMU_REG_PWR_SEL = 0x21,\n  PMU_REG_INT_MASK = 0x26,\n  PMU_REG_INT_EN = 0x27,\n  PMU_REG_RTC_LOAD_LOW = 0x2D,\n  PMU_REG_RTC_LOAD_HIGH = 0x2E,\n  PMU_REG_RTC_MATCH1_LOW = 0x31,\n  PMU_REG_RTC_MATCH1_HIGH = 0x32,\n  PMU_REG_DCDC_DIG_CFG_33 = 0x33,\n  PMU_REG_DCDC_DIG_CFG_34 = 0x34,\n  PMU_REG_DCDC_DIG_CFG_35 = 0x35,\n  PMU_REG_DCDC_DIG_CFG_36 = 0x36,\n  PMU_REG_RTC_DIV_1HZ = 0x37,\n  PMU_REG_MIC_BIAS_E = 0x38,\n  PMU_REG_MIC_LDO_EN = 0x39,\n  PMU_REG_LED_CFG = 0x3A,\n  PMU_REG_MIC_BIAS_A = 0x3B,\n  PMU_REG_MIC_BIAS_B = 0x3C,\n  PMU_REG_MIC_BIAS_C = 0x3D,\n  PMU_REG_MIC_BIAS_D = 0x3E,\n  PMU_REG_EFUSE_CTRL = 0x3F,\n  PMU_REG_EFUSE_SEL = 0x40,\n  PMU_REG_DCDC1_OFFSET = 0x41,\n  PMU_REG_BUCK2ANA_CFG = 0x43,\n  PMU_REG_SLEEP_CFG = 0x44,\n  PMU_REG_DCDC_DIG_VOLT = 0x46,\n  PMU_REG_DCDC_ANA_VOLT = 0x47,\n  PMU_REG_DCDC_HPPA_VOLT = 0x48,\n  PMU_REG_DCDC4_VOLT = 0x49,\n  PMU_REG_DCDC_ANA_EN = 0x4A,\n  PMU_REG_DCDC_HPPA_EN = 0x4B,\n  PMU_REG_POWER_OFF = 0x4F,\n  PMU_REG_INT_CLR = 0x51,\n  PMU_REG_INT_STATUS = 0x52,\n  PMU_REG_INT_MSKED_STATUS = 0x53,\n  PMU_REG_RTC_VAL_LOW = 0x54,\n  PMU_REG_RTC_VAL_HIGH = 0x55,\n  PMU_REG_CHARGER_STATUS = 0x5E,\n\n  PMU_REG_DCDC_RAMP_EN = 0x101,\n\n  PMU_REG_PWM2_TOGGLE = 0x103,\n  PMU_REG_PWM3_TOGGLE = 0x104,\n  PMU_REG_PWM2_ST1 = 0x105,\n  PMU_REG_PWM3_ST1 = 0x106,\n  PMU_REG_SUBCNT_DATA = 0x107,\n  PMU_REG_PWM_BR_EN = 0x108,\n  PMU_REG_PWM_EN = 0x109,\n\n  PMU_REG_WDT_TIMER = 0x10B,\n  PMU_REG_WDT_CFG = 0x10C,\n\n  PMU_REG_MODULE_START = PMU_REG_ANA_CFG,\n  PMU_REG_EFUSE_VAL_START = 0x148,\n\n  PMU_REG_ANA_60 = 0x60,\n  PMU_REG_ANA_77 = 0x77,\n\n  PMU_REG_RF_80 = 0x80,\n  PMU_REG_RF_B5 = 0xB5,\n  PMU_REG_RF_BB = 0xBB,\n  PMU_REG_RF_BC = 0xBC,\n  PMU_REG_RF_BD = 0xBD,\n};\n\nenum PMU_VCORE_REQ_T {\n  PMU_VCORE_FLASH_WRITE_ENABLED = (1 << 0),\n  PMU_VCORE_FLASH_FREQ_HIGH = (1 << 1),\n  PMU_VCORE_PSRAM_FREQ_HIGH = (1 << 2),\n  PMU_VCORE_USB_HS_ENABLED = (1 << 3),\n  PMU_VCORE_RS_FREQ_HIGH = (1 << 4),\n  PMU_VCORE_SYS_FREQ_MEDIUM = (1 << 5),\n  PMU_VCORE_SYS_FREQ_HIGH = (1 << 6),\n};\n\nenum PMU_VUSB_REQ_T {\n  PMU_VUSB_REQ_INIT = (1 << 0),\n  PMU_VUSB_REQ_USB = (1 << 1),\n  PMU_VUSB_REQ_LBRT = (1 << 2),\n};\n\nunion BOOT_SETTINGS_T {\n  struct {\n    unsigned short usb_dld_dis : 1;\n    unsigned short uart_dld_en : 1;\n    unsigned short uart_trace_en : 1;\n    unsigned short pll_dis : 1;\n    unsigned short uart_baud_div2 : 1;\n    unsigned short sec_freq_div2 : 1;\n    unsigned short crystal_freq : 2;\n    unsigned short reserved : 4;\n    unsigned short chksum : 4;\n  };\n  unsigned short reg;\n};\n\nenum PMU_MODUAL_T {\n  PMU_ANA,\n  PMU_DIG,\n  PMU_IO,\n  PMU_MEM,\n  PMU_GP,\n  PMU_USB,\n  PMU_BAT2DIG,\n  PMU_HPPA2CODEC,\n  PMU_CODEC,\n  PMU_BUCK2ANA,\n};\n\nstruct PMU_MODULE_CFG_T {\n  unsigned short pu_dr;\n  unsigned short pu;\n  unsigned short lp_en_dr;\n  unsigned short lp_en;\n  unsigned short pu_dsleep;\n  unsigned short vbit_dsleep_mask;\n  unsigned short vbit_dsleep_shift;\n  unsigned short vbit_normal_mask;\n  unsigned short vbit_normal_shift;\n};\n\n#define PMU_MOD_CFG_VAL(m)                                                     \\\n  {                                                                            \\\n    REG_PU_LDO_V##m##_DR, REG_PU_LDO_V##m##_REG, LP_EN_V##m##_LDO_DR,          \\\n        LP_EN_V##m##_LDO_REG, REG_PU_LDO_V##m##_DSLEEP,                        \\\n        LDO_V##m##_VBIT_DSLEEP_MASK, LDO_V##m##_VBIT_DSLEEP_SHIFT,             \\\n        LDO_V##m##_VBIT_NORMAL_MASK, LDO_V##m##_VBIT_NORMAL_SHIFT              \\\n  }\n\nstatic const struct PMU_MODULE_CFG_T pmu_module_cfg[] = {\n    PMU_MOD_CFG_VAL(ANA),       PMU_MOD_CFG_VAL(CORE),\n    PMU_MOD_CFG_VAL(IO),        PMU_MOD_CFG_VAL(MEM),\n    PMU_MOD_CFG_VAL(GP),        PMU_MOD_CFG_VAL(USB),\n    PMU_MOD_CFG_VAL(BAT2VCORE), PMU_MOD_CFG_VAL(HPPA2VCODEC),\n    PMU_MOD_CFG_VAL(CODEC),     PMU_MOD_CFG_VAL(BUCK2ANA),\n};\n\n#ifdef ANC_PROD_TEST\n#define OPT_TYPE\n#else\n#define OPT_TYPE const\n#endif\n\nstatic OPT_TYPE bool vcodec_off =\n#ifdef VCODEC_OFF\n    true;\n#else\n    false;\n#endif\nstatic OPT_TYPE uint8_t ana_act_dcdc =\n#ifdef VANA_1P2V\n    PMU_DCDC_ANA_1_2V;\n#elif defined(VANA_1P35V)\n    PMU_DCDC_ANA_1_35V;\n#elif defined(VANA_1P4V)\n        PMU_DCDC_ANA_1_4V;\n#elif defined(VANA_1P5V)\n        PMU_DCDC_ANA_1_5V;\n#elif defined(VANA_1P6V)\n        PMU_DCDC_ANA_1_6V;\n#else\n        PMU_DCDC_ANA_1_3V;\n#endif\nstatic OPT_TYPE POSSIBLY_UNUSED uint16_t vcodec_mv =\n    (uint16_t)(VCODEC_VOLT * 1000);\nstatic OPT_TYPE POSSIBLY_UNUSED uint16_t vhppa_mv =\n    (uint16_t)(VHPPA_VOLT * 1000);\n\nstatic enum HAL_CHIP_METAL_ID_T BOOT_BSS_LOC pmu_metal_id;\n\nstatic enum PMU_POWER_MODE_T BOOT_BSS_LOC pmu_power_mode = PMU_POWER_MODE_NONE;\n\nstatic enum PMU_VCORE_REQ_T BOOT_BSS_LOC pmu_vcore_req;\n\n// Move all the data/bss invovled in pmu_open() to .sram_data/.sram_bss,\n// so that pmu_open() can be called at the end of BootInit(),\n// for data/bss is initialized after BootInit().\nstatic enum PMU_VUSB_REQ_T SRAM_BSS_DEF(pmu_vusb_req);\n\nstatic uint16_t SRAM_BSS_DEF(dcdc_ramp_map);\n\nstatic PMU_CHARGER_IRQ_HANDLER_T charger_irq_handler;\n\nstatic PMU_IRQ_UNIFIED_HANDLER_T pmu_irq_hdlrs[PMU_IRQ_TYPE_QTY];\n\nstatic uint8_t SRAM_BSS_DEF(vio_risereq_map);\nSTATIC_ASSERT(sizeof(vio_risereq_map) * 8 >= PMU_VIORISE_REQ_USER_QTY,\n              \"vio_risereq_map size too small\");\n\nstatic uint8_t SRAM_DATA_DEF(vio_act_normal) = IO_VOLT_ACTIVE_NORMAL;\nstatic uint8_t SRAM_DATA_DEF(vio_act_rise) = IO_VOLT_ACTIVE_RISE;\nstatic uint8_t SRAM_DATA_DEF(vio_lp) = IO_VOLT_SLEEP;\n\nstatic const uint8_t ana_lp_dcdc = PMU_DCDC_ANA_SLEEP_1_3V;\n\n// BT might have connection drop issues if dig_lp is lower than 0.8V\nstatic const uint8_t dig_lp_ldo = PMU_VDIG_0_8V;\nstatic const uint8_t dig_lp_dcdc = PMU_DCDC_DIG_0_8V;\n\nstatic uint8_t BOOT_DATA_DEF(audpll_codec_div) = 16;\n\n#ifdef HIGH_VCORE\nstatic const bool high_vcore = true;\n#else\nstatic bool BOOT_BSS_DEF(high_vcore);\n#endif\n\nstatic uint16_t wdt_timer;\n\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\nstatic const uint16_t high_perf_freq_mhz =\n#if defined(MTEST_ENABLED) && defined(MTEST_CLK_MHZ)\n    MTEST_CLK_MHZ;\n#else\n    300;\n#endif\nstatic bool high_perf_on;\n#endif\n\nvoid pmu_wdt_save_context(void);\nvoid pmu_wdt_restore_context(void);\nvoid pmu_charger_save_context(void);\nvoid pmu_charger_shutdown_config(void);\n\n#if defined(PMU_INIT) || (!defined(PROGRAMMER))\nstatic void pmu_hppa_dcdc_to_ldo(void);\n#endif\n\n#if defined(_AUTO_TEST_)\nstatic bool at_skip_shutdown = false;\n\nvoid pmu_at_skip_shutdown(bool enable) { at_skip_shutdown = enable; }\n#endif\n\n#ifdef RTC_ENABLE\nstruct PMU_RTC_CTX_T {\n  bool enabled;\n  bool alarm_set;\n  uint32_t alarm_val;\n};\n\nstatic struct PMU_RTC_CTX_T BOOT_BSS_LOC rtc_ctx;\n\nstatic PMU_RTC_IRQ_HANDLER_T rtc_irq_handler;\n\nstatic void BOOT_TEXT_SRAM_LOC pmu_rtc_save_context(void) {\n  if (pmu_rtc_enabled()) {\n    rtc_ctx.enabled = true;\n    if (pmu_rtc_alarm_status_set()) {\n      rtc_ctx.alarm_set = true;\n      rtc_ctx.alarm_val = pmu_rtc_get_alarm();\n    }\n  } else {\n    rtc_ctx.enabled = false;\n  }\n}\n\nstatic void pmu_rtc_restore_context(void) {\n  uint32_t rtc_val;\n\n  if (rtc_ctx.enabled) {\n    pmu_rtc_enable();\n    if (rtc_ctx.alarm_set) {\n      rtc_val = pmu_rtc_get();\n      if (rtc_val - rtc_ctx.alarm_val <= 1 || rtc_ctx.alarm_val - rtc_val < 5) {\n        rtc_ctx.alarm_val = rtc_val + 5;\n      }\n      pmu_rtc_set_alarm(rtc_ctx.alarm_val);\n    }\n  }\n}\n#endif\n\n#ifdef PMU_DCDC_CALIB\nunion VOLT_COMP_T {\n  struct VOLT_COMP_FIELD_T {\n    uint16_t dcdc1_v : 5; // bit[4:0]: 0 ~ 31\n    uint16_t dcdc1_f : 1; // bit[5]  : 1: negative, 0: positive;\n    uint16_t dcdc2_v : 4; // bit[9:6]: 0 ~ 15\n    uint16_t dcdc2_f : 1; // bit[10] :\n    uint16_t dcdc3_v : 4; // bit[14:11]: 0 ~ 15\n    uint16_t dcdc3_f : 1; // bit[15]\n  } f;\n  uint16_t v;\n};\n\nstatic int8_t pmu_dcdc_dig_comp = 0;\nstatic int8_t pmu_dcdc_ana_comp = 0;\nstatic int8_t pmu_dcdc_hppa_comp = 0;\n\nstatic POSSIBLY_UNUSED void pmu_get_dcdc_calib_value(void) {\n  union VOLT_COMP_T cv;\n\n  pmu_get_efuse(PMU_EFUSE_PAGE_RESERVED_7, &cv.v);\n  if (cv.f.dcdc1_f) { // digital\n    pmu_dcdc_dig_comp = -(int8_t)(cv.f.dcdc1_v);\n  } else {\n    pmu_dcdc_dig_comp = (int8_t)(cv.f.dcdc1_v);\n  }\n  if (cv.f.dcdc2_f) { // ana\n    pmu_dcdc_ana_comp = -(int8_t)(cv.f.dcdc2_v);\n  } else {\n    pmu_dcdc_ana_comp = (int8_t)(cv.f.dcdc2_v);\n  }\n  if (cv.f.dcdc3_f) { // hppa\n    pmu_dcdc_hppa_comp = -(int8_t)(cv.f.dcdc3_v);\n  } else {\n    pmu_dcdc_hppa_comp = (int8_t)(cv.f.dcdc3_v);\n  }\n}\n\nstatic POSSIBLY_UNUSED unsigned short\npmu_reg_val_add(unsigned short val, int delta, unsigned short max) {\n  int result = val + delta;\n\n  if (result > max) {\n    result = max;\n  } else if (result < 0) {\n    result = 0;\n  }\n\n  return (unsigned short)result;\n}\n#endif\n\nstatic unsigned int NOINLINE BOOT_TEXT_SRAM_LOC\npmu_count_zeros(unsigned int val, unsigned int bits) {\n  int cnt = 0;\n  int i;\n\n  for (i = 0; i < bits; i++) {\n    if ((val & (1 << i)) == 0) {\n      cnt++;\n    }\n  }\n\n  return cnt;\n}\n\nstatic int BOOT_TEXT_FLASH_LOC pmu_read_efuse_block(unsigned int block) {\n  int ret;\n  unsigned short val;\n  uint32_t start;\n  uint32_t timeout = MS_TO_TICKS(50);\n\n  val = TSMC_EFUSE_PGENB | TSMC_EFUSE_CLK_EN;\n  ret = pmu_write(PMU_REG_EFUSE_CTRL, val);\n  if (ret) {\n    return ret;\n  }\n\n  val =\n      TSMC_EFUSE_STROBE_WIDTH(20) | REG_READ_STROBE_WIDTH(4) | EFUSE_SEL(block);\n  ret = pmu_write(PMU_REG_EFUSE_SEL, val);\n  if (ret) {\n    return ret;\n  }\n\n  ret = pmu_read(PMU_REG_POWER_OFF, &val);\n  if (ret) {\n    return ret;\n  }\n  val = SET_BITFIELD(val, EFUSE_READ_TRIG, EFUSE_READ_TRIG_WORD);\n  ret = pmu_write(PMU_REG_POWER_OFF, val);\n  if (ret) {\n    return ret;\n  }\n\n  hal_sys_timer_delay(US_TO_TICKS(500));\n\n  start = hal_sys_timer_get();\n  do {\n    ret = pmu_read(PMU_REG_POWER_OFF, &val);\n    if (ret) {\n      return ret;\n    }\n    if (hal_sys_timer_get() - start > timeout) {\n      return -2;\n    }\n  } while ((val & (EFUSE_READ_DONE | EFUSE_READ_BUSY)) != EFUSE_READ_DONE);\n\n  val = TSMC_EFUSE_PGENB;\n  ret = pmu_write(PMU_REG_EFUSE_CTRL, val);\n  if (ret) {\n    return ret;\n  }\n\n  return 0;\n}\n\nvoid BOOT_TEXT_FLASH_LOC bbpll_freq_pll_config(uint32_t freq) {\n  int ret;\n  uint64_t PLL_cfg_val;\n  uint16_t v[3];\n  uint16_t val;\n  uint32_t crystal = hal_cmu_get_crystal_freq();\n\n  PLL_cfg_val = ((uint64_t)(1 << 28) * (freq / 2) + crystal / 2) / crystal;\n  v[0] = PLL_cfg_val & 0xFFFF;\n  v[1] = (PLL_cfg_val >> 16) & 0xFFFF;\n  v[2] = (PLL_cfg_val >> 32) & 0xFFFF;\n\n  ret = pmu_write(PMU_REG_RF_BB, v[0]);\n  if (ret) {\n    return;\n  }\n\n  ret = pmu_write(PMU_REG_RF_BC, v[1]);\n  if (ret) {\n    return;\n  }\n\n  ret = pmu_read(PMU_REG_RF_BD, &val);\n  if (ret) {\n    return;\n  }\n  val = SET_BITFIELD(val, REG_BBPLL_FREQ_34_32, v[2]) | REG_BBPLL_FREQ_EN;\n  ret = pmu_write(PMU_REG_RF_BD, val);\n  if (ret) {\n    return;\n  }\n\n  // Delay at least for 7us\n  hal_sys_timer_delay(US_TO_TICKS(100));\n}\n\nuint32_t BOOT_TEXT_FLASH_LOC read_hw_metal_id(void) {\n  int ret;\n  uint16_t val;\n  uint32_t metal_id;\n  int i;\n  union BOOT_SETTINGS_T boot;\n\n#ifdef RTC_ENABLE\n  // RTC will be restored in pmu_open()\n  pmu_rtc_save_context();\n#endif\n\n  pmu_wdt_save_context();\n\n  pmu_charger_save_context();\n\n  // Reset PMU (to recover from a possible insane state, e.g., ESD reset)\n  pmu_write(PMU_REG_METAL_ID, 0xCAFE);\n  pmu_write(PMU_REG_METAL_ID, 0x5FEE);\n  hal_sys_timer_delay(US_TO_TICKS(500));\n\n#if defined(PMU_FULL_INIT) || (!defined(PROGRAMMER))\n  // Reset RF\n  pmu_write(PMU_REG_RF_80, 0xCAFE);\n  pmu_write(PMU_REG_RF_80, 0x5FEE);\n  hal_sys_timer_delay(US_TO_TICKS(500));\n\n  // Reset ANA\n  pmu_write(PMU_REG_ANA_60, 0xCAFE);\n  pmu_write(PMU_REG_ANA_60, 0x5FEE);\n  hal_sys_timer_delay(US_TO_TICKS(500));\n#endif\n\n#ifdef __WATCHER_DOG_RESET__\n  pmu_wdt_restore_context();\n#endif\n\n#ifndef EFUSE_BLOCK_NUM\n#define EFUSE_BLOCK_NUM 6\n#endif\n\n  for (i = 0; i < EFUSE_BLOCK_NUM; i++) {\n    ret = pmu_read_efuse_block(i);\n    if (ret) {\n      SAFE_PROGRAM_STOP();\n    }\n  }\n\n  ret = pmu_get_efuse(PMU_EFUSE_PAGE_BOOT, &boot.reg);\n  if (ret) {\n    boot.reg = 0;\n  } else {\n    if (pmu_count_zeros(boot.reg, 12) != boot.chksum) {\n      boot.reg = 0;\n    }\n  }\n  hal_cmu_set_crystal_freq_index(boot.crystal_freq);\n  // Update ISPI cfg\n  ret = hal_analogif_open();\n  if (ret) {\n    SAFE_PROGRAM_STOP();\n  }\n\n#if !defined(PROGRAMMER) && !defined(MCU_HIGH_PERFORMANCE_MODE)\n  if (hal_cmu_get_crystal_freq() != hal_cmu_get_default_crystal_freq()) {\n    // Update bbpll freq after resetting RF and getting crystal freq\n    bbpll_freq_pll_config(384000000);\n  }\n#endif\n\n#if 0\n#ifndef HIGH_VCORE\n    pmu_get_efuse(PMU_EFUSE_PAGE_SW_CFG, &val);\n    if ((val & (3 << 13)) == (3 << 13)) {\n        high_vcore = true;\n    }\n#endif\n#endif\n\n  // enhance xtal drv\n  pmu_write(0x9d, 0x886c);\n  // Enable 26M doubler (52M)\n  pmu_write(0xB5, 0x8000);\n#ifdef ANA_26M_X4_ENABLE\n  pmu_write(0xBF, 0x0400);\n#endif\n\n  // Power up bbpll and audpll clk buf\n  // Clk buf bits:\n  // 0-rfpll 1-bt_dac 2-codec_resample&audpll_prechr 3-bbpll 4-audpll 5-usbhspll\n  // 6-lbrt 7-dig\n  pmu_read(0xC4, &val);\n  val &= ~0xFF;\n  val |= (1 << 2) | (1 << 3) | (1 << 4) | (1 << 7);\n#if defined(USB_HIGH_SPEED) || defined(USB_USE_USBPLL)\n  val |= (1 << 5);\n#endif\n  pmu_write(0xC4, val);\n\n  // Cfg bbpll\n  pmu_write(0x9F, 0xC22F);\n  pmu_write(0xA0, 0x2788);\n\n  // Cfg audpll\n  pmu_write(0x79, 0x0011);\n  pmu_write(0x77, 0x71B1);\n\n  // Set audpll to 24.576M*17\n  pmu_write(0x7C, 0x4F16);\n  pmu_write(0x7B, 0x011A);\n  pmu_write(0x7A, 0x2008);\n\n  // Clear reg_bt_tst_buf_sel_in/out to avoid impacting P00-P03 and P30-P33 pins\n  pmu_write(0xA2, 0x01C2);\n\n  // Enable SWD debug mode\n  pmu_read(PMU_REG_SLEEP_CFG, &val);\n  val = SET_BITFIELD(val, PMIC_TMODE_1300, 2);\n  pmu_write(PMU_REG_SLEEP_CFG, val);\n\n  pmu_read(PMU_REG_METAL_ID, &val);\n  pmu_metal_id = GET_BITFIELD(val, PMU_METAL_ID);\n\n  metal_id = hal_cmu_get_aon_revision_id();\n\n  if (metal_id == HAL_CHIP_METAL_ID_1) {\n    uint32_t data;\n\n    hal_psc_bt_enable();\n    hal_cmu_bt_clock_enable();\n    hal_cmu_bt_reset_clear();\n    data = *(volatile uint32_t *)0xA0000004;\n    hal_cmu_bt_reset_set();\n    hal_cmu_bt_clock_disable();\n    hal_psc_bt_disable();\n\n    if (data == 0xA0007471) {\n      metal_id = HAL_CHIP_METAL_ID_2;\n    }\n  }\n\n  // Init pll dividers\n  pmu_read(PMU_REG_ANA_77, &val);\n  val = SET_BITFIELD(val, REG_AUDPLL_DIVN, audpll_codec_div);\n  pmu_write(PMU_REG_ANA_77, val);\n\n  return metal_id;\n}\n\nvoid BOOT_TEXT_SRAM_LOC pmu_pll_div_reset_set(enum HAL_CMU_PLL_T pll) {\n  uint32_t lock;\n  uint16_t val;\n\n  lock = int_lock();\n  if (pll == HAL_CMU_PLL_AUD) {\n    pmu_read(PMU_REG_ANA_77, &val);\n    val |= REG_AUDPLL_DIVN_MASK | REG_AUDPLL_DIVN_RST;\n    pmu_write(PMU_REG_ANA_77, val);\n  } else if (pll == HAL_CMU_PLL_USB) {\n    // In fact bbpll\n#ifdef AUDIO_USE_BBPLL\n    // 0xD2, bit13 (reset)\n    // 0xF5, bit[4:0] (div)\n#endif\n  } else if (pll == HAL_CMU_PLL_QTY) {\n    // In fact usbhspll\n  }\n  int_unlock(lock);\n}\n\nvoid BOOT_TEXT_SRAM_LOC pmu_pll_div_reset_clear(enum HAL_CMU_PLL_T pll) {\n  uint32_t lock;\n  uint16_t val;\n\n  lock = int_lock();\n  if (pll == HAL_CMU_PLL_AUD) {\n    pmu_read(PMU_REG_ANA_77, &val);\n    val &= ~REG_AUDPLL_DIVN_RST;\n    pmu_write(PMU_REG_ANA_77, val);\n    val = SET_BITFIELD(val, REG_AUDPLL_DIVN, audpll_codec_div);\n    pmu_write(PMU_REG_ANA_77, val);\n  } else if (pll == HAL_CMU_PLL_USB) {\n    // In fact bbpll\n#ifdef AUDIO_USE_BBPLL\n#endif\n  } else if (pll == HAL_CMU_PLL_QTY) {\n    // In fact usbhspll\n  }\n  int_unlock(lock);\n}\n\nvoid pmu_pll_div_set(enum HAL_CMU_PLL_T pll, enum PMU_PLL_DIV_TYPE_T type,\n                     uint32_t div) {\n  uint32_t lock;\n  uint16_t val;\n\n  if (type != PMU_PLL_DIV_CODEC) {\n    return;\n  }\n\n  lock = int_lock();\n  if (pll == HAL_CMU_PLL_AUD) {\n    if (div != audpll_codec_div) {\n      audpll_codec_div = div;\n      pmu_read(PMU_REG_ANA_77, &val);\n      val |= REG_AUDPLL_DIVN_MASK;\n      pmu_write(PMU_REG_ANA_77, val);\n      if (div != (REG_AUDPLL_DIVN_MASK >> REG_AUDPLL_DIVN_SHIFT)) {\n        val = SET_BITFIELD(val, REG_AUDPLL_DIVN, audpll_codec_div);\n        pmu_write(PMU_REG_ANA_77, val);\n      }\n    }\n  } else if (pll == HAL_CMU_PLL_USB) {\n    // In fact bbpll\n#ifdef AUDIO_USE_BBPLL\n#endif\n  } else if (pll == HAL_CMU_PLL_QTY) {\n    // In fact usbhspll\n  }\n  int_unlock(lock);\n}\n\n#if defined(USE_CYBERON)\nstatic uint32_t BOOT_BSS_LOC cyb_hack_efuse_check = 0;\nvoid cyb_efuse_check_enable(int enabled) { cyb_hack_efuse_check = enabled; }\n\nint cyb_efuse_check_status(void) { return cyb_hack_efuse_check; }\n\n#if 1\nint BOOT_TEXT_SRAM_LOC Cyb_pmu_get_efuse(enum PMU_EFUSE_PAGE_T page,\n                                         unsigned short *efuse) {\n  //    PMU_DEBUG_TRACE(2,\"page %x, efuse %x\", page, efuse);\n  if (page == 0XE) {\n    *efuse = 0x1B9C;\n  }\n  if (page == 0xF) {\n    *efuse = 0x098B;\n  }\n\n  return 0;\n}\n#endif\n\n#endif\n\nint BOOT_TEXT_SRAM_LOC pmu_get_efuse(enum PMU_EFUSE_PAGE_T page,\n                                     unsigned short *efuse) {\n  int ret;\n\n// #if defined(USE_CYBERON)\n#if 0\n    if (cyb_efuse_check_status()) {\n        PMU_DEBUG_TRACE(2,\"page %x, efuse %x\", page, efuse);\n        if((int)page==0xE){\n            *efuse=0x1B9C;\n            return 0;\n        }\n        if((int)page==0xF){\n            *efuse = 0x098B;\n            return 0;\n        }\n    }\n#endif\n\n  ret = pmu_read(PMU_REG_EFUSE_VAL_START + page, efuse);\n\n  return ret;\n}\n\nint pmu_get_security_value(union SECURITY_VALUE_T *val) {\n  int ret;\n\n  ret = pmu_get_efuse(PMU_EFUSE_PAGE_SECURITY, &val->reg);\n  if (ret) {\n    // Error\n    goto _no_security;\n  }\n\n  if (!val->security_en) {\n    // OK\n    goto _no_security;\n  }\n  ret = 1;\n  if (pmu_count_zeros(val->key_id, 3) != val->key_chksum) {\n    // Error\n    goto _no_security;\n  }\n  if (pmu_count_zeros(val->vendor_id, 6) != val->vendor_chksum) {\n    // Error\n    goto _no_security;\n  }\n  if ((pmu_count_zeros(val->reg, 15) & 1) != val->chksum) {\n    // Error\n    goto _no_security;\n  }\n\n  // OK\n  return 0;\n\n_no_security:\n  val->reg = 0;\n\n  return ret;\n}\n\nstatic void pmu_sys_ctrl(bool shutdown) {\n  uint16_t val;\n  uint32_t lock = int_lock();\n\n  PMU_INFO_TRACE_IMM(0, \"Start pmu %s\", shutdown ? \"shutdown\" : \"reboot\");\n\n#if defined(PMU_INIT) || (!defined(PROGRAMMER))\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n  // Default vcore might not be high enough to support high performance mode\n  pmu_high_performance_mode_enable(false);\n  hal_cmu_sys_set_freq(HAL_CMU_FREQ_26M);\n#endif\n  pmu_hppa_dcdc_to_ldo();\n  pmu_mode_change(PMU_POWER_MODE_LDO);\n  hal_sys_timer_delay(MS_TO_TICKS(1));\n#endif\n\n#ifdef RTC_ENABLE\n  pmu_rtc_save_context();\n#endif\n\n  // Reset PMU\n  pmu_write(PMU_REG_METAL_ID, 0xCAFE);\n  pmu_write(PMU_REG_METAL_ID, 0x5FEE);\n  hal_sys_timer_delay(4);\n\n#ifdef RTC_ENABLE\n  pmu_rtc_restore_context();\n#endif\n\n  if (shutdown) {\n#if defined(_AUTO_TEST_)\n    if (at_skip_shutdown) {\n      hal_cmu_sys_reboot();\n      return;\n    }\n#endif\n\n#if defined(PMU_INIT) || (!defined(PROGRAMMER))\n    pmu_wdt_config(3 * 1000, 3 * 1000);\n    pmu_wdt_start();\n    pmu_charger_shutdown_config();\n#endif\n\n    // Power off\n    pmu_read(PMU_REG_POWER_OFF, &val);\n    val |= SOFT_POWER_OFF;\n    for (int i = 0; i < 100; i++) {\n      pmu_write(PMU_REG_POWER_OFF, val);\n      hal_sys_timer_delay(MS_TO_TICKS(5));\n    }\n\n    hal_sys_timer_delay(MS_TO_TICKS(50));\n\n    // can't reach here\n    PMU_INFO_TRACE_IMM(0, \"\\nError: pmu shutdown failed!\\n\");\n    hal_sys_timer_delay(MS_TO_TICKS(5));\n  } else {\n#if defined(PMU_FULL_INIT) || (!defined(PROGRAMMER))\n    // CAUTION:\n    // 1) Never reset RF because system or flash might be using X2/X4, which are\n    // off by default 2) Never reset RF/ANA because system or flash might be\n    // using PLL, and the reset might cause clock glitch\n    // TODO:\n    // Restore BBPLL settings in RF\n#endif\n  }\n\n  hal_cmu_sys_reboot();\n\n  int_unlock(lock);\n}\n\nvoid pmu_shutdown(void) { pmu_sys_ctrl(true); }\n\nvoid pmu_reboot(void) { pmu_sys_ctrl(false); }\n\nstatic inline uint16_t pmu_get_module_addr(enum PMU_MODUAL_T module) {\n  if (module == PMU_HPPA2CODEC || module == PMU_CODEC) {\n    return PMU_REG_MODULE_START + module + 1;\n  } else if (module == PMU_BUCK2ANA) {\n    return PMU_REG_BUCK2ANA_CFG;\n  } else {\n    return PMU_REG_MODULE_START + module;\n  }\n}\n\nvoid pmu_module_config(enum PMU_MODUAL_T module, unsigned short is_manual,\n                       unsigned short ldo_on, unsigned short lp_mode,\n                       unsigned short dpmode) {\n  unsigned short val;\n  unsigned char module_address;\n  const struct PMU_MODULE_CFG_T *module_cfg_p = &pmu_module_cfg[module];\n\n  module_address = pmu_get_module_addr(module);\n\n  if (module == PMU_ANA) {\n    pmu_read(PMU_REG_BIAS_CFG, &val);\n    if (is_manual) {\n      val |= module_cfg_p->pu_dr;\n    } else {\n      val &= ~module_cfg_p->pu_dr;\n    }\n\n    if (ldo_on) {\n      val |= module_cfg_p->pu;\n    } else {\n      val &= ~module_cfg_p->pu;\n    }\n    pmu_write(PMU_REG_BIAS_CFG, val);\n  } else if (module == PMU_DIG) {\n    pmu_read(PMU_REG_DCDC_DIG_EN, &val);\n    if (is_manual) {\n      val |= module_cfg_p->pu_dr;\n    } else {\n      val &= ~module_cfg_p->pu_dr;\n    }\n\n    if (ldo_on) {\n      val |= module_cfg_p->pu;\n    } else {\n      val &= ~module_cfg_p->pu;\n    }\n    pmu_write(PMU_REG_DCDC_DIG_EN, val);\n  } else if (module == PMU_HPPA2CODEC) {\n    pmu_read(PMU_REG_SLEEP_CFG, &val);\n    if (dpmode) {\n      val |= module_cfg_p->pu_dsleep;\n    } else {\n      val &= ~module_cfg_p->pu_dsleep;\n    }\n    pmu_write(PMU_REG_SLEEP_CFG, val);\n  } else if (module == PMU_CODEC) {\n    pmu_read(PMU_REG_HPPA2CODEC_CFG, &val);\n    if (dpmode) {\n      val |= module_cfg_p->pu_dsleep;\n    } else {\n      val &= ~module_cfg_p->pu_dsleep;\n    }\n    pmu_write(PMU_REG_HPPA2CODEC_CFG, val);\n  }\n\n  pmu_read(module_address, &val);\n\n  if (module != PMU_ANA && module != PMU_DIG) {\n    if (is_manual) {\n      val |= module_cfg_p->pu_dr;\n    } else {\n      val &= ~module_cfg_p->pu_dr;\n    }\n\n    if (ldo_on) {\n      val |= module_cfg_p->pu;\n    } else {\n      val &= ~module_cfg_p->pu;\n    }\n  }\n\n  if (lp_mode) {\n    val &= ~module_cfg_p->lp_en_dr;\n  } else {\n    val = (val & ~module_cfg_p->lp_en) | module_cfg_p->lp_en_dr;\n  }\n\n  if (module != PMU_HPPA2CODEC && module != PMU_CODEC) {\n    if (dpmode) {\n      val |= module_cfg_p->pu_dsleep;\n    } else {\n      val &= ~module_cfg_p->pu_dsleep;\n    }\n  }\n\n  pmu_write(module_address, val);\n}\n\nvoid pmu_module_set_volt(unsigned char module, unsigned short sleep_v,\n                         unsigned short normal_v) {\n  unsigned short val;\n  unsigned char module_address;\n  const struct PMU_MODULE_CFG_T *module_cfg_p = &pmu_module_cfg[module];\n\n  module_address = pmu_get_module_addr(module);\n\n  pmu_read(module_address, &val);\n  val &= ~module_cfg_p->vbit_normal_mask;\n  val |= (normal_v << module_cfg_p->vbit_normal_shift) &\n         module_cfg_p->vbit_normal_mask;\n  val &= ~module_cfg_p->vbit_dsleep_mask;\n  val |= (sleep_v << module_cfg_p->vbit_dsleep_shift) &\n         module_cfg_p->vbit_dsleep_mask;\n  pmu_write(module_address, val);\n}\n\nint pmu_module_get_volt(unsigned char module, unsigned short *sleep_vp,\n                        unsigned short *normal_vp) {\n  unsigned short val;\n  unsigned char module_address;\n  const struct PMU_MODULE_CFG_T *module_cfg_p = &pmu_module_cfg[module];\n\n  module_address = pmu_get_module_addr(module);\n\n  pmu_read(module_address, &val);\n  if (normal_vp) {\n    *normal_vp = (val & module_cfg_p->vbit_normal_mask) >>\n                 module_cfg_p->vbit_normal_shift;\n  }\n  if (sleep_vp) {\n    *sleep_vp = (val & module_cfg_p->vbit_dsleep_mask) >>\n                module_cfg_p->vbit_dsleep_shift;\n  }\n\n  return 0;\n}\n\nstatic void pmu_module_ramp_volt(unsigned char module, unsigned short sleep_v,\n                                 unsigned short normal_v) {\n  uint16_t old_normal_v;\n  uint16_t old_sleep_v;\n\n  pmu_module_get_volt(module, &old_sleep_v, &old_normal_v);\n\n  if (old_normal_v < normal_v) {\n    while (old_normal_v++ < normal_v) {\n      pmu_module_set_volt(module, sleep_v, old_normal_v);\n    }\n  } else if (old_normal_v != normal_v || old_sleep_v != sleep_v) {\n    pmu_module_set_volt(module, sleep_v, normal_v);\n  }\n}\n\nstatic void pmu_dcdc_ana_get_volt(unsigned short *normal_vp,\n                                  unsigned short *dsleep_vp) {\n  unsigned short val;\n\n  pmu_read(PMU_REG_DCDC_ANA_VOLT, &val);\n  if (normal_vp) {\n    *normal_vp = GET_BITFIELD(val, REG_DCDC2_VBIT_NORMAL);\n  }\n  if (dsleep_vp) {\n    *dsleep_vp = GET_BITFIELD(val, REG_DCDC2_VBIT_DSLEEP);\n  }\n\n#ifdef PMU_DCDC_CALIB\n  if (normal_vp) {\n    *normal_vp =\n        pmu_reg_val_add(*normal_vp, -pmu_dcdc_ana_comp, MAX_DCDC2_VBIT_VAL);\n  }\n  if (dsleep_vp) {\n    *dsleep_vp =\n        pmu_reg_val_add(*dsleep_vp, -pmu_dcdc_ana_comp, MAX_DCDC2_VBIT_VAL);\n  }\n#endif\n}\n\nstatic void pmu_dcdc_ana_set_volt(unsigned short normal_v,\n                                  unsigned short dsleep_v) {\n  unsigned short val;\n\n#ifdef PMU_DCDC_CALIB\n  normal_v = pmu_reg_val_add(normal_v, pmu_dcdc_ana_comp, MAX_DCDC2_VBIT_VAL);\n  dsleep_v = pmu_reg_val_add(dsleep_v, pmu_dcdc_ana_comp, MAX_DCDC2_VBIT_VAL);\n#endif\n\n  pmu_read(PMU_REG_DCDC_ANA_VOLT, &val);\n  val &= ~REG_DCDC2_VBIT_DSLEEP_MASK;\n  val &= ~REG_DCDC2_VBIT_NORMAL_MASK;\n  val |= REG_DCDC2_VBIT_DSLEEP(dsleep_v);\n  val |= REG_DCDC2_VBIT_NORMAL(normal_v);\n  pmu_write(PMU_REG_DCDC_ANA_VOLT, val);\n\n  if (normal_v > dsleep_v) {\n    dcdc_ramp_map |= REG_DCDC2_RAMP_EN;\n  } else {\n    dcdc_ramp_map &= ~REG_DCDC2_RAMP_EN;\n  }\n}\n\nstatic void pmu_ana_set_volt(int mode_change, enum PMU_POWER_MODE_T mode) {\n  uint16_t old_act_dcdc;\n  uint16_t old_lp_dcdc;\n  uint16_t new_act_dcdc;\n\n  if (mode == PMU_POWER_MODE_ANA_DCDC || mode == PMU_POWER_MODE_DIG_DCDC) {\n    pmu_dcdc_ana_get_volt(&old_act_dcdc, &old_lp_dcdc);\n    new_act_dcdc = ana_act_dcdc;\n    if (old_act_dcdc < new_act_dcdc) {\n      while (old_act_dcdc++ < new_act_dcdc) {\n        pmu_dcdc_ana_set_volt(old_act_dcdc, ana_lp_dcdc);\n      }\n      hal_sys_timer_delay_us(PMU_VANA_STABLE_TIME_US);\n    } else if (old_act_dcdc != new_act_dcdc || old_lp_dcdc != ana_lp_dcdc) {\n      pmu_dcdc_ana_set_volt(new_act_dcdc, ana_lp_dcdc);\n    }\n  }\n}\n\nstatic void pmu_dcdc_dig_get_volt(unsigned short *normal_vp,\n                                  unsigned short *dsleep_vp) {\n  unsigned short val;\n\n  pmu_read(PMU_REG_DCDC_DIG_VOLT, &val);\n  if (normal_vp) {\n    *normal_vp = GET_BITFIELD(val, REG_DCDC1_VBIT_NORMAL);\n  }\n  if (dsleep_vp) {\n    *dsleep_vp = GET_BITFIELD(val, REG_DCDC1_VBIT_DSLEEP);\n  }\n\n#ifdef PMU_DCDC_CALIB\n  if (normal_vp) {\n    *normal_vp =\n        pmu_reg_val_add(*normal_vp, -pmu_dcdc_dig_comp, MAX_DCDC1_VBIT_VAL);\n  }\n  if (dsleep_vp) {\n    *dsleep_vp =\n        pmu_reg_val_add(*dsleep_vp, -pmu_dcdc_dig_comp, MAX_DCDC1_VBIT_VAL);\n  }\n#endif\n}\n\nstatic void pmu_dcdc_dig_set_volt(unsigned short normal_v,\n                                  unsigned short dsleep_v) {\n  unsigned short val;\n\n#ifdef PMU_DCDC_CALIB\n  normal_v = pmu_reg_val_add(normal_v, pmu_dcdc_dig_comp, MAX_DCDC1_VBIT_VAL);\n  dsleep_v = pmu_reg_val_add(dsleep_v, pmu_dcdc_dig_comp, MAX_DCDC1_VBIT_VAL);\n#endif\n\n  pmu_read(PMU_REG_DCDC_DIG_VOLT, &val);\n  val &= ~REG_DCDC1_VBIT_DSLEEP_MASK;\n  val &= ~REG_DCDC1_VBIT_NORMAL_MASK;\n  val |= REG_DCDC1_VBIT_DSLEEP(dsleep_v);\n  val |= REG_DCDC1_VBIT_NORMAL(normal_v);\n  pmu_write(PMU_REG_DCDC_DIG_VOLT, val);\n\n  if (normal_v > dsleep_v) {\n    dcdc_ramp_map |= REG_DCDC1_RAMP_EN;\n  } else {\n    dcdc_ramp_map &= ~REG_DCDC1_RAMP_EN;\n  }\n}\n\nstatic void BOOT_TEXT_SRAM_LOC pmu_dig_get_target_volt(uint16_t *ldo,\n                                                       uint16_t *dcdc) {\n  uint16_t ldo_volt;\n  uint16_t dcdc_volt;\n\n  if (0) {\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n  } else if (pmu_vcore_req & (PMU_VCORE_SYS_FREQ_HIGH)) {\n    if (high_perf_freq_mhz <= 260) {\n      ldo_volt = PMU_VDIG_1_05V;\n      dcdc_volt = PMU_DCDC_DIG_1_05V;\n    } else if (high_perf_freq_mhz <= 300) {\n      ldo_volt = PMU_VDIG_1_1V;\n      dcdc_volt = PMU_DCDC_DIG_1_1V;\n    } else {\n      ldo_volt = PMU_VDIG_1_2V;\n      dcdc_volt = PMU_DCDC_DIG_1_1V;\n    }\n#endif\n  } else if (pmu_vcore_req &\n             (PMU_VCORE_USB_HS_ENABLED | PMU_VCORE_RS_FREQ_HIGH |\n              PMU_VCORE_SYS_FREQ_MEDIUM)) {\n    ldo_volt = PMU_VDIG_0_9V;\n    dcdc_volt = PMU_DCDC_DIG_0_9V;\n  } else if (pmu_vcore_req &\n             (PMU_VCORE_FLASH_FREQ_HIGH | PMU_VCORE_PSRAM_FREQ_HIGH |\n              PMU_VCORE_FLASH_WRITE_ENABLED)) {\n    ldo_volt = PMU_VDIG_0_8V;\n    dcdc_volt = PMU_DCDC_DIG_0_8V;\n  } else {\n    // Common cases\n    if (high_vcore) {\n      ldo_volt = PMU_VDIG_0_8V;\n      dcdc_volt = PMU_DCDC_DIG_0_8V;\n    } else {\n      ldo_volt = PMU_VDIG_0_75V;\n      dcdc_volt = PMU_DCDC_DIG_0_75V;\n    }\n#ifdef __SAVE_POWER_MODE__\n    ldo_volt = PMU_VDIG_0_75V;\n    dcdc_volt = PMU_DCDC_DIG_0_75V;\n#endif\n  }\n\n#if defined(PROGRAMMER) || defined(__BES_OTA_MODE__) && !defined(PMU_FULL_INIT)\n  // Try to keep the same vcore voltage as ROM (hardware default)\n  if (ldo_volt < PMU_VDIG_0_9V) {\n    ldo_volt = PMU_VDIG_0_9V;\n  }\n  if (dcdc_volt < PMU_DCDC_DIG_0_9V) {\n    dcdc_volt = PMU_DCDC_DIG_0_9V;\n  }\n#endif\n\n#if defined(MTEST_ENABLED) && defined(MTEST_VOLT)\n#ifdef DIG_DCDC_MODE\n  dcdc_volt = MTEST_VOLT;\n#else\n  ldo_volt = MTEST_VOLT;\n#endif\n#endif\n\n  if (ldo) {\n    *ldo = ldo_volt;\n  }\n  if (dcdc) {\n    *dcdc = dcdc_volt;\n  }\n}\n\nstatic void pmu_dig_set_volt(int mode_change, enum PMU_POWER_MODE_T mode) {\n  uint32_t lock;\n  uint16_t dcdc_volt, old_act_dcdc, old_lp_dcdc;\n  uint16_t ldo_volt, old_act_ldo, old_lp_ldo;\n  uint16_t ldo_real, dcdc_real;\n  bool volt_inc = false;\n\n  lock = int_lock();\n\n  if (mode == PMU_POWER_MODE_NONE) {\n    mode = pmu_power_mode;\n  }\n\n  pmu_dig_get_target_volt(&ldo_volt, &dcdc_volt);\n\n  pmu_module_get_volt(PMU_DIG, &old_lp_ldo, &old_act_ldo);\n  pmu_dcdc_dig_get_volt(&old_act_dcdc, &old_lp_dcdc);\n\n  if (mode_change) {\n    // Both DCDC and LDO might have been enabled\n    ldo_real = (old_act_ldo - PMU_VDIG_0_4V) / 0x2;\n    dcdc_real = (old_act_dcdc - PMU_DCDC_DIG_0_4V) / 0x10;\n    if (dcdc_real < ldo_real) {\n      dcdc_real = ldo_real;\n    }\n    ldo_real = PMU_VDIG_0_4V + dcdc_real * 0x2;\n    dcdc_real = PMU_DCDC_DIG_0_4V + dcdc_real * 0x10;\n\n    // Set the voltage to current real voltage\n    if (old_act_ldo < ldo_real) {\n      old_act_ldo = ldo_real;\n      old_lp_ldo = dig_lp_ldo;\n      pmu_module_set_volt(PMU_DIG, old_lp_ldo, old_act_ldo);\n    }\n    if (old_act_dcdc < dcdc_real) {\n      old_act_dcdc = dcdc_real;\n      old_lp_dcdc = dig_lp_dcdc;\n      pmu_dcdc_dig_set_volt(old_act_dcdc, old_lp_dcdc);\n    }\n  }\n\n  if (mode_change || mode == PMU_POWER_MODE_DIG_DCDC) {\n    if (old_act_dcdc < dcdc_volt) {\n      volt_inc = true;\n      while (old_act_dcdc++ < dcdc_volt) {\n        pmu_dcdc_dig_set_volt(old_act_dcdc, dig_lp_dcdc);\n      }\n    } else if (old_act_dcdc != dcdc_volt || old_lp_dcdc != dig_lp_dcdc) {\n      pmu_dcdc_dig_set_volt(dcdc_volt, dig_lp_dcdc);\n    }\n  }\n\n  if (mode_change || mode != PMU_POWER_MODE_DIG_DCDC) {\n    if (old_act_ldo < ldo_volt) {\n      volt_inc = true;\n    }\n    pmu_module_ramp_volt(PMU_DIG, dig_lp_ldo, ldo_volt);\n  }\n\n  if (mode_change == 0) {\n    // Update the voltage of the other mode\n    if (mode == PMU_POWER_MODE_DIG_DCDC) {\n      pmu_module_set_volt(PMU_DIG, dig_lp_ldo, ldo_volt);\n    } else {\n      pmu_dcdc_dig_set_volt(dcdc_volt, dig_lp_dcdc);\n    }\n  }\n\n  if (volt_inc) {\n    hal_sys_timer_delay_us(PMU_VCORE_STABLE_TIME_US);\n  }\n\n  int_unlock(lock);\n}\n\nstatic void pmu_ldo_mode_en(void) {\n  unsigned short val;\n\n  // Enable vana ldo\n  pmu_module_config(PMU_ANA, PMU_AUTO_MODE, PMU_LDO_ON, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_ON);\n  // Enable vcore ldo\n  pmu_module_config(PMU_DIG, PMU_AUTO_MODE, PMU_LDO_ON, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_ON);\n\n  pmu_ana_set_volt(1, PMU_POWER_MODE_LDO);\n  pmu_dig_set_volt(1, PMU_POWER_MODE_LDO);\n\n  hal_sys_timer_delay_us(PMU_LDO_PU_STABLE_TIME_US);\n\n  // Disable vcore dcdc\n  pmu_read(PMU_REG_DCDC_DIG_EN, &val);\n  val = (val & ~REG_PU_DCDC1) | REG_PU_DCDC1_DR;\n  pmu_write(PMU_REG_DCDC_DIG_EN, val);\n  // Disable vana dcdc\n  pmu_read(PMU_REG_DCDC_ANA_EN, &val);\n  val = (val & ~REG_PU_DCDC2) | REG_PU_DCDC2_DR;\n  pmu_write(PMU_REG_DCDC_ANA_EN, val);\n}\n\nstatic void pmu_dcdc_ana_mode_en(void) {\n  unsigned short val;\n\n  if (pmu_power_mode == PMU_POWER_MODE_DIG_DCDC) {\n    // Enable vcore ldo\n    pmu_module_config(PMU_DIG, PMU_AUTO_MODE, PMU_LDO_ON, PMU_LP_MODE_ON,\n                      PMU_DSLEEP_MODE_ON);\n\n    pmu_ana_set_volt(1, PMU_POWER_MODE_ANA_DCDC);\n    pmu_dig_set_volt(1, PMU_POWER_MODE_ANA_DCDC);\n\n    hal_sys_timer_delay_us(PMU_LDO_PU_STABLE_TIME_US);\n\n    // Disable vcore dcdc\n    pmu_read(PMU_REG_DCDC_DIG_EN, &val);\n    val = (val & ~REG_PU_DCDC1) | REG_PU_DCDC1_DR;\n    pmu_write(PMU_REG_DCDC_DIG_EN, val);\n  } else {\n    pmu_read(PMU_REG_DCDC_ANA_CFG_19, &val);\n    val |= DCDC2_REG_BYPASS;\n    pmu_write(PMU_REG_DCDC_ANA_CFG_19, val);\n\n    // Enable vana dcdc\n    pmu_read(PMU_REG_DCDC_ANA_EN, &val);\n#ifdef DCDC_ULP_LP_ON\n    val = (val & ~REG_DCDC2_ULP_MODE_NORMAL) | REG_DCDC2_ULP_MODE_DSLEEP |\n          REG_PU_DCDC2_DR | REG_PU_DCDC2;\n#else\n    val = (val & ~REG_DCDC2_ULP_MODE_NORMAL) | REG_PU_DCDC2_DR | REG_PU_DCDC2;\n#endif\n    pmu_write(PMU_REG_DCDC_ANA_EN, val);\n\n    pmu_ana_set_volt(1, PMU_POWER_MODE_ANA_DCDC);\n    pmu_dig_set_volt(1, PMU_POWER_MODE_ANA_DCDC);\n\n    hal_sys_timer_delay_us(PMU_DCDC_PU_STABLE_TIME_US);\n\n    // Disable vana ldo\n    pmu_module_config(PMU_ANA, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                      PMU_DSLEEP_MODE_OFF);\n\n    pmu_read(PMU_REG_DCDC_ANA_CFG_19, &val);\n    val &= ~DCDC2_REG_BYPASS;\n    pmu_write(PMU_REG_DCDC_ANA_CFG_19, val);\n  }\n}\n\nstatic void pmu_dcdc_dual_mode_en(void) {\n  unsigned short val;\n\n  pmu_read(PMU_REG_DCDC_ANA_CFG_19, &val);\n  val |= DCDC2_REG_BYPASS;\n  pmu_write(PMU_REG_DCDC_ANA_CFG_19, val);\n  pmu_read(PMU_REG_DCDC_DIG_CFG_36, &val);\n  val |= DCDC1_REG_BYPASS;\n  pmu_write(PMU_REG_DCDC_DIG_CFG_36, val);\n\n  // Enable vana dcdc\n  pmu_read(PMU_REG_DCDC_ANA_EN, &val);\n#ifdef DCDC_ULP_LP_ON\n  val = (val & ~REG_DCDC2_ULP_MODE_NORMAL) | REG_DCDC2_ULP_MODE_DSLEEP |\n        REG_PU_DCDC2_DR | REG_PU_DCDC2;\n#else\n  val = (val & ~(REG_DCDC2_ULP_MODE_NORMAL | REG_DCDC2_ULP_MODE_DSLEEP)) |\n        REG_PU_DCDC2_DR | REG_PU_DCDC2;\n#endif\n  pmu_write(PMU_REG_DCDC_ANA_EN, val);\n  // Enable vcore dcdc\n  pmu_read(PMU_REG_DCDC_DIG_EN, &val);\n#ifdef DCDC_ULP_LP_ON\n  val = (val & ~REG_DCDC1_ULP_MODE_NORMAL) | REG_DCDC1_ULP_MODE_DSLEEP |\n        REG_PU_DCDC1_DR | REG_PU_DCDC1;\n#else\n  val = (val & ~(REG_DCDC1_ULP_MODE_NORMAL | REG_DCDC1_ULP_MODE_DSLEEP)) |\n        REG_PU_DCDC1_DR | REG_PU_DCDC1;\n#endif\n  pmu_write(PMU_REG_DCDC_DIG_EN, val);\n\n  pmu_ana_set_volt(1, PMU_POWER_MODE_DIG_DCDC);\n  pmu_dig_set_volt(1, PMU_POWER_MODE_DIG_DCDC);\n\n  hal_sys_timer_delay_us(PMU_DCDC_PU_STABLE_TIME_US);\n\n  // Disable vana ldo\n  pmu_module_config(PMU_ANA, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_OFF);\n  // Disable vcore ldo\n  pmu_module_config(PMU_DIG, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_OFF);\n\n  pmu_read(PMU_REG_DCDC_ANA_CFG_19, &val);\n  val &= ~DCDC2_REG_BYPASS;\n  pmu_write(PMU_REG_DCDC_ANA_CFG_19, val);\n  pmu_read(PMU_REG_DCDC_DIG_CFG_36, &val);\n  val &= ~DCDC1_REG_BYPASS;\n  pmu_write(PMU_REG_DCDC_DIG_CFG_36, val);\n}\n\nvoid pmu_mode_change(enum PMU_POWER_MODE_T mode) {\n  uint32_t lock;\n\n  if (pmu_power_mode == mode || mode == PMU_POWER_MODE_NONE) {\n    return;\n  }\n\n  lock = int_lock();\n\n  if (mode == PMU_POWER_MODE_ANA_DCDC) {\n    pmu_dcdc_ana_mode_en();\n  } else if (mode == PMU_POWER_MODE_DIG_DCDC) {\n    pmu_dcdc_dual_mode_en();\n  } else if (mode == PMU_POWER_MODE_LDO) {\n    pmu_ldo_mode_en();\n  }\n\n  pmu_power_mode = mode;\n\n  int_unlock(lock);\n}\n\nvoid pmu_sleep_en(unsigned char sleep_en) {\n  unsigned short val;\n\n  pmu_read(PMU_REG_SLEEP_CFG, &val);\n  if (sleep_en) {\n    val |= SLEEP_ALLOW;\n  } else {\n    val &= ~SLEEP_ALLOW;\n  }\n  pmu_write(PMU_REG_SLEEP_CFG, val);\n}\n\n#if defined(PMU_INIT) || (!defined(PROGRAMMER))\nstatic uint32_t pmu_vcodec_mv_to_val(uint16_t mv) {\n  uint32_t val;\n\n#ifdef VHPPA2VCODEC\n  if (mv == 1900) {\n    val = PMU_HPPA2CODEC_1_9V;\n  } else if (mv >= 1950) {\n    val = PMU_HPPA2CODEC_1_95V;\n  } else {\n    val = PMU_HPPA2CODEC_1_7V;\n  }\n#else\n  if (mv == 1900) {\n    val = PMU_CODEC_1_9V;\n  } else if (mv >= 1950) {\n    val = PMU_CODEC_1_9V;\n  } else {\n    val = PMU_CODEC_1_7V;\n  }\n#endif\n\n  return val;\n}\n\nstatic uint32_t pmu_ldo_hppa_mv_to_val(uint16_t mv) {\n  uint32_t val;\n\n  if (mv == 1600) {\n    val = PMU_VHPPA_1_6V;\n  } else if (mv == 1700) {\n    val = PMU_VHPPA_1_7V;\n  } else if (mv >= 1900) {\n    val = PMU_VHPPA_1_9V;\n  } else {\n    val = PMU_VHPPA_1_8V;\n  }\n\n  return val;\n}\n\nstatic void POSSIBLY_UNUSED pmu_ldo_hppa_get_volt(unsigned short *normal_vp,\n                                                  unsigned short *dsleep_vp) {\n  uint16_t val;\n\n  pmu_read(PMU_REG_HPPA_LDO_EN, &val);\n  val = GET_BITFIELD(val, REG_RES_SEL_VHPPA);\n  if (normal_vp) {\n    *normal_vp = val;\n  }\n  if (dsleep_vp) {\n    *dsleep_vp = val;\n  }\n}\n\nstatic void pmu_ldo_hppa_set_volt(unsigned short normal_v,\n                                  unsigned short dsleep_v) {\n  uint16_t val;\n\n  pmu_read(PMU_REG_HPPA_LDO_EN, &val);\n  val = SET_BITFIELD(val, REG_RES_SEL_VHPPA, normal_v);\n  pmu_write(PMU_REG_HPPA_LDO_EN, val);\n}\n\nstatic void pmu_ldo_hppa_en(int enable) {\n  uint16_t val;\n\n  pmu_read(PMU_REG_HPPA_LDO_EN, &val);\n  if (enable) {\n    val |= (REG_PU_LDO_VHPPA_DSLEEP | REG_PU_LDO_VHPPA_EN);\n  } else {\n    val &= ~(REG_PU_LDO_VHPPA_DSLEEP | REG_PU_LDO_VHPPA_EN);\n  }\n  pmu_write(PMU_REG_HPPA_LDO_EN, val);\n}\n\n#ifndef HPPA_LDO_ON\nstatic uint32_t pmu_dcdc_hppa_mv_to_val(uint16_t mv) {\n  uint32_t val;\n\n  if (mv == 1600) {\n    val = PMU_DCDC_HPPA_1_6V;\n  } else if (mv == 1700) {\n    val = PMU_DCDC_HPPA_1_7V;\n  } else if (mv == 1900) {\n    val = PMU_DCDC_HPPA_1_9V;\n  } else if (mv >= 1950) {\n    val = PMU_DCDC_HPPA_1_95V;\n  } else {\n    val = PMU_DCDC_HPPA_1_8V;\n  }\n\n  return val;\n}\n\nstatic void pmu_dcdc_hppa_get_volt(unsigned short *normal_vp,\n                                   unsigned short *dsleep_vp) {\n  unsigned short val;\n\n  pmu_read(PMU_REG_DCDC_HPPA_VOLT, &val);\n  if (normal_vp) {\n    *normal_vp = GET_BITFIELD(val, REG_DCDC3_VBIT_NORMAL);\n  }\n  if (dsleep_vp) {\n    *dsleep_vp = GET_BITFIELD(val, REG_DCDC3_VBIT_DSLEEP);\n  }\n\n#ifdef PMU_DCDC_CALIB\n  if (normal_vp) {\n    *normal_vp =\n        pmu_reg_val_add(*normal_vp, -pmu_dcdc_hppa_comp, MAX_DCDC3_VBIT_VAL);\n  }\n  if (dsleep_vp) {\n    *dsleep_vp =\n        pmu_reg_val_add(*dsleep_vp, -pmu_dcdc_hppa_comp, MAX_DCDC3_VBIT_VAL);\n  }\n#endif\n}\n\nstatic void pmu_dcdc_hppa_set_volt(unsigned short normal_v,\n                                   unsigned short dsleep_v) {\n  unsigned short val;\n\n#ifdef PMU_DCDC_CALIB\n  normal_v = pmu_reg_val_add(normal_v, pmu_dcdc_hppa_comp, MAX_DCDC3_VBIT_VAL);\n  dsleep_v = pmu_reg_val_add(dsleep_v, pmu_dcdc_hppa_comp, MAX_DCDC3_VBIT_VAL);\n#endif\n\n  pmu_read(PMU_REG_DCDC_HPPA_VOLT, &val);\n  val &= ~REG_DCDC3_VBIT_DSLEEP_MASK;\n  val &= ~REG_DCDC3_VBIT_NORMAL_MASK;\n  val |= REG_DCDC3_VBIT_DSLEEP(dsleep_v);\n  val |= REG_DCDC3_VBIT_NORMAL(normal_v);\n  pmu_write(PMU_REG_DCDC_HPPA_VOLT, val);\n\n  if (normal_v > dsleep_v) {\n    dcdc_ramp_map |= REG_DCDC3_RAMP_EN;\n  } else {\n    dcdc_ramp_map &= ~REG_DCDC3_RAMP_EN;\n  }\n}\n\nstatic void pmu_dcdc_hppa_en(int enable) {\n  uint16_t val;\n\n  if (enable) {\n    pmu_read(PMU_REG_DCDC_HPPA_CFG_1D, &val);\n    val |= DCDC3_REG_BYPASS;\n    pmu_write(PMU_REG_DCDC_HPPA_CFG_1D, val);\n  }\n\n  pmu_read(PMU_REG_DCDC_HPPA_EN, &val);\n  if (enable) {\n#ifdef DCDC_ULP_LP_ON\n    val = (val & ~REG_DCDC3_ULP_MODE_NORMAL) | REG_DCDC3_ULP_MODE_DSLEEP |\n          REG_PU_DCDC3_DR | REG_PU_DCDC3;\n#else\n    val = (val & ~REG_DCDC3_ULP_MODE_NORMAL) | REG_PU_DCDC3_DR | REG_PU_DCDC3;\n#endif\n  } else {\n    val = (val & ~(REG_DCDC3_ULP_MODE_NORMAL | REG_PU_DCDC3)) | REG_PU_DCDC3_DR;\n  }\n  pmu_write(PMU_REG_DCDC_HPPA_EN, val);\n\n  if (enable) {\n    hal_sys_timer_delay_us(PMU_DCDC_PU_STABLE_TIME_US);\n    pmu_read(PMU_REG_DCDC_HPPA_CFG_1D, &val);\n    val &= ~DCDC3_REG_BYPASS;\n    pmu_write(PMU_REG_DCDC_HPPA_CFG_1D, val);\n  }\n}\n#endif\n\nstatic uint32_t pmu_vhppa_mv_to_val(uint16_t mv) {\n#ifdef HPPA_LDO_ON\n  return pmu_ldo_hppa_mv_to_val(mv);\n#else\n  return pmu_dcdc_hppa_mv_to_val(mv);\n#endif\n}\n\nstatic void POSSIBLY_UNUSED pmu_hppa_get_volt(unsigned short *normal_vp,\n                                              unsigned short *dsleep_vp) {\n#ifdef HPPA_LDO_ON\n  pmu_ldo_hppa_get_volt(normal_vp, dsleep_vp);\n#else\n  pmu_dcdc_hppa_get_volt(normal_vp, dsleep_vp);\n#endif\n}\n\nstatic void pmu_hppa_set_volt(unsigned short normal_v,\n                              unsigned short dsleep_v) {\n#ifdef HPPA_LDO_ON\n  pmu_ldo_hppa_set_volt(normal_v, dsleep_v);\n#else\n  pmu_dcdc_hppa_set_volt(normal_v, dsleep_v);\n#endif\n}\n\nstatic void pmu_hppa_en(int enable) {\n#ifdef HPPA_LDO_ON\n  pmu_ldo_hppa_en(enable);\n#else\n  pmu_dcdc_hppa_en(enable);\n#endif\n}\n\nstatic void pmu_hppa_dcdc_to_ldo(void) {\n#ifndef HPPA_LDO_ON\n  uint16_t val;\n  uint16_t act_volt;\n\n  pmu_ldo_hppa_en(true);\n\n  val = pmu_dcdc_hppa_mv_to_val(vhppa_mv);\n  pmu_dcdc_hppa_get_volt(&act_volt, NULL);\n  if (val < act_volt) {\n    val = pmu_ldo_hppa_mv_to_val(HPPA_RAMP_UP_VOLT_MV);\n  } else {\n    val = pmu_ldo_hppa_mv_to_val(vhppa_mv);\n  }\n  pmu_ldo_hppa_set_volt(val, val);\n\n  hal_sys_timer_delay_us(PMU_LDO_PU_STABLE_TIME_US);\n#endif\n}\n\nstatic void BOOT_TEXT_FLASH_LOC pmu_dig_init_volt(void) {\n  uint16_t ldo_volt;\n  uint16_t val;\n\n  pmu_dig_get_target_volt(&ldo_volt, NULL);\n\n  pmu_read(PMU_REG_DIG_CFG, &val);\n  if (GET_BITFIELD(val, LDO_DIG_VBIT_NORMAL) < ldo_volt) {\n    val = SET_BITFIELD(val, LDO_DIG_VBIT_NORMAL, ldo_volt);\n    pmu_write(PMU_REG_DIG_CFG, val);\n  }\n}\n\nint pmu_codec_volt_ramp_up(void) {\n#ifndef VMEM_ON\n  unsigned short normal, dsleep;\n  unsigned short target;\n  const unsigned short step =\n#ifdef HPPA_LDO_ON\n      1;\n#else\n      8;\n#endif\n\n  if (vcodec_off) {\n    target = pmu_vhppa_mv_to_val(HPPA_RAMP_UP_VOLT_MV);\n\n    pmu_hppa_get_volt(&normal, &dsleep);\n\n    if (normal < target) {\n      if (normal + step < target) {\n        normal += step;\n      } else {\n        normal = target;\n      }\n\n      pmu_hppa_set_volt(normal, dsleep);\n\n      return 1;\n    }\n  }\n\n  return 0;\n#endif\n}\n\nint pmu_codec_volt_ramp_down(void) {\n#ifndef VMEM_ON\n  unsigned short normal, dsleep;\n  unsigned short target;\n  const unsigned short step =\n#ifdef HPPA_LDO_ON\n      1;\n#else\n      8;\n#endif\n\n  if (vcodec_off) {\n    target = pmu_vhppa_mv_to_val(vhppa_mv);\n\n    pmu_hppa_get_volt(&normal, &dsleep);\n\n    if (normal > target) {\n      if (normal - step > target) {\n        normal -= step;\n      } else {\n        normal = target;\n      }\n\n      pmu_hppa_set_volt(normal, dsleep);\n\n      return 1;\n    }\n  }\n\n  return 0;\n#endif\n}\n#endif\n\nint BOOT_TEXT_FLASH_LOC pmu_open(void) {\n#if defined(PMU_INIT) || (!defined(PROGRAMMER))\n\n  uint16_t val;\n  enum PMU_POWER_MODE_T mode;\n  enum PMU_MODUAL_T codec;\n\n  ASSERT(!vcodec_off || vcodec_mv == vhppa_mv,\n         \"Invalid vcodec/vhppa cfg: vcodec_off=%d vcodec_mv=%u vhppa_mv=%u\",\n         vcodec_off, vcodec_mv, vhppa_mv);\n  ASSERT(vcodec_mv == 1600 || vcodec_mv == 1700 || vcodec_mv == 1800 ||\n             vcodec_mv == 1900 || vcodec_mv == 1950,\n         \"Invalid vcodec cfg: vcodec_mv=%u\", vcodec_mv);\n  ASSERT(vhppa_mv == 1600 || vhppa_mv == 1700 || vhppa_mv == 1800 ||\n             vhppa_mv == 1900 || vhppa_mv == 1950,\n         \"Invalid vhppa cfg: vhppa_mv=%u\", vhppa_mv);\n\n  // Disable and clear all PMU irqs by default\n  pmu_write(PMU_REG_INT_MASK, 0);\n  pmu_write(PMU_REG_INT_EN, 0);\n  // PMU irqs cannot be cleared by PMU soft reset\n  pmu_read(PMU_REG_CHARGER_STATUS, &val);\n  pmu_write(PMU_REG_CHARGER_STATUS, val);\n  pmu_read(PMU_REG_INT_STATUS, &val);\n  pmu_write(PMU_REG_INT_CLR, val);\n\n  pmu_read(PMU_REG_POWER_KEY_CFG, &val);\n  // Allow PMU to sleep when power key is pressed\n  val &= ~POWERKEY_WAKEUP_OSC_EN;\n  // Increase big bandgap startup time (stable time)\n  val = SET_BITFIELD(val, REG_VCORE_SSTIME_MODE, 2);\n  pmu_write(PMU_REG_POWER_KEY_CFG, val);\n\n#ifdef FORCE_BIG_BANDGAP\n  // Force big bandgap\n  pmu_read(PMU_REG_INT_EN, &val);\n  val |= REG_BG_SLEEP_MSK;\n  pmu_write(PMU_REG_INT_EN, val);\n  pmu_read(PMU_REG_BIAS_CFG, &val);\n  val |= BG_CONSTANT_GM_BIAS_DR | BG_CONSTANT_GM_BIAS_REG;\n  val |= BG_CORE_EN_DR | BG_CORE_EN_REG;\n  pmu_write(PMU_REG_BIAS_CFG, val);\n  hal_sys_timer_delay_us(20);\n  val |= BG_VBG_SEL_DR | BG_VBG_SEL_REG;\n  pmu_write(PMU_REG_BIAS_CFG, val);\n#else\n  // Allow low power bandgap\n  pmu_read(PMU_REG_BIAS_CFG, &val);\n  val &= ~BG_VBG_SEL_DR;\n  pmu_write(PMU_REG_BIAS_CFG, val);\n#endif\n\n  // Init DCDC settings part 1\n  if (pmu_metal_id >= HAL_CHIP_METAL_ID_1) {\n    pmu_write(PMU_REG_DCDC_ANA_CFG_16, 0x8E0F);\n    pmu_write(PMU_REG_DCDC_ANA_CFG_17, 0x0211);\n    pmu_write(PMU_REG_DCDC_ANA_CFG_18, 0xA484);\n    pmu_write(PMU_REG_DCDC_ANA_CFG_19, 0xE210);\n\n    pmu_write(PMU_REG_DCDC_HPPA_CFG_1A, 0x8E0F);\n    pmu_write(PMU_REG_DCDC_HPPA_CFG_1B, 0x0211);\n    pmu_write(PMU_REG_DCDC_HPPA_CFG_1C, 0xA484);\n    pmu_write(PMU_REG_DCDC_HPPA_CFG_1D, 0xE210);\n\n    pmu_write(PMU_REG_DCDC_DIG_CFG_33, 0x8E0F);\n    pmu_write(PMU_REG_DCDC_DIG_CFG_34, 0x0211);\n    pmu_write(PMU_REG_DCDC_DIG_CFG_35, 0xA484);\n    pmu_write(PMU_REG_DCDC_DIG_CFG_36, 0xE210);\n\n    pmu_read(PMU_REG_MIC_LDO_EN, &val);\n    val |= DCDC1_OFFSET_CURRENT_EN;\n    pmu_write(PMU_REG_MIC_LDO_EN, val);\n\n    pmu_read(PMU_REG_DCDC1_OFFSET, &val);\n    val = SET_BITFIELD(val, DCDC1_OFFSET_BIT, 0xE0);\n    pmu_write(PMU_REG_DCDC1_OFFSET, val);\n  }\n\n#ifdef PMU_DCDC_CALIB\n  pmu_get_dcdc_calib_value();\n#endif\n\n#ifndef NO_SLEEP\n  pmu_sleep_en(true);\n#endif\n\n  // Disable vbat2vcore\n  pmu_module_config(PMU_BAT2DIG, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_OFF);\n#ifdef LBRT\n  // Enable vbuck2ana\n  pmu_module_config(PMU_BUCK2ANA, PMU_MANUAL_MODE, PMU_LDO_ON, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_ON);\n  pmu_module_set_volt(PMU_BUCK2ANA, PMU_VBUCK2ANA_1_3V, PMU_VBUCK2ANA_1_3V);\n  // Disable vana dcdc\n  pmu_read(PMU_REG_HPPA_LDO_EN, &val);\n  val &= ~REG_BYPASS_VBUCK2ANA;\n  pmu_write(PMU_REG_HPPA_LDO_EN, val);\n#else\n  // Disable vbuck2ana\n  pmu_module_config(PMU_BUCK2ANA, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_OFF);\n#endif\n\n  // Disable vhppa ldo\n  pmu_ldo_hppa_en(false);\n\n#ifdef VMEM_ON\n  pmu_module_config(PMU_MEM, PMU_MANUAL_MODE, PMU_LDO_ON, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_ON);\n  pmu_module_ramp_volt(PMU_MEM, PMU_VMEM_1_8V, PMU_VMEM_1_8V);\n  pmu_hppa_en(false);\n  // VHPPA will be enabled/disabled dynamically. Enable soft start.\n  pmu_read(PMU_REG_DCDC_HPPA_CFG_1D, &val);\n  val |= DCDC3_SOFT_START_EN;\n  pmu_write(PMU_REG_DCDC_HPPA_CFG_1D, val);\n#else\n  // vmem and vhppa is shorted -- enable vhppa dcdc and disable vmem ldo\n  val = pmu_vhppa_mv_to_val(1800);\n  pmu_hppa_set_volt(val, val);\n  pmu_hppa_en(true);\n  pmu_module_config(PMU_MEM, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_OFF);\n#endif\n\n  pmu_module_config(PMU_GP, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_OFF);\n\n#ifndef PROGRAMMER\n#ifdef VUSB_ON\n  pmu_vusb_req |= PMU_VUSB_REQ_INIT;\n#endif\n  // Disable usbphy power, and vusb if possible\n  pmu_usb_config(PMU_USB_CONFIG_TYPE_NONE);\n#ifdef VUSB_ON\n  pmu_vusb_req &= ~PMU_VUSB_REQ_INIT;\n#endif\n#endif\n\n#ifdef __BEST_FLASH_VIA_ANA__\n  pmu_module_config(PMU_IO, PMU_AUTO_MODE, PMU_LDO_ON, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_OFF);\n#else\n  pmu_module_config(PMU_IO, PMU_AUTO_MODE, PMU_LDO_ON, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_ON);\n#endif\n  pmu_module_ramp_volt(PMU_IO, vio_lp, vio_act_normal);\n\n  // Disable vcodec\n  pmu_module_config(PMU_CODEC, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                    PMU_DSLEEP_MODE_OFF);\n  // Disable vhppa2vcodec\n  pmu_module_config(PMU_HPPA2CODEC, PMU_MANUAL_MODE, PMU_LDO_OFF,\n                    PMU_LP_MODE_ON, PMU_DSLEEP_MODE_OFF);\n#ifdef VHPPA2VCODEC\n  codec = PMU_HPPA2CODEC;\n#else\n  codec = PMU_CODEC;\n#endif\n  val = pmu_vcodec_mv_to_val(vcodec_mv);\n  // No need to ramp because the LDO is disabled (and its soft start is enabled)\n  pmu_module_set_volt(codec, val, val);\n\n  val = pmu_vhppa_mv_to_val(vhppa_mv);\n#ifdef VMEM_ON\n  // No need to ramp because VHPPA is disabled (and its soft start is enabled)\n  pmu_hppa_set_volt(val, val);\n#else\n  uint16_t old_act_volt;\n  uint16_t old_lp_volt;\n\n  // VHPPA is on. Ramp is needed.\n  pmu_hppa_get_volt(&old_act_volt, &old_lp_volt);\n  if (old_act_volt < val) {\n    while (old_act_volt++ < val) {\n      pmu_hppa_set_volt(old_act_volt, val);\n    }\n  } else if (old_act_volt != val || old_lp_volt != val) {\n    pmu_hppa_set_volt(val, val);\n  }\n#endif\n\n#ifdef DIG_DCDC_MODE\n  mode = PMU_POWER_MODE_DIG_DCDC;\n#elif defined(ANA_DCDC_MODE)\n  mode = PMU_POWER_MODE_ANA_DCDC;\n#else // LDO_MODE\n  mode = PMU_POWER_MODE_LDO;\n#endif\n\n  pmu_mode_change(mode);\n\n#ifdef RTC_ENABLE\n  pmu_rtc_restore_context();\n#endif\n\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n  // Increase bbpll voltage\n  pmu_write(0xA0, 0x3FE8); // div=2 (bit14=0)\n  pmu_write(0xA1, 0xF918);\n\n  pmu_high_performance_mode_enable(true);\n#endif\n\n  // Init DCDC settings part 2\n  if (pmu_metal_id >= HAL_CHIP_METAL_ID_1) {\n    hal_sys_timer_delay_us(5000);\n    pmu_write(PMU_REG_DCDC_ANA_CFG_16, 0x8E1F);\n    pmu_write(PMU_REG_DCDC_HPPA_CFG_1A, 0x8E1F);\n    pmu_write(PMU_REG_DCDC_DIG_CFG_33, 0x8E1F);\n  }\n#endif // PMU_INIT || (!PROGRAMMER)\n\n  return 0;\n}\n\nvoid pmu_codec_vad_save_power(void) {\n  uint16_t val;\n\n  // reduce ldo power supply\n  pmu_read(PMU_REG_DCDC_RAMP_EN, &val);\n  val &= ~REG_MIC_BIASA_IX2;\n  pmu_write(PMU_REG_DCDC_RAMP_EN, val);\n\n  // enable dcdc1 low power mode\n  pmu_read(PMU_REG_DCDC_DIG_EN, &val);\n  val |= REG_DCDC1_ULP_MODE_NORMAL;\n  pmu_write(PMU_REG_DCDC_DIG_EN, val);\n\n  // enable dcdc2 low power mode\n  pmu_read(PMU_REG_DCDC_ANA_EN, &val);\n  val |= REG_DCDC2_ULP_MODE_NORMAL;\n  pmu_write(PMU_REG_DCDC_ANA_EN, val);\n\n  // enable dcdc3 low power mode\n  pmu_read(PMU_REG_DCDC_HPPA_EN, &val);\n  val |= REG_DCDC3_ULP_MODE_NORMAL;\n  pmu_write(PMU_REG_DCDC_HPPA_EN, val);\n}\n\nvoid pmu_codec_vad_restore_power(void) {\n  uint16_t val;\n\n  // restore ldo power supply\n  pmu_read(PMU_REG_DCDC_RAMP_EN, &val);\n  val |= REG_MIC_BIASA_IX2;\n  pmu_write(PMU_REG_DCDC_RAMP_EN, val);\n\n  // disable dcdc1 low power mode\n  pmu_read(PMU_REG_DCDC_DIG_EN, &val);\n  val &= ~REG_DCDC1_ULP_MODE_NORMAL;\n  pmu_write(PMU_REG_DCDC_DIG_EN, val);\n\n  // disable dcdc2 low power mode\n  pmu_read(PMU_REG_DCDC_ANA_EN, &val);\n  val &= ~REG_DCDC2_ULP_MODE_NORMAL;\n  pmu_write(PMU_REG_DCDC_ANA_EN, val);\n\n  // disable dcdc3 low power mode\n  pmu_read(PMU_REG_DCDC_HPPA_EN, &val);\n  val &= ~REG_DCDC3_ULP_MODE_NORMAL;\n  pmu_write(PMU_REG_DCDC_HPPA_EN, val);\n}\n\nvoid pmu_sleep(void) {\n  uint16_t val;\n\n  if (dcdc_ramp_map) {\n    // Enable DCDC ramp\n    pmu_read(PMU_REG_DCDC_RAMP_EN, &val);\n    val |= dcdc_ramp_map;\n    pmu_write(PMU_REG_DCDC_RAMP_EN, val);\n  }\n\n  return;\n}\n\nvoid pmu_wakeup(void) {\n  uint16_t val;\n\n  if (dcdc_ramp_map) {\n    // Disable DCDC ramp so that s/w can control the voltages freely\n    pmu_read(PMU_REG_DCDC_RAMP_EN, &val);\n    val &= ~dcdc_ramp_map;\n    pmu_write(PMU_REG_DCDC_RAMP_EN, val);\n  }\n\n  return;\n}\n\nvoid pmu_codec_config(int enable) {\n  enum PMU_MODUAL_T codec;\n\n#ifdef VHPPA2VCODEC\n  codec = PMU_HPPA2CODEC;\n#else\n  codec = PMU_CODEC;\n#endif\n\n  if (vcodec_off) {\n#ifdef VMEM_ON\n    pmu_hppa_en(enable);\n#endif\n  } else {\n    if (enable) {\n      pmu_module_config(codec, PMU_MANUAL_MODE, PMU_LDO_ON, PMU_LP_MODE_ON,\n                        PMU_DSLEEP_MODE_OFF);\n    } else {\n      pmu_module_config(codec, PMU_MANUAL_MODE, PMU_LDO_OFF, PMU_LP_MODE_ON,\n                        PMU_DSLEEP_MODE_OFF);\n    }\n  }\n}\n\nvoid pmu_codec_hppa_enable(int enable) {\n  if (!vcodec_off) {\n#ifdef VMEM_ON\n    pmu_hppa_en(enable);\n#endif\n  }\n}\n\nstatic uint32_t mic_bias_remap(uint32_t map) {\n  // The vmic1 pin has been replaced by the vmic3 pin in package bonding for all\n  // chip models since ver-B\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n    if (map & AUD_VMIC_MAP_VMIC1) {\n      map = (map & ~AUD_VMIC_MAP_VMIC1) | AUD_VMIC_MAP_VMIC3;\n    }\n  }\n\n  return map;\n}\n\nvoid pmu_codec_mic_bias_enable(uint32_t map) {\n  uint16_t val;\n  int i;\n  enum PMU_REG_T bias_reg;\n  uint16_t ldo_en;\n  uint8_t volt;\n  uint8_t res;\n  static const uint16_t ldo_mask = REG_MIC_LDOA_EN | REG_MIC_LDOB_EN |\n                                   REG_MIC_LDOC_EN | REG_MIC_LDOD_EN |\n                                   REG_MIC_LDOE_EN;\n\n  map = mic_bias_remap(map);\n\n#ifdef DIGMIC_HIGH_VOLT\n  volt = PMU_VMIC_3_3V;\n#else\n  volt = PMU_VMIC_2_2V;\n#endif\n\n  if (vcodec_mv < 1900) {\n    if (volt >= 0x1F) {\n      volt = 0x1F;\n    } else {\n      volt += 1;\n    }\n  }\n\n  res = PMU_VMIC_RES_3_3V;\n\n  ldo_en = 0;\n  for (i = 0; i < MAX_ANA_MIC_CH_NUM; i++) {\n    if (i == MAX_ANA_MIC_CH_NUM - 1) {\n      bias_reg = PMU_REG_MIC_BIAS_E;\n    } else {\n      bias_reg = PMU_REG_MIC_BIAS_A + i;\n    }\n    pmu_read(bias_reg, &val);\n    if (map & (AUD_VMIC_MAP_VMIC1 << i)) {\n      ldo_en |= (REG_MIC_LDOA_EN >> i);\n      val = (val & ~(REG_MIC_BIASA_VSEL_MASK | REG_MIC_LDOA_RES_MASK)) |\n            REG_MIC_BIASA_VSEL(volt) | REG_MIC_LDOA_RES(res) | REG_MIC_BIASA_EN;\n    } else {\n      val &= ~REG_MIC_BIASA_EN;\n    }\n    pmu_write(bias_reg, val);\n  }\n  pmu_read(PMU_REG_MIC_LDO_EN, &val);\n  val = (val & ~ldo_mask) | ldo_en;\n  pmu_write(PMU_REG_MIC_LDO_EN, val);\n}\n\nvoid pmu_codec_mic_bias_lowpower_mode(uint32_t map) {\n  uint16_t val;\n\n  map = mic_bias_remap(map);\n\n  if (map & AUD_VMIC_MAP_VMIC3) {\n    pmu_read(PMU_REG_DCDC_RAMP_EN, &val);\n    val &= ~REG_MIC_BIASC_IX2;\n    pmu_write(PMU_REG_DCDC_RAMP_EN, val);\n\n    pmu_read(PMU_REG_MIC_BIAS_C, &val);\n    val = SET_BITFIELD(val, REG_MIC_BIASC_CHANSEL, 0x3);\n    pmu_write(PMU_REG_MIC_BIAS_C, val);\n  }\n}\n\nvoid pmu_codec_adc_pre_start(void) {}\n\nvoid pmu_codec_adc_post_start(void (*delay_ms)(uint32_t)) {}\n\nvoid pmu_codec_dac_pre_start(void) {}\n\nvoid pmu_codec_dac_post_start(void (*delay_ms)(uint32_t)) {}\n\nSRAM_TEXT_LOC void pmu_flash_write_config(void) {\n#ifdef FLASH_WRITE_AT_HIGH_VCORE\n  uint32_t lock;\n\n  if (pmu_vcore_req & PMU_VCORE_FLASH_WRITE_ENABLED) {\n    return;\n  }\n\n#if defined(__PMU_VIO_DYNAMIC_CTRL_MODE__)\n  pmu_viorise_req(PMU_VIORISE_REQ_USER_FLASH, true);\n#endif\n\n  lock = int_lock();\n  pmu_vcore_req |= PMU_VCORE_FLASH_WRITE_ENABLED;\n  int_unlock(lock);\n\n  pmu_dig_set_volt(0, PMU_POWER_MODE_NONE);\n#endif\n}\n\nSRAM_TEXT_LOC void pmu_flash_read_config(void) {\n#ifdef FLASH_WRITE_AT_HIGH_VCORE\n  uint32_t lock;\n\n  if ((pmu_vcore_req & PMU_VCORE_FLASH_WRITE_ENABLED) == 0) {\n    return;\n  }\n\n  lock = int_lock();\n  pmu_vcore_req &= ~PMU_VCORE_FLASH_WRITE_ENABLED;\n  int_unlock(lock);\n\n  pmu_dig_set_volt(0, PMU_POWER_MODE_NONE);\n\n#if defined(__PMU_VIO_DYNAMIC_CTRL_MODE__)\n  pmu_viorise_req(PMU_VIORISE_REQ_USER_FLASH, false);\n#endif\n#endif\n}\n\nvoid BOOT_TEXT_FLASH_LOC pmu_flash_freq_config(uint32_t freq) {\n#if defined(PMU_INIT) || (!defined(PROGRAMMER))\n  uint32_t lock;\n\n  lock = int_lock();\n  if (freq > 52000000) {\n    // The real max freq is 120M\n    // pmu_vcore_req |= PMU_VCORE_FLASH_FREQ_HIGH;\n  } else {\n    pmu_vcore_req &= ~PMU_VCORE_FLASH_FREQ_HIGH;\n  }\n  int_unlock(lock);\n\n  if (pmu_power_mode == PMU_POWER_MODE_NONE) {\n    // PMU not init yet\n    pmu_dig_init_volt();\n    return;\n  }\n\n  pmu_dig_set_volt(0, PMU_POWER_MODE_NONE);\n#endif\n}\n\nvoid BOOT_TEXT_FLASH_LOC pmu_psram_freq_config(uint32_t freq) {\n#if defined(PMU_INIT) || (!defined(PROGRAMMER))\n  uint32_t lock;\n\n  lock = int_lock();\n  if (freq > 52000000) {\n    pmu_vcore_req |= PMU_VCORE_PSRAM_FREQ_HIGH;\n  } else {\n    pmu_vcore_req &= ~PMU_VCORE_PSRAM_FREQ_HIGH;\n  }\n  int_unlock(lock);\n\n  if (pmu_power_mode == PMU_POWER_MODE_NONE) {\n    // PMU not init yet\n    pmu_dig_init_volt();\n    return;\n  }\n\n  pmu_dig_set_volt(0, PMU_POWER_MODE_NONE);\n#endif\n}\n\nvoid pmu_anc_config(int enable) {}\n\nvoid pmu_fir_high_speed_config(int enable) {}\n\nvoid pmu_iir_freq_config(uint32_t freq) {}\n\nvoid pmu_rs_freq_config(uint32_t freq) {\n  uint32_t lock;\n\n  lock = int_lock();\n  if (freq >= 60000000) {\n    pmu_vcore_req |= PMU_VCORE_RS_FREQ_HIGH;\n  } else {\n    pmu_vcore_req &= ~PMU_VCORE_RS_FREQ_HIGH;\n  }\n  int_unlock(lock);\n\n  pmu_dig_set_volt(0, PMU_POWER_MODE_NONE);\n}\n\nvoid BOOT_TEXT_SRAM_LOC pmu_sys_freq_config(enum HAL_CMU_FREQ_T freq) {\n#if defined(PMU_INIT) || (!defined(PROGRAMMER))\n#if defined(MCU_HIGH_PERFORMANCE_MODE) || defined(ULTRA_LOW_POWER) ||          \\\n    !defined(OSC_26M_X4_AUD2BB)\n  uint32_t lock;\n  enum PMU_VCORE_REQ_T old_req;\n  bool update = false;\n\n  lock = int_lock();\n  old_req = pmu_vcore_req;\n  pmu_vcore_req &= ~(PMU_VCORE_SYS_FREQ_HIGH | PMU_VCORE_SYS_FREQ_MEDIUM);\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n  if (freq > HAL_CMU_FREQ_104M) {\n    if (high_perf_on) {\n      // The real freq is 350M\n      pmu_vcore_req |= PMU_VCORE_SYS_FREQ_HIGH;\n    } else {\n      pmu_vcore_req |= PMU_VCORE_SYS_FREQ_MEDIUM;\n    }\n  } else {\n#ifndef OSC_26M_X4_AUD2BB\n    if (freq == HAL_CMU_FREQ_104M) {\n      // The real freq is 200M\n      pmu_vcore_req |= PMU_VCORE_SYS_FREQ_MEDIUM;\n    }\n#endif\n  }\n#else\n  if (freq > HAL_CMU_FREQ_104M) {\n    pmu_vcore_req |= PMU_VCORE_SYS_FREQ_MEDIUM;\n  }\n#endif\n  if (old_req != pmu_vcore_req) {\n    update = true;\n  }\n  int_unlock(lock);\n\n  if (!update) {\n    // Nothing changes\n    return;\n  }\n\n  if (pmu_power_mode == PMU_POWER_MODE_NONE) {\n    // PMU not init yet\n    pmu_dig_init_volt();\n    return;\n  }\n\n  pmu_dig_set_volt(0, PMU_POWER_MODE_NONE);\n#endif\n#endif\n}\n\nvoid pmu_high_performance_mode_enable(bool enable) {\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n  uint16_t val;\n\n  if (high_perf_on == enable) {\n    return;\n  }\n  high_perf_on = enable;\n\n  if (!enable) {\n    if (high_perf_freq_mhz > 300) {\n      // Switch to 52M to avoid using PLL\n      hal_cmu_sys_set_freq(HAL_CMU_FREQ_52M);\n      // Restore the default div\n      pmu_read(0xA0, &val);\n      val &= ~(1 << 14); // div=2 (bit14=0)\n      pmu_write(0xA0, val);\n      // Restore the sys freq\n      hal_cmu_sys_set_freq(hal_sysfreq_get_hw_freq());\n    }\n    // Restore the default PLL freq (384M)\n    bbpll_freq_pll_config(192 * 1000000 * 2);\n  }\n\n  pmu_sys_freq_config(hal_sysfreq_get_hw_freq());\n\n  if (enable) {\n    uint32_t pll_freq;\n\n    // Change freq first, and then change divider.\n    // Otherwise there will be an instant very high freq sent to digital domain.\n\n    if (high_perf_freq_mhz <= 300) {\n      pll_freq = high_perf_freq_mhz * 1000000 * 2;\n    } else {\n      pll_freq = high_perf_freq_mhz * 1000000;\n    }\n    bbpll_freq_pll_config(pll_freq);\n\n    if (high_perf_freq_mhz > 300) {\n      // Switch to 52M to avoid using PLL\n      hal_cmu_sys_set_freq(HAL_CMU_FREQ_52M);\n      pmu_read(0xA0, &val);\n      val |= (1 << 14); // div=1 (bit14=1)\n      pmu_write(0xA0, val);\n      // Restore the sys freq\n      hal_cmu_sys_set_freq(hal_sysfreq_get_hw_freq());\n    }\n  }\n#endif\n}\n\nvoid pmu_usb_config(enum PMU_USB_CONFIG_TYPE_T type) {\n  uint32_t lock;\n  bool update;\n  unsigned short ldo_on, deep_sleep_on;\n\n  update = false;\n\n  if (type == PMU_USB_CONFIG_TYPE_NONE) {\n    usbphy_ldo_config(false);\n\n    ldo_on = PMU_LDO_OFF;\n    deep_sleep_on = PMU_DSLEEP_MODE_OFF;\n  } else {\n    ldo_on = PMU_LDO_ON;\n    deep_sleep_on = PMU_DSLEEP_MODE_ON;\n  }\n\n  lock = int_lock();\n\n  if (type == PMU_USB_CONFIG_TYPE_NONE) {\n    pmu_vusb_req &= ~PMU_VUSB_REQ_USB;\n    if (pmu_vusb_req == 0) {\n      update = true;\n    }\n  } else {\n    if (pmu_vusb_req == 0) {\n      update = true;\n    }\n    pmu_vusb_req |= PMU_VUSB_REQ_USB;\n  }\n\n  if (update) {\n    pmu_module_config(PMU_USB, PMU_MANUAL_MODE, ldo_on, PMU_LP_MODE_ON,\n                      deep_sleep_on);\n  }\n\n#ifdef USB_HIGH_SPEED\n  if (type == PMU_USB_CONFIG_TYPE_NONE) {\n    pmu_vcore_req &= ~PMU_VCORE_USB_HS_ENABLED;\n  } else {\n    pmu_vcore_req |= PMU_VCORE_USB_HS_ENABLED;\n  }\n#endif\n\n  int_unlock(lock);\n\n  if (pmu_power_mode != PMU_POWER_MODE_NONE) {\n    // PMU has been inited\n    pmu_dig_set_volt(0, PMU_POWER_MODE_NONE);\n  }\n\n  if (type != PMU_USB_CONFIG_TYPE_NONE) {\n    usbphy_ldo_config(true);\n  }\n}\n\nvoid pmu_lbrt_config(int enable) {\n  uint32_t lock;\n  bool update;\n  unsigned short ldo_on, deep_sleep_on;\n\n  update = false;\n\n  if (enable) {\n    ldo_on = PMU_LDO_ON;\n    deep_sleep_on = PMU_DSLEEP_MODE_ON;\n  } else {\n    ldo_on = PMU_LDO_OFF;\n    deep_sleep_on = PMU_DSLEEP_MODE_OFF;\n  }\n\n  lock = int_lock();\n\n  if (enable) {\n    if (pmu_vusb_req == 0) {\n      update = true;\n    }\n    pmu_vusb_req |= PMU_VUSB_REQ_LBRT;\n  } else {\n    pmu_vusb_req &= ~PMU_VUSB_REQ_LBRT;\n    if (pmu_vusb_req == 0) {\n      update = true;\n    }\n  }\n\n  if (update) {\n    pmu_module_config(PMU_USB, PMU_MANUAL_MODE, ldo_on, PMU_LP_MODE_ON,\n                      deep_sleep_on);\n  }\n\n  int_unlock(lock);\n}\n\nstruct PMU_CHG_CTX_T {\n  uint16_t pmu_chg_status;\n};\n\nstruct PMU_CHG_CTX_T BOOT_BSS_LOC pmu_chg_ctx;\n\nvoid BOOT_TEXT_SRAM_LOC pmu_charger_save_context(void) {\n  pmu_read(PMU_REG_CHARGER_STATUS, &pmu_chg_ctx.pmu_chg_status);\n}\n\nenum PMU_POWER_ON_CAUSE_T pmu_charger_poweron_status(void) {\n  enum PMU_POWER_ON_CAUSE_T pmu_power_on_cause = PMU_POWER_ON_CAUSE_NONE;\n\n  if (pmu_chg_ctx.pmu_chg_status & AC_ON_DET_OUT) {\n    pmu_power_on_cause = PMU_POWER_ON_CAUSE_CHARGER_ACOFF;\n  } else if (pmu_chg_ctx.pmu_chg_status & AC_ON) {\n    pmu_power_on_cause = PMU_POWER_ON_CAUSE_CHARGER_ACON;\n  }\n  return pmu_power_on_cause;\n}\n\nvoid pmu_charger_init(void) {\n  unsigned short readval_cfg;\n  uint32_t lock;\n\n  lock = int_lock();\n  pmu_read(PMU_REG_CHARGER_CFG, &readval_cfg);\n  readval_cfg &= ~(REG_CHARGE_IN_INTR_MSK | REG_CHARGE_OUT_INTR_MSK |\n                   REG_AC_ON_OUT_EN | REG_AC_ON_IN_EN | REG_CHARGE_INTR_EN);\n  pmu_write(PMU_REG_CHARGER_CFG, readval_cfg);\n  int_unlock(lock);\n\n  // PMU irqs cannot be cleared by PMU soft reset\n  pmu_read(PMU_REG_CHARGER_STATUS, &readval_cfg);\n  pmu_write(PMU_REG_CHARGER_STATUS, readval_cfg);\n  pmu_read(PMU_REG_INT_STATUS, &readval_cfg);\n  pmu_write(PMU_REG_INT_CLR, readval_cfg);\n\n  hal_sys_timer_delay(MS_TO_TICKS(1));\n\n  lock = int_lock();\n  pmu_read(PMU_REG_CHARGER_CFG, &readval_cfg);\n  readval_cfg |= REG_AC_ON_OUT_EN | REG_AC_ON_IN_EN | REG_CHARGE_INTR_EN;\n  readval_cfg = SET_BITFIELD(readval_cfg, REG_AC_ON_DB_VALUE, 8);\n  pmu_write(PMU_REG_CHARGER_CFG, readval_cfg);\n  int_unlock(lock);\n\n#ifdef PMU_ACON_CAUSE_POWER_UP\n  pmu_read(0x102, &readval_cfg);\n  readval_cfg |= 1;\n  pmu_write(0x102, readval_cfg);\n#endif\n}\n\nvoid pmu_charger_shutdown_config(void) {\n#ifdef PMU_ACON_CAUSE_POWER_UP\n  pmu_wdt_stop();\n  pmu_charger_init();\n#endif\n}\n\nstatic void pmu_charger_irq_handler(uint16_t irq_status) {\n  enum PMU_CHARGER_STATUS_T status = PMU_CHARGER_UNKNOWN;\n\n  PMU_DEBUG_TRACE(3, \"%s REG_%02X=0x%04X\", __func__, PMU_REG_CHARGER_STATUS,\n                  irq_status);\n\n  if ((irq_status & (AC_ON_DET_IN_MASKED | AC_ON_DET_OUT_MASKED)) == 0) {\n    PMU_DEBUG_TRACE(1, \"%s SKIP\", __func__);\n    return;\n  } else if ((irq_status & (AC_ON_DET_IN_MASKED | AC_ON_DET_OUT_MASKED)) ==\n             (AC_ON_DET_IN_MASKED | AC_ON_DET_OUT_MASKED)) {\n    PMU_DEBUG_TRACE(1, \"%s DITHERING\", __func__);\n    hal_sys_timer_delay(2);\n  } else {\n    PMU_DEBUG_TRACE(1, \"%s NORMAL\", __func__);\n  }\n\n  status = pmu_charger_get_status();\n\n  if (charger_irq_handler) {\n    charger_irq_handler(status);\n  }\n}\n\nvoid pmu_charger_set_irq_handler(PMU_CHARGER_IRQ_HANDLER_T handler) {\n  uint32_t lock;\n  uint16_t val;\n\n  charger_irq_handler = handler;\n\n  lock = int_lock();\n  pmu_read(PMU_REG_CHARGER_CFG, &val);\n  if (handler) {\n    val |= REG_CHARGE_IN_INTR_MSK | REG_CHARGE_OUT_INTR_MSK;\n  } else {\n    val &= ~(REG_CHARGE_IN_INTR_MSK | REG_CHARGE_OUT_INTR_MSK);\n  }\n  pmu_write(PMU_REG_CHARGER_CFG, val);\n  pmu_set_irq_unified_handler(PMU_IRQ_TYPE_CHARGER,\n                              handler ? pmu_charger_irq_handler : NULL);\n  int_unlock(lock);\n}\n\nvoid pmu_charger_plugin_config(void) {\n  if (IO_VOLT_ACTIVE_RISE < PMU_IO_3_1V) {\n    vio_act_rise = PMU_IO_3_1V;\n  }\n  if (IO_VOLT_SLEEP < PMU_IO_3_2V) {\n    vio_lp = PMU_IO_3_2V;\n  }\n  pmu_viorise_req(PMU_VIORISE_REQ_USER_CHARGER, true);\n}\n\nvoid pmu_charger_plugout_config(void) {\n  vio_act_rise = IO_VOLT_ACTIVE_RISE;\n  vio_lp = IO_VOLT_SLEEP;\n  pmu_viorise_req(PMU_VIORISE_REQ_USER_CHARGER, false);\n}\n\nenum PMU_CHARGER_STATUS_T pmu_charger_get_status(void) {\n  unsigned short readval;\n  enum PMU_CHARGER_STATUS_T status;\n\n  pmu_read(PMU_REG_CHARGER_STATUS, &readval);\n  if (readval & AC_ON)\n    status = PMU_CHARGER_PLUGIN;\n  else\n    status = PMU_CHARGER_PLUGOUT;\n\n  return status;\n}\n\n#ifdef RTC_ENABLE\nvoid pmu_rtc_enable(void) {\n  uint16_t readval;\n  uint32_t lock;\n\n#ifdef SIMU\n  // Set RTC counter to 1KHz\n  pmu_write(PMU_REG_RTC_DIV_1HZ, 32 - 2);\n#else\n  // Set RTC counter to 1Hz\n  pmu_write(PMU_REG_RTC_DIV_1HZ, CONFIG_SYSTICK_HZ * 2 - 2);\n#endif\n\n  lock = int_lock();\n  pmu_read(PMU_REG_POWER_KEY_CFG, &readval);\n  readval |= RTC_POWER_ON_EN | PU_LPO_DR | PU_LPO_REG;\n  pmu_write(PMU_REG_POWER_KEY_CFG, readval);\n  int_unlock(lock);\n}\n\nvoid pmu_rtc_disable(void) {\n  uint16_t readval;\n  uint32_t lock;\n\n  pmu_rtc_clear_alarm();\n\n  lock = int_lock();\n  pmu_read(PMU_REG_POWER_KEY_CFG, &readval);\n  readval &= ~(RTC_POWER_ON_EN | PU_LPO_DR);\n  pmu_write(PMU_REG_POWER_KEY_CFG, readval);\n  int_unlock(lock);\n}\n\nint BOOT_TEXT_SRAM_LOC pmu_rtc_enabled(void) {\n  uint16_t readval;\n\n  pmu_read(PMU_REG_POWER_KEY_CFG, &readval);\n\n  return !!(readval & RTC_POWER_ON_EN);\n}\n\nvoid pmu_rtc_set(uint32_t seconds) {\n  uint16_t high, low;\n\n  // Need 3 seconds to load a new value\n  seconds += 3;\n\n  high = seconds >> 16;\n  low = seconds & 0xFFFF;\n\n  pmu_write(PMU_REG_RTC_LOAD_LOW, low);\n  pmu_write(PMU_REG_RTC_LOAD_HIGH, high);\n}\n\nuint32_t pmu_rtc_get(void) {\n  uint16_t high, low, high2;\n\n  pmu_read(PMU_REG_RTC_VAL_HIGH, &high);\n  pmu_read(PMU_REG_RTC_VAL_LOW, &low);\n  // Handle counter wrap\n  pmu_read(PMU_REG_RTC_VAL_HIGH, &high2);\n  if (high != high2) {\n    high = high2;\n    pmu_read(PMU_REG_RTC_VAL_LOW, &low);\n  }\n\n  return (high << 16) | low;\n}\n\nvoid pmu_rtc_set_alarm(uint32_t seconds) {\n  uint16_t readval;\n  uint16_t high, low;\n  uint32_t lock;\n\n  // Need 1 second to raise the interrupt\n  if (seconds > 0) {\n    seconds -= 1;\n  }\n\n  high = seconds >> 16;\n  low = seconds & 0xFFFF;\n\n  pmu_write(PMU_REG_INT_CLR, RTC_INT1_MSKED);\n\n  pmu_write(PMU_REG_RTC_MATCH1_LOW, low);\n  pmu_write(PMU_REG_RTC_MATCH1_HIGH, high);\n\n  lock = int_lock();\n  pmu_read(PMU_REG_INT_EN, &readval);\n  readval |= RTC_INT_EN_1;\n  pmu_write(PMU_REG_INT_EN, readval);\n  int_unlock(lock);\n}\n\nuint32_t BOOT_TEXT_SRAM_LOC pmu_rtc_get_alarm(void) {\n  uint16_t high, low;\n\n  pmu_read(PMU_REG_RTC_MATCH1_LOW, &low);\n  pmu_read(PMU_REG_RTC_MATCH1_HIGH, &high);\n\n  // Compensate the alarm offset\n  return (uint32_t)((high << 16) | low) + 1;\n}\n\nvoid pmu_rtc_clear_alarm(void) {\n  uint16_t readval;\n  uint32_t lock;\n\n  lock = int_lock();\n  pmu_read(PMU_REG_INT_EN, &readval);\n  readval &= ~RTC_INT_EN_1;\n  pmu_write(PMU_REG_INT_EN, readval);\n  int_unlock(lock);\n\n  pmu_write(PMU_REG_INT_CLR, RTC_INT1_MSKED);\n}\n\nint BOOT_TEXT_SRAM_LOC pmu_rtc_alarm_status_set(void) {\n  uint16_t readval;\n\n  pmu_read(PMU_REG_INT_EN, &readval);\n\n  return !!(readval & RTC_INT_EN_1);\n}\n\nint pmu_rtc_alarm_alerted() {\n  uint16_t readval;\n\n  pmu_read(PMU_REG_INT_STATUS, &readval);\n\n  return !!(readval & RTC_INT_1);\n}\n\nstatic void pmu_rtc_irq_handler(uint16_t irq_status) {\n  uint32_t seconds;\n\n  if (irq_status & RTC_INT1_MSKED) {\n    pmu_rtc_clear_alarm();\n\n    if (rtc_irq_handler) {\n      seconds = pmu_rtc_get();\n      rtc_irq_handler(seconds);\n    }\n  }\n}\n\nvoid pmu_rtc_set_irq_handler(PMU_RTC_IRQ_HANDLER_T handler) {\n  uint16_t readval;\n  uint32_t lock;\n\n  rtc_irq_handler = handler;\n\n  lock = int_lock();\n  pmu_read(PMU_REG_INT_MASK, &readval);\n  if (handler) {\n    readval |= RTC_INT1_MSK;\n  } else {\n    readval &= ~RTC_INT1_MSK;\n  }\n  pmu_write(PMU_REG_INT_MASK, readval);\n  pmu_set_irq_unified_handler(PMU_IRQ_TYPE_RTC,\n                              handler ? pmu_rtc_irq_handler : NULL);\n  int_unlock(lock);\n}\n#endif\n\nint pmu_pwrkey_set_irq(enum HAL_PWRKEY_IRQ_T type) {\n  uint16_t val;\n  uint16_t int_en;\n\n  if (type == HAL_PWRKEY_IRQ_NONE) {\n    // Clear existing IRQs\n    pmu_write(PMU_REG_CHARGER_STATUS, (POWER_ON_PRESS | POWER_ON_RELEASE));\n    // Disable future IRQs\n    int_en = 0;\n  } else if (type == HAL_PWRKEY_IRQ_FALLING_EDGE) {\n    int_en = POWERON_PRESS_EN;\n  } else if (type == HAL_PWRKEY_IRQ_RISING_EDGE) {\n    int_en = POWERON_RELEASE_EN;\n  } else if (type == HAL_PWRKEY_IRQ_BOTH_EDGE) {\n    int_en = POWERON_PRESS_EN | POWERON_RELEASE_EN;\n  } else {\n    return 1;\n  }\n\n  pmu_read(PMU_REG_SLEEP_CFG, &val);\n  val = (val & ~(POWERON_PRESS_EN | POWERON_RELEASE_EN)) | int_en;\n  pmu_write(PMU_REG_SLEEP_CFG, val);\n\n  return 0;\n}\nint hal_pwrkey_set_irq(enum HAL_PWRKEY_IRQ_T type)\n    __attribute__((alias(\"pmu_pwrkey_set_irq\")));\n\nbool pmu_pwrkey_pressed(void) {\n  uint16_t val;\n\n  pmu_read(PMU_REG_CHARGER_STATUS, &val);\n\n  return !!(val & POWER_ON);\n}\nbool hal_pwrkey_pressed(void) __attribute__((alias(\"pmu_pwrkey_pressed\")));\n\nenum HAL_PWRKEY_IRQ_T pmu_pwrkey_irq_value_to_state(uint16_t irq_status) {\n  enum HAL_PWRKEY_IRQ_T state = HAL_PWRKEY_IRQ_NONE;\n\n  if (irq_status & POWER_ON_PRESS) {\n    state |= HAL_PWRKEY_IRQ_FALLING_EDGE;\n  }\n\n  if (irq_status & POWER_ON_RELEASE) {\n    state |= HAL_PWRKEY_IRQ_RISING_EDGE;\n  }\n\n  return state;\n}\n\nstatic void pmu_general_irq_handler(void) {\n  uint32_t lock;\n  uint16_t val;\n  bool pwrkey, charger, gpadc, rtc;\n\n  pwrkey = false;\n  charger = false;\n  gpadc = false;\n  rtc = false;\n\n  lock = int_lock();\n  pmu_read(PMU_REG_CHARGER_STATUS, &val);\n  if (val & (POWER_ON_PRESS | POWER_ON_RELEASE)) {\n    pwrkey = true;\n  }\n  if (val & (AC_ON_DET_OUT_MASKED | AC_ON_DET_IN_MASKED)) {\n    charger = true;\n  }\n  if (pwrkey || charger) {\n    pmu_write(PMU_REG_CHARGER_STATUS, val);\n  }\n  int_unlock(lock);\n\n  if (pwrkey) {\n    if (pmu_irq_hdlrs[PMU_IRQ_TYPE_PWRKEY]) {\n      pmu_irq_hdlrs[PMU_IRQ_TYPE_PWRKEY](val);\n    }\n  }\n  if (charger) {\n    if (pmu_irq_hdlrs[PMU_IRQ_TYPE_CHARGER]) {\n      pmu_irq_hdlrs[PMU_IRQ_TYPE_CHARGER](val);\n    }\n  }\n\n  lock = int_lock();\n  pmu_read(PMU_REG_INT_MSKED_STATUS, &val);\n  if (val & (KEY_ERR1_INTR_MSKED | KEY_ERR0_INTR_MSKED | KEY_PRESS_INTR_MSKED |\n             KEY_RELEASE_INTR_MSKED | SAMPLE_DONE_INTR_MSKED |\n             CHAN_DATA_INTR_MSKED_MASK)) {\n    gpadc = true;\n  }\n  if (val & (RTC_INT1_MSKED | RTC_INT0_MSKED)) {\n    rtc = true;\n  }\n  if (gpadc || rtc) {\n    pmu_write(PMU_REG_INT_CLR, val);\n  }\n  int_unlock(lock);\n\n  if (gpadc) {\n    if (pmu_irq_hdlrs[PMU_IRQ_TYPE_GPADC]) {\n      pmu_irq_hdlrs[PMU_IRQ_TYPE_GPADC](val);\n    }\n  }\n  if (rtc) {\n    if (pmu_irq_hdlrs[PMU_IRQ_TYPE_RTC]) {\n      pmu_irq_hdlrs[PMU_IRQ_TYPE_RTC](val);\n    }\n  }\n}\n\nint pmu_set_irq_unified_handler(enum PMU_IRQ_TYPE_T type,\n                                PMU_IRQ_UNIFIED_HANDLER_T hdlr) {\n  bool update;\n  uint32_t lock;\n  int i;\n\n  if (type >= PMU_IRQ_TYPE_QTY) {\n    return 1;\n  }\n\n  update = false;\n\n  lock = int_lock();\n\n  for (i = 0; i < PMU_IRQ_TYPE_QTY; i++) {\n    if (pmu_irq_hdlrs[i]) {\n      break;\n    }\n  }\n\n  pmu_irq_hdlrs[type] = hdlr;\n\n  if (hdlr) {\n    update = (i >= PMU_IRQ_TYPE_QTY);\n  } else {\n    if (i == type) {\n      for (; i < PMU_IRQ_TYPE_QTY; i++) {\n        if (pmu_irq_hdlrs[i]) {\n          break;\n        }\n      }\n      update = (i >= PMU_IRQ_TYPE_QTY);\n    }\n  }\n\n  if (update) {\n    if (hdlr) {\n      NVIC_SetVector(PMU_IRQn, (uint32_t)pmu_general_irq_handler);\n      NVIC_SetPriority(PMU_IRQn, IRQ_PRIORITY_NORMAL);\n      NVIC_ClearPendingIRQ(PMU_IRQn);\n      NVIC_EnableIRQ(PMU_IRQn);\n    } else {\n      NVIC_DisableIRQ(PMU_IRQn);\n    }\n  }\n\n  int_unlock(lock);\n\n  return 0;\n}\n\nenum PMU_POWER_ON_CAUSE_T pmu_get_power_on_cause(void) {\n  enum PMU_POWER_ON_CAUSE_T pmu_power_on_cause = PMU_POWER_ON_CAUSE_NONE;\n\n  pmu_power_on_cause = pmu_charger_poweron_status();\n  if (pmu_power_on_cause == PMU_POWER_ON_CAUSE_NONE) {\n    pmu_power_on_cause = PMU_POWER_ON_CAUSE_POWER_KEY;\n  }\n\n  return pmu_power_on_cause;\n}\n\nvoid pmu_viorise_req(enum PMU_VIORISE_REQ_USER_T user, bool rise) {\n  uint32_t lock;\n\n  lock = int_lock();\n  if (rise) {\n    if (vio_risereq_map == 0) {\n      pmu_module_ramp_volt(PMU_IO, vio_lp, vio_act_rise);\n    }\n    vio_risereq_map |= (1 << user);\n  } else {\n    vio_risereq_map &= ~(1 << user);\n    if (vio_risereq_map == 0) {\n      pmu_module_ramp_volt(PMU_IO, vio_lp, vio_act_normal);\n    }\n  }\n  int_unlock(lock);\n}\n\nint pmu_debug_config_ana(uint16_t volt) { return 0; }\n\nint pmu_debug_config_codec(uint16_t volt) {\n#ifdef ANC_PROD_TEST\n  if (volt == 1600 || volt == 1700 || volt == 1800 || volt == 1900 ||\n      volt == 1950) {\n    vhppa_mv = vcodec_mv = volt;\n    vcodec_off = true;\n  } else {\n    vcodec_off = false;\n    return 1;\n  }\n#endif\n  return 0;\n}\n\nint pmu_debug_config_vcrystal(bool on) { return 0; }\n\nint pmu_debug_config_audio_output(bool diff) { return 0; }\n\nvoid pmu_debug_reliability_test(int stage) {\n  uint16_t volt;\n\n  if (stage == 0) {\n    volt = PMU_DCDC_ANA_1_2V;\n  } else {\n    volt = PMU_DCDC_ANA_1_3V;\n  }\n  pmu_dcdc_ana_set_volt(volt, ana_lp_dcdc);\n}\n\nvoid pmu_led_set_hiz(enum HAL_GPIO_PIN_T pin) {\n  uint16_t val1, val2;\n  uint32_t lock;\n\n  if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n    lock = int_lock();\n    pmu_read(PMU_REG_MIC_LDO_EN, &val1);\n    pmu_read(PMU_REG_LED_CFG, &val2);\n    if (pin == HAL_GPIO_PIN_LED1) {\n      val1 &= ~REG_LED_IO1_RX_EN;\n      val2 = (val2 | REG_LED_IO1_PU | REG_LED_IO1_OENB) &\n             ~(REG_LED_IO1_PUEN | REG_LED_IO1_PDEN);\n    } else {\n      val1 &= ~REG_LED_IO2_RX_EN;\n      val2 = (val2 | REG_LED_IO2_PU | REG_LED_IO2_OENB) &\n             ~(REG_LED_IO2_PUEN | REG_LED_IO2_PDEN);\n    }\n    pmu_write(PMU_REG_MIC_LDO_EN, val1);\n    pmu_write(PMU_REG_LED_CFG, val2);\n    int_unlock(lock);\n  }\n}\n\nvoid pmu_led_set_direction(enum HAL_GPIO_PIN_T pin, enum HAL_GPIO_DIR_T dir) {\n  uint16_t val;\n  uint16_t val_rx;\n  uint32_t lock;\n\n  if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n    lock = int_lock();\n    pmu_read(PMU_REG_LED_CFG, &val);\n    pmu_read(PMU_REG_MIC_LDO_EN, &val_rx);\n    if (pin == HAL_GPIO_PIN_LED1) {\n      val |= REG_LED_IO1_PU;\n      if (dir == HAL_GPIO_DIR_IN) {\n        val |= REG_LED_IO1_OENB;\n        val_rx |= REG_LED_IO1_RX_EN;\n      } else {\n        val &= ~REG_LED_IO1_OENB;\n        val_rx &= ~REG_LED_IO1_RX_EN;\n      }\n    } else {\n      val |= REG_LED_IO2_PU;\n      if (dir == HAL_GPIO_DIR_IN) {\n        val |= REG_LED_IO2_OENB;\n        val_rx |= REG_LED_IO2_RX_EN;\n      } else {\n        val &= ~REG_LED_IO2_OENB;\n        val_rx &= ~REG_LED_IO2_RX_EN;\n      }\n    }\n    pmu_write(PMU_REG_LED_CFG, val);\n    pmu_write(PMU_REG_MIC_LDO_EN, val_rx);\n    ;\n    int_unlock(lock);\n  }\n}\n\nenum HAL_GPIO_DIR_T pmu_led_get_direction(enum HAL_GPIO_PIN_T pin) {\n  uint16_t val;\n\n  if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n    pmu_read(PMU_REG_LED_CFG, &val);\n    if (pin == HAL_GPIO_PIN_LED1) {\n      return (val & REG_LED_IO1_OENB) ? HAL_GPIO_DIR_IN : HAL_GPIO_DIR_OUT;\n    } else {\n      return (val & REG_LED_IO2_OENB) ? HAL_GPIO_DIR_IN : HAL_GPIO_DIR_OUT;\n    }\n  } else {\n    return HAL_GPIO_DIR_IN;\n  }\n}\n\nvoid pmu_led_set_voltage_domains(enum HAL_IOMUX_PIN_T pin,\n                                 enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt) {\n  enum PMU_LED_VOLT_T {\n    PMU_LED_VOLT_VBAT,\n    PMU_LED_VOLT_VMEM,\n    PMU_LED_VOLT_VIO,\n  };\n  enum PMU_LED_VOLT_T sel;\n  uint16_t val;\n  uint32_t lock;\n\n  if (pin == HAL_IOMUX_PIN_LED1 || pin == HAL_IOMUX_PIN_LED2) {\n    if (volt == HAL_IOMUX_PIN_VOLTAGE_VIO) {\n      sel = PMU_LED_VOLT_VIO;\n    } else if (volt == HAL_IOMUX_PIN_VOLTAGE_MEM) {\n      sel = PMU_LED_VOLT_VMEM;\n    } else {\n      sel = PMU_LED_VOLT_VBAT;\n    }\n\n    lock = int_lock();\n    pmu_read(PMU_REG_LED_CFG, &val);\n    if (pin == HAL_IOMUX_PIN_LED1) {\n      val = SET_BITFIELD(val, REG_LED_IO1_SEL, sel);\n    } else {\n      val = SET_BITFIELD(val, REG_LED_IO2_SEL, sel);\n    }\n    pmu_write(PMU_REG_LED_CFG, val);\n    int_unlock(lock);\n  }\n}\n\nvoid pmu_led_set_pull_select(enum HAL_IOMUX_PIN_T pin,\n                             enum HAL_IOMUX_PIN_PULL_SELECT_T pull_sel) {\n  uint16_t val;\n  uint32_t lock;\n\n  if (pin == HAL_IOMUX_PIN_LED1 || pin == HAL_IOMUX_PIN_LED2) {\n    lock = int_lock();\n    pmu_read(PMU_REG_LED_CFG, &val);\n    if (pin == HAL_IOMUX_PIN_LED1) {\n      val &= ~(REG_LED_IO1_PDEN | REG_LED_IO1_PUEN);\n      if (pull_sel == HAL_IOMUX_PIN_PULLUP_ENABLE) {\n        val |= REG_LED_IO1_PUEN;\n      } else if (pull_sel == HAL_IOMUX_PIN_PULLDOWN_ENABLE) {\n        val |= REG_LED_IO1_PDEN;\n      }\n    } else {\n      val &= ~(REG_LED_IO2_PDEN | REG_LED_IO2_PUEN);\n      if (pull_sel == HAL_IOMUX_PIN_PULLUP_ENABLE) {\n        val |= REG_LED_IO2_PUEN;\n      } else if (pull_sel == HAL_IOMUX_PIN_PULLDOWN_ENABLE) {\n        val |= REG_LED_IO2_PDEN;\n      }\n    }\n    pmu_write(PMU_REG_LED_CFG, val);\n    int_unlock(lock);\n  }\n}\n\nvoid pmu_led_set_value(enum HAL_GPIO_PIN_T pin, int data) {\n  uint16_t val;\n  uint32_t lock;\n#ifdef PMU_LED_VIA_PWM\n  uint16_t br_val;\n#endif\n  if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n    lock = int_lock();\n#ifdef PMU_LED_VIA_PWM\n    pmu_read(PMU_REG_PWM_BR_EN, &br_val);\n#endif\n    pmu_read(PMU_REG_PWM_EN, &val);\n    if (pin == HAL_GPIO_PIN_LED1) {\n#ifdef PMU_LED_VIA_PWM\n      pmu_write(PMU_REG_PWM2_TOGGLE, 0xFFFF);\n      br_val &= ~REG_PWM2_BR_EN;\n      val |= PWM_SELECT_EN(1 << 0);\n      if (data) {\n        val &= ~PWM_SELECT_INV(1 << 0);\n      } else {\n        val |= PWM_SELECT_INV(1 << 0);\n      }\n#else\n      if (data) {\n        val |= REG_LED0_OUT;\n      } else {\n        val &= ~REG_LED0_OUT;\n      }\n#endif\n    } else {\n#ifdef PMU_LED_VIA_PWM\n      pmu_write(PMU_REG_PWM3_TOGGLE, 0xFFFF);\n      br_val &= ~REG_PWM3_BR_EN;\n      val |= PWM_SELECT_EN(1 << 1);\n      if (data) {\n        val &= ~PWM_SELECT_INV(1 << 1);\n      } else {\n        val |= PWM_SELECT_INV(1 << 1);\n      }\n#else\n      if (data) {\n        val |= REG_LED1_OUT;\n      } else {\n        val &= ~REG_LED1_OUT;\n      }\n#endif\n    }\n#ifdef PMU_LED_VIA_PWM\n    pmu_write(PMU_REG_PWM_BR_EN, br_val);\n#endif\n    pmu_write(PMU_REG_PWM_EN, val);\n    int_unlock(lock);\n  }\n}\n\nint pmu_led_get_value(enum HAL_GPIO_PIN_T pin) {\n  uint16_t val;\n  int data = 0;\n\n  if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n    pmu_read(PMU_REG_POWER_OFF, &val);\n    if (pin == HAL_GPIO_PIN_LED1) {\n      data = REG_LED_IO1_DATA_IN;\n    } else {\n      data = REG_LED_IO2_DATA_IN;\n    }\n    data &= val;\n  }\n\n  return !!data;\n}\n\nstruct PMU_WDT_CTX_T {\n  bool enabled;\n  uint16_t wdt_timer;\n  uint16_t wdt_cfg;\n};\n\nstatic struct PMU_WDT_CTX_T BOOT_BSS_LOC wdt_ctx;\n\nvoid BOOT_TEXT_SRAM_LOC pmu_wdt_save_context(void) {\n  uint16_t wdt_cfg = 0, wdt_timer = 0;\n  pmu_read(PMU_REG_WDT_CFG, &wdt_cfg);\n  if (wdt_cfg & (REG_WDT_RESET_EN | REG_WDT_EN)) {\n    wdt_ctx.enabled = true;\n    wdt_ctx.wdt_cfg = wdt_cfg;\n    pmu_read(PMU_REG_WDT_TIMER, &wdt_timer);\n    wdt_ctx.wdt_timer = wdt_timer;\n  }\n}\n\nvoid BOOT_TEXT_SRAM_LOC pmu_wdt_restore_context(void) {\n  if (wdt_ctx.enabled) {\n    pmu_write(PMU_REG_WDT_TIMER, wdt_ctx.wdt_timer);\n    pmu_write(PMU_REG_WDT_CFG, wdt_ctx.wdt_cfg);\n  }\n}\n\nvoid pmu_wdt_set_irq_handler(PMU_WDT_IRQ_HANDLER_T handler) {}\n\nint pmu_wdt_config(uint32_t irq_ms, uint32_t reset_ms) {\n  // No wdt irq on best2300\n  if (irq_ms + reset_ms > 0xFFFF) {\n    return 1;\n  }\n  wdt_timer = irq_ms + reset_ms;\n\n  pmu_write(PMU_REG_WDT_TIMER, wdt_timer);\n\n  return 0;\n}\n\nvoid pmu_wdt_start(void) {\n  uint16_t val;\n\n  if (wdt_timer == 0) {\n    return;\n  }\n\n  pmu_read(PMU_REG_WDT_CFG, &val);\n  val |= (REG_WDT_RESET_EN | REG_WDT_EN);\n  pmu_write(PMU_REG_WDT_CFG, val);\n}\n\nvoid pmu_wdt_stop(void) {\n  uint16_t val;\n\n  if (wdt_timer == 0) {\n    return;\n  }\n\n  pmu_read(PMU_REG_WDT_CFG, &val);\n  val &= ~(REG_WDT_RESET_EN | REG_WDT_EN);\n  pmu_write(PMU_REG_WDT_CFG, val);\n}\n\nvoid pmu_wdt_feed(void) {\n  if (wdt_timer == 0) {\n    return;\n  }\n\n  pmu_write(PMU_REG_WDT_TIMER, wdt_timer);\n}\n\nvoid pmu_ntc_capture_enable(void) {}\n\nvoid pmu_ntc_capture_disable(void) {}\n"
  },
  {
    "path": "platform/drivers/ana/best2300p/pmu_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PMU_BEST2300P_H__\n#define __PMU_BEST2300P_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_cmu.h\"\n\nenum PMU_EFUSE_PAGE_T {\n    PMU_EFUSE_PAGE_SECURITY     = 0,\n    PMU_EFUSE_PAGE_BOOT         = 1,\n    PMU_EFUSE_PAGE_FEATURE      = 2,\n    PMU_EFUSE_PAGE_BATTER_LV    = 3,\n\n    PMU_EFUSE_PAGE_BATTER_HV    = 4,\n    PMU_EFUSE_PAGE_SW_CFG       = 5,\n    PMU_EFUSE_PAGE_PROD_TEST    = 6,\n    PMU_EFUSE_PAGE_RESERVED_7   = 7,\n\n    PMU_EFUSE_PAGE_BT_POWER     = 8,\n    PMU_EFUSE_PAGE_DCCALIB2_L   = 9,\n    PMU_EFUSE_PAGE_DCCALIB2_R   = 10,\n    PMU_EFUSE_PAGE_DCCALIB_L    = 11,\n\n    PMU_EFUSE_PAGE_DCCALIB_R    = 12,\n    PMU_EFUSE_PAGE_RESERVED_13  = 13,\n    PMU_EFUSE_PAGE_MODEL        = 14,\n    PMU_EFUSE_PAGE_RESERVED_15  = 15,\n\n    PMU_EFUSE_PAGE_BOOT_SIG1    = 16,\n    PMU_EFUSE_PAGE_BOOT_SIG2    = 17,\n    PMU_EFUSE_PAGE_BOOT_SIG3    = 18,\n    PMU_EFUSE_PAGE_RESERVED_19  = 19,\n\n    PMU_EFUSE_PAGE_RESERVED_20  = 20,\n    PMU_EFUSE_PAGE_RESERVED_21  = 21,\n    PMU_EFUSE_PAGE_RESERVED_22  = 22,\n    PMU_EFUSE_PAGE_RESERVED_23  = 23,\n};\n\nenum PMU_IRQ_TYPE_T {\n    PMU_IRQ_TYPE_PWRKEY,\n    PMU_IRQ_TYPE_GPADC,\n    PMU_IRQ_TYPE_RTC,\n    PMU_IRQ_TYPE_CHARGER,\n\n    PMU_IRQ_TYPE_QTY\n};\n\nenum PMU_PLL_DIV_TYPE_T {\n    PMU_PLL_DIV_DIG,\n    PMU_PLL_DIV_CODEC,\n};\n\nvoid pmu_codec_hppa_enable(int enable);\n\nvoid pmu_codec_mic_bias_enable(uint32_t map);\n\nvoid pmu_codec_mic_bias_lowpower_mode(uint32_t map);\n\nint pmu_codec_volt_ramp_up(void);\n\nint pmu_codec_volt_ramp_down(void);\n\nvoid pmu_codec_vad_save_power(void);\n\nvoid pmu_codec_vad_restore_power(void);\n\nvoid pmu_lbrt_config(int enable);\n\nvoid pmu_pll_div_reset_set(enum HAL_CMU_PLL_T pll);\n\nvoid pmu_pll_div_reset_clear(enum HAL_CMU_PLL_T pll);\n\nvoid pmu_pll_div_set(enum HAL_CMU_PLL_T pll, enum PMU_PLL_DIV_TYPE_T type, uint32_t div);\n\nvoid pmu_led_set_hiz(enum HAL_GPIO_PIN_T pin);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/ana/best2300p/reg_usbphy_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_USBPHY_BEST2300P_H__\n#define __REG_USBPHY_BEST2300P_H__\n\n#include \"plat_types.h\"\n\n// REG_00\n#define REG_00_REVID_SHIFT                  0\n#define REG_00_REVID_MASK                   (0xF << REG_00_REVID_SHIFT)\n#define REG_00_REVID(n)                     BITFIELD_VAL(REG_00_REVID, n)\n#define REG_00_CHIPID_SHIFT                 4\n#define REG_00_CHIPID_MASK                  (0xFFF << REG_00_CHIPID_SHIFT)\n#define REG_00_CHIPID(n)                    BITFIELD_VAL(REG_00_CHIPID, n)\n\n// REG_01\n#define REG_01_CFG_ANAPHY_RESETN            (1 << 0)\n#define REG_01_CFG_CKCDR_EN                 (1 << 1)\n#define REG_01_CFG_CKPLL_EN                 (1 << 2)\n#define REG_01_CFG_EN_CLKMAC                (1 << 3)\n#define REG_01_CFG_POL_CDRCLK               (1 << 4)\n#define REG_01_CFG_RESETN_MAC               (1 << 5)\n#define REG_01_CFG_RESETNCDR                (1 << 6)\n#define REG_01_CFG_RESETNPLL                (1 << 7)\n#define REG_01_CFG_BYPASS_CDR_ENDRESETN     (1 << 8)\n#define REG_01_CFG_INTR_EN_ALL              (1 << 9)\n#define REG_01_CFG_LOW_SPEED_MODE           (1 << 10)\n#define REG_01_CFG_POL_CLKPLL               (1 << 11)\n#define REG_01_CFG_BYPASS_RDY               (1 << 12)\n#define REG_01_CFG_MODE_HS_LINES_TX         (1 << 13)\n#define REG_01_CFG_MODE_FS_LINES_TX         (1 << 14)\n#define REG_01_CFG_ENUM_MODE                (1 << 15)\n\n// REG_02\n#define REG_02_CFG_TARGET_SYNC_TOUT_SHIFT   0\n#define REG_02_CFG_TARGET_SYNC_TOUT_MASK    (0xF << REG_02_CFG_TARGET_SYNC_TOUT_SHIFT)\n#define REG_02_CFG_TARGET_SYNC_TOUT(n)      BITFIELD_VAL(REG_02_CFG_TARGET_SYNC_TOUT, n)\n#define REG_02_CFG_SEL_SYNCPATTERN_SHIFT    4\n#define REG_02_CFG_SEL_SYNCPATTERN_MASK     (0x3 << REG_02_CFG_SEL_SYNCPATTERN_SHIFT)\n#define REG_02_CFG_SEL_SYNCPATTERN(n)       BITFIELD_VAL(REG_02_CFG_SEL_SYNCPATTERN, n)\n#define REG_02_CFG_BYPASS_SQL_VALID         (1 << 6)\n#define REG_02_CFG_EN_SYNCTOUT              (1 << 7)\n#define REG_02_CFG_FORCERX                  (1 << 8)\n#define REG_02_CFG_RXRESET                  (1 << 9)\n#define REG_02_CFG_EBUF_THRD_SHIFT          10\n#define REG_02_CFG_EBUF_THRD_MASK           (0x1F << REG_02_CFG_EBUF_THRD_SHIFT)\n#define REG_02_CFG_EBUF_THRD(n)             BITFIELD_VAL(REG_02_CFG_EBUF_THRD, n)\n#define REG_02_CFG_EOP_MODE_RX              (1 << 15)\n\n// REG_03\n#define REG_03_CFG_TARGET_TAIL_SHIFT        0\n#define REG_03_CFG_TARGET_TAIL_MASK         (0xFF << REG_03_CFG_TARGET_TAIL_SHIFT)\n#define REG_03_CFG_TARGET_TAIL(n)           BITFIELD_VAL(REG_03_CFG_TARGET_TAIL, n)\n#define REG_03_CFG_TXPATTERN_SHIFT          8\n#define REG_03_CFG_TXPATTERN_MASK           (0xFF << REG_03_CFG_TXPATTERN_SHIFT)\n#define REG_03_CFG_TXPATTERN(n)             BITFIELD_VAL(REG_03_CFG_TXPATTERN, n)\n\n// REG_04\n#define REG_04_CFG_EN_HSTSOF                (1 << 0)\n#define REG_04_CFG_FORCETX                  (1 << 1)\n#define REG_04_CFG_MODE_BITEN               (1 << 2)\n#define REG_04_CFG_TXSTATE_RESET            (1 << 3)\n#define REG_04_CFG_EMPTY_DLY_SEL_SHIFT      4\n#define REG_04_CFG_EMPTY_DLY_SEL_MASK       (0x7 << REG_04_CFG_EMPTY_DLY_SEL_SHIFT)\n#define REG_04_CFG_EMPTY_DLY_SEL(n)         BITFIELD_VAL(REG_04_CFG_EMPTY_DLY_SEL, n)\n#define REG_04_RESERVED_0                   (1 << 7)\n#define REG_04_CFG_TP_SEL_SHIFT             8\n#define REG_04_CFG_TP_SEL_MASK              (0xFF << REG_04_CFG_TP_SEL_SHIFT)\n#define REG_04_CFG_TP_SEL(n)                BITFIELD_VAL(REG_04_CFG_TP_SEL, n)\n\n// REG_05\n#define REG_05_CFG_ADP_PRB                  (1 << 0)\n#define REG_05_CFG_ADP_SNS                  (1 << 1)\n#define REG_05_CFG_RID_A                    (1 << 2)\n#define REG_05_CFG_RID_B                    (1 << 3)\n#define REG_05_CFG_RID_C                    (1 << 4)\n#define REG_05_CFG_RID_FLOAT                (1 << 5)\n#define REG_05_CFG_RID_GND                  (1 << 6)\n#define REG_05_CFG_UTMIOTG_AVALID           (1 << 7)\n#define REG_05_CFG_UTMISRP_BVALID           (1 << 8)\n#define REG_05_CFG_UTMIOTG_VBUSVALID        (1 << 9)\n#define REG_05_CFG_UTMISRP_SESSEND          (1 << 10)\n#define REG_05_RESERVED_5_1_SHIFT           11\n#define REG_05_RESERVED_5_1_MASK            (0x1F << REG_05_RESERVED_5_1_SHIFT)\n#define REG_05_RESERVED_5_1(n)              BITFIELD_VAL(REG_05_RESERVED_5_1, n)\n\n// REG_06\n#define REG_06_CFG_HS_SRC_SEL               (1 << 0)\n#define REG_06_CFG_HS_TX_EN                 (1 << 1)\n#define REG_06_CFG_CHIRP_EN                 (1 << 2)\n#define REG_06_CFG_HS_MODE                  (1 << 3)\n#define REG_06_CFG_EN_RHS                   (1 << 4)\n#define REG_06_CFG_HS_DRV_SEL_SHIFT         5\n#define REG_06_CFG_HS_DRV_SEL_MASK          (0xF << REG_06_CFG_HS_DRV_SEL_SHIFT)\n#define REG_06_CFG_HS_DRV_SEL(n)            BITFIELD_VAL(REG_06_CFG_HS_DRV_SEL, n)\n#define REG_06_CFG_RHS_TRIM_SHIFT           9\n#define REG_06_CFG_RHS_TRIM_MASK            (0xF << REG_06_CFG_RHS_TRIM_SHIFT)\n#define REG_06_CFG_RHS_TRIM(n)              BITFIELD_VAL(REG_06_CFG_RHS_TRIM, n)\n#define REG_06_CFG_HS_RCV_PD                (1 << 13)\n#define REG_06_CFG_EN_HOLD_LAST             (1 << 14)\n#define REG_06_CFG_EN_HS_S2P                (1 << 15)\n\n// REG_07\n#define REG_07_CFG_RST_INTP                 (1 << 0)\n#define REG_07_CFG_EN_ZPS                   (1 << 1)\n#define REG_07_CFG_RES_GN_SHIFT             2\n#define REG_07_CFG_RES_GN_MASK              (0xF << REG_07_CFG_RES_GN_SHIFT)\n#define REG_07_CFG_RES_GN(n)                BITFIELD_VAL(REG_07_CFG_RES_GN, n)\n#define REG_07_CFG_ISEL_RCV_SHIFT           6\n#define REG_07_CFG_ISEL_RCV_MASK            (0x7 << REG_07_CFG_ISEL_RCV_SHIFT)\n#define REG_07_CFG_ISEL_RCV(n)              BITFIELD_VAL(REG_07_CFG_ISEL_RCV, n)\n#define REG_07_CFG_ISEL_SQ_SHIFT            9\n#define REG_07_CFG_ISEL_SQ_MASK             (0x7 << REG_07_CFG_ISEL_SQ_SHIFT)\n#define REG_07_CFG_ISEL_SQ(n)               BITFIELD_VAL(REG_07_CFG_ISEL_SQ, n)\n#define REG_07_CFG_INT_FLT_SHIFT            12\n#define REG_07_CFG_INT_FLT_MASK             (0x3 << REG_07_CFG_INT_FLT_SHIFT)\n#define REG_07_CFG_INT_FLT(n)               BITFIELD_VAL(REG_07_CFG_INT_FLT, n)\n#define REG_07_CFG_PI_GN_SHIFT              14\n#define REG_07_CFG_PI_GN_MASK               (0x3 << REG_07_CFG_PI_GN_SHIFT)\n#define REG_07_CFG_PI_GN(n)                 BITFIELD_VAL(REG_07_CFG_PI_GN, n)\n\n// REG_08\n#define REG_08_CFG_CDR_GN_SHIFT             0\n#define REG_08_CFG_CDR_GN_MASK              (0x3 << REG_08_CFG_CDR_GN_SHIFT)\n#define REG_08_CFG_CDR_GN(n)                BITFIELD_VAL(REG_08_CFG_CDR_GN, n)\n#define REG_08_CFG_SEL_HS_GAIN              (1 << 2)\n#define REG_08_CFG_SEL_TERR                 (1 << 3)\n#define REG_08_CFG_SEL_HS_LSTATE            (1 << 4)\n#define REG_08_CFG_LOOP_BACK                (1 << 5)\n#define REG_08_CFG_XCVR_SELECT              (1 << 6)\n#define REG_08_CFG_XTERM_SELECT             (1 << 7)\n#define REG_08_CFG_USPENDM                  (1 << 8)\n#define REG_08_CFG_DISCON_DET_EN            (1 << 9)\n#define REG_08_CFG_DISCON_VTHSET_SHIFT      10\n#define REG_08_CFG_DISCON_VTHSET_MASK       (0x7 << REG_08_CFG_DISCON_VTHSET_SHIFT)\n#define REG_08_CFG_DISCON_VTHSET(n)         BITFIELD_VAL(REG_08_CFG_DISCON_VTHSET, n)\n#define REG_08_CFG_FS_TX_ON                 (1 << 13)\n#define REG_08_CFG_FS_EN_RFS                (1 << 14)\n#define REG_08_CFG_FS_EN_R15K               (1 << 15)\n\n// REG_09\n#define REG_09_CFG_LS_EN_RLS                (1 << 0)\n#define REG_09_CFG_LS_MODE                  (1 << 1)\n#define REG_09_CFG_ATEST_EN_REG             (1 << 2)\n#define REG_09_CFG_ATEST_SELX_REG_SHIFT     3\n#define REG_09_CFG_ATEST_SELX_REG_MASK      (0x3 << REG_09_CFG_ATEST_SELX_REG_SHIFT)\n#define REG_09_CFG_ATEST_SELX_REG(n)        BITFIELD_VAL(REG_09_CFG_ATEST_SELX_REG, n)\n#define REG_09_CFG_DTESTEN1_REG             (1 << 5)\n#define REG_09_CFG_DTESTEN2_REG             (1 << 6)\n#define REG_09_CFG_DTEST_SEL_REG_SHIFT      7\n#define REG_09_CFG_DTEST_SEL_REG_MASK       (0x3 << REG_09_CFG_DTEST_SEL_REG_SHIFT)\n#define REG_09_CFG_DTEST_SEL_REG(n)         BITFIELD_VAL(REG_09_CFG_DTEST_SEL_REG, n)\n#define REG_09_CFG_ATEST_EN_DISCON_REG      (1 << 9)\n#define REG_09_CFG_ATEST_SELX_DISCON_REG    (1 << 10)\n#define REG_09_CFG_MODE_LINESTATE           (1 << 11)\n#define REG_09_RESERVED_8_6_SHIFT           12\n#define REG_09_RESERVED_8_6_MASK            (0x7 << REG_09_RESERVED_8_6_SHIFT)\n#define REG_09_RESERVED_8_6(n)              BITFIELD_VAL(REG_09_RESERVED_8_6, n)\n#define REG_09_CFG_BISTEN                   (1 << 15)\n\n// REG_0A\n#define REG_0A_CFG_DR_HOSTMODE              (1 << 0)\n#define REG_0A_CFG_DR_FSLS_SEL              (1 << 1)\n#define REG_0A_CFG_DR_SDATA                 (1 << 2)\n#define REG_0A_CFG_DR_TERMSEL               (1 << 3)\n#define REG_0A_CFG_DR_XCVRSEL               (1 << 4)\n#define REG_0A_CFG_DR_SON                   (1 << 5)\n#define REG_0A_CFG_DR_OPMODE                (1 << 6)\n#define REG_0A_RESERVED_9                   (1 << 7)\n#define REG_0A_CFG_DR_HS_TXEN               (1 << 8)\n#define REG_0A_CFG_DR_FSTXEN                (1 << 9)\n#define REG_0A_CFG_DR_FSTXD                 (1 << 10)\n#define REG_0A_CFG_DR_FSTXDB                (1 << 11)\n#define REG_0A_CFG_FS_LS_SEL                (1 << 12)\n#define REG_0A_CFG_CLK480M_EDGE_SEL         (1 << 13)\n#define REG_0A_RESERVED_13_10_SHIFT         12\n#define REG_0A_RESERVED_13_10_MASK          (0xF << REG_0A_RESERVED_13_10_SHIFT)\n#define REG_0A_RESERVED_13_10(n)            BITFIELD_VAL(REG_0A_RESERVED_13_10, n)\n\n// REG_0B\n#define REG_0B_CFG_REG_HOSTMODE             (1 << 0)\n#define REG_0B_CFG_REG_FSLS_SEL             (1 << 1)\n#define REG_0B_CFG_REG_SDATA                (1 << 2)\n#define REG_0B_CFG_REG_TERM                 (1 << 3)\n#define REG_0B_CFG_REG_XCVRSEL              (1 << 4)\n#define REG_0B_CFG_REG_SON                  (1 << 5)\n#define REG_0B_CFG_REG_OPMODE_SHIFT         6\n#define REG_0B_CFG_REG_OPMODE_MASK          (0x3 << REG_0B_CFG_REG_OPMODE_SHIFT)\n#define REG_0B_CFG_REG_OPMODE(n)            BITFIELD_VAL(REG_0B_CFG_REG_OPMODE, n)\n#define REG_0B_CFG_REG_HS_TXEN              (1 << 8)\n#define REG_0B_CFG_REG_FSTXEN               (1 << 9)\n#define REG_0B_CFG_REG_FSTXD                (1 << 10)\n#define REG_0B_CFG_REG_FSTXDB               (1 << 11)\n#define REG_0B_RESERVED_17_14_SHIFT         12\n#define REG_0B_RESERVED_17_14_MASK          (0xF << REG_0B_RESERVED_17_14_SHIFT)\n#define REG_0B_RESERVED_17_14(n)            BITFIELD_VAL(REG_0B_RESERVED_17_14, n)\n\n// REG_0C\n#define REG_0C_CFG_RXINTR_MSK_SHIFT         0\n#define REG_0C_CFG_RXINTR_MSK_MASK          (0xFFFF << REG_0C_CFG_RXINTR_MSK_SHIFT)\n#define REG_0C_CFG_RXINTR_MSK(n)            BITFIELD_VAL(REG_0C_CFG_RXINTR_MSK, n)\n\n// REG_0D\n#define REG_0D_CFG_HSHOST_DISC_MSK          (1 << 0)\n#define REG_0D_CFG_POL_CKSIE60              (1 << 1)\n#define REG_0D_CFG_RESETN_HSTXP             (1 << 2)\n#define REG_0D_CFG_CKSIE60_EN               (1 << 3)\n#define REG_0D_CFG_TXP_MODE                 (1 << 4)\n#define REG_0D_CFG_CKOSC_EN                 (1 << 5)\n#define REG_0D_CFG_POL_OSC                  (1 << 6)\n#define REG_0D_CFG_CKPRE_EN                 (1 << 7)\n#define REG_0D_CFG_RX_P_SEL                 (1 << 8)\n#define REG_0D_CFG_RERESTN_HSRXP            (1 << 9)\n#define REG_0D_CFG_POL_RXP                  (1 << 10)\n#define REG_0D_CFG_CKRXP_EN                 (1 << 11)\n#define REG_0D_CFG_PEBUF_THRD_SHIFT         12\n#define REG_0D_CFG_PEBUF_THRD_MASK          (0xF << REG_0D_CFG_PEBUF_THRD_SHIFT)\n#define REG_0D_CFG_PEBUF_THRD(n)            BITFIELD_VAL(REG_0D_CFG_PEBUF_THRD, n)\n\n// REG_0E\n#define REG_0E_RB_RXERRSTATUS_RAW_SHIFT     0\n#define REG_0E_RB_RXERRSTATUS_RAW_MASK      (0xFFFF << REG_0E_RB_RXERRSTATUS_RAW_SHIFT)\n#define REG_0E_RB_RXERRSTATUS_RAW(n)        BITFIELD_VAL(REG_0E_RB_RXERRSTATUS_RAW, n)\n\n// REG_0F\n#define REG_0F_RB_RXERRSTATUS_MSKD_SHIFT    0\n#define REG_0F_RB_RXERRSTATUS_MSKD_MASK     (0xFFFF << REG_0F_RB_RXERRSTATUS_MSKD_SHIFT)\n#define REG_0F_RB_RXERRSTATUS_MSKD(n)       BITFIELD_VAL(REG_0F_RB_RXERRSTATUS_MSKD, n)\n\n// REG_10\n#define REG_10_RB_HSHOST_DISC_RAW           (1 << 0)\n\n// REG_11\n#define REG_11_RB_HSHOST_DISC_MSKED         (1 << 0)\n\n// REG_12\n#define REG_12_CFG_EN_SETERR_RX_SHIFT       0\n#define REG_12_CFG_EN_SETERR_RX_MASK        (0xFFFF << REG_12_CFG_EN_SETERR_RX_SHIFT)\n#define REG_12_CFG_EN_SETERR_RX(n)          BITFIELD_VAL(REG_12_CFG_EN_SETERR_RX, n)\n\n// REG_13\n#define REG_13_CFG_TXSTART_DLY_SEL_SHIFT    0\n#define REG_13_CFG_TXSTART_DLY_SEL_MASK     (0x7 << REG_13_CFG_TXSTART_DLY_SEL_SHIFT)\n#define REG_13_CFG_TXSTART_DLY_SEL(n)       BITFIELD_VAL(REG_13_CFG_TXSTART_DLY_SEL, n)\n#define REG_13_RESERVED_38_26_SHIFT         3\n#define REG_13_RESERVED_38_26_MASK          (0x1FFF << REG_13_RESERVED_38_26_SHIFT)\n#define REG_13_RESERVED_38_26(n)            BITFIELD_VAL(REG_13_RESERVED_38_26, n)\n\n// REG_14\n#define REG_14_CALIB_TIME_15_0_SHIFT        0\n#define REG_14_CALIB_TIME_15_0_MASK         (0xFFFF << REG_14_CALIB_TIME_15_0_SHIFT)\n#define REG_14_CALIB_TIME_15_0(n)           BITFIELD_VAL(REG_14_CALIB_TIME_15_0, n)\n\n// REG_15\n#define REG_15_CALIB_TIME_19_16_SHIFT       0\n#define REG_15_CALIB_TIME_19_16_MASK        (0xF << REG_15_CALIB_TIME_19_16_SHIFT)\n#define REG_15_CALIB_TIME_19_16(n)          BITFIELD_VAL(REG_15_CALIB_TIME_19_16, n)\n#define REG_15_RESERVED_49_39_SHIFT         4\n#define REG_15_RESERVED_49_39_MASK          (0x7FF << REG_15_RESERVED_49_39_SHIFT)\n#define REG_15_RESERVED_49_39(n)            BITFIELD_VAL(REG_15_RESERVED_49_39, n)\n#define REG_15_CALIB_START                  (1 << 15)\n\n// REG_16\n#define REG_16_INTR_MASK_SHIFT              0\n#define REG_16_INTR_MASK_MASK               (0x3 << REG_16_INTR_MASK_SHIFT)\n#define REG_16_INTR_MASK(n)                 BITFIELD_VAL(REG_16_INTR_MASK, n)\n#define REG_16_RESERVED_63_50_SHIFT         2\n#define REG_16_RESERVED_63_50_MASK          (0x3FFF << REG_16_RESERVED_63_50_SHIFT)\n#define REG_16_RESERVED_63_50(n)            BITFIELD_VAL(REG_16_RESERVED_63_50, n)\n\n// REG_17\n#define REG_17_O_CNT_PLL_15_0_SHIFT         0\n#define REG_17_O_CNT_PLL_15_0_MASK          (0xFFFF << REG_17_O_CNT_PLL_15_0_SHIFT)\n#define REG_17_O_CNT_PLL_15_0(n)            BITFIELD_VAL(REG_17_O_CNT_PLL_15_0, n)\n\n// REG_18\n#define REG_18_O_CNT_PLL_24_16_SHIFT        0\n#define REG_18_O_CNT_PLL_24_16_MASK         (0x1FF << REG_18_O_CNT_PLL_24_16_SHIFT)\n#define REG_18_O_CNT_PLL_24_16(n)           BITFIELD_VAL(REG_18_O_CNT_PLL_24_16, n)\n\n// REG_19\n#define REG_19_O_INTR_STATUS_SHIFT          0\n#define REG_19_O_INTR_STATUS_MASK           (0x3 << REG_19_O_INTR_STATUS_SHIFT)\n#define REG_19_O_INTR_STATUS(n)             BITFIELD_VAL(REG_19_O_INTR_STATUS, n)\n\n// REG_1A\n#define REG_1A_HS_TEST                      (1 << 0)\n#define REG_1A_FS_TEST                      (1 << 1)\n#define REG_1A_USBINSERT_DET_EN             (1 << 2)\n#define REG_1A_USBINSERT_INTR_EN            (1 << 3)\n#define REG_1A_INTR_CLR                     (1 << 4)\n#define REG_1A_POL_USB_RX_DP                (1 << 5)\n#define REG_1A_POL_USB_RX_DM                (1 << 6)\n#define REG_1A_DEBOUNCE_EN                  (1 << 7)\n#define REG_1A_NOLS_MODE                    (1 << 8)\n#define REG_1A_USB_INSERT_INTR_MSK          (1 << 9)\n#define REG_1A_PHY_TEST_GOON                (1 << 10)\n\n// REG_1B\n#define REG_1B_CFG_HS_PDATA_SHIFT           0\n#define REG_1B_CFG_HS_PDATA_MASK            (0xFF << REG_1B_CFG_HS_PDATA_SHIFT)\n#define REG_1B_CFG_HS_PDATA(n)              BITFIELD_VAL(REG_1B_CFG_HS_PDATA, n)\n#define REG_1B_CFG_HS_P_ON_SHIFT            8\n#define REG_1B_CFG_HS_P_ON_MASK             (0xFF << REG_1B_CFG_HS_P_ON_SHIFT)\n#define REG_1B_CFG_HS_P_ON(n)               BITFIELD_VAL(REG_1B_CFG_HS_P_ON, n)\n\n// REG_20\n#define REG_20_RB_BISTERR_CAUSE_SHIFT       0\n#define REG_20_RB_BISTERR_CAUSE_MASK        (0x7 << REG_20_RB_BISTERR_CAUSE_SHIFT)\n#define REG_20_RB_BISTERR_CAUSE(n)          BITFIELD_VAL(REG_20_RB_BISTERR_CAUSE, n)\n\n// REG_21\n#define REG_21_RB_BIST_FAIL                 (1 << 0)\n#define REG_21_RB_BIST_DONE                 (1 << 1)\n#define REG_21_RB_CHIRP_ON                  (1 << 2)\n#define REG_21_RB_ADP_SNS_EN                (1 << 3)\n#define REG_21_RB_ADP_PRB_EN                (1 << 4)\n#define REG_21_RB_ADP_DISCHRG               (1 << 5)\n#define REG_21_RB_ADP_CHRG                  (1 << 6)\n#define REG_21_RB_UTMISRP_DISCHRGVBUS       (1 << 7)\n#define REG_21_RB_UTMISRP_CHRGVBUS          (1 << 8)\n#define REG_21_RB_UTMIOTG_IDPULLUP          (1 << 9)\n#define REG_21_RB_UTMIOTG_DPPULLDOWN        (1 << 10)\n#define REG_21_RB_UTMIOTG_DMPULLDOWN        (1 << 11)\n#define REG_21_RB_UTMIOTG_DRVVBUS           (1 << 12)\n\n// REG_22\n#define REG_22_CFG_RESETNTX                 (1 << 0)\n#define REG_22_CFG_RESETNRX                 (1 << 1)\n#define REG_22_CFG_CKTX_EN                  (1 << 2)\n#define REG_22_CFG_CKRX_EN                  (1 << 3)\n#define REG_22_CFG_FORCE_TXCK               (1 << 4)\n#define REG_22_CFG_FORCE_RXCK               (1 << 5)\n#define REG_22_CFG_FORCE_CDRCK              (1 << 6)\n#define REG_22_CFG_MODE_S_ON                (1 << 7)\n#define REG_22_CFG_RESETNFRE                (1 << 8)\n#define REG_22_CFG_RESETNOSC                (1 << 9)\n#define REG_22_CFG_DIG_LOOP                 (1 << 10)\n#define REG_22_RESERVED_83_78_SHIFT         11\n#define REG_22_RESERVED_83_78_MASK          (0x1F << REG_22_RESERVED_83_78_SHIFT)\n#define REG_22_RESERVED_83_78(n)            BITFIELD_VAL(REG_22_RESERVED_83_78, n)\n\n// REG_23\n#define REG_23_O_CNT_OSC_15_0_SHIFT         0\n#define REG_23_O_CNT_OSC_15_0_MASK          (0xFFFF << REG_23_O_CNT_OSC_15_0_SHIFT)\n#define REG_23_O_CNT_OSC_15_0(n)            BITFIELD_VAL(REG_23_O_CNT_OSC_15_0, n)\n\n// REG_24\n#define REG_24_O_CNT_OSC_19_16_SHIFT        0\n#define REG_24_O_CNT_OSC_19_16_MASK         (0x1F << REG_24_O_CNT_OSC_19_16_SHIFT)\n#define REG_24_O_CNT_OSC_19_16(n)           BITFIELD_VAL(REG_24_O_CNT_OSC_19_16, n)\n\n// REG_25\n#define REG_25_USB_STATUS_RX_DP             (1 << 0)\n#define REG_25_USB_STATUS_RX_DM             (1 << 1)\n\n// REG_30\n#define REG_30_REV_REG30_SHIFT              0\n#define REG_30_REV_REG30_MASK               (0xFFFF << REG_30_REV_REG30_SHIFT)\n#define REG_30_REV_REG30(n)                 BITFIELD_VAL(REG_30_REV_REG30, n)\n\n// REG_31\n#define REG_31_REV_REG31_SHIFT              0\n#define REG_31_REV_REG31_MASK               (0xFFFF << REG_31_REV_REG31_SHIFT)\n#define REG_31_REV_REG31(n)                 BITFIELD_VAL(REG_31_REV_REG31, n)\n\n// REG_32\n#define REG_32_REV_REG32_SHIFT              0\n#define REG_32_REV_REG32_MASK               (0xFFFF << REG_32_REV_REG32_SHIFT)\n#define REG_32_REV_REG32(n)                 BITFIELD_VAL(REG_32_REV_REG32, n)\n\n// REG_33\n#define REG_33_CFG_ANA_REV_SHIFT            0\n#define REG_33_CFG_ANA_REV_MASK             (0xFFFF << REG_33_CFG_ANA_REV_SHIFT)\n#define REG_33_CFG_ANA_REV(n)               BITFIELD_VAL(REG_33_CFG_ANA_REV, n)\n\n// REG_61\n#define REG_61_USB_LDO_VOUT_SET_SHIFT       0\n#define REG_61_USB_LDO_VOUT_SET_MASK        (0xF << REG_61_USB_LDO_VOUT_SET_SHIFT)\n#define REG_61_USB_LDO_VOUT_SET(n)          BITFIELD_VAL(REG_61_USB_LDO_VOUT_SET, n)\n#define REG_61_USB_LDO_OCP                  (1 << 4)\n#define REG_61_USB_LDO_SOFT_START           (1 << 5)\n#define REG_61_USB_LDO_PULL_DOWN            (1 << 6)\n#define REG_61_USB_LDO_BYPASS               (1 << 7)\n#define REG_61_USB_LDO_EN                   (1 << 8)\n#define REG_61_USB_LDO_SOFT_CNT_SHIFT       9\n#define REG_61_USB_LDO_SOFT_CNT_MASK        (0xF << REG_61_USB_LDO_SOFT_CNT_SHIFT)\n#define REG_61_USB_LDO_SOFT_CNT(n)          BITFIELD_VAL(REG_61_USB_LDO_SOFT_CNT, n)\n\n// REG_62\n#define REG_62_PLL_LDO_PU                   (1 << 0)\n#define REG_62_PLL_LDO_VREF_SHIFT           1\n#define REG_62_PLL_LDO_VREF_MASK            (0x7 << REG_62_PLL_LDO_VREF_SHIFT)\n#define REG_62_PLL_LDO_VREF(n)              BITFIELD_VAL(REG_62_PLL_LDO_VREF, n)\n#define REG_62_PLL_LDO_PRECHARGE            (1 << 4)\n#define REG_62_PLL_PFD_DNDLY_SHIFT          5\n#define REG_62_PLL_PFD_DNDLY_MASK           (0x7 << REG_62_PLL_PFD_DNDLY_SHIFT)\n#define REG_62_PLL_PFD_DNDLY(n)             BITFIELD_VAL(REG_62_PLL_PFD_DNDLY, n)\n#define REG_62_PLL_PFD_RST                  (1 << 8)\n#define REG_62_PLL_PFD_UPDLY_SHIFT          9\n#define REG_62_PLL_PFD_UPDLY_MASK           (0x7 << REG_62_PLL_PFD_UPDLY_SHIFT)\n#define REG_62_PLL_PFD_UPDLY(n)             BITFIELD_VAL(REG_62_PLL_PFD_UPDLY, n)\n#define REG_62_PLL_LPF_BW_SEL               (1 << 12)\n#define REG_62_PLL_UP_CP                    (1 << 13)\n\n// REG_63\n#define REG_63_PLL_CP_REN_SHIFT             0\n#define REG_63_PLL_CP_REN_MASK              (0xF << REG_63_PLL_CP_REN_SHIFT)\n#define REG_63_PLL_CP_REN(n)                BITFIELD_VAL(REG_63_PLL_CP_REN, n)\n#define REG_63_PLL_CP_SWRC_SHIFT            4\n#define REG_63_PLL_CP_SWRC_MASK             (0x3 << REG_63_PLL_CP_SWRC_SHIFT)\n#define REG_63_PLL_CP_SWRC(n)               BITFIELD_VAL(REG_63_PLL_CP_SWRC, n)\n#define REG_63_PLL_PRECHARGE                (1 << 6)\n#define REG_63_PLL_PU_VCO                   (1 << 7)\n#define REG_63_PLL_VAA_SWRA_SHIFT           8\n#define REG_63_PLL_VAA_SWRA_MASK            (0x3 << REG_63_PLL_VAA_SWRA_SHIFT)\n#define REG_63_PLL_VAA_SWRA(n)              BITFIELD_VAL(REG_63_PLL_VAA_SWRA, n)\n#define REG_63_PLL_VAA_SPD_SHIFT            10\n#define REG_63_PLL_VAA_SPD_MASK             (0x7 << REG_63_PLL_VAA_SPD_SHIFT)\n#define REG_63_PLL_VAA_SPD(n)               BITFIELD_VAL(REG_63_PLL_VAA_SPD, n)\n#define REG_63_PLL_PU_DIG                   (1 << 13)\n#define REG_63_PLL_SDM_CLK_SET              (1 << 14)\n#define REG_63_PLL_TST_EN                   (1 << 15)\n\n// REG_64\n#define REG_64_PLL_DIG_SWRC_SHIFT           0\n#define REG_64_PLL_DIG_SWRC_MASK            (0x3 << REG_64_PLL_DIG_SWRC_SHIFT)\n#define REG_64_PLL_DIG_SWRC(n)              BITFIELD_VAL(REG_64_PLL_DIG_SWRC, n)\n#define REG_64_PLL_DIV_DELAY_SHIFT          2\n#define REG_64_PLL_DIV_DELAY_MASK           (0xF << REG_64_PLL_DIV_DELAY_SHIFT)\n#define REG_64_PLL_DIV_DELAY(n)             BITFIELD_VAL(REG_64_PLL_DIV_DELAY, n)\n#define REG_64_PLL_DIV_FREE_SHIFT           6\n#define REG_64_PLL_DIV_FREE_MASK            (0x3 << REG_64_PLL_DIV_FREE_SHIFT)\n#define REG_64_PLL_DIV_FREE(n)              BITFIELD_VAL(REG_64_PLL_DIV_FREE, n)\n#define REG_64_PLL_DIV_INT_SHIFT            8\n#define REG_64_PLL_DIV_INT_MASK             (0x7F << REG_64_PLL_DIV_INT_SHIFT)\n#define REG_64_PLL_DIV_INT(n)               BITFIELD_VAL(REG_64_PLL_DIV_INT, n)\n\n// REG_65\n#define REG_65_PLL_DIV_SET_SYNCLK_SHIFT     0\n#define REG_65_PLL_DIV_SET_SYNCLK_MASK      (0x7 << REG_65_PLL_DIV_SET_SYNCLK_SHIFT)\n#define REG_65_PLL_DIV_SET_SYNCLK(n)        BITFIELD_VAL(REG_65_PLL_DIV_SET_SYNCLK, n)\n#define REG_65_PLL_CAL_EN                   (1 << 3)\n#define REG_65_PLL_RETB                     (1 << 4)\n#define REG_65_PLL_FORCE_1K                 (1 << 5)\n#define REG_65_PLL_1K_ERR23                 (1 << 6)\n#define REG_65_PLL_1K_LONG                  (1 << 7)\n#define REG_65_PLL_1K_RSTB                  (1 << 8)\n#define REG_65_PLL_1K_WIN_SHIFT             9\n#define REG_65_PLL_1K_WIN_MASK              (0x7 << REG_65_PLL_1K_WIN_SHIFT)\n#define REG_65_PLL_1K_WIN(n)                BITFIELD_VAL(REG_65_PLL_1K_WIN, n)\n\n// REG_66\n#define REG_66_REG_USBPLL_RSTN_DR           (1 << 0)\n#define REG_66_REG_USBPLL_RSTN              (1 << 1)\n#define REG_66_REG_USBPLL_CLK_FBC_EDGE      (1 << 2)\n#define REG_66_REG_USBPLL_INT_DEC_SEL_SHIFT 3\n#define REG_66_REG_USBPLL_INT_DEC_SEL_MASK  (0x7 << REG_66_REG_USBPLL_INT_DEC_SEL_SHIFT)\n#define REG_66_REG_USBPLL_INT_DEC_SEL(n)    BITFIELD_VAL(REG_66_REG_USBPLL_INT_DEC_SEL, n)\n#define REG_66_REG_USBPLL_DITHER_BYPASS     (1 << 6)\n#define REG_66_REG_USBPLL_PRESCALER_DEL_SEL_SHIFT 7\n#define REG_66_REG_USBPLL_PRESCALER_DEL_SEL_MASK (0xF << REG_66_REG_USBPLL_PRESCALER_DEL_SEL_SHIFT)\n#define REG_66_REG_USBPLL_PRESCALER_DEL_SEL(n) BITFIELD_VAL(REG_66_REG_USBPLL_PRESCALER_DEL_SEL, n)\n#define REG_66_REG_USBPLL_PU_PLL_DR         (1 << 11)\n#define REG_66_REG_USBPLL_PU_PLL            (1 << 12)\n\n// REG_67\n#define REG_67_REG_USBPLL_DIV_DR            (1 << 0)\n#define REG_67_REG_USBPLL_DIV_FRAC_SHIFT    1\n#define REG_67_REG_USBPLL_DIV_FRAC_MASK     (0x3 << REG_67_REG_USBPLL_DIV_FRAC_SHIFT)\n#define REG_67_REG_USBPLL_DIV_FRAC(n)       BITFIELD_VAL(REG_67_REG_USBPLL_DIV_FRAC, n)\n#define REG_67_REG_USBPLL_DIV_INT_SHIFT     3\n#define REG_67_REG_USBPLL_DIV_INT_MASK      (0x7F << REG_67_REG_USBPLL_DIV_INT_SHIFT)\n#define REG_67_REG_USBPLL_DIV_INT(n)        BITFIELD_VAL(REG_67_REG_USBPLL_DIV_INT, n)\n\n// REG_6A\n#define REG_6A_REG_USBPLL_FREQ_EN           (1 << 3)\n#define REG_6A_EN960M_USB                   (1 << 5)\n#define REG_6A_ENUSB_DIG                    (1 << 6)\n#define REG_6A_ENUSB_PS                     (1 << 7)\n\n// REG_6B\n#define REG_6B_REG_USBPLL_FREQ_OFFSET_SHIFT 0\n#define REG_6B_REG_USBPLL_FREQ_OFFSET_MASK  (0x1FFFF << REG_6B_REG_USBPLL_FREQ_OFFSET_SHIFT)\n#define REG_6B_REG_USBPLL_FREQ_OFFSET(n)    BITFIELD_VAL(REG_6B_REG_USBPLL_FREQ_OFFSET, n)\n\n// REG_6C\n#define REG_6C_CHIP_ADDR_I2C_SHIFT          0\n#define REG_6C_CHIP_ADDR_I2C_MASK           (0x7F << REG_6C_CHIP_ADDR_I2C_SHIFT)\n#define REG_6C_CHIP_ADDR_I2C(n)             BITFIELD_VAL(REG_6C_CHIP_ADDR_I2C, n)\n\n// REG_6D\n#define REG_6D_REG_USBPLL_LDOPRECHG_TIMER_SHIFT 0\n#define REG_6D_REG_USBPLL_LDOPRECHG_TIMER_MASK (0x1F << REG_6D_REG_USBPLL_LDOPRECHG_TIMER_SHIFT)\n#define REG_6D_REG_USBPLL_LDOPRECHG_TIMER(n) BITFIELD_VAL(REG_6D_REG_USBPLL_LDOPRECHG_TIMER, n)\n#define REG_6D_REG_USBPLL_PRECHG_TIMER_SHIFT 5\n#define REG_6D_REG_USBPLL_PRECHG_TIMER_MASK (0x1F << REG_6D_REG_USBPLL_PRECHG_TIMER_SHIFT)\n#define REG_6D_REG_USBPLL_PRECHG_TIMER(n)   BITFIELD_VAL(REG_6D_REG_USBPLL_PRECHG_TIMER, n)\n#define REG_6D_REG_USBPLL_UP_TIMER_PD_SHIFT 10\n#define REG_6D_REG_USBPLL_UP_TIMER_PD_MASK  (0x1F << REG_6D_REG_USBPLL_UP_TIMER_PD_SHIFT)\n#define REG_6D_REG_USBPLL_UP_TIMER_PD(n)    BITFIELD_VAL(REG_6D_REG_USBPLL_UP_TIMER_PD, n)\n\nenum USBPHY_REG_T {\n    USBPHY_REG_00   = 0x00,\n    USBPHY_REG_01,\n    USBPHY_REG_02,\n    USBPHY_REG_03,\n    USBPHY_REG_04,\n    USBPHY_REG_05,\n    USBPHY_REG_06,\n    USBPHY_REG_07,\n    USBPHY_REG_08,\n    USBPHY_REG_09,\n    USBPHY_REG_0A,\n    USBPHY_REG_0B,\n    USBPHY_REG_0C,\n    USBPHY_REG_0D,\n    USBPHY_REG_0E,\n    USBPHY_REG_0F,\n    USBPHY_REG_10,\n    USBPHY_REG_11,\n    USBPHY_REG_12,\n    USBPHY_REG_13,\n    USBPHY_REG_14,\n    USBPHY_REG_15,\n    USBPHY_REG_16,\n    USBPHY_REG_17,\n    USBPHY_REG_18,\n    USBPHY_REG_19,\n    USBPHY_REG_1A,\n    USBPHY_REG_1B,\n\n    USBPHY_REG_20   = 0x20,\n    USBPHY_REG_21,\n    USBPHY_REG_22,\n    USBPHY_REG_23,\n    USBPHY_REG_24,\n    USBPHY_REG_25,\n\n    USBPHY_REG_30   = 0x30,\n    USBPHY_REG_31,\n    USBPHY_REG_32,\n\n    USBPHY_REG_61   = 0x61,\n    USBPHY_REG_62,\n    USBPHY_REG_63,\n    USBPHY_REG_64,\n    USBPHY_REG_65,\n    USBPHY_REG_66,\n    USBPHY_REG_67,\n    USBPHY_REG_68,\n    USBPHY_REG_69,\n    USBPHY_REG_6A,\n    USBPHY_REG_6B,\n    USBPHY_REG_6C,\n    USBPHY_REG_6D,\n};\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/ana/best2300p/usbphy_best2300p.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"cmsis_nvic.h\"\n#include \"hal_cmu.h\"\n#include \"hal_phyif.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"usbphy.h\"\n#include CHIP_SPECIFIC_HDR(reg_usbphy)\n\n#ifdef CHIP_HAS_SPIPHY\n\n//#define USBPHY_SERIAL_ITF\n\nvoid usbphy_ldo_config(int enable) {\n  int ret;\n  uint16_t val;\n\n  ret = hal_phyif_open(SPIPHY_USB_CS);\n  if (ret) {\n    hal_phyif_close(SPIPHY_USB_CS);\n    return;\n  }\n\n  if (enable) {\n#ifdef USB_HIGH_SPEED\n    // USB ldo voltage should match with vcore (now 0.9V)\n    usbphy_write(0x61, 0x1118);\n#else\n    usbphy_write(0x61, 0x1116);\n#endif\n    usbphy_write(0x62, 0x2229);\n    usbphy_write(0x63, 0x0D82);\n\n    hal_sys_timer_delay(MS_TO_TICKS(1));\n  } else {\n    usbphy_write(0x63, 0x0000);\n    usbphy_write(0x62, 0x0000);\n\n    usbphy_read(0x61, &val);\n    val &= (0x1 << 8);\n    usbphy_write(0x61, val);\n\n    hal_sys_timer_delay(2);\n    hal_phyif_close(SPIPHY_USB_CS);\n  }\n}\n\nvoid usbphy_open(void) {\n  unsigned short val_01, val;\n\n#ifdef USB_HIGH_SPEED\n\n  usbphy_read(0x01, &val_01);\n  val_01 &= ~((1 << 0) | (1 << 11));\n  usbphy_write(0x01, val_01);\n  val_01 |= (1 << 1) | (1 << 2) | (1 << 3) | (1 << 13);\n#ifdef USBPHY_SERIAL_ITF\n  // cdr_clk polariy=1\n  val_01 |= (1 << 4);\n#else\n  // cdr_clk polariy=0\n  val_01 &= ~(1 << 4);\n#endif\n  usbphy_write(0x01, val_01);\n\n  usbphy_read(0x02, &val);\n  val = (val & ~(0x1F << 10)) | (0xC << 10);\n  usbphy_write(0x02, val);\n\n  usbphy_read(0x05, &val);\n  val |= (1 << 8);\n  usbphy_write(0x05, val);\n\n#ifdef USBPHY_SERIAL_ITF\n  usbphy_write(0x06, 0x4EE9);\n#else\n  usbphy_write(0x06, 0xCEE8);\n#endif\n\n  usbphy_write(0x07, 0x9813);\n\n  usbphy_read(0x08, &val);\n  usbphy_write(0x08, val);\n\n  usbphy_read(0x09, &val);\n  usbphy_write(0x09, val);\n\n#ifdef USBPHY_SERIAL_ITF\n  usbphy_write(0x0D, 0x2B1E);\n#else\n  usbphy_write(0x0D, 0x2A1E);\n#endif\n\n  // Disable force clocks, and disable hs son signal\n  usbphy_write(0x22, 0x030F);\n\n  // Ignore all UTMI errors\n  usbphy_write(0x12, 0x0003);\n\n  hal_sys_timer_delay(MS_TO_TICKS(1));\n\n  val_01 |= (1 << 0);\n  usbphy_write(0x01, val_01);\n\n#ifdef USB_HS_LOOPBACK_TEST\n  usbphy_read(0x0A, &val);\n  val |= (1 << 3) | (1 << 4) | (1 << 6);\n  usbphy_write(0x0A, val);\n  usbphy_read(0x0B, &val);\n  val &= ~((1 << 3) | (1 << 4) | (3 << 6));\n  usbphy_write(0x0B, val);\n  usbphy_read(0x09, &val);\n  usbphy_write(0x09, val);\n  usbphy_read(0x06, &val);\n  usbphy_write(0x06, val);\n\n  hal_sys_timer_delay(MS_TO_TICKS(1));\n\n#define LOOPBACK_PATTERN (*(volatile uint8_t *)0x20000004)\n\n  LOOPBACK_PATTERN = 0;\n  uint8_t pattern = LOOPBACK_PATTERN;\n\n  // Set tx pattern\n  usbphy_read(0x03, &val);\n  val = (val & ~(0xFF << 8)) | (pattern << 8);\n  usbphy_write(0x03, val);\n\n  // Enable force clocks\n  usbphy_read(0x22, &val);\n  val |= (1 << 4) | (1 << 5) | (1 << 6);\n  usbphy_write(0x22, val);\n\n  // Enable tx\n  usbphy_read(0x04, &val);\n  val |= (1 << 1);\n  usbphy_write(0x04, val);\n\n  // Update tx pattern\n  while (1) {\n    if (pattern != LOOPBACK_PATTERN) {\n      pattern = LOOPBACK_PATTERN;\n      usbphy_read(0x03, &val);\n      val = (val & ~(0xFF << 8)) | (pattern << 8);\n      usbphy_write(0x03, val);\n    }\n  }\n#endif\n\n#else // !USB_HIGH_SPEED\n\n  usbphy_read(0x01, &val_01);\n  val_01 &= ~(1 << 0);\n  usbphy_write(0x01, val_01);\n  val_01 |= (1 << 3);\n  usbphy_write(0x01, val_01);\n\n#ifdef USB_USE_USBPLL\n  val_01 |= (1 << 2) | (1 << 12);\n  usbphy_write(0x01, val_01);\n\n  usbphy_read(0x33, &val);\n  val |= (1 << 0);\n  usbphy_write(0x33, val);\n#endif\n\n  val = 0;\n  usbphy_write(0x06, val);\n\n  usbphy_read(0x07, &val);\n  usbphy_write(0x07, val);\n\n  val = 0;\n  usbphy_write(0x08, val);\n\n  val = 0;\n  usbphy_write(0x09, val);\n\n  val_01 |= (1 << 0);\n  usbphy_write(0x01, val_01);\n\n#endif // USB_HIGH_SPEED\n}\n\nvoid usbphy_close(void) {}\n\nvoid usbphy_sleep(void) {\n  uint16_t val;\n\n  usbphy_read(0x01, &val);\n#ifdef USB_HIGH_SPEED\n  val &= ~((1 << 1) | (1 << 2) | (1 << 3));\n#elif defined(USB_USE_USBPLL)\n  val &= ~((1 << 2) | (1 << 3));\n#else\n  val &= ~(1 << 3);\n#endif\n  usbphy_write(0x01, val);\n\n#if !defined(USB_HIGH_SPEED) && defined(USB_USE_USBPLL)\n  usbphy_read(0x33, &val);\n  val &= ~(1 << 0);\n  usbphy_write(0x33, val);\n#endif\n\n  usbphy_write(0x62, 0x0000);\n  usbphy_write(0x63, 0x0000);\n}\n\nvoid usbphy_wakeup(void) {\n  uint16_t val;\n\n  usbphy_write(0x62, 0x2229);\n  usbphy_write(0x63, 0x0D82);\n\n#if !defined(USB_HIGH_SPEED) && defined(USB_USE_USBPLL)\n  usbphy_read(0x33, &val);\n  val |= (1 << 0);\n  usbphy_write(0x33, val);\n#endif\n\n  usbphy_read(0x01, &val);\n#ifdef USB_HIGH_SPEED\n  val |= (1 << 1) | (1 << 2) | (1 << 3);\n#elif defined(USB_USE_USBPLL)\n  val |= (1 << 2) | (1 << 3);\n#else\n  val |= (1 << 3);\n#endif\n  usbphy_write(0x01, val);\n}\n\n//============================================================================================\n// USB Pin Status Check\n//============================================================================================\n\nstatic enum PMU_USB_PIN_CHK_STATUS_T usb_pin_status;\n\nstatic PMU_USB_PIN_CHK_CALLBACK usb_pin_callback;\n\nstatic int pmu_usb_check_pin_status(enum PMU_USB_PIN_CHK_STATUS_T status) {\n  int dp, dm;\n\n  pmu_usb_get_pin_status(&dp, &dm);\n\n  // TRACE(5,\"[%X] %s: status=%d dp=%d dm=%d\", hal_sys_timer_get(),\n  // __FUNCTION__, status, dp, dm);\n\n  // HOST_RESUME: (resume) dp == 0 && dm == 1, (reset) dp == 0 && dm == 0\n\n  if ((status == PMU_USB_PIN_CHK_DEV_CONN && (dp == 1 && dm == 0)) ||\n      (status == PMU_USB_PIN_CHK_DEV_DISCONN && (dp == 0 && dm == 0)) ||\n      (status == PMU_USB_PIN_CHK_HOST_RESUME && dp == 0)) {\n    return 1;\n  }\n\n  return 0;\n}\n\nstatic void pmu_usb_pin_irq_handler(void) {\n  uint16_t val;\n  uint32_t lock;\n\n  // TRACE(2,\"[%X] %s\", hal_sys_timer_get(), __FUNCTION__);\n\n  lock = int_lock();\n  usbphy_read(USBPHY_REG_1A, &val);\n  val |= REG_1A_INTR_CLR;\n  usbphy_write(USBPHY_REG_1A, val);\n  int_unlock(lock);\n\n  if (usb_pin_callback) {\n    if (pmu_usb_check_pin_status(usb_pin_status)) {\n      pmu_usb_disable_pin_status_check();\n      usb_pin_callback(usb_pin_status);\n    }\n  }\n}\n\nint pmu_usb_config_pin_status_check(enum PMU_USB_PIN_CHK_STATUS_T status,\n                                    PMU_USB_PIN_CHK_CALLBACK callback,\n                                    int enable) {\n  uint16_t val;\n  uint32_t lock;\n\n  // TRACE(3,\"[%X] %s: status=%d\", hal_sys_timer_get(), __FUNCTION__, status);\n\n  if (status >= PMU_USB_PIN_CHK_STATUS_QTY) {\n    return 1;\n  }\n\n  NVIC_DisableIRQ(USB_PIN_IRQn);\n\n  lock = int_lock();\n\n  usb_pin_status = status;\n  usb_pin_callback = callback;\n\n  usbphy_read(USBPHY_REG_1A, &val);\n\n  // Mask the irq\n  val &= ~REG_1A_USB_INSERT_INTR_MSK;\n\n  // Config pin check\n  val |= REG_1A_DEBOUNCE_EN | REG_1A_NOLS_MODE | REG_1A_USBINSERT_DET_EN;\n\n  val &= ~(REG_1A_POL_USB_RX_DP | REG_1A_POL_USB_RX_DM);\n  if (status == PMU_USB_PIN_CHK_DEV_CONN) {\n    // Check dp 0->1, dm x->0\n  } else if (status == PMU_USB_PIN_CHK_DEV_DISCONN) {\n    // Check dp 1->0, dm x->0\n    val |= REG_1A_POL_USB_RX_DP;\n  } else if (status == PMU_USB_PIN_CHK_HOST_RESUME) {\n    // Check dp 1->0, dm 0->1 (resume) or dm 0->0 (reset)\n    val |= REG_1A_POL_USB_RX_DP;\n  }\n\n  if (status != PMU_USB_PIN_CHK_NONE && callback) {\n    val |=\n        REG_1A_USBINSERT_INTR_EN | REG_1A_USB_INSERT_INTR_MSK | REG_1A_INTR_CLR;\n  }\n\n  usbphy_write(USBPHY_REG_1A, val);\n\n  int_unlock(lock);\n\n  if (enable) {\n    // Wait at least 10 cycles of 32K clock for the new status when signal\n    // checking polarity is changed\n    hal_sys_timer_delay(5);\n    pmu_usb_enable_pin_status_check();\n  }\n\n  return 0;\n}\n\nvoid pmu_usb_enable_pin_status_check(void) {\n  uint16_t val;\n  uint32_t lock;\n\n  if (usb_pin_status != PMU_USB_PIN_CHK_NONE && usb_pin_callback) {\n    lock = int_lock();\n    usbphy_read(USBPHY_REG_1A, &val);\n    val |= REG_1A_INTR_CLR;\n    usbphy_write(USBPHY_REG_1A, val);\n    int_unlock(lock);\n    NVIC_ClearPendingIRQ(USB_PIN_IRQn);\n\n    if (pmu_usb_check_pin_status(usb_pin_status)) {\n      pmu_usb_disable_pin_status_check();\n      usb_pin_callback(usb_pin_status);\n      return;\n    }\n\n    NVIC_SetVector(USB_PIN_IRQn, (uint32_t)pmu_usb_pin_irq_handler);\n    NVIC_SetPriority(USB_PIN_IRQn, IRQ_PRIORITY_NORMAL);\n    NVIC_EnableIRQ(USB_PIN_IRQn);\n  }\n}\n\nvoid pmu_usb_disable_pin_status_check(void) {\n  uint16_t val;\n  uint32_t lock;\n\n  NVIC_DisableIRQ(USB_PIN_IRQn);\n\n  lock = int_lock();\n\n  usbphy_read(USBPHY_REG_1A, &val);\n  val &= ~(REG_1A_USBINSERT_INTR_EN | REG_1A_USBINSERT_DET_EN);\n  usbphy_write(USBPHY_REG_1A, val);\n\n  int_unlock(lock);\n}\n\nvoid pmu_usb_get_pin_status(int *dp, int *dm) {\n  uint16_t pol, val;\n\n  usbphy_read(USBPHY_REG_1A, &pol);\n  usbphy_read(USBPHY_REG_25, &val);\n\n  *dp = (!(pol & REG_1A_POL_USB_RX_DP)) ^ (!(val & REG_25_USB_STATUS_RX_DP));\n  *dm = (!(pol & REG_1A_POL_USB_RX_DM)) ^ (!(val & REG_25_USB_STATUS_RX_DM));\n}\n\n#endif\n"
  },
  {
    "path": "platform/drivers/ana/best2300p/usbphy_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __USBPHY_BEST2300P_H__\n#define __USBPHY_BEST2300P_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SPIPHY_USB_CS                       0\n\n#define SPIPHY_USB_REG(reg)                 (((reg) & 0xFFF) | (SPIPHY_USB_CS << 12))\n\nvoid usbphy_ldo_config(int enable);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/ana/pmu.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PMU_H__\n#define __PMU_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \n#include \"hal_analogif.h\"\n#include \"hal_cmu.h\"\n#include \"hal_gpio.h\"\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(pmu)\n\n#define PMU_DEBUG_TRACE(n, s, ...)          LOG_DUMMY(n, s, ##__VA_ARGS__)\n#define PMU_DEBUG_TRACE_IMM(n, s, ...)      LOG_INFO((n) | LOG_ATTR_IMM, s, ##__VA_ARGS__)\n#define PMU_INFO_TRACE_IMM(n, s, ...)       LOG_INFO((n) | LOG_ATTR_IMM, s, ##__VA_ARGS__)\n#define PMU_INFO_TRACE(n, s, ...)           LOG_INFO(n, s, ##__VA_ARGS__)\n\n#ifndef ISPI_PMU_REG\n#define ISPI_PMU_REG(reg)                   (reg)\n#endif\n#define pmu_read(reg, val)                  hal_analogif_reg_read(ISPI_PMU_REG(reg), val)\n#define pmu_write(reg, val)                 hal_analogif_reg_write(ISPI_PMU_REG(reg), val)\n\n#define  PMU_MANUAL_MODE                    1\n#define  PMU_AUTO_MODE                      0\n#define  PMU_LDO_ON                         1\n#define  PMU_LDO_OFF                        0\n#define  PMU_LP_MODE_ON                     1\n#define  PMU_LP_MODE_OFF                    0\n#define  PMU_DSLEEP_MODE_ON                 1\n#define  PMU_DSLEEP_MODE_OFF                0\n\nunion SECURITY_VALUE_T {\n    struct {\n        unsigned short security_en      :1;\n        unsigned short key_id           :3;\n        unsigned short key_chksum       :2;\n        unsigned short vendor_id        :6;\n        unsigned short vendor_chksum    :3;\n        unsigned short chksum           :1;\n    };\n    unsigned short reg;\n};\n\nenum PMU_CHARGER_STATUS_T {\n    PMU_CHARGER_PLUGIN,\n    PMU_CHARGER_PLUGOUT,\n    PMU_CHARGER_UNKNOWN,\n};\n\nenum PMU_POWER_ON_CAUSE_T {\n    PMU_POWER_ON_CAUSE_NONE,\n    PMU_POWER_ON_CAUSE_POWER_KEY,\n    PMU_POWER_ON_CAUSE_RTC,\n    PMU_POWER_ON_CAUSE_CHARGER_ACON,\n    PMU_POWER_ON_CAUSE_CHARGER_ACOFF,\n};\n\nenum PMU_USB_PIN_CHK_STATUS_T {\n    PMU_USB_PIN_CHK_NONE,\n    // Chip acts as host\n    PMU_USB_PIN_CHK_DEV_CONN,\n    // Chip acts as host\n    PMU_USB_PIN_CHK_DEV_DISCONN,\n    // Chip acts as device\n    PMU_USB_PIN_CHK_HOST_RESUME,\n\n    PMU_USB_PIN_CHK_STATUS_QTY\n};\n\nenum PMU_USB_CONFIG_TYPE_T {\n    PMU_USB_CONFIG_TYPE_NONE,\n    PMU_USB_CONFIG_TYPE_DEVICE,\n    PMU_USB_CONFIG_TYPE_HOST,\n};\n\nenum PMU_POWER_MODE_T {\n    PMU_POWER_MODE_NONE,\n    PMU_POWER_MODE_LDO,\n    PMU_POWER_MODE_ANA_DCDC,\n    PMU_POWER_MODE_DIG_DCDC,\n};\n\nenum PMU_VIORISE_REQ_USER_T {\n   PMU_VIORISE_REQ_USER_PWL0,\n   PMU_VIORISE_REQ_USER_PWL1,\n   PMU_VIORISE_REQ_USER_FLASH,\n   PMU_VIORISE_REQ_USER_CHARGER,\n\n   PMU_VIORISE_REQ_USER_QTY\n};\n\nstruct PMU_LED_BR_CFG_T {\n    uint16_t off_time_ms;\n    uint16_t on_time_ms;\n    uint16_t fade_time_ms;\n};\n\ntypedef void (*PMU_USB_PIN_CHK_CALLBACK)(enum PMU_USB_PIN_CHK_STATUS_T status);\n\ntypedef void (*PMU_RTC_IRQ_HANDLER_T)(uint32_t seconds);\n\ntypedef void (*PMU_CHARGER_IRQ_HANDLER_T)(enum PMU_CHARGER_STATUS_T status);\n\ntypedef void (*PMU_WDT_IRQ_HANDLER_T)(void);\n\ntypedef void (*PMU_IRQ_UNIFIED_HANDLER_T)(uint16_t irq_status);\n\nint pmu_open(void);\n\nvoid pmu_sleep(void);\n\nvoid pmu_wakeup(void);\n\nvoid pmu_mode_change(enum PMU_POWER_MODE_T mode);\n\nint pmu_get_security_value(union SECURITY_VALUE_T *val);\n\nvoid pmu_shutdown(void);\n\nvoid pmu_reset(void);\n\nint pmu_get_efuse(enum PMU_EFUSE_PAGE_T page, unsigned short *efuse);\n\nvoid pmu_codec_config(int enable);\n\nvoid pmu_anc_config(int enable);\n\nvoid pmu_usb_config(enum PMU_USB_CONFIG_TYPE_T type);\n\nvoid pmu_sleep_en(unsigned char sleep_en);\n\nvoid pmu_flash_write_config(void);\n\nvoid pmu_flash_read_config(void);\n\nvoid pmu_flash_freq_config(uint32_t freq);\n\nvoid pmu_psram_freq_config(uint32_t freq);\n\nvoid pmu_fir_high_speed_config(int enable);\n\nvoid pmu_iir_freq_config(uint32_t freq);\n\nvoid pmu_rs_freq_config(uint32_t freq);\n\nvoid pmu_sys_freq_config(enum HAL_CMU_FREQ_T freq);\n\nvoid pmu_high_performance_mode_enable(bool enable);\n\nvoid pmu_charger_init(void);\n\nvoid pmu_charger_set_irq_handler(PMU_CHARGER_IRQ_HANDLER_T handler);\n\nvoid pmu_charger_plugin_config(void);\n\nvoid pmu_charger_plugout_config(void);\n\nenum PMU_CHARGER_STATUS_T pmu_charger_get_status(void);\n\nint pmu_usb_config_pin_status_check(enum PMU_USB_PIN_CHK_STATUS_T status, PMU_USB_PIN_CHK_CALLBACK callback, int enable);\n\nvoid pmu_usb_enable_pin_status_check(void);\n\nvoid pmu_usb_disable_pin_status_check(void);\n\nvoid pmu_usb_get_pin_status(int *dp, int *dm);\n\nvoid pmu_rtc_enable(void);\n\nvoid pmu_rtc_disable(void);\n\nint pmu_rtc_enabled(void);\n\nvoid pmu_rtc_set(uint32_t seconds);\n\nuint32_t pmu_rtc_get(void);\n\nvoid pmu_rtc_set_alarm(uint32_t seconds);\n\nuint32_t pmu_rtc_get_alarm(void);\n\nvoid pmu_rtc_clear_alarm(void);\n\nint pmu_rtc_alarm_status_set(void);\n\nint pmu_rtc_alarm_alerted();\n\nvoid pmu_rtc_set_irq_handler(PMU_RTC_IRQ_HANDLER_T handler);\n\nvoid pmu_viorise_req(enum PMU_VIORISE_REQ_USER_T user, bool rise);\n\nenum PMU_POWER_ON_CAUSE_T pmu_get_power_on_cause(void);\n\nint pmu_debug_config_ana(uint16_t volt);\n\nint pmu_debug_config_codec(uint16_t volt);\n\nint pmu_debug_config_audio_output(bool diff);\n\nint pmu_debug_config_vcrystal(bool on);\n\nvoid pmu_debug_reliability_test(int stage);\n\nvoid pmu_at_skip_shutdown(bool enable);\n\nvoid pmu_led_set_direction(enum HAL_GPIO_PIN_T pin, enum HAL_GPIO_DIR_T dir);\n\nenum HAL_GPIO_DIR_T pmu_led_get_direction(enum HAL_GPIO_PIN_T pin);\n\nvoid pmu_led_set_voltage_domains(enum HAL_IOMUX_PIN_T pin, enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt);\n\nvoid pmu_led_set_pull_select(enum HAL_IOMUX_PIN_T pin, enum HAL_IOMUX_PIN_PULL_SELECT_T pull_sel);\n\nvoid pmu_led_set_value(enum HAL_GPIO_PIN_T pin, int data);\n\nint pmu_led_get_value(enum HAL_GPIO_PIN_T pin);\n\nvoid pmu_wdt_set_irq_handler(PMU_WDT_IRQ_HANDLER_T handler);\n\nint pmu_wdt_config(uint32_t irq_ms, uint32_t reset_ms);\n\nvoid pmu_wdt_start(void);\n\nvoid pmu_wdt_stop(void);\n\nvoid pmu_wdt_feed(void);\n\nvoid pmu_ntc_capture_enable(void);\n\nvoid pmu_ntc_capture_disable(void);\n\nint pmu_set_irq_unified_handler(enum PMU_IRQ_TYPE_T type, PMU_IRQ_UNIFIED_HANDLER_T hdlr);\n\nenum HAL_PWRKEY_IRQ_T pmu_pwrkey_irq_value_to_state(uint16_t irq_status);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/ana/psramuhsphy.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PSRAMUHSPHY_H__\n#define __PSRAMUHSPHY_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(psramuhsphy)\n#include \"hal_phyif.h\"\n\n#ifdef SPIPHY_PSRAMUHS0_REG\n#define SPI_PSRAMUHSPHY0_REG(reg)       SPIPHY_PSRAMUHS0_REG(reg)\n#else\n#define SPI_PSRAMUHSPHY0_REG(reg)       (reg)\n#endif\n\n#ifdef SPIPHY_PSRAMUHS1_REG\n#define SPI_PSRAMUHSPHY1_REG(reg)       SPIPHY_PSRAMUHS1_REG(reg)\n#else\n#define SPI_PSRAMUHSPHY1_REG(reg)       (reg)\n#endif\n\n#define psramuhsphy0_read(reg, val)     hal_phyif_reg_read(SPI_PSRAMUHSPHY0_REG(reg), val)\n#define psramuhsphy0_write(reg, val)    hal_phyif_reg_write(SPI_PSRAMUHSPHY0_REG(reg), val)\n\n#define psramuhsphy1_read(reg, val)     hal_phyif_reg_read(SPI_PSRAMUHSPHY1_REG(reg), val)\n#define psramuhsphy1_write(reg, val)    hal_phyif_reg_write(SPI_PSRAMUHSPHY1_REG(reg), val)\n\nvoid psramuhsphy_open(uint32_t clk);\n\nvoid psramuhsphy_init_calib(void);\n\nvoid psramuhsphy_calib(uint32_t clk);\n\nvoid psramuhsphy_sleep(void);\n\nvoid psramuhsphy_wakeup(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/ana/usbphy.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __USBPHY_H__\n#define __USBPHY_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(usbphy)\n#include \"hal_analogif.h\"\n#include \"hal_phyif.h\"\n\n#ifdef SPIPHY_USB_REG\n#define SPI_USBPHY_REG(reg)             SPIPHY_USB_REG(reg)\n#elif defined(ISPI_USBPHY_REG)\n#define SPI_USBPHY_REG(reg)             ISPI_USBPHY_REG(reg)\n#else\n#define SPI_USBPHY_REG(reg)             (reg)\n#endif\n\n#ifdef CHIP_HAS_SPIPHY\n#define usbphy_read(reg, val)           hal_phyif_reg_read(SPI_USBPHY_REG(reg), val)\n#define usbphy_write(reg, val)          hal_phyif_reg_write(SPI_USBPHY_REG(reg), val)\n#else\n#define usbphy_read(reg, val)           hal_analogif_reg_read(SPI_USBPHY_REG(reg), val)\n#define usbphy_write(reg, val)          hal_analogif_reg_write(SPI_USBPHY_REG(reg), val)\n#endif\n\nvoid usbphy_open(void);\n\nvoid usbphy_close(void);\n\nvoid usbphy_sleep(void);\n\nvoid usbphy_wakeup(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/bt/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nobj-y += $(CHIP)/\n\nsubdir-ccflags-y += \\\n    -Iapps/common \\\n    -Iplatform/drivers/bt \\\n    -Iplatform/drivers/ana \\\n    -Iservices/nvrecord \\\n    -Iutils/cqueue \\\n    -Iutils/heap\n\nifeq ($(BT_XTAL_SYNC),1)\nsubdir-ccflags-y += -DBT_XTAL_SYNC\nendif\n\nexport BT_DRV_UART_BRIDGE_FLAGS :=\nifneq ($(DEBUG_PORT),)\nBT_DRV_UART_BRIDGE_FLAGS += -DDEBUG_PORT=$(DEBUG_PORT)\nendif\n\nexport BT_DRV_FLAGS :=\nifeq ($(NO_SLEEP),1)\nBT_DRV_FLAGS += -DNO_SLEEP\nendif\n\nexport BT_DRV_CONFIG_FLAGS :=\nifeq ($(INTERSYS_NO_THREAD),1)\nBT_DRV_CONFIG_FLAGS += -D_INTERSYS_NO_THREAD_\nendif\n\nVCO_TEST_TOOL ?= 1\nifeq ($(VCO_TEST_TOOL),1)\nsubdir-ccflags-y += -DVCO_TEST_TOOL\nendif\n\nLAURENT_ALGORITHM ?= 0\nifeq ($(LAURENT_ALGORITHM),1)\nsubdir-ccflags-y += -DLAURENT_ALGORITHM\nendif\n\nFORCE_SCO_MAX_RETX ?= 0\nifeq ($(FORCE_SCO_MAX_RETX),1)\nsubdir-ccflags-y += -D__FORCE_SCO_MAX_RETX__\nendif\n\nCONTROLLER_DUMP_ENABLE ?= 0\nifeq ($(CONTROLLER_DUMP_ENABLE),1)\nsubdir-ccflags-y += -DCONTROLLER_DUMP_ENABLE=1\nendif\n\nBT_UART_LOG ?= 0\nifeq ($(BT_UART_LOG),1)\nsubdir-ccflags-y += -DBT_UART_LOG\nendif\n\nBT_UART_LOG_P16 ?= 0\nifeq ($(BT_UART_LOG_P16),1)\nsubdir-ccflags-y += -DBT_UART_LOG_P16\nendif\n\nLL_MONITOR ?= 0\nifeq ($(LL_MONITOR),1)\nsubdir-ccflags-y += -DLL_MONITOR=1\nendif\n\nSOFTBIT_EN ?= 0\nifeq ($(SOFTBIT_EN),1)\nsubdir-ccflags-y += -DSOFTBIT_EN=1\nendif\n\nACL_DATA_CRC_TEST ?= 0\nifeq ($(ACL_DATA_CRC_TEST),1)\nsubdir-ccflags-y += -DACL_DATA_CRC_TEST=1\nendif\n\nFA_RX_GAIN_CTRL ?= 0\nifeq ($(FA_RX_GAIN_CTRL),1)\nsubdir-ccflags-y += -D__FA_RX_GAIN_CTRL__\nendif\n\nBT_SYSTEM_52M ?= 0\nifeq ($(BT_SYSTEM_52M),1)\nsubdir-ccflags-y += -DBT_SYSTEM_52M\nendif\n\nifeq ($(BT_FA_ECC),1)\nsubdir-ccflags-y += -D__FASTACK_ECC_ENABLE__\nendif\n\nifeq ($(BT_FA_SCO_ECC),1)\nsubdir-ccflags-y += -D__FASTACK_SCO_ECC_ENABLE__\nendif\n\nifeq ($(BT_FA_ACL_ECC),1)\nsubdir-ccflags-y += -D__FASTACK_ACL_ECC_ENABLE__\nendif\n\nifeq ($(BT_FAST_LOCK_ENABLE),1)\nsubdir-ccflags-y += -DBT_FAST_LOCK_ENABLE\nendif\n\nBT_ECC_CONFIG_BLK ?= 0\nifneq ($(BT_ECC_CONFIG_BLK),0)\nsubdir-ccflags-y += -D__FASTACK_ECC_CONFIG_BLOCK__=$(BT_ECC_CONFIG_BLK)\nendif\n\nBES_FA_MODE ?= 0\nifeq ($(BES_FA_MODE),1)\nsubdir-ccflags-y += -D__BES_FA_MODE__\nendif\n\nNEW_SWAGC_MODE ?= 0\nifeq ($(NEW_SWAGC_MODE),1)\nsubdir-ccflags-y += -D__NEW_SWAGC_MODE__\nendif\n\nBLE_NEW_SWAGC_MODE ?= 0\nifeq ($(BLE_NEW_SWAGC_MODE),1)\nsubdir-ccflags-y += -D__BLE_NEW_SWAGC_MODE__\nendif\n\nifeq ($(BT_EXT_LNA_PA),1)\nKBUILD_CPPFLAGS += -DBT_EXT_LNA_PA\nifeq ($(BT_EXT_LNA),1)\nKBUILD_CPPFLAGS += -DBT_EXT_LNA\nendif\n\nifeq ($(BT_EXT_PA),1)\nKBUILD_CPPFLAGS += -DBT_EXT_PA\nendif\nendif\n\nifneq ($(BT_DEBUG_TPORTS),0)\nsubdir-ccflags-y += -DTPORT_TYPE=$(BT_DEBUG_TPORTS)\nendif\n\nexport CONTROLLER_DUMP_ENABLE ?= 0\nifeq ($(CONTROLLER_DUMP_ENABLE),1)\n\tKBUILD_CPPFLAGS += -DCONTROLLER_DUMP_ENABLE=1\nendif\n\nexport CONTROLLER_MEM_LOG_ENABLE ?= 0\nifeq ($(CONTROLLER_MEM_LOG_ENABLE),1)\n\tKBUILD_CPPFLAGS += -DCONTROLLER_MEM_LOG_ENABLE=1\nendif\n\n"
  },
  {
    "path": "platform/drivers/bt/besbt_string.h",
    "content": "#ifndef BESBT_STRING_H\n#define BESBT_STRING_H\n\n#include \"stddef.h\"\n#include \"stdint.h\"\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nsize_t  memcpy_s(void *dst,size_t dstMax,const void *src, size_t srcMax);\nsize_t  memset_s(void *,size_t,int,size_t);\n\n#ifdef __cplusplus\n}\n#endif\n\n\n#endif /* BES_STRING_H */\n\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nCFLAGS_bt_drv_uart_bridge_intsys.o += $(BT_DRV_UART_BRIDGE_FLAGS)\n\nCFLAGS_bt_drv.o += $(BT_DRV_FLAGS)\n\nCFLAGS_bt_drv_patch.o += $(BT_DRV_PATCH_FLAGS)\n\nCFLAGS_bt_drv_config.o += $(BT_DRV_CONFIG_FLAGS)\n\nTX_IQ_CAL ?= 0\nifeq ($(TX_IQ_CAL),1)\nsubdir-ccflags-y += -DTX_IQ_CAL\nendif\n\nsubdir-ccflags-y += -Iutils/crash_catcher/include\nsubdir-ccflags-y += -Iservices/nv_section/userdata_section\nccflags-y += $(BT_IF_INCLUDES)\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/bt_drv.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"bt_drv.h\"\n#include \"bt_drv_2300p_internal.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_internal.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_gpio.h\"\n#include \"hal_i2c.h\"\n#include \"hal_intersys.h\"\n#include \"hal_iomux.h\"\n#include \"hal_psc.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"nvrecord_dev.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"pmu.h\"\n#include \"string.h\"\n#include \n\nbool btdrv_dut_mode_enable = false;\n\nstatic volatile uint32_t btdrv_tx_flag = 1;\nvoid btdrv_tx(const unsigned char *data, unsigned int len) {\n  //  HciPacketSent(intersys_tx_pkt);\n  BT_DRV_TRACE(0, \"tx\");\n  //   osSignalSet(btdrv_intersys_tx_thread_id, 0x1);\n  btdrv_tx_flag = 1;\n}\n\nvoid btdrv_dut_accessible_mode_manager(const unsigned char *data);\n\nstatic unsigned int btdrv_rx(const unsigned char *data, unsigned int len) {\n  hal_intersys_stop_recv(HAL_INTERSYS_ID_0);\n\n  BT_DRV_TRACE(2, \"%s len:%d\", __func__, len);\n  BT_DRV_DUMP(\"%02x \", data, len > 7 ? 7 : len);\n  btdrv_dut_accessible_mode_manager(data);\n  hal_intersys_start_recv(HAL_INTERSYS_ID_0);\n\n  return len;\n}\n\nvoid btdrv_SendData(const uint8_t *buff, uint8_t len) {\n  btdrv_tx_flag = 0;\n\n  hal_intersys_send(HAL_INTERSYS_ID_0, HAL_INTERSYS_MSG_HCI, buff, len);\n  BT_DRV_TRACE(1, \"%s\", __func__);\n  BT_DRV_DUMP(\"%02x \", buff, len);\n  //    btdrv_delay(1);\n  while ((btdrv_dut_mode_enable == 0) && btdrv_tx_flag == 0)\n    ;\n}\n\n////open intersys interface for hci data transfer\nstatic bool hci_has_opened = false;\n\nvoid btdrv_hciopen(void) {\n  int ret = 0;\n\n  if (hci_has_opened) {\n    return;\n  }\n\n  hci_has_opened = true;\n\n  ret = hal_intersys_open(HAL_INTERSYS_ID_0, HAL_INTERSYS_MSG_HCI, btdrv_rx,\n                          btdrv_tx, false);\n\n  if (ret) {\n    BT_DRV_TRACE(0, \"Failed to open intersys\");\n    return;\n  }\n\n  hal_intersys_start_recv(HAL_INTERSYS_ID_0);\n}\n\n////open intersys interface for hci data transfer\nvoid btdrv_hcioff(void) {\n  if (!hci_has_opened) {\n    return;\n  }\n  hci_has_opened = false;\n\n  hal_intersys_close(HAL_INTERSYS_ID_0, HAL_INTERSYS_MSG_HCI);\n}\n\n/*  btdrv power on or off the bt controller*/\nvoid btdrv_poweron(uint8_t en) {\n  // power on bt controller\n  if (en) {\n    hal_psc_bt_enable();\n    hal_cmu_bt_clock_enable();\n    hal_cmu_bt_reset_clear();\n    hal_cmu_bt_module_init();\n    btdrv_delay(10);\n    // BTDM mode 4.2\n    BTDIGITAL_REG(0xC0000050) = 0x42;\n    btdrv_delay(100);\n  } else {\n    btdrv_delay(10);\n    hal_cmu_bt_reset_set();\n    hal_cmu_bt_clock_disable();\n    hal_psc_bt_disable();\n  }\n}\n\nvoid btdrv_rf_init_ext(void) {\n  unsigned int xtal_fcap;\n\n  if (!nvrec_dev_get_xtal_fcap(&xtal_fcap)) {\n    btdrv_rf_init_xtal_fcap(xtal_fcap);\n    btdrv_delay(1);\n    BT_DRV_TRACE(2, \"%s 0xc2=0x%x\", __func__, xtal_fcap);\n  } else {\n    btdrv_rf_init_xtal_fcap(DEFAULT_XTAL_FCAP);\n    BT_DRV_TRACE(1, \"%s failed\", __func__);\n  }\n}\n\nvoid tx_ramp_new(void) { return; }\n\nvoid bt_drv_extra_config_after_init(void) {\n#ifdef BT_RF_OLD_CORR_MODE\n  BTDIGITAL_REG(0xD03503A0) &= (~0x01); // clear bit 0 avoid slave lost data\n#endif\n  bt_drv_reg_op_afh_env_reset();\n}\n\n#ifdef __HW_AGC__\n\nuint16_t btdrv_2300_get_10bit_add_val(uint32_t val, uint8_t count) {\n  uint8_t i;\n  uint32_t new_val[32];\n  uint16_t add_val = 0;\n\n  for (i = 0; i < 32; i++) {\n    new_val[i] = (val & 1);\n    val = (val >> 1);\n  } // get val's each bit to new_val\n\n  for (i = (0 + count); i < (10 + count); i++) {\n    add_val |= (new_val[i] << (i - count));\n  }\n\n  return add_val;\n}\n\nuint16_t btdrv_2300_val_get_max_min_num(uint16_t *val) {\n  uint8_t i = 0;\n  uint8_t j = 0;\n  uint8_t k = 0;\n  uint16_t max = val[0];\n  uint16_t min = val[0];\n\n  for (i = 1; i < 10; i++) {\n    if (max < val[i]) {\n      max = val[i];\n      j = i;\n    } else if (min > val[i]) {\n      min = val[i];\n      k = i;\n    }\n  }\n  BT_DRV_TRACE(2, \"The max is:%x, j:%d\\n\", max, j);\n  BT_DRV_TRACE(2, \"The min is:%x, k:%d\\n\", min, k);\n  return ((j << 8) | k);\n}\n\nuint16_t btdrv_2300_get_average_val(uint16_t *val) {\n  uint8_t i = 0;\n  uint16_t num;\n  uint8_t max_num, min_num;\n  uint16_t add_val = 0;\n  uint16_t average_val;\n\n  num = btdrv_2300_val_get_max_min_num(val);\n\n  max_num = (uint8_t)((num & 0xff00) >> 8);\n  min_num = (uint8_t)(num & 0x00ff);\n  BT_DRV_TRACE(1, \"max_num:%d\\n\", max_num);\n  BT_DRV_TRACE(1, \"min_num:%d\\n\", min_num);\n\n  for (i = 0; i < 10; i++) {\n    BT_DRV_TRACE(2, \"val[%x]:%x\\n\", i, val[i]);\n    add_val += val[i];\n  }\n  add_val = (add_val - val[max_num] - val[min_num]);\n  BT_DRV_TRACE(1, \"add_val:%x\\n\", add_val);\n\n  average_val = add_val / 8;\n  return average_val;\n}\n\nunion cal_val {\n  struct {\n    int32_t val1 : 10;\n    int32_t val2 : 10;\n    int32_t val3 : 10;\n    uint32_t reverd_bit : 2;\n  };\n  volatile uint32_t reg;\n};\nvoid btdrv_2300_hwagc_dc_cal_1(void) {\n  uint32_t first_val;\n  volatile uint32_t value = 0;\n  //    int16_t bit_value1[10],bit_value2[10],bit_value3[10];//10bit\n  int32_t bit_average_val1 = 0, bit_average_val2 = 0, bit_average_val3 = 0;\n  uint32_t real_val;\n\n  union cal_val dccal_val;\n\n  btdrv_write_rf_reg(0xf3, 0x2c41); // i2v reset dr=1\n\n  btdrv_write_rf_reg(0xcf, 0xff32); // lna gain dr=1\n  btdrv_write_rf_reg(0xdf, 0x210f); // lna gain dr=1 //210f\n  btdrv_write_rf_reg(0xcd, 0x0040); // lna pdt gain\n\n  btdrv_write_rf_reg(0xd0, 0xf99f); // i2v flt gain dr=1\n\n  btdrv_write_rf_reg(0xaf, 0x00c0); // rx input pull down\n\n  // BTDIGITAL_REG(0xc000033c) = 0x00000100;\n\n  BTDIGITAL_REG(0xd02201e4) = 0x00000000; // rx continue\n  btdrv_delay(10);\n  BTDIGITAL_REG(0xd02201e4) = 0x000a0080;\n  btdrv_delay(10);\n\n  for (uint8_t i = 0; i < 10; i++) {\n    BTDIGITAL_REG(0xd03503b0) = 0x80000000;\n    btdrv_delay(1);\n    first_val = BTDIGITAL_REG(0xd03503b4);\n    BT_DRV_TRACE(1, \"first_val:%x\\n\", first_val);\n    BTDIGITAL_REG(0xd03503b0) = 0x80000000;\n  }\n\n  for (uint8_t i = 0; i < 10; i++) {\n    BTDIGITAL_REG(0xd03503b0) = 0x80000000;\n    btdrv_delay(1);\n    BT_DRV_TRACE(1, \"BTDIGITAL_REG(0xd03503b4):%x\\n\",\n                 BTDIGITAL_REG(0xd03503b4));\n    value = BTDIGITAL_REG(0xd03503b4);\n    BT_DRV_TRACE(2, \"%x:  value:%x\\n\", i, value);\n    dccal_val.reg = value;\n    bit_average_val1 += dccal_val.val1;\n    bit_average_val2 += dccal_val.val2;\n    bit_average_val3 += dccal_val.val3;\n    BT_DRV_TRACE(2, \"val1=%d,val3=%d\", dccal_val.val1, dccal_val.val3);\n  }\n\n  bit_average_val1 /= 10;\n\n#ifdef __HW_AGC_I2V_DISABLE_DC_CAL__\n  bit_average_val2 = 0;\n#else\n  bit_average_val2 /= 10;\n#endif\n  bit_average_val3 /= 10;\n\n  BT_DRV_TRACE(3, \"vaer1=%d,vaer2=%d,vaer3=%d\", bit_average_val1,\n               bit_average_val2, bit_average_val3);\n\n  dccal_val.val1 = bit_average_val1;\n  dccal_val.val2 = bit_average_val2;\n  dccal_val.val3 = bit_average_val3;\n  dccal_val.reverd_bit = 0;\n  //  real_val = (bit_average_val1 | (bit_average_val2 << 10) |\n  //  (bit_average_val3 << 20));\n  real_val = dccal_val.reg;\n  BT_DRV_TRACE(1, \"real_val:%x\\n\", real_val);\n  BTDIGITAL_REG(0xd03503b0) = real_val;\n\n  BTDIGITAL_REG(0xd02201e4) = 0x00000000;\n\n  btdrv_write_rf_reg(0xaf, 0x0000);\n\n  btdrv_write_rf_reg(0xf3, 0x0c41); // i2v reset dr=0\n\n  btdrv_write_rf_reg(0xcf, 0x7f32); // lna gain dr=0\n  btdrv_write_rf_reg(0xdf, 0x2006); // lna gain dr=0\n  btdrv_write_rf_reg(0xd0, 0xe91f); // i2v flt gain dr=0\n}\n\n#endif\n\nvoid btdrv_2300_rccal(void) {\n  uint16_t value;\n  uint16_t value_tmp;\n  uint16_t val_tmp1;\n  uint16_t val_tmp2;\n\n  btdrv_write_rf_reg(0x80, 0xa010);\n  btdrv_write_rf_reg(0xc4, 0xffff); //[5:4]=11,open rcosc bias\n  btdrv_write_rf_reg(0x80, 0xa000);\n\n  btdrv_write_rf_reg(0xb3, 0x33f3); //[9:8]=11,pwup rcosc\n\n  btdrv_delay(1);\n\n  BTDIGITAL_REG(0xd02201e4) = 0x00000000;\n  btdrv_delay(10);\n  BTDIGITAL_REG(0xd02201e4) = 0x000a0080;\n  btdrv_delay(10);\n\n  btdrv_write_rf_reg(0x80, 0xa010);\n  btdrv_write_rf_reg(0xd6, 0xf858); //[15]=1,enable clk counter\n  btdrv_write_rf_reg(0x80, 0xa000);\n\n  btdrv_delay(10);\n\n  btdrv_read_rf_reg(0xc0, &value);\n  BT_DRV_TRACE(1, \"btdrv_rccal 0xc0 value:%x\\n\", value);\n\n  btdrv_read_rf_reg(0x8b, &val_tmp1);\n  BT_DRV_TRACE(1, \"0x8b val_tmp1=%x\\n\", val_tmp1);\n\n  btdrv_read_rf_reg(0x8d, &val_tmp2);\n  BT_DRV_TRACE(1, \"0x8d val_tmp2=%x\\n\", val_tmp2);\n\n  value_tmp = value & 0x0fff;\n  if ((value_tmp < 0x0ff0) && (value_tmp > 0x0200) &&\n      ((value | 0xefff) == 0xffff)) {\n    BT_DRV_TRACE(0, \"0xc0 0x200 < value < 0xff0 done \\n\");\n    btdrv_write_rf_reg(\n        0x8b, ((((0x7c4 * 1000 / (value & 0x0fff)) * 0x90 / 1000) << 8) |\n               (val_tmp1 & 0x00ff)));\n    BT_DRV_TRACE(1, \"0x8b:%x\\n\",\n                 ((((0x7c4 * 1000 / (value & 0x0fff)) * 0x90 / 1000) << 8) |\n                  (val_tmp1 & 0x00ff)));\n    btdrv_read_rf_reg(0x8b, &val_tmp1);\n    BT_DRV_TRACE(1, \"chk 0x8b val_tmp1=%x\\n\", val_tmp1);\n    btdrv_write_rf_reg(\n        0x8d, ((((0x7c4 * 1000 / (value & 0x0fff)) * 0x28 / 1000) << 10) |\n               (val_tmp2 & 0x03ff)));\n    BT_DRV_TRACE(1, \"0x8d:%x\\n\",\n                 ((((0x7c4 * 1000 / (value & 0x0fff)) * 0x28 / 1000) << 10) |\n                  (val_tmp2 & 0x03ff)));\n    btdrv_read_rf_reg(0x8d, &val_tmp2);\n    BT_DRV_TRACE(1, \"chk 0x8d val_tmp2=%x\\n\", val_tmp2);\n  } else {\n    btdrv_write_rf_reg(0x8b, ((0x9c << 8) | (val_tmp1 & 0x00ff)));\n    BT_DRV_TRACE(1, \"0x8b:%x\\n\", ((0x9c << 8) | (val_tmp1 & 0x00ff)));\n    btdrv_write_rf_reg(0x8d, ((0x28 << 10) | (val_tmp2 & 0x03ff)));\n    BT_DRV_TRACE(1, \"0x8d:%x\\n\", ((0x28 << 10) | (val_tmp2 & 0x03ff)));\n  }\n\n  BTDIGITAL_REG(0xd02201e4) = 0x00000000;\n\n  btdrv_write_rf_reg(0x80, 0xa010);\n  btdrv_write_rf_reg(0xc4, 0xffcf); //[5:4]=00,close rcosc bias\n  btdrv_write_rf_reg(0x80, 0xa000);\n\n  btdrv_write_rf_reg(0xb3, 0x30f3); //[9:8]=00,pwup rcosc\n}\n\n#ifdef __PWR_FLATNESS__\n#define PWR_FLATNESS_CONST_VAL 0xF\nvoid btdrv_2300p_channel_pwr_flatness(void) {\n  uint16_t read_value;\n  uint16_t tmp_val;\n\n  btdrv_read_rf_reg(0xc0, &read_value);\n  BT_DRV_TRACE(1, \"btdrv_2300p_channel_pwr_flatness 0xc0=%x\\n\", read_value);\n\n  read_value = (read_value & 0x0f00) >> 8; //[11:8]\n  int16_t calib_val = PWR_FLATNESS_CONST_VAL - read_value;\n  if (calib_val < 0) {\n    BT_DRV_TRACE(2, \"calib_val<0 const_val=%d,read_val=%x\",\n                 PWR_FLATNESS_CONST_VAL, read_value);\n    btdrv_read_rf_reg(0x92, &tmp_val);\n    tmp_val &= 0xf0ff; //[11:8]\n    BT_DRV_TRACE(1, \"0x92=%x\\n\", tmp_val);\n    btdrv_write_rf_reg(0x92, tmp_val);\n    return;\n  } else {\n    BT_DRV_TRACE(2, \"const_val=%d,calib_val =%x\", PWR_FLATNESS_CONST_VAL,\n                 calib_val);\n  }\n\n  // write calibrated value into 0x92 register\n  btdrv_read_rf_reg(0x92, &tmp_val);\n  tmp_val &= 0xf0ff;\n  tmp_val |= ((calib_val & 0xffff) << 8);\n  BT_DRV_TRACE(1, \"write reg 0x92 val=%x\", tmp_val);\n  btdrv_write_rf_reg(0x92, tmp_val);\n}\n#endif\n\nvoid btdrv_enable_jtag(void) {\n  *(uint32_t *)0x400000F8 &= 0x7FFFFFFF; // clear bit31\n\n  hal_iomux_set_jtag();\n  hal_cmu_jtag_enable();\n  hal_cmu_jtag_clock_enable();\n}\n/// start active bt controller\n\n//#define BT_DRV_ENABLE_LMP_TRACE\n\nvoid btdrv_start_bt(void) {\n  hal_sysfreq_req(HAL_SYSFREQ_USER_BT, HAL_CMU_FREQ_26M);\n\n#if INTERSYS_DEBUG\n#ifdef BT_DRV_ENABLE_LMP_TRACE\n  btdrv_trace_config(BT_CONTROLER_TRACE_TYPE_INTERSYS |\n                     BT_CONTROLER_TRACE_TYPE_CONTROLLER |\n                     BT_CONTROLER_FILTER_TRACE_TYPE_A2DP_STREAM |\n                     BT_CONTROLER_TRACE_TYPE_LMP_TRACE);\n#else\n  btdrv_trace_config(BT_CONTROLER_TRACE_TYPE_INTERSYS |\n                     BT_CONTROLER_TRACE_TYPE_CONTROLLER |\n                     BT_CONTROLER_FILTER_TRACE_TYPE_A2DP_STREAM);\n#endif\n#endif\n\n#if defined(BLE_ONLY_ENABLED)\n  btdrv_enable_sleep_checker(false);\n#else\n  btdrv_enable_sleep_checker(true);\n#endif\n\n  hal_iomux_ispi_access_enable(HAL_IOMUX_ISPI_MCU_RF);\n\n#ifndef NO_SLEEP\n  pmu_sleep_en(0);\n#endif\n\n  bt_drv_reg_op_global_symbols_init();\n\n  btdrv_poweron(BT_POWERON);\n\n  btdrv_hciopen();\n\n  btdrv_rf_init();\n\n  btdrv_rf_init_ext();\n\n  btdrv_config_init();\n  // rom patch init\n  btdrv_ins_patch_init();\n  btdrv_data_patch_init();\n  btdrv_patch_en(1);\n#ifdef __HW_AGC__\n  btdrv_2300_hwagc_dc_cal_1();\n#endif\n\n  btdrv_2300_rccal();\n#ifdef __PWR_FLATNESS__\n  btdrv_2300p_channel_pwr_flatness();\n#endif\n\n  btdrv_txpower_calib();\n\n#ifdef BT_XTAL_SYNC\n//   btdrv_bt_spi_xtal_init();\n#endif\n  btdrv_sync_config();\n#ifdef BT_EXT_LNA_PA\n  int LNA_flag = 0, PA_flag = 0;\n#ifdef BT_EXT_LNA\n  LNA_flag = 1;\n#endif\n#ifdef BT_EXT_PA\n  PA_flag = 1;\n#endif\n  btdrv_enable_rf_sw(LNA_flag, PA_flag);\n#endif\n  bt_drv_reg_op_dgb_link_gain_ctrl_init();\n  btdrv_fast_lock_config(0);\n#ifdef __FASTACK_ECC_ENABLE__\n  btdrv_ecc_config();\n#endif\n\n  // regist bt switch agc cb function\n  struct bt_cb_tag *bt_drv_func_cb = bt_drv_get_func_cb_ptr();\n  bt_drv_func_cb->bt_switch_agc = bt_drv_select_agc_mode;\n\n  // initialize agc mode\n  if (bt_drv_func_cb->bt_switch_agc != NULL) {\n    bt_drv_func_cb->bt_switch_agc(BT_IDLE_MODE);\n  }\n  btdrv_hcioff();\n\n  /*reg controller crash dump*/\n  hal_trace_crash_dump_register(HAL_TRACE_CRASH_DUMP_MODULE_BT,\n                                bt_drv_reg_op_crash_dump);\n\n#ifndef NO_SLEEP\n  pmu_sleep_en(1);\n#endif\n\n  hal_iomux_ispi_access_enable(HAL_IOMUX_ISPI_MCU_RF);\n\n  hal_sysfreq_req(HAL_SYSFREQ_USER_BT, HAL_CMU_FREQ_32K);\n}\n\nconst uint8_t hci_cmd_enable_dut[] = {0x01, 0x03, 0x18, 0x00};\nconst uint8_t hci_cmd_enable_allscan[] = {0x01, 0x1a, 0x0c, 0x01, 0x03};\nconst uint8_t hci_cmd_disable_scan[] = {0x01, 0x1a, 0x0c, 0x01, 0x00};\nconst uint8_t hci_cmd_enable_pagescan[] = {0x01, 0x1a, 0x0c, 0x01, 0x02};\nconst uint8_t hci_cmd_autoaccept_connect[] = {0x01, 0x05, 0x0c, 0x03,\n                                              0x02, 0x00, 0x02};\nconst uint8_t hci_cmd_hci_reset[] = {0x01, 0x03, 0x0c, 0x00};\n\nconst uint8_t hci_cmd_nonsig_tx_dh1_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x04, 0x04, 0x1b, 0x00};\nconst uint8_t hci_cmd_nonsig_tx_2dh1_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x04, 0x04, 0x36, 0x00};\nconst uint8_t hci_cmd_nonsig_tx_3dh1_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x08, 0x04, 0x53, 0x00};\nconst uint8_t hci_cmd_nonsig_tx_2dh3_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0a, 0x04, 0x6f, 0x01};\nconst uint8_t hci_cmd_nonsig_tx_3dh3_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0b, 0x04, 0x28, 0x02};\n\nconst uint8_t hci_cmd_nonsig_rx_dh1_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x04, 0x00, 0x1b, 0x00};\nconst uint8_t hci_cmd_nonsig_rx_2dh1_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x04, 0x00, 0x36, 0x00};\nconst uint8_t hci_cmd_nonsig_rx_3dh1_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x08, 0x00, 0x53, 0x00};\nconst uint8_t hci_cmd_nonsig_rx_2dh3_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0a, 0x00, 0x6f, 0x01};\nconst uint8_t hci_cmd_nonsig_rx_3dh3_pn9[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x06,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0b, 0x00, 0x28, 0x02};\n\nconst uint8_t hci_cmd_nonsig_tx_dh1_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x04, 0x04,\n    0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\nconst uint8_t hci_cmd_nonsig_tx_2dh1_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x04, 0x04,\n    0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\nconst uint8_t hci_cmd_nonsig_tx_3dh1_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x08, 0x04,\n    0x53, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\nconst uint8_t hci_cmd_nonsig_tx_2dh3_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0a, 0x04,\n    0x6f, 0x01, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\nconst uint8_t hci_cmd_nonsig_tx_3dh3_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0b, 0x04,\n    0x28, 0x02, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\n\nconst uint8_t hci_cmd_nonsig_rx_dh1_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x04, 0x00,\n    0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\nconst uint8_t hci_cmd_nonsig_rx_2dh1_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x04, 0x00,\n    0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\nconst uint8_t hci_cmd_nonsig_rx_3dh1_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x08, 0x00,\n    0x53, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\nconst uint8_t hci_cmd_nonsig_rx_2dh3_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0a, 0x00,\n    0x6f, 0x01, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\nconst uint8_t hci_cmd_nonsig_rx_3dh3_pn9_t2[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x06, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0b, 0x00,\n    0x28, 0x02, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\n\n// vco test\nconst uint8_t hci_cmd_start_bt_vco_test[] = {0x01, 0xaa, 0xfc,\n                                             0x02, 0x00, 0x02};\nconst uint8_t hci_cmd_stop_bt_vco_test[] = {0x01, 0xaa, 0xfc, 0x02, 0x00, 0x04};\n\nvoid btdrv_testmode_start(void) {\n  struct bt_cb_tag *bt_drv_func_cb = bt_drv_get_func_cb_ptr();\n\n  if (bt_drv_func_cb->bt_switch_agc != NULL) {\n    bt_drv_func_cb->bt_switch_agc(BT_A2DP_WORK_MODE);\n  }\n  bt_drv_tx_pwr_init_for_testmode();\n}\n\nvoid btdrv_write_localinfo(const char *name, uint8_t len, const uint8_t *addr) {\n  uint8_t hci_cmd_write_addr[5 + 6] = {0x01, 0x72, 0xfc, 0x07, 0x00};\n\n  uint8_t hci_cmd_write_name[248 + 4] = {0x01, 0x13, 0x0c, 0xF8};\n  memset(&hci_cmd_write_name[4], 0, sizeof(hci_cmd_write_name) - 4);\n  memcpy(&hci_cmd_write_name[4], name, len);\n  btdrv_SendData(hci_cmd_write_name, sizeof(hci_cmd_write_name));\n  btdrv_delay(50);\n  memcpy(&hci_cmd_write_addr[5], addr, 6);\n  btdrv_SendData(hci_cmd_write_addr, sizeof(hci_cmd_write_addr));\n  btdrv_delay(20);\n}\n\nvoid btdrv_enable_dut(void) {\n  btdrv_SendData(hci_cmd_enable_dut, sizeof(hci_cmd_enable_dut));\n  btdrv_delay(20);\n  btdrv_SendData(hci_cmd_enable_allscan, sizeof(hci_cmd_enable_allscan));\n  btdrv_delay(20);\n  btdrv_SendData(hci_cmd_autoaccept_connect,\n                 sizeof(hci_cmd_autoaccept_connect));\n  btdrv_delay(20);\n  bt_drv_reg_op_set_accessible_mode(3);\n#ifdef LAURENT_ALGORITHM\n  btdrv_bt_laurent_algorithm_enable();\n#endif\n  btdrv_dut_mode_enable = true;\n}\n\nvoid btdrv_disable_scan(void) {\n  btdrv_SendData(hci_cmd_disable_scan, sizeof(hci_cmd_disable_scan));\n  btdrv_delay(20);\n}\n\nstatic uint32_t dut_connect_status = DUT_CONNECT_STATUS_DISCONNECTED;\n\nuint32_t btdrv_dut_get_connect_status(void) { return dut_connect_status; }\n\nvoid btdrv_dut_accessible_mode_manager(const unsigned char *data) {\n  if (btdrv_dut_mode_enable) {\n    if (data[0] == 0x04 && data[1] == 0x03 && data[2] == 0x0b &&\n        data[3] == 0x00) {\n      bt_drv_reg_op_set_accessible_mode(0);\n      btdrv_disable_scan();\n      dut_connect_status = DUT_CONNECT_STATUS_CONNECTED;\n    } else if (data[0] == 0x04 && data[1] == 0x05 && data[2] == 0x04 &&\n               data[3] == 0x00) {\n      btdrv_enable_dut();\n      dut_connect_status = DUT_CONNECT_STATUS_DISCONNECTED;\n    }\n  }\n}\n\nvoid btdrv_hci_reset(void) {\n  btdrv_SendData(hci_cmd_hci_reset, sizeof(hci_cmd_hci_reset));\n  btdrv_delay(350);\n}\n\nvoid btdrv_enable_nonsig_tx(uint8_t index) {\n  BT_DRV_TRACE(1, \"%s\\n\", __func__);\n\n  if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_1) {\n    if (index == 0)\n      btdrv_SendData(hci_cmd_nonsig_tx_2dh1_pn9,\n                     sizeof(hci_cmd_nonsig_tx_2dh1_pn9));\n    else if (index == 1)\n      btdrv_SendData(hci_cmd_nonsig_tx_3dh1_pn9,\n                     sizeof(hci_cmd_nonsig_tx_3dh1_pn9));\n    else if (index == 2)\n      btdrv_SendData(hci_cmd_nonsig_tx_2dh3_pn9,\n                     sizeof(hci_cmd_nonsig_tx_2dh1_pn9));\n    else if (index == 3)\n      btdrv_SendData(hci_cmd_nonsig_tx_3dh3_pn9,\n                     sizeof(hci_cmd_nonsig_tx_3dh1_pn9));\n    else\n      btdrv_SendData(hci_cmd_nonsig_tx_dh1_pn9,\n                     sizeof(hci_cmd_nonsig_tx_dh1_pn9));\n  } else {\n    if (index == 0)\n      btdrv_SendData(hci_cmd_nonsig_tx_2dh1_pn9_t2,\n                     sizeof(hci_cmd_nonsig_tx_2dh1_pn9_t2));\n    else if (index == 1)\n      btdrv_SendData(hci_cmd_nonsig_tx_3dh1_pn9_t2,\n                     sizeof(hci_cmd_nonsig_tx_3dh1_pn9_t2));\n    else if (index == 2)\n      btdrv_SendData(hci_cmd_nonsig_tx_2dh3_pn9_t2,\n                     sizeof(hci_cmd_nonsig_tx_2dh1_pn9_t2));\n    else if (index == 3)\n      btdrv_SendData(hci_cmd_nonsig_tx_3dh3_pn9_t2,\n                     sizeof(hci_cmd_nonsig_tx_3dh1_pn9_t2));\n    else\n      btdrv_SendData(hci_cmd_nonsig_tx_dh1_pn9_t2,\n                     sizeof(hci_cmd_nonsig_tx_dh1_pn9_t2));\n  }\n\n  btdrv_delay(20);\n}\n\nvoid btdrv_enable_nonsig_rx(uint8_t index) {\n  BT_DRV_TRACE(1, \"%s\\n\", __func__);\n\n  if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_1) {\n    if (index == 0)\n      btdrv_SendData(hci_cmd_nonsig_rx_2dh1_pn9,\n                     sizeof(hci_cmd_nonsig_rx_2dh1_pn9));\n    else if (index == 1)\n      btdrv_SendData(hci_cmd_nonsig_rx_3dh1_pn9,\n                     sizeof(hci_cmd_nonsig_rx_3dh1_pn9));\n    else if (index == 2)\n      btdrv_SendData(hci_cmd_nonsig_rx_2dh3_pn9,\n                     sizeof(hci_cmd_nonsig_rx_2dh1_pn9));\n    else if (index == 3)\n      btdrv_SendData(hci_cmd_nonsig_rx_3dh3_pn9,\n                     sizeof(hci_cmd_nonsig_rx_3dh1_pn9));\n    else\n      btdrv_SendData(hci_cmd_nonsig_rx_dh1_pn9,\n                     sizeof(hci_cmd_nonsig_rx_dh1_pn9));\n  } else {\n    if (index == 0)\n      btdrv_SendData(hci_cmd_nonsig_rx_2dh1_pn9_t2,\n                     sizeof(hci_cmd_nonsig_rx_2dh1_pn9_t2));\n    else if (index == 1)\n      btdrv_SendData(hci_cmd_nonsig_rx_3dh1_pn9_t2,\n                     sizeof(hci_cmd_nonsig_rx_3dh1_pn9_t2));\n    else if (index == 2)\n      btdrv_SendData(hci_cmd_nonsig_rx_2dh3_pn9_t2,\n                     sizeof(hci_cmd_nonsig_rx_2dh1_pn9_t2));\n    else if (index == 3)\n      btdrv_SendData(hci_cmd_nonsig_rx_3dh3_pn9_t2,\n                     sizeof(hci_cmd_nonsig_rx_3dh1_pn9_t2));\n    else\n      btdrv_SendData(hci_cmd_nonsig_rx_dh1_pn9_t2,\n                     sizeof(hci_cmd_nonsig_rx_dh1_pn9_t2));\n  }\n\n  btdrv_delay(20);\n}\n\nstatic bool btdrv_vco_test_running = false;\nstatic unsigned short vco_test_reg_val_b6 = 0;\nstatic unsigned short vco_test_reg_val_1f3 = 0;\n#ifdef VCO_TEST_TOOL\nstatic unsigned short vco_test_hack_flag = 0;\nstatic unsigned short vco_test_channel = 0xff;\n\nunsigned short btdrv_get_vco_test_process_flag(void) {\n  return vco_test_hack_flag;\n}\n\nbool btdrv_vco_test_bridge_intsys_callback(const unsigned char *data) {\n  bool status = false;\n  if (data[0] == 0x01 && data[1] == 0xaa && data[2] == 0xfc &&\n      data[3] == 0x02) {\n    status = true;\n    vco_test_hack_flag = data[5];\n    vco_test_channel = data[4];\n  }\n\n  return status;\n}\n\nvoid btdrv_vco_test_process(uint8_t op) {\n  if (op == 0x02) // vco test start\n  {\n    if (vco_test_channel != 0xff)\n      btdrv_vco_test_start(vco_test_channel);\n  } else if (op == 0x04) // vco test stop\n  {\n    btdrv_vco_test_stop();\n  }\n  vco_test_channel = 0xff;\n  vco_test_hack_flag = 0;\n}\n#endif\n\nvoid btdrv_vco_test_start(uint8_t chnl) {\n  if (!btdrv_vco_test_running) {\n    btdrv_vco_test_running = true;\n    hal_analogif_reg_read(0xb6, &vco_test_reg_val_b6);\n    hal_analogif_reg_read(0x1f3, &vco_test_reg_val_1f3);\n    hal_analogif_reg_write(0x1f3, 0);\n    hal_analogif_reg_write(0xb6, vco_test_reg_val_b6 | (0x03 << 14));\n    hal_analogif_reg_write(0x1d7, 0xc4f8);\n\n    BTDIGITAL_REG(0xd02201e4) = (chnl & 0x7f) | 0xa0000;\n    btdrv_delay(10);\n    BTDIGITAL_REG(0xd02201e4) = 0;\n    btdrv_delay(10);\n    BTDIGITAL_REG(0xd0340020) &= (~0x7);\n    BTDIGITAL_REG(0xd0340020) |= 6;\n    btdrv_delay(10);\n  }\n}\n\nvoid btdrv_vco_test_stop(void) {\n  if (btdrv_vco_test_running) {\n    btdrv_vco_test_running = false;\n    BTDIGITAL_REG(0xd02201bc) = 0;\n    BTDIGITAL_REG(0xd0340020) &= (~0x7);\n    if (vco_test_reg_val_b6 != 0) {\n      hal_analogif_reg_write(0xb6, vco_test_reg_val_b6);\n    }\n    if (vco_test_reg_val_1f3 != 0) {\n      hal_analogif_reg_write(0x1f3, vco_test_reg_val_1f3);\n    }\n    btdrv_delay(10);\n  }\n}\n\n#ifdef LAURENT_ALGORITHM\nvoid btdrv_ble_test_bridge_intsys_callback(const unsigned char *data) {\n  if (data[0] == 0x01 && data[1] == 0x03 && data[2] == 0x0c &&\n      data[3] == 0x00) {\n    // reset\n    btdrv_bt_laurent_algorithm_enable();\n  } else if (data[0] == 0x01 && (data[1] == 0x1d || data[1] == 0x1e)) {\n    // enter ble test mode\n    btdrv_bt_laurent_algorithm_enable();\n    btdrv_ble_laurent_algorithm_enable();\n  } else if (data[0] == 0x01 && data[1] == 0x1f) {\n    // exit ble tes mode\n    btdrv_bt_laurent_algorithm_enable();\n  }\n}\n#endif\n\nvoid btdrv_stop_bt(void) { btdrv_poweron(BT_POWEROFF); }\n\nvoid btdrv_write_memory(uint8_t wr_type, uint32_t address, const uint8_t *value,\n                        uint8_t length) {\n  uint8_t buff[256];\n  if (length == 0 || length > 128)\n    return;\n  buff[0] = 0x01;\n  buff[1] = 0x02;\n  buff[2] = 0xfc;\n  buff[3] = length + 6;\n  buff[4] = address & 0xff;\n  buff[5] = (address & 0xff00) >> 8;\n  buff[6] = (address & 0xff0000) >> 16;\n  buff[7] = address >> 24;\n  buff[8] = wr_type;\n  buff[9] = length;\n  memcpy(&buff[10], value, length);\n  btdrv_SendData(buff, length + 10);\n  btdrv_delay(2);\n}\n\nvoid btdrv_send_cmd(uint16_t opcode, uint8_t cmdlen, const uint8_t *param) {\n  uint8_t buff[256];\n  buff[0] = 0x01;\n  buff[1] = opcode & 0xff;\n  buff[2] = (opcode & 0xff00) >> 8;\n  buff[3] = cmdlen;\n  if (cmdlen > 0)\n    memcpy(&buff[4], param, cmdlen);\n  btdrv_SendData(buff, cmdlen + 4);\n}\n\nvoid btdrv_rxdpd_sample_init(void) {}\n\nvoid btdrv_rxdpd_sample_deinit(void) {}\n\n#define BTTX_PATTEN (1)\n#define BTTX_FREQ(freq) ((freq - 2402) & 0x7f)\n\nvoid btdrv_rxdpd_sample_init_tx(void) {}\n\nvoid btdrv_rxdpd_sample_enable(uint8_t rxon, uint8_t txon) {}\nvoid btdrv_btcore_extwakeup_irq_enable(bool on) {\n  if (on) {\n    *(volatile uint32_t *)(0xd033003c) |= (1 << 14);\n  } else {\n    *(volatile uint32_t *)(0xd033003c) &= ~(1 << 14);\n  }\n}\n\n//[26:0] 0x07ffffff\n//[27:0] 0x0fffffff\n\nuint32_t btdrv_syn_get_curr_ticks(void) {\n  uint32_t value;\n\n  value = BTDIGITAL_REG(0xd0220490) & 0x0fffffff;\n  return value;\n}\n\nstatic int32_t btdrv_syn_get_offset_ticks(uint16_t conidx) {\n  int32_t offset;\n  uint32_t local_offset;\n  uint16_t offset0;\n  uint16_t offset1;\n  offset0 = BTDIGITAL_BT_EM(EM_BT_CLKOFF0_ADDR + conidx * 110);\n  offset1 = BTDIGITAL_BT_EM(EM_BT_CLKOFF1_ADDR + conidx * 110);\n\n  local_offset = (offset0 | offset1 << 16) & 0x07ffffff;\n  offset = local_offset;\n  offset = (offset << 5) >> 5;\n\n  if (offset) {\n    return offset * 2;\n  } else {\n    return 0;\n  }\n}\n\n// Clear trigger signal with software\nvoid btdrv_syn_clr_trigger(void) {\n  BTDIGITAL_REG(0xd02201f0) = BTDIGITAL_REG(0xd02201f0) | (1 << 31);\n}\n\nstatic void btdrv_syn_set_tg_ticks(uint32_t num, uint8_t mode) {\n  if (mode == BT_TRIG_MASTER_ROLE) {\n    BTDIGITAL_REG(0xd02204a4) = 0x80000006;\n    BTDIGITAL_REG(0xd02201f0) = (BTDIGITAL_REG(0xd02201f0) & 0x70000000) |\n                                (num & 0x0fffffff) | 0x10000000;\n    // BT_DRV_TRACE(1,\"master mode d02201f0:0x%x\\n\",BTDIGITAL_REG(0xd02201f0));\n  } else {\n    BTDIGITAL_REG(0xd02204a4) = 0x80000006;\n    BTDIGITAL_REG(0xd02201f0) =\n        (BTDIGITAL_REG(0xd02201f0) & 0x60000000) | (num & 0x0fffffff);\n    // BT_DRV_TRACE(1,\"slave mode d02201f0:0x%x\\n\",BTDIGITAL_REG(0xd02201f0));\n  }\n}\n\nvoid btdrv_syn_trigger_codec_en(uint32_t v) {}\n\nuint32_t btdrv_get_syn_trigger_codec_en(void) {\n  return BTDIGITAL_REG(0xd02201f0);\n}\n\nuint32_t btdrv_get_trigger_ticks(void) { return BTDIGITAL_REG(0xd02201f0); }\n\n// Can be used by master or slave\n// Ref: Master bt clk\nuint32_t bt_syn_get_curr_ticks(uint16_t conhdl) {\n  int32_t curr, offset;\n\n  curr = btdrv_syn_get_curr_ticks();\n\n  if (btdrv_is_link_index_valid(btdrv_conhdl_to_linkid(conhdl)))\n    offset = btdrv_syn_get_offset_ticks(btdrv_conhdl_to_linkid(conhdl));\n  else\n    offset = 0;\n  //    BT_DRV_TRACE(4,\"[%s] curr(%d) + offset(%d) = %d\", __func__, curr ,\n  //    offset,curr + offset);\n  return (curr + offset) & 0x0fffffff;\n}\n\nint32_t bt_syn_get_offset_ticks(uint16_t conhdl) {\n  int32_t offset;\n\n  if (btdrv_is_link_index_valid(btdrv_conhdl_to_linkid(conhdl)))\n    offset = btdrv_syn_get_offset_ticks(btdrv_conhdl_to_linkid(conhdl));\n  else\n    offset = 0;\n  //    BT_DRV_TRACE(4,\"[%s] curr(%d) + offset(%d) = %d\", __func__, curr ,\n  //    offset,curr + offset);\n  return offset;\n}\n\nvoid bt_syn_trig_checker(uint16_t conhdl) {\n  int32_t clock_offset;\n  uint16_t bit_offset;\n  bt_drv_reg_op_piconet_clk_offset_get(conhdl, &clock_offset, &bit_offset);\n\n  BT_DRV_TRACE(3,\n               \"bt_syn_set_tg_tick checker d0220498=0x%08x d02204a4=0x%08x \"\n               \"d02201f0=0x%08x\",\n               BTDIGITAL_REG(0xd0220498), BTDIGITAL_REG(0xd02204a4),\n               BTDIGITAL_REG(0xd02201f0));\n  BT_DRV_TRACE(\n      3,\n      \"bt_syn_set_tg_tick checker curr_ticks:0x%08x bitoffset=0x%04x \"\n      \"rxbit=0x%04x\",\n      btdrv_syn_get_curr_ticks(),\n      BTDIGITAL_REG(EM_BT_BITOFF_ADDR + (conhdl - 0x80) * BT_EM_SIZE) & 0x3ff,\n      BTDIGITAL_REG(EM_BT_RXBIT_ADDR + (conhdl - 0x80) * BT_EM_SIZE) & 0x3ff);\n  BT_DRV_TRACE(\n      2, \"bt_syn_set_tg_tick checker clock_offset:0x%08x bit_offset=0x%04x\",\n      clock_offset, bit_offset);\n}\n\n// Can be used by master or slave\n// Ref: Master bt clk\nvoid bt_syn_set_tg_ticks(uint32_t val, uint16_t conhdl, uint8_t mode) {\n  int32_t offset;\n\n  if (btdrv_is_link_index_valid(btdrv_conhdl_to_linkid(conhdl)))\n    offset = btdrv_syn_get_offset_ticks(btdrv_conhdl_to_linkid(conhdl));\n  else\n    offset = 0;\n\n  if (conhdl == 0x80) {\n    BTDIGITAL_REG(0xd0220498) = (BTDIGITAL_REG(0xd0220498) & 0xfffffff0) | 0x1;\n  } else if (conhdl == 0x81) {\n    BTDIGITAL_REG(0xd0220498) = (BTDIGITAL_REG(0xd0220498) & 0xfffffff0) | 0x2;\n  } else if (conhdl == 0x82) {\n    BTDIGITAL_REG(0xd0220498) = (BTDIGITAL_REG(0xd0220498) & 0xfffffff0) | 0x3;\n  }\n\n  if ((mode == BT_TRIG_MASTER_ROLE) && (offset != 0))\n    BT_DRV_TRACE(0, \"ERROR OFFSET !!\");\n\n  val = val >> 1;\n  val = val << 1;\n  val += 1;\n\n  BT_DRV_TRACE(4, \"bt_syn_set_tg_ticks val:%d num:%d mode:%d conhdl:%02x\", val,\n               val - offset, mode, conhdl);\n  btdrv_syn_set_tg_ticks(val - offset, mode);\n  bt_syn_trig_checker(conhdl);\n}\n\nvoid btdrv_enable_playback_triggler(uint8_t triggle_mode) {\n  if (triggle_mode == ACL_TRIGGLE_MODE) {\n    // clear SCO trigger\n    BTDIGITAL_REG(0xd02201f0) &= (~0x60000000);\n    // set ACL trigger\n    BTDIGITAL_REG(0xd02201f0) |= 0x20000000;\n  } else if (triggle_mode == SCO_TRIGGLE_MODE) {\n    // clear ACL trigger\n    BTDIGITAL_REG(0xd02201f0) &= (~0x60000000);\n    // set SCO trigger\n    BTDIGITAL_REG(0xd02201f0) |= 0x40000000;\n  }\n}\n\nvoid btdrv_disable_playback_triggler(void) {\n  // clear ACL and SOC  trigger\n  BTDIGITAL_REG(0xd02201f0) &= (~0x60000000);\n}\n\n/*\nbit28  1:master  0:slave\n//  master mode = 1\n//  slave mode   = 2\n//  local  mode   = 0\n*/\n\nvoid btdrv_set_tws_role_triggler(uint8_t tws_mode) {\n  BT_DRV_TRACE(1, \"btdrv_set_tws_role_triggler tws_mode:%d\", tws_mode);\n\n  if (tws_mode == BT_TRIG_MASTER_ROLE) {\n    BTDIGITAL_REG(0xd02201f0) |= 0x10000000;\n  } else if (tws_mode == BT_TRIG_SLAVE_ROLE) {\n    BTDIGITAL_REG(0xd02201f0) &= (~0x10000000);\n  }\n}\n\nvoid btdrv_set_bt_pcm_triggler_en(uint8_t en) {\n  if (en) {\n    BTDIGITAL_REG(0xd022046c) &= (~0x1);\n  } else {\n    BTDIGITAL_REG(0xd022046c) |= 0x1;\n  }\n}\n\nvoid btdrv_set_bt_pcm_triggler_delay(uint8_t delay) {\n  if (delay > 0x3f) {\n    BT_DRV_TRACE(0, \"delay is error value\");\n    return;\n  }\n  BT_DRV_TRACE(1, \"0XD022045c=%x\", BTDIGITAL_REG(0xd022045c));\n  BTDIGITAL_REG(0xd022045c) &= ~0x7f;\n  BTDIGITAL_REG(0xd022045c) |= (delay);\n  BT_DRV_TRACE(1, \"exit :0XD022045c=%x\", BTDIGITAL_REG(0xd022045c));\n}\n\nvoid btdrv_set_bt_pcm_en(uint8_t en) {\n  if (en)\n    BTDIGITAL_REG(0xd02201b0) |= 1;\n  else\n    BTDIGITAL_REG(0xd02201b0) &= (~1);\n}\n\nvoid btdrv_set_bt_pcm_triggler_delay_reset(uint8_t delay) {\n  if (delay > 0x3f) {\n    BT_DRV_TRACE(0, \"delay is error value\");\n    return;\n  }\n  BT_DRV_TRACE(1, \"0XD022045c=%x\", BTDIGITAL_REG(0xd0224024));\n  BTDIGITAL_REG(0XD022045c) &= ~0x3f;\n  BTDIGITAL_REG(0XD022045c) |= delay | 1;\n  //  BTDIGITAL_REG(0xd0224024) |= 6;  //bypass sco trig\n  BT_DRV_TRACE(1, \"exit :0xd022045c=%x\", BTDIGITAL_REG(0xd022045c));\n}\n\nvoid btdrv_set_pcm_data_ignore_crc(void) {\n\n  BTDIGITAL_REG(0xD0220144) &= ~0x800000;\n}\n\n// pealse use btdrv_is_link_index_valid() check link index whether valid\nuint8_t btdrv_conhdl_to_linkid(uint16_t connect_hdl) {\n  // invalid hci handle,such as link disconnected\n  if (connect_hdl < HCI_HANDLE_MIN || connect_hdl > HCI_HANDLE_MAX) {\n    TRACE(0, \"ERROR Connect Handle=0x%x\", connect_hdl);\n    return HCI_LINK_INDEX_INVALID;\n  } else {\n    return (connect_hdl - HCI_HANDLE_MIN);\n  }\n}\n\nvoid btdrv_linear_format_16bit_set(void) {\n  *(volatile uint32_t *)(0xd02201a0) |= 0x00300000;\n}\n\nvoid btdrv_pcm_enable(void) {\n  *(volatile uint32_t *)(0xd02201b0) |= 0x01; // pcm enable\n}\n\nvoid btdrv_pcm_disable(void) {\n  *(volatile uint32_t *)(0xd02201b0) &= 0xfffffffe; // pcm disable\n}\n\n// Trace tport\nstatic const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_tport[] = {\n    {HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n};\n\nint btdrv_host_gpio_tport_open(void) {\n  uint32_t i;\n\n  for (i = 0;\n       i < sizeof(pinmux_tport) / sizeof(struct HAL_IOMUX_PIN_FUNCTION_MAP);\n       i++) {\n    hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)&pinmux_tport[i], 1);\n    hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)pinmux_tport[i].pin,\n                         HAL_GPIO_DIR_OUT, 0);\n  }\n  return 0;\n}\n\nint btdrv_gpio_port_set(int port) {\n  hal_gpio_pin_set((enum HAL_GPIO_PIN_T)pinmux_tport[port].pin);\n  return 0;\n}\n\nint btdrv_gpio_tport_clr(int port) {\n  hal_gpio_pin_clr((enum HAL_GPIO_PIN_T)pinmux_tport[port].pin);\n  return 0;\n}\nvoid btdrv_set_powerctrl_rssi_low(uint16_t rssi) {}\n\nextern void bt_drv_reg_op_set_music_link(uint8_t link_id);\n\nvoid btdrv_enable_dual_slave_configurable_slot_mode(bool isEnable,\n                                                    uint16_t activeDevHandle,\n                                                    uint8_t activeDevRole,\n                                                    uint16_t idleDevHandle,\n                                                    uint8_t idleDevRole) {\n  if (isEnable) {\n    bt_drv_reg_op_set_music_link(activeDevHandle - 0x80);\n  } else {\n    bt_drv_reg_op_set_music_link(0xff);\n  }\n}\n\n#if defined(TX_RX_PCM_MASK)\nuint8_t btdrv_is_pcm_mask_enable(void) { return 1; }\n#endif\n\n#ifdef PCM_FAST_MODE\nvoid btdrv_open_pcm_fast_mode_enable(void) {\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    BT_DRV_TRACE(0, \"pcm fast mode\\n\");\n    *(volatile uint32_t *)(0xd0220464) |= 1 << 22; /// pcm fast mode en bit22\n    *(volatile uint32_t *)(0xd02201b8) =\n        (*(volatile uint32_t *)(0xd02201b8) & 0xFFFFFF00) |\n        0x8; /// pcm clk [8:0]\n    *(volatile uint32_t *)(0xd0220460) =\n        (*(volatile uint32_t *)(0xd0220460) & 0xFFFE03FF) |\n        0x0000EC00; /// sample num in one frame [16:10]\n  }\n}\nvoid btdrv_open_pcm_fast_mode_disable(void) {\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    BT_DRV_TRACE(0, \"pcm fast mode disable\\n\");\n    *(volatile uint32_t *)(0xd0220464) = (*(volatile uint32_t *)(0xd0220464) &\n                                          0xFFBFFFFF); /// disable pcm fast mode\n    *(volatile uint32_t *)(0xd02201b8) =\n        (*(volatile uint32_t *)(0xd02201b8) & 0xFFFFFF00);\n  }\n}\n#endif\n\n#if defined(CVSD_BYPASS)\nvoid btdrv_cvsd_bypass_enable(uint8_t is_msbc) {\n  BTDIGITAL_REG(0xD0220144) &= ~0xffff;\n\n  BTDIGITAL_REG(0xD0220144) |= 0x5555;\n  // BTDIGITAL_REG(0xD02201E8) |= 0x04000000; //test sequecy\n  BTDIGITAL_REG(0xD02201A0) &= ~(1 << 7); // soft cvsd\n  // BTDIGITAL_REG(0xD02201b8) |= (1<<31); //revert clk\n}\n#endif\n\nvoid btdrv_enable_rf_sw(int rx_on, int tx_on) {\n  hal_iomux_set_bt_rf_sw(rx_on, tx_on);\n  BTDIGITAL_REG(0xD0340000) = (BTDIGITAL_REG(0xD0340000) & ~(1 << 24));\n  BTDIGITAL_REG(0xD0220050) = (BTDIGITAL_REG(0xD0220050) & ~0xFF) | 0xA6;\n}\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/bt_drv_2300p_internal.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_DRV_2300P_INTERNAL_H__\n#define __BT_DRV_2300P_INTERNAL_H__\n\n/***************************************************************************\n *RF conig macro\n ****************************************************************************/\n//#define __HW_AGC__\n#define __HYBIRD_AGC__ //if define __HYBIRD_AGC__ , not define __HW_AGC__\n#define __FANG_HW_AGC_CFG__\n#define __FANG_LNA_CFG__\n#define __PWR_FLATNESS__\n\n#ifdef __HYBIRD_AGC__\n#define __HW_AGC__\n#endif\n\n#ifdef __HW_AGC__\n#define __HW_AGC_I2V_DISABLE_DC_CAL__\n#endif\n\n#define  __1302_8_AGC__\n\n#define BT_RF_OLD_CORR_MODE\n/***************************************************************************\n *BT clock gate disable\n ****************************************************************************/\n#define __CLK_GATE_DISABLE__\n\n/***************************************************************************\n *BT read controller rssi\n ****************************************************************************/\n#define  BT_RSSI_MONITOR  1\n\n/***************************************************************************\n *PCM config macro\n ****************************************************************************/\n//#define APB_PCM\n//#define SW_INSERT_MSBC_TX_OFFSET\n\n/***************************************************************************\n *BT afh follow function\n ****************************************************************************/\n#define  BT_AFH_FOLLOW  0\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid btdrv_rf_rx_gain_adjust_req(uint32_t user, bool lowgain);\n#ifdef LAURENT_ALGORITHM\nvoid btdrv_ble_test_bridge_intsys_callback(const unsigned char *data);\nvoid btdrv_bt_laurent_algorithm_enable(void);\nvoid btdrv_ble_laurent_algorithm_enable(void);\n#endif\nvoid bt_drv_reg_op_for_test_mode_disable(void);\nvoid bt_drv_reg_op_disable_swagc_nosync_count(void);\n\nvoid btdrv_txpower_calib(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/bt_drv_calibration.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef RTOS\n\n#include \"bt_drv.h\"\n#include \"bt_drv_2300p_internal.h\"\n#include \"bt_drv_interface.h\"\n#include \"hal_chipid.h\"\n#include \"hal_i2c.h\"\n#include \"hal_intersys.h\"\n#include \"hal_iomux.h\"\n#include \"hal_uart.h\"\n#include \"plat_types.h\"\n#include \"string.h\"\n\nstruct dbg_nonsig_tester_result_tag {\n  uint16_t pkt_counters;\n  uint16_t head_errors;\n  uint16_t payload_errors;\n  int16_t avg_estsw;\n  int16_t avg_esttpl;\n  uint32_t payload_bit_errors;\n};\n\nstruct bt_drv_capval_calc_t {\n  int16_t estsw_a;\n  int16_t estsw_b;\n  uint8_t cdac_a;\n  uint8_t cdac_b;\n};\n\nstatic struct dbg_nonsig_tester_result_tag nonsig_tester_result;\n#ifdef RTOS\nstatic osThreadId calib_thread_tid = NULL;\n#else\nstatic bool calib_thread_tid = false;\n#endif\nstatic bool calib_running = false;\nstatic struct bt_drv_capval_calc_t capval_calc = {\n    .estsw_a = 0,\n    .estsw_b = 0,\n    .cdac_a = 0,\n    .cdac_b = 0,\n};\n\n#define bt_drv_calib_capval_calc_reset()                                       \\\n  do {                                                                         \\\n    memset(&capval_calc, 0, sizeof(capval_calc));                              \\\n  } while (0)\n#ifdef RTOS\n#define BT_DRV_MUTUX_WAIT(evt)                                                 \\\n  do {                                                                         \\\n    if (calib_thread_tid) {                                                    \\\n      osSignalClear(calib_thread_tid, 0x4);                                    \\\n      evt = osSignalWait(0x4, 4000);                                           \\\n    }                                                                          \\\n  } while (0)\n\n#define BT_DRV_MUTUX_SET()                                                     \\\n  do {                                                                         \\\n    if (calib_thread_tid) {                                                    \\\n      osSignalSet(calib_thread_tid, 0x4);                                      \\\n    }                                                                          \\\n  } while (0)\n#else\n\ntypedef enum {\n  osOK = 0,             ///< function completed; no error or event occurred.\n  osEventSignal = 0x08, ///< function completed; signal event occurred.\n  osErrorOS = 0xFF,     ///< unspecified RTOS error: run-time error but no other\n                        ///< error message fits.\n  os_status_reserved =\n      0x7FFFFFFF ///< prevent from enum down-size compiler optimization.\n} osStatus;\n\ntypedef struct {\n  osStatus status; ///< status code: event or error information\n} osEvent;\n\n#define BT_DRV_MUTUX_WAIT(evt)                                                 \\\n  do {                                                                         \\\n    uint8_t i = 16;                                                            \\\n    evt.status = osErrorOS;                                                    \\\n    do {                                                                       \\\n      if (calib_thread_tid) {                                                  \\\n        calib_thread_tid = false;                                              \\\n        evt.status = osEventSignal;                                            \\\n        break;                                                                 \\\n      } else {                                                                 \\\n        btdrv_delay(500);                                                      \\\n      }                                                                        \\\n    } while (i--);                                                             \\\n  } while (0)\n\n#define BT_DRV_MUTUX_SET()                                                     \\\n  do {                                                                         \\\n    calib_thread_tid = true;                                                   \\\n  } while (0)\n#endif\n\n#define BT_DRV_CALIB_BTANA_CAPVAL_CALC_BOTTOM (50)\n#define BT_DRV_CALIB_BTANA_CAPVAL_CALC_TOP (200)\n\n#define BT_DRV_CALIB_BTANA_CAPVAL_MIN (20)\n#define BT_DRV_CALIB_BTANA_CAPVAL_MAX (255 - BT_DRV_CALIB_BTANA_CAPVAL_MIN)\n#define BT_DRV_CALIB_BTANA_CAPVAL_STEP_HZ (200)\n\n#define BT_DRV_CALIB_RETRY_CNT (10)\n#define BT_DRV_CALIB_SKIP_RESULT_CNT (2)\n#define BT_DRV_CALIB_MDM_FREQ_REFERENCE (-12)\n#define BT_DRV_CALIB_MDM_FREQ_STEP_HZ (500)\n#define BT_DRV_CALIB_MDM_BIT_TO_FREQ(n, step) ((n) * (step))\n#define BT_DRV_CALIB_MDM_FREQ_TO_BIT(n, step) ((uint32_t)n / step)\n\nstatic int16_t calib_mdm_freq_reference = BT_DRV_CALIB_MDM_FREQ_REFERENCE;\n\nenum HAL_IOMUX_ISPI_ACCESS_T ispi_access;\n\nstatic void bt_drv_rfcal_timer_handler(void const *param);\nosTimerDef(BT_DRV_RFCAL_TIMER, bt_drv_rfcal_timer_handler);\nstatic osTimerId bt_drv_rfcal_timer = NULL;\n\nstatic void bt_drv_calib_stop_timer(void) {\n  if (NULL != bt_drv_rfcal_timer) {\n    osTimerStop(bt_drv_rfcal_timer);\n  }\n}\n\nstatic void bt_drv_rfcal_timer_handler(void const *start) {\n  static int start_nonsig_rx = 0;\n\n  if (NULL == bt_drv_rfcal_timer) {\n    bt_drv_rfcal_timer =\n        osTimerCreate(osTimer(BT_DRV_RFCAL_TIMER), osTimerOnce, NULL);\n  }\n\n  osTimerStop(bt_drv_rfcal_timer);\n\n  if (start_nonsig_rx || start) {\n    start_nonsig_rx = 0;\n\n    const uint8_t hci_cmd_hci_reset[] = {0x01, 0x03, 0x0c, 0x00};\n    const uint8_t calib_hci_cmd_nonsig_rx_2dh1_pn9_t5[] = {\n        0x01, 0x87, 0xfc, 0x1c, 0x01, 0xFA, 0x00, 0x00, 0x00, 0x00, 0x00,\n        0x00, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x01, 0x01, 0x04, 0x00,\n        0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\n\n    /* start nonsig rx again */\n    btdrv_SendData(hci_cmd_hci_reset, sizeof(hci_cmd_hci_reset));\n    btdrv_delay(2);\n    btdrv_SendData(calib_hci_cmd_nonsig_rx_2dh1_pn9_t5,\n                   sizeof(calib_hci_cmd_nonsig_rx_2dh1_pn9_t5));\n    btdrv_delay(100);\n\n    BT_DRV_TRACE(0, \"bt_drv_cal start nonsig rx\\n\");\n\n    BTDIGITAL_REG(0xd0210040) &= 0xff;\n    BTDIGITAL_REG(0xd0210040) |= 0x55;\n\n    osTimerStart(bt_drv_rfcal_timer, 1500);\n  } else {\n    start_nonsig_rx = 1;\n\n    const uint8_t stop_nonsig_rx_cmd[] = {\n        0x01, 0x87, 0xfc, 0x1c, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};\n\n    /* stop nonsig rx and let report cal result */\n    btdrv_SendData(stop_nonsig_rx_cmd, sizeof(stop_nonsig_rx_cmd));\n    btdrv_delay(2);\n\n    BT_DRV_TRACE(0, \"bt_drv_cal stop nonsig rx\\n\");\n\n    osTimerStart(bt_drv_rfcal_timer, 300);\n  }\n}\n\nvoid bt_drv_start_calib(void) {\n  if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_1) {\n    const uint8_t calib_hci_cmd_nonsig_rx_2dh1_pn9[] = {\n        0x01, 0x87, 0xfc, 0x14, 0x01, 0xFA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n        0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x01, 0x01, 0x04, 0x00, 0x36, 0x00};\n\n    if (!calib_running) {\n      btdrv_SendData(calib_hci_cmd_nonsig_rx_2dh1_pn9,\n                     sizeof(calib_hci_cmd_nonsig_rx_2dh1_pn9));\n      btdrv_delay(500);\n      BTDIGITAL_REG(0xd0210040) &= 0xff;\n      BTDIGITAL_REG(0xd0210040) |= 0x55;\n      calib_running = true;\n    }\n  } else {\n    bt_drv_rfcal_timer_handler((void *)1);\n    calib_running = true;\n  }\n}\n\nvoid bt_drv_stop_calib(void) {\n  if (calib_running) {\n    btdrv_hci_reset();\n    btdrv_delay(200);\n    calib_running = false;\n  }\n\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n    bt_drv_calib_stop_timer();\n  }\n}\n\nconst uint8_t calib_hci_cmd_nonsig_tx_2dh1_pn9_t0[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n    0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x01, 0x01, 0x04, 0x04, 0x36, 0x00};\n\nconst uint8_t calib_hci_cmd_nonsig_tx_2dh1_pn9_t1[] = {\n    0x01, 0x87, 0xfc, 0x1c, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00,\n    0x00, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x01, 0x01, 0x04, 0x04,\n    0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff};\n\nvoid bt_drv_check_calib(void) {\n  const uint8_t *calib_hci_cmd_nonsig_tx_2dh1_pn9 = NULL;\n  uint8_t len = 0;\n\n  if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_1) {\n    calib_hci_cmd_nonsig_tx_2dh1_pn9 = calib_hci_cmd_nonsig_tx_2dh1_pn9_t0;\n    len = sizeof(calib_hci_cmd_nonsig_tx_2dh1_pn9_t0);\n  } else {\n    calib_hci_cmd_nonsig_tx_2dh1_pn9 = calib_hci_cmd_nonsig_tx_2dh1_pn9_t1;\n    len = sizeof(calib_hci_cmd_nonsig_tx_2dh1_pn9_t1);\n  }\n\n  btdrv_SendData(calib_hci_cmd_nonsig_tx_2dh1_pn9, len);\n  btdrv_delay(3000);\n  BTDIGITAL_REG(0xd0210040) &= 0xff;\n  BTDIGITAL_REG(0xd0210040) |= 39;\n}\n\nstatic bool bt_drv_calib_capval_calc_run(uint16_t *capval_step_hz,\n                                         int16_t estsw, uint8_t cdac) {\n  bool nRet = false;\n  int16_t estsw_diff;\n  int16_t cdac_diff;\n\n  if (!capval_calc.estsw_a && !capval_calc.estsw_b) {\n    capval_calc.estsw_a = estsw;\n  } else if (capval_calc.estsw_a && !capval_calc.estsw_b) {\n    capval_calc.estsw_b = estsw;\n  }\n\n  if (!capval_calc.cdac_a && !capval_calc.cdac_b) {\n    capval_calc.cdac_a = cdac;\n  } else if (capval_calc.cdac_a && !capval_calc.cdac_b) {\n    capval_calc.cdac_b = cdac;\n  }\n\n  if (capval_calc.estsw_a && capval_calc.estsw_b && capval_calc.cdac_a &&\n      capval_calc.cdac_b) {\n\n    estsw_diff = ABS(capval_calc.estsw_b - capval_calc.estsw_a);\n    cdac_diff =\n        ABS((int16_t)(capval_calc.cdac_b) - (int16_t)(capval_calc.cdac_a));\n    *capval_step_hz = estsw_diff * BT_DRV_CALIB_MDM_FREQ_STEP_HZ / cdac_diff;\n    BT_DRV_TRACE(7, \"%d/%d %d/%d estsw_diff:%d cdac_diff:%d capval_step_hz:%d\",\n                 capval_calc.estsw_a, capval_calc.estsw_b, capval_calc.cdac_a,\n                 capval_calc.cdac_b, estsw_diff, cdac_diff, *capval_step_hz);\n    nRet = true;\n  }\n  return nRet;\n}\n\nvoid bt_drv_calib_rxonly_porc(void) {\n  osEvent evt;\n\n  evt.status = os_status_reserved;\n  /*[set tmx] */\n  btdrv_write_rf_reg(0xb0, 0x0f00); /* turn off tmx */\n\n  bt_drv_start_calib();\n\n  while (1) {\n    BT_DRV_MUTUX_WAIT(evt);\n    if (evt.status != osEventSignal) {\n      break;\n    }\n    btdrv_delay(10);\n    BT_DRV_TRACE(\n        7, \"result cnt:%d head:%d payload:%d estsw:%d esttpl:%d bit:%d est:%d\",\n        nonsig_tester_result.pkt_counters, nonsig_tester_result.head_errors,\n        nonsig_tester_result.payload_errors, nonsig_tester_result.avg_estsw,\n        nonsig_tester_result.avg_esttpl,\n        nonsig_tester_result.payload_bit_errors,\n        nonsig_tester_result.avg_estsw + nonsig_tester_result.avg_esttpl);\n  };\n\n  bt_drv_stop_calib();\n}\n\nint bt_drv_calib_result_porc(uint32_t *capval) {\n  osEvent evt;\n\n  uint16_t read_val = 0;\n  uint8_t cdac = 0;\n  uint8_t cnt = 0;\n  uint8_t skip_cnt = 0;\n  int diff = 0;\n  int est = 0;\n  uint8_t next_step = 0;\n  uint16_t capval_step_hz = BT_DRV_CALIB_BTANA_CAPVAL_STEP_HZ;\n  int nRet = -1;\n  int chk_flag = 0;\n  bool need_capval_calc = true;\n  evt.status = os_status_reserved;\n\n  /*[set to capval_min] */\n  btdrv_read_rf_reg(0xE9, &read_val);\n  cdac = BT_DRV_CALIB_BTANA_CAPVAL_CALC_BOTTOM;\n  read_val = (read_val & 0xff00) | (cdac);\n  ;\n  btdrv_write_rf_reg(0xE9, read_val);\n\n  /*[set tmx] */\n  btdrv_write_rf_reg(0xb0, 0x0f00); /* turn off tmx */\n\n  bt_drv_calib_capval_calc_reset();\n\n  bt_drv_start_calib();\n\ncheck_again:\n  BT_DRV_TRACE(0, \"calib run !!!\");\n  do {\n  calib_again:\n    BT_DRV_MUTUX_WAIT(evt);\n    if (evt.status != osEventSignal) {\n      nRet = -1;\n      BT_DRV_TRACE(1, \"evt:%d\", evt.status);\n      goto exit;\n    }\n    if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_1) {\n      BT_DRV_MUTUX_WAIT(evt);\n      if (evt.status != osEventSignal) {\n        nRet = -1;\n        BT_DRV_TRACE(1, \"evt:%d\", evt.status);\n        goto exit;\n      }\n      BT_DRV_MUTUX_WAIT(evt);\n      if (evt.status != osEventSignal) {\n        nRet = -1;\n        BT_DRV_TRACE(1, \"evt:%d\", evt.status);\n        goto exit;\n      }\n    }\n    BT_DRV_TRACE(\n        7, \"result cnt:%d head:%d payload:%d estsw:%d esttpl:%d bit:%d est:%d\",\n        nonsig_tester_result.pkt_counters, nonsig_tester_result.head_errors,\n        nonsig_tester_result.payload_errors, nonsig_tester_result.avg_estsw,\n        nonsig_tester_result.avg_esttpl,\n        nonsig_tester_result.payload_bit_errors,\n        nonsig_tester_result.avg_estsw + nonsig_tester_result.avg_esttpl);\n\n    if (nonsig_tester_result.head_errors > 15) {\n      if (++skip_cnt > BT_DRV_CALIB_SKIP_RESULT_CNT)\n        break;\n      else\n        goto calib_again;\n    }\n    skip_cnt = 0;\n\n    btdrv_read_rf_reg(0xE9, &read_val);\n    cdac = read_val & 0x00ff;\n\n    est = nonsig_tester_result.avg_estsw;\n    diff = est - calib_mdm_freq_reference;\n\n    if (need_capval_calc) {\n      if (bt_drv_calib_capval_calc_run(&capval_step_hz, est, cdac)) {\n        need_capval_calc = false;\n      }\n      if (cdac == BT_DRV_CALIB_BTANA_CAPVAL_CALC_BOTTOM) {\n        cdac = BT_DRV_CALIB_BTANA_CAPVAL_CALC_TOP;\n        read_val = (read_val & 0xff00) | (cdac);\n        btdrv_write_rf_reg(0xE9, read_val);\n      }\n      goto calib_again;\n    }\n\n    if ((BT_DRV_CALIB_MDM_BIT_TO_FREQ(ABS(diff),\n                                      BT_DRV_CALIB_MDM_FREQ_STEP_HZ) < 1500) &&\n        diff > 0) {\n      if (!chk_flag) {\n        chk_flag = 1;\n        cnt = 0;\n        next_step = 2;\n        goto check_again;\n      } else if (chk_flag && cnt > 4) {\n        break;\n      }\n      nRet = 0;\n      break;\n    } else if (next_step == 2) {\n\n    } else if (BT_DRV_CALIB_MDM_BIT_TO_FREQ(\n                   ABS(diff), BT_DRV_CALIB_MDM_FREQ_STEP_HZ) < 2500) {\n      next_step = 2;\n    } else {\n      next_step = BT_DRV_CALIB_MDM_BIT_TO_FREQ(ABS(diff),\n                                               BT_DRV_CALIB_MDM_FREQ_STEP_HZ) /\n                  capval_step_hz;\n      if (next_step == 0) {\n        next_step = 2;\n      }\n      if (next_step > 200) {\n        next_step = 200;\n      }\n    }\n    BT_DRV_TRACE(4, \"diff:%d read_val:%x cdac:%d next_step:%d\", diff, read_val,\n                 cdac, next_step);\n    if (est == calib_mdm_freq_reference) {\n      if (!chk_flag) {\n        chk_flag = 1;\n        cnt = 0;\n        next_step = 2;\n        goto check_again;\n      } else if (chk_flag && cnt > 4) {\n        break;\n      }\n      nRet = 0;\n      break;\n    } else if (est > calib_mdm_freq_reference) {\n      if (cdac < (BT_DRV_CALIB_BTANA_CAPVAL_MIN + next_step)) {\n        if (cdac == BT_DRV_CALIB_BTANA_CAPVAL_MIN)\n          break;\n        else\n          cdac = BT_DRV_CALIB_BTANA_CAPVAL_MIN;\n      } else {\n        cdac -= next_step;\n      }\n      read_val = (read_val & 0xff00) | (cdac);\n\n      BT_DRV_TRACE(2, \"-----:%x cdac:%d\", read_val, cdac);\n    } else if (est < calib_mdm_freq_reference) {\n      if (cdac > (BT_DRV_CALIB_BTANA_CAPVAL_MAX - next_step)) {\n        if (cdac == BT_DRV_CALIB_BTANA_CAPVAL_MAX)\n          break;\n        else\n          cdac = BT_DRV_CALIB_BTANA_CAPVAL_MAX;\n      } else {\n        cdac += next_step;\n      }\n      read_val = (read_val & 0xff00) | (cdac);\n\n      BT_DRV_TRACE(2, \"+++++:%x cdac:%d\", read_val, cdac);\n    }\n\n    btdrv_write_rf_reg(0xE9, read_val);\n  } while (cnt++ < BT_DRV_CALIB_RETRY_CNT);\n  *capval = cdac;\nexit:\n  bt_drv_stop_calib();\n\n  BT_DRV_TRACE(3, \"capval:0x%x cnt:%d nRet:%d\", *capval, cnt, nRet);\n  return nRet;\n}\n\nstatic unsigned int bt_drv_calib_rx(const unsigned char *data,\n                                    unsigned int len) {\n  const unsigned char nonsig_test_report[] = {0x04, 0x0e, 0x12};\n  struct dbg_nonsig_tester_result_tag *pResult = NULL;\n\n  hal_intersys_stop_recv(HAL_INTERSYS_ID_0);\n\n  //    BT_DRV_TRACE(2,\"%s len:%d\", __func__, len);\n  BT_DRV_DUMP(\"%02x \", data, len);\n  if (0 == memcmp(data, nonsig_test_report, sizeof(nonsig_test_report))) {\n    //        BT_DRV_TRACE(0,\"dbg_nonsig_tester_result !!!!!\");\n    pResult = (struct dbg_nonsig_tester_result_tag *)(data + 7);\n    if (pResult->pkt_counters != 0) {\n      memcpy(&nonsig_tester_result, pResult, sizeof(nonsig_tester_result));\n      BT_DRV_MUTUX_SET();\n    }\n  }\n  hal_intersys_start_recv(HAL_INTERSYS_ID_0);\n\n  return len;\n}\n\nvoid btdrv_tx(const unsigned char *data, unsigned int len);\nvoid bt_drv_calib_open(void) {\n  int ret = 0;\n  BT_DRV_TRACE(1, \"%s\", __func__);\n#ifdef RTOS\n  if (calib_thread_tid == NULL) {\n    calib_thread_tid = osThreadGetId();\n  }\n#endif\n\n  ispi_access = hal_iomux_ispi_access_enable(HAL_IOMUX_ISPI_MCU_RF);\n\n  ret = hal_intersys_open(HAL_INTERSYS_ID_0, HAL_INTERSYS_MSG_HCI,\n                          bt_drv_calib_rx, btdrv_tx, false);\n\n  if (ret) {\n    BT_DRV_TRACE(0, \"Failed to open intersys\");\n    return;\n  }\n  hal_intersys_start_recv(HAL_INTERSYS_ID_0);\n}\n\nvoid bt_drv_calib_close(void) {\n  btdrv_hci_reset();\n  btdrv_delay(200);\n  hal_intersys_close(HAL_INTERSYS_ID_0, HAL_INTERSYS_MSG_HCI);\n}\n\n#endif\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/bt_drv_config.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"bt_drv.h\"\n#include \"bt_drv_2300p_internal.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_internal.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"hal_chipid.h\"\n#include \"hal_i2c.h\"\n#include \"hal_timer.h\"\n#include \"hal_uart.h\"\n#include \"plat_types.h\"\n#include \"tgt_hardware.h\"\n#include \n// typedef void (*btdrv_config_func_t)(uint8_t parlen, uint8_t *param);\n\nextern void btdrv_send_cmd(uint16_t opcode, uint8_t cmdlen,\n                           const uint8_t *param);\nextern void btdrv_write_memory(uint8_t wr_type, uint32_t address,\n                               const uint8_t *value, uint8_t length);\n\ntypedef struct {\n  //    btdrv_config_func_t    func;\n  uint8_t is_act;\n  uint16_t opcode;\n  uint8_t parlen;\n  const uint8_t *param;\n\n} BTDRV_CFG_TBL_STRUCT;\n\n#define BTDRV_CONFIG_ACTIVE 1\n#define BTDRV_CONFIG_INACTIVE 0\n#define BTDRV_INVALID_TRACE_LEVEL 0xFF\n/*\n[0][0] = 63, [0][1] = 0,[0][2] = (-80),           472d\n[1][0] = 51, [2][1] = 0,[2][2] = (-80),          472b\n[2][0] = 42, [4][1] = 0,[4][2] = (-75),           4722\n[3][0] = 36, [6][1] = 0,[6][2] = (-55),           c712\n[4][0] = 30, [8][1] = 0,[8][2] = (-40),           c802\n[5][0] = 21,[10][1] = 0,[10][2] = 0x7f,         c102\n[6][0] = 12,[11][1] = 0,[11][2] = 0x7f,       c142\n[7][0] = 3,[13][1] = 0,[13][2] = 0x7f,        c1c2\n[8][0] = -3,[14][1] = 0,[14][2] = 0x7f};      c0c2\n*/\nstatic uint8_t g_controller_trace_level = BTDRV_INVALID_TRACE_LEVEL;\nstatic bool g_lmp_trace_enable = false;\nconst int8_t btdrv_rf_env_2300p[] = {\n    0x01, 0x00, // rf api\n    0x01,       // rf env\n    185,        // rf length\n    0x2,        // txpwr_max\n#ifdef __HW_AGC__\n    -1,   // high\n    -2,   // low\n    -100, // interf\n#else\n    -1,   /// rssi high thr\n    -2,   // rssi low thr\n    -100, // rssi interf thr\n#endif\n    0xf,       // rssi interf gain thr\n    2,         // wakeup delay\n    0xe, 0,    // skew\n    0xe8, 0x3, // ble agc inv thr\n#ifdef __HW_AGC__\n    0x1, // hw_sw_agc_flag\n#else\n    0x0,  //\n#endif\n    0xff, // sw gain set\n    0xff, // sw gain set\n    -70,  // bt_inq_page_iscan_pscan_dbm\n    0x7f, // ble_scan_adv_dbm\n    1,    // sw gain reset factor\n    1,    // bt sw gain cntl enable\n    0,    // ble sw gain cntl en\n    1,    // bt interfere  detector en\n    0,    // ble interfere detector en\n\n    -21, -27, -19, -18, -24, -13, -15, -21, -10, -12, -18, -10, -9, -15, -10,\n    -6, -12, -10, -3, -9, -10, 0, -6, 0, 0x7f, -3, 0x7f, 0x7f, 0, 0x7f, 0x7f,\n    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,\n    0x7f, 0x7f, // rx hwgain tbl ptr\n\n    // zhangzhd agc config use default 1216\n    50, 0, -80, 42, 0, -80, 38, 0, -80, 32, 0, -80, 26, 0, -80, 21, 0, -80, 15,\n    0, -80, 9, 0, -80,\n    // zhangzhd agc config end\n\n    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,\n    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, // rx gain tbl ptr\n    // zhangzhd agc config use default 1216\n    -80, -73, -75, -68, -70, -63, -65, -58, -60, -53, -55, -48, -50, -15,\n    // zhangzhd agc config end\n\n    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,\n    0x7f, 0x7f, 0x7f, 0x7f, // rx gain ths tbl ptr\n\n    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0, 2, 0, 2, 0x7f, 0x7f, 0x7f,\n    0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,\n    0x7f, // flpha filter factor ptr\n    -23, -20, -17, -14, -11, -8, -5, -2, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,\n    0x7f, // tx pw onv tbl ptr\n};\n\nconst int8_t btdrv_afh_env[] = {\n    0x02, 0x00,          // afh env\n    0x00,                // ignore\n    33,                  // length\n    5,                   // nb_reass_chnl\n    10,                  // win_len\n    -70,                 // rf_rssi_interf_thr\n    10,                  // per_thres_bad\n    20,                  // reass_int\n    20,                  // n_min\n    20,                  // afh_rep_intv_max\n    96,                  // ths_min\n    2,                   // chnl_assess_report_style\n    15,                  // chnl_assess_diff_thres\n    60,                  // chnl_assess_interfere_per_thres_bad\n    9,                   // chnl_assess_stat_cnt_max\n    -9,                  // chnl_assess_stat_cnt_min\n    1,    2,    3, 2, 1, // chnl_assess_stat_cnt_inc_mask[5]\n    1,    2,    3, 2, 1, // chnl_assess_stat_cnt_dec_mask\n    0xd0, 0x7,           // chnl_assess_timer\n    -48,                 // chnl_assess_min_rssi\n    0x64, 0,             // chnl_assess_nb_pkt\n    0x32, 0,             // chnl_assess_nb_bad_pkt\n    6,                   // chnl_reassess_cnt_val\n    0x3c, 0,             // chnl_assess_interfere_per_thres_bad\n};\n\nconst uint8_t lpclk_drift_jitter[] = {\n    0xfa, 0x00, //  drift  250ppm\n    0x0a, 0x00  // jitter  +-10us\n\n};\n\nconst uint8_t wakeup_timing[] = {\n    0xe8, 0x3, // exernal_wakeup_time 600us\n    0xe8, 0x3, // oscillater_wakeup_time  600us\n    0xe8, 0x3, // radio_wakeup_time  600us\n               // 0xa0,0xf,    //wakeup_delay_time\n};\n\nuint8_t sleep_param[] = {\n    1,             // sleep_en;\n    0,             // exwakeup_en;\n    0xc8, 0,       //  lpo_calib_interval;   lpo calibration interval\n    0x32, 0, 0, 0, // lpo_calib_time;  lpo count lpc times\n};\n\nuint8_t unsleep_param[] = {\n    0,             // sleep_en;\n    0,             // exwakeup_en;\n    0xc8, 0,       //  lpo_calib_interval;   lpo calibration interval\n    0x32, 0, 0, 0, // lpo_calib_time;  lpo count lpc times\n};\n\nstatic const uint32_t me_init_param[][2] = {\n    {0xffffffff, 0xffffffff},\n};\n\nconst uint16_t me_bt_default_page_timeout = 0x2000;\n\nconst uint8_t sync_config[] = {\n    1, 1, // sco path config   0:hci  1:pcm\n    0,    // sync use max buff length   0:sync data length= packet length 1:sync\n          // data length = host sync buff len\n    0,    // cvsd bypass     0:cvsd2pcm   1:cvsd transparent\n};\n\n// pcm general ctrl\n#define PCM_PCMEN_POS 15\n#define PCM_LOOPBCK_POS 14\n#define PCM_MIXERDSBPOL_POS 11\n#define PCM_MIXERMODE_POS 10\n#define PCM_STUTTERDSBPOL_POS 9\n#define PCM_STUTTERMODE_POS 8\n#define PCM_CHSEL_POS 6\n#define PCM_MSTSLV_POS 5\n#define PCM_PCMIRQEN_POS 4\n#define PCM_DATASRC_POS 0\n\n// pcm phy ctrl\n#define PCM_LRCHPOL_POS 15\n#define PCM_CLKINV_POS 14\n#define PCM_IOM_PCM_POS 13\n#define PCM_BUSSPEED_LSB 10\n#define PCM_SLOTEN_MASK ((uint32_t)0x00000380)\n#define PCM_SLOTEN_LSB 7\n#define PCM_WORDSIZE_MASK ((uint32_t)0x00000060)\n#define PCM_WORDSIZE_LSB 5\n#define PCM_DOUTCFG_MASK ((uint32_t)0x00000018)\n#define PCM_DOUTCFG_LSB 3\n#define PCM_FSYNCSHP_MASK ((uint32_t)0x00000007)\n#define PCM_FSYNCSHP_LSB 0\n\n/// Enumeration of PCM status\nenum PCM_STAT { PCM_DISABLE = 0, PCM_ENABLE };\n\n/// Enumeration of PCM channel selection\nenum PCM_CHANNEL { PCM_CH_0 = 0, PCM_CH_1 };\n\n/// Enumeration of PCM role\nenum PCM_MSTSLV { PCM_SLAVE = 0, PCM_MASTER };\n\n/// Enumeration of PCM data source\nenum PCM_SRC { PCM_SRC_DPV = 0, PCM_SRC_REG };\n\n/// Enumeration of PCM left/right channel selection versus frame sync polarity\nenum PCM_LR_CH_POL { PCM_LR_CH_POL_RIGHT_LEFT = 0, PCM_LR_CH_POL_LEFT_RIGHT };\n\n/// Enumeration of PCM clock inversion\nenum PCM_CLK_INV { PCM_CLK_RISING_EDGE = 0, PCM_CLK_FALLING_EDGE };\n\n/// Enumeration of PCM mode selection\nenum PCM_MODE { PCM_MODE_PCM = 0, PCM_MODE_IOM };\n\n/// Enumeration of PCM bus speed\nenum PCM_BUS_SPEED {\n  PCM_BUS_SPEED_128k = 0,\n  PCM_BUS_SPEED_256k,\n  PCM_BUS_SPEED_512k,\n  PCM_BUS_SPEED_1024k,\n  PCM_BUS_SPEED_2048k\n};\n\n/// Enumeration of PCM slot enable\nenum PCM_SLOT {\n  PCM_SLOT_NONE = 0,\n  PCM_SLOT_0,\n  PCM_SLOT_0_1,\n  PCM_SLOT_0_2,\n  PCM_SLOT_0_3\n};\n\n/// Enumeration of PCM word size\nenum PCM_WORD_SIZE { PCM_8_BITS = 0, PCM_13_BITS, PCM_14_BITS, PCM_16_BITS };\n\n/// Enumeration of PCM DOUT pad configuration\nenum PCM_DOUT_CFG { PCM_OPEN_DRAIN = 0, PCM_PUSH_PULL_HZ, PCM_PUSH_PULL_0 };\n\n/// Enumeration of PCM FSYNC physical shape\nenum PCM_FSYNC {\n  PCM_FSYNC_LF = 0,\n  PCM_FSYNC_FR,\n  PCM_FSYNC_FF,\n  PCM_FSYNC_LONG,\n  PCM_FSYNC_LONG_16\n};\n\nconst uint32_t pcm_setting[] = {\n    // pcm_general_ctrl\n    (PCM_DISABLE << PCM_PCMEN_POS) |       // enable auto\n        (PCM_DISABLE << PCM_LOOPBCK_POS) | // LOOPBACK test\n        (PCM_DISABLE << PCM_MIXERDSBPOL_POS) |\n        (PCM_DISABLE << PCM_MIXERMODE_POS) |\n        (PCM_DISABLE << PCM_STUTTERDSBPOL_POS) |\n        (PCM_DISABLE << PCM_STUTTERMODE_POS) | (PCM_CH_0 << PCM_CHSEL_POS) |\n        (PCM_MASTER << PCM_MSTSLV_POS) | // BT clock\n        (PCM_DISABLE << PCM_PCMIRQEN_POS) | (PCM_SRC_DPV << PCM_DATASRC_POS),\n\n    // pcm_phy_ctrl\n    (PCM_LR_CH_POL_RIGHT_LEFT << PCM_LRCHPOL_POS) |\n        (PCM_CLK_FALLING_EDGE << PCM_CLKINV_POS) |\n        (PCM_MODE_PCM << PCM_IOM_PCM_POS) |\n        (PCM_BUS_SPEED_2048k\n         << PCM_BUSSPEED_LSB) | // 8k sample rate; 2048k = slot_num *\n                                // sample_rate * bit= 16 * 8k * 16\n        (PCM_SLOT_0_1 << PCM_SLOTEN_LSB) |\n        (PCM_16_BITS << PCM_WORDSIZE_LSB) |\n        (PCM_PUSH_PULL_0 << PCM_DOUTCFG_LSB) |\n        (PCM_FSYNC_LF << PCM_FSYNCSHP_LSB),\n};\n\n#if 1\nconst uint8_t local_feature[] = {\n#if defined(__3M_PACK__)\n    0xBF, 0xeE, 0xCD, 0xFe, 0xdb,\n    0xFd, 0x7b, 0x87\n#else\n    0xBF, 0xeE, 0xCD, 0xFa, 0xdb,\n    0xbd, 0x7b, 0x87\n\n// 0xBF,0xFE,0xCD,0xFa,0xDB,0xFd,0x73,0x87   // disable simple pairing\n#endif\n};\n\n#else\n// disable simple pairing\nuint8_t local_feature[] = {0xBF, 0xFE, 0xCD, 0xFE, 0xDB, 0xFd, 0x73, 0x87};\n#endif\nconst uint8_t local_ex_feature_page1[] = {\n    1,                      // page\n    0, 0, 0, 0, 0, 0, 0, 0, // page 1 feature\n};\n\nconst uint8_t local_ex_feature_page2[] = {\n    2,                                              // page\n    0x1f, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // page 2 feature\n};\n\nconst uint8_t bt_rf_timing[] = {\n    0xE,  // tx delay\n    0x13, // rx delay\n    0x42, // rx pwrup\n    0x0f, /// tx down\n    0x56, // tx pwerup\n\n};\n\nconst uint8_t ble_rf_timing[] = {\n    0xC,  // tx delay   tx after rx delay\n    0x2C, // win count   rx window count\n    0xe,  /// ble rtrip delay\n    0x42, /// ble rx pwrup\n    0x7,  /// ble tx pwerdown\n    0x40, /// ble tx pwerup\n};\n\nconst uint8_t ble_rl_size[] = {\n    10, // rl size\n};\n\nuint8_t bt_setting_2300p[97] = {\n    0x00,       // clk_off_force_even\n    0x01,       // msbc_pcmdout_zero_flag\n    0x04,       // ld_sco_switch_timeout\n    0x01,       // stop_latency2\n    0x01,       // force_max_slot\n    0xc8, 0x00, // send_connect_info_to\n    0x20, 0x03, // sco_to_threshold\n    0x40, 0x06, // acl_switch_to_threshold\n    0x3a, 0x00, // sync_win_size\n    0x01,       // polling_rxseqn_mode\n#ifdef __BT_ONE_BRING_TWO__\n    0x01, // two_slave_sched_en\n#else\n    0x00, // two_slave_sched_en\n#endif\n    0xff,                   // music_playing_link\n    0x04,                   // wesco_nego = 2;\n    0x17, 0x11, 0x00, 0x00, // two_slave_extra_duration_add (7*625);\n    0x01,                   // ble_adv_ignore_interval\n    0x04,                   // slot_num_diff\n    0x01,                   // csb_tx_complete_event_enable\n    0x04,                   // csb_afh_update_period\n    0x00,                   // csb_rx_fixed_len_enable\n    0x01,                   // force_max_slot_acc\n    0x00,                   // force_5_slot;\n#ifdef BT_CONTROLER_DEBUG_TRACE\n    0x03, // dbg_trace_level\n#else\n    0x00,\n#endif\n    0x00,       // bd_addr_switch\n    0x00,       // force_rx_error\n    0x08,       // data_tx_adjust\n    0x02,       // ble txpower need modify ble tx idx @ bt_drv_config.c;\n    0x50,       // sco_margin\n    0x78,       // acl_margin\n    0x01,       // pca_disable_in_nosync\n    0x01,       // master_2_poll\n    0x3a,       // sync2_add_win\n    0x5e,       // no_sync_add_win\n    0x09,       // rwbt_sw_version_major\n    0x03, 0x00, // rwbt_sw_version_minor\n    0x21, 0x00, // rwbt_sw_version_build\n\n    0x01, // rwbt_sw_version_sub_build\n    0x00, // public_key_check;\n    0x00, // sco_txbuff_en;\n    0x3f, // role_switch_packet_br;\n    0x2b, // role_switch_packet_edr;\n    0x00, // dual_slave_tws_en;\n    0x07, // dual_slave_slot_add;\n    0x00, // master_continue_tx_en;\n\n    0x20, 0x03, // get_rssi_to_threshold;\n    0x05,       // rssi_get_times;\n    0x00,       // ptt_check;\n    0x0c,       // protect_sniff_slot;\n    0x00,       // power_control_type;\n#ifdef TX_RX_PCM_MASK\n    1, // sco_buff_copy\n#else\n    0,                      // sco_buff_copy\n#endif\n    0x32, 0x00, // acl_interv_in_snoop_mode;\n    0x78, 0x00, // acl_interv_in_snoop_sco_mode;\n\n    0x06, // acl_slot_in_snoop_mode;\n    0x01, // calculate_en;\n    0x00, // check_sniff_en;\n    0x01, // sco_avoid_ble_en;\n    0x01, // check_ble_en;\n    0x01, // ble_slot;\n    0x00, // same_link_slave_extra;\n    0x00, // other_link_slave_extra;\n\n    0x00,                   // master_extra;\n    0x00,                   // ble_extra;\n    0x00,                   // sco_extra;\n    0x00,                   // sniff_extra;\n    0x00, 0x00, 0x00, 0x00, // same_link_duration;\n    0x00, 0x00, 0x00, 0x00, // other_link_duration;\n\n    0x06,       // dual_slave;\n    0x0a,       // clk_check_threshold;\n    0x90, 0x01, // target_clk_add;\n    0x01,       // close_check_sco_to;\n    // 0x00,\n    // 0x00,                //chip tports_level (wrong) use\n    // btdrv_2300p_set_tports_level() 0x00,\n    0x01, //(tports_level)//chip read close_loopbacken_flag\n    0x01, // chip read based_clk_select\n    0x01, // chip read check_role_switch\n    0x00, // chip read rsw_end_prority\n    0x00, // chip read ecc_enable\n    0x00, // padding to 97-byte\n    0x00, // padding to 97-byte\n    0x00, // padding to 97-byte\n    0x00, // padding to 97-byte\n};\n\n//#define ACCEPT_NEW_MOBILE_EN\n\nuint8_t bt_setting_2300p_t2[104] = {\n    0x00,       // clk_off_force_even\n    0x01,       // msbc_pcmdout_zero_flag\n    0x04,       // ld_sco_switch_timeout\n    0x00,       // stop_latency2\n    0x01,       // force_max_slot\n    0xc8, 0x00, // send_connect_info_to\n    0x20, 0x03, // sco_to_threshold\n    0x40, 0x06, // acl_switch_to_threshold\n    0x3a, 0x00, // sync_win_size\n    0x01,       // polling_rxseqn_mode\n#ifdef __BT_ONE_BRING_TWO__\n    0x01, // two_slave_sched_en\n#else\n    0x00,                   // two_slave_sched_en\n#endif\n    0xff,                   // music_playing_link\n    0x04,                   // wesco_nego = 2;\n    0x17, 0x11, 0x00, 0x00, // two_slave_extra_duration_add (7*625);\n    0x01,                   // ble_adv_ignore_interval\n    0x04,                   // slot_num_diff\n    0x01,                   // csb_tx_complete_event_enable\n    0x04,                   // csb_afh_update_period\n    0x00,                   // csb_rx_fixed_len_enable\n    0x01,                   // force_max_slot_acc\n    0x00,                   // force_5_slot;\n    0x00,                   // dbg_trace_level\n    0x00,                   // bd_addr_switch\n    0x00,                   // force_rx_error\n    0x08,                   // data_tx_adjust\n    0x02,       // ble txpower need modify ble tx idx @ bt_drv_config.c;\n    0x50,       // sco_margin\n    0x78,       // acl_margin\n    0x01,       // pca_disable_in_nosync\n    0x01,       // master_2_poll\n    0x3a,       // sync2_add_win\n    0x5e,       // no_sync_add_win\n    0x09,       // rwbt_sw_version_major\n    0x03, 0x00, // rwbt_sw_version_minor\n    0x21, 0x00, // rwbt_sw_version_build\n\n    0x01, // rwbt_sw_version_sub_build\n    0x00, // public_key_check;\n    0x00, // sco_txbuff_en;\n    0x3f, // role_switch_packet_br;\n    0x2b, // role_switch_packet_edr;\n    0x00, // dual_slave_tws_en;\n    0x07, // dual_slave_slot_add;\n    0x00, // master_continue_tx_en;\n\n    0x20, 0x03, // get_rssi_to_threshold;\n    0x05,       // rssi_get_times;\n    0x00,       // ptt_check;\n    0x0c,       // protect_sniff_slot;\n    0x01,       // power_control_type;\n#ifdef TX_RX_PCM_MASK\n    0x01, // sco_buff_copy\n#else\n    0x00,                   // sco_buff_copy\n#endif\n    0x32, 0x00, // acl_interv_in_snoop_mode;\n    0x48, 0x00, // acl_interv_in_snoop_sco_mode;\n\n    0x06, // acl_slot_in_snoop_mode;\n    0x01, // calculate_en;\n    0x00, // check_sniff_en;\n    0x01, // sco_avoid_ble_en;\n    0x01, // check_ble_en;\n    0x01, // ble_slot;\n    0x00, // same_link_slave_extra;\n    0x00, // other_link_slave_extra;\n\n    0x00, // master_extra;\n    0x00, // ble_extra;\n    0x00, // sco_extra;\n    0x00, // sniff_extra;\n#ifdef __FORCE_SCO_MAX_RETX__\n    0x02, 0x00, 0x00, 0x00, // same_link_duration;\n#else\n    0x00, 0x00, 0x00, 0x00, // same_link_duration;\n#endif\n    0x00, 0x00, 0x00, 0x00, // other_link_duration;\n\n    0x06,       // dual_slave;\n    0x14,       // clk_check_threshold;\n    0x90, 0x01, // target_clk_add;\n    0x01,       // close_check_sco_to;\n    0x00, 0x00, //(tports_level)\n    0x01,       // close_loopbacken_flag\n    0x1e,       // seq_error_num\n    0x01,       // check_role_switch\n    0x01,       // rsw_end_prority\n#ifdef __FASTACK_ECC_ENABLE__\n    0x01, // ecc_enable\n#else\n    0x00,                   // ecc_enable\n#endif\n    0x01, // sw_seq_filter_en\n    0x01, // page_pagescan_coex_en\n#ifdef ACCEPT_NEW_MOBILE_EN\n    0x01, // accept_new_mobile_en\n#else\n    0x00,\n#endif\n    0x64,       // reserve_slot_for_send_profile\n    0x0e,       // magic_cal_bitoff\n    0x00,       // sco_role_switch_mode\n    0x00,       // address_reset\n    0xa6, 0x0e, // adv_duration\n};\n\nuint8_t bt_setting_ext1_2300p_t3[25] = {\n    0x00, 0x01, // stop_notif_bit_off_thr\n    0x32, 0x00, // bit_off_diff\n    0x00,       // bt_wlan_onoff\n    0x12,       // tws_link_in_sco_prio\n    0x01,       // tws_link_rx_traficc\n    0x00,       // tws_link_ignore_1_sco;\n    0x08,       // default_tpoll\n    0x00,       // send_profile_via_ble\n    0x0a,       // swagc_thd\n    0x98,       // swagc_count\n    0x14,       // max_drift_limit\n    0x00,       // sync2_sco_cal_enable\n#ifdef IBRT\n    0x00, // accep_remote_bt_roleswitch\n#else\n    0x01,\n#endif\n    0x01,       // hci_auto_accept_tws_link_en\n    0x00,       // enable_assert\n    0x00,       // reserved\n    0xc8, 0x00, // hci_timeout_sleep\n    0x50,       // link_no_snyc_thd\n    0xa6,       // link_no_sync_rssi(-90dBm)\n    0x64, 0x00, // link_no_sync_timeout\n    0x01,       // ibrt_role_switch_check_sco\n};\n\nbool btdrv_get_accept_new_mobile_enable(void) {\n  bool ret = false;\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n    BT_DRV_TRACE(1, \"BT_DRV_CONFIG:accept_new_mobile enable=%d\",\n                 bt_setting_2300p_t2[97]);\n    ret = bt_setting_2300p_t2[97];\n  }\n  return ret;\n}\n\nbool btdrv_get_page_pscan_coex_enable(void) {\n  bool ret = false;\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n    BT_DRV_TRACE(1, \"BT_DRV_CONFIG:page_pscan_coex enable=%d\",\n                 bt_setting_2300p_t2[96]);\n    ret = bt_setting_2300p_t2[96];\n  }\n  return ret;\n}\n\nconst uint8_t bt_edr_thr[] = {\n    30,   0,    60,   0,    5,    0,    60,   0,    0,    1,    30,   0,\n    60,   0,    5,    0,    60,   0,    1,    1,    30,   0,    60,   0,\n    5,    0,    60,   0,    1,    1,    0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n};\n\nconst uint8_t bt_edr_algo[] = {\n    0,    0,    1,    8,    0,    3,    16,   0,    0,    0xff, 0xff,\n    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,\n};\n\nconst uint8_t bt_rssi_thr[] = {\n    -1,   // high\n    -2,   // low\n    -100, // interf\n};\n\nconst uint8_t ble_dle_dft_value[] = {\n    0xfb, 0x00, /// tx octets\n    0x48, 0x08, /// tx time\n    0xfb, 0x00, /// rx octets\n    0x48, 0x08, /// rx time\n};\n\nuint8_t bt_lmp_record[] = {\n    0, // en\n    0, // only opcode\n};\n\nstatic BTDRV_CFG_TBL_STRUCT btdrv_cfg_tbl[] = {\n    {BTDRV_CONFIG_INACTIVE, HCI_DBG_LMP_MESSAGE_RECORD_CMD_OPCODE,\n     sizeof(bt_lmp_record), (uint8_t *)&bt_lmp_record},\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_LOCAL_FEATURE_CMD_OPCODE,\n     sizeof(local_feature), local_feature},\n    {BTDRV_CONFIG_INACTIVE, HCI_DBG_SET_BT_SETTING_CMD_OPCODE,\n     sizeof(bt_setting_2300p), bt_setting_2300p},\n    {BTDRV_CONFIG_INACTIVE, HCI_DBG_SET_BT_SETTING_CMD_OPCODE,\n     sizeof(bt_setting_2300p_t2), bt_setting_2300p_t2},\n    {BTDRV_CONFIG_INACTIVE, HCI_DBG_SET_BT_SETTING_EXT1_CMD_OPCODE,\n     sizeof(bt_setting_ext1_2300p_t3), bt_setting_ext1_2300p_t3},\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_SLEEP_SETTING_CMD_OPCODE,\n     sizeof(sleep_param), sleep_param},\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_CUSTOM_PARAM_CMD_OPCODE, 189,\n     (uint8_t *)&btdrv_rf_env_2300p},\n//{BTDRV_CONFIG_ACTIVE,HCI_DBG_SET_CUSTOM_PARAM_CMD_OPCODE,sizeof(btdrv_afh_env),(uint8_t\n//*)&btdrv_afh_env},\n// {BTDRV_CONFIG_INACTIVE,HCI_DBG_SET_LPCLK_DRIFT_JITTER_CMD_OPCODE,sizeof(lpclk_drift_jitter),(uint8_t\n// *)&lpclk_drift_jitter},\n// {BTDRV_CONFIG_ACTIVE,HCI_DBG_SET_WAKEUP_TIME_CMD_OPCODE,sizeof(wakeup_timing),(uint8_t\n// *)&wakeup_timing},\n#ifdef _SCO_BTPCM_CHANNEL_\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_SYNC_CONFIG_CMD_OPCODE,\n     sizeof(sync_config), (uint8_t *)&sync_config},\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_PCM_SETTING_CMD_OPCODE,\n     sizeof(pcm_setting), (uint8_t *)&pcm_setting},\n#endif\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_RSSI_THRHLD_CMD_OPCODE,\n     sizeof(bt_rssi_thr), (uint8_t *)&bt_rssi_thr},\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_LOCAL_EX_FEATURE_CMD_OPCODE,\n     sizeof(local_ex_feature_page2), (uint8_t *)&local_ex_feature_page2},\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_BT_RF_TIMING_CMD_OPCODE,\n     sizeof(bt_rf_timing), (uint8_t *)&bt_rf_timing},\n    {BTDRV_CONFIG_ACTIVE, HCI_DBG_SET_BLE_RF_TIMING_CMD_OPCODE,\n     sizeof(ble_rf_timing), (uint8_t *)&ble_rf_timing},\n};\n\nconst static POSSIBLY_UNUSED BTDRV_CFG_TBL_STRUCT btdrv_cfg_tbl_2[] = {\n\n};\n\nconst static POSSIBLY_UNUSED uint32_t mem_config_2300p[][2] = {\n\n};\n\nvoid bt_drv_digital_config_for_ble_adv(bool en) {\n#ifdef __HW_AGC__\n  btdrv_hw_agc_stop_mode(BT_SYNCMODE_REQ_USER_BLE, en);\n#endif\n}\n\nvoid btdrv_digital_config_init_2300p_t2(void) {\n  // common\n  BTDIGITAL_REG(0xd0350370) |= (1 << 29);  // lowpass flt enable\n  BTDIGITAL_REG(0xd0330038) |= (1 << 11);  // sel 26m sys\n  BTDIGITAL_REG(0xd0330038) &= 0xffffff3f; // sel 26m sys\n  BTDIGITAL_REG(0xd03300f0) &= ~0x1;       // sel 26m sys\n\n  BTDIGITAL_REG(0xd0350398) = 0x6e4ef79c;\n  BTDIGITAL_REG(0xd03503a8) = 0x15A64E88;\n\n  // IBRT\n  BTDIGITAL_REG(0xd0220464) &= 0xdfffffff; // fast ack 2M mode dis\n\n#ifdef __FASTACK_ECC_ENABLE__\n  BTDIGITAL_REG(0xd0220468) = 0x04401914; // fast ack timings & fastlock en\n#else\n  BTDIGITAL_REG(0xd0220468) = 0x10423528; // fast ack timings\n#endif //__FASTACK_ECC_ENABLE__\n\n#ifdef __FA_RX_GAIN_CTRL__\n  BTDIGITAL_REG(0xd0220080) &= 0xff00ffff;\n  BTDIGITAL_REG(0xd0220080) |= 0x00770000; // trx pwrup/dn\n  BTDIGITAL_REG(0xd02201e8) |= 1;          // second rf spi en\n  BTDIGITAL_REG(0xd0220480) = (BTDIGITAL_REG(0xd0220480) & (~0xff)) | 0xbf;\n  BTDIGITAL_REG(0xd0220484) =\n      (BTDIGITAL_REG(0xd0220484) & (~0xffff)) |\n      0x9403; // lxd 20191102 fixed ecc receive gain to 1 level\n#endif\n#ifdef __CLK_GATE_DISABLE__\n  BTDIGITAL_REG(0xD0330024) &= (~0x00020);\n  BTDIGITAL_REG(0xD0330024) |= 0x40000;\n  BTDIGITAL_REG(0xD0330038) |= 0x200000;\n#endif\n}\n\nvoid btdrv_digital_config_init_2300p_t1(void) {\n#ifdef BT_RF_OLD_CORR_MODE\n  BTDIGITAL_REG(0xD03503A0) &= (~0x01); // clear bit 0 avoid slave lost data\n#else\n  BTDIGITAL_REG(0xD03503A0) |= (0x01);\n#endif\n  BTDIGITAL_REG(0x40000074) = 0x00003100;\n  BTDIGITAL_REG(0x400000F0) = 0xFFFF0002; // open slot en\n\n  BTDIGITAL_REG(0xd0350240) = 0x0001a407;\n  BTDIGITAL_REG(0xd03502c8) = 0x00000080; // for old ramp\n  BTDIGITAL_REG(0xd03502cc) = 0x00000015; // for old ramp\n\n#ifdef __HW_AGC__\n  BTDIGITAL_REG(0xd0350208) = 0x7fffffff;\n  btdrv_delay(10);\n  BTDIGITAL_REG(0xd0350228) = 0x7f7fffff;\n  BTDIGITAL_REG(0xd03300f0) = 0xffff0008; // hwagc config\n  BTDIGITAL_REG(0xd03503b8) = 0x08000d80; // hwagc config\n#endif\n\n  BTDIGITAL_REG(0xd02201e8) = (BTDIGITAL_REG(0xd02201e8) & (~0x7c0)) | 0x380;\n  BTDIGITAL_REG(0xd0350360) = 0x003fe040;\n  BTDIGITAL_REG(0xd0220470) |= 0x40;\n\n#ifdef __CLK_GATE_DISABLE__\n  BTDIGITAL_REG(0xD0330024) &= (~0x00020);\n  BTDIGITAL_REG(0xD0330024) |= 0x40000;\n  BTDIGITAL_REG(0xD0330038) |= 0x200000;\n#endif\n\n#ifdef LBRT\n  BTDIGITAL_REG(0xd0350300) = 0x00000000;\n  BTDIGITAL_REG(0xd0350340) = 0x00000000;\n#else\n#ifdef __BDR_EDR_2DB__\n  BTDIGITAL_REG(0xd0350300) = 0x55;\n  BTDIGITAL_REG(0xd0350308) = 0x00003C0F;\n#else\n  BTDIGITAL_REG(0xd0350300) = 0x11;\n#endif\n  BTDIGITAL_REG(0xd0350340) = 0x1;\n#endif\n  // 0x07 will affect Bluetooth sensitivity\n  // 0x06 will lead to LBRT rx bad in close distance\n  BTDIGITAL_REG(0xd0350280) = 0x00000006;\n  BTDIGITAL_REG(0xd035031c) = 0x00050004; // modulation factor 17/16\n  BTDIGITAL_REG(0xd0350320) = 0x00350011; // added by xrz 2018.10.10\n  BTDIGITAL_REG(0xd0220080) = 0x0e571439; // trx pwrup/dn\n  BTDIGITAL_REG(0xd0220280) = 0x0e471445; // add by luobin 2019/05/23\n\n  BTDIGITAL_REG(0xd0350210) = 0x00f10040; // add by walker 2018/12/27\n  BTDIGITAL_REG(0xd03502c4) = 0x127f02ef; // 2M TE time init\n  BTDIGITAL_REG(0xd0350284) = 0x02000200;\n  BTDIGITAL_REG_SET_FIELD(0xd0220200, 7, 0, 3);\n\n  BTDIGITAL_REG(0xd0350398) = 0xD25EF79C;\n  BTDIGITAL_REG(0xd035039c) = 0x60C6C061; // hwagc config\n\n  BTDIGITAL_REG(0xd03503a8) = 0x14666E88; // hwagc config\n  BTDIGITAL_REG(0xd0350364) = 0x002EB948; // data sign and iq swap\n  BTDIGITAL_REG(0xd03503a0) =\n      0x1c070055; // improve 1M RX sensitivity by jiangpeng\n\n  // for system 2M Band Wide\n  BTDIGITAL_REG(0x4008003c) |= 1;\n  BTDIGITAL_REG(0x40080018) |= 1;\n  BTDIGITAL_REG(0x40080004) |= (1 << 15) | (1 << 30); // osc x4 enable\n  BTDIGITAL_REG(0xd0330038) |= (3 << 6) | (1 << 11);\n  BTDIGITAL_REG(0xd03300f0) |= 1;\n\n  // for IBRT fast ack\n  BTDIGITAL_REG(0xd0220464) |= 1 << 29;    // fast ack 2M mode enable\n  BTDIGITAL_REG(0xd0220468) = 0x00403832;  // 2M fast ack timings\n  BTDIGITAL_REG(0xd022046c) &= ~(1 << 31); // enable DM1 empty fastack\n  BTDIGITAL_REG(0xd035020C) = 0x00f1002c;\n  BTDIGITAL_REG(0xD0350210) = 0x00f1082c; // tx guard\n  BTDIGITAL_REG(0xd0220498) = 0x00A01991; // fast ack timeout\n}\n\nextern const uint8_t lmp_sniffer_filter_tab[51];\nextern const uint8_t lmp_ext_sniffer_filter_tab[18];\nextern const uint8_t lmp_ext_sniffer_fast_cfm_tab[4];\nvoid bt_drv_config_lmp_filter_table(void) {\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    BTDIGITAL_REG(0xc0000300) = 0xc00070f4;\n    BT_DRV_TRACE(2, \"%s: 0x%x\", __func__, BTDIGITAL_REG(0xc0000300));\n    memcpy((uint8_t *)(0xc00070f4), lmp_sniffer_filter_tab,\n           sizeof(lmp_sniffer_filter_tab));\n  } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    BTDIGITAL_REG(0xc0000314 + 4) = 0xC0006e40;\n    memcpy((uint8_t *)(0xC0006e40), lmp_ext_sniffer_filter_tab,\n           sizeof(lmp_ext_sniffer_filter_tab));\n    BTDIGITAL_REG(0xc0000314 + 0xc) = 0xC0006c9c;\n    BT_DRV_TRACE(3, \"%s: 0x%x, 0x%x\", __func__, BTDIGITAL_REG(0xc0000314 + 4),\n                 BTDIGITAL_REG(0xc0000314 + 0xc));\n    memcpy((uint8_t *)(0xC0006c9c), lmp_ext_sniffer_fast_cfm_tab,\n           sizeof(lmp_ext_sniffer_fast_cfm_tab));\n  }\n}\n\nuint32_t ld_ibrt_sco_req_filter_patch[] = {\n    0x7981b470, /*76c0*/\n    0xf1034b0b, 0xe0020410, 0x42a33304, 0x785ad00c, 0xd1f9428a, 0x789a7a06,\n    0xd1f54296, 0x78da8946, 0xd1f14296, 0xe0002001, 0xbc702000, 0xbf004770,\n    0xc0007450, // sniffer_sco_filter\n};\n\nvoid bt_drv_func_ld_ibrt_sco_req_filter(void) {\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    memcpy((uint32_t *)(0xc00076c0), ld_ibrt_sco_req_filter_patch,\n           sizeof(ld_ibrt_sco_req_filter_patch));\n  }\n}\n\nextern void bt_drv_reg_op_controller_mem_log_config(void);\nvoid btdrv_config_init(void) {\n  BT_DRV_TRACE(1, \"%s\", __func__);\n\n  if (btdrv_get_lmp_trace_enable()) {\n    // enable lmp trace\n    bt_lmp_record[0] = 1;\n    bt_lmp_record[1] = 1;\n    btdrv_cfg_tbl[0].is_act = BTDRV_CONFIG_ACTIVE;\n    ASSERT((btdrv_cfg_tbl[0].opcode == HCI_DBG_LMP_MESSAGE_RECORD_CMD_OPCODE),\n           \"lmp config not match\");\n  }\n\n  if (btdrv_get_controller_trace_level() != BTDRV_INVALID_TRACE_LEVEL) {\n    // enable controller trace\n    bt_setting_2300p[28] = btdrv_get_controller_trace_level();\n    bt_setting_2300p_t2[28] = btdrv_get_controller_trace_level();\n  }\n\n  for (uint8_t i = 0; i < sizeof(btdrv_cfg_tbl) / sizeof(btdrv_cfg_tbl[0]);\n       i++) {\n    if (btdrv_cfg_tbl[i].opcode == HCI_DBG_SET_BT_SETTING_CMD_OPCODE) {\n      if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0 &&\n          btdrv_cfg_tbl[i].parlen == sizeof(bt_setting_2300p)) {\n        btdrv_send_cmd(btdrv_cfg_tbl[i].opcode, btdrv_cfg_tbl[i].parlen,\n                       btdrv_cfg_tbl[i].param);\n        btdrv_delay(1);\n      } else if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1 &&\n                 btdrv_cfg_tbl[i].parlen == sizeof(bt_setting_2300p_t2)) {\n        btdrv_send_cmd(btdrv_cfg_tbl[i].opcode, btdrv_cfg_tbl[i].parlen,\n                       btdrv_cfg_tbl[i].param);\n        btdrv_delay(1);\n      }\n    }\n\n    if (btdrv_cfg_tbl[i].opcode == HCI_DBG_SET_BT_SETTING_EXT1_CMD_OPCODE) {\n      if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2 &&\n          btdrv_cfg_tbl[i].parlen == sizeof(bt_setting_ext1_2300p_t3)) {\n        btdrv_send_cmd(btdrv_cfg_tbl[i].opcode, btdrv_cfg_tbl[i].parlen,\n                       btdrv_cfg_tbl[i].param);\n        btdrv_delay(1);\n      }\n    }\n    // BT other config\n    if (btdrv_cfg_tbl[i].is_act == BTDRV_CONFIG_ACTIVE) {\n      btdrv_send_cmd(btdrv_cfg_tbl[i].opcode, btdrv_cfg_tbl[i].parlen,\n                     btdrv_cfg_tbl[i].param);\n      btdrv_delay(1);\n    }\n  }\n\n  // BT registers config\n  for (uint8_t i = 0;\n       i < sizeof(mem_config_2300p) / sizeof(mem_config_2300p[0]); i++) {\n    btdrv_write_memory(_32_Bit, mem_config_2300p[i][0],\n                       (uint8_t *)&mem_config_2300p[i][1], 4);\n    btdrv_delay(1);\n  }\n\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    btdrv_digital_config_init_2300p_t1();\n    if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n      btdrv_digital_config_init_2300p_t2();\n    }\n  }\n\n  if (btdrv_get_controller_trace_dump_enable()) {\n    bt_drv_reg_op_controller_mem_log_config();\n  }\n\n  bt_drv_config_lmp_filter_table();\n  bt_drv_func_ld_ibrt_sco_req_filter();\n  bt_drv_set_fa_invert_enable(BT_FA_INVERT_EN);\n}\n\n// zhangzhd agc config use default 1216\n\n#define RX_GAIN_STEP0 -77\n#define RX_GAIN_STEP1 -72\n#define RX_GAIN_STEP2 -67\n#define RX_GAIN_STEP3 -62\n#define RX_GAIN_STEP4 -57\n#define RX_GAIN_STEP5 -52\n#define RX_GAIN_STEP6 -47\n// zhangzhd agc config use default 1216 end\n\nvoid bt_drv_adaptive_fa_rx_gain(int8_t rssi) {\n#ifdef __FA_RX_GAIN_CTRL__\n  uint8_t gain_step = 0xff;\n  static uint8_t old_step = 0xff;\n\n  if (rssi <= RX_GAIN_STEP0) {\n    gain_step = 0;\n  } else if (rssi <= RX_GAIN_STEP1) {\n    gain_step = 1;\n  } else if (rssi <= RX_GAIN_STEP2) {\n    gain_step = 2;\n  } else if (rssi <= RX_GAIN_STEP3) {\n    gain_step = 3;\n  } else if (rssi <= RX_GAIN_STEP4) {\n    gain_step = 4;\n  } else if (rssi <= RX_GAIN_STEP5) {\n    gain_step = 5;\n  } else if (rssi <= RX_GAIN_STEP6) {\n    gain_step = 6;\n  } else {\n    gain_step = 7;\n  }\n\n  if (old_step != gain_step) {\n    BT_DRV_TRACE(2, \"if rssi = %d,then set fa %d level \", rssi, gain_step);\n    BT_DRV_REG_OP_ENTER();\n    bt_drv_reg_op_fa_gain_direct_set(gain_step);\n    BT_DRV_REG_OP_EXIT();\n    old_step = gain_step;\n  }\n#endif\n}\n\nbool btdrv_is_ecc_enable(void) {\n  bool ret = false;\n#ifdef __FASTACK_ECC_ENABLE__\n  ret = true;\n#endif\n  return ret;\n}\n\n#ifdef LAURENT_ALGORITHM\nvoid btdrv_bt_laurent_algorithm_enable(void) {\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    BT_DRV_TRACE(1, \"%s\", __func__);\n    BTDIGITAL_REG(0xd03503a8) = 0x14664E88;\n    BTDIGITAL_REG(0xd0350240) = 0x0001A40F;\n    BTDIGITAL_REG(0xd0350364) = 0x202EB948; // lau_gain\n    BTDIGITAL_REG(0xd0350374) = 0x00A40DCD; // c1c2 0x06001e0\n    BTDIGITAL_REG(0xd0350228) = 0x12040800; // clkmode\n    BTDIGITAL_REG(0xd03503C8) = 0x00840CCD; // train c1c2\n    BTDIGITAL_REG(0xd03503A0) = 0x1C070065; // new corr en\n    BTDIGITAL_REG(0xd0220460) = 0x039EF088; // mac laurent_en\n    BTDIGITAL_REG(0xd0350370) = 0x6B240A3D; // laurent_en  0x\n    BTDIGITAL_REG(0xd0350280) = 0x00000007; // bt_dfe_forcera\n    BTDIGITAL_REG(0xd03502C4) = 0x127F02E8; // te_timeinit\n  }\n}\n\nvoid btdrv_ble_laurent_algorithm_enable(void) {\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    BT_DRV_TRACE(1, \"%s\", __func__);\n    BTDIGITAL_REG(0xd0350370) = 0x63240A3D; // lp disable\n    BTDIGITAL_REG(0xd0350280) = 0x00000007; // dfe_forceraw=0 psd_avgen=1\n  }\n}\n#endif\n\n////////////////////////////////////////test\n/// mode////////////////////////////////////////////\n\nvoid btdrv_sleep_config(uint8_t sleep_en) {\n  sleep_param[0] = sleep_en;\n  btdrv_send_cmd(HCI_DBG_SET_SLEEP_SETTING_CMD_OPCODE, 8, sleep_param);\n  btdrv_delay(1);\n}\n\nvoid btdrv_feature_default(void) {\n  const uint8_t feature[] = {0xBF, 0xeE, 0xCD, 0xFe, 0xc3, 0xFf, 0x7b, 0x87};\n  btdrv_send_cmd(HCI_DBG_SET_LOCAL_FEATURE_CMD_OPCODE, 8, feature);\n  btdrv_delay(1);\n}\n\nconst uint8_t test_mode_addr[6] = {0x77, 0x77, 0x77, 0x77, 0x77, 0x77};\nvoid btdrv_test_mode_addr_set(void) {\n  return;\n\n  btdrv_send_cmd(HCI_DBG_SET_BD_ADDR_CMD_OPCODE, sizeof(test_mode_addr),\n                 test_mode_addr);\n  btdrv_delay(1);\n}\n\nuint8_t meInit_param_get_entry_idx = 0;\n\nint btdrv_meinit_param_init(void) {\n  int size = 0;\n  if ((me_init_param[0][0] == 0xffffffff) &&\n      (me_init_param[0][1] == 0xffffffff)) {\n    size = -1;\n  }\n  meInit_param_get_entry_idx = 0;\n  return size;\n}\n\nint btdrv_meinit_param_remain_size_get(void) {\n  int remain_size;\n  if ((me_init_param[0][0] == 0xffffffff) &&\n      (me_init_param[0][1] == 0xffffffff)) {\n    return -1;\n  }\n  remain_size = ARRAY_SIZE(me_init_param) - meInit_param_get_entry_idx;\n  return remain_size;\n}\n\nint btdrv_meinit_param_next_entry_get(uint32_t *addr, uint32_t *val) {\n  if (meInit_param_get_entry_idx > (ARRAY_SIZE(me_init_param) - 1))\n    return -1;\n  *addr = me_init_param[meInit_param_get_entry_idx][0];\n  *val = me_init_param[meInit_param_get_entry_idx][1];\n  meInit_param_get_entry_idx++;\n  return 0;\n}\n\nenum {\n  SYNC_IDLE,\n  SYNC_64_ORG,\n  SYNC_68_ORG,\n  SYNC_72_ORG,\n  SYNC_64_NEW,\n  SYNC_68_NEW,\n  SYNC_72_NEW,\n};\n\nenum {\n  SYNC_64_BIT,\n  SYNC_68_BIT,\n  SYNC_72_BIT,\n};\n\nuint32_t bt_sync_type = SYNC_IDLE;\nvoid btdrv_sync_config(void) {\n  uint32_t corr_mode = BTDIGITAL_REG(0xd0220460);\n  uint32_t dfe_mode = BTDIGITAL_REG(0xd0350360);\n  uint32_t timeinit = BTDIGITAL_REG(0xd03502c4);\n  if (bt_sync_type == SYNC_IDLE)\n    return;\n\n  corr_mode = (corr_mode & 0xfffffff8); // bit2: enh dfe; [1:0]: bt_corr_mode\n  dfe_mode = (dfe_mode &\n              0xffffffe0); // bit4: dfe_header_mode_bt; [3:0]: dfe_delay_cycle\n  timeinit = (timeinit & 0xfffff800); //[10:0]: tetimeinit value\n\n  switch (bt_sync_type) {\n  case SYNC_64_ORG:\n    corr_mode |= 0x0;\n    dfe_mode |= 0x00;\n    timeinit |= 0x2eb;\n    break;\n  case SYNC_68_ORG:\n    corr_mode |= 0x1;\n    dfe_mode |= 0x00;\n    timeinit |= 0x2eb;\n    break;\n  case SYNC_72_ORG:\n    corr_mode |= 0x2;\n    dfe_mode |= 0x00;\n    timeinit |= 0x2b7;\n    break;\n  case SYNC_64_NEW:\n    corr_mode |= 0x4;\n    dfe_mode |= 0x14;\n    timeinit |= 0x2eb;\n    break;\n  case SYNC_68_NEW:\n    corr_mode |= 0x5;\n    dfe_mode |= 0x14;\n    timeinit |= 0x2eb;\n    break;\n  case SYNC_72_NEW:\n    corr_mode |= 0x6;\n    dfe_mode |= 0x10;\n    timeinit |= 0x2b7;\n    break;\n  }\n  BTDIGITAL_REG(0xd0220460) = corr_mode;\n  BTDIGITAL_REG(0xd0350360) = dfe_mode;\n  BTDIGITAL_REG(0xd03502c4) = timeinit;\n}\n// HW SPI TRIG\n\n#define REG_SPI_TRIG_SELECT_LINK0_ADDR EM_BT_BT_EXT1_ADDR // 114a+66\n#define REG_SPI_TRIG_SELECT_LINK1_ADDR                                         \\\n  (EM_BT_BT_EXT1_ADDR + BT_EM_SIZE) // 11b8+66\n#define REG_SPI_TRIG_NUM_ADDR 0xd0220400\n#define REG_SPI0_TRIG_POS_ADDR 0xd0220454\n#define REG_SPI1_TRIG_POS_ADDR 0xd0220458\n\nstruct SPI_TRIG_NUM_T {\n  uint32_t spi0_txon_num : 3;  // spi0 number of tx rising edge\n  uint32_t spi0_txoff_num : 3; // spi0 number of tx falling edge\n  uint32_t spi0_rxon_num : 2;  // spi0 number of rx rising edge\n  uint32_t spi0_rxoff_num : 2; // spi0 number of rx falling edge\n  uint32_t spi0_fast_mode : 1;\n  uint32_t spi0_gap : 4;\n  uint32_t hwspi0_en : 1;\n  uint32_t spi1_txon_num : 3;  // spi1 number of tx rising edge\n  uint32_t spi1_txoff_num : 3; // spi1 number of tx falling edge\n  uint32_t spi1_rxon_num : 2;  // spi1 number of rx rising edge\n  uint32_t spi1_rxoff_num : 2; // spi1 number of rx falling edge\n  uint32_t spi1_fast_mode : 1;\n  uint32_t spi1_gap : 4;\n  uint32_t hwspi1_en : 1;\n};\n\nstruct SPI_TRIG_POS_T {\n  uint32_t spi_txon_pos : 7;\n  uint32_t spi_txoff_pos : 9;\n  uint32_t spi_rxon_pos : 7;\n  uint32_t spi_rxoff_pos : 9;\n};\n\nstruct spi_trig_data {\n  uint32_t reg;\n  uint32_t value;\n};\n\nstatic const struct spi_trig_data spi0_trig_data_tbl[] = {\n    //{addr,data([23:0])}\n    {0xd0220404, 0x8080e9}, // spi0_trig_txdata1\n    {0xd0220408, 0x000000}, // spi0_trig_txdata2\n    {0xd022040c, 0x000000}, // spi0_trig_txdata3\n    {0xd0220410, 0x000000}, // spi0_trig_txdata4\n#ifdef __FA_RX_GAIN_CTRL__\n    {0xd022041c, 0x0094bf}, // spi0_trig_rxdata1\n#else\n    {0xd022041c, 0x000000}, // spi0_trig_rxdata1\n#endif\n    {0xd0220420, 0x000000}, // spi0_trig_rxdata2\n    {0xd0220424, 0x000000}, // spi0_trig_rxdata3\n    {0xd0220428, 0x000000}, // spi0_trig_rxdata4\n    {0xd0220414, 0x000000}, // spi0_trig_trxdata5\n    {0xd0220418, 0x000000}, // spi0_trig_trxdata6\n};\n\nstatic const struct spi_trig_data spi1_trig_data_tbl[] = {\n//{addr,data([23:0])}\n#ifdef __FA_RX_GAIN_CTRL__\n    {0xd022042c, 0x8080e9}, // spi1_trig_txdata1\n#else\n    {0xd022042c, 0x000000}, // spi1_trig_txdata1\n#endif\n    {0xd0220430, 0x000000}, // spi1_trig_txdata2\n    {0xd0220434, 0x000000}, // spi1_trig_txdata3\n    {0xd0220438, 0x000000}, // spi1_trig_txdata4\n#ifdef __FA_RX_GAIN_CTRL__\n    {0xd0220444, 0x0094bf}, // spi1_trig_rxdata1\n#else\n    {0xd0220444, 0x000000}, // spi1_trig_rxdata1\n#endif\n    {0xd0220448, 0x000000}, // spi1_trig_rxdata2\n    {0xd022044c, 0x000000}, // spi1_trig_rxdata3\n    {0xd0220450, 0x000000}, // spi1_trig_rxdata4\n    {0xd022043c, 0x000000}, // spi1_trig_trxdata5\n    {0xd0220440, 0x000000}, // spi1_trig_trxdata6\n};\n\nvoid btdrv_spi_trig_data_change(uint8_t spi_sel, uint8_t index,\n                                uint32_t value) {\n  if (!spi_sel) {\n    BTDIGITAL_REG(spi0_trig_data_tbl[index].reg) = value & 0xFFFFFF;\n  } else {\n    BTDIGITAL_REG(spi1_trig_data_tbl[index].reg) = value & 0xFFFFFF;\n  }\n}\n\nvoid btdrv_spi_trig_data_set(uint8_t spi_sel) {\n  if (!spi_sel) {\n    for (uint8_t i = 0; i < ARRAY_SIZE(spi0_trig_data_tbl); i++) {\n      BTDIGITAL_REG(spi0_trig_data_tbl[i].reg) = spi0_trig_data_tbl[i].value;\n    }\n  } else {\n    for (uint8_t i = 0; i < ARRAY_SIZE(spi1_trig_data_tbl); i++) {\n      BTDIGITAL_REG(spi1_trig_data_tbl[i].reg) = spi1_trig_data_tbl[i].value;\n    }\n  }\n}\n\nvoid btdrv_spi_trig_num_set(uint8_t spi_sel,\n                            struct SPI_TRIG_NUM_T *spi_trig_num) {\n  uint8_t tx_onoff_total_num;\n  uint8_t rx_onoff_total_num;\n\n  if (!spi_sel) {\n    tx_onoff_total_num =\n        spi_trig_num->spi0_txon_num + spi_trig_num->spi0_txoff_num;\n    rx_onoff_total_num =\n        spi_trig_num->spi0_rxon_num + spi_trig_num->spi0_rxoff_num;\n  } else {\n    tx_onoff_total_num =\n        spi_trig_num->spi1_txon_num + spi_trig_num->spi1_txoff_num;\n    rx_onoff_total_num =\n        spi_trig_num->spi1_rxon_num + spi_trig_num->spi1_rxoff_num;\n  }\n  ASSERT((tx_onoff_total_num <= 6), \"spi trig tx_onoff_total_num>6\");\n  ASSERT((rx_onoff_total_num <= 6), \"spi trig rx_onoff_total_num>6\");\n\n  BTDIGITAL_REG(REG_SPI_TRIG_NUM_ADDR) = *(uint32_t *)spi_trig_num;\n}\n\nvoid btdrv_spi_trig_pos_set(uint8_t spi_sel,\n                            struct SPI_TRIG_POS_T *spi_trig_pos) {\n  if (!spi_sel) {\n    BTDIGITAL_REG(REG_SPI0_TRIG_POS_ADDR) = *(uint32_t *)spi_trig_pos;\n  } else {\n    BTDIGITAL_REG(REG_SPI1_TRIG_POS_ADDR) = *(uint32_t *)spi_trig_pos;\n  }\n}\n\n#ifdef __FA_RX_GAIN_CTRL__\nvoid btdrv_spi_trig_init(void) {\n  struct SPI_TRIG_NUM_T spi_trig_num;\n  struct SPI_TRIG_POS_T spi0_trig_pos;\n  struct SPI_TRIG_POS_T spi1_trig_pos;\n\n  spi_trig_num.spi0_txon_num = 0;\n  spi_trig_num.spi0_txoff_num = 0;\n  spi_trig_num.spi0_rxon_num = 1;\n  spi_trig_num.spi0_rxoff_num = 0;\n  spi_trig_num.spi0_fast_mode = 0;\n  spi_trig_num.spi0_gap = 4;\n  spi_trig_num.hwspi0_en = 1;\n\n  spi_trig_num.spi1_txon_num = 0;\n  spi_trig_num.spi1_txoff_num = 1;\n  spi_trig_num.spi1_rxon_num = 1;\n  spi_trig_num.spi1_rxoff_num = 0;\n  spi_trig_num.spi1_fast_mode = 0;\n  spi_trig_num.spi1_gap = 4;\n  spi_trig_num.hwspi1_en = 1;\n\n  btdrv_spi_trig_num_set(0, &spi_trig_num);\n  btdrv_spi_trig_num_set(1, &spi_trig_num);\n\n  spi0_trig_pos.spi_txon_pos = 0;\n  spi0_trig_pos.spi_txoff_pos = 0;\n  spi0_trig_pos.spi_rxon_pos = 25;\n  spi0_trig_pos.spi_rxoff_pos = 0;\n\n  spi1_trig_pos.spi_txon_pos = 0;\n  spi1_trig_pos.spi_txoff_pos = 0;\n  spi1_trig_pos.spi_rxon_pos = 110;\n  spi1_trig_pos.spi_rxoff_pos = 0;\n\n  btdrv_spi_trig_pos_set(0, &spi0_trig_pos);\n  btdrv_spi_trig_pos_set(1, &spi1_trig_pos);\n\n  btdrv_spi_trig_data_set(0);\n  btdrv_spi_trig_data_set(1);\n}\n#else\nvoid btdrv_spi_trig_init(void) {\n  struct SPI_TRIG_NUM_T spi_trig_num;\n  struct SPI_TRIG_POS_T spi0_trig_pos;\n  struct SPI_TRIG_POS_T spi1_trig_pos;\n\n  spi_trig_num.spi0_txon_num = 0;\n  spi_trig_num.spi0_txoff_num = 1;\n  spi_trig_num.spi0_rxon_num = 0;\n  spi_trig_num.spi0_rxoff_num = 0;\n  spi_trig_num.spi0_fast_mode = 0;\n  spi_trig_num.spi0_gap = 4;\n  spi_trig_num.hwspi0_en = 0;\n\n  spi_trig_num.spi1_txon_num = 0;\n  spi_trig_num.spi1_txoff_num = 0;\n  spi_trig_num.spi1_rxon_num = 0;\n  spi_trig_num.spi1_rxoff_num = 0;\n  spi_trig_num.spi1_fast_mode = 0;\n  spi_trig_num.spi1_gap = 0;\n  spi_trig_num.hwspi1_en = 0;\n\n  btdrv_spi_trig_num_set(0, &spi_trig_num);\n  btdrv_spi_trig_num_set(1, &spi_trig_num);\n\n  spi0_trig_pos.spi_txon_pos = 0;\n  spi0_trig_pos.spi_txoff_pos = 20;\n  spi0_trig_pos.spi_rxon_pos = 0;\n  spi0_trig_pos.spi_rxoff_pos = 0;\n\n  spi1_trig_pos.spi_txon_pos = 0;\n  spi1_trig_pos.spi_txoff_pos = 0;\n  spi1_trig_pos.spi_rxon_pos = 0;\n  spi1_trig_pos.spi_rxoff_pos = 0;\n\n  btdrv_spi_trig_pos_set(0, &spi0_trig_pos);\n  btdrv_spi_trig_pos_set(1, &spi1_trig_pos);\n\n  btdrv_spi_trig_data_set(0);\n  btdrv_spi_trig_data_set(1);\n}\n#endif\n\nvoid btdrv_spi_trig_select(uint8_t link_id, bool spi_set) {\n  BTDIGITAL_BT_EM(EM_BT_BT_EXT1_ADDR + link_id * BT_EM_SIZE) |= (spi_set << 14);\n}\n\nuint8_t btdrv_get_spi_trig_enable(uint8_t spi_sel) {\n  if (!spi_sel) {\n    return ((BTDIGITAL_REG(REG_SPI_TRIG_NUM_ADDR) & 0x8000) >> 15);\n  } else {\n    return ((BTDIGITAL_REG(REG_SPI_TRIG_NUM_ADDR) & 0x80000000) >> 31);\n  }\n}\n\nvoid btdrv_set_spi_trig_enable(uint8_t spi_sel) {\n  if (!spi_sel) {\n    BTDIGITAL_REG(REG_SPI_TRIG_NUM_ADDR) |= (1 << 15); // spi0\n  } else {\n    BTDIGITAL_REG(REG_SPI_TRIG_NUM_ADDR) |= (1 << 31); // spi1\n  }\n}\n\nvoid btdrv_clear_spi_trig_enable(uint8_t spi_sel) {\n  if (!spi_sel) {\n    BTDIGITAL_REG(REG_SPI_TRIG_NUM_ADDR) &= ~0x8000;\n  } else {\n    BTDIGITAL_REG(REG_SPI_TRIG_NUM_ADDR) &= ~0x80000000;\n  }\n}\n\nbool btdrv_get_lmp_trace_enable(void) { return g_lmp_trace_enable; }\nvoid btdrv_set_lmp_trace_enable(void) { g_lmp_trace_enable = true; }\nvoid btdrv_set_controller_trace_enable(uint8_t trace_level) {\n  g_controller_trace_level = trace_level;\n}\n\nuint8_t btdrv_get_controller_trace_level(void) {\n  return g_controller_trace_level;\n}\n\nvoid btdrv_fast_lock_config(bool fastlock_on) {\n  uint16_t val = 0;\n\n  if (fastlock_on) {\n    btdrv_read_rf_reg(0x1AE, &val);\n    btdrv_write_rf_reg(0x1AE, val | (1 << 9) | (1 << 11));\n    BTDIGITAL_REG(0xd0220468) |= 1 << 26; // fast lock enable\n  } else {\n    btdrv_read_rf_reg(0x1AE, &val);\n    btdrv_write_rf_reg(0x1AE, val & (~((1 << 9) | (1 << 11))));\n    BTDIGITAL_REG(0xd0220468) &= (~(1 << 26)); // fast lock disable\n  }\n}\n\n#ifdef __FASTACK_ECC_ENABLE__\nvoid btdrv_ecc_config(void) {\n#define INVALID 0xff\n#define ECC_8PSK 0\n#define ECC_DPSK 1\n#define ECC_GFSK 2\n\n#define ECC_1BLOCK 0\n#define ECC_2BLOCK 1\n#define ECC_3BLOCK 2\n\n  const uint32_t fa_2m = 0;\n  const uint32_t fastlock_on = 0;\n  const uint32_t bt_sys_52m_en = 0;\n  const uint32_t ecc_mode_enable = 0;\n  const uint32_t ecc_psk_mode = ECC_DPSK;\n  const uint32_t ecc_blk_mode = ECC_3BLOCK;\n\n  if (bt_sys_52m_en) {\n    BTDIGITAL_REG(0x4008003c) |= 1;\n    BTDIGITAL_REG(0x40080018) |= 1;\n    BTDIGITAL_REG(0x40080004) |= (1 << 15) | (1 << 30); // osc x4 enable\n    BTDIGITAL_REG(0xd0330038) |= (3 << 6) | (1 << 11);\n    BTDIGITAL_REG(0xd03300f0) |= 1;\n  }\n\n  if (fa_2m) {\n    BTDIGITAL_REG(0xd0220464) |= 1 << 29; // fast ack 2M mode enable 1, disable\n                                          // 0\n  } else {\n    BTDIGITAL_REG(0xd0220464) &=\n        (~(1 << 29)); // fast ack 2M mode enable 1, disable 0\n  }\n\n  // 1302:  RF 0x1AE[9] = 1;\n  // 1402:  RF 0x64[15] = 1;\n\n  BTDIGITAL_REG(0xd0330038) |= (1 << 9); // jiangpeng test result ok\n  btdrv_fast_lock_config(fastlock_on);\n  if (fastlock_on) {\n    if (fa_2m)\n      BTDIGITAL_REG_SET_FIELD(0xd0220468, 0xffff, 0, 0x1914);\n    else\n      BTDIGITAL_REG_SET_FIELD(0xd0220468, 0xffff, 0, 0x1e14);\n  } else {\n    if (fa_2m)\n      BTDIGITAL_REG_SET_FIELD(0xd0220468, 0xffff, 0, 0x3530);\n    else\n      BTDIGITAL_REG_SET_FIELD(0xd0220468, 0xffff, 0, 0x3528);\n  }\n\n  if (ecc_mode_enable) {\n    BTDIGITAL_REG(0xd0220464) |= (0x1 << 15);   ////enable ecc mode\n    BTDIGITAL_REG(0xd0220464) &= ~(0x1F << 24); // ecc time adj\n    BTDIGITAL_REG(0xd0220464) |= (0x1 << 25);   ////en ecc time adj\n\n    if (ecc_psk_mode == ECC_8PSK) {\n      BTDIGITAL_REG_SET_FIELD(0xd02204a8, 3, 13, 3); // ECC 8PSK\n    } else if (ecc_psk_mode == ECC_DPSK) {\n      BTDIGITAL_REG_SET_FIELD(0xd02204a8, 3, 13, 2); // ECC DPSK\n    } else if (ecc_psk_mode == ECC_GFSK) {\n      BTDIGITAL_REG_SET_FIELD(0xd02204a8, 3, 13, 1); // ECC GFSK\n    }\n\n    if (ecc_blk_mode == ECC_1BLOCK) {\n      BTDIGITAL_REG(0xd022048c) &= ~0x3ff;\n      BTDIGITAL_REG(0xd022048c) |= 0xef; // set ecc len  ECC 1 block\n    } else if (ecc_blk_mode == ECC_2BLOCK) {\n      BTDIGITAL_REG(0xd022048c) &= ~0x3ff;\n      BTDIGITAL_REG(0xd022048c) |= 0x1de; // set ecc len,  ECC 2 block\n    } else if (ecc_blk_mode == ECC_3BLOCK) {\n      BTDIGITAL_REG(0xd022048c) &= ~0x3ff;\n      BTDIGITAL_REG(0xd022048c) |= 0x2cd; // set ecc len ECC 3 block\n    }\n  } else {\n    BTDIGITAL_REG(0xd0220464) &= (~(0x1 << 15)); ////disable ecc mode\n  }\n}\n#endif\n\nvoid btdrv_hw_agc_stop_mode(enum BT_SYNCMODE_REQ_USER_T user,\n                            bool hw_agc_mode) {\n#ifdef __HW_AGC__\n  static uint8_t bt_syncmode_map = 0;\n\n  uint32_t lock;\n\n  lock = int_lock();\n  uint32_t reg_val = BTDIGITAL_REG(0xd03503a8);\n\n  if (hw_agc_mode) {\n    if (bt_syncmode_map == 0) {\n      // set bit28 0 : rx win timeout, stop agc\n      reg_val &= ~(1 << 28);\n      BTDIGITAL_REG(0xd03503a8) = reg_val;\n    }\n    bt_syncmode_map |= (1 << user);\n  } else {\n    bt_syncmode_map &= ~(1 << user);\n    if (bt_syncmode_map == 0) {\n      // set bit28 1 : sync find, stop agc\n      reg_val |= (1 << 28);\n      BTDIGITAL_REG(0xd03503a8) = reg_val;\n    }\n  }\n  int_unlock(lock);\n\n#endif\n}\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/bt_drv_patch.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"bt_drv.h\"\n#include \"bt_drv_2300p_internal.h\"\n#include \"bt_drv_interface.h\"\n#include \"hal_chipid.h\"\n#include \"hal_i2c.h\"\n#include \"hal_uart.h\"\n#include \"plat_types.h\"\n\nextern void btdrv_write_memory(uint8_t wr_type, uint32_t address,\n                               const uint8_t *value, uint8_t length);\n\n/// enable m4 patch func\n#define BTDRV_PATCH_EN_REG 0xe0002000\n\n// set m4 patch remap adress\n#define BTDRV_PATCH_REMAP_REG 0xe0002004\n\n// instruction patch compare src address\n#define BTDRV_PATCH_INS_COMP_ADDR_START 0xe0002008\n\n#define BTDRV_PATCH_INS_REMAP_ADDR_START 0xc0000100\n\n// data patch compare src address\n#define BTDRV_PATCH_DATA_COMP_ADDR_START 0xe00020e8\n\n#define BTDRV_PATCH_DATA_REMAP_ADDR_START 0xc00001e0\n\n#define BTDRV_PATCH_ACT 0x1\n#define BTDRV_PATCH_INACT 0x0\n\ntypedef struct {\n  uint8_t patch_index;   // patch position\n  uint8_t patch_state;   // is patch active\n  uint16_t patch_length; // patch length 0:one instrution replace  other:jump to\n                         // ram to run more instruction\n  uint32_t patch_remap_address; // patch occured address\n  uint32_t patch_remap_value;   // patch replaced instuction\n  uint32_t patch_start_address; // ram patch address for lenth>0\n  uint8_t *patch_data;          // ram patch date for length >0\n\n} BTDRV_PATCH_STRUCT;\n\n#ifdef IBRT\n/***************************************************************************\n *\n * instruction patch Information\n *\n * BT ROM Chip Version:1302 T3 (CHIP ID=2)\n *\n *  IBRT function\n *\n * patch  2: 0xC00069a8--->0xC00069b0\n * patch  4: 0xC00069b8--->0xC00069d0\n * patch  5: 0xC00069d4--->0xC00069f0\n * patch  6: 0xC00069f8--->0xC0006a08\n * patch  7: 0xC0006a10--->0xC0006a24\n * patch  9: 0xC0006a2c--->0xC0006a4c\n * patch 10: 0xC0006a54--->0xC0006a64\n * patch 11: 0xC0006a68--->0xC0006a90\n * patch 13: 0xC0006a98--->0xC0006b2c\n * patch 15: 0xC0006b3c--->0xC0006b88\n * patch 16: 0xC0006b90--->0xC0006ba0\n * patch 17: 0xC0006ba4--->0xC0006bc0\n * patch 14: 0xC0006bc8--->0xC0006bdc\n * patch  0:  0xC0006be4--->0xC0006c04\n * patch  1:  0xC0006c0c--->0xC0006c24\n * patch  2:  0xC0006c34--->0xC0006c80\n * patch  3:  0xC0006c88--->0xC0006c94\n * lmp_ext_sniffer_fast_cfm_tab: 0xC0006c9c --->0xC0006ca4\n\n * patch 18: 0xC0006cbc--->0xC0006d10 DEBUG_PATCH\n * patch 19: 0xC0006d14--->0xC0006dbc\n * patch 20: 0xC0006dc4--->0xC0006df4\n * patch 21: 0xC0006e00--->0xC0006e2c\n * patch 22: 0xC0006e34--->0xC0006e38\n * lmp_ext_sniffer_filter_tab: 0xC0006e40 --->0xC0006e54\n * patch 2a: 0xC0006e5c--->0xC0006e70\n * patch 24: 0xC0006e78--->0xC0006e88\n * patch 25: 0xC0006e94--->0xC0006ea4\n * patch 29: 0xC0006eb0--->0xC0006ec4\n * patch 30: 0xC0006ecc--->0xC0006ef0\n * patch 31: 0xC0006ef8--->0xC0006f08\n * patch 32: 0xC0006f0c--->0xC0006f18\n * patch 33: 0xc0006f20--->0xc0006f50\n * patch 34: 0xc0006f58--->0xc0006f64\n * patch 35: 0xc0006f70--->0xc0006f90\n * patch 49: 0xc0006f98--->0xc0006fac\n * patch 36: 0xc0006fc0--->0xc0007034\n * patch 37: 0xc0007050--->0xc0007328\n * patch 37: 0xc000732c--->0xc0007348\n * patch 44: 0xc0007460--->0xc0007500\n\n patch_ld_ibrt_sco_req_filter: c0007670--->c0007670\n ****************************************************************************/\n//#define BT_CONTROLLER_DEBUG  1\n\nconst uint32_t bes2300p_patch0_ibrt_ins_data_t3[] = {\n    0x400fe92d, /*0xc0007758L*/\n    0xf0004630, /*0xc000775cL*/\n    0xe8bdf805, /*0xc0007760L*/\n    0xf634400f, /*0xc0007764L*/\n    0x0000bb51, /*0xc0007768L*/\n    0x4604b510, /*0xc000776cL*/\n    0x47984b0c, /*0xc0007770L*/\n    0x60184b0c, /*0xc0007774L*/\n    0x781b3304, /*0xc0007778L*/\n    0x2b03b2db, /*0xc000777cL*/\n    0x2c02d005, /*0xc0007780L*/\n    0x2c10d009, /*0xc0007784L*/\n    0x2004d10a, /*0xc0007788L*/\n    0x4b07e006, /*0xc000778cL*/\n    0xb2db781b, /*0xc0007790L*/\n    0x70134a06, /*0xc0007794L*/\n    0x2002e7f3, /*0xc0007798L*/\n    0x47984b05, /*0xc000779cL*/\n    0xbf00bd10, /*0xc00077a0L*/\n    0xa0026ded, /*0xc00077a4L*/\n    0xc000653c, /*0xc00077a8L*/\n    0xc00064da, /*0xc00077acL*/\n    0xc0006541, /*0xc00077b0L*/\n    0xa003bcc1, /*0xc00077b4L*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch0 = {\n    0,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch0_ibrt_ins_data_t3),\n    0x0003bdc0,\n    0xbccaf1cb,\n    0xc0007758,\n    (uint8_t *)\n        bes2300p_patch0_ibrt_ins_data_t3}; // ibrt sco auto accept (slave)\n\nconst uint32_t bes2300p_patch1_ibrt_ins_data_t3[] = {\n    0x681b4b08, 0xf632b933, 0x2800ffdb, 0x2001bf0c, 0xe0002004,\n    0xf6352001, 0x2000f84d, 0x60184b01, 0xb809f60a, 0xc0007434, /*6c30*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch1 = {\n    1,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch1_ibrt_ins_data_t3),\n    0x00010c3c,\n    0xbfe6f1f5,\n    0xc0006c0c,\n    (uint8_t *)\n        bes2300p_patch1_ibrt_ins_data_t3}; // ibrt sco auto accept (master)\n\nconst uint32_t bes2300p_patch2_ibrt_ins_data_t3[] = {\n    0x4b04b508, 0x2b01681b, 0x2001d102, 0xfb00f5fa, 0xbf00bd08,\n    0xc0007668, 0xfd56f60d, 0xfff0f7ff, 0xbe7af60f, /*6c58*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch2 = {\n    2,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch2_ibrt_ins_data_t3),\n    0x0001694c,\n    0xb980f1f0,\n    0xc0006c38,\n    (uint8_t *)bes2300p_patch2_ibrt_ins_data_t3}; // tws unsniff update ke state\n\nconst uint32_t bes2300p_patch3_ibrt_ins_data_t3[] = {\n    0xbf004628, 0xfdc4f60d, 0x21144628, 0xba4af60f, /*6c94*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch3 = {\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch3_ibrt_ins_data_t3),\n    0x00016128,\n    0xbdaef1f0,\n    0xc0006c88,\n    (uint8_t *)bes2300p_patch3_ibrt_ins_data_t3}; // start lmp to before sending\n                                                  // LMP_HostConnectionReq\n\nconst uint32_t bes2300p_patch4_ibrt_ins_data_t3[] = {\n    0xf633b940, /*69b8*/\n    0x2801f86d, 0xf633d104, 0x2800f903,\n    0xbf00d102, 0xbd84f62b, 0xbe02f62b, /*69d0*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch4 = {\n    4,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch4_ibrt_ins_data_t3),\n    0x000324d4,\n    0xba70f1d4,\n    0xc00069b8,\n    (uint8_t *)bes2300p_patch4_ibrt_ins_data_t3}; // filter afh map\n\nconst uint32_t bes2300p_patch5_ibrt_ins_data_t3[] = {\n    0x79ab4688, /*69d4*/\n    0x6383ea6f, 0x4578f023, 0xf8d39b09, 0x9906308c,\n    0x402b440b, 0xbf004641, 0xb8bdf62d, /*69f0*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch5 = {\n    5,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch5_ibrt_ins_data_t3),\n    0x00033b60,\n    0xbf38f1d2,\n    0xc00069d4,\n    (uint8_t *)bes2300p_patch5_ibrt_ins_data_t3}; // sco param init\n\nconst uint32_t bes2300p_patch6_ibrt_ins_data_t3[] = {\n    0x4a033304,                                     /*69f8*/\n    0xbf008153, 0x12c4f640, 0xbeb9f632, 0xc00062c0, /*6a08*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch6 = {\n    6,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch6_ibrt_ins_data_t3),\n    0x00039770,\n    0xb942f1cd,\n    0xc00069f8,\n    (uint8_t *)bes2300p_patch6_ibrt_ins_data_t3}; // pscan duration\n\nconst uint32_t bes2300p_patch7_ibrt_ins_data_t3[] = {\n    0x71ab2300,                                                 /*6a10*/\n    0x0000f8d9, 0x380cb110, 0xf8f6f5fa, 0xbf002300, 0xbf3ef608, /*6a24*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch7 = {\n    7,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch7_ibrt_ins_data_t3),\n    0x0000f8a0,\n    0xb8b6f1f7,\n    0xc0006a10,\n    (uint8_t *)\n        bes2300p_patch7_ibrt_ins_data_t3}; // lm_page_scan_end_ind free msg\n\nconst uint32_t bes2300p_patch8_ibrt_ins_data_t3[] = {\n    0xf8862001,\n    0xf8860060,\n    0xbf000061,\n    0xbba3f611,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch8 = {\n    8,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch8_ibrt_ins_data_t3),\n    0x00018f1c,\n    0xbc62f1ee,\n    0xc00077e4,\n    (uint8_t *)bes2300p_patch8_ibrt_ins_data_t3}; // ignore 0x5d sm\n\nconst uint32_t bes2300p_patch9_ibrt_ins_data_t3[] = {\n    0xf62a4628, /*6a2c*/\n    0x4620fef7, 0xff76f60f, 0xf8534b04, 0x46203025,\n    0x135ef893, 0xfc68f5fa, 0xbd702000, 0xc0005de4, /*6a4c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch9 = {\n    9,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch9_ibrt_ins_data_t3),\n    0x0002347c,\n    0xbad6f1e3,\n    0xc0006a2c,\n    (uint8_t *)bes2300p_patch9_ibrt_ins_data_t3};\n\nconst uint32_t bes2300p_patch10_ibrt_ins_data_t3[] = {\n    0x0818f104,\n    0xbb9ff634,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch10 = {\n    10,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch10_ibrt_ins_data_t3),\n    0x0003b184,\n    0xbc66f1cb,\n    0xc0006a54,\n    (uint8_t *)bes2300p_patch10_ibrt_ins_data_t3}; // set afh\n\nconst uint32_t bes2300p_patch11_ibrt_ins_data_t3[] = {\n    0xf8934b09, /*6a68*/\n    0xf0133084, 0xd0050f06, 0xf6374620, 0x4601f805, 0xe0052400,\n    0xf8934b03, 0xbf003084, 0xb941f636, 0xb987f636, 0xc0006568, /*6a90*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch11 = {\n    11,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch11_ibrt_ins_data_t3),\n    0x0003cd08,\n    0xbeaef1c9,\n    0xc0006a68,\n    (uint8_t *)bes2300p_patch11_ibrt_ins_data_t3}; // set ble adv data\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch12 = {\n    12,  BTDRV_PATCH_ACT, 0, 0x0003cbf0, 0xbf00e004, 0,\n    NULL}; // set ble scan response data\n\nconst uint32_t bes2300p_patch13_ibrt_ins_data_t3[] = {\n    /*6a98*/ 0x99049803,\n    /*6a9c*/ 0x4b12b470,\n    /*6aa0*/ 0x010e5c5a,\n    /*6aa4*/ 0x19734d11,\n    /*6aa8*/ 0x78244c11,\n    /*6aac*/ 0xd20342a2,\n    /*6ab0*/ 0x32015498,\n    /*6ab4*/ 0xe001b2d2,\n    /*6ab8*/ 0x22015570,\n    /*6abc*/ 0x5442480a,\n    /*6ac0*/ 0x461ab14c,\n    /*6ac4*/ 0x23001919,\n    /*6ac8*/ 0x0b01f912,\n    /*6acc*/ 0xbf004403,\n    /*6ad0*/ 0xd1f9428a,\n    /*6ad4*/ 0x2300e000,\n    /*6ad8*/ 0xf0f4fb93,\n    /*6adc*/ 0xbc70b240,\n    /*6ae0*/ 0x22019904,\n    /*6ae4*/ 0xba00f626, // jump a0206ae4 -> a002cee8\n    /*6ae8*/ 0xc0006af8, // addr of rssi_idx_for_agc\n    /*6aec*/ 0xc0006afc, // addr of rssi_set_for_agc\n    /*6af0*/ 0xc0006af4, // addr of N\n    /*6af4*/ 0x00000005, // N : 1 ~ 16\n    /*6af8*/ 0x00000000, // rssi_idx_for_agc[3]\n    /*6afc*/ 0xbabababa, // rssi_set_for_agc[3*16]\n    /*6b00*/ 0xbabababa,\n    /*6b04*/ 0xbabababa,\n    /*6b08*/ 0xbabababa,\n    /*6b0c*/ 0xbabababa,\n    /*6b10*/ 0xbabababa,\n    /*6b14*/ 0xbabababa,\n    /*6b18*/ 0xbabababa,\n    /*6b1c*/ 0xbabababa,\n    /*6b20*/ 0xbabababa,\n    /*6b24*/ 0xbabababa,\n    /*6b28*/ 0xbabababa,\n    /*6b2c*/ 0xbabababa,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch13 = {\n    13,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch13_ibrt_ins_data_t3),\n    0x0002cee4,\n    0xbdd8f1d9, // jump a002cee4 -> a0206a98\n    0xc0006a98,\n    (uint8_t *)bes2300p_patch13_ibrt_ins_data_t3}; // ld_acl_rx() average rssi\n\nconst uint32_t bes2300p_patch14_ibrt_ins_data_t3[] = {\n    0x305af893, 0xd1032b00, 0x12f4f240,\n    0xbf00e002, 0x32b8f640, 0xbe30f60d, /*6bdc*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch14 = {\n    14,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch14_ibrt_ins_data_t3),\n    0x0001483c,\n    0xb9c4f1f2,\n    0xc0006bc8,\n    (uint8_t *)bes2300p_patch14_ibrt_ins_data_t3}; // lmp to 5s before\n                                                   // connection cmp sent\n\nconst uint32_t bes2300p_patch15_ibrt_ins_data_t3[] = {\n    0x2028f843, /*6b3c*/\n    0xf8434b08, 0x4b052028, 0x4b0e701a, 0x2201701a, 0xf8434b08,\n    0xbf002028, 0xba32f624, 0xc0006b60, 0x00000000, 0xc0006b68,\n    0x00000000, 0x00000000, 0x00000000, 0xc0006b78, 0x00000001,\n    0x00000001, 0x00000001, 0xc0006b88, 0x00000000, /*6b88*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch15 = {\n    15,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch15_ibrt_ins_data_t3),\n    0x0002afbc,\n    0xbdbef1db,\n    0xc0006b3c,\n    (uint8_t *)bes2300p_patch15_ibrt_ins_data_t3}; // sync clear count\n\nconst uint32_t bes2300p_patch16_ibrt_ins_data_t3[] = {\n    0x0046f894,                                     /*6b90*/\n    0xfe94f625, 0xd8012802, 0xba3ef629, 0xba57f629, /*6ba0*/\n};\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch16 = {\n    16,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch16_ibrt_ins_data_t3),\n    0x00030014,\n    0xbdbcf1d6,\n    0xc0006b90,\n    (uint8_t *)bes2300p_patch16_ibrt_ins_data_t3}; // ld_sco_evt_start_cbk\n\nconst uint32_t bes2300p_patch17_ibrt_ins_data_t3[] = {\n    0xf6062002, /*6ba4*/\n    0x2802f937, 0xf898d108, 0xf62500b2, 0x2802fe85,\n    0xbf00d802, 0xbc93f629, 0xbc98f629, /*6bc0*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch17 = {\n    17,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch17_ibrt_ins_data_t3),\n    0x000304d4,\n    0xbb66f1d6,\n    0xc0006ba4,\n    (uint8_t *)\n        bes2300p_patch17_ibrt_ins_data_t3}; // ld_calculate_event_timestamp\n\n#ifdef BT_CONTROLLER_DEBUG\nconst uint32_t bes2300p_patch18_ibrt_ins_data_t3[] = {\n    0x68124a0e, 0x2084f8c3, 0x68124a0d, 0x2088f8c3, 0x68124a0c, 0x208cf8c3,\n    0x68124a0b, 0x2090f8c3, 0x68124a0a, 0x2094f8c3, 0x68124a09, 0x2098f8c3,\n    0x68124a08, 0x209cf8c3, 0xbf004770, 0xe000ed04, 0xe000ed0c, 0xe000ed10,\n    0xe000ed14, 0xe000ed24, 0xe000ed3c, 0xe000ed34, /*6d10*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch18 = {\n    18,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch18_ibrt_ins_data_t3),\n    0x000077fc,\n    0xba5ef1ff,\n    0xc0006cbc,\n    (uint8_t *)bes2300p_patch18_ibrt_ins_data_t3}; // correct crash dump\n#else\nconst uint32_t bes2300p_patch18_ibrt_ins_data_t3[] = {\n    0x2271f240, /*6cc0*/\n    0x4080f8b0, /*6cc4*/\n    0xb9f9f63f,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch18 = {\n    18,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch18_ibrt_ins_data_t3),\n    0x000460ac,\n    0xbe08f1c0,\n    0xc0006cc0,\n    (uint8_t *)bes2300p_patch18_ibrt_ins_data_t3\n\n}; // BT avoid ble\n#endif\n\nconst uint32_t bes2300p_patch19_ibrt_ins_data_t3[] = {\n    0x4603b508, 0x8210f3ef, 0x0f01f012, 0xb672d112, 0xf5a34811, 0x3b285343,\n    0xfba14910, 0xf3c32303, 0xeb032387, 0xeb000343, 0x31940183, 0xfdd0f5fc,\n    0xbd08b662, 0xf5a34808, 0x3b285343, 0xfba14907, 0xf3c32303, 0xeb032387,\n    0xeb000343, 0x31940183, 0xfdbef5fc, 0xbf00bd08, 0xc0005b4c, 0xff00ff01,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch19 = {\n    19,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch19_ibrt_ins_data_t3),\n    0x00008b24,\n    0xb8f8f1fe,\n    0xc0006d18,\n    (uint8_t *)bes2300p_patch19_ibrt_ins_data_t3}; // add lock interrupt when\n                                                   // free acl buf\n\nconst uint32_t bes2300p_patch20_ibrt_ins_data_t3[] = {\n    0x460cb510, 0xfafaf5fa, 0xd9042870, 0x007ef1b4, 0x2001bf18,\n    0x2000bd10, 0xbf00bd10, 0xf7ff4621, 0x2800ffef, 0x4628d104,\n    0xfae8f5fa, 0xbd9af61c, 0xb85ff61d, /*6df4*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch20 = {\n    20,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch20_ibrt_ins_data_t3),\n    0x00023924,\n    0xba5cf1e3,\n    0xc0006dc4,\n    (uint8_t *)bes2300p_patch20_ibrt_ins_data_t3}; // protect ext3 lmp tx cfm\n\nconst uint32_t bes2300p_patch21_ibrt_ins_data_t3[] = {\n    0x2040f897, /*6e00*/\n    0xd1112a01, 0x0109f106, 0xf5fc4608, 0x2813fd4b, 0x221ed802, 0xbc54f614,\n    0x2a017a32, 0xf614d801, 0x221ebbf6, 0xbc4cf614, 0xbc47f614, /*6e2c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch21 = {\n    21,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch21_ibrt_ins_data_t3),\n    0x0001b604,\n    0xbbfcf1eb,\n    0xc0006e00,\n    (uint8_t *)\n        bes2300p_patch21_ibrt_ins_data_t3}; // reject set afh lmp when\n                                            // channel number less than 20\n\nconst uint32_t bes2300p_patch22_ibrt_ins_data_t3[] = {\n    0x2202729a, /*6e34*/\n    0xbd38719a, /*6e38*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch22 = {\n    22,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch22_ibrt_ins_data_t3),\n    0x00011c90,\n    0xb8d0f1f5,\n    0xc0006e34,\n    (uint8_t *)bes2300p_patch22_ibrt_ins_data_t3}; // update sco sync type\n\nconst uint32_t bes2300p_patch2a_ibrt_ins_data_t3[] = {\n    /*6e5c*/ 0xb10b4b04,\n    /*6e60*/ 0xbb84f615, // jump a001c56c\n    /*6e64*/ 0x783b2300,\n    /*6e68*/ 0x0301f003,\n    /*6e6c*/ 0xbb5ef615, // jump a001c52c\n    /*6e70*/ 0x00000000, // reject sniff\n};                       // LMP_MSG_HANDLER(sniff_req) LC_CONNECTED\n\nconst uint32_t bes2300p_patch23_ibrt_ins_data_t3[] = {\n    0xf9c6f632,                         /*7744*/\n    0x02194603, 0x417ff401, 0xbeeff632, /*7750*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch23 = {\n    23,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch23_ibrt_ins_data_t3),\n    0x0003a52c,\n    0xb90af1cd,\n    0xc0007744,\n    (uint8_t *)bes2300p_patch23_ibrt_ins_data_t3}; // fix sco success index\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch24 = {\n    24, BTDRV_PATCH_ACT, 0, 0x00002490, 0xbf00e012, 0, NULL,\n}; // stop ibrt directly\n\nconst uint32_t bes2300p_patch25_ibrt_ins_data_t3[] = {\n    0x2a020a02, 0xbf00d804, 0x427ff400, 0xbf44f61c, 0xb807f61d,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch25 = {\n    25,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch25_ibrt_ins_data_t3),\n    0x00023d28,\n    0xb8b4f1e3,\n    0xc0006e94,\n    (uint8_t *)bes2300p_patch25_ibrt_ins_data_t3}; // enc update2 idx error\n\n#if 1\nconst uint32_t bes2300p_patch26_ibrt_ins_data_t3[] = {\n    0x68134a05, 0x2380f043, 0xf5a26013, 0x68137206,\n    0x0301f043, 0xbd386013, 0xd0220400,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch26 = {\n    26,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch26_ibrt_ins_data_t3),\n    0x00048200,\n    0xba8ef1bf,\n    0xc0007720,\n    (uint8_t *)bes2300p_patch26_ibrt_ins_data_t3}; // enable hw spiin BLE\n                                                   // lld_evt_rx_isr\n\n#elif 0\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch26 = {\n    26, BTDRV_PATCH_ACT, 0, 0x00013f44, 0xbf00bd38, 0, NULL}; // assert\n#else\nconst uint32_t bes2300p_patch26_ibrt_ins_data_t3[] = {\n    0xf6324607, 0xb120fa87, 0x63a6f640, 0xf63e827b,\n    0x4638bd94, 0x2080f8d0, 0xbd86f63e,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch26 = {\n    26,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch26_ibrt_ins_data_t3),\n    0x000461dc,\n    0xba6cf1c1,\n    0xc00076b8,\n    (uint8_t *)bes2300p_patch26_ibrt_ins_data_t3}; // ble con slave duration in\n                                                   // snoop mode\n#endif\n\n#if defined(SYNC_BT_CTLR_PROFILE)\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch27 = {\n    27,  BTDRV_PATCH_ACT, 0, 0x000187b8, 0x4628b123, 0,\n    NULL}; // send profile via ble\n#else\nconst uint32_t bes2300p_patch27_ibrt_ins_data_t3[] = {\n    0xfe88f632, 0xffe8f7ff, 0xb9a2f625, /*6c68*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch27 = {\n    27,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch27_ibrt_ins_data_t3),\n    0x0002bfac,\n    0xbe58f1da,\n    0xc0006c60,\n    (uint8_t *)bes2300p_patch27_ibrt_ins_data_t3}; // disconnect update ke state\n#endif\n\n#if 1\n// for ble master update con param with large winsize\nconst uint32_t bes2300p_patch28_ibrt_ins_data_t3[] = {\n    0x4630bf00, 0x109ef894, 0xf958f63f, 0x309cf894,\n    0x2271f240, 0x0003fb02, 0xbcf1f63f,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch28 = {\n    28,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch28_ibrt_ins_data_t3),\n    0x000471e4,\n    0xbb08f1c0,\n    0xc00077f8,\n    (uint8_t *)bes2300p_patch28_ibrt_ins_data_t3};\n#else\n// only for search UI\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch28 = {\n    28,  BTDRV_PATCH_ACT, 0, 0x0000e47a, 0xe0027b20, 0,\n    NULL}; // lm_inq_res_ind_handler()  rssi\n#endif\n\nconst uint32_t bes2300p_patch29_ibrt_ins_data_t3[] = {\n    0xf8934b04, 0x2b0231c2, 0x230fbf0c,\n    0x75ab2314, 0xbac2f629, 0xc0005ea8, /*6ec4*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch29 = {\n    29,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch29_ibrt_ins_data_t3),\n    0x00030444,\n    0xbd34f1d6,\n    0xc0006eb0,\n    (uint8_t *)bes2300p_patch29_ibrt_ins_data_t3}; /// fix acl interv priority\n\nconst uint32_t bes2300p_patch30_ibrt_ins_data_t3[] = {\n    0xd80a2802, 0x4b05b508, 0x3020f853, 0xf893b123, 0x220510c4,\n    0xfe86f61d, 0x4770bd08, 0xc00009d4, 0xffeef7ff, 0xbda8f634, /*6ef0*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch30 = {\n    30,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch30_ibrt_ins_data_t3),\n    0x0003ba40,\n    0xba54f1cb,\n    0xc0006ecc,\n    (uint8_t *)bes2300p_patch30_ibrt_ins_data_t3}; /// send max slot req when\n                                                   /// start ibrt\n\nconst uint32_t bes2300p_patch31_ibrt_ins_data_t3[] = {\n    0xf632b920, 0x2800fdc1, 0xbf00d002, 0xbb3af629, 0xbba2f629, /*6f08*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch31 = {\n    31,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch31_ibrt_ins_data_t3),\n    0x00030578,\n    0xbcbef1d6,\n    0xc0006ef8,\n    (uint8_t *)bes2300p_patch31_ibrt_ins_data_t3}; // modify start ibrt timing\n\n#if 0 // def BT_CONTROLLER_DEBUG\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch32=\n{\n    32,\n    BTDRV_PATCH_ACT,\n    0,\n    0x00000348,\n    0xbf00e005,\n    0,\n    NULL\n};///lmp trace\n#else\n\nconst uint32_t bes2300p_patch32_ibrt_ins_data_t3[] = {\n    0xfe4af5f9, 0xbf002300, 0x30c8f884, 0xbaf8f624, /*6f18*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch32 = {\n    32,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch32_ibrt_ins_data_t3),\n    0x0002b508,\n    0xbd00f1db,\n    0xc0006f0c,\n    (uint8_t *)bes2300p_patch32_ibrt_ins_data_t3}; /// role switch fail\n#endif\n\nconst uint32_t bes2300p_patch33_ibrt_ins_data_t3[] = {\n    0x2300b430, 0x4d072103, 0x4290b2da, 0xf855d004, 0x2c004023,\n    0x4611bf18, 0x2b033301, 0x4608d1f4, 0x4770bc30, 0xc00009d4, /*6f50*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch33 = {\n    33,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch33_ibrt_ins_data_t3),\n    0x0002c8c0,\n    0xbb2ef1da,\n    0xc0006f20,\n    (uint8_t *)bes2300p_patch33_ibrt_ins_data_t3}; // find_other_acl_link\n\nconst uint32_t bes2300p_patch34_ibrt_ins_data_t3[] = {\n    0xfe38f632, 0xd0052800, 0xbf002002,\n    0xfcb0f61c, 0xbb2ff634, 0xbb25f634, /*6f6c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch34 = {\n    34,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch34_ibrt_ins_data_t3),\n    0x0003b5b4,\n    0xbcd0f1cb,\n    0xc0006f58,\n    (uint8_t *)bes2300p_patch34_ibrt_ins_data_t3}; // do not trans afh after\n                                                   // IBRT switch\n\nconst uint32_t bes2300p_patch35_ibrt_ins_data_t3[] = {\n    0xfd92f632, /*6f70*/\n    0xd1092801, 0xfe28f632, 0xd0052800, 0xfd9cf632,\n    0xd10142a0, 0xbc77f611, 0x68294620, 0xbc70f611, /*6f90*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch35 = {\n    35,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch35_ibrt_ins_data_t3),\n    0x00018870,\n    0xbb7ef1ee,\n    0xc0006f70,\n    (uint8_t *)bes2300p_patch35_ibrt_ins_data_t3}; // acl data tx cfm\n\nconst uint32_t bes2300p_patch36_ibrt_ins_data_t3[] = {\n    0x460db538, 0x78034614, 0x7842085b, 0x2b7f78c1, 0x2a01d10a,\n    0x290dd11e, 0xf632d11c, 0x4601fd45, 0xf6342000, 0xe015ff1f,\n    0xd1132b03, 0xd1112a18, 0xd80f2d02, 0xf6104628, 0xb158fcb3,\n    0x3047f890, 0xd1072b02, 0xf62a4628, 0x0228fc0b, 0x0001f040,\n    0xfc88f60f, 0x000cf1a4, 0xfdf8f5f9, 0xbf00bd38, 0xd1072800,\n    0x4620bf00, 0x46524639, 0xffc8f7ff, 0xbbd8f61a, 0xbb62f61a, /*7034*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch36 = {\n    36,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch36_ibrt_ins_data_t3),\n    0x000216f8,\n    0xbc92f1e5,\n    0xc0006fc0,\n    (uint8_t *)bes2300p_patch36_ibrt_ins_data_t3}; // lmp filter\n\nconst uint32_t bes2300p_patch37_ibrt_ins_data_t3[] = {\n    0x47f0e92d, /*7050*/\n    0x4b97b082, 0x236e5c1e, 0xf300fb03, 0x5a9b4a95, 0x4f00f413, 0x8120f040,\n    0x46044689, 0x1800ea4f, 0xeb084f91, 0x4b910507, 0xa020f853, 0xf8524a90,\n    0x33013020, 0x3020f842, 0xf860f635, 0x42a04601, 0x8088f040, 0xf8534b8a,\n    0x4b8a2024, 0x429a681b, 0xf8dad817, 0xebc22084, 0xf0230309, 0xf1b34378,\n    0xd9046f80, 0x0302ebc9, 0x4378f023, 0x4a82425b, 0x0024f852, 0x68124a81,\n    0xf200fb02, 0xf2404293, 0x4b7f80eb, 0x3000f993, 0x4b7eb9c3, 0xc000f893,\n    0x0f00f1bc, 0x462ad00a, 0x0e0ceb05, 0xf9122300, 0x44030b01, 0xd1fa4572,\n    0xe0014662, 0x46132200, 0xfcfcfb93, 0xf8804872, 0xe001c000, 0x46132200,\n    0xf890486f, 0x4870e000, 0x9000f890, 0xf890486f, 0xfa4fc000, 0xebc9f08e,\n    0xfa4f0000, 0x4550fa8c, 0xebc9dd05, 0x48660e0e, 0xe000f880, 0x4864e002,\n    0xc000f880, 0x0e00f04f, 0xf840485d, 0xf8dfe024, 0xf85ee178, 0x30010024,\n    0x0024f84e, 0x7800485d, 0xd2054286, 0x783f4f5a, 0x360155af, 0xe004b2f6,\n    0x78364e57, 0x6007f808, 0x4f4d2601, 0x4282553e, 0x442ada06, 0xf9124405,\n    0x44234b01, 0xd1fa42aa, 0xfb934a53, 0x9200f0f0, 0xb2406a14, 0x23002201,\n    0xe08147a0, 0xf8534b46, 0x4b4e2024, 0x429a681b, 0xf8dad816, 0xebc22084,\n    0xf0230309, 0xf1b34378, 0xd9046f80, 0x0302ebc9, 0x4378f023, 0x4a3e425b,\n    0x1024f852, 0x68124a44, 0xf201fb02, 0xd9634293, 0xf9934b42, 0xb9c33000,\n    0xf8934b3a, 0xf1bee000, 0xd00a0f00, 0xeb05462a, 0x2300000e, 0x1b01f912,\n    0x4282440b, 0x4672d1fa, 0x2200e001, 0xfb934613, 0x4936fefe, 0xe000f881,\n    0x2200e001, 0x49334613, 0x49337808, 0xc000f891, 0xf8914932, 0xb241e000,\n    0x0101ebcc, 0xf98efa4f, 0xdd044549, 0x0000ebcc, 0x7008492a, 0x4929e002,\n    0xe000f881, 0x491c2000, 0x0024f841, 0xf850481c, 0x31011024, 0x1024f840,\n    0x7808491c, 0xd2054286, 0x78094920, 0x360155a9, 0xe004b2f6, 0x7809491d,\n    0x1007f808, 0x490c2601, 0x4282550e, 0x442ada06, 0xf9124405, 0x440b1b01,\n    0xd1fa42aa, 0xfb934a12, 0x9200f0f0, 0xb2406a15, 0x22014621, 0x47a82300,\n    0xe8bdb002, 0xbf0087f0,\n    0xc0006af8, // rssi_idx_for_agc[link_id]  shenxin\n    0xd02111f8, // EM_BT_RD(EM_BT_RXBIT_ADDR\n    0xc0006afc, // rssi_set_for_agc   shenxin\n    0xc00009d4, // ld_acl_env[link_id]\n    0xc0006b68, // link_no_sync_count[link_id]\n    0xc00072fc, // link_agc_thd_tws\n    0xc0006b78, // link_no_sync_count_time[link_id]\n    0xc0007300, // link_agc_thd_tws_time\n    0xc0006b60, // rssi_store_tws\n    0xc0006af4, // n   shenxin\n    0xc0007304, // rssi_tws_step\n    0xc0007308, // rssi_min_value_tws\n    0xc0004268, // rwip_rf.rxgain_cntl\n    0xc000730c, // link_agc_thd_mobile\n    0xc0007310, // link_agc_thd_mobile_time\n    0xc0006b88, // rssi_store_mobile\n    0xc0007314, // rssi_mobile_step\n    0xc0007318, // rssi_min_value_mobile\n    0xffffffff, // link_agc_thd_tws\n    0x00000030, // link_agc_thd_tws_time\n    0x00000014, // rssi_tws_step\n    0x0000009c, // rssi_min_value_tws\n    0xffffffff, // link_agc_thd_mobile\n    0x00000030, // link_agc_thd_mobile_time\n    0x00000014, // rssi_mobile_step\n    0x000000a1, // rssi_min_value_mobile\n    0x99029804, 0xfe96f7ff, 0xfc48f632, 0xb898f626, /*7328*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch37 = {\n    37,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch37_ibrt_ins_data_t3),\n    0x0002d458,\n    0xbf60f1d9,\n    0xc0007050,\n    (uint8_t *)bes2300p_patch37_ibrt_ins_data_t3}; // swagc no sync\n\n#if 0\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch38 =\n{\n    38,\n    BTDRV_PATCH_ACT,\n    0,\n    0x000340b0,\n    0xbf00e003,\n    0,\n    NULL,\n};//ld_sco_stop\n#elif 1\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch38 = {\n    38, BTDRV_PATCH_ACT, 0, 0x00039ecc, 0xbf00e001, 0, NULL,\n}; // remove lc_start_lmp_to\n#else\nconst uint32_t bes2300p_patch38_ibrt_ins_data_t3[] = {\n    0x30d8f8c4, 0xfed6f61f, 0xd2014283, 0xbca7f62a, 0xbcbaf62a, /*7048*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch38 = {\n    38,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch38_ibrt_ins_data_t3),\n    0x000319a4,\n    0xbb48f1d5,\n    0xc0007038,\n    (uint8_t *)\n        bes2300p_patch38_ibrt_ins_data_t3}; // ble first connection anchor\n#endif\n\nconst uint32_t bes2300p_patch39_ibrt_ins_data_t3[] = {\n    0x681b4b05, /*732c*/\n    0xd1032b00, 0x781a9b12, 0xbeb8f60b, 0xbec3f60b, 0xbf00bf00,\n\n    0xc0007348, // sniffer_sco_auto_accept\n    0x00000000, /*7348*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch39 = {\n    39,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch39_ibrt_ins_data_t3),\n    0x000130a8,\n    0xb940f1f4,\n    0xc000732c,\n    (uint8_t *)bes2300p_patch39_ibrt_ins_data_t3}; // lm_get_sync_param_hl_rsp\n\nconst uint32_t bes2300p_patch40_ibrt_ins_data_t3[] = {\n    0xfba2f632, 0xd11d2801, 0xfc38f632, 0x4b33b1d0, 0x2b00681b, 0xf632d013,\n    0x4606fba9, 0xd10e42b8, 0xfb98f632, 0xd15f2800, 0xfb76f632, 0x7a224605,\n    0x42937a63, 0x4620d103,\n    0xf99af000, //\n    0x2000b9d0, 0xbdeff614, 0xfb80f632, 0xd10d2802, 0xfc16f632, 0x4b22b150,\n    0x2b00681b, 0x4620d006,\n    0xf988f000, //\n    0x4b1fb910, 0x601a2201, 0xf0037823, 0xbf000301, 0xbda9f614, 0xf8852602,\n    0x79a36054, 0x3055f885, 0xf844f5fc, 0x7c4279e3, 0xd802429a, 0xf83ef5fc,\n    0xf8857c43, 0x79633056, 0x3057f885, 0xf3c37923, 0xf8850340, 0x7a233058,\n    0x3059f885, 0xf8a58963, 0x7ba3305a, 0x305cf885, 0xf88578e3, 0x78a3305d,\n    0x305ff885, 0xfb28f632, 0x46384603, 0xf1052110, 0xf6340252, 0x2000fc65,\n    0xbda3f614,\n    0xc0007348, // sniffer_sco_auto_accept\n    0xc0007434, // sco_param_filter_status\n    0x00000000, 0xfc3cf634, 0xb2c33801, 0xd8022b02, 0xf6342004, 0x2000fc3b,\n    0xbd91f614, 0x3c260cff, 0x5a3712ff, 0xffffffff, 0xffffffff,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch40 = {\n    40,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch40_ibrt_ins_data_t3),\n    0x0001bf10,\n    0xba1ef1eb,\n    0xc0007350,\n    (uint8_t *)\n        bes2300p_patch40_ibrt_ins_data_t3}; // LMP_MSG_HANDLER(esco_link_req)\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch41 = {\n    41, BTDRV_PATCH_ACT, 0, 0x0003b818, 0xfb1be001, 0, NULL,\n}; // config fastack none mode\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch42 = {\n    42,  BTDRV_PATCH_ACT, 0, 0x0002ceb4, 0xe00b0f0f, 0,\n    NULL}; // ld_acl_rx() average rssi\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch43 = {\n    43, BTDRV_PATCH_ACT, 0, 0x0002a51c, 0x3300f443, 0, NULL,\n}; // bt_e_scoltcntl_retxnb_setf 2\n\nconst uint32_t bes2300p_patch44_ibrt_ins_data_t3[] = {\n    0xbf00686b, 0xd00f42b3, 0x4a212100, 0x6863e004, 0x42b34629, 0x4625d00a,\n    0xd9264293, 0xd8242e01, 0x462c461e, 0xe001460d, 0x2500462c, 0x8008f8d4,\n    0xa00cf894, 0x900df894, 0x46384f16, 0x46224629, 0xfb12f5fc, 0x0014f1a7,\n    0xf5fc4621, 0xf1b8fa1d, 0xd0050f00, 0x46514630, 0x2300464a, 0xe00847c0,\n    0x21ff480d, 0xfffaf5ff, 0x682ce003, 0xd1ce2c00, 0xb924e000, 0xf44f4808,\n    0xf5ff7185, 0xe8bdffef, 0xbf0087f0, 0xc0000954, 0xd02200bc, 0xa00508ec,\n    0x07fffffc, 0xc0000968, 0xa00508b4,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch44 = {\n    44,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch44_ibrt_ins_data_t3),\n    0x0002706c,\n    0xb9f8f1e0,\n    0xc0007460,\n    (uint8_t *)bes2300p_patch44_ibrt_ins_data_t3};\n\nconst uint32_t bes2300p_patch45_ibrt_ins_data_t3[] = {\n    0x4b05b508, 0x2b01681b, 0x2200d104, 0x601a4b02,\n    0xfe6cf633, 0xbf00bd08, 0xc00076a4, 0x00000000,\n    0xffeef7ff, 0xd1012b04, 0xbff0f5ff, 0xbff5f5ff, /*76b4*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch45 = {\n    45,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch45_ibrt_ins_data_t3),\n    0x00007690,\n    0xb80af200,\n    0xc0007688,\n    (uint8_t *)bes2300p_patch45_ibrt_ins_data_t3}; // dbg state\n\nconst uint32_t bes2300p_patch46_ibrt_ins_data_t3[] = {\n    0x4b06b508, 0x02007a98, 0x0001f040, 0xfb70f5fa, 0xbf183801, 0x30fff04f,\n    0xbf00bd08, 0xc00064d0, 0xffeef7ff, 0x781bb918, 0xf6342b02, 0xbd08bc89,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch46 = {\n    46,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch46_ibrt_ins_data_t3),\n    0x0003b60c,\n    0xbb70f1cb,\n    0xc0006cd0,\n    (uint8_t *)bes2300p_patch46_ibrt_ins_data_t3};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch47 = {\n    47,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch2a_ibrt_ins_data_t3),\n    0x0001c528,\n    0xbc98f1ea, // a001c528 -> a0206e5c\n    0xc0006e5c,\n    (uint8_t *)bes2300p_patch2a_ibrt_ins_data_t3}; // LMP_MSG_HANDLER(sniff_req)\n                                                   // LC_CONNECTED\n\nconst uint32_t bes2300p_patch48_ibrt_ins_data_t3[] = {\n    0x681b4b1d, 0xd1352b00, 0xb083b530, 0x8310f3ef, 0x0f01f013, 0xb672d117,\n    0x25004c18, 0x95019500, 0xf1044620, 0x2208013c, 0xf5fc2307, 0x9500f9ed,\n    0xf5049501, 0xf5047080, 0x2208718a, 0xf5fc2307, 0xb662f9e3, 0x4c0de014,\n    0x95002500, 0x46209501, 0x013cf104, 0x23072208, 0xf9d6f5fc, 0x95019500,\n    0x7080f504, 0x718af504, 0x23072208, 0xf9ccf5fc, 0xbd30b003, 0xbf004770,\n    0xc0005df0, 0xc0005b24, 0xffbef7ff, 0xe8bdb004, 0xbf0081f0, /*75a4*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch48 = {\n    48,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch48_ibrt_ins_data_t3),\n    0x000013b0,\n    0xb8f2f206,\n    0xc0007518,\n    (uint8_t *)bes2300p_patch48_ibrt_ins_data_t3};\n#if 1\nconst uint32_t bes2300p_patch49_ibrt_ins_data_t3[] = {\n    0x78004804, 0xbf00b120, 0xfd8cf632, 0xba1af609, 0xba1af609, 0xc0006221,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch49 = {\n    49,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch49_ibrt_ins_data_t3),\n    0x000103d8,\n    0xbddef1f6,\n    0xc0006f98,\n    (uint8_t *)bes2300p_patch49_ibrt_ins_data_t3}; // lc_sco_ind\n#else\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch49 = {\n    49, BTDRV_PATCH_ACT, 0, 0x000103d8, 0xbf00e002, 0, NULL,\n}; // lc_sco_ind\n#endif\n\nconst uint32_t bes2300p_patch50_ibrt_ins_data_t3[] = {\n    0xf632d806, 0x2801fb0b, 0x0209d002, 0xbbeef632, 0xbf00bd08, /*75d0*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch50 = {\n    50,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch50_ibrt_ins_data_t3),\n    0x00039d98,\n    0xbc0af1cd,\n    0xc00075b0,\n    (uint8_t *)bes2300p_patch50_ibrt_ins_data_t3}; // do not trans stop SCO\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch51 = {\n    51, BTDRV_PATCH_ACT, 0, 0x0002ea00, 0x8ff8e8bd, 0, NULL,\n}; // remove lmp flush\n\nconst uint32_t bes2300p_patch52_ibrt_ins_data_t3[] = {\n    0x4605b5f8, 0xf8544c19, 0xf6327020, 0x4606fb05, 0x4020f854,\n    0xfaecf632, 0xf632b320, 0x42a8fa61, 0xf897d120, 0x2b023047,\n    0x2e02d11c, 0xb1ccd81a, 0x3047f894, 0xd1152b02, 0x3040f894,\n    0x0234b973, 0x0401f044, 0x4620b2a4, 0xfeccf5f9, 0xd0052836,\n    0x60a2f44f, 0x46224621, 0xfadaf5f9, 0x4b042001, 0xbdf86018,\n    0x4b022000, 0xbdf86018, 0xc0005de4, 0xc0007668, 0x4638bf00,\n    0xffc2f7ff, 0x4628d104, 0xfeb0f5f9, 0xfc38f614, 0xbc84f614,\n    0x00000000, /*7668*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch52 = {\n    52,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch52_ibrt_ins_data_t3),\n    0x0001bed0,\n    0xbbbef1eb,\n    0xc00075dc,\n    (uint8_t *)bes2300p_patch52_ibrt_ins_data_t3}; // delay mobile unsniff lmp\n\nconst uint32_t bes2300p_patch53_ibrt_ins_data_t3[] = {\n    0x681b4b03, /*76fc*/\n    0xd1012b01, /*7700*/\n    0xfb06f632, /*7704*/\n    0x81f0e8bd, /*7708*/\n    0xc0007434, /*770c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch53 = {\n    53,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch53_ibrt_ins_data_t3),\n    0x0003a088,\n    0xbb38f1cd,\n    0xc00076fc,\n    (uint8_t *)\n        bes2300p_patch53_ibrt_ins_data_t3}; // don not trans start ibrt sco\n\nconst uint32_t bes2300p_patch54_ibrt_ins_data_t3[] = {\n    0xbf000a28, 0xffc6f626, 0x0a210a28, 0xb8a4f611, /*767c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch54 = {\n    54,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch54_ibrt_ins_data_t3),\n    0x000187c4,\n    0xbf54f1ee,\n    0xc0007670,\n    (uint8_t *)bes2300p_patch54_ibrt_ins_data_t3}; // protect tws tx type\n\n#if 0\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch55 =\n{\n    55,\n    BTDRV_PATCH_ACT,\n    0,\n    0x00030758,\n    0xbf00e03a,\n    0,\n    NULL,\n};//decrease the connection time of TWS link in SCO\n#else\nconst uint32_t bes2300p_patch55_ibrt_ins_data_t3[] = {\n    0x68134a06, 0x2380f023, 0xf5a26013, 0x68137206,\n    0x0301f023, 0xbf006013, 0xbdaff63e, 0xd0220400, /*77dc*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ibrt_ins_patch55 = {\n    55,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch55_ibrt_ins_data_t3),\n    0x00046330,\n    0xba46f1c1,\n    0xc00077c0,\n    (uint8_t *)bes2300p_patch55_ibrt_ins_data_t3}; // disable hw spi in BLE push\n#endif\n\n/////2300p t3 ibrt patch (chip id =2)\nstatic const uint32_t best2300p_t3_ibrt_ins_patch_config[] = {\n    56,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch0,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch1,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch2,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch3,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch4,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch5,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch6,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch7,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch8,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch9,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch10,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch11,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch12,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch13,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch14,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch15,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch16,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch17,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch18,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch19,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch20,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch21,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch22,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch23,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch24,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch25,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch26,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch27,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch28,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch29,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch30,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch31,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch32,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch33,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch34,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch35,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch36,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch37,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch38,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch39,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch40,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch41,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch42,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch43,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch44,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch45,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch46,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch47,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch48,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch49,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch50,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch51,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch52,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch53,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch54,\n    (uint32_t)&bes2300p_t3_ibrt_ins_patch55,\n};\n#else\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch0 = {\n    0,   BTDRV_PATCH_ACT, 0, 0x000324d4, 0xbf00bf00, 0,\n    NULL}; // afh filter disable\n\nconst uint32_t bes2300p_patch1_ins_data_t3[] = {\n    0xf8934b09, 0xf0133084, 0xd0050f06, 0xf6374620, 0x4601f839, 0xe0052400,\n    0xf8934b03, 0xbf003084, 0xb975f636, 0xb9bbf636, 0xc0006568,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch1 = {\n    1,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch1_ins_data_t3),\n    0x0003cd08,\n    0xbe7af1c9,\n    0xc0006a00,\n    (uint8_t *)bes2300p_patch1_ins_data_t3}; // set ble adv data\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch2 = {\n    2,   BTDRV_PATCH_ACT, 0, 0x0003cbf0, 0xbf00e004, 0,\n    NULL}; // set ble scan response data\n\nconst uint32_t bes2300p_patch3_ins_data_t3[] = {\n    /*6a98*/ 0x99049803,\n    /*6a9c*/ 0x4b12b470,\n    /*6aa0*/ 0x010e5c5a,\n    /*6aa4*/ 0x19734d11,\n    /*6aa8*/ 0x78244c11,\n    /*6aac*/ 0xd20342a2,\n    /*6ab0*/ 0x32015498,\n    /*6ab4*/ 0xe001b2d2,\n    /*6ab8*/ 0x22015570,\n    /*6abc*/ 0x5442480a,\n    /*6ac0*/ 0x461ab14c,\n    /*6ac4*/ 0x23001919,\n    /*6ac8*/ 0x0b01f912,\n    /*6acc*/ 0xbf004403,\n    /*6ad0*/ 0xd1f9428a,\n    /*6ad4*/ 0x2300e000,\n    /*6ad8*/ 0xf0f4fb93,\n    /*6adc*/ 0xbc70b240,\n    /*6ae0*/ 0x22019904,\n    /*6ae4*/ 0xba00f626, // jump a0206ae4 -> a002cee8\n    /*6ae8*/ 0xc0006af8, // addr of rssi_idx_for_agc\n    /*6aec*/ 0xc0006afc, // addr of rssi_set_for_agc\n    /*6af0*/ 0xc0006af4, // addr of N\n    /*6af4*/ 0x00000005, // N : 1 ~ 16\n    /*6af8*/ 0x00000000, // rssi_idx_for_agc[3]\n    /*6afc*/ 0xbabababa, // rssi_set_for_agc[3*16]\n    /*6b00*/ 0xbabababa,\n    /*6b04*/ 0xbabababa,\n    /*6b08*/ 0xbabababa,\n    /*6b0c*/ 0xbabababa,\n    /*6b10*/ 0xbabababa,\n    /*6b14*/ 0xbabababa,\n    /*6b18*/ 0xbabababa,\n    /*6b1c*/ 0xbabababa,\n    /*6b20*/ 0xbabababa,\n    /*6b24*/ 0xbabababa,\n    /*6b28*/ 0xbabababa,\n    /*6b2c*/ 0xbabababa,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch3 = {\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch3_ins_data_t3),\n    0x0002cee4,\n    0xbdd8f1d9, // jump a002cee4 -> a0206a98\n    0xc0006a98,\n    (uint8_t *)bes2300p_patch3_ins_data_t3}; // ld_acl_rx() average rssi\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch4 = {\n    4,   BTDRV_PATCH_ACT, 0, 0x0002ceb4, 0xe00b0f0f, 0,\n    NULL}; // ld_acl_rx() average rssi\n\nconst uint32_t bes2300p_patch5_ins_data_t3[] = {\n    0x2028f843, /*6b3c*/\n    0xf8434b08, 0x4b052028, 0x4b0e701a, 0x2201701a, 0xf8434b08,\n    0xbf002028, 0xba32f624, 0xc0006b60, 0x00000000, 0xc0006b68,\n    0x00000000, 0x00000000, 0x00000000, 0xc0006b78, 0x00000001,\n    0x00000001, 0x00000001, 0xc0006b88, 0x00000000, /*6b88*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch5 = {\n    5,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch5_ins_data_t3),\n    0x0002afbc,\n    0xbdbef1db,\n    0xc0006b3c,\n    (uint8_t *)bes2300p_patch5_ins_data_t3}; // sync clear count\n\nconst uint32_t bes2300p_patch6_ins_data_t3[] = {\n    0x47f0e92d, /*7050*/\n    0x4b97b082, 0x236e5c1e, 0xf300fb03, 0x5a9b4a95, 0x4f00f413, 0x8120f040,\n    0x46044689, 0x1800ea4f, 0xeb084f91, 0x4b910507, 0xa020f853, 0xf8524a90,\n    0x33013020, 0x3020f842, 0xf860f635, 0x42a04601, 0x8088f040, 0xf8534b8a,\n    0x4b8a2024, 0x429a681b, 0xf8dad817, 0xebc22084, 0xf0230309, 0xf1b34378,\n    0xd9046f80, 0x0302ebc9, 0x4378f023, 0x4a82425b, 0x0024f852, 0x68124a81,\n    0xf200fb02, 0xf2404293, 0x4b7f80eb, 0x3000f993, 0x4b7eb9c3, 0xc000f893,\n    0x0f00f1bc, 0x462ad00a, 0x0e0ceb05, 0xf9122300, 0x44030b01, 0xd1fa4572,\n    0xe0014662, 0x46132200, 0xfcfcfb93, 0xf8804872, 0xe001c000, 0x46132200,\n    0xf890486f, 0x4870e000, 0x9000f890, 0xf890486f, 0xfa4fc000, 0xebc9f08e,\n    0xfa4f0000, 0x4550fa8c, 0xebc9dd05, 0x48660e0e, 0xe000f880, 0x4864e002,\n    0xc000f880, 0x0e00f04f, 0xf840485d, 0xf8dfe024, 0xf85ee178, 0x30010024,\n    0x0024f84e, 0x7800485d, 0xd2054286, 0x783f4f5a, 0x360155af, 0xe004b2f6,\n    0x78364e57, 0x6007f808, 0x4f4d2601, 0x4282553e, 0x442ada06, 0xf9124405,\n    0x44234b01, 0xd1fa42aa, 0xfb934a53, 0x9200f0f0, 0xb2406a14, 0x23002201,\n    0xe08147a0, 0xf8534b46, 0x4b4e2024, 0x429a681b, 0xf8dad816, 0xebc22084,\n    0xf0230309, 0xf1b34378, 0xd9046f80, 0x0302ebc9, 0x4378f023, 0x4a3e425b,\n    0x1024f852, 0x68124a44, 0xf201fb02, 0xd9634293, 0xf9934b42, 0xb9c33000,\n    0xf8934b3a, 0xf1bee000, 0xd00a0f00, 0xeb05462a, 0x2300000e, 0x1b01f912,\n    0x4282440b, 0x4672d1fa, 0x2200e001, 0xfb934613, 0x4936fefe, 0xe000f881,\n    0x2200e001, 0x49334613, 0x49337808, 0xc000f891, 0xf8914932, 0xb241e000,\n    0x0101ebcc, 0xf98efa4f, 0xdd044549, 0x0000ebcc, 0x7008492a, 0x4929e002,\n    0xe000f881, 0x491c2000, 0x0024f841, 0xf850481c, 0x31011024, 0x1024f840,\n    0x7808491c, 0xd2054286, 0x78094920, 0x360155a9, 0xe004b2f6, 0x7809491d,\n    0x1007f808, 0x490c2601, 0x4282550e, 0x442ada06, 0xf9124405, 0x440b1b01,\n    0xd1fa42aa, 0xfb934a12, 0x9200f0f0, 0xb2406a15, 0x22014621, 0x47a82300,\n    0xe8bdb002, 0xbf0087f0,\n    0xc0006af8, // rssi_idx_for_agc[link_id]  shenxin\n    0xd02111f8, // EM_BT_RD(EM_BT_RXBIT_ADDR\n    0xc0006afc, // rssi_set_for_agc   shenxin\n    0xc00009d4, // ld_acl_env[link_id]\n    0xc0006b68, // link_no_sync_count[link_id]\n    0xc00072fc, // link_agc_thd_tws\n    0xc0006b78, // link_no_sync_count_time[link_id]\n    0xc0007300, // link_agc_thd_tws_time\n    0xc0006b60, // rssi_store_tws\n    0xc0006af4, // n   shenxin\n    0xc0007304, // rssi_tws_step\n    0xc0007308, // rssi_min_value_tws\n    0xc0004268, // rwip_rf.rxgain_cntl\n    0xc000730c, // link_agc_thd_mobile\n    0xc0007310, // link_agc_thd_mobile_time\n    0xc0006b88, // rssi_store_mobile\n    0xc0007314, // rssi_mobile_step\n    0xc0007318, // rssi_min_value_mobile\n    0xffffffff, // link_agc_thd_tws\n    0x00000030, // link_agc_thd_tws_time\n    0x00000014, // rssi_tws_step\n    0x0000009c, // rssi_min_value_tws\n    0xffffffff, // link_agc_thd_mobile\n    0x00000030, // link_agc_thd_mobile_time\n    0x00000014, // rssi_mobile_step\n    0x000000a1, // rssi_min_value_mobile\n    0x99029804, 0xfe96f7ff, 0xfc48f632, 0xb898f626, /*7328*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch6 = {\n    6,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch6_ins_data_t3),\n    0x0002d458,\n    0xbf60f1d9,\n    0xc0007050,\n    (uint8_t *)bes2300p_patch6_ins_data_t3}; // swagc no sync\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch7 = {\n    7,   BTDRV_PATCH_ACT, 0, 0x0000e47a, 0xe0027b20, 0,\n    NULL}; // lm_inq_res_ind_handler()  rssi\n\nconst uint32_t bes2300p_patch8_ins_data_t3[] = {\n    0x2300b430, 0x4d072103, 0x4290b2da, 0xf855d004, 0x2c004023,\n    0x4611bf18, 0x2b033301, 0x4608d1f4, 0x4770bc30, 0xc00009d4,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch8 = {\n    8,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch8_ins_data_t3),\n    0x0002c8c0,\n    0xbb2ef1da,\n    0xc0006f20,\n    (uint8_t *)bes2300p_patch8_ins_data_t3}; // find_other_acl_link\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch9 = {\n    9,   BTDRV_PATCH_ACT, 0, 0x000123e8, 0xf7f1bf00, 0,\n    NULL}; // ignore lm_get_nb_acl(MASTER_FLAG|SLAVE_FLAG) > 1 when cal wesco\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch10 = {\n    10, BTDRV_PATCH_ACT, 0, 0x0002ff48, 0xd9590f05, 0, NULL,\n}; // ignore bld_sco_retransmit_dec function\n\nconst uint32_t bes2300p_patch11_ins_data_t3[] = {\n    0x304bf996,\n    0x44233302,\n    0xbbfcf629,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch11 = {\n    11,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch11_ins_data_t3),\n    0x00030748,\n    0xbbfef1d6,\n    0xc0006f48,\n    (uint8_t *)bes2300p_patch11_ins_data_t3}; // ld_calculate_timestamp\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch12 = {\n    12, BTDRV_PATCH_ACT, 0, 0x0001bcf4, 0xbf00e004, 0, NULL,\n}; // LMP_MSG_HANDLER(max_slot_req)\n\nconst uint32_t bes2300p_patch13_ins_data_t3[] = {\n    0x3040f894, 0xd1032b00, 0x222a210b, 0xbe00f616, 0xbd06f616};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch13 = {\n    13,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch13_ins_data_t3),\n    0x0001d63c,\n    0xb9f8f1e9,\n    0xc0006a30,\n    (uint8_t *)bes2300p_patch13_ins_data_t3}; // LMP_MSG_HANDLER(aurand)\n\nconst uint32_t bes2300p_patch14_ins_data_t3[] = {\n    0xf8534b04, 0x46283026, 0x135ef893, 0xfc62f5fa, 0xbd55f616, 0xc0005de4};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch14 = {\n    14,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch14_ins_data_t3),\n    0x0001d4f4,\n    0xbaa6f1e9,\n    0xc0006a44,\n    (uint8_t *)bes2300p_patch14_ins_data_t3}; // LMP_MSG_HANDLER(aurand)\n\nconst uint32_t bes2300p_patch15_ins_data_t3[] = {\n    0x3040f897, 0xd1032b00, 0xbbacf617,\n    0x21234620, 0xf836f610, 0xbc8bf617 /*0xc0006a74*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch15 = {\n    15,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch15_ins_data_t3),\n    0x0001e1c0,\n    0xbc4ef1e8,\n    0xc0006a60,\n    (uint8_t *)bes2300p_patch15_ins_data_t3}; // LMP_MSG_HANDLER(not_accepted)\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch16 = {\n    16, BTDRV_PATCH_ACT, 0, 0x0002ea00, 0x8ff8e8bd, 0, NULL,\n}; // remove lmp flush\n\nconst uint32_t bes2300p_patch17_ins_data_t3[] = {\n    0xfe4af5f9, 0xbf002300, 0x30c8f884, 0xbaf8f624, /*6f18*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch17 = {\n    17,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch17_ins_data_t3),\n    0x0002b508,\n    0xbd00f1db,\n    0xc0006f0c,\n    (uint8_t *)bes2300p_patch17_ins_data_t3}; /// role switch fail\n\nconst uint32_t bes2300p_patch18_ins_data_t3[] = {\n    0xbf004628, 0xfdc4f60d, 0x21144628, 0xba4af60f, /*6c94*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch18 = {\n    18,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch18_ins_data_t3),\n    0x00016128,\n    0xbdaef1f0,\n    0xc0006c88,\n    (uint8_t *)bes2300p_patch18_ins_data_t3}; // start lmp to before sending\n                                              // LMP_HostConnectionReq\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch19 = {\n    19, BTDRV_PATCH_ACT, 0, 0x00020640, 0xe00dbf00, 0, NULL,\n}; // detach directly\n\nconst uint32_t bes2300p_patch20_ins_data_t3[] = {\n    0x305af893, 0xd1032b00, 0x12f4f240,\n    0xbf00e002, 0x32b8f640, 0xbe30f60d, /*6bdc*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch20 = {\n    20,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch20_ins_data_t3),\n    0x0001483c,\n    0xb9c4f1f2,\n    0xc0006bc8,\n    (uint8_t *)bes2300p_patch20_ins_data_t3}; // lmp to 5s before connection cmp\n                                              // sent\n\nconst uint32_t bes2300p_patch21_ins_data_t3[] = {\n    0x4603b508, 0x8210f3ef, 0x0f01f012, 0xb672d112, 0xf5a34811, 0x3b285343,\n    0xfba14910, 0xf3c32303, 0xeb032387, 0xeb000343, 0x31940183, 0xfdd0f5fc,\n    0xbd08b662, 0xf5a34808, 0x3b285343, 0xfba14907, 0xf3c32303, 0xeb032387,\n    0xeb000343, 0x31940183, 0xfdbef5fc, 0xbf00bd08, 0xc0005b4c, 0xff00ff01,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch21 = {\n    21,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch21_ins_data_t3),\n    0x00008b24,\n    0xb8f8f1fe,\n    0xc0006d18,\n    (uint8_t *)bes2300p_patch21_ins_data_t3}; // add lock interrupt when free\n                                              // acl buf\n\nconst uint32_t bes2300p_patch22_ins_data_t3[] = {\n    0x2040f897, /*6e00*/\n    0xd1112a01, 0x0109f106, 0xf5fc4608, 0x2813fd4b, 0x221ed802, 0xbc54f614,\n    0x2a017a32, 0xf614d801, 0x221ebbf6, 0xbc4cf614, 0xbc47f614, /*6e2c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch22 = {\n    22,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch22_ins_data_t3),\n    0x0001b604,\n    0xbbfcf1eb,\n    0xc0006e00,\n    (uint8_t *)bes2300p_patch22_ins_data_t3}; // reject set afh lmp when channel\n                                              // number less than 20\n\n/*patch 23,24 for HiSilicon,BCS4.2,ver0x608 and Broadcom,BCS4.2,ver0x6106\n * Enhanced Data Rate problem*/\nconst uint32_t bes2300p_patch23_ins_data_t3[] = {\n    0x0a00b538, /*c0006b90*/\n    0xf8534b08, 0xb2c45020, 0xf6274620, 0x4620fdaf,\n    0xf895210b, 0xf61d2046, 0x2201ff63, 0x701a4b02,\n    0xbf00bd38, 0xc0005de4, 0xc0006bc0, 0x00000000 /*c0006bc0*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch23 = {\n    23,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch23_ins_data_t3),\n    0x000144fc,\n    0xbb48f1f2,\n    0xc0006b90,\n    (uint8_t *)bes2300p_patch23_ins_data_t3}; // table request\n\nconst uint32_t bes2300p_patch24_ins_data_t3[] = {\n    0x0a00b538, /*c0006be0*/\n    0xf8534b0f, 0xb2c45020, 0x104df895, 0x31004620, 0x2101bf18,\n    0xfab8f628, 0x8d298ea8, 0xf61d2201, 0x4601f9f7, 0xf6284620,\n    0x2301fae5, 0x3062f885, 0xf6274620, 0x2200fd7f, 0x701a4b02,\n    0xbf00bd38, 0xc0005de4, 0xc0006bc0, 0x78244c04, 0x4628b114,\n    0xffd4f7ff, 0xb00d2000, 0x83f0e8bd, 0xc0006bc0 /*c0006c40*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch24 = {\n    24,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch24_ins_data_t3),\n    0x00023eb8,\n    0xbeb8f1e2,\n    0xc0006be0,\n    (uint8_t *)bes2300p_patch24_ins_data_t3}; // table request configure\n/*end patch 23,24 for HiSilicon,BCS4.2,ver0x608 and Broadcom,BCS4.2,ver0x6106\n * Enhanced Data Rate problem*/\n\nconst uint32_t bes2300p_patch25_ins_data_t3[] = {\n    0xfa80f5fc, /*c0006f58*/\n    0xb9737f43, 0x2b01786b, 0x2b03d01a, 0x2b05d010, 0xf896d00e,\n    0x22203044, 0x4620212e, 0xfd90f61d, 0xf896e010, 0x212e2044,\n    0xf61d4620, 0xe009fd65, 0xfd70f60c, 0xd1ec2800, 0x325ef896,\n    0xd1e82b00, 0xbeb0f614, 0xbec1f614, /*c0006fa0*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch25 = {\n    25,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch25_ins_data_t3),\n    0x0001bcb8,\n    0xb94ef1eb,\n    0xc0006f58,\n    (uint8_t *)bes2300p_patch25_ins_data_t3}; // LMP_MSG_HANDLER(max_slot_req)\n\nconst uint32_t bes2300p_patch26_ins_data_t3[] = {\n    0x681b4b16, 0xd0222b00, 0xf8b34b16, 0xf01331c0, 0xd1000f18, 0x4b13e020,\n    0x71c2f893, 0xff12f61f, 0xd0192f02, 0xf8534b10, 0x2b003027, 0x6b5ad014,\n    0xd9074282, 0xf8931a10, 0xeb033042, 0x42980343, 0x2200d80a, 0x46204611,\n    0xfa62f629, 0x4620e004, 0xbf002100, 0xbe0cf629, 0xbe0df629,\n\n    0xc0007008, // sco_start_delay_flag\n    0x00000000,\n    0xc0005ea8, // ld_env\n    0xc00009e4, // ld_sco_env\n\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch26 = {\n    26,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch26_ins_data_t3),\n    0x00030c14,\n    0xb9c8f1d6,\n    0xc0006fa8,\n    (uint8_t *)bes2300p_patch26_ins_data_t3}; // ld_acl_sched\n\nconst uint32_t bes2300p_patch27_ins_data_t3[] = {\n    0xf0234413, 0x63634378, 0x68094904, 0x4904b121,\n    0xfb016809, 0x63633300, 0xba5af62c,\n\n    0xc0007008, // sco_start_delay_flag\n    0xc000703c, // sco_anchor_start_add\n    0x0000000a,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch27 = {\n    27,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch27_ins_data_t3),\n    0x000334e0,\n    0xbd9af1d3,\n    0xc0007018,\n    (uint8_t *)bes2300p_patch27_ins_data_t3}; // ld_sco_start\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch28 = {\n    28, BTDRV_PATCH_ACT, 0, 0x00019f54, 0xbf00e00b, 0, NULL,\n}; // lc_sync_ind\n// send max_slot anyway\n\nconst uint32_t bes2300p_patch29_ins_data_t3[] = {\n    0xf8862001,\n    0xf8860060,\n    0xbf000061,\n    0xbba3f611,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch29 = {\n    29,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch29_ins_data_t3),\n    0x00018f1c,\n    0xbc62f1ee,\n    0xc00077e4,\n    (uint8_t *)bes2300p_patch29_ins_data_t3}; // ignore 0x5d sm\n\n// for ble master update con param with large winsize\nconst uint32_t bes2300p_patch30_ins_data_t3[] = {\n    0x4630bf00, 0x109ef894, 0xf958f63f, 0x309cf894,\n    0x2271f240, 0x0003fb02, 0xbcf1f63f,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch30 = {\n    30,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch30_ins_data_t3),\n    0x000471e4,\n    0xbb08f1c0,\n    0xc00077f8,\n    (uint8_t *)bes2300p_patch30_ins_data_t3};\n\nstatic const uint32_t best2300p_t3_ins_patch_config[] = {\n    31,\n    (uint32_t)&bes2300p_t3_ins_patch0,\n    (uint32_t)&bes2300p_t3_ins_patch1,\n    (uint32_t)&bes2300p_t3_ins_patch2,\n    (uint32_t)&bes2300p_t3_ins_patch3,\n    (uint32_t)&bes2300p_t3_ins_patch4,\n    (uint32_t)&bes2300p_t3_ins_patch5,\n    (uint32_t)&bes2300p_t3_ins_patch6,\n    (uint32_t)&bes2300p_t3_ins_patch7,\n    (uint32_t)&bes2300p_t3_ins_patch8,\n    (uint32_t)&bes2300p_t3_ins_patch9,\n    (uint32_t)&bes2300p_t3_ins_patch10,\n    (uint32_t)&bes2300p_t3_ins_patch11,\n    (uint32_t)&bes2300p_t3_ins_patch12,\n    (uint32_t)&bes2300p_t3_ins_patch13,\n    (uint32_t)&bes2300p_t3_ins_patch14,\n    (uint32_t)&bes2300p_t3_ins_patch15,\n    (uint32_t)&bes2300p_t3_ins_patch16,\n    (uint32_t)&bes2300p_t3_ins_patch17,\n    (uint32_t)&bes2300p_t3_ins_patch18,\n    (uint32_t)&bes2300p_t3_ins_patch19,\n    (uint32_t)&bes2300p_t3_ins_patch20,\n    (uint32_t)&bes2300p_t3_ins_patch21,\n    (uint32_t)&bes2300p_t3_ins_patch22,\n    (uint32_t)&bes2300p_t3_ins_patch23,\n    (uint32_t)&bes2300p_t3_ins_patch24,\n    (uint32_t)&bes2300p_t3_ins_patch25,\n    (uint32_t)&bes2300p_t3_ins_patch26,\n    (uint32_t)&bes2300p_t3_ins_patch27,\n    (uint32_t)&bes2300p_t3_ins_patch28,\n    (uint32_t)&bes2300p_t3_ins_patch29,\n    (uint32_t)&bes2300p_t3_ins_patch30,\n};\n#endif\n\n#ifndef IBRT\n\n/***************************************************************************\n *\n * instruction patch Information\n *\n * BT ROM Chip Version:1302 T2(CHIP ID=1)\n *\n * __BT_ONE_BRING_TWO__ function\n *\n ****************************************************************************/\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch0 = {\n    0,   BTDRV_PATCH_ACT, 0, 0x00030d48, 0xbf00bf00, 0,\n    NULL}; // set lsto when there is no connect\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch1 = {\n    1, BTDRV_PATCH_ACT, 0, 0x00019acc, 0xbf00e003, 0, NULL}; ////iocap rsp\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch2 = {\n    2,   BTDRV_PATCH_ACT, 0, 0x0001a7a4, 0xbf00e003, 0,\n    NULL}; // pwer rsp in wrong state\n\nconst uint32_t bes2300p_patch3_ins_data_t2[] = {\n    0xf5fa4620,                                     /*6900*/\n    0x285dfd4b, 0xf240d10e, 0x46215005, 0xf84cf5fa, /*6910*/\n    0xf8534b05, 0x46203026, 0x135ef893, 0xfcd0f5fa, /*6920*/\n    0xb9f3f617, 0xb9ebf617, 0xc0005cd8,             /*692c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch3 = {\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch3_ins_data_t2),\n    0x0001dcfc,\n    0xbe00f1e8,\n    0xc0006900,\n    (uint8_t *)bes2300p_patch3_ins_data_t2}; // not accept\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch4 = {\n    4,   BTDRV_PATCH_ACT, 0, 0x0002a4a4, 0xbf8c7f80, 0,\n    NULL}; // LD_ACL_STOP_NOTIF_BIT_OFF_THR\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch5 = {\n    5,   BTDRV_PATCH_ACT, 0, 0x0002a7e4, 0x7f80f5b3, 0,\n    NULL}; // LD_ACL_STOP_NOTIF_BIT_OFF_THR\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch6 = {\n    6,   BTDRV_PATCH_ACT, 0, 0x0002a69c, 0xbf947f80, 0,\n    NULL}; // LD_ACL_STOP_NOTIF_BIT_OFF_THR\n\nconst uint32_t bes2300p_patch7_ins_data_t2[] = {\n    0xd01e0fdb,                                     /*6930*/\n    0x6307f44f, 0xf304fb03, 0x48168f6a, 0x93011810, /*6940*/\n    0x49154418, 0xfea0f644, 0x58fb4b14, 0x4301f3c3, /*6950*/\n    0xf1028f2a, 0xf5024250, 0xf2021205, 0x8f6942fc, /*6960*/\n    0x0241eb02, 0x440a9901, 0x600a490d, 0xf44fe010, /*6970*/\n    0xfb036307, 0x9301f304, 0x18184806, 0x8f6a4906, /*6980*/\n    0xfe82f644, 0x58fb4b05, 0x4381f3c3, 0xba27f62e, /*6990*/\n    0xba2df62e,\n\n    0xd02144fc, 0xc000593c, 0xd0220144, /*69a0*/\n    0xc000005c,                         /*69a4*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch7 = {\n    7,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch7_ins_data_t2),\n    0x00034d80,\n    0xbdd6f1d1,\n    0xc0006930,\n    (uint8_t *)bes2300p_patch7_ins_data_t2}; // ld_sco_frm_isr\n\nconst uint32_t bes2300p_patch8_ins_data_t2[] = {\n    0xf6052002,                                     /*69a8*/\n    0x2802ffbf, 0xf898d110,                         /*69b0*/\n    0x230120b2, 0x4a074093, 0x21c0f8b2, 0x0303ea22, /*69c0*/\n    0x0341f3c3, 0xf8524a04, 0xbf003023, 0xbbecf625, /*69d0*/\n    0xbbeef625,\n\n    0xc0005d9c, // ld_env\n    0xc0000998, // ld_acl_env /*69dc*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch8 = {\n    8,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch8_ins_data_t2),\n    0x0002c188,\n    0xbc0ef1da,\n    0xc00069a8,\n    (uint8_t *)bes2300p_patch8_ins_data_t2}; // ld_event_timestamp_calculate\n\nconst uint32_t bes2300p_patch9_ins_data_t2[] = {\n    0xf8934b07,                                     /*69e0*/\n    0xf0133084, 0xd0070f06, 0xf6364620, 0x4601fa4b, /*69f0*/\n    0xbf002400, 0xbbd2f635, 0xbb91f635,\n\n    0xc0006460, // llm_le_env /*6a00*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch9 = {\n    9,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch9_ins_data_t2),\n    0x0003c11c,\n    0xbc60f1ca,\n    0xc00069e0,\n    (uint8_t *)bes2300p_patch9_ins_data_t2}; // hci_le_set_adv_data_cmd_handler\n\nconst uint32_t bes2300p_patch10_ins_data_t2[] = {\n    0x123ff240,                                     /*6a04*/\n    0xd006421a, 0x2b007aab, 0x2201d003,             /*6a10*/\n    0x601a4b05, 0x2201e002, 0x601a4b03, 0xf240892b, /*6a20*/\n    0xbf00123f, 0xbc1af63e,\n\n    0xc0006a30, // le_wrong_packet\n    0x00000000, /*6a30*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch10 = {\n    10,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch10_ins_data_t2),\n    0x0004525c,\n    0xbbd2f1c1,\n    0xc0006a04,\n    (uint8_t *)bes2300p_patch10_ins_data_t2}; // lld_pdu_rx_handler\n\nconst uint32_t bes2300p_patch11_ins_data_t2[] = {\n    0xf894b952,                                     /*6a34*/\n    0xf01330ae, 0xd1050f09, 0x209ff894,             /*6a40*/\n    0x4a03b912, 0xb10a6812, 0xbc05f63f, 0xbc09f63f, /*6a50*/\n\n    0xc0006a30, /*6a54*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch11 = {\n    11,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch11_ins_data_t2),\n    0x00046248,\n    0xbbf4f1c0,\n    0xc0006a34,\n    (uint8_t *)bes2300p_patch11_ins_data_t2}; // lld_evt_restart\n\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch12 = // from bes2300p_t2_ibrt_ins_patch2\n    {12,  BTDRV_PATCH_ACT, 0, 0x00007024, 0xbf00e011, 0,\n     NULL}; // dont call rwip_assert_err when assert error\n\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch13 = // from bes2300p_t2_ibrt_ins_patch4\n    {13,  BTDRV_PATCH_ACT, 0, 0x0002be90, 0xbd702000, 0,\n     NULL}; // ld_check_if_need_protect_sniff retrun 0\n\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch14 = // from bes2300p_t2_ibrt_ins_patch9\n    {\n        14, BTDRV_PATCH_ACT, 0, 0x0002d82c, 0x2b006013, 0, NULL,\n}; // ld_acl_rsw_rx\n\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch15 = // from bes2300p_t2_ibrt_ins_patch10\n    {\n        15, BTDRV_PATCH_ACT, 0, 0x0002fe60, 0xbf00e001, 0, NULL,\n}; // ld_acl_flow_on\n\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch16 = // from bes2300p_t2_ibrt_ins_patch12\n    {16,  BTDRV_PATCH_ACT, 0, 0x0002a41c, 0xbf000f01, 0,\n     NULL}; // mode == SYNC2_SCO_MODE\n\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch17 = // from bes2300p_t2_ibrt_ins_patch17\n    {\n        17,         BTDRV_PATCH_ACT,\n        0,\n        0x00007010, // a0007010\n        0xb9bef000, // jump a0007390\n        0,          NULL,\n}; // DEF_IRQHandler\n\nconst uint32_t bes2300p_patch18_ins_data_t2[] = {\n    0x4681b083, /*6b30*/\n    0x4b022200, 0x2020f843, 0xbddcf623, 0xc0006b44,\n    0x00000000, 0x00000000, 0x00000000, /*6b4c*/\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch18 = // from bes2300p_t2_ibrt_ins_patch22\n    {18,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch18_ins_data_t2),\n     0x0002a6f4,\n     0xba1cf1dc,\n     0xc0006b30,\n     (uint8_t *)bes2300p_patch18_ins_data_t2}; // sync clear count\n\nconst uint32_t bes2300p_patch19_ins_data_t2[] = {\n    /*6ba0*/ 0xbf0080c6,\n    /*6ba4*/ 0x71022200,\n    /*6ba8*/ 0xbb2af619, // jump a0020200\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch19 = // from bes2300p_t2_ibrt_ins_patch29\n    {19,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch19_ins_data_t2),\n     0x000201f8,\n     0xbcd2f1e6, // jump a00201f8 -> a0206ba0\n     0xc0006ba0,\n     (uint8_t *)\n         bes2300p_patch19_ins_data_t2}; // KE_MSG_HANDLER(lc_op_loc_sniff_req,\n                                        // void)\n\nconst uint32_t bes2300p_patch20_ins_data_t2[] = {\n    /*6bac*/ 0x46286825,\n    /*6bb0*/ 0x303ef895,\n    /*6bb4*/ 0xd0012b02,\n    /*6bb8*/ 0xbda2f622, // jump a0029700\n    /*6bbc*/ 0xbf002300,\n    /*6bc0*/ 0x303ef885,\n    /*6bc4*/ 0xfea6f622, // call a0029914\n    /*6bc8*/ 0xbdc1f622, // jump a002974e\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch20 = // from bes2300p_t2_ibrt_ins_patch30\n    {20,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch20_ins_data_t2),\n     0x000296fc,\n     0xba56f1dd, // jump a00296fc -> a0206bac\n     0xc0006bac,\n     (uint8_t *)bes2300p_patch20_ins_data_t2}; // ld_pscan_frm_cbk\n\nconst uint32_t bes2300p_patch21_ins_data_t2[] = {\n    0x4620461d,                         /*6d00*/\n    0x463a4629, 0xf5f94633, 0xbdf8fc2b, /*6d0c*/\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch21 = // from bes2300p_t2_ibrt_ins_patch0\n    {21,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch21_ins_data_t2),\n     0x000070ec,\n     0xbe08f1ff,\n     0xc0006d00,\n     (uint8_t *)bes2300p_patch21_ins_data_t2}; // assert warn\n\nconst uint32_t bes2300p_patch22_ins_data_t2[] = {\n    0x4630461f,                         /*6d14*/\n    0x462a4639, 0xf5f94623, 0xbdf8fc21, /*6d20*/\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch22 = // from bes2300p_t2_ibrt_ins_patch1\n    {22,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch22_ins_data_t2),\n     0x00007070,\n     0xbe50f1ff,\n     0xc0006d14,\n     (uint8_t *)bes2300p_patch22_ins_data_t2}; // assert param\n\nconst uint32_t bes2300p_patch23_ins_data_t2[] = {\n    0x2a140c92,                         /*6d30*/\n    0x2214bf28, 0xbf004691, 0xbc44f623, /*6d3c*/\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch23 = // from bes2300p_t2_ibrt_ins_patch40\n    {23,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch23_ins_data_t2),\n     0x0002a5c4,\n     0xbbb4f1dc,\n     0xc0006d30,\n     (uint8_t *)bes2300p_patch23_ins_data_t2}; // max_drift limit\n\nconst uint32_t bes2300p_patch24_ins_data_t2[] = {\n    /*6d9c*/ 0x4b179a0b,\n    /*6da0*/ 0xd023429a,\n    /*6da4*/ 0x20b5f894,\n    /*6da8*/ 0xb9fab2d2,\n    /*6dac*/ 0xf9b4b22e,\n    /*6db0*/ 0x1b9b3098,\n    /*6db4*/ 0xf9b24a0f,\n    /*6db8*/ 0x42932000,\n    /*6dbc*/ 0x4251da05,\n    /*6dc0*/ 0xdd02428b,\n    /*6dc4*/ 0x7088f8d4,\n    /*6dc8*/ 0x4293e00f,\n    /*6dcc*/ 0xf8d4dd05,\n    /*6dd0*/ 0x3f017088,\n    /*6dd4*/ 0x4778f027,\n    /*6dd8*/ 0x4252e007,\n    /*6ddc*/ 0xda044293,\n    /*6de0*/ 0x7088f8d4,\n    /*6de4*/ 0xf0273701,\n    /*6de8*/ 0xbf004778,\n    /*6dec*/ 0x708cf8c4,\n    /*6df0*/ 0xbce4f623, // jump a002a7bc\n    /*6df4*/ 0xc0006df8,\n    /*6df8*/ 0x00000032, // 50\n    /*6dfc*/ 0xa003477b, // ld_acl_sniff_frm_isr lr\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch24 = // from bes2300p_t2_ibrt_ins_patch46\n    {24,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch24_ins_data_t2),\n     0x0002a7b8,\n     0xbaf0f1dc, // jump a002a7b8 -> a0206d9c\n     0xc0006d9c,\n     (uint8_t *)bes2300p_patch24_ins_data_t2}; // ld_acl_rx_sync clk_off cal\n                                               // active mode\n\nconst uint32_t bes2300p_patch25_ins_data_t2[] = {\n    /*6e10*/ 0xbf00669a,\n    /*6e14*/ 0x66da466a, // mov   r2, sp; str   r2, [r3, #108]\n    /*6e18*/ 0x8208f3ef, // mrs   r2, MSP\n    /*6e1c*/ 0xbf00671a, // str   r2, [r3, #112]\n    /*6e20*/ 0x8209f3ef, // mrs   r2, PSP\n    /*6e24*/ 0xbf00675a, // str   r2, [r3, #116]\n    /*6e28*/ 0xbf00bf00,\n    /*6e2c*/ 0xbf00bf00,\n    /*6e30*/ 0xbf00bf00,\n    /*6e34*/ 0xbf00bf00,\n    /*6e38*/ 0xbf00bf00,\n    /*6e3c*/ 0xbf00bf00,\n    /*6e40*/ 0xbf00bf00,\n    /*6e44*/ 0xbf00bf00,\n    /*6e48*/ 0xbf00bf00,\n    /*6e4c*/ 0xbf00bf00,\n    /*6e50*/ 0xba90f600, // jump a0206e50 -> a0007374\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch25 = // from bes2300p_t2_ibrt_ins_patch15\n    {25,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch25_ins_data_t2),\n     0x00007360,\n     0xbd56f1ff, // jump a0007360 -> a0206e10\n     0xc0006e10,\n     (uint8_t *)bes2300p_patch25_ins_data_t2}; // bt_assert_crash_dump\n\n#define PATCH_IN_EXTRA_SPACE 1\n#if PATCH_IN_EXTRA_SPACE\nconst uint32_t bes2300p_patch26_ins_data_t2[] = {\n    0xd8092b01,                                     /*70d0*/\n    0xfb03236e, 0x4a04f308, 0xf4135a9b, 0xd1016f00, /*70e0*/\n    0xb919f629, 0xb9aef629, 0xd0211200,             /*70ec*/\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch26 = // from bes2300p_t2_ibrt_ins_patch44\n    {26,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch26_ins_data_t2),\n     0x00030314,\n     0xbedcf1d6,\n     0xc00070d0,\n     (uint8_t *)bes2300p_patch26_ins_data_t2}; // lmp tx for tx desc error\n\nconst uint32_t bes2300p_patch27_ins_data_t2[] = {\n    0xfeecf5f8,                                     /*7300*/\n    0xbf00bf00, 0x8310f3ef, 0x0401f013, 0xb672d108, /*7310*/\n    0xff22f5f8, 0xbf30b110, 0xd1ef2c00, 0xe7edb662, /*7320*/\n    0xff1af5f8, 0xd1f62800, 0xbf00e7e8,             /*732c*/\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch27 = // from bes2300p_t2_ibrt_ins_patch13\n    {27,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch27_ins_data_t2),\n     0x0000721c,\n     0xb870f200,\n     0xc0007300,\n     (uint8_t *)bes2300p_patch27_ins_data_t2};\n\nconst uint32_t bes2300p_patch28_ins_data_t2[] = {\n    0xf885b2db,                                     /*7338*/\n    0xf89530bd, 0x2a0220b4,                         /*7340*/\n    0xb98bd114, 0xf8534b0a, 0xf6430024, 0xf895fd15, /*7350*/\n    0x2b0430b5, 0x4620d103, 0xf6232116, 0x4620fc61, /*7360*/\n    0xf6242116, 0xbf00f961, 0xbc6bf62d, 0xbc53f62d, /*7370*/\n    0xc0000998,                                     /*7374*/\n};\nconst BTDRV_PATCH_STRUCT\n    bes2300p_t2_ins_patch28 = // from bes2300p_t2_ibrt_ins_patch15\n    {28,\n     BTDRV_PATCH_ACT,\n     sizeof(bes2300p_patch28_ins_data_t2),\n     0x00034c14,\n     0xbb90f1d2,\n     0xc0007338,\n     (uint8_t *)bes2300p_patch28_ins_data_t2}; // no disconnect evt\n#endif                                         /* PATCH_IN_EXTRA_SPACE */\n\n/////2300p t2 patch\nstatic const uint32_t best2300p_t2_ins_patch_config[] = {\n    29,\n    (uint32_t)&bes2300p_t2_ins_patch0,\n    (uint32_t)&bes2300p_t2_ins_patch1,\n    (uint32_t)&bes2300p_t2_ins_patch2,\n    (uint32_t)&bes2300p_t2_ins_patch3,\n    (uint32_t)&bes2300p_t2_ins_patch4,\n    (uint32_t)&bes2300p_t2_ins_patch5,\n    (uint32_t)&bes2300p_t2_ins_patch6,\n    (uint32_t)&bes2300p_t2_ins_patch7,\n    (uint32_t)&bes2300p_t2_ins_patch8,\n    (uint32_t)&bes2300p_t2_ins_patch9,\n    (uint32_t)&bes2300p_t2_ins_patch10,\n    (uint32_t)&bes2300p_t2_ins_patch11,\n    (uint32_t)&bes2300p_t2_ins_patch12,\n    (uint32_t)&bes2300p_t2_ins_patch13,\n    (uint32_t)&bes2300p_t2_ins_patch14,\n    (uint32_t)&bes2300p_t2_ins_patch15,\n    (uint32_t)&bes2300p_t2_ins_patch16,\n    (uint32_t)&bes2300p_t2_ins_patch17,\n    (uint32_t)&bes2300p_t2_ins_patch18,\n    (uint32_t)&bes2300p_t2_ins_patch19,\n    (uint32_t)&bes2300p_t2_ins_patch20,\n    (uint32_t)&bes2300p_t2_ins_patch21,\n    (uint32_t)&bes2300p_t2_ins_patch22,\n    (uint32_t)&bes2300p_t2_ins_patch23,\n    (uint32_t)&bes2300p_t2_ins_patch24,\n    (uint32_t)&bes2300p_t2_ins_patch25,\n    (uint32_t)&bes2300p_t2_ins_patch26,\n    (uint32_t)&bes2300p_t2_ins_patch27,\n    (uint32_t)&bes2300p_t2_ins_patch28,\n};\n\n#else\n/***************************************************************************\n *\n * instruction patch Information\n *\n * BT ROM Chip Version:1302 T2 (CHIP ID=1)\n *\n *  IBRT function\n *\n * patch  3: 0xC0006900--->0xC0006910\n * patch  45:0xC0006930--->0xC0006940\n * patch  5: 0xC000694c--->0xC0006980\n * patch 14: 0xC000698c--->0xC00069cc\n * patch 16: 0xC0006a18--->0xC0006a28//REMOVE\n * patch 19: 0xC0006a2c--->0xC0006a9c\n * patch 20: 0xC0006aa4--->0xC0006ab0\n * patch 21: 0xC0006ab4--->0xC0006ad0\n * patch  2: 0xC0006ae8--->0xC0006b04\n * patch 22: 0xC0006b30--->0xC0006b4c\n * patch 22: 0xC0006b54--->0xC0006b7c\n * patch 29: 0xC0006ba0--->0xC0006ba8\n * patch 30: 0xC0006bac--->0xC0006bc8\n * patch 32: 0xC0006be8--->0xC0006c14\n * patch 33: 0xC0006c1c--->0xC0006c2c\n * patch 34: 0xC0006c30--->0xC0006c44\n * patch 35: 0xC0006c48--->0xC0006c84\n * patch 36: 0xC0006c88--->0xC0006c98\n * patch 37: 0xC0006ca0--->0xC0006cb8\n * patch 38: 0xC0006cc0--->0xC0006cf8\n * patch  0: 0xC0006d00--->0xC0006d0c\n * patch  1: 0xC0006d14--->0xC0006d20\n * patch 44: 0xC0006d24--->0xC0006d2c (via ble)\n * patch 40: 0xC0006d30--->0xC0006d40\n * patch 45: 0xC0006d50--->0xC0006d90\n * patch 46: 0xC0006d9c--->0xC0006dfc\n * patch 47: 0xC0006e00--->0xC0006e28\n * patch 48: 0xC0006e30--->0xC0006e98\n * patch 49: 0xC0006ec0--->0xC0006ed0\n * patch 50: 0xC0006ed8--->0xC0006f2c\n * patch 51: 0xC0006f30--->0xC0006f5c\n * patch 53: 0xC0006f74--->0xC0006f8c\n * patch 25: 0xC0006f90--->0xc0007074\n * patch 55: 0xC00070a4--->0xC00070c4\n * patch 44: 0xC00070d0--->0xC00070ec\n * sniffer_filter_tab: 0xC00070f4--->0xC0007130\n * patch  7: 0xC0007138--->0xC0007164\n * patch 23: 0xC0007180--->0xC000720c\n * patch 17: 0xC00072b4--->0xC00072ec\n * patch 13: 0xC0007300--->0xC0007330\n * patch 15: 0xC0007338--->0xC0007374\n * patch 31: 0xC000737c--->0xC0007a4\n * patch 54: 0xC00073cc--->0XC00074E4(new)\n ****************************************************************************/\n//#define ECC_LL_MONITOR\n\nconst uint32_t bes2300p_patch0_ibrt_ins_data_t2[] = {\n    /*6d00*/ 0x4673b408,\n    /*6d04*/ 0x0f20f013,\n    /*6d08*/ 0xbc08d002,\n    /*6d0c*/ 0xb9e5f600, // jump a00070da\n    /*6d10*/ 0xbf00bc08,\n    /*6d14*/ 0x4b014699,\n    /*6d18*/ 0xbaeaf600, // jump a00072f0\n    /*6d1c*/ 0xc0000050,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch0 = {\n    0,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch0_ibrt_ins_data_t2),\n    0x000072ec,\n    0xbd08f1ff, // jump a00072ec -> a0206d00\n    0xc0006d00,\n    (uint8_t *)bes2300p_patch0_ibrt_ins_data_t2}; // assert warn, assert param\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch1 = {\n    1,          BTDRV_PATCH_ACT,\n    0,          0x0001ff2c,\n    0xb81af000,        // jump a001ff2c -> a001ff64\n    0,          NULL}; // KE_MSG_HANDLER(lc_op_loc_unsniff_req)\n\n#if 0\nconst uint32_t bes2300p_patch2_ibrt_ins_data_t2[] =\n{\n    0x460a4603,/*6ae8*/\n    0x46194802,\n    0xfcb6f5fc,\n    0xbf00bd38,\n    0xc0006afc,/*6af8*/\n    0x73617243,\n    0x73252c68,\n    0x0064252c,/*6b04*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch2 =\n{\n    2,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch2_ibrt_ins_data_t2),\n    0x00007018,\n    0xbd66f1ff,\n    0xc0006ae8,\n    (uint8_t *)bes2300p_patch2_ibrt_ins_data_t2\n};//\"Crash,%s,%d\", file, line\n#elif 1\n#if 0\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch2 =\n{\n    2,\n    BTDRV_PATCH_ACT,\n    0,\n    0x00007024,\n    0xbf00e011,\n    0,\n    NULL\n};//dont call rwip_assert_err when assert error\n#else\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch2 = {\n    2,          BTDRV_PATCH_ACT,\n    0,\n    0x0002d8b0, // 0xa002d8b0\n    0xbf00bf00, 0,\n    NULL}; // ld_acl_rsw_frm_isr\n#endif\n#else\nconst uint32_t bes2300p_patch2_ibrt_ins_data_t2[] = {\n    0xfc12f631, /*7780*/\n    0xb1337843, 0x0518f100, 0xf5fb4628, 0x2813fed9,\n    0xf605d804, 0xbf00fba1, 0xba24f60c, 0xba23f60c /*77a0*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch2 = {\n    2,\n    BTDRV_PATCH_INACT,\n    sizeof(bes2300p_patch2_ibrt_ins_data_t2),\n    0x00013be4,\n    0xbdccf1f3,\n    0xc0007780,\n    (uint8_t *)bes2300p_patch2_ibrt_ins_data_t2}; // lc_afh_set use mobile afh\n#endif\n\nconst uint32_t bes2300p_patch3_ibrt_ins_data_t2[] = {\n    0xd1052800,                                     /*6900*/\n    0x000cf1aa, 0xf97af5fa, 0xbc48f61a, 0xbbd2f61a, /*6910*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch3 = {\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch3_ibrt_ins_data_t2),\n    0x000210b4,\n    0xbc24f1e5,\n    0xc0006900,\n    (uint8_t *)bes2300p_patch3_ibrt_ins_data_t2}; // lmp filter free heap\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch4 = {\n    4,   BTDRV_PATCH_ACT, 0, 0x0002be90, 0xbd702000, 0,\n    NULL}; // ld_check_if_need_protect_sniff retrun 0\n\n#if 0\nconst uint32_t bes2300p_patch5_ibrt_ins_data_t2[] =\n{\n    /*6950*/ 0x0f01f013,\n    /*6954*/ 0x4b06d00a,\n    /*6958*/ 0x104ff893,\n    /*695c*/ 0xd8052902,\n    /*6960*/ 0x2a027a9a,\n    /*6964*/ 0xbf00d802,\n    /*6968*/ 0xbc73f632,\n    /*696c*/ 0xbf00bd08,\n    /*6970*/ 0xc00063c8,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch5 =\n{\n    5,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch5_ibrt_ins_data_t2),\n    0x0003924c,\n    0xbb80f1cd, // jump a00384dc -> a0206950\n    0xc0006950,\n    (uint8_t *)bes2300p_patch5_ibrt_ins_data_t2\n}; //protect link id when send bitoffset\n\nconst uint32_t bes2300p_patch6_ibrt_ins_data_t2[] =\n{\n    /*6978*/ 0x5023f852,\n    /*697c*/ 0xd0012d00,\n    /*6980*/ 0xbc04f611,// jump a0206980 -> a001818c\n    /*6984*/ 0xbd382000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch6 =\n{\n    6,\n    BTDRV_PATCH_INACT,\n    sizeof(bes2300p_patch6_ibrt_ins_data_t2),\n    0x00018188,\n    0xbbf6f1ee, // jump a0018188 -> a0206978\n    0xc0006978,\n    (uint8_t *)bes2300p_patch6_ibrt_ins_data_t2\n};//protect null ptr when send afh\n#else\nconst uint32_t bes2300p_patch5_ibrt_ins_data_t2[] = {\n    /*694c*/ 0xf632b1c0,\n    /*6950*/ 0xb1a8fc1b,\n    /*6954*/ 0x70b2f898,\n    /*6958*/ 0xfc2af632,\n    /*695c*/ 0xd10d4287,\n    /*6960*/ 0xfbfaf634,\n    /*6964*/ 0xbf142804,\n    /*6968*/ 0x22012200,\n    /*696c*/ 0x46294640,\n    /*6970*/ 0xf6259b03,\n    /*6974*/ 0x2001fae5,\n    /*6978*/ 0xbecef625,\n    /*697c*/ 0xbc6cf625,\n    /*6980*/ 0xbcc9f625,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch5 = {\n    5,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch5_ibrt_ins_data_t2),\n    0x0002c230,\n    0xbb8cf1da, // jump a002c230 -> a020694c\n    0xc000694c,\n    (uint8_t *)bes2300p_patch5_ibrt_ins_data_t2}; // ld_cal_timestamp\n\n#if 1\nconst uint32_t bes2300p_patch6_ibrt_ins_data_t2[] = {\n    0x79ab4688, 0x6383ea6f, 0x4578f023, 0xf8d39b09,\n    0x9906308c, 0x402b440b, 0xbf004641, 0xbb87f62c,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch6 = {\n    6,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch6_ibrt_ins_data_t2),\n    0x000330f4,\n    0xbc6ef1d3, // jump a00330f4 -> a02069d4\n    0xc00069d4,\n    (uint8_t *)bes2300p_patch6_ibrt_ins_data_t2}; // sco param init\n#else\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch6 = {\n    6,          BTDRV_PATCH_ACT,\n    0,\n    0x00007010, // a0007010\n    0xb9bef000, // jump a0007390\n    0,          NULL,\n}; // DEF_IRQHandler\n#endif\n\n#endif\nconst uint32_t bes2300p_patch7_ibrt_ins_data_t2[] = {\n    /*7138*/ 0x28024604,\n    /*713c*/ 0xf89ad812,\n    /*7140*/ 0x28020046,\n    /*7144*/ 0xf610d803,\n    /*7148*/ 0x2800fb1b,\n    /*714c*/ 0x2112d106,\n    /*7150*/ 0xf61b20ff,\n    /*7154*/ 0x2000fec9,\n    /*7158*/ 0xbb0af633,\n    /*715c*/ 0xbf004620,\n    /*7160*/ 0xba4ef633,\n    /*7164*/ 0xbad8f633,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch7 = {\n    7,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch7_ibrt_ins_data_t2),\n    0x0003a5f8,\n    0xbd9ef1cc, // jump a003a5f8 -> a0207138\n    0xc0007138,\n    (uint8_t *)\n        bes2300p_patch7_ibrt_ins_data_t2}; // start simu link check linkid\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch8 = {\n    8, BTDRV_PATCH_ACT, 0, 0x0002e720, 0xf8a62308, 0, NULL,\n}; // ld_acl_start t_poll\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch9 = {\n    9, BTDRV_PATCH_ACT, 0, 0x0002d82c, 0x2b006013, 0, NULL,\n}; // ld_acl_rsw_rx\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch10 = {\n    10, BTDRV_PATCH_ACT, 0, 0x0002fe60, 0xbf00e001, 0, NULL,\n}; // ld_acl_flow_on\n\n#ifdef ECC_LL_MONITOR\n////patch 11 12 13 used for ecc count by set it to ll monitor parameter\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch11 = {\n    11, BTDRV_PATCH_ACT, 0, 0x0002dc94, 0x7000f400, 0, NULL}; ////wrong flag\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch12 = {\n    12, BTDRV_PATCH_ACT, 0, 0x0002dc98, 0x2800bf00, 0, NULL};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch13 = {\n    13, BTDRV_PATCH_ACT, 0, 0x0002f78c, 0x46288113, 0, NULL};\n#else\nconst uint32_t bes2300p_patch11_ibrt_ins_data_t2[] = {\n    0x0034f104, 0x220a4649, 0xfd86f644, 0xf632b940, 0x2801fa39, 0xf632d104,\n    0x2800fb0d, 0xbf00d104, 0x00c5f894, 0xb97cf62b, 0xb9eaf62b,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch11 = {\n    11,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch11_ibrt_ins_data_t2),\n    0x00031e70,\n    0xbe70f1d4,\n    0xc0006b54,\n    (uint8_t *)bes2300p_patch11_ibrt_ins_data_t2}; // filter afh map\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch12 = {\n    12,  BTDRV_PATCH_ACT, 0, 0x0002a41c, 0xbf000f01, 0,\n    NULL}; // mode == SYNC2_SCO_MODE\n\nconst uint32_t bes2300p_patch13_ibrt_ins_data_t2[] = {\n    0xfeecf5f8, 0xbf00bf00, 0x8310f3ef, 0x0401f013, 0xb672d108, 0xff22f5f8,\n    0xbf30b110, 0xd1ef2c00, 0xe7edb662, 0xff1af5f8, 0xd1f62800, 0xbf00e7e8,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch13 = {\n    13,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch13_ibrt_ins_data_t2),\n    0x0000721c,\n    0xb870f200,\n    0xc0007300,\n    (uint8_t *)bes2300p_patch13_ibrt_ins_data_t2};\n#endif\n\nconst uint32_t bes2300p_patch14_ibrt_ins_data_t2[] = {\n    /*698c*/ 0x4604b510,\n    /*6990*/ 0xfc0ef632,\n    /*6994*/ 0xd00542a0,\n    /*6998*/ 0x7a984b03,\n    /*699c*/ 0xbf181b00,\n    /*69a0*/ 0xbd102001,\n    /*69a4*/ 0xbd102000,\n    /*69a8*/ 0xc00063c8,\n    /*69ac*/ 0x461f7a9e,\n    /*69b0*/ 0x46104625,\n    /*69b4*/ 0xffeaf7ff,\n    /*69b8*/ 0xd1072800,\n    /*69bc*/ 0x46392004,\n    /*69c0*/ 0xfc74f634,\n    /*69c4*/ 0x462c2003,\n    /*69c8*/ 0xbd68f634,\n    /*69cc*/ 0xbf00bdf8,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch14 = {\n    14,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch14_ibrt_ins_data_t2),\n    0x0003b498,\n    0xba88f1cb, // jump a003b498 -> a02069ac\n    0xc000698c,\n    (uint8_t *)\n        bes2300p_patch14_ibrt_ins_data_t2}; // protect idx when snoop disconnect\n\n#if 0\nconst uint32_t bes2300p_patch15_ibrt_ins_data_t2[] =\n{\n    /*69D0*/ 0xbf00669a,\n    /*69D4*/ 0x66da466a,//mov   r2, sp; str   r2, [r3, #108]\n    /*69D8*/ 0x8208f3ef,//mrs   r2, MSP\n    /*69DC*/ 0xbf00671a,//str   r2, [r3, #112]\n    /*69E0*/ 0x8209f3ef,//mrs   r2, PSP\n    /*69E4*/ 0xbf00675a,//str   r2, [r3, #116]\n    /*69E8*/ 0xbf00bf00,\n    /*69EC*/ 0xbf00bf00,\n    /*69F0*/ 0xbf00bf00,\n    /*69F4*/ 0xbf00bf00,\n    /*69F8*/ 0xbf00bf00,\n    /*69FC*/ 0xbf00bf00,\n    /*6A00*/ 0xbf00bf00,\n    /*6A04*/ 0xbf00bf00,\n    /*6A08*/ 0xbf00bf00,\n    /*6A0C*/ 0xbf00bf00,\n    /*6A10*/ 0xbcb0f600,//jump a0206a10 -> a0007374\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch15 =\n{\n    15,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch15_ibrt_ins_data_t2),\n    0x00007360,\n    0xbb36f1ff, // jump a0007360 -> a02069d0\n    0xc00069d0,\n    (uint8_t *)bes2300p_patch15_ibrt_ins_data_t2\n};//bt_assert_crash_dump\n#else\n\nconst uint32_t bes2300p_patch15_ibrt_ins_data_t2[] = {\n    0xf885b2db,                                     /*7338*/\n    0xf89530bd, 0x2a0220b4, 0xb98bd114, 0xf8534b0a, /*7348*/\n    0xf6430024, 0xf895fd15, 0x2b0430b5, 0x4620d103, /*7358*/\n    0xf6232116, 0x4620fc61, 0xf6242116, 0xbf00f961, /*7368*/\n    0xbc6bf62d, 0xbc53f62d, 0xc0000998,             /*7374*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch15 = {\n    15,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch15_ibrt_ins_data_t2),\n    0x00034c14,\n    0xbb90f1d2,\n    0xc0007338,\n    (uint8_t *)bes2300p_patch15_ibrt_ins_data_t2}; // no disconnect evt\n#endif\n\nconst uint32_t bes2300p_patch16_ibrt_ins_data_t2[] = {\n    0x71ab2300, 0x0000f8d9, 0x380cb110, 0xf96cf5fa, 0xbf002300, 0xbce2f608,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch16 = {\n    16,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch16_ibrt_ins_data_t2),\n    0x0000f2f0,\n    0xbb12f1f7,\n    0xc0006918,\n    (uint8_t *)\n        bes2300p_patch16_ibrt_ins_data_t2}; // lm_page_scan_end_ind free msg\n\n#if 0\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch17 =\n{\n    17,\n    BTDRV_PATCH_ACT,\n    0,\n    0x00007010, //a0007010\n    0xb9bef000, //jump a0007390\n    0,\n    NULL,\n};//DEF_IRQHandler\n#elif 1\nconst uint32_t bes2300p_patch17_ibrt_ins_data_t2[] = {\n    0x4605b538,                                     /*72b4*/\n    0xfe76f631, 0x7a834604, 0x2f15ebb3, 0x7803d10a, /*72c4*/\n    0xd1072b02, 0xff5cf631, 0xf894b120, 0x2101004f, /*72d4*/\n    0xfc78f61d, 0xbf00bd38, 0x3312f886, 0xbf004620, /*72e4*/\n    0xffe4f7ff, 0xbcfaf614,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch17 = {\n    17,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch17_ibrt_ins_data_t2),\n    0x0001bce0,\n    0xbafef1eb,\n    0xc00072b4,\n    (uint8_t *)bes2300p_patch17_ibrt_ins_data_t2}; // send unsniff cmd\n\n#else\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch17 = {\n    17, BTDRV_PATCH_ACT, 0, 0x0002e674, 0x53faf44f, 0, NULL,\n}; // lc start lsto 5s\n#endif\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch18 = {\n    18, BTDRV_PATCH_ACT, 0, 0x0002f264, 0xbf00e001, 0, NULL,\n}; // close tx seq force set after start IBRT\n\nconst uint32_t bes2300p_patch19_ibrt_ins_data_t2[] = {\n    0xd01e0fdb, /*6a2c*/\n    0x6307f44f, 0xf304fb03, 0x48168f6a, 0x93011810, 0x49154418, 0xfe22f644,\n    0x58fb4b14, 0x4301f3c3, 0xf1028f2a, 0xf5024250, 0xf2021205, 0x8f6942fc,\n    0x0241eb02, 0x440a9901, 0x600a490d, 0xf44fe010, 0xfb036307, 0x9301f304,\n    0x18184806, 0x8f6a4906, 0xfe04f644, 0x58fb4b05, 0x4381f3c3, 0xb9a9f62e,\n    0xb9aff62e, 0xd02144fc, 0xc000593c, 0xd0220144, 0xc000005c, /*6a9c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch19 = {\n    19,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch19_ibrt_ins_data_t2),\n    0x00034d80,\n    0xbe54f1d1,\n    0xc0006a2c,\n    (uint8_t *)bes2300p_patch19_ibrt_ins_data_t2}; // ld_sco_frm_isr\n\nconst uint32_t bes2300p_patch20_ibrt_ins_data_t2[] = {\n    0xbf002004, /*6aa4*/\n    0xfb5cf634, /*6aa8*/\n    0xb8c4f618, /*6aac*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch20 = {\n    20,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch20_ibrt_ins_data_t2),\n    0x0001ec10,\n    0xbf48f1e7,\n    0xc0006aa4,\n    (uint8_t *)bes2300p_patch20_ibrt_ins_data_t2}; // ibrt sco status update\n\nconst uint32_t bes2300p_patch21_ibrt_ins_data_t2[] = {\n    0xf6414631, 0x4620fc1b, 0xf6064631, 0x4a03faaf,\n    0xf4436813, 0x60130380, 0xbdddf633, 0xd0220468,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch21 = {\n    21,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch21_ibrt_ins_data_t2),\n    0x0003a684,\n    0xba16f1cc, // jump a003a684 -> a0206ab4\n    0xc0006ab4,\n    (uint8_t *)\n        bes2300p_patch21_ibrt_ins_data_t2}; // register address at LM layer and\n                                            // open fa en register\n\n#if 0\nconst uint32_t bes2300p_patch22_ibrt_ins_data_t2[] =\n{\n    0x4681b083,/*6b30*/\n    0x4b022200,\n    0x2020f843,\n    0xbddcf623,\n    0xc0006b44,\n    0x00000000,\n    0x00000000,\n    0x00000000,/*6b4c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch22 =\n{\n    22,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch22_ibrt_ins_data_t2),\n    0x0002a6f4,\n    0xba1cf1dc,\n    0xc0006b30,\n    (uint8_t *)bes2300p_patch22_ibrt_ins_data_t2\n};//sync clear count\n#else\nconst uint32_t bes2300p_patch22_ibrt_ins_data_t2[] = {\n    0x4681b083, 0x4b042200, 0x2020f843, 0x601a4b0d,\n    0x601a4b0d, 0xb8b0f623, 0xc000759c,\n    0x00000000, // link_no_sync_count\n    0x00000000, 0x00000000,\n    0x00000018, // link_agc_thd\n    0x00000000, // rssi_store_tws\n    0x00000006, // rssi_tws_step\n    0x00000000, // rssi_store_mobile\n    0x00000006, // rssi_mobile_step\n    0x0000009c, // rssi_min_value_tws\n    0x0000009c, // rssi_min_value_mobile\n    0xc00075ac, // rssi_store_tws\n    0xc00075b4, // rssi_store_mobile\n\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch22 = {\n    22,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch22_ibrt_ins_data_t2),\n    0x0002a6f4,\n    0xbf44f1dc,\n    0xc0007580,\n    (uint8_t *)bes2300p_patch22_ibrt_ins_data_t2}; // sync clear count\n#endif\n\n#if 0\nconst uint32_t bes2300p_patch23_ibrt_ins_data_t2[] =\n{\n    0x6020f853,/*6b50*/\n    0xf8524a0d,\n    0x33013020,\n    0x3020f842,\n    0x68124a0b,\n    0xd90f4293,\n    0x4a082300,\n    0x3020f842,\n    0xb082b402,\n    0x92004a08,\n    0xf06f6a14,\n    0x46290059,\n    0x47a02201,\n    0xbc02b002,\n    0xbce4f623,\n    0xc0006b44,\n    0xc0006b94,\n    0x00000050,\n    0xc00041b4,/*6b98*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch23 =\n{\n    23,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch23_ibrt_ins_data_t2),\n    0x0002a550,\n    0xbafef1dc,\n    0xc0006b50,\n    (uint8_t *)bes2300p_patch23_ibrt_ins_data_t2\n};////swagc no sync\n#elif 0\n\nconst uint32_t bes2300p_patch23_ibrt_ins_data_t2[] = {\n    0xf6324620, 0xb480fce9, 0xfb07276e, 0x4a1ff704, 0xf837bf00, 0xf4133002,\n    0xd12b4f00, 0xf8524a17, 0x33013024, 0x3024f842, 0x68124a15, 0xd8124293,\n    0x3084f8d5, 0xf0221af2, 0xf1b14178, 0xd9066f80, 0xf0231b9b, 0x425b4378,\n    0xdc042b64, 0xf022e012, 0x2a644278, 0x2300dd0e, 0xf8424a08, 0xb0823024,\n    0x92004a09, 0xc020f8d2,\n    //    0x0036f06f,\n    0x004cf06f, 0x22014621, 0xb00247e0, 0xbf00bc80, 0xbbeff62d, 0xc0006b44,\n    0xc0007204, 0x0000003c, 0xc00041b4,\n    0xd02111f8, // 720c\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch23 = {\n    23,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch23_ibrt_ins_data_t2),\n    0x000349d4,\n    0xbbd4f1d2,\n    0xc0007180,\n    (uint8_t *)bes2300p_patch23_ibrt_ins_data_t2}; ////swagc no sync\n#else\nconst uint32_t bes2300p_patch23_ibrt_ins_data_t2[] = {\n    0xfb03236e, 0x4a3ef300, 0xf4135a9b, 0xd1764f00, 0xb082b570, 0xf8534b3b,\n    0x4a3b4020, 0x3020f852, 0xf8423301, 0x4a393020, 0x42936812, 0xf8d4d812,\n    0x1aca3084, 0x4578f022, 0x6f80f1b5, 0x1a5bd906, 0x4378f023, 0x2b64425b,\n    0xe04ddc04, 0x4278f022, 0xdd492a64, 0x681b4b2e, 0xd11d4298, 0xf9934b2d,\n    0xb93b3000, 0x30acf9b4, 0x20aef894, 0xf3f2fb93, 0x70134a28, 0x78134a27,\n    0x78094927, 0xb2db1a5b, 0x4a267013, 0xb25b7812, 0x428bb251, 0x4b21bfbc,\n    0x4b20701a, 0xe01c781e, 0xf9934b21, 0xb93b3000, 0x30acf9b4, 0x20aef894,\n    0xf3f2fb93, 0x70134a1c, 0x78134a1b, 0x7809491b, 0xb2db1a5b, 0x4a1a7013,\n    0xb25b7812, 0x428bb251, 0x4b15bfbc, 0x4b14701a, 0x4601781e, 0x4a0c2300,\n    0x3020f842, 0x92004a13, 0xb2706a15, 0x47a82201, 0x30aef894, 0xd9042b95,\n    0xf8a42300, 0xf88430ac, 0xb00230ae, 0x4770bd70, 0xd02111f8, 0xc0000998,\n    0xc000759c, 0xc00075a8, 0xc0006e2c, 0xc00075ac, 0xc00075b0, 0xc00075bc,\n    0xc00075b4, 0xc00075b8, 0xc00075c0, 0xc00041b4, 0xf6324620, 0x4620f9f7,\n    0xf7ff4631, 0xbf00ff61, 0xb931f62d};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch23 = {\n    23,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch23_ibrt_ins_data_t2),\n    0x000349d4,\n    0xbec6f1d2,\n    0xc0007634,\n    (uint8_t *)bes2300p_patch23_ibrt_ins_data_t2}; ////swagc no sync\n\n#endif\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch24 = {\n    24, BTDRV_PATCH_ACT, 0, 0x0000fe0c, 0xf029bf00, 0, NULL,\n}; // filter tws link lc_sco_ind ke message\n\nconst uint32_t bes2300p_patch25_ibrt_ins_data_t2[] = {\n    /*6f90*/ 0xbf009904,\n    /*6f94*/ 0x4b12b470,\n    /*6f98*/ 0x010e5c5a,\n    /*6f9c*/ 0x19734d11,\n    /*6fa0*/ 0x78244c11,\n    /*6fa4*/ 0xd20342a2,\n    /*6fa8*/ 0x32015498,\n    /*6fac*/ 0xe001b2d2,\n    /*6fb0*/ 0x22015570,\n    /*6fb4*/ 0x5442480a,\n    /*6fb8*/ 0x461ab14c,\n    /*6fbc*/ 0x23001919,\n    /*6fc0*/ 0x0b01f912,\n    /*6fc4*/ 0xbf004403,\n    /*6fc8*/ 0xd1f9428a,\n    /*6fcc*/ 0x2300e000,\n    /*6fd0*/ 0xf0f4fb93,\n    /*6fd4*/ 0xbc70b240,\n    /*6fd8*/ 0x22019904,\n    /*6fdc*/ 0xbb8cf628, // jump a002f6f8\n    /*6fe0*/ 0xc0006ff0, // addr of rssi_idx_for_agc\n    /*6fe4*/ 0xc0006ff4, // addr of rssi_set_for_agc\n    /*6fe8*/ 0xc0006fec, // addr of N\n    /*6fec*/ 0x00000005, // N : 1 ~ 16\n    /*6ff0*/ 0x00000000, // rssi_idx_for_agc[3]\n    /*6ff4*/ 0xbabababa, // rssi_set_for_agc[3*16]\n    /*6ff8*/ 0xbabababa,\n    /*6ffc*/ 0xbabababa,\n    /*7000*/ 0xbabababa,\n    /*7004*/ 0xbabababa,\n    /*7008*/ 0xbabababa,\n    /*700c*/ 0xbabababa,\n    /*7010*/ 0xbabababa,\n    /*7014*/ 0xbabababa,\n    /*7018*/ 0xbabababa,\n    /*701c*/ 0xbabababa,\n    /*7020*/ 0xbabababa,\n    /*7024*/ 0xbabababa,\n    /*7028*/ 0xbabababa,\n    /*702c*/ 0xbabababa,\n}; // 0xc0006f90--->0xc0007074\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch25 = {\n    25,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch25_ibrt_ins_data_t2),\n    0x0002f6f4,\n    0xbc4cf1d7, // jump a002f6f4 -> a0206f90\n    0xc0006f90,\n    (uint8_t *)bes2300p_patch25_ibrt_ins_data_t2}; // ld_acl_rx() average rssi\n\n#if 0\n//ECC patch 1\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch26 =\n{\n    26,\n    BTDRV_PATCH_ACT,\n    0,\n    0x00034790,\n    0xbf00bf00,\n    0,\n    NULL,\n};//ld_acl_sniff_frm_isr ld_get_rx_isr_counter  ignore\n#else\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch26 = {\n    26, BTDRV_PATCH_ACT, 0, 0x00029d50, 0x3300f443, 0, NULL,\n}; // bt_e_scoltcntl_retxnb_setf\n#endif\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch27 = {\n    27, BTDRV_PATCH_ACT, 0, 0x000236e0, 0xf0172004, 0, NULL,\n}; // LC_WAIT_EXCHANGE_SCO_STATUS_CFM\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch28 = {\n    28,  BTDRV_PATCH_ACT, 0, 0x00039144, 0x47702001, 0,\n    NULL}; // ld_get_sniffer_enter_sniff_flag() forece return 1\n\n#if 0\nconst uint32_t bes2300p_patch29_ibrt_ins_data_t2[] =\n{\n    /*6ba0*/ 0xbf0080c6,\n    /*6ba4*/ 0x71022200,\n    /*6ba8*/ 0xbb2af619, //jump a0020200\n};\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch29 =\n{\n    29,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch29_ibrt_ins_data_t2),\n    0x000201f8,\n    0xbcd2f1e6, //jump a00201f8 -> a0206ba0\n    0xc0006ba0,\n    (uint8_t *)bes2300p_patch29_ibrt_ins_data_t2\n};//KE_MSG_HANDLER(lc_op_loc_sniff_req, void)\n#else\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch29 = {\n    29, BTDRV_PATCH_ACT, 0, 0x00020024, 0xe00dbf00, 0, NULL,\n}; // detach directly\n#endif\n\nconst uint32_t bes2300p_patch30_ibrt_ins_data_t2[] = {\n    /*6bac*/ 0x46286825,\n    /*6bb0*/ 0x303ef895,\n    /*6bb4*/ 0xd0012b02,\n    /*6bb8*/ 0xbda2f622, // jump a0029700\n    /*6bbc*/ 0xbf002300,\n    /*6bc0*/ 0x303ef885,\n    /*6bc4*/ 0xfea6f622, // call a0029914\n    /*6bc8*/ 0xbdc1f622, // jump a002974e\n};\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch30 = {\n    30,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch30_ibrt_ins_data_t2),\n    0x000296fc,\n    0xba56f1dd, // jump a00296fc -> a0206bac\n    0xc0006bac,\n    (uint8_t *)bes2300p_patch30_ibrt_ins_data_t2}; // ld_pscan_frm_cbk\n\nconst uint32_t bes2300p_patch31_ibrt_ins_data_t2[] = {\n    0x7021f853, 0xb12fb136, 0x017ff000, 0xf8534b06, 0xb93b3021, 0x210c20ff,\n    0xfda8f61b, 0xbf002004, 0xbffcf62b, 0xbf76f62b, 0xc0005cd8,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch31 = {\n    31,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch31_ibrt_ins_data_t2),\n    0x0003328c,\n    0xb876f1d4, // jump a003328c -> a020737c\n    0xc000737c,\n    (uint8_t *)bes2300p_patch31_ibrt_ins_data_t2}; // protect null ptr when acl\n                                                   // tws switch\n\nconst uint32_t bes2300p_patch32_ibrt_ins_data_t2[] = {\n    /*6be8*/ 0x46514620,\n    /*6bec*/ 0x4b09464a,\n    /*6bf0*/ 0x3022f853,\n    /*6bf4*/ 0xd10b2901,\n    /*6bf8*/ 0x0184f103,\n    /*6bfc*/ 0xbf002206,\n    /*6c00*/ 0xfd34f644,\n    /*6c04*/ 0xbf00b920,\n    /*6c08*/ 0x0802f05f,\n    /*6c0c*/ 0xba4af641, // jump a00480a4\n    /*6c10*/ 0xbaf6f641, // jump a0048200\n    /*6c14*/ 0xc0005cd8,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch32 = {\n    32,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch32_ibrt_ins_data_t2),\n    0x00048008,\n    0xbdeef1be, // jump a0048008 -> a0206be8\n    0xc0006be8,\n    (uint8_t *)bes2300p_patch32_ibrt_ins_data_t2}; // hci_evt_filter_con_check\n\nconst uint32_t bes2300p_patch33_ibrt_ins_data_t2[] = {\n    /*6c1c*/ 0x0024f855,\n    /*6c20*/ 0xbf003038,\n    /*6c24*/ 0xfd9ef643,\n    /*6c28*/ 0x0024f855,\n    /*6c2c*/ 0xbe9ef60c,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch33 = {\n    33,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch33_ibrt_ins_data_t2),\n    0x00013968,\n    0xb958f1f3, // jump a0013968 -> a0206c1c\n    0xc0006c1c,\n    (uint8_t *)bes2300p_patch33_ibrt_ins_data_t2}; // ea_interval_remove\n\nconst uint32_t bes2300p_patch34_ibrt_ins_data_t2[] = {\n    /*6c30*/ 0xf632d108,\n    /*6c34*/ 0x2100f9e3,\n    /*6c38*/ 0xf802f634,\n    /*6c3c*/ 0xfa8cf634,\n    /*6c40*/ 0xbb8bf5fb,\n    /*6c44*/ 0xbbc3f5fb,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch34 = {\n    34,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch34_ibrt_ins_data_t2),\n    0x00002354,\n    0xbc6cf204, // jump a0002354 -> a0206c30\n    0xc0006c30,\n    (uint8_t *)\n        bes2300p_patch34_ibrt_ins_data_t2}; // close fastack when stop ibrt\n\nconst uint32_t bes2300p_patch35_ibrt_ins_data_t2[] = {\n    /*6c48*/ 0x4b0a0a02,\n    /*6c4c*/ 0x3022f853,\n    /*6c50*/ 0xb500b173,\n    /*6c54*/ 0x4601b083,\n    /*6c58*/ 0xf88d230f,\n    /*6c5c*/ 0x23133004,\n    /*6c60*/ 0x3005f88d,\n    /*6c64*/ 0xf616a801,\n    /*6c68*/ 0xb003fbc1,\n    /*6c6c*/ 0xfb04f85d,\n    /*6c70*/ 0xbf004770,\n    /*6c74*/ 0xc0005cd8,\n    /*6c78*/ 0xbf000230,\n    /*6c7c*/ 0x0001f040,\n    /*6c80*/ 0xffe2f7ff,\n    /*6c84*/ 0xbc5df634};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch35 = {\n    35,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch35_ibrt_ins_data_t2),\n    0x0003b538,\n    0xbb9ef1cb, // jump a003b538 -> a0206c78\n    0xc0006c48,\n    (uint8_t *)\n        bes2300p_patch35_ibrt_ins_data_t2}; // snoop disconnect lc_release\n\n#if 0\n//ECC patch 2\nconst uint32_t bes2300p_patch36_ibrt_ins_data_t2[] =\n{\n    /*6c88*/ 0x701c4b03,\n    /*6c8c*/ 0x78134a01,\n    /*6c90*/ 0xbcfcf62d,\n    /*6c94*/ 0xc0000971,\n    /*6c98*/ 0xc000032a,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch36 =\n{\n    36,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch36_ibrt_ins_data_t2),\n    0x00034688,\n    0xbafef1d2, // jump a0034688 -> a0206c88\n    0xc0006c88,\n    (uint8_t *)bes2300p_patch36_ibrt_ins_data_t2\n};//ld_acl_rx_isr set_ecc_recheck_link_id\n#else\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch36 = {\n    36, BTDRV_PATCH_ACT, 0, 0x0002ddc0, 0x4a07bf00, 0, NULL,\n}; // 1st ibrt ok, ignore sniffer role\n#endif\n\nconst uint32_t bes2300p_patch37_ibrt_ins_data_t2[] = {\n    0x4605b538,                                     /*6ca0*/\n    0xf643460c, 0x6a00fc79, 0xd2034285, 0x28061b40, /*6cb0*/\n    0x2402bf98, 0xb9fdf627,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch37 = {\n    37,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch37_ibrt_ins_data_t2),\n    0x0002e0b0,\n    0xbdf6f1d8,\n    0xc0006ca0,\n    (uint8_t *)bes2300p_patch37_ibrt_ins_data_t2}; // decrease retx\n\n#if 0\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch38 =\n{\n    38,\n    BTDRV_PATCH_ACT,\n    0,\n    0x00000878,\n    0x2300bf00,\n    0,\n    NULL\n};//SLEEP EN\n#else\nconst uint32_t bes2300p_patch38_ibrt_ins_data_t2[] = {\n    0x4604b510,                                     /*6cc0*/\n    0xf6104608, 0x2c03fd25, 0x2803d001, 0x200cd104, /*6cd0*/\n    0xfa4ef61c, 0xbd102001, 0xbd102000, 0xfd18f610, /*6ce0*/\n    0xf1044605, 0x46280145, 0xffe8f7ff, 0xd1012800, /*6cf0*/\n    0xbeb7f633, 0xbf19f633,                         /*6cf8*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch38 = {\n    38,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch38_ibrt_ins_data_t2),\n    0x0003aa60,\n    0xb93ef1cc, // jump a003aa60 -> a0206cc0\n    0xc0006cc0,\n    (uint8_t *)bes2300p_patch38_ibrt_ins_data_t2}; // set env\n#endif\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch39 = {\n    39,  BTDRV_PATCH_ACT, 0, 0x0003b450, 0xbf00bd08, 0,\n    NULL}; // do not send ld_sniffer_connect_sco_forward\n\nconst uint32_t bes2300p_patch40_ibrt_ins_data_t2[] = {\n    0x2a140c92, 0x2214bf28, 0xbf004691, 0xbc44f623, /*6d40*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch40 = {\n    40,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch40_ibrt_ins_data_t2),\n    0x0002a5c4,\n    0xbbb4f1dc,\n    0xc0006d30,\n    (uint8_t *)bes2300p_patch40_ibrt_ins_data_t2}; // max_drift limit\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch41 = {\n    41, BTDRV_PATCH_ACT, 0, 0x0003acd8, 0xbf00e005, 0, NULL}; /// acl tx silence\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch42 = {\n    42,  BTDRV_PATCH_ACT, 0, 0x00033668, 0xbf00e001, 0,\n    NULL}; /// do not clear acl env during sco stop\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch43 = {\n    43,  BTDRV_PATCH_ACT, 0, 0x0002a62c, 0xe001021a, 0,\n    NULL}; // rx window adjust for start ibrt\n\n#if defined(SYNC_BT_CTLR_PROFILE)\nconst uint32_t bes2300p_patch44_ibrt_ins_data_t2[] = {\n    /*6d24*/ 0xbf004628,\n    /*6d28*/ 0xfff8f633,\n    /*6d2c*/ 0xb8f7f611,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch44 = {\n    44,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch44_ibrt_ins_data_t2),\n    0x00017f10,\n    0xbf08f1ee, // jump a0017f10 -> a0206d24\n    0xc0006d24,\n    (uint8_t *)bes2300p_patch44_ibrt_ins_data_t2}; // send profile via BLE\n#else\n\nconst uint32_t bes2300p_patch44_ibrt_ins_data_t2[] = {\n    0xd8092b01,                                     /*70d0*/\n    0xfb03236e, 0x4a04f308, 0xf4135a9b, 0xd1016f00, /*70e0*/\n    0xb919f629, 0xb9aef629, 0xd0211200,             /*70ec*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch44 = {\n    44,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch44_ibrt_ins_data_t2),\n    0x00030314,\n    0xbedcf1d6,\n    0xc00070d0,\n    (uint8_t *)bes2300p_patch44_ibrt_ins_data_t2}; // lmp tx for tx desc error\n#endif\n\n#if 0\nconst uint32_t bes2300p_patch45_ibrt_ins_data_t2[] =\n{\n    0x20aef89b,/*6d50*/\n    0xd1052aa0,\n    0xf88b2200,\n    0xf8ab20ae,\n    0xe01320ac,/*6d60*/\n    0x68194b0b,\n    0xf3f1fbb2,\n    0x2313fb01,\n    0x4b07b963,/*6d70*/\n    0x00acf9bb,\n    0x6a1e9300,\n    0xfb90bf00,\n    0x9904f0f2,/*6d80*/\n    0x2201b240,\n    0x47b02300,\n    0xbcb6f628,\n    0xc00041b4,/*6d90*/\n    0xc0006d98,\n    0x0000000a,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch45 =\n{\n    45,\n    BTDRV_PATCH_INACT,\n    sizeof(bes2300p_patch45_ibrt_ins_data_t2),\n    0x0002f6ec,\n    0xbb30f1d7,\n    0xc0006d50,\n    (uint8_t *)bes2300p_patch45_ibrt_ins_data_t2\n};//RSSI AVERAGE 10\n#else\nconst uint32_t bes2300p_patch45_ibrt_ins_data_t2[] = {\n    0x4a033304,                                     /*6930*/\n    0xbf008153, 0x12c4f640, 0xb9bdf632, 0xc00061b8, /*6940*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch45 = {\n    45,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch45_ibrt_ins_data_t2),\n    0x00038cb0,\n    0xbe3ef1cd,\n    0xc0006930,\n    (uint8_t *)bes2300p_patch45_ibrt_ins_data_t2}; // pscan duration\n#endif\n\nconst uint32_t bes2300p_patch46_ibrt_ins_data_t2[] = {\n    /*6d9c*/ 0x4b179a0b,\n    /*6da0*/ 0xd023429a,\n    /*6da4*/ 0x20b5f894,\n    /*6da8*/ 0xb9fab2d2,\n    /*6dac*/ 0xf9b4b22e,\n    /*6db0*/ 0x1b9b3098,\n    /*6db4*/ 0xf9b24a0f,\n    /*6db8*/ 0x42932000,\n    /*6dbc*/ 0x4251da05,\n    /*6dc0*/ 0xdd02428b,\n    /*6dc4*/ 0x7088f8d4,\n    /*6dc8*/ 0x4293e00f,\n    /*6dcc*/ 0xf8d4dd05,\n    /*6dd0*/ 0x3f017088,\n    /*6dd4*/ 0x4778f027,\n    /*6dd8*/ 0x4252e007,\n    /*6ddc*/ 0xda044293,\n    /*6de0*/ 0x7088f8d4,\n    /*6de4*/ 0xf0273701,\n    /*6de8*/ 0xbf004778,\n    /*6dec*/ 0x708cf8c4,\n    /*6df0*/ 0xbce4f623, // jump a002a7bc\n    /*6df4*/ 0xc0006df8,\n    /*6df8*/ 0x00000032, // 50\n    /*6dfc*/ 0xa003477b, // ld_acl_sniff_frm_isr lr\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch46 = {\n    46,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch46_ibrt_ins_data_t2),\n    0x0002a7b8,\n    0xbaf0f1dc, // jump a002a7b8 -> a0206d9c\n    0xc0006d9c,\n    (uint8_t *)bes2300p_patch46_ibrt_ins_data_t2}; // ld_acl_rx_sync clk_off cal\n                                                   // active mode\n\nconst uint32_t bes2300p_patch47_ibrt_ins_data_t2[] = {\n    0xd10b2800,                                     /*6e00*/\n    0x0f00f1ba, 0x4a07d10a, 0x2aff7812, 0x4615d006, /*6e10*/\n    0x30b2f894, 0xd10342ab, 0xb8aff625, 0xb974f625, /*6e20*/\n    0xb952f625, 0xc0006e2c, 0x000000ff,             /*6e28*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch47 = {\n    47,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch47_ibrt_ins_data_t2),\n    0x0002bf78,\n    0xbf42f1da,\n    0xc0006e00,\n    (uint8_t *)bes2300p_patch47_ibrt_ins_data_t2}; /// adjust slot share for tws\n                                                   /// without ibrt\n\nconst uint32_t bes2300p_patch48_ibrt_ins_data_t2[] = {\n    0x781b4b13, 0xd0212bff, 0x4604b510, 0xf946f632, 0x4b0fb1d8, 0x4b0f781a,\n    0x3022f853, 0x0f28f113, 0xf893d013, 0xeb0330c1, 0xb2db0342, 0x0383eb03,\n    0x4a09005b, 0xf3c35a9b, 0x2b5303c9, 0x7ea2d905, 0x441368e3, 0x4378f023,\n    0xbd1060e3, 0xbf004770, 0xc0006e2c, 0xc0000998, 0xd0211632, 0x0028f104,\n    0xffcef7ff, 0x60a36b63, 0xb9fcf627,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch48 = {\n    48,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch48_ibrt_ins_data_t2),\n    0x0002e290,\n    0xbdfcf1d8,\n    0xc0006e30,\n    (uint8_t *)bes2300p_patch48_ibrt_ins_data_t2}; // big packet send in sco v1\n\nconst uint32_t bes2300p_patch49_ibrt_ins_data_t2[] = {\n    /*6ec0*/ 0xf6232100,\n    /*6ec4*/ 0xf643feaf,\n    /*6ec8*/ 0x2300fb69,\n    /*6ecc*/ 0xbf006243,\n    /*6ed0*/ 0xbcf4f626,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch49 = {\n    49,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch49_ibrt_ins_data_t2),\n    0x0002d88c,\n    0xbb18f1d9, // jump a0018188 -> a0206978\n    0xc0006ec0,\n    (uint8_t *)\n        bes2300p_patch49_ibrt_ins_data_t2}; /// role switch fail to disconnect\n\n#if 0\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch50 =\n{\n    50,\n    BTDRV_PATCH_INACT,\n    0,\n    0x0003ea94,\n    0xbf00e04a,\n    0,\n    NULL\n};//ble channel map disable\n#elif 0\nconst uint32_t bes2300p_patch50_ibrt_ins_data_t2[] = {\n    0xf8948263, 0xbf0030b3, 0xbf00bf00, 0xbf00bf00, 0xbf002304, 0xb8b8f625,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch50 = {\n    50,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch50_ibrt_ins_data_t2),\n    0x0002c024,\n    0xbf3cf1da,\n    0xc0006ea0,\n    (uint8_t *)bes2300p_patch50_ibrt_ins_data_t2};\n#else\nconst uint32_t bes2300p_patch50_ibrt_ins_data_t2[] = {\n    0x75a32312,                                     /*6ed8*/\n    0x001bf898, 0x1088f8d1, 0x300cf8d8, 0xf023440b, /*6ee8*/\n    0xea834378, 0xf8986380, 0x1a5b1019, 0x101af898, /*6ef8*/\n    0xf3f1fbb3, 0xfbb3b2db, 0xfb02f1f2, 0x1ad23311, /*6f08*/\n    0xf894b2d6, 0xb91330b3, 0xf8842301, 0xf5fc30bb, /*6f18*/\n    0xf890fa05, 0xf5c33025, 0x3304631c, 0x23048263, /*6f28*/\n    0xb87cf625,                                     /*6f2c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch50 = {\n    50,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch50_ibrt_ins_data_t2),\n    0x0002bfc4,\n    0xbf88f1da,\n    0xc0006ed8,\n    (uint8_t *)\n        bes2300p_patch50_ibrt_ins_data_t2}; ////ibrt connect slot adjust in sco\n#endif\n\nconst uint32_t bes2300p_patch51_ibrt_ins_data_t2[] = {\n    0x490a60e3,                                     /*6f30*/\n    0x428f6809, 0x4620d10c, 0x22002100, 0xf914f625, /*6f40*/\n    0x429d68a3, 0x60a5bf38, 0x134cf640, 0x3012f8a4, /*6f50*/\n    0xbf004620, 0xbc20f624, 0xc0006e2c,             /*6f5c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch51 = {\n    51,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch51_ibrt_ins_data_t2),\n    0x0002b798,\n    0xbbcaf1db,\n    0xc0006f30,\n    (uint8_t *)bes2300p_patch51_ibrt_ins_data_t2}; // sniff trans mode timing\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch52 = {\n    52,         BTDRV_PATCH_ACT,\n    0,          0x0001bf54,\n    0xbff2f7ff,        // jump a001bf54 -> a001bf3c\n    0,          NULL}; // LMP_MSG_HANDLER(switch_req) LC_CONNECTED\n\nconst uint32_t bes2300p_patch53_ibrt_ins_data_t2[] = {\n    /*6f74*/ 0xf632b140,\n    /*6f78*/ 0x42b0f841,\n    /*6f7c*/ 0xf632d104,\n    /*6f80*/ 0x2801f82b,\n    /*6f84*/ 0xbf00d002,\n    /*6f88*/ 0xbea8f619,\n    /*6f8c*/ 0xbf08f619,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch53 = {\n    53,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch53_ibrt_ins_data_t2),\n    0x00020cd8,\n    0xb94cf1e6, // jump a0020cd8 -> a0206f74\n    0xc0006f74,\n    (uint8_t *)bes2300p_patch53_ibrt_ins_data_t2}; // disconnect cmp\n\n#if 0\nconst uint32_t bes2300p_patch54_ibrt_ins_data_t2[] =\n{\n    0xb3384606,/*6f90*/\n    0x0a0388a0,\n    0xd1212b05,\n    0xf1034b14,\n    0xb2c10528,/*6fa0*/\n    0xe044f8df,\n    0x428a781a,\n    0x785ad114,\n    0x0f01f012,/*6fb0*/\n    0x88e7d006,\n    0x2f020a3f,\n    0xf85ed814,\n    0xb18f7027,/*6fc0*/\n    0x0f02f012,\n    0x8922d006,\n    0x2a020a12,\n    0xf85ed80a,/*6fe0*/\n    0xb13a2022,\n    0x42ab3302,\n    0xbf00d1e4,\n    0xb8e5f5fa,/*6ff0*/\n    0xb8dcf5fa,\n    0xb8ecf5fa,\n    0xc0005cd8,\n    0xc0006ff4,/*7000*/\n    0x0327032a,\n    0x010e0326,\n    0x0000010f,\n    0x00000000,/*7010*/\n    0x00000000,\n    0x00000000,\n    0x00000000,\n    0x00000000,/*7020*/\n    0x00000000,\n    0x00000000,/*7024*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch54 =\n{\n    54,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch54_ibrt_ins_data_t2),\n    0x0000119c,\n    0xbef8f205,\n    0xc0006f90,\n    (uint8_t *)bes2300p_patch54_ibrt_ins_data_t2\n};//msg filter\n#else\nconst uint32_t bes2300p_patch54_ibrt_ins_data_t2[] = {\n    0x8885b5f8, // 73cc\n    0x2b050a2b, 0x4b49d121, 0x0428f103, 0x4f48b2e9, 0x428a781a, 0x785ad116,\n    0x0f01f012, 0x88c6d007, 0x2e020a36, 0xf857d86b, 0x2e006026, 0xf012d069,\n    0xd0070f02, 0x0a128902, 0xd8642a02, 0x2022f857, 0xd0622a00, 0x42a33302,\n    0xf240d1e2, 0x429d5335, 0x4605d15d, 0x08637b44, 0xd1142b04, 0xf5f988c0,\n    0x2832ffb5, 0xf240d155, 0x88e95006, 0xfb2ef5f9, 0x0a0288e8, 0xf8534b2e,\n    0xf8933022, 0xf5f9135e, 0x2401ff39, 0x2b18e050, 0x88c0d126, 0xff9ef5f9,\n    0xd1402836, 0x02fef004, 0x0a3688ee, 0xf8534b24, 0xf8844026, 0xb2f62044,\n    0x21184630, 0xff1cf61c, 0x4040f894, 0xd1302c01, 0xf6294630, 0x88e8fa29,\n    0xf800f60f, 0x0a0288e8, 0xf8534b19, 0xf8933022, 0xf5f9135e, 0xe027ff0f,\n    0xd1202b7e, 0x3b097b83, 0x2b01b2db, 0xf631d81d, 0x7a83fd77, 0xd81a2b02,\n    0xf8524a0f, 0xfab44023, 0x0964f484, 0x2401e014, 0x2401e012, 0x2401e010,\n    0x2401e00e, 0x2400e00c, 0x2400e00a, 0x2400e008, 0x2401e006, 0x2400e004,\n    0x2400e002, 0x2401e000, 0xbdf84620, 0xa0207520, 0xc0005cd8, 0xb1484606,\n    0xf7ff4620, 0x2801ff5f, 0xbf00d102, 0xbe56f5f9, 0xbe49f5f9, 0xbe40f5f9,\n    0x0327032a, 0x010e0326, 0x0000010f, 0x00000000, 0x00000000, 0x00000000,\n    0x00000000, 0x00000000, 0x00000000, 0x00000000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch54 = {\n    54,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch54_ibrt_ins_data_t2),\n    0x0000119c,\n    0xb9b2f206,\n    0xc00073cc,\n    (uint8_t *)bes2300p_patch54_ibrt_ins_data_t2}; // msg filter\n\n#endif\n\nconst uint32_t bes2300p_patch55_ibrt_ins_data_t2[] = {\n    0x49079804,                                     /*70a4*/\n    0x42886809, 0xf632d103, 0x2800f86b, 0x3301d004, /*70b4*/\n    0xf88bb2db, 0xbf0030bb, 0xbaf4f628, 0xc0006e2c, /*70c4*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ibrt_ins_patch55 = {\n    55,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_patch55_ibrt_ins_data_t2),\n    0x0002f6a4,\n    0xbcfef1d7,\n    0xc00070a4,\n    (uint8_t *)bes2300p_patch55_ibrt_ins_data_t2}; // tws link dont rx traffic++\n\n/////2300p t2 ibrt patch (chip id =1)\nstatic const uint32_t best2300p_t2_ibrt_ins_patch_config[] = {\n    56,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch0,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch1,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch2,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch3,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch4,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch5,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch6,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch7,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch8,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch9,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch10,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch11,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch12,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch13,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch14,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch15,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch16,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch17,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch18,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch19,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch20,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch21,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch22,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch23,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch24,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch25,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch26,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch27,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch28,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch29,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch30,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch31,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch32,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch33,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch34,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch35,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch36,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch37,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch38,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch39,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch40,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch41,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch42,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch43,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch44,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch45,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch46,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch47,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch48,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch49,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch50,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch51,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch52,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch53,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch54,\n    (uint32_t)&bes2300p_t2_ibrt_ins_patch55,\n};\n#endif\n/***************************************************************************\n *\n * instruction patch Information\n *\n * BT ROM Chip Version:1302 T1\n *\n * [IBRT]\n * patch  7: 0xC0006a50--->0xC0006a78\n * patch  8: 0xC0006a90--->0xC0006a9C\n * patch  9: in used   check ble conflict with acl\n * patch 10: 0xC0006AA0--->0xC0006AC8\n * patch 11: 0xC0006AD0--->0xC0006AEC\n * patch 12: 0xC0006AF0--->0xC0006B04\n * patch 13: 0xC0006B08--->0xC0006B18\n * patch 14: in use\n * patch 15: 0xC0006B74--->0xC0006B80\n * patch 16: in used :check afh mismatch 1\n * patch 17: in used :check afh mismatch 2\n * patch 18: 0xC0006B88--->0xC006C14    fix acl interval in sco\n * patch 19: in used\n * patch 20: in used\n * patch 21: 0xC0006C78--->0xC0006C88\n * patch 22: 0xC0006810--->0xC0006878\n * patch 23: 0xC0006880--->0xC0006890\n * patch 24: 0xC0006C90--->0xC000689C\n * patch 25: in used:ld_acl_start t_poll\n * patch 26: 0xC0006CA0--->0xC0006CC8:  unused\n * patch 27: in used: ld_sniffer_update_status: SNIFFER_EVT_SCO_CONNECTED\n * patch 28: in used: 0xC0006CF8--->0xC0006D0C\n * patch 29: in used: 0xC0006D14--->0xC0006D30\n ****************************************************************************/\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch0 = {\n    0,   BTDRV_PATCH_ACT, 0, 0x00025ef4, 0xbf00bf00, 0,\n    NULL}; /// remove the memset of ldenv\n\nconst uint32_t bes2300p_t1_patch_0a_ins_data[] = {\n    /*6810*/ 0x681b4b0e,\n    /*6814*/ 0x4b0eb1ab,\n    /*6818*/ 0x31cbf893,\n    /*681c*/ 0x4a0d011b,\n    /*6820*/ 0xf3c35a9b,\n    /*6824*/ 0x4a0c2340,\n    /*6828*/ 0x2a025c12,\n    /*682c*/ 0x4a0ad103,\n    /*6830*/ 0x20005413,\n    /*6834*/ 0x42934770,\n    /*6838*/ 0x4a07d005,\n    /*683c*/ 0x20005413,\n    /*6840*/ 0x20004770,\n    /*6844*/ 0x20014770,\n    /*6848*/ 0xbf004770,\n    /*684c*/ 0xc000685c,\n    /*6850*/ 0xc0005d34,\n    /*6854*/ 0xd02115f2,\n    /*6858*/ 0xc0006860,\n    /*685c*/ 0x00000001, // sw_seqn_filter_en\n    /*6860*/ 0x00020202, // link_id_seq\n    /*6864*/ 0x9805bf00,\n    /*6868*/ 0xffd2f7ff, // call a0206810\n    /*686c*/ 0x2019b910,\n    /*6870*/ 0xbd62f628, // jump a002f338\n    /*6874*/ 0x22802107,\n    /*6878*/ 0xbe22f628, // jump a002f4c0\n};                       // ld_acl_rx ld_sw_seqn_filter\n\nconst uint32_t bes2300p_t1_patch_0b_ins_data[] = {\n    /*6880*/ 0x328af885,\n    /*6884*/ 0x22024b02,\n    /*6888*/ 0xbf00559a,\n    /*688c*/ 0xbe90f614, // jump a001b5b0\n    /*6890*/ 0xc0006860, // link_id_seq\n};                       // lc_rsw_end_ind link_id_seq[link_id]=2\n\nconst uint32_t bes2300p_t1_patch_1_ins_data[] = {\n    0x2c021b64, 0x2009d101, 0x3402e002, 0xbc4af63c, 0xbca6f63c,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch1 = {\n    1,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_1_ins_data),\n    0x000431a0,\n    0xbbaef1c3,\n    0xc0006900,\n    (uint8_t *)bes2300p_t1_patch_1_ins_data}; // for ble and sco:\n                                              // OVERLAP_RESERVE2 in\n                                              // lld_check_conflict_with_ble\n\nconst uint32_t bes2300p_t1_patch_2_ins_data[] = {\n    0x781b4b05, 0xd1032b09, 0x4b032200, 0x2704701a, 0x60eb1be3, 0xb8ecf627,\n    0xc000693c, ////prev_conflict_type_record\n    0x00000000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch2 = {\n    2,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_2_ins_data),\n    0x0002db0c,\n    0xbf08f1d8,\n    0xc0006920,\n    (uint8_t *)bes2300p_t1_patch_2_ins_data}; // for ble and sco:\n                                              // prev_conflict_type_record in\n                                              // ld_sco_avoid_ble_connect\n\nconst uint32_t bes2300p_t1_patch_3_ins_data[] = {\n    0xd1084298, 0x3047f894, 0x92004a0e, 0x22024631, 0xfd42f61f, 0x4b0ce014,\n    0xb143781b, 0x3047f894, 0x92004a08, 0x22024631, 0xfd36f61f, 0xf894e008,\n    0x4a043047, 0x46319200, 0xbf002204, 0xfd2cf61f, 0xbaa2f62b, 0xa002fce5,\n    0xc000699c, /// ble_sco_need_move_flag\n    0x00000000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch3 = {\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_3_ins_data),\n    0x00031ec4,\n    0xbd44f1d4,\n    0xc0006950,\n    (uint8_t *)bes2300p_t1_patch_3_ins_data}; // for ble and sco:\n                                              // ld_fm_prog_push\n                                              // LD_FRAME_TYPE_ESCO when\n                                              // ble_sco_need_move_flag in\n                                              // ld_sco_evt_start_cbk\n\nconst uint32_t bes2300p_t1_patch_4_ins_data[] = {\n    0x781b4b18, 0x2200b113, 0x701a4b16, 0x781b4b18, 0xd0232b00,\n    0x4b162201, 0xbf00701a, 0xb1e84680, 0x781b4b11, 0xd1192b00,\n    0x0304f1a8, 0x2b01b2db, 0xf1b8d903, 0xd1130f09, 0x2201e00c,\n    0x701a4b09, 0x0f09f1b8, 0x2209d103, 0x701a4b08, 0x68eb2704,\n    0xb8a6f627, 0x4b032201, 0xe7f4701a, 0xb8c2f627, 0xb8aff627,\n    0xc000699c, /// ble_sco_need_move_flag\n    0xc000099f,\n    0xc000693c, /// prev_conflict_type_record\n    0xc0006a18, /// sco_find_sync_flag\n    0x00000000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch4 = {\n    4,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_4_ins_data),\n    0x0002db30,\n    0xbf38f1d8,\n    0xc00069a4,\n    (uint8_t *)bes2300p_t1_patch_4_ins_data}; // for ble and sco:\n                                              // ble_sco_need_move_flag =\n                                              // 1,need_move=4 in\n                                              // ld_sco_avoid_ble_connect\n\nconst uint32_t bes2300p_t1_patch_5_ins_data[] = {\n    0xfbb24a02,\n    0xf5f9f3f3,\n    0xbf00bec6,\n    0x9af8da00,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch5 = {\n    5,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_5_ins_data),\n    0x00000650,\n    0xb936f206,\n    0xc00068c0,\n    (uint8_t *)bes2300p_t1_patch_5_ins_data}; // lpclk\n\nconst uint32_t bes2300p_t1_patch_6_ins_data[] = {\n    0xd00d2b00, 0xf8384b07, 0xf4133003, 0xd0024f00, 0x4b052201,\n    0xf899701a, 0x2b0130b3, 0xba5af629, 0xbaccf629, 0xd02111f8,\n    0xc0006a18, ////sco_find_sync_flag\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch6 = {\n    6,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_6_ins_data),\n    0x0002feec,\n    0xbd98f1d6,\n    0xc0006a20,\n    (uint8_t *)bes2300p_t1_patch_6_ins_data}; /// for ble and sco:\n                                              /// sco_find_sync_flag = 1 in\n                                              /// ld_sco_frm_isr\n\nconst uint32_t bes2300p_t1_patch_7_ins_data[] = {\n    0xd10f2f03, 0xfd16f642, 0x4008f8d8, 0x46216940, 0xf6242220, 0xb128fff5,\n    0x0320f104, 0x4378f023, 0x3008f8c8, 0xbf002000, 0xbc7df625,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch7 = {\n    7,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_7_ins_data),\n    0x0002c32c,\n    0xbb90f1da,\n    0xc0006A50,\n    (uint8_t *)bes2300p_t1_patch_7_ins_data}; // ble avoid role switch\n\nconst uint32_t bes2300p_t1_patch_8_ins_data[] = {\n    0xf855b2e6,\n    0xb1091b04,\n    0xbc71f610,\n    0xbc78f610,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch8 = {\n    8,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_8_ins_data),\n    0x00017378,\n    0xbb8af1ef,\n    0xc0006A90,\n    (uint8_t *)bes2300p_t1_patch_8_ins_data}; // lc_check_bt_device_conected\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch9 = {\n    9,   BTDRV_PATCH_ACT, 0, 0x00043238, 0xbf342c09, 0,\n    NULL}; // check conflict 8 slot 1\n\nconst uint32_t bes2300p_t1_patch_10_ins_data[] = {\n    0xf8934b07, 0x98053078, 0xd1074298, 0xd0052b03, 0x681b4b04, 0x2201b913,\n    0x601a4b02, 0xbc3ff628, 0xc0006358, 0xc0006AC8, 0x00000000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch10 = {\n    10,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_10_ins_data),\n    0x0002f338,\n    0xbbb2f1d7,\n    0xc0006AA0,\n    (uint8_t *)bes2300p_t1_patch_10_ins_data}; // ibrt snoop success\n\nconst uint32_t bes2300p_t1_patch_11_ins_data[] = {\n    0xb149d208, 0x681b4b05, 0x2200b133, 0x601a4b03,\n    0xbce4f632, 0xbcf2f632, 0xbcfff632, 0xc0006AC8,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch11 = {\n    11,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_11_ins_data),\n    0x000394a8,\n    0xbb12f1cd,\n    0xc0006AD0,\n    (uint8_t *)bes2300p_t1_patch_11_ins_data}; // ibrt snoop success 2\n\nconst uint32_t bes2300p_t1_patch_12_ins_data[] = {\n    0x46032102, 0xf9b4f633, 0xbf004618, 0x22012105, 0xfa28f61d, 0xba4ff633,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch12 = {\n    12,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_12_ins_data),\n    0x00039fa0,\n    0xbda6f1cc,\n    0xc0006AF0,\n    (uint8_t *)bes2300p_t1_patch_12_ins_data}; // hack tws switch tx seqn error\n\nconst uint32_t bes2300p_t1_patch_13_ins_data[] = {\n    0xfc6ef631, 0xfcbaf631, 0xbf004620, 0xfcc2f631, 0xbfb2f62a,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch13 = {\n    13,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_13_ins_data),\n    0x00031a7c,\n    0xb844f1d5,\n    0xc0006B08,\n    (uint8_t *)bes2300p_t1_patch_13_ins_data}; // lmp filter enable\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch14 = {\n    14, BTDRV_PATCH_ACT, 0, 0x000388a8, 0xbf00e001, 0, NULL}; // open afh update\n\nconst uint32_t bes2300p_t1_patch_15_ins_data[] = {\n    0xfbd0f631,\n    0x20004601,\n    0xfbb8f633,\n    0xba9ef618,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch15 = {\n    15,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_15_ins_data),\n    0x0001f0bc,\n    0xbd5af1e7,\n    0xc0006B74,\n    (uint8_t *)bes2300p_t1_patch_15_ins_data}; // ibrt slave stop sco\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch16 = {\n    16,\n#if defined(IBRT)\n    BTDRV_PATCH_ACT,\n#else\n    BTDRV_PATCH_INACT,\n#endif\n    0,\n    0x00038a78,\n    0x7a22d206,\n    0,\n    NULL,\n}; // check afh mismatch 1\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch17 = {\n    17,\n#if defined(IBRT)\n    BTDRV_PATCH_ACT,\n#else\n    BTDRV_PATCH_INACT,\n#endif\n    0,\n    0x00038a88,\n    0xbf00e00e,\n    0,\n    NULL,\n}; // check afh mismatch 2\n\nconst uint32_t bes2300p_t1_patch_18_ins_data[] = {\n    0x4606b570, 0x7e8d460c, 0xf5f5fb92, 0x2114b2e8, 0x68e175b1, 0xf023440b,\n    0x7ee14378, 0x6381ea83, 0x1a5b7e61, 0xfbb37ea1, 0xb2dbf3f1, 0xf1f0fbb3,\n    0x3311fb00, 0xb2c31ac0, 0xd8042a3c, 0x622ef640, 0x22048272, 0xf640e003,\n    0x8272124c, 0x7ea02206, 0xfb0068e1, 0x44101003, 0x4078f020, 0x210060b0,\n    0xfab4f63c, 0xd9072806, 0xb2ed7ea3, 0xfb0568b2, 0xf0252503, 0x60b54578,\n    0xbf00bd70, 0x46514620, 0x2042f8b8, 0x3088f8d3, 0xffbaf7ff, 0xbfcbf624,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch18 = {\n    18,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_18_ins_data),\n    0x0002bad8,\n    0xb894f1db, // jump a002bad8 -> A0206C04\n    0xc0006B88,\n    (uint8_t *)bes2300p_t1_patch_18_ins_data};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch19 = {\n    19, BTDRV_PATCH_ACT, 0, 0x00039d78, 0xd13b2902, 0, NULL}; // ibrt switch op\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch20 = {\n    20, BTDRV_PATCH_ACT, 0, 0x00030240, 0xe0022000, 0, NULL}; // acl end assert\n\nconst uint32_t bes2300p_t1_patch_21_ins_data[] = {\n    0x781b4b03, 0xd1012b01, 0xbc5cf633, 0xbc63f633, 0xc0006358,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch21 = {\n    21,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_21_ins_data),\n    0x0003a528,\n    0xbba6f1cc,\n    0xc0006C78,\n    (uint8_t *)bes2300p_t1_patch_21_ins_data}; // snoop disconnect\n\n// __SW_SEQ_FILTER__ - add software seqn filter to protect recive identical\n// repeating packages\n#if defined(IBRT)\n#define __SW_SEQ_FILTER__\n#endif\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch22 = {\n    22,\n#ifdef __SW_SEQ_FILTER__\n    BTDRV_PATCH_INACT,\n#else\n    BTDRV_PATCH_INACT,\n#endif\n    sizeof(bes2300p_t1_patch_0a_ins_data),\n    0x0002f334,\n    0xba96f1d7, // jump a002f334 -> a0206864\n    0xc0006810,\n    (uint8_t *)bes2300p_t1_patch_0a_ins_data};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch23 = {\n    23,\n#ifdef __SW_SEQ_FILTER__\n    BTDRV_PATCH_INACT,\n#else\n    BTDRV_PATCH_INACT,\n#endif\n    sizeof(bes2300p_t1_patch_0b_ins_data),\n    0x0001b5ac,\n    0xb968f1eb, // jump a001b5ac -> a0206880\n    0xc0006880,\n    (uint8_t *)\n        bes2300p_t1_patch_0b_ins_data}; // lc_rsw_end_ind link_id_seq[link_id]=2\n\nconst uint32_t bes2300p_t1_patch_24_ins_data[] = {\n    0x0f01f1b8,\n    0x380ebf0c,\n    0xb280301c,\n    0xbb30f632,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch24 = {\n    24,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_24_ins_data),\n    0x000392d8,\n    0xbcdaf1cd,\n    0xc0006c90,\n    (uint8_t *)bes2300p_t1_patch_24_ins_data}; // start snoop using bitoff\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch25 = {\n    25,\n#if defined(IBRT)\n    BTDRV_PATCH_ACT,\n#else\n    BTDRV_PATCH_INACT,\n#endif\n    0,\n    0x0002e09c,\n    0xf8a6230a,\n    0,\n    NULL,\n}; // ld_acl_start t_poll\n\nconst uint32_t bes2300p_t1_patch_26_ins_data[] = {\n    0x5040f898, 0xd80d2d14, 0xfbecf642, 0x690068a6, 0xb2ea4631, 0xfeccf624,\n    0xf106b120, 0xf0230364, 0x60a34378, 0xfbdef642, 0xbfb2f624,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch26 = {\n    26,\n    BTDRV_PATCH_INACT,\n    sizeof(bes2300p_t1_patch_26_ins_data),\n    0x0002bc2c,\n    0xb838f1db,\n    0xc0006CA0,\n    (uint8_t *)bes2300p_t1_patch_26_ins_data}; // mobile link avoid tws link\n                                               // when send profile\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch27 = {\n    27, BTDRV_PATCH_ACT, 0, 0x0003890c, 0xbf00e008, 0, NULL,\n}; // ld_sniffer_update_status: SNIFFER_EVT_SCO_CONNECTED\n\nconst uint32_t bes2300p_t1_patch_28_ins_data[] = {\n    0xfa58f63f, 0x4b034a02, 0xbf00601a, 0xbb66f63f, 0xffff0009, 0xd03300f0,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch28 = {\n    28,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_28_ins_data),\n    0x000463d0,\n    0xbc92f1c0,\n    0xc0006CF8,\n    (uint8_t *)bes2300p_t1_patch_28_ins_data}; // lld_evt_end_isr:SYS 2M\n\nconst uint32_t bes2300p_t1_patch_29_ins_data[] = {\n    0x681b4b0a, 0x0301f033, 0xbf00d106, 0x4b044a03, 0x4a04601a, 0x601a4b04,\n    0xbc96f63d, 0x04007107, 0xD0220000, 0xffff0008, 0xd03300f0, 0xd0220054,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch29 = {\n    29,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_29_ins_data),\n    0x00044658,\n    0xbb5cf1c2,\n    0xc0006d14,\n    (uint8_t *)bes2300p_t1_patch_29_ins_data}; // lld_evt_schedule:SYS 1M\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch30 = {\n    30, BTDRV_PATCH_ACT, 0, 0x00029e70, 0xbf8c7fb9, 0, NULL,\n}; // ld_acl_rx_sync2\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch31 = {\n    31, BTDRV_PATCH_ACT, 0, 0x0002a068, 0xbf947fb9, 0, NULL,\n}; // ld_acl_rx_no_sync\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch32 = {\n    32, BTDRV_PATCH_ACT, 0, 0x0002a1b0, 0x7fb9f5b3, 0, NULL,\n}; // ld_acl_rx_sync\n\nconst uint32_t bes2300p_t1_patch_33_ins_data[] = {\n    0xfdf6f624, 0x4638b920, 0xf63c2100, 0xb108fa01, 0xbf2bf628, 0xbf3df628,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch33 = {\n    33,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_patch_33_ins_data),\n    0x0002fba8,\n    0xb8ccf1d7,\n    0xc0006d44,\n    (uint8_t *)bes2300p_t1_patch_33_ins_data}; // protect ble 8 slot\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch34 = {\n    34, BTDRV_PATCH_ACT, 0, 0x00043248, 0xbf8c2c08, 0, NULL,\n}; // check conflict 8 slot 2\n\nconst uint32_t bes2300p_t1_patch_35_ins_data[] = {\n    /*6d54*/ 0xf8534b02,\n    /*6d58*/ 0xb11b3020,\n    /*6d5c*/ 0xbafdf610,\n    /*6d60*/ 0xc0005c70,\n    /*6d64*/ 0x47702000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch35 = {\n    35,\n    BTDRV_PATCH_INACT,\n    sizeof(bes2300p_t1_patch_35_ins_data),\n    0x00017354,\n    0xbcfef1ef,\n    0xc0006d54,\n    (uint8_t *)bes2300p_t1_patch_35_ins_data}; // is_in_sniff_mode use NULL ptr\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch36 = {\n    36, BTDRV_PATCH_INACT, 0, 0x00039b58, 0xf2002802, 0, NULL,\n}; // ld_sniffer_start_monitored_link(link_id >= MAX_NB_ACTIVE_ACL)\n\n/////2300p t1 patch\nstatic const uint32_t best2300p_t1_ins_patch_config[] = {\n    37,\n    (uint32_t)&bes2300p_t1_ins_patch0,\n    (uint32_t)&bes2300p_t1_ins_patch1,\n    (uint32_t)&bes2300p_t1_ins_patch2,\n    (uint32_t)&bes2300p_t1_ins_patch3,\n    (uint32_t)&bes2300p_t1_ins_patch4,\n    (uint32_t)&bes2300p_t1_ins_patch5,\n    (uint32_t)&bes2300p_t1_ins_patch6,\n    (uint32_t)&bes2300p_t1_ins_patch7,\n    (uint32_t)&bes2300p_t1_ins_patch8,\n    (uint32_t)&bes2300p_t1_ins_patch9,\n    (uint32_t)&bes2300p_t1_ins_patch10,\n    (uint32_t)&bes2300p_t1_ins_patch11,\n    (uint32_t)&bes2300p_t1_ins_patch12,\n    (uint32_t)&bes2300p_t1_ins_patch13,\n    (uint32_t)&bes2300p_t1_ins_patch14,\n    (uint32_t)&bes2300p_t1_ins_patch15,\n    (uint32_t)&bes2300p_t1_ins_patch16,\n    (uint32_t)&bes2300p_t1_ins_patch17,\n    (uint32_t)&bes2300p_t1_ins_patch18,\n    (uint32_t)&bes2300p_t1_ins_patch19,\n    (uint32_t)&bes2300p_t1_ins_patch20,\n    (uint32_t)&bes2300p_t1_ins_patch21,\n    (uint32_t)&bes2300p_t1_ins_patch22,\n    (uint32_t)&bes2300p_t1_ins_patch23,\n    (uint32_t)&bes2300p_t1_ins_patch24,\n    (uint32_t)&bes2300p_t1_ins_patch25,\n    (uint32_t)&bes2300p_t1_ins_patch26,\n    (uint32_t)&bes2300p_t1_ins_patch27,\n    (uint32_t)&bes2300p_t1_ins_patch28,\n    (uint32_t)&bes2300p_t1_ins_patch29,\n    (uint32_t)&bes2300p_t1_ins_patch30,\n    (uint32_t)&bes2300p_t1_ins_patch31,\n    (uint32_t)&bes2300p_t1_ins_patch32,\n    (uint32_t)&bes2300p_t1_ins_patch33,\n    (uint32_t)&bes2300p_t1_ins_patch34,\n    (uint32_t)&bes2300p_t1_ins_patch35,\n    (uint32_t)&bes2300p_t1_ins_patch36,\n};\n\nvoid btdrv_ins_patch_write(BTDRV_PATCH_STRUCT *ins_patch_p) {\n  uint32_t remap_addr;\n  /// uint8_t i=0;\n  remap_addr = ins_patch_p->patch_remap_address | 1;\n  btdrv_write_memory(\n      _32_Bit,\n      (BTDRV_PATCH_INS_REMAP_ADDR_START + ins_patch_p->patch_index * 4),\n      (uint8_t *)&ins_patch_p->patch_remap_value, 4);\n  if (ins_patch_p->patch_length != 0) // have ram patch data\n  {\n    btdrv_memory_copy((uint32_t *)ins_patch_p->patch_start_address,\n                      (uint32_t *)ins_patch_p->patch_data,\n                      ins_patch_p->patch_length);\n  }\n\n  btdrv_write_memory(\n      _32_Bit, (BTDRV_PATCH_INS_COMP_ADDR_START + ins_patch_p->patch_index * 4),\n      (uint8_t *)&remap_addr, 4);\n}\n\nvoid btdrv_ins_patch_init(void) {\n  const BTDRV_PATCH_STRUCT *ins_patch_p;\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0) {\n    for (uint8_t i = 0; i < best2300p_t1_ins_patch_config[0]; i++) {\n      ins_patch_p = (BTDRV_PATCH_STRUCT *)best2300p_t1_ins_patch_config[i + 1];\n      if (ins_patch_p->patch_state == BTDRV_PATCH_ACT)\n        btdrv_ins_patch_write(\n            (BTDRV_PATCH_STRUCT *)best2300p_t1_ins_patch_config[i + 1]);\n    }\n  } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n#ifndef IBRT\n    for (uint8_t i = 0; i < best2300p_t2_ins_patch_config[0]; i++) {\n      ins_patch_p = (BTDRV_PATCH_STRUCT *)best2300p_t2_ins_patch_config[i + 1];\n      if (ins_patch_p->patch_state == BTDRV_PATCH_ACT)\n        btdrv_ins_patch_write(\n            (BTDRV_PATCH_STRUCT *)best2300p_t2_ins_patch_config[i + 1]);\n    }\n#else\n    for (uint8_t i = 0; i < best2300p_t2_ibrt_ins_patch_config[0]; i++) {\n      ins_patch_p =\n          (BTDRV_PATCH_STRUCT *)best2300p_t2_ibrt_ins_patch_config[i + 1];\n      if (ins_patch_p->patch_state == BTDRV_PATCH_ACT)\n        btdrv_ins_patch_write(\n            (BTDRV_PATCH_STRUCT *)best2300p_t2_ibrt_ins_patch_config[i + 1]);\n    }\n#endif\n  } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n#ifdef IBRT\n    for (uint8_t i = 0; i < best2300p_t3_ibrt_ins_patch_config[0]; i++) {\n      ins_patch_p =\n          (BTDRV_PATCH_STRUCT *)best2300p_t3_ibrt_ins_patch_config[i + 1];\n      if (ins_patch_p->patch_state == BTDRV_PATCH_ACT)\n        btdrv_ins_patch_write(\n            (BTDRV_PATCH_STRUCT *)best2300p_t3_ibrt_ins_patch_config[i + 1]);\n    }\n#else\n    for (uint8_t i = 0; i < best2300p_t3_ins_patch_config[0]; i++) {\n      ins_patch_p = (BTDRV_PATCH_STRUCT *)best2300p_t3_ins_patch_config[i + 1];\n      if (ins_patch_p->patch_state == BTDRV_PATCH_ACT)\n        btdrv_ins_patch_write(\n            (BTDRV_PATCH_STRUCT *)best2300p_t3_ins_patch_config[i + 1]);\n    }\n#endif\n  } else {\n    ASSERT(0, \"%s:error chip id=%d\", __func__, hal_get_chip_metal_id());\n  }\n}\n\n///////////////////data  patch ..////////////////////////////////////\n\nstatic const POSSIBLY_UNUSED uint32_t best2300p_t2_data_patch_config[] = {};\n\nvoid btdrv_data_patch_write(const BTDRV_PATCH_STRUCT *d_patch_p) {\n\n  uint32_t remap_addr;\n  uint8_t i = 0;\n\n  remap_addr = d_patch_p->patch_remap_address | 1;\n  btdrv_write_memory(\n      _32_Bit, (BTDRV_PATCH_DATA_COMP_ADDR_START + d_patch_p->patch_index * 4),\n      (uint8_t *)&remap_addr, 4);\n  btdrv_write_memory(\n      _32_Bit, (BTDRV_PATCH_DATA_REMAP_ADDR_START + d_patch_p->patch_index * 4),\n      (uint8_t *)&d_patch_p->patch_remap_value, 4);\n\n  if (d_patch_p->patch_length != 0) // have ram patch data\n  {\n    for (; i < (d_patch_p->patch_length - 1) / 128; i++) {\n      btdrv_write_memory(_32_Bit, d_patch_p->patch_start_address + i * 128,\n                         (d_patch_p->patch_data + i * 128), 128);\n    }\n\n    btdrv_write_memory(_32_Bit, d_patch_p->patch_start_address + i * 128,\n                       d_patch_p->patch_data + i * 128,\n                       d_patch_p->patch_length % 128);\n  }\n}\n\nvoid btdrv_ins_patch_disable(uint8_t index) {\n  uint32_t addr = 0;\n  btdrv_write_memory(_32_Bit, (BTDRV_PATCH_INS_COMP_ADDR_START + index * 4),\n                     (uint8_t *)&addr, 4);\n}\n\nvoid btdrv_data_patch_init(void) {\n#if 0\n    const BTDRV_PATCH_STRUCT *data_patch_p;\n    if(hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1)\n    {\n        for(uint8_t i=0; ipatch_state == BTDRV_PATCH_ACT)\n                btdrv_data_patch_write((BTDRV_PATCH_STRUCT *)best2300p_t2_data_patch_config[i+1]);\n        }\n    }\n#endif\n}\n\n//////////////////////////////patch enable////////////////////////\n\nvoid btdrv_patch_en(uint8_t en) {\n  uint32_t value[2];\n\n  // set patch enable\n  value[0] = 0x2f02 | en;\n  // set patch remap address  to 0xc0000100\n  value[1] = 0x20000100;\n  btdrv_write_memory(_32_Bit, BTDRV_PATCH_EN_REG, (uint8_t *)&value, 8);\n}\n\n/////////////2300p t3 test mode patch///////////////////////\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch_testmode_0 = {\n    0,   BTDRV_PATCH_ACT, 0, 0x0002ceb4, 0xe00b0f0f, 0,\n    NULL}; // ld_acl_rx() average rssi\n\nconst uint32_t bes2300p_t3_ins_patch_data_testmode_1[] = {\n    /*6a98*/ 0x99049803,\n    /*6a9c*/ 0x4b12b470,\n    /*6aa0*/ 0x010e5c5a,\n    /*6aa4*/ 0x19734d11,\n    /*6aa8*/ 0x78244c11,\n    /*6aac*/ 0xd20342a2,\n    /*6ab0*/ 0x32015498,\n    /*6ab4*/ 0xe001b2d2,\n    /*6ab8*/ 0x22015570,\n    /*6abc*/ 0x5442480a,\n    /*6ac0*/ 0x461ab14c,\n    /*6ac4*/ 0x23001919,\n    /*6ac8*/ 0x0b01f912,\n    /*6acc*/ 0xbf004403,\n    /*6ad0*/ 0xd1f9428a,\n    /*6ad4*/ 0x2300e000,\n    /*6ad8*/ 0xf0f4fb93,\n    /*6adc*/ 0xbc70b240,\n    /*6ae0*/ 0x22019904,\n    /*6ae4*/ 0xba00f626, // jump a0206ae4 -> a002cee8\n    /*6ae8*/ 0xc0006af8, // addr of rssi_idx_for_agc\n    /*6aec*/ 0xc0006afc, // addr of rssi_set_for_agc\n    /*6af0*/ 0xc0006af4, // addr of N\n    /*6af4*/ 0x00000005, // N : 1 ~ 16\n    /*6af8*/ 0x00000000, // rssi_idx_for_agc[3]\n    /*6afc*/ 0xbabababa, // rssi_set_for_agc[3*16]\n    /*6b00*/ 0xbabababa,\n    /*6b04*/ 0xbabababa,\n    /*6b08*/ 0xbabababa,\n    /*6b0c*/ 0xbabababa,\n    /*6b10*/ 0xbabababa,\n    /*6b14*/ 0xbabababa,\n    /*6b18*/ 0xbabababa,\n    /*6b1c*/ 0xbabababa,\n    /*6b20*/ 0xbabababa,\n    /*6b24*/ 0xbabababa,\n    /*6b28*/ 0xbabababa,\n    /*6b2c*/ 0xbabababa,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch_testmode_1 = {\n    1,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t3_ins_patch_data_testmode_1),\n    0x0002cee4,\n    0xbdd8f1d9, // jump a002cee4 -> a0206a98\n    0xc0006a98,\n    (uint8_t *)\n        bes2300p_t3_ins_patch_data_testmode_1}; // ld_acl_rx() average rssi\n\nconst uint32_t bes2300p_t3_ins_patch_data_testmode_2[] = {\n    0x2028f843, /*6b3c*/\n    0xf8434b08, 0x4b052028, 0x4b0e701a, 0x2201701a, 0xf8434b08,\n    0xbf002028, 0xba32f624, 0xc0006b60, 0x00000000, 0xc0006b68,\n    0x00000000, 0x00000000, 0x00000000, 0xc0006b78, 0x00000001,\n    0x00000001, 0x00000001, 0xc0006b88, 0x00000000, /*6b88*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch_testmode_2 = {\n    2,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t3_ins_patch_data_testmode_2),\n    0x0002afbc,\n    0xbdbef1db,\n    0xc0006b3c,\n    (uint8_t *)bes2300p_t3_ins_patch_data_testmode_2}; // sync clear count\n\nconst uint32_t bes2300p_t3_ins_patch_data_testmode_3[] = {\n    0x47f0e92d, /*7050*/\n    0x4b97b082, 0x236e5c1e, 0xf300fb03, 0x5a9b4a95, 0x4f00f413, 0x8120f040,\n    0x46044689, 0x1800ea4f, 0xeb084f91, 0x4b910507, 0xa020f853, 0xf8524a90,\n    0x33013020, 0x3020f842, 0xf860f635, 0x42a04601, 0x8088f040, 0xf8534b8a,\n    0x4b8a2024, 0x429a681b, 0xf8dad817, 0xebc22084, 0xf0230309, 0xf1b34378,\n    0xd9046f80, 0x0302ebc9, 0x4378f023, 0x4a82425b, 0x0024f852, 0x68124a81,\n    0xf200fb02, 0xf2404293, 0x4b7f80eb, 0x3000f993, 0x4b7eb9c3, 0xc000f893,\n    0x0f00f1bc, 0x462ad00a, 0x0e0ceb05, 0xf9122300, 0x44030b01, 0xd1fa4572,\n    0xe0014662, 0x46132200, 0xfcfcfb93, 0xf8804872, 0xe001c000, 0x46132200,\n    0xf890486f, 0x4870e000, 0x9000f890, 0xf890486f, 0xfa4fc000, 0xebc9f08e,\n    0xfa4f0000, 0x4550fa8c, 0xebc9dd05, 0x48660e0e, 0xe000f880, 0x4864e002,\n    0xc000f880, 0x0e00f04f, 0xf840485d, 0xf8dfe024, 0xf85ee178, 0x30010024,\n    0x0024f84e, 0x7800485d, 0xd2054286, 0x783f4f5a, 0x360155af, 0xe004b2f6,\n    0x78364e57, 0x6007f808, 0x4f4d2601, 0x4282553e, 0x442ada06, 0xf9124405,\n    0x44234b01, 0xd1fa42aa, 0xfb934a53, 0x9200f0f0, 0xb2406a14, 0x23002201,\n    0xe08147a0, 0xf8534b46, 0x4b4e2024, 0x429a681b, 0xf8dad816, 0xebc22084,\n    0xf0230309, 0xf1b34378, 0xd9046f80, 0x0302ebc9, 0x4378f023, 0x4a3e425b,\n    0x1024f852, 0x68124a44, 0xf201fb02, 0xd9634293, 0xf9934b42, 0xb9c33000,\n    0xf8934b3a, 0xf1bee000, 0xd00a0f00, 0xeb05462a, 0x2300000e, 0x1b01f912,\n    0x4282440b, 0x4672d1fa, 0x2200e001, 0xfb934613, 0x4936fefe, 0xe000f881,\n    0x2200e001, 0x49334613, 0x49337808, 0xc000f891, 0xf8914932, 0xb241e000,\n    0x0101ebcc, 0xf98efa4f, 0xdd044549, 0x0000ebcc, 0x7008492a, 0x4929e002,\n    0xe000f881, 0x491c2000, 0x0024f841, 0xf850481c, 0x31011024, 0x1024f840,\n    0x7808491c, 0xd2054286, 0x78094920, 0x360155a9, 0xe004b2f6, 0x7809491d,\n    0x1007f808, 0x490c2601, 0x4282550e, 0x442ada06, 0xf9124405, 0x440b1b01,\n    0xd1fa42aa, 0xfb934a12, 0x9200f0f0, 0xb2406a15, 0x22014621, 0x47a82300,\n    0xe8bdb002, 0xbf0087f0,\n    0xc0006af8, // rssi_idx_for_agc[link_id]  shenxin\n    0xd02111f8, // EM_BT_RD(EM_BT_RXBIT_ADDR\n    0xc0006afc, // rssi_set_for_agc   shenxin\n    0xc00009d4, // ld_acl_env[link_id]\n    0xc0006b68, // link_no_sync_count[link_id]\n    0xc00072fc, // link_agc_thd_tws\n    0xc0006b78, // link_no_sync_count_time[link_id]\n    0xc0007300, // link_agc_thd_tws_time\n    0xc0006b60, // rssi_store_tws\n    0xc0006af4, // n   shenxin\n    0xc0007304, // rssi_tws_step\n    0xc0007308, // rssi_min_value_tws\n    0xc0004268, // rwip_rf.rxgain_cntl\n    0xc000730c, // link_agc_thd_mobile\n    0xc0007310, // link_agc_thd_mobile_time\n    0xc0006b88, // rssi_store_mobile\n    0xc0007314, // rssi_mobile_step\n    0xc0007318, // rssi_min_value_mobile\n    0xffffffff, // link_agc_thd_tws\n    0x00000030, // link_agc_thd_tws_time\n    0x00000014, // rssi_tws_step\n    0x0000009c, // rssi_min_value_tws\n    0xffffffff, // link_agc_thd_mobile\n    0x00000030, // link_agc_thd_mobile_time\n    0x00000014, // rssi_mobile_step\n    0x000000a1, // rssi_min_value_mobile\n    0x99029804, 0xfe96f7ff, 0xfc48f632, 0xb898f626, /*7328*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch_testmode_3 = {\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t3_ins_patch_data_testmode_3),\n    0x0002d458,\n    0xbf60f1d9,\n    0xc0007050,\n    (uint8_t *)bes2300p_t3_ins_patch_data_testmode_3}; // swagc no sync\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch_testmode_4 = {\n    4,   BTDRV_PATCH_ACT, 0, 0x0000e47a, 0xe0027b20, 0,\n    NULL}; // lm_inq_res_ind_handler()  rssi\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch_testmode_5 = {\n    5,   BTDRV_PATCH_INACT, 0, 0x0002ad78, 0xbf00e009, 0,\n    NULL}; // ld_acl_rx_no_sync()  rssi\n\nconst uint32_t bes2300p_t3_ins_patch_data_testmode_6[] = {\n    0xf8802300, 0xf8803024, 0xbf003025, 0x30b3f894, 0xbc18f62d,\n}; /* 6b90-6ba0 */\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch_testmode_6 = {\n    6,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t3_ins_patch_data_testmode_6),\n    0x000343d0,\n    0xbbdef1d2,\n    0xc0006b90,\n    (uint8_t *)\n        bes2300p_t3_ins_patch_data_testmode_6}; // nosig test pattern problem\n\nconst BTDRV_PATCH_STRUCT bes2300p_t3_ins_patch_testmode_7 = {\n    7, BTDRV_PATCH_ACT, 0, 0x00000880, 0x26004c0e, 0, NULL,\n}; // rwip_env.sleep_enable=false after hci reset\n\nstatic const uint32_t ins_patch_2300p_t3_config_testmode[] = {\n    8,\n    (uint32_t)&bes2300p_t3_ins_patch_testmode_0,\n    (uint32_t)&bes2300p_t3_ins_patch_testmode_1,\n    (uint32_t)&bes2300p_t3_ins_patch_testmode_2,\n    (uint32_t)&bes2300p_t3_ins_patch_testmode_3,\n    (uint32_t)&bes2300p_t3_ins_patch_testmode_4,\n    (uint32_t)&bes2300p_t3_ins_patch_testmode_5,\n    (uint32_t)&bes2300p_t3_ins_patch_testmode_6,\n    (uint32_t)&bes2300p_t3_ins_patch_testmode_7,\n};\n/////////////2300p t2 test mode patch///////////////////////\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch_testmode_0 = {\n    0, BTDRV_PATCH_ACT, 0, 0x00000874, 0x26004c0e, 0, NULL,\n}; ////rwip_env.sleep_enable=false after hci reset\n\nconst uint32_t bes2300p_t2_ins_patch_data_testmode_1[] = {\n    0x4681b083, /*6b30*/\n    0x4b022200, 0x2020f843, 0xbddcf623, 0xc0006b44,\n    0x00000000, 0x00000000, 0x00000000, /*6b4c*/\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch_testmode_1 = {\n    1,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t2_ins_patch_data_testmode_1),\n    0x0002a6f4,\n    0xba1cf1dc,\n    0xc0006b30,\n    (uint8_t *)bes2300p_t2_ins_patch_data_testmode_1}; // sync clear count\n\nconst uint32_t bes2300p_t2_ins_patch_data_testmode_2[] = {\n    0x6020f853, 0xf8524a0d, 0x33013020, 0x3020f842, 0x68124a0b,\n    0xd90f4293, 0x4a082300, 0x3020f842, 0xb082b402, 0x92004a08,\n    0xf06f6a14, 0x46290059, 0x47a02201, 0xbc02b002, 0xbce4f623,\n    0xc0006b44, 0xc0006b94, 0x00000010, 0xc00041b4,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch_testmode_2 = {\n    2,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t2_ins_patch_data_testmode_2),\n    0x0002a550,\n    0xbafef1dc,\n    0xc0006b50,\n    (uint8_t *)bes2300p_t2_ins_patch_data_testmode_2};\n\nconst uint32_t bes2300p_t2_ins_patch_data_testmode_3[] = {\n    /*6f90*/ 0xbf009904,\n    /*6f94*/ 0x4b12b470,\n    /*6f98*/ 0x010e5c5a,\n    /*6f9c*/ 0x19734d11,\n    /*6fa0*/ 0x78244c11,\n    /*6fa4*/ 0xd20342a2,\n    /*6fa8*/ 0x32015498,\n    /*6fac*/ 0xe001b2d2,\n    /*6fb0*/ 0x22015570,\n    /*6fb4*/ 0x5442480a,\n    /*6fb8*/ 0x461ab14c,\n    /*6fbc*/ 0x23001919,\n    /*6fc0*/ 0x0b01f912,\n    /*6fc4*/ 0xbf004403,\n    /*6fc8*/ 0xd1f9428a,\n    /*6fcc*/ 0x2300e000,\n    /*6fd0*/ 0xf0f4fb93,\n    /*6fd4*/ 0xbc70b240,\n    /*6fd8*/ 0x22019904,\n    /*6fdc*/ 0xbb8cf628, // jump a002f6f8\n    /*6fe0*/ 0xc0006ff0, // addr of rssi_idx_for_agc\n    /*6fe4*/ 0xc0006ff4, // addr of rssi_set_for_agc\n    /*6fe8*/ 0xc0006fec, // addr of N\n    /*6fec*/ 0x00000005, // N : 1 ~ 16\n    /*6ff0*/ 0x00000000, // rssi_idx_for_agc[3]\n    /*6ff4*/ 0xbabababa, // rssi_set_for_agc[3*16]\n    /*6ff8*/ 0xbabababa,\n    /*6ffc*/ 0xbabababa,\n    /*7000*/ 0xbabababa,\n    /*7004*/ 0xbabababa,\n    /*7008*/ 0xbabababa,\n    /*700c*/ 0xbabababa,\n    /*7010*/ 0xbabababa,\n    /*7014*/ 0xbabababa,\n    /*7018*/ 0xbabababa,\n    /*701c*/ 0xbabababa,\n    /*7020*/ 0xbabababa,\n    /*7024*/ 0xbabababa,\n    /*7028*/ 0xbabababa,\n    /*702c*/ 0xbabababa,\n}; // 0xc0006f90--->0xc0007074\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch_testmode_3 = {\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t2_ins_patch_data_testmode_3),\n    0x0002f6f4,\n    0xbc4cf1d7, // jump a002f6f4 -> a0206f90\n    0xc0006f90,\n    (uint8_t *)\n        bes2300p_t2_ins_patch_data_testmode_3}; // ld_acl_rx() average rssi\n\nconst uint32_t bes2300p_t2_ins_patch_data_testmode_4[] = {\n    0x4620461d,\n    0x463a4629,\n    0xf5f94633,\n    0xbdf8fc2b,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch_testmode_4 = {\n    4,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t2_ins_patch_data_testmode_4),\n    0x000070ec,\n    0xbe08f1ff,\n    0xc0006d00,\n    (uint8_t *)bes2300p_t2_ins_patch_data_testmode_4}; // assert warn\n\nconst uint32_t bes2300p_t2_ins_patch_data_testmode_5[] = {\n    0x4630461f,\n    0x462a4639,\n    0xf5f94623,\n    0xbdf8fc21,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch_testmode_5 = {\n    5,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t2_ins_patch_data_testmode_5),\n    0x00007070,\n    0xbe50f1ff,\n    0xc0006d14,\n    (uint8_t *)bes2300p_t2_ins_patch_data_testmode_5}; // assert param\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch_testmode_6 = {\n    6, BTDRV_PATCH_ACT, 0, 0x0003bbe0, 0xf7c52100, 0, NULL,\n}; /// ble tx test mode switch freq channel problem\n\nconst uint32_t bes2300p_t2_ins_patch_data_testmode_7[] = {\n    0xf8802300, 0xf8803024, 0xbf003025, 0x30b3f894, 0xbe0ef62c,\n}; /* 6d30-6d40 */\n\nconst BTDRV_PATCH_STRUCT bes2300p_t2_ins_patch_testmode_7 = {\n    7,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t2_ins_patch_data_testmode_7),\n    0x0003395c,\n    0xb9e8f1d3,\n    0xc0006d30,\n    (uint8_t *)\n        bes2300p_t2_ins_patch_data_testmode_7}; // nosig test pattern problem\n\nstatic const uint32_t ins_patch_2300p_t2_config_testmode[] = {\n    8,\n    (uint32_t)&bes2300p_t2_ins_patch_testmode_0,\n    (uint32_t)&bes2300p_t2_ins_patch_testmode_1,\n    (uint32_t)&bes2300p_t2_ins_patch_testmode_2,\n    (uint32_t)&bes2300p_t2_ins_patch_testmode_3,\n    (uint32_t)&bes2300p_t2_ins_patch_testmode_4,\n    (uint32_t)&bes2300p_t2_ins_patch_testmode_5,\n    (uint32_t)&bes2300p_t2_ins_patch_testmode_6,\n    (uint32_t)&bes2300p_t2_ins_patch_testmode_7,\n};\n\n/////////////2300p t1 test mode patch///////////////////////\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch_testmode_0 = {\n    0,   BTDRV_PATCH_ACT, 0, 0x0002f440, 0x789abf00, 0,\n    NULL}; /// test mode: remove rxllid's judging condition in ld_acl_rx\n\nconst uint32_t bes2300p_t1_ins_patch_data_testmode_1[] = {\n    0x20fcf8d5, 0xf8928811, 0xf0088007, 0xb909080f, 0x88194b11, 0x0484eb04,\n    0x3014f837, 0xf423b29b, 0x4a0f7300, 0xea438812, 0xb29b2342, 0x3014f827,\n    0x3014f837, 0xf023b29b, 0xea430378, 0xf82708c8, 0x4b068014, 0xf043781b,\n    0xea430304, 0xb28b01c1, 0x3014f82a, 0xbe8ef627,\n    0xc000099c, ////loopback_length\n    0xc000097d, ////loopback_llid\n    0xc0006964, ////rxseq_flag\n    0x00000000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch_testmode_1 = {\n    1,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_ins_patch_data_testmode_1),\n    0x0002e60c,\n    0xb978f1d8,\n    0xc0006900,\n    (uint8_t *)\n        bes2300p_t1_ins_patch_data_testmode_1}; /// test mode: ld_acl_tx_prog\n\nconst uint32_t bes2300p_t1_ins_patch_data_testmode_2[] = {\n    0xfbdcf5fc, 0x3060f890, 0xd01f2b00, 0x30fcf8db, 0xd01b2b00, 0x0f03f1b9,\n    0xf1b9d018, 0xd0150f08, 0xf8934b0b, 0x011b31cb, 0x5a9b4a0a, 0x7f80f413,\n    0x4b09d10a, 0x4b0a781a, 0x4b08601a, 0x4b09881a, 0x2201601a, 0x601a4b08,\n    0xbc32f628, 0xbc2ef628, 0xc0005d34, 0xd02115f2,\n    0xc000097d, ////loopback_llid\n    0xc000099c, ////loopback_length\n    0xc0006a8c, ////rxllid_flag\n    0xc0006a90, ////rxlength_flag\n    0xc0006a94, ////unack_seqerr_flag\n    0x00000000, 0x00000000, 0x00000000,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch_testmode_2 = {\n    2,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_ins_patch_data_testmode_2),\n    0x0002f2c8,\n    0xbbaaf1d7,\n    0xc0006a20,\n    (uint8_t *)bes2300p_t1_ins_patch_data_testmode_2}; /// test mode: skip rx\n                                                       /// seq err in ld_acl_rx\n\n#if 0\nconst uint32_t bes2300p_t1_ins_patch_data_testmode_3[] =\n{\n    0xf015d002,\n    0xd0010f24,\n    0xbc1af628,\n    0xbcfcf628,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch_testmode_3 =\n{\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_ins_patch_data_testmode_3),\n    0x0002f2d4,\n    0xbbe0f1d7,\n    0xc0006a98,\n    (uint8_t*)bes2300p_t1_ins_patch_data_testmode_3\n};///test mode: skip crc err in ld_acl_rx\n#else\nconst uint32_t bes2300p_t1_ins_patch_data_testmode_3[] = {\n    0xf015d006, 0xd0050f24, 0x0f03f1b9, 0xbf00d002, 0xbc16f628, 0xbcf8f628,\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch_testmode_3 = {\n    3,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_ins_patch_data_testmode_3),\n    0x0002f2d4,\n    0xbbe0f1d7,\n    0xc0006a98,\n    (uint8_t *)bes2300p_t1_ins_patch_data_testmode_3}; /// test mode: skip crc\n                                                       /// err in ld_acl_rx\n\n#endif\n\nconst uint32_t bes2300p_t1_ins_patch_data_testmode_4[] = {\n    0x700d4914, 0xf891490c, 0x010911cb, 0x5a8a4a0b, 0x2240f3c2, 0x6002480a,\n    0x6800480a, 0x2100b150, 0x60014808, 0x68014808, 0x80014808, 0x68014808,\n    0x70014808, 0xbcbaf628, 0xc0005d34, 0xd02115f2,\n    0xc0006964, ////rxseq_flag\n    0xc0006a94, ////unack_seqerr_flag\n    0xc0006a90, ////rxlength_flag\n    0xc000099c, ////loopback_length\n    0xc0006a8c, ////rxllid_flag\n    0xc000097d, ////loopback_llid\n};\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch_testmode_4 = {\n    4,\n    BTDRV_PATCH_ACT,\n    sizeof(bes2300p_t1_ins_patch_data_testmode_4),\n    0x0002f464,\n    0xbb2af1d7,\n    0xc0006abc,\n    (uint8_t *)bes2300p_t1_ins_patch_data_testmode_4}; /// test mode: ld_acl_rx\n\nconst BTDRV_PATCH_STRUCT bes2300p_t1_ins_patch_testmode_5 = {\n    5, BTDRV_PATCH_ACT, 0, 0x00000100, 0x20004b15, 0, NULL,\n}; ////rwip_env.sleep_enable=false after hci reset\n\nstatic const uint32_t ins_patch_2300p_t1_config_testmode[] = {\n    6,\n    (uint32_t)&bes2300p_t1_ins_patch_testmode_0,\n    (uint32_t)&bes2300p_t1_ins_patch_testmode_1,\n    (uint32_t)&bes2300p_t1_ins_patch_testmode_2,\n    (uint32_t)&bes2300p_t1_ins_patch_testmode_3,\n    (uint32_t)&bes2300p_t1_ins_patch_testmode_4,\n    (uint32_t)&bes2300p_t1_ins_patch_testmode_5,\n};\n\nvoid btdrv_ins_patch_test_init(void) {\n  const BTDRV_PATCH_STRUCT *ins_patch_p;\n\n  btdrv_patch_en(0);\n\n  for (uint8_t i = 0; i < 56; i++) {\n    btdrv_ins_patch_disable(i);\n  }\n  bt_drv_reg_op_for_test_mode_disable();\n\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0) {\n    for (uint8_t i = 0; i < ins_patch_2300p_t1_config_testmode[0]; i++) {\n      ins_patch_p =\n          (BTDRV_PATCH_STRUCT *)ins_patch_2300p_t1_config_testmode[i + 1];\n      if (ins_patch_p->patch_state == BTDRV_PATCH_ACT)\n        btdrv_ins_patch_write(\n            (BTDRV_PATCH_STRUCT *)ins_patch_2300p_t1_config_testmode[i + 1]);\n    }\n  } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    for (uint8_t i = 0; i < ins_patch_2300p_t2_config_testmode[0]; i++) {\n      ins_patch_p =\n          (BTDRV_PATCH_STRUCT *)ins_patch_2300p_t2_config_testmode[i + 1];\n      if (ins_patch_p->patch_state == BTDRV_PATCH_ACT)\n        btdrv_ins_patch_write(\n            (BTDRV_PATCH_STRUCT *)ins_patch_2300p_t2_config_testmode[i + 1]);\n    }\n\n  } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    for (uint8_t i = 0; i < ins_patch_2300p_t3_config_testmode[0]; i++) {\n      ins_patch_p =\n          (BTDRV_PATCH_STRUCT *)ins_patch_2300p_t3_config_testmode[i + 1];\n      if (ins_patch_p->patch_state == BTDRV_PATCH_ACT)\n        btdrv_ins_patch_write(\n            (BTDRV_PATCH_STRUCT *)ins_patch_2300p_t3_config_testmode[i + 1]);\n    }\n    bt_drv_reg_op_disable_swagc_nosync_count();\n  } else {\n    ASSERT(0, \"%s:error chip id=%d\", __func__, hal_get_chip_metal_id());\n  }\n\n  btdrv_patch_en(1);\n}\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/bt_drv_reg_op.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"bt_drv_reg_op.h\"\n#include \"CrashCatcher.h\"\n#include \"bt_drv.h\"\n#include \"bt_drv_2300p_internal.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_internal.h\"\n#include \"cmsis.h\"\n#include \"hal_chipid.h\"\n#include \"hal_iomux.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_trace.h\"\n#include \n\nstatic uint32_t bt_ram_start_addr = 0;\nstatic uint32_t hci_fc_env_addr = 0;\nstatic uint32_t ld_acl_env_addr = 0;\nstatic uint32_t bt_util_buf_env_addr = 0;\nstatic uint32_t em_buf_env_addr = 0;\nstatic uint32_t sniffer_env_addr = 0;\nstatic uint32_t dbg_state_addr = 0;\nstatic uint32_t lc_state_addr = 0;\nstatic uint32_t task_message_buffer_addr = 0;\nstatic uint32_t lmp_message_buffer_addr = 0;\nstatic uint32_t ld_sco_env_addr = 0;\nstatic uint32_t rx_monitor_addr = 0;\nstatic uint32_t lc_env_addr = 0;\nstatic uint32_t dbg_bt_setting_addr = 0;\nstatic uint32_t lm_nb_sync_active_addr = 0;\nstatic uint32_t lm_env_addr = 0;\nstatic uint32_t pending_seq_error_link_addr = 0;\nstatic uint32_t hci_env_addr = 0;\nstatic uint32_t lc_sco_env_addr = 0;\nstatic uint32_t llm_le_env_addr = 0;\nstatic uint32_t ld_env_addr = 0;\nstatic uint32_t rwip_env_addr = 0;\nstatic uint32_t MIC_BUFF_addr = 0;\nstatic uint32_t g_mem_dump_ctrl_addr = 0;\nstatic uint32_t ble_rx_monitor_addr = 0;\nstatic uint32_t reconnecting_flag_addr = 0;\nstatic uint32_t link_connect_bak_addr = 0;\nstatic uint32_t tws_link_id_addr = 0;\nstatic uint32_t llc_env_addr = 0;\nstatic uint32_t dbg_bt_setting_ext1_addr = 0;\nstatic uint32_t rwip_rf_addr = 0;\nvoid bt_drv_reg_op_global_symbols_init(void) {\n  bt_ram_start_addr = 0xc0000000;\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0) {\n    hci_fc_env_addr = 0xC00067c4;\n    ld_acl_env_addr = 0xc000098c;\n    bt_util_buf_env_addr = 0xc00059fc;\n    em_buf_env_addr = 0xc000656c;\n    sniffer_env_addr = 0xc0006358;\n    dbg_state_addr = 0xc00058c4;\n    lc_state_addr = 0xc0005c7c;\n    task_message_buffer_addr = 0xc00007cc;\n    lmp_message_buffer_addr = 0xc0000834;\n    ld_sco_env_addr = 0xc0000980;\n    rx_monitor_addr = 0xc00058fc;\n    lc_env_addr = 0xc0005c70;\n    dbg_bt_setting_addr = 0xc0005854;\n    lm_nb_sync_active_addr = 0xc00007c0;\n    lm_env_addr = 0xc0005afc;\n    hci_env_addr = 0xc0006764;\n    lc_sco_env_addr = 0xc00007a4;\n    llm_le_env_addr = 0xc00063f0;\n    ld_env_addr = 0xc0005d34;\n    rwip_env_addr = 0xc00003d4;\n    MIC_BUFF_addr = 0xc0005920;\n    ble_rx_monitor_addr = 0xc00058ec;\n    llc_env_addr = 0xc00064f8;\n    rwip_rf_addr = 0xc00041a0;\n\n  } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    hci_fc_env_addr = 0xC0006838;\n    ld_acl_env_addr = 0xc0000998;\n    bt_util_buf_env_addr = 0xc0005a18;\n    em_buf_env_addr = 0xc00065e0;\n    sniffer_env_addr = 0xc00063c8;\n    dbg_state_addr = 0xc00058e0;\n    lc_state_addr = 0xc0005ce4;\n    task_message_buffer_addr = 0xc00007c4;\n    lmp_message_buffer_addr = 0xc000082c;\n    ld_sco_env_addr = 0xc000098c;\n    rx_monitor_addr = 0xc0005918;\n    lc_env_addr = 0xc0005cd8;\n    dbg_bt_setting_addr = 0xc0005868;\n    lm_nb_sync_active_addr = 0xc00007b8;\n    lm_env_addr = 0xc0005b64;\n    pending_seq_error_link_addr = 0xc0000335;\n    hci_env_addr = 0xc00067d8;\n    lc_sco_env_addr = 0xc000079c;\n    llm_le_env_addr = 0xc0006460;\n    ld_env_addr = 0xc0005d9c;\n    rwip_env_addr = 0xc00003c8;\n    MIC_BUFF_addr = 0xc000593c;\n    ble_rx_monitor_addr = 0xc0005908;\n    link_connect_bak_addr = 0xc00061c8;\n    llc_env_addr = 0xc0006568;\n    rwip_rf_addr = 0xc00041b4;\n\n  } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    hci_fc_env_addr = 0xC0006940;\n    ld_acl_env_addr = 0xc00009d4;\n    bt_util_buf_env_addr = 0xc0005b24;\n    em_buf_env_addr = 0xc00066e8;\n    sniffer_env_addr = 0xc00064d0;\n    dbg_state_addr = 0xc00059b0;\n    lc_state_addr = 0xc0005df0;\n    task_message_buffer_addr = 0xc0000820;\n    lmp_message_buffer_addr = 0xc0000888;\n    ld_sco_env_addr = 0xc00009e4;\n    rx_monitor_addr = 0xc0005a24;\n    lc_env_addr = 0xc0005de4;\n    dbg_bt_setting_addr = 0xc0005938;\n    lm_nb_sync_active_addr = 0xc0000814;\n    lm_env_addr = 0xc0005c70;\n    pending_seq_error_link_addr = 0xc000034f;\n    hci_env_addr = 0xc00068e0;\n    lc_sco_env_addr = 0xc00007f8;\n    llm_le_env_addr = 0xc0006568;\n    ld_env_addr = 0xc0005ea8;\n    rwip_env_addr = 0xc00003dc;\n    MIC_BUFF_addr = 0xc0005a48;\n    g_mem_dump_ctrl_addr = 0xc00059d4;\n    ble_rx_monitor_addr = 0xc0005a14;\n    reconnecting_flag_addr = 0xc0000a1c;\n    link_connect_bak_addr = 0xc00062d0;\n    tws_link_id_addr = 0xc000034e;\n    llc_env_addr = 0xc0006670;\n    dbg_bt_setting_ext1_addr = 0xc000591c;\n    rwip_rf_addr = 0xc0004268;\n  }\n}\n\nvoid bt_drv_reg_op_rssi_set(uint16_t rssi) {}\n\nvoid bt_drv_reg_op_scan_intv_set(uint32_t scan_intv) {}\n\nvoid bt_drv_reg_op_encryptchange_errcode_reset(uint16_t hci_handle) {}\n\nvoid bt_drv_reg_op_sco_sniffer_checker(void) {}\n\nvoid bt_drv_reg_op_trigger_time_checker(void) {\n  BT_DRV_REG_OP_ENTER();\n  BT_DRV_TRACE(1, \"BT_REG_OP:0xd02201f0 = %x\",\n               *(volatile uint32_t *)0xd02201f0);\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_tws_output_power_fix_separate(uint16_t hci_handle,\n                                                 uint16_t pwr) {}\n\n#define SNIFF_IN_SCO 2\n/// BD Address structure\nstruct bd_addr {\n  /// 6-byte array address value\n  uint8_t addr[6];\n};\n/// device info structure\nstruct ld_device_info {\n  struct bd_addr bd_addr;\n  uint8_t link_id;\n  uint8_t state;\n};\n\nbool bt_drv_reg_op_ld_sniffer_env_monitored_dev_state_get(void) {\n  return false;\n}\n\nvoid bt_drv_reg_op_ld_sniffer_env_monitored_dev_state_set(bool state) {}\n\nvoid bt_drv_reg_op_ibrt_env_reset(void) {\n  struct ld_device_info *mobile_device_info;\n  BT_DRV_REG_OP_ENTER();\n  bool status = false;\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0) {\n    mobile_device_info = (struct ld_device_info *)(sniffer_env_addr + 4);\n    status = true;\n  }\n\n  if (status) {\n    mobile_device_info->link_id = 3;\n    mobile_device_info->state = 0;\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nint bt_drv_reg_op_currentfreeaclbuf_get(void) {\n  BT_DRV_REG_OP_ENTER();\n  // ACL packert number of host set - ACL number of controller has been send to\n  // host hci_fc_env.host_set.acl_pkt_nb - hci_fc_env.cntr.acl_pkt_sent\n  if (hci_fc_env_addr != 0) {\n    return (*(volatile uint16_t *)(hci_fc_env_addr + 0x4) -\n            *(volatile uint16_t *)(hci_fc_env_addr + 0xc));\n  } else {\n    return 0;\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nstatic uint16_t mobile_sync_info;\nvoid bt_drv_reg_op_save_mobile_airpath_info(uint16_t hciHandle) {\n  BT_DRV_REG_OP_ENTER();\n\n  uint8_t link_id = btdrv_conhdl_to_linkid(hciHandle);\n\n  if (btdrv_is_link_index_valid(link_id)) {\n    mobile_sync_info =\n        BT_DRIVER_GET_U16_REG_VAL(EM_BT_BTADDR1_ADDR + BT_EM_SIZE * link_id);\n    BT_DRV_TRACE(1, \"BT_REG_OP: save xfer mobile sync info 0x%x \",\n                 mobile_sync_info);\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_block_xfer_with_mobile(uint16_t hciHandle) {\n  BT_DRV_REG_OP_ENTER();\n\n  uint8_t link_id = btdrv_conhdl_to_linkid(hciHandle);\n\n  if (btdrv_is_link_index_valid(link_id)) {\n    BT_DRIVER_PUT_U16_REG_VAL((EM_BT_BTADDR1_ADDR + BT_EM_SIZE * link_id),\n                              mobile_sync_info ^ 0x8000);\n    BT_DRV_TRACE(2,\n                 \"BT_REG_OP: block xfer with mobile, save hci handle 0x%x sync \"\n                 \"info as 0x%x\",\n                 hciHandle, mobile_sync_info ^ 0x8000);\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_resume_xfer_with_mobile(uint16_t hciHandle) {\n  BT_DRV_REG_OP_ENTER();\n  uint8_t link_id = btdrv_conhdl_to_linkid(hciHandle);\n\n  if (btdrv_is_link_index_valid(link_id)) {\n    BT_DRIVER_PUT_U16_REG_VAL((EM_BT_BTADDR1_ADDR + BT_EM_SIZE * link_id),\n                              mobile_sync_info);\n    BT_DRV_TRACE(2,\n                 \"BT_REG_OP:resume xfer with mobile, hci handle 0x%x as 0x%x\",\n                 hciHandle, mobile_sync_info);\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_block_fast_ack_with_mobile(void) {\n  /*\n   * ibrt master set its fast ack sync bit wrong,let itself NACK mobile link\n   * always\n   */\n\n  BT_DRV_REG_OP_ENTER();\n\n  bt_drv_set_fa_invert_enable(BT_FA_INVERT_DISABLE);\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_resume_fast_ack_with_mobile(void) {\n\n  /*\n   *  old master recovery its fast ack sync bit right\n   */\n\n  BT_DRV_REG_OP_ENTER();\n\n  bt_drv_set_fa_invert_enable(BT_FA_INVERT_EN);\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nint bt_drv_reg_op_packet_type_checker(uint16_t hciHandle) { return 0; }\n\nvoid bt_drv_reg_op_max_slot_setting_checker(uint16_t hciHandle) {}\n\nvoid bt_drv_reg_op_force_task_dbg_idle(void) {}\n\nvoid bt_drv_reg_op_afh_follow_mobile_mobileidx_set(uint16_t hciHandle) {}\n\nvoid bt_drv_reg_op_afh_follow_mobile_twsidx_set(uint16_t hciHandle) {}\n\nvoid bt_drv_reg_op_afh_bak_reset(void) {}\n\nvoid bt_drv_reg_op_afh_bak_save(uint8_t role, uint16_t mobileHciHandle) {}\n\nvoid bt_drv_reg_op_connection_checker(void) {}\n\nvoid bt_drv_reg_op_sco_status_store(void) {}\n\nvoid bt_drv_reg_op_sco_status_restore(void) {}\n\nvoid bt_drv_reg_op_afh_set_default(void) {}\n\nvoid bt_drv_reg_op_ld_sniffer_master_addr_set(uint8_t *addr) {}\n\nvoid bt_drv_reg_op_lsto_hack(uint16_t hciHandle, uint16_t lsto) {\n  uint32_t acl_par_ptr = 0;\n  // ld_acl_env\n\n  if (ld_acl_env_addr) {\n    acl_par_ptr = *(uint32_t *)(ld_acl_env_addr + (hciHandle - 0x80) * 4);\n  }\n\n  if (acl_par_ptr) {\n    BT_DRV_TRACE(3,\n                 \"BT_REG_OP:Set the lsto for hciHandle=0x%x, from:0x%x to 0x%x\",\n                 hciHandle, *(uint16_t *)(acl_par_ptr + 154), lsto);\n\n    *(uint16_t *)(acl_par_ptr + 154) = lsto;\n  } else {\n    BT_DRV_TRACE(0, \"BT_REG_OP:ERROR,acl par address error\");\n  }\n}\n\nuint16_t bt_drv_reg_op_get_lsto(uint16_t hciHandle) {\n  uint32_t acl_par_ptr = 0;\n  uint16_t lsto = 0;\n  // ld_acl_env\n\n  if (ld_acl_env_addr) {\n    acl_par_ptr = *(uint32_t *)(ld_acl_env_addr + (hciHandle - 0x80) * 4);\n  }\n\n  if (acl_par_ptr) {\n    lsto = *(uint16_t *)(acl_par_ptr + 154);\n    BT_DRV_TRACE(2, \"BT_REG_OP:lsto=0x%x for hciHandle=0x%x\", lsto, hciHandle);\n  } else {\n    lsto = 0xffff;\n    BT_DRV_TRACE(0, \"BT_REG_OP:ERROR,acl par null ptr\");\n  }\n\n  return lsto;\n}\n\nuint8_t bt_drv_reg_opmsbc_find_tx_sync(uint8_t *buff) {\n  BT_DRV_REG_OP_ENTER();\n\n  uint8_t i;\n  for (i = 0; i < 60; i++) {\n    if (buff[i] == 0x1 && buff[(i + 2) % 60] == 0xad) {\n      //    BT_DRV_TRACE(1,\"MSBC tx sync find =%d\",i);\n      return i;\n    }\n  }\n  BT_DRV_TRACE(0, \"BT_REG_OP:TX No pACKET\");\n\n  BT_DRV_REG_OP_EXIT();\n  return 0;\n}\n\nbool bt_drv_reg_op_sco_tx_buf_restore(uint8_t *trigger_test) {\n  uint8_t offset;\n  bool nRet = false;\n\n  BT_DRV_REG_OP_ENTER();\n\n  offset = bt_drv_reg_opmsbc_find_tx_sync((uint8_t *)EM_BT_AUDIOBUF_OFF);\n  if (offset != 0) {\n#ifndef APB_PCM\n    *trigger_test = (((BTDIGITAL_REG(0xd022045c) & 0x3f)) + (60 - offset)) % 64;\n#endif\n    BT_DRV_TRACE(2, \"BT_REG_OP:TX BUF ERROR trigger_test=%p,offset=%x\",\n                 trigger_test, offset);\n    DUMP8(\"%02x \", (uint8_t *)EM_BT_AUDIOBUF_OFF, 10);\n    //   BT_DRV_TRACE(2,\"pcm reg=%x %x\",*(uint32_t *)0xd0220468,*(uint32_t\n    //   *)0x400000f0);\n    nRet = true;\n  }\n\n  BT_DRV_REG_OP_EXIT();\n\n  return nRet;\n}\n\nint bt_drv_reg_op_acl_chnmap(uint16_t hciHandle, uint8_t *chnmap,\n                             uint8_t chnmap_len) {\n  uint32_t acl_evt_ptr = 0;\n  uint8_t *chnmap_ptr = 0;\n  uint8_t link_id = btdrv_conhdl_to_linkid(hciHandle);\n\n  if (!btdrv_is_link_index_valid(link_id)) {\n    memset(chnmap, 0, chnmap_len);\n    return -1;\n  }\n  if (chnmap_len < 10) {\n    memset(chnmap, 0, chnmap_len);\n    return -1;\n  }\n\n  if (ld_acl_env_addr) {\n    acl_evt_ptr = *(volatile uint32_t *)(ld_acl_env_addr + link_id * 4);\n  }\n\n  if (acl_evt_ptr != 0) {\n    chnmap_ptr = (uint8_t *)(acl_evt_ptr + 0x34);\n  }\n\n  if (!chnmap_ptr) {\n    memset(chnmap, 0, chnmap_len);\n    return -1;\n  } else {\n    memcpy(chnmap, chnmap_ptr, chnmap_len);\n  }\n\n  return 0;\n}\n\nextern \"C\" uint32_t hci_current_left_tx_packets_left(void);\nextern \"C\" uint32_t hci_current_left_rx_packets_left(void);\nextern \"C\" uint32_t hci_current_rx_packet_complete(void);\nextern \"C\" uint8_t hci_current_rx_aclfreelist_cnt(void);\nvoid bt_drv_reg_op_bt_info_checker(void) {\n#ifdef __CLK_GATE_DISABLE__\n  uint32_t *rx_buf_ptr = NULL;\n  uint32_t *tx_buf_ptr = NULL;\n  uint8_t rx_free_buf_count = 0, i = 0;\n  uint8_t tx_free_buf_count = 0;\n  uint16_t em_buf;\n\n  BT_DRV_REG_OP_ENTER();\n\n  if (bt_util_buf_env_addr) {\n    rx_buf_ptr = (uint32_t *)(bt_util_buf_env_addr +\n                              0x14); // bt_util_buf_env.acl_rx_free\n    tx_buf_ptr = (uint32_t *)(bt_util_buf_env_addr +\n                              0x28); // bt_util_buf_env.acl_tx_free\n  }\n\n  while (rx_buf_ptr && *rx_buf_ptr) {\n    rx_free_buf_count++;\n    rx_buf_ptr = (uint32_t *)(*rx_buf_ptr);\n  }\n\n  uint8_t em_buf_count = 0;\n  for (i = 0; i < 4; i++) {\n    em_buf = BT_DRIVER_GET_U16_REG_VAL(EM_BT_RXACLBUFPTR_ADDR +\n                                       i * REG_EM_BT_RXDESC_SIZE);\n    if (em_buf != 0)\n      em_buf_count++;\n  }\n  BT_DRV_TRACE(\n      4,\n      \"BT_REG_OP: rxbuff = %x,embuff =%x , host rx buff in controller = %x,%x\",\n      rx_free_buf_count, em_buf_count, hci_current_left_rx_packets_left(),\n      bt_drv_reg_op_currentfreeaclbuf_get());\n\n  // check tx buff\n  while (tx_buf_ptr && *tx_buf_ptr) {\n    tx_free_buf_count++;\n    tx_buf_ptr = (uint32_t *)(*tx_buf_ptr);\n  }\n\n  BT_DRV_TRACE(2, \"BT_REG_OP:txbuff = %x,acl tx host  in controller = %x \",\n               tx_free_buf_count, hci_current_left_tx_packets_left());\n\n  bt_drv_reg_op_controller_state_checker();\n  BT_DRV_REG_OP_EXIT();\n#endif\n}\n\n#if 0\nuint32_t *rxbuff;\nuint16_t *send_count;\nuint16_t *free_count;\nuint16_t *bt_send_count;\n#endif\nvoid bt_drv_reg_op_ble_buffer_cleanup(void) {}\n\nstruct ke_timer {\n  /// next ke timer\n  struct ke_timer *next;\n  /// message identifier\n  uint16_t id;\n  /// task identifier\n  uint16_t task;\n  /// time value\n  uint32_t time;\n};\n\nstruct co_list_hdr {\n  /// Pointer to next co_list_hdr\n  struct co_list_hdr *next;\n};\n\n/// structure of a list\nstruct co_list_con {\n  /// pointer to first element of the list\n  struct co_list_hdr *first;\n  /// pointer to the last element\n  struct co_list_hdr *last;\n\n  /// number of element in the list\n  uint32_t cnt;\n  /// max number of element in the list\n  uint32_t maxcnt;\n  /// min number of element in the list\n  uint32_t mincnt;\n};\n\nstruct mblock_free {\n  /// Next free block pointer\n  struct mblock_free *next;\n  /// Previous free block pointer\n  struct mblock_free *previous;\n  /// Size of the current free block (including delimiter)\n  uint16_t free_size;\n  /// Used to check if memory block has been corrupted or not\n  uint16_t corrupt_check;\n};\n\nbool bt_drv_reg_op_get_dbg_state(void) {\n  // dbg_state\n\n  if (dbg_state_addr) {\n    return (*(uint8_t *)dbg_state_addr);\n  } else {\n    return false;\n  }\n}\n\nuint8_t bt_drv_reg_op_get_controller_tx_free_buffer(void) {\n  uint32_t *tx_buf_ptr = NULL;\n  uint8_t tx_free_buf_count = 0;\n\n  if (bt_util_buf_env_addr) {\n    tx_buf_ptr = (uint32_t *)(bt_util_buf_env_addr +\n                              0x28); // bt_util_buf_env.acl_tx_free\n  } else {\n    BT_DRV_TRACE(1, \"REG_OP: please fix %s\", __func__);\n    return 0;\n  }\n\n  // check tx buff\n  while (tx_buf_ptr && *tx_buf_ptr) {\n    tx_free_buf_count++;\n    tx_buf_ptr = (uint32_t *)(*tx_buf_ptr);\n  }\n  return tx_free_buf_count;\n}\n\nuint8_t bt_drv_reg_op_get_controller_ble_tx_free_buffer(void) {\n  uint32_t *tx_buf_ptr = NULL;\n  uint8_t tx_free_buf_count = 0;\n\n  if (em_buf_env_addr) {\n    tx_buf_ptr =\n        (uint32_t *)(em_buf_env_addr + 0x14); // em_buf_env.tx_buff_free\n  } else {\n    BT_DRV_TRACE(1, \"REG_OP: please fix %s\", __func__);\n    return 0;\n  }\n\n  // check tx buff\n  while (tx_buf_ptr && *tx_buf_ptr) {\n    tx_free_buf_count++;\n    tx_buf_ptr = (uint32_t *)(*tx_buf_ptr);\n  }\n\n  return tx_free_buf_count;\n}\n\nvoid bt_drv_reg_op_controller_state_checker(void) {\n  BT_DRV_REG_OP_ENTER();\n\n  if (lc_state_addr != 0) {\n    BT_DRV_TRACE(1, \"BT_REG_OP: LC_STATE=0x%x\", *(uint32_t *)lc_state_addr);\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_tx_flow_checker(void) {\n  BT_DRV_REG_OP_ENTER();\n  uint8_t link_id = 0;\n  uint32_t acl_par_ptr = 0;\n  for (link_id = 0; link_id < 3; link_id++) {\n    if (ld_acl_env_addr) {\n      acl_par_ptr = *(volatile uint32_t *)(ld_acl_env_addr + link_id * 4);\n    }\n\n    if (acl_par_ptr) {\n      BT_DRV_TRACE(2, \"linkid =%d, tx flow=%d\", link_id,\n                   *(uint8_t *)(acl_par_ptr + 0xc0));\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_controller_ble_flow_checker(void) {\n  uint8_t link_id = 0;\n  uint32_t llc_env_tag_ptr = 0;\n  uint32_t ea_elt_tag_ptr = 0;\n  uint32_t *tx_acl_rdy_ptr = NULL;\n  uint32_t *tx_acl_tofree_ptr = NULL;\n  uint32_t tx_acl_rdy_count = 0;\n  uint32_t tx_acl_tofree_count = 0;\n\n  if (!llc_env_addr) {\n    BT_DRV_TRACE(1, \"REG_OP: please fix %s\", __func__);\n    return;\n  }\n\n  for (link_id = 0; link_id < 3; link_id += 1) {\n    llc_env_tag_ptr = *(volatile uint32_t *)(llc_env_addr + link_id * 4);\n    if (!llc_env_tag_ptr) {\n      continue;\n    }\n\n    ea_elt_tag_ptr = *(volatile uint32_t *)(((uint32_t)llc_env_tag_ptr) + 16);\n    if (!ea_elt_tag_ptr) {\n      continue;\n    }\n\n    tx_acl_rdy_ptr = (uint32_t *)(((uint32_t)ea_elt_tag_ptr) + 48);\n    tx_acl_rdy_count = 0;\n    while (tx_acl_rdy_ptr && *tx_acl_rdy_ptr) {\n      tx_acl_rdy_count++;\n      tx_acl_rdy_ptr = (uint32_t *)(*tx_acl_rdy_ptr);\n    }\n\n    tx_acl_tofree_ptr = (uint32_t *)(((uint32_t)ea_elt_tag_ptr) + 68);\n    tx_acl_tofree_count = 0;\n    while (tx_acl_tofree_ptr && *tx_acl_tofree_ptr) {\n      tx_acl_tofree_count++;\n      tx_acl_tofree_ptr = (uint32_t *)(*tx_acl_tofree_ptr);\n    }\n\n    BT_DRV_TRACE(3, \"linkid =%d, ble tx alloc=%d tofree=%d\", link_id,\n                 tx_acl_rdy_count, tx_acl_tofree_count);\n  }\n}\n\nuint8_t bt_drv_reg_op_force_get_lc_state(uint16_t conhdl) {\n  if (lc_state_addr != 0) {\n    // BT_DRV_TRACE(1,\"BT_REG_OP: read LC_STATE=0x%x\",*(uint32_t\n    // *)lc_state_addr);\n    uint8_t idx = btdrv_conhdl_to_linkid(conhdl);\n\n    if (btdrv_is_link_index_valid(idx)) {\n      uint8_t *lc_state = (uint8_t *)lc_state_addr;\n      return lc_state[idx];\n    }\n  }\n  return 0;\n}\nvoid bt_drv_reg_op_force_set_lc_state(uint16_t conhdl, uint8_t state) {\n  // lc_state\n\n  if (lc_state_addr != 0) {\n    BT_DRV_TRACE(1, \"BT_REG_OP: read LC_STATE=0x%x\",\n                 *(uint32_t *)lc_state_addr);\n    uint8_t idx = btdrv_conhdl_to_linkid(conhdl);\n\n    if (btdrv_is_link_index_valid(idx)) {\n      uint8_t *lc_state = (uint8_t *)lc_state_addr;\n      lc_state[idx] = state;\n    }\n  }\n}\n\nvoid bt_drv_reg_op_crash_dump(void) {\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    uint8_t *bt_dump_mem_start = (uint8_t *)bt_ram_start_addr;\n    uint32_t bt_dump_len_max = 0x8000;\n\n    // uint8_t *mcu_dump_mem_start = (uint8_t*)0x20000000;\n    // uint32_t mcu_dump_len_max   = RAM_SIZE;\n\n    // uint8_t *em_dump_area_1_start = (uint8_t*)0xd0220000;\n    // uint32_t em_area_1_len_max    = 0x04A8;\n\n    uint8_t *em_dump_area_2_start = (uint8_t *)0xd0210000;\n    uint32_t em_area_2_len_max = 0x8000;\n\n    BT_DRV_TRACE(1, \"BT_REG_OP:BT 2300p: metal id=%d\", hal_get_chip_metal_id());\n    // first move R3 to R9, lost R9\n    BT_DRV_TRACE(1, \"BT controller BusFault_Handler:\\nREG:[LR] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE));\n    BT_DRV_TRACE(1, \"REG:[R0] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 120));\n    BT_DRV_TRACE(1, \"REG:[R1] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 124));\n    BT_DRV_TRACE(1, \"REG:[R2] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 128));\n    BT_DRV_TRACE(1, \"REG:[R3] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 132));\n    BT_DRV_TRACE(1, \"REG:[R4] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 4));\n    BT_DRV_TRACE(1, \"REG:[R5] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 8));\n    BT_DRV_TRACE(1, \"REG:[R6] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 12));\n    BT_DRV_TRACE(1, \"REG:[R7] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 16));\n    BT_DRV_TRACE(1, \"REG:[R8] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 20));\n    hal_sys_timer_delay(MS_TO_TICKS(100));\n\n    // BT_DRV_TRACE(1,\"REG:[R9] = 0x%08x\",\n    // BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE +24));\n    BT_DRV_TRACE(1, \"REG:[sl] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 28));\n    BT_DRV_TRACE(1, \"REG:[fp] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 32));\n    BT_DRV_TRACE(1, \"REG:[ip] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 36));\n    BT_DRV_TRACE(1, \"REG:[SP,#0] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 40));\n    BT_DRV_TRACE(1, \"REG:[SP,#4] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 44));\n    BT_DRV_TRACE(1, \"REG:[SP,#8] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 48));\n    BT_DRV_TRACE(1, \"REG:[SP,#12] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 52));\n    BT_DRV_TRACE(1, \"REG:[SP,#16] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 56));\n    BT_DRV_TRACE(1, \"REG:[SP,#20] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 60));\n    BT_DRV_TRACE(1, \"REG:[SP,#24] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 64));\n    BT_DRV_TRACE(1, \"REG:[SP,#28] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 68));\n    hal_sys_timer_delay(MS_TO_TICKS(100));\n\n    BT_DRV_TRACE(1, \"REG:[SP,#32] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 72));\n    BT_DRV_TRACE(1, \"REG:[SP,#36] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 76));\n    BT_DRV_TRACE(1, \"REG:[SP,#40] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 80));\n    BT_DRV_TRACE(1, \"REG:[SP,#44] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 84));\n    BT_DRV_TRACE(1, \"REG:[SP,#48] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 88));\n    BT_DRV_TRACE(1, \"REG:[SP,#52] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 92));\n    BT_DRV_TRACE(1, \"REG:[SP,#56] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 96));\n    BT_DRV_TRACE(1, \"REG:[SP,#60] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 100));\n    BT_DRV_TRACE(1, \"REG:[SP,#64] = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 104));\n    BT_DRV_TRACE(1, \"REG:SP = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 108));\n    BT_DRV_TRACE(1, \"REG:MSP = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 112));\n    BT_DRV_TRACE(1, \"REG:PSP = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 116));\n    BT_DRV_TRACE(1, \"REG:CFSR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 120));\n    BT_DRV_TRACE(1, \"REG:BFAR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 124));\n    BT_DRV_TRACE(1, \"REG:HFSR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 128));\n    BT_DRV_TRACE(1, \"REG:ICSR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 132));\n    BT_DRV_TRACE(1, \"REG:AIRCR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 136));\n    BT_DRV_TRACE(1, \"REG:SCR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 140));\n    BT_DRV_TRACE(1, \"REG:CCR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 144));\n    BT_DRV_TRACE(1, \"REG:SHCSR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 148));\n    BT_DRV_TRACE(1, \"REG:AFSR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 152));\n    BT_DRV_TRACE(1, \"REG:MMFAR = 0x%08x\",\n                 BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 156));\n    hal_sys_timer_delay(MS_TO_TICKS(100));\n    // task_message_buffer\n    uint32_t buff_addr = 0;\n\n    if (task_message_buffer_addr) {\n      buff_addr = task_message_buffer_addr;\n    }\n\n    BT_DRV_TRACE(2, \"0xd0330050: 0x%x, 54:0x%x\", *(uint32_t *)0xd0330050,\n                 *(uint32_t *)0xd0330054);\n    BT_DRV_TRACE(2, \"0x400000a0: 0x%x, a4:0x%x\", *(uint32_t *)0x400000a0,\n                 *(uint32_t *)0x400000a4);\n\n    if (g_mem_dump_ctrl_addr) {\n      BT_DRV_TRACE(1, \"LMP addr=0x%x\", *(uint32_t *)(g_mem_dump_ctrl_addr + 4));\n      BT_DRV_TRACE(1, \"STA addr=0x%x\",\n                   *(uint32_t *)(g_mem_dump_ctrl_addr + 0x10));\n      BT_DRV_TRACE(1, \"MSG addr=0x%x\",\n                   *(uint32_t *)(g_mem_dump_ctrl_addr + 0x1c));\n      BT_DRV_TRACE(1, \"SCH addr=0x%x\",\n                   *(uint32_t *)(g_mem_dump_ctrl_addr + 0x28));\n      BT_DRV_TRACE(1, \"ISR addr=0x%x\",\n                   *(uint32_t *)(g_mem_dump_ctrl_addr + 0x34));\n    }\n\n    BT_DRV_TRACE(0, \"task msg buff:\");\n    if (buff_addr != 0) {\n      for (uint8_t j = 0; j < 5; j++) {\n        DUMP8(\"%02x \", (uint8_t *)(buff_addr + j * 20), 20);\n      }\n    }\n    hal_sys_timer_delay(MS_TO_TICKS(100));\n\n    BT_DRV_TRACE(0, \" \");\n    BT_DRV_TRACE(0, \"lmp buff:\");\n    // lmp_message_buffer\n\n    if (lmp_message_buffer_addr) {\n      buff_addr = lmp_message_buffer_addr;\n    }\n\n    if (buff_addr != 0) {\n      for (uint8_t j = 0; j < 10; j++) {\n        DUMP8(\"%02x \", (uint8_t *)(buff_addr + j * 20), 20);\n      }\n    }\n    hal_sys_timer_delay(MS_TO_TICKS(100));\n\n    uint8_t link_id = 0;\n    uint32_t evt_ptr = 0;\n    uint32_t acl_par_ptr = 0;\n    for (link_id = 0; link_id < 3; link_id++) {\n      BT_DRV_TRACE(1, \"acl_par: link id %d\", link_id);\n\n      if (ld_acl_env_addr) {\n        evt_ptr = *(uint32_t *)(ld_acl_env_addr + link_id * 4);\n      }\n\n      if (evt_ptr) {\n        acl_par_ptr = evt_ptr;\n        BT_DRV_TRACE(5,\n                     \"acl_par: acl_par_ptr 0x%x, clk off 0x%x, bit off 0x%x, \"\n                     \"last sync clk off 0x%x, last sync bit off 0x%x\",\n                     acl_par_ptr, *(uint32_t *)(acl_par_ptr + 140),\n                     *(uint16_t *)(acl_par_ptr + 150),\n                     *(uint32_t *)(acl_par_ptr + 136),\n                     ((*(uint32_t *)(acl_par_ptr + 150)) & 0xFFFF0000) >> 16);\n      }\n    }\n    hal_sys_timer_delay(MS_TO_TICKS(100));\n\n    // ld_sco_env\n    evt_ptr = 0;\n\n    if (ld_sco_env_addr) {\n      evt_ptr = *(uint32_t *)ld_sco_env_addr;\n    }\n\n    if (evt_ptr != 0) {\n      BT_DRV_TRACE(1, \"esco linkid :%d\", *(uint8_t *)(evt_ptr + 70));\n      for (link_id = 0; link_id < 3; link_id++) {\n        BT_DRV_TRACE(2, \"bt_linkcntl_linklbl 0x%x: link id %d\",\n                     *(uint16_t *)(EM_BT_LINKCNTL_ADDR + link_id * BT_EM_SIZE),\n                     link_id);\n        BT_DRV_TRACE(\n            1, \"rxcount :%x\",\n            *(uint16_t *)(EM_BT_RXDESCCNT_ADDR + link_id * BT_EM_SIZE));\n      }\n    }\n    btdrv_dump_mem(bt_dump_mem_start, bt_dump_len_max, BT_SUB_SYS_TYPE);\n    // btdrv_dump_mem(em_dump_area_1_start, em_area_1_len_max,\n    // BT_EM_AREA_1_TYPE);\n    btdrv_dump_mem(em_dump_area_2_start, em_area_2_len_max, BT_EM_AREA_2_TYPE);\n    // btdrv_dump_mem(mcu_dump_mem_start, mcu_dump_len_max, MCU_SYS_TYPE);\n  }\n}\n\nuint8_t bt_drv_reg_op_get_tx_pwr(uint16_t connHandle) {\n  uint8_t idx;\n  uint16_t localVal;\n  uint8_t tx_pwr = 0;\n\n  idx = btdrv_conhdl_to_linkid(connHandle);\n\n  if (btdrv_is_link_index_valid(idx)) {\n    localVal = BT_DRIVER_GET_U16_REG_VAL(EM_BT_PWRCNTL_ADDR + idx * BT_EM_SIZE);\n    tx_pwr = ((localVal & ((uint16_t)0x000000FF)) >> 0);\n  }\n\n  return tx_pwr;\n}\n\nvoid bt_drv_reg_op_set_tx_pwr(uint16_t connHandle, uint8_t txpwr) {\n  BT_DRV_REG_OP_ENTER();\n\n  uint8_t idx = btdrv_conhdl_to_linkid(connHandle);\n\n  if (btdrv_is_link_index_valid(idx)) {\n    BT_DRIVER_PUT_U16_REG_VAL(\n        EM_BT_PWRCNTL_ADDR + idx * BT_EM_SIZE,\n        (BT_DRIVER_GET_U16_REG_VAL(EM_BT_PWRCNTL_ADDR + idx * BT_EM_SIZE) &\n         ~((uint16_t)0x000000FF)) |\n            ((uint16_t)txpwr << 0));\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_fix_tx_pwr(uint16_t connHandle) {\n  BT_DRV_REG_OP_ENTER();\n  bt_drv_reg_op_set_tx_pwr(connHandle, LBRT_TX_PWR_FIX);\n  BT_DRV_REG_OP_EXIT();\n}\n\n//#define __ACCESS_MODE_ADJUST_GAIN__\n//#define __SWAGC_MODE_ADJUST_GAIN__\n#define __REBOOT_PAIRING_MODE_ADJUST_GAIN__\n\nvoid bt_drv_reg_op_set_accessible_mode(uint8_t mode) {}\n\nvoid bt_drv_reg_op_set_swagc_mode(uint8_t mode) {}\n\nvoid bt_drv_reg_op_set_reboot_pairing_mode(uint8_t mode) {}\n\nvoid bt_drv_reg_op_force_sco_retrans(bool enable) {\n#ifdef __FORCE_SCO_MAX_RETX__\n  BT_DRV_REG_OP_ENTER();\n  if (enable) {\n    BTDIGITAL_REG_SET_FIELD(0xd0220468, 3, 24, 3);\n  } else {\n    BTDIGITAL_REG_SET_FIELD(0xd0220468, 3, 24, 0);\n  }\n  BT_DRV_REG_OP_EXIT();\n#endif\n}\n\nvoid bt_drv_reg_op_enable_pcm_tx_hw_cal(void) {\n  BT_DRV_REG_OP_ENTER();\n  *(volatile uint32_t *)0xd0220468 |= 1 << 22;\n  *(volatile uint32_t *)0x400000f0 |= 1;\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_monitor_clk(void) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t env0 = 0;\n  uint32_t env1 = 0;\n  uint32_t env2 = 0;\n\n  if (ld_acl_env_addr) {\n    env0 = *(uint32_t *)ld_acl_env_addr;\n    env1 = *(uint32_t *)(ld_acl_env_addr + 4);\n    env1 = *(uint32_t *)(ld_acl_env_addr + 8);\n  }\n\n  if (env0 & bt_ram_start_addr) {\n    env0 += 0x8c;\n    BT_DRV_TRACE(2, \"BT_REG_OP:env0 clk off=%x %x\", *(uint32_t *)env0,\n                 *(uint16_t *)EM_BT_CLKOFF0_ADDR |\n                     (*(uint16_t *)EM_BT_CLKOFF1_ADDR << 16));\n  }\n  if (env1 & bt_ram_start_addr) {\n    env1 += 0x8c;\n    BT_DRV_TRACE(2, \"BT_REG_OP:env1 clk off=%x %x\", *(uint32_t *)env1,\n                 *(uint16_t *)(EM_BT_CLKOFF0_ADDR + BT_EM_SIZE) |\n                     (*(uint16_t *)(EM_BT_CLKOFF1_ADDR + BT_EM_SIZE) << 16));\n  }\n  if (env2 & bt_ram_start_addr) {\n    env2 += 0x8c;\n    BT_DRV_TRACE(\n        2, \"BT_REG_OP:env2 clk off=%x %x\", *(uint32_t *)env2,\n        *(uint16_t *)(EM_BT_CLKOFF0_ADDR + BT_EM_SIZE * 2) |\n            (*(uint16_t *)(EM_BT_CLKOFF1_ADDR + BT_EM_SIZE * 2) << 16));\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nbool bt_drv_reg_op_read_rssi_in_dbm(uint16_t connHandle, rx_agc_t *rx_val) {\n#ifdef BT_RSSI_MONITOR\n  BT_DRV_REG_OP_ENTER();\n\n  if (connHandle == 0xFFFF)\n    return false;\n\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    uint8_t idx = btdrv_conhdl_to_linkid(connHandle);\n    /// Accumulated RSSI (to compute an average value)\n    int16_t rssi_acc = 0;\n    /// Counter of received packets used in RSSI average\n    uint8_t rssi_avg_cnt = 1;\n    rx_agc_t *rx_monitor_env = NULL;\n\n    if (!btdrv_is_link_index_valid(idx)) {\n      return false;\n    }\n\n    // rx_monitor\n    if (rx_monitor_addr) {\n      rx_monitor_env = (rx_agc_t *)rx_monitor_addr;\n    }\n\n    if (rx_monitor_env != NULL) {\n      for (int i = 0; i < rssi_avg_cnt; i++) {\n        rssi_acc += rx_monitor_env[idx].rssi;\n      }\n      rx_val->rssi = rssi_acc / rssi_avg_cnt;\n      rx_val->rxgain = rx_monitor_env[idx].rxgain;\n    }\n  }\n\n  BT_DRV_REG_OP_EXIT();\n  return true;\n#else\n  return false;\n#endif\n}\n\nbool bt_drv_reg_op_read_ble_rssi_in_dbm(uint16_t connHandle, rx_agc_t *rx_val) {\n#ifdef BT_RSSI_MONITOR\n  BT_DRV_REG_OP_ENTER();\n\n  if (connHandle == 0xFFFF)\n    return false;\n\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    uint8_t idx = connHandle;\n    /// Accumulated RSSI (to compute an average value)\n    int16_t rssi_acc = 0;\n    /// Counter of received packets used in RSSI average\n    uint8_t rssi_avg_cnt = 1;\n    rx_agc_t *rx_monitor_env = NULL;\n    if (idx > 2)\n      return false; // invalid idx\n\n    // rx_monitor\n\n    if (ble_rx_monitor_addr) {\n      rx_monitor_env = (rx_agc_t *)ble_rx_monitor_addr;\n    }\n\n    if (rx_monitor_env != NULL) {\n      for (int i = 0; i < rssi_avg_cnt; i++) {\n        rssi_acc += rx_monitor_env[idx].rssi;\n      }\n      rx_val->rssi = rssi_acc / rssi_avg_cnt;\n      rx_val->rxgain = rx_monitor_env[idx].rxgain;\n    }\n  }\n\n  BT_DRV_REG_OP_EXIT();\n  return true;\n#else\n  return false;\n#endif\n}\n\nvoid bt_drv_reg_op_acl_silence(uint16_t connHandle, uint8_t silence) {\n  BT_DRV_REG_OP_ENTER();\n\n  uint8_t idx = btdrv_conhdl_to_linkid(connHandle);\n\n  if (btdrv_is_link_index_valid(idx)) {\n    BT_DRIVER_PUT_U16_REG_VAL(\n        EM_BT_BT_EXT1_ADDR + idx * BT_EM_SIZE,\n        (BT_DRIVER_GET_U16_REG_VAL(EM_BT_BT_EXT1_ADDR + idx * BT_EM_SIZE) &\n         ~((uint16_t)0x00008000)) |\n            ((uint16_t)silence << 15));\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\n/// sniffer connect information environment structure\nstruct ld_sniffer_connect_env {\n  ///\n  uint16_t bitoff;\n  ///\n  uint32_t clk_offset;\n  ///\n  uint8_t map[10];\n  ///\n  uint32_t afh_instant;\n  ///\n  uint8_t afh_mode;\n  ///\n  uint8_t enc_mode;\n  ///\n  uint8_t ltk[16];\n  ///\n  uint8_t role;\n};\n\nvoid bt_drv_reg_op_call_monitor(uint16_t connHandle, uint8_t tws_role) {}\n\nvoid bt_drv_reg_op_lock_sniffer_sco_resync(void) {}\n\nvoid bt_drv_reg_op_unlock_sniffer_sco_resync(void) {}\n\nvoid bt_drv_reg_op_ibrt_retx_att_nb_set(uint8_t retx_nb) {\n  BT_DRV_REG_OP_ENTER();\n\n  int ret = -1;\n  uint32_t sco_evt_ptr = 0x0;\n  // TODO: [ld_sco_env address] based on CHIP id\n\n  if (ld_sco_env_addr) {\n    sco_evt_ptr = *(volatile uint32_t *)ld_sco_env_addr;\n    ret = 0;\n  }\n\n  if (ret == 0) {\n    uint32_t retx_ptr = 0x0;\n    if (sco_evt_ptr != 0) {\n      // offsetof(struct ea_elt_tag, env) + sizeof(struct ld_sco_evt_params)\n      retx_ptr = sco_evt_ptr + 0x44;\n    } else {\n      BT_DRV_TRACE(0, \"BT_REG_OP:Error, ld_sco_env[0].evt ==NULL\");\n      ret = -2;\n    }\n\n    if (ret == 0) {\n      *(volatile uint8_t *)retx_ptr = retx_nb;\n    }\n  }\n\n  BT_DRV_TRACE(3, \"BT_REG_OP:%s,ret=%d,retx nb=%d\", __func__, ret, retx_nb);\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_acl_tx_type_set(uint16_t hciHandle, uint8_t slot_sel) {\n  uint32_t lc_ptr = 0;\n  uint32_t acl_par_ptr = 0;\n  uint32_t packet_type_addr = 0;\n  // lc_env and ld_acl_env\n\n  if (lc_env_addr) {\n    lc_ptr = *(uint32_t *)(lc_env_addr + (hciHandle - 0x80) * 4);\n  }\n\n  if (ld_acl_env_addr) {\n    acl_par_ptr = *(uint32_t *)(ld_acl_env_addr + (hciHandle - 0x80) * 4);\n  }\n\n  // sanity check\n  if (lc_ptr == 0) {\n    return;\n  } else {\n    packet_type_addr = (uint32_t)(acl_par_ptr + 176);\n    BT_DRV_TRACE(3, \"BT_REG_OP:%s   hdl=0x%x packet_types=0x%x\", __func__,\n                 hciHandle, *(uint16_t *)(packet_type_addr));\n    BT_DRV_TRACE(2, \"BT_REG_OP:lc_ptr 0x%x, acl_par_ptr 0x%x\", lc_ptr,\n                 acl_par_ptr);\n    uint16_t edr_type = 0;\n    if (slot_sel == USE_1_SLOT_PACKET) {\n#if defined(__3M_PACK__)\n      edr_type = (1 << DM1_IDX) | (1 << DH1_2_IDX) | (1 << DH1_3_IDX);\n#else\n      edr_type = (1 << DM1_IDX) | (1 << DH1_2_IDX);\n#endif\n    } else if (slot_sel == USE_3_SLOT_PACKET) {\n#if defined(__3M_PACK__)\n      edr_type = (1 << DM1_IDX) | (1 << DH1_2_IDX) | (1 << DH1_3_IDX) |\n                 (1 << DH3_2_IDX) | (1 << DH3_3_IDX);\n#else\n      edr_type = (1 << DM1_IDX) | (1 << DH1_2_IDX) | (1 << DH3_2_IDX);\n#endif\n    } else if (slot_sel == USE_5_SLOT_PACKET) {\n#if defined(__3M_PACK__)\n      edr_type = (1 << DM1_IDX) | (1 << DH1_2_IDX) | (1 << DH1_3_IDX) |\n                 (1 << DH3_2_IDX) | (1 << DH3_3_IDX) | (1 << DH5_2_IDX) |\n                 (1 << DH5_3_IDX);\n#else\n      edr_type = (1 << DM1_IDX) | (1 << DH1_2_IDX) | (1 << DH3_2_IDX) |\n                 (1 << DH5_2_IDX);\n#endif\n    }\n    *(uint16_t *)(packet_type_addr) =\n        ((edr_type << 8) | (*(uint16_t *)(packet_type_addr)&0xff));\n\n    BT_DRV_TRACE(1, \"BT_REG_OP:After op,packet_types 0x%x\",\n                 *(uint16_t *)(packet_type_addr));\n  }\n}\n\nvoid bt_drv_reg_op_acl_tx_type_trace(uint16_t hciHandle) {\n  uint32_t acl_par_ptr = 0;\n  uint32_t packet_type_addr = 0;\n  // ld_acl_env\n\n  if (ld_acl_env_addr) {\n    acl_par_ptr = *(uint32_t *)(ld_acl_env_addr + (hciHandle - 0x80) * 4);\n  }\n\n  // sanity check\n  if (acl_par_ptr == 0) {\n    return;\n  } else {\n    packet_type_addr = (uint32_t)(acl_par_ptr + 176);\n    BT_DRV_TRACE(1, \"BT_REG_OP:tx packet_types=0x%x\",\n                 *(uint16_t *)(packet_type_addr));\n  }\n}\n\nuint8_t bt_drv_reg_op_acl_tx_type_get(uint16_t hciHandle, uint8_t *br_type,\n                                      uint8_t *edr_type) {\n  uint8_t status = 0xff;\n  uint32_t lc_ptr = 0;\n  uint32_t acl_par_ptr = 0;\n  uint32_t packet_type_addr = 0;\n\n  if (lc_env_addr) {\n    lc_ptr = *(uint32_t *)(lc_env_addr + (hciHandle - 0x80) * 4);\n  }\n\n  if (ld_acl_env_addr) {\n    acl_par_ptr = *(uint32_t *)(ld_acl_env_addr + (hciHandle - 0x80) * 4);\n  }\n\n  // sanity check\n  if (lc_ptr == 0) {\n    BT_DRV_TRACE(2, \"BT_REG_OP:%s hdl=0x%x,lc_env_ptr = NULL\", __func__,\n                 hciHandle);\n  } else {\n    packet_type_addr = (uint32_t)(acl_par_ptr + 176);\n    uint16_t packet_type = *(uint16_t *)(packet_type_addr);\n    if (br_type) {\n      *br_type = packet_type & 0xff;\n    }\n    if (edr_type) {\n      *br_type = (packet_type >> 8) & 0xff;\n    }\n    status = 0;\n    BT_DRV_TRACE(3, \"BT_REG_OP:%s hdl=0x%x packet_types=0x%x\", __func__,\n                 hciHandle, packet_type);\n  }\n\n  return status;\n}\n\nuint16_t em_bt_bitoff_getf(int elt_idx) {\n  uint16_t localVal = BTDIGITAL_BT_EM(EM_BT_BITOFF_ADDR + elt_idx * BT_EM_SIZE);\n  ASSERT_ERR((localVal & ~((uint16_t)0x000003FF)) == 0);\n  return (localVal >> 0);\n}\n\nvoid em_bt_bitoff_setf(int elt_idx, uint16_t bitoff) {\n  ASSERT_ERR((((uint16_t)bitoff << 0) & ~((uint16_t)0x000003FF)) == 0);\n  BTDIGITAL_EM_BT_WR(EM_BT_BITOFF_ADDR + elt_idx * BT_EM_SIZE,\n                     (uint16_t)bitoff << 0);\n}\n\nvoid em_bt_clkoff0_setf(int elt_idx, uint16_t clkoff0) {\n  ASSERT_ERR((((uint16_t)clkoff0 << 0) & ~((uint16_t)0x0000FFFF)) == 0);\n  BTDIGITAL_EM_BT_WR(EM_BT_CLKOFF0_ADDR + elt_idx * BT_EM_SIZE,\n                     (uint16_t)clkoff0 << 0);\n}\n\nuint16_t em_bt_clkoff0_getf(int elt_idx) {\n  uint16_t localVal =\n      BTDIGITAL_BT_EM(EM_BT_CLKOFF0_ADDR + elt_idx * BT_EM_SIZE);\n  ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0);\n  return (localVal >> 0);\n}\nvoid em_bt_clkoff1_setf(int elt_idx, uint16_t clkoff1) {\n  ASSERT_ERR((((uint16_t)clkoff1 << 0) & ~((uint16_t)0x000007FF)) == 0);\n  BTDIGITAL_EM_BT_WR(EM_BT_CLKOFF1_ADDR + elt_idx * BT_EM_SIZE,\n                     (uint16_t)clkoff1 << 0);\n}\n\nuint16_t em_bt_clkoff1_getf(int elt_idx) {\n  uint16_t localVal =\n      BTDIGITAL_BT_EM(EM_BT_CLKOFF1_ADDR + elt_idx * BT_EM_SIZE);\n  ASSERT_ERR((localVal & ~((uint16_t)0x000007FF)) == 0);\n  return (localVal >> 0);\n}\n\nvoid em_bt_wincntl_pack(int elt_idx, uint8_t rxwide, uint16_t rxwinsz) {\n  ASSERT_ERR((((uint16_t)rxwide << 15) & ~((uint16_t)0x00008000)) == 0);\n  ASSERT_ERR((((uint16_t)rxwinsz << 0) & ~((uint16_t)0x00000FFF)) == 0);\n  BTDIGITAL_EM_BT_WR(EM_BT_WINCNTL_ADDR + elt_idx * BT_EM_SIZE,\n                     ((uint16_t)rxwide << 15) | ((uint16_t)rxwinsz << 0));\n}\n\nvoid bt_drv_reg_op_update_sniffer_bitoffset(uint16_t mobile_conhdl,\n                                            uint16_t master_conhdl) {}\n\nvoid bt_drv_reg_op_modify_bitoff_timer(uint16_t time_out) {}\n\nvoid bt_drv_reg_op_cs_monitor(void) {\n  uint32_t addr;\n  addr = BT_EM_ADDR_BASE + 0x1e;\n  BT_DRV_TRACE(0, \"BT_REG_OP:AFH 0:\");\n  DUMP8(\"%02x \", (uint8_t *)addr, 10);\n  addr = BT_EM_ADDR_BASE + 0x1e + 110;\n  BT_DRV_TRACE(0, \"AFH 1:\");\n  DUMP8(\"%02x \", (uint8_t *)addr, 10);\n  addr = BT_EM_ADDR_BASE + 0x1e + 220;\n  BT_DRV_TRACE(0, \"AFH 2:\");\n  DUMP8(\"%02x \", (uint8_t *)addr, 10);\n  uint32_t tmp1, tmp2, tmp3;\n  tmp1 = BT_EM_ADDR_BASE + 0x8;\n  tmp2 = BT_EM_ADDR_BASE + 0x8 + 110;\n  tmp3 = BT_EM_ADDR_BASE + 0x8 + 220;\n  BT_DRV_TRACE(3, \"AFH EN:%x %x %x \", *(uint16_t *)tmp1, *(uint16_t *)tmp2,\n               *(uint16_t *)tmp3);\n  tmp1 = BT_EM_ADDR_BASE + 0x28;\n  tmp2 = BT_EM_ADDR_BASE + 0x28 + 110;\n  tmp3 = BT_EM_ADDR_BASE + 0x28 + 220;\n  BT_DRV_TRACE(3, \"AFH ch num:%x %x %x \", *(uint16_t *)tmp1, *(uint16_t *)tmp2,\n               *(uint16_t *)tmp3);\n\n  tmp1 = BT_EM_ADDR_BASE + 0x4;\n  tmp2 = BT_EM_ADDR_BASE + 0x4 + 110;\n  tmp3 = BT_EM_ADDR_BASE + 0x4 + 220;\n  BT_DRV_TRACE(3, \"clk off:%x %x %x \", *(uint32_t *)tmp1, *(uint32_t *)tmp2,\n               *(uint32_t *)tmp3);\n\n  tmp1 = BT_EM_ADDR_BASE + 0x2;\n  tmp2 = BT_EM_ADDR_BASE + 0x2 + 110;\n  tmp3 = BT_EM_ADDR_BASE + 0x2 + 220;\n  BT_DRV_TRACE(3, \"bitoff:%x %x %x \", *(uint16_t *)tmp1, *(uint16_t *)tmp2,\n               *(uint16_t *)tmp3);\n}\n\nvoid bt_drv_reg_op_ble_llm_substate_hacker(void) {}\n\nbool bt_drv_reg_op_check_esco_acl_sniff_conflict(uint16_t hciHandle) {\n  return false;\n}\n\nvoid bt_drv_reg_op_esco_acl_sniff_delay_cal(uint16_t hciHandle, bool enable) {}\n\nuint8_t bt_drv_reg_op_get_role(uint8_t linkid) {\n  uint32_t lc_evt_ptr = 0;\n  uint32_t role_ptr = 0;\n\n  if (lc_env_addr) {\n    lc_evt_ptr = *(volatile uint32_t *)(lc_env_addr + linkid * 4); // lc_env\n  }\n\n  if (lc_evt_ptr != 0) {\n    role_ptr = lc_evt_ptr + 0x40;\n  } else {\n    BT_DRV_TRACE(1, \"BT_REG_OP:ERROR LINKID =%x\", linkid);\n    return 0xFF;\n  }\n  return *(uint8_t *)role_ptr;\n}\n\nvoid bt_drv_reg_op_set_tpoll(uint8_t linkid, uint16_t poll_interval) {\n  uint32_t acl_evt_ptr = 0x0;\n  uint32_t poll_addr;\n\n  if (ld_acl_env_addr) {\n    acl_evt_ptr = *(uint32_t *)(ld_acl_env_addr + linkid * 4);\n  }\n\n  if (acl_evt_ptr != 0) {\n    poll_addr = acl_evt_ptr + 0xb8;\n    *(uint16_t *)poll_addr = poll_interval;\n  } else {\n    BT_DRV_TRACE(1, \"BT_REG_OP:ERROR LINK ID FOR TPOLL %x\", linkid);\n  }\n}\n\nint8_t bt_drv_reg_op_rssi_correction(int8_t rssi) {\n#ifdef __HW_AGC__\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    // the rssi is already corrected\n    return rssi;\n  }\n#endif\n\n  return rssi;\n}\n\nvoid bt_drv_reg_op_set_music_link(uint8_t link_id) {\n  // dbg_bt_setting.music_playing_link\n  if (dbg_bt_setting_addr) {\n    *(uint8_t *)(dbg_bt_setting_addr + 0x10) = link_id;\n  }\n}\n\nvoid bt_drv_reg_op_set_music_link_duration_extra(uint8_t slot) {\n  if (dbg_bt_setting_addr) {\n    *(uint32_t *)(dbg_bt_setting_addr + 0x14) = slot * 625;\n  }\n}\n\nvoid bt_drv_reg_op_set_hwagc_read_en(uint8_t en) {}\nuint32_t bt_drv_reg_op_get_reconnecting_flag() {\n  uint32_t ret = 0;\n\n  if (reconnecting_flag_addr) {\n    ret = *(uint32_t *)reconnecting_flag_addr;\n  }\n  return ret;\n}\n\nvoid bt_drv_reg_op_set_reconnecting_flag() {\n\n  if (reconnecting_flag_addr) {\n    *(uint32_t *)reconnecting_flag_addr = 1;\n  }\n}\n\nvoid bt_drv_reg_op_clear_reconnecting_flag() {\n\n  if (reconnecting_flag_addr) {\n    *(uint32_t *)reconnecting_flag_addr = 0;\n  }\n}\n\nvoid bt_drv_reg_op_music_link_config(uint16_t active_link, uint8_t active_role,\n                                     uint16_t inactive_link,\n                                     uint8_t inactive_role) {\n  BT_DRV_TRACE(4, \"BT_REG_OP:bt_drv_reg_op_music_link_config %x %d %x %d\",\n               active_link, active_role, inactive_link, inactive_role);\n  if (active_role == 0) // MASTER\n  {\n    bt_drv_reg_op_set_tpoll(active_link - 0x80, 0x10);\n    if (inactive_role == 0) {\n      bt_drv_reg_op_set_tpoll(inactive_link - 0x80, 0x40);\n    }\n  } else {\n    bt_drv_reg_op_set_music_link(active_link - 0x80);\n    bt_drv_reg_op_set_music_link_duration_extra(11);\n    if (inactive_role == 0) {\n      bt_drv_reg_op_set_tpoll(inactive_link - 0x80, 0x40);\n    }\n  }\n}\n\nbool bt_drv_reg_op_check_bt_controller_state(void) {\n  bool ret = true;\n  BT_DRV_REG_OP_ENTER();\n  if (hal_sysfreq_get() <= HAL_CMU_FREQ_32K)\n    return ret;\n\n  if ((BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 0) == 0x00) &&\n      (BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE + 8) == MIC_BUFF_addr))\n    ret = true;\n  else\n    ret = false;\n\n  if (false == ret) {\n    BT_DRV_TRACE(0, \"controller dead!!!\");\n    btdrv_trigger_coredump();\n  }\n\n  BT_DRV_REG_OP_EXIT();\n  return ret;\n}\n\nvoid bt_drv_reg_op_piconet_clk_offset_get(uint16_t connHandle,\n                                          int32_t *clock_offset,\n                                          uint16_t *bit_offset) {\n  uint8_t index = 0;\n  uint32_t clock_offset_raw = 0;\n\n  BT_DRV_REG_OP_ENTER();\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_0) {\n    if (connHandle) {\n      index = btdrv_conhdl_to_linkid(connHandle);\n\n      if (btdrv_is_link_index_valid(index)) {\n        *bit_offset = em_bt_bitoff_getf(index);\n        clock_offset_raw =\n            (em_bt_clkoff1_getf(index) << 16) | em_bt_clkoff0_getf(index);\n        *clock_offset = clock_offset_raw;\n        *clock_offset = (*clock_offset << 5) >> 5;\n      } else {\n        *bit_offset = 0;\n        *clock_offset = 0;\n      }\n    } else {\n      *bit_offset = 0;\n      *clock_offset = 0;\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_afh_env_reset(void) {\n  BT_DRV_REG_OP_ENTER();\n  int ret = -1;\n  uint32_t ld_afh_env_addr = 0x0;\n\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0) {\n    ld_afh_env_addr = ld_env_addr + 0x198;\n    ret = 0;\n\n    if (ret == 0) {\n      struct ld_afh_env *ld_afh_env = (struct ld_afh_env *)ld_afh_env_addr;\n      if (ld_afh_env) {\n        BT_DRV_TRACE(0, \"BT_REG_OP:reset ld_afh_env\");\n        ld_afh_env->rf_rssi_interf_thr = BT_AFH_RSSI_INTERF_THR;\n        ld_afh_env->afh_update_period = BT_AFH_UPDATE_PERIOD;\n        ld_afh_env->afh_access_valid_to = BT_AFH_ASSESS_VALID_TO;\n        ld_afh_env->afh_reaccess_to = BT_AFH_REASSESS_TO;\n        ld_afh_env->afh_access_count_max = BT_AFH_ASSESS_COUNT_MAX;\n        ld_afh_env->afh_access_count_thr_good = BT_AFH_ASSESS_COUNT_THR_GOOD;\n        ld_afh_env->afh_access_count_thr_bad = BT_AFH_ASSESS_COUNT_THR_BAD;\n        ld_afh_env->afh_access_count_min = BT_AFH_ASSESS_COUNT_MIN;\n      }\n    }\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_dma_tc_clkcnt_get(uint32_t *btclk, uint16_t *btcnt) {\n  BT_DRV_REG_OP_ENTER();\n  *btclk = *((volatile uint32_t *)0xd02201fc);\n  *btcnt = *((volatile uint32_t *)0xd02201f8);\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid em_bt_bt_ext1_tx_silence_setf(int elt_idx, uint8_t txsilence) {\n  ASSERT_ERR((((uint16_t)txsilence << 15) & ~((uint16_t)0x00008000)) == 0);\n  BTDIGITAL_EM_BT_WR(\n      EM_BT_BT_EXT1_ADDR + elt_idx * BT_EM_SIZE,\n      (BTDIGITAL_BT_EM(EM_BT_BT_EXT1_ADDR + elt_idx * BT_EM_SIZE) &\n       ~((uint16_t)0x00008000)) |\n          ((uint16_t)txsilence << 15));\n}\n\nvoid em_bt_bt_ext1_bw_2m_setf(int elt_idx, uint8_t bw2m) {\n  ASSERT_ERR((((uint16_t)bw2m << 11) & ~((uint16_t)0x00000800)) == 0);\n  BTDIGITAL_EM_BT_WR(\n      EM_BT_BT_EXT1_ADDR + elt_idx * BT_EM_SIZE,\n      (BTDIGITAL_BT_EM(EM_BT_BT_EXT1_ADDR + elt_idx * BT_EM_SIZE) &\n       ~((uint16_t)0x00000800)) |\n          ((uint16_t)bw2m << 11));\n}\n\nvoid em_bt_bt_ext1_sco_tx_silence_setf(int elt_idx, uint8_t scotxsilence) {\n  ASSERT_ERR((((uint16_t)scotxsilence << 13) & ~((uint16_t)0x00002000)) == 0);\n  BTDIGITAL_EM_BT_WR(\n      EM_BT_BT_EXT1_ADDR + elt_idx * BT_EM_SIZE,\n      (BTDIGITAL_BT_EM(EM_BT_BT_EXT1_ADDR + elt_idx * BT_EM_SIZE) &\n       ~((uint16_t)0x00002000)) |\n          ((uint16_t)scotxsilence << 13));\n}\n\nvoid bt_drv_reg_op_acl_tx_silence(uint16_t connHandle, uint8_t on) {\n  return;\n  BT_DRV_REG_OP_ENTER();\n  uint8_t idx = btdrv_conhdl_to_linkid(connHandle);\n  BT_DRV_TRACE(2, \"BT_REG_OP:BT ACL tx silence idx=%d,on=%d\\n\", idx, on);\n\n  if (btdrv_is_link_index_valid(idx)) {\n    if (TX_SILENCE_ON == on) {\n      // config ACL silence cs\n      em_bt_bt_ext1_tx_silence_setf(idx, TX_SILENCE_ON);\n      if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n        // config SCO silence cs\n        em_bt_bt_ext1_sco_tx_silence_setf(idx, TX_SILENCE_ON);\n        // select ACL silence\n        BTDIGITAL_REG_SET_FIELD(0xd02204a8, 3, 2, 2);\n      }\n    } else if (TX_SILENCE_OFF == on) {\n      // config ACL silence cs\n      em_bt_bt_ext1_tx_silence_setf(idx, TX_SILENCE_OFF);\n      if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n        // config SCO silence cs\n        em_bt_bt_ext1_sco_tx_silence_setf(idx, TX_SILENCE_OFF);\n        // select ACL silence\n        BTDIGITAL_REG_SET_FIELD(0xd02204a8, 3, 2, 3);\n      }\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_acl_tx_silence_clear(uint16_t connHandle) {\n  uint8_t idx = btdrv_conhdl_to_linkid(connHandle);\n\n  BT_DRV_TRACE(1, \"BT_REG_OP:ACL tx silence clear idx=%d\\n\", idx);\n\n  if (btdrv_is_link_index_valid(idx)) {\n    em_bt_bt_ext1_tx_silence_setf(idx, TX_SILENCE_OFF);\n    if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n      // config SCO silence cs\n      em_bt_bt_ext1_sco_tx_silence_setf(idx, TX_SILENCE_OFF);\n      // select ACL silence\n      BTDIGITAL_REG_SET_FIELD(0xd02204a8, 3, 2, 3);\n    }\n  }\n  bt_drv_reg_op_resume_fast_ack_with_mobile();\n}\n\nvoid bt_drv_reg_op_sw_seq_filter(uint16_t connHandle) {}\n\nvoid bt_drv_reg_op_pcm_set(uint8_t en) {\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n    if (en)\n      *(volatile unsigned int *)(0xd02204a8) &= 0xffffffdf;\n    else\n      *(volatile unsigned int *)(0xd02204a8) |= 1 << 5;\n  }\n}\nuint8_t bt_drv_reg_op_pcm_get() {\n  uint8_t ret = 1;\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n    ret = (*(volatile unsigned int *)(0xd02204a8) & 0x00000020) >> 5;\n  }\n  return ~ret;\n}\nvoid bt_drv_reg_op_clear_skip_flag() {}\n\nvoid bt_drv_reg_op_clean_flags_of_ble_and_sco(void) {\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0) {\n    // 0xc0006a18,////sco_find_sync_flag\n    // 0xc000699c,///ble_sco_need_move_flag\n    // 0xc000693c,///prev_conflict_type_record\n    // 0xc000099f,///anchor_resume_flag\n    ASSERT(*(uint32_t *)0xc0006a14 == 0xc0006a18,\n           \"ERROR 2300pt1 sco_find_sync_flag!\");\n    ASSERT(*(uint32_t *)0xc0006998 == 0xc000699c,\n           \"ERROR 2300pt1 ble_sco_need_move_flag!\");\n    ASSERT(*(uint32_t *)0xc0006938 == 0xc000693c,\n           \"ERROR 2300pt1 prev_conflict_type_record!\");\n    // BT_DRV_TRACE(4,\"0xc0006a18=%x,0xc000699c=%x,0xc000693c=%x,0xc000099f=%x\\n\",*(volatile\n    // uint32_t *)0xc0006a18,*(volatile uint32_t *)0xc000699c,*(volatile\n    // uint32_t\n    // *)0xc000693c,*(volatile uint32_t *)0xc000099f);\n    *(volatile uint32_t *)0xc0006a18 = 0;\n    *(volatile uint32_t *)0xc0006a88 = 0;\n    *(volatile uint32_t *)0xc000693c = 0;\n    *(volatile uint32_t *)0xc000099f = 0;\n  }\n}\n\nconst uint8_t msbc_mute_patten[] = {\n    0x01, 0x38, 0xad, 0x0,  0x0,  0xc5, 0x0,  0x0,  0x0,  0x0,  0x77, 0x6d,\n    0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d, 0xdd, 0xb6, 0xdb, 0x77,\n    0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d, 0xdd, 0xb6, 0xdb,\n    0x77, 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d, 0xdd, 0xb6,\n    0xdb, 0x77, 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6c, 0x00};\n#define SCO_TX_FIFO_BASE (0xd0210000)\n\n#if defined(CVSD_BYPASS)\n#define SCO_TX_MUTE_PATTERN (0x5555)\n#else\n#define SCO_TX_MUTE_PATTERN (0x0000)\n#endif\n\nvoid bt_drv_reg_op_sco_txfifo_reset(uint16_t codec_id) {\n  uint32_t reg_val = BTDIGITAL_REG(0xd0220148);\n  uint32_t reg_offset0, reg_offset1;\n  uint16_t *patten_p = (uint16_t *)msbc_mute_patten;\n\n  reg_offset0 = (reg_val & 0xffff);\n  reg_offset1 = (reg_val >> 16) & 0xffff;\n\n  if (codec_id == 2) {\n    for (uint8_t i = 0; i < 60; i += 2) {\n      BTDIGITAL_BT_EM(SCO_TX_FIFO_BASE + reg_offset0 + i) = *patten_p;\n      BTDIGITAL_BT_EM(SCO_TX_FIFO_BASE + reg_offset1 + i) = *patten_p;\n      patten_p++;\n    }\n  } else {\n    for (uint8_t i = 0; i < 120; i += 2) {\n      BTDIGITAL_BT_EM(SCO_TX_FIFO_BASE + reg_offset0 + i) = SCO_TX_MUTE_PATTERN;\n      BTDIGITAL_BT_EM(SCO_TX_FIFO_BASE + reg_offset1 + i) = SCO_TX_MUTE_PATTERN;\n    }\n  }\n}\n\n/*****************************************************************************\n Prototype    : btdrv_set_tws_acl_poll_interval\n Description  : in ibrt mode, set tws acl poll interval\n Input        : uint16_t poll_interval\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/19\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid btdrv_reg_op_set_private_tws_poll_interval(uint16_t poll_interval,\n                                                uint16_t poll_interval_in_sco) {\n  BT_DRV_TRACE(\n      2,\n      \"BT_REG_OP:Set private tws interval,acl interv=%d,acl interv insco =%d\",\n      poll_interval, poll_interval_in_sco);\n\n  if (dbg_bt_setting_addr) {\n    *(volatile uint16_t *)(dbg_bt_setting_addr + 0x40) = poll_interval;\n    *(volatile uint16_t *)(dbg_bt_setting_addr + 0x42) = poll_interval_in_sco;\n  }\n}\n\nvoid btdrv_reg_op_set_tws_link_duration(uint8_t slot_num) {\n  BT_DRV_REG_OP_ENTER();\n  // dbg_setting address\n  uint32_t op_addr = 0;\n\n  if (dbg_bt_setting_addr) {\n    op_addr = dbg_bt_setting_addr;\n  }\n\n  if (op_addr != 0) {\n    // uint16_t acl_slot = dbg_setting->acl_slot_in_snoop_mode;\n    uint16_t val = *(volatile uint16_t *)(op_addr + 0x44);\n    val &= 0xff00;\n    val |= slot_num;\n    *(volatile uint16_t *)(op_addr + 0x44) = val;\n    BT_DRV_TRACE(1, \"BT_REG_OP:Set private tws link duration,val=%d\",\n                 *((volatile uint16_t *)(op_addr + 0x44)) & 0xff);\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid btdrv_reg_op_enable_private_tws_schedule(bool enable) {\n  BT_DRV_REG_OP_ENTER();\n  // sniffer_env\n  uint32_t op_addr = 0;\n\n  if (sniffer_env_addr) {\n    op_addr = sniffer_env_addr;\n  }\n\n  if (op_addr != 0) {\n    // sniffer_env.acl_switch_flag.in_process\n    uint16_t val = *((volatile uint16_t *)(op_addr + 0x7e));\n    val &= 0xff;\n    if (enable) {\n      val |= 1 << 8;\n    }\n    *((volatile uint16_t *)(op_addr + 0x7e)) = val;\n    BT_DRV_TRACE(1, \"BT_REG_OP:Enable private tws function,flag=%d\",\n                 (*((volatile uint16_t *)(op_addr + 0x7e))) >> 8);\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_decrease_tx_pwr_when_reconnect(bool enable) {\n\n  if (enable) {\n    BT_DRV_TRACE(0, \"BT_REG_OP:Decrese tx pwr\");\n    // drease defualt TX pwr\n    BTDIGITAL_REG(0xd0350300) = 0x33;\n  } else {\n    BT_DRV_TRACE(0, \"BT_REG_OP:Increase tx pwr\");\n    // resume defualt TX pwr\n    BTDIGITAL_REG(0xd0350300) = 0x11;\n  }\n}\n/*\n    rwip_heap_env\n    from addr=0xc00027b8 left_length=6K\n    rwip_heap_non_ret\n    from addr=0xc00052b8 left_length=1.5K\n*/\nvoid bt_drv_reg_op_controller_mem_log_config(void) {\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    uint32_t each_log_length = 0x200;          // 512Byte\n    uint32_t lmp_mem_addr = 0xc00027b8 + 0x64; // lmp:each_log_length\n    uint32_t msg_mem_addr =\n        lmp_mem_addr + each_log_length + 0x64; // msg:each_log_length\n    uint32_t sta_mem_addr =\n        msg_mem_addr + each_log_length + 0x64; // sta:each_log_length\n    uint32_t sch_mem_addr =\n        sta_mem_addr + each_log_length + 0x64; // sch:each_log_length\n    uint32_t isr_mem_addr =\n        sch_mem_addr + each_log_length + 0x64; // isr:each_log_length\n\n    // LMP_DUMP_TRACE\n    *(uint32_t *)g_mem_dump_ctrl_addr =\n        each_log_length; // g_mem_dump_ctrl[0].len_max  default:1024\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 4) =\n        lmp_mem_addr; // g_mem_dump_ctrl[0].start_addr\n    *(uint8_t *)(g_mem_dump_ctrl_addr + 8) =\n        0x01; // g_mem_dump_ctrl[0].trace_enable\n\n    // MSG_DUMP_TRACE\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 0xc) =\n        each_log_length; // g_mem_dump_ctrl[1].len_max  default:1024\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 0x10) =\n        msg_mem_addr; // g_mem_dump_ctrl[1].start_addr\n    *(uint8_t *)(g_mem_dump_ctrl_addr + 0x14) =\n        0x01; // g_mem_dump_ctrl[1].trace_enable\n\n    // STA_DUMP_TRACE\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 0x18) =\n        each_log_length; // g_mem_dump_ctrl[2].len_max  default:1024\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 0x1c) =\n        sta_mem_addr; // g_mem_dump_ctrl[2].start_addr\n    *(uint8_t *)(g_mem_dump_ctrl_addr + 0x20) =\n        0x01; // g_mem_dump_ctrl[2].trace_enable\n\n    // SCH_DUMP_TRACE\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 0x24) =\n        each_log_length; // g_mem_dump_ctrl[3].len_max  default:1024\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 0x28) =\n        sch_mem_addr; // g_mem_dump_ctrl[3].start_addr\n    *(uint8_t *)(g_mem_dump_ctrl_addr + 0x2c) =\n        0x01; // g_mem_dump_ctrl[3].trace_enable\n\n    // ISR_DUMP_TRACE\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 0x30) =\n        each_log_length; // g_mem_dump_ctrl[4].len_max  default:1024\n    *(uint32_t *)(g_mem_dump_ctrl_addr + 0x34) =\n        isr_mem_addr; // g_mem_dump_ctrl[4].start_addr\n    *(uint8_t *)(g_mem_dump_ctrl_addr + 0x38) =\n        0x01; // g_mem_dump_ctrl[4].trace_enable\n  }\n}\n\nvoid bt_drv_reg_op_lm_nb_sync_hacker(uint8_t sco_status) {\n  BT_DRV_REG_OP_ENTER();\n  // lm_nb_sync_active\n  uint32_t op_addr = 0;\n\n  if (lm_nb_sync_active_addr) {\n    op_addr = lm_nb_sync_active_addr;\n  }\n\n  if (op_addr != 0) {\n    uint8_t org_val = *(volatile uint8_t *)(op_addr);\n    // sanity check\n    if (org_val > 0xf0)\n      org_val = 0;\n\n    if ((sco_status == SNIFFER_SCO_STOP || sco_status == SNIFFER_SCO_START ||\n         sco_status == SNIFFER_ACL_DISCONNECT_STOP_SCO) &&\n        (org_val >= 0 && org_val <= 2)) {\n      if (sco_status == SNIFFER_SCO_STOP ||\n          sco_status == SNIFFER_ACL_DISCONNECT_STOP_SCO) {\n        if (org_val > 0) {\n          *(volatile uint8_t *)(op_addr) = org_val - 1;\n        }\n      } else if (sco_status == SNIFFER_SCO_START) {\n        *(volatile uint8_t *)(op_addr) = org_val + 1;\n      }\n      BT_DRV_TRACE(\n          3, \"BT_REG_OP:modify lm_nb_sync org val=%d, modify val=%d, status=%d\",\n          org_val, *(volatile uint8_t *)(op_addr), sco_status);\n    } else {\n      BT_DRV_TRACE(2,\n                   \"BT_REG_OP:do not need modify lm_nb_sync val=%d, status=%d\",\n                   org_val, sco_status);\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\n#define BT_FASTACK_ADDR 0xD0220468\n#define BT_SCO_TRIGGER_BYPASS_ADDR 0xD022046C\nvoid bt_drv_reg_op_fastack_status_checker(uint16_t conhdl) {\n  BT_DRV_REG_OP_ENTER();\n\n  uint8_t elt_idx = btdrv_conhdl_to_linkid(conhdl);\n\n  if (btdrv_is_link_index_valid(elt_idx)) {\n    uint32_t fast_cs_addr = EM_BT_BT_EXT1_ADDR + elt_idx * BT_EM_SIZE;\n\n    BT_DRV_TRACE(\n        3,\n        \"BT_DRV_REG: fastack cs=0x%x,fast ack reg=0x%x,Seq filter by pass=0x%x\",\n        *(volatile uint16_t *)(fast_cs_addr),    // fa rx bit10,tx bit9\n        *(volatile uint32_t *)(BT_FASTACK_ADDR), // fast ack reg bit22\n        *(volatile uint32_t\n              *)(BT_SCO_TRIGGER_BYPASS_ADDR)); // seq bypass reg bit 18\n  }\n\n  bt_drv_reg_op_bt_info_checker();\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_clear_ibrt_snoop_status(void) {\n  BT_DRV_REG_OP_ENTER();\n\n  // sniffer_env.snoop_status\n  uint32_t op_addr = 0;\n\n  if (sniffer_env_addr) {\n    op_addr = sniffer_env_addr + 0x84;\n  }\n\n  if (op_addr != 0) {\n    BT_DRV_TRACE(0, \"BT_REG_OP:clear snoop_status\");\n    *(volatile uint8_t *)(op_addr) = 0;\n  }\n  // close fastack register\n  bt_drv_reg_op_fa_set(0);\n  // clear fastack cs\n  for (uint8_t idx = 0; idx < 3; idx++) {\n    // fastack cs: rx bit10,tx bit9\n    uint32_t fast_cs_addr = EM_BT_BT_EXT1_ADDR + idx * BT_EM_SIZE;\n    *(volatile uint16_t *)(fast_cs_addr) &= ~0x600;\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nuint8_t bt_drv_reg_op_linkcntl_aclltaddr_getf(uint16_t conhdl) {\n  uint8_t elt_idx = btdrv_conhdl_to_linkid(conhdl);\n\n  if (btdrv_is_link_index_valid(elt_idx)) {\n    uint16_t localVal =\n        BTDIGITAL_BT_EM(EM_BT_LINKCNTL_ADDR + elt_idx * BT_EM_SIZE);\n    return ((localVal & ((uint16_t)0x00000700)) >> 8);\n  } else {\n    return 0;\n  }\n}\n\nuint8_t bt_drv_reg_op_sync_bt_param(uint8_t *param, uint16_t len) {\n  uint8_t status = 0xff;\n  BT_DRV_REG_OP_ENTER();\n  // link_connect_bak\n  uint32_t op_addr = 0;\n\n  if (link_connect_bak_addr) {\n    op_addr = link_connect_bak_addr;\n  }\n\n  if (op_addr != 0) {\n    BT_DRV_TRACE(1, \"BT_REG_OP:sync bt param len=%d\", len);\n\n    memcpy((uint8_t *)(op_addr), param, len);\n    status = 0;\n  }\n\n  BT_DRV_REG_OP_EXIT();\n  return status;\n}\n\nuint32_t bt_drv_reg_op_get_lc_env_ptr(uint16_t conhdl, uint8_t type) {\n  uint32_t lc_ptr = 0;\n  uint32_t op_ptr = 0;\n  BT_DRV_REG_OP_ENTER();\n\n  if (lc_env_addr) {\n    lc_ptr = *(uint32_t *)(lc_env_addr + (conhdl - 0x80) * 4);\n  }\n\n  BT_DRV_TRACE(3, \"BT_REG_OP:lc_env_ptr =0x%x, conhdl=0x%x,type=%d\", lc_ptr,\n               conhdl, type);\n\n  if (lc_ptr == 0)\n    return 0;\n\n  switch (type) {\n  case LC_LINK_TAG:\n    // link tag len=108\n    op_ptr = lc_ptr;\n    break;\n  case LC_INFO_TAG:\n    op_ptr = lc_ptr + 0x6c;\n    break;\n  case LC_ENC_TAG:\n    // enc tag len=166\n    op_ptr = lc_ptr + 0x196;\n    break;\n  case LC_AFH_TAG:\n    op_ptr = lc_ptr + 0x26c;\n    break;\n  case LC_SP_TAG:\n    // link tag len=108\n    op_ptr = lc_ptr + 0x28c;\n    break;\n  case LC_EPR_TAG:\n    op_ptr = lc_ptr + 0x2f8;\n    break;\n  case LC_EPC_TAG:\n    op_ptr = lc_ptr + 0x2fc;\n    break;\n  default:\n    break;\n  }\n\n  BT_DRV_REG_OP_EXIT();\n  return op_ptr;\n}\n\n#ifdef __BT_ONE_BRING_TWO__\nvoid bt_drv_reg_op_set_music_ongong_flag() {}\n\nvoid bt_drv_reg_op_clear_music_ongong_flag() {}\n#endif\nuint16_t bt_drv_reg_op_get_ble_conn_latency(uint16_t ble_conhdl) {\n  uint16_t curr_conn_latency = 0xffff;\n  return curr_conn_latency;\n}\nbool bt_drv_reg_op_set_ble_conn_latency(uint16_t ble_conhdl,\n                                        uint16_t conn_latency) {\n  return false;\n}\n\nvoid bt_drv_reg_op_write_private_public_key(uint8_t *private_key,\n                                            uint8_t *public_key) {\n  uint8_t *lm_env_ptr = 0;\n  uint8_t *lm_private_key_ptr = 0;\n  uint8_t *lm_public_key_ptr = 0;\n  // lm_env\n  if (lm_env_addr) {\n    lm_env_ptr = (uint8_t *)lm_env_addr;\n  } else {\n    return;\n  }\n\n  lm_private_key_ptr = lm_env_ptr + 0x6c;\n  lm_public_key_ptr = lm_private_key_ptr + 0x18;\n  memcpy(lm_private_key_ptr, private_key, 24);\n  memcpy(lm_public_key_ptr, public_key, 48);\n  BT_DRV_TRACE(0, \"private key\");\n  DUMP8(\"%02x\", lm_private_key_ptr, 24);\n  BT_DRV_TRACE(0, \"public key\");\n  DUMP8(\"%02x\", lm_public_key_ptr, 48);\n}\n\nvoid bt_drv_reg_op_for_test_mode_disable(void) {\n\n  if (dbg_bt_setting_addr) {\n    *(volatile uint32_t *)(dbg_bt_setting_addr + 0x64) &=\n        ~(1 << 8); ////sw_seq_filter_en set 0\n    *(volatile uint32_t *)(dbg_bt_setting_addr + 0x64) &=\n        ~(1 << 0); ////ecc_enable set 0\n    *(volatile uint32_t *)(dbg_bt_setting_addr + 0x1c) &=\n        0x00ffffff; ////dbg_trace_level set 0\n  }\n}\n\nuint16_t bt_drv_reg_op_get_ibrt_sco_hdl(uint16_t acl_hdl) {\n  // FIXME\n  return acl_hdl | 0x100;\n}\n\nvoid bt_drv_reg_op_get_ibrt_address(uint8_t *addr) {\n  struct ld_device_info *mobile_device_info = 0;\n  BT_DRV_REG_OP_ENTER();\n\n  if (sniffer_env_addr) {\n    mobile_device_info = (struct ld_device_info *)(sniffer_env_addr + 4);\n  }\n\n  if (mobile_device_info) {\n    if (addr != NULL) {\n      memcpy(addr, (uint8_t *)mobile_device_info->bd_addr.addr, 6);\n      BT_DRV_TRACE(0, \"BT_REG_OP:get mobile address\");\n      DUMP8(\"%02x \", addr, 6);\n    }\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_set_tws_link_id(uint8_t link_id) {\n  // ASSERT();\n  BT_DRV_TRACE(1, \"set tws link id =%x\", link_id);\n  ASSERT(link_id < 3 || link_id == 0xff, \"error tws link id set\");\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    ASSERT(*(uint32_t *)0xc0006e28 == 0xc0006e2c, \"PATCH ERROR!!\");\n    *(uint32_t *)0xc0006e2c = link_id;\n  } else if (tws_link_id_addr) {\n    if (link_id == 0xff) {\n      link_id = 3;\n    }\n    *(uint8_t *)tws_link_id_addr = link_id;\n  }\n}\n\nvoid bt_drv_reg_op_hack_max_slot(uint8_t link_id, uint8_t slot) {\n  uint32_t acl_evt_ptr = 0x0;\n  uint32_t slot_addr;\n  uint32_t stop_lantency_addr = 0;\n  BT_DRV_TRACE(2, \"hack slot id=%d,slot=%d\", link_id, slot);\n  if (link_id >= 3)\n    return;\n\n  if (ld_acl_env_addr) {\n    acl_evt_ptr = *(uint32_t *)(ld_acl_env_addr + link_id * 4);\n  }\n\n  if (acl_evt_ptr) {\n    slot_addr = acl_evt_ptr + 0xc4;\n    stop_lantency_addr = acl_evt_ptr + 0x18;\n    *(uint8_t *)slot_addr = slot;\n    *(uint8_t *)stop_lantency_addr =\n        slot + 3 + (*(uint16_t *)(acl_evt_ptr + 150) > 128 ? 1 : 0);\n  }\n}\n\nvoid bt_drv_reg_op_rx_slot_stop_lantency_checker(void) {\n  uint32_t acl_evt_ptr = 0x0;\n  uint32_t slot_addr;\n  uint32_t stop_addr;\n\n  for (uint8_t i = 0; i < 3; i++) {\n\n    if (ld_acl_env_addr) {\n      acl_evt_ptr = *(uint32_t *)(ld_acl_env_addr + i * 4);\n    }\n\n    if (acl_evt_ptr) {\n      slot_addr = acl_evt_ptr + 0xc4;\n      stop_addr = acl_evt_ptr + 0x18;\n      BT_DRV_TRACE(\n          5, \"id=%d,rx slot=%d stop=%d,acl_par: clk off 0x%x, bit off 0x%x\", i,\n          *(uint8_t *)slot_addr, *(uint8_t *)stop_addr,\n          *(uint32_t *)(acl_evt_ptr + 140), *(uint16_t *)(acl_evt_ptr + 150));\n    }\n  }\n}\n\nvoid bt_drv_reg_op_fa_set(uint8_t en) {\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1) {\n    if (en) {\n      *(uint32_t *)0xd0220468 |= 0x00400000;\n      BT_DRV_TRACE(1, \"%s\", __func__);\n    } else {\n      *(uint32_t *)0xd0220468 &= ~0x00400000;\n    }\n  }\n}\n\n//////return true means controller had received a data packet\nbool bt_drv_reg_op_check_seq_pending_status(void) {\n\n  if (pending_seq_error_link_addr) {\n    return (*(uint8_t *)pending_seq_error_link_addr == 3);\n  } else {\n    return TRUE;\n  }\n}\n\n/// if the flag is not clear when disconnect happened  call this function\nvoid bt_drv_reg_op_clear_seq_pending_status(void) {\n  if (pending_seq_error_link_addr) {\n    *(uint8_t *)pending_seq_error_link_addr = 3;\n  }\n}\n\nvoid bt_drv_reg_op_rssi_checker(void) {\n  //  BT_DRV_TRACE(1,\"rssi thd=%x\",*(uint32_t *)0xc00041e4);\n\n  uint32_t acl_evt_ptr = 0x0;\n  uint32_t rssi_acc_addr;\n  uint32_t rssi_count_addr;\n\n  for (uint8_t i = 0; i < 3; i++) {\n\n    if (ld_acl_env_addr) {\n      acl_evt_ptr = *(uint32_t *)(ld_acl_env_addr + i * 4);\n    }\n\n    if (acl_evt_ptr) {\n      rssi_acc_addr = acl_evt_ptr + 0xac;\n      rssi_count_addr = acl_evt_ptr + 0xae;\n      BT_DRV_TRACE(3, \"id=%d,rssi acc=%d count=%d\", i,\n                   *(int16_t *)rssi_acc_addr, *(uint8_t *)rssi_count_addr);\n    }\n  }\n  uint32_t lc_evt_ptr = 0x0;\n  uint32_t recv_addr;\n\n  for (uint8_t i = 0; i < 3; i++) {\n    if (lc_env_addr) {\n      lc_evt_ptr = *(volatile uint32_t *)(lc_env_addr + i * 4); // lc_env\n    }\n    if (lc_evt_ptr) {\n      recv_addr = lc_evt_ptr + 0x60;\n      BT_DRV_TRACE(2, \"id=%d,recv=%x\", i, *(uint32_t *)recv_addr);\n    }\n  }\n}\n\nvoid bt_drv_reg_op_set_link_policy(uint8_t linkid, uint8_t policy) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t lc_evt_ptr = 0x0;\n  uint32_t policy_addr;\n  if (linkid >= 0x3)\n    return;\n\n  BT_DRV_TRACE(2, \"REG_OP: set link=%d, policy=%d\", linkid, policy);\n\n  if (lc_env_addr) {\n    lc_evt_ptr = *(volatile uint32_t *)(lc_env_addr + linkid * 4); // lc_env\n  }\n\n  if (lc_evt_ptr) {\n    policy_addr = lc_evt_ptr + 0x2c;\n    *(uint8_t *)policy_addr = policy;\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_voice_settings_set(uint16_t voice_settings) {\n  uint32_t voice_settings_addr = 0;\n\n  if (hci_env_addr) {\n    voice_settings_addr = hci_env_addr + 90;\n  }\n\n  if (voice_settings_addr != 0) {\n    BT_DRV_TRACE(2, \"Fast_bt_init1:%s %d\", __func__, voice_settings);\n    *(uint16_t *)voice_settings_addr = voice_settings;\n  }\n}\n\nuint8_t bt_drv_reg_op_lmp_sco_hdl_get(uint16_t sco_handle) {\n  if (sco_handle == 0xffff) {\n    return 0;\n  }\n\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    //  uint32_t lc_sco_env_addr = 0xc000079c;\n    uint16_t sco_link_id = ((sco_handle >> 8) - 1);\n    uint32_t link_params_addr =\n        *((uint32_t *)(lc_sco_env_addr + sco_link_id * 8));\n    uint8_t sync_hdl = 0;\n\n    if (sco_link_id > 2 || link_params_addr == 0) {\n      return 0;\n    }\n\n    sync_hdl = *((uint8_t *)(link_params_addr + 4));\n\n    return sync_hdl;\n  } else {\n    BT_DRV_TRACE(0, \"BT_DRV:no need to get sco hdl\\n\");\n  }\n\n  return 0;\n}\n\nbool bt_drv_reg_op_lmp_sco_hdl_set(uint16_t sco_handle, uint8_t lmp_hdl) {\n  if (sco_handle == 0xffff || lmp_hdl == 0x00) {\n    return false;\n  }\n\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    //   uint32_t lc_sco_env_addr = 0xc000079c;\n    uint16_t sco_link_id = ((sco_handle >> 8) - 1);\n    uint32_t link_params_addr =\n        *((uint32_t *)(lc_sco_env_addr + sco_link_id * 8));\n    uint8_t *p_sync_hdl = 0;\n\n    if (sco_link_id > 2 || link_params_addr == 0) {\n      return false;\n    }\n\n    p_sync_hdl = (uint8_t *)(link_params_addr + 4);\n\n    *p_sync_hdl = lmp_hdl;\n    return true;\n  } else {\n    BT_DRV_TRACE(0, \"BT_DRV:no need to set sco hdl\\n\");\n  }\n\n  return false;\n}\n\nvoid bt_drv_reg_op_host_buff_and_flow_ctl_set(uint16_t acl_pkt_len,\n                                              uint16_t acl_pkt_num,\n                                              uint16_t sync_pkt_len,\n                                              uint16_t sync_pkt_num,\n                                              bool flow_ctl_en) {\n  uint32_t acl_pkt_len_addr = 0;\n  uint32_t acl_pkt_num_addr = 0;\n  uint32_t sync_pkt_len_addr = 0;\n  uint32_t sync_pkt_num_addr = 0;\n  uint32_t flow_ctl_addr = 0;\n\n  if (hci_fc_env_addr) {\n    flow_ctl_addr = hci_fc_env_addr;\n  }\n\n  if (flow_ctl_addr != 0) {\n    // hci_fc_env.host_set.acl_pkt_len\n    acl_pkt_len_addr = flow_ctl_addr + 2;\n    // hci_fc_env.host_set.acl_pkt_num\n    acl_pkt_num_addr = flow_ctl_addr + 4;\n    // hci_fc_env.host_set.sync_pkt_len;\n    sync_pkt_len_addr = flow_ctl_addr + 9;\n    // hci_fc_env.host_set.sync_pkt_nb;\n    sync_pkt_num_addr = flow_ctl_addr + 10;\n\n    BT_DRV_TRACE(6,\n                 \"Fast_bt_init2:%s,acl len=%x,acl num=%x,sync len=%x sync \"\n                 \"num=%x,fl_ctl=%d\",\n                 __func__, acl_pkt_len, acl_pkt_num, sync_pkt_len, sync_pkt_num,\n                 flow_ctl_en);\n\n    *(uint8_t *)flow_ctl_addr = flow_ctl_en;\n    *(uint16_t *)acl_pkt_len_addr = acl_pkt_len;\n    *(uint16_t *)acl_pkt_num_addr = acl_pkt_num;\n    *(uint8_t *)sync_pkt_len_addr = sync_pkt_len;\n    *(uint16_t *)sync_pkt_num_addr = sync_pkt_num;\n  }\n}\n\nvoid bt_drv_reg_op_page_to_set(uint16_t page_to) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t page_to_addr = 0;\n\n  if (lm_env_addr) {\n    page_to_addr = lm_env_addr + 20;\n  }\n\n  if (page_to_addr != 0) {\n    BT_DRV_TRACE(2, \"Fast_bt_init3:%s,to=%x\", __func__, page_to);\n    *(uint16_t *)page_to_addr = page_to;\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_btdm_address_set(uint8_t *bt_addr, uint8_t *ble_addr) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t btaddr_addr = 0;\n  uint32_t bleaddr_addr = 0;\n  uint32_t bch_addr = 0;\n\n  if (llm_le_env_addr) {\n    bleaddr_addr = llm_le_env_addr + 0x8f;\n  }\n\n  if (ld_env_addr) {\n    btaddr_addr = ld_env_addr;\n    bch_addr = btaddr_addr + 451;\n  }\n\n  if (bleaddr_addr != 0) {\n    BT_DRV_TRACE(1, \"Fast_bt_init4:%s\", __func__);\n    DUMP8(\"%02x \", bt_addr, 6);\n    DUMP8(\"%02x \", ble_addr, 6);\n\n    for (uint8_t i = 0; i < 6; i++) {\n      *(uint8_t *)(bleaddr_addr + i) = ble_addr[i];\n    }\n\n    for (uint8_t i = 0; i < 6; i++) {\n      *(uint8_t *)(btaddr_addr + i) = bt_addr[i];\n    }\n    ld_util_bch_create(bt_addr, (uint8_t *)bch_addr);\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_evtmask_set(uint8_t ble_en) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t bt_evtmsk_addr = 0;\n  uint32_t ble_evtmask_addr = 0;\n\n  if (llm_le_env_addr) {\n    ble_evtmask_addr = llm_le_env_addr + 0x64;\n  }\n\n  if (hci_env_addr) {\n    bt_evtmsk_addr = hci_env_addr;\n  }\n\n  if (bt_evtmsk_addr != 0) {\n    BT_DRV_TRACE(2, \"Fast_bt_init5:%s,ble enable=%x\", __func__, ble_en);\n    uint8_t bt_mask[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f};\n    if (ble_en) {\n      bt_mask[7] = 0x3f;\n    }\n    memcpy((uint8_t *)bt_evtmsk_addr, bt_mask, 8);\n\n    uint8_t ble_mask[8] = {0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};\n    memcpy((uint8_t *)ble_evtmask_addr, ble_mask, 8);\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_simplepair_mode_set(uint8_t en) {\n  BT_DRV_REG_OP_ENTER();\n\n  if (lm_env_addr) {\n    *(uint8_t *)(lm_env_addr + 44) = en;\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_class_of_dev_set(uint8_t *class_of_dev, uint8_t len) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t class_of_dev_addr = 0;\n\n  if (ld_env_addr) {\n    // ld_env.class_of_dev.A\n    class_of_dev_addr = ld_env_addr + 6;\n  }\n\n  if (class_of_dev_addr != 0) {\n    BT_DRV_TRACE(1, \"Fast_bt_init7:%s\", __func__);\n    DUMP8(\"%02x \", class_of_dev, 3);\n    memcpy((uint8_t *)class_of_dev_addr, class_of_dev, 3);\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_sleep_set(bool en) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t sleep_addr = 0;\n\n  if (rwip_env_addr) {\n    sleep_addr = rwip_env_addr + 12;\n  }\n\n  if (sleep_addr != 0) {\n    BT_DRV_TRACE(2, \"Fast_bt_init:%s en=%d\", __func__, en);\n    *(uint8_t *)(sleep_addr) = en;\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_sco_fifo_reset(void) {\n  uint16_t sco_ptr0 = 0, sco_ptr1 = 0;\n  uint8_t *em_area_base = (uint8_t *)0xd0210000;\n\n  BT_DRV_REG_OP_ENTER();\n  BTDIGITAL_REG_GET_FIELD(0xd02201cc, 0xffff, 0, sco_ptr0);\n  BTDIGITAL_REG_GET_FIELD(0xd02201cc, 0xffff, 16, sco_ptr1);\n  BT_DRV_TRACE(3, \"bt_drv_reg_op_sco_fifo_reset %d/%d %08x\", sco_ptr0, sco_ptr1,\n               BTDIGITAL_REG(0xd02201cc));\n  memset(em_area_base + sco_ptr0, 0x55, 60);\n  memset(em_area_base + sco_ptr1, 0x55, 60);\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_sco_fifo_dump(void) {\n  uint16_t sco_ptr0 = 0, sco_ptr1 = 0;\n  uint8_t *em_area_base = (uint8_t *)0xd0210000;\n  BT_DRV_REG_OP_ENTER();\n  BTDIGITAL_REG_GET_FIELD(0xd02201cc, 0xffff, 0, sco_ptr0);\n  BTDIGITAL_REG_GET_FIELD(0xd02201cc, 0xffff, 16, sco_ptr1);\n  BT_DRV_TRACE(3, \"bt_drv_reg_op_sco_fifo_reset %d/%d %08x\", sco_ptr0, sco_ptr1,\n               BTDIGITAL_REG(0xd02201cc));\n  DUMP8(\"%02x \", em_area_base + sco_ptr0, 10);\n  DUMP8(\"%02x \", em_area_base + sco_ptr1, 10);\n  BT_DRV_REG_OP_EXIT();\n}\n\nuint8_t bt_drv_reg_op_get_sync_id_op(uint8_t op, uint8_t sync_id) {\n  uint8_t sync_link_id = 0xff;\n  BT_DRV_REG_OP_ENTER();\n\n  uint32_t sync_id_addr = 0;\n  // only 2300P chip id =1 need this hack\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    sync_id_addr = (sniffer_env_addr + 0x3c);\n  }\n\n  if (sync_id_addr != 0) {\n    if (READ_OP == op) {\n      sync_link_id = *(uint8_t *)(sync_id_addr);\n    } else if (WRITE_OP == op) {\n      *(uint8_t *)(sync_id_addr) = sync_id;\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n\n  return sync_link_id;\n}\n\nvoid bt_drv_reg_op_disable_reporting_en(uint16_t conhdl) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t lc_evt_ptr = 0x0;\n  uint32_t report_en_addr;\n  uint8_t linkid = btdrv_conhdl_to_linkid(conhdl);\n\n  if (btdrv_is_link_index_valid(linkid)) {\n    if (lc_env_addr) {\n      lc_evt_ptr = *(volatile uint32_t *)(lc_env_addr + linkid * 4); // lc_env\n      report_en_addr = lc_evt_ptr + 0x28a;\n      *(uint8_t *)report_en_addr = 0;\n      BT_DRV_TRACE(0, \"REG_OP:disable afh report\");\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nuint8_t bt_drv_reg_opcheck_controller_ld_lc_layer_mismatch(void) {\n  uint8_t cnt = 0;\n  BT_DRV_REG_OP_ENTER();\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    for (uint8_t link_id = 0; link_id < 3; link_id++) {\n      uint32_t ld_acl_evt_ptr = 0;\n      uint32_t lc_evt_ptr = 0;\n      ld_acl_evt_ptr = *(uint32_t *)(ld_acl_env_addr + link_id * 4);\n      lc_evt_ptr = *(volatile uint32_t *)(lc_env_addr + link_id * 4);\n      if ((ld_acl_evt_ptr && !lc_evt_ptr) || (!ld_acl_evt_ptr && lc_evt_ptr)) {\n        cnt++;\n      }\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n  return cnt;\n}\nvoid bt_drv_reg_op_ble_sup_timeout_set(uint16_t ble_conhdl, uint16_t sup_to) {\n  uint32_t llc_env_ptr = 0;\n\n  if (llc_env_addr) {\n    uint32_t llc_env_address = llc_env_addr + ble_conhdl * 4;\n    llc_env_ptr = *(volatile uint32_t *)llc_env_address;\n  }\n\n  if (llc_env_ptr != 0) {\n    uint32_t llc_env_sup_to_address = llc_env_ptr + 0x54;\n    *(volatile uint16_t *)llc_env_sup_to_address = sup_to;\n    BT_DRV_TRACE(1, \"BT_DRV:set ble sup_timeout to %d\", sup_to);\n  }\n}\n\nvoid bt_drv_reg_op_disable_swagc_nosync_count(void) {\n  if (dbg_bt_setting_ext1_addr) {\n    *(uint16_t *)(dbg_bt_setting_ext1_addr + 0x14) = 0xa604;\n  }\n}\n\nvoid bt_drv_reg_op_hw_sw_agc_select(uint8_t agc_mode) {\n  uint32_t hw_agc_select_addr = 0;\n  BT_DRV_REG_OP_ENTER();\n\n  if (rwip_rf_addr) {\n    hw_agc_select_addr = rwip_rf_addr + 0x37;\n  }\n  if (hw_agc_select_addr != 0) {\n    *(volatile uint8_t *)hw_agc_select_addr = agc_mode;\n  }\n\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid ble_maxevtime_set(int elt_idx, uint16_t value) {\n  BTDIGITAL_EM_BT_WR(BLE_MAXEVTIME_ADDR + elt_idx * BLE_EM_CS_SIZE, value);\n}\n\nuint16_t ble_maxevtime_get(int elt_idx) {\n  return BTDIGITAL_BT_EM(BLE_MAXEVTIME_ADDR + elt_idx * BLE_EM_CS_SIZE);\n}\n\nvoid bt_drv_reg_op_afh_follow_en(bool enable, uint8_t be_followed_link_id,\n                                 uint8_t follow_link_id) {\n#if BT_AFH_FOLLOW\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    *(uint8_t *)(lm_env_addr + 0x168) =\n        be_followed_link_id; // be follow follow link id\n    *(uint8_t *)(lm_env_addr + 0x169) = follow_link_id; // follow link id\n    *(uint8_t *)(lm_env_addr + 0x167) = enable;         // afh follow enable\n  }\n#endif\n}\n\nvoid bt_drv_reg_op_set_agc_thd(bool isMaster, bool isSco) {\n  BT_DRV_REG_OP_ENTER();\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    ASSERT(*(uint32_t *)0xc00072ec == 0xc0007310,\n           \"patch ERROR 2300p t2 bt_drv_reg_op_set_agc_thd!\");\n    BT_DRV_TRACE(1, \"isMaster: %d, isSco: %d \", isMaster, isSco);\n    if (isMaster) {\n      if (isSco) {\n        BTDIGITAL_REG(0xc0007310) =\n            0x00000020; // link_agc_thd_mobile_time reg address0xc0007310\n        BTDIGITAL_REG(0xc0007300) =\n            0x00000020; // link_agc_thd_tws_time reg address0xc0007300\n      } else {\n        BTDIGITAL_REG(0xc0007310) =\n            0x00000038; // link_agc_thd_mobile_time reg address0xc0007310\n        BTDIGITAL_REG(0xc0007300) =\n            0x00000038; // link_agc_thd_tws_time reg address0xc0007300\n      }\n    } else {\n      if (isSco) {\n        BTDIGITAL_REG(0xc0007310) =\n            0x00000020; // link_agc_thd_mobile_time reg address0xc0007310\n        BTDIGITAL_REG(0xc0007300) =\n            0x00000020; // link_agc_thd_tws_time reg address0xc0007300\n      } else {\n        BTDIGITAL_REG(0xc0007310) =\n            0x00000038; // link_agc_thd_mobile_time reg address0xc0007310\n        BTDIGITAL_REG(0xc0007300) =\n            0x00000038; // link_agc_thd_tws_time reg address0xc0007300\n      }\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_force_set_sniff_att(uint16_t conhdle) {\n  BT_DRV_REG_OP_ENTER();\n  uint8_t linkid = btdrv_conhdl_to_linkid(conhdle);\n  uint32_t acl_evt_ptr = 0x0;\n\n  if (btdrv_is_link_index_valid(linkid)) {\n    if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n      acl_evt_ptr =\n          *(volatile uint32_t *)(0xc0000998 + linkid * 4); // ld_acl_env\n    } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n      acl_evt_ptr =\n          *(volatile uint32_t *)(0xc00009d4 + linkid * 4); // ld_acl_env\n    }\n\n    if (acl_evt_ptr != 0) {\n      uint32_t sniff_att_addr = acl_evt_ptr + 0xe2;\n      if (BT_DRIVER_GET_U16_REG_VAL(sniff_att_addr) < 3) {\n        BT_DRIVER_PUT_U16_REG_VAL(sniff_att_addr, 3);\n      }\n      // set sniff timeout to 0\n      BT_DRIVER_PUT_U16_REG_VAL(sniff_att_addr + 4, 0);\n\n      BT_DRV_TRACE(0, \"BT_REG_OP:force set sniff att\");\n    }\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_fa_gain_direct_set(uint8_t gain_idx) {\n  BTDIGITAL_REG(0xd0220484) =\n      (BTDIGITAL_REG(0xd0220484) & (~0xffff)) | 0x9401 |\n      (gain_idx << 1); // lxd 20191105 fixed ecc receive gain\n}\n\nuint8_t bt_drv_reg_op_fa_gain_direct_get(void) {\n  uint32_t raw_reg = BTDIGITAL_REG(0xd0220484);\n  return (raw_reg >> 1) & 0x07;\n}\n\nstruct rx_gain_fixed_t {\n  uint8_t enable;    // enable or disable\n  uint8_t bt_or_ble; // 0:bt 1:ble\n  uint8_t cs_id;     // link id\n  uint8_t gain_idx;  // gain index\n};\n\nvoid bt_drv_reg_op_dgb_link_gain_ctrl_set(uint16_t connHandle,\n                                          uint8_t bt_ble_mode, uint8_t gain_idx,\n                                          uint8_t enable) {\n  if (hal_get_chip_metal_id() <= HAL_CHIP_METAL_ID_1) {\n    TRACE(1, \"%s to all link\", __func__);\n    uint16_t raw_reg = *((volatile uint16_t *)0xc00041ec);\n    if (bt_ble_mode) {\n      raw_reg = raw_reg & (~0xff << 8);\n      raw_reg = raw_reg | (gain_idx << 8);\n    } else {\n      raw_reg = raw_reg & ~0xff;\n      raw_reg = raw_reg | gain_idx;\n    }\n    *((volatile uint16_t *)0xc00041ec) = raw_reg;\n  }\n\n  struct rx_gain_fixed_t *rx_gain_fixed_p =\n      (struct rx_gain_fixed_t *)0xc00004dc;\n  uint8_t cs_id = btdrv_conhdl_to_linkid(connHandle);\n\n  if (btdrv_is_link_index_valid(cs_id)) {\n    for (uint8_t i = 0; i < 3; i++) {\n      if ((rx_gain_fixed_p->cs_id == cs_id) &&\n          (rx_gain_fixed_p->bt_or_ble == bt_ble_mode)) {\n        rx_gain_fixed_p->enable = enable;\n        rx_gain_fixed_p->bt_or_ble = bt_ble_mode;\n        rx_gain_fixed_p->gain_idx = gain_idx;\n        BT_DRV_TRACE(5, \"%s hdl:%x/%x mode:%d idx:%d\", __func__, connHandle,\n                     cs_id, rx_gain_fixed_p->bt_or_ble, gain_idx);\n      }\n      rx_gain_fixed_p++;\n    }\n  }\n}\n\nvoid bt_drv_reg_op_dgb_link_gain_ctrl_clear(uint16_t connHandle,\n                                            uint8_t bt_ble_mode) {\n  if (hal_get_chip_metal_id() <= HAL_CHIP_METAL_ID_1) {\n    BT_DRV_TRACE(1, \"%s REG_OP: not support\", __func__);\n  }\n\n  struct rx_gain_fixed_t *rx_gain_fixed_p =\n      (struct rx_gain_fixed_t *)0xc00004dc;\n  uint8_t cs_id = btdrv_conhdl_to_linkid(connHandle);\n\n  if (btdrv_is_link_index_valid(cs_id)) {\n    for (uint8_t i = 0; i < 3; i++) {\n      if ((rx_gain_fixed_p->cs_id == cs_id) &&\n          (rx_gain_fixed_p->bt_or_ble == bt_ble_mode)) {\n        rx_gain_fixed_p->enable = 0;\n        rx_gain_fixed_p->bt_or_ble = bt_ble_mode;\n        rx_gain_fixed_p->gain_idx = 0;\n      }\n      rx_gain_fixed_p++;\n    }\n  }\n}\n\nvoid bt_drv_reg_op_dgb_link_gain_ctrl_init(void) {\n  if (hal_get_chip_metal_id() <= HAL_CHIP_METAL_ID_1) {\n    BT_DRV_TRACE(1, \"%s REG_OP: not support\", __func__);\n  }\n\n  struct rx_gain_fixed_t *rx_gain_fixed_p =\n      (struct rx_gain_fixed_t *)0xc00004dc;\n\n  for (uint8_t i = 0; i < 3; i++) {\n    rx_gain_fixed_p->cs_id = i;\n    rx_gain_fixed_p++;\n  }\n}\n\nvoid bt_drv_reg_op_rx_gain_fix(uint16_t connHandle, uint8_t bt_ble_mode,\n                               uint8_t gain_idx, uint8_t enable,\n                               uint8_t table_idx) {\n  if (hal_get_chip_metal_id() <= HAL_CHIP_METAL_ID_1) {\n    BT_DRV_TRACE(1, \"%s REG_OP: not support\", __func__);\n  }\n\n  struct rx_gain_fixed_t *rx_gain_fixed_p =\n      (struct rx_gain_fixed_t *)0xc00004dc;\n  uint8_t cs_id;\n\n  if (bt_ble_mode == 0) // bt\n  {\n    cs_id = btdrv_conhdl_to_linkid(connHandle);\n  } else if (bt_ble_mode == 1) // ble\n  {\n    cs_id = connHandle;\n  } else {\n    BT_DRV_TRACE(1, \"%s:fix gain fail\", __func__);\n    return;\n  }\n\n  if (table_idx < 3) {\n    rx_gain_fixed_p[table_idx].enable = enable;\n    rx_gain_fixed_p[table_idx].bt_or_ble = bt_ble_mode;\n    rx_gain_fixed_p[table_idx].cs_id = cs_id;\n    rx_gain_fixed_p[table_idx].gain_idx = gain_idx;\n  }\n}\n\nvoid bt_drv_reg_op_set_ibrt_auto_accept_sco(bool en) {\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    ASSERT(*(uint32_t *)0xc0007344 == 0xc0007348,\n           \"ibrt_auto_accept_sco PATCH ERROR!!\");\n    if (en) {\n      BTDIGITAL_REG(0xc0007348) = 1;\n      BT_DRV_TRACE(0, \"BT_REG_OP:enable ibrt_auto_accept_sco\");\n    } else {\n      BTDIGITAL_REG(0xc0007348) = 0;\n    }\n  }\n}\n\nvoid bt_drv_reg_op_update_dbg_state(void) {\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    ASSERT(*(uint32_t *)0xc00076a0 == 0xc00076a4,\n           \"update_dbg_state PATCH ERROR!!\");\n    BTDIGITAL_REG(0xc00076a4) = 1;\n    BT_DRV_TRACE(0, \"BT_REG_OP:update_dbg_state\");\n  }\n}\n\nvoid bt_drv_reg_op_set_ibrt_reject_sniff_req(bool en) {\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    ASSERT(*(uint32_t *)0xc0006e6c == 0xbb5ef615,\n           \"ibrt_reject_sniff_req PATCH ERROR!!\");\n    BTDIGITAL_REG(0xc0006e70) = en ? 1 : 0;\n    // BT_DRV_TRACE(1,\"BT_REG_OP:ibrt reject sniff %d\", en);\n  }\n}\n\nuint8_t bt_drv_reg_op_get_esco_nego_airmode(uint8_t sco_link_id) {\n  BT_DRV_REG_OP_ENTER();\n\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    //  uint32_t lc_sco_env_addr = 0xc000079c;\n    uint32_t p_nego_params_addr =\n        *((uint32_t *)(lc_sco_env_addr + 4 + sco_link_id * 8));\n    uint8_t airmode = 0;\n\n    if (sco_link_id > 2 || p_nego_params_addr == 0) {\n      return 0xff;\n    }\n\n    airmode = *((uint8_t *)(p_nego_params_addr + 0x5e));\n\n    BT_DRV_TRACE(1, \"BT_REG_OP:Get nego esco airmode=%d\", airmode);\n    return airmode;\n  }\n\n  BT_DRV_REG_OP_EXIT();\n\n  return 0;\n}\n\nvoid bt_drv_reg_op_set_max_pwr_rcv(uint16_t connHandle) {\n  BT_DRV_REG_OP_ENTER();\n  uint32_t lc_evt_ptr = 0x0;\n  uint32_t max_power_rcv_addr;\n  uint8_t linkid = btdrv_conhdl_to_linkid(connHandle);\n\n  if (lc_env_addr) {\n    lc_evt_ptr = *(volatile uint32_t *)(lc_env_addr + linkid * 4); // lc_env\n  }\n\n  if (lc_evt_ptr) {\n    // lc_env_ptr->link.MaxPowerRcv\n    max_power_rcv_addr = lc_evt_ptr + 0x61;\n    *(bool *)max_power_rcv_addr = true;\n    BT_DRV_TRACE(1, \"BT_REG_OP:conhdl=%x, max pwr recieve\", connHandle);\n  }\n  BT_DRV_REG_OP_EXIT();\n}\n\nvoid bt_drv_reg_op_set_rand_seed(uint32_t seed) {\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_1) {\n    *(volatile uint32_t *)(0xc0006890) = seed;\n  } else if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_2) {\n    *(volatile uint32_t *)(0xc0006998) = seed;\n  }\n}\n\nuint32_t bt_drv_reg_op_get_host_ref_clk(void) { return 0; }\n\nvoid bt_drv_reg_op_hci_vender_ibrt_ll_monitor(uint8_t *ptr, uint16_t *p_sum_err,\n                                              uint16_t *p_rx_total) {\n  const char *monitor_str[29] = {\n      \"TX DM1\",     \"TX DH1\",    \"TX DM3\",    \"TX DH3\",    \"TX DM5\",\n      \"TX DH5\",     \"TX 2DH1\",   \"TX 3DH1\",   \"TX 2DH3\",   \"TX 3DH3\",\n      \"TX 2DH5\",    \"TX 3DH5\",\n\n      \"RX DM1\",     \"RX DH1\",    \"RX DM3\",    \"RX DH3\",    \"RX DM5\",\n      \"RX DH5\",     \"RX 2DH1\",   \"RX 3DH1\",   \"RX 2DH3\",   \"RX 3DH3\",\n      \"RX 2DH5\",    \"RX 3DH5\",   \"hec error\", \"crc error\", \"fec error\",\n      \"gard error\", \"ecc count\",\n  };\n\n  uint32_t *p = (uint32_t *)ptr;\n  uint32_t sum_err = 0;\n  uint32_t rx_data_sum = 0;\n  uint32_t val;\n\n  TRACE(0, \"ibrt_ui_log:ll_monitor\");\n  for (uint8_t i = 0; i < 29; i++) {\n    val = co_read32p(p);\n    if (val) {\n      if (i >= 12 && i <= 23) {\n        rx_data_sum += val;\n      }\n      if (i > 23) {\n        sum_err += val;\n      }\n      TRACE(2, \"%s %d\", monitor_str[i], val);\n    }\n    p += 4;\n  }\n  *p_sum_err = sum_err;\n  *p_rx_total = rx_data_sum;\n}\n\nuint8_t bt_drv_reg_op_bt_sync_swagc_en_get(void) { return 0; }\nvoid bt_drv_reg_op_ecc_softbit_process(uint16_t *p_conn_handle1,\n                                       uint16_t *p_conn_handle2,\n                                       uint16_t length, uint8_t *data) {}\n\n#if defined(PCM_FAST_MODE) && defined(PCM_PRIVATE_DATA_FLAG)\nvoid bt_drv_reg_op_set_pcm_flag() {}\n#endif\nvoid bt_drv_reg_op_key_gen_after_reset(bool enable) {}\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/bt_drv_rfconfig.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"bt_drv.h\"\n#include \"hal_i2c.h\"\n#include \"hal_uart.h\"\n#include \"plat_types.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n#include \"bt_drv_2300p_internal.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_internal.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"cmsis.h\"\n#include \"hal_btdump.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"iqcorrect.h\"\n#include \"pmu.h\"\n#include \"tgt_hardware.h\"\n\n#define AUTO_CAL 0\n\n#ifndef BT_RF_MAX_XTAL_TUNE_PPB\n// Default 10 ppm/bit or 10000 ppb/bit\n#define BT_RF_MAX_XTAL_TUNE_PPB 10000\n#endif\n\n#ifndef BT_RF_XTAL_TUNE_FACTOR\n// Default 0.2 ppm/bit or 200 ppb/bit\n#define BT_RF_XTAL_TUNE_FACTOR 200\n#endif\n\n#define DEFAULT_XTAL_FCAP 0x8080\n\n#define XTAL_FCAP_NORMAL_SHIFT 0\n#define XTAL_FCAP_NORMAL_MASK (0xFF << XTAL_FCAP_NORMAL_SHIFT)\n#define XTAL_FCAP_NORMAL(n) BITFIELD_VAL(XTAL_FCAP_NORMAL, n)\n\n#define BT_XTAL_CMOM_DR (1 << 13)\n\n#define RF_REG_XTAL_FCAP 0xE9\n#define RF_REG_XTAL_CMOM_DR 0xE8\n\n/* ljh add for sync modify rf RF_REG_XTAL_FCAP value*/\n#define SPI_TRIG_RX_NEG_TIMEOUT MS_TO_TICKS(3)\n\n#define SPI_TRIG_NEG_TIMEOUT SPI_TRIG_RX_NEG_TIMEOUT\n\nenum BIT_OFFSET_CMD_TYPE_T {\n  BIT_OFFSET_CMD_STOP = 0,\n  BIT_OFFSET_CMD_START,\n  BIT_OFFSET_CMD_ACK,\n};\n\nstatic uint16_t xtal_fcap = DEFAULT_XTAL_FCAP;\nstatic uint16_t init_xtal_fcap = DEFAULT_XTAL_FCAP;\n\n// rampup start     1--->2->3 rampup ok\n// rampdown start 3-->2-->1-->0  rampdown ok\n\n// 3a06=3b3f\n// for pa@1.8v\nstruct bt_drv_tx_table_t {\n  uint16_t tbl[16][3];\n};\n\nstruct RF_SYS_INIT_ITEM {\n  uint16_t reg;\n  uint16_t set;\n  uint16_t mask;\n  uint16_t delay;\n};\n\nstatic const struct RF_SYS_INIT_ITEM rf_sys_init_tbl[] = {\n    {0xb5, 0x8000, 0x8000, 0},\n    {0xc2, 0x7188, 0x7fff, 0},\n#ifdef LBRT\n    {0xc4, 0x0043, 0x0043, 0}, // enable lbrt adc clk[6]\n#else\n    {0xc4, 0x0003, 0x0003, 0},\n#endif\n};\n\n// zhangzhd agc config use default 1216\n#define REG_EB_VAL 0x000c\n#define REG_181_VAL (0x00bf)\n#define REG_EC_VAL 0x000d\n#define REG_182_VAL 0x00bf\n#define REG_ED_VAL 0x000e\n#define REG_183_VAL 0x00bf\n#define REG_EE_VAL 0x000b\n#define REG_184_VAL 0x00bf\n#define REG_EF_VAL 0x0007\n#define REG_185_VAL 0x00bf\n#define REG_F0_VAL 0x0007\n#define REG_186_VAL 0x00af\n#define REG_F1_VAL 0x0007\n#define REG_187_VAL 0x009f\n#define REG_F2_VAL 0x0007\n#define REG_188_VAL 0x008f\n\n// zhangzhd agc config end\nconst uint16_t rf_init_tbl_1[][3] = {\n    {0x88, 0x8640, 0},\n    {0x8b, 0x8a4a, 0}, // set rx flt cap,filter start up\n#if defined(__FANG_HW_AGC_CFG_ADC__)\n    {0xd1, 0x8401, 0}, // set ra adc gain -3db\n    {0x8e, 0x0D28, 0}, // adc noise reduction\n#else\n    {0xd1, 0x8403, 0}, // set gain\n    {0x8e, 0x0128, 0}, // adc noise reduction\n#endif\n    {0x90, 0x8e1f, 0}, // enlarge txflt BW\n    {0x91, 0x05c0, 0}, // by walker 20180427\n    {0x92, 0x668e, 0}, // update by  luobin 2019/3/22\n    {0x97, 0x2523, 0}, // update by  luobin 2019.0523\n    {0x98, 0x1324, 0}, // update by  walker 2019.01.14, modify for yield\n    {0x9a, 0x4470, 0}, // div2 rc\n    {0x9b, 0xfd52, 0}, // update by  walker 2018.10.24\n    {0x9c, 0x180f, 0}, /////////luobin\n    {0xa3, 0x0789, 0},\n    {0xb0, 0x0000, 0},\n    {0xb1, 0x0000, 0},\n    {0xb3, 0x31f3, 0}, //\n    {0xb4, 0x883c, 0},\n    {0xb6, 0x3156, 0},\n    {0xb7, 0x183f, 0}, // update by  walker 2018.07.30\n    {0xb9, 0x8000, 0}, // cap3g6 off\n    {0xba, 0x104e, 0},\n#if defined(__FANG_LNA_CFG__)\n    {0xac, 0x080e, 0}, // pre-charge set to 5us\n    {0x85, 0x7f00, 0}, // NFMI RXADC LDO rise up\n    // {0xc3,0x0068,0},//add by xrz increase pll cal time 2018/10/20\n    {0xc3, 0x0044, 0},\n#else\n    {0xc3, 0x0050, 0},\n#endif\n    {0xc5, 0x4b50, 0}, // vco ictrl dr\n    {0xc9, 0x3a08, 0}, // vco ictrl\n    {0xd3, 0xc1c1, 0},\n    {0xd4, 0x000f, 0},\n    {0xd5, 0x4000, 0},\n    {0xd6, 0x7980, 0},\n    {0xe8, 0xe000, 0},\n    {0xf3, 0x0c41, 0}, // by fang\n    {0x1a6, 0x0600, 0},\n    {0x1ae, 0x6a00, 0}, // fastlock en\n    {0x1d4, 0x0000, 0},\n    {0x1d7, 0xc4ff, 0}, // update by  walker 2018.10.10\n    {0x1de, 0x2000, 0},\n    {0x1df, 0x2087, 0},\n    {0x1f4, 0x2241, 0}, // by walker 20180427\n    {0x1fa, 0x03df, 0}, // rst needed\n    {0x1fa, 0x83df, 0},\n    {0xeb, REG_EB_VAL, 0}, // gain_idx:0\n    {0x181, REG_181_VAL, 0},\n    {0xec, REG_EC_VAL, 0}, // gain_idx:1\n    {0x182, REG_182_VAL, 0},\n    {0xed, REG_ED_VAL, 0}, // gain_idx:2\n    {0x183, REG_183_VAL, 0},\n    {0xee, REG_EE_VAL, 0}, // gain_idx:3\n    {0x184, REG_184_VAL, 0},\n    {0xef, REG_EF_VAL, 0}, // gain_idx:4\n    {0x185, REG_185_VAL, 0},\n    {0xf0, REG_F0_VAL, 0}, // gain_idx:5\n    {0x186, REG_186_VAL, 0},\n    {0xf1, REG_F1_VAL, 0}, // gain_idx:6\n    {0x187, REG_187_VAL, 0},\n    {0xf2, REG_F2_VAL, 0}, // gain_idx:7\n    {0x188, REG_188_VAL, 0},\n    {0x1d6, 0x7e58, 0}, // set lbrt rxflt dccal_ready=1\n    {0x1c8, 0xdfc0, 0}, // en rfpll bias in lbrt mode\n    {0x1c9, 0xa0cf, 0}, // en log bias\n    {0x82, 0x0caa, 0},  // select rfpll and cplx_dir=0 and en rxflt test\n    {0xf4, 0x2181, 0},  // set flt_cap to match flt_gain\n    {0x86, 0xdc99, 0},  // set nfmi tmix\n    {0xdf, 0x2006, 0},  // set nfmi tmix vcm\n#ifdef __HW_AGC__\n    {0x1c7, 0x007d, 0}, // open lbrt adc and vcm bias current\n#endif\n    {0x18c, 0x0000, 0}, // max tx gain lbrt\n    // air @ LBRT 31.5m\n    {0x1d8, 0x9162, 0}, // lbrt tx freqword\n    {0x1d9, 0x9162, 0}, // lbrt tx freqword\n    {0x1da, 0x9162, 0}, // lbrt tx freqword\n    {0x1db, 0x9162, 0}, // lbrt tx freqword\n    {0x1dc, 0x0000, 0}, // txlccap\n    {0x1dd, 0x0000, 0}, // txlccap\n    {0x1ed, 0x0000, 0}, // rxlccap\n    {0x1ee, 0x0000, 0}, // rxlccap\n    {0x1e9, 0x0a0a, 0}, // set rfpll divn in lbrt tx mode\n    {0x1ea, 0x0a0a, 0},\n    {0x1eb, 0x0a0a, 0}, // set rfpll divn in lbrt rx mode\n    {0x1ec, 0x0a0a, 0},\n    {0x1ef, 0x8a76, 0}, // lbrt rx freqword\n    {0x1f0, 0x8a76, 0}, // lbrt rx freqword\n    {0x1f1, 0x8a76, 0}, // lbrt rx freqword\n    {0x1f2, 0x8a76, 0}, // lbrt rx freqword\n    {0x87, 0x9f00, 0},  //{0x87,0x9f40,0}\n    {0x81, 0x9207, 0},\n    {0xce, 0xfc08, 0},\n    {0x8A, 0x4EA4, 0}, //  use rfpll for nfmi adclk\n    //[below for ibrt]\n    {0x8c, 0x9100, 0},\n    {0xab, 0x1c0c, 0},  // 2019.05.08 by luofei\n    {0xa5, 0x0404, 0},  // rfpll pu time\n    {0xa6, 0x2D20, 0},  // 2019.05.23 by luobin\n    {0xa8, 0x2D22, 0},  // 2019.05.23 by luobin\n    {0x1b7, 0x2c00, 0}, // 2019.05.08 by luofei\n    {0x1ad, 0x9000, 0}, // 2M tx filter baseband\n    {0xdc, 0x8820, 0},  // fa pa pwrup time\n    {0x8f, 0x71b8, 0},  // tx dac by luobin\n};\n\n#ifdef __HW_AGC__\nconst uint16_t rf_init_tbl_1_hw_agc[][3] = // hw agc table\n    {\n        {0xad, 0xa04a, 1}, // hwagc en=1\n        {0xCD, 0x0040, 0}, // default 0x0000\n        {0xcf, 0x7f32, 0}, // lna gain dr=0 //default 0x0000\n        {0xd0, 0xe91f, 0}, // i2v flt gain dr=0 //default 0x0000\n\n        {0xeb, 0x0007, 0}, // gain_idx:0\n        {0xec, 0x0007, 0}, // gain_idx:1\n        {0xed, 0x0007, 0}, // gain_idx:2\n        {0xee, 0x000d, 0}, // gain_idx:3\n        {0xef, 0x000d, 0}, // gain_idx:4\n        {0xf0, 0x000d, 0}, // gain_idx:5\n        {0xf1, 0x000d, 0}, // gain_idx:6\n        {0xf2, 0x000c, 0}, // gain_idx:7\n};\n#endif //__HW_AGC__\n\nconst uint16_t rf_init_tbl_1_sw_agc[][3] = // sw agc table\n    {\n        {0xad, 0xa00a, 1},     // hwagc en=0\n        {0xCD, 0x0000, 0},     // default 0x0000\n        {0xcf, 0x0000, 0},     // lna gain dr=0 //default 0x0000\n        {0xd0, 0x0000, 0},     // i2v flt gain dr=0 //default 0x0000\n        {0xeb, REG_EB_VAL, 0}, // gain_idx:0\n        {0xec, REG_EC_VAL, 0}, // gain_idx:1\n        {0xed, REG_ED_VAL, 0}, // gain_idx:2\n        {0xee, REG_EE_VAL, 0}, // gain_idx:3\n        {0xef, REG_EF_VAL, 0}, // gain_idx:4\n        {0xf0, REG_F0_VAL, 0}, // gain_idx:5\n        {0xf1, REG_F1_VAL, 0}, // gain_idx:6\n        {0xf2, REG_F2_VAL, 0}, // gain_idx:7\n};\n\nuint32_t btdrv_rf_get_max_xtal_tune_ppb(void) {\n  return BT_RF_MAX_XTAL_TUNE_PPB;\n}\n\nuint32_t btdrv_rf_get_xtal_tune_factor(void) { return BT_RF_XTAL_TUNE_FACTOR; }\n\nvoid btdrv_rf_init_xtal_fcap(uint32_t fcap) {\n  xtal_fcap = SET_BITFIELD(xtal_fcap, XTAL_FCAP_NORMAL, fcap);\n  btdrv_write_rf_reg(RF_REG_XTAL_FCAP, xtal_fcap);\n  init_xtal_fcap = xtal_fcap;\n}\n\nuint32_t btdrv_rf_get_init_xtal_fcap(void) {\n  return GET_BITFIELD(init_xtal_fcap, XTAL_FCAP_NORMAL);\n}\n\nuint32_t btdrv_rf_get_xtal_fcap(void) {\n  return GET_BITFIELD(xtal_fcap, XTAL_FCAP_NORMAL);\n}\n\nvoid btdrv_rf_set_xtal_fcap(uint32_t fcap, uint8_t is_direct) {\n  xtal_fcap = SET_BITFIELD(xtal_fcap, XTAL_FCAP_NORMAL, fcap);\n  btdrv_write_rf_reg(RF_REG_XTAL_FCAP, xtal_fcap);\n}\n\nint btdrv_rf_xtal_fcap_busy(uint8_t is_direct) { return 0; }\n\nvoid btdrv_rf_bit_offset_track_enable(bool enable) { return; }\n\nuint32_t btdrv_rf_bit_offset_get(void) { return 0; }\n\nuint16_t btdrv_rf_bitoffset_get(uint8_t conidx) {\n  uint16_t bitoffset;\n  bitoffset = BTDIGITAL_REG(EM_BT_BITOFF_ADDR + conidx * BT_EM_SIZE) & 0x3ff;\n  return bitoffset;\n}\n\nvoid btdrv_rf_log_delay_cal(void) {\n  unsigned short read_value;\n  unsigned short write_value;\n  BT_DRV_TRACE(0, \"btdrv_rf_log_delay_cal\\n\");\n\n  btdrv_write_rf_reg(0xa7, 0x0028);\n\n  btdrv_write_rf_reg(0xd4, 0x0000);\n  btdrv_write_rf_reg(0xd5, 0x4002);\n  //   *(volatile uint32_t*)(0xd02201e4) = 0x000a00b0;\n  *(volatile uint32_t *)(0xd0340020) = 0x030e01c1;\n  BT_DRV_TRACE(1, \"0xd0340020 =%x\\n\", *(volatile uint32_t *)(0xd0340020));\n\n  btdrv_delay(1);\n\n  btdrv_write_rf_reg(0xd2, 0x5003);\n\n  btdrv_delay(1);\n\n  btdrv_read_rf_reg(0x1e2, &read_value);\n  BT_DRV_TRACE(1, \"0x1e2 read_value:%x\\n\", read_value);\n  if (read_value == 0xff80) {\n    btdrv_write_rf_reg(0xd3, 0xffff);\n  } else {\n    write_value = ((read_value >> 7) & 0x0001) | ((read_value & 0x007f) << 1) |\n                  ((read_value & 0x8000) >> 7) | ((read_value & 0x7f00) << 1);\n    BT_DRV_TRACE(1, \"d3 write_value:%x\\n\", write_value);\n    btdrv_write_rf_reg(0xd3, write_value);\n  }\n  btdrv_delay(1);\n\n  //    *(volatile uint32_t*)(0xd02201e4) = 0x00000000;\n  *(volatile uint32_t *)(0xd0340020) = 0x010e01c0;\n  BT_DRV_TRACE(1, \"0xd0340020 =%x\\n\", *(volatile uint32_t *)(0xd0340020));\n\n  btdrv_write_rf_reg(0xd4, 0x000f);\n  btdrv_write_rf_reg(0xd2, 0x1003);\n  btdrv_write_rf_reg(0xd5, 0x4000);\n}\n\nvoid btdrv_rf_rx_gain_adjust_req(uint32_t user, bool lowgain) { return; }\n\n// rf Image calib\nvoid btdtv_rf_image_calib(void) {\n\n  uint16_t read_val;\n  // read calibrated val from efuse 0x05 register\n  pmu_get_efuse(PMU_EFUSE_PAGE_SW_CFG, &read_val);\n  // check if bit 11 has been set\n  uint8_t calb_done_flag = ((read_val & 0x800) >> 11);\n  if (calb_done_flag) {\n    BT_DRV_TRACE(1, \"EFUSE REG[5]=%x\", read_val);\n  } else {\n    BT_DRV_TRACE(0, \"EFUSE REG[5] rf image has not been calibrated!\");\n    return;\n  }\n  //[bit 12] calib flag\n  uint8_t calib_val = ((read_val & 0x1000) >> 12);\n  btdrv_read_rf_reg(0x9b, &read_val);\n  read_val &= 0xfcff;\n\n  if (calib_val == 0) {\n    read_val |= 1 << 8;\n  } else if (calib_val == 1) {\n    read_val |= 1 << 9;\n  }\n\n  BT_DRV_TRACE(1, \"write rf image calib val=%x in REG[0x9b]\", read_val);\n  btdrv_write_rf_reg(0x9b, read_val);\n}\n\n#ifdef TX_IQ_CAL\nconst uint16_t tx_cal_rfreg_set[][3] = {\n    // iq cal path\n    {0x1c4, 0xffcf, 0},\n    {0x1c5, 0xf8ff, 0},\n    {0x1c6, 0x007f, 0},\n    {0x1c7, 0x03ff, 0},\n    {0x1d6, 0x7a58, 0},\n    {0x1d7, 0xc0f7, 0},\n    {0x1f4, 0x2481, 0},\n    {0x94, 0x11c3, 0},\n    {0x95, 0xe5c0, 0},\n    {0xd1, 0x846b, 0},\n    {0xae, 0x0403, 0},\n    {0x86, 0xccd9, 0},\n    {0xf3, 0x0c75, 0},\n    {0xf4, 0x0309, 0},\n    {0xcf, 0x8090, 0},\n    {0x82, 0x2cab, 0},\n\n    // nfmi adc\n    {0xc4, 0x00c3, 0},\n    {0xae, 0x07ff, 0},\n    {0x85, 0x470f, 0},\n    {0x82, 0x4aab, 0},\n    {0x82, 0xecab, 0},\n    {0x87, 0xa211, 0},\n    {0x87, 0xe211, 0},\n    {0x84, 0xfff8, 0},\n};\n\nconst uint16_t tx_cal_rfreg_store[][1] = {\n    {0x1c4}, {0x1c5}, {0x1c6}, {0x1c7}, {0x1d6}, {0x1d7}, {0x1f4},\n    {0x94},  {0x95},  {0xd1},  {0xae},  {0x86},  {0xf3},  {0xf4},\n    {0xcf},  {0x82},  {0xc4},  {0x85},  {0x87},  {0x84},\n};\n\nint bt_iqimb_ini();\nint bt_iqimb_test_ex(int mismatch_type);\nvoid btdrv_tx_iq_cal(void) {\n  uint8_t i;\n  const uint16_t(*tx_cal_rfreg_set_p)[3];\n  const uint16_t(*tx_cal_rfreg_store_p)[1];\n  uint32_t reg_set_tbl_size;\n  uint32_t reg_store_tbl_size;\n  uint16_t value;\n  uint32_t tx_cal_digreg_store[5];\n\n  tx_cal_rfreg_store_p = &tx_cal_rfreg_store[0];\n  reg_store_tbl_size =\n      sizeof(tx_cal_rfreg_store) / sizeof(tx_cal_rfreg_store[0]);\n  uint16_t tx_cal_rfreg_store[reg_store_tbl_size];\n  BT_DRV_TRACE(0, \"reg_store:\\n\");\n  for (i = 0; i < reg_store_tbl_size; i++) {\n    btdrv_read_rf_reg(tx_cal_rfreg_store_p[i][0], &value);\n    tx_cal_rfreg_store[i] = value;\n    BT_DRV_TRACE(2, \"reg=%x,v=%x\", tx_cal_rfreg_store_p[i][0], value);\n  }\n  tx_cal_digreg_store[0] = *(volatile uint32_t *)(0xd0330038);\n  tx_cal_digreg_store[1] = *(volatile uint32_t *)(0xd0350364);\n  tx_cal_digreg_store[2] = *(volatile uint32_t *)(0xd0350360);\n  tx_cal_digreg_store[3] = *(volatile uint32_t *)(0xd035037c);\n  tx_cal_digreg_store[4] = *(volatile uint32_t *)(0xd02201e4);\n  BT_DRV_TRACE(1, \"0xd0330038:%x\\n\", tx_cal_digreg_store[0]);\n  BT_DRV_TRACE(1, \"0xd0350364:%x\\n\", tx_cal_digreg_store[1]);\n  BT_DRV_TRACE(1, \"0xd0350360:%x\\n\", tx_cal_digreg_store[2]);\n  BT_DRV_TRACE(1, \"0xd035037c:%x\\n\", tx_cal_digreg_store[3]);\n  BT_DRV_TRACE(1, \"0xd02201e4:%x\\n\", tx_cal_digreg_store[4]);\n\n  tx_cal_rfreg_set_p = &tx_cal_rfreg_set[0];\n  reg_set_tbl_size = sizeof(tx_cal_rfreg_set) / sizeof(tx_cal_rfreg_set[0]);\n  BT_DRV_TRACE(0, \"reg_set:\\n\");\n  for (i = 0; i < reg_set_tbl_size; i++) {\n    btdrv_write_rf_reg(tx_cal_rfreg_set_p[i][0], tx_cal_rfreg_set_p[i][1]);\n    if (tx_cal_rfreg_set_p[i][2] != 0)\n      btdrv_delay(tx_cal_rfreg_set_p[i][2]); // delay\n    btdrv_read_rf_reg(tx_cal_rfreg_set_p[i][0], &value);\n    BT_DRV_TRACE(2, \"reg=%x,v=%x\", tx_cal_rfreg_set_p[i][0], value);\n  }\n  // iq cal cordic\n  *(volatile uint32_t *)(0xd0330038) = 0x0020010d;\n  btdrv_delay(1);\n  *(volatile uint32_t *)(0xd0350364) = 0x002eb948;\n  *(volatile uint32_t *)(0xd0350360) = 0x007fc240;\n  *(volatile uint32_t *)(0xd035037c) = 0x00020405;\n  *(volatile uint32_t *)(0xd02201e4) = 0x000a0000;\n  BT_DRV_TRACE(1, \"0xd0330038:%x\\n\", *(volatile uint32_t *)(0xd0330038));\n  BT_DRV_TRACE(1, \"0xd0350364:%x\\n\", *(volatile uint32_t *)(0xd0350364));\n  BT_DRV_TRACE(1, \"0xd0350360:%x\\n\", *(volatile uint32_t *)(0xd0350360));\n  BT_DRV_TRACE(1, \"0xd035037c:%x\\n\", *(volatile uint32_t *)(0xd035037c));\n  BT_DRV_TRACE(1, \"0xd02201e4:%x\\n\", *(volatile uint32_t *)(0xd02201e4));\n\n  bt_iqimb_ini();\n  bt_iqimb_test_ex(1);\n\n  BT_DRV_TRACE(0, \"reg_reset:\\n\");\n  for (i = 0; i < reg_store_tbl_size; i++) {\n    btdrv_write_rf_reg(tx_cal_rfreg_store_p[i][0], tx_cal_rfreg_store[i]);\n\n    btdrv_read_rf_reg(tx_cal_rfreg_store_p[i][0], &value);\n    BT_DRV_TRACE(2, \"reg=%x,v=%x\", tx_cal_rfreg_store_p[i][0], value);\n  }\n  *(volatile uint32_t *)(0xd0330038) = tx_cal_digreg_store[0];\n  *(volatile uint32_t *)(0xd0350364) = tx_cal_digreg_store[1];\n  *(volatile uint32_t *)(0xd0350360) = tx_cal_digreg_store[2];\n  *(volatile uint32_t *)(0xd035037c) = tx_cal_digreg_store[3];\n  *(volatile uint32_t *)(0xd02201e4) = tx_cal_digreg_store[4];\n  BT_DRV_TRACE(1, \"0xd0330038:%x\\n\", *(volatile uint32_t *)(0xd0330038));\n  BT_DRV_TRACE(1, \"0xd0350364:%x\\n\", *(volatile uint32_t *)(0xd0350364));\n  BT_DRV_TRACE(1, \"0xd0350360:%x\\n\", *(volatile uint32_t *)(0xd0350360));\n  BT_DRV_TRACE(1, \"0xd035037c:%x\\n\", *(volatile uint32_t *)(0xd035037c));\n  BT_DRV_TRACE(1, \"0xd02201e4:%x\\n\", *(volatile uint32_t *)(0xd02201e4));\n}\n#endif\n\nuint8_t btdrv_rf_init(void) {\n  uint16_t value;\n  const uint16_t(*rf_init_tbl_p)[3];\n  uint32_t tbl_size;\n  // uint8_t ret;\n  uint8_t i;\n\n  for (i = 0; i < ARRAY_SIZE(rf_sys_init_tbl); i++) {\n    btdrv_read_rf_reg(rf_sys_init_tbl[i].reg, &value);\n    value = (value & ~rf_sys_init_tbl[i].mask) |\n            (rf_sys_init_tbl[i].set & rf_sys_init_tbl[i].mask);\n    if (rf_sys_init_tbl[i].delay) {\n      btdrv_delay(rf_sys_init_tbl[i].delay);\n    }\n    btdrv_write_rf_reg(rf_sys_init_tbl[i].reg, value);\n  }\n\n  rf_init_tbl_p = &rf_init_tbl_1[0];\n  tbl_size = sizeof(rf_init_tbl_1) / sizeof(rf_init_tbl_1[0]);\n\n  for (i = 0; i < tbl_size; i++) {\n    btdrv_write_rf_reg(rf_init_tbl_p[i][0], rf_init_tbl_p[i][1]);\n    if (rf_init_tbl_p[i][2] != 0)\n      btdrv_delay(rf_init_tbl_p[i][2]); // delay\n  }\n\n  bt_drv_tx_pwr_init();\n\n#ifdef __HW_AGC__\n  for (i = 0;\n       i < sizeof(rf_init_tbl_1_hw_agc) / sizeof(rf_init_tbl_1_hw_agc[0]);\n       i++) {\n    btdrv_write_rf_reg(rf_init_tbl_1_hw_agc[i][0], rf_init_tbl_1_hw_agc[i][1]);\n    if (rf_init_tbl_1_hw_agc[i][2] != 0)\n      btdrv_delay(rf_init_tbl_1_hw_agc[i][2]); // delay\n  }\n#endif\n\n  // need before rf log delay cal\n  btdtv_rf_image_calib();\n\n  btdrv_rf_log_delay_cal();\n\n  btdrv_spi_trig_init();\n\n#ifdef TX_IQ_CAL\n  hal_btdump_clk_enable();\n  bt_iq_calibration_setup();\n  hal_btdump_clk_disable();\n#endif\n\n  return 1;\n}\n\nvoid bt_drv_rf_reset(void) {\n  btdrv_write_rf_reg(0x80, 0xcafe);\n  btdrv_write_rf_reg(0x80, 0x5fee);\n}\n\nstatic void bt_drv_switch_hw_sw_agc(enum BT_AGC_MODE_T agc_mode) {\n  static enum BT_AGC_MODE_T agc_mode_bak = BT_AGC_MODE_NONE;\n  uint16_t i = 0;\n\n  if (agc_mode_bak != agc_mode) {\n    agc_mode_bak = agc_mode;\n    BT_DRV_TRACE(1, \"BT_DRV:use AGC mode=%d[1:HW,0:SW]\", agc_mode);\n    uint32_t lock = int_lock_global();\n    if (agc_mode == BT_AGC_MODE_HW) {\n#ifdef __HW_AGC__\n      bt_drv_reg_op_hw_sw_agc_select(BT_AGC_MODE_HW);\n      for (i = 0;\n           i < sizeof(rf_init_tbl_1_hw_agc) / sizeof(rf_init_tbl_1_hw_agc[0]);\n           i++) {\n        btdrv_write_rf_reg(rf_init_tbl_1_hw_agc[i][0],\n                           rf_init_tbl_1_hw_agc[i][1]);\n        if (rf_init_tbl_1_hw_agc[i][2] != 0)\n          btdrv_delay(rf_init_tbl_1_hw_agc[i][2]); // delay\n      }\n#endif\n    } else {\n      bt_drv_reg_op_hw_sw_agc_select(BT_AGC_MODE_SW);\n      for (i = 0;\n           i < sizeof(rf_init_tbl_1_sw_agc) / sizeof(rf_init_tbl_1_sw_agc[0]);\n           i++) {\n        btdrv_write_rf_reg(rf_init_tbl_1_sw_agc[i][0],\n                           rf_init_tbl_1_sw_agc[i][1]);\n        if (rf_init_tbl_1_sw_agc[i][2] != 0)\n          btdrv_delay(rf_init_tbl_1_sw_agc[i][2]); // delay\n      }\n    }\n    int_unlock_global(lock);\n  }\n}\n\nvoid bt_drv_select_agc_mode(enum BT_WORK_MODE_T mode) {\n#ifdef __HYBIRD_AGC__\n  enum BT_AGC_MODE_T agc_mode = BT_AGC_MODE_SW;\n  switch (mode) {\n  case BT_IDLE_MODE:\n    agc_mode = BT_AGC_MODE_HW;\n    break;\n  case BT_A2DP_WORK_MODE:\n  case BT_HFP_WORK_MODE:\n    agc_mode = BT_AGC_MODE_SW;\n    break;\n  default:\n    BT_DRV_TRACE(1, \"BT_DRV:set error mork mode=%d\", mode);\n    break;\n  }\n\n  bt_drv_switch_hw_sw_agc(agc_mode);\n#endif\n}\n\nstatic uint16_t efuse;\nstatic int16_t rf18b_6_4, rf18b_10_8, rf18b_14_12;\n#define TX_POWET_CALIB_FACTOR 0x2\n\nstatic int check_btpower_efuse_invalid(void) {\n  pmu_get_efuse(PMU_EFUSE_PAGE_BT_POWER, &efuse);\n  BT_DRV_TRACE(1, \"efuse_8=0x%x\", efuse);\n\n  rf18b_6_4 = (efuse & 0x70) >> 4;      // address_8 [6:4]\n  rf18b_10_8 = (efuse & 0x700) >> 8;    // address_8 [10:8]\n  rf18b_14_12 = (efuse & 0x7000) >> 12; // address_8 [14:12]\n\n  if ((0 == efuse) || (rf18b_6_4 > 5) || (rf18b_10_8 > 5) ||\n      (rf18b_14_12 > 5)) {\n    BT_DRV_TRACE(0, \"invalid efuse value.\");\n    return 0;\n  }\n\n  return 1;\n}\n\nvoid bt_drv_tx_pwr_init(void) {\n  // ble txpower need modify ble tx idx @ bt_drv_config.c\n  // modify bit4~7 to change ble tx gain\n  btdrv_write_rf_reg(0x189, 0x0071); // min tx gain  2019.02.26\n  btdrv_write_rf_reg(0x18a, 0x0071); // mid tx gain  2019.02.26\n  if (0 == check_btpower_efuse_invalid())\n    btdrv_write_rf_reg(0x18b, 0x0071); // max tx gain 2019.02.26\n}\n\nvoid bt_drv_tx_pwr_init_for_testmode(void) {\n  // ble txpower need modify ble tx idx @ bt_drv_config.c\n  // modify bit4~7 to change ble tx gain\n  btdrv_write_rf_reg(0x189, 0x007a); // min tx gain  2019.02.26\n  btdrv_write_rf_reg(0x18a, 0x0076); // mid tx gain  2019.02.26\n  if (0 == check_btpower_efuse_invalid())\n    btdrv_write_rf_reg(0x18b, 0x0071); // max tx gain 2019.02.26\n}\n\nvoid btdrv_txpower_calib(void) {\n  uint16_t rf92_11_8;\n  uint16_t tmp_val;\n  int16_t average_value; // may be negative, so use signed numbers\n  uint16_t read_value;\n\n  uint16_t bit7_symbol, bit11_symbol, bit15_symbol;\n\n  if (0 == check_btpower_efuse_invalid())\n    return;\n\n  bit7_symbol = (efuse & 0x80) >> 4;\n  bit11_symbol = (efuse & 0x800) >> 8;\n  bit15_symbol = (efuse & 0x8000) >> 12;\n  rf92_11_8 = efuse & 0xf; // address_8 [3:0]\n\n  BT_DRV_TRACE(3, \"bit7_symbol=%d, bit11_symbol=%d, bit15_symbol=%d\",\n               bit7_symbol, bit11_symbol, bit15_symbol);\n  BT_DRV_TRACE(4, \"rf92_11_8=%x, rf18b_6_4=%x, rf18b_10_8=%x, rf18b_14_12=%x\",\n               rf92_11_8, rf18b_6_4, rf18b_10_8, rf18b_14_12);\n\n  rf18b_6_4 = (bit7_symbol == 0) ? rf18b_6_4 : -rf18b_6_4;\n  rf18b_10_8 = (bit11_symbol == 0) ? rf18b_10_8 : -rf18b_10_8;\n  rf18b_14_12 = (bit15_symbol == 0) ? rf18b_14_12 : -rf18b_14_12;\n\n  // set 0x92[11:8] begin\n  btdrv_read_rf_reg(0x92, &tmp_val);\n  BT_DRV_TRACE(1, \"read reg 0x92 val=%x\", tmp_val);\n  tmp_val &= 0xf0ff;                      // clear [11:8]\n  tmp_val |= ((rf92_11_8 & 0xffff) << 8); // set efuse[3:0] to rf_92 [11:8]\n  BT_DRV_TRACE(2, \"%d write reg 0x92 val=%x\", __LINE__, tmp_val);\n  btdrv_write_rf_reg(0x92, tmp_val);\n  // set 0x92[11:8] end\n\n  // set 0x18b[3:0] begin\n  btdrv_read_rf_reg(0x18b, &read_value); // 0x18b\n\n  average_value =\n      (int16_t)(((float)(rf18b_6_4 + rf18b_10_8 + rf18b_14_12) / 6.f) + 0.5f);\n  BT_DRV_TRACE(2, \"calc average_value=0x%x, dec:%d\", average_value,\n               average_value);\n\n  if (0 < average_value) {\n    btdrv_read_rf_reg(0x92, &tmp_val);\n    tmp_val &= 0x0fff; // clear [15:12]\n\n    if (1 == average_value) {\n      tmp_val |= ((0x8 & 0xffff) << 12);\n    } else // average_value [2,~]\n    {\n      tmp_val |= ((0xA & 0xffff) << 12);\n    }\n    BT_DRV_TRACE(2, \"%d write reg 0x92 val=%x\", __LINE__, tmp_val);\n    btdrv_write_rf_reg(0x92, tmp_val);\n  }\n\n  tmp_val = TX_POWET_CALIB_FACTOR - average_value;\n  if (average_value > TX_POWET_CALIB_FACTOR)\n    tmp_val = 0;\n\n  BT_DRV_TRACE(1, \"finally tmp_val=%x\", tmp_val);\n\n  read_value &= 0xff00;                 // clear [3:0] & [7:4]\n  read_value |= (tmp_val | (0x7 << 4)); // get 0x18b [3:0] & [7:4]\n  btdrv_write_rf_reg(0x18b, read_value);\n  BT_DRV_TRACE(1, \"write reg 0x18b val=0x%x\", read_value);\n  // set 0x18b[3:0] end\n}\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/bt_drv_uart_bridge_intsys.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"bt_drv.h\"\n#include \"bt_drv_2300p_internal.h\"\n#include \"bt_drv_interface.h\"\n#include \"hal_chipid.h\"\n#include \"hal_intersys.h\"\n#include \"hal_iomux.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"heap_api.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n\n#define BT_UART_BRIDGE_BUF_LEN (1024)\n\nstatic const struct HAL_UART_CFG_T uart_cfg = {\n    .parity = HAL_UART_PARITY_NONE,\n    .stop = HAL_UART_STOP_BITS_1,\n    .data = HAL_UART_DATA_BITS_8,\n    .flow = HAL_UART_FLOW_CONTROL_NONE,\n    .tx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .rx_level = HAL_UART_FIFO_LEVEL_1_4,\n    .baud = 115200,\n    .dma_rx = true,\n    .dma_tx = true,\n    .dma_rx_stop_on_err = false,\n};\n\n#if (DEBUG_PORT == 1)\nenum HAL_UART_ID_T br_uart = HAL_UART_ID_0;\n#else\nenum HAL_UART_ID_T br_uart = HAL_UART_ID_1;\n#endif\nenum HAL_INTERSYS_ID_T br_intersys = HAL_INTERSYS_ID_0;\n\nstatic volatile bool uart_rx_done = false;\nstatic volatile bool uart_tx_done = false;\nstatic volatile bool bt_rx_done = false;\nstatic volatile bool bt_tx_done = false;\n\nstatic unsigned char *uart_rx_data_p;\nstatic volatile unsigned int uart_rx_len = 0;\n\nstatic unsigned char *bt_rx_data_p;\nstatic volatile unsigned int bt_rx_len = 0;\n\nstatic void uart_rx(uint32_t xfer_size, int dma_error,\n                    union HAL_UART_IRQ_T status) {\n  if (dma_error) {\n    BT_DRV_TRACE(1, \"uart_rx dma error: xfer_size=%d\", xfer_size);\n    uart_rx_len = 0;\n  } else if (status.BE || status.FE || status.OE || status.PE) {\n    BT_DRV_TRACE(2, \"uart_rx uart error: xfer_size=%d, status=0x%08x\",\n                 xfer_size, status.reg);\n    uart_rx_len = 0;\n  } else {\n    uart_rx_len = xfer_size;\n  }\n  uart_rx_done = true;\n}\n\nstatic void uart_tx(uint32_t xfer_size, int dma_error) {\n  if (dma_error) {\n    BT_DRV_TRACE(1, \"uart_tx dma error: xfer_size=%d\", xfer_size);\n  }\n  uart_tx_done = true;\n}\n\n#ifdef VCO_TEST_TOOL\nstatic unsigned int bt_rx(const unsigned char *data, unsigned int len);\n\nvoid vco_test_simu_bt_rx(void) {\n  const unsigned char hci_bt_vco_test_event[] = {0x04, 0x0e, 0x04, 0x05,\n                                                 0xaa, 0xfc, 0x00};\n  bt_rx(hci_bt_vco_test_event, sizeof(hci_bt_vco_test_event));\n}\n#endif\n\nstatic unsigned int bt_rx(const unsigned char *data, unsigned int len) {\n  unsigned int processed = len;\n\n  hal_intersys_stop_recv(br_intersys);\n  if (bt_rx_len + processed > BT_UART_BRIDGE_BUF_LEN) {\n    BT_DRV_TRACE(3, \"bt_rx data too long: bt_rx_len=%d, len=%d, limit=%d\",\n                 bt_rx_len, processed, sizeof(bt_rx_data_p));\n    processed = BT_UART_BRIDGE_BUF_LEN - bt_rx_len;\n  }\n  if (processed > 0) {\n    memcpy(bt_rx_data_p + bt_rx_len, data, processed);\n    if ((data[0] == 0x4) && (data[2] == 0xc) && (data[4] == 0x1) &&\n        (data[5] == 0x10)) {\n      *(uint8_t *)(bt_rx_data_p + bt_rx_len + 7) = 0x09;\n      *(uint8_t *)(bt_rx_data_p + bt_rx_len + 10) = 0x09;\n    }\n    if (data[0] == 0x4 && data[1] == 0xe && data[4] == 0x3 && data[5] == 0xc) {\n      memset((uint32_t *)BT_EM_ADDR_BASE, 0, BT_EM_SIZE / 4);\n      *(uint32_t *)0xd02201e4 = 0;\n    }\n    BT_DRV_TRACE(0, \"[TX]:\");\n    DUMP8(\"%02x \", bt_rx_data_p + bt_rx_len, processed);\n    bt_rx_len += processed;\n    bt_rx_done = true;\n  }\n  return len;\n}\n\nstatic void bt_tx(const unsigned char *data, unsigned int len) {\n  bt_tx_done = true;\n}\n\nvoid btdrv_uart_bridge_loop(void) {\n  int ret;\n  union HAL_UART_IRQ_T mask;\n\n  syspool_init();\n\n  syspool_get_buff(&uart_rx_data_p, BT_UART_BRIDGE_BUF_LEN);\n  syspool_get_buff(&bt_rx_data_p, BT_UART_BRIDGE_BUF_LEN);\n\n  if (br_uart == HAL_UART_ID_0) {\n    hal_iomux_set_uart0();\n    hal_trace_switch(HAL_TRACE_TRANSPORT_UART1);\n    hal_iomux_set_uart1();\n  } else {\n    hal_iomux_set_uart1();\n    hal_trace_switch(HAL_TRACE_TRANSPORT_UART0);\n    // hal_iomux_set_uart0();\n  }\n\n  ret = hal_uart_open(br_uart, &uart_cfg);\n  if (ret) {\n    BT_DRV_TRACE(0, \"Failed to open uart\");\n    return;\n  }\n\n  hal_uart_irq_set_dma_handler(br_uart, uart_rx, uart_tx);\n  mask.reg = 0;\n  mask.BE = 1;\n  mask.FE = 1;\n  mask.OE = 1;\n  mask.PE = 1;\n  mask.RT = 1;\n  hal_uart_dma_recv_mask(br_uart, uart_rx_data_p, BT_UART_BRIDGE_BUF_LEN, NULL,\n                         NULL, &mask);\n\n  ret =\n      hal_intersys_open(br_intersys, HAL_INTERSYS_MSG_HCI, bt_rx, bt_tx, false);\n  if (ret) {\n    BT_DRV_TRACE(0, \"Failed to open intersys\");\n    return;\n  }\n  hal_intersys_start_recv(br_intersys);\n  BT_DRV_TRACE(0, \"Enter bridge mode\");\n\n  while (1) {\n    if (uart_rx_done) {\n      uart_rx_done = false;\n      if (uart_rx_len > 0) {\n        BT_DRV_TRACE(0, \"[RX]:\");\n        DUMP8(\"%02x \", uart_rx_data_p, uart_rx_len);\n#ifdef LAURENT_ALGORITHM\n        btdrv_ble_test_bridge_intsys_callback(uart_rx_data_p);\n#endif\n\n#ifdef VCO_TEST_TOOL\n        if (btdrv_vco_test_bridge_intsys_callback(uart_rx_data_p)) {\n          uart_rx_len = 0;\n          continue;\n        }\n#endif\n        hal_intersys_send(br_intersys, HAL_INTERSYS_MSG_HCI, uart_rx_data_p,\n                          uart_rx_len);\n      } else {\n        bt_tx_done = true;\n      }\n    }\n    if (uart_tx_done) {\n      uart_tx_done = false;\n      bt_rx_len = 0;\n      hal_intersys_start_recv(br_intersys);\n    }\n    if (bt_rx_done) {\n      bt_rx_done = false;\n      if (bt_rx_len > 0) {\n        hal_uart_dma_send(br_uart, bt_rx_data_p, bt_rx_len, NULL, NULL);\n      } else {\n        uart_tx_done = true;\n      }\n    }\n    if (bt_tx_done) {\n      bt_tx_done = false;\n      hal_uart_dma_recv_mask(br_uart, uart_rx_data_p, BT_UART_BRIDGE_BUF_LEN,\n                             NULL, NULL, &mask);\n    }\n#ifdef VCO_TEST_TOOL\n    if (btdrv_get_vco_test_process_flag()) {\n      btdrv_vco_test_process(btdrv_get_vco_test_process_flag());\n      vco_test_simu_bt_rx();\n    }\n#endif\n  }\n}\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/iqcorrect.c",
    "content": "#ifdef RTOS\n\n#include \n#include \n\n#include \"hal_dma.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"heap_api.h\"\n\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_btdump.h\"\n#include \"iqcorrect.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \"string.h\"\n#ifdef TX_IQ_CAL\n#define LOG_MODULE HAL_TRACE_MODULE_APP\n\n#define NTbl (1024)\n#define fftSize 1024\n\n#define bitshift 10\n#define pi (3.1415926535898)\n#define min(a, b) (((a) < (b)) ? (a) : (b))\n\n#define READ_REG(b, a) *(volatile uint32_t *)(b + a)\n#define WRITE_REG(v, b, a) *(volatile uint32_t *)(b + a) = v\n\n#define BUF_SIZE (1024)\n\n#define MAX_COUNT 5\nvolatile int iqimb_dma_status = 0;\n// short M0data[BUF_SIZE];\n#define MED_MEM_POOL_SIZE (20 * 1024)\nstatic uint8_t *g_medMemPool = NULL;\n\nextern void *rt_malloc(unsigned int size);\nextern void rt_free(void *rmem);\n\ntypedef struct ComplexInt_ {\n  int re;\n  int im;\n} ComplexInt;\ntypedef struct Complexflt_ {\n  float re;\n  float im;\n} ComplexFlt;\ntypedef struct ComplexShort_ {\n  short re;\n  short im;\n} ComplexShort;\n\n#ifdef DCCalib\nstatic void Tblgen(ComplexShort *w0, ComplexShort *w1, ComplexShort *w2,\n                   int len) {\n  for (int i = 0; i < len; i++) {\n\n    w0[i].re = (short)(cos(2 * pi * i / (2048.0 / 32)) * 32767);\n    w0[i].im = (short)(sin(2 * pi * i / (2048.0 / 32)) * 32767);\n    w1[i].re = (short)(cos(2 * pi * i / (2048.0 / 31)) * 32767);\n    w1[i].im = (short)(sin(2 * pi * i / (2048.0 / 31)) * 32767);\n    w2[i].re = (short)(cos(2 * pi * i / (2048.0 / 33)) * 32767);\n    w2[i].im = (short)(sin(2 * pi * i / (2048.0 / 33)) * 32767);\n  }\n}\n#endif\nstatic void Tblgen_iq(ComplexShort *w0, ComplexShort *w1, ComplexShort *w2,\n                      int len) {\n  for (int i = 0; i < len; i++) {\n\n    w0[i].re = (short)(cos(2 * pi * i / (2048.0 / 64)) * 32767);\n    w0[i].im = (short)(sin(2 * pi * i / (2048.0 / 64)) * 32767);\n    w1[i].re = (short)(cos(2 * pi * i / (2048.0 / 63)) * 32767);\n    w1[i].im = (short)(sin(2 * pi * i / (2048.0 / 63)) * 32767);\n    w2[i].re = (short)(cos(2 * pi * i / (2048.0 / 65)) * 32767);\n    w2[i].im = (short)(sin(2 * pi * i / (2048.0 / 65)) * 32767);\n  }\n}\n/*\ntypedef struct IQMismatchPreprocessState_\n{\n    short *M0data;\n    ComplexShort *Table0;\n    ComplexShort *Table1;\n    ComplexShort *Table2;\n} IQMismatchPreprocessState;\n\n\nIQMismatchPreprocessState st_g;\nshort st_M0data[fftSize];\nshort st_Table0[2*NTbl];\nshort st_Table1[2*NTbl];\nshort st_Table2[2*NTbl];\n\nIQMismatchPreprocessState *st;\n\n\nIQMismatchPreprocessState *IQMismatchPreprocessState_init(int Cohcnt)\n{\n    st_g.M0data = st_M0data;\n    st_g.Table0= st_Table0;\n    st_g.Table1= st_Table1;\n    st_g.Table2= st_Table2;\n    return &st_g;\n}\n*/\n\ntypedef struct IQMismatchPreprocessState_ {\n  short *M0data;\n  ComplexShort *Table0;\n  ComplexShort *Table1;\n  ComplexShort *Table2;\n} IQMismatchPreprocessState;\n\nIQMismatchPreprocessState *IQMismatchPreprocessState_init(int fft_size) {\n  BT_DRV_TRACE(0, \"malloc ini\");\n  IQMismatchPreprocessState *st = (IQMismatchPreprocessState *)med_calloc(\n      1, sizeof(IQMismatchPreprocessState));\n  st->M0data = (short *)med_calloc(fft_size, sizeof(short));\n  st->Table0 = (ComplexShort *)med_calloc(fft_size, sizeof(ComplexShort));\n  st->Table1 = (ComplexShort *)med_calloc(fft_size, sizeof(ComplexShort));\n  st->Table2 = (ComplexShort *)med_calloc(fft_size, sizeof(ComplexShort));\n  BT_DRV_TRACE(\n      5, \"st:%p, st->M0data:%p, st->Table0:%p, st->Table1:%p, st->Table2:%p\",\n      st, st->M0data, st->Table0, st->Table1, st->Table2);\n  BT_DRV_TRACE(0, \"malloc ok\");\n  return st;\n}\n\nint32_t IQMismatchPreprocessState_destroy(IQMismatchPreprocessState *st) {\n  BT_DRV_TRACE(\n      5, \"st:%p, st->M0data:%p, st->Table0:%p, st->Table1:%p, st->Table2:%p\",\n      st, st->M0data, st->Table0, st->Table1, st->Table2);\n  med_free(st->M0data);\n  med_free(st->Table0);\n  med_free(st->Table1);\n  med_free(st->Table2);\n  med_free(st);\n  return 0;\n}\n\nint IQMismatchParameterCalc_ex(short *M0data, short Cohcnt,\n                               ComplexShort *Table0, ComplexShort *Table1,\n                               ComplexShort *Table2, int fftsize) {\n  int i, j, k;\n  float M0 = 0;\n  // ComplexInt tmp0;\n  ComplexFlt tmp0;\n  ComplexFlt tmp1;\n  ComplexFlt tmp2;\n  for (j = 0; j < Cohcnt; j++) {\n    tmp0.re = 0.0f;\n    tmp0.im = 0.0f;\n    tmp1.re = 0.0f;\n    tmp1.im = 0.0f;\n    tmp2.re = 0.0f;\n    tmp2.im = 0.0f;\n    k = 0;\n    for (i = 0; i < fftsize; i++) {\n      if (k >= fftsize)\n        k = 0;\n      tmp0.re = tmp0.re + (((int)M0data[i] * (int)Table0[k].re) >> 15);\n      tmp0.im = tmp0.im + (((int)M0data[i] * (int)Table0[k].im) >> 15);\n      tmp1.re = tmp1.re + (((int)M0data[i] * (int)Table1[k].re) >> 15);\n      tmp1.im = tmp1.im + (((int)M0data[i] * (int)Table1[k].im) >> 15);\n      tmp2.re = tmp2.re + (((int)M0data[i] * (int)Table2[k].re) >> 15);\n      tmp2.im = tmp2.im + (((int)M0data[i] * (int)Table2[k].im) >> 15);\n      k = k + 1;\n    }\n    tmp0.re = tmp0.re / fftsize; // >> bitshift;\n    tmp0.im = tmp0.im / fftsize; // >>bitshift;\n    tmp1.re = tmp1.re / fftsize; // >> bitshift;\n    tmp1.im = tmp1.im / fftsize; // >>bitshift;\n    tmp2.re = tmp2.re / fftsize; // >> bitshift;\n    tmp2.im = tmp2.im / fftsize; // >>bitshift;\n    M0 = M0 + tmp0.re * tmp0.re + tmp0.im * tmp0.im;\n    M0 = M0 + tmp1.re * tmp1.re + tmp1.im * tmp1.im;\n    M0 = M0 + tmp2.re * tmp2.re + tmp2.im * tmp2.im;\n  }\n  return (int)(M0 / Cohcnt);\n}\n\nvoid caculate_energy_main_test(IQMismatchPreprocessState *st, int *Energy,\n                               int *Energy1, int fftsize) {\n  short Cohcnt = 1;\n  *Energy1 = IQMismatchParameterCalc_ex(st->M0data, Cohcnt, st->Table0,\n                                        st->Table1, st->Table2, fftsize);\n}\n\nstatic struct HAL_DMA_DESC_T iqimb_dma_desc[1];\n\nstatic void iqimb_dma_dout_handler(uint32_t remains, uint32_t error,\n                                   struct HAL_DMA_DESC_T *lli) {\n  hal_audma_free_chan(0);\n  hal_btdump_disable();\n  iqimb_dma_status = 0;\n\n  return;\n}\n\nint bt_iqimb_dma_enable(short *dma_dst_data, uint16_t size) {\n  struct HAL_DMA_CH_CFG_T iqimb_dma_cfg;\n  // BT_DRV_TRACE(0,\"bt_iqimb_dma_enable :\");\n\n  iqimb_dma_status = 1;\n\n  memset(&iqimb_dma_cfg, 0, sizeof(iqimb_dma_cfg));\n\n  // iqimb_dma_cfg.ch = hal_audma_get_chan(HAL_AUDMA_DSD_RX,HAL_DMA_HIGH_PRIO);\n\n  iqimb_dma_cfg.ch = hal_audma_get_chan(HAL_AUDMA_BTDUMP, HAL_DMA_HIGH_PRIO);\n  iqimb_dma_cfg.dst_bsize = HAL_DMA_BSIZE_16;\n  iqimb_dma_cfg.dst_periph = 0; // useless\n  iqimb_dma_cfg.dst_width = HAL_DMA_WIDTH_WORD;\n  iqimb_dma_cfg.handler = (HAL_DMA_IRQ_HANDLER_T)iqimb_dma_dout_handler;\n  iqimb_dma_cfg.src = 0; // useless\n  iqimb_dma_cfg.src_bsize = HAL_DMA_BSIZE_4;\n\n  // iqimb_dma_cfg.src_periph = HAL_AUDMA_DSD_RX;\n  iqimb_dma_cfg.src_periph = HAL_AUDMA_BTDUMP;\n  iqimb_dma_cfg.src_tsize = size; // 1600; //1600*2/26=123us\n  iqimb_dma_cfg.src_width = HAL_DMA_WIDTH_WORD;\n  // iqimb_dma_cfg.src_width = HAL_DMA_WIDTH_HALFWORD;\n  iqimb_dma_cfg.try_burst = 1;\n  iqimb_dma_cfg.type = HAL_DMA_FLOW_P2M_DMA;\n  iqimb_dma_cfg.dst = (uint32_t)(dma_dst_data);\n\n  hal_audma_init_desc(&iqimb_dma_desc[0], &iqimb_dma_cfg, 0, 1);\n\n  hal_audma_sg_start(&iqimb_dma_desc[0], &iqimb_dma_cfg);\n\n  // configed after mismatch parameter done, or apb clock muxed.\n\n  // wait\n  for (volatile int i = 0; i < 5000; i++)\n    ;\n  hal_btdump_enable();\n\n  return 1;\n}\n\nint bt_iqimb_ini() {\n  uint32_t val;\n\n  BT_DRV_TRACE(0, \"bt_iqimb_ini :\");\n  // config gpadc 26m\n  val = READ_REG(0xd0350208, 0x0);\n  val &= 0xffefffff; // bit20\n  val |= (1 << 18);  // reg_gclk_en(BTM_CLK_26RXNFMI)\n  val &= 0xffbfffff; // bit22\n  val |= (1 << 20);  // reg_gclk_en(BTM_CLK_26RXDUMP)\n  val &= 0xfdffffff; // bit25\n  val |= (1 << 25);  // reg_gclk_en(BTM_CLK_26RXADC)\n  WRITE_REG(val, 0xd0350208, 0x0);\n  BT_DRV_TRACE(1, \"0xd0350208 : 0x%08x\", val);\n\n  val = READ_REG(0xd0350228, 0x0);\n  val &= 0xffefffff; // bit20\n  val |= (1 << 18);  // reg_gclk_mode(BTM_CLK_26RXNFMI)\n  val &= 0xffbfffff; // bit22\n  val |= (1 << 20);  // reg_gclk_mode(BTM_CLK_26RXDUMP)\n  val &= 0xfdffffff; // bit25\n  val |= (1 << 25);  // reg_gclk_mode(BTM_CLK_26RXADC)\n  WRITE_REG(val, 0xd0350228, 0x0);\n  BT_DRV_TRACE(1, \"0xd0350228 : 0x%08x\", val);\n\n  // for rx mux to gpadc\n  val = READ_REG(0xd0350218, 0x0);\n  val &= 0xfffffff0; // bit3:0 1110 reg_diagcntl(3 downto 0)\n  val |= (0xe << 0);\n  val &= 0xfffffbff; // bit10 1  reg_diagcntl(10)\n  val |= (0x1 << 10);\n  WRITE_REG(val, 0xd0350218, 0x0);\n\n  BT_DRV_TRACE(1, \"0xd0350218 : 0x%08x\", val);\n\n  val = READ_REG(0xd0330024, 0x0);\n  val &= 0xfffffff7; // bit3:0 1110 reg_diagcntl(3 downto 0)\n  val |= (0x1 << 15);\n  WRITE_REG(val, 0xd0330024, 0x0);\n  BT_DRV_TRACE(1, \"0xd0330024 : 0x%08x\", val);\n\n  val = READ_REG(0xd0330034, 0x0);\n  val &= 0x03ffffff; // bit3:0 1110 reg_diagcntl(3 downto 0)\n  val |= (0x1b << 26);\n  WRITE_REG(val, 0xd0330034, 0x0);\n\n  BT_DRV_TRACE(1, \"0xd0330034 : 0x%08x\", val);\n\n  WRITE_REG(0x002eb948, 0xd0350364, 0x0);\n\n  val = READ_REG(0xd0330038, 0x0);\n\n  val |= (0x1 << 24);\n  WRITE_REG(val, 0xd0330038, 0x0);\n\n  WRITE_REG(0, 0xc000033c, 0x0);\n  return 1;\n}\nvoid check_mem_data(void *data, int len) {\n  short *share_mem = (short *)data;\n  BT_DRV_TRACE(3, \"check_mem_data :share_mem= %p, 0x%x, 0x%x\", share_mem,\n               share_mem[0], share_mem[1]);\n\n  int16_t i = 0;\n  int16_t m = 0;\n  int16_t remain = len;\n  for (m = 0; m < 32; m++) {\n    for (i = 0; i < 32; i++) {\n\n      if (remain > 16) {\n        DUMP16(\"%04x \", share_mem, 16);\n        share_mem += 16;\n        remain -= 16;\n      } else {\n        DUMP16(\"%04x \", share_mem, remain);\n\n        remain = 0;\n        return;\n      }\n    }\n    //  BT_DRV_TRACE(0,\"\\n\");\n    // BT_DRV_TRACE(1,\"addr :0x%08x\\n\",share_mem);\n    hal_sys_timer_delay(MS_TO_TICKS(200));\n  }\n}\n\nint bt_Txdc_cal_set(int ch_num, int dc_add) {\n  uint32_t val;\n  uint32_t tmp = (uint32_t)dc_add;\n  // sel apb clock\n  val = READ_REG(0xd0350348, 0x0);\n  if (ch_num == 0) {\n    val &= 0xfffffc00; // bit31 1 int_en_mismatch\n    val |= tmp & 0x3ff;\n  } else {\n    // BT_DRV_TRACE(1,\"bt_Txdc_cal_set, dcadd : 0x%08x\",tmp);\n    val &= 0xfc00ffff; // bit31 1 int_en_mismatch\n    val |= (tmp & 0x3ff) << 16;\n  }\n  WRITE_REG(val, 0xd0350348, 0x0);\n\n  // BT_DRV_TRACE(1,\"bt_Txdc_cal_set, 0xd0350348 : 0x%08x\",val);\n\n  return 1;\n}\n\n// g/p mismatch base addr 0xd0310000\n// dc_i: 0xd0350348 9:0\n// dc_q: 0xd0350348 25:16\nint bt_iqimb_add_mismatch(int ch_num, int gain_mis, int phase_mis, int dc_i,\n                          int dc_q, uint32_t addr) {\n  uint32_t val;\n  // sel apb clock\n  val = READ_REG(0xd0350348, 0x0);\n  val &= 0x7fffffff; // bit31 1 int_en_mismatch\n  val |= (0x0 << 31);\n  WRITE_REG(val, 0xd0350348, 0x0);\n\n  val = (phase_mis << 16) | (gain_mis & 0x0000ffff);\n  WRITE_REG(val, addr, ch_num * 4);\n  // tval = READ_REG(addr,0x0);\n  // BT_DRV_TRACE(1,\"bt_iqimb_add_mismatch, iq : 0x%08x\",tval);\n\n  WRITE_REG(0x400000, 0xd0350220, 0);\n  WRITE_REG(0x400000, 0xd0350224, 0);\n  // bt_Txdc_cal_set(0,dc_i);\n  // bt_Txdc_cal_set(1,dc_q);\n\n  /*\n      val = READ_REG(0xd0350348,0x0);\n      val &= 0xfffffc00; //bit9:0\n      val |= dc_i;\n      val &= 0xfc00ffff; //bit25:16\n      val |= (dc_q<<16);\n      WRITE_REG(val,0xd0350348,0x0);\n  */\n  // sel 26m clock\n  val = READ_REG(0xd0350348, 0x0);\n  val &= 0x7fffffff; // bit31 1 int_en_mismatch\n  val |= (0x1 << 31);\n  WRITE_REG(val, 0xd0350348, 0x0);\n\n  return 1;\n}\n\nvoid DC_correction(IQMismatchPreprocessState *st, int *dc_i_r, int *dc_q_r,\n                   int fftsize) {\n  uint8_t k;\n  int Energy, Energy1, tmp;\n  int dc_iters = 2;\n  int dc_i;\n  int dc_q;\n  int dc_step = 4;\n  int dc_i_base;\n  int dc_q_base;\n  int P0, PIplus, PIneg, PQplus, PQneg, PIPQ;\n  int CI, CQ, tmp_D;\n  dc_i_base = 0;\n  dc_q_base = 0;\n  for (k = 0; k < dc_iters; k++) {\n    dc_i = dc_i_base;\n    dc_q = dc_q_base;\n    bt_Txdc_cal_set(0, dc_i);\n    bt_Txdc_cal_set(1, dc_q);\n    bt_iqimb_dma_enable(st->M0data, (BUF_SIZE / 2));\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    P0 = Energy1;\n    dc_i = dc_i_base + dc_step;\n    dc_q = dc_q_base;\n    bt_Txdc_cal_set(0, dc_i);\n    bt_Txdc_cal_set(1, dc_q);\n    bt_iqimb_dma_enable(st->M0data, (BUF_SIZE / 2));\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    PIplus = Energy1;\n    dc_i = dc_i_base - dc_step;\n    dc_q = dc_q_base;\n    bt_Txdc_cal_set(0, dc_i);\n    bt_Txdc_cal_set(1, dc_q);\n    bt_iqimb_dma_enable(st->M0data, (BUF_SIZE / 2));\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    PIneg = Energy1;\n    dc_i = dc_i_base;\n    dc_q = dc_q_base + dc_step;\n    bt_Txdc_cal_set(0, dc_i);\n    bt_Txdc_cal_set(1, dc_q);\n    bt_iqimb_dma_enable(st->M0data, (BUF_SIZE / 2));\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    PQplus = Energy1;\n    dc_i = dc_i_base;\n    dc_q = dc_q_base - dc_step;\n    bt_Txdc_cal_set(0, dc_i);\n    bt_Txdc_cal_set(1, dc_q);\n    bt_iqimb_dma_enable(st->M0data, (BUF_SIZE / 2));\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    PQneg = Energy1;\n    dc_i = dc_i_base + dc_step;\n    dc_q = dc_q_base + dc_step;\n    bt_Txdc_cal_set(0, dc_i);\n    bt_Txdc_cal_set(1, dc_q);\n    bt_iqimb_dma_enable(st->M0data, (BUF_SIZE / 2));\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    PIPQ = Energy1;\n    tmp = 2 * PIplus * PIplus + 2 * PQplus * PQplus + 2 * PIPQ * PIPQ;\n    tmp = tmp - 6 * P0 * P0;\n    tmp = tmp + 4 * P0 * (PIneg + PQneg + PIPQ);\n    tmp = tmp + 2 * (PIplus * (PQplus - PQneg) - PIneg * (PQplus + PQneg));\n    tmp_D = tmp - 4 * PIPQ * (PIplus + PQplus);\n    tmp = P0 * (2 * (PIplus - PIneg) + PQplus - PQneg);\n    tmp = tmp - PIPQ * (PQneg - PQplus) + PIneg * (PQplus + PQneg);\n    tmp = tmp + PQplus * (PQneg - PQplus - 2 * PIplus);\n    CI = -dc_step * tmp;\n    tmp = P0 * (2 * (PQplus - PQneg) + PIplus - PIneg);\n    tmp = tmp - PIPQ * (PIneg - PIplus) + PQneg * (PIplus + PIneg);\n    tmp = tmp + PIplus * (PIneg - PIplus - 2 * PQplus);\n    CQ = -dc_step * tmp;\n    dc_i_base = dc_i_base + CI / tmp_D;\n    dc_q_base = dc_q_base + CQ / tmp_D;\n    // dc_step = dc_step/2;\n  }\n  *dc_i_r = dc_i_base;\n  *dc_q_r = dc_q_base;\n}\nint IQ_GAIN_Mismatch_Correction(IQMismatchPreprocessState *st,\n                                int phase_mis_base, int fftsize,\n                                uint32_t addr) {\n  uint8_t k = 0;\n  int phase_mis_tmp = 0;\n  int gain_mis_tmp = 0;\n  int tmp = 0;\n  int energy_ret0_last = 1048576;\n  int energy_ret0 = 0;\n  int energy_ret1 = 0;\n  int energy_ret2 = 0;\n  int Energy, Energy1;\n  int iters = 4;\n  int gainstep = 8;\n  int gain_mis_base = 0;\n\n  phase_mis_tmp = phase_mis_base;\n  energy_ret0_last = 1048576;\n  for (k = 0; k < iters + 2; k++) {\n    gain_mis_tmp = gain_mis_base;\n    bt_iqimb_add_mismatch(0, gain_mis_tmp, phase_mis_tmp, 0, 0, addr);\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    energy_ret0 = Energy1;\n    if (energy_ret0 < 50)\n      break;\n    if (k > 0) {\n      if (energy_ret0_last < energy_ret0) {\n        gain_mis_base = gain_mis_base + tmp;\n        gain_mis_tmp = gain_mis_base;\n        bt_iqimb_add_mismatch(0, gain_mis_tmp, phase_mis_tmp, 0, 0, addr);\n        bt_iqimb_dma_enable(st->M0data, fftsize);\n        while (1) {\n          if (iqimb_dma_status == 0)\n            break;\n        }\n        caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n        energy_ret0 = Energy1;\n      }\n    }\n    // BT_DRV_TRACE(1,\"IQ gain correct energy_ret0 = %d\",energy_ret0);\n    gainstep = 4; ///////////////////\n    gain_mis_tmp = gain_mis_base + gainstep;\n    bt_iqimb_add_mismatch(0, gain_mis_tmp, phase_mis_tmp, 0, 0, addr);\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    energy_ret2 = Energy1;\n    gain_mis_tmp = gain_mis_base - gainstep;\n    bt_iqimb_add_mismatch(0, gain_mis_tmp, phase_mis_tmp, 0, 0, addr);\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    energy_ret1 = Energy1;\n    tmp = energy_ret2 - 2 * energy_ret0 + energy_ret1;\n    // BT_DRV_TRACE(1,\"IQ gain correct energy_ret2 -2*energy_ret0 + energy_ret1\n    // = %d\",tmp);\n    if (tmp > 0) {\n      tmp = (energy_ret2 - energy_ret1) * gainstep / tmp / 2;\n      tmp = min(tmp, 4 * gainstep);\n      gainstep = gainstep / 2;\n    } else {\n      tmp = 0;\n      iters = iters + 1;\n    }\n    if (iters > 8)\n      break;\n    if ((gain_mis_base - tmp > 60) || (gain_mis_base - tmp < -60))\n      tmp = 0;\n    // BT_DRV_TRACE(2,\"IQ gain correct gain_mis = %d ,gain_adj =\n    // %d\",gain_mis_base,tmp);\n    gain_mis_base = gain_mis_base - tmp;\n    energy_ret0_last = energy_ret0;\n  }\n  return gain_mis_base;\n}\nint IQ_Phase_Mismatch_Correction(IQMismatchPreprocessState *st,\n                                 int gain_mis_base, int fftsize,\n                                 uint32_t addr) {\n  uint8_t k = 0;\n  int phase_mis_tmp = 0;\n  int gain_mis_tmp = 0;\n  int tmp = 0;\n  int energy_ret0_last = 1048576;\n  int energy_ret0 = 0;\n  int energy_ret1 = 0;\n  int energy_ret2 = 0;\n  int Energy, Energy1;\n  int iters = 4;\n  int phasestep = 4;\n  int phase_mis_base = 0;\n  tmp = 0;\n  energy_ret0_last = 1048576;\n  gain_mis_tmp = gain_mis_base;\n  for (k = 0; k < iters; k++) {\n    phase_mis_tmp = phase_mis_base;\n    bt_iqimb_add_mismatch(0, gain_mis_tmp, phase_mis_tmp, 0, 0,\n                          addr); // no mismatch\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    energy_ret0 = Energy1;\n    if (k > 0) {\n      if (energy_ret0_last < energy_ret0) {\n        phase_mis_base = phase_mis_base + tmp;\n        phase_mis_tmp = phase_mis_base;\n        bt_iqimb_add_mismatch(0, gain_mis_tmp, phase_mis_tmp, 0, 0,\n                              addr); // no mismatch\n        bt_iqimb_dma_enable(st->M0data, fftsize);\n        while (1) {\n          if (iqimb_dma_status == 0)\n            break;\n        }\n        caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n        energy_ret0 = Energy1;\n      }\n    }\n    if (energy_ret0 < 50)\n      break;\n    // BT_DRV_TRACE(1,\"IQ phase correct energy_ret0 = %d\",energy_ret0);\n    phasestep = 4; //////////////////////////\n    phase_mis_tmp = phase_mis_base + phasestep;\n    bt_iqimb_add_mismatch(0, gain_mis_tmp, phase_mis_tmp, 0, 0,\n                          addr); // no mismatch\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    energy_ret2 = Energy1;\n    // BT_DRV_TRACE(1,\"IQ phase correct energy_ret2 = %d\",energy_ret2);\n    phase_mis_tmp = phase_mis_base - phasestep;\n    bt_iqimb_add_mismatch(0, gain_mis_tmp, phase_mis_tmp, 0, 0,\n                          addr); // no mismatch\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    energy_ret1 = Energy1;\n    // BT_DRV_TRACE(1,\"IQ phase correct energy_ret1 = %d\",energy_ret1);\n    tmp = energy_ret2 - 2 * energy_ret0 + energy_ret1;\n    // BT_DRV_TRACE(1,\"IQ phase correct energy_ret2 -2*energy_ret0 + energy_ret1\n    // = %d\",tmp);\n    if (tmp > 0) {\n      tmp = (energy_ret2 - energy_ret1) * phasestep / tmp / 2;\n      tmp = min(tmp, 4 * phasestep);\n      phasestep = phasestep / 2;\n    } else {\n      tmp = 0;\n      iters = iters + 1;\n    }\n    if (iters > 8)\n      break;\n    if ((phase_mis_base - tmp > 60) || (phase_mis_base - tmp < -60))\n      tmp = 0;\n    // BT_DRV_TRACE(2,\"IQ phase correct phase_mis = %d ,phase_adj =\n    // %d\",phase_mis_base,tmp);\n    phase_mis_base = phase_mis_base - tmp;\n    energy_ret0_last = energy_ret0;\n  }\n  return phase_mis_base;\n}\n\nstatic BT_IQ_CALIBRATION_CONFIG_T config;\n\nstatic void bt_update_local_iq_calibration_val(uint32_t freq_range,\n                                               uint16_t gain_cal_val,\n                                               uint16_t phase_cal_val) {\n  config.validityMagicNum = BT_IQ_VALID_MAGIC_NUM;\n  config.gain_cal_val[freq_range] = gain_cal_val;\n  config.phase_cal_val[freq_range] = phase_cal_val;\n}\n\n// do QA calibration and get the calibration value\nstatic POSSIBLY_UNUSED void btIqCalibration(void) {\n  btdrv_tx_iq_cal();\n  BT_DRV_TRACE(0, \"Acquired calibration value:\");\n  for (uint32_t range = 0; range < BT_FREQENCY_RANGE_NUM; range++) {\n    BT_DRV_TRACE(3, \"%d: 0x%x - 0x%x\", range, config.gain_cal_val[range],\n                 config.phase_cal_val[range]);\n  }\n}\n\n// get IQ calibration from NV\nstatic bool\nbt_get_iq_calibration_val_from_nv(BT_IQ_CALIBRATION_CONFIG_T *pConfig) {\n  if (nv_record_get_extension_entry_ptr() &&\n      (BT_IQ_VALID_MAGIC_NUM ==\n       nv_record_get_extension_entry_ptr()->btIqCalConfig.validityMagicNum)) {\n    *pConfig = nv_record_get_extension_entry_ptr()->btIqCalConfig;\n    return true;\n  } else {\n    return false;\n  }\n}\n\nvoid bt_iq_calibration_setup(void) {\n  if (bt_get_iq_calibration_val_from_nv(&config)) {\n    BT_DRV_TRACE(0, \"Calibration value in NV:\");\n\n    for (uint32_t range = 0; range < BT_FREQENCY_RANGE_NUM; range++) {\n      BT_DRV_TRACE(3, \"%d: 0x%x - 0x%x\", range, config.gain_cal_val[range],\n                   config.phase_cal_val[range]);\n    }\n    uint32_t addr = 0xd0310000;\n    int chs = 27;\n\n    for (uint32_t range = 0; range < 3; range++) {\n      if (0 == range) {\n        addr = 0xd0310034;\n        chs = 27;\n        addr = addr - 13 * 4;\n      }\n\n      for (uint32_t ch = 0; ch < chs; ch++) {\n        bt_iqimb_add_mismatch(0, config.gain_cal_val[range],\n                              config.phase_cal_val[range], 0, 0, addr);\n        addr = addr + 4;\n      }\n    }\n  } else {\n    btIqCalibration();\n    uint32_t lock = nv_record_pre_write_operation();\n    nv_record_get_extension_entry_ptr()->btIqCalConfig = config;\n    nv_record_post_write_operation(lock);\n\n    nv_record_extension_update();\n  }\n}\n\nvoid bt_IQ_DC_Mismatch_Correction_Release() {\n  int phase_mis_base;\n  int gain_mis_base;\n  int Energy, Energy1;\n  uint32_t time_start = hal_sys_timer_get();\n  int fftsize;\n  uint32_t addr = 0xd0310000;\n  int chs = 27;\n  IQMismatchPreprocessState *st;\n  syspool_init();\n  syspool_get_buff(&g_medMemPool, MED_MEM_POOL_SIZE);\n  med_heap_init(&g_medMemPool[0], MED_MEM_POOL_SIZE);\n  // config gpadc 26m\n  READ_REG(0xd0310000, 0x0);\n#ifdef DCCalib\n  int dc_i_base, dc_q_base;\n  fftsize = 1024;\n  st = IQMismatchPreprocessState_init(fftsize);\n  Tblgen(st->Table0, st->Table1, st->Table2, fftsize);\n  DC_correction(st, &dc_i_base, &dc_q_base, fftsize);\n  bt_Txdc_cal_set(0, dc_i_base); // set cal DC I\n  bt_Txdc_cal_set(1, dc_q_base);\n  // val = READ_REG(0xd0350348,0x0);\n  // BT_DRV_TRACE(1,\"0xd0350348 = 0x%08x\",val);\n  bt_iqimb_dma_enable(st->M0data, fftsize);\n  while (1) {\n    if (iqimb_dma_status == 0)\n      break;\n  }\n  caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n  // BT_DRV_TRACE(3,\"dc cal done!!!    dc_i = %d ,dc_q = %d,Energy1 =\n  // %d\",dc_i_base,dc_q_base,Energy1);\n  if (Energy1 > 200) {\n    DC_correction(st, &dc_i_base, &dc_q_base, fftsize);\n    bt_Txdc_cal_set(0, dc_i_base); // set cal DC I\n    bt_Txdc_cal_set(1, dc_q_base);\n    // val = READ_REG(0xd0350348,0x0);\n    // BT_DRV_TRACE(1,\"0xd0350348 = 0x%08x\",val);\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n  }\n  if (Energy1 > 200) {\n    DC_correction(st, &dc_i_base, &dc_q_base, fftsize);\n    bt_Txdc_cal_set(0, dc_i_base); // set cal DC I\n    bt_Txdc_cal_set(1, dc_q_base);\n    // val = READ_REG(0xd0350348,0x0);\n    // BT_DRV_TRACE(1,\"0xd0350348 = 0x%08x\",val);\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n  }\n#endif\n  // BT_DRV_TRACE(1,\"use time: %d ticks\", (hal_sys_timer_get()-time_start));\n  // BT_DRV_TRACE(3,\"dc cal done!!!    dc_i = %d ,dc_q = %d,Energy1 =\n  // %d\",dc_i_base,dc_q_base,Energy1);\n  fftsize = 1024;\n  st = IQMismatchPreprocessState_init(fftsize);\n  Tblgen_iq(st->Table0, st->Table1, st->Table2, fftsize);\n  BT_DRV_TRACE(1, \"use time: %d ms\",\n               __TICKS_TO_MS(hal_sys_timer_get() - time_start));\n  for (int k = 0; k < 3; k++) {\n    if (k == 0) {\n      WRITE_REG(0x0, 0xD02201E4, 0x0);\n      WRITE_REG(0x000A000D, 0xD02201E4, 0x0);\n      // osDelay(1000);\n      addr = 0xd0310034;\n    } else if (k == 1) {\n      WRITE_REG(0x0, 0xD02201E4, 0x0);\n      WRITE_REG(0x000A0027, 0xD02201E4, 0x0);\n      addr = 0xd031009c;\n    } else {\n      WRITE_REG(0x0, 0xD02201E4, 0x0);\n      WRITE_REG(0x000A0041, 0xD02201E4, 0x0);\n      addr = 0xd0310104;\n    }\n    gain_mis_base = IQ_GAIN_Mismatch_Correction(st, 0, fftsize, addr);\n    phase_mis_base =\n        IQ_Phase_Mismatch_Correction(st, gain_mis_base, fftsize, addr);\n    bt_iqimb_add_mismatch(0, gain_mis_base, phase_mis_base, 0, 0,\n                          addr); // no mismatch\n    bt_iqimb_dma_enable(st->M0data, fftsize);\n    while (1) {\n      if (iqimb_dma_status == 0)\n        break;\n    }\n    caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n    //  BT_DRV_TRACE(4,\"IQ phase correct addr = 0x%08x,phase_mis = %d ,gain_mis\n    //  = %d,Energy = %d\",addr,phase_mis_base,gain_mis_base,Energy1);\n    if (Energy1 > 500) {\n      if (ABS(gain_mis_base) > ABS(phase_mis_base)) {\n        gain_mis_base = IQ_GAIN_Mismatch_Correction(st, 0, fftsize, addr);\n        phase_mis_base =\n            IQ_Phase_Mismatch_Correction(st, gain_mis_base, fftsize, addr);\n      } else {\n        phase_mis_base = IQ_Phase_Mismatch_Correction(st, 0, fftsize, addr);\n        gain_mis_base =\n            IQ_GAIN_Mismatch_Correction(st, phase_mis_base, fftsize, addr);\n      }\n\n      bt_iqimb_add_mismatch(0, gain_mis_base, phase_mis_base, 0, 0,\n                            addr); // no mismatch\n      // BT_DRV_TRACE(1,\"use time: %d ticks\", (hal_sys_timer_get()-time_start));\n      bt_iqimb_dma_enable(st->M0data, fftsize);\n      while (1) {\n        if (iqimb_dma_status == 0)\n          break;\n      }\n      caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n      //  BT_DRV_TRACE(4,\"IQ phase correct addr = 0x%08x,phase_mis = %d\n      //  ,gain_mis = %d,Energy =\n      //  %d\",addr,phase_mis_base,gain_mis_base,Energy1);\n    }\n\n    if (Energy1 > 500) {\n      if (ABS(gain_mis_base) > ABS(phase_mis_base)) {\n        gain_mis_base = IQ_GAIN_Mismatch_Correction(st, 0, fftsize, addr);\n        phase_mis_base =\n            IQ_Phase_Mismatch_Correction(st, gain_mis_base, fftsize, addr);\n      } else {\n        phase_mis_base = IQ_Phase_Mismatch_Correction(st, 0, fftsize, addr);\n        gain_mis_base =\n            IQ_GAIN_Mismatch_Correction(st, phase_mis_base, fftsize, addr);\n      }\n      // BT_DRV_TRACE(1,\"use time: %d ticks\", (hal_sys_timer_get()-time_start));\n      bt_iqimb_dma_enable(st->M0data, fftsize);\n      while (1) {\n        if (iqimb_dma_status == 0)\n          break;\n      }\n      caculate_energy_main_test(st, &Energy, &Energy1, fftsize);\n      // BT_DRV_TRACE(4,\"IQ phase correct addr = 0x%08x,phase_mis = %d ,gain_mis\n      // = %d,Energy = %d\",addr,phase_mis_base,gain_mis_base,Energy1);\n    }\n    if (k == 0) {\n      chs = 27;\n      addr = addr - 13 * 4;\n    } else if (k == 1) {\n      chs = 26;\n      addr = addr - 12 * 4;\n    } else {\n      chs = 26;\n      addr = addr - 12 * 4;\n    }\n\n    bt_update_local_iq_calibration_val(k, gain_mis_base, phase_mis_base);\n\n    for (int ch = 0; ch < chs; ch++) {\n      bt_iqimb_add_mismatch(0, gain_mis_base, phase_mis_base, 0, 0,\n                            addr); // no mismatch\n      // osDelay(1);\n      // BT_DRV_TRACE(4,\"IQ phase correct addr = 0x%08x,phase_mis = %d ,gain_mis\n      // = %d,Energy = %d\",addr,phase_mis_base,gain_mis_base,Energy1);\n      addr = addr + 4;\n    }\n    BT_DRV_TRACE(1, \"use time: %d ms\",\n                 __TICKS_TO_MS(hal_sys_timer_get() - time_start));\n    // BT_DRV_TRACE(4,\"IQ phase correct addr = 0x%08x,phase_mis = %d ,gain_mis =\n    // %d,Energy = %d\",addr-4,phase_mis_base,gain_mis_base,Energy1);\n  }\n}\n\nint bt_iqimb_test_ex(int mismatch_type) {\n\n  bt_IQ_DC_Mismatch_Correction_Release();\n\n  return 1;\n}\n\n#endif // TX_IQ_CAL\n#endif\n"
  },
  {
    "path": "platform/drivers/bt/best2300p/iqcorrect.h",
    "content": "#ifndef __IQ_CORRECT_H__\n#define __IQ_CORRECT_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\n// configure the bt iq calibration on system boot-up\nvoid bt_iq_calibration_setup(void);\n\nvoid btdrv_tx_iq_cal(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // __IQ_CORRECT_H__\n\n"
  },
  {
    "path": "platform/drivers/bt/bt_drv.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_DRV_H__\n#define __BT_DRV_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"cmsis.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n#include \"hal_timer.h\"\n\n#include \"hal_analogif.h\"\n#include \"hal_trace.h\"\n\n#define BT_DRV_REG_OP_ENTER()                                                  \\\n  do {                                                                         \\\n    uint32_t stime, spent_time;                                                \\\n    stime = hal_sys_timer_get();\n#define BT_DRV_REG_OP_EXIT()                                                   \\\n  spent_time = TICKS_TO_US(hal_sys_timer_get() - stime);                       \\\n  if (spent_time > 300)                                                        \\\n    TRACE(2, \"%s exit, %dus\", __func__, spent_time);                           \\\n  }                                                                            \\\n  while (0)                                                                    \\\n    ;\n\n#define SBC_PKT_TYPE_DM1 0x3\n#define SBC_PKT_TYPE_2EV3 0x6\n#define SBC_PKT_TYPE_2DH5 0xe\n\n#define BT_ACL_CONHDL_BIT (0x80)\n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || defined(CHIP_BEST2001)\n#define BTDRV_ISPI_RF_REG(reg) (((reg)&0xFFF) | 0x2000)\n#else\n#define BTDRV_ISPI_RF_REG(reg) (reg)\n#endif\n\n#define btdrv_read_rf_reg(reg, val)                                            \\\n  hal_analogif_reg_read(BTDRV_ISPI_RF_REG(reg), val)\n#define btdrv_write_rf_reg(reg, val)                                           \\\n  hal_analogif_reg_write(BTDRV_ISPI_RF_REG(reg), val)\n\n#define btdrv_delay(ms) hal_sys_timer_delay(MS_TO_TICKS(ms))\n\n#define BTDIGITAL_REG(a) (*(volatile uint32_t *)(uintptr_t)(a))\n#define BTDIGITAL_REG_WR(addr, value)                                          \\\n  (*(volatile uint32_t *)(uintptr_t)(addr)) = (value)\n\n#define BTDIGITAL_BT_EM(a) (*(volatile uint16_t *)(uintptr_t)(a))\n/// Macro to write a BT control structure field (16-bit wide)\n#define BTDIGITAL_EM_BT_WR(addr, value)                                        \\\n  (*(volatile uint16_t *)(uintptr_t)(addr)) = (value)\n\n#define BTDIGITAL_REG_SET_FIELD(reg, mask, shift, v)                           \\\n  do {                                                                         \\\n    volatile unsigned int tmp = *(volatile unsigned int *)(reg);               \\\n    tmp &= ~(mask << shift);                                                   \\\n    tmp |= (v << shift);                                                       \\\n    *(volatile unsigned int *)(reg) = tmp;                                     \\\n  } while (0)\n\n#define BTDIGITAL_REG_GET_FIELD(reg, mask, shift, v)                           \\\n  do {                                                                         \\\n    volatile unsigned int tmp = *(volatile unsigned int *)(reg);               \\\n    v = (tmp >> shift) & mask;                                                 \\\n  } while (0)\n\n#define BT_DRV_DEBUG 0\n#if BT_DRV_DEBUG\n#define BT_DRV_TRACE(n, fmt, ...) TRACE(n, fmt, ##__VA_ARGS__)\n#define BT_DRV_DUMP(s, buff, len) DUMP8(s, buff, len)\n#else\n#define BT_DRV_TRACE(n, fmt, ...) hal_trace_dummy(fmt, ##__VA_ARGS__)\n#define BT_DRV_DUMP(s, buff, len) hal_dump_dummy(s, buff, len)\n#endif\n\n#define HCI_HOST_NB_CMP_PKTS_CMD_OPCODE 0x0C35\n#define HCI_NB_CMP_PKTS_EVT_CODE 0x13\n\n#if defined(CHIP_BEST2300)\n#define BT_EM_ADDR_BASE (0xD021114A)\n#define BT_EM_SIZE (110)\n#define BLE_EM_CS_SIZE (90)\n#define EM_BT_PWRCNTL_ADDR (BT_EM_ADDR_BASE + 0x16)\n#define EM_BT_BT_EXT1_ADDR (BT_EM_ADDR_BASE + 0x66)\n#define EM_BT_BITOFF_ADDR (BT_EM_ADDR_BASE + 0x02)\n#define EM_BT_CLKOFF0_ADDR (BT_EM_ADDR_BASE + 0x04)\n#define EM_BT_CLKOFF1_ADDR (BT_EM_ADDR_BASE + 0x06)\n#define EM_BT_WINCNTL_ADDR (BT_EM_ADDR_BASE + 0x1A)\n#define EM_BT_RXBIT_ADDR (BT_EM_ADDR_BASE + 0x56)\n#define EM_BT_BTADDR1_ADDR (BT_EM_ADDR_BASE + 0xC)\n#define EM_BT_LINKCNTL_ADDR (BT_EM_ADDR_BASE + 0x8)\n#define EM_BT_RXDESCCNT_ADDR (BT_EM_ADDR_BASE + 0x5A)\n\n#define EM_BT_AUDIOBUF_OFF 0xd021449c\n#define EM_BT_RXACLBUFPTR_ADDR 0xd02115a0\n#define REG_EM_BT_RXDESC_SIZE 14\n\n#define LBRT_TX_PWR_FIX (3)\n#define BT_CONTROLLER_CRASH_DUMP_ADDR_BASE (0xc0000050)\n#define DEFAULT_XTAL_FCAP 0x8080\n\n#define BT_ERRORTYPESTAT_ADDR (0xd0220060)\n#define MAX_NB_ACTIVE_ACL (3)\n\n#elif defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A) ||                    \\\n    defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || defined(CHIP_BEST2001)\n#define BT_EM_ADDR_BASE (0xD02111A2)\n#define BT_EM_SIZE (110)\n#define BLE_EM_CS_SIZE (90)\n#define EM_BT_PWRCNTL_ADDR (BT_EM_ADDR_BASE + 0x16)\n#define EM_BT_BT_EXT1_ADDR (BT_EM_ADDR_BASE + 0x66)\n#define EM_BT_BT_EXT2_ADDR (BT_EM_ADDR_BASE + 0x68)\n#define EM_BT_BITOFF_ADDR (BT_EM_ADDR_BASE + 0x02)\n#define EM_BT_CLKOFF0_ADDR (BT_EM_ADDR_BASE + 0x04)\n#define EM_BT_CLKOFF1_ADDR (BT_EM_ADDR_BASE + 0x06)\n#define EM_BT_WINCNTL_ADDR (BT_EM_ADDR_BASE + 0x1A)\n#define EM_BT_RXBIT_ADDR (BT_EM_ADDR_BASE + 0x56)\n#define EM_BT_BTADDR1_ADDR (BT_EM_ADDR_BASE + 0xC)\n#define EM_BT_LINKCNTL_ADDR (BT_EM_ADDR_BASE + 0x8)\n#define BLE_CRCINIT1_ADDR (0xd02100c2)\n#define EM_BT_RXDESCCNT_ADDR (BT_EM_ADDR_BASE + 0x5A)\n\n#define BLE_MAXEVTIME_ADDR (0xd02100d0)\n\n#define EM_BT_AUDIOBUF_OFF 0xd02144fc\n#define EM_BT_RXACLBUFPTR_ADDR 0xd02115f8\n#define REG_EM_BT_RXDESC_SIZE 16\n\n#define LBRT_TX_PWR_FIX (3)\n#define BT_CONTROLLER_CRASH_DUMP_ADDR_BASE (0xc0000050)\n#define BT_ERRORTYPESTAT_ADDR (0xd0220060)\n#define MAX_NB_ACTIVE_ACL (3)\n\n#ifdef CHIP_BEST2300A\n#define DEFAULT_XTAL_FCAP 0x80ad // 8pf crstal No cap by luobin\n#else\n#define DEFAULT_XTAL_FCAP 0x8080\n#endif\n\n#else\n#define BT_EM_ADDR_BASE (0xd0210190)\n#define BT_EM_SIZE (96)\n#define BT_CONTROLLER_CRASH_DUMP_ADDR_BASE (0xc00064cc)\n#endif\n\n// bt max slot clock\n#define MAX_SLOT_CLOCK ((1L << 27) - 1)\n// A slot is 625 us\n#define SLOT_SIZE 625\n#define XTAL_OFFSET 50\n\n// #define __PASS_CI_TEST_SETTING__\n#define BT_LOW_POWER_MODE 1\n#define BT_HIGH_PERFORMANCE_MODE 2\n// #define __ENABLE_LINK_POWER_CONTROL__\n\n#define BT_RFMODE BT_LOW_POWER_MODE\n// #define BT_RFMODE BT_HIGH_PERFORMANCE_MODE\n// #define BT_50_FUNCTION\n\n#define BT_POWERON 1\n#define BT_POWEROFF 0\n\n/// 8 bit access types\n#define _8_Bit 8\n/// 16 bit access types\n#define _16_Bit 16\n/// 32 bit access types\n#define _32_Bit 32\n\n#define BTDRV_PATCH_WRITING 0x0\n#define BTDRV_PATCH_DONE 0x1\n\n#define BTDRV_CFG_WRITING 0x0\n#define BTDRV_CFG_DONE 0x1\n\n#define HCI_DBG_RD_MEM_CMD_OPCODE 0xFC01\n#define HCI_DBG_WR_MEM_CMD_OPCODE 0xFC02\n#define HCI_DBG_DEL_PAR_CMD_OPCODE 0xFC03\n#define HCI_DBG_FLASH_ID_CMD_OPCODE 0xFC05\n#define HCI_DBG_FLASH_ER_CMD_OPCODE 0xFC06\n#define HCI_DBG_FLASH_WR_CMD_OPCODE 0xFC07\n#define HCI_DBG_FLASH_RD_CMD_OPCODE 0xFC08\n#define HCI_DBG_RD_PAR_CMD_OPCODE 0xFC09\n#define HCI_DBG_WR_PAR_CMD_OPCODE 0xFC0A\n#define HCI_DBG_WLAN_COEX_CMD_OPCODE 0xFC0B\n#define HCI_DBG_ENTER_TEST_MODE_CMD_OPCODE 0xFC0C\n#define HCI_DBG_WLAN_COEXTST_SCEN_CMD_OPCODE 0xFC0D\n#define HCI_DBG_SEND_LMP_CMD_OPCODE 0xFC0E\n#define HCI_DBG_WR_SYNC_DATA_CFG_CMD_OPCODE 0xFC0F\n#define HCI_DBG_RD_KE_STATS_CMD_OPCODE 0xFC10\n#define HCI_DBG_PLF_RESET_CMD_OPCODE 0xFC11\n#define HCI_DBG_RD_MEM_INFO_CMD_OPCODE 0xFC12\n#define HCI_DBG_EMUL_TESTER_CMD_OPCODE 0xFC2D\n#define HCI_DBG_SCATT_IMPROV_CMD_OPCODE 0xFC2E\n#define HCI_DBG_RF_REG_RD_CMD_OPCODE 0xFC39\n#define HCI_DBG_RF_REG_WR_CMD_OPCODE 0xFC3A\n#define HCI_DBG_HW_REG_RD_CMD_OPCODE 0xFC30\n#define HCI_DBG_HW_REG_WR_CMD_OPCODE 0xFC31\n#define HCI_DBG_SET_BD_ADDR_CMD_OPCODE 0xFC32\n#define HCI_DBG_SET_TYPE_PUB_CMD_OPCODE 0xFC33\n#define HCI_DBG_SET_TYPE_RAND_CMD_OPCODE 0xFC34\n#define HCI_DBG_SET_CRC_CMD_OPCODE 0xFC35\n#define HCI_DBG_LLCP_DISCARD_CMD_OPCODE 0xFC36\n#define HCI_DBG_RESET_RX_CNT_CMD_OPCODE 0xFC37\n#define HCI_DBG_RESET_TX_CNT_CMD_OPCODE 0xFC38\n#define HCI_DBG_SET_TX_PW_CMD_OPCODE 0xFC3B\n#define HCI_DBG_SET_SYNCWORD_CMD_OPCODE 0xFC3C\n\n// encrytion min and max key size\n#define HCI_DBG_SET_ENCRYPTION_KEY_SIZE_CMD_OPCODE 0xFC41\n// preferred key type default :combine key\n#define HCI_DBG_SET_PREFERRED_KEY_TYPE_CMD_OPCODE 0xFC42\n// creat unit key\n#define HCI_DBG_CREAT_UNIT_KEY_CMD_OPCODE 0xFC43\n// set clk drift and jitter\n#define HCI_DBG_SET_LPCLK_DRIFT_JITTER_CMD_OPCODE 0xFC44\n\n// change uart buadrate\n#define HCI_DBG_CHANGE_UART_BAUDRATE_CMD_OPCODE 0xFC46\n\n// set sleep enable and external wakeup enable\n#define HCI_DBG_SET_SLEEP_EXWAKEUP_EN_CMD_OPCODE 0xFC47\n\n// set private key\n#define HCI_DBG_SET_SP_PRIVATE_KEY_CMD_OPCODE 0xFC48\n\n// set public key\n#define HCI_DBG_SET_SP_PUBLIC_KEY_CMD_OPCODE 0xFC49\n\n// set errdata adopted\n#define HCI_DBG_SET_ERRDATA_ADOPTED_CMD_OPCODE 0xFC4A\n\n// set basic threshold\n#define HCI_DBG_SET_BASIC_THRESHOLD_CMD_OPCODE 0xFC4B\n\n// set edr threshold\n#define HCI_DBG_SET_EDR_THRESHOLD_CMD_OPCODE 0xFC4C\n\n// set basic algorithm\n#define HCI_DBG_SET_BASIC_ALGORITHM_CMD_OPCODE 0xFC4D\n\n// set edr alorithm\n#define HCI_DBG_SET_EDR_ALGORITHM_CMD_OPCODE 0xFC4E\n\n// set basic packet lut\n#define HCI_DBG_SET_BASIC_PKT_LUT_CMD_OPCODE 0xFC4F\n\n// set edr packet lut\n#define HCI_DBG_SET_EDR_PKT_LUT_CMD_OPCODE 0xFC50\n\n// set diag_bt_hw\n#define HCI_DBG_SET_DIAG_BT_HW_CMD_OPCODE 0xFC54\n// set diag ble hw\n#define HCI_DBG_SET_DIAG_BLE_HW_CMD_OPCODE 0xFC55\n// set diag sw\n#define HCI_DBG_SET_DIAG_SW_CMD_OPCODE 0xFC56\n\n// set ble channel assessment parameter\n#define HCI_DBG_SET_BLE_CA_PARA_CMD_OPCODE 0xFC57\n\n// set  ble rf timing\n\n// set ble rf timig\n\n// set ble rl size\n#define HCI_DBG_SET_RL_SIZE_CMD_OPCODE 0xFC5D\n\n/// set hostwake\n#define HCI_DBG_SET_HOSTWAKE_CMD_OPCODE 0xFC5E\n// reserved for VCO test\n#define HCI_DBG_BT_VCO_TEST_CMD_OPCODE 0xFCAA\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                       \\\n    defined(CHIP_BEST2300A) || defined(CHIP_BEST2001) ||                       \\\n    defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n\n/// set dle dft value\n#define HCI_DBG_WR_DLE_DFT_VALUE_CMD_OPCODE 0xFC41\n\n// set exernal wake up time oscillater wakeup time and radio wakeup time\n#define HCI_DBG_SET_WAKEUP_TIME_CMD_OPCODE 0xFC71\n\n#define HCI_DBG_SET_SLEEP_SETTING_CMD_OPCODE 0xFC77\n\n// bt address not ble address\n#define HCI_DBG_SET_BT_ADDR_CMD_OPCODE 0xFC72\n// set pcm setting\n#define HCI_DBG_SET_PCM_SETTING_CMD_OPCODE 0xFC74\n\n#define HCI_DBG_SET_RSSI_THRHLD_CMD_OPCODE 0xFC76\n\n// set sync buff size\n#define HCI_DBG_SET_SYNC_BUF_SIZE_CMD_OPCODE 0xFC7F\n// set afh algorithm\n#define HCI_DBG_SET_AFH_ALGORITHM_CMD_OPCODE 0xFC80\n// set local feature\n#define HCI_DBG_SET_LOCAL_FEATURE_CMD_OPCODE 0xFC81\n\n#define HCI_DBG_SET_BT_RF_TIMING_CMD_OPCODE 0xFC83\n\n// set local extend feature\n#define HCI_DBG_SET_LOCAL_EX_FEATURE_CMD_OPCODE 0xFC82\n\n#define HCI_DBG_SET_2300_BT_RF_TIMING_CMD_OPCODE 0xFC83\n\n#define HCI_DBG_SET_BLE_RF_TIMING_CMD_OPCODE 0xfc84\n\n// bt setting interface\n#define HCI_DBG_SET_BT_SETTING_CMD_OPCODE 0xFC86\n// xiao add for nonsignaling test mode\n#define HCI_DBG_NONSIG_TESTER_SETUP_CMD_OPCODE 0xFC87\n/* xiao add for custom set param*/\n#define HCI_DBG_SET_CUSTOM_PARAM_CMD_OPCODE 0xFC88\n\n#define HCI_DBG_SET_SCO_SWITCH_CMD_OPCODE 0xFC89\n\n#define HCI_DBG_SET_SNIFFER_ENV_CMD_OPCODE 0xFC8E\n// set sco path\n#define HCI_DBG_SET_SYNC_CONFIG_CMD_OPCODE 0xFC8F\n\n#define HCI_DBG_START_TWS_EXCHANGE_CMD_OPCODE 0xFC91\n\n#define HCI_DBG_BTADDR_EXCHANGE_CMD_OPCODE 0xFC92\n\n#define HCI_DBG_SEND_DATA_TO_PEER_DEV_CMD_OPCODE 0xFC93\n\n#define HCI_DBG_SCO_TX_SILENCE_CMD_OPCODE 0xFC94\n\n#define HCI_DBG_SNIFFER_CMD_OPCODE 0xFC95\n\n#define HCI_DBG_CSB_UPDATE_LINK_PARAM_CMD_OPCODE 0xFC96\n\n#define HCI_DBG_SET_LINK_LBRT_CMD_OPCODE 0xFC97\n\n#define HCI_DBG_SET_CON_SLV_BCST_DATA_CMD_OPCODE 0xFC98\n#define HCI_DBG_SET_ROLE_SWITCH_INSTANT_CMD_OPCODE 0xFC99\n#define HCI_DBG_LOW_LAYER_METRICS_CMD_OPCODE 0xFC9B\n#define HCI_DBG_LMP_MESSAGE_RECORD_CMD_OPCODE 0xFC9C\n\n#define HCI_DBG_SET_LOCAL_FEATURE_50_CMD_OPCODE 0xFC72\n#define HCI_DBG_SET_SLEEP_SETTING_50_CMD_OPCODE 0xFC70\n#define HCI_DBG_SET_BT_SETTING_50_CMD_OPCODE 0xFC71\n\n#define HCI_DBG_SET_CUSTOM_PARAM_50_CMD_OPCODE 0xFC73\n#define HCI_DBG_SET_BT_SETTING_EXT1_CMD_OPCODE 0xFCAE\n#define HCI_DBG_SET_BT_TWS_LINK_CMD_OPCODE 0xFCAF\n#define HCI_DBG_SET_AFH_FOLLOW_CMD_OPCODE 0xFCB0\n#define HCI_DBG_SET_RF_RX_GAIN_THS_TBL_CMD_OPCODE 0xFCB1\n#define HCI_DBG_SET_RF_RX_GAIN_FIXED_CMD_OPCODE 0xFCB2\n\n#define HCI_DBG_SET_BT_SETTING_EXT2_CMD_OPCODE 0xFCB3\n#define HCI_DBG_SET_IBRT_TEST_MODE_CMD_OPCODE 0xFCB4\n#define HCI_DBG_SET_BT_LOCAL_CLK_CMD_OPCODE 0xFCB5\n#define HCI_DBG_SET_FUNC_PATCH_CMD_OPCODE 0xFCB8\n#define HCI_DBG_SET_TXPWR_MODE_CMD_OPCODE 0xFCB9\n#define HCI_DBG_SET_SW_RSSI_CMD_OPCODE 0xFCBA\n#define HCI_DBG_SET_ECC_DATA_TEST_CMD_OPCODE 0xFCBB\n#define HCI_DBG_SET_IBRT_DATA_TEST_CMD_OPCODE 0xFCBC\n#define HCI_DBG_SET_NWINSZ_RXGRN_TO_CMD_OPCODE 0xFCBD\n#define HCI_DBG_ENABLE_SOFTBIT_CMD_OPCODE 0xFCBE\n\n#else\n// bt address not ble address\n#define HCI_DBG_SET_BT_ADDR_CMD_OPCODE 0xFC40\n// set exernal wake up time oscillater wakeup time and radio wakeup time\n#define HCI_DBG_SET_WAKEUP_TIME_CMD_OPCODE 0xFC45\n// set sco path\n#define HCI_DBG_SET_SYNC_CONFIG_CMD_OPCODE 0xFC51\n// set pcm setting\n#define HCI_DBG_SET_PCM_SETTING_CMD_OPCODE 0xFC52\n// set sync buff size\n#define HCI_DBG_SET_SYNC_BUF_SIZE_CMD_OPCODE 0xFC53\n// set local feature\n#define HCI_DBG_SET_LOCAL_FEATURE_CMD_OPCODE 0xFC59\n// bt setting interface\n#define HCI_DBG_SET_BT_SETTING_CMD_OPCODE 0xFC5F\n// set afh algorithm\n#define HCI_DBG_SET_AFH_ALGORITHM_CMD_OPCODE 0xFC58\n// set local extend feature\n#define HCI_DBG_SET_LOCAL_EX_FEATURE_CMD_OPCODE 0xFC5A\n\n#define HCI_DBG_SET_BT_RF_TIMING_CMD_OPCODE 0xFC5B\n\n#define HCI_DBG_SET_BLE_RF_TIMING_CMD_OPCODE 0xFC5C\n\n// xiao add for nonsignaling test mode\n#define HCI_DBG_NONSIG_TESTER_SETUP_CMD_OPCODE 0xFC60\n/* xiao add for custom set param*/\n#define HCI_DBG_SET_CUSTOM_PARAM_CMD_OPCODE 0xFC61\n\n#define HCI_DBG_SET_SCO_SWITCH_CMD_OPCODE 0xFC62\n\n#define HCI_DBG_SET_SNIFFER_ENV_CMD_OPCODE 0xFC67\n\n#define HCI_DBG_START_TWS_EXCHANGE_CMD_OPCODE 0xFC69\n\n#define HCI_DBG_BTADDR_EXCHANGE_CMD_OPCODE 0xFC6A\n\n#define HCI_DBG_SEND_DATA_TO_PEER_DEV_CMD_OPCODE 0xFC6B\n\n#define HCI_DBG_SCO_TX_SILENCE_CMD_OPCODE 0xFC6C\n\n#define HCI_DBG_SNIFFER_CMD_OPCODE 0xFC6D\n\n#define HCI_DBG_BT_VCO_TEST_CMD_OPCODE 0xFCAA\n\n// Only new controller IP has this funciton,it is a error opcode\n#define HCI_DBG_SET_ROLE_SWITCH_INSTANT_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_LINK_LBRT_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_BT_SETTING_EXT1_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_BT_TWS_LINK_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_AFH_FOLLOW_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_RF_RX_GAIN_THS_TBL_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_RF_RX_GAIN_FIXED_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_BT_SETTING_EXT2_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_IBRT_TEST_MODE_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_BT_LOCAL_CLK_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_FUNC_PATCH_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_TXPWR_MODE_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_SW_RSSI_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_ECC_DATA_TEST_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_IBRT_DATA_TEST_CMD_OPCODE 0xFCFF\n#define HCI_DBG_SET_NWINSZ_RXGRN_TO_CMD_OPCODE 0xFCFF\n#define HCI_DBG_ENABLE_SOFTBIT_CMD_OPCODE 0xFCFF\n\n#endif // 2300, 2300p, 1400,1402,1501\n\nextern void btdrv_poweron(uint8_t en);\nextern void btdrv_hciopen(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/drivers/bt/bt_drv_common.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_utils.h\"\n#include \"besbt_string.h\"\n#include \"bt_drv.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_internal.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"hal_chipid.h\"\n#include \"hal_i2c.h\"\n#include \"hal_uart.h\"\n#include \"plat_types.h\"\n#include \"string.h\"\n\n#define BT_DUMP_LEN_LINE 100\n#define SLOT_SIZE 625\n#define CLK_SUB(clock_a, clock_b)                                              \\\n  ((uint32_t)(((clock_a) - (clock_b)) & MAX_SLOT_CLOCK))\n#define CLK_ADD_2(clock_a, clock_b)                                            \\\n  ((uint32_t)(((clock_a) + (clock_b)) & MAX_SLOT_CLOCK))\n\nstruct bt_cb_tag bt_drv_func_cb = {NULL};\nstruct bt_cb_tag *bt_drv_get_func_cb_ptr(void) { return &bt_drv_func_cb; }\n\n/// only used for bt chip write patch data for speed up\nvoid btdrv_memory_copy(uint32_t *dest, const uint32_t *src, uint16_t length) {\n  // memcpy(dest,src,length);\n  uint16_t i;\n  for (i = 0; i < length / 4; i++) {\n    *dest++ = *src++;\n  }\n}\n\nconst uint8_t lmp_sniffer_filter_tab[51] = {\n    50, // array length\n    LMP_NAME_REQ_OPCODE,\n    LMP_NAME_RES_OPCODE,\n    LMP_ACCEPTED_OPCODE,\n    LMP_NOT_ACCEPTED_OPCODE,\n    LMP_CLK_OFF_REQ_OPCODE,\n    LMP_CLK_OFF_RES_OPCODE,\n    // LMP_DETACH_OPCODE,\n    LMP_INRAND_OPCODE,\n    LMP_COMBKEY_OPCODE,\n    LMP_UNITKEY_OPCODE,\n    LMP_AURAND_OPCODE,\n    LMP_SRES_OPCODE,\n    LMP_TEMPRAND_OPCODE,\n    LMP_TEMPKEY_OPCODE,\n    LMP_ENC_MODE_REQ_OPCODE,\n    LMP_ENC_KEY_SIZE_REQ_OPCODE,\n    LMP_START_ENC_REQ_OPCODE,\n    LMP_STOP_ENC_REQ_OPCODE,\n    LMP_SWITCH_REQ_OPCODE,\n    LMP_HOLD_OPCODE,\n    LMP_HOLD_REQ_OPCODE,\n    LMP_SNIFF_REQ_OPCODE,\n    // LMP_UNSNIFF_REQ_OPCODE,\n    LMP_PARK_REQ_OPCODE,\n    LMP_SET_BSWIN_OPCODE,\n    LMP_MODIF_BEACON_OPCODE,\n    LMP_UNPARK_BD_REQ_OPCODE,\n    LMP_UNPARK_PM_REQ_OPCODE,\n    // LMP_INCR_PWR_REQ_OPCODE,\n    // LMP_DECR_PWR_REQ_OPCODE,\n    // LMP_MAX_PWR_OPCODE,\n    // LMP_MIN_PWR_OPCODE,\n    // LMP_AUTO_RATE_OPCODE,\n    // LMP_PREF_RATE_OPCODE,\n    LMP_VER_REQ_OPCODE,\n    LMP_VER_RES_OPCODE,\n    LMP_FEATS_REQ_OPCODE,\n    LMP_FEATS_RES_OPCODE,\n    // LMP_QOS_OPCODE,\n    // LMP_QOS_REQ_OPCODE,\n    LMP_SCO_LINK_REQ_OPCODE,\n    LMP_RMV_SCO_LINK_REQ_OPCODE,\n    // LMP_MAX_SLOT_OPCODE,\n    // LMP_MAX_SLOT_REQ_OPCODE,\n    LMP_TIMING_ACCU_REQ_OPCODE,\n    LMP_TIMING_ACCU_RES_OPCODE,\n    LMP_SETUP_CMP_OPCODE,\n    LMP_USE_SEMI_PERM_KEY_OPCODE,\n    LMP_HOST_CON_REQ_OPCODE,\n    LMP_SLOT_OFF_OPCODE,\n    LMP_PAGE_MODE_REQ_OPCODE,\n    LMP_PAGE_SCAN_MODE_REQ_OPCODE,\n    // LMP_SUPV_TO_OPCODE,\n    LMP_TEST_ACTIVATE_OPCODE,\n    LMP_TEST_CTRL_OPCODE,\n    LMP_ENC_KEY_SIZE_MASK_REQ_OPCODE,\n    LMP_ENC_KEY_SIZE_MASK_RES_OPCODE,\n    // LMP_SET_AFH_OPCODE,\n    LMP_ENCAPS_HDR_OPCODE,\n    LMP_ENCAPS_PAYL_OPCODE,\n    LMP_SP_CFM_OPCODE,\n    LMP_SP_NB_OPCODE,\n    LMP_DHKEY_CHK_OPCODE,\n    LMP_PAUSE_ENC_AES_REQ_OPCODE,\n};\n\nconst uint8_t lmp_ext_sniffer_filter_tab[18] = {\n    17, // array length\n    LMP_ACCEPTED_EXT_EXTOPCODE,\n    LMP_NOT_ACCEPTED_EXT_EXTOPCODE,\n    LMP_FEATS_REQ_EXT_EXTOPCODE,\n    LMP_FEATS_RES_EXT_EXTOPCODE,\n    // LMP_CLK_ADJ_EXTOPCODE,\n    // LMP_CLK_ADJ_ACK_EXTOPCODE,\n    // LMP_CLK_ADJ_REQ_EXTOPCODE,\n    // LMP_PKT_TYPE_TBL_REQ_EXTOPCODE,\n    // LMP_ESCO_LINK_REQ_EXTOPCODE,\n    // LMP_RMV_ESCO_LINK_REQ_EXTOPCODE,\n    // LMP_CH_CLASS_REQ_EXTOPCODE,\n    // LMP_CH_CLASS_EXTOPCODE,\n    LMP_SSR_REQ_EXTOPCODE,\n    LMP_SSR_RES_EXTOPCODE,\n    LMP_PAUSE_ENC_REQ_EXTOPCODE,\n    LMP_RESUME_ENC_REQ_EXTOPCODE,\n    LMP_IO_CAP_REQ_EXTOPCODE,\n    LMP_IO_CAP_RES_EXTOPCODE,\n    LMP_NUM_COMPARISON_FAIL_EXTOPCODE,\n    LMP_PASSKEY_FAIL_EXTOPCODE,\n    LMP_OOB_FAIL_EXTOPCODE,\n    LMP_KEYPRESS_NOTIF_EXTOPCODE,\n    // LMP_PWR_CTRL_REQ_EXTOPCODE,\n    LMP_PWR_CTRL_RES_EXTOPCODE,\n    LMP_PING_REQ_EXTOPCODE,\n    LMP_PING_RES_EXTOPCODE,\n};\n\nconst uint8_t lmp_ext_sniffer_fast_cfm_tab[4] = {\n    3, // array length\n    LMP_ACCEPTED_EXT_EXTOPCODE,\n    LMP_NOT_ACCEPTED_EXT_EXTOPCODE,\n    LMP_CH_CLASS_EXTOPCODE,\n};\n\nextern uint8_t sleep_param[];\nvoid btdrv_set_lpo_times(void) {\n  *(uint32_t *)0xd0330044 &= ~0xff;\n  *(uint32_t *)0xd0330044 |= (uint32_t)(sleep_param[4] - 1);\n}\n\nint btdrv_slave2master_clkcnt_convert(uint32_t local_clk, uint16_t local_cnt,\n                                      int32_t clk_offset, uint16_t bit_offset,\n                                      uint32_t *master_clk,\n                                      uint16_t *master_cnt) {\n  // Adjust bit offset and clock offset if needed\n  uint32_t new_clk;\n  int16_t new_cnt;\n\n  new_clk = CLK_ADD_2(local_clk, clk_offset);\n  new_cnt = (int16_t)local_cnt + bit_offset;\n\n  if (new_cnt > SLOT_SIZE) {\n    new_cnt -= SLOT_SIZE;\n    new_clk = CLK_SUB(new_clk, 1);\n  }\n\n  *master_clk = new_clk;\n  *master_cnt = new_cnt;\n  return 0;\n}\n\nvoid bt_drv_set_fa_invert_enable(uint8_t en) {\n  BTDIGITAL_REG_SET_FIELD(0xd0220468, 1, 17, en);\n  BT_DRV_TRACE(1, \"BT_DRV:set fa invert en=%d\", en);\n}\n\nvoid btdrv_trigger_coredump(void) {\n  uint8_t *null_pointer = 0;\n  *null_pointer = 0; // MPU trigger coredump\n}\n\nint btdrv_clkcnt_diff(int32_t clk1, int16_t cnt1, int32_t clk2, int16_t cnt2,\n                      int32_t *diff_clk, uint16_t *diff_bit) {\n  int32_t new_clk;\n  int16_t new_cnt;\n  int diff_us;\n\n  new_clk = (int32_t)clk1 - (int32_t)clk2;\n  new_cnt = cnt1 - cnt2;\n  if (new_cnt < 0) {\n    new_cnt += SLOT_SIZE;\n  } else {\n    new_clk -= 1;\n  }\n\n  *diff_clk = new_clk;\n  *diff_bit = new_cnt;\n\n  diff_us = new_clk * SLOT_SIZE + (SLOT_SIZE - new_cnt);\n\n  return diff_us;\n}\n\nvoid WEAK btdrv_set_controller_trace_enable(uint8_t trace_level) {}\n\nvoid WEAK btdrv_set_lmp_trace_enable(void) {}\nstatic bool g_controller_trace_dump_enable = false;\nbool btdrv_get_controller_trace_dump_enable(void) {\n  return g_controller_trace_dump_enable;\n}\nvoid btdrv_set_controller_trace_dump_enable(void) {\n  g_controller_trace_dump_enable = true;\n}\n\nvoid btdrv_btc_fault_dump(void) {\n  app_wdt_close();\n  bt_drv_reg_op_crash_dump();\n}\n\nvoid btdrv_dump_mem(uint8_t *dump_mem_start, uint32_t dump_length,\n                    uint8_t dump_type) {\n#if CONTROLLER_DUMP_ENABLE\n  uint32_t dump_counter = 0;\n  uint32_t dump_line = 0;\n\n  hal_sys_timer_delay(MS_TO_TICKS(100));\n  switch (dump_type) {\n  case BT_SUB_SYS_TYPE:\n    BT_DRV_TRACE(1, \"controller dump start, dump len=0x%x\", dump_length);\n    break;\n\n  case MCU_SYS_TYPE:\n    BT_DRV_TRACE(1, \"mcu dump start, dump len=0x%x\", dump_length);\n    break;\n\n  case BT_EM_AREA_1_TYPE:\n    BT_DRV_TRACE(1, \"em_area1 dump start, dump len=0x%x\", dump_length);\n    break;\n\n  case BT_EM_AREA_2_TYPE:\n    BT_DRV_TRACE(1, \"em_area2 dump start, dump len=0x%x\", dump_length);\n    break;\n  }\n  while (dump_counter < dump_length) {\n    uint32_t data_left = dump_length - dump_counter;\n    dump_line += 1;\n    if (data_left >= BT_DUMP_LEN_LINE) {\n      BT_DRV_TRACE(1, \"dump_line=%d\", dump_line);\n      DUMP8(\"%02x\", dump_mem_start, BT_DUMP_LEN_LINE);\n      hal_trace_flush_buffer();\n      dump_mem_start += BT_DUMP_LEN_LINE;\n      dump_counter += BT_DUMP_LEN_LINE;\n      hal_sys_timer_delay(MS_TO_TICKS(50));\n    } else {\n      BT_DRV_TRACE(1, \"dump_line=%d\", dump_line);\n      DUMP8(\"%02x\", dump_mem_start, data_left);\n      hal_trace_flush_buffer();\n      hal_sys_timer_delay(MS_TO_TICKS(50));\n      break;\n    }\n  }\n  switch (dump_type) {\n  case BT_SUB_SYS_TYPE:\n    BT_DRV_TRACE(0, \"controller dump end\");\n    break;\n\n  case MCU_SYS_TYPE:\n    BT_DRV_TRACE(0, \"mcu dump end\");\n    break;\n\n  case BT_EM_AREA_1_TYPE:\n    BT_DRV_TRACE(0, \"em_area1 dump end\");\n    break;\n\n  case BT_EM_AREA_2_TYPE:\n    BT_DRV_TRACE(0, \"em_area2 dump end\");\n    break;\n  }\n#endif\n}\nvoid btdrv_trace_config(BT_CONTROLER_TRACE_TYPE trace_config) {\n  if (trace_config & BT_CONTROLER_TRACE_TYPE_INTERSYS) {\n    btdrv_set_intersys_trace_enable();\n  }\n\n  if (trace_config & BT_CONTROLER_TRACE_TYPE_CONTROLLER) {\n    btdrv_set_controller_trace_enable(0x00);\n  }\n\n  if (trace_config & BT_CONTROLER_TRACE_TYPE_LMP_TRACE) {\n    btdrv_set_lmp_trace_enable();\n  }\n\n  if (trace_config & BT_CONTROLER_TRACE_TYPE_SPUV_HCI_BUFF) {\n    btdrv_set_spuv_hci_buff_trace_enable();\n  }\n\n  if (trace_config & BT_CONTROLER_FILTER_TRACE_TYPE_A2DP_STREAM) {\n    btdrv_set_a2dp_stream_trace_disable();\n  }\n\n#if CONTROLLER_MEM_LOG_ENABLE\n  btdrv_set_controller_trace_dump_enable();\n#endif\n}\n\nbool bt_drv_is_enhanced_ibrt_rom(void) {\n  bool ret = false;\n\n#ifdef CHIP_BEST2300P\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1)\n    ret = true;\n#elif CHIP_BEST1400\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2)\n    ret = true;\n#elif CHIP_BEST1402\n  ret = true;\n#elif CHIP_BEST2300A\n  ret = true;\n#elif CHIP_BEST2300\n  ret = true;\n#endif\n\n  return ret;\n}\n\nbool bt_drv_is_esco_auto_accept_support(void) {\n  bool ret = false;\n\n#ifdef CHIP_BEST2300P\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2)\n    ret = true;\n#elif CHIP_BEST1400\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_4)\n    ret = true;\n#elif CHIP_BEST1402\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_1)\n    ret = true;\n#elif CHIP_BEST2300A\n  ret = true;\n#endif\n\n  return ret;\n}\n\nbool btdrv_is_acl_ecc_softbit_support(void) {\n  bool ret = false;\n#ifdef CHIP_BEST2300A\n  ret = true;\n#endif\n\n  return ret;\n}\n\nvoid btdrv_softbit_enable(uint16_t connhdl, uint8_t type1, uint8_t type2,\n                          uint8_t type3, uint8_t num) {\n  if (btdrv_is_acl_ecc_softbit_support()) {\n#if (defined(SOFTBIT_EN))\n    btdrv_softbit_config(connhdl, type1, type2, type3, num);\n#endif\n  }\n}\n\nvoid bt_drv_bt_tport_type_config(void) {\n  uint32_t tport_type = 0xb1b1;\n#ifdef __BT_DEBUG_TPORTS__\n  tport_type = TPORT_TYPE;\n#endif\n  BTDIGITAL_REG(0xd0220050) = tport_type;\n  BTDIGITAL_REG(0xd0340000) = 0x23620200;\n\n  BT_DRV_TRACE(1, \"BT_DRV: tport type=0x%x\", tport_type);\n}\n\nbool bt_drv_is_bes_fa_mode_en(void) {\n  bool ret = false;\n#ifdef __BES_FA_MODE__\n  ret = true;\n#endif\n  return ret;\n}\n\nbool bt_drv_is_support_multipoint_ibrt(void) {\n  bool ret = false;\n  return ret;\n}\n\nvoid bt_drv_enable_hw_spi(uint8_t elt_idx, bool hwspien) {\n#ifdef CHIP_BEST2300A\n  bt_drv_reg_op_hw_spi_en_setf(elt_idx, hwspien);\n#endif\n}\n\nstruct btstack_chip_config_t {\n  uint16_t hci_dbg_set_sync_config_cmd_opcode;\n  uint16_t hci_dbg_set_sco_switch_cmd_opcode;\n} g_bt_drv_btstack_chip_config = {\n    HCI_DBG_SET_SYNC_CONFIG_CMD_OPCODE,\n    HCI_DBG_SET_SCO_SWITCH_CMD_OPCODE,\n};\n\nvoid *bt_drv_get_btstack_chip_config(void) {\n  return &g_bt_drv_btstack_chip_config;\n}\n\nvoid bt_drv_hwspi_select(uint8_t link_id, uint8_t spi_idx) {\n#ifdef __FA_RX_GAIN_CTRL__\n  btdrv_spi_trig_select(link_id, spi_idx);\n#endif\n}\n\n/// BCH size\n#define LD_BCH_SIZE 8\n\nstatic const uint8_t ld_util_bch_ppolynom[LD_BCH_SIZE] = {\n    0x83, 0x84, 0x8D, 0x96, 0xBB, 0xCC, 0x54, 0xFC};\n\nstatic const uint8_t ld_util_bch_gpolynom[LD_BCH_SIZE] = {\n    0x00, 0x00, 0x00, 0x05, 0x85, 0x71, 0x3D, 0xA9};\n\nstatic void ld_util_bch_modulo(uint8_t *dividend, const uint8_t *divisor,\n                               uint8_t *rest) {\n  uint8_t clock;\n  uint8_t carry;\n  uint8_t index;\n  uint8_t dividend_tmp[LD_BCH_SIZE];\n\n  // Copy dividend vector in a temporary vector\n  // And reset rest vector\n  for (index = 0; index < LD_BCH_SIZE; index++) {\n    dividend_tmp[index] = dividend[index];\n    rest[index] = 0;\n  }\n\n  // Execute 64 times the LFSR process\n  for (clock = 0; clock < 64; clock++) {\n    // Store bit Rest(degree-1) in carry (assume degree of G is 32)\n    carry = rest[3] & 0x02;\n\n    // the rest is shifted of 1 bit Left\n    // The MSB of rest if lost and the MSB of dividend is shifted in LSB\n    rest[0] = (rest[0] << 1) | ((rest[1] & 0x80) >> 7);\n    rest[1] = (rest[1] << 1) | ((rest[2] & 0x80) >> 7);\n    rest[2] = (rest[2] << 1) | ((rest[3] & 0x80) >> 7);\n    rest[3] = (rest[3] << 1) | ((rest[4] & 0x80) >> 7);\n    rest[4] = (rest[4] << 1) | ((rest[5] & 0x80) >> 7);\n    rest[5] = (rest[5] << 1) | ((rest[6] & 0x80) >> 7);\n    rest[6] = (rest[6] << 1) | ((rest[7] & 0x80) >> 7);\n    rest[7] = (rest[7] << 1) | ((dividend_tmp[0] & 0x80) >> 7);\n\n    // the dividend_tmp is shifted of 1 bit Left (a 0 is shifted in LSB)\n    dividend_tmp[0] = (dividend_tmp[0] << 1) | ((dividend_tmp[1] & 0x80) >> 7);\n    dividend_tmp[1] = (dividend_tmp[1] << 1) | ((dividend_tmp[2] & 0x80) >> 7);\n    dividend_tmp[2] = (dividend_tmp[2] << 1) | ((dividend_tmp[3] & 0x80) >> 7);\n    dividend_tmp[3] = (dividend_tmp[3] << 1) | ((dividend_tmp[4] & 0x80) >> 7);\n    dividend_tmp[4] = (dividend_tmp[4] << 1) | ((dividend_tmp[5] & 0x80) >> 7);\n    dividend_tmp[5] = (dividend_tmp[5] << 1) | ((dividend_tmp[6] & 0x80) >> 7);\n    dividend_tmp[6] = (dividend_tmp[6] << 1) | ((dividend_tmp[7] & 0x80) >> 7);\n    dividend_tmp[7] = (dividend_tmp[7] << 1);\n\n    // If bit carry value was 1\n    if (carry != 0) {\n      // rest = rest XOR Divisor\n      for (index = 0; index < LD_BCH_SIZE; index++) {\n        rest[index] ^= divisor[index];\n      }\n    }\n  }\n}\n\nvoid ld_util_bch_create(uint8_t *lap, uint8_t *bch) {\n  uint8_t vector[LD_BCH_SIZE];\n  uint8_t vector2[LD_BCH_SIZE];\n  uint8_t index;\n\n  // Copy lap and Appended in bch\n  if (lap[2] & 0x80) {\n    vector[0] = 0x4C; // If a23 = 1\n  } else {\n    vector[0] = 0xB0; // If a23 = 0\n  }\n\n  vector[0] |= lap[2] >> 6;\n  vector[1] = lap[2] << 2 | lap[1] >> 6;\n  vector[2] = lap[1] << 2 | lap[0] >> 6;\n  vector[3] = lap[0] << 2;\n\n  // Xor Vector and PN (Vector contains only 30 significant bits)\n  for (index = 0; index < 4; index++) {\n    vector[index] ^= ld_util_bch_ppolynom[index];\n  }\n\n  // Reset 34 last bits\n  vector[3] &= 0xFC;\n  vector[4] = 0;\n  vector[5] = 0;\n  vector[6] = 0;\n  vector[7] = 0;\n\n  // Generate Parity bits Vector Modulo G\n  ld_util_bch_modulo(vector, ld_util_bch_gpolynom, vector2);\n\n  // Create CodeWord (concatenate Modulo result and Xored Vector)\n  vector[3] |= vector2[3];\n  vector[4] = vector2[4];\n  vector[5] = vector2[5];\n  vector[6] = vector2[6];\n  vector[7] = vector2[7];\n\n  // Xor codeWord and PN\n  for (index = 0; index < 8; index++) {\n    bch[7 - index] = vector[index] ^ ld_util_bch_ppolynom[index];\n  }\n}\n\nvoid bt_drv_rssi_dump_handler(void) {\n  rx_agc_t bt_agc = {0, 0xf};\n  for (int i = 0; i < MAX_NB_ACTIVE_ACL; i++) {\n    bt_drv_reg_op_read_rssi_in_dbm(BT_ACL_CONHDL_BIT + i, &bt_agc);\n    BT_DRV_TRACE(3, \"BT=0x%x,rssi=%d,gain=%d\", (BT_ACL_CONHDL_BIT + i),\n                 bt_agc.rssi, bt_agc.rxgain);\n    bt_agc.rssi = 0;\n    bt_agc.rxgain = 0xf;\n  }\n\n  rx_agc_t ble_agc = {0, 0xf};\n  bt_drv_reg_op_read_ble_rssi_in_dbm(0, &ble_agc);\n  BT_DRV_TRACE(2, \"BLE rssi=%d,gain=%d\\n\", ble_agc.rssi, ble_agc.rxgain);\n}\n\nbool bt_drv_error_check_handler(void) {\n  bool ret = false;\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST1400) ||                        \\\n    defined(CHIP_BEST1402) || defined(CHIP_BEST2300P) ||                       \\\n    defined(CHIP_BEST2300A)\n  if (BTDIGITAL_REG(BT_ERRORTYPESTAT_ADDR) != 0 ||\n      BTDIGITAL_REG(BT_CONTROLLER_CRASH_DUMP_ADDR_BASE) != 0) {\n    BT_DRV_TRACE(1, \"BT_DRV:digital assert,error code=0x%x\",\n                 BTDIGITAL_REG(BT_ERRORTYPESTAT_ADDR));\n    ret = true;\n  }\n#endif\n  return ret;\n}\n\nsize_t memcpy_s(void *dst, size_t dstMax, const void *src, size_t srcMax) {\n  memcpy(dst, src, srcMax);\n  return 0;\n}\n\nsize_t memset_s(dst0, dstMax, c0, srcMax) void *dst0;\nsize_t dstMax;\nint c0;\nsize_t srcMax;\n{\n  memset(dst0, c0, srcMax);\n  return 0;\n}\n"
  },
  {
    "path": "platform/drivers/bt/bt_drv_interface.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_DRV_INTERFACE_H__\n#define  __BT_DRV_INTERFACE_H__\n\n#include \"stdint.h\"\n#include \"stdbool.h\"\n\n//LMP Opcodes\n#define LMP_NAME_REQ_OPCODE                1\n#define LMP_NAME_RES_OPCODE                2\n#define LMP_ACCEPTED_OPCODE                3\n#define LMP_NOT_ACCEPTED_OPCODE            4\n#define LMP_CLK_OFF_REQ_OPCODE             5\n#define LMP_CLK_OFF_RES_OPCODE             6\n#define LMP_DETACH_OPCODE                  7\n#define LMP_INRAND_OPCODE                  8\n#define LMP_COMBKEY_OPCODE                 9\n#define LMP_UNITKEY_OPCODE                10\n#define LMP_AURAND_OPCODE                 11\n#define LMP_SRES_OPCODE                   12\n#define LMP_TEMPRAND_OPCODE               13\n#define LMP_TEMPKEY_OPCODE                14\n#define LMP_ENC_MODE_REQ_OPCODE           15\n#define LMP_ENC_KEY_SIZE_REQ_OPCODE       16\n#define LMP_START_ENC_REQ_OPCODE          17\n#define LMP_STOP_ENC_REQ_OPCODE           18\n#define LMP_SWITCH_REQ_OPCODE             19\n#define LMP_HOLD_OPCODE                   20\n#define LMP_HOLD_REQ_OPCODE               21\n#define LMP_SNIFF_REQ_OPCODE              23\n#define LMP_UNSNIFF_REQ_OPCODE            24\n#define LMP_PARK_REQ_OPCODE               25\n#define LMP_SET_BSWIN_OPCODE              27\n#define LMP_MODIF_BEACON_OPCODE           28\n#define LMP_UNPARK_BD_REQ_OPCODE          29\n#define LMP_UNPARK_PM_REQ_OPCODE          30\n#define LMP_INCR_PWR_REQ_OPCODE           31\n#define LMP_DECR_PWR_REQ_OPCODE           32\n#define LMP_MAX_PWR_OPCODE                33\n#define LMP_MIN_PWR_OPCODE                34\n#define LMP_AUTO_RATE_OPCODE              35\n#define LMP_PREF_RATE_OPCODE              36\n#define LMP_VER_REQ_OPCODE                37\n#define LMP_VER_RES_OPCODE                38\n#define LMP_FEATS_REQ_OPCODE              39\n#define LMP_FEATS_RES_OPCODE              40\n#define LMP_QOS_OPCODE                    41\n#define LMP_QOS_REQ_OPCODE                42\n#define LMP_SCO_LINK_REQ_OPCODE           43\n#define LMP_RMV_SCO_LINK_REQ_OPCODE       44\n#define LMP_MAX_SLOT_OPCODE               45\n#define LMP_MAX_SLOT_REQ_OPCODE           46\n#define LMP_TIMING_ACCU_REQ_OPCODE        47\n#define LMP_TIMING_ACCU_RES_OPCODE        48\n#define LMP_SETUP_CMP_OPCODE              49\n#define LMP_USE_SEMI_PERM_KEY_OPCODE      50\n#define LMP_HOST_CON_REQ_OPCODE           51\n#define LMP_SLOT_OFF_OPCODE               52\n#define LMP_PAGE_MODE_REQ_OPCODE          53\n#define LMP_PAGE_SCAN_MODE_REQ_OPCODE     54\n#define LMP_SUPV_TO_OPCODE                55\n#define LMP_TEST_ACTIVATE_OPCODE          56\n#define LMP_TEST_CTRL_OPCODE              57\n#define LMP_ENC_KEY_SIZE_MASK_REQ_OPCODE  58\n#define LMP_ENC_KEY_SIZE_MASK_RES_OPCODE  59\n#define LMP_SET_AFH_OPCODE                60\n#define LMP_ENCAPS_HDR_OPCODE             61\n#define LMP_ENCAPS_PAYL_OPCODE            62\n#define LMP_SP_CFM_OPCODE                 63\n#define LMP_SP_NB_OPCODE                  64\n#define LMP_DHKEY_CHK_OPCODE              65\n#define LMP_PAUSE_ENC_AES_REQ_OPCODE      66\n\n///LMP Escape 4 Extended Opcodes\n#define LMP_ACCEPTED_EXT_EXTOPCODE         1\n#define LMP_NOT_ACCEPTED_EXT_EXTOPCODE     2\n#define LMP_FEATS_REQ_EXT_EXTOPCODE        3\n#define LMP_FEATS_RES_EXT_EXTOPCODE        4\n#define LMP_CLK_ADJ_EXTOPCODE              5\n#define LMP_CLK_ADJ_ACK_EXTOPCODE          6\n#define LMP_CLK_ADJ_REQ_EXTOPCODE          7\n#define LMP_PKT_TYPE_TBL_REQ_EXTOPCODE    11\n#define LMP_ESCO_LINK_REQ_EXTOPCODE       12\n#define LMP_RMV_ESCO_LINK_REQ_EXTOPCODE   13\n#define LMP_CH_CLASS_REQ_EXTOPCODE        16\n#define LMP_CH_CLASS_EXTOPCODE            17\n#define LMP_SSR_REQ_EXTOPCODE             21\n#define LMP_SSR_RES_EXTOPCODE             22\n#define LMP_PAUSE_ENC_REQ_EXTOPCODE       23\n#define LMP_RESUME_ENC_REQ_EXTOPCODE      24\n#define LMP_IO_CAP_REQ_EXTOPCODE          25\n#define LMP_IO_CAP_RES_EXTOPCODE          26\n#define LMP_NUM_COMPARISON_FAIL_EXTOPCODE 27\n#define LMP_PASSKEY_FAIL_EXTOPCODE        28\n#define LMP_OOB_FAIL_EXTOPCODE            29\n#define LMP_KEYPRESS_NOTIF_EXTOPCODE      30\n#define LMP_PWR_CTRL_REQ_EXTOPCODE        31\n#define LMP_PWR_CTRL_RES_EXTOPCODE        32\n#define LMP_PING_REQ_EXTOPCODE            33\n#define LMP_PING_RES_EXTOPCODE            34\n\n// CARE: round-off error\n#define BT_CLK_UNIT 312.5       //us\n#define BT_CLK_UNIT_2X 625       //us\n#define BT_CLK_UNIT_10X 3125       //us\n#define US_TO_BTCLKS(us)    ((uint64_t)(us) * 2 / BT_CLK_UNIT_2X)\n#define BTCLKS_TO_US(n)     ((uint64_t)(n) * BT_CLK_UNIT_2X / 2)\n\n#define DUT_CONNECT_STATUS_CONNECTED (1)\n#define DUT_CONNECT_STATUS_DISCONNECTED (2)\n\n#define BT_TRIG_NONE_ROLE      (0)\n#define BT_TRIG_MASTER_ROLE    (1)\n#define BT_TRIG_SLAVE_ROLE     (2)\n\nenum BT_WORK_MODE_T{\n   BT_A2DP_WORK_MODE = 0,\n   BT_HFP_WORK_MODE,\n   BT_IDLE_MODE,\n   BT_NONE_MODE,\n};\n\nenum BT_AGC_MODE_T{\n   BT_AGC_MODE_SW = 0,\n   BT_AGC_MODE_HW,\n   BT_AGC_MODE_NONE,\n};\n\n//add bt magic call back function here\nstruct bt_cb_tag\n{\n    ///switch various agc call back function\n    void (*bt_switch_agc)(enum BT_WORK_MODE_T);\n};\n\n#define btdrv_set_intersys_trace_enable()  beshci_set_intersys_trace_enable()\n#define btdrv_set_spuv_hci_buff_trace_enable()  beshci_set_supv_hci_buff_trace_enable()\n#define btdrv_set_a2dp_stream_trace_disable()  beshci_set_a2dp_stream_trace_enable(false)\n#define btdrv_enable_sleep_checker(isEnable)   beshci_enable_sleep_checker(isEnable)\n\n#define HCI_HANDLE_MIN         (0x80)\n#define HCI_HANDLE_MAX         (0x83)\n#define HCI_LINK_INDEX_INVALID  (0xFF)\n#define btdrv_is_link_index_valid(index)  (index != HCI_LINK_INDEX_INVALID)\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nvoid btdrv_hciopen(void);\nvoid btdrv_hcioff(void);\nvoid btdrv_start_bt(void);\nvoid btdrv_SendData(const uint8_t *buff,uint8_t len);\nvoid bt_drv_extra_config_after_init(void);\nvoid btdrv_rf_init_ext(void);\n\nvoid btdrv_stop_bt(void);\nvoid btdrv_testmode_start(void);\nvoid btdrv_enable_dut(void);\nvoid btdrv_hci_reset(void);\nvoid btdrv_enable_nonsig_tx(uint8_t index);\nvoid btdrv_enable_nonsig_rx(uint8_t index);\nvoid btdrv_vco_test_start(uint8_t chnl);\nvoid btdrv_vco_test_stop(void);\nvoid bt_drv_calib_open(void);\nvoid bt_drv_check_calib(void);\nvoid bt_drv_calib_close(void);\nint bt_drv_calib_result_porc(uint32_t *capval);\nvoid bt_drv_calib_rxonly_porc(void);\nvoid btdrv_write_localinfo(const char *name, uint8_t len, const uint8_t *addr);\nvoid btdrv_disable_scan(void);\n\nvoid bt_drv_bt_tport_type_config(void);\nvoid bt_drv_rf_reset(void);\nvoid btdrv_sleep_config(uint8_t sleep_en);\nvoid btdrv_feature_default(void);\nvoid btdrv_test_mode_addr_set(void);\n\nint btdrv_meinit_param_init(void);\nint btdrv_meinit_param_remain_size_get(void);\nint btdrv_meinit_param_next_entry_get(uint32_t *addr, uint32_t *val);\nuint32_t btdrv_rf_get_max_xtal_tune_ppb(void);\nuint32_t btdrv_rf_get_xtal_tune_factor(void);\nvoid btdrv_rf_init_xtal_fcap(uint32_t fcap);\nuint32_t btdrv_rf_get_init_xtal_fcap(void);\nuint32_t btdrv_rf_get_xtal_fcap(void);\nvoid btdrv_rf_set_xtal_fcap(uint32_t fcap, uint8_t is_direct);\nint btdrv_rf_xtal_fcap_busy(uint8_t is_direct);\n\nvoid btdrv_rf_bit_offset_track_enable(bool enable);\nuint32_t btdrv_rf_bit_offset_get(void);\nvoid btdrv_uart_bridge_loop(void);\nvoid btdrv_testmode_data_overide(void);\n\nvoid btdrv_set_bt_pcm_triggler_delay(uint8_t delay);\nvoid btdrv_set_bt_pcm_en(uint8_t  en);\n\nuint16_t btdrv_rf_bitoffset_get(uint8_t conidx);\n\nvoid  btdrv_syn_clr_trigger(void);\n\nuint32_t btdrv_rf_bit_offset_get(void);\nuint32_t btdrv_syn_get_curr_ticks(void);\nuint32_t bt_syn_get_curr_ticks(uint16_t conhdl);\nint32_t bt_syn_get_offset_ticks(uint16_t conhdl);\nvoid bt_syn_set_tg_ticks(uint32_t val,uint16_t conhdl, uint8_t mode);\nvoid bt_syn_trig_checker(uint16_t conhdl);\nvoid btdrv_syn_trigger_codec_en(uint32_t v);\nuint32_t btdrv_get_syn_trigger_codec_en(void);\nuint32_t btdrv_get_trigger_ticks(void);\n\n#define ACL_TRIGGLE_MODE       1\n#define SCO_TRIGGLE_MODE      2\nvoid btdrv_enable_playback_triggler(uint8_t triggle_mode);\nvoid btdrv_disable_playback_triggler(void);\nvoid btdrv_set_bt_pcm_triggler_en(uint8_t  en);\nvoid btdrv_set_bt_pcm_triggler_delay(uint8_t  delay);\nvoid btdrv_set_bt_pcm_triggler_delay_reset(uint8_t  delay);\nvoid btdrv_set_pcm_data_ignore_crc(void);\n\n\nuint8_t btdrv_conhdl_to_linkid(uint16_t connect_hdl);\nvoid btdrv_set_tws_role_triggler(uint8_t tws_mode);\nvoid btdrv_enable_dual_slave_configurable_slot_mode(bool isEnable,\n        uint16_t activeDevHandle, uint8_t activeDevRole,\n        uint16_t idleDevHandle, uint8_t idleDevRole);\nvoid btdrv_ins_patch_test_init(void);\nvoid btdrv_dynamic_patch_moble_disconnect_reason_hacker(uint16_t hciHandle);\nvoid btdrv_dynamic_patch_sco_status_clear(void);\nuint32_t btdrv_dut_get_connect_status(void);\nvoid btdrv_set_powerctrl_rssi_low(uint16_t rssi);\nvoid btdrv_seq_bak_mode(uint8_t mode,uint8_t linkid);\n\nvoid btdrv_enable_one_packet_more_head(bool enable);\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || \\\n    defined(CHIP_BEST2300P) || defined(CHIP_BEST2001) || defined(CHIP_BEST2300A)\nvoid btdrv_linear_format_16bit_set(void);\nvoid btdrv_pcm_enable(void);\nvoid btdrv_pcm_disable(void);\nvoid btdrv_spi_trig_data_change(uint8_t spi_sel, uint8_t index, uint32_t value);\nvoid btdrv_spi_trig_data_set(uint8_t spi_sel);\nuint8_t btdrv_get_spi_trig_enable(uint8_t spi_sel);\nvoid btdrv_set_spi_trig_enable(uint8_t spi_sel);\nvoid btdrv_clear_spi_trig_enable(uint8_t spi_sel);\nvoid btdrv_spi_trig_init(void);\nvoid btdrv_spi_trig_select(uint8_t link_id, bool spi_set);\nvoid bt_drv_reg_op_cs_monitor(void);\nvoid btdrv_set_controller_trace_enable(uint8_t trace_level);\nuint8_t btdrv_get_controller_trace_level(void);\nbool btdrv_get_lmp_trace_enable(void);\nvoid btdrv_set_lmp_trace_enable(void);\n\n#endif\nvoid bt_drv_hwspi_select(uint8_t link_id, uint8_t spi_idx);\nvoid bt_drv_enable_hw_spi(uint8_t elt_idx, bool hwspien);\nbool btdrv_get_controller_trace_dump_enable(void);\nvoid btdrv_set_controller_trace_dump_enable(void);\nvoid beshci_enable_sleep_checker(bool isEnable);\nvoid beshci_set_intersys_trace_enable(void);\nvoid beshci_set_supv_hci_buff_trace_enable(void);\nvoid beshci_set_a2dp_stream_trace_enable(bool enable);\nvoid btdrv_send_cmd(uint16_t opcode,uint8_t cmdlen,const uint8_t *param);\nvoid btdrv_write_memory(uint8_t wr_type,uint32_t address,const uint8_t *value,uint8_t length);\nvoid bt_drv_patch_force_disconnect_ack(void);\nvoid bt_drv_reg_op_music_link_config(uint16_t active_link,uint8_t active_role,uint16_t inactive_link,uint8_t inactive_role);\nstruct bt_cb_tag* bt_drv_get_func_cb_ptr(void);\n\nvoid btdrv_memory_copy(uint32_t *dest,const uint32_t *src,uint16_t length);\n#if defined(TX_RX_PCM_MASK)\nuint8_t  btdrv_is_pcm_mask_enable(void);\n#endif\nvoid btdrv_set_lpo_times(void);\n\n#if defined(PCM_FAST_MODE)\nvoid btdrv_open_pcm_fast_mode_enable(void);\nvoid btdrv_open_pcm_fast_mode_disable(void);\n#endif\n\n#if defined(CVSD_BYPASS)\nvoid btdrv_cvsd_bypass_enable(uint8_t is_msbc);\n#endif\nvoid bt_drv_reg_op_write_private_public_key(uint8_t* private_key,uint8_t* public_key);\n\n#define BTCLK_STATUS_PRINT()    do{ \\\n    TRACE(\"[%s] %d: curr bt time= %d\", __func__, __LINE__, bt_syn_get_curr_ticks(app_tws_get_tws_conhdl())); \\\n                                }while(0)\n\n#define IS_ENABLE_BT_DRIVER_REG_DEBUG_READING   0\n\nvoid bt_drv_reg_op_acl_tx_silence(uint16_t connHandle, uint8_t on);\n\nint btdrv_slave2master_clkcnt_convert(uint32_t local_clk, uint16_t local_cnt,\n                                               int32_t clk_offset, uint16_t bit_offset,\n                                               uint32_t *master_clk, uint16_t *master_cnt);\n\nint btdrv_clkcnt_diff(int32_t clk1, int16_t cnt1,\n                         int32_t clk2, int16_t cnt2,\n                         int32_t *diff_clk, uint16_t *diff_bit);\nbool bt_drv_reg_op_set_ble_conn_latency(uint16_t ble_conhdl, uint16_t conn_latency);\nuint16_t bt_drv_reg_op_get_ble_conn_latency(uint16_t ble_conhdl);\nvoid bt_drv_reg_op_set_reconnecting_flag();\nuint32_t bt_drv_reg_op_get_reconnecting_flag();\nvoid bt_drv_reg_op_clear_reconnecting_flag();\nbool bt_drv_is_enhanced_ibrt_rom(void);\nbool bt_drv_is_bes_fa_mode_en(void);\nbool bt_drv_is_support_multipoint_ibrt(void);\n\nuint16_t bt_drv_reg_op_get_ibrt_sco_hdl(uint16_t acl_hdl);\nvoid bt_drv_reg_op_get_ibrt_address(uint8_t *addr);\n\nvoid btdrv_enable_rf_sw(int rx_on, int tx_on);\nvoid btdrv_trigger_coredump(void);\nbool btdrv_is_ecc_enable(void);\nvoid bt_drv_adaptive_fa_rx_gain(int8_t rssi);\nvoid* bt_drv_get_btstack_chip_config(void);\nvoid btdrv_spi_sel_ble_setf(int elt_idx, uint8_t spiselble);\nbool bt_drv_is_esco_auto_accept_support(void);\nvoid bt_drv_reg_op_set_hwagc_read_en(uint8_t en);\n\n#if defined(IBRT)\nbool btdrv_is_acl_ecc_softbit_support(void);\nvoid btdrv_softbit_enable(uint16_t connhdl, uint8_t type1,uint8_t type2,uint8_t type3, uint8_t num);\n#endif\n\nvoid btdrv_play_trig_mode_set(uint8_t mode);\n#ifdef __SW_TRIG__\nvoid btdrv_sw_trig_master_set(uint32_t Tclk_M, int16_t Tbit_M_h_ori);\nvoid btdrv_sw_trig_slave_calculate_and_set(uint16_t conhdl, uint32_t Tclk_M, int16_t Tbit_M_h_ori);\nvoid btdrv_sync_sw_trig_store_tws_role(uint8_t role);\nuint8_t btdrv_sync_sw_trig_get_tws_role(void);\nvoid btdrv_sync_sw_trig_store_conhdl(uint16_t conhdl);\nuint16_t btdrv_sync_sw_trig_get_conhdl(void);\nvoid btdrv_sync_sw_trig_store_tws_conhdl(uint16_t conhdl);\nuint16_t btdrv_sync_sw_trig_get_tws_conhdl(void);\nuint16_t btdrv_sw_trig_tg_finecnt_get(void);\nint32_t bt_syn_get_clkoffset(uint16_t conhdl);\nvoid btdrv_sync_sw_trig_store_tg_clkoffset(int32_t clkoffset);\nint32_t btdrv_sync_sw_trig_get_tg_clkoffset(void);\nvoid btdrv_sync_sw_trig_store_tg_finecnt(uint16_t finecnt);\nuint16_t btdrv_sync_sw_trig_get_tg_finecnt(void);\n#endif\n#if defined(PCM_FAST_MODE) && defined(PCM_PRIVATE_DATA_FLAG)\nvoid bt_drv_reg_op_set_pcm_flag();\n#endif\n\n#ifdef __SELF_TRIG__\nvoid btdrv_self_trig_gen_set(uint8_t en);\nvoid btdrv_trig_playtime_stamp_en(uint8_t en);\n#endif\nvoid bt_drv_productiontest_settings_checker(void);\n\n#if (defined(SOFTBIT_EN))\nvoid btdrv_softbit_config(uint16_t connhdl, uint8_t type1,uint8_t type2,uint8_t type3, uint8_t num);\n#endif\n\n\n#ifdef __IBRT_IBRT_TESTMODE__\nvoid btdrv_enable_ibrt_test(void);\nvoid btdrv_connect_ibrt_device(uint8_t *addr);\n#endif\nvoid bt_drv_select_agc_mode(enum BT_WORK_MODE_T mode);\n\nbool bt_drv_error_check_handler(void);\nvoid bt_drv_rssi_dump_handler(void);\n\n\n#ifdef VCO_TEST_TOOL\n//vco test callback\nbool btdrv_vco_test_bridge_intsys_callback(const unsigned char *data);\nvoid btdrv_vco_test_process(uint8_t op);\nunsigned short btdrv_get_vco_test_process_flag(void);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/bt/bt_drv_internal.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_DRV_INTERNAL_H__\n#define __BT_DRV_INTERNAL_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"stdbool.h\"\n\n#define ASSERT_ERR(cond)                             { if (!(cond)) { BT_DRV_TRACE(2,\"line is %d file is %s\", __LINE__, __FILE__); } }\n\n#define BT_DRIVER_GET_U8_REG_VAL(regAddr)       (*(uint8_t *)(uintptr_t)(regAddr))\n#define BT_DRIVER_GET_U16_REG_VAL(regAddr)      (*(uint16_t *)(uintptr_t)(regAddr))\n#define BT_DRIVER_GET_U32_REG_VAL(regAddr)      (*(uint32_t *)(uintptr_t)(regAddr))\n\n#define BT_DRIVER_PUT_U8_REG_VAL(regAddr, val)      *(uint8_t *)(uintptr_t)(regAddr) = (val)\n#define BT_DRIVER_PUT_U16_REG_VAL(regAddr, val)     *(uint16_t *)(uintptr_t)(regAddr) = (val)\n#define BT_DRIVER_PUT_U32_REG_VAL(regAddr, val)     *(uint32_t *)(uintptr_t)(regAddr) = (val)\n\ntypedef uint32_t BT_CONTROLER_TRACE_TYPE;\n#define BT_CONTROLER_TRACE_TYPE_INTERSYS                0x01\n#define BT_CONTROLER_TRACE_TYPE_CONTROLLER              0x02\n#define BT_CONTROLER_TRACE_TYPE_LMP_TRACE               0x04\n#define BT_CONTROLER_TRACE_TYPE_SPUV_HCI_BUFF           0x08\n#define BT_CONTROLER_FILTER_TRACE_TYPE_A2DP_STREAM      0x10\n#define BT_CONTROLER_TRACE_TYPE_DUMP_BUFF               0x20\n\n#define BT_SUB_SYS_TYPE     0\n#define MCU_SYS_TYPE        1\n#define BT_EM_AREA_1_TYPE   2\n#define BT_EM_AREA_2_TYPE   3\n\n#define BT_FA_INVERT_EN   1\n#define BT_FA_INVERT_DISABLE   0\n\nvoid bt_drv_set_fa_invert_enable(uint8_t en);\nuint8_t btdrv_rf_init(void);\nvoid btdrv_test_mode_rf_txpwr_init(void);\nvoid btdrv_ins_patch_init(void);\nvoid btdrv_data_patch_init(void);\nvoid btdrv_patch_en(uint8_t en);\nvoid btdrv_config_init(void);\nvoid btdrv_config_end(void);\nvoid btdrv_testmode_config_init(void);\nvoid btdrv_bt_spi_rawbuf_init(void);\nvoid btdrv_bt_spi_xtal_init(void);\nvoid btdrv_sync_config(void);\nvoid btdrv_rf_rx_gain_adjust_req(uint32_t user, bool lowgain);\n#ifdef BT_50_FUNCTION\nvoid btdrv_config_init_ble5(void);\nvoid btdrv_ins_patch_init_50(void);\nvoid btdrv_data_patch_init_50(void);\n#endif\nvoid btdrv_trace_config(BT_CONTROLER_TRACE_TYPE trace_config);\nvoid btdrv_btc_fault_dump(void);\nvoid btdrv_dump_mem(uint8_t *dump_mem_start, uint32_t dump_length, uint8_t dump_type);\nvoid ld_util_bch_create(uint8_t *lap, uint8_t *bch);\nvoid btdrv_fast_lock_config(bool fastlock_on);\nvoid btdrv_ecc_config(void);\n\nenum BT_SYNCMODE_REQ_USER_T {\n   BT_SYNCMODE_REQ_USER_BT,\n   BT_SYNCMODE_REQ_USER_BLE,\n\n   BT_SYNCMODE_REQ_USER_QTY\n};\nvoid btdrv_hw_agc_stop_mode(enum BT_SYNCMODE_REQ_USER_T user, bool hw_agc_mode);\n\n\ninline uint16_t co_read16p(void const *ptr16)\n{\n    uint16_t value = ((uint8_t *)ptr16)[0] | ((uint8_t *)ptr16)[1] << 8;\n    return value;\n}\n\ninline uint32_t co_read32p(void const *ptr32)\n{\n    uint16_t addr_l, addr_h;\n    addr_l = co_read16p((uint16_t *)ptr32);\n    addr_h = co_read16p((uint16_t *)ptr32 + 1);\n    return ((uint32_t)addr_l | (uint32_t)addr_h << 16);\n}\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/drivers/bt/bt_drv_reg_op.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_DRV_REG_OP_H__\n#define  __BT_DRV_REG_OP_H__\n\n#include \n#include \"stdint.h\"\n#include \"stdbool.h\"\n#include \"plat_types.h\"\n\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct\n{\n    int8_t rssi;\n    uint8_t rxgain;\n} rx_agc_t;\n\ntypedef struct\n{\n    uint8_t agc_idx0;\n    int8_t rssi0;\n    int8_t rssi0_max;\n    int8_t rssi0_min;\n    uint8_t agc_idx1;\n    int8_t rssi1;\n    int8_t rssi1_max;\n    int8_t rssi1_min;\n    uint8_t agc_idx2;\n    int8_t rssi2;\n    int8_t rssi2_max;\n    int8_t rssi2_min;\n    uint16_t ser;\n    uint16_t rx_data_sum;\n} __attribute__((packed)) rssi_t;\n\nstruct ld_afh_env\n{\n/// RSSI threshold for interference detection (in dBm)\n    int8_t rf_rssi_interf_thr;\n/// AFH update period (in sec)\n    uint8_t afh_update_period;\n/// Maximum duration without receiving a packet before considering a channel quality unknown  (in slots) (2 secs)\n    uint16_t afh_access_valid_to;\n/// Maximum duration without receiving a packet before reintroducing a channel to the map (in slots) (20 secs)\n    uint16_t afh_reaccess_to;\n/// Maximum counter value for channel assessment\n    int8_t afh_access_count_max;\n/// Counter threshold to consider a channel good\n    int8_t afh_access_count_thr_good;\n/// Counter threshold to consider a channel bad\n    int8_t afh_access_count_thr_bad;\n/// Minimum counter value for channel assessment\n    int8_t afh_access_count_min;\n};\n\n/// RSSI threshold for interference detection (in dBm)\n#define BT_AFH_RSSI_INTERF_THR       (-70)\n\n/// AFH update period (in sec)\n#define BT_AFH_UPDATE_PERIOD         4\n\n/// Maximum duration without receiving a packet before considering a channel quality unknown  (in slots) (2 secs)\n#define BT_AFH_ASSESS_VALID_TO       0x1900\n\n/// Maximum duration without receiving a packet before reintroducing a channel to the map (in slots) (20 secs)\n#define BT_AFH_REASSESS_TO           0x7D00\n\n/// Maximum counter value for channel assessment\n#define BT_AFH_ASSESS_COUNT_MAX      4\n/// Counter threshold to consider a channel good\n#define BT_AFH_ASSESS_COUNT_THR_GOOD 2\n/// Counter threshold to consider a channel bad\n#define BT_AFH_ASSESS_COUNT_THR_BAD  -2\n/// Minimum counter value for channel assessment\n#define BT_AFH_ASSESS_COUNT_MIN      -4\n\n#define RETX_NB_0                 0\n#define RETX_NB_1                 1\n#define RETX_NB_2                 2\n#define RETX_NEGO                 3\n#ifdef CHIP_BEST2000\n#define MIC_BUFF_ADRR_REG        (0xc0000040)\n#define RX_BUFF_ADRR        (0xc0000044)\n#elif defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || defined(CHIP_BEST2300P)\n#define MIC_BUFF_ADRR_REG        (0xc0000058)\n#define RX_BUFF_ADRR        (0xc000005c)\n#elif defined(CHIP_BEST2300A)\n#define MIC_BUFF_ADRR_REG        (0xc0000058)\n#define RX_BUFF_INFO_ADRR        (0xc000005c)\n#define RX_BUFF_ADRR        (*(volatile uint32_t *)(RX_BUFF_INFO_ADRR))\n#endif\n\n//BT acl tx silence\n#define TX_SILENCE_ON                   1\n#define TX_SILENCE_OFF                  0\n\nstruct dbg_set_ebq_test\n{\n    uint8_t ebq_testmode;\n    uint8_t ble_set_privacy_mode;\n    uint8_t ll_con_ini_bv2324;\n    uint8_t ll_con_ini_bv2021;\n    uint8_t ll_ddi_scn_bv26;\n    uint8_t ll_sec_adv_bv05;\n    uint8_t ll_sync_win_default;\n    uint8_t auth_end_notify_host_lk;\n    uint8_t ll_sec_adv_bv09;\n    uint8_t ll_sec_adv_bv17;\n    uint8_t ll_sec_adv_bv1819;\n    uint8_t LocEncKeyRefresh;\n    uint8_t publickey_check;\n    uint8_t Qos;\n    uint8_t hv1;\n    uint8_t ssr;\n    uint8_t aes_ccm_daycounter;\n    uint8_t bb_prot_flh_bv01;\n    uint8_t bb_prot_arq_bv43;\n    uint8_t pause_aes_generate_rand;\n};\n\n\nvoid bt_drv_reg_op_rssi_set(uint16_t rssi);\nvoid bt_drv_reg_op_scan_intv_set(uint32_t scan_intv);\nvoid bt_drv_reg_op_encryptchange_errcode_reset(uint16_t hci_handle);\nvoid bt_drv_reg_op_sco_sniffer_checker(void);\nvoid bt_drv_reg_op_trigger_time_checker(void);\nvoid bt_drv_reg_op_tws_output_power_fix_separate(uint16_t hci_handle, uint16_t pwr);\nbool bt_drv_reg_op_ld_sniffer_env_monitored_dev_state_get(void);\nvoid bt_drv_reg_op_ld_sniffer_env_monitored_dev_state_set(bool state);\nvoid bt_drv_reg_op_ld_sniffer_master_addr_set(uint8_t * addr);\nint bt_drv_reg_op_currentfreeaclbuf_get(void);\nvoid bt_drv_reg_op_save_mobile_airpath_info(uint16_t hciHandle);\nvoid bt_drv_reg_op_block_xfer_with_mobile(uint16_t hciHandle);\nvoid bt_drv_reg_op_resume_xfer_with_mobile(uint16_t hciHandle);\nvoid bt_drv_reg_op_block_fast_ack_with_mobile(void);\nvoid bt_drv_reg_op_resume_fast_ack_with_mobile(void);\nint bt_drv_reg_op_packet_type_checker(uint16_t hciHandle);\nvoid bt_drv_reg_op_max_slot_setting_checker(uint16_t hciHandle);\nvoid bt_drv_reg_op_force_task_dbg_idle(void);\nvoid bt_drv_reg_op_afh_follow_mobile_mobileidx_set(uint16_t hciHandle);\nvoid bt_drv_reg_op_afh_follow_mobile_twsidx_set(uint16_t hciHandle);\nvoid bt_drv_reg_op_sco_status_store(void);\nvoid bt_drv_reg_op_sco_status_restore(void);\nbool bt_drv_reg_op_sco_tx_buf_restore(uint8_t *trigger_test);\nvoid bt_drv_reg_op_afh_bak_reset(void);\nvoid bt_drv_reg_op_afh_bak_save(uint8_t role, uint16_t mobileHciHandle);\nvoid bt_drv_reg_op_connection_checker(void);\nvoid bt_drv_reg_op_bt_info_checker(void);\nuint8_t bt_drv_reg_op_get_controller_tx_free_buffer(void);\nuint8_t bt_drv_reg_op_get_controller_ble_tx_free_buffer(void);\nvoid bt_drv_reg_op_ble_buffer_cleanup(void);\nbool bt_drv_reg_op_get_dbg_state(void);\nvoid bt_drv_reg_op_crash_dump(void);\nvoid bt_drv_reg_op_set_tx_pwr(uint16_t connHandle, uint8_t txpwr);\nuint8_t bt_drv_reg_op_get_tx_pwr(uint16_t connHandle);\nvoid bt_drv_reg_op_fix_tx_pwr(uint16_t connHandle);\nvoid bt_drv_reg_op_lsto_hack(uint16_t hciHandle, uint16_t lsto);\nuint16_t bt_drv_reg_op_get_lsto(uint16_t hciHandle);\nvoid bt_drv_reg_op_enable_emsack_mode(uint16_t connHandle, uint8_t master, uint8_t enable);\nvoid bt_drv_reg_op_set_accessible_mode(uint8_t mode);\nvoid bt_drv_reg_op_force_sco_retrans(bool enable);\nvoid bt_drv_reg_op_enable_pcm_tx_hw_cal(void);\nvoid bt_drv_reg_op_monitor_clk(void);\nbool bt_drv_reg_op_read_rssi_in_dbm(uint16_t connHandle,rx_agc_t* rx_val);\nbool bt_drv_reg_op_read_ble_rssi_in_dbm(uint16_t connHandle,rx_agc_t* rx_val);\nvoid bt_drv_reg_op_set_swagc_mode(uint8_t mode);\nvoid bt_drv_reg_op_set_reboot_pairing_mode(uint8_t mode);\n\nvoid bt_drv_reg_op_acl_silence(uint16_t connHandle, uint8_t silence);\nvoid bt_drv_reg_op_call_monitor(uint16_t connHandle, uint8_t tws_role);\nvoid bt_drv_reg_op_lock_sniffer_sco_resync(void);\nvoid bt_drv_reg_op_unlock_sniffer_sco_resync(void);\nvoid bt_drv_reg_op_afh_set_default(void);\nvoid bt_drv_reg_op_update_sniffer_bitoffset(uint16_t mobile_conhdl,uint16_t master_conhdl);\nvoid bt_drv_reg_op_modify_bitoff_timer(uint16_t time_out);\nuint16_t em_bt_bitoff_getf(int elt_idx);\nvoid bt_drv_reg_op_ble_llm_substate_hacker(void);\nvoid bt_drv_reg_op_esco_acl_sniff_delay_cal(uint16_t hciHandle,bool enable);\nbool  bt_drv_reg_op_check_esco_acl_sniff_conflict(uint16_t hciHandle);\nvoid bt_drv_reg_op_set_tpoll(uint8_t linkid,uint16_t poll_interval);\nuint8_t  bt_drv_reg_op_get_role(uint8_t linkid);\nint8_t  bt_drv_reg_op_rssi_correction(int8_t rssi);\nvoid bt_drv_reg_set_rssi_seed(uint32_t seed);\nvoid bt_drv_reg_op_piconet_clk_offset_get(uint16_t connHandle, int32_t *clock_offset, uint16_t *bit_offset);\nvoid bt_drv_reg_op_sw_seq_filter(uint16_t connHandle);\nbool bt_drv_reg_op_check_bt_controller_state(void);\nvoid bt_drv_reg_op_dma_tc_clkcnt_get(uint32_t *btclk, uint16_t *btcnt);\n\nvoid bt_drv_reg_op_clean_flags_of_ble_and_sco(void);\nvoid bt_drv_reg_op_sco_txfifo_reset(uint16_t codec_id);\nvoid bt_drv_reg_op_ibrt_retx_att_nb_set(uint8_t retx_nb);\nvoid bt_drv_reg_op_acl_tx_type_set(uint16_t hciHandle, uint8_t slot_sel);\nvoid bt_drv_reg_op_acl_tx_type_trace(uint16_t hciHandle);\nuint8_t bt_drv_reg_op_acl_tx_type_get(uint16_t hciHandle, uint8_t* br_type, uint8_t* edr_type);\nvoid bt_drv_reg_op_lm_nb_sync_hacker(uint8_t sco_status);\n\nvoid bt_drv_reg_op_afh_env_reset(void);\nvoid bt_drv_reg_op_acl_tx_silence(uint16_t connHandle, uint8_t on);\nvoid bt_drv_reg_op_acl_tx_silence_clear(uint16_t connHandle);\n\nvoid bt_drv_reg_op_ibrt_env_reset(void);\nvoid btdrv_reg_op_set_private_tws_poll_interval(uint16_t poll_interval, uint16_t poll_interval_in_sco);\nvoid btdrv_reg_op_enable_private_tws_schedule(bool enable);\nvoid btdrv_reg_op_set_tws_link_duration(uint8_t slot_num);\nvoid bt_drv_reg_op_decrease_tx_pwr_when_reconnect(bool enable);\nvoid bt_drv_reg_op_controller_mem_log_config(void);\nvoid bt_drv_reg_op_clear_ibrt_snoop_status(void);\nuint8_t bt_drv_reg_op_linkcntl_aclltaddr_getf(uint16_t conhdl);\nuint8_t bt_drv_reg_op_sync_bt_param(uint8_t* param, uint16_t len);\nuint32_t bt_drv_reg_op_get_lc_env_ptr(uint16_t conhdl, uint8_t type);\nvoid bt_drv_reg_op_set_tws_link_id(uint8_t link_id);\nvoid bt_drv_reg_op_rx_slot_stop_lantency_checker(void);\nvoid bt_drv_reg_op_hack_max_slot(uint8_t link_id,uint8_t slot);\nvoid bt_drv_reg_op_fa_set(uint8_t en);\nbool bt_drv_reg_op_check_seq_pending_status(void);\nvoid bt_drv_reg_op_clear_seq_pending_status(void);\nvoid bt_dev_clear_verison_receive_flag(uint8_t linkid);\nvoid bt_drv_reg_op_fastack_status_checker(uint16_t conhdl);\nvoid bt_drv_reg_op_set_link_policy(uint8_t linkid, uint8_t policy);\nuint8_t bt_drv_reg_op_lmp_sco_hdl_get(uint16_t sco_handle);\nbool bt_drv_reg_op_lmp_sco_hdl_set(uint16_t sco_handle, uint8_t lmp_hdl);\nvoid bt_drv_reg_op_controller_state_checker(void);\nvoid bt_drv_reg_op_controller_ble_flow_checker(void);\nvoid bt_drv_reg_op_force_set_lc_state(uint16_t conhdl, uint8_t state);\nuint8_t bt_drv_reg_op_force_get_lc_state(uint16_t conhdl);\nvoid bt_drv_digital_config_for_ble_adv(bool en);\nvoid bt_drv_reg_op_fa_gain_direct_set(uint8_t gain_idx);\nuint8_t bt_drv_reg_op_fa_gain_direct_get(void);\nvoid bt_drv_reg_op_dgb_link_gain_ctrl_set(uint16_t connHandle, uint8_t bt_ble_mode, uint8_t gain_idx, uint8_t enable);\nvoid bt_drv_reg_op_dgb_link_gain_ctrl_clear(uint16_t connHandle, uint8_t bt_ble_mode);\nvoid bt_drv_reg_op_dgb_link_gain_ctrl_init(void);\nvoid bt_drv_reg_op_rx_gain_fix(uint16_t connHandle, uint8_t bt_ble_mode, uint8_t gain_idx, uint8_t enable, uint8_t table_idx);\nvoid bt_drv_reg_op_afh_follow_en(bool enable, uint8_t be_followed_link_id, uint8_t follow_link_id);\n/// Index for DM1 packet type (used in both BR and EDR)\n#define DM1_IDX         0\n/// Enhanced Data Rate packet types indexes (classified by packet size)\n#define DH1_2_IDX       1\n#define DH1_3_IDX       2\n#define DH3_2_IDX       3\n#define DH3_3_IDX       4\n#define DH5_2_IDX       5\n#define DH5_3_IDX       6\n\n#define USE_1_SLOT_PACKET       0x02\n#define USE_3_SLOT_PACKET       0x04\n#define USE_5_SLOT_PACKET       0x06\n\n///Sniffer sco status\n#define SNIFFER_SCO_STOP                  0\n#define SNIFFER_SCO_START                 1\n#define SNIFFER_SCO_RESTART               2\n#define SNIFFER_SCO_RESUME_AFTER_TO       3\n#define SNIFFER_ACL_DISCONNECT_STOP_SCO   4\n#define SNIFFER_IBRT_START                5\n#define SNIFFER_IBRT_STOP                 6\n#define IDEL_CHECK                        0xff\n\nenum REG_OP\n{\n    READ_OP,\n    WRITE_OP,\n};\n\nenum LC_ENV_TAG\n{\n    LC_LINK_TAG,\n    LC_INFO_TAG,\n    LC_ENC_TAG,\n    LC_AFH_TAG,\n    LC_SP_TAG,\n    LC_EPR_TAG,\n    LC_EPC_TAG,\n};\n\nvoid bt_drv_reg_op_hw_sw_agc_select(uint8_t agc_mode);\nvoid bt_drv_reg_op_force_set_sniff_att(uint16_t conhdle);\nvoid bt_drv_reg_op_voice_settings_set(uint16_t voice_settings);\nvoid bt_drv_reg_op_host_buff_and_flow_ctl_set\n(uint16_t acl_pkt_len, uint16_t acl_pkt_num,uint16_t sync_pkt_len, uint16_t sync_pkt_num,bool flow_ctl_en);\n\nvoid bt_drv_reg_op_page_to_set(uint16_t page_to);\nvoid bt_drv_reg_op_btdm_address_set(uint8_t* bt_addr, uint8_t* ble_addr);\nvoid bt_drv_reg_op_evtmask_set(uint8_t ble_en);\nvoid bt_drv_reg_op_simplepair_mode_set(uint8_t en);\nvoid bt_drv_reg_op_class_of_dev_set(uint8_t* class_of_dev, uint8_t len);\nvoid bt_drv_reg_op_sleep_set(bool en);\nvoid bt_drv_reg_op_sco_fifo_reset(void);\nvoid bt_drv_reg_sco_fifo_dump(void);\nuint8_t bt_drv_reg_op_get_sync_id_op(uint8_t op, uint8_t sync_id);\nvoid bt_drv_reg_op_set_agc_thd(bool isMaster, bool isSco);\nvoid bt_drv_reg_op_global_symbols_init(void);\nvoid bt_drv_tx_pwr_init(void);\nvoid bt_drv_tx_pwr_init_for_testmode(void);\nvoid bt_drv_reg_op_set_ibrt_auto_accept_sco(bool en);\nvoid bt_drv_reg_op_update_dbg_state(void);\nvoid bt_drv_reg_op_set_ibrt_reject_sniff_req(bool en);\nuint8_t bt_drv_reg_op_get_esco_nego_airmode(uint8_t sco_link_id);\nvoid bt_drv_reg_op_hci_vender_ibrt_ll_monitor(uint8_t* ptr, uint16_t* p_sum_err,uint16_t* p_rx_total);\nuint32_t bt_drv_reg_op_get_host_ref_clk(void);\nvoid bt_drv_reg_op_set_accept_new_mobile_enable(void);\nvoid bt_drv_reg_op_clear_accept_new_mobile_enable(void);\nvoid bt_drv_reg_op_ecc_softbit_process(uint16_t* p_conn_handle1,uint16_t* p_conn_handle2, uint16_t length, uint8_t *data);\nvoid bt_drv_reg_op_ebq_test_setting(void);\nvoid bt_drv_reg_op_hw_spi_en_setf(int elt_idx, uint8_t hwspien);\nvoid bt_drv_enhance_fa_mode(bool enable);\nvoid bt_drv_reg_op_set_rand_seed(uint32_t seed);\nvoid bt_drv_reg_op_swagc_mode_set(uint8_t mode);\nvoid bt_drv_reg_op_set_max_pwr_rcv(uint16_t connHandle);\nvoid bt_drv_reg_op_key_gen_after_reset(bool enable);\nuint8_t bt_drv_reg_op_bt_sync_swagc_en_get(void);\nvoid bt_drv_reg_op_ble_sup_timeout_set(uint16_t ble_conhdl, uint16_t sup_to);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/drivers/btpcm/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n"
  },
  {
    "path": "platform/drivers/btpcm/btpcm.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n//#include \"hwtest.h\"\n//#include \"hal_intersys.h\"\n//#include \"hal_spi.h\"\n//#include \"hal_cmu.h\"\n//#include \"hal_sleep.h\"\n#include \"hal_btpcm.h\"\n#include \"hal_dma.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n\n#if 0\n#define AUDIO_BUFFER_SIZE 2048\n\nstruct HAL_BTPCM_CONFIG_T btpcm_cfg;\nstruct HAL_DMA_CH_CFG_T dma_cfg;\nstruct HAL_DMA_DESC_T play_desc;\nstruct HAL_DMA_DESC_T record_desc;\nuint32_t play_buffer[AUDIO_BUFFER_SIZE / 4];\nuint32_t record_buffer[AUDIO_BUFFER_SIZE / 4];\n\n//pcm:rx-->codec:spk\nstatic void btpcm2codec(void)\n{\n    memset(&dma_cfg, 0, sizeof(dma_cfg));\n    dma_cfg.ch = hal_audma_get_chan(HAL_DMA_HIGH_PRIO);\n    dma_cfg.src_periph = (enum HAL_DMA_PERIPH_T)0;\n    dma_cfg.handler = NULL;\n    dma_cfg.dst_periph = HAL_AUDMA_BTPCM_TX;\n    dma_cfg.type = HAL_DMA_FLOW_M2P_DMA;\n\n    dma_cfg.dst_bsize = HAL_DMA_BSIZE_4;\n    dma_cfg.src_bsize = HAL_DMA_BSIZE_4;\n    dma_cfg.dst_width = HAL_DMA_WIDTH_HALFWORD;\n    dma_cfg.src_width = HAL_DMA_WIDTH_HALFWORD;\n    dma_cfg.src_tsize = AUDIO_BUFFER_SIZE/2; /* cause of half word width */\n    dma_cfg.try_burst = 1;\n\n    dma_cfg.src = (uint32_t)play_buffer;\n    hal_audma_init_desc(&play_desc, &dma_cfg, &play_desc, 0);\n    hal_audma_sg_start(&play_desc, &dma_cfg);\n\n    dma_cfg.ch = hal_audma_get_chan(HAL_DMA_HIGH_PRIO);\n    dma_cfg.dst_periph = (enum HAL_DMA_PERIPH_T)0;\n    dma_cfg.handler = NULL;\n    dma_cfg.src_periph = HAL_AUDMA_BTPCM_RX;\n    dma_cfg.type = HAL_DMA_FLOW_P2M_DMA;\n\n    dma_cfg.dst = (uint32_t)record_buffer;\n    hal_audma_init_desc(&record_desc, &dma_cfg, &record_desc, 0);\n    hal_audma_sg_start(&record_desc, &dma_cfg);\n\n    hal_btpcm_open(HAL_BTPCM_ID_0, AUD_STREAM_PLAYBACK);\n    hal_btpcm_open(HAL_BTPCM_ID_0, AUD_STREAM_CAPTURE);\n    memset(&btpcm_cfg, 0, sizeof(btpcm_cfg));\n    btpcm_cfg.use_dma = 1;\n    hal_btpcm_setup_stream(HAL_BTPCM_ID_0, AUD_STREAM_PLAYBACK, &btpcm_cfg);\n    hal_btpcm_setup_stream(HAL_BTPCM_ID_0, AUD_STREAM_CAPTURE, &btpcm_cfg);\n    hal_btpcm_start_stream(HAL_BTPCM_ID_0, AUD_STREAM_PLAYBACK);\n    hal_btpcm_start_stream(HAL_BTPCM_ID_0, AUD_STREAM_CAPTURE);\n}\n\n//codec:mic-->pcm:tx\nstatic void codec2btpcm(void)\n{\n    memset(&dma_cfg, 0, sizeof(dma_cfg));\n    dma_cfg.ch = hal_audma_get_chan(HAL_DMA_HIGH_PRIO);\n    dma_cfg.src_periph = (enum HAL_DMA_PERIPH_T)0;\n    dma_cfg.handler = NULL;\n    dma_cfg.dst_periph = HAL_AUDMA_BTPCM_TX;\n    dma_cfg.type = HAL_DMA_FLOW_M2P_DMA;\n\n    dma_cfg.dst_bsize = HAL_DMA_BSIZE_4;\n    dma_cfg.src_bsize = HAL_DMA_BSIZE_4;\n    dma_cfg.dst_width = HAL_DMA_WIDTH_HALFWORD;\n    dma_cfg.src_width = HAL_DMA_WIDTH_HALFWORD;\n    dma_cfg.src_tsize = AUDIO_BUFFER_SIZE/2; /* cause of half word width */\n    dma_cfg.try_burst = 1;\n\n    dma_cfg.src = (uint32_t)play_buffer;\n    hal_audma_init_desc(&play_desc, &dma_cfg, &play_desc, 0);\n    hal_audma_sg_start(&play_desc, &dma_cfg);\n\n    dma_cfg.ch = hal_audma_get_chan(HAL_DMA_HIGH_PRIO);\n    dma_cfg.dst_periph = (enum HAL_DMA_PERIPH_T)0;\n    dma_cfg.handler = NULL;\n    dma_cfg.src_periph = HAL_AUDMA_BTPCM_RX;\n    dma_cfg.type = HAL_DMA_FLOW_P2M_DMA;\n\n    dma_cfg.dst = (uint32_t)record_buffer;\n    hal_audma_init_desc(&record_desc, &dma_cfg, &record_desc, 0);\n    hal_audma_sg_start(&record_desc, &dma_cfg);\n\n    hal_btpcm_open(HAL_BTPCM_ID_0, AUD_STREAM_PLAYBACK);\n    hal_btpcm_open(HAL_BTPCM_ID_0, AUD_STREAM_CAPTURE);\n    memset(&btpcm_cfg, 0, sizeof(btpcm_cfg));\n    btpcm_cfg.use_dma = 1;\n    hal_btpcm_setup_stream(HAL_BTPCM_ID_0, AUD_STREAM_PLAYBACK, &btpcm_cfg);\n    hal_btpcm_setup_stream(HAL_BTPCM_ID_0, AUD_STREAM_CAPTURE, &btpcm_cfg);\n    hal_btpcm_start_stream(HAL_BTPCM_ID_0, AUD_STREAM_PLAYBACK);\n    hal_btpcm_start_stream(HAL_BTPCM_ID_0, AUD_STREAM_CAPTURE);\n}\n#endif\n"
  },
  {
    "path": "platform/drivers/btpcm/btpcm.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BTPCM_H__\n#define __BTPCM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif//__FMDEC_H__\n"
  },
  {
    "path": "platform/drivers/codec/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\nobj-y += $(CHIP)/\n\nsubdir-ccflags-y += -Iplatform/drivers/codec\n\nexport CODEC_INT_CFG_FLAGS :=\n\nCODEC_INT_CFG_FLAGS += -Iplatform/drivers/ana\n\nifeq ($(AUDIO_CODEC_ASYNC_CLOSE),1)\nCODEC_INT_CFG_FLAGS += -D__CODEC_ASYNC_CLOSE__\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\nCODEC_INT_CFG_FLAGS += -D__AUDIO_RESAMPLE__\nendif\n\nifeq ($(ANC_L_R_MISALIGN_WORKAROUND),1)\nCODEC_INT_CFG_FLAGS += -DANC_L_R_MISALIGN_WORKAROUND\nendif\n\nifeq ($(AUDIO_OUTPUT_DC_CALIB),1)\nCODEC_INT_CFG_FLAGS += -DAUDIO_OUTPUT_DC_CALIB\nendif\n\nifeq ($(CODEC_ANC_BOOST),1)\nCODEC_INT_CFG_FLAGS += -DCODEC_ANC_BOOST\nendif\n\n"
  },
  {
    "path": "platform/drivers/codec/best2300p/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\nCFLAGS_codec_$(CHIP).o += $(CODEC_INT_CFG_FLAGS)\n\n"
  },
  {
    "path": "platform/drivers/codec/best2300p/codec_best2300p.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"codec_int.h\"\n#include \"hal_codec.h\"\n#include \"hal_sleep.h\"\n#include \"hal_trace.h\"\n#include \"plat_types.h\"\n#include \"stdbool.h\"\n#include \"tgt_hardware.h\"\n\n#define CODEC_TRACE(n, s, ...) TRACE(n, s, ##__VA_ARGS__)\n\n#define CODEC_INT_INST HAL_CODEC_ID_0\n\n#ifndef CODEC_OUTPUT_DEV\n#define CODEC_OUTPUT_DEV CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV\n#endif\n\n#ifdef __CODEC_ASYNC_CLOSE__\n#include \"cmsis_os.h\"\n\n#define CODEC_ASYNC_CLOSE_DELAY (5000)\n\nstatic void codec_timehandler(void const *param);\n\nosTimerDef(CODEC_TIMER, codec_timehandler);\nstatic osTimerId codec_timer;\nstatic CODEC_CLOSE_HANDLER close_hdlr;\n\nenum CODEC_HW_STATE_T {\n  CODEC_HW_STATE_CLOSED,\n  CODEC_HW_STATE_CLOSE_PENDING,\n  CODEC_HW_STATE_OPENED,\n};\n\nenum CODEC_HW_STATE_T codec_hw_state = CODEC_HW_STATE_CLOSED;\n#endif\n\nenum CODEC_USER_T {\n  CODEC_USER_STREAM = (1 << 0),\n  CODEC_USER_ANC = (1 << 1),\n  CODEC_USER_VAD = (1 << 2),\n};\n\nstruct CODEC_CONFIG_T {\n  enum CODEC_USER_T user_map;\n  bool resample_en;\n  bool mute_state[AUD_STREAM_NUM];\n  bool chan_vol_set[AUD_STREAM_NUM];\n  struct STREAM_CONFIG_T {\n    bool opened;\n    bool started;\n    struct HAL_CODEC_CONFIG_T codec_cfg;\n  } stream_cfg[AUD_STREAM_NUM];\n};\n\nstatic struct CODEC_CONFIG_T codec_int_cfg = {\n    .user_map = 0,\n    .resample_en = false,\n    .mute_state =\n        {\n            false,\n            false,\n        },\n    .chan_vol_set =\n        {\n            false,\n            false,\n        },\n    // playback\n    .stream_cfg[AUD_STREAM_PLAYBACK] = {.opened = false,\n                                        .started = false,\n                                        .codec_cfg =\n                                            {\n                                                .sample_rate =\n                                                    AUD_SAMPRATE_NULL,\n                                            }},\n    // capture\n    .stream_cfg[AUD_STREAM_CAPTURE] = {.opened = false,\n                                       .started = false,\n                                       .codec_cfg = {\n                                           .sample_rate = AUD_SAMPRATE_NULL,\n                                       }}};\n\nstatic bool anc_ff_enabled;\nstatic bool anc_fb_enabled;\nstatic enum AUD_SAMPRATE_T codec_anc_samp_rate;\nstatic CODEC_ANC_HANDLER codec_anc_handler;\n\n#ifdef VOICE_DETECTOR_EN\nstatic enum AUD_VAD_TYPE_T vad_type;\n#endif\n\n#ifdef CODEC_ANC_BOOST\nstatic CODEC_ANC_BOOST_DELAY_FUNC boost_delay;\n\nvoid codec_set_anc_boost_delay_func(CODEC_ANC_BOOST_DELAY_FUNC delay_func) {\n  boost_delay = delay_func;\n}\n#endif\n\nuint32_t codec_int_stream_open(enum AUD_STREAM_T stream) {\n  CODEC_TRACE(2, \"%s: stream=%d\", __func__, stream);\n  codec_int_cfg.stream_cfg[stream].opened = true;\n  return 0;\n}\n\nuint32_t codec_int_stream_setup(enum AUD_STREAM_T stream,\n                                struct HAL_CODEC_CONFIG_T *cfg) {\n  enum AUD_CHANNEL_MAP_T ch_map;\n\n  CODEC_TRACE(2, \"%s: stream=%d\", __func__, stream);\n\n  if (codec_int_cfg.stream_cfg[stream].codec_cfg.sample_rate ==\n      AUD_SAMPRATE_NULL) {\n    // Codec uninitialized -- all config items should be set\n    codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag = HAL_CODEC_CONFIG_ALL;\n  } else {\n    // Codec initialized before -- only different config items need to be set\n    codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag = HAL_CODEC_CONFIG_NULL;\n  }\n\n  // Always config sample rate, for the pll setting might have been changed by\n  // the other stream\n  CODEC_TRACE(2, \"[sample_rate]old=%d new=%d\",\n              codec_int_cfg.stream_cfg[stream].codec_cfg.sample_rate,\n              cfg->sample_rate);\n  if (codec_int_cfg.user_map & CODEC_USER_ANC) {\n    // Check ANC sample rate\n    if (codec_anc_handler) {\n      enum AUD_SAMPRATE_T cfg_rate;\n      enum AUD_SAMPRATE_T old_rate;\n\n      cfg_rate = hal_codec_anc_convert_rate(cfg->sample_rate);\n      if (cfg_rate != codec_anc_samp_rate) {\n        old_rate = codec_anc_samp_rate;\n\n        codec_anc_handler(stream, cfg_rate, NULL, NULL);\n\n        codec_anc_samp_rate = cfg_rate;\n        TRACE(5,\n              \"%s: ANC sample rate changes from %u to %u due to stream=%d \"\n              \"samp_rate=%u\",\n              __func__, old_rate, codec_anc_samp_rate, stream,\n              cfg->sample_rate);\n      }\n    }\n  }\n  codec_int_cfg.stream_cfg[stream].codec_cfg.sample_rate = cfg->sample_rate;\n  codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag |=\n      HAL_CODEC_CONFIG_SAMPLE_RATE;\n\n  if (codec_int_cfg.stream_cfg[stream].codec_cfg.bits != cfg->bits) {\n    CODEC_TRACE(2, \"[bits]old=%d new=%d\",\n                codec_int_cfg.stream_cfg[stream].codec_cfg.bits, cfg->bits);\n    codec_int_cfg.stream_cfg[stream].codec_cfg.bits = cfg->bits;\n    codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag |=\n        HAL_CODEC_CONFIG_BITS;\n  }\n\n  if (codec_int_cfg.stream_cfg[stream].codec_cfg.channel_num !=\n      cfg->channel_num) {\n    CODEC_TRACE(2, \"[channel_num]old=%d new=%d\",\n                codec_int_cfg.stream_cfg[stream].codec_cfg.channel_num,\n                cfg->channel_num);\n    codec_int_cfg.stream_cfg[stream].codec_cfg.channel_num = cfg->channel_num;\n    codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag |=\n        HAL_CODEC_CONFIG_CHANNEL_NUM;\n  }\n\n  ch_map = cfg->channel_map;\n  if (ch_map == 0) {\n    if (stream == AUD_STREAM_PLAYBACK) {\n      ch_map = (enum AUD_CHANNEL_MAP_T)CODEC_OUTPUT_DEV;\n    } else {\n      ch_map =\n          (enum AUD_CHANNEL_MAP_T)hal_codec_get_input_path_cfg(cfg->io_path);\n    }\n    ch_map &= AUD_CHANNEL_MAP_ALL;\n  }\n\n  if (codec_int_cfg.stream_cfg[stream].codec_cfg.channel_map != ch_map) {\n    CODEC_TRACE(2, \"[channel_map]old=0x%x new=0x%x\",\n                codec_int_cfg.stream_cfg[stream].codec_cfg.channel_map, ch_map);\n    codec_int_cfg.stream_cfg[stream].codec_cfg.channel_map = ch_map;\n    codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag |=\n        HAL_CODEC_CONFIG_CHANNEL_MAP | HAL_CODEC_CONFIG_VOL |\n        HAL_CODEC_CONFIG_BITS;\n  }\n\n  if (codec_int_cfg.stream_cfg[stream].codec_cfg.use_dma != cfg->use_dma) {\n    CODEC_TRACE(2, \"[use_dma]old=%d new=%d\",\n                codec_int_cfg.stream_cfg[stream].codec_cfg.use_dma,\n                cfg->use_dma);\n    codec_int_cfg.stream_cfg[stream].codec_cfg.use_dma = cfg->use_dma;\n  }\n\n  if (codec_int_cfg.stream_cfg[stream].codec_cfg.vol != cfg->vol) {\n    CODEC_TRACE(3, \"[vol]old=%d new=%d chan_vol_set=%d\",\n                codec_int_cfg.stream_cfg[stream].codec_cfg.vol, cfg->vol,\n                codec_int_cfg.chan_vol_set[stream]);\n    codec_int_cfg.stream_cfg[stream].codec_cfg.vol = cfg->vol;\n    if (!codec_int_cfg.chan_vol_set[stream]) {\n      codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag |=\n          HAL_CODEC_CONFIG_VOL;\n    }\n  }\n\n  if (codec_int_cfg.stream_cfg[stream].codec_cfg.io_path != cfg->io_path) {\n    CODEC_TRACE(2, \"[io_path]old=%d new=%d\",\n                codec_int_cfg.stream_cfg[stream].codec_cfg.io_path,\n                cfg->io_path);\n    codec_int_cfg.stream_cfg[stream].codec_cfg.io_path = cfg->io_path;\n  }\n\n  CODEC_TRACE(3, \"[%s]stream=%d set_flag=0x%x\", __func__, stream,\n              codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag);\n  hal_codec_setup_stream(CODEC_INT_INST, stream,\n                         &(codec_int_cfg.stream_cfg[stream].codec_cfg));\n\n  return 0;\n}\n\nvoid codec_int_stream_mute(enum AUD_STREAM_T stream, bool mute) {\n  bool anc_on;\n\n  CODEC_TRACE(3, \"%s: stream=%d mute=%d\", __func__, stream, mute);\n\n  if (mute == codec_int_cfg.mute_state[stream]) {\n    CODEC_TRACE(2, \"[%s] Codec already in mute status: %d\", __func__, mute);\n    return;\n  }\n\n  anc_on = !!(codec_int_cfg.user_map & CODEC_USER_ANC);\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    if (mute) {\n      if (!anc_on) {\n        analog_aud_codec_mute();\n      }\n      hal_codec_dac_mute(true);\n    } else {\n      hal_codec_dac_mute(false);\n      if (!anc_on) {\n        analog_aud_codec_nomute();\n      }\n    }\n  } else {\n    hal_codec_adc_mute(mute);\n  }\n\n  codec_int_cfg.mute_state[stream] = mute;\n}\n\nvoid codec_int_stream_set_chan_vol(enum AUD_STREAM_T stream,\n                                   enum AUD_CHANNEL_MAP_T ch_map, uint8_t vol) {\n  CODEC_TRACE(4, \"%s: stream=%d ch_map=0x%X vol=%u\", __func__, stream, ch_map,\n              vol);\n\n  codec_int_cfg.chan_vol_set[stream] = true;\n  hal_codec_set_chan_vol(stream, ch_map, vol);\n}\n\nvoid codec_int_stream_restore_chan_vol(enum AUD_STREAM_T stream) {\n  CODEC_TRACE(2, \"%s: stream=%d\", __func__, stream);\n\n  if (codec_int_cfg.chan_vol_set[stream]) {\n    codec_int_cfg.chan_vol_set[stream] = false;\n    // Restore normal volume\n    codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag = HAL_CODEC_CONFIG_VOL;\n    hal_codec_setup_stream(CODEC_INT_INST, stream,\n                           &(codec_int_cfg.stream_cfg[stream].codec_cfg));\n  }\n}\n\nstatic void codec_hw_start(enum AUD_STREAM_T stream) {\n  CODEC_TRACE(2, \"%s: stream=%d\", __func__, stream);\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    // Enable DAC before starting stream (specifically before enabling PA)\n    analog_aud_codec_dac_enable(true);\n  }\n\n  hal_codec_start_stream(CODEC_INT_INST, stream);\n}\n\nstatic void codec_hw_stop(enum AUD_STREAM_T stream) {\n  CODEC_TRACE(2, \"%s: stream=%d\", __func__, stream);\n\n  hal_codec_stop_stream(CODEC_INT_INST, stream);\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    // Disable DAC after stopping stream (specifically after disabling PA)\n    analog_aud_codec_dac_enable(false);\n  }\n}\n\nuint32_t codec_int_stream_start(enum AUD_STREAM_T stream) {\n  CODEC_TRACE(2, \"%s: stream=%d\", __func__, stream);\n\n  codec_int_cfg.stream_cfg[stream].started = true;\n\n  if (stream == AUD_STREAM_CAPTURE) {\n    analog_aud_codec_adc_enable(\n        codec_int_cfg.stream_cfg[stream].codec_cfg.io_path,\n        codec_int_cfg.stream_cfg[stream].codec_cfg.channel_map, true);\n  }\n\n  hal_codec_start_interface(CODEC_INT_INST, stream,\n                            codec_int_cfg.stream_cfg[stream].codec_cfg.use_dma);\n\n  if ((codec_int_cfg.user_map & CODEC_USER_ANC) == 0) {\n    codec_hw_start(stream);\n  }\n\n  return 0;\n}\n\nuint32_t codec_int_stream_stop(enum AUD_STREAM_T stream) {\n  CODEC_TRACE(2, \"%s: stream=%d\", __func__, stream);\n\n  hal_codec_stop_interface(CODEC_INT_INST, stream);\n\n  if ((codec_int_cfg.user_map & CODEC_USER_ANC) == 0) {\n    codec_hw_stop(stream);\n  }\n\n  if (stream == AUD_STREAM_CAPTURE) {\n    analog_aud_codec_adc_enable(\n        codec_int_cfg.stream_cfg[stream].codec_cfg.io_path,\n        codec_int_cfg.stream_cfg[stream].codec_cfg.channel_map, false);\n  }\n\n  codec_int_cfg.stream_cfg[stream].started = false;\n\n  return 0;\n}\n\nuint32_t codec_int_stream_close(enum AUD_STREAM_T stream) {\n  // close all stream\n  CODEC_TRACE(2, \"%s: stream=%d\", __func__, stream);\n  if (codec_int_cfg.stream_cfg[stream].started) {\n    codec_int_stream_stop(stream);\n  }\n  codec_int_stream_restore_chan_vol(stream);\n  codec_int_cfg.stream_cfg[stream].opened = false;\n  return 0;\n}\n\nstatic void codec_hw_open(enum CODEC_USER_T user) {\n  enum CODEC_USER_T old_map;\n#ifdef __AUDIO_RESAMPLE__\n  bool resample_en = !!hal_cmu_get_audio_resample_status();\n#endif\n\n  old_map = codec_int_cfg.user_map;\n  codec_int_cfg.user_map |= user;\n\n  if (old_map) {\n#ifdef __AUDIO_RESAMPLE__\n    ASSERT(codec_int_cfg.resample_en == resample_en,\n           \"%s: Bad resamp status %d for user 0x%X (old_map=0x%X)\", __func__,\n           resample_en, user, old_map);\n#endif\n    return;\n  }\n\n#ifdef __AUDIO_RESAMPLE__\n  codec_int_cfg.resample_en = resample_en;\n#endif\n\n  CODEC_TRACE(1, \"%s\", __func__);\n\n#ifdef __CODEC_ASYNC_CLOSE__\n  if (codec_timer == NULL) {\n    codec_timer = osTimerCreate(osTimer(CODEC_TIMER), osTimerOnce, NULL);\n  }\n  osTimerStop(codec_timer);\n#endif\n\n  // Audio resample: Might have different clock source, so must be reconfigured\n  // here\n  hal_codec_open(CODEC_INT_INST);\n\n#ifdef __CODEC_ASYNC_CLOSE__\n  CODEC_TRACE(2, \"%s: codec_hw_state=%d\", __func__, codec_hw_state);\n\n  if (codec_hw_state == CODEC_HW_STATE_CLOSED) {\n    codec_hw_state = CODEC_HW_STATE_OPENED;\n    // Continue to open the codec hardware\n  } else if (codec_hw_state == CODEC_HW_STATE_CLOSE_PENDING) {\n    // Still opened\n    codec_hw_state = CODEC_HW_STATE_OPENED;\n    return;\n  } else {\n    // Already opened\n    return;\n  }\n#endif\n\n  analog_aud_codec_open();\n}\n\nstatic void codec_hw_close(enum CODEC_CLOSE_TYPE_T type,\n                           enum CODEC_USER_T user) {\n  codec_int_cfg.user_map &= ~user;\n\n  if (type == CODEC_CLOSE_NORMAL) {\n    if (codec_int_cfg.user_map) {\n      return;\n    }\n  }\n\n#ifdef __CODEC_ASYNC_CLOSE__\n  CODEC_TRACE(3, \"%s: type=%d codec_hw_state=%d\", __func__, type,\n              codec_hw_state);\n#else\n  CODEC_TRACE(2, \"%s: type=%d\", __func__, type);\n#endif\n\n  if (type == CODEC_CLOSE_NORMAL) {\n    // Audio resample: Might have different clock source, so close now and\n    // reconfigure when open\n    hal_codec_close(CODEC_INT_INST);\n#ifdef CODEC_POWER_DOWN\n    memset(&codec_int_cfg, 0, sizeof(codec_int_cfg));\n#endif\n#ifdef __CODEC_ASYNC_CLOSE__\n    ASSERT(codec_hw_state == CODEC_HW_STATE_OPENED,\n           \"%s: (type=%d) Bad codec_hw_state=%d\", __func__, type,\n           codec_hw_state);\n    // Start a timer to close the codec hardware\n    codec_hw_state = CODEC_HW_STATE_CLOSE_PENDING;\n    osTimerStop(codec_timer);\n    osTimerStart(codec_timer, CODEC_ASYNC_CLOSE_DELAY);\n    return;\n  } else if (type == CODEC_CLOSE_ASYNC_REAL) {\n    if (codec_hw_state != CODEC_HW_STATE_CLOSE_PENDING) {\n      // Already closed or reopened\n      return;\n    }\n    codec_hw_state = CODEC_HW_STATE_CLOSED;\n#endif\n  } else if (type == CODEC_CLOSE_FORCED) {\n    hal_codec_crash_mute();\n  }\n\n  analog_aud_codec_close();\n}\n\nuint32_t codec_int_open(void) {\n  CODEC_TRACE(2, \"%s: user_map=0x%X\", __func__, codec_int_cfg.user_map);\n\n  codec_hw_open(CODEC_USER_STREAM);\n\n  return 0;\n}\n\nuint32_t codec_int_close(enum CODEC_CLOSE_TYPE_T type) {\n  CODEC_TRACE(3, \"%s: type=%d user_map=0x%X\", __func__, type,\n              codec_int_cfg.user_map);\n\n  if (type == CODEC_CLOSE_NORMAL) {\n    if (codec_int_cfg.stream_cfg[AUD_STREAM_PLAYBACK].opened == false &&\n        codec_int_cfg.stream_cfg[AUD_STREAM_CAPTURE].opened == false) {\n      codec_hw_close(type, CODEC_USER_STREAM);\n    }\n  } else {\n    codec_hw_close(type, CODEC_USER_STREAM);\n  }\n\n  return 0;\n}\n\n#ifdef __CODEC_ASYNC_CLOSE__\nvoid codec_int_set_close_handler(CODEC_CLOSE_HANDLER hdlr) {\n  close_hdlr = hdlr;\n}\n\nstatic void codec_timehandler(void const *param) {\n  if (close_hdlr) {\n    close_hdlr();\n  }\n}\n#endif\n\nint codec_anc_open(enum ANC_TYPE_T type, enum AUD_SAMPRATE_T dac_rate,\n                   enum AUD_SAMPRATE_T adc_rate, CODEC_ANC_HANDLER hdlr) {\n  bool anc_running = false;\n\n  CODEC_TRACE(4, \"%s: type=%d dac_rate=%d adc_rate=%d\", __func__, type,\n              dac_rate, adc_rate);\n\n  dac_rate = hal_codec_anc_convert_rate(dac_rate);\n  adc_rate = hal_codec_anc_convert_rate(adc_rate);\n  ASSERT(dac_rate == adc_rate, \"%s: Unmatched rates: dac_rate=%u adc_rate=%u\",\n         __func__, dac_rate, adc_rate);\n\n  if (hdlr && (codec_int_cfg.user_map & CODEC_USER_STREAM)) {\n    enum AUD_SAMPRATE_T cfg_dac_rate, cfg_adc_rate;\n\n    if (codec_int_cfg.stream_cfg[AUD_STREAM_PLAYBACK].opened) {\n      cfg_dac_rate = hal_codec_anc_convert_rate(\n          codec_int_cfg.stream_cfg[AUD_STREAM_PLAYBACK].codec_cfg.sample_rate);\n    } else {\n      cfg_dac_rate = dac_rate;\n    }\n    if (codec_int_cfg.stream_cfg[AUD_STREAM_CAPTURE].opened) {\n      cfg_adc_rate = hal_codec_anc_convert_rate(\n          codec_int_cfg.stream_cfg[AUD_STREAM_CAPTURE].codec_cfg.sample_rate);\n    } else {\n      cfg_adc_rate = adc_rate;\n    }\n    if (codec_int_cfg.stream_cfg[AUD_STREAM_PLAYBACK].opened &&\n        codec_int_cfg.stream_cfg[AUD_STREAM_CAPTURE].opened) {\n      ASSERT(cfg_dac_rate == cfg_adc_rate,\n             \"%s: Unmatched cfg rates: dac_rate=%u adc_rate=%u\", __func__,\n             cfg_dac_rate, cfg_adc_rate);\n    } else if (codec_int_cfg.stream_cfg[AUD_STREAM_CAPTURE].opened) {\n      cfg_dac_rate = cfg_adc_rate;\n    }\n    if (dac_rate != cfg_dac_rate) {\n      hdlr(AUD_STREAM_PLAYBACK, cfg_dac_rate, NULL, NULL);\n      TRACE(3, \"%s: ANC sample rate changes from %u to %u\", __func__, dac_rate,\n            cfg_dac_rate);\n      dac_rate = cfg_dac_rate;\n    }\n  }\n\n  codec_anc_samp_rate = dac_rate;\n  codec_anc_handler = hdlr;\n\n  if (anc_ff_enabled || anc_fb_enabled) {\n    anc_running = true;\n  }\n\n  if (type == ANC_FEEDFORWARD) {\n    anc_ff_enabled = true;\n  } else if (type == ANC_FEEDBACK) {\n    anc_fb_enabled = true;\n  }\n\n  if (!anc_running) {\n    hal_chip_wake_lock(HAL_CHIP_WAKE_LOCK_USER_ANC);\n\n    hal_cmu_anc_enable(HAL_CMU_ANC_CLK_USER_ANC);\n\n    enum AUD_STREAM_T stream;\n    enum AUD_CHANNEL_NUM_T play_chan_num;\n\n    codec_hw_open(CODEC_USER_ANC);\n\n    if (CODEC_OUTPUT_DEV == (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)) {\n      play_chan_num = AUD_CHANNEL_NUM_2;\n    } else {\n      play_chan_num = AUD_CHANNEL_NUM_1;\n    }\n\n    for (stream = AUD_STREAM_PLAYBACK; stream <= AUD_STREAM_CAPTURE; stream++) {\n      if (codec_int_cfg.stream_cfg[stream].opened) {\n        if (stream == AUD_STREAM_PLAYBACK) {\n          /*    ASSERT(codec_int_cfg.stream_cfg[stream].codec_cfg.channel_num ==\n             play_chan_num, \"Invalid existing ANC channel num %d != %d for\n             stream %d\", codec_int_cfg.stream_cfg[stream].codec_cfg.channel_num,\n                  play_chan_num,\n                  stream);*/\n        }\n      } else {\n        codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag = 0;\n        codec_int_cfg.stream_cfg[stream].codec_cfg.sample_rate =\n            codec_anc_samp_rate;\n        codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag |=\n            HAL_CODEC_CONFIG_SAMPLE_RATE;\n        if (stream == AUD_STREAM_PLAYBACK) {\n          codec_int_cfg.stream_cfg[stream].codec_cfg.vol = TGT_VOLUME_LEVEL_10;\n        } else {\n          codec_int_cfg.stream_cfg[stream].codec_cfg.vol = CODEC_SADC_VOL;\n        }\n        codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag |=\n            HAL_CODEC_CONFIG_VOL;\n        if (stream == AUD_STREAM_PLAYBACK) {\n          codec_int_cfg.stream_cfg[stream].codec_cfg.channel_num =\n              play_chan_num;\n          codec_int_cfg.stream_cfg[stream].codec_cfg.channel_map =\n              CODEC_OUTPUT_DEV;\n        } else {\n          codec_int_cfg.stream_cfg[stream].codec_cfg.channel_num = 0;\n          codec_int_cfg.stream_cfg[stream].codec_cfg.channel_map = 0;\n        }\n        codec_int_cfg.stream_cfg[stream].codec_cfg.set_flag |=\n            HAL_CODEC_CONFIG_CHANNEL_NUM;\n\n        hal_codec_setup_stream(CODEC_INT_INST, stream,\n                               &(codec_int_cfg.stream_cfg[stream].codec_cfg));\n      }\n    }\n\n    // Start play first, then start capture last\n    for (stream = AUD_STREAM_PLAYBACK; stream <= AUD_STREAM_CAPTURE; stream++) {\n      if (!codec_int_cfg.stream_cfg[stream].started) {\n        codec_hw_start(stream);\n      }\n    }\n  }\n\n  hal_codec_anc_adc_enable(type);\n\n  analog_aud_codec_anc_enable(type, true);\n\n  if (!anc_running) {\n    // Enable pa if dac muted before\n    if (codec_int_cfg.mute_state[AUD_STREAM_PLAYBACK]) {\n      analog_aud_codec_nomute();\n    }\n\n#ifdef CODEC_ANC_BOOST\n    analog_aud_codec_anc_boost(true, (ANALOG_ANC_BOOST_DELAY_FUNC)boost_delay);\n#endif\n  }\n\n  return 0;\n}\n\nint codec_anc_close(enum ANC_TYPE_T type) {\n  CODEC_TRACE(2, \"%s: type=%d\", __func__, type);\n\n  if (type == ANC_FEEDFORWARD) {\n    anc_ff_enabled = false;\n  } else if (type == ANC_FEEDBACK) {\n    anc_fb_enabled = false;\n  }\n\n  hal_codec_anc_adc_disable(type);\n\n  analog_aud_codec_anc_enable(type, false);\n\n  if (anc_ff_enabled || anc_fb_enabled) {\n    return 0;\n  }\n\n#ifdef CODEC_ANC_BOOST\n  analog_aud_codec_anc_boost(false, (ANALOG_ANC_BOOST_DELAY_FUNC)boost_delay);\n#endif\n\n  enum AUD_STREAM_T stream;\n\n  // Stop capture first, then stop play last\n  for (stream = AUD_STREAM_CAPTURE;\n       stream >= AUD_STREAM_PLAYBACK && stream <= AUD_STREAM_CAPTURE;\n       stream--) {\n    if (!codec_int_cfg.stream_cfg[stream].started) {\n      codec_hw_stop(stream);\n    }\n  }\n\n  codec_hw_close(CODEC_CLOSE_NORMAL, CODEC_USER_ANC);\n\n  hal_cmu_anc_disable(HAL_CMU_ANC_CLK_USER_ANC);\n\n  hal_chip_wake_unlock(HAL_CHIP_WAKE_LOCK_USER_ANC);\n\n  // Disable pa if dac muted before\n  if (codec_int_cfg.mute_state[AUD_STREAM_PLAYBACK]) {\n    analog_aud_codec_mute();\n  }\n\n  codec_anc_handler = NULL;\n\n  return 0;\n}\n\n#ifdef VOICE_DETECTOR_EN\nint codec_vad_open(const struct AUD_VAD_CONFIG_T *cfg) {\n  if (cfg->type == AUD_VAD_TYPE_NONE) {\n    return codec_vad_close();\n  }\n\n  if (vad_type == cfg->type) {\n    return 0;\n  }\n\n  vad_type = cfg->type;\n\n  if (codec_int_cfg.user_map == 0) {\n    codec_hw_open(CODEC_USER_VAD);\n  }\n\n  hal_codec_vad_open(cfg);\n\n  codec_int_cfg.user_map |= (1 << CODEC_USER_VAD);\n\n  return 0;\n}\n\nint codec_vad_close(void) {\n  if (vad_type == AUD_VAD_TYPE_NONE) {\n    return 0;\n  }\n\n  vad_type = AUD_VAD_TYPE_NONE;\n\n  codec_int_cfg.user_map &= ~(1 << CODEC_USER_VAD);\n\n  if (codec_int_cfg.user_map == 0) {\n    codec_hw_close(CODEC_CLOSE_NORMAL, CODEC_USER_VAD);\n  }\n\n  return 0;\n}\n#endif\n"
  },
  {
    "path": "platform/drivers/codec/best2300p/codec_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __CODEC_BEST2300P_H__\n#define __CODEC_BEST2300P_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef void (*CODEC_ANC_BOOST_DELAY_FUNC)(uint32_t ms);\n\nvoid codec_set_anc_boost_delay_func(CODEC_ANC_BOOST_DELAY_FUNC delay_func);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/drivers/codec/codec_int.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __CODEC_INT_H__\n#define __CODEC_INT_H__\n\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"hal_codec.h\"\n#include \"hal_aud.h\"\n#include CHIP_SPECIFIC_HDR(codec)\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef void (*CODEC_CLOSE_HANDLER)(void);\n\nenum CODEC_CLOSE_TYPE_T {\n    CODEC_CLOSE_NORMAL,\n    CODEC_CLOSE_ASYNC_REAL,\n    CODEC_CLOSE_FORCED,\n};\n\nuint32_t codec_int_open(void);\nuint32_t codec_int_stream_open(enum AUD_STREAM_T stream);\nuint32_t codec_int_stream_setup(enum AUD_STREAM_T stream, struct HAL_CODEC_CONFIG_T *cfg);\nvoid codec_int_stream_mute(enum AUD_STREAM_T stream, bool mute);\nvoid codec_int_stream_set_chan_vol(enum AUD_STREAM_T stream, enum AUD_CHANNEL_MAP_T ch_map, uint8_t vol);\nvoid codec_int_stream_restore_chan_vol(enum AUD_STREAM_T stream);\nuint32_t codec_int_stream_start(enum AUD_STREAM_T stream);\nuint32_t codec_int_stream_stop(enum AUD_STREAM_T stream);\nuint32_t codec_int_stream_close(enum AUD_STREAM_T stream);\nuint32_t codec_int_close(enum CODEC_CLOSE_TYPE_T type);\nvoid codec_int_set_close_handler(CODEC_CLOSE_HANDLER hdlr);\n\ntypedef void (*CODEC_ANC_HANDLER)(enum AUD_STREAM_T stream, enum AUD_SAMPRATE_T rate, enum AUD_SAMPRATE_T *new_play, enum AUD_SAMPRATE_T *new_cap);\n\nint codec_anc_open(enum ANC_TYPE_T type, enum AUD_SAMPRATE_T dac_rate, enum AUD_SAMPRATE_T adc_rate, CODEC_ANC_HANDLER hdlr);\nint codec_anc_close(enum ANC_TYPE_T type);\n\nint codec_vad_open(const struct AUD_VAD_CONFIG_T *cfg);\nint codec_vad_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/drivers/codec/codec_tlv32aic32.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"codec_tlv32aic32.h\"\n#include \"hal_i2c.h\"\n#include \"hal_i2s.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"plat_types.h\"\n#include \"string.h\"\n\n#define TLV32AIC32_INST HAL_I2S_ID_0\n\nstatic struct HAL_I2C_CONFIG_T _codec_i2c_cfg;\n\nstatic uint8_t sample_rate_div[] = {\n    10, /* index is 0 */\n    15, 20, 25, 30, 35, 40, 45, 50, 55, 60,\n};\n\n/* i2c write */\nstatic int codec_write(uint8_t reg_addr, uint8_t value) {\n  uint8_t buf[2];\n  buf[0] = reg_addr;\n  buf[1] = value;\n\n  return hal_i2c_task_send(HAL_I2C_ID_0, TLV32AIC32_I2C_ADDRESS, buf, 1 + 1, 0,\n                           0);\n}\n\n/* i2c read */\n#if 0\nstatic uint8_t codec_read(uint8_t reg_addr)\n{\n    uint8_t buf[2];\n\n    buf[0] = reg_addr;\n    buf[1] = 0;\n\n    hal_i2c_task_recv(HAL_I2C_ID_0, TLV32AIC32_I2C_ADDRESS, &buf[0], 1, &buf[1], 1, 0, 0);\n\n    return buf[1];\n}\n#endif\n\nuint32_t tlv32aic32_open(void) {\n  _codec_i2c_cfg.mode = HAL_I2C_API_MODE_TASK;\n  _codec_i2c_cfg.use_dma = 0;\n  _codec_i2c_cfg.use_sync = 1;\n  _codec_i2c_cfg.speed = 20000;\n  _codec_i2c_cfg.as_master = 1;\n  hal_i2c_open(HAL_I2C_ID_0, &_codec_i2c_cfg);\n\n  return 0;\n}\nuint32_t tlv32aic32_stream_open(enum AUD_STREAM_T stream) {\n  hal_i2s_open(TLV32AIC32_INST, stream, HAL_I2S_MODE_MASTER);\n\n  return 0;\n}\n\nuint32_t tlv32aic32_stream_setup(enum AUD_STREAM_T stream,\n                                 struct tlv32aic32_config_t *cfg) {\n  uint32_t param = 0, i = 0;\n\n  /* select page : 0*/\n  codec_write(AIC3X_PAGE_SELECT, PAGE0_SELECT);\n\n  /* soft reset : 1 */\n  codec_write(AIC3X_RESET, SOFT_RESET);\n\n  /* CLKDIV_IN uses mCLK : 102 , PLLDIV_IN use mCLK */\n  codec_write(AIC3X_CLKGEN_CTRL_REG, 0x02);\n\n  /* CODEC_CLK_IN uses CLKDIV : 101, CODEC_CLK_IN use CLKDIV_IN */\n  codec_write(101, 0x00);\n\n  /* PLL R value : 11, R is 1 */\n  codec_write(AIC3X_OVRF_STATUS_AND_PLLR_REG, 0x1);\n\n  /* PLL J value : 4, J is 8 */\n  codec_write(AIC3X_PLL_PROGB_REG, 0x8);\n\n  /* PLL D value : 5,6, D is 1920 */\n  codec_write(AIC3X_PLL_PROGC_REG, 0x780 >> 6);\n\n  codec_write(AIC3X_PLL_PROGD_REG, (0x780 & 0x3f) << 2);\n\n  /* PLL disable and select Q value : 3, enable pll, Q is 2 */\n  codec_write(AIC3X_PLL_PROGA_REG, 0x81);\n\n  /* left and right DAC open : 7, open codec dac path and fref */\n  if ((cfg->sample_rate % 8000) == 0) {\n    /* 48000 */\n    codec_write(AIC3X_CODEC_DATAPATH_REG, 0x0a);\n    param = 480000 / cfg->sample_rate;\n  } else {\n    /* 44100 */\n    codec_write(AIC3X_CODEC_DATAPATH_REG, 0x8a);\n    param = 441000 / cfg->sample_rate;\n  }\n\n  for (i = 0; i < sizeof(sample_rate_div); ++i) {\n    if (param == sample_rate_div[i])\n      break;\n  }\n\n  if (i == sizeof(sample_rate_div)) {\n    i = 0;\n  }\n\n  /* sample_rate divider : 2, default is /1 */\n  codec_write(AIC3X_SAMPLE_RATE_SEL_REG, i << 4 | i << 4);\n\n  /* ctrl mode : 8, bitclock input, word clock input */\n  codec_write(AIC3X_ASD_INTF_CTRLA, 0x20);\n\n  /* Audio Serial Data Interface Control : 9, 16bit i2s mode */\n  if (cfg->bits == AUD_BITS_16)\n    param = 0;\n  else if (cfg->bits == AUD_BITS_20)\n    param = 1;\n  else if (cfg->bits == AUD_BITS_24)\n    param = 2;\n  else if (cfg->bits == AUD_BITS_32)\n    param = 3;\n  else\n    param = 0;\n\n  codec_write(AIC3X_ASD_INTF_CTRLB, 0x00 | param << 4);\n\n  /* out ac-coupled : 14, headset control */\n  codec_write(AIC3X_HEADSET_DETECT_CTRL_B, 0x08);\n\n  /* left and right DAC power on : 37 */\n  // codec_write(DAC_PWR, 0xC0);\n  codec_write(DAC_PWR, 0xD0);\n\n  /* out common-mode voltage : 40 */\n  codec_write(HPOUT_SC, 0x00);\n\n  /* out path select : 41 */\n  codec_write(DAC_LINE_MUX, 0xA1);\n\n  /* left DAC not muted : 43 */\n  codec_write(LDAC_VOL, 0x0f);\n\n  /* right DAC not muted : 44 */\n  codec_write(RDAC_VOL, 0x0f);\n\n  /* HPLOUT is not muted : 51 */\n  codec_write(HPLOUT_CTRL, 0x9F);\n\n  /* HPROUT is not muted : 65 */\n  codec_write(HPROUT_CTRL, 0x9F);\n\n  /* out short circuit protection : 38 */\n  // codec_write(HPRCOM_CFG, 0x3A);\n  codec_write(HPRCOM_CFG, 0x22);\n\n  /* input */\n  /* mic bias : 25 */\n  codec_write(MICBIAS_CTRL, 0x40);\n  /* left adc power : 19 */\n  codec_write(LINE1L_2_LADC_CTRL, 0x04);\n  /* right adc power : 22 */\n  codec_write(LINE1R_2_RADC_CTRL, 0x04);\n  /* left adc pga mute : 15 */\n  codec_write(LADC_VOL, 0x0);\n  /* right adc pga mute : 16 */\n  codec_write(RADC_VOL, 0x0);\n  /* adc flag : 36 */\n  // TRACE(1,\"tlv adc flag 0x%x\", codec_read(ADC_FLAG));\n  /* left adc pga mute : 15 */\n  // TRACE(1,\"tlv left adc pga 0x%x\", codec_read(LADC_VOL));\n  /* right adc pga mute : 16 */\n  // TRACE(1,\"tlv right adc pga 0x%x\", codec_read(RADC_VOL));\n  /* input end */\n\n  struct HAL_I2S_CONFIG_T i2s_cfg;\n\n  memset(&i2s_cfg, 0, sizeof(i2s_cfg));\n  i2s_cfg.use_dma = cfg->use_dma;\n  i2s_cfg.chan_sep_buf = cfg->chan_sep_buf;\n  i2s_cfg.sync_start = cfg->sync_start;\n  i2s_cfg.cycles = cfg->slot_cycles;\n  i2s_cfg.bits = cfg->bits;\n  i2s_cfg.channel_num = cfg->channel_num;\n  i2s_cfg.channel_map = cfg->channel_map;\n  i2s_cfg.sample_rate = cfg->sample_rate;\n  hal_i2s_setup_stream(TLV32AIC32_INST, stream, &i2s_cfg);\n\n  return 0;\n}\n\nuint32_t tlv32aic32_stream_start(enum AUD_STREAM_T stream) {\n  hal_i2s_start_stream(TLV32AIC32_INST, stream);\n  return 0;\n}\nuint32_t tlv32aic32_stream_stop(enum AUD_STREAM_T stream) {\n  hal_i2s_stop_stream(TLV32AIC32_INST, stream);\n  return 0;\n}\nuint32_t tlv32aic32_stream_close(enum AUD_STREAM_T stream) {\n  hal_i2s_close(TLV32AIC32_INST, stream);\n  return 0;\n}\nuint32_t tlv32aic32_close(void) { return 0; }\n"
  },
  {
    "path": "platform/drivers/codec/codec_tlv32aic32.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef CODEC_TLV32AIC32_H\n#define CODEC_TLV32AIC32_H\n\n#include \"plat_types.h\"\n#include \"hal_aud.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define TLV32AIC32_I2C_ADDRESS 0x18\n\n/* AIC3X register space */\n#define AIC3X_CACHEREGNUM       110\n\n/* Page select register */\n#define AIC3X_PAGE_SELECT       0\n/* Software reset register */\n#define AIC3X_RESET         1\n/* Codec Sample rate select register */\n#define AIC3X_SAMPLE_RATE_SEL_REG   2\n/* PLL progrramming register A */\n#define AIC3X_PLL_PROGA_REG     3\n/* PLL progrramming register B */\n#define AIC3X_PLL_PROGB_REG     4\n/* PLL progrramming register C */\n#define AIC3X_PLL_PROGC_REG     5\n/* PLL progrramming register D */\n#define AIC3X_PLL_PROGD_REG     6\n/* Codec datapath setup register */\n#define AIC3X_CODEC_DATAPATH_REG    7\n/* Audio serial data interface control register A */\n#define AIC3X_ASD_INTF_CTRLA        8\n/* Audio serial data interface control register B */\n#define AIC3X_ASD_INTF_CTRLB        9\n/* Audio serial data interface control register C */\n#define AIC3X_ASD_INTF_CTRLC        10\n/* Audio overflow status and PLL R value programming register */\n#define AIC3X_OVRF_STATUS_AND_PLLR_REG  11\n/* Audio codec digital filter control register */\n#define AIC3X_CODEC_DFILT_CTRL      12\n/* Headset/button press detection register */\n#define AIC3X_HEADSET_DETECT_CTRL_A 13\n#define AIC3X_HEADSET_DETECT_CTRL_B 14\n/* ADC PGA Gain control registers */\n#define LADC_VOL            15\n#define RADC_VOL            16\n/* MIC3 control registers */\n#define MIC3LR_2_LADC_CTRL      17\n#define MIC3LR_2_RADC_CTRL      18\n/* Line1 Input control registers */\n#define LINE1L_2_LADC_CTRL      19\n#define LINE1R_2_LADC_CTRL      21\n#define LINE1R_2_RADC_CTRL      22\n#define LINE1L_2_RADC_CTRL      24\n/* Line2 Input control registers */\n#define LINE2L_2_LADC_CTRL      20\n#define LINE2R_2_RADC_CTRL      23\n/* MICBIAS Control Register */\n#define MICBIAS_CTRL            25\n\n/* AGC Control Registers A, B, C */\n#define LAGC_CTRL_A         26\n#define LAGC_CTRL_B         27\n#define LAGC_CTRL_C         28\n#define RAGC_CTRL_A         29\n#define RAGC_CTRL_B         30\n#define RAGC_CTRL_C         31\n\n/* ADC flag registers */\n#define ADC_FLAG            36\n\n/* DAC Power and Left High Power Output control registers */\n#define DAC_PWR             37\n#define HPLCOM_CFG          37\n/* Right High Power Output control registers */\n#define HPRCOM_CFG          38\n/* High Power Output Stage Control Register */\n#define HPOUT_SC            40\n/* DAC Output Switching control registers */\n#define DAC_LINE_MUX            41\n/* High Power Output Driver Pop Reduction registers */\n#define HPOUT_POP_REDUCTION     42\n/* DAC Digital control registers */\n#define LDAC_VOL            43\n#define RDAC_VOL            44\n/* Left High Power Output control registers */\n#define LINE2L_2_HPLOUT_VOL     45\n#define PGAL_2_HPLOUT_VOL       46\n#define DACL1_2_HPLOUT_VOL      47\n#define LINE2R_2_HPLOUT_VOL     48\n#define PGAR_2_HPLOUT_VOL       49\n#define DACR1_2_HPLOUT_VOL      50\n#define HPLOUT_CTRL         51\n/* Left High Power COM control registers */\n#define LINE2L_2_HPLCOM_VOL     52\n#define PGAL_2_HPLCOM_VOL       53\n#define DACL1_2_HPLCOM_VOL      54\n#define LINE2R_2_HPLCOM_VOL     55\n#define PGAR_2_HPLCOM_VOL       56\n#define DACR1_2_HPLCOM_VOL      57\n#define HPLCOM_CTRL         58\n/* Right High Power Output control registers */\n#define LINE2L_2_HPROUT_VOL     59\n#define PGAL_2_HPROUT_VOL       60\n#define DACL1_2_HPROUT_VOL      61\n#define LINE2R_2_HPROUT_VOL     62\n#define PGAR_2_HPROUT_VOL       63\n#define DACR1_2_HPROUT_VOL      64\n#define HPROUT_CTRL         65\n/* Right High Power COM control registers */\n#define LINE2L_2_HPRCOM_VOL     66\n#define PGAL_2_HPRCOM_VOL       67\n#define DACL1_2_HPRCOM_VOL      68\n#define LINE2R_2_HPRCOM_VOL     69\n#define PGAR_2_HPRCOM_VOL       70\n#define DACR1_2_HPRCOM_VOL      71\n#define HPRCOM_CTRL         72\n/* Mono Line Output Plus/Minus control registers */\n#define LINE2L_2_MONOLOPM_VOL       73\n#define PGAL_2_MONOLOPM_VOL     74\n#define DACL1_2_MONOLOPM_VOL        75\n#define LINE2R_2_MONOLOPM_VOL       76\n#define PGAR_2_MONOLOPM_VOL     77\n#define DACR1_2_MONOLOPM_VOL        78\n#define MONOLOPM_CTRL           79\n/* Class-D speaker driver on tlv320aic3007 */\n#define CLASSD_CTRL         73\n/* Left Line Output Plus/Minus control registers */\n#define LINE2L_2_LLOPM_VOL      80\n#define PGAL_2_LLOPM_VOL        81\n#define DACL1_2_LLOPM_VOL       82\n#define LINE2R_2_LLOPM_VOL      83\n#define PGAR_2_LLOPM_VOL        84\n#define DACR1_2_LLOPM_VOL       85\n#define LLOPM_CTRL          86\n/* Right Line Output Plus/Minus control registers */\n#define LINE2L_2_RLOPM_VOL      87\n#define PGAL_2_RLOPM_VOL        88\n#define DACL1_2_RLOPM_VOL       89\n#define LINE2R_2_RLOPM_VOL      90\n#define PGAR_2_RLOPM_VOL        91\n#define DACR1_2_RLOPM_VOL       92\n#define RLOPM_CTRL          93\n/* GPIO/IRQ registers */\n#define AIC3X_STICKY_IRQ_FLAGS_REG  96\n#define AIC3X_RT_IRQ_FLAGS_REG      97\n#define AIC3X_GPIO1_REG         98\n#define AIC3X_GPIO2_REG         99\n#define AIC3X_GPIOA_REG         100\n#define AIC3X_GPIOB_REG         101\n/* Clock generation control register */\n#define AIC3X_CLKGEN_CTRL_REG       102\n/* New AGC registers */\n#define LAGCN_ATTACK            103\n#define LAGCN_DECAY         104\n#define RAGCN_ATTACK            105\n#define RAGCN_DECAY         106\n/* New Programmable ADC Digital Path and I2C Bus Condition Register */\n#define NEW_ADC_DIGITALPATH     107\n/* Passive Analog Signal Bypass Selection During Powerdown Register */\n#define PASSIVE_BYPASS          108\n/* DAC Quiescent Current Adjustment Register */\n#define DAC_ICC_ADJ         109\n\n/* Page select register bits */\n#define PAGE0_SELECT        0\n#define PAGE1_SELECT        1\n\n/* Audio serial data interface control register A bits */\n#define BIT_CLK_MASTER          0x80\n#define WORD_CLK_MASTER         0x40\n#define DOUT_TRISTATE       0x20\n\n/* Codec Datapath setup register 7 */\n#define FSREF_44100     (1 << 7)\n#define FSREF_48000     (0 << 7)\n#define DUAL_RATE_MODE      ((1 << 5) | (1 << 6))\n#define LDAC2LCH        (0x1 << 3)\n#define RDAC2RCH        (0x1 << 1)\n#define LDAC2RCH        (0x2 << 3)\n#define RDAC2LCH        (0x2 << 1)\n#define LDAC2MONOMIX        (0x3 << 3)\n#define RDAC2MONOMIX        (0x3 << 1)\n\n/* PLL registers bitfields */\n#define PLLP_SHIFT      0\n#define PLLP_MASK       7\n#define PLLQ_SHIFT      3\n#define PLLR_SHIFT      0\n#define PLLJ_SHIFT      2\n#define PLLD_MSB_SHIFT      0\n#define PLLD_LSB_SHIFT      2\n\n/* Clock generation register bits */\n#define CODEC_CLKIN_PLLDIV  0\n#define CODEC_CLKIN_CLKDIV  1\n#define PLL_CLKIN_SHIFT     4\n#define MCLK_SOURCE     0x0\n#define PLL_CLKDIV_SHIFT    0\n#define PLLCLK_IN_MASK      0x30\n#define PLLCLK_IN_SHIFT     4\n#define CLKDIV_IN_MASK      0xc0\n#define CLKDIV_IN_SHIFT     6\n/* clock in source */\n#define CLKIN_MCLK      0\n#define CLKIN_GPIO2     1\n#define CLKIN_BCLK      2\n\n/* Software reset register bits */\n#define SOFT_RESET      0x80\n\n/* PLL progrramming register A bits */\n#define PLL_ENABLE      0x80\n\n/* Route bits */\n#define ROUTE_ON        0x80\n\n/* Mute bits */\n#define UNMUTE          0x08\n#define MUTE_ON         0x80\n\n/* Power bits */\n#define LADC_PWR_ON     0x04\n#define RADC_PWR_ON     0x04\n#define LDAC_PWR_ON     0x80\n#define RDAC_PWR_ON     0x40\n#define HPLOUT_PWR_ON       0x01\n#define HPROUT_PWR_ON       0x01\n#define HPLCOM_PWR_ON       0x01\n#define HPRCOM_PWR_ON       0x01\n#define MONOLOPM_PWR_ON     0x01\n#define LLOPM_PWR_ON        0x01\n#define RLOPM_PWR_ON    0x01\n\n#define INVERT_VOL(val)   (0x7f - val)\n\n/* Default output volume (inverted) */\n#define DEFAULT_VOL     INVERT_VOL(0x50)\n/* Default input volume */\n#define DEFAULT_GAIN    0x20\n\n/* MICBIAS Control Register */\n#define MICBIAS_LEVEL_SHIFT (6)\n#define MICBIAS_LEVEL_MASK  (3 << 6)\n\nstruct tlv32aic32_config_t\n{\n    enum AUD_BITS_T bits;\n    enum AUD_SAMPRATE_T sample_rate;\n    enum AUD_CHANNEL_NUM_T channel_num;\n    enum AUD_CHANNEL_MAP_T channel_map;\n\n    bool use_dma;\n    bool chan_sep_buf;\n    bool sync_start;\n    uint8_t slot_cycles;\n};\n\nuint32_t tlv32aic32_open(void);\nuint32_t tlv32aic32_stream_open(enum AUD_STREAM_T stream);\nuint32_t tlv32aic32_stream_setup(enum AUD_STREAM_T stream, struct tlv32aic32_config_t *cfg);\nuint32_t tlv32aic32_stream_start(enum AUD_STREAM_T stream);\nuint32_t tlv32aic32_stream_stop(enum AUD_STREAM_T stream);\nuint32_t tlv32aic32_stream_close(enum AUD_STREAM_T stream);\nuint32_t tlv32aic32_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* CODEC_TLV32AIC32_H */\n"
  },
  {
    "path": "platform/drivers/norflash/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y := -I$(obj)/inc -Itests/programmer/inc -Iutils/boot_struct\n\nCFLAGS_norflash_drv.o += -DCHIP_FLASH_CTRL_VER=$(CHIP_FLASH_CTRL_VER)\n\nifeq ($(FLASH_HPM),1)\nccflags-y += -DFLASH_HPM\nendif\n\nifeq ($(FLASH_CALIB_DEBUG),1)\nCFLAGS_norflash_drv.o += -DFLASH_CALIB_DEBUG\nendif\nifeq ($(FLASH_SUSPEND),1)\nCFLAGS_norflash_drv.o += -DFLASH_SUSPEND\nendif\nifeq ($(FLASH_SECURITY_REGISTER),1)\nCFLAGS_norflash_drv.o += -DFLASH_SECURITY_REGISTER\nendif\n\nifeq ($(PSRAM_ENABLE),1)\nCFLAGS_norflash_drv.o += -DPSRAM_ENABLE\nendif\nifeq ($(PSRAMUHS_ENABLE),1)\nCFLAGS_norflash_drv.o += -DPSRAMUHS_ENABLE\nendif\n\nifeq ($(FLASH_CHIP),)\nifeq ($(PROGRAMMER),1)\nFLASH_CHIP := ALL\nelse\nFLASH_CHIP := GD25Q32C\nendif\nendif\nifeq ($(FLASH_CHIP),)\n$(error *** Error: FLASH_CHIP is NOT defined!)\nendif\n\nCFLAGS_norflash_drv.o += $(foreach flash,$(FLASH_CHIP),-D__NORFLASH_$(flash)__)\n\n"
  },
  {
    "path": "platform/drivers/norflash/norflash_drv.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"norflash_drv.h\"\n#include \"cmsis.h\"\n#include \"hal_cache.h\"\n#include \"hal_norflash.h\"\n#include \"hal_norflaship.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"norflash_gd25q32c.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"tool_msg.h\"\n\n#ifdef PROGRAMMER\n#include \"task_schedule.h\"\n#else\n#define TASK_SCHEDULE true\n#endif\n\n#if (CHIP_FLASH_CTRL_VER >= 2) && !defined(ROM_BUILD) &&                       \\\n    !defined(PROGRAMMER) &&                                                    \\\n    !(defined(CHIP_BEST2001) &&                                                \\\n      (defined(PSRAMUHS_ENABLE) || defined(PSRAM_ENABLE)))\n#define FLASH_BURST_WRAP\n#endif\n\n#define SAMP_DELAY_PRIO_FALLING_EDGE\n\n#define NORFLASH_UNIQUE_ID_LEN 18\n\n#define NORFLASH_MAX_DIV 0xFF\n\n#define NORFLASH_DEFAULT_MAX_SPEED (104 * 1000 * 1000)\n\n#define NORFLASH_DIV1_MAX_SPEED (99 * 1000 * 1000)\n\n#define NORFLASH_SPEED_RATIO_DENOMINATOR 8\n\n#define NORFLASH_PUYA_ID_PREFIX 0x85\n\n#define NORFLASH_XTS_ID_PREFIX 0x0B\n\n#define XTS_UNIQUE_ID_LEN 16\n#define XTS_UNIQUE_ID_CMD 0x5A\n#define XTS_UNIQUE_ID_PARAM 0x00019400\n\n// GigaDevice\nextern const struct NORFLASH_CFG_T gd25lq64c_cfg;\nextern const struct NORFLASH_CFG_T gd25lq32c_cfg;\nextern const struct NORFLASH_CFG_T gd25lq16c_cfg;\nextern const struct NORFLASH_CFG_T gd25lq80c_cfg;\nextern const struct NORFLASH_CFG_T gd25q32c_cfg;\nextern const struct NORFLASH_CFG_T gd25q80c_cfg;\nextern const struct NORFLASH_CFG_T gd25d40c_cfg;\nextern const struct NORFLASH_CFG_T gd25d20c_cfg;\n\n// Puya\nextern const struct NORFLASH_CFG_T p25q128l_cfg;\nextern const struct NORFLASH_CFG_T p25q64l_cfg;\nextern const struct NORFLASH_CFG_T p25q32l_cfg;\nextern const struct NORFLASH_CFG_T p25q16l_cfg;\nextern const struct NORFLASH_CFG_T p25q80h_cfg;\nextern const struct NORFLASH_CFG_T p25q21h_cfg;\nextern const struct NORFLASH_CFG_T p25q40h_cfg;\n\n// XTS\nextern const struct NORFLASH_CFG_T xt25q08b_cfg;\n\n// EON\nextern const struct NORFLASH_CFG_T en25s80b_cfg;\n\n// XMC\nextern const struct NORFLASH_CFG_T xm25qh16c_cfg;\nextern const struct NORFLASH_CFG_T xm25qh80b_cfg;\n\nstatic const struct NORFLASH_CFG_T *const flash_list[] = {\n// ----------------------\n// GigaDevice\n// ----------------------\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_GD25LQ64C__)\n    &gd25lq64c_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_GD25LQ32C__)\n    &gd25lq32c_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_GD25LQ6C__)\n    &gd25lq16c_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_GD25LQ80C__)\n    &gd25lq80c_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_GD25Q32C__)\n    &gd25q32c_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_GD25Q80C__)\n    &gd25q80c_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_GD25D40C__)\n    &gd25d40c_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_GD25D20C__)\n    &gd25d20c_cfg,\n#endif\n\n// ----------------------\n// Puya\n// ----------------------\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_P25Q128L__)\n    &p25q128l_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_P25Q64L__)\n    &p25q64l_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_P25Q32L__)\n    &p25q32l_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_P25Q16L__)\n    &p25q16l_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_P25Q80H__)\n    &p25q80h_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_P25Q21H__)\n    &p25q21h_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_P25Q40H__)\n    &p25q40h_cfg,\n#endif\n\n// ----------------------\n// Xinxin\n// ----------------------\n#if defined(__NORFLASH_XM25QH16C__)\n    &xm25qh16c_cfg,\n#endif\n#if defined(__NORFLASH_ALL__) || defined(__NORFLASH_XM25QH80B__)\n    &xm25qh80b_cfg,\n#endif\n\n// ----------------------\n// XTS\n// ----------------------\n#if defined(__NORFLASH_XT25Q08B__)\n    &xt25q08b_cfg,\n#endif\n\n// ----------------------\n// EON\n// ----------------------\n#if defined(__NORFLASH_EN25S80B__)\n    &en25s80b_cfg,\n#endif\n\n};\n\n// Sample delay will be larger if:\n// 1) flash speed is higher (major impact)\n// 2) vcore voltage is lower (secondary major impact)\n// 3) flash voltage is lower (minor impact)\n\n// Sample delay unit:\n// V1: 1/2 source_clk cycle when <= 2, 1 source_clk cycle when >= 2\n// V2: 1/2 source_clk cycle when <= 4, 1 source_clk cycle when >= 4\n\n// Flash clock low to output valid delay:\n// T_clqv: 7 ns\n\n// Flash IO latency:\n// BEST1000/3001/1400: 4 ns\n// BEST2000: 5 ns\n// BEST2300: 2 ns\n\n// Flash output time: T_clqv + T_io_latency\n// Falling edge sample time: one spi_clk cycle (should > flash output time)\n\n#ifdef CHIP_BEST2300\n#define FALLING_EDGE_SAMPLE_ADJ_FREQ (110 * 1000 * 1000) // about 9 ns\n#else\n#define FALLING_EDGE_SAMPLE_ADJ_FREQ (77 * 1000 * 1000) // about 13 ns\n#endif\n\n#if (CHIP_FLASH_CTRL_VER <= 1)\n#define SAM_EDGE_FALLING (1 << 4)\n#define SAM_NEG_PHASE (1 << 5)\n#define SAMDLY_MASK (0xF << 0)\n\n#ifdef SAMP_DELAY_PRIO_FALLING_EDGE\n#define DIV2_SAMP_DELAY_FALLING_EDGE_IDX 1\n#define DIVN_SAMP_DELAY_FALLING_EDGE_IDX 2\n// Sample delays: 1, 1.5, 2, 3\nstatic const uint8_t samdly_list_divn[] = {\n    1,\n    SAM_NEG_PHASE | SAM_EDGE_FALLING | 2,\n    2,\n    3,\n};\n#else\n// Sample delays: 0, 0.5, 1, 1.5, 2, 3, 4, 5, 6, 7\nstatic const uint8_t samdly_list_divn[] = {/*0,*/ SAM_EDGE_FALLING | 1,\n                                           1,\n                                           SAM_NEG_PHASE | SAM_EDGE_FALLING | 2,\n                                           2,\n                                           3,\n                                           4,\n                                           /*5, 6, 7,*/};\n#endif\n#else\n#ifdef SAMP_DELAY_PRIO_FALLING_EDGE\n#ifdef CHIP_BEST1402\n#define DIV1_SAMP_DELAY_FALLING_EDGE_IDX 2\n#else\n#define DIV1_SAMP_DELAY_FALLING_EDGE_IDX 1\n#endif\nstatic const uint8_t samdly_list_div1[] = {\n    0,\n    1,\n    2,\n    3,\n};\n#define DIV2_SAMP_DELAY_FALLING_EDGE_IDX 1\n#define DIVN_SAMP_DELAY_FALLING_EDGE_IDX 3\nstatic const uint8_t samdly_list_divn[] = {\n    2, 3, 4, 5, 6, 7, 8, 9,\n};\n#else\nstatic const uint8_t samdly_list_divn[] = {\n    0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,\n};\n#endif\n#endif\n\nstatic uint8_t flash_idx;\nstatic uint8_t div_read;\nstatic uint8_t div_std_read;\nstatic uint8_t div_others;\nstatic uint32_t norflash_op_mode = 0;\nstatic bool falling_edge_adj;\nstatic uint8_t sample_delay_index;\n\n#ifdef FLASH_SUSPEND\nstatic uint32_t check_irq[(USER_IRQn_QTY + 31) / 32];\nstatic bool specific_irq_check;\n#endif\n\n#ifdef FLASH_CALIB_DEBUG\nstatic uint32_t norflash_source_clk;\nstatic uint32_t norflash_speed;\nstatic uint8_t calib_matched_idx[DRV_NORFLASH_CALIB_QTY];\nstatic uint8_t calib_matched_cnt[DRV_NORFLASH_CALIB_QTY];\nstatic uint8_t calib_final_idx[DRV_NORFLASH_CALIB_QTY];\n#endif\n\nstatic void norflash_delay(uint32_t us) {\n#ifdef CHIP_BEST1000\n  hal_sys_timer_delay(US_TO_TICKS(us));\n#else\n  hal_sys_timer_delay_us(us);\n#endif\n}\n\n#ifdef FLASH_HPM\nstatic int norflash_set_hpm(uint8_t on) {\n  if (on) {\n    norflaship_cmd_addr(GD25Q32C_CMD_HIGH_PERFORMANCE, 0);\n  } else {\n    norflaship_cmd_addr(GD25Q32C_CMD_RELEASE_FROM_DP, 0);\n  }\n  norflaship_busy_wait();\n\n  return 0;\n}\n#endif\n\n#ifdef FLASH_SUSPEND\nstatic int norflash_suspend(void) {\n  norflaship_clear_fifos();\n  norflaship_ext_tx_cmd(GD25Q32C_CMD_PROGRAM_ERASE_SUSPEND, 0);\n  // Suspend time: 20~30 us\n  norflash_delay(40);\n  return 0;\n}\n\nstatic int norflash_resume(void) {\n  norflaship_clear_fifos();\n  norflaship_ext_tx_cmd(GD25Q32C_CMD_PROGRAM_ERASE_RESUME, 0);\n  if (flash_list[flash_idx]->id[0] == NORFLASH_PUYA_ID_PREFIX) {\n    // PUYA flash requires the mean interval of resume to suspend >= 250us\n    norflash_delay(250);\n  } else {\n    // At least resume the work for 100 us to avoid always staying in suspended\n    // state\n    norflash_delay(100);\n  }\n  return 0;\n}\n#endif\n\nuint8_t norflash_read_status_s0_s7(void) {\n  uint8_t val;\n  norflash_read_reg(GD25Q32C_CMD_READ_STATUS_S0_S7, &val, 1);\n  return val;\n}\n\nuint8_t norflash_read_status_s8_s15(void) {\n  uint8_t val;\n  norflash_read_reg(GD25Q32C_CMD_READ_STATUS_S8_S15, &val, 1);\n  return val;\n}\n\nstatic int norflash_status_WEL(void) {\n  uint32_t status;\n  status = norflash_read_status_s0_s7();\n  return !!(status & GD25Q32C_WEL_BIT_MASK);\n}\n\nstatic int norflash_status_WIP(void) {\n  uint32_t status;\n  status = norflash_read_status_s0_s7();\n  return !!(status & GD25Q32C_WIP_BIT_MASK);\n}\n\nvoid norflash_status_WEL_0_wait(void) {\n  while (norflash_status_WEL() == 0 && TASK_SCHEDULE)\n    ;\n}\n\n#ifdef FLASH_SUSPEND\nint norflash_suspend_check_irq(uint32_t irq_num) {\n  uint32_t idx;\n  uint32_t offset;\n\n  idx = irq_num / 32;\n  offset = irq_num % 32;\n\n  if (idx >= ARRAY_SIZE(check_irq)) {\n    return 1;\n  }\n\n  check_irq[idx] |= (1 << offset);\n  specific_irq_check = true;\n\n  return 0;\n}\n\nstatic int norflash_system_active(void) {\n  if (specific_irq_check) {\n    return hal_sleep_specific_irq_pending(check_irq, ARRAY_SIZE(check_irq));\n  } else {\n    return hal_sleep_irq_pending();\n  }\n}\n#endif\n\nenum HAL_NORFLASH_RET_T norflash_status_WIP_1_wait(int suspend) {\n  while (norflash_status_WIP() && TASK_SCHEDULE) {\n#ifdef FLASH_SUSPEND\n    if (suspend && norflash_system_active()) {\n      norflash_suspend();\n      return HAL_NORFLASH_SUSPENDED;\n    }\n#endif\n  }\n\n  return HAL_NORFLASH_OK;\n}\n\n#ifdef FLASH_BURST_WRAP\nstatic int norflash_set_burst_wrap(uint32_t len) {\n  uint8_t val;\n\n  if (len == 64) {\n    val = (1 << 6) | (1 << 5);\n  } else if (len == 32) {\n    val = (1 << 6);\n  } else if (len == 16) {\n    val = (1 << 5);\n  } else if (len == 8) {\n    val = 0;\n  } else if (len == 0) {\n    // Disable wrap around\n    val = (1 << 4);\n  } else {\n    return 1;\n  }\n\n  norflaship_clear_txfifo();\n  norflaship_write_txfifo(&val, 1);\n  norflaship_cmd_addr(GD25Q32C_CMD_SET_BURST_WRAP, 0);\n  norflash_status_WIP_1_wait(0);\n\n  return 0;\n}\n#endif\n\nstatic int norflash_set_continuous_read(uint8_t on) {\n  uint8_t cmd;\n\n  if (on) {\n    norflaship_continuous_read_on();\n\n    norflaship_continuous_read_mode_bit(flash_list[flash_idx]->crm_en_bits);\n\n    // Continuous Read Mode takes effect after the first read\n  } else {\n    norflaship_continuous_read_off();\n\n    norflaship_continuous_read_mode_bit(flash_list[flash_idx]->crm_dis_bits);\n\n    if (norflash_op_mode & HAL_NORFLASH_OP_MODE_QUAD_IO) {\n      cmd = GD25Q32C_CMD_FAST_QUAD_IO_READ;\n    } else {\n      norflaship_quad_mode(0);\n\n      if (norflash_op_mode & HAL_NORFLASH_OP_MODE_DUAL_IO) {\n        cmd = GD25Q32C_CMD_FAST_DUAL_IO_READ;\n      } else {\n        norflaship_dual_mode(0);\n\n        // Command 0x03 and address 0xFFFFFE will make M4=1 (mode bit 4)\n        // at both qual and dual continuous read modes, which will disable it.\n        cmd = GD25Q32C_CMD_STANDARD_READ;\n      }\n    }\n\n    norflaship_clear_rxfifo();\n    norflaship_busy_wait();\n    norflaship_blksize(2);\n    if (cmd == GD25Q32C_CMD_STANDARD_READ) {\n      if (div_std_read) {\n        norflaship_div(div_std_read);\n      }\n    }\n    norflaship_cmd_addr(cmd, 0xFFFFFE);\n    // Now Continuous Read Mode has been disabled\n    if (cmd == GD25Q32C_CMD_STANDARD_READ) {\n      if (div_others) {\n        norflaship_div(div_others);\n      }\n    }\n    norflaship_clear_rxfifo();\n  }\n\n  norflaship_busy_wait();\n\n  return 0;\n}\n\nstatic int norflash_set_quad(uint8_t on) {\n  if (flash_list[flash_idx]->write_status == NULL) {\n    return -1;\n  }\n\n  if (on) {\n    flash_list[flash_idx]->write_status(DRV_NORFLASH_W_STATUS_QE, 1);\n  } else {\n    flash_list[flash_idx]->write_status(DRV_NORFLASH_W_STATUS_QE, 0);\n  }\n  return 0;\n}\n\nstatic int norflash_set_quad_io_mode(uint8_t on) {\n  norflash_set_quad(on);\n  if (on) {\n    norflaship_quad_mode(1);\n  } else {\n    norflaship_quad_mode(0);\n  }\n  norflaship_busy_wait();\n  return 0;\n}\n\nstatic int norflash_set_quad_output_mode(uint8_t on) {\n  norflash_set_quad(on);\n  if (on) {\n    norflaship_rdcmd(GD25Q32C_CMD_FAST_QUAD_OUTPUT_READ);\n  } else {\n    norflaship_rdcmd(GD25Q32C_CMD_STANDARD_READ);\n  }\n  norflaship_busy_wait();\n  return 0;\n}\n\nstatic uint8_t norflash_set_dual_io_mode(uint8_t on) {\n  if (on) {\n    norflaship_dual_mode(1);\n  } else {\n    norflaship_dual_mode(0);\n  }\n  norflaship_busy_wait();\n\n  return 0;\n}\n\nstatic uint8_t norflash_set_dual_output_mode(uint8_t on) {\n  if (on) {\n    norflaship_rdcmd(GD25Q32C_CMD_FAST_DUAL_OUTPUT_READ);\n  } else {\n    norflaship_rdcmd(GD25Q32C_CMD_STANDARD_READ);\n  }\n  norflaship_busy_wait();\n  return 0;\n}\n\nstatic uint8_t norflash_set_fast_mode(uint8_t on) {\n  if (on) {\n    norflaship_rdcmd(GD25Q32C_CMD_STANDARD_FAST_READ);\n  } else {\n    norflaship_rdcmd(GD25Q32C_CMD_STANDARD_READ);\n  }\n  norflaship_busy_wait();\n  return 0;\n}\n\nstatic uint8_t norflash_set_stand_mode(void) {\n  norflaship_rdcmd(GD25Q32C_CMD_STANDARD_READ);\n  norflaship_busy_wait();\n  return 0;\n}\n\nuint32_t norflash_get_supported_mode(void) {\n  return flash_list[flash_idx]->mode;\n}\n\nuint32_t norflash_get_current_mode(void) { return norflash_op_mode; }\n\nunion DRV_NORFLASH_SEC_REG_CFG_T norflash_get_security_register_config(void) {\n  return flash_list[flash_idx]->sec_reg_cfg;\n}\n\nuint32_t norflash_get_block_protect_mask(void) {\n  return flash_list[flash_idx]->block_protect_mask;\n}\n\nvoid norflash_reset(void) {\n  norflaship_clear_fifos();\n\n  // Disable continuous read mode\n  norflaship_continuous_read_off();\n  norflaship_busy_wait();\n  norflaship_blksize(2);\n  // Command 0x03 and address 0xFFFFFE will make M4=1 (mode bit 4)\n  // at both qual and dual continuous read modes, which will disable it.\n  norflaship_cmd_addr(GD25Q32C_CMD_STANDARD_READ, 0xFFFFFE);\n\n  // Release from deep power-down\n  norflaship_cmd_addr(GD25Q32C_CMD_RELEASE_FROM_DP, 0);\n  // Wait 20us for flash to finish\n  norflash_delay(40);\n\n  // Software reset\n  norflaship_ext_tx_cmd(GD25Q32C_CMD_ENABLE_RESET, 0);\n  norflaship_ext_tx_cmd(GD25Q32C_CMD_RESET, 0);\n  // Reset recovery time: 20~30 us\n  norflash_delay(50);\n\n  norflaship_cmd_done();\n\n  // Reset cfg\n  flash_idx = 0;\n  div_read = 0;\n  div_std_read = 0;\n  div_others = 0;\n  norflash_op_mode = 0;\n  falling_edge_adj = false;\n}\n\nint norflash_get_size(uint32_t *total_size, uint32_t *block_size,\n                      uint32_t *sector_size, uint32_t *page_size) {\n  if (total_size) {\n    *total_size = flash_list[flash_idx]->total_size;\n  }\n  if (block_size) {\n    *block_size = flash_list[flash_idx]->block_size;\n  }\n  if (sector_size) {\n    *sector_size = flash_list[flash_idx]->sector_size;\n  }\n  if (page_size) {\n    *page_size = flash_list[flash_idx]->page_size;\n  }\n\n  return 0;\n}\n\nstatic void norflash_set_cfg_div(void) {\n  if (div_others) {\n    norflaship_div(div_others);\n  }\n}\n\nstatic void norflash_set_read_div(void) {\n  if (norflash_op_mode & HAL_NORFLASH_OP_MODE_STAND_SPI) {\n    if (div_std_read) {\n      norflaship_div(div_std_read);\n    }\n  } else {\n    if (div_read) {\n      norflaship_div(div_read);\n    }\n  }\n}\n\nint norflash_set_mode(uint32_t op) {\n  uint32_t read_mode = 0;\n  uint32_t ext_mode = 0;\n  uint32_t program_mode = 0;\n  uint32_t self_mode;\n  uint32_t mode;\n\n  self_mode = norflash_get_supported_mode();\n  mode = (self_mode & op);\n\n  if (mode & HAL_NORFLASH_OP_MODE_QUAD_IO) {\n    read_mode = HAL_NORFLASH_OP_MODE_QUAD_IO;\n  } else if (mode & HAL_NORFLASH_OP_MODE_QUAD_OUTPUT) {\n    read_mode = HAL_NORFLASH_OP_MODE_QUAD_OUTPUT;\n  } else if (mode & HAL_NORFLASH_OP_MODE_DUAL_IO) {\n    read_mode = HAL_NORFLASH_OP_MODE_DUAL_IO;\n  } else if (mode & HAL_NORFLASH_OP_MODE_DUAL_OUTPUT) {\n    read_mode = HAL_NORFLASH_OP_MODE_DUAL_OUTPUT;\n  } else if (mode & HAL_NORFLASH_OP_MODE_FAST_SPI) {\n    read_mode = HAL_NORFLASH_OP_MODE_FAST_SPI;\n  } else if (mode & HAL_NORFLASH_OP_MODE_STAND_SPI) {\n    read_mode = HAL_NORFLASH_OP_MODE_STAND_SPI;\n  } else {\n    // Op error\n    return 1;\n  }\n\n  if (mode & HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM) {\n    program_mode = HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM;\n  } else if (mode & HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM) {\n    program_mode = HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM;\n  } else if (mode & HAL_NORFLASH_OP_MODE_PAGE_PROGRAM) {\n    program_mode = HAL_NORFLASH_OP_MODE_PAGE_PROGRAM;\n  } else {\n    // Op error\n    return 1;\n  }\n\n#ifdef FLASH_BURST_WRAP\n  if (mode & HAL_NORFLASH_OP_MODE_READ_WRAP) {\n    ext_mode |= HAL_NORFLASH_OP_MODE_READ_WRAP;\n  }\n#endif\n\n#ifdef FLASH_HPM\n  if (mode & HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE) {\n    ext_mode |= HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE;\n  }\n#endif\n\n  if (mode & (HAL_NORFLASH_OP_MODE_QUAD_IO | HAL_NORFLASH_OP_MODE_DUAL_IO)) {\n    if (mode & HAL_NORFLASH_OP_MODE_CONTINUOUS_READ) {\n      ext_mode |= HAL_NORFLASH_OP_MODE_CONTINUOUS_READ;\n    }\n  }\n\n  mode = (read_mode | ext_mode | program_mode);\n\n  if (norflash_op_mode != mode) {\n    norflash_op_mode = mode;\n\n    // Continuous read off if flash supported\n    if ((self_mode &\n         (HAL_NORFLASH_OP_MODE_QUAD_IO | HAL_NORFLASH_OP_MODE_DUAL_IO)) &&\n        (self_mode & HAL_NORFLASH_OP_MODE_CONTINUOUS_READ)) {\n      norflash_set_continuous_read(0);\n    }\n\n    norflaship_quad_mode(0);\n\n    norflaship_dual_mode(0);\n\n#ifdef FLASH_HPM\n    if (mode & HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE) {\n      // High performance mode on\n      norflash_set_hpm(1);\n    }\n#endif\n\n    if (mode & HAL_NORFLASH_OP_MODE_QUAD_IO) {\n      // Quad io mode\n      norflash_set_quad_io_mode(1);\n    } else if (mode & HAL_NORFLASH_OP_MODE_QUAD_OUTPUT) {\n      // Quad output mode\n      norflash_set_quad_output_mode(1);\n    } else if (mode & HAL_NORFLASH_OP_MODE_DUAL_IO) {\n      // Dual io mode\n      norflash_set_dual_io_mode(1);\n    } else if (mode & HAL_NORFLASH_OP_MODE_DUAL_OUTPUT) {\n      // Dual output mode\n      norflash_set_dual_output_mode(1);\n    } else if (mode & HAL_NORFLASH_OP_MODE_FAST_SPI) {\n      // Fast mode\n      norflash_set_fast_mode(1);\n    } else if (mode & HAL_NORFLASH_OP_MODE_STAND_SPI) {\n      // Standard spi mode\n      norflash_set_stand_mode();\n    }\n\n#ifdef FLASH_BURST_WRAP\n    if (mode & HAL_NORFLASH_OP_MODE_READ_WRAP) {\n      norflash_set_burst_wrap(32);\n      hal_cache_wrap_enable(HAL_CACHE_ID_I_CACHE);\n      hal_cache_wrap_enable(HAL_CACHE_ID_D_CACHE);\n    }\n#endif\n\n#ifdef FLASH_HPM\n    if ((self_mode & HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE) &&\n        (mode & HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE) == 0) {\n      // High performance mode off\n      norflash_set_hpm(0);\n    }\n#endif\n\n    if (mode & HAL_NORFLASH_OP_MODE_CONTINUOUS_READ) {\n      // Continuous read on\n      norflash_set_continuous_read(1);\n    }\n\n    norflaship_cmd_done();\n  }\n\n  norflash_set_read_div();\n\n  return 0;\n}\n\nint norflash_pre_operation(void) {\n  norflash_set_cfg_div();\n\n  if (norflash_op_mode & HAL_NORFLASH_OP_MODE_CONTINUOUS_READ) {\n    norflash_set_continuous_read(0);\n  }\n\n  return 0;\n}\n\nint norflash_post_operation(void) {\n  if (norflash_op_mode & HAL_NORFLASH_OP_MODE_CONTINUOUS_READ) {\n    norflash_set_continuous_read(1);\n  }\n\n  norflaship_cmd_done();\n\n  norflash_set_read_div();\n\n  return 0;\n}\n\nint norflash_read_reg(uint8_t cmd, uint8_t *val, uint32_t len) {\n  int i;\n\n  norflaship_clear_fifos();\n#ifdef TRY_EMBEDDED_CMD\n  if ((cmd == GD25Q32C_CMD_READ_STATUS_S0_S7 ||\n       cmd == GD25Q32C_CMD_READ_STATUS_S8_S15) &&\n      len == 1) {\n    norflaship_cmd_addr(cmd, 0);\n  } else {\n    if (cmd == GD25Q32C_CMD_ID) {\n      norflaship_blksize(len);\n      norflaship_cmd_addr(cmd, 0);\n    } else {\n      norflaship_ext_rx_cmd(cmd, 0, len);\n    }\n  }\n#else\n  norflaship_ext_rx_cmd(cmd, 0, len);\n#endif\n  norflaship_rxfifo_count_wait(len);\n  for (i = 0; i < len; i++) {\n    val[i] = norflaship_read_rxfifo();\n  }\n\n  return 0;\n}\n\nint norflash_read_reg_ex(uint8_t cmd, uint8_t *param, uint32_t param_len,\n                         uint8_t *val, uint32_t len) {\n  int i;\n\n  norflaship_clear_fifos();\n  if (param && param_len > 0) {\n    norflaship_write_txfifo(param, param_len);\n  } else {\n    param_len = 0;\n  }\n  norflaship_ext_rx_cmd(cmd, param_len, len);\n  for (i = 0; i < len; i++) {\n    norflaship_rxfifo_empty_wait();\n    val[i] = norflaship_read_rxfifo();\n  }\n\n  return 0;\n}\n\nint norflash_write_reg(uint8_t cmd, const uint8_t *val, uint32_t len) {\n  norflaship_cmd_addr(GD25Q32C_CMD_WRITE_ENABLE, 0);\n  norflash_status_WIP_1_wait(0);\n  norflash_status_WEL_0_wait();\n\n  norflaship_clear_txfifo();\n  norflaship_write_txfifo(val, len);\n\n#ifdef TRY_EMBEDDED_CMD\n  if (cmd == GD25Q32C_CMD_WRITE_STATUS_S0_S7) {\n    norflaship_cmd_addr(GD25Q32C_CMD_WRITE_STATUS_S0_S7, 0);\n  } else {\n    norflaship_ext_tx_cmd(cmd, len);\n  }\n#else\n  norflaship_ext_tx_cmd(cmd, len);\n#endif\n\n  norflash_status_WIP_1_wait(0);\n\n  return 0;\n}\n\nint norflash_get_id(uint8_t *value, uint32_t len) {\n  norflash_pre_operation();\n\n  if (len > NORFLASH_ID_LEN) {\n    len = NORFLASH_ID_LEN;\n  }\n  norflash_read_reg(GD25Q32C_CMD_ID, value, len);\n\n  norflash_post_operation();\n\n  return 0;\n}\n\nint norflash_get_unique_id(uint8_t *value, uint32_t len) {\n  uint32_t param;\n  uint8_t cmd;\n\n  norflash_pre_operation();\n\n  if (flash_list[flash_idx]->id[0] == NORFLASH_XTS_ID_PREFIX) {\n    if (len > XTS_UNIQUE_ID_LEN) {\n      len = XTS_UNIQUE_ID_LEN;\n    }\n    param = XTS_UNIQUE_ID_PARAM;\n    cmd = XTS_UNIQUE_ID_CMD;\n  } else {\n    if (len > NORFLASH_UNIQUE_ID_LEN) {\n      len = NORFLASH_UNIQUE_ID_LEN;\n    }\n    param = 0;\n    cmd = GD25Q32C_CMD_UNIQUE_ID;\n  }\n  norflash_read_reg_ex(cmd, (uint8_t *)¶m, sizeof(param), value, len);\n\n  norflash_post_operation();\n\n  return 0;\n}\n\nstatic void norflash_get_samdly_list(uint32_t div,\n                                     const uint8_t **samdly_list_p,\n                                     uint32_t *size_p) {\n  const uint8_t *samdly_list = NULL;\n  uint32_t size = 0;\n\n#if (CHIP_FLASH_CTRL_VER <= 1)\n  if (div >= 2) {\n    samdly_list = samdly_list_divn;\n    size = ARRAY_SIZE(samdly_list_divn);\n  }\n#else\n  if (div >= 1) {\n    if (div == 1) {\n      samdly_list = samdly_list_div1;\n      size = ARRAY_SIZE(samdly_list_div1);\n    } else {\n      samdly_list = samdly_list_divn;\n      size = ARRAY_SIZE(samdly_list_divn);\n    }\n  }\n#endif\n\n  if (samdly_list_p) {\n    *samdly_list_p = samdly_list;\n  }\n  if (size_p) {\n    *size_p = size;\n  }\n}\n\nvoid norflash_set_sample_delay_index(uint32_t index) {\n  const uint8_t *samdly_list;\n  uint32_t size;\n  uint32_t div;\n\n  sample_delay_index = index;\n\n  div = norflaship_get_div();\n\n  norflash_get_samdly_list(div, &samdly_list, &size);\n\n  if (index < size) {\n#if (CHIP_FLASH_CTRL_VER <= 1)\n    norflaship_pos_neg(samdly_list[index] & SAM_EDGE_FALLING);\n    norflaship_neg_phase(samdly_list[index] & SAM_NEG_PHASE);\n    norflaship_samdly(samdly_list[index] & SAMDLY_MASK);\n#else\n    norflaship_samdly(samdly_list[index]);\n#endif\n  }\n}\n\nuint32_t norflash_get_sample_delay_index(void) { return sample_delay_index; }\n\nstatic bool norflash_calib_flash_id_valid(void) {\n  uint8_t id[HAL_NORFLASH_DEVICE_ID_LEN];\n  const uint8_t *cmp_id;\n\n  norflash_get_id(id, sizeof(id));\n  cmp_id = flash_list[flash_idx]->id;\n\n  if (id[0] == cmp_id[0] && id[1] == cmp_id[1] && id[2] == cmp_id[2]) {\n    return true;\n  }\n  return false;\n}\n\nstatic bool norflash_calib_magic_word_valid(void) {\n  uint32_t magic;\n\n#if (CHIP_FLASH_CTRL_VER <= 1)\n  norflash_read(FLASH_NC_BASE, NULL, 1);\n#endif\n  norflaship_clear_rxfifo();\n#if (FLASH_NC_BASE == FLASH_BASE)\n  hal_cache_invalidate(HAL_CACHE_ID_D_CACHE, FLASH_BASE, sizeof(magic));\n  magic = *(volatile uint32_t *)FLASH_BASE;\n#else\n  magic = *(volatile uint32_t *)FLASH_NC_BASE;\n#endif\n\n  if (magic == BOOT_MAGIC_NUMBER) {\n    return true;\n  }\n  return false;\n}\n\nint norflash_sample_delay_calib(enum DRV_NORFLASH_CALIB_T type) {\n  int i;\n  uint32_t matched_cnt = 0;\n  uint32_t matched_idx = 0;\n  uint32_t div;\n  uint32_t size;\n  bool valid;\n\n  if (type >= DRV_NORFLASH_CALIB_QTY) {\n    return 1;\n  }\n#if defined(ROM_BUILD) || defined(PROGRAMMER)\n  if (type != DRV_NORFLASH_CALIB_FLASH_ID) {\n    return 0;\n  }\n#endif\n\n  div = norflaship_get_div();\n\n  if (div == 0) {\n    return -1;\n#if (CHIP_FLASH_CTRL_VER <= 1)\n  } else if (div == 1) {\n    return -2;\n#endif\n  }\n\n  norflash_get_samdly_list(div, NULL, &size);\n\n  for (i = 0; i < size; i++) {\n    norflaship_busy_wait();\n\n    norflash_set_sample_delay_index(i);\n\n    if (type == DRV_NORFLASH_CALIB_FLASH_ID) {\n      valid = norflash_calib_flash_id_valid();\n    } else {\n      valid = norflash_calib_magic_word_valid();\n    }\n\n    if (valid) {\n      if (matched_cnt == 0) {\n        matched_idx = i;\n      }\n      matched_cnt++;\n    } else if (matched_cnt) {\n      break;\n    }\n  }\n\n#ifdef FLASH_CALIB_DEBUG\n  calib_matched_idx[type] = matched_idx;\n  calib_matched_cnt[type] = matched_cnt;\n#endif\n\n  if (matched_cnt) {\n#ifdef SAMP_DELAY_PRIO_FALLING_EDGE\n    if (matched_cnt == 2) {\n      uint32_t falling_edge_idx;\n\n      if (0) {\n#if (CHIP_FLASH_CTRL_VER >= 2)\n      } else if (div == 1) {\n        falling_edge_idx = DIV1_SAMP_DELAY_FALLING_EDGE_IDX;\n#endif\n      } else if (div == 2) {\n        falling_edge_idx = DIV2_SAMP_DELAY_FALLING_EDGE_IDX;\n        if (falling_edge_adj) {\n          falling_edge_idx++;\n        }\n      } else {\n        falling_edge_idx = DIVN_SAMP_DELAY_FALLING_EDGE_IDX;\n      }\n      if (matched_idx <= falling_edge_idx &&\n          falling_edge_idx < matched_idx + matched_cnt) {\n        matched_idx = falling_edge_idx;\n        matched_cnt = 1;\n      }\n    }\n#endif\n    matched_idx += matched_cnt / 2;\n    norflash_set_sample_delay_index(matched_idx);\n\n#ifdef FLASH_CALIB_DEBUG\n    calib_final_idx[type] = matched_idx;\n#endif\n\n    return 0;\n  }\n\n#ifdef FLASH_CALIB_DEBUG\n  calib_final_idx[type] = -1;\n#endif\n\n  return 1;\n}\n\nvoid norflash_show_calib_result(void) {\n#ifdef FLASH_CALIB_DEBUG\n  union DRV_NORFLASH_SPEED_RATIO_T ratio;\n  uint32_t div;\n  uint32_t size;\n  const uint8_t *list;\n  int i;\n\n  TRACE(0, \"FLASH_CALIB_RESULT:\");\n  TRACE(0, \"\\nsource_clk=%u speed=%u flash_max=%u\", norflash_source_clk,\n        norflash_speed, flash_list[flash_idx]->max_speed);\n  ratio = flash_list[flash_idx]->speed_ratio;\n  TRACE(0, \"\\nstd_read=%u/8 others=%u/8\", (ratio.s.std_read + 1),\n        (ratio.s.others + 1));\n\n  div = norflaship_get_div();\n  TRACE(0, \"
\\ndiv=%u\", div);\n  norflash_get_samdly_list(div, &list, &size);\n  TRACE(0, \"\");\n  if (list == NULL || size == 0) {\n    TRACE(0, \"NONE\");\n  } else {\n    DUMP8(\"%02X \", list, size);\n  }\n  TRACE(0, \"\");\n  for (i = 0; i < DRV_NORFLASH_CALIB_QTY; i++) {\n    TRACE(0, \"type=%d idx=%02u cnt=%02u final=%02u\", i, calib_matched_idx[i],\n          calib_matched_cnt[i], calib_final_idx[i]);\n  }\n  TRACE(0, \"\\t\");\n#endif\n}\n\nint norflash_init_sample_delay_by_div(uint32_t div) {\n  if (div == 0) {\n    return -1;\n  }\n  if (div == 1) {\n#if (CHIP_FLASH_CTRL_VER <= 1)\n    return -2;\n#else\n    norflaship_samdly(1);\n#endif\n  } else if (div == 2 && !falling_edge_adj) {\n    // Set sample delay to clock falling edge\n#if (CHIP_FLASH_CTRL_VER <= 1)\n    norflaship_pos_neg(1);\n    norflaship_neg_phase(1);\n    norflaship_samdly(2);\n#else\n    norflaship_samdly(3);\n#endif\n  } else {\n    // Set sample delay to nearest to but not later than clock falling edge\n#if (CHIP_FLASH_CTRL_VER <= 1)\n    norflaship_pos_neg(0);\n    norflaship_neg_phase(0);\n    norflaship_samdly(2);\n#else\n    norflaship_samdly(4);\n#endif\n  }\n\n  return 0;\n}\n\nint norflash_init_div(const struct HAL_NORFLASH_CONFIG_T *cfg) {\n  uint32_t max_speed;\n  uint32_t std_read_speed;\n  uint32_t others_speed;\n  union DRV_NORFLASH_SPEED_RATIO_T ratio;\n  uint32_t div;\n\n#ifdef FLASH_CALIB_DEBUG\n  norflash_source_clk = cfg->source_clk;\n  norflash_speed = cfg->speed;\n#endif\n\n  max_speed = flash_list[flash_idx]->max_speed;\n  ratio = flash_list[flash_idx]->speed_ratio;\n\n  if (max_speed == 0) {\n    max_speed = NORFLASH_DEFAULT_MAX_SPEED;\n  }\n  if (max_speed > cfg->speed) {\n    max_speed = cfg->speed;\n  }\n  if (max_speed > cfg->source_clk) {\n    max_speed = cfg->source_clk;\n  }\n  std_read_speed =\n      max_speed * (1 + ratio.s.std_read) / NORFLASH_SPEED_RATIO_DENOMINATOR;\n  others_speed =\n      max_speed * (1 + ratio.s.others) / NORFLASH_SPEED_RATIO_DENOMINATOR;\n\n  div = (cfg->source_clk + max_speed - 1) / max_speed;\n  div_read = (div < NORFLASH_MAX_DIV) ? div : NORFLASH_MAX_DIV;\n  div = (cfg->source_clk + std_read_speed - 1) / std_read_speed;\n  div_std_read = (div < NORFLASH_MAX_DIV) ? div : NORFLASH_MAX_DIV;\n  div = (cfg->source_clk + others_speed - 1) / others_speed;\n  div_others = (div < NORFLASH_MAX_DIV) ? div : NORFLASH_MAX_DIV;\n\n  if (div_read == 2 && max_speed >= FALLING_EDGE_SAMPLE_ADJ_FREQ) {\n    falling_edge_adj = true;\n  } else {\n    falling_edge_adj = false;\n  }\n\n  if (div_read && div_std_read && div_others) {\n#if (CHIP_FLASH_CTRL_VER <= 1)\n    if (div_read == 1) {\n      return -1;\n    }\n#else\n    if (div_read == 1 && max_speed > NORFLASH_DIV1_MAX_SPEED) {\n      return -1;\n    }\n#endif\n    // Init sample delay according to div_read\n    norflash_init_sample_delay_by_div(div_read);\n    // Still in command mode\n    norflaship_div(div_others);\n    return 0;\n  }\n\n  return 1;\n}\n\nint norflash_match_chip(const uint8_t *id, uint32_t len) {\n  const uint8_t *cmp_id;\n\n  if (len == NORFLASH_ID_LEN) {\n    for (flash_idx = 0; flash_idx < ARRAY_SIZE(flash_list); flash_idx++) {\n      cmp_id = flash_list[flash_idx]->id;\n      if (id[0] == cmp_id[0] && id[1] == cmp_id[1] && id[2] == cmp_id[2]) {\n        return true;\n      }\n    }\n  }\n\n  return false;\n}\n\n#ifdef PUYA_FLASH_ERASE_PAGE_ENABLE\nstatic void norflaship_ext_cmd_addr(uint8_t cmd, uint32_t addr) {\n  uint8_t buff[3];\n\n  buff[2] = (uint8_t)(addr & 0xff);\n  buff[1] = (uint8_t)((addr >> 8) & 0xff);\n  buff[0] = (uint8_t)((addr >> 16) & 0xff);\n\n  norflaship_clear_txfifo();\n  norflaship_write_txfifo(buff, 3);\n  norflaship_ext_tx_cmd(cmd, 3);\n}\n#endif\n\nenum HAL_NORFLASH_RET_T norflash_erase(uint32_t start_address,\n                                       enum DRV_NORFLASH_ERASE_T type,\n                                       int suspend) {\n  enum HAL_NORFLASH_RET_T ret;\n\n  if (flash_list[flash_idx]->mode & HAL_NORFLASH_OP_MODE_ERASE_IN_STD) {\n    if (norflash_op_mode & HAL_NORFLASH_OP_MODE_QUAD_IO) {\n      norflash_set_quad_io_mode(0);\n    } else if (norflash_op_mode & HAL_NORFLASH_OP_MODE_QUAD_OUTPUT) {\n      norflash_set_quad_output_mode(0);\n    }\n  }\n\n  norflaship_cmd_addr(GD25Q32C_CMD_WRITE_ENABLE, start_address);\n  // Need 1us. Or norflash_status_WEL_0_wait(), which needs 6us.\n  switch (type) {\n#ifdef PUYA_FLASH_ERASE_PAGE_ENABLE\n  case DRV_NORFLASH_ERASE_PAGE:\n    norflaship_ext_cmd_addr(PUYA_FLASH_CMD_PAGE_ERASE, start_address);\n    break;\n#endif\n  case DRV_NORFLASH_ERASE_SECTOR:\n    norflaship_cmd_addr(GD25Q32C_CMD_SECTOR_ERASE, start_address);\n    break;\n  case DRV_NORFLASH_ERASE_BLOCK:\n    norflaship_cmd_addr(GD25Q32C_CMD_BLOCK_ERASE, start_address);\n    break;\n  case DRV_NORFLASH_ERASE_CHIP:\n    norflaship_cmd_addr(GD25Q32C_CMD_CHIP_ERASE, start_address);\n    break;\n  }\n\n  norflaship_busy_wait();\n\n#ifdef FLASH_SUSPEND\n  // PUYA flash requires the first delay of erase >= 400us\n  if (flash_list[flash_idx]->id[0] == NORFLASH_PUYA_ID_PREFIX) {\n    norflash_delay(400);\n  }\n#endif\n\n  ret = norflash_status_WIP_1_wait(suspend);\n\n  if (flash_list[flash_idx]->mode & HAL_NORFLASH_OP_MODE_ERASE_IN_STD) {\n    if (norflash_op_mode & HAL_NORFLASH_OP_MODE_QUAD_IO) {\n      norflash_set_quad_io_mode(1);\n    } else if (norflash_op_mode & HAL_NORFLASH_OP_MODE_QUAD_OUTPUT) {\n      norflash_set_quad_output_mode(1);\n    }\n  }\n\n  norflaship_cmd_done();\n\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T norflash_write(uint32_t start_address,\n                                       const uint8_t *buffer, uint32_t len,\n                                       int suspend) {\n  enum HAL_NORFLASH_RET_T ret;\n  uint32_t POSSIBLY_UNUSED remains;\n\n  if (len > GD25Q32C_PAGE_SIZE) {\n    return HAL_NORFLASH_ERR;\n  }\n\n  norflaship_clear_txfifo();\n\n#if (CHIP_FLASH_CTRL_VER >= 2)\n  norflaship_blksize(len);\n#endif\n\n  remains = norflaship_write_txfifo(buffer, len);\n\n  norflaship_cmd_addr(GD25Q32C_CMD_WRITE_ENABLE, start_address);\n  if (norflash_op_mode & HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM) {\n    norflaship_cmd_addr(GD25Q32C_CMD_QUAD_PAGE_PROGRAM, start_address);\n  } else if (norflash_op_mode & HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM) {\n    norflaship_cmd_addr(GD25Q32C_CMD_DUAL_PAGE_PROGRAM, start_address);\n  } else {\n    norflaship_cmd_addr(GD25Q32C_CMD_PAGE_PROGRAM, start_address);\n  }\n\n#if (CHIP_FLASH_CTRL_VER >= 2)\n  while (remains > 0) {\n    buffer += len - remains;\n    len = remains;\n    remains = norflaship_write_txfifo(buffer, len);\n  }\n#endif\n\n  norflaship_busy_wait();\n\n#ifdef FLASH_SUSPEND\n  // PUYA flash requires the first delay of byte program >= 450us\n  if (flash_list[flash_idx]->id[0] == NORFLASH_PUYA_ID_PREFIX &&\n      len < GD25Q32C_PAGE_SIZE) {\n    norflash_delay(450);\n  }\n#endif\n\n  ret = norflash_status_WIP_1_wait(suspend);\n\n  norflaship_cmd_done();\n\n  return ret;\n}\n\n#ifdef FLASH_SUSPEND\nenum HAL_NORFLASH_RET_T norflash_erase_resume(int suspend) {\n  // TODO: Need to check SUS1 bit in status reg?\n\n  enum HAL_NORFLASH_RET_T ret;\n\n  norflash_pre_operation();\n\n  norflash_resume();\n\n  ret = norflash_status_WIP_1_wait(suspend);\n\n  norflash_post_operation();\n\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T norflash_write_resume(int suspend) {\n  // TODO: Need to check SUS2 bit in status reg?\n\n  return norflash_erase_resume(suspend);\n}\n#endif\n\nint norflash_read(uint32_t start_address, uint8_t *buffer, uint32_t len) {\n  uint32_t index = 0;\n  uint8_t val;\n\n  if (len > NORFLASHIP_RXFIFO_SIZE) {\n    return 1;\n  }\n\n  norflaship_clear_rxfifo();\n\n  norflaship_busy_wait();\n\n  norflaship_blksize(len);\n\n  if (norflash_op_mode & HAL_NORFLASH_OP_MODE_QUAD_IO) {\n    /* Quad , only fast */\n    norflaship_cmd_addr(GD25Q32C_CMD_FAST_QUAD_IO_READ, start_address);\n  } else if (norflash_op_mode & HAL_NORFLASH_OP_MODE_QUAD_OUTPUT) {\n    /* Dual, only fast */\n    norflaship_cmd_addr(GD25Q32C_CMD_FAST_QUAD_OUTPUT_READ, start_address);\n  } else if (norflash_op_mode & HAL_NORFLASH_OP_MODE_DUAL_IO) {\n    /* Dual, only fast */\n    norflaship_cmd_addr(GD25Q32C_CMD_FAST_DUAL_IO_READ, start_address);\n  } else if (norflash_op_mode & HAL_NORFLASH_OP_MODE_DUAL_OUTPUT) {\n    /* Dual, only fast */\n    norflaship_cmd_addr(GD25Q32C_CMD_FAST_DUAL_OUTPUT_READ, start_address);\n  } else if (norflash_op_mode & HAL_NORFLASH_OP_MODE_FAST_SPI) {\n    /* fast */\n    norflaship_cmd_addr(GD25Q32C_CMD_STANDARD_FAST_READ, start_address);\n  } else {\n    /* normal */\n    norflaship_cmd_addr(GD25Q32C_CMD_STANDARD_READ, start_address);\n  }\n\n  while (1) {\n    norflaship_rxfifo_empty_wait();\n\n    val = norflaship_read_rxfifo();\n    if (buffer) {\n      buffer[index] = val;\n    }\n\n    ++index;\n    if (index >= len) {\n      break;\n    }\n  }\n\n  norflaship_cmd_done();\n\n  return 0;\n}\n\nvoid norflash_sleep(void) {\n  norflash_pre_operation();\n#ifdef FLASH_HPM\n  if (norflash_op_mode & HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE) {\n    norflash_set_hpm(0);\n  }\n#endif\n  norflaship_cmd_addr(GD25Q32C_CMD_DEEP_POWER_DOWN, 0);\n}\n\nvoid norflash_wakeup(void) {\n  norflaship_cmd_addr(GD25Q32C_CMD_RELEASE_FROM_DP, 0);\n  // Wait 20us for flash to finish\n  norflash_delay(40);\n#ifdef FLASH_HPM\n  if (norflash_op_mode & HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE) {\n    norflash_set_hpm(1);\n  }\n#endif\n  norflash_post_operation();\n}\n\nint norflash_init_status(uint32_t status) {\n  if (flash_list[flash_idx]->write_status == NULL) {\n    return -1;\n  }\n\n  flash_list[flash_idx]->write_status(DRV_NORFLASH_W_STATUS_INIT, status);\n\n  return 0;\n}\n\nint norflash_set_block_protection(uint32_t bp) {\n  if (flash_list[flash_idx]->write_status == NULL) {\n    return -1;\n  }\n\n  flash_list[flash_idx]->write_status(DRV_NORFLASH_W_STATUS_BP, bp);\n\n  return 0;\n}\n\n#ifdef FLASH_SECURITY_REGISTER\nint norflash_security_register_lock(uint32_t id) {\n  if (flash_list[flash_idx]->write_status == NULL) {\n    return -1;\n  }\n\n  flash_list[flash_idx]->write_status(DRV_NORFLASH_W_STATUS_LB, id);\n\n  return 0;\n}\n\nenum HAL_NORFLASH_RET_T\nnorflash_security_register_erase(uint32_t start_address) {\n  enum HAL_NORFLASH_RET_T ret;\n\n  norflaship_cmd_addr(GD25Q32C_CMD_WRITE_ENABLE, start_address);\n  // Need 1us. Or norflash_status_WEL_0_wait(), which needs 6us.\n\n  norflaship_cmd_addr(GD25Q32C_CMD_SECURITY_REGISTER_ERASE, start_address);\n\n  ret = norflash_status_WIP_1_wait(0);\n\n  norflaship_cmd_done();\n\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T norflash_security_register_write(uint32_t start_address,\n                                                         const uint8_t *buffer,\n                                                         uint32_t len) {\n  enum HAL_NORFLASH_RET_T ret;\n  uint32_t remains;\n\n  // Security register page size might be larger than normal page size\n  // E.g., the size of P25Q32L and P25Q64L is 1024\n\n  norflaship_clear_txfifo();\n\n#if (CHIP_FLASH_CTRL_VER <= 1)\n  uint32_t div = 0;\n\n  if (len > NORFLASHIP_TXFIFO_SIZE) {\n    div = norflaship_get_div();\n\n    // Slow down to avoid tx fifo underflow (it takes about 10 cpu cycles to\n    // fill one byte)\n    norflaship_div(16);\n  }\n\n  remains = norflaship_v1_write_txfifo_safe(buffer, len);\n#else\n  norflaship_blksize(len);\n\n  remains = norflaship_write_txfifo(buffer, len);\n#endif\n\n  norflaship_cmd_addr(GD25Q32C_CMD_WRITE_ENABLE, start_address);\n\n  norflaship_cmd_addr(GD25Q32C_CMD_SECURITY_REGISTER_PROGRAM, start_address);\n\n#if (CHIP_FLASH_CTRL_VER <= 1)\n  if (remains) {\n    norflaship_v1_write_txfifo_all(buffer, len);\n  }\n#else\n  while (remains > 0) {\n    buffer += len - remains;\n    len = remains;\n    remains = norflaship_write_txfifo(buffer, len);\n  }\n#endif\n\n  norflaship_busy_wait();\n\n  ret = norflash_status_WIP_1_wait(0);\n\n#if (CHIP_FLASH_CTRL_VER <= 1)\n  if (div) {\n    // Restore the old div\n    norflaship_div(div);\n  }\n#endif\n\n  norflaship_cmd_done();\n\n  return ret;\n}\n\nint norflash_security_register_read(uint32_t start_address, uint8_t *buffer,\n                                    uint32_t len) {\n  uint32_t index = 0;\n\n  if (len > NORFLASHIP_RXFIFO_SIZE) {\n    return 1;\n  }\n\n  norflaship_clear_rxfifo();\n\n  norflaship_busy_wait();\n\n  norflaship_blksize(len);\n\n  norflaship_cmd_addr(GD25Q32C_CMD_SECURITY_REGISTER_READ, start_address);\n\n  while (1) {\n    norflaship_rxfifo_empty_wait();\n\n    buffer[index] = norflaship_read_rxfifo();\n\n    ++index;\n    if (index >= len) {\n      break;\n    }\n  }\n\n  norflaship_cmd_done();\n\n  return 0;\n}\n\nuint32_t norflash_security_register_enable_read(void) {\n  uint32_t mode;\n\n  mode = norflash_op_mode;\n\n  norflash_set_mode(0);\n\n  norflaship_busy_wait();\n#if (CHIP_FLASH_CTRL_VER <= 1)\n  norflash_read(FLASH_NC_BASE, NULL, 1);\n#endif\n  norflaship_clear_rxfifo();\n  norflaship_busy_wait();\n  norflaship_rdcmd(GD25Q32C_CMD_SECURITY_REGISTER_READ);\n  norflaship_busy_wait();\n\n  return mode;\n}\n\nvoid norflash_security_register_disable_read(uint32_t mode) {\n  norflaship_busy_wait();\n#if (CHIP_FLASH_CTRL_VER <= 1)\n  norflash_read(FLASH_NC_BASE, NULL, 1);\n#endif\n  norflaship_clear_rxfifo();\n  norflaship_busy_wait();\n  norflaship_rdcmd(GD25Q32C_CMD_STANDARD_READ);\n  norflaship_busy_wait();\n\n  norflash_set_mode(mode);\n}\n\n#endif\n"
  },
  {
    "path": "platform/drivers/norflash/norflash_drv.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef DRV_NORFLASH_H\n#define DRV_NORFLASH_H\n\n#include \"plat_types.h\"\n#include \"hal_norflash.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define NORFLASH_ID_LEN                     3\n\nenum DRV_NORFLASH_ERASE_T {\n#ifdef PUYA_FLASH_ERASE_PAGE_ENABLE\n    DRV_NORFLASH_ERASE_PAGE,\n#endif\n    DRV_NORFLASH_ERASE_SECTOR,\n    DRV_NORFLASH_ERASE_BLOCK,\n    DRV_NORFLASH_ERASE_CHIP,\n};\n\nenum DRV_NORFLASH_W_STATUS_T {\n    DRV_NORFLASH_W_STATUS_INIT,\n    DRV_NORFLASH_W_STATUS_QE,\n    DRV_NORFLASH_W_STATUS_LB,\n    DRV_NORFLASH_W_STATUS_BP,\n};\n\nenum SPEED_RATIO_T {\n    SPEED_RATIO_1_EIGHTH,\n    SPEED_RATIO_2_EIGHTH,\n    SPEED_RATIO_3_EIGHTH,\n    SPEED_RATIO_4_EIGHTH,\n    SPEED_RATIO_5_EIGHTH,\n    SPEED_RATIO_6_EIGHTH,\n    SPEED_RATIO_7_EIGHTH,\n    SPEED_RATIO_8_EIGHTH,\n};\n\nenum DRV_NORFLASH_CALIB_T {\n    DRV_NORFLASH_CALIB_FLASH_ID,\n    DRV_NORFLASH_CALIB_MAGIC_WORD,\n\n    DRV_NORFLASH_CALIB_QTY,\n};\n\nunion DRV_NORFLASH_SPEED_RATIO_T {\n    struct {\n        uint8_t std_read    :3;\n        uint8_t others      :3;\n        uint8_t reserved    :2;\n    } s;\n    uint8_t v;\n};\n\nunion DRV_NORFLASH_SEC_REG_CFG_T {\n    struct {\n        uint16_t enabled    :1;\n        uint16_t base       :2;\n        uint16_t size       :2;\n        uint16_t offset     :2;\n        uint16_t cnt        :2;\n        uint16_t pp         :2;\n        uint16_t lb         :2;\n        uint16_t reserved   :3;\n    } s;\n    uint16_t v;\n};\n\ntypedef int (*NORFLASH_WRITE_STATUS_CB)(enum DRV_NORFLASH_W_STATUS_T type, uint32_t param);\n\nstruct NORFLASH_CFG_T {\n    const uint8_t id[NORFLASH_ID_LEN];\n    const union DRV_NORFLASH_SPEED_RATIO_T speed_ratio;\n    const uint8_t crm_en_bits;\n    const uint8_t crm_dis_bits;\n    const uint16_t block_protect_mask;\n    const union DRV_NORFLASH_SEC_REG_CFG_T sec_reg_cfg;\n    const uint16_t page_size;\n    const uint16_t sector_size;\n    const uint32_t block_size;\n    const uint32_t total_size;\n    const uint32_t max_speed;\n    const uint32_t mode;\n    const NORFLASH_WRITE_STATUS_CB write_status;\n};\n\nuint8_t norflash_read_status_s0_s7(void);\n\nuint8_t norflash_read_status_s8_s15(void);\n\nvoid norflash_status_WEL_0_wait(void);\n\nenum HAL_NORFLASH_RET_T norflash_status_WIP_1_wait(int suspend);\n\nuint32_t norflash_get_supported_mode(void);\n\nuint32_t norflash_get_current_mode(void);\n\nunion DRV_NORFLASH_SEC_REG_CFG_T norflash_get_security_register_config(void);\n\nuint32_t norflash_get_block_protect_mask(void);\n\nvoid norflash_reset(void);\n\nint norflash_get_size(uint32_t *total_size, uint32_t *block_size, uint32_t *sector_size, uint32_t *page_size);\n\nint norflash_set_mode(uint32_t op);\n\nint norflash_pre_operation(void);\n\nint norflash_post_operation(void);\n\nint norflash_read_reg(uint8_t cmd, uint8_t *val, uint32_t len);\n\nint norflash_read_reg_ex(uint8_t cmd, uint8_t *param, uint32_t param_len, uint8_t *val, uint32_t len);\n\nint norflash_write_reg(uint8_t cmd, const uint8_t *val, uint32_t len);\n\nint norflash_init_sample_delay_by_div(uint32_t div);\n\nvoid norflash_set_sample_delay_index(uint32_t index);\n\nuint32_t norflash_get_sample_delay_index(void);\n\nint norflash_sample_delay_calib(enum DRV_NORFLASH_CALIB_T type);\n\nvoid norflash_show_calib_result(void);\n\nint norflash_init_div(const struct HAL_NORFLASH_CONFIG_T *cfg);\n\nint norflash_match_chip(const uint8_t *id, uint32_t len);\n\nint norflash_get_id(uint8_t *value, uint32_t len);\n\nint norflash_get_unique_id(uint8_t *value, uint32_t len);\n\nenum HAL_NORFLASH_RET_T norflash_erase(uint32_t start_address, enum DRV_NORFLASH_ERASE_T type, int suspend);\n\nenum HAL_NORFLASH_RET_T norflash_erase_resume(int suspend);\n\nenum HAL_NORFLASH_RET_T norflash_write(uint32_t start_address, const uint8_t *buffer, uint32_t len, int suspend);\n\nenum HAL_NORFLASH_RET_T norflash_write_resume(int suspend);\n\nint norflash_suspend_check_irq(uint32_t irq_num);\n\nint norflash_read(uint32_t start_address, uint8_t *buffer, uint32_t len);\n\nvoid norflash_sleep(void);\n\nvoid norflash_wakeup(void);\n\nint norflash_init_status(uint32_t status);\n\nint norflash_set_block_protection(uint32_t bp);\n\nint norflash_security_register_lock(uint32_t id);\n\nenum HAL_NORFLASH_RET_T norflash_security_register_erase(uint32_t start_address);\n\nenum HAL_NORFLASH_RET_T norflash_security_register_write(uint32_t start_address, const uint8_t *buffer, uint32_t len);\n\nint norflash_security_register_read(uint32_t start_address, uint8_t *buffer, uint32_t len);\n\nuint32_t norflash_security_register_enable_read(void);\n\nvoid norflash_security_register_disable_read(uint32_t mode);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* DRV_NORFLASH_H */\n"
  },
  {
    "path": "platform/drivers/norflash/norflash_en25s80b.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"norflash_en25s80b.h\"\n#include \"hal_norflaship.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"norflash_drv.h\"\n#include \"plat_types.h\"\n\nstatic void POSSIBLY_UNUSED en25s80b_en25s80b_reset(void) {\n  // ip quad mode\n  norflaship_quad_mode(1);\n  norflaship_busy_wait();\n\n  hal_sys_timer_delay(20);\n\n  // quad reset enable\n  norflaship_clear_txfifo();\n  norflaship_cmd_addr(EN25S80B_CMD_QUAD_RESET_ENABLE, 0);\n  norflaship_busy_wait();\n\n  hal_sys_timer_delay(20);\n\n  // quad reset\n  norflaship_clear_txfifo();\n  norflaship_cmd_addr(EN25S80B_CMD_QUAD_RESET, 0);\n  norflaship_busy_wait();\n\n  hal_sys_timer_delay(20);\n\n  // ip spi mode\n  norflaship_quad_mode(0);\n  norflaship_hold_pin(0);\n  norflaship_wpr_pin(0);\n  norflaship_busy_wait();\n\n  hal_sys_timer_delay(20);\n\n  // reset enable\n  norflaship_clear_txfifo();\n  norflaship_cmd_addr(EN25S80B_CMD_SPI_RESET_ENABLE, 0);\n  norflaship_busy_wait();\n\n  hal_sys_timer_delay(20);\n\n  // reset\n  norflaship_clear_txfifo();\n  norflaship_cmd_addr(EN25S80B_CMD_SPI_RESET, 0);\n  norflaship_busy_wait();\n\n  hal_sys_timer_delay(20);\n}\n\nstatic void en25s80b_enter_OTP(void) {\n  norflaship_clear_txfifo();\n  norflaship_cmd_addr(EN25S80B_CMD_ENTER_OTP, 0);\n  norflash_status_WIP_1_wait(0);\n}\n\nstatic void en25s80b_exit_OTP(void) {\n  norflaship_clear_txfifo();\n  norflaship_cmd_addr(EN25S80B_CMD_EXIT_OTP, 0);\n  norflash_status_WIP_1_wait(0);\n}\n\nstatic void en25s80b_write_status_s0_s7(uint8_t status) {\n  norflash_write_reg(EN25S80B_CMD_WRITE_STATUS, &status, 1);\n}\n\nstatic int en25s80b_write_status(enum DRV_NORFLASH_W_STATUS_T type,\n                                 uint32_t param) {\n  uint8_t status;\n\n  if (type == DRV_NORFLASH_W_STATUS_QE) {\n    en25s80b_enter_OTP();\n\n    status = norflash_read_status_s0_s7();\n\n    if (param) {\n      status |= (EN25S80B_WHDIS_BIT_MASK);\n    } else {\n      status &= ~(EN25S80B_WHDIS_BIT_MASK);\n    }\n\n    en25s80b_write_status_s0_s7(status);\n\n    en25s80b_exit_OTP();\n\n    return 0;\n  }\n\n  return 1;\n}\n\nconst struct NORFLASH_CFG_T en25s80b_cfg = {\n    .id =\n        {\n            0x1C,\n            0x38,\n            0x14,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_6_EIGHTH,\n                    .others = SPEED_RATIO_6_EIGHTH,\n                },\n        },\n    .crm_en_bits = 0xA5,\n    .crm_dis_bits = 0xAA,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = false,\n                },\n        },\n    .page_size = EN25S80B_PAGE_SIZE,\n    .sector_size = EN25S80B_SECTOR_SIZE,\n    .block_size = EN25S80B_BLOCK_SIZE,\n    .total_size = EN25S80B_TOTAL_SIZE,\n    .max_speed = 104 * 1000 * 1000,\n    .mode = (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n             HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n             HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n             HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n             HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM |\n             HAL_NORFLASH_OP_MODE_ERASE_IN_STD),\n    .write_status = en25s80b_write_status,\n};\n"
  },
  {
    "path": "platform/drivers/norflash/norflash_en25s80b.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef NORFLASH_EN25S80B_H\n#define NORFLASH_EN25S80B_H\n\n#include \"plat_types.h\"\n\n/* bytes */\n#define EN25S80B_PAGE_SIZE (256)\n#define EN25S80B_SECTOR_SIZE (4096)\n#define EN25S80B_BLOCK_SIZE (32*1024)\n#define EN25S80B_TOTAL_SIZE (1*1024*1024)\n\n/* device cmd : FIXME fixed for EN25S80B */\n#define EN25S80B_CMD_ID 0x9F\n#define EN25S80B_CMD_WRITE_ENABLE 0x06\n#define EN25S80B_CMD_PAGE_PROGRAM 0x02\n#define EN25S80B_CMD_QUAD_PAGE_PROGRAM 0x32\n#define EN25S80B_CMD_BLOCK_ERASE_32K 0x52\n#define EN25S80B_CMD_BLOCK_ERASE_64K 0xD8\n#define EN25S80B_CMD_BLOCK_ERASE EN25S80B_CMD_BLOCK_ERASE_32K\n#define EN25S80B_CMD_SECTOR_ERASE 0x20\n#define EN25S80B_CMD_CHIP_ERASE 0x60\n#define EN25S80B_CMD_READ_STATUS_S0_S7 0x05\n#define EN25S80B_CMD_READ_STATUS_S8_S15 0x35\n#define EN25S80B_CMD_WRITE_STATUS 0x01\n#define EN25S80B_CMD_WRITE_STATUS3 0xC0\n#define EN25S80B_CMD_READ_STATUS3 0x95\n#define EN25S80B_CMD_WRITE_STATUS_S0_S7 0x01\n#define EN25S80B_CMD_WRITE_STATUS_S8_S15 0x31\n#define EN25S80B_CMD_FAST_QUAD_READ 0xEB\n#define EN25S80B_CMD_FAST_DUAL_READ 0xBB\n#define EN25S80B_CMD_STANDARD_READ 0x03\n#define EN25S80B_CMD_STANDARD_FAST_READ 0x0B\n#define EN25S80B_CMD_DEEP_POWER_DOWN 0xB9\n#define EN25S80B_CMD_RELEASE_FROM_DP 0xAB\n#define EN25S80B_CMD_HIGH_PERFORMANCE 0xA3\n\n#define EN25S80B_CMD_QUAD_RESET_ENABLE 0x66\n#define EN25S80B_CMD_QUAD_RESET 0x99\n#define EN25S80B_CMD_SPI_RESET_ENABLE 0x66\n#define EN25S80B_CMD_SPI_RESET 0x99\n\n#define EN25S80B_CMD_EQPI_SET 0x38\n#define EN25S80B_CMD_EQPI_RELEASE 0xff\n\n#define EN25S80B_CMD_ENTER_OTP 0x3A\n#define EN25S80B_CMD_EXIT_OTP 0x04\n\n/* device register */\n/* status register */\n#define EN25S80B_WIP_BIT_SHIFT 0\n#define EN25S80B_WIP_BIT_MASK ((0x1)<>= 8;\n      bp_mask >>= 8;\n      status_s8_s15 = (status_s8_s15 & ~bp_mask) | (param & bp_mask);\n    } else if (type == DRV_NORFLASH_W_STATUS_LB) {\n      cfg = norflash_get_security_register_config();\n      if (!cfg.s.enabled) {\n        return 2;\n      }\n      if (cfg.s.lb == SEC_REG_LB_S11_S13) {\n        if (param >= 3) {\n          return 3;\n        }\n        status_s8_s15 |= (STATUS_S11_LB1_BIT_MASK << param);\n      } else if (cfg.s.lb == SEC_REG_LB_S10) {\n        status_s8_s15 |= STATUS_S10_LB_BIT_MASK;\n      } else {\n        return 4;\n      }\n    }\n\n    gd25lq32c_write_status_s0_s15(status_s0_s7 | (status_s8_s15 << 8), 2);\n  } else {\n    gd25lq32c_write_status_s0_s15(status_s0_s7, 1);\n  }\n\n  return 0;\n}\n\n// ----------------------\n// GigaDevice\n// ----------------------\n\nconst struct NORFLASH_CFG_T gd25lq64c_cfg = {\n    .id =\n        {\n            0xC8,\n            0x60,\n            0x17,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_6_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_1024,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = GD25LQ64C_TOTAL_SIZE,\n    .max_speed = 104 * 1000 * 1000,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T gd25lq32c_cfg = {\n    .id =\n        {\n            0xC8,\n            0x60,\n            0x16,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_5_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_1024,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = GD25LQ32C_TOTAL_SIZE,\n    .max_speed = 120 * 1000 * 1000,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T gd25lq16c_cfg = {\n    .id =\n        {\n            0xC8,\n            0x60,\n            0x15,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_6_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_512,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = GD25LQ16C_TOTAL_SIZE,\n    .max_speed = 104 * 1000 * 1000,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T gd25lq80c_cfg = {\n    .id =\n        {\n            0xC8,\n            0x60,\n            0x14,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_6_EIGHTH,\n                    .others = SPEED_RATIO_6_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_512,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = GD25LQ80C_TOTAL_SIZE,\n    .max_speed = 104 * 1000 * 1000,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T gd25q80c_cfg = {\n    .id =\n        {\n            0xC8,\n            0x40,\n            0x14,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_5_EIGHTH,\n                    .others = SPEED_RATIO_5_EIGHTH,\n                },\n        },\n    .crm_en_bits = 0xA0,\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X0000,\n                    .size = SEC_REG_SIZE_256,\n                    .offset = SEC_REG_OFFSET_0X0100,\n                    .cnt = SEC_REG_CNT_4,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S10,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = GD25Q80C_TOTAL_SIZE,\n#ifdef FLASH_HPM\n    .max_speed = 120 * 1000 * 1000,\n#else\n    .max_speed = 104 * 1000 * 1000,\n#endif\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n#ifdef FLASH_HPM\n         HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE |\n#endif\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T gd25d40c_cfg = {\n    .id =\n        {\n            0xC8,\n            0x40,\n            0x13,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_6_EIGHTH,\n                    .others = SPEED_RATIO_6_EIGHTH,\n                },\n        },\n    .crm_en_bits = 0,\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x1C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = false,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = GD25D40C_TOTAL_SIZE,\n    .max_speed = 80 * 1000 * 1000,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_PAGE_PROGRAM),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T gd25d20c_cfg = {\n    .id =\n        {\n            0xC8,\n            0x40,\n            0x12,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_6_EIGHTH,\n                    .others = SPEED_RATIO_6_EIGHTH,\n                },\n        },\n    .crm_en_bits = 0,\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x1C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = false,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = GD25D20C_TOTAL_SIZE,\n    .max_speed = 80 * 1000 * 1000,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_PAGE_PROGRAM),\n    .write_status = gd25lq32c_write_status,\n};\n\n// ----------------------\n// Puya\n// ----------------------\n\nconst struct NORFLASH_CFG_T p25q16l_cfg = {\n    .id =\n        {\n            0x85,\n            0x60,\n            0x15,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_3_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_512,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = P25Q16L_TOTAL_SIZE,\n    .max_speed =\n        70 * 1000 * 1000, // P25Q80L=70M, P25Q80H=104M, P25Q80U=70M/104M\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T p25q80h_cfg = {\n    .id =\n        {\n            0x85,\n            0x60,\n            0x14,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_3_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_512,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = P25Q80H_TOTAL_SIZE,\n    .max_speed =\n        70 * 1000 * 1000, // P25Q80L=70M, P25Q80H=104M, P25Q80U=70M/104M\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T p25q40h_cfg = {\n    .id =\n        {\n            0x85,\n            0x60,\n            0x13,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_3_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_512,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = P25Q40H_TOTAL_SIZE,\n    .max_speed =\n        70 * 1000 * 1000, // P25Q21L=70M, P25Q21H=104M, P25Q21U=70M/104M\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T p25q21h_cfg = {\n    .id =\n        {\n            0x85,\n            0x40,\n            0x12,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_3_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_512,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = P25Q21H_TOTAL_SIZE,\n    .max_speed =\n        70 * 1000 * 1000, // P25Q21L=70M, P25Q21H=104M, P25Q21U=70M/104M\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n\n// ----------------------\n// XTS\n// ----------------------\n\nconst struct NORFLASH_CFG_T xt25q08b_cfg = {\n    .id =\n        {\n            0x0B,\n            0x60,\n            0x14,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_7_EIGHTH,\n                    .others = SPEED_RATIO_7_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x403C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X0000,\n                    .size = SEC_REG_SIZE_256,\n                    .offset = SEC_REG_OFFSET_0X0100,\n                    .cnt = SEC_REG_CNT_4,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S10,\n                },\n        },\n    .page_size = GD25LQ32C_PAGE_SIZE,\n    .sector_size = GD25LQ32C_SECTOR_SIZE,\n    .block_size = GD25LQ32C_BLOCK_SIZE,\n    .total_size = XT25Q08B_TOTAL_SIZE,\n    .max_speed = 96 * 1000 * 1000,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25lq32c_write_status,\n};\n"
  },
  {
    "path": "platform/drivers/norflash/norflash_gd25lq32c.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef NORFLASH_GD25LQ32C_H\n#define NORFLASH_GD25LQ32C_H\n\n#include \"plat_types.h\"\n\n/* bytes */\n#define GD25LQ32C_PAGE_SIZE (256)\n#define GD25LQ32C_SECTOR_SIZE (4096)\n#define GD25LQ32C_BLOCK_SIZE (32*1024)\n#define GD25LQ32C_TOTAL_SIZE (4*1024*1024)\n\n#define GD25LQ64C_TOTAL_SIZE (8*1024*1024)\n\n#define GD25LQ16C_TOTAL_SIZE (2*1024*1024)\n\n#define GD25LQ80C_TOTAL_SIZE (1*1024*1024)\n\n#define GD25Q80C_TOTAL_SIZE (1*1024*1024)\n\n#define GD25D40C_TOTAL_SIZE (512*1024)\n\n#define GD25D20C_TOTAL_SIZE (256*1024)\n\n#define P25Q16L_TOTAL_SIZE (2*1024*1024)\n\n#define P25Q80H_TOTAL_SIZE (1*1024*1024)\n\n#define P25Q21H_TOTAL_SIZE (256*1024)\n\n#define P25Q40H_TOTAL_SIZE (512*1024)\n\n#define XT25Q08B_TOTAL_SIZE (1*1024*1024)\n\n/* device cmd */\n#define GD25LQ32C_CMD_ID 0x9F\n#define GD25LQ32C_CMD_WRITE_ENABLE 0x06\n#define GD25LQ32C_CMD_PAGE_PROGRAM 0x02\n#define GD25LQ32C_CMD_QUAD_PAGE_PROGRAM 0x32\n#define GD25LQ32C_CMD_BLOCK_ERASE_32K 0x52\n#define GD25LQ32C_CMD_BLOCK_ERASE_64K 0xD8\n#define GD25LQ32C_CMD_BLOCK_ERASE GD25LQ32C_CMD_BLOCK_ERASE_32K\n#define GD25LQ32C_CMD_SECTOR_ERASE 0x20\n#define GD25LQ32C_CMD_CHIP_ERASE 0x60\n#define GD25LQ32C_CMD_READ_STATUS_S0_S7 0x05\n#define GD25LQ32C_CMD_READ_STATUS_S8_S15 0x35\n#define GD25LQ32C_CMD_WRITE_STATUS 0x01\n\n#define GD25LQ32C_CMD_FAST_QUAD_READ 0xEB\n#define GD25LQ32C_CMD_FAST_DUAL_READ 0xBB\n#define GD25LQ32C_CMD_STANDARD_READ 0x03\n#define GD25LQ32C_CMD_STANDARD_FAST_READ 0x0B\n#define GD25LQ32C_CMD_DEEP_POWER_DOWN 0xB9\n#define GD25LQ32C_CMD_RELEASE_FROM_DP 0xAB\n\n/* device register */\n/* status register _S0_S7*/\n#define GD25LQ32C_WIP_BIT_SHIFT 0\n#define GD25LQ32C_WIP_BIT_MASK ((0x1)<> 8) & 0xFF);\n    return 0;\n  }\n\n  if (type == DRV_NORFLASH_W_STATUS_BP) {\n    bp_mask = norflash_get_block_protect_mask();\n    status_s0_s7 = norflash_read_status_s0_s7();\n    status_s0_s7 = (status_s0_s7 & ~bp_mask) | (param & bp_mask);\n    gd25q32c_write_status_s0_s7(status_s0_s7);\n    if ((bp_mask & ~0xFF) == 0) {\n      return 0;\n    }\n  }\n\n  status_s8_s15 = norflash_read_status_s8_s15();\n\n  if (type == DRV_NORFLASH_W_STATUS_QE) {\n    if (param) {\n      status_s8_s15 |= GD25Q32C_QE_BIT_MASK;\n    } else {\n      status_s8_s15 &= ~(GD25Q32C_QE_BIT_MASK);\n    }\n  } else if (type == DRV_NORFLASH_W_STATUS_BP) {\n    param >>= 8;\n    bp_mask >>= 8;\n    status_s8_s15 = (status_s8_s15 & ~bp_mask) | (param & bp_mask);\n  } else if (type == DRV_NORFLASH_W_STATUS_LB) {\n    cfg = norflash_get_security_register_config();\n    if (!cfg.s.enabled) {\n      return 2;\n    }\n    if (cfg.s.lb == SEC_REG_LB_S11_S13) {\n      if (param >= 3) {\n        return 3;\n      }\n      status_s8_s15 |= (STATUS_S11_LB1_BIT_MASK << param);\n    } else if (cfg.s.lb == SEC_REG_LB_S10) {\n      status_s8_s15 |= STATUS_S10_LB_BIT_MASK;\n    } else {\n      return 4;\n    }\n  }\n\n  gd25q32c_write_status_s8_s15(status_s8_s15);\n\n  return 0;\n}\n\n// ----------------------\n// GigaDevice\n// ----------------------\n\nconst struct NORFLASH_CFG_T gd25q32c_cfg = {\n    .id =\n        {\n            0xC8,\n            0x40,\n            0x16,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_5_EIGHTH,\n                    .others = SPEED_RATIO_5_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_1024,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25Q32C_PAGE_SIZE,\n    .sector_size = GD25Q32C_SECTOR_SIZE,\n    .block_size = GD25Q32C_BLOCK_SIZE,\n    .total_size = GD25Q32C_TOTAL_SIZE,\n#ifdef FLASH_HPM\n    .max_speed = 120 * 1000 * 1000,\n#else\n    // No high performance mode for gd25q32e\n    .max_speed = 104 * 1000 * 1000,\n#endif\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n#ifdef FLASH_HPM\n         HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE |\n#endif\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25q32c_write_status,\n};\n\n// ----------------------\n// Puya\n// ----------------------\n\nconst struct NORFLASH_CFG_T p25q128l_cfg = {\n    .id =\n        {\n            0x85,\n            0x60,\n            0x18,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_3_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_1024,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_1024,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25Q32C_PAGE_SIZE,\n    .sector_size = GD25Q32C_SECTOR_SIZE,\n    .block_size = GD25Q32C_BLOCK_SIZE,\n    .total_size = P25Q128L_TOTAL_SIZE,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .max_speed = 85 * 1000 * 1000,\n    .write_status = gd25q32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T p25q64l_cfg = {\n    .id =\n        {\n            0x85,\n            0x60,\n            0x17,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_3_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_1024,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_1024,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25Q32C_PAGE_SIZE,\n    .sector_size = GD25Q32C_SECTOR_SIZE,\n    .block_size = GD25Q32C_BLOCK_SIZE,\n    .total_size = P25Q64L_TOTAL_SIZE,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .max_speed =\n        70 * 1000 * 1000, // P25Q64L=70M, P25Q64H=120M, P25Q64U=70M/120M\n    .write_status = gd25q32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T p25q32l_cfg = {\n    .id =\n        {\n            0x85,\n            0x60,\n            0x16,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_4_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_1024,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_1024,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25Q32C_PAGE_SIZE,\n    .sector_size = GD25Q32C_SECTOR_SIZE,\n    .block_size = GD25Q32C_BLOCK_SIZE,\n    .total_size = P25Q32L_TOTAL_SIZE,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .max_speed =\n        62 * 1000 * 1000, // P25Q32L=62.5M, P25Q32H=104M, P25Q32U=62.5M/104M\n    .write_status = gd25q32c_write_status,\n};\n\n// ----------------------\n// Xinxin\n// ----------------------\n\n// Additionally, the device supports JEDEC standard manufacturer and device ID\n// and SFDP Register, a 64-bit Unique Serial Number and three 256-bytes Security\n// Registers.\nconst struct NORFLASH_CFG_T xm25qh16c_cfg = {\n    .id =\n        {\n            0x20,\n            0x40,\n            0x15,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_3_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_256,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25Q32C_PAGE_SIZE,\n    .sector_size = GD25Q32C_SECTOR_SIZE,\n    .block_size = GD25Q32C_BLOCK_SIZE,\n    .total_size = XM25QH16C_TOTAL_SIZE,\n    .max_speed = 108 * 1000 * 1000,\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25q32c_write_status,\n};\n\nconst struct NORFLASH_CFG_T xm25qh80b_cfg = {\n    .id =\n        {\n            0x20,\n            0x40,\n            0x14,\n        },\n    .speed_ratio =\n        {\n            .s =\n                {\n                    .std_read = SPEED_RATIO_7_EIGHTH,\n                    .others = SPEED_RATIO_8_EIGHTH,\n                },\n        },\n    .crm_en_bits = (1 << 5) | (0 << 4),\n    .crm_dis_bits = 0,\n    .block_protect_mask = 0x407C,\n    .sec_reg_cfg =\n        {\n            .s =\n                {\n                    .enabled = true,\n                    .base = SEC_REG_BASE_0X1000,\n                    .size = SEC_REG_SIZE_256,\n                    .offset = SEC_REG_OFFSET_0X1000,\n                    .cnt = SEC_REG_CNT_3,\n                    .pp = SEC_REG_PP_256,\n                    .lb = SEC_REG_LB_S11_S13,\n                },\n        },\n    .page_size = GD25Q32C_PAGE_SIZE,\n    .sector_size = GD25Q32C_SECTOR_SIZE,\n    .block_size = GD25Q32C_BLOCK_SIZE,\n    .total_size = XM25QH80B_TOTAL_SIZE,\n    .max_speed =\n        60 * 1000 *\n        1000, // 104M (std_read=50M or 3/8) when HFM=1 (S20 or SR3-bit4)\n    .mode =\n        (HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n         HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n         HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n         HAL_NORFLASH_OP_MODE_CONTINUOUS_READ | HAL_NORFLASH_OP_MODE_READ_WRAP |\n         HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n         HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM | HAL_NORFLASH_OP_MODE_SUSPEND),\n    .write_status = gd25q32c_write_status,\n};\n"
  },
  {
    "path": "platform/drivers/norflash/norflash_gd25q32c.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef NORFLASH_GD25Q32C_H\n#define NORFLASH_GD25Q32C_H\n\n#include \"plat_types.h\"\n\n/* bytes */\n#define GD25Q32C_PAGE_SIZE (256)\n#define GD25Q32C_SECTOR_SIZE (4096)\n#define GD25Q32C_BLOCK_SIZE (32*1024)\n#define GD25Q32C_TOTAL_SIZE (4*1024*1024)\n\n#define P25Q32L_TOTAL_SIZE (4*1024*1024)\n\n#define P25Q64L_TOTAL_SIZE (8*1024*1024)\n\n#define P25Q128L_TOTAL_SIZE (16*1024*1024)\n\n#define XM25QH16C_TOTAL_SIZE (2*1024*1024)\n\n#define XM25QH80B_TOTAL_SIZE (1*1024*1024)\n\n/* device cmd */\n#define GD25Q32C_CMD_ID 0x9F\n#define GD25Q32C_CMD_WRITE_ENABLE 0x06\n#define GD25Q32C_CMD_PAGE_PROGRAM 0x02\n#define GD25Q32C_CMD_DUAL_PAGE_PROGRAM 0xA2\n#define GD25Q32C_CMD_QUAD_PAGE_PROGRAM 0x32\n#define GD25Q32C_CMD_BLOCK_ERASE_32K 0x52\n#define GD25Q32C_CMD_BLOCK_ERASE_64K 0xD8\n#define GD25Q32C_CMD_BLOCK_ERASE GD25Q32C_CMD_BLOCK_ERASE_32K\n#define GD25Q32C_CMD_SECTOR_ERASE 0x20\n#define GD25Q32C_CMD_CHIP_ERASE 0x60\n#define GD25Q32C_CMD_READ_STATUS_S0_S7 0x05\n#define GD25Q32C_CMD_READ_STATUS_S8_S15 0x35\n#define GD25Q32C_CMD_WRITE_STATUS_S0_S7 0x01\n#define GD25Q32C_CMD_WRITE_STATUS_S8_S15 0x31\n\n#define GD25Q32C_CMD_FAST_QUAD_IO_READ 0xEB\n#define GD25Q32C_CMD_FAST_QUAD_OUTPUT_READ 0x6B\n#define GD25Q32C_CMD_FAST_DUAL_IO_READ 0xBB\n#define GD25Q32C_CMD_FAST_DUAL_OUTPUT_READ 0x3B\n#define GD25Q32C_CMD_STANDARD_READ 0x03\n#define GD25Q32C_CMD_STANDARD_FAST_READ 0x0B\n#define GD25Q32C_CMD_DEEP_POWER_DOWN 0xB9\n#define GD25Q32C_CMD_RELEASE_FROM_DP 0xAB\n#define GD25Q32C_CMD_HIGH_PERFORMANCE 0xA3\n#define GD25Q32C_CMD_SET_BURST_WRAP 0x77\n#define GD25Q32C_CMD_UNIQUE_ID 0x4B\n#define GD25Q32C_CMD_ENABLE_RESET 0x66\n#define GD25Q32C_CMD_RESET 0x99\n#define GD25Q32C_CMD_PROGRAM_ERASE_SUSPEND 0x75\n#define GD25Q32C_CMD_PROGRAM_ERASE_RESUME 0x7A\n#define GD25Q32C_CMD_SECURITY_REGISTER_ERASE 0x44\n#define GD25Q32C_CMD_SECURITY_REGISTER_PROGRAM 0x42\n#define GD25Q32C_CMD_SECURITY_REGISTER_READ 0x48\n\n#define PUYA_FLASH_CMD_PAGE_ERASE 0x81\n\n/* status register _S0_S7*/\n#define GD25Q32C_WIP_BIT_SHIFT 0\n#define GD25Q32C_WIP_BIT_MASK ((0x1)<> PADDING_CYCLES) & 0xFFFF)\n\n#define ANA_PAGE_1 0xA010\n#define ANA_PAGE_0 0xA000\n\nstatic const BOOT_RODATA_SRAM_LOC uint8_t page_reg[3] = {\n    0x00,\n    0x60,\n    0x80,\n};\n\nstatic const BOOT_RODATA_FLASH_LOC struct HAL_SPI_CFG_T spi_cfg = {\n    .clk_delay_half = false,\n    .clk_polarity = false,\n    .slave = false,\n    .dma_rx = false,\n    .dma_tx = false,\n    .rx_sep_line = false,\n    .cs = 0,\n    .rate = 6500000,\n    .tx_bits = 25 + PADDING_CYCLES,\n    .rx_bits = 25 + PADDING_CYCLES,\n    .rx_frame_bits = 0,\n};\n\nstatic bool BOOT_BSS_LOC analogif_inited = false;\n\nstatic int BOOT_TEXT_SRAM_LOC hal_analogif_rawread(unsigned short reg,\n                                                   unsigned short *val) {\n  int ret;\n  unsigned int data;\n  unsigned int cmd;\n\n  data = 0;\n  cmd = ANA_READ_CMD(reg);\n  ret = hal_ispi_recv(&cmd, &data, 4);\n  if (ret) {\n    return ret;\n  }\n  *val = ANA_READ_VAL(data);\n  return 0;\n}\n\nstatic int BOOT_TEXT_SRAM_LOC hal_analogif_rawwrite(unsigned short reg,\n                                                    unsigned short val) {\n  int ret;\n  unsigned int cmd;\n\n  cmd = ANA_WRITE_CMD(reg, val);\n  ret = hal_ispi_send(&cmd, 4);\n  if (ret) {\n    return ret;\n  }\n  return 0;\n}\n\nint BOOT_TEXT_SRAM_LOC hal_analogif_reg_read(unsigned short reg,\n                                             unsigned short *val) {\n  uint32_t lock;\n  uint32_t idx;\n  int ret;\n\n#if defined(USE_CYBERON)\n  extern int cyb_efuse_check_status(void);\n\n  if (cyb_efuse_check_status()) {\n    if (reg == 0x5e) {\n      *val = 49185;\n      return 0;\n    }\n    if (reg == 0x00) {\n      *val = 0x20e0;\n      return 0;\n    }\n  }\n#endif\n\n  if (reg < 0x100) {\n    lock = int_lock();\n    ret = hal_analogif_rawread(reg, val);\n    int_unlock(lock);\n    return ret;\n  } else if (reg >= 0x100 && reg <= 0x15F) {\n    idx = 0;\n  } else if (reg >= 0x160 && reg <= 0x17F) {\n    idx = 1;\n  } else if (reg >= 0x180 && reg <= 0x1FF) {\n    idx = 2;\n  } else {\n    return -1;\n  }\n\n  reg &= 0xFF;\n\n  lock = int_lock();\n  hal_analogif_rawwrite(page_reg[idx], ANA_PAGE_1);\n  ret = hal_analogif_rawread(reg, val);\n  hal_analogif_rawwrite(page_reg[idx], ANA_PAGE_0);\n  int_unlock(lock);\n\n  return ret;\n}\n\nint BOOT_TEXT_SRAM_LOC hal_analogif_reg_write(unsigned short reg,\n                                              unsigned short val) {\n  uint32_t lock;\n  uint32_t idx;\n  int ret;\n\n  if (reg < 0x100) {\n    lock = int_lock();\n    ret = hal_analogif_rawwrite(reg, val);\n    int_unlock(lock);\n    return ret;\n  } else if (reg >= 0x100 && reg <= 0x15F) {\n    idx = 0;\n  } else if (reg >= 0x160 && reg <= 0x17F) {\n    idx = 1;\n  } else if (reg >= 0x180 && reg <= 0x1FF) {\n    idx = 2;\n  } else {\n    return -1;\n  }\n\n  reg &= 0xFF;\n\n  lock = int_lock();\n  hal_analogif_rawwrite(page_reg[idx], ANA_PAGE_1);\n  ret = hal_analogif_rawwrite(reg, val);\n  hal_analogif_rawwrite(page_reg[idx], ANA_PAGE_0);\n  int_unlock(lock);\n\n  return ret;\n}\n\nint BOOT_TEXT_FLASH_LOC hal_analogif_open(void) {\n  int ret;\n  unsigned short chip_id;\n  const struct HAL_SPI_CFG_T *cfg_ptr;\n  struct HAL_SPI_CFG_T cfg;\n\n  if (analogif_inited) {\n    // Restore the nominal rate\n    cfg_ptr = &spi_cfg;\n  } else {\n    analogif_inited = true;\n    // Crystal freq is unknown yet. Let SPI run on half of the nominal rate\n    cfg = spi_cfg;\n    cfg.rate /= 2;\n    cfg_ptr = &cfg;\n  }\n\n  ret = hal_ispi_open(cfg_ptr);\n  if (ret) {\n    return ret;\n  }\n\n  ret = hal_analogif_rawread(ANA_REG_CHIP_ID, &chip_id);\n  if (ret) {\n    return ret;\n  }\n\n  if (GET_BITFIELD(chip_id, ANA_CHIP_ID) != ANA_VAL_CHIP_ID) {\n    return -1;\n  }\n\n  return 0;\n}\n"
  },
  {
    "path": "platform/hal/best2300p/hal_cmu_best2300p.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(reg_cmu)\n#include CHIP_SPECIFIC_HDR(reg_aoncmu)\n#include CHIP_SPECIFIC_HDR(reg_btcmu)\n#include \"cmsis_nvic.h\"\n#include \"hal_aud.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_codec.h\"\n#include \"hal_location.h\"\n#include \"hal_psc.h\"\n#include \"hal_sleep_core_pd.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"system_cp.h\"\n\n#ifdef USB_HIGH_SPEED\n#ifndef USB_USE_USBPLL\n#define USB_USE_USBPLL\n#endif\n#endif\n\n#define CODEC_CLK_FROM_ANA\n\n#define HAL_CMU_USB_PLL_CLOCK (192 * 1000 * 1000)\n#define HAL_CMU_AUD_PLL_CLOCK (CODEC_FREQ_48K_SERIES * CODEC_CMU_DIV)\n\n#define HAL_CMU_USB_CLOCK_60M (60 * 1000 * 1000)\n#define HAL_CMU_USB_CLOCK_48M (48 * 1000 * 1000)\n\n#define HAL_CMU_PLL_LOCKED_TIMEOUT US_TO_TICKS(200)\n#define HAL_CMU_26M_READY_TIMEOUT MS_TO_TICKS(4)\n#define HAL_CMU_LPU_EXTRA_TIMEOUT MS_TO_TICKS(1)\n\n#ifdef CORE_SLEEP_POWER_DOWN\n#define TIMER1_SEL_LOC BOOT_TEXT_SRAM_LOC\n#else\n#define TIMER1_SEL_LOC BOOT_TEXT_FLASH_LOC\n#endif\n\nenum CMU_USB_CLK_SRC_T {\n  CMU_USB_CLK_SRC_PLL_60M = 0,\n  CMU_USB_CLK_SRC_PLL_60M_ALT = 1,\n  CMU_USB_CLK_SRC_PLL_48M = 2,\n  CMU_USB_CLK_SRC_TS = 3,\n  CMU_USB_CLK_SRC_OSC_48M = 4,\n  CMU_USB_CLK_SRC_OSC_24M_X2 = 5,\n  CMU_USB_CLK_SRC_OSC_26M_X4 = 6,\n  CMU_USB_CLK_SRC_OSC_26M_X2 = 7,\n};\n\nenum CMU_AUD_26M_X4_USER_T {\n  CMU_AUD_26M_X4_USER_IIR,\n  CMU_AUD_26M_X4_USER_RS,\n\n  CMU_AUD_26M_X4_USER_QTY,\n};\n\nenum CMU_DEBUG_REG_SEL_T {\n  CMU_DEBUG_REG_SEL_MCU_PC = 0,\n  CMU_DEBUG_REG_SEL_MCU_LR = 1,\n  CMU_DEBUG_REG_SEL_MCU_SP = 2,\n  CMU_DEBUG_REG_SEL_CP_PC = 3,\n  CMU_DEBUG_REG_SEL_CP_LR = 4,\n  CMU_DEBUG_REG_SEL_CP_SP = 5,\n  CMU_DEBUG_REG_SEL_DEBUG = 7,\n};\n\nstruct CP_STARTUP_CFG_T {\n  __IO uint32_t stack;\n  __IO uint32_t reset_hdlr;\n  __IO uint32_t entry;\n};\n\nstatic struct CMU_T *const cmu = (struct CMU_T *)CMU_BASE;\n\nstatic struct AONCMU_T *const aoncmu = (struct AONCMU_T *)AON_CMU_BASE;\n\nstatic struct BTCMU_T *const POSSIBLY_UNUSED btcmu =\n    (struct BTCMU_T *)BT_CMU_BASE;\n\nstatic struct CP_STARTUP_CFG_T *const cp_cfg =\n    (struct CP_STARTUP_CFG_T *)0x200F7FE0;\n\n#define HAL_CMU_PLL_USB_HS HAL_CMU_PLL_QTY\n#ifdef USB_USE_USBPLL\n#define PLL_USER_MAP_NUM (HAL_CMU_PLL_QTY + 1)\n#else\n#define PLL_USER_MAP_NUM HAL_CMU_PLL_QTY\n#endif\nstatic uint8_t BOOT_BSS_LOC pll_user_map[PLL_USER_MAP_NUM];\nSTATIC_ASSERT(HAL_CMU_PLL_USER_QTY <= sizeof(pll_user_map[0]) * 8,\n              \"Too many PLL users\");\n\n#ifdef ROM_BUILD\nstatic enum HAL_CMU_USB_CLOCK_SEL_T usb_clk_sel;\n#endif\n\nstatic bool anc_enabled;\n\n#ifdef __AUDIO_RESAMPLE__\nstatic bool aud_resample_en = true;\n#ifdef ANA_26M_X4_ENABLE\nstatic uint8_t aud_26m_x4_map;\nSTATIC_ASSERT(CMU_AUD_26M_X4_USER_QTY <= sizeof(aud_26m_x4_map) * 8,\n              \"Too many aud_26m_x4 users\");\n#endif\n#endif\n\n#ifdef LOW_SYS_FREQ\nstatic enum HAL_CMU_LOW_SYS_FREQ_T BOOT_BSS_LOC low_sys_freq;\nstatic bool BOOT_BSS_LOC low_sys_freq_en;\n#endif\n\nvoid hal_cmu_audio_resample_enable(void) {\n#ifdef __AUDIO_RESAMPLE__\n  aud_resample_en = true;\n#endif\n}\n\nvoid hal_cmu_audio_resample_disable(void) {\n#ifdef __AUDIO_RESAMPLE__\n  aud_resample_en = false;\n#endif\n}\n\nint hal_cmu_get_audio_resample_status(void) {\n#ifdef __AUDIO_RESAMPLE__\n  return aud_resample_en;\n#else\n  return false;\n#endif\n}\n\nstatic inline void aocmu_reg_update_wait(void) {\n  // Make sure AOCMU (26M clock domain) write opertions finish before return\n  aoncmu->CHIP_ID;\n}\n\nint hal_cmu_clock_enable(enum HAL_CMU_MOD_ID_T id) {\n  if (id >= HAL_CMU_AON_MCU) {\n    return 1;\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    cmu->HCLK_ENABLE = (1 << id);\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    cmu->PCLK_ENABLE = (1 << (id - HAL_CMU_MOD_P_CMU));\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    cmu->OCLK_ENABLE = (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    aoncmu->MOD_CLK_ENABLE = (1 << (id - HAL_CMU_AON_A_CMU));\n    aocmu_reg_update_wait();\n  }\n\n  return 0;\n}\n\nint hal_cmu_clock_disable(enum HAL_CMU_MOD_ID_T id) {\n  if (id >= HAL_CMU_AON_MCU) {\n    return 1;\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    cmu->HCLK_DISABLE = (1 << id);\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    cmu->PCLK_DISABLE = (1 << (id - HAL_CMU_MOD_P_CMU));\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    cmu->OCLK_DISABLE = (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    aoncmu->MOD_CLK_DISABLE = (1 << (id - HAL_CMU_AON_A_CMU));\n  }\n\n  return 0;\n}\n\nenum HAL_CMU_CLK_STATUS_T hal_cmu_clock_get_status(enum HAL_CMU_MOD_ID_T id) {\n  uint32_t status;\n\n  if (id >= HAL_CMU_AON_MCU) {\n    return HAL_CMU_CLK_DISABLED;\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    status = cmu->HCLK_ENABLE & (1 << id);\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    status = cmu->PCLK_ENABLE & (1 << (id - HAL_CMU_MOD_P_CMU));\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    status = cmu->OCLK_ENABLE & (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    status = aoncmu->MOD_CLK_ENABLE & (1 << (id - HAL_CMU_AON_A_CMU));\n  }\n\n  return status ? HAL_CMU_CLK_ENABLED : HAL_CMU_CLK_DISABLED;\n}\n\nint hal_cmu_clock_set_mode(enum HAL_CMU_MOD_ID_T id,\n                           enum HAL_CMU_CLK_MODE_T mode) {\n  __IO uint32_t *reg;\n  uint32_t val;\n  uint32_t lock;\n\n  if (id >= HAL_CMU_AON_MCU) {\n    return 1;\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    reg = &cmu->HCLK_MODE;\n    val = (1 << id);\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    reg = &cmu->PCLK_MODE;\n    val = (1 << (id - HAL_CMU_MOD_P_CMU));\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    reg = &cmu->OCLK_MODE;\n    val = (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    reg = &aoncmu->MOD_CLK_MODE;\n    val = (1 << (id - HAL_CMU_AON_A_CMU));\n  }\n\n  lock = int_lock();\n  if (mode == HAL_CMU_CLK_MANUAL) {\n    *reg |= val;\n  } else {\n    *reg &= ~val;\n  }\n  int_unlock(lock);\n\n  return 0;\n}\n\nenum HAL_CMU_CLK_MODE_T hal_cmu_clock_get_mode(enum HAL_CMU_MOD_ID_T id) {\n  uint32_t mode;\n\n  if (id >= HAL_CMU_AON_MCU) {\n    return HAL_CMU_CLK_AUTO;\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    mode = cmu->HCLK_MODE & (1 << id);\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    mode = cmu->PCLK_MODE & (1 << (id - HAL_CMU_MOD_P_CMU));\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    mode = cmu->OCLK_MODE & (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    mode = aoncmu->MOD_CLK_MODE & (1 << (id - HAL_CMU_AON_A_CMU));\n  }\n\n  return mode ? HAL_CMU_CLK_MANUAL : HAL_CMU_CLK_AUTO;\n}\n\nint hal_cmu_reset_set(enum HAL_CMU_MOD_ID_T id) {\n  if (id >= HAL_CMU_MOD_QTY) {\n    return 1;\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    cmu->HRESET_SET = (1 << id);\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    cmu->PRESET_SET = (1 << (id - HAL_CMU_MOD_P_CMU));\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    cmu->ORESET_SET = (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    aoncmu->RESET_SET = (1 << (id - HAL_CMU_AON_A_CMU));\n  }\n\n  return 0;\n}\n\nint hal_cmu_reset_clear(enum HAL_CMU_MOD_ID_T id) {\n  if (id >= HAL_CMU_MOD_QTY) {\n    return 1;\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    cmu->HRESET_CLR = (1 << id);\n    asm volatile(\"nop; nop;\");\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    cmu->PRESET_CLR = (1 << (id - HAL_CMU_MOD_P_CMU));\n    asm volatile(\"nop; nop; nop; nop;\");\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    cmu->ORESET_CLR = (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    aoncmu->RESET_CLR = (1 << (id - HAL_CMU_AON_A_CMU));\n    aocmu_reg_update_wait();\n  }\n\n  return 0;\n}\n\nenum HAL_CMU_RST_STATUS_T hal_cmu_reset_get_status(enum HAL_CMU_MOD_ID_T id) {\n  uint32_t status;\n\n  if (id >= HAL_CMU_MOD_QTY) {\n    return HAL_CMU_RST_SET;\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    status = cmu->HRESET_SET & (1 << id);\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    status = cmu->PRESET_SET & (1 << (id - HAL_CMU_MOD_P_CMU));\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    status = cmu->ORESET_SET & (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    status = aoncmu->RESET_SET & (1 << (id - HAL_CMU_AON_A_CMU));\n  }\n\n  return status ? HAL_CMU_RST_CLR : HAL_CMU_RST_SET;\n}\n\nint hal_cmu_reset_pulse(enum HAL_CMU_MOD_ID_T id) {\n  volatile int i;\n\n  if (id >= HAL_CMU_MOD_QTY) {\n    return 1;\n  }\n\n  if (hal_cmu_reset_get_status(id) == HAL_CMU_RST_SET) {\n    return hal_cmu_reset_clear(id);\n  }\n\n  if (id < HAL_CMU_MOD_P_CMU) {\n    cmu->HRESET_PULSE = (1 << id);\n  } else if (id < HAL_CMU_MOD_O_SLEEP) {\n    cmu->PRESET_PULSE = (1 << (id - HAL_CMU_MOD_P_CMU));\n  } else if (id < HAL_CMU_AON_A_CMU) {\n    cmu->ORESET_PULSE = (1 << (id - HAL_CMU_MOD_O_SLEEP));\n  } else {\n    aoncmu->RESET_PULSE = (1 << (id - HAL_CMU_AON_A_CMU));\n    // Total 3 CLK-26M cycles needed\n    // AOCMU runs in 26M clock domain and its read operations consume at least 1\n    // 26M-clock cycle. (Whereas its write operations will finish at 1 HCLK\n    // cycle -- finish once in async bridge fifo)\n    aoncmu->CHIP_ID;\n    aoncmu->CHIP_ID;\n    aoncmu->CHIP_ID;\n  }\n  // Delay 5+ PCLK cycles (10+ HCLK cycles)\n  for (i = 0; i < 3; i++)\n    ;\n\n  return 0;\n}\n\nint hal_cmu_timer_set_div(enum HAL_CMU_TIMER_ID_T id, uint32_t div) {\n  uint32_t lock;\n\n  if (div < 1) {\n    return 1;\n  }\n\n  div -= 1;\n  if ((div & (CMU_CFG_DIV_TIMER00_MASK >> CMU_CFG_DIV_TIMER00_SHIFT)) != div) {\n    return 1;\n  }\n\n  lock = int_lock();\n  if (id == HAL_CMU_TIMER_ID_00) {\n    cmu->TIMER0_CLK = SET_BITFIELD(cmu->TIMER0_CLK, CMU_CFG_DIV_TIMER00, div);\n  } else if (id == HAL_CMU_TIMER_ID_01) {\n    cmu->TIMER0_CLK = SET_BITFIELD(cmu->TIMER0_CLK, CMU_CFG_DIV_TIMER01, div);\n  } else if (id == HAL_CMU_TIMER_ID_10) {\n    cmu->TIMER1_CLK = SET_BITFIELD(cmu->TIMER1_CLK, CMU_CFG_DIV_TIMER10, div);\n  } else if (id == HAL_CMU_TIMER_ID_11) {\n    cmu->TIMER1_CLK = SET_BITFIELD(cmu->TIMER1_CLK, CMU_CFG_DIV_TIMER11, div);\n  } else if (id == HAL_CMU_TIMER_ID_20) {\n    cmu->TIMER2_CLK = SET_BITFIELD(cmu->TIMER2_CLK, CMU_CFG_DIV_TIMER20, div);\n  } else if (id == HAL_CMU_TIMER_ID_21) {\n    cmu->TIMER2_CLK = SET_BITFIELD(cmu->TIMER2_CLK, CMU_CFG_DIV_TIMER21, div);\n  }\n  int_unlock(lock);\n\n  return 0;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_timer0_select_fast(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  // 6.5M\n  cmu->PERIPH_CLK |= (1 << CMU_SEL_TIMER_FAST_SHIFT);\n  // AON Timer\n  aoncmu->CLK_SELECT |= AON_CMU_SEL_TIMER_FAST;\n  int_unlock(lock);\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_timer0_select_slow(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  // 16K\n  cmu->PERIPH_CLK &= ~(1 << CMU_SEL_TIMER_FAST_SHIFT);\n  // AON Timer\n  aoncmu->CLK_SELECT &= ~AON_CMU_SEL_TIMER_FAST;\n  int_unlock(lock);\n}\n\nvoid TIMER1_SEL_LOC hal_cmu_timer1_select_fast(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  // 6.5M\n  cmu->PERIPH_CLK |= (1 << (CMU_SEL_TIMER_FAST_SHIFT + 1));\n  int_unlock(lock);\n}\n\nvoid TIMER1_SEL_LOC hal_cmu_timer1_select_slow(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  // 16K\n  cmu->PERIPH_CLK &= ~(1 << (CMU_SEL_TIMER_FAST_SHIFT + 1));\n  int_unlock(lock);\n}\n\nvoid hal_cmu_timer2_select_fast(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  // 6.5M\n  cmu->PERIPH_CLK |= (1 << (CMU_SEL_TIMER_FAST_SHIFT + 2));\n  int_unlock(lock);\n}\n\nvoid hal_cmu_timer2_select_slow(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  // 16K\n  cmu->PERIPH_CLK &= ~(1 << (CMU_SEL_TIMER_FAST_SHIFT + 2));\n  int_unlock(lock);\n}\n\nint hal_cmu_sdmmc_set_pll_div(uint32_t div) {\n  uint32_t lock;\n  if (div < 2) {\n    return 1;\n  }\n  div -= 2;\n  if ((div & (CMU_CFG_DIV_SDMMC_MASK >> CMU_CFG_DIV_SDMMC_SHIFT)) != div) {\n    return 1;\n  }\n  lock = int_lock();\n  cmu->PERIPH_CLK = SET_BITFIELD(cmu->PERIPH_CLK, CMU_CFG_DIV_SDMMC, div) |\n                    CMU_SEL_OSCX2_SDMMC | CMU_SEL_PLL_SDMMC | CMU_EN_PLL_SDMMC;\n  int_unlock(lock);\n  return 0;\n}\n\n#ifdef OSC_26M_X4_AUD2BB\n\n// Any of 78M/104M/208M is changed to 26M x4 (104M)\n\n#define SYS_SET_FREQ_FUNC(f, F, CLK_OV)                                        \\\n  int hal_cmu_##f##_set_freq(enum HAL_CMU_FREQ_T freq) {                       \\\n    uint32_t enable;                                                           \\\n    uint32_t disable;                                                          \\\n    if (freq >= HAL_CMU_FREQ_QTY) {                                            \\\n      return 1;                                                                \\\n    }                                                                          \\\n    if (freq == HAL_CMU_FREQ_32K) {                                            \\\n      enable = 0;                                                              \\\n      disable = CMU_SEL_OSC_##F##_DISABLE | CMU_SEL_OSCX2_##F##_DISABLE |      \\\n                CMU_SEL_PLL_##F##_DISABLE | CMU_RSTN_DIV_##F##_DISABLE |       \\\n                CMU_BYPASS_DIV_##F##_DISABLE;                                  \\\n    } else if (freq == HAL_CMU_FREQ_26M) {                                     \\\n      enable = CMU_SEL_OSC_##F##_ENABLE;                                       \\\n      disable = CMU_SEL_OSCX2_##F##_DISABLE | CMU_SEL_PLL_##F##_DISABLE |      \\\n                CMU_RSTN_DIV_##F##_DISABLE | CMU_BYPASS_DIV_##F##_DISABLE;     \\\n    } else if (freq == HAL_CMU_FREQ_52M) {                                     \\\n      enable = CMU_SEL_OSCX2_##F##_ENABLE;                                     \\\n      disable = CMU_SEL_PLL_##F##_DISABLE | CMU_RSTN_DIV_##F##_DISABLE |       \\\n                CMU_BYPASS_DIV_##F##_DISABLE;                                  \\\n    } else {                                                                   \\\n      enable = CMU_SEL_PLL_##F##_ENABLE | CMU_BYPASS_DIV_##F##_ENABLE;         \\\n      disable = CMU_RSTN_DIV_##F##_DISABLE;                                    \\\n    }                                                                          \\\n    if (enable & CMU_SEL_PLL_##F##_ENABLE) {                                   \\\n      CLK_OV;                                                                  \\\n      cmu->SYS_CLK_ENABLE = CMU_RSTN_DIV_##F##_ENABLE;                         \\\n      if (enable & CMU_BYPASS_DIV_##F##_ENABLE) {                              \\\n        cmu->SYS_CLK_ENABLE = CMU_BYPASS_DIV_##F##_ENABLE;                     \\\n      } else {                                                                 \\\n        cmu->SYS_CLK_DISABLE = CMU_BYPASS_DIV_##F##_DISABLE;                   \\\n      }                                                                        \\\n    }                                                                          \\\n    cmu->SYS_CLK_ENABLE = enable;                                              \\\n    if (enable & CMU_SEL_PLL_##F##_ENABLE) {                                   \\\n      cmu->SYS_CLK_DISABLE = disable;                                          \\\n    } else {                                                                   \\\n      cmu->SYS_CLK_DISABLE = disable & ~(CMU_RSTN_DIV_##F##_DISABLE |          \\\n                                         CMU_BYPASS_DIV_##F##_DISABLE);        \\\n      cmu->SYS_CLK_DISABLE = CMU_BYPASS_DIV_##F##_DISABLE;                     \\\n      cmu->SYS_CLK_DISABLE = CMU_RSTN_DIV_##F##_DISABLE;                       \\\n    }                                                                          \\\n    return 0;                                                                  \\\n  }\n\n#else // !OSC_26M_X4_AUD2BB\n\n#define SYS_SET_FREQ_FUNC(f, F, CLK_OV)                                        \\\n  int hal_cmu_##f##_set_freq(enum HAL_CMU_FREQ_T freq) {                       \\\n    uint32_t lock;                                                             \\\n    uint32_t enable;                                                           \\\n    uint32_t disable;                                                          \\\n    int div = -1;                                                              \\\n    if (freq >= HAL_CMU_FREQ_QTY) {                                            \\\n      return 1;                                                                \\\n    }                                                                          \\\n    if (freq == HAL_CMU_FREQ_32K) {                                            \\\n      enable = 0;                                                              \\\n      disable = CMU_SEL_OSC_##F##_DISABLE | CMU_SEL_OSCX2_##F##_DISABLE |      \\\n                CMU_SEL_PLL_##F##_DISABLE | CMU_RSTN_DIV_##F##_DISABLE |       \\\n                CMU_BYPASS_DIV_##F##_DISABLE;                                  \\\n    } else if (freq == HAL_CMU_FREQ_26M) {                                     \\\n      enable = CMU_SEL_OSC_##F##_ENABLE;                                       \\\n      disable = CMU_SEL_OSCX2_##F##_DISABLE | CMU_SEL_PLL_##F##_DISABLE |      \\\n                CMU_RSTN_DIV_##F##_DISABLE | CMU_BYPASS_DIV_##F##_DISABLE;     \\\n    } else if (freq == HAL_CMU_FREQ_52M) {                                     \\\n      enable = CMU_SEL_OSCX2_##F##_ENABLE;                                     \\\n      disable = CMU_SEL_PLL_##F##_DISABLE | CMU_RSTN_DIV_##F##_DISABLE |       \\\n                CMU_BYPASS_DIV_##F##_DISABLE;                                  \\\n    } else if (freq == HAL_CMU_FREQ_78M) {                                     \\\n      enable = CMU_SEL_PLL_##F##_ENABLE | CMU_RSTN_DIV_##F##_ENABLE;           \\\n      disable = CMU_BYPASS_DIV_##F##_DISABLE;                                  \\\n      div = 1;                                                                 \\\n    } else if (freq == HAL_CMU_FREQ_104M) {                                    \\\n      enable = CMU_SEL_PLL_##F##_ENABLE | CMU_RSTN_DIV_##F##_ENABLE;           \\\n      disable = CMU_BYPASS_DIV_##F##_DISABLE;                                  \\\n      div = 0;                                                                 \\\n    } else {                                                                   \\\n      enable = CMU_SEL_PLL_##F##_ENABLE | CMU_BYPASS_DIV_##F##_ENABLE;         \\\n      disable = CMU_RSTN_DIV_##F##_DISABLE;                                    \\\n    }                                                                          \\\n    if (div >= 0) {                                                            \\\n      CLK_OV;                                                                  \\\n      lock = int_lock();                                                       \\\n      cmu->SYS_DIV = SET_BITFIELD(cmu->SYS_DIV, CMU_CFG_DIV_##F, div);         \\\n      int_unlock(lock);                                                        \\\n    }                                                                          \\\n    if (enable & CMU_SEL_PLL_##F##_ENABLE) {                                   \\\n      cmu->SYS_CLK_ENABLE = CMU_RSTN_DIV_##F##_ENABLE;                         \\\n      if (enable & CMU_BYPASS_DIV_##F##_ENABLE) {                              \\\n        cmu->SYS_CLK_ENABLE = CMU_BYPASS_DIV_##F##_ENABLE;                     \\\n      } else {                                                                 \\\n        cmu->SYS_CLK_DISABLE = CMU_BYPASS_DIV_##F##_DISABLE;                   \\\n      }                                                                        \\\n    }                                                                          \\\n    cmu->SYS_CLK_ENABLE = enable;                                              \\\n    if (enable & CMU_SEL_PLL_##F##_ENABLE) {                                   \\\n      cmu->SYS_CLK_DISABLE = disable;                                          \\\n    } else {                                                                   \\\n      cmu->SYS_CLK_DISABLE = disable & ~(CMU_RSTN_DIV_##F##_DISABLE |          \\\n                                         CMU_BYPASS_DIV_##F##_DISABLE);        \\\n      cmu->SYS_CLK_DISABLE = CMU_BYPASS_DIV_##F##_DISABLE;                     \\\n      cmu->SYS_CLK_DISABLE = CMU_RSTN_DIV_##F##_DISABLE;                       \\\n    }                                                                          \\\n    return 0;                                                                  \\\n  }\n\n#endif // !OSC_26M_X4_AUD2BB\n\n#ifdef MCU_SYS_CLOCK_400M\n#define FLASH_DIV_OFFSET 2\n#elif defined(MCU_SYS_CLOCK_300M)\n#define FLASH_DIV_OFFSET 1\n#else\n#define FLASH_DIV_OFFSET 0\n#endif\n\n#ifdef OSC_26M_X4_AUD2BB\n#define FLASH_FREQ_OV                                                          \\\n  { aoncmu->CLK_OUT |= AON_CMU_SEL_X4_FLS; }\n#else\n#define FLASH_FREQ_OV                                                          \\\n  { div += FLASH_DIV_OFFSET; }\n#endif\n\nBOOT_TEXT_SRAM_LOC SYS_SET_FREQ_FUNC(flash, FLS, FLASH_FREQ_OV);\n\n#ifdef LOW_SYS_FREQ\nvoid hal_cmu_low_sys_clock_set(enum HAL_CMU_LOW_SYS_FREQ_T freq) {\n  uint32_t lock;\n\n  if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0) {\n    return;\n  }\n\n  lock = int_lock();\n  low_sys_freq = freq;\n  hal_cmu_sys_set_freq(hal_sysfreq_get_hw_freq());\n  int_unlock(lock);\n}\n\nint hal_cmu_fast_timer_offline(void) {\n  return low_sys_freq_en && low_sys_freq != HAL_CMU_LOW_SYS_FREQ_13M;\n}\n\nstatic void hal_cmu_osc_to_dig_x4_enable(void) {\n  aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_X4_ANA_ENABLE;\n  aoncmu->CLK_SELECT |= AON_CMU_SEL_X4_SYS;\n  aoncmu->CLK_SELECT |= AON_CMU_SEL_X4_DIG;\n  aoncmu->RESERVED_03C |= AON_CMU_OSC_TO_DIG_X4;\n}\n\nstatic void hal_cmu_osc_to_dig_x4_disable(void) {\n  aoncmu->CLK_SELECT &= ~AON_CMU_SEL_X4_DIG;\n  aoncmu->RESERVED_03C &= ~AON_CMU_OSC_TO_DIG_X4;\n#ifndef OSC_26M_X4_AUD2BB\n  aoncmu->CLK_SELECT &= ~AON_CMU_SEL_X4_SYS;\n#endif\n#ifndef ANA_26M_X4_ENABLE\n  aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_X4_ANA_DISABLE;\n#endif\n}\n\nint hal_cmu_sys_set_freq(enum HAL_CMU_FREQ_T freq) {\n  uint32_t lock;\n  uint32_t enable;\n  uint32_t disable;\n  int div = -1;\n  bool low_sys_set, low_sys_clr;\n\n  if (freq >= HAL_CMU_FREQ_QTY) {\n    return 1;\n  }\n\n  low_sys_set = false;\n  low_sys_clr = false;\n\n  lock = int_lock();\n\n  if (low_sys_freq == HAL_CMU_LOW_SYS_FREQ_NONE) {\n    if (aoncmu->RESERVED_03C & AON_CMU_OSC_TO_DIG_X4) {\n      low_sys_clr = true;\n    }\n  } else {\n    if (freq == HAL_CMU_FREQ_26M) {\n      low_sys_set = true;\n    } else if (freq > HAL_CMU_FREQ_26M) {\n      if (aoncmu->RESERVED_03C & AON_CMU_OSC_TO_DIG_X4) {\n        low_sys_clr = true;\n      }\n    }\n  }\n\n  if (low_sys_clr) {\n    low_sys_freq_en = false;\n    cmu->SYS_CLK_ENABLE = CMU_SEL_OSC_SYS_ENABLE;\n    cmu->SYS_CLK_DISABLE = CMU_SEL_OSCX2_SYS_DISABLE | CMU_SEL_PLL_SYS_DISABLE;\n    hal_cmu_osc_to_dig_x4_disable();\n  }\n  if (low_sys_set) {\n    low_sys_freq_en = true;\n    cmu->SYS_CLK_ENABLE = CMU_SEL_OSC_SYS_ENABLE;\n    cmu->SYS_CLK_DISABLE = CMU_SEL_OSCX2_SYS_DISABLE | CMU_SEL_PLL_SYS_DISABLE;\n    hal_cmu_osc_to_dig_x4_enable();\n    freq = HAL_CMU_FREQ_208M;\n  }\n\n  if (freq == HAL_CMU_FREQ_32K) {\n    enable = 0;\n    disable = CMU_SEL_OSC_SYS_DISABLE | CMU_SEL_OSCX2_SYS_DISABLE |\n              CMU_SEL_PLL_SYS_DISABLE | CMU_RSTN_DIV_SYS_DISABLE |\n              CMU_BYPASS_DIV_SYS_DISABLE;\n  } else if (freq == HAL_CMU_FREQ_26M) {\n    enable = CMU_SEL_OSC_SYS_ENABLE;\n    disable = CMU_SEL_OSCX2_SYS_DISABLE | CMU_SEL_PLL_SYS_DISABLE |\n              CMU_RSTN_DIV_SYS_DISABLE | CMU_BYPASS_DIV_SYS_DISABLE;\n  } else if (freq == HAL_CMU_FREQ_52M) {\n    enable = CMU_SEL_OSCX2_SYS_ENABLE;\n    disable = CMU_SEL_PLL_SYS_DISABLE | CMU_RSTN_DIV_SYS_DISABLE |\n              CMU_BYPASS_DIV_SYS_DISABLE;\n#ifndef OSC_26M_X4_AUD2BB\n  } else if (freq == HAL_CMU_FREQ_78M) {\n    enable = CMU_SEL_PLL_SYS_ENABLE | CMU_RSTN_DIV_SYS_ENABLE;\n    disable = CMU_BYPASS_DIV_SYS_DISABLE;\n    div = 1;\n  } else if (freq == HAL_CMU_FREQ_104M) {\n    enable = CMU_SEL_PLL_SYS_ENABLE | CMU_RSTN_DIV_SYS_ENABLE;\n    disable = CMU_BYPASS_DIV_SYS_DISABLE;\n    div = 0;\n#endif\n  } else {\n    if (low_sys_set) {\n      if (low_sys_freq == HAL_CMU_LOW_SYS_FREQ_13M) {\n        enable = CMU_SEL_PLL_SYS_ENABLE | CMU_BYPASS_DIV_SYS_ENABLE;\n        disable = CMU_RSTN_DIV_SYS_DISABLE;\n      } else {\n        enable = CMU_SEL_PLL_SYS_ENABLE | CMU_RSTN_DIV_SYS_ENABLE;\n        disable = CMU_BYPASS_DIV_SYS_DISABLE;\n        if (low_sys_freq == HAL_CMU_LOW_SYS_FREQ_6P5M) {\n          div = 0;\n        } else if (low_sys_freq == HAL_CMU_LOW_SYS_FREQ_4P33M) {\n          div = 1;\n        } else {\n          div = 2;\n        }\n      }\n    } else {\n      enable = CMU_SEL_PLL_SYS_ENABLE | CMU_BYPASS_DIV_SYS_ENABLE;\n      disable = CMU_RSTN_DIV_SYS_DISABLE;\n    }\n  }\n  if (div >= 0) {\n    cmu->SYS_DIV = SET_BITFIELD(cmu->SYS_DIV, CMU_CFG_DIV_SYS, div);\n  }\n  if (enable & CMU_SEL_PLL_SYS_ENABLE) {\n    cmu->SYS_CLK_ENABLE = CMU_RSTN_DIV_SYS_ENABLE;\n    if (enable & CMU_BYPASS_DIV_SYS_ENABLE) {\n      cmu->SYS_CLK_ENABLE = CMU_BYPASS_DIV_SYS_ENABLE;\n    } else {\n      cmu->SYS_CLK_DISABLE = CMU_BYPASS_DIV_SYS_DISABLE;\n    }\n  }\n  cmu->SYS_CLK_ENABLE = enable;\n  if (enable & CMU_SEL_PLL_SYS_ENABLE) {\n    cmu->SYS_CLK_DISABLE = disable;\n  } else {\n    cmu->SYS_CLK_DISABLE =\n        disable & ~(CMU_RSTN_DIV_SYS_DISABLE | CMU_BYPASS_DIV_SYS_DISABLE);\n    cmu->SYS_CLK_DISABLE = CMU_BYPASS_DIV_SYS_DISABLE;\n    cmu->SYS_CLK_DISABLE = CMU_RSTN_DIV_SYS_DISABLE;\n  }\n\n  int_unlock(lock);\n\n  return 0;\n}\n#else\nSYS_SET_FREQ_FUNC(sys, SYS, {});\n#endif\n\nint hal_cmu_mem_set_freq(enum HAL_CMU_FREQ_T freq) { return 0; }\n\nenum HAL_CMU_FREQ_T BOOT_TEXT_SRAM_LOC hal_cmu_sys_get_freq(void) {\n  uint32_t sys_clk;\n  uint32_t div;\n\n  sys_clk = cmu->SYS_CLK_ENABLE;\n\n  if (sys_clk & CMU_SEL_PLL_SYS_ENABLE) {\n    if (sys_clk & CMU_BYPASS_DIV_SYS_ENABLE) {\n      return HAL_CMU_FREQ_208M;\n    } else {\n      div = GET_BITFIELD(cmu->SYS_DIV, CMU_CFG_DIV_SYS);\n      if (div == 0) {\n        return HAL_CMU_FREQ_104M;\n      } else if (div == 1) {\n        // (div == 1): 69M\n        return HAL_CMU_FREQ_78M;\n      } else {\n        // (div == 2): 52M\n        // (div == 3): 42M\n        return HAL_CMU_FREQ_52M;\n      }\n    }\n  } else if (sys_clk & CMU_SEL_OSCX2_SYS_ENABLE) {\n    return HAL_CMU_FREQ_52M;\n  } else if (sys_clk & CMU_SEL_OSC_SYS_ENABLE) {\n    return HAL_CMU_FREQ_26M;\n  } else {\n    return HAL_CMU_FREQ_32K;\n  }\n}\n\nint BOOT_TEXT_SRAM_LOC hal_cmu_flash_select_pll(enum HAL_CMU_PLL_T pll) {\n  return hal_cmu_sys_select_pll(pll);\n}\n\nint hal_cmu_mem_select_pll(enum HAL_CMU_PLL_T pll) {\n  return hal_cmu_sys_select_pll(pll);\n}\n\n// hal_cmu_flash_select_pll() requires in BOOT_TEXT_SRAM_LOC\nint BOOT_TEXT_SRAM_LOC hal_cmu_sys_select_pll(enum HAL_CMU_PLL_T pll) {\n  uint32_t lock;\n  uint32_t sel;\n\n  if (pll >= HAL_CMU_PLL_QTY) {\n    return 1;\n  }\n\n  lock = int_lock();\n  // 0/1:bbpll, 2:audpll, 3:usbpll\n  sel = (pll == HAL_CMU_PLL_AUD) ? 2 : 0;\n  aoncmu->CLK_SELECT =\n      SET_BITFIELD(aoncmu->CLK_SELECT, AON_CMU_SEL_PLL_SYS, sel);\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_cmu_get_pll_status(enum HAL_CMU_PLL_T pll) {\n  return !!(aoncmu->TOP_CLK_ENABLE &\n            ((pll == HAL_CMU_PLL_AUD) ? AON_CMU_EN_CLK_TOP_PLLAUD_ENABLE\n                                      : AON_CMU_EN_CLK_TOP_PLLUSB_ENABLE));\n}\n\nint hal_cmu_pll_enable(enum HAL_CMU_PLL_T pll, enum HAL_CMU_PLL_USER_T user) {\n  uint32_t pu_val;\n  uint32_t en_val;\n  uint32_t check;\n  uint32_t lock;\n  uint32_t sel;\n  uint32_t start;\n  uint32_t timeout;\n\n  if (pll >= HAL_CMU_PLL_QTY) {\n    return 1;\n  }\n  if (user >= HAL_CMU_PLL_USER_QTY && user != HAL_CMU_PLL_USER_ALL) {\n    return 2;\n  }\n\n#ifdef USB_USE_USBPLL\n  if (pll == HAL_CMU_PLL_USB && user == HAL_CMU_PLL_USER_USB) {\n    pll = HAL_CMU_PLL_USB_HS;\n  }\n#endif\n\n  if (pll == HAL_CMU_PLL_AUD) {\n    pu_val = AON_CMU_PU_PLLAUD_ENABLE;\n    en_val = AON_CMU_EN_CLK_TOP_PLLAUD_ENABLE;\n    check = AON_CMU_LOCK_PLLAUD;\n#ifdef USB_USE_USBPLL\n  } else if (pll == HAL_CMU_PLL_USB_HS) {\n    pu_val = AON_CMU_PU_PLLUSB_ENABLE;\n    en_val = AON_CMU_EN_CLK_TOP_PLLUSB_ENABLE;\n    check = AON_CMU_LOCK_PLLUSB;\n#endif\n  } else {\n    pu_val = AON_CMU_PU_PLLBB_ENABLE;\n    en_val = AON_CMU_EN_CLK_TOP_PLLBB_ENABLE;\n    check = AON_CMU_LOCK_PLLBB;\n  }\n\n  lock = int_lock();\n  if (pll_user_map[pll] == 0 || user == HAL_CMU_PLL_USER_ALL) {\n#ifndef ROM_BUILD\n    pmu_pll_div_reset_set(pll);\n#endif\n    aoncmu->TOP_CLK_ENABLE = pu_val;\n#ifndef ROM_BUILD\n    hal_sys_timer_delay_us(20);\n    pmu_pll_div_reset_clear(pll);\n    // Wait at least 10us for clock ready\n#endif\n  } else {\n    check = 0;\n  }\n  if (user < HAL_CMU_PLL_USER_QTY) {\n    pll_user_map[pll] |= (1 << user);\n  }\n  if (user == HAL_CMU_PLL_USER_AUD) {\n    // 0/1:audpll, 2:bbpll, 3:usbpll\n    sel = (pll == HAL_CMU_PLL_AUD) ? 0 : 2;\n    aoncmu->CLK_SELECT =\n        SET_BITFIELD(aoncmu->CLK_SELECT, AON_CMU_SEL_PLL_AUD, sel);\n  }\n  // HAL_CMU_PLL_USER_SYS selects PLL in hal_cmu_sys_select_pll()\n  int_unlock(lock);\n\n  start = hal_sys_timer_get();\n  timeout = HAL_CMU_PLL_LOCKED_TIMEOUT;\n  do {\n    if (check) {\n      if (aoncmu->CODEC_DIV & check) {\n        // break;\n      }\n    } else {\n      if (aoncmu->TOP_CLK_ENABLE & en_val) {\n        break;\n      }\n    }\n  } while ((hal_sys_timer_get() - start) < timeout);\n\n  aoncmu->TOP_CLK_ENABLE = en_val;\n\n#ifndef USB_USE_USBPLL\n  if (pll == HAL_CMU_PLL_USB && user == HAL_CMU_PLL_USER_USB) {\n    aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_TOP_PLLBB2_ENABLE;\n  }\n#endif\n\n  return (aoncmu->CODEC_DIV & check) ? 0 : 2;\n}\n\nint hal_cmu_pll_disable(enum HAL_CMU_PLL_T pll, enum HAL_CMU_PLL_USER_T user) {\n  uint32_t lock;\n\n  if (pll >= HAL_CMU_PLL_QTY) {\n    return 1;\n  }\n  if (user >= HAL_CMU_PLL_USER_QTY && user != HAL_CMU_PLL_USER_ALL) {\n    return 2;\n  }\n\n  if (pll == HAL_CMU_PLL_USB && user == HAL_CMU_PLL_USER_USB) {\n#ifdef USB_USE_USBPLL\n    pll = HAL_CMU_PLL_USB_HS;\n#else\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLBB2_DISABLE;\n#endif\n  }\n\n  lock = int_lock();\n  if (user < HAL_CMU_PLL_USER_ALL) {\n    pll_user_map[pll] &= ~(1 << user);\n  }\n  if (pll_user_map[pll] == 0 || user == HAL_CMU_PLL_USER_ALL) {\n    if (pll == HAL_CMU_PLL_AUD) {\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLAUD_DISABLE;\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLAUD_DISABLE;\n#ifdef USB_USE_USBPLL\n    } else if (pll == HAL_CMU_PLL_USB_HS) {\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLUSB_DISABLE;\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLUSB_DISABLE;\n#endif\n    } else {\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLBB_DISABLE;\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLBB_DISABLE;\n    }\n  }\n  int_unlock(lock);\n\n  return 0;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_low_freq_mode_init(void) {\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n  hal_cmu_sys_select_pll(HAL_CMU_PLL_USB);\n#else\n  // No need to switch to USB PLL, for there is a clock gate and a clock mux\n  // in front of the AUD/USB switch\n  hal_cmu_sys_select_pll(HAL_CMU_PLL_AUD);\n#endif\n\n//#ifdef FLASH_LOW_SPEED\n#ifdef OSC_26M_X4_AUD2BB\n  aoncmu->CLK_SELECT &= ~AON_CMU_SEL_X4_SYS;\n#endif\n  //#endif\n}\n\nvoid hal_cmu_low_freq_mode_enable(enum HAL_CMU_FREQ_T old_freq,\n                                  enum HAL_CMU_FREQ_T new_freq) {\n  // TODO: Need to lock irq?\n  enum HAL_CMU_PLL_T POSSIBLY_UNUSED pll;\n\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n  pll = HAL_CMU_PLL_USB;\n#else\n  pll = HAL_CMU_PLL_AUD;\n#endif\n\n#ifdef OSC_26M_X4_AUD2BB\n  if (new_freq <= HAL_CMU_FREQ_52M) {\n    aoncmu->CLK_SELECT &= ~AON_CMU_SEL_X4_SYS;\n  }\n  if (new_freq <= HAL_CMU_FREQ_104M && old_freq > HAL_CMU_FREQ_104M) {\n    if (new_freq > HAL_CMU_FREQ_52M) {\n      // PLL is in use now. Switch to X2 first.\n      hal_cmu_sys_set_freq(HAL_CMU_FREQ_52M);\n      aoncmu->CLK_SELECT |= AON_CMU_SEL_X4_SYS;\n      // X4 is in use now\n      hal_cmu_sys_set_freq(new_freq);\n    }\n    hal_cmu_pll_disable(pll, HAL_CMU_PLL_USER_SYS);\n  }\n#else\n#ifdef FLASH_LOW_SPEED\n  if (old_freq > HAL_CMU_FREQ_52M && new_freq <= HAL_CMU_FREQ_52M) {\n    hal_cmu_pll_disable(pll, HAL_CMU_PLL_USER_SYS);\n  }\n#endif\n#endif\n}\n\nvoid hal_cmu_low_freq_mode_disable(enum HAL_CMU_FREQ_T old_freq,\n                                   enum HAL_CMU_FREQ_T new_freq) {\n  // TODO: Need to lock irq?\n  enum HAL_CMU_PLL_T POSSIBLY_UNUSED pll;\n\n#if defined(MCU_HIGH_PERFORMANCE_MODE)\n  pll = HAL_CMU_PLL_USB;\n#else\n  pll = HAL_CMU_PLL_AUD;\n#endif\n\n#ifdef OSC_26M_X4_AUD2BB\n  if (new_freq <= HAL_CMU_FREQ_52M) {\n    aoncmu->CLK_SELECT &= ~AON_CMU_SEL_X4_SYS;\n  } else if (new_freq <= HAL_CMU_FREQ_104M) {\n    aoncmu->CLK_SELECT |= AON_CMU_SEL_X4_SYS;\n  } else {\n    if (old_freq <= HAL_CMU_FREQ_104M) {\n      hal_cmu_pll_enable(pll, HAL_CMU_PLL_USER_SYS);\n      if (old_freq > HAL_CMU_FREQ_52M) {\n        // X4 is in use now. Switch to X2 before stopping X4\n        hal_cmu_sys_set_freq(HAL_CMU_FREQ_52M);\n      }\n      aoncmu->CLK_SELECT &= ~AON_CMU_SEL_X4_SYS;\n    }\n  }\n#else\n#ifdef FLASH_LOW_SPEED\n  if (old_freq <= HAL_CMU_FREQ_52M && new_freq > HAL_CMU_FREQ_52M) {\n    hal_cmu_pll_enable(pll, HAL_CMU_PLL_USER_SYS);\n  }\n#endif\n#endif\n}\n\nint hal_cmu_codec_adc_set_div(uint32_t div) {\n  uint32_t lock;\n\n  if (div < 2) {\n    return 1;\n  }\n\n  div -= 2;\n  lock = int_lock();\n  aoncmu->CODEC_DIV =\n      SET_BITFIELD(aoncmu->CODEC_DIV, AON_CMU_CFG_DIV_CODEC, div);\n  int_unlock(lock);\n\n  return 0;\n}\n\nuint32_t hal_cmu_codec_adc_get_div(void) {\n  return GET_BITFIELD(aoncmu->CODEC_DIV, AON_CMU_CFG_DIV_CODEC) + 2;\n}\n\nint hal_cmu_codec_dac_set_div(uint32_t div) {\n  return hal_cmu_codec_adc_set_div(div);\n}\n\nuint32_t hal_cmu_codec_dac_get_div(void) {\n  return hal_cmu_codec_adc_get_div();\n  ;\n}\n\n#if defined(__AUDIO_RESAMPLE__) && defined(ANA_26M_X4_ENABLE)\nvoid hal_cmu_audio_26m_x4_enable(enum CMU_AUD_26M_X4_USER_T user) {\n  uint32_t lock;\n\n  if (user >= CMU_AUD_26M_X4_USER_QTY) {\n    return;\n  }\n\n  lock = int_lock();\n\n  if (aud_26m_x4_map == 0) {\n    aoncmu->CLK_SELECT |= AON_CMU_SEL_X4_AUD;\n  }\n  aud_26m_x4_map |= (1 << user);\n\n  int_unlock(lock);\n}\n\nvoid hal_cmu_audio_26m_x4_disable(enum CMU_AUD_26M_X4_USER_T user) {\n  uint32_t lock;\n\n  if (user >= CMU_AUD_26M_X4_USER_QTY) {\n    return;\n  }\n\n  lock = int_lock();\n\n  if (aud_26m_x4_map & (1 << user)) {\n    aud_26m_x4_map &= ~(1 << user);\n    if (aud_26m_x4_map == 0) {\n      aoncmu->CLK_SELECT &= ~AON_CMU_SEL_X4_AUD;\n    }\n  }\n\n  int_unlock(lock);\n}\n#endif\n\nvoid hal_cmu_codec_iir_enable(uint32_t speed) {\n  uint32_t lock;\n  uint32_t mask;\n  uint32_t val;\n  uint32_t div;\n  uint32_t cfg_speed = 0;\n\n  mask = AON_CMU_SEL_OSC_CODECIIR | AON_CMU_SEL_OSCX2_CODECIIR |\n         AON_CMU_BYPASS_DIV_CODECIIR;\n  val = 0;\n\n  if (speed <= 26000000) {\n    val |= AON_CMU_SEL_OSC_CODECIIR | AON_CMU_SEL_OSCX2_CODECIIR;\n    cfg_speed = 26000000;\n  } else if (speed <= 52000000) {\n    val |= AON_CMU_SEL_OSCX2_CODECIIR;\n    cfg_speed = 52000000;\n  } else {\n#if defined(__AUDIO_RESAMPLE__) && defined(ANA_26M_X4_ENABLE)\n    if (hal_cmu_get_audio_resample_status()) {\n      hal_cmu_audio_26m_x4_enable(CMU_AUD_26M_X4_USER_IIR);\n      val |= AON_CMU_BYPASS_DIV_CODECIIR;\n      cfg_speed = 104000000;\n    } else\n#endif\n    {\n      // Assume audio stream is one of 48K series\n      div = HAL_CMU_AUD_PLL_CLOCK / speed;\n      if (div >= 2) {\n        hal_cmu_codec_iir_set_div(div);\n        cfg_speed = HAL_CMU_AUD_PLL_CLOCK / div;\n      } else {\n        val |= AON_CMU_BYPASS_DIV_CODECIIR;\n        cfg_speed = HAL_CMU_AUD_PLL_CLOCK;\n      }\n    }\n  }\n\n  ASSERT(speed <= cfg_speed, \"%s: speed %u should <= cfg_speed %u\", __func__,\n         speed, cfg_speed);\n\n  lock = int_lock();\n  aoncmu->CODEC_IIR = (aoncmu->CODEC_IIR & ~mask) | val;\n  int_unlock(lock);\n\n  aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_CODEC_IIR_ENABLE;\n\n  aocmu_reg_update_wait();\n}\n\nvoid hal_cmu_codec_iir_disable(void) {\n  uint32_t lock;\n  uint32_t val;\n\n  aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_CODEC_IIR_DISABLE;\n\n#if defined(__AUDIO_RESAMPLE__) && defined(ANA_26M_X4_ENABLE)\n  hal_cmu_audio_26m_x4_disable(CMU_AUD_26M_X4_USER_IIR);\n#endif\n\n  val = AON_CMU_SEL_OSC_CODECIIR | AON_CMU_SEL_OSCX2_CODECIIR;\n\n  lock = int_lock();\n  aoncmu->CODEC_IIR |= val;\n  int_unlock(lock);\n}\n\nint hal_cmu_codec_iir_set_div(uint32_t div) {\n  uint32_t lock;\n\n  if (div < 2) {\n    return 1;\n  }\n\n  div -= 2;\n  lock = int_lock();\n  aoncmu->CODEC_IIR =\n      SET_BITFIELD(aoncmu->CODEC_IIR, AON_CMU_CFG_DIV_CODECIIR, div);\n  int_unlock(lock);\n\n  return 0;\n}\n\nvoid hal_cmu_codec_rs_enable(uint32_t speed) {\n  uint32_t lock;\n  uint32_t mask;\n  uint32_t val;\n  uint32_t div;\n  uint32_t cfg_speed = 0;\n\n  mask = AON_CMU_SEL_OSC_CODECRS | AON_CMU_SEL_OSCX2_CODECRS |\n         AON_CMU_BYPASS_DIV_CODECRS;\n  val = 0;\n\n  if (speed <= 26000000) {\n    val |= AON_CMU_SEL_OSC_CODECRS | AON_CMU_SEL_OSCX2_CODECRS;\n    cfg_speed = 26000000;\n  } else if (speed <= 52000000) {\n    val |= AON_CMU_SEL_OSCX2_CODECRS;\n    cfg_speed = 52000000;\n  } else {\n#if defined(__AUDIO_RESAMPLE__) && defined(ANA_26M_X4_ENABLE)\n    if (hal_cmu_get_audio_resample_status()) {\n      hal_cmu_audio_26m_x4_enable(CMU_AUD_26M_X4_USER_RS);\n      val |= AON_CMU_BYPASS_DIV_CODECRS;\n      cfg_speed = 104000000;\n    } else\n#endif\n    {\n      // Assume audio stream is one of 48K series\n      div = HAL_CMU_AUD_PLL_CLOCK / speed;\n      if (div >= 2) {\n        hal_cmu_codec_rs_set_div(div);\n        cfg_speed = HAL_CMU_AUD_PLL_CLOCK / div;\n      } else {\n        val |= AON_CMU_BYPASS_DIV_CODECRS;\n        cfg_speed = HAL_CMU_AUD_PLL_CLOCK;\n      }\n    }\n\n    pmu_rs_freq_config(cfg_speed);\n  }\n\n  ASSERT(speed <= cfg_speed, \"%s: speed %u should <= cfg_speed %u\", __func__,\n         speed, cfg_speed);\n\n  lock = int_lock();\n  aoncmu->CODEC_IIR = (aoncmu->CODEC_IIR & ~mask) | val;\n  int_unlock(lock);\n\n  aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_CODEC_RS_ENABLE;\n\n  aocmu_reg_update_wait();\n}\n\nvoid hal_cmu_codec_rs_disable(void) {\n  uint32_t lock;\n  bool high_speed;\n\n  aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_CODEC_RS_DISABLE;\n\n#if defined(__AUDIO_RESAMPLE__) && defined(ANA_26M_X4_ENABLE)\n  hal_cmu_audio_26m_x4_disable(CMU_AUD_26M_X4_USER_RS);\n#endif\n\n  high_speed = !(aoncmu->CODEC_IIR & AON_CMU_SEL_OSC_CODECRS);\n\n  lock = int_lock();\n  aoncmu->CODEC_IIR |= AON_CMU_SEL_OSC_CODECRS | AON_CMU_SEL_OSCX2_CODECRS;\n  int_unlock(lock);\n\n  if (high_speed) {\n    pmu_rs_freq_config(0);\n  }\n}\n\nint hal_cmu_codec_rs_set_div(uint32_t div) {\n  uint32_t lock;\n\n  if (div < 2) {\n    return 1;\n  }\n\n  div -= 2;\n  lock = int_lock();\n  aoncmu->CODEC_IIR =\n      SET_BITFIELD(aoncmu->CODEC_IIR, AON_CMU_CFG_DIV_CODECRS, div);\n  int_unlock(lock);\n\n  return 0;\n}\n\nvoid hal_cmu_anc_enable(enum HAL_CMU_ANC_CLK_USER_T user) {\n  anc_enabled = true;\n}\n\nvoid hal_cmu_anc_disable(enum HAL_CMU_ANC_CLK_USER_T user) {\n  anc_enabled = false;\n}\n\nint hal_cmu_anc_get_status(enum HAL_CMU_ANC_CLK_USER_T user) {\n  return anc_enabled;\n}\n\nvoid hal_cmu_codec_clock_enable(void) {\n  uint32_t clk;\n\n#ifdef CODEC_CLK_FROM_ANA\n  // Always use ANA clock\n  clk = AON_CMU_EN_CLK_CODEC_HCLK_ENABLE | AON_CMU_EN_CLK_CODEC_ENABLE;\n#else\n#ifdef __AUDIO_RESAMPLE__\n  if (hal_cmu_get_audio_resample_status()) {\n    uint32_t lock;\n    lock = int_lock();\n    aoncmu->CODEC_DIV |= AON_CMU_SEL_OSC_CODEC;\n    int_unlock(lock);\n\n#ifdef RESAMPLE_CODEC_CLK_ANA\n    clk = AON_CMU_EN_CLK_CODEC_HCLK_ENABLE | AON_CMU_EN_CLK_CODEC_ENABLE;\n#else\n    clk = AON_CMU_EN_CLK_PLL_CODEC_ENABLE | AON_CMU_EN_CLK_CODEC_HCLK_ENABLE |\n          AON_CMU_EN_CLK_CODEC_ENABLE;\n    if (hal_get_chip_metal_id() == HAL_CHIP_METAL_ID_0) {\n      // Force codec to use analog clock\n      clk &= ~AON_CMU_EN_CLK_PLL_CODEC_ENABLE;\n    }\n#endif\n  } else\n#endif\n  {\n    clk = AON_CMU_EN_CLK_PLL_CODEC_ENABLE | AON_CMU_EN_CLK_CODEC_HCLK_ENABLE |\n          AON_CMU_EN_CLK_CODEC_ENABLE;\n  }\n#endif\n  aoncmu->TOP_CLK_ENABLE = clk;\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_CODEC);\n}\n\nvoid hal_cmu_codec_clock_disable(void) {\n  uint32_t clk;\n\n  hal_cmu_clock_disable(HAL_CMU_MOD_H_CODEC);\n\n#ifdef CODEC_CLK_FROM_ANA\n  clk = AON_CMU_EN_CLK_CODEC_HCLK_DISABLE | AON_CMU_EN_CLK_CODEC_DISABLE;\n#else\n#ifdef __AUDIO_RESAMPLE__\n  if (hal_cmu_get_audio_resample_status()) {\n    uint32_t lock;\n    lock = int_lock();\n    aoncmu->CODEC_DIV &= ~AON_CMU_SEL_OSC_CODEC;\n    int_unlock(lock);\n\n    clk = AON_CMU_EN_CLK_CODEC_HCLK_DISABLE | AON_CMU_EN_CLK_CODEC_DISABLE;\n  } else\n#endif\n  {\n    clk = AON_CMU_EN_CLK_PLL_CODEC_DISABLE | AON_CMU_EN_CLK_CODEC_HCLK_DISABLE |\n          AON_CMU_EN_CLK_CODEC_DISABLE;\n  }\n#endif\n  aoncmu->TOP_CLK_DISABLE = clk;\n}\n\nvoid hal_cmu_codec_vad_clock_enable(uint32_t enabled) {\n  if (enabled) {\n    aoncmu->TOP_CLK_ENABLE =\n        AON_CMU_EN_CLK_TOP_OSC_ENABLE | AON_CMU_EN_CLK_32K_CODEC_ENABLE;\n  } else {\n    aoncmu->TOP_CLK_DISABLE =\n        AON_CMU_EN_CLK_TOP_OSC_DISABLE | AON_CMU_EN_CLK_32K_CODEC_DISABLE;\n  }\n}\n\nvoid hal_cmu_codec_reset_set(void) {\n  aoncmu->RESET_SET = AON_CMU_SOFT_RSTN_CODEC_SET;\n}\n\nvoid hal_cmu_codec_reset_clear(void) {\n  aoncmu->RESET_CLR = AON_CMU_SOFT_RSTN_CODEC_CLR;\n  aocmu_reg_update_wait();\n}\n\nvoid hal_cmu_codec_set_fault_mask(uint32_t msk) {\n  uint32_t lock;\n\n  lock = int_lock();\n  // If bit set 1, DAC will be muted when some faults occur\n  cmu->PERIPH_CLK = SET_BITFIELD(cmu->PERIPH_CLK, CMU_MASK_OBS, msk);\n  int_unlock(lock);\n}\n\nvoid hal_cmu_i2s_clock_out_enable(enum HAL_I2S_ID_T id) {\n  uint32_t lock;\n  uint32_t val;\n\n  if (id == HAL_I2S_ID_0) {\n    val = CMU_EN_CLK_I2S0_OUT;\n  } else {\n    val = CMU_EN_CLK_I2S1_OUT;\n  }\n\n  lock = int_lock();\n  cmu->I2C_CLK |= val;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_i2s_clock_out_disable(enum HAL_I2S_ID_T id) {\n  uint32_t lock;\n  uint32_t val;\n\n  if (id == HAL_I2S_ID_0) {\n    val = CMU_EN_CLK_I2S0_OUT;\n  } else {\n    val = CMU_EN_CLK_I2S1_OUT;\n  }\n\n  lock = int_lock();\n  cmu->I2C_CLK &= ~val;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_i2s_set_slave_mode(enum HAL_I2S_ID_T id) {\n  uint32_t lock;\n  uint32_t val;\n\n  if (id == HAL_I2S_ID_0) {\n    val = CMU_SEL_I2S0_CLKIN;\n  } else {\n    val = CMU_SEL_I2S1_CLKIN;\n  }\n\n  lock = int_lock();\n  cmu->I2C_CLK |= val;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_i2s_set_master_mode(enum HAL_I2S_ID_T id) {\n  uint32_t lock;\n  uint32_t val;\n\n  if (id == HAL_I2S_ID_0) {\n    val = CMU_SEL_I2S0_CLKIN;\n  } else {\n    val = CMU_SEL_I2S1_CLKIN;\n  }\n\n  lock = int_lock();\n  cmu->I2C_CLK &= ~val;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_i2s_clock_enable(enum HAL_I2S_ID_T id) {\n  uint32_t lock;\n  uint32_t val;\n  volatile uint32_t *reg;\n\n  if (id == HAL_I2S_ID_0) {\n    val = AON_CMU_EN_CLK_PLL_I2S0;\n    reg = &aoncmu->PCM_I2S_CLK;\n  } else {\n    val = AON_CMU_EN_CLK_PLL_I2S1;\n    reg = &aoncmu->SPDIF_CLK;\n  }\n\n  lock = int_lock();\n  *reg |= val;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_i2s_clock_disable(enum HAL_I2S_ID_T id) {\n  uint32_t lock;\n  uint32_t val;\n  volatile uint32_t *reg;\n\n  if (id == HAL_I2S_ID_0) {\n    val = AON_CMU_EN_CLK_PLL_I2S0;\n    reg = &aoncmu->PCM_I2S_CLK;\n  } else {\n    val = AON_CMU_EN_CLK_PLL_I2S1;\n    reg = &aoncmu->SPDIF_CLK;\n  }\n\n  lock = int_lock();\n  *reg &= ~val;\n  int_unlock(lock);\n}\n\nint hal_cmu_i2s_set_div(enum HAL_I2S_ID_T id, uint32_t div) {\n  uint32_t lock;\n\n  if (div < 2) {\n    return 1;\n  }\n\n  div -= 2;\n  if ((div & (AON_CMU_CFG_DIV_I2S0_MASK >> AON_CMU_CFG_DIV_I2S0_SHIFT)) !=\n      div) {\n    return 1;\n  }\n\n  lock = int_lock();\n  if (id == HAL_I2S_ID_0) {\n    aoncmu->PCM_I2S_CLK =\n        SET_BITFIELD(aoncmu->PCM_I2S_CLK, AON_CMU_CFG_DIV_I2S0, div);\n  } else {\n    aoncmu->SPDIF_CLK =\n        SET_BITFIELD(aoncmu->SPDIF_CLK, AON_CMU_CFG_DIV_I2S1, div);\n  }\n  int_unlock(lock);\n\n  return 0;\n}\n\nvoid hal_cmu_pcm_clock_out_enable(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  cmu->I2C_CLK |= CMU_EN_CLK_PCM_OUT;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_pcm_clock_out_disable(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  cmu->I2C_CLK &= ~CMU_EN_CLK_PCM_OUT;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_pcm_set_slave_mode(int clk_pol) {\n  uint32_t lock;\n  uint32_t mask;\n  uint32_t cfg;\n\n  mask = CMU_SEL_PCM_CLKIN | CMU_POL_CLK_PCM_IN;\n\n  if (clk_pol) {\n    cfg = CMU_SEL_PCM_CLKIN | CMU_POL_CLK_PCM_IN;\n  } else {\n    cfg = CMU_SEL_PCM_CLKIN;\n  }\n\n  lock = int_lock();\n  cmu->I2C_CLK = (cmu->I2C_CLK & ~mask) | cfg;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_pcm_set_master_mode(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  cmu->I2C_CLK &= ~CMU_SEL_PCM_CLKIN;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_pcm_clock_enable(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  aoncmu->PCM_I2S_CLK |= AON_CMU_EN_CLK_PLL_PCM;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_pcm_clock_disable(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  aoncmu->PCM_I2S_CLK &= ~AON_CMU_EN_CLK_PLL_PCM;\n  int_unlock(lock);\n}\n\nint hal_cmu_pcm_set_div(uint32_t div) {\n  uint32_t lock;\n\n  if (div < 2) {\n    return 1;\n  }\n\n  div -= 2;\n  if ((div & (AON_CMU_CFG_DIV_PCM_MASK >> AON_CMU_CFG_DIV_PCM_SHIFT)) != div) {\n    return 1;\n  }\n\n  lock = int_lock();\n  aoncmu->PCM_I2S_CLK =\n      SET_BITFIELD(aoncmu->PCM_I2S_CLK, AON_CMU_CFG_DIV_PCM, div);\n  int_unlock(lock);\n  return 0;\n}\n\nint hal_cmu_spdif_clock_enable(enum HAL_SPDIF_ID_T id) {\n  uint32_t lock;\n  uint32_t mask;\n\n  if (id >= HAL_SPDIF_ID_QTY) {\n    return 1;\n  }\n\n  mask = AON_CMU_EN_CLK_PLL_SPDIF0;\n\n  lock = int_lock();\n  aoncmu->SPDIF_CLK |= mask;\n  int_unlock(lock);\n  return 0;\n}\n\nint hal_cmu_spdif_clock_disable(enum HAL_SPDIF_ID_T id) {\n  uint32_t lock;\n  uint32_t mask;\n\n  if (id >= HAL_SPDIF_ID_QTY) {\n    return 1;\n  }\n\n  mask = AON_CMU_EN_CLK_PLL_SPDIF0;\n\n  lock = int_lock();\n  aoncmu->SPDIF_CLK &= ~mask;\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_cmu_spdif_set_div(enum HAL_SPDIF_ID_T id, uint32_t div) {\n  uint32_t lock;\n\n  if (id >= HAL_SPDIF_ID_QTY) {\n    return 1;\n  }\n\n  if (div < 2) {\n    return 2;\n  }\n\n  div -= 2;\n  if ((div & (AON_CMU_CFG_DIV_SPDIF0_MASK >> AON_CMU_CFG_DIV_SPDIF0_SHIFT)) !=\n      div) {\n    return 2;\n  }\n\n  lock = int_lock();\n  aoncmu->SPDIF_CLK =\n      SET_BITFIELD(aoncmu->SPDIF_CLK, AON_CMU_CFG_DIV_SPDIF0, div);\n  int_unlock(lock);\n  return 0;\n}\n\n#ifdef CHIP_HAS_USB\nvoid hal_cmu_usb_set_device_mode(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  cmu->SYS_DIV |= CMU_USB_ID;\n  int_unlock(lock);\n}\n\nvoid hal_cmu_usb_set_host_mode(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  cmu->SYS_DIV &= ~CMU_USB_ID;\n  int_unlock(lock);\n}\n\n#ifdef ROM_BUILD\nvoid hal_cmu_usb_rom_set_clock_source(enum HAL_CMU_USB_CLOCK_SEL_T sel) {\n  usb_clk_sel = sel;\n}\n#endif\n\nstatic uint32_t hal_cmu_usb_get_clock_source(void) {\n  uint32_t src;\n\n#if defined(USB_CLK_SRC_26M_X4) || defined(USB_CLK_SRC_26M_X2) ||              \\\n    defined(USB_CLK_SRC_24M_X2) || defined(USB_CLK_SRC_48M)\n#ifdef USB_HIGH_SPEED\n#error \"USB HIGH-SPEED must use PLL\"\n#endif\n#if defined(USB_CLK_SRC_26M_X4) && !defined(ANA_26M_X4_ENABLE)\n#error \"USB_CLK_SRC_26M_X4 must use ANA_26M_X4_ENABLE\"\n#endif\n#endif\n\n#ifdef ROM_BUILD\n\n#ifdef USB_USE_USBPLL\n  src = CMU_USB_CLK_SRC_PLL_60M;\n#else\n  if (usb_clk_sel == HAL_CMU_USB_CLOCK_SEL_24M_X2) {\n    src = CMU_USB_CLK_SRC_OSC_24M_X2;\n  } else if (usb_clk_sel == HAL_CMU_USB_CLOCK_SEL_48M) {\n    src = CMU_USB_CLK_SRC_OSC_48M;\n  } else if (usb_clk_sel == HAL_CMU_USB_CLOCK_SEL_26M_X2) {\n    src = CMU_USB_CLK_SRC_OSC_26M_X2;\n  } else if (usb_clk_sel == HAL_CMU_USB_CLOCK_SEL_26M_X4) {\n    src = CMU_USB_CLK_SRC_OSC_26M_X4;\n  } else {\n    src = CMU_USB_CLK_SRC_PLL_48M;\n  }\n#endif\n\n#else // !ROM_BUILD\n\n#ifdef USB_USE_USBPLL\n  src = CMU_USB_CLK_SRC_PLL_60M;\n#else\n#ifdef USB_CLK_SRC_24M_X2\n  src = CMU_USB_CLK_SRC_OSC_24M_X2;\n#elif defined(USB_CLK_SRC_48M)\n  src = CMU_USB_CLK_SRC_OSC_48M;\n#elif defined(USB_CLK_SRC_26M_X4)\n  src = CMU_USB_CLK_SRC_OSC_26M_X4;\n#elif defined(USB_CLK_SRC_26M_X2)\n  src = CMU_USB_CLK_SRC_OSC_26M_X2;\n#else\n  src = CMU_USB_CLK_SRC_PLL_48M;\n#endif\n#endif\n\n#endif // !ROM_BUILD\n\n  return src;\n}\n\nvoid hal_cmu_usb_clock_enable(void) {\n  enum HAL_CMU_PLL_T pll;\n  uint32_t lock;\n  uint32_t src;\n\n  pll = HAL_CMU_PLL_USB;\n  src = hal_cmu_usb_get_clock_source();\n\n  if (src == CMU_USB_CLK_SRC_PLL_60M || src == CMU_USB_CLK_SRC_PLL_60M_ALT ||\n      src == CMU_USB_CLK_SRC_PLL_48M) {\n    hal_cmu_pll_enable(pll, HAL_CMU_PLL_USER_USB);\n  }\n\n  lock = int_lock();\n#ifdef USB_CLK_SRC_26M_X4\n  aoncmu->CLK_SELECT |= AON_CMU_SEL_X4_USB;\n#endif\n  cmu->SYS_DIV = SET_BITFIELD(cmu->SYS_DIV, CMU_SEL_USB_SRC, src);\n  int_unlock(lock);\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_USBC);\n#ifdef USB_HIGH_SPEED\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_USBH);\n#endif\n  hal_cmu_clock_enable(HAL_CMU_MOD_O_USB32K);\n  hal_cmu_clock_enable(HAL_CMU_MOD_O_USB);\n  hal_cmu_reset_set(HAL_CMU_MOD_O_USB);\n  hal_cmu_reset_set(HAL_CMU_MOD_O_USB32K);\n#ifdef USB_HIGH_SPEED\n  hal_cmu_reset_set(HAL_CMU_MOD_H_USBH);\n#endif\n  hal_cmu_reset_set(HAL_CMU_MOD_H_USBC);\n  hal_sys_timer_delay(US_TO_TICKS(60));\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_USBC);\n#ifdef USB_HIGH_SPEED\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_USBH);\n#endif\n  hal_cmu_reset_clear(HAL_CMU_MOD_O_USB32K);\n  hal_cmu_reset_clear(HAL_CMU_MOD_O_USB);\n}\n\nvoid hal_cmu_usb_clock_disable(void) {\n  enum HAL_CMU_PLL_T pll;\n  uint32_t src;\n\n  pll = HAL_CMU_PLL_USB;\n  src = hal_cmu_usb_get_clock_source();\n\n  hal_cmu_reset_set(HAL_CMU_MOD_O_USB);\n  hal_cmu_reset_set(HAL_CMU_MOD_O_USB32K);\n#ifdef USB_HIGH_SPEED\n  hal_cmu_reset_set(HAL_CMU_MOD_H_USBH);\n#endif\n  hal_cmu_reset_set(HAL_CMU_MOD_H_USBC);\n  hal_cmu_clock_disable(HAL_CMU_MOD_O_USB);\n  hal_cmu_clock_disable(HAL_CMU_MOD_O_USB32K);\n#ifdef USB_HIGH_SPEED\n  hal_cmu_clock_disable(HAL_CMU_MOD_H_USBH);\n#endif\n  hal_cmu_clock_disable(HAL_CMU_MOD_H_USBC);\n\n  if (src == CMU_USB_CLK_SRC_PLL_60M || src == CMU_USB_CLK_SRC_PLL_60M_ALT ||\n      src == CMU_USB_CLK_SRC_PLL_48M) {\n    hal_cmu_pll_disable(pll, HAL_CMU_PLL_USER_USB);\n  }\n}\n#endif\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_apb_init_div(void) {\n  // Divider defaults to 2 (reg_val = div - 2)\n  // cmu->SYS_DIV = SET_BITFIELD(cmu->SYS_DIV, CMU_CFG_DIV_PCLK, 0);\n}\n\nint hal_cmu_periph_set_div(uint32_t div) {\n  uint32_t lock;\n  int ret = 0;\n\n  if (div == 0 ||\n      div > ((AON_CMU_CFG_DIV_PER_MASK >> AON_CMU_CFG_DIV_PER_SHIFT) + 2)) {\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_PLL_PER_DISABLE;\n    if (div > ((AON_CMU_CFG_DIV_PER_MASK >> AON_CMU_CFG_DIV_PER_SHIFT) + 2)) {\n      ret = 1;\n    }\n  } else {\n    lock = int_lock();\n    if (div == 1) {\n      aoncmu->CLK_SELECT |= AON_CMU_BYPASS_DIV_PER;\n    } else {\n      div -= 2;\n      aoncmu->CLK_SELECT = (aoncmu->CLK_SELECT & ~(AON_CMU_CFG_DIV_PER_MASK |\n                                                   AON_CMU_BYPASS_DIV_PER)) |\n                           AON_CMU_CFG_DIV_PER(div);\n    }\n    int_unlock(lock);\n    aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_PLL_PER_ENABLE;\n  }\n\n  return ret;\n}\n\n#define PERPH_SET_DIV_FUNC(f, F, r)                                            \\\n  int hal_cmu_##f##_set_div(uint32_t div) {                                    \\\n    uint32_t lock;                                                             \\\n    int ret = 0;                                                               \\\n    lock = int_lock();                                                         \\\n    if (div < 2 ||                                                             \\\n        div > ((CMU_CFG_DIV_##F##_MASK >> CMU_CFG_DIV_##F##_SHIFT) + 2)) {     \\\n      cmu->r &= ~(CMU_SEL_OSCX2_##F | CMU_SEL_PLL_##F | CMU_EN_PLL_##F);       \\\n      ret = 1;                                                                 \\\n    } else {                                                                   \\\n      div -= 2;                                                                \\\n      cmu->r = (cmu->r & ~(CMU_CFG_DIV_##F##_MASK)) | CMU_SEL_OSCX2_##F |      \\\n               CMU_SEL_PLL_##F | CMU_CFG_DIV_##F(div);                         \\\n      cmu->r |= CMU_EN_PLL_##F;                                                \\\n    }                                                                          \\\n    int_unlock(lock);                                                          \\\n    return ret;                                                                \\\n  }\n\nPERPH_SET_DIV_FUNC(uart0, UART0, UART_CLK);\nPERPH_SET_DIV_FUNC(uart1, UART1, UART_CLK);\nPERPH_SET_DIV_FUNC(uart2, UART2, UART_CLK);\nPERPH_SET_DIV_FUNC(spi, SPI1, SYS_DIV);\nPERPH_SET_DIV_FUNC(slcd, SPI0, SYS_DIV);\nPERPH_SET_DIV_FUNC(i2c, I2C, I2C_CLK);\n\n#define PERPH_SET_FREQ_FUNC(f, F, r)                                           \\\n  int hal_cmu_##f##_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq) {                \\\n    uint32_t lock;                                                             \\\n    int ret = 0;                                                               \\\n    lock = int_lock();                                                         \\\n    if (freq == HAL_CMU_PERIPH_FREQ_26M) {                                     \\\n      cmu->r &= ~(CMU_SEL_OSCX2_##F | CMU_SEL_PLL_##F | CMU_EN_PLL_##F);       \\\n    } else if (freq == HAL_CMU_PERIPH_FREQ_52M) {                              \\\n      cmu->r =                                                                 \\\n          (cmu->r & ~(CMU_SEL_PLL_##F | CMU_EN_PLL_##F)) | CMU_SEL_OSCX2_##F;  \\\n    } else {                                                                   \\\n      ret = 1;                                                                 \\\n    }                                                                          \\\n    int_unlock(lock);                                                          \\\n    return ret;                                                                \\\n  }\n\nPERPH_SET_FREQ_FUNC(uart0, UART0, UART_CLK);\nPERPH_SET_FREQ_FUNC(uart1, UART1, UART_CLK);\nPERPH_SET_FREQ_FUNC(uart2, UART2, UART_CLK);\nPERPH_SET_FREQ_FUNC(spi, SPI1, SYS_DIV);\nPERPH_SET_FREQ_FUNC(slcd, SPI0, SYS_DIV);\nPERPH_SET_FREQ_FUNC(i2c, I2C, I2C_CLK);\n\nint hal_cmu_ispi_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq) {\n  uint32_t lock;\n  int ret = 0;\n\n  lock = int_lock();\n  if (freq == HAL_CMU_PERIPH_FREQ_26M) {\n    cmu->SYS_DIV &= ~CMU_SEL_OSCX2_SPI2;\n  } else if (freq == HAL_CMU_PERIPH_FREQ_52M) {\n    cmu->SYS_DIV |= CMU_SEL_OSCX2_SPI2;\n  } else {\n    ret = 1;\n  }\n  int_unlock(lock);\n\n  return ret;\n}\n\nint hal_cmu_clock_out_enable(enum HAL_CMU_CLOCK_OUT_ID_T id) {\n  uint32_t lock;\n  uint32_t sel;\n  uint32_t cfg;\n\n  enum CMU_CLK_OUT_SEL_T {\n    CMU_CLK_OUT_SEL_AON = 0,\n    CMU_CLK_OUT_SEL_CODEC = 1,\n    CMU_CLK_OUT_SEL_BT = 2,\n    CMU_CLK_OUT_SEL_MCU = 3,\n\n    CMU_CLK_OUT_SEL_QTY\n  };\n\n  sel = CMU_CLK_OUT_SEL_QTY;\n  cfg = 0;\n\n  if (id <= HAL_CMU_CLOCK_OUT_AON_SYS) {\n    sel = CMU_CLK_OUT_SEL_AON;\n    cfg = id - HAL_CMU_CLOCK_OUT_AON_32K;\n  } else if (HAL_CMU_CLOCK_OUT_MCU_32K <= id &&\n             id <= HAL_CMU_CLOCK_OUT_MCU_SPI1) {\n    sel = CMU_CLK_OUT_SEL_MCU;\n    lock = int_lock();\n    cmu->PERIPH_CLK = SET_BITFIELD(cmu->PERIPH_CLK, CMU_CFG_CLK_OUT,\n                                   id - HAL_CMU_CLOCK_OUT_MCU_32K);\n    int_unlock(lock);\n  } else if (HAL_CMU_CLOCK_OUT_CODEC_ADC_ANA <= id &&\n             id <= HAL_CMU_CLOCK_OUT_CODEC_HCLK) {\n    sel = CMU_CLK_OUT_SEL_CODEC;\n    hal_codec_select_clock_out(id - HAL_CMU_CLOCK_OUT_CODEC_ADC_ANA);\n  } else if (HAL_CMU_CLOCK_OUT_BT_32K <= id && id <= HAL_CMU_CLOCK_OUT_BT_26M) {\n    sel = CMU_CLK_OUT_SEL_BT;\n    btcmu->CLK_OUT = SET_BITFIELD(btcmu->CLK_OUT, BT_CMU_CFG_CLK_OUT,\n                                  id - HAL_CMU_CLOCK_OUT_BT_32K);\n  }\n\n  if (sel < CMU_CLK_OUT_SEL_QTY) {\n    lock = int_lock();\n    aoncmu->CLK_OUT = (aoncmu->CLK_OUT &\n                       ~(AON_CMU_SEL_CLK_OUT_MASK | AON_CMU_CFG_CLK_OUT_MASK)) |\n                      AON_CMU_SEL_CLK_OUT(sel) | AON_CMU_CFG_CLK_OUT(cfg) |\n                      AON_CMU_EN_CLK_OUT;\n    int_unlock(lock);\n\n    return 0;\n  }\n\n  return 1;\n}\n\nvoid hal_cmu_clock_out_disable(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  aoncmu->CLK_OUT &= ~AON_CMU_EN_CLK_OUT;\n  int_unlock(lock);\n}\n\nint hal_cmu_i2s_mclk_enable(enum HAL_CMU_I2S_MCLK_ID_T id) {\n  uint32_t lock;\n\n  lock = int_lock();\n  aoncmu->PCM_I2S_CLK =\n      SET_BITFIELD(aoncmu->PCM_I2S_CLK, AON_CMU_SEL_I2S_MCLK, id) |\n      AON_CMU_EN_I2S_MCLK;\n  int_unlock(lock);\n\n  return 0;\n}\n\nvoid hal_cmu_i2s_mclk_disable(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  aoncmu->PCM_I2S_CLK &= ~AON_CMU_EN_I2S_MCLK;\n  int_unlock(lock);\n}\n\nint hal_cmu_pwm_set_freq(enum HAL_PWM_ID_T id, uint32_t freq) {\n  uint32_t lock;\n  int clk_32k;\n  uint32_t div;\n\n  if (id >= HAL_PWM_ID_QTY) {\n    return 1;\n  }\n\n  if (freq == 0) {\n    clk_32k = 1;\n    div = 0;\n  } else {\n    clk_32k = 0;\n    div = hal_cmu_get_crystal_freq() / freq;\n    if (div < 2) {\n      return 1;\n    }\n\n    div -= 2;\n    if ((div & (AON_CMU_CFG_DIV_PWM0_MASK >> AON_CMU_CFG_DIV_PWM0_SHIFT)) !=\n        div) {\n      return 1;\n    }\n  }\n\n  lock = int_lock();\n  if (id == HAL_PWM_ID_0) {\n    aoncmu->PWM01_CLK =\n        (aoncmu->PWM01_CLK & ~(AON_CMU_CFG_DIV_PWM0_MASK |\n                               AON_CMU_SEL_OSC_PWM0 | AON_CMU_EN_OSC_PWM0)) |\n        AON_CMU_CFG_DIV_PWM0(div) |\n        (clk_32k ? 0 : (AON_CMU_SEL_OSC_PWM0 | AON_CMU_EN_OSC_PWM0));\n  } else if (id == HAL_PWM_ID_1) {\n    aoncmu->PWM01_CLK =\n        (aoncmu->PWM01_CLK & ~(AON_CMU_CFG_DIV_PWM1_MASK |\n                               AON_CMU_SEL_OSC_PWM1 | AON_CMU_EN_OSC_PWM1)) |\n        AON_CMU_CFG_DIV_PWM1(div) |\n        (clk_32k ? 0 : (AON_CMU_SEL_OSC_PWM1 | AON_CMU_EN_OSC_PWM1));\n  } else if (id == HAL_PWM_ID_2) {\n    aoncmu->PWM23_CLK =\n        (aoncmu->PWM23_CLK & ~(AON_CMU_CFG_DIV_PWM2_MASK |\n                               AON_CMU_SEL_OSC_PWM2 | AON_CMU_EN_OSC_PWM2)) |\n        AON_CMU_CFG_DIV_PWM2(div) |\n        (clk_32k ? 0 : (AON_CMU_SEL_OSC_PWM2 | AON_CMU_EN_OSC_PWM2));\n  } else {\n    aoncmu->PWM23_CLK =\n        (aoncmu->PWM23_CLK & ~(AON_CMU_CFG_DIV_PWM3_MASK |\n                               AON_CMU_SEL_OSC_PWM3 | AON_CMU_EN_OSC_PWM3)) |\n        AON_CMU_CFG_DIV_PWM3(div) |\n        (clk_32k ? 0 : (AON_CMU_SEL_OSC_PWM3 | AON_CMU_EN_OSC_PWM3));\n  }\n  int_unlock(lock);\n  return 0;\n}\n\nvoid hal_cmu_jtag_enable(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  cmu->MCU_TIMER &= ~(CMU_SECURE_BOOT_JTAG | CMU_SECURE_BOOT_I2C);\n  int_unlock(lock);\n}\n\nvoid hal_cmu_jtag_disable(void) {\n  uint32_t lock;\n\n  lock = int_lock();\n  cmu->MCU_TIMER |= (CMU_SECURE_BOOT_JTAG | CMU_SECURE_BOOT_I2C);\n  int_unlock(lock);\n}\n\nvoid hal_cmu_jtag_clock_enable(void) {\n  aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_TOP_JTAG_ENABLE;\n}\n\nvoid hal_cmu_jtag_clock_disable(void) {\n  aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_JTAG_DISABLE;\n}\n\nvoid hal_cmu_rom_clock_init(void) {\n  aoncmu->CODEC_DIV = (aoncmu->CODEC_DIV & ~AON_CMU_SEL_CLK_OSCX2) |\n                      AON_CMU_BYPASS_LOCK_PLLBB | AON_CMU_BYPASS_LOCK_PLLAUD |\n                      AON_CMU_SEL_CLK_OSC;\n  // Enable PMU fast clock\n  aoncmu->CLK_OUT &= ~(AON_CMU_SEL_DCDC_PLL | AON_CMU_SEL_DCDC_OSCX2);\n  aoncmu->CLK_OUT |= AON_CMU_BYPASS_DIV_DCDC;\n  aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_DCDC0_ENABLE;\n}\n\nvoid hal_cmu_init_chip_feature(uint16_t feature) {\n  aoncmu->CHIP_FEATURE = feature | AON_CMU_EFUSE_LOCK;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_osc_x2_enable(void) {\n  // Debug Select CMU REG F4\n  cmu->MCU_TIMER =\n      SET_BITFIELD(cmu->MCU_TIMER, CMU_DEBUG_REG_SEL, CMU_DEBUG_REG_SEL_DEBUG);\n  // Enable OSCX2 for MCU peripheral\n  aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_OSCX2_MCU_ENABLE;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_osc_x4_enable(void) {\n#ifdef ANA_26M_X4_ENABLE\n  aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_X4_ANA_ENABLE;\n#endif\n#ifdef OSC_26M_X4_AUD2BB\n  aoncmu->CLK_SELECT |= AON_CMU_SEL_X4_SYS;\n  aoncmu->CLK_SELECT &= ~AON_CMU_SEL_X4_DIG;\n#endif\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_module_init_state(void) {\n  aoncmu->CODEC_DIV = (aoncmu->CODEC_DIV & ~AON_CMU_SEL_CLK_OSCX2) |\n                      AON_CMU_BYPASS_LOCK_PLLBB | AON_CMU_BYPASS_LOCK_PLLAUD |\n                      AON_CMU_SEL_CLK_OSC;\n  // Slow down PMU fast clock\n  aoncmu->CLK_OUT = (aoncmu->CLK_OUT &\n                     ~(AON_CMU_BYPASS_DIV_DCDC | AON_CMU_CFG_DIV_DCDC_MASK)) |\n                    AON_CMU_CFG_DIV_DCDC(2);\n\n  // DMA channel config\n  cmu->ADMA_CH0_4_REQ =\n      // codec\n      CMU_ADMA_CH0_REQ_IDX(0) | CMU_ADMA_CH1_REQ_IDX(1) |\n#ifdef CODEC_DSD\n      // codec_dsd\n      CMU_ADMA_CH2_REQ_IDX(16) | CMU_ADMA_CH3_REQ_IDX(17) |\n#else\n      // btpcm\n      CMU_ADMA_CH2_REQ_IDX(2) | CMU_ADMA_CH3_REQ_IDX(3) |\n#endif\n      // i2s0\n      CMU_ADMA_CH4_REQ_IDX(4);\n  cmu->ADMA_CH5_9_REQ =\n      // i2s0\n      CMU_ADMA_CH5_REQ_IDX(5) |\n      // fir\n      CMU_ADMA_CH6_REQ_IDX(6) | CMU_ADMA_CH7_REQ_IDX(7) |\n      // spdif\n      CMU_ADMA_CH8_REQ_IDX(8) | CMU_ADMA_CH9_REQ_IDX(9);\n  cmu->ADMA_CH10_14_REQ =\n      // iir\n      CMU_ADMA_CH10_REQ_IDX(10) | CMU_ADMA_CH11_REQ_IDX(11) |\n      // btdump\n      CMU_ADMA_CH12_REQ_IDX(12) |\n      // mc\n      CMU_ADMA_CH13_REQ_IDX(13) |\n      // i2s1\n      CMU_ADMA_CH14_REQ_IDX(18);\n  cmu->ADMA_CH15_REQ =\n      // i2s1\n      CMU_ADMA_CH15_REQ_IDX(19);\n  cmu->GDMA_CH0_4_REQ =\n      // flash\n      CMU_GDMA_CH0_REQ_IDX(20) |\n      // sdmmc\n      CMU_GDMA_CH1_REQ_IDX(21) |\n      // i2c0\n      CMU_GDMA_CH2_REQ_IDX(22) | CMU_GDMA_CH3_REQ_IDX(23) |\n      // spi\n      CMU_GDMA_CH4_REQ_IDX(24);\n  cmu->GDMA_CH5_9_REQ =\n      // spi\n      CMU_GDMA_CH5_REQ_IDX(25) |\n      // spilcd\n      CMU_GDMA_CH6_REQ_IDX(26) | CMU_GDMA_CH7_REQ_IDX(27) |\n      // uart0\n      CMU_GDMA_CH8_REQ_IDX(28) | CMU_GDMA_CH9_REQ_IDX(29);\n  cmu->GDMA_CH10_14_REQ =\n      // uart1\n      CMU_GDMA_CH10_REQ_IDX(30) | CMU_GDMA_CH11_REQ_IDX(31) |\n      // i2c1\n      CMU_GDMA_CH12_REQ_IDX(32) | CMU_GDMA_CH13_REQ_IDX(33) |\n      // uart2\n      CMU_GDMA_CH14_REQ_IDX(34);\n  cmu->GDMA_CH15_REQ =\n      // uart2\n      CMU_GDMA_CH15_REQ_IDX(35);\n\n#ifndef SIMU\n  cmu->ORESET_SET = SYS_ORST_USB | SYS_ORST_SDMMC | SYS_ORST_WDT |\n                    SYS_ORST_TIMER2 | SYS_ORST_I2C0 | SYS_ORST_I2C1 |\n                    SYS_ORST_SPI | SYS_ORST_SLCD | SYS_ORST_SPI_PHY |\n                    SYS_ORST_UART0 | SYS_ORST_UART1 | SYS_ORST_UART2 |\n                    SYS_ORST_I2S0 | SYS_ORST_SPDIF0 | SYS_ORST_PCM |\n                    SYS_ORST_USB32K | SYS_ORST_I2S1;\n  cmu->PRESET_SET = SYS_PRST_WDT | SYS_PRST_TIMER2 | SYS_PRST_I2C0 |\n                    SYS_PRST_I2C1 | SYS_PRST_SPI | SYS_PRST_SLCD |\n                    SYS_PRST_SPI_PHY | SYS_PRST_UART0 | SYS_PRST_UART1 |\n                    SYS_PRST_UART2 | SYS_PRST_PCM | SYS_PRST_I2S0 |\n                    SYS_PRST_SPDIF0 | SYS_PRST_I2S1 | SYS_PRST_BCM;\n  cmu->HRESET_SET = SYS_HRST_SDMMC | SYS_HRST_USBC | SYS_HRST_CODEC |\n                    SYS_HRST_FFT | SYS_HRST_USBH | SYS_HRST_SENSOR_HUB |\n                    SYS_HRST_BT_DUMP | SYS_HRST_CP | SYS_HRST_BCM |\n                    SYS_HRST_ICACHE0;\n\n  cmu->OCLK_DISABLE = SYS_OCLK_USB | SYS_OCLK_SDMMC | SYS_OCLK_WDT |\n                      SYS_OCLK_TIMER2 | SYS_OCLK_I2C0 | SYS_OCLK_I2C1 |\n                      SYS_OCLK_SPI | SYS_OCLK_SLCD | SYS_OCLK_SPI_PHY |\n                      SYS_OCLK_UART0 | SYS_OCLK_UART1 | SYS_OCLK_UART2 |\n                      SYS_OCLK_I2S0 | SYS_OCLK_SPDIF0 | SYS_OCLK_PCM |\n                      SYS_OCLK_USB32K | SYS_OCLK_I2S1;\n  cmu->PCLK_DISABLE = SYS_PCLK_WDT | SYS_PCLK_TIMER2 | SYS_PCLK_I2C0 |\n                      SYS_PCLK_I2C1 | SYS_PCLK_SPI | SYS_PCLK_SLCD |\n                      SYS_PCLK_SPI_PHY | SYS_PCLK_UART0 | SYS_PCLK_UART1 |\n                      SYS_PCLK_UART2 | SYS_PCLK_PCM | SYS_PCLK_I2S0 |\n                      SYS_PCLK_SPDIF0 | SYS_PCLK_I2S1 | SYS_PCLK_BCM;\n  cmu->HCLK_DISABLE = SYS_HCLK_SDMMC | SYS_HCLK_USBC | SYS_HCLK_CODEC |\n                      SYS_HCLK_FFT | SYS_HCLK_USBH | SYS_HCLK_SENSOR_HUB |\n                      SYS_HCLK_BT_DUMP | SYS_HCLK_CP | SYS_HCLK_BCM |\n                      SYS_HCLK_ICACHE0;\n\n  aoncmu->TOP_CLK_DISABLE =\n      AON_CMU_EN_CLK_PLL_CODEC_DISABLE | AON_CMU_EN_CLK_CODEC_HCLK_DISABLE |\n      AON_CMU_EN_CLK_CODEC_DISABLE | AON_CMU_EN_CLK_CODEC_IIR_DISABLE |\n      AON_CMU_EN_CLK_PLL_BT_DISABLE | AON_CMU_EN_CLK_60M_BT_DISABLE |\n      AON_CMU_EN_CLK_OSCX2_BT_DISABLE | AON_CMU_EN_CLK_OSC_BT_DISABLE |\n      AON_CMU_EN_CLK_32K_BT_DISABLE | AON_CMU_EN_CLK_PLL_PER_DISABLE;\n\n  aoncmu->RESET_SET = AON_CMU_ARESETN_SET(AON_ARST_PWM) |\n                      AON_CMU_ORESETN_SET(AON_ORST_PWM0 | AON_ORST_PWM1 |\n                                          AON_ORST_PWM2 | AON_ORST_PWM3) |\n                      AON_CMU_SOFT_RSTN_CODEC_SET | AON_CMU_SOFT_RSTN_BT_SET |\n                      AON_CMU_SOFT_RSTN_BTCPU_SET;\n\n  aoncmu->MOD_CLK_DISABLE =\n      AON_CMU_MANUAL_ACLK_DISABLE(AON_ACLK_PWM) |\n      AON_CMU_MANUAL_OCLK_DISABLE(AON_OCLK_PWM0 | AON_OCLK_PWM1 |\n                                  AON_OCLK_PWM2 | AON_OCLK_PWM3);\n\n  aoncmu->MOD_CLK_MODE &= ~AON_CMU_MODE_ACLK(\n      AON_ACLK_CMU | AON_ACLK_GPIO_INT | AON_ACLK_WDT | AON_ACLK_PWM |\n      AON_ACLK_TIMER | AON_ACLK_PSC | AON_ACLK_IOMUX);\n  cmu->PCLK_MODE &= ~(SYS_PCLK_CMU | SYS_PCLK_WDT | SYS_PCLK_TIMER0 |\n                      SYS_PCLK_TIMER1 | SYS_PCLK_TIMER2);\n\n  // cmu->HCLK_MODE = 0;\n  // cmu->PCLK_MODE = SYS_PCLK_UART0 | SYS_PCLK_UART1 | SYS_PCLK_UART2;\n  // cmu->OCLK_MODE = 0;\n#endif\n\n#ifdef CORE_SLEEP_POWER_DOWN\n  hal_cmu_set_wakeup_pc((uint32_t)hal_sleep_core_power_up);\n#endif\n  hal_psc_init();\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_ema_init(void) {\n  // Never change EMA in best2300\n}\n\nvoid hal_cmu_lpu_wait_26m_ready(void) {\n  while ((cmu->WAKEUP_CLK_CFG & CMU_LPU_STATUS_26M) == 0)\n    ;\n}\n\nint hal_cmu_lpu_busy(void) {\n  if ((cmu->WAKEUP_CLK_CFG & CMU_LPU_AUTO_SWITCH26) &&\n      (cmu->WAKEUP_CLK_CFG & CMU_LPU_STATUS_26M) == 0) {\n    return 1;\n  }\n  if ((cmu->WAKEUP_CLK_CFG & CMU_LPU_AUTO_SWITCHPLL) &&\n      (cmu->WAKEUP_CLK_CFG & CMU_LPU_STATUS_PLL) == 0) {\n    return 1;\n  }\n  return 0;\n}\n\nint BOOT_TEXT_FLASH_LOC hal_cmu_lpu_init(enum HAL_CMU_LPU_CLK_CFG_T cfg) {\n  uint32_t lpu_clk;\n  uint32_t timer_26m;\n  uint32_t timer_pll;\n\n  timer_26m = LPU_TIMER_US(TICKS_TO_US(HAL_CMU_26M_READY_TIMEOUT));\n  timer_pll = LPU_TIMER_US(TICKS_TO_US(HAL_CMU_PLL_LOCKED_TIMEOUT));\n\n  if (cfg >= HAL_CMU_LPU_CLK_QTY) {\n    return 1;\n  }\n  if ((timer_26m & (CMU_TIMER_WT26_MASK >> CMU_TIMER_WT26_SHIFT)) !=\n      timer_26m) {\n    return 2;\n  }\n  if ((timer_pll & (CMU_TIMER_WTPLL_MASK >> CMU_TIMER_WTPLL_SHIFT)) !=\n      timer_pll) {\n    return 3;\n  }\n  if (hal_cmu_lpu_busy()) {\n    return -1;\n  }\n\n  if (cfg == HAL_CMU_LPU_CLK_26M) {\n    lpu_clk = CMU_LPU_AUTO_SWITCH26;\n  } else if (cfg == HAL_CMU_LPU_CLK_PLL) {\n    lpu_clk = CMU_LPU_AUTO_SWITCHPLL | CMU_LPU_AUTO_SWITCH26;\n  } else {\n    lpu_clk = 0;\n  }\n\n  if (lpu_clk & CMU_LPU_AUTO_SWITCH26) {\n    // Disable RAM wakeup early\n    cmu->MCU_TIMER &= ~CMU_RAM_RETN_UP_EARLY;\n    // MCU/ROM/RAM auto clock gating (which depends on RAM gating signal)\n    cmu->HCLK_MODE &=\n        ~(SYS_HCLK_MCU | SYS_HCLK_ROM0 | SYS_HCLK_ROM1 | SYS_HCLK_ROM2 |\n          SYS_HCLK_RAM0 | SYS_HCLK_RAM1 | SYS_HCLK_RAM2 | SYS_HCLK_RAMRET |\n          SYS_HCLK_RAM3 | SYS_HCLK_RAM4 | SYS_HCLK_RAM5 | SYS_HCLK_RAM6);\n    // AON_CMU enable auto switch 26M (AON_CMU must have selected 26M and\n    // disabled 52M/32K already)\n    aoncmu->CLK_SELECT |= AON_CMU_LPU_AUTO_SWITCH26;\n  } else {\n    // AON_CMU disable auto switch 26M\n    aoncmu->CLK_SELECT &= ~AON_CMU_LPU_AUTO_SWITCH26;\n  }\n\n  cmu->WAKEUP_CLK_CFG =\n      CMU_TIMER_WT26(timer_26m) | CMU_TIMER_WTPLL(0) | lpu_clk;\n  if (timer_pll) {\n    hal_sys_timer_delay(US_TO_TICKS(60));\n    cmu->WAKEUP_CLK_CFG =\n        CMU_TIMER_WT26(timer_26m) | CMU_TIMER_WTPLL(timer_pll) | lpu_clk;\n  }\n  return 0;\n}\n\n#ifdef CORE_SLEEP_POWER_DOWN\n\nstatic int SRAM_TEXT_LOC hal_cmu_lpu_sleep_pd(void) {\n  uint32_t start;\n  uint32_t timeout;\n  uint32_t saved_hclk;\n  uint32_t saved_oclk;\n  uint32_t saved_top_clk;\n  uint32_t saved_clk_cfg;\n  uint32_t saved_periph_clk;\n  uint32_t saved_sys_div;\n  uint32_t saved_uart_clk;\n  uint32_t saved_codec_div;\n  uint32_t pll_locked;\n  uint32_t saved_cpu_regs[50];\n  register uint32_t sp asm(\"sp\");\n  uint32_t stack_limit;\n\n#ifdef ROM_BUILD\n  extern uint32_t __rom_StackLimit[];\n  stack_limit = (uint32_t)__rom_StackLimit;\n#else\n  extern uint32_t __StackLimit[];\n  stack_limit = (uint32_t)__StackLimit;\n#endif\n  if (sp < stack_limit + 20 * 4) {\n    do {\n      asm volatile(\"nop; nop; nop; nop\");\n    } while (1);\n  }\n\n  NVIC_PowerDownSleep(saved_cpu_regs, ARRAY_SIZE(saved_cpu_regs));\n\n  saved_hclk = cmu->HCLK_ENABLE;\n  saved_oclk = cmu->OCLK_ENABLE;\n  saved_periph_clk = cmu->PERIPH_CLK;\n  saved_sys_div = cmu->SYS_DIV;\n  saved_uart_clk = cmu->UART_CLK;\n  saved_codec_div = aoncmu->CODEC_DIV;\n\n  saved_top_clk = aoncmu->TOP_CLK_ENABLE;\n  saved_clk_cfg = cmu->SYS_CLK_ENABLE;\n\n  // Switch VAD clock to AON and disable codec HCLK\n  aoncmu->CODEC_DIV |= AON_CMU_SEL_CODEC_HCLK_AON;\n  aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_CODEC_HCLK_DISABLE;\n\n  // Disable memory/flash clock\n  cmu->OCLK_DISABLE = SYS_OCLK_FLASH;\n  cmu->HCLK_DISABLE = SYS_HCLK_FLASH;\n\n#ifndef ROM_BUILD\n  // Reset pll div if pll is enabled\n  if (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE) {\n    pmu_pll_div_reset_set(HAL_CMU_PLL_AUD);\n  }\n  if (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE) {\n    pmu_pll_div_reset_set(HAL_CMU_PLL_USB);\n  }\n#endif\n\n  // Switch system freq to 26M\n  cmu->SYS_CLK_ENABLE = CMU_SEL_OSC_SYS_ENABLE;\n  cmu->SYS_CLK_DISABLE = CMU_SEL_OSCX2_SYS_DISABLE | CMU_SEL_PLL_SYS_DISABLE;\n  cmu->SYS_CLK_DISABLE = CMU_RSTN_DIV_SYS_DISABLE;\n\n  // Shutdown PLLs\n  if (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE) {\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLAUD_DISABLE;\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLAUD_DISABLE;\n  }\n  if (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE) {\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLBB_DISABLE;\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLBB_DISABLE;\n  }\n  if (saved_top_clk & AON_CMU_PU_PLLUSB_ENABLE) {\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLUSB_DISABLE;\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLUSB_DISABLE;\n  }\n\n  // Set power down wakeup bootmode\n  aoncmu->BOOTMODE = (aoncmu->BOOTMODE | HAL_SW_BOOTMODE_POWER_DOWN_WAKEUP) &\n                     HAL_SW_BOOTMODE_MASK;\n  // Set AON_CMU clock to 32K\n  aoncmu->CODEC_DIV &= ~(AON_CMU_SEL_CLK_OSC | AON_CMU_SEL_CLK_OSCX2);\n\n  hal_sleep_core_power_down();\n\n  while ((cmu->WAKEUP_CLK_CFG & CMU_LPU_STATUS_26M) == 0)\n    ;\n\n  // Restore AON_CMU clock\n  aoncmu->CODEC_DIV = saved_codec_div;\n  // Clear power down wakeup bootmode\n  aoncmu->BOOTMODE = (aoncmu->BOOTMODE & ~HAL_SW_BOOTMODE_POWER_DOWN_WAKEUP) &\n                     HAL_SW_BOOTMODE_MASK;\n\n  // Disable memory/flash clock\n  cmu->OCLK_DISABLE = SYS_OCLK_FLASH;\n  cmu->HCLK_DISABLE = SYS_HCLK_FLASH;\n\n  // Restore PLLs\n  if (saved_top_clk & (AON_CMU_PU_PLLAUD_ENABLE | AON_CMU_PU_PLLUSB_ENABLE |\n                       AON_CMU_PU_PLLBB_ENABLE)) {\n    pll_locked = 0;\n    if (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE) {\n      aoncmu->TOP_CLK_ENABLE = AON_CMU_PU_PLLAUD_ENABLE;\n      pll_locked |= AON_CMU_LOCK_PLLAUD;\n    }\n    if (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE) {\n      aoncmu->TOP_CLK_ENABLE = AON_CMU_PU_PLLBB_ENABLE;\n      pll_locked |= AON_CMU_LOCK_PLLBB;\n    }\n    if (saved_top_clk & AON_CMU_PU_PLLUSB_ENABLE) {\n      aoncmu->TOP_CLK_ENABLE = AON_CMU_PU_PLLUSB_ENABLE;\n      pll_locked |= AON_CMU_LOCK_PLLUSB;\n    }\n#ifndef ROM_BUILD\n    hal_sys_timer_delay_us(10);\n    // Clear pll div reset if pll is enabled\n    if (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE) {\n      pmu_pll_div_reset_clear(HAL_CMU_PLL_AUD);\n    }\n    if (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE) {\n      pmu_pll_div_reset_clear(HAL_CMU_PLL_USB);\n    }\n#endif\n    start = hal_sys_timer_get();\n    timeout = HAL_CMU_PLL_LOCKED_TIMEOUT;\n    while ( //(aoncmu->CODEC_DIV & pll_locked) != pll_locked &&\n        (hal_sys_timer_get() - start) < timeout)\n      ;\n    if (saved_top_clk & AON_CMU_EN_CLK_TOP_PLLAUD_ENABLE) {\n      aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_TOP_PLLAUD_ENABLE;\n    }\n    if (saved_top_clk & AON_CMU_EN_CLK_TOP_PLLBB_ENABLE) {\n      aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_TOP_PLLBB_ENABLE;\n    }\n    if (saved_top_clk & AON_CMU_EN_CLK_TOP_PLLUSB_ENABLE) {\n      aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_TOP_PLLUSB_ENABLE;\n    }\n  }\n\n  // Restore system freq\n  cmu->SYS_CLK_ENABLE =\n      saved_clk_cfg & (CMU_RSTN_DIV_FLS_ENABLE | CMU_RSTN_DIV_SYS_ENABLE);\n  cmu->SYS_CLK_ENABLE = saved_clk_cfg;\n  // The original system freq are at least 26M\n  // cmu->SYS_CLK_DISABLE = ~saved_clk_cfg;\n\n  cmu->PERIPH_CLK = saved_periph_clk;\n  cmu->SYS_DIV = saved_sys_div;\n  cmu->UART_CLK = saved_uart_clk;\n\n  // Switch VAD clock to MCU and enable codec HCLK if it is on before entering\n  // sleep\n  // aoncmu->CODEC_DIV &= ~AON_CMU_SEL_CODEC_HCLK_AON;\n  aoncmu->TOP_CLK_ENABLE = saved_top_clk & AON_CMU_EN_CLK_CODEC_HCLK_ENABLE;\n\n  int_lock();\n\n  NVIC_PowerDownWakeup(saved_cpu_regs, ARRAY_SIZE(saved_cpu_regs));\n\n  // TODO:\n  // 1) Restore hardware modules, e.g., timer, cache, flash, psram, dma, usb,\n  // uart, spi, i2c, sdmmc, codec 2) Recover system timer in rt_suspend() and\n  // rt_resume() 3) Dynamically select 32K sleep or power down sleep\n\n  if (saved_oclk & SYS_OCLK_FLASH) {\n    // Enable memory/flash clock\n    cmu->HCLK_ENABLE = saved_hclk;\n    cmu->OCLK_ENABLE = saved_oclk;\n    // Wait until memory/flash clock ready\n    hal_sys_timer_delay_us(2);\n  }\n\n  return 0;\n}\n\n#endif\n\n__STATIC_FORCEINLINE void cpu_sleep(uint32_t wakeup_cfg) {\n  __DSB();\n\n  if (wakeup_cfg & (CMU_LPU_AUTO_SWITCHPLL | CMU_LPU_AUTO_SWITCH26)) {\n    // 1) Avoid race condition between LPU state machine entry and IRQ wakeup:\n    //    wait 4 (at least 2) cycles of 32K clock, or 3248 cycles of 26M clock\n    // 2) Avoid race condition between CPU clock gating and RAM access when\n    // waiting:\n    //    No consecutive RAM access is allowed (all instructions must be 16-bit\n    //    and must have no data access)\n    asm volatile(\"wfi;\"\n                 \"movs.n r0, #0x3;\"\n                 \"lsls r0, #8;\"\n                 \"adds.n r0, #0x2c;\"\n                 \"1:;\"\n                 \"nop;\"\n                 \"nop;\"\n                 \"subs r0, 1;\"\n                 \"bne.n 1b;\"\n                 :\n                 :\n                 : \"r0\", \"cc\");\n  } else {\n    __WFI();\n  }\n}\n\nstatic int SRAM_TEXT_LOC\nhal_cmu_lpu_sleep_normal(enum HAL_CMU_LPU_SLEEP_MODE_T mode) {\n  uint32_t start;\n  uint32_t timeout;\n  uint32_t saved_hclk;\n  uint32_t saved_oclk;\n  uint32_t saved_top_clk;\n  uint32_t saved_clk_cfg;\n  uint32_t saved_codec_div;\n  uint32_t wakeup_cfg;\n  bool pd_aud_pll;\n  bool pd_bb_pll;\n  bool wait_pll_locked;\n\n  pd_aud_pll = true;\n  pd_bb_pll = true;\n\n  saved_hclk = cmu->HCLK_ENABLE;\n  saved_oclk = cmu->OCLK_ENABLE;\n  saved_codec_div = aoncmu->CODEC_DIV;\n  saved_top_clk = aoncmu->TOP_CLK_ENABLE;\n  saved_clk_cfg = cmu->SYS_CLK_ENABLE;\n\n  if (mode == HAL_CMU_LPU_SLEEP_MODE_CHIP) {\n    wakeup_cfg = cmu->WAKEUP_CLK_CFG;\n  } else {\n    wakeup_cfg = 0;\n    if (pll_user_map[HAL_CMU_PLL_AUD] & (1 << HAL_CMU_PLL_USER_AUD)) {\n      pd_aud_pll = false;\n    }\n    if (pll_user_map[HAL_CMU_PLL_USB] & (1 << HAL_CMU_PLL_USER_AUD)) {\n      pd_bb_pll = false;\n    }\n  }\n\n  // Switch VAD clock to AON and disable codec HCLK\n  aoncmu->CODEC_DIV |= AON_CMU_SEL_CODEC_HCLK_AON;\n  if (mode == HAL_CMU_LPU_SLEEP_MODE_CHIP) {\n    aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_CODEC_HCLK_DISABLE;\n  }\n\n  // Disable memory/flash clock\n  cmu->OCLK_DISABLE = SYS_OCLK_FLASH;\n  cmu->HCLK_DISABLE = SYS_HCLK_FLASH;\n\n#ifndef ROM_BUILD\n  // Reset pll div if pll is enabled\n  if (pd_aud_pll && (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE)) {\n    pmu_pll_div_reset_set(HAL_CMU_PLL_AUD);\n  }\n  if (pd_bb_pll && (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE)) {\n    pmu_pll_div_reset_set(HAL_CMU_PLL_USB);\n  }\n#endif\n\n  // Setup wakeup mask\n  cmu->WAKEUP_MASK0 = NVIC->ISER[0];\n  cmu->WAKEUP_MASK1 = NVIC->ISER[1];\n\n  if (wakeup_cfg & CMU_LPU_AUTO_SWITCHPLL) {\n    // Do nothing\n    // Hardware will switch system freq to 32K and shutdown PLLs automatically\n  } else {\n    // Switch system freq to 26M\n    cmu->SYS_CLK_ENABLE = CMU_SEL_OSC_SYS_ENABLE;\n    cmu->SYS_CLK_DISABLE = CMU_SEL_OSCX2_SYS_DISABLE | CMU_SEL_PLL_SYS_DISABLE;\n    cmu->SYS_CLK_DISABLE = CMU_RSTN_DIV_SYS_DISABLE;\n    // Shutdown PLLs\n    if (pd_aud_pll && (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE)) {\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLAUD_DISABLE;\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLAUD_DISABLE;\n    }\n    if (pd_bb_pll && (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE)) {\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLBB_DISABLE;\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLBB_DISABLE;\n    }\n    if (saved_top_clk & AON_CMU_PU_PLLUSB_ENABLE) {\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_TOP_PLLUSB_DISABLE;\n      aoncmu->TOP_CLK_DISABLE = AON_CMU_PU_PLLUSB_DISABLE;\n    }\n    if (wakeup_cfg & CMU_LPU_AUTO_SWITCH26) {\n      // Do nothing\n      // Hardware will switch system freq to 32K automatically\n    } else {\n      // Manually switch AON_CMU clock to 32K\n      aoncmu->CODEC_DIV &= ~(AON_CMU_SEL_CLK_OSC | AON_CMU_SEL_CLK_OSCX2);\n      // Switch system freq to 32K\n      cmu->SYS_CLK_DISABLE = CMU_SEL_OSC_SYS_DISABLE;\n    }\n  }\n\n  if (wakeup_cfg & CMU_LPU_AUTO_SWITCH26) {\n    // Enable auto memory retention\n    cmu->SLEEP = (cmu->SLEEP & ~CMU_MANUAL_RAM_RETN) | CMU_DEEPSLEEP_EN |\n                 CMU_DEEPSLEEP_ROMRAM_EN | CMU_DEEPSLEEP_START;\n  } else {\n    // Disable auto memory retention\n    cmu->SLEEP = (cmu->SLEEP & ~CMU_DEEPSLEEP_ROMRAM_EN) | CMU_DEEPSLEEP_EN |\n                 CMU_MANUAL_RAM_RETN | CMU_DEEPSLEEP_START;\n  }\n\n  if (mode == HAL_CMU_LPU_SLEEP_MODE_CHIP) {\n    SCB->SCR = SCB_SCR_SLEEPDEEP_Msk;\n  } else {\n    SCB->SCR = 0;\n  }\n\n  cpu_sleep(wakeup_cfg);\n\n  if (wakeup_cfg & CMU_LPU_AUTO_SWITCHPLL) {\n    start = hal_sys_timer_get();\n    timeout = HAL_CMU_26M_READY_TIMEOUT + HAL_CMU_PLL_LOCKED_TIMEOUT +\n              HAL_CMU_LPU_EXTRA_TIMEOUT;\n    while ((cmu->WAKEUP_CLK_CFG & CMU_LPU_STATUS_PLL) == 0 &&\n           (hal_sys_timer_get() - start) < timeout)\n      ;\n      // !!! CAUTION !!!\n      // Hardware will switch system freq to PLL divider and enable PLLs\n      // automatically\n#ifndef ROM_BUILD\n    hal_sys_timer_delay_us(10);\n    // Clear pll div reset if pll is enabled\n    if (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE) {\n      pmu_pll_div_reset_clear(HAL_CMU_PLL_AUD);\n    }\n    if (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE) {\n      pmu_pll_div_reset_clear(HAL_CMU_PLL_USB);\n    }\n#endif\n  } else {\n    // Wait for 26M ready\n    if (wakeup_cfg & CMU_LPU_AUTO_SWITCH26) {\n      start = hal_sys_timer_get();\n      timeout = HAL_CMU_26M_READY_TIMEOUT + HAL_CMU_LPU_EXTRA_TIMEOUT;\n      while ((cmu->WAKEUP_CLK_CFG & CMU_LPU_STATUS_26M) == 0 &&\n             (hal_sys_timer_get() - start) < timeout)\n        ;\n      // Hardware will switch system freq to 26M automatically\n    } else {\n      if (mode == HAL_CMU_LPU_SLEEP_MODE_CHIP) {\n        timeout = HAL_CMU_26M_READY_TIMEOUT;\n        hal_sys_timer_delay(timeout);\n      }\n      // Switch system freq to 26M\n      cmu->SYS_CLK_ENABLE = CMU_SEL_OSC_SYS_ENABLE;\n      // Restore AON_CMU clock\n      aoncmu->CODEC_DIV = saved_codec_div;\n    }\n    // System freq is 26M now and will be restored later\n    // Restore PLLs\n    if (saved_top_clk & (AON_CMU_PU_PLLAUD_ENABLE | AON_CMU_PU_PLLUSB_ENABLE |\n                         AON_CMU_PU_PLLBB_ENABLE)) {\n      wait_pll_locked = false;\n      if (pd_aud_pll && (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE)) {\n        aoncmu->TOP_CLK_ENABLE = AON_CMU_PU_PLLAUD_ENABLE;\n        wait_pll_locked = true;\n      }\n      if (pd_bb_pll && (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE)) {\n        aoncmu->TOP_CLK_ENABLE = AON_CMU_PU_PLLBB_ENABLE;\n        wait_pll_locked = true;\n      }\n      if (saved_top_clk & AON_CMU_PU_PLLUSB_ENABLE) {\n        aoncmu->TOP_CLK_ENABLE = AON_CMU_PU_PLLUSB_ENABLE;\n        wait_pll_locked = true;\n      }\n      if (wait_pll_locked) {\n#ifndef ROM_BUILD\n        hal_sys_timer_delay_us(10);\n        // Clear pll div reset if pll is enabled\n        if (pd_aud_pll && (saved_top_clk & AON_CMU_PU_PLLAUD_ENABLE)) {\n          pmu_pll_div_reset_clear(HAL_CMU_PLL_AUD);\n        }\n        if (pd_bb_pll && (saved_top_clk & AON_CMU_PU_PLLBB_ENABLE)) {\n          pmu_pll_div_reset_clear(HAL_CMU_PLL_USB);\n        }\n#endif\n        start = hal_sys_timer_get();\n        timeout = HAL_CMU_PLL_LOCKED_TIMEOUT;\n        while ((hal_sys_timer_get() - start) < timeout)\n          ;\n      }\n      if (pd_aud_pll && (saved_top_clk & AON_CMU_EN_CLK_TOP_PLLAUD_ENABLE)) {\n        aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_TOP_PLLAUD_ENABLE;\n      }\n      if (pd_bb_pll && (saved_top_clk & AON_CMU_EN_CLK_TOP_PLLBB_ENABLE)) {\n        aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_TOP_PLLBB_ENABLE;\n      }\n      if (saved_top_clk & AON_CMU_EN_CLK_TOP_PLLUSB_ENABLE) {\n        aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_TOP_PLLUSB_ENABLE;\n      }\n    }\n  }\n\n  // Restore system freq\n  cmu->SYS_CLK_ENABLE =\n      saved_clk_cfg & (CMU_RSTN_DIV_FLS_ENABLE | CMU_RSTN_DIV_SYS_ENABLE);\n  cmu->SYS_CLK_ENABLE = saved_clk_cfg;\n  // The original system freq are at least 26M\n  // cmu->SYS_CLK_DISABLE = ~saved_clk_cfg;\n\n  // Switch VAD clock to MCU and enable codec HCLK if it is on before entering\n  // sleep\n  aoncmu->CODEC_DIV &= ~AON_CMU_SEL_CODEC_HCLK_AON;\n  if (mode == HAL_CMU_LPU_SLEEP_MODE_CHIP) {\n    aoncmu->TOP_CLK_ENABLE = saved_top_clk & AON_CMU_EN_CLK_CODEC_HCLK_ENABLE;\n  }\n\n  if (saved_oclk & SYS_OCLK_FLASH) {\n    // Enable memory/flash clock\n    cmu->HCLK_ENABLE = saved_hclk;\n    cmu->OCLK_ENABLE = saved_oclk;\n    // Wait until memory/flash clock ready\n    hal_sys_timer_delay_us(2);\n  }\n\n  return 0;\n}\n\nint SRAM_TEXT_LOC hal_cmu_lpu_sleep(enum HAL_CMU_LPU_SLEEP_MODE_T mode) {\n#ifdef CORE_SLEEP_POWER_DOWN\n  if (mode == HAL_CMU_LPU_SLEEP_MODE_POWER_DOWN) {\n    return hal_cmu_lpu_sleep_pd();\n  }\n#endif\n  return hal_cmu_lpu_sleep_normal(mode);\n}\n\nvolatile uint32_t *hal_cmu_get_bootmode_addr(void) { return &aoncmu->BOOTMODE; }\n\nSRAM_TEXT_LOC\nvolatile uint32_t *hal_cmu_get_memsc_addr(void) { return &aoncmu->MEMSC[0]; }\n\nvoid hal_cmu_bt_clock_enable(void) {\n  aoncmu->TOP_CLK_ENABLE = AON_CMU_EN_CLK_OSCX2_BT_ENABLE |\n                           AON_CMU_EN_CLK_OSC_BT_ENABLE |\n                           AON_CMU_EN_CLK_32K_BT_ENABLE;\n  aocmu_reg_update_wait();\n}\n\nvoid hal_cmu_bt_clock_disable(void) {\n  aoncmu->TOP_CLK_DISABLE = AON_CMU_EN_CLK_OSCX2_BT_DISABLE |\n                            AON_CMU_EN_CLK_OSC_BT_DISABLE |\n                            AON_CMU_EN_CLK_32K_BT_DISABLE;\n}\n\nvoid hal_cmu_bt_reset_set(void) {\n  aoncmu->RESET_SET = AON_CMU_SOFT_RSTN_BT_SET | AON_CMU_SOFT_RSTN_BTCPU_SET;\n}\n\nvoid hal_cmu_bt_reset_clear(void) {\n  aoncmu->RESET_CLR = AON_CMU_SOFT_RSTN_BT_CLR | AON_CMU_SOFT_RSTN_BTCPU_CLR;\n  aocmu_reg_update_wait();\n}\n\nvoid hal_cmu_bt_module_init(void) {\n  // btcmu->CLK_MODE = 0;\n}\n\nuint32_t hal_cmu_get_aon_chip_id(void) { return aoncmu->CHIP_ID; }\n\nuint32_t hal_cmu_get_aon_revision_id(void) {\n  return GET_BITFIELD(aoncmu->CHIP_ID, AON_CMU_REVISION_ID);\n}\n\nvoid hal_cmu_cp_enable(uint32_t sp, uint32_t entry) {\n  cp_cfg->stack = sp;\n  cp_cfg->reset_hdlr = (uint32_t)system_cp_reset_handler;\n  cp_cfg->entry = entry;\n\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_CP);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_CP);\n}\n\nvoid hal_cmu_cp_disable(void) {\n  hal_cmu_reset_set(HAL_CMU_MOD_H_CP);\n  hal_cmu_clock_disable(HAL_CMU_MOD_H_CP);\n}\n\nuint32_t hal_cmu_cp_get_entry_addr(void) { return cp_cfg->entry; }\n"
  },
  {
    "path": "platform/hal/best2300p/hal_cmu_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_CMU_BEST2300P_H__\n#define __HAL_CMU_BEST2300P_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef __uint32_t_defined\ntypedef unsigned int uint32_t;\n# define __uint32_t_defined\n#endif\n\n#define HAL_CMU_VALID_CRYSTAL_FREQ          { 26000000, 24000000, 40000000, 48000000, }\n\nenum HAL_CMU_MOD_ID_T {\n    // HCLK/HRST\n    HAL_CMU_MOD_H_MCU,          // 0\n    HAL_CMU_MOD_H_ROM0,         // 1\n    HAL_CMU_MOD_H_ROM1,         // 2\n    HAL_CMU_MOD_H_ROM2,         // 3\n    HAL_CMU_MOD_H_RAM0,         // 4\n    HAL_CMU_MOD_H_RAM1,         // 5\n    HAL_CMU_MOD_H_RAM2,         // 6\n    HAL_CMU_MOD_H_RAMRET,       // 7\n    HAL_CMU_MOD_H_AHB0,         // 8\n    HAL_CMU_MOD_H_AHB1,         // 9\n    HAL_CMU_MOD_H_AH2H_BT,      // 10\n    HAL_CMU_MOD_H_ADMA,         // 11\n    HAL_CMU_MOD_H_GDMA,         // 12\n    HAL_CMU_MOD_H_CACHE,        // 13\n    HAL_CMU_MOD_H_FLASH,        // 14\n    HAL_CMU_MOD_H_SDMMC,        // 15\n    HAL_CMU_MOD_H_USBC,         // 16\n    HAL_CMU_MOD_H_CODEC,        // 17\n    HAL_CMU_MOD_H_FFT,          // 18\n    HAL_CMU_MOD_H_I2C_SLAVE,    // 19\n    HAL_CMU_MOD_H_USBH,         // 20\n    HAL_CMU_MOD_H_SENSOR_ENG,   // 21\n    HAL_CMU_MOD_H_BT_DUMP,      // 22\n    HAL_CMU_MOD_H_CP,           // 23\n    HAL_CMU_MOD_H_RAM3,         // 24\n    HAL_CMU_MOD_H_RAM4,         // 25\n    HAL_CMU_MOD_H_RAM5,         // 26\n    HAL_CMU_MOD_H_RAM6,         // 27\n    HAL_CMU_MOD_H_SEC_ENG,      // 28\n    HAL_CMU_MOD_H_ICACHE0,      // 29\n    HAL_CMU_MOD_H_ICACHE1,      // 30\n    // PCLK/PRST\n    HAL_CMU_MOD_P_CMU,          // 31\n    HAL_CMU_MOD_P_WDT,          // 32\n    HAL_CMU_MOD_P_TIMER0,       // 33\n    HAL_CMU_MOD_P_TIMER1,       // 34\n    HAL_CMU_MOD_P_TIMER2,       // 35\n    HAL_CMU_MOD_P_I2C0,         // 36\n    HAL_CMU_MOD_P_I2C1,         // 37\n    HAL_CMU_MOD_P_SPI,          // 38\n    HAL_CMU_MOD_P_SLCD,         // 39\n    HAL_CMU_MOD_P_SPI_ITN,      // 40\n    HAL_CMU_MOD_P_SPI_PHY,      // 41\n    HAL_CMU_MOD_P_UART0,        // 42\n    HAL_CMU_MOD_P_UART1,        // 43\n    HAL_CMU_MOD_P_UART2,        // 44\n    HAL_CMU_MOD_P_PCM,          // 45\n    HAL_CMU_MOD_P_I2S0,         // 46\n    HAL_CMU_MOD_P_SPDIF0,       // 47\n    HAL_CMU_MOD_P_I2S1,         // 48\n    HAL_CMU_MOD_P_SEC_ENG,      // 49\n    // OCLK/ORST\n    HAL_CMU_MOD_O_SLEEP,        // 50\n    HAL_CMU_MOD_O_FLASH,        // 51\n    HAL_CMU_MOD_O_USB,          // 52\n    HAL_CMU_MOD_O_SDMMC,        // 53\n    HAL_CMU_MOD_O_WDT,          // 54\n    HAL_CMU_MOD_O_TIMER0,       // 55\n    HAL_CMU_MOD_O_TIMER1,       // 56\n    HAL_CMU_MOD_O_TIMER2,       // 57\n    HAL_CMU_MOD_O_I2C0,         // 58\n    HAL_CMU_MOD_O_I2C1,         // 59\n    HAL_CMU_MOD_O_SPI,          // 60\n    HAL_CMU_MOD_O_SLCD,         // 61\n    HAL_CMU_MOD_O_SPI_ITN,      // 62\n    HAL_CMU_MOD_O_SPI_PHY,      // 63\n    HAL_CMU_MOD_O_UART0,        // 64\n    HAL_CMU_MOD_O_UART1,        // 65\n    HAL_CMU_MOD_O_UART2,        // 66\n    HAL_CMU_MOD_O_I2S0,         // 67\n    HAL_CMU_MOD_O_SPDIF0,       // 68\n    HAL_CMU_MOD_O_PCM,          // 69\n    HAL_CMU_MOD_O_USB32K,       // 70\n    HAL_CMU_MOD_O_I2S1,         // 71\n\n    // AON ACLK/ARST\n    HAL_CMU_AON_A_CMU,          // 72\n    HAL_CMU_AON_A_GPIO,         // 73\n    HAL_CMU_AON_A_GPIO_INT,     // 74\n    HAL_CMU_AON_A_WDT,          // 75\n    HAL_CMU_AON_A_PWM,          // 76\n    HAL_CMU_AON_A_TIMER,        // 77\n    HAL_CMU_AON_A_PSC,          // 78\n    HAL_CMU_AON_A_IOMUX,        // 79\n    HAL_CMU_AON_A_APBC,         // 80\n    HAL_CMU_AON_A_H2H_MCU,      // 81\n    // AON OCLK/ORST\n    HAL_CMU_AON_O_WDT,          // 82\n    HAL_CMU_AON_O_TIMER,        // 83\n    HAL_CMU_AON_O_GPIO,         // 84\n    HAL_CMU_AON_O_PWM0,         // 85\n    HAL_CMU_AON_O_PWM1,         // 86\n    HAL_CMU_AON_O_PWM2,         // 87\n    HAL_CMU_AON_O_PWM3,         // 88\n    HAL_CMU_AON_O_IOMUX,        // 89\n    HAL_CMU_AON_O_SLP32K,       // 90\n    HAL_CMU_AON_O_SLP26M,       // 91\n    HAL_CMU_AON_RESERVED0,      // 92\n    HAL_CMU_AON_RESERVED1,      // 93\n    HAL_CMU_AON_RESERVED2,      // 94\n    HAL_CMU_AON_RESERVED3,      // 95\n    // AON SUBSYS\n    HAL_CMU_AON_MCU,            // 96\n    HAL_CMU_AON_CODEC,          // 97\n    HAL_CMU_AON_RESERVED4,      // 98\n    HAL_CMU_AON_BT,             // 99\n    HAL_CMU_AON_MCUCPU,         // 100\n    HAL_CMU_AON_RESERVED5,      // 101\n    HAL_CMU_AON_BTCPU,          // 102\n    HAL_CMU_AON_GLOBAL,         // 103\n\n    HAL_CMU_MOD_QTY,\n\n    HAL_CMU_MOD_GLOBAL = HAL_CMU_AON_GLOBAL,\n    HAL_CMU_MOD_BT = HAL_CMU_AON_BT,\n    HAL_CMU_MOD_BTCPU = HAL_CMU_AON_BTCPU,\n\n    HAL_CMU_MOD_P_PWM = HAL_CMU_AON_A_PWM,\n    HAL_CMU_MOD_O_PWM0 = HAL_CMU_AON_O_PWM0,\n    HAL_CMU_MOD_O_PWM1 = HAL_CMU_AON_O_PWM1,\n    HAL_CMU_MOD_O_PWM2 = HAL_CMU_AON_O_PWM2,\n    HAL_CMU_MOD_O_PWM3 = HAL_CMU_AON_O_PWM3,\n\n    HAL_CMU_H_ICACHECP = HAL_CMU_MOD_H_ICACHE0,\n    HAL_CMU_H_DCACHECP = HAL_CMU_MOD_QTY,\n\n    // TO BE REMOVED\n    HAL_CMU_MOD_P_CODEC = HAL_CMU_MOD_QTY,\n    HAL_CMU_MOD_O_CODEC_DA = HAL_CMU_MOD_QTY,\n    HAL_CMU_MOD_O_CODEC_AD = HAL_CMU_MOD_QTY,\n};\n\nenum HAL_CMU_CLOCK_OUT_ID_T {\n    HAL_CMU_CLOCK_OUT_AON_32K           = 0x00,\n    HAL_CMU_CLOCK_OUT_AON_26M           = 0x01,\n    HAL_CMU_CLOCK_OUT_AON_52M           = 0x02,\n    HAL_CMU_CLOCK_OUT_AON_DIG_52M       = 0x03,\n    HAL_CMU_CLOCK_OUT_AON_DIG_104M      = 0x04,\n    HAL_CMU_CLOCK_OUT_AON_PER           = 0x05,\n    HAL_CMU_CLOCK_OUT_AON_USB           = 0x06,\n    HAL_CMU_CLOCK_OUT_AON_DCDC          = 0x07,\n    HAL_CMU_CLOCK_OUT_AON_CHCLK         = 0x08,\n    HAL_CMU_CLOCK_OUT_AON_SPDIF0        = 0x09,\n    HAL_CMU_CLOCK_OUT_AON_MCU           = 0x0A,\n    HAL_CMU_CLOCK_OUT_AON_FLASH         = 0x0B,\n    HAL_CMU_CLOCK_OUT_AON_SYS           = 0x0C,\n\n    HAL_CMU_CLOCK_OUT_BT_32K            = 0x40,\n    HAL_CMU_CLOCK_OUT_BT_SYS            = 0x41,\n    HAL_CMU_CLOCK_OUT_BT_52M            = 0x42,\n    HAL_CMU_CLOCK_OUT_BT_26MI           = 0x43,\n    HAL_CMU_CLOCK_OUT_BT_13M            = 0x44,\n    HAL_CMU_CLOCK_OUT_BT_12M            = 0x45,\n    HAL_CMU_CLOCK_OUT_BT_ADC            = 0x46,\n    HAL_CMU_CLOCK_OUT_BT_ADC2           = 0x47,\n    HAL_CMU_CLOCK_OUT_BT_24M            = 0x48,\n    HAL_CMU_CLOCK_OUT_BT_26M            = 0x49,\n\n    HAL_CMU_CLOCK_OUT_MCU_32K           = 0x60,\n    HAL_CMU_CLOCK_OUT_MCU_SYS           = 0x61,\n    HAL_CMU_CLOCK_OUT_MCU_FLASH         = 0x62,\n    HAL_CMU_CLOCK_OUT_MCU_USB           = 0x63,\n    HAL_CMU_CLOCK_OUT_MCU_PCLK          = 0x64,\n    HAL_CMU_CLOCK_OUT_MCU_I2S           = 0x65,\n    HAL_CMU_CLOCK_OUT_MCU_PCM           = 0x66,\n    HAL_CMU_CLOCK_OUT_MCU_SPDIF0        = 0x67,\n    HAL_CMU_CLOCK_OUT_MCU_SDMMC         = 0x68,\n    HAL_CMU_CLOCK_OUT_MCU_SPI2          = 0x69,\n    HAL_CMU_CLOCK_OUT_MCU_SPI0          = 0x6A,\n    HAL_CMU_CLOCK_OUT_MCU_SPI1          = 0x6B,\n\n    HAL_CMU_CLOCK_OUT_CODEC_ADC_ANA     = 0x80,\n    HAL_CMU_CLOCK_OUT_CODEC_CODEC       = 0x81,\n    HAL_CMU_CLOCK_OUT_CODEC_IIR         = 0x82,\n    HAL_CMU_CLOCK_OUT_CODEC_RS          = 0x83,\n    HAL_CMU_CLOCK_OUT_CODEC_HCLK        = 0x84,\n};\n\nenum HAL_CMU_I2S_MCLK_ID_T {\n    HAL_CMU_I2S_MCLK_PLLCODEC           = 0x00,\n    HAL_CMU_I2S_MCLK_CODEC              = 0x01,\n    HAL_CMU_I2S_MCLK_PLLIIR             = 0x02,\n    HAL_CMU_I2S_MCLK_PLLRS              = 0x03,\n    HAL_CMU_I2S_MCLK_PLLSPDIF0          = 0x04,\n    HAL_CMU_I2S_MCLK_PLLPCM             = 0x05,\n    HAL_CMU_I2S_MCLK_PER                = 0x06,\n    HAL_CMU_I2S_MCLK_CLK_OUT            = 0x07,\n};\n\nenum HAL_I2S_ID_T {\n    HAL_I2S_ID_0 = 0,\n    HAL_I2S_ID_1,\n\n    HAL_I2S_ID_QTY,\n};\n#define HAL_I2S_ID_T                        HAL_I2S_ID_T\n\nenum HAL_CMU_ANC_CLK_USER_T {\n    HAL_CMU_ANC_CLK_USER_ANC,\n\n    HAL_CMU_ANC_CLK_USER_QTY\n};\n\nenum HAL_CMU_LOW_SYS_FREQ_T {\n    HAL_CMU_LOW_SYS_FREQ_NONE,\n    HAL_CMU_LOW_SYS_FREQ_13M,\n    HAL_CMU_LOW_SYS_FREQ_6P5M,\n    HAL_CMU_LOW_SYS_FREQ_4P33M,\n    HAL_CMU_LOW_SYS_FREQ_3P25M,\n};\n\nvoid hal_cmu_low_sys_clock_set(enum HAL_CMU_LOW_SYS_FREQ_T freq);\n\nint hal_cmu_fast_timer_offline(void);\n\nvoid hal_cmu_anc_enable(enum HAL_CMU_ANC_CLK_USER_T user);\n\nvoid hal_cmu_anc_disable(enum HAL_CMU_ANC_CLK_USER_T user);\n\nint hal_cmu_anc_get_status(enum HAL_CMU_ANC_CLK_USER_T user);\n\nvoid hal_cmu_codec_vad_clock_enable(uint32_t enabled);\n\nuint32_t hal_cmu_get_aon_chip_id(void);\n\nuint32_t hal_cmu_get_aon_revision_id(void);\n\nvoid hal_cmu_cp_enable(uint32_t sp, uint32_t entry);\n\nvoid hal_cmu_cp_disable(void);\n\nuint32_t hal_cmu_cp_get_entry_addr(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/best2300p/hal_codec_best2300p.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(reg_codec)\n#include \"analog.h\"\n#include \"cmsis.h\"\n#include \"hal_aud.h\"\n#include \"hal_cmu.h\"\n#include \"hal_codec.h\"\n#include \"hal_psc.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n#include \"hal_chipid.h\"\n\n#define NO_DAC_RESET\n\n#define SDM_MUTE_NOISE_SUPPRESSION\n\n#ifndef CODEC_OUTPUT_DEV\n#define CODEC_OUTPUT_DEV CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV\n#endif\n#if ((CODEC_OUTPUT_DEV & CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV) == 0)\n#ifndef AUDIO_OUTPUT_SWAP\n#define AUDIO_OUTPUT_SWAP\n#endif\n#endif\n\n#if (defined(__TWS__) || defined(IBRT)) && defined(ANC_APP)\n//#define CODEC_TIMER\n#endif\n\n#ifdef CODEC_DSD\n#ifdef ANC_APP\n#error \"ANC_APP conflicts with CODEC_DSD\"\n#endif\n#ifdef AUDIO_ANC_FB_MC\n#error \"AUDIO_ANC_FB_MC conflicts with CODEC_DSD\"\n#endif\n#ifdef __AUDIO_RESAMPLE__\n#error \"__AUDIO_RESAMPLE__ conflicts with CODEC_DSD\"\n#endif\n#endif\n\n#define RS_CLOCK_FACTOR 200\n\n// Trigger DMA request when TX-FIFO *empty* count > threshold\n#define HAL_CODEC_TX_FIFO_TRIGGER_LEVEL (3)\n// Trigger DMA request when RX-FIFO count >= threshold\n#define HAL_CODEC_RX_FIFO_TRIGGER_LEVEL (4)\n\n#define MAX_DIG_DBVAL (50)\n#define ZERODB_DIG_DBVAL (0)\n#define MIN_DIG_DBVAL (-99)\n\n#define MAX_SIDETONE_DBVAL (30)\n#define MIN_SIDETONE_DBVAL (-30)\n#define SIDETONE_DBVAL_STEP (-2)\n\n#define MAX_SIDETONE_REGVAL (0)\n#define MIN_SIDETONE_REGVAL (30)\n#define MUTE_SIDETONE_REGVAL (31)\n\n#ifndef MC_DELAY_COMMON\n#define MC_DELAY_COMMON 28\n#endif\n\n#ifndef CODEC_DIGMIC_PHASE\n#define CODEC_DIGMIC_PHASE 7\n#endif\n\n#define ADC_IIR_CH_NUM 2\n\n#define MAX_DIG_MIC_CH_NUM 5\n\n#define NORMAL_ADC_CH_NUM 5\n// Echo cancel ADC channel number\n#define EC_ADC_CH_NUM 2\n#define MAX_ADC_CH_NUM (NORMAL_ADC_CH_NUM + EC_ADC_CH_NUM)\n\n#define MAX_DAC_CH_NUM 2\n\n#ifdef CODEC_DSD\n#define NORMAL_MIC_MAP                                                         \\\n  (AUD_CHANNEL_MAP_NORMAL_ALL &                                                \\\n   ~(AUD_CHANNEL_MAP_CH5 | AUD_CHANNEL_MAP_CH6 | AUD_CHANNEL_MAP_CH7 |         \\\n     AUD_CHANNEL_MAP_DIGMIC_CH5 | AUD_CHANNEL_MAP_DIGMIC_CH6 |                 \\\n     AUD_CHANNEL_MAP_DIGMIC_CH7 | AUD_CHANNEL_MAP_DIGMIC_CH2 |                 \\\n     AUD_CHANNEL_MAP_DIGMIC_CH3))\n#else\n#define NORMAL_MIC_MAP                                                         \\\n  (AUD_CHANNEL_MAP_NORMAL_ALL &                                                \\\n   ~(AUD_CHANNEL_MAP_CH5 | AUD_CHANNEL_MAP_CH6 | AUD_CHANNEL_MAP_CH7 |         \\\n     AUD_CHANNEL_MAP_DIGMIC_CH5 | AUD_CHANNEL_MAP_DIGMIC_CH6 |                 \\\n     AUD_CHANNEL_MAP_DIGMIC_CH7))\n#endif\n#define NORMAL_ADC_MAP                                                         \\\n  (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1 | AUD_CHANNEL_MAP_CH2 |           \\\n   AUD_CHANNEL_MAP_CH3 | AUD_CHANNEL_MAP_CH4)\n\n#define EC_MIC_MAP (AUD_CHANNEL_MAP_ECMIC_CH0 | AUD_CHANNEL_MAP_ECMIC_CH1)\n#define EC_ADC_MAP (AUD_CHANNEL_MAP_CH5 | AUD_CHANNEL_MAP_CH6)\n\n#define VALID_MIC_MAP (NORMAL_MIC_MAP | EC_MIC_MAP)\n#define VALID_ADC_MAP (NORMAL_ADC_MAP | EC_ADC_MAP)\n\n#define VALID_SPK_MAP (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)\n#define VALID_DAC_MAP VALID_SPK_MAP\n\n#if (CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV & ~VALID_SPK_MAP)\n#error \"Invalid CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV\"\n#endif\n#if (CODEC_OUTPUT_DEV & ~VALID_SPK_MAP)\n#error \"Invalid CODEC_OUTPUT_DEV\"\n#endif\n\n#define RSTN_ADC_FREE_RUNNING_CLK CODEC_SOFT_RSTN_ADC(1 << NORMAL_ADC_CH_NUM)\n\n#if defined(SPEECH_SIDETONE) &&                                                \\\n    (defined(CFG_HW_AUD_SIDETONE_MIC_DEV) && (CFG_HW_AUD_SIDETONE_MIC_DEV)) && \\\n    defined(CFG_HW_AUD_SIDETONE_GAIN_DBVAL)\n#define SIDETONE_ENABLE\n#if (CFG_HW_AUD_SIDETONE_GAIN_DBVAL > MAX_SIDETONE_DBVAL) ||                   \\\n    (CFG_HW_AUD_SIDETONE_GAIN_DBVAL < MIN_SIDETONE_DBVAL) ||                   \\\n    defined(CFG_HW_AUD_SIDETONE_IIR_INDEX) ||                                  \\\n    defined(CFG_HW_AUD_SIDETONE_GAIN_RAMP)\n#define SIDETONE_DEDICATED_ADC_CHAN\n#define SIDETONE_RESERVED_ADC_CHAN\n#endif\n#endif\n\nenum CODEC_ADC_EN_REQ_T {\n  CODEC_ADC_EN_REQ_STREAM,\n  CODEC_ADC_EN_REQ_MC,\n  CODEC_ADC_EN_REQ_DSD,\n\n  CODEC_ADC_EN_REQ_QTY,\n};\n\nenum CODEC_IRQ_TYPE_T {\n  CODEC_IRQ_TYPE_BT_TRIGGER,\n  CODEC_IRQ_TYPE_VAD,\n  CODEC_IRQ_TYPE_ANC_FB_CHECK,\n\n  CODEC_IRQ_TYPE_QTY,\n};\n\nstruct CODEC_DAC_DRE_CFG_T {\n  uint8_t dre_delay;\n  uint8_t thd_db_offset;\n  uint8_t step_mode;\n  uint32_t dre_win;\n  uint16_t amp_high;\n};\n\nstruct CODEC_DAC_SAMPLE_RATE_T {\n  enum AUD_SAMPRATE_T sample_rate;\n  uint32_t codec_freq;\n  uint8_t codec_div;\n  uint8_t cmu_div;\n  uint8_t dac_up;\n  uint8_t bypass_cnt;\n  uint8_t mc_delay;\n};\n\nstatic const struct CODEC_DAC_SAMPLE_RATE_T codec_dac_sample_rate[] = {\n#ifdef __AUDIO_RESAMPLE__\n    {AUD_SAMPRATE_8463, CODEC_FREQ_CRYSTAL, 1, 1, 6, 0, MC_DELAY_COMMON + 160},\n    {AUD_SAMPRATE_16927, CODEC_FREQ_CRYSTAL, 1, 1, 3, 0, MC_DELAY_COMMON + 85},\n    {AUD_SAMPRATE_50781, CODEC_FREQ_CRYSTAL, 1, 1, 1, 0, MC_DELAY_COMMON + 29},\n#endif\n    {AUD_SAMPRATE_7350, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     6, 0, MC_DELAY_COMMON + 174},\n    {AUD_SAMPRATE_8000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 6,\n     0, MC_DELAY_COMMON + 168}, // T\n    {AUD_SAMPRATE_14700, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     3, 0, MC_DELAY_COMMON + 71},\n    {AUD_SAMPRATE_16000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 3,\n     0, MC_DELAY_COMMON + 88}, // T\n    {AUD_SAMPRATE_22050, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     2, 0, MC_DELAY_COMMON + 60},\n    {AUD_SAMPRATE_24000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 2,\n     0, MC_DELAY_COMMON + 58},\n    {AUD_SAMPRATE_44100, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 0, MC_DELAY_COMMON + 31}, // T\n    {AUD_SAMPRATE_48000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 1,\n     0, MC_DELAY_COMMON + 30}, // T\n    {AUD_SAMPRATE_88200, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 1, MC_DELAY_COMMON + 12},\n    {AUD_SAMPRATE_96000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 1,\n     1, MC_DELAY_COMMON + 12}, // T\n    {AUD_SAMPRATE_176400, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 2, MC_DELAY_COMMON + 5},\n    {AUD_SAMPRATE_192000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 2, MC_DELAY_COMMON + 5},\n    {AUD_SAMPRATE_352800, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 3, MC_DELAY_COMMON + 2},\n    {AUD_SAMPRATE_384000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 3, MC_DELAY_COMMON + 2},\n};\n\nstruct CODEC_ADC_SAMPLE_RATE_T {\n  enum AUD_SAMPRATE_T sample_rate;\n  uint32_t codec_freq;\n  uint8_t codec_div;\n  uint8_t cmu_div;\n  uint8_t adc_down;\n  uint8_t bypass_cnt;\n};\n\nstatic const struct CODEC_ADC_SAMPLE_RATE_T codec_adc_sample_rate[] = {\n#ifdef __AUDIO_RESAMPLE__\n    {AUD_SAMPRATE_8463, CODEC_FREQ_CRYSTAL, 1, 1, 6, 0},\n    {AUD_SAMPRATE_16927, CODEC_FREQ_CRYSTAL, 1, 1, 3, 0},\n    {AUD_SAMPRATE_50781, CODEC_FREQ_CRYSTAL, 1, 1, 1, 0},\n#endif\n    {AUD_SAMPRATE_7350, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     6, 0},\n    {AUD_SAMPRATE_8000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 6,\n     0},\n    {AUD_SAMPRATE_14700, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     3, 0},\n    {AUD_SAMPRATE_16000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 3,\n     0},\n    {AUD_SAMPRATE_44100, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 0},\n    {AUD_SAMPRATE_48000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 1,\n     0},\n    {AUD_SAMPRATE_88200, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 1},\n    {AUD_SAMPRATE_96000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV, 1,\n     1},\n    {AUD_SAMPRATE_176400, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 2},\n    {AUD_SAMPRATE_192000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 2},\n    {AUD_SAMPRATE_352800, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 3},\n    {AUD_SAMPRATE_384000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, CODEC_CMU_DIV,\n     1, 3},\n};\n\nconst CODEC_ADC_VOL_T WEAK codec_adc_vol[TGT_ADC_VOL_LEVEL_QTY] = {\n    -99, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28,\n};\n\nstatic struct CODEC_T *const codec = (struct CODEC_T *)CODEC_BASE;\n\n#define CODEC_FIR_CH0_BASE (CODEC_BASE + 0x9000)\n#define CODEC_FIR_CH1_BASE (CODEC_BASE + 0xB000)\n#define CODEC_FIR_CH2_BASE (CODEC_BASE + 0xD000)\n#define CODEC_FIR_CH3_BASE (CODEC_BASE + 0xF000)\n\n#define CODEC_FIR_HISTORY_CH0_BASE (CODEC_FIR_CH0_BASE - 0x1000)\n#define CODEC_FIR_HISTORY_CH1_BASE (CODEC_FIR_CH1_BASE - 0x1000)\n#define CODEC_FIR_HISTORY_CH2_BASE (CODEC_FIR_CH2_BASE - 0x1000)\n#define CODEC_FIR_HISTORY_CH3_BASE (CODEC_FIR_CH3_BASE - 0x1000)\n\n#ifdef CODEC_MIN_PHASE\nstatic volatile int32_t *const codec_fir_ch0 = (int32_t *)CODEC_FIR_CH0_BASE;\nstatic volatile int32_t *const codec_fir_ch1 = (int32_t *)CODEC_FIR_CH1_BASE;\nstatic volatile int32_t *const codec_fir_ch2 = (int32_t *)CODEC_FIR_CH2_BASE;\nstatic volatile int32_t *const codec_fir_ch3 = (int32_t *)CODEC_FIR_CH3_BASE;\nstatic volatile int32_t *const codec_fir_history0 =\n    (int32_t *)CODEC_FIR_HISTORY_CH0_BASE;\nstatic volatile int32_t *const codec_fir_history1 =\n    (int32_t *)CODEC_FIR_HISTORY_CH1_BASE;\nstatic volatile int32_t *const codec_fir_history2 =\n    (int32_t *)CODEC_FIR_HISTORY_CH2_BASE;\nstatic volatile int32_t *const codec_fir_history3 =\n    (int32_t *)CODEC_FIR_HISTORY_CH3_BASE;\n\n#define MAX_FIR_ORDERS (512)\n\n#define FIR_LOW_FREQ\n\n#ifdef FIR_LOW_FREQ\n#define FIR_DAC_ORDERS (220)\n#define FIR_ADC_ORDERS (220)\n#else\n#define FIR_DAC_ORDERS (512)\n#define FIR_ADC_ORDERS (512)\n#endif\n\nSTATIC_ASSERT(FIR_DAC_ORDERS <= MAX_FIR_ORDERS, \"FIR_DAC_ORDERS too large\");\nSTATIC_ASSERT(FIR_ADC_ORDERS <= MAX_FIR_ORDERS, \"FIR_ADC_ORDERS too large\");\n\nconst static int32_t POSSIBLY_UNUSED fir_coef_linear[FIR_DAC_ORDERS] = {\n    524287,\n};\n\nconst static int32_t POSSIBLY_UNUSED fir_coef_minimun[FIR_DAC_ORDERS] = {\n#ifdef FIR_LOW_FREQ\n    171,     1077,    4203,    12582,   31473,   68652,   133899,  237244,\n    385800,  579602,  807418,  1044189, 1251727, 1383990, 1396843, 1260694,\n    972640,  563948,  99101,   -335381, -650923, -780973, -701927, -443652,\n    -84578,  268808,  512951,  579186,  455906,  192655,  -116310, -364122,\n    -468309, -399443, -190845, 74646,   296174,  392908,  334154,  149860,\n    -82526,  -269615, -339392, -269328, -94001,  110604,  259377,  293401,\n    203556,  32780,   -143605, -250723, -245944, -136029, 27365,   171442,\n    234497,  192404,  67901,   -80955,  -187545, -206431, -132784, -3152,\n    122291,  187500,  165597,  69954,   -53253,  -147114, -170196, -114838,\n    -9444,   95806,   152719,  137136,  59154,   -42785,  -120684, -139533,\n    -93024,  -5397,   80987,   126029,  110487,  44131,   -39952,  -101741,\n    -113290, -71331,  2185,    71419,   104055,  86354,   28846,   -39643,\n    -86369,  -90279,  -51459,  9830,    63615,   84824,   64943,   15296,\n    -39213,  -72539,  -69912,  -34308,  15781,   55890,   67480,   46479,\n    4496,    -37461,  -59466,  -52097,  -20389,  19303,   47689,   51882,\n    31200,   -3160,   -34103,  -47104,  -36994,  -9893,   20334,   39133,\n    38235,   19235,   -7752,   -29414,  -35781,  -24769,  -2693,   19264,\n    30682,   26817,   10499,   -9713,   -23968,  -25906,  -15440,  1619,\n    16733,   22882,   17788,   4668,    -9693,   -18412,  -17788,  -8810,\n    3652,    13454,   16181,   11101,   1226,    -8416,   -13305,  -11533,\n    -4481,   4101,    10062,   10834,   6508,    -446,    -6545,   -9016,\n    -7036,   -1934,   3627,    7021,    6880,    3613,    -961,    -4595,\n    -5701,   -4025,   -619,    2769,    4591,    4179,    1965,    -839,\n    -2887,   -3327,   -2140,   -46,     1903,    2850,    2488,    1144,\n    -458,    -1565,   -1740,   -1020,   170,     1245,    1754,    1547,\n    815,     -53,     -656,    -761,    -376,    288,     927,     1290,\n    1257,    878,     307,     -256,    -663,    -840,    -809,    -642,\n    -427,    -237,    -103,    -33,\n#else\n    358,     2134,    7870,    22383,   53324,   110934,  206479,  349044,\n    541000,  773159,  1021370, 1246556, 1399740, 1432299, 1309745, 1025462,\n    609633,  129002,  -324731, -656532, -794417, -712592, -443054, -70120,\n    292346,  535048,  587990,  443750,  160328,  -158614, -400055, -481834,\n    -382027, -146176, 130807,  341515,  407598,  309695,  93804,   -148511,\n    -318068, -348626, -233320, -26063,  182493,  304084,  290262,  152119,\n    -45991,  -215703, -283797, -223953, -67174,  113414,  236243,  248077,\n    147280,  -16729,  -167204, -235765, -193530, -63427,  91650,   198950,\n    209932,  122330,  -19887,  -148250, -202614, -159367, -41765,  92191,\n    178176,  176391,  90055,   -37106,  -142792, -176569, -123965, -12686,\n    101744,  163572,  143971,  54527,   -59287,  -141093, -151499, -87091,\n    18628,   112527,  148481,  110037,  17958,   -80830,  -137074, -123736,\n    -49016,  48438,   119432,  129027,  73750,   -17278,  -97589,  -127045,\n    -91900,  -11220,  73360,   119064,  103602,  36056,   -48313,  -106407,\n    -109292, -56617,  23738,   90354,   109596,  72600,   -665,    -72105,\n    -105274, -83967,  -20135,  52732,   97141,   90877,   38119,   -33174,\n    -86035,  -93649,  -52950,  14213,   72765,   92702,   64465,   3511,\n    -58099,  -88538,  -72655,  -19509,  42731,   81690,   77624,   33421,\n    -27283,  -72714,  -79582,  -45018,  12285,   62151,   78801,   54174,\n    1818,    -50528,  -75615,  -60867,  -14676,  38325,   70381,   65146,\n    26015,   -25988,  -63481,  -67140,  -35653,  13901,   55293,   67020,\n    43473,   -2402,   -46194,  -65008,  -49433,  -8237,   36534,   61346,\n    53542,   17793,   -26648,  -56304,  -55870,  -26107,  16829,   50150,\n    56518,   33065,   -7346,   -43163,  -55631,  -38609,  -1582,   35606,\n    53375,   42719,   9762,    -27735,  -49938,  -45423,  -17053,  19783,\n    45514,   46773,   23343,   -11967,  -40312,  -46863,  -28563,  4471,\n    34530,   45798,   32673,   2539,    -28370,  -43713,  -35673,  -8936,\n    22017,   40746,   37582,   14610,   -15648,  -37053,  -38453,  -19489,\n    9418,    32783,   38351,   23519,   -3470,   -28096,  -37370,  -26681,\n    -2079,   23137,   35604,   28971,   7128,    -18054,  -33170,  -30413,\n    -11603,  12974,   30179,   31045,   15443,   -8023,   -26756,  -30924,\n    -18617,  3302,    23015,   30118,   21105,   1094,    -19077,  -28707,\n    -22913,  -5093,   15046,   26776,   24054,   8635,    -11031,  -24419,\n    -24565,  -11680,  7118,    21726,   24486,   14198,   -3394,   -18792,\n    -23876,  -16181,  -76,     15704,   22793,   17629,   3230,    -12551,\n    -21309,  -18559,  -6028,   9408,    19490,   18994,   8433,    -6352,\n    -17414,  -18974,  -10431,  3440,    15149,   18537,   12008,   -731,\n    -12769,  -17737,  -13172,  -1735,   10336,   16622,   13932,   3920,\n    -7916,   -15252,  -14311,  -5805,   5559,    13680,   14335,   7371,\n    -3319,   -11967,  -14040,  -8615,   1232,    10161,   13463,   9538,\n    664,     -8320,   -12648,  -10154,  -2348,   6485,    11634,   10474,\n    3797,    -4703,   -10470,  -10527,  -5006,   3007,    9196,    10334,\n    5966,    -1433,   -7856,   -9930,   -6686,   1,       6486,    9343,\n    7168,    1266,    -5126,   -8610,   -7432,   -2359,   3803,    7762,\n    7491,    3267,    -2551,   -6835,   -7369,   -3991,   1387,    5858,\n    7087,    4531,    -335,    -4863,   -6673,   -4898,   -597,    3875,\n    6149,    5100,    1395,    -2920,   -5545,   -5154,   -2058,   2015,\n    4882,    5073,    2582,    -1181,   -4187,   -4878,   -2974,   427,\n    3479,    4586,    3237,    234,     -2781,   -4219,   -3383,   -799,\n    2107,    3793,    3420,    1262,    -1476,   -3331,   -3363,   -1628,\n    894,     2845,    3224,    1895,    -375,    -2357,   -3021,   -2074,\n    -79,     1875,    2764,    2167,    459,     -1416,   -2470,   -2186,\n    -771,    987,     2151,    2139,    1009,    -599,    -1823,   -2040,\n    -1182,   254,     1492,    1894,    1290,    40,      -1172,   -1717,\n    -1342,   -286,    869,     1516,    1343,    480,     -592,    -1303,\n    -1303,   -626,    342,     1084,    1226,    725,     -127,    -870,\n    -1124,   -784,    -55,     664,     1001,    803,     200,     -475,\n    -869,    -794,    -313,    303,     729,     756,     392,     -154,\n    -592,    -701,    -443,    28,      458,     630,     468,     74,\n    -337,    -553,    -473,    -155,    226,     471,     462,     215,\n    -130,    -394,    -443,    -263,    45,      319,     420,     302,\n    31,      -253,    -404,    -349,    -115,    181,     394,     418,\n    237,     -74,     -375,    -536,    -472,    -196,    214,     626,\n    935,     1062,    1013,    824,     581,     341,     166,     55,\n#endif\n};\n\nstatic uint8_t min_phase_cfg;\n#endif\n\nstatic bool codec_init = false;\nstatic bool codec_opened = false;\n\nstatic int8_t digdac_gain[MAX_DAC_CH_NUM];\nstatic int8_t digadc_gain[NORMAL_ADC_CH_NUM];\n\nstatic bool codec_mute[AUD_STREAM_NUM];\n\n#ifdef AUDIO_OUTPUT_SWAP\nstatic bool output_swap = true;\n#endif\n\n#ifdef ANC_APP\nstatic float anc_boost_gain_attn;\nstatic int8_t anc_adc_gain_offset[NORMAL_ADC_CH_NUM];\nstatic enum AUD_CHANNEL_MAP_T anc_adc_gain_offset_map;\n#endif\n#if defined(NOISE_GATING) && defined(NOISE_REDUCTION)\nstatic bool codec_nr_enabled;\nstatic int8_t digdac_gain_offset_nr;\n#endif\n#ifdef AUDIO_OUTPUT_DC_CALIB\nstatic int32_t dac_dc_l;\nstatic int32_t dac_dc_r;\nstatic float dac_dc_gain_attn;\n#endif\n#ifdef __AUDIO_RESAMPLE__\nstatic uint8_t rs_clk_map;\nSTATIC_ASSERT(sizeof(rs_clk_map) * 8 >= AUD_STREAM_NUM,\n              \"rs_clk_map size too small\");\n\nstatic uint32_t resample_clk_freq;\nstatic uint8_t resample_rate_idx[AUD_STREAM_NUM];\n#endif\n#ifdef CODEC_TIMER\nstatic uint32_t cur_codec_freq;\n#endif\n// EC\nstatic uint8_t codec_rate_idx[AUD_STREAM_NUM];\n\n// static HAL_CODEC_DAC_RESET_CALLBACK dac_reset_callback;\n\nstatic uint8_t codec_irq_map;\nSTATIC_ASSERT(sizeof(codec_irq_map) * 8 >= CODEC_IRQ_TYPE_QTY,\n              \"codec_irq_map size too small\");\nstatic HAL_CODEC_IRQ_CALLBACK codec_irq_callback[CODEC_IRQ_TYPE_QTY];\n\nstatic enum AUD_CHANNEL_MAP_T codec_dac_ch_map;\nstatic enum AUD_CHANNEL_MAP_T codec_adc_ch_map;\nstatic enum AUD_CHANNEL_MAP_T anc_adc_ch_map;\nstatic enum AUD_CHANNEL_MAP_T codec_mic_ch_map;\nstatic enum AUD_CHANNEL_MAP_T anc_mic_ch_map;\n#ifdef SIDETONE_DEDICATED_ADC_CHAN\nstatic enum AUD_CHANNEL_MAP_T sidetone_adc_ch_map;\nstatic int8_t sidetone_adc_gain;\nstatic int8_t sidetone_gain_offset;\n#ifdef CFG_HW_AUD_SIDETONE_GAIN_RAMP\nstatic float sidetone_ded_chan_coef;\n#endif\n#endif\n\nstatic uint8_t dac_delay_ms;\n\n#ifdef ANC_PROD_TEST\n#define OPT_TYPE\n#else\n#define OPT_TYPE const\n#endif\n\nstatic OPT_TYPE uint8_t codec_digmic_phase = CODEC_DIGMIC_PHASE;\n\n#if defined(AUDIO_ANC_FB_MC) && defined(__AUDIO_RESAMPLE__)\n#error \"Music cancel cannot work with audio resample\"\n#endif\n#ifdef AUDIO_ANC_FB_MC\nstatic bool mc_enabled;\nstatic bool mc_dual_chan;\nstatic bool mc_16bit;\n#endif\n\n#ifdef CODEC_DSD\nstatic bool dsd_enabled;\nstatic uint8_t dsd_rate_idx;\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) || defined(CODEC_DSD)\nstatic uint8_t adc_en_map;\nSTATIC_ASSERT(sizeof(adc_en_map) * 8 >= CODEC_ADC_EN_REQ_QTY,\n              \"adc_en_map size too small\");\n#endif\n\n#ifdef PERF_TEST_POWER_KEY\nstatic enum HAL_CODEC_PERF_TEST_POWER_T cur_perft_power;\n#endif\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\nstatic int8_t swdac_gain;\nstatic HAL_CODEC_SW_OUTPUT_COEF_CALLBACK sw_output_coef_callback;\n#endif\n\nstatic HAL_CODEC_BT_TRIGGER_CALLBACK bt_trigger_callback = NULL;\n\n#ifdef VOICE_DETECTOR_EN\n#define CODEC_VAD_BUF_ADDR 0x40304000\n#define CODEC_VAD_BUF_SIZE 0x4000\nstatic enum AUD_VAD_TYPE_T vad_type;\nstatic AUD_VAD_CALLBACK vad_handler;\nstatic bool vad_enabled;\nstatic uint32_t vad_data_cnt;\nstatic uint32_t vad_addr_cnt;\n#endif\n\n#if defined(DAC_CLASSG_ENABLE)\nstatic struct dac_classg_cfg _dac_classg_cfg = {\n    .thd2 = 0xC0,\n    .thd1 = 0x10,\n    .thd0 = 0x10,\n    .lr = 1,\n    .step_4_3n = 0,\n    .quick_down = 1,\n    .wind_width = 0x400,\n};\n#endif\n\n#ifdef DAC_DRE_ENABLE\nstatic const struct CODEC_DAC_DRE_CFG_T dac_dre_cfg = {\n    .dre_delay = 8,\n    .thd_db_offset = 0xF, // 5,\n    .step_mode = 0,\n    .dre_win = 0x6000,\n    .amp_high = 2, // 0x10,\n};\n#endif\n\nstatic void hal_codec_set_dig_adc_gain(enum AUD_CHANNEL_MAP_T map,\n                                       int32_t gain);\nstatic void hal_codec_set_dig_dac_gain(enum AUD_CHANNEL_MAP_T map,\n                                       int32_t gain);\nstatic void hal_codec_restore_dig_dac_gain(void);\nstatic void hal_codec_set_dac_gain_value(enum AUD_CHANNEL_MAP_T map,\n                                         uint32_t val);\nstatic int hal_codec_set_adc_down(enum AUD_CHANNEL_MAP_T map, uint32_t val);\nstatic int hal_codec_set_adc_hbf_bypass_cnt(enum AUD_CHANNEL_MAP_T map,\n                                            uint32_t cnt);\nstatic uint32_t hal_codec_get_adc_chan(enum AUD_CHANNEL_MAP_T mic_map);\n#ifdef AUDIO_OUTPUT_SW_GAIN\nstatic void hal_codec_set_sw_gain(int32_t gain);\n#endif\n#ifdef __AUDIO_RESAMPLE__\nstatic float get_playback_resample_phase(void);\nstatic float get_capture_resample_phase(void);\nstatic uint32_t resample_phase_float_to_value(float phase);\nstatic float resample_phase_value_to_float(uint32_t value);\n#endif\n\nstatic void hal_codec_reg_update_delay(void) { hal_sys_timer_delay_us(2); }\n\n#if defined(DAC_CLASSG_ENABLE)\nvoid hal_codec_classg_config(const struct dac_classg_cfg *cfg) {\n  _dac_classg_cfg = *cfg;\n}\n\nstatic void hal_codec_classg_enable(bool en) {\n  struct dac_classg_cfg *config;\n\n  if (en) {\n    config = &_dac_classg_cfg;\n\n    codec->REG_0B4 =\n        SET_BITFIELD(codec->REG_0B4, CODEC_CODEC_CLASSG_THD2, config->thd2);\n    codec->REG_0B4 =\n        SET_BITFIELD(codec->REG_0B4, CODEC_CODEC_CLASSG_THD1, config->thd1);\n    codec->REG_0B4 =\n        SET_BITFIELD(codec->REG_0B4, CODEC_CODEC_CLASSG_THD0, config->thd0);\n\n    // Make class-g set the lowest gain after several samples.\n    // Class-g gain will have impact on dc.\n    codec->REG_0B0 = SET_BITFIELD(codec->REG_0B0, CODEC_CODEC_CLASSG_WINDOW, 6);\n\n    if (config->lr)\n      codec->REG_0B0 |= CODEC_CODEC_CLASSG_LR;\n    else\n      codec->REG_0B0 &= ~CODEC_CODEC_CLASSG_LR;\n\n    if (config->step_4_3n)\n      codec->REG_0B0 |= CODEC_CODEC_CLASSG_STEP_3_4N;\n    else\n      codec->REG_0B0 &= ~CODEC_CODEC_CLASSG_STEP_3_4N;\n\n    if (config->quick_down)\n      codec->REG_0B0 |= CODEC_CODEC_CLASSG_QUICK_DOWN;\n    else\n      codec->REG_0B0 &= ~CODEC_CODEC_CLASSG_QUICK_DOWN;\n\n    codec->REG_0B0 |= CODEC_CODEC_CLASSG_EN;\n\n    // Restore class-g window after the gain has been updated\n    hal_codec_reg_update_delay();\n    codec->REG_0B0 = SET_BITFIELD(codec->REG_0B0, CODEC_CODEC_CLASSG_WINDOW,\n                                  config->wind_width);\n  } else {\n    codec->REG_0B0 &= ~CODEC_CODEC_CLASSG_QUICK_DOWN;\n  }\n}\n#endif\n\n#if defined(AUDIO_OUTPUT_DC_CALIB) || defined(SDM_MUTE_NOISE_SUPPRESSION)\nstatic void hal_codec_dac_dc_offset_enable(int32_t dc_l, int32_t dc_r) {\n  codec->REG_0E0 &= CODEC_CODEC_DAC_DC_UPDATE_CH0;\n  hal_codec_reg_update_delay();\n  codec->REG_0E8 = SET_BITFIELD(codec->REG_0E8, CODEC_CODEC_DAC_DC_CH1, dc_r);\n  codec->REG_0E0 = SET_BITFIELD(codec->REG_0E0, CODEC_CODEC_DAC_DC_CH0, dc_l) |\n                   CODEC_CODEC_DAC_DC_UPDATE_CH0;\n}\n#endif\n\n#ifdef CODEC_MIN_PHASE\nstatic void hal_codec_min_phase_init(void) {\n  int i;\n\n  // SYS clock should be 52M or above\n\n  // DAC\n  codec->REG_108 &= ~(CODEC_STREAM0_FIR1_CH0);\n  codec->REG_108 = SET_BITFIELD(codec->REG_108, CODEC_FIR_MODE_CH0, 0);\n  codec->REG_108 =\n      SET_BITFIELD(codec->REG_108, CODEC_FIR_ORDER_CH0, FIR_DAC_ORDERS);\n\n  codec->REG_10C = SET_BITFIELD(codec->REG_10C, CODEC_FIR_BURST_LENGTH_CH0, 4);\n  codec->REG_10C = SET_BITFIELD(codec->REG_10C, CODEC_FIR_GAIN_SEL_CH0, 4);\n\n  codec->REG_110 &= ~(CODEC_STREAM0_FIR1_CH1);\n  codec->REG_110 = SET_BITFIELD(codec->REG_110, CODEC_FIR_MODE_CH1, 0);\n  codec->REG_110 =\n      SET_BITFIELD(codec->REG_110, CODEC_FIR_ORDER_CH1, FIR_DAC_ORDERS);\n\n  codec->REG_114 = SET_BITFIELD(codec->REG_114, CODEC_FIR_BURST_LENGTH_CH1, 4);\n  codec->REG_114 = SET_BITFIELD(codec->REG_114, CODEC_FIR_GAIN_SEL_CH1, 4);\n\n  // ADC\n  codec->REG_118 &= ~(CODEC_STREAM0_FIR1_CH2);\n  codec->REG_118 = SET_BITFIELD(codec->REG_118, CODEC_FIR_MODE_CH2, 0);\n  codec->REG_118 =\n      SET_BITFIELD(codec->REG_118, CODEC_FIR_ORDER_CH2, FIR_ADC_ORDERS);\n\n  // codec->REG_11C = SET_BITFIELD(codec->REG_11C,CODEC_FIR_BURST_LENGTH_CH2,4);\n  codec->REG_11C = SET_BITFIELD(codec->REG_11C, CODEC_FIR_GAIN_SEL_CH2, 6);\n\n  codec->REG_120 &= ~(CODEC_STREAM0_FIR1_CH3);\n  codec->REG_120 = SET_BITFIELD(codec->REG_120, CODEC_FIR_MODE_CH3, 0);\n  codec->REG_120 =\n      SET_BITFIELD(codec->REG_120, CODEC_FIR_ORDER_CH3, FIR_ADC_ORDERS);\n\n  // codec->REG_124 = SET_BITFIELD(codec->REG_124,CODEC_FIR_BURST_LENGTH_CH3,4);\n  codec->REG_124 = SET_BITFIELD(codec->REG_124, CODEC_FIR_GAIN_SEL_CH3, 6);\n\n  // DAC\n  codec->REG_100 |= (CODEC_FIR_UPSAMPLE_CH0 | CODEC_FIR_UPSAMPLE_CH1);\n\n  for (i = 0; i < FIR_DAC_ORDERS; i++) {\n    codec_fir_ch0[i] = fir_coef_minimun[i];\n    codec_fir_ch1[i] = fir_coef_minimun[i];\n  }\n\n  // ADC\n  codec->REG_100 &= ~(CODEC_FIR_UPSAMPLE_CH2 | CODEC_FIR_UPSAMPLE_CH3);\n\n  for (i = 0; i < FIR_DAC_ORDERS; i++) {\n    codec_fir_ch2[i] = fir_coef_minimun[i];\n    codec_fir_ch3[i] = fir_coef_minimun[i];\n  }\n\n  // Init history buffer\n  for (i = 0; i < MAX_FIR_ORDERS; i++) {\n    codec_fir_history0[i] = 0;\n    codec_fir_history1[i] = 0;\n    codec_fir_history2[i] = 0;\n    codec_fir_history3[i] = 0;\n  }\n}\n\nstatic void hal_codec_min_phase_term(void) {\n  // Release SYS clock request\n}\n#endif\n\nint hal_codec_open(enum HAL_CODEC_ID_T id) {\n  int i;\n  bool first_open;\n\n#ifdef CODEC_POWER_DOWN\n  first_open = true;\n#else\n  first_open = !codec_init;\n#endif\n\n  analog_aud_pll_open(ANA_AUD_PLL_USER_CODEC);\n\n  if (!codec_init) {\n    for (i = 0; i < CFG_HW_AUD_INPUT_PATH_NUM; i++) {\n      if (cfg_audio_input_path_cfg[i].cfg & AUD_CHANNEL_MAP_ALL &\n          ~VALID_MIC_MAP) {\n        ASSERT(false, \"Invalid input path cfg: i=%d io_path=%d cfg=0x%X\", i,\n               cfg_audio_input_path_cfg[i].io_path,\n               cfg_audio_input_path_cfg[i].cfg);\n      }\n    }\n#ifdef ANC_APP\n    anc_boost_gain_attn = 1.0f;\n#endif\n    codec_init = true;\n  }\n  if (first_open) {\n    // Codec will be powered down first\n    hal_psc_codec_enable();\n  }\n  hal_cmu_codec_clock_enable();\n  hal_cmu_codec_reset_clear();\n\n  codec_opened = true;\n\n  codec->REG_060 |= CODEC_EN_CLK_ADC_MASK | CODEC_EN_CLK_ADC_ANA_MASK |\n                    CODEC_POL_ADC_ANA_MASK | CODEC_POL_DAC_OUT;\n  codec->REG_064 |= CODEC_SOFT_RSTN_32K | CODEC_SOFT_RSTN_IIR |\n                    CODEC_SOFT_RSTN_RS | CODEC_SOFT_RSTN_DAC |\n                    CODEC_SOFT_RSTN_ADC_MASK | CODEC_SOFT_RSTN_ADC_ANA_MASK;\n  codec->REG_000 = 0;\n  codec->REG_04C &= ~CODEC_MC_ENABLE;\n  codec->REG_004 = ~0UL;\n  hal_codec_reg_update_delay();\n  codec->REG_004 = 0;\n  codec->REG_000 |= CODEC_CODEC_IF_EN;\n\n  codec->REG_054 |= CODEC_FAULT_MUTE_DAC_ENABLE;\n\n#ifdef AUDIO_OUTPUT_SWAP\n  if (output_swap) {\n    codec->REG_0A0 |= CODEC_CODEC_DAC_OUT_SWAP;\n  } else {\n    codec->REG_0A0 &= ~CODEC_CODEC_DAC_OUT_SWAP;\n  }\n#endif\n\n  if (first_open) {\n#ifdef AUDIO_ANC_FB_MC\n    codec->REG_04C = CODEC_DMA_CTRL_MC;\n    codec->REG_230 |= CODEC_MC_EN_SEL | CODEC_MC_RATE_SRC_SEL;\n#endif\n\n    // ANC zero-crossing\n    codec->REG_0D4 |= CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FF_CH0 |\n                      CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FF_CH1;\n    codec->REG_0D8 |= CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FB_CH0 |\n                      CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FB_CH1;\n\n    // Enable ADC zero-crossing gain adjustment\n    for (i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n      *(&codec->REG_084 + i) |= CODEC_CODEC_ADC_GAIN_SEL_CH0;\n    }\n\n    // DRE ini gain and offset\n    uint8_t max_gain, ini_gain, dre_offset;\n    max_gain = analog_aud_get_max_dre_gain();\n    if (max_gain < 0xF) {\n      ini_gain = 0xF - max_gain;\n    } else {\n      ini_gain = 0;\n    }\n    if (max_gain > 0xF) {\n      dre_offset = max_gain - 0xF;\n    } else {\n      dre_offset = 0;\n    }\n    codec->REG_0C0 = CODEC_CODEC_DRE_INI_ANA_GAIN_CH0(ini_gain) |\n                     CODEC_CODEC_DRE_GAIN_OFFSET_CH0(dre_offset);\n    codec->REG_0C8 = CODEC_CODEC_DRE_INI_ANA_GAIN_CH1(ini_gain) |\n                     CODEC_CODEC_DRE_GAIN_OFFSET_CH1(dre_offset);\n    codec->REG_0E0 = CODEC_CODEC_DAC_ANA_GAIN_UPDATE_DELAY_CH0(0);\n    codec->REG_0E8 = CODEC_CODEC_DAC_ANA_GAIN_UPDATE_DELAY_CH1(0);\n\n#ifdef ANC_PROD_TEST\n#ifdef AUDIO_ANC_FB_MC\n    // Enable ADC + music cancel.\n    codec->REG_130 |= CODEC_CODEC_FB_CHECK_KEEP_CH0;\n    codec->REG_134 |= CODEC_CODEC_FB_CHECK_KEEP_CH1;\n#elif defined(AUDIO_ANC_FB_MC_HW)\n    // Enable ADC + music cancel.\n    codec->REG_130 |= CODEC_CODEC_FB_CHECK_KEEP_CH0;\n#endif\n#endif\n\n#if defined(FIXED_CODEC_ADC_VOL) && defined(SINGLE_CODEC_ADC_VOL)\n    const CODEC_ADC_VOL_T *adc_gain_db;\n\n    adc_gain_db = hal_codec_get_adc_volume(CODEC_SADC_VOL);\n    if (adc_gain_db) {\n      hal_codec_set_dig_adc_gain(NORMAL_ADC_MAP, *adc_gain_db);\n#ifdef SIDETONE_DEDICATED_ADC_CHAN\n      sidetone_adc_gain = *adc_gain_db;\n#endif\n    }\n#endif\n\n#ifdef AUDIO_OUTPUT_DC_CALIB\n    hal_codec_dac_dc_offset_enable(dac_dc_l, dac_dc_r);\n#elif defined(SDM_MUTE_NOISE_SUPPRESSION)\n    hal_codec_dac_dc_offset_enable(1, 1);\n#endif\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n    const struct CODEC_DAC_VOL_T *vol_tab_ptr;\n\n    // Init gain settings\n    vol_tab_ptr = hal_codec_get_dac_volume(0);\n    if (vol_tab_ptr) {\n      analog_aud_set_dac_gain(vol_tab_ptr->tx_pa_gain);\n      hal_codec_set_dig_dac_gain(VALID_DAC_MAP, ZERODB_DIG_DBVAL);\n    }\n#else\n    // Enable DAC zero-crossing gain adjustment\n    codec->REG_09C |= CODEC_CODEC_DAC_GAIN_SEL_CH0;\n    codec->REG_0A0 |= CODEC_CODEC_DAC_GAIN_SEL_CH1;\n#endif\n\n#ifdef AUDIO_OUTPUT_DC_CALIB_ANA\n    // Reset SDM\n    hal_codec_set_dac_gain_value(VALID_DAC_MAP, 0);\n    codec->REG_098 |= CODEC_CODEC_DAC_SDM_CLOSE;\n#endif\n\n#ifdef SDM_MUTE_NOISE_SUPPRESSION\n    codec->REG_098 =\n        SET_BITFIELD(codec->REG_098, CODEC_CODEC_DAC_DITHER_GAIN, 0x10);\n#endif\n\n#ifdef __AUDIO_RESAMPLE__\n    codec->REG_0E4 &=\n        ~(CODEC_CODEC_RESAMPLE_DAC_ENABLE | CODEC_CODEC_RESAMPLE_ADC_ENABLE |\n          CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE |\n          CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE);\n#endif\n\n#ifdef CODEC_DSD\n    for (i = 0; i < ARRAY_SIZE(codec_adc_sample_rate); i++) {\n      if (codec_adc_sample_rate[i].sample_rate == AUD_SAMPRATE_44100) {\n        break;\n      }\n    }\n    hal_codec_set_adc_down((AUD_CHANNEL_MAP_CH2 | AUD_CHANNEL_MAP_CH3),\n                           codec_adc_sample_rate[i].adc_down);\n    hal_codec_set_adc_hbf_bypass_cnt(\n        (AUD_CHANNEL_MAP_CH2 | AUD_CHANNEL_MAP_CH3),\n        codec_adc_sample_rate[i].bypass_cnt);\n#endif\n\n    // Mute DAC when cpu fault occurs\n    hal_cmu_codec_set_fault_mask(0x3F);\n\n#ifdef CODEC_TIMER\n    // Disable sync stamp auto clear to avoid impacting codec timer capture\n    codec->REG_054 &= ~CODEC_STAMP_CLR_USED;\n#else\n    // Enable sync stamp auto clear\n    codec->REG_054 |= CODEC_STAMP_CLR_USED;\n#endif\n  }\n\n#ifdef CODEC_MIN_PHASE\n  if (min_phase_cfg) {\n    hal_codec_min_phase_init();\n  }\n#endif\n\n  return 0;\n}\n\nint hal_codec_close(enum HAL_CODEC_ID_T id) {\n#ifdef CODEC_MIN_PHASE\n  if (min_phase_cfg) {\n    hal_codec_min_phase_term();\n  }\n#endif\n\n  codec->REG_054 &= ~CODEC_FAULT_MUTE_DAC_ENABLE;\n\n  codec->REG_000 &= ~CODEC_CODEC_IF_EN;\n  codec->REG_064 &= ~(CODEC_SOFT_RSTN_32K | CODEC_SOFT_RSTN_IIR |\n                      CODEC_SOFT_RSTN_RS | CODEC_SOFT_RSTN_DAC |\n                      CODEC_SOFT_RSTN_ADC_MASK | CODEC_SOFT_RSTN_ADC_ANA_MASK);\n  codec->REG_060 &= ~(CODEC_EN_CLK_ADC_MASK | CODEC_EN_CLK_ADC_ANA_MASK);\n\n  codec_opened = false;\n\n#ifdef CODEC_POWER_DOWN\n  hal_cmu_codec_reset_set();\n  hal_cmu_codec_clock_disable();\n  hal_psc_codec_disable();\n#else\n  // NEVER reset or power down CODEC registers, for the CODEC driver expects\n  // that last configurations still exist in the next stream setup\n  hal_cmu_codec_clock_disable();\n#endif\n\n  analog_aud_pll_close(ANA_AUD_PLL_USER_CODEC);\n\n  return 0;\n}\n\nvoid hal_codec_crash_mute(void) {\n  if (codec_opened) {\n    codec->REG_000 &= ~CODEC_CODEC_IF_EN;\n  }\n}\n\n#ifdef DAC_DRE_ENABLE\nstatic void hal_codec_dac_dre_enable(void) {\n  codec->REG_0C0 =\n      (codec->REG_0C0 & ~(CODEC_CODEC_DRE_THD_DB_OFFSET_SIGN_CH0 |\n                          CODEC_CODEC_DRE_DELAY_CH0_MASK |\n                          CODEC_CODEC_DRE_INI_ANA_GAIN_CH0_MASK |\n                          CODEC_CODEC_DRE_THD_DB_OFFSET_CH0_MASK |\n                          CODEC_CODEC_DRE_STEP_MODE_CH0_MASK)) |\n      CODEC_CODEC_DRE_DELAY_CH0(dac_dre_cfg.dre_delay) |\n      CODEC_CODEC_DRE_INI_ANA_GAIN_CH0(0xF) |\n      CODEC_CODEC_DRE_THD_DB_OFFSET_CH0(dac_dre_cfg.thd_db_offset) |\n      CODEC_CODEC_DRE_THD_DB_OFFSET_CH0(dac_dre_cfg.step_mode) |\n      CODEC_CODEC_DRE_ENABLE_CH0;\n  codec->REG_0C4 = (codec->REG_0C4 & ~(CODEC_CODEC_DRE_WINDOW_CH0_MASK |\n                                       CODEC_CODEC_DRE_AMP_HIGH_CH0_MASK)) |\n                   CODEC_CODEC_DRE_WINDOW_CH0(dac_dre_cfg.dre_win) |\n                   CODEC_CODEC_DRE_AMP_HIGH_CH0(dac_dre_cfg.amp_high);\n\n  codec->REG_0C8 =\n      (codec->REG_0C8 & ~(CODEC_CODEC_DRE_THD_DB_OFFSET_SIGN_CH1 |\n                          CODEC_CODEC_DRE_DELAY_CH1_MASK |\n                          CODEC_CODEC_DRE_INI_ANA_GAIN_CH1_MASK |\n                          CODEC_CODEC_DRE_THD_DB_OFFSET_CH1_MASK |\n                          CODEC_CODEC_DRE_STEP_MODE_CH1_MASK)) |\n      CODEC_CODEC_DRE_DELAY_CH1(dac_dre_cfg.dre_delay) |\n      CODEC_CODEC_DRE_INI_ANA_GAIN_CH1(0xF) |\n      CODEC_CODEC_DRE_THD_DB_OFFSET_CH1(dac_dre_cfg.thd_db_offset) |\n      CODEC_CODEC_DRE_THD_DB_OFFSET_CH1(dac_dre_cfg.step_mode) |\n      CODEC_CODEC_DRE_ENABLE_CH1;\n  codec->REG_0CC = (codec->REG_0CC & ~(CODEC_CODEC_DRE_WINDOW_CH1_MASK |\n                                       CODEC_CODEC_DRE_AMP_HIGH_CH1_MASK)) |\n                   CODEC_CODEC_DRE_WINDOW_CH1(dac_dre_cfg.dre_win) |\n                   CODEC_CODEC_DRE_AMP_HIGH_CH1(dac_dre_cfg.amp_high);\n}\n\nstatic void hal_codec_dac_dre_disable(void) {\n  codec->REG_0C0 &= ~CODEC_CODEC_DRE_ENABLE_CH0;\n  codec->REG_0C8 &= ~CODEC_CODEC_DRE_ENABLE_CH1;\n}\n#endif\n\n#ifdef PERF_TEST_POWER_KEY\nstatic void hal_codec_update_perf_test_power(void) {\n  int32_t nominal_vol;\n  uint32_t ini_ana_gain;\n  int32_t dac_vol;\n\n  if (!codec_opened) {\n    return;\n  }\n\n  dac_vol = 0;\n  if (cur_perft_power == HAL_CODEC_PERF_TEST_30MW) {\n    nominal_vol = 0;\n    ini_ana_gain = 0;\n  } else if (cur_perft_power == HAL_CODEC_PERF_TEST_10MW) {\n    nominal_vol = -5;\n    ini_ana_gain = 6;\n  } else if (cur_perft_power == HAL_CODEC_PERF_TEST_5MW) {\n    nominal_vol = -8;\n    ini_ana_gain = 0xA;\n  } else if (cur_perft_power == HAL_CODEC_PERF_TEST_M60DB) {\n    nominal_vol = -60;\n    ini_ana_gain = 0xF; // about -11 dB\n    dac_vol = -49;\n  } else {\n    return;\n  }\n\n  if (codec->REG_0C0 & CODEC_CODEC_DRE_ENABLE_CH0) {\n    dac_vol = nominal_vol;\n  } else {\n    codec->REG_0C0 = SET_BITFIELD(\n        codec->REG_0C0, CODEC_CODEC_DRE_INI_ANA_GAIN_CH0, ini_ana_gain);\n    codec->REG_0C8 = SET_BITFIELD(\n        codec->REG_0C8, CODEC_CODEC_DRE_INI_ANA_GAIN_CH1, ini_ana_gain);\n  }\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n  hal_codec_set_sw_gain(dac_vol);\n#else\n  hal_codec_set_dig_dac_gain(VALID_DAC_MAP, dac_vol);\n#endif\n\n#if defined(NOISE_GATING) && defined(NOISE_REDUCTION)\n  if (codec_nr_enabled) {\n    codec_nr_enabled = false;\n    hal_codec_set_noise_reduction(true);\n  }\n#endif\n}\n\nvoid hal_codec_dac_gain_m60db_check(enum HAL_CODEC_PERF_TEST_POWER_T type) {\n  cur_perft_power = type;\n\n  if (!codec_opened || (codec->REG_098 & CODEC_CODEC_DAC_EN) == 0) {\n    return;\n  }\n\n  hal_codec_update_perf_test_power();\n}\n#endif\n\n#if defined(NOISE_GATING) && defined(NOISE_REDUCTION)\nvoid hal_codec_set_noise_reduction(bool enable) {\n  uint32_t ini_ana_gain;\n\n  if (codec_nr_enabled == enable) {\n    // Avoid corrupting digdac_gain_offset_nr or using an invalid one\n    return;\n  }\n\n  codec_nr_enabled = enable;\n\n  if (!codec_opened) {\n    return;\n  }\n\n  // ini_ana_gain=0   -->   0dB\n  // ini_ana_gain=0xF --> -11dB\n  if (enable) {\n    ini_ana_gain =\n        GET_BITFIELD(codec->REG_0C0, CODEC_CODEC_DRE_INI_ANA_GAIN_CH0);\n    digdac_gain_offset_nr = ((0xF - ini_ana_gain) * 11 + 0xF / 2) / 0xF;\n    ini_ana_gain = 0xF;\n  } else {\n    ini_ana_gain = 0xF - (digdac_gain_offset_nr * 0xF + 11 / 2) / 11;\n    digdac_gain_offset_nr = 0;\n  }\n\n  codec->REG_0C0 = SET_BITFIELD(codec->REG_0C0,\n                                CODEC_CODEC_DRE_INI_ANA_GAIN_CH0, ini_ana_gain);\n  codec->REG_0C8 = SET_BITFIELD(codec->REG_0C8,\n                                CODEC_CODEC_DRE_INI_ANA_GAIN_CH1, ini_ana_gain);\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n  hal_codec_set_sw_gain(swdac_gain);\n#else\n  hal_codec_restore_dig_dac_gain();\n#endif\n}\n#endif\n\nvoid hal_codec_stop_playback_stream(enum HAL_CODEC_ID_T id) {\n#if (defined(AUDIO_OUTPUT_DC_CALIB_ANA) || defined(AUDIO_OUTPUT_DC_CALIB)) &&  \\\n    (!(defined(__TWS__) || defined(IBRT)) || defined(ANC_APP))\n  // Disable PA\n  analog_aud_codec_speaker_enable(false);\n#endif\n\n  codec->REG_098 &=\n      ~(CODEC_CODEC_DAC_EN | CODEC_CODEC_DAC_EN_CH0 | CODEC_CODEC_DAC_EN_CH1);\n\n#ifdef CODEC_TIMER\n  // Reset codec timer\n  codec->REG_054 &= ~CODEC_EVENT_FOR_CAPTURE;\n#endif\n\n#ifdef DAC_DRE_ENABLE\n  hal_codec_dac_dre_disable();\n#endif\n\n#if defined(DAC_CLASSG_ENABLE)\n  hal_codec_classg_enable(false);\n#endif\n\n#ifndef NO_DAC_RESET\n  // Reset DAC\n  // Avoid DAC outputing noise after it is disabled\n  codec->REG_064 &= ~CODEC_SOFT_RSTN_DAC;\n  codec->REG_064 |= CODEC_SOFT_RSTN_DAC;\n#endif\n  codec->REG_060 &= ~CODEC_EN_CLK_DAC;\n}\n\nvoid hal_codec_start_playback_stream(enum HAL_CODEC_ID_T id) {\n  codec->REG_060 |= CODEC_EN_CLK_DAC;\n#ifndef NO_DAC_RESET\n  // Reset DAC\n  codec->REG_064 &= ~CODEC_SOFT_RSTN_DAC;\n  codec->REG_064 |= CODEC_SOFT_RSTN_DAC;\n#endif\n\n#ifdef DAC_DRE_ENABLE\n  if (\n  //(codec->REG_044 & CODEC_MODE_16BIT_DAC) == 0 &&\n#ifdef ANC_APP\n      anc_adc_ch_map == 0 &&\n#endif\n      1) {\n    hal_codec_dac_dre_enable();\n  }\n#endif\n\n#ifdef PERF_TEST_POWER_KEY\n  hal_codec_update_perf_test_power();\n#endif\n\n#if defined(DAC_CLASSG_ENABLE)\n  hal_codec_classg_enable(true);\n#endif\n\n#ifdef CODEC_TIMER\n  // Enable codec timer and record time by bt event instead of gpio event\n  codec->REG_054 =\n      (codec->REG_054 & ~CODEC_EVENT_SEL) | CODEC_EVENT_FOR_CAPTURE;\n#endif\n\n  if (codec_dac_ch_map & AUD_CHANNEL_MAP_CH0) {\n    codec->REG_098 |= CODEC_CODEC_DAC_EN_CH0;\n  } else {\n    codec->REG_098 &= ~CODEC_CODEC_DAC_EN_CH0;\n  }\n  if (codec_dac_ch_map & AUD_CHANNEL_MAP_CH1) {\n    codec->REG_098 |= CODEC_CODEC_DAC_EN_CH1;\n  } else {\n    codec->REG_098 &= ~CODEC_CODEC_DAC_EN_CH1;\n  }\n\n#if (defined(AUDIO_OUTPUT_DC_CALIB_ANA) || defined(AUDIO_OUTPUT_DC_CALIB)) &&  \\\n    (!(defined(__TWS__) || defined(IBRT)) || defined(ANC_APP))\n#if 0\n    uint32_t cfg_en;\n    uint32_t anc_ff_gain, anc_fb_gain;\n\n    cfg_en = codec->REG_000 & CODEC_DAC_ENABLE;\n    anc_ff_gain = codec->REG_0D4;\n    anc_fb_gain = codec->REG_0D8;\n\n    if (cfg_en) {\n        codec->REG_000 &= ~cfg_en;\n    }\n    if (anc_ff_gain) {\n        codec->REG_0D4 = CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FF_CH0 | CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FF_CH1;\n        anc_ff_gain |= CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FF_CH0 | CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FF_CH1;\n    }\n    if (anc_fb_gain) {\n        codec->REG_0D8 = CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FB_CH0 | CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FB_CH1;\n        anc_fb_gain = CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FB_CH0 | CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FB_CH1;\n    }\n    osDelay(1);\n#endif\n#endif\n\n  codec->REG_098 |= CODEC_CODEC_DAC_EN;\n\n#if (defined(AUDIO_OUTPUT_DC_CALIB_ANA) || defined(AUDIO_OUTPUT_DC_CALIB)) &&  \\\n    (!(defined(__TWS__) || defined(IBRT)) || defined(ANC_APP))\n#ifdef AUDIO_OUTPUT_DC_CALIB\n  // At least delay 4ms for 8K-sample-rate mute data to arrive at DAC PA\n  osDelay(5);\n#endif\n\n#if 0\n    if (cfg_en) {\n        codec->REG_000 |= cfg_en;\n    }\n    if (anc_ff_gain) {\n        codec->REG_0D4 = anc_ff_gain;\n    }\n    if (anc_fb_gain) {\n        codec->REG_0D8 = anc_fb_gain;\n    }\n#endif\n\n  // Enable PA\n  analog_aud_codec_speaker_enable(true);\n\n#ifdef AUDIO_ANC_FB_MC\n  if (mc_enabled) {\n    uint32_t lock;\n    lock = int_lock();\n    // MC FIFO and DAC FIFO must be started at the same time\n    codec->REG_04C |= CODEC_MC_ENABLE;\n    codec->REG_000 |= CODEC_DAC_ENABLE;\n    int_unlock(lock);\n  }\n#endif\n#endif\n}\n\n#ifdef AF_ADC_I2S_SYNC\nstatic bool _hal_codec_capture_enable_delay = false;\n\nvoid hal_codec_capture_enable_delay(void) {\n  _hal_codec_capture_enable_delay = true;\n}\n\nvoid hal_codec_capture_enable(void) { codec->REG_080 |= CODEC_CODEC_ADC_EN; }\n#endif\n\nint hal_codec_start_stream(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream) {\n  if (stream == AUD_STREAM_PLAYBACK) {\n    // Reset and start DAC\n    hal_codec_start_playback_stream(id);\n  } else {\n#if defined(AUDIO_ANC_FB_MC) || defined(CODEC_DSD)\n    adc_en_map |= (1 << CODEC_ADC_EN_REQ_STREAM);\n    if (adc_en_map == (1 << CODEC_ADC_EN_REQ_STREAM))\n#endif\n    {\n      // Reset ADC ANA\n      codec->REG_064 &= ~CODEC_SOFT_RSTN_ADC_ANA_MASK;\n      codec->REG_064 |= CODEC_SOFT_RSTN_ADC_ANA_MASK;\n\n#ifdef AF_ADC_I2S_SYNC\n      if (_hal_codec_capture_enable_delay) {\n        _hal_codec_capture_enable_delay = false;\n      } else {\n        hal_codec_capture_enable();\n      }\n#else\n      codec->REG_080 |= CODEC_CODEC_ADC_EN;\n#endif\n    }\n  }\n\n  return 0;\n}\n\nint hal_codec_stop_stream(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream) {\n  if (stream == AUD_STREAM_PLAYBACK) {\n    // Stop and reset DAC\n    hal_codec_stop_playback_stream(id);\n  } else {\n#if defined(AUDIO_ANC_FB_MC) || defined(CODEC_DSD)\n    adc_en_map &= ~(1 << CODEC_ADC_EN_REQ_STREAM);\n    if (adc_en_map == 0)\n#endif\n    {\n      codec->REG_080 &= ~CODEC_CODEC_ADC_EN;\n#ifdef AF_ADC_I2S_SYNC\n      _hal_codec_capture_enable_delay = false;\n#endif\n    }\n  }\n\n  return 0;\n}\n\n#ifdef CODEC_DSD\nvoid hal_codec_dsd_enable(void) { dsd_enabled = true; }\n\nvoid hal_codec_dsd_disable(void) { dsd_enabled = false; }\n\nstatic void hal_codec_dsd_cfg_start(void) {\n#if !(defined(FIXED_CODEC_ADC_VOL) && defined(SINGLE_CODEC_ADC_VOL))\n  uint32_t vol;\n  const CODEC_ADC_VOL_T *adc_gain_db;\n\n  vol = hal_codec_get_mic_chan_volume_level(AUD_CHANNEL_MAP_DIGMIC_CH2);\n  adc_gain_db = hal_codec_get_adc_volume(vol);\n  if (adc_gain_db) {\n    hal_codec_set_dig_adc_gain((AUD_CHANNEL_MAP_CH2 | AUD_CHANNEL_MAP_CH3),\n                               *adc_gain_db);\n  }\n#endif\n\n  codec->REG_004 |= CODEC_DSD_RX_FIFO_FLUSH | CODEC_DSD_TX_FIFO_FLUSH;\n  hal_codec_reg_update_delay();\n  codec->REG_004 &= ~(CODEC_DSD_RX_FIFO_FLUSH | CODEC_DSD_TX_FIFO_FLUSH);\n\n  codec->REG_0B8 = CODEC_CODEC_DSD_ENABLE_L | CODEC_CODEC_DSD_ENABLE_R |\n                   CODEC_CODEC_DSD_SAMPLE_RATE(dsd_rate_idx);\n  codec->REG_048 = CODEC_DSD_IF_EN | CODEC_DSD_ENABLE | CODEC_DSD_DUAL_CHANNEL |\n                   CODEC_MODE_24BIT_DSD |\n                   /* CODEC_DMA_CTRL_RX_DSD | */ CODEC_DMA_CTRL_TX_DSD |\n                   CODEC_DSD_IN_16BIT;\n\n  codec->REG_080 = (codec->REG_080 & ~(CODEC_CODEC_LOOP_SEL_L_MASK |\n                                       CODEC_CODEC_LOOP_SEL_R_MASK)) |\n                   CODEC_CODEC_ADC_LOOP | CODEC_CODEC_LOOP_SEL_L(2) |\n                   CODEC_CODEC_LOOP_SEL_R(3);\n\n  codec->REG_0A8 = SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH2, 2);\n  codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH2;\n  codec->REG_0A8 = SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH3, 3);\n  codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH3;\n\n  codec->REG_064 &=\n      ~(CODEC_SOFT_RSTN_ADC(1 << 2) | CODEC_SOFT_RSTN_ADC(1 << 3));\n  codec->REG_064 |= CODEC_SOFT_RSTN_ADC(1 << 2) | CODEC_SOFT_RSTN_ADC(1 << 3);\n  codec->REG_080 |= CODEC_CODEC_ADC_EN_CH2 | CODEC_CODEC_ADC_EN_CH3;\n\n  if (adc_en_map == 0) {\n    // Reset ADC free running clock and ADC ANA\n    codec->REG_064 &=\n        ~(RSTN_ADC_FREE_RUNNING_CLK | CODEC_SOFT_RSTN_ADC_ANA_MASK);\n    codec->REG_064 |=\n        (RSTN_ADC_FREE_RUNNING_CLK | CODEC_SOFT_RSTN_ADC_ANA_MASK);\n    codec->REG_080 |= CODEC_CODEC_ADC_EN;\n  }\n  adc_en_map |= (1 << CODEC_ADC_EN_REQ_DSD);\n}\n\nstatic void hal_codec_dsd_cfg_stop(void) {\n  adc_en_map &= ~(1 << CODEC_ADC_EN_REQ_DSD);\n  if (adc_en_map == 0) {\n    codec->REG_080 &= ~CODEC_CODEC_ADC_EN;\n  }\n\n  codec->REG_080 &= ~(CODEC_CODEC_ADC_EN_CH2 | CODEC_CODEC_ADC_EN_CH3);\n  codec->REG_0A4 &=\n      ~(CODEC_CODEC_PDM_ADC_SEL_CH2 | CODEC_CODEC_PDM_ADC_SEL_CH3);\n  codec->REG_048 = 0;\n  codec->REG_0B8 = 0;\n\n  codec->REG_080 &= ~CODEC_CODEC_ADC_LOOP;\n}\n#endif\n\n#ifdef __AUDIO_RESAMPLE__\nvoid hal_codec_resample_clock_enable(enum AUD_STREAM_T stream) {\n  uint32_t clk;\n  bool set = false;\n\n  // 192K-24BIT requires 52M clock, and 384K-24BIT requires 104M clock\n  if (stream == AUD_STREAM_PLAYBACK) {\n    clk = codec_dac_sample_rate[resample_rate_idx[AUD_STREAM_PLAYBACK]]\n              .sample_rate *\n          RS_CLOCK_FACTOR;\n  } else {\n    clk = codec_adc_sample_rate[resample_rate_idx[AUD_STREAM_CAPTURE]]\n              .sample_rate *\n          RS_CLOCK_FACTOR;\n  }\n\n  if (rs_clk_map == 0) {\n    set = true;\n  } else {\n    if (resample_clk_freq < clk) {\n      set = true;\n    }\n  }\n\n  if (set) {\n    resample_clk_freq = clk;\n    hal_cmu_codec_rs_enable(clk);\n  }\n\n  rs_clk_map |= (1 << stream);\n}\n\nvoid hal_codec_resample_clock_disable(enum AUD_STREAM_T stream) {\n  if (rs_clk_map == 0) {\n    return;\n  }\n  rs_clk_map &= ~(1 << stream);\n  if (rs_clk_map == 0) {\n    hal_cmu_codec_rs_disable();\n  }\n}\n#endif\n\nstatic void hal_codec_enable_dig_mic(enum AUD_CHANNEL_MAP_T mic_map) {\n  uint32_t phase = 0;\n  uint32_t line_map = 0;\n\n  phase = codec->REG_0A8;\n  for (int i = 0; i < MAX_DIG_MIC_CH_NUM; i++) {\n    if (mic_map & (AUD_CHANNEL_MAP_DIGMIC_CH0 << i)) {\n      line_map |= (1 << (i / 2));\n    }\n    phase = (phase & ~(CODEC_CODEC_PDM_CAP_PHASE_CH0_MASK << (i * 2))) |\n            (CODEC_CODEC_PDM_CAP_PHASE_CH0(codec_digmic_phase) << (i * 2));\n  }\n  codec->REG_0A8 = phase;\n  codec->REG_0A4 |= CODEC_CODEC_PDM_ENABLE;\n  hal_iomux_set_dig_mic(line_map);\n}\n\nstatic void hal_codec_disable_dig_mic(void) {\n  codec->REG_0A4 &= ~CODEC_CODEC_PDM_ENABLE;\n}\n\nstatic void hal_codec_set_ec_down_sel(bool dac_rate_valid) {\n  uint8_t dac_factor;\n  uint8_t adc_factor;\n  uint8_t d, a;\n  uint8_t val;\n  uint8_t sel = 0;\n  bool err = false;\n\n  if (dac_rate_valid) {\n    d = codec_rate_idx[AUD_STREAM_PLAYBACK];\n    if (codec_dac_sample_rate[d].sample_rate < AUD_SAMPRATE_44100) {\n      dac_factor = (6 / codec_dac_sample_rate[d].dac_up) *\n                   (codec_dac_sample_rate[d].bypass_cnt + 1);\n    } else {\n      // SINC to 48K/44.1K\n      dac_factor = (6 / 1) * (0 + 1);\n    }\n    a = codec_rate_idx[AUD_STREAM_CAPTURE];\n    adc_factor = (6 / codec_adc_sample_rate[a].adc_down) *\n                 (codec_adc_sample_rate[a].bypass_cnt + 1);\n\n    val = dac_factor / adc_factor;\n    if (val * adc_factor == dac_factor) {\n      if (val == 3) {\n        sel = 0;\n      } else if (val == 6) {\n        sel = 1;\n      } else if (val == 1) {\n        sel = 2;\n      } else if (val == 2) {\n        sel = 3;\n      } else {\n        err = true;\n      }\n    } else {\n      err = true;\n    }\n\n    ASSERT(!err, \"%s: Invalid EC sample rate: play=%u cap=%u\", __FUNCTION__,\n           codec_dac_sample_rate[d].sample_rate,\n           codec_adc_sample_rate[a].sample_rate);\n  } else {\n    sel = 0;\n  }\n\n  uint32_t ec_mask, ec_val;\n\n  ec_mask = 0;\n  ec_val = 0;\n  if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH5) {\n    ec_mask |= CODEC_CODEC_DOWN_SEL_MC_CH0_MASK;\n    ec_val |= CODEC_CODEC_DOWN_SEL_MC_CH0(sel);\n  }\n  if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH6) {\n    ec_mask |= CODEC_CODEC_DOWN_SEL_MC_CH1_MASK;\n    ec_val |= CODEC_CODEC_DOWN_SEL_MC_CH1(sel);\n  }\n  codec->REG_228 = (codec->REG_228 & ~ec_mask) | ec_val;\n}\n\nstatic void hal_codec_ec_enable(void) {\n  uint32_t ec_val;\n  bool dac_rate_valid;\n  uint8_t a;\n\n  dac_rate_valid = !!(codec->REG_000 & CODEC_DAC_ENABLE);\n\n  hal_codec_set_ec_down_sel(dac_rate_valid);\n\n  // If no normal ADC chan, ADC0 must be enabled\n  if ((codec_adc_ch_map & ~EC_ADC_MAP) == 0) {\n    a = codec_rate_idx[AUD_STREAM_CAPTURE];\n    hal_codec_set_adc_down(AUD_CHANNEL_MAP_CH0,\n                           codec_adc_sample_rate[a].adc_down);\n    hal_codec_set_adc_hbf_bypass_cnt(AUD_CHANNEL_MAP_CH0,\n                                     codec_adc_sample_rate[a].bypass_cnt);\n    codec->REG_080 |= CODEC_CODEC_ADC_EN_CH0;\n  }\n\n  ec_val = 0;\n  if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH5) {\n    ec_val |= CODEC_CODEC_MC_ENABLE_CH0;\n  }\n  if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH6) {\n    ec_val |= CODEC_CODEC_MC_ENABLE_CH1;\n  }\n  if (codec->REG_0E4 & CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE) {\n    ec_val |= CODEC_CODEC_RESAMPLE_MC_ENABLE;\n    if ((codec_adc_ch_map & EC_ADC_MAP) == EC_ADC_MAP) {\n      ec_val |= CODEC_CODEC_RESAMPLE_MC_DUAL_CH;\n    }\n  }\n  codec->REG_228 |= ec_val;\n}\n\nstatic void hal_codec_ec_disable(void) {\n  codec->REG_228 &=\n      ~(CODEC_CODEC_MC_ENABLE_CH0 | CODEC_CODEC_MC_ENABLE_CH1 |\n        CODEC_CODEC_RESAMPLE_MC_ENABLE | CODEC_CODEC_RESAMPLE_MC_DUAL_CH);\n  if ((codec_adc_ch_map & ~EC_ADC_MAP) == 0 &&\n      (anc_adc_ch_map & AUD_CHANNEL_MAP_CH0) == 0) {\n    codec->REG_080 &= ~CODEC_CODEC_ADC_EN_CH0;\n  }\n}\n\nint hal_codec_start_interface(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream,\n                              int dma) {\n  uint32_t fifo_flush = 0;\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n#ifdef CODEC_DSD\n    if (dsd_enabled) {\n      hal_codec_dsd_cfg_start();\n    }\n#endif\n#ifdef CODEC_MIN_PHASE\n    if (min_phase_cfg & (1 << AUD_STREAM_PLAYBACK)) {\n      if (codec_dac_ch_map & AUD_CHANNEL_MAP_CH0) {\n        codec->REG_100 |= CODEC_FIR_STREAM_ENABLE_CH0;\n        codec->REG_098 |= CODEC_CODEC_DAC_L_FIR_UPSAMPLE;\n      }\n      if (codec_dac_ch_map & AUD_CHANNEL_MAP_CH1) {\n        codec->REG_100 |= CODEC_FIR_STREAM_ENABLE_CH1;\n        codec->REG_098 |= CODEC_CODEC_DAC_R_FIR_UPSAMPLE;\n      }\n    }\n#endif\n#ifdef __AUDIO_RESAMPLE__\n    if (codec->REG_0E4 & CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE) {\n      hal_codec_resample_clock_enable(stream);\n#if (defined(__TWS__) || defined(IBRT)) && defined(ANC_APP)\n      enum HAL_CODEC_SYNC_TYPE_T sync_type;\n\n      sync_type =\n          GET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_DAC_TRIGGER_SEL);\n      if (sync_type != HAL_CODEC_SYNC_TYPE_NONE) {\n        codec->REG_0E4 =\n            SET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_DAC_TRIGGER_SEL,\n                         HAL_CODEC_SYNC_TYPE_NONE);\n        codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n        hal_codec_reg_update_delay();\n        codec->REG_0F4 = resample_phase_float_to_value(1.0f);\n        hal_codec_reg_update_delay();\n        codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n        hal_codec_reg_update_delay();\n        codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n        codec->REG_0E4 = SET_BITFIELD(\n            codec->REG_0E4, CODEC_CODEC_RESAMPLE_DAC_TRIGGER_SEL, sync_type);\n        hal_codec_reg_update_delay();\n        codec->REG_0F4 =\n            resample_phase_float_to_value(get_playback_resample_phase());\n        codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n      }\n#endif\n      codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_DAC_ENABLE;\n    }\n#endif\n    if ((codec->REG_000 & CODEC_ADC_ENABLE) &&\n        (codec_adc_ch_map & EC_ADC_MAP)) {\n      hal_codec_set_ec_down_sel(true);\n    }\n#ifdef AUDIO_ANC_FB_MC\n    fifo_flush |= CODEC_MC_FIFO_FLUSH;\n#endif\n    fifo_flush |= CODEC_TX_FIFO_FLUSH;\n    codec->REG_004 |= fifo_flush;\n    hal_codec_reg_update_delay();\n    codec->REG_004 &= ~fifo_flush;\n    if (dma) {\n      codec->REG_008 = SET_BITFIELD(codec->REG_008, CODEC_CODEC_TX_THRESHOLD,\n                                    HAL_CODEC_TX_FIFO_TRIGGER_LEVEL);\n      codec->REG_000 |= CODEC_DMACTRL_TX;\n      // Delay a little time for DMA to fill the TX FIFO before sending\n      for (volatile int i = 0; i < 50; i++)\n        ;\n    }\n#ifdef AUDIO_ANC_FB_MC\n    if (mc_dual_chan) {\n      codec->REG_04C |= CODEC_DUAL_CHANNEL_MC;\n    } else {\n      codec->REG_04C &= ~CODEC_DUAL_CHANNEL_MC;\n    }\n    if (mc_16bit) {\n      codec->REG_04C |= CODEC_MODE_16BIT_MC;\n    } else {\n      codec->REG_04C &= ~CODEC_MODE_16BIT_MC;\n    }\n    if (adc_en_map == 0) {\n      // Reset ADC free running clock and ADC ANA\n      codec->REG_064 &=\n          ~(RSTN_ADC_FREE_RUNNING_CLK | CODEC_SOFT_RSTN_ADC_ANA_MASK);\n      codec->REG_064 |=\n          (RSTN_ADC_FREE_RUNNING_CLK | CODEC_SOFT_RSTN_ADC_ANA_MASK);\n      codec->REG_080 |= CODEC_CODEC_ADC_EN;\n    }\n    adc_en_map |= (1 << CODEC_ADC_EN_REQ_MC);\n    // If codec function has been enabled, start FIFOs directly;\n    // otherwise, start FIFOs after PA is enabled\n    if (codec->REG_098 & CODEC_CODEC_DAC_EN) {\n      uint32_t lock;\n      lock = int_lock();\n      // MC FIFO and DAC FIFO must be started at the same time\n      codec->REG_04C |= CODEC_MC_ENABLE;\n      codec->REG_000 |= CODEC_DAC_ENABLE;\n      int_unlock(lock);\n    }\n    mc_enabled = true;\n#else\n    codec->REG_000 |= CODEC_DAC_ENABLE;\n#endif\n  } else {\n#ifdef VOICE_DETECTOR_EN\n    if ((codec_adc_ch_map & AUD_CHANNEL_MAP_CH4) &&\n        (vad_type == AUD_VAD_TYPE_MIX || vad_type == AUD_VAD_TYPE_DIG)) {\n      // Stop vad buffering\n      hal_codec_vad_stop();\n    }\n#endif\n#ifdef CODEC_MIN_PHASE\n    if (min_phase_cfg & (1 << AUD_STREAM_CAPTURE)) {\n      if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH2) {\n        codec->REG_100 |= CODEC_FIR_STREAM_ENABLE_CH2;\n        codec->REG_0D0 |= CODEC_CODEC_ADC_FIR_DS_EN_CH2;\n      }\n      if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH3) {\n        codec->REG_100 |= CODEC_FIR_STREAM_ENABLE_CH3;\n        codec->REG_0D0 |= CODEC_CODEC_ADC_FIR_DS_EN_CH3;\n      }\n    }\n#endif\n#ifdef __AUDIO_RESAMPLE__\n    if (codec->REG_0E4 & CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE) {\n      hal_codec_resample_clock_enable(stream);\n#if (defined(__TWS__) || defined(IBRT)) && defined(ANC_APP)\n      enum HAL_CODEC_SYNC_TYPE_T sync_type;\n\n      sync_type =\n          GET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_ADC_TRIGGER_SEL);\n      if (sync_type != HAL_CODEC_SYNC_TYPE_NONE) {\n        codec->REG_0E4 =\n            SET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_ADC_TRIGGER_SEL,\n                         HAL_CODEC_SYNC_TYPE_NONE);\n        codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n        hal_codec_reg_update_delay();\n        codec->REG_0F8 = resample_phase_float_to_value(1.0f);\n        hal_codec_reg_update_delay();\n        codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n        hal_codec_reg_update_delay();\n        codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n        codec->REG_0E4 = SET_BITFIELD(\n            codec->REG_0E4, CODEC_CODEC_RESAMPLE_ADC_TRIGGER_SEL, sync_type);\n        hal_codec_reg_update_delay();\n        codec->REG_0F8 =\n            resample_phase_float_to_value(get_capture_resample_phase());\n        codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n      }\n#endif\n      codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_ADC_ENABLE;\n    }\n#endif\n    if (codec_mic_ch_map & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n      hal_codec_enable_dig_mic(codec_mic_ch_map);\n    }\n    if (codec_adc_ch_map & EC_ADC_MAP) {\n      hal_codec_ec_enable();\n    }\n    for (int i = 0; i < MAX_ADC_CH_NUM; i++) {\n      if (codec_adc_ch_map & (AUD_CHANNEL_MAP_CH0 << i)) {\n        if (i < NORMAL_ADC_CH_NUM &&\n            (codec->REG_080 & (CODEC_CODEC_ADC_EN_CH0 << i)) == 0) {\n          // Reset ADC channel\n          codec->REG_064 &= ~CODEC_SOFT_RSTN_ADC(1 << i);\n          codec->REG_064 |= CODEC_SOFT_RSTN_ADC(1 << i);\n          codec->REG_080 |= (CODEC_CODEC_ADC_EN_CH0 << i);\n        }\n        codec->REG_000 |= (CODEC_ADC_ENABLE_CH0 << i);\n      }\n    }\n    fifo_flush = CODEC_RX_FIFO_FLUSH_CH0 | CODEC_RX_FIFO_FLUSH_CH1 |\n                 CODEC_RX_FIFO_FLUSH_CH2 | CODEC_RX_FIFO_FLUSH_CH3 |\n                 CODEC_RX_FIFO_FLUSH_CH4 | CODEC_RX_FIFO_FLUSH_CH5 |\n                 CODEC_RX_FIFO_FLUSH_CH6;\n    codec->REG_004 |= fifo_flush;\n    hal_codec_reg_update_delay();\n    codec->REG_004 &= ~fifo_flush;\n    if (dma) {\n      codec->REG_008 = SET_BITFIELD(codec->REG_008, CODEC_CODEC_RX_THRESHOLD,\n                                    HAL_CODEC_RX_FIFO_TRIGGER_LEVEL);\n      codec->REG_000 |= CODEC_DMACTRL_RX;\n    }\n    codec->REG_000 |= CODEC_ADC_ENABLE;\n  }\n\n  return 0;\n}\n\nint hal_codec_stop_interface(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t fifo_flush = 0;\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    codec->REG_000 &= ~CODEC_DAC_ENABLE;\n    codec->REG_000 &= ~CODEC_DMACTRL_TX;\n#ifdef __AUDIO_RESAMPLE__\n    codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_DAC_ENABLE;\n    hal_codec_resample_clock_disable(stream);\n#endif\n#ifdef CODEC_MIN_PHASE\n    if (min_phase_cfg & (1 << AUD_STREAM_PLAYBACK)) {\n      if (codec_dac_ch_map & AUD_CHANNEL_MAP_CH0) {\n        codec->REG_100 &= ~CODEC_FIR_STREAM_ENABLE_CH0;\n        codec->REG_098 &= ~CODEC_CODEC_DAC_L_FIR_UPSAMPLE;\n      }\n      if (codec_dac_ch_map & AUD_CHANNEL_MAP_CH1) {\n        codec->REG_100 &= ~CODEC_FIR_STREAM_ENABLE_CH1;\n        codec->REG_098 &= ~CODEC_CODEC_DAC_R_FIR_UPSAMPLE;\n      }\n    }\n#endif\n#ifdef CODEC_DSD\n    hal_codec_dsd_cfg_stop();\n    dsd_enabled = false;\n#endif\n#ifdef AUDIO_ANC_FB_MC\n    mc_enabled = false;\n    codec->REG_04C &= ~CODEC_MC_ENABLE;\n    adc_en_map &= ~(1 << CODEC_ADC_EN_REQ_MC);\n    if (adc_en_map == 0) {\n      codec->REG_080 &= ~CODEC_CODEC_ADC_EN;\n    }\n    fifo_flush |= CODEC_MC_FIFO_FLUSH;\n#endif\n    fifo_flush |= CODEC_TX_FIFO_FLUSH;\n    codec->REG_004 |= fifo_flush;\n    hal_codec_reg_update_delay();\n    codec->REG_004 &= ~fifo_flush;\n    // Cancel dac sync request\n    hal_codec_sync_dac_disable();\n    hal_codec_sync_dac_resample_rate_disable();\n    hal_codec_sync_dac_gain_disable();\n#ifdef NO_DAC_RESET\n    // Clean up DAC intermediate states\n    osDelay(dac_delay_ms);\n#endif\n  } else {\n    codec->REG_000 &=\n        ~(CODEC_ADC_ENABLE | CODEC_ADC_ENABLE_CH0 | CODEC_ADC_ENABLE_CH1 |\n          CODEC_ADC_ENABLE_CH2 | CODEC_ADC_ENABLE_CH3 | CODEC_ADC_ENABLE_CH4 |\n          CODEC_ADC_ENABLE_CH5 | CODEC_ADC_ENABLE_CH6);\n    codec->REG_000 &= ~CODEC_DMACTRL_RX;\n    for (int i = 0; i < MAX_ADC_CH_NUM; i++) {\n      if (i < NORMAL_ADC_CH_NUM &&\n          (codec_adc_ch_map & (AUD_CHANNEL_MAP_CH0 << i)) &&\n          (anc_adc_ch_map & (AUD_CHANNEL_MAP_CH0 << i)) == 0) {\n        codec->REG_080 &= ~(CODEC_CODEC_ADC_EN_CH0 << i);\n      }\n    }\n    if (codec_adc_ch_map & EC_ADC_MAP) {\n      hal_codec_ec_disable();\n    }\n    if ((codec_mic_ch_map & AUD_CHANNEL_MAP_DIGMIC_ALL) &&\n        (anc_mic_ch_map & AUD_CHANNEL_MAP_DIGMIC_ALL) == 0) {\n      hal_codec_disable_dig_mic();\n    }\n#ifdef __AUDIO_RESAMPLE__\n    codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_ADC_ENABLE;\n    hal_codec_resample_clock_disable(stream);\n#endif\n#ifdef CODEC_MIN_PHASE\n    if (min_phase_cfg & (1 << AUD_STREAM_CAPTURE)) {\n      if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH2) {\n        codec->REG_100 &= ~CODEC_FIR_STREAM_ENABLE_CH2;\n        codec->REG_0D0 &= ~CODEC_CODEC_ADC_FIR_DS_EN_CH2;\n      }\n      if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH3) {\n        codec->REG_100 &= ~CODEC_FIR_STREAM_ENABLE_CH3;\n        codec->REG_0D0 &= ~CODEC_CODEC_ADC_FIR_DS_EN_CH3;\n      }\n    }\n#endif\n    fifo_flush = CODEC_RX_FIFO_FLUSH_CH0 | CODEC_RX_FIFO_FLUSH_CH1 |\n                 CODEC_RX_FIFO_FLUSH_CH2 | CODEC_RX_FIFO_FLUSH_CH3 |\n                 CODEC_RX_FIFO_FLUSH_CH4 | CODEC_RX_FIFO_FLUSH_CH5 |\n                 CODEC_RX_FIFO_FLUSH_CH6;\n    codec->REG_004 |= fifo_flush;\n    hal_codec_reg_update_delay();\n    codec->REG_004 &= ~fifo_flush;\n    // Cancel adc sync request\n    hal_codec_sync_adc_disable();\n    hal_codec_sync_adc_resample_rate_disable();\n    hal_codec_sync_adc_gain_disable();\n  }\n\n  return 0;\n}\n\nstatic void hal_codec_set_dac_gain_value(enum AUD_CHANNEL_MAP_T map,\n                                         uint32_t val) {\n  codec->REG_09C &= ~CODEC_CODEC_DAC_GAIN_UPDATE;\n  hal_codec_reg_update_delay();\n  if (map & AUD_CHANNEL_MAP_CH0) {\n    codec->REG_09C =\n        SET_BITFIELD(codec->REG_09C, CODEC_CODEC_DAC_GAIN_CH0, val);\n  }\n  if (map & AUD_CHANNEL_MAP_CH1) {\n    codec->REG_0A0 =\n        SET_BITFIELD(codec->REG_0A0, CODEC_CODEC_DAC_GAIN_CH1, val);\n  }\n  codec->REG_09C |= CODEC_CODEC_DAC_GAIN_UPDATE;\n}\n\nvoid hal_codec_get_dac_gain(float *left_gain, float *right_gain) {\n  struct DAC_GAIN_T {\n    int32_t v : 20;\n  };\n\n  struct DAC_GAIN_T left;\n  struct DAC_GAIN_T right;\n\n  left.v = GET_BITFIELD(codec->REG_09C, CODEC_CODEC_DAC_GAIN_CH0);\n  right.v = GET_BITFIELD(codec->REG_0A0, CODEC_CODEC_DAC_GAIN_CH1);\n\n  *left_gain = left.v;\n  *right_gain = right.v;\n\n  // Gain format: 6.14\n  *left_gain /= (1 << 14);\n  *right_gain /= (1 << 14);\n}\n\nvoid hal_codec_dac_mute(bool mute) {\n  codec_mute[AUD_STREAM_PLAYBACK] = mute;\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n  hal_codec_set_sw_gain(swdac_gain);\n#else\n  if (mute) {\n    hal_codec_set_dac_gain_value(VALID_DAC_MAP, 0);\n  } else {\n    hal_codec_restore_dig_dac_gain();\n  }\n#endif\n}\n\nstatic float db_to_amplitude_ratio(int32_t db) {\n  float coef;\n\n  if (db == ZERODB_DIG_DBVAL) {\n    coef = 1;\n  } else if (db <= MIN_DIG_DBVAL) {\n    coef = 0;\n  } else {\n    if (db > MAX_DIG_DBVAL) {\n      db = MAX_DIG_DBVAL;\n    }\n    coef = db_to_float(db);\n  }\n\n  return coef;\n}\n\nstatic float digdac_gain_to_float(int32_t gain) {\n  float coef;\n\n#if defined(NOISE_GATING) && defined(NOISE_REDUCTION)\n  gain += digdac_gain_offset_nr;\n#endif\n\n  coef = db_to_amplitude_ratio(gain);\n\n#ifdef AUDIO_OUTPUT_DC_CALIB\n  coef *= dac_dc_gain_attn;\n#endif\n\n#ifdef ANC_APP\n  coef *= anc_boost_gain_attn;\n#endif\n\n#if 0\n    static const float thd_attn = 0.982878873; // -0.15dB\n\n    // Ensure that THD is good at max gain\n    if (coef > thd_attn) {\n        coef = thd_attn;\n    }\n#endif\n\n  return coef;\n}\n\nstatic void hal_codec_set_dig_dac_gain(enum AUD_CHANNEL_MAP_T map,\n                                       int32_t gain) {\n  uint32_t val;\n  float coef;\n  bool mute;\n\n  if (map & AUD_CHANNEL_MAP_CH0) {\n    digdac_gain[0] = gain;\n  }\n  if (map & AUD_CHANNEL_MAP_CH1) {\n    digdac_gain[1] = gain;\n  }\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n  mute = false;\n#else\n  mute = codec_mute[AUD_STREAM_PLAYBACK];\n#endif\n\n#ifdef AUDIO_OUTPUT_DC_CALIB_ANA\n  if (codec->REG_098 & CODEC_CODEC_DAC_SDM_CLOSE) {\n    mute = true;\n  }\n#endif\n\n  if (mute) {\n    val = 0;\n  } else {\n    coef = digdac_gain_to_float(gain);\n\n    // Gain format: 6.14\n    int32_t s_val = (int32_t)(coef * (1 << 14));\n    val = __SSAT(s_val, 20);\n  }\n\n  hal_codec_set_dac_gain_value(map, val);\n}\n\nstatic void hal_codec_restore_dig_dac_gain(void) {\n  if (digdac_gain[0] == digdac_gain[1]) {\n    hal_codec_set_dig_dac_gain(VALID_DAC_MAP, digdac_gain[0]);\n  } else {\n    hal_codec_set_dig_dac_gain(AUD_CHANNEL_MAP_CH0, digdac_gain[0]);\n    hal_codec_set_dig_dac_gain(AUD_CHANNEL_MAP_CH1, digdac_gain[1]);\n  }\n}\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\nstatic void hal_codec_set_sw_gain(int32_t gain) {\n  float coef;\n  bool mute;\n\n  swdac_gain = gain;\n\n  mute = codec_mute[AUD_STREAM_PLAYBACK];\n\n  if (mute) {\n    coef = 0;\n  } else {\n    coef = digdac_gain_to_float(gain);\n  }\n\n  if (sw_output_coef_callback) {\n    sw_output_coef_callback(coef);\n  }\n}\n\nvoid hal_codec_set_sw_output_coef_callback(\n    HAL_CODEC_SW_OUTPUT_COEF_CALLBACK callback) {\n  sw_output_coef_callback = callback;\n}\n#endif\n\nstatic void hal_codec_set_adc_gain_value(enum AUD_CHANNEL_MAP_T map,\n                                         uint32_t val) {\n  uint32_t gain_update = 0;\n\n  for (int i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    if (map & (AUD_CHANNEL_MAP_CH0 << i)) {\n      *(&codec->REG_084 + i) =\n          SET_BITFIELD(*(&codec->REG_084 + i), CODEC_CODEC_ADC_GAIN_CH0, val);\n      gain_update |= (CODEC_CODEC_ADC_GAIN_UPDATE_CH0 << i);\n    }\n  }\n  codec->REG_09C &= ~gain_update;\n  hal_codec_reg_update_delay();\n  codec->REG_09C |= gain_update;\n}\n\nstatic void hal_codec_set_dig_adc_gain(enum AUD_CHANNEL_MAP_T map,\n                                       int32_t gain) {\n  uint32_t val;\n  float coef;\n  bool mute;\n  int i;\n  int32_t s_val;\n\n  for (i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    if (map & (1 << i)) {\n      digadc_gain[i] = gain;\n    }\n  }\n\n  mute = codec_mute[AUD_STREAM_CAPTURE];\n\n  if (mute) {\n    val = 0;\n  } else {\n#ifdef ANC_APP\n    enum AUD_CHANNEL_MAP_T adj_map;\n    int32_t anc_gain;\n\n    adj_map = map & anc_adc_gain_offset_map;\n    while (adj_map) {\n      i = get_msb_pos(adj_map);\n      adj_map &= ~(1 << i);\n      anc_gain = gain + anc_adc_gain_offset[i];\n      coef = db_to_amplitude_ratio(anc_gain);\n      coef /= anc_boost_gain_attn;\n      // Gain format: 8.12\n      s_val = (int32_t)(coef * (1 << 12));\n      val = __SSAT(s_val, 20);\n      hal_codec_set_adc_gain_value((1 << i), val);\n    }\n\n    map &= ~anc_adc_gain_offset_map;\n#endif\n\n    if (map) {\n      coef = db_to_amplitude_ratio(gain);\n#ifdef ANC_APP\n      coef /= anc_boost_gain_attn;\n#endif\n      // Gain format: 8.12\n      s_val = (int32_t)(coef * (1 << 12));\n      val = __SSAT(s_val, 20);\n    } else {\n      val = 0;\n    }\n  }\n\n  hal_codec_set_adc_gain_value(map, val);\n}\n\nstatic void hal_codec_restore_dig_adc_gain(void) {\n  int i;\n\n  for (i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    hal_codec_set_dig_adc_gain((1 << i), digadc_gain[i]);\n  }\n}\n\nstatic void POSSIBLY_UNUSED hal_codec_get_adc_gain(enum AUD_CHANNEL_MAP_T map,\n                                                   float *gain) {\n  struct ADC_GAIN_T {\n    int32_t v : 20;\n  };\n\n  struct ADC_GAIN_T adc_val;\n\n  for (int i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    if (map & (AUD_CHANNEL_MAP_CH0 << i)) {\n      adc_val.v =\n          GET_BITFIELD(*(&codec->REG_084 + i), CODEC_CODEC_ADC_GAIN_CH0);\n\n      *gain = adc_val.v;\n      // Gain format: 8.12\n      *gain /= (1 << 12);\n      return;\n    }\n  }\n\n  *gain = 0;\n}\n\nvoid hal_codec_adc_mute(bool mute) {\n  codec_mute[AUD_STREAM_CAPTURE] = mute;\n\n  if (mute) {\n    hal_codec_set_adc_gain_value(NORMAL_ADC_MAP, 0);\n  } else {\n    hal_codec_restore_dig_adc_gain();\n  }\n}\n\nint hal_codec_set_chan_vol(enum AUD_STREAM_T stream,\n                           enum AUD_CHANNEL_MAP_T ch_map, uint8_t vol) {\n  if (stream == AUD_STREAM_PLAYBACK) {\n#ifdef AUDIO_OUTPUT_SW_GAIN\n    ASSERT(false, \"%s: Cannot set play chan vol with AUDIO_OUTPUT_SW_GAIN\",\n           __func__);\n#else\n#ifdef SINGLE_CODEC_DAC_VOL\n    ASSERT(false, \"%s: Cannot set play chan vol with SINGLE_CODEC_DAC_VOL\",\n           __func__);\n#else\n    const struct CODEC_DAC_VOL_T *vol_tab_ptr;\n\n    vol_tab_ptr = hal_codec_get_dac_volume(vol);\n    if (vol_tab_ptr) {\n      if (ch_map & AUD_CHANNEL_MAP_CH0) {\n        hal_codec_set_dig_dac_gain(AUD_CHANNEL_MAP_CH0,\n                                   vol_tab_ptr->sdac_volume);\n      }\n      if (ch_map & AUD_CHANNEL_MAP_CH1) {\n        hal_codec_set_dig_dac_gain(AUD_CHANNEL_MAP_CH1,\n                                   vol_tab_ptr->sdac_volume);\n      }\n    }\n#endif\n#endif\n  } else {\n#ifdef SINGLE_CODEC_ADC_VOL\n    ASSERT(false, \"%s: Cannot set cap chan vol with SINGLE_CODEC_ADC_VOL\",\n           __func__);\n#else\n    uint8_t mic_ch, adc_ch;\n    enum AUD_CHANNEL_MAP_T map;\n    const CODEC_ADC_VOL_T *adc_gain_db;\n\n    adc_gain_db = hal_codec_get_adc_volume(vol);\n    if (adc_gain_db) {\n      map = ch_map & ~EC_MIC_MAP;\n      while (map) {\n        mic_ch = get_lsb_pos(map);\n        map &= ~(1 << mic_ch);\n        adc_ch = hal_codec_get_adc_chan(1 << mic_ch);\n        ASSERT(adc_ch < NORMAL_ADC_CH_NUM, \"%s: Bad cap ch_map=0x%X (ch=%u)\",\n               __func__, ch_map, mic_ch);\n        hal_codec_set_dig_adc_gain((1 << adc_ch), *adc_gain_db);\n      }\n    }\n#endif\n  }\n\n  return 0;\n}\n\nstatic int hal_codec_set_dac_hbf_bypass_cnt(uint32_t cnt) {\n  uint32_t bypass = 0;\n  uint32_t bypass_mask = CODEC_CODEC_DAC_HBF1_BYPASS |\n                         CODEC_CODEC_DAC_HBF2_BYPASS |\n                         CODEC_CODEC_DAC_HBF3_BYPASS;\n\n  if (cnt == 0) {\n  } else if (cnt == 1) {\n    bypass = CODEC_CODEC_DAC_HBF3_BYPASS;\n  } else if (cnt == 2) {\n    bypass = CODEC_CODEC_DAC_HBF2_BYPASS | CODEC_CODEC_DAC_HBF3_BYPASS;\n  } else if (cnt == 3) {\n    bypass = CODEC_CODEC_DAC_HBF1_BYPASS | CODEC_CODEC_DAC_HBF2_BYPASS |\n             CODEC_CODEC_DAC_HBF3_BYPASS;\n  } else {\n    ASSERT(false, \"%s: Invalid dac bypass cnt: %u\", __FUNCTION__, cnt);\n  }\n\n  // OSR is fixed to 512\n  // codec->REG_098 = SET_BITFIELD(codec->REG_098, CODEC_CODEC_DAC_OSR_SEL, 2);\n\n  codec->REG_098 = (codec->REG_098 & ~bypass_mask) | bypass;\n  return 0;\n}\n\nstatic int hal_codec_set_dac_up(uint32_t val) {\n  uint32_t sel = 0;\n\n  if (val == 2) {\n    sel = 0;\n  } else if (val == 3) {\n    sel = 1;\n  } else if (val == 4) {\n    sel = 2;\n  } else if (val == 6) {\n    sel = 3;\n  } else if (val == 1) {\n    sel = 4;\n  } else {\n    ASSERT(false, \"%s: Invalid dac up: %u\", __FUNCTION__, val);\n  }\n  codec->REG_098 = SET_BITFIELD(codec->REG_098, CODEC_CODEC_DAC_UP_SEL, sel);\n  return 0;\n}\n\nstatic uint32_t POSSIBLY_UNUSED hal_codec_get_dac_up(void) {\n  uint32_t sel;\n\n  sel = GET_BITFIELD(codec->REG_098, CODEC_CODEC_DAC_UP_SEL);\n  if (sel == 0) {\n    return 2;\n  } else if (sel == 1) {\n    return 3;\n  } else if (sel == 2) {\n    return 4;\n  } else if (sel == 3) {\n    return 6;\n  } else {\n    return 1;\n  }\n}\n\nstatic int hal_codec_set_adc_down(enum AUD_CHANNEL_MAP_T map, uint32_t val) {\n  uint32_t sel = 0;\n\n  if (val == 3) {\n    sel = 0;\n  } else if (val == 6) {\n    sel = 1;\n  } else if (val == 1) {\n    sel = 2;\n  } else {\n    ASSERT(false, \"%s: Invalid adc down: %u\", __FUNCTION__, val);\n  }\n  for (int i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    if (map & (AUD_CHANNEL_MAP_CH0 << i)) {\n      *(&codec->REG_084 + i) = SET_BITFIELD(*(&codec->REG_084 + i),\n                                            CODEC_CODEC_ADC_DOWN_SEL_CH0, sel);\n    }\n  }\n  return 0;\n}\n\nstatic int hal_codec_set_adc_hbf_bypass_cnt(enum AUD_CHANNEL_MAP_T map,\n                                            uint32_t cnt) {\n  uint32_t bypass = 0;\n  uint32_t bypass_mask = CODEC_CODEC_ADC_HBF1_BYPASS_CH0 |\n                         CODEC_CODEC_ADC_HBF2_BYPASS_CH0 |\n                         CODEC_CODEC_ADC_HBF3_BYPASS_CH0;\n\n  if (cnt == 0) {\n  } else if (cnt == 1) {\n    bypass = CODEC_CODEC_ADC_HBF3_BYPASS_CH0;\n  } else if (cnt == 2) {\n    bypass = CODEC_CODEC_ADC_HBF2_BYPASS_CH0 | CODEC_CODEC_ADC_HBF3_BYPASS_CH0;\n  } else if (cnt == 3) {\n    bypass = CODEC_CODEC_ADC_HBF1_BYPASS_CH0 | CODEC_CODEC_ADC_HBF2_BYPASS_CH0 |\n             CODEC_CODEC_ADC_HBF3_BYPASS_CH0;\n  } else {\n    ASSERT(false, \"%s: Invalid bypass cnt: %u\", __FUNCTION__, cnt);\n  }\n  for (int i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    if (map & (AUD_CHANNEL_MAP_CH0 << i)) {\n      *(&codec->REG_084 + i) = (*(&codec->REG_084 + i) & ~bypass_mask) | bypass;\n    }\n  }\n  return 0;\n}\n\n#ifdef __AUDIO_RESAMPLE__\nstatic float get_playback_resample_phase(void) {\n  return (float)codec_dac_sample_rate[resample_rate_idx[AUD_STREAM_PLAYBACK]]\n             .codec_freq /\n         hal_cmu_get_crystal_freq();\n}\n\nstatic float get_capture_resample_phase(void) {\n  return (float)hal_cmu_get_crystal_freq() /\n         codec_adc_sample_rate[resample_rate_idx[AUD_STREAM_CAPTURE]]\n             .codec_freq;\n}\n\nstatic uint32_t resample_phase_float_to_value(float phase) {\n  if (phase >= 4.0) {\n    return (uint32_t)-1;\n  } else {\n    // Phase format: 2.30\n    return (uint32_t)(phase * (1 << 30));\n  }\n}\n\nstatic float POSSIBLY_UNUSED resample_phase_value_to_float(uint32_t value) {\n  // Phase format: 2.30\n  return (float)value / (1 << 30);\n}\n#endif\n\n#ifdef SIDETONE_ENABLE\nstatic void hal_codec_set_sidetone_adc_chan(enum AUD_CHANNEL_MAP_T chan_map) {\n  if (chan_map == AUD_CHANNEL_MAP_CH0) {\n    codec->REG_080 &= ~CODEC_CODEC_SIDE_TONE_MIC_SEL;\n    codec->REG_078 &= ~CODEC_CODEC_SIDE_TONE_CH_SEL;\n  } else if (chan_map == AUD_CHANNEL_MAP_CH2) {\n    codec->REG_080 &= ~CODEC_CODEC_SIDE_TONE_MIC_SEL;\n    codec->REG_078 |= CODEC_CODEC_SIDE_TONE_CH_SEL;\n  } else if (chan_map == AUD_CHANNEL_MAP_CH4) {\n    codec->REG_080 |= CODEC_CODEC_SIDE_TONE_MIC_SEL;\n  }\n}\n#endif\n\nint hal_codec_setup_stream(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream,\n                           const struct HAL_CODEC_CONFIG_T *cfg) {\n  int i;\n  int rate_idx;\n  uint32_t ana_dig_div;\n  enum AUD_SAMPRATE_T sample_rate;\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    if ((HAL_CODEC_CONFIG_CHANNEL_MAP | HAL_CODEC_CONFIG_CHANNEL_NUM) &\n        cfg->set_flag) {\n      if (cfg->channel_num == AUD_CHANNEL_NUM_2) {\n        if (cfg->channel_map != (AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)) {\n          TRACE(2, \"\\n!!! WARNING:%s: Bad play stereo ch map: 0x%X\\n\", __func__,\n                cfg->channel_map);\n        }\n        codec->REG_044 |= CODEC_DUAL_CHANNEL_DAC;\n      } else {\n        ASSERT(cfg->channel_num == AUD_CHANNEL_NUM_1, \"%s: Bad play ch num: %u\",\n               __func__, cfg->channel_num);\n        // Allow to DMA one channel but output 2 channels\n        ASSERT((cfg->channel_map &\n                ~(AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1)) == 0,\n               \"%s: Bad play mono ch map: 0x%X\", __func__, cfg->channel_map);\n        codec->REG_044 &= ~CODEC_DUAL_CHANNEL_DAC;\n      }\n      codec_dac_ch_map = AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1;\n    }\n\n    if (HAL_CODEC_CONFIG_BITS & cfg->set_flag) {\n      if (cfg->bits == AUD_BITS_16) {\n        codec->REG_044 =\n            (codec->REG_044 & ~CODEC_MODE_32BIT_DAC) | CODEC_MODE_16BIT_DAC;\n        codec->REG_04C =\n            (codec->REG_04C & ~CODEC_MODE_32BIT_MC) | CODEC_MODE_16BIT_MC;\n      } else if (cfg->bits == AUD_BITS_24) {\n        codec->REG_044 &= ~(CODEC_MODE_16BIT_DAC | CODEC_MODE_32BIT_DAC);\n        codec->REG_04C &= ~(CODEC_MODE_16BIT_MC | CODEC_MODE_32BIT_MC);\n      } else if (cfg->bits == AUD_BITS_32) {\n        codec->REG_044 =\n            (codec->REG_044 & ~CODEC_MODE_16BIT_DAC) | CODEC_MODE_32BIT_DAC;\n        codec->REG_04C =\n            (codec->REG_04C & ~CODEC_MODE_16BIT_MC) | CODEC_MODE_32BIT_MC;\n      } else {\n        ASSERT(false, \"%s: Bad play bits: %u\", __func__, cfg->bits);\n      }\n    }\n\n    if (HAL_CODEC_CONFIG_SAMPLE_RATE & cfg->set_flag) {\n      sample_rate = cfg->sample_rate;\n#ifdef CODEC_DSD\n      if (dsd_enabled) {\n        if (sample_rate == AUD_SAMPRATE_176400) {\n          dsd_rate_idx = 0;\n        } else if (sample_rate == AUD_SAMPRATE_352800) {\n          dsd_rate_idx = 1;\n        } else if (sample_rate == AUD_SAMPRATE_705600) {\n          dsd_rate_idx = 2;\n        } else {\n          ASSERT(false, \"%s: Bad DSD sample rate: %u\", __func__, sample_rate);\n        }\n        sample_rate = AUD_SAMPRATE_44100;\n      }\n#endif\n\n      for (i = 0; i < ARRAY_SIZE(codec_dac_sample_rate); i++) {\n        if (codec_dac_sample_rate[i].sample_rate == sample_rate) {\n          break;\n        }\n      }\n      ASSERT(i < ARRAY_SIZE(codec_dac_sample_rate),\n             \"%s: Invalid playback sample rate: %u\", __func__, sample_rate);\n      rate_idx = i;\n      ana_dig_div = codec_dac_sample_rate[rate_idx].codec_div /\n                    codec_dac_sample_rate[rate_idx].cmu_div;\n      ASSERT(ana_dig_div * codec_dac_sample_rate[rate_idx].cmu_div ==\n                 codec_dac_sample_rate[rate_idx].codec_div,\n             \"%s: Invalid playback div for rate %u: codec_div=%u cmu_div=%u\",\n             __func__, sample_rate, codec_dac_sample_rate[rate_idx].codec_div,\n             codec_dac_sample_rate[rate_idx].cmu_div);\n\n      TRACE(2, \"[%s] playback sample_rate=%d\", __func__, sample_rate);\n\n#ifdef CODEC_TIMER\n      cur_codec_freq = codec_dac_sample_rate[rate_idx].codec_freq;\n#endif\n\n      codec_rate_idx[AUD_STREAM_PLAYBACK] = rate_idx;\n\n#ifdef __AUDIO_RESAMPLE__\n      uint32_t mask, val;\n\n      if (hal_cmu_get_audio_resample_status() &&\n          codec_dac_sample_rate[rate_idx].codec_freq != CODEC_FREQ_CRYSTAL) {\n#ifdef CODEC_TIMER\n        cur_codec_freq = CODEC_FREQ_CRYSTAL;\n#endif\n        if ((codec->REG_0E4 & CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE) == 0 ||\n            resample_rate_idx[AUD_STREAM_PLAYBACK] != rate_idx) {\n          resample_rate_idx[AUD_STREAM_PLAYBACK] = rate_idx;\n          codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n          hal_codec_reg_update_delay();\n          codec->REG_0F4 =\n              resample_phase_float_to_value(get_playback_resample_phase());\n          hal_codec_reg_update_delay();\n          codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n        }\n\n        mask = CODEC_CODEC_RESAMPLE_DAC_L_ENABLE |\n               CODEC_CODEC_RESAMPLE_DAC_R_ENABLE;\n        val = 0;\n        if (codec_dac_ch_map & AUD_CHANNEL_MAP_CH0) {\n          val |= CODEC_CODEC_RESAMPLE_DAC_L_ENABLE;\n        }\n        if (codec_dac_ch_map & AUD_CHANNEL_MAP_CH1) {\n          val |= CODEC_CODEC_RESAMPLE_DAC_R_ENABLE;\n        }\n      } else {\n        mask = CODEC_CODEC_RESAMPLE_DAC_L_ENABLE |\n               CODEC_CODEC_RESAMPLE_DAC_R_ENABLE |\n               CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n        val = 0;\n      }\n      codec->REG_0E4 = (codec->REG_0E4 & ~mask) | val;\n#endif\n\n      // 8K -> 4ms, 16K -> 2ms, ...\n      dac_delay_ms =\n          4 / ((sample_rate + AUD_SAMPRATE_8000 / 2) / AUD_SAMPRATE_8000);\n      if (dac_delay_ms < 2) {\n        dac_delay_ms = 2;\n      }\n\n#ifdef __AUDIO_RESAMPLE__\n      if (!hal_cmu_get_audio_resample_status())\n#endif\n      {\n#ifdef __AUDIO_RESAMPLE__\n        ASSERT(codec_dac_sample_rate[rate_idx].codec_freq != CODEC_FREQ_CRYSTAL,\n               \"%s: playback sample rate %u is for resample only\", __func__,\n               sample_rate);\n#endif\n        analog_aud_freq_pll_config(codec_dac_sample_rate[rate_idx].codec_freq,\n                                   codec_dac_sample_rate[rate_idx].codec_div);\n        hal_cmu_codec_dac_set_div(codec_dac_sample_rate[rate_idx].cmu_div *\n                                  CODEC_FREQ_EXTRA_DIV);\n      }\n      hal_codec_set_dac_up(codec_dac_sample_rate[rate_idx].dac_up);\n      hal_codec_set_dac_hbf_bypass_cnt(\n          codec_dac_sample_rate[rate_idx].bypass_cnt);\n#ifdef AUDIO_ANC_FB_MC\n      codec->REG_04C = SET_BITFIELD(codec->REG_04C, CODEC_MC_DELAY,\n                                    codec_dac_sample_rate[rate_idx].mc_delay);\n#endif\n    }\n\n    if (HAL_CODEC_CONFIG_VOL & cfg->set_flag) {\n      const struct CODEC_DAC_VOL_T *vol_tab_ptr;\n\n      vol_tab_ptr = hal_codec_get_dac_volume(cfg->vol);\n      if (vol_tab_ptr) {\n#ifdef AUDIO_OUTPUT_SW_GAIN\n        hal_codec_set_sw_gain(vol_tab_ptr->sdac_volume);\n#else\n        analog_aud_set_dac_gain(vol_tab_ptr->tx_pa_gain);\n        hal_codec_set_dig_dac_gain(VALID_DAC_MAP, vol_tab_ptr->sdac_volume);\n#endif\n#ifdef PERF_TEST_POWER_KEY\n        // Update performance test power after applying new dac volume\n        hal_codec_update_perf_test_power();\n#endif\n      }\n    }\n  } else {\n    enum AUD_CHANNEL_MAP_T mic_map;\n    enum AUD_CHANNEL_MAP_T reserv_map;\n    uint8_t cnt;\n    uint8_t ch_idx;\n    uint32_t cfg_set_mask;\n    uint32_t cfg_clr_mask;\n#ifdef VOICE_DETECTOR_EN\n    uint32_t adc_channel_en = 0;\n#endif\n\n    mic_map = 0;\n    if ((HAL_CODEC_CONFIG_CHANNEL_MAP | HAL_CODEC_CONFIG_CHANNEL_NUM) &\n        cfg->set_flag) {\n      codec_adc_ch_map = 0;\n      codec_mic_ch_map = 0;\n      mic_map = cfg->channel_map;\n    }\n\n    if (mic_map) {\n      codec_mic_ch_map = mic_map;\n      reserv_map = 0;\n\n#ifdef ANC_APP\n#if defined(ANC_FF_MIC_CH_L) || defined(ANC_FF_MIC_CH_R)\n#ifdef ANC_PROD_TEST\n      if ((ANC_FF_MIC_CH_L & ~NORMAL_MIC_MAP) ||\n          (ANC_FF_MIC_CH_L & (ANC_FF_MIC_CH_L - 1))) {\n        ASSERT(false, \"Invalid ANC_FF_MIC_CH_L: 0x%04X\", ANC_FF_MIC_CH_L);\n      }\n      if ((ANC_FF_MIC_CH_R & ~NORMAL_MIC_MAP) ||\n          (ANC_FF_MIC_CH_R & (ANC_FF_MIC_CH_R - 1))) {\n        ASSERT(false, \"Invalid ANC_FF_MIC_CH_R: 0x%04X\", ANC_FF_MIC_CH_R);\n      }\n      if (ANC_FF_MIC_CH_L & ANC_FF_MIC_CH_R) {\n        ASSERT(\n            false,\n            \"Conflicted ANC_FF_MIC_CH_L (0x%04X) and ANC_FF_MIC_CH_R (0x%04X)\",\n            ANC_FF_MIC_CH_L, ANC_FF_MIC_CH_R);\n      }\n#if defined(ANC_FB_MIC_CH_L) || defined(ANC_FB_MIC_CH_R)\n      if ((ANC_FF_MIC_CH_L & ANC_FB_MIC_CH_L) ||\n          (ANC_FF_MIC_CH_L & ANC_FB_MIC_CH_R) ||\n          (ANC_FF_MIC_CH_R & ANC_FB_MIC_CH_L) ||\n          (ANC_FF_MIC_CH_R & ANC_FB_MIC_CH_R)) {\n        ASSERT(false,\n               \"Conflicted FF MIC (0x%04X/0x%04X) and FB MIC (0x%04X/0x%04X)\",\n               ANC_FF_MIC_CH_L, ANC_FF_MIC_CH_R, ANC_FB_MIC_CH_L,\n               ANC_FB_MIC_CH_R);\n      }\n#endif\n#ifdef VOICE_DETECTOR_EN\n      if (ANC_FF_MIC_CH_L & AUD_CHANNEL_MAP_CH4) {\n        ASSERT(false, \"Conflicted ANC_FF_MIC_CH_L and VAD MIC\");\n      }\n      if (ANC_FF_MIC_CH_R & AUD_CHANNEL_MAP_CH4) {\n        ASSERT(false, \"Conflicted ANC_FF_MIC_CH_R and VAD MIC\");\n      }\n#endif\n#else // !ANC_PROD_TEST\n#if (ANC_FF_MIC_CH_L & ~NORMAL_MIC_MAP) ||                                     \\\n    (ANC_FF_MIC_CH_L & (ANC_FF_MIC_CH_L - 1))\n#error \"Invalid ANC_FF_MIC_CH_L\"\n#endif\n#if (ANC_FF_MIC_CH_R & ~NORMAL_MIC_MAP) ||                                     \\\n    (ANC_FF_MIC_CH_R & (ANC_FF_MIC_CH_R - 1))\n#error \"Invalid ANC_FF_MIC_CH_R\"\n#endif\n#if (ANC_FF_MIC_CH_L & ANC_FF_MIC_CH_R)\n#error \"Conflicted ANC_FF_MIC_CH_L and ANC_FF_MIC_CH_R\"\n#endif\n#if defined(ANC_FB_MIC_CH_L) || defined(ANC_FB_MIC_CH_R)\n#if (ANC_FF_MIC_CH_L & ANC_FB_MIC_CH_L) ||                                     \\\n    (ANC_FF_MIC_CH_L & ANC_FB_MIC_CH_R) ||                                     \\\n    (ANC_FF_MIC_CH_R & ANC_FB_MIC_CH_L) || (ANC_FF_MIC_CH_R & ANC_FB_MIC_CH_R)\n#error                                                                         \\\n    \"Conflicted ANC_FF_MIC_CH_L and ANC_FF_MIC_CH_R, ANC_FB_MIC_CH_L, ANC_FB_MIC_CH_R\"\n#endif\n#endif\n#ifdef VOICE_DETECTOR_EN\n#if (ANC_FF_MIC_CH_L & AUD_CHANNEL_MAP_CH4)\n#error \"Conflicted ANC_FF_MIC_CH_L and VAD MIC\"\n#endif\n#if (ANC_FF_MIC_CH_R & AUD_CHANNEL_MAP_CH4)\n#error \"Conflicted ANC_FF_MIC_CH_R and VAD MIC\"\n#endif\n#endif\n#endif // !ANC_PROD_TEST\n      if (mic_map & ANC_FF_MIC_CH_L) {\n        codec_adc_ch_map |= AUD_CHANNEL_MAP_CH0;\n        mic_map &= ~ANC_FF_MIC_CH_L;\n        ch_idx = get_msb_pos(ANC_FF_MIC_CH_L);\n        if (ANC_FF_MIC_CH_L & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n          ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n          codec->REG_0A8 =\n              SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH0, ch_idx);\n          codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH0;\n        } else {\n          codec->REG_084 =\n              SET_BITFIELD(codec->REG_084, CODEC_CODEC_ADC_IN_SEL_CH0, ch_idx);\n          codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH0;\n        }\n      } else if (ANC_FF_MIC_CH_L & AUD_CHANNEL_MAP_ALL) {\n        reserv_map |= AUD_CHANNEL_MAP_CH0;\n      }\n      if (mic_map & ANC_FF_MIC_CH_R) {\n        codec_adc_ch_map |= AUD_CHANNEL_MAP_CH1;\n        mic_map &= ~ANC_FF_MIC_CH_R;\n        ch_idx = get_msb_pos(ANC_FF_MIC_CH_R);\n        if (ANC_FF_MIC_CH_R & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n          ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n          codec->REG_0A8 =\n              SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH1, ch_idx);\n          codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH1;\n        } else {\n          codec->REG_088 =\n              SET_BITFIELD(codec->REG_088, CODEC_CODEC_ADC_IN_SEL_CH1, ch_idx);\n          codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH1;\n        }\n      } else if (ANC_FF_MIC_CH_R & AUD_CHANNEL_MAP_ALL) {\n        reserv_map |= AUD_CHANNEL_MAP_CH1;\n      }\n#if defined(SIDETONE_ENABLE) && !defined(SIDETONE_DEDICATED_ADC_CHAN)\n      if (CFG_HW_AUD_SIDETONE_MIC_DEV == ANC_FF_MIC_CH_L) {\n        hal_codec_set_sidetone_adc_chan(AUD_CHANNEL_MAP_CH0);\n      }\n#ifdef ANC_PROD_TEST\n      if (CFG_HW_AUD_SIDETONE_MIC_DEV == ANC_FF_MIC_CH_R) {\n        ASSERT(false, \"SIDETONE MIC cannot be ANC_FF_MIC_CH_R: 0x%X\",\n               ANC_FF_MIC_CH_R);\n      }\n#elif (CFG_HW_AUD_SIDETONE_MIC_DEV == ANC_FF_MIC_CH_R)\n#error \"SIDETONE MIC cannot be ANC_FF_MIC_CH_R\"\n#endif\n#endif\n#endif\n\n#if defined(ANC_FB_MIC_CH_L) || defined(ANC_FB_MIC_CH_R)\n#ifdef ANC_PROD_TEST\n      if ((ANC_FB_MIC_CH_L & ~NORMAL_MIC_MAP) ||\n          (ANC_FB_MIC_CH_L & (ANC_FB_MIC_CH_L - 1))) {\n        ASSERT(false, \"Invalid ANC_FB_MIC_CH_L: 0x%04X\", ANC_FB_MIC_CH_L);\n      }\n      if ((ANC_FB_MIC_CH_R & ~NORMAL_MIC_MAP) ||\n          (ANC_FB_MIC_CH_R & (ANC_FB_MIC_CH_R - 1))) {\n        ASSERT(false, \"Invalid ANC_FB_MIC_CH_R: 0x%04X\", ANC_FB_MIC_CH_R);\n      }\n      if (ANC_FB_MIC_CH_L & ANC_FB_MIC_CH_R) {\n        ASSERT(\n            false,\n            \"Conflicted ANC_FB_MIC_CH_L (0x%04X) and ANC_FB_MIC_CH_R (0x%04X)\",\n            ANC_FB_MIC_CH_L, ANC_FB_MIC_CH_R);\n      }\n#ifdef VOICE_DETECTOR_EN\n      if (ANC_FB_MIC_CH_L & AUD_CHANNEL_MAP_CH4) {\n        ASSERT(false, \"Conflicted ANC_FB_MIC_CH_L and VAD MIC\");\n      }\n      if (ANC_FB_MIC_CH_R & AUD_CHANNEL_MAP_CH4) {\n        ASSERT(false, \"Conflicted ANC_FB_MIC_CH_R and VAD MIC\");\n      }\n#endif\n#else // !ANC_PROD_TEST\n#if (ANC_FB_MIC_CH_L & ~NORMAL_MIC_MAP) ||                                     \\\n    (ANC_FB_MIC_CH_L & (ANC_FB_MIC_CH_L - 1))\n#error \"Invalid ANC_FB_MIC_CH_L\"\n#endif\n#if (ANC_FB_MIC_CH_R & ~NORMAL_MIC_MAP) ||                                     \\\n    (ANC_FB_MIC_CH_R & (ANC_FB_MIC_CH_R - 1))\n#error \"Invalid ANC_FB_MIC_CH_R\"\n#endif\n#if (ANC_FB_MIC_CH_L & ANC_FB_MIC_CH_R)\n#error \"Conflicted ANC_FB_MIC_CH_L and ANC_FB_MIC_CH_R\"\n#endif\n#ifdef VOICE_DETECTOR_EN\n#if (ANC_FB_MIC_CH_L & AUD_CHANNEL_MAP_CH4)\n#error \"Conflicted ANC_FB_MIC_CH_L and VAD MIC\"\n#endif\n#if (ANC_FB_MIC_CH_R & AUD_CHANNEL_MAP_CH4)\n#error \"Conflicted ANC_FB_MIC_CH_R and VAD MIC\"\n#endif\n#endif\n#endif // !ANC_PROD_TEST\n      if (mic_map & ANC_FB_MIC_CH_L) {\n        codec_adc_ch_map |= AUD_CHANNEL_MAP_CH2;\n        mic_map &= ~ANC_FB_MIC_CH_L;\n        ch_idx = get_msb_pos(ANC_FB_MIC_CH_L);\n        if (ANC_FB_MIC_CH_L & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n          ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n          codec->REG_0A8 =\n              SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH2, ch_idx);\n          codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH2;\n        } else {\n          codec->REG_08C =\n              SET_BITFIELD(codec->REG_08C, CODEC_CODEC_ADC_IN_SEL_CH2, ch_idx);\n          codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH2;\n        }\n      } else if (ANC_FB_MIC_CH_L & AUD_CHANNEL_MAP_ALL) {\n        reserv_map |= AUD_CHANNEL_MAP_CH2;\n      }\n      if (mic_map & ANC_FB_MIC_CH_R) {\n        codec_adc_ch_map |= AUD_CHANNEL_MAP_CH3;\n        mic_map &= ~ANC_FB_MIC_CH_R;\n        ch_idx = get_msb_pos(ANC_FB_MIC_CH_R);\n        if (ANC_FB_MIC_CH_R & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n          ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n          codec->REG_0A8 =\n              SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH3, ch_idx);\n          codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH3;\n        } else {\n          codec->REG_090 =\n              SET_BITFIELD(codec->REG_090, CODEC_CODEC_ADC_IN_SEL_CH3, ch_idx);\n          codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH3;\n        }\n      } else if (ANC_FB_MIC_CH_R & AUD_CHANNEL_MAP_ALL) {\n        reserv_map |= AUD_CHANNEL_MAP_CH3;\n      }\n#if defined(SIDETONE_ENABLE) && !defined(SIDETONE_DEDICATED_ADC_CHAN)\n      if (CFG_HW_AUD_SIDETONE_MIC_DEV == ANC_FB_MIC_CH_L) {\n        hal_codec_set_sidetone_adc_chan(AUD_CHANNEL_MAP_CH2);\n      }\n#ifdef ANC_PROD_TEST\n      if (CFG_HW_AUD_SIDETONE_MIC_DEV == ANC_FB_MIC_CH_R) {\n        ASSERT(false, \"SIDETONE MIC cannot be ANC_FB_MIC_CH_R: 0x%X\",\n               ANC_FB_MIC_CH_R);\n      }\n#elif (CFG_HW_AUD_SIDETONE_MIC_DEV == ANC_FB_MIC_CH_R)\n#error \"SIDETONE MIC cannot be ANC_FB_MIC_CH_R\"\n#endif\n#endif\n#endif\n#endif // ANC_APP\n\n#ifdef CODEC_DSD\n      reserv_map |= AUD_CHANNEL_MAP_CH2 | AUD_CHANNEL_MAP_CH3;\n#endif\n\n      if (mic_map & AUD_CHANNEL_MAP_CH4) {\n        codec_adc_ch_map |= AUD_CHANNEL_MAP_CH4;\n        mic_map &= ~AUD_CHANNEL_MAP_CH4;\n        codec->REG_094 =\n            SET_BITFIELD(codec->REG_094, CODEC_CODEC_ADC_IN_SEL_CH4, 4);\n        codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH4;\n#if defined(SIDETONE_ENABLE) && !defined(SIDETONE_DEDICATED_ADC_CHAN)\n        if (CFG_HW_AUD_SIDETONE_MIC_DEV == AUD_CHANNEL_MAP_CH4) {\n          hal_codec_set_sidetone_adc_chan(AUD_CHANNEL_MAP_CH4);\n        }\n#endif\n      }\n      if (mic_map & AUD_CHANNEL_MAP_ECMIC_CH0) {\n        codec_adc_ch_map |= AUD_CHANNEL_MAP_CH5;\n        mic_map &= ~AUD_CHANNEL_MAP_ECMIC_CH0;\n        codec->REG_228 &= ~CODEC_CODEC_MC_SEL_CH0;\n      }\n      if (mic_map & AUD_CHANNEL_MAP_ECMIC_CH1) {\n        codec_adc_ch_map |= AUD_CHANNEL_MAP_CH6;\n        mic_map &= ~AUD_CHANNEL_MAP_ECMIC_CH1;\n        codec->REG_228 |= CODEC_CODEC_MC_SEL_CH1;\n      }\n\n      reserv_map |= codec_adc_ch_map;\n\n#ifdef CODEC_MIN_PHASE\n      if (min_phase_cfg & (1 << AUD_STREAM_CAPTURE)) {\n        if (mic_map && (reserv_map & AUD_CHANNEL_MAP_CH2) == 0) {\n          codec_adc_ch_map |= AUD_CHANNEL_MAP_CH2;\n          reserv_map |= codec_adc_ch_map;\n          ch_idx = get_lsb_pos(mic_map);\n          mic_map &= ~(1 << ch_idx);\n          if ((1 << ch_idx) & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n            ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n            codec->REG_0A8 =\n                SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH2, ch_idx);\n            codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH2;\n          } else {\n            codec->REG_08C = SET_BITFIELD(codec->REG_08C,\n                                          CODEC_CODEC_ADC_IN_SEL_CH2, ch_idx);\n            codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH2;\n          }\n        }\n        if (mic_map && (reserv_map & AUD_CHANNEL_MAP_CH3) == 0) {\n          codec_adc_ch_map |= AUD_CHANNEL_MAP_CH3;\n          reserv_map |= codec_adc_ch_map;\n          ch_idx = get_lsb_pos(mic_map);\n          mic_map &= ~(1 << ch_idx);\n          if ((1 << ch_idx) & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n            ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n            codec->REG_0A8 =\n                SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH3, ch_idx);\n            codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH3;\n          } else {\n            codec->REG_090 = SET_BITFIELD(codec->REG_090,\n                                          CODEC_CODEC_ADC_IN_SEL_CH3, ch_idx);\n            codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH3;\n          }\n        }\n      }\n#endif\n\n#ifdef SIDETONE_ENABLE\n#if defined(SIDETONE_DEDICATED_ADC_CHAN) || defined(SIDETONE_RESERVED_ADC_CHAN)\n      if (mic_map & CFG_HW_AUD_SIDETONE_MIC_DEV) {\n        enum AUD_CHANNEL_MAP_T st_map = 0;\n\n        // Alloc sidetone adc chan\n        if ((reserv_map & AUD_CHANNEL_MAP_CH0) == 0) {\n          st_map = AUD_CHANNEL_MAP_CH0;\n        } else if ((reserv_map & AUD_CHANNEL_MAP_CH2) == 0) {\n          st_map = AUD_CHANNEL_MAP_CH2;\n        } else if ((reserv_map & AUD_CHANNEL_MAP_CH4) == 0) {\n          st_map = AUD_CHANNEL_MAP_CH4;\n        } else {\n          ASSERT(false,\n                 \"%s: Cannot alloc dedicated sidetone adc: reserv_map=0x%X\",\n                 __func__, reserv_map);\n        }\n        // Associate mic and sidetone adc\n        hal_codec_set_sidetone_adc_chan(st_map);\n        ch_idx = get_lsb_pos(CFG_HW_AUD_SIDETONE_MIC_DEV);\n        i = get_lsb_pos(st_map);\n        if ((1 << ch_idx) & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n          ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n          codec->REG_0A8 =\n              (codec->REG_0A8 & ~(CODEC_CODEC_PDM_MUX_CH0_MASK << (3 * i))) |\n              (CODEC_CODEC_PDM_MUX_CH0(ch_idx) << (3 * i));\n          codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH0 << i;\n        } else {\n          *(&codec->REG_084 + i) = SET_BITFIELD(\n              *(&codec->REG_084 + i), CODEC_CODEC_ADC_IN_SEL_CH0, ch_idx);\n          codec->REG_0A4 &= ~(CODEC_CODEC_PDM_ADC_SEL_CH0 << i);\n        }\n#ifdef SIDETONE_DEDICATED_ADC_CHAN\n        sidetone_adc_ch_map = st_map;\n#else\n        mic_map &= ~(1 << ch_idx);\n        codec_adc_ch_map |= st_map;\n#endif\n        // Mark sidetone adc as used\n        reserv_map |= st_map;\n      }\n#endif\n#endif\n\n      i = 0;\n      while (mic_map && i < NORMAL_ADC_CH_NUM) {\n        ASSERT(i < MAX_ANA_MIC_CH_NUM || (mic_map & AUD_CHANNEL_MAP_DIGMIC_ALL),\n               \"%s: Not enough ana cap chan: mic_map=0x%X adc_map=0x%X \"\n               \"reserv_map=0x%X\",\n               __func__, mic_map, codec_adc_ch_map, reserv_map);\n        ch_idx = get_lsb_pos(mic_map);\n        mic_map &= ~(1 << ch_idx);\n        while ((reserv_map & (AUD_CHANNEL_MAP_CH0 << i)) &&\n               i < NORMAL_ADC_CH_NUM) {\n          i++;\n        }\n#if defined(SIDETONE_ENABLE) && !(defined(SIDETONE_DEDICATED_ADC_CHAN) ||      \\\n                                  defined(SIDETONE_RESERVED_ADC_CHAN))\n        if (CFG_HW_AUD_SIDETONE_MIC_DEV == (1 << ch_idx)) {\n          if ((reserv_map & AUD_CHANNEL_MAP_CH0) == 0) {\n            i = 0;\n          } else if ((reserv_map & AUD_CHANNEL_MAP_CH2) == 0) {\n            i = 2;\n          } else if ((reserv_map & AUD_CHANNEL_MAP_CH4) == 0) {\n            i = 4;\n          } else {\n            ASSERT(false,\n                   \"%s: No sidetone adc: reserv_map=0x%X. Try \"\n                   \"SIDETONE_RESERVED_ADC_CHAN\",\n                   __func__, reserv_map);\n          }\n          hal_codec_set_sidetone_adc_chan((1 << i));\n        }\n#endif\n        if (i < NORMAL_ADC_CH_NUM) {\n          codec_adc_ch_map |= (AUD_CHANNEL_MAP_CH0 << i);\n          reserv_map |= codec_adc_ch_map;\n          if ((1 << ch_idx) & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n            ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n            codec->REG_0A8 =\n                (codec->REG_0A8 & ~(CODEC_CODEC_PDM_MUX_CH0_MASK << (3 * i))) |\n                (CODEC_CODEC_PDM_MUX_CH0(ch_idx) << (3 * i));\n            codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH0 << i;\n          } else {\n            *(&codec->REG_084 + i) = SET_BITFIELD(\n                *(&codec->REG_084 + i), CODEC_CODEC_ADC_IN_SEL_CH0, ch_idx);\n            codec->REG_0A4 &= ~(CODEC_CODEC_PDM_ADC_SEL_CH0 << i);\n          }\n          i++;\n        }\n      }\n\n#if defined(SIDETONE_ENABLE) && !(defined(SIDETONE_DEDICATED_ADC_CHAN) ||      \\\n                                  defined(SIDETONE_RESERVED_ADC_CHAN))\n      if (mic_map) {\n        if (reserv_map + 1 < (1 << NORMAL_ADC_CH_NUM)) {\n          ASSERT(false,\n                 \"%s: No adc due to sidetone mic_map=0x%X reserv_map=0x%X. Try \"\n                 \"SIDETONE_RESERVED_ADC_CHAN\",\n                 __func__, mic_map, reserv_map);\n        }\n      }\n#endif\n      ASSERT(mic_map == 0, \"%s: Bad cap chan map: 0x%X reserv_map=0x%X\",\n             __func__, mic_map, reserv_map);\n    }\n\n    if (HAL_CODEC_CONFIG_BITS & cfg->set_flag) {\n      cfg_set_mask = 0;\n      cfg_clr_mask = CODEC_MODE_16BIT_ADC_CH0 | CODEC_MODE_16BIT_ADC_CH1 |\n                     CODEC_MODE_16BIT_ADC_CH2 | CODEC_MODE_16BIT_ADC_CH3 |\n                     CODEC_MODE_16BIT_ADC_CH4 | CODEC_MODE_16BIT_ADC_CH5 |\n                     CODEC_MODE_16BIT_ADC_CH6 | CODEC_MODE_24BIT_ADC |\n                     CODEC_MODE_32BIT_ADC;\n      if (cfg->bits == AUD_BITS_16) {\n        cfg_set_mask |= CODEC_MODE_16BIT_ADC_CH0 | CODEC_MODE_16BIT_ADC_CH1 |\n                        CODEC_MODE_16BIT_ADC_CH2 | CODEC_MODE_16BIT_ADC_CH3 |\n                        CODEC_MODE_16BIT_ADC_CH4 | CODEC_MODE_16BIT_ADC_CH5 |\n                        CODEC_MODE_16BIT_ADC_CH6;\n      } else if (cfg->bits == AUD_BITS_24) {\n        cfg_set_mask |= CODEC_MODE_24BIT_ADC;\n      } else if (cfg->bits == AUD_BITS_32) {\n        cfg_set_mask |= CODEC_MODE_32BIT_ADC;\n      } else {\n        ASSERT(false, \"%s: Bad cap bits: %d\", __func__, cfg->bits);\n      }\n#ifdef VOICE_DETECTOR_EN\n      for (int i = 0; i < MAX_ADC_CH_NUM; i++) {\n        adc_channel_en |= (CODEC_ADC_ENABLE_CH0 << i);\n      }\n\n      if (((codec->REG_000 & adc_channel_en) != 0) &&\n          ((codec->REG_040 & cfg_set_mask) == 0)) {\n        ASSERT(false, \"%s: Cap bits conflict: %d\", __func__, cfg->bits);\n      } else\n#endif\n        codec->REG_040 = (codec->REG_040 & ~cfg_clr_mask) | cfg_set_mask;\n    }\n\n    cnt = 0;\n    for (i = 0; i < MAX_ADC_CH_NUM; i++) {\n      if (codec_adc_ch_map & (AUD_CHANNEL_MAP_CH0 << i)) {\n        cnt++;\n      }\n    }\n    ASSERT(cnt == cfg->channel_num,\n           \"%s: Invalid capture stream chan cfg: map=0x%X num=%u\", __func__,\n           codec_adc_ch_map, cfg->channel_num);\n\n    if (HAL_CODEC_CONFIG_SAMPLE_RATE & cfg->set_flag) {\n      sample_rate = cfg->sample_rate;\n\n      for (i = 0; i < ARRAY_SIZE(codec_adc_sample_rate); i++) {\n        if (codec_adc_sample_rate[i].sample_rate == sample_rate) {\n          break;\n        }\n      }\n      ASSERT(i < ARRAY_SIZE(codec_adc_sample_rate),\n             \"%s: Invalid capture sample rate: %d\", __func__, sample_rate);\n      rate_idx = i;\n      ana_dig_div = codec_adc_sample_rate[rate_idx].codec_div /\n                    codec_adc_sample_rate[rate_idx].cmu_div;\n      ASSERT(ana_dig_div * codec_adc_sample_rate[rate_idx].cmu_div ==\n                 codec_adc_sample_rate[rate_idx].codec_div,\n             \"%s: Invalid catpure div for rate %u: codec_div=%u cmu_div=%u\",\n             __func__, sample_rate, codec_adc_sample_rate[rate_idx].codec_div,\n             codec_adc_sample_rate[rate_idx].cmu_div);\n\n      TRACE(2, \"[%s] capture sample_rate=%d\", __func__, sample_rate);\n\n#ifdef CODEC_TIMER\n      cur_codec_freq = codec_adc_sample_rate[rate_idx].codec_freq;\n#endif\n\n      codec_rate_idx[AUD_STREAM_CAPTURE] = rate_idx;\n\n      if (codec_adc_ch_map & EC_ADC_MAP) {\n        // If EC enabled, init resample-adc-ch0 to adc0\n        codec->REG_0E4 =\n            SET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_ADC_CH0_SEL, 0);\n      }\n\n      uint32_t normal_chan_num;\n\n      normal_chan_num = cfg->channel_num;\n      if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH5) {\n        normal_chan_num--;\n      }\n      if (codec_adc_ch_map & AUD_CHANNEL_MAP_CH6) {\n        normal_chan_num--;\n      }\n\n#ifdef __AUDIO_RESAMPLE__\n      uint32_t mask, val;\n\n      if (hal_cmu_get_audio_resample_status() &&\n          codec_adc_sample_rate[rate_idx].codec_freq != CODEC_FREQ_CRYSTAL) {\n        ASSERT(normal_chan_num <= AUD_CHANNEL_NUM_2,\n               \"%s: Invalid capture resample chan num: %d/%d map=0x%X\",\n               __func__, normal_chan_num, cfg->channel_num, cfg->channel_map);\n#ifdef CODEC_TIMER\n        cur_codec_freq = CODEC_FREQ_CRYSTAL;\n#endif\n        if ((codec->REG_0E4 & CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE) == 0 ||\n            resample_rate_idx[AUD_STREAM_CAPTURE] != rate_idx) {\n          resample_rate_idx[AUD_STREAM_CAPTURE] = rate_idx;\n          codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n          hal_codec_reg_update_delay();\n          codec->REG_0F8 =\n              resample_phase_float_to_value(get_capture_resample_phase());\n          hal_codec_reg_update_delay();\n          codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n        }\n\n        mask = CODEC_CODEC_RESAMPLE_ADC_DUAL_CH |\n               CODEC_CODEC_RESAMPLE_ADC_CH0_SEL_MASK |\n               CODEC_CODEC_RESAMPLE_ADC_CH1_SEL_MASK;\n        val = 0;\n        cnt = 0;\n        for (i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n          if (codec_adc_ch_map & (AUD_CHANNEL_MAP_CH0 << i)) {\n            if (cnt == 0) {\n              val |= CODEC_CODEC_RESAMPLE_ADC_CH0_SEL(i);\n            } else {\n              val |= CODEC_CODEC_RESAMPLE_ADC_CH1_SEL(i);\n            }\n            cnt++;\n          }\n        }\n        if (normal_chan_num == AUD_CHANNEL_NUM_2) {\n          val |= CODEC_CODEC_RESAMPLE_ADC_DUAL_CH;\n        }\n      } else {\n        mask = CODEC_CODEC_RESAMPLE_ADC_DUAL_CH |\n               CODEC_CODEC_RESAMPLE_ADC_CH0_SEL_MASK |\n               CODEC_CODEC_RESAMPLE_ADC_CH1_SEL_MASK |\n               CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n        val = 0;\n      }\n      codec->REG_0E4 = (codec->REG_0E4 & ~mask) | val;\n#endif\n\n      // Echo cancel channels will check the enable signal of resample ADC CH0,\n      // even when resample is disabled\n      if (codec_adc_ch_map & EC_ADC_MAP) {\n        if (normal_chan_num &&\n            (codec->REG_0E4 & CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE) == 0) {\n          for (i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n            if (codec_adc_ch_map & (AUD_CHANNEL_MAP_CH0 << i)) {\n              codec->REG_0E4 = SET_BITFIELD(\n                  codec->REG_0E4, CODEC_CODEC_RESAMPLE_ADC_CH0_SEL, i);\n              break;\n            }\n          }\n        }\n      }\n\n#ifdef __AUDIO_RESAMPLE__\n      if (!hal_cmu_get_audio_resample_status())\n#endif\n      {\n#ifdef __AUDIO_RESAMPLE__\n        ASSERT(codec_adc_sample_rate[rate_idx].codec_freq != CODEC_FREQ_CRYSTAL,\n               \"%s: capture sample rate %u is for resample only\", __func__,\n               sample_rate);\n#endif\n        analog_aud_freq_pll_config(codec_adc_sample_rate[rate_idx].codec_freq,\n                                   codec_adc_sample_rate[rate_idx].codec_div);\n        hal_cmu_codec_adc_set_div(codec_adc_sample_rate[rate_idx].cmu_div *\n                                  CODEC_FREQ_EXTRA_DIV);\n      }\n      hal_codec_set_adc_down(codec_adc_ch_map,\n                             codec_adc_sample_rate[rate_idx].adc_down);\n      hal_codec_set_adc_hbf_bypass_cnt(\n          codec_adc_ch_map, codec_adc_sample_rate[rate_idx].bypass_cnt);\n    }\n\n#if !(defined(FIXED_CODEC_ADC_VOL) && defined(SINGLE_CODEC_ADC_VOL))\n    if (HAL_CODEC_CONFIG_VOL & cfg->set_flag) {\n#ifdef SINGLE_CODEC_ADC_VOL\n      const CODEC_ADC_VOL_T *adc_gain_db;\n      adc_gain_db = hal_codec_get_adc_volume(cfg->vol);\n      if (adc_gain_db) {\n        hal_codec_set_dig_adc_gain(NORMAL_ADC_MAP, *adc_gain_db);\n#ifdef SIDETONE_DEDICATED_ADC_CHAN\n        sidetone_adc_gain = *adc_gain_db;\n        hal_codec_set_dig_adc_gain(sidetone_adc_ch_map,\n                                   sidetone_adc_gain + sidetone_gain_offset);\n#endif\n      }\n#else // !SINGLE_CODEC_ADC_VOL\n      uint32_t vol;\n\n      mic_map = codec_mic_ch_map;\n      while (mic_map) {\n        ch_idx = get_lsb_pos(mic_map);\n        mic_map &= ~(1 << ch_idx);\n        vol = hal_codec_get_mic_chan_volume_level(1 << ch_idx);\n        hal_codec_set_chan_vol(AUD_STREAM_CAPTURE, (1 << ch_idx), vol);\n      }\n#ifdef SIDETONE_DEDICATED_ADC_CHAN\n      if (codec_mic_ch_map & CFG_HW_AUD_SIDETONE_MIC_DEV) {\n        const CODEC_ADC_VOL_T *adc_gain_db;\n\n        vol = hal_codec_get_mic_chan_volume_level(CFG_HW_AUD_SIDETONE_MIC_DEV);\n        adc_gain_db = hal_codec_get_adc_volume(vol);\n        if (adc_gain_db) {\n          sidetone_adc_gain = *adc_gain_db;\n          hal_codec_set_dig_adc_gain(sidetone_adc_ch_map,\n                                     sidetone_adc_gain + sidetone_gain_offset);\n        }\n      }\n#endif\n#endif // !SINGLE_CODEC_ADC_VOL\n    }\n#endif\n  }\n\n  return 0;\n}\n\nint hal_codec_anc_adc_enable(enum ANC_TYPE_T type) {\n#ifdef ANC_APP\n  enum AUD_CHANNEL_MAP_T map;\n  enum AUD_CHANNEL_MAP_T mic_map;\n  uint8_t ch_idx;\n\n  map = 0;\n  mic_map = 0;\n  if (type == ANC_FEEDFORWARD) {\n#if defined(ANC_FF_MIC_CH_L) || defined(ANC_FF_MIC_CH_R)\n    if (ANC_FF_MIC_CH_L) {\n      ch_idx = get_msb_pos(ANC_FF_MIC_CH_L);\n      if (ANC_FF_MIC_CH_L & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n        ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n        codec->REG_0A8 =\n            SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH0, ch_idx);\n        codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH0;\n      } else {\n        codec->REG_084 =\n            SET_BITFIELD(codec->REG_084, CODEC_CODEC_ADC_IN_SEL_CH0, ch_idx);\n        codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH0;\n      }\n      map |= AUD_CHANNEL_MAP_CH0;\n      mic_map |= ANC_FF_MIC_CH_L;\n    }\n    if (ANC_FF_MIC_CH_R) {\n      ch_idx = get_msb_pos(ANC_FF_MIC_CH_R);\n      if (ANC_FF_MIC_CH_R & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n        ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n        codec->REG_0A8 =\n            SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH1, ch_idx);\n        codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH1;\n      } else {\n        codec->REG_088 =\n            SET_BITFIELD(codec->REG_088, CODEC_CODEC_ADC_IN_SEL_CH1, ch_idx);\n        codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH1;\n      }\n      map |= AUD_CHANNEL_MAP_CH1;\n      mic_map |= ANC_FF_MIC_CH_R;\n    }\n#else\n    ASSERT(false, \"No ana adc ff ch defined\");\n#endif\n  } else if (type == ANC_FEEDBACK) {\n#if defined(ANC_FB_MIC_CH_L) || defined(ANC_FB_MIC_CH_R)\n    if (ANC_FB_MIC_CH_L) {\n      ch_idx = get_msb_pos(ANC_FB_MIC_CH_L);\n      if (ANC_FB_MIC_CH_L & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n        ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n        codec->REG_0A8 =\n            SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH2, ch_idx);\n        codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH2;\n      } else {\n        codec->REG_08C =\n            SET_BITFIELD(codec->REG_08C, CODEC_CODEC_ADC_IN_SEL_CH2, ch_idx);\n        codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH2;\n      }\n      map |= AUD_CHANNEL_MAP_CH2;\n      mic_map |= ANC_FB_MIC_CH_L;\n    }\n    if (ANC_FB_MIC_CH_R) {\n      ch_idx = get_msb_pos(ANC_FB_MIC_CH_R);\n      if (ANC_FB_MIC_CH_R & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n        ch_idx = hal_codec_get_digmic_hw_index(ch_idx);\n        codec->REG_0A8 =\n            SET_BITFIELD(codec->REG_0A8, CODEC_CODEC_PDM_MUX_CH3, ch_idx);\n        codec->REG_0A4 |= CODEC_CODEC_PDM_ADC_SEL_CH3;\n      } else {\n        codec->REG_090 =\n            SET_BITFIELD(codec->REG_090, CODEC_CODEC_ADC_IN_SEL_CH3, ch_idx);\n        codec->REG_0A4 &= ~CODEC_CODEC_PDM_ADC_SEL_CH3;\n      }\n      map |= AUD_CHANNEL_MAP_CH3;\n      mic_map |= ANC_FB_MIC_CH_R;\n    }\n#else\n    ASSERT(false, \"No ana adc fb ch defined\");\n#endif\n  }\n  anc_adc_ch_map |= map;\n  anc_mic_ch_map |= mic_map;\n\n  if (anc_mic_ch_map & AUD_CHANNEL_MAP_DIGMIC_ALL) {\n    hal_codec_enable_dig_mic(anc_mic_ch_map);\n  }\n\n  for (int i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    if (map & (AUD_CHANNEL_MAP_CH0 << i)) {\n      if ((codec->REG_080 & (CODEC_CODEC_ADC_EN_CH0 << i)) == 0) {\n        // Reset ADC channel\n        codec->REG_064 &= ~CODEC_SOFT_RSTN_ADC(1 << i);\n        codec->REG_064 |= CODEC_SOFT_RSTN_ADC(1 << i);\n        codec->REG_080 |= (CODEC_CODEC_ADC_EN_CH0 << i);\n      }\n    }\n  }\n\n#ifdef DAC_DRE_ENABLE\n  if (anc_adc_ch_map && (codec->REG_098 & CODEC_CODEC_DAC_EN)) {\n    hal_codec_dac_dre_disable();\n  }\n#endif\n#endif\n\n  return 0;\n}\n\nint hal_codec_anc_adc_disable(enum ANC_TYPE_T type) {\n#ifdef ANC_APP\n  enum AUD_CHANNEL_MAP_T map;\n  enum AUD_CHANNEL_MAP_T mic_map;\n\n  map = 0;\n  mic_map = 0;\n  if (type == ANC_FEEDFORWARD) {\n#if defined(ANC_FF_MIC_CH_L) || defined(ANC_FF_MIC_CH_R)\n    if (ANC_FF_MIC_CH_L) {\n      map |= AUD_CHANNEL_MAP_CH0;\n      mic_map |= ANC_FF_MIC_CH_L;\n    }\n    if (ANC_FF_MIC_CH_R) {\n      map |= AUD_CHANNEL_MAP_CH1;\n      mic_map |= ANC_FF_MIC_CH_R;\n    }\n#endif\n  } else if (type == ANC_FEEDBACK) {\n#if defined(ANC_FB_MIC_CH_L) || defined(ANC_FB_MIC_CH_R)\n    if (ANC_FB_MIC_CH_L) {\n      map |= AUD_CHANNEL_MAP_CH2;\n      mic_map |= ANC_FB_MIC_CH_L;\n    }\n    if (ANC_FB_MIC_CH_R) {\n      map |= AUD_CHANNEL_MAP_CH3;\n      mic_map |= ANC_FB_MIC_CH_R;\n    }\n#endif\n  }\n  anc_adc_ch_map &= ~map;\n  anc_mic_ch_map &= ~mic_map;\n\n  if ((anc_mic_ch_map & AUD_CHANNEL_MAP_DIGMIC_ALL) == 0 &&\n      ((codec_mic_ch_map & AUD_CHANNEL_MAP_DIGMIC_ALL) == 0 ||\n       (codec->REG_000 & CODEC_ADC_ENABLE) == 0)) {\n    hal_codec_disable_dig_mic();\n  }\n\n  for (int i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    if ((map & (AUD_CHANNEL_MAP_CH0 << i)) == 0) {\n      continue;\n    }\n    if (codec->REG_000 & CODEC_ADC_ENABLE) {\n      if (codec_adc_ch_map & (AUD_CHANNEL_MAP_CH0 << i)) {\n        continue;\n      }\n      if (i == 0 &&\n          (codec->REG_228 &\n           (CODEC_CODEC_MC_ENABLE_CH0 | CODEC_CODEC_MC_ENABLE_CH1)) &&\n          (codec_adc_ch_map & ~EC_ADC_MAP) == 0) {\n        continue;\n      }\n    }\n    codec->REG_080 &= ~(CODEC_CODEC_ADC_EN_CH0 << i);\n  }\n\n#ifdef DAC_DRE_ENABLE\n  if (anc_adc_ch_map == 0 && (codec->REG_098 & CODEC_CODEC_DAC_EN) &&\n      //(codec->REG_044 & CODEC_MODE_16BIT_DAC) == 0 &&\n      1) {\n    hal_codec_dac_dre_enable();\n  }\n#endif\n#endif\n\n  return 0;\n}\n\nenum AUD_SAMPRATE_T hal_codec_anc_convert_rate(enum AUD_SAMPRATE_T rate) {\n  if (hal_cmu_get_audio_resample_status()) {\n    return AUD_SAMPRATE_50781;\n  } else if (CODEC_FREQ_48K_SERIES / rate * rate == CODEC_FREQ_48K_SERIES) {\n    return AUD_SAMPRATE_48000;\n  } else /* if (CODEC_FREQ_44_1K_SERIES / rate * rate ==\n            CODEC_FREQ_44_1K_SERIES) */\n  {\n    return AUD_SAMPRATE_44100;\n  }\n}\n\nint hal_codec_anc_dma_enable(enum HAL_CODEC_ID_T id) { return 0; }\n\nint hal_codec_anc_dma_disable(enum HAL_CODEC_ID_T id) { return 0; }\n\nint hal_codec_aux_mic_dma_enable(enum HAL_CODEC_ID_T id) { return 0; }\n\nint hal_codec_aux_mic_dma_disable(enum HAL_CODEC_ID_T id) { return 0; }\n\nuint32_t hal_codec_get_alg_dac_shift(void) { return 0; }\n\n#ifdef ANC_APP\nvoid hal_codec_set_anc_boost_gain_attn(float attn) {\n  anc_boost_gain_attn = attn;\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n  hal_codec_set_sw_gain(swdac_gain);\n#else\n  hal_codec_restore_dig_dac_gain();\n#endif\n  hal_codec_restore_dig_adc_gain();\n}\n\nvoid hal_codec_apply_anc_adc_gain_offset(enum ANC_TYPE_T type, int8_t offset_l,\n                                         int8_t offset_r) {\n  enum AUD_CHANNEL_MAP_T map_l, map_r;\n  enum AUD_CHANNEL_MAP_T ch_map;\n  uint8_t ch_idx;\n\n  if (analog_debug_get_anc_calib_mode()) {\n    return;\n  }\n\n  map_l = 0;\n  map_r = 0;\n\n#if defined(ANC_FF_MIC_CH_L) || defined(ANC_FF_MIC_CH_R)\n  if (type & ANC_FEEDFORWARD) {\n    if (ANC_FF_MIC_CH_L) {\n      map_l |= AUD_CHANNEL_MAP_CH0;\n    }\n    if (ANC_FF_MIC_CH_R) {\n      map_r |= AUD_CHANNEL_MAP_CH1;\n    }\n  }\n#endif\n#if defined(ANC_FB_MIC_CH_L) || defined(ANC_FB_MIC_CH_R)\n  if (type & ANC_FEEDBACK) {\n    if (ANC_FB_MIC_CH_L) {\n      map_l |= AUD_CHANNEL_MAP_CH2;\n    }\n    if (ANC_FB_MIC_CH_R) {\n      map_r |= AUD_CHANNEL_MAP_CH3;\n    }\n  }\n#endif\n\n  if (map_l) {\n    ch_map = map_l;\n    while (ch_map) {\n      ch_idx = get_msb_pos(ch_map);\n      ch_map &= ~(1 << ch_idx);\n      anc_adc_gain_offset[ch_idx] = offset_l;\n    }\n    if (offset_l) {\n      anc_adc_gain_offset_map |= map_l;\n    } else {\n      anc_adc_gain_offset_map &= ~map_l;\n    }\n  }\n  if (map_r) {\n    ch_map = map_r;\n    while (ch_map) {\n      ch_idx = get_msb_pos(ch_map);\n      ch_map &= ~(1 << ch_idx);\n      anc_adc_gain_offset[ch_idx] = offset_r;\n    }\n    if (offset_r) {\n      anc_adc_gain_offset_map |= map_r;\n    } else {\n      anc_adc_gain_offset_map &= ~map_r;\n    }\n  }\n  if (map_l || map_r) {\n    hal_codec_restore_dig_adc_gain();\n  }\n}\n#endif\n\n#ifdef AUDIO_OUTPUT_DC_CALIB\nvoid hal_codec_set_dac_dc_gain_attn(float attn) { dac_dc_gain_attn = attn; }\n\nvoid hal_codec_set_dac_dc_offset(int16_t dc_l, int16_t dc_r) {\n  // DC calib values are based on 16-bit, but hardware compensation is based on\n  // 24-bit\n  dac_dc_l = dc_l << 8;\n  dac_dc_r = dc_r << 8;\n#ifdef SDM_MUTE_NOISE_SUPPRESSION\n  if (dac_dc_l == 0) {\n    dac_dc_l = 1;\n  }\n  if (dac_dc_r == 0) {\n    dac_dc_r = 1;\n  }\n#endif\n}\n#endif\n\nvoid hal_codec_set_dac_reset_callback(HAL_CODEC_DAC_RESET_CALLBACK callback) {\n  // dac_reset_callback = callback;\n}\n\nstatic uint32_t POSSIBLY_UNUSED\nhal_codec_get_adc_chan(enum AUD_CHANNEL_MAP_T mic_map) {\n  uint8_t adc_ch;\n  uint8_t mic_ch;\n  uint8_t digmic_ch0;\n  uint8_t en_ch;\n  bool digmic;\n  int i;\n\n  adc_ch = MAX_ADC_CH_NUM;\n\n  mic_ch = get_lsb_pos(mic_map);\n\n  if (((1 << mic_ch) & codec_mic_ch_map) == 0) {\n    return adc_ch;\n  }\n\n  digmic_ch0 = get_lsb_pos(AUD_CHANNEL_MAP_DIGMIC_CH0);\n\n  if (mic_ch >= digmic_ch0) {\n    mic_ch -= digmic_ch0;\n    digmic = true;\n  } else {\n    digmic = false;\n  }\n\n  for (i = 0; i < NORMAL_ADC_CH_NUM; i++) {\n    if (codec_adc_ch_map & (1 << i)) {\n      if (digmic ^ !!(codec->REG_0A4 & (CODEC_CODEC_PDM_ADC_SEL_CH0 << i))) {\n        continue;\n      }\n      if (digmic) {\n        en_ch = (codec->REG_0A8 & (CODEC_CODEC_PDM_MUX_CH0_MASK << (3 * i))) >>\n                (CODEC_CODEC_PDM_MUX_CH0_SHIFT + 3 * i);\n      } else {\n        en_ch =\n            GET_BITFIELD(*(&codec->REG_084 + i), CODEC_CODEC_ADC_IN_SEL_CH0);\n      }\n      if (mic_ch == en_ch) {\n        adc_ch = i;\n        break;\n      }\n    }\n  }\n\n  return adc_ch;\n}\n\nvoid hal_codec_sidetone_enable(void) {\n#ifdef SIDETONE_ENABLE\n#if (CFG_HW_AUD_SIDETONE_MIC_DEV & (CFG_HW_AUD_SIDETONE_MIC_DEV - 1))\n#error \"Invalid CFG_HW_AUD_SIDETONE_MIC_DEV: only 1 mic can be defined\"\n#endif\n#if (CFG_HW_AUD_SIDETONE_MIC_DEV == 0) ||                                      \\\n    (CFG_HW_AUD_SIDETONE_MIC_DEV & ~NORMAL_MIC_MAP)\n#error \"Invalid CFG_HW_AUD_SIDETONE_MIC_DEV: bad mic channel\"\n#endif\n  int gain = CFG_HW_AUD_SIDETONE_GAIN_DBVAL;\n  uint32_t val;\n\n#ifdef SIDETONE_DEDICATED_ADC_CHAN\n  sidetone_gain_offset = 0;\n  if (gain > MAX_SIDETONE_DBVAL) {\n    sidetone_gain_offset = gain - MAX_SIDETONE_DBVAL;\n  } else if (gain < MIN_SIDETONE_DBVAL) {\n    sidetone_gain_offset = gain - MIN_SIDETONE_DBVAL;\n  }\n#endif\n\n  if (gain > MAX_SIDETONE_DBVAL) {\n    gain = MAX_SIDETONE_DBVAL;\n  } else if (gain < MIN_SIDETONE_DBVAL) {\n    gain = MIN_SIDETONE_DBVAL;\n  }\n\n  val = MIN_SIDETONE_REGVAL + (gain - MIN_SIDETONE_DBVAL) / SIDETONE_DBVAL_STEP;\n\n  codec->REG_080 =\n      SET_BITFIELD(codec->REG_080, CODEC_CODEC_SIDE_TONE_GAIN, val);\n\n#ifdef SIDETONE_DEDICATED_ADC_CHAN\n  uint8_t adc_ch;\n\n  adc_ch = get_lsb_pos(sidetone_adc_ch_map);\n  if (adc_ch >= NORMAL_ADC_CH_NUM) {\n    return;\n  }\n\n  hal_codec_set_dig_adc_gain(sidetone_adc_ch_map,\n                             sidetone_adc_gain + sidetone_gain_offset);\n#ifdef CFG_HW_AUD_SIDETONE_GAIN_RAMP\n  hal_codec_get_adc_gain(sidetone_adc_ch_map, &sidetone_ded_chan_coef);\n  hal_codec_set_dig_adc_gain(sidetone_adc_ch_map, MIN_DIG_DBVAL);\n#endif\n  codec->REG_080 |= (CODEC_CODEC_ADC_EN_CH0 << adc_ch);\n\n#ifdef CFG_HW_AUD_SIDETONE_IIR_INDEX\n#if (CFG_HW_AUD_SIDETONE_IIR_INDEX >= ADC_IIR_CH_NUM + 0UL)\n#error \"Invalid CFG_HW_AUD_SIDETONE_IIR_INDEX\"\n#endif\n  uint32_t mask;\n\n  if (CFG_HW_AUD_SIDETONE_IIR_INDEX == 0) {\n    mask = CODEC_CODEC_ADC_IIR_CH0_SEL_MASK;\n    val = CODEC_CODEC_ADC_IIR_CH0_SEL(adc_ch);\n  } else {\n    mask = CODEC_CODEC_ADC_IIR_CH1_SEL_MASK;\n    val = CODEC_CODEC_ADC_IIR_CH1_SEL(adc_ch);\n  }\n  codec->REG_078 = (codec->REG_078 & ~mask) | val;\n#endif\n#endif\n#endif\n}\n\nvoid hal_codec_sidetone_disable(void) {\n#ifdef SIDETONE_ENABLE\n  codec->REG_080 = SET_BITFIELD(codec->REG_080, CODEC_CODEC_SIDE_TONE_GAIN,\n                                MUTE_SIDETONE_REGVAL);\n#ifdef SIDETONE_DEDICATED_ADC_CHAN\n  if (sidetone_adc_ch_map) {\n    uint8_t adc_ch;\n\n    adc_ch = get_lsb_pos(sidetone_adc_ch_map);\n    codec->REG_080 &= ~(CODEC_CODEC_ADC_EN_CH0 << adc_ch);\n  }\n#endif\n#endif\n}\n\nint hal_codec_sidetone_gain_ramp_up(float step) {\n  int ret = 0;\n#ifdef CFG_HW_AUD_SIDETONE_GAIN_RAMP\n  float coef;\n  uint32_t val;\n\n  hal_codec_get_adc_gain(sidetone_adc_ch_map, &coef);\n  coef += step;\n  if (coef >= sidetone_ded_chan_coef) {\n    coef = sidetone_ded_chan_coef;\n    ret = 1;\n  }\n  // Gain format: 8.12\n  int32_t s_val = (int32_t)(coef * (1 << 12));\n  val = __SSAT(s_val, 20);\n  hal_codec_set_adc_gain_value(sidetone_adc_ch_map, val);\n\n#endif\n  return ret;\n}\n\nint hal_codec_sidetone_gain_ramp_down(float step) {\n  int ret = 0;\n#ifdef CFG_HW_AUD_SIDETONE_GAIN_RAMP\n  float coef;\n  uint32_t val;\n\n  hal_codec_get_adc_gain(sidetone_adc_ch_map, &coef);\n  coef -= step;\n  if (coef <= 0) {\n    coef = 0;\n    ret = 1;\n  }\n\n  // Gain format: 8.12\n  int32_t s_val = (int32_t)(coef * (1 << 12));\n  val = __SSAT(s_val, 20);\n  hal_codec_set_adc_gain_value(sidetone_adc_ch_map, val);\n#endif\n  return ret;\n}\n\nvoid hal_codec_select_adc_iir_mic(uint32_t index,\n                                  enum AUD_CHANNEL_MAP_T mic_map) {\n  uint32_t mask, val;\n  uint8_t adc_ch;\n\n  ASSERT(index < ADC_IIR_CH_NUM, \"%s: Bad index=%u\", __func__, index);\n  ASSERT(mic_map && (mic_map & (mic_map - 1)) == 0, \"%s: Bad mic_map=0x%X\",\n         __func__, mic_map);\n#ifdef CFG_HW_AUD_SIDETONE_IIR_INDEX\n  ASSERT(index != CFG_HW_AUD_SIDETONE_IIR_INDEX,\n         \"%s: Adc iir index conflicts with sidetone\", __func__);\n#endif\n\n  adc_ch = hal_codec_get_adc_chan(mic_map);\n  if (index == 0) {\n    mask = CODEC_CODEC_ADC_IIR_CH0_SEL_MASK;\n    val = CODEC_CODEC_ADC_IIR_CH0_SEL(adc_ch);\n  } else {\n    mask = CODEC_CODEC_ADC_IIR_CH1_SEL_MASK;\n    val = CODEC_CODEC_ADC_IIR_CH1_SEL(adc_ch);\n  }\n  codec->REG_078 = (codec->REG_078 & ~mask) | val;\n}\n\nvoid hal_codec_min_phase_mode_enable(enum AUD_STREAM_T stream) {\n#ifdef CODEC_MIN_PHASE\n  if (min_phase_cfg == 0 && codec_opened) {\n    hal_codec_min_phase_init();\n  }\n\n  min_phase_cfg |= (1 << stream);\n#endif\n}\n\nvoid hal_codec_min_phase_mode_disable(enum AUD_STREAM_T stream) {\n#ifdef CODEC_MIN_PHASE\n  min_phase_cfg &= ~(1 << stream);\n\n  if (min_phase_cfg == 0 && codec_opened) {\n    hal_codec_min_phase_term();\n  }\n#endif\n}\n\nvoid hal_codec_sync_dac_enable(enum HAL_CODEC_SYNC_TYPE_T type) {\n#if defined(ANC_APP)\n  // hal_codec_sync_dac_resample_rate_enable(type);\n  codec->REG_054 = SET_BITFIELD(codec->REG_054, CODEC_DAC_ENABLE_SEL, type);\n#else\n  codec->REG_054 =\n      SET_BITFIELD(codec->REG_054, CODEC_CODEC_DAC_ENABLE_SEL, type);\n#endif\n}\n\nvoid hal_codec_sync_dac_disable(void) {\n#if defined(ANC_APP)\n  // hal_codec_sync_dac_resample_rate_disable();\n  codec->REG_054 = SET_BITFIELD(codec->REG_054, CODEC_DAC_ENABLE_SEL,\n                                HAL_CODEC_SYNC_TYPE_NONE);\n#else\n  codec->REG_054 = SET_BITFIELD(codec->REG_054, CODEC_CODEC_DAC_ENABLE_SEL,\n                                HAL_CODEC_SYNC_TYPE_NONE);\n#endif\n}\n\nvoid hal_codec_sync_adc_enable(enum HAL_CODEC_SYNC_TYPE_T type) {\n#if defined(ANC_APP)\n  // hal_codec_sync_adc_resample_rate_enable(type);\n  codec->REG_054 = SET_BITFIELD(codec->REG_054, CODEC_ADC_ENABLE_SEL, type);\n#else\n  codec->REG_054 =\n      SET_BITFIELD(codec->REG_054, CODEC_CODEC_ADC_ENABLE_SEL, type);\n#endif\n}\n\nvoid hal_codec_sync_adc_disable(void) {\n#if defined(ANC_APP)\n  // hal_codec_sync_adc_resample_rate_disable();\n  codec->REG_054 = SET_BITFIELD(codec->REG_054, CODEC_ADC_ENABLE_SEL,\n                                HAL_CODEC_SYNC_TYPE_NONE);\n#else\n  codec->REG_054 = SET_BITFIELD(codec->REG_054, CODEC_CODEC_ADC_ENABLE_SEL,\n                                HAL_CODEC_SYNC_TYPE_NONE);\n#endif\n}\n\nvoid hal_codec_sync_dac_resample_rate_enable(enum HAL_CODEC_SYNC_TYPE_T type) {\n  codec->REG_0E4 =\n      SET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_DAC_TRIGGER_SEL, type);\n}\n\nvoid hal_codec_sync_dac_resample_rate_disable(void) {\n  codec->REG_0E4 =\n      SET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_DAC_TRIGGER_SEL,\n                   HAL_CODEC_SYNC_TYPE_NONE);\n}\n\nvoid hal_codec_sync_adc_resample_rate_enable(enum HAL_CODEC_SYNC_TYPE_T type) {\n  codec->REG_0E4 =\n      SET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_ADC_TRIGGER_SEL, type);\n}\n\nvoid hal_codec_sync_adc_resample_rate_disable(void) {\n  codec->REG_0E4 =\n      SET_BITFIELD(codec->REG_0E4, CODEC_CODEC_RESAMPLE_ADC_TRIGGER_SEL,\n                   HAL_CODEC_SYNC_TYPE_NONE);\n}\n\nvoid hal_codec_sync_dac_gain_enable(enum HAL_CODEC_SYNC_TYPE_T type) {\n  codec->REG_09C =\n      SET_BITFIELD(codec->REG_09C, CODEC_CODEC_DAC_GAIN_TRIGGER_SEL, type);\n}\n\nvoid hal_codec_sync_dac_gain_disable(void) {\n  codec->REG_09C =\n      SET_BITFIELD(codec->REG_09C, CODEC_CODEC_DAC_GAIN_TRIGGER_SEL,\n                   HAL_CODEC_SYNC_TYPE_NONE);\n}\n\nvoid hal_codec_sync_adc_gain_enable(enum HAL_CODEC_SYNC_TYPE_T type) {}\n\nvoid hal_codec_sync_adc_gain_disable(void) {}\n\nvoid hal_codec_gpio_trigger_debounce_enable(void) {\n  if (codec_opened) {\n    codec->REG_054 |= CODEC_GPIO_TRIGGER_DB_ENABLE;\n  }\n}\n\nvoid hal_codec_gpio_trigger_debounce_disable(void) {\n  if (codec_opened) {\n    codec->REG_054 &= ~CODEC_GPIO_TRIGGER_DB_ENABLE;\n  }\n}\n\n#ifdef CODEC_TIMER\nuint32_t hal_codec_timer_get(void) {\n  if (codec_opened) {\n    return codec->REG_050;\n  }\n\n  return 0;\n}\n\nuint32_t hal_codec_timer_ticks_to_us(uint32_t ticks) {\n  uint32_t timer_freq;\n\n  timer_freq = cur_codec_freq / 4 / CODEC_FREQ_EXTRA_DIV;\n\n  return (uint32_t)((float)ticks * 1000000 / timer_freq);\n}\n\nvoid hal_codec_timer_trigger_read(void) {\n  if (codec_opened) {\n    codec->REG_078 ^= CODEC_GET_CNT_TRIG;\n    hal_codec_reg_update_delay();\n  }\n}\n#endif\n\n#ifdef AUDIO_OUTPUT_DC_CALIB_ANA\nint hal_codec_dac_sdm_reset_set(void) {\n  if (codec_opened) {\n    hal_codec_set_dac_gain_value(VALID_DAC_MAP, 0);\n    if (codec->REG_098 & CODEC_CODEC_DAC_EN) {\n      osDelay(dac_delay_ms);\n    }\n    for (int i = 0x200; i >= 0; i -= 0x100) {\n      hal_codec_dac_dc_offset_enable(i, i);\n      osDelay(1);\n    }\n    codec->REG_098 |= CODEC_CODEC_DAC_SDM_CLOSE;\n    osDelay(1);\n  }\n\n  return 0;\n}\n\nint hal_codec_dac_sdm_reset_clear(void) {\n  if (codec_opened) {\n    osDelay(1);\n    codec->REG_098 &= ~CODEC_CODEC_DAC_SDM_CLOSE;\n    for (int i = 0x100; i <= 0x300; i += 0x100) {\n      hal_codec_dac_dc_offset_enable(i, i);\n      osDelay(1);\n    }\n    hal_codec_restore_dig_dac_gain();\n  }\n\n  return 0;\n}\n#endif\n\nvoid hal_codec_tune_resample_rate(enum AUD_STREAM_T stream, float ratio) {\n#ifdef __AUDIO_RESAMPLE__\n  uint32_t val;\n\n  if (!codec_opened) {\n    return;\n  }\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    if (codec->REG_0E4 & CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE) {\n      codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n      hal_codec_reg_update_delay();\n      val = resample_phase_float_to_value(get_playback_resample_phase());\n      val += (int)(val * ratio);\n      codec->REG_0F4 = val;\n      hal_codec_reg_update_delay();\n      codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n    }\n  } else {\n    if (codec->REG_0E4 & CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE) {\n      codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n      hal_codec_reg_update_delay();\n      val = resample_phase_float_to_value(get_capture_resample_phase());\n      val -= (int)(val * ratio);\n      codec->REG_0F8 = val;\n      hal_codec_reg_update_delay();\n      codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n    }\n  }\n#endif\n}\n\nvoid hal_codec_tune_both_resample_rate(float ratio) {\n#ifdef __AUDIO_RESAMPLE__\n  bool update[2];\n  uint32_t val[2];\n  uint32_t lock;\n\n  if (!codec_opened) {\n    return;\n  }\n\n  update[0] = !!(codec->REG_0E4 & CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE);\n  update[1] = !!(codec->REG_0E4 & CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE);\n\n  val[0] = val[1] = 0;\n\n  if (update[0]) {\n    codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n    val[0] = resample_phase_float_to_value(get_playback_resample_phase());\n    val[0] += (int)(val[0] * ratio);\n  }\n  if (update[1]) {\n    codec->REG_0E4 &= ~CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n    val[1] = resample_phase_float_to_value(get_capture_resample_phase());\n    val[1] -= (int)(val[1] * ratio);\n  }\n\n  hal_codec_reg_update_delay();\n\n  if (update[0]) {\n    codec->REG_0F4 = val[0];\n  }\n  if (update[1]) {\n    codec->REG_0F8 = val[1];\n  }\n\n  hal_codec_reg_update_delay();\n\n  lock = int_lock();\n  if (update[0]) {\n    codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE;\n  }\n  if (update[1]) {\n    codec->REG_0E4 |= CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE;\n  }\n  int_unlock(lock);\n#endif\n}\n\nint hal_codec_select_clock_out(uint32_t cfg) {\n  uint32_t lock;\n  int ret = 1;\n\n  lock = int_lock();\n\n  if (codec_opened) {\n    codec->REG_060 = SET_BITFIELD(codec->REG_060, CODEC_CFG_CLK_OUT, cfg);\n    ret = 0;\n  }\n\n  int_unlock(lock);\n\n  return ret;\n}\n\n#ifdef AUDIO_ANC_FB_MC\nvoid hal_codec_setup_mc(enum AUD_CHANNEL_NUM_T channel_num,\n                        enum AUD_BITS_T bits) {\n  if (channel_num == AUD_CHANNEL_NUM_2) {\n    mc_dual_chan = true;\n  } else {\n    mc_dual_chan = false;\n  }\n\n  if (bits <= AUD_BITS_16) {\n    mc_16bit = true;\n  } else {\n    mc_16bit = false;\n  }\n}\n#endif\n\nvoid hal_codec_swap_output(bool swap) {\n#ifdef AUDIO_OUTPUT_SWAP\n  output_swap = swap;\n\n  if (codec_opened) {\n    if (output_swap) {\n      codec->REG_0A0 |= CODEC_CODEC_DAC_OUT_SWAP;\n    } else {\n      codec->REG_0A0 &= ~CODEC_CODEC_DAC_OUT_SWAP;\n    }\n  }\n#endif\n}\n\nint hal_codec_config_digmic_phase(uint8_t phase) {\n#ifdef ANC_PROD_TEST\n  codec_digmic_phase = phase;\n#endif\n  return 0;\n}\n\nstatic void hal_codec_general_irq_handler(void) {\n  uint32_t status;\n\n  status = codec->REG_00C;\n  codec->REG_00C = status;\n\n  status &= codec->REG_010;\n\n  for (int i = 0; i < CODEC_IRQ_TYPE_QTY; i++) {\n    if (codec_irq_callback[i]) {\n      codec_irq_callback[i](status);\n    }\n  }\n}\n\nstatic void hal_codec_set_irq_handler(enum CODEC_IRQ_TYPE_T type,\n                                      HAL_CODEC_IRQ_CALLBACK cb) {\n  uint32_t lock;\n\n  ASSERT(type < CODEC_IRQ_TYPE_QTY, \"%s: Bad type=%d\", __func__, type);\n\n  lock = int_lock();\n\n  codec_irq_callback[type] = cb;\n\n  if (cb) {\n    if (codec_irq_map == 0) {\n      NVIC_SetVector(CODEC_IRQn, (uint32_t)hal_codec_general_irq_handler);\n      NVIC_SetPriority(CODEC_IRQn, IRQ_PRIORITY_HIGHPLUSPLUS);\n      NVIC_ClearPendingIRQ(CODEC_IRQn);\n      NVIC_EnableIRQ(CODEC_IRQn);\n    }\n    codec_irq_map |= (1 << type);\n  } else {\n    codec_irq_map &= ~(1 << type);\n    if (codec_irq_map == 0) {\n      NVIC_DisableIRQ(CODEC_IRQn);\n      NVIC_ClearPendingIRQ(CODEC_IRQn);\n    }\n  }\n\n  int_unlock(lock);\n}\n\nvoid hal_codec_anc_fb_check_set_irq_handler(HAL_CODEC_IRQ_CALLBACK cb) {\n  hal_codec_set_irq_handler(CODEC_IRQ_TYPE_ANC_FB_CHECK, cb);\n}\n\n/* AUDIO CODEC VOICE ACTIVE DETECTION DRIVER */\n#ifdef VOICE_DETECTOR_EN\n\n//#define CODEC_VAD_DEBUG\n\nstatic inline void hal_codec_vad_set_udc(int v) {\n  codec->REG_14C &= ~CODEC_VAD_U_DC(0xf);\n  codec->REG_14C |= CODEC_VAD_U_DC(v);\n}\n\nstatic inline void hal_codec_vad_set_upre(int v) {\n  codec->REG_14C &= ~CODEC_VAD_U_PRE(0x7);\n  codec->REG_14C |= CODEC_VAD_U_PRE(v);\n}\n\nstatic inline void hal_codec_vad_set_frame_len(int v) {\n  codec->REG_14C &= ~CODEC_VAD_FRAME_LEN(0xff);\n  codec->REG_14C |= CODEC_VAD_FRAME_LEN(v);\n}\n\nstatic inline void hal_codec_vad_set_mvad(int v) {\n  codec->REG_14C &= ~CODEC_VAD_MVAD(0xf);\n  codec->REG_14C |= CODEC_VAD_MVAD(v);\n}\n\nstatic inline void hal_codec_vad_set_pre_gain(int v) {\n  codec->REG_14C &= ~CODEC_VAD_PRE_GAIN(0x3f);\n  codec->REG_14C |= CODEC_VAD_PRE_GAIN(v);\n}\n\nstatic inline void hal_codec_vad_set_sth(int v) {\n  codec->REG_14C &= ~CODEC_VAD_STH(0x3f);\n  codec->REG_14C |= CODEC_VAD_STH(v);\n}\n\nstatic inline void hal_codec_vad_set_frame_th1(int v) {\n  codec->REG_150 &= ~CODEC_VAD_FRAME_TH1(0xff);\n  codec->REG_150 |= CODEC_VAD_FRAME_TH1(v);\n}\n\nstatic inline void hal_codec_vad_set_frame_th2(int v) {\n  codec->REG_150 &= ~CODEC_VAD_FRAME_TH2(0x3ff);\n  codec->REG_150 |= CODEC_VAD_FRAME_TH2(v);\n}\n\nstatic inline void hal_codec_vad_set_frame_th3(int v) {\n  codec->REG_150 &= ~CODEC_VAD_FRAME_TH3(0x3fff);\n  codec->REG_150 |= CODEC_VAD_FRAME_TH3(v);\n}\n\nstatic inline void hal_codec_vad_set_range1(int v) {\n  codec->REG_154 &= ~CODEC_VAD_RANGE1(0x1f);\n  codec->REG_154 |= CODEC_VAD_RANGE1(v);\n}\n\nstatic inline void hal_codec_vad_set_range2(int v) {\n  codec->REG_154 &= ~CODEC_VAD_RANGE2(0x7f);\n  codec->REG_154 |= CODEC_VAD_RANGE2(v);\n}\n\nstatic inline void hal_codec_vad_set_range3(int v) {\n  codec->REG_154 &= ~CODEC_VAD_RANGE3(0x1ff);\n  codec->REG_154 |= CODEC_VAD_RANGE3(v);\n}\n\nstatic inline void hal_codec_vad_set_range4(int v) {\n  codec->REG_154 &= ~CODEC_VAD_RANGE4(0x3ff);\n  codec->REG_154 |= CODEC_VAD_RANGE4(v);\n}\n\nstatic inline void hal_codec_vad_set_psd_th1(int v) {\n  codec->REG_158 &= ~CODEC_VAD_PSD_TH1(0x7ffffff);\n  codec->REG_158 |= CODEC_VAD_PSD_TH1(v);\n}\n\nstatic inline void hal_codec_vad_set_psd_th2(int v) {\n  codec->REG_15C &= ~CODEC_VAD_PSD_TH2(0x7ffffff);\n  codec->REG_15C |= CODEC_VAD_PSD_TH2(v);\n}\n\nstatic inline void hal_codec_vad_en(int enable) {\n  if (enable) {\n    codec->REG_148 |= CODEC_VAD_EN; // enable vad\n  } else {\n    codec->REG_148 &= ~CODEC_VAD_EN; // disable vad\n    codec->REG_148 |= CODEC_VAD_FINISH;\n  }\n}\n\nstatic inline void hal_codec_vad_bypass_ds(int bypass) {\n  if (bypass)\n    codec->REG_148 |= CODEC_VAD_DS_BYPASS; // bypass ds\n  else\n    codec->REG_148 &= ~CODEC_VAD_DS_BYPASS; // not bypass ds\n}\n\nstatic inline void hal_codec_vad_bypass_dc(int bypass) {\n  if (bypass)\n    codec->REG_148 |= CODEC_VAD_DC_CANCEL_BYPASS; // bypass dc\n  else\n    codec->REG_148 &= ~CODEC_VAD_DC_CANCEL_BYPASS; // not bypass dc\n}\n\nstatic inline void hal_codec_vad_bypass_pre(int bypass) {\n  if (bypass)\n    codec->REG_148 |= CODEC_VAD_PRE_BYPASS; // bypass pre\n  else\n    codec->REG_148 &= ~CODEC_VAD_PRE_BYPASS; // not bypass pre\n}\n\nstatic inline void hal_codec_vad_dig_mode(int enable) {\n  if (enable)\n    codec->REG_148 |= CODEC_VAD_DIG_MODE; // digital mode\n  else\n    codec->REG_148 &= ~CODEC_VAD_DIG_MODE; // not digital mode\n}\n\nstatic inline void hal_codec_vad_adc_en(int enable) {\n  if (enable) {\n    codec->REG_080 |= (CODEC_CODEC_ADC_EN | CODEC_CODEC_ADC_EN_CH4);\n  } else {\n    uint32_t val;\n\n    val = codec->REG_080;\n    val &= ~CODEC_CODEC_ADC_EN_CH4;\n    if ((val & (CODEC_CODEC_ADC_EN_CH0 | CODEC_CODEC_ADC_EN_CH1 |\n                CODEC_CODEC_ADC_EN_CH2 | CODEC_CODEC_ADC_EN_CH3)) == 0) {\n      val &= ~CODEC_CODEC_ADC_EN;\n    }\n    codec->REG_080 = val;\n  }\n}\n\nstatic inline void hal_codec_vad_irq_en(int enable) {\n  if (enable) {\n    codec->REG_010 |= (CODEC_VAD_FIND_MSK | CODEC_VAD_NOT_FIND_MSK);\n  } else {\n    codec->REG_010 &= ~(CODEC_VAD_FIND_MSK | CODEC_VAD_NOT_FIND_MSK);\n  }\n\n  codec->REG_00C = CODEC_VAD_FIND | CODEC_VAD_NOT_FIND;\n}\n\nstatic inline void hal_codec_vad_adc_if_en(int enable) {\n  if (enable) {\n    codec->REG_000 |=\n        (CODEC_DMACTRL_RX | CODEC_ADC_ENABLE_CH4 | CODEC_ADC_ENABLE);\n  } else {\n    codec->REG_000 &=\n        ~(CODEC_DMACTRL_RX | CODEC_ADC_ENABLE_CH4 | CODEC_ADC_ENABLE);\n  }\n}\n\nstatic inline void hal_codec_vad_adc_down(int v) {\n  unsigned int regval = codec->REG_094;\n\n  regval &= ~CODEC_CODEC_ADC_DOWN_SEL_CH4(0x3);\n  regval |= CODEC_CODEC_ADC_DOWN_SEL_CH4(v);\n  codec->REG_094 = regval;\n}\n\n#ifdef CODEC_VAD_DEBUG\nvoid hal_codec_vad_reg_dump(void) {\n  TRACE(1, \"codec base = %8x\\n\", (int)&(codec->REG_000));\n  TRACE(1, \"codec->REG_000 = %x\\n\", codec->REG_000);\n  TRACE(1, \"codec->REG_00C = %x\\n\", codec->REG_00C);\n  TRACE(1, \"codec->REG_010 = %x\\n\", codec->REG_010);\n  TRACE(1, \"codec->REG_060 = %x\\n\", codec->REG_060);\n  TRACE(1, \"codec->REG_064 = %x\\n\", codec->REG_064);\n  TRACE(1, \"codec->REG_080 = %x\\n\", codec->REG_080);\n  TRACE(1, \"codec->REG_094 = %x\\n\", codec->REG_094);\n  TRACE(1, \"codec->REG_148 = %x\\n\", codec->REG_148);\n  TRACE(1, \"codec->REG_14C = %x\\n\", codec->REG_14C);\n  TRACE(1, \"codec->REG_150 = %x\\n\", codec->REG_150);\n  TRACE(1, \"codec->REG_154 = %x\\n\", codec->REG_154);\n  TRACE(1, \"codec->REG_158 = %x\\n\", codec->REG_158);\n  TRACE(1, \"codec->REG_15C = %x\\n\", codec->REG_15C);\n}\n#endif\n\nstatic inline void hal_codec_vad_data_info(uint32_t *data_cnt,\n                                           uint32_t *addr_cnt) {\n  uint32_t regval = codec->REG_160;\n\n  *data_cnt = GET_BITFIELD(regval, CODEC_VAD_MEM_DATA_CNT) * 2;\n  if (*data_cnt >=\n      ((CODEC_VAD_MEM_DATA_CNT_MASK >> CODEC_VAD_MEM_DATA_CNT_SHIFT) - 1) * 2) {\n    *data_cnt =\n        ((CODEC_VAD_MEM_DATA_CNT_MASK >> CODEC_VAD_MEM_DATA_CNT_SHIFT) + 1) * 2;\n  }\n  *addr_cnt = GET_BITFIELD(regval, CODEC_VAD_MEM_ADDR_CNT) * 2;\n}\n\nuint32_t hal_codec_vad_recv_data(uint8_t *dst, uint32_t dst_size) {\n  uint8_t *src = (uint8_t *)CODEC_VAD_BUF_ADDR;\n  const uint32_t src_size = CODEC_VAD_BUF_SIZE;\n  uint32_t len;\n  uint32_t start_pos;\n\n  TRACE(5, \"%s, dst=%x, dst_size=%d, vad_data_cnt=%d, vad_addr_cnt=%d\",\n        __func__, (uint32_t)dst, dst_size, vad_data_cnt, vad_addr_cnt);\n\n  if (vad_data_cnt > src_size || vad_addr_cnt >= src_size) {\n    return 0;\n  }\n\n  if (dst == NULL) {\n    return vad_data_cnt;\n  }\n\n  if (vad_addr_cnt >= vad_data_cnt) {\n    start_pos = vad_addr_cnt - vad_data_cnt;\n  } else {\n    // In this case (src_size == vad_data_cnt)\n    start_pos = vad_addr_cnt + src_size - vad_data_cnt;\n  }\n\n  len = MIN(dst_size, vad_data_cnt);\n\n  if (start_pos + len <= src_size) {\n    memcpy(dst, src + start_pos, len);\n  } else {\n    uint32_t len1, len2;\n    len1 = src_size - start_pos;\n    len2 = len - len1;\n    memcpy(dst, src + start_pos, len1);\n    memcpy(dst + len1, src, len2);\n  }\n\n  TRACE(2, \"%s, len=%d\", __func__, len);\n  return len;\n}\n\nvoid hal_codec_get_vad_data_info(struct CODEC_VAD_BUF_INFO_T *vad_buf_info) {\n  vad_buf_info->base_addr = CODEC_VAD_BUF_ADDR;\n  vad_buf_info->buf_size = CODEC_VAD_BUF_SIZE;\n  vad_buf_info->data_count = vad_data_cnt;\n  vad_buf_info->addr_count = vad_addr_cnt;\n}\n\nstatic void hal_codec_vad_isr(uint32_t irq_status) {\n  if ((irq_status & (CODEC_VAD_FIND | CODEC_VAD_NOT_FIND)) == 0) {\n    return;\n  }\n\n  TRACE(2, \"%s VAD_FIND=%d\", __func__, !!(irq_status & CODEC_VAD_FIND));\n\n  if (vad_handler) {\n    vad_handler(!!(irq_status & CODEC_VAD_FIND));\n  }\n}\n\nint hal_codec_vad_config(const struct AUD_VAD_CONFIG_T *conf) {\n  unsigned int adc_channel_en = 0;\n  unsigned int cfg_set_mask = 0;\n  unsigned int cfg_clr_mask = 0;\n\n  if (!conf)\n    return -1;\n\n  vad_handler = conf->handler;\n\n  hal_codec_vad_en(0);\n  hal_codec_vad_irq_en(0);\n\n  hal_codec_vad_set_udc(conf->udc);\n  hal_codec_vad_set_upre(conf->upre);\n  hal_codec_vad_set_frame_len(conf->frame_len);\n  hal_codec_vad_set_mvad(conf->mvad);\n  hal_codec_vad_set_pre_gain(conf->pre_gain);\n  hal_codec_vad_set_sth(conf->sth);\n  hal_codec_vad_set_frame_th1(conf->frame_th[0]);\n  hal_codec_vad_set_frame_th2(conf->frame_th[1]);\n  hal_codec_vad_set_frame_th3(conf->frame_th[2]);\n  hal_codec_vad_set_range1(conf->range[0]);\n  hal_codec_vad_set_range2(conf->range[1]);\n  hal_codec_vad_set_range3(conf->range[2]);\n  hal_codec_vad_set_range4(conf->range[3]);\n  hal_codec_vad_set_psd_th1(conf->psd_th[0]);\n  hal_codec_vad_set_psd_th2(conf->psd_th[1]);\n  hal_codec_vad_dig_mode(0);\n  hal_codec_vad_bypass_dc(0);\n  hal_codec_vad_bypass_pre(0);\n\n  if (conf->sample_rate == AUD_SAMPRATE_8000) {\n    // select adc down 8KHz\n    hal_codec_vad_adc_down(1);\n    hal_codec_vad_bypass_ds(1);\n  } else if (conf->sample_rate == AUD_SAMPRATE_16000) {\n    // select adc down 16KHz\n    hal_codec_vad_adc_down(0);\n    hal_codec_vad_bypass_ds(0);\n  } else {\n    ASSERT(false, \"%s: Bad sample rate: %u\", __func__, conf->sample_rate);\n  }\n\n  cfg_clr_mask = CODEC_MODE_16BIT_ADC_CH0 | CODEC_MODE_16BIT_ADC_CH1 |\n                 CODEC_MODE_16BIT_ADC_CH2 | CODEC_MODE_16BIT_ADC_CH3 |\n                 CODEC_MODE_16BIT_ADC_CH4 | CODEC_MODE_16BIT_ADC_CH5 |\n                 CODEC_MODE_16BIT_ADC_CH6 | CODEC_MODE_24BIT_ADC |\n                 CODEC_MODE_32BIT_ADC;\n\n  if (conf->bits == AUD_BITS_16) {\n    cfg_set_mask |= CODEC_MODE_16BIT_ADC_CH0 | CODEC_MODE_16BIT_ADC_CH1 |\n                    CODEC_MODE_16BIT_ADC_CH2 | CODEC_MODE_16BIT_ADC_CH3 |\n                    CODEC_MODE_16BIT_ADC_CH4 | CODEC_MODE_16BIT_ADC_CH5 |\n                    CODEC_MODE_16BIT_ADC_CH6;\n  } else if (conf->bits == AUD_BITS_24) {\n    cfg_set_mask |= CODEC_MODE_24BIT_ADC;\n  } else if (conf->bits == AUD_BITS_32) {\n    cfg_set_mask |= CODEC_MODE_32BIT_ADC;\n  } else {\n    ASSERT(false, \"%s: Bad cap bits: %d\", __func__, conf->bits);\n  }\n\n  for (int i = 0; i < MAX_ADC_CH_NUM; i++) {\n    adc_channel_en |= (CODEC_ADC_ENABLE_CH0 << i);\n  }\n\n  if (((codec->REG_000 & adc_channel_en) != 0) &&\n      ((codec->REG_040 & cfg_set_mask) == 0)) {\n    ASSERT(false, \"%s: Cap bits conflict: %d\", __func__, conf->bits);\n  } else {\n    codec->REG_040 = (codec->REG_040 & ~cfg_clr_mask) | cfg_set_mask;\n  }\n\n  codec->REG_220 = 320;\n  codec->REG_224 = 32000 * 3; // vad timeout value\n#ifdef I2C_VAD\n  codec->REG_230 |= CODEC_VAD_EXT_EN | CODEC_VAD_SRC_SEL;\n#endif\n\n#if !(defined(FIXED_CODEC_ADC_VOL) && defined(SINGLE_CODEC_ADC_VOL))\n  const CODEC_ADC_VOL_T *adc_gain_db;\n\n#ifdef SINGLE_CODEC_ADC_VOL\n  adc_gain_db = hal_codec_get_adc_volume(CODEC_SADC_VOL);\n#else\n  adc_gain_db = hal_codec_get_adc_volume(\n      hal_codec_get_mic_chan_volume_level(AUD_CHANNEL_MAP_CH4));\n#endif\n  if (adc_gain_db) {\n    hal_codec_set_dig_adc_gain(AUD_CHANNEL_MAP_CH4, *adc_gain_db);\n  }\n#endif\n\n  return 0;\n}\n\nint hal_codec_vad_open(const struct AUD_VAD_CONFIG_T *conf) {\n  vad_type = conf->type;\n\n  // open analog vad\n  analog_aud_vad_adc_enable(true);\n\n  // enable vad clock\n  hal_cmu_codec_vad_clock_enable(1);\n\n  hal_codec_vad_config(conf);\n\n  return 0;\n}\n\nint hal_codec_vad_close(void) {\n#ifdef I2C_VAD\n  codec->REG_230 &= ~(CODEC_VAD_EXT_EN | CODEC_VAD_SRC_SEL);\n#endif\n\n  // disable vad clock\n  hal_cmu_codec_vad_clock_enable(0);\n\n  // close analog vad\n  analog_aud_vad_adc_enable(false);\n\n  vad_type = AUD_VAD_TYPE_NONE;\n\n  return 0;\n}\n\nint hal_codec_vad_start(void) {\n  if (vad_enabled) {\n    return 0;\n  }\n  vad_enabled = true;\n  vad_data_cnt = 0;\n  vad_addr_cnt = 0;\n\n  hal_codec_vad_irq_en(1);\n  hal_codec_set_irq_handler(CODEC_IRQ_TYPE_VAD, hal_codec_vad_isr);\n\n  if (vad_type == AUD_VAD_TYPE_MIX || vad_type == AUD_VAD_TYPE_DIG) {\n    // digital vad\n    hal_codec_vad_en(1);\n    // enable adc if\n    hal_codec_vad_adc_if_en(1);\n    // enable adc\n    hal_codec_vad_adc_en(1);\n  }\n\n  analog_aud_vad_enable(vad_type, true);\n\n  return 0;\n}\n\nint hal_codec_vad_stop(void) {\n  if (!vad_enabled) {\n    return 0;\n  }\n  vad_enabled = false;\n  hal_codec_vad_data_info(&vad_data_cnt, &vad_addr_cnt);\n\n  analog_aud_vad_enable(vad_type, false);\n\n  hal_codec_vad_irq_en(0);\n  hal_codec_set_irq_handler(CODEC_IRQ_TYPE_VAD, NULL);\n\n  if (vad_type == AUD_VAD_TYPE_MIX || vad_type == AUD_VAD_TYPE_DIG) {\n    hal_codec_vad_en(0);\n    hal_codec_vad_adc_if_en(0);\n    hal_codec_vad_adc_en(0);\n  }\n\n  return 0;\n}\n\n#endif\n\n//********************BT trigger functions: START********************\nstatic void hal_codec_bt_trigger_isr(uint32_t irq_status) {\n  if ((irq_status & CODEC_BT_TRIGGER) == 0) {\n    return;\n  }\n\n  if (bt_trigger_callback) {\n    TRACE(1, \"[%s] bt_trigger_callback Start...\", __func__);\n    bt_trigger_callback();\n  } else {\n    TRACE(1, \"[%s] bt_trigger_callback = NULL\", __func__);\n  }\n}\n\nstatic inline void hal_codec_bt_trigger_irq_en(int enable) {\n  if (enable)\n    codec->REG_010 |= CODEC_BT_TRIGGER_MSK;\n  else\n    codec->REG_010 &= ~CODEC_BT_TRIGGER_MSK;\n\n  codec->REG_00C = CODEC_BT_TRIGGER;\n}\n\nvoid hal_codec_set_bt_trigger_callback(HAL_CODEC_BT_TRIGGER_CALLBACK callback) {\n  bt_trigger_callback = callback;\n}\n\nint hal_codec_bt_trigger_start(void) {\n  uint32_t lock;\n\n  TRACE(1, \"[%s] Start\", __func__);\n\n  lock = int_lock();\n\n  hal_codec_set_irq_handler(CODEC_IRQ_TYPE_BT_TRIGGER,\n                            hal_codec_bt_trigger_isr);\n  hal_codec_bt_trigger_irq_en(1);\n\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_codec_bt_trigger_stop(void) {\n  uint32_t lock;\n\n  TRACE(1, \"[%s] Stop\", __func__);\n\n  lock = int_lock();\n\n  hal_codec_bt_trigger_irq_en(0);\n  hal_codec_set_irq_handler(CODEC_IRQ_TYPE_BT_TRIGGER, NULL);\n\n  int_unlock(lock);\n\n  return 0;\n}\n//********************BT trigger functions: END********************\n"
  },
  {
    "path": "platform/hal/best2300p/hal_dmacfg_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_DMACFG_BEST2300P_H__\n#define __HAL_DMACFG_BEST2300P_H__\n\n#define AUDMA_PERIPH_NUM                        16\n#define GPDMA_PERIPH_NUM                        16\n\n#define AUDMA_CHAN_NUM                          8\n#define GPDMA_CHAN_NUM                          8\n\n#define AUDMA_CHAN_START                        (0)\n#define GPDMA_CHAN_START                        (0)\n\nstatic const uint32_t audma_fifo_addr[AUDMA_PERIPH_NUM] = {\n    CODEC_BASE + 0x01C,     // CODEC RX\n    CODEC_BASE + 0x01C,     // CODEC TX\n#ifdef CODEC_DSD\n    CODEC_BASE + 0x034,     // DSD RX\n    CODEC_BASE + 0x034,     // DSD TX\n#else\n    BTPCM_BASE + 0x1C0,     // BTPCM RX\n    BTPCM_BASE + 0x1C8,     // BTPCM TX\n#endif\n    I2S0_BASE + 0x200,      // I2S0 RX\n    I2S0_BASE + 0x240,      // I2S0 TX\n    0,                      // FIR RX\n    0,                      // FIR TX\n    SPDIF0_BASE + 0x1C0,    // SPDIF0 RX\n    SPDIF0_BASE + 0x1C8,    // SPDIF0 TX\n    CODEC_BASE + 0x03C,     // IIR RX\n    CODEC_BASE + 0x03C,     // IIR TX\n    BTDUMP_BASE + 0x34,     // BTDUMP\n    CODEC_BASE + 0x038,     // MC RX\n    I2S1_BASE + 0x200,      // I2S1 RX\n    I2S1_BASE + 0x240,      // I2S1 TX\n};\n\nstatic const enum HAL_DMA_PERIPH_T audma_fifo_periph[AUDMA_PERIPH_NUM] = {\n    HAL_AUDMA_CODEC_RX,\n    HAL_AUDMA_CODEC_TX,\n#ifdef CODEC_DSD\n    HAL_AUDMA_DSD_RX,\n    HAL_AUDMA_DSD_TX,\n#else\n    HAL_AUDMA_BTPCM_RX,\n    HAL_AUDMA_BTPCM_TX,\n#endif\n    HAL_AUDMA_I2S0_RX,\n    HAL_AUDMA_I2S0_TX,\n    HAL_AUDMA_FIR_RX,\n    HAL_AUDMA_FIR_TX,\n    HAL_AUDMA_SPDIF0_RX,\n    HAL_AUDMA_SPDIF0_TX,\n    HAL_AUDMA_IIR_RX,\n    HAL_AUDMA_IIR_TX,\n    HAL_AUDMA_BTDUMP,\n    HAL_AUDMA_MC_RX,\n    HAL_AUDMA_I2S1_RX,\n    HAL_AUDMA_I2S1_TX,\n};\n\nstatic const uint32_t gpdma_fifo_addr[GPDMA_PERIPH_NUM] = {\n    FLASH_CTRL_BASE + 0x008, // FLASH CTRL\n    SDMMC_BASE + 0x200,     // SDMMC\n    I2C0_BASE + 0x010,      // I2C0 RX\n    I2C0_BASE + 0x010,      // I2C0 TX\n    SPI_BASE + 0x008,       // SPI RX\n    SPI_BASE + 0x008,       // SPI TX\n    SPILCD_BASE + 0x008,    // SPILCD RX\n    SPILCD_BASE + 0x008,    // SPILCD TX\n    UART0_BASE + 0x000,     // UART0 RX\n    UART0_BASE + 0x000,     // UART0 TX\n    UART1_BASE + 0x000,     // UART1 RX\n    UART1_BASE + 0x000,     // UART1 TX\n    I2C1_BASE + 0x010,      // I2C1 RX\n    I2C1_BASE + 0x010,      // I2C1 TX\n    UART2_BASE + 0x000,     // UART2 RX\n    UART2_BASE + 0x000,     // UART2 TX\n};\n\nstatic const enum HAL_DMA_PERIPH_T gpdma_fifo_periph[GPDMA_PERIPH_NUM] = {\n    HAL_GPDMA_FLASH_TX,\n    HAL_GPDMA_SDMMC,\n    HAL_GPDMA_I2C0_RX,\n    HAL_GPDMA_I2C0_TX,\n    HAL_GPDMA_SPI_RX,\n    HAL_GPDMA_SPI_TX,\n    HAL_GPDMA_SPILCD_RX,\n    HAL_GPDMA_SPILCD_TX,\n    HAL_GPDMA_UART0_RX,\n    HAL_GPDMA_UART0_TX,\n    HAL_GPDMA_UART1_RX,\n    HAL_GPDMA_UART1_TX,\n    HAL_GPDMA_I2C1_RX,\n    HAL_GPDMA_I2C1_TX,\n    HAL_GPDMA_UART2_RX,\n    HAL_GPDMA_UART2_TX,\n};\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/best2300p/hal_iomux_best2300p.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(reg_iomux)\n#include \"hal_chipid.h\"\n#include \"hal_gpio.h\"\n#include \"hal_iomux.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n\n#ifdef I2S0_VOLTAGE_VMEM\n#define I2S0_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define I2S0_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifdef I2S1_VOLTAGE_VMEM\n#define I2S1_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define I2S1_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifdef SPDIF0_VOLTAGE_VMEM\n#define SPDIF0_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define SPDIF0_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifdef DIGMIC_VOLTAGE_VMEM\n#define DIGMIC_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define DIGMIC_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifdef SPI_VOLTAGE_VMEM\n#define SPI_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define SPI_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifdef SPILCD_VOLTAGE_VMEM\n#define SPILCD_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define SPILCD_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifdef I2C0_VOLTAGE_VMEM\n#define I2C0_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define I2C0_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifdef I2C1_VOLTAGE_VMEM\n#define I2C1_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define I2C1_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifdef CLKOUT_VOLTAGE_VMEM\n#define CLKOUT_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_MEM\n#else\n#define CLKOUT_VOLTAGE_SEL HAL_IOMUX_PIN_VOLTAGE_VIO\n#endif\n\n#ifndef I2S0_IOMUX_INDEX\n#define I2S0_IOMUX_INDEX 0\n#endif\n\n#ifndef I2S1_IOMUX_INDEX\n#define I2S1_IOMUX_INDEX 0\n#endif\n\n#ifndef I2S_MCLK_IOMUX_INDEX\n#define I2S_MCLK_IOMUX_INDEX 0\n#endif\n\n#ifndef SPDIF0_IOMUX_INDEX\n#define SPDIF0_IOMUX_INDEX 0\n#endif\n\n#ifndef DIG_MIC2_CK_IOMUX_INDEX\n#define DIG_MIC2_CK_IOMUX_INDEX 0\n#endif\n\n#ifndef DIG_MIC3_CK_IOMUX_INDEX\n#define DIG_MIC3_CK_IOMUX_INDEX 0\n#endif\n\n#ifndef DIG_MIC_CK_IOMUX_PIN\n#define DIG_MIC_CK_IOMUX_PIN 0\n#endif\n\n#ifndef DIG_MIC_D0_IOMUX_PIN\n#define DIG_MIC_D0_IOMUX_PIN 1\n#endif\n\n#ifndef DIG_MIC_D1_IOMUX_PIN\n#define DIG_MIC_D1_IOMUX_PIN 2\n#endif\n\n#ifndef DIG_MIC_D2_IOMUX_PIN\n#define DIG_MIC_D2_IOMUX_PIN 3\n#endif\n\n#ifndef SPI_IOMUX_INDEX\n#define SPI_IOMUX_INDEX 0\n#endif\n\n#ifndef SPILCD_IOMUX_INDEX\n#define SPILCD_IOMUX_INDEX 0\n#endif\n\n#ifndef I2C0_IOMUX_INDEX\n#define I2C0_IOMUX_INDEX 0\n#endif\n\n#ifndef I2C1_IOMUX_INDEX\n#define I2C1_IOMUX_INDEX 0\n#endif\n\n#ifndef CLKOUT_IOMUX_INDEX\n#define CLKOUT_IOMUX_INDEX 0\n#endif\n\n#define IOMUX_FUNC_VAL_GPIO 0\n\n#define IOMUX_ALT_FUNC_NUM 6\n\n// Other func values: 0 -> gpio, 6 -> rf_ana, 7 -> jtag/btdm, 9 -> clk_req, 10\n// -> ana_test\nstatic const uint8_t index_to_func_val[IOMUX_ALT_FUNC_NUM] = {\n    1, 2, 3, 4, 5, 8,\n};\n\nstatic const enum HAL_IOMUX_FUNCTION_T\n    pin_func_map[HAL_IOMUX_PIN_NUM][IOMUX_ALT_FUNC_NUM] = {\n        // P0_0\n        {\n            HAL_IOMUX_FUNC_I2S0_SDI0,\n            HAL_IOMUX_FUNC_UART2_RX,\n            HAL_IOMUX_FUNC_PCM_DI,\n            HAL_IOMUX_FUNC_SPILCD_DI0,\n            HAL_IOMUX_FUNC_PDM0_CK,\n            HAL_IOMUX_FUNC_SPILCD_DCN,\n        },\n        // P0_1\n        {\n            HAL_IOMUX_FUNC_I2S0_SDO,\n            HAL_IOMUX_FUNC_UART2_TX,\n            HAL_IOMUX_FUNC_PCM_DO,\n            HAL_IOMUX_FUNC_SPILCD_DIO,\n            HAL_IOMUX_FUNC_PDM0_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P0_2\n        {\n            HAL_IOMUX_FUNC_I2S0_WS,\n            HAL_IOMUX_FUNC_I2C_M1_SCL,\n            HAL_IOMUX_FUNC_PCM_FSYNC,\n            HAL_IOMUX_FUNC_SPILCD_CS0,\n            HAL_IOMUX_FUNC_PDM1_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P0_3\n        {\n            HAL_IOMUX_FUNC_I2S0_SCK,\n            HAL_IOMUX_FUNC_I2C_M1_SDA,\n            HAL_IOMUX_FUNC_PCM_CLK,\n            HAL_IOMUX_FUNC_SPILCD_CLK,\n            HAL_IOMUX_FUNC_PDM2_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P0_4\n        {\n            HAL_IOMUX_FUNC_SDMMC_DATA7,\n            HAL_IOMUX_FUNC_SPI_DI0,\n            HAL_IOMUX_FUNC_I2S0_MCLK,\n            HAL_IOMUX_FUNC_CLK_OUT,\n            HAL_IOMUX_FUNC_PDM1_CK,\n            HAL_IOMUX_FUNC_SPI_DCN,\n        },\n        // P0_5\n        {\n            HAL_IOMUX_FUNC_SDMMC_DATA6,\n            HAL_IOMUX_FUNC_SPI_CLK,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPILCD_CS1,\n            HAL_IOMUX_FUNC_PDM1_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P0_6\n        {\n            HAL_IOMUX_FUNC_SDMMC_DATA5,\n            HAL_IOMUX_FUNC_SPI_CS0,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPILCD_CS2,\n            HAL_IOMUX_FUNC_PDM0_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P0_7\n        {\n            HAL_IOMUX_FUNC_SDMMC_DATA4,\n            HAL_IOMUX_FUNC_SPI_DIO,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPILCD_CS3,\n            HAL_IOMUX_FUNC_PDM2_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P1_0\n        {\n            HAL_IOMUX_FUNC_SDMMC_DATA2,\n            HAL_IOMUX_FUNC_I2S1_SCK,\n            HAL_IOMUX_FUNC_SPILCD_CLK,\n            HAL_IOMUX_FUNC_SPI_CS1,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P1_1\n        {\n            HAL_IOMUX_FUNC_SDMMC_DATA3,\n            HAL_IOMUX_FUNC_I2S1_WS,\n            HAL_IOMUX_FUNC_SPILCD_CS0,\n            HAL_IOMUX_FUNC_SPI_CS2,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P1_2\n        {\n            HAL_IOMUX_FUNC_SDMMC_CMD,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPILCD_CS1,\n            HAL_IOMUX_FUNC_SPI_CS3,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P1_3\n        {\n            HAL_IOMUX_FUNC_SDMMC_CLK,\n            HAL_IOMUX_FUNC_I2S0_MCLK,\n            HAL_IOMUX_FUNC_SPILCD_DCN,\n            HAL_IOMUX_FUNC_CLK_OUT,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P1_4\n        {\n            HAL_IOMUX_FUNC_SDMMC_DATA0,\n            HAL_IOMUX_FUNC_I2S1_SDI0,\n            HAL_IOMUX_FUNC_SPILCD_DI0,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P1_5\n        {\n            HAL_IOMUX_FUNC_SDMMC_DATA1,\n            HAL_IOMUX_FUNC_I2S1_SDO,\n            HAL_IOMUX_FUNC_SPILCD_DIO,\n            HAL_IOMUX_FUNC_I2S0_MCLK,\n            HAL_IOMUX_FUNC_CLK_OUT,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P1_6\n        {\n            HAL_IOMUX_FUNC_UART0_RX,\n            HAL_IOMUX_FUNC_I2C_M0_SCL,\n            HAL_IOMUX_FUNC_BT_UART_RX,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P1_7\n        {\n            HAL_IOMUX_FUNC_UART0_TX,\n            HAL_IOMUX_FUNC_I2C_M0_SDA,\n            HAL_IOMUX_FUNC_BT_UART_TX,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P2_0\n        {\n            HAL_IOMUX_FUNC_UART1_RX,\n            HAL_IOMUX_FUNC_I2C_M0_SCL,\n            HAL_IOMUX_FUNC_BT_UART_RX,\n            HAL_IOMUX_FUNC_SPDIF0_DI,\n            HAL_IOMUX_FUNC_PWM0,\n            HAL_IOMUX_FUNC_I2S0_MCLK,\n        },\n        // P2_1\n        {\n            HAL_IOMUX_FUNC_UART1_TX,\n            HAL_IOMUX_FUNC_I2C_M0_SDA,\n            HAL_IOMUX_FUNC_BT_UART_TX,\n            HAL_IOMUX_FUNC_SPDIF0_DO,\n            HAL_IOMUX_FUNC_PWM1,\n            HAL_IOMUX_FUNC_CLK_OUT,\n        },\n        // P2_2\n        {\n            HAL_IOMUX_FUNC_I2C_M1_SCL,\n            HAL_IOMUX_FUNC_UART2_RX,\n            HAL_IOMUX_FUNC_UART1_CTS,\n            HAL_IOMUX_FUNC_BT_UART_CTS,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_I2S0_MCLK,\n        },\n        // P2_3\n        {\n            HAL_IOMUX_FUNC_I2C_M1_SDA,\n            HAL_IOMUX_FUNC_UART2_TX,\n            HAL_IOMUX_FUNC_UART1_RTS,\n            HAL_IOMUX_FUNC_BT_UART_RTS,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_CLK_OUT,\n        },\n        // P2_4\n        {\n            HAL_IOMUX_FUNC_PWM0,\n            HAL_IOMUX_FUNC_CLK_REQ_OUT,\n            HAL_IOMUX_FUNC_SPI_DI3,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P2_5\n        {\n            HAL_IOMUX_FUNC_PWM1,\n            HAL_IOMUX_FUNC_CLK_REQ_IN,\n            HAL_IOMUX_FUNC_SPI_CS3,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P2_6\n        {\n            HAL_IOMUX_FUNC_PWM2,\n            HAL_IOMUX_FUNC_SPILCD_DI1,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPDIF0_DI,\n            HAL_IOMUX_FUNC_CLK_32K_IN,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P2_7\n        {\n            HAL_IOMUX_FUNC_PWM3,\n            HAL_IOMUX_FUNC_SPILCD_CS1,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPDIF0_DO,\n            HAL_IOMUX_FUNC_CLK_OUT,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P3_0\n        {\n            HAL_IOMUX_FUNC_SPILCD_DI2,\n            HAL_IOMUX_FUNC_I2S1_SCK,\n            HAL_IOMUX_FUNC_SPILCD_CS1,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_PDM0_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P3_1\n        {\n            HAL_IOMUX_FUNC_SPILCD_CS2,\n            HAL_IOMUX_FUNC_I2S1_WS,\n            HAL_IOMUX_FUNC_SPILCD_CS3,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_PDM1_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P3_2\n        {\n            HAL_IOMUX_FUNC_SPILCD_CS3,\n            HAL_IOMUX_FUNC_I2S1_SDI0,\n            HAL_IOMUX_FUNC_SPILCD_CS3,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_PDM2_D,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P3_3\n        {\n            HAL_IOMUX_FUNC_SPILCD_DI3,\n            HAL_IOMUX_FUNC_I2S1_SDO,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_PDM2_CK,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P3_4\n        {\n            HAL_IOMUX_FUNC_PWM0,\n            HAL_IOMUX_FUNC_SPI_DI1,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPILCD_DI0,\n            HAL_IOMUX_FUNC_CLK_OUT,\n            HAL_IOMUX_FUNC_SPILCD_DCN,\n        },\n        // P3_5\n        {\n            HAL_IOMUX_FUNC_PWM1,\n            HAL_IOMUX_FUNC_SPI_CS1,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPILCD_DIO,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P3_6\n        {\n            HAL_IOMUX_FUNC_PWM2,\n            HAL_IOMUX_FUNC_SPI_DI2,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPILCD_CS0,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n        // P3_7\n        {\n            HAL_IOMUX_FUNC_PWM3,\n            HAL_IOMUX_FUNC_SPI_CS2,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_SPILCD_CLK,\n            HAL_IOMUX_FUNC_NONE,\n            HAL_IOMUX_FUNC_NONE,\n        },\n};\n\nstatic struct IOMUX_T *const iomux = (struct IOMUX_T *)IOMUX_BASE;\n\n#ifdef ANC_PROD_TEST\n#define OPT_TYPE\n#else\n#define OPT_TYPE const\n#endif\n\nstatic OPT_TYPE enum HAL_IOMUX_PIN_T digmic_ck_pin = DIG_MIC_CK_IOMUX_PIN;\n\nstatic OPT_TYPE enum HAL_IOMUX_PIN_T digmic_d0_pin = DIG_MIC_D0_IOMUX_PIN;\nstatic OPT_TYPE enum HAL_IOMUX_PIN_T digmic_d1_pin = DIG_MIC_D1_IOMUX_PIN;\nstatic OPT_TYPE enum HAL_IOMUX_PIN_T digmic_d2_pin = DIG_MIC_D2_IOMUX_PIN;\n\nstatic enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T BOOT_DATA_LOC uart0_volt =\n    HAL_IOMUX_PIN_VOLTAGE_VIO;\n// UART1 is tied to vmem domain\n\nvoid hal_iomux_set_default_config(void) {\n  uint32_t i;\n  // Set all unused GPIOs to pull-down by default\n  for (i = 0; i < 8; i++) {\n    if (((iomux->REG_004 & (0xF << (i * 4))) >> (i * 4)) == 0xF) {\n      iomux->REG_030 |= (1 << i);\n    }\n  }\n  for (i = 0; i < 6; i++) {\n    if (((iomux->REG_008 & (0xF << (i * 4))) >> (i * 4)) == 0xF) {\n      iomux->REG_030 |= (1 << (i + 8));\n    }\n  }\n  for (i = 0; i < 8; i++) {\n    if (((iomux->REG_00C & (0xF << (i * 4))) >> (i * 4)) == 0xF) {\n      iomux->REG_030 |= (1 << (i + 16));\n    }\n  }\n  for (i = 0; i < 8; i++) {\n    if (((iomux->REG_010 & (0xF << (i * 4))) >> (i * 4)) == 0xF) {\n      iomux->REG_030 |= (1 << (i + 24));\n    }\n  }\n}\n\nuint32_t hal_iomux_check(const struct HAL_IOMUX_PIN_FUNCTION_MAP *map,\n                         uint32_t count) {\n  uint32_t i;\n  for (i = 0; i < count; ++i) {\n  }\n  return 0;\n}\n\nuint32_t hal_iomux_init(const struct HAL_IOMUX_PIN_FUNCTION_MAP *map,\n                        uint32_t count) {\n  uint32_t i;\n  uint32_t ret;\n\n  for (i = 0; i < count; ++i) {\n    ret = hal_iomux_set_function(map[i].pin, map[i].function,\n                                 HAL_IOMUX_OP_CLEAN_OTHER_FUNC_BIT);\n    if (ret) {\n      return (i << 8) + 1;\n    }\n    ret = hal_iomux_set_io_voltage_domains(map[i].pin, map[i].volt);\n    if (ret) {\n      return (i << 8) + 2;\n    }\n    ret = hal_iomux_set_io_pull_select(map[i].pin, map[i].pull_sel);\n    if (ret) {\n      return (i << 8) + 3;\n    }\n  }\n\n  return 0;\n}\n\n#ifdef ANC_PROD_TEST\nvoid hal_iomux_set_dig_mic_clock_pin(enum HAL_IOMUX_PIN_T pin) {\n  digmic_ck_pin = pin;\n}\nvoid hal_iomux_set_dig_mic_data0_pin(enum HAL_IOMUX_PIN_T pin) {\n  digmic_d0_pin = pin;\n}\n\nvoid hal_iomux_set_dig_mic_data1_pin(enum HAL_IOMUX_PIN_T pin) {\n  digmic_d1_pin = pin;\n}\n\nvoid hal_iomux_set_dig_mic_data2_pin(enum HAL_IOMUX_PIN_T pin) {\n  digmic_d2_pin = pin;\n}\n#endif\n\nuint32_t hal_iomux_set_function(enum HAL_IOMUX_PIN_T pin,\n                                enum HAL_IOMUX_FUNCTION_T func,\n                                enum HAL_IOMUX_OP_TYPE_T type) {\n  int i;\n  uint8_t val;\n  __IO uint32_t *reg;\n  uint32_t shift;\n\n  if (pin >= HAL_IOMUX_PIN_LED_NUM) {\n    return 1;\n  }\n  if (func >= HAL_IOMUX_FUNC_END) {\n    return 2;\n  }\n\n  if (pin == HAL_IOMUX_PIN_P1_6 || pin == HAL_IOMUX_PIN_P1_7) {\n    if (func == HAL_IOMUX_FUNC_I2C_SCL || func == HAL_IOMUX_FUNC_I2C_SDA) {\n      // Enable analog I2C slave\n      iomux->REG_050 &= ~IOMUX_GPIO_I2C_MODE;\n      // Set mcu GPIO func\n      iomux->REG_008 = (iomux->REG_008 &\n                        ~(IOMUX_GPIO_P16_SEL_MASK | IOMUX_GPIO_P17_SEL_MASK)) |\n                       IOMUX_GPIO_P16_SEL(IOMUX_FUNC_VAL_GPIO) |\n                       IOMUX_GPIO_P17_SEL(IOMUX_FUNC_VAL_GPIO);\n      return 0;\n    } else {\n      iomux->REG_050 |= IOMUX_GPIO_I2C_MODE;\n      // Continue to set the alt func\n    }\n  } else if (pin == HAL_IOMUX_PIN_P0_2) {\n    if (func == HAL_IOMUX_FUNC_SPDIF0_DI) {\n      iomux->REG_004 = SET_BITFIELD(iomux->REG_004, IOMUX_GPIO_P02_SEL, 6);\n      return 0;\n    }\n  } else if (pin == HAL_IOMUX_PIN_P0_3) {\n    if (func == HAL_IOMUX_FUNC_SPDIF0_DO) {\n      iomux->REG_004 = SET_BITFIELD(iomux->REG_004, IOMUX_GPIO_P03_SEL, 6);\n      return 0;\n    }\n  } else if (pin == HAL_IOMUX_PIN_P2_0) {\n    if (func == HAL_IOMUX_FUNC_CLK_REQ_OUT) {\n      iomux->REG_00C = SET_BITFIELD(iomux->REG_00C, IOMUX_GPIO_P20_SEL, 9);\n      return 0;\n    }\n  } else if (pin == HAL_IOMUX_PIN_P2_1) {\n    if (func == HAL_IOMUX_FUNC_CLK_REQ_IN) {\n      iomux->REG_00C = SET_BITFIELD(iomux->REG_00C, IOMUX_GPIO_P21_SEL, 9);\n      return 0;\n    }\n  } else if (pin == HAL_IOMUX_PIN_LED1 || pin == HAL_IOMUX_PIN_LED2) {\n    ASSERT(func == HAL_IOMUX_FUNC_GPIO, \"Bad func=%d for IOMUX pin=%d\", func,\n           pin);\n    return 0;\n  }\n\n  if (func == HAL_IOMUX_FUNC_GPIO) {\n    val = IOMUX_FUNC_VAL_GPIO;\n  } else {\n    for (i = 0; i < IOMUX_ALT_FUNC_NUM; i++) {\n      if (pin_func_map[pin][i] == func) {\n        break;\n      }\n    }\n\n    if (i == IOMUX_ALT_FUNC_NUM) {\n      return 3;\n    }\n    val = index_to_func_val[i];\n  }\n\n  reg = &iomux->REG_004 + pin / 8;\n  shift = (pin % 8) * 4;\n\n  *reg = (*reg & ~(0xF << shift)) | (val << shift);\n\n  return 0;\n}\n\nenum HAL_IOMUX_FUNCTION_T hal_iomux_get_function(enum HAL_IOMUX_PIN_T pin) {\n  return HAL_IOMUX_FUNC_NONE;\n}\n\nuint32_t\nhal_iomux_set_io_voltage_domains(enum HAL_IOMUX_PIN_T pin,\n                                 enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt) {\n  if (pin >= HAL_IOMUX_PIN_LED_NUM) {\n    return 1;\n  }\n\n  if (pin == HAL_IOMUX_PIN_LED1 || pin == HAL_IOMUX_PIN_LED2) {\n    pmu_led_set_voltage_domains(pin, volt);\n  }\n\n  return 0;\n}\n\nuint32_t\nhal_iomux_set_io_pull_select(enum HAL_IOMUX_PIN_T pin,\n                             enum HAL_IOMUX_PIN_PULL_SELECT_T pull_sel) {\n  if (pin >= HAL_IOMUX_PIN_LED_NUM) {\n    return 1;\n  }\n\n  if (pin < HAL_IOMUX_PIN_LED1) {\n    iomux->REG_02C &= ~(1 << pin);\n    iomux->REG_030 &= ~(1 << pin);\n    if (pull_sel == HAL_IOMUX_PIN_PULLUP_ENABLE) {\n      iomux->REG_02C |= (1 << pin);\n    } else if (pull_sel == HAL_IOMUX_PIN_PULLDOWN_ENABLE) {\n      iomux->REG_030 |= (1 << pin);\n    }\n  } else if (pin == HAL_IOMUX_PIN_LED1 || pin == HAL_IOMUX_PIN_LED2) {\n    pmu_led_set_pull_select(pin, pull_sel);\n  }\n\n  return 0;\n}\n\nvoid hal_iomux_set_sdmmc_dt_n_out_group(int enable) {}\n\nvoid hal_iomux_set_uart0_voltage(enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt) {\n  uart0_volt = volt;\n}\n\nvoid hal_iomux_set_uart1_voltage(enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt) {}\n\nbool hal_iomux_uart0_connected(void) {\n  uint32_t reg_050, reg_008, reg_02c, reg_030;\n  uint32_t mask;\n  int val;\n\n  // Save current iomux settings\n  reg_050 = iomux->REG_050;\n  reg_008 = iomux->REG_008;\n  reg_02c = iomux->REG_02C;\n  reg_030 = iomux->REG_030;\n\n  // Disable analog I2C slave & master\n  iomux->REG_050 |= IOMUX_GPIO_I2C_MODE | IOMUX_I2C0_M_SEL_GPIO;\n  // Set uart0-rx as gpio\n  iomux->REG_008 =\n      SET_BITFIELD(iomux->REG_008, IOMUX_GPIO_P16_SEL, IOMUX_FUNC_VAL_GPIO);\n\n  mask = (1 << HAL_IOMUX_PIN_P1_6);\n  // Set voltage domain\n  if (uart0_volt == HAL_IOMUX_PIN_VOLTAGE_VIO) {\n    iomux->REG_070 |= (1 << (IOMUX_GPIO_P1_PWS_SHIFT + 1));\n  } else {\n    iomux->REG_070 &= ~(1 << (IOMUX_GPIO_P1_PWS_SHIFT + 1));\n  }\n  // Clear pullup\n  iomux->REG_02C &= ~mask;\n  // Setup pulldown\n  iomux->REG_030 |= mask;\n\n  hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)HAL_IOMUX_PIN_P1_6, HAL_GPIO_DIR_IN,\n                       0);\n\n  hal_sys_timer_delay(MS_TO_TICKS(2));\n\n  val = hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)HAL_IOMUX_PIN_P1_6);\n\n  // Restore iomux settings\n  iomux->REG_030 = reg_030;\n  iomux->REG_02C = reg_02c;\n  iomux->REG_008 = reg_008;\n  iomux->REG_050 = reg_050;\n\n  hal_sys_timer_delay(MS_TO_TICKS(2));\n\n  return !!val;\n}\n\nbool hal_iomux_uart1_connected(void) {\n  uint32_t reg_00c, reg_02c, reg_030;\n  uint32_t mask;\n  int val;\n\n  // Save current iomux settings\n  reg_00c = iomux->REG_00C;\n  reg_02c = iomux->REG_02C;\n  reg_030 = iomux->REG_030;\n\n  // Set uart1-rx as gpio\n  iomux->REG_00C =\n      SET_BITFIELD(iomux->REG_00C, IOMUX_GPIO_P20_SEL, IOMUX_FUNC_VAL_GPIO);\n\n  mask = (1 << HAL_IOMUX_PIN_P2_0);\n  // Clear pullup\n  iomux->REG_02C &= ~mask;\n  // Setup pulldown\n  iomux->REG_030 |= mask;\n\n  hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)HAL_IOMUX_PIN_P2_0, HAL_GPIO_DIR_IN,\n                       0);\n\n  hal_sys_timer_delay(MS_TO_TICKS(2));\n\n  val = hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)HAL_IOMUX_PIN_P2_0);\n\n  // Restore iomux settings\n  iomux->REG_030 = reg_030;\n  iomux->REG_02C = reg_02c;\n  iomux->REG_00C = reg_00c;\n\n  hal_sys_timer_delay(MS_TO_TICKS(2));\n\n  return !!val;\n}\n\nvoid hal_iomux_set_uart0(void) {\n  uint32_t mask;\n\n  // Disable analog I2C slave & master\n  iomux->REG_050 |= IOMUX_GPIO_I2C_MODE | IOMUX_I2C0_M_SEL_GPIO;\n  // Set uart0 func\n  iomux->REG_008 =\n      (iomux->REG_008 & ~(IOMUX_GPIO_P16_SEL_MASK | IOMUX_GPIO_P17_SEL_MASK)) |\n      IOMUX_GPIO_P16_SEL(1) | IOMUX_GPIO_P17_SEL(1);\n\n  mask = (1 << HAL_IOMUX_PIN_P1_6) | (1 << HAL_IOMUX_PIN_P1_7);\n  // Set voltage domain\n  if (uart0_volt == HAL_IOMUX_PIN_VOLTAGE_VIO) {\n    iomux->REG_070 |= (1 << (IOMUX_GPIO_P1_PWS_SHIFT + 1));\n  } else {\n    iomux->REG_070 &= ~(1 << (IOMUX_GPIO_P1_PWS_SHIFT + 1));\n  }\n  // Setup pullup\n  iomux->REG_02C |= (1 << HAL_IOMUX_PIN_P1_6);\n  iomux->REG_02C &= ~(1 << HAL_IOMUX_PIN_P1_7);\n  // Clear pulldown\n  iomux->REG_030 &= ~mask;\n}\n\nvoid hal_iomux_set_uart1(void) {\n  uint32_t mask;\n\n  // Set uart1 func\n  iomux->REG_00C =\n      (iomux->REG_00C & ~(IOMUX_GPIO_P20_SEL_MASK | IOMUX_GPIO_P21_SEL_MASK)) |\n      IOMUX_GPIO_P20_SEL(1) | IOMUX_GPIO_P21_SEL(1);\n\n  mask = (1 << HAL_IOMUX_PIN_P2_0) | (1 << HAL_IOMUX_PIN_P2_1);\n  // Setup pullup\n  iomux->REG_02C |= (1 << HAL_IOMUX_PIN_P2_0);\n  iomux->REG_02C &= ~(1 << HAL_IOMUX_PIN_P2_1);\n  // Clear pulldown\n  iomux->REG_030 &= ~mask;\n}\n\nvoid hal_iomux_set_uart2(void) {}\n\nvoid hal_iomux_set_analog_i2c(void) {\n  uint32_t mask;\n\n  // Disable analog I2C master\n  iomux->REG_050 |= IOMUX_I2C0_M_SEL_GPIO;\n  // Set mcu GPIO func\n  iomux->REG_008 =\n      (iomux->REG_008 & ~(IOMUX_GPIO_P16_SEL_MASK | IOMUX_GPIO_P17_SEL_MASK)) |\n      IOMUX_GPIO_P16_SEL(0) | IOMUX_GPIO_P17_SEL(0);\n  // Enable analog I2C slave\n  iomux->REG_050 &= ~IOMUX_GPIO_I2C_MODE;\n\n  mask = (1 << HAL_IOMUX_PIN_P1_6) | (1 << HAL_IOMUX_PIN_P1_7);\n  // Set voltage domain\n  if (uart0_volt == HAL_IOMUX_PIN_VOLTAGE_VIO) {\n    iomux->REG_070 |= (1 << (IOMUX_GPIO_P1_PWS_SHIFT + 1));\n  } else {\n    iomux->REG_070 &= ~(1 << (IOMUX_GPIO_P1_PWS_SHIFT + 1));\n  }\n  // Setup pullup\n  iomux->REG_02C |= mask;\n  // Clear pulldown\n  iomux->REG_030 &= ~mask;\n}\n\nvoid hal_iomux_set_jtag(void) {\n  uint32_t mask;\n  uint32_t val;\n\n  // SWCLK/TCK, SWDIO/TMS\n  mask = IOMUX_GPIO_P01_SEL_MASK | IOMUX_GPIO_P02_SEL_MASK;\n  val = IOMUX_GPIO_P01_SEL(7) | IOMUX_GPIO_P02_SEL(7);\n\n  // TDI, TDO\n#ifdef JTAG_TDI_TDO_PIN\n  mask |= IOMUX_GPIO_P00_SEL_MASK | IOMUX_GPIO_P03_SEL_MASK;\n  val |= IOMUX_GPIO_P00_SEL(7) | IOMUX_GPIO_P03_SEL(7);\n#endif\n  iomux->REG_004 = (iomux->REG_004 & ~mask) | val;\n\n  // RESET\n#if defined(JTAG_RESET_PIN) || defined(JTAG_TDI_TDO_PIN)\n  iomux->REG_00C =\n      (iomux->REG_00C & ~(IOMUX_GPIO_P20_SEL_MASK)) | IOMUX_GPIO_P20_SEL(7);\n#endif\n\n  mask = (1 << HAL_IOMUX_PIN_P0_1) | (1 << HAL_IOMUX_PIN_P0_2);\n#ifdef JTAG_TDI_TDO_PIN\n  mask |= (1 << HAL_IOMUX_PIN_P0_0) | (1 << HAL_IOMUX_PIN_P0_3);\n#endif\n#if defined(JTAG_RESET_PIN) || defined(JTAG_TDI_TDO_PIN)\n  mask |= (1 << HAL_IOMUX_PIN_P2_0);\n#endif\n  // Clear pullup\n  iomux->REG_02C &= ~mask;\n  // Clear pulldown\n  iomux->REG_030 &= ~mask;\n}\n\nenum HAL_IOMUX_ISPI_ACCESS_T\nhal_iomux_ispi_access_enable(enum HAL_IOMUX_ISPI_ACCESS_T access) {\n  uint32_t v;\n\n  v = iomux->REG_044;\n  iomux->REG_044 |= access;\n\n  return v;\n}\n\nenum HAL_IOMUX_ISPI_ACCESS_T\nhal_iomux_ispi_access_disable(enum HAL_IOMUX_ISPI_ACCESS_T access) {\n  uint32_t v;\n\n  v = iomux->REG_044;\n  iomux->REG_044 &= ~access;\n\n  return v;\n}\n\nvoid hal_iomux_ispi_access_init(void) {\n  // Disable bt spi access ana/pmu interface\n  hal_iomux_ispi_access_disable(HAL_IOMUX_ISPI_BT_ANA | HAL_IOMUX_ISPI_BT_PMU);\n}\n\nvoid hal_iomux_set_i2s0(void) {\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_i2s[] = {\n      {HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_I2S0_SDI0, I2S0_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n      {HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_I2S0_SDO, I2S0_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n      {HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_I2S0_WS, I2S0_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n      {HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_I2S0_SCK, I2S0_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n  };\n\n  hal_iomux_init(pinmux_i2s, ARRAY_SIZE(pinmux_i2s));\n}\n\nvoid hal_iomux_set_i2s1(void) {\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_i2s[] = {\n#if (I2S1_IOMUX_INDEX == 30)\n    {HAL_IOMUX_PIN_P3_2, HAL_IOMUX_FUNC_I2S1_SDI0, I2S1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P3_3, HAL_IOMUX_FUNC_I2S1_SDO, I2S1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P3_1, HAL_IOMUX_FUNC_I2S1_WS, I2S1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P3_0, HAL_IOMUX_FUNC_I2S1_SCK, I2S1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P1_4, HAL_IOMUX_FUNC_I2S1_SDI0, I2S1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_I2S1_SDO, I2S1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_I2S1_WS, I2S1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_I2S1_SCK, I2S1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n  };\n#endif\n    hal_iomux_init(pinmux_i2s, ARRAY_SIZE(pinmux_i2s));\n}\n\nvoid hal_iomux_set_i2s_mclk(void) {\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux[] = {\n#if (I2S_MCLK_IOMUX_INDEX == 13)\n    {HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_I2S0_MCLK, I2S0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (I2S_MCLK_IOMUX_INDEX == 15)\n    {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_I2S0_MCLK, I2S0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (I2S_MCLK_IOMUX_INDEX == 20)\n    {HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_I2S0_MCLK, I2S0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (I2S_MCLK_IOMUX_INDEX == 22)\n    {HAL_IOMUX_PIN_P2_2, HAL_IOMUX_FUNC_I2S0_MCLK, I2S0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P0_4, HAL_IOMUX_FUNC_I2S0_MCLK, I2S0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n  };\n\n  hal_iomux_init(pinmux, ARRAY_SIZE(pinmux));\n}\n\nvoid hal_iomux_set_spdif0(void) {\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_spdif[] = {\n#if (SPDIF0_IOMUX_INDEX == 20)\n    {HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_SPDIF0_DI, SPDIF0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n    {HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_SPDIF0_DO, SPDIF0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (SPDIF0_IOMUX_INDEX == 26)\n    {HAL_IOMUX_PIN_P2_6, HAL_IOMUX_FUNC_SPDIF0_DI, SPDIF0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n    {HAL_IOMUX_PIN_P2_7, HAL_IOMUX_FUNC_SPDIF0_DO, SPDIF0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_SPDIF0_DI, SPDIF0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n    {HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_SPDIF0_DO, SPDIF0_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n  };\n\n  hal_iomux_init(pinmux_spdif, ARRAY_SIZE(pinmux_spdif));\n}\n\nvoid hal_iomux_set_spdif1(void) {}\n\nvoid hal_iomux_set_dig_mic(uint32_t map) {\n  struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_digitalmic_clk[] = {\n      {HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_PDM0_CK, DIGMIC_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n  };\n  struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_digitalmic0[] = {\n      {HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_PDM0_D, DIGMIC_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n  };\n  struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_digitalmic1[] = {\n      {HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_PDM1_D, DIGMIC_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n  };\n  struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_digitalmic2[] = {\n      {HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_PDM2_D, DIGMIC_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n  };\n\n  if (digmic_ck_pin == HAL_IOMUX_PIN_P0_0) {\n    pinmux_digitalmic_clk[0].pin = HAL_IOMUX_PIN_P0_0;\n    pinmux_digitalmic_clk[0].function = HAL_IOMUX_FUNC_PDM0_CK;\n  } else if (digmic_ck_pin == HAL_IOMUX_PIN_P0_4) {\n    pinmux_digitalmic_clk[0].pin = HAL_IOMUX_PIN_P0_4;\n    pinmux_digitalmic_clk[0].function = HAL_IOMUX_FUNC_PDM1_CK;\n  } else if (digmic_ck_pin == HAL_IOMUX_PIN_P3_3) {\n    pinmux_digitalmic_clk[0].pin = HAL_IOMUX_PIN_P3_3;\n    pinmux_digitalmic_clk[0].function = HAL_IOMUX_FUNC_PDM2_CK;\n  }\n\n  if (digmic_d0_pin == HAL_IOMUX_PIN_P0_1) {\n    pinmux_digitalmic0[0].pin = HAL_IOMUX_PIN_P0_1;\n  } else if (digmic_d0_pin == HAL_IOMUX_PIN_P0_6) {\n    pinmux_digitalmic0[0].pin = HAL_IOMUX_PIN_P0_6;\n  } else if (digmic_d0_pin == HAL_IOMUX_PIN_P3_0) {\n    pinmux_digitalmic0[0].pin = HAL_IOMUX_PIN_P3_0;\n  }\n\n  if (digmic_d1_pin == HAL_IOMUX_PIN_P0_2) {\n    pinmux_digitalmic1[0].pin = HAL_IOMUX_PIN_P0_2;\n  } else if (digmic_d1_pin == HAL_IOMUX_PIN_P0_5) {\n    pinmux_digitalmic1[0].pin = HAL_IOMUX_PIN_P0_5;\n  } else if (digmic_d1_pin == HAL_IOMUX_PIN_P3_1) {\n    pinmux_digitalmic1[0].pin = HAL_IOMUX_PIN_P3_1;\n  }\n\n  if (digmic_d2_pin == HAL_IOMUX_PIN_P0_3) {\n    pinmux_digitalmic2[0].pin = HAL_IOMUX_PIN_P0_3;\n  } else if (digmic_d2_pin == HAL_IOMUX_PIN_P0_7) {\n    pinmux_digitalmic2[0].pin = HAL_IOMUX_PIN_P0_7;\n  } else if (digmic_d2_pin == HAL_IOMUX_PIN_P3_2) {\n    pinmux_digitalmic2[0].pin = HAL_IOMUX_PIN_P3_2;\n  }\n\n  if ((map & 0xF) == 0) {\n    pinmux_digitalmic_clk[0].function = HAL_IOMUX_FUNC_GPIO;\n  }\n  hal_iomux_init(pinmux_digitalmic_clk, ARRAY_SIZE(pinmux_digitalmic_clk));\n  if (map & (1 << 0)) {\n    hal_iomux_init(pinmux_digitalmic0, ARRAY_SIZE(pinmux_digitalmic0));\n  }\n  if (map & (1 << 1)) {\n    hal_iomux_init(pinmux_digitalmic1, ARRAY_SIZE(pinmux_digitalmic1));\n  }\n  if (map & (1 << 2)) {\n    hal_iomux_init(pinmux_digitalmic2, ARRAY_SIZE(pinmux_digitalmic2));\n  }\n}\n\nvoid hal_iomux_set_spi(void) {\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_spi_3wire[3] = {\n    {HAL_IOMUX_PIN_P0_5, HAL_IOMUX_FUNC_SPI_CLK, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P0_6, HAL_IOMUX_FUNC_SPI_CS0, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P0_7, HAL_IOMUX_FUNC_SPI_DIO, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#ifdef SPI_IOMUX_CS1_INDEX\n#if (SPI_IOMUX_CS1_INDEX == 35)\n    {HAL_IOMUX_PIN_P3_5, HAL_IOMUX_FUNC_SPI_CS1, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_SPI_CS1, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#endif\n#ifdef SPI_IOMUX_CS2_INDEX\n#if (SPI_IOMUX_CS2_INDEX == 37)\n    {HAL_IOMUX_PIN_P3_7, HAL_IOMUX_FUNC_SPI_CS2, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P1_1, HAL_IOMUX_FUNC_SPI_CS2, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#endif\n#ifdef SPI_IOMUX_CS3_INDEX\n#if (SPI_IOMUX_CS3_INDEX == 25)\n    {HAL_IOMUX_PIN_P2_5, HAL_IOMUX_FUNC_SPI_CS3, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_SPI_CS3, SPI_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#endif\n  };\n#ifdef SPI_IOMUX_4WIRE\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_spi_4wire[1] = {\n      {HAL_IOMUX_PIN_P0_4, HAL_IOMUX_FUNC_SPI_DI0, SPI_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n#ifdef SPI_IOMUX_DI1_INDEX\n      {HAL_IOMUX_PIN_P3_4, HAL_IOMUX_FUNC_SPI_DI1, SPI_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n#endif\n#ifdef SPI_IOMUX_DI2_INDEX\n      {HAL_IOMUX_PIN_P3_6, HAL_IOMUX_FUNC_SPI_DI2, SPI_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n#endif\n#ifdef SPI_IOMUX_DI3_INDEX\n      {HAL_IOMUX_PIN_P2_4, HAL_IOMUX_FUNC_SPI_DI3, SPI_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_NOPULL},\n#endif\n  };\n#endif\n\n  hal_iomux_init(pinmux_spi_3wire, ARRAY_SIZE(pinmux_spi_3wire));\n#ifdef SPI_IOMUX_4WIRE\n  hal_iomux_init(pinmux_spi_4wire, ARRAY_SIZE(pinmux_spi_4wire));\n#endif\n}\n\nvoid hal_iomux_set_spilcd(void) {\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_spilcd_3wire[] = {\n#if (SPILCD_IOMUX_INDEX == 10)\n    {HAL_IOMUX_PIN_P1_0, HAL_IOMUX_FUNC_SPILCD_CLK, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P1_1, HAL_IOMUX_FUNC_SPILCD_CS0, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_SPILCD_DIO, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (SPILCD_IOMUX_INDEX == 35)\n    {HAL_IOMUX_PIN_P3_7, HAL_IOMUX_FUNC_SPILCD_CLK, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P3_6, HAL_IOMUX_FUNC_SPILCD_CS0, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P3_5, HAL_IOMUX_FUNC_SPILCD_DIO, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_SPILCD_CLK, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_SPILCD_CS0, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n    {HAL_IOMUX_PIN_P0_1, HAL_IOMUX_FUNC_SPILCD_DIO, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#ifdef SPILCD_IOMUX_CS1_INDEX\n#if (SPILCD_IOMUX_CS1_INDEX == 12)\n    {HAL_IOMUX_PIN_P1_2, HAL_IOMUX_FUNC_SPILCD_CS1, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (SPILCD_IOMUX_CS1_INDEX == 27)\n    {HAL_IOMUX_PIN_P2_7, HAL_IOMUX_FUNC_SPILCD_CS1, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (SPILCD_IOMUX_CS1_INDEX == 30)\n    {HAL_IOMUX_PIN_P3_0, HAL_IOMUX_FUNC_SPILCD_CS1, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P0_5, HAL_IOMUX_FUNC_SPILCD_CS1, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#endif\n#ifdef SPILCD_IOMUX_CS2_INDEX\n#if (SPILCD_IOMUX_CS2_INDEX == 31)\n    {HAL_IOMUX_PIN_P3_1, HAL_IOMUX_FUNC_SPILCD_CS2, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P0_6, HAL_IOMUX_FUNC_SPILCD_CS2, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#endif\n#ifdef SPILCD_IOMUX_CS3_INDEX\n#if (SPILCD_IOMUX_CS3_INDEX == 31)\n    {HAL_IOMUX_PIN_P3_1, HAL_IOMUX_FUNC_SPILCD_CS3, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (SPILCD_IOMUX_CS3_INDEX == 32)\n    {HAL_IOMUX_PIN_P3_2, HAL_IOMUX_FUNC_SPILCD_CS3, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P0_7, HAL_IOMUX_FUNC_SPILCD_CS3, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#endif\n  };\n#ifdef SPILCD_IOMUX_4WIRE\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_spilcd_4wire[] = {\n#ifdef SPILCD_IOMUX_DI0_INDEX\n#if (SPILCD_IOMUX_DI0_INDEX == 14)\n    {HAL_IOMUX_PIN_P1_4, HAL_IOMUX_FUNC_SPILCD_DI0, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (SPILCD_IOMUX_DI0_INDEX == 34)\n    {HAL_IOMUX_PIN_P3_4, HAL_IOMUX_FUNC_SPILCD_DI0, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P0_0, HAL_IOMUX_FUNC_SPILCD_DI0, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#endif\n#ifdef SPILCD_IOMUX_DI1_INDEX\n    {HAL_IOMUX_PIN_P2_6, HAL_IOMUX_FUNC_SPILCD_DI1, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#ifdef SPILCD_IOMUX_DI2_INDEX\n    {HAL_IOMUX_PIN_P3_0, HAL_IOMUX_FUNC_SPILCD_DI2, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n#ifdef SPILCD_IOMUX_DI3_INDEX\n    {HAL_IOMUX_PIN_P3_3, HAL_IOMUX_FUNC_SPILCD_DI3, SPILCD_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n  };\n#endif\n\n  hal_iomux_init(pinmux_spilcd_3wire, ARRAY_SIZE(pinmux_spilcd_3wire));\n#ifdef SPILCD_IOMUX_4WIRE\n  hal_iomux_init(pinmux_spilcd_4wire, ARRAY_SIZE(pinmux_spilcd_4wire));\n#endif\n}\n\nvoid hal_iomux_set_i2c0(void) {\n#if (I2C0_IOMUX_INDEX == 16)\n  hal_iomux_set_analog_i2c();\n  // IOMUX_GPIO_I2C_MODE should be kept in disabled state\n  iomux->REG_050 &= ~IOMUX_I2C0_M_SEL_GPIO;\n#else\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_i2c[] = {\n      {HAL_IOMUX_PIN_P2_0, HAL_IOMUX_FUNC_I2C_M0_SCL, I2C0_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_PULLUP_ENABLE},\n      {HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_I2C_M0_SDA, I2C0_VOLTAGE_SEL,\n       HAL_IOMUX_PIN_PULLUP_ENABLE},\n  };\n\n  hal_iomux_init(pinmux_i2c, ARRAY_SIZE(pinmux_i2c));\n#endif\n}\n\nvoid hal_iomux_set_i2c1(void) {\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_i2c[] = {\n#if (I2C1_IOMUX_INDEX == 22)\n    {HAL_IOMUX_PIN_P2_2, HAL_IOMUX_FUNC_I2C_M1_SCL, I2C1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n    {HAL_IOMUX_PIN_P2_3, HAL_IOMUX_FUNC_I2C_M1_SDA, I2C1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n#else\n    {HAL_IOMUX_PIN_P0_2, HAL_IOMUX_FUNC_I2C_M1_SCL, I2C1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n    {HAL_IOMUX_PIN_P0_3, HAL_IOMUX_FUNC_I2C_M1_SDA, I2C1_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n#endif\n  };\n\n  hal_iomux_init(pinmux_i2c, ARRAY_SIZE(pinmux_i2c));\n  iomux->REG_050 |= IOMUX_I2C1_M_SEL_GPIO;\n}\n\nvoid hal_iomux_set_clock_out(void) {\n  static const struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_clkout[] = {\n#if (CLKOUT_IOMUX_INDEX == 13)\n    {HAL_IOMUX_PIN_P1_3, HAL_IOMUX_FUNC_CLK_OUT, CLKOUT_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (CLKOUT_IOMUX_INDEX == 15)\n    {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_CLK_OUT, CLKOUT_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (CLKOUT_IOMUX_INDEX == 21)\n    {HAL_IOMUX_PIN_P2_1, HAL_IOMUX_FUNC_CLK_OUT, CLKOUT_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (CLKOUT_IOMUX_INDEX == 23)\n    {HAL_IOMUX_PIN_P2_3, HAL_IOMUX_FUNC_CLK_OUT, CLKOUT_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (CLKOUT_IOMUX_INDEX == 27)\n    {HAL_IOMUX_PIN_P2_7, HAL_IOMUX_FUNC_CLK_OUT, CLKOUT_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#elif (CLKOUT_IOMUX_INDEX == 34)\n    {HAL_IOMUX_PIN_P3_4, HAL_IOMUX_FUNC_CLK_OUT, CLKOUT_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#else\n    {HAL_IOMUX_PIN_P0_4, HAL_IOMUX_FUNC_CLK_OUT, CLKOUT_VOLTAGE_SEL,\n     HAL_IOMUX_PIN_NOPULL},\n#endif\n  };\n\n  hal_iomux_init(pinmux_clkout, ARRAY_SIZE(pinmux_clkout));\n}\n\nvoid hal_iomux_set_mcu_clock_out(void) {}\n\nvoid hal_iomux_set_bt_clock_out(void) {}\n\nvoid hal_iomux_set_bt_tport(void) {\n  // P0_0 ~ P0_3,\n  iomux->REG_004 =\n      (iomux->REG_004 & ~(IOMUX_GPIO_P00_SEL_MASK | IOMUX_GPIO_P01_SEL_MASK |\n                          IOMUX_GPIO_P02_SEL_MASK | IOMUX_GPIO_P03_SEL_MASK)) |\n      IOMUX_GPIO_P00_SEL(0xA) | IOMUX_GPIO_P01_SEL(0xA) |\n      IOMUX_GPIO_P02_SEL(0xA) | IOMUX_GPIO_P03_SEL(0xA);\n#ifdef TPORTS_KEY_COEXIST\n  // P1_1 ~ P1_2,\n  iomux->REG_008 =\n      (iomux->REG_008 & ~(IOMUX_GPIO_P11_SEL_MASK | IOMUX_GPIO_P12_SEL_MASK)) |\n      IOMUX_GPIO_P11_SEL(0xA) | IOMUX_GPIO_P12_SEL(0xA);\n#else\n  // P1_0 ~ P1_3,\n  iomux->REG_008 =\n      (iomux->REG_008 & ~(IOMUX_GPIO_P10_SEL_MASK | IOMUX_GPIO_P11_SEL_MASK |\n                          IOMUX_GPIO_P12_SEL_MASK | IOMUX_GPIO_P13_SEL_MASK)) |\n      IOMUX_GPIO_P10_SEL(0xA) | IOMUX_GPIO_P11_SEL(0xA) |\n      IOMUX_GPIO_P12_SEL(0xA) | IOMUX_GPIO_P13_SEL(0xA);\n#endif\n  // ANA TEST DIR\n  iomux->REG_014 = 0x0f0f;\n  // ANA TEST SEL\n  iomux->REG_018 = IOMUX_ANA_TEST_SEL(5);\n}\n\nvoid hal_iomux_set_bt_rf_sw(int rx_on, int tx_on) {\n  uint32_t val;\n  uint32_t dir;\n\n  // iomux->REG_004 = (iomux->REG_004 & ~(IOMUX_GPIO_P00_SEL_MASK |\n  // IOMUX_GPIO_P01_SEL_MASK)) |\n  //    IOMUX_GPIO_P00_SEL(6) | IOMUX_GPIO_P01_SEL(6);\n\n  val = iomux->REG_004;\n  dir = 0;\n  if (rx_on) {\n    val = SET_BITFIELD(val, IOMUX_GPIO_P00_SEL, 0xA);\n    dir = (1 << HAL_IOMUX_PIN_P0_0);\n  }\n  if (tx_on) {\n    val = SET_BITFIELD(val, IOMUX_GPIO_P01_SEL, 0xA);\n    dir = (1 << HAL_IOMUX_PIN_P0_1);\n  }\n  iomux->REG_004 = val;\n  // ANA TEST DIR\n  iomux->REG_014 |= dir;\n  // ANA TEST SEL\n  iomux->REG_018 = IOMUX_ANA_TEST_SEL(5);\n}\n\nint WEAK hal_pwrkey_set_irq(enum HAL_PWRKEY_IRQ_T type) { return 0; }\n\nbool WEAK hal_pwrkey_pressed(void) { return 0; }\n\nbool hal_pwrkey_startup_pressed(void) { return hal_pwrkey_pressed(); }\n\nenum HAL_PWRKEY_IRQ_T WEAK hal_pwrkey_get_irq_state(void) {\n  enum HAL_PWRKEY_IRQ_T state = HAL_PWRKEY_IRQ_NONE;\n\n  return state;\n}\n\nconst struct HAL_IOMUX_PIN_FUNCTION_MAP iomux_tport[] = {\n    /*    {HAL_IOMUX_PIN_P1_1, HAL_IOMUX_FUNC_AS_GPIO,\n       HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE},*/\n    {HAL_IOMUX_PIN_P1_5, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n     HAL_IOMUX_PIN_PULLUP_ENABLE},\n};\n\nint hal_iomux_tportopen(void) {\n  int i;\n\n  for (i = 0;\n       i < sizeof(iomux_tport) / sizeof(struct HAL_IOMUX_PIN_FUNCTION_MAP);\n       i++) {\n    hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)&iomux_tport[i], 1);\n    hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)iomux_tport[i].pin,\n                         HAL_GPIO_DIR_OUT, 0);\n  }\n  return 0;\n}\n\nint hal_iomux_tportset(int port) {\n  hal_gpio_pin_set((enum HAL_GPIO_PIN_T)iomux_tport[port].pin);\n  return 0;\n}\n\nint hal_iomux_tportclr(int port) {\n  hal_gpio_pin_clr((enum HAL_GPIO_PIN_T)iomux_tport[port].pin);\n  return 0;\n}\n\nvoid hal_iomux_set_codec_gpio_trigger(enum HAL_IOMUX_PIN_T pin, bool polarity) {\n  iomux->REG_064 = SET_BITFIELD(iomux->REG_064, IOMUX_CFG_CODEC_TRIG_SEL, pin);\n  if (polarity) {\n    iomux->REG_064 &= ~IOMUX_CFG_CODEC_TRIG_POL;\n  } else {\n    iomux->REG_064 |= IOMUX_CFG_CODEC_TRIG_POL;\n  }\n}\n"
  },
  {
    "path": "platform/hal/best2300p/hal_iomux_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_IOMUX_BEST2300P_H__\n#define __HAL_IOMUX_BEST2300P_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\n#ifndef ROM_BUILD\n#define PMU_HAS_LED_PIN\n#endif\n\nenum HAL_IOMUX_PIN_T {\n    HAL_IOMUX_PIN_P0_0 = 0,\n    HAL_IOMUX_PIN_P0_1,\n    HAL_IOMUX_PIN_P0_2,\n    HAL_IOMUX_PIN_P0_3,\n    HAL_IOMUX_PIN_P0_4,\n    HAL_IOMUX_PIN_P0_5,\n    HAL_IOMUX_PIN_P0_6,\n    HAL_IOMUX_PIN_P0_7,\n\n    HAL_IOMUX_PIN_P1_0,\n    HAL_IOMUX_PIN_P1_1,\n    HAL_IOMUX_PIN_P1_2,\n    HAL_IOMUX_PIN_P1_3,\n    HAL_IOMUX_PIN_P1_4,\n    HAL_IOMUX_PIN_P1_5,\n    HAL_IOMUX_PIN_P1_6,\n    HAL_IOMUX_PIN_P1_7,\n\n    HAL_IOMUX_PIN_P2_0,\n    HAL_IOMUX_PIN_P2_1,\n    HAL_IOMUX_PIN_P2_2,\n    HAL_IOMUX_PIN_P2_3,\n    HAL_IOMUX_PIN_P2_4,\n    HAL_IOMUX_PIN_P2_5,\n    HAL_IOMUX_PIN_P2_6,\n    HAL_IOMUX_PIN_P2_7,\n\n    HAL_IOMUX_PIN_P3_0,\n    HAL_IOMUX_PIN_P3_1,\n    HAL_IOMUX_PIN_P3_2,\n    HAL_IOMUX_PIN_P3_3,\n    HAL_IOMUX_PIN_P3_4,\n    HAL_IOMUX_PIN_P3_5,\n    HAL_IOMUX_PIN_P3_6,\n    HAL_IOMUX_PIN_P3_7,\n\n    HAL_IOMUX_PIN_NUM,\n\n    HAL_IOMUX_PIN_LED1 = HAL_IOMUX_PIN_NUM,\n    HAL_IOMUX_PIN_LED2,\n\n    HAL_IOMUX_PIN_LED_NUM,\n};\n\nenum HAL_GPIO_PIN_T {\n    HAL_GPIO_PIN_P0_0 = HAL_IOMUX_PIN_P0_0,\n    HAL_GPIO_PIN_P0_1 = HAL_IOMUX_PIN_P0_1,\n    HAL_GPIO_PIN_P0_2 = HAL_IOMUX_PIN_P0_2,\n    HAL_GPIO_PIN_P0_3 = HAL_IOMUX_PIN_P0_3,\n    HAL_GPIO_PIN_P0_4 = HAL_IOMUX_PIN_P0_4,\n    HAL_GPIO_PIN_P0_5 = HAL_IOMUX_PIN_P0_5,\n    HAL_GPIO_PIN_P0_6 = HAL_IOMUX_PIN_P0_6,\n    HAL_GPIO_PIN_P0_7 = HAL_IOMUX_PIN_P0_7,\n\n    HAL_GPIO_PIN_P1_0 = HAL_IOMUX_PIN_P1_0,\n    HAL_GPIO_PIN_P1_1 = HAL_IOMUX_PIN_P1_1,\n    HAL_GPIO_PIN_P1_2 = HAL_IOMUX_PIN_P1_2,\n    HAL_GPIO_PIN_P1_3 = HAL_IOMUX_PIN_P1_3,\n    HAL_GPIO_PIN_P1_4 = HAL_IOMUX_PIN_P1_4,\n    HAL_GPIO_PIN_P1_5 = HAL_IOMUX_PIN_P1_5,\n    HAL_GPIO_PIN_P1_6 = HAL_IOMUX_PIN_P1_6,\n    HAL_GPIO_PIN_P1_7 = HAL_IOMUX_PIN_P1_7,\n\n    HAL_GPIO_PIN_P2_0 = HAL_IOMUX_PIN_P2_0,\n    HAL_GPIO_PIN_P2_1 = HAL_IOMUX_PIN_P2_1,\n    HAL_GPIO_PIN_P2_2 = HAL_IOMUX_PIN_P2_2,\n    HAL_GPIO_PIN_P2_3 = HAL_IOMUX_PIN_P2_3,\n    HAL_GPIO_PIN_P2_4 = HAL_IOMUX_PIN_P2_4,\n    HAL_GPIO_PIN_P2_5 = HAL_IOMUX_PIN_P2_5,\n    HAL_GPIO_PIN_P2_6 = HAL_IOMUX_PIN_P2_6,\n    HAL_GPIO_PIN_P2_7 = HAL_IOMUX_PIN_P2_7,\n\n    HAL_GPIO_PIN_P3_0 = HAL_IOMUX_PIN_P3_0,\n    HAL_GPIO_PIN_P3_1 = HAL_IOMUX_PIN_P3_1,\n    HAL_GPIO_PIN_P3_2 = HAL_IOMUX_PIN_P3_2,\n    HAL_GPIO_PIN_P3_3 = HAL_IOMUX_PIN_P3_3,\n    HAL_GPIO_PIN_P3_4 = HAL_IOMUX_PIN_P3_4,\n    HAL_GPIO_PIN_P3_5 = HAL_IOMUX_PIN_P3_5,\n    HAL_GPIO_PIN_P3_6 = HAL_IOMUX_PIN_P3_6,\n    HAL_GPIO_PIN_P3_7 = HAL_IOMUX_PIN_P3_7,\n\n    HAL_GPIO_PIN_NUM = HAL_IOMUX_PIN_NUM,\n\n    HAL_GPIO_PIN_LED1 = HAL_IOMUX_PIN_LED1,\n    HAL_GPIO_PIN_LED2 = HAL_IOMUX_PIN_LED2,\n\n    HAL_GPIO_PIN_LED_NUM = HAL_IOMUX_PIN_LED_NUM,\n};\n\nenum HAL_IOMUX_FUNCTION_T {\n    HAL_IOMUX_FUNC_NONE = 0,\n    HAL_IOMUX_FUNC_GPIO,\n    HAL_IOMUX_FUNC_AS_GPIO = HAL_IOMUX_FUNC_GPIO,\n    HAL_IOMUX_FUNC_BT_UART_CTS,\n    HAL_IOMUX_FUNC_BT_UART_RTS,\n    HAL_IOMUX_FUNC_BT_UART_RX,\n    HAL_IOMUX_FUNC_BT_UART_TX,\n    HAL_IOMUX_FUNC_CLK_32K_IN,\n    HAL_IOMUX_FUNC_CLK_REQ_IN,\n    HAL_IOMUX_FUNC_CLK_REQ_OUT,\n    HAL_IOMUX_FUNC_CLK_OUT,\n    HAL_IOMUX_FUNC_I2C_M0_SCL,\n    HAL_IOMUX_FUNC_I2C_M0_SDA,\n    HAL_IOMUX_FUNC_I2C_M1_SCL,\n    HAL_IOMUX_FUNC_I2C_M1_SDA,\n    HAL_IOMUX_FUNC_I2C_SCL,\n    HAL_IOMUX_FUNC_I2C_SDA,\n    HAL_IOMUX_FUNC_I2S0_MCLK,\n    HAL_IOMUX_FUNC_I2S0_SCK,\n    HAL_IOMUX_FUNC_I2S0_SDI0,\n    HAL_IOMUX_FUNC_I2S0_SDO,\n    HAL_IOMUX_FUNC_I2S0_WS,\n    HAL_IOMUX_FUNC_I2S1_MCLK,\n    HAL_IOMUX_FUNC_I2S1_SCK,\n    HAL_IOMUX_FUNC_I2S1_SDI0,\n    HAL_IOMUX_FUNC_I2S1_SDO,\n    HAL_IOMUX_FUNC_I2S1_WS,\n    HAL_IOMUX_FUNC_PCM_CLK,\n    HAL_IOMUX_FUNC_PCM_DI,\n    HAL_IOMUX_FUNC_PCM_DO,\n    HAL_IOMUX_FUNC_PCM_FSYNC,\n    HAL_IOMUX_FUNC_PDM0_CK,\n    HAL_IOMUX_FUNC_PDM0_D,\n    HAL_IOMUX_FUNC_PDM1_CK,\n    HAL_IOMUX_FUNC_PDM1_D,\n    HAL_IOMUX_FUNC_PDM2_CK,\n    HAL_IOMUX_FUNC_PDM2_D,\n    HAL_IOMUX_FUNC_PWM0,\n    HAL_IOMUX_FUNC_PWM1,\n    HAL_IOMUX_FUNC_PWM2,\n    HAL_IOMUX_FUNC_PWM3,\n    HAL_IOMUX_FUNC_SDMMC_CLK,\n    HAL_IOMUX_FUNC_SDMMC_CMD,\n    HAL_IOMUX_FUNC_SDMMC_DATA0,\n    HAL_IOMUX_FUNC_SDMMC_DATA1,\n    HAL_IOMUX_FUNC_SDMMC_DATA2,\n    HAL_IOMUX_FUNC_SDMMC_DATA3,\n    HAL_IOMUX_FUNC_SDMMC_DATA4,\n    HAL_IOMUX_FUNC_SDMMC_DATA5,\n    HAL_IOMUX_FUNC_SDMMC_DATA6,\n    HAL_IOMUX_FUNC_SDMMC_DATA7,\n    HAL_IOMUX_FUNC_SPDIF0_DI,\n    HAL_IOMUX_FUNC_SPDIF0_DO,\n    HAL_IOMUX_FUNC_SPI_CLK,\n    HAL_IOMUX_FUNC_SPI_CS0,\n    HAL_IOMUX_FUNC_SPI_CS1,\n    HAL_IOMUX_FUNC_SPI_CS2,\n    HAL_IOMUX_FUNC_SPI_CS3,\n    HAL_IOMUX_FUNC_SPI_DCN,\n    HAL_IOMUX_FUNC_SPI_DI0,\n    HAL_IOMUX_FUNC_SPI_DI1,\n    HAL_IOMUX_FUNC_SPI_DI2,\n    HAL_IOMUX_FUNC_SPI_DI3,\n    HAL_IOMUX_FUNC_SPI_DIO,\n    HAL_IOMUX_FUNC_SPILCD_CLK,\n    HAL_IOMUX_FUNC_SPILCD_CS0,\n    HAL_IOMUX_FUNC_SPILCD_CS1,\n    HAL_IOMUX_FUNC_SPILCD_CS2,\n    HAL_IOMUX_FUNC_SPILCD_CS3,\n    HAL_IOMUX_FUNC_SPILCD_DCN,\n    HAL_IOMUX_FUNC_SPILCD_DI0,\n    HAL_IOMUX_FUNC_SPILCD_DI1,\n    HAL_IOMUX_FUNC_SPILCD_DI2,\n    HAL_IOMUX_FUNC_SPILCD_DI3,\n    HAL_IOMUX_FUNC_SPILCD_DIO,\n    HAL_IOMUX_FUNC_UART0_RX,\n    HAL_IOMUX_FUNC_UART0_TX,\n    HAL_IOMUX_FUNC_UART1_CTS,\n    HAL_IOMUX_FUNC_UART1_RTS,\n    HAL_IOMUX_FUNC_UART1_RX,\n    HAL_IOMUX_FUNC_UART1_TX,\n    HAL_IOMUX_FUNC_UART2_RX,\n    HAL_IOMUX_FUNC_UART2_TX,\n\n    HAL_IOMUX_FUNC_END\n};\n\nenum HAL_IOMUX_ISPI_ACCESS_T {\n    HAL_IOMUX_ISPI_BT_RF            = (1 << 0),\n    HAL_IOMUX_ISPI_BT_PMU           = (1 << 1),\n    HAL_IOMUX_ISPI_BT_ANA           = (1 << 2),\n    HAL_IOMUX_ISPI_MCU_RF           = (1 << 3),\n    HAL_IOMUX_ISPI_MCU_PMU          = (1 << 4),\n    HAL_IOMUX_ISPI_MCU_ANA          = (1 << 5),\n};\n\nvoid hal_iomux_set_i2s_mclk(void);\n\nvoid hal_iomux_set_i2s1(void);\n\nvoid hal_iomux_set_mcu_clock_out(void);\n\nvoid hal_iomux_set_bt_clock_out(void);\n\nint hal_iomux_tportopen(void);\n\nint hal_iomux_tportclr(int port);\n\nint hal_iomux_tportset(int port);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/best2300p/hal_psc_best2300p.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n#include \"hal_psc.h\"\n#include \"hal_timer.h\"\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(reg_psc)\n\n#define PSC_WRITE_ENABLE 0xCAFE0000\n\nstatic struct AONPSC_T *const psc = (struct AONPSC_T *)AON_PSC_BASE;\n\nvoid BOOT_TEXT_FLASH_LOC hal_psc_init(void) {\n  // Setup wakeup mask\n  psc->REG_080 = 0xFFFFFFFF;\n  psc->REG_084 = 0xFFFFFFFF;\n}\n\nvoid SRAM_TEXT_LOC hal_psc_core_auto_power_down(void) {\n  psc->REG_018 = PSC_WRITE_ENABLE | 0;\n  psc->REG_000 = PSC_WRITE_ENABLE | PSC_AON_MCU_PG_AUTO_EN;\n  psc->REG_010 = PSC_WRITE_ENABLE | PSC_AON_MCU_POWERDN_START;\n}\n\nvoid SRAM_TEXT_LOC hal_psc_mcu_auto_power_up(void) {\n  psc->REG_014 = PSC_WRITE_ENABLE | PSC_AON_MCU_POWERUP_START;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_psc_codec_enable(void) {\n  psc->REG_078 = PSC_WRITE_ENABLE | PSC_AON_CODEC_PSW_EN_DR |\n                 PSC_AON_CODEC_RESETN_ASSERT_DR |\n                 PSC_AON_CODEC_RESETN_ASSERT_REG | PSC_AON_CODEC_ISO_EN_DR |\n                 PSC_AON_CODEC_ISO_EN_REG | PSC_AON_CODEC_CLK_STOP_DR |\n                 PSC_AON_CODEC_CLK_STOP_REG;\n  hal_sys_timer_delay(MS_TO_TICKS(1));\n  psc->REG_078 = PSC_WRITE_ENABLE | PSC_AON_CODEC_PSW_EN_DR |\n                 PSC_AON_CODEC_RESETN_ASSERT_DR | PSC_AON_CODEC_ISO_EN_DR |\n                 PSC_AON_CODEC_ISO_EN_REG | PSC_AON_CODEC_CLK_STOP_DR |\n                 PSC_AON_CODEC_CLK_STOP_REG;\n  psc->REG_078 = PSC_WRITE_ENABLE | PSC_AON_CODEC_PSW_EN_DR |\n                 PSC_AON_CODEC_RESETN_ASSERT_DR | PSC_AON_CODEC_ISO_EN_DR |\n                 PSC_AON_CODEC_CLK_STOP_DR | PSC_AON_CODEC_CLK_STOP_REG;\n  psc->REG_078 = PSC_WRITE_ENABLE | PSC_AON_CODEC_PSW_EN_DR |\n                 PSC_AON_CODEC_RESETN_ASSERT_DR | PSC_AON_CODEC_ISO_EN_DR |\n                 PSC_AON_CODEC_CLK_STOP_DR;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_psc_codec_disable(void) {\n  psc->REG_078 = PSC_WRITE_ENABLE | PSC_AON_CODEC_PSW_EN_DR |\n                 PSC_AON_CODEC_PSW_EN_REG | PSC_AON_CODEC_RESETN_ASSERT_DR |\n                 PSC_AON_CODEC_RESETN_ASSERT_REG | PSC_AON_CODEC_ISO_EN_DR |\n                 PSC_AON_CODEC_ISO_EN_REG | PSC_AON_CODEC_CLK_STOP_DR |\n                 PSC_AON_CODEC_CLK_STOP_REG;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_psc_bt_enable(void) {\n  psc->REG_038 = PSC_WRITE_ENABLE | PSC_AON_BT_PSW_EN_DR |\n                 PSC_AON_BT_RESETN_ASSERT_DR | PSC_AON_BT_RESETN_ASSERT_REG |\n                 PSC_AON_BT_ISO_EN_DR | PSC_AON_BT_ISO_EN_REG |\n                 PSC_AON_BT_CLK_STOP_DR | PSC_AON_BT_CLK_STOP_REG;\n  hal_sys_timer_delay(MS_TO_TICKS(1));\n  psc->REG_038 = PSC_WRITE_ENABLE | PSC_AON_BT_PSW_EN_DR |\n                 PSC_AON_BT_RESETN_ASSERT_DR | PSC_AON_BT_ISO_EN_DR |\n                 PSC_AON_BT_ISO_EN_REG | PSC_AON_BT_CLK_STOP_DR |\n                 PSC_AON_BT_CLK_STOP_REG;\n  psc->REG_038 = PSC_WRITE_ENABLE | PSC_AON_BT_PSW_EN_DR |\n                 PSC_AON_BT_RESETN_ASSERT_DR | PSC_AON_BT_ISO_EN_DR |\n                 PSC_AON_BT_CLK_STOP_DR | PSC_AON_BT_CLK_STOP_REG;\n  psc->REG_038 = PSC_WRITE_ENABLE | PSC_AON_BT_PSW_EN_DR |\n                 PSC_AON_BT_RESETN_ASSERT_DR | PSC_AON_BT_ISO_EN_DR |\n                 PSC_AON_BT_CLK_STOP_DR;\n\n#ifdef JTAG_BT\n  psc->REG_064 |= PSC_AON_CODEC_RESERVED(1 << 3);\n  psc->REG_064 &= ~PSC_AON_CODEC_RESERVED(1 << 2);\n#endif\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_psc_bt_disable(void) {\n#ifdef JTAG_BT\n  psc->REG_064 &= ~PSC_AON_CODEC_RESERVED(1 << 3);\n  psc->REG_064 |= PSC_AON_CODEC_RESERVED(1 << 2);\n#endif\n\n  psc->REG_038 = PSC_WRITE_ENABLE | PSC_AON_BT_PSW_EN_DR |\n                 PSC_AON_BT_PSW_EN_REG | PSC_AON_BT_RESETN_ASSERT_DR |\n                 PSC_AON_BT_RESETN_ASSERT_REG | PSC_AON_BT_ISO_EN_DR |\n                 PSC_AON_BT_ISO_EN_REG | PSC_AON_BT_CLK_STOP_DR |\n                 PSC_AON_BT_CLK_STOP_REG;\n}\n"
  },
  {
    "path": "platform/hal/best2300p/hal_sensor_eng_best2300p.c",
    "content": "#include \"cmsis_nvic.h\"\n#include \"hal_dma.h\"\n#include \"hal_sensor_eng.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(reg_sensor_eng)\n#include \"reg_timer.h\"\n#include \"string.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n\n#define MAX_RX_FRAME_NUM (5)\n\nstatic struct SENSOR_ENG_T *const sensor_eng[] = {\n    (struct SENSOR_ENG_T *)SENSOR_ENG_BASE,\n};\n\nstatic struct DUAL_TIMER_T *const sensor_eng_timer =\n    (struct DUAL_TIMER_T *)MCU_TIMER2_BASE;\n\nstatic struct HAL_DMA_DESC_T tx_dma_desc[1];\nstatic struct HAL_DMA_DESC_T rx_dma_desc[MAX_RX_FRAME_NUM];\n\nstatic HAL_SENSOR_ENG_HANDLER_T sensor_eng_handler;\n\nstatic uint8_t dma_rx_chan;\n\nstatic uint8_t *dma_rx_buf;\nstatic uint32_t dma_rx_len;\nstatic uint32_t prev_rx_pos;\n\nvoid hal_sensor_process_rx_buffer(void) {\n  if (dma_rx_len == 0) {\n    return;\n  }\n\n  uint8_t *dma_buf_active = (uint8_t *)hal_dma_get_cur_dst_addr(dma_rx_chan);\n  uint32_t result_len = 0;\n  uint8_t *curr_pos;\n\n  curr_pos = dma_rx_buf + prev_rx_pos;\n\n  // TRACE(2,\"dma_buf_active:%08x curr_pos:%08x\", dma_buf_active, curr_pos);\n\n  if (dma_buf_active < curr_pos) {\n    result_len = dma_rx_buf + dma_rx_len - curr_pos;\n    // TRACE(2,\"1:result_len:%08x, curr_pos:%08x\", result_len, curr_pos);\n    // DUMP8(\"%02x \", curr_pos, result_len);\n    if (sensor_eng_handler) {\n      sensor_eng_handler(HAL_SENSOR_ENGINE_ID_0, HAL_SENSOR_ENGINE_DEVICE_I2C0,\n                         curr_pos, result_len);\n    }\n    curr_pos = dma_rx_buf;\n  }\n\n  if (curr_pos < dma_buf_active) {\n    result_len = dma_buf_active - curr_pos;\n    // TRACE(2,\"2:result_len:%08x, curr_pos:%08x\", result_len, curr_pos);\n    // DUMP8(\"%02x \", curr_pos, result_len);\n    if (sensor_eng_handler) {\n      sensor_eng_handler(HAL_SENSOR_ENGINE_ID_0, HAL_SENSOR_ENGINE_DEVICE_I2C0,\n                         curr_pos, result_len);\n    }\n    curr_pos = dma_buf_active;\n  }\n\n  prev_rx_pos = curr_pos - dma_rx_buf;\n}\n\nstatic void hal_sensor_eng_irq_handler(void) {\n  // TRACE(2,\"%s: irq=0x%08x\", __func__, sensor_eng[0]->SENSOR_INTR_STS);\n\n  sensor_eng[0]->SENSOR_INTR_CLR = SENSOR_INTR_CLEAR;\n\n  hal_sensor_process_rx_buffer();\n}\n\nstatic void hal_sensor_eng_irq_enable(void) {\n  NVIC_SetVector(SENSOR_WKUP_IRQn, (uint32_t)hal_sensor_eng_irq_handler);\n  NVIC_SetPriority(SENSOR_WKUP_IRQn, IRQ_PRIORITY_HIGH);\n  NVIC_ClearPendingIRQ(SENSOR_WKUP_IRQn);\n  NVIC_EnableIRQ(SENSOR_WKUP_IRQn);\n}\n\nstatic void hal_sensor_eng_irq_disable(void) {\n  NVIC_DisableIRQ(SENSOR_WKUP_IRQn);\n}\n\nstatic void hal_sensor_eng_timer_stop(void) {\n  sensor_eng_timer->timer[0].Control = 0;\n  sensor_eng_timer->timer[0].IntClr = 1;\n}\n\nstatic void hal_sensor_eng_timer_open(uint32_t ticks) {\n  if (ticks > 1) {\n    ticks -= 1;\n  } else {\n    ticks = 1;\n  }\n  sensor_eng_timer->timer[0].Load = ticks;\n  sensor_eng_timer->timer[0].Control =\n      TIMER_CTRL_MODE_PERIODIC | TIMER_CTRL_INTEN | TIMER_CTRL_PRESCALE_DIV_1 |\n      TIMER_CTRL_SIZE_32_BIT;\n}\n\nstatic void hal_sensor_eng_timer_start(void) {\n  sensor_eng_timer->timer[0].Control |= TIMER_CTRL_EN;\n}\n\nint hal_sensor_engine_open(const struct HAL_SENSOR_ENGINE_CFG_T *cfg) {\n  struct HAL_DMA_CH_CFG_T rx_dma_cfg;\n  enum HAL_DMA_RET_T dret;\n  uint32_t i;\n  uint32_t sx_sel;\n\n  ASSERT(cfg->id == HAL_SENSOR_ENGINE_ID_0, \"Bad sensor engine id: %d\",\n         cfg->id);\n  ASSERT(cfg->device == HAL_SENSOR_ENGINE_DEVICE_I2C0,\n         \"Bad sensor engine device: %d\", cfg->device);\n  ASSERT(cfg->rx_burst_cnt <= MAX_RX_FRAME_NUM, \"Bad rx_burst_cnt: %d\",\n         cfg->rx_burst_cnt);\n  ASSERT(cfg->tx_dma_cfg, \"Bad tx_dma_cfg\");\n\n  sensor_eng_handler = cfg->handler;\n  dma_rx_chan = cfg->rx_dma_cfg->ch;\n  dma_rx_buf = (uint8_t *)cfg->rx_dma_cfg->dst;\n  dma_rx_len = cfg->rx_burst_len * cfg->rx_burst_cnt;\n  prev_rx_pos = 0;\n\n  dret =\n      hal_dma_init_desc(&tx_dma_desc[0], cfg->tx_dma_cfg, &tx_dma_desc[0], 0);\n  ASSERT(dret == HAL_DMA_OK, \"SensorEng: Failed to init tx desc 0\");\n\n  dret = hal_gpdma_sg_start(&tx_dma_desc[0], cfg->tx_dma_cfg);\n  ASSERT(dret == HAL_DMA_OK, \"SensorEng: Failed to start tx dma\");\n\n  if (dma_rx_len) {\n    ASSERT(cfg->rx_dma_cfg, \"Bad rx_dma_cfg\");\n\n    rx_dma_cfg = *cfg->rx_dma_cfg;\n    for (i = 0; i < cfg->rx_burst_cnt; i++) {\n      rx_dma_cfg.dst = (uint32_t)(dma_rx_buf + cfg->rx_burst_len * i);\n      if (i + 1 == cfg->rx_burst_cnt) {\n        dret =\n            hal_dma_init_desc(&rx_dma_desc[i], &rx_dma_cfg, &rx_dma_desc[0], 0);\n      } else {\n        dret = hal_dma_init_desc(&rx_dma_desc[i], &rx_dma_cfg,\n                                 &rx_dma_desc[i + 1], 0);\n      }\n      ASSERT(dret == HAL_DMA_OK, \"SensorEng: Failed to init rx desc %d\", i);\n    }\n    hal_gpdma_sg_start(&rx_dma_desc[0], cfg->rx_dma_cfg);\n    ASSERT(dret == HAL_DMA_OK, \"SensorEng: Failed to start rx dma\");\n  }\n\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_SENSOR_ENG);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_SENSOR_ENG);\n  hal_cmu_clock_enable(HAL_CMU_MOD_O_TIMER2);\n  hal_cmu_clock_enable(HAL_CMU_MOD_P_TIMER2);\n  hal_cmu_reset_clear(HAL_CMU_MOD_O_TIMER2);\n  hal_cmu_reset_clear(HAL_CMU_MOD_P_TIMER2);\n\n  sensor_eng[0]->SLV0_CONFIG_REG = SLV_I2C_SPI_SEL(cfg->device) |\n                                   SLV_SLV_DEV_ID(cfg->device_address) |\n                                   SLV_ENABLE;\n  if (dma_rx_len) {\n    // RX LLI = 1\n    sensor_eng[0]->GLOBAL_CFG1_REG =\n        SET_BITFIELD(sensor_eng[0]->GLOBAL_CFG1_REG, NUM_OF_RX_LLI0, 1);\n  }\n  // TX LLI = 1\n  sensor_eng[0]->GLOBAL_CFG3_REG =\n      SET_BITFIELD(sensor_eng[0]->GLOBAL_CFG3_REG, NUM_OF_TX_LLI0, 1);\n  if (cfg->trigger_type == HAL_SENSOR_ENGINE_TRIGGER_GPIO) {\n    sensor_eng[0]->SLV0_INTR_MASK = ~(1 << cfg->trigger_gpio);\n  }\n\n  if (cfg->data_to_vad) {\n    sx_sel = cfg->id;\n  } else {\n    sx_sel = GET_BITFIELD(sensor_eng[0]->GLOBAL_CFG0_REG, GBL_CODEC_SX_SEL);\n  }\n  sensor_eng[0]->GLOBAL_CFG0_REG =\n      GBL_CODEC_SX_SEL(sx_sel) | GBL_SENSORHUB_EN |\n      (cfg->trigger_type == HAL_SENSOR_ENGINE_TRIGGER_GPIO ? GBL_TRIGGER_TYPE\n                                                           : 0);\n\n  if (cfg->trigger_type == HAL_SENSOR_ENGINE_TRIGGER_TIMER) {\n    hal_sensor_eng_timer_open(US_TO_TICKS(cfg->period_us));\n    hal_sensor_eng_timer_start();\n  }\n\n  hal_sensor_eng_irq_enable();\n\n  return 0;\n}\n\nint hal_sensor_engine_close(enum HAL_SENSOR_ENGINE_ID_T id) {\n  uint32_t cnt;\n\n  hal_sensor_eng_irq_disable();\n\n  hal_sensor_eng_timer_stop();\n\n  sensor_eng[0]->GLOBAL_CFG0_REG &= ~GBL_SENSORHUB_EN;\n\n  // Wait until sensor engine becomes idle\n  cnt = 0;\n  while ((sensor_eng[0]->SENSOR_STATUS & SENSOR_ENG_FSM_MASK) && cnt < 10) {\n    osDelay(1);\n    cnt++;\n  }\n  if (sensor_eng[0]->SENSOR_STATUS & SENSOR_ENG_FSM_MASK) {\n    ASSERT(false, \"%s: Sensor engine cannot become idle: 0x%08X\", __func__,\n           sensor_eng[0]->SENSOR_STATUS);\n  }\n\n  sensor_eng[0]->SLV0_INTR_MASK = ~0UL;\n\n  dma_rx_len = 0;\n\n  hal_cmu_reset_set(HAL_CMU_MOD_P_TIMER2);\n  hal_cmu_reset_set(HAL_CMU_MOD_O_TIMER2);\n  hal_cmu_clock_disable(HAL_CMU_MOD_P_TIMER2);\n  hal_cmu_clock_disable(HAL_CMU_MOD_O_TIMER2);\n  hal_cmu_reset_set(HAL_CMU_MOD_H_SENSOR_ENG);\n  hal_cmu_clock_disable(HAL_CMU_MOD_H_SENSOR_ENG);\n\n  return 0;\n}\n\n#if 0\n#include \"hal_i2c.h\"\n\n#define READ_BUF_BURST_CNT 5\n#define TRIGGER_TIMER_US 500000\n#define LOCK_INTR_CNT 3\n#define TRIGGER_GPIO_PIN HAL_GPIO_PIN_P0_0\n\nstatic void hal_sensor_eng_external_input_pin_irqhandler(enum HAL_GPIO_PIN_T pin)\n{\n    bool gpio_lvl = 0;\n    gpio_lvl = hal_gpio_pin_get_val(pin);\n    TRACE(2,\"hal_sensor_eng_external_irqhandler io=%d val=%d\", pin, gpio_lvl);\n}\n\nstatic void sensor_timer_test_handler(enum HAL_I2C_ID_T id, const uint8_t *buf, uint32_t len)\n{\n    TRACE(7,\"%s: id=%d len=%u %02X-%02X-%02X-%02x\", __FUNCTION__, id, len, buf[0], buf[1], buf[2], buf[3]);\n}\n\nstatic void sensor_gpio_test_handler(enum HAL_I2C_ID_T id, const uint8_t *buf, uint32_t len)\n{\n    TRACE(7,\"%s: id=%d len=%u %02X-%02X-%02X-%02x\", __FUNCTION__, id, len, buf[0], buf[1], buf[2], buf[3]);\n}\n\nstatic int sensor_eng_test(enum HAL_SENSOR_ENGINE_TRIGGER_T trigger_type)\n{\n    static uint8_t write_buf[3];\n    static uint8_t read_buf[READ_BUF_BURST_CNT][sizeof(write_buf) * 2];\n\n    int ret;\n    struct HAL_I2C_CONFIG_T cfg;\n    struct HAL_I2C_SENSOR_ENGINE_CONFIG_T se_cfg;\n    enum HAL_I2C_ID_T id;\n    uint32_t i;\n\n    id = HAL_I2C_ID_0;\n\n    for (i = 0; i < sizeof(write_buf); i++) {\n        write_buf[i] = i;\n    }\n\n    memset(&cfg, 0, sizeof(cfg));\n    cfg.mode = HAL_I2C_API_MODE_SENSOR_ENGINE;\n    cfg.as_master = 1;\n    cfg.use_dma = 1;\n    cfg.use_sync = 1;\n    cfg.speed = 100000;\n    ret = hal_i2c_open(id, &cfg);\n    if (ret) {\n        TRACE(2,\"%s: i2c open failed %d\", __func__, ret);\n        return ret;\n    }\n\n    memset(&se_cfg, 0, sizeof(se_cfg));\n    se_cfg.id = HAL_SENSOR_ENGINE_ID_0;\n    se_cfg.trigger_type = trigger_type;\n    if (trigger_type == HAL_SENSOR_ENGINE_TRIGGER_TIMER) {\n        se_cfg.period_us = TRIGGER_TIMER_US;\n        se_cfg.handler = sensor_timer_test_handler;\n    } else {\n        se_cfg.trigger_gpio = TRIGGER_GPIO_PIN;\n        se_cfg.handler = sensor_gpio_test_handler;\n    }\n    se_cfg.target_addr = 0x17;\n    se_cfg.write_buf = &write_buf[0];\n    se_cfg.write_txn_len = 1;\n    se_cfg.read_buf = &read_buf[0][0];\n    se_cfg.read_txn_len = 2;\n    se_cfg.txn_cnt = sizeof(write_buf);\n    se_cfg.read_burst_cnt = READ_BUF_BURST_CNT;\n\n    hal_i2c_sensor_engine_start(id, &se_cfg);\n\n    uint32_t lock = int_lock();\n    while (1) {\n        hal_sys_timer_delay(US_TO_TICKS(TRIGGER_TIMER_US) * LOCK_INTR_CNT);\n        TRACE_IMM(2,\"%s: delay %u ms\", __func__, (TRIGGER_TIMER_US / 1000 * LOCK_INTR_CNT));\n        hal_sensor_process_rx_buffer();\n    }\n    int_unlock(lock);\n\n    return 0;\n}\n\nint hal_sensor_eng_periodic_timer_test(void)\n{\n    sensor_eng_test(HAL_SENSOR_ENGINE_TRIGGER_TIMER);\n    return 0;\n}\n\nint hal_sensor_eng_external_input_test(void)\n{\n    static const struct HAL_IOMUX_PIN_FUNCTION_MAP ext_pin[] = {\n        {TRIGGER_GPIO_PIN, HAL_IOMUX_FUNC_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENABLE},\n    };\n    struct HAL_GPIO_IRQ_CFG_T gpiocfg;\n\n    sensor_eng_test(HAL_SENSOR_ENGINE_TRIGGER_GPIO);\n\n    hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)ext_pin, sizeof(ext_pin)/sizeof(struct HAL_IOMUX_PIN_FUNCTION_MAP));\n    hal_gpio_pin_set_dir(TRIGGER_GPIO_PIN, HAL_GPIO_DIR_IN, 1);\n\n    gpiocfg.irq_enable = true;\n    gpiocfg.irq_debounce = false;\n    gpiocfg.irq_polarity = HAL_GPIO_IRQ_POLARITY_HIGH_RISING;\n    gpiocfg.irq_handler = hal_sensor_eng_external_input_pin_irqhandler;\n    gpiocfg.irq_type = HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE;\n\n    hal_gpio_setup_irq(TRIGGER_GPIO_PIN, &gpiocfg);\n\n    TRACE(5,\"SLV0:%08x CFG1:0x%08x CFG3:0x%08x CFG0:0x%08x INTR_MASK:0x%08x\",\n        sensor_eng[0]->SLV0_CONFIG_REG,\n        sensor_eng[0]->GLOBAL_CFG1_REG,\n        sensor_eng[0]->GLOBAL_CFG3_REG,\n        sensor_eng[0]->GLOBAL_CFG0_REG,\n        sensor_eng[0]->SLV0_INTR_MASK);\n    return 0;\n}\n#endif\n"
  },
  {
    "path": "platform/hal/best2300p/plat_addr_map_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PLAT_ADDR_MAP_BEST2300P_H__\n#define __PLAT_ADDR_MAP_BEST2300P_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define ROM_BASE                                0x00000000\n\n#ifndef ROM_SIZE\n#define ROM_SIZE                                0x0000C000\n#endif\n\n#define RAMRET_BASE                             0x200D8000\n#define RAMXRET_BASE                            0x002D8000\n\n#ifndef RAMRET_SIZE\n#define RAMRET_SIZE                             0x00020000\n#endif\n\n#define RAM0_BASE                               0x20000000\n#define RAMX0_BASE                              0x00200000\n#define RAM1_BASE                               0x20020000\n#define RAMX1_BASE                              0x00220000\n#define RAM2_BASE                               0x20040000\n#define RAMX2_BASE                              0x00240000\n#define RAM3_BASE                               0x20060000\n#define RAMX3_BASE                              0x00260000\n#define RAM4_BASE                               0x20080000\n#define RAMX4_BASE                              0x00280000\n#define RAM5_BASE                               0x200A0000\n#define RAMX5_BASE                              0x002A0000\n#define RAM6_BASE                               0x200C0000\n#define RAMX6_BASE                              0x002C0000\n#define RAM_BASE                                RAM0_BASE\n#define RAMX_BASE                               RAMX0_BASE\n\n#ifdef CHIP_HAS_CP\n#define RAMCP_TOP                               (RAMRET_BASE + RAMRET_SIZE - 0x20)\n\n#ifndef RAMCP_SIZE\n#define RAMCP_SIZE                              (RAMRET_SIZE - 0x20)\n#endif\n#define RAMCP_BASE                              (RAMCP_TOP - RAMCP_SIZE)\n\n#ifndef RAMCPX_SIZE\n#define RAMCPX_SIZE                             (RAMXRET_BASE - RAMX6_BASE)\n#endif\n#ifndef RAMCPX_BASE\n#define RAMCPX_BASE                             (RAM_TO_RAMX(RAMCP_BASE) - RAMCPX_SIZE)\n#endif\n#endif\n\n#ifndef RAM_SIZE\n#ifdef CHIP_HAS_CP\n#define RAM_SIZE                                (RAMCPX_BASE - RAMX_BASE) // 0X000C0000\n#else\n#ifdef LARGE_RAM\n#define RAM_SIZE                                (RAMRET_BASE + RAMRET_SIZE - RAM_BASE) // 0x000F8000\n#else\n#define RAM_SIZE                                (RAMRET_BASE - RAM_BASE) // 0x000D8000\n#endif\n#endif /* !CHIP_HAS_CP */\n#endif /* !RAM_SIZE */\n\n#if defined(ROM_BUILD) && defined(CORE_SLEEP_POWER_DOWN)\n#undef RAM_BASE\n#undef RAMX_BASE\n#undef RAM_SIZE\n#define RAM_BASE                                RAMRET_BASE\n#define RAMX_BASE                               RAMXRET_BASE\n#define RAM_SIZE                                RAMRET_SIZE\n#endif\n\n#define FLASH_BASE                              0x3C000000\n#define FLASH_NC_BASE                           0x38000000\n#define FLASHX_BASE                             0x0C000000\n#define FLASHX_NC_BASE                          0x08000000\n\n#define ICACHE_CTRL_BASE                        0x07FFE000\n#define ICACHECP_CTRL_BASE                      0x07FFA000\n/* No data cache */\n\n#define CMU_BASE                                0x40000000\n#define MCU_WDT_BASE                            0x40001000\n#define MCU_TIMER0_BASE                         0x40002000\n#define MCU_TIMER1_BASE                         0x40003000\n#define MCU_TIMER2_BASE                         0x40004000\n#define I2C0_BASE                               0x40005000\n#define I2C1_BASE                               0x40006000\n#define SPI_BASE                                0x40007000\n#define SPILCD_BASE                             0x40008000\n#define ISPI_BASE                               0x40009000\n#define SPIPHY_BASE                             0x4000A000\n#define UART0_BASE                              0x4000B000\n#define UART1_BASE                              0x4000C000\n#define UART2_BASE                              0x4000D000\n#define BTPCM_BASE                              0x4000E000\n#define I2S0_BASE                               0x4000F000\n#define SPDIF0_BASE                             0x40010000\n#define I2S1_BASE                               0x40011000\n#define SEC_ENG_BASE                            0x40020000\n\n#define AON_CMU_BASE                            0x40080000\n#define AON_GPIO_BASE                           0x40081000\n#define AON_WDT_BASE                            0x40082000\n#define AON_PWM_BASE                            0x40083000\n#define AON_TIMER_BASE                          0x40084000\n#define AON_PSC_BASE                            0x40085000\n#define AON_IOMUX_BASE                          0x40086000\n\n#define SDMMC_BASE                              0x40110000\n#define AUDMA_BASE                              0x40120000\n#define GPDMA_BASE                              0x40130000\n#define FLASH_CTRL_BASE                         0x40140000\n#define BTDUMP_BASE                             0x40150000\n#define I2C_SLAVE_BASE                          0x40160000\n#define SENSOR_ENG_BASE                         0x40170000\n#define USB_BASE                                0x40180000\n#define SEDMA_BASE                              0x401D0000\n\n#define CODEC_BASE                              0x40300000\n\n#define BT_SUBSYS_BASE                          0xA0000000\n#define BT_RAM_BASE                             0xC0000000\n#define BT_RAM_SIZE                             0x00008000\n#define BT_EXCH_MEM_BASE                        0xD0210000\n#define BT_EXCH_MEM_SIZE                        0x00008000\n#define BT_UART_BASE                            0xD0300000\n#define BT_CMU_BASE                             0xD0330000\n\n#define IOMUX_BASE                              AON_IOMUX_BASE\n#define GPIO_BASE                               AON_GPIO_BASE\n#define PWM_BASE                                AON_PWM_BASE\n#ifdef CORE_SLEEP_POWER_DOWN\n#define TIMER0_BASE                             AON_TIMER_BASE\n#else\n#define TIMER0_BASE                             MCU_TIMER0_BASE\n#endif\n#define TIMER1_BASE                             MCU_TIMER1_BASE\n#define WDT_BASE                                AON_WDT_BASE\n\n/* For linker scripts */\n\n#define VECTOR_SECTION_SIZE                     320\n#define REBOOT_PARAM_SECTION_SIZE               64\n#define ROM_BUILD_INFO_SECTION_SIZE             40\n#define ROM_EXPORT_FN_SECTION_SIZE              128\n#define BT_INTESYS_MEM_OFFSET                   0x00000000\n\n/* For boot struct version */\n#ifndef SECURE_BOOT_VER\n#define SECURE_BOOT_VER                         2\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/best2300p/reg_aoncmu_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_AONCMU_BEST2300P_H__\n#define __REG_AONCMU_BEST2300P_H__\n\n#include \"plat_types.h\"\n\nstruct AONCMU_T {\n    __I  uint32_t CHIP_ID;          // 0x00\n    __IO uint32_t TOP_CLK_ENABLE;   // 0x04\n    __IO uint32_t TOP_CLK_DISABLE;  // 0x08\n    __IO uint32_t RESET_PULSE;      // 0x0C\n    __IO uint32_t RESET_SET;        // 0x10\n    __IO uint32_t RESET_CLR;        // 0x14\n    __IO uint32_t CLK_SELECT;       // 0x18\n    __IO uint32_t CLK_OUT;          // 0x1C\n    __IO uint32_t WRITE_UNLOCK;     // 0x20\n    __IO uint32_t MEMSC[4];         // 0x24\n    __I  uint32_t MEMSC_STATUS;     // 0x34\n    __IO uint32_t BOOTMODE;         // 0x38\n    __IO uint32_t RESERVED_03C;     // 0x3C\n    __IO uint32_t MOD_CLK_ENABLE;   // 0x40\n    __IO uint32_t MOD_CLK_DISABLE;  // 0x44\n    __IO uint32_t MOD_CLK_MODE;     // 0x48\n    __IO uint32_t CODEC_DIV;        // 0x4C\n    __IO uint32_t TIMER_CLK;        // 0x50\n    __IO uint32_t PWM01_CLK;        // 0x54\n    __IO uint32_t PWM23_CLK;        // 0x58\n    __IO uint32_t RAM_CFG;          // 0x5C\n    __IO uint32_t RESERVED_060;     // 0x60\n    __IO uint32_t PCM_I2S_CLK;      // 0x64\n    __IO uint32_t SPDIF_CLK;        // 0x68\n    __IO uint32_t SLEEP_TIMER_OSC;  // 0x6C\n    __IO uint32_t SLEEP_TIMER_32K;  // 0x70\n    __IO uint32_t STORE_GPIO_MASK;  // 0x74\n    __IO uint32_t CODEC_IIR;        // 0x78\n    __IO uint32_t SE_WLOCK;         // 0x7C\n    __IO uint32_t SE_RLOCK;         // 0x80\n    __IO uint32_t PD_STAB_TIMER;    // 0x84\n         uint32_t RESERVED_088[0x1A]; // 0x88\n    __IO uint32_t WAKEUP_PC;        // 0xF0\n    __IO uint32_t DEBUG_RES[2];     // 0xF4\n    __IO uint32_t CHIP_FEATURE;     // 0xFC\n};\n\n// reg_00\n#define AON_CMU_CHIP_ID(n)                      (((n) & 0xFFFF) << 0)\n#define AON_CMU_CHIP_ID_MASK                    (0xFFFF << 0)\n#define AON_CMU_CHIP_ID_SHIFT                   (0)\n#define AON_CMU_REVISION_ID(n)                  (((n) & 0xFFFF) << 16)\n#define AON_CMU_REVISION_ID_MASK                (0xFFFF << 16)\n#define AON_CMU_REVISION_ID_SHIFT               (16)\n\n// reg_04\n#define AON_CMU_EN_CLK_TOP_PLLBB_ENABLE         (1 << 0)\n#define AON_CMU_EN_CLK_TOP_PLLAUD_ENABLE        (1 << 1)\n#define AON_CMU_EN_CLK_TOP_OSCX2_ENABLE         (1 << 2)\n#define AON_CMU_EN_CLK_TOP_OSC_ENABLE           (1 << 3)\n#define AON_CMU_EN_CLK_TOP_JTAG_ENABLE          (1 << 4)\n#define AON_CMU_EN_CLK_TOP_PLLBB2_ENABLE        (1 << 5)\n#define AON_CMU_EN_CLK_TOP_PLLUSB_ENABLE        (1 << 6)\n#define AON_CMU_EN_CLK_PLL_CODEC_ENABLE         (1 << 7)\n#define AON_CMU_EN_CLK_CODEC_HCLK_ENABLE        (1 << 8)\n#define AON_CMU_EN_CLK_CODEC_RS_ENABLE          (1 << 9)\n#define AON_CMU_EN_CLK_CODEC_ENABLE             (1 << 10)\n#define AON_CMU_EN_CLK_CODEC_IIR_ENABLE         (1 << 11)\n#define AON_CMU_EN_CLK_OSCX2_MCU_ENABLE         (1 << 12)\n#define AON_CMU_EN_CLK_OSC_MCU_ENABLE           (1 << 13)\n#define AON_CMU_EN_CLK_32K_MCU_ENABLE           (1 << 14)\n#define AON_CMU_EN_CLK_PLL_BT_ENABLE            (1 << 15)\n#define AON_CMU_EN_CLK_60M_BT_ENABLE            (1 << 16)\n#define AON_CMU_EN_CLK_OSCX2_BT_ENABLE          (1 << 17)\n#define AON_CMU_EN_CLK_OSC_BT_ENABLE            (1 << 18)\n#define AON_CMU_EN_CLK_32K_BT_ENABLE            (1 << 19)\n#define AON_CMU_EN_CLK_PLL_PER_ENABLE           (1 << 20)\n#define AON_CMU_EN_CLK_DCDC0_ENABLE             (1 << 21)\n#define AON_CMU_EN_CLK_DCDC1_ENABLE             (1 << 22)\n#define AON_CMU_EN_CLK_DCDC2_ENABLE             (1 << 23)\n#define AON_CMU_EN_X2_DIG_ENABLE                (1 << 24)\n#define AON_CMU_EN_X4_DIG_ENABLE                (1 << 25)\n#define AON_CMU_PU_PLLBB_ENABLE                 (1 << 26)\n#define AON_CMU_PU_PLLUSB_ENABLE                (1 << 27)\n#define AON_CMU_PU_PLLAUD_ENABLE                (1 << 28)\n#define AON_CMU_PU_OSC_ENABLE                   (1 << 29)\n#define AON_CMU_EN_X4_ANA_ENABLE                (1 << 30)\n#define AON_CMU_EN_CLK_32K_CODEC_ENABLE         (1 << 31)\n\n// reg_08\n#define AON_CMU_EN_CLK_TOP_PLLBB_DISABLE        (1 << 0)\n#define AON_CMU_EN_CLK_TOP_PLLAUD_DISABLE       (1 << 1)\n#define AON_CMU_EN_CLK_TOP_OSCX2_DISABLE        (1 << 2)\n#define AON_CMU_EN_CLK_TOP_OSC_DISABLE          (1 << 3)\n#define AON_CMU_EN_CLK_TOP_JTAG_DISABLE         (1 << 4)\n#define AON_CMU_EN_CLK_TOP_PLLBB2_DISABLE       (1 << 5)\n#define AON_CMU_EN_CLK_TOP_PLLUSB_DISABLE       (1 << 6)\n#define AON_CMU_EN_CLK_PLL_CODEC_DISABLE        (1 << 7)\n#define AON_CMU_EN_CLK_CODEC_HCLK_DISABLE       (1 << 8)\n#define AON_CMU_EN_CLK_CODEC_RS_DISABLE         (1 << 9)\n#define AON_CMU_EN_CLK_CODEC_DISABLE            (1 << 10)\n#define AON_CMU_EN_CLK_CODEC_IIR_DISABLE        (1 << 11)\n#define AON_CMU_EN_CLK_OSCX2_MCU_DISABLE        (1 << 12)\n#define AON_CMU_EN_CLK_OSC_MCU_DISABLE          (1 << 13)\n#define AON_CMU_EN_CLK_32K_MCU_DISABLE          (1 << 14)\n#define AON_CMU_EN_CLK_PLL_BT_DISABLE           (1 << 15)\n#define AON_CMU_EN_CLK_60M_BT_DISABLE           (1 << 16)\n#define AON_CMU_EN_CLK_OSCX2_BT_DISABLE         (1 << 17)\n#define AON_CMU_EN_CLK_OSC_BT_DISABLE           (1 << 18)\n#define AON_CMU_EN_CLK_32K_BT_DISABLE           (1 << 19)\n#define AON_CMU_EN_CLK_PLL_PER_DISABLE          (1 << 20)\n#define AON_CMU_EN_CLK_DCDC0_DISABLE            (1 << 21)\n#define AON_CMU_EN_CLK_DCDC1_DISABLE            (1 << 22)\n#define AON_CMU_EN_CLK_DCDC2_DISABLE            (1 << 23)\n#define AON_CMU_EN_X2_DIG_DISABLE               (1 << 24)\n#define AON_CMU_EN_X4_DIG_DISABLE               (1 << 25)\n#define AON_CMU_PU_PLLBB_DISABLE                (1 << 26)\n#define AON_CMU_PU_PLLUSB_DISABLE               (1 << 27)\n#define AON_CMU_PU_PLLAUD_DISABLE               (1 << 28)\n#define AON_CMU_PU_OSC_DISABLE                  (1 << 29)\n#define AON_CMU_EN_X4_ANA_DISABLE               (1 << 30)\n#define AON_CMU_EN_CLK_32K_CODEC_DISABLE        (1 << 31)\n\n#define AON_ARST_NUM                            10\n#define AON_ORST_NUM                            10\n#define AON_ACLK_NUM                            AON_ARST_NUM\n#define AON_OCLK_NUM                            AON_ORST_NUM\n\n// reg_0c\n#define AON_CMU_ARESETN_PULSE(n)                (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_ARESETN_PULSE_MASK              (0xFFFFFFFF << 0)\n#define AON_CMU_ARESETN_PULSE_SHIFT             (0)\n#define AON_CMU_ORESETN_PULSE(n)                (((n) & 0xFFFFFFFF) << AON_ARST_NUM)\n#define AON_CMU_ORESETN_PULSE_MASK              (0xFFFFFFFF << AON_ARST_NUM)\n#define AON_CMU_ORESETN_PULSE_SHIFT             (AON_ARST_NUM)\n#define AON_CMU_SOFT_RSTN_MCU_PULSE             (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1-1))\n#define AON_CMU_SOFT_RSTN_CODEC_PULSE           (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1-1))\n#define AON_CMU_SOFT_RSTN_WF_PULSE              (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_BT_PULSE              (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_MCUCPU_PULSE          (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_WFCPU_PULSE           (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_BTCPU_PULSE           (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1+1-1))\n#define AON_CMU_GLOBAL_RESETN_PULSE             (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1+1+1-1))\n\n// reg_10\n#define AON_CMU_ARESETN_SET(n)                  (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_ARESETN_SET_MASK                (0xFFFFFFFF << 0)\n#define AON_CMU_ARESETN_SET_SHIFT               (0)\n#define AON_CMU_ORESETN_SET(n)                  (((n) & 0xFFFFFFFF) << AON_ARST_NUM)\n#define AON_CMU_ORESETN_SET_MASK                (0xFFFFFFFF << AON_ARST_NUM)\n#define AON_CMU_ORESETN_SET_SHIFT               (AON_ARST_NUM)\n#define AON_CMU_SOFT_RSTN_MCU_SET               (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1-1))\n#define AON_CMU_SOFT_RSTN_CODEC_SET             (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1-1))\n#define AON_CMU_SOFT_RSTN_WF_SET                (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_BT_SET                (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_MCUCPU_SET            (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_WFCPU_SET             (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_BTCPU_SET             (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1+1-1))\n#define AON_CMU_GLOBAL_RESETN_SET               (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1+1+1-1))\n\n// reg_14\n#define AON_CMU_ARESETN_CLR(n)                  (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_ARESETN_CLR_MASK                (0xFFFFFFFF << 0)\n#define AON_CMU_ARESETN_CLR_SHIFT               (0)\n#define AON_CMU_ORESETN_CLR(n)                  (((n) & 0xFFFFFFFF) << AON_ARST_NUM)\n#define AON_CMU_ORESETN_CLR_MASK                (0xFFFFFFFF << AON_ARST_NUM)\n#define AON_CMU_ORESETN_CLR_SHIFT               (AON_ARST_NUM)\n#define AON_CMU_SOFT_RSTN_MCU_CLR               (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1-1))\n#define AON_CMU_SOFT_RSTN_CODEC_CLR             (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1-1))\n#define AON_CMU_SOFT_RSTN_WF_CLR                (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_BT_CLR                (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_MCUCPU_CLR            (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_WFCPU_CLR             (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1-1))\n#define AON_CMU_SOFT_RSTN_BTCPU_CLR             (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1+1-1))\n#define AON_CMU_GLOBAL_RESETN_CLR               (1 << (AON_ARST_NUM+AON_ORST_NUM+32-8-AON_ARST_NUM-AON_ORST_NUM+1+1+1+1+1+1+1+1-1))\n\n// reg_18\n#define AON_CMU_BYPASS_DIV_BTSYS                (1 << 0)\n#define AON_CMU_CFG_DIV_BTSYS(n)                (((n) & 0x3) << 1)\n#define AON_CMU_CFG_DIV_BTSYS_MASK              (0x3 << 1)\n#define AON_CMU_CFG_DIV_BTSYS_SHIFT             (1)\n#define AON_CMU_CFG_DIV_BT60M(n)                (((n) & 0x3) << 3)\n#define AON_CMU_CFG_DIV_BT60M_MASK              (0x3 << 3)\n#define AON_CMU_CFG_DIV_BT60M_SHIFT             (3)\n#define AON_CMU_SEL_PLL_SYS(n)                  (((n) & 0x3) << 5)\n#define AON_CMU_SEL_PLL_SYS_MASK                (0x3 << 5)\n#define AON_CMU_SEL_PLL_SYS_SHIFT               (5)\n#define AON_CMU_SEL_PLL_AUD(n)                  (((n) & 0x3) << 7)\n#define AON_CMU_SEL_PLL_AUD_MASK                (0x3 << 7)\n#define AON_CMU_SEL_PLL_AUD_SHIFT               (7)\n#define AON_CMU_SEL_OSCX2_DIG                   (1 << 9)\n#define AON_CMU_SEL_X2_PHASE(n)                 (((n) & 0x1F) << 10)\n#define AON_CMU_SEL_X2_PHASE_MASK               (0x1F << 10)\n#define AON_CMU_SEL_X2_PHASE_SHIFT              (10)\n#define AON_CMU_SEL_X4_SYS                      (1 << 15)\n#define AON_CMU_SEL_X4_AUD                      (1 << 16)\n#define AON_CMU_SEL_X4_USB                      (1 << 17)\n#define AON_CMU_SEL_X4_PHASE(n)                 (((n) & 0x1F) << 18)\n#define AON_CMU_SEL_X4_PHASE_MASK               (0x1F << 18)\n#define AON_CMU_SEL_X4_PHASE_SHIFT              (18)\n#define AON_CMU_SEL_X4_DIG                      (1 << 23)\n#define AON_CMU_CFG_DIV_PER(n)                  (((n) & 0x3) << 24)\n#define AON_CMU_CFG_DIV_PER_MASK                (0x3 << 24)\n#define AON_CMU_CFG_DIV_PER_SHIFT               (24)\n#define AON_CMU_BYPASS_DIV_PER                  (1 << 26)\n#define AON_CMU_SEL_32K_TIMER                   (1 << 27)\n#define AON_CMU_SEL_32K_WDT                     (1 << 28)\n#define AON_CMU_SEL_TIMER_FAST                  (1 << 29)\n#define AON_CMU_LPU_AUTO_SWITCH26               (1 << 30)\n#define AON_CMU_EN_MCU_WDG_RESET                (1 << 31)\n\n// reg_1c\n#define AON_CMU_EN_CLK_OUT                      (1 << 0)\n#define AON_CMU_SEL_CLK_OUT(n)                  (((n) & 0x3) << 1)\n#define AON_CMU_SEL_CLK_OUT_MASK                (0x3 << 1)\n#define AON_CMU_SEL_CLK_OUT_SHIFT               (1)\n#define AON_CMU_CFG_CLK_OUT(n)                  (((n) & 0xF) << 3)\n#define AON_CMU_CFG_CLK_OUT_MASK                (0xF << 3)\n#define AON_CMU_CFG_CLK_OUT_SHIFT               (3)\n#define AON_CMU_CFG_DIV_DCDC(n)                 (((n) & 0xF) << 7)\n#define AON_CMU_CFG_DIV_DCDC_MASK               (0xF << 7)\n#define AON_CMU_CFG_DIV_DCDC_SHIFT              (7)\n#define AON_CMU_BYPASS_DIV_DCDC                 (1 << 11)\n#define AON_CMU_SEL_DCDC_PLL                    (1 << 12)\n#define AON_CMU_SEL_DCDC_OSCX2                  (1 << 13)\n#define AON_CMU_CLK_DCDC_DRV(n)                 (((n) & 0x3) << 14)\n#define AON_CMU_CLK_DCDC_DRV_MASK               (0x3 << 14)\n#define AON_CMU_CLK_DCDC_DRV_SHIFT              (14)\n#define AON_CMU_EN_VOD_IIR                      (1 << 16)\n#define AON_CMU_EN_VOD_RS                       (1 << 17)\n#define AON_CMU_SEL_X4_FLS                      (1 << 18)\n\n// reg_20\n#define AON_CMU_WRITE_UNLOCK_H                  (1 << 0)\n#define AON_CMU_WRITE_UNLOCK_STATUS             (1 << 1)\n\n// reg_24\n#define AON_CMU_MEMSC0                          (1 << 0)\n\n// reg_28\n#define AON_CMU_MEMSC1                          (1 << 0)\n\n// reg_2c\n#define AON_CMU_MEMSC2                          (1 << 0)\n\n// reg_30\n#define AON_CMU_MEMSC3                          (1 << 0)\n\n// reg_34\n#define AON_CMU_MEMSC_STATUS0                   (1 << 0)\n#define AON_CMU_MEMSC_STATUS1                   (1 << 1)\n#define AON_CMU_MEMSC_STATUS2                   (1 << 2)\n#define AON_CMU_MEMSC_STATUS3                   (1 << 3)\n\n// reg_38\n#define AON_CMU_WATCHDOG_RESET                  (1 << 0)\n#define AON_CMU_SOFT_GLOBLE_RESET               (1 << 1)\n#define AON_CMU_RTC_INTR_H                      (1 << 2)\n#define AON_CMU_CHG_INTR_H                      (1 << 3)\n#define AON_CMU_SOFT_BOOT_MODE(n)               (((n) & 0xFFFFFFF) << 4)\n#define AON_CMU_SOFT_BOOT_MODE_MASK             (0xFFFFFFF << 4)\n#define AON_CMU_SOFT_BOOT_MODE_SHIFT            (4)\n\n// reg_3c\n#define AON_CMU_RESERVED(n)                     (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_RESERVED_MASK                   (0xFFFFFFFF << 0)\n#define AON_CMU_RESERVED_SHIFT                  (0)\n#define AON_CMU_OSC_TO_DIG_X4                   (1 << 1)\n\n// reg_40\n#define AON_CMU_MANUAL_ACLK_ENABLE(n)           (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_MANUAL_ACLK_ENABLE_MASK         (0xFFFFFFFF << 0)\n#define AON_CMU_MANUAL_ACLK_ENABLE_SHIFT        (0)\n#define AON_CMU_MANUAL_OCLK_ENABLE(n)           (((n) & 0xFFFFFFFF) << AON_ACLK_NUM)\n#define AON_CMU_MANUAL_OCLK_ENABLE_MASK         (0xFFFFFFFF << AON_ACLK_NUM)\n#define AON_CMU_MANUAL_OCLK_ENABLE_SHIFT        (AON_ACLK_NUM)\n\n// reg_44\n#define AON_CMU_MANUAL_ACLK_DISABLE(n)          (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_MANUAL_ACLK_DISABLE_MASK        (0xFFFFFFFF << 0)\n#define AON_CMU_MANUAL_ACLK_DISABLE_SHIFT       (0)\n#define AON_CMU_MANUAL_OCLK_DISABLE(n)          (((n) & 0xFFFFFFFF) << AON_ACLK_NUM)\n#define AON_CMU_MANUAL_OCLK_DISABLE_MASK        (0xFFFFFFFF << AON_ACLK_NUM)\n#define AON_CMU_MANUAL_OCLK_DISABLE_SHIFT       (AON_ACLK_NUM)\n\n// reg_48\n#define AON_CMU_MODE_ACLK(n)                    (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_MODE_ACLK_MASK                  (0xFFFFFFFF << 0)\n#define AON_CMU_MODE_ACLK_SHIFT                 (0)\n#define AON_CMU_MODE_OCLK(n)                    (((n) & 0xFFFFFFFF) << AON_ACLK_NUM)\n#define AON_CMU_MODE_OCLK_MASK                  (0xFFFFFFFF << AON_ACLK_NUM)\n#define AON_CMU_MODE_OCLK_SHIFT                 (AON_ACLK_NUM)\n\n// reg_4c\n#define AON_CMU_SEL_CLK_OSC                     (1 << 0)\n#define AON_CMU_SEL_CLK_OSCX2                   (1 << 1)\n#define AON_CMU_CFG_DIV_CODEC(n)                (((n) & 0x1F) << 2)\n#define AON_CMU_CFG_DIV_CODEC_MASK              (0x1F << 2)\n#define AON_CMU_CFG_DIV_CODEC_SHIFT             (2)\n#define AON_CMU_SEL_OSC_CODEC                   (1 << 7)\n#define AON_CMU_SEL_OSCX2_CODECHCLK             (1 << 8)\n#define AON_CMU_SEL_PLL_CODECHCLK               (1 << 9)\n#define AON_CMU_SEL_CODEC_HCLK_AON              (1 << 10)\n#define AON_CMU_BYPASS_LOCK_PLLUSB              (1 << 11)\n#define AON_CMU_BYPASS_LOCK_PLLBB               (1 << 12)\n#define AON_CMU_BYPASS_LOCK_PLLAUD              (1 << 13)\n#define AON_CMU_POL_SPI_CS(n)                   (((n) & 0x7) << 14)\n#define AON_CMU_POL_SPI_CS_MASK                 (0x7 << 14)\n#define AON_CMU_POL_SPI_CS_SHIFT                (14)\n#define AON_CMU_CFG_SPI_ARB(n)                  (((n) & 0x7) << 17)\n#define AON_CMU_CFG_SPI_ARB_MASK                (0x7 << 17)\n#define AON_CMU_CFG_SPI_ARB_SHIFT               (17)\n#define AON_CMU_PU_FLASH_IO                     (1 << 20)\n#define AON_CMU_POR_SLEEP_MODE                  (1 << 21)\n#define AON_CMU_LOCK_PLLBB                      (1 << 22)\n#define AON_CMU_LOCK_PLLUSB                     (1 << 23)\n#define AON_CMU_LOCK_PLLAUD                     (1 << 24)\n\n// reg_50\n#define AON_CMU_CFG_DIV_TIMER0(n)               (((n) & 0xFFFF) << 0)\n#define AON_CMU_CFG_DIV_TIMER0_MASK             (0xFFFF << 0)\n#define AON_CMU_CFG_DIV_TIMER0_SHIFT            (0)\n#define AON_CMU_CFG_DIV_TIMER1(n)               (((n) & 0xFFFF) << 16)\n#define AON_CMU_CFG_DIV_TIMER1_MASK             (0xFFFF << 16)\n#define AON_CMU_CFG_DIV_TIMER1_SHIFT            (16)\n\n// reg_54\n#define AON_CMU_CFG_DIV_PWM0(n)                 (((n) & 0xFFF) << 0)\n#define AON_CMU_CFG_DIV_PWM0_MASK               (0xFFF << 0)\n#define AON_CMU_CFG_DIV_PWM0_SHIFT              (0)\n#define AON_CMU_SEL_OSC_PWM0                    (1 << 12)\n#define AON_CMU_EN_OSC_PWM0                     (1 << 13)\n#define AON_CMU_CFG_DIV_PWM1(n)                 (((n) & 0xFFF) << 16)\n#define AON_CMU_CFG_DIV_PWM1_MASK               (0xFFF << 16)\n#define AON_CMU_CFG_DIV_PWM1_SHIFT              (16)\n#define AON_CMU_SEL_OSC_PWM1                    (1 << 28)\n#define AON_CMU_EN_OSC_PWM1                     (1 << 29)\n\n// reg_58\n#define AON_CMU_CFG_DIV_PWM2(n)                 (((n) & 0xFFF) << 0)\n#define AON_CMU_CFG_DIV_PWM2_MASK               (0xFFF << 0)\n#define AON_CMU_CFG_DIV_PWM2_SHIFT              (0)\n#define AON_CMU_SEL_OSC_PWM2                    (1 << 12)\n#define AON_CMU_EN_OSC_PWM2                     (1 << 13)\n#define AON_CMU_CFG_DIV_PWM3(n)                 (((n) & 0xFFF) << 16)\n#define AON_CMU_CFG_DIV_PWM3_MASK               (0xFFF << 16)\n#define AON_CMU_CFG_DIV_PWM3_SHIFT              (16)\n#define AON_CMU_SEL_OSC_PWM3                    (1 << 28)\n#define AON_CMU_EN_OSC_PWM3                     (1 << 29)\n\n// reg_5c\n#define AON_CMU_RAM_EMA(n)                      (((n) & 0x7) << 0)\n#define AON_CMU_RAM_EMA_MASK                    (0x7 << 0)\n#define AON_CMU_RAM_EMA_SHIFT                   (0)\n#define AON_CMU_RAM_EMAW(n)                     (((n) & 0x3) << 3)\n#define AON_CMU_RAM_EMAW_MASK                   (0x3 << 3)\n#define AON_CMU_RAM_EMAW_SHIFT                  (3)\n#define AON_CMU_RAM_WABL                        (1 << 5)\n#define AON_CMU_RAM_WABLM(n)                    (((n) & 0x3) << 6)\n#define AON_CMU_RAM_WABLM_MASK                  (0x3 << 6)\n#define AON_CMU_RAM_WABLM_SHIFT                 (6)\n#define AON_CMU_RAM_RET1N0(n)                   (((n) & 0x7) << 8)\n#define AON_CMU_RAM_RET1N0_MASK                 (0x7 << 8)\n#define AON_CMU_RAM_RET1N0_SHIFT                (8)\n#define AON_CMU_RAM_RET2N0(n)                   (((n) & 0x7) << 11)\n#define AON_CMU_RAM_RET2N0_MASK                 (0x7 << 11)\n#define AON_CMU_RAM_RET2N0_SHIFT                (11)\n#define AON_CMU_RAM_PGEN0(n)                    (((n) & 0x7) << 14)\n#define AON_CMU_RAM_PGEN0_MASK                  (0x7 << 14)\n#define AON_CMU_RAM_PGEN0_SHIFT                 (14)\n#define AON_CMU_RAM_RET1N1(n)                   (((n) & 0x7) << 17)\n#define AON_CMU_RAM_RET1N1_MASK                 (0x7 << 17)\n#define AON_CMU_RAM_RET1N1_SHIFT                (17)\n#define AON_CMU_RAM_RET2N1(n)                   (((n) & 0x7) << 20)\n#define AON_CMU_RAM_RET2N1_MASK                 (0x7 << 20)\n#define AON_CMU_RAM_RET2N1_SHIFT                (20)\n#define AON_CMU_RAM_PGEN1(n)                    (((n) & 0x7) << 23)\n#define AON_CMU_RAM_PGEN1_MASK                  (0x7 << 23)\n#define AON_CMU_RAM_PGEN1_SHIFT                 (23)\n#define AON_CMU_RAM_EMAS                        (1 << 26)\n\n// reg_64\n#define AON_CMU_CFG_DIV_PCM(n)                  (((n) & 0x1FFF) << 0)\n#define AON_CMU_CFG_DIV_PCM_MASK                (0x1FFF << 0)\n#define AON_CMU_CFG_DIV_PCM_SHIFT               (0)\n#define AON_CMU_SEL_I2S_MCLK(n)                 (((n) & 0x7) << 13)\n#define AON_CMU_SEL_I2S_MCLK_MASK               (0x7 << 13)\n#define AON_CMU_SEL_I2S_MCLK_SHIFT              (13)\n#define AON_CMU_CFG_DIV_I2S0(n)                 (((n) & 0x1FFF) << 16)\n#define AON_CMU_CFG_DIV_I2S0_MASK               (0x1FFF << 16)\n#define AON_CMU_CFG_DIV_I2S0_SHIFT              (16)\n#define AON_CMU_EN_CLK_PLL_I2S0                 (1 << 29)\n#define AON_CMU_EN_CLK_PLL_PCM                  (1 << 30)\n#define AON_CMU_EN_I2S_MCLK                     (1 << 31)\n\n// reg_68\n#define AON_CMU_CFG_DIV_SPDIF0(n)               (((n) & 0x1FFF) << 0)\n#define AON_CMU_CFG_DIV_SPDIF0_MASK             (0x1FFF << 0)\n#define AON_CMU_CFG_DIV_SPDIF0_SHIFT            (0)\n#define AON_CMU_EN_CLK_PLL_SPDIF0               (1 << 13)\n#define AON_CMU_CFG_DIV_I2S1(n)                 (((n) & 0x1FFF) << 16)\n#define AON_CMU_CFG_DIV_I2S1_MASK               (0x1FFF << 16)\n#define AON_CMU_CFG_DIV_I2S1_SHIFT              (16)\n#define AON_CMU_EN_CLK_PLL_I2S1                 (1 << 29)\n\n// reg_6c\n#define AON_CMU_SLEEP_TIMER_OSC(n)              (((n) & 0x7FF) << 0)\n#define AON_CMU_SLEEP_TIMER_OSC_MASK            (0x7FF << 0)\n#define AON_CMU_SLEEP_TIMER_OSC_SHIFT           (0)\n#define AON_CMU_STORE_GPIO_EN                   (1 << 30)\n#define AON_CMU_STORE_TIMER                     (1 << 31)\n\n// reg_70\n#define AON_CMU_SLEEP_TIMER_32K(n)              (((n) & 0xFFFFFF) << 0)\n#define AON_CMU_SLEEP_TIMER_32K_MASK            (0xFFFFFF << 0)\n#define AON_CMU_SLEEP_TIMER_32K_SHIFT           (0)\n\n// reg_74\n#define AON_CMU_STORE_GPIO_MASK(n)              (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_STORE_GPIO_MASK_MASK            (0xFFFFFFFF << 0)\n#define AON_CMU_STORE_GPIO_MASK_SHIFT           (0)\n\n// reg_78\n#define AON_CMU_CFG_DIV_CODECIIR(n)             (((n) & 0xF) << 0)\n#define AON_CMU_CFG_DIV_CODECIIR_MASK           (0xF << 0)\n#define AON_CMU_CFG_DIV_CODECIIR_SHIFT          (0)\n#define AON_CMU_SEL_OSC_CODECIIR                (1 << 4)\n#define AON_CMU_SEL_OSCX2_CODECIIR              (1 << 5)\n#define AON_CMU_BYPASS_DIV_CODECIIR             (1 << 6)\n#define AON_CMU_CFG_DIV_CODECRS(n)              (((n) & 0xF) << 8)\n#define AON_CMU_CFG_DIV_CODECRS_MASK            (0xF << 8)\n#define AON_CMU_CFG_DIV_CODECRS_SHIFT           (8)\n#define AON_CMU_SEL_OSC_CODECRS                 (1 << 12)\n#define AON_CMU_SEL_OSCX2_CODECRS               (1 << 13)\n#define AON_CMU_BYPASS_DIV_CODECRS              (1 << 14)\n\n// reg_7c\n#define AON_CMU_OTP_WR_LOCK(n)                  (((n) & 0xFFFF) << 0)\n#define AON_CMU_OTP_WR_LOCK_MASK                (0xFFFF << 0)\n#define AON_CMU_OTP_WR_LOCK_SHIFT               (0)\n#define AON_CMU_OTP_WR_UNLOCK                   (1 << 31)\n\n// reg_80\n#define AON_CMU_OTP_RD_LOCK(n)                  (((n) & 0xFFFF) << 0)\n#define AON_CMU_OTP_RD_LOCK_MASK                (0xFFFF << 0)\n#define AON_CMU_OTP_RD_LOCK_SHIFT               (0)\n#define AON_CMU_OTP_RD_UNLOCK                   (1 << 31)\n\n// reg_84\n#define AON_CMU_CFG_PD_STAB_TIMER(n)            (((n) & 0xF) << 0)\n#define AON_CMU_CFG_PD_STAB_TIMER_MASK          (0xF << 0)\n#define AON_CMU_CFG_PD_STAB_TIMER_SHIFT         (0)\n\n// reg_f0\n#define AON_CMU_DEBUG0(n)                       (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_DEBUG0_MASK                     (0xFFFFFFFF << 0)\n#define AON_CMU_DEBUG0_SHIFT                    (0)\n\n// reg_f4\n#define AON_CMU_DEBUG1(n)                       (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_DEBUG1_MASK                     (0xFFFFFFFF << 0)\n#define AON_CMU_DEBUG1_SHIFT                    (0)\n\n// reg_f8\n#define AON_CMU_DEBUG2(n)                       (((n) & 0xFFFFFFFF) << 0)\n#define AON_CMU_DEBUG2_MASK                     (0xFFFFFFFF << 0)\n#define AON_CMU_DEBUG2_SHIFT                    (0)\n\n// reg_fc\n#define AON_CMU_EFUSE(n)                        (((n) & 0xFFFF) << 0)\n#define AON_CMU_EFUSE_MASK                      (0xFFFF << 0)\n#define AON_CMU_EFUSE_SHIFT                     (0)\n#define AON_CMU_EFUSE_LOCK                      (1 << 31)\n\n\n// APB and AHB Clocks:\n#define AON_ACLK_CMU                    (1 << 0)\n#define AON_ARST_CMU                    (1 << 0)\n#define AON_ACLK_GPIO                   (1 << 1)\n#define AON_ARST_GPIO                   (1 << 1)\n#define AON_ACLK_GPIO_INT               (1 << 2)\n#define AON_ARST_GPIO_INT               (1 << 2)\n#define AON_ACLK_WDT                    (1 << 3)\n#define AON_ARST_WDT                    (1 << 3)\n#define AON_ACLK_PWM                    (1 << 4)\n#define AON_ARST_PWM                    (1 << 4)\n#define AON_ACLK_TIMER                  (1 << 5)\n#define AON_ARST_TIMER                  (1 << 5)\n#define AON_ACLK_PSC                    (1 << 6)\n#define AON_ARST_PSC                    (1 << 6)\n#define AON_ACLK_IOMUX                  (1 << 7)\n#define AON_ARST_IOMUX                  (1 << 7)\n#define AON_ACLK_APBC                   (1 << 8)\n#define AON_ARST_APBC                   (1 << 8)\n#define AON_ACLK_H2H_MCU                (1 << 9)\n#define AON_ARST_H2H_MCU                (1 << 9)\n\n// AON other Clocks:\n#define AON_OCLK_WDT                    (1 << 0)\n#define AON_ORST_WDT                    (1 << 0)\n#define AON_OCLK_TIMER                  (1 << 1)\n#define AON_ORST_TIMER                  (1 << 1)\n#define AON_OCLK_GPIO                   (1 << 2)\n#define AON_ORST_GPIO                   (1 << 2)\n#define AON_OCLK_PWM0                   (1 << 3)\n#define AON_ORST_PWM0                   (1 << 3)\n#define AON_OCLK_PWM1                   (1 << 4)\n#define AON_ORST_PWM1                   (1 << 4)\n#define AON_OCLK_PWM2                   (1 << 5)\n#define AON_ORST_PWM2                   (1 << 5)\n#define AON_OCLK_PWM3                   (1 << 6)\n#define AON_ORST_PWM3                   (1 << 6)\n#define AON_OCLK_IOMUX                  (1 << 7)\n#define AON_ORST_IOMUX                  (1 << 7)\n#define AON_OCLK_SLP32K                 (1 << 8)\n#define AON_ORST_SLP32K                 (1 << 8)\n#define AON_OCLK_SLP26M                 (1 << 9)\n#define AON_ORST_SLP26M                 (1 << 9)\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/best2300p/reg_btcmu_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_BTCMU_BEST2300P_H__\n#define __REG_BTCMU_BEST2300P_H__\n\n#include \"plat_types.h\"\n\nstruct BTCMU_T {\n    __IO uint32_t CLK_ENABLE;           // 0x00\n    __IO uint32_t CLK_DISABLE;          // 0x04\n    __IO uint32_t CLK_MODE;             // 0x08\n    __IO uint32_t DIV_TIMER;            // 0x0C\n    __IO uint32_t RESET_SET;            // 0x10\n    __IO uint32_t RESET_CLR;            // 0x14\n    __IO uint32_t DIV_WDT;              // 0x18\n    __IO uint32_t RESET_PULSE;          // 0x1C\n         uint32_t RESERVED_020[0x24 / 4]; // 0x20\n    __IO uint32_t CLK_OUT;              // 0x44\n         uint32_t RESERVED_048[2];      // 0x48\n    __IO uint32_t ISIRQ_SET;            // 0x50\n    __IO uint32_t ISIRQ_CLR;            // 0x54\n};\n\n// reg_44\n#define BT_CMU_CAL_TIME(n)                      (((n) & 0xFF) << 0)\n#define BT_CMU_CAL_TIME_MASK                    (0xFF << 0)\n#define BT_CMU_CAL_TIME_SHIFT                   (0)\n#define BT_CMU_SMP_CMU_SEL(n)                   (((n) & 0xF) << 8)\n#define BT_CMU_SMP_CMU_SEL_MASK                 (0xF << 8)\n#define BT_CMU_SMP_CMU_SEL_SHIFT                (8)\n#define BT_CMU_CFG_CLK_OUT(n)                   (((n) & 0xF) << 12)\n#define BT_CMU_CFG_CLK_OUT_MASK                 (0xF << 12)\n#define BT_CMU_CFG_CLK_OUT_SHIFT                (12)\n#define BT_CMU_PWR_DELAY(n)                     (((n) & 0x7F) << 16)\n#define BT_CMU_PWR_DELAY_MASK                   (0x7F << 16)\n#define BT_CMU_PWR_DELAY_SHIFT                  (16)\n#define BT_CMU_ROM_PGEN(n)                      (((n) & 0xF) << 23)\n#define BT_CMU_ROM_PGEN_MASK                    (0xF << 23)\n#define BT_CMU_ROM_PGEN_SHIFT                   (23)\n#define BT_CMU_RAM_EMAS                         (1 << 27)\n#define BT_CMU_RF_EMAS                          (1 << 28)\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/best2300p/reg_cmu_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_CMU_BEST2300P_H__\n#define __REG_CMU_BEST2300P_H__\n\n#include \"plat_types.h\"\n\nstruct CMU_T {\n    __IO uint32_t HCLK_ENABLE;      // 0x00\n    __IO uint32_t HCLK_DISABLE;     // 0x04\n    __IO uint32_t PCLK_ENABLE;      // 0x08\n    __IO uint32_t PCLK_DISABLE;     // 0x0C\n    __IO uint32_t OCLK_ENABLE;      // 0x10\n    __IO uint32_t OCLK_DISABLE;     // 0x14\n    __IO uint32_t HCLK_MODE;        // 0x18\n    __IO uint32_t PCLK_MODE;        // 0x1C\n    __IO uint32_t OCLK_MODE;        // 0x20\n    __IO uint32_t RAM_CFG3;         // 0x24\n    __IO uint32_t HRESET_PULSE;     // 0x28\n    __IO uint32_t PRESET_PULSE;     // 0x2C\n    __IO uint32_t ORESET_PULSE;     // 0x30\n    __IO uint32_t HRESET_SET;       // 0x34\n    __IO uint32_t HRESET_CLR;       // 0x38\n    __IO uint32_t PRESET_SET;       // 0x3C\n    __IO uint32_t PRESET_CLR;       // 0x40\n    __IO uint32_t ORESET_SET;       // 0x44\n    __IO uint32_t ORESET_CLR;       // 0x48\n    __IO uint32_t TIMER0_CLK;       // 0x4C\n    __IO uint32_t BOOTMODE;         // 0x50\n    __IO uint32_t MCU_TIMER;        // 0x54\n    __IO uint32_t SLEEP;            // 0x58\n    __IO uint32_t PERIPH_CLK;       // 0x5C\n    __IO uint32_t SYS_CLK_ENABLE;   // 0x60\n    __IO uint32_t SYS_CLK_DISABLE;  // 0x64\n    __IO uint32_t ADMA_CH15_REQ;    // 0x68\n    __IO uint32_t BOOT_DVS;         // 0x6C\n    __IO uint32_t UART_CLK;         // 0x70\n    __IO uint32_t I2C_CLK;          // 0x74\n    __IO uint32_t RAM_CFG0;         // 0x78\n    __IO uint32_t RAM_CFG1;         // 0x7C\n    __IO uint32_t WRITE_UNLOCK;     // 0x80\n    __IO uint32_t WAKEUP_MASK0;     // 0x84\n    __IO uint32_t WAKEUP_MASK1;     // 0x88\n    __IO uint32_t WAKEUP_CLK_CFG;   // 0x8C\n    __IO uint32_t TIMER1_CLK;       // 0x90\n    __IO uint32_t TIMER2_CLK;       // 0x94\n    __IO uint32_t CP2MCU_IRQ_SET;   // 0x98\n    __IO uint32_t CP2MCU_IRQ_CLR;   // 0x9C\n    __IO uint32_t ISIRQ_SET;        // 0xA0\n    __IO uint32_t ISIRQ_CLR;        // 0xA4\n    __IO uint32_t SYS_DIV;          // 0xA8\n    __IO uint32_t RESERVED_0AC;     // 0xAC\n    __IO uint32_t MCU2BT_INTMASK0;  // 0xB0\n    __IO uint32_t MCU2BT_INTMASK1;  // 0xB4\n    __IO uint32_t MCU2CP_IRQ_SET;   // 0xB8\n    __IO uint32_t MCU2CP_IRQ_CLR;   // 0xBC\n    __IO uint32_t MEMSC[4];         // 0xC0\n    __I  uint32_t MEMSC_STATUS;     // 0xD0\n    __IO uint32_t ADMA_CH0_4_REQ;   // 0xD4\n    __IO uint32_t ADMA_CH5_9_REQ;   // 0xD8\n    __IO uint32_t ADMA_CH10_14_REQ; // 0xDC\n    __IO uint32_t GDMA_CH0_4_REQ;   // 0xE0\n    __IO uint32_t GDMA_CH5_9_REQ;   // 0xE4\n    __IO uint32_t GDMA_CH10_14_REQ; // 0xE8\n    __IO uint32_t GDMA_CH15_REQ;    // 0xEC\n    __IO uint32_t MISC;             // 0xF0\n    __IO uint32_t SIMU_RES;         // 0xF4\n    __IO uint32_t SEC_ROM_CFG;      // 0xF8\n    __IO uint32_t ACC_CTRL;         // 0xFC\n};\n\n// reg_00\n#define CMU_MANUAL_HCLK_ENABLE(n)               (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MANUAL_HCLK_ENABLE_MASK             (0xFFFFFFFF << 0)\n#define CMU_MANUAL_HCLK_ENABLE_SHIFT            (0)\n\n// reg_04\n#define CMU_MANUAL_HCLK_DISABLE(n)              (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MANUAL_HCLK_DISABLE_MASK            (0xFFFFFFFF << 0)\n#define CMU_MANUAL_HCLK_DISABLE_SHIFT           (0)\n\n// reg_08\n#define CMU_MANUAL_PCLK_ENABLE(n)               (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MANUAL_PCLK_ENABLE_MASK             (0xFFFFFFFF << 0)\n#define CMU_MANUAL_PCLK_ENABLE_SHIFT            (0)\n\n// reg_0c\n#define CMU_MANUAL_PCLK_DISABLE(n)              (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MANUAL_PCLK_DISABLE_MASK            (0xFFFFFFFF << 0)\n#define CMU_MANUAL_PCLK_DISABLE_SHIFT           (0)\n\n// reg_10\n#define CMU_MANUAL_OCLK_ENABLE(n)               (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MANUAL_OCLK_ENABLE_MASK             (0xFFFFFFFF << 0)\n#define CMU_MANUAL_OCLK_ENABLE_SHIFT            (0)\n\n// reg_14\n#define CMU_MANUAL_OCLK_DISABLE(n)              (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MANUAL_OCLK_DISABLE_MASK            (0xFFFFFFFF << 0)\n#define CMU_MANUAL_OCLK_DISABLE_SHIFT           (0)\n\n// reg_18\n#define CMU_MODE_HCLK(n)                        (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MODE_HCLK_MASK                      (0xFFFFFFFF << 0)\n#define CMU_MODE_HCLK_SHIFT                     (0)\n\n// reg_1c\n#define CMU_MODE_PCLK(n)                        (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MODE_PCLK_MASK                      (0xFFFFFFFF << 0)\n#define CMU_MODE_PCLK_SHIFT                     (0)\n\n// reg_20\n#define CMU_MODE_OCLK(n)                        (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MODE_OCLK_MASK                      (0xFFFFFFFF << 0)\n#define CMU_MODE_OCLK_SHIFT                     (0)\n\n// reg_24\n#define CMU_RAM3_RET1N0(n)                      (((n) & 0x1F) << 0)\n#define CMU_RAM3_RET1N0_MASK                    (0x1F << 0)\n#define CMU_RAM3_RET1N0_SHIFT                   (0)\n#define CMU_RAM3_RET2N0(n)                      (((n) & 0x1F) << 5)\n#define CMU_RAM3_RET2N0_MASK                    (0x1F << 5)\n#define CMU_RAM3_RET2N0_SHIFT                   (5)\n#define CMU_RAM3_PGEN0(n)                       (((n) & 0x1F) << 10)\n#define CMU_RAM3_PGEN0_MASK                     (0x1F << 10)\n#define CMU_RAM3_PGEN0_SHIFT                    (10)\n#define CMU_RAM3_RET1N1(n)                      (((n) & 0x1F) << 15)\n#define CMU_RAM3_RET1N1_MASK                    (0x1F << 15)\n#define CMU_RAM3_RET1N1_SHIFT                   (15)\n#define CMU_RAM3_RET2N1(n)                      (((n) & 0x1F) << 20)\n#define CMU_RAM3_RET2N1_MASK                    (0x1F << 20)\n#define CMU_RAM3_RET2N1_SHIFT                   (20)\n#define CMU_RAM3_PGEN1(n)                       (((n) & 0x1F) << 25)\n#define CMU_RAM3_PGEN1_MASK                     (0x1F << 25)\n#define CMU_RAM3_PGEN1_SHIFT                    (25)\n\n// reg_28\n#define CMU_HRESETN_PULSE(n)                    (((n) & 0xFFFFFFFF) << 0)\n#define CMU_HRESETN_PULSE_MASK                  (0xFFFFFFFF << 0)\n#define CMU_HRESETN_PULSE_SHIFT                 (0)\n\n#define SYS_PRST_NUM                            19\n\n// reg_2c\n#define CMU_PRESETN_PULSE(n)                    (((n) & 0xFFFFFFFF) << 0)\n#define CMU_PRESETN_PULSE_MASK                  (0xFFFFFFFF << 0)\n#define CMU_PRESETN_PULSE_SHIFT                 (0)\n#define CMU_GLOBAL_RESETN_PULSE                 (1 << (SYS_PRST_NUM+1-1))\n\n// reg_30\n#define CMU_ORESETN_PULSE(n)                    (((n) & 0xFFFFFFFF) << 0)\n#define CMU_ORESETN_PULSE_MASK                  (0xFFFFFFFF << 0)\n#define CMU_ORESETN_PULSE_SHIFT                 (0)\n\n// reg_34\n#define CMU_HRESETN_SET(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define CMU_HRESETN_SET_MASK                    (0xFFFFFFFF << 0)\n#define CMU_HRESETN_SET_SHIFT                   (0)\n\n// reg_38\n#define CMU_HRESETN_CLR(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define CMU_HRESETN_CLR_MASK                    (0xFFFFFFFF << 0)\n#define CMU_HRESETN_CLR_SHIFT                   (0)\n\n// reg_3c\n#define CMU_PRESETN_SET(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define CMU_PRESETN_SET_MASK                    (0xFFFFFFFF << 0)\n#define CMU_PRESETN_SET_SHIFT                   (0)\n#define CMU_GLOBAL_RESETN_SET                   (1 << (SYS_PRST_NUM+1-1))\n\n// reg_40\n#define CMU_PRESETN_CLR(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define CMU_PRESETN_CLR_MASK                    (0xFFFFFFFF << 0)\n#define CMU_PRESETN_CLR_SHIFT                   (0)\n#define CMU_GLOBAL_RESETN_CLR                   (1 << (SYS_PRST_NUM+1-1))\n\n// reg_44\n#define CMU_ORESETN_SET(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define CMU_ORESETN_SET_MASK                    (0xFFFFFFFF << 0)\n#define CMU_ORESETN_SET_SHIFT                   (0)\n\n// reg_48\n#define CMU_ORESETN_CLR(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define CMU_ORESETN_CLR_MASK                    (0xFFFFFFFF << 0)\n#define CMU_ORESETN_CLR_SHIFT                   (0)\n\n// reg_4c\n#define CMU_CFG_DIV_TIMER00(n)                  (((n) & 0xFFFF) << 0)\n#define CMU_CFG_DIV_TIMER00_MASK                (0xFFFF << 0)\n#define CMU_CFG_DIV_TIMER00_SHIFT               (0)\n#define CMU_CFG_DIV_TIMER01(n)                  (((n) & 0xFFFF) << 16)\n#define CMU_CFG_DIV_TIMER01_MASK                (0xFFFF << 16)\n#define CMU_CFG_DIV_TIMER01_SHIFT               (16)\n\n// reg_50\n#define CMU_WATCHDOG_RESET                      (1 << 0)\n#define CMU_SOFT_GLOBLE_RESET                   (1 << 1)\n#define CMU_RTC_INTR_H                          (1 << 2)\n#define CMU_CHG_INTR_H                          (1 << 3)\n#define CMU_SOFT_BOOT_MODE(n)                   (((n) & 0xFFFFFFF) << 4)\n#define CMU_SOFT_BOOT_MODE_MASK                 (0xFFFFFFF << 4)\n#define CMU_SOFT_BOOT_MODE_SHIFT                (4)\n\n// reg_54\n#define CMU_CFG_HCLK_MCU_OFF_TIMER(n)           (((n) & 0xFF) << 0)\n#define CMU_CFG_HCLK_MCU_OFF_TIMER_MASK         (0xFF << 0)\n#define CMU_CFG_HCLK_MCU_OFF_TIMER_SHIFT        (0)\n#define CMU_HCLK_MCU_ENABLE                     (1 << 8)\n#define CMU_SECURE_BOOT_JTAG                    (1 << 9)\n#define CMU_RAM_RETN_UP_EARLY                   (1 << 10)\n#define CMU_FLS_SEC_MSK_EN                      (1 << 11)\n#define CMU_SECURE_BOOT_I2C                     (1 << 12)\n#define CMU_DEBUG_REG_SEL(n)                    (((n) & 0x7) << 13)\n#define CMU_DEBUG_REG_SEL_MASK                  (0x7 << 13)\n#define CMU_DEBUG_REG_SEL_SHIFT                 (13)\n\n// reg_58\n#define CMU_SLEEP_TIMER(n)                      (((n) & 0xFFFFFF) << 0)\n#define CMU_SLEEP_TIMER_MASK                    (0xFFFFFF << 0)\n#define CMU_SLEEP_TIMER_SHIFT                   (0)\n#define CMU_SLEEP_TIMER_EN                      (1 << 24)\n#define CMU_DEEPSLEEP_EN                        (1 << 25)\n#define CMU_DEEPSLEEP_ROMRAM_EN                 (1 << 26)\n#define CMU_MANUAL_RAM_RETN                     (1 << 27)\n#define CMU_DEEPSLEEP_START                     (1 << 28)\n#define CMU_DEEPSLEEP_MODE                      (1 << 29)\n#define CMU_PU_OSC                              (1 << 30)\n#define CMU_WAKEUP_DEEPSLEEP_L                  (1 << 31)\n\n// reg_5c\n#define CMU_CFG_DIV_SDMMC(n)                    (((n) & 0xF) << 0)\n#define CMU_CFG_DIV_SDMMC_MASK                  (0xF << 0)\n#define CMU_CFG_DIV_SDMMC_SHIFT                 (0)\n#define CMU_SEL_OSCX2_SDMMC                     (1 << 4)\n#define CMU_SEL_PLL_SDMMC                       (1 << 5)\n#define CMU_EN_PLL_SDMMC                        (1 << 6)\n#define CMU_SEL_32K_TIMER(n)                    (((n) & 0x7) << 7)\n#define CMU_SEL_32K_TIMER_MASK                  (0x7 << 7)\n#define CMU_SEL_32K_TIMER_SHIFT                 (7)\n#define CMU_SEL_32K_WDT                         (1 << 10)\n#define CMU_SEL_TIMER_FAST(n)                   (((n) & 0x7) << 11)\n#define CMU_SEL_TIMER_FAST_MASK                 (0x7 << 11)\n#define CMU_SEL_TIMER_FAST_SHIFT                (11)\n#define CMU_CFG_CLK_OUT(n)                      (((n) & 0xF) << 14)\n#define CMU_CFG_CLK_OUT_MASK                    (0xF << 14)\n#define CMU_CFG_CLK_OUT_SHIFT                   (14)\n#define CMU_SPI_I2C_DMAREQ_SEL                  (1 << 18)\n#define CMU_MASK_OBS(n)                         (((n) & 0x3F) << 19)\n#define CMU_MASK_OBS_MASK                       (0x3F << 19)\n#define CMU_MASK_OBS_SHIFT                      (19)\n#define CMU_JTAG_SEL_CP                         (1 << 25)\n\n// reg_60\n#define CMU_RSTN_DIV_FLS_ENABLE                 (1 << 0)\n#define CMU_SEL_OSC_FLS_ENABLE                  (1 << 1)\n#define CMU_SEL_OSCX2_FLS_ENABLE                (1 << 2)\n#define CMU_SEL_PLL_FLS_ENABLE                  (1 << 3)\n#define CMU_BYPASS_DIV_FLS_ENABLE               (1 << 4)\n#define CMU_RSTN_DIV_SYS_ENABLE                 (1 << 5)\n#define CMU_SEL_OSC_SYS_ENABLE                  (1 << 6)\n#define CMU_SEL_OSCX2_SYS_ENABLE                (1 << 7)\n#define CMU_SEL_PLL_SYS_ENABLE                  (1 << 8)\n#define CMU_BYPASS_DIV_SYS_ENABLE               (1 << 9)\n#define CMU_EN_PLL_ENABLE                       (1 << 10)\n#define CMU_PU_PLL_ENABLE                       (1 << 11)\n\n// reg_64\n#define CMU_RSTN_DIV_FLS_DISABLE                (1 << 0)\n#define CMU_SEL_OSC_FLS_DISABLE                 (1 << 1)\n#define CMU_SEL_OSCX2_FLS_DISABLE               (1 << 2)\n#define CMU_SEL_PLL_FLS_DISABLE                 (1 << 3)\n#define CMU_BYPASS_DIV_FLS_DISABLE              (1 << 4)\n#define CMU_RSTN_DIV_SYS_DISABLE                (1 << 5)\n#define CMU_SEL_OSC_SYS_DISABLE                 (1 << 6)\n#define CMU_SEL_OSCX2_SYS_DISABLE               (1 << 7)\n#define CMU_SEL_PLL_SYS_DISABLE                 (1 << 8)\n#define CMU_BYPASS_DIV_SYS_DISABLE              (1 << 9)\n#define CMU_EN_PLL_DISABLE                      (1 << 10)\n#define CMU_PU_PLL_DISABLE                      (1 << 11)\n\n// reg_68\n#define CMU_ADMA_CH15_REQ_IDX(n)                (((n) & 0x3F) << 0)\n#define CMU_ADMA_CH15_REQ_IDX_MASK              (0x3F << 0)\n#define CMU_ADMA_CH15_REQ_IDX_SHIFT             (0)\n\n// reg_6c\n#define CMU_ROM_EMA(n)                          (((n) & 0x7) << 0)\n#define CMU_ROM_EMA_MASK                        (0x7 << 0)\n#define CMU_ROM_EMA_SHIFT                       (0)\n#define CMU_ROM_KEN                             (1 << 3)\n#define CMU_ROM_PGEN(n)                         (((n) & 0x7) << 4)\n#define CMU_ROM_PGEN_MASK                       (0x7 << 4)\n#define CMU_ROM_PGEN_SHIFT                      (4)\n#define CMU_RAM_EMA(n)                          (((n) & 0x7) << 7)\n#define CMU_RAM_EMA_MASK                        (0x7 << 7)\n#define CMU_RAM_EMA_SHIFT                       (7)\n#define CMU_RAM_EMAW(n)                         (((n) & 0x3) << 10)\n#define CMU_RAM_EMAW_MASK                       (0x3 << 10)\n#define CMU_RAM_EMAW_SHIFT                      (10)\n#define CMU_RAM_WABL                            (1 << 12)\n#define CMU_RAM_WABLM(n)                        (((n) & 0x3) << 13)\n#define CMU_RAM_WABLM_MASK                      (0x3 << 13)\n#define CMU_RAM_WABLM_SHIFT                     (13)\n#define CMU_RAM_EMAS                            (1 << 15)\n#define CMU_RF_EMA(n)                           (((n) & 0x7) << 16)\n#define CMU_RF_EMA_MASK                         (0x7 << 16)\n#define CMU_RF_EMA_SHIFT                        (16)\n#define CMU_RF_EMAW(n)                          (((n) & 0x3) << 19)\n#define CMU_RF_EMAW_MASK                        (0x3 << 19)\n#define CMU_RF_EMAW_SHIFT                       (19)\n#define CMU_RF_WABL                             (1 << 21)\n#define CMU_RF_WABLM(n)                         (((n) & 0x3) << 22)\n#define CMU_RF_WABLM_MASK                       (0x3 << 22)\n#define CMU_RF_WABLM_SHIFT                      (22)\n#define CMU_RF_EMAS                             (1 << 24)\n#define CMU_RF_RET1N0                           (1 << 25)\n#define CMU_RF_RET2N0                           (1 << 26)\n#define CMU_RF_PGEN0                            (1 << 27)\n#define CMU_RF_RET1N1                           (1 << 28)\n#define CMU_RF_RET2N1                           (1 << 29)\n#define CMU_RF_PGEN1                            (1 << 30)\n\n// reg_70\n#define CMU_CFG_DIV_UART0(n)                    (((n) & 0x1F) << 0)\n#define CMU_CFG_DIV_UART0_MASK                  (0x1F << 0)\n#define CMU_CFG_DIV_UART0_SHIFT                 (0)\n#define CMU_SEL_OSCX2_UART0                     (1 << 5)\n#define CMU_SEL_PLL_UART0                       (1 << 6)\n#define CMU_EN_PLL_UART0                        (1 << 7)\n#define CMU_CFG_DIV_UART1(n)                    (((n) & 0x1F) << 8)\n#define CMU_CFG_DIV_UART1_MASK                  (0x1F << 8)\n#define CMU_CFG_DIV_UART1_SHIFT                 (8)\n#define CMU_SEL_OSCX2_UART1                     (1 << 13)\n#define CMU_SEL_PLL_UART1                       (1 << 14)\n#define CMU_EN_PLL_UART1                        (1 << 15)\n#define CMU_CFG_DIV_UART2(n)                    (((n) & 0x1F) << 16)\n#define CMU_CFG_DIV_UART2_MASK                  (0x1F << 16)\n#define CMU_CFG_DIV_UART2_SHIFT                 (16)\n#define CMU_SEL_OSCX2_UART2                     (1 << 21)\n#define CMU_SEL_PLL_UART2                       (1 << 22)\n#define CMU_EN_PLL_UART2                        (1 << 23)\n\n// reg_74\n#define CMU_CFG_DIV_I2C(n)                      (((n) & 0xFF) << 0)\n#define CMU_CFG_DIV_I2C_MASK                    (0xFF << 0)\n#define CMU_CFG_DIV_I2C_SHIFT                   (0)\n#define CMU_SEL_OSC_I2C                         (1 << 8)\n#define CMU_SEL_OSCX2_I2C                       (1 << 9)\n#define CMU_SEL_PLL_I2C                         (1 << 10)\n#define CMU_EN_PLL_I2C                          (1 << 11)\n#define CMU_POL_CLK_PCM_IN                      (1 << 12)\n#define CMU_SEL_PCM_CLKIN                       (1 << 13)\n#define CMU_EN_CLK_PCM_OUT                      (1 << 14)\n#define CMU_POL_CLK_PCM_OUT                     (1 << 15)\n#define CMU_POL_CLK_I2S0_IN                     (1 << 16)\n#define CMU_SEL_I2S0_CLKIN                      (1 << 17)\n#define CMU_EN_CLK_I2S0_OUT                     (1 << 18)\n#define CMU_POL_CLK_I2S0_OUT                    (1 << 19)\n#define CMU_FORCE_PU_OFF                        (1 << 20)\n#define CMU_LOCK_CPU_EN                         (1 << 21)\n#define CMU_SEL_ROM_FAST                        (1 << 22)\n#define CMU_POL_CLK_I2S1_IN                     (1 << 23)\n#define CMU_SEL_I2S1_CLKIN                      (1 << 24)\n#define CMU_EN_CLK_I2S1_OUT                     (1 << 25)\n#define CMU_POL_CLK_I2S1_OUT                    (1 << 26)\n\n// reg_78\n#define CMU_RAM_RET1N0(n)                       (((n) & 0x3FF) << 0)\n#define CMU_RAM_RET1N0_MASK                     (0x3FF << 0)\n#define CMU_RAM_RET1N0_SHIFT                    (0)\n#define CMU_RAM_RET2N0(n)                       (((n) & 0x3FF) << 10)\n#define CMU_RAM_RET2N0_MASK                     (0x3FF << 10)\n#define CMU_RAM_RET2N0_SHIFT                    (10)\n#define CMU_RAM_PGEN0(n)                        (((n) & 0x3FF) << 20)\n#define CMU_RAM_PGEN0_MASK                      (0x3FF << 20)\n#define CMU_RAM_PGEN0_SHIFT                     (20)\n\n// reg_7c\n#define CMU_RAM_RET1N1(n)                       (((n) & 0x3FF) << 0)\n#define CMU_RAM_RET1N1_MASK                     (0x3FF << 0)\n#define CMU_RAM_RET1N1_SHIFT                    (0)\n#define CMU_RAM_RET2N1(n)                       (((n) & 0x3FF) << 10)\n#define CMU_RAM_RET2N1_MASK                     (0x3FF << 10)\n#define CMU_RAM_RET2N1_SHIFT                    (10)\n#define CMU_RAM_PGEN1(n)                        (((n) & 0x3FF) << 20)\n#define CMU_RAM_PGEN1_MASK                      (0x3FF << 20)\n#define CMU_RAM_PGEN1_SHIFT                     (20)\n\n// reg_80\n#define CMU_WRITE_UNLOCK_H                      (1 << 0)\n#define CMU_WRITE_UNLOCK_STATUS                 (1 << 1)\n\n// reg_84\n#define CMU_WAKEUP_IRQ_MASK0(n)                 (((n) & 0xFFFFFFFF) << 0)\n#define CMU_WAKEUP_IRQ_MASK0_MASK               (0xFFFFFFFF << 0)\n#define CMU_WAKEUP_IRQ_MASK0_SHIFT              (0)\n\n// reg_88\n#define CMU_WAKEUP_IRQ_MASK1(n)                 (((n) & 0xFFFFF) << 0)\n#define CMU_WAKEUP_IRQ_MASK1_MASK               (0xFFFFF << 0)\n#define CMU_WAKEUP_IRQ_MASK1_SHIFT              (0)\n\n// reg_8c\n#define CMU_TIMER_WT26(n)                       (((n) & 0xFF) << 0)\n#define CMU_TIMER_WT26_MASK                     (0xFF << 0)\n#define CMU_TIMER_WT26_SHIFT                    (0)\n#define CMU_TIMER_WTPLL(n)                      (((n) & 0xF) << 8)\n#define CMU_TIMER_WTPLL_MASK                    (0xF << 8)\n#define CMU_TIMER_WTPLL_SHIFT                   (8)\n#define CMU_LPU_AUTO_SWITCH26                   (1 << 12)\n#define CMU_LPU_AUTO_SWITCHPLL                  (1 << 13)\n#define CMU_LPU_STATUS_26M                      (1 << 14)\n#define CMU_LPU_STATUS_PLL                      (1 << 15)\n\n// reg_90\n#define CMU_CFG_DIV_TIMER10(n)                  (((n) & 0xFFFF) << 0)\n#define CMU_CFG_DIV_TIMER10_MASK                (0xFFFF << 0)\n#define CMU_CFG_DIV_TIMER10_SHIFT               (0)\n#define CMU_CFG_DIV_TIMER11(n)                  (((n) & 0xFFFF) << 16)\n#define CMU_CFG_DIV_TIMER11_MASK                (0xFFFF << 16)\n#define CMU_CFG_DIV_TIMER11_SHIFT               (16)\n\n// reg_94\n#define CMU_CFG_DIV_TIMER20(n)                  (((n) & 0xFFFF) << 0)\n#define CMU_CFG_DIV_TIMER20_MASK                (0xFFFF << 0)\n#define CMU_CFG_DIV_TIMER20_SHIFT               (0)\n#define CMU_CFG_DIV_TIMER21(n)                  (((n) & 0xFFFF) << 16)\n#define CMU_CFG_DIV_TIMER21_MASK                (0xFFFF << 16)\n#define CMU_CFG_DIV_TIMER21_SHIFT               (16)\n\n// reg_98\n#define CMU_MCU2CP_DATA_DONE_SET                (1 << 0)\n#define CMU_MCU2CP_DATA1_DONE_SET               (1 << 1)\n#define CMU_MCU2CP_DATA2_DONE_SET               (1 << 2)\n#define CMU_MCU2CP_DATA3_DONE_SET               (1 << 3)\n#define CMU_CP2MCU_DATA_IND_SET                 (1 << 4)\n#define CMU_CP2MCU_DATA1_IND_SET                (1 << 5)\n#define CMU_CP2MCU_DATA2_IND_SET                (1 << 6)\n#define CMU_CP2MCU_DATA3_IND_SET                (1 << 7)\n\n// reg_9c\n#define CMU_MCU2CP_DATA_DONE_CLR                (1 << 0)\n#define CMU_MCU2CP_DATA1_DONE_CLR               (1 << 1)\n#define CMU_MCU2CP_DATA2_DONE_CLR               (1 << 2)\n#define CMU_MCU2CP_DATA3_DONE_CLR               (1 << 3)\n#define CMU_CP2MCU_DATA_IND_CLR                 (1 << 4)\n#define CMU_CP2MCU_DATA1_IND_CLR                (1 << 5)\n#define CMU_CP2MCU_DATA2_IND_CLR                (1 << 6)\n#define CMU_CP2MCU_DATA3_IND_CLR                (1 << 7)\n\n// reg_a0\n#define CMU_BT2MCU_DATA_DONE_SET                (1 << 0)\n#define CMU_BT2MCU_DATA1_DONE_SET               (1 << 1)\n#define CMU_MCU2BT_DATA_IND_SET                 (1 << 2)\n#define CMU_MCU2BT_DATA1_IND_SET                (1 << 3)\n#define CMU_BT_ALLIRQ_MASK_SET                  (1 << 4)\n\n// reg_a4\n#define CMU_BT2MCU_DATA_DONE_CLR                (1 << 0)\n#define CMU_BT2MCU_DATA1_DONE_CLR               (1 << 1)\n#define CMU_MCU2BT_DATA_IND_CLR                 (1 << 2)\n#define CMU_MCU2BT_DATA1_IND_CLR                (1 << 3)\n#define CMU_BT_ALLIRQ_MASK_CLR                  (1 << 4)\n\n// reg_a8\n#define CMU_CFG_DIV_SYS(n)                      (((n) & 0x3) << 0)\n#define CMU_CFG_DIV_SYS_MASK                    (0x3 << 0)\n#define CMU_CFG_DIV_SYS_SHIFT                   (0)\n#define CMU_SEL_SMP_MCU(n)                      (((n) & 0x3) << 2)\n#define CMU_SEL_SMP_MCU_MASK                    (0x3 << 2)\n#define CMU_SEL_SMP_MCU_SHIFT                   (2)\n#define CMU_CFG_DIV_FLS(n)                      (((n) & 0x3) << 4)\n#define CMU_CFG_DIV_FLS_MASK                    (0x3 << 4)\n#define CMU_CFG_DIV_FLS_SHIFT                   (4)\n#define CMU_SEL_USB_6M                          (1 << 6)\n#define CMU_SEL_USB_SRC(n)                      (((n) & 0x7) << 7)\n#define CMU_SEL_USB_SRC_MASK                    (0x7 << 7)\n#define CMU_SEL_USB_SRC_SHIFT                   (7)\n#define CMU_POL_CLK_USB                         (1 << 10)\n#define CMU_USB_ID                              (1 << 11)\n#define CMU_CFG_DIV_PCLK(n)                     (((n) & 0x3) << 12)\n#define CMU_CFG_DIV_PCLK_MASK                   (0x3 << 12)\n#define CMU_CFG_DIV_PCLK_SHIFT                  (12)\n#define CMU_CFG_DIV_SPI0(n)                     (((n) & 0xF) << 14)\n#define CMU_CFG_DIV_SPI0_MASK                   (0xF << 14)\n#define CMU_CFG_DIV_SPI0_SHIFT                  (14)\n#define CMU_SEL_OSCX2_SPI0                      (1 << 18)\n#define CMU_SEL_PLL_SPI0                        (1 << 19)\n#define CMU_EN_PLL_SPI0                         (1 << 20)\n#define CMU_CFG_DIV_SPI1(n)                     (((n) & 0xF) << 21)\n#define CMU_CFG_DIV_SPI1_MASK                   (0xF << 21)\n#define CMU_CFG_DIV_SPI1_SHIFT                  (21)\n#define CMU_SEL_OSCX2_SPI1                      (1 << 25)\n#define CMU_SEL_PLL_SPI1                        (1 << 26)\n#define CMU_EN_PLL_SPI1                         (1 << 27)\n#define CMU_SEL_OSCX2_SPI2                      (1 << 28)\n#define CMU_DSD_PCM_DMAREQ_SEL                  (1 << 29)\n\n// reg_ac\n#define CMU_DMA_HANDSHAKE_SWAP(n)               (((n) & 0xFFFF) << 0)\n#define CMU_DMA_HANDSHAKE_SWAP_MASK             (0xFFFF << 0)\n#define CMU_DMA_HANDSHAKE_SWAP_SHIFT            (0)\n#define CMU_RESERVED_2(n)                       (((n) & 0xFFFF) << 16)\n#define CMU_RESERVED_2_MASK                     (0xFFFF << 16)\n#define CMU_RESERVED_2_SHIFT                    (16)\n\n// reg_b0\n#define CMU_MCU2BT_INTISR_MASK0(n)              (((n) & 0xFFFFFFFF) << 0)\n#define CMU_MCU2BT_INTISR_MASK0_MASK            (0xFFFFFFFF << 0)\n#define CMU_MCU2BT_INTISR_MASK0_SHIFT           (0)\n\n// reg_b4\n#define CMU_MCU2BT_INTISR_MASK1(n)              (((n) & 0xFFFFF) << 0)\n#define CMU_MCU2BT_INTISR_MASK1_MASK            (0xFFFFF << 0)\n#define CMU_MCU2BT_INTISR_MASK1_SHIFT           (0)\n\n// reg_b8\n#define CMU_CP2MCU_DATA_DONE_SET                (1 << 0)\n#define CMU_CP2MCU_DATA1_DONE_SET               (1 << 1)\n#define CMU_CP2MCU_DATA2_DONE_SET               (1 << 2)\n#define CMU_CP2MCU_DATA3_DONE_SET               (1 << 3)\n#define CMU_MCU2CP_DATA_IND_SET                 (1 << 4)\n#define CMU_MCU2CP_DATA1_IND_SET                (1 << 5)\n#define CMU_MCU2CP_DATA2_IND_SET                (1 << 6)\n#define CMU_MCU2CP_DATA3_IND_SET                (1 << 7)\n\n// reg_bc\n#define CMU_CP2MCU_DATA_DONE_CLR                (1 << 0)\n#define CMU_CP2MCU_DATA1_DONE_CLR               (1 << 1)\n#define CMU_CP2MCU_DATA2_DONE_CLR               (1 << 2)\n#define CMU_CP2MCU_DATA3_DONE_CLR               (1 << 3)\n#define CMU_MCU2CP_DATA_IND_CLR                 (1 << 4)\n#define CMU_MCU2CP_DATA1_IND_CLR                (1 << 5)\n#define CMU_MCU2CP_DATA2_IND_CLR                (1 << 6)\n#define CMU_MCU2CP_DATA3_IND_CLR                (1 << 7)\n\n// reg_c0\n#define CMU_MEMSC0                              (1 << 0)\n\n// reg_c4\n#define CMU_MEMSC1                              (1 << 0)\n\n// reg_c8\n#define CMU_MEMSC2                              (1 << 0)\n\n// reg_cc\n#define CMU_MEMSC3                              (1 << 0)\n\n// reg_d0\n#define CMU_MEMSC_STATUS0                       (1 << 0)\n#define CMU_MEMSC_STATUS1                       (1 << 1)\n#define CMU_MEMSC_STATUS2                       (1 << 2)\n#define CMU_MEMSC_STATUS3                       (1 << 3)\n\n// reg_d4\n#define CMU_ADMA_CH0_REQ_IDX(n)                 (((n) & 0x3F) << 0)\n#define CMU_ADMA_CH0_REQ_IDX_MASK               (0x3F << 0)\n#define CMU_ADMA_CH0_REQ_IDX_SHIFT              (0)\n#define CMU_ADMA_CH1_REQ_IDX(n)                 (((n) & 0x3F) << 6)\n#define CMU_ADMA_CH1_REQ_IDX_MASK               (0x3F << 6)\n#define CMU_ADMA_CH1_REQ_IDX_SHIFT              (6)\n#define CMU_ADMA_CH2_REQ_IDX(n)                 (((n) & 0x3F) << 12)\n#define CMU_ADMA_CH2_REQ_IDX_MASK               (0x3F << 12)\n#define CMU_ADMA_CH2_REQ_IDX_SHIFT              (12)\n#define CMU_ADMA_CH3_REQ_IDX(n)                 (((n) & 0x3F) << 18)\n#define CMU_ADMA_CH3_REQ_IDX_MASK               (0x3F << 18)\n#define CMU_ADMA_CH3_REQ_IDX_SHIFT              (18)\n#define CMU_ADMA_CH4_REQ_IDX(n)                 (((n) & 0x3F) << 24)\n#define CMU_ADMA_CH4_REQ_IDX_MASK               (0x3F << 24)\n#define CMU_ADMA_CH4_REQ_IDX_SHIFT              (24)\n\n// reg_d8\n#define CMU_ADMA_CH5_REQ_IDX(n)                 (((n) & 0x3F) << 0)\n#define CMU_ADMA_CH5_REQ_IDX_MASK               (0x3F << 0)\n#define CMU_ADMA_CH5_REQ_IDX_SHIFT              (0)\n#define CMU_ADMA_CH6_REQ_IDX(n)                 (((n) & 0x3F) << 6)\n#define CMU_ADMA_CH6_REQ_IDX_MASK               (0x3F << 6)\n#define CMU_ADMA_CH6_REQ_IDX_SHIFT              (6)\n#define CMU_ADMA_CH7_REQ_IDX(n)                 (((n) & 0x3F) << 12)\n#define CMU_ADMA_CH7_REQ_IDX_MASK               (0x3F << 12)\n#define CMU_ADMA_CH7_REQ_IDX_SHIFT              (12)\n#define CMU_ADMA_CH8_REQ_IDX(n)                 (((n) & 0x3F) << 18)\n#define CMU_ADMA_CH8_REQ_IDX_MASK               (0x3F << 18)\n#define CMU_ADMA_CH8_REQ_IDX_SHIFT              (18)\n#define CMU_ADMA_CH9_REQ_IDX(n)                 (((n) & 0x3F) << 24)\n#define CMU_ADMA_CH9_REQ_IDX_MASK               (0x3F << 24)\n#define CMU_ADMA_CH9_REQ_IDX_SHIFT              (24)\n\n// reg_dc\n#define CMU_ADMA_CH10_REQ_IDX(n)                (((n) & 0x3F) << 0)\n#define CMU_ADMA_CH10_REQ_IDX_MASK              (0x3F << 0)\n#define CMU_ADMA_CH10_REQ_IDX_SHIFT             (0)\n#define CMU_ADMA_CH11_REQ_IDX(n)                (((n) & 0x3F) << 6)\n#define CMU_ADMA_CH11_REQ_IDX_MASK              (0x3F << 6)\n#define CMU_ADMA_CH11_REQ_IDX_SHIFT             (6)\n#define CMU_ADMA_CH12_REQ_IDX(n)                (((n) & 0x3F) << 12)\n#define CMU_ADMA_CH12_REQ_IDX_MASK              (0x3F << 12)\n#define CMU_ADMA_CH12_REQ_IDX_SHIFT             (12)\n#define CMU_ADMA_CH13_REQ_IDX(n)                (((n) & 0x3F) << 18)\n#define CMU_ADMA_CH13_REQ_IDX_MASK              (0x3F << 18)\n#define CMU_ADMA_CH13_REQ_IDX_SHIFT             (18)\n#define CMU_ADMA_CH14_REQ_IDX(n)                (((n) & 0x3F) << 24)\n#define CMU_ADMA_CH14_REQ_IDX_MASK              (0x3F << 24)\n#define CMU_ADMA_CH14_REQ_IDX_SHIFT             (24)\n\n// reg_e0\n#define CMU_GDMA_CH0_REQ_IDX(n)                 (((n) & 0x3F) << 0)\n#define CMU_GDMA_CH0_REQ_IDX_MASK               (0x3F << 0)\n#define CMU_GDMA_CH0_REQ_IDX_SHIFT              (0)\n#define CMU_GDMA_CH1_REQ_IDX(n)                 (((n) & 0x3F) << 6)\n#define CMU_GDMA_CH1_REQ_IDX_MASK               (0x3F << 6)\n#define CMU_GDMA_CH1_REQ_IDX_SHIFT              (6)\n#define CMU_GDMA_CH2_REQ_IDX(n)                 (((n) & 0x3F) << 12)\n#define CMU_GDMA_CH2_REQ_IDX_MASK               (0x3F << 12)\n#define CMU_GDMA_CH2_REQ_IDX_SHIFT              (12)\n#define CMU_GDMA_CH3_REQ_IDX(n)                 (((n) & 0x3F) << 18)\n#define CMU_GDMA_CH3_REQ_IDX_MASK               (0x3F << 18)\n#define CMU_GDMA_CH3_REQ_IDX_SHIFT              (18)\n#define CMU_GDMA_CH4_REQ_IDX(n)                 (((n) & 0x3F) << 24)\n#define CMU_GDMA_CH4_REQ_IDX_MASK               (0x3F << 24)\n#define CMU_GDMA_CH4_REQ_IDX_SHIFT              (24)\n\n// reg_e4\n#define CMU_GDMA_CH5_REQ_IDX(n)                 (((n) & 0x3F) << 0)\n#define CMU_GDMA_CH5_REQ_IDX_MASK               (0x3F << 0)\n#define CMU_GDMA_CH5_REQ_IDX_SHIFT              (0)\n#define CMU_GDMA_CH6_REQ_IDX(n)                 (((n) & 0x3F) << 6)\n#define CMU_GDMA_CH6_REQ_IDX_MASK               (0x3F << 6)\n#define CMU_GDMA_CH6_REQ_IDX_SHIFT              (6)\n#define CMU_GDMA_CH7_REQ_IDX(n)                 (((n) & 0x3F) << 12)\n#define CMU_GDMA_CH7_REQ_IDX_MASK               (0x3F << 12)\n#define CMU_GDMA_CH7_REQ_IDX_SHIFT              (12)\n#define CMU_GDMA_CH8_REQ_IDX(n)                 (((n) & 0x3F) << 18)\n#define CMU_GDMA_CH8_REQ_IDX_MASK               (0x3F << 18)\n#define CMU_GDMA_CH8_REQ_IDX_SHIFT              (18)\n#define CMU_GDMA_CH9_REQ_IDX(n)                 (((n) & 0x3F) << 24)\n#define CMU_GDMA_CH9_REQ_IDX_MASK               (0x3F << 24)\n#define CMU_GDMA_CH9_REQ_IDX_SHIFT              (24)\n\n// reg_e8\n#define CMU_GDMA_CH10_REQ_IDX(n)                (((n) & 0x3F) << 0)\n#define CMU_GDMA_CH10_REQ_IDX_MASK              (0x3F << 0)\n#define CMU_GDMA_CH10_REQ_IDX_SHIFT             (0)\n#define CMU_GDMA_CH11_REQ_IDX(n)                (((n) & 0x3F) << 6)\n#define CMU_GDMA_CH11_REQ_IDX_MASK              (0x3F << 6)\n#define CMU_GDMA_CH11_REQ_IDX_SHIFT             (6)\n#define CMU_GDMA_CH12_REQ_IDX(n)                (((n) & 0x3F) << 12)\n#define CMU_GDMA_CH12_REQ_IDX_MASK              (0x3F << 12)\n#define CMU_GDMA_CH12_REQ_IDX_SHIFT             (12)\n#define CMU_GDMA_CH13_REQ_IDX(n)                (((n) & 0x3F) << 18)\n#define CMU_GDMA_CH13_REQ_IDX_MASK              (0x3F << 18)\n#define CMU_GDMA_CH13_REQ_IDX_SHIFT             (18)\n#define CMU_GDMA_CH14_REQ_IDX(n)                (((n) & 0x3F) << 24)\n#define CMU_GDMA_CH14_REQ_IDX_MASK              (0x3F << 24)\n#define CMU_GDMA_CH14_REQ_IDX_SHIFT             (24)\n\n// reg_ec\n#define CMU_GDMA_CH15_REQ_IDX(n)                (((n) & 0x3F) << 0)\n#define CMU_GDMA_CH15_REQ_IDX_MASK              (0x3F << 0)\n#define CMU_GDMA_CH15_REQ_IDX_SHIFT             (0)\n\n// reg_f0\n#define CMU_RESERVED(n)                         (((n) & 0xFFFFFFFF) << 0)\n#define CMU_RESERVED_MASK                       (0xFFFFFFFF << 0)\n#define CMU_RESERVED_SHIFT                      (0)\n\n// reg_f4\n#define CMU_DEBUG(n)                            (((n) & 0xFFFFFFFF) << 0)\n#define CMU_DEBUG_MASK                          (0xFFFFFFFF << 0)\n#define CMU_DEBUG_SHIFT                         (0)\n\n// reg_f8\n#define CMU_SEC_ROM_STR_ADDR(n)                 (((n) & 0xFFFF) << 0)\n#define CMU_SEC_ROM_STR_ADDR_MASK               (0xFFFF << 0)\n#define CMU_SEC_ROM_STR_ADDR_SHIFT              (0)\n#define CMU_SEC_ROM_END_ADDR(n)                 (((n) & 0xFFFF) << 16)\n#define CMU_SEC_ROM_END_ADDR_MASK               (0xFFFF << 16)\n#define CMU_SEC_ROM_END_ADDR_SHIFT              (16)\n\n// reg_fc\n#define CMU_CPU_ACC_RAM_EN                      (1 << 0)\n#define CMU_BCM_ACC_RAM_EN                      (1 << 1)\n#define CMU_NONSEC_ACC_RAM_EN                   (1 << 2)\n#define CMU_JTAG_ACC_RAM_EN                     (1 << 3)\n#define CMU_JTAG_ACC_SECROM_EN                  (1 << 4)\n#define CMU_DCODE_ACC_SECROM_EN                 (1 << 5)\n\n// MCU System AHB Clocks:\n#define SYS_HCLK_MCU                    (1 << 0)\n#define SYS_HRST_MCU                    (1 << 0)\n#define SYS_HCLK_ROM0                   (1 << 1)\n#define SYS_HRST_ROM0                   (1 << 1)\n#define SYS_HCLK_ROM1                   (1 << 2)\n#define SYS_HRST_ROM1                   (1 << 2)\n#define SYS_HCLK_ROM2                   (1 << 3)\n#define SYS_HRST_ROM2                   (1 << 3)\n#define SYS_HCLK_RAM0                   (1 << 4)\n#define SYS_HRST_RAM0                   (1 << 4)\n#define SYS_HCLK_RAM1                   (1 << 5)\n#define SYS_HRST_RAM1                   (1 << 5)\n#define SYS_HCLK_RAM2                   (1 << 6)\n#define SYS_HRST_RAM2                   (1 << 6)\n#define SYS_HCLK_RAMRET                 (1 << 7)\n#define SYS_HRST_RAMRET                 (1 << 7)\n#define SYS_HCLK_AHB0                   (1 << 8)\n#define SYS_HRST_AHB0                   (1 << 8)\n#define SYS_HCLK_AHB1                   (1 << 9)\n#define SYS_HRST_AHB1                   (1 << 9)\n#define SYS_HCLK_AH2H_BT                (1 << 10)\n#define SYS_HRST_AH2H_BT                (1 << 10)\n#define SYS_HCLK_ADMA                   (1 << 11)\n#define SYS_HRST_ADMA                   (1 << 11)\n#define SYS_HCLK_GDMA                   (1 << 12)\n#define SYS_HRST_GDMA                   (1 << 12)\n#define SYS_HCLK_EXTMEM                 (1 << 13)\n#define SYS_HRST_EXTMEM                 (1 << 13)\n#define SYS_HCLK_FLASH                  (1 << 14)\n#define SYS_HRST_FLASH                  (1 << 14)\n#define SYS_HCLK_SDMMC                  (1 << 15)\n#define SYS_HRST_SDMMC                  (1 << 15)\n#define SYS_HCLK_USBC                   (1 << 16)\n#define SYS_HRST_USBC                   (1 << 16)\n#define SYS_HCLK_CODEC                  (1 << 17)\n#define SYS_HRST_CODEC                  (1 << 17)\n#define SYS_HCLK_FFT                    (1 << 18)\n#define SYS_HRST_FFT                    (1 << 18)\n#define SYS_HCLK_I2C_SLAVE              (1 << 19)\n#define SYS_HRST_I2C_SLAVE              (1 << 19)\n#define SYS_HCLK_USBH                   (1 << 20)\n#define SYS_HRST_USBH                   (1 << 20)\n#define SYS_HCLK_SENSOR_HUB             (1 << 21)\n#define SYS_HRST_SENSOR_HUB             (1 << 21)\n#define SYS_HCLK_BT_DUMP                (1 << 22)\n#define SYS_HRST_BT_DUMP                (1 << 22)\n#define SYS_HCLK_CP                     (1 << 23)\n#define SYS_HRST_CP                     (1 << 23)\n#define SYS_HCLK_RAM3                   (1 << 24)\n#define SYS_HRST_RAM3                   (1 << 24)\n#define SYS_HCLK_RAM4                   (1 << 25)\n#define SYS_HRST_RAM4                   (1 << 25)\n#define SYS_HCLK_RAM5                   (1 << 26)\n#define SYS_HRST_RAM5                   (1 << 26)\n#define SYS_HCLK_RAM6                   (1 << 27)\n#define SYS_HRST_RAM6                   (1 << 27)\n#define SYS_HCLK_BCM                    (1 << 28)\n#define SYS_HRST_BCM                    (1 << 28)\n#define SYS_HCLK_ICACHE0                (1 << 29)\n#define SYS_HRST_ICACHE0                (1 << 29)\n#define SYS_HCLK_ICACHE1                (1 << 30)\n#define SYS_HRST_ICACHE1                (1 << 30)\n\n// MCU System APB Clocks:\n#define SYS_PCLK_CMU                    (1 << 0)\n#define SYS_PRST_CMU                    (1 << 0)\n#define SYS_PCLK_WDT                    (1 << 1)\n#define SYS_PRST_WDT                    (1 << 1)\n#define SYS_PCLK_TIMER0                 (1 << 2)\n#define SYS_PRST_TIMER0                 (1 << 2)\n#define SYS_PCLK_TIMER1                 (1 << 3)\n#define SYS_PRST_TIMER1                 (1 << 3)\n#define SYS_PCLK_TIMER2                 (1 << 4)\n#define SYS_PRST_TIMER2                 (1 << 4)\n#define SYS_PCLK_I2C0                   (1 << 5)\n#define SYS_PRST_I2C0                   (1 << 5)\n#define SYS_PCLK_I2C1                   (1 << 6)\n#define SYS_PRST_I2C1                   (1 << 6)\n#define SYS_PCLK_SPI                    (1 << 7)\n#define SYS_PRST_SPI                    (1 << 7)\n#define SYS_PCLK_SLCD                   (1 << 8)\n#define SYS_PRST_SLCD                   (1 << 8)\n#define SYS_PCLK_SPI_ITN                (1 << 9)\n#define SYS_PRST_SPI_ITN                (1 << 9)\n#define SYS_PCLK_SPI_PHY                (1 << 10)\n#define SYS_PRST_SPI_PHY                (1 << 10)\n#define SYS_PCLK_UART0                  (1 << 11)\n#define SYS_PRST_UART0                  (1 << 11)\n#define SYS_PCLK_UART1                  (1 << 12)\n#define SYS_PRST_UART1                  (1 << 12)\n#define SYS_PCLK_UART2                  (1 << 13)\n#define SYS_PRST_UART2                  (1 << 13)\n#define SYS_PCLK_PCM                    (1 << 14)\n#define SYS_PRST_PCM                    (1 << 14)\n#define SYS_PCLK_I2S0                   (1 << 15)\n#define SYS_PRST_I2S0                   (1 << 15)\n#define SYS_PCLK_SPDIF0                 (1 << 16)\n#define SYS_PRST_SPDIF0                 (1 << 16)\n#define SYS_PCLK_I2S1                   (1 << 17)\n#define SYS_PRST_I2S1                   (1 << 17)\n#define SYS_PCLK_BCM                    (1 << 18)\n#define SYS_PRST_BCM                    (1 << 18)\n\n// MCU System Other Clocks:\n#define SYS_OCLK_SLEEP                  (1 << 0)\n#define SYS_ORST_SLEEP                  (1 << 0)\n#define SYS_OCLK_FLASH                  (1 << 1)\n#define SYS_ORST_FLASH                  (1 << 1)\n#define SYS_OCLK_USB                    (1 << 2)\n#define SYS_ORST_USB                    (1 << 2)\n#define SYS_OCLK_SDMMC                  (1 << 3)\n#define SYS_ORST_SDMMC                  (1 << 3)\n#define SYS_OCLK_WDT                    (1 << 4)\n#define SYS_ORST_WDT                    (1 << 4)\n#define SYS_OCLK_TIMER0                 (1 << 5)\n#define SYS_ORST_TIMER0                 (1 << 5)\n#define SYS_OCLK_TIMER1                 (1 << 6)\n#define SYS_ORST_TIMER1                 (1 << 6)\n#define SYS_OCLK_TIMER2                 (1 << 7)\n#define SYS_ORST_TIMER2                 (1 << 7)\n#define SYS_OCLK_I2C0                   (1 << 8)\n#define SYS_ORST_I2C0                   (1 << 8)\n#define SYS_OCLK_I2C1                   (1 << 9)\n#define SYS_ORST_I2C1                   (1 << 9)\n#define SYS_OCLK_SPI                    (1 << 10)\n#define SYS_ORST_SPI                    (1 << 10)\n#define SYS_OCLK_SLCD                   (1 << 11)\n#define SYS_ORST_SLCD                   (1 << 11)\n#define SYS_OCLK_SPI_ITN                (1 << 12)\n#define SYS_ORST_SPI_ITN                (1 << 12)\n#define SYS_OCLK_SPI_PHY                (1 << 13)\n#define SYS_ORST_SPI_PHY                (1 << 13)\n#define SYS_OCLK_UART0                  (1 << 14)\n#define SYS_ORST_UART0                  (1 << 14)\n#define SYS_OCLK_UART1                  (1 << 15)\n#define SYS_ORST_UART1                  (1 << 15)\n#define SYS_OCLK_UART2                  (1 << 16)\n#define SYS_ORST_UART2                  (1 << 16)\n#define SYS_OCLK_I2S0                   (1 << 17)\n#define SYS_ORST_I2S0                   (1 << 17)\n#define SYS_OCLK_SPDIF0                 (1 << 18)\n#define SYS_ORST_SPDIF0                 (1 << 18)\n#define SYS_OCLK_PCM                    (1 << 19)\n#define SYS_ORST_PCM                    (1 << 19)\n#define SYS_OCLK_USB32K                 (1 << 20)\n#define SYS_ORST_USB32K                 (1 << 20)\n#define SYS_OCLK_I2S1                   (1 << 21)\n#define SYS_ORST_I2S1                   (1 << 21)\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/best2300p/reg_codec_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_CODEC_H__\n#define __REG_CODEC_H__\n\n#include \"plat_types.h\"\n\nstruct CODEC_T {\n    __IO uint32_t REG_000;\n    __IO uint32_t REG_004;\n    __IO uint32_t REG_008;\n    __IO uint32_t REG_00C;\n    __IO uint32_t REG_010;\n    __IO uint32_t REG_014;\n    __IO uint32_t REG_018;\n    __IO uint32_t REG_01C;\n    __IO uint32_t REG_020;\n    __IO uint32_t REG_024;\n    __IO uint32_t REG_028;\n    __IO uint32_t REG_02C;\n    __IO uint32_t REG_030;\n    __IO uint32_t REG_034;\n    __IO uint32_t REG_038;\n    __IO uint32_t REG_03C;\n    __IO uint32_t REG_040;\n    __IO uint32_t REG_044;\n    __IO uint32_t REG_048;\n    __IO uint32_t REG_04C;\n    __IO uint32_t REG_050;\n    __IO uint32_t REG_054;\n    __IO uint32_t REG_058;\n    __IO uint32_t REG_05C;\n    __IO uint32_t REG_060;\n    __IO uint32_t REG_064;\n    __IO uint32_t REG_068;\n    __IO uint32_t REG_06C;\n    __IO uint32_t REG_070;\n    __IO uint32_t REG_074;\n    __IO uint32_t REG_078;\n    __IO uint32_t REG_07C;\n    __IO uint32_t REG_080;\n    __IO uint32_t REG_084;\n    __IO uint32_t REG_088;\n    __IO uint32_t REG_08C;\n    __IO uint32_t REG_090;\n    __IO uint32_t REG_094;\n    __IO uint32_t REG_098;\n    __IO uint32_t REG_09C;\n    __IO uint32_t REG_0A0;\n    __IO uint32_t REG_0A4;\n    __IO uint32_t REG_0A8;\n    __IO uint32_t REG_0AC;\n    __IO uint32_t REG_0B0;\n    __IO uint32_t REG_0B4;\n    __IO uint32_t REG_0B8;\n    __IO uint32_t REG_0BC;\n    __IO uint32_t REG_0C0;\n    __IO uint32_t REG_0C4;\n    __IO uint32_t REG_0C8;\n    __IO uint32_t REG_0CC;\n    __IO uint32_t REG_0D0;\n    __IO uint32_t REG_0D4;\n    __IO uint32_t REG_0D8;\n    __IO uint32_t REG_0DC;\n    __IO uint32_t REG_0E0;\n    __IO uint32_t REG_0E4;\n    __IO uint32_t REG_0E8;\n    __IO uint32_t REG_0EC;\n    __IO uint32_t REG_0F0;\n    __IO uint32_t REG_0F4;\n    __IO uint32_t REG_0F8;\n    __IO uint32_t REG_0FC;\n    __IO uint32_t REG_100;\n    __IO uint32_t REG_104;\n    __IO uint32_t REG_108;\n    __IO uint32_t REG_10C;\n    __IO uint32_t REG_110;\n    __IO uint32_t REG_114;\n    __IO uint32_t REG_118;\n    __IO uint32_t REG_11C;\n    __IO uint32_t REG_120;\n    __IO uint32_t REG_124;\n    __IO uint32_t REG_128;\n    __IO uint32_t REG_12C;\n    __IO uint32_t REG_130;\n    __IO uint32_t REG_134;\n    __IO uint32_t REG_138;\n    __IO uint32_t REG_13C;\n    __IO uint32_t REG_140;\n    __IO uint32_t REG_144;\n    __IO uint32_t REG_148;\n    __IO uint32_t REG_14C;\n    __IO uint32_t REG_150;\n    __IO uint32_t REG_154;\n    __IO uint32_t REG_158;\n    __IO uint32_t REG_15C;\n    __IO uint32_t REG_160;\n    __IO uint32_t REG_164;\n    __IO uint32_t REG_168;\n    __IO uint32_t REG_16C;\n    __IO uint32_t REG_170;\n    __IO uint32_t REG_174;\n    __IO uint32_t REG_178;\n    __IO uint32_t REG_17C;\n    __IO uint32_t REG_180;\n    __IO uint32_t REG_184;\n    __IO uint32_t REG_188;\n    __IO uint32_t REG_18C;\n    __IO uint32_t REG_190;\n    __IO uint32_t REG_194;\n    __IO uint32_t REG_198;\n    __IO uint32_t REG_19C;\n    __IO uint32_t REG_1A0;\n    __IO uint32_t REG_1A4;\n    __IO uint32_t REG_1A8;\n    __IO uint32_t REG_1AC;\n    __IO uint32_t REG_1B0;\n    __IO uint32_t REG_1B4;\n    __IO uint32_t REG_1B8;\n    __IO uint32_t REG_1BC;\n    __IO uint32_t REG_1C0;\n    __IO uint32_t REG_1C4;\n    __IO uint32_t REG_1C8;\n    __IO uint32_t REG_1CC;\n    __IO uint32_t REG_1D0;\n    __IO uint32_t REG_1D4;\n    __IO uint32_t REG_1D8;\n    __IO uint32_t REG_1DC;\n    __IO uint32_t REG_1E0;\n    __IO uint32_t REG_1E4;\n    __IO uint32_t REG_1E8;\n    __IO uint32_t REG_1EC;\n    __IO uint32_t REG_1F0;\n    __IO uint32_t REG_1F4;\n    __IO uint32_t REG_1F8;\n    __IO uint32_t REG_1FC;\n    __IO uint32_t REG_200;\n    __IO uint32_t REG_204;\n    __IO uint32_t REG_208;\n    __IO uint32_t REG_20C;\n    __IO uint32_t REG_210;\n    __IO uint32_t REG_214;\n    __IO uint32_t REG_218;\n    __IO uint32_t REG_21C;\n    __IO uint32_t REG_220;\n    __IO uint32_t REG_224;\n    __IO uint32_t REG_228;\n    __IO uint32_t REG_22C;\n    __IO uint32_t REG_230;\n};\n\n// reg_00\n#define CODEC_CODEC_IF_EN                       (1 << 0)\n#define CODEC_ADC_ENABLE                        (1 << 1)\n#define CODEC_ADC_ENABLE_CH0                    (1 << 2)\n#define CODEC_ADC_ENABLE_CH1                    (1 << 3)\n#define CODEC_ADC_ENABLE_CH2                    (1 << 4)\n#define CODEC_ADC_ENABLE_CH3                    (1 << 5)\n#define CODEC_ADC_ENABLE_CH4                    (1 << 6)\n#define CODEC_ADC_ENABLE_CH5                    (1 << 7)\n#define CODEC_ADC_ENABLE_CH6                    (1 << 8)\n#define CODEC_DAC_ENABLE                        (1 << 9)\n#define CODEC_DMACTRL_RX                        (1 << 10)\n#define CODEC_DMACTRL_TX                        (1 << 11)\n\n// reg_04\n#define CODEC_RX_FIFO_FLUSH_CH0                 (1 << 0)\n#define CODEC_RX_FIFO_FLUSH_CH1                 (1 << 1)\n#define CODEC_RX_FIFO_FLUSH_CH2                 (1 << 2)\n#define CODEC_RX_FIFO_FLUSH_CH3                 (1 << 3)\n#define CODEC_RX_FIFO_FLUSH_CH4                 (1 << 4)\n#define CODEC_RX_FIFO_FLUSH_CH5                 (1 << 5)\n#define CODEC_RX_FIFO_FLUSH_CH6                 (1 << 6)\n#define CODEC_TX_FIFO_FLUSH                     (1 << 7)\n#define CODEC_DSD_RX_FIFO_FLUSH                 (1 << 8)\n#define CODEC_DSD_TX_FIFO_FLUSH                 (1 << 9)\n#define CODEC_MC_FIFO_FLUSH                     (1 << 10)\n#define CODEC_IIR_RX_FIFO_FLUSH                 (1 << 11)\n#define CODEC_IIR_TX_FIFO_FLUSH                 (1 << 12)\n\n// reg_08\n#define CODEC_CODEC_RX_THRESHOLD(n)             (((n) & 0xF) << 0)\n#define CODEC_CODEC_RX_THRESHOLD_MASK           (0xF << 0)\n#define CODEC_CODEC_RX_THRESHOLD_SHIFT          (0)\n#define CODEC_CODEC_TX_THRESHOLD(n)             (((n) & 0xF) << 4)\n#define CODEC_CODEC_TX_THRESHOLD_MASK           (0xF << 4)\n#define CODEC_CODEC_TX_THRESHOLD_SHIFT          (4)\n#define CODEC_DSD_RX_THRESHOLD(n)               (((n) & 0xF) << 8)\n#define CODEC_DSD_RX_THRESHOLD_MASK             (0xF << 8)\n#define CODEC_DSD_RX_THRESHOLD_SHIFT            (8)\n#define CODEC_DSD_TX_THRESHOLD(n)               (((n) & 0x7) << 12)\n#define CODEC_DSD_TX_THRESHOLD_MASK             (0x7 << 12)\n#define CODEC_DSD_TX_THRESHOLD_SHIFT            (12)\n#define CODEC_MC_THRESHOLD(n)                   (((n) & 0xF) << 15)\n#define CODEC_MC_THRESHOLD_MASK                 (0xF << 15)\n#define CODEC_MC_THRESHOLD_SHIFT                (15)\n#define CODEC_IIR_RX_THRESHOLD(n)               (((n) & 0x3F) << 19)\n#define CODEC_IIR_RX_THRESHOLD_MASK             (0x3F << 19)\n#define CODEC_IIR_RX_THRESHOLD_SHIFT            (19)\n#define CODEC_IIR_TX_THRESHOLD(n)               (((n) & 0x3F) << 25)\n#define CODEC_IIR_TX_THRESHOLD_MASK             (0x3F << 25)\n#define CODEC_IIR_TX_THRESHOLD_SHIFT            (25)\n\n// reg_0c\n#define CODEC_CODEC_RX_OVERFLOW(n)              (((n) & 0x1F) << 0)\n#define CODEC_CODEC_RX_OVERFLOW_MASK            (0x1F << 0)\n#define CODEC_CODEC_RX_OVERFLOW_SHIFT           (0)\n#define CODEC_CODEC_RX_UNDERFLOW(n)             (((n) & 0x1F) << 5)\n#define CODEC_CODEC_RX_UNDERFLOW_MASK           (0x1F << 5)\n#define CODEC_CODEC_RX_UNDERFLOW_SHIFT          (5)\n#define CODEC_CODEC_TX_OVERFLOW                 (1 << 10)\n#define CODEC_CODEC_TX_UNDERFLOW                (1 << 11)\n#define CODEC_DSD_RX_OVERFLOW                   (1 << 12)\n#define CODEC_DSD_RX_UNDERFLOW                  (1 << 13)\n#define CODEC_DSD_TX_OVERFLOW                   (1 << 14)\n#define CODEC_DSD_TX_UNDERFLOW                  (1 << 15)\n#define CODEC_MC_OVERFLOW                       (1 << 16)\n#define CODEC_MC_UNDERFLOW                      (1 << 17)\n#define CODEC_IIR_RX_OVERFLOW                   (1 << 18)\n#define CODEC_IIR_RX_UNDERFLOW                  (1 << 19)\n#define CODEC_IIR_TX_OVERFLOW                   (1 << 20)\n#define CODEC_IIR_TX_UNDERFLOW                  (1 << 21)\n#define CODEC_EVENT_TRIGGER                     (1 << 22)\n#define CODEC_FB_CHECK_ERROR_TRIG_CH0           (1 << 23)\n#define CODEC_FB_CHECK_ERROR_TRIG_CH1           (1 << 24)\n#define CODEC_VAD_FIND                          (1 << 25)\n#define CODEC_VAD_NOT_FIND                      (1 << 26)\n#define CODEC_BT_TRIGGER                        (1 << 27)\n#define CODEC_ADC_MAX_OVERFLOW                  (1 << 28)\n#define CODEC_TIME_TRIGGER_STATUS               (1 << 29)\n\n// reg_10\n#define CODEC_CODEC_RX_OVERFLOW_MSK(n)          (((n) & 0x1F) << 0)\n#define CODEC_CODEC_RX_OVERFLOW_MSK_MASK        (0x1F << 0)\n#define CODEC_CODEC_RX_OVERFLOW_MSK_SHIFT       (0)\n#define CODEC_CODEC_RX_UNDERFLOW_MSK(n)         (((n) & 0x1F) << 5)\n#define CODEC_CODEC_RX_UNDERFLOW_MSK_MASK       (0x1F << 5)\n#define CODEC_CODEC_RX_UNDERFLOW_MSK_SHIFT      (5)\n#define CODEC_CODEC_TX_OVERFLOW_MSK             (1 << 10)\n#define CODEC_CODEC_TX_UNDERFLOW_MSK            (1 << 11)\n#define CODEC_DSD_RX_OVERFLOW_MSK               (1 << 12)\n#define CODEC_DSD_RX_UNDERFLOW_MSK              (1 << 13)\n#define CODEC_DSD_TX_OVERFLOW_MSK               (1 << 14)\n#define CODEC_DSD_TX_UNDERFLOW_MSK              (1 << 15)\n#define CODEC_MC_OVERFLOW_MSK                   (1 << 16)\n#define CODEC_MC_UNDERFLOW_MSK                  (1 << 17)\n#define CODEC_IIR_RX_OVERFLOW_MSK               (1 << 18)\n#define CODEC_IIR_RX_UNDERFLOW_MSK              (1 << 19)\n#define CODEC_IIR_TX_OVERFLOW_MSK               (1 << 20)\n#define CODEC_IIR_TX_UNDERFLOW_MSK              (1 << 21)\n#define CODEC_EVENT_TRIGGER_MSK                 (1 << 22)\n#define CODEC_FB_CHECK_ERROR_TRIG_CH0_MSK       (1 << 23)\n#define CODEC_FB_CHECK_ERROR_TRIG_CH1_MSK       (1 << 24)\n#define CODEC_VAD_FIND_MSK                      (1 << 25)\n#define CODEC_VAD_NOT_FIND_MSK                  (1 << 26)\n#define CODEC_BT_TRIGGER_MSK                    (1 << 27)\n#define CODEC_ADC_MAX_OVERFLOW_MSK              (1 << 28)\n#define CODEC_TIME_TRIGGER_MSK                  (1 << 29)\n\n// reg_14\n#define CODEC_FIFO_COUNT_CH0(n)                 (((n) & 0xF) << 0)\n#define CODEC_FIFO_COUNT_CH0_MASK               (0xF << 0)\n#define CODEC_FIFO_COUNT_CH0_SHIFT              (0)\n#define CODEC_FIFO_COUNT_CH1(n)                 (((n) & 0xF) << 4)\n#define CODEC_FIFO_COUNT_CH1_MASK               (0xF << 4)\n#define CODEC_FIFO_COUNT_CH1_SHIFT              (4)\n#define CODEC_FIFO_COUNT_CH2(n)                 (((n) & 0xF) << 8)\n#define CODEC_FIFO_COUNT_CH2_MASK               (0xF << 8)\n#define CODEC_FIFO_COUNT_CH2_SHIFT              (8)\n#define CODEC_FIFO_COUNT_CH3(n)                 (((n) & 0xF) << 12)\n#define CODEC_FIFO_COUNT_CH3_MASK               (0xF << 12)\n#define CODEC_FIFO_COUNT_CH3_SHIFT              (12)\n#define CODEC_FIFO_COUNT_CH4(n)                 (((n) & 0xF) << 16)\n#define CODEC_FIFO_COUNT_CH4_MASK               (0xF << 16)\n#define CODEC_FIFO_COUNT_CH4_SHIFT              (16)\n#define CODEC_FIFO_COUNT_RX_DSD(n)              (((n) & 0xF) << 20)\n#define CODEC_FIFO_COUNT_RX_DSD_MASK            (0xF << 20)\n#define CODEC_FIFO_COUNT_RX_DSD_SHIFT           (20)\n#define CODEC_FIFO_COUNT_RX_IIR(n)              (((n) & 0x3F) << 24)\n#define CODEC_FIFO_COUNT_RX_IIR_MASK            (0x3F << 24)\n#define CODEC_FIFO_COUNT_RX_IIR_SHIFT           (24)\n\n// reg_18\n#define CODEC_FIFO_COUNT_TX(n)                  (((n) & 0xF) << 0)\n#define CODEC_FIFO_COUNT_TX_MASK                (0xF << 0)\n#define CODEC_FIFO_COUNT_TX_SHIFT               (0)\n#define CODEC_STATE_RX_CH(n)                    (((n) & 0x3F) << 4)\n#define CODEC_STATE_RX_CH_MASK                  (0x3F << 4)\n#define CODEC_STATE_RX_CH_SHIFT                 (4)\n#define CODEC_FIFO_COUNT_TX_DSD(n)              (((n) & 0x7) << 10)\n#define CODEC_FIFO_COUNT_TX_DSD_MASK            (0x7 << 10)\n#define CODEC_FIFO_COUNT_TX_DSD_SHIFT           (10)\n#define CODEC_MC_FIFO_COUNT(n)                  (((n) & 0xF) << 13)\n#define CODEC_MC_FIFO_COUNT_MASK                (0xF << 13)\n#define CODEC_MC_FIFO_COUNT_SHIFT               (13)\n#define CODEC_FIFO_COUNT_TX_IIR(n)              (((n) & 0x3F) << 17)\n#define CODEC_FIFO_COUNT_TX_IIR_MASK            (0x3F << 17)\n#define CODEC_FIFO_COUNT_TX_IIR_SHIFT           (17)\n#define CODEC_FIFO_COUNT_CH5(n)                 (((n) & 0xF) << 23)\n#define CODEC_FIFO_COUNT_CH5_MASK               (0xF << 23)\n#define CODEC_FIFO_COUNT_CH5_SHIFT              (23)\n#define CODEC_FIFO_COUNT_CH6(n)                 (((n) & 0xF) << 27)\n#define CODEC_FIFO_COUNT_CH6_MASK               (0xF << 27)\n#define CODEC_FIFO_COUNT_CH6_SHIFT              (27)\n\n// reg_1c\n#define CODEC_RX_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_SHIFT                (0)\n\n// reg_20\n#define CODEC_RX_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_SHIFT                (0)\n\n// reg_24\n#define CODEC_RX_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_SHIFT                (0)\n\n// reg_28\n#define CODEC_RX_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_SHIFT                (0)\n\n// reg_2c\n#define CODEC_RX_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_SHIFT                (0)\n\n// reg_30\n#define CODEC_RX_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_SHIFT                (0)\n\n// reg_34\n#define CODEC_RX_FIFO_DATA_DSD(n)               (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_DSD_MASK             (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_DSD_SHIFT            (0)\n\n// reg_38\n#define CODEC_MC_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_MC_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_MC_FIFO_DATA_SHIFT                (0)\n\n// reg_3c\n#define CODEC_RX_FIFO_DATA_IIR(n)               (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_IIR_MASK             (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_IIR_SHIFT            (0)\n\n// reg_40\n#define CODEC_MODE_16BIT_ADC_CH0                (1 << 0)\n#define CODEC_MODE_16BIT_ADC_CH1                (1 << 1)\n#define CODEC_MODE_16BIT_ADC_CH2                (1 << 2)\n#define CODEC_MODE_16BIT_ADC_CH3                (1 << 3)\n#define CODEC_MODE_16BIT_ADC_CH4                (1 << 4)\n#define CODEC_MODE_16BIT_ADC_CH5                (1 << 5)\n#define CODEC_MODE_16BIT_ADC_CH6                (1 << 6)\n#define CODEC_MODE_24BIT_ADC                    (1 << 7)\n#define CODEC_MODE_32BIT_ADC                    (1 << 8)\n\n// reg_44\n#define CODEC_DUAL_CHANNEL_DAC                  (1 << 0)\n#define CODEC_DAC_EXCHANGE_L_R                  (1 << 1)\n#define CODEC_MODE_16BIT_DAC                    (1 << 2)\n#define CODEC_MODE_32BIT_DAC                    (1 << 3)\n\n// reg_48\n#define CODEC_DSD_IF_EN                         (1 << 0)\n#define CODEC_DSD_ENABLE                        (1 << 1)\n#define CODEC_DSD_DUAL_CHANNEL                  (1 << 2)\n#define CODEC_DSD_MSB_FIRST                     (1 << 3)\n#define CODEC_MODE_24BIT_DSD                    (1 << 4)\n#define CODEC_MODE_32BIT_DSD                    (1 << 5)\n#define CODEC_DMA_CTRL_RX_DSD                   (1 << 6)\n#define CODEC_DMA_CTRL_TX_DSD                   (1 << 7)\n#define CODEC_MODE_16BIT_DSD                    (1 << 8)\n#define CODEC_DSD_IN_16BIT                      (1 << 9)\n\n// reg_4c\n#define CODEC_MC_ENABLE                         (1 << 0)\n#define CODEC_DUAL_CHANNEL_MC                   (1 << 1)\n#define CODEC_MODE_16BIT_MC                     (1 << 2)\n#define CODEC_DMA_CTRL_MC                       (1 << 3)\n#define CODEC_MC_DELAY(n)                       (((n) & 0xFF) << 4)\n#define CODEC_MC_DELAY_MASK                     (0xFF << 4)\n#define CODEC_MC_DELAY_SHIFT                    (4)\n#define CODEC_MC_RATE_SEL                       (1 << 12)\n#define CODEC_MODE_32BIT_MC                     (1 << 13)\n\n// reg_50\n#define CODEC_CODEC_COUNT_KEEP(n)               (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_CODEC_COUNT_KEEP_MASK             (0xFFFFFFFF << 0)\n#define CODEC_CODEC_COUNT_KEEP_SHIFT            (0)\n\n// reg_54\n#define CODEC_DAC_ENABLE_SEL(n)                 (((n) & 0x3) << 0)\n#define CODEC_DAC_ENABLE_SEL_MASK               (0x3 << 0)\n#define CODEC_DAC_ENABLE_SEL_SHIFT              (0)\n#define CODEC_ADC_ENABLE_SEL(n)                 (((n) & 0x3) << 2)\n#define CODEC_ADC_ENABLE_SEL_MASK               (0x3 << 2)\n#define CODEC_ADC_ENABLE_SEL_SHIFT              (2)\n#define CODEC_CODEC_DAC_ENABLE_SEL(n)           (((n) & 0x3) << 4)\n#define CODEC_CODEC_DAC_ENABLE_SEL_MASK         (0x3 << 4)\n#define CODEC_CODEC_DAC_ENABLE_SEL_SHIFT        (4)\n#define CODEC_CODEC_ADC_ENABLE_SEL(n)           (((n) & 0x3) << 6)\n#define CODEC_CODEC_ADC_ENABLE_SEL_MASK         (0x3 << 6)\n#define CODEC_CODEC_ADC_ENABLE_SEL_SHIFT        (6)\n#define CODEC_GPIO_TRIGGER_DB_ENABLE            (1 << 8)\n#define CODEC_STAMP_CLR_USED                    (1 << 9)\n#define CODEC_EVENT_SEL                         (1 << 10)\n#define CODEC_EVENT_FOR_CAPTURE                 (1 << 11)\n#define CODEC_TEST_PORT_SEL(n)                  (((n) & 0x7) << 12)\n#define CODEC_TEST_PORT_SEL_MASK                (0x7 << 12)\n#define CODEC_TEST_PORT_SEL_SHIFT               (12)\n#define CODEC_PLL_OSC_TRIGGER_SEL(n)            (((n) & 0x3) << 15)\n#define CODEC_PLL_OSC_TRIGGER_SEL_MASK          (0x3 << 15)\n#define CODEC_PLL_OSC_TRIGGER_SEL_SHIFT         (15)\n#define CODEC_FAULT_MUTE_DAC_ENABLE             (1 << 17)\n\n// reg_58\n#define CODEC_RX_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_SHIFT                (0)\n\n// reg_5c\n#define CODEC_RX_FIFO_DATA(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RX_FIFO_DATA_MASK                 (0xFFFFFFFF << 0)\n#define CODEC_RX_FIFO_DATA_SHIFT                (0)\n\n// reg_60\n#define CODEC_EN_CLK_ADC_ANA(n)                 (((n) & 0x1F) << 0)\n#define CODEC_EN_CLK_ADC_ANA_MASK               (0x1F << 0)\n#define CODEC_EN_CLK_ADC_ANA_SHIFT              (0)\n#define CODEC_EN_CLK_ADC(n)                     (((n) & 0x3F) << 5)\n#define CODEC_EN_CLK_ADC_MASK                   (0x3F << 5)\n#define CODEC_EN_CLK_ADC_SHIFT                  (5)\n#define CODEC_EN_CLK_DAC                        (1 << 11)\n#define CODEC_POL_ADC_ANA(n)                    (((n) & 0x1F) << 12)\n#define CODEC_POL_ADC_ANA_MASK                  (0x1F << 12)\n#define CODEC_POL_ADC_ANA_SHIFT                 (12)\n#define CODEC_POL_DAC_OUT                       (1 << 17)\n#define CODEC_CFG_CLK_OUT(n)                    (((n) & 0x7) << 18)\n#define CODEC_CFG_CLK_OUT_MASK                  (0x7 << 18)\n#define CODEC_CFG_CLK_OUT_SHIFT                 (18)\n\n// reg_64\n#define CODEC_SOFT_RSTN_ADC_ANA(n)              (((n) & 0x1F) << 0)\n#define CODEC_SOFT_RSTN_ADC_ANA_MASK            (0x1F << 0)\n#define CODEC_SOFT_RSTN_ADC_ANA_SHIFT           (0)\n#define CODEC_SOFT_RSTN_ADC(n)                  (((n) & 0x3F) << 5)\n#define CODEC_SOFT_RSTN_ADC_MASK                (0x3F << 5)\n#define CODEC_SOFT_RSTN_ADC_SHIFT               (5)\n#define CODEC_SOFT_RSTN_DAC                     (1 << 11)\n#define CODEC_SOFT_RSTN_RS                      (1 << 12)\n#define CODEC_SOFT_RSTN_IIR                     (1 << 13)\n#define CODEC_SOFT_RSTN_32K                     (1 << 14)\n\n// reg_68\n#define CODEC_RET1N_RF                          (1 << 0)\n#define CODEC_RET2N_RF                          (1 << 1)\n#define CODEC_PGEN_RF                           (1 << 2)\n#define CODEC_EMA_RF(n)                         (((n) & 0x7) << 3)\n#define CODEC_EMA_RF_MASK                       (0x7 << 3)\n#define CODEC_EMA_RF_SHIFT                      (3)\n#define CODEC_EMAW_RF(n)                        (((n) & 0x3) << 6)\n#define CODEC_EMAW_RF_MASK                      (0x3 << 6)\n#define CODEC_EMAW_RF_SHIFT                     (6)\n#define CODEC_EMAS_RF                           (1 << 8)\n#define CODEC_WABL_RF                           (1 << 9)\n#define CODEC_WABLM_RF(n)                       (((n) & 0x3) << 10)\n#define CODEC_WABLM_RF_MASK                     (0x3 << 10)\n#define CODEC_WABLM_RF_SHIFT                    (10)\n#define CODEC_RET1N_SRAM                        (1 << 12)\n#define CODEC_RET2N_SRAM                        (1 << 13)\n#define CODEC_PGEN_SRAM                         (1 << 14)\n#define CODEC_EMA_SRAM(n)                       (((n) & 0x7) << 15)\n#define CODEC_EMA_SRAM_MASK                     (0x7 << 15)\n#define CODEC_EMA_SRAM_SHIFT                    (15)\n#define CODEC_EMAW_SRAM(n)                      (((n) & 0x3) << 18)\n#define CODEC_EMAW_SRAM_MASK                    (0x3 << 18)\n#define CODEC_EMAW_SRAM_SHIFT                   (18)\n#define CODEC_EMAS_SRAM                         (1 << 20)\n#define CODEC_WABL_SRAM                         (1 << 21)\n#define CODEC_WABLM_SRAM(n)                     (((n) & 0x3) << 22)\n#define CODEC_WABLM_SRAM_MASK                   (0x3 << 22)\n#define CODEC_WABLM_SRAM_SHIFT                  (22)\n#define CODEC_EMA_ROM(n)                        (((n) & 0x7) << 24)\n#define CODEC_EMA_ROM_MASK                      (0x7 << 24)\n#define CODEC_EMA_ROM_SHIFT                     (24)\n#define CODEC_KEN_ROM                           (1 << 27)\n#define CODEC_PGEN_ROM_0                        (1 << 28)\n#define CODEC_PGEN_ROM_1                        (1 << 29)\n\n// reg_6c\n#define CODEC_CODEC_RX5_6_OVERFLOW(n)           (((n) & 0x3) << 0)\n#define CODEC_CODEC_RX5_6_OVERFLOW_MASK         (0x3 << 0)\n#define CODEC_CODEC_RX5_6_OVERFLOW_SHIFT        (0)\n#define CODEC_CODEC_RX5_6_UNDERFLOW(n)          (((n) & 0x3) << 2)\n#define CODEC_CODEC_RX5_6_UNDERFLOW_MASK        (0x3 << 2)\n#define CODEC_CODEC_RX5_6_UNDERFLOW_SHIFT       (2)\n\n// reg_70\n#define CODEC_CODEC_RX5_6_OVERFLOW_MSK(n)       (((n) & 0x3) << 0)\n#define CODEC_CODEC_RX5_6_OVERFLOW_MSK_MASK     (0x3 << 0)\n#define CODEC_CODEC_RX5_6_OVERFLOW_MSK_SHIFT    (0)\n#define CODEC_CODEC_RX5_6_UNDERFLOW_MSK(n)      (((n) & 0x3) << 2)\n#define CODEC_CODEC_RX5_6_UNDERFLOW_MSK_MASK    (0x3 << 2)\n#define CODEC_CODEC_RX5_6_UNDERFLOW_MSK_SHIFT   (2)\n\n// reg_78\n#define CODEC_CODEC_SIDE_TONE_CH_SEL            (1 << 0)\n#define CODEC_CODEC_ADC_IIR_CH0_SEL(n)          (((n) & 0x7) << 1)\n#define CODEC_CODEC_ADC_IIR_CH0_SEL_MASK        (0x7 << 1)\n#define CODEC_CODEC_ADC_IIR_CH0_SEL_SHIFT       (1)\n#define CODEC_CODEC_ADC_IIR_CH1_SEL(n)          (((n) & 0x7) << 4)\n#define CODEC_CODEC_ADC_IIR_CH1_SEL_MASK        (0x7 << 4)\n#define CODEC_CODEC_ADC_IIR_CH1_SEL_SHIFT       (4)\n#define CODEC_CODEC_DAC_HBF4_DELAY_SEL          (1 << 7)\n#define CODEC_TRIG_TIME(n)                      (((n) & 0x3FFFFF) << 8)\n#define CODEC_TRIG_TIME_MASK                    (0x3FFFFF << 8)\n#define CODEC_TRIG_TIME_SHIFT                   (8)\n#define CODEC_TRIG_TIME_ENABLE                  (1 << 30)\n#define CODEC_GET_CNT_TRIG                      (1 << 31)\n\n// reg_7c\n#define CODEC_RESERVED_REG1(n)                  (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_RESERVED_REG1_MASK                (0xFFFFFFFF << 0)\n#define CODEC_RESERVED_REG1_SHIFT               (0)\n\n// reg_80\n#define CODEC_CODEC_ADC_EN                      (1 << 0)\n#define CODEC_CODEC_ADC_EN_CH0                  (1 << 1)\n#define CODEC_CODEC_ADC_EN_CH1                  (1 << 2)\n#define CODEC_CODEC_ADC_EN_CH2                  (1 << 3)\n#define CODEC_CODEC_ADC_EN_CH3                  (1 << 4)\n#define CODEC_CODEC_ADC_EN_CH4                  (1 << 5)\n#define CODEC_CODEC_SIDE_TONE_GAIN(n)           (((n) & 0x1F) << 6)\n#define CODEC_CODEC_SIDE_TONE_GAIN_MASK         (0x1F << 6)\n#define CODEC_CODEC_SIDE_TONE_GAIN_SHIFT        (6)\n#define CODEC_CODEC_SIDE_TONE_MIC_SEL           (1 << 11)\n#define CODEC_CODEC_ADC_LOOP                    (1 << 12)\n#define CODEC_CODEC_LOOP_SEL_L(n)               (((n) & 0x7) << 13)\n#define CODEC_CODEC_LOOP_SEL_L_MASK             (0x7 << 13)\n#define CODEC_CODEC_LOOP_SEL_L_SHIFT            (13)\n#define CODEC_CODEC_LOOP_SEL_R(n)               (((n) & 0x7) << 16)\n#define CODEC_CODEC_LOOP_SEL_R_MASK             (0x7 << 16)\n#define CODEC_CODEC_LOOP_SEL_R_SHIFT            (16)\n#define CODEC_CODEC_TEST_PORT_SEL(n)            (((n) & 0x1F) << 19)\n#define CODEC_CODEC_TEST_PORT_SEL_MASK          (0x1F << 19)\n#define CODEC_CODEC_TEST_PORT_SEL_SHIFT         (19)\n\n// reg_84\n#define CODEC_CODEC_ADC_SIGNED_CH0              (1 << 0)\n#define CODEC_CODEC_ADC_IN_SEL_CH0(n)           (((n) & 0x7) << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH0_MASK         (0x7 << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH0_SHIFT        (1)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH0(n)         (((n) & 0x3) << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH0_MASK       (0x3 << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH0_SHIFT      (4)\n#define CODEC_CODEC_ADC_HBF3_BYPASS_CH0         (1 << 6)\n#define CODEC_CODEC_ADC_HBF2_BYPASS_CH0         (1 << 7)\n#define CODEC_CODEC_ADC_HBF1_BYPASS_CH0         (1 << 8)\n#define CODEC_CODEC_ADC_GAIN_SEL_CH0            (1 << 9)\n#define CODEC_CODEC_ADC_GAIN_CH0(n)             (((n) & 0xFFFFF) << 10)\n#define CODEC_CODEC_ADC_GAIN_CH0_MASK           (0xFFFFF << 10)\n#define CODEC_CODEC_ADC_GAIN_CH0_SHIFT          (10)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH0(n)         (((n) & 0x3) << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH0_MASK       (0x3 << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH0_SHIFT      (30)\n\n// reg_88\n#define CODEC_CODEC_ADC_SIGNED_CH1              (1 << 0)\n#define CODEC_CODEC_ADC_IN_SEL_CH1(n)           (((n) & 0x7) << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH1_MASK         (0x7 << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH1_SHIFT        (1)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH1(n)         (((n) & 0x3) << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH1_MASK       (0x3 << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH1_SHIFT      (4)\n#define CODEC_CODEC_ADC_HBF3_BYPASS_CH1         (1 << 6)\n#define CODEC_CODEC_ADC_HBF2_BYPASS_CH1         (1 << 7)\n#define CODEC_CODEC_ADC_HBF1_BYPASS_CH1         (1 << 8)\n#define CODEC_CODEC_ADC_GAIN_SEL_CH1            (1 << 9)\n#define CODEC_CODEC_ADC_GAIN_CH1(n)             (((n) & 0xFFFFF) << 10)\n#define CODEC_CODEC_ADC_GAIN_CH1_MASK           (0xFFFFF << 10)\n#define CODEC_CODEC_ADC_GAIN_CH1_SHIFT          (10)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH1(n)         (((n) & 0x3) << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH1_MASK       (0x3 << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH1_SHIFT      (30)\n\n// reg_8c\n#define CODEC_CODEC_ADC_SIGNED_CH2              (1 << 0)\n#define CODEC_CODEC_ADC_IN_SEL_CH2(n)           (((n) & 0x7) << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH2_MASK         (0x7 << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH2_SHIFT        (1)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH2(n)         (((n) & 0x3) << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH2_MASK       (0x3 << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH2_SHIFT      (4)\n#define CODEC_CODEC_ADC_HBF3_BYPASS_CH2         (1 << 6)\n#define CODEC_CODEC_ADC_HBF2_BYPASS_CH2         (1 << 7)\n#define CODEC_CODEC_ADC_HBF1_BYPASS_CH2         (1 << 8)\n#define CODEC_CODEC_ADC_GAIN_SEL_CH2            (1 << 9)\n#define CODEC_CODEC_ADC_GAIN_CH2(n)             (((n) & 0xFFFFF) << 10)\n#define CODEC_CODEC_ADC_GAIN_CH2_MASK           (0xFFFFF << 10)\n#define CODEC_CODEC_ADC_GAIN_CH2_SHIFT          (10)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH2(n)         (((n) & 0x3) << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH2_MASK       (0x3 << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH2_SHIFT      (30)\n\n// reg_90\n#define CODEC_CODEC_ADC_SIGNED_CH3              (1 << 0)\n#define CODEC_CODEC_ADC_IN_SEL_CH3(n)           (((n) & 0x7) << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH3_MASK         (0x7 << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH3_SHIFT        (1)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH3(n)         (((n) & 0x3) << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH3_MASK       (0x3 << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH3_SHIFT      (4)\n#define CODEC_CODEC_ADC_HBF3_BYPASS_CH3         (1 << 6)\n#define CODEC_CODEC_ADC_HBF2_BYPASS_CH3         (1 << 7)\n#define CODEC_CODEC_ADC_HBF1_BYPASS_CH3         (1 << 8)\n#define CODEC_CODEC_ADC_GAIN_SEL_CH3            (1 << 9)\n#define CODEC_CODEC_ADC_GAIN_CH3(n)             (((n) & 0xFFFFF) << 10)\n#define CODEC_CODEC_ADC_GAIN_CH3_MASK           (0xFFFFF << 10)\n#define CODEC_CODEC_ADC_GAIN_CH3_SHIFT          (10)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH3(n)         (((n) & 0x3) << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH3_MASK       (0x3 << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH3_SHIFT      (30)\n\n// reg_94\n#define CODEC_CODEC_ADC_SIGNED_CH4              (1 << 0)\n#define CODEC_CODEC_ADC_IN_SEL_CH4(n)           (((n) & 0x7) << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH4_MASK         (0x7 << 1)\n#define CODEC_CODEC_ADC_IN_SEL_CH4_SHIFT        (1)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH4(n)         (((n) & 0x3) << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH4_MASK       (0x3 << 4)\n#define CODEC_CODEC_ADC_DOWN_SEL_CH4_SHIFT      (4)\n#define CODEC_CODEC_ADC_HBF3_BYPASS_CH4         (1 << 6)\n#define CODEC_CODEC_ADC_HBF2_BYPASS_CH4         (1 << 7)\n#define CODEC_CODEC_ADC_HBF1_BYPASS_CH4         (1 << 8)\n#define CODEC_CODEC_ADC_GAIN_SEL_CH4            (1 << 9)\n#define CODEC_CODEC_ADC_GAIN_CH4(n)             (((n) & 0xFFFFF) << 10)\n#define CODEC_CODEC_ADC_GAIN_CH4_MASK           (0xFFFFF << 10)\n#define CODEC_CODEC_ADC_GAIN_CH4_SHIFT          (10)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH4(n)         (((n) & 0x3) << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH4_MASK       (0x3 << 30)\n#define CODEC_CODEC_ADC_HBF3_SEL_CH4_SHIFT      (30)\n\n// reg_98\n#define CODEC_CODEC_DAC_EN                      (1 << 0)\n#define CODEC_CODEC_DAC_EN_CH0                  (1 << 1)\n#define CODEC_CODEC_DAC_EN_CH1                  (1 << 2)\n#define CODEC_CODEC_DAC_DITHER_GAIN(n)          (((n) & 0x1F) << 3)\n#define CODEC_CODEC_DAC_DITHER_GAIN_MASK        (0x1F << 3)\n#define CODEC_CODEC_DAC_DITHER_GAIN_SHIFT       (3)\n#define CODEC_CODEC_DAC_SDM_GAIN(n)             (((n) & 0x3) << 8)\n#define CODEC_CODEC_DAC_SDM_GAIN_MASK           (0x3 << 8)\n#define CODEC_CODEC_DAC_SDM_GAIN_SHIFT          (8)\n#define CODEC_CODEC_DITHER_BYPASS               (1 << 10)\n#define CODEC_CODEC_DAC_HBF3_BYPASS             (1 << 11)\n#define CODEC_CODEC_DAC_HBF2_BYPASS             (1 << 12)\n#define CODEC_CODEC_DAC_HBF1_BYPASS             (1 << 13)\n#define CODEC_CODEC_DAC_UP_SEL(n)               (((n) & 0x7) << 14)\n#define CODEC_CODEC_DAC_UP_SEL_MASK             (0x7 << 14)\n#define CODEC_CODEC_DAC_UP_SEL_SHIFT            (14)\n#define CODEC_CODEC_DAC_TONE_TEST               (1 << 17)\n#define CODEC_CODEC_DAC_SIN1K_STEP(n)           (((n) & 0xF) << 18)\n#define CODEC_CODEC_DAC_SIN1K_STEP_MASK         (0xF << 18)\n#define CODEC_CODEC_DAC_SIN1K_STEP_SHIFT        (18)\n#define CODEC_CODEC_DAC_OSR_SEL(n)              (((n) & 0x3) << 22)\n#define CODEC_CODEC_DAC_OSR_SEL_MASK            (0x3 << 22)\n#define CODEC_CODEC_DAC_OSR_SEL_SHIFT           (22)\n#define CODEC_CODEC_DAC_LR_SWAP                 (1 << 24)\n#define CODEC_CODEC_DAC_SDM_H4_6M_CH0           (1 << 25)\n#define CODEC_CODEC_DAC_SDM_H4_6M_CH1           (1 << 26)\n#define CODEC_CODEC_DAC_L_FIR_UPSAMPLE          (1 << 27)\n#define CODEC_CODEC_DAC_R_FIR_UPSAMPLE          (1 << 28)\n#define CODEC_CODEC_DAC_SDM_CLOSE               (1 << 29)\n#define CODEC_CODEC_DAC_USE_HBF4                (1 << 30)\n#define CODEC_CODEC_DAC_USE_HBF5                (1 << 31)\n\n// reg_9c\n#define CODEC_CODEC_DAC_GAIN_CH0(n)             (((n) & 0xFFFFF) << 0)\n#define CODEC_CODEC_DAC_GAIN_CH0_MASK           (0xFFFFF << 0)\n#define CODEC_CODEC_DAC_GAIN_CH0_SHIFT          (0)\n#define CODEC_CODEC_DAC_GAIN_SEL_CH0            (1 << 20)\n#define CODEC_CODEC_DAC_GAIN_UPDATE             (1 << 21)\n#define CODEC_CODEC_ADC_GAIN_UPDATE_CH0         (1 << 22)\n#define CODEC_CODEC_ADC_GAIN_UPDATE_CH1         (1 << 23)\n#define CODEC_CODEC_ADC_GAIN_UPDATE_CH2         (1 << 24)\n#define CODEC_CODEC_ADC_GAIN_UPDATE_CH3         (1 << 25)\n#define CODEC_CODEC_ADC_GAIN_UPDATE_CH4         (1 << 26)\n#define CODEC_CODEC_DAC_GAIN_TRIGGER_SEL(n)     (((n) & 0x3) << 27)\n#define CODEC_CODEC_DAC_GAIN_TRIGGER_SEL_MASK   (0x3 << 27)\n#define CODEC_CODEC_DAC_GAIN_TRIGGER_SEL_SHIFT  (27)\n\n// reg_a0\n#define CODEC_CODEC_DAC_GAIN_CH1(n)             (((n) & 0xFFFFF) << 0)\n#define CODEC_CODEC_DAC_GAIN_CH1_MASK           (0xFFFFF << 0)\n#define CODEC_CODEC_DAC_GAIN_CH1_SHIFT          (0)\n#define CODEC_CODEC_DAC_GAIN_SEL_CH1            (1 << 20)\n#define CODEC_CODEC_DAC_OUT_SWAP                (1 << 21)\n#define CODEC_CODEC_DAC_H4_DELAY_CH0(n)         (((n) & 0x3) << 22)\n#define CODEC_CODEC_DAC_H4_DELAY_CH0_MASK       (0x3 << 22)\n#define CODEC_CODEC_DAC_H4_DELAY_CH0_SHIFT      (22)\n#define CODEC_CODEC_DAC_L4_DELAY_CH0(n)         (((n) & 0x3) << 24)\n#define CODEC_CODEC_DAC_L4_DELAY_CH0_MASK       (0x3 << 24)\n#define CODEC_CODEC_DAC_L4_DELAY_CH0_SHIFT      (24)\n#define CODEC_CODEC_DAC_H4_DELAY_CH1(n)         (((n) & 0x3) << 26)\n#define CODEC_CODEC_DAC_H4_DELAY_CH1_MASK       (0x3 << 26)\n#define CODEC_CODEC_DAC_H4_DELAY_CH1_SHIFT      (26)\n#define CODEC_CODEC_DAC_L4_DELAY_CH1(n)         (((n) & 0x3) << 28)\n#define CODEC_CODEC_DAC_L4_DELAY_CH1_MASK       (0x3 << 28)\n#define CODEC_CODEC_DAC_L4_DELAY_CH1_SHIFT      (28)\n\n// reg_a4\n#define CODEC_CODEC_PDM_ENABLE                  (1 << 0)\n#define CODEC_CODEC_PDM_DATA_INV                (1 << 1)\n#define CODEC_CODEC_PDM_ADC_SEL_CH0             (1 << 2)\n#define CODEC_CODEC_PDM_ADC_SEL_CH1             (1 << 3)\n#define CODEC_CODEC_PDM_ADC_SEL_CH2             (1 << 4)\n#define CODEC_CODEC_PDM_ADC_SEL_CH3             (1 << 5)\n#define CODEC_CODEC_PDM_ADC_SEL_CH4             (1 << 6)\n\n// reg_a8\n#define CODEC_CODEC_PDM_MUX_CH0(n)              (((n) & 0x7) << 0)\n#define CODEC_CODEC_PDM_MUX_CH0_MASK            (0x7 << 0)\n#define CODEC_CODEC_PDM_MUX_CH0_SHIFT           (0)\n#define CODEC_CODEC_PDM_MUX_CH1(n)              (((n) & 0x7) << 3)\n#define CODEC_CODEC_PDM_MUX_CH1_MASK            (0x7 << 3)\n#define CODEC_CODEC_PDM_MUX_CH1_SHIFT           (3)\n#define CODEC_CODEC_PDM_MUX_CH2(n)              (((n) & 0x7) << 6)\n#define CODEC_CODEC_PDM_MUX_CH2_MASK            (0x7 << 6)\n#define CODEC_CODEC_PDM_MUX_CH2_SHIFT           (6)\n#define CODEC_CODEC_PDM_MUX_CH3(n)              (((n) & 0x7) << 9)\n#define CODEC_CODEC_PDM_MUX_CH3_MASK            (0x7 << 9)\n#define CODEC_CODEC_PDM_MUX_CH3_SHIFT           (9)\n#define CODEC_CODEC_PDM_MUX_CH4(n)              (((n) & 0x7) << 12)\n#define CODEC_CODEC_PDM_MUX_CH4_MASK            (0x7 << 12)\n#define CODEC_CODEC_PDM_MUX_CH4_SHIFT           (12)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH0(n)        (((n) & 0x3) << 15)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH0_MASK      (0x3 << 15)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH0_SHIFT     (15)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH1(n)        (((n) & 0x3) << 17)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH1_MASK      (0x3 << 17)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH1_SHIFT     (17)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH2(n)        (((n) & 0x3) << 19)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH2_MASK      (0x3 << 19)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH2_SHIFT     (19)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH3(n)        (((n) & 0x3) << 21)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH3_MASK      (0x3 << 21)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH3_SHIFT     (21)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH4(n)        (((n) & 0x3) << 23)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH4_MASK      (0x3 << 23)\n#define CODEC_CODEC_PDM_CAP_PHASE_CH4_SHIFT     (23)\n\n// reg_b0\n#define CODEC_CODEC_CLASSG_EN                   (1 << 0)\n#define CODEC_CODEC_CLASSG_QUICK_DOWN           (1 << 1)\n#define CODEC_CODEC_CLASSG_STEP_3_4N            (1 << 2)\n#define CODEC_CODEC_CLASSG_LR                   (1 << 3)\n#define CODEC_CODEC_CLASSG_WINDOW(n)            (((n) & 0xFFF) << 4)\n#define CODEC_CODEC_CLASSG_WINDOW_MASK          (0xFFF << 4)\n#define CODEC_CODEC_CLASSG_WINDOW_SHIFT         (4)\n\n// reg_b4\n#define CODEC_CODEC_CLASSG_THD0(n)              (((n) & 0xFF) << 0)\n#define CODEC_CODEC_CLASSG_THD0_MASK            (0xFF << 0)\n#define CODEC_CODEC_CLASSG_THD0_SHIFT           (0)\n#define CODEC_CODEC_CLASSG_THD1(n)              (((n) & 0xFF) << 8)\n#define CODEC_CODEC_CLASSG_THD1_MASK            (0xFF << 8)\n#define CODEC_CODEC_CLASSG_THD1_SHIFT           (8)\n#define CODEC_CODEC_CLASSG_THD2(n)              (((n) & 0xFF) << 16)\n#define CODEC_CODEC_CLASSG_THD2_MASK            (0xFF << 16)\n#define CODEC_CODEC_CLASSG_THD2_SHIFT           (16)\n\n// reg_b8\n#define CODEC_CODEC_DSD_ENABLE_L                (1 << 0)\n#define CODEC_CODEC_DSD_ENABLE_R                (1 << 1)\n#define CODEC_CODEC_DSD_DATA_INV                (1 << 2)\n#define CODEC_CODEC_DSD_SAMPLE_RATE(n)          (((n) & 0x3) << 3)\n#define CODEC_CODEC_DSD_SAMPLE_RATE_MASK        (0x3 << 3)\n#define CODEC_CODEC_DSD_SAMPLE_RATE_SHIFT       (3)\n\n// reg_bc\n#define CODEC_CODEC_ADC_MC_EN_CH0               (1 << 0)\n#define CODEC_CODEC_ADC_MC_EN_CH1               (1 << 1)\n#define CODEC_CODEC_FEEDBACK_MC_EN_CH0          (1 << 2)\n#define CODEC_CODEC_FEEDBACK_MC_EN_CH1          (1 << 3)\n\n// reg_c0\n#define CODEC_CODEC_DRE_ENABLE_CH0              (1 << 0)\n#define CODEC_CODEC_DRE_STEP_MODE_CH0(n)        (((n) & 0x3) << 1)\n#define CODEC_CODEC_DRE_STEP_MODE_CH0_MASK      (0x3 << 1)\n#define CODEC_CODEC_DRE_STEP_MODE_CH0_SHIFT     (1)\n#define CODEC_CODEC_DRE_THD_DB_OFFSET_CH0(n)    (((n) & 0xF) << 3)\n#define CODEC_CODEC_DRE_THD_DB_OFFSET_CH0_MASK  (0xF << 3)\n#define CODEC_CODEC_DRE_THD_DB_OFFSET_CH0_SHIFT (3)\n#define CODEC_CODEC_DRE_INI_ANA_GAIN_CH0(n)     (((n) & 0xF) << 7)\n#define CODEC_CODEC_DRE_INI_ANA_GAIN_CH0_MASK   (0xF << 7)\n#define CODEC_CODEC_DRE_INI_ANA_GAIN_CH0_SHIFT  (7)\n#define CODEC_CODEC_DRE_DELAY_CH0(n)            (((n) & 0x3F) << 11)\n#define CODEC_CODEC_DRE_DELAY_CH0_MASK          (0x3F << 11)\n#define CODEC_CODEC_DRE_DELAY_CH0_SHIFT         (11)\n#define CODEC_CODEC_DRE_THD_DB_OFFSET_SIGN_CH0  (1 << 17)\n#define CODEC_CODEC_DRE_GAIN_OFFSET_CH0(n)      (((n) & 0x7) << 18)\n#define CODEC_CODEC_DRE_GAIN_OFFSET_CH0_MASK    (0x7 << 18)\n#define CODEC_CODEC_DRE_GAIN_OFFSET_CH0_SHIFT   (18)\n\n// reg_c4\n#define CODEC_CODEC_DRE_AMP_HIGH_CH0(n)         (((n) & 0x7FF) << 0)\n#define CODEC_CODEC_DRE_AMP_HIGH_CH0_MASK       (0x7FF << 0)\n#define CODEC_CODEC_DRE_AMP_HIGH_CH0_SHIFT      (0)\n#define CODEC_CODEC_DRE_WINDOW_CH0(n)           (((n) & 0x1FFFFF) << 11)\n#define CODEC_CODEC_DRE_WINDOW_CH0_MASK         (0x1FFFFF << 11)\n#define CODEC_CODEC_DRE_WINDOW_CH0_SHIFT        (11)\n\n// reg_c8\n#define CODEC_CODEC_DRE_ENABLE_CH1              (1 << 0)\n#define CODEC_CODEC_DRE_STEP_MODE_CH1(n)        (((n) & 0x3) << 1)\n#define CODEC_CODEC_DRE_STEP_MODE_CH1_MASK      (0x3 << 1)\n#define CODEC_CODEC_DRE_STEP_MODE_CH1_SHIFT     (1)\n#define CODEC_CODEC_DRE_THD_DB_OFFSET_CH1(n)    (((n) & 0xF) << 3)\n#define CODEC_CODEC_DRE_THD_DB_OFFSET_CH1_MASK  (0xF << 3)\n#define CODEC_CODEC_DRE_THD_DB_OFFSET_CH1_SHIFT (3)\n#define CODEC_CODEC_DRE_INI_ANA_GAIN_CH1(n)     (((n) & 0xF) << 7)\n#define CODEC_CODEC_DRE_INI_ANA_GAIN_CH1_MASK   (0xF << 7)\n#define CODEC_CODEC_DRE_INI_ANA_GAIN_CH1_SHIFT  (7)\n#define CODEC_CODEC_DRE_DELAY_CH1(n)            (((n) & 0x3F) << 11)\n#define CODEC_CODEC_DRE_DELAY_CH1_MASK          (0x3F << 11)\n#define CODEC_CODEC_DRE_DELAY_CH1_SHIFT         (11)\n#define CODEC_CODEC_DRE_THD_DB_OFFSET_SIGN_CH1  (1 << 17)\n#define CODEC_CODEC_DRE_GAIN_OFFSET_CH1(n)      (((n) & 0x7) << 18)\n#define CODEC_CODEC_DRE_GAIN_OFFSET_CH1_MASK    (0x7 << 18)\n#define CODEC_CODEC_DRE_GAIN_OFFSET_CH1_SHIFT   (18)\n\n// reg_cc\n#define CODEC_CODEC_DRE_AMP_HIGH_CH1(n)         (((n) & 0x7FF) << 0)\n#define CODEC_CODEC_DRE_AMP_HIGH_CH1_MASK       (0x7FF << 0)\n#define CODEC_CODEC_DRE_AMP_HIGH_CH1_SHIFT      (0)\n#define CODEC_CODEC_DRE_WINDOW_CH1(n)           (((n) & 0x1FFFFF) << 11)\n#define CODEC_CODEC_DRE_WINDOW_CH1_MASK         (0x1FFFFF << 11)\n#define CODEC_CODEC_DRE_WINDOW_CH1_SHIFT        (11)\n\n// reg_d0\n#define CODEC_CODEC_ANC_ENABLE_CH0              (1 << 0)\n#define CODEC_CODEC_ANC_ENABLE_CH1              (1 << 1)\n#define CODEC_CODEC_DUAL_ANC_CH0                (1 << 2)\n#define CODEC_CODEC_DUAL_ANC_CH1                (1 << 3)\n#define CODEC_CODEC_ANC_MUTE_CH0                (1 << 4)\n#define CODEC_CODEC_ANC_MUTE_CH1                (1 << 5)\n#define CODEC_CODEC_FF_CH0_FIR_EN               (1 << 6)\n#define CODEC_CODEC_FF_CH1_FIR_EN               (1 << 7)\n#define CODEC_CODEC_FB_CH0_FIR_EN               (1 << 8)\n#define CODEC_CODEC_FB_CH1_FIR_EN               (1 << 9)\n#define CODEC_CODEC_ANC_RATE_SEL                (1 << 10)\n#define CODEC_CODEC_ANC_FF_SR_SEL(n)            (((n) & 0x3) << 11)\n#define CODEC_CODEC_ANC_FF_SR_SEL_MASK          (0x3 << 11)\n#define CODEC_CODEC_ANC_FF_SR_SEL_SHIFT         (11)\n#define CODEC_CODEC_ANC_FF_IN_PHASE_SEL(n)      (((n) & 0x7) << 13)\n#define CODEC_CODEC_ANC_FF_IN_PHASE_SEL_MASK    (0x7 << 13)\n#define CODEC_CODEC_ANC_FF_IN_PHASE_SEL_SHIFT   (13)\n#define CODEC_CODEC_ANC_FB_SR_SEL(n)            (((n) & 0x3) << 16)\n#define CODEC_CODEC_ANC_FB_SR_SEL_MASK          (0x3 << 16)\n#define CODEC_CODEC_ANC_FB_SR_SEL_SHIFT         (16)\n#define CODEC_CODEC_ANC_FB_IN_PHASE_SEL(n)      (((n) & 0x7) << 18)\n#define CODEC_CODEC_ANC_FB_IN_PHASE_SEL_MASK    (0x7 << 18)\n#define CODEC_CODEC_ANC_FB_IN_PHASE_SEL_SHIFT   (18)\n#define CODEC_CODEC_FEEDBACK_CH0                (1 << 21)\n#define CODEC_CODEC_FEEDBACK_CH1                (1 << 22)\n#define CODEC_CODEC_ADC_FIR_DS_EN_CH2           (1 << 23)\n#define CODEC_CODEC_ADC_FIR_DS_SEL_CH2          (1 << 24)\n#define CODEC_CODEC_ADC_FIR_DS_EN_CH3           (1 << 25)\n#define CODEC_CODEC_ADC_FIR_DS_SEL_CH3          (1 << 26)\n\n// reg_d4\n#define CODEC_CODEC_ANC_MUTE_GAIN_FF_CH0(n)     (((n) & 0xFFF) << 0)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FF_CH0_MASK   (0xFFF << 0)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FF_CH0_SHIFT  (0)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FF_CH1(n)     (((n) & 0xFFF) << 12)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FF_CH1_MASK   (0xFFF << 12)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FF_CH1_SHIFT  (12)\n#define CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FF_CH0  (1 << 24)\n#define CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FF_CH1  (1 << 25)\n\n// reg_d8\n#define CODEC_CODEC_ANC_MUTE_GAIN_FB_CH0(n)     (((n) & 0xFFF) << 0)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FB_CH0_MASK   (0xFFF << 0)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FB_CH0_SHIFT  (0)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FB_CH1(n)     (((n) & 0xFFF) << 12)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FB_CH1_MASK   (0xFFF << 12)\n#define CODEC_CODEC_ANC_MUTE_GAIN_FB_CH1_SHIFT  (12)\n#define CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FB_CH0  (1 << 24)\n#define CODEC_CODEC_ANC_MUTE_GAIN_PASS0_FB_CH1  (1 << 25)\n\n// reg_dc\n#define CODEC_CODEC_IIR_ENABLE                  (1 << 0)\n#define CODEC_CODEC_IIR_CH0_BYPASS              (1 << 1)\n#define CODEC_CODEC_IIR_CH1_BYPASS              (1 << 2)\n#define CODEC_CODEC_IIR_CH2_BYPASS              (1 << 3)\n#define CODEC_CODEC_IIR_CH3_BYPASS              (1 << 4)\n#define CODEC_CODEC_IIR_COUNT_CH0(n)            (((n) & 0xF) << 5)\n#define CODEC_CODEC_IIR_COUNT_CH0_MASK          (0xF << 5)\n#define CODEC_CODEC_IIR_COUNT_CH0_SHIFT         (5)\n#define CODEC_CODEC_IIR_COUNT_CH1(n)            (((n) & 0xF) << 9)\n#define CODEC_CODEC_IIR_COUNT_CH1_MASK          (0xF << 9)\n#define CODEC_CODEC_IIR_COUNT_CH1_SHIFT         (9)\n#define CODEC_CODEC_IIR_COUNT_CH2(n)            (((n) & 0xF) << 13)\n#define CODEC_CODEC_IIR_COUNT_CH2_MASK          (0xF << 13)\n#define CODEC_CODEC_IIR_COUNT_CH2_SHIFT         (13)\n#define CODEC_CODEC_IIR_COUNT_CH3(n)            (((n) & 0xF) << 17)\n#define CODEC_CODEC_IIR_COUNT_CH3_MASK          (0xF << 17)\n#define CODEC_CODEC_IIR_COUNT_CH3_SHIFT         (17)\n#define CODEC_CODEC_DAC_L_IIR_ENABLE            (1 << 21)\n#define CODEC_CODEC_DAC_R_IIR_ENABLE            (1 << 22)\n#define CODEC_CODEC_ADC_CH0_IIR_ENABLE          (1 << 23)\n#define CODEC_CODEC_ADC_CH1_IIR_ENABLE          (1 << 24)\n#define CODEC_CODEC_IIR_COEF_SWAP               (1 << 25)\n#define CODEC_CODEC_IIR_COEF_SWAP_STATUS        (1 << 26)\n\n// reg_e0\n#define CODEC_CODEC_DAC_DC_CH0(n)               (((n) & 0x7FFFF) << 0)\n#define CODEC_CODEC_DAC_DC_CH0_MASK             (0x7FFFF << 0)\n#define CODEC_CODEC_DAC_DC_CH0_SHIFT            (0)\n#define CODEC_CODEC_DAC_DC_UPDATE_CH0           (1 << 19)\n#define CODEC_CODEC_DAC_ANA_GAIN_UPDATE_DELAY_CH0(n) (((n) & 0xFF) << 20)\n#define CODEC_CODEC_DAC_ANA_GAIN_UPDATE_DELAY_CH0_MASK (0xFF << 20)\n#define CODEC_CODEC_DAC_ANA_GAIN_UPDATE_DELAY_CH0_SHIFT (20)\n#define CODEC_CODEC_DAC_DC_UPDATE_PASS0_CH0     (1 << 28)\n#define CODEC_CODEC_DAC_DC_UPDATE_STATUS_CH0    (1 << 29)\n\n// reg_e4\n#define CODEC_CODEC_RESAMPLE_DAC_ENABLE         (1 << 0)\n#define CODEC_CODEC_RESAMPLE_DAC_L_ENABLE       (1 << 1)\n#define CODEC_CODEC_RESAMPLE_DAC_R_ENABLE       (1 << 2)\n#define CODEC_CODEC_RESAMPLE_ADC_ENABLE         (1 << 3)\n#define CODEC_CODEC_RESAMPLE_ADC_DUAL_CH        (1 << 4)\n#define CODEC_CODEC_RESAMPLE_ADC_CH0_SEL(n)     (((n) & 0x7) << 5)\n#define CODEC_CODEC_RESAMPLE_ADC_CH0_SEL_MASK   (0x7 << 5)\n#define CODEC_CODEC_RESAMPLE_ADC_CH0_SEL_SHIFT  (5)\n#define CODEC_CODEC_RESAMPLE_ADC_CH1_SEL(n)     (((n) & 0x7) << 8)\n#define CODEC_CODEC_RESAMPLE_ADC_CH1_SEL_MASK   (0x7 << 8)\n#define CODEC_CODEC_RESAMPLE_ADC_CH1_SEL_SHIFT  (8)\n#define CODEC_CODEC_RESAMPLE_DAC_PHASE_UPDATE   (1 << 11)\n#define CODEC_CODEC_RESAMPLE_DAC_TRIGGER_SEL(n) (((n) & 0x3) << 12)\n#define CODEC_CODEC_RESAMPLE_DAC_TRIGGER_SEL_MASK (0x3 << 12)\n#define CODEC_CODEC_RESAMPLE_DAC_TRIGGER_SEL_SHIFT (12)\n#define CODEC_CODEC_RESAMPLE_ADC_PHASE_UPDATE   (1 << 14)\n#define CODEC_CODEC_RESAMPLE_ADC_TRIGGER_SEL(n) (((n) & 0x3) << 15)\n#define CODEC_CODEC_RESAMPLE_ADC_TRIGGER_SEL_MASK (0x3 << 15)\n#define CODEC_CODEC_RESAMPLE_ADC_TRIGGER_SEL_SHIFT (15)\n\n// reg_e8\n#define CODEC_CODEC_DAC_DC_CH1(n)               (((n) & 0x7FFFF) << 0)\n#define CODEC_CODEC_DAC_DC_CH1_MASK             (0x7FFFF << 0)\n#define CODEC_CODEC_DAC_DC_CH1_SHIFT            (0)\n#define CODEC_CODEC_DAC_DC_UPDATE_CH1           (1 << 19)\n#define CODEC_CODEC_DAC_ANA_GAIN_UPDATE_DELAY_CH1(n) (((n) & 0xFF) << 20)\n#define CODEC_CODEC_DAC_ANA_GAIN_UPDATE_DELAY_CH1_MASK (0xFF << 20)\n#define CODEC_CODEC_DAC_ANA_GAIN_UPDATE_DELAY_CH1_SHIFT (20)\n#define CODEC_CODEC_DAC_DC_UPDATE_PASS0_CH1     (1 << 28)\n#define CODEC_CODEC_DAC_DC_UPDATE_STATUS_CH1    (1 << 29)\n\n// reg_ec\n#define CODEC_CODEC_RAMP_STEP_CH0(n)            (((n) & 0xFFF) << 0)\n#define CODEC_CODEC_RAMP_STEP_CH0_MASK          (0xFFF << 0)\n#define CODEC_CODEC_RAMP_STEP_CH0_SHIFT         (0)\n#define CODEC_CODEC_RAMP_DIRECT_CH0             (1 << 12)\n#define CODEC_CODEC_RAMP_EN_CH0                 (1 << 13)\n#define CODEC_CODEC_RAMP_INTERVAL_CH0(n)        (((n) & 0x7) << 14)\n#define CODEC_CODEC_RAMP_INTERVAL_CH0_MASK      (0x7 << 14)\n#define CODEC_CODEC_RAMP_INTERVAL_CH0_SHIFT     (14)\n\n// reg_f0\n#define CODEC_CODEC_RAMP_STEP_CH1(n)            (((n) & 0xFFF) << 0)\n#define CODEC_CODEC_RAMP_STEP_CH1_MASK          (0xFFF << 0)\n#define CODEC_CODEC_RAMP_STEP_CH1_SHIFT         (0)\n#define CODEC_CODEC_RAMP_DIRECT_CH1             (1 << 12)\n#define CODEC_CODEC_RAMP_EN_CH1                 (1 << 13)\n#define CODEC_CODEC_RAMP_INTERVAL_CH1(n)        (((n) & 0x7) << 14)\n#define CODEC_CODEC_RAMP_INTERVAL_CH1_MASK      (0x7 << 14)\n#define CODEC_CODEC_RAMP_INTERVAL_CH1_SHIFT     (14)\n\n// reg_f4\n#define CODEC_CODEC_RESAMPLE_DAC_PHASE_INC(n)   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_CODEC_RESAMPLE_DAC_PHASE_INC_MASK (0xFFFFFFFF << 0)\n#define CODEC_CODEC_RESAMPLE_DAC_PHASE_INC_SHIFT (0)\n\n// reg_f8\n#define CODEC_CODEC_RESAMPLE_ADC_PHASE_INC(n)   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_CODEC_RESAMPLE_ADC_PHASE_INC_MASK (0xFFFFFFFF << 0)\n#define CODEC_CODEC_RESAMPLE_ADC_PHASE_INC_SHIFT (0)\n\n// reg_100\n#define CODEC_FIR_STREAM_ENABLE_CH0             (1 << 0)\n#define CODEC_FIR_STREAM_ENABLE_CH1             (1 << 1)\n#define CODEC_FIR_STREAM_ENABLE_CH2             (1 << 2)\n#define CODEC_FIR_STREAM_ENABLE_CH3             (1 << 3)\n#define CODEC_FIR_ENABLE_CH0                    (1 << 4)\n#define CODEC_FIR_ENABLE_CH1                    (1 << 5)\n#define CODEC_FIR_ENABLE_CH2                    (1 << 6)\n#define CODEC_FIR_ENABLE_CH3                    (1 << 7)\n#define CODEC_DMA_CTRL_RX_FIR                   (1 << 8)\n#define CODEC_DMA_CTRL_TX_FIR                   (1 << 9)\n#define CODEC_FIR_UPSAMPLE_CH0                  (1 << 10)\n#define CODEC_FIR_UPSAMPLE_CH1                  (1 << 11)\n#define CODEC_FIR_UPSAMPLE_CH2                  (1 << 12)\n#define CODEC_FIR_UPSAMPLE_CH3                  (1 << 13)\n#define CODEC_MODE_32BIT_FIR                    (1 << 14)\n#define CODEC_FIR_RESERVED_REG0                 (1 << 15)\n#define CODEC_MODE_16BIT_FIR_TX_CH0             (1 << 16)\n#define CODEC_MODE_16BIT_FIR_RX_CH0             (1 << 17)\n#define CODEC_MODE_16BIT_FIR_TX_CH1             (1 << 18)\n#define CODEC_MODE_16BIT_FIR_RX_CH1             (1 << 19)\n#define CODEC_MODE_16BIT_FIR_TX_CH2             (1 << 20)\n#define CODEC_MODE_16BIT_FIR_RX_CH2             (1 << 21)\n#define CODEC_MODE_16BIT_FIR_TX_CH3             (1 << 22)\n#define CODEC_MODE_16BIT_FIR_RX_CH3             (1 << 23)\n\n// reg_104\n#define CODEC_FIR_ACCESS_OFFSET_CH0(n)          (((n) & 0x7) << 0)\n#define CODEC_FIR_ACCESS_OFFSET_CH0_MASK        (0x7 << 0)\n#define CODEC_FIR_ACCESS_OFFSET_CH0_SHIFT       (0)\n#define CODEC_FIR_ACCESS_OFFSET_CH1(n)          (((n) & 0x7) << 3)\n#define CODEC_FIR_ACCESS_OFFSET_CH1_MASK        (0x7 << 3)\n#define CODEC_FIR_ACCESS_OFFSET_CH1_SHIFT       (3)\n#define CODEC_FIR_ACCESS_OFFSET_CH2(n)          (((n) & 0x7) << 6)\n#define CODEC_FIR_ACCESS_OFFSET_CH2_MASK        (0x7 << 6)\n#define CODEC_FIR_ACCESS_OFFSET_CH2_SHIFT       (6)\n#define CODEC_FIR_ACCESS_OFFSET_CH3(n)          (((n) & 0x7) << 9)\n#define CODEC_FIR_ACCESS_OFFSET_CH3_MASK        (0x7 << 9)\n#define CODEC_FIR_ACCESS_OFFSET_CH3_SHIFT       (9)\n\n// reg_108\n#define CODEC_STREAM0_FIR1_CH0                  (1 << 0)\n#define CODEC_FIR_MODE_CH0(n)                   (((n) & 0x3) << 1)\n#define CODEC_FIR_MODE_CH0_MASK                 (0x3 << 1)\n#define CODEC_FIR_MODE_CH0_SHIFT                (1)\n#define CODEC_FIR_ORDER_CH0(n)                  (((n) & 0x3FF) << 3)\n#define CODEC_FIR_ORDER_CH0_MASK                (0x3FF << 3)\n#define CODEC_FIR_ORDER_CH0_SHIFT               (3)\n#define CODEC_FIR_SAMPLE_START_CH0(n)           (((n) & 0x1FF) << 13)\n#define CODEC_FIR_SAMPLE_START_CH0_MASK         (0x1FF << 13)\n#define CODEC_FIR_SAMPLE_START_CH0_SHIFT        (13)\n#define CODEC_FIR_SAMPLE_NUM_CH0(n)             (((n) & 0x1FF) << 22)\n#define CODEC_FIR_SAMPLE_NUM_CH0_MASK           (0x1FF << 22)\n#define CODEC_FIR_SAMPLE_NUM_CH0_SHIFT          (22)\n#define CODEC_FIR_DO_REMAP_CH0                  (1 << 31)\n\n// reg_10c\n#define CODEC_FIR_RESULT_BASE_ADDR_CH0(n)       (((n) & 0x1FF) << 0)\n#define CODEC_FIR_RESULT_BASE_ADDR_CH0_MASK     (0x1FF << 0)\n#define CODEC_FIR_RESULT_BASE_ADDR_CH0_SHIFT    (0)\n#define CODEC_FIR_SLIDE_OFFSET_CH0(n)           (((n) & 0x3F) << 9)\n#define CODEC_FIR_SLIDE_OFFSET_CH0_MASK         (0x3F << 9)\n#define CODEC_FIR_SLIDE_OFFSET_CH0_SHIFT        (9)\n#define CODEC_FIR_BURST_LENGTH_CH0(n)           (((n) & 0x3F) << 15)\n#define CODEC_FIR_BURST_LENGTH_CH0_MASK         (0x3F << 15)\n#define CODEC_FIR_BURST_LENGTH_CH0_SHIFT        (15)\n#define CODEC_FIR_GAIN_SEL_CH0(n)               (((n) & 0xF) << 21)\n#define CODEC_FIR_GAIN_SEL_CH0_MASK             (0xF << 21)\n#define CODEC_FIR_GAIN_SEL_CH0_SHIFT            (21)\n#define CODEC_FIR_LOOP_NUM_CH0(n)               (((n) & 0x7F) << 25)\n#define CODEC_FIR_LOOP_NUM_CH0_MASK             (0x7F << 25)\n#define CODEC_FIR_LOOP_NUM_CH0_SHIFT            (25)\n\n// reg_110\n#define CODEC_STREAM0_FIR1_CH1                  (1 << 0)\n#define CODEC_FIR_MODE_CH1(n)                   (((n) & 0x3) << 1)\n#define CODEC_FIR_MODE_CH1_MASK                 (0x3 << 1)\n#define CODEC_FIR_MODE_CH1_SHIFT                (1)\n#define CODEC_FIR_ORDER_CH1(n)                  (((n) & 0x3FF) << 3)\n#define CODEC_FIR_ORDER_CH1_MASK                (0x3FF << 3)\n#define CODEC_FIR_ORDER_CH1_SHIFT               (3)\n#define CODEC_FIR_SAMPLE_START_CH1(n)           (((n) & 0x1FF) << 13)\n#define CODEC_FIR_SAMPLE_START_CH1_MASK         (0x1FF << 13)\n#define CODEC_FIR_SAMPLE_START_CH1_SHIFT        (13)\n#define CODEC_FIR_SAMPLE_NUM_CH1(n)             (((n) & 0x1FF) << 22)\n#define CODEC_FIR_SAMPLE_NUM_CH1_MASK           (0x1FF << 22)\n#define CODEC_FIR_SAMPLE_NUM_CH1_SHIFT          (22)\n#define CODEC_FIR_DO_REMAP_CH1                  (1 << 31)\n\n// reg_114\n#define CODEC_FIR_RESULT_BASE_ADDR_CH1(n)       (((n) & 0x1FF) << 0)\n#define CODEC_FIR_RESULT_BASE_ADDR_CH1_MASK     (0x1FF << 0)\n#define CODEC_FIR_RESULT_BASE_ADDR_CH1_SHIFT    (0)\n#define CODEC_FIR_SLIDE_OFFSET_CH1(n)           (((n) & 0x3F) << 9)\n#define CODEC_FIR_SLIDE_OFFSET_CH1_MASK         (0x3F << 9)\n#define CODEC_FIR_SLIDE_OFFSET_CH1_SHIFT        (9)\n#define CODEC_FIR_BURST_LENGTH_CH1(n)           (((n) & 0x3F) << 15)\n#define CODEC_FIR_BURST_LENGTH_CH1_MASK         (0x3F << 15)\n#define CODEC_FIR_BURST_LENGTH_CH1_SHIFT        (15)\n#define CODEC_FIR_GAIN_SEL_CH1(n)               (((n) & 0xF) << 21)\n#define CODEC_FIR_GAIN_SEL_CH1_MASK             (0xF << 21)\n#define CODEC_FIR_GAIN_SEL_CH1_SHIFT            (21)\n#define CODEC_FIR_LOOP_NUM_CH1(n)               (((n) & 0x7F) << 25)\n#define CODEC_FIR_LOOP_NUM_CH1_MASK             (0x7F << 25)\n#define CODEC_FIR_LOOP_NUM_CH1_SHIFT            (25)\n\n// reg_118\n#define CODEC_STREAM0_FIR1_CH2                  (1 << 0)\n#define CODEC_FIR_MODE_CH2(n)                   (((n) & 0x3) << 1)\n#define CODEC_FIR_MODE_CH2_MASK                 (0x3 << 1)\n#define CODEC_FIR_MODE_CH2_SHIFT                (1)\n#define CODEC_FIR_ORDER_CH2(n)                  (((n) & 0x3FF) << 3)\n#define CODEC_FIR_ORDER_CH2_MASK                (0x3FF << 3)\n#define CODEC_FIR_ORDER_CH2_SHIFT               (3)\n#define CODEC_FIR_SAMPLE_START_CH2(n)           (((n) & 0x1FF) << 13)\n#define CODEC_FIR_SAMPLE_START_CH2_MASK         (0x1FF << 13)\n#define CODEC_FIR_SAMPLE_START_CH2_SHIFT        (13)\n#define CODEC_FIR_SAMPLE_NUM_CH2(n)             (((n) & 0x1FF) << 22)\n#define CODEC_FIR_SAMPLE_NUM_CH2_MASK           (0x1FF << 22)\n#define CODEC_FIR_SAMPLE_NUM_CH2_SHIFT          (22)\n#define CODEC_FIR_DO_REMAP_CH2                  (1 << 31)\n\n// reg_11c\n#define CODEC_FIR_RESULT_BASE_ADDR_CH2(n)       (((n) & 0x1FF) << 0)\n#define CODEC_FIR_RESULT_BASE_ADDR_CH2_MASK     (0x1FF << 0)\n#define CODEC_FIR_RESULT_BASE_ADDR_CH2_SHIFT    (0)\n#define CODEC_FIR_SLIDE_OFFSET_CH2(n)           (((n) & 0x3F) << 9)\n#define CODEC_FIR_SLIDE_OFFSET_CH2_MASK         (0x3F << 9)\n#define CODEC_FIR_SLIDE_OFFSET_CH2_SHIFT        (9)\n#define CODEC_FIR_BURST_LENGTH_CH2(n)           (((n) & 0x3F) << 15)\n#define CODEC_FIR_BURST_LENGTH_CH2_MASK         (0x3F << 15)\n#define CODEC_FIR_BURST_LENGTH_CH2_SHIFT        (15)\n#define CODEC_FIR_GAIN_SEL_CH2(n)               (((n) & 0xF) << 21)\n#define CODEC_FIR_GAIN_SEL_CH2_MASK             (0xF << 21)\n#define CODEC_FIR_GAIN_SEL_CH2_SHIFT            (21)\n#define CODEC_FIR_LOOP_NUM_CH2(n)               (((n) & 0x7F) << 25)\n#define CODEC_FIR_LOOP_NUM_CH2_MASK             (0x7F << 25)\n#define CODEC_FIR_LOOP_NUM_CH2_SHIFT            (25)\n\n// reg_120\n#define CODEC_STREAM0_FIR1_CH3                  (1 << 0)\n#define CODEC_FIR_MODE_CH3(n)                   (((n) & 0x3) << 1)\n#define CODEC_FIR_MODE_CH3_MASK                 (0x3 << 1)\n#define CODEC_FIR_MODE_CH3_SHIFT                (1)\n#define CODEC_FIR_ORDER_CH3(n)                  (((n) & 0x3FF) << 3)\n#define CODEC_FIR_ORDER_CH3_MASK                (0x3FF << 3)\n#define CODEC_FIR_ORDER_CH3_SHIFT               (3)\n#define CODEC_FIR_SAMPLE_START_CH3(n)           (((n) & 0x1FF) << 13)\n#define CODEC_FIR_SAMPLE_START_CH3_MASK         (0x1FF << 13)\n#define CODEC_FIR_SAMPLE_START_CH3_SHIFT        (13)\n#define CODEC_FIR_SAMPLE_NUM_CH3(n)             (((n) & 0x1FF) << 22)\n#define CODEC_FIR_SAMPLE_NUM_CH3_MASK           (0x1FF << 22)\n#define CODEC_FIR_SAMPLE_NUM_CH3_SHIFT          (22)\n#define CODEC_FIR_DO_REMAP_CH3                  (1 << 31)\n\n// reg_124\n#define CODEC_FIR_RESULT_BASE_ADDR_CH3(n)       (((n) & 0x1FF) << 0)\n#define CODEC_FIR_RESULT_BASE_ADDR_CH3_MASK     (0x1FF << 0)\n#define CODEC_FIR_RESULT_BASE_ADDR_CH3_SHIFT    (0)\n#define CODEC_FIR_SLIDE_OFFSET_CH3(n)           (((n) & 0x3F) << 9)\n#define CODEC_FIR_SLIDE_OFFSET_CH3_MASK         (0x3F << 9)\n#define CODEC_FIR_SLIDE_OFFSET_CH3_SHIFT        (9)\n#define CODEC_FIR_BURST_LENGTH_CH3(n)           (((n) & 0x3F) << 15)\n#define CODEC_FIR_BURST_LENGTH_CH3_MASK         (0x3F << 15)\n#define CODEC_FIR_BURST_LENGTH_CH3_SHIFT        (15)\n#define CODEC_FIR_GAIN_SEL_CH3(n)               (((n) & 0xF) << 21)\n#define CODEC_FIR_GAIN_SEL_CH3_MASK             (0xF << 21)\n#define CODEC_FIR_GAIN_SEL_CH3_SHIFT            (21)\n#define CODEC_FIR_LOOP_NUM_CH3(n)               (((n) & 0x7F) << 25)\n#define CODEC_FIR_LOOP_NUM_CH3_MASK             (0x7F << 25)\n#define CODEC_FIR_LOOP_NUM_CH3_SHIFT            (25)\n\n// reg_128\n#define CODEC_AHB_IIR_ENABLE                    (1 << 0)\n#define CODEC_DO_SAMPLE_INI                     (1 << 1)\n#define CODEC_USE_SAMPLE_HIGH_HALF              (1 << 2)\n#define CODEC_AHB_IIR_IF_EN                     (1 << 3)\n#define CODEC_DMA_CTRL_RX_IIR                   (1 << 4)\n#define CODEC_DMA_CTRL_TX_IIR                   (1 << 5)\n#define CODEC_MODE_32BIT_IIR                    (1 << 6)\n#define CODEC_MODE_16BIT_IIR                    (1 << 7)\n#define CODEC_AHB_IIR_MAX_CNT(n)                (((n) & 0xF) << 8)\n#define CODEC_AHB_IIR_MAX_CNT_MASK              (0xF << 8)\n#define CODEC_AHB_IIR_MAX_CNT_SHIFT             (8)\n#define CODEC_IIR_MULTI_CYCLE_MODE(n)           (((n) & 0x3) << 12)\n#define CODEC_IIR_MULTI_CYCLE_MODE_MASK         (0x3 << 12)\n#define CODEC_IIR_MULTI_CYCLE_MODE_SHIFT        (12)\n\n// reg_130\n#define CODEC_CODEC_FB_CHECK_ENABLE_CH0         (1 << 0)\n#define CODEC_CODEC_FB_CHECK_ACC_SAMPLE_RATE_CH0(n) (((n) & 0x3) << 1)\n#define CODEC_CODEC_FB_CHECK_ACC_SAMPLE_RATE_CH0_MASK (0x3 << 1)\n#define CODEC_CODEC_FB_CHECK_ACC_SAMPLE_RATE_CH0_SHIFT (1)\n#define CODEC_CODEC_FB_CHECK_SRC_SEL_CH0(n)     (((n) & 0x3) << 3)\n#define CODEC_CODEC_FB_CHECK_SRC_SEL_CH0_MASK   (0x3 << 3)\n#define CODEC_CODEC_FB_CHECK_SRC_SEL_CH0_SHIFT  (3)\n#define CODEC_CODEC_FB_CHECK_KEEP_SEL_CH0       (1 << 5)\n#define CODEC_CODEC_FB_CHECK_ACC_WINDOW_CH0(n)  (((n) & 0xFFF) << 6)\n#define CODEC_CODEC_FB_CHECK_ACC_WINDOW_CH0_MASK (0xFFF << 6)\n#define CODEC_CODEC_FB_CHECK_ACC_WINDOW_CH0_SHIFT (6)\n#define CODEC_CODEC_FB_CHECK_TRIG_WINDOW_CH0(n) (((n) & 0x3FF) << 18)\n#define CODEC_CODEC_FB_CHECK_TRIG_WINDOW_CH0_MASK (0x3FF << 18)\n#define CODEC_CODEC_FB_CHECK_TRIG_WINDOW_CH0_SHIFT (18)\n#define CODEC_CODEC_FB_CHECK_KEEP_CH0           (1 << 28)\n\n// reg_134\n#define CODEC_CODEC_FB_CHECK_ENABLE_CH1         (1 << 0)\n#define CODEC_CODEC_FB_CHECK_ACC_SAMPLE_RATE_CH1(n) (((n) & 0x3) << 1)\n#define CODEC_CODEC_FB_CHECK_ACC_SAMPLE_RATE_CH1_MASK (0x3 << 1)\n#define CODEC_CODEC_FB_CHECK_ACC_SAMPLE_RATE_CH1_SHIFT (1)\n#define CODEC_CODEC_FB_CHECK_SRC_SEL_CH1(n)     (((n) & 0x3) << 3)\n#define CODEC_CODEC_FB_CHECK_SRC_SEL_CH1_MASK   (0x3 << 3)\n#define CODEC_CODEC_FB_CHECK_SRC_SEL_CH1_SHIFT  (3)\n#define CODEC_CODEC_FB_CHECK_KEEP_SEL_CH1       (1 << 5)\n#define CODEC_CODEC_FB_CHECK_ACC_WINDOW_CH1(n)  (((n) & 0xFFF) << 6)\n#define CODEC_CODEC_FB_CHECK_ACC_WINDOW_CH1_MASK (0xFFF << 6)\n#define CODEC_CODEC_FB_CHECK_ACC_WINDOW_CH1_SHIFT (6)\n#define CODEC_CODEC_FB_CHECK_TRIG_WINDOW_CH1(n) (((n) & 0x3FF) << 18)\n#define CODEC_CODEC_FB_CHECK_TRIG_WINDOW_CH1_MASK (0x3FF << 18)\n#define CODEC_CODEC_FB_CHECK_TRIG_WINDOW_CH1_SHIFT (18)\n#define CODEC_CODEC_FB_CHECK_KEEP_CH1           (1 << 28)\n\n// reg_138\n#define CODEC_CODEC_FB_CHECK_THRESHOLD_CH0(n)   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_CODEC_FB_CHECK_THRESHOLD_CH0_MASK (0xFFFFFFFF << 0)\n#define CODEC_CODEC_FB_CHECK_THRESHOLD_CH0_SHIFT (0)\n\n// reg_13c\n#define CODEC_CODEC_FB_CHECK_THRESHOLD_CH1(n)   (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_CODEC_FB_CHECK_THRESHOLD_CH1_MASK (0xFFFFFFFF << 0)\n#define CODEC_CODEC_FB_CHECK_THRESHOLD_CH1_SHIFT (0)\n\n// reg_140\n#define CODEC_CODEC_FB_CHECK_DATA_AVG_KEEP_CH0(n) (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_CODEC_FB_CHECK_DATA_AVG_KEEP_CH0_MASK (0xFFFFFFFF << 0)\n#define CODEC_CODEC_FB_CHECK_DATA_AVG_KEEP_CH0_SHIFT (0)\n\n// reg_144\n#define CODEC_CODEC_FB_CHECK_DATA_AVG_KEEP_CH1(n) (((n) & 0xFFFFFFFF) << 0)\n#define CODEC_CODEC_FB_CHECK_DATA_AVG_KEEP_CH1_MASK (0xFFFFFFFF << 0)\n#define CODEC_CODEC_FB_CHECK_DATA_AVG_KEEP_CH1_SHIFT (0)\n\n// reg_148\n#define CODEC_VAD_EN                            (1 << 0)\n#define CODEC_VAD_DS_BYPASS                     (1 << 1)\n#define CODEC_VAD_DC_CANCEL_BYPASS              (1 << 2)\n#define CODEC_VAD_PRE_BYPASS                    (1 << 3)\n#define CODEC_VAD_DIG_MODE                      (1 << 4)\n#define CODEC_VAD_FINISH                        (1 << 5)\n\n// reg_14c\n#define CODEC_VAD_U_DC(n)                       (((n) & 0xF) << 0)\n#define CODEC_VAD_U_DC_MASK                     (0xF << 0)\n#define CODEC_VAD_U_DC_SHIFT                    (0)\n#define CODEC_VAD_U_PRE(n)                      (((n) & 0x7) << 4)\n#define CODEC_VAD_U_PRE_MASK                    (0x7 << 4)\n#define CODEC_VAD_U_PRE_SHIFT                   (4)\n#define CODEC_VAD_FRAME_LEN(n)                  (((n) & 0xFF) << 7)\n#define CODEC_VAD_FRAME_LEN_MASK                (0xFF << 7)\n#define CODEC_VAD_FRAME_LEN_SHIFT               (7)\n#define CODEC_VAD_MVAD(n)                       (((n) & 0xF) << 15)\n#define CODEC_VAD_MVAD_MASK                     (0xF << 15)\n#define CODEC_VAD_MVAD_SHIFT                    (15)\n#define CODEC_VAD_PRE_GAIN(n)                   (((n) & 0x3F) << 19)\n#define CODEC_VAD_PRE_GAIN_MASK                 (0x3F << 19)\n#define CODEC_VAD_PRE_GAIN_SHIFT                (19)\n#define CODEC_VAD_STH(n)                        (((n) & 0x3F) << 25)\n#define CODEC_VAD_STH_MASK                      (0x3F << 25)\n#define CODEC_VAD_STH_SHIFT                     (25)\n\n// reg_150\n#define CODEC_VAD_FRAME_TH1(n)                  (((n) & 0xFF) << 0)\n#define CODEC_VAD_FRAME_TH1_MASK                (0xFF << 0)\n#define CODEC_VAD_FRAME_TH1_SHIFT               (0)\n#define CODEC_VAD_FRAME_TH2(n)                  (((n) & 0x3FF) << 8)\n#define CODEC_VAD_FRAME_TH2_MASK                (0x3FF << 8)\n#define CODEC_VAD_FRAME_TH2_SHIFT               (8)\n#define CODEC_VAD_FRAME_TH3(n)                  (((n) & 0x3FFF) << 18)\n#define CODEC_VAD_FRAME_TH3_MASK                (0x3FFF << 18)\n#define CODEC_VAD_FRAME_TH3_SHIFT               (18)\n\n// reg_154\n#define CODEC_VAD_RANGE1(n)                     (((n) & 0x1F) << 0)\n#define CODEC_VAD_RANGE1_MASK                   (0x1F << 0)\n#define CODEC_VAD_RANGE1_SHIFT                  (0)\n#define CODEC_VAD_RANGE2(n)                     (((n) & 0x7F) << 5)\n#define CODEC_VAD_RANGE2_MASK                   (0x7F << 5)\n#define CODEC_VAD_RANGE2_SHIFT                  (5)\n#define CODEC_VAD_RANGE3(n)                     (((n) & 0x1FF) << 12)\n#define CODEC_VAD_RANGE3_MASK                   (0x1FF << 12)\n#define CODEC_VAD_RANGE3_SHIFT                  (12)\n#define CODEC_VAD_RANGE4(n)                     (((n) & 0x3FF) << 21)\n#define CODEC_VAD_RANGE4_MASK                   (0x3FF << 21)\n#define CODEC_VAD_RANGE4_SHIFT                  (21)\n\n// reg_158\n#define CODEC_VAD_PSD_TH1(n)                    (((n) & 0x7FFFFFF) << 0)\n#define CODEC_VAD_PSD_TH1_MASK                  (0x7FFFFFF << 0)\n#define CODEC_VAD_PSD_TH1_SHIFT                 (0)\n\n// reg_15c\n#define CODEC_VAD_PSD_TH2(n)                    (((n) & 0x7FFFFFF) << 0)\n#define CODEC_VAD_PSD_TH2_MASK                  (0x7FFFFFF << 0)\n#define CODEC_VAD_PSD_TH2_SHIFT                 (0)\n\n// reg_160\n#define CODEC_VAD_MEM_ADDR_CNT(n)               (((n) & 0x1FFF) << 1)\n#define CODEC_VAD_MEM_ADDR_CNT_MASK             (0x1FFF << 1)\n#define CODEC_VAD_MEM_ADDR_CNT_SHIFT            (1)\n#define CODEC_VAD_MEM_DATA_CNT(n)               (((n) & 0x1FFF) << 15)\n#define CODEC_VAD_MEM_DATA_CNT_MASK             (0x1FFF << 15)\n#define CODEC_VAD_MEM_DATA_CNT_SHIFT            (15)\n\n// reg_164\n#define CODEC_SMIN_SYC(n)                       (((n) & 0x7FFFFFF) << 0)\n#define CODEC_SMIN_SYC_MASK                     (0x7FFFFFF << 0)\n#define CODEC_SMIN_SYC_SHIFT                    (0)\n\n// reg_168\n#define CODEC_PSD_SYC(n)                        (((n) & 0x7FFFFFF) << 0)\n#define CODEC_PSD_SYC_MASK                      (0x7FFFFFF << 0)\n#define CODEC_PSD_SYC_SHIFT                     (0)\n\n// reg_170\n#define CODEC_FIR_CH0_STATE(n)                  (((n) & 0xFF) << 0)\n#define CODEC_FIR_CH0_STATE_MASK                (0xFF << 0)\n#define CODEC_FIR_CH0_STATE_SHIFT               (0)\n#define CODEC_FIR_CH1_STATE(n)                  (((n) & 0xFF) << 8)\n#define CODEC_FIR_CH1_STATE_MASK                (0xFF << 8)\n#define CODEC_FIR_CH1_STATE_SHIFT               (8)\n#define CODEC_FIR_CH2_STATE(n)                  (((n) & 0xFF) << 16)\n#define CODEC_FIR_CH2_STATE_MASK                (0xFF << 16)\n#define CODEC_FIR_CH2_STATE_SHIFT               (16)\n#define CODEC_FIR_CH3_STATE(n)                  (((n) & 0xFF) << 24)\n#define CODEC_FIR_CH3_STATE_MASK                (0xFF << 24)\n#define CODEC_FIR_CH3_STATE_SHIFT               (24)\n\n// reg_174\n#define CODEC_CODEC_ADC_DC_DOUT_CH0_SYNC(n)     (((n) & 0x1FFFFF) << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH0_SYNC_MASK   (0x1FFFFF << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH0_SYNC_SHIFT  (0)\n\n// reg_178\n#define CODEC_CODEC_ADC_DC_DOUT_CH1_SYNC(n)     (((n) & 0x1FFFFF) << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH1_SYNC_MASK   (0x1FFFFF << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH1_SYNC_SHIFT  (0)\n\n// reg_17c\n#define CODEC_CODEC_ADC_DC_DOUT_CH2_SYNC(n)     (((n) & 0x1FFFFF) << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH2_SYNC_MASK   (0x1FFFFF << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH2_SYNC_SHIFT  (0)\n\n// reg_180\n#define CODEC_CODEC_ADC_DC_DOUT_CH3_SYNC(n)     (((n) & 0x1FFFFF) << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH3_SYNC_MASK   (0x1FFFFF << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH3_SYNC_SHIFT  (0)\n\n// reg_184\n#define CODEC_CODEC_ADC_DC_DOUT_CH4_SYNC(n)     (((n) & 0x1FFFFF) << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH4_SYNC_MASK   (0x1FFFFF << 0)\n#define CODEC_CODEC_ADC_DC_DOUT_CH4_SYNC_SHIFT  (0)\n\n// reg_188\n#define CODEC_CODEC_ADC_DC_DIN_CH0(n)           (((n) & 0x7FFF) << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH0_MASK         (0x7FFF << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH0_SHIFT        (0)\n#define CODEC_CODEC_ADC_DC_UPDATE_CH0           (1 << 15)\n\n// reg_18c\n#define CODEC_CODEC_ADC_DC_DIN_CH1(n)           (((n) & 0x7FFF) << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH1_MASK         (0x7FFF << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH1_SHIFT        (0)\n#define CODEC_CODEC_ADC_DC_UPDATE_CH1           (1 << 15)\n\n// reg_190\n#define CODEC_CODEC_ADC_DC_DIN_CH2(n)           (((n) & 0x7FFF) << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH2_MASK         (0x7FFF << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH2_SHIFT        (0)\n#define CODEC_CODEC_ADC_DC_UPDATE_CH2           (1 << 15)\n\n// reg_194\n#define CODEC_CODEC_ADC_DC_DIN_CH3(n)           (((n) & 0x7FFF) << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH3_MASK         (0x7FFF << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH3_SHIFT        (0)\n#define CODEC_CODEC_ADC_DC_UPDATE_CH3           (1 << 15)\n\n// reg_198\n#define CODEC_CODEC_ADC_DC_DIN_CH4(n)           (((n) & 0x7FFF) << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH4_MASK         (0x7FFF << 0)\n#define CODEC_CODEC_ADC_DC_DIN_CH4_SHIFT        (0)\n#define CODEC_CODEC_ADC_DC_UPDATE_CH4           (1 << 15)\n\n// reg_1a0\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP0(n)       (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP0_MASK     (0x3FFF << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP0_SHIFT    (0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP1(n)       (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP1_MASK     (0x3FFF << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP1_SHIFT    (14)\n\n// reg_1a4\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP2(n)       (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP2_MASK     (0x3FFF << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP2_SHIFT    (0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP3(n)       (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP3_MASK     (0x3FFF << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP3_SHIFT    (14)\n\n// reg_1a8\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP4(n)       (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP4_MASK     (0x3FFF << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP4_SHIFT    (0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP5(n)       (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP5_MASK     (0x3FFF << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP5_SHIFT    (14)\n\n// reg_1ac\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP6(n)       (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP6_MASK     (0x3FFF << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP6_SHIFT    (0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP7(n)       (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP7_MASK     (0x3FFF << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP7_SHIFT    (14)\n\n// reg_1b0\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP8(n)       (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP8_MASK     (0x3FFF << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP8_SHIFT    (0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP9(n)       (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP9_MASK     (0x3FFF << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP9_SHIFT    (14)\n\n// reg_1b4\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP10(n)      (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP10_MASK    (0x3FFF << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP10_SHIFT   (0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP11(n)      (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP11_MASK    (0x3FFF << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP11_SHIFT   (14)\n\n// reg_1b8\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP12(n)      (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP12_MASK    (0x3FFF << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP12_SHIFT   (0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP13(n)      (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP13_MASK    (0x3FFF << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP13_SHIFT   (14)\n\n// reg_1bc\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP14(n)      (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP14_MASK    (0x3FFF << 0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP14_SHIFT   (0)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP15(n)      (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP15_MASK    (0x3FFF << 14)\n#define CODEC_CODEC_DAC_DRE_GAIN_STEP15_SHIFT   (14)\n\n// reg_1c0\n#define CODEC_CODEC_ADC_DRE_ENABLE_CH0          (1 << 0)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH0(n)    (((n) & 0x3) << 1)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH0_MASK  (0x3 << 1)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH0_SHIFT (1)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH0(n) (((n) & 0xF) << 3)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH0_MASK (0xF << 3)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH0_SHIFT (3)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH0(n) (((n) & 0xF) << 7)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH0_MASK (0xF << 7)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH0_SHIFT (7)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH0(n)    (((n) & 0x7) << 11)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH0_MASK  (0x7 << 11)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH0_SHIFT (11)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH0(n)    (((n) & 0x1F) << 14)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH0_MASK  (0x1F << 14)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH0_SHIFT (14)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_SIGN_CH0 (1 << 19)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH0(n)      (((n) & 0x3) << 20)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH0_MASK    (0x3 << 20)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH0_SHIFT   (20)\n#define CODEC_CODEC_ADC_DRE_OVERFLOW_MUTE_EN_CH0 (1 << 22)\n#define CODEC_CODEC_ADC_DRE_MUTE_MODE_CH0       (1 << 23)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH0(n) (((n) & 0x3) << 24)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH0_MASK (0x3 << 24)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH0_SHIFT (24)\n#define CODEC_CODEC_ADC_DRE_MUTE_STATUS_CH0     (1 << 26)\n\n// reg_1c4\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH0(n)     (((n) & 0x7FF) << 0)\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH0_MASK   (0x7FF << 0)\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH0_SHIFT  (0)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH0(n)       (((n) & 0xFFFFF) << 11)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH0_MASK     (0xFFFFF << 11)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH0_SHIFT    (11)\n\n// reg_1c8\n#define CODEC_CODEC_ADC_DRE_ENABLE_CH1          (1 << 0)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH1(n)    (((n) & 0x3) << 1)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH1_MASK  (0x3 << 1)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH1_SHIFT (1)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH1(n) (((n) & 0xF) << 3)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH1_MASK (0xF << 3)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH1_SHIFT (3)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH1(n) (((n) & 0xF) << 7)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH1_MASK (0xF << 7)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH1_SHIFT (7)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH1(n)    (((n) & 0x7) << 11)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH1_MASK  (0x7 << 11)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH1_SHIFT (11)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH1(n)    (((n) & 0x1F) << 14)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH1_MASK  (0x1F << 14)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH1_SHIFT (14)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_SIGN_CH1 (1 << 19)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH1(n)      (((n) & 0x3) << 20)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH1_MASK    (0x3 << 20)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH1_SHIFT   (20)\n#define CODEC_CODEC_ADC_DRE_OVERFLOW_MUTE_EN_CH1 (1 << 22)\n#define CODEC_CODEC_ADC_DRE_MUTE_MODE_CH1       (1 << 23)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH1(n) (((n) & 0x3) << 24)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH1_MASK (0x3 << 24)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH1_SHIFT (24)\n#define CODEC_CODEC_ADC_DRE_MUTE_STATUS_CH1     (1 << 26)\n\n// reg_1cc\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH1(n)     (((n) & 0x7FF) << 0)\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH1_MASK   (0x7FF << 0)\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH1_SHIFT  (0)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH1(n)       (((n) & 0xFFFFF) << 11)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH1_MASK     (0xFFFFF << 11)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH1_SHIFT    (11)\n\n// reg_1d0\n#define CODEC_CODEC_ADC_DRE_ENABLE_CH2          (1 << 0)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH2(n)    (((n) & 0x3) << 1)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH2_MASK  (0x3 << 1)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH2_SHIFT (1)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH2(n) (((n) & 0xF) << 3)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH2_MASK (0xF << 3)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH2_SHIFT (3)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH2(n) (((n) & 0xF) << 7)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH2_MASK (0xF << 7)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH2_SHIFT (7)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH2(n)    (((n) & 0x7) << 11)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH2_MASK  (0x7 << 11)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH2_SHIFT (11)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH2(n)    (((n) & 0x1F) << 14)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH2_MASK  (0x1F << 14)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH2_SHIFT (14)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_SIGN_CH2 (1 << 19)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH2(n)      (((n) & 0x3) << 20)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH2_MASK    (0x3 << 20)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH2_SHIFT   (20)\n#define CODEC_CODEC_ADC_DRE_OVERFLOW_MUTE_EN_CH2 (1 << 22)\n#define CODEC_CODEC_ADC_DRE_MUTE_MODE_CH2       (1 << 23)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH2(n) (((n) & 0x3) << 24)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH2_MASK (0x3 << 24)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH2_SHIFT (24)\n#define CODEC_CODEC_ADC_DRE_MUTE_STATUS_CH2     (1 << 26)\n\n// reg_1d4\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH2(n)     (((n) & 0x7FF) << 0)\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH2_MASK   (0x7FF << 0)\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH2_SHIFT  (0)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH2(n)       (((n) & 0xFFFFF) << 11)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH2_MASK     (0xFFFFF << 11)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH2_SHIFT    (11)\n\n// reg_1d8\n#define CODEC_CODEC_ADC_DRE_ENABLE_CH3          (1 << 0)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH3(n)    (((n) & 0x3) << 1)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH3_MASK  (0x3 << 1)\n#define CODEC_CODEC_ADC_DRE_STEP_MODE_CH3_SHIFT (1)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH3(n) (((n) & 0xF) << 3)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH3_MASK (0xF << 3)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_CH3_SHIFT (3)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH3(n) (((n) & 0xF) << 7)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH3_MASK (0xF << 7)\n#define CODEC_CODEC_ADC_DRE_INI_ANA_GAIN_CH3_SHIFT (7)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH3(n)    (((n) & 0x7) << 11)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH3_MASK  (0x7 << 11)\n#define CODEC_CODEC_ADC_DRE_DELAY_DIG_CH3_SHIFT (11)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH3(n)    (((n) & 0x1F) << 14)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH3_MASK  (0x1F << 14)\n#define CODEC_CODEC_ADC_DRE_DELAY_ANA_CH3_SHIFT (14)\n#define CODEC_CODEC_ADC_DRE_THD_DB_OFFSET_SIGN_CH3 (1 << 19)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH3(n)      (((n) & 0x3) << 20)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH3_MASK    (0x3 << 20)\n#define CODEC_CODEC_ADC_DRE_BIT_SEL_CH3_SHIFT   (20)\n#define CODEC_CODEC_ADC_DRE_OVERFLOW_MUTE_EN_CH3 (1 << 22)\n#define CODEC_CODEC_ADC_DRE_MUTE_MODE_CH3       (1 << 23)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH3(n) (((n) & 0x3) << 24)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH3_MASK (0x3 << 24)\n#define CODEC_CODEC_ADC_DRE_MUTE_RANGE_SEL_CH3_SHIFT (24)\n#define CODEC_CODEC_ADC_DRE_MUTE_STATUS_CH3     (1 << 26)\n\n// reg_1dc\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH3(n)     (((n) & 0x7FF) << 0)\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH3_MASK   (0x7FF << 0)\n#define CODEC_CODEC_ADC_DRE_AMP_HIGH_CH3_SHIFT  (0)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH3(n)       (((n) & 0xFFFFF) << 11)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH3_MASK     (0xFFFFF << 11)\n#define CODEC_CODEC_ADC_DRE_WINDOW_CH3_SHIFT    (11)\n\n// reg_1e0\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP0_CH0(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP0_CH0_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP0_CH0_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP1_CH0(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP1_CH0_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP1_CH0_SHIFT (14)\n\n// reg_1e4\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP2_CH0(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP2_CH0_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP2_CH0_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP3_CH0(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP3_CH0_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP3_CH0_SHIFT (14)\n\n// reg_1e8\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP4_CH0(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP4_CH0_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP4_CH0_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP5_CH0(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP5_CH0_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP5_CH0_SHIFT (14)\n\n// reg_1ec\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP6_CH0(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP6_CH0_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP6_CH0_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP7_CH0(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP7_CH0_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP7_CH0_SHIFT (14)\n\n// reg_1f0\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP8_CH0(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP8_CH0_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP8_CH0_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP9_CH0(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP9_CH0_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP9_CH0_SHIFT (14)\n\n// reg_1f4\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP10_CH0(n)  (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP10_CH0_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP10_CH0_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP11_CH0(n)  (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP11_CH0_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP11_CH0_SHIFT (14)\n\n// reg_1f8\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP12_CH0(n)  (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP12_CH0_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP12_CH0_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP13_CH0(n)  (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP13_CH0_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP13_CH0_SHIFT (14)\n\n// reg_1fc\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP14_CH0(n)  (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP14_CH0_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP14_CH0_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP15_CH0(n)  (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP15_CH0_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP15_CH0_SHIFT (14)\n\n// reg_200\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP0_CH1(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP0_CH1_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP0_CH1_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP1_CH1(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP1_CH1_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP1_CH1_SHIFT (14)\n\n// reg_204\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP2_CH1(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP2_CH1_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP2_CH1_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP3_CH1(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP3_CH1_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP3_CH1_SHIFT (14)\n\n// reg_208\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP4_CH1(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP4_CH1_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP4_CH1_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP5_CH1(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP5_CH1_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP5_CH1_SHIFT (14)\n\n// reg_20c\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP6_CH1(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP6_CH1_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP6_CH1_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP7_CH1(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP7_CH1_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP7_CH1_SHIFT (14)\n\n// reg_210\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP8_CH1(n)   (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP8_CH1_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP8_CH1_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP9_CH1(n)   (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP9_CH1_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP9_CH1_SHIFT (14)\n\n// reg_214\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP10_CH1(n)  (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP10_CH1_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP10_CH1_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP11_CH1(n)  (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP11_CH1_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP11_CH1_SHIFT (14)\n\n// reg_218\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP12_CH1(n)  (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP12_CH1_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP12_CH1_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP13_CH1(n)  (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP13_CH1_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP13_CH1_SHIFT (14)\n\n// reg_21c\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP14_CH1(n)  (((n) & 0x3FFF) << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP14_CH1_MASK (0x3FFF << 0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP14_CH1_SHIFT (0)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP15_CH1(n)  (((n) & 0x3FFF) << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP15_CH1_MASK (0x3FFF << 14)\n#define CODEC_CODEC_ADC_DRE_GAIN_STEP15_CH1_SHIFT (14)\n\n// reg_220\n#define CODEC_VAD_DELAY1(n)                     (((n) & 0x3FF) << 0)\n#define CODEC_VAD_DELAY1_MASK                   (0x3FF << 0)\n#define CODEC_VAD_DELAY1_SHIFT                  (0)\n\n// reg_224\n#define CODEC_VAD_DELAY2(n)                     (((n) & 0xFFFFFF) << 0)\n#define CODEC_VAD_DELAY2_MASK                   (0xFFFFFF << 0)\n#define CODEC_VAD_DELAY2_SHIFT                  (0)\n\n// reg_228\n#define CODEC_CODEC_MC_ENABLE_CH0               (1 << 0)\n#define CODEC_CODEC_MC_SEL_CH0                  (1 << 1)\n#define CODEC_CODEC_DOWN_SEL_MC_CH0(n)          (((n) & 0x3) << 2)\n#define CODEC_CODEC_DOWN_SEL_MC_CH0_MASK        (0x3 << 2)\n#define CODEC_CODEC_DOWN_SEL_MC_CH0_SHIFT       (2)\n#define CODEC_CODEC_MC_SINC_BYPASS_CH0          (1 << 4)\n#define CODEC_CODEC_MC_ENABLE_CH1               (1 << 5)\n#define CODEC_CODEC_MC_SEL_CH1                  (1 << 6)\n#define CODEC_CODEC_DOWN_SEL_MC_CH1(n)          (((n) & 0x3) << 7)\n#define CODEC_CODEC_DOWN_SEL_MC_CH1_MASK        (0x3 << 7)\n#define CODEC_CODEC_DOWN_SEL_MC_CH1_SHIFT       (7)\n#define CODEC_CODEC_MC_SINC_BYPASS_CH1          (1 << 9)\n#define CODEC_CODEC_RESAMPLE_MC_ENABLE          (1 << 10)\n#define CODEC_CODEC_RESAMPLE_MC_DUAL_CH         (1 << 11)\n\n// reg_22c\n#define CODEC_CODEC_TT_ENABLE                   (1 << 0)\n#define CODEC_CODEC_MUTE_GAIN_COEF_TT(n)        (((n) & 0xFFF) << 1)\n#define CODEC_CODEC_MUTE_GAIN_COEF_TT_MASK      (0xFFF << 1)\n#define CODEC_CODEC_MUTE_GAIN_COEF_TT_SHIFT     (1)\n#define CODEC_CODEC_MUTE_GAIN_PASS0_TT          (1 << 13)\n#define CODEC_CODEC_MM_ENABLE                   (1 << 14)\n#define CODEC_CODEC_MUTE_GAIN_COEF_MM(n)        (((n) & 0xFFF) << 15)\n#define CODEC_CODEC_MUTE_GAIN_COEF_MM_MASK      (0xFFF << 15)\n#define CODEC_CODEC_MUTE_GAIN_COEF_MM_SHIFT     (15)\n#define CODEC_CODEC_MUTE_GAIN_PASS0_MM          (1 << 27)\n\n// reg_230\n#define CODEC_CODEC_MM_FIFO_EN                  (1 << 0)\n#define CODEC_CODEC_MM_FIFO_BYPASS              (1 << 1)\n#define CODEC_CODEC_MM_DELAY_UPDATE             (1 << 2)\n#define CODEC_CODEC_MM_DELAY(n)                 (((n) & 0x1F) << 3)\n#define CODEC_CODEC_MM_DELAY_MASK               (0x1F << 3)\n#define CODEC_CODEC_MM_DELAY_SHIFT              (3)\n#define CODEC_VAD_EXT_EN                        (1 << 8)\n#define CODEC_VAD_SRC_SEL                       (1 << 9)\n#define CODEC_VAD_DATA_EXT_SWAP                 (1 << 10)\n#define CODEC_MC_EN_SEL                         (1 << 11)\n#define CODEC_MC_RATE_SRC_SEL                   (1 << 12)\n\n#endif\n"
  },
  {
    "path": "platform/hal/best2300p/reg_iomux_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_IOMUX_BEST2300P_H_\n#define __REG_IOMUX_BEST2300P_H_\n\n#include \"plat_types.h\"\n\nstruct IOMUX_T {\n    __IO uint32_t REG_000;\n    __IO uint32_t REG_004;\n    __IO uint32_t REG_008;\n    __IO uint32_t REG_00C;\n    __IO uint32_t REG_010;\n    __IO uint32_t REG_014;\n    __IO uint32_t REG_018;\n    __IO uint32_t REG_01C;\n    __IO uint32_t REG_020;\n    __IO uint32_t REG_024;\n    __IO uint32_t REG_028;\n    __IO uint32_t REG_02C;\n    __IO uint32_t REG_030;\n    __IO uint32_t REG_034;\n    __IO uint32_t REG_038;\n    __IO uint32_t REG_03C;\n    __IO uint32_t REG_040;\n    __IO uint32_t REG_044;\n    __IO uint32_t REG_048;\n    __IO uint32_t REG_04C;\n    __IO uint32_t REG_050;\n    __IO uint32_t REG_054;\n    __IO uint32_t REG_058;\n    __IO uint32_t REG_05C;\n    __IO uint32_t REG_060;\n    __IO uint32_t REG_064;\n    __IO uint32_t REG_068;\n    __IO uint32_t REG_06C;\n    __IO uint32_t REG_070;\n    __IO uint32_t REG_074;\n    __IO uint32_t REG_078;\n};\n\n// reg_00\n#define IOMUX_32_H00001300(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define IOMUX_32_H00001300_MASK                 (0xFFFFFFFF << 0)\n#define IOMUX_32_H00001300_SHIFT                (0)\n\n// reg_04\n#define IOMUX_GPIO_P00_SEL(n)                   (((n) & 0xF) << 0)\n#define IOMUX_GPIO_P00_SEL_MASK                 (0xF << 0)\n#define IOMUX_GPIO_P00_SEL_SHIFT                (0)\n#define IOMUX_GPIO_P01_SEL(n)                   (((n) & 0xF) << 4)\n#define IOMUX_GPIO_P01_SEL_MASK                 (0xF << 4)\n#define IOMUX_GPIO_P01_SEL_SHIFT                (4)\n#define IOMUX_GPIO_P02_SEL(n)                   (((n) & 0xF) << 8)\n#define IOMUX_GPIO_P02_SEL_MASK                 (0xF << 8)\n#define IOMUX_GPIO_P02_SEL_SHIFT                (8)\n#define IOMUX_GPIO_P03_SEL(n)                   (((n) & 0xF) << 12)\n#define IOMUX_GPIO_P03_SEL_MASK                 (0xF << 12)\n#define IOMUX_GPIO_P03_SEL_SHIFT                (12)\n#define IOMUX_GPIO_P04_SEL(n)                   (((n) & 0xF) << 16)\n#define IOMUX_GPIO_P04_SEL_MASK                 (0xF << 16)\n#define IOMUX_GPIO_P04_SEL_SHIFT                (16)\n#define IOMUX_GPIO_P05_SEL(n)                   (((n) & 0xF) << 20)\n#define IOMUX_GPIO_P05_SEL_MASK                 (0xF << 20)\n#define IOMUX_GPIO_P05_SEL_SHIFT                (20)\n#define IOMUX_GPIO_P06_SEL(n)                   (((n) & 0xF) << 24)\n#define IOMUX_GPIO_P06_SEL_MASK                 (0xF << 24)\n#define IOMUX_GPIO_P06_SEL_SHIFT                (24)\n#define IOMUX_GPIO_P07_SEL(n)                   (((n) & 0xF) << 28)\n#define IOMUX_GPIO_P07_SEL_MASK                 (0xF << 28)\n#define IOMUX_GPIO_P07_SEL_SHIFT                (28)\n\n// reg_08\n#define IOMUX_GPIO_P10_SEL(n)                   (((n) & 0xF) << 0)\n#define IOMUX_GPIO_P10_SEL_MASK                 (0xF << 0)\n#define IOMUX_GPIO_P10_SEL_SHIFT                (0)\n#define IOMUX_GPIO_P11_SEL(n)                   (((n) & 0xF) << 4)\n#define IOMUX_GPIO_P11_SEL_MASK                 (0xF << 4)\n#define IOMUX_GPIO_P11_SEL_SHIFT                (4)\n#define IOMUX_GPIO_P12_SEL(n)                   (((n) & 0xF) << 8)\n#define IOMUX_GPIO_P12_SEL_MASK                 (0xF << 8)\n#define IOMUX_GPIO_P12_SEL_SHIFT                (8)\n#define IOMUX_GPIO_P13_SEL(n)                   (((n) & 0xF) << 12)\n#define IOMUX_GPIO_P13_SEL_MASK                 (0xF << 12)\n#define IOMUX_GPIO_P13_SEL_SHIFT                (12)\n#define IOMUX_GPIO_P14_SEL(n)                   (((n) & 0xF) << 16)\n#define IOMUX_GPIO_P14_SEL_MASK                 (0xF << 16)\n#define IOMUX_GPIO_P14_SEL_SHIFT                (16)\n#define IOMUX_GPIO_P15_SEL(n)                   (((n) & 0xF) << 20)\n#define IOMUX_GPIO_P15_SEL_MASK                 (0xF << 20)\n#define IOMUX_GPIO_P15_SEL_SHIFT                (20)\n#define IOMUX_GPIO_P16_SEL(n)                   (((n) & 0xF) << 24)\n#define IOMUX_GPIO_P16_SEL_MASK                 (0xF << 24)\n#define IOMUX_GPIO_P16_SEL_SHIFT                (24)\n#define IOMUX_GPIO_P17_SEL(n)                   (((n) & 0xF) << 28)\n#define IOMUX_GPIO_P17_SEL_MASK                 (0xF << 28)\n#define IOMUX_GPIO_P17_SEL_SHIFT                (28)\n\n// reg_0c\n#define IOMUX_GPIO_P20_SEL(n)                   (((n) & 0xF) << 0)\n#define IOMUX_GPIO_P20_SEL_MASK                 (0xF << 0)\n#define IOMUX_GPIO_P20_SEL_SHIFT                (0)\n#define IOMUX_GPIO_P21_SEL(n)                   (((n) & 0xF) << 4)\n#define IOMUX_GPIO_P21_SEL_MASK                 (0xF << 4)\n#define IOMUX_GPIO_P21_SEL_SHIFT                (4)\n#define IOMUX_GPIO_P22_SEL(n)                   (((n) & 0xF) << 8)\n#define IOMUX_GPIO_P22_SEL_MASK                 (0xF << 8)\n#define IOMUX_GPIO_P22_SEL_SHIFT                (8)\n#define IOMUX_GPIO_P23_SEL(n)                   (((n) & 0xF) << 12)\n#define IOMUX_GPIO_P23_SEL_MASK                 (0xF << 12)\n#define IOMUX_GPIO_P23_SEL_SHIFT                (12)\n#define IOMUX_GPIO_P24_SEL(n)                   (((n) & 0xF) << 16)\n#define IOMUX_GPIO_P24_SEL_MASK                 (0xF << 16)\n#define IOMUX_GPIO_P24_SEL_SHIFT                (16)\n#define IOMUX_GPIO_P25_SEL(n)                   (((n) & 0xF) << 20)\n#define IOMUX_GPIO_P25_SEL_MASK                 (0xF << 20)\n#define IOMUX_GPIO_P25_SEL_SHIFT                (20)\n#define IOMUX_GPIO_P26_SEL(n)                   (((n) & 0xF) << 24)\n#define IOMUX_GPIO_P26_SEL_MASK                 (0xF << 24)\n#define IOMUX_GPIO_P26_SEL_SHIFT                (24)\n#define IOMUX_GPIO_P27_SEL(n)                   (((n) & 0xF) << 28)\n#define IOMUX_GPIO_P27_SEL_MASK                 (0xF << 28)\n#define IOMUX_GPIO_P27_SEL_SHIFT                (28)\n\n// reg_10\n#define IOMUX_GPIO_P30_SEL(n)                   (((n) & 0xF) << 0)\n#define IOMUX_GPIO_P30_SEL_MASK                 (0xF << 0)\n#define IOMUX_GPIO_P30_SEL_SHIFT                (0)\n#define IOMUX_GPIO_P31_SEL(n)                   (((n) & 0xF) << 4)\n#define IOMUX_GPIO_P31_SEL_MASK                 (0xF << 4)\n#define IOMUX_GPIO_P31_SEL_SHIFT                (4)\n#define IOMUX_GPIO_P32_SEL(n)                   (((n) & 0xF) << 8)\n#define IOMUX_GPIO_P32_SEL_MASK                 (0xF << 8)\n#define IOMUX_GPIO_P32_SEL_SHIFT                (8)\n#define IOMUX_GPIO_P33_SEL(n)                   (((n) & 0xF) << 12)\n#define IOMUX_GPIO_P33_SEL_MASK                 (0xF << 12)\n#define IOMUX_GPIO_P33_SEL_SHIFT                (12)\n#define IOMUX_GPIO_P34_SEL(n)                   (((n) & 0xF) << 16)\n#define IOMUX_GPIO_P34_SEL_MASK                 (0xF << 16)\n#define IOMUX_GPIO_P34_SEL_SHIFT                (16)\n#define IOMUX_GPIO_P35_SEL(n)                   (((n) & 0xF) << 20)\n#define IOMUX_GPIO_P35_SEL_MASK                 (0xF << 20)\n#define IOMUX_GPIO_P35_SEL_SHIFT                (20)\n#define IOMUX_GPIO_P36_SEL(n)                   (((n) & 0xF) << 24)\n#define IOMUX_GPIO_P36_SEL_MASK                 (0xF << 24)\n#define IOMUX_GPIO_P36_SEL_SHIFT                (24)\n#define IOMUX_GPIO_P37_SEL(n)                   (((n) & 0xF) << 28)\n#define IOMUX_GPIO_P37_SEL_MASK                 (0xF << 28)\n#define IOMUX_GPIO_P37_SEL_SHIFT                (28)\n\n// reg_14\n#define IOMUX_ANA_TEST_DIR(n)                   (((n) & 0xFFFFFFFF) << 0)\n#define IOMUX_ANA_TEST_DIR_MASK                 (0xFFFFFFFF << 0)\n#define IOMUX_ANA_TEST_DIR_SHIFT                (0)\n\n// reg_18\n#define IOMUX_ANA_TEST_SEL(n)                   (((n) & 0xF) << 0)\n#define IOMUX_ANA_TEST_SEL_MASK                 (0xF << 0)\n#define IOMUX_ANA_TEST_SEL_SHIFT                (0)\n\n// reg_1c\n#define IOMUX_RESERVED(n)                       (((n) & 0xFFFFFFFF) << 0)\n#define IOMUX_RESERVED_MASK                     (0xFFFFFFFF << 0)\n#define IOMUX_RESERVED_SHIFT                    (0)\n\n// reg_20\n#define IOMUX_RESERVED2(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define IOMUX_RESERVED2_MASK                    (0xFFFFFFFF << 0)\n#define IOMUX_RESERVED2_SHIFT                   (0)\n\n// reg_24\n#define IOMUX_RESERVED3(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define IOMUX_RESERVED3_MASK                    (0xFFFFFFFF << 0)\n#define IOMUX_RESERVED3_SHIFT                   (0)\n\n// reg_28\n#define IOMUX_RESERVED4(n)                      (((n) & 0xFFFFFFFF) << 0)\n#define IOMUX_RESERVED4_MASK                    (0xFFFFFFFF << 0)\n#define IOMUX_RESERVED4_SHIFT                   (0)\n\n// reg_2c\n#define IOMUX_R_GPIO_P0_PU(n)                   (((n) & 0xFF) << 0)\n#define IOMUX_R_GPIO_P0_PU_MASK                 (0xFF << 0)\n#define IOMUX_R_GPIO_P0_PU_SHIFT                (0)\n#define IOMUX_R_GPIO_P1_PU(n)                   (((n) & 0xFF) << 8)\n#define IOMUX_R_GPIO_P1_PU_MASK                 (0xFF << 8)\n#define IOMUX_R_GPIO_P1_PU_SHIFT                (8)\n#define IOMUX_R_GPIO_P2_PU(n)                   (((n) & 0xFF) << 16)\n#define IOMUX_R_GPIO_P2_PU_MASK                 (0xFF << 16)\n#define IOMUX_R_GPIO_P2_PU_SHIFT                (16)\n#define IOMUX_R_GPIO_P3_PU(n)                   (((n) & 0xFF) << 24)\n#define IOMUX_R_GPIO_P3_PU_MASK                 (0xFF << 24)\n#define IOMUX_R_GPIO_P3_PU_SHIFT                (24)\n\n// reg_30\n#define IOMUX_R_GPIO_P0_PD(n)                   (((n) & 0xFF) << 0)\n#define IOMUX_R_GPIO_P0_PD_MASK                 (0xFF << 0)\n#define IOMUX_R_GPIO_P0_PD_SHIFT                (0)\n#define IOMUX_R_GPIO_P1_PD(n)                   (((n) & 0xFF) << 8)\n#define IOMUX_R_GPIO_P1_PD_MASK                 (0xFF << 8)\n#define IOMUX_R_GPIO_P1_PD_SHIFT                (8)\n#define IOMUX_R_GPIO_P2_PD(n)                   (((n) & 0xFF) << 16)\n#define IOMUX_R_GPIO_P2_PD_MASK                 (0xFF << 16)\n#define IOMUX_R_GPIO_P2_PD_SHIFT                (16)\n#define IOMUX_R_GPIO_P3_PD(n)                   (((n) & 0xFF) << 24)\n#define IOMUX_R_GPIO_P3_PD_MASK                 (0xFF << 24)\n#define IOMUX_R_GPIO_P3_PD_SHIFT                (24)\n\n// reg_34\n#define IOMUX_AGPIO_EN(n)                       (((n) & 0xFFFFFFFF) << 0)\n#define IOMUX_AGPIO_EN_MASK                     (0xFFFFFFFF << 0)\n#define IOMUX_AGPIO_EN_SHIFT                    (0)\n\n// reg_38\n#define IOMUX_MCUIO_DB_ACTIVE(n)                (((n) & 0xFFFFFFFF) << 0)\n#define IOMUX_MCUIO_DB_ACTIVE_MASK              (0xFFFFFFFF << 0)\n#define IOMUX_MCUIO_DB_ACTIVE_SHIFT             (0)\n\n// reg_3c\n#define IOMUX_MCUIO_DB_VALUE(n)                 (((n) & 0xFF) << 0)\n#define IOMUX_MCUIO_DB_VALUE_MASK               (0xFF << 0)\n#define IOMUX_MCUIO_DB_VALUE_SHIFT              (0)\n#define IOMUX_PWK_DB_VALUE(n)                   (((n) & 0xFF) << 8)\n#define IOMUX_PWK_DB_VALUE_MASK                 (0xFF << 8)\n#define IOMUX_PWK_DB_VALUE_SHIFT                (8)\n#define IOMUX_PWK_DB_ACTIVE                     (1 << 16)\n\n// reg_40\n#define IOMUX_POWER_KEY_ON_INT_STATUS           (1 << 0)\n#define IOMUX_POWER_KEY_OFF_INT_STATUS          (1 << 1)\n#define IOMUX_R_POWER_KEY_INTR_U                (1 << 2)\n#define IOMUX_R_POWER_KEY_INTR_D                (1 << 3)\n#define IOMUX_POWER_KEY_ON_INT_EN               (1 << 4)\n#define IOMUX_POWER_KEY_OFF_INT_EN              (1 << 5)\n#define IOMUX_POWER_KEY_ON_INT_MSK              (1 << 6)\n#define IOMUX_POWER_KEY_OFF_INT_MSK             (1 << 7)\n#define IOMUX_POWER_KEY_DB                      (1 << 30)\n#define IOMUX_POWER_ON_FEEDOUT                  (1 << 31)\n\n// reg_44\n#define IOMUX_BT_SPI_RF_ENABLE                  (1 << 0)\n#define IOMUX_BT_SPI_PMU_ENABLE                 (1 << 1)\n#define IOMUX_BT_SPI_ANA_ENABLE                 (1 << 2)\n#define IOMUX_MCU_APB_SPI_RF_ENABLE             (1 << 3)\n#define IOMUX_MCU_APB_SPI_PMU_ENABLE            (1 << 4)\n#define IOMUX_MCU_APB_SPI_ANA_ENABLE            (1 << 5)\n\n// reg_50\n#define IOMUX_GPIO_I2C_MODE                     (1 << 0)\n#define IOMUX_I2C0_M_SEL_GPIO                   (1 << 1)\n#define IOMUX_GPIO_PCM_MODE                     (1 << 2)\n#define IOMUX_BT_RXTX_SW_EN                     (1 << 3)\n#define IOMUX_I2C1_M_SEL_GPIO                   (1 << 4)\n#define IOMUX_SPILCD0_WM3                       (1 << 5)\n#define IOMUX_SPILCD1_WM3                       (1 << 6)\n#define IOMUX_CFG_EN_CLK_REQIN                  (1 << 7)\n#define IOMUX_CFG_POL_CLK_REQIN                 (1 << 8)\n#define IOMUX_CFG_EN_CLK_REQOUT                 (1 << 9)\n#define IOMUX_CFG_POL_CLK_REQOUT                (1 << 10)\n#define IOMUX_BT_UART_HALFN                     (1 << 11)\n#define IOMUX_UART0_HALFN                       (1 << 12)\n#define IOMUX_UART1_HALFN                       (1 << 13)\n#define IOMUX_UART2_HALFN                       (1 << 14)\n\n// reg_54\n#define IOMUX_CFG_GPIO_OENB_P0_POL(n)           (((n) & 0xFF) << 0)\n#define IOMUX_CFG_GPIO_OENB_P0_POL_MASK         (0xFF << 0)\n#define IOMUX_CFG_GPIO_OENB_P0_POL_SHIFT        (0)\n#define IOMUX_CFG_GPIO_OENB_P1_POL(n)           (((n) & 0xFF) << 8)\n#define IOMUX_CFG_GPIO_OENB_P1_POL_MASK         (0xFF << 8)\n#define IOMUX_CFG_GPIO_OENB_P1_POL_SHIFT        (8)\n#define IOMUX_CFG_GPIO_OENB_P2_POL(n)           (((n) & 0xFF) << 16)\n#define IOMUX_CFG_GPIO_OENB_P2_POL_MASK         (0xFF << 16)\n#define IOMUX_CFG_GPIO_OENB_P2_POL_SHIFT        (16)\n#define IOMUX_CFG_GPIO_OENB_P3_POL(n)           (((n) & 0xFF) << 24)\n#define IOMUX_CFG_GPIO_OENB_P3_POL_MASK         (0xFF << 24)\n#define IOMUX_CFG_GPIO_OENB_P3_POL_SHIFT        (24)\n\n// reg_64\n#define IOMUX_CFG_CODEC_TRIG_SEL(n)             (((n) & 0x3F) << 0)\n#define IOMUX_CFG_CODEC_TRIG_SEL_MASK           (0x3F << 0)\n#define IOMUX_CFG_CODEC_TRIG_SEL_SHIFT          (0)\n#define IOMUX_CFG_CODEC_TRIG_POL                (1 << 6)\n\n// reg_70\n#define IOMUX_GPIO_P1_RXHZ_EN(n)                (((n) & 0xFF) << 0)\n#define IOMUX_GPIO_P1_RXHZ_EN_MASK              (0xFF << 0)\n#define IOMUX_GPIO_P1_RXHZ_EN_SHIFT             (0)\n#define IOMUX_GPIO_P1_PWS(n)                    (((n) & 0x3) << 8)\n#define IOMUX_GPIO_P1_PWS_MASK                  (0x3 << 8)\n#define IOMUX_GPIO_P1_PWS_SHIFT                 (8)\n\n// reg_74\n#define IOMUX_GPIO_P0_DRV0_SEL(n)               (((n) & 0x3) << 0)\n#define IOMUX_GPIO_P0_DRV0_SEL_MASK             (0x3 << 0)\n#define IOMUX_GPIO_P0_DRV0_SEL_SHIFT            (0)\n#define IOMUX_GPIO_P0_DRV1_SEL(n)               (((n) & 0x3) << 2)\n#define IOMUX_GPIO_P0_DRV1_SEL_MASK             (0x3 << 2)\n#define IOMUX_GPIO_P0_DRV1_SEL_SHIFT            (2)\n#define IOMUX_GPIO_P0_DRV2_SEL(n)               (((n) & 0x3) << 4)\n#define IOMUX_GPIO_P0_DRV2_SEL_MASK             (0x3 << 4)\n#define IOMUX_GPIO_P0_DRV2_SEL_SHIFT            (4)\n#define IOMUX_GPIO_P0_DRV3_SEL(n)               (((n) & 0x3) << 6)\n#define IOMUX_GPIO_P0_DRV3_SEL_MASK             (0x3 << 6)\n#define IOMUX_GPIO_P0_DRV3_SEL_SHIFT            (6)\n#define IOMUX_GPIO_P0_DRV4_SEL(n)               (((n) & 0x3) << 8)\n#define IOMUX_GPIO_P0_DRV4_SEL_MASK             (0x3 << 8)\n#define IOMUX_GPIO_P0_DRV4_SEL_SHIFT            (8)\n#define IOMUX_GPIO_P0_DRV5_SEL(n)               (((n) & 0x3) << 10)\n#define IOMUX_GPIO_P0_DRV5_SEL_MASK             (0x3 << 10)\n#define IOMUX_GPIO_P0_DRV5_SEL_SHIFT            (10)\n#define IOMUX_GPIO_P0_DRV6_SEL(n)               (((n) & 0x3) << 12)\n#define IOMUX_GPIO_P0_DRV6_SEL_MASK             (0x3 << 12)\n#define IOMUX_GPIO_P0_DRV6_SEL_SHIFT            (12)\n#define IOMUX_GPIO_P0_DRV7_SEL(n)               (((n) & 0x3) << 14)\n#define IOMUX_GPIO_P0_DRV7_SEL_MASK             (0x3 << 14)\n#define IOMUX_GPIO_P0_DRV7_SEL_SHIFT            (14)\n#define IOMUX_GPIO_P1_DRV0_SEL(n)               (((n) & 0x3) << 16)\n#define IOMUX_GPIO_P1_DRV0_SEL_MASK             (0x3 << 16)\n#define IOMUX_GPIO_P1_DRV0_SEL_SHIFT            (16)\n#define IOMUX_GPIO_P1_DRV1_SEL(n)               (((n) & 0x3) << 18)\n#define IOMUX_GPIO_P1_DRV1_SEL_MASK             (0x3 << 18)\n#define IOMUX_GPIO_P1_DRV1_SEL_SHIFT            (18)\n#define IOMUX_GPIO_P1_DRV2_SEL(n)               (((n) & 0x3) << 20)\n#define IOMUX_GPIO_P1_DRV2_SEL_MASK             (0x3 << 20)\n#define IOMUX_GPIO_P1_DRV2_SEL_SHIFT            (20)\n#define IOMUX_GPIO_P1_DRV3_SEL(n)               (((n) & 0x3) << 22)\n#define IOMUX_GPIO_P1_DRV3_SEL_MASK             (0x3 << 22)\n#define IOMUX_GPIO_P1_DRV3_SEL_SHIFT            (22)\n#define IOMUX_GPIO_P1_DRV4_SEL(n)               (((n) & 0x3) << 24)\n#define IOMUX_GPIO_P1_DRV4_SEL_MASK             (0x3 << 24)\n#define IOMUX_GPIO_P1_DRV4_SEL_SHIFT            (24)\n#define IOMUX_GPIO_P1_DRV5_SEL(n)               (((n) & 0x3) << 26)\n#define IOMUX_GPIO_P1_DRV5_SEL_MASK             (0x3 << 26)\n#define IOMUX_GPIO_P1_DRV5_SEL_SHIFT            (26)\n#define IOMUX_GPIO_P1_DRV6_SEL(n)               (((n) & 0x3) << 28)\n#define IOMUX_GPIO_P1_DRV6_SEL_MASK             (0x3 << 28)\n#define IOMUX_GPIO_P1_DRV6_SEL_SHIFT            (28)\n#define IOMUX_GPIO_P1_DRV7_SEL(n)               (((n) & 0x3) << 30)\n#define IOMUX_GPIO_P1_DRV7_SEL_MASK             (0x3 << 30)\n#define IOMUX_GPIO_P1_DRV7_SEL_SHIFT            (30)\n\n// reg_78\n#define IOMUX_GPIO_P2_DRV0_SEL(n)               (((n) & 0x3) << 0)\n#define IOMUX_GPIO_P2_DRV0_SEL_MASK             (0x3 << 0)\n#define IOMUX_GPIO_P2_DRV0_SEL_SHIFT            (0)\n#define IOMUX_GPIO_P2_DRV1_SEL(n)               (((n) & 0x3) << 2)\n#define IOMUX_GPIO_P2_DRV1_SEL_MASK             (0x3 << 2)\n#define IOMUX_GPIO_P2_DRV1_SEL_SHIFT            (2)\n#define IOMUX_GPIO_P2_DRV2_SEL(n)               (((n) & 0x3) << 4)\n#define IOMUX_GPIO_P2_DRV2_SEL_MASK             (0x3 << 4)\n#define IOMUX_GPIO_P2_DRV2_SEL_SHIFT            (4)\n#define IOMUX_GPIO_P2_DRV3_SEL(n)               (((n) & 0x3) << 6)\n#define IOMUX_GPIO_P2_DRV3_SEL_MASK             (0x3 << 6)\n#define IOMUX_GPIO_P2_DRV3_SEL_SHIFT            (6)\n#define IOMUX_GPIO_P2_DRV4_SEL(n)               (((n) & 0x3) << 8)\n#define IOMUX_GPIO_P2_DRV4_SEL_MASK             (0x3 << 8)\n#define IOMUX_GPIO_P2_DRV4_SEL_SHIFT            (8)\n#define IOMUX_GPIO_P2_DRV5_SEL(n)               (((n) & 0x3) << 10)\n#define IOMUX_GPIO_P2_DRV5_SEL_MASK             (0x3 << 10)\n#define IOMUX_GPIO_P2_DRV5_SEL_SHIFT            (10)\n#define IOMUX_GPIO_P2_DRV6_SEL(n)               (((n) & 0x3) << 12)\n#define IOMUX_GPIO_P2_DRV6_SEL_MASK             (0x3 << 12)\n#define IOMUX_GPIO_P2_DRV6_SEL_SHIFT            (12)\n#define IOMUX_GPIO_P2_DRV7_SEL(n)               (((n) & 0x3) << 14)\n#define IOMUX_GPIO_P2_DRV7_SEL_MASK             (0x3 << 14)\n#define IOMUX_GPIO_P2_DRV7_SEL_SHIFT            (14)\n#define IOMUX_GPIO_P3_DRV0_SEL(n)               (((n) & 0x3) << 16)\n#define IOMUX_GPIO_P3_DRV0_SEL_MASK             (0x3 << 16)\n#define IOMUX_GPIO_P3_DRV0_SEL_SHIFT            (16)\n#define IOMUX_GPIO_P3_DRV1_SEL(n)               (((n) & 0x3) << 18)\n#define IOMUX_GPIO_P3_DRV1_SEL_MASK             (0x3 << 18)\n#define IOMUX_GPIO_P3_DRV1_SEL_SHIFT            (18)\n#define IOMUX_GPIO_P3_DRV2_SEL(n)               (((n) & 0x3) << 20)\n#define IOMUX_GPIO_P3_DRV2_SEL_MASK             (0x3 << 20)\n#define IOMUX_GPIO_P3_DRV2_SEL_SHIFT            (20)\n#define IOMUX_GPIO_P3_DRV3_SEL(n)               (((n) & 0x3) << 22)\n#define IOMUX_GPIO_P3_DRV3_SEL_MASK             (0x3 << 22)\n#define IOMUX_GPIO_P3_DRV3_SEL_SHIFT            (22)\n#define IOMUX_GPIO_P3_DRV4_SEL(n)               (((n) & 0x3) << 24)\n#define IOMUX_GPIO_P3_DRV4_SEL_MASK             (0x3 << 24)\n#define IOMUX_GPIO_P3_DRV4_SEL_SHIFT            (24)\n#define IOMUX_GPIO_P3_DRV5_SEL(n)               (((n) & 0x3) << 26)\n#define IOMUX_GPIO_P3_DRV5_SEL_MASK             (0x3 << 26)\n#define IOMUX_GPIO_P3_DRV5_SEL_SHIFT            (26)\n#define IOMUX_GPIO_P3_DRV6_SEL(n)               (((n) & 0x3) << 28)\n#define IOMUX_GPIO_P3_DRV6_SEL_MASK             (0x3 << 28)\n#define IOMUX_GPIO_P3_DRV6_SEL_SHIFT            (28)\n#define IOMUX_GPIO_P3_DRV7_SEL(n)               (((n) & 0x3) << 30)\n#define IOMUX_GPIO_P3_DRV7_SEL_MASK             (0x3 << 30)\n#define IOMUX_GPIO_P3_DRV7_SEL_SHIFT            (30)\n\n#endif /* __REG_IOMUXIP_H_ */\n"
  },
  {
    "path": "platform/hal/best2300p/reg_psc_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_PSC_BEST2300P_H__\n#define __REG_PSC_BEST2300P_H__\n\n#include \"plat_types.h\"\n\nstruct AONPSC_T {\n    __IO uint32_t REG_000;\n    __IO uint32_t REG_004;\n    __IO uint32_t REG_008;\n    __IO uint32_t REG_00C;\n    __IO uint32_t REG_010;\n    __IO uint32_t REG_014;\n    __IO uint32_t REG_018;\n    __IO uint32_t REG_01C;\n    __IO uint32_t REG_020;\n    __IO uint32_t REG_024;\n    __IO uint32_t REG_028;\n    __IO uint32_t REG_02C;\n    __IO uint32_t REG_030;\n    __IO uint32_t REG_034;\n    __IO uint32_t REG_038;\n    __IO uint32_t REG_03C;\n    __IO uint32_t REG_040;\n    __IO uint32_t REG_044;\n    __IO uint32_t REG_048;\n    __IO uint32_t REG_04C;\n    __IO uint32_t REG_050;\n    __IO uint32_t REG_054;\n    __IO uint32_t REG_058;\n    __IO uint32_t REG_05C;\n    __IO uint32_t REG_060;\n    __IO uint32_t REG_064;\n    __IO uint32_t REG_068;\n    __IO uint32_t REG_06C;\n    __IO uint32_t REG_070;\n    __IO uint32_t REG_074;\n    __IO uint32_t REG_078;\n    __IO uint32_t REG_07C;\n    __IO uint32_t REG_080;\n    __IO uint32_t REG_084;\n    __IO uint32_t REG_088;\n    __IO uint32_t REG_08C;\n    __IO uint32_t REG_090;\n    __IO uint32_t REG_094;\n    __IO uint32_t REG_098;\n    __IO uint32_t REG_09C;\n    __IO uint32_t REG_0A0;\n    __IO uint32_t REG_0A4;\n    __IO uint32_t REG_0A8;\n    __IO uint32_t REG_0AC;\n    __IO uint32_t REG_0B0;\n    __IO uint32_t REG_0B4;\n};\n\n// reg_00\n#define PSC_AON_MCU_PG_AUTO_EN                  (1 << 0)\n\n// reg_04\n#define PSC_AON_MCU_PSW_ACK_VALID               (1 << 0)\n#define PSC_AON_MCU_RESERVED(n)                 (((n) & 0x7F) << 1)\n#define PSC_AON_MCU_RESERVED_MASK               (0x7F << 1)\n#define PSC_AON_MCU_RESERVED_SHIFT              (1)\n#define PSC_AON_MCU_MAIN_STATE(n)               (((n) & 0x3) << 8)\n#define PSC_AON_MCU_MAIN_STATE_MASK             (0x3 << 8)\n#define PSC_AON_MCU_MAIN_STATE_SHIFT            (8)\n#define PSC_AON_MCU_POWERDN_STATE(n)            (((n) & 0x7) << 10)\n#define PSC_AON_MCU_POWERDN_STATE_MASK          (0x7 << 10)\n#define PSC_AON_MCU_POWERDN_STATE_SHIFT         (10)\n#define PSC_AON_MCU_POWERUP_STATE(n)            (((n) & 0x7) << 13)\n#define PSC_AON_MCU_POWERUP_STATE_MASK          (0x7 << 13)\n#define PSC_AON_MCU_POWERUP_STATE_SHIFT         (13)\n\n// reg_08\n#define PSC_AON_MCU_POWERDN_TIMER1(n)           (((n) & 0x3F) << 0)\n#define PSC_AON_MCU_POWERDN_TIMER1_MASK         (0x3F << 0)\n#define PSC_AON_MCU_POWERDN_TIMER1_SHIFT        (0)\n#define PSC_AON_MCU_POWERDN_TIMER2(n)           (((n) & 0x3F) << 6)\n#define PSC_AON_MCU_POWERDN_TIMER2_MASK         (0x3F << 6)\n#define PSC_AON_MCU_POWERDN_TIMER2_SHIFT        (6)\n#define PSC_AON_MCU_POWERDN_TIMER3(n)           (((n) & 0x3F) << 12)\n#define PSC_AON_MCU_POWERDN_TIMER3_MASK         (0x3F << 12)\n#define PSC_AON_MCU_POWERDN_TIMER3_SHIFT        (12)\n#define PSC_AON_MCU_POWERDN_TIMER4(n)           (((n) & 0x3F) << 18)\n#define PSC_AON_MCU_POWERDN_TIMER4_MASK         (0x3F << 18)\n#define PSC_AON_MCU_POWERDN_TIMER4_SHIFT        (18)\n#define PSC_AON_MCU_POWERDN_TIMER5(n)           (((n) & 0xFF) << 24)\n#define PSC_AON_MCU_POWERDN_TIMER5_MASK         (0xFF << 24)\n#define PSC_AON_MCU_POWERDN_TIMER5_SHIFT        (24)\n\n// reg_0c\n#define PSC_AON_MCU_POWERUP_TIMER1(n)           (((n) & 0x3F) << 0)\n#define PSC_AON_MCU_POWERUP_TIMER1_MASK         (0x3F << 0)\n#define PSC_AON_MCU_POWERUP_TIMER1_SHIFT        (0)\n#define PSC_AON_MCU_POWERUP_TIMER2(n)           (((n) & 0xFF) << 6)\n#define PSC_AON_MCU_POWERUP_TIMER2_MASK         (0xFF << 6)\n#define PSC_AON_MCU_POWERUP_TIMER2_SHIFT        (6)\n#define PSC_AON_MCU_POWERUP_TIMER3(n)           (((n) & 0x3F) << 14)\n#define PSC_AON_MCU_POWERUP_TIMER3_MASK         (0x3F << 14)\n#define PSC_AON_MCU_POWERUP_TIMER3_SHIFT        (14)\n#define PSC_AON_MCU_POWERUP_TIMER4(n)           (((n) & 0x3F) << 20)\n#define PSC_AON_MCU_POWERUP_TIMER4_MASK         (0x3F << 20)\n#define PSC_AON_MCU_POWERUP_TIMER4_SHIFT        (20)\n#define PSC_AON_MCU_POWERUP_TIMER5(n)           (((n) & 0x3F) << 26)\n#define PSC_AON_MCU_POWERUP_TIMER5_MASK         (0x3F << 26)\n#define PSC_AON_MCU_POWERUP_TIMER5_SHIFT        (26)\n\n// reg_10\n#define PSC_AON_MCU_POWERDN_START               (1 << 0)\n\n// reg_14\n#define PSC_AON_MCU_POWERUP_START               (1 << 0)\n\n// reg_18\n#define PSC_AON_MCU_CLK_STOP_REG                (1 << 0)\n#define PSC_AON_MCU_ISO_EN_REG                  (1 << 1)\n#define PSC_AON_MCU_RESETN_ASSERT_REG           (1 << 2)\n#define PSC_AON_MCU_PSW_EN_REG                  (1 << 3)\n#define PSC_AON_MCU_CLK_STOP_DR                 (1 << 4)\n#define PSC_AON_MCU_ISO_EN_DR                   (1 << 5)\n#define PSC_AON_MCU_RESETN_ASSERT_DR            (1 << 6)\n#define PSC_AON_MCU_PSW_EN_DR                   (1 << 7)\n\n// reg_1c\n#define PSC_AON_MCU_MAIN_STATE_R(n)             (((n) & 0x3) << 0)\n#define PSC_AON_MCU_MAIN_STATE_R_MASK           (0x3 << 0)\n#define PSC_AON_MCU_MAIN_STATE_R_SHIFT          (0)\n#define PSC_AON_MCU_POWERDN_STATE_R(n)          (((n) & 0x7) << 2)\n#define PSC_AON_MCU_POWERDN_STATE_R_MASK        (0x7 << 2)\n#define PSC_AON_MCU_POWERDN_STATE_R_SHIFT       (2)\n#define PSC_AON_MCU_POWERUP_STATE_R(n)          (((n) & 0x7) << 5)\n#define PSC_AON_MCU_POWERUP_STATE_R_MASK        (0x7 << 5)\n#define PSC_AON_MCU_POWERUP_STATE_R_SHIFT       (5)\n#define PSC_AON_BT_MAIN_STATE_R(n)              (((n) & 0x3) << 8)\n#define PSC_AON_BT_MAIN_STATE_R_MASK            (0x3 << 8)\n#define PSC_AON_BT_MAIN_STATE_R_SHIFT           (8)\n#define PSC_AON_BT_POWERDN_STATE_R(n)           (((n) & 0x7) << 10)\n#define PSC_AON_BT_POWERDN_STATE_R_MASK         (0x7 << 10)\n#define PSC_AON_BT_POWERDN_STATE_R_SHIFT        (10)\n#define PSC_AON_BT_POWERUP_STATE_R(n)           (((n) & 0x7) << 13)\n#define PSC_AON_BT_POWERUP_STATE_R_MASK         (0x7 << 13)\n#define PSC_AON_BT_POWERUP_STATE_R_SHIFT        (13)\n#define PSC_AON_WLAN_MAIN_STATE_R(n)            (((n) & 0x3) << 16)\n#define PSC_AON_WLAN_MAIN_STATE_R_MASK          (0x3 << 16)\n#define PSC_AON_WLAN_MAIN_STATE_R_SHIFT         (16)\n#define PSC_AON_WLAN_POWERDN_STATE_R(n)         (((n) & 0x7) << 18)\n#define PSC_AON_WLAN_POWERDN_STATE_R_MASK       (0x7 << 18)\n#define PSC_AON_WLAN_POWERDN_STATE_R_SHIFT      (18)\n#define PSC_AON_WLAN_POWERUP_STATE_R(n)         (((n) & 0x7) << 21)\n#define PSC_AON_WLAN_POWERUP_STATE_R_MASK       (0x7 << 21)\n#define PSC_AON_WLAN_POWERUP_STATE_R_SHIFT      (21)\n#define PSC_AON_CODEC_MAIN_STATE_R(n)           (((n) & 0x3) << 24)\n#define PSC_AON_CODEC_MAIN_STATE_R_MASK         (0x3 << 24)\n#define PSC_AON_CODEC_MAIN_STATE_R_SHIFT        (24)\n#define PSC_AON_CODEC_POWERDN_STATE_R(n)        (((n) & 0x7) << 26)\n#define PSC_AON_CODEC_POWERDN_STATE_R_MASK      (0x7 << 26)\n#define PSC_AON_CODEC_POWERDN_STATE_R_SHIFT     (26)\n#define PSC_AON_CODEC_POWERUP_STATE_R(n)        (((n) & 0x7) << 29)\n#define PSC_AON_CODEC_POWERUP_STATE_R_MASK      (0x7 << 29)\n#define PSC_AON_CODEC_POWERUP_STATE_R_SHIFT     (29)\n\n// reg_20\n#define PSC_AON_BT_PG_AUTO_EN                   (1 << 0)\n\n// reg_24\n#define PSC_AON_BT_PSW_ACK_VALID                (1 << 0)\n#define PSC_AON_BT_RESERVED(n)                  (((n) & 0x7F) << 1)\n#define PSC_AON_BT_RESERVED_MASK                (0x7F << 1)\n#define PSC_AON_BT_RESERVED_SHIFT               (1)\n#define PSC_AON_BT_MAIN_STATE(n)                (((n) & 0x3) << 8)\n#define PSC_AON_BT_MAIN_STATE_MASK              (0x3 << 8)\n#define PSC_AON_BT_MAIN_STATE_SHIFT             (8)\n#define PSC_AON_BT_POWERDN_STATE(n)             (((n) & 0x7) << 10)\n#define PSC_AON_BT_POWERDN_STATE_MASK           (0x7 << 10)\n#define PSC_AON_BT_POWERDN_STATE_SHIFT          (10)\n#define PSC_AON_BT_POWERUP_STATE(n)             (((n) & 0x7) << 13)\n#define PSC_AON_BT_POWERUP_STATE_MASK           (0x7 << 13)\n#define PSC_AON_BT_POWERUP_STATE_SHIFT          (13)\n\n// reg_28\n#define PSC_AON_BT_POWERDN_TIMER1(n)            (((n) & 0x3F) << 0)\n#define PSC_AON_BT_POWERDN_TIMER1_MASK          (0x3F << 0)\n#define PSC_AON_BT_POWERDN_TIMER1_SHIFT         (0)\n#define PSC_AON_BT_POWERDN_TIMER2(n)            (((n) & 0x3F) << 6)\n#define PSC_AON_BT_POWERDN_TIMER2_MASK          (0x3F << 6)\n#define PSC_AON_BT_POWERDN_TIMER2_SHIFT         (6)\n#define PSC_AON_BT_POWERDN_TIMER3(n)            (((n) & 0x3F) << 12)\n#define PSC_AON_BT_POWERDN_TIMER3_MASK          (0x3F << 12)\n#define PSC_AON_BT_POWERDN_TIMER3_SHIFT         (12)\n#define PSC_AON_BT_POWERDN_TIMER4(n)            (((n) & 0x3F) << 18)\n#define PSC_AON_BT_POWERDN_TIMER4_MASK          (0x3F << 18)\n#define PSC_AON_BT_POWERDN_TIMER4_SHIFT         (18)\n#define PSC_AON_BT_POWERDN_TIMER5(n)            (((n) & 0xFF) << 24)\n#define PSC_AON_BT_POWERDN_TIMER5_MASK          (0xFF << 24)\n#define PSC_AON_BT_POWERDN_TIMER5_SHIFT         (24)\n\n// reg_2c\n#define PSC_AON_BT_POWERUP_TIMER1(n)            (((n) & 0x3F) << 0)\n#define PSC_AON_BT_POWERUP_TIMER1_MASK          (0x3F << 0)\n#define PSC_AON_BT_POWERUP_TIMER1_SHIFT         (0)\n#define PSC_AON_BT_POWERUP_TIMER2(n)            (((n) & 0xFF) << 6)\n#define PSC_AON_BT_POWERUP_TIMER2_MASK          (0xFF << 6)\n#define PSC_AON_BT_POWERUP_TIMER2_SHIFT         (6)\n#define PSC_AON_BT_POWERUP_TIMER3(n)            (((n) & 0x3F) << 14)\n#define PSC_AON_BT_POWERUP_TIMER3_MASK          (0x3F << 14)\n#define PSC_AON_BT_POWERUP_TIMER3_SHIFT         (14)\n#define PSC_AON_BT_POWERUP_TIMER4(n)            (((n) & 0x3F) << 20)\n#define PSC_AON_BT_POWERUP_TIMER4_MASK          (0x3F << 20)\n#define PSC_AON_BT_POWERUP_TIMER4_SHIFT         (20)\n#define PSC_AON_BT_POWERUP_TIMER5(n)            (((n) & 0x3F) << 26)\n#define PSC_AON_BT_POWERUP_TIMER5_MASK          (0x3F << 26)\n#define PSC_AON_BT_POWERUP_TIMER5_SHIFT         (26)\n\n// reg_30\n#define PSC_AON_BT_POWERDN_START                (1 << 0)\n\n// reg_34\n#define PSC_AON_BT_POWERUP_START                (1 << 0)\n\n// reg_38\n#define PSC_AON_BT_CLK_STOP_REG                 (1 << 0)\n#define PSC_AON_BT_ISO_EN_REG                   (1 << 1)\n#define PSC_AON_BT_RESETN_ASSERT_REG            (1 << 2)\n#define PSC_AON_BT_PSW_EN_REG                   (1 << 3)\n#define PSC_AON_BT_CLK_STOP_DR                  (1 << 4)\n#define PSC_AON_BT_ISO_EN_DR                    (1 << 5)\n#define PSC_AON_BT_RESETN_ASSERT_DR             (1 << 6)\n#define PSC_AON_BT_PSW_EN_DR                    (1 << 7)\n\n// reg_40\n#define PSC_AON_WLAN_PG_AUTO_EN                 (1 << 0)\n\n// reg_44\n#define PSC_AON_WLAN_PSW_ACK_VALID              (1 << 0)\n#define PSC_AON_WLAN_RESERVED(n)                (((n) & 0x7F) << 1)\n#define PSC_AON_WLAN_RESERVED_MASK              (0x7F << 1)\n#define PSC_AON_WLAN_RESERVED_SHIFT             (1)\n#define PSC_AON_WLAN_MAIN_STATE(n)              (((n) & 0x3) << 8)\n#define PSC_AON_WLAN_MAIN_STATE_MASK            (0x3 << 8)\n#define PSC_AON_WLAN_MAIN_STATE_SHIFT           (8)\n#define PSC_AON_WLAN_POWERDN_STATE(n)           (((n) & 0x7) << 10)\n#define PSC_AON_WLAN_POWERDN_STATE_MASK         (0x7 << 10)\n#define PSC_AON_WLAN_POWERDN_STATE_SHIFT        (10)\n#define PSC_AON_WLAN_POWERUP_STATE(n)           (((n) & 0x7) << 13)\n#define PSC_AON_WLAN_POWERUP_STATE_MASK         (0x7 << 13)\n#define PSC_AON_WLAN_POWERUP_STATE_SHIFT        (13)\n\n// reg_48\n#define PSC_AON_WLAN_POWERDN_TIMER1(n)          (((n) & 0x3F) << 0)\n#define PSC_AON_WLAN_POWERDN_TIMER1_MASK        (0x3F << 0)\n#define PSC_AON_WLAN_POWERDN_TIMER1_SHIFT       (0)\n#define PSC_AON_WLAN_POWERDN_TIMER2(n)          (((n) & 0x3F) << 6)\n#define PSC_AON_WLAN_POWERDN_TIMER2_MASK        (0x3F << 6)\n#define PSC_AON_WLAN_POWERDN_TIMER2_SHIFT       (6)\n#define PSC_AON_WLAN_POWERDN_TIMER3(n)          (((n) & 0x3F) << 12)\n#define PSC_AON_WLAN_POWERDN_TIMER3_MASK        (0x3F << 12)\n#define PSC_AON_WLAN_POWERDN_TIMER3_SHIFT       (12)\n#define PSC_AON_WLAN_POWERDN_TIMER4(n)          (((n) & 0x3F) << 18)\n#define PSC_AON_WLAN_POWERDN_TIMER4_MASK        (0x3F << 18)\n#define PSC_AON_WLAN_POWERDN_TIMER4_SHIFT       (18)\n#define PSC_AON_WLAN_POWERDN_TIMER5(n)          (((n) & 0xFF) << 24)\n#define PSC_AON_WLAN_POWERDN_TIMER5_MASK        (0xFF << 24)\n#define PSC_AON_WLAN_POWERDN_TIMER5_SHIFT       (24)\n\n// reg_4c\n#define PSC_AON_WLAN_POWERUP_TIMER1(n)          (((n) & 0x3F) << 0)\n#define PSC_AON_WLAN_POWERUP_TIMER1_MASK        (0x3F << 0)\n#define PSC_AON_WLAN_POWERUP_TIMER1_SHIFT       (0)\n#define PSC_AON_WLAN_POWERUP_TIMER2(n)          (((n) & 0xFF) << 6)\n#define PSC_AON_WLAN_POWERUP_TIMER2_MASK        (0xFF << 6)\n#define PSC_AON_WLAN_POWERUP_TIMER2_SHIFT       (6)\n#define PSC_AON_WLAN_POWERUP_TIMER3(n)          (((n) & 0x3F) << 14)\n#define PSC_AON_WLAN_POWERUP_TIMER3_MASK        (0x3F << 14)\n#define PSC_AON_WLAN_POWERUP_TIMER3_SHIFT       (14)\n#define PSC_AON_WLAN_POWERUP_TIMER4(n)          (((n) & 0x3F) << 20)\n#define PSC_AON_WLAN_POWERUP_TIMER4_MASK        (0x3F << 20)\n#define PSC_AON_WLAN_POWERUP_TIMER4_SHIFT       (20)\n#define PSC_AON_WLAN_POWERUP_TIMER5(n)          (((n) & 0x3F) << 26)\n#define PSC_AON_WLAN_POWERUP_TIMER5_MASK        (0x3F << 26)\n#define PSC_AON_WLAN_POWERUP_TIMER5_SHIFT       (26)\n\n// reg_50\n#define PSC_AON_WLAN_POWERDN_START              (1 << 0)\n\n// reg_54\n#define PSC_AON_WLAN_POWERUP_START              (1 << 0)\n\n// reg_58\n#define PSC_AON_WLAN_CLK_STOP_REG               (1 << 0)\n#define PSC_AON_WLAN_ISO_EN_REG                 (1 << 1)\n#define PSC_AON_WLAN_RESETN_ASSERT_REG          (1 << 2)\n#define PSC_AON_WLAN_PSW_EN_REG                 (1 << 3)\n#define PSC_AON_WLAN_CLK_STOP_DR                (1 << 4)\n#define PSC_AON_WLAN_ISO_EN_DR                  (1 << 5)\n#define PSC_AON_WLAN_RESETN_ASSERT_DR           (1 << 6)\n#define PSC_AON_WLAN_PSW_EN_DR                  (1 << 7)\n\n// reg_60\n#define PSC_AON_CODEC_PG_AUTO_EN                (1 << 0)\n\n// reg_64\n#define PSC_AON_CODEC_PSW_ACK_VALID             (1 << 0)\n#define PSC_AON_CODEC_RESERVED(n)               (((n) & 0x7F) << 1)\n#define PSC_AON_CODEC_RESERVED_MASK             (0x7F << 1)\n#define PSC_AON_CODEC_RESERVED_SHIFT            (1)\n#define PSC_AON_CODEC_MAIN_STATE(n)             (((n) & 0x3) << 8)\n#define PSC_AON_CODEC_MAIN_STATE_MASK           (0x3 << 8)\n#define PSC_AON_CODEC_MAIN_STATE_SHIFT          (8)\n#define PSC_AON_CODEC_POWERDN_STATE(n)          (((n) & 0x7) << 10)\n#define PSC_AON_CODEC_POWERDN_STATE_MASK        (0x7 << 10)\n#define PSC_AON_CODEC_POWERDN_STATE_SHIFT       (10)\n#define PSC_AON_CODEC_POWERUP_STATE(n)          (((n) & 0x7) << 13)\n#define PSC_AON_CODEC_POWERUP_STATE_MASK        (0x7 << 13)\n#define PSC_AON_CODEC_POWERUP_STATE_SHIFT       (13)\n\n// reg_68\n#define PSC_AON_CODEC_POWERDN_TIMER1(n)         (((n) & 0x3F) << 0)\n#define PSC_AON_CODEC_POWERDN_TIMER1_MASK       (0x3F << 0)\n#define PSC_AON_CODEC_POWERDN_TIMER1_SHIFT      (0)\n#define PSC_AON_CODEC_POWERDN_TIMER2(n)         (((n) & 0x3F) << 6)\n#define PSC_AON_CODEC_POWERDN_TIMER2_MASK       (0x3F << 6)\n#define PSC_AON_CODEC_POWERDN_TIMER2_SHIFT      (6)\n#define PSC_AON_CODEC_POWERDN_TIMER3(n)         (((n) & 0x3F) << 12)\n#define PSC_AON_CODEC_POWERDN_TIMER3_MASK       (0x3F << 12)\n#define PSC_AON_CODEC_POWERDN_TIMER3_SHIFT      (12)\n#define PSC_AON_CODEC_POWERDN_TIMER4(n)         (((n) & 0x3F) << 18)\n#define PSC_AON_CODEC_POWERDN_TIMER4_MASK       (0x3F << 18)\n#define PSC_AON_CODEC_POWERDN_TIMER4_SHIFT      (18)\n#define PSC_AON_CODEC_POWERDN_TIMER5(n)         (((n) & 0xFF) << 24)\n#define PSC_AON_CODEC_POWERDN_TIMER5_MASK       (0xFF << 24)\n#define PSC_AON_CODEC_POWERDN_TIMER5_SHIFT      (24)\n\n// reg_6c\n#define PSC_AON_CODEC_POWERUP_TIMER1(n)         (((n) & 0x3F) << 0)\n#define PSC_AON_CODEC_POWERUP_TIMER1_MASK       (0x3F << 0)\n#define PSC_AON_CODEC_POWERUP_TIMER1_SHIFT      (0)\n#define PSC_AON_CODEC_POWERUP_TIMER2(n)         (((n) & 0xFF) << 6)\n#define PSC_AON_CODEC_POWERUP_TIMER2_MASK       (0xFF << 6)\n#define PSC_AON_CODEC_POWERUP_TIMER2_SHIFT      (6)\n#define PSC_AON_CODEC_POWERUP_TIMER3(n)         (((n) & 0x3F) << 14)\n#define PSC_AON_CODEC_POWERUP_TIMER3_MASK       (0x3F << 14)\n#define PSC_AON_CODEC_POWERUP_TIMER3_SHIFT      (14)\n#define PSC_AON_CODEC_POWERUP_TIMER4(n)         (((n) & 0x3F) << 20)\n#define PSC_AON_CODEC_POWERUP_TIMER4_MASK       (0x3F << 20)\n#define PSC_AON_CODEC_POWERUP_TIMER4_SHIFT      (20)\n#define PSC_AON_CODEC_POWERUP_TIMER5(n)         (((n) & 0x3F) << 26)\n#define PSC_AON_CODEC_POWERUP_TIMER5_MASK       (0x3F << 26)\n#define PSC_AON_CODEC_POWERUP_TIMER5_SHIFT      (26)\n\n// reg_70\n#define PSC_AON_CODEC_POWERDN_START             (1 << 0)\n\n// reg_74\n#define PSC_AON_CODEC_POWERUP_START             (1 << 0)\n\n// reg_78\n#define PSC_AON_CODEC_CLK_STOP_REG              (1 << 0)\n#define PSC_AON_CODEC_ISO_EN_REG                (1 << 1)\n#define PSC_AON_CODEC_RESETN_ASSERT_REG         (1 << 2)\n#define PSC_AON_CODEC_PSW_EN_REG                (1 << 3)\n#define PSC_AON_CODEC_CLK_STOP_DR               (1 << 4)\n#define PSC_AON_CODEC_ISO_EN_DR                 (1 << 5)\n#define PSC_AON_CODEC_RESETN_ASSERT_DR          (1 << 6)\n#define PSC_AON_CODEC_PSW_EN_DR                 (1 << 7)\n\n// reg_80\n#define PSC_AON_MCU_INTR_MASK(n)                (((n) & 0xFFFFFFFF) << 0)\n#define PSC_AON_MCU_INTR_MASK_MASK              (0xFFFFFFFF << 0)\n#define PSC_AON_MCU_INTR_MASK_SHIFT             (0)\n\n// reg_84\n#define PSC_AON_MCU_INTR_MASK2(n)               (((n) & 0xFFFF) << 0)\n#define PSC_AON_MCU_INTR_MASK2_MASK             (0xFFFF << 0)\n#define PSC_AON_MCU_INTR_MASK2_SHIFT            (0)\n\n// reg_88\n#define PSC_AON_MCU_INTR_MASK_STATUS(n)         (((n) & 0xFFFFFFFF) << 0)\n#define PSC_AON_MCU_INTR_MASK_STATUS_MASK       (0xFFFFFFFF << 0)\n#define PSC_AON_MCU_INTR_MASK_STATUS_SHIFT      (0)\n\n// reg_8c\n#define PSC_AON_MCU_INTR_MASK_STATUS2(n)        (((n) & 0xFFFF) << 0)\n#define PSC_AON_MCU_INTR_MASK_STATUS2_MASK      (0xFFFF << 0)\n#define PSC_AON_MCU_INTR_MASK_STATUS2_SHIFT     (0)\n\n// reg_90\n#define PSC_AON_BT_INTR_MASK(n)                 (((n) & 0xFFFFFFFF) << 0)\n#define PSC_AON_BT_INTR_MASK_MASK               (0xFFFFFFFF << 0)\n#define PSC_AON_BT_INTR_MASK_SHIFT              (0)\n\n// reg_94\n#define PSC_AON_BT_INTR_MASK2(n)                (((n) & 0xFFFF) << 0)\n#define PSC_AON_BT_INTR_MASK2_MASK              (0xFFFF << 0)\n#define PSC_AON_BT_INTR_MASK2_SHIFT             (0)\n\n// reg_98\n#define PSC_AON_BT_INTR_MASK_STATUS(n)          (((n) & 0xFFFFFFFF) << 0)\n#define PSC_AON_BT_INTR_MASK_STATUS_MASK        (0xFFFFFFFF << 0)\n#define PSC_AON_BT_INTR_MASK_STATUS_SHIFT       (0)\n\n// reg_9c\n#define PSC_AON_BT_INTR_MASK_STATUS2(n)         (((n) & 0xFFFF) << 0)\n#define PSC_AON_BT_INTR_MASK_STATUS2_MASK       (0xFFFF << 0)\n#define PSC_AON_BT_INTR_MASK_STATUS2_SHIFT      (0)\n\n// reg_a0\n#define PSC_AON_WLAN_INTR_MASK(n)               (((n) & 0xFFFFFFFF) << 0)\n#define PSC_AON_WLAN_INTR_MASK_MASK             (0xFFFFFFFF << 0)\n#define PSC_AON_WLAN_INTR_MASK_SHIFT            (0)\n\n// reg_a4\n#define PSC_AON_WLAN_INTR_MASK2(n)              (((n) & 0xFFFF) << 0)\n#define PSC_AON_WLAN_INTR_MASK2_MASK            (0xFFFF << 0)\n#define PSC_AON_WLAN_INTR_MASK2_SHIFT           (0)\n\n// reg_a8\n#define PSC_AON_WLAN_INTR_MASK_STATUS(n)        (((n) & 0xFFFFFFFF) << 0)\n#define PSC_AON_WLAN_INTR_MASK_STATUS_MASK      (0xFFFFFFFF << 0)\n#define PSC_AON_WLAN_INTR_MASK_STATUS_SHIFT     (0)\n\n// reg_ac\n#define PSC_AON_WLAN_INTR_MASK_STATUS2(n)       (((n) & 0xFFFF) << 0)\n#define PSC_AON_WLAN_INTR_MASK_STATUS2_MASK     (0xFFFF << 0)\n#define PSC_AON_WLAN_INTR_MASK_STATUS2_SHIFT    (0)\n\n// reg_b0\n#define PSC_AON_INTR_RAW_STATUS(n)              (((n) & 0xFFFFFFFF) << 0)\n#define PSC_AON_INTR_RAW_STATUS_MASK            (0xFFFFFFFF << 0)\n#define PSC_AON_INTR_RAW_STATUS_SHIFT           (0)\n\n// reg_b4\n#define PSC_AON_INTR_RAW_STATUS2(n)             (((n) & 0xFFFF) << 0)\n#define PSC_AON_INTR_RAW_STATUS2_MASK           (0xFFFF << 0)\n#define PSC_AON_INTR_RAW_STATUS2_SHIFT          (0)\n\n#endif\n"
  },
  {
    "path": "platform/hal/best2300p/reg_sensor_eng_best2300p.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_SENSOR_ENG_BEST2300P_H__\n#define __REG_SENSOR_ENG_BEST2300P_H__\n\n#include \"plat_types.h\"\n\nstruct SENSOR_ENG_T {\n    __IO uint32_t SLV0_CONFIG_REG;  // 0000\n    __IO uint32_t SLV1_CONFIG_REG;  // 0004\n    __IO uint32_t SLV2_CONFIG_REG;  // 0008\n    __IO uint32_t SLV3_CONFIG_REG;  // 000C\n    __IO uint32_t GLOBAL_CFG0_REG;  // 0010\n    __IO uint32_t GLOBAL_CFG1_REG;  // 0014\n    __IO uint32_t GLOBAL_CFG2_REG;  // 0018\n    __IO uint32_t GLOBAL_CFG3_REG;  // 001C\n    __IO uint32_t SLV0_INTR_MASK;   // 0020\n    __IO uint32_t SLV1_INTR_MASK;   // 0024\n    __IO uint32_t SLV2_INTR_MASK;   // 0028\n    __IO uint32_t SLV3_INTR_MASK;   // 002C\n    __IO uint32_t SENSOR_INTR_CLR;  // 0030\n    __I  uint32_t SENSOR_INTR_STS;  // 0034\n    __IO uint32_t TIMER_INTVL_NUM;  // 0038\n    __IO uint32_t SENSOR_STATUS;    // 003C\n    __IO uint32_t I2C0_BASE_ADDR;   // 0040\n    __IO uint32_t I2C1_BASE_ADDR;   // 0044\n    __IO uint32_t SPI0_BASE_ADDR;   // 0048\n    __IO uint32_t SPI1_BASE_ADDR;   // 004C\n    __IO uint32_t SPI2_BASE_ADDR;   // 0050\n};\n\n// 0000 - 000C\n#define SLV_SPI_RXDS                        (1 << 15)\n#define SLV_RDN_WR                          (1 << 14)\n#define SLV_I2C_SPI_SEL_SHIFT               11\n#define SLV_I2C_SPI_SEL_MASK                (0x7 << SLV_I2C_SPI_SEL_SHIFT)\n#define SLV_I2C_SPI_SEL(n)                  BITFIELD_VAL(SLV_I2C_SPI_SEL, n)\n#define SLV_SLV_DEV_ID_SHIFT                1\n#define SLV_SLV_DEV_ID_MASK                 (0x3FF << SLV_SLV_DEV_ID_SHIFT)\n#define SLV_SLV_DEV_ID(n)                   BITFIELD_VAL(SLV_SLV_DEV_ID, n)\n#define SLV_ENABLE                          (1 << 0)\n\n// 0010\n#define GBL_CODEC_SX_SEL_SHIFT              5\n#define GBL_CODEC_SX_SEL_MASK               (0x3 << GBL_CODEC_SX_SEL_SHIFT)\n#define GBL_CODEC_SX_SEL(n)                 BITFIELD_VAL(GBL_CODEC_SX_SEL, n)\n#define GBL_TRI_INORDER                     (1 << 4)\n#define GBL_SENSORHUB_EN                    (1 << 3)\n#define GBL_RESERVED                        (1 << 2)\n#define GBL_TIMER_SEL                       (1 << 1)\n#define GBL_TRIGGER_TYPE                    (1 << 0)\n\n// 0014\n#define NUM_OF_RX_LLI3_SHIFT                24\n#define NUM_OF_RX_LLI3_MASK                 (0xFF << NUM_OF_RX_LLI3_SHIFT)\n#define NUM_OF_RX_LLI3(n)                   BITFIELD_VAL(NUM_OF_RX_LLI3, n)\n#define NUM_OF_RX_LLI2_SHIFT                16\n#define NUM_OF_RX_LLI2_MASK                 (0xFF << NUM_OF_RX_LLI2_SHIFT)\n#define NUM_OF_RX_LLI2(n)                   BITFIELD_VAL(NUM_OF_RX_LLI2, n)\n#define NUM_OF_RX_LLI1_SHIFT                8\n#define NUM_OF_RX_LLI1_MASK                 (0xFF << NUM_OF_RX_LLI1_SHIFT)\n#define NUM_OF_RX_LLI1(n)                   BITFIELD_VAL(NUM_OF_RX_LLI1, n)\n#define NUM_OF_RX_LLI0_SHIFT                0\n#define NUM_OF_RX_LLI0_MASK                 (0xFF << NUM_OF_RX_LLI0_SHIFT)\n#define NUM_OF_RX_LLI0(n)                   BITFIELD_VAL(NUM_OF_RX_LLI0, n)\n\n// 001C\n#define NUM_OF_TX_LLI3_SHIFT                24\n#define NUM_OF_TX_LLI3_MASK                 (0xFF << NUM_OF_TX_LLI3_SHIFT)\n#define NUM_OF_TX_LLI3(n)                   BITFIELD_VAL(NUM_OF_TX_LLI3, n)\n#define NUM_OF_TX_LLI2_SHIFT                16\n#define NUM_OF_TX_LLI2_MASK                 (0xFF << NUM_OF_TX_LLI2_SHIFT)\n#define NUM_OF_TX_LLI2(n)                   BITFIELD_VAL(NUM_OF_TX_LLI2, n)\n#define NUM_OF_TX_LLI1_SHIFT                8\n#define NUM_OF_TX_LLI1_MASK                 (0xFF << NUM_OF_TX_LLI1_SHIFT)\n#define NUM_OF_TX_LLI1(n)                   BITFIELD_VAL(NUM_OF_TX_LLI1, n)\n#define NUM_OF_TX_LLI0_SHIFT                0\n#define NUM_OF_TX_LLI0_MASK                 (0xFF << NUM_OF_TX_LLI0_SHIFT)\n#define NUM_OF_TX_LLI0(n)                   BITFIELD_VAL(NUM_OF_TX_LLI0, n)\n\n// 0030\n#define SENSOR_INTR_CLEAR                   (1 << 0)\n\n// 0034\n#define EXT_SENSOR3_INTR                    (1 << 4)\n#define EXT_SENSOR2_INTR                    (1 << 3)\n#define EXT_SENSOR1_INTR                    (1 << 2)\n#define EXT_SENSOR0_INTR                    (1 << 1)\n#define SENSOR_WKUP_INTR                    (1 << 0)\n\n// 0038\n#define TIMER_INTERVAL_NUM_SHIFT            0\n#define TIMER_INTERVAL_NUM_MASK             (0xFF << TIMER_INTERVAL_NUM_SHIFT)\n#define TIMER_INTERVAL_NUM(n)               BITFIELD_VAL(TIMER_INTERVAL_NUM, n)\n\n// 003C\n#define SENSOR_ENG_FSM_SHIFT                8\n#define SENSOR_ENG_FSM_MASK                 (0xF << SENSOR_ENG_FSM_SHIFT)\n#define SENSOR_ENG_FSM(n)                   BITFIELD_VAL(SENSOR_ENG_FSM, n)\n#define SENSOR3_BUSY                        (1 << 7)\n#define SENSOR2_BUSY                        (1 << 6)\n#define SENSOR1_BUSY                        (1 << 5)\n#define SENSOR0_BUSY                        (1 << 4)\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_analogif.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_ANALOGIF_H__\n#define __HAL_ANALOGIF_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nint hal_analogif_open(void);\n\nint hal_analogif_reg_write(unsigned short reg, unsigned short val);\n\nint hal_analogif_reg_read(unsigned short reg, unsigned short *val);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_aud.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef AUDIO_DEF_H\n#define AUDIO_DEF_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \n\n#ifndef __uint32_t_defined\ntypedef unsigned int uint32_t;\n# define __uint32_t_defined\n#endif\n\n#define CODEC_FREQ_24M                      24000000\n#define CODEC_FREQ_26M                      26000000\n#define CODEC_FREQ_24P576M                  24576000\n#define CODEC_FREQ_22P5792M                 22579200\n\n#define CODEC_FREQ_48K_SERIES               CODEC_FREQ_24P576M\n#define CODEC_FREQ_44_1K_SERIES             CODEC_FREQ_22P5792M\n\n#if 0\n#elif defined(CHIP_BEST3001) || defined(CHIP_BEST3003) || defined(CHIP_BEST3005)\n\n#define CODEC_FREQ_CRYSTAL                  CODEC_FREQ_24M\n\n#define CODEC_PLL_DIV                       36\n#define CODEC_CMU_DIV                       9\n#ifdef CHIP_BEST3001\n#define CODEC_PLAYBACK_BIT_DEPTH            20\n#else\n#define CODEC_PLAYBACK_BIT_DEPTH            24\n#endif\n\n#elif defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || \\\n    defined(CHIP_BEST2300) || defined(CHIP_BEST2300A) || \\\n    defined(CHIP_BEST2300P)\n\n#define CODEC_FREQ_EXTRA_DIV                2\n\n#define CODEC_PLL_DIV                       16\n#define CODEC_CMU_DIV                       8\n#define CODEC_PLAYBACK_BIT_DEPTH            24\n\n#elif defined(CHIP_BEST1000)\n\n#if defined(__AUDIO_DIV_10___)\n#define CODEC_PLL_DIV                       10\n#elif defined(__AUDIO_DIV_9___)\n#define CODEC_PLL_DIV                       9\n#else\n#define CODEC_PLL_DIV                       8\n#endif\n#define CODEC_CMU_DIV                       CODEC_PLL_DIV\n#define CODEC_PLAYBACK_BIT_DEPTH            18\n\n#elif defined(CHIP_BEST2000)\n\n#define CODEC_PLL_DIV                       32\n#define CODEC_CMU_DIV                       8\n#define CODEC_PLAYBACK_BIT_DEPTH            20\n\n#elif defined(CHIP_BEST2001)\n\n#define CODEC_PLL_DIV                       38\n#define CODEC_CMU_DIV                       8\n#define CODEC_PLAYBACK_BIT_DEPTH            20\n\n#else\n\n#error \"Please update audio definitions\"\n\n#endif\n\n#ifndef CODEC_FREQ_CRYSTAL\n#define CODEC_FREQ_CRYSTAL                  CODEC_FREQ_26M\n#endif\n#ifndef CODEC_FREQ_EXTRA_DIV\n#define CODEC_FREQ_EXTRA_DIV                1\n#endif\n\n#define CODEC_TX_PA_GAIN_DEFAULT            -1\n\nenum AUD_STREAM_USE_DEVICE_T{\n    AUD_STREAM_USE_DEVICE_NULL = 0,\n    AUD_STREAM_USE_EXT_CODEC,\n    AUD_STREAM_USE_I2S0_MASTER,\n    AUD_STREAM_USE_I2S0_SLAVE,\n    AUD_STREAM_USE_I2S1_MASTER,\n    AUD_STREAM_USE_I2S1_SLAVE,\n    AUD_STREAM_USE_TDM0_MASTER,\n    AUD_STREAM_USE_TDM0_SLAVE,\n    AUD_STREAM_USE_TDM1_MASTER,\n    AUD_STREAM_USE_TDM1_SLAVE,\n    AUD_STREAM_USE_INT_CODEC,\n    AUD_STREAM_USE_INT_SPDIF,\n    AUD_STREAM_USE_BT_PCM,\n    AUD_STREAM_USE_DPD_RX,\n    AUD_STREAM_USE_MC,\n};\n\nenum AUD_SAMPRATE_T {\n    AUD_SAMPRATE_NULL = 0,\n    AUD_SAMPRATE_7350 = 7350,\n    AUD_SAMPRATE_8000 = 8000,\n    AUD_SAMPRATE_8463 = 8463,       // 26M / 512 / 6\n    AUD_SAMPRATE_14700 = 14700,\n    AUD_SAMPRATE_16000 = 16000,\n    AUD_SAMPRATE_16927 = 16927,     // 26M / 512 / 3\n    AUD_SAMPRATE_22050 = 22050,\n    AUD_SAMPRATE_24000 = 24000,\n    AUD_SAMPRATE_32000 = 32000,\n    AUD_SAMPRATE_44100 = 44100,\n    AUD_SAMPRATE_48000 = 48000,\n    AUD_SAMPRATE_50781 = 50781,     // 26M / 512\n    AUD_SAMPRATE_64000 = 64000,\n    AUD_SAMPRATE_88200 = 88200,\n    AUD_SAMPRATE_96000 = 96000,\n    AUD_SAMPRATE_101562 = 101562,     // 26M / 256\n    AUD_SAMPRATE_128000 = 128000,\n    AUD_SAMPRATE_176400 = 176400,\n    AUD_SAMPRATE_192000 = 192000,\n    AUD_SAMPRATE_203125 = 203125,     // 26M / 128\n    AUD_SAMPRATE_256000 = 256000,\n    AUD_SAMPRATE_352800 = 352800,\n    AUD_SAMPRATE_384000 = 384000,\n    AUD_SAMPRATE_406250 = 406250,     // 26M / 64\n    AUD_SAMPRATE_512000 = 512000,\n    AUD_SAMPRATE_705600 = 705600,\n    AUD_SAMPRATE_768000 = 768000,\n    AUD_SAMPRATE_1024000 = 1024000,\n};\n\nenum AUD_CHANNEL_NUM_T {\n    AUD_CHANNEL_NUM_NULL = 0,\n    AUD_CHANNEL_NUM_1 = 1,\n    AUD_CHANNEL_NUM_2 = 2,\n    AUD_CHANNEL_NUM_3 = 3,\n    AUD_CHANNEL_NUM_4 = 4,\n    AUD_CHANNEL_NUM_5 = 5,\n    AUD_CHANNEL_NUM_6 = 6,\n    AUD_CHANNEL_NUM_7 = 7,\n    AUD_CHANNEL_NUM_8 = 8,\n};\n\n// For preprocess check\n#define AUD_CHANNEL_MAP_CH0                 (1 << 0)\n#define AUD_CHANNEL_MAP_CH1                 (1 << 1)\n#define AUD_CHANNEL_MAP_CH2                 (1 << 2)\n#define AUD_CHANNEL_MAP_CH3                 (1 << 3)\n#define AUD_CHANNEL_MAP_CH4                 (1 << 4)\n#define AUD_CHANNEL_MAP_CH5                 (1 << 5)\n#define AUD_CHANNEL_MAP_CH6                 (1 << 6)\n#define AUD_CHANNEL_MAP_CH7                 (1 << 7)\n#define AUD_CHANNEL_MAP_DIGMIC_CH0          (1 << 8)\n#define AUD_CHANNEL_MAP_DIGMIC_CH1          (1 << 9)\n#define AUD_CHANNEL_MAP_DIGMIC_CH2          (1 << 10)\n#define AUD_CHANNEL_MAP_DIGMIC_CH3          (1 << 11)\n#define AUD_CHANNEL_MAP_DIGMIC_CH4          (1 << 12)\n#define AUD_CHANNEL_MAP_DIGMIC_CH5          (1 << 13)\n#define AUD_CHANNEL_MAP_DIGMIC_CH6          (1 << 14)\n#define AUD_CHANNEL_MAP_DIGMIC_CH7          (1 << 15)\n#define AUD_CHANNEL_MAP_ECMIC_CH0           (1 << 16)\n#define AUD_CHANNEL_MAP_ECMIC_CH1           (1 << 17)\n\n#define AUD_CHANNEL_MAP_ANA_ALL             (0x000000FF)\n#define AUD_CHANNEL_MAP_DIGMIC_ALL          (0x0000FF00)\n#define AUD_CHANNEL_MAP_NORMAL_ALL          (0x0000FFFF)\n#define AUD_CHANNEL_MAP_ALL                 (0x0003FFFF)\n\nenum AUD_CHANNEL_MAP_T {\n    AUD_CHANNEL_MAP_END = AUD_CHANNEL_MAP_ECMIC_CH1,\n};\n\nenum AUD_VMIC_MAP_T {\n    AUD_VMIC_MAP_VMIC1 = (AUD_CHANNEL_MAP_END << 1),\n    AUD_VMIC_MAP_VMIC2 = (AUD_CHANNEL_MAP_END << 2),\n    AUD_VMIC_MAP_VMIC3 = (AUD_CHANNEL_MAP_END << 3),\n    AUD_VMIC_MAP_VMIC4 = (AUD_CHANNEL_MAP_END << 4),\n    AUD_VMIC_MAP_VMIC5 = (AUD_CHANNEL_MAP_END << 5),\n};\n\nenum AUD_BITS_T {\n    AUD_BITS_NULL = 0,\n    AUD_BITS_8 = 8,\n    AUD_BITS_12 = 12,\n    AUD_BITS_16 = 16,\n    AUD_BITS_20 = 20,\n    AUD_BITS_24 = 24,\n    AUD_BITS_32 = 32,\n};\n\nenum AUD_STREAM_ID_T {\n    AUD_STREAM_ID_0 = 0,\n    AUD_STREAM_ID_1,\n    AUD_STREAM_ID_2,\n#ifdef ANC_ASSIST_ENABLED\n    AUD_STREAM_ID_3,\n#endif\n    AUD_STREAM_ID_NUM,\n};\n\nenum AUD_STREAM_T {\n    AUD_STREAM_PLAYBACK = 0,\n    AUD_STREAM_CAPTURE,\n\n    AUD_STREAM_NUM,\n};\n\n// TODO: Need rename\nenum AUD_IO_PATH_T {\n    AUD_IO_PATH_NULL = 0,\n\n    // Input path\n    AUD_INPUT_PATH_MAINMIC, // Main User Mic\n    AUD_INPUT_PATH_VADMIC, // Voice Activity Detection\n    AUD_INPUT_PATH_ASRMIC, // Ambient Sound Reduction? (? Is this the external mic?)\n    AUD_INPUT_PATH_LINEIN,\n    AUD_INPUT_PATH_NTMIC,\n    AUD_INPUT_PATH_ANC_WNR, // Wind Noise Reduction\n    AUD_INPUT_PATH_USBAUDIO,\n#ifdef ANC_ASSIST_ENABLED\n    AUD_INPUT_PATH_AF_ANC,\n#endif\n    // Output path\n    AUD_OUTPUT_PATH_SPEAKER,\n};\n\nstruct AUD_IO_PATH_CFG_T {\n    enum AUD_IO_PATH_T io_path;\n    unsigned int cfg;\n};\n\nenum ANC_TYPE_T {\n    ANC_NOTYPE = (1 << 0),\n    ANC_FEEDFORWARD=(1 << 1),\n    ANC_FEEDBACK=(1 << 2),\n    ANC_TALKTHRU=(1 << 3),\n    ANC_MUSICCANCLE=(1 << 4),\n};\n\nstruct CODEC_DAC_VOL_T {\n    signed char tx_pa_gain      :6;\n    unsigned char sdm_gain      :2;\n    signed char sdac_volume;\n};\n\ntypedef signed char CODEC_ADC_VOL_T;\n\nenum TGT_VOLUME_LEVEL_T {\n    TGT_VOLUME_LEVEL_WARNINGTONE = 0,\n\n    TGT_VOLUME_LEVEL_MUTE,\n    TGT_VOLUME_LEVEL_0,\n    TGT_VOLUME_LEVEL_1,\n    TGT_VOLUME_LEVEL_2,\n    TGT_VOLUME_LEVEL_3,\n    TGT_VOLUME_LEVEL_4,\n    TGT_VOLUME_LEVEL_5,\n    TGT_VOLUME_LEVEL_6,\n    TGT_VOLUME_LEVEL_7,\n    TGT_VOLUME_LEVEL_8,\n    TGT_VOLUME_LEVEL_9,\n    TGT_VOLUME_LEVEL_10,\n    TGT_VOLUME_LEVEL_11,\n    TGT_VOLUME_LEVEL_12,\n    TGT_VOLUME_LEVEL_13,\n    TGT_VOLUME_LEVEL_14,\n    TGT_VOLUME_LEVEL_15,\n\n    TGT_VOLUME_LEVEL_QTY\n};\n\nenum TGT_ADC_VOL_LEVEL_T {\n    TGT_ADC_VOL_LEVEL_0,\n    TGT_ADC_VOL_LEVEL_1,\n    TGT_ADC_VOL_LEVEL_2,\n    TGT_ADC_VOL_LEVEL_3,\n    TGT_ADC_VOL_LEVEL_4,\n    TGT_ADC_VOL_LEVEL_5,\n    TGT_ADC_VOL_LEVEL_6,\n    TGT_ADC_VOL_LEVEL_7,\n    TGT_ADC_VOL_LEVEL_8,\n    TGT_ADC_VOL_LEVEL_9,\n    TGT_ADC_VOL_LEVEL_10,\n    TGT_ADC_VOL_LEVEL_11,\n    TGT_ADC_VOL_LEVEL_12,\n    TGT_ADC_VOL_LEVEL_13,\n    TGT_ADC_VOL_LEVEL_14,\n    TGT_ADC_VOL_LEVEL_15,\n\n    TGT_ADC_VOL_LEVEL_QTY\n};\n\ntypedef void (*AUD_VAD_CALLBACK)(int found);\n\nenum AUD_VAD_TYPE_T {\n    AUD_VAD_TYPE_NONE = 0,\n    AUD_VAD_TYPE_MIX,\n    AUD_VAD_TYPE_DIG,\n    AUD_VAD_TYPE_ANA,\n\n    AUD_VAD_TYPE_NUM,\n};\n\nstruct AUD_VAD_CONFIG_T {\n    enum AUD_VAD_TYPE_T type;\n    enum AUD_SAMPRATE_T sample_rate;\n    enum AUD_BITS_T bits;\n    AUD_VAD_CALLBACK handler;\n\n    uint8_t udc;\n    uint8_t upre;\n    uint8_t frame_len;\n    uint8_t mvad;\n\n    uint8_t dig_mode;\n    uint8_t pre_gain;\n    uint8_t sth;\n    uint8_t dc_bypass;\n\n    uint8_t ds_bypass;\n    uint8_t pre_bypass;\n    uint8_t adc_gain;\n\n    uint16_t range[4];\n\n    uint32_t frame_th[3];\n    uint32_t psd_th[2];\n};\n\nstruct CODEC_VAD_BUF_INFO_T {\n    uint32_t base_addr;\n    uint32_t buf_size;\n    uint32_t data_count;\n    uint32_t addr_count;\n};\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* AUDIO_DEF_H */\n"
  },
  {
    "path": "platform/hal/hal_bootmode.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_bootmode.h\"\n#include \"cmsis.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n\n// BOOTMODE\n#define CMU_BOOTMODE_WATCHDOG (1 << 0)\n#define CMU_BOOTMODE_GLOBAL (1 << 1)\n#define CMU_BOOTMODE_RTC (1 << 2)\n#define CMU_BOOTMODE_CHARGER (1 << 3)\n\nstatic union HAL_HW_BOOTMODE_T BOOT_BSS_LOC hw_bm;\n\nunion HAL_HW_BOOTMODE_T hal_hw_bootmode_get(void) {\n  return hw_bm;\n}\n\nunion HAL_HW_BOOTMODE_T hal_rom_hw_bootmode_get(void) {\n  union HAL_HW_BOOTMODE_T bm;\n  volatile uint32_t *addr;\n\n  addr = hal_cmu_get_bootmode_addr();\n\n  bm.reg = *addr & HAL_HW_BOOTMODE_MASK;\n  return bm;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_hw_bootmode_init(void) {\n  volatile uint32_t *addr;\n\n  addr = hal_cmu_get_bootmode_addr();\n\n  hw_bm.reg = *addr & HAL_HW_BOOTMODE_MASK;\n#if defined(CHIP_BEST3001) || defined(CHIP_BEST3005)\n  *addr = (*addr | HAL_HW_BOOTMODE_MASK) >> 2;\n#else\n  *addr = *addr | HAL_HW_BOOTMODE_MASK;\n#endif\n}\n\nuint32_t hal_sw_bootmode_get(void) {\n  volatile uint32_t *addr;\n\n  addr = hal_cmu_get_bootmode_addr();\n\n  return *addr & HAL_SW_BOOTMODE_MASK;\n}\n\nvoid hal_sw_bootmode_set(uint32_t bm) {\n  uint32_t lock;\n  volatile uint32_t *addr;\n\n  addr = hal_cmu_get_bootmode_addr();\n\n  lock = int_lock();\n#if defined(CHIP_BEST3001) || defined(CHIP_BEST3005)\n  *addr = ((*addr | bm) & HAL_SW_BOOTMODE_MASK) >> 2;\n#else\n  *addr = (*addr | bm) & HAL_SW_BOOTMODE_MASK;\n#endif\n  int_unlock(lock);\n}\n\nvoid hal_sw_bootmode_clear(uint32_t bm) {\n  uint32_t lock;\n  volatile uint32_t *addr;\n\n  addr = hal_cmu_get_bootmode_addr();\n\n  lock = int_lock();\n#if defined(CHIP_BEST3001) || defined(CHIP_BEST3005)\n  *addr = ((*addr & ~bm) & HAL_SW_BOOTMODE_MASK) >> 2;\n#else\n  *addr = (*addr & ~bm) & HAL_SW_BOOTMODE_MASK;\n#endif\n  int_unlock(lock);\n}\n"
  },
  {
    "path": "platform/hal/hal_bootmode.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_BOOTMODE_H__\n#define __HAL_BOOTMODE_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"plat_types.h\"\n\n#define HAL_HW_BOOTMODE_MASK                    (0xF << 0)\n#define HAL_SW_BOOTMODE_MASK                    (0x0FFFFFFF << 4)\n\n// SW_BOOTMODE_START                            (1 << 4)\n#define HAL_SW_BOOTMODE_READ_ENABLED            (1 << 4)\n#define HAL_SW_BOOTMODE_WRITE_ENABLED           (1 << 5)\n#define HAL_SW_BOOTMODE_JTAG_ENABLED            (1 << 6)\n#define HAL_SW_BOOTMODE_FORCE_USB_DLD           (1 << 7)\n#define HAL_SW_BOOTMODE_FORCE_UART_DLD          (1 << 8)\n#define HAL_SW_BOOTMODE_DLD_TRANS_UART          (1 << 9)\n#define HAL_SW_BOOTMODE_SKIP_FLASH_BOOT         (1 << 10)\n#define HAL_SW_BOOTMODE_CHIP_TEST               (1 << 11)\n#define HAL_SW_BOOTMODE_FACTORY                 (1 << 12)\n#define HAL_SW_BOOTMODE_CALIB                   (1 << 13)\n#define HAL_SW_BOOTMODE_ROM_RESERVED_14         (1 << 14)\n#define HAL_SW_BOOTMODE_FLASH_BOOT              (1 << 15)\n#define HAL_SW_BOOTMODE_REBOOT                  (1 << 16)\n#define HAL_SW_BOOTMODE_ROM_RESERVED_17         (1 << 17)\n#define HAL_SW_BOOTMODE_FORCE_USB_PLUG_IN       (1 << 18)\n#define HAL_SW_BOOTMODE_POWER_DOWN_WAKEUP       (1 << 19)\n\n// APP_BOOTMODE_START                           (1 << 20)\n// Add new application bootmodes here (from highest bit to lowest bit)\n\n#define HAL_SW_BOOTMODE_TEST_MASK               (7 << 20)\n#define HAL_SW_BOOTMODE_TEST_MODE               (1 << 20)\n#define HAL_SW_BOOTMODE_TEST_SIGNALINGMODE      (1 << 21)\n#define HAL_SW_BOOTMODE_TEST_NOSIGNALINGMODE    (1 << 22)\n\n#define HAL_SW_BOOTMODE_ENTER_HIDE_BOOT         (1 << 23)\n\n#define HAL_SW_BOOTMODE_RESERVED_BIT24          (1 << 24)\n#define HAL_SW_BOOTMODE_REBOOT_FROM_CRASH       (1 << 25)\n#define HAL_SW_BOOTMODE_SINGLE_LINE_DOWNLOAD    (1 << 26)\n\n#ifdef __USB_COMM__\n#define HAL_SW_BOOTMODE_CDC_COMM                (1 << 28)\n#endif\n#ifdef ANC_APP\n#define HAL_SW_BOOTMODE_REBOOT_BT_ON            (1 << 29)\n#define HAL_SW_BOOTMODE_REBOOT_ANC_ON           (1 << 30)\n#endif\n\n#ifdef USER_REBOOT_PLAY_MUSIC_AUTO\n#define HAL_SW_BOOTMODE_LOCAL_PLAYER            (1 << 31)\n#endif\n\n// APP_BOOTMODE_END                             (1 << 31)\n// SW_BOOTMODE_END                              (1 << 31)\n\nunion HAL_HW_BOOTMODE_T {\n    struct {\n        uint8_t watchdog    : 1;\n        uint8_t global      : 1;\n        uint8_t rtc         : 1;\n        uint8_t charger     : 1;\n    };\n    uint8_t reg;\n};\n\nunion HAL_HW_BOOTMODE_T hal_rom_hw_bootmode_get(void);\n\nunion HAL_HW_BOOTMODE_T hal_hw_bootmode_get(void);\n\nvoid hal_hw_bootmode_init(void);\n\nuint32_t hal_sw_bootmode_get(void);\n\nvoid hal_sw_bootmode_set(uint32_t bm);\n\nvoid hal_sw_bootmode_clear(uint32_t bm);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_btdump.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n\n#ifdef BTDUMP_BASE\n\n#include \"hal_btdump.h\"\n#include \"hal_cmu.h\"\n\n#define BTDUMP_DMA_CTL_REG_OFFSET 0x30\n#define BTDUMP_DMA_CTL_MASK 0xFFFFFFFE\n#define BTDUMP_DEVICE_EN_MASK 0xFFFFFFFE\n#define BTDUMP_FM_PSD_MASK 0xFFFFFFDF\n#define BTDUMP_DEVICE_EN (1 << 0)\n#define BTDUMP_DMA_CTL_EN (1 << 0)\n#define BTDUMP_FM_PSD_EN (1 << 5)\n#define BTDUMP_DMA_CTL_DISABLE (0 << 0)\n#define BTDUMP_DEVICE_DISABLE (0 << 0)\n\n#define btdump_read32(b, a) (*(volatile uint32_t *)(b + a))\n\n#define btdump_write32(v, b, a) ((*(volatile uint32_t *)(b + a)) = v)\n\nvoid hal_btdump_clk_enable(void) {\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_BT_DUMP);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_BT_DUMP);\n}\n\nvoid hal_btdump_clk_disable(void) {\n  hal_cmu_reset_set(HAL_CMU_MOD_H_BT_DUMP);\n  hal_cmu_clock_disable(HAL_CMU_MOD_H_BT_DUMP);\n}\n\nvoid hal_btdump_enable(void) {\n  uint32_t val;\n\n  val = btdump_read32(BTDUMP_BASE, BTDUMP_DMA_CTL_REG_OFFSET);\n  val &= BTDUMP_DMA_CTL_MASK;\n  val |= BTDUMP_DMA_CTL_EN;\n  btdump_write32(val, BTDUMP_BASE, BTDUMP_DMA_CTL_REG_OFFSET);\n\n  val = btdump_read32(BTDUMP_BASE, 0);\n  val &= BTDUMP_DEVICE_EN_MASK;\n  val |= BTDUMP_DEVICE_EN;\n  val &= BTDUMP_FM_PSD_MASK;\n  val |= BTDUMP_FM_PSD_EN;\n  btdump_write32(val, BTDUMP_BASE, 0);\n}\n\nvoid hal_btdump_disable(void) {\n  uint32_t val;\n\n  val = btdump_read32(BTDUMP_BASE, BTDUMP_DMA_CTL_REG_OFFSET);\n  val &= BTDUMP_DMA_CTL_MASK;\n  val |= BTDUMP_DMA_CTL_DISABLE;\n  btdump_write32(val, BTDUMP_BASE, BTDUMP_DMA_CTL_REG_OFFSET);\n\n  val = btdump_read32(BTDUMP_BASE, 0);\n  val &= BTDUMP_DEVICE_EN_MASK;\n  val |= BTDUMP_DEVICE_DISABLE;\n  btdump_write32(val, BTDUMP_BASE, 0);\n}\n\n#endif"
  },
  {
    "path": "platform/hal/hal_btdump.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_BTDUMP_H__\n#define __HAL_BTDUMP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid hal_btdump_clk_enable(void);\nvoid hal_btdump_clk_disable(void);\n\nvoid hal_btdump_enable(void);\nvoid hal_btdump_disable(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "platform/hal/hal_btpcm.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n\n#ifdef BTPCM_BASE\n\n#include \"hal_btpcm.h\"\n#include \"hal_btpcmip.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"plat_types.h\"\n#include \"reg_btpcmip.h\"\n\n//#define BTPCM_CLOCK_SOURCE 240000000\n#define BTPCM_CLOCK_SOURCE 22579200\n//#define BTPCM_CLOCK_SOURCE 48000000\n//#define BTPCM_CLOCK_SOURCE 3072000\n\n//#define BTPCM_CLOCK_SOURCE 76800000\n//#define BTPCM_CLOCK_SOURCE 84672000\n\n//#define HAL_BTPCM_TX_FIFO_TRIGGER_LEVEL   (BTPCMIP_FIFO_DEPTH/2)\n//#define HAL_BTPCM_RX_FIFO_TRIGGER_LEVEL   (BTPCMIP_FIFO_DEPTH/2)\n\n#define HAL_BTPCM_TX_FIFO_TRIGGER_LEVEL (1)\n#define HAL_BTPCM_RX_FIFO_TRIGGER_LEVEL (0)\n\n#define HAL_BTPCM_YES 1\n#define HAL_BTPCM_NO 0\n\nstatic const char *const invalid_id = \"Invalid BTPCM ID: %d\\n\";\n// static const char * const invalid_ch = \"Invalid BTPCM CH: %d\\n\";\n\nstatic bool btpcm_opened[HAL_BTPCM_ID_NUM][AUD_STREAM_NUM];\n\nstatic inline POSSIBLY_UNUSED unsigned char reverse(unsigned char in) {\n  uint8_t out = 0;\n  uint32_t i = 0;\n  for (i = 0; i < 8; ++i) {\n    if ((1 << i & in))\n      out = out | (1 << (7 - i));\n    else\n      out = out & (~(1 << (7 - i)));\n  }\n\n  return out;\n}\n\nstatic inline uint32_t _btpcm_get_reg_base(enum HAL_BTPCM_ID_T id) {\n  ASSERT(id < HAL_BTPCM_ID_NUM, invalid_id, id);\n\n  switch (id) {\n  case HAL_BTPCM_ID_0:\n  default:\n    return BTPCM_BASE;\n    break;\n  }\n  return 0;\n}\n\nint hal_btpcm_open(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n\n  reg_base = _btpcm_get_reg_base(id);\n\n  if (!btpcm_opened[id][AUD_STREAM_PLAYBACK] &&\n      !btpcm_opened[id][AUD_STREAM_CAPTURE]) {\n    // Init to slave mode before enabling module clock\n    // Make sure the clock mux is switched when there is no clock active\n    hal_cmu_pcm_set_slave_mode(true);\n    hal_cmu_pcm_clock_enable();\n\n    hal_cmu_clock_enable(HAL_CMU_MOD_O_PCM);\n    hal_cmu_clock_enable(HAL_CMU_MOD_P_PCM);\n    hal_cmu_reset_clear(HAL_CMU_MOD_O_PCM);\n    hal_cmu_reset_clear(HAL_CMU_MOD_P_PCM);\n\n    // After release pclk reset, need delay 2 tick to access any pcm reg.\n    hal_sys_timer_delay(2);\n    btpcmip_pcm_clk_open_en(reg_base, 0);\n\n    btpcmip_w_enable_rx_dma(reg_base, HAL_BTPCM_NO);\n    btpcmip_w_enable_tx_dma(reg_base, HAL_BTPCM_NO);\n\n    btpcmip_flush_tx_fifo(reg_base);\n    btpcmip_flush_rx_fifo(reg_base);\n\n    btpcmip_w_slot_sel(reg_base, 0);\n    btpcmip_w_shortsync(reg_base, HAL_BTPCM_YES);\n    btpcmip_w_signin(reg_base, HAL_BTPCM_YES);\n    btpcmip_w_mask1mask2(reg_base, 0);\n    btpcmip_w_enable_btpcmip(reg_base, HAL_BTPCM_YES);\n\n    // Generate 10 clock cycles for BTPCM module to initialize its states\n    for (int i = 0; i < 10; i++) {\n      hal_cmu_pcm_set_slave_mode(false);\n      hal_cmu_pcm_set_slave_mode(true);\n    }\n\n    // btpcmip_w_length(reg_base, 0x05);         //16 bit\n  }\n\n  btpcm_opened[id][stream] = true;\n\n  return 0;\n}\n\nint hal_btpcm_close(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n\n  reg_base = _btpcm_get_reg_base(id);\n\n  btpcm_opened[id][stream] = false;\n\n  if (!btpcm_opened[id][AUD_STREAM_PLAYBACK] &&\n      !btpcm_opened[id][AUD_STREAM_CAPTURE]) {\n    btpcmip_w_enable_btpcmip(reg_base, HAL_BTPCM_NO);\n\n    // don't need flush rx and tx fifo\n\n    hal_cmu_reset_set(HAL_CMU_MOD_P_PCM);\n    hal_cmu_reset_set(HAL_CMU_MOD_O_PCM);\n    hal_cmu_clock_disable(HAL_CMU_MOD_P_PCM);\n    hal_cmu_clock_disable(HAL_CMU_MOD_O_PCM);\n    hal_cmu_pcm_clock_disable();\n  }\n\n  return 0;\n}\n\nint hal_btpcm_start_stream(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream) {\n  return 0;\n}\n\nint hal_btpcm_stop_stream(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream) {\n  return 0;\n}\n\nint hal_btpcm_setup_stream(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream,\n                           struct HAL_BTPCM_CONFIG_T *cfg) {\n  uint32_t reg_base;\n\n  reg_base = _btpcm_get_reg_base(id);\n\n  if (!btpcm_opened[id][stream]) {\n    return 1;\n  }\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    // dma config\n    btpcmip_w_tx_fifo_threshold(reg_base, HAL_BTPCM_TX_FIFO_TRIGGER_LEVEL);\n    btpcmip_w_enable_tx_dma(reg_base, HAL_BTPCM_YES);\n  } else {\n    // dma config\n    btpcmip_w_rx_fifo_threshold(reg_base, HAL_BTPCM_RX_FIFO_TRIGGER_LEVEL);\n    btpcmip_w_enable_rx_dma(reg_base, HAL_BTPCM_YES);\n  }\n\n  // hal_sys_timer_delay(2);\n\n  btpcmip_pcm_clk_open_en(reg_base, 1);\n\n  return 0;\n}\n\nint hal_btpcm_send(enum HAL_BTPCM_ID_T id, uint8_t *value, uint32_t value_len) {\n  uint32_t i = 0;\n  uint32_t reg_base;\n\n  reg_base = _btpcm_get_reg_base(id);\n\n  for (i = 0; i < value_len; i += 4) {\n    while (!(btpcmip_r_int_status(reg_base) &\n             BTPCMIP_INT_STATUS_TX_FIFO_EMPTY_MASK))\n      ;\n\n    btpcmip_w_tx_fifo(reg_base, value[i + 1] << 8 | value[i]);\n  }\n\n  return 0;\n}\nuint8_t hal_btpcm_recv(enum HAL_BTPCM_ID_T id, uint8_t *value,\n                       uint32_t value_len) {\n  ASSERT(id < HAL_BTPCM_ID_NUM, invalid_id, id);\n  return 0;\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_btpcm.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_BTPCM_H__\n#define __HAL_BTPCM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_aud.h\"\n\nenum HAL_BTPCM_ID_T {\n\tHAL_BTPCM_ID_0 = 0,\n\tHAL_BTPCM_ID_NUM,\n};\n\nstruct HAL_BTPCM_CONFIG_T {\n    uint32_t bits;\n    uint32_t channel_num;\n    uint32_t sample_rate;\n\n    uint32_t use_dma;\n};\n\nint hal_btpcm_open(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream);\nint hal_btpcm_close(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream);\nint hal_btpcm_start_stream(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream);\nint hal_btpcm_stop_stream(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream);\nint hal_btpcm_setup_stream(enum HAL_BTPCM_ID_T id, enum AUD_STREAM_T stream, struct HAL_BTPCM_CONFIG_T *cfg);\nint hal_btpcm_send(enum HAL_BTPCM_ID_T id, uint8_t *value, uint32_t value_len);\nuint8_t hal_btpcm_recv(enum HAL_BTPCM_ID_T id, uint8_t *value, uint32_t value_len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_btpcmip.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_BTPCMIP_H__\n#define __HAL_BTPCMIP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"reg_btpcmip.h\"\n\n#define btpcmip_read32(b,a) \\\n     (*(volatile uint32_t *)(b+a))\n\n#define btpcmip_write32(v,b,a) \\\n     ((*(volatile uint32_t *)(b+a)) = v)\n\nstatic inline void btpcmip_w_enable_btpcmip(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n\n    val = btpcmip_read32(reg_base, BTPCMIP_ENABLE_REG_REG_OFFSET);\n    if (v)\n        val |= BTPCMIP_ENABLE_REG_BTPCM_ENABLE_MASK;\n    else\n        val &= ~BTPCMIP_ENABLE_REG_BTPCM_ENABLE_MASK;\n\n    btpcmip_write32(val, reg_base, BTPCMIP_ENABLE_REG_REG_OFFSET);\n}\n\nstatic inline void btpcmip_flush_rx_fifo(uint32_t reg_base)\n{\n    uint32_t val = 0;\n    val = btpcmip_read32(reg_base, BTPCMIP_RX_FIFO_FLUSH_REG_OFFSET);\n\n    val |= BTPCMIP_RX_FIFO_FLUSH_MASK;\n\n    val &= ~BTPCMIP_RX_FIFO_FLUSH_MASK;\n\n    btpcmip_write32(val, reg_base, BTPCMIP_RX_FIFO_FLUSH_REG_OFFSET);\n}\n\nstatic inline void btpcmip_flush_tx_fifo(uint32_t reg_base)\n{\n    uint32_t val = 0;\n    val = btpcmip_read32(reg_base, BTPCMIP_TX_FIFO_FLUSH_REG_OFFSET);\n\n    val |= BTPCMIP_TX_FIFO_FLUSH_MASK;\n\n    val &= ~BTPCMIP_TX_FIFO_FLUSH_MASK;\n\n    btpcmip_write32(val, reg_base, BTPCMIP_TX_FIFO_FLUSH_REG_OFFSET);\n}\n\nstatic inline void btpcmip_w_tx_fifo(uint32_t reg_base, uint32_t v)\n{\n    btpcmip_write32(v, reg_base, BTPCMIP_TX_BUFF_REG_OFFSET);\n}\n\n////config btpcm parameter\nstatic inline void btpcmip_w_shortsync(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n    val = btpcmip_read32(reg_base, BTPCMIP_CR_REG_OFFSET);\n    if (v)\n        val |= BTPCMIP_CR_SYNCSHORT_MASK;\n    else\n        val &= ~BTPCMIP_CR_SYNCSHORT_MASK;\n    btpcmip_write32(val, reg_base, BTPCMIP_CR_REG_OFFSET);\n}\n\nstatic inline void btpcmip_w_length(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n    val = btpcmip_read32(reg_base, BTPCMIP_CR_REG_OFFSET);\n    val &= ~BTPCMIP_CR_LENTH_MASK;\n    val |= (BTPCMIP_CR_LENTH_MASK & (v << BTPCMIP_CR_LENTH_SHIFT));\n    btpcmip_write32(val, reg_base, BTPCMIP_CR_REG_OFFSET);\n}\n\nstatic inline void btpcmip_w_slot_sel(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n    val = btpcmip_read32(reg_base, BTPCMIP_CR_REG_OFFSET);\n    val &= ~BTPCMIP_CR_SLOTSEL_MASK;\n    val |= v;\n    btpcmip_write32(val, reg_base, BTPCMIP_CR_REG_OFFSET);\n}\n\nstatic inline void btpcmip_pcm_clk_open_en(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n    val = btpcmip_read32(reg_base, BTPCMIP_CR_REG_OFFSET);\n    val &= ~BTPCMIP_CR_PCM_CLK_OPEN_EN_MASK;\n    val |= v<= 2)) ||            \\\n    (defined(CHIP_HAS_PSRAMUHS) && defined(PSRAMUHS_ENABLE))\n  uint32_t val;\n\n  val = cacheip_read32(reg_base, WRITEBUFFER_ENABLE_REG_OFFSET);\n  if (v) {\n    val |= WRITE_BACK_EN;\n  } else {\n    val &= ~WRITE_BACK_EN;\n  }\n  cacheip_write32(val, reg_base, WRITEBUFFER_ENABLE_REG_OFFSET);\n#endif\n#endif\n}\n__STATIC_FORCEINLINE void cacheip_flush_writebuffer(uint32_t reg_base) {\n  cacheip_write32(1, reg_base, WRITEBUFFER_FLUSH_REG_OFFSET);\n}\n__STATIC_FORCEINLINE void cacheip_set_invalidate_address(uint32_t reg_base,\n                                                         uint32_t v) {\n  cacheip_write32(v, reg_base, INVALIDATE_ADDRESS_REG_OFFSET);\n}\n__STATIC_FORCEINLINE void cacheip_trigger_invalidate(uint32_t reg_base) {\n  cacheip_write32(1, reg_base, INVALIDATE_SET_CMD_REG_OFFSET);\n}\n__STATIC_FORCEINLINE void cacheip_trigger_sync(uint32_t reg_base) {\n  cacheip_write32(1, reg_base, SYNC_CMD_REG_OFFSET);\n}\n/* cache controller end */\n\n/* hal api */\n__STATIC_FORCEINLINE uint32_t _cache_get_reg_base(enum HAL_CACHE_ID_T id) {\n  uint32_t base;\n\n  if (id == HAL_CACHE_ID_I_CACHE) {\n    base = ICACHE_CTRL_BASE;\n  } else if (id == HAL_CACHE_ID_D_CACHE) {\n#ifdef DCACHE_CTRL_BASE\n    base = DCACHE_CTRL_BASE;\n#else\n    base = 0;\n#endif\n  } else {\n    base = 0;\n  }\n\n  return base;\n}\nuint8_t BOOT_TEXT_FLASH_LOC hal_cache_enable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_init_cache(reg_base);\n  cacheip_enable_cache(reg_base, HAL_CACHE_YES);\n\n  return 0;\n}\nuint8_t SRAM_TEXT_LOC hal_cache_disable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n#if !(defined(ROM_BUILD) || defined(PROGRAMMER))\n#if (CHIP_CACHE_VER >= 2)\n  uint32_t val;\n\n  do {\n    val = cacheip_read32(reg_base, STATUS_REG_OFFSET);\n  } while (val & STATUS_FETCHING);\n#else\n  uint32_t time;\n\n  time = hal_sys_timer_get();\n  while (hal_norflash_busy() && (hal_sys_timer_get() - time) < MS_TO_TICKS(2))\n    ;\n  // Delay for at least 8 cycles till the cache becomes idle\n  for (int delay = 0; delay < 8; delay++) {\n    asm volatile(\"nop\");\n  }\n#endif\n#endif\n\n  cacheip_enable_cache(reg_base, HAL_CACHE_NO);\n\n  return 0;\n}\nuint8_t BOOT_TEXT_FLASH_LOC\nhal_cache_writebuffer_enable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_writebuffer(reg_base, HAL_CACHE_YES);\n\n  return 0;\n}\nuint8_t hal_cache_writebuffer_disable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_writebuffer(reg_base, HAL_CACHE_NO);\n\n  return 0;\n}\nuint8_t hal_cache_writebuffer_flush(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_flush_writebuffer(reg_base);\n\n  return 0;\n}\nuint8_t BOOT_TEXT_FLASH_LOC hal_cache_writeback_enable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_writeback(reg_base, HAL_CACHE_YES);\n\n  return 0;\n}\nuint8_t hal_cache_writeback_disable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_writeback(reg_base, HAL_CACHE_NO);\n\n  return 0;\n}\n// Wrap is enabled during flash init\nuint8_t BOOT_TEXT_SRAM_LOC hal_cache_wrap_enable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_wrap(reg_base, HAL_CACHE_YES);\n\n  return 0;\n}\nuint8_t hal_cache_wrap_disable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_wrap(reg_base, HAL_CACHE_NO);\n\n  return 0;\n}\n// Flash timing calibration might need to invalidate cache\nuint8_t BOOT_TEXT_SRAM_LOC hal_cache_invalidate(enum HAL_CACHE_ID_T id,\n                                                uint32_t start_address,\n                                                uint32_t len) {\n  uint32_t reg_base;\n  uint32_t end_address;\n  uint32_t lock;\n\n#ifndef DCACHE_CTRL_BASE\n  if (id == HAL_CACHE_ID_D_CACHE) {\n    id = HAL_CACHE_ID_I_CACHE;\n  }\n#endif\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  lock = int_lock_global();\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST1400)\n  uint32_t time;\n\n  time = hal_sys_timer_get();\n  while (hal_norflash_busy() && (hal_sys_timer_get() - time) < MS_TO_TICKS(2))\n    ;\n  // Delay for at least 8 cycles till the cache becomes idle\n  for (int delay = 0; delay < 8; delay++) {\n    asm volatile(\"nop\");\n  }\n#endif\n\n  if (len >= CACHE_SIZE / 2) {\n    cacheip_init_cache(reg_base);\n    cacheip_init_cache(reg_base);\n  } else {\n    end_address = start_address + len;\n    start_address &= (~(CACHE_LINE_SIZE - 1));\n    while (start_address < end_address) {\n      cacheip_set_invalidate_address(reg_base, start_address);\n      cacheip_trigger_invalidate(reg_base);\n      cacheip_trigger_invalidate(reg_base);\n      start_address += CACHE_LINE_SIZE;\n    }\n  }\n\n  int_unlock_global(lock);\n\n  return 0;\n}\nuint8_t hal_cache_invalidate_all(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  // warning BEST1501 may change this reg offset to 0x38\n  cacheip_write32(1, reg_base, CACHE_INI_CMD_REG_OFFSET);\n  cacheip_write32(1, reg_base, CACHE_INI_CMD_REG_OFFSET);\n  return 0;\n}\nuint8_t hal_cache_sync(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cache_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_trigger_sync(reg_base);\n\n  return 0;\n}\n\n#ifdef CHIP_HAS_CP\n__STATIC_FORCEINLINE uint32_t _cachecp_get_reg_base(enum HAL_CACHE_ID_T id) {\n  uint32_t base;\n\n  if (id == HAL_CACHE_ID_I_CACHE) {\n    base = ICACHECP_CTRL_BASE;\n  } else if (id == HAL_CACHE_ID_D_CACHE) {\n#ifdef DCACHECP_CTRL_BASE\n    base = DCACHECP_CTRL_BASE;\n#else\n    base = 0;\n#endif\n  } else {\n    base = 0;\n  }\n\n  return base;\n}\nuint8_t hal_cachecp_enable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n  uint32_t main_cache_reg_base;\n  enum HAL_CMU_MOD_ID_T mod;\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  if (id == HAL_CACHE_ID_D_CACHE) {\n    mod = HAL_CMU_H_DCACHECP;\n  } else {\n    mod = HAL_CMU_H_ICACHECP;\n  }\n  hal_cmu_clock_enable(mod);\n  hal_cmu_reset_clear(mod);\n\n  cacheip_init_cache(reg_base);\n  cacheip_enable_cache(reg_base, HAL_CACHE_YES);\n  // Init wrap option\n  main_cache_reg_base = _cache_get_reg_base(id);\n  if (main_cache_reg_base == 0) {\n    return 0;\n  }\n  cacheip_enable_wrap(reg_base, cacheip_wrap_enabled(main_cache_reg_base));\n\n  return 0;\n}\nuint8_t CP_TEXT_SRAM_LOC hal_cachecp_disable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n  enum HAL_CMU_MOD_ID_T mod;\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n#if !(defined(ROM_BUILD) || defined(PROGRAMMER))\n  uint32_t val;\n\n  do {\n    val = cacheip_read32(reg_base, STATUS_REG_OFFSET);\n  } while (val & STATUS_FETCHING);\n#endif\n\n  cacheip_enable_cache(reg_base, HAL_CACHE_NO);\n\n  if (id == HAL_CACHE_ID_D_CACHE) {\n    mod = HAL_CMU_H_DCACHECP;\n  } else {\n    mod = HAL_CMU_H_ICACHECP;\n  }\n  hal_cmu_reset_set(mod);\n  hal_cmu_clock_disable(mod);\n\n  return 0;\n}\nuint8_t hal_cachecp_writebuffer_enable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_writebuffer(reg_base, HAL_CACHE_YES);\n\n  return 0;\n}\nuint8_t hal_cachecp_writebuffer_disable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_writebuffer(reg_base, HAL_CACHE_NO);\n\n  return 0;\n}\nuint8_t hal_cachecp_writebuffer_flush(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_flush_writebuffer(reg_base);\n\n  return 0;\n}\nuint8_t hal_cachecp_writeback_enable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_writeback(reg_base, HAL_CACHE_YES);\n\n  return 0;\n}\nuint8_t hal_cachecp_writeback_disable(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_enable_writeback(reg_base, HAL_CACHE_NO);\n\n  return 0;\n}\nuint8_t CP_TEXT_SRAM_LOC hal_cachecp_invalidate(enum HAL_CACHE_ID_T id,\n                                                uint32_t start_address,\n                                                uint32_t len) {\n  uint32_t reg_base;\n  uint32_t end_address;\n\n#ifndef DCACHECP_CTRL_BASE\n  if (id == HAL_CACHE_ID_D_CACHE) {\n    id = HAL_CACHE_ID_I_CACHE;\n  }\n#endif\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  if (len >= CACHE_SIZE / 2) {\n    cacheip_init_cache(reg_base);\n    cacheip_init_cache(reg_base);\n  } else {\n    end_address = start_address + len;\n    start_address &= (~(CACHE_LINE_SIZE - 1));\n    while (start_address < end_address) {\n      cacheip_set_invalidate_address(reg_base, start_address);\n      cacheip_trigger_invalidate(reg_base);\n      cacheip_trigger_invalidate(reg_base);\n      start_address += CACHE_LINE_SIZE;\n    }\n  }\n\n  return 0;\n}\nuint8_t hal_cachecp_sync(enum HAL_CACHE_ID_T id) {\n  uint32_t reg_base = 0;\n\n  reg_base = _cachecp_get_reg_base(id);\n  if (reg_base == 0) {\n    return 0;\n  }\n\n  cacheip_trigger_sync(reg_base);\n\n  return 0;\n}\n#endif\n"
  },
  {
    "path": "platform/hal/hal_cache.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef CACHE_HAL_H\n#define CACHE_HAL_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nenum HAL_CACHE_ID_T {\n    HAL_CACHE_ID_I_CACHE = 0,\n    HAL_CACHE_ID_D_CACHE,\n    HAL_CACHE_ID_NUM,\n};\n\nuint8_t hal_cache_enable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_disable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_writebuffer_enable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_writebuffer_disable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_writebuffer_flush(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_writeback_enable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_writeback_disable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_wrap_enable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_wrap_disable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cache_invalidate(enum HAL_CACHE_ID_T id, uint32_t start_address, uint32_t len);\nuint8_t hal_cache_sync(enum HAL_CACHE_ID_T id);\n\nuint8_t hal_cachecp_enable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cachecp_disable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cachecp_writebuffer_enable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cachecp_writebuffer_disable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cachecp_writebuffer_flush(enum HAL_CACHE_ID_T id);\nuint8_t hal_cachecp_writeback_enable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cachecp_writeback_disable(enum HAL_CACHE_ID_T id);\nuint8_t hal_cachecp_invalidate(enum HAL_CACHE_ID_T id, uint32_t start_address, uint32_t len);\nuint8_t hal_cachecp_sync(enum HAL_CACHE_ID_T id);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* CACHE_HAL_H */\n"
  },
  {
    "path": "platform/hal/hal_chipid.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_chipid.h\"\n#include \"hal_location.h\"\n\nenum HAL_CHIP_METAL_ID_T BOOT_BSS_LOC metal_id;\n\nuint32_t WEAK BOOT_TEXT_FLASH_LOC read_hw_metal_id(void) {\n  return HAL_CHIP_METAL_ID_0;\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_chipid_init(void) {\n  metal_id = read_hw_metal_id();\n}\n\nenum HAL_CHIP_METAL_ID_T BOOT_TEXT_SRAM_LOC hal_get_chip_metal_id(void) {\n  return metal_id;\n}\n\nenum HAL_BT_CHIP_SERIES_T hal_get_bt_chip_series(void) {\n#if (defined(CHIP_BEST1000)) || defined(CHIP_BEST2000)\n  return HAL_BT_CHIP_SERIES_2000;\n#elif defined(CHIP_BEST2500)\n  return HAL_BT_CHIP_SERIES_2500;\n#else // (defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||\n      // defined(CHIP_BEST1400) || defined(CHIP_BEST1402))\n  return HAL_BT_CHIP_SERIES_2300;\n#endif\n}\n"
  },
  {
    "path": "platform/hal/hal_chipid.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_CHIPID_H__\n#define __HAL_CHIPID_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\n// BEST1000: A=0 C=1 D=2 F=3 G=4 I=5\n// BEST1400: A=0 B=1 C=2(cmuRev=2&diffRom) D=3 E=4(cmuRev=3&diffRom) F=5(cmuRev=4)\n// BEST1402: A=0 B=1\n// BEST2000: A=0 C=1 D=2 E=3(rev=2&aonRev=4) F=4 G=5\n// BEST2300: A=0 B=1(rfRev=15) C=3 D=4 E=5(rfRev=4&diffRom)\n\nenum HAL_CHIP_METAL_ID_T {\n    HAL_CHIP_METAL_ID_0,\n    HAL_CHIP_METAL_ID_1,\n    HAL_CHIP_METAL_ID_2,\n    HAL_CHIP_METAL_ID_3,\n    HAL_CHIP_METAL_ID_4,\n    HAL_CHIP_METAL_ID_5,\n    HAL_CHIP_METAL_ID_6,\n    HAL_CHIP_METAL_ID_7,\n    HAL_CHIP_METAL_ID_8,\n    HAL_CHIP_METAL_ID_9,\n    HAL_CHIP_METAL_ID_10,\n    HAL_CHIP_METAL_ID_11,\n    HAL_CHIP_METAL_ID_12,\n    HAL_CHIP_METAL_ID_13,\n    HAL_CHIP_METAL_ID_14,\n    HAL_CHIP_METAL_ID_15,\n};\n\nenum HAL_BT_CHIP_SERIES_T {\n    HAL_BT_CHIP_SERIES_2000,\n    HAL_BT_CHIP_SERIES_2300,\n    HAL_BT_CHIP_SERIES_2500,\n};\n\n// Invoked by hal_chipid_init() only\nuint32_t read_hw_metal_id(void);\n\nvoid hal_chipid_init(void);\n\nenum HAL_CHIP_METAL_ID_T hal_get_chip_metal_id(void);\nenum HAL_BT_CHIP_SERIES_T hal_get_bt_chip_series(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_cmd.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_cmd.h\"\n#include \"hal_iomux.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"string.h\"\n\n/*\n|-----|-------|----------------------------------|\n|     |  crc  |           Discription            |\n|     | ----- | -------------------------------- |\n|     |   -3  |      Can not find head name      |\n|     | ----- | -------------------------------- |\n|     |   -2  |  Can not find callback function  |\n|     | ----- | -------------------------------- |\n| res |   -1  |          Unknown issue           |\n|     | ----- | -------------------------------- |\n|     |   0   |                OK                |\n|     | ----- | -------------------------------- |\n|     |   1   |    Data length is mismatching    |\n|     | ----- | -------------------------------- |\n|     |   >1  |      Issue from application      |\n|-----|-------|----------------------------------|\n */\n\n#define HAL_CMD_PREFIX_SIZE 4\n#define HAL_CMD_CRC_SIZE 4\n#define HAL_CMD_NAME_SIZE 12\n#define HAL_CMD_LEN_SIZE 4\n#define HAL_CMD_DATA_MAX_SIZE 1024 * 3\n\n// #define HAL_CMD_PREFIX_OFFSET           0\n// #define HAL_CMD_TYPE_OFFSET     1\n// #define HAL_CMD_SEQ_OFFSET      2\n// #define HAL_CMD_LEN_OFFSET      3\n// #define HAL_CMD_CMD_OFFSET      4\n// #define HAL_CMD_DATA_OFFSET     5\n\n// #define HAL_CMD_PREFIX          0xFE\n// #define HAL_CMD_TYPE            0xA0\n\n#define HAL_CMD_RX_BUF_SIZE                                                    \\\n  (HAL_CMD_PREFIX_SIZE + HAL_CMD_NAME_SIZE + HAL_CMD_CRC_SIZE +                \\\n   HAL_CMD_LEN_SIZE + HAL_CMD_DATA_MAX_SIZE)\n#define HAL_CMD_TX_BUF_SIZE (100)\n\n#define HAL_CMD_LIST_NUM 10\n\n#ifdef USB_EQ_TUNING\n#define STATIC\n#else\n#define STATIC static\n#endif\n\n#ifdef USB_EQ_TUNING\n#ifdef __PC_CMD_UART__\n#error \"USB_EQ_TUNING can not be defined together with PC_CMD_UART\"\n#endif\n#endif\n\ntypedef struct {\n  uint32_t len;\n  uint8_t data[HAL_CMD_TX_BUF_SIZE - 13];\n} hal_cmd_res_payload_t;\n\ntypedef struct {\n  int prefix;\n  int crc;\n  char name[HAL_CMD_NAME_SIZE];\n} hal_cmd_res_t;\n\ntypedef struct {\n  int prefix;\n  int crc;\n  char *name;\n  uint32_t len;\n  uint8_t *data;\n} hal_cmd_cfg_t;\n\ntypedef struct {\n  char name[HAL_CMD_NAME_SIZE];\n  hal_cmd_callback_t callback;\n} hal_cmd_list_t;\n\ntypedef struct {\n  uint8_t uart_work;\n  hal_cmd_rx_status_t rx_status;\n  uint8_t cur_seq;\n\n#ifdef __PC_CMD_UART__\n  uint8_t rx_len;\n#endif\n  uint8_t tx_len;\n#ifdef __PC_CMD_UART__\n  uint8_t rx_buf[HAL_CMD_RX_BUF_SIZE];\n#endif\n  uint8_t tx_buf[HAL_CMD_TX_BUF_SIZE];\n\n  hal_cmd_res_t res;\n  hal_cmd_res_payload_t res_payload;\n\n  uint32_t list_num;\n  hal_cmd_list_t list[HAL_CMD_LIST_NUM];\n} hal_cmd_t;\n\nhal_cmd_t hal_cmd;\nCMD_CALLBACK_HANDLER_T hal_cmd_callback = NULL;\n\n#ifdef __PC_CMD_UART__\n\n#define HAL_CMD_ID HAL_UART_ID_0\n\nstatic const struct HAL_UART_CFG_T hal_cmd_cfg = {\n    .parity = HAL_UART_PARITY_NONE,\n    .stop = HAL_UART_STOP_BITS_1,\n    .data = HAL_UART_DATA_BITS_8,\n    .flow = HAL_UART_FLOW_CONTROL_NONE, // HAL_UART_FLOW_CONTROL_RTSCTS,\n    .tx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .rx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .baud = 115200,\n    .dma_rx = true,\n    .dma_tx = true,\n    .dma_rx_stop_on_err = false,\n};\n#endif\n\n#define HAL_CMD_TRACE TRACE\n\n#ifdef __PC_CMD_UART__\nSTATIC int hal_cmd_list_process(uint8_t *buf);\n#endif\nstatic int hal_cmd_list_register(char *name, hal_cmd_callback_t callback);\n\n#ifdef __PC_CMD_UART__\nvoid hal_cmd_break_irq_handler(void) {\n  HAL_CMD_TRACE(1, \"%s\", __func__);\n\n  // gElCtx.sync_step = EL_SYNC_ERROR;\n}\n\nvoid hal_cmd_dma_rx_irq_handler(uint32_t xfer_size, int dma_error,\n                                union HAL_UART_IRQ_T status) {\n  //\tuint8_t prefix\t= gpElUartCtx->rx_buf[EL_PREFIX_OFFSET];\n  //\tuint8_t type\t= gpElUartCtx->rx_buf[EL_TYPE_OFFSET];\n  //\tuint8_t len\t\t= gpElUartCtx->rx_buf[EL_LEN_OFFSET];\n  //\tuint8_t cmd\t= gpElUartCtx->rx_buf[EL_CMD_OFFSET];\n  HAL_CMD_TRACE(5,\n                \"%s: xfer_size[%d], dma_error[%x], status[%x], rx_status[%d]\",\n                __func__, xfer_size, dma_error, status.reg, hal_cmd.rx_status);\n\n  if (status.BE) {\n    hal_cmd_break_irq_handler();\n    return;\n  }\n\n  if (hal_cmd.rx_status != HAL_CMD_RX_START) {\n    return;\n  }\n\n  if (dma_error || status.FE || status.OE || status.PE || status.BE) {\n    // TODO:\n    ;\n  } else {\n    // mask.RT = 1\n    hal_cmd.rx_len = xfer_size;\n    hal_cmd.rx_status = HAL_CMD_RX_DONE;\n    hal_cmd_callback(hal_cmd.rx_status);\n  }\n}\n#endif\n\nint hal_cmd_init(void) {\n#ifdef __PC_CMD_UART__\n  HAL_CMD_TRACE(1, \"[%s]\", __func__);\n  if (HAL_CMD_ID == HAL_UART_ID_0) {\n    hal_iomux_set_uart0();\n  } else if (HAL_CMD_ID == HAL_UART_ID_1) {\n    hal_iomux_set_uart1();\n  }\n\n#endif\n\n#ifdef USB_AUDIO_APP\n  hal_cmd_set_callback(hal_cmd_run);\n#endif\n\n  return 0;\n}\n\nvoid hal_cmd_set_callback(CMD_CALLBACK_HANDLER_T handler) {\n  hal_cmd_callback = handler;\n}\n\n#ifdef __PC_CMD_UART__\nstatic union HAL_UART_IRQ_T mask;\n#endif\n\nint hal_cmd_open(void) {\n#ifdef __PC_CMD_UART__\n  int ret = -1;\n\n  ret = hal_uart_open(HAL_CMD_ID, &hal_cmd_cfg);\n  ASSERT(!ret, \"!!%s: UART open failed (%d)!!\", __func__, ret);\n\n  hal_uart_irq_set_dma_handler(HAL_CMD_ID, hal_cmd_dma_rx_irq_handler, NULL);\n\n  // Do not enable tx and rx interrupt, use dma\n  mask.reg = 0;\n  mask.BE = 1;\n  mask.FE = 1;\n  mask.OE = 1;\n  mask.PE = 1;\n  mask.RT = 1;\n  hal_uart_irq_set_mask(HAL_CMD_ID, mask);\n\n  hal_cmd.uart_work = 1;\n  hal_cmd.rx_status = HAL_CMD_RX_STOP;\n  hal_cmd_callback(hal_cmd.rx_status);\n#endif\n\n  return 0;\n}\n\nint hal_cmd_close(void) {\n#ifdef __PC_CMD_UART__\n  mask.reg = 0;\n  hal_uart_irq_set_mask(HAL_CMD_ID, mask);\n  hal_uart_irq_set_dma_handler(HAL_CMD_ID, NULL, NULL);\n  hal_uart_close(HAL_CMD_ID);\n\n  hal_cmd.uart_work = 0;\n#endif\n\n  return 0;\n}\n\nint hal_cmd_register(char *name, hal_cmd_callback_t callback) {\n  int ret = -1;\n\n  ASSERT(strlen(name) < HAL_CMD_NAME_SIZE,\n         \"[%s] strlen(%s) = %d >= HAL_CMD_NAME_SIZE\", __func__, name,\n         strlen(name));\n\n  ret = hal_cmd_list_register(name, callback);\n\n  return ret;\n}\n\n#ifdef __PC_CMD_UART__\nstatic int hal_cmd_send(void) {\n  int ret = -1;\n\n  if (!hal_cmd.uart_work) {\n    hal_cmd_open();\n  }\n\n  ret =\n      hal_uart_dma_send(HAL_CMD_ID, hal_cmd.tx_buf, hal_cmd.tx_len, NULL, NULL);\n\n  HAL_CMD_TRACE(4, \"%s: %d - %d - %d\", __func__, hal_cmd.tx_len,\n                hal_cmd.uart_work, ret);\n\n  return ret;\n}\n\nstatic int hal_cmd_rx_start(void) {\n  int ret = -1;\n\n  if (!hal_cmd.uart_work) {\n    hal_cmd_open();\n  }\n\n  ret = hal_uart_dma_recv_mask(HAL_CMD_ID, hal_cmd.rx_buf, HAL_CMD_RX_BUF_SIZE,\n                               NULL, NULL, &mask); // HAL_CMD_RX_BUF_SIZE\n\n  ASSERT(!ret, \"!!%s: UART recv failed (%d)!!\", __func__, ret);\n\n  hal_cmd.rx_status = HAL_CMD_RX_START;\n  hal_cmd_callback(hal_cmd.rx_status);\n  return ret;\n}\n\nstatic int hal_cmd_rx_process(void) {\n  int ret = -1;\n\n  HAL_CMD_TRACE(1, \"[%s] start...\", __func__);\n\n  ret = hal_cmd_list_process(hal_cmd.rx_buf);\n\n  hal_cmd.rx_status = HAL_CMD_RX_STOP;\n  hal_cmd_callback(hal_cmd.rx_status);\n  return ret;\n}\n#endif\n\nvoid hal_cmd_set_res_playload(uint8_t *data, int len) {\n  hal_cmd.res_payload.len = len;\n  memcpy(hal_cmd.res_payload.data, data, len);\n}\n\n#ifdef __PC_CMD_UART__\nstatic int hal_cmd_tx_process(void) {\n  int ret = -1;\n\n  HAL_CMD_TRACE(1, \"[%s] start...\", __func__);\n\n#if 0\n    // Test loop\n    hal_cmd.tx_len = hal_cmd.rx_len;\n    memcpy(hal_cmd.tx_buf, hal_cmd.rx_buf, hal_cmd.rx_len);\n#endif\n\n#if 1\n  hal_cmd.tx_len = sizeof(hal_cmd.res);\n  TRACE(5, \"[%s] len : %d, %c, %d, %s\", __func__, hal_cmd.tx_len,\n        hal_cmd.res.prefix, hal_cmd.res.crc, hal_cmd.res.name);\n  memcpy(hal_cmd.tx_buf, &hal_cmd.res, hal_cmd.tx_len);\n\n  if (hal_cmd.res_payload.len) {\n    memcpy(hal_cmd.tx_buf + hal_cmd.tx_len, &hal_cmd.res_payload.len,\n           sizeof(hal_cmd.res_payload.len));\n    hal_cmd.tx_len += sizeof(hal_cmd.res_payload.len);\n\n    memcpy(hal_cmd.tx_buf + hal_cmd.tx_len, hal_cmd.res_payload.data,\n           hal_cmd.res_payload.len);\n    hal_cmd.tx_len += hal_cmd.res_payload.len;\n\n    memset(&hal_cmd.res_payload, 0, sizeof(hal_cmd.res_payload));\n  }\n#else\n  char send_string[] = \"791,\";\n  hal_cmd.tx_len = sizeof(send_string);\n  memcpy(hal_cmd.tx_buf, send_string, hal_cmd.tx_len);\n#endif\n\n  hal_cmd_send();\n\n  return ret;\n}\n#endif\n\n#ifdef USB_EQ_TUNING\n\nvoid hal_cmd_tx_process(uint8_t **ppbuf, uint16_t *plen) {\n  hal_cmd.tx_len = sizeof(hal_cmd.res);\n\n  memcpy(hal_cmd.tx_buf, &hal_cmd.res, hal_cmd.tx_len);\n\n  if (hal_cmd.res_payload.len) {\n    memcpy(hal_cmd.tx_buf + hal_cmd.tx_len, &hal_cmd.res_payload.len,\n           sizeof(hal_cmd.res_payload.len));\n    hal_cmd.tx_len += sizeof(hal_cmd.res_payload.len);\n\n    memcpy(hal_cmd.tx_buf + hal_cmd.tx_len, hal_cmd.res_payload.data,\n           hal_cmd.res_payload.len);\n    hal_cmd.tx_len += hal_cmd.res_payload.len;\n\n    memset(&hal_cmd.res_payload, 0, sizeof(hal_cmd.res_payload));\n  }\n\n  *ppbuf = hal_cmd.tx_buf;\n  *plen = hal_cmd.tx_len;\n}\n\n#endif\n\n#ifdef __PC_CMD_UART__\n\n#ifdef USB_AUDIO_APP\nvoid hal_cmd_run(hal_cmd_rx_status_t status)\n#else\nint hal_cmd_run(hal_cmd_rx_status_t status)\n#endif\n{\n  int ret = -1;\n\n  // static uint32_t pre_time_ms = 0, curr_ticks = 0, curr_time_ms = 0;\n\n  // curr_ticks = hal_sys_timer_get();\n  // curr_time_ms = TICKS_TO_MS(curr_ticks);\n\n  // if(curr_time_ms - pre_time_ms > 1000)\n  // {\n  //     HAL_CMD_TRACE(1,\"[%s] start...\", __func__);\n  //     pre_time_ms = curr_time_ms;\n  // }\n\n  if (status == HAL_CMD_RX_DONE) {\n    ret = hal_cmd_rx_process();\n\n    if (ret) {\n      hal_cmd.res.crc = ret;\n    }\n\n    ret = hal_cmd_tx_process();\n  }\n\n  if (status == HAL_CMD_RX_STOP) {\n    ret = hal_cmd_rx_start();\n  }\n\n#ifndef USB_AUDIO_APP\n  return ret;\n#endif\n}\n#endif\n\n// List process\nstatic int hal_cmd_list_get_id(char *name) {\n  for (int i = 0; i < hal_cmd.list_num; i++) {\n    if (!strcmp(hal_cmd.list[i].name, name)) {\n      return i;\n    }\n  }\n\n  TRACE(2, \"[%s] rx = %s\", __func__, name);\n  for (int i = 0; i < hal_cmd.list_num; i++) {\n    TRACE(3, \"[%s] list[%d] = %s\", __func__, i, hal_cmd.list[i].name);\n  }\n  return -1;\n}\n\nstatic int hal_cmd_list_add(char *name, hal_cmd_callback_t callback) {\n  if (hal_cmd.list_num < HAL_CMD_LIST_NUM) {\n    memcpy(hal_cmd.list[hal_cmd.list_num].name, name, strlen(name));\n    hal_cmd.list[hal_cmd.list_num].callback = callback;\n    hal_cmd.list_num++;\n\n    return 0;\n  } else {\n    return -1;\n  }\n}\n\nstatic int hal_cmd_list_register(char *name, hal_cmd_callback_t callback) {\n  int ret = -1;\n\n  if (hal_cmd_list_get_id(name) == -1) {\n    ret = hal_cmd_list_add(name, callback);\n  } else {\n    ret = -1;\n  }\n\n  return ret;\n}\n\n#if defined(USB_EQ_TUNING) || defined(__PC_CMD_UART__)\nstatic int hal_cmd_list_parse(uint8_t *buf, hal_cmd_cfg_t *cfg) {\n  cfg->prefix = *((uint32_t *)buf);\n  HAL_CMD_TRACE(2, \"[%s] PREFIX = %c\", __func__, cfg->prefix);\n  buf += HAL_CMD_PREFIX_SIZE;\n  hal_cmd.res.prefix = cfg->prefix;\n\n  cfg->crc = *((uint32_t *)buf);\n  HAL_CMD_TRACE(2, \"[%s] crc = %d\", __func__, cfg->crc);\n  buf += HAL_CMD_CRC_SIZE;\n  hal_cmd.res.crc = cfg->crc;\n\n  cfg->name = (char *)buf;\n  HAL_CMD_TRACE(2, \"[%s] NAME = %s\", __func__, cfg->name);\n  buf += HAL_CMD_NAME_SIZE;\n  memcpy(hal_cmd.res.name, cfg->name, HAL_CMD_NAME_SIZE);\n\n  cfg->len = *((uint32_t *)buf);\n  HAL_CMD_TRACE(2, \"[%s] LEN = %d\", __func__, cfg->len);\n  buf += HAL_CMD_LEN_SIZE;\n\n  cfg->data = buf;\n\n  return 0;\n}\n\nSTATIC int hal_cmd_list_process(uint8_t *buf) {\n  int ret = -1;\n  int id = 0;\n  hal_cmd_cfg_t cfg;\n\n  hal_cmd_list_parse(buf, &cfg);\n\n  id = hal_cmd_list_get_id(cfg.name);\n\n  if (id == -1) {\n    TRACE(2, \"[%s] %s is invalid\", __func__, cfg.name);\n    return -2;\n  }\n\n  if (hal_cmd.list[id].callback) {\n    ret = hal_cmd.list[id].callback(cfg.data, cfg.len);\n  } else {\n    TRACE(2, \"[%s] %s has not callback\", __func__, hal_cmd.list[id].name);\n    ret = -3;\n  }\n\n  return ret;\n}\n#endif\n"
  },
  {
    "path": "platform/hal/hal_cmd.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_CMD_H__\n#define __HAL_CMD_H__\n\n#include \"stdint.h\"\n#include \"plat_types.h\"\n\n// typedef enum {\n//         HAL_CMD_ERR_NONE = 0x00,\n//         HAL_CMD_ERR_LEN = 0x01,\n//         HAL_CMD_ERR_CHECKSUM = 0x02,\n//         HAL_CMD_ERR_NOT_SYNC = 0x03,\n\n//         HAL_CMD_ERR_CMD = 0x06,\n\n//         HAL_CMD_ERR_BURN_OK = 0x60,\n//         HAL_CMD_ERR_SECTOR_SIZE = 0x61,\n\n//         HAL_CMD_ERR_BURN_INFO_MISSING = 0x63,\n//         HAL_CMD_ERR_SECTOR_DATA_LEN = 0x64,\n//         HAL_CMD_ERR_SECTOR_DATA_CRC = 0x65,\n//         HAL_CMD_ERR_SECTOR_SEQ = 0x66,\n//         HAL_CMD_ERR_ERASE_FLSH = 0x67,\n//         HAL_CMD_ERR_BURN_FLSH = 0x68,\n// } HAL_CMD_ERR_T;\n\n// typedef enum {\n//         HAL_CMD_GET_PARA = 0x00,\n//         HAL_CMD_SET_PARA,\n//         HAL_CMD_SAVE_PARA,\n//         HAL_CMD_PUSH_PARA,\n\n//         HAL_CMD_PLAYBACK_SWITCH = 0x08,\n//         HAL_CMD_CAPTURE_SWITCH,\n\n//         HAL_CMD_BURN_HANDSHAKE = 0x10,\n//         HAL_CMD_BURN_START,\n//         HAL_CMD_BURN_DATA,\n\n//         HAL_CMD_HANDSHAKE = 0x18,\n//         HAL_CMD_SHUTDOWN,\n//         HAL_CMD_REBOOT,\n//         HAL_CMD_NOTIFICATION,\n\n//         HAL_CMD_INVALID = 0xff\t\n// } EL_CMD_E;\n\n// typedef enum {\n//         HAL_CMD_PARA_SOUND_VOLUME,\n//         HAL_CMD_PARA_LC_SWITCH,\n//         HAL_CMD_PARA_EQ_GAIN,\n//         HAL_CMD_PARA_ANC_SWITCH,\n//         HAL_CMD_PARA_ANC_GAIN,\n\n//         HAL_CMD_PARA_INVALID\n// } EL_PARA_E;\n\ntypedef enum {\n    HAL_CMD_RX_START,\n    HAL_CMD_RX_STOP,\n    HAL_CMD_RX_DONE\n} hal_cmd_rx_status_t;\n\ntypedef int (*hal_cmd_callback_t)(uint8_t *buf, uint32_t  len);\ntypedef void (*CMD_CALLBACK_HANDLER_T)(hal_cmd_rx_status_t status);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nint hal_cmd_init (void);\nint hal_cmd_open (void);\nint hal_cmd_close (void);\n\n#ifdef USB_AUDIO_APP\nvoid hal_cmd_run (hal_cmd_rx_status_t status);\n#else\nint hal_cmd_run (hal_cmd_rx_status_t status);\n#endif\nvoid hal_cmd_set_callback(CMD_CALLBACK_HANDLER_T handler);\nint hal_cmd_register(char *name, hal_cmd_callback_t callback);\n\n#ifdef USB_EQ_TUNING\nint hal_cmd_list_process(uint8_t *buf);\nvoid hal_cmd_tx_process (uint8_t** ppbuf, uint16_t* plen);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n// hal_cmd_t *hal_cmd_get_ptr(void);\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_cmu.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_CMU_H__\n#define __HAL_CMU_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_addr_map.h\"\n#include \"stdint.h\"\n#include \"plat_types.h\"\n\n#include CHIP_SPECIFIC_HDR(hal_cmu)\n\n#ifndef HAL_CMU_DEFAULT_CRYSTAL_FREQ\n#define HAL_CMU_DEFAULT_CRYSTAL_FREQ 26000000\n#endif\n\n#define LPU_TIMER_US(us) (((us)*32 + 1000 - 1) / 1000)\n\nenum HAL_CMU_CLK_STATUS_T {\n  HAL_CMU_CLK_DISABLED,\n  HAL_CMU_CLK_ENABLED,\n};\n\nenum HAL_CMU_CLK_MODE_T {\n  HAL_CMU_CLK_AUTO,\n  HAL_CMU_CLK_MANUAL,\n};\n\nenum HAL_CMU_RST_STATUS_T {\n  HAL_CMU_RST_SET,\n  HAL_CMU_RST_CLR,\n};\n\nenum HAL_CMU_TIMER_ID_T {\n  HAL_CMU_TIMER_ID_00,\n  HAL_CMU_TIMER_ID_01,\n  HAL_CMU_TIMER_ID_10,\n  HAL_CMU_TIMER_ID_11,\n  HAL_CMU_TIMER_ID_20,\n  HAL_CMU_TIMER_ID_21,\n};\n\n#ifndef HAL_CMU_FREQ_T\nenum HAL_CMU_FREQ_T {\n  HAL_CMU_FREQ_32K,\n  HAL_CMU_FREQ_26M,\n  HAL_CMU_FREQ_52M,\n  HAL_CMU_FREQ_78M,\n  HAL_CMU_FREQ_104M,\n  HAL_CMU_FREQ_208M,\n\n  HAL_CMU_FREQ_QTY\n};\n#endif\n\n#ifndef HAL_CMU_PLL_T\nenum HAL_CMU_PLL_T {\n  HAL_CMU_PLL_AUD,\n  HAL_CMU_PLL_USB,\n\n  HAL_CMU_PLL_QTY\n};\n#endif\n\n#ifndef HAL_CMU_PLL_USER_T\nenum HAL_CMU_PLL_USER_T {\n  HAL_CMU_PLL_USER_SYS,\n  HAL_CMU_PLL_USER_AUD,\n  HAL_CMU_PLL_USER_USB,\n\n  HAL_CMU_PLL_USER_QTY,\n  HAL_CMU_PLL_USER_ALL = HAL_CMU_PLL_USER_QTY,\n};\n#endif\n\nenum HAL_CMU_PERIPH_FREQ_T {\n  HAL_CMU_PERIPH_FREQ_26M,\n  HAL_CMU_PERIPH_FREQ_52M,\n\n  HAL_CMU_PERIPH_FREQ_QTY\n};\n\nenum HAL_CMU_LPU_CLK_CFG_T {\n  HAL_CMU_LPU_CLK_NONE,\n  HAL_CMU_LPU_CLK_26M,\n  HAL_CMU_LPU_CLK_PLL,\n\n  HAL_CMU_LPU_CLK_QTY\n};\n\nenum HAL_CMU_LPU_SLEEP_MODE_T {\n  HAL_CMU_LPU_SLEEP_MODE_SYS,\n  HAL_CMU_LPU_SLEEP_MODE_CHIP,\n\n  HAL_CMU_LPU_SLEEP_MODE_QTY\n};\n\n#ifndef HAL_PWM_ID_T\nenum HAL_PWM_ID_T {\n  HAL_PWM_ID_0,\n  HAL_PWM_ID_1,\n  HAL_PWM_ID_2,\n  HAL_PWM_ID_3,\n\n  HAL_PWM_ID_QTY\n};\n#endif\n\n#ifndef HAL_I2S_ID_T\nenum HAL_I2S_ID_T {\n  HAL_I2S_ID_0 = 0,\n\n  HAL_I2S_ID_QTY,\n};\n#endif\n\n#ifndef HAL_SPDIF_ID_T\nenum HAL_SPDIF_ID_T {\n  HAL_SPDIF_ID_0 = 0,\n\n  HAL_SPDIF_ID_QTY,\n};\n#endif\n\nenum HAL_CMU_USB_CLOCK_SEL_T {\n  HAL_CMU_USB_CLOCK_SEL_PLL,\n  HAL_CMU_USB_CLOCK_SEL_24M_X2,\n  HAL_CMU_USB_CLOCK_SEL_48M,\n  HAL_CMU_USB_CLOCK_SEL_26M_X2,\n  HAL_CMU_USB_CLOCK_SEL_26M_X4,\n};\n\nvoid hal_cmu_set_crystal_freq_index(uint32_t index);\n\nuint32_t hal_cmu_get_crystal_freq(void);\n\nuint32_t hal_cmu_get_default_crystal_freq(void);\n\nint hal_cmu_clock_enable(enum HAL_CMU_MOD_ID_T id);\n\nint hal_cmu_clock_disable(enum HAL_CMU_MOD_ID_T id);\n\nenum HAL_CMU_CLK_STATUS_T hal_cmu_clock_get_status(enum HAL_CMU_MOD_ID_T id);\n\nint hal_cmu_clock_set_mode(enum HAL_CMU_MOD_ID_T id,\n                           enum HAL_CMU_CLK_MODE_T mode);\n\nenum HAL_CMU_CLK_MODE_T hal_cmu_clock_get_mode(enum HAL_CMU_MOD_ID_T id);\n\nint hal_cmu_reset_set(enum HAL_CMU_MOD_ID_T id);\n\nint hal_cmu_reset_clear(enum HAL_CMU_MOD_ID_T id);\n\nenum HAL_CMU_RST_STATUS_T hal_cmu_reset_get_status(enum HAL_CMU_MOD_ID_T id);\n\nint hal_cmu_reset_pulse(enum HAL_CMU_MOD_ID_T id);\n\nint hal_cmu_timer_set_div(enum HAL_CMU_TIMER_ID_T id, uint32_t div);\n\nvoid hal_cmu_timer0_select_fast(void);\n\nvoid hal_cmu_timer0_select_slow(void);\n\nvoid hal_cmu_timer1_select_fast(void);\n\nvoid hal_cmu_timer1_select_slow(void);\n\nvoid hal_cmu_timer2_select_fast(void);\n\nvoid hal_cmu_timer2_select_slow(void);\n\nvoid hal_cmu_dsp_timer0_select_fast(void);\n\nvoid hal_cmu_dsp_timer0_select_slow(void);\n\nvoid hal_cmu_dsp_timer1_select_fast(void);\n\nvoid hal_cmu_dsp_timer1_select_slow(void);\n\nint hal_cmu_periph_set_div(uint32_t div);\n\nint hal_cmu_uart0_set_div(uint32_t div);\n\nint hal_cmu_uart1_set_div(uint32_t div);\n\nint hal_cmu_uart2_set_div(uint32_t div);\n\nint hal_cmu_spi_set_div(uint32_t div);\n\nint hal_cmu_slcd_set_div(uint32_t div);\n\nint hal_cmu_sdio_set_div(uint32_t div);\n\nint hal_cmu_sdmmc_set_div(uint32_t div);\n\nint hal_cmu_i2c_set_div(uint32_t div);\n\nint hal_cmu_uart0_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_uart1_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_uart2_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_spi_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_slcd_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_sdio_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_sdmmc_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_i2c_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_ispi_set_freq(enum HAL_CMU_PERIPH_FREQ_T freq);\n\nint hal_cmu_pwm_set_freq(enum HAL_PWM_ID_T id, uint32_t freq);\n\nint hal_cmu_flash_set_freq(enum HAL_CMU_FREQ_T freq);\n\nint hal_cmu_mem_set_freq(enum HAL_CMU_FREQ_T freq);\n\nint hal_cmu_sys_set_freq(enum HAL_CMU_FREQ_T freq);\n\nenum HAL_CMU_FREQ_T hal_cmu_sys_get_freq(void);\n\nenum HAL_CMU_FREQ_T hal_cmu_flash_get_freq(void);\n\nint hal_cmu_flash_select_pll(enum HAL_CMU_PLL_T pll);\n\nint hal_cmu_mem_select_pll(enum HAL_CMU_PLL_T pll);\n\nint hal_cmu_sys_select_pll(enum HAL_CMU_PLL_T pll);\n\nint hal_cmu_get_pll_status(enum HAL_CMU_PLL_T pll);\n\nint hal_cmu_pll_enable(enum HAL_CMU_PLL_T pll, enum HAL_CMU_PLL_USER_T user);\n\nint hal_cmu_pll_disable(enum HAL_CMU_PLL_T pll, enum HAL_CMU_PLL_USER_T user);\n\nvoid hal_cmu_audio_resample_enable(void);\n\nvoid hal_cmu_audio_resample_disable(void);\n\nint hal_cmu_get_audio_resample_status(void);\n\nint hal_cmu_codec_adc_set_div(uint32_t div);\n\nuint32_t hal_cmu_codec_adc_get_div(void);\n\nint hal_cmu_codec_dac_set_div(uint32_t div);\n\nuint32_t hal_cmu_codec_dac_get_div(void);\n\nvoid hal_cmu_codec_clock_enable(void);\n\nvoid hal_cmu_codec_clock_disable(void);\n\nvoid hal_cmu_codec_reset_set(void);\n\nvoid hal_cmu_codec_reset_clear(void);\n\nvoid hal_cmu_codec_iir_enable(uint32_t speed);\n\nvoid hal_cmu_codec_iir_disable(void);\n\nint hal_cmu_codec_iir_set_div(uint32_t div);\n\nvoid hal_cmu_codec_iir_eq_enable(uint32_t speed);\n\nvoid hal_cmu_codec_iir_eq_disable(void);\n\nvoid hal_cmu_codec_psap_enable(uint32_t speed);\n\nvoid hal_cmu_codec_psap_disable(void);\n\nvoid hal_cmu_codec_fir_enable(uint32_t speed);\n\nvoid hal_cmu_codec_fir_disable(void);\n\nint hal_cmu_codec_fir_set_div(uint32_t div);\n\nvoid hal_cmu_codec_fir_select_sys_clock(void);\n\nvoid hal_cmu_codec_fir_select_own_clock(void);\n\nvoid hal_cmu_codec_rs_enable(uint32_t speed);\n\nvoid hal_cmu_codec_rs_disable(void);\n\nint hal_cmu_codec_rs_set_div(uint32_t div);\n\nvoid hal_cmu_codec_rs_adc_enable(uint32_t speed);\n\nvoid hal_cmu_codec_rs_adc_disable(void);\n\nint hal_cmu_codec_rs_adc_set_div(uint32_t div);\n\nvoid hal_cmu_codec_set_fault_mask(uint32_t msk);\n\nvoid hal_cmu_i2s_clock_out_enable(enum HAL_I2S_ID_T id);\n\nvoid hal_cmu_i2s_clock_out_disable(enum HAL_I2S_ID_T id);\n\nvoid hal_cmu_i2s_set_slave_mode(enum HAL_I2S_ID_T id);\n\nvoid hal_cmu_i2s_set_master_mode(enum HAL_I2S_ID_T id);\n\nvoid hal_cmu_i2s_clock_enable(enum HAL_I2S_ID_T id);\n\nvoid hal_cmu_i2s_clock_disable(enum HAL_I2S_ID_T id);\n\nint hal_cmu_i2s_set_div(enum HAL_I2S_ID_T id, uint32_t div);\n\nint hal_cmu_i2s_mclk_enable(enum HAL_CMU_I2S_MCLK_ID_T id);\n\nvoid hal_cmu_i2s_mclk_disable(void);\n\nvoid hal_cmu_pcm_clock_out_enable(void);\n\nvoid hal_cmu_pcm_clock_out_disable(void);\n\nvoid hal_cmu_pcm_set_slave_mode(int clk_pol);\n\nvoid hal_cmu_pcm_set_master_mode(void);\n\nvoid hal_cmu_pcm_clock_enable(void);\n\nvoid hal_cmu_pcm_clock_disable(void);\n\nint hal_cmu_pcm_set_div(uint32_t div);\n\nint hal_cmu_spdif_clock_enable(enum HAL_SPDIF_ID_T id);\n\nint hal_cmu_spdif_clock_disable(enum HAL_SPDIF_ID_T id);\n\nint hal_cmu_spdif_set_div(enum HAL_SPDIF_ID_T id, uint32_t div);\n\nvoid hal_cmu_usb_set_device_mode(void);\n\nvoid hal_cmu_usb_set_host_mode(void);\n\nvoid hal_cmu_rom_select_usb_clock(enum HAL_CMU_USB_CLOCK_SEL_T sel);\n\nvoid hal_cmu_usb_clock_enable(void);\n\nvoid hal_cmu_usb_clock_disable(void);\n\nvoid hal_cmu_bt_clock_enable(void);\n\nvoid hal_cmu_bt_clock_disable(void);\n\nvoid hal_cmu_bt_reset_set(void);\n\nvoid hal_cmu_bt_reset_clear(void);\n\nvoid hal_cmu_bt_module_init(void);\n\nvoid hal_cmu_bt_sys_clock_force_on(void);\n\nvoid hal_cmu_bt_sys_clock_auto(void);\n\nvoid hal_cmu_bt_sys_set_freq(enum HAL_CMU_FREQ_T freq);\n\nint hal_cmu_clock_out_enable(enum HAL_CMU_CLOCK_OUT_ID_T id);\n\nvoid hal_cmu_clock_out_disable(void);\n\nvoid hal_cmu_write_lock(void);\n\nvoid hal_cmu_write_unlock(void);\n\nvoid hal_cmu_sys_reboot(void);\n\nvoid hal_cmu_jtag_enable(void);\n\nvoid hal_cmu_jtag_disable(void);\n\nvoid hal_cmu_jtag_clock_enable(void);\n\nvoid hal_cmu_jtag_clock_disable(void);\n\nvoid hal_cmu_simu_init(void);\n\nvoid hal_cmu_simu_pass(void);\n\nvoid hal_cmu_simu_fail(void);\n\nvoid hal_cmu_simu_tag(uint8_t shift);\n\nvoid hal_cmu_simu_set_val(uint32_t val);\n\nuint32_t hal_cmu_simu_get_val(void);\n\nvoid hal_cmu_low_freq_mode_init(void);\n\nvoid hal_cmu_low_freq_mode_enable(enum HAL_CMU_FREQ_T old_freq,\n                                  enum HAL_CMU_FREQ_T new_freq);\n\nvoid hal_cmu_low_freq_mode_disable(enum HAL_CMU_FREQ_T old_freq,\n                                   enum HAL_CMU_FREQ_T new_freq);\n\nvoid hal_cmu_rom_enable_pll(void);\n\nvoid hal_cmu_programmer_enable_pll(void);\n\nvoid hal_cmu_init_pll_selection(void);\n\nvoid hal_cmu_rom_setup(void);\n\nvoid hal_cmu_programmer_setup(void);\n\nvoid hal_cmu_setup(void);\n\n// Some internal functions\n\nvoid hal_cmu_apb_init_div(void);\n\nvoid hal_cmu_rom_clock_init(void);\n\nvoid hal_cmu_init_chip_feature(uint16_t feature);\n\nvoid hal_cmu_osc_x2_enable(void);\n\nvoid hal_cmu_osc_x4_enable(void);\n\nvoid hal_cmu_module_init_state(void);\n\nvoid hal_cmu_ema_init(void);\n\nvoid hal_cmu_lpu_wait_26m_ready(void);\n\nint hal_cmu_lpu_busy(void);\n\nint hal_cmu_lpu_init(enum HAL_CMU_LPU_CLK_CFG_T cfg);\n\nint hal_cmu_lpu_sleep(enum HAL_CMU_LPU_SLEEP_MODE_T mode);\n\nvoid hal_cmu_set_wakeup_pc(uint32_t pc);\n\nvolatile uint32_t *hal_cmu_get_bootmode_addr(void);\n\nvolatile uint32_t *hal_cmu_get_memsc_addr(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_cmu_common.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_cmu.h\"\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(reg_cmu)\n#ifdef AON_CMU_BASE\n#include CHIP_SPECIFIC_HDR(reg_aoncmu)\n#endif\n#include \"cmsis.h\"\n#include \"hal_analogif.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_cache.h\"\n#include \"hal_chipid.h\"\n#include \"hal_iomux.h\"\n#include \"hal_location.h\"\n#include \"hal_norflash.h\"\n#include \"hal_sleep.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n\n#if defined(CHIP_HAS_USB) &&                                                   \\\n    (defined(MCU_HIGH_PERFORMANCE_MODE) &&                                     \\\n     !(defined(ULTRA_LOW_POWER) || defined(OSC_26M_X4_AUD2BB)))\n#define USB_PLL_INIT_ON\n#endif\n#if (!defined(ULTRA_LOW_POWER) && !defined(OSC_26M_X4_AUD2BB)) ||              \\\n    (!defined(FLASH_LOW_SPEED) && !defined(OSC_26M_X4_AUD2BB)) ||              \\\n    (defined(PSRAM_ENABLE) && !defined(PSRAM_LOW_SPEED))\n#define AUD_PLL_INIT_ON\n#endif\n\n// SIMU_RES\n#define CMU_SIMU_RES_PASSED (0x9A55)\n#define CMU_SIMU_RES_FAILED (0xFA11)\n\ntypedef void (*HAL_POWER_DOWN_WAKEUP_HANDLER)(void);\n\nstatic struct CMU_T *const cmu = (struct CMU_T *)CMU_BASE;\n#ifdef AON_CMU_BASE\nstatic struct AONCMU_T *const POSSIBLY_UNUSED aoncmu =\n    (struct AONCMU_T *)AON_CMU_BASE;\n#endif\n\n#ifdef HAL_CMU_VALID_CRYSTAL_FREQ\nstatic const uint32_t valid_crystal_freq_list[] = HAL_CMU_VALID_CRYSTAL_FREQ;\n#define CRYSTAL_FREQ_ATTR BOOT_DATA_LOC\n#else\n#define CRYSTAL_FREQ_ATTR const\n#endif\n\nstatic uint32_t CRYSTAL_FREQ_ATTR crystal_freq = HAL_CMU_DEFAULT_CRYSTAL_FREQ;\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_set_crystal_freq_index(uint32_t index) {\n#ifdef HAL_CMU_VALID_CRYSTAL_FREQ\n  if (index >= ARRAY_SIZE(valid_crystal_freq_list)) {\n    index %= ARRAY_SIZE(valid_crystal_freq_list);\n  }\n  crystal_freq = valid_crystal_freq_list[index];\n#endif\n}\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_cmu_get_crystal_freq(void) {\n  return crystal_freq;\n}\n\nuint32_t BOOT_TEXT_FLASH_LOC hal_cmu_get_default_crystal_freq(void) {\n  return HAL_CMU_DEFAULT_CRYSTAL_FREQ;\n}\n\nvoid hal_cmu_write_lock(void) { cmu->WRITE_UNLOCK = 0xCAFE0000; }\n\nvoid hal_cmu_write_unlock(void) { cmu->WRITE_UNLOCK = 0xCAFE0001; }\n\nvoid hal_cmu_sys_reboot(void) { hal_cmu_reset_set(HAL_CMU_MOD_GLOBAL); }\n\nvoid hal_cmu_simu_init(void) { cmu->SIMU_RES = 0; }\n\nvoid hal_cmu_simu_pass(void) { cmu->SIMU_RES = CMU_SIMU_RES_PASSED; }\n\nvoid hal_cmu_simu_fail(void) { cmu->SIMU_RES = CMU_SIMU_RES_FAILED; }\n\nvoid hal_cmu_simu_tag(uint8_t shift) { cmu->SIMU_RES |= (1 << shift); }\n\nvoid hal_cmu_simu_set_val(uint32_t val) { cmu->SIMU_RES = val; }\n\nuint32_t hal_cmu_simu_get_val(void) { return cmu->SIMU_RES; }\n\nvoid hal_cmu_set_wakeup_pc(uint32_t pc) {\n#ifdef RAMRET_BASE\n  uint32_t *wake_pc =\n#ifdef CHIP_BEST2000\n      (uint32_t *)RAMRET_BASE;\n#else\n      (uint32_t *)&aoncmu->WAKEUP_PC;\n\n  STATIC_ASSERT(sizeof(HAL_POWER_DOWN_WAKEUP_HANDLER) <= sizeof(uint32_t),\n                \"Invalid func ptr size\");\n#endif\n\n  *wake_pc = pc;\n#endif\n}\n\nvoid hal_cmu_rom_wakeup_check(void) {\n#ifdef RAMRET_BASE\n  union HAL_HW_BOOTMODE_T hw;\n  uint32_t sw;\n  HAL_POWER_DOWN_WAKEUP_HANDLER *wake_fn =\n#ifdef CHIP_BEST2000\n      (HAL_POWER_DOWN_WAKEUP_HANDLER *)RAMRET_BASE;\n#else\n      (HAL_POWER_DOWN_WAKEUP_HANDLER *)&aoncmu->WAKEUP_PC;\n#endif\n\n  hw = hal_rom_hw_bootmode_get();\n  if (hw.watchdog == 0 && hw.global == 0) {\n    sw = hal_sw_bootmode_get();\n    if ((sw & HAL_SW_BOOTMODE_POWER_DOWN_WAKEUP) && *wake_fn) {\n      (*wake_fn)();\n    }\n  }\n\n  *wake_fn = NULL;\n#endif\n}\n\n#ifndef HAL_CMU_PLL_T\nvoid hal_cmu_rom_enable_pll(void) {\n#ifdef CHIP_HAS_USB\n  hal_cmu_pll_enable(HAL_CMU_PLL_USB, HAL_CMU_PLL_USER_SYS);\n  hal_cmu_sys_select_pll(HAL_CMU_PLL_USB);\n  hal_cmu_flash_select_pll(HAL_CMU_PLL_USB);\n#else\n  hal_cmu_pll_enable(HAL_CMU_PLL_AUD, HAL_CMU_PLL_USER_SYS);\n  hal_cmu_sys_select_pll(HAL_CMU_PLL_AUD);\n  hal_cmu_flash_select_pll(HAL_CMU_PLL_AUD);\n#endif\n}\n\nvoid hal_cmu_programmer_enable_pll(void) {\n  hal_cmu_pll_enable(HAL_CMU_PLL_AUD, HAL_CMU_PLL_USER_SYS);\n  hal_cmu_flash_select_pll(HAL_CMU_PLL_AUD);\n  hal_cmu_sys_select_pll(HAL_CMU_PLL_AUD);\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_init_pll_selection(void) {\n  // !!!!!!\n  // CAUTION:\n  // hal_cmu_pll_enable()/hal_cmu_pll_disable() must be called after\n  // hal_chipid_init(), for the init div values are extracted in\n  // hal_chipid_init().\n  // !!!!!!\n\n#if defined(CHIP_BEST1000) || defined(CHIP_BEST2000)\n#ifdef CHIP_HAS_USB\n  // Enable USB PLL before switching (clock mux requirement)\n  // -- USB PLL might not be started in ROM\n  hal_cmu_pll_enable(HAL_CMU_PLL_USB, HAL_CMU_PLL_USER_SYS);\n#endif\n  hal_cmu_pll_enable(HAL_CMU_PLL_AUD, HAL_CMU_PLL_USER_SYS);\n#else // !(best1000 || best2000)\n  // Disable the PLL which might be enabled in ROM\n#ifdef CHIP_HAS_USB\n  hal_cmu_pll_disable(HAL_CMU_PLL_USB, HAL_CMU_PLL_USER_ALL);\n#else\n  hal_cmu_pll_disable(HAL_CMU_PLL_AUD, HAL_CMU_PLL_USER_ALL);\n#endif\n#endif // !(best1000 || best2000)\n\n#ifdef FLASH_LOW_SPEED\n#ifdef CHIP_HAS_USB\n  // Switch flash clock to USB PLL, and then shutdown USB PLL,\n  // to save power consumed in clock divider\n  hal_cmu_flash_select_pll(HAL_CMU_PLL_USB);\n#endif\n#else\n  // Switch flash clock to audio PLL\n  hal_cmu_flash_select_pll(HAL_CMU_PLL_AUD);\n#endif\n\n#ifdef CHIP_HAS_PSRAM\n#ifdef PSRAM_LOW_SPEED\n#ifdef CHIP_HAS_USB\n  // Switch psram clock to USB PLL, and then shutdown USB PLL,\n  // to save power consumed in clock divider\n  hal_cmu_mem_select_pll(HAL_CMU_PLL_USB);\n#endif\n#else\n  // Switch psram clock to audio PLL\n  hal_cmu_mem_select_pll(HAL_CMU_PLL_AUD);\n#endif\n#endif\n\n  // Select system PLL after selecting flash/psram PLLs\n#ifdef ULTRA_LOW_POWER\n  hal_cmu_low_freq_mode_init();\n#else\n#if defined(MCU_HIGH_PERFORMANCE_MODE) && defined(CHIP_HAS_USB)\n  // Switch system clocks to USB PLL\n  hal_cmu_sys_select_pll(HAL_CMU_PLL_USB);\n#else\n  // Switch system clocks to audio PLL\n  hal_cmu_sys_select_pll(HAL_CMU_PLL_AUD);\n#endif\n#endif\n\n#if defined(CHIP_BEST1000) || defined(CHIP_BEST2000)\n#ifndef USB_PLL_INIT_ON\n  // Disable USB PLL after switching (clock mux requirement)\n  hal_cmu_pll_disable(HAL_CMU_PLL_USB, HAL_CMU_PLL_USER_SYS);\n#endif\n#ifndef AUD_PLL_INIT_ON\n  hal_cmu_pll_disable(HAL_CMU_PLL_AUD, HAL_CMU_PLL_USER_SYS);\n#endif\n#else // !(best1000 || best2000)\n#ifdef USB_PLL_INIT_ON\n  hal_cmu_pll_enable(HAL_CMU_PLL_USB, HAL_CMU_PLL_USER_SYS);\n#endif\n#ifdef AUD_PLL_INIT_ON\n  hal_cmu_pll_enable(HAL_CMU_PLL_AUD, HAL_CMU_PLL_USER_SYS);\n#endif\n#endif // !(best1000 || best2000)\n\n#if defined(MCU_HIGH_PERFORMANCE_MODE) && !defined(ULTRA_LOW_POWER) &&         \\\n    defined(OSC_26M_X4_AUD2BB)\n#error \"Error configuration: MCU_HIGH_PERFORMANCE_MODE has no effect\"\n#endif\n}\n#endif // !HAL_CMU_PLL_T\n\nstatic void BOOT_TEXT_FLASH_LOC hal_cmu_init_periph_clock(void) {\n#ifdef PERIPH_PLL_FREQ\n  hal_cmu_periph_set_div(1);\n#endif\n\n  // TODO: Move the following SDIO freq setting to hal_sdio.c\n#ifdef CHIP_HAS_SDIO\n  hal_cmu_sdio_set_freq(HAL_CMU_PERIPH_FREQ_26M);\n#endif\n}\n\nvoid hal_cmu_rom_setup(void) {\n  hal_cmu_lpu_wait_26m_ready();\n  hal_cmu_simu_init();\n  hal_cmu_rom_clock_init();\n  hal_cmu_timer0_select_slow();\n#ifdef TIMER1_BASE\n  hal_cmu_timer1_select_fast();\n#endif\n  hal_sys_timer_open();\n\n  // Init sys clock\n  hal_cmu_sys_set_freq(HAL_CMU_FREQ_26M);\n\n  // Init flash clock (this should be done before load_boot_settings, for\n  // security register read)\n  hal_cmu_flash_set_freq(HAL_CMU_FREQ_26M);\n  // Reset flash controller (for JTAG reset and run)\n  // Enable flash controller (flash controller is reset by default since\n  // BEST1400)\n  hal_cmu_reset_set(HAL_CMU_MOD_O_FLASH);\n  hal_cmu_reset_set(HAL_CMU_MOD_H_FLASH);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_FLASH);\n  hal_cmu_reset_clear(HAL_CMU_MOD_O_FLASH);\n\n  // Disable cache (for JTAG reset and run)\n  hal_cache_disable(HAL_CACHE_ID_I_CACHE);\n  hal_cache_disable(HAL_CACHE_ID_D_CACHE);\n\n  // Init APB clock\n  hal_cmu_apb_init_div();\n}\n\nvoid hal_cmu_programmer_setup(void) {\n  hal_cmu_ema_init();\n  hal_sys_timer_open();\n\n#ifdef JTAG_ENABLE\n  hal_iomux_set_jtag();\n  hal_cmu_jtag_clock_enable();\n#endif\n\n  int ret;\n  // Open analogif (ISPI)\n  ret = hal_analogif_open();\n  if (ret) {\n    hal_cmu_simu_tag(31);\n    do {\n      volatile int i = 0;\n      i++;\n    } while (1);\n  }\n  // Init chip id\n  // 1) Read id from ana/rf/pmu\n  // 2) Init clock settings in ana/rf/pmu if the default h/w register values are\n  // bad\n  hal_chipid_init();\n\n  // Enable OSC X2/X4 in cmu after enabling their source in hal_chipid_init()\n  hal_cmu_osc_x2_enable();\n  hal_cmu_osc_x4_enable();\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_cmu_setup(void) {\n  int ret;\n  enum HAL_CMU_FREQ_T freq;\n\n  hal_iomux_set_default_config();\n#ifdef JTAG_ENABLE\n  hal_iomux_set_jtag();\n  hal_cmu_jtag_clock_enable();\n#endif\n  hal_cmu_module_init_state();\n  hal_cmu_ema_init();\n  hal_cmu_timer0_select_slow();\n#ifdef TIMER1_BASE\n  hal_cmu_timer1_select_fast();\n#endif\n  hal_sys_timer_open();\n  hal_hw_bootmode_init();\n\n  // Init system/flash/memory clocks before initializing clock setting\n  // and before switching PLL\n  hal_norflash_set_freq(HAL_CMU_FREQ_26M);\n  hal_cmu_mem_set_freq(HAL_CMU_FREQ_26M);\n  hal_cmu_sys_set_freq(HAL_CMU_FREQ_26M);\n\n  // Set ISPI module freq\n  hal_cmu_ispi_set_freq(HAL_CMU_PERIPH_FREQ_26M);\n  // Open analogif (ISPI)\n  ret = hal_analogif_open();\n  if (ret) {\n    hal_cmu_simu_tag(31);\n    do {\n      volatile int i = 0;\n      i++;\n    } while (1);\n  }\n  // Init chip id\n  // 1) Read id from ana/rf/pmu\n  // 2) Init clock settings in ana/rf/pmu if the default h/w register values are\n  // bad\n  hal_chipid_init();\n\n#ifdef CALIB_SLOW_TIMER\n  // Calib slow timer after determining the crystal freq\n  hal_sys_timer_calib();\n#endif\n\n  // Enable OSC X2/X4 in cmu after enabling their source in hal_chipid_init()\n  hal_cmu_osc_x2_enable();\n  hal_cmu_osc_x4_enable();\n\n  // Init PLL selection\n  hal_cmu_init_pll_selection();\n\n  // Init peripheral clocks\n  hal_cmu_init_periph_clock();\n\n  // Sleep setting\n#ifdef NO_LPU_26M\n  while (hal_cmu_lpu_init(HAL_CMU_LPU_CLK_NONE) == -1)\n    ;\n#else\n  while (hal_cmu_lpu_init(HAL_CMU_LPU_CLK_26M) == -1)\n    ;\n#endif\n    // Init sys freq after applying the sleep setting (which might change sys\n    // freq)\n#ifdef NO_LPU_26M\n  hal_sys_timer_delay(MS_TO_TICKS(20));\n#endif\n\n  // Init system clock\n#ifdef ULTRA_LOW_POWER\n  freq = HAL_CMU_FREQ_52M;\n#else\n  freq = HAL_CMU_FREQ_104M;\n#endif\n  hal_sysfreq_req(HAL_SYSFREQ_USER_INIT, freq);\n\n  // Init flash\n  hal_norflash_init();\n}\n"
  },
  {
    "path": "platform/hal/hal_codec.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_CODEC_H__\n#define __HAL_CODEC_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_aud.h\"\n\n#define DB_TO_QDB(n)                        ((n) * 4)\n#define QDB_TO_DB(n)                        ((n) / 4)\n\nenum HAL_CODEC_ID_T {\n    HAL_CODEC_ID_0 = 0,\n    HAL_CODEC_ID_NUM,\n};\n\nstruct HAL_CODEC_CONFIG_T {\n    enum AUD_BITS_T bits;\n    enum AUD_SAMPRATE_T sample_rate;\n    enum AUD_CHANNEL_NUM_T channel_num;\n    enum AUD_CHANNEL_MAP_T channel_map;\n\n    uint32_t use_dma:1;\n    uint32_t vol:5;\n\n    enum AUD_IO_PATH_T io_path;\n\n    uint32_t set_flag;\n};\n\nstruct dac_classg_cfg {\n    uint8_t thd2;\n    uint8_t thd1;\n    uint8_t thd0;\n    uint8_t lr;\n    uint8_t step_4_3n;\n    uint8_t quick_down;\n    uint16_t wind_width;\n};\n\nenum HAL_CODEC_CONFIG_FLAG_T{\n    HAL_CODEC_CONFIG_NULL = 0x00,\n\n    HAL_CODEC_CONFIG_BITS = 0x01,\n    HAL_CODEC_CONFIG_SAMPLE_RATE = 0x02,\n    HAL_CODEC_CONFIG_CHANNEL_NUM = 0x04,\n    HAL_CODEC_CONFIG_CHANNEL_MAP = 0x08,\n    HAL_CODEC_CONFIG_VOL = 0x10,\n\n    HAL_CODEC_CONFIG_ALL = 0xff,\n};\n\nenum HAL_CODEC_DAC_RESET_STAGE_T {\n    HAL_CODEC_DAC_PRE_RESET,\n    HAL_CODEC_DAC_POST_RESET,\n};\n\nenum HAL_CODEC_SYNC_TYPE_T {\n    HAL_CODEC_SYNC_TYPE_NONE,\n    HAL_CODEC_SYNC_TYPE_GPIO,\n    HAL_CODEC_SYNC_TYPE_BT,\n    HAL_CODEC_SYNC_TYPE_WIFI,\n};\n\nenum HAL_CODEC_PERF_TEST_POWER_T {\n    HAL_CODEC_PERF_TEST_30MW,\n    HAL_CODEC_PERF_TEST_10MW,\n    HAL_CODEC_PERF_TEST_5MW,\n    HAL_CODEC_PERF_TEST_M60DB,\n\n    HAL_CODEC_PERF_TEST_QTY\n};\n\nenum HAL_CODEC_IIR_USER_T {\n    HAL_CODEC_IIR_USER_ANC,\n    HAL_CODEC_IIR_USER_EQ,\n\n    HAL_CODEC_IIR_USER_QTY,\n};\n\nenum HAL_CODEC_TIMER_TRIG_MODE_T {\n    HAL_CODEC_TIMER_TRIG_MODE_DAC,\n    HAL_CODEC_TIMER_TRIG_MODE_ADC,\n    HAL_CODEC_TIMER_TRIG_MODE_ANY,\n\n    HAL_CODEC_TIMER_TRIG_MODE_QTY,\n};\n\ntypedef void (*HAL_CODEC_DAC_RESET_CALLBACK)(enum HAL_CODEC_DAC_RESET_STAGE_T stage);\ntypedef void (*HAL_CODEC_SW_OUTPUT_COEF_CALLBACK)(float coef);\ntypedef void (*HAL_CODEC_BT_TRIGGER_CALLBACK)(void);\ntypedef void (*HAL_CODEC_EVENT_TRIGGER_CALLBACK)(void);\ntypedef void (*HAL_CODEC_TIMER_TRIGGER_CALLBACK)(void);\ntypedef void (*HAL_CODEC_IRQ_CALLBACK)(uint32_t status);\n\nuint32_t hal_codec_get_input_path_cfg(enum AUD_IO_PATH_T io_path);\nconst struct CODEC_DAC_VOL_T *hal_codec_get_dac_volume(uint32_t index);\nconst CODEC_ADC_VOL_T *hal_codec_get_adc_volume(uint32_t index);\nuint32_t hal_codec_get_mic_chan_volume_level(uint32_t map);\nuint8_t hal_codec_get_digmic_hw_index(uint8_t chan);\n\nint hal_codec_open(enum HAL_CODEC_ID_T id);\nint hal_codec_close(enum HAL_CODEC_ID_T id);\nvoid hal_codec_crash_mute(void);\nvoid hal_codec_stop_playback_stream(enum HAL_CODEC_ID_T id);\nvoid hal_codec_start_playback_stream(enum HAL_CODEC_ID_T id);\nint hal_codec_start_stream(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream);\nint hal_codec_stop_stream(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream);\nint hal_codec_start_interface(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream, int dma);\nint hal_codec_stop_interface(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream);\nint hal_codec_setup_stream(enum HAL_CODEC_ID_T id, enum AUD_STREAM_T stream, const struct HAL_CODEC_CONFIG_T *cfg);\nint hal_codec_anc_adc_enable(enum ANC_TYPE_T type);\nint hal_codec_anc_adc_disable(enum ANC_TYPE_T type);\nenum AUD_SAMPRATE_T hal_codec_anc_convert_rate(enum AUD_SAMPRATE_T rate);\nint hal_codec_anc_dma_enable(enum HAL_CODEC_ID_T id);\nint hal_codec_anc_dma_disable(enum HAL_CODEC_ID_T id);\nvoid hal_codec_set_anc_boost_gain_attn(float attn);\nvoid hal_codec_apply_anc_adc_gain_offset(enum ANC_TYPE_T type, int8_t offset_l, int8_t offset_r);\nint hal_codec_aux_mic_dma_enable(enum HAL_CODEC_ID_T id);\nint hal_codec_aux_mic_dma_disable(enum HAL_CODEC_ID_T id);\nuint32_t hal_codec_get_alg_dac_shift(void);\nvoid hal_codec_set_dac_reset_callback(HAL_CODEC_DAC_RESET_CALLBACK callback);\nvoid hal_codec_set_sw_output_coef_callback(HAL_CODEC_SW_OUTPUT_COEF_CALLBACK callback);\nvoid hal_codec_dac_gain_m60db_check(enum HAL_CODEC_PERF_TEST_POWER_T type);\nvoid hal_codec_set_noise_reduction(bool enable);\nvoid hal_codec_classg_config(const struct dac_classg_cfg *cfg);\nvoid hal_codec_set_dac_dc_gain_attn(float attn);\nvoid hal_codec_set_dac_dc_offset(int16_t dc_l, int16_t dc_r);\nvoid hal_codec_sidetone_enable(void);\nvoid hal_codec_sidetone_disable(void);\nint hal_codec_sidetone_gain_ramp_up(float step);\nint hal_codec_sidetone_gain_ramp_down(float step);\nvoid hal_codec_select_adc_iir_mic(uint32_t index, enum AUD_CHANNEL_MAP_T mic_map);\nvoid hal_codec_dac_mute(bool mute);\nvoid hal_codec_adc_mute(bool mute);\nint hal_codec_set_chan_vol(enum AUD_STREAM_T stream, enum AUD_CHANNEL_MAP_T ch_map, uint8_t vol);\nvoid hal_codec_sync_dac_enable(enum HAL_CODEC_SYNC_TYPE_T type);\nvoid hal_codec_sync_dac_disable(void);\nvoid hal_codec_sync_adc_enable(enum HAL_CODEC_SYNC_TYPE_T type);\nvoid hal_codec_sync_adc_disable(void);\nvoid hal_codec_sync_dac_resample_rate_enable(enum HAL_CODEC_SYNC_TYPE_T type);\nvoid hal_codec_sync_dac_resample_rate_disable(void);\nvoid hal_codec_sync_adc_resample_rate_enable(enum HAL_CODEC_SYNC_TYPE_T type);\nvoid hal_codec_sync_adc_resample_rate_disable(void);\nvoid hal_codec_sync_dac_gain_enable(enum HAL_CODEC_SYNC_TYPE_T type);\nvoid hal_codec_sync_dac_gain_disable(void);\nvoid hal_codec_sync_adc_gain_enable(enum HAL_CODEC_SYNC_TYPE_T type);\nvoid hal_codec_sync_adc_gain_disable(void);\nint hal_codec_dac_reset_set(void);\nint hal_codec_dac_reset_clear(void);\nint hal_codec_dac_sdm_reset_set(void);\nint hal_codec_dac_sdm_reset_clear(void);\nvoid hal_codec_tune_resample_rate(enum AUD_STREAM_T stream, float ratio);\nvoid hal_codec_tune_both_resample_rate(float ratio);\nvoid hal_codec_get_dac_gain(float *left_gain,float *right_gain);\nint hal_codec_select_clock_out(uint32_t cfg);\nint hal_codec_config_digmic_phase(uint8_t phase);\nvoid hal_codec_setup_mc(enum AUD_CHANNEL_NUM_T channel_num, enum AUD_BITS_T bits);\nvoid hal_codec_dsd_enable(void);\nvoid hal_codec_dsd_disable(void);\nvoid hal_codec_swap_output(bool swap);\n\nvoid hal_codec_gpio_trigger_debounce_enable(void);\nvoid hal_codec_gpio_trigger_debounce_disable(void);\n\nuint32_t hal_codec_timer_get(void);\nuint32_t hal_codec_timer_ticks_to_us(uint32_t ticks);\nvoid hal_codec_timer_trigger_read(void);\n\nvoid hal_codec_anc_fb_check_set_irq_handler(HAL_CODEC_IRQ_CALLBACK cb);\n\nint hal_codec_vad_open(const struct AUD_VAD_CONFIG_T *cfg);\nint hal_codec_vad_close(void);\nint hal_codec_vad_start(void);\nint hal_codec_vad_stop(void);\nuint32_t hal_codec_vad_recv_data(uint8_t *dst, uint32_t dst_size);\nvoid hal_codec_get_vad_data_info(struct CODEC_VAD_BUF_INFO_T* vad_buf_info);\n\nvoid hal_codec_set_bt_trigger_callback(HAL_CODEC_BT_TRIGGER_CALLBACK callback);\nint hal_codec_bt_trigger_start(void);\nint hal_codec_bt_trigger_stop(void);\n\nint hal_codec_iir_enable(enum HAL_CODEC_IIR_USER_T user, uint32_t speed);\nint hal_codec_iir_disable(enum HAL_CODEC_IIR_USER_T user);\n\nvoid hal_codec_min_phase_mode_enable(enum AUD_STREAM_T stream);\nvoid hal_codec_min_phase_mode_disable(enum AUD_STREAM_T stream);\n\nint hal_codec_timer_trig_i2s_enable(enum HAL_CODEC_TIMER_TRIG_MODE_T mode, uint32_t ticks, bool periodic);\nint hal_codec_timer_trig_i2s_disable(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_codec_common.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"cmsis.h\"\n#include \"hal_codec.h\"\n#include \"hal_trace.h\"\n#include \"tgt_hardware.h\"\n\nextern const CODEC_ADC_VOL_T codec_adc_vol[TGT_ADC_VOL_LEVEL_QTY];\n\n#ifndef CODEC_MIC_CH0_SADC_VOL\n#define CODEC_MIC_CH0_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_MIC_CH1_SADC_VOL\n#define CODEC_MIC_CH1_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_MIC_CH2_SADC_VOL\n#define CODEC_MIC_CH2_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_MIC_CH3_SADC_VOL\n#define CODEC_MIC_CH3_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_MIC_CH4_SADC_VOL\n#define CODEC_MIC_CH4_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_MIC_CH5_SADC_VOL\n#define CODEC_MIC_CH5_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_MIC_CH6_SADC_VOL\n#define CODEC_MIC_CH6_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_MIC_CH7_SADC_VOL\n#define CODEC_MIC_CH7_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_DIGMIC_CH0_SADC_VOL\n#define CODEC_DIGMIC_CH0_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_DIGMIC_CH1_SADC_VOL\n#define CODEC_DIGMIC_CH1_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_DIGMIC_CH2_SADC_VOL\n#define CODEC_DIGMIC_CH2_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_DIGMIC_CH3_SADC_VOL\n#define CODEC_DIGMIC_CH3_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_DIGMIC_CH4_SADC_VOL\n#define CODEC_DIGMIC_CH4_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_DIGMIC_CH5_SADC_VOL\n#define CODEC_DIGMIC_CH5_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_DIGMIC_CH6_SADC_VOL\n#define CODEC_DIGMIC_CH6_SADC_VOL CODEC_SADC_VOL\n#endif\n#ifndef CODEC_DIGMIC_CH7_SADC_VOL\n#define CODEC_DIGMIC_CH7_SADC_VOL CODEC_SADC_VOL\n#endif\n\nstatic const uint8_t codec_mic_chan_vol[] = {\n    CODEC_MIC_CH0_SADC_VOL,    CODEC_MIC_CH1_SADC_VOL,\n    CODEC_MIC_CH2_SADC_VOL,    CODEC_MIC_CH3_SADC_VOL,\n    CODEC_MIC_CH4_SADC_VOL,    CODEC_MIC_CH5_SADC_VOL,\n    CODEC_MIC_CH6_SADC_VOL,    CODEC_MIC_CH7_SADC_VOL,\n    CODEC_DIGMIC_CH0_SADC_VOL, CODEC_DIGMIC_CH1_SADC_VOL,\n    CODEC_DIGMIC_CH2_SADC_VOL, CODEC_DIGMIC_CH3_SADC_VOL,\n    CODEC_DIGMIC_CH4_SADC_VOL, CODEC_DIGMIC_CH5_SADC_VOL,\n    CODEC_DIGMIC_CH6_SADC_VOL, CODEC_DIGMIC_CH7_SADC_VOL,\n};\n\nuint32_t hal_codec_get_input_path_cfg(enum AUD_IO_PATH_T io_path) {\n  int i;\n\n  for (i = 0; i < CFG_HW_AUD_INPUT_PATH_NUM; i++) {\n    if (io_path == cfg_audio_input_path_cfg[i].io_path) {\n      return cfg_audio_input_path_cfg[i].cfg;\n    }\n  }\n  ASSERT(false, \"%s: Bad input path: %d\", __func__, io_path);\n  return 0;\n}\n\nconst struct CODEC_DAC_VOL_T *hal_codec_get_dac_volume(uint32_t index) {\n  uint32_t _array_sizeof_vol = ARRAY_SIZE(codec_dac_vol);\n  if (index < _array_sizeof_vol) {\n    return &codec_dac_vol[index];\n  } else {\n    return &codec_dac_vol[_array_sizeof_vol - 1];\n  }\n}\n\nconst CODEC_ADC_VOL_T *hal_codec_get_adc_volume(uint32_t index) {\n  uint32_t _array_sizeof_vol = ARRAY_SIZE(codec_adc_vol);\n  if (index < _array_sizeof_vol) {\n    return &codec_adc_vol[index];\n  } else {\n    return &codec_adc_vol[_array_sizeof_vol - 1];\n  }\n}\n\nuint32_t hal_codec_get_mic_chan_volume_level(uint32_t map) {\n  uint32_t mic_ch;\n\n  mic_ch = get_lsb_pos(map);\n\n  if (mic_ch < ARRAY_SIZE(codec_mic_chan_vol)) {\n    return codec_mic_chan_vol[mic_ch];\n  } else {\n    return ARRAY_SIZE(codec_adc_vol);\n  }\n}\n\nuint8_t hal_codec_get_digmic_hw_index(uint8_t chan) {\n  return chan - get_msb_pos(AUD_CHANNEL_MAP_DIGMIC_CH0);\n}\n"
  },
  {
    "path": "platform/hal/hal_dma.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_dma.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include \"reg_dma.h\"\n\n#if (defined(CHIP_BEST1000) || defined(CHIP_BEST2000) ||                       \\\n     defined(CHIP_BEST2300)) &&                                                \\\n    !(defined(ROM_BUILD) || defined(PROGRAMMER))\n#define DMA_REMAP\n#endif\n\nenum HAL_DMA_INST_T {\n  HAL_DMA_INST_AUDMA = 0,\n#if (CHIP_HAS_DMA == 1)\n  HAL_DMA_INST_GPDMA = HAL_DMA_INST_AUDMA,\n#else\n  HAL_DMA_INST_GPDMA,\n#endif\n\n  HAL_DMA_INST_QTY\n};\n\nstruct HAL_DMA_FIFO_ADDR_T {\n  uint32_t count;\n  const uint32_t *addr;\n};\n\nstruct HAL_DMA_FIFO_PERIPH_T {\n  uint32_t count;\n  const enum HAL_DMA_PERIPH_T *periph;\n#ifdef DMA_REMAP\n  const enum HAL_DMA_PERIPH_T *periph_remap;\n#endif\n};\n\n/*****************************************************************************\n * Private types/enumerations/variables\n ****************************************************************************/\n\n#include CHIP_SPECIFIC_HDR(hal_dmacfg)\n\nstatic struct DMA_T *const dma[HAL_DMA_INST_QTY] = {\n    (struct DMA_T *)AUDMA_BASE,\n#if (CHIP_HAS_DMA > 1)\n    (struct DMA_T *)GPDMA_BASE,\n#endif\n};\n\nstatic const IRQn_Type irq_type[HAL_DMA_INST_QTY] = {\n    AUDMA_IRQn,\n#if (CHIP_HAS_DMA > 1)\n    GPDMA_IRQn,\n#endif\n};\n\nstatic void hal_audma_irq_handler(void);\n#if (CHIP_HAS_DMA > 1)\nstatic void hal_gpdma_irq_handler(void);\n#endif\n\nstatic const uint32_t irq_entry[HAL_DMA_INST_QTY] = {\n    (uint32_t)hal_audma_irq_handler,\n#if (CHIP_HAS_DMA > 1)\n    (uint32_t)hal_gpdma_irq_handler,\n#endif\n};\n\nstatic const struct HAL_DMA_FIFO_ADDR_T fifo_addr[HAL_DMA_INST_QTY] = {\n    {\n        .count = ARRAY_SIZE(audma_fifo_addr),\n        .addr = audma_fifo_addr,\n    },\n#if (CHIP_HAS_DMA > 1)\n    {\n        .count = ARRAY_SIZE(gpdma_fifo_addr),\n        .addr = gpdma_fifo_addr,\n    },\n#endif\n};\n\nstatic const struct HAL_DMA_FIFO_PERIPH_T fifo_periph[HAL_DMA_INST_QTY] = {\n    {\n        .count = ARRAY_SIZE(audma_fifo_periph),\n        .periph = audma_fifo_periph,\n#ifdef DMA_REMAP\n        .periph_remap = audma_fifo_periph_remap,\n#endif\n    },\n#if (CHIP_HAS_DMA > 1)\n    {\n        .count = ARRAY_SIZE(gpdma_fifo_periph),\n        .periph = gpdma_fifo_periph,\n#ifdef DMA_REMAP\n        .periph_remap = gpdma_fifo_periph_remap,\n#endif\n    },\n#endif\n};\n\nstatic const uint8_t chan_start[HAL_DMA_INST_QTY] = {\n    AUDMA_CHAN_START,\n#if (CHIP_HAS_DMA > 1)\n    GPDMA_CHAN_START,\n#endif\n};\n\nstatic const uint8_t chan_num[HAL_DMA_INST_QTY] = {\n    AUDMA_CHAN_NUM,\n#if (CHIP_HAS_DMA > 1)\n    GPDMA_CHAN_NUM,\n#endif\n};\n\n/* Channel array to monitor free channel */\nstatic bool chan_enabled[HAL_DMA_INST_QTY][DMA_NUMBER_CHANNELS];\n\nstatic HAL_DMA_IRQ_HANDLER_T handler[HAL_DMA_INST_QTY][DMA_NUMBER_CHANNELS];\n\n#ifdef DMA_REMAP\nstatic uint32_t periph_remap_bitmap[HAL_DMA_INST_QTY];\n#endif\n\n#ifdef CORE_SLEEP_POWER_DOWN\nstatic uint32_t saved_dma_regs[HAL_DMA_INST_QTY];\n#endif\n\nstatic const char *const err_invalid_inst = \"Invalid DMA inst: %u\";\n\nstatic const char *const err_invalid_chan[HAL_DMA_INST_QTY] = {\n    \"Invalid AUDMA chan: %u\",\n#if (CHIP_HAS_DMA > 1)\n    \"Invalid GPDMA chan: %u\",\n#endif\n};\n\nstatic bool dma_opened = false;\n\nstatic HAL_DMA_DELAY_FUNC dma_delay = NULL;\n\n/*****************************************************************************\n * Public types/enumerations/variables\n ****************************************************************************/\n\n/*****************************************************************************\n * Private functions\n ****************************************************************************/\nstatic void hal_dma_delay(uint32_t ms) {\n  if (dma_delay && !in_isr()) {\n    dma_delay(ms);\n  } else {\n    hal_sys_timer_delay(MS_TO_TICKS(ms));\n  }\n}\n\nstatic inline uint8_t generate_chan(enum HAL_DMA_INST_T inst, uint8_t hwch) {\n  return ((inst << 4) | (hwch & 0xF));\n}\n\nstatic inline enum HAL_DMA_INST_T get_inst_from_chan(uint8_t ch) {\n  return (enum HAL_DMA_INST_T)(ch >> 4);\n}\n\nstatic inline uint8_t get_hwch_from_chan(uint8_t ch) { return (ch & 0xF); }\n\nstatic inline int get_index_from_periph(enum HAL_DMA_PERIPH_T periph,\n                                        enum HAL_DMA_INST_T *pinst,\n                                        uint8_t *pidx) {\n  enum HAL_DMA_INST_T inst;\n  int i;\n\n  for (inst = 0; inst < HAL_DMA_INST_QTY; inst++) {\n    for (i = 0; i < fifo_periph[inst].count; i++) {\n      if (fifo_periph[inst].periph[i] == periph) {\n        *pinst = inst;\n        *pidx = i;\n        return 0;\n      }\n    }\n  }\n\n  return 1;\n}\n\n#ifdef DMA_REMAP\nstatic inline int get_remap_index_from_periph(enum HAL_DMA_INST_T inst,\n                                              enum HAL_DMA_PERIPH_T periph,\n                                              uint8_t *pidx) {\n  int i;\n\n  if (fifo_periph[inst].periph_remap == NULL) {\n    return 1;\n  }\n\n  for (i = 0; i < fifo_periph[inst].count; i++) {\n    if (fifo_periph[inst].periph_remap[i] == periph) {\n      *pidx = i;\n      return 0;\n    }\n  }\n\n  return 2;\n}\n#endif\n\nstatic inline uint32_t hal_dma_get_periph_addr(enum HAL_DMA_PERIPH_T periph) {\n  int ret;\n  enum HAL_DMA_INST_T inst;\n  uint8_t index;\n\n  ret = get_index_from_periph(periph, &inst, &index);\n  if (ret) {\n    return 0;\n  }\n\n  return fifo_addr[inst].addr[index];\n}\n\n/* Initialize the DMA */\nstatic void hal_dma_open_inst(enum HAL_DMA_INST_T inst) {\n  uint8_t i;\n\n  /* Reset all channel configuration register */\n  for (i = 0; i < DMA_NUMBER_CHANNELS; i++) {\n    dma[inst]->CH[i].CONFIG = 0;\n  }\n\n  /* Clear all DMA interrupt and error flag */\n  dma[inst]->INTTCCLR = ~0UL;\n  dma[inst]->INTERRCLR = ~0UL;\n\n  dma[inst]->DMACONFIG =\n      (dma[inst]->DMACONFIG &\n       ~(DMA_DMACONFIG_AHB1_BIGENDIAN | DMA_DMACONFIG_AHB2_BIGENDIAN |\n         DMA_DMACONFIG_CLK_EN_MASK)) |\n      DMA_DMACONFIG_EN |\n#ifdef CHIP_BEST3001\n      DMA_DMACONFIG_TC_IRQ_EN_MASK |\n#endif\n      0;\n\n#ifdef CHIP_BEST1400\n  dma[inst]->DMACONFIG &= ~DMA_DMACONFIG_TC_IRQ_EN_MASK;\n#endif\n\n  /* Reset all channels are free */\n  for (i = 0; i < DMA_NUMBER_CHANNELS; i++) {\n    chan_enabled[inst][i] = false;\n  }\n\n  NVIC_SetVector(irq_type[inst], irq_entry[inst]);\n  if (inst == HAL_DMA_INST_AUDMA) {\n    NVIC_SetPriority(irq_type[inst], IRQ_PRIORITY_ABOVENORMAL);\n  } else {\n    NVIC_SetPriority(irq_type[inst], IRQ_PRIORITY_NORMAL);\n  }\n  NVIC_ClearPendingIRQ(irq_type[inst]);\n  NVIC_EnableIRQ(irq_type[inst]);\n}\n\n/* Shutdown the DMA */\nstatic void hal_dma_close_inst(enum HAL_DMA_INST_T inst) {\n  NVIC_DisableIRQ(irq_type[inst]);\n  dma[inst]->DMACONFIG = 0;\n}\n\nstatic bool hal_dma_chan_busy_inst(enum HAL_DMA_INST_T inst, uint8_t hwch) {\n  return !!(dma[inst]->ENBLDCHNS & DMA_STAT_CHAN(hwch));\n}\n\nstatic void hal_dma_handle_chan_irq(enum HAL_DMA_INST_T inst, uint8_t hwch) {\n  uint32_t remains;\n  struct HAL_DMA_DESC_T *lli;\n  bool tcint, errint;\n\n  /* Check counter terminal status */\n  tcint = !!(dma[inst]->INTTCSTAT & DMA_STAT_CHAN(hwch));\n  /* Check error terminal status */\n  errint = !!(dma[inst]->INTERRSTAT & DMA_STAT_CHAN(hwch));\n\n  if (tcint || errint) {\n    if (tcint) {\n      /* Clear terminate counter Interrupt pending */\n      dma[inst]->INTTCCLR = DMA_STAT_CHAN(hwch);\n    }\n    if (errint) {\n      /* Clear error counter Interrupt pending */\n      dma[inst]->INTERRCLR = DMA_STAT_CHAN(hwch);\n    }\n\n    if (handler[inst][hwch]) {\n      remains =\n          GET_BITFIELD(dma[inst]->CH[hwch].CONTROL, DMA_CONTROL_TRANSFERSIZE);\n      lli = (struct HAL_DMA_DESC_T *)dma[inst]->CH[hwch].LLI;\n      handler[inst][hwch](generate_chan(inst, hwch), remains, errint, lli);\n    }\n  }\n}\n\nstatic void hal_dma_irq_handler(enum HAL_DMA_INST_T inst) {\n  uint8_t hwch;\n\n  for (hwch = 0; hwch < DMA_NUMBER_CHANNELS; hwch++) {\n    if ((dma[inst]->INTSTAT & DMA_STAT_CHAN(hwch)) == 0) {\n      continue;\n    }\n    hal_dma_handle_chan_irq(inst, hwch);\n  }\n}\n\nstatic void hal_audma_irq_handler(void) {\n  hal_dma_irq_handler(HAL_DMA_INST_AUDMA);\n}\n\n#if (CHIP_HAS_DMA > 1)\nstatic void hal_gpdma_irq_handler(void) {\n  hal_dma_irq_handler(HAL_DMA_INST_GPDMA);\n}\n#endif\n\nstatic enum HAL_DMA_RET_T\nhal_dma_init_control(uint32_t *ctrl, const struct HAL_DMA_CH_CFG_T *cfg,\n                     int tc_irq) {\n  uint32_t addr_inc;\n  enum HAL_DMA_FLOW_CONTROL_T type;\n\n  if (cfg->src_tsize > HAL_DMA_MAX_DESC_XFER_SIZE) {\n    return HAL_DMA_ERR;\n  }\n\n#ifdef CHIP_BEST1000\n  type = cfg->type;\n#else\n  type = cfg->type & ~HAL_DMA_FLOW_FLAG_MASK;\n#endif\n\n  switch (type) {\n  case HAL_DMA_FLOW_M2M_DMA:\n    addr_inc = DMA_CONTROL_SI | DMA_CONTROL_DI;\n    break;\n  case HAL_DMA_FLOW_M2P_DMA:\n  case HAL_DMA_FLOW_M2P_PERIPH:\n    addr_inc = DMA_CONTROL_SI;\n    break;\n  case HAL_DMA_FLOW_P2M_DMA:\n  case HAL_DMA_FLOW_P2M_PERIPH:\n    addr_inc = DMA_CONTROL_DI;\n    break;\n  case HAL_DMA_FLOW_P2P_DMA:\n  case HAL_DMA_FLOW_P2P_DSTPERIPH:\n  case HAL_DMA_FLOW_P2P_SRCPERIPH:\n    addr_inc = 0;\n    break;\n  default:\n    return HAL_DMA_ERR;\n  }\n\n#ifndef CHIP_BEST1000\n  if (cfg->type & HAL_DMA_FLOW_FLAG_SI) {\n    addr_inc |= DMA_CONTROL_SI;\n  }\n  if (cfg->type & HAL_DMA_FLOW_FLAG_DI) {\n    addr_inc |= DMA_CONTROL_DI;\n  }\n#endif\n\n  *ctrl =\n      DMA_CONTROL_TRANSFERSIZE(cfg->src_tsize) |\n      DMA_CONTROL_SBSIZE(cfg->src_bsize) | DMA_CONTROL_DBSIZE(cfg->dst_bsize) |\n      DMA_CONTROL_SWIDTH(cfg->src_width) | DMA_CONTROL_DWIDTH(cfg->dst_width) |\n      (tc_irq ? DMA_CONTROL_TC_IRQ : 0) | addr_inc;\n\n  return HAL_DMA_OK;\n}\n\n/*****************************************************************************\n * Generic Public functions\n ****************************************************************************/\n\nenum HAL_DMA_RET_T hal_dma_init_desc(struct HAL_DMA_DESC_T *desc,\n                                     const struct HAL_DMA_CH_CFG_T *cfg,\n                                     const struct HAL_DMA_DESC_T *next,\n                                     int tc_irq) {\n  uint32_t ctrl;\n  enum HAL_DMA_RET_T ret;\n  enum HAL_DMA_FLOW_CONTROL_T type;\n\n  ret = hal_dma_init_control(&ctrl, cfg, tc_irq);\n  if (ret != HAL_DMA_OK) {\n    return ret;\n  }\n\n#ifdef CHIP_BEST1000\n  type = cfg->type;\n#else\n  type = cfg->type & ~HAL_DMA_FLOW_FLAG_MASK;\n#endif\n\n  if (type == HAL_DMA_FLOW_M2M_DMA || type == HAL_DMA_FLOW_M2P_DMA ||\n      type == HAL_DMA_FLOW_M2P_PERIPH) {\n    desc->src = cfg->src;\n  } else {\n    desc->src = hal_dma_get_periph_addr(cfg->src_periph);\n  }\n  if (type == HAL_DMA_FLOW_M2M_DMA || type == HAL_DMA_FLOW_P2M_DMA ||\n      type == HAL_DMA_FLOW_P2M_PERIPH) {\n    desc->dst = cfg->dst;\n  } else {\n    desc->dst = hal_dma_get_periph_addr(cfg->dst_periph);\n  }\n  desc->lli = (uint32_t)next;\n  desc->ctrl = ctrl;\n\n  return HAL_DMA_OK;\n}\n\nenum HAL_DMA_RET_T hal_dma_sg_2d_start(const struct HAL_DMA_DESC_T *desc,\n                                       const struct HAL_DMA_CH_CFG_T *cfg,\n                                       const struct HAL_DMA_2D_CFG_T *src_2d,\n                                       const struct HAL_DMA_2D_CFG_T *dst_2d) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  enum HAL_DMA_FLOW_CONTROL_T type;\n  uint8_t src_periph, dst_periph;\n  enum HAL_DMA_INST_T periph_inst;\n  int ret;\n  uint32_t irq_mask, try_burst;\n  uint32_t lock;\n\n  inst = get_inst_from_chan(cfg->ch);\n  hwch = get_hwch_from_chan(cfg->ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n#ifdef CHIP_BEST1000\n  type = cfg->type;\n#else\n  type = cfg->type & ~HAL_DMA_FLOW_FLAG_MASK;\n#endif\n\n  if (type == HAL_DMA_FLOW_M2M_DMA || type == HAL_DMA_FLOW_M2P_DMA ||\n      type == HAL_DMA_FLOW_M2P_PERIPH) {\n    src_periph = 0;\n  } else {\n    ret = get_index_from_periph(cfg->src_periph, &periph_inst, &src_periph);\n    ASSERT(ret == 0, \"Failed to get src periph: %d\", cfg->src_periph);\n#ifdef DMA_REMAP\n    if (periph_remap_bitmap[periph_inst] & (1 << src_periph)) {\n      periph_inst ^= 1;\n      ret = get_remap_index_from_periph(periph_inst, cfg->src_periph,\n                                        &src_periph);\n      ASSERT(ret == 0, \"Failed to get remap src periph: %d\", cfg->src_periph);\n    }\n#endif\n    ASSERT(inst == periph_inst,\n           \"Mismatch inst in chan=0x%02x and src periph %d\", cfg->ch,\n           cfg->src_periph);\n  }\n  if (type == HAL_DMA_FLOW_M2M_DMA || type == HAL_DMA_FLOW_P2M_DMA ||\n      type == HAL_DMA_FLOW_P2M_PERIPH) {\n    dst_periph = 0;\n  } else {\n    ret = get_index_from_periph(cfg->dst_periph, &periph_inst, &dst_periph);\n    ASSERT(ret == 0, \"Failed to get dst periph: %d\", cfg->dst_periph);\n#ifdef DMA_REMAP\n    if (periph_remap_bitmap[periph_inst] & (1 << dst_periph)) {\n      periph_inst ^= 1;\n      ret = get_remap_index_from_periph(periph_inst, cfg->dst_periph,\n                                        &dst_periph);\n      ASSERT(ret == 0, \"Failed to get remap dst periph: %d\", cfg->dst_periph);\n    }\n#endif\n    ASSERT(inst == periph_inst,\n           \"Mismatch inst in chan=0x%02x and dst periph %d\", cfg->ch,\n           cfg->dst_periph);\n  }\n\n  if (!chan_enabled[inst][hwch]) {\n    // Not acquired\n    return HAL_DMA_ERR;\n  }\n  if (hal_dma_chan_busy_inst(inst, hwch)) {\n    // Busy\n    return HAL_DMA_ERR;\n  }\n\n  if (cfg->handler == NULL) {\n    irq_mask = 0;\n  } else {\n    irq_mask = DMA_CONFIG_ERR_IRQMASK | DMA_CONFIG_TC_IRQMASK;\n    handler[inst][hwch] = cfg->handler;\n  }\n\n  try_burst = cfg->try_burst ? DMA_CONFIG_TRY_BURST : 0;\n\n  /* Reset the Interrupt status */\n  dma[inst]->INTTCCLR = DMA_STAT_CHAN(hwch);\n  dma[inst]->INTERRCLR = DMA_STAT_CHAN(hwch);\n\n  dma[inst]->CH[hwch].SRCADDR = desc->src;\n  dma[inst]->CH[hwch].DSTADDR = desc->dst;\n  dma[inst]->CH[hwch].LLI = desc->lli;\n  dma[inst]->CH[hwch].CONTROL = desc->ctrl;\n  dma[inst]->CH[hwch].CONFIG =\n      DMA_CONFIG_SRCPERIPH(src_periph) | DMA_CONFIG_DSTPERIPH(dst_periph) |\n      DMA_CONFIG_TRANSFERTYPE(type) | irq_mask | try_burst;\n\n#ifndef CHIP_BEST1000\n  if (src_2d) {\n    dma[inst]->_2D[hwch].SRCX =\n        DMA_2D_MODIFY(src_2d->xmodify) | DMA_2D_COUNT(src_2d->xcount);\n    dma[inst]->_2D[hwch].SRCY =\n        DMA_2D_MODIFY(src_2d->ymodify) | DMA_2D_COUNT(src_2d->ycount);\n    dma[inst]->_2D[hwch].CTRL |= DMA_2D_CTRL_SRC_EN;\n  } else {\n    dma[inst]->_2D[hwch].CTRL &= ~DMA_2D_CTRL_SRC_EN;\n  }\n  if (dst_2d) {\n    dma[inst]->_2D[hwch].DSTX =\n        DMA_2D_MODIFY(dst_2d->xmodify) | DMA_2D_COUNT(dst_2d->xcount);\n    dma[inst]->_2D[hwch].DSTY =\n        DMA_2D_MODIFY(dst_2d->ymodify) | DMA_2D_COUNT(dst_2d->ycount);\n    dma[inst]->_2D[hwch].CTRL |= DMA_2D_CTRL_DST_EN;\n  } else {\n    dma[inst]->_2D[hwch].CTRL &= ~DMA_2D_CTRL_DST_EN;\n  }\n#endif\n\n  lock = int_lock();\n  if (cfg->start_cb) {\n    cfg->start_cb(cfg->ch);\n  }\n  dma[inst]->CH[hwch].CONFIG |= DMA_CONFIG_EN;\n  int_unlock(lock);\n\n  return HAL_DMA_OK;\n}\n\nenum HAL_DMA_RET_T hal_dma_sg_start(const struct HAL_DMA_DESC_T *desc,\n                                    const struct HAL_DMA_CH_CFG_T *cfg) {\n  return hal_dma_sg_2d_start(desc, cfg, NULL, NULL);\n}\n\nenum HAL_DMA_RET_T hal_dma_start(const struct HAL_DMA_CH_CFG_T *cfg) {\n  struct HAL_DMA_DESC_T desc;\n  enum HAL_DMA_RET_T ret;\n\n  ret = hal_dma_init_desc(&desc, cfg, NULL, 1);\n  if (ret != HAL_DMA_OK) {\n    return ret;\n  }\n\n  ret = hal_dma_sg_start(&desc, cfg);\n  if (ret != HAL_DMA_OK) {\n    return ret;\n  }\n\n  return HAL_DMA_OK;\n}\n\nuint32_t hal_dma_cancel(uint8_t ch) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  uint32_t remains;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  dma[inst]->CH[hwch].CONFIG &= ~DMA_CONFIG_EN;\n  dma[inst]->INTTCCLR = DMA_STAT_CHAN(hwch);\n  dma[inst]->INTERRCLR = DMA_STAT_CHAN(hwch);\n\n  remains = GET_BITFIELD(dma[inst]->CH[hwch].CONTROL, DMA_CONTROL_TRANSFERSIZE);\n\n  return remains;\n}\n\nuint32_t hal_dma_stop(uint8_t ch) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  uint8_t retry = 0;\n  const uint8_t max_retry = 10;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  dma[inst]->CH[hwch].CONFIG |= DMA_CONFIG_HALT;\n#if 1\n  while ((dma[inst]->CH[hwch].CONFIG & DMA_CONFIG_ACTIVE) &&\n         (++retry < max_retry)) {\n    if (retry <= 3) {\n      hal_sys_timer_delay_us(10);\n    } else {\n      hal_dma_delay(1);\n    }\n  }\n#else\n  while (dma[inst]->CH[hwch].CONFIG & DMA_CONFIG_ACTIVE)\n    ;\n#endif\n  return hal_dma_cancel(ch);\n}\n\nuint8_t hal_dma_get_chan(enum HAL_DMA_PERIPH_T periph,\n                         enum HAL_DMA_GET_CHAN_T policy) {\n  enum HAL_DMA_INST_T inst;\n  int ret;\n  uint8_t i, hwch;\n  uint8_t got = HAL_DMA_CHAN_NONE;\n  uint32_t lock;\n\n  ASSERT(policy == HAL_DMA_HIGH_PRIO || policy == HAL_DMA_LOW_PRIO ||\n             policy == HAL_DMA_LOW_PRIO_ONLY,\n         \"Invalid DMA policy: %d\", policy);\n\n  if (periph == HAL_GPDMA_MEM) {\n    inst = HAL_DMA_INST_GPDMA;\n  } else if (periph == HAL_AUDMA_MEM) {\n    inst = HAL_DMA_INST_AUDMA;\n  } else {\n    ret = get_index_from_periph(periph, &inst, &i);\n    ASSERT(ret == 0, \"Invalid DMA periph: %d\", periph);\n#ifdef DMA_REMAP\n    if (periph_remap_bitmap[inst] & (1 << i)) {\n      inst ^= 1;\n    }\n#endif\n  }\n\n  lock = int_lock();\n  for (i = 0; i < DMA_NUMBER_CHANNELS; i++) {\n    if (policy == HAL_DMA_HIGH_PRIO) {\n      hwch = i;\n    } else if (policy == HAL_DMA_LOW_PRIO) {\n      hwch = DMA_NUMBER_CHANNELS - 1 - i;\n    } else {\n      hwch = DMA_NUMBER_CHANNELS - 1 - i;\n      if (hwch < 6) {\n        break;\n      }\n    }\n\n    if (!chan_enabled[inst][hwch] && !hal_dma_chan_busy_inst(inst, hwch)) {\n      chan_enabled[inst][hwch] = true;\n      got = generate_chan(inst, hwch);\n      dma[inst]->DMACONFIG |= DMA_DMACONFIG_CLK_EN(1 << hwch);\n      break;\n    }\n  }\n  int_unlock(lock);\n\n  return got;\n}\n\nvoid hal_dma_free_chan(uint8_t ch) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  uint32_t lock;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n  ASSERT(chan_enabled[inst][hwch], \"DMA chan not enabled: inst=%u hwch=%u\",\n         inst, hwch);\n\n  hal_dma_cancel(ch);\n\n  lock = int_lock();\n  chan_enabled[inst][hwch] = false;\n  dma[inst]->DMACONFIG &= ~DMA_DMACONFIG_CLK_EN(1 << hwch);\n  int_unlock(lock);\n}\n\nuint32_t hal_dma_get_cur_src_addr(uint8_t ch) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  return dma[inst]->CH[hwch].SRCADDR;\n}\n\nuint32_t hal_dma_get_cur_dst_addr(uint8_t ch) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  return dma[inst]->CH[hwch].DSTADDR;\n}\n\nvoid SRAM_TEXT_LOC hal_dma_get_cur_src_remain_and_addr(uint8_t ch,\n                                                       uint32_t *remain,\n                                                       uint32_t *src) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  uint32_t lock;\n  uint32_t size[2];\n  uint32_t srcaddr[2];\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  lock = int_lock();\n  size[0] = dma[inst]->CH[hwch].CONTROL;\n  srcaddr[0] = dma[inst]->CH[hwch].SRCADDR;\n  size[1] = dma[inst]->CH[hwch].CONTROL;\n  srcaddr[1] = dma[inst]->CH[hwch].SRCADDR;\n  int_unlock(lock);\n\n  size[0] = GET_BITFIELD(size[0], DMA_CONTROL_TRANSFERSIZE);\n  size[1] = GET_BITFIELD(size[1], DMA_CONTROL_TRANSFERSIZE);\n\n  if (size[0] == size[1]) {\n    *remain = size[0];\n    *src = srcaddr[0];\n  } else {\n    *remain = size[1];\n    *src = srcaddr[1];\n  }\n\n  return;\n}\n\nenum HAL_DMA_RET_T hal_dma_irq_run_chan(uint8_t ch) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  if ((dma[inst]->INTSTAT & DMA_STAT_CHAN(hwch)) == 0) {\n    return HAL_DMA_ERR;\n  }\n\n  hal_dma_handle_chan_irq(inst, hwch);\n\n  return HAL_DMA_OK;\n}\n\nbool hal_dma_chan_busy(uint8_t ch) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  return hal_dma_chan_busy_inst(inst, hwch);\n}\n\nbool hal_dma_busy(void) {\n  enum HAL_DMA_INST_T inst;\n  int hwch;\n\n  for (inst = HAL_DMA_INST_AUDMA; inst < HAL_DMA_INST_QTY; inst++) {\n    for (hwch = chan_start[inst]; hwch < chan_num[inst]; hwch++) {\n      if (hal_dma_chan_busy_inst(inst, hwch)) {\n        return true;\n      }\n    }\n  }\n\n  return false;\n}\n\nuint32_t hal_dma_get_sg_remain_size(uint8_t ch) {\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  uint32_t remains;\n  const struct HAL_DMA_DESC_T *desc, *first;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  remains = GET_BITFIELD(dma[inst]->CH[hwch].CONTROL, DMA_CONTROL_TRANSFERSIZE);\n  first = (const struct HAL_DMA_DESC_T *)dma[inst]->CH[hwch].LLI;\n  desc = first;\n  while (desc) {\n    remains += GET_BITFIELD(desc->ctrl, DMA_CONTROL_TRANSFERSIZE);\n    desc = (const struct HAL_DMA_DESC_T *)desc->lli;\n    if (desc == first) {\n      break;\n    }\n  }\n\n  return remains;\n}\n\nvoid hal_dma_tc_irq_enable(uint8_t ch) {\n#if !(defined(CHIP_BEST1000) || defined(CHIP_BEST2000) ||                      \\\n      defined(CHIP_BEST3001) || defined(CHIP_BEST3005))\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  uint32_t lock;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  lock = int_lock();\n#ifdef CHIP_BEST2300\n  if (inst == HAL_DMA_INST_AUDMA) {\n    hal_cmu_dma_tc_irq_set_chan(hwch);\n  }\n#else\n  dma[inst]->DMACONFIG |= DMA_DMACONFIG_TC_IRQ_EN(1 << hwch);\n#endif\n  int_unlock(lock);\n#endif\n}\n\nvoid hal_dma_tc_irq_disable(uint8_t ch) {\n#if !(defined(CHIP_BEST1000) || defined(CHIP_BEST2000) ||                      \\\n      defined(CHIP_BEST3001) || defined(CHIP_BEST3005))\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  uint32_t lock;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  lock = int_lock();\n#ifdef CHIP_BEST2300\n  if (inst == HAL_DMA_INST_AUDMA) {\n    hal_cmu_dma_tc_irq_clear_chan(hwch);\n  }\n#else\n  dma[inst]->DMACONFIG &= ~DMA_DMACONFIG_TC_IRQ_EN(1 << hwch);\n#endif\n  int_unlock(lock);\n#endif\n}\n\nvoid hal_dma_set_burst_addr_inc(uint8_t ch,\n                                const struct HAL_DMA_BURST_ADDR_INC_T *inc) {\n#if !(defined(CHIP_BEST1000) || defined(CHIP_BEST2000) ||                      \\\n      defined(CHIP_BEST3001) || defined(CHIP_BEST3005))\n  enum HAL_DMA_INST_T inst;\n  uint8_t hwch;\n  uint32_t lock;\n\n  inst = get_inst_from_chan(ch);\n  hwch = get_hwch_from_chan(ch);\n\n  ASSERT(inst < HAL_DMA_INST_QTY, err_invalid_inst, inst);\n  ASSERT(hwch < DMA_NUMBER_CHANNELS, err_invalid_chan[inst], hwch);\n\n  lock = int_lock();\n  if (inc && inc->src_inc_en) {\n    dma[inst]->CH[hwch].CONTROL |= DMA_CONTROL_BURST_SI;\n    dma[inst]->_2D[hwch].SRC_INC = SET_BITFIELD(\n        dma[inst]->_2D[hwch].SRC_INC, DMA_BURST_SRC_INC_VAL, inc->src_inc_val);\n  } else {\n    dma[inst]->CH[hwch].CONTROL &= ~DMA_CONTROL_BURST_SI;\n  }\n  if (inc && inc->dst_inc_en) {\n    dma[inst]->CH[hwch].CONTROL |= DMA_CONTROL_BURST_DI;\n    dma[inst]->_2D[hwch].DST_INC = SET_BITFIELD(\n        dma[inst]->_2D[hwch].DST_INC, DMA_BURST_DST_INC_VAL, inc->dst_inc_val);\n  } else {\n    dma[inst]->CH[hwch].CONTROL &= ~DMA_CONTROL_BURST_DI;\n  }\n  int_unlock(lock);\n#endif\n}\n\nvoid hal_dma_clear_burst_addr_inc(uint8_t ch) {\n  hal_dma_set_burst_addr_inc(ch, NULL);\n}\n\nvoid hal_dma_set_desc_burst_addr_inc(\n    struct HAL_DMA_DESC_T *desc, const struct HAL_DMA_BURST_ADDR_INC_T *inc) {\n#if !(defined(CHIP_BEST1000) || defined(CHIP_BEST2000) ||                      \\\n      defined(CHIP_BEST3001) || defined(CHIP_BEST3005))\n  if (inc && inc->src_inc_en) {\n    desc->ctrl |= DMA_CONTROL_BURST_SI;\n  } else {\n    desc->ctrl &= ~DMA_CONTROL_BURST_SI;\n  }\n  if (inc && inc->dst_inc_en) {\n    desc->ctrl |= DMA_CONTROL_BURST_DI;\n  } else {\n    desc->ctrl &= ~DMA_CONTROL_BURST_DI;\n  }\n#endif\n}\n\nvoid hal_dma_clear_desc_burst_addr_inc(struct HAL_DMA_DESC_T *desc) {\n  hal_dma_set_desc_burst_addr_inc(desc, NULL);\n}\n\n#ifdef DMA_REMAP\nvoid hal_dma_remap_periph(enum HAL_DMA_PERIPH_T periph, int enable) {\n  enum HAL_DMA_INST_T inst1, inst2;\n  uint8_t index1, index2;\n  int ret;\n  uint32_t lock;\n\n  // Tag the periph\n  ret = get_index_from_periph(periph, &inst1, &index1);\n  ASSERT(ret == 0, \"Invalid DMA periph for remap1: %d\", periph);\n\n  // Tag the peer periph\n  inst2 = inst1 ^ 1;\n  ret = get_remap_index_from_periph(inst2, periph, &index2);\n  ASSERT(ret == 0, \"Invalid DMA periph for remap2: %d\", periph);\n\n  lock = int_lock();\n  if (enable) {\n    periph_remap_bitmap[inst1] |= (1 << index1);\n    periph_remap_bitmap[inst2] |= (1 << index2);\n#ifndef CHIP_BEST1000\n    // For best2000, index1 == index2\n    hal_cmu_dma_swap_enable(index1);\n#endif\n  } else {\n    periph_remap_bitmap[inst1] &= ~(1 << index1);\n    periph_remap_bitmap[inst2] &= ~(1 << index2);\n#ifndef CHIP_BEST1000\n    hal_cmu_dma_swap_disable(index1);\n#endif\n  }\n  int_unlock(lock);\n}\n#endif\n\nvoid hal_dma_open(void) {\n  enum HAL_DMA_INST_T inst;\n\n  if (dma_opened) {\n    return;\n  }\n\n  for (inst = 0; inst < HAL_DMA_INST_QTY; inst++) {\n    hal_dma_open_inst(inst);\n  }\n\n#ifdef DMA_REMAP\n#ifdef CHIP_BEST1000\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_4) {\n    hal_dma_remap_periph(HAL_AUDMA_I2S0_RX, 1);\n    hal_dma_remap_periph(HAL_AUDMA_I2S0_TX, 1);\n    hal_dma_remap_periph(HAL_AUDMA_SPDIF0_RX, 1);\n    hal_dma_remap_periph(HAL_AUDMA_SPDIF0_TX, 1);\n  }\n#endif\n#endif\n\n  dma_opened = true;\n}\n\nvoid hal_dma_close(void) {\n  enum HAL_DMA_INST_T inst;\n\n  if (!dma_opened) {\n    return;\n  }\n\n  for (inst = 0; inst < HAL_DMA_INST_QTY; inst++) {\n    hal_dma_close_inst(inst);\n  }\n\n  dma_opened = false;\n}\n\n#ifdef CORE_SLEEP_POWER_DOWN\nvoid hal_dma_sleep(void) {\n  enum HAL_DMA_INST_T inst;\n\n  for (inst = 0; inst < HAL_DMA_INST_QTY; inst++) {\n    saved_dma_regs[inst] = dma[inst]->DMACONFIG;\n  }\n}\n\nvoid hal_dma_wakeup(void) {\n  enum HAL_DMA_INST_T inst;\n\n  for (inst = 0; inst < HAL_DMA_INST_QTY; inst++) {\n    dma[inst]->DMACONFIG = saved_dma_regs[inst];\n  }\n}\n#endif\n\nHAL_DMA_DELAY_FUNC hal_dma_set_delay_func(HAL_DMA_DELAY_FUNC new_func) {\n  HAL_DMA_DELAY_FUNC old_func = dma_delay;\n  dma_delay = new_func;\n  return old_func;\n}\n"
  },
  {
    "path": "platform/hal/hal_dma.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_DMA_H__\n#define __HAL_DMA_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"stdbool.h\"\n#include \"plat_types.h\"\n\n#define HAL_DMA_CHAN_NONE               0xFF\n\n#define HAL_DMA_MAX_DESC_XFER_SIZE      0xFFF\n\nenum HAL_DMA_RET_T {\n    HAL_DMA_OK,\n    HAL_DMA_ERR,\n};\n\nenum HAL_DMA_GET_CHAN_T {\n    HAL_DMA_HIGH_PRIO,\n    HAL_DMA_LOW_PRIO,\n    HAL_DMA_LOW_PRIO_ONLY\n};\n\n// DMA Type of DMA controller\nenum HAL_DMA_FLOW_CONTROL_T {\n    HAL_DMA_FLOW_M2M_DMA            = 0,    /* Memory to memory - DMA control */\n    HAL_DMA_FLOW_M2P_DMA            = 1,    /* Memory to peripheral - DMA control */\n    HAL_DMA_FLOW_P2M_DMA            = 2,    /* Peripheral to memory - DMA control */\n    HAL_DMA_FLOW_P2P_DMA            = 3,    /* Source peripheral to destination peripheral - DMA control */\n    HAL_DMA_FLOW_P2P_DSTPERIPH      = 4,    /* Source peripheral to destination peripheral - destination peripheral control */\n    HAL_DMA_FLOW_M2P_PERIPH         = 5,    /* Memory to peripheral - peripheral control */\n    HAL_DMA_FLOW_P2M_PERIPH         = 6,    /* Peripheral to memory - peripheral control */\n    HAL_DMA_FLOW_P2P_SRCPERIPH      = 7,    /* Source peripheral to destination peripheral - source peripheral control */\n\n    HAL_DMA_FLOW_FLAG_SI            = 0x40,\n    HAL_DMA_FLOW_FLAG_DI            = 0x80,\n    HAL_DMA_FLOW_FLAG_MASK          = (HAL_DMA_FLOW_FLAG_SI | HAL_DMA_FLOW_FLAG_DI),\n\n    HAL_DMA_FLOW_M2P_DI_DMA         = HAL_DMA_FLOW_M2P_DMA | HAL_DMA_FLOW_FLAG_DI,\n    HAL_DMA_FLOW_P2M_SI_DMA         = HAL_DMA_FLOW_P2M_DMA | HAL_DMA_FLOW_FLAG_SI,\n    HAL_DMA_FLOW_P2P_DI_DMA         = HAL_DMA_FLOW_P2P_DMA | HAL_DMA_FLOW_FLAG_DI,\n    HAL_DMA_FLOW_P2P_SI_DMA         = HAL_DMA_FLOW_P2P_DMA | HAL_DMA_FLOW_FLAG_SI,\n};\n\n// DMA Burst size in Source and Destination definitions\nenum HAL_DMA_BSIZE_T {\n    HAL_DMA_BSIZE_1           = 0,    /* Burst size = 1 */\n    HAL_DMA_BSIZE_4           = 1,    /* Burst size = 4 */\n    HAL_DMA_BSIZE_8           = 2,    /* Burst size = 8 */\n    HAL_DMA_BSIZE_16          = 3,    /* Burst size = 16 */\n    HAL_DMA_BSIZE_32          = 4,    /* Burst size = 32 */\n    HAL_DMA_BSIZE_64          = 5,    /* Burst size = 64 */\n    HAL_DMA_BSIZE_128         = 6,    /* Burst size = 128 */\n    HAL_DMA_BSIZE_256         = 7,    /* Burst size = 256 */\n};\n\n// Width in Source transfer width and Destination transfer width definitions\nenum HAL_DMA_WDITH_T {\n    HAL_DMA_WIDTH_BYTE        = 0,    /* Width = 1 byte */\n    HAL_DMA_WIDTH_HALFWORD    = 1,    /* Width = 2 bytes */\n    HAL_DMA_WIDTH_WORD        = 2,    /* Width = 4 bytes */\n};\n\nenum HAL_DMA_PERIPH_T {\n    HAL_DMA_PERIPH_NULL         = 0,\n    HAL_GPDMA_MEM               = 1,\n    HAL_AUDMA_MEM               = 2,\n\n    HAL_GPDMA_SDIO              = 10,\n    HAL_GPDMA_SDMMC             = 11,\n    HAL_GPDMA_I2C0_RX           = 12,\n    HAL_GPDMA_I2C0_TX           = 13,\n    HAL_GPDMA_SPI_RX            = 14,\n    HAL_GPDMA_SPI_TX            = 15,\n    HAL_GPDMA_SPILCD_RX         = 16,\n    HAL_GPDMA_SPILCD_TX         = 17,\n    HAL_GPDMA_UART0_RX          = 18,\n    HAL_GPDMA_UART0_TX          = 19,\n    HAL_GPDMA_UART1_RX          = 20,\n    HAL_GPDMA_UART1_TX          = 21,\n    HAL_GPDMA_ISPI_RX           = 22,\n    HAL_GPDMA_ISPI_TX           = 23,\n    HAL_GPDMA_UART2_RX          = 24,\n    HAL_GPDMA_UART2_TX          = 25,\n    HAL_GPDMA_FLASH_RX          = 26,\n    HAL_GPDMA_FLASH_TX          = 27,\n    HAL_GPDMA_I2C1_RX           = 28,\n    HAL_GPDMA_I2C1_TX           = 29,\n    HAL_GPDMA_I2C2_RX           = 30,\n    HAL_GPDMA_I2C2_TX           = 31,\n    HAL_GPDMA_I2C3_RX           = 32,\n    HAL_GPDMA_I2C3_TX           = 33,\n\n    HAL_AUDMA_CODEC_RX          = 50,\n    HAL_AUDMA_CODEC_TX          = 51,\n    HAL_AUDMA_BTPCM_RX          = 52,\n    HAL_AUDMA_BTPCM_TX          = 53,\n    HAL_AUDMA_I2S0_RX           = 54,\n    HAL_AUDMA_I2S0_TX           = 55,\n    HAL_AUDMA_DPD_RX            = 56,\n    HAL_AUDMA_DPD_TX            = 57,\n    HAL_AUDMA_SPDIF0_RX         = 58,\n    HAL_AUDMA_SPDIF0_TX         = 59,\n    HAL_AUDMA_SPDIF1_RX         = 60,\n    HAL_AUDMA_SPDIF1_TX         = 61,\n    HAL_AUDMA_DSD_RX            = 62,\n    HAL_AUDMA_DSD_TX            = 63,\n    HAL_AUDMA_MC_RX             = 64,\n    HAL_AUDMA_FFT_RX            = 65,\n    HAL_AUDMA_FFT_TX            = 66,\n    HAL_AUDMA_FIR_RX            = 67,\n    HAL_AUDMA_FIR_TX            = 68,\n    HAL_AUDMA_IIR_RX            = 69,\n    HAL_AUDMA_IIR_TX            = 70,\n    HAL_AUDMA_BTDUMP            = 71,\n    HAL_AUDMA_I2S1_RX           = 72,\n    HAL_AUDMA_I2S1_TX           = 73,\n    HAL_AUDMA_FM_RX             = 74,\n    HAL_AUDMA_FMDUMP0           = 75,\n    HAL_AUDMA_FMDUMP1           = 76,\n    HAL_AUDMA_CODEC_TX2         = 77,\n\n    HAL_DMA_PERIPH_QTY,\n};\n\nstruct HAL_DMA_DESC_T;\n\ntypedef void (*HAL_DMA_IRQ_HANDLER_T)(uint8_t chan, uint32_t remain_tsize, uint32_t error, struct HAL_DMA_DESC_T *lli);\n\ntypedef void (*HAL_DMA_START_CALLBACK_T)(uint8_t chan);\n\ntypedef void (*HAL_DMA_DELAY_FUNC)(uint32_t ms);\n\n// DMA structure using for DMA configuration\nstruct HAL_DMA_CH_CFG_T {\n    uint8_t ch;                         /* DMA channel number */\n    uint8_t try_burst;\n    uint16_t src_tsize;                 /* Length/Size of transfer */\n    enum HAL_DMA_WDITH_T src_width;\n    enum HAL_DMA_WDITH_T dst_width;\n    enum HAL_DMA_BSIZE_T src_bsize;\n    enum HAL_DMA_BSIZE_T dst_bsize;\n    enum HAL_DMA_FLOW_CONTROL_T type;   /* Transfer Type */\n    enum HAL_DMA_PERIPH_T src_periph;\n    enum HAL_DMA_PERIPH_T dst_periph;\n    uint32_t src;                       /* Physical Source Address */\n    uint32_t dst;                       /* Physical Destination Address */\n    HAL_DMA_IRQ_HANDLER_T handler;\n    HAL_DMA_START_CALLBACK_T start_cb;\n};\n\n// Transfer Descriptor structure typedef\nstruct HAL_DMA_DESC_T {\n    uint32_t src;       /* Source address */\n    uint32_t dst;       /* Destination address */\n    uint32_t lli;       /* Pointer to next descriptor structure */\n    uint32_t ctrl;      /* Control word that has transfer size, type etc. */\n};\n\n// DMA 2D configuration structure\nstruct HAL_DMA_2D_CFG_T {\n    int16_t xmodify;\n    uint16_t xcount;\n    int16_t ymodify;\n    uint16_t ycount;\n};\n\nstruct HAL_DMA_BURST_ADDR_INC_T {\n    bool src_inc_en;\n    bool dst_inc_en;\n    int16_t src_inc_val;\n    int16_t dst_inc_val;\n};\n\n//=============================================================\n\nvoid hal_dma_open(void);\n\nvoid hal_dma_close(void);\n\nvoid hal_dma_sleep(void);\n\nvoid hal_dma_wakeup(void);\n\nbool hal_dma_chan_busy(uint8_t ch);\n\nuint8_t hal_dma_get_chan(enum HAL_DMA_PERIPH_T periph, enum HAL_DMA_GET_CHAN_T policy);\n\nvoid hal_dma_free_chan(uint8_t ch);\n\nuint32_t hal_dma_cancel(uint8_t ch);\n\nuint32_t hal_dma_stop(uint8_t ch);\n\nenum HAL_DMA_RET_T hal_dma_init_desc(struct HAL_DMA_DESC_T *desc,\n                                     const struct HAL_DMA_CH_CFG_T *cfg,\n                                     const struct HAL_DMA_DESC_T *next,\n                                     int tc_irq);\n\nenum HAL_DMA_RET_T hal_dma_sg_start(const struct HAL_DMA_DESC_T *desc,\n                                    const struct HAL_DMA_CH_CFG_T *cfg);\n\nenum HAL_DMA_RET_T hal_dma_sg_2d_start(const struct HAL_DMA_DESC_T *desc,\n                                       const struct HAL_DMA_CH_CFG_T *cfg,\n                                       const struct HAL_DMA_2D_CFG_T *src_2d,\n                                       const struct HAL_DMA_2D_CFG_T *dst_2d);\n\nenum HAL_DMA_RET_T hal_dma_start(const struct HAL_DMA_CH_CFG_T *cfg);\n\nuint32_t hal_dma_get_cur_src_addr(uint8_t ch);\n\nuint32_t hal_dma_get_cur_dst_addr(uint8_t ch);\n\nvoid hal_dma_get_cur_src_remain_and_addr(uint8_t ch, uint32_t *remain, uint32_t *src);\n\nuint32_t hal_dma_get_sg_remain_size(uint8_t ch);\n\nenum HAL_DMA_RET_T hal_dma_irq_run_chan(uint8_t ch);\n\nbool hal_dma_busy(void);\n\nHAL_DMA_DELAY_FUNC hal_dma_set_delay_func(HAL_DMA_DELAY_FUNC new_func);\n\nvoid hal_dma_remap_periph(enum HAL_DMA_PERIPH_T periph, int enable);\n\nvoid hal_dma_tc_irq_enable(uint8_t ch);\n\nvoid hal_dma_tc_irq_disable(uint8_t ch);\n\nvoid hal_dma_set_burst_addr_inc(uint8_t ch, const struct HAL_DMA_BURST_ADDR_INC_T *inc);\n\nvoid hal_dma_clear_burst_addr_inc(uint8_t ch);\n\nvoid hal_dma_set_desc_burst_addr_inc(struct HAL_DMA_DESC_T *desc, const struct HAL_DMA_BURST_ADDR_INC_T *inc);\n\nvoid hal_dma_clear_desc_burst_addr_inc(struct HAL_DMA_DESC_T *desc);\n\n//=============================================================\n\n#define hal_audma_open                  hal_dma_open\n#define hal_audma_close                 hal_dma_close\n#define hal_audma_chan_busy             hal_dma_chan_busy\n#define hal_audma_get_chan              hal_dma_get_chan\n#define hal_audma_free_chan             hal_dma_free_chan\n#define hal_audma_cancel                hal_dma_cancel\n#define hal_audma_stop                  hal_dma_stop\n#define hal_audma_init_desc             hal_dma_init_desc\n#define hal_audma_sg_start              hal_dma_sg_start\n#define hal_audma_start                 hal_dma_start\n#define hal_audma_get_cur_src_addr      hal_dma_get_cur_src_addr\n#define hal_audma_get_cur_dst_addr      hal_dma_get_cur_dst_addr\n#define hal_audma_get_sg_remain_size    hal_dma_get_sg_remain_size\n#define hal_audma_irq_run_chan          hal_dma_irq_run_chan\n\n#define hal_gpdma_open                  hal_dma_open\n#define hal_gpdma_close                 hal_dma_close\n#define hal_gpdma_chan_busy             hal_dma_chan_busy\n#define hal_gpdma_get_chan              hal_dma_get_chan\n#define hal_gpdma_free_chan             hal_dma_free_chan\n#define hal_gpdma_cancel                hal_dma_cancel\n#define hal_gpdma_stop                  hal_dma_stop\n#define hal_gpdma_init_desc             hal_dma_init_desc\n#define hal_gpdma_sg_start              hal_dma_sg_start\n#define hal_gpdma_start                 hal_dma_start\n#define hal_gpdma_get_cur_src_addr      hal_dma_get_cur_src_addr\n#define hal_gpdma_get_cur_dst_addr      hal_dma_get_cur_dst_addr\n#define hal_gpdma_get_sg_remain_size    hal_dma_get_sg_remain_size\n#define hal_gpdma_irq_run_chan          hal_dma_irq_run_chan\n\n//=============================================================\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_gpadc.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n\n#ifndef GPADC_CHIP_SPECIFIC\n\n#include \"cmsis_nvic.h\"\n#include \"hal_analogif.h\"\n#include \"hal_gpadc.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"stddef.h\"\n\n#define HAL_GPADC_TRACE(n, s, ...) // TRACE(n, s, ##__VA_ARGS__)\n\n#define VBAT_DIV_ALWAYS_ON\n\n#define gpadc_reg_read(reg, val) pmu_read(reg, val)\n#define gpadc_reg_write(reg, val) pmu_write(reg, val)\n\n// Battery voltage = gpadc voltage * 4\n// adc rate 0~2v(10bit)\n// Battery_voltage:Adc_rate = 4:1\n#define HAL_GPADC_MVOLT_A 800\n#define HAL_GPADC_MVOLT_B 1050\n#define HAL_GPADC_CALIB_DEFAULT_A 428\n#define HAL_GPADC_CALIB_DEFAULT_B 565\n\n#if 0\n#elif defined(CHIP_BEST1400) || defined(CHIP_BEST1402) ||                      \\\n    defined(CHIP_BEST2000) || defined(CHIP_BEST2001) ||                        \\\n    defined(CHIP_BEST2300) || defined(CHIP_BEST2300A) ||                       \\\n    defined(CHIP_BEST2300P) || defined(CHIP_BEST3001) ||                       \\\n    defined(CHIP_BEST3005)\n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || defined(CHIP_BEST2001)\n\nenum GPADC_REG_T {\n  GPADC_REG_VBAT_EN = 0x02,\n  GPADC_REG_INTVL_EN = 0x18,\n  GPADC_REG_INTVL_VAL = 0x1C,\n  GPADC_REG_START = 0x4F,\n  GPADC_REG_CH_EN = 0x1D,\n  GPADC_REG_INT_MASK = 0x1F,\n  GPADC_REG_INT_EN = 0x20,\n  GPADC_REG_INT_RAW_STS = 0x50,\n  GPADC_REG_INT_MSKED_STS = 0x51,\n  GPADC_REG_INT_CLR = 0x51,\n  GPADC_REG_CH0_DATA = 0x56,\n};\n\n#else\n\nenum GPADC_REG_T {\n  GPADC_REG_VBAT_EN = 0x02,\n  GPADC_REG_INTVL_EN = 0x1F,\n  GPADC_REG_INTVL_VAL = 0x23,\n  GPADC_REG_START = 0x4F,\n  GPADC_REG_CH_EN = 0x24,\n  GPADC_REG_INT_MASK = 0x26,\n  GPADC_REG_INT_EN = 0x27,\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n  GPADC_REG_INT_RAW_STS = 0x52,\n  GPADC_REG_INT_MSKED_STS = 0x53,\n  GPADC_REG_INT_CLR = 0x51,\n#else\n  GPADC_REG_INT_RAW_STS = 0x50,\n  GPADC_REG_INT_MSKED_STS = 0x51,\n  GPADC_REG_INT_CLR = 0x51,\n#endif\n  GPADC_REG_CH0_DATA = 0x56,\n};\n\n#endif\n\n// GPADC_REG_VBAT_EN\n#define REG_PU_VBAT_DIV (1 << 15)\n\n// GPADC_REG_INTVL_EN\n#define GPADC_INTERVAL_MODE (1 << 12)\n\n// GPADC_REG_START\n#define GPADC_START (1 << 5)\n#define KEY_START (1 << 4)\n\n// GPADC_REG_CH_EN\n#define CHAN_EN_REG_SHIFT 0\n#define CHAN_EN_REG_MASK (0xFF << CHAN_EN_REG_SHIFT)\n#define CHAN_EN_REG(n) BITFIELD_VAL(CHAN_EN_REG, n)\n\n// GPADC_REG_INT_MASK\n#define KEY_ERR1_INTR_MSK (1 << 12)\n#define KEY_ERR0_INTR_MSK (1 << 11)\n#define KEY_PRESS_INTR_MSK (1 << 10)\n#define KEY_RELEASE_INTR_MSK (1 << 9)\n#define SAMPLE_DONE_INTR_MSK (1 << 8)\n#define CHAN_DATA_INTR_MSK_SHIFT 0\n#define CHAN_DATA_INTR_MSK_MASK (0xFF << CHAN_DATA_INTR_MSK_SHIFT)\n#define CHAN_DATA_INTR_MSK(n) BITFIELD_VAL(CHAN_DATA_INTR_MSK, n)\n\n// GPADC_REG_INT_EN\n#define KEY_ERR1_INTR_EN (1 << 12)\n#define KEY_ERR0_INTR_EN (1 << 11)\n#define KEY_PRESS_INTR_EN (1 << 10)\n#define KEY_RELEASE_INTR_EN (1 << 9)\n#define SAMPLE_DONE_INTR_EN (1 << 8)\n#define CHAN_DATA_INTR_EN_SHIFT 0\n#define CHAN_DATA_INTR_EN_MASK (0xFF << CHAN_DATA_INTR_EN_SHIFT)\n#define CHAN_DATA_INTR_EN(n) BITFIELD_VAL(CHAN_DATA_INTR_EN, n)\n\n// GPADC_REG_INT_RAW_STS\n#define KEY_ERR1_INTR (1 << 12)\n#define KEY_ERR0_INTR (1 << 11)\n#define KEY_PRESS_INTR (1 << 10)\n#define KEY_RELEASE_INTR (1 << 9)\n#define SAMPLE_PERIOD_DONE_INTR (1 << 8)\n#define CHAN_DATA_VALID_INTR_SHIFT 0\n#define CHAN_DATA_VALID_INTR_MASK (0xFF << CHAN_DATA_VALID_INTR_SHIFT)\n#define CHAN_DATA_VALID_INTR(n) BITFIELD_VAL(CHAN_DATA_VALID_INTR, n)\n\n// GPADC_REG_INT_MSKED_STS\n#define KEY_ERR1_INTR_MSKED (1 << 12)\n#define KEY_ERR0_INTR_MSKED (1 << 11)\n#define KEY_PRESS_INTR_MSKED (1 << 10)\n#define KEY_RELEASE_INTR_MSKED (1 << 9)\n#define SAMPLE_DONE_INTR_MSKED (1 << 8)\n#define CHAN_DATA_INTR_MSKED_SHIFT 0\n#define CHAN_DATA_INTR_MSKED_MASK (0xFF << CHAN_DATA_INTR_MSKED_SHIFT)\n#define CHAN_DATA_INTR_MSKED(n) BITFIELD_VAL(CHAN_DATA_INTR_MSKED, n)\n\n// GPADC_REG_INT_CLR\n#define KEY_ERR1_INTR_CLR (1 << 12)\n#define KEY_ERR0_INTR_CLR (1 << 11)\n#define KEY_PRESS_INTR_CLR (1 << 10)\n#define KEY_RELEASE_INTR_CLR (1 << 9)\n#define SAMPLE_DONE_INTR_CLR (1 << 8)\n#define CHAN_DATA_INTR_CLR_SHIFT 0\n#define CHAN_DATA_INTR_CLR_MASK (0xFF << CHAN_DATA_INTR_CLR_SHIFT)\n#define CHAN_DATA_INTR_CLR(n) BITFIELD_VAL(CHAN_DATA_INTR_CLR, n)\n\n// GPADC_REG_CH0_DATA\n#define DATA_CHAN0_SHIFT 0\n#define DATA_CHAN0_MASK (0x3FF << DATA_CHAN0_SHIFT)\n#define DATA_CHAN0(n) BITFIELD_VAL(DATA_CHAN0, n)\n\n#elif defined(CHIP_BEST1000)\n\nenum GPADC_REG_T {\n  GPADC_REG_VBAT_EN = 0x45,\n  GPADC_REG_INTVL_EN = 0x60,\n  GPADC_REG_INTVL_VAL = 0x64,\n  GPADC_REG_START = 0x65,\n  GPADC_REG_CH_EN = 0x65,\n  GPADC_REG_INT_MASK = 0x67,\n  GPADC_REG_INT_EN = 0x68,\n  GPADC_REG_INT_RAW_STS = 0x69,\n  GPADC_REG_INT_MSKED_STS = 0x6A,\n  GPADC_REG_INT_CLR = 0x6A,\n  GPADC_REG_CH0_DATA = 0x78,\n};\n\n// GPADC_REG_VBAT_EN\n#define REG_PU_VBAT_DIV (1 << 0)\n\n// GPADC_REG_INTVL_EN\n#define GPADC_INTERVAL_MODE (1 << 12)\n\n// GPADC_REG_START\n#define KEY_START (1 << 9)\n#define GPADC_START (1 << 8)\n\n// GPADC_REG_CH_EN\n#define CHAN_EN_REG_SHIFT 0\n#define CHAN_EN_REG_MASK (0xFF << CHAN_EN_REG_SHIFT)\n#define CHAN_EN_REG(n) BITFIELD_VAL(CHAN_EN_REG, n)\n\n// GPADC_REG_INT_MASK\n#define KEY_ERR1_INTR_MSK (1 << 12)\n#define KEY_ERR0_INTR_MSK (1 << 11)\n#define KEY_PRESS_INTR_MSK (1 << 10)\n#define KEY_RELEASE_INTR_MSK (1 << 9)\n#define SAMPLE_DONE_INTR_MSK (1 << 8)\n#define CHAN_DATA_INTR_MSK_SHIFT 0\n#define CHAN_DATA_INTR_MSK_MASK (0xFF << CHAN_DATA_INTR_MSK_SHIFT)\n#define CHAN_DATA_INTR_MSK(n) BITFIELD_VAL(CHAN_DATA_INTR_MSK, n)\n\n// GPADC_REG_INT_EN\n#define KEY_ERR1_INTR_EN (1 << 12)\n#define KEY_ERR0_INTR_EN (1 << 11)\n#define KEY_PRESS_INTR_EN (1 << 10)\n#define KEY_RELEASE_INTR_EN (1 << 9)\n#define SAMPLE_DONE_INTR_EN (1 << 8)\n#define CHAN_DATA_INTR_EN_SHIFT 0\n#define CHAN_DATA_INTR_EN_MASK (0xFF << CHAN_DATA_INTR_EN_SHIFT)\n#define CHAN_DATA_INTR_EN(n) BITFIELD_VAL(CHAN_DATA_INTR_EN, n)\n\n// GPADC_REG_INT_RAW_STS\n#define KEY_ERR1_INTR (1 << 12)\n#define KEY_ERR0_INTR (1 << 11)\n#define KEY_PRESS_INTR (1 << 10)\n#define KEY_RELEASE_INTR (1 << 9)\n#define SAMPLE_PERIOD_DONE_INTR (1 << 8)\n#define CHAN_DATA_VALID_INTR_SHIFT 0\n#define CHAN_DATA_VALID_INTR_MASK (0xFF << CHAN_DATA_VALID_INTR_SHIFT)\n#define CHAN_DATA_VALID_INTR(n) BITFIELD_VAL(CHAN_DATA_VALID_INTR, n)\n\n// GPADC_REG_INT_MSKED_STS\n#define KEY_ERR1_INTR_MSKED (1 << 12)\n#define KEY_ERR0_INTR_MSKED (1 << 11)\n#define KEY_PRESS_INTR_MSKED (1 << 10)\n#define KEY_RELEASE_INTR_MSKED (1 << 9)\n#define SAMPLE_DONE_INTR_MSKED (1 << 8)\n#define CHAN_DATA_INTR_MSKED_SHIFT 0\n#define CHAN_DATA_INTR_MSKED_MASK (0xFF << CHAN_DATA_INTR_MSKED_SHIFT)\n#define CHAN_DATA_INTR_MSKED(n) BITFIELD_VAL(CHAN_DATA_INTR_MSKED, n)\n\n// GPADC_REG_INT_CLR\n#define KEY_ERR1_INTR_CLR (1 << 12)\n#define KEY_ERR0_INTR_CLR (1 << 11)\n#define KEY_PRESS_INTR_CLR (1 << 10)\n#define KEY_RELEASE_INTR_CLR (1 << 9)\n#define SAMPLE_DONE_INTR_CLR (1 << 8)\n#define CHAN_DATA_INTR_CLR_SHIFT 0\n#define CHAN_DATA_INTR_CLR_MASK (0xFF << CHAN_DATA_INTR_CLR_SHIFT)\n#define CHAN_DATA_INTR_CLR(n) BITFIELD_VAL(CHAN_DATA_INTR_CLR, n)\n\n// GPADC_REG_CH0_DATA\n#define DATA_CHAN0_SHIFT 0\n#define DATA_CHAN0_MASK (0x3FF << DATA_CHAN0_SHIFT)\n#define DATA_CHAN0(n) BITFIELD_VAL(DATA_CHAN0, n)\n\n#else\n#error \"Please update GPADC register definitions\"\n#endif\n\nstatic int32_t g_adcSlope = 0;\nstatic int32_t g_adcIntcpt = 0;\nstatic bool gpadc_enabled = false;\nstatic bool adckey_enabled = false;\nstatic bool irq_enabled = false;\nstatic bool g_adcCalibrated = false;\nstatic HAL_GPADC_EVENT_CB_T gpadc_event_cb[HAL_GPADC_CHAN_QTY];\nstatic enum HAL_GPADC_ATP_T gpadc_atp[HAL_GPADC_CHAN_QTY];\n\nstatic enum HAL_GPADC_ATP_T hal_gpadc_get_min_atp(void) {\n  enum HAL_GPADC_CHAN_T ch;\n  enum HAL_GPADC_ATP_T atp = HAL_GPADC_ATP_NULL;\n\n  for (ch = HAL_GPADC_CHAN_0; ch < HAL_GPADC_CHAN_QTY; ch++) {\n    if (gpadc_atp[ch] != HAL_GPADC_ATP_NULL) {\n      if (atp == HAL_GPADC_ATP_NULL ||\n          (uint32_t)gpadc_atp[ch] < (uint32_t)atp) {\n        atp = gpadc_atp[ch];\n      }\n    }\n  }\n\n  return atp;\n}\n\nstatic void hal_gpadc_update_atp(void) {\n  enum HAL_GPADC_ATP_T atp;\n  uint16_t val;\n\n  atp = hal_gpadc_get_min_atp();\n\n  if (atp == HAL_GPADC_ATP_NULL || atp == HAL_GPADC_ATP_ONESHOT) {\n    gpadc_reg_read(GPADC_REG_INTVL_EN, &val);\n    val &= ~GPADC_INTERVAL_MODE;\n    gpadc_reg_write(GPADC_REG_INTVL_EN, val);\n  } else {\n    gpadc_reg_read(GPADC_REG_INTVL_EN, &val);\n    val |= GPADC_INTERVAL_MODE;\n    gpadc_reg_write(GPADC_REG_INTVL_EN, val);\n    val = atp * 1000 / 1024;\n    gpadc_reg_write(GPADC_REG_INTVL_VAL, val);\n  }\n}\n\nstatic int hal_gpadc_adc2volt_calib(void) {\n  int32_t y1, y2, x1, x2;\n  unsigned short efuse_a = 0;\n  unsigned short efuse_b = 0;\n\n  if (!g_adcCalibrated) {\n    y1 = HAL_GPADC_MVOLT_A * 1000;\n    y2 = HAL_GPADC_MVOLT_B * 1000;\n\n    pmu_get_efuse(PMU_EFUSE_PAGE_BATTER_LV, &efuse_a);\n\n    x1 = efuse_a > 0 ? efuse_a : HAL_GPADC_CALIB_DEFAULT_A;\n\n    pmu_get_efuse(PMU_EFUSE_PAGE_BATTER_HV, &efuse_b);\n    x2 = efuse_b > 0 ? efuse_b : HAL_GPADC_CALIB_DEFAULT_B;\n\n    g_adcSlope = (y2 - y1) / (x2 - x1);\n    g_adcIntcpt = ((y1 * x2) - (x1 * y2)) / ((x2 - x1) * 1000);\n    g_adcCalibrated = true;\n\n    TRACE(7, \"%s efuse:%d/%d LV=%d, HV=%d, Slope:%d Intcpt:%d\", __func__,\n          efuse_a, efuse_b, x1, x2, g_adcSlope, g_adcIntcpt);\n  }\n\n  return 0;\n}\n\nstatic HAL_GPADC_MV_T hal_gpadc_adc2volt(uint16_t gpadcVal) {\n  int32_t voltage;\n\n  hal_gpadc_adc2volt_calib();\n  if (gpadcVal == HAL_GPADC_BAD_VALUE) {\n    // Bad values from the GPADC are still Bad Values\n    // for the voltage-speaking user.\n    return HAL_GPADC_BAD_VALUE;\n  } else {\n    voltage = (((g_adcSlope * gpadcVal) / 1000) + (g_adcIntcpt));\n\n    return (voltage < 0) ? 0 : voltage;\n  }\n}\n\n#ifdef PMU_IRQ_UNIFIED\n#define GPADC_IRQ_HDLR_PARAM uint16_t irq_status\n#else\n#define GPADC_IRQ_HDLR_PARAM void\n#endif\nstatic void hal_gpadc_irq_handler(GPADC_IRQ_HDLR_PARAM) {\n  uint32_t lock;\n  enum HAL_GPADC_CHAN_T ch;\n  unsigned short read_val;\n  uint16_t adc_val;\n  HAL_GPADC_MV_T volt;\n\n#ifndef PMU_IRQ_UNIFIED\n  unsigned short irq_status;\n\n  gpadc_reg_read(GPADC_REG_INT_MSKED_STS, &irq_status);\n  irq_status &= (CHAN_DATA_INTR_MSKED_MASK | SAMPLE_DONE_INTR_MSKED |\n                 KEY_RELEASE_INTR_MSKED | KEY_PRESS_INTR_MSKED |\n                 KEY_ERR0_INTR_MSKED | KEY_ERR1_INTR_MSKED);\n  gpadc_reg_write(GPADC_REG_INT_CLR, irq_status);\n#endif\n\n  if (irq_status &\n      CHAN_DATA_INTR_MSKED((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |\n                           (1 << 4) | (1 << 5) | (1 << 6))) {\n    for (ch = HAL_GPADC_CHAN_0; ch < HAL_GPADC_CHAN_QTY; ch++) {\n      if (irq_status & CHAN_DATA_INTR_MSKED(1 << ch)) {\n        switch (ch) {\n        case HAL_GPADC_CHAN_BATTERY:\n        case HAL_GPADC_CHAN_0:\n        case HAL_GPADC_CHAN_2:\n        case HAL_GPADC_CHAN_3:\n        case HAL_GPADC_CHAN_4:\n        case HAL_GPADC_CHAN_5:\n        case HAL_GPADC_CHAN_6:\n          gpadc_reg_read(GPADC_REG_CH0_DATA + ch, &adc_val);\n          adc_val = GET_BITFIELD(adc_val, DATA_CHAN0);\n          volt = hal_gpadc_adc2volt(adc_val);\n          if (gpadc_event_cb[ch]) {\n            gpadc_event_cb[ch](adc_val, volt);\n          }\n          if (gpadc_atp[ch] == HAL_GPADC_ATP_NULL ||\n              gpadc_atp[ch] == HAL_GPADC_ATP_ONESHOT) {\n            lock = int_lock();\n\n#ifndef VBAT_DIV_ALWAYS_ON\n            if (ch == HAL_GPADC_CHAN_BATTERY) {\n              gpadc_reg_read(GPADC_REG_VBAT_EN, &read_val);\n              read_val &= ~REG_PU_VBAT_DIV;\n              gpadc_reg_write(GPADC_REG_VBAT_EN, read_val);\n            }\n#endif\n\n            // Int mask\n            gpadc_reg_read(GPADC_REG_INT_MASK, &read_val);\n            read_val &= ~CHAN_DATA_INTR_MSK(1 << ch);\n            gpadc_reg_write(GPADC_REG_INT_MASK, read_val);\n\n            // Int enable\n            gpadc_reg_read(GPADC_REG_INT_EN, &read_val);\n            read_val &= ~CHAN_DATA_INTR_EN(1 << ch);\n            gpadc_reg_write(GPADC_REG_INT_EN, read_val);\n\n            // Channel enable\n            gpadc_reg_read(GPADC_REG_CH_EN, &read_val);\n            read_val &= ~CHAN_EN_REG(1 << ch);\n            gpadc_reg_write(GPADC_REG_CH_EN, read_val);\n\n            int_unlock(lock);\n          }\n          break;\n        default:\n          break;\n        }\n      }\n    }\n  }\n\n  // Disable GPADC (GPADC_START will be cleared automatically unless in interval\n  // mode)\n  lock = int_lock();\n  gpadc_reg_read(GPADC_REG_CH_EN, &read_val);\n  if ((read_val & CHAN_EN_REG((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |\n                              (1 << 4) | (1 << 5) | (1 << 6))) == 0) {\n    gpadc_reg_read(GPADC_REG_START, &read_val);\n    read_val &= ~GPADC_START;\n    gpadc_reg_write(GPADC_REG_START, read_val);\n  }\n  int_unlock(lock);\n\n  if (irq_status &\n      (CHAN_DATA_INTR_MSKED(1 << 7) | KEY_RELEASE_INTR_MSKED |\n       KEY_PRESS_INTR_MSKED | KEY_ERR0_INTR_MSKED | KEY_ERR1_INTR_MSKED)) {\n    if (gpadc_event_cb[HAL_GPADC_CHAN_ADCKEY]) {\n      enum HAL_ADCKEY_IRQ_STATUS_T adckey_irq;\n\n      adckey_irq = 0;\n      if (irq_status & KEY_RELEASE_INTR_MSKED) {\n        adckey_irq |= HAL_ADCKEY_RELEASED;\n      }\n      if (irq_status & KEY_PRESS_INTR_MSKED) {\n        adckey_irq |= HAL_ADCKEY_PRESSED;\n      }\n      if (irq_status & KEY_ERR0_INTR_MSKED) {\n        adckey_irq |= HAL_ADCKEY_ERR0;\n      }\n      if (irq_status & KEY_ERR1_INTR_MSKED) {\n        adckey_irq |= HAL_ADCKEY_ERR1;\n      }\n\n      if (irq_status & CHAN_DATA_INTR_MSKED(1 << 7)) {\n        adckey_irq |= HAL_ADCKEY_ADC_VALID;\n\n        lock = int_lock();\n\n        // Int mask\n        gpadc_reg_read(GPADC_REG_INT_MASK, &read_val);\n        read_val &= ~CHAN_DATA_INTR_MSK(1 << 7);\n        gpadc_reg_write(GPADC_REG_INT_MASK, read_val);\n\n        // Int enable\n        gpadc_reg_read(GPADC_REG_INT_EN, &read_val);\n        read_val &= ~CHAN_DATA_INTR_EN(1 << 7);\n        gpadc_reg_write(GPADC_REG_INT_EN, read_val);\n\n        int_unlock(lock);\n\n        // No voltage conversion\n        gpadc_reg_read(GPADC_REG_CH0_DATA + HAL_GPADC_CHAN_ADCKEY, &adc_val);\n        adc_val = GET_BITFIELD(adc_val, DATA_CHAN0);\n      } else {\n        adc_val = HAL_GPADC_BAD_VALUE;\n      }\n\n      ((HAL_ADCKEY_EVENT_CB_T)gpadc_event_cb[HAL_GPADC_CHAN_ADCKEY])(adckey_irq,\n                                                                     adc_val);\n    }\n  }\n}\n\nbool hal_gpadc_get_volt(enum HAL_GPADC_CHAN_T ch, HAL_GPADC_MV_T *volt) {\n  bool res = false;\n  unsigned short read_val;\n\n  if (ch >= HAL_GPADC_CHAN_QTY) {\n    return res;\n  }\n\n  gpadc_reg_read(GPADC_REG_INT_RAW_STS, &read_val);\n\n  if (read_val & CHAN_DATA_VALID_INTR(1 << ch)) {\n    // Clear the channel valid status\n    gpadc_reg_write(GPADC_REG_INT_CLR, CHAN_DATA_INTR_CLR(1 << ch));\n\n    gpadc_reg_read(GPADC_REG_CH0_DATA + ch, &read_val);\n    read_val = GET_BITFIELD(read_val, DATA_CHAN0);\n    *volt = hal_gpadc_adc2volt(read_val);\n    res = true;\n  }\n\n  return res;\n}\n\nstatic void hal_gpadc_irq_control(void) {\n  if (gpadc_enabled || adckey_enabled) {\n    if (!irq_enabled) {\n      irq_enabled = true;\n#ifdef PMU_IRQ_UNIFIED\n      pmu_set_irq_unified_handler(PMU_IRQ_TYPE_GPADC, hal_gpadc_irq_handler);\n#else\n      NVIC_SetVector(GPADC_IRQn, (uint32_t)hal_gpadc_irq_handler);\n      NVIC_SetPriority(GPADC_IRQn, IRQ_PRIORITY_NORMAL);\n      NVIC_ClearPendingIRQ(GPADC_IRQn);\n      NVIC_EnableIRQ(GPADC_IRQn);\n#endif\n    }\n  } else {\n    if (irq_enabled) {\n      irq_enabled = false;\n#ifdef PMU_IRQ_UNIFIED\n      pmu_set_irq_unified_handler(PMU_IRQ_TYPE_GPADC, NULL);\n#else\n      NVIC_DisableIRQ(GPADC_IRQn);\n#endif\n    }\n  }\n}\n\nint hal_gpadc_open(enum HAL_GPADC_CHAN_T channel, enum HAL_GPADC_ATP_T atp,\n                   HAL_GPADC_EVENT_CB_T cb) {\n  uint32_t lock;\n  unsigned short val;\n  unsigned short reg_start_mask;\n\n  if (channel >= HAL_GPADC_CHAN_QTY) {\n    return -1;\n  }\n\n  // NOTE: ADCKEY callback is not set here, but in hal_adckey_set_irq_handler()\n  if (channel != HAL_GPADC_CHAN_ADCKEY) {\n    gpadc_event_cb[channel] = cb;\n    gpadc_atp[channel] = atp;\n  }\n\n  switch (channel) {\n  case HAL_GPADC_CHAN_BATTERY:\n    // Enable vbat measurement clock\n    // vbat div enable\n    lock = int_lock();\n    gpadc_reg_read(GPADC_REG_VBAT_EN, &val);\n    val |= REG_PU_VBAT_DIV;\n    gpadc_reg_write(GPADC_REG_VBAT_EN, val);\n    int_unlock(lock);\n#ifndef VBAT_DIV_ALWAYS_ON\n    // GPADC VBAT needs 10us to be stable and consumes 13mA current\n    hal_sys_timer_delay_us(20);\n#endif\n  case HAL_GPADC_CHAN_0:\n  case HAL_GPADC_CHAN_2:\n  case HAL_GPADC_CHAN_3:\n  case HAL_GPADC_CHAN_4:\n  case HAL_GPADC_CHAN_5:\n  case HAL_GPADC_CHAN_6:\n  case HAL_GPADC_CHAN_ADCKEY:\n    lock = int_lock();\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n    if (channel == HAL_GPADC_CHAN_3) {\n      pmu_led_set_hiz(HAL_GPIO_PIN_LED2);\n    }\n#endif\n\n    // Int mask\n    if (channel == HAL_GPADC_CHAN_ADCKEY || gpadc_event_cb[channel]) {\n      // 1) Always enable ADCKEY mask\n      // 2) Enable mask if handler is not null\n      gpadc_reg_read(GPADC_REG_INT_MASK, &val);\n      val |= CHAN_DATA_INTR_MSK(1 << channel);\n      gpadc_reg_write(GPADC_REG_INT_MASK, val);\n      gpadc_enabled = true;\n      hal_gpadc_irq_control();\n    }\n\n    // Int enable\n    gpadc_reg_read(GPADC_REG_INT_EN, &val);\n    val |= CHAN_DATA_INTR_EN(1 << channel);\n    gpadc_reg_write(GPADC_REG_INT_EN, val);\n\n    // Clear the channel valid status\n    gpadc_reg_write(GPADC_REG_INT_CLR, CHAN_DATA_INTR_CLR(1 << channel));\n\n    // Channel enable\n    if (channel == HAL_GPADC_CHAN_ADCKEY) {\n      reg_start_mask = KEY_START;\n    } else {\n      hal_gpadc_update_atp();\n      reg_start_mask = GPADC_START;\n      if (GPADC_REG_START == GPADC_REG_CH_EN) {\n        reg_start_mask |= CHAN_EN_REG(1 << channel);\n      } else {\n        gpadc_reg_read(GPADC_REG_CH_EN, &val);\n        val |= CHAN_EN_REG(1 << channel);\n        gpadc_reg_write(GPADC_REG_CH_EN, val);\n      }\n    }\n\n    // GPADC enable\n    gpadc_reg_read(GPADC_REG_START, &val);\n    val |= reg_start_mask;\n    gpadc_reg_write(GPADC_REG_START, val);\n\n    int_unlock(lock);\n    break;\n  default:\n    break;\n  }\n\n  return 0;\n}\n\nint hal_gpadc_close(enum HAL_GPADC_CHAN_T channel) {\n  uint32_t lock;\n  unsigned short val;\n  unsigned short chan_int_en;\n  unsigned short reg_start;\n\n  if (channel >= HAL_GPADC_CHAN_QTY) {\n    return -1;\n  }\n\n  if (channel != HAL_GPADC_CHAN_ADCKEY) {\n    gpadc_atp[channel] = HAL_GPADC_ATP_NULL;\n  }\n\n  switch (channel) {\n  case HAL_GPADC_CHAN_BATTERY:\n#ifndef VBAT_DIV_ALWAYS_ON\n    // disable vbat measurement clock\n    // vbat div disable\n    lock = int_lock();\n    gpadc_reg_read(GPADC_REG_VBAT_EN, &val);\n    val &= ~REG_PU_VBAT_DIV;\n    gpadc_reg_write(GPADC_REG_VBAT_EN, val);\n    int_unlock(lock);\n#endif\n  case HAL_GPADC_CHAN_0:\n  case HAL_GPADC_CHAN_2:\n  case HAL_GPADC_CHAN_3:\n  case HAL_GPADC_CHAN_4:\n  case HAL_GPADC_CHAN_5:\n  case HAL_GPADC_CHAN_6:\n  case HAL_GPADC_CHAN_ADCKEY:\n    lock = int_lock();\n\n    // Int mask\n    gpadc_reg_read(GPADC_REG_INT_MASK, &val);\n    val &= ~CHAN_DATA_INTR_MSK(1 << channel);\n    gpadc_reg_write(GPADC_REG_INT_MASK, val);\n\n    // Int enable\n    gpadc_reg_read(GPADC_REG_INT_EN, &chan_int_en);\n    chan_int_en &= ~CHAN_DATA_INTR_EN(1 << channel);\n    gpadc_reg_write(GPADC_REG_INT_EN, chan_int_en);\n\n    // Channel/GPADC enable\n    gpadc_reg_read(GPADC_REG_START, ®_start);\n    if (channel == HAL_GPADC_CHAN_ADCKEY) {\n      reg_start &= ~KEY_START;\n    } else {\n      if (GPADC_REG_START == GPADC_REG_CH_EN) {\n        reg_start &= ~CHAN_EN_REG(1 << channel);\n        val = reg_start;\n      } else {\n        gpadc_reg_read(GPADC_REG_CH_EN, &val);\n        val &= ~CHAN_EN_REG(1 << channel);\n        gpadc_reg_write(GPADC_REG_CH_EN, val);\n      }\n      if (val & CHAN_EN_REG((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |\n                            (1 << 4) | (1 << 5) | (1 << 6))) {\n        hal_gpadc_update_atp();\n      } else {\n        reg_start &= ~GPADC_START;\n      }\n    }\n    gpadc_reg_write(GPADC_REG_START, reg_start);\n\n    if ((chan_int_en &\n         CHAN_DATA_INTR_EN((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |\n                           (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7))) == 0) {\n      gpadc_enabled = false;\n      hal_gpadc_irq_control();\n    }\n\n    int_unlock(lock);\n    break;\n  default:\n    break;\n  }\n\n  return 0;\n}\n\nvoid hal_gpadc_sleep(void) {\n  unsigned short val;\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n  return;\n#endif\n\n  gpadc_reg_read(GPADC_REG_START, &val);\n  if (val & GPADC_START) {\n    val &= ~GPADC_START;\n    gpadc_reg_write(GPADC_REG_START, val);\n  }\n}\n\nvoid hal_gpadc_wakeup(void) {\n  unsigned short val;\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n  return;\n#endif\n\n  gpadc_reg_read(GPADC_REG_CH_EN, &val);\n  if (val & CHAN_EN_REG((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\n                        (1 << 5) | (1 << 6))) {\n    if (GPADC_REG_START != GPADC_REG_CH_EN) {\n      gpadc_reg_read(GPADC_REG_START, &val);\n    }\n    val |= GPADC_START;\n    gpadc_reg_write(GPADC_REG_START, val);\n  }\n}\n\nvoid hal_adckey_set_irq_handler(HAL_ADCKEY_EVENT_CB_T cb) {\n  gpadc_event_cb[HAL_GPADC_CHAN_ADCKEY] = (HAL_GPADC_EVENT_CB_T)cb;\n}\n\nint hal_adckey_set_irq(enum HAL_ADCKEY_IRQ_T type) {\n  uint32_t lock;\n  uint16_t val;\n  uint16_t set_mask;\n  uint16_t clr_mask;\n  uint16_t set_en;\n  uint16_t clr_en;\n\n  set_mask = 0;\n  clr_mask = 0;\n  set_en = 0;\n  clr_en = 0;\n  if (type == HAL_ADCKEY_IRQ_NONE) {\n    clr_mask = KEY_RELEASE_INTR_MSK | KEY_PRESS_INTR_MSK | KEY_ERR0_INTR_MSK |\n               KEY_ERR1_INTR_MSK;\n    clr_en = KEY_RELEASE_INTR_EN | KEY_PRESS_INTR_EN | KEY_ERR0_INTR_EN |\n             KEY_ERR1_INTR_EN;\n    adckey_enabled = false;\n  } else if (type == HAL_ADCKEY_IRQ_PRESSED) {\n    set_mask = KEY_PRESS_INTR_MSK | KEY_ERR0_INTR_MSK | KEY_ERR1_INTR_MSK;\n    clr_mask = KEY_RELEASE_INTR_MSK;\n    set_en = KEY_PRESS_INTR_EN | KEY_ERR0_INTR_EN | KEY_ERR1_INTR_EN;\n    clr_en = KEY_RELEASE_INTR_EN;\n    adckey_enabled = true;\n  } else if (type == HAL_ADCKEY_IRQ_RELEASED) {\n    set_mask = KEY_RELEASE_INTR_MSK | KEY_ERR0_INTR_MSK | KEY_ERR1_INTR_MSK;\n    clr_mask = KEY_PRESS_INTR_MSK;\n    set_en = KEY_RELEASE_INTR_EN | KEY_ERR0_INTR_EN | KEY_ERR1_INTR_EN;\n    clr_en = KEY_PRESS_INTR_EN;\n    adckey_enabled = true;\n  } else if (type == HAL_ADCKEY_IRQ_BOTH) {\n    set_mask = KEY_RELEASE_INTR_MSK | KEY_PRESS_INTR_MSK | KEY_ERR0_INTR_MSK |\n               KEY_ERR1_INTR_MSK;\n    set_en = KEY_RELEASE_INTR_EN | KEY_PRESS_INTR_EN | KEY_ERR0_INTR_EN |\n             KEY_ERR1_INTR_EN;\n    adckey_enabled = true;\n  } else {\n    return 1;\n  }\n\n  lock = int_lock();\n\n  gpadc_reg_read(GPADC_REG_INT_MASK, &val);\n  val &= ~clr_mask;\n  val |= set_mask;\n  gpadc_reg_write(GPADC_REG_INT_MASK, val);\n\n  gpadc_reg_read(GPADC_REG_INT_EN, &val);\n  val &= ~clr_en;\n  val |= set_en;\n  gpadc_reg_write(GPADC_REG_INT_EN, val);\n\n  hal_gpadc_irq_control();\n\n  int_unlock(lock);\n\n  return 0;\n}\n\n#endif // !GPADC_CHIP_SPECIFIC\n"
  },
  {
    "path": "platform/hal/hal_gpadc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_GPADC_H__\n#define __HAL_GPADC_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define HAL_GPADC_BAD_VALUE  0xFFFF\n\nenum HAL_GPADC_CHAN_T {\n    HAL_GPADC_CHAN_0 = 0,\n    HAL_GPADC_CHAN_BATTERY = 1,\n    HAL_GPADC_CHAN_2 = 2,\n    HAL_GPADC_CHAN_3 = 3,\n    HAL_GPADC_CHAN_4 = 4,\n    HAL_GPADC_CHAN_5 = 5,\n    HAL_GPADC_CHAN_6 = 6,\n    HAL_GPADC_CHAN_ADCKEY = 7,\n    HAL_GPADC_CHAN_QTY,\n};\n\nenum HAL_GPADC_ATP_T {\n    HAL_GPADC_ATP_NULL = 0,\n    HAL_GPADC_ATP_125US = 125,\n    HAL_GPADC_ATP_500US = 500,\n    HAL_GPADC_ATP_1MS = 1000,\n    HAL_GPADC_ATP_2MS = 2000,\n    HAL_GPADC_ATP_5MS = 5000,\n    HAL_GPADC_ATP_10MS = 10000,\n    HAL_GPADC_ATP_20MS = 20000,\n    HAL_GPADC_ATP_30MS = 30000,\n    HAL_GPADC_ATP_40MS = 40000,\n    HAL_GPADC_ATP_50MS = 50000,\n    HAL_GPADC_ATP_60MS = 60000,\n    HAL_GPADC_ATP_ONESHOT = -1,\n};\n\nenum HAL_ADCKEY_IRQ_T {\n    HAL_ADCKEY_IRQ_NONE         = 0,\n    HAL_ADCKEY_IRQ_PRESSED      = (1 << 0),\n    HAL_ADCKEY_IRQ_RELEASED     = (1 << 1),\n    HAL_ADCKEY_IRQ_BOTH         = (HAL_ADCKEY_IRQ_PRESSED | HAL_ADCKEY_IRQ_RELEASED),\n};\n\nenum HAL_ADCKEY_IRQ_STATUS_T {\n    HAL_ADCKEY_ADC_VALID    = (1 << 0),\n    HAL_ADCKEY_RELEASED     = (1 << 1),\n    HAL_ADCKEY_PRESSED      = (1 << 2),\n    HAL_ADCKEY_ERR0         = (1 << 3),\n    HAL_ADCKEY_ERR1         = (1 << 4),\n};\n\ntypedef uint16_t HAL_GPADC_MV_T;\n\ntypedef void (*HAL_GPADC_EVENT_CB_T)(uint16_t raw_val, HAL_GPADC_MV_T volt);\ntypedef void (*HAL_ADCKEY_EVENT_CB_T)(enum HAL_ADCKEY_IRQ_STATUS_T irq_status, uint16_t raw_val);\n\nint hal_gpadc_open(enum HAL_GPADC_CHAN_T channel, enum HAL_GPADC_ATP_T atp, HAL_GPADC_EVENT_CB_T cb);\n\nbool hal_gpadc_get_volt(enum HAL_GPADC_CHAN_T ch, HAL_GPADC_MV_T *volt);\n\nint hal_gpadc_close(enum HAL_GPADC_CHAN_T channel);\n\nvoid hal_gpadc_sleep(void);\n\nvoid hal_gpadc_wakeup(void);\n\nvoid hal_adckey_set_irq_handler(HAL_ADCKEY_EVENT_CB_T cb);\n\nint hal_adckey_set_irq(enum HAL_ADCKEY_IRQ_T type);\n\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif//__FMDEC_H__\n"
  },
  {
    "path": "platform/hal/hal_gpio.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_gpio.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"reg_gpio.h\"\n#include \"stdarg.h\"\n#include \"stdio.h\"\n#ifdef PMU_HAS_LED_PIN\n#include \"pmu.h\"\n#endif\n\n#define HAL_GPIO_BANK_NUM 1\n#define HAL_GPIO_PORT_NUM 1\n\n#define HAL_GPIO_PIN_NUM_EACH_PORT (32)\n#define HAL_GPIO_PIN_NUM_EACH_BANK                                             \\\n  (HAL_GPIO_PORT_NUM * HAL_GPIO_PIN_NUM_EACH_PORT)\n\n#define HAL_GPIO_PIN_TO_BANK(pin) ((pin) / HAL_GPIO_PIN_NUM_EACH_BANK)\n\n#define HAL_GPIO_PIN_TO_PORT(pin)                                              \\\n  (((pin) % HAL_GPIO_PIN_NUM_EACH_BANK) / HAL_GPIO_PIN_NUM_EACH_PORT)\n\n#ifdef GPIOAUX_BASE\n#define HAL_GPIO_AUX_BANK_NUM 1\n#define HAL_GPIO_AUX_PORT_NUM 1\n\n#define HAL_GPIO_AUX_PIN_NUM_EACH_PORT (8)\n#define HAL_GPIO_AUX_PIN_NUM_EACH_BANK                                         \\\n  (HAL_GPIO_AUX_PORT_NUM * HAL_GPIO_AUX_PIN_NUM_EACH_PORT)\n\n#define HAL_GPIO_AUX_PIN_TO_BANK(pin)                                          \\\n  (((pin)-HAL_GPIO_PIN_P4_0) / HAL_GPIO_AUX_PIN_NUM_EACH_BANK)\n\n#define HAL_GPIO_AUX_PIN_TO_PORT(pin)                                          \\\n  ((((pin)-HAL_GPIO_PIN_P4_0) % HAL_GPIO_AUX_PIN_NUM_EACH_BANK) /              \\\n   HAL_GPIO_AUX_PIN_NUM_EACH_PORT)\n#endif\n\ntypedef void (*_HAL_GPIO_IRQ_HANDLER)(void);\n\nstruct GPIO_PORT_T {\n  __IO uint32_t GPIO_DR;  // 0x00\n  __IO uint32_t GPIO_DDR; // 0x04\n  __IO uint32_t GPIO_CTL; // 0x08\n};\n\nstruct GPIO_BANK_T {\n  struct GPIO_PORT_T port[HAL_GPIO_PORT_NUM];\n  struct GPIO_PORT_T _port_reserved[3];\n  __IO uint32_t GPIO_INTEN;                      // 0x30\n  __IO uint32_t GPIO_INTMASK;                    // 0x34\n  __IO uint32_t GPIO_INTTYPE_LEVEL;              // 0x38\n  __IO uint32_t GPIO_INT_POLARITY;               // 0x3C\n  __I uint32_t GPIO_INTSTATUS;                   // 0x40\n  __I uint32_t GPIO_RAW_INTSTATUS;               // 0x44\n  __IO uint32_t GPIO_DEBOUNCE;                   // 0x48\n  __IO uint32_t GPIO_PORTA_EOI;                  // 0x4C\n  __I uint32_t GPIO_EXT_PORT[HAL_GPIO_PORT_NUM]; // 0x50\n  __I uint32_t GPIO_EXT_PORT_reserved[3];\n  __IO uint32_t GPIO_LS_SYNC; // 0x60\n};\n\nvoid _hal_gpio_bank0_irq_handler(void);\n\nstatic struct GPIO_BANK_T *const gpio_bank[HAL_GPIO_BANK_NUM] = {\n    (struct GPIO_BANK_T *)GPIO_BASE,\n};\n\nstatic HAL_GPIO_PIN_IRQ_HANDLER gpio_irq_handler[HAL_GPIO_PIN_NUM] = {0};\nstatic _HAL_GPIO_IRQ_HANDLER _gpio_irq_handler[HAL_GPIO_BANK_NUM] = {\n    _hal_gpio_bank0_irq_handler,\n};\n\n#ifdef GPIOAUX_BASE\nvoid _hal_gpio_aux_bank0_irq_handler(void);\nstatic struct GPIO_BANK_T *const gpio_aux_bank[HAL_GPIO_BANK_NUM] = {\n    (struct GPIO_BANK_T *)GPIOAUX_BASE,\n};\n#if defined(CHIP_BEST2000) && defined(PMU_HAS_LED_PIN)\nstatic struct GPIO_BANK_T *const aon_gpio_aux_bank[HAL_GPIO_BANK_NUM] = {\n    (struct GPIO_BANK_T *)AON_GPIOAUX_BASE,\n};\n#endif\nstatic _HAL_GPIO_IRQ_HANDLER _gpio_aux_irq_handler[HAL_GPIO_AUX_BANK_NUM] = {\n    _hal_gpio_aux_bank0_irq_handler,\n};\n#endif\n\nstatic const char *const err_bad_pin = \"Bad GPIO pin %u (should < %u)\";\n\nenum HAL_GPIO_DIR_T hal_gpio_pin_get_dir(enum HAL_GPIO_PIN_T pin) {\n  int pin_offset = 0;\n  int bank = 0, port = 0;\n  enum HAL_GPIO_DIR_T dir = 0;\n\n  enum HAL_GPIO_PIN_T max_pin = HAL_GPIO_PIN_NUM;\n#ifdef PMU_HAS_LED_PIN\n  max_pin = HAL_GPIO_PIN_LED_NUM;\n#endif\n  ASSERT(pin < max_pin, err_bad_pin, pin, max_pin);\n\n  if (0) {\n  }\n#ifdef PMU_HAS_LED_PIN\n  else if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n    return pmu_led_get_direction(pin);\n  }\n#endif\n#ifdef GPIOAUX_BASE\n  else if (pin >= HAL_GPIO_PIN_P4_0) {\n    bank = HAL_GPIO_AUX_PIN_TO_BANK(pin);\n    port = HAL_GPIO_AUX_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_AUX_PIN_NUM_EACH_PORT;\n\n    if (gpio_aux_bank[bank]->port[port].GPIO_DDR & (0x1 << pin_offset))\n      dir = HAL_GPIO_DIR_OUT;\n    else\n      dir = HAL_GPIO_DIR_IN;\n  }\n#endif\n  else {\n    bank = HAL_GPIO_PIN_TO_BANK(pin);\n    port = HAL_GPIO_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_PIN_NUM_EACH_PORT;\n\n    if (gpio_bank[bank]->port[port].GPIO_DDR & (0x1 << pin_offset))\n      dir = HAL_GPIO_DIR_OUT;\n    else\n      dir = HAL_GPIO_DIR_IN;\n  }\n\n  return dir;\n}\n\nvoid hal_gpio_pin_set_dir(enum HAL_GPIO_PIN_T pin, enum HAL_GPIO_DIR_T dir,\n                          uint8_t val_for_out) {\n  int pin_offset = 0;\n  int bank = 0, port = 0;\n\n  enum HAL_GPIO_PIN_T max_pin = HAL_GPIO_PIN_NUM;\n#ifdef PMU_HAS_LED_PIN\n  max_pin = HAL_GPIO_PIN_LED_NUM;\n#endif\n  ASSERT(pin < max_pin, err_bad_pin, pin, max_pin);\n\n  if (dir == HAL_GPIO_DIR_OUT) {\n    if (val_for_out) {\n      hal_gpio_pin_set(pin);\n    } else {\n      hal_gpio_pin_clr(pin);\n    }\n  }\n\n  if (0) {\n  }\n#ifdef PMU_HAS_LED_PIN\n  else if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n    pmu_led_set_direction(pin, dir);\n  }\n#endif\n#ifdef GPIOAUX_BASE\n  else if (pin >= HAL_GPIO_PIN_P4_0) {\n    bank = HAL_GPIO_AUX_PIN_TO_BANK(pin);\n    port = HAL_GPIO_AUX_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_AUX_PIN_NUM_EACH_PORT;\n\n    if (dir == HAL_GPIO_DIR_OUT)\n      gpio_aux_bank[bank]->port[port].GPIO_DDR |= 0x1 << pin_offset;\n    else\n      gpio_aux_bank[bank]->port[port].GPIO_DDR &= ~(0x1 << pin_offset);\n  }\n#endif\n  else {\n    bank = HAL_GPIO_PIN_TO_BANK(pin);\n    port = HAL_GPIO_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_PIN_NUM_EACH_PORT;\n\n    if (dir == HAL_GPIO_DIR_OUT)\n      gpio_bank[bank]->port[port].GPIO_DDR |= 0x1 << pin_offset;\n    else\n      gpio_bank[bank]->port[port].GPIO_DDR &= ~(0x1 << pin_offset);\n  }\n}\n\nvoid hal_gpio_pin_set(enum HAL_GPIO_PIN_T pin) {\n  int pin_offset = 0;\n  int bank = 0, port = 0;\n\n  enum HAL_GPIO_PIN_T max_pin = HAL_GPIO_PIN_NUM;\n#ifdef PMU_HAS_LED_PIN\n  max_pin = HAL_GPIO_PIN_LED_NUM;\n#endif\n  ASSERT(pin < max_pin, err_bad_pin, pin, max_pin);\n\n  if (0) {\n  }\n#ifdef PMU_HAS_LED_PIN\n  else if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n#ifdef CHIP_BEST2000\n    pin_offset = pin - HAL_GPIO_PIN_LED1 + 6;\n\n    aon_gpio_aux_bank[0]->port[0].GPIO_DR |= 0x1 << pin_offset;\n#else\n    pmu_led_set_value(pin, 1);\n#endif\n  }\n#endif\n#ifdef GPIOAUX_BASE\n  else if (pin >= HAL_GPIO_PIN_P4_0) {\n    bank = HAL_GPIO_AUX_PIN_TO_BANK(pin);\n    port = HAL_GPIO_AUX_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_AUX_PIN_NUM_EACH_PORT;\n\n    gpio_aux_bank[bank]->port[port].GPIO_DR |= 0x1 << pin_offset;\n  }\n#endif\n  else {\n    bank = HAL_GPIO_PIN_TO_BANK(pin);\n    port = HAL_GPIO_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_PIN_NUM_EACH_PORT;\n\n    gpio_bank[bank]->port[port].GPIO_DR |= 0x1 << pin_offset;\n  }\n}\n\nvoid hal_gpio_pin_clr(enum HAL_GPIO_PIN_T pin) {\n  int pin_offset = 0;\n  int bank = 0, port = 0;\n\n  enum HAL_GPIO_PIN_T max_pin = HAL_GPIO_PIN_NUM;\n#ifdef PMU_HAS_LED_PIN\n  max_pin = HAL_GPIO_PIN_LED_NUM;\n#endif\n  ASSERT(pin < max_pin, err_bad_pin, pin, max_pin);\n\n  if (0) {\n  }\n#ifdef PMU_HAS_LED_PIN\n  else if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n#ifdef CHIP_BEST2000\n    pin_offset = pin - HAL_GPIO_PIN_LED1 + 6;\n\n    aon_gpio_aux_bank[0]->port[0].GPIO_DR &= ~(0x1 << pin_offset);\n#else\n    pmu_led_set_value(pin, 0);\n#endif\n  }\n#endif\n#ifdef GPIOAUX_BASE\n  else if (pin >= HAL_GPIO_PIN_P4_0) {\n    bank = HAL_GPIO_AUX_PIN_TO_BANK(pin);\n    port = HAL_GPIO_AUX_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_AUX_PIN_NUM_EACH_PORT;\n\n    gpio_aux_bank[bank]->port[port].GPIO_DR &= ~(0x1 << pin_offset);\n  }\n#endif\n  else {\n    bank = HAL_GPIO_PIN_TO_BANK(pin);\n    port = HAL_GPIO_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_PIN_NUM_EACH_PORT;\n\n    gpio_bank[bank]->port[port].GPIO_DR &= ~(0x1 << pin_offset);\n  }\n}\n\nuint8_t hal_gpio_pin_get_val(enum HAL_GPIO_PIN_T pin) {\n  int pin_offset = 0;\n  int bank = 0, port = 0;\n\n  enum HAL_GPIO_PIN_T max_pin = HAL_GPIO_PIN_NUM;\n#ifdef PMU_HAS_LED_PIN\n  max_pin = HAL_GPIO_PIN_LED_NUM;\n#endif\n  ASSERT(pin < max_pin, err_bad_pin, pin, max_pin);\n\n  if (0) {\n  }\n#ifdef PMU_HAS_LED_PIN\n  else if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n#ifdef CHIP_BEST2000\n    pin_offset = pin - HAL_GPIO_PIN_LED1 + 6;\n\n    return (((aon_gpio_aux_bank[0]->GPIO_EXT_PORT[0]) & (0x1 << pin_offset)) >>\n            pin_offset);\n#else\n    return pmu_led_get_value(pin);\n#endif\n  }\n#endif\n#ifdef GPIOAUX_BASE\n  else if (pin >= HAL_GPIO_PIN_P4_0) {\n    bank = HAL_GPIO_AUX_PIN_TO_BANK(pin);\n    port = HAL_GPIO_AUX_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_AUX_PIN_NUM_EACH_PORT;\n\n    /* when as input : read back outside signal value */\n    /* when as output: read back DR register value ,same as read back DR\n     * register */\n\n    return (\n        ((gpio_aux_bank[bank]->GPIO_EXT_PORT[port]) & (0x1 << pin_offset)) >>\n        pin_offset);\n  }\n#endif\n  else {\n    bank = HAL_GPIO_PIN_TO_BANK(pin);\n    port = HAL_GPIO_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_PIN_NUM_EACH_PORT;\n\n    /* when as input : read back outside signal value */\n    /* when as output: read back DR register value ,same as read back DR\n     * register */\n\n    return (((gpio_bank[bank]->GPIO_EXT_PORT[port]) & (0x1 << pin_offset)) >>\n            pin_offset);\n  }\n}\n\nvoid _hal_gpio_bank0_irq_handler(void) {\n  uint32_t raw_status = 0, bank = 0, pin_offset = 0;\n\n  raw_status = gpio_bank[bank]->GPIO_RAW_INTSTATUS;\n\n  if (raw_status == 0) {\n    return;\n  }\n\n  /* clear irq */\n  gpio_bank[bank]->GPIO_PORTA_EOI = raw_status;\n\n  while (raw_status) {\n    if (raw_status & 0x1) {\n      if (gpio_irq_handler[pin_offset]) {\n        gpio_irq_handler[pin_offset](pin_offset +\n                                     bank * HAL_GPIO_PIN_NUM_EACH_BANK);\n      }\n    }\n    raw_status >>= 1;\n    ++pin_offset;\n  }\n}\n\n#ifdef GPIOAUX_BASE\nvoid _hal_gpio_aux_bank0_irq_handler(void) {\n  uint32_t raw_status = 0, bank = 0, pin_offset = 0;\n\n  raw_status = 0;\n  bank = 0;\n  pin_offset = 0;\n\n  raw_status = gpio_aux_bank[bank]->GPIO_RAW_INTSTATUS;\n\n  if (raw_status == 0)\n    return;\n\n  /* clear irq */\n  gpio_aux_bank[bank]->GPIO_PORTA_EOI = raw_status;\n\n  while (raw_status) {\n    if (raw_status & 0x1) {\n      if (gpio_irq_handler[pin_offset + HAL_GPIO_PIN_P4_0]) {\n        gpio_irq_handler[pin_offset + HAL_GPIO_PIN_P4_0](\n            pin_offset + HAL_GPIO_PIN_P4_0 + bank * HAL_GPIO_PIN_NUM_EACH_BANK);\n      }\n    }\n    raw_status >>= 1;\n    ++pin_offset;\n  }\n}\n#endif\n\nuint8_t hal_gpio_setup_irq(enum HAL_GPIO_PIN_T pin,\n                           const struct HAL_GPIO_IRQ_CFG_T *cfg) {\n  int pin_offset = 0;\n  int bank = 0, port = 0;\n\n  enum HAL_GPIO_PIN_T max_pin = HAL_GPIO_PIN_NUM;\n#if defined(PMU_HAS_LED_PIN) && defined(PMU_HAS_LED_IRQ)\n  max_pin = HAL_GPIO_PIN_LED_NUM;\n#endif\n  ASSERT(pin < max_pin, err_bad_pin, pin, max_pin);\n\n  if (0) {\n  }\n#if defined(PMU_HAS_LED_PIN) && defined(PMU_HAS_LED_IRQ)\n  else if (pin == HAL_GPIO_PIN_LED1 || pin == HAL_GPIO_PIN_LED2) {\n    return pmu_gpio_setup_irq(pin, cfg);\n  }\n#endif\n#ifdef GPIOAUX_BASE\n  else if (pin >= HAL_GPIO_PIN_P4_0) {\n    bank = HAL_GPIO_AUX_PIN_TO_BANK(pin);\n    port = HAL_GPIO_AUX_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_AUX_PIN_NUM_EACH_PORT;\n\n    /* only port A support irq */\n    if (port != 0)\n      return 0;\n\n    if (cfg->irq_enable) {\n      gpio_aux_bank[bank]->GPIO_INTMASK |= (0x1 << pin_offset);\n\n      if (cfg->irq_debounce)\n        gpio_aux_bank[bank]->GPIO_DEBOUNCE |= 0x1 << pin_offset;\n      else\n        gpio_aux_bank[bank]->GPIO_DEBOUNCE &= ~(0x1 << pin_offset);\n\n      if (cfg->irq_type == HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE)\n        gpio_aux_bank[bank]->GPIO_INTTYPE_LEVEL |= 0x1 << pin_offset;\n      else\n        gpio_aux_bank[bank]->GPIO_INTTYPE_LEVEL &= ~(0x1 << pin_offset);\n\n      if (cfg->irq_polarity == HAL_GPIO_IRQ_POLARITY_HIGH_RISING)\n        gpio_aux_bank[bank]->GPIO_INT_POLARITY |= 0x1 << pin_offset;\n      else\n        gpio_aux_bank[bank]->GPIO_INT_POLARITY &= ~(0x1 << pin_offset);\n\n      gpio_irq_handler[pin] = cfg->irq_handler;\n\n      NVIC_SetVector(GPIOAUX_IRQn, (uint32_t)_gpio_aux_irq_handler[bank]);\n      NVIC_SetPriority(GPIOAUX_IRQn, IRQ_PRIORITY_NORMAL);\n      NVIC_EnableIRQ(GPIOAUX_IRQn);\n\n      gpio_aux_bank[bank]->GPIO_INTMASK &= ~(0x1 << pin_offset);\n      gpio_aux_bank[bank]->GPIO_INTEN |= 0x1 << pin_offset;\n    } else {\n      gpio_aux_bank[bank]->GPIO_INTMASK |= (0x1 << pin_offset);\n      gpio_aux_bank[bank]->GPIO_INTEN &= ~(0x1 << pin_offset);\n      gpio_irq_handler[pin] = 0;\n    }\n  }\n#endif\n  else {\n    bank = HAL_GPIO_PIN_TO_BANK(pin);\n    port = HAL_GPIO_PIN_TO_PORT(pin);\n    pin_offset = pin % HAL_GPIO_PIN_NUM_EACH_PORT;\n\n    /* only port A support irq */\n    if (port != 0)\n      return 0;\n\n    if (cfg->irq_enable) {\n      gpio_bank[bank]->GPIO_INTMASK |= (0x1 << pin_offset);\n\n      if (cfg->irq_debounce)\n        gpio_bank[bank]->GPIO_DEBOUNCE |= 0x1 << pin_offset;\n      else\n        gpio_bank[bank]->GPIO_DEBOUNCE &= ~(0x1 << pin_offset);\n\n      if (cfg->irq_type == HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE)\n        gpio_bank[bank]->GPIO_INTTYPE_LEVEL |= 0x1 << pin_offset;\n      else\n        gpio_bank[bank]->GPIO_INTTYPE_LEVEL &= ~(0x1 << pin_offset);\n\n      if (cfg->irq_polarity == HAL_GPIO_IRQ_POLARITY_HIGH_RISING)\n        gpio_bank[bank]->GPIO_INT_POLARITY |= 0x1 << pin_offset;\n      else\n        gpio_bank[bank]->GPIO_INT_POLARITY &= ~(0x1 << pin_offset);\n\n      gpio_irq_handler[pin] = cfg->irq_handler;\n\n      NVIC_SetVector(GPIO_IRQn, (uint32_t)_gpio_irq_handler[bank]);\n      NVIC_SetPriority(GPIO_IRQn, IRQ_PRIORITY_NORMAL);\n      NVIC_EnableIRQ(GPIO_IRQn);\n\n      gpio_bank[bank]->GPIO_INTMASK &= ~(0x1 << pin_offset);\n      gpio_bank[bank]->GPIO_INTEN |= 0x1 << pin_offset;\n    } else {\n      gpio_bank[bank]->GPIO_INTMASK |= (0x1 << pin_offset);\n      gpio_bank[bank]->GPIO_INTEN &= ~(0x1 << pin_offset);\n      gpio_irq_handler[pin] = 0;\n    }\n  }\n  return 0;\n}\n"
  },
  {
    "path": "platform/hal/hal_gpio.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_GPIO_H__\n#define __HAL_GPIO_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_iomux.h\"\n\nenum HAL_GPIO_DIR_T {\n    HAL_GPIO_DIR_IN = 0,\n    HAL_GPIO_DIR_OUT = 1,\n};\n\nenum HAL_GPIO_IRQ_TYPE_T {\n    HAL_GPIO_IRQ_TYPE_LEVEL_SENSITIVE = 0,\n    HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE,\n};\n\nenum HAL_GPIO_IRQ_POLARITY_T {\n    HAL_GPIO_IRQ_POLARITY_LOW_FALLING = 0,\n    HAL_GPIO_IRQ_POLARITY_HIGH_RISING,\n};\n\ntypedef void (* HAL_GPIO_PIN_IRQ_HANDLER)(enum HAL_GPIO_PIN_T pin);\n\nstruct HAL_GPIO_IRQ_CFG_T {\n    uint8_t irq_enable:1;\n    uint8_t irq_debounce:1;\n    enum HAL_GPIO_IRQ_TYPE_T irq_type;\n    enum HAL_GPIO_IRQ_POLARITY_T irq_polarity;\n    HAL_GPIO_PIN_IRQ_HANDLER irq_handler;\n};\n\nenum HAL_GPIO_DIR_T hal_gpio_pin_get_dir(enum HAL_GPIO_PIN_T pin);\nvoid hal_gpio_pin_set_dir(enum HAL_GPIO_PIN_T pin, enum HAL_GPIO_DIR_T dir, uint8_t val_for_out);\nvoid hal_gpio_pin_set(enum HAL_GPIO_PIN_T pin);\nvoid hal_gpio_pin_clr(enum HAL_GPIO_PIN_T pin);\nuint8_t hal_gpio_pin_get_val(enum HAL_GPIO_PIN_T pin);\nuint8_t hal_gpio_setup_irq(enum HAL_GPIO_PIN_T pin, const struct HAL_GPIO_IRQ_CFG_T *cfg);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_hwfft.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_HWFFT__\n#define __HAL_HWFFT__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n//#include \"cmsis_os.h\"\n\n#define HWFFT_USE_BUSY_WAIT 1\n#define HAVE_EQUIVALENT_MODE 1 /* 128in 128out not 128in 130out mode  */\n\nstruct hwfft_t {\n    int mode;\n    int order;\n    int sym_fft;\n    //osSemaphoreId _osSemaphoreId;\n   // osSemaphoreDef_t _osSemaphoreDef;\n//#ifdef CMSIS_OS_RTX\n//    uint32_t _semaphore_data[2];\n//#endif\n};\n\nenum hwfft_mode_t {\n    HWFFT_MODE_FFT = 0x1,\n    HWFFT_MODE_IFFT = 0x2,\n    HWFFT_MODE_EQVL_FFT = 0x4,\n    HWFFT_MODE_EQVL_IFFT = 0x8,\n};\n\nenum hwfft_order_t {\n    HWFFT_ORDER_64SAMP  = 64,\n    HWFFT_ORDER_128SAMP = 128,\n    HWFFT_ORDER_256SAMP = 256,\n    HWFFT_ORDER_512SAMP = 512,\n};\n\nbool hwfft_is_enable(void);\nint hwfft_destroy(struct hwfft_t *fft_inst);\n/*\nhwfft_t ṹ\nmode: hwfft_mode_tHWFFT_MODE_FFT:   nnʱsym_fftΪ0\n                                                                  ʵnʵn/2+1 ʱsym_fftΪ1\n                                      HWFFT_MODE_IFFT:   nnʱsym_fftΪ0\n                                                                   ʵ n/2+1nʵʱsym_fftΪ1\n                                      HWFFT_MODE_EQVL_FFT: spx_fftfftģʽ\n                                      HWFFT_MODE_EQVL_IFFT: spx_ifftifftģʽ\n                                                                 \norder: hwfft_order_t֧ͣ 512/256/128/64  fft/ifft\n\nsym_fft:  1: fftĶԳ;fftnʵn/2+1 \n                ifft  n/2+1nʵn Ϊfft/ifft\n              0: nn\n*/\nint hwfft_create(struct hwfft_t *fft_inst, int mode, int order, int sym_fft);\n/*\nfft/ifft\nfft_inst: hwfft_createɵĶӦṹ\nin: buf\nout: buf\n*/\nint hwfft_fft_process(struct hwfft_t *fft_inst, short *in, short *out);\n/*\n fft/ifft\nfft_inst: hwfft_createɵĶӦṹ\nin: buffftbuf\nout: buf\nnum: \nmode: 0 һֱȵfftɺŷ\n         1 dmaɣfftʼɷأcpuӲfft ʱ\n*/\nint hwfft_multifft_process(struct hwfft_t *fft_inst, short *in, short *out, unsigned short num,unsigned char mode);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_i2c.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_i2c.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_cmu.h\"\n#include \"hal_dma.h\"\n#include \"hal_i2cip.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"string.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n\n#ifdef I2C_DEBUG\n#define HAL_I2C_TRACE(attr, str, ...) TRACE(attr, str, ##__VA_ARGS__)\n#define HAL_I2C_ERROR(attr, str, ...) TRACE(attr, str, ##__VA_ARGS__)\n#else\n#define HAL_I2C_TRACE(attr, str, ...) TRACE_DUMMY(attr, str, ##__VA_ARGS__)\n#define HAL_I2C_ERROR(attr, str, ...) TRACE(attr, str, ##__VA_ARGS__)\n#endif\n\n#ifdef I2C_SENSOR_ENGINE\n#ifndef I2C_USE_DMA\n#define I2C_USE_DMA\n#endif\n#endif\n\n#define HAL_I2C_TX_TL I2CIP_TX_TL_QUARTER\n#define HAL_I2C_RX_TL I2CIP_RX_TL_THREE_QUARTER\n\n#define HAL_I2C_DMA_TX_TL I2CIP_TX_TL_HALF\n#define HAL_I2C_DMA_RX_TL I2CIP_DMA_TX_TL_1_BYTE\n\n#define HAL_I2C_DMA_TX 1\n#define HAL_I2C_DMA_RX 0\n\n#define HAL_I2C_RESTART 1\n#define HAL_I2C_NO_RESTART 0\n\n#define HAL_I2C_YES 1\n#define HAL_I2C_NO 0\n\n/* state machine */\n#ifdef I2C_SM_TASK_NUM\n#define HAL_I2C_SM_TASK_NUM_MAX I2C_SM_TASK_NUM\n#else\n#define HAL_I2C_SM_TASK_NUM_MAX 2\n#endif\n\n#ifdef I2C_SM_DMA_BUF_SIZE\n#define HAL_I2C_SM_DMA_BUF_LEN_MAX I2C_SM_DMA_BUF_SIZE\n#else\n#define HAL_I2C_SM_DMA_BUF_LEN_MAX 1024\n#endif\n\n/* i2c synchronization timeout ms */\n#define HAL_I2C_SYNC_TM_MS (2000)\n#define HAL_I2C_DLY_MS (1)\n#define HAL_I2C_WAIT_ACT_MS (1000)\n#define HAL_I2C_WAIT_TFE_MS (1000)\n#define HAL_I2C_WAIT_TFNF_MS (1000)\n#define HAL_I2C_WAIT_RFNE_MS (1000)\n\nenum HAL_I2C_SM_STATE_T {\n  HAL_I2C_SM_CLOSED = 0,\n  HAL_I2C_SM_IDLE,\n  HAL_I2C_SM_RUNNING,\n};\n\nenum HAL_I2C_SM_TASK_ACTION_T {\n  HAL_I2C_SM_TASK_ACTION_NONE = 0,\n  HAL_I2C_SM_TASK_ACTION_M_SEND,\n  HAL_I2C_SM_TASK_ACTION_M_RECV,\n};\n\nenum HAL_I2C_SM_TASK_STATE_T {\n  HAL_I2C_SM_TASK_STATE_START = (1 << 0),\n  HAL_I2C_SM_TASK_STATE_STOP = (1 << 1),\n  HAL_I2C_SM_TASK_STATE_TX_ABRT = (1 << 2),\n  HAL_I2C_SM_TASK_STATE_ACT = (1 << 3),\n  HAL_I2C_SM_TASK_STATE_FIFO_ERR = (1 << 4),\n};\n\nstruct HAL_I2C_SM_TASK_T {\n  /* send or recv buffer */\n  const uint8_t *tx_buf;\n  uint8_t *rx_buf;\n  uint16_t tx_txn_len;\n  uint16_t rx_txn_len;\n  uint16_t txn_cnt;\n  uint16_t tx_pos;\n  uint16_t rx_pos;\n  uint16_t rx_cmd_sent;\n\n  /* device control */\n  uint8_t stop;\n  uint8_t restart_after_write;\n  uint16_t target_addr;\n\n  /* task control */\n  uint32_t state;\n  uint32_t action;\n\n  /* system control */\n  /* TODO : os and non os version */\n  volatile uint32_t lock;\n  uint32_t transfer_id;\n  uint32_t errcode;\n  HAL_I2C_TRANSFER_HANDLER_T handler;\n};\n\nstruct HAL_I2C_SM_T {\n  /* device related */\n  struct HAL_I2C_CONFIG_T cfg;\n\n  enum HAL_I2C_SM_STATE_T state;\n\n  /* state machine related */\n#if defined(I2C_TASK_MODE) || defined(I2C_SENSOR_ENGINE)\n  uint8_t in_task;\n  uint8_t out_task;\n  uint8_t task_count;\n  struct HAL_I2C_SM_TASK_T task[HAL_I2C_SM_TASK_NUM_MAX];\n\n  /* dma related */\n#ifdef I2C_USE_DMA\n  struct HAL_DMA_CH_CFG_T tx_dma_cfg;\n  struct HAL_DMA_CH_CFG_T rx_dma_cfg;\n  /* i2cip cmd_data use 16bit and read action is driven by write action */\n  /* when use dma to read from i2c, we need to use another dma to write\n   * cmd/stop/restart */\n  /* cmd/stop/restart + data use 16bit width, so dma buffer are 2 times of orgin\n   * data buffer */\n  uint16_t dma_tx_buf[HAL_I2C_SM_DMA_BUF_LEN_MAX / 2];\n#endif\n#endif\n};\n/* state machine end */\n\nstruct HAL_I2C_MOD_NAME_T {};\n\nstruct HAL_I2C_HW_DESC_T {\n  uint32_t base;\n  enum HAL_CMU_MOD_ID_T mod;\n  enum HAL_CMU_MOD_ID_T apb;\n  IRQn_Type irq;\n#ifdef I2C_USE_DMA\n  enum HAL_DMA_PERIPH_T rx_periph;\n  enum HAL_DMA_PERIPH_T tx_periph;\n#endif\n};\n\nstatic const struct HAL_I2C_HW_DESC_T i2c_desc[HAL_I2C_ID_NUM] = {\n    {\n        .base = I2C0_BASE,\n        .mod = HAL_CMU_MOD_O_I2C0,\n        .apb = HAL_CMU_MOD_P_I2C0,\n        .irq = I2C0_IRQn,\n#ifdef I2C_USE_DMA\n        .rx_periph = HAL_GPDMA_I2C0_RX,\n        .tx_periph = HAL_GPDMA_I2C0_TX,\n#endif\n    },\n#if (CHIP_HAS_I2C > 1)\n    {\n        .base = I2C1_BASE,\n        .mod = HAL_CMU_MOD_O_I2C1,\n        .apb = HAL_CMU_MOD_P_I2C1,\n        .irq = I2C1_IRQn,\n#ifdef I2C_USE_DMA\n        .rx_periph = HAL_GPDMA_I2C1_RX,\n        .tx_periph = HAL_GPDMA_I2C1_TX,\n#endif\n    },\n#endif\n};\n\nstatic const char *const invalid_id = \"Invalid I2C ID: %d\";\n\nstatic struct HAL_I2C_SM_T hal_i2c_sm[HAL_I2C_ID_NUM];\n\n/* simple mode */\n#ifdef I2C_SIMPLE_MODE\nstatic void hal_i2c_simple_proc(enum HAL_I2C_ID_T id);\n\nstatic HAL_I2C_INT_HANDLER_T hal_i2c_int_handlers[HAL_I2C_ID_NUM] = {NULL};\n#endif\n/* simple mode end */\n\n#ifdef I2C_SENSOR_ENGINE\nstatic enum HAL_SENSOR_ENGINE_ID_T i2c_sensor_id[HAL_I2C_ID_NUM];\nstatic HAL_I2C_SENSOR_ENG_HANDLER_T i2c_sensor_handler[HAL_I2C_ID_NUM];\n\n#ifdef I2C_SENSOR_ENGINE\nstatic void hal_i2c_sensor_eng_proc(enum HAL_I2C_ID_T id);\n#endif\n#endif\n\nstatic uint32_t _i2c_get_base(enum HAL_I2C_ID_T id) {\n  return i2c_desc[id].base;\n}\n\nstatic void POSSIBLY_UNUSED hal_i2c_delay_ms(int ms) { osDelay(ms); }\n\nstatic uint32_t _i2c_adjust_period_cnt(uint32_t period_cnt, uint16_t trising_ns,\n                                       uint16_t tfalling_ns,\n                                       uint16_t pclk_mhz) {\n  uint32_t old_period_cnt;\n  uint16_t rising_falling_cycle;\n\n  old_period_cnt = period_cnt;\n\n  // Round down the rising and falling cycle, so that the period count is\n  // rounded up, and the SCL freq is always <= the requested freq.\n  rising_falling_cycle = ((trising_ns + tfalling_ns) * pclk_mhz) / 1000;\n\n  if (period_cnt > rising_falling_cycle) {\n    period_cnt -= rising_falling_cycle;\n  } else {\n    period_cnt = 0;\n  }\n\n  HAL_I2C_TRACE(5, \"%s: period_cnt=%u->%u trising_ns=%u tfalling_ns=%u\",\n                __FUNCTION__, old_period_cnt, period_cnt, trising_ns,\n                tfalling_ns);\n\n  return period_cnt;\n}\n\nstatic void _i2c_get_clk_cnt(uint32_t period_cnt, uint16_t tlow_ns,\n                             uint16_t thigh_ns, uint16_t spklen,\n                             uint16_t pclk_mhz, uint16_t *plcnt,\n                             uint16_t *phcnt) {\n#define IC_SCL_LOW_CYCLE_ADD (1)\n// NOTE: H/w spec says that (6 + spklen) cycles is added for SCL high interval,\n// but tests show that 1 more cycle is needed\n#define IC_SCL_HIGH_CYCLE_ADD (6 + spklen + 1)\n\n#define MIN_IC_SCL_LCNT (7 + spklen + IC_SCL_LOW_CYCLE_ADD)\n#define MIN_IC_SCL_HCNT (5 + spklen + IC_SCL_HIGH_CYCLE_ADD)\n\n  uint32_t lcnt, hcnt;\n  uint16_t min_lcnt, min_hcnt;\n\n  HAL_I2C_TRACE(\n      6, \"%s: period_cnt=%u tlow_ns=%u thigh_ns=%u spklen=%u pclk_mhz=%u\",\n      __FUNCTION__, period_cnt, tlow_ns, thigh_ns, spklen, pclk_mhz);\n\n  min_lcnt = (tlow_ns * pclk_mhz + 1000 - 1) / 1000;\n  if (min_lcnt < MIN_IC_SCL_LCNT) {\n    min_lcnt = MIN_IC_SCL_LCNT;\n  }\n  min_hcnt = (thigh_ns * pclk_mhz + 1000 - 1) / 1000;\n  if (min_hcnt < MIN_IC_SCL_HCNT) {\n    min_hcnt = MIN_IC_SCL_HCNT;\n  }\n\n  if (min_lcnt + min_hcnt > period_cnt) {\n    HAL_I2C_ERROR(5,\n                  \"%s:WARNING: period_cnt=%u too small: min_lcnt=%u \"\n                  \"min_hcnt=%u pclk_mhz=%u\",\n                  __FUNCTION__, period_cnt, min_lcnt, min_hcnt, pclk_mhz);\n\n    lcnt = min_lcnt;\n    hcnt = min_hcnt;\n  } else {\n    lcnt = (period_cnt + 1) / 2;\n    if (min_lcnt >= min_hcnt) {\n      if (lcnt < min_lcnt) {\n        lcnt = min_lcnt;\n      }\n      hcnt = period_cnt - lcnt;\n      if (hcnt < min_hcnt) {\n        hcnt = min_hcnt;\n      }\n    } else {\n      hcnt = lcnt;\n      if (hcnt < min_hcnt) {\n        hcnt = min_hcnt;\n      }\n      lcnt = period_cnt - hcnt;\n      if (lcnt < min_lcnt) {\n        lcnt = min_lcnt;\n      }\n    }\n  }\n\n  lcnt -= IC_SCL_LOW_CYCLE_ADD;\n  hcnt -= IC_SCL_HIGH_CYCLE_ADD;\n\n  ASSERT(lcnt <= UINT16_MAX && hcnt <= UINT16_MAX,\n         \"%s: lcnt=%u or hcnt=%u overflow\", __FUNCTION__, lcnt, hcnt);\n\n  *plcnt = lcnt;\n  *phcnt = hcnt;\n}\n\nstatic void _i2c_set_speed(enum HAL_I2C_ID_T id, int speed_mode, int speed) {\n#define MAX_HS_SPK_NS 10\n#define MAX_FSP_SPK_NS 50\n#define MAX_FS_SPK_NS 50\n\n#define SS_THOLD_NS 1800     // [300, 3450]\n#define FS_THOLD_NS 600      // [300,  900]\n#define FSP_THOLD_NS 300     // [  0,    -]\n#define HS_100PF_THOLD_NS 30 // [  0,   70]\n#define HS_400PF_THOLD_NS 70 // [  0,  150]\n\n#define SS_TRISING_NS 300      // [  0, 1000]\n#define FS_TRISING_NS 50       // [ 20,  300]\n#define FSP_TRISING_NS 30      // [  0,  120]\n#define HS_100PF_TRISING_NS 30 // [ 10,   40] for SCL, [ 20,   80] for SDA\n#define HS_400PF_TRISING_NS 30 // [ 10,   80] for SCL, [ 20,  160] for SDA\n\n#define SS_TFALLING_NS 30       // [  0,  300]\n#define FS_TFALLING_NS 30       // [ 20,  300]\n#define FSP_TFALLING_NS 30      // [ 20,  120]\n#define HS_100PF_TFALLING_NS 30 // [ 10,   40] for SCL, [ 20,   80] for SDA\n#define HS_400PF_TFALLING_NS 30 // [ 10,   80] for SCL, [ 20,  160] for SDA\n\n#define MIN_SS_TLOW_NS 4700\n#define MIN_SS_THIGH_NS 4000\n#define MIN_FS_TLOW_NS 1300\n#define MIN_FS_THIGH_NS 600\n#define MIN_FSP_TLOW_NS 500\n#define MIN_FSP_THIGH_NS 260\n#define MIN_HS_100PF_TLOW_NS 160\n#define MIN_HS_100PF_THIGH_NS 60\n#define MIN_HS_400PF_TLOW_NS 320\n#define MIN_HS_400PF_THIGH_NS 120\n\n// Round down the spike suppression limit value\n#define GET_SPKLEN_VAL(s) ((s)*pclk_mhz / 1000)\n\n  uint32_t reg_base = _i2c_get_base(id);\n  uint32_t min_mclk, pclk, period_cnt;\n  uint16_t lcnt, hcnt, hold_cycle, spklen;\n  uint16_t tlow_ns, thigh_ns, thold_ns, trising_ns, tfalling_ns;\n  uint8_t spk_ns;\n  uint16_t pclk_mhz;\n\n  if (speed_mode == IC_SPEED_MODE_MAX) {\n    min_mclk = speed * 50;\n  } else {\n    min_mclk = speed * 40;\n  }\n  pclk = 0;\n#ifdef PERIPH_PLL_FREQ\n  if (PERIPH_PLL_FREQ / 2 > 2 * hal_cmu_get_crystal_freq()) {\n    // Init to OSC_X2\n    pclk = 2 * hal_cmu_get_crystal_freq();\n    if (min_mclk > pclk) {\n      pclk = PERIPH_PLL_FREQ / 2;\n      hal_cmu_i2c_set_div(2);\n    } else {\n      pclk = 0;\n    }\n  }\n#endif\n  if (pclk == 0) {\n    enum HAL_CMU_PERIPH_FREQ_T periph_freq;\n\n    // Init to OSC\n    pclk = hal_cmu_get_crystal_freq();\n    if (min_mclk > pclk) {\n      pclk *= 2;\n      periph_freq = HAL_CMU_PERIPH_FREQ_52M;\n    } else {\n      periph_freq = HAL_CMU_PERIPH_FREQ_26M;\n    }\n\n    // NOTE: All I2C controllers share the same module clock configuration\n    hal_cmu_i2c_set_freq(periph_freq);\n  }\n\n  pclk_mhz = pclk / 1000000;\n  period_cnt = (pclk + speed - 1) / speed;\n\n  switch (speed_mode) {\n  case IC_SPEED_MODE_MAX:\n\n    spk_ns = MAX_HS_SPK_NS;\n    tlow_ns = MIN_HS_100PF_TLOW_NS;\n    thigh_ns = MIN_HS_100PF_THIGH_NS;\n    thold_ns = HS_100PF_THOLD_NS;\n    trising_ns = HS_100PF_TRISING_NS;\n    tfalling_ns = HS_100PF_TFALLING_NS;\n\n    spklen = GET_SPKLEN_VAL(spk_ns);\n    if (spklen == 0) {\n      spklen = 1;\n    }\n    i2cip_w_hs_spklen(reg_base, spklen);\n\n    period_cnt =\n        _i2c_adjust_period_cnt(period_cnt, trising_ns, tfalling_ns, pclk_mhz);\n    _i2c_get_clk_cnt(period_cnt, tlow_ns, thigh_ns, spklen, pclk_mhz, &lcnt,\n                     &hcnt);\n\n    i2cip_w_high_speed_hcnt(reg_base, hcnt);\n    i2cip_w_high_speed_lcnt(reg_base, lcnt);\n\n    i2cip_w_speed(reg_base, I2CIP_HIGH_SPEED_MASK);\n\n    // Continue to config fast mode\n#ifdef I2S_FSP_MODE\n    period_cnt = (pclk + I2C_FSP_SPEED - 1) / I2C_FSP_SPEED;\n#else\n    period_cnt = (pclk + I2C_FAST_SPEED - 1) / I2C_FAST_SPEED;\n#endif\n\n  case IC_SPEED_MODE_FAST:\n\n#ifdef I2S_FSP_MODE\n    if (speed > I2C_FAST_SPEED) {\n      spk_ns = MAX_FSP_SPK_NS;\n      tlow_ns = MIN_FSP_TLOW_NS;\n      thigh_ns = MIN_FSP_THIGH_NS;\n      thold_ns = FSP_THOLD_NS;\n      trising_ns = FSP_TRISING_NS;\n      tfalling_ns = FSP_TFALLING_NS;\n    } else\n#endif\n    {\n      spk_ns = MAX_FS_SPK_NS;\n      tlow_ns = MIN_FS_TLOW_NS;\n      thigh_ns = MIN_FS_THIGH_NS;\n      trising_ns = FS_TRISING_NS;\n      tfalling_ns = FS_TFALLING_NS;\n    }\n\n    spklen = GET_SPKLEN_VAL(spk_ns);\n    if (spklen == 0) {\n      spklen = 1;\n    }\n    i2cip_w_fs_spklen(reg_base, spklen);\n\n    period_cnt =\n        _i2c_adjust_period_cnt(period_cnt, trising_ns, tfalling_ns, pclk_mhz);\n    _i2c_get_clk_cnt(period_cnt, tlow_ns, thigh_ns, spklen, pclk_mhz, &lcnt,\n                     &hcnt);\n\n    i2cip_w_fast_speed_hcnt(reg_base, hcnt);\n    i2cip_w_fast_speed_lcnt(reg_base, lcnt);\n\n    // Update sda hold time and speed mode if in fast mode\n    // Skip if in high speed mode\n    if (speed_mode == IC_SPEED_MODE_FAST) {\n      thold_ns = FS_THOLD_NS;\n      i2cip_w_speed(reg_base, I2CIP_FAST_SPEED_MASK);\n    }\n\n    break;\n\n  case IC_SPEED_MODE_STANDARD:\n  default:\n\n    spk_ns = MAX_FS_SPK_NS;\n    tlow_ns = MIN_SS_TLOW_NS;\n    thigh_ns = MIN_SS_THIGH_NS;\n    thold_ns = SS_THOLD_NS;\n    trising_ns = SS_TRISING_NS;\n    tfalling_ns = SS_TFALLING_NS;\n\n    spklen = GET_SPKLEN_VAL(spk_ns);\n    if (spklen == 0) {\n      spklen = 1;\n    }\n    i2cip_w_fs_spklen(reg_base, spklen);\n\n    period_cnt =\n        _i2c_adjust_period_cnt(period_cnt, trising_ns, tfalling_ns, pclk_mhz);\n    _i2c_get_clk_cnt(period_cnt, tlow_ns, thigh_ns, spklen, pclk_mhz, &lcnt,\n                     &hcnt);\n\n    i2cip_w_standard_speed_hcnt(reg_base, hcnt);\n    i2cip_w_standard_speed_lcnt(reg_base, lcnt);\n    i2cip_w_speed(reg_base, I2CIP_STANDARD_SPEED_MASK);\n    break;\n  }\n\n  // Master mode: min = 1; slave mode: min = (spklen + 7)\n  hold_cycle = (thold_ns * pclk_mhz + 1000 - 1) / 1000;\n  i2cip_w_sda_hold_time(reg_base, hold_cycle);\n\n  HAL_I2C_TRACE(1, \"crystal freq=%d\", pclk);\n  HAL_I2C_TRACE(5, \"i2c-%d mode=%d lcnt=%d hcnt=%d hold=%d\", id, speed_mode,\n                lcnt, hcnt, hold_cycle);\n}\n\nstatic uint8_t _i2c_set_bus_speed(enum HAL_I2C_ID_T id, unsigned int speed) {\n  uint32_t speed_mode;\n\n  if (speed > I2C_FSP_SPEED)\n    speed_mode = IC_SPEED_MODE_MAX;\n  else if (speed > I2C_FAST_SPEED)\n#ifdef I2S_FSP_MODE\n    speed_mode = IC_SPEED_MODE_FAST;\n#else\n    speed_mode = IC_SPEED_MODE_MAX;\n#endif\n  else if (speed > I2C_STANDARD_SPEED)\n    speed_mode = IC_SPEED_MODE_FAST;\n  else\n    speed_mode = IC_SPEED_MODE_STANDARD;\n\n  _i2c_set_speed(id, speed_mode, speed);\n\n  return 0;\n}\n\n/* state machine related */\nstatic void hal_i2c_sm_init(enum HAL_I2C_ID_T id,\n                            const struct HAL_I2C_CONFIG_T *cfg) {\n  memcpy(&hal_i2c_sm[id].cfg, cfg, sizeof(*cfg));\n  hal_i2c_sm[id].state = HAL_I2C_SM_IDLE;\n#if defined(I2C_TASK_MODE) || defined(I2C_SENSOR_ENGINE)\n  hal_i2c_sm[id].in_task = 0;\n  hal_i2c_sm[id].out_task = 0;\n  hal_i2c_sm[id].task_count = 0;\n\n#ifdef I2C_USE_DMA\n  hal_i2c_sm[id].tx_dma_cfg.ch = HAL_DMA_CHAN_NONE;\n  hal_i2c_sm[id].rx_dma_cfg.ch = HAL_DMA_CHAN_NONE;\n#else\n  hal_i2c_sm[id].cfg.use_dma = 0;\n#endif\n#endif\n}\n\n#if defined(I2C_TASK_MODE) || defined(I2C_SENSOR_ENGINE)\nstatic uint32_t hal_i2c_sm_commit(enum HAL_I2C_ID_T id, const uint8_t *tx_buf,\n                                  uint16_t tx_txn_len, uint8_t *rx_buf,\n                                  uint16_t rx_txn_len, uint16_t txn_cnt,\n                                  uint16_t target_addr, uint32_t action,\n                                  uint32_t transfer_id,\n                                  HAL_I2C_TRANSFER_HANDLER_T handler) {\n  uint32_t cur = hal_i2c_sm[id].in_task;\n\n  hal_i2c_sm[id].task[cur].tx_buf = tx_buf;\n  hal_i2c_sm[id].task[cur].rx_buf = rx_buf;\n  hal_i2c_sm[id].task[cur].stop = 1;\n  hal_i2c_sm[id].task[cur].lock = 1;\n  hal_i2c_sm[id].task[cur].state = 0;\n  hal_i2c_sm[id].task[cur].rx_txn_len = rx_txn_len;\n  hal_i2c_sm[id].task[cur].tx_txn_len = tx_txn_len;\n  hal_i2c_sm[id].task[cur].txn_cnt = txn_cnt;\n  hal_i2c_sm[id].task[cur].tx_pos = 0;\n  hal_i2c_sm[id].task[cur].rx_pos = 0;\n  hal_i2c_sm[id].task[cur].rx_cmd_sent = 0;\n  hal_i2c_sm[id].task[cur].errcode = 0;\n  hal_i2c_sm[id].task[cur].action = action;\n  hal_i2c_sm[id].task[cur].handler = handler;\n  hal_i2c_sm[id].task[cur].restart_after_write = 1;\n  hal_i2c_sm[id].task[cur].target_addr = target_addr;\n  hal_i2c_sm[id].task[cur].transfer_id = transfer_id;\n\n  hal_i2c_sm[id].in_task = (cur + 1) % HAL_I2C_SM_TASK_NUM_MAX;\n  hal_i2c_sm[id].task_count++;\n  return cur;\n}\n\nstatic void hal_i2c_sm_done(enum HAL_I2C_ID_T id) {\n  hal_i2c_sm[id].in_task = 0;\n  hal_i2c_sm[id].out_task = 0;\n  hal_i2c_sm[id].task_count = 0;\n  hal_i2c_sm[id].state = HAL_I2C_SM_IDLE;\n\n  HAL_I2C_TRACE(1, \"%s\", __func__);\n}\n\nstatic enum HAL_I2C_SM_TASK_STATE_T\n_i2c_chk_clr_task_error(uint32_t reg_base, uint32_t ip_int_status,\n                        uint32_t tx_abrt_source) {\n  enum HAL_I2C_SM_TASK_STATE_T state = 0;\n  uint32_t tmp1;\n\n  /* tx abort interrupt */\n  if (ip_int_status & I2CIP_INT_STATUS_TX_ABRT_MASK) {\n    state |= HAL_I2C_SM_TASK_STATE_TX_ABRT;\n\n    /* sbyte_norstrt is special to clear : restart disable but user want to send\n     * a restart */\n    /* to fix this bit : enable restart , clear speical , clear gc_or_start bit\n     * temporary */\n    tmp1 = i2cip_r_target_address_reg(reg_base);\n    if (tx_abrt_source & I2CIP_TX_ABRT_SOURCE_ABRT_SBYTE_NORSTRT_MASK) {\n      i2cip_w_restart(reg_base, HAL_I2C_YES);\n      i2cip_w_special_bit(reg_base, HAL_I2C_NO);\n      i2cip_w_gc_or_start_bit(reg_base, HAL_I2C_NO);\n    }\n    i2cip_r_clr_tx_abrt(reg_base);\n    /* restore register after clear */\n    if (tx_abrt_source & I2CIP_TX_ABRT_SOURCE_ABRT_SBYTE_NORSTRT_MASK) {\n      i2cip_w_target_address_reg(reg_base, tmp1);\n    }\n  }\n  /* tx overflow interrupt */\n  if (ip_int_status & I2CIP_INT_MASK_TX_OVER_MASK) {\n    state |= HAL_I2C_SM_TASK_STATE_FIFO_ERR;\n    i2cip_r_clr_tx_over(reg_base);\n  }\n  /* rx overflow interrupt */\n  if (ip_int_status & I2CIP_INT_MASK_RX_OVER_MASK) {\n    state |= HAL_I2C_SM_TASK_STATE_FIFO_ERR;\n    i2cip_r_clr_rx_over(reg_base);\n  }\n  /* rx underflow interrupt */\n  if (ip_int_status & I2CIP_INT_MASK_RX_UNDER_MASK) {\n    state |= HAL_I2C_SM_TASK_STATE_FIFO_ERR;\n    i2cip_r_clr_rx_under(reg_base);\n  }\n\n  return state;\n}\n\nstatic void _i2c_show_error_code(uint32_t errcode) {\n#ifdef DEBUG\n  if (errcode & HAL_I2C_ERRCODE_SLVRD_INTX)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_SLVRD_INTX\");\n  if (errcode & HAL_I2C_ERRCODE_SLV_ARBLOST)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_SLV_ARBLOST\");\n  if (errcode & HAL_I2C_ERRCODE_SLVFLUSH_TXFIFO)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_SLVFLUSH_TXFIFO\");\n  if (errcode & HAL_I2C_ERRCODE_MASTER_DIS)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_MASTER_DIS\");\n  if (errcode & HAL_I2C_ERRCODE_10B_RD_NORSTRT)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_10B_RD_NORSTRT\");\n  if (errcode & HAL_I2C_ERRCODE_SBYTE_NORSTRT)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_SBYTE_NORSTRT\");\n  if (errcode & HAL_I2C_ERRCODE_HS_NORSTRT)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_HS_NORSTRT\");\n  if (errcode & HAL_I2C_ERRCODE_SBYTE_ACKDET)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_SBYTE_ACKDET\");\n  if (errcode & HAL_I2C_ERRCODE_HS_ACKDET)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_HS_ACKDET\");\n  if (errcode & HAL_I2C_ERRCODE_GCALL_READ)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_GCALL_READ\");\n  if (errcode & HAL_I2C_ERRCODE_GCALL_NOACK)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_GCALL_NOACK\");\n  if (errcode & HAL_I2C_ERRCODE_TXDATA_NOACK)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_TXDATA_NOACK\");\n  if (errcode & HAL_I2C_ERRCODE_10ADDR2_NOACK)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_10ADDR2_NOACK\");\n  if (errcode & HAL_I2C_ERRCODE_10ADDR1_NOACK)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_10ADDR1_NOACK\");\n  if (errcode & HAL_I2C_ERRCODE_7B_ADDR_NOACK)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_7B_ADDR_NOACK\");\n\n  if (errcode & HAL_I2C_ERRCODE_INV_PARAM)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_INV_PARAM\");\n  if (errcode & HAL_I2C_ERRCODE_IN_USE)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_IN_USE\");\n  if (errcode & HAL_I2C_ERRCODE_FIFO_ERR)\n    HAL_I2C_ERROR(0, \"i2c err : HAL_I2C_ERRCODE_FIFO_ERR\");\n#endif\n}\n\n#ifdef I2C_USE_DMA\nstatic void hal_i2c_tx_dma_handler(uint8_t chan, uint32_t remain_tsize,\n                                   uint32_t error, struct HAL_DMA_DESC_T *lli) {\n  enum HAL_I2C_ID_T id;\n\n  for (id = HAL_I2C_ID_0; id < HAL_I2C_ID_NUM; id++) {\n    if (hal_i2c_sm[id].tx_dma_cfg.ch == chan) {\n    }\n  }\n}\n\nstatic void hal_i2c_rx_dma_handler(uint8_t chan, uint32_t remain_tsize,\n                                   uint32_t error, struct HAL_DMA_DESC_T *lli) {\n  enum HAL_I2C_ID_T id;\n\n  for (id = HAL_I2C_ID_0; id < HAL_I2C_ID_NUM; id++) {\n    if (hal_i2c_sm[id].rx_dma_cfg.ch == chan) {\n    }\n  }\n}\n\nstatic void hal_i2c_dma_release(enum HAL_I2C_ID_T id) {\n  uint32_t reg_base;\n  struct HAL_DMA_CH_CFG_T *tx_dma_cfg = NULL, *rx_dma_cfg = NULL;\n\n  if (hal_i2c_sm[id].cfg.use_dma == 0) {\n    return;\n  }\n\n  reg_base = _i2c_get_base(id);\n\n  i2cip_w_tx_dma_enable(reg_base, HAL_I2C_NO);\n  i2cip_w_rx_dma_enable(reg_base, HAL_I2C_NO);\n\n  tx_dma_cfg = &hal_i2c_sm[id].tx_dma_cfg;\n  rx_dma_cfg = &hal_i2c_sm[id].rx_dma_cfg;\n\n  HAL_I2C_TRACE(1, \"i2c tx free dma ch %d\", tx_dma_cfg->ch);\n  if (tx_dma_cfg->ch != HAL_DMA_CHAN_NONE) {\n    hal_gpdma_cancel(tx_dma_cfg->ch);\n    hal_gpdma_free_chan(tx_dma_cfg->ch);\n    tx_dma_cfg->ch = HAL_DMA_CHAN_NONE;\n  }\n\n  HAL_I2C_TRACE(1, \"i2c rx free dma ch %d\", rx_dma_cfg->ch);\n  if (rx_dma_cfg->ch != HAL_DMA_CHAN_NONE) {\n    hal_gpdma_cancel(rx_dma_cfg->ch);\n    hal_gpdma_free_chan(rx_dma_cfg->ch);\n    rx_dma_cfg->ch = HAL_DMA_CHAN_NONE;\n  }\n}\n\nstatic void hal_i2c_dma_config(enum HAL_I2C_ID_T id,\n                               const struct HAL_I2C_SM_TASK_T *out_task) {\n  uint32_t reg_base;\n  uint32_t i, txn;\n  uint32_t txn_start, org_start;\n  struct HAL_DMA_CH_CFG_T *tx_dma_cfg = NULL, *rx_dma_cfg = NULL;\n  enum HAL_I2C_SM_TASK_ACTION_T action;\n  uint32_t total_tx_len;\n\n  if (hal_i2c_sm[id].cfg.use_dma == 0) {\n    return;\n  }\n\n  reg_base = _i2c_get_base(id);\n  action = out_task->action;\n\n  total_tx_len = out_task->tx_txn_len * out_task->txn_cnt;\n  if (action == HAL_I2C_SM_TASK_ACTION_M_RECV) {\n    total_tx_len += out_task->rx_txn_len * out_task->txn_cnt;\n  }\n  ASSERT(total_tx_len < ARRAY_SIZE(hal_i2c_sm[id].dma_tx_buf),\n         \"%s: xfer size too large: action=%d total_tx_len=%u (should <= %u)\",\n         __FUNCTION__, action, total_tx_len,\n         ARRAY_SIZE(hal_i2c_sm[id].dma_tx_buf));\n\n  i2cip_w_tx_dma_enable(reg_base, HAL_I2C_YES);\n  i2cip_w_tx_dma_tl(reg_base, HAL_I2C_DMA_TX_TL);\n\n  tx_dma_cfg = &hal_i2c_sm[id].tx_dma_cfg;\n  memset(tx_dma_cfg, 0, sizeof(*tx_dma_cfg));\n  tx_dma_cfg->dst = 0; // useless\n  tx_dma_cfg->dst_bsize = HAL_DMA_BSIZE_1;\n  tx_dma_cfg->dst_periph = i2c_desc[id].tx_periph;\n  tx_dma_cfg->dst_width = HAL_DMA_WIDTH_HALFWORD;\n  tx_dma_cfg->handler = hal_i2c_tx_dma_handler;\n  tx_dma_cfg->src_bsize = HAL_DMA_BSIZE_1;\n  tx_dma_cfg->src_periph = 0; // useless\n  tx_dma_cfg->src_tsize = total_tx_len;\n  tx_dma_cfg->src_width = HAL_DMA_WIDTH_HALFWORD;\n  tx_dma_cfg->try_burst = 1;\n  tx_dma_cfg->type = HAL_DMA_FLOW_M2P_DMA;\n  tx_dma_cfg->src = (uint32_t)hal_i2c_sm[id].dma_tx_buf;\n  tx_dma_cfg->ch =\n      hal_gpdma_get_chan(tx_dma_cfg->dst_periph, HAL_DMA_HIGH_PRIO);\n  HAL_I2C_TRACE(1, \"i2c tx get dma ch %d\", tx_dma_cfg->ch);\n  ASSERT(tx_dma_cfg->ch != HAL_DMA_CHAN_NONE, \"I2C: Failed to get tx dma chan\");\n\n  HAL_I2C_TRACE(3, \"tx size %d cnt %d total tx size %d\", out_task->tx_txn_len,\n                out_task->txn_cnt, total_tx_len);\n\n  memset(&hal_i2c_sm[id].dma_tx_buf[0], 0, sizeof(hal_i2c_sm[id].dma_tx_buf));\n\n  for (txn = 0; txn < out_task->txn_cnt; txn++) {\n    org_start = out_task->tx_txn_len * txn;\n    txn_start = (out_task->tx_txn_len + out_task->rx_txn_len) * txn;\n    for (i = 0; i < out_task->tx_txn_len; i++) {\n      // lo byte of short : for data\n      // hi byte of short : for cmd/stop/restart\n      hal_i2c_sm[id].dma_tx_buf[txn_start + i] =\n          out_task->tx_buf[org_start + i];\n    }\n    if (txn && out_task->restart_after_write) {\n      hal_i2c_sm[id].dma_tx_buf[txn_start] |= I2CIP_CMD_DATA_RESTART_MASK;\n    }\n  }\n\n  if (action == HAL_I2C_SM_TASK_ACTION_M_RECV) {\n    i2cip_w_rx_dma_enable(reg_base, HAL_I2C_YES);\n    i2cip_w_rx_dma_tl(reg_base, HAL_I2C_DMA_RX_TL);\n\n    for (txn = 0; txn < out_task->txn_cnt; txn++) {\n      txn_start = (out_task->tx_txn_len + out_task->rx_txn_len) * txn +\n                  out_task->tx_txn_len;\n      for (i = 0; i < out_task->rx_txn_len; i++) {\n        // lo byte of short : for data\n        // hi byte of short : for cmd/stop/restart\n        hal_i2c_sm[id].dma_tx_buf[txn_start + i] = I2CIP_CMD_DATA_CMD_READ_MASK;\n      }\n      if (out_task->restart_after_write) {\n        hal_i2c_sm[id].dma_tx_buf[txn_start] |= I2CIP_CMD_DATA_RESTART_MASK;\n      }\n    }\n\n    HAL_I2C_TRACE(2, \"rx size %d cnt %d\", out_task->rx_txn_len,\n                  out_task->txn_cnt);\n\n    rx_dma_cfg = &hal_i2c_sm[id].rx_dma_cfg;\n    memset(rx_dma_cfg, 0, sizeof(*rx_dma_cfg));\n    rx_dma_cfg->dst = (uint32_t)(out_task->rx_buf);\n    rx_dma_cfg->dst_bsize = HAL_DMA_BSIZE_1;\n    rx_dma_cfg->dst_periph = 0; // useless\n    rx_dma_cfg->dst_width = HAL_DMA_WIDTH_BYTE;\n    rx_dma_cfg->handler = hal_i2c_rx_dma_handler;\n    rx_dma_cfg->src_bsize = HAL_DMA_BSIZE_1;\n    rx_dma_cfg->src_periph = i2c_desc[id].rx_periph;\n    rx_dma_cfg->src_tsize = out_task->rx_txn_len * out_task->txn_cnt;\n    rx_dma_cfg->src_width = HAL_DMA_WIDTH_BYTE;\n    rx_dma_cfg->try_burst = 0;\n    rx_dma_cfg->src = 0; // useless\n    rx_dma_cfg->type = HAL_DMA_FLOW_P2M_DMA;\n    rx_dma_cfg->ch =\n        hal_gpdma_get_chan(rx_dma_cfg->src_periph, HAL_DMA_HIGH_PRIO);\n    HAL_I2C_TRACE(1, \"i2c rx get dma ch %d\", rx_dma_cfg->ch);\n    ASSERT(tx_dma_cfg->ch != HAL_DMA_CHAN_NONE,\n           \"I2C: Failed to get rx dma chan\");\n  }\n\n  if (out_task->stop) {\n    hal_i2c_sm[id].dma_tx_buf[total_tx_len - 1] |= I2CIP_CMD_DATA_STOP_MASK;\n  }\n}\n#endif\n#endif\n\n#ifdef I2C_TASK_MODE\nstatic void hal_i2c_sm_done_task(enum HAL_I2C_ID_T id) {\n  struct HAL_I2C_SM_TASK_T *task;\n  uint32_t reg_base = _i2c_get_base(id);\n\n  task = &(hal_i2c_sm[id].task[hal_i2c_sm[id].out_task]);\n\n  if (task->errcode) {\n    HAL_I2C_ERROR(1, \"i2c err : 0x%X\", task->errcode);\n    _i2c_show_error_code(task->errcode);\n  }\n\n  if (task->stop || task->errcode) {\n    HAL_I2C_TRACE(0, \"disable i2c\");\n    i2cip_w_enable(reg_base, HAL_I2C_NO);\n  }\n\n#ifdef I2C_USE_DMA\n  if (hal_i2c_sm[id].cfg.use_dma) {\n    hal_i2c_dma_release(id);\n  }\n#endif\n\n  if (hal_i2c_sm[id].cfg.use_sync) {\n    /* FIXME : os and non-os - different proc */\n    task->lock = 0;\n  } else {\n    if (task->handler) {\n      task->handler(id, task->transfer_id, task->tx_buf,\n                    task->tx_txn_len * task->txn_cnt, task->rx_buf,\n                    task->rx_txn_len * task->txn_cnt, task->errcode);\n    }\n  }\n\n  hal_i2c_sm[id].out_task =\n      (hal_i2c_sm[id].out_task + 1) % HAL_I2C_SM_TASK_NUM_MAX;\n  --hal_i2c_sm[id].task_count;\n}\n\nstatic void hal_i2c_sm_next_task(enum HAL_I2C_ID_T id) {\n  uint32_t out_task_index;\n  uint32_t reg_base, reinit;\n  enum HAL_I2C_SM_TASK_ACTION_T action;\n  struct HAL_I2C_SM_TASK_T *out_task = 0;\n\n  reg_base = _i2c_get_base(id);\n\n  if (hal_i2c_sm[id].task_count <= 0) {\n    HAL_I2C_TRACE(0, \"no task\");\n    hal_i2c_sm_done(id);\n    return;\n  }\n\n  out_task_index = hal_i2c_sm[id].out_task;\n  out_task = &(hal_i2c_sm[id].task[out_task_index]);\n  action = out_task->action;\n\n  /* tx : quarter trigger TX EMPTY INT */\n  i2cip_w_tx_threshold(reg_base, HAL_I2C_TX_TL);\n  if (action == HAL_I2C_SM_TASK_ACTION_M_RECV) {\n    /* rx : three quarter trigger RX FULL INT */\n    i2cip_w_rx_threshold(reg_base, HAL_I2C_RX_TL);\n  }\n\n#ifdef I2C_USE_DMA\n  if (hal_i2c_sm[id].cfg.use_dma) {\n    i2cip_init_int_mask(reg_base, I2CIP_INT_MASK_STOP_DET_MASK |\n                                      I2CIP_INT_MASK_ERROR_MASK);\n\n    /* prepare for dma operation */\n    hal_i2c_dma_config(id, out_task);\n  } else\n#endif\n  {\n    /* open all interrupt */\n    i2cip_init_int_mask(reg_base,\n                        (I2CIP_INT_MASK_ALL & ~(I2CIP_INT_MASK_START_DET_MASK |\n                                                I2CIP_INT_MASK_ACTIVITY_MASK)));\n  }\n\n  reinit = i2cip_r_enable_status(reg_base);\n  /* not enable : reconfig i2cip with new-task params */\n  /* enable : same operation with pre task */\n  if (!(reinit & I2CIP_ENABLE_STATUS_ENABLE_MASK)) {\n    HAL_I2C_TRACE(0, \"enable i2c\");\n    i2cip_w_restart(reg_base, HAL_I2C_YES);\n    i2cip_w_target_address(reg_base, out_task->target_addr);\n    i2cip_w_enable(reg_base, HAL_I2C_YES);\n  }\n\n#ifdef I2C_USE_DMA\n  if (hal_i2c_sm[id].cfg.use_dma) {\n    if (action == HAL_I2C_SM_TASK_ACTION_M_RECV) {\n      HAL_I2C_TRACE(0, \"enable rx dma\");\n      hal_gpdma_start(&hal_i2c_sm[id].rx_dma_cfg);\n    }\n    HAL_I2C_TRACE(0, \"enable tx dma\");\n    hal_gpdma_start(&hal_i2c_sm[id].tx_dma_cfg);\n  }\n#endif\n}\n\nstatic uint32_t hal_i2c_sm_wait_task_if_need(enum HAL_I2C_ID_T id,\n                                             uint32_t task_idx,\n                                             uint32_t tm_ms) {\n  int tmcnt;\n  struct HAL_I2C_SM_TASK_T *task = 0;\n\n  /* FIXME : task_id maybe invalid cause so-fast device operation */\n  task = &(hal_i2c_sm[id].task[task_idx]);\n\n  if (!(hal_i2c_sm[id].cfg.use_sync))\n    return 0;\n\n  /* FIXME : os and non-os - different proc */\n  tmcnt = tm_ms / HAL_I2C_DLY_MS;\n  while (1) {\n    uint32_t lock = task->lock;\n\n    if (!lock)\n      break;\n\n    if (!tmcnt) {\n      HAL_I2C_TRACE(1, \"wait lock timeout %d ms\", tm_ms);\n      task->errcode = HAL_I2C_ERRCODE_SYNC_TIMEOUT;\n      hal_i2c_sm_done_task(id);\n      hal_i2c_sm_next_task(id);\n      break;\n    }\n    hal_i2c_delay_ms(HAL_I2C_DLY_MS);\n    tmcnt--;\n  }\n  return task->errcode;\n}\n\nstatic void hal_i2c_sm_kickoff(enum HAL_I2C_ID_T id) {\n  if (hal_i2c_sm[id].state == HAL_I2C_SM_IDLE) {\n    hal_i2c_sm[id].state = HAL_I2C_SM_RUNNING;\n    hal_i2c_sm_next_task(id);\n  }\n}\n\nstatic void hal_i2c_sm_proc(enum HAL_I2C_ID_T id) {\n  uint32_t reg_base = 0;\n  enum HAL_I2C_SM_STATE_T state;\n  enum HAL_I2C_SM_TASK_STATE_T task_state;\n  struct HAL_I2C_SM_TASK_T *task;\n  uint32_t i = 0, restart = 0, stop = 0, data = 0;\n  uint32_t ip_int_status = 0, tx_abrt_source = 0;\n  uint8_t rx_limit, tx_limit, rx_cnt, tx_cnt;\n  uint32_t total_tx_len, total_rx_len;\n  uint32_t txn_idx, txn_pos;\n\n  reg_base = _i2c_get_base(id);\n  state = hal_i2c_sm[id].state;\n  task = &(hal_i2c_sm[id].task[hal_i2c_sm[id].out_task]);\n\n  ip_int_status = i2cip_r_int_status(reg_base);\n  tx_abrt_source = i2cip_r_tx_abrt_source(reg_base);\n\n  HAL_I2C_TRACE(4, \"id:%d, ip_int_status=0x%X tx_abrt_source=0x%X state=%d\", id,\n                ip_int_status, tx_abrt_source, state);\n\n  task_state = _i2c_chk_clr_task_error(reg_base, ip_int_status, tx_abrt_source);\n\n  if (state != HAL_I2C_SM_RUNNING) {\n    HAL_I2C_ERROR(3,\n                  \"*** WARNING: No i2c task running: id=%d ip_int_status=0x%X \"\n                  \"tx_abrt_source=0x%X\",\n                  id, ip_int_status, tx_abrt_source);\n    i2cip_r_clr_all_intr(reg_base);\n    return;\n  }\n\n  HAL_I2C_TRACE(1, \"RUNNING action=%d\", task->action);\n\n  task->state |= task_state;\n\n  if (task->state &\n      (HAL_I2C_SM_TASK_STATE_TX_ABRT | HAL_I2C_SM_TASK_STATE_FIFO_ERR)) {\n    HAL_I2C_ERROR(5,\n                  \"*** ERROR:%s: id=%d task_state=0x%X ip_int_status=0x%X \"\n                  \"tx_abrt_source=0x%X\",\n                  __func__, id, task->state, ip_int_status, tx_abrt_source);\n    task->errcode = tx_abrt_source;\n    if (task->state & HAL_I2C_SM_TASK_STATE_FIFO_ERR) {\n      task->errcode |= HAL_I2C_ERRCODE_FIFO_ERR;\n    }\n    /* done task on any error */\n    hal_i2c_sm_done_task(id);\n    hal_i2c_sm_next_task(id);\n    return;\n  }\n\n  /* stop det interrupt */\n  if (ip_int_status & I2CIP_INT_STATUS_STOP_DET_MASK) {\n    task->state |= HAL_I2C_SM_TASK_STATE_STOP;\n    i2cip_r_clr_stop_det(reg_base);\n  }\n\n  /* start det interrupt */\n  if (ip_int_status & I2CIP_INT_STATUS_START_DET_MASK) {\n    task->state |= HAL_I2C_SM_TASK_STATE_START;\n    i2cip_r_clr_start_det(reg_base);\n  }\n\n  /* activeity det interrupt */\n  if (ip_int_status & I2CIP_INT_STATUS_ACTIVITY_MASK) {\n    task->state |= HAL_I2C_SM_TASK_STATE_ACT;\n    i2cip_r_clr_activity(reg_base);\n  }\n\n  switch (task->action) {\n  case HAL_I2C_SM_TASK_ACTION_M_SEND: {\n    if (hal_i2c_sm[id].cfg.use_dma == 0) {\n      /* tx empty : means tx fifo is at or below IC_TX_TL :\n         need to write more data : we can NOT clear this bit, cleared by hw */\n      if (ip_int_status & I2CIP_INT_STATUS_TX_EMPTY_MASK) {\n        total_tx_len = task->tx_txn_len * task->txn_cnt;\n        tx_limit = i2cip_r_tx_fifo_level(reg_base);\n        if (tx_limit < I2CIP_TX_FIFO_DEPTH) {\n          tx_limit = I2CIP_TX_FIFO_DEPTH - tx_limit;\n        } else {\n          tx_limit = 0;\n        }\n        HAL_I2C_TRACE(4, \"m_send: tx_pos=%d tx_txn_len=%d cnt=%d tx_limit=%d\",\n                      task->tx_pos, task->tx_txn_len, task->txn_cnt, tx_limit);\n        for (i = task->tx_pos, tx_cnt = 0;\n             ((i < total_tx_len) && (tx_cnt < tx_limit)); ++i, ++tx_cnt) {\n          /* last byte : we need to decide stop */\n          if (i == total_tx_len - 1) {\n            stop = task->stop ? I2CIP_CMD_DATA_STOP_MASK : 0;\n          } else {\n            stop = 0;\n          }\n          if (task->txn_cnt == 1) {\n            txn_pos = i;\n          } else {\n            txn_pos = i % task->tx_txn_len;\n          }\n          /* first byte : need to decide restart */\n          if (i && task->restart_after_write && txn_pos == 0) {\n            restart = I2CIP_CMD_DATA_RESTART_MASK;\n          } else {\n            restart = 0;\n          }\n          /* write data to FIFO */\n          i2cip_w_cmd_data(reg_base, task->tx_buf[i] |\n                                         I2CIP_CMD_DATA_CMD_WRITE_MASK |\n                                         restart | stop);\n\n          HAL_I2C_TRACE(3, \"m_send: data=0x%02X restart=0x%X stop=0x%X\",\n                        task->tx_buf[i], restart, stop);\n        }\n\n        task->tx_pos = i;\n\n        /* all write action done : do NOT need tx empty int */\n        if (task->tx_pos == total_tx_len) {\n          i2cip_clear_int_mask(reg_base, I2CIP_INT_MASK_TX_EMPTY_MASK);\n        }\n        HAL_I2C_TRACE(1, \"m_send: i2c status=0x%X\", i2cip_r_status(reg_base));\n      }\n    }\n\n    /* stop condition : done task */\n    if (task->state & HAL_I2C_SM_TASK_STATE_STOP) {\n      HAL_I2C_TRACE(1, \"m_send: task->state:0x%X\", task->state);\n      hal_i2c_sm_done_task(id);\n      hal_i2c_sm_next_task(id);\n    }\n    break;\n  }\n  case HAL_I2C_SM_TASK_ACTION_M_RECV: {\n    if (hal_i2c_sm[id].cfg.use_dma == 0) {\n      /* rx full : need to read */\n      if (ip_int_status & I2CIP_INT_STATUS_RX_FULL_MASK) {\n        total_rx_len = task->rx_txn_len * task->txn_cnt;\n        rx_limit = i2cip_r_rx_fifo_level(reg_base);\n        HAL_I2C_TRACE(4,\n                      \"m_recv:full: rx_pos=%d rx_txn_len=%d cnt=%d rx_limit=%d\",\n                      task->rx_pos, task->rx_txn_len, task->txn_cnt, rx_limit);\n        for (i = task->rx_pos, rx_cnt = 0;\n             ((i < total_rx_len) && (rx_cnt < rx_limit)); ++i, ++rx_cnt) {\n          task->rx_buf[i] = i2cip_r_cmd_data(reg_base);\n          HAL_I2C_TRACE(2, \"m_recv:full: rx_buf[%d] 0x%X\", i, task->rx_buf[i]);\n        }\n        task->rx_pos = i;\n      }\n\n      /* tx empty : means tx fifo is at or below IC_TX_TL :\n         need to write more data : we can NOT clear this bit, cleared by hw */\n      if (ip_int_status & I2CIP_INT_STATUS_TX_EMPTY_MASK) {\n        total_tx_len = (task->tx_txn_len + task->rx_txn_len) * task->txn_cnt;\n        tx_limit = i2cip_r_tx_fifo_level(reg_base);\n        if (tx_limit < I2CIP_TX_FIFO_DEPTH) {\n          tx_limit = I2CIP_TX_FIFO_DEPTH - tx_limit;\n        } else {\n          tx_limit = 0;\n        }\n        rx_limit = task->rx_cmd_sent - task->rx_pos + 1;\n        if (rx_limit < I2CIP_RX_FIFO_DEPTH) {\n          rx_limit = I2CIP_RX_FIFO_DEPTH - rx_limit;\n        } else {\n          rx_limit = 0;\n        }\n        HAL_I2C_TRACE(6,\n                      \"m_recv:txEmpty: tx_pos=%d tx_txn_len=%d rx_txn_len=%d \"\n                      \"cnt=%d tx_limit=%d rx_limit=%d\",\n                      task->tx_pos, task->tx_txn_len, task->rx_txn_len,\n                      task->txn_cnt, tx_limit, rx_limit);\n        if (tx_limit > rx_limit) {\n          tx_limit = rx_limit;\n        }\n        for (i = task->tx_pos, tx_cnt = 0;\n             ((i < total_tx_len) && (tx_cnt < tx_limit)); ++i, ++tx_cnt) {\n          /* last byte : we need to decide stop */\n          if (i == (total_tx_len - 1)) {\n            stop = task->stop ? I2CIP_CMD_DATA_STOP_MASK : 0;\n          } else {\n            stop = 0;\n          }\n          if (task->txn_cnt == 1) {\n            txn_idx = 0;\n            txn_pos = i;\n          } else {\n            txn_idx = i / (task->tx_txn_len + task->rx_txn_len);\n            txn_pos = i % (task->tx_txn_len + task->rx_txn_len);\n          }\n          /* first byte : need to decide restart */\n          if (i && task->restart_after_write &&\n              (txn_pos == 0 || txn_pos == task->tx_txn_len)) {\n            restart = I2CIP_CMD_DATA_RESTART_MASK;\n          } else {\n            restart = 0;\n          }\n          /* real write data */\n          if (txn_pos < task->tx_txn_len) {\n            if (task->txn_cnt == 1) {\n              data = task->tx_buf[txn_pos];\n            } else {\n              data = task->tx_buf[txn_idx * task->tx_txn_len + txn_pos];\n            }\n          } else {\n            data = I2CIP_CMD_DATA_CMD_READ_MASK;\n            task->rx_cmd_sent++;\n          }\n\n          i2cip_w_cmd_data(reg_base, data | restart | stop);\n          HAL_I2C_TRACE(4, \"m_recv:tx: data[%u]=0x%02X restart=0x%X stop=0x%X\",\n                        i, data, restart, stop);\n        }\n\n        task->tx_pos = i;\n\n        /* all write action done */\n        if (task->tx_pos == total_tx_len) {\n          i2cip_clear_int_mask(reg_base, I2CIP_INT_MASK_TX_EMPTY_MASK);\n        }\n      }\n    }\n\n    /* stop condition : need to read out all rx fifo */\n    if (task->state & HAL_I2C_SM_TASK_STATE_STOP) {\n      if (hal_i2c_sm[id].cfg.use_dma) {\n#ifdef I2C_USE_DMA\n        if (hal_i2c_sm[id].rx_dma_cfg.ch == HAL_DMA_CHAN_NONE) {\n          HAL_I2C_TRACE(0, \"m_recv:stop:WARNING: bad rx dma chan!\");\n        } else {\n          if (hal_dma_chan_busy(hal_i2c_sm[id].rx_dma_cfg.ch)) {\n            HAL_I2C_TRACE(0, \"m_recv:stop:WARNING: rx dma not finished yet!\");\n          }\n        }\n#endif\n      } else {\n        rx_limit = i2cip_r_rx_fifo_level(reg_base);\n        HAL_I2C_TRACE(1, \"m_recv:stop: rx_limit=%d\", rx_limit);\n        for (i = task->rx_pos, rx_cnt = 0;\n             ((rx_cnt < rx_limit) && (i < task->rx_txn_len)); ++i, ++rx_cnt) {\n          task->rx_buf[i] = i2cip_r_cmd_data(reg_base);\n          HAL_I2C_TRACE(2, \"m_recv:stop: rx_buf[%d] 0x%X\", i, task->rx_buf[i]);\n        }\n        task->rx_pos = i;\n        if (task->rx_pos != task->rx_txn_len * task->txn_cnt) {\n          HAL_I2C_TRACE(\n              3,\n              \"m_recv:stop:WARNING: rx_pos(%u) != rx_txn_len(%u) * txn_cnt(%u)\",\n              task->rx_pos, task->rx_txn_len, task->txn_cnt);\n        }\n      }\n      hal_i2c_sm_done_task(id);\n      hal_i2c_sm_next_task(id);\n    }\n    break;\n  }\n  default:\n    break;\n  }\n}\n\nvoid hal_i2c_irq_handler(void) {\n  enum HAL_I2C_ID_T id;\n\n  for (id = HAL_I2C_ID_0; id < HAL_I2C_ID_NUM; id++) {\n    if (NVIC_GetActive(i2c_desc[id].irq)) {\n      hal_i2c_sm_proc(id);\n    }\n  }\n}\n#endif\n\n#ifdef I2C_SIMPLE_MODE\nvoid hal_i2c_irq_handler_s(void) {\n  enum HAL_I2C_ID_T id;\n\n  for (id = HAL_I2C_ID_0; id < HAL_I2C_ID_NUM; id++) {\n    if (NVIC_GetActive(i2c_desc[id].irq)) {\n      hal_i2c_simple_proc(id);\n    }\n  }\n}\n#endif\n\n#ifdef I2C_SENSOR_ENGINE\nvoid hal_i2c_irq_handler_sensor_eng(void) {\n  enum HAL_I2C_ID_T id;\n\n  for (id = HAL_I2C_ID_0; id < HAL_I2C_ID_NUM; id++) {\n    if (NVIC_GetActive(i2c_desc[id].irq)) {\n      hal_i2c_sensor_eng_proc(id);\n    }\n  }\n}\n#endif\n\nstatic int POSSIBLY_UNUSED hal_i2c_nvic_setup_irq(enum HAL_I2C_ID_T id,\n                                                  uint32_t handler) {\n  IRQn_Type irqt = i2c_desc[id].irq;\n\n  NVIC_SetVector(irqt, handler);\n  NVIC_SetPriority(irqt, IRQ_PRIORITY_NORMAL);\n  return 0;\n}\n\nstatic int hal_i2c_nvic_enable_irq(enum HAL_I2C_ID_T id, int enabled) {\n  IRQn_Type irqt = i2c_desc[id].irq;\n\n  if (enabled) {\n    NVIC_ClearPendingIRQ(irqt);\n    NVIC_EnableIRQ(irqt);\n  } else {\n    NVIC_DisableIRQ(irqt);\n    NVIC_ClearPendingIRQ(irqt);\n  }\n  return 0;\n}\n\nuint32_t hal_i2c_open(enum HAL_I2C_ID_T id,\n                      const struct HAL_I2C_CONFIG_T *cfg) {\n  uint32_t reg_base;\n\n  ASSERT(id < HAL_I2C_ID_NUM, invalid_id, id);\n\n  if (hal_i2c_sm[id].state != HAL_I2C_SM_CLOSED) {\n    return HAL_I2C_ERRCODE_IN_USE;\n  }\n\n  hal_i2c_sm_init(id, cfg);\n\n  hal_cmu_clock_enable(i2c_desc[id].mod);\n  hal_cmu_clock_enable(i2c_desc[id].apb);\n  hal_cmu_reset_clear(i2c_desc[id].mod);\n  hal_cmu_reset_clear(i2c_desc[id].apb);\n\n  reg_base = _i2c_get_base(id);\n  HAL_I2C_TRACE(2, \"i2c id=%d reg_base=0x%X\", id, reg_base);\n\n  i2cip_w_enable(reg_base, HAL_I2C_NO);\n\n  i2cip_w_target_address(reg_base, 0x18);\n\n  /* clear */\n  i2cip_w_clear_ctrl(reg_base);\n\n  /* as master */\n  if (cfg->as_master) {\n    i2cip_w_disable_slave(reg_base, HAL_I2C_YES);\n    i2cip_w_master_mode(reg_base, HAL_I2C_YES);\n  } else {\n    i2cip_w_disable_slave(reg_base, HAL_I2C_NO);\n    i2cip_w_master_mode(reg_base, HAL_I2C_NO);\n\n    /* address as slave */\n    i2cip_w_address_as_slave(reg_base, cfg->addr_as_slave);\n  }\n\n  /* speed */\n  _i2c_set_bus_speed(id, cfg->speed);\n  if (0) {\n#ifdef I2C_SIMPLE_MODE\n  } else if (cfg->mode == HAL_I2C_API_MODE_SIMPLE) {\n    HAL_I2C_TRACE(0, \"simple mode\");\n    hal_i2c_nvic_setup_irq(id, (uint32_t)hal_i2c_irq_handler_s);\n\n    /* only open slave related int, polling in master */\n    /* read req (master read us), rx full (master write us) */\n    if (cfg->as_master) {\n      i2cip_init_int_mask(reg_base, I2CIP_INT_UNMASK_ALL);\n    } else {\n      i2cip_init_int_mask(reg_base, I2CIP_INT_MASK_RD_REQ_MASK |\n                                        I2CIP_INT_MASK_RX_FULL_MASK);\n    }\n\n    /* rx threshold, 1 byte trigger RX_FULL */\n    i2cip_w_rx_threshold(reg_base, I2CIP_RX_TL_1_BYTE);\n\n    /* tx threshold, 1 byte trigger TX_EMPTY */\n    i2cip_w_tx_threshold(reg_base, I2CIP_TX_TL_1_BYTE);\n\n    /* enable restart */\n    i2cip_w_restart(reg_base, HAL_I2C_YES);\n\n    /* enable i2c */\n    i2cip_w_enable(reg_base, HAL_I2C_YES);\n#endif\n#ifdef I2C_TASK_MODE\n  } else if (cfg->mode == HAL_I2C_API_MODE_TASK) {\n    /* only use task irq handler when master mode */\n    HAL_I2C_TRACE(0, \"task mode\");\n    if (!cfg->as_master) {\n      HAL_I2C_TRACE(0, \"not as master\");\n      return HAL_I2C_ERRCODE_INV_PARAM;\n    }\n#ifndef I2C_USE_DMA\n    if (cfg->use_dma) {\n      HAL_I2C_TRACE(0, \"using DMA when I2C_USE_DMA is NOT enabled\");\n      return HAL_I2C_ERRCODE_INV_PARAM;\n    }\n#endif\n\n    hal_i2c_nvic_setup_irq(id, (uint32_t)hal_i2c_irq_handler);\n#endif\n#ifdef I2C_SENSOR_ENGINE\n  } else if (cfg->mode == HAL_I2C_API_MODE_SENSOR_ENGINE) {\n    HAL_I2C_TRACE(0, \"sensor engine mode\");\n    ASSERT(cfg->as_master, \"%s: i2c master should be used with sensor engine\",\n           __FUNCTION__);\n    ASSERT(cfg->use_dma, \"%s: i2c dma should be used with sensor engine\",\n           __FUNCTION__);\n\n    hal_i2c_nvic_setup_irq(id, (uint32_t)hal_i2c_irq_handler_sensor_eng);\n#endif\n  } else {\n    ASSERT(false, \"%s: Bad i2c api mode: %u\", __FUNCTION__, cfg->mode);\n  }\n\n  hal_i2c_nvic_enable_irq(id, HAL_I2C_YES);\n\n  return 0;\n}\n\nuint32_t hal_i2c_close(enum HAL_I2C_ID_T id) {\n  uint32_t reg_base;\n  ASSERT(id < HAL_I2C_ID_NUM, invalid_id, id);\n\n  if (hal_i2c_sm[id].state == HAL_I2C_SM_CLOSED) {\n    return 0;\n  }\n\n  reg_base = _i2c_get_base(id);\n\n  hal_i2c_nvic_enable_irq(id, HAL_I2C_NO);\n  i2cip_w_enable(reg_base, HAL_I2C_NO);\n\n#if defined(I2C_TASK_MODE) || defined(I2C_SENSOR_ENGINE)\n#ifdef I2C_USE_DMA\n  hal_i2c_dma_release(id);\n#endif\n#endif\n\n  hal_cmu_reset_set(i2c_desc[id].apb);\n  hal_cmu_reset_set(i2c_desc[id].mod);\n  hal_cmu_clock_disable(i2c_desc[id].apb);\n  hal_cmu_clock_disable(i2c_desc[id].mod);\n\n  hal_i2c_sm[id].state = HAL_I2C_SM_CLOSED;\n\n  return 0;\n}\n\n/* task mode */\n#ifdef I2C_TASK_MODE\nuint32_t hal_i2c_task_msend(enum HAL_I2C_ID_T id, uint16_t device_addr,\n                            const uint8_t *tx_buf, uint16_t tx_item_len,\n                            uint16_t item_cnt, uint32_t transfer_id,\n                            HAL_I2C_TRANSFER_HANDLER_T handler) {\n  uint32_t task_idx;\n  ASSERT(id < HAL_I2C_ID_NUM, invalid_id, id);\n\n  if (hal_i2c_sm[id].cfg.mode != HAL_I2C_API_MODE_TASK) {\n    HAL_I2C_TRACE(0, \"send: not task mode\");\n    return HAL_I2C_ERRCODE_INV_PARAM;\n  }\n\n  task_idx =\n      hal_i2c_sm_commit(id, tx_buf, tx_item_len, NULL, 0, item_cnt, device_addr,\n                        HAL_I2C_SM_TASK_ACTION_M_SEND, transfer_id, handler);\n\n  hal_i2c_sm_kickoff(id);\n  return hal_i2c_sm_wait_task_if_need(id, task_idx, HAL_I2C_SYNC_TM_MS);\n}\n\nuint32_t hal_i2c_task_send(enum HAL_I2C_ID_T id, uint16_t device_addr,\n                           const uint8_t *tx_buf, uint16_t tx_len,\n                           uint32_t transfer_id,\n                           HAL_I2C_TRANSFER_HANDLER_T handler) {\n  return hal_i2c_task_msend(id, device_addr, tx_buf, tx_len, 1, transfer_id,\n                            handler);\n}\n\nuint32_t hal_i2c_task_mrecv(enum HAL_I2C_ID_T id, uint16_t device_addr,\n                            const uint8_t *tx_buf, uint16_t tx_item_len,\n                            uint8_t *rx_buf, uint16_t rx_item_len,\n                            uint16_t item_cnt, uint32_t transfer_id,\n                            HAL_I2C_TRANSFER_HANDLER_T handler) {\n  uint32_t task_idx;\n  ASSERT(id < HAL_I2C_ID_NUM, invalid_id, id);\n\n  if (hal_i2c_sm[id].cfg.mode != HAL_I2C_API_MODE_TASK) {\n    HAL_I2C_TRACE(0, \"recv: not task mode\");\n    return HAL_I2C_ERRCODE_INV_PARAM;\n  }\n\n  task_idx = hal_i2c_sm_commit(\n      id, tx_buf, tx_item_len, rx_buf, rx_item_len, item_cnt, device_addr,\n      HAL_I2C_SM_TASK_ACTION_M_RECV, transfer_id, handler);\n\n  hal_i2c_sm_kickoff(id);\n  return hal_i2c_sm_wait_task_if_need(id, task_idx, HAL_I2C_SYNC_TM_MS);\n}\n\nuint32_t hal_i2c_task_recv(enum HAL_I2C_ID_T id, uint16_t device_addr,\n                           const uint8_t *tx_buf, uint16_t tx_len,\n                           uint8_t *rx_buf, uint16_t rx_len,\n                           uint32_t transfer_id,\n                           HAL_I2C_TRANSFER_HANDLER_T handler) {\n  return hal_i2c_task_mrecv(id, device_addr, tx_buf, tx_len, rx_buf, rx_len, 1,\n                            transfer_id, handler);\n}\n\nuint32_t hal_i2c_send(enum HAL_I2C_ID_T id, uint32_t device_addr, uint8_t *buf,\n                      uint32_t reg_len, uint32_t value_len,\n                      uint32_t transfer_id,\n                      HAL_I2C_TRANSFER_HANDLER_T handler) {\n  return hal_i2c_task_send(id, device_addr, buf, reg_len + value_len,\n                           transfer_id, handler);\n}\n\nuint32_t hal_i2c_recv(enum HAL_I2C_ID_T id, uint32_t device_addr, uint8_t *buf,\n                      uint32_t reg_len, uint32_t value_len,\n                      uint8_t restart_after_write, uint32_t transfer_id,\n                      HAL_I2C_TRANSFER_HANDLER_T handler) {\n  return hal_i2c_task_recv(id, device_addr, buf, reg_len, buf + reg_len,\n                           value_len, transfer_id, handler);\n}\n#endif\n/* task mode end */\n\n/* simple mode */\n#ifdef I2C_SIMPLE_MODE\nstatic void hal_i2c_simple_proc(enum HAL_I2C_ID_T id) {\n  uint32_t reg_base = _i2c_get_base(id);\n  uint32_t irq_status = i2cip_r_raw_int_status(reg_base);\n  uint32_t abt_source = i2cip_r_tx_abrt_source(reg_base);\n  HAL_I2C_INT_HANDLER_T h = hal_i2c_int_handlers[id];\n\n  i2cip_r_clr_all_intr(reg_base);\n\n  if (h) {\n    HAL_I2C_TRACE(3, \"%s:irq=0x%X abt=0x%X\", __func__, irq_status, abt_source);\n    h(id, irq_status, abt_source);\n  }\n\n  // TODO: clean irq after callback done ?\n  i2cip_r_clr_all_intr(reg_base);\n\n  HAL_I2C_TRACE(3, \"%s:0x%X 0x%X\", __func__, i2cip_r_status(reg_base),\n                i2cip_r_raw_int_status(reg_base));\n}\n\nstatic uint32_t _i2c_check_tx_abrt_error(enum HAL_I2C_ID_T id) {\n  uint32_t reg_base = _i2c_get_base(id);\n\n  if (i2cip_r_raw_int_status(reg_base) & I2CIP_RAW_INT_STATUS_TX_ABRT_MASK)\n    return i2cip_r_tx_abrt_source(reg_base);\n\n  return 0;\n}\n\nuint32_t hal_i2c_slv_write(enum HAL_I2C_ID_T id, uint8_t *buf, uint32_t len,\n                           uint32_t *act_write) {\n  uint32_t reg_base = 0, i = 0, ret = 0;\n\n  reg_base = _i2c_get_base(id);\n\n  *act_write = 0;\n\n  for (i = 0; i < len;) {\n    /* Tx Fifo Not Full */\n    if (i2cip_r_status(reg_base) & I2CIP_STATUS_TFNF_MASK) {\n      i2cip_w_cmd_data(reg_base, buf[i]);\n      ++(*act_write);\n      ++i;\n    } else {\n      /* wait for TFNF & not rx done & no error */\n      while (!(i2cip_r_status(reg_base) & I2CIP_STATUS_TFNF_MASK) &&\n             !(i2cip_r_raw_int_status(reg_base) &\n               I2CIP_RAW_INT_STATUS_RX_DONE_MASK) &&\n             !(ret = _i2c_check_tx_abrt_error(reg_base)))\n        ;\n\n      if (ret || (i2cip_r_raw_int_status(reg_base) &\n                  I2CIP_RAW_INT_STATUS_RX_DONE_MASK))\n        break;\n    }\n  }\n\n  /* FIXME : tx empty is not end of transmit, i2cip may transmit the last byte\n   */\n  while (!(i2cip_r_status(reg_base) & I2CIP_STATUS_TFE_SHIFT) &&\n         !(ret = _i2c_check_tx_abrt_error(reg_base)))\n    ;\n\n  /* wait to idle */\n  /* FIXME : time out */\n  while (i2cip_r_status(reg_base) & I2CIP_STATUS_ACT_MASK)\n    ;\n\n  return ret;\n}\n\nuint32_t hal_i2c_slv_read(enum HAL_I2C_ID_T id, uint8_t *buf, uint32_t len,\n                          uint32_t *act_read) {\n  uint32_t reg_base = 0, i = 0, ret = 0, depth = 0;\n\n  reg_base = _i2c_get_base(id);\n\n  *act_read = 0;\n  /* slave mode : just read */\n  for (i = 0; i < len;) {\n    /* Rx Fifo Not Empty */\n    if (i2cip_r_status(reg_base) & I2CIP_STATUS_RFNE_MASK) {\n      buf[i] = i2cip_r_cmd_data(reg_base);\n      ++(*act_read);\n      ++i;\n    } else {\n      /* wait for RFNE & no stop & no error */\n      while (!(i2cip_r_status(reg_base) & I2CIP_STATUS_RFNE_MASK) &&\n             !(i2cip_r_raw_int_status(reg_base) &\n               I2CIP_RAW_INT_STATUS_STOP_DET_MASK) &&\n             !(ret = _i2c_check_tx_abrt_error(reg_base))) {\n      }\n\n      if (ret || (i2cip_r_raw_int_status(reg_base) &\n                  I2CIP_RAW_INT_STATUS_STOP_DET_MASK)) {\n        HAL_I2C_TRACE(2, \"drv:i2c slave read ret 0x%X, raw status 0x%X\", ret,\n                      i2cip_r_raw_int_status(reg_base));\n        break;\n      }\n    }\n  }\n\n  /* may left some bytes in rx fifo */\n  depth = i2cip_r_rx_fifo_level(reg_base);\n  HAL_I2C_TRACE(1, \"drv:i2c slave read depth %d\", depth);\n  while (depth > 0 && i < len) {\n    buf[i] = i2cip_r_cmd_data(reg_base);\n    ++(*act_read);\n    ++i;\n    --depth;\n  }\n\n  /* wait to idle */\n  while (i2cip_r_status(reg_base) & I2CIP_STATUS_ACT_MASK)\n    ;\n\n  return 0;\n}\n\nstatic void i2c_clear_special_tx_abrt(uint32_t reg_base) {\n  uint32_t abrt = i2cip_r_tx_abrt_source(reg_base);\n\n  i2cip_r_clr_tx_abrt(reg_base);\n\n  if (abrt & I2CIP_TX_ABRT_SOURCE_ABRT_SBYTE_NORSTRT_MASK) {\n    i2cip_w_restart(reg_base, HAL_I2C_YES);\n    i2cip_w_special_bit(reg_base, HAL_I2C_NO);\n    i2cip_w_gc_or_start_bit(reg_base, HAL_I2C_NO);\n    i2cip_r_clr_tx_abrt(reg_base);\n  }\n}\n\nstatic uint32_t _i2c_check_raw_int_status(uint32_t reg_base, uint32_t mask) {\n  uint32_t regval = i2cip_r_raw_int_status(reg_base);\n\n  HAL_I2C_TRACE(3, \"%s: raw status=0x%X mask=0x%X\", __func__, regval, mask);\n  return regval & mask;\n}\n\nuint32_t hal_i2c_mst_write(enum HAL_I2C_ID_T id, uint32_t dev_addr,\n                           const uint8_t *buf, uint32_t len,\n                           uint32_t *act_write, uint32_t restart, uint32_t stop,\n                           uint32_t yield) {\n  uint32_t i, tar, wrcnt, ret = 0;\n  uint32_t reg_base;\n  uint32_t start_time, timeout;\n  uint32_t res, sto;\n\n  ASSERT(id < HAL_I2C_ID_NUM, invalid_id, id);\n\n  if (hal_i2c_sm[id].cfg.mode != HAL_I2C_API_MODE_SIMPLE) {\n    HAL_I2C_TRACE(0, \"mst_write: not simple mode\");\n    return HAL_I2C_ERRCODE_INV_PARAM;\n  }\n\n  HAL_I2C_TRACE(7, \"%s:id=%d addr=0x%02X buf=0x%X len=%d res=%d sto=%d\",\n                __func__, id, dev_addr, (int)buf, len, restart, stop);\n\n  reg_base = _i2c_get_base(id);\n\n  // update TAR\n  tar = i2cip_r_target_address_reg(reg_base);\n  if (tar != dev_addr) {\n    timeout = MS_TO_TICKS(HAL_I2C_WAIT_ACT_MS);\n    start_time = hal_sys_timer_get();\n    while ((i2cip_r_status(reg_base) & I2CIP_STATUS_ACT_MASK)) {\n      if (hal_sys_timer_get() - start_time >= timeout) {\n        HAL_I2C_TRACE(1, \"%s:wait bus idle timeout\", __func__);\n        ret = HAL_I2C_ERRCODE_ACT_TIMEOUT;\n        goto exit;\n      }\n      if (yield) {\n        hal_i2c_delay_ms(HAL_I2C_DLY_MS);\n      }\n    }\n\n    i2cip_w_enable(reg_base, HAL_I2C_NO);\n    i2cip_w_target_address(reg_base, dev_addr);\n    i2cip_w_enable(reg_base, HAL_I2C_YES);\n    HAL_I2C_TRACE(3, \"%s:update tar to 0x%02X from 0x%02X\", __func__, dev_addr,\n                  tar);\n  }\n\n  // check error\n  if (_i2c_check_raw_int_status(reg_base,\n                                I2CIP_RAW_INT_STATUS_TX_ABRT_MASK |\n                                    I2CIP_RAW_INT_STATUS_TX_OVER_MASK |\n                                    I2CIP_RAW_INT_STATUS_RX_OVER_MASK |\n                                    I2CIP_RAW_INT_STATUS_RX_UNDER_MASK)) {\n    i2cip_r_clr_all_intr(reg_base);\n    i2c_clear_special_tx_abrt(reg_base);\n    HAL_I2C_TRACE(1, \"clear error status done before xfer: status=0x%X\",\n                  i2cip_r_raw_int_status(reg_base));\n  }\n\n  // start to transmit\n  wrcnt = 0;\n  for (i = 0; i < len; i++) {\n    if (i == 0) {\n      res = restart ? I2CIP_CMD_DATA_RESTART_MASK : 0;\n    } else {\n      res = 0;\n    }\n    if (i == (len - 1)) {\n      sto = stop ? I2CIP_CMD_DATA_STOP_MASK : 0;\n    } else {\n      sto = 0;\n    }\n\n    timeout = MS_TO_TICKS(HAL_I2C_WAIT_TFNF_MS);\n    start_time = hal_sys_timer_get();\n    while (!(i2cip_r_status(reg_base) & I2CIP_STATUS_TFNF_MASK)) {\n      ret = _i2c_check_raw_int_status(reg_base,\n                                      I2CIP_RAW_INT_STATUS_TX_ABRT_MASK);\n      if (ret) {\n        i2c_clear_special_tx_abrt(reg_base);\n        HAL_I2C_TRACE(2, \"%s:error 0x%X\", __func__, ret);\n        goto exit;\n      }\n      if (hal_sys_timer_get() - start_time >= timeout) {\n        HAL_I2C_TRACE(1, \"%s:wait tfnf timeout\", __func__);\n        ret = HAL_I2C_ERRCODE_TFNF_TIMEOUT;\n        goto exit;\n      }\n      if (yield) {\n        hal_i2c_delay_ms(HAL_I2C_DLY_MS);\n      }\n    }\n    i2cip_w_cmd_data(reg_base,\n                     buf[i] | res | sto | I2CIP_CMD_DATA_CMD_WRITE_MASK);\n\n    HAL_I2C_TRACE(4, \"send write cmd: data[%d]=0x%02X res=0x%X sto=0x%X\", i,\n                  buf[i], res, sto);\n    wrcnt++;\n  }\n\n  if (act_write)\n    *act_write = wrcnt;\n\n  if (stop) {\n    // wait bus idle\n    timeout = MS_TO_TICKS(HAL_I2C_WAIT_ACT_MS);\n    start_time = hal_sys_timer_get();\n    while (i2cip_r_status(reg_base) & I2CIP_STATUS_ACT_MASK) {\n      if (hal_sys_timer_get() - start_time >= timeout) {\n        if (_i2c_check_raw_int_status(reg_base,\n                                      I2CIP_RAW_INT_STATUS_TX_ABRT_MASK)) {\n          i2cip_r_clr_all_intr(reg_base);\n          i2c_clear_special_tx_abrt(reg_base);\n          HAL_I2C_TRACE(0, \"clear error status done after xfer\");\n        }\n        HAL_I2C_TRACE(1, \"%s:wait act timeout\", __func__);\n        ret = HAL_I2C_ERRCODE_ACT_TIMEOUT;\n        goto exit;\n      }\n      if (yield) {\n        hal_i2c_delay_ms(HAL_I2C_DLY_MS);\n      }\n    }\n  } else {\n    // wait until txfifo empty\n    timeout = MS_TO_TICKS(HAL_I2C_WAIT_TFE_MS);\n    start_time = hal_sys_timer_get();\n    while (!(i2cip_r_status(reg_base) & I2CIP_STATUS_TFE_MASK)) {\n      if (hal_sys_timer_get() - start_time >= timeout) {\n        HAL_I2C_TRACE(1, \"%s:wait tfe timeout\", __func__);\n        ret = HAL_I2C_ERRCODE_TFE_TIMEOUT;\n        goto exit;\n      }\n      if (yield) {\n        hal_i2c_delay_ms(HAL_I2C_DLY_MS);\n      }\n    }\n  }\n\n  HAL_I2C_TRACE(1, \"%s:done\", __func__);\n  return 0;\nexit:\n  HAL_I2C_TRACE(3, \"%s:error=0x%X, status=0x%X\", __func__, ret,\n                i2cip_r_raw_int_status(reg_base));\n  return ret;\n}\n\nuint32_t hal_i2c_mst_read(enum HAL_I2C_ID_T id, uint32_t dev_addr, uint8_t *buf,\n                          uint32_t len, uint32_t *act_read, uint32_t restart,\n                          uint32_t stop, uint32_t yield) {\n  uint32_t i, j, tar, rdcnt, wrcnt, ret = 0;\n  uint32_t reg_base;\n  uint32_t start_time, timeout;\n  uint32_t res, sto;\n  uint8_t tmp;\n  uint8_t rx_ongoing, tx_limit;\n\n  ASSERT(id < HAL_I2C_ID_NUM, invalid_id, id);\n\n  if (hal_i2c_sm[id].cfg.mode != HAL_I2C_API_MODE_SIMPLE) {\n    HAL_I2C_TRACE(0, \"mst_read: not simple mode\");\n    return HAL_I2C_ERRCODE_INV_PARAM;\n  }\n\n  HAL_I2C_TRACE(7, \"%s:id=%d addr=0x%02X buf=0x%X len=%d res=%d sto=%d\",\n                __func__, id, dev_addr, (int)buf, len, restart, stop);\n\n  reg_base = _i2c_get_base(id);\n\n  // update TAR\n  tar = i2cip_r_target_address_reg(reg_base);\n  if (tar != dev_addr) {\n    timeout = MS_TO_TICKS(HAL_I2C_WAIT_ACT_MS);\n    start_time = hal_sys_timer_get();\n    while ((i2cip_r_status(reg_base) & I2CIP_STATUS_ACT_MASK)) {\n      if (hal_sys_timer_get() - start_time >= timeout) {\n        HAL_I2C_TRACE(1, \"%s:wait bus idle timeout\", __func__);\n        ret = HAL_I2C_ERRCODE_ACT_TIMEOUT;\n        goto exit;\n      }\n      if (yield) {\n        hal_i2c_delay_ms(HAL_I2C_DLY_MS);\n      }\n    }\n\n    i2cip_w_enable(reg_base, HAL_I2C_NO);\n    i2cip_w_target_address(reg_base, dev_addr);\n    i2cip_w_enable(reg_base, HAL_I2C_YES);\n    HAL_I2C_TRACE(3, \"%s:update tar to 0x%02X from 0x%02X\", __func__, dev_addr,\n                  tar);\n  }\n\n  // clear fifo by reading\n  j = i2cip_r_rx_fifo_level(reg_base);\n  if (j) {\n    for (i = 0; i < j; i++) {\n      tmp = i2cip_r_cmd_data(reg_base);\n      HAL_I2C_TRACE(2, \"%s:discard data 0x%02X\", __func__, tmp);\n    }\n  }\n\n  // check error\n  if (_i2c_check_raw_int_status(reg_base,\n                                I2CIP_RAW_INT_STATUS_TX_ABRT_MASK |\n                                    I2CIP_RAW_INT_STATUS_TX_OVER_MASK |\n                                    I2CIP_RAW_INT_STATUS_RX_OVER_MASK |\n                                    I2CIP_RAW_INT_STATUS_RX_UNDER_MASK)) {\n    i2cip_r_clr_all_intr(reg_base);\n    i2c_clear_special_tx_abrt(reg_base);\n    HAL_I2C_TRACE(1, \"clear error status done before xfer, status=0x%X\",\n                  i2cip_r_raw_int_status(reg_base));\n  }\n\n  // read data\n  timeout = MS_TO_TICKS(HAL_I2C_WAIT_RFNE_MS);\n  start_time = hal_sys_timer_get();\n  wrcnt = 0;\n  rdcnt = 0;\n  while (rdcnt < len) {\n    // send reading cmd\n    rx_ongoing =\n        i2cip_r_tx_fifo_level(reg_base) + i2cip_r_rx_fifo_level(reg_base) + 1;\n    if (rx_ongoing < I2CIP_RX_FIFO_DEPTH) {\n      tx_limit = I2CIP_RX_FIFO_DEPTH - rx_ongoing;\n    } else {\n      tx_limit = 0;\n    }\n\n    for (i = 0; i < tx_limit && wrcnt < len; i++, wrcnt++) {\n      if (!(i2cip_r_status(reg_base) & I2CIP_STATUS_TFNF_MASK)) {\n        break;\n      }\n      if (wrcnt == 0) {\n        res = restart ? I2CIP_CMD_DATA_RESTART_MASK : 0;\n      } else {\n        res = 0;\n      }\n      if (wrcnt == len - 1) {\n        sto = stop ? I2CIP_CMD_DATA_STOP_MASK : 0;\n      } else {\n        sto = 0;\n      }\n\n      i2cip_w_cmd_data(reg_base, I2CIP_CMD_DATA_CMD_READ_MASK | res | sto);\n      HAL_I2C_TRACE(3, \"send read cmd: [%u] res=0x%X, sto=0x%X\", wrcnt, res,\n                    sto);\n    }\n\n    if (i2cip_r_status(reg_base) & I2CIP_STATUS_RFNE_MASK) {\n      tmp = i2cip_r_cmd_data(reg_base);\n      HAL_I2C_TRACE(2, \"i2c recv [%u] 0x%02X\", rdcnt, tmp);\n      if (buf) {\n        buf[rdcnt++] = tmp;\n      }\n      start_time = hal_sys_timer_get();\n    } else {\n      if (hal_sys_timer_get() - start_time >= timeout) {\n        HAL_I2C_TRACE(1, \"%s:wait rfne timeout\", __func__);\n        ret = HAL_I2C_ERRCODE_RFNE_TIMEOUT;\n        goto exit;\n      }\n      if (yield) {\n        hal_i2c_delay_ms(HAL_I2C_DLY_MS);\n      }\n    }\n  }\n\n  if (act_read)\n    *act_read = rdcnt;\n\n  if (stop) {\n    timeout = MS_TO_TICKS(HAL_I2C_WAIT_ACT_MS);\n    start_time = hal_sys_timer_get();\n    while (i2cip_r_status(reg_base) & I2CIP_STATUS_ACT_MASK) {\n      if (hal_sys_timer_get() - start_time >= timeout) {\n        HAL_I2C_TRACE(1, \"%s:wait act timeout\", __func__);\n        ret = HAL_I2C_ERRCODE_ACT_TIMEOUT;\n        goto exit;\n      }\n      if (yield) {\n        hal_i2c_delay_ms(HAL_I2C_DLY_MS);\n      }\n    }\n  }\n\n  HAL_I2C_TRACE(1, \"%s:done\", __func__);\n  return 0;\nexit:\n  HAL_I2C_TRACE(3, \"%s:error=0x%X, status=0x%X\", __func__, ret,\n                i2cip_r_raw_int_status(reg_base));\n  return ret;\n}\n\nuint32_t hal_i2c_simple_send(enum HAL_I2C_ID_T id, uint16_t device_addr,\n                             const uint8_t *tx_buf, uint16_t tx_len) {\n  return hal_i2c_mst_write(id, device_addr, tx_buf, tx_len, NULL, true, true,\n                           false);\n}\n\nuint32_t hal_i2c_simple_recv(enum HAL_I2C_ID_T id, uint16_t device_addr,\n                             const uint8_t *tx_buf, uint16_t tx_len,\n                             uint8_t *rx_buf, uint16_t rx_len) {\n  int ret;\n\n  ret = hal_i2c_mst_write(id, device_addr, tx_buf, tx_len, NULL, true, false,\n                          false);\n  if (ret) {\n    HAL_I2C_TRACE(2, \"%s: mst_write failed: ret=%d\", __func__, ret);\n    return ret;\n  }\n\n  return hal_i2c_mst_read(id, device_addr, rx_buf, rx_len, NULL, true, true,\n                          false);\n}\n\nuint32_t hal_i2c_set_interrupt_handler(enum HAL_I2C_ID_T id,\n                                       HAL_I2C_INT_HANDLER_T handler) {\n  hal_i2c_int_handlers[id] = handler;\n  return 0;\n}\n#endif\n/* simple mode end */\n\n/* sensor engine mode */\n#ifdef I2C_SENSOR_ENGINE\nstatic void hal_i2c_sensor_eng_proc(enum HAL_I2C_ID_T id) {\n  HAL_I2C_TRACE(2, \"%s: id=%d\", __func__, id);\n\n  uint32_t reg_base = _i2c_get_base(id);\n  uint32_t irq_status = i2cip_r_int_status(reg_base);\n  uint32_t POSSIBLY_UNUSED irq_raw_status = i2cip_r_raw_int_status(reg_base);\n  uint32_t abt_source = i2cip_r_tx_abrt_source(reg_base);\n  enum HAL_I2C_SM_TASK_STATE_T task_state;\n\n  task_state = _i2c_chk_clr_task_error(reg_base, irq_status, abt_source);\n\n  HAL_I2C_TRACE(5, \"%s: id=%d irq=0x%X/0x%X abt=0x%X\", __func__, id, irq_status,\n                irq_raw_status, abt_source);\n  _i2c_show_error_code(abt_source);\n\n  if (task_state &\n      (HAL_I2C_SM_TASK_STATE_TX_ABRT | HAL_I2C_SM_TASK_STATE_FIFO_ERR)) {\n    HAL_I2C_ERROR(\n        6, \"*** Error:%s: id=%d task_state=0x%X irq=0x%X/0x%X abt=0x%X\",\n        __func__, id, task_state, irq_status, irq_raw_status, abt_source);\n    hal_i2c_sensor_engine_stop(i2c_sensor_id[id]);\n  }\n}\n\nstatic void _sensor_irq_handler(enum HAL_SENSOR_ENGINE_ID_T id,\n                                enum HAL_SENSOR_ENGINE_DEVICE_T device,\n                                const uint8_t *buf, uint32_t len) {\n  enum HAL_I2C_ID_T i2c_id;\n\n  i2c_id = HAL_I2C_ID_0 + (device - HAL_SENSOR_ENGINE_DEVICE_I2C0);\n  ASSERT(i2c_id < HAL_I2C_ID_NUM, invalid_id, i2c_id);\n\n  if (i2c_sensor_handler[i2c_id]) {\n    i2c_sensor_handler[i2c_id](i2c_id, buf, len);\n  }\n}\n\nuint32_t\nhal_i2c_sensor_engine_start(enum HAL_I2C_ID_T id,\n                            const struct HAL_I2C_SENSOR_ENGINE_CONFIG_T *cfg) {\n  enum HAL_I2C_SM_TASK_ACTION_T action;\n  const struct HAL_I2C_SM_TASK_T *out_task;\n  struct HAL_SENSOR_ENGINE_CFG_T sensor_cfg;\n  uint32_t reg_base;\n\n  HAL_I2C_ERROR(2, \"%s: id=%d\", __func__, id);\n  ASSERT(id < HAL_I2C_ID_NUM, invalid_id, id);\n\n  if (hal_i2c_sm[id].cfg.mode != HAL_I2C_API_MODE_SENSOR_ENGINE) {\n    HAL_I2C_TRACE(1, \"i2c-se start: not sensor engine mode: %d\",\n                  hal_i2c_sm[id].cfg.mode);\n    return HAL_I2C_ERRCODE_INV_PARAM;\n  }\n  if (hal_i2c_sm[id].state != HAL_I2C_SM_IDLE) {\n    HAL_I2C_TRACE(1, \"i2c-se start: not idle: %d\", hal_i2c_sm[id].state);\n    return HAL_I2C_ERRCODE_INV_PARAM;\n  }\n\n  reg_base = _i2c_get_base(id);\n  action = HAL_I2C_SM_TASK_ACTION_M_RECV;\n\n  hal_i2c_sm[id].state = HAL_I2C_SM_RUNNING;\n\n  hal_i2c_sm_commit(id, cfg->write_buf, cfg->write_txn_len, cfg->read_buf,\n                    cfg->read_txn_len, cfg->txn_cnt, cfg->target_addr, action,\n                    0, NULL);\n\n  out_task = &(hal_i2c_sm[id].task[hal_i2c_sm[id].out_task]);\n  hal_i2c_dma_config(id, out_task);\n\n  i2c_sensor_id[id] = cfg->id;\n  i2c_sensor_handler[id] = cfg->handler;\n\n  memset(&sensor_cfg, 0, sizeof(sensor_cfg));\n  sensor_cfg.id = cfg->id;\n  sensor_cfg.device = (id == HAL_I2C_ID_0) ? HAL_SENSOR_ENGINE_DEVICE_I2C0\n                                           : HAL_SENSOR_ENGINE_DEVICE_I2C1;\n  sensor_cfg.trigger_type = cfg->trigger_type;\n  sensor_cfg.trigger_gpio = cfg->trigger_gpio;\n  sensor_cfg.period_us = cfg->period_us;\n  sensor_cfg.device_address = cfg->target_addr;\n  sensor_cfg.tx_dma_cfg = &hal_i2c_sm[id].tx_dma_cfg;\n  sensor_cfg.rx_dma_cfg = &hal_i2c_sm[id].rx_dma_cfg;\n  sensor_cfg.rx_burst_len = cfg->read_txn_len * cfg->txn_cnt;\n  sensor_cfg.rx_burst_cnt = cfg->read_burst_cnt;\n  sensor_cfg.handler = _sensor_irq_handler;\n  ;\n#ifdef I2C_VAD\n  sensor_cfg.data_to_vad = 1;\n  i2cip_w_data_to_vad(reg_base, HAL_I2C_YES);\n#endif\n\n  hal_sensor_engine_open(&sensor_cfg);\n\n  /* tx : quarter trigger TX EMPTY INT */\n  i2cip_w_tx_threshold(reg_base, HAL_I2C_TX_TL);\n  if (action == HAL_I2C_SM_TASK_ACTION_M_RECV) {\n    /* rx : three quarter trigger RX FULL INT */\n    i2cip_w_rx_threshold(reg_base, HAL_I2C_RX_TL);\n  }\n\n  i2cip_init_int_mask(reg_base, I2CIP_INT_MASK_ERROR_MASK);\n\n  i2cip_w_restart(reg_base, HAL_I2C_YES);\n  i2cip_w_target_address(reg_base, out_task->target_addr);\n\n  return 0;\n}\n\nuint32_t hal_i2c_sensor_engine_stop(enum HAL_I2C_ID_T id) {\n  uint32_t reg_base;\n  uint32_t irq_status;\n  uint32_t abt_source;\n\n  HAL_I2C_ERROR(2, \"%s: id=%d\", __func__, id);\n  ASSERT(id < HAL_I2C_ID_NUM, invalid_id, id);\n\n  if (hal_i2c_sm[id].cfg.mode != HAL_I2C_API_MODE_SENSOR_ENGINE) {\n    HAL_I2C_TRACE(1, \"i2c-se stop: not sensor engine mode: %d\",\n                  hal_i2c_sm[id].cfg.mode);\n    return HAL_I2C_ERRCODE_INV_PARAM;\n  }\n  if (hal_i2c_sm[id].state != HAL_I2C_SM_RUNNING) {\n    HAL_I2C_TRACE(1, \"i2c-se stop: not running: %d\", hal_i2c_sm[id].state);\n    return HAL_I2C_ERRCODE_INV_PARAM;\n  }\n\n  hal_sensor_engine_close(i2c_sensor_id[id]);\n\n  hal_i2c_dma_release(id);\n\n  reg_base = _i2c_get_base(id);\n\n  HAL_I2C_TRACE(0, \"disable i2c\");\n  i2cip_w_enable(reg_base, HAL_I2C_NO);\n\n  irq_status = i2cip_r_int_status(reg_base);\n  abt_source = i2cip_r_tx_abrt_source(reg_base);\n  _i2c_chk_clr_task_error(reg_base, irq_status, abt_source);\n\n#ifdef I2C_VAD\n  i2cip_w_data_to_vad(reg_base, HAL_I2C_NO);\n#endif\n\n  hal_i2c_sm_done(id);\n\n  return 0;\n}\n#endif\n/* sensor engine mode end */\n\n/* gpio iic mode */\n#include \"hal_gpio.h\"\n\nstatic uint8_t g_i2c_open = false;\n\n#define DURATION_INIT_1 600\n#define DURATION_INIT_2 600\n#define DURATION_INIT_3 600\n\n#define DURATION_START_1 600\n#define DURATION_START_2 600\n#define DURATION_START_3 600\n\n#define DURATION_STOP_1 800\n#define DURATION_STOP_2 600\n#define DURATION_STOP_3 1300\n\n#define DURATION_HIGH 900\n#define DURATION_LOW 600\n\n#define HAL_GPIO_I2C_DELAY(duration) hal_sys_timer_delay_ns(duration);\n\nstruct HAL_GPIO_I2C_CONFIG_T hal_gpio_i2c_cfg;\n\ninline void GPIO_InitIO(uint8_t port, uint8_t direction, uint8_t val_for_out) {\n  hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)port,\n                       (enum HAL_GPIO_DIR_T)direction, val_for_out);\n}\n\ninline void GPIO_WriteIO(uint8_t port, uint8_t data) {\n  if (data) {\n    hal_gpio_pin_set((enum HAL_GPIO_PIN_T)port);\n  } else {\n    hal_gpio_pin_clr((enum HAL_GPIO_PIN_T)port);\n  }\n}\ninline uint8_t GPIO_ReadIO(uint8_t port) {\n  uint8_t level = 0;\n  level = hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)port);\n  return level;\n}\n\n//\n//-------------------------------------------------------------------\n// Function:  gpio_i2c_init\n// Purpose:  This function is used to init I2C port of the  device\n// In:\n// Return:      bool\n//-------------------------------------------------------------------\n\nstatic int hal_gpio_i2c_initialize(const struct HAL_GPIO_I2C_CONFIG_T *cfg) {\n  struct HAL_IOMUX_PIN_FUNCTION_MAP hal_gpio_i2c_iomux_cfg[] = {\n      {HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n       HAL_IOMUX_PIN_PULLUP_ENABLE},\n      {HAL_IOMUX_PIN_NUM, HAL_IOMUX_FUNC_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n       HAL_IOMUX_PIN_PULLUP_ENABLE},\n  };\n\n  hal_gpio_i2c_cfg.scl = cfg->scl;\n  hal_gpio_i2c_cfg.sda = cfg->sda;\n  hal_gpio_i2c_iomux_cfg[0].pin = (enum HAL_IOMUX_PIN_T)hal_gpio_i2c_cfg.scl;\n  hal_gpio_i2c_iomux_cfg[1].pin = (enum HAL_IOMUX_PIN_T)hal_gpio_i2c_cfg.sda;\n  hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)hal_gpio_i2c_iomux_cfg,\n                 sizeof(hal_gpio_i2c_iomux_cfg) /\n                     sizeof(struct HAL_IOMUX_PIN_FUNCTION_MAP));\n\n  HAL_I2C_TRACE(2, \"hal_gpio_i2c_initialize scl=%d sda=%d\",\n                hal_gpio_i2c_cfg.scl, hal_gpio_i2c_cfg.sda);\n  // iTemp = hal_gpio_i2c_cfg.scl | hal_gpio_i2c_cfg.sda  ;\n  // Set the GPIO pin to output status\n  GPIO_InitIO(hal_gpio_i2c_cfg.scl, 1, 1);\n  GPIO_InitIO(hal_gpio_i2c_cfg.sda, 1, 1);\n  HAL_GPIO_I2C_DELAY(DURATION_INIT_1);\n\n  // Make the I2C bus in idle status\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 1);\n  HAL_GPIO_I2C_DELAY(DURATION_INIT_1);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.sda, 1);\n  HAL_GPIO_I2C_DELAY(DURATION_INIT_1);\n\n  for (byte i = 0; i < 30; i++) {\n    GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0); /* low */\n    HAL_GPIO_I2C_DELAY(DURATION_LOW);\n    GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 1);\n    HAL_GPIO_I2C_DELAY(DURATION_HIGH);\n  }\n\n  return 0;\n}\n\nstatic void hal_gpio_i2c_start(void) /* start or re-start */\n{\n  GPIO_InitIO(hal_gpio_i2c_cfg.sda, 1, 1);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.sda, 1);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 1);\n\n  HAL_GPIO_I2C_DELAY(DURATION_START_1);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.sda, 0);\n  HAL_GPIO_I2C_DELAY(DURATION_START_2);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0);\n  HAL_GPIO_I2C_DELAY(DURATION_START_3); /* start condition */\n}\n\nstatic void hal_gpio_i2c_stop(void) {\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0);\n  HAL_GPIO_I2C_DELAY(DURATION_LOW);\n  GPIO_InitIO(hal_gpio_i2c_cfg.sda, 1, 0);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.sda, 0);\n  HAL_GPIO_I2C_DELAY(DURATION_STOP_1);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 1);\n  HAL_GPIO_I2C_DELAY(DURATION_STOP_2);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.sda, 1); /* stop condition */\n  HAL_GPIO_I2C_DELAY(DURATION_STOP_3);\n}\n\nstatic uint8_t hal_gpio_i2c_txbyte(uint8_t data) /* return 0 --> ack */\n{\n  int i;\n  uint8_t temp_value = 0;\n  for (i = 7; (i >= 0) && (i <= 7); i--) {\n    GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0); /* low */\n    HAL_GPIO_I2C_DELAY(DURATION_LOW);\n    if (i == 7)\n      GPIO_InitIO(hal_gpio_i2c_cfg.sda, 1, 0);\n    HAL_GPIO_I2C_DELAY(DURATION_LOW);\n\n    GPIO_WriteIO(hal_gpio_i2c_cfg.sda, ((data >> i) & 0x01));\n    HAL_GPIO_I2C_DELAY(DURATION_LOW / 2);\n    GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 1); /* high */\n    HAL_GPIO_I2C_DELAY(DURATION_HIGH);\n  }\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0); /* low */\n  HAL_GPIO_I2C_DELAY(DURATION_LOW);\n  GPIO_InitIO(hal_gpio_i2c_cfg.sda, 0, 1); /* input  */\n  HAL_GPIO_I2C_DELAY(DURATION_LOW / 2);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 1); /* high */\n  HAL_GPIO_I2C_DELAY(DURATION_HIGH);\n  temp_value = GPIO_ReadIO(hal_gpio_i2c_cfg.sda);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0); /* low */\n  HAL_GPIO_I2C_DELAY(DURATION_LOW);\n  return temp_value;\n}\n\nstatic void hal_gpio_i2c_rxbyte(uint8_t *data, uint8_t ack) {\n  int i;\n  uint32_t dataCache;\n\n  dataCache = 0;\n  for (i = 7; (i >= 0) && (i <= 7); i--) {\n    GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0);\n    HAL_GPIO_I2C_DELAY(DURATION_LOW);\n    if (i == 7)\n      GPIO_InitIO(hal_gpio_i2c_cfg.sda, 0, 1);\n    HAL_GPIO_I2C_DELAY(DURATION_LOW);\n    GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 1);\n    HAL_GPIO_I2C_DELAY(DURATION_HIGH);\n    dataCache |= (GPIO_ReadIO(hal_gpio_i2c_cfg.sda) << i);\n    HAL_GPIO_I2C_DELAY(DURATION_LOW / 2);\n  }\n\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0);\n  HAL_GPIO_I2C_DELAY(DURATION_LOW);\n  GPIO_InitIO(hal_gpio_i2c_cfg.sda, 1, 1);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.sda, ack);\n  HAL_GPIO_I2C_DELAY(DURATION_LOW / 2);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 1);\n  HAL_GPIO_I2C_DELAY(DURATION_HIGH);\n  GPIO_WriteIO(hal_gpio_i2c_cfg.scl, 0); /* low */\n  HAL_GPIO_I2C_DELAY(DURATION_LOW);\n  *data = (uint8_t)dataCache;\n}\n\nuint32_t hal_gpio_i2c_simple_send(uint32_t device_addr, const uint8_t *tx_buf,\n                                  uint16_t tx_len) {\n  uint32_t i;\n\n  hal_gpio_i2c_start();\n  if (device_addr & HAL_I2C_10BITADDR_MASK) {\n    hal_gpio_i2c_txbyte(0xF0 | ((device_addr & 0x200) >> 7));\n    hal_gpio_i2c_txbyte(device_addr & 0xFF);\n  } else {\n    hal_gpio_i2c_txbyte((device_addr & 0x7F) << 1);\n  }\n  for (i = 0; i < tx_len; i++, tx_buf++) {\n    hal_gpio_i2c_txbyte(*tx_buf);\n  }\n  hal_gpio_i2c_stop();\n\n  return 0;\n}\n\nuint32_t hal_gpio_i2c_simple_recv(uint32_t device_addr, const uint8_t *tx_buf,\n                                  uint16_t tx_len, uint8_t *rx_buf,\n                                  uint16_t rx_len) {\n  uint8_t tempdata;\n  uint32_t i;\n\n  if (tx_len) {\n    hal_gpio_i2c_start();\n    if (device_addr & HAL_I2C_10BITADDR_MASK) {\n      hal_gpio_i2c_txbyte(((device_addr & 0x200) >> 7) | 0xF0);\n      hal_gpio_i2c_txbyte(device_addr & 0xFF);\n    } else {\n      hal_gpio_i2c_txbyte((device_addr & 0x7F) << 1);\n    }\n    for (i = 0; i < tx_len; i++, tx_buf++) {\n      hal_gpio_i2c_txbyte(*tx_buf);\n    }\n  }\n\n  hal_gpio_i2c_start();\n  if (device_addr & HAL_I2C_10BITADDR_MASK) {\n    hal_gpio_i2c_txbyte(((device_addr & 0x200) >> 7) | 0xF1);\n  } else {\n    hal_gpio_i2c_txbyte(((device_addr & 0x7F) << 1) | 1);\n  }\n  for (i = 0; i < rx_len; i++, rx_buf++) {\n    hal_gpio_i2c_rxbyte(&tempdata, (i == rx_len - 1));\n    *rx_buf = tempdata;\n  }\n  hal_gpio_i2c_stop();\n\n  return 0;\n}\n\n#define touch_ic_device_addr 0x60\nunsigned char I2C_WriteByte(unsigned char reg, unsigned char data) {\n  unsigned char result;\n  unsigned char buff[2];\n\n  buff[0] = reg;\n  buff[1] = data;\n\n  result =\n      hal_gpio_i2c_simple_send((unsigned char)touch_ic_device_addr, buff, 2);\n  return result;\n}\n\nunsigned char I2C_ReadByte(unsigned char reg, unsigned char *data) {\n  unsigned char result;\n\n  result = hal_gpio_i2c_simple_recv((unsigned char)touch_ic_device_addr, ®,\n                                    1, data, 1);\n\n  return result;\n}\n\nint hal_gpio_i2c_open(const struct HAL_GPIO_I2C_CONFIG_T *cfg) {\n  static bool i2cInitDone = false;\n  int lock;\n\n  if (g_i2c_open == true) {\n    return -1;\n  }\n  lock = int_lock();\n  g_i2c_open = 0;\n  int_unlock(lock);\n\n  if (!i2cInitDone) {\n    hal_gpio_i2c_initialize(cfg);\n    i2cInitDone = 0;\n  }\n\n  return 0;\n}\n\nint hal_gpio_i2c_close(void) {\n  int lock;\n\n  if (g_i2c_open == false) {\n    return false;\n  }\n\n  lock = int_lock();\n  g_i2c_open = false;\n  int_unlock(lock);\n\n  return 0;\n}\n\nuint32_t hal_gpio_i2c_send(uint32_t device_addr, const uint8_t *buf,\n                           uint32_t reg_len, uint32_t value_len) {\n  return hal_gpio_i2c_simple_send(device_addr, buf, reg_len + value_len);\n}\n\nuint32_t hal_gpio_i2c_recv(uint32_t device_addr, uint8_t *buf, uint32_t reg_len,\n                           uint32_t value_len, uint8_t restart_after_write) {\n  return hal_gpio_i2c_simple_recv(device_addr, buf, reg_len, buf + reg_len,\n                                  value_len);\n}\n/* gpio iic end */\n\nint app_i2c_demo_init(void) {\n  static struct HAL_GPIO_I2C_CONFIG_T i2c_cfg = {\n      HAL_GPIO_PIN_P2_0,\n      HAL_GPIO_PIN_P2_1,\n      0,\n  };\n  hal_gpio_i2c_open(&i2c_cfg);\n\n  return 0;\n}\n"
  },
  {
    "path": "platform/hal/hal_i2c.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_I2C_H__\n#define __HAL_I2C_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_gpio.h\"\n#include \"hal_sensor_eng.h\"\n\n// For 10-bit address devices: OR the following mask with the real address\n#define HAL_I2C_10BITADDR_MASK              (1 << 15)\n\nenum HAL_I2C_ACTION_AFTER_WRITE_T {\n    HAL_I2C_STOP_AFTER_WRITE = 0,\n    HAL_I2C_RESTART_AFTER_WRITE,\n};\n\nenum HAL_I2C_ID_T {\n    HAL_I2C_ID_0 = 0,\n#if (CHIP_HAS_I2C > 1)\n    HAL_I2C_ID_1,\n#endif\n\n    HAL_I2C_ID_NUM,\n};\n\nenum HAL_I2C_API_MODE_T {\n    HAL_I2C_API_MODE_TASK = 0,\n    HAL_I2C_API_MODE_SIMPLE,\n    HAL_I2C_API_MODE_SENSOR_ENGINE,\n};\n\nenum HAL_I2C_INT_STATUS_T {\n    HAL_I2C_INT_STATUS_GEN_CALL_MASK = 0x1<<11,\n    HAL_I2C_INT_STATUS_START_DET_MASK = 0x1<<10,\n    HAL_I2C_INT_STATUS_STOP_DET_MASK = 0x1<<9,\n    HAL_I2C_INT_STATUS_ACTIVITY_MASK = 0x1<<8,\n    HAL_I2C_INT_STATUS_RX_DONE_MASK = 0x1<<7,\n    HAL_I2C_INT_STATUS_TX_ABRT_MASK = 0x1<<6,\n    HAL_I2C_INT_STATUS_RD_REQ_MASK = 0x1<<5,\n    HAL_I2C_INT_STATUS_TX_EMPTY_MASK = 0x1<<4,\n    HAL_I2C_INT_STATUS_TX_OVER_MASK = 0x1<<3,\n    HAL_I2C_INT_STATUS_RX_FULL_MASK = 0x1<<2,\n    HAL_I2C_INT_STATUS_RX_OVER_MASK = 0x1<<1,\n    HAL_I2C_INT_STATUS_RX_UNDER_MASK = 0x1<<0,\n    /* FIXME : same as i2cip definitions\n    #define I2CIP_INT_STATUS_GEN_CALL_SHIFT (11)\n    #define I2CIP_INT_STATUS_START_DET_SHIFT (10)\n    #define I2CIP_INT_STATUS_STOP_DET_SHIFT (9)\n    #define I2CIP_INT_STATUS_ACTIVITY_SHIFT (8)\n    #define I2CIP_INT_STATUS_RX_DONE_SHIFT  (7)\n    #define I2CIP_INT_STATUS_TX_ABRT_SHIFT (6)\n    #define I2CIP_INT_STATUS_RD_REQ_SHIFT (5)\n    #define I2CIP_INT_STATUS_TX_EMPTY_SHIFT (4)\n    #define I2CIP_INT_STATUS_TX_OVER_SHIFT (3)\n    #define I2CIP_INT_STATUS_RX_FULL_SHIFT (2)\n    #define I2CIP_INT_STATUS_RX_OVER_SHIFT (1)\n    #define I2CIP_INT_STATUS_RX_UNDER_SHIFT (0)\n     */\n};\n\nenum HAL_I2C_ERRCODE_T {\n    HAL_I2C_ERRCODE_SLVRD_INTX      = 1<<15,\n    HAL_I2C_ERRCODE_SLV_ARBLOST     = 1<<14,\n    HAL_I2C_ERRCODE_SLVFLUSH_TXFIFO = 1<<13,\n    HAL_I2C_ERRCODE_ARB_LOST        = 1<<12,\n    HAL_I2C_ERRCODE_MASTER_DIS      = 1<<11,\n    HAL_I2C_ERRCODE_10B_RD_NORSTRT  = 1<<10,\n    HAL_I2C_ERRCODE_SBYTE_NORSTRT   = 1<<9,\n    HAL_I2C_ERRCODE_HS_NORSTRT      = 1<<8,\n    HAL_I2C_ERRCODE_SBYTE_ACKDET    = 1<<7,\n    HAL_I2C_ERRCODE_HS_ACKDET       = 1<<6,\n    HAL_I2C_ERRCODE_GCALL_READ      = 1<<5,\n    HAL_I2C_ERRCODE_GCALL_NOACK     = 1<<4,\n    HAL_I2C_ERRCODE_TXDATA_NOACK    = 1<<3,\n    HAL_I2C_ERRCODE_10ADDR2_NOACK   = 1<<2,\n    HAL_I2C_ERRCODE_10ADDR1_NOACK   = 1<<1,\n    HAL_I2C_ERRCODE_7B_ADDR_NOACK   = 1<<0,\n\n    HAL_I2C_ERRCODE_INV_PARAM       = 1<<31,\n    HAL_I2C_ERRCODE_IN_USE          = 1<<30,\n    HAL_I2C_ERRCODE_FIFO_ERR        = 1<<29,\n    HAL_I2C_ERRCODE_SYNC_TIMEOUT    = 1<<28,\n    HAL_I2C_ERRCODE_ACT_TIMEOUT     = 1<<27,\n    HAL_I2C_ERRCODE_TFNF_TIMEOUT    = 1<<26,\n    HAL_I2C_ERRCODE_TFE_TIMEOUT     = 1<<25,\n    HAL_I2C_ERRCODE_RFNE_TIMEOUT    = 1<<24,\n\n    /* FIXME : same as i2cip definitions\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_SLVRD_INTX_SHIFT (15)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_SLV_ARBLOST_SHIFT (14)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_SLVFLUSH_TXFIFO_SHIFT (13)\n    #define I2CIP_TX_ABRT_SOURCE_ARB_LOST_SHIFT (12)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_MASTER_DIS_SHIFT (11)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_10B_RD_NORSTRT_SHIFT (10)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_SBYTE_NORSTRT_SHIFT (9)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_HS_NORSTRT_SHIFT (8)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_SBYTE_ACKDET_SHIFT (7)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_HS_ACKDET_SHIFT (6)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_GCALL_READ_SHIFT (5)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_GCALL_NOACK_SHIFT (4)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_TXDATA_NOACK_SHIFT (3)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_10ADDR2_NOACK_SHIFT (2)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_10ADDR1_NOACK_SHIFT (1)\n    #define I2CIP_TX_ABRT_SOURCE_ABRT_7B_ADDR_NOACK_SHIFT (0)\n    */\n};\n\nstruct HAL_I2C_CONFIG_T {\n    /* mode\n     SIMPLE_MODE : pulling when reading or writing (always sync), or use dma external;master or slave;only enable slave related irq;\n     TASK_MODE : task to driven reading or writing (sync or async, dma or non-dma);only master\n     */\n    enum HAL_I2C_API_MODE_T mode;\n\n    uint8_t use_sync;\n    uint8_t use_dma;\n    uint8_t as_master;\n    uint32_t speed;\n    uint32_t addr_as_slave;\n};\n\ntypedef void (*HAL_I2C_SENSOR_ENG_HANDLER_T)(enum HAL_I2C_ID_T id, const uint8_t *buf, uint32_t len);\n\nstruct HAL_I2C_SENSOR_ENGINE_CONFIG_T {\n    enum HAL_SENSOR_ENGINE_ID_T id;\n    enum HAL_SENSOR_ENGINE_TRIGGER_T trigger_type;\n    enum HAL_GPIO_PIN_T trigger_gpio;\n    uint32_t period_us;\n    uint16_t target_addr;\n    uint8_t *write_buf;\n    uint16_t write_txn_len;\n    uint8_t *read_buf;\n    uint16_t read_txn_len;\n    uint16_t txn_cnt;\n    uint8_t read_burst_cnt;\n    HAL_I2C_SENSOR_ENG_HANDLER_T handler;\n};\n\nstruct HAL_GPIO_I2C_CONFIG_T {\n    enum HAL_GPIO_PIN_T scl;\n    enum HAL_GPIO_PIN_T sda;\n    uint32_t speed;\n};\n\nuint32_t hal_i2c_open(enum HAL_I2C_ID_T id, const struct HAL_I2C_CONFIG_T *cfg);\nuint32_t hal_i2c_close(enum HAL_I2C_ID_T id);\n\n/* for master task mode */\ntypedef void (*HAL_I2C_TRANSFER_HANDLER_T)(enum HAL_I2C_ID_T id, uint32_t transfer_id,\n                                            const uint8_t *tx_buf, uint32_t tx_len,\n                                            const uint8_t *rx_buf, uint32_t rx_len,\n                                            enum HAL_I2C_ERRCODE_T errcode);\nuint32_t hal_i2c_send(enum HAL_I2C_ID_T id, uint32_t device_addr, uint8_t *buf, uint32_t reg_len, uint32_t value_len,\n        uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);\nuint32_t hal_i2c_recv(enum HAL_I2C_ID_T id, uint32_t device_addr, uint8_t *buf, uint32_t reg_len, uint32_t value_len,\n        uint8_t restart_after_write, uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);\n// New I2C task mode APIs\nuint32_t hal_i2c_task_send(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_len,\n        uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);\nuint32_t hal_i2c_task_recv(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_len,\n        uint8_t *rx_buf, uint16_t rx_len,\n        uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);\nuint32_t hal_i2c_task_msend(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_item_len,\n        uint16_t item_cnt, uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);\nuint32_t hal_i2c_task_mrecv(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_item_len,\n        uint8_t *rx_buf, uint16_t rx_item_len, uint16_t item_cnt,\n        uint32_t transfer_id, HAL_I2C_TRANSFER_HANDLER_T handler);\n/* for master task mode end */\n\n/* for slave and simple master mode */\ntypedef void (*HAL_I2C_INT_HANDLER_T)(enum HAL_I2C_ID_T id, enum HAL_I2C_INT_STATUS_T status, uint32_t errocode);\nuint32_t hal_i2c_slv_write(enum HAL_I2C_ID_T id, uint8_t *buf, uint32_t buf_len, uint32_t *act_len);\nuint32_t hal_i2c_slv_read(enum HAL_I2C_ID_T id, uint8_t *buf, uint32_t buf_len, uint32_t *act_len);\nuint32_t hal_i2c_set_interrupt_handler(enum HAL_I2C_ID_T id, HAL_I2C_INT_HANDLER_T handler);\nuint32_t hal_i2c_mst_write(enum HAL_I2C_ID_T id, uint32_t device_addr, const uint8_t *buf, uint32_t buf_len, uint32_t *act_len, uint32_t restart, uint32_t stop, uint32_t yield);\nuint32_t hal_i2c_mst_read(enum HAL_I2C_ID_T id, uint32_t device_addr, uint8_t *buf, uint32_t buf_len, uint32_t *act_len, uint32_t restart, uint32_t stop, uint32_t yield);\n// New I2C simple mode APIs\nuint32_t hal_i2c_simple_send(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_len);\nuint32_t hal_i2c_simple_recv(enum HAL_I2C_ID_T id, uint16_t device_addr, const uint8_t *tx_buf, uint16_t tx_len, uint8_t *rx_buf, uint16_t rx_len);\n/* for slave and simple master mode end */\n\n/* sensor engine mode */\nuint32_t hal_i2c_sensor_engine_start(enum HAL_I2C_ID_T id, const struct HAL_I2C_SENSOR_ENGINE_CONFIG_T *cfg);\nuint32_t hal_i2c_sensor_engine_stop(enum HAL_I2C_ID_T id);\n/* sensor engine end */\n\nint hal_gpio_i2c_open(const struct HAL_GPIO_I2C_CONFIG_T *cfg);\nint hal_gpio_i2c_close(void);\nuint32_t hal_gpio_i2c_send(uint32_t device_addr, const uint8_t *buf, uint32_t reg_len, uint32_t value_len);\nuint32_t hal_gpio_i2c_recv(uint32_t device_addr, uint8_t *buf, uint32_t reg_len, uint32_t value_len, uint8_t restart_after_write);\n// New GPIO I2C APIs\nuint32_t hal_gpio_i2c_simple_send(uint32_t device_addr, const uint8_t *tx_buf, uint16_t tx_len);\nuint32_t hal_gpio_i2c_simple_recv(uint32_t device_addr, const uint8_t *tx_buf, uint16_t tx_len, uint8_t *rx_buf, uint16_t rx_len);\n\n\nint app_i2c_demo_init(void);\nunsigned char I2C_WriteByte(unsigned char reg, unsigned char data);\nunsigned char I2C_ReadByte(unsigned char reg, unsigned char* data);\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __HAL_I2C_H__ */\n"
  },
  {
    "path": "platform/hal/hal_i2cip.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_I2CIP_H__\n#define __HAL_I2CIP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"reg_i2cip.h\"\n\n#define i2cip_read32(b,a) \\\n     (*(volatile uint32_t *)(b+a))\n\n#define i2cip_write32(v,b,a) \\\n     ((*(volatile uint32_t *)(b+a)) = v)\n\nstatic inline uint8_t i2cip_w_enable(uint32_t reg_base, uint8_t enable)\n{\n    uint32_t val = 0;\n    val = i2cip_read32(reg_base, I2CIP_ENABLE_REG_OFFSET);\n    if (enable)\n        val |= I2CIP_ENABLE_MASK;\n    else\n        val &= ~I2CIP_ENABLE_MASK;\n    i2cip_write32(val, reg_base, I2CIP_ENABLE_REG_OFFSET);\n    return 0;\n}\nstatic inline uint8_t i2cip_w_clear_ctrl(uint32_t reg_base)\n{\n    i2cip_write32(0, reg_base, I2CIP_CTRL_REG_OFFSET);\n    return 0;\n}\nstatic inline uint8_t i2cip_w_10bit_master(uint32_t reg_base, uint8_t enable)\n{\n    uint32_t val = 0;\n    val = i2cip_read32(reg_base, I2CIP_CTRL_REG_OFFSET);\n    if (enable)\n        val |= I2CIP_10BITADDR_MASTER_MASK;\n    else\n        val &= ~I2CIP_10BITADDR_MASTER_MASK;\n    i2cip_write32(val, reg_base, I2CIP_CTRL_REG_OFFSET);\n    return 0;\n}\nstatic inline uint8_t i2cip_r_ctrl_reg(uint32_t reg_base)\n{\n    return i2cip_read32(reg_base, I2CIP_CTRL_REG_OFFSET);\n}\nstatic inline uint8_t i2cip_w_10bit_slave(uint32_t reg_base, uint8_t enable)\n{\n    uint32_t val = 0;\n    val = i2cip_read32(reg_base, I2CIP_CTRL_REG_OFFSET);\n    if (enable)\n        val |= I2CIP_10BITADDR_SLAVE_MASK;\n    else\n        val &= ~I2CIP_10BITADDR_SLAVE_MASK;\n    i2cip_write32(val, reg_base, I2CIP_CTRL_REG_OFFSET);\n    return 0;\n}\nstatic inline uint8_t i2cip_w_restart(uint32_t reg_base, uint8_t restart)\n{\n    uint32_t val = 0;\n    val = i2cip_read32(reg_base, I2CIP_CTRL_REG_OFFSET);\n    if (restart)\n        val |= I2CIP_RESTART_ENABLE_MASK;\n    else\n        val &= ~I2CIP_RESTART_ENABLE_MASK;\n    i2cip_write32(val, reg_base, I2CIP_CTRL_REG_OFFSET);\n    return 0;\n}\nstatic inline uint8_t i2cip_w_speed(uint32_t reg_base, uint32_t speed)\n{\n    uint32_t val = 0;\n    val = i2cip_read32(reg_base, I2CIP_CTRL_REG_OFFSET);\n    val &= ~I2CIP_SPEED_MASK;\n    val |= speed;\n    i2cip_write32(val, reg_base, I2CIP_CTRL_REG_OFFSET);\n    return 0;\n}\nstatic inline uint8_t i2cip_w_standard_speed_hcnt(uint32_t reg_base, uint32_t hcnt)\n{\n    uint32_t val = 0;\n    val |= hcnt<= threshold\n#define HAL_I2S_RX_FIFO_TRIGGER_LEVEL (I2SIP_FIFO_DEPTH / 2)\n\n#define HAL_I2S_YES 1\n#define HAL_I2S_NO 0\n\n#ifdef CHIP_BEST1000\n#define I2S_CMU_DIV CODEC_PLL_DIV\n#define I2S_CHAN_NUM 1\n#else\n#define I2S_CMU_DIV CODEC_CMU_DIV\n#define I2S_CHAN_NUM 4\n#endif\n\n#ifndef I2S_MCLK_DIV\n#define I2S_MCLK_DIV 2\n#endif\n\nenum HAL_I2S_STATUS_T {\n  HAL_I2S_STATUS_NULL,\n  HAL_I2S_STATUS_OPENED,\n  HAL_I2S_STATUS_STARTED,\n};\n\nstruct I2S_SAMPLE_RATE_T {\n  enum AUD_SAMPRATE_T sample_rate;\n  uint32_t codec_freq;\n  uint8_t codec_div;\n  uint8_t cmu_div;\n};\n\nstruct HAL_I2S_MOD_NAME_T {\n  enum HAL_CMU_MOD_ID_T mod;\n  enum HAL_CMU_MOD_ID_T apb;\n};\n\nstatic const struct I2S_SAMPLE_RATE_T i2s_sample_rate[] = {\n    {AUD_SAMPRATE_8000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_16000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_32000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_44100, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_48000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_64000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_96000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_128000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_256000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_176400, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_192000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_352800, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_384000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_512000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_705600, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_768000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n    {AUD_SAMPRATE_1024000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, I2S_CMU_DIV},\n};\n\nstatic const char *const invalid_id = \"Invalid I2S ID: %d\\n\";\n// static const char * const invalid_ch = \"Invalid I2S CH: %d\\n\";\n\nstatic enum HAL_I2S_STATUS_T i2s_status[HAL_I2S_ID_QTY][AUD_STREAM_NUM];\nstatic enum HAL_I2S_MODE_T i2s_mode[HAL_I2S_ID_QTY];\nstatic bool i2s_dma[HAL_I2S_ID_QTY][AUD_STREAM_NUM];\nstatic bool sync_start[HAL_I2S_ID_QTY][AUD_STREAM_NUM];\n#ifdef CHIP_BEST2000\nstatic uint8_t i2s_rx_line_map[HAL_I2S_ID_QTY];\nSTATIC_ASSERT(sizeof(i2s_rx_line_map) * 8 >= I2S_CHAN_NUM,\n              \"i2s_rx_line_map size too small\");\n#endif\n\nstatic const struct HAL_I2S_MOD_NAME_T i2s_mod[HAL_I2S_ID_QTY] = {\n    {\n        .mod = HAL_CMU_MOD_O_I2S0,\n        .apb = HAL_CMU_MOD_P_I2S0,\n    },\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n    {\n        .mod = HAL_CMU_MOD_O_I2S1,\n        .apb = HAL_CMU_MOD_P_I2S1,\n    },\n#endif\n};\n\nstatic inline uint32_t _i2s_get_reg_base(enum HAL_I2S_ID_T id) {\n  ASSERT(id < HAL_I2S_ID_QTY, invalid_id, id);\n  switch (id) {\n  case HAL_I2S_ID_0:\n    return I2S0_BASE;\n    break;\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n  case HAL_I2S_ID_1:\n    return I2S1_BASE;\n    break;\n#endif\n  default:\n    break;\n  }\n  return 0;\n}\n\nstatic int hal_i2s_master_stream_closed(void) {\n  enum HAL_I2S_ID_T id;\n\n  for (id = HAL_I2S_ID_0; id < HAL_I2S_ID_QTY; id++) {\n    if (i2s_status[id][AUD_STREAM_PLAYBACK] != HAL_I2S_STATUS_NULL ||\n        i2s_status[id][AUD_STREAM_CAPTURE] != HAL_I2S_STATUS_NULL) {\n      if (i2s_mode[id] == HAL_I2S_MODE_MASTER) {\n        return false;\n      }\n    }\n  }\n\n  return true;\n}\n\nint hal_i2s_open(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream,\n                 enum HAL_I2S_MODE_T mode) {\n  uint32_t reg_base;\n\n  reg_base = _i2s_get_reg_base(id);\n\n  ASSERT(mode == HAL_I2S_MODE_MASTER || mode == HAL_I2S_MODE_SLAVE,\n         \"Invalid I2S mode for stream %d: %d\", stream, mode);\n  ASSERT(i2s_mode[id] == HAL_I2S_MODE_NULL || i2s_mode[id] == mode,\n         \"Incompatible I2S mode for stream %d: prev=%d cur=%d\", stream,\n         i2s_mode[id], mode);\n\n  if (i2s_status[id][stream] != HAL_I2S_STATUS_NULL) {\n    TRACE(2, \"Invalid I2S opening status for stream %d: %d\", stream,\n          i2s_status[id][stream]);\n    return 1;\n  }\n\n  if (i2s_status[id][AUD_STREAM_PLAYBACK] == HAL_I2S_STATUS_NULL &&\n      i2s_status[id][AUD_STREAM_CAPTURE] == HAL_I2S_STATUS_NULL) {\n    if (mode == HAL_I2S_MODE_MASTER) {\n#ifndef SIMU\n      if (hal_i2s_master_stream_closed()) {\n        analog_aud_pll_open(ANA_AUD_PLL_USER_I2S);\n      }\n#endif\n      hal_cmu_i2s_clock_enable(id);\n    }\n\n    if (id == HAL_I2S_ID_0) {\n      hal_iomux_set_i2s0();\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n    } else {\n      hal_iomux_set_i2s1();\n#endif\n    }\n\n    hal_cmu_clock_enable(i2s_mod[id].mod);\n    hal_cmu_clock_enable(i2s_mod[id].apb);\n    hal_cmu_reset_clear(i2s_mod[id].mod);\n    hal_cmu_reset_clear(i2s_mod[id].apb);\n    i2sip_w_enable_i2sip(reg_base, HAL_I2S_YES);\n\n    for (int i = 0; i < I2S_CHAN_NUM; i++) {\n      i2sip_w_enable_rx_channel(reg_base, i, HAL_I2S_NO);\n      i2sip_w_enable_tx_channel(reg_base, i, HAL_I2S_NO);\n      i2sip_w_rx_fifo_reset(reg_base, i);\n      i2sip_w_tx_fifo_reset(reg_base, i);\n    }\n\n#ifndef CHIP_BEST1000\n    if (mode == HAL_I2S_MODE_MASTER) {\n      i2sip_w_enable_slave_mode(reg_base, HAL_I2S_NO);\n    } else {\n      i2sip_w_enable_slave_mode(reg_base, HAL_I2S_YES);\n    }\n#endif\n\n    if (mode == HAL_I2S_MODE_MASTER) {\n      hal_cmu_i2s_set_master_mode(id);\n    } else {\n      hal_cmu_i2s_set_slave_mode(id);\n    }\n\n    i2s_mode[id] = mode;\n  }\n\n  i2s_dma[id][stream] = false;\n  i2s_status[id][stream] = HAL_I2S_STATUS_OPENED;\n\n  return 0;\n}\n\nint hal_i2s_close(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n\n  reg_base = _i2s_get_reg_base(id);\n\n  if (i2s_status[id][stream] != HAL_I2S_STATUS_OPENED) {\n    TRACE(2, \"Invalid I2S closing status for stream %d: %d\", stream,\n          i2s_status[id][stream]);\n    return 1;\n  }\n\n  i2s_status[id][stream] = HAL_I2S_STATUS_NULL;\n\n  if (i2s_status[id][AUD_STREAM_PLAYBACK] == HAL_I2S_STATUS_NULL &&\n      i2s_status[id][AUD_STREAM_CAPTURE] == HAL_I2S_STATUS_NULL) {\n    i2sip_w_enable_i2sip(reg_base, HAL_I2S_NO);\n    hal_cmu_reset_set(i2s_mod[id].apb);\n    hal_cmu_reset_set(i2s_mod[id].mod);\n    hal_cmu_clock_disable(i2s_mod[id].apb);\n    hal_cmu_clock_disable(i2s_mod[id].mod);\n\n    if (i2s_mode[id] == HAL_I2S_MODE_MASTER) {\n      hal_cmu_i2s_clock_disable(id);\n      if (hal_i2s_master_stream_closed()) {\n#if !defined(CHIP_BEST1000) && defined(I2S_MCLK_FROM_SPDIF)\n        hal_cmu_clock_out_disable();\n        hal_spdif_clock_out_disable(HAL_SPDIF_ID_0);\n#endif\n#ifndef SIMU\n        analog_aud_pll_close(ANA_AUD_PLL_USER_I2S);\n#endif\n      }\n    }\n\n    i2s_mode[id] = HAL_I2S_MODE_NULL;\n  }\n\n  return 0;\n}\n\n#ifdef AF_ADC_I2S_SYNC\nstatic bool _hal_i2s_enable_delay[HAL_I2S_ID_QTY];\n\nvoid hal_i2s_enable_delay(enum HAL_I2S_ID_T id) {\n  _hal_i2s_enable_delay[id] = true;\n}\n\nvoid hal_i2s_disable_delay(enum HAL_I2S_ID_T id) {\n  _hal_i2s_enable_delay[id] = false;\n}\n\nvoid hal_i2s_enable(enum HAL_I2S_ID_T id) {\n  i2sip_w_enable_clk_gen(_i2s_get_reg_base(id), HAL_I2S_YES);\n}\n#endif\n\nint hal_i2s_start_stream(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n  uint32_t lock;\n  bool xfer_en[AUD_STREAM_NUM];\n\n  reg_base = _i2s_get_reg_base(id);\n\n  if (i2s_status[id][stream] != HAL_I2S_STATUS_OPENED) {\n    TRACE(2, \"Invalid I2S starting status for stream %d: %d\", stream,\n          i2s_status[id][stream]);\n    return 1;\n  }\n\n  if (i2s_mode[id] == HAL_I2S_MODE_SLAVE && sync_start[id][stream]) {\n    xfer_en[stream] = false;\n    xfer_en[!stream] = false;\n  } else {\n    xfer_en[stream] = true;\n    if (i2s_mode[id] == HAL_I2S_MODE_SLAVE &&\n        i2s_status[id][!stream] == HAL_I2S_STATUS_STARTED &&\n        sync_start[id][!stream]) {\n      xfer_en[!stream] = true;\n    } else {\n      xfer_en[!stream] = false;\n    }\n  }\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    lock = int_lock();\n    i2sip_w_enable_tx_channel(reg_base, 0, HAL_I2S_YES);\n    if (xfer_en[stream]) {\n      i2sip_w_enable_tx_block(reg_base, HAL_I2S_YES);\n      if (i2s_dma[id][stream]) {\n        i2sip_w_enable_tx_dma(reg_base, HAL_I2S_YES);\n      }\n    }\n    if (xfer_en[!stream]) {\n      i2sip_w_enable_rx_block(reg_base, HAL_I2S_YES);\n    }\n    int_unlock(lock);\n    if (i2s_dma[id][stream] && i2s_mode[id] == HAL_I2S_MODE_MASTER) {\n      // Delay a little time for DMA to fill the TX FIFO before sending\n      // (enabling clk gen)\n      for (volatile int i = 0; i < 50; i++)\n        ;\n    }\n  } else {\n    if (i2s_dma[id][stream]) {\n      i2sip_w_enable_rx_dma(reg_base, HAL_I2S_YES);\n    }\n#ifdef CHIP_BEST2000\n    int i;\n    for (i = 0; i < I2S_CHAN_NUM; i++) {\n      if (i2s_rx_line_map[id] & (1 << i)) {\n        i2sip_w_enable_rx_channel(reg_base, i, HAL_I2S_YES);\n      }\n    }\n#else\n    i2sip_w_enable_rx_channel(reg_base, 0, HAL_I2S_YES);\n#endif\n    lock = int_lock();\n    if (xfer_en[stream]) {\n      i2sip_w_enable_rx_block(reg_base, HAL_I2S_YES);\n    }\n    if (xfer_en[!stream]) {\n      i2sip_w_enable_tx_block(reg_base, HAL_I2S_YES);\n      if (i2s_dma[id][!stream]) {\n        i2sip_w_enable_tx_dma(reg_base, HAL_I2S_YES);\n      }\n    }\n    int_unlock(lock);\n  }\n\n  if (i2s_mode[id] == HAL_I2S_MODE_MASTER && !sync_start[id][stream]) {\n    if (i2sip_r_clk_gen_enabled(reg_base) == 0) {\n      hal_cmu_i2s_clock_out_enable(id);\n#ifdef AF_ADC_I2S_SYNC\n      if (_hal_i2s_enable_delay[id]) {\n        _hal_i2s_enable_delay[id] = false;\n      } else {\n        hal_i2s_enable(id);\n      }\n#else\n      i2sip_w_enable_clk_gen(reg_base, HAL_I2S_YES);\n#endif\n    }\n  }\n\n  i2s_status[id][stream] = HAL_I2S_STATUS_STARTED;\n\n  return 0;\n}\n\nint hal_i2s_stop_stream(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n\n  reg_base = _i2s_get_reg_base(id);\n\n  if (i2s_status[id][stream] != HAL_I2S_STATUS_STARTED) {\n    TRACE(2, \"Invalid I2S stopping status for stream %d: %d\", stream,\n          i2s_status[id][stream]);\n    return 1;\n  }\n\n  i2s_status[id][stream] = HAL_I2S_STATUS_OPENED;\n\n  if (i2s_status[id][AUD_STREAM_PLAYBACK] != HAL_I2S_STATUS_STARTED &&\n      i2s_status[id][AUD_STREAM_CAPTURE] != HAL_I2S_STATUS_STARTED) {\n    if (i2s_mode[id] == HAL_I2S_MODE_MASTER) {\n      hal_cmu_i2s_clock_out_disable(id);\n      i2sip_w_enable_clk_gen(reg_base, HAL_I2S_NO);\n#ifdef AF_ADC_I2S_SYNC\n      _hal_i2s_enable_delay[id] = false;\n#endif\n    }\n  }\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    i2sip_w_enable_tx_block(reg_base, HAL_I2S_NO);\n    i2sip_w_enable_tx_channel(reg_base, 0, HAL_I2S_NO);\n    i2sip_w_enable_tx_dma(reg_base, HAL_I2S_NO);\n    i2sip_w_tx_fifo_reset(reg_base, 0);\n  } else {\n    i2sip_w_enable_rx_block(reg_base, HAL_I2S_NO);\n    i2sip_w_enable_rx_dma(reg_base, HAL_I2S_NO);\n#ifdef CHIP_BEST1000\n    i2sip_w_enable_rx_channel(reg_base, 0, HAL_I2S_NO);\n    i2sip_w_rx_fifo_reset(reg_base, 0);\n#else\n    int i;\n    for (i = 0; i < I2S_CHAN_NUM; i++) {\n      i2sip_w_enable_rx_channel(reg_base, i, HAL_I2S_NO);\n      i2sip_w_rx_fifo_reset(reg_base, i);\n    }\n#endif\n  }\n\n  return 0;\n}\n\nint hal_i2s_setup_stream(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream,\n                         const struct HAL_I2S_CONFIG_T *cfg) {\n  uint32_t reg_base;\n  uint32_t div = 0;\n  uint8_t cycles;\n  uint8_t resolution = 0, word_sclk = 0;\n  bool valid;\n  int POSSIBLY_UNUSED i;\n\n  reg_base = _i2s_get_reg_base(id);\n\n  if (i2s_status[id][stream] != HAL_I2S_STATUS_OPENED) {\n    TRACE(2, \"Invalid I2S setup status for stream %d: %d\", stream,\n          i2s_status[id][stream]);\n    return 1;\n  }\n\n  cycles = cfg->cycles;\n  if (cycles == 0) {\n    if (cfg->bits <= AUD_BITS_16) {\n      cycles = 16;\n    } else {\n      cycles = 32;\n    }\n  }\n  ASSERT(cycles >= cfg->bits, \"I2S cycles (%u) should >= bits (%u)\", cycles,\n         cfg->bits);\n\n  switch (cycles) {\n  case 16:\n    word_sclk = I2SIP_CLK_CFG_WSS_VAL_16CYCLE;\n    break;\n  case 24:\n    word_sclk = I2SIP_CLK_CFG_WSS_VAL_24CYCLE;\n    break;\n  case 32:\n    word_sclk = I2SIP_CLK_CFG_WSS_VAL_32CYCLE;\n    break;\n  default:\n    ASSERT(false, \"Bad I2S cycles (%u)\", cycles);\n    return 1;\n  }\n\n  switch (cfg->bits) {\n  case AUD_BITS_8:\n    resolution = I2SIP_CFG_WLEN_VAL_IGNORE;\n    break;\n  case AUD_BITS_12:\n    resolution = I2SIP_CFG_WLEN_VAL_12BIT;\n    break;\n  case AUD_BITS_16:\n    resolution = I2SIP_CFG_WLEN_VAL_16BIT;\n    break;\n  case AUD_BITS_20:\n    resolution = I2SIP_CFG_WLEN_VAL_20BIT;\n    break;\n  case AUD_BITS_24:\n    resolution = I2SIP_CFG_WLEN_VAL_24BIT;\n    break;\n  case AUD_BITS_32:\n    resolution = I2SIP_CFG_WLEN_VAL_32BIT;\n    break;\n  default:\n    ASSERT(false, \"Bad I2S bits (%u)\", cfg->bits);\n    return 1;\n  }\n\n  /* word clock width : how many sclk work sclk count*/\n  /* sclk gate in word clock : how many sclk gate : fixed no gate */\n  i2sip_w_clk_cfg_reg(reg_base, (word_sclk << I2SIP_CLK_CFG_WSS_SHIFT) |\n                                    (I2SIP_CLK_CFG_SCLK_GATE_VAL_NO_GATE\n                                     << I2SIP_CLK_CFG_SCLK_GATE_SHIFT));\n\n#ifdef CHIP_BEST2000\n  if (stream == AUD_STREAM_PLAYBACK) {\n    valid = (cfg->channel_num == AUD_CHANNEL_NUM_2);\n  } else {\n    valid = (cfg->channel_num == AUD_CHANNEL_NUM_2 ||\n             cfg->channel_num == AUD_CHANNEL_NUM_4 ||\n             cfg->channel_num == AUD_CHANNEL_NUM_6 ||\n             cfg->channel_num == AUD_CHANNEL_NUM_8);\n  }\n#else\n  valid = (cfg->channel_num == AUD_CHANNEL_NUM_2);\n#endif\n  ASSERT(valid, \"[%s] Stream %d Channel number(%d) error\", __func__, stream,\n         cfg->channel_num);\n\n  if (i2s_mode[id] == HAL_I2S_MODE_MASTER) {\n\n    uint32_t i2s_clock;\n    uint32_t bit_rate;\n\n    for (i = 0; i < ARRAY_SIZE(i2s_sample_rate); i++) {\n      if (i2s_sample_rate[i].sample_rate == cfg->sample_rate) {\n        break;\n      }\n    }\n    ASSERT(i < ARRAY_SIZE(i2s_sample_rate), \"%s: Invalid i2s sample rate: %d\",\n           __func__, cfg->sample_rate);\n\n    TRACE(3, \"[%s] stream=%d sample_rate=%d\", __func__, stream,\n          cfg->sample_rate);\n\n    ASSERT(i2s_sample_rate[i].codec_div / i2s_sample_rate[i].cmu_div *\n                   i2s_sample_rate[i].cmu_div ==\n               i2s_sample_rate[i].codec_div,\n           \"%s: Invalid codec div for rate %u: codec_div=%u cmu_div=%u\",\n           __func__, cfg->sample_rate, i2s_sample_rate[i].codec_div,\n           i2s_sample_rate[i].cmu_div);\n\n#ifndef SIMU\n    analog_aud_freq_pll_config(i2s_sample_rate[i].codec_freq,\n                               i2s_sample_rate[i].codec_div);\n#ifdef CHIP_BEST2000\n    analog_aud_pll_set_dig_div(i2s_sample_rate[i].codec_div /\n                               i2s_sample_rate[i].cmu_div);\n#endif\n#endif\n\n    i2s_clock = i2s_sample_rate[i].codec_freq * i2s_sample_rate[i].cmu_div;\n    bit_rate = i2s_sample_rate[i].sample_rate * AUD_CHANNEL_NUM_2 * cycles;\n    div = i2s_clock / bit_rate;\n\n    ASSERT(\n        i2s_clock == bit_rate * div,\n        \"%s: Bad stream cfg (bad cycles?): i2s_clock=%u bit_rate=%u cycles=%u\",\n        __func__, i2s_clock, bit_rate, cycles);\n\n#if !defined(CHIP_BEST1000) && defined(I2S_MCLK_FROM_SPDIF)\n#ifdef I2S_MCLK_PIN\n    hal_iomux_set_i2s_mclk();\n    hal_cmu_i2s_mclk_enable(HAL_CMU_I2S_MCLK_PLLSPDIF0);\n#else\n    hal_iomux_set_clock_out();\n    hal_cmu_clock_out_enable(HAL_CMU_CLOCK_OUT_MCU_SPDIF0);\n#endif\n    // By default MCLK is half of (CODEC_FREQ_24P576M or CODEC_FREQ_22P5792M)\n    hal_spdif_clock_out_enable(HAL_SPDIF_ID_0,\n                               i2s_sample_rate[i].cmu_div * I2S_MCLK_DIV);\n#endif\n\n    hal_cmu_i2s_set_div(id, div);\n  }\n\n  if ((stream == AUD_STREAM_PLAYBACK &&\n       i2s_status[id][AUD_STREAM_CAPTURE] == HAL_I2S_STATUS_NULL) ||\n      (stream == AUD_STREAM_CAPTURE &&\n       i2s_status[id][AUD_STREAM_PLAYBACK] == HAL_I2S_STATUS_NULL)) {\n    hal_cmu_reset_pulse(i2s_mod[id].mod);\n  }\n\n  i2s_dma[id][stream] = cfg->use_dma;\n  sync_start[id][stream] = cfg->sync_start;\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    /* resolution : valid bit width */\n    i2sip_w_tx_resolution(reg_base, 0, resolution);\n\n    /* fifo level to trigger empty interrupt or dma req */\n    i2sip_w_tx_fifo_threshold(reg_base, 0, HAL_I2S_TX_FIFO_TRIGGER_LEVEL);\n  } else {\n#ifdef CHIP_BEST2000\n    uint32_t ch;\n    uint32_t cnt = 0;\n\n    i2s_rx_line_map[id] = 0;\n\n    for (i = 0; i < I2S_CHAN_NUM; i++) {\n      ch = (cfg->channel_map >> (i * 2)) & 3;\n      ASSERT(ch == 0 || ch == 3, \"[%s] Stream %d Bad Chan Map 0x%04X\", __func__,\n             stream, cfg->channel_map);\n      if (ch == 3) {\n        i2s_rx_line_map[id] |= (1 << i);\n        cnt += 2;\n      }\n    }\n    ASSERT(cnt == cfg->channel_num,\n           \"[%s] Stream %d Unmatched Chan Num (%u) and Map (0x%04X)\", __func__,\n           stream, cfg->channel_num, cfg->channel_map);\n\n    if (cfg->chan_sep_buf) {\n      i2sip_w_rx_dma_blk_size(reg_base, HAL_I2S_RX_FIFO_TRIGGER_LEVEL);\n      i2sp_w_enable_rx_dma_block(reg_base, HAL_I2S_YES);\n    } else {\n      i2sp_w_enable_rx_dma_block(reg_base, HAL_I2S_NO);\n    }\n\n    for (i = 0; i < I2S_CHAN_NUM; i++) {\n      if (i2s_rx_line_map[id] & (1 << i)) {\n        i2sip_w_rx_resolution(reg_base, i, resolution);\n        i2sip_w_rx_fifo_threshold(reg_base, i, HAL_I2S_RX_FIFO_TRIGGER_LEVEL);\n      }\n    }\n#else\n    /* resolution : valid bit width */\n    i2sip_w_rx_resolution(reg_base, 0, resolution);\n\n    /* fifo level to trigger empty interrupt or dma req */\n    i2sip_w_rx_fifo_threshold(reg_base, 0, HAL_I2S_RX_FIFO_TRIGGER_LEVEL);\n#endif\n  }\n\n  return 0;\n}\n\nint hal_i2s_send(enum HAL_I2S_ID_T id, const uint8_t *value,\n                 uint32_t value_len) {\n  uint32_t i = 0;\n  uint32_t reg_base;\n\n  reg_base = _i2s_get_reg_base(id);\n\n  for (i = 0; i < value_len; i += 4) {\n    while (!(i2sip_r_int_status(reg_base, 0) &\n             I2SIP_INT_STATUS_TX_FIFO_EMPTY_MASK))\n      ;\n\n    i2sip_w_tx_left_fifo(reg_base, 0, value[i + 1] << 8 | value[i]);\n    i2sip_w_tx_right_fifo(reg_base, 0, value[i + 3] << 8 | value[i + 2]);\n  }\n\n  return 0;\n}\nuint8_t hal_i2s_recv(enum HAL_I2S_ID_T id, uint8_t *value, uint32_t value_len) {\n  // uint32_t reg_base;\n\n  // reg_base = _i2s_get_reg_base(id);\n\n  return 0;\n}\n\n//================================================================================\n// I2S Packet Mode\n//================================================================================\n\nstatic bool i2s_pkt_opened = false;\n\nint hal_i2s_packet_open(void) {\n  uint32_t reg_base;\n  uint8_t resolution = 0, word_sclk = 0;\n\n  if (i2s_pkt_opened) {\n    return 1;\n  }\n\n  word_sclk = I2SIP_CLK_CFG_WSS_VAL_32CYCLE;\n  resolution = I2SIP_CFG_WLEN_VAL_32BIT;\n\n  reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n\n  hal_iomux_set_i2s0();\n  hal_cmu_i2s_clock_enable(HAL_I2S_ID_0);\n  hal_cmu_clock_enable(i2s_mod[HAL_I2S_ID_0].mod);\n  hal_cmu_clock_enable(i2s_mod[HAL_I2S_ID_0].apb);\n  hal_cmu_reset_clear(i2s_mod[HAL_I2S_ID_0].mod);\n  hal_cmu_reset_clear(i2s_mod[HAL_I2S_ID_0].apb);\n  i2sip_w_enable_i2sip(reg_base, HAL_I2S_YES);\n\n  for (int i = 0; i < I2S_CHAN_NUM; i++) {\n    i2sip_w_enable_rx_channel(reg_base, i, HAL_I2S_NO);\n    i2sip_w_enable_tx_channel(reg_base, i, HAL_I2S_NO);\n  }\n\n  hal_cmu_i2s_set_slave_mode(HAL_I2S_ID_0);\n#ifndef CHIP_BEST1000\n  i2sip_w_enable_slave_mode(reg_base, HAL_I2S_YES);\n#endif\n\n  /* word clock width : how many sclk work sclk count*/\n  /* sclk gate in word clock : how many sclk gate : fixed no gate */\n  i2sip_w_clk_cfg_reg(reg_base, (word_sclk << I2SIP_CLK_CFG_WSS_SHIFT) |\n                                    (I2SIP_CLK_CFG_SCLK_GATE_VAL_NO_GATE\n                                     << I2SIP_CLK_CFG_SCLK_GATE_SHIFT));\n\n  i2sip_w_tx_resolution(reg_base, 0, resolution);\n  i2sip_w_tx_fifo_threshold(reg_base, 0, HAL_I2S_TX_FIFO_TRIGGER_LEVEL);\n  i2sip_w_rx_resolution(reg_base, 0, resolution);\n  i2sip_w_rx_fifo_threshold(reg_base, 0, HAL_I2S_RX_FIFO_TRIGGER_LEVEL);\n\n  i2s_pkt_opened = true;\n\n  return 0;\n}\n\nint hal_i2s_packet_close(void) {\n  uint32_t reg_base;\n\n  if (!i2s_pkt_opened) {\n    return 1;\n  }\n\n  reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n\n  i2sip_w_enable_i2sip(reg_base, HAL_I2S_NO);\n  hal_cmu_reset_set(i2s_mod[HAL_I2S_ID_0].apb);\n  hal_cmu_reset_set(i2s_mod[HAL_I2S_ID_0].mod);\n  hal_cmu_clock_disable(i2s_mod[HAL_I2S_ID_0].apb);\n  hal_cmu_clock_disable(i2s_mod[HAL_I2S_ID_0].mod);\n  hal_cmu_i2s_clock_disable(HAL_I2S_ID_0);\n\n  i2s_pkt_opened = false;\n\n  return 0;\n}\n\nint hal_i2s_start_transfer(void) {\n  uint32_t reg_base;\n\n  if (!i2s_pkt_opened) {\n    return 1;\n  }\n\n  hal_cmu_reset_pulse(i2s_mod[HAL_I2S_ID_0].mod);\n\n  reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n\n  i2sip_w_enable_tx_channel(reg_base, 0, HAL_I2S_YES);\n  i2sip_w_enable_tx_dma(reg_base, HAL_I2S_YES);\n  i2sip_w_enable_tx_block(reg_base, HAL_I2S_YES);\n\n  i2sip_w_enable_rx_channel(reg_base, 0, HAL_I2S_YES);\n  i2sip_w_enable_rx_dma(reg_base, HAL_I2S_YES);\n  i2sip_w_enable_rx_block(reg_base, HAL_I2S_YES);\n\n  return 0;\n}\n\nint hal_i2s_stop_transfer(void) {\n  uint32_t reg_base;\n\n  if (!i2s_pkt_opened) {\n    return 1;\n  }\n\n  reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n\n  i2sip_w_enable_tx_block(reg_base, HAL_I2S_NO);\n  i2sip_w_enable_tx_channel(reg_base, 0, HAL_I2S_NO);\n  i2sip_w_enable_tx_dma(reg_base, HAL_I2S_NO);\n  i2sip_w_tx_fifo_reset(reg_base, 0);\n\n  i2sip_w_enable_rx_block(reg_base, HAL_I2S_NO);\n  i2sip_w_enable_rx_channel(reg_base, 0, HAL_I2S_NO);\n  i2sip_w_enable_rx_dma(reg_base, HAL_I2S_NO);\n  i2sip_w_rx_fifo_reset(reg_base, 0);\n\n  return 0;\n}\n\nvoid hal_i2s_tx_sync_enable(enum HAL_I2S_SYNC_TYPE_T type) {\n  uint32_t reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n  i2sip_w_tx_sync_enable(reg_base, type);\n}\n\nvoid hal_i2s_tx_sync_disable(void) {\n  uint32_t reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n  i2sip_w_tx_sync_disable(reg_base);\n}\n\nvoid hal_i2s_rx_sync_enable(enum HAL_I2S_SYNC_TYPE_T type) {\n  uint32_t reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n  i2sip_w_rx_sync_enable(reg_base, type);\n}\n\nvoid hal_i2s_rx_sync_disable(void) {\n  uint32_t reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n  i2sip_w_rx_sync_disable(reg_base);\n}\n\nvoid hal_i2s_clk_sync_enable(enum HAL_I2S_SYNC_TYPE_T type) {\n  uint32_t reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n  i2sip_w_clk_sync_enable(reg_base, type);\n}\n\nvoid hal_i2s_clk_sync_disable(void) {\n  uint32_t reg_base = _i2s_get_reg_base(HAL_I2S_ID_0);\n  i2sip_w_clk_sync_disable(reg_base);\n}\n"
  },
  {
    "path": "platform/hal/hal_i2s.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_I2S_H__\n#define __HAL_I2S_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_aud.h\"\n#include \"hal_cmu.h\"\n\nenum HAL_I2S_MODE_T {\n    HAL_I2S_MODE_NULL,\n    HAL_I2S_MODE_MASTER,\n    HAL_I2S_MODE_SLAVE,\n};\n\nenum HAL_I2S_SYNC_TYPE_T {\n    HAL_I2S_SYNC_TYPE_NONE,\n    HAL_I2S_SYNC_TYPE_BT,\n    HAL_I2S_SYNC_TYPE_GPIO,\n};\n\nstruct HAL_I2S_CONFIG_T {\n    bool use_dma;\n    bool chan_sep_buf;\n    bool sync_start;\n    uint8_t cycles;\n    uint8_t bits;\n    uint8_t channel_num;\n    enum AUD_CHANNEL_MAP_T channel_map;\n    uint32_t sample_rate;\n};\n\nint hal_i2s_open(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream, enum HAL_I2S_MODE_T mode);\nint hal_i2s_close(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream);\nint hal_i2s_start_stream(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream);\nint hal_i2s_stop_stream(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream);\nint hal_i2s_setup_stream(enum HAL_I2S_ID_T id, enum AUD_STREAM_T stream, const struct HAL_I2S_CONFIG_T *cfg);\nint hal_i2s_send(enum HAL_I2S_ID_T id, const uint8_t *value, uint32_t value_len);\nuint8_t hal_i2s_recv(enum HAL_I2S_ID_T id, uint8_t *value, uint32_t value_len);\n\nvoid hal_i2s_enable_delay(enum HAL_I2S_ID_T id);\nvoid hal_i2s_disable_delay(enum HAL_I2S_ID_T id);\nvoid hal_i2s_enable(enum HAL_I2S_ID_T id);\n\n//================================================================================\n// I2S Packet Mode\n//================================================================================\n\nint hal_i2s_packet_open(void);\nint hal_i2s_packet_close(void);\nint hal_i2s_start_transfer(void);\nint hal_i2s_stop_transfer(void);\n\nvoid hal_i2s_tx_sync_enable(enum HAL_I2S_SYNC_TYPE_T type);\nvoid hal_i2s_tx_sync_disable(void);\nvoid hal_i2s_rx_sync_enable(enum HAL_I2S_SYNC_TYPE_T type);\nvoid hal_i2s_rx_sync_disable(void);\nvoid hal_i2s_clk_sync_enable(enum HAL_I2S_SYNC_TYPE_T type);\nvoid hal_i2s_clk_sync_disable(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_i2s_tdm.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_i2s_tdm.h\"\n#include \"hal_dma.h\"\n#include \"hal_i2s.h\"\n#include \"hal_trace.h\"\n#include \n#include \n#include \n\n#if 0\n#define I2S_TDM_TRACE TRACE\n#define I2S_TDM_DUMP8 DUMP8\n#else\n#define I2S_TDM_TRACE(n, str, ...)\n#define I2S_TDM_DUMP8(str, ...)\n#endif\n\n#define I2S_TDM_FRAME_SIZE_MAX 512\n#define I2S_TDM_TX_FRAME_NUM 2\n#define I2S_TDM_TX_FRAME_SIZE I2S_TDM_FRAME_SIZE_MAX / 16\n\nstatic struct HAL_DMA_DESC_T i2s_tdm_tx_dma_desc[HAL_I2S_ID_QTY]\n                                                [I2S_TDM_TX_FRAME_NUM];\nstatic uint16_t I2S_TDM_BUF_ALIGN\n    i2s_tdm_tx_buf[HAL_I2S_ID_QTY][I2S_TDM_TX_FRAME_NUM][I2S_TDM_TX_FRAME_SIZE];\nstatic struct HAL_DMA_CH_CFG_T tx_dma_cfg[HAL_I2S_ID_QTY];\nstatic struct HAL_I2S_TDM_CONFIG_T i2s_tdm_cfg[HAL_I2S_ID_QTY];\n\nstatic inline bool i2s_tdm_cycles_in_arrays(uint16_t cycles) {\n  if (cycles == (uint16_t)HAL_I2S_TDM_CYCLES_16 ||\n      cycles == (uint16_t)HAL_I2S_TDM_CYCLES_32 ||\n      cycles == (uint16_t)HAL_I2S_TDM_CYCLES_64 ||\n      cycles == (uint16_t)HAL_I2S_TDM_CYCLES_128 ||\n      cycles == (uint16_t)HAL_I2S_TDM_CYCLES_256 ||\n      cycles == (uint16_t)HAL_I2S_TDM_CYCLES_512)\n    return true;\n  else\n    return false;\n}\n\nstatic inline bool i2s_tdm_fs_cycles_in_arrays(uint16_t fs_cycles) {\n  if (fs_cycles == (uint16_t)HAL_I2S_TDM_FS_CYCLES_1 ||\n      fs_cycles == (uint16_t)HAL_TDM_FS_CYCLES_8 ||\n      fs_cycles == (uint16_t)HAL_I2S_TDM_FS_CYCLES_16 ||\n      fs_cycles == (uint16_t)HAL_I2S_TDM_FS_CYCLES_32 ||\n      fs_cycles == (uint16_t)HAL_I2S_TDM_FS_CYCLES_64 ||\n      fs_cycles == (uint16_t)HAL_I2S_TDM_FS_CYCLES_128 ||\n      fs_cycles == (uint16_t)HAL_I2S_TDM_FS_CYCLES_256 ||\n      fs_cycles == (uint16_t)HAL_I2S_TDM_FS_CYCLES_ONE_LESS)\n    return true;\n  else\n    return false;\n}\n\nstatic inline bool i2s_tdm_slot_cycles_in_arrays(uint8_t slot_cycles) {\n  if (slot_cycles == (uint8_t)HAL_I2S_TDM_SLOT_CYCLES_16 ||\n      slot_cycles == (uint8_t)HAL_I2S_TDM_SLOT_CYCLES_32)\n    return true;\n  else\n    return false;\n}\n\nstatic void i2s_tdm0_tx_handler(uint8_t chan, uint32_t remains, uint32_t error,\n                                struct HAL_DMA_DESC_T *lli) {\n#if 0\n    static int cnt = 0;\n\n    cnt++;\n    if (cnt % 600 == 0)\n    {\n        I2S_TDM_TRACE(4,\"I2S_TDM0-TX: remains=%ld, error=%ld, cnt=%d,tx_buff_len = %d.\", remains, error, cnt,sizeof(i2s_tdm_tx_buf[HAL_I2S_ID_0]));\n        I2S_TDM_DUMP8(\"0x%x,\",i2s_tdm_tx_buf[HAL_I2S_ID_0],sizeof(i2s_tdm_tx_buf[HAL_I2S_ID_0]) <= 32 ? sizeof(i2s_tdm_tx_buf[HAL_I2S_ID_0]) : 32 );\n    }\n#endif\n}\n\nstatic void i2s_tdm1_tx_handler(uint8_t chan, uint32_t remains, uint32_t error,\n                                struct HAL_DMA_DESC_T *lli) {\n#if 0\n    static int cnt = 0;\n\n    cnt++;\n    if (cnt % 600 == 0) {\n        I2S_TDM_TRACE(4,\"I2S_TDM1-TX: remains=%ld, error=%ld, cnt=%d,tx_buff_len = %d.\", remains, error, cnt,sizeof(i2s_tdm_tx_buf[HAL_I2S_ID_1]));\n        I2S_TDM_DUMP8(\"0x%x,\",i2s_tdm_tx_buf[HAL_I2S_ID_1],sizeof(i2s_tdm_tx_buf[HAL_I2S_ID_1]) <= 32 ? sizeof(i2s_tdm_tx_buf[HAL_I2S_ID_1]) : 32 );\n    }\n#endif\n}\n\nint32_t hal_i2s_tdm_open(enum HAL_I2S_ID_T i2s_id, enum HAL_I2S_MODE_T mode) {\n  int ret;\n\n  I2S_TDM_TRACE(3, \"%s: i2s_id = %d,mode = %d.\", __func__, i2s_id, mode);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n  // i2s open playback and capture.\n  ret = hal_i2s_open(i2s_id, AUD_STREAM_PLAYBACK, mode);\n  if (ret) {\n    I2S_TDM_TRACE(2, \"%s: hal_i2s_open playback failed.ret = %d.\", __func__,\n                  ret);\n    goto __func_fail;\n  }\n  ret = hal_i2s_open(i2s_id, AUD_STREAM_CAPTURE, mode);\n  if (ret) {\n    I2S_TDM_TRACE(2, \"%s: hal_i2s_open capture failed.ret = %d.\", __func__,\n                  ret);\n    goto __func_fail;\n  }\n\n  I2S_TDM_TRACE(1, \"%s done.\", __func__);\n  return 0;\n\n__func_fail:\n  I2S_TDM_TRACE(2, \"%s failed. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nint32_t hal_i2s_tdm_setup(enum HAL_I2S_ID_T i2s_id, uint32_t sample_rate,\n                          struct HAL_I2S_TDM_CONFIG_T *i2s_tdm_cfg) {\n  int i, j, m, n;\n  int ret;\n  struct HAL_I2S_CONFIG_T i2s_cfg;\n  uint16_t *buf;\n  uint32_t cycles;\n  uint32_t fs_cycles;\n  uint32_t slot_cycles;\n  uint32_t fs_remain;\n\n  I2S_TDM_TRACE(3, \"%s: i2s_id = %d,sample_rate = %d.\", __func__, i2s_id,\n                sample_rate);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n  ASSERT(i2s_tdm_cycles_in_arrays(i2s_tdm_cfg->cycles), \"%s: cycles(%d) error!\",\n         __func__, i2s_tdm_cfg->cycles);\n  ASSERT(i2s_tdm_fs_cycles_in_arrays(i2s_tdm_cfg->fs_cycles),\n         \"%s: fs_cycles(%d) error!\", __func__, i2s_tdm_cfg->fs_cycles);\n  ASSERT(i2s_tdm_slot_cycles_in_arrays(i2s_tdm_cfg->slot_cycles),\n         \"%s: slot_cycles(%d) error!\", __func__, i2s_tdm_cfg->slot_cycles);\n\n  i2s_tdm_cfg[i2s_id] = *i2s_tdm_cfg;\n  cycles = i2s_tdm_cfg->cycles;\n  fs_cycles = i2s_tdm_cfg->fs_cycles == HAL_I2S_TDM_FS_CYCLES_ONE_LESS\n                  ? cycles - 1\n                  : i2s_tdm_cfg->fs_cycles;\n  slot_cycles = i2s_tdm_cfg->slot_cycles;\n\n  memset(&i2s_cfg, 0, sizeof(i2s_cfg));\n  i2s_cfg.use_dma = true;\n  i2s_cfg.sync_start = true;\n  i2s_cfg.chan_sep_buf = false;\n  i2s_cfg.bits = slot_cycles;\n  i2s_cfg.channel_num = 2;\n  i2s_cfg.channel_map = AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1;\n  i2s_cfg.sample_rate = (sample_rate * (cycles / i2s_cfg.bits)) / 2;\n  ret = hal_i2s_setup_stream(i2s_id, AUD_STREAM_PLAYBACK, &i2s_cfg);\n  if (ret) {\n    I2S_TDM_TRACE(2, \"%s: playback failed.ret = %d.\", __func__, ret);\n    goto __func_fail;\n  }\n  i2s_cfg.sync_start = false;\n  ret = hal_i2s_setup_stream(i2s_id, AUD_STREAM_CAPTURE, &i2s_cfg);\n  if (ret) {\n    I2S_TDM_TRACE(1, \"hal_i2s_setup_stream capture failed.ret = %d.\", ret);\n    goto __func_fail;\n  }\n\n  // Set tx buffer, output signal as slave device ws.\n  I2S_TDM_TRACE(3, \"%s: cycles = %d, fs_cycles = %d\", __func__, cycles,\n                fs_cycles);\n  for (i = 0; i < I2S_TDM_TX_FRAME_NUM; i++) {\n    buf = (uint16_t *)(&i2s_tdm_tx_buf[i2s_id][i][0]);\n    for (j = 0; j < I2S_TDM_TX_FRAME_SIZE / (cycles / 16); j++) {\n      fs_remain = fs_cycles;\n      for (m = 0; m < (cycles / 16); m++) {\n        buf[j * (cycles / 16) + m] = 0;\n        for (n = 0; n < 16; n++) {\n          if (fs_remain > 0) {\n            buf[j * (cycles / 16) + m] |= (1 << n);\n            fs_remain--;\n          } else {\n            break;\n          }\n        }\n      }\n    }\n  }\n\n  I2S_TDM_TRACE(1, \"%s done.\", __func__);\n  return 0;\n\n__func_fail:\n  I2S_TDM_TRACE(2, \"%s failed. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nint32_t hal_i2s_tdm_start_stream(enum HAL_I2S_ID_T i2s_id) {\n  uint32_t i;\n  int ret;\n\n  I2S_TDM_TRACE(2, \"%s: i2s_id = %d.\", __func__, i2s_id);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n\n  memset(&tx_dma_cfg[i2s_id], 0, sizeof(tx_dma_cfg[i2s_id]));\n  tx_dma_cfg[i2s_id].dst = 0; // useless\n  tx_dma_cfg[i2s_id].dst_bsize = HAL_DMA_BSIZE_4;\n  tx_dma_cfg[i2s_id].dst_periph =\n      i2s_id == HAL_I2S_ID_0 ? HAL_AUDMA_I2S0_TX : HAL_AUDMA_I2S1_TX;\n  tx_dma_cfg[i2s_id].dst_width = HAL_DMA_WIDTH_HALFWORD;\n  tx_dma_cfg[i2s_id].handler =\n      i2s_id == HAL_I2S_ID_0 ? i2s_tdm0_tx_handler : i2s_tdm1_tx_handler;\n  tx_dma_cfg[i2s_id].src_bsize = HAL_DMA_BSIZE_4;\n  tx_dma_cfg[i2s_id].src_tsize = (sizeof(i2s_tdm_tx_buf[i2s_id][0]) / 2);\n  tx_dma_cfg[i2s_id].src_width = HAL_DMA_WIDTH_HALFWORD;\n  tx_dma_cfg[i2s_id].try_burst = 1;\n  tx_dma_cfg[i2s_id].type = HAL_DMA_FLOW_M2P_DMA;\n  tx_dma_cfg[i2s_id].ch =\n      hal_audma_get_chan(tx_dma_cfg[i2s_id].dst_periph, HAL_DMA_HIGH_PRIO);\n\n  for (i = 0; i < I2S_TDM_TX_FRAME_NUM; i++) {\n    tx_dma_cfg[i2s_id].src = (uint32_t)&i2s_tdm_tx_buf[i2s_id][i][0];\n    ret = hal_audma_init_desc(\n        &i2s_tdm_tx_dma_desc[i2s_id][i], &tx_dma_cfg[i2s_id],\n        &i2s_tdm_tx_dma_desc[i2s_id][(i + 1) % I2S_TDM_TX_FRAME_NUM], 1);\n    if (ret) {\n      I2S_TDM_TRACE(2, \"%s: hal_audma_init_desc tx failed.ret = %d.\", __func__,\n                    ret);\n      goto __func_fail;\n    }\n  }\n\n  ret =\n      hal_audma_sg_start(&i2s_tdm_tx_dma_desc[i2s_id][0], &tx_dma_cfg[i2s_id]);\n  if (ret) {\n    I2S_TDM_TRACE(2, \"%s: hal_audma_sg_start tx failed.ret = %d.\", __func__,\n                  ret);\n    goto __func_fail;\n  }\n\n  // i2s start stream playback and capture.\n  ret = hal_i2s_start_stream(i2s_id, AUD_STREAM_PLAYBACK);\n  if (ret) {\n    I2S_TDM_TRACE(2, \"%s: hal_i2s_start_stream failed.ret = %d.\", __func__,\n                  ret);\n  }\n\n  ret = hal_i2s_start_stream(i2s_id, AUD_STREAM_CAPTURE);\n  if (ret) {\n    I2S_TDM_TRACE(1, \"hal_i2s_start_stream tx failed.ret = %d.\", ret);\n    goto __func_fail;\n  }\n\n  I2S_TDM_TRACE(1, \"%s done.\", __func__);\n  return ret;\n\n__func_fail:\n  I2S_TDM_TRACE(2, \"%s failed.ret = %d.\", __func__, ret);\n  return ret;\n}\n\nint32_t hal_i2s_tdm_stop_stream(enum HAL_I2S_ID_T i2s_id) {\n  I2S_TDM_TRACE(2, \"%s: i2s_id = %d.\", __func__, i2s_id);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n\n  hal_dma_stop(tx_dma_cfg[i2s_id].ch);\n  hal_i2s_stop_stream(i2s_id, AUD_STREAM_PLAYBACK);\n  hal_i2s_stop_stream(i2s_id, AUD_STREAM_CAPTURE);\n\n  I2S_TDM_TRACE(1, \"%s done.\", __func__);\n  return 0;\n}\n\nint32_t hal_i2s_tdm_close(enum HAL_I2S_ID_T i2s_id) {\n  I2S_TDM_TRACE(2, \"%s: i2s_id = %d.\", __func__, i2s_id);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n\n  hal_i2s_close(i2s_id, AUD_STREAM_PLAYBACK);\n  hal_i2s_close(i2s_id, AUD_STREAM_CAPTURE);\n\n  I2S_TDM_TRACE(1, \"%s done.\", __func__);\n  return 0;\n}\n\nvoid hal_i2s_tdm_get_config(enum HAL_I2S_ID_T i2s_id,\n                            struct HAL_I2S_TDM_CONFIG_T *tdm_cfg) {\n  I2S_TDM_TRACE(2, \"%s: i2s_id = %d.\", __func__, i2s_id);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n\n  *tdm_cfg = i2s_tdm_cfg[i2s_id];\n}\n\nvoid hal_i2s_tdm_set_config(enum HAL_I2S_ID_T i2s_id,\n                            struct HAL_I2S_TDM_CONFIG_T *tdm_cfg) {\n  I2S_TDM_TRACE(2, \"%s: i2s_id = %d.\", __func__, i2s_id);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n\n  i2s_tdm_cfg[i2s_id] = *tdm_cfg;\n}\n"
  },
  {
    "path": "platform/hal/hal_i2s_tdm.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_I2S_TDM_H__\n#define __HAL_I2S_TDM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \"hal_i2s.h\"\n#include \"hal_tdm.h\"\n\n#define I2S_TDM_BUF_ALIGN __attribute__((aligned(0x100)))\n\nenum HAL_I2S_TDM_CYCLES_T {\n    HAL_I2S_TDM_CYCLES_16   = HAL_TDM_CYCLES_16,\n    HAL_I2S_TDM_CYCLES_32   = HAL_TDM_CYCLES_32,\n    HAL_I2S_TDM_CYCLES_64   = HAL_TDM_CYCLES_64,\n    HAL_I2S_TDM_CYCLES_128  = HAL_TDM_CYCLES_128,\n    HAL_I2S_TDM_CYCLES_256  = HAL_TDM_CYCLES_256,\n    HAL_I2S_TDM_CYCLES_512  = HAL_TDM_CYCLES_512,\n    HAL_I2S_TDM_CYCLES_NUM,\n};\n\nenum HAL_I2S_TDM_FS_CYCLES_T {\n    HAL_I2S_TDM_FS_CYCLES_ONE_LESS = HAL_TDM_FS_CYCLES_ONE_LESS,\n    HAL_I2S_TDM_FS_CYCLES_1    = HAL_TDM_FS_CYCLES_1,\n    HAL_I2S_TDM_FS_CYCLES_8   = HAL_TDM_FS_CYCLES_8,\n    HAL_I2S_TDM_FS_CYCLES_16  = HAL_TDM_FS_CYCLES_16,\n    HAL_I2S_TDM_FS_CYCLES_32  = HAL_TDM_FS_CYCLES_32,\n    HAL_I2S_TDM_FS_CYCLES_64  = HAL_TDM_FS_CYCLES_64,\n    HAL_I2S_TDM_FS_CYCLES_128 = HAL_TDM_FS_CYCLES_128,\n    HAL_I2S_TDM_FS_CYCLES_256 = HAL_TDM_FS_CYCLES_256,\n};\n\nenum HAL_I2S_TDM_SLOT_CYCLES_T {\n    HAL_I2S_TDM_SLOT_CYCLES_32 = HAL_TDM_SLOT_CYCLES_32,\n    HAL_I2S_TDM_SLOT_CYCLES_16 = HAL_TDM_SLOT_CYCLES_16,\n};\n\nstruct HAL_I2S_TDM_CONFIG_T {\n    enum HAL_I2S_TDM_CYCLES_T cycles;\n    enum HAL_I2S_TDM_FS_CYCLES_T fs_cycles;\n    enum HAL_I2S_TDM_SLOT_CYCLES_T slot_cycles;\n    uint32_t data_offset;\n};\n\nint32_t hal_i2s_tdm_open(enum HAL_I2S_ID_T i2s_id,enum HAL_I2S_MODE_T mode);\nint32_t hal_i2s_tdm_setup(enum HAL_I2S_ID_T i2s_id,\n                                 uint32_t sample_rate,\n                                 struct HAL_I2S_TDM_CONFIG_T *i2s_tdm_cfg);\nint32_t hal_i2s_tdm_start_stream(enum HAL_I2S_ID_T i2s_id);\nint32_t hal_i2s_tdm_stop_stream(enum HAL_I2S_ID_T i2s_id);\nint32_t hal_i2s_tdm_close(enum HAL_I2S_ID_T i2s_id);\nvoid hal_i2s_tdm_set_config(enum HAL_I2S_ID_T i2s_id,struct HAL_I2S_TDM_CONFIG_T *tdm_cfg);\nvoid hal_i2s_tdm_get_config(enum HAL_I2S_ID_T i2s_id,struct HAL_I2S_TDM_CONFIG_T *tdm_cfg);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // __HAL_I2S_TDM_H__\n"
  },
  {
    "path": "platform/hal/hal_i2sip.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_I2SIP_H__\n#define __HAL_I2SIP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"reg_i2sip.h\"\n#include \"hal_i2s.h\"\n\n#define i2sip_read32(b,a) \\\n     (*(volatile uint32_t *)(b+a))\n\n#define i2sip_write32(v,b,a) \\\n     ((*(volatile uint32_t *)(b+a)) = v)\n\nstatic inline void i2sip_w_enable_i2sip(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n\n    val = i2sip_read32(reg_base, I2SIP_ENABLE_REG_REG_OFFSET);\n    if (v)\n        val |= I2SIP_ENABLE_REG_I2S_ENABLE_MASK;\n    else\n        val &= ~I2SIP_ENABLE_REG_I2S_ENABLE_MASK;\n\n    i2sip_write32(val, reg_base, I2SIP_ENABLE_REG_REG_OFFSET);\n}\n#ifndef CHIP_BEST1000\nstatic inline void i2sip_w_enable_slave_mode(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n\n    val = i2sip_read32(reg_base, I2SIP_ENABLE_REG_REG_OFFSET);\n    if (v)\n        val |= I2SIP_ENABLE_REG_SLAVE_MODE_MASK;\n    else\n        val &= ~I2SIP_ENABLE_REG_SLAVE_MODE_MASK;\n\n    i2sip_write32(val, reg_base, I2SIP_ENABLE_REG_REG_OFFSET);\n}\n#endif\nstatic inline void i2sip_w_enable_clk_gen(uint32_t reg_base, uint32_t v)\n{\n    if (v)\n        i2sip_write32(1, reg_base, I2SIP_CLK_GEN_ENABLE_REG_REG_OFFSET);\n    else\n        i2sip_write32(0, reg_base, I2SIP_CLK_GEN_ENABLE_REG_REG_OFFSET);\n}\nstatic inline uint32_t i2sip_r_clk_gen_enabled(uint32_t reg_base)\n{\n    uint32_t v;\n\n    v = i2sip_read32(reg_base, I2SIP_CLK_GEN_ENABLE_REG_REG_OFFSET);\n    return !!(v & I2SIP_CLK_GEN_ENABLE_REG_ENABLE_MASK);\n}\nstatic inline void i2sip_w_enable_rx_block(uint32_t reg_base, uint32_t v)\n{\n    if (v)\n        i2sip_write32(1, reg_base, I2SIP_RX_BLOCK_ENABLE_REG_REG_OFFSET);\n    else\n        i2sip_write32(0, reg_base, I2SIP_RX_BLOCK_ENABLE_REG_REG_OFFSET);\n}\nstatic inline void i2sip_w_enable_rx_channel(uint32_t reg_base, uint32_t chan, uint32_t v)\n{\n    if (v)\n        i2sip_write32(1, reg_base, I2SIP_RX_ENABLE_REG_OFFSET(chan));\n    else\n        i2sip_write32(0, reg_base, I2SIP_RX_ENABLE_REG_OFFSET(chan));\n}\nstatic inline void i2sip_w_enable_tx_block(uint32_t reg_base, uint32_t v)\n{\n    if (v)\n        i2sip_write32(1, reg_base, I2SIP_TX_BLOCK_ENABLE_REG_REG_OFFSET);\n    else\n        i2sip_write32(0, reg_base, I2SIP_TX_BLOCK_ENABLE_REG_REG_OFFSET);\n}\nstatic inline void i2sip_w_enable_tx_channel(uint32_t reg_base, uint32_t chan, uint32_t v)\n{\n    if (v)\n        i2sip_write32(1, reg_base, I2SIP_TX_ENABLE_REG_OFFSET(chan));\n    else\n        i2sip_write32(0, reg_base, I2SIP_TX_ENABLE_REG_OFFSET(chan));\n}\nstatic inline void i2sip_w_tx_resolution(uint32_t reg_base, uint32_t chan, uint32_t v)\n{\n    i2sip_write32(v<= HAL_INTERSYS_MSG_TYPE_QTY,\n              \"chan_opened size too small\");\n\nstatic bool need_flow_ctrl[HAL_INTERSYS_ID_QTY] = {\n    false,\n    false,\n};\n\nstatic bool chan_busy[HAL_INTERSYS_ID_QTY] = {\n    false,\n    false,\n};\n\nstatic bool busy_now = false;\n\n#ifdef PEER_IRQ_AUTO_CLEAR\nstatic bool peer_irq_auto_clear;\n#endif\n\nstatic struct CMU_T *const cmu = (struct CMU_T *)CMU_BASE;\n\nstatic struct BTCMU_T *const btcmu = (struct BTCMU_T *)BT_CMU_BASE;\n\nstatic void hal_intersys_busy(enum HAL_INTERSYS_ID_T id, bool busy) {\n  int i;\n  bool new_state;\n\n  if (chan_busy[id] == busy) {\n    return;\n  }\n\n  chan_busy[id] = busy;\n\n  if (busy_now == busy) {\n    return;\n  }\n\n  if (busy) {\n    hal_sys_wake_lock(HAL_SYS_WAKE_LOCK_USER_INTERSYS);\n    busy_now = true;\n  } else {\n    new_state = false;\n    for (i = 0; i < HAL_INTERSYS_ID_QTY; i++) {\n      if (chan_busy[i]) {\n        new_state = true;\n        break;\n      }\n    }\n    if (!new_state) {\n      hal_sys_wake_unlock(HAL_SYS_WAKE_LOCK_USER_INTERSYS);\n      busy_now = false;\n    }\n  }\n}\n\n#ifdef PEER_IRQ_AUTO_CLEAR\nvoid hal_intersys_peer_irq_auto_clear(bool enable) {\n  peer_irq_auto_clear = enable;\n}\n#endif\n\nstatic int hal_intersys_peer_irq_set(enum HAL_INTERSYS_ID_T id,\n                                     enum HAL_INTERSYS_IRQ_TYPE_T type) {\n  uint32_t value;\n\n  if (id == HAL_INTERSYS_ID_0) {\n    if (type == HAL_INTERSYS_IRQ_SEND_IND) {\n      value = CMU_MCU2BT_DATA_IND_SET;\n    } else {\n      value = CMU_BT2MCU_DATA_DONE_SET;\n    }\n  } else {\n    if (type == HAL_INTERSYS_IRQ_SEND_IND) {\n      value = CMU_MCU2BT_DATA1_IND_SET;\n    } else {\n      value = CMU_BT2MCU_DATA1_DONE_SET;\n    }\n  }\n\n#ifdef PEER_IRQ_AUTO_CLEAR\n  uint32_t ret;\n\n  ret = int_lock();\n  cmu->ISIRQ_SET = value;\n  if (peer_irq_auto_clear) {\n    if (CMU_MCU2BT_DATA_IND_SET == value) {\n      cmu->ISIRQ_CLR |= CMU_MCU2BT_DATA_IND_CLR;\n    } else {\n      cmu->ISIRQ_CLR |= CMU_BT2MCU_DATA_DONE_CLR;\n    }\n    hal_sys_timer_delay(MS_TO_TICKS(2));\n  }\n  int_unlock(ret);\n#else\n  cmu->ISIRQ_SET = value;\n#endif\n  return 0;\n}\n\nstatic inline void btcmu_reg_update_wait(void) {\n  // Make sure BTCMU (26M clock domain) write opertions finish before return\n  btcmu->ISIRQ_CLR;\n}\n\nstatic int hal_intersys_local_irq_clear(enum HAL_INTERSYS_ID_T id,\n                                        enum HAL_INTERSYS_IRQ_TYPE_T type) {\n  uint32_t value;\n\n  if (id == HAL_INTERSYS_ID_0) {\n    if (type == HAL_INTERSYS_IRQ_SEND_IND) {\n      value = BTCMU_BT2MCU_DATA_IND_CLR;\n    } else {\n      value = BTCMU_MCU2BT_DATA_DONE_CLR;\n    }\n  } else {\n    if (type == HAL_INTERSYS_IRQ_SEND_IND) {\n      value = BTCMU_BT2MCU_DATA1_IND_CLR;\n    } else {\n      value = BTCMU_MCU2BT_DATA1_DONE_CLR;\n    }\n  }\n\n  btcmu->ISIRQ_CLR = value;\n  btcmu_reg_update_wait();\n  return 0;\n}\n\nstatic int hal_intersys_local_irq_set(enum HAL_INTERSYS_ID_T id,\n                                      enum HAL_INTERSYS_IRQ_TYPE_T type) {\n  uint32_t value;\n\n  if (id == HAL_INTERSYS_ID_0) {\n    if (type == HAL_INTERSYS_IRQ_SEND_IND) {\n      value = BTCMU_BT2MCU_DATA_IND_SET;\n    } else {\n      value = BTCMU_MCU2BT_DATA_DONE_SET;\n    }\n  } else {\n    if (type == HAL_INTERSYS_IRQ_SEND_IND) {\n      value = BTCMU_BT2MCU_DATA1_IND_SET;\n    } else {\n      value = BTCMU_MCU2BT_DATA1_DONE_SET;\n    }\n  }\n\n  btcmu->ISIRQ_SET = value;\n  btcmu_reg_update_wait();\n  return 0;\n}\n\n// static void hal_intersys_wait_done_idle(void)\n//{\n//    while(hal_cmu_get_address()->ISIRQ_SET & (CMU_BT2MCU_DATA_DONE_SET\n//    |CMU_BT2MCU_DATA1_DONE_SET));\n//}\n\n// static void hal_intersys_wait_data_idle(void)\n//{\n//    while(hal_cmu_get_address()->ISIRQ_SET & (CMU_MCU2BT_DATA_IND_SET\n//    |CMU_MCU2BT_DATA1_IND_SET));\n//}\ndebug_intersys_type g_debug_intersys;\nstatic void hal_intersys_rx_irq(void) {\n  int id;\n  struct HAL_INTERSYS_MSG_T *msg_ptr;\n  enum HAL_INTERSYS_MSG_TYPE_T type;\n  unsigned int processed;\n\n  if (g_debug_intersys.cmd_opcode != 0xFFFF) {\n    g_debug_intersys.irq_happen += 1;\n  }\n\n  for (id = HAL_INTERSYS_ID_0; id < HAL_INTERSYS_ID_QTY; id++) {\n    if (NVIC_GetActive(rx_irq_id[id])) {\n      hal_intersys_local_irq_clear(id, HAL_INTERSYS_IRQ_SEND_IND);\n\n      if (recv_pending_head[id].data) {\n        // Previous unprocessed message\n        msg_ptr = &recv_pending_head[id];\n      } else {\n        // New message\n        msg_ptr = *recv_msg_list_p[id];\n      }\n      while (msg_ptr) {\n        type = msg_ptr->type;\n        if (type >= HAL_INTERSYS_MSG_TYPE_QTY) {\n          // Error\n          ASSERT(false, \"INTERSYS-RX: Invalid msg type: %d\", type);\n          break;\n        }\n        if (rx_irq_handler[id][type]) {\n          processed = rx_irq_handler[id][type](msg_ptr->data, msg_ptr->len);\n          // Check if flow control needed\n          if (processed < msg_ptr->len) {\n            recv_pending_head[id].next = msg_ptr->next;\n            recv_pending_head[id].type = msg_ptr->type;\n            recv_pending_head[id].len = msg_ptr->len - processed;\n            recv_pending_head[id].data = msg_ptr->data + processed;\n            break;\n          }\n        } else {\n          // Error\n          ASSERT(false, \"INTERSYS-RX: Handler missing\");\n          break;\n        }\n        msg_ptr = msg_ptr->next;\n      }\n\n      if (msg_ptr == NULL) {\n        if (!need_flow_ctrl[id]) {\n          hal_intersys_peer_irq_set(id, HAL_INTERSYS_IRQ_RECV_DONE);\n        }\n        recv_pending_head[id].data = NULL;\n      }\n    }\n  }\n}\n\nstatic void hal_intersys_tx_irq(void) {\n  int id;\n  struct HAL_INTERSYS_MSG_T *msg_ptr;\n  enum HAL_INTERSYS_MSG_TYPE_T type;\n\n  for (id = HAL_INTERSYS_ID_0; id < HAL_INTERSYS_ID_QTY; id++) {\n    if (NVIC_GetActive(tx_irq_id[id])) {\n      hal_intersys_local_irq_clear(id, HAL_INTERSYS_IRQ_RECV_DONE);\n\n      msg_ptr = send_msg_list_p[id];\n      while (msg_ptr) {\n        type = msg_ptr->type;\n        if (type >= HAL_INTERSYS_MSG_TYPE_QTY) {\n          // Error\n          ASSERT(false, \"INTERSYS-TX: Invalid msg type: %d\", type);\n          break;\n        }\n        if (tx_irq_handler[id][type]) {\n          tx_irq_handler[id][type](msg_ptr->data, msg_ptr->len);\n        };\n        CONTAINER_OF(msg_ptr, struct HAL_INTERSYS_SEND_RECORD_T, msg)->in_use =\n            false;\n        msg_ptr = msg_ptr->next;\n      }\n\n      if (send_pending_list_p[id]) {\n        send_msg_list_p[id] = send_pending_list_p[id];\n        send_pending_list_p[id] = NULL;\n        hal_intersys_peer_irq_set(id, HAL_INTERSYS_IRQ_SEND_IND);\n      } else {\n        send_msg_list_p[id] = NULL;\n        // Allow sleep\n        hal_intersys_busy(id, false);\n      }\n    }\n  }\n}\n\nint hal_intersys_open(enum HAL_INTERSYS_ID_T id,\n                      enum HAL_INTERSYS_MSG_TYPE_T type,\n                      HAL_INTERSYS_RX_IRQ_HANDLER rxhandler,\n                      HAL_INTERSYS_TX_IRQ_HANDLER txhandler, bool rx_flowctrl) {\n  int i;\n\n  if (id >= HAL_INTERSYS_ID_QTY) {\n    return 1;\n  }\n  if (type >= HAL_INTERSYS_MSG_TYPE_QTY) {\n    return 2;\n  }\n\n  if (chan_opened[id] == 0) {\n    if (id == HAL_INTERSYS_ID_0) {\n      cmu->ISIRQ_CLR = CMU_BT2MCU_DATA_DONE_CLR | CMU_MCU2BT_DATA_IND_CLR;\n    } else {\n      cmu->ISIRQ_CLR = CMU_BT2MCU_DATA1_DONE_CLR | CMU_MCU2BT_DATA1_IND_CLR;\n    }\n    *bt_recv_msg_list_ppp[id] = &send_msg_list_p[id];\n\n    NVIC_SetVector(rx_irq_id[id], (uint32_t)hal_intersys_rx_irq);\n    NVIC_SetPriority(rx_irq_id[id], IRQ_PRIORITY_NORMAL);\n\n    NVIC_SetVector(tx_irq_id[id], (uint32_t)hal_intersys_tx_irq);\n    NVIC_SetPriority(tx_irq_id[id], IRQ_PRIORITY_NORMAL);\n\n    // Stop IRQs by default\n    NVIC_DisableIRQ(rx_irq_id[id]);\n    NVIC_DisableIRQ(tx_irq_id[id]);\n\n    send_msg_list_p[id] = NULL;\n    send_pending_list_p[id] = NULL;\n    recv_pending_head[id].data = NULL;\n    for (i = 0; i < MAX_SEND_RECORD_COUNT; i++) {\n      send_msgs[id][i].in_use = false;\n    }\n    need_flow_ctrl[id] = rx_flowctrl;\n  } else {\n    ASSERT(need_flow_ctrl[id] == rx_flowctrl,\n           \"INTERSYS-OPEN: rx_flowctrl=%d (should be %d)\", rx_flowctrl,\n           need_flow_ctrl[id]);\n    return 3;\n  }\n  chan_opened[id] |= (1 << type);\n\n  rx_irq_handler[id][type] = rxhandler;\n  tx_irq_handler[id][type] = txhandler;\n\n  return 0;\n}\n\nint hal_intersys_close(enum HAL_INTERSYS_ID_T id,\n                       enum HAL_INTERSYS_MSG_TYPE_T type) {\n  if (id >= HAL_INTERSYS_ID_QTY) {\n    return 1;\n  }\n\n  chan_opened[id] &= ~(1 << type);\n  rx_irq_handler[id][type] = NULL;\n  tx_irq_handler[id][type] = NULL;\n\n  if (chan_opened[id] == 0) {\n    // Stop IRQs by default\n    NVIC_DisableIRQ(rx_irq_id[id]);\n    NVIC_DisableIRQ(tx_irq_id[id]);\n\n    send_msg_list_p[id] = NULL;\n    send_pending_list_p[id] = NULL;\n    recv_pending_head[id].data = NULL;\n    need_flow_ctrl[id] = false;\n  }\n\n  return 0;\n}\n\nint hal_intersys_start_recv(enum HAL_INTERSYS_ID_T id) {\n  if (id >= HAL_INTERSYS_ID_QTY) {\n    return 1;\n  }\n\n  NVIC_EnableIRQ(rx_irq_id[id]);\n  // Check if there is any previous unprocessed message\n  if (recv_pending_head[id].data) {\n    hal_intersys_local_irq_set(id, HAL_INTERSYS_IRQ_SEND_IND);\n  }\n  return 0;\n}\n\nint hal_intersys_stop_recv(enum HAL_INTERSYS_ID_T id) {\n  if (id >= HAL_INTERSYS_ID_QTY) {\n    return 1;\n  }\n\n  NVIC_DisableIRQ(rx_irq_id[id]);\n  return 0;\n}\n\nint hal_intersys_send(enum HAL_INTERSYS_ID_T id,\n                      enum HAL_INTERSYS_MSG_TYPE_T type,\n                      const unsigned char *data, unsigned int len) {\n  uint32_t lock;\n  int ret;\n  struct HAL_INTERSYS_SEND_RECORD_T *record;\n  struct HAL_INTERSYS_MSG_T *next;\n  int i;\n\n  if (id >= HAL_INTERSYS_ID_QTY) {\n    return 1;\n  }\n  if (type >= HAL_INTERSYS_MSG_TYPE_QTY) {\n    return 2;\n  }\n  if ((chan_opened[id] & (1 << type)) == 0) {\n    return 3;\n  }\n\n  NVIC_EnableIRQ(tx_irq_id[id]);\n\n  ret = -1;\n  record = &send_msgs[id][0];\n\n  lock = int_lock();\n  for (i = 0; i < MAX_SEND_RECORD_COUNT; i++) {\n    if (record->in_use) {\n      record++;\n      continue;\n    }\n    record->in_use = true;\n    record->msg.next = NULL;\n    record->msg.type = type;\n    record->msg.len = len;\n    record->msg.data = data;\n    if (send_msg_list_p[id] == NULL) {\n      send_msg_list_p[id] = &record->msg;\n      hal_intersys_peer_irq_set(id, HAL_INTERSYS_IRQ_SEND_IND);\n    } else if (send_pending_list_p[id] == NULL) {\n      send_pending_list_p[id] = &record->msg;\n    } else {\n      next = send_pending_list_p[id];\n      while (next->next) {\n        next = next->next;\n      }\n      next->next = &record->msg;\n    }\n    ret = 0;\n    // Prohibit sleep here\n    hal_intersys_busy(id, true);\n    break;\n  }\n  int_unlock(lock);\n\n  return ret;\n}\n\nvoid hal_intersys_rx_done(enum HAL_INTERSYS_ID_T id) {\n  hal_intersys_peer_irq_set(id, HAL_INTERSYS_IRQ_RECV_DONE);\n}\n\n#endif\n\n#ifdef TX_RX_PCM_MASK\nstatic FRAME2BUFF_HANDLER DecQ;\n\nvoid hal_intersys_mic_rx_irq() {\n  int id;\n  id = HAL_INTERSYS_ID_1;\n  if (NVIC_GetActive(rx_irq_id[id])) {\n    hal_intersys_local_irq_clear(id, HAL_INTERSYS_IRQ_SEND_IND);\n    // TRACE(0,\"HAL_INTERSYS_ID_1 CLEAR\");\n    // output data to buff\n    DecQ();\n  }\n}\n\nint hal_intersys_mic_open(enum HAL_INTERSYS_ID_T id, FRAME2BUFF_HANDLER dch) {\n  // if(btdrv_is_pcm_mask_enable()==1)\n  {\n    DecQ = dch;\n    NVIC_EnableIRQ(rx_irq_id[id]);\n    if (id == HAL_INTERSYS_ID_1) {\n      cmu->ISIRQ_CLR = CMU_BT2MCU_DATA1_DONE_CLR | CMU_MCU2BT_DATA1_IND_CLR;\n      NVIC_SetVector(rx_irq_id[id], (uint32_t)hal_intersys_mic_rx_irq);\n      NVIC_SetPriority(rx_irq_id[id], IRQ_PRIORITY_NORMAL);\n    }\n  }\n  return 0;\n}\n#endif\n"
  },
  {
    "path": "platform/hal/hal_intersys.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_INTERSYS_H__\n#define __HAL_INTERSYS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdbool.h\"\n\nenum HAL_INTERSYS_ID_T {\n    HAL_INTERSYS_ID_0,\n    HAL_INTERSYS_ID_1,\n\n    HAL_INTERSYS_ID_QTY\n};\n\nenum HAL_INTERSYS_MSG_TYPE_T {\n    HAL_INTERSYS_MSG_HCI,\n    HAL_INTERSYS_MSG_SYS,\n\n    HAL_INTERSYS_MSG_TYPE_QTY\n};\n\ntypedef struct debug_intersys\n{\n    unsigned short irq_happen;\n    unsigned short cmd_opcode;\n}debug_intersys_type;\n\ntypedef unsigned int (*HAL_INTERSYS_RX_IRQ_HANDLER)(const unsigned char *data, unsigned int len);\ntypedef void (*HAL_INTERSYS_TX_IRQ_HANDLER)(const unsigned char *data, unsigned int len);\n\nint hal_intersys_open(enum HAL_INTERSYS_ID_T id, enum HAL_INTERSYS_MSG_TYPE_T type,\n                      HAL_INTERSYS_RX_IRQ_HANDLER rxhandler, HAL_INTERSYS_TX_IRQ_HANDLER txhandler, bool rx_flowctrl);\n\nint hal_intersys_close(enum HAL_INTERSYS_ID_T id,enum HAL_INTERSYS_MSG_TYPE_T type);\n\nint hal_intersys_start_recv(enum HAL_INTERSYS_ID_T id);\n\nint hal_intersys_stop_recv(enum HAL_INTERSYS_ID_T id);\n\nint hal_intersys_send(enum HAL_INTERSYS_ID_T id, enum HAL_INTERSYS_MSG_TYPE_T type,\n                      const unsigned char *data, unsigned int len);\n\nvoid hal_intersys_rx_done(enum HAL_INTERSYS_ID_T id);\n\nvoid hal_intersys_peer_irq_auto_clear(bool enable);\n\n#ifdef TX_RX_PCM_MASK\ntypedef void (*FRAME2BUFF_HANDLER)();\n\nint hal_intersys_mic_open(enum HAL_INTERSYS_ID_T id, FRAME2BUFF_HANDLER dch);\n\nvoid hal_intersys_mic_rx_irq();\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_iomux.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_IOMUX_H__\n#define __HAL_IOMUX_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(hal_iomux)\n\nenum HAL_IOMUX_OP_TYPE_T {\n    HAL_IOMUX_OP_KEEP_OTHER_FUNC_BIT = 0,\n    HAL_IOMUX_OP_CLEAN_OTHER_FUNC_BIT,\n};\n\nenum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T {\n    HAL_IOMUX_PIN_VOLTAGE_VIO = 0,\n    HAL_IOMUX_PIN_VOLTAGE_MEM,\n    // For PMU LED pins only\n    HAL_IOMUX_PIN_VOLTAGE_VBAT,\n};\n\nenum HAL_IOMUX_PIN_PULL_SELECT_T {\n    HAL_IOMUX_PIN_NOPULL = 0,\n    HAL_IOMUX_PIN_PULLUP_ENABLE,\n    HAL_IOMUX_PIN_PULLDOWN_ENABLE,\n};\n\nenum HAL_PWRKEY_IRQ_T {\n    HAL_PWRKEY_IRQ_NONE             = 0,\n    HAL_PWRKEY_IRQ_FALLING_EDGE     = (1 << 0),\n    HAL_PWRKEY_IRQ_RISING_EDGE      = (1 << 1),\n    HAL_PWRKEY_IRQ_BOTH_EDGE        = (HAL_PWRKEY_IRQ_FALLING_EDGE | HAL_PWRKEY_IRQ_RISING_EDGE),\n};\n\nstruct HAL_IOMUX_PIN_FUNCTION_MAP {\n    enum HAL_IOMUX_PIN_T pin;\n    enum HAL_IOMUX_FUNCTION_T function;\n    enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt;\n    enum HAL_IOMUX_PIN_PULL_SELECT_T pull_sel;\n};\n\nuint32_t hal_iomux_check(const struct HAL_IOMUX_PIN_FUNCTION_MAP *map, uint32_t count);\nuint32_t hal_iomux_init(const struct HAL_IOMUX_PIN_FUNCTION_MAP *map, uint32_t count);\nuint32_t hal_iomux_set_function(enum HAL_IOMUX_PIN_T pin, enum HAL_IOMUX_FUNCTION_T func, enum HAL_IOMUX_OP_TYPE_T type);\nenum HAL_IOMUX_FUNCTION_T hal_iomux_get_function(enum HAL_IOMUX_PIN_T pin);\nuint32_t hal_iomux_set_io_voltage_domains(enum HAL_IOMUX_PIN_T pin, enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt);\nuint32_t hal_iomux_set_io_pull_select(enum HAL_IOMUX_PIN_T pin, enum HAL_IOMUX_PIN_PULL_SELECT_T pull_sel);\n\nvoid hal_iomux_set_default_config(void);\nvoid hal_iomux_set_uart0_voltage(enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt);\nvoid hal_iomux_set_uart1_voltage(enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt);\nvoid hal_iomux_set_uart2_voltage(enum HAL_IOMUX_PIN_VOLTAGE_DOMAINS_T volt);\nbool hal_iomux_uart0_connected(void);\nbool hal_iomux_uart1_connected(void);\nvoid hal_iomux_set_uart0(void);\nvoid hal_iomux_set_uart1(void);\nvoid hal_iomux_set_uart2(void);\nvoid hal_iomux_set_analog_i2c(void);\nvoid hal_iomux_set_analog_i2c_master_slave(void);\nvoid hal_iomux_set_jtag(void);\nvoid hal_iomux_set_sdmmc_dt_n_out_group(int enable);\nvoid hal_iomux_set_i2s0(void);\nvoid hal_iomux_set_i2s1(void);\nvoid hal_iomux_set_spdif0(void);\nvoid hal_iomux_set_spdif1(void);\nvoid hal_iomux_set_dig_mic_clock_pin(enum HAL_IOMUX_PIN_T pin);\nvoid hal_iomux_set_dig_mic_data0_pin(enum HAL_IOMUX_PIN_T pin);\nvoid hal_iomux_set_dig_mic_data1_pin(enum HAL_IOMUX_PIN_T pin);\nvoid hal_iomux_set_dig_mic_data2_pin(enum HAL_IOMUX_PIN_T pin);\nvoid hal_iomux_set_dig_mic(uint32_t map);\nvoid hal_iomux_set_spi(void);\nvoid hal_iomux_set_spilcd(void);\nvoid hal_iomux_set_i2c0(void);\nvoid hal_iomux_set_i2c1(void);\nvoid hal_iomux_set_clock_out(void);\nvoid hal_iomux_set_clock_12m(void);\nvoid hal_iomux_clear_clock_12m(void);\nvoid hal_iomux_set_bt_tport(void);\nvoid hal_iomux_set_bt_rf_sw(int rx_on, int tx_on);\n\nvoid hal_iomux_ispi_access_init(void);\nenum HAL_IOMUX_ISPI_ACCESS_T hal_iomux_ispi_access_enable(enum HAL_IOMUX_ISPI_ACCESS_T access);\nenum HAL_IOMUX_ISPI_ACCESS_T hal_iomux_ispi_access_disable(enum HAL_IOMUX_ISPI_ACCESS_T access);\n\nint hal_pwrkey_set_irq(enum HAL_PWRKEY_IRQ_T type);\nbool hal_pwrkey_pressed(void);\nbool hal_pwrkey_startup_pressed(void);\nenum HAL_PWRKEY_IRQ_T hal_pwrkey_get_irq_state(void);\n\nvoid hal_iomux_set_codec_gpio_trigger(enum HAL_IOMUX_PIN_T pin, bool polarity);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_key.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_key.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_chipid.h\"\n#include \"hal_iomux.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hwtimer_list.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"pmu.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n\n#ifdef KEY_DEBUG\n#define HAL_KEY_TRACE(n, s, ...)                                               \\\n  TRACE(n, \"[%u]\" s, TICKS_TO_MS(hal_sys_timer_get()), ##__VA_ARGS__)\n#else\n#define HAL_KEY_TRACE(n, s, ...) TRACE_DUMMY(n, s, ##__VA_ARGS__)\n#endif\n\n#ifdef CHIP_BEST2000\n#define GPIO_MAP_64BIT\n#endif\n\n#ifdef GPIO_MAP_64BIT\ntypedef uint64_t GPIO_MAP_T;\n#else\ntypedef uint32_t GPIO_MAP_T;\n#endif\n\n// #ifndef APP_TEST_MODE\n// #define CHECK_PWRKEY_AT_BOOT\n// #endif\n#ifdef NO_PWRKEY\n#undef CHECK_PWRKEY_AT_BOOT\n#endif\n#ifdef NO_GPIOKEY\n#undef CFG_HW_GPIOKEY_NUM\n#define CFG_HW_GPIOKEY_NUM 0\n#endif\n#ifdef NO_ADCKEY\n#undef CFG_HW_ADCKEY_NUMBER\n#define CFG_HW_ADCKEY_NUMBER 0\n#endif\n\n#ifndef CFG_SW_KEY_LLPRESS_THRESH_MS\n#define CFG_SW_KEY_LLPRESS_THRESH_MS 5000\n#endif\n#ifndef CFG_SW_KEY_LPRESS_THRESH_MS\n#define CFG_SW_KEY_LPRESS_THRESH_MS 1500\n#endif\n#ifndef CFG_SW_KEY_REPEAT_THRESH_MS\n#define CFG_SW_KEY_REPEAT_THRESH_MS 500\n#endif\n#ifndef CFG_SW_KEY_DBLCLICK_THRESH_MS\n#define CFG_SW_KEY_DBLCLICK_THRESH_MS 400\n#endif\n#ifndef CFG_SW_KEY_INIT_DOWN_THRESH_MS\n#define CFG_SW_KEY_INIT_DOWN_THRESH_MS 200\n#endif\n#ifndef CFG_SW_KEY_INIT_LPRESS_THRESH_MS\n#define CFG_SW_KEY_INIT_LPRESS_THRESH_MS 3000\n#endif\n#ifndef CFG_SW_KEY_INIT_LLPRESS_THRESH_MS\n#define CFG_SW_KEY_INIT_LLPRESS_THRESH_MS 10000\n#endif\n#ifndef CFG_SW_KEY_CHECK_INTERVAL_MS\n#define CFG_SW_KEY_CHECK_INTERVAL_MS 40\n#endif\n\n// common key define\n#define KEY_LONGLONGPRESS_THRESHOLD MS_TO_TICKS(CFG_SW_KEY_LLPRESS_THRESH_MS)\n#define KEY_LONGPRESS_THRESHOLD MS_TO_TICKS(CFG_SW_KEY_LPRESS_THRESH_MS)\n#define KEY_DOUBLECLICK_THRESHOLD MS_TO_TICKS(CFG_SW_KEY_DBLCLICK_THRESH_MS)\n#define KEY_LONGPRESS_REPEAT_THRESHOLD MS_TO_TICKS(CFG_SW_KEY_REPEAT_THRESH_MS)\n\n#define KEY_INIT_DOWN_THRESHOLD MS_TO_TICKS(CFG_SW_KEY_INIT_DOWN_THRESH_MS)\n#define KEY_INIT_LONGPRESS_THRESHOLD                                           \\\n  MS_TO_TICKS(CFG_SW_KEY_INIT_LPRESS_THRESH_MS)\n#define KEY_INIT_LONGLONGPRESS_THRESHOLD                                       \\\n  MS_TO_TICKS(CFG_SW_KEY_INIT_LLPRESS_THRESH_MS)\n\n#define KEY_CHECKER_INTERVAL MS_TO_TICKS(CFG_SW_KEY_CHECK_INTERVAL_MS)\n\n#define KEY_DEBOUNCE_INTERVAL (KEY_CHECKER_INTERVAL * 2)\n#define KEY_DITHER_INTERVAL (KEY_CHECKER_INTERVAL * 1)\n\n#define MAX_KEY_CLICK_COUNT (HAL_KEY_EVENT_RAMPAGECLICK - HAL_KEY_EVENT_CLICK)\n\nstruct HAL_KEY_ADCKEY_T {\n  bool debounce;\n  bool dither;\n  enum HAL_KEY_CODE_T code_debounce;\n  enum HAL_KEY_CODE_T code_down;\n  uint32_t time;\n};\n\nstruct HAL_KEY_GPIOKEY_T {\n  GPIO_MAP_T pin_debounce;\n  GPIO_MAP_T pin_dither;\n  GPIO_MAP_T pin_down;\n  uint32_t time_debounce;\n  uint32_t time_dither;\n};\n\nstruct HAL_KEY_PWRKEY_T {\n  bool debounce;\n  bool dither;\n  bool pressed;\n  uint32_t time;\n};\n\nstruct HAL_KEY_STATUS_T {\n  enum HAL_KEY_CODE_T code_down;\n  enum HAL_KEY_CODE_T code_ready;\n  enum HAL_KEY_CODE_T code_click;\n  enum HAL_KEY_EVENT_T event;\n  uint32_t time_updown;\n  uint32_t time_click;\n  uint8_t cnt_repeat;\n  uint8_t cnt_click;\n};\n\nstatic int (*key_detected_callback)(uint32_t, uint8_t) = NULL;\nstatic HWTIMER_ID debounce_timer = NULL;\nstatic bool timer_active = false;\nstatic struct HAL_KEY_STATUS_T key_status;\n\nstatic void hal_key_disable_allint(void);\nstatic void hal_key_enable_allint(void);\n\nstatic int send_key_event(enum HAL_KEY_CODE_T code,\n                          enum HAL_KEY_EVENT_T event) {\n  if (key_detected_callback) {\n    return key_detected_callback(code, event);\n  }\n  return 0;\n}\n\nstatic void hal_key_debounce_timer_restart(void) {\n  uint32_t lock;\n  bool set = false;\n\n  lock = int_lock();\n  if (!timer_active) {\n    timer_active = true;\n    set = true;\n  }\n  int_unlock(lock);\n\n  if (set) {\n    hwtimer_stop(debounce_timer);\n    hwtimer_start(debounce_timer, KEY_CHECKER_INTERVAL);\n    // hal_sys_wake_lock(HAL_SYS_WAKE_LOCK_USER_KEY);\n  }\n}\n\n#if (CFG_HW_ADCKEY_NUMBER > 0)\nstatic uint16_t adckey_volt_table[CFG_HW_ADCKEY_NUMBER];\nstruct HAL_KEY_ADCKEY_T adc_key;\n\nstatic inline POSSIBLY_UNUSED void hal_adckey_enable_press_int(void) {\n  hal_adckey_set_irq(HAL_ADCKEY_IRQ_PRESSED);\n}\n\nstatic inline POSSIBLY_UNUSED void hal_adckey_enable_release_int(void) {\n  hal_adckey_set_irq(HAL_ADCKEY_IRQ_RELEASED);\n}\n\nstatic inline POSSIBLY_UNUSED void hal_adckey_enable_adc_int(void) {\n  hal_gpadc_open(HAL_GPADC_CHAN_ADCKEY, HAL_GPADC_ATP_NULL, NULL);\n}\n\nstatic inline POSSIBLY_UNUSED void hal_adckey_disable_adc_int(void) {\n  hal_gpadc_close(HAL_GPADC_CHAN_ADCKEY);\n}\n\nstatic inline POSSIBLY_UNUSED void hal_adckey_disable_allint(void) {\n  hal_gpadc_close(HAL_GPADC_CHAN_ADCKEY);\n  hal_adckey_set_irq(HAL_ADCKEY_IRQ_NONE);\n}\n\nstatic inline POSSIBLY_UNUSED void hal_adckey_reset(void) {\n  memset(&adc_key, 0, sizeof(adc_key));\n}\n\nstatic enum HAL_KEY_CODE_T hal_adckey_findkey(uint16_t volt) {\n  int index = 0;\n\n#if 0\n    if (volt == HAL_GPADC_BAD_VALUE) {\n        return HAL_KEY_CODE_NONE;\n    }\n#endif\n\n  if (CFG_HW_ADCKEY_ADC_KEYVOLT_BASE < volt &&\n      volt < CFG_HW_ADCKEY_ADC_MAXVOLT) {\n    for (index = 0; index < CFG_HW_ADCKEY_NUMBER; index++) {\n      if (volt <= adckey_volt_table[index]) {\n        return CFG_HW_ADCKEY_MAP_TABLE[index];\n      }\n    }\n  }\n\n  return HAL_KEY_CODE_NONE;\n}\n\nstatic void hal_adckey_irqhandler(enum HAL_ADCKEY_IRQ_STATUS_T irq_status,\n                                  HAL_GPADC_MV_T val) {\n  enum HAL_KEY_CODE_T code;\n\n#ifdef NO_GROUPKEY\n  hal_key_disable_allint();\n#else\n  hal_adckey_disable_allint();\n#endif\n\n  if (irq_status & (HAL_ADCKEY_ERR0 | HAL_ADCKEY_ERR1)) {\n    HAL_KEY_TRACE(1, \"irq,adckey err 0x%04X\", irq_status);\n    adc_key.debounce = true;\n    adc_key.code_debounce = HAL_KEY_CODE_NONE;\n    goto _debounce;\n  }\n  if (irq_status & HAL_ADCKEY_PRESSED) {\n    HAL_KEY_TRACE(0, \"irq,adckey press\");\n    adc_key.debounce = true;\n    adc_key.code_debounce = HAL_KEY_CODE_NONE;\n    adc_key.time = hal_sys_timer_get();\n    hal_adckey_enable_adc_int();\n    goto _exit;\n  }\n  if (irq_status & HAL_ADCKEY_RELEASED) {\n    HAL_KEY_TRACE(0, \"irq,adckey release\");\n    adc_key.code_debounce = HAL_KEY_CODE_NONE;\n    goto _debounce;\n  }\n  if (irq_status & HAL_ADCKEY_ADC_VALID) {\n    code = hal_adckey_findkey(val);\n    HAL_KEY_TRACE(3, \"irq,adckey cur:0x%X pre:0x%X volt:%d\", code,\n                  adc_key.code_debounce, val);\n\n    if (adc_key.code_debounce == HAL_KEY_CODE_NONE) {\n      adc_key.code_debounce = code;\n    } else if (adc_key.code_debounce != code) {\n      adc_key.code_debounce = HAL_KEY_CODE_NONE;\n    }\n  }\n\n_debounce:\n  hal_key_debounce_timer_restart();\n_exit:\n  return;\n}\n\nstatic void hal_adckey_open(void) {\n  uint16_t i;\n  uint32_t basevolt;\n\n  HAL_KEY_TRACE(1, \"%s\\n\", __func__);\n\n  hal_adckey_reset();\n\n  basevolt = (CFG_HW_ADCKEY_ADC_MAXVOLT - CFG_HW_ADCKEY_ADC_MINVOLT) /\n             (CFG_HW_ADCKEY_NUMBER + 2);\n\n  adckey_volt_table[0] = CFG_HW_ADCKEY_ADC_KEYVOLT_BASE + basevolt;\n\n  for (i = 1; i < CFG_HW_ADCKEY_NUMBER - 1; i++) {\n    adckey_volt_table[i] = adckey_volt_table[i - 1] + basevolt;\n  }\n  adckey_volt_table[CFG_HW_ADCKEY_NUMBER - 1] = CFG_HW_ADCKEY_ADC_MAXVOLT;\n\n  hal_adckey_set_irq_handler(hal_adckey_irqhandler);\n}\n\nstatic void hal_adckey_close(void) {\n  HAL_KEY_TRACE(1, \"%s\\n\", __func__);\n\n  hal_adckey_reset();\n\n  hal_adckey_disable_allint();\n}\n#endif // (CFG_HW_ADCKEY_NUMBER > 0)\n\n#ifndef NO_PWRKEY\nstruct HAL_KEY_PWRKEY_T pwr_key;\n\nstatic inline POSSIBLY_UNUSED void hal_pwrkey_enable_riseedge_int(void) {\n  hal_pwrkey_set_irq(HAL_PWRKEY_IRQ_RISING_EDGE);\n}\n\nstatic inline POSSIBLY_UNUSED void hal_pwrkey_enable_falledge_int(void) {\n  hal_pwrkey_set_irq(HAL_PWRKEY_IRQ_FALLING_EDGE);\n}\n\nstatic inline POSSIBLY_UNUSED void hal_pwrkey_enable_bothedge_int(void) {\n  hal_pwrkey_set_irq(HAL_PWRKEY_IRQ_BOTH_EDGE);\n}\n\nstatic inline void hal_pwrkey_enable_int(void) {\n#ifdef __POWERKEY_CTRL_ONOFF_ONLY__\n  hal_pwrkey_enable_riseedge_int();\n#else\n  hal_pwrkey_enable_falledge_int();\n#endif\n}\n\nstatic inline void hal_pwrkey_disable_int(void) {\n  hal_pwrkey_set_irq(HAL_PWRKEY_IRQ_NONE);\n}\n\nstatic inline void hal_pwrkey_reset(void) {\n  memset(&pwr_key, 0, sizeof(pwr_key));\n}\n\nstatic inline bool hal_pwrkey_get_status(void) {\n#ifdef CHIP_BEST1000\n  if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_2) {\n    return pwr_key.pressed;\n  } else\n#endif\n  {\n    return hal_pwrkey_pressed();\n  }\n}\n\nstatic void hal_pwrkey_handle_irq_state(enum HAL_PWRKEY_IRQ_T state) {\n  //    uint32_t time = hal_sys_timer_get();\n\n#ifdef NO_GROUPKEY\n  hal_key_disable_allint();\n#else\n  hal_pwrkey_disable_int();\n#endif\n\n#ifdef __POWERKEY_CTRL_ONOFF_ONLY__\n\n  if (state & HAL_PWRKEY_IRQ_RISING_EDGE) {\n    HAL_KEY_TRACE(0, \"pwr_key irq up\");\n    pwr_key.debounce = true;\n  }\n\n#else // !__POWERKEY_CTRL_ONOFF_ONLY__\n\n  if (state & HAL_PWRKEY_IRQ_FALLING_EDGE) {\n    HAL_KEY_TRACE(0, \"pwr_key irq down\");\n#ifdef CHIP_BEST1000\n    if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_2) {\n      pwr_key.debounce = true;\n      pwr_key.pressed = true;\n      hal_pwrkey_enable_riseedge_int();\n    } else\n#endif\n    {\n      pwr_key.pressed = hal_pwrkey_pressed();\n      if (pwr_key.pressed) {\n        pwr_key.debounce = true;\n      } else {\n        pwr_key.dither = true;\n      }\n    }\n    // pwr_key.time = time;\n  }\n\n#ifdef CHIP_BEST1000\n  if (state & HAL_PWRKEY_IRQ_RISING_EDGE) {\n    if (hal_get_chip_metal_id() < HAL_CHIP_METAL_ID_2) {\n      HAL_KEY_TRACE(0, \"pwr_key irq up\");\n      pwr_key.pressed = false;\n      hal_pwrkey_enable_falledge_int();\n    }\n  }\n#endif\n\n#endif // !__POWERKEY_CTRL_ONOFF_ONLY__\n\n  hal_key_debounce_timer_restart();\n}\n\n#ifdef CHIP_HAS_EXT_PMU\n#define PWRKEY_IRQ_HDLR_PARAM uint16_t irq_status\n#else\n#define PWRKEY_IRQ_HDLR_PARAM void\n#endif\nstatic void hal_pwrkey_irqhandler(PWRKEY_IRQ_HDLR_PARAM) {\n  enum HAL_PWRKEY_IRQ_T state;\n\n#ifdef CHIP_HAS_EXT_PMU\n  state = pmu_pwrkey_irq_value_to_state(irq_status);\n#else\n  state = hal_pwrkey_get_irq_state();\n#endif\n\n  HAL_KEY_TRACE(2, \"%s: %08x\", __func__, state);\n\n  hal_pwrkey_handle_irq_state(state);\n}\n\nstatic void hal_pwrkey_open(void) {\n  hal_pwrkey_reset();\n\n#ifdef CHIP_HAS_EXT_PMU\n  pmu_set_irq_unified_handler(PMU_IRQ_TYPE_PWRKEY, hal_pwrkey_irqhandler);\n#else\n  NVIC_SetVector(PWRKEY_IRQn, (uint32_t)hal_pwrkey_irqhandler);\n  NVIC_SetPriority(PWRKEY_IRQn, IRQ_PRIORITY_NORMAL);\n  NVIC_ClearPendingIRQ(PWRKEY_IRQn);\n  NVIC_EnableIRQ(PWRKEY_IRQn);\n#endif\n}\n\nstatic void hal_pwrkey_close(void) {\n  hal_pwrkey_reset();\n\n  hal_pwrkey_disable_int();\n\n#ifdef CHIP_HAS_EXT_PMU\n  pmu_set_irq_unified_handler(PMU_IRQ_TYPE_PWRKEY, NULL);\n#else\n  NVIC_SetVector(PWRKEY_IRQn, (uint32_t)NULL);\n  NVIC_DisableIRQ(PWRKEY_IRQn);\n#endif\n}\n#endif // !NO_PWRKEY\n\n#if (CFG_HW_GPIOKEY_NUM > 0)\nstruct HAL_KEY_GPIOKEY_T gpio_key;\n\nstatic void hal_gpiokey_disable_irq(enum HAL_GPIO_PIN_T pin);\n\nstatic inline void hal_gpiokey_reset(void) {\n  memset(&gpio_key, 0, sizeof(gpio_key));\n}\n\nstatic int hal_gpiokey_find_index(enum HAL_GPIO_PIN_T pin) {\n  int i;\n\n  for (i = 0; i < CFG_HW_GPIOKEY_NUM; i++) {\n    if (cfg_hw_gpio_key_cfg[i].key_config.pin == (enum HAL_IOMUX_PIN_T)pin) {\n      return i;\n    }\n  }\n\n  ASSERT(i < CFG_HW_GPIOKEY_NUM, \"GPIOKEY IRQ: Invalid pin=%d\", pin);\n  return i;\n}\n\nstatic bool hal_gpiokey_pressed(enum HAL_GPIO_PIN_T pin) {\n  int i = hal_gpiokey_find_index(pin);\n  return (hal_gpio_pin_get_val(pin) == cfg_hw_gpio_key_cfg[i].key_down);\n}\n\nstatic void hal_gpiokey_irqhandler(enum HAL_GPIO_PIN_T pin) {\n  bool pressed;\n  uint32_t lock;\n  uint32_t time;\n\n#ifdef NO_GROUPKEY\n  hal_key_disable_allint();\n#else\n  hal_gpiokey_disable_irq(pin);\n#endif\n\n  pressed = hal_gpiokey_pressed(pin);\n  HAL_KEY_TRACE(2, \"gpio_key trig=%d pressed=%d\", pin, pressed);\n\n  time = hal_sys_timer_get();\n\n  lock = int_lock();\n  if (pressed) {\n    gpio_key.pin_debounce |= ((GPIO_MAP_T)1 << pin);\n    gpio_key.time_debounce = time;\n  } else {\n    gpio_key.pin_dither |= ((GPIO_MAP_T)1 << pin);\n    gpio_key.time_dither = time;\n  }\n  int_unlock(lock);\n\n  hal_key_debounce_timer_restart();\n}\n\nstatic void hal_gpiokey_enable_irq(enum HAL_GPIO_PIN_T pin,\n                                   enum HAL_GPIO_IRQ_POLARITY_T polarity) {\n  struct HAL_GPIO_IRQ_CFG_T gpiocfg;\n\n  hal_gpio_pin_set_dir(pin, HAL_GPIO_DIR_IN, 0);\n\n  gpiocfg.irq_enable = true;\n  gpiocfg.irq_debounce = true;\n  gpiocfg.irq_polarity = polarity;\n  gpiocfg.irq_handler = hal_gpiokey_irqhandler;\n  gpiocfg.irq_type = HAL_GPIO_IRQ_TYPE_LEVEL_SENSITIVE;\n\n  hal_gpio_setup_irq(pin, &gpiocfg);\n}\n\nstatic void hal_gpiokey_disable_irq(enum HAL_GPIO_PIN_T pin) {\n  static const struct HAL_GPIO_IRQ_CFG_T gpiocfg = {\n      .irq_enable = false,\n      .irq_debounce = false,\n      .irq_polarity = HAL_GPIO_IRQ_POLARITY_LOW_FALLING,\n      .irq_handler = NULL,\n      .irq_type = HAL_GPIO_IRQ_TYPE_LEVEL_SENSITIVE,\n  };\n\n  hal_gpio_setup_irq(pin, &gpiocfg);\n}\n\nstatic inline void hal_gpiokey_enable_allint(void) {\n  uint8_t i;\n  enum HAL_GPIO_IRQ_POLARITY_T polarity;\n\n  for (i = 0; i < CFG_HW_GPIOKEY_NUM; i++) {\n    if (cfg_hw_gpio_key_cfg[i].key_code == HAL_KEY_CODE_NONE) {\n      continue;\n    }\n\n    if (cfg_hw_gpio_key_cfg[i].key_down == HAL_KEY_GPIOKEY_VAL_LOW) {\n      polarity = HAL_GPIO_IRQ_POLARITY_LOW_FALLING;\n    } else {\n      polarity = HAL_GPIO_IRQ_POLARITY_HIGH_RISING;\n    }\n    hal_gpiokey_enable_irq(\n        (enum HAL_GPIO_PIN_T)cfg_hw_gpio_key_cfg[i].key_config.pin, polarity);\n  }\n}\n\nstatic inline void hal_gpiokey_disable_allint(void) {\n  uint8_t i;\n\n  for (i = 0; i < CFG_HW_GPIOKEY_NUM; i++) {\n    if (cfg_hw_gpio_key_cfg[i].key_code == HAL_KEY_CODE_NONE) {\n      continue;\n    }\n\n    hal_gpiokey_disable_irq(\n        (enum HAL_GPIO_PIN_T)cfg_hw_gpio_key_cfg[i].key_config.pin);\n  }\n}\n\nstatic void hal_gpiokey_open(void) {\n  uint8_t i;\n  HAL_KEY_TRACE(1, \"%s\\n\", __func__);\n\n  hal_gpiokey_reset();\n\n  for (i = 0; i < CFG_HW_GPIOKEY_NUM; i++) {\n    if (cfg_hw_gpio_key_cfg[i].key_code == HAL_KEY_CODE_NONE) {\n      continue;\n    }\n\n    hal_iomux_init(&cfg_hw_gpio_key_cfg[i].key_config, 1);\n  }\n}\n\nstatic void hal_gpiokey_close(void) {\n  HAL_KEY_TRACE(1, \"%s\\n\", __func__);\n\n  hal_gpiokey_reset();\n\n  hal_gpiokey_disable_allint();\n}\n#endif // (CFG_HW_GPIOKEY_NUM > 0)\n\nenum HAL_KEY_EVENT_T hal_key_read_status(enum HAL_KEY_CODE_T code) {\n  uint8_t gpio_val;\n  int i;\n\n  if (code == HAL_KEY_CODE_PWR) {\n    if (hal_pwrkey_pressed())\n      return HAL_KEY_EVENT_DOWN;\n    else\n      return HAL_KEY_EVENT_UP;\n  } else {\n    for (i = 0; i < CFG_HW_GPIOKEY_NUM; i++) {\n      if (cfg_hw_gpio_key_cfg[i].key_code == code) {\n        gpio_val = hal_gpio_pin_get_val(\n            (enum HAL_GPIO_PIN_T)cfg_hw_gpio_key_cfg[i].key_config.pin);\n        if (gpio_val == cfg_hw_gpio_key_cfg[i].key_down) {\n          return HAL_KEY_EVENT_DOWN;\n        } else {\n          return HAL_KEY_EVENT_UP;\n        }\n      }\n    }\n  }\n  return HAL_KEY_EVENT_NONE;\n}\n\nstatic void hal_key_disable_allint(void) {\n#ifndef NO_PWRKEY\n  hal_pwrkey_disable_int();\n#endif\n\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n  hal_adckey_disable_allint();\n#endif\n\n#if (CFG_HW_GPIOKEY_NUM > 0)\n  hal_gpiokey_disable_allint();\n#endif\n}\n\nstatic void hal_key_enable_allint(void) {\n#ifndef NO_PWRKEY\n  hal_pwrkey_enable_int();\n#endif\n\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n  hal_adckey_enable_press_int();\n#endif\n\n#if (CFG_HW_GPIOKEY_NUM > 0)\n  hal_gpiokey_enable_allint();\n#endif\n}\n\nstatic void hal_key_debounce_handler(void *param) {\n  uint32_t time;\n  enum HAL_KEY_CODE_T code_down = HAL_KEY_CODE_NONE;\n  int index;\n  bool need_timer = false;\n\n  timer_active = false;\n\n  time = hal_sys_timer_get();\n\n#ifndef NO_PWRKEY\n#ifdef __POWERKEY_CTRL_ONOFF_ONLY__\n  if (pwr_key.debounce) {\n    pwr_key.debounce = false;\n    code_down |= HAL_KEY_CODE_PWR;\n#ifdef NO_GROUPKEY\n    hal_key_enable_allint();\n#else\n    hal_pwrkey_enable_int();\n#endif\n  }\n#else\n  if (pwr_key.debounce || pwr_key.dither || pwr_key.pressed) {\n    bool pressed = hal_pwrkey_get_status();\n\n    // HAL_KEY_TRACE(4,\"keyDbnPwr: dbn=%d dither=%d pressed=%d/%d\",\n    // pwr_key.debounce, pwr_key.dither, pwr_key.pressed, pressed);\n\n    if (pwr_key.debounce) {\n      pwr_key.pressed = pressed;\n      if (pressed) {\n        pwr_key.dither = false;\n        if (time - pwr_key.time >= KEY_DEBOUNCE_INTERVAL) {\n          pwr_key.debounce = false;\n          pwr_key.dither = false;\n          code_down |= HAL_KEY_CODE_PWR;\n        }\n      } else {\n        pwr_key.debounce = false;\n        pwr_key.dither = true;\n        pwr_key.time = time;\n      }\n    } else if (pwr_key.dither) {\n      if (time - pwr_key.time >= KEY_DITHER_INTERVAL) {\n        pwr_key.dither = false;\n        pwr_key.pressed = false;\n#ifdef NO_GROUPKEY\n        hal_key_enable_allint();\n#else\n        hal_pwrkey_enable_int();\n#endif\n      }\n    } else if (pwr_key.pressed) {\n      if (pressed) {\n        code_down |= HAL_KEY_CODE_PWR;\n      } else {\n        pwr_key.pressed = false;\n#ifdef NO_GROUPKEY\n        hal_key_enable_allint();\n#else\n        hal_pwrkey_enable_int();\n#endif\n      }\n    }\n  }\n  if (pwr_key.debounce || pwr_key.dither || pwr_key.pressed) {\n    need_timer = true;\n  }\n#endif\n#endif\n\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n  if (adc_key.debounce || adc_key.dither ||\n      adc_key.code_down != HAL_KEY_CODE_NONE) {\n    bool skip_check = false;\n\n    // HAL_KEY_TRACE(4,\"keyDbnAdc: dbn=%d dither=%d code_dbn=0x%X\n    // code_down=0x%X\", adc_key.debounce, adc_key.dither, adc_key.code_debounce,\n    // adc_key.code_down);\n\n    if (adc_key.debounce) {\n      if (adc_key.code_debounce == HAL_KEY_CODE_NONE) {\n        adc_key.debounce = false;\n        adc_key.dither = true;\n        adc_key.time = time;\n      } else {\n        if (time - adc_key.time >= KEY_DEBOUNCE_INTERVAL) {\n          adc_key.debounce = false;\n          adc_key.dither = false;\n          adc_key.code_down = adc_key.code_debounce;\n          adc_key.code_debounce = HAL_KEY_CODE_NONE;\n          code_down |= adc_key.code_down;\n        }\n      }\n    } else if (adc_key.dither) {\n      if (time - adc_key.time >= KEY_DITHER_INTERVAL) {\n        adc_key.dither = false;\n        adc_key.code_debounce = HAL_KEY_CODE_NONE;\n        adc_key.code_down = HAL_KEY_CODE_NONE;\n#ifdef NO_GROUPKEY\n        hal_key_enable_allint();\n#else\n        hal_adckey_enable_press_int();\n#endif\n      }\n      skip_check = true;\n    } else if (adc_key.code_down != HAL_KEY_CODE_NONE) {\n      if (adc_key.code_debounce == adc_key.code_down) {\n        code_down |= adc_key.code_down;\n      } else {\n        adc_key.code_down = HAL_KEY_CODE_NONE;\n#ifdef NO_GROUPKEY\n        hal_key_enable_allint();\n#else\n        hal_adckey_enable_press_int();\n#endif\n        skip_check = true;\n      }\n    }\n\n    if (!skip_check) {\n      hal_adckey_enable_adc_int();\n    }\n  }\n  if (adc_key.debounce || adc_key.dither ||\n      adc_key.code_down != HAL_KEY_CODE_NONE) {\n    need_timer = true;\n  }\n#endif\n\n#if (CFG_HW_GPIOKEY_NUM > 0)\n  enum HAL_GPIO_PIN_T gpio;\n  GPIO_MAP_T pin;\n  uint32_t lock;\n\n#ifdef GPIO_MAP_64BIT\n  ASSERT((gpio_key.pin_debounce & gpio_key.pin_dither) == 0 &&\n             (gpio_key.pin_debounce & gpio_key.pin_dither) == 0 &&\n             (gpio_key.pin_debounce & gpio_key.pin_dither) == 0,\n         \"Bad gpio_key pin map: dbn=0x%X-%X dither=0x%X-%X down=0x%X-%X\",\n         (uint32_t)(gpio_key.pin_debounce >> 32),\n         (uint32_t)(gpio_key.pin_debounce),\n         (uint32_t)(gpio_key.pin_dither >> 32), (uint32_t)(gpio_key.pin_dither),\n         (uint32_t)(gpio_key.pin_down >> 32), (uint32_t)(gpio_key.pin_down));\n#if 0\n        HAL_KEY_TRACE(6,\"keyDbnGpio: pin_dbn=0x%X-%X pin_dither=0x%X-%X pin_down=0x%X-%X\",\n            (uint32_t)(gpio_key.pin_debounce >> 32), (uint32_t)(gpio_key.pin_debounce),\n            (uint32_t)(gpio_key.pin_dither >> 32), (uint32_t)(gpio_key.pin_dither),\n            (uint32_t)(gpio_key.pin_down >> 32), (uint32_t)(gpio_key.pin_down));\n#endif\n#else // !GPIO_MAP_64BIT\n  ASSERT((gpio_key.pin_debounce & gpio_key.pin_dither) == 0 &&\n             (gpio_key.pin_debounce & gpio_key.pin_dither) == 0 &&\n             (gpio_key.pin_debounce & gpio_key.pin_dither) == 0,\n         \"Bad gpio_key pin map: dbn=0x%X dither=0x%X down=0x%X\",\n         (uint32_t)gpio_key.pin_debounce, (uint32_t)gpio_key.pin_dither,\n         (uint32_t)gpio_key.pin_down);\n#if 0\n        HAL_KEY_TRACE(3,\"keyDbnGpio: pin_dbn=0x%X pin_dither=0x%X pin_down=0x%X\",\n            (uint32_t)gpio_key.pin_debounce, (uint32_t)gpio_key.pin_dither, (uint32_t)gpio_key.pin_down);\n#endif\n#endif // !GPIO_MAP_64BIT\n\n  if (gpio_key.pin_dither) {\n    if (time - gpio_key.time_dither >= KEY_DITHER_INTERVAL) {\n      pin = gpio_key.pin_dither;\n\n      lock = int_lock();\n      gpio_key.pin_dither &= ~pin;\n      int_unlock(lock);\n\n#ifdef NO_GROUPKEY\n      hal_key_enable_allint();\n#else\n      gpio = HAL_GPIO_PIN_P0_0;\n      while (pin) {\n        if (pin & ((GPIO_MAP_T)1 << gpio)) {\n          pin &= ~((GPIO_MAP_T)1 << gpio);\n          index = hal_gpiokey_find_index(gpio);\n          hal_gpiokey_enable_irq(gpio, (cfg_hw_gpio_key_cfg[index].key_down ==\n                                        HAL_KEY_GPIOKEY_VAL_LOW)\n                                           ? HAL_GPIO_IRQ_POLARITY_LOW_FALLING\n                                           : HAL_GPIO_IRQ_POLARITY_HIGH_RISING);\n        }\n        gpio++;\n      }\n#endif\n    }\n  }\n  if (gpio_key.pin_down) {\n    pin = gpio_key.pin_down;\n\n    gpio = HAL_GPIO_PIN_P0_0;\n    while (pin) {\n      if (pin & ((GPIO_MAP_T)1 << gpio)) {\n        pin &= ~((GPIO_MAP_T)1 << gpio);\n        index = hal_gpiokey_find_index(gpio);\n        if (hal_gpio_pin_get_val(gpio) == cfg_hw_gpio_key_cfg[index].key_down) {\n          code_down |= cfg_hw_gpio_key_cfg[index].key_code;\n        } else {\n          gpio_key.pin_down &= ~((GPIO_MAP_T)1 << gpio);\n#ifdef NO_GROUPKEY\n          hal_key_enable_allint();\n#else\n          hal_gpiokey_enable_irq(gpio, (cfg_hw_gpio_key_cfg[index].key_down ==\n                                        HAL_KEY_GPIOKEY_VAL_LOW)\n                                           ? HAL_GPIO_IRQ_POLARITY_LOW_FALLING\n                                           : HAL_GPIO_IRQ_POLARITY_HIGH_RISING);\n#endif\n        }\n      }\n      gpio++;\n    }\n  }\n  if (gpio_key.pin_debounce) {\n    GPIO_MAP_T down_added = 0;\n    GPIO_MAP_T dither_added = 0;\n\n    pin = gpio_key.pin_debounce;\n\n    gpio = HAL_GPIO_PIN_P0_0;\n    while (pin) {\n      if (pin & ((GPIO_MAP_T)1 << gpio)) {\n        pin &= ~((GPIO_MAP_T)1 << gpio);\n        index = hal_gpiokey_find_index(gpio);\n        if (hal_gpio_pin_get_val(gpio) == cfg_hw_gpio_key_cfg[index].key_down) {\n          if (time - gpio_key.time_debounce >= KEY_DEBOUNCE_INTERVAL) {\n            down_added |= ((GPIO_MAP_T)1 << gpio);\n            code_down |= cfg_hw_gpio_key_cfg[index].key_code;\n            gpio_key.pin_down |= ((GPIO_MAP_T)1 << gpio);\n          }\n        } else {\n          dither_added |= ((GPIO_MAP_T)1 << gpio);\n        }\n      }\n      gpio++;\n    }\n\n    lock = int_lock();\n    gpio_key.pin_debounce &= ~(down_added | dither_added);\n    gpio_key.pin_dither |= dither_added;\n    int_unlock(lock);\n  }\n  if (gpio_key.pin_dither || gpio_key.pin_down || gpio_key.pin_debounce) {\n    need_timer = true;\n  }\n#endif\n\n  enum HAL_KEY_CODE_T down_new;\n  enum HAL_KEY_CODE_T up_new;\n  enum HAL_KEY_CODE_T map;\n\n  down_new = code_down & ~key_status.code_down;\n  up_new = ~code_down & key_status.code_down;\n\n  // HAL_KEY_TRACE(5,\"keyDbn: code_down=0x%X/0x%X down_new=0x%X up_new=0x%X\n  // event=%d\", key_status.code_down, code_down, down_new, up_new,\n  // key_status.event);\n\n  // Check newly up keys\n  map = up_new;\n  index = 0;\n  while (map) {\n    if (map & (1 << index)) {\n      map &= ~(1 << index);\n      send_key_event((1 << index), HAL_KEY_EVENT_UP);\n      if (key_status.event == HAL_KEY_EVENT_LONGPRESS ||\n          key_status.event == HAL_KEY_EVENT_LONGLONGPRESS) {\n        send_key_event((1 << index), HAL_KEY_EVENT_UP_AFTER_LONGPRESS);\n      }\n      key_status.time_updown = time;\n    }\n    index++;\n  }\n\n  if (up_new) {\n    if (key_status.event == HAL_KEY_EVENT_LONGPRESS ||\n        key_status.event == HAL_KEY_EVENT_LONGLONGPRESS) {\n      // LongPress is finished when all of the LongPress keys are released\n      if ((code_down & key_status.code_ready) == 0) {\n        key_status.event = HAL_KEY_EVENT_NONE;\n      }\n    } else if (key_status.event == HAL_KEY_EVENT_DOWN) {\n      // Enter click handling if not in LongPress\n      key_status.event = HAL_KEY_EVENT_UP;\n    }\n  }\n\n  if (key_status.event == HAL_KEY_EVENT_UP) {\n    // ASSERT(key_status.code_ready != HAL_KEY_CODE_NONE, \"Bad code_ready\");\n\n    if (key_status.code_click == HAL_KEY_CODE_NONE ||\n        key_status.code_click != key_status.code_ready) {\n      if (key_status.code_click != HAL_KEY_CODE_NONE) {\n        send_key_event(key_status.code_click,\n                       HAL_KEY_EVENT_CLICK + key_status.cnt_click);\n      }\n      key_status.code_click = key_status.code_ready;\n      key_status.cnt_click = 0;\n      key_status.time_click = time;\n    } else if (up_new &&\n               (up_new | key_status.code_down) == key_status.code_click) {\n      key_status.cnt_click++;\n      key_status.time_click = time;\n    }\n    if (time - key_status.time_click >= KEY_DOUBLECLICK_THRESHOLD ||\n        key_status.cnt_click >= MAX_KEY_CLICK_COUNT) {\n      send_key_event(key_status.code_click,\n                     HAL_KEY_EVENT_CLICK + key_status.cnt_click);\n      key_status.code_click = HAL_KEY_CODE_NONE;\n      key_status.cnt_click = 0;\n      key_status.event = HAL_KEY_EVENT_NONE;\n    }\n  }\n\n  // Update key_status.code_down\n  key_status.code_down = code_down;\n\n  // Check newly down keys and update key_status.code_ready\n  map = down_new;\n  index = 0;\n  while (map) {\n    if (map & (1 << index)) {\n      map &= ~(1 << index);\n      send_key_event((1 << index), HAL_KEY_EVENT_DOWN);\n      if (key_status.event == HAL_KEY_EVENT_NONE) {\n        send_key_event((1 << index), HAL_KEY_EVENT_FIRST_DOWN);\n      } else {\n        send_key_event((1 << index), HAL_KEY_EVENT_CONTINUED_DOWN);\n      }\n      if (key_status.event == HAL_KEY_EVENT_NONE ||\n          key_status.event == HAL_KEY_EVENT_DOWN ||\n          key_status.event == HAL_KEY_EVENT_UP) {\n        key_status.code_ready = code_down;\n      }\n      key_status.time_updown = time;\n    }\n    index++;\n  }\n\n  if (down_new) {\n    if (key_status.event == HAL_KEY_EVENT_NONE ||\n        key_status.event == HAL_KEY_EVENT_UP) {\n      key_status.event = HAL_KEY_EVENT_DOWN;\n    }\n  }\n\n  // LongPress should be stopped if any key is released\n  if ((code_down & key_status.code_ready) == key_status.code_ready) {\n    if (key_status.event == HAL_KEY_EVENT_DOWN) {\n      if (time - key_status.time_updown >= KEY_LONGPRESS_THRESHOLD) {\n        key_status.cnt_repeat = 0;\n        key_status.event = HAL_KEY_EVENT_LONGPRESS;\n        send_key_event(key_status.code_ready, key_status.event);\n      }\n    } else if (key_status.event == HAL_KEY_EVENT_LONGPRESS ||\n               key_status.event == HAL_KEY_EVENT_LONGLONGPRESS) {\n      key_status.cnt_repeat++;\n      if (key_status.cnt_repeat ==\n          KEY_LONGPRESS_REPEAT_THRESHOLD / KEY_CHECKER_INTERVAL) {\n        key_status.cnt_repeat = 0;\n        send_key_event(key_status.code_ready, HAL_KEY_EVENT_REPEAT);\n      }\n      if (key_status.event == HAL_KEY_EVENT_LONGPRESS) {\n        if (time - key_status.time_updown >= KEY_LONGLONGPRESS_THRESHOLD) {\n          key_status.event = HAL_KEY_EVENT_LONGLONGPRESS;\n          send_key_event(key_status.code_ready, key_status.event);\n        }\n      }\n    }\n  }\n\n  if (key_status.event != HAL_KEY_EVENT_NONE) {\n    need_timer = true;\n  }\n\n  if (need_timer) {\n    hal_key_debounce_timer_restart();\n  } else {\n    // hal_sys_wake_unlock(HAL_SYS_WAKE_LOCK_USER_KEY);\n  }\n}\n\n#if 0 // def CHECK_PWRKEY_AT_BOOT\nstatic void hal_key_boot_handler(void *param)\n{\n#ifndef NO_PWRKEY\n    uint32_t time;\n\n    timer_active = false;\n\n    time = hal_sys_timer_get();\n\n    if (pwr_key.debounce || pwr_key.dither || pwr_key.pressed) {\n        bool pressed = hal_pwrkey_get_status();\n\n        //HAL_KEY_TRACE(5,\"keyBoot: dbn=%d dither=%d pressed=%d/%d event=%d\", pwr_key.debounce, pwr_key.dither, pwr_key.pressed, pressed, key_status.event);\n\n        if (pwr_key.debounce) {\n            pwr_key.pressed = pressed;\n            if (pressed) {\n                pwr_key.dither = false;\n                if (time - pwr_key.time >= KEY_DEBOUNCE_INTERVAL) {\n                    pwr_key.debounce = false;\n                    key_status.time_updown = time;\n                }\n            } else {\n                pwr_key.debounce = false;\n                pwr_key.dither = true;\n                pwr_key.time = time;\n            }\n        } else if (pwr_key.dither) {\n            if (time - pwr_key.time >= KEY_DITHER_INTERVAL) {\n                pwr_key.dither = false;\n                pwr_key.pressed = false;\n            }\n        } else if (pwr_key.pressed) {\n            if (!pressed) {\n                pwr_key.pressed = false;\n            }\n        }\n    }\n    if (pwr_key.debounce || pwr_key.dither || pwr_key.pressed) {\n        if (pwr_key.pressed) {\n            if (key_status.event == HAL_KEY_EVENT_NONE) {\n                if (time - key_status.time_updown >= KEY_INIT_DOWN_THRESHOLD) {\n                    key_status.event = HAL_KEY_EVENT_INITDOWN;\n                    send_key_event(HAL_KEY_CODE_PWR, key_status.event);\n                }\n            } else if (key_status.event == HAL_KEY_EVENT_INITDOWN) {\n                if (time - key_status.time_updown >= KEY_INIT_LONGPRESS_THRESHOLD) {\n                    key_status.cnt_repeat = 0;\n                    key_status.event = HAL_KEY_EVENT_INITLONGPRESS;\n                    send_key_event(HAL_KEY_CODE_PWR, key_status.event);\n                }\n            } else if (key_status.event == HAL_KEY_EVENT_INITLONGPRESS) {\n                if (time - key_status.time_updown >= KEY_INIT_LONGLONGPRESS_THRESHOLD) {\n                    key_status.event = HAL_KEY_EVENT_INITLONGLONGPRESS;\n                    send_key_event(HAL_KEY_CODE_PWR, key_status.event);\n                }\n            }\n        }\n        hal_key_debounce_timer_restart();\n    } else {\n        if (key_status.event == HAL_KEY_EVENT_NONE || key_status.event == HAL_KEY_EVENT_INITDOWN) {\n            send_key_event(HAL_KEY_CODE_PWR, HAL_KEY_EVENT_INITUP);\n        }\n        send_key_event(HAL_KEY_CODE_PWR, HAL_KEY_EVENT_INITFINISHED);\n\n        hwtimer_update(debounce_timer, hal_key_debounce_handler, NULL);\n        //hal_sys_wake_unlock(HAL_SYS_WAKE_LOCK_USER_KEY);\n\n        memset(&key_status, 0, sizeof(key_status));\n        hal_pwrkey_reset();\n        hal_key_enable_allint();\n    }\n#endif\n}\n#endif // CHECK_PWRKEY_AT_BOOT\n\nint hal_key_open(int checkPwrKey, int (*cb)(uint32_t, uint8_t)) {\n  int nRet = 0;\n  uint32_t lock;\n\n  key_detected_callback = cb;\n\n  memset(&key_status, 0, sizeof(key_status));\n\n  lock = int_lock();\n\n#ifdef CHECK_PWRKEY_AT_BOOT\n  if (checkPwrKey) {\n    int cnt;\n    int i = 0;\n\n    cnt = 10;\n    do {\n      hal_sys_timer_delay(MS_TO_TICKS(150));\n      if (!hal_pwrkey_startup_pressed()) {\n        HAL_KEY_TRACE(0, \"pwr_key init DITHERING\");\n        nRet = -1;\n        goto _exit;\n      }\n    } while (++i < cnt);\n  }\n#endif\n\n#ifndef NO_PWRKEY\n  hal_pwrkey_open();\n#endif\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n  hal_adckey_open();\n#endif\n#if (CFG_HW_GPIOKEY_NUM > 0)\n  hal_gpiokey_open();\n#endif\n\n#ifdef CHECK_PWRKEY_AT_BOOT\n#ifndef __POWERKEY_CTRL_ONOFF_ONLY__\n  if (checkPwrKey) {\n    debounce_timer = hwtimer_alloc(hal_key_boot_handler, NULL);\n    hal_pwrkey_handle_irq_state(HAL_PWRKEY_IRQ_FALLING_EDGE);\n  } else\n#endif\n#endif\n  {\n    debounce_timer = hwtimer_alloc(hal_key_debounce_handler, NULL);\n    hal_key_enable_allint();\n  }\n\n  ASSERT(debounce_timer, \"Failed to alloc key debounce timer\");\n\n  goto _exit; // Avoid compiler warnings\n\n_exit:\n  int_unlock(lock);\n\n  return nRet;\n}\n\nint hal_key_close(void) {\n  hal_key_disable_allint();\n\n#ifndef NO_PWRKEY\n  hal_pwrkey_close();\n#endif\n#if (CFG_HW_ADCKEY_NUMBER > 0)\n  hal_adckey_close();\n#endif\n#if (CFG_HW_GPIOKEY_NUM > 0)\n  hal_gpiokey_close();\n#endif\n\n  if (debounce_timer) {\n    hwtimer_stop(debounce_timer);\n    hwtimer_free(debounce_timer);\n    debounce_timer = NULL;\n  }\n  timer_active = false;\n  key_detected_callback = NULL;\n\n  // hal_sys_wake_unlock(HAL_SYS_WAKE_LOCK_USER_KEY);\n\n  return 0;\n}\n"
  },
  {
    "path": "platform/hal/hal_key.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_KEY_H__\n#define __HAL_KEY_H__\n\n#include \"hal_gpio.h\"\n#include \"hal_gpadc.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum HAL_KEY_CODE_T {\n    HAL_KEY_CODE_NONE = 0,\n    HAL_KEY_CODE_PWR = (1 << 0),\n    HAL_KEY_CODE_FN1 = (1 << 1),\n    HAL_KEY_CODE_FN2 = (1 << 2),\n    HAL_KEY_CODE_FN3 = (1 << 3),\n    HAL_KEY_CODE_FN4 = (1 << 4),\n    HAL_KEY_CODE_FN5 = (1 << 5),\n    HAL_KEY_CODE_FN6 = (1 << 6),\n    HAL_KEY_CODE_FN7 = (1 << 7),\n    HAL_KEY_CODE_FN8 = (1 << 8),\n    HAL_KEY_CODE_FN9 = (1 << 9),\n    HAL_KEY_CODE_FN10 = (1 << 10),\n    HAL_KEY_CODE_FN11 = (1 << 11),\n    HAL_KEY_CODE_FN12 = (1 << 12),\n\tHAL_KEY_CODE_FN13 = (1 << 13),\n\tHAL_KEY_CODE_FN14 = (1 << 14),\n\tHAL_KEY_CODE_FN15 = (1 << 15),\n};\n\nenum HAL_KEY_EVENT_T {\n    HAL_KEY_EVENT_NONE = 0,\n    HAL_KEY_EVENT_DOWN,                 // 1\n    HAL_KEY_EVENT_FIRST_DOWN,           // 2\n    HAL_KEY_EVENT_CONTINUED_DOWN,       // 3 \n    HAL_KEY_EVENT_UP,                   // 4\n    HAL_KEY_EVENT_UP_AFTER_LONGPRESS,   // 5\n    HAL_KEY_EVENT_LONGPRESS,            // 6\n    HAL_KEY_EVENT_LONGLONGPRESS,        // 7\n    HAL_KEY_EVENT_CLICK,                // 8\n    HAL_KEY_EVENT_DOUBLECLICK,          // 9\n    HAL_KEY_EVENT_TRIPLECLICK,          // 10\n    HAL_KEY_EVENT_ULTRACLICK,           // 11\n    HAL_KEY_EVENT_RAMPAGECLICK,         // 12\n    HAL_KEY_EVENT_SIXTHCLICK,           // 13\n    HAL_KEY_EVENT_SEVENTHCLICK,         // 14\n    HAL_KEY_EVENT_EIGHTHCLICK,          // 15\n    HAL_KEY_EVENT_NINETHCLICK,          // 16\n    HAL_KEY_EVENT_TENTHCLICK,           // 17\n    HAL_KEY_EVENT_REPEAT,               // 18\n    HAL_KEY_EVENT_GROUPKEY_DOWN,        // 19\n    HAL_KEY_EVENT_GROUPKEY_REPEAT,      // 20\n    HAL_KEY_EVENT_INITDOWN,             // 21\n    HAL_KEY_EVENT_INITUP,               // 22\n    HAL_KEY_EVENT_INITLONGPRESS,        // 23\n    HAL_KEY_EVENT_INITLONGLONGPRESS,    // 24\n    HAL_KEY_EVENT_INITFINISHED,         // 25\n\n    HAL_KEY_EVENT_NUM,\n};\n\n#define KEY_EVENT_SET(a)                (1 << HAL_KEY_EVENT_ ## a)\n#define KEY_EVENT_SET2(a, b)            (KEY_EVENT_SET(a) | KEY_EVENT_SET(b))\n#define KEY_EVENT_SET3(a, b, c)         (KEY_EVENT_SET2(a, b) | KEY_EVENT_SET(c))\n#define KEY_EVENT_SET4(a, b, c, d)      (KEY_EVENT_SET3(a, b, c) | KEY_EVENT_SET(d))\n\nenum HAL_KEY_GPIOKEY_VAL_T {\n    HAL_KEY_GPIOKEY_VAL_LOW = 0,\n    HAL_KEY_GPIOKEY_VAL_HIGH,\n};\n\nstruct HAL_KEY_GPIOKEY_CFG_T {\n    enum HAL_KEY_CODE_T key_code;\n    struct HAL_IOMUX_PIN_FUNCTION_MAP key_config;\n    enum HAL_KEY_GPIOKEY_VAL_T key_down;\n};\n\nint hal_key_open(int checkPwrKey, int (* cb)(uint32_t, uint8_t));\n\nenum HAL_KEY_EVENT_T hal_key_read_status(enum HAL_KEY_CODE_T code);\n\nint hal_key_close(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n#endif//__FMDEC_H__\n"
  },
  {
    "path": "platform/hal/hal_location.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_LOCATION_H__\n#define __HAL_LOCATION_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define HAL_SEC_CONCAT_2(a, b)          a.b\n#define HAL_SEC_CONCAT_3(a, b, c)       a.b.c\n\n#define HAL_SEC_TO_STR_A(s)             #s\n#define HAL_SEC_TO_STR(s)               HAL_SEC_TO_STR_A(s)\n\n#define HAL_SEC_NAME_ATTR(s)            __attribute__((section(s)))\n\n#define HAL_SEC_DEF(section, name)      HAL_SEC_NAME_ATTR(HAL_SEC_TO_STR(HAL_SEC_CONCAT_2(section, name))) name\n#ifdef __COUNTER__\n#define HAL_SEC_LOC(section)            HAL_SEC_NAME_ATTR(HAL_SEC_TO_STR(HAL_SEC_CONCAT_3(section, __LINE__, __COUNTER__)))\n#else\n#define HAL_SEC_LOC(section)            HAL_SEC_NAME_ATTR(HAL_SEC_TO_STR(HAL_SEC_CONCAT_2(section, __LINE__)))\n#endif\n\n#if defined(__GNUC__) && !((defined(ROM_BUILD) && !defined(ROM_IN_FLASH)) || defined(PROGRAMMER))\n\n#define BOOT_TEXT_SRAM_LOC              HAL_SEC_LOC(.boot_text_sram)\n#define BOOT_TEXT_SRAM_DEF(n)           HAL_SEC_DEF(.boot_text_sram, n)\n#define BOOT_TEXT_FLASH_LOC             HAL_SEC_LOC(.boot_text_flash)\n#define BOOT_TEXT_FLASH_DEF(n)          HAL_SEC_DEF(.boot_text_flash, n)\n#define BOOT_RODATA_SRAM_LOC            HAL_SEC_LOC(.boot_rodata_sram)\n#define BOOT_RODATA_SRAM_DEF(n)         HAL_SEC_DEF(.boot_rodata_sram, n)\n#define BOOT_RODATA_FLASH_LOC           HAL_SEC_LOC(.boot_rodata_flash)\n#define BOOT_RODATA_FLASH_DEF(n)        HAL_SEC_DEF(.boot_rodata_flash, n)\n#define BOOT_DATA_LOC                   HAL_SEC_LOC(.boot_data)\n#define BOOT_DATA_DEF(n)                HAL_SEC_DEF(.boot_data, n)\n#ifdef __ARMCC_VERSION\n#define BOOT_BSS_LOC                    HAL_SEC_LOC(.bss.boot_bss)\n#define BOOT_BSS_DEF(n)                 HAL_SEC_DEF(.bss.boot_bss, n)\n#else\n#define BOOT_BSS_LOC                    HAL_SEC_LOC(.boot_bss)\n#define BOOT_BSS_DEF(n)                 HAL_SEC_DEF(.boot_bss, n)\n#endif\n\n#define SRAM_TEXT_LOC                   HAL_SEC_LOC(.sram_text)\n#define SRAM_TEXT_DEF(n)                HAL_SEC_DEF(.sram_text, n)\n#define SRAM_DATA_LOC                   HAL_SEC_LOC(.sram_data)\n#define SRAM_DATA_DEF(n)                HAL_SEC_DEF(.sram_data, n)\n#define SRAM_STACK_LOC                  ALIGNED(8) HAL_SEC_LOC(.sram_data)\n#define SRAM_STACK_DEF(n)               ALIGNED(8) HAL_SEC_LOC(.sram_data, n)\n#ifdef __ARMCC_VERSION\n#define SRAM_BSS_LOC                    HAL_SEC_LOC(.bss.sram_bss)\n#define SRAM_BSS_DEF(n)                 HAL_SEC_DEF(.bss.sram_bss, n)\n#else\n#define SRAM_BSS_LOC                    HAL_SEC_LOC(.sram_bss)\n#define SRAM_BSS_DEF(n)                 HAL_SEC_DEF(.sram_bss, n)\n#endif\n\n#define FRAM_TEXT_LOC                   HAL_SEC_LOC(.fast_text_sram)\n#define FRAM_TEXT_DEF(n)                HAL_SEC_DEF(.fast_text_sram, n)\n\n#define CP_TEXT_SRAM_LOC                HAL_SEC_LOC(.cp_text_sram)\n#define CP_TEXT_SRAM_DEF(n)             HAL_SEC_DEF(.cp_text_sram, n)\n#define CP_DATA_LOC                     HAL_SEC_LOC(.cp_data)\n#define CP_DATA_DEF(n)                  HAL_SEC_DEF(.cp_data, n)\n#ifdef __ARMCC_VERSION\n#define CP_BSS_LOC                      HAL_SEC_LOC(.bss.cp_bss)\n#define CP_BSS_DEF(n)                   HAL_SEC_DEF(.bss.cp_bss, n)\n#else\n#define CP_BSS_LOC                      HAL_SEC_LOC(.cp_bss)\n#define CP_BSS_DEF(n)                   HAL_SEC_DEF(.cp_bss, n)\n#endif\n\n#define FLASH_TEXT_LOC                  HAL_SEC_LOC(.flash_text)\n#define FLASH_TEXT_DEF(n)               HAL_SEC_DEF(.flash_text, n)\n#define FLASH_RODATA_LOC                HAL_SEC_LOC(.flash_rodata)\n#define FLASH_RODATA_DEF(n)             HAL_SEC_DEF(.flash_rodata, n)\n\n#define REBOOT_CUSTOM_PARAM_LOC         HAL_SEC_LOC(.reboot_custom_param)\n#define REBOOT_CUSTOM_PARAM_DEF         HAL_SEC_DEF(.reboot_custom_param)\n\n#else\n\n#define BOOT_TEXT_SRAM_LOC\n#define BOOT_TEXT_SRAM_DEF(n)           n\n#if defined(__GNUC__) && defined(PROGRAMMER_INFLASH)\n#define BOOT_TEXT_FLASH_LOC             HAL_SEC_LOC(.boot_text_flash)\n#define BOOT_TEXT_FLASH_DEF(n)          HAL_SEC_DEF(.boot_text_flash, n)\n#else\n#define BOOT_TEXT_FLASH_LOC\n#define BOOT_TEXT_FLASH_DEF(n)          n\n#endif\n#define BOOT_RODATA_SRAM_LOC\n#define BOOT_RODATA_SRAM_DEF(n)         n\n#define BOOT_RODATA_FLASH_LOC\n#define BOOT_RODATA_FLASH_DEF(n)        n\n#define BOOT_DATA_LOC\n#define BOOT_DATA_DEF(n)                n\n#define BOOT_BSS_LOC\n#define BOOT_BSS_DEF(n)                 n\n\n#define SRAM_TEXT_LOC\n#define SRAM_TEXT_DEF(n)                n\n#define SRAM_DATA_LOC\n#define SRAM_DATA_DEF(n)                n\n#define SRAM_STACK_LOC\n#define SRAM_STACK_DEF(n)               n\n#define SRAM_BSS_LOC\n#define SRAM_BSS_DEF(n)                 n\n\n#define FRAM_TEXT_LOC\n#define FRAM_TEXT_DEF(n)                n\n\n#define CP_TEXT_SRAM_LOC\n#define CP_TEXT_SRAM_DEF(n)             n\n#define CP_DATA_LOC\n#define CP_DATA_DEF(n)                  n\n#define CP_BSS_LOC\n#define CP_BSS_DEF(n)                   n\n\n#define FLASH_TEXT_LOC\n#define FLASH_TEXT_DEF(n)               n\n#define FLASH_RODATA_LOC\n#define FLASH_RODATA_DEF(n)             n\n\n#define REBOOT_CUSTOM_PARAM_LOC\n#define REBOOT_CUSTOM_PARAM_DEF(n)      n\n\n#endif // !__GNUC__ || ROM_BUILD || PROGRAMMER\n\n#if defined(__GNUC__) && defined(__ARM_ARCH_ISA_ARM)\n#define SYNC_FLAGS_LOC                  HAL_SEC_LOC(.sync_flags)\n#define SYNC_FLAGS_DEF(n)               HAL_SEC_DEF(.sync_flags, n)\n#else\n#define SYNC_FLAGS_LOC\n#define SYNC_FLAGS_DEF(n)               n\n#endif\n\n#if defined(__ARM_ARCH_ISA_ARM)\n#define PSRAMUHS_TEXT_LOC               HAL_SEC_LOC(.psramuhs_text)\n#define PSRAMUHS_TEXT_DEF(n)            HAL_SEC_DEF(.psramuhs_text, n)\n#else\n#define PSRAMUHS_TEXT_LOC\n#define PSRAMUHS_TEXT_DEF(n)            n\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_mcu2cp.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef CHIP_HAS_CP\n\n#include \"hal_mcu2cp.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_location.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include CHIP_SPECIFIC_HDR(reg_cmu)\n\n#define MAX_SEND_RECORD_COUNT 3\n\n#define HAL_SYS_WAKE_LOCK_USER_MCU2CP HAL_SYS_WAKE_LOCK_USER_4\n\n#ifdef CP_API\n#define API_POSTFIX _cp\n#define MCU2CP_TEXT_LOC CP_TEXT_SRAM_LOC\n#define MCU2CP_RODATA_LOC CP_DATA_LOC\n#define MCU2CP_BSS_LOC CP_BSS_LOC\n#define MCU2CP_BSS_DEF CP_BSS_DEF\n#else\n#define API_POSTFIX _mcu\n#define MCU2CP_TEXT_LOC\n#define MCU2CP_RODATA_LOC\n#define MCU2CP_BSS_LOC\n#define MCU2CP_BSS_DEF CP_BSS_DEF\n#endif\n\n#define MCU2CP_API_A(n, p) MCU2CP_TEXT_LOC n##p\n#define MCU2CP_API_B(n, p) MCU2CP_API_A(n, p)\n#define MCU2CP_API(n) MCU2CP_API_B(n, API_POSTFIX)\n\nenum HAL_MCU2CP_IRQ_TYPE_T {\n  HAL_MCU2CP_IRQ_SEND_IND,\n  HAL_MCU2CP_IRQ_RECV_DONE,\n\n  HAL_MCU2CP_IRQ_TYPE_QTY\n};\n\nstruct HAL_MCU2CP_MSG_T {\n  struct HAL_MCU2CP_MSG_T *next;   // pointer to next element in the list\n  enum HAL_MCU2CP_MSG_TYPE_T type; // message type\n  unsigned int len;                // message data length in bytes\n  const unsigned char *data;       // pointer to the message data\n};\n\nstruct HAL_MCU2CP_SEND_RECORD_T {\n  struct HAL_MCU2CP_MSG_T msg;\n  bool in_use;\n};\n\nstatic const IRQn_Type MCU2CP_RODATA_LOC rx_irq_id[HAL_MCU2CP_ID_QTY] = {\n    CP2MCU_DATA_IRQn,\n    CP2MCU_DATA1_IRQn,\n};\n\nstatic const IRQn_Type MCU2CP_RODATA_LOC tx_irq_id[HAL_MCU2CP_ID_QTY] = {\n    MCU2CP_DONE_IRQn,\n    MCU2CP_DONE1_IRQn,\n};\n\nstatic const struct HAL_MCU2CP_MSG_T **MCU2CP_BSS_LOC recv_msg_list_p;\n\nstatic struct HAL_MCU2CP_MSG_T *MCU2CP_BSS_LOC\n    send_msg_list_p[HAL_MCU2CP_ID_QTY];\nstatic struct HAL_MCU2CP_MSG_T *MCU2CP_BSS_LOC\n    send_pending_list_p[HAL_MCU2CP_ID_QTY];\n\nstatic struct HAL_MCU2CP_MSG_T MCU2CP_BSS_LOC\n    recv_pending_head[HAL_MCU2CP_ID_QTY];\n\nstatic struct HAL_MCU2CP_SEND_RECORD_T MCU2CP_BSS_LOC\n    send_msgs[HAL_MCU2CP_ID_QTY][MAX_SEND_RECORD_COUNT];\n\nstatic HAL_MCU2CP_RX_IRQ_HANDLER MCU2CP_BSS_LOC\n    rx_irq_handler[HAL_MCU2CP_ID_QTY][HAL_MCU2CP_MSG_TYPE_QTY];\nstatic HAL_MCU2CP_TX_IRQ_HANDLER MCU2CP_BSS_LOC\n    tx_irq_handler[HAL_MCU2CP_ID_QTY][HAL_MCU2CP_MSG_TYPE_QTY];\n\nstatic uint8_t MCU2CP_BSS_LOC chan_opened[HAL_MCU2CP_ID_QTY] = {\n    0,\n    0,\n};\nSTATIC_ASSERT(sizeof(chan_opened[0]) * 8 >= HAL_MCU2CP_MSG_TYPE_QTY,\n              \"chan_opened size too small\");\n\nstatic bool MCU2CP_BSS_LOC need_flow_ctrl[HAL_MCU2CP_ID_QTY] = {\n    false,\n    false,\n};\n\n#ifndef CP_API\nstatic bool MCU2CP_BSS_LOC chan_busy[HAL_MCU2CP_ID_QTY] = {\n    false,\n    false,\n};\n\nstatic bool MCU2CP_BSS_LOC busy_now = false;\n#endif\n\nstatic struct CMU_T *const MCU2CP_RODATA_LOC cmu = (struct CMU_T *)CMU_BASE;\n\nstatic void MCU2CP_TEXT_LOC hal_mcu2cp_busy(enum HAL_MCU2CP_ID_T id,\n                                            bool busy) {\n#ifndef CP_API\n  int i;\n  bool new_state;\n\n  if (chan_busy[id] == busy) {\n    return;\n  }\n\n  chan_busy[id] = busy;\n\n  if (busy_now == busy) {\n    return;\n  }\n\n  if (busy) {\n    hal_sys_wake_lock(HAL_SYS_WAKE_LOCK_USER_MCU2CP);\n    busy_now = true;\n  } else {\n    new_state = false;\n    for (i = 0; i < HAL_MCU2CP_ID_QTY; i++) {\n      if (chan_busy[i]) {\n        new_state = true;\n        break;\n      }\n    }\n    if (!new_state) {\n      hal_sys_wake_unlock(HAL_SYS_WAKE_LOCK_USER_MCU2CP);\n      busy_now = false;\n    }\n  }\n#endif\n}\n\nstatic int MCU2CP_TEXT_LOC hal_mcu2cp_peer_irq_set(\n    enum HAL_MCU2CP_ID_T id, enum HAL_MCU2CP_IRQ_TYPE_T type) {\n  uint32_t value;\n\n#ifdef CP_API\n  if (id == HAL_MCU2CP_ID_0) {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_CP2MCU_DATA_IND_SET;\n    } else {\n      value = CMU_MCU2CP_DATA_DONE_SET;\n    }\n  } else {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_CP2MCU_DATA1_IND_SET;\n    } else {\n      value = CMU_MCU2CP_DATA1_DONE_SET;\n    }\n  }\n\n  cmu->CP2MCU_IRQ_SET = value;\n#else\n  if (id == HAL_MCU2CP_ID_0) {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_MCU2CP_DATA_IND_SET;\n    } else {\n      value = CMU_CP2MCU_DATA_DONE_SET;\n    }\n  } else {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_MCU2CP_DATA1_IND_SET;\n    } else {\n      value = CMU_CP2MCU_DATA1_DONE_SET;\n    }\n  }\n\n  cmu->MCU2CP_IRQ_SET = value;\n#endif\n\n  return 0;\n}\n\nstatic int MCU2CP_TEXT_LOC hal_mcu2cp_local_irq_clear(\n    enum HAL_MCU2CP_ID_T id, enum HAL_MCU2CP_IRQ_TYPE_T type) {\n  uint32_t value;\n\n#ifdef CP_API\n  if (id == HAL_MCU2CP_ID_0) {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_MCU2CP_DATA_IND_CLR;\n    } else {\n      value = CMU_CP2MCU_DATA_DONE_CLR;\n    }\n  } else {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_MCU2CP_DATA1_IND_CLR;\n    } else {\n      value = CMU_CP2MCU_DATA1_DONE_CLR;\n    }\n  }\n\n  cmu->MCU2CP_IRQ_CLR = value;\n#else\n  if (id == HAL_MCU2CP_ID_0) {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_CP2MCU_DATA_IND_CLR;\n    } else {\n      value = CMU_MCU2CP_DATA_DONE_CLR;\n    }\n  } else {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_CP2MCU_DATA1_IND_CLR;\n    } else {\n      value = CMU_MCU2CP_DATA1_DONE_CLR;\n    }\n  }\n\n  cmu->CP2MCU_IRQ_CLR = value;\n#endif\n\n  return 0;\n}\n\nstatic int MCU2CP_TEXT_LOC hal_mcu2cp_local_irq_set(\n    enum HAL_MCU2CP_ID_T id, enum HAL_MCU2CP_IRQ_TYPE_T type) {\n  uint32_t value;\n\n#ifdef CP_API\n  if (id == HAL_MCU2CP_ID_0) {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_MCU2CP_DATA_IND_SET;\n    } else {\n      value = CMU_CP2MCU_DATA_DONE_SET;\n    }\n  } else {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_MCU2CP_DATA1_IND_SET;\n    } else {\n      value = CMU_CP2MCU_DATA1_DONE_SET;\n    }\n  }\n\n  cmu->MCU2CP_IRQ_SET = value;\n#else\n  if (id == HAL_MCU2CP_ID_0) {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_CP2MCU_DATA_IND_SET;\n    } else {\n      value = CMU_MCU2CP_DATA_DONE_SET;\n    }\n  } else {\n    if (type == HAL_MCU2CP_IRQ_SEND_IND) {\n      value = CMU_CP2MCU_DATA1_IND_SET;\n    } else {\n      value = CMU_MCU2CP_DATA1_DONE_SET;\n    }\n  }\n\n  cmu->CP2MCU_IRQ_SET = value;\n#endif\n\n  return 0;\n}\n\nstatic void MCU2CP_TEXT_LOC hal_mcu2cp_rx_irq(void) {\n  int id;\n  const struct HAL_MCU2CP_MSG_T *msg_ptr;\n  enum HAL_MCU2CP_MSG_TYPE_T type;\n  unsigned int processed;\n\n  for (id = HAL_MCU2CP_ID_0; id < HAL_MCU2CP_ID_QTY; id++) {\n    if (NVIC_GetActive(rx_irq_id[id])) {\n      hal_mcu2cp_local_irq_clear(id, HAL_MCU2CP_IRQ_SEND_IND);\n\n      if (recv_pending_head[id].data) {\n        // Previous unprocessed message\n        msg_ptr = &recv_pending_head[id];\n      } else {\n        // New message\n        msg_ptr = recv_msg_list_p[id];\n      }\n      while (msg_ptr) {\n        type = msg_ptr->type;\n        if (type >= HAL_MCU2CP_MSG_TYPE_QTY) {\n          // Error\n          ASSERT(false, \"MCU2CP-RX: Invalid msg type: %d\", type);\n          break;\n        }\n        if (rx_irq_handler[id][type]) {\n          processed = rx_irq_handler[id][type](msg_ptr->data, msg_ptr->len);\n          // Check if flow control needed\n          if (processed < msg_ptr->len) {\n            recv_pending_head[id].next = msg_ptr->next;\n            recv_pending_head[id].type = msg_ptr->type;\n            recv_pending_head[id].len = msg_ptr->len - processed;\n            recv_pending_head[id].data = msg_ptr->data + processed;\n            break;\n          }\n        } else {\n          // Error\n          ASSERT(false, \"MCU2CP-RX: Handler missing\");\n          break;\n        }\n        msg_ptr = msg_ptr->next;\n      }\n\n      if (msg_ptr == NULL) {\n        if (!need_flow_ctrl[id]) {\n          hal_mcu2cp_peer_irq_set(id, HAL_MCU2CP_IRQ_RECV_DONE);\n        }\n        recv_pending_head[id].data = NULL;\n      }\n    }\n  }\n}\n\nstatic void MCU2CP_TEXT_LOC hal_mcu2cp_tx_irq(void) {\n  int id;\n  struct HAL_MCU2CP_MSG_T *msg_ptr;\n  enum HAL_MCU2CP_MSG_TYPE_T type;\n\n  for (id = HAL_MCU2CP_ID_0; id < HAL_MCU2CP_ID_QTY; id++) {\n    if (NVIC_GetActive(tx_irq_id[id])) {\n      hal_mcu2cp_local_irq_clear(id, HAL_MCU2CP_IRQ_RECV_DONE);\n\n      msg_ptr = send_msg_list_p[id];\n      while (msg_ptr) {\n        type = msg_ptr->type;\n        if (type >= HAL_MCU2CP_MSG_TYPE_QTY) {\n          // Error\n          ASSERT(false, \"MCU2CP-TX: Invalid msg type: %d\", type);\n          break;\n        }\n        if (tx_irq_handler[id][type]) {\n          tx_irq_handler[id][type](msg_ptr->data, msg_ptr->len);\n        };\n        CONTAINER_OF(msg_ptr, struct HAL_MCU2CP_SEND_RECORD_T, msg)->in_use =\n            false;\n        msg_ptr = msg_ptr->next;\n      }\n\n      if (send_pending_list_p[id]) {\n        send_msg_list_p[id] = send_pending_list_p[id];\n        send_pending_list_p[id] = NULL;\n        hal_mcu2cp_peer_irq_set(id, HAL_MCU2CP_IRQ_SEND_IND);\n      } else {\n        send_msg_list_p[id] = NULL;\n        // Allow sleep\n        hal_mcu2cp_busy(id, false);\n      }\n    }\n  }\n}\n\nconst struct HAL_MCU2CP_MSG_T **hal_mcu2cp_get_send_msg_list_mcu(void);\nconst struct HAL_MCU2CP_MSG_T **hal_mcu2cp_get_send_msg_list_cp(void);\n\n#ifdef CP_API\n// This is initialization code and should NOT be in CP text location\nconst struct HAL_MCU2CP_MSG_T **hal_mcu2cp_get_send_msg_list_cp(void)\n#else\nconst struct HAL_MCU2CP_MSG_T **hal_mcu2cp_get_send_msg_list_mcu(void)\n#endif\n{\n  return (const struct HAL_MCU2CP_MSG_T **)&send_msg_list_p[0];\n}\n\nint MCU2CP_API(hal_mcu2cp_open)(enum HAL_MCU2CP_ID_T id,\n                                enum HAL_MCU2CP_MSG_TYPE_T type,\n                                HAL_MCU2CP_RX_IRQ_HANDLER rxhandler,\n                                HAL_MCU2CP_TX_IRQ_HANDLER txhandler,\n                                bool rx_flowctrl) {\n  int i;\n\n  if (id >= HAL_MCU2CP_ID_QTY) {\n    return 1;\n  }\n  if (type >= HAL_MCU2CP_MSG_TYPE_QTY) {\n    return 2;\n  }\n\n  if (chan_opened[id] == 0) {\n    hal_mcu2cp_local_irq_clear(id, HAL_MCU2CP_IRQ_SEND_IND);\n    hal_mcu2cp_local_irq_clear(id, HAL_MCU2CP_IRQ_RECV_DONE);\n#ifdef CP_API\n    recv_msg_list_p = hal_mcu2cp_get_send_msg_list_mcu();\n#else\n    recv_msg_list_p = hal_mcu2cp_get_send_msg_list_cp();\n#endif\n\n    NVIC_SetVector(rx_irq_id[id], (uint32_t)hal_mcu2cp_rx_irq);\n    NVIC_SetPriority(rx_irq_id[id], IRQ_PRIORITY_NORMAL);\n\n    NVIC_SetVector(tx_irq_id[id], (uint32_t)hal_mcu2cp_tx_irq);\n    NVIC_SetPriority(tx_irq_id[id], IRQ_PRIORITY_NORMAL);\n\n    // Stop IRQs by default\n    NVIC_DisableIRQ(rx_irq_id[id]);\n    NVIC_DisableIRQ(tx_irq_id[id]);\n\n    send_msg_list_p[id] = NULL;\n    send_pending_list_p[id] = NULL;\n    recv_pending_head[id].data = NULL;\n    for (i = 0; i < MAX_SEND_RECORD_COUNT; i++) {\n      send_msgs[id][i].in_use = false;\n    }\n    need_flow_ctrl[id] = rx_flowctrl;\n  } else {\n    ASSERT(need_flow_ctrl[id] == rx_flowctrl,\n           \"MCU2CP-OPEN: rx_flowctrl=%d (should be %d)\", rx_flowctrl,\n           need_flow_ctrl[id]);\n    return 3;\n  }\n  chan_opened[id] |= (1 << type);\n\n  rx_irq_handler[id][type] = rxhandler;\n  tx_irq_handler[id][type] = txhandler;\n\n  return 0;\n}\n\nint MCU2CP_API(hal_mcu2cp_close)(enum HAL_MCU2CP_ID_T id,\n                                 enum HAL_MCU2CP_MSG_TYPE_T type) {\n  if (id >= HAL_MCU2CP_ID_QTY) {\n    return 1;\n  }\n\n  chan_opened[id] &= ~(1 << type);\n  rx_irq_handler[id][type] = NULL;\n  tx_irq_handler[id][type] = NULL;\n\n  if (chan_opened[id] == 0) {\n    // Stop IRQs by default\n    NVIC_DisableIRQ(rx_irq_id[id]);\n    NVIC_DisableIRQ(tx_irq_id[id]);\n\n    send_msg_list_p[id] = NULL;\n    send_pending_list_p[id] = NULL;\n    recv_pending_head[id].data = NULL;\n    need_flow_ctrl[id] = false;\n  }\n\n  return 0;\n}\n\nint MCU2CP_API(hal_mcu2cp_start_recv)(enum HAL_MCU2CP_ID_T id) {\n  if (id >= HAL_MCU2CP_ID_QTY) {\n    return 1;\n  }\n\n  NVIC_EnableIRQ(rx_irq_id[id]);\n  // Check if there is any previous unprocessed message\n  if (recv_pending_head[id].data) {\n    hal_mcu2cp_local_irq_set(id, HAL_MCU2CP_IRQ_SEND_IND);\n  }\n  return 0;\n}\n\nint MCU2CP_API(hal_mcu2cp_stop_recv)(enum HAL_MCU2CP_ID_T id) {\n  if (id >= HAL_MCU2CP_ID_QTY) {\n    return 1;\n  }\n\n  NVIC_DisableIRQ(rx_irq_id[id]);\n  return 0;\n}\n\nint MCU2CP_API(hal_mcu2cp_send)(enum HAL_MCU2CP_ID_T id,\n                                enum HAL_MCU2CP_MSG_TYPE_T type,\n                                const unsigned char *data, unsigned int len) {\n  uint32_t lock;\n  int ret;\n  struct HAL_MCU2CP_SEND_RECORD_T *record;\n  struct HAL_MCU2CP_MSG_T *next;\n  int i;\n\n  if (id >= HAL_MCU2CP_ID_QTY) {\n    return 1;\n  }\n  if (type >= HAL_MCU2CP_MSG_TYPE_QTY) {\n    return 2;\n  }\n  if ((chan_opened[id] & (1 << type)) == 0) {\n    return 3;\n  }\n\n  NVIC_EnableIRQ(tx_irq_id[id]);\n\n  ret = -1;\n  record = &send_msgs[id][0];\n\n  lock = int_lock();\n  for (i = 0; i < MAX_SEND_RECORD_COUNT; i++) {\n    if (record->in_use) {\n      record++;\n      continue;\n    }\n    record->in_use = true;\n    record->msg.next = NULL;\n    record->msg.type = type;\n    record->msg.len = len;\n    record->msg.data = data;\n    if (send_msg_list_p[id] == NULL) {\n      send_msg_list_p[id] = &record->msg;\n      hal_mcu2cp_peer_irq_set(id, HAL_MCU2CP_IRQ_SEND_IND);\n    } else if (send_pending_list_p[id] == NULL) {\n      send_pending_list_p[id] = &record->msg;\n    } else {\n      next = send_pending_list_p[id];\n      while (next->next) {\n        next = next->next;\n      }\n      next->next = &record->msg;\n    }\n    ret = 0;\n    // Prohibit sleep here\n    hal_mcu2cp_busy(id, true);\n    break;\n  }\n  int_unlock(lock);\n\n  return ret;\n}\n\nvoid MCU2CP_API(hal_mcu2cp_rx_done)(enum HAL_MCU2CP_ID_T id) {\n  hal_mcu2cp_peer_irq_set(id, HAL_MCU2CP_IRQ_RECV_DONE);\n}\n\nint MCU2CP_API(hal_mcu2cp_opened)(enum HAL_MCU2CP_ID_T id) {\n  return !!chan_opened[id];\n}\n\nint MCU2CP_API(hal_mcu2cp_local_irq_pending)(enum HAL_MCU2CP_ID_T id) {\n  uint32_t value;\n\n#ifdef CP_API\n  if (id == HAL_MCU2CP_ID_0) {\n    value = CMU_MCU2CP_DATA_IND_SET | CMU_CP2MCU_DATA_DONE_SET;\n  } else {\n    value = CMU_MCU2CP_DATA1_IND_SET | CMU_CP2MCU_DATA1_DONE_SET;\n  }\n\n  return !!(cmu->MCU2CP_IRQ_SET & value);\n#else\n  if (id == HAL_MCU2CP_ID_0) {\n    value = CMU_CP2MCU_DATA_IND_SET | CMU_MCU2CP_DATA_DONE_SET;\n  } else {\n    value = CMU_CP2MCU_DATA1_IND_SET | CMU_MCU2CP_DATA1_DONE_SET;\n  }\n\n  return !!(cmu->CP2MCU_IRQ_SET & value);\n#endif\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_mcu2cp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_MCU2CP_H__\n#define __HAL_MCU2CP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdbool.h\"\n\nenum HAL_MCU2CP_ID_T {\n    HAL_MCU2CP_ID_0,\n    HAL_MCU2CP_ID_1,\n\n    HAL_MCU2CP_ID_QTY\n};\n\nenum HAL_MCU2CP_MSG_TYPE_T {\n    HAL_MCU2CP_MSG_TYPE_0,\n    HAL_MCU2CP_MSG_TYPE_1,\n\n    HAL_MCU2CP_MSG_TYPE_QTY\n};\n\ntypedef unsigned int (*HAL_MCU2CP_RX_IRQ_HANDLER)(const unsigned char *data, unsigned int len);\ntypedef void (*HAL_MCU2CP_TX_IRQ_HANDLER)(const unsigned char *data, unsigned int len);\n\nint hal_mcu2cp_open_mcu(enum HAL_MCU2CP_ID_T id, enum HAL_MCU2CP_MSG_TYPE_T type,\n                        HAL_MCU2CP_RX_IRQ_HANDLER rxhandler, HAL_MCU2CP_TX_IRQ_HANDLER txhandler, bool rx_flowctrl);\nint hal_mcu2cp_open_cp (enum HAL_MCU2CP_ID_T id, enum HAL_MCU2CP_MSG_TYPE_T type,\n                        HAL_MCU2CP_RX_IRQ_HANDLER rxhandler, HAL_MCU2CP_TX_IRQ_HANDLER txhandler, bool rx_flowctrl);\n\nint hal_mcu2cp_close_mcu(enum HAL_MCU2CP_ID_T id,enum HAL_MCU2CP_MSG_TYPE_T type);\nint hal_mcu2cp_close_cp (enum HAL_MCU2CP_ID_T id,enum HAL_MCU2CP_MSG_TYPE_T type);\n\nint hal_mcu2cp_start_recv_mcu(enum HAL_MCU2CP_ID_T id);\nint hal_mcu2cp_start_recv_cp (enum HAL_MCU2CP_ID_T id);\n\nint hal_mcu2cp_stop_recv_mcu(enum HAL_MCU2CP_ID_T id);\nint hal_mcu2cp_stop_recv_cp (enum HAL_MCU2CP_ID_T id);\n\nint hal_mcu2cp_send_mcu(enum HAL_MCU2CP_ID_T id, enum HAL_MCU2CP_MSG_TYPE_T type,\n                    const unsigned char *data, unsigned int len);\nint hal_mcu2cp_send_cp (enum HAL_MCU2CP_ID_T id, enum HAL_MCU2CP_MSG_TYPE_T type,\n                    const unsigned char *data, unsigned int len);\n\nvoid hal_mcu2cp_rx_done_mcu(enum HAL_MCU2CP_ID_T id);\nvoid hal_mcu2cp_rx_done_cp (enum HAL_MCU2CP_ID_T id);\n\nint hal_mcu2cp_opened_mcu(enum HAL_MCU2CP_ID_T id);\nint hal_mcu2cp_opened_cp(enum HAL_MCU2CP_ID_T id);\n\nint hal_mcu2cp_local_irq_pending_mcu(enum HAL_MCU2CP_ID_T id);\nint hal_mcu2cp_local_irq_pending_cp(enum HAL_MCU2CP_ID_T id);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_memsc.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_memsc.h\"\n#include \"hal_cmu.h\"\n#include \"plat_addr_map.h\"\n\nint hal_memsc_lock(enum HAL_MEMSC_ID_T id) {\n  if (id >= HAL_MEMSC_ID_QTY) {\n    return 0;\n  }\n\n  return (hal_cmu_get_memsc_addr())[id];\n}\n\nvoid hal_memsc_unlock(enum HAL_MEMSC_ID_T id) {\n  if (id >= HAL_MEMSC_ID_QTY) {\n    return;\n  }\n\n  (hal_cmu_get_memsc_addr())[id] = 1;\n}\n\nbool hal_memsc_avail(enum HAL_MEMSC_ID_T id) {\n  if (id >= HAL_MEMSC_ID_QTY) {\n    return false;\n  }\n\n  return !!((hal_cmu_get_memsc_addr())[4] & (1 << id));\n}\n"
  },
  {
    "path": "platform/hal/hal_memsc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_MEMSC_H__\n#define __HAL_MEMSC_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"stdbool.h\"\n\nenum HAL_MEMSC_ID_T {\n    HAL_MEMSC_ID_0,\n    HAL_MEMSC_ID_1,\n    HAL_MEMSC_ID_2,\n    HAL_MEMSC_ID_3,\n\n    HAL_MEMSC_ID_QTY\n};\n\nint hal_memsc_lock(enum HAL_MEMSC_ID_T id);\n\nvoid hal_memsc_unlock(enum HAL_MEMSC_ID_T id);\n\nbool hal_memsc_avail(enum HAL_MEMSC_ID_T id);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_norflash.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_norflash.h\"\n#include \"cmsis.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_cmu.h\"\n#include \"hal_norflaship.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"norflash_cfg.h\"\n#include \"norflash_drv.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"pmu.h\"\n#include \"string.h\"\n\n/* Demo:\n *\n *  uint8_t data[1024];\n *  hal_norflash_open(HAL_NORFLASH_ID_0, HAL_NORFLASH_SPEED_26M, 0);\n *  \\/\\/ hal_norflash_open(HAL_NORFLASH_ID_0, HAL_NORFLASH_SPEED_13M,\n * HAL_NORFLASH_OP_MODE_QUAD);\n *  \\/\\/ hal_norflash_open(HAL_NORFLASH_ID_0, HAL_NORFLASH_SPEED_13M,\n * HAL_NORFLASH_OP_MODE_QUAD|HAL_NORFLASH_OP_MODE_CONTINUOUS_READ);\n *  hal_norflash_erase(HAL_I2C_ID_0, 0, 4096);\n *  memset(data, 0xcc, 1024);\n *  hal_norflash_write(HAL_I2C_ID_0, 0, data, 1024);\n *  for (i = 0; i < 10; ++i) {\n *      TRACE(2,\"[0x%x] - 0x%x\\n\", 0x08000000 + i, *((volatile uint8_t\n * *)(0x08000000 + i)));\n *  }\n */\n\n#define HAL_NORFLASH_CP_ID_LEN 2\n\n#define HAL_NORFLASH_YES 1\n#define HAL_NORFLASH_NO 0\n\n// 64M Bytes\n#define HAL_NORFLASH_ADDR_MASK 0x03FFFFFF\n\n// Protect lower 1/2 by default\n#ifndef FLASH_BLOCK_PROTECTION_64M_BIT\n#define FLASH_BLOCK_PROTECTION_64M_BIT 0x0034\n#endif\n#ifndef FLASH_BLOCK_PROTECTION_32M_BIT\n#define FLASH_BLOCK_PROTECTION_32M_BIT 0x0038\n#endif\n#ifndef FLASH_BLOCK_PROTECTION_16M_BIT\n#define FLASH_BLOCK_PROTECTION_16M_BIT 0x0034\n#endif\n#ifndef FLASH_BLOCK_PROTECTION_8M_BIT\n#define FLASH_BLOCK_PROTECTION_8M_BIT 0x0030\n#endif\n\nstruct HAL_Norflash_Context {\n  bool opened;\n  uint8_t device_id[HAL_NORFLASH_DEVICE_ID_LEN];\n#ifdef FLASH_UNIQUE_ID\n  uint8_t unique_id[HAL_NORFLASH_UNIQUE_ID_LEN + HAL_NORFLASH_CP_ID_LEN];\n#endif\n  uint32_t total_size;\n  uint32_t block_size;\n  uint32_t sector_size;\n  uint32_t page_size;\n  enum HAL_NORFLASH_RET_T open_state;\n};\n\nstatic struct HAL_Norflash_Context norflash_ctx[HAL_NORFLASH_ID_NUM];\n\nstatic const char *const err_not_opened = \"norflash not opened\";\n\nstatic const struct HAL_NORFLASH_CONFIG_T norflash_cfg = {\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n    .source_clk = HAL_NORFLASH_SPEED_52M,\n    .speed = HAL_NORFLASH_SPEED_52M,\n#else\n#if defined(FLASH_LOW_SPEED)\n    .source_clk = HAL_NORFLASH_SPEED_26M * 2,\n    .speed = HAL_NORFLASH_SPEED_26M,\n#elif defined(OSC_26M_X4_AUD2BB)\n    .source_clk = HAL_NORFLASH_SPEED_52M * 2,\n    .speed = HAL_NORFLASH_SPEED_52M,\n#else\n    .source_clk = HAL_NORFLASH_SPEED_104M * 2,\n    .speed = HAL_NORFLASH_SPEED_104M,\n#endif\n#endif\n    .mode = HAL_NORFLASH_OP_MODE_STAND_SPI | HAL_NORFLASH_OP_MODE_FAST_SPI |\n            HAL_NORFLASH_OP_MODE_DUAL_OUTPUT | HAL_NORFLASH_OP_MODE_DUAL_IO |\n            HAL_NORFLASH_OP_MODE_QUAD_OUTPUT | HAL_NORFLASH_OP_MODE_QUAD_IO |\n            HAL_NORFLASH_OP_MODE_CONTINUOUS_READ |\n            HAL_NORFLASH_OP_MODE_READ_WRAP | HAL_NORFLASH_OP_MODE_PAGE_PROGRAM |\n            HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM |\n            HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM,\n    .override_config = 0,\n};\n\n#ifdef FLASH_FREQ_DYNAMIC_ADJUST\nstruct HAL_NORFLASH_FREQ_DYNAMIC_ADJUST_CONFIG_T {\n  uint32_t source_clk;\n  uint8_t timing_index;\n};\nstatic struct HAL_NORFLASH_FREQ_DYNAMIC_ADJUST_CONFIG_T\n    norflash_freq_dynamic_adjust_cfg[2];\n#endif\n\n#ifdef FLASH_SUSPEND\nenum SUSPEND_STATE_T {\n  SUSPEND_STATE_NONE,\n  SUSPEND_STATE_ERASE,\n  SUSPEND_STATE_PROGRAM,\n};\n\nstatic enum SUSPEND_STATE_T suspend_state;\nstatic uint32_t op_next_addr;\nstatic const uint8_t *op_next_buf;\nstatic uint32_t op_remain_len;\n#endif\n\n#ifdef FLASH_SECURITY_REGISTER\nstatic uint32_t sec_reg_base;\nstatic uint16_t sec_reg_size;\nstatic uint16_t sec_reg_offset;\nstatic uint16_t sec_reg_total_size;\nstatic uint16_t sec_reg_pp_size;\nstatic bool sec_reg_enabled;\n#endif\n\nenum HAL_CMU_FREQ_T hal_norflash_clk_to_cmu_freq(uint32_t clk) {\n  enum HAL_CMU_FREQ_T freq;\n\n  if (clk >= HAL_NORFLASH_SPEED_208M) {\n    freq = HAL_CMU_FREQ_208M;\n  } else if (clk >= HAL_NORFLASH_SPEED_104M) {\n    freq = HAL_CMU_FREQ_104M;\n  } else if (clk >= HAL_NORFLASH_SPEED_78M) {\n    freq = HAL_CMU_FREQ_78M;\n  } else if (clk >= HAL_NORFLASH_SPEED_52M) {\n    freq = HAL_CMU_FREQ_52M;\n  } else {\n    freq = HAL_CMU_FREQ_26M;\n  }\n\n#if defined(CHIP_BEST1000) && defined(AUD_PLL_DOUBLE)\n  if (freq == HAL_CMU_FREQ_208M) {\n    freq = HAL_CMU_FREQ_104M;\n  }\n#endif\n#ifdef SIMU\n#ifdef SIMU_FAST_FLASH\n#define MAX_SIMU_FLASH_FREQ HAL_CMU_FREQ_104M\n#else\n#define MAX_SIMU_FLASH_FREQ HAL_CMU_FREQ_52M\n#endif\n  if (freq > MAX_SIMU_FLASH_FREQ) {\n    freq = MAX_SIMU_FLASH_FREQ;\n  }\n#endif\n\n  return freq;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_get_size(enum HAL_NORFLASH_ID_T id,\n                                              uint32_t *total_size,\n                                              uint32_t *block_size,\n                                              uint32_t *sector_size,\n                                              uint32_t *page_size) {\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  if (total_size) {\n    *total_size = norflash_ctx[id].total_size;\n  }\n  if (block_size) {\n    *block_size = norflash_ctx[id].block_size;\n  }\n  if (sector_size) {\n    *sector_size = norflash_ctx[id].sector_size;\n  }\n  if (page_size) {\n    *page_size = norflash_ctx[id].page_size;\n  }\n  return HAL_NORFLASH_OK;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_get_boundary(enum HAL_NORFLASH_ID_T id,\n                                                  uint32_t address,\n                                                  uint32_t *block_boundary,\n                                                  uint32_t *sector_boundary) {\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  static const uint32_t flash_base[] = {\n      FLASH_BASE,\n      FLASHX_BASE,\n      FLASH_NC_BASE,\n      FLASHX_NC_BASE,\n  };\n  int i;\n\n  for (i = 0; i < ARRAY_SIZE(flash_base); i++) {\n    if (flash_base[i] <= address &&\n        address < flash_base[i] + norflash_ctx[id].total_size) {\n      address -= flash_base[i];\n      if (block_boundary)\n        *block_boundary =\n            flash_base[i] + (address / norflash_ctx[id].block_size) *\n                                norflash_ctx[id].block_size;\n      if (sector_boundary)\n        *sector_boundary =\n            flash_base[i] + (address / norflash_ctx[id].sector_size) *\n                                norflash_ctx[id].sector_size;\n      break;\n    }\n  }\n\n  if (i == ARRAY_SIZE(flash_base)) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n\n  return HAL_NORFLASH_OK;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_get_id(enum HAL_NORFLASH_ID_T id,\n                                            uint8_t *value, uint32_t len) {\n  len = MIN(len, sizeof(norflash_ctx[id].device_id));\n\n  memcpy(value, norflash_ctx[id].device_id, len);\n\n  return HAL_NORFLASH_OK;\n}\n\n#ifdef FLASH_UNIQUE_ID\nenum HAL_NORFLASH_RET_T hal_norflash_get_unique_id(enum HAL_NORFLASH_ID_T id,\n                                                   uint8_t *value,\n                                                   uint32_t len) {\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  len = MIN(len, sizeof(norflash_ctx[id].unique_id));\n\n  memcpy(value, norflash_ctx[id].unique_id, len);\n\n  return HAL_NORFLASH_OK;\n}\n#endif\n\n#ifdef FLASH_PROTECTION\nstatic uint32_t hal_norflash_get_bp_cfg(enum HAL_NORFLASH_ID_T id) {\n  uint32_t val = 0;\n\n  // Set BP and CMP bits\n  // E.g., for 32M bit flash, BP=0b00010 CMP=1 can protect 0x000000 - 0x3DFFFF\n\n  if (FLASH_SIZE != hal_norflash_get_flash_total_size(id)) {\n    return val;\n  }\n\n  if (norflash_ctx[id].device_id[0] != 0xC8 && // GigaDevice\n      norflash_ctx[id].device_id[0] != 0x85 && // Puya\n      norflash_ctx[id].device_id[0] != 0x20    // Xinxin\n  ) {\n    return val;\n  }\n\n  if (FLASH_SIZE == 0x800000) {\n    val = FLASH_BLOCK_PROTECTION_64M_BIT;\n  } else if (FLASH_SIZE == 0x400000) {\n    val = FLASH_BLOCK_PROTECTION_32M_BIT;\n  } else if (FLASH_SIZE == 0x200000) {\n    val = FLASH_BLOCK_PROTECTION_16M_BIT;\n  } else if (FLASH_SIZE == 0x100000) {\n    val = FLASH_BLOCK_PROTECTION_8M_BIT;\n  } else {\n    // CAUTION:\n    // Different configuration for GD and Puya\n  }\n\n  return val;\n}\n#endif\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_enable_protection(enum HAL_NORFLASH_ID_T id) {\n  int ret = 0;\n\n#ifdef FLASH_PROTECTION\n  uint32_t lock;\n\n  if (!norflash_ctx[id].opened) {\n    return HAL_NORFLASH_NOT_OPENED;\n  }\n\n  lock = int_lock_global();\n\n  norflash_pre_operation();\n\n  ret = norflash_set_block_protection(hal_norflash_get_bp_cfg(id));\n\n  norflash_post_operation();\n\n  int_unlock_global(lock);\n#endif\n\n  return ret ? HAL_NORFLASH_BAD_OP : HAL_NORFLASH_OK;\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_disable_protection(enum HAL_NORFLASH_ID_T id) {\n  int ret = 0;\n\n#ifdef FLASH_PROTECTION\n  uint32_t lock;\n\n  if (!norflash_ctx[id].opened) {\n    return HAL_NORFLASH_NOT_OPENED;\n  }\n\n  lock = int_lock_global();\n\n  norflash_pre_operation();\n\n  ret = norflash_set_block_protection(0);\n\n  norflash_post_operation();\n\n  int_unlock_global(lock);\n#endif\n\n  return ret ? HAL_NORFLASH_BAD_OP : HAL_NORFLASH_OK;\n}\n\n#ifdef FLASH_SECURITY_REGISTER\nenum HAL_NORFLASH_RET_T\nhal_norflash_security_register_lock(enum HAL_NORFLASH_ID_T id,\n                                    uint32_t start_address, uint32_t len) {\n  uint32_t remain_len;\n  int ret = 0;\n  uint32_t reg_base;\n  uint32_t reg_pos;\n  uint32_t pos;\n  uint32_t lock_size;\n  uint32_t reg_id;\n\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  if (!sec_reg_enabled) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n  // Check address and length\n  if (sec_reg_total_size <= start_address) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  remain_len = sec_reg_total_size - start_address;\n  if (len > remain_len) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n  // Align to register boundary\n  remain_len = start_address & (sec_reg_size - 1);\n  if (remain_len) {\n    start_address -= remain_len;\n    len += remain_len;\n  }\n  remain_len = len & (sec_reg_size - 1);\n  if (remain_len) {\n    len += sec_reg_size - remain_len;\n  }\n\n  pos = start_address;\n  remain_len = len;\n\n  reg_base = sec_reg_base;\n  reg_pos = 0;\n  reg_id = 0;\n\n  norflash_pre_operation();\n\n  while (remain_len > 0 && ret == 0) {\n    if (reg_pos <= pos && pos < reg_pos + sec_reg_size) {\n      // lock a register\n      lock_size = sec_reg_size - (pos - reg_pos);\n      ret = norflash_security_register_lock(reg_id);\n      if (remain_len > lock_size) {\n        remain_len -= lock_size;\n      } else {\n        remain_len = 0;\n      }\n      pos += lock_size;\n    }\n    reg_pos += sec_reg_size;\n    reg_base += sec_reg_offset;\n    reg_id++;\n  }\n\n  norflash_post_operation();\n\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_security_register_erase(enum HAL_NORFLASH_ID_T id,\n                                     uint32_t start_address, uint32_t len) {\n  uint32_t remain_len;\n  enum HAL_NORFLASH_RET_T ret = HAL_NORFLASH_OK;\n  uint32_t reg_base;\n  uint32_t reg_pos;\n  uint32_t pos;\n  uint32_t erase_size;\n\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  if (!sec_reg_enabled) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n  // Check address and length\n  if (sec_reg_total_size <= start_address) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  remain_len = sec_reg_total_size - start_address;\n  if (len > remain_len) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n  // Align to register boundary\n  remain_len = start_address & (sec_reg_size - 1);\n  if (remain_len) {\n    start_address -= remain_len;\n    len += remain_len;\n  }\n  remain_len = len & (sec_reg_size - 1);\n  if (remain_len) {\n    len += sec_reg_size - remain_len;\n  }\n\n  pos = start_address;\n  remain_len = len;\n\n  reg_base = sec_reg_base;\n  reg_pos = 0;\n\n  norflash_pre_operation();\n\n  while (remain_len > 0 && ret == HAL_NORFLASH_OK) {\n    if (reg_pos <= pos && pos < reg_pos + sec_reg_size) {\n      // erase a register\n      erase_size = sec_reg_size - (pos - reg_pos);\n      ret = norflash_security_register_erase(reg_base + (pos - reg_pos));\n      if (remain_len > erase_size) {\n        remain_len -= erase_size;\n      } else {\n        remain_len = 0;\n      }\n      pos += erase_size;\n    }\n    reg_pos += sec_reg_size;\n    reg_base += sec_reg_offset;\n  }\n\n  norflash_post_operation();\n\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_security_register_write(enum HAL_NORFLASH_ID_T id,\n                                     uint32_t start_address,\n                                     const uint8_t *buffer, uint32_t len) {\n  const uint8_t *current_buffer;\n  uint32_t remain_len;\n  enum HAL_NORFLASH_RET_T ret = HAL_NORFLASH_OK;\n  uint32_t reg_base;\n  uint32_t reg_pos;\n  uint32_t pos;\n  uint32_t write_size;\n  uint32_t each_write;\n  uint32_t pp_remain;\n\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  if (!sec_reg_enabled) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n  // Check address and length\n  if (sec_reg_total_size <= start_address) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  remain_len = sec_reg_total_size - start_address;\n  if (len > remain_len) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n\n  pos = start_address;\n  current_buffer = buffer;\n  remain_len = len;\n\n  reg_base = sec_reg_base;\n  reg_pos = 0;\n\n  norflash_pre_operation();\n\n  while (remain_len > 0 && ret == HAL_NORFLASH_OK) {\n    if (reg_pos <= pos && pos < reg_pos + sec_reg_size) {\n      // write a register\n      if (pos + remain_len <= reg_pos + sec_reg_size) {\n        write_size = remain_len;\n      } else {\n        write_size = sec_reg_size - (pos - reg_pos);\n      }\n      remain_len -= write_size;\n      while (write_size > 0 && ret == HAL_NORFLASH_OK) {\n        if (write_size > sec_reg_pp_size) {\n          each_write = sec_reg_pp_size;\n        } else {\n          each_write = write_size;\n        }\n        // Align to security register program page size\n        pp_remain = sec_reg_pp_size - ((pos - reg_pos) & (sec_reg_pp_size - 1));\n        if (each_write > pp_remain) {\n          each_write = pp_remain;\n        }\n        ret = norflash_security_register_write(reg_base + (pos - reg_pos),\n                                               current_buffer, each_write);\n        write_size -= each_write;\n        pos += each_write;\n        current_buffer += each_write;\n      }\n    }\n    reg_pos += sec_reg_size;\n    reg_base += sec_reg_offset;\n  }\n\n  norflash_post_operation();\n\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_security_register_read(enum HAL_NORFLASH_ID_T id,\n                                    uint32_t start_address, uint8_t *buffer,\n                                    uint32_t len) {\n  uint8_t *current_buffer;\n  uint32_t remain_len, read_size;\n  int ret = 0;\n  uint32_t reg_base;\n  uint32_t reg_pos;\n  uint32_t pos;\n#ifdef FLASH_SEC_REG_FIFO_READ\n  uint32_t each_read;\n#endif\n\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  if (!sec_reg_enabled) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n  // Check address and length\n  if (sec_reg_total_size <= start_address) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  remain_len = sec_reg_total_size - start_address;\n  if (len > remain_len) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n\n  pos = start_address;\n  current_buffer = buffer;\n  remain_len = len;\n\n  reg_base = sec_reg_base;\n  reg_pos = 0;\n\n  norflash_pre_operation();\n\n#ifndef FLASH_SEC_REG_FIFO_READ\n  uint32_t mode = norflash_security_register_enable_read();\n#endif\n\n  while (remain_len > 0 && ret == 0) {\n    if (reg_pos <= pos && pos < reg_pos + sec_reg_size) {\n      // read a register\n      if (pos + remain_len <= reg_pos + sec_reg_size) {\n        read_size = remain_len;\n      } else {\n        read_size = sec_reg_size - (pos - reg_pos);\n      }\n      remain_len -= read_size;\n#ifdef FLASH_SEC_REG_FIFO_READ\n      while (read_size > 0 && ret == 0) {\n        if (read_size > NORFLASHIP_RXFIFO_SIZE) {\n          each_read = NORFLASHIP_RXFIFO_SIZE;\n        } else {\n          each_read = read_size;\n        }\n        ret = norflash_security_register_read(reg_base + (pos - reg_pos),\n                                              current_buffer, each_read);\n        read_size -= each_read;\n        pos += each_read;\n        current_buffer += each_read;\n      }\n#else\n      memcpy(current_buffer, (void *)(reg_base + (pos - reg_pos)), read_size);\n      pos += read_size;\n      current_buffer += read_size;\n#endif\n    }\n    reg_pos += sec_reg_size;\n    reg_base += sec_reg_offset;\n  }\n\n#ifndef FLASH_SEC_REG_FIFO_READ\n  norflash_security_register_disable_read(mode);\n#endif\n\n  norflash_post_operation();\n\n  return (ret ? HAL_NORFLASH_ERR : HAL_NORFLASH_OK);\n}\n\nstatic enum HAL_NORFLASH_RET_T\nhal_norflash_parse_security_register_config(void) {\n  union DRV_NORFLASH_SEC_REG_CFG_T cfg;\n  uint32_t reg_cnt;\n\n  cfg = norflash_get_security_register_config();\n\n  if (!cfg.s.enabled) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n\n  if (cfg.s.base == SEC_REG_BASE_0X1000) {\n    sec_reg_base = 0x1000;\n  } else if (cfg.s.base == SEC_REG_BASE_0X0000) {\n    sec_reg_base = 0;\n  } else {\n    return HAL_NORFLASH_BAD_CFG;\n  }\n  sec_reg_base += FLASH_NC_BASE;\n\n  if (cfg.s.size == SEC_REG_SIZE_1024) {\n    sec_reg_size = 1024;\n  } else if (cfg.s.size == SEC_REG_SIZE_512) {\n    sec_reg_size = 512;\n  } else if (cfg.s.size == SEC_REG_SIZE_256) {\n    sec_reg_size = 256;\n  } else {\n    return HAL_NORFLASH_BAD_CFG;\n  }\n\n  if (cfg.s.offset == SEC_REG_OFFSET_0X1000) {\n    sec_reg_offset = 0x1000;\n  } else if (cfg.s.offset == SEC_REG_OFFSET_0X0100) {\n    sec_reg_offset = 0x0100;\n  } else {\n    return HAL_NORFLASH_BAD_CFG;\n  }\n\n  if (sec_reg_size > sec_reg_offset) {\n    return HAL_NORFLASH_BAD_CFG;\n  }\n\n  if (cfg.s.cnt == SEC_REG_CNT_3) {\n    reg_cnt = 3;\n  } else if (cfg.s.cnt == SEC_REG_CNT_4) {\n    reg_cnt = 4;\n  } else {\n    return HAL_NORFLASH_BAD_CFG;\n  }\n\n  if (cfg.s.pp == SEC_REG_PP_256) {\n    sec_reg_pp_size = 256;\n  } else if (cfg.s.pp == SEC_REG_PP_1024) {\n    sec_reg_pp_size = 1024;\n  } else {\n    return HAL_NORFLASH_BAD_CFG;\n  }\n#if (CHIP_FLASH_CTRL_VER <= 1)\n#ifdef FLASH_SEC_REG_PP_1024\n  // To write more than 256 bytes on flash controller V1, SPI rate must be\n  // lowered to avoid tx FIFO underflow. Otherwise, the data must be split into\n  // pieces with size no more than 256 bytes.\n#else\n  sec_reg_pp_size = 256;\n#endif\n#endif\n\n  sec_reg_total_size = sec_reg_size * reg_cnt;\n\n  return HAL_NORFLASH_OK;\n}\n#endif\n\nstatic void hal_norflash_reset_timing(void) {\n  const uint32_t default_div = 8;\n\n  // Restore default divider\n  norflaship_div(default_div);\n  norflash_init_sample_delay_by_div(default_div);\n}\n\nstatic enum HAL_NORFLASH_RET_T\n_norflash_open(enum HAL_NORFLASH_ID_T id,\n               const struct HAL_NORFLASH_CONFIG_T *cfg, bool reopen, bool calib,\n               uint32_t timing_idx) {\n  struct HAL_NORFLASH_CONFIG_T norcfg;\n  enum HAL_CMU_FREQ_T source_freq;\n  int result;\n  uint32_t op;\n  int found;\n\n  if (reopen) {\n    ASSERT(norflash_ctx[id].opened, err_not_opened);\n  }\n\n  // Place the config into ram\n  if (cfg == NULL) {\n    return HAL_NORFLASH_CFG_NULL;\n  }\n  memcpy(&norcfg, cfg, sizeof(norcfg));\n\n  norflaship_busy_wait();\n\n  // Reset states\n  norflash_ctx[id].opened = false;\n  norflash_ctx[id].open_state = HAL_NORFLASH_NOT_OPENED;\n#ifdef FLASH_SUSPEND\n  suspend_state = SUSPEND_STATE_NONE;\n#endif\n#ifdef FLASH_SECURITY_REGISTER\n  sec_reg_enabled = false;\n#endif\n\n  if (!reopen) {\n#if (CHIP_FLASH_CTRL_VER >= 2)\n    // Set the direction of 4 IO pins to output when in idle\n    norflaship_set_idle_io_dir(0);\n#endif\n#if (CHIP_FLASH_CTRL_VER >= 3)\n    // Set the dummy cycles for security register read command\n    norflaship_dummy_others(8);\n#endif\n\n    // Reset norflash source clock\n    hal_cmu_flash_set_freq(HAL_CMU_FREQ_26M);\n\n    // Reset controller timing\n    hal_norflash_reset_timing();\n\n    // Reset norflash in slow clock configuration\n    norflash_reset();\n\n    // Get device ID\n    norflash_get_id(norflash_ctx[id].device_id,\n                    sizeof(norflash_ctx[id].device_id));\n\n    // For each driver in array, match chip and select drv_ops\n    found = norflash_match_chip(norflash_ctx[id].device_id,\n                                sizeof(norflash_ctx[id].device_id));\n    if (!found) {\n      result = HAL_NORFLASH_BAD_ID;\n      goto _exit;\n    }\n\n#ifdef FLASH_UNIQUE_ID\n    // 1) Flash controller V1:\n    //    Use slow clock to avoid rx fifo overflow\n    // 2) Flash controller V2/3/4/5:\n    //    Use slow clock to avoid stopping SPI clock\n    //    (One bit might be read as a fixed 1 at the SPI clock stopping edge in\n    //    some timing combinations)\n    // 3) Flash controller V6 or later:\n    //    Can use fast clock\n    norflash_get_unique_id(norflash_ctx[id].unique_id,\n                           sizeof(norflash_ctx[id].unique_id));\n#endif\n  }\n\n  // Set norflash source clock\n  source_freq = hal_norflash_clk_to_cmu_freq(norcfg.source_clk);\n  hal_cmu_flash_set_freq(source_freq);\n\n  /* over write config */\n  if (norcfg.override_config) {\n    /* div */\n    norflaship_div(norcfg.div);\n    /* cmd quad */\n    norflaship_cmdquad(norcfg.cmdquad ? HAL_NORFLASH_YES : HAL_NORFLASH_NO);\n    /* sample delay */\n    norflaship_samdly(norcfg.samdly);\n#if 0\n        /* dummy clc */\n        norflaship_dummyclc(norcfg.dummyclc);\n\n        /* dummy clc en */\n        norflaship_dummyclcen(norcfg.dummyclcen);\n\n        /* 4 byte address */\n        norflaship_addrbyte4(norcfg.byte4byteaddr);\n#endif\n    /* ru en */\n    norflaship_ruen(norcfg.spiruen);\n    /* rd en */\n    norflaship_rden(norcfg.spirden);\n    /* rd cmd */\n    norflaship_rdcmd(norcfg.rdcmd);\n    /* frd cmd */\n    norflaship_frdcmd(norcfg.frdcmd);\n    /* qrd cmd */\n    norflaship_qrdcmd(norcfg.qrdcmd);\n  } else {\n    // Init divider\n    result = norflash_init_div(&norcfg);\n    if (result != 0) {\n      result = HAL_NORFLASH_BAD_DIV;\n      goto _exit;\n    }\n\n    if (!reopen || calib) {\n      if (reopen) {\n        norflash_pre_operation();\n      }\n      // Calib with the new divider\n      result = norflash_sample_delay_calib(DRV_NORFLASH_CALIB_FLASH_ID);\n      if (result != 0) {\n        result = HAL_NORFLASH_BAD_CALIB_ID;\n        goto _exit;\n      }\n      if (reopen) {\n        norflash_post_operation();\n      }\n    } else {\n      norflash_set_sample_delay_index(timing_idx);\n    }\n  }\n\n  if (!reopen) {\n    norflash_get_size(\n        &norflash_ctx[id].total_size, &norflash_ctx[id].block_size,\n        &norflash_ctx[id].sector_size, &norflash_ctx[id].page_size);\n\n#ifdef FLASH_SECURITY_REGISTER\n    result = hal_norflash_parse_security_register_config();\n    if (result == HAL_NORFLASH_OK) {\n      sec_reg_enabled = true;\n    } else if (result != HAL_NORFLASH_BAD_OP) {\n      goto _exit;\n    }\n#endif\n\n#if (CHIP_FLASH_CTRL_VER <= 1) && !defined(FLASH_LOW_SPEED) &&                 \\\n    !defined(OSC_26M_X4_AUD2BB)\n    // 1) Flash controller V2 or later\n    //    No requirement on system_freq\n    // 2) Flash controller V1\n    //    Requirement on system_freq when running in quad mode (4-line mode):\n    //      Byte Access:     flash_line_speed < 2 * system_freq\n    //      Halfword Access: flash_line_speed < 4 * system_freq\n    //      Word Access:     flash_line_speed < 8 * system_freq\n    //    The maximum flash_line_speed is 120M in spec, and PLL_FREQ / 2 in our\n    //    system. Normally it is 24.576M * 8 / 2 ~= 100M. So the safe\n    //    system_freq should be larger than 50M/25M/12.5M for byte/halfword/word\n    //    access. Cached access to flash is always safe, because it is always\n    //    word-aligned (system_freq is never below 26M). However, uncached\n    //    access (e.g., access to audio/user/factory data sections) is under\n    //    risk.\n    hal_sysfreq_set_min_freq(HAL_CMU_FREQ_52M);\n#endif\n\n#if defined(PROGRAMMER) || defined(OTA_PROGRAMMER)\n    norflash_init_status(0);\n#elif defined(FLASH_PROTECTION)\n    norflash_set_block_protection(hal_norflash_get_bp_cfg(id));\n#endif\n  }\n\n  op = norcfg.mode;\n  if (norcfg.speed >= HAL_NORFLASH_SPEED_104M) {\n    op |= HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE;\n  }\n\n  // Divider will be set to normal read mode\n  result = norflash_set_mode(op);\n  if (result != 0) {\n    result = HAL_NORFLASH_BAD_OP;\n    goto _exit;\n  }\n\n  // -----------------------------\n  // From now on, norflash_pre_operation() must be called before\n  // sending any command to flash\n  // -----------------------------\n\n  if (!reopen) {\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n    if (norcfg.dec_enable && (norcfg.dec_size > 0)) {\n      norflaship_dec_saddr(norcfg.dec_addr);\n      norflaship_dec_eaddr(norcfg.dec_addr + norcfg.dec_size);\n      norflaship_dec_index(norcfg.dec_idx);\n      norflaship_dec_enable();\n    } else {\n      norflaship_dec_disable();\n    }\n#endif\n\n#if defined(CHIP_BEST2001) &&                                                  \\\n    (defined(PSRAMUHS_ENABLE) || defined(PSRAM_ENABLE))\n    norflaship_fetch_disable();\n#endif\n  }\n\n  if (!norcfg.override_config && (!reopen || calib)) {\n    result = norflash_sample_delay_calib(DRV_NORFLASH_CALIB_MAGIC_WORD);\n    if (result != 0) {\n      result = HAL_NORFLASH_BAD_CALIB_MAGIC;\n      goto _exit;\n    }\n  }\n\n  norflash_ctx[id].opened = true;\n\n  result = HAL_NORFLASH_OK;\n\n_exit:\n  if (result != HAL_NORFLASH_OK) {\n    hal_cmu_flash_set_freq(HAL_CMU_FREQ_26M);\n    hal_norflash_reset_timing();\n    // Flash might be accessed again\n  }\n\n  norflash_ctx[id].open_state = result;\n\n  return result;\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_open(enum HAL_NORFLASH_ID_T id,\n                  const struct HAL_NORFLASH_CONFIG_T *cfg) {\n  return _norflash_open(id, cfg, false, true, 0);\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_reopen(enum HAL_NORFLASH_ID_T id,\n                    const struct HAL_NORFLASH_CONFIG_T *cfg) {\n  return _norflash_open(id, cfg, true, true, 0);\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_apply_config(enum HAL_NORFLASH_ID_T id,\n                          const struct HAL_NORFLASH_CONFIG_T *cfg,\n                          uint32_t timing_idx) {\n  return _norflash_open(id, cfg, true, false, timing_idx);\n}\n\nuint32_t hal_norflash_get_timing_index(enum HAL_NORFLASH_ID_T id) {\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n  return norflash_get_sample_delay_index();\n}\n\nvoid hal_norflash_show_calib_result(void) { norflash_show_calib_result(); }\n\nenum HAL_NORFLASH_RET_T hal_norflash_erase_chip(enum HAL_NORFLASH_ID_T id) {\n  uint32_t total_size = 0;\n\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  total_size = norflash_ctx[id].total_size;\n\n  return hal_norflash_erase(id, 0, total_size);\n}\n\nstatic enum HAL_NORFLASH_RET_T hal_norflash_erase_int(enum HAL_NORFLASH_ID_T id,\n                                                      uint32_t start_address,\n                                                      uint32_t len,\n                                                      int suspend) {\n  uint32_t remain_len, current_address, total_size, block_size, sector_size;\n  enum HAL_NORFLASH_RET_T ret = HAL_NORFLASH_OK;\n  total_size = norflash_ctx[id].total_size;\n  block_size = norflash_ctx[id].block_size;\n  sector_size = norflash_ctx[id].sector_size;\n\n  // Check address and length\n  if (total_size <= (start_address & HAL_NORFLASH_ADDR_MASK)) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  remain_len = total_size - (start_address & HAL_NORFLASH_ADDR_MASK);\n  if (len > remain_len) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n\n#ifdef PUYA_FLASH_ERASE_PAGE_ENABLE\n  // Align to page boundary\n  uint32_t page_size;\n\n  page_size = norflash_ctx[id].page_size;\n  remain_len = start_address & (page_size - 1);\n  if (remain_len) {\n    start_address -= remain_len;\n    len += remain_len;\n  }\n  remain_len = len & (page_size - 1);\n  if (remain_len) {\n    len += page_size - remain_len;\n  }\n#else\n  // Align to sector boundary\n  remain_len = start_address & (sector_size - 1);\n  if (remain_len) {\n    start_address -= remain_len;\n    len += remain_len;\n  }\n  remain_len = len & (sector_size - 1);\n  if (remain_len) {\n    len += sector_size - remain_len;\n  }\n#endif\n  current_address = start_address;\n  remain_len = len;\n\n  norflash_pre_operation();\n\n  if ((current_address & HAL_NORFLASH_ADDR_MASK) == 0 &&\n      remain_len >= total_size) {\n    // erase whole chip\n    ret = norflash_erase(current_address, DRV_NORFLASH_ERASE_CHIP, suspend);\n  } else {\n    while (remain_len > 0 && ret == HAL_NORFLASH_OK) {\n      if (remain_len >= block_size &&\n          ((current_address & (block_size - 1)) == 0)) {\n        // if large enough to erase a block and current_address is block\n        // boundary - erase a block\n        ret =\n            norflash_erase(current_address, DRV_NORFLASH_ERASE_BLOCK, suspend);\n        remain_len -= block_size;\n        current_address += block_size;\n      } else {\n#ifdef PUYA_FLASH_ERASE_PAGE_ENABLE\n        if (remain_len >= sector_size &&\n            ((current_address & (sector_size - 1)) == 0)) {\n          // if large enough to erase a sector and current_address is sector\n          // boundary - erase a sector\n          ret = norflash_erase(current_address, DRV_NORFLASH_ERASE_SECTOR,\n                               suspend);\n          remain_len -= sector_size;\n          current_address += sector_size;\n        } else {\n          // erase a page\n          ret =\n              norflash_erase(current_address, DRV_NORFLASH_ERASE_PAGE, suspend);\n          if (remain_len > page_size) {\n            remain_len -= page_size;\n          } else {\n            remain_len = 0;\n          }\n          current_address += page_size;\n        }\n#else\n        // erase a sector\n        ret =\n            norflash_erase(current_address, DRV_NORFLASH_ERASE_SECTOR, suspend);\n        if (remain_len > sector_size) {\n          remain_len -= sector_size;\n        } else {\n          remain_len = 0;\n        }\n        current_address += sector_size;\n#endif\n      }\n    }\n  }\n\n  norflash_post_operation();\n\n#ifdef FLASH_SUSPEND\n  if (ret == HAL_NORFLASH_SUSPENDED) {\n    suspend_state = SUSPEND_STATE_ERASE;\n    op_next_addr = current_address;\n    op_remain_len = remain_len;\n  } else {\n    suspend_state = SUSPEND_STATE_NONE;\n  }\n#endif\n\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_erase_suspend(enum HAL_NORFLASH_ID_T id,\n                                                   uint32_t start_address,\n                                                   uint32_t len, int suspend) {\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n#ifdef FLASH_SUSPEND\n  if (suspend_state != SUSPEND_STATE_NONE) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n  if ((norflash_get_supported_mode() & HAL_NORFLASH_OP_MODE_SUSPEND) == 0) {\n    suspend = 0;\n  }\n#endif\n\n  return hal_norflash_erase_int(id, start_address, len, suspend);\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_erase(enum HAL_NORFLASH_ID_T id,\n                                           uint32_t start_address,\n                                           uint32_t len) {\n  return hal_norflash_erase_suspend(id, start_address, len, 0);\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_erase_resume(enum HAL_NORFLASH_ID_T id,\n                                                  int suspend) {\n#ifdef FLASH_SUSPEND\n  enum HAL_NORFLASH_RET_T ret;\n\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  if (suspend_state != SUSPEND_STATE_ERASE) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n  if ((norflash_get_supported_mode() & HAL_NORFLASH_OP_MODE_SUSPEND) == 0) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n\n  ret = norflash_erase_resume(suspend);\n  if (ret == HAL_NORFLASH_SUSPENDED) {\n    return ret;\n  }\n\n  return hal_norflash_erase_int(id, op_next_addr, op_remain_len, suspend);\n#else\n  return HAL_NORFLASH_OK;\n#endif\n}\n\nstatic enum HAL_NORFLASH_RET_T\nhal_norflash_write_int(enum HAL_NORFLASH_ID_T id, uint32_t start_address,\n                       const uint8_t *buffer, uint32_t len, int suspend) {\n  const uint8_t *current_buffer;\n  uint32_t remain_len, current_address, total_size, page_size, write_size;\n  uint32_t pp_remain;\n  enum HAL_NORFLASH_RET_T ret = HAL_NORFLASH_OK;\n\n  total_size = norflash_ctx[id].total_size;\n  page_size = norflash_ctx[id].page_size;\n\n  // Check address and length\n  if (total_size <= (start_address & HAL_NORFLASH_ADDR_MASK)) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  remain_len = total_size - (start_address & HAL_NORFLASH_ADDR_MASK);\n  if (len > remain_len) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n\n  current_address = start_address;\n  current_buffer = buffer;\n  remain_len = len;\n\n  norflash_pre_operation();\n\n  while (remain_len > 0 && ret == HAL_NORFLASH_OK) {\n    if (remain_len > page_size) {\n      write_size = page_size;\n    } else {\n      write_size = remain_len;\n    }\n    // Align to program page\n    pp_remain = page_size - (current_address & (page_size - 1));\n    if (write_size > pp_remain) {\n      write_size = pp_remain;\n    }\n\n    ret = norflash_write(current_address, current_buffer, write_size, suspend);\n\n    current_address += write_size;\n    current_buffer += write_size;\n    remain_len -= write_size;\n  }\n\n  norflash_post_operation();\n\n#ifdef FLASH_SUSPEND\n  if (ret == HAL_NORFLASH_SUSPENDED) {\n    suspend_state = SUSPEND_STATE_PROGRAM;\n    op_next_addr = current_address;\n    op_next_buf = current_buffer;\n    op_remain_len = remain_len;\n  } else {\n    suspend_state = SUSPEND_STATE_NONE;\n  }\n#endif\n\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_write_suspend(enum HAL_NORFLASH_ID_T id,\n                                                   uint32_t start_address,\n                                                   const uint8_t *buffer,\n                                                   uint32_t len, int suspend) {\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n#ifdef FLASH_SUSPEND\n  if (suspend_state != SUSPEND_STATE_NONE) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n  if ((norflash_get_supported_mode() & HAL_NORFLASH_OP_MODE_SUSPEND) == 0) {\n    suspend = 0;\n  }\n#endif\n\n  return hal_norflash_write_int(id, start_address, buffer, len, suspend);\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_write(enum HAL_NORFLASH_ID_T id,\n                                           uint32_t start_address,\n                                           const uint8_t *buffer,\n                                           uint32_t len) {\n  return hal_norflash_write_suspend(id, start_address, buffer, len, 0);\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_write_resume(enum HAL_NORFLASH_ID_T id,\n                                                  int suspend) {\n#ifdef FLASH_SUSPEND\n  enum HAL_NORFLASH_RET_T ret;\n\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  if (suspend_state != SUSPEND_STATE_PROGRAM) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n  if ((norflash_get_supported_mode() & HAL_NORFLASH_OP_MODE_SUSPEND) == 0) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n\n  ret = norflash_write_resume(suspend);\n  if (ret == HAL_NORFLASH_SUSPENDED) {\n    return ret;\n  }\n\n  return hal_norflash_write_int(id, op_next_addr, op_next_buf, op_remain_len,\n                                suspend);\n#else\n  return HAL_NORFLASH_OK;\n#endif\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_suspend_check_irq(enum HAL_NORFLASH_ID_T id, uint32_t irq_num) {\n#ifdef FLASH_SUSPEND\n  int ret;\n\n  ret = norflash_suspend_check_irq(irq_num);\n  if (ret) {\n    return HAL_NORFLASH_ERR;\n  }\n#endif\n\n  return HAL_NORFLASH_OK;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_read(enum HAL_NORFLASH_ID_T id,\n                                          uint32_t start_address,\n                                          uint8_t *buffer, uint32_t len) {\n  uint8_t *current_buffer;\n  uint32_t remain_len, current_address, total_size, read_size;\n\n  ASSERT(norflash_ctx[id].opened, err_not_opened);\n\n  total_size = norflash_ctx[id].total_size;\n\n  // Check address and length\n  if (total_size <= (start_address & HAL_NORFLASH_ADDR_MASK)) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  remain_len = total_size - (start_address & HAL_NORFLASH_ADDR_MASK);\n  if (len > remain_len) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n\n  read_size = NORFLASHIP_RXFIFO_SIZE;\n  remain_len = len;\n  current_address = start_address;\n  current_buffer = buffer;\n\n  norflash_pre_operation();\n\n  while (remain_len > 0) {\n    read_size = (remain_len > NORFLASHIP_RXFIFO_SIZE) ? NORFLASHIP_RXFIFO_SIZE\n                                                      : remain_len;\n    norflash_read(current_address, current_buffer, read_size);\n\n    current_address += read_size;\n    current_buffer += read_size;\n    remain_len -= read_size;\n  }\n\n  norflash_post_operation();\n\n  return HAL_NORFLASH_OK;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_close(enum HAL_NORFLASH_ID_T id) {\n  return HAL_NORFLASH_OK;\n}\n\nvoid hal_norflash_sleep(enum HAL_NORFLASH_ID_T id) {\n  if (!norflash_ctx[id].opened) {\n    return;\n  }\n\n#ifdef FLASH_DEEP_SLEEP\n  norflash_sleep();\n#else\n  norflash_pre_operation();\n#endif\n\n  norflaship_busy_wait();\n  norflaship_sleep();\n}\n\nvoid hal_norflash_wakeup(enum HAL_NORFLASH_ID_T id) {\n  if (!norflash_ctx[id].opened) {\n    return;\n  }\n\n  norflaship_wakeup();\n\n#ifdef FLASH_DEEP_SLEEP\n  norflash_wakeup();\n#else\n  norflash_post_operation();\n#endif\n\n#if 0\n    // Flush prefetch buffer\n    *(volatile uint32_t *)FLASH_NC_BASE;\n    *(volatile uint32_t *)(FLASH_NC_BASE + 0x1000);\n#else\n  norflaship_clear_rxfifo();\n  norflaship_busy_wait();\n#endif\n}\n\nint hal_norflash_busy(void) { return norflaship_is_busy(); }\n\nstatic void hal_norflash_prefetch_idle(void) {\n  hal_sys_timer_delay(4);\n  if (norflaship_is_busy()) {\n    hal_sys_timer_delay(4);\n  }\n}\n\n#ifdef FLASH_FREQ_DYNAMIC_ADJUST\nint hal_norflash_freq_dynamic_adjust_save_config(\n    struct HAL_NORFLASH_FREQ_DYNAMIC_ADJUST_CONFIG_T *adjust_cfg) {\n  int ret = -1;\n\n  for (uint8_t i = 0; i < ARRAY_SIZE(norflash_freq_dynamic_adjust_cfg); i++) {\n    if (!norflash_freq_dynamic_adjust_cfg[i].source_clk) {\n      norflash_freq_dynamic_adjust_cfg[i] = *adjust_cfg;\n      ret = 0;\n      break;\n    }\n  }\n\n  return ret;\n}\n\nint hal_norflash_freq_dynamic_adjust_set_freq(enum HAL_CMU_FREQ_T freq) {\n  int ret = -1;\n\n  for (uint8_t i = 0; i < ARRAY_SIZE(norflash_freq_dynamic_adjust_cfg); i++) {\n    if (hal_norflash_clk_to_cmu_freq(\n            norflash_freq_dynamic_adjust_cfg[i].source_clk) == freq) {\n      struct HAL_NORFLASH_CONFIG_T norflash_cfg =\n          *(struct HAL_NORFLASH_CONFIG_T *)hal_norflash_get_init_config();\n      norflash_cfg.source_clk = norflash_freq_dynamic_adjust_cfg[i].source_clk;\n      hal_norflash_apply_config(\n          HAL_NORFLASH_ID_0, &norflash_cfg,\n          norflash_freq_dynamic_adjust_cfg[i].timing_index);\n      ret = 0;\n      break;\n    }\n  }\n\n  return ret;\n}\n#endif\n\nvoid hal_norflash_set_freq(enum HAL_CMU_FREQ_T freq) {\n  if (!hal_norflash_opened(HAL_NORFLASH_ID_0)) {\n    // At least best1000 and best2001 require the timing reset\n#if 1\n    // Make sure flash is still working after freq change\n\n    // Wait until norflash becomes idle\n    hal_norflash_prefetch_idle();\n\n    // Reset flash timing\n    hal_norflash_reset_timing();\n#endif\n\n    hal_cmu_flash_set_freq(freq);\n  }\n#ifdef FLASH_FREQ_DYNAMIC_ADJUST\n  else {\n    if (hal_cmu_flash_get_freq() != freq) {\n      hal_norflash_freq_dynamic_adjust_set_freq(freq);\n    }\n  }\n#endif\n}\n\nconst struct HAL_NORFLASH_CONFIG_T *hal_norflash_get_init_config(void) {\n  return &norflash_cfg;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_init(void) {\n  enum HAL_NORFLASH_RET_T ret;\n  struct HAL_NORFLASH_CONFIG_T norflash_cfg =\n      *(struct HAL_NORFLASH_CONFIG_T *)hal_norflash_get_init_config();\n\n  // Pmu codes might be located in flash\n  pmu_flash_freq_config(norflash_cfg.speed);\n\n  // Avoid flash access from here\n  hal_norflash_prefetch_idle();\n\n  ret = hal_norflash_open(HAL_NORFLASH_ID_0, &norflash_cfg);\n  if (ret != HAL_NORFLASH_OK) {\n    goto _exit;\n  }\n#ifdef FLASH_FREQ_DYNAMIC_ADJUST\n  struct HAL_NORFLASH_FREQ_DYNAMIC_ADJUST_CONFIG_T dynamic_adjust_cfg;\n  uint32_t source_clk_save;\n  source_clk_save = norflash_cfg.source_clk;\n  dynamic_adjust_cfg.source_clk = norflash_cfg.source_clk;\n  dynamic_adjust_cfg.timing_index =\n      hal_norflash_get_timing_index(HAL_NORFLASH_ID_0);\n  hal_norflash_freq_dynamic_adjust_save_config(&dynamic_adjust_cfg);\n  norflash_cfg.source_clk = HAL_NORFLASH_SPEED_26M;\n  norflash_cfg.speed = HAL_NORFLASH_SPEED_26M;\n  ret = hal_norflash_reopen(HAL_NORFLASH_ID_0, &norflash_cfg);\n  if (ret != HAL_NORFLASH_OK) {\n    goto _exit;\n  }\n  dynamic_adjust_cfg.source_clk = norflash_cfg.source_clk;\n  dynamic_adjust_cfg.timing_index =\n      hal_norflash_get_timing_index(HAL_NORFLASH_ID_0);\n  hal_norflash_freq_dynamic_adjust_save_config(&dynamic_adjust_cfg);\n  hal_norflash_set_freq(hal_norflash_clk_to_cmu_freq(source_clk_save));\n#endif\n_exit:\n  return ret;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_deinit(void) {\n  // Avoid flash access from here\n  hal_norflash_prefetch_idle();\n\n#if (CHIP_FLASH_CTRL_VER >= 2)\n  // Set the direction of 4 IO pins to output when in idle\n  norflaship_set_idle_io_dir(0);\n#endif\n#if (CHIP_FLASH_CTRL_VER >= 3)\n  // Set the dummy cycles for security register read command\n  norflaship_dummy_others(8);\n#endif\n\n  // Reset norflash source clock\n  hal_cmu_flash_set_freq(HAL_CMU_FREQ_26M);\n\n  // Reset controller timing\n  hal_norflash_reset_timing();\n\n  // Reset norflash in slow clock configuration\n  norflash_reset();\n\n  norflash_ctx[HAL_NORFLASH_ID_0].opened = false;\n\n  return HAL_NORFLASH_OK;\n}\n\nuint32_t hal_norflash_get_flash_total_size(enum HAL_NORFLASH_ID_T id) {\n  return norflash_ctx[id].total_size;\n}\n\nint hal_norflash_opened(enum HAL_NORFLASH_ID_T id) {\n  return norflash_ctx[id].opened;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_get_open_state(enum HAL_NORFLASH_ID_T id) {\n  return norflash_ctx[id].open_state;\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_enable_remap(enum HAL_NORFLASH_ID_T id,\n                                                  uint32_t addr, uint32_t len,\n                                                  uint32_t offset) {\n#if (CHIP_FLASH_CTRL_VER >= 2)\n  uint32_t flash_size;\n  uint32_t remap_from;\n  int ret;\n\n  STATIC_ASSERT((FLASH_BASE & HAL_NORFLASH_ADDR_MASK) == 0, \"Bad FLASH_BASE\");\n  STATIC_ASSERT((FLASH_SIZE & (FLASH_SIZE - 1)) == 0, \"Bad FLASH_SIZE\");\n\n#ifdef OTA_BARE_BOOT\n  flash_size = FLASH_SIZE;\n#else\n  if (!norflash_ctx[id].opened) {\n    return HAL_NORFLASH_NOT_OPENED;\n  }\n\n  flash_size = norflash_ctx[id].total_size;\n#ifndef PROGRAMMER\n  if (flash_size > FLASH_SIZE) {\n    flash_size = FLASH_SIZE;\n  }\n#endif\n#endif\n\n  remap_from = addr & HAL_NORFLASH_ADDR_MASK;\n\n#ifdef CHIP_BEST2300P\n  uint32_t remap_to, remap_len, remap_end, region_len;\n  uint8_t remap_id;\n  uint8_t msb_pos;\n\n  if (offset & (offset - 1)) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  if (offset > flash_size / 2) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  flash_size = offset * 2;\n\n  if (remap_from < flash_size / (1 << (NORFLASHIP_REMAP_NUM + 1))) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n  if (remap_from % (flash_size / (1 << (NORFLASHIP_REMAP_NUM + 1)))) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n\n  if (remap_from + len > flash_size / 2) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n\n  norflaship_busy_wait();\n\n  remap_id = 0;\n  remap_end = flash_size / 2;\n  remap_len = remap_end - remap_from;\n  while (remap_len && remap_id < NORFLASHIP_REMAP_NUM) {\n    msb_pos = 31 - __CLZ(remap_len);\n    region_len = 1 << msb_pos;\n    remap_from = remap_end - region_len;\n    remap_to = flash_size -\n               remap_end; // OR: (flash_size / 2 + (flash_size / 2 - remap_end))\n    ret = norflaship_config_remap_section(remap_id, remap_from, region_len,\n                                          remap_to);\n    if (ret) {\n      return HAL_NORFLASH_BAD_OP;\n    }\n    remap_len -= region_len;\n    remap_end -= region_len;\n    remap_id++;\n  }\n\n  if (remap_len) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n#else\n  // Align len to sector size\n  len = (len + (REMAP_SECTOR_SIZE - 1)) & ~(REMAP_SECTOR_SIZE - 1);\n  if (len > offset) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n  if (remap_from + len > offset) {\n    return HAL_NORFLASH_BAD_LEN;\n  }\n  if (remap_from + len + offset > flash_size) {\n    return HAL_NORFLASH_BAD_ADDR;\n  }\n\n  norflaship_busy_wait();\n\n  ret =\n      norflaship_config_remap_section(0, remap_from, len, remap_from + offset);\n  if (ret) {\n    return HAL_NORFLASH_BAD_OP;\n  }\n#endif\n\n  hal_norflash_re_enable_remap(id);\n\n  return HAL_NORFLASH_OK;\n#else\n  return HAL_NORFLASH_ERR;\n#endif\n}\n\nenum HAL_NORFLASH_RET_T hal_norflash_disable_remap(enum HAL_NORFLASH_ID_T id) {\n#if (CHIP_FLASH_CTRL_VER >= 2)\n  norflaship_busy_wait();\n\n  norflaship_disable_remap();\n\n  norflaship_busy_wait();\n  norflaship_clear_fifos();\n\n  return HAL_NORFLASH_OK;\n#else\n  return HAL_NORFLASH_ERR;\n#endif\n}\n\nenum HAL_NORFLASH_RET_T\nhal_norflash_re_enable_remap(enum HAL_NORFLASH_ID_T id) {\n#if (CHIP_FLASH_CTRL_VER >= 2)\n  norflaship_busy_wait();\n\n  norflaship_enable_remap();\n\n  norflaship_busy_wait();\n  norflaship_clear_fifos();\n\n  return HAL_NORFLASH_OK;\n#else\n  return HAL_NORFLASH_ERR;\n#endif\n}\n\nint hal_norflash_get_remap_status(enum HAL_NORFLASH_ID_T id) {\n#if (CHIP_FLASH_CTRL_VER >= 2)\n  return norflaship_get_remap_status();\n#else\n  return HAL_NORFLASH_ERR;\n#endif\n}\n"
  },
  {
    "path": "platform/hal/hal_norflash.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef NORFLASH_HAL_H\n#define NORFLASH_HAL_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_cmu.h\"\n\n#define HAL_NORFLASH_DEVICE_ID_LEN          3\n\n#define HAL_NORFLASH_UNIQUE_ID_LEN          16\n\nenum HAL_NORFLASH_ID_T {\n    HAL_NORFLASH_ID_0 = 0,\n    HAL_NORFLASH_ID_NUM,\n};\n\nenum HAL_NORFLASH_RET_T {\n    HAL_NORFLASH_OK,\n    HAL_NORFLASH_SUSPENDED,\n    HAL_NORFLASH_ERR,\n    HAL_NORFLASH_BAD_ID,\n    HAL_NORFLASH_BAD_DIV,\n    HAL_NORFLASH_BAD_CALIB_ID,\n    HAL_NORFLASH_BAD_CFG,\n    HAL_NORFLASH_BAD_OP,\n    HAL_NORFLASH_BAD_CALIB_MAGIC,\n    HAL_NORFLASH_BAD_ADDR,\n    HAL_NORFLASH_BAD_LEN,\n    HAL_NORFLASH_NOT_OPENED,\n    HAL_NORFLASH_CFG_NULL,\n};\n\nenum HAL_NORFLASH_SPEED {\n    HAL_NORFLASH_SPEED_13M  = 13000000,\n    HAL_NORFLASH_SPEED_26M  = 26000000,\n    HAL_NORFLASH_SPEED_52M  = 52000000,\n    HAL_NORFLASH_SPEED_78M  = 78000000,\n    HAL_NORFLASH_SPEED_104M = 104000000,\n    HAL_NORFLASH_SPEED_130M = 130000000,\n    HAL_NORFLASH_SPEED_156M = 156000000,\n    HAL_NORFLASH_SPEED_182M = 182000000,\n    HAL_NORFLASH_SPEED_208M = 208000000,\n    HAL_NORFLASH_SPEED_234M = 234000000,\n};\n\nenum HAL_NORFLASH_OP_MODE {\n    // Different groups can be used together, different flash-device may support different option(s)\n\n    // (1) basic read mode\n    /* standard spi mode */\n    HAL_NORFLASH_OP_MODE_STAND_SPI              = 0x1,\n    /* fast spi mode*/\n    HAL_NORFLASH_OP_MODE_FAST_SPI               = 0x2,\n     /* dual mode */\n    HAL_NORFLASH_OP_MODE_DUAL_OUTPUT            = 0x4,\n    /* dual mode */\n    HAL_NORFLASH_OP_MODE_DUAL_IO                = 0x8,\n    /* quad mode */\n    HAL_NORFLASH_OP_MODE_QUAD_OUTPUT            = 0x10,\n    /* quad mode */\n    HAL_NORFLASH_OP_MODE_QUAD_IO                = 0x20,\n\n    // (2) extend read mode\n    // read accelerate (no cmd bettween read operation) :\n    // may need Dual or Quad Mode\n    HAL_NORFLASH_OP_MODE_CONTINUOUS_READ        = 0x40,\n    // read high performance mode\n    HAL_NORFLASH_OP_MODE_HIGH_PERFORMANCE       = 0x80,\n    // read wrap mode\n    HAL_NORFLASH_OP_MODE_READ_WRAP              = 0x100,\n\n    // (3) program mode.\n    // page program mode\n    HAL_NORFLASH_OP_MODE_PAGE_PROGRAM           = 0x200,\n    // dual program mode\n    HAL_NORFLASH_OP_MODE_DUAL_PAGE_PROGRAM      = 0x400,\n    // quad program mode\n    HAL_NORFLASH_OP_MODE_QUAD_PAGE_PROGRAM      = 0x800,\n\n    // (4) advanced features\n    // suspend and resume\n    HAL_NORFLASH_OP_MODE_SUSPEND                = 0x1000,\n    // erase in standard spi mode\n    HAL_NORFLASH_OP_MODE_ERASE_IN_STD           = 0x2000,\n\n    HAL_NORFLASH_OP_MODE_RESERVED               = 0xFFFFFFFF,\n};\n\nstruct HAL_NORFLASH_CONFIG_T {\n    uint32_t source_clk;\n    uint32_t speed;\n    enum HAL_NORFLASH_OP_MODE mode;\n\n    /* internal use : can be config if need to (useful for rom) */\n    uint8_t override_config:1;\n    uint8_t neg_phase:1;\n    uint8_t pos_neg:1;\n    uint8_t cmdquad:1;\n    uint8_t samdly:3;\n    uint8_t div; /* least 2 */\n    uint8_t dualmode:1;\n    uint8_t holdpin:1;\n    uint8_t wprpin:1;\n    uint8_t quadmode:1;\n\n    uint8_t spiruen:3;\n    uint8_t spirden:3;\n\n    uint8_t dualiocmd;\n    uint8_t rdcmd;\n    uint8_t frdcmd;\n    uint8_t qrdcmd; /* quad io cmd */\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n    uint8_t  dec_enable;  /* 1: enable decoder, 0: disable decoder */\n    uint8_t  dec_idx;     /* decoder key index ,from 0 to 3 */\n    uint32_t dec_addr;    /* start address where to decode */\n    uint32_t dec_size;    /* bytes number will be decoded */\n#endif\n};\n\n/* hal api */\nvoid hal_norflash_set_freq(enum HAL_CMU_FREQ_T freq);\nconst struct HAL_NORFLASH_CONFIG_T *hal_norflash_get_init_config(void);\nenum HAL_NORFLASH_RET_T hal_norflash_init(void);\nenum HAL_NORFLASH_RET_T hal_norflash_deinit(void);\nenum HAL_NORFLASH_RET_T hal_norflash_open(enum HAL_NORFLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg);\nenum HAL_NORFLASH_RET_T hal_norflash_reopen(enum HAL_NORFLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg);\nenum HAL_NORFLASH_RET_T hal_norflash_apply_config(enum HAL_NORFLASH_ID_T id, const struct HAL_NORFLASH_CONFIG_T *cfg, uint32_t timing_idx);\nuint32_t hal_norflash_get_timing_index(enum HAL_NORFLASH_ID_T id);\nvoid hal_norflash_show_calib_result(void);\nenum HAL_CMU_FREQ_T hal_norflash_clk_to_cmu_freq(uint32_t clk);\nenum HAL_NORFLASH_RET_T hal_norflash_get_size(enum HAL_NORFLASH_ID_T id, uint32_t *total_size, uint32_t *block_size, uint32_t *sector_size, uint32_t *page_size);\nenum HAL_NORFLASH_RET_T hal_norflash_get_boundary(enum HAL_NORFLASH_ID_T id, uint32_t address, uint32_t* block_boundary, uint32_t* sector_boundary);\nenum HAL_NORFLASH_RET_T hal_norflash_get_id(enum HAL_NORFLASH_ID_T id, uint8_t *value, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_get_unique_id(enum HAL_NORFLASH_ID_T id, uint8_t *value, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_enable_protection(enum HAL_NORFLASH_ID_T id);\nenum HAL_NORFLASH_RET_T hal_norflash_disable_protection(enum HAL_NORFLASH_ID_T id);\nenum HAL_NORFLASH_RET_T hal_norflash_erase_chip(enum HAL_NORFLASH_ID_T id);\nenum HAL_NORFLASH_RET_T hal_norflash_erase_suspend(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint32_t len, int suspend);\nenum HAL_NORFLASH_RET_T hal_norflash_erase(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_erase_resume(enum HAL_NORFLASH_ID_T id, int suspend);\nenum HAL_NORFLASH_RET_T hal_norflash_write_suspend(enum HAL_NORFLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len, int suspend);\nenum HAL_NORFLASH_RET_T hal_norflash_write(enum HAL_NORFLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_write_resume(enum HAL_NORFLASH_ID_T id, int suspend);\nenum HAL_NORFLASH_RET_T hal_norflash_suspend_check_irq(enum HAL_NORFLASH_ID_T id, uint32_t irq_num);\nenum HAL_NORFLASH_RET_T hal_norflash_read(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint8_t *buffer, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_close(enum HAL_NORFLASH_ID_T id);\nvoid hal_norflash_sleep(enum HAL_NORFLASH_ID_T id);\nvoid hal_norflash_wakeup(enum HAL_NORFLASH_ID_T id);\nint hal_norflash_busy(void);\nuint32_t hal_norflash_get_flash_total_size(enum HAL_NORFLASH_ID_T id);\nint hal_norflash_opened(enum HAL_NORFLASH_ID_T id);\nenum HAL_NORFLASH_RET_T hal_norflash_get_open_state(enum HAL_NORFLASH_ID_T id);\nenum HAL_NORFLASH_RET_T hal_norflash_security_register_lock(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_security_register_erase(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_security_register_write(enum HAL_NORFLASH_ID_T id, uint32_t start_address, const uint8_t *buffer, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_security_register_read(enum HAL_NORFLASH_ID_T id, uint32_t start_address, uint8_t *buffer, uint32_t len);\nenum HAL_NORFLASH_RET_T hal_norflash_enable_remap(enum HAL_NORFLASH_ID_T id, uint32_t addr, uint32_t len, uint32_t offset);\nenum HAL_NORFLASH_RET_T hal_norflash_disable_remap(enum HAL_NORFLASH_ID_T id);\nenum HAL_NORFLASH_RET_T hal_norflash_re_enable_remap(enum HAL_NORFLASH_ID_T id);\nint hal_norflash_get_remap_status(enum HAL_NORFLASH_ID_T id);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* NORFLASH_HAL_H */\n"
  },
  {
    "path": "platform/hal/hal_norflaship.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_NORFLASHIP_H__\n#define __HAL_NORFLASHIP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\n#if (CHIP_FLASH_CTRL_VER <= 1)\n#define NORFLASHIP_RXFIFO_SIZE                  8\n#define NORFLASHIP_TXFIFO_SIZE                  256\n#else\n#define NORFLASHIP_RXFIFO_SIZE                  8\n#define NORFLASHIP_TXFIFO_SIZE                  16\n\n#if !defined(CHIP_BEST2300)\n#define NORFLASHIP_HAS_SECURITY\n#endif\n\n#if (defined(CHIP_BEST2300) || defined(CHIP_BEST1400))\n#define NORFLASHIP_REMAP_NUM                    0\n#else\n#define NORFLASHIP_HAS_IDLE_IO_CTRL\n#define NORFLASHIP_HAS_REMAP\n#define NORFLASHIP_REMAP_NUM                    4\n#endif\n#endif\n\n#define REMAP_SECTOR_SIZE                       0x1000\n\nuint8_t norflaship_continuous_read_mode_bit(uint8_t mode_bit);\n\nuint8_t norflaship_continuous_read_off(void);\n\nuint8_t norflaship_continuous_read_on(void);\n\nuint32_t norflaship_write_txfifo(const uint8_t *val, uint32_t len);\n\n#if (CHIP_FLASH_CTRL_VER <= 1)\nuint32_t norflaship_v1_write_txfifo_safe(const uint8_t *val, uint32_t len);\n\nuint32_t norflaship_v1_write_txfifo_all(const uint8_t *val, uint32_t len);\n#endif\n\nuint8_t norflaship_read_rxfifo_count(void);\n\nuint8_t norflaship_read_rxfifo(void);\n\nvoid norflaship_blksize(uint32_t blksize);\n\nvoid norflaship_cmd_addr(uint8_t cmd, uint32_t address);\n\nvoid norflaship_ext_tx_cmd(uint8_t cmd, uint32_t tx_len);\n\nvoid norflaship_ext_rx_cmd(uint8_t cmd, uint32_t tx_len, uint32_t rx_len);\n\nvoid norflaship_cmd_done(void);\n\nvoid norflaship_rxfifo_count_wait(uint8_t cnt);\n\nvoid norflaship_rxfifo_empty_wait(void);\n\nvoid norflaship_busy_wait(void);\n\nint norflaship_is_busy(void);\n\nvoid norflaship_clear_fifos(void);\n\nvoid norflaship_clear_rxfifo(void);\n\nvoid norflaship_clear_txfifo(void);\n\nvoid norflaship_div(uint32_t div);\n\nuint32_t norflaship_get_div(void);\n\nvoid norflaship_cmdquad(uint32_t v);\n\nuint32_t norflaship_get_pos_neg(void);\n\nvoid norflaship_pos_neg(uint32_t v);\n\nuint32_t norflaship_get_neg_phase(void);\n\nvoid norflaship_neg_phase(uint32_t v);\n\nuint32_t norflaship_get_samdly(void);\n\nvoid norflaship_samdly(uint32_t v);\n\nvoid norflaship_dual_mode(uint32_t v);\n\nvoid norflaship_hold_pin(uint32_t v);\n\nvoid norflaship_wpr_pin(uint32_t v);\n\nvoid norflaship_quad_mode(uint32_t v);\n\nvoid norflaship_dummyclc(uint32_t v);\n\nvoid norflaship_dummyclcen(uint32_t v);\n\nvoid norflaship_addrbyte4(uint32_t v);\n\nvoid norflaship_ruen(uint32_t v);\n\nvoid norflaship_rden(uint32_t v);\n\nvoid norflaship_dualiocmd(uint32_t v);\n\nvoid norflaship_rdcmd(uint32_t v);\n\nvoid norflaship_frdcmd(uint32_t v);\n\nvoid norflaship_qrdcmd(uint32_t v);\n\nuint32_t norflaship_get_rdcmd(void);\n\nvoid norflaship_set_idle_io_dir(uint32_t v);\n\nvoid norflaship_sleep(void);\n\nvoid norflaship_wakeup(void);\n\nvoid norflaship_dec_index(uint32_t idx);\n\nvoid norflaship_dec_saddr(uint32_t addr);\n\nvoid norflaship_dec_eaddr(uint32_t addr);\n\nvoid norflaship_dec_enable(void);\n\nvoid norflaship_dec_disable(void);\n\nvoid norflaship_man_wrap_width(uint32_t width);\n\nvoid norflaship_man_wrap_enable(void);\n\nvoid norflaship_man_wrap_disable(void);\n\nvoid norflaship_auto_wrap_cmd(uint32_t cmd);\n\nvoid norflaship_man_mode_enable(void);\n\nvoid norflaship_man_mode_disable(void);\n\nint norflaship_config_remap_section(uint32_t id, uint32_t addr, uint32_t len, uint32_t new_addr);\n\nvoid norflaship_enable_remap(void);\n\nvoid norflaship_disable_remap(void);\n\nint norflaship_get_remap_status(void);\n\nvoid norflaship_dummy_others(uint32_t v);\n\nvoid norflaship_fetch_disable();\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_norflaship_v1.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if (CHIP_FLASH_CTRL_VER <= 1)\n\n#include \"hal_norflaship.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"reg_norflaship_v1.h\"\n#ifdef PROGRAMMER\n#include \"task_schedule.h\"\n#else\n#define TASK_SCHEDULE true\n#endif\n\n//====================================================================================\n// Flash IP Operations\n//====================================================================================\n\n/*\n Supported Command List (Based on GD25Q32C):\n\n parameter NOP       = 8'h00 ;\n parameter WRR       = 8'h01 ;\n parameter PP        = 8'h02 ;\n parameter READ      = 8'h03 ;\n parameter WRDI      = 8'h04 ;\n parameter RDSR      = 8'h05 ;\n parameter WREN      = 8'h06 ;\n parameter FAST_READ = 8'h0B ;\n parameter P4E       = 8'h20 ;\n parameter SE2       = 8'h20 ;\n parameter CLSR      = 8'h30 ;\n parameter QPP       = 8'h32 ;\n parameter RCR       = 8'h35 ;\n parameter DOR       = 8'h3B ;\n parameter P8E       = 8'h40 ;\n parameter OTPP      = 8'h42 ;\n parameter PSR       = 8'h42 ;\n parameter ESR       = 8'h44 ;\n parameter RSR       = 8'h48 ;\n parameter OTPR      = 8'h4B ;\n parameter BE32      = 8'h52 ;\n parameter CE        = 8'h60 ;\n parameter QOR       = 8'h6B ;\n parameter PES       = 8'h75 ;\n parameter PER       = 8'h7A ;\n parameter READ_ID   = 8'h90 ;\n parameter RDID      = 8'h9F ;\n parameter HPM       = 8'hA3 ;\n parameter RES       = 8'hAB ;\n parameter DP        = 8'hB9 ;\n parameter DIOR      = 8'hBB ;\n parameter BE        = 8'hC7 ;\n parameter BE64      = 8'hD8 ;\n parameter SE        = 8'hD8 ;\n parameter QIOWR     = 8'hE7 ;\n parameter QIOR      = 8'hEB ;\n parameter CRR       = 8'hFF ;\n*/\n\n/* register memory address */\n#define NORFLASHIP_BASEADDR FLASH_CTRL_BASE\n\n#define norflaship_readb(a)                                                    \\\n  (*(volatile unsigned char *)(NORFLASHIP_BASEADDR + a))\n\n#define norflaship_read32(a)                                                   \\\n  (*(volatile unsigned int *)(NORFLASHIP_BASEADDR + a))\n\n#define norflaship_write32(v, a)                                               \\\n  ((*(volatile unsigned int *)(NORFLASHIP_BASEADDR + a)) = v)\n\n/* ip ops */\nuint8_t norflaship_continuous_read_mode_bit(uint8_t mode_bit) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(TX_CONFIG2_BASE);\n  val &= ~(TX_MODBIT_MASK);\n  val |= (mode_bit << TX_MODBIT_SHIFT) & TX_MODBIT_MASK;\n  norflaship_write32(val, TX_CONFIG2_BASE);\n  return 0;\n}\nuint8_t norflaship_continuous_read_off(void) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(TX_CONFIG2_BASE);\n  val &= ~(TX_CONMOD_MASK);\n  norflaship_write32(val, TX_CONFIG2_BASE);\n  return 0;\n}\nuint8_t norflaship_continuous_read_on(void) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(TX_CONFIG2_BASE);\n  val |= (TX_CONMOD_MASK);\n  norflaship_write32(val, TX_CONFIG2_BASE);\n  return 0;\n}\nuint32_t norflaship_write_txfifo(const uint8_t *val, uint32_t len) {\n  uint32_t i = 0;\n  for (i = 0; i < len; ++i) {\n    norflaship_write32(val[i], TXDATA_BASE);\n  }\n  return 0;\n}\nuint32_t norflaship_v1_write_txfifo_safe(const uint8_t *val, uint32_t len) {\n  uint32_t i;\n  uint32_t st;\n  for (i = 0; i < len; ++i) {\n    st = norflaship_read32(INT_STATUS_BASE);\n    if (st & TXFIFOFULL_MASK) {\n      break;\n    }\n    norflaship_write32(val[i], TXDATA_BASE);\n  }\n  return len - i;\n}\nuint32_t norflaship_v1_write_txfifo_all(const uint8_t *val, uint32_t len) {\n  uint32_t st;\n  while (len > 0) {\n    st = norflaship_read32(INT_STATUS_BASE);\n    if (st & TXFIFOFULL_MASK) {\n      continue;\n    }\n    norflaship_write32(*val, TXDATA_BASE);\n    val++;\n    len--;\n  }\n  return 0;\n}\nuint8_t norflaship_read_rxfifo_count(void) {\n  uint32_t val = 0;\n  val = norflaship_readb(INT_STATUS_BASE);\n  return ((val & RXFIFOCOUNT_MASK) >> RXFIFOCOUNT_SHIFT);\n}\nuint8_t norflaship_read_rxfifo(void) {\n  uint32_t val = 0;\n  val = norflaship_readb(RXDATA_BASE);\n  return val & 0xff;\n}\nvoid norflaship_blksize(uint32_t blksize) {\n  uint32_t val = 0;\n  val = norflaship_read32(TX_CONFIG2_BASE);\n  val = ((~(TX_BLKSIZE_MASK)) & val) | (blksize << TX_BLKSIZE_SHIFT);\n  norflaship_write32(val, TX_CONFIG2_BASE);\n}\nvoid norflaship_cmd_addr(uint8_t cmd, uint32_t address) {\n  norflaship_busy_wait();\n  norflaship_write32(address << TX_ADDR_SHIFT | (cmd << TX_CMD_SHIFT),\n                     TX_CONFIG1_BASE);\n}\nvoid norflaship_ext_tx_cmd(uint8_t cmd, uint32_t tx_len) {\n  norflaship_busy_wait();\n  norflaship_write32(cmd << EXT_CMD_SHIFT, TX_CONFIG1_BASE);\n}\nvoid norflaship_ext_rx_cmd(uint8_t cmd, uint32_t tx_len, uint32_t rx_len) {\n  norflaship_busy_wait();\n  norflaship_blksize(rx_len);\n  norflaship_write32(EXT_CMD_RX_MASK | (cmd << EXT_CMD_SHIFT), TX_CONFIG1_BASE);\n}\nvoid norflaship_cmd_done(void) { norflaship_busy_wait(); }\nvoid norflaship_rxfifo_count_wait(uint8_t cnt) {\n  uint32_t st = 0;\n  do {\n    st = norflaship_read32(INT_STATUS_BASE);\n  } while ((((st & RXFIFOCOUNT_MASK) >> RXFIFOCOUNT_SHIFT) < cnt) &&\n           TASK_SCHEDULE);\n}\nvoid norflaship_rxfifo_empty_wait(void) {\n  uint32_t st = 0;\n  do {\n    st = norflaship_read32(INT_STATUS_BASE);\n  } while ((st & RXFIFOEMPTY_MASK) && TASK_SCHEDULE);\n}\nvoid norflaship_busy_wait(void) {\n  uint32_t st = 0;\n  do {\n    st = norflaship_read32(INT_STATUS_BASE);\n  } while ((st & BUSY_MASK) && TASK_SCHEDULE);\n}\nint norflaship_is_busy(void) {\n  uint32_t st = 0;\n  st = norflaship_read32(INT_STATUS_BASE);\n  return !!(st & BUSY_MASK);\n}\nvoid norflaship_clear_fifos(void) {\n  norflaship_busy_wait();\n  norflaship_write32(RXFIFOCLR_MASK | TXFIFOCLR_MASK, FIFO_CONFIG_BASE);\n  norflaship_busy_wait();\n}\nvoid norflaship_clear_rxfifo(void) {\n  norflaship_busy_wait();\n  norflaship_write32(RXFIFOCLR_MASK, FIFO_CONFIG_BASE);\n  norflaship_busy_wait();\n}\nvoid norflaship_clear_txfifo(void) {\n  norflaship_busy_wait();\n  norflaship_write32(TXFIFOCLR_MASK, FIFO_CONFIG_BASE);\n  norflaship_busy_wait();\n}\nvoid norflaship_div(uint32_t div) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  val = (~(CLKDIV_MASK)&val) | (div << CLKDIV_SHIFT);\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nuint32_t norflaship_get_div(void) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  return (val & CLKDIV_MASK) >> CLKDIV_SHIFT;\n}\nvoid norflaship_cmdquad(uint32_t v) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= CMDQUAD_MASK;\n  else\n    val &= ~CMDQUAD_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nuint32_t norflaship_get_pos_neg(void) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  return !!(val & POS_NEG_MASK);\n}\nvoid norflaship_pos_neg(uint32_t v) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= POS_NEG_MASK;\n  else\n    val &= ~POS_NEG_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nuint32_t norflaship_get_neg_phase(void) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  return !!(val & NEG_PHASE_MASK);\n}\nvoid norflaship_neg_phase(uint32_t v) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= NEG_PHASE_MASK;\n  else\n    val &= ~NEG_PHASE_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nuint32_t norflaship_get_samdly(void) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  return (val & SAMDLY_MASK) >> SAMDLY_SHIFT;\n}\nvoid norflaship_samdly(uint32_t v) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  val = (~(SAMDLY_MASK)&val) | (v << SAMDLY_SHIFT);\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nvoid norflaship_dual_mode(uint32_t v) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= DUALMODE_MASK;\n  else\n    val &= ~DUALMODE_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nvoid norflaship_hold_pin(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= HOLDPIN_MASK;\n  else\n    val &= ~HOLDPIN_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nvoid norflaship_wpr_pin(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= WPRPIN_MASK;\n  else\n    val &= ~WPRPIN_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nvoid norflaship_quad_mode(uint32_t v) {\n  uint32_t val = 0;\n  norflaship_busy_wait();\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= QUADMODE_MASK;\n  else\n    val &= ~QUADMODE_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nvoid norflaship_dummyclc(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  val = (~(DUMMYCLC_MASK)&val) | (v << DUMMYCLC_SHIFT);\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nvoid norflaship_dummyclcen(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= DUMMYCLCEN_MASK;\n  else\n    val &= ~DUMMYCLCEN_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nvoid norflaship_addrbyte4(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE1_CONFIG_BASE);\n  if (v)\n    val |= ADDRBYTE4_MASK;\n  else\n    val &= ~ADDRBYTE4_MASK;\n  norflaship_write32(val, MODE1_CONFIG_BASE);\n}\nvoid norflaship_ruen(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(PULL_UP_DOWN_CONFIG_BASE);\n  val = (~(SPIRUEN_MASK)&val) | (v << SPIRUEN_SHIFT);\n  norflaship_write32(val, PULL_UP_DOWN_CONFIG_BASE);\n}\nvoid norflaship_rden(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(PULL_UP_DOWN_CONFIG_BASE);\n  val = (~(SPIRDEN_MASK)&val) | (v << SPIRDEN_SHIFT);\n  norflaship_write32(val, PULL_UP_DOWN_CONFIG_BASE);\n}\nvoid norflaship_dualiocmd(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE2_CONFIG_BASE);\n  val = (~(DUALIOCMD_MASK)&val) | (v << DUALIOCMD_SHIFT);\n  norflaship_write32(val, MODE2_CONFIG_BASE);\n}\nvoid norflaship_rdcmd(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE2_CONFIG_BASE);\n  val = (~(RDCMD_MASK)&val) | (v << RDCMD_SHIFT);\n  norflaship_write32(val, MODE2_CONFIG_BASE);\n}\nvoid norflaship_frdcmd(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE2_CONFIG_BASE);\n  val = (~(FRDCMD_MASK)&val) | (v << FRDCMD_SHIFT);\n  norflaship_write32(val, MODE2_CONFIG_BASE);\n}\nvoid norflaship_qrdcmd(uint32_t v) {\n  uint32_t val = 0;\n  val = norflaship_read32(MODE2_CONFIG_BASE);\n  val = (~(QRDCMDBIT_MASK)&val) | (v << QRDCMDBIT_SHIFT);\n  norflaship_write32(val, MODE2_CONFIG_BASE);\n}\nuint32_t norflaship_get_rdcmd(void) {\n  uint32_t val;\n  val = norflaship_read32(MODE2_CONFIG_BASE);\n  return ((RDCMD_MASK & val) >> RDCMD_SHIFT);\n}\nvoid norflaship_sleep(void) {}\nvoid norflaship_wakeup(void) {}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_norflaship_v2.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if (CHIP_FLASH_CTRL_VER >= 2)\n\n#include \"cmsis.h\"\n#include \"hal_norflaship.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"reg_norflaship_v2.h\"\n#ifdef PROGRAMMER\n#include \"task_schedule.h\"\n#else\n#define TASK_SCHEDULE true\n#endif\n\n//====================================================================================\n// Flash IP Operations\n//====================================================================================\n\n/*\n Supported Command List (Based on GD25Q32C):\n\n parameter WRSR1     = 8'h01 ;\n parameter PP        = 8'h02 ;\n parameter READ      = 8'h03 ;\n parameter WRDI      = 8'h04 ;\n parameter RDSR1     = 8'h05 ;\n parameter WREN      = 8'h06 ;\n parameter FREAD     = 8'h0B ;\n parameter WRSR3     = 8'h11 ;\n parameter RDSR3     = 8'h15 ;\n parameter SE        = 8'h20 ;\n parameter WRSR2     = 8'h31 ;\n parameter QPP       = 8'h32 ;\n parameter RDSR2     = 8'h35 ;\n parameter DOR       = 8'h3B ;\n parameter PSR       = 8'h42 ;\n parameter ESR       = 8'h44 ;\n parameter RSR       = 8'h48 ;\n parameter WEVSR     = 8'h50 ;\n parameter BE32      = 8'h52 ;\n parameter RSFDP     = 8'h5A ;\n parameter CE        = 8'h60 ;\n parameter RSTE      = 8'h66 ;\n parameter QOR       = 8'h6B ;\n parameter PES       = 8'h75 ;\n parameter SBW       = 8'h77 ;\n parameter PER       = 8'h7A ;\n parameter REMS      = 8'h90 ;\n parameter DREAD_ID  = 8'h92 ;\n parameter QREAD_ID  = 8'h94 ;\n parameter RST       = 8'h99 ;\n parameter RDID      = 8'h9F ;\n parameter HPM       = 8'hA3 ;\n parameter RDI       = 8'hAB ;\n parameter DP        = 8'hB9 ;\n parameter DIOR      = 8'hBB ;\n parameter BE64      = 8'hD8 ;\n parameter QIOWR     = 8'hE7 ;\n parameter QIOR      = 8'hEB ;\n parameter FPP       = 8'hF2 ;\n*/\n\nstatic struct NORFLASH_CTRL_T *const norflash =\n    (struct NORFLASH_CTRL_T *)FLASH_CTRL_BASE;\n\n#if 0\nstatic const uint8_t line_mode[8] = {\n    NEW_CMD_LINE_1X, NEW_CMD_LINE_1X, NEW_CMD_LINE_2X, NEW_CMD_LINE_1X,\n    NEW_CMD_LINE_4X, NEW_CMD_LINE_1X, NEW_CMD_LINE_1X, NEW_CMD_LINE_1X,\n};\n#endif\n\nuint8_t norflaship_continuous_read_mode_bit(uint8_t mode_bit) {\n  norflaship_busy_wait();\n  norflash->REG_004 =\n      SET_BITFIELD(norflash->REG_004, REG_004_MODEBIT, mode_bit);\n  return 0;\n}\nuint8_t norflaship_continuous_read_off(void) {\n  norflaship_busy_wait();\n  norflash->REG_004 &= ~REG_004_CONTINUOUS_MODE;\n  return 0;\n}\nuint8_t norflaship_continuous_read_on(void) {\n  norflaship_busy_wait();\n  norflash->REG_004 |= REG_004_CONTINUOUS_MODE;\n  return 0;\n}\nuint8_t norflaship_read_txfifo_empty_count(void) {\n  return GET_BITFIELD(norflash->REG_00C, REG_00C_TXFIFO_EMPCNT);\n}\nuint32_t norflaship_write_txfifo(const uint8_t *val, uint32_t len) {\n  uint32_t avail = norflaship_read_txfifo_empty_count();\n  while (len > 0 && avail > 0) {\n#if 0\n        if (len >= 4 && ((uint32_t)val & 3) == 0) {\n            norflash->REG_008.TXWORD = *(uint32_t *)val;\n            val += 4;\n            len -= 4;\n        } else if (len >= 2 && ((uint32_t)val & 1) == 0) {\n            norflash->REG_008.TXHALFWORD = *(uint16_t *)val;\n            val += 2;\n            len -= 2;\n        } else\n#endif\n    {\n      norflash->REG_008.TXBYTE = *(uint8_t *)val;\n      val += 1;\n      len -= 1;\n    }\n    avail -= 1;\n  }\n  return len;\n}\nuint8_t norflaship_read_rxfifo_count(void) {\n  return GET_BITFIELD(norflash->REG_00C, REG_00C_RXFIFO_COUNT);\n}\nuint8_t norflaship_read_rxfifo(void) { return norflash->REG_010; }\nvoid norflaship_blksize(uint32_t blksize) {\n  norflash->REG_004 =\n      SET_BITFIELD(norflash->REG_004, REG_004_BLOCK_SIZE, blksize);\n}\nvoid norflaship_cmd_addr(uint8_t cmd, uint32_t address) {\n  norflaship_busy_wait();\n  norflash->REG_004 &= ~REG_004_NEW_CMD_EN;\n  norflash->REG_000 = REG_000_CMD(cmd) | REG_000_ADDR(address);\n}\nvoid norflaship_ext_tx_cmd(uint8_t cmd, uint32_t tx_len) {\n  norflaship_busy_wait();\n  norflash->REG_004 =\n      SET_BITFIELD(norflash->REG_004, REG_004_BLOCK_SIZE, tx_len) |\n      REG_004_NEW_CMD_EN;\n  norflash->REG_000 = REG_000_CMD(cmd);\n}\nvoid norflaship_ext_rx_cmd(uint8_t cmd, uint32_t tx_len, uint32_t rx_len) {\n  norflaship_busy_wait();\n  norflash->REG_004 =\n      SET_BITFIELD(norflash->REG_004, REG_004_BLOCK_SIZE, tx_len) |\n      REG_004_NEW_CMD_EN;\n  norflash->REG_000 =\n      REG_000_CMD(cmd) | REG_000_NEW_CMD_RX_EN | REG_000_NEW_CMD_RX_LEN(rx_len);\n}\nvoid norflaship_cmd_done(void) {\n  norflaship_busy_wait();\n  norflash->REG_004 &= ~REG_004_NEW_CMD_EN;\n}\nvoid norflaship_rxfifo_count_wait(uint8_t cnt) {\n  while ((norflaship_read_rxfifo_count() < cnt) && TASK_SCHEDULE)\n    ;\n}\nvoid norflaship_rxfifo_empty_wait(void) {\n  while ((norflash->REG_00C & REG_00C_RXFIFO_EMPTY) && TASK_SCHEDULE)\n    ;\n}\nint norflaship_txfifo_is_full(void) {\n  return !!(norflash->REG_00C & REG_00C_TXFIFO_FULL);\n}\nvoid norflaship_busy_wait(void) {\n  while ((norflash->REG_00C & REG_00C_BUSY) && TASK_SCHEDULE)\n    ;\n}\nint norflaship_is_busy(void) { return !!(norflash->REG_00C & REG_00C_BUSY); }\nvoid norflaship_clear_fifos(void) {\n  norflaship_busy_wait();\n  norflash->REG_018 = REG_018_TXFIFOCLR | REG_018_RXFIFOCLR;\n  norflaship_busy_wait();\n}\nvoid norflaship_clear_rxfifo(void) {\n  norflaship_busy_wait();\n  norflash->REG_018 = REG_018_RXFIFOCLR;\n  norflaship_busy_wait();\n}\nvoid norflaship_clear_txfifo(void) {\n  norflaship_busy_wait();\n  norflash->REG_018 = REG_018_TXFIFOCLR;\n  norflaship_busy_wait();\n}\nvoid norflaship_div(uint32_t div) {\n  norflaship_busy_wait();\n#ifdef CHIP_BEST2300P\n  norflash->REG_014 =\n      SET_BITFIELD(norflash->REG_014, REG_014_CLKDIV, div) | EXTRA_TCHSH_EN_O;\n#else\n  norflash->REG_014 = SET_BITFIELD(norflash->REG_014, REG_014_CLKDIV, div);\n#endif\n}\nuint32_t norflaship_get_div(void) {\n  return GET_BITFIELD(norflash->REG_014, REG_014_CLKDIV);\n}\nvoid norflaship_cmdquad(uint32_t v) {\n  norflaship_busy_wait();\n#ifdef CHIP_BEST2300P\n  if (v) {\n    norflash->REG_014 |= REG_014_CMDQUAD | EXTRA_TCHSH_EN_O;\n  } else {\n    norflash->REG_014 =\n        (norflash->REG_014 & ~REG_014_CMDQUAD) | EXTRA_TCHSH_EN_O;\n  }\n#else\n  if (v) {\n    norflash->REG_014 |= REG_014_CMDQUAD;\n  } else {\n    norflash->REG_014 &= ~REG_014_CMDQUAD;\n  }\n#endif\n}\nuint32_t norflaship_get_samdly(void) {\n  return GET_BITFIELD(norflash->REG_014, REG_014_SAMPLESEL);\n}\nvoid norflaship_samdly(uint32_t v) {\n  norflaship_busy_wait();\n#ifdef CHIP_BEST2300P\n  norflash->REG_014 =\n      SET_BITFIELD(norflash->REG_014, REG_014_SAMPLESEL, v) | EXTRA_TCHSH_EN_O;\n#else\n  norflash->REG_014 = SET_BITFIELD(norflash->REG_014, REG_014_SAMPLESEL, v);\n#endif\n}\nvoid norflaship_dual_mode(uint32_t v) {\n  norflaship_busy_wait();\n#ifdef CHIP_BEST2300P\n  if (v) {\n    norflash->REG_014 |= REG_014_RAM_DUALMODE | EXTRA_TCHSH_EN_O;\n  } else {\n    norflash->REG_014 =\n        (norflash->REG_014 & ~REG_014_RAM_DUALMODE) | EXTRA_TCHSH_EN_O;\n  }\n#else\n  if (v) {\n    norflash->REG_014 |= REG_014_RAM_DUALMODE;\n  } else {\n    norflash->REG_014 &= ~REG_014_RAM_DUALMODE;\n  }\n#endif\n}\nvoid norflaship_hold_pin(uint32_t v) {\n#ifdef CHIP_BEST2300P\n  if (v) {\n    norflash->REG_014 |= REG_014_HOLDPIN | EXTRA_TCHSH_EN_O;\n  } else {\n    norflash->REG_014 =\n        (norflash->REG_014 & ~REG_014_HOLDPIN) | EXTRA_TCHSH_EN_O;\n  }\n#else\n  if (v) {\n    norflash->REG_014 |= REG_014_HOLDPIN;\n  } else {\n    norflash->REG_014 &= ~REG_014_HOLDPIN;\n  }\n#endif\n}\nvoid norflaship_wpr_pin(uint32_t v) {\n#ifdef CHIP_BEST2300P\n  if (v) {\n    norflash->REG_014 |= REG_014_WPROPIN | EXTRA_TCHSH_EN_O;\n  } else {\n    norflash->REG_014 =\n        (norflash->REG_014 & ~REG_014_WPROPIN) | EXTRA_TCHSH_EN_O;\n  }\n#else\n  if (v) {\n    norflash->REG_014 |= REG_014_WPROPIN;\n  } else {\n    norflash->REG_014 &= ~REG_014_WPROPIN;\n  }\n#endif\n}\nvoid norflaship_quad_mode(uint32_t v) {\n  norflaship_busy_wait();\n#ifdef CHIP_BEST2300P\n  if (v) {\n    norflash->REG_014 |= REG_014_RAM_QUADMODE | EXTRA_TCHSH_EN_O;\n  } else {\n    norflash->REG_014 =\n        (norflash->REG_014 & ~REG_014_RAM_QUADMODE) | EXTRA_TCHSH_EN_O;\n  }\n#else\n  if (v) {\n    norflash->REG_014 |= REG_014_RAM_QUADMODE;\n  } else {\n    norflash->REG_014 &= ~REG_014_RAM_QUADMODE;\n  }\n#endif\n}\nvoid norflaship_addrbyte4(uint32_t v) {\n#ifdef CHIP_BEST2300P\n  if (v) {\n    norflash->REG_014 |= REG_014_FOUR_BYTE_ADDR_EN | EXTRA_TCHSH_EN_O;\n  } else {\n    norflash->REG_014 =\n        (norflash->REG_014 & ~REG_014_FOUR_BYTE_ADDR_EN) | EXTRA_TCHSH_EN_O;\n  }\n#else\n  if (v) {\n    norflash->REG_014 |= REG_014_FOUR_BYTE_ADDR_EN;\n  } else {\n    norflash->REG_014 &= ~REG_014_FOUR_BYTE_ADDR_EN;\n  }\n#endif\n}\nvoid norflaship_ruen(uint32_t v) {\n  norflash->REG_034 = SET_BITFIELD(norflash->REG_034, REG_034_SPI_RUEN, v);\n}\nvoid norflaship_rden(uint32_t v) {\n  norflash->REG_034 = SET_BITFIELD(norflash->REG_034, REG_034_SPI_RDEN, v);\n}\nvoid norflaship_dualiocmd(uint32_t v) {\n  norflash->REG_020 = SET_BITFIELD(norflash->REG_020, REG_020_DUALCMD, v);\n}\nvoid norflaship_rdcmd(uint32_t v) {\n  norflash->REG_020 = SET_BITFIELD(norflash->REG_020, REG_020_READCMD, v);\n}\nvoid norflaship_frdcmd(uint32_t v) {\n  norflash->REG_020 = SET_BITFIELD(norflash->REG_020, REG_020_FREADCMD, v);\n}\nvoid norflaship_qrdcmd(uint32_t v) {\n  norflash->REG_020 = SET_BITFIELD(norflash->REG_020, REG_020_QUADCMD, v);\n}\nuint32_t norflaship_get_rdcmd(void) {\n  return GET_BITFIELD(norflash->REG_020, REG_020_READCMD);\n}\nvoid norflaship_set_idle_io_dir(uint32_t v) {\n#ifdef NORFLASHIP_HAS_IDLE_IO_CTRL\n  norflash->REG_034 = SET_BITFIELD(norflash->REG_034, REG_034_SPI_IOEN, v);\n#endif\n}\nvoid norflaship_sleep(void) {\n#ifndef NORFLASHIP_HAS_IDLE_IO_CTRL\n  norflash->REG_034 |= REG_034_SPI_IORES(1 << 2);\n#endif\n}\nvoid norflaship_wakeup(void) {\n#ifndef NORFLASHIP_HAS_IDLE_IO_CTRL\n  norflash->REG_034 &= ~REG_034_SPI_IORES(1 << 2);\n#endif\n}\n\nvoid norflaship_dec_index(uint32_t idx) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_058 = SET_BITFIELD(norflash->REG_058, REG_058_IDX, idx);\n#endif\n}\n\nvoid norflaship_dec_saddr(uint32_t addr) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_060 = ((addr & 0x000000ff) << 24) | ((addr & 0x0000ff00) << 8) |\n                      ((addr & 0x00ff0000) >> 8) | ((addr & 0xff000000) >> 24);\n#endif\n}\n\nvoid norflaship_dec_eaddr(uint32_t addr) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_064 = ((addr & 0x000000ff) << 24) | ((addr & 0x0000ff00) << 8) |\n                      ((addr & 0x00ff0000) >> 8) | ((addr & 0xff000000) >> 24);\n#endif\n}\n\nvoid norflaship_dec_enable(void) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_06C |= REG_06C_DEC_ENABLE;\n#endif\n}\n\nvoid norflaship_dec_disable(void) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_06C &= ~REG_06C_DEC_ENABLE;\n#endif\n}\n\nvoid norflaship_man_wrap_width(uint32_t width) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  int bits = 0;\n\n  if (width == 8)\n    bits = 0;\n  else if (width == 16)\n    bits = 1;\n  else if (width == 32)\n    bits = 2;\n  else if (width == 64)\n    bits = 3;\n  else\n    bits = 1;\n  norflash->REG_038 =\n      SET_BITFIELD(norflash->REG_038, REG_038_MAN_WRAP_BITS, bits);\n#endif\n}\n\nvoid norflaship_man_wrap_enable(void) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_038 |= REG_038_MAN_WRAP_ENABLE;\n#endif\n}\n\nvoid norflaship_man_wrap_disable(void) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_038 &= ~REG_038_MAN_WRAP_ENABLE;\n#endif\n}\n\nvoid norflaship_auto_wrap_cmd(uint32_t cmd) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_038 =\n      SET_BITFIELD(norflash->REG_038, REG_038_AUTO_WRAP_CMD, cmd);\n#endif\n}\n\nvoid norflaship_man_mode_enable(void) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_038 |= REG_038_WRAP_MODE_SEL;\n#endif\n}\n\nvoid norflaship_man_mode_disable(void) {\n#ifdef NORFLASHIP_HAS_SECURITY\n  norflash->REG_038 &= ~REG_038_WRAP_MODE_SEL;\n#endif\n}\n\nint norflaship_config_remap_section(uint32_t id, uint32_t addr, uint32_t len,\n                                    uint32_t new_addr) {\n#ifdef NORFLASHIP_HAS_REMAP\n  __IO uint32_t *start, *end, *to;\n\n  if (id >= 4) {\n    return 1;\n  }\n  if (len == 0) {\n    norflash->REG_0B0 &= ~(REG_0B0_ADDR0_REMAP_EN << id);\n    return 0;\n  }\n  if (addr & (REMAP_SECTOR_SIZE - 1)) {\n    return 2;\n  }\n  if (new_addr & (REMAP_SECTOR_SIZE - 1)) {\n    return 3;\n  }\n  if (len < REMAP_SECTOR_SIZE) {\n    return 4;\n  }\n\n#ifdef CHIP_BEST2300P\n  if (len & (len - 1)) {\n    return 5;\n  }\n\n  uint32_t len_idx;\n\n  len_idx = __CLZ(__RBIT(len)) - 9;\n\n  norflash->REG_0A0 =\n      (norflash->REG_0A0 &\n       ~(REG_0A0_LEN_WIDTH0_MASK << (id * REG_0A0_LEN_WIDTH1_SHIFT))) |\n      (REG_0A0_LEN_WIDTH0(len_idx) << (id * REG_0A0_LEN_WIDTH1_SHIFT));\n#else\n  if (len & (REMAP_SECTOR_SIZE - 1)) {\n    return 5;\n  }\n#endif\n\n  start = &norflash->REG_070 + id;\n  end = &norflash->REG_080 + id;\n  to = &norflash->REG_090 + id;\n\n  *start = addr;\n  *end = addr + len - 1;\n  *to = new_addr;\n\n  norflash->REG_0B0 |= (REG_0B0_ADDR0_REMAP_EN << id);\n\n  return 0;\n#else\n  return -1;\n#endif\n}\n\nvoid norflaship_enable_remap(void) {\n#ifdef NORFLASHIP_HAS_REMAP\n  norflash->REG_0B0 |= REG_0B0_GLB_REMAP_EN;\n#endif\n}\n\nvoid norflaship_disable_remap(void) {\n#ifdef NORFLASHIP_HAS_REMAP\n  norflash->REG_0B0 &= ~REG_0B0_GLB_REMAP_EN;\n#endif\n}\n\nint norflaship_get_remap_status(void) {\n#ifdef NORFLASHIP_HAS_REMAP\n  return (norflash->REG_0B0 & REG_0B0_GLB_REMAP_EN) ? true : false;\n#else\n  return false;\n#endif\n}\n\n#if (CHIP_FLASH_CTRL_VER >= 3)\nvoid norflaship_dummy_others(uint32_t v) {\n  norflash->REG_150 = REG_150_DUMMY_OTHERS(v);\n}\n#endif\n\nvoid norflaship_fetch_disable() { norflash->REG_02C &= ~REG_02C_FETCH_EN; }\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_overlay.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_overlay.h\"\n#include \"cmsis.h\"\n#include \"hal_cache.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_trace.h\"\n#include \"plat_types.h\"\n#ifdef __ARMCC_VERSION\n#include \"link_sym_armclang.h\"\n#endif\n\nextern uint32_t __overlay_text_start__[];\nextern uint32_t __overlay_text_exec_start__[];\nextern uint32_t __load_start_overlay_text0[];\nextern uint32_t __load_stop_overlay_text0[];\nextern uint32_t __load_start_overlay_text1[];\nextern uint32_t __load_stop_overlay_text1[];\nextern uint32_t __load_start_overlay_text2[];\nextern uint32_t __load_stop_overlay_text2[];\nextern uint32_t __load_start_overlay_text3[];\nextern uint32_t __load_stop_overlay_text3[];\nextern uint32_t __load_start_overlay_text4[];\nextern uint32_t __load_stop_overlay_text4[];\nextern uint32_t __load_start_overlay_text5[];\nextern uint32_t __load_stop_overlay_text5[];\nextern uint32_t __load_start_overlay_text6[];\nextern uint32_t __load_stop_overlay_text6[];\nextern uint32_t __load_start_overlay_text7[];\nextern uint32_t __load_stop_overlay_text7[];\nextern uint32_t __overlay_text_exec_end__[];\n\nextern uint32_t __overlay_data_start__[];\nextern uint32_t __load_start_overlay_data0[];\nextern uint32_t __load_stop_overlay_data0[];\nextern uint32_t __load_start_overlay_data1[];\nextern uint32_t __load_stop_overlay_data1[];\nextern uint32_t __load_start_overlay_data2[];\nextern uint32_t __load_stop_overlay_data2[];\nextern uint32_t __load_start_overlay_data3[];\nextern uint32_t __load_stop_overlay_data3[];\nextern uint32_t __load_start_overlay_data4[];\nextern uint32_t __load_stop_overlay_data4[];\nextern uint32_t __load_start_overlay_data5[];\nextern uint32_t __load_stop_overlay_data5[];\nextern uint32_t __load_start_overlay_data6[];\nextern uint32_t __load_stop_overlay_data6[];\nextern uint32_t __load_start_overlay_data7[];\nextern uint32_t __load_stop_overlay_data7[];\n\n#ifndef NO_OVERLAY\n\n#define OVERLAY_IS_FREE 0\n#define OVERLAY_IS_USED 1\n\n#define CHECK_OVERLAY_ID(id)                                                   \\\n  do {                                                                         \\\n    if ((id < 0) || (id >= HAL_OVERLAY_ID_QTY)) {                              \\\n      ASSERT(0, \"overlay id error %d\", id);                                    \\\n    }                                                                          \\\n  } while (0)\n\nstatic bool segment_state[HAL_OVERLAY_ID_QTY];\n\nstatic enum HAL_OVERLAY_ID_T cur_overlay_id = HAL_OVERLAY_ID_QTY;\n\nstatic uint32_t *const text_load_start[HAL_OVERLAY_ID_QTY] = {\n    __load_start_overlay_text0, __load_start_overlay_text1,\n    __load_start_overlay_text2, __load_start_overlay_text3,\n    __load_start_overlay_text4, __load_start_overlay_text5,\n    __load_start_overlay_text6, __load_start_overlay_text7,\n};\n\nstatic uint32_t *const text_load_stop[HAL_OVERLAY_ID_QTY] = {\n    __load_stop_overlay_text0, __load_stop_overlay_text1,\n    __load_stop_overlay_text2, __load_stop_overlay_text3,\n    __load_stop_overlay_text4, __load_stop_overlay_text5,\n    __load_stop_overlay_text6, __load_stop_overlay_text7,\n};\n\nstatic uint32_t *const data_load_start[HAL_OVERLAY_ID_QTY] = {\n    __load_start_overlay_data0, __load_start_overlay_data1,\n    __load_start_overlay_data2, __load_start_overlay_data3,\n    __load_start_overlay_data4, __load_start_overlay_data5,\n    __load_start_overlay_data6, __load_start_overlay_data7,\n};\n\nstatic uint32_t *const data_load_stop[HAL_OVERLAY_ID_QTY] = {\n    __load_stop_overlay_data0, __load_stop_overlay_data1,\n    __load_stop_overlay_data2, __load_stop_overlay_data3,\n    __load_stop_overlay_data4, __load_stop_overlay_data5,\n    __load_stop_overlay_data6, __load_stop_overlay_data7,\n};\n\n/*must called by lock get */\nstatic void invalid_overlay_cache(enum HAL_OVERLAY_ID_T id) {\n  // TODO: PSRAM is large enough and no need to overlay\n  return;\n\n#if defined(CHIP_HAS_PSRAM) && defined(PSRAM_ENABLE)\n  if (((uint32_t)__overlay_text_exec_start__ >= PSRAM_BASE &&\n       (uint32_t)__overlay_text_exec_start__ < PSRAM_BASE + PSRAM_SIZE) ||\n      ((uint32_t)__overlay_text_exec_start__ >= PSRAMX_BASE &&\n       (uint32_t)__overlay_text_exec_start__ < PSRAMX_BASE + PSRAM_SIZE)) {\n    hal_cache_invalidate(\n        HAL_CACHE_ID_I_CACHE, (uint32_t)__overlay_text_exec_start__,\n        (uint32_t)text_load_stop[id] - (uint32_t)text_load_start[id]);\n  }\n\n  if (((uint32_t)__overlay_data_start__ >= PSRAM_BASE &&\n       (uint32_t)__overlay_data_start__ < PSRAM_BASE + PSRAM_SIZE) ||\n      ((uint32_t)__overlay_data_start__ >= PSRAMX_BASE &&\n       (uint32_t)__overlay_data_start__ < PSRAMX_BASE + PSRAM_SIZE)) {\n    hal_cache_invalidate(HAL_CACHE_ID_D_CACHE, (uint32_t)__overlay_data_start__,\n                         (uint32_t)data_load_stop[id] -\n                             (uint32_t)data_load_start[id]);\n  }\n#endif\n}\n\nenum HAL_OVERLAY_RET_T hal_overlay_load(enum HAL_OVERLAY_ID_T id) {\n  enum HAL_OVERLAY_RET_T ret;\n\n  CHECK_OVERLAY_ID(id);\n  ret = HAL_OVERLAY_RET_OK;\n\n  uint32_t lock;\n  uint32_t *dst, *src;\n\n  if (hal_overlay_is_used()) {\n    ASSERT(0, \"overlay %d is in use\", id);\n    return HAL_OVERLAY_RET_IN_USE;\n  }\n\n  hal_sysfreq_req(HAL_SYSFREQ_USER_OVERLAY, HAL_CMU_FREQ_52M);\n  lock = int_lock();\n\n  if (cur_overlay_id == HAL_OVERLAY_ID_QTY) {\n    cur_overlay_id = HAL_OVERLAY_ID_IN_CFG;\n  } else if (cur_overlay_id == HAL_OVERLAY_ID_IN_CFG) {\n    ret = HAL_OVERLAY_RET_IN_CFG;\n  } else {\n    ret = HAL_OVERLAY_RET_IN_USE;\n  }\n\n  if (ret != HAL_OVERLAY_RET_OK) {\n    goto _exit;\n  }\n\n  hal_overlay_acquire(id);\n\n  for (dst = __overlay_text_start__, src = text_load_start[id];\n       src < text_load_stop[id]; dst++, src++) {\n    *dst = *src;\n  }\n\n  for (dst = __overlay_data_start__, src = data_load_start[id];\n       src < data_load_stop[id]; dst++, src++) {\n    *dst = *src;\n  }\n\n  cur_overlay_id = id;\n  segment_state[id] = OVERLAY_IS_USED;\n\n_exit:\n  int_unlock(lock);\n  hal_sysfreq_req(HAL_SYSFREQ_USER_OVERLAY, HAL_CMU_FREQ_32K);\n\n  return ret;\n}\n\nenum HAL_OVERLAY_RET_T hal_overlay_unload(enum HAL_OVERLAY_ID_T id) {\n  enum HAL_OVERLAY_RET_T ret;\n\n  CHECK_OVERLAY_ID(id);\n  ret = HAL_OVERLAY_RET_OK;\n\n  uint32_t lock;\n\n  lock = int_lock();\n  if (cur_overlay_id == id) {\n    cur_overlay_id = HAL_OVERLAY_ID_QTY;\n  } else if (cur_overlay_id == HAL_OVERLAY_ID_IN_CFG) {\n    ret = HAL_OVERLAY_RET_IN_CFG;\n  } else {\n    ret = HAL_OVERLAY_RET_IN_USE;\n  }\n  hal_overlay_release(id);\n  int_unlock(lock);\n\n  return ret;\n}\n\n/*\n * get the overlay's text start address\n */\nuint32_t hal_overlay_get_text_address(void) {\n  return (uint32_t)__overlay_text_start__;\n}\n\n/*\n * get the whole size of the overlay text\n */\nuint32_t hal_overlay_get_text_all_size(void) {\n  uint32_t text_start, text_end;\n\n  text_start = (uint32_t)__overlay_text_exec_start__;\n  text_end = (uint32_t)__overlay_text_exec_end__;\n  return text_end - text_start;\n}\n\n/*\n * get the segment size of one overlay text\n */\nuint32_t hal_overlay_get_text_size(enum HAL_OVERLAY_ID_T id) {\n  CHECK_OVERLAY_ID(id);\n\n  return (uint32_t)text_load_stop[id] - (uint32_t)text_load_start[id];\n}\n\n/*\n ____________ overlay's text end\n |          |\n |          |\n |  free    |\n |          |\n |__________|free_addr ______________________segment text end\n |          |                    |          |\n |          |                    |          |\n |          |                    |          |\n |          |                    |          |\n |          |                    |          |\n |__________| text's start_addr  |__________|segment text start_addr\n *\n */\n\n/*\n * Use the free space of one segement, this function\n * return the free address of space\n */\nuint32_t hal_overlay_get_text_free_addr(enum HAL_OVERLAY_ID_T id) {\n  uint32_t segment_text_sz;\n  uint32_t start_addr;\n  uint32_t free_addr;\n\n  CHECK_OVERLAY_ID(id);\n  segment_text_sz = hal_overlay_get_text_size(id);\n  start_addr = hal_overlay_get_text_address();\n  free_addr = start_addr + segment_text_sz;\n\n  if (free_addr & 0x3) {\n    ASSERT(0, \"free addr %p is not aligned to 4\", (void *)free_addr);\n  }\n  return free_addr;\n}\n\n/*\n * get the free size for one overlay text\n */\nuint32_t hal_overlay_get_text_free_size(enum HAL_OVERLAY_ID_T id) {\n  uint32_t all_text_sz;\n  uint32_t segment_text_sz;\n\n  CHECK_OVERLAY_ID(id);\n  all_text_sz = hal_overlay_get_text_all_size();\n  segment_text_sz = hal_overlay_get_text_size(id);\n\n  return all_text_sz - segment_text_sz;\n}\n\n/*\n * acquire one overlay segment\n */\nvoid hal_overlay_acquire(enum HAL_OVERLAY_ID_T id) {\n  uint32_t lock;\n\n  CHECK_OVERLAY_ID(id);\n  segment_state[id] = OVERLAY_IS_USED;\n\n  lock = int_lock();\n  invalid_overlay_cache(id);\n  int_unlock(lock);\n  return;\n}\n\n/*\n * release one overlay segment\n */\nvoid hal_overlay_release(enum HAL_OVERLAY_ID_T id) {\n  CHECK_OVERLAY_ID(id);\n  segment_state[id] = OVERLAY_IS_FREE;\n  return;\n}\n\n/*\n * check if any overlay segment is used\n */\nbool hal_overlay_is_used(void) {\n  int i;\n  uint32_t lock;\n\n  lock = int_lock();\n  for (i = 0; i < HAL_OVERLAY_ID_QTY; i++) {\n    // if any segment is in use, the overlay is used;\n    if (segment_state[i] == OVERLAY_IS_USED) {\n      int_unlock(lock);\n      return true;\n    }\n  }\n  int_unlock(lock);\n  return false;\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_overlay.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_OVERLAY_H__\n#define __HAL_OVERLAY_H__\n#include \n#include \n\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define HAL_OVERLAY_TEXT0_LOC __attribute__((section(\".overlay_text0\")))\n#define HAL_OVERLAY_TEXT1_LOC __attribute__((section(\".overlay_text1\")))\n#define HAL_OVERLAY_TEXT2_LOC __attribute__((section(\".overlay_text2\")))\n#define HAL_OVERLAY_TEXT3_LOC __attribute__((section(\".overlay_text3\")))\n#define HAL_OVERLAY_TEXT4_LOC __attribute__((section(\".overlay_text4\")))\n#define HAL_OVERLAY_TEXT5_LOC __attribute__((section(\".overlay_text5\")))\n#define HAL_OVERLAY_TEXT6_LOC __attribute__((section(\".overlay_text6\")))\n#define HAL_OVERLAY_TEXT7_LOC __attribute__((section(\".overlay_text7\")))\n\n#define HAL_OVERLAY_RODATA0_LOC __attribute__((section(\".overlay_rodata0\")))\n#define HAL_OVERLAY_RODATA1_LOC __attribute__((section(\".overlay_rodata1\")))\n#define HAL_OVERLAY_RODATA2_LOC __attribute__((section(\".overlay_rodata2\")))\n#define HAL_OVERLAY_RODATA3_LOC __attribute__((section(\".overlay_rodata3\")))\n#define HAL_OVERLAY_RODATA4_LOC __attribute__((section(\".overlay_rodata4\")))\n#define HAL_OVERLAY_RODATA5_LOC __attribute__((section(\".overlay_rodata5\")))\n#define HAL_OVERLAY_RODATA6_LOC __attribute__((section(\".overlay_rodata6\")))\n#define HAL_OVERLAY_RODATA7_LOC __attribute__((section(\".overlay_rodata7\")))\n\n#define HAL_OVERLAY_DATA0_LOC __attribute__((section(\".overlay_data0\")))\n#define HAL_OVERLAY_DATA1_LOC __attribute__((section(\".overlay_data1\")))\n#define HAL_OVERLAY_DATA2_LOC __attribute__((section(\".overlay_data2\")))\n#define HAL_OVERLAY_DATA3_LOC __attribute__((section(\".overlay_data3\")))\n#define HAL_OVERLAY_DATA4_LOC __attribute__((section(\".overlay_data4\")))\n#define HAL_OVERLAY_DATA5_LOC __attribute__((section(\".overlay_data5\")))\n#define HAL_OVERLAY_DATA6_LOC __attribute__((section(\".overlay_data6\")))\n#define HAL_OVERLAY_DATA7_LOC __attribute__((section(\".overlay_data7\")))\n\n#define INVALID_OVERLAY_ADDR 0xffffffff\nenum HAL_OVERLAY_ID_T {\n  HAL_OVERLAY_ID_0,\n  HAL_OVERLAY_ID_1,\n  HAL_OVERLAY_ID_2,\n  HAL_OVERLAY_ID_3,\n  HAL_OVERLAY_ID_4,\n  HAL_OVERLAY_ID_5,\n  HAL_OVERLAY_ID_6,\n  HAL_OVERLAY_ID_7,\n\n  HAL_OVERLAY_ID_QTY,\n  HAL_OVERLAY_ID_IN_CFG,\n};\n\nenum HAL_OVERLAY_RET_T {\n  HAL_OVERLAY_RET_OK,\n  HAL_OVERLAY_RET_BAD_ID,\n  HAL_OVERLAY_RET_IN_CFG,\n  HAL_OVERLAY_RET_IN_USE,\n};\n\n#ifndef NO_OVERLAY\nenum HAL_OVERLAY_RET_T hal_overlay_load(enum HAL_OVERLAY_ID_T id);\n\nenum HAL_OVERLAY_RET_T hal_overlay_unload(enum HAL_OVERLAY_ID_T id);\n\n/*\n * get the overlay's text start address\n */\nuint32_t hal_overlay_get_text_address(void);\n\n/*\n * get the whole size of the overlay text\n */\nuint32_t hal_overlay_get_text_all_size(void);\n/*\n * get the segment size of one overlay text\n */\nuint32_t hal_overlay_get_text_size(enum HAL_OVERLAY_ID_T id);\n/*\n * Use the free space of one segement, this function\n * return the free address of space\n */\nuint32_t hal_overlay_get_text_free_addr(enum HAL_OVERLAY_ID_T id);\n/*\n * get the free size for one overlay text\n */\nuint32_t hal_overlay_get_text_free_size(enum HAL_OVERLAY_ID_T id);\n/*\n * acquire one overlay segment\n */\nvoid hal_overlay_acquire(enum HAL_OVERLAY_ID_T id);\n/*\n * release one overlay segment\n */\nvoid hal_overlay_release(enum HAL_OVERLAY_ID_T id);\n/*\n * check if any overlay segment is used\n */\nbool hal_overlay_is_used(void);\n\n#else\n\nstatic inline enum HAL_OVERLAY_RET_T\nhal_overlay_load(enum HAL_OVERLAY_ID_T id) {\n  return HAL_OVERLAY_RET_OK;\n}\n\nstatic inline enum HAL_OVERLAY_RET_T\nhal_overlay_unload(enum HAL_OVERLAY_ID_T id) {\n  return HAL_OVERLAY_RET_OK;\n}\n\nstatic inline uint32_t hal_overlay_get_text_address(void) {\n  return INVALID_OVERLAY_ADDR;\n}\n\nstatic inline uint32_t hal_overlay_get_text_all_size(void) { return 0; }\n\nstatic inline uint32_t hal_overlay_get_text_size(enum HAL_OVERLAY_ID_T id) {\n  return 0;\n}\n\nstatic inline uint32_t\nhal_overlay_get_text_free_addr(enum HAL_OVERLAY_ID_T id) {\n  return INVALID_OVERLAY_ADDR;\n}\n\nstatic inline uint32_t\nhal_overlay_get_text_free_size(enum HAL_OVERLAY_ID_T id) {\n  return 0;\n}\n\nstatic inline void hal_overlay_acquire(enum HAL_OVERLAY_ID_T id) { return; }\n\nstatic inline void hal_overlay_release(enum HAL_OVERLAY_ID_T id) { return; }\n\nstatic inline bool hal_overlay_is_used(void) { return false; }\n\n#endif /*NO_OVERLAY*/\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /*__HAL_OVERLAY_H__*/\n"
  },
  {
    "path": "platform/hal/hal_phyif.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef CHIP_HAS_SPIPHY\n\n#include \"hal_phyif.h\"\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n#include \"hal_spi.h\"\n#include \"plat_types.h\"\n\n#define PHY_READ_CMD(r) ((1 << 24) | (((r)&0xFF) << 16))\n#define PHY_WRITE_CMD(r, v) ((((r)&0xFF) << 16) | ((v)&0xFFFF))\n#define PHY_READ_VAL(v) ((v)&0xFFFF)\n\n#define SPIPHY_REG_CS(r) ((r) >> 12)\n#define SPIPHY_REG_PAGE(r) (((r) >> 8) & 0xF)\n#define SPIPHY_REG_OFFSET(r) ((r)&0xFF)\n\nstatic const struct HAL_SPI_CFG_T spi_cfg = {\n    .clk_delay_half = false,\n    .clk_polarity = false,\n    .slave = false,\n    .dma_rx = false,\n    .dma_tx = false,\n    .rx_sep_line = true,\n    .cs = 0,\n    .rate = 6500000,\n    .tx_bits = 25,\n    .rx_bits = 25,\n    .rx_frame_bits = 0,\n};\n\nstatic uint8_t BOOT_BSS_LOC phyif_open_map;\n\nstatic uint8_t BOOT_BSS_LOC phy_cs;\n\nstatic int hal_phyif_rawread(unsigned short reg, unsigned short *val) {\n  int ret;\n  unsigned int data;\n  unsigned int cmd;\n\n  data = 0;\n  cmd = PHY_READ_CMD(reg);\n  ret = hal_spiphy_recv(&cmd, &data, 4);\n  if (ret) {\n    return ret;\n  }\n  *val = PHY_READ_VAL(data);\n  return 0;\n}\n\nstatic int hal_phyif_rawwrite(unsigned short reg, unsigned short val) {\n  int ret;\n  unsigned int cmd;\n\n  cmd = PHY_WRITE_CMD(reg, val);\n  ret = hal_spiphy_send(&cmd, 4);\n  if (ret) {\n    return ret;\n  }\n  return 0;\n}\n\nint hal_phyif_reg_read(unsigned short reg, unsigned short *val) {\n  uint32_t lock;\n  int ret;\n  uint8_t cs;\n  // uint8_t page;\n\n  cs = SPIPHY_REG_CS(reg);\n  // page = SPIPHY_REG_PAGE(reg);\n  reg = SPIPHY_REG_OFFSET(reg);\n\n  lock = int_lock();\n  if (cs != phy_cs) {\n    hal_spiphy_activate_cs(cs);\n    phy_cs = cs;\n  }\n  ret = hal_phyif_rawread(reg, val);\n  int_unlock(lock);\n\n  return ret;\n}\n\nint hal_phyif_reg_write(unsigned short reg, unsigned short val) {\n  uint32_t lock;\n  int ret;\n  uint8_t cs;\n  // uint8_t page;\n\n  cs = SPIPHY_REG_CS(reg);\n  // page = SPIPHY_REG_PAGE(reg);\n  reg = SPIPHY_REG_OFFSET(reg);\n\n  lock = int_lock();\n  if (cs != phy_cs) {\n    hal_spiphy_activate_cs(cs);\n    phy_cs = cs;\n  }\n  ret = hal_phyif_rawwrite(reg, val);\n  int_unlock(lock);\n\n  return ret;\n}\n\nint hal_phyif_open(uint32_t cs) {\n  int ret;\n  uint32_t lock;\n\n  ret = 0;\n\n  lock = int_lock();\n  if (phyif_open_map == 0) {\n    ret = hal_spiphy_open(&spi_cfg);\n  }\n  if (ret == 0) {\n    phyif_open_map |= (1 << cs);\n  }\n  int_unlock(lock);\n\n  return ret;\n}\n\nint hal_phyif_close(uint32_t cs) {\n  int ret;\n  uint32_t lock;\n\n  ret = 0;\n\n  lock = int_lock();\n  phyif_open_map &= ~(1 << cs);\n  if (phyif_open_map == 0) {\n    ret = hal_spiphy_close(spi_cfg.cs);\n  }\n  int_unlock(lock);\n\n  return ret;\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_phyif.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_PHYIF_H__\n#define __HAL_PHYIF_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nint hal_phyif_open(uint32_t cs);\n\nint hal_phyif_close(uint32_t cs);\n\nint hal_phyif_reg_write(unsigned short reg, unsigned short val);\n\nint hal_phyif_reg_read(unsigned short reg, unsigned short *val);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_psc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_PSC_H__\n#define __HAL_PSC_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n\nvoid hal_psc_init(void);\n\nvoid hal_psc_mcu_auto_power_down(void);\n\nvoid hal_psc_mcu_auto_power_up(void);\n\nvoid hal_psc_codec_enable(void);\n\nvoid hal_psc_codec_disable(void);\n\nvoid hal_psc_bt_enable(void);\n\nvoid hal_psc_bt_disable(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_psram.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_PSRAM_H__\n#define __HAL_PSRAM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nenum HAL_PSRAM_ID_T {\n    HAL_PSRAM_ID_0 = 0,\n    HAL_PSRAM_ID_NUM,\n};\n\nvoid hal_psram_sleep(void);\nvoid hal_psram_wakeup(void);\nvoid hal_psram_init(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_psram_v1.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(CHIP_HAS_PSRAM) && (CHIP_PSRAM_CTRL_VER == 1)\n\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_psram.h\"\n#include \"hal_psramip_v1.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"pmu.h\"\n#define PSRAM_CALIB 0\n\n#define HAL_PSRAM_YES 1\n#define HAL_PSRAM_NO 0\n\n#define HAL_PSRAM_CMD_REG_READ 0x40\n#define HAL_PSRAM_CMD_REG_WRITE 0xc0\n#define HAL_PSRAM_CMD_RAM_READ 0x00\n#define HAL_PSRAM_CMD_RAM_WRITE 0x80\n\nenum HAL_PSRAM_SPEED {\n  HAL_PSRAM_SPEED_13M = 13000000,\n  HAL_PSRAM_SPEED_26M = 26000000,\n  HAL_PSRAM_SPEED_50M = 50000000,\n  HAL_PSRAM_SPEED_52M = 52000000,\n  HAL_PSRAM_SPEED_78M = 78000000,\n  HAL_PSRAM_SPEED_104M = 104000000,\n  HAL_PSRAM_SPEED_130M = 130000000,\n  HAL_PSRAM_SPEED_156M = 156000000,\n  HAL_PSRAM_SPEED_182M = 182000000,\n  HAL_PSRAM_SPEED_208M = 208000000,\n  HAL_PSRAM_SPEED_234M = 234000000,\n};\n\nstruct HAL_PSRAM_CONFIG_T {\n  uint32_t source_clk;\n  uint32_t speed;\n  uint32_t dqs_rd_sel;\n  uint32_t dqs_wr_sel;\n\n  /* internal use : can be config if need to (useful for rom) */\n  uint8_t override_config : 1;\n  uint8_t div;\n};\n\n#define PSRAM_DEVICE_ID_LEN_MAX 8\nstruct HAL_Psram_Context {\n  uint8_t device_id[PSRAM_DEVICE_ID_LEN_MAX];\n  uint32_t total_size;\n  uint32_t read_size;\n  uint32_t write_size;\n};\n\n/* hal api */\n#if 0\nuint8_t hal_psram_open(enum HAL_PSRAM_ID_T id, struct HAL_PSRAM_CONFIG_T *cfg);\nuint8_t hal_psram_close(enum HAL_PSRAM_ID_T id);\nvoid hal_psram_reg_dump(enum HAL_PSRAM_ID_T id);\n#endif\nvoid hal_psram_suspend(enum HAL_PSRAM_ID_T id);\nvoid hal_psram_resume(enum HAL_PSRAM_ID_T id);\nvoid hal_psram_wakeup_init(void);\n\nstruct HAL_Psram_Context psram_ctx[HAL_PSRAM_ID_NUM];\n\n// static const char * const invalid_drv = \"psram drv invalid\";\n\n#define DIGITAL_REG(a) *(volatile uint32_t *)(a)\n\nFLASH_TEXT_LOC static uint32_t _psram_get_reg_base(enum HAL_PSRAM_ID_T id) {\n  switch (id) {\n  case HAL_PSRAM_ID_0:\n  default:\n    return PSRAM_CTRL_BASE;\n    break;\n  }\n}\n\nFLASH_TEXT_LOC static void\n_psram_exitsleep_onprocess_wait(enum HAL_PSRAM_ID_T id) {\n  uint32_t reg_base = 0;\n  reg_base = _psram_get_reg_base(id);\n  while (psramip_r_exit_sleep_onprocess(reg_base))\n    ;\n\n  while (!psramip_r_sleep_wakeup_state(reg_base))\n    ;\n}\nFLASH_TEXT_LOC static void _psram_busy_wait(enum HAL_PSRAM_ID_T id) {\n  uint32_t reg_base = 0;\n  reg_base = _psram_get_reg_base(id);\n  while (psramip_r_busy(reg_base))\n    ;\n}\n#if 0\nstatic void _psram_div(enum HAL_PSRAM_ID_T id)\n{\n    /* TODO */\n}\n/* hal api */\nuint8_t hal_psram_open(enum HAL_PSRAM_ID_T id, struct HAL_PSRAM_CONFIG_T *cfg)\n{\n    uint32_t div = 0, reg_base = 0;\n    //uint32_t psram_id = 0;\n    reg_base = _psram_get_reg_base(id);\n\n    /* over write config */\n    if (cfg->override_config) {\n        /* div */\n        _psram_div(cfg->div);\n    }\n    else {\n        div = cfg->source_clk/cfg->speed;\n        _psram_div(div);\n    }\n\n    /* 0. dqs config */\n    psramip_w_dqs_rd_sel(reg_base, cfg->dqs_rd_sel);\n    psramip_w_dqs_wr_sel(reg_base, cfg->dqs_wr_sel);\n\n    /* 1. high speed mode */\n    if (cfg->speed >= HAL_PSRAM_SPEED_50M)\n        psramip_w_high_speed_enable(reg_base, HAL_PSRAM_YES);\n    else\n        psramip_w_high_speed_enable(reg_base, HAL_PSRAM_NO);\n\n    _psram_busy_wait(id);\n\n    /* 2. wait calib done or FIXME timeout */\n    psramip_w_enable_and_trigger_calib(reg_base);\n    while (!psramip_r_calibst(reg_base));\n\n    psramip_w_wrap_mode_enable(reg_base, HAL_PSRAM_YES);\n    //psramip_w_wrap_mode_enable(reg_base, HAL_PSRAM_NO);\n\n    //psramip_w_32bytewrap_mode(reg_base);\n    psramip_w_1kwrap_mode(reg_base);\n#if 0\n    /* psram device register read 1 or 2 or 3 */\n    psramip_w_acc_size(reg_base, 1);\n    psramip_w_cmd_addr(reg_base, HAL_PSRAM_CMD_REG_READ, 2);\n    _psram_busy_wait(id);\n    psram_id = psramip_r_rx_fifo(reg_base);\n\n    uart_printf(\"psram id 0x%x\\n\", psram_id);\n#endif\n\n    return 0;\n}\nuint8_t hal_psram_close(enum HAL_PSRAM_ID_T id)\n{\n    return 0;\n}\nvoid hal_psram_reg_dump(enum HAL_PSRAM_ID_T id)\n{\n    uint32_t reg_base = 0;\n    uint32_t psram_id = 0;\n    reg_base = _psram_get_reg_base(id);\n\n    /* psram device register read 1 or 2 or 3 */\n    psramip_w_acc_size(reg_base, 1);\n    psramip_w_cmd_addr(reg_base, HAL_PSRAM_CMD_REG_READ, 2);\n    _psram_busy_wait(id);\n    psram_id = psramip_r_rx_fifo(reg_base);\n\n    uart_printf(\"psram id 0x%x\\n\", psram_id);\n}\n\n#endif\n\nFLASH_TEXT_LOC uint8_t hal_psramip_read_reg(uint8_t reg) {\n  uint32_t mr;\n  psramip_clear_fifo(_psram_get_reg_base(HAL_PSRAM_ID_0));\n  psramip_w_cmd_addr(0x40150000, HAL_PSRAM_CMD_REG_READ, (uint32_t)reg);\n  while ((psramip_r_status(0x40150000) & PSRAM_STAT_BUSY))\n    ;\n\n  mr = psramip_r_rx_fifo(0x40150000);\n  return mr & 0xff;\n}\n\nFLASH_TEXT_LOC void hal_psramip_write_reg(uint8_t reg, uint8_t val) {\n  enum HAL_PSRAM_ID_T id = HAL_PSRAM_ID_0;\n  psramip_clear_fifo(_psram_get_reg_base(HAL_PSRAM_ID_0));\n  psramip_w_tx_fifo(0x40150000, (uint32_t)val);\n  psramip_w_cmd_addr(0x40150000, HAL_PSRAM_CMD_REG_WRITE, (uint32_t)reg);\n  _psram_busy_wait(id);\n}\n\nFLASH_TEXT_LOC void hal_psram_suspend(enum HAL_PSRAM_ID_T id) {\n  uint32_t reg_base = 0;\n  reg_base = _psram_get_reg_base(id);\n\n  psramip_w_acc_size(reg_base, 1);\n  hal_psramip_write_reg(0x6, 0xf0);\n}\n\nFLASH_TEXT_LOC void hal_psram_resume(enum HAL_PSRAM_ID_T id) {\n  uint32_t reg_base = 0;\n  reg_base = _psram_get_reg_base(id);\n\n  psramip_w_exit_sleep(reg_base);\n\n  _psram_exitsleep_onprocess_wait(id);\n}\n// uint32_t test_ctrl =0;\n\n#ifdef CHIP_BEST2000\nvoid pmu_open_bbpll_for_psram();\n/*psram 120M use bbpll(div 4), 160M use bbpll(dir4), 100M use audio pll*/\nFLASH_TEXT_LOC void hal_psram_init(void) {\n#ifndef PSRAM_LOW_SPEED\n  uint8_t mr = 0;\n//    enum HAL_PSRAM_ID_T id = HAL_PSRAM_ID_0;\n#if defined(PSRAM_120M) || defined(PSRAM_160M)\n  pmu_open_bbpll_for_psram();\n  hal_cmu_mem_set_freq(HAL_CMU_FREQ_208M);\n#else /*PSRAM_160M*/\n#ifdef MCU_ULTRAHIGH_PERFORMANCE_MODE\n  hal_cmu_mem_set_freq(HAL_CMU_FREQ_104M); // 104*2\n#else\n  hal_cmu_mem_set_freq(HAL_CMU_FREQ_208M);\n#endif\n#endif /*PSRAM_160M*/\n  pmu_psram_freq_config(HAL_PSRAM_SPEED_208M);\n#else\n  hal_cmu_mem_set_freq(HAL_CMU_FREQ_26M);\n  pmu_psram_freq_config(HAL_PSRAM_SPEED_26M);\n#endif\n\n  hal_cmu_clock_enable(HAL_CMU_MOD_O_PSRAM);\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_PSRAM);\n  hal_cmu_reset_clear(HAL_CMU_MOD_O_PSRAM);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_PSRAM);\n  DIGITAL_REG(0x4008004c) |= 0x1 << 21;\n#if 0 // for debug\n    DIGITAL_REG(0x40150020) = 0x01;\n    DIGITAL_REG(0x400000ac) &= ~(0xc0000);\n\n    DIGITAL_REG(0x400000ac) |= (0x80000);\n\n    DIGITAL_REG(0x40087008) = 0xFFFFFFAF;\n    DIGITAL_REG(0x4008701c) = 0x2;\n#endif\n\n#ifndef PSRAM_LOW_SPEED\n  DIGITAL_REG(0x40150040) = 0x44712133;\n\n  DIGITAL_REG(0x40150044) = 0x200040b1;\n  DIGITAL_REG(0x40150044) |= (1 << 1) | (1 << 30);\n\n  while (((DIGITAL_REG(0x40150044)) & (0x1 << 30)))\n    ;\n  // hal_sys_timer_delay(MS_TO_TICKS(10));\n  DIGITAL_REG(0x40150044) &= ~(1 << 0);\n\n  while (!((DIGITAL_REG(0x40150044)) & (0x1 << 0)))\n    ;\n  // hal_sys_timer_delay(MS_TO_TICKS(10));\n\n  DIGITAL_REG(0x40000090) = 0x0001ffff;\n  while (!((DIGITAL_REG(0x40000090)) & (0x1 << 20)))\n    ;\n  // hal_sys_timer_delay(MS_TO_TICKS(10));\n\n  // lp delay\n  // DIGITAL_REG(0x4015001C)=0xffffffff;//c\n  DIGITAL_REG(0x4015001C) =\n      ((4 * 200) << 0) | ((70 * 200) << 16) |\n      ((70 * 200 / 1000) << 10); // 208MHZ: tHS 10us, tXHS 100us, tXPHS 100ns\n  // ramp=1k select low speed\n  DIGITAL_REG(0x4015002C) = 0x0000000d; // c\n  // tx/rx Phase\n// #error \"6666666666666666\"\n// DIGITAL_REG(0x40150024)= 0x55000713;//0x55000373;//223\n// DIGITAL_REG(0x40150024)= 0x55000373;//0x55000373;//223\n#if PSRAM_CALIB\n\n  DIGITAL_REG(0x40150024) = 0x55000373; // 0x55000373;//223\n#else\n#if defined(PSRAM_200M)\n  DIGITAL_REG(0x40150024) = 0x55000653;    // 0x55000373;//223\n#elif defined(PSRAM_160M)\n  DIGITAL_REG(0x40150024) = 0x55000463; //;//0x55000373;//223\n#elif defined(PSRAM_120M)\n  DIGITAL_REG(0x40150024) = 0x55000113; // 0x55000373;//223\n#else /*100M*/\n  DIGITAL_REG(0x40150024) = 0x55000113; // 0x55000373;//223\n#endif\n#endif\n  while (!((DIGITAL_REG(0x40150024)) & (0x1 << 3)))\n    ;\n#if 1\n  // reset psram chip\n  psramip_write32(0xff, 0x40150000, 0x00);\n  while ((psramip_r_status(0x40150000) & PSRAM_STAT_BUSY))\n    ;\n  // clear fifo\n  psramip_write32(0x03, 0x40150000, 0x18);\n\n  while ((psramip_r_status(0x40150000) & PSRAM_STAT_BUSY))\n    ;\n  hal_sys_timer_delay(US_TO_TICKS(10));\n  // test_ctrl = 1;\n  // while (test_ctrl ==1);\n\n  mr = hal_psramip_read_reg(0x0);\n  mr &= ~(0x3 << 6); // MR[7:6] must set 0\n  mr &= ~(0x1 << 5); // MR0[5] = 0, latency type 0->variable\n  mr &= ~(0x7 << 2);\n  mr |= (0x6 << 2); // MR0[4:2] = '110 Latency =6 for 200M (variable latency)\n  mr &= ~(0x3 << 0);\n  mr |= (0x1 << 0); // driver strength '01 -> half\n  hal_psramip_write_reg(0x0, mr);\n  mr = hal_psramip_read_reg(0x0);\n  // TRACE(2,\"PSRAM MODE REG 0 = 0x%x, status = 0x%x\", mr,\n  // psramip_r_status(0x40150000));\n\n  mr = hal_psramip_read_reg(0x4);\n  mr &= ~(0x01 << 7);\n  mr |= (0x01 << 7); // MR[7] '1 -> write latency 1 for clk > 166MHz\n  // hal_psramip_write_reg(0x4, mr);\n  mr = hal_psramip_read_reg(0x4);\n  // TRACE(2,\"PSRAM MODE REG 4 = 0x%x, status = 0x%x\", mr,\n  // psramip_r_status(0x40150000));\n\n#endif\n  hal_sys_timer_delay(US_TO_TICKS(10));\n#else  /*PSRAM_LOW_SPEED*/\n  // open psram phy power\n  DIGITAL_REG(0x4008004c) |= (1 << 21);\n  // init psram\n  // lp delay\n  DIGITAL_REG(0x4015001C) = 0x3fff3cff; // c\n  // ramp=1k select low speed\n  DIGITAL_REG(0x4015002C) = 0x0000000c;\n  // tx/rx Phase\n  DIGITAL_REG(0x40150024) = 0x55000223;\n#endif /*PSRAM_LOW_SPEED*/\n\n  psramip_w_acc_size(_psram_get_reg_base(HAL_PSRAM_ID_0), 1);\n#ifdef PSRAM_200M\n  hal_cmu_mem_set_freq(HAL_CMU_FREQ_208M);\n#endif\n}\nFLASH_TEXT_LOC void hal_psram_wakeup_init(void) {\n#ifndef PSRAM_LOW_SPEED\n  DIGITAL_REG(0x40150040) = 0x44712133;\n\n  DIGITAL_REG(0x40150044) = 0x200040b1;\n  DIGITAL_REG(0x40150044) |= (1 << 1) | (1 << 30);\n\n  // TRACE(1,\"0x40150044 = 0x%x \\n\",DIGITAL_REG(0x40150044));\n  while (((DIGITAL_REG(0x40150044)) & (0x1 << 30)))\n    ;\n  // hal_sys_timer_delay(MS_TO_TICKS(10));\n  DIGITAL_REG(0x40150044) &= ~(1 << 0);\n\n  // TRACE(1,\"0x40150044 = 0x%x \\n\", DIGITAL_REG(0x40150044));\n  while (!((DIGITAL_REG(0x40150044)) & (0x1 << 0)))\n    ;\n  // hal_sys_timer_delay(MS_TO_TICKS(10));\n\n  DIGITAL_REG(0x40000090) = 0x0001ffff;\n  // TRACE(1,\"0x40000090 = 0x%x \\n\", DIGITAL_REG(0x40000090));\n  while (!((DIGITAL_REG(0x40000090)) & (0x1 << 20)))\n    ;\n    // hal_sys_timer_delay(MS_TO_TICKS(10));\n#endif\n\n  hal_psram_resume(HAL_PSRAM_ID_0);\n}\n\nFLASH_TEXT_LOC void hal_psram_sleep(void) {\n#ifndef PSRAM_LOW_SPEED\n  hal_psram_suspend(HAL_PSRAM_ID_0);\n  /* dll power off */\n  DIGITAL_REG(0x40150044) &= ~(1 << 1);\n  /* phy power off */\n  /* DIGITAL_REG(0x4008004c) &= ~(1 << 21) */\n#endif\n}\n\n#else\n\nFLASH_TEXT_LOC void hal_psram_init(void) {\n#ifndef PSRAM_LOW_SPEED\n  unsigned int mr = 0;\n  enum HAL_PSRAM_ID_T id = HAL_PSRAM_ID_0;\n#endif\n  hal_cmu_mem_set_freq(HAL_CMU_FREQ_208M);\n\n  hal_cmu_clock_enable(HAL_CMU_MOD_O_PSRAM);\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_PSRAM);\n  hal_cmu_reset_clear(HAL_CMU_MOD_O_PSRAM);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_PSRAM);\n\n#ifndef PSRAM_LOW_SPEED\n  DIGITAL_REG(0x4001f038) = 0x77783533;\n\n  DIGITAL_REG(0x4001f03c) = 0x3ffffff4;\n  DIGITAL_REG(0x4001f03c) |= (1 << 1) | (1 << 30);\n  while (((DIGITAL_REG(0x4001f03c)) & (0x1 << 30)))\n    ;\n  hal_sys_timer_delay(MS_TO_TICKS(10));\n  DIGITAL_REG(0x4001f03c) &= ~(1 << 0);\n  while (!((DIGITAL_REG(0x4001f03c)) & (0x1 << 0)))\n    ;\n  hal_sys_timer_delay(MS_TO_TICKS(10));\n\n  DIGITAL_REG(0x40000090) = 0x0001ffff;\n  while (!((DIGITAL_REG(0x40000090)) & (0x1 << 20)))\n    ;\n  hal_sys_timer_delay(MS_TO_TICKS(10));\n\n  // lp delay\n  DIGITAL_REG(0x4015001C) = 0xffffffff; // c\n  // ramp=1k select low speed\n  DIGITAL_REG(0x4015002C) = 0x0000000d; // c\n  // tx/rx Phase\n  DIGITAL_REG(0x40150024) = 0x55000563; // 223\n  while (!((DIGITAL_REG(0x40150024)) & (0x1 << 3)))\n    ;\n#if 1\n  // reset psram chip\n  psramip_write32(0xff, 0x40150000, 0x00);\n  while ((psramip_r_status(0x40150000) & PSRAM_STAT_BUSY))\n    ;\n  // clear fifo\n  psramip_write32(0x03, 0x40150000, 0x18);\n  while ((psramip_r_status(0x40150000) & PSRAM_STAT_BUSY))\n    ;\n  hal_sys_timer_delay(MS_TO_TICKS(10));\n\n  // read MR0\n  psramip_w_cmd_addr(0x40150000, HAL_PSRAM_CMD_REG_READ, 0);\n  while ((psramip_r_status(0x40150000) & PSRAM_STAT_BUSY))\n    ;\n  // need read twice\n  mr = psramip_r_rx_fifo(0x40150000);\n  mr = psramip_r_rx_fifo(0x40150000);\n  // hal_uart_printf(\"count=0x%x mr0 = 0x%x \\n\", psramip_r_status(0x40150000),\n  // mr);\n\n  mr &= 0xff;\n  mr &= ~(0x03 << 6); // MR[7:6] must set 0\n  // driver strength 00:1/16 01:1/2 10:1/4 11:1/8 MR0[1:0]\n  mr &= ~0x03;\n  mr |= 0x01;\n  // for >> 200M MR0[4:2]\n  mr &= ~(0x07 << 2);\n  mr |= (0x06 << 2);\n  psramip_w_tx_fifo(0x40150000, mr);\n  psramip_w_cmd_addr(0x40150000, HAL_PSRAM_CMD_REG_WRITE, 0);\n  _psram_busy_wait(id);\n\n  // read MR0 again\n  psramip_w_cmd_addr(0x40150000, HAL_PSRAM_CMD_REG_READ, 0);\n  while ((psramip_r_status(0x40150000) & PSRAM_STAT_BUSY))\n    ;\n  mr = psramip_r_rx_fifo(0x40150000);\n  mr = psramip_r_rx_fifo(0x40150000);\n  //  hal_uart_printf(\"count=0x%x mr0 = 0x%x \\n\", psramip_r_status(0x40150000),\n  //  mr);\n  // read MR4\n  psramip_w_cmd_addr(0x40150000, HAL_PSRAM_CMD_REG_READ, 4);\n  _psram_busy_wait(id);\n  mr = psramip_r_rx_fifo(0x40150000);\n  mr = psramip_r_rx_fifo(0x40150000);\n  //  hal_uart_printf(\"mr4 = 0x%x\\n\", mr);\n\n  _psram_busy_wait(id);\n#endif\n  hal_sys_timer_delay(MS_TO_TICKS(10));\n#else\n  // open psram phy power\n  DIGITAL_REG(0x4001f02c) |= (1 << 16);\n  // init psram\n  // lp delay\n  DIGITAL_REG(0x4015001C) = 0x3fff3cff; // c\n  // ramp=1k select low speed\n  DIGITAL_REG(0x4015002C) = 0x0000000c;\n  // tx/rx Phase\n  DIGITAL_REG(0x40150024) = 0x55000223;\n#endif\n}\n\nFLASH_TEXT_LOC void hal_psram_wakeup_init(void) {\n#ifndef PSRAM_LOW_SPEED\n  // dll\n  DIGITAL_REG(0x4001f038) = 0x77783533;\n\n  DIGITAL_REG(0x4001f03c) = 0x3ffffff4;\n  DIGITAL_REG(0x4001f03c) |= (1 << 1) | (1 << 30);\n  while (((DIGITAL_REG(0x4001f03c)) & (0x1 << 30)))\n    ;\n  hal_sys_timer_delay(MS_TO_TICKS(10));\n  DIGITAL_REG(0x4001f03c) &= ~(1 << 0);\n  while (!((DIGITAL_REG(0x4001f03c)) & (0x1 << 0)))\n    ;\n  hal_sys_timer_delay(MS_TO_TICKS(10));\n\n  DIGITAL_REG(0x40000090) = 0x0001ffff;\n  while (!((DIGITAL_REG(0x40000090)) & (0x1 << 20)))\n    ;\n  hal_sys_timer_delay(MS_TO_TICKS(10));\n#endif\n\n  hal_psram_resume(HAL_PSRAM_ID_0);\n}\n\nFLASH_TEXT_LOC void hal_psram_sleep(void) {\n#ifndef PSRAM_LOW_SPEED\n  hal_psram_suspend(HAL_PSRAM_ID_0);\n  /* dll power off */\n  DIGITAL_REG(0x4001f03c) &= ~(1 << 1);\n  /* phy power off */\n  /* DIGITAL_REG(0x4001f02c) &= ~(1 << 16) */\n#endif\n}\n\n#endif\n\nFLASH_TEXT_LOC void hal_psram_wakeup(void) {\n#ifndef PSRAM_LOW_SPEED\n  hal_psram_wakeup_init();\n#endif\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_psram_v2.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(CHIP_HAS_PSRAM) && (CHIP_PSRAM_CTRL_VER >= 2)\n\n#include \"hal_cache.h\"\n#include \"hal_location.h\"\n#include \"hal_psram.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"pmu.h\"\n#include \"reg_psram_mc_v2.h\"\n#include \"reg_psram_phy_v2.h\"\n#include \"string.h\"\n\n#define PSRAM_RESET\n//#define PSRAM_DUAL_8BIT\n//#define PSRAM_WRAP_ENABLE\n\n//#define PSRAM_DEBUG\n#ifdef PSRAM_DEBUG\n#define PSRAM_TRACE TRACE_IMM\n#else\n#define PSRAM_TRACE(...)\n#endif\n\n#ifdef PSRAM_DEBUG\n#define PSRAM_TRACENOCRLF_NOTS REL_TRACE_NOCRLF_NOTS\n#else\n#define PSRAM_TRACENOCRLF_NOTS(...)\n#endif\n\n#define TX_FIFO_DEPTH 8\n#define RX_FIFO_DEPTH 8\n\n// MR0\n#define MR0_DRIVE_STR_SHIFT 0\n#define MR0_DRIVE_STR_MASK (0x3 << MR0_DRIVE_STR_SHIFT)\n#define MR0_DRIVE_STR(n) BITFIELD_VAL(MR0_DRIVE_STR, n)\n#define MR0_READ_LATENCY_SHIFT 2\n#define MR0_READ_LATENCY_MASK (0x7 << MR0_READ_LATENCY_SHIFT)\n#define MR0_READ_LATENCY(n) BITFIELD_VAL(MR0_READ_LATENCY, n)\n#define MR0_LT (1 << 5)\n#define MR0_FIXED_00_SHIFT 6\n#define MR0_FIXED_00_MASK (0x3 << MR0_FIXED_00_SHIFT)\n#define MR0_FIXED_00(n) BITFIELD_VAL(MR0_FIXED_00, n)\n\n// MR1\n#define MR1_VENDOR_ID_SHIFT 0\n#define MR1_VENDOR_ID_MASK (0x1F << MR1_VENDOR_ID_SHIFT)\n#define MR1_VENDOR_ID(n) BITFIELD_VAL(MR1_VENDOR_ID, n)\n#define MR1_DENSITY_SHIFT 5\n#define MR1_DENSITY_MASK (0x3 << MR1_DENSITY_SHIFT)\n#define MR1_DENSITY(n) BITFIELD_VAL(MR1_DENSITY, n)\n#define MR1_ULP (1 << 7)\n\n// MR2\n#define MR2_VENDOR_ID_SHIFT 0\n#define MR2_VENDOR_ID_MASK (0x7 << MR2_VENDOR_ID_SHIFT)\n#define MR2_VENDOR_ID(n) BITFIELD_VAL(MR2_VENDOR_ID, n)\n#define MR2_DEV_ID_SHIFT 3\n#define MR2_DEV_ID_MASK (0x3 << MR2_DEV_ID_SHIFT)\n#define MR2_DEV_ID(n) BITFIELD_VAL(MR2_DEV_ID, n)\n#define MR2_RSVD (1 << 5)\n#define MR2_FIXED_1 (1 << 6)\n#define MR2_GB (1 << 7)\n\n// MR4\n#define MR4_PASR_SHIFT 0\n#define MR4_PASR_MASK (0x7 << MR4_PASR_SHIFT)\n#define MR4_PASR(n) BITFIELD_VAL(MR4_PASR, n)\n#define MR4_RF (1 << 3)\n#define MR4_FIXED_0 (1 << 4)\n#define MR4_WRITE_LATENCY_SHIFT 5\n#define MR4_WRITE_LATENCY_MASK (0x7 << MR4_WRITE_LATENCY_SHIFT)\n#define MR4_WRITE_LATENCY(n) BITFIELD_VAL(MR4_WRITE_LATENCY, n)\n\n// MR6\n#define MR6_RSVD_SHIFT 0\n#define MR6_RSVD_MASK (0xF << MR6_RSVD_SHIFT)\n#define MR6_RSVD(n) BITFIELD_VAL(MR6_RSVD, n)\n#define MR6_HALF_SLEEP_SHIFT 4\n#define MR6_HALF_SLEEP_MASK (0xF << MR6_HALF_SLEEP_SHIFT)\n#define MR6_HALF_SLEEP(n) BITFIELD_VAL(MR6_HALF_SLEEP, n)\n\n// MR8\n#define MR8_BL_SHIFT 0\n#define MR8_BL_MASK (0x3 << MR8_BL_SHIFT)\n#define MR8_BL(n) BITFIELD_VAL(MR8_BL, n)\n#define MR8_BT (1 << 2)\n#define MR8_FIXED_0 (1 << 3)\n#define MR8_RSVD_SHIFT 4\n#define MR8_RSVD_MASK (0x7 << MR8_RSVD_SHIFT)\n#define MR8_RSVD(n) BITFIELD_VAL(MR8_RSVD, n)\n#define MR8_FIXED_00 (1 << 7)\n\nenum PSRAM_CMD_T {\n  PSRAM_CMD_SYNC_READ = 0x00,\n  PSRAM_CMD_SYNC_WRITE = 0x80,\n  PSRAM_CMD_4BYTE_READ = 0x3F,\n  PSRAM_CMD_4BYTE_WRITE = 0xBF,\n  PSRAM_CMD_REG_READ = 0x40,\n  PSRAM_CMD_REG_WRITE = 0xC0,\n  PSRAM_CMD_GLOBAL_RESET = 0xFF,\n};\n\nenum CP_FSM_STATE_T {\n  CP_FSM_STATE_SELF_REFRESH = 1,\n  CP_FSM_STATE_PD = 2,\n  CP_FSM_STATE_READY = 4,\n};\n\nenum MEMIF_CMD_T {\n  MEMIF_NO_CMD = 0x00,\n  MEMIF_WRITE = 0x01,\n  MEMIF_READ = 0x02,\n  MEMIF_MRS = 0x05,\n  MEMIF_MRR = 0x06,\n  MEMIF_REF = 0x08,\n  MEMIF_SREF = 0x09,\n  MEMIF_PD = 0x10,\n  MEMIF_NOP = 0x20,\n  MEMIF_RST = 0xFF,\n  MEMIF_ZQCL = 0x85,\n  MEMIF_ZQCS = 0x45,\n  MEMIF_ZQCRST = 0x25,\n  MEMIF_START_CLOCK = 0x40,\n  MEMIF_STOP_CLOCK = 0x80,\n  MEMIF_NEW_CMD = 0x7F,\n};\n\nstatic struct PSRAM_MC_T *const psram_mc = (struct PSRAM_MC_T *)PSRAM_CTRL_BASE;\nstatic struct PSRAM_PHY_T *const psram_phy =\n    (struct PSRAM_PHY_T *)(PSRAM_CTRL_BASE + 0x8000);\n\nstatic const uint32_t psram_cfg_clk = 48 * 1000 * 1000;\n\n#if (PSRAM_SPEED != 0)\nstatic const uint32_t psram_run_clk = PSRAM_SPEED * 1000 * 1000;\n#else\n#error \"invalid PSRAMUHS_SPEED\"\n#endif\n\nstatic void psram_chip_timing_config(uint32_t clk, bool psram_first);\n\nint hal_psramip_mc_busy(void) {\n  return !!(psram_mc->REG_404 & PSRAM_ULP_MC_BUSY);\n}\n\nstatic int hal_psramip_wb_busy(void) {\n  return !!(psram_mc->REG_404 & PSRAM_ULP_MC_WB_FILL_LEVEL_MASK);\n}\n\nint hal_psramip_mc_in_sleep(void) {\n  return GET_BITFIELD(psram_mc->REG_404, PSRAM_ULP_MC_CP_FSM_STATE) ==\n         CP_FSM_STATE_PD;\n}\n\nint hal_psramip_rx_fifo_empty(void) {\n  return !!(psram_mc->REG_404 & PSRAM_ULP_MC_MGR_RXFIFO_R_EMPTY);\n}\n\nint hal_psramip_tx_fifo_full(void) {\n  return !!(psram_mc->REG_404 & PSRAM_ULP_MC_MGR_TXFIFO_W_FULL);\n}\n\nuint32_t hal_psramip_get_rx_fifo_len(void) {\n  return GET_BITFIELD(psram_mc->REG_404, PSRAM_ULP_MC_MGR_RXFIFO_FULL_CNT);\n}\n\nuint32_t hal_psramip_get_tx_fifo_free_len(void) {\n  return GET_BITFIELD(psram_mc->REG_404, PSRAM_ULP_MC_MGR_TXFIFO_EMPTY_CNT);\n}\n\nvoid hal_psramip_mc_busy_wait(void) {\n  while (hal_psramip_mc_busy())\n    ;\n}\n\nvoid hal_psramip_wb_busy_wait(void) {\n  while (hal_psramip_wb_busy())\n    ;\n}\n\nvoid hal_psramip_flush_tx_fifo(void) {\n  hal_psramip_mc_busy_wait();\n  psram_mc->REG_01C = PSRAM_ULP_MC_MGR_TX_FIFO_CLR;\n  hal_psramip_mc_busy_wait();\n}\n\nvoid hal_psramip_flush_rx_fifo(void) {\n  hal_psramip_mc_busy_wait();\n  psram_mc->REG_01C = PSRAM_ULP_MC_MGR_RX_FIFO_CLR;\n  hal_psramip_mc_busy_wait();\n}\n\nvoid hal_psramip_flush_all_fifo(void) {\n  hal_psramip_mc_busy_wait();\n  psram_mc->REG_01C =\n      PSRAM_ULP_MC_MGR_TX_FIFO_CLR | PSRAM_ULP_MC_MGR_RX_FIFO_CLR;\n  hal_psramip_mc_busy_wait();\n}\n\nvoid hal_psramip_xfer_addr_len(uint32_t addr, uint32_t len) {\n  psram_mc->REG_008 = addr;\n  psram_mc->REG_00C = len;\n}\n\nvoid hal_psramip_write_fifo(uint32_t *data, uint32_t len) {\n  for (int i = 0; i < len; i++) {\n    psram_mc->REG_014 = *data++;\n  }\n}\n\nvoid hal_psramip_read_fifo(uint32_t *data, uint32_t len) {\n  for (int i = 0; i < len; i++) {\n    *data++ = psram_mc->REG_018;\n  }\n}\n\nvoid hal_psramip_set_reg_data_mask(void) {\n#ifdef PSRAM_DUAL_8BIT\n  psram_mc->REG_010 = 0xFC;\n#else\n  psram_mc->REG_010 = 0xFE;\n#endif\n}\n\nvoid hal_psramip_set_mem_data_mask(void) { psram_mc->REG_010 = 0; }\n\nvoid hal_psramip_set_cmd(enum MEMIF_CMD_T cmd) { psram_mc->REG_004 = cmd; }\n\nPOSSIBLY_UNUSED void psram_read_reg(uint32_t reg, uint32_t *val) {\n  hal_psramip_flush_all_fifo();\n  hal_psramip_xfer_addr_len(reg, 1);\n  hal_psramip_set_cmd(MEMIF_MRR);\n  while (hal_psramip_rx_fifo_empty())\n    ;\n  hal_psramip_read_fifo(val, 1);\n}\n\nstatic void psram_send_cmd_reg(enum MEMIF_CMD_T cmd, uint32_t reg,\n                               uint32_t val) {\n#ifdef PSRAM_DUAL_8BIT\n  val &= 0xFF;\n  val |= (val << 8);\n#endif\n  hal_psramip_flush_all_fifo();\n  // hal_psramip_set_reg_data_mask();\n  hal_psramip_write_fifo(&val, 1);\n  hal_psramip_xfer_addr_len(reg, 1);\n  hal_psramip_set_cmd(cmd);\n  while (hal_psramip_get_tx_fifo_free_len() != TX_FIFO_DEPTH)\n    ;\n  hal_psramip_mc_busy_wait();\n  // hal_psramip_set_mem_data_mask();\n}\n\nstatic void psram_write_reg(uint32_t reg, uint32_t val) {\n  psram_send_cmd_reg(MEMIF_MRS, reg, val);\n}\n\nstatic void psram_single_cmd(enum MEMIF_CMD_T cmd) {\n  hal_psramip_flush_all_fifo();\n  hal_psramip_set_cmd(cmd);\n  hal_psramip_mc_busy_wait();\n}\n\nstatic POSSIBLY_UNUSED void psram_reset(void) { psram_single_cmd(MEMIF_RST); }\n\nstatic void psram_set_timing(uint32_t clk) {\n  uint32_t reg;\n  uint32_t val;\n\n#if PSRAMSIZE == 0x800000\n  reg = 8;\n#ifdef PSRAM_WRAP_ENABLE\n  // Wrap 32\n  val = MR8_BL(1);\n#else\n  // Wrap 1k\n  val = MR8_BL(0x3);\n#endif\n  psram_write_reg(reg, val);\n#endif\n  reg = 0;\n  if (clk <= 66000000) {\n    val = 2;\n  } else if (clk <= 109000000) {\n    val = 3;\n  } else if (clk <= 133000000) {\n    val = 4;\n  } else if (clk <= 166000000) {\n    val = 5;\n  } else {\n    val = 6;\n  }\n  // Latency type: Variable\n  val = MR0_DRIVE_STR(3) | MR0_READ_LATENCY(val);\n  psram_write_reg(reg, val);\n\n  reg = 4;\n  if (clk <= 166000000) {\n    val = 0;\n  } else {\n    val = 4;\n  }\n  // Fast Refresh,\n  val = MR4_PASR(0) | MR4_WRITE_LATENCY(val);\n  psram_write_reg(reg, val);\n}\n\nstatic void hal_psram_phy_dll_config(uint32_t clk) {\n  uint32_t phy_clk;\n  uint32_t range;\n  uint32_t val;\n\n  val = psram_phy->REG_050;\n  val &= ~PSRAM_ULP_PHY_REG_DLL_RESETB | PSRAM_ULP_PHY_REG_DLL_CK_RDY;\n  psram_phy->REG_050 = val;\n  phy_clk = clk;\n  if (phy_clk <= 100000000 / 2) {\n    range = 3;\n  } else if (phy_clk <= 150000000 / 2) {\n    range = 2;\n  } else if (phy_clk <= 300000000 / 2) {\n    range = 1;\n  } else {\n    range = 0;\n  }\n  val = SET_BITFIELD(val, PSRAM_ULP_PHY_REG_DLL_RANGE, range);\n  psram_phy->REG_050 = val;\n  val |= PSRAM_ULP_PHY_REG_DLL_RESETB | PSRAM_ULP_PHY_REG_DLL_CK_RDY;\n  psram_phy->REG_050 = val;\n}\n\nstatic void hal_psram_phy_init(uint32_t clk) {\n  uint32_t val;\n  val = psram_phy->REG_048;\n  val |= PSRAM_ULP_PHY_REG_LDO_PU | PSRAM_ULP_PHY_REG_LDO_PRECHARGE;\n  psram_phy->REG_048 = val;\n  hal_sys_timer_delay_us(10);\n\n  val &= ~PSRAM_ULP_PHY_REG_LDO_PRECHARGE;\n  val = SET_BITFIELD(val, PSRAM_ULP_PHY_REG_LDO_IEN1, 0xc);\n  val = SET_BITFIELD(val, PSRAM_ULP_PHY_REG_LDO_IEN2, 0x5);\n  val = SET_BITFIELD(val, PSRAM_ULP_PHY_REG_LDO_VTUNE, 0x0);\n  psram_phy->REG_048 = val;\n\n  val = psram_phy->REG_04C;\n  val |= PSRAM_ULP_PHY_REG_PSRAM_PU;\n  val = SET_BITFIELD(val, PSRAM_ULP_PHY_REG_PSRAM_SWRC, 0x3);\n  val = SET_BITFIELD(val, PSRAM_ULP_PHY_REG_PSRAM_TXDRV, 0x3);\n  psram_phy->REG_04C = val;\n\n  val = psram_phy->REG_050;\n  val |= PSRAM_ULP_PHY_REG_DLL_PU;\n  // val = SET_BITFIELD(val, PSRAM_ULP_PHY_REG_DLL_SWRC, 0x3);\n  psram_phy->REG_050 = val;\n  hal_sys_timer_delay_us(2);\n\n  val |= PSRAM_ULP_PHY_REG_DLL_RESETB;\n  psram_phy->REG_050 = val;\n  hal_sys_timer_delay_us(20);\n\n  hal_psram_phy_dll_config(clk);\n}\n\nstatic void hal_psram_mc_set_timing(uint32_t clk) {\n  uint32_t val;\n\n  if (clk <= 166000000) {\n    val = PSRAM_ULP_MC_WRITE_LATENCY(0);\n  } else {\n    val = PSRAM_ULP_MC_WRITE_LATENCY(2);\n  }\n  psram_mc->REG_028 = val;\n#if (CHIP_PSRAM_CTRL_VER == 2)\n  if (clk <= 66000000) {\n    val = PSRAM_ULP_MC_READ_LATENCY(2);\n  } else if (clk <= 109000000) {\n    val = PSRAM_ULP_MC_READ_LATENCY(3);\n  } else if (clk <= 133000000) {\n    val = PSRAM_ULP_MC_READ_LATENCY(4);\n  } else if (clk <= 166000000) {\n    val = PSRAM_ULP_MC_READ_LATENCY(5);\n  } else {\n    val = PSRAM_ULP_MC_READ_LATENCY(6);\n  }\n  psram_mc->REG_02C = val;\n#else\n  // Min latency: 2 cycles\n  psram_mc->REG_02C = PSRAM_ULP_MC_READ_LATENCY(2);\n#endif\n  // tRC >= 55 ns\n  val = (clk / 1000000 * 55 + (1000 - 1)) / 1000;\n  psram_mc->REG_050 = PSRAM_ULP_MC_T_RC(val);\n  val = 2;\n  psram_mc->REG_058 = PSRAM_ULP_MC_T_CPHR(val);\n  psram_mc->REG_068 = PSRAM_ULP_MC_T_MRR(val);\n  val = 6;\n  psram_mc->REG_060 = PSRAM_ULP_MC_T_CPHW(val);\n#ifdef CHIP_BEST2001\n  val += 1;\n#endif\n  psram_mc->REG_06C = PSRAM_ULP_MC_T_MRS(val);\n  // tCEM <= 2.5 us\n  val = clk / 1000000 * 25 / 10;\n  psram_mc->REG_070 = PSRAM_ULP_MC_T_CEM(val);\n  // tRST >= 2 us\n  val = clk / 1000000 * 2 + 1;\n  psram_mc->REG_074 = PSRAM_ULP_MC_T_RST(val);\n  // tHS >= 4 us\n  val = clk / 1000000 * 4 + 1;\n  psram_mc->REG_080 = PSRAM_ULP_MC_T_HS(val);\n  // tXPHS in [60 ns, 4 us]\n  val = (clk / 1000000 * 60 + (1000 - 1)) / 1000;\n  psram_mc->REG_084 = PSRAM_ULP_MC_T_XPHS(val);\n  // tXHS >= 70 us\n  val = clk / 1000000 * 70 + 1;\n  psram_mc->REG_088 = PSRAM_ULP_MC_T_XHS(val);\n  psram_mc->REG_09C = PSRAM_ULP_MC_WR_DMY_CYC(1);\n  // NOP dummy cycles, same as tXPHS in [60 ns, 4 us]\n  val = (clk / 1000000 * 60 + (1000 - 1)) / 1000;\n  psram_mc->REG_0A0 =\n      PSRAM_ULP_MC_STOP_CLK_IN_NOP | PSRAM_ULP_MC_NOP_DMY_CYC(val);\n  psram_mc->REG_0A4 = PSRAM_ULP_MC_QUEUE_IDLE_CYCLE(5000);\n}\n\nstatic void hal_psram_init_calib(void) {\n  uint32_t delay;\n\n  while ((psram_phy->REG_058 & PSRAM_ULP_PHY_DLL_LOCK) == 0)\n    ;\n\n  delay = GET_BITFIELD(psram_phy->REG_058, PSRAM_ULP_PHY_DLL_DLY_IN);\n  // ASSERT(delay < (PSRAM_ULP_PHY_DLL_DLY_IN_MASK >>\n  // PSRAM_ULP_PHY_DLL_DLY_IN_SHIFT),\n  //    \"%s: Bad DLL_DLY_IN=0x%X reg=0x%08X\", __func__, delay,\n  //    psram_phy->REG_058);\n\n  delay /= 2;\n  psram_phy->REG_054 = PSRAM_ULP_PHY_REG_PSRAM_TX_CEB_DLY(delay) |\n                       PSRAM_ULP_PHY_REG_PSRAM_TX_CLK_DLY(delay) |\n                       PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY(delay) |\n                       PSRAM_ULP_PHY_REG_PSRAM_RX_DQS_DLY(delay);\n}\n\nstatic void hal_psram_mc_init(uint32_t clk) {\n#ifdef PSRAM_DUAL_8BIT\n  psram_mc->REG_000 = PSRAM_ULP_MC_CHIP_BIT;\n#else\n  psram_mc->REG_000 = 0;\n#endif\n  psram_mc->REG_020 = 0;\n  psram_mc->REG_024 =\n#ifndef CHIP_BEST2001\n      PSRAM_ULP_MC_ENTRY_SLEEP_IDLE |\n#endif\n      PSRAM_ULP_MC_AUTOWAKEUP_EN | PSRAM_ULP_MC_PD_MR(6) |\n      PSRAM_ULP_MC_PD_CMD(0xF0);\n#ifdef PSRAM_WRAP_ENABLE\n  // Burst len: 32 bytes, page: 1K\n  psram_mc->REG_034 =\n      PSRAM_ULP_MC_BURST_LENGTH(1) | PSRAM_ULP_MC_PAGE_BOUNDARY(0);\n#else\n  // 8MB psram\n  // Burst len: 1K, page: 1K\n  psram_mc->REG_034 =\n      PSRAM_ULP_MC_BURST_LENGTH(4) | PSRAM_ULP_MC_PAGE_BOUNDARY(0);\n#endif\n  // AHB bus width: 32 bits\n  psram_mc->REG_038 = 0;\n  // Write buffer level with high priority: 0~7\n  psram_mc->REG_03C = PSRAM_ULP_MC_HIGH_PRI_LEVEL(4);\n#ifdef PSRAM_WRAP_ENABLE\n  psram_mc->REG_040 = PSRAM_ULP_MC_CP_WRAP_EN;\n#else\n  psram_mc->REG_040 = PSRAM_ULP_MC_WRAP_CRT_RET_EN;\n#endif\n  psram_mc->REG_044 = 0;\n  psram_mc->REG_048 = 0;\n\n  hal_psramip_set_reg_data_mask();\n\n  hal_psram_mc_set_timing(clk);\n\n  psram_mc->REG_400 = PSRAM_ULP_MC_INIT_COMPLETE;\n\n  hal_psram_init_calib();\n}\n\nvoid hal_psram_sleep(void) {\n  hal_psramip_mc_busy_wait();\n  if (!hal_psramip_mc_in_sleep()) {\n#ifndef CHIP_BEST2001\n    psram_mc->REG_024 &= ~PSRAM_ULP_MC_ENTRY_SLEEP_IDLE;\n#endif\n    hal_psramip_mc_busy_wait();\n    hal_psramip_set_cmd(MEMIF_PD);\n    hal_psramip_mc_busy_wait();\n  }\n}\n\nvoid hal_psram_wakeup(void) {\n  hal_psramip_mc_busy_wait();\n#ifndef CHIP_BEST2001\n  psram_mc->REG_024 |= PSRAM_ULP_MC_ENTRY_SLEEP_IDLE;\n#endif\n}\n\nstatic void psram_chip_timing_config(uint32_t clk, bool update_psram_first) {\n  enum HAL_CMU_FREQ_T freq;\n\n  if (clk <= 52000000) {\n    freq = HAL_CMU_FREQ_104M;\n  } else if (clk <= 104000000) {\n    freq = HAL_CMU_FREQ_208M;\n  } else {\n#ifdef HAL_CMU_FREQ_T\n    freq = HAL_CMU_FREQ_390M;\n#else\n    freq = HAL_CMU_FREQ_208M;\n#endif\n  }\n\n  if (update_psram_first) {\n    psram_set_timing(clk);\n  }\n\n  hal_cmu_mem_set_freq(freq);\n  hal_sys_timer_delay_us(3);\n  hal_psram_phy_dll_config(clk);\n  hal_psram_init_calib();\n  hal_psram_mc_set_timing(clk);\n  if (!update_psram_first) {\n    psram_set_timing(clk);\n  }\n}\n\nstatic bool psramphy_check_write_valid() {\n  int i;\n  volatile uint32_t *psram_base = (volatile uint32_t *)PSRAM_NC_BASE;\n  for (i = 0; i < 0x8; ++i) {\n    *(psram_base + i) = 0xffffffff;\n  }\n  for (i = 0; i < 0x8; ++i) {\n    *(psram_base + i) = ((i << 0) | (i << 8) | (i << 16) | (i << 24));\n  }\n  hal_psramip_wb_busy_wait();\n  hal_psramip_mc_busy_wait();\n  for (i = 0; i < 0x8; ++i) {\n    uint32_t check_val = *(psram_base + i);\n    if (check_val != ((i << 0) | (i << 8) | (i << 16) | (i << 24))) {\n      // PSRAM_TRACE(2,\"write fail, %p = 0x%x\", (uint32_t)(psram_base+i),\n      // check_val);\n      return false;\n    }\n  }\n  return true;\n}\n\nstatic void hal_psram_calib_range(uint32_t range) {\n  uint32_t val;\n  uint32_t delay;\n  uint8_t tx_dqs, rx_dqs;\n  uint8_t inc_delay, volume;\n  uint8_t cali_valid[0x20][0x20];\n  uint8_t cali_value[0x20][0x20];\n\n  ASSERT(range <=\n             (PSRAM_ULP_PHY_DLL_DLY_IN_MASK >> PSRAM_ULP_PHY_DLL_DLY_IN_SHIFT),\n         \"ERROR, bad ana phy range:%d\", range);\n\n  val = psram_phy->REG_050;\n  val &= ~(PSRAM_ULP_PHY_REG_DLL_RESETB | PSRAM_ULP_PHY_REG_DLL_CK_RDY);\n  psram_phy->REG_050 = val;\n  val = SET_BITFIELD(val, PSRAM_ULP_PHY_REG_DLL_RANGE, range);\n  psram_phy->REG_050 = val;\n  val |= (PSRAM_ULP_PHY_REG_DLL_RESETB | PSRAM_ULP_PHY_REG_DLL_CK_RDY);\n  psram_phy->REG_050 = val;\n\n  hal_sys_timer_delay_us(100);\n  while ((psram_phy->REG_058 & PSRAM_ULP_PHY_DLL_LOCK) == 0)\n    ;\n\n  val = psram_phy->REG_058;\n  if ((val & PSRAM_ULP_PHY_DLL_ALL_ONE)) {\n    PSRAM_TRACE(2, \"%s: all one, increase range=%d\", __func__, range + 1);\n    return hal_psram_calib_range(range + 1);\n  }\n\n  delay = GET_BITFIELD(val, PSRAM_ULP_PHY_DLL_DLY_IN);\n  PSRAM_TRACE(4, \"%s, range:%d, T/4 = 0x%x(psram_phy->REG_058:0x%x)\", __func__,\n              range, delay / 2, val);\n  if (delay > (PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY_MASK >>\n               PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY_SHIFT) &&\n      range < 3) {\n    PSRAM_TRACE(\"%s: bad delay (T/2 > 0x1f). increase range=%d\", __func__,\n                range + 1);\n    return hal_psram_calib_range(range + 1);\n  }\n\n  inc_delay = delay / 8;\n  if (inc_delay == 0)\n    inc_delay = 1;\n\n  // volume =\n  // (PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY_MASK>>PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY_SHIFT)\n  // / inc_delay;\n  volume = MIN(delay, (PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY_MASK >>\n                       PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY_SHIFT)) /\n           inc_delay;\n\n  PSRAM_TRACE(2, \"volume:%d, inc_delay:%d\", volume, inc_delay);\n\n  uint8_t all_valid = 1;\n\n  memset(cali_valid, 0, sizeof(cali_valid));\n  for (tx_dqs = 0; tx_dqs <= volume; tx_dqs++) {\n    for (rx_dqs = 0; rx_dqs <= volume; rx_dqs++) {\n      psram_phy->REG_054 =\n          PSRAM_ULP_PHY_REG_PSRAM_TX_CEB_DLY(delay / 2) |\n          PSRAM_ULP_PHY_REG_PSRAM_TX_CLK_DLY(delay / 2) |\n          PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY(tx_dqs * inc_delay) |\n          PSRAM_ULP_PHY_REG_PSRAM_RX_DQS_DLY(rx_dqs * inc_delay);\n      cali_valid[tx_dqs][rx_dqs] = psramphy_check_write_valid();\n      if (cali_valid[tx_dqs][rx_dqs] == 0)\n        all_valid = 0;\n    }\n  }\n\n  if (all_valid && range < (PSRAM_ULP_PHY_DLL_DLY_IN_MASK >>\n                            PSRAM_ULP_PHY_DLL_DLY_IN_SHIFT)) {\n    PSRAM_TRACE(2, \"%s: all valid increase range=%d\", __func__, range + 1);\n    // return hal_psram_calib_range(range+1);\n  }\n\n  memset(cali_value, 0, sizeof(cali_value));\n  PSRAM_TRACENOCRLF_NOTS(\"\\r\\n\\r\\n \"\n                         \"-----------------------------------------------------\"\n                         \"----------------- \\r\\n\");\n  PSRAM_TRACENOCRLF_NOTS(\"    rx_dqs\");\n  for (tx_dqs = 0; tx_dqs <= volume; tx_dqs++) {\n    PSRAM_TRACENOCRLF_NOTS(\" %2d \", tx_dqs * inc_delay);\n  }\n  PSRAM_TRACENOCRLF_NOTS(\"\\r\\n\");\n  for (tx_dqs = 0; tx_dqs <= volume; tx_dqs++) {\n    PSRAM_TRACENOCRLF_NOTS(\"tx_dqs:%2d \", tx_dqs * inc_delay);\n    for (rx_dqs = 0; rx_dqs <= volume; rx_dqs++) {\n      PSRAM_TRACENOCRLF_NOTS(\"  %d \", cali_valid[tx_dqs][rx_dqs]);\n      if (cali_valid[tx_dqs][rx_dqs]) {\n        uint8_t len_from_zero;\n        int8_t p;\n        p = tx_dqs;\n        while (p >= 0) {\n          if (cali_valid[p][rx_dqs] == 0)\n            break;\n          p--;\n        }\n        len_from_zero = tx_dqs - p;\n        cali_value[tx_dqs][rx_dqs] = len_from_zero;\n\n        p = tx_dqs;\n        while (p <= volume) {\n          if (cali_valid[p][rx_dqs] == 0)\n            break;\n          p++;\n        }\n        len_from_zero = p - tx_dqs;\n        cali_value[tx_dqs][rx_dqs] =\n            MIN(cali_value[tx_dqs][rx_dqs], len_from_zero);\n\n        p = rx_dqs;\n        while (p >= 0) {\n          if (cali_valid[tx_dqs][p] == 0)\n            break;\n          p--;\n        }\n        len_from_zero = rx_dqs - p;\n        cali_value[tx_dqs][rx_dqs] =\n            MIN(cali_value[tx_dqs][rx_dqs], len_from_zero);\n\n        p = rx_dqs;\n        while (p <= volume) {\n          if (cali_valid[tx_dqs][p] == 0)\n            break;\n          p++;\n        }\n        len_from_zero = p - rx_dqs;\n        cali_value[tx_dqs][rx_dqs] =\n            MIN(cali_value[tx_dqs][rx_dqs], len_from_zero);\n      }\n    }\n    PSRAM_TRACENOCRLF_NOTS(\"\\r\\n\");\n  }\n  PSRAM_TRACENOCRLF_NOTS(\" ----------------------------------------------------\"\n                         \"---------------------- \\r\\n\");\n\n#if 0\n    PSRAM_TRACENOCRLF_NOTS(\"\\r\\n\\r\\n ---------------------------------------------------------------------- \\r\\n\");\n    PSRAM_TRACENOCRLF_NOTS(\"    rx_dqs\");\n    for (tx_dqs=0; tx_dqs<=volume; tx_dqs++) {\n        PSRAM_TRACENOCRLF_NOTS(\" %2d \", tx_dqs*inc_delay);\n    }\n    PSRAM_TRACENOCRLF_NOTS(\"\\r\\n\");\n    for (tx_dqs=0; tx_dqs<=volume; tx_dqs++) {\n        PSRAM_TRACENOCRLF_NOTS(\"tx_dqs:%2d \", tx_dqs*inc_delay);\n        for (rx_dqs=0; rx_dqs<=volume; rx_dqs++) {\n            PSRAM_TRACENOCRLF_NOTS(\"  %d \", cali_value[tx_dqs][rx_dqs]);\n        }\n        PSRAM_TRACENOCRLF_NOTS(\"\\r\\n\");\n    }\n    PSRAM_TRACENOCRLF_NOTS(\" -------------------------------------------------------------------------- \\r\\n\");\n#endif\n\n  uint32_t position = 0;\n  uint8_t max_value = 0;\n  for (tx_dqs = 0; tx_dqs <= volume; tx_dqs++) {\n    for (rx_dqs = 0; rx_dqs <= volume; rx_dqs++) {\n      if (cali_value[tx_dqs][rx_dqs] > max_value) {\n        max_value = cali_value[tx_dqs][rx_dqs];\n        position = tx_dqs * (volume + 1) + rx_dqs;\n      }\n    }\n  }\n  PSRAM_TRACENOCRLF_NOTS(\"position:%d\\r\\n\", position);\n  tx_dqs = position / (volume + 1) * inc_delay;\n  rx_dqs = (position % (volume + 1)) * inc_delay;\n  PSRAM_TRACENOCRLF_NOTS(\"most optimal position. tx_dqs:%d, rx_dqs:%d\\r\\n\",\n                         tx_dqs, rx_dqs);\n\n  psram_phy->REG_054 = PSRAM_ULP_PHY_REG_PSRAM_TX_CEB_DLY(delay / 2) |\n                       PSRAM_ULP_PHY_REG_PSRAM_TX_CLK_DLY(delay / 2) |\n                       PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY(tx_dqs) |\n                       PSRAM_ULP_PHY_REG_PSRAM_RX_DQS_DLY(rx_dqs);\n}\nstatic void hal_psram_calib(uint32_t clk) {\n  uint32_t phy_clk;\n  uint32_t range;\n  PSRAM_TRACE(\"%s, speed:%d\", __func__, clk);\n  phy_clk = clk;\n  if (phy_clk <= 100000000 / 2) {\n    range = 3;\n  } else if (phy_clk <= 150000000 / 2) {\n    range = 2;\n  } else if (phy_clk <= 300000000 / 2) {\n    range = 1;\n  } else {\n    range = 0;\n  }\n  hal_psram_calib_range(range);\n}\nvoid hal_psram_snoop_enable() {\n  psram_mc->REG_044 &= ~PSRAM_ULP_MC_SNP_DISABLE;\n}\nvoid hal_psram_snoop_disable() {\n  psram_mc->REG_044 |= PSRAM_ULP_MC_SNP_DISABLE;\n}\n\nvoid hal_psram_init(void) {\n  hal_cache_wrap_enable(HAL_CACHE_ID_I_CACHE);\n  hal_cache_wrap_enable(HAL_CACHE_ID_D_CACHE);\n\n  hal_cmu_mem_set_freq(HAL_CMU_FREQ_104M);\n  hal_cmu_clock_enable(HAL_CMU_MOD_O_PSRAM);\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_PSRAM);\n  hal_cmu_reset_clear(HAL_CMU_MOD_O_PSRAM);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_PSRAM);\n\n  hal_psram_phy_init(psram_cfg_clk);\n  hal_sys_timer_delay_us(30);\n  hal_psram_mc_init(psram_cfg_clk);\n\n#ifdef PSRAM_RESET\n  psram_reset();\n  psram_chip_timing_config(psram_run_clk, true);\n#else\n  uint32_t reg;\n  uint32_t val;\n\n  reg = 4;\n  psram_read_reg(reg, &val);\n  if (val & MR4_WL) {\n    psram_chip_timing_config(psram_run_clk, false);\n  } else {\n    psram_chip_timing_config(psram_run_clk, true);\n  }\n#endif\n\n  hal_psram_snoop_disable();\n  hal_psram_calib(psram_run_clk);\n  hal_psram_snoop_enable();\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_psramip_v1.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_PSRAMIP_V1_H__\n#define __HAL_PSRAMIP_V1_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"reg_psramip_v1.h\"\n\n#define PSRIP_KEY (0x55000000)\n\n#define psramip_read8(reg_base,a) \\\n     (*(volatile unsigned char*)((reg_base)+(a)))\n\n#define psramip_read32(reg_base,a) \\\n     (*(volatile unsigned int *)((reg_base)+(a)))\n\n#define psramip_write32(v,reg_base,a) \\\n     ((*(volatile unsigned int *)((reg_base)+(a))) = v)\n\n\t\n#define\tPSRAM_STAT_BUSY  (0x01)\n#define\tPSRAM_STAT_TXFIFO_EMPTY  \t(0x02)\n#define\tPSRAM_STAT_TXFIFO_FULL \t(0x04)\n#define\tPSRAM_STAT_RXFIFO_EMPTY \t(0x08)\n#define    PSRAM_STAT_RXFIFO_COUNT (0x1f << 4)\n\n/* ip ops */\n#if 1\ninline static void psramip_w_cmd_addr(uint32_t reg_base, uint32_t cmd, uint32_t addr)\n{\n    psramip_write32(cmd<REG_404 & PSRAM_UHS_MC_BUSY);\n}\n\nstatic int hal_psramuhsip_wb_busy(void) {\n  return !!(psramuhs_mc->REG_404 & PSRAM_UHS_MC_WB_FILL_LEVEL_MASK);\n}\n\nint hal_psramuhsip_mc_in_sleep(void) {\n  return GET_BITFIELD(psramuhs_mc->REG_404, PSRAM_UHS_MC_CP_FSM_STATE) ==\n         CP_FSM_STATE_PD;\n}\n\nint hal_psramuhsip_rx_fifo_empty(void) {\n  return !!(psramuhs_mc->REG_404 & PSRAM_UHS_MC_MGR_RXFIFO_R_EMPTY);\n}\n\nint hal_psramuhsip_tx_fifo_full(void) {\n  return !!(psramuhs_mc->REG_404 & PSRAM_UHS_MC_MGR_TXFIFO_W_FULL);\n}\n\nuint32_t hal_psramuhsip_get_rx_fifo_len(void) {\n  return GET_BITFIELD(psramuhs_mc->REG_404, PSRAM_UHS_MC_MGR_RXFIFO_FULL_CNT);\n}\n\nuint32_t hal_psramuhsip_get_tx_fifo_free_len(void) {\n  return GET_BITFIELD(psramuhs_mc->REG_404, PSRAM_UHS_MC_MGR_TXFIFO_EMPTY_CNT);\n}\n\nvoid hal_psramuhsip_mc_busy_wait(void) {\n  while (hal_psramuhsip_mc_busy())\n    ;\n}\n\nvoid hal_psramuhsip_wb_busy_wait(void) {\n  while (hal_psramuhsip_wb_busy())\n    ;\n}\n\nvoid hal_psramuhsip_flush_tx_fifo(void) {\n  hal_psramuhsip_mc_busy_wait();\n  psramuhs_mc->REG_01C = PSRAM_UHS_MC_MGR_TX_FIFO_CLR;\n  hal_psramuhsip_mc_busy_wait();\n}\n\nvoid hal_psramuhsip_flush_rx_fifo(void) {\n  hal_psramuhsip_mc_busy_wait();\n  psramuhs_mc->REG_01C = PSRAM_UHS_MC_MGR_RX_FIFO_CLR;\n  hal_psramuhsip_mc_busy_wait();\n}\n\nvoid hal_psramuhsip_flush_all_fifo(void) {\n  hal_psramuhsip_mc_busy_wait();\n  psramuhs_mc->REG_01C =\n      PSRAM_UHS_MC_MGR_TX_FIFO_CLR | PSRAM_UHS_MC_MGR_RX_FIFO_CLR;\n  hal_psramuhsip_mc_busy_wait();\n}\n\nvoid hal_psramuhsip_xfer_addr_len(uint32_t addr, uint32_t len) {\n  psramuhs_mc->REG_008 = addr;\n  psramuhs_mc->REG_00C = len;\n}\n\nvoid hal_psramuhsip_write_fifo(uint32_t *data, uint32_t len) {\n  for (int i = 0; i < len; i++) {\n    psramuhs_mc->REG_014 = *data++;\n  }\n}\n\nvoid hal_psramuhsip_read_fifo(uint32_t *data, uint32_t len) {\n  for (int i = 0; i < len; i++) {\n    *data++ = psramuhs_mc->REG_018;\n  }\n}\n\nvoid hal_psramuhsip_set_reg_data_mask(void) {\n#ifdef PSRAMUHS_DUAL_8BIT\n  psramuhs_mc->REG_010 = 0xFFFC;\n#else\n  psramuhs_mc->REG_010 = 0xFFFE;\n#endif\n}\n\nvoid hal_psramuhsip_set_mem_data_mask(void) { psramuhs_mc->REG_010 = 0; }\n\nvoid hal_psramuhsip_set_reg_fifo_width(void) { psramuhs_mc->REG_0B0 = 0; }\n\nvoid hal_psramuhsip_set_mem_fifo_width(void) {\n  // 128 bits if PSRAMUHS_DUAL_8BIT; 64 bits otherwise\n  psramuhs_mc->REG_0B0 = PSRAM_UHS_MC_MGR_FIFO_TEST_EN;\n}\n\nvoid hal_psramuhsip_set_cmd(enum MEMIF_CMD_T cmd) {\n  psramuhs_mc->REG_004 = cmd;\n}\n\nPOSSIBLY_UNUSED void psramuhs_read_reg(uint32_t reg, uint32_t *val) {\n  hal_psramuhsip_flush_all_fifo();\n  hal_psramuhsip_xfer_addr_len(reg, 1);\n  hal_psramuhsip_set_cmd(MEMIF_MRR);\n  while (hal_psramuhsip_rx_fifo_empty())\n    ;\n  hal_psramuhsip_read_fifo(val, 1);\n}\n\nstatic void psramuhs_send_cmd_reg(enum MEMIF_CMD_T cmd, uint32_t reg,\n                                  uint32_t val) {\n#if !defined(PSRAMUHS_DIG_LOOPBACK) && !defined(PSRAMUHS_ANA_LOOPBACK)\n#ifdef PSRAMUHS_DUAL_8BIT\n  val &= 0xFF;\n  val |= (val << 8);\n#endif\n  hal_psramuhsip_flush_all_fifo();\n  // hal_psramuhsip_set_reg_fifo_width();\n  // hal_psramuhsip_set_reg_data_mask();\n  hal_psramuhsip_write_fifo(&val, 1);\n  hal_psramuhsip_xfer_addr_len(reg, 1);\n  hal_psramuhsip_set_cmd(cmd);\n  while (hal_psramuhsip_get_tx_fifo_free_len() != TX_FIFO_DEPTH)\n    ;\n  hal_psramuhsip_mc_busy_wait();\n  // hal_psramuhsip_set_mem_fifo_width();\n  // hal_psramuhsip_set_mem_data_mask();\n#endif\n}\n\nstatic void psramuhs_write_reg(uint32_t reg, uint32_t val) {\n  psramuhs_send_cmd_reg(MEMIF_MRS, reg, val);\n}\n\nstatic void psramuhs_single_cmd(enum MEMIF_CMD_T cmd) {\n#if !defined(PSRAMUHS_DIG_LOOPBACK) && !defined(PSRAMUHS_ANA_LOOPBACK)\n  hal_psramuhsip_flush_all_fifo();\n  hal_psramuhsip_set_cmd(cmd);\n  hal_psramuhsip_mc_busy_wait();\n#endif\n}\n\nstatic POSSIBLY_UNUSED void psramuhs_start_clock(void) {\n  psramuhs_single_cmd(MEMIF_START_CLOCK);\n}\n\nstatic POSSIBLY_UNUSED void psramuhs_stop_clock(void) {\n  psramuhs_single_cmd(MEMIF_STOP_CLOCK);\n}\n\nstatic POSSIBLY_UNUSED void psramuhs_reset(void) {\n  psramuhs_single_cmd(MEMIF_RST);\n}\n\nstatic POSSIBLY_UNUSED void psramuhs_zq_calib_reset(void) {\n  psramuhs_send_cmd_reg(MEMIF_ZQCRST, 7, 0);\n}\n\nstatic POSSIBLY_UNUSED void psramuhs_zq_calib(void) {\n  psramuhs_send_cmd_reg(MEMIF_ZQCL, 5, 0);\n}\n\nstatic void psramuhs_set_timing(uint32_t clk) {\n  uint32_t reg;\n  uint32_t val;\n  uint32_t burst_len;\n\n  reg = 0;\n  if (clk <= 200000000) {\n    val = 7;\n  } else if (clk <= 333000000) {\n    val = 6;\n  } else if (clk <= 400000000) {\n    val = 5;\n  } else if (clk <= 533000000) {\n    val = 4;\n  } else if (clk <= 667000000) {\n    val = 0;\n  } else if (clk <= 800000000) {\n    val = 1;\n  } else if (clk <= 933000000) {\n    val = 2;\n  } else {\n    val = 3;\n  }\n  // Latency, drive\n  val = (val << 0) | (2 << 3);\n#if 0\n    //refresh disable\n    val |= (1 << 7);\n#endif\n  psramuhs_write_reg(reg, val);\n\n  reg = 2;\n#if defined(__ARM_ARCH_ISA_ARM) || defined(DSP_ENABLE)\n#ifdef PSRAMUHS_DUAL_8BIT\n  burst_len = 0x1; // 32B\n#else\n  burst_len = 0x2; // 64B\n#endif\n#else\n#ifdef PSRAMUHS_DUAL_8BIT\n  burst_len = 0x0; // 16B\n#else\n  burst_len = 0x1; // 32B\n#endif\n#endif\n#ifdef PSRAMUHS_PRA_ENABLE\n  // Burst len, pra enable\n  val = (burst_len << 0) | (1 << 4);\n#else\n  // Burst len, auto-precharge\n#ifdef PSRAMUHS_AUTO_PRECHARGE\n  val = (burst_len << 0) | (1 << 3);\n#else\n  val = (burst_len << 0);\n#endif\n#endif\n  // wrap enable\n#ifdef PSRAMUHS_WRAP_ENABLE\n  val |= (1 << 2);\n#endif\n  psramuhs_write_reg(reg, val);\n\n  reg = 6;\n  // Vref trim\n  val = (8 << 0);\n  psramuhs_write_reg(reg, val);\n  hal_sys_timer_delay_us(5);\n\n  psramuhs_zq_calib_reset();\n  psramuhs_zq_calib();\n}\n\nvoid hal_psramuhs_sleep(void) {}\n\nvoid hal_psramuhs_wakeup(void) {}\n\nstatic void hal_psramuhs_mc_set_timing(uint32_t clk) {\n  uint32_t val1, val2;\n  uint32_t val;\n\n  if (clk <= 200000000) {\n    val1 = 9;\n    val2 = 5;\n  } else if (clk <= 333000000) {\n    val1 = 13;\n    val2 = 5;\n  } else if (clk <= 400000000) {\n    val1 = 16;\n    val2 = 6;\n  } else if (clk <= 533000000) {\n    val1 = 20;\n    val2 = 10;\n  } else if (clk <= 667000000) {\n    val1 = 24;\n    val2 = 12;\n  } else if (clk <= 800000000) {\n    val1 = 29;\n    val2 = 14;\n  } else if (clk <= 933000000) {\n    val1 = 33;\n    val2 = 16;\n  } else {\n    val1 = 37;\n    val2 = 18;\n  }\n  if (clk >= 466000000)\n    val2--;\n\n  psramuhs_mc->REG_028 = PSRAM_UHS_MC_WRITE_LATENCY(val2);\n  psramuhs_mc->REG_02C = PSRAM_UHS_MC_READ_LATENCY(val1);\n\n  // tCEM_MAX <= 7.8 us when MRW2[5]==1 && MRR4[2]==0, or <= 3.9 us when\n  // MRW2[5]==0 || MRR4[2]==1\n  val = (clk / 1000000) * 30 / 10 - 1;\n  psramuhs_mc->REG_04C =\n      PSRAM_UHS_MC_T_REFI(val) | PSRAM_UHS_MC_NUM_OF_BURST_RFS(0x1000);\n\n  // tRC >= 60 ns\n  val = ((clk / 1000000) * 60 + (1000 - 1)) / 1000;\n  psramuhs_mc->REG_050 = PSRAM_UHS_MC_T_RC(val);\n  // tRFC >= 60 ns\n  val = ((clk / 1000000) * 60 + (1000 - 1)) / 1000;\n  psramuhs_mc->REG_054 = PSRAM_UHS_MC_T_RFC(val);\n#ifdef PSRAMUHS_AUTO_PRECHARGE\n\n  // tCPHR >= 5 ns (auto precharge)\n#if PSRAMUHS_SPEED >= 900\n  val = ((clk / 1000000) * 5 + (1000 - 1)) / 1000;\n#else  /*PSRAMUHS_SPEED == 1000*/\n  val = 20;\n#endif /*PSRAMUHS_SPEED == 1000*/\n  psramuhs_mc->REG_05C = PSRAM_UHS_MC_T_CPHR_AP(val);\n\n  // tCPHW >= 30 ns (auto precharge)\n#if PSRAMUHS_SPEED >= 900\n  val = ((clk / 1000000) * 30 + (1000 - 1)) / 1000;\n#else  /*PSRAMUHS_SPEED == 1000*/\n  val = 100;\n#endif /*PSRAMUHS_SPEED == 1000*/\n  psramuhs_mc->REG_064 = PSRAM_UHS_MC_T_CPHW_AP(val);\n\n#else /*PSRAMUHS_AUTO_PRECHARGE*/\n\n  // tCPHR >= 20 ns (no auto precharge)\n#if PSRAMUHS_SPEED >= 900\n  val = ((clk / 1000000) * 20 + (1000 - 1)) / 1000;\n#else  /*PSRAMUHS_SPEED == 1000*/\n  val = 20;\n#endif /*PSRAMUHS_SPEED == 1000*/\n  psramuhs_mc->REG_058 = PSRAM_UHS_MC_T_CPHR(val);\n\n  // tCPHW >= 30 ns (no auto precharge)\n#if PSRAMUHS_SPEED >= 900\n  val = ((clk / 1000000) * 30 + (1000 - 1)) / 1000;\n#else  /*PSRAMUHS_SPEED == 1000*/\n  val = 100;\n#endif /*PSRAMUHS_SPEED == 1000*/\n  psramuhs_mc->REG_060 = PSRAM_UHS_MC_T_CPHW(val);\n\n#endif /*PSRAMUHS_AUTO_PRECHARGE*/\n  // tMRR >=  20ns\n  val = 20; //((clk / 1000000) * 20 + (1000 - 1)) / 1000;\n  psramuhs_mc->REG_068 = PSRAM_UHS_MC_T_MRR(val);\n  // tMRW >= 100 ns\n  val = ((clk / 1000000) * 100 + (1000 - 1)) / 1000;\n  psramuhs_mc->REG_06C = PSRAM_UHS_MC_T_MRS(val);\n  // tCEM >= 4 cycles\n  psramuhs_mc->REG_070 = PSRAM_UHS_MC_T_CEM(4);\n  // tRST >= 10 us\n  val = (clk / 1000000) * 10;\n  psramuhs_mc->REG_074 = PSRAM_UHS_MC_T_RST(val);\n  // tSRF >= 100 ns\n  val = ((clk / 1000000) + (10 - 1)) / 10;\n  psramuhs_mc->REG_078 = PSRAM_UHS_MC_T_SRF(val);\n  // tSRF >= 70 ns\n  val = ((clk / 1000000) * 70 + (1000 - 1)) / 1000;\n  psramuhs_mc->REG_07C = PSRAM_UHS_MC_T_XSR(val);\n  // tHS >= 150 us\n  val = (clk / 1000000) * 150;\n  psramuhs_mc->REG_080 = PSRAM_UHS_MC_T_HS(val);\n  // tXPHS >= 100 ns\n  val = ((clk / 1000000) + (10 - 1)) / 10;\n  psramuhs_mc->REG_084 = PSRAM_UHS_MC_T_XPHS(val);\n  // tXHS >= 150 us\n  val = (clk / 1000000) * 150;\n  psramuhs_mc->REG_088 = PSRAM_UHS_MC_T_XHS(val);\n  // tZQCAL >= 1 us\n  val = (clk / 1000000) * 1;\n  psramuhs_mc->REG_08C = PSRAM_UHS_MC_T_ZQCAL(val);\n  // tZQCRST >= 1 us\n  val = (clk / 1000000) * 1;\n  psramuhs_mc->REG_090 = PSRAM_UHS_MC_T_ZQCRST(val);\n  // NOP dummy cycles, same as tXPHS >= 100 ns\n  val = ((clk / 1000000) + (10 - 1)) / 10;\n  psramuhs_mc->REG_0A0 =\n      PSRAM_UHS_MC_STOP_CLK_IN_NOP | PSRAM_UHS_MC_NOP_DMY_CYC(val);\n  psramuhs_mc->REG_0A4 = PSRAM_UHS_MC_QUEUE_IDLE_CYCLE(50000);\n  // tDQSCK in [2 ns, 6.5 ns], expanded time >= tDQSCK_MAX\n  val = ((clk / 1000000) * 65 / 10 + (1000 - 1)) / 1000;\n  psramuhs_mc->REG_0A8 = PSRAM_UHS_MC_T_EXPANDRD(val);\n}\n\nstatic void hal_psramuhs_mc_init(uint32_t clk) {\n  uint32_t val;\n  uint32_t burst_len;\n  uint32_t boundary;\n\n  val = PSRAM_UHS_MC_CHIP_TYPE;\n#ifdef PSRAMUHS_DUAL_8BIT\n  val |= PSRAM_UHS_MC_CHIP_BIT;\n#endif\n#ifdef PSRAMUHS_DUAL_SWITCH\n  val |= PSRAM_UHS_MC_CHIP_SWITCH;\n#endif\n#ifdef PSRAMUHS_16BIT\n  val |= PSRAM_UHS_MC_CHIP_IO_X16 | PSRAM_UHS_MC_CHIP_CA_PATTERN(2);\n#else\n  val |= PSRAM_UHS_MC_CHIP_CA_PATTERN(1);\n#endif\n#if (PSRAMUHS_SIZE == 0x800000)\n  val |= PSRAM_UHS_MC_CHIP_MEM_SIZE(1);\n#elif (PSRAMUHS_SIZE == 0x1000000)\n  val |= PSRAM_UHS_MC_CHIP_MEM_SIZE(2);\n#elif (PSRAMUHS_SIZE == 0x2000000)\n  val |= PSRAM_UHS_MC_CHIP_MEM_SIZE(3);\n#else\n  ASSERT(false, \"Bad PSRAMUHS_SIZE=0x%08X\", PSRAMUHS_SIZE);\n#endif\n  psramuhs_mc->REG_000 = val;\n  psramuhs_mc->REG_024 =\n      PSRAM_UHS_MC_STOP_CLK_IDLE | PSRAM_UHS_MC_AUTOWAKEUP_EN;\n  // Burst length: 1=32 bytes (Cortex-M) or 2=64 bytes (Cortex-A), Page\n  // boundary: 2K bytes\n#ifdef PSRAMUHS_WRAP_ENABLE\n#if defined(__ARM_ARCH_ISA_ARM) || defined(DSP_ENABLE)\n  burst_len = 0x2; // 64B\n#else\n  burst_len = 0x1; // 32B\n#endif\n#else\n#ifdef PSRAMUHS_DUAL_8BIT\n  burst_len = 0x6; // 0:16B 5;2KB 6:4KB\n#else\n  burst_len = 0x5; // 0:16B 5;2KB 6:4KB\n#endif\n#endif\n#ifdef PSRAMUHS_DUAL_8BIT\n  boundary = 2;\n#else\n  boundary = 1;\n#endif\n  psramuhs_mc->REG_034 = PSRAM_UHS_MC_BURST_LENGTH(burst_len) |\n                         PSRAM_UHS_MC_PAGE_BOUNDARY(boundary);\n\n  // AXI bus width: 128 bits\n  psramuhs_mc->REG_038 = PSRAM_UHS_MC_BUS_WIDTH;\n  // Write buffer level with high priority: 0~15\n  psramuhs_mc->REG_03C = PSRAM_UHS_MC_HIGH_PRI_LEVEL(8);\n#ifdef PSRAMUHS_PRA_ENABLE\n  psramuhs_mc->REG_040 = PSRAM_UHS_MC_PRA_ENABLE | PSRAM_UHS_MC_PRA_MAX_CNT(32);\n#else\n#ifdef PSRAMUHS_AUTO_PRECHARGE\n  psramuhs_mc->REG_040 =\n      PSRAM_UHS_MC_AUTO_PRECHARGE | PSRAM_UHS_MC_PRA_MAX_CNT(32);\n#else\n  psramuhs_mc->REG_040 = PSRAM_UHS_MC_PRA_MAX_CNT(32);\n#endif\n#endif\n#ifdef PSRAMUHS_WRAP_ENABLE\n  psramuhs_mc->REG_040 |= PSRAM_UHS_MC_CP_WRAP_EN;\n#endif\n  psramuhs_mc->REG_048 = PSRAM_UHS_MC_FRE_RATIO(2);\n#ifdef PSRAMUHS_DUMMY_CYCLE\n  psramuhs_mc->REG_840 |= PSRAM_UHS_MC_PHY_DUMMY_CYC_EN;\n#endif\n#if defined(CHIP_BEST2001)\n  psramuhs_mc->REG_840 |= PSRAM_UHS_MC_PHY_IDLE_PAD_EN;\n#endif\n  psramuhs_mc->REG_844 = PSRAM_UHS_MC_T_WPST(2);\n\n  hal_psramuhsip_set_reg_fifo_width();\n  hal_psramuhsip_set_reg_data_mask();\n\n  hal_psramuhs_mc_set_timing(clk);\n\n  psramuhs_mc->REG_400 = PSRAM_UHS_MC_INIT_COMPLETE;\n\n#ifdef PSRAMUHS_DIG_LOOPBACK\n  psramuhs_mc->REG_840 |= PSRAM_UHS_MC_PHY_LOOPBACK_EN;\n  psramuhs_mc->REG_044 |= PSRAM_UHS_MC_SNP_DISABLE;\n#endif\n#ifdef PSRAMUHS_ANA_LOOPBACK\n  psramuhs_mc->REG_044 |= PSRAM_UHS_MC_SNP_DISABLE;\n  psramuhs_mc->REG_0B0 |= PSRAM_UHS_MC_MGR_FIFO_TEST_EN;\n  psramuhs_mc->REG_840 |= PSRAM_UHS_MC_ANA_LOOPBACK_EN;\n#endif\n\n#if !defined(PSRAMUHS_DIG_LOOPBACK) && !defined(PSRAMUHS_ANA_LOOPBACK)\n  psramuhsphy_init_calib();\n#endif\n}\n\nvoid hal_psramuhs_mc_entry_auto_lp() {\n  psramuhs_mc->REG_024 |=\n      PSRAM_UHS_MC_ENTRY_SLEEP_IDLE | PSRAM_UHS_MC_ENTRY_SELF_REFRESH_IDLE;\n}\n\nvoid hal_psramuhs_snoop_enable() {\n  psramuhs_mc->REG_044 &= ~PSRAM_UHS_MC_SNP_DISABLE;\n}\nvoid hal_psramuhs_snoop_disable() {\n  psramuhs_mc->REG_044 |= PSRAM_UHS_MC_SNP_DISABLE;\n}\nvoid hal_psramuhs_refresh_enable() {\n#ifdef PSRAMUHS_BURST_REFRESH\n  psramuhs_mc->REG_020 =\n      PSRAM_UHS_MC_REFRESH_MODE | PSRAM_UHS_MC_BURST_REFRESH_EN;\n#else\n  psramuhs_mc->REG_020 = PSRAM_UHS_MC_REFRESH_MODE;\n#endif\n}\nvoid hal_psramuhs_init(void) {\n#if PSRAMUHS_ENABLE\n#error \"must set MPU befor 2001 eco\"\n#endif\n\n  hal_cache_wrap_enable(HAL_CACHE_ID_I_CACHE);\n  hal_cache_wrap_enable(HAL_CACHE_ID_D_CACHE);\n\n  hal_cmu_ddr_clock_enable();\n  hal_cmu_clock_enable(HAL_CMU_MOD_O_PSRAMUHS);\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_PSRAMUHS);\n  hal_cmu_reset_clear(HAL_CMU_MOD_O_PSRAMUHS);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_PSRAMUHS);\n\n  psramuhsphy_open(psramuhs_run_clk);\n  hal_psramuhs_mc_init(psramuhs_run_clk);\n  psramuhs_start_clock();\n  hal_sys_timer_delay_us(3);\n  psramuhs_reset();\n  psramuhs_stop_clock();\n  psramuhs_set_timing(psramuhs_run_clk);\n  hal_psramuhs_refresh_enable();\n#if !defined(PSRAMUHS_DIG_LOOPBACK) && !defined(PSRAMUHS_ANA_LOOPBACK)\n  hal_psramuhs_snoop_disable();\n  psramuhsphy_calib(psramuhs_run_clk);\n  hal_psramuhs_snoop_enable();\n#endif\n  // hal_psramuhs_mc_entry_auto_lp();\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_psramuhs.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_PSRAMUHS_H__\n#define __HAL_PSRAMUHS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nvoid hal_psramuhs_sleep(void);\nvoid hal_psramuhs_wakeup(void);\nvoid hal_psramuhs_init(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_pwm.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_pwm.h\"\n#include \"cmsis.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include \"reg_pwm.h\"\n\n#define PWM_SLOW_CLOCK (CONFIG_SYSTICK_HZ)\n#define PWM_FAST_CLOCK (hal_cmu_get_crystal_freq() / 2)\n#define PWM_MAX_VALUE 0xFFFF\n\n// Max allowed PWM freqency error in percentage\n#define PWM_MAX_FREQ_ERR_PCT 5\n\nstatic struct PWM_T *const pwm[] = {\n    (struct PWM_T *)PWM_BASE,\n#ifdef CHIP_BEST2000\n    (struct PWM_T *)AON_PWM_BASE,\n#endif\n};\n\nstatic const enum HAL_CMU_MOD_ID_T pwm_o_mod[] = {\n    HAL_CMU_MOD_O_PWM0,\n#ifdef CHIP_BEST2000\n    HAL_CMU_AON_O_PWM0,\n#endif\n};\n\nstatic const enum HAL_CMU_MOD_ID_T pwm_p_mod[] = {\n    HAL_CMU_MOD_P_PWM,\n#ifdef CHIP_BEST2000\n    HAL_CMU_AON_A_PWM,\n#endif\n};\n\nint hal_pwm_enable(enum HAL_PWM_ID_T id, const struct HAL_PWM_CFG_T *cfg) {\n  uint32_t mod_freq;\n  uint32_t load;\n  uint32_t toggle;\n  uint32_t lock;\n  uint8_t ratio;\n  uint8_t index;\n  uint8_t offset;\n\n  if (id >= HAL_PWM_ID_QTY) {\n    return 1;\n  }\n  if (cfg->ratio > 100) {\n    return 2;\n  }\n\n  if (cfg->inv && (cfg->ratio == 0 || cfg->ratio == 100)) {\n    ratio = 100 - cfg->ratio;\n  } else {\n    ratio = cfg->ratio;\n  }\n\n#ifdef PWM_TRY_SLOW_CLOCK\n  mod_freq = PWM_SLOW_CLOCK;\n#else\n  if (cfg->sleep_on) {\n    mod_freq = PWM_SLOW_CLOCK;\n  } else {\n    mod_freq = PWM_FAST_CLOCK;\n  }\n#endif\n\n  if (ratio == 100) {\n    load = PWM_MAX_VALUE;\n    toggle = PWM_MAX_VALUE;\n  } else if (ratio == 0) {\n    load = 0;\n    toggle = 0;\n  } else {\n    load = mod_freq / cfg->freq;\n    toggle = load * ratio / 100;\n    if (toggle == 0) {\n      toggle = 1;\n    }\n#ifdef PWM_TRY_SLOW_CLOCK\n    // Check PWM frequency error in percentage\n    if (!cfg->sleep_on &&\n        ABS((int)(toggle * 100 - load * ratio)) > load * PWM_MAX_FREQ_ERR_PCT) {\n      mod_freq = PWM_FAST_CLOCK;\n      load = mod_freq / cfg->freq;\n      toggle = load * ratio / 100;\n    }\n#endif\n    load = PWM_MAX_VALUE + 1 - load;\n    toggle = PWM_MAX_VALUE - toggle;\n  }\n\n#ifdef CHIP_BEST2000\n  if (id < HAL_PWM2_ID_0) {\n    index = 0;\n    offset = id - HAL_PWM_ID_0;\n  } else {\n    index = 1;\n    offset = id - HAL_PWM2_ID_0;\n  }\n#else\n  index = 0;\n  offset = id - HAL_PWM_ID_0;\n#endif\n\n  if (hal_cmu_reset_get_status(pwm_o_mod[index] + offset) == HAL_CMU_RST_SET) {\n    hal_cmu_clock_enable(pwm_o_mod[index] + offset);\n    hal_cmu_clock_enable(pwm_p_mod[index]);\n    hal_cmu_reset_clear(pwm_o_mod[index] + offset);\n    hal_cmu_reset_clear(pwm_p_mod[index]);\n  } else {\n    pwm[index]->EN &= ~(1 << offset);\n  }\n\n  if (ratio == 0) {\n    // Output 0 when disabled\n    return 0;\n  }\n\n  hal_cmu_pwm_set_freq(id, mod_freq);\n\n  lock = int_lock();\n\n  if (offset == 0) {\n    pwm[index]->LOAD01 = SET_BITFIELD(pwm[index]->LOAD01, PWM_LOAD01_0, load);\n    pwm[index]->TOGGLE01 =\n        SET_BITFIELD(pwm[index]->TOGGLE01, PWM_TOGGLE01_0, toggle);\n  } else if (offset == 1) {\n    pwm[index]->LOAD01 = SET_BITFIELD(pwm[index]->LOAD01, PWM_LOAD01_1, load);\n    pwm[index]->TOGGLE01 =\n        SET_BITFIELD(pwm[index]->TOGGLE01, PWM_TOGGLE01_1, toggle);\n  } else if (offset == 2) {\n    pwm[index]->LOAD23 = SET_BITFIELD(pwm[index]->LOAD23, PWM_LOAD23_2, load);\n    pwm[index]->TOGGLE23 =\n        SET_BITFIELD(pwm[index]->TOGGLE23, PWM_TOGGLE23_2, toggle);\n  } else {\n    pwm[index]->LOAD23 = SET_BITFIELD(pwm[index]->LOAD23, PWM_LOAD23_3, load);\n    pwm[index]->TOGGLE23 =\n        SET_BITFIELD(pwm[index]->TOGGLE23, PWM_TOGGLE23_3, toggle);\n  }\n\n  if (cfg->inv) {\n    pwm[index]->INV |= (1 << offset);\n  } else {\n    pwm[index]->INV &= ~(1 << offset);\n  }\n\n  pwm[index]->EN |= (1 << offset);\n\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_pwm_disable(enum HAL_PWM_ID_T id) {\n  uint8_t index;\n  uint8_t offset;\n\n  if (id >= HAL_PWM_ID_QTY) {\n    return 1;\n  }\n\n#ifdef CHIP_BEST2000\n  if (id < HAL_PWM2_ID_0) {\n    index = 0;\n    offset = id - HAL_PWM_ID_0;\n  } else {\n    index = 1;\n    offset = id - HAL_PWM2_ID_0;\n  }\n#else\n  index = 0;\n  offset = id - HAL_PWM_ID_0;\n#endif\n\n  if (hal_cmu_reset_get_status(pwm_o_mod[index] + offset) == HAL_CMU_RST_SET) {\n    return 0;\n  }\n\n  pwm[index]->EN &= ~(1 << offset);\n  hal_cmu_reset_set(pwm_o_mod[index] + offset);\n  hal_cmu_clock_disable(pwm_o_mod[index] + offset);\n  if (pwm[index]->EN == 0) {\n    hal_cmu_reset_set(pwm_p_mod[index]);\n    hal_cmu_clock_disable(pwm_p_mod[index]);\n  }\n\n  return 0;\n}\n"
  },
  {
    "path": "platform/hal/hal_pwm.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_PWM_H__\n#define __HAL_PWM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"stdbool.h\"\n#include \"hal_cmu.h\"\n\nstruct HAL_PWM_CFG_T {\n    uint32_t freq;\n    uint8_t ratio;\n    bool inv;\n    bool sleep_on;\n};\n\nint hal_pwm_enable(enum HAL_PWM_ID_T id, const struct HAL_PWM_CFG_T *cfg);\n\nint hal_pwm_disable(enum HAL_PWM_ID_T id);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_rtc.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef CHIP_HAS_DIG_RTC\n\n#include \"hal_rtc.h\"\n#include \"plat_addr_map.h\"\n#include \"reg_rtc.h\"\n\nstatic HAL_RTC_IRQ_HANDLER_T irq_handler = NULL;\n\nstatic struct RTC_T *const rtc = (struct RTC_T *)RTC_BASE;\n\nstatic const unsigned char rtc_days_in_month[] = {31, 28, 31, 30, 31, 30,\n                                                  31, 31, 30, 31, 30, 31};\n\nstatic const unsigned short rtc_ydays[2][13] = {\n    /* Normal years */\n    {0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365},\n    /* Leap years */\n    {0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366}};\n\n#define LEAPS_THRU_END_OF(y) ((y) / 4 - (y) / 100 + (y) / 400)\n\nstatic inline int is_leap_year(unsigned int year) {\n  return (!(year % 4) && (year % 100)) || !(year % 400);\n}\n\n/*\n * The number of days in the month.\n */\nint rtc_month_days(unsigned int month, unsigned int year) {\n  return rtc_days_in_month[month] + (is_leap_year(year) && month == 1);\n}\n\n/*\n * The number of days since January 1. (0 to 365)\n */\nint rtc_year_days(unsigned int day, unsigned int month, unsigned int year) {\n  return rtc_ydays[is_leap_year(year)][month] + day - 1;\n}\n\n/*\n * Convert seconds since 01-01-1970 00:00:00 to Gregorian date.\n */\nvoid rtc_time_to_tm(unsigned long time, struct rtc_time *tm) {\n  unsigned int month, year;\n  int days;\n\n  days = time / 86400;\n  time -= (unsigned int)days * 86400;\n\n  /* day of the week, 1970-01-01 was a Thursday */\n  // tm->tm_wday = (days + 4) % 7;\n\n  year = 1970 + days / 365;\n  days -= (year - 1970) * 365 + LEAPS_THRU_END_OF(year - 1) -\n          LEAPS_THRU_END_OF(1970 - 1);\n  if (days < 0) {\n    year -= 1;\n    days += 365 + is_leap_year(year);\n  }\n  tm->tm_year = year - 1900;\n  // tm->tm_yday = days + 1;\n\n  for (month = 0; month < 11; month++) {\n    int newdays;\n\n    newdays = days - rtc_month_days(month, year);\n    if (newdays < 0)\n      break;\n    days = newdays;\n  }\n  tm->tm_mon = month;\n  tm->tm_mday = days + 1;\n\n  tm->tm_hour = time / 3600;\n  time -= tm->tm_hour * 3600;\n  tm->tm_min = time / 60;\n  tm->tm_sec = time - tm->tm_min * 60;\n}\n\n/*\n * Does the rtc_time represent a valid date/time?\n */\nint rtc_valid_tm(struct rtc_time *tm) {\n  if (tm->tm_year < 70 || ((unsigned)tm->tm_mon) >= 12 || tm->tm_mday < 1 ||\n      tm->tm_mday > rtc_month_days(tm->tm_mon, tm->tm_year + 1900) ||\n      ((unsigned)tm->tm_hour) >= 24 || ((unsigned)tm->tm_min) >= 60 ||\n      ((unsigned)tm->tm_sec) >= 60)\n    return -1;\n\n  return 0;\n}\n\n/* Converts Gregorian date to seconds since 1970-01-01 00:00:00.\n * Assumes input in normal date format, i.e. 1980-12-31 23:59:59\n * => year=1980, mon=12, day=31, hour=23, min=59, sec=59.\n *\n * [For the Julian calendar (which was used in Russia before 1917,\n * Britain & colonies before 1752, anywhere else before 1582,\n * and is still in use by some communities) leave out the\n * -year/100+year/400 terms, and add 10.]\n *\n * This algorithm was first published by Gauss (I think).\n *\n * WARNING: this function will overflow on 2106-02-07 06:28:16 on\n * machines where long is 32-bit! (However, as time_t is signed, we\n * will already get problems at other places on 2038-01-19 03:14:08)\n */\nunsigned long mktime(const unsigned int year0, const unsigned int mon0,\n                     const unsigned int day, const unsigned int hour,\n                     const unsigned int min, const unsigned int sec) {\n  unsigned int mon = mon0, year = year0;\n\n  /* 1..12 -> 11,12,1..10 */\n  if (0 >= (int)(mon -= 2)) {\n    mon += 12; /* Puts Feb last since it has leap day */\n    year -= 1;\n  }\n\n  return ((((unsigned long)(year / 4 - year / 100 + year / 400 +\n                            367 * mon / 12 + day) +\n            year * 365 - 719499) *\n               24 +\n           hour /* now have hours */\n           ) * 60 +\n          min /* now have minutes */\n          ) * 60 +\n         sec; /* finally seconds */\n}\n\n/*\n * Convert Gregorian date to seconds since 01-01-1970 00:00:00.\n */\nint rtc_tm_to_time(struct rtc_time *tm, unsigned long *time) {\n  *time = mktime(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday, tm->tm_hour,\n                 tm->tm_min, tm->tm_sec);\n  return 0;\n}\n\nint hal_rtc_get(struct rtc_time *time) {\n  unsigned long value;\n\n  if ((rtc->RTCCR & RTC_CR_EN) == 0) {\n    return 1;\n  }\n\n  value = rtc->RTCDR;\n  rtc_tm_to_time(time, &value);\n  return 0;\n}\n\nint hal_rtc_set(struct rtc_time *time) {\n  unsigned long value;\n\n  if (rtc_valid_tm(time) != 0) {\n    return 1;\n  }\n\n  if ((rtc->RTCCR & RTC_CR_EN) == 0) {\n    rtc->RTCCR = RTC_CR_EN;\n  }\n\n  rtc_tm_to_time(time, &value);\n  rtc->RTCLR = value;\n  return 0;\n}\n\nint hal_rtc_set_alarm(struct rtc_time *time) {\n  unsigned long value;\n\n  if (rtc_valid_tm(time) != 0) {\n    return 1;\n  }\n\n  if ((rtc->RTCCR & RTC_CR_EN) == 0) {\n    return 1;\n  }\n\n  rtc_tm_to_time(time, &value);\n  rtc->RTCMR = value;\n  rtc->RTCICR = RTC_BIT_AI;\n  rtc->RTCIMSC = RTC_BIT_AI;\n  return 0;\n}\n\nint hal_rtc_clear_alarm(void) {\n  rtc->RTCIMSC = 0;\n  rtc->RTCICR = RTC_BIT_AI;\n  return 0;\n}\n\nHAL_RTC_IRQ_HANDLER_T hal_rtc_set_irq_handler(HAL_RTC_IRQ_HANDLER_T handler) {\n  HAL_RTC_IRQ_HANDLER_T old_handler;\n\n  old_handler = irq_handler;\n  irq_handler = handler;\n  return old_handler;\n}\n\nvoid RTC_IRQHandler(void) {\n  uint32_t value;\n  struct rtc_time time;\n\n  if ((rtc->RTCMIS & RTC_BIT_AI) != 0) {\n    rtc->RTCICR = RTC_BIT_AI;\n\n    if (irq_handler != NULL) {\n      value = rtc->RTCDR;\n      rtc_time_to_tm(value, &time);\n      irq_handler(&time);\n    }\n  }\n}\n\n#endif // CHIP_HAS_DIG_RTC\n"
  },
  {
    "path": "platform/hal/hal_rtc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_RTC_H__\n#define __HAL_RTC_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nstruct rtc_time {\n        int tm_sec;\n        int tm_min;\n        int tm_hour;\n        int tm_mday;\n        int tm_mon;\n        int tm_year;\n};\n\ntypedef void (*HAL_RTC_IRQ_HANDLER_T)(struct rtc_time *time);\n\nint hal_rtc_get(struct rtc_time *time);\n\nint hal_rtc_set(struct rtc_time *time);\n\nint hal_rtc_set_alarm(struct rtc_time *time);\n\nint hal_rtc_clear_alarm(void);\n\nHAL_RTC_IRQ_HANDLER_T hal_rtc_set_irq_handler(HAL_RTC_IRQ_HANDLER_T handler);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_sec_eng.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n\n#ifdef SEC_ENG_BASE\n\n#include \"cmsis_nvic.h\"\n#include \"hal_cmu.h\"\n#include \"hal_dma.h\"\n#include \"hal_sec_eng.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"reg_dma.h\"\n#include \"reg_sec_eng.h\"\n\n#define SE_DMA_CHAN_NUM 2\n#define SE_DMA_DESC_NUM 4\n\n#define SE_DMA_MAX_DESC_XFER_SIZE (HAL_DMA_MAX_DESC_XFER_SIZE & ~(4 - 1))\n\n#define SE_DMA_RX_CHAN 0\n#define SE_DMA_TX_CHAN 1\n\n// Trigger DMA request when RX-FIFO count >= threshold\n#define SE_DMA_RX_FIFO_TRIG_LEVEL 8\n// Trigger DMA request when TX-FIFO count <= threshold\n#define SE_DMA_TX_FIFO_TRIG_LEVEL 8\n\nenum SE_ACC_CLK_T {\n  SE_ACC_CLK_DMA = (1 << 1),\n  SE_ACC_CLK_ACC_BUS = (1 << 2),\n  SE_ACC_CLK_CRYPT = (1 << 3),\n  SE_ACC_CLK_ECP = (1 << 4),\n  SE_ACC_CLK_HASH = (1 << 5),\n  SE_ACC_CLK_SCRATCH = (1 << 6),\n  SE_ACC_CLK_ZMODP = (1 << 7),\n  SE_ACC_CLK_MCT = (1 << 8),\n  SE_ACC_CLK_OTP = (1 << 9),\n  SE_ACC_CLK_EBG = (1 << 10),\n};\n\nenum SE_ACC_RST_T {\n  SE_ACC_RST_DMA = (1 << 1),\n  SE_ACC_RST_ACC_BUS = (1 << 2),\n  SE_ACC_RST_CRYPT = (1 << 3),\n  SE_ACC_RST_ECP = (1 << 4),\n  SE_ACC_RST_HASH = (1 << 5),\n  SE_ACC_RST_SCRATCH = (1 << 6),\n  SE_ACC_RST_ZMODP = (1 << 7),\n  SE_ACC_RST_MCT = (1 << 8),\n  SE_ACC_RST_OTP = (1 << 9),\n  SE_ACC_RST_EBG = (1 << 10),\n};\n\nenum SE_ACC_INT_T {\n  SE_ACC_INT_AES = (1 << 1),\n  SE_ACC_INT_DES = (1 << 2),\n  SE_ACC_INT_RC4 = (1 << 3),\n  SE_ACC_INT_OTP = (1 << 4),\n  SE_ACC_INT_ECP = (1 << 6),\n  SE_ACC_INT_MCT = (1 << 7),\n  SE_ACC_INT_HASH = (1 << 8),\n  SE_ACC_INT_ZMODP = (1 << 9),\n  SE_ACC_INT_SCRATCH = (1 << 10),\n};\n\nenum SE_DMA_PERIPH_T {\n  SE_DMA_PERIPH_TX = 0,\n  SE_DMA_PERIPH_RX,\n\n  SE_DMA_PERIPH_QTY,\n};\n\nenum SE_CRYPT_TYPE_T {\n  SE_CRYPT_NONE = 0,\n  SE_CRYPT_AES,\n  SE_CRYPT_DES,\n  SE_CRYPT_RC4,\n\n  SE_CRYPT_QTY,\n};\n\nenum SE_AES_KEY_LEN_T {\n  SE_AES_KEY_128 = 0,\n  SE_AES_KEY_192,\n  SE_AES_KEY_256,\n\n  SE_AES_KEY_LEN_QTY,\n};\n\nenum SE_HASH_OP_T {\n  SE_HASH_OP_INIT = 1,\n  SE_HASH_OP_UPDATE,\n  SE_HASH_OP_FINAL,\n};\n\nstatic struct DMA_T *const se_dma = (struct DMA_T *)SEDMA_BASE;\n\nstatic struct SE_ADEC_T *const se_adec = (struct SE_ADEC_T *)SE_ADEC_BASE;\nstatic struct SE_ACB_T *const se_acb = (struct SE_ACB_T *)SE_ACB_BASE;\nstatic struct SE_DMACFG_T *const se_dmacfg =\n    (struct SE_DMACFG_T *)SE_DMACFG_BASE;\nstatic struct SE_CRYPT_T *const se_crypt = (struct SE_CRYPT_T *)SE_CRYPT_BASE;\nPOSSIBLY_UNUSED static struct SE_HASH_T *const se_hash =\n    (struct SE_HASH_T *)SE_HASH_BASE;\nPOSSIBLY_UNUSED static struct SE_OTP_T *const se_otp =\n    (struct SE_OTP_T *)SE_OTP_BASE;\n\nstatic bool se_enabled;\n\nstatic HAL_SC_DONE_HANDLER_T se_done_hdlr;\n\nstatic uint32_t in_addr;\nstatic uint32_t total_in_len;\nstatic uint32_t cur_in_len;\n\nstatic uint32_t out_addr;\nstatic uint32_t total_out_len;\nstatic uint32_t cur_out_len;\n\nstatic struct HAL_DMA_DESC_T dma_desc[SE_DMA_CHAN_NUM][SE_DMA_DESC_NUM];\n\nstatic uint32_t se_dma_init_rx_desc(uint32_t out, uint32_t out_len,\n                                    uint32_t src, uint32_t ctrl);\nstatic uint32_t se_dma_init_tx_desc(uint32_t in, uint32_t in_len, uint32_t dst,\n                                    uint32_t ctrl);\n#ifdef SEC_ENG_HAS_HASH\nstatic uint32_t se_hash_get_digest_len(void);\nstatic void read_mreg(const volatile uint32_t *reg, void *mem, uint32_t len);\n#endif\n\nstatic void sec_eng_irq_handler(void) {\n  enum HAL_SE_DONE_ERR_T err;\n  uint32_t all_int;\n  uint32_t aes_int = 0;\n  uint32_t hash_int = 0;\n\n  all_int = se_adec->ADEC_INT;\n\n  if (all_int & SE_ACC_INT_AES) {\n    aes_int = se_crypt->AES_INTRPT;\n\n    // Clear IRQs\n    se_crypt->AES_INTRPT = aes_int;\n    se_adec->ADEC_INT = SE_ACC_INT_AES;\n\n    if (aes_int & (AES_INTRPT_ERROR1 | AES_INTRPT_ERROR2)) {\n      if (se_done_hdlr) {\n        if ((aes_int & (AES_INTRPT_ERROR1 | AES_INTRPT_ERROR2)) ==\n            (AES_INTRPT_ERROR1 | AES_INTRPT_ERROR2)) {\n          err = HAL_SE_DONE_ERR_ENG_ERR1_ERR2;\n        } else if (aes_int & AES_INTRPT_ERROR1) {\n          err = HAL_SE_DONE_ERR_ENG_ERR1;\n        } else {\n          err = HAL_SE_DONE_ERR_ENG_ERR2;\n        }\n        se_done_hdlr((void *)out_addr, 0, err);\n      }\n    }\n  }\n\n#ifdef SEC_ENG_HAS_HASH\n  if (all_int & SE_ACC_INT_HASH) {\n    hash_int = se_hash->HASH_STATUS;\n\n    // Clear IRQs\n    se_hash->HASH_STATUS = hash_int;\n    se_adec->ADEC_INT = SE_ACC_INT_HASH;\n\n    if (hash_int & HASH_STATUS_HASH_DONE) {\n      if (se_done_hdlr) {\n        enum HAL_SE_RET_T ret;\n        uint32_t digest[16];\n        uint32_t len;\n\n        ret = hal_se_hash_get_digest(&digest[0], sizeof(digest), &len);\n        if (ret == HAL_SE_OK) {\n          se_done_hdlr(&digest[0], len, HAL_SE_DONE_OK);\n        } else {\n          se_done_hdlr(NULL, 0, HAL_SE_DONE_OK);\n        }\n      }\n    }\n  }\n#endif\n\n  LOG_INFO(0, \"%s: all_int=0x%08X aes_int=0x%08X hash_int=%d\", __func__,\n           all_int, aes_int, hash_int);\n}\n\nstatic void sedma_irq_handler(void) {\n  uint8_t hwch;\n  uint32_t remains;\n  uint32_t len;\n  uint32_t ctrl;\n  bool tcint, errint;\n\n  for (hwch = 0; hwch < SE_DMA_CHAN_NUM; hwch++) {\n    if ((se_dma->INTSTAT & DMA_STAT_CHAN(hwch)) == 0) {\n      continue;\n    }\n\n    /* Check counter terminal status */\n    tcint = !!(se_dma->INTTCSTAT & DMA_STAT_CHAN(hwch));\n    /* Check error terminal status */\n    errint = !!(se_dma->INTERRSTAT & DMA_STAT_CHAN(hwch));\n\n    if (tcint || errint) {\n      if (tcint) {\n        /* Clear terminate counter Interrupt pending */\n        se_dma->INTTCCLR = DMA_STAT_CHAN(hwch);\n      }\n      if (errint) {\n        /* Clear error counter Interrupt pending */\n        se_dma->INTERRCLR = DMA_STAT_CHAN(hwch);\n      }\n\n      remains =\n          GET_BITFIELD(se_dma->CH[hwch].CONTROL, DMA_CONTROL_TRANSFERSIZE);\n      if (errint) {\n        se_dma->CH[hwch].CONFIG &= ~DMA_CONFIG_EN;\n        if (se_done_hdlr) {\n          se_done_hdlr((uint8_t *)out_addr, 0,\n                       (hwch == SE_DMA_RX_CHAN) ? HAL_SE_DONE_ERR_DMA_OUT\n                                                : HAL_SE_DONE_ERR_DMA_IN);\n        }\n      } else {\n        if (hwch == SE_DMA_RX_CHAN) {\n          if (cur_out_len < total_out_len) {\n            len = total_out_len - cur_out_len;\n            ctrl = se_dma->CH[hwch].CONTROL & ~DMA_CONTROL_TC_IRQ;\n            cur_out_len += se_dma_init_rx_desc(out_addr + cur_out_len, len,\n                                               se_dma->CH[hwch].SRCADDR, ctrl);\n            se_dma->CH[SE_DMA_RX_CHAN].CONFIG |= DMA_CONFIG_EN;\n          } else {\n            if (se_done_hdlr) {\n              if (remains) {\n                se_done_hdlr((void *)out_addr, cur_out_len - remains,\n                             HAL_SE_DONE_ERR_DMA_IN_REMAIN);\n              } else {\n                se_done_hdlr((void *)out_addr, cur_out_len, HAL_SE_DONE_OK);\n              }\n            }\n          }\n        } else {\n          if (cur_in_len < total_in_len) {\n            len = total_in_len - cur_in_len;\n            ctrl = se_dma->CH[hwch].CONTROL & ~DMA_CONTROL_TC_IRQ;\n            cur_in_len += se_dma_init_tx_desc(in_addr + cur_in_len, len,\n                                              se_dma->CH[hwch].DSTADDR, ctrl);\n            se_dma->CH[SE_DMA_TX_CHAN].CONFIG |= DMA_CONFIG_EN;\n          } else {\n            if (remains) {\n              if (se_done_hdlr) {\n                se_done_hdlr((void *)out_addr, 0,\n                             HAL_SE_DONE_ERR_DMA_IN_REMAIN);\n              }\n            }\n          }\n        }\n      }\n      LOG_INFO(0, \"%s: ch=%d tcint=%d errint=%d remains=%u\", __func__, hwch,\n               tcint, errint, remains);\n    }\n  }\n}\n\nstatic void se_dma_open(void) {\n  uint8_t i;\n\n  se_adec->ADEC_CTRL |= ADEC_CTRL_CLK_EN_15_0(SE_ACC_CLK_DMA) |\n                        ADEC_CTRL_RST_15_0(SE_ACC_RST_DMA);\n  se_adec->ADEC_CTRL &= ~ADEC_CTRL_RST_15_0(SE_ACC_RST_DMA);\n  se_adec->ADEC_INT_MSK = ~0UL;\n\n  se_dmacfg->DMA_CTRL = DMA_CTRL_RX_DMA_EN | DMA_CTRL_TX_DMA_EN;\n  se_dmacfg->DMA_RDL = SE_DMA_RX_FIFO_TRIG_LEVEL;\n  se_dmacfg->DMA_TDL = SE_DMA_TX_FIFO_TRIG_LEVEL;\n\n  /* Reset all channel configuration register */\n  for (i = 0; i < SE_DMA_CHAN_NUM; i++) {\n    se_dma->CH[i].CONFIG = 0;\n  }\n\n  /* Clear all DMA interrupt and error flag */\n  se_dma->INTTCCLR = ~0UL;\n  se_dma->INTERRCLR = ~0UL;\n\n  se_dma->DMACONFIG = (se_dma->DMACONFIG & ~(DMA_DMACONFIG_AHB1_BIGENDIAN |\n                                             DMA_DMACONFIG_AHB2_BIGENDIAN)) |\n                      DMA_DMACONFIG_EN;\n\n  NVIC_SetVector(SEDMA_IRQn, (uint32_t)sedma_irq_handler);\n  NVIC_SetPriority(SEDMA_IRQn, IRQ_PRIORITY_NORMAL);\n  NVIC_ClearPendingIRQ(SEDMA_IRQn);\n  NVIC_EnableIRQ(SEDMA_IRQn);\n}\n\nstatic void se_dma_cancel_rx(void) {\n  se_dma->CH[SE_DMA_RX_CHAN].CONFIG &= ~DMA_CONFIG_EN;\n}\n\nstatic void se_dma_cancel_tx(void) {\n  se_dma->CH[SE_DMA_TX_CHAN].CONFIG &= ~DMA_CONFIG_EN;\n}\n\nstatic void se_dma_close(void) {\n  NVIC_DisableIRQ(SEDMA_IRQn);\n  se_dma_cancel_rx();\n  se_dma_cancel_tx();\n  se_dma->DMACONFIG = 0;\n}\n\nstatic uint32_t se_dma_init_rx_desc(uint32_t out, uint32_t out_len,\n                                    uint32_t src, uint32_t ctrl) {\n  uint32_t len;\n  uint32_t cfg_len;\n  uint32_t desc_idx;\n  uint32_t i;\n\n  len = out_len;\n  if (len > SE_DMA_MAX_DESC_XFER_SIZE * 4) {\n    len = SE_DMA_MAX_DESC_XFER_SIZE * 4;\n  }\n  len &= ~(4 - 1);\n  ctrl = SET_BITFIELD(ctrl, DMA_CONTROL_TRANSFERSIZE, len / 4);\n  if (len >= out_len) {\n    // Always enable IRQ at the end of each xfer\n    ctrl |= DMA_CONTROL_TC_IRQ;\n  }\n  se_dma->CH[SE_DMA_RX_CHAN].CONTROL = ctrl;\n  se_dma->CH[SE_DMA_RX_CHAN].SRCADDR = src;\n  se_dma->CH[SE_DMA_RX_CHAN].DSTADDR = out;\n\n  if (len >= out_len) {\n    se_dma->CH[SE_DMA_RX_CHAN].LLI = 0;\n    return len;\n  }\n\n  cfg_len = len;\n  desc_idx = 0;\n  while (desc_idx < SE_DMA_DESC_NUM && cfg_len < out_len) {\n    len = out_len - cfg_len;\n    if (len > SE_DMA_MAX_DESC_XFER_SIZE * 4) {\n      len = SE_DMA_MAX_DESC_XFER_SIZE * 4;\n    }\n    len &= ~(4 - 1);\n    ctrl = SET_BITFIELD(ctrl, DMA_CONTROL_TRANSFERSIZE, len / 4);\n    dma_desc[SE_DMA_RX_CHAN][desc_idx].ctrl = ctrl;\n    dma_desc[SE_DMA_RX_CHAN][desc_idx].src = src;\n    dma_desc[SE_DMA_RX_CHAN][desc_idx].dst = out + cfg_len;\n    cfg_len += len;\n    desc_idx++;\n  }\n\n  // Always enable IRQ at the end of each xfer\n  dma_desc[SE_DMA_RX_CHAN][desc_idx - 1].ctrl |= DMA_CONTROL_TC_IRQ;\n\n  for (i = 0; i + 1 < desc_idx; i++) {\n    dma_desc[SE_DMA_RX_CHAN][i].lli =\n        (uint32_t)&dma_desc[SE_DMA_RX_CHAN][i + 1];\n  }\n  dma_desc[SE_DMA_RX_CHAN][desc_idx - 1].lli = 0;\n\n  se_dma->CH[SE_DMA_RX_CHAN].LLI = (uint32_t)&dma_desc[SE_DMA_RX_CHAN][0];\n\n  return cfg_len;\n}\n\nstatic void se_dma_enable_rx(void *out, uint32_t out_len) {\n  uint32_t ctrl;\n\n  ASSERT((out_len & (4 - 1)) == 0, \"%s: out_len must align to 4 bytes: %u\",\n         __func__, out_len);\n\n  out_addr = (uint32_t)out;\n  total_out_len = out_len;\n\n  /* Reset the Interrupt status */\n  se_dma->INTTCCLR = DMA_STAT_CHAN(SE_DMA_RX_CHAN);\n  se_dma->INTERRCLR = DMA_STAT_CHAN(SE_DMA_RX_CHAN);\n\n  ctrl = DMA_CONTROL_SBSIZE(HAL_DMA_BSIZE_8) |\n         DMA_CONTROL_DBSIZE(HAL_DMA_BSIZE_16) |\n         DMA_CONTROL_SWIDTH(HAL_DMA_WIDTH_WORD) |\n         DMA_CONTROL_DWIDTH(HAL_DMA_WIDTH_BYTE) | DMA_CONTROL_DI;\n\n  cur_out_len = se_dma_init_rx_desc((uint32_t)out, out_len,\n                                    (uint32_t)&se_dmacfg->DMA_RXFIFO, ctrl);\n\n  se_dma->CH[SE_DMA_RX_CHAN].CONFIG =\n      DMA_CONFIG_SRCPERIPH(SE_DMA_PERIPH_RX) |\n      DMA_CONFIG_TRANSFERTYPE(HAL_DMA_FLOW_P2M_DMA) | DMA_CONFIG_ERR_IRQMASK |\n      DMA_CONFIG_TC_IRQMASK;\n  se_dma->CH[SE_DMA_RX_CHAN].CONFIG |= DMA_CONFIG_EN;\n}\n\nstatic uint32_t se_dma_init_tx_desc(uint32_t in, uint32_t in_len, uint32_t dst,\n                                    uint32_t ctrl) {\n  uint32_t len;\n  uint32_t cfg_len;\n  uint32_t desc_idx;\n  uint32_t i;\n\n  len = in_len;\n  if (len > SE_DMA_MAX_DESC_XFER_SIZE) {\n    len = SE_DMA_MAX_DESC_XFER_SIZE;\n  }\n  ctrl = SET_BITFIELD(ctrl, DMA_CONTROL_TRANSFERSIZE, len);\n  se_dma->CH[SE_DMA_TX_CHAN].CONTROL = ctrl;\n  se_dma->CH[SE_DMA_TX_CHAN].SRCADDR = in;\n  se_dma->CH[SE_DMA_TX_CHAN].DSTADDR = dst;\n\n  if (len >= in_len) {\n    se_dma->CH[SE_DMA_TX_CHAN].LLI = 0;\n    return len;\n  }\n\n  cfg_len = len;\n  desc_idx = 0;\n  while (desc_idx < SE_DMA_DESC_NUM && cfg_len < in_len) {\n    len = in_len - cfg_len;\n    if (len > SE_DMA_MAX_DESC_XFER_SIZE) {\n      len = SE_DMA_MAX_DESC_XFER_SIZE;\n    }\n    ctrl = SET_BITFIELD(ctrl, DMA_CONTROL_TRANSFERSIZE, len);\n    dma_desc[SE_DMA_TX_CHAN][desc_idx].ctrl = ctrl;\n    dma_desc[SE_DMA_TX_CHAN][desc_idx].src = in + cfg_len;\n    dma_desc[SE_DMA_TX_CHAN][desc_idx].dst = dst;\n    cfg_len += len;\n    desc_idx++;\n  }\n\n  if (cfg_len < in_len) {\n    // Enable IRQ at the end of xfer\n    dma_desc[SE_DMA_TX_CHAN][desc_idx - 1].ctrl |= DMA_CONTROL_TC_IRQ;\n  }\n\n  for (i = 0; i + 1 < desc_idx; i++) {\n    dma_desc[SE_DMA_TX_CHAN][i].lli =\n        (uint32_t)&dma_desc[SE_DMA_TX_CHAN][i + 1];\n  }\n  dma_desc[SE_DMA_TX_CHAN][desc_idx - 1].lli = 0;\n\n  se_dma->CH[SE_DMA_TX_CHAN].LLI = (uint32_t)&dma_desc[SE_DMA_TX_CHAN][0];\n\n  return cfg_len;\n}\n\nstatic void se_dma_enable_tx(const void *in, uint32_t in_len) {\n  uint32_t ctrl;\n\n  if (in_len & (4 - 1)) {\n    in_len = (in_len + (4 - 1)) & ~(4 - 1);\n  }\n\n  in_addr = (uint32_t)in;\n  total_in_len = in_len;\n\n  /* Reset the Interrupt status */\n  se_dma->INTTCCLR = DMA_STAT_CHAN(SE_DMA_TX_CHAN);\n  se_dma->INTERRCLR = DMA_STAT_CHAN(SE_DMA_TX_CHAN);\n\n  ctrl = DMA_CONTROL_SBSIZE(HAL_DMA_BSIZE_16) |\n         DMA_CONTROL_DBSIZE(HAL_DMA_BSIZE_8) |\n         DMA_CONTROL_SWIDTH(HAL_DMA_WIDTH_BYTE) |\n         DMA_CONTROL_DWIDTH(HAL_DMA_WIDTH_WORD) | DMA_CONTROL_SI;\n\n  cur_in_len = se_dma_init_tx_desc((uint32_t)in, in_len,\n                                   (uint32_t)&se_dmacfg->DMA_TXFIFO, ctrl);\n\n  se_dma->CH[SE_DMA_TX_CHAN].CONFIG =\n      DMA_CONFIG_DSTPERIPH(SE_DMA_PERIPH_TX) |\n      DMA_CONFIG_TRANSFERTYPE(HAL_DMA_FLOW_M2P_DMA) | DMA_CONFIG_ERR_IRQMASK |\n      DMA_CONFIG_TC_IRQMASK;\n  se_dma->CH[SE_DMA_TX_CHAN].CONFIG |= DMA_CONFIG_EN;\n}\n\nenum HAL_SE_RET_T hal_se_open(void) {\n  if (se_enabled) {\n    return HAL_SE_ALREADY_OPENED;\n  }\n\n  se_enabled = true;\n\n  hal_cmu_clock_enable(HAL_CMU_MOD_H_SEC_ENG);\n  hal_cmu_clock_enable(HAL_CMU_MOD_P_SEC_ENG);\n  hal_cmu_reset_clear(HAL_CMU_MOD_H_SEC_ENG);\n  hal_cmu_reset_clear(HAL_CMU_MOD_P_SEC_ENG);\n\n  se_dma_open();\n\n  NVIC_SetVector(SEC_ENG_IRQn, (uint32_t)sec_eng_irq_handler);\n  NVIC_SetPriority(SEC_ENG_IRQn, IRQ_PRIORITY_NORMAL);\n  NVIC_ClearPendingIRQ(SEC_ENG_IRQn);\n  NVIC_EnableIRQ(SEC_ENG_IRQn);\n\n  return HAL_SE_OK;\n}\n\nenum HAL_SE_RET_T hal_se_close(void) {\n  if (!se_enabled) {\n    return HAL_SE_NOT_OPENED;\n  }\n\n  NVIC_DisableIRQ(SEC_ENG_IRQn);\n\n  se_dma_close();\n\n  se_adec->ADEC_INT_MSK = ~0UL;\n  se_adec->ADEC_CTRL = ~0UL;\n  se_adec->ADEC_CTRL2 = ~0UL;\n  se_adec->ADEC_CTRL = 0x0000FFFF;\n  se_adec->ADEC_CTRL2 = 0x0000FFFF;\n\n  hal_cmu_reset_set(HAL_CMU_MOD_H_SEC_ENG);\n  hal_cmu_reset_set(HAL_CMU_MOD_P_SEC_ENG);\n  hal_cmu_clock_disable(HAL_CMU_MOD_H_SEC_ENG);\n  hal_cmu_clock_disable(HAL_CMU_MOD_P_SEC_ENG);\n\n  se_enabled = false;\n\n  return HAL_SE_OK;\n}\n\nstatic void write_mreg(volatile uint32_t *reg, const void *mem, uint32_t len) {\n  const uint32_t *p32 = (const uint32_t *)mem;\n  uint32_t i;\n  bool aligned_state;\n\n  aligned_state = config_unaligned_access(true);\n\n  i = 0;\n  while (i < len) {\n    *reg++ = *p32++;\n    i += 4;\n  }\n\n  config_unaligned_access(aligned_state);\n}\n\nPOSSIBLY_UNUSED static void read_mreg(const volatile uint32_t *reg, void *mem,\n                                      uint32_t len) {\n  uint32_t *p32 = (uint32_t *)mem;\n  uint32_t i;\n  bool aligned_state;\n\n  aligned_state = config_unaligned_access(true);\n\n  i = 0;\n  while (i < len) {\n    *p32++ = *reg++;\n    i += 4;\n  }\n\n  config_unaligned_access(aligned_state);\n}\n\nenum HAL_SE_RET_T se_aes_crypt(const struct HAL_SE_AES_CFG_T *cfg,\n                               bool decrypt) {\n  enum SE_AES_KEY_LEN_T key_len_t;\n  uint8_t modular;\n\n  if (!se_enabled) {\n    return HAL_SE_NOT_OPENED;\n  }\n\n  if (cfg == NULL) {\n    return HAL_SE_CFG_NULL;\n  }\n  if (cfg->in == NULL) {\n    return HAL_SE_INPUT_NULL;\n  }\n  if (cfg->out == NULL) {\n    return HAL_SE_OUTPUT_NULL;\n  }\n  if (cfg->key == NULL) {\n    return HAL_SE_KEY_NULL;\n  }\n  if (cfg->mode >= HAL_SE_AES_MODE_QTY) {\n    return HAL_SE_BAD_AES_MODE;\n  }\n  if (cfg->mode != HAL_SE_AES_ECB && cfg->iv == NULL) {\n    return HAL_SE_IV_NULL;\n  }\n  if (cfg->in_len < 16) {\n    return HAL_SE_BAD_INPUT_LEN;\n  }\n  if (cfg->mode == HAL_SE_AES_ECB) {\n    if (cfg->in_len & (16 - 1)) {\n      return HAL_SE_BAD_INPUT_LEN;\n    }\n  } else {\n    // TODO: Support padding or CBC CTS mode?\n    if (cfg->in_len & (16 - 1)) {\n      return HAL_SE_BAD_INPUT_LEN;\n    }\n  }\n  if (cfg->mode == HAL_SE_AES_KEY_WRAP) {\n    if (cfg->in_len & (8 - 1)) {\n      return HAL_SE_BAD_INPUT_LEN;\n    }\n    if (decrypt) {\n      if (cfg->out_len + 8 != cfg->in_len) {\n        return HAL_SE_BAD_OUTPUT_LEN;\n      }\n    } else {\n      if (cfg->out_len != cfg->in_len + 8) {\n        return HAL_SE_BAD_OUTPUT_LEN;\n      }\n    }\n  } else {\n    // If padding enabled,\n    // 1) ENC: cfg->out_len == ((cfg->in_len + 16) & ~(16 - 1))\n    // 2) DEC: cfg->out_len == cfg->in_len\n    if (cfg->out_len != cfg->in_len) {\n      return HAL_SE_BAD_OUTPUT_LEN;\n    }\n  }\n  modular = 0;\n  if (cfg->mode == HAL_SE_AES_CTR) {\n    if (cfg->ctr_modular > 128) {\n      return HAL_SE_BAD_AES_MODULAR;\n    } else if (cfg->ctr_modular < 128) {\n      modular = cfg->ctr_modular;\n    }\n  }\n\n  if (cfg->key_len == 16) {\n    key_len_t = SE_AES_KEY_128;\n  } else if (cfg->key_len == 24) {\n    key_len_t = SE_AES_KEY_192;\n  } else if (cfg->key_len == 32) {\n    key_len_t = SE_AES_KEY_256;\n  } else {\n    return HAL_SE_BAD_KEY_LEN;\n  }\n\n  if (se_crypt->AES_STATUS & AES_STATUS_BUSY) {\n    return HAL_SE_ENG_BUSY;\n  }\n  if (se_dma->ENBLDCHNS &\n      (DMA_STAT_CHAN(SE_DMA_RX_CHAN) | DMA_STAT_CHAN(SE_DMA_TX_CHAN))) {\n    return HAL_SE_DMA_BUSY;\n  }\n\n  se_done_hdlr = cfg->done_hdlr;\n\n  se_adec->ADEC_CTRL |= ADEC_CTRL_CLK_EN_15_0(SE_ACC_CLK_CRYPT) |\n                        ADEC_CTRL_RST_15_0(SE_ACC_RST_CRYPT);\n  se_adec->ADEC_CTRL &= ~ADEC_CTRL_RST_15_0(SE_ACC_RST_CRYPT);\n  se_adec->ADEC_INT = SE_ACC_INT_AES;\n  se_adec->ADEC_INT_MSK &= ~SE_ACC_INT_AES;\n\n  se_dmacfg->DMA_FIFOCLR = DMA_FIFOCLR_RXFIFO_CLR | DMA_FIFOCLR_TXFIFO_CLR;\n\n  se_acb->ACB_CTRL &= ~(ACB_CTRL_WR_CB_CTRL | ACB_CTRL_RD_CB_CTRL);\n\n  se_crypt->ENGINE_SELECT = ENGINE_SELECT_SELECT(SE_CRYPT_AES);\n  // TODO: Set cts_mode, rkey\n  se_crypt->AES_CFG = AES_CFG_MODULAR(modular) | AES_CFG_MODE(cfg->mode) |\n                      AES_CFG_KEYLEN(key_len_t) |\n                      (decrypt ? AES_CFG_DECRYPT : 0);\n  se_crypt->AES_INTRPT = ~0UL;\n  se_crypt->AES_INTRPT_SRC_EN =\n      AES_INTRPT_SRC_EN_ERROR1 | AES_INTRPT_SRC_EN_ERROR2;\n  // se_crypt->AES_INTRPT_SRC_EN |= AES_INTRPT_SRC_EN_DONE;\n  // TODO: Set outputblock, resume\n  se_crypt->AES_CTRL |= AES_CTRL_RESET;\n  se_crypt->AES_CTRL &= ~AES_CTRL_RESET;\n\n  write_mreg(&se_crypt->KEY1[0], cfg->key, cfg->key_len);\n  if (cfg->mode != HAL_SE_AES_ECB) {\n    write_mreg(&se_crypt->IV[0], cfg->iv, 16);\n    if (cfg->mode == HAL_SE_AES_XTS) {\n      write_mreg(&se_crypt->KEY2[0], cfg->key2, cfg->key_len);\n    }\n  }\n\n  se_dma_enable_tx(cfg->in, cfg->in_len);\n  se_dma_enable_rx(cfg->out, cfg->out_len);\n\n  se_crypt->AES_STREAM_SIZE = cfg->in_len;\n  se_crypt->AES_CMD = AES_CMD_START;\n\n  return HAL_SE_OK;\n}\n\nenum HAL_SE_RET_T hal_se_aes_encrypt(const struct HAL_SE_AES_CFG_T *cfg) {\n  return se_aes_crypt(cfg, false);\n}\n\nenum HAL_SE_RET_T hal_se_aes_decrypt(const struct HAL_SE_AES_CFG_T *cfg) {\n  return se_aes_crypt(cfg, true);\n}\n\nint hal_se_aes_busy(void) {\n  if (se_enabled) {\n    if (se_crypt->AES_STATUS & AES_STATUS_BUSY) {\n      return true;\n    }\n    if (se_dma->ENBLDCHNS & DMA_STAT_CHAN(SE_DMA_RX_CHAN)) {\n      return true;\n    }\n  }\n  return false;\n}\n\nenum HAL_SE_RET_T hal_se_aes_reset(void) {\n  uint32_t lock;\n\n  if (!se_enabled) {\n    return HAL_SE_NOT_OPENED;\n  }\n\n  lock = int_lock();\n  se_dma_cancel_rx();\n  se_dma_cancel_tx();\n  /* Clear all DMA interrupt and error flag */\n  se_dma->INTTCCLR = ~0UL;\n  se_dma->INTERRCLR = ~0UL;\n\n  se_adec->ADEC_CTRL |= ADEC_CTRL_CLK_EN_15_0(SE_ACC_CLK_CRYPT) |\n                        ADEC_CTRL_RST_15_0(SE_ACC_RST_CRYPT);\n  se_crypt->AES_INTRPT = ~0UL;\n  se_adec->ADEC_INT = SE_ACC_INT_AES;\n  int_unlock(lock);\n\n  return HAL_SE_OK;\n}\n\n#ifdef SEC_ENG_HAS_HASH\nenum HAL_SE_RET_T se_hash_init(enum HAL_SE_HASH_MODE_T mode, const void *key,\n                               uint32_t key_len) {\n  uint32_t val;\n  bool hmac;\n\n  if (!se_enabled) {\n    return HAL_SE_NOT_OPENED;\n  }\n\n  if (mode >= HAL_SE_HASH_QTY) {\n    return HAL_SE_BAD_MODE;\n  }\n\n  hmac = (key_len > 0);\n  if (hmac) {\n    if (key == NULL) {\n      return HAL_SE_KEY_NULL;\n    }\n    if (mode == HAL_SE_HASH_SHA384 || mode == HAL_SE_HASH_SHA512) {\n      if (key_len > 128) {\n        return HAL_SE_BAD_KEY_LEN;\n      }\n    } else {\n      if (key_len > 64) {\n        return HAL_SE_BAD_KEY_LEN;\n      }\n    }\n  }\n\n  if (se_hash->HASH_STATUS & HASH_STATUS_HASH_BUSY) {\n    return HAL_SE_ENG_BUSY;\n  }\n  if (se_dma->ENBLDCHNS & DMA_STAT_CHAN(SE_DMA_TX_CHAN)) {\n    return HAL_SE_DMA_BUSY;\n  }\n\n  se_adec->ADEC_CTRL |= ADEC_CTRL_CLK_EN_15_0(SE_ACC_CLK_HASH) |\n                        ADEC_CTRL_RST_15_0(SE_ACC_RST_HASH);\n  se_adec->ADEC_CTRL &= ~ADEC_CTRL_RST_15_0(SE_ACC_RST_HASH);\n  se_adec->ADEC_INT = SE_ACC_INT_HASH;\n  se_adec->ADEC_INT_MSK |= SE_ACC_INT_HASH;\n\n  se_dmacfg->DMA_FIFOCLR = DMA_FIFOCLR_TXFIFO_CLR;\n\n  se_acb->ACB_CTRL |= ACB_CTRL_RD_CB_CTRL;\n\n  se_hash->HASH_CFG = HASH_CFG_ALG_SELECT(mode);\n  val = se_hash->HASH_CTRL;\n  // val |= HASH_CTRL_RESET;\n  se_hash->HASH_CTRL = val;\n  val &= ~(HASH_CTRL_RESET | HASH_CTRL_HW_PADDING);\n  se_hash->HASH_CTRL = val;\n  val = SET_BITFIELD(val, HASH_CTRL_HASH_OP_MODE, SE_HASH_OP_INIT);\n  se_hash->HASH_CTRL = val;\n  if (hmac) {\n    se_hash->HASH_CFG |= HASH_CFG_HASH_MODE;\n    write_mreg(&se_hash->HMAC_KEY[0], key, key_len);\n    se_hash->HMAC_KEY_LEN = key_len;\n  }\n  se_hash->HASH_CMD = HASH_CMD_START;\n\n  // HASH: 500ns; HMAC: 3000ns\n  while ((se_hash->HASH_STATUS & HASH_STATUS_HASH_DONE) == 0)\n    ;\n\n  return HAL_SE_OK;\n}\n\nenum HAL_SE_RET_T hal_se_hash_init(enum HAL_SE_HASH_MODE_T mode) {\n  return se_hash_init(mode, NULL, 0);\n}\n\nenum HAL_SE_RET_T se_hash_start(const struct HAL_SE_HASH_CFG_T *cfg,\n                                enum SE_HASH_OP_T op, uint64_t total_in_len) {\n  enum SE_HASH_OP_T prev_op;\n  uint32_t val;\n\n  if (!se_enabled) {\n    return HAL_SE_NOT_OPENED;\n  }\n\n  if (cfg == NULL) {\n    return HAL_SE_CFG_NULL;\n  }\n  if (op == SE_HASH_OP_FINAL) {\n    if (cfg->in == NULL && cfg->in_len) {\n      return HAL_SE_INPUT_NULL;\n    }\n  } else {\n    if (cfg->in == NULL) {\n      return HAL_SE_INPUT_NULL;\n    }\n    if (cfg->in_len == 0) {\n      return HAL_SE_BAD_INPUT_LEN;\n    }\n    if (cfg->in_len & (64 - 1)) {\n      return HAL_SE_BAD_INPUT_LEN;\n    }\n  }\n\n  prev_op = GET_BITFIELD(se_hash->HASH_CTRL, HASH_CTRL_HASH_OP_MODE);\n  if (prev_op != SE_HASH_OP_INIT && prev_op != SE_HASH_OP_UPDATE) {\n    return HAL_SE_BAD_OP;\n  }\n  if (se_hash->HASH_STATUS & HASH_STATUS_HASH_BUSY) {\n    return HAL_SE_ENG_BUSY;\n  }\n  if (se_dma->ENBLDCHNS & DMA_STAT_CHAN(SE_DMA_TX_CHAN)) {\n    return HAL_SE_DMA_BUSY;\n  }\n\n  se_done_hdlr = cfg->done_hdlr;\n\n  se_hash->HASH_STATUS = ~0UL;\n  se_adec->ADEC_INT = SE_ACC_INT_HASH;\n  se_adec->ADEC_INT_MSK &= ~SE_ACC_INT_HASH;\n\n  se_dmacfg->DMA_FIFOCLR = DMA_FIFOCLR_TXFIFO_CLR;\n\n  if (cfg->in_len) {\n    se_dma_enable_tx(cfg->in, cfg->in_len);\n  }\n\n  val = se_hash->HASH_CTRL;\n  val = SET_BITFIELD(val, HASH_CTRL_HASH_OP_MODE, op);\n  if (op == SE_HASH_OP_UPDATE) {\n    val &= ~HASH_CTRL_HW_PADDING;\n  } else {\n    val |= HASH_CTRL_HW_PADDING;\n  }\n  se_hash->HASH_CTRL = val;\n  if (op == SE_HASH_OP_FINAL) {\n    se_hash->HASH_MSG_SIZE_L = (uint32_t)total_in_len;\n    se_hash->HASH_MSG_SIZE_H = (uint32_t)(total_in_len >> 32);\n  }\n  se_hash->HASH_SEG_SIZE = cfg->in_len;\n  se_hash->HASH_CMD = HASH_CMD_START;\n\n  return HAL_SE_OK;\n}\n\nenum HAL_SE_RET_T hal_se_hash_update(const struct HAL_SE_HASH_CFG_T *cfg) {\n  return se_hash_start(cfg, SE_HASH_OP_UPDATE, 0);\n}\n\nenum HAL_SE_RET_T hal_se_hash_final(const struct HAL_SE_HASH_CFG_T *cfg,\n                                    uint64_t total_in_len) {\n  return se_hash_start(cfg, SE_HASH_OP_FINAL, total_in_len);\n}\n\nenum HAL_SE_RET_T hal_se_hash(enum HAL_SE_HASH_MODE_T mode,\n                              const struct HAL_SE_HASH_CFG_T *cfg) {\n  enum HAL_SE_RET_T ret;\n\n  ret = hal_se_hash_init(mode);\n  if (ret != HAL_SE_OK) {\n    return ret;\n  }\n  ret = hal_se_hash_final(cfg, cfg->in_len);\n  return ret;\n}\n\nstatic uint32_t se_hash_get_digest_len(void) {\n  enum HAL_SE_HASH_MODE_T mode;\n  uint32_t max_len;\n\n  mode = GET_BITFIELD(se_hash->HASH_CFG, HASH_CFG_ALG_SELECT);\n  if (mode == HAL_SE_HASH_MD5) {\n    max_len = 16;\n  } else if (mode == HAL_SE_HASH_SHA1) {\n    max_len = 20;\n  } else if (mode == HAL_SE_HASH_SHA224) {\n    max_len = 28;\n  } else if (mode == HAL_SE_HASH_SHA256) {\n    max_len = 32;\n  } else if (mode == HAL_SE_HASH_SHA384) {\n    max_len = 48;\n  } else {\n    max_len = 64;\n  }\n\n  return max_len;\n}\n\nenum HAL_SE_RET_T hal_se_hash_get_digest(void *out, uint32_t out_len,\n                                         uint32_t *real_len) {\n  enum SE_HASH_OP_T prev_op;\n  uint32_t max_len;\n  int i;\n\n  if (!se_enabled) {\n    return HAL_SE_NOT_OPENED;\n  }\n\n  if (out == NULL) {\n    return HAL_SE_OUTPUT_NULL;\n  }\n  if (out_len & (4 - 1)) {\n    return HAL_SE_BAD_OUTPUT_LEN;\n  }\n\n  prev_op = GET_BITFIELD(se_hash->HASH_CTRL, HASH_CTRL_HASH_OP_MODE);\n  if (prev_op != SE_HASH_OP_FINAL) {\n    return HAL_SE_BAD_OP;\n  }\n  if (se_hash->HASH_STATUS & HASH_STATUS_HASH_BUSY) {\n    return HAL_SE_ENG_BUSY;\n  }\n  if (se_dma->ENBLDCHNS & DMA_STAT_CHAN(SE_DMA_TX_CHAN)) {\n    return HAL_SE_DMA_BUSY;\n  }\n\n  max_len = se_hash_get_digest_len();\n  if (out_len > max_len) {\n    out_len = max_len;\n  }\n  if (real_len) {\n    *real_len = out_len;\n  }\n  if (out_len > 32) {\n    for (i = 0; i < out_len / 8; i++) {\n      read_mreg(&se_hash->HASH_CTX_H[i], out, 4);\n      read_mreg(&se_hash->HASH_CTX[i], out + 4, 4);\n      out += 8;\n    }\n  } else {\n    read_mreg(&se_hash->HASH_CTX[0], out, out_len);\n  }\n\n  return HAL_SE_OK;\n}\n\nint hal_se_hash_busy(void) {\n  if (se_enabled) {\n    if (se_hash->HASH_STATUS & HASH_STATUS_HASH_BUSY) {\n      return true;\n    }\n    if (se_dma->ENBLDCHNS & DMA_STAT_CHAN(SE_DMA_TX_CHAN)) {\n      return true;\n    }\n  }\n  return false;\n}\n\nenum HAL_SE_RET_T hal_se_hash_reset(void) {\n  uint32_t lock;\n\n  if (!se_enabled) {\n    return HAL_SE_NOT_OPENED;\n  }\n\n  lock = int_lock();\n  se_dma_cancel_tx();\n  /* Clear all DMA interrupt and error flag */\n  se_dma->INTTCCLR = ~0UL;\n  se_dma->INTERRCLR = ~0UL;\n\n  se_adec->ADEC_CTRL |= ADEC_CTRL_CLK_EN_15_0(SE_ACC_CLK_HASH) |\n                        ADEC_CTRL_RST_15_0(SE_ACC_RST_HASH);\n  se_hash->HASH_STATUS = ~0UL;\n  se_adec->ADEC_INT = SE_ACC_INT_HASH;\n  int_unlock(lock);\n\n  return HAL_SE_OK;\n}\n\nenum HAL_SE_RET_T hal_se_hmac_init(enum HAL_SE_HASH_MODE_T mode,\n                                   const void *key, uint32_t key_len) {\n  if (key_len == 0) {\n    return HAL_SE_BAD_KEY_LEN;\n  }\n\n  return se_hash_init(mode, key, key_len);\n}\n\nenum HAL_SE_RET_T hal_se_hmac_update(const struct HAL_SE_HASH_CFG_T *cfg)\n    __attribute__((alias(\"hal_se_hash_update\")));\n\nenum HAL_SE_RET_T hal_se_hmac_final(const struct HAL_SE_HASH_CFG_T *cfg,\n                                    uint64_t total_in_len)\n    __attribute__((alias(\"hal_se_hash_final\")));\n\nenum HAL_SE_RET_T hal_se_hmac(enum HAL_SE_HASH_MODE_T mode, const void *key,\n                              uint32_t key_len,\n                              const struct HAL_SE_HASH_CFG_T *cfg) {\n  enum HAL_SE_RET_T ret;\n\n  ret = hal_se_hmac_init(mode, key, key_len);\n  if (ret != HAL_SE_OK) {\n    return ret;\n  }\n  ret = hal_se_hmac_final(cfg, cfg->in_len);\n  return ret;\n}\n\nenum HAL_SE_RET_T hal_se_hmac_get_digest(void *out, uint32_t out_len,\n                                         uint32_t *real_len)\n    __attribute__((alias(\"hal_se_hash_get_digest\")));\n\nint hal_se_hmac_busy(void) __attribute__((alias(\"hal_se_hash_busy\")));\n\nenum HAL_SE_RET_T hal_se_hmac_reset(void)\n    __attribute__((alias(\"hal_se_hash_reset\")));\n\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_sec_eng.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SEC_ENG_H__\n#define __HAL_SEC_ENG_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"stdbool.h\"\n#include \"stdint.h\"\n#include \"hal_dma.h\"\n\nenum HAL_SE_RET_T {\n    HAL_SE_OK,\n    HAL_SE_ERR,\n    HAL_SE_ALREADY_OPENED,\n    HAL_SE_NOT_OPENED,\n    HAL_SE_ENG_BUSY,\n    HAL_SE_DMA_BUSY,\n    HAL_SE_CFG_NULL,\n    HAL_SE_INPUT_NULL,\n    HAL_SE_OUTPUT_NULL,\n    HAL_SE_KEY_NULL,\n    HAL_SE_IV_NULL,\n    HAL_SE_KEY2_NULL,\n    HAL_SE_BAD_INPUT_LEN,\n    HAL_SE_BAD_OUTPUT_LEN,\n    HAL_SE_BAD_KEY_LEN,\n    HAL_SE_BAD_AES_MODE,\n    HAL_SE_BAD_AES_MODULAR,\n    HAL_SE_BAD_MODE,\n    HAL_SE_BAD_OP,\n};\n\nenum HAL_SE_AES_MODE_T {\n    HAL_SE_AES_ECB                      = 0,\n    HAL_SE_AES_CBC                      = 1,\n    HAL_SE_AES_CTR                      = 2,\n    HAL_SE_AES_XTS                      = 3,\n    HAL_SE_AES_KEY_WRAP                 = 4,\n\n    HAL_SE_AES_MODE_QTY,\n};\n\nenum HAL_SE_DONE_ERR_T {\n    HAL_SE_DONE_OK                      = 0,\n    HAL_SE_DONE_ERR_DMA_IN,\n    HAL_SE_DONE_ERR_DMA_OUT,\n    HAL_SE_DONE_ERR_DMA_IN_REMAIN,\n    HAL_SE_DONE_ERR_DMA_OUT_REMAIN,\n    HAL_SE_DONE_ERR_ENG_ERR1,\n    HAL_SE_DONE_ERR_ENG_ERR2,\n    HAL_SE_DONE_ERR_ENG_ERR1_ERR2,\n};\n\nenum HAL_SE_HASH_MODE_T {\n    HAL_SE_HASH_SHA1                    = 0,\n    HAL_SE_HASH_SHA256,\n    HAL_SE_HASH_SHA224,\n    HAL_SE_HASH_MD5,\n    HAL_SE_HASH_SHA512,\n    HAL_SE_HASH_SHA384,\n\n    HAL_SE_HASH_QTY,\n};\n\ntypedef void (*HAL_SC_DONE_HANDLER_T)(void *buf, uint32_t len, enum HAL_SE_DONE_ERR_T err);\n\nstruct HAL_SE_AES_CFG_T {\n    enum HAL_SE_AES_MODE_T mode;\n    const void *key;\n    uint16_t key_len;\n    uint8_t ctr_modular;\n    const void *key2;\n    const void *iv;\n    const void *in;\n    uint32_t in_len;\n    void *out;\n    uint32_t out_len;\n    HAL_SC_DONE_HANDLER_T done_hdlr;\n};\n\nstruct HAL_SE_HASH_CFG_T {\n    const void *in;\n    uint32_t in_len;\n    HAL_SC_DONE_HANDLER_T done_hdlr;\n};\n\nenum HAL_SE_RET_T hal_se_open(void);\n\nenum HAL_SE_RET_T hal_se_close(void);\n\nenum HAL_SE_RET_T hal_se_aes_encrypt(const struct HAL_SE_AES_CFG_T *cfg);\n\nenum HAL_SE_RET_T hal_se_aes_decrypt(const struct HAL_SE_AES_CFG_T *cfg);\n\nint hal_se_aes_busy(void);\n\nenum HAL_SE_RET_T hal_se_aes_reset(void);\n\nenum HAL_SE_RET_T hal_se_hash_init(enum HAL_SE_HASH_MODE_T mode);\n\nenum HAL_SE_RET_T hal_se_hash_update(const struct HAL_SE_HASH_CFG_T *cfg);\n\nenum HAL_SE_RET_T hal_se_hash_final(const struct HAL_SE_HASH_CFG_T *cfg, uint64_t total_in_len);\n\nenum HAL_SE_RET_T hal_se_hash(enum HAL_SE_HASH_MODE_T mode, const struct HAL_SE_HASH_CFG_T *cfg);\n\nenum HAL_SE_RET_T hal_se_hash_get_digest(void *out, uint32_t out_len, uint32_t *real_len);\n\nint hal_se_hash_busy(void);\n\nenum HAL_SE_RET_T hal_se_hash_reset(void);\n\nenum HAL_SE_RET_T hal_se_hmac_init(enum HAL_SE_HASH_MODE_T mode, const void *key, uint32_t key_len);\n\nenum HAL_SE_RET_T hal_se_hmac_update(const struct HAL_SE_HASH_CFG_T *cfg);\n\nenum HAL_SE_RET_T hal_se_hmac_final(const struct HAL_SE_HASH_CFG_T *cfg, uint64_t total_in_len);\n\nenum HAL_SE_RET_T hal_se_hmac(enum HAL_SE_HASH_MODE_T mode, const void *key, uint32_t key_len, const struct HAL_SE_HASH_CFG_T *cfg);\n\nenum HAL_SE_RET_T hal_se_hmac_get_digest(void *out, uint32_t out_len, uint32_t *real_len);\n\nint hal_se_hmac_busy(void);\n\nenum HAL_SE_RET_T hal_se_hmac_reset(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_sensor_eng.h",
    "content": "#ifndef __HAL_SENSOR_HUB_H__\n#define __HAL_SENSOR_HUB_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_dma.h\"\n#include \"hal_gpio.h\"\n\nenum HAL_SENSOR_ENGINE_ID_T {\n    HAL_SENSOR_ENGINE_ID_0 = 0,\n    HAL_SENSOR_ENGINE_ID_1,\n    HAL_SENSOR_ENGINE_ID_2,\n    HAL_SENSOR_ENGINE_ID_3,\n\n    HAL_SENSOR_ENGINE_ID_QTY,\n};\n\nenum HAL_SENSOR_ENGINE_TRIGGER_T {\n    HAL_SENSOR_ENGINE_TRIGGER_TIMER = 0,\n    HAL_SENSOR_ENGINE_TRIGGER_GPIO,\n\n    HAL_SENSOR_ENGINE_TRIGGER_QTY,\n};\n\nenum HAL_SENSOR_ENGINE_DEVICE_T {\n    HAL_SENSOR_ENGINE_DEVICE_I2C0 = 0,\n    HAL_SENSOR_ENGINE_DEVICE_I2C1,\n    HAL_SENSOR_ENGINE_DEVICE_SPI0 = 4,\n    HAL_SENSOR_ENGINE_DEVICE_SPI1,\n    HAL_SENSOR_ENGINE_DEVICE_SPI2,\n};\n\ntypedef void (*HAL_SENSOR_ENG_HANDLER_T)(enum HAL_SENSOR_ENGINE_ID_T id, enum HAL_SENSOR_ENGINE_DEVICE_T device, const uint8_t *buf, uint32_t len);\n\nstruct HAL_SENSOR_ENGINE_CFG_T {\n    enum HAL_SENSOR_ENGINE_ID_T id;\n    enum HAL_SENSOR_ENGINE_DEVICE_T device;\n    enum HAL_SENSOR_ENGINE_TRIGGER_T trigger_type;\n    enum HAL_GPIO_PIN_T trigger_gpio;\n    uint32_t period_us;\n    struct HAL_DMA_CH_CFG_T *tx_dma_cfg;\n    struct HAL_DMA_CH_CFG_T *rx_dma_cfg;\n    uint16_t device_address;\n    uint16_t rx_burst_len;\n    uint8_t rx_burst_cnt;\n    uint8_t data_to_vad;\n    HAL_SENSOR_ENG_HANDLER_T handler;\n};\n\nint hal_sensor_engine_open(const struct HAL_SENSOR_ENGINE_CFG_T *cfg);\nint hal_sensor_engine_close(enum HAL_SENSOR_ENGINE_ID_T id);\n\nvoid hal_sensor_process_rx_buffer(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n\n"
  },
  {
    "path": "platform/hal/hal_slave_i2c.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n\n#ifdef I2C_SLAVE_BASE\n\n#include \"hal_slave_i2c.h\"\n#include \"reg_slave_i2c.h\"\n\nstatic struct SLAVE_I2C_T *const slave_i2c =\n    (struct SLAVE_I2C_T *)I2C_SLAVE_BASE;\n\nvoid hal_slave_i2c_enable(void) { slave_i2c->EN |= I2C_EN; }\n\nvoid hal_slave_i2c_disable(void) { slave_i2c->EN &= ~I2C_EN; }\n\nuint32_t hal_slave_i2c_get_filter_len(void) {\n  return GET_BITFIELD(slave_i2c->EN, R_FILTERLEN);\n}\n\nint hal_slave_i2c_set_filter_len(uint32_t len) {\n  if (len > (W_FILTERLEN_MASK >> W_FILTERLEN_SHIFT)) {\n    return 1;\n  }\n  slave_i2c->EN = SET_BITFIELD(slave_i2c->EN, W_FILTERLEN, len);\n  return 0;\n}\n\nuint32_t hal_slave_i2c_get_dev_id(void) {\n  return GET_BITFIELD(slave_i2c->ID, DEV_ID);\n}\n\nint hal_slave_i2c_set_dev_id(uint32_t dev_id) {\n  if (dev_id > 0x7F) {\n    return 1;\n  }\n  slave_i2c->ID = SET_BITFIELD(slave_i2c->ID, DEV_ID, dev_id);\n  return 0;\n}\n\nvoid hal_slave_i2c_bypass_timeout(void) { slave_i2c->TBP |= TIMEOUT_BYPASS; }\n\nvoid hal_slave_i2c_restore_timeout(void) { slave_i2c->TBP &= ~TIMEOUT_BYPASS; }\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_slave_i2c.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SLAVE_I2C_H__\n#define __HAL_SLAVE_I2C_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nvoid hal_slave_i2c_enable(void);\n\nvoid hal_slave_i2c_disable(void);\n\nuint32_t hal_slave_i2c_get_filter_len(void);\n\nint hal_slave_i2c_set_filter_len(uint32_t len);\n\nuint32_t hal_slave_i2c_get_dev_id(void);\n\nint hal_slave_i2c_set_dev_id(uint32_t dev_id);\n\nvoid hal_slave_i2c_bypass_timeout(void);\n\nvoid hal_slave_i2c_restore_timeout(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_sleep.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_sleep.h\"\n#include \"analog.h\"\n#include \"cmsis.h\"\n#include \"hal_cmu.h\"\n#include \"hal_dma.h\"\n#include \"hal_gpadc.h\"\n#include \"hal_location.h\"\n#include \"hal_norflash.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n\n// static uint8_t SRAM_STACK_LOC sleep_stack[128];\n\nstatic HAL_SLEEP_HOOK_HANDLER sleep_hook_handler[HAL_SLEEP_HOOK_USER_QTY];\nstatic HAL_DEEP_SLEEP_HOOK_HANDLER\n    deep_sleep_hook_handler[HAL_DEEP_SLEEP_HOOK_USER_QTY];\n\nstatic uint32_t cpu_wake_lock_map;\nstatic uint32_t sys_wake_lock_map;\nstatic uint32_t chip_wake_lock_map;\n\n#ifdef SLEEP_STATS_TRACE\nstatic uint32_t stats_trace_interval;\nstatic uint32_t stats_trace_time;\n#endif\nstatic uint32_t stats_interval;\nstatic uint32_t stats_start_time;\nstatic uint32_t light_sleep_time;\nstatic uint32_t sys_deep_sleep_time;\nstatic uint32_t chip_deep_sleep_time;\nstatic bool stats_started;\nstatic bool stats_valid;\nstatic uint8_t light_sleep_ratio;\nstatic uint8_t sys_deep_sleep_ratio;\nstatic uint8_t chip_deep_sleep_ratio;\n\nvoid hal_sleep_start_stats(uint32_t stats_interval_ms,\n                           uint32_t trace_interval_ms) {\n  uint32_t lock;\n\n  lock = int_lock();\n  if (stats_interval_ms) {\n    stats_interval = MS_TO_TICKS(stats_interval_ms);\n    stats_start_time = hal_sys_timer_get();\n    light_sleep_time = 0;\n    sys_deep_sleep_time = 0;\n    chip_deep_sleep_time = 0;\n    stats_valid = false;\n    stats_started = true;\n  } else {\n    stats_started = false;\n  }\n  int_unlock(lock);\n\n#ifdef SLEEP_STATS_TRACE\n  if (stats_interval_ms && trace_interval_ms) {\n    stats_trace_interval = MS_TO_TICKS(trace_interval_ms);\n  } else {\n    stats_trace_interval = 0;\n  }\n#endif\n}\n\nint hal_sleep_get_stats(struct CPU_USAGE_T *usage) {\n  int ret;\n  uint32_t lock;\n\n  lock = int_lock();\n  if (stats_valid) {\n    usage->light_sleep = light_sleep_ratio;\n    usage->sys_deep_sleep = sys_deep_sleep_ratio;\n    usage->chip_deep_sleep = chip_deep_sleep_ratio;\n    usage->busy = 100 - (light_sleep_ratio + sys_deep_sleep_ratio +\n                         chip_deep_sleep_ratio);\n    ret = 0;\n  } else {\n    ret = 1;\n  }\n  int_unlock(lock);\n\n  return ret;\n}\n\nstatic int hal_sleep_cpu_busy(void) {\n  if (cpu_wake_lock_map || hal_cmu_lpu_busy()) {\n    return 1;\n  } else {\n    return 0;\n  }\n}\n\nstatic int hal_sleep_sys_busy(void) {\n  if (sys_wake_lock_map || hal_sysfreq_busy() || hal_dma_busy()) {\n    return 1;\n  } else {\n    return 0;\n  }\n}\n\nint hal_sleep_set_sleep_hook(enum HAL_SLEEP_HOOK_USER_T user,\n                             HAL_SLEEP_HOOK_HANDLER handler) {\n  if (user >= ARRAY_SIZE(sleep_hook_handler)) {\n    return 1;\n  }\n  sleep_hook_handler[user] = handler;\n  return 0;\n}\n\nstatic int SRAM_TEXT_LOC hal_sleep_exec_sleep_hook(void) {\n  int i;\n  int ret;\n\n  for (i = 0; i < ARRAY_SIZE(sleep_hook_handler); i++) {\n    if (sleep_hook_handler[i]) {\n      ret = sleep_hook_handler[i]();\n      if (ret) {\n        return ret;\n      }\n    }\n  }\n\n  return 0;\n}\n\nint hal_sleep_set_deep_sleep_hook(enum HAL_DEEP_SLEEP_HOOK_USER_T user,\n                                  HAL_DEEP_SLEEP_HOOK_HANDLER handler) {\n  if (user >= ARRAY_SIZE(deep_sleep_hook_handler)) {\n    return 1;\n  }\n  deep_sleep_hook_handler[user] = handler;\n  return 0;\n}\n\nstatic int SRAM_TEXT_LOC hal_sleep_exec_deep_sleep_hook(void) {\n  int i;\n  int ret;\n\n  for (i = 0; i < ARRAY_SIZE(deep_sleep_hook_handler); i++) {\n    if (deep_sleep_hook_handler[i]) {\n      ret = deep_sleep_hook_handler[i]();\n      if (ret) {\n        return ret;\n      }\n    }\n  }\n\n  return 0;\n}\n\nint SRAM_TEXT_LOC hal_sleep_irq_pending(void) {\n#if defined(__GIC_PRESENT) && (__GIC_PRESENT)\n  int i;\n\n  for (i = 0; i < (USER_IRQn_QTY + 31) / 32; i++) {\n    if (GICDistributor->ICPENDR[i] & GICDistributor->ISENABLER[i]) {\n      return 1;\n    }\n  }\n#else\n#if 0\n    int i;\n\n    for (i = 0; i < (USER_IRQn_QTY + 31) / 32; i++) {\n        if (NVIC->ICPR[i] & NVIC->ISER[i]) {\n            return 1;\n        }\n    }\n#else\n  // If there is any pending and enabled exception (including sysTick)\n  if (SCB->ICSR & SCB_ICSR_VECTPENDING_Msk) {\n    return 1;\n  }\n#endif\n#endif\n\n  return 0;\n}\n\nint SRAM_TEXT_LOC hal_sleep_specific_irq_pending(const uint32_t *irq,\n                                                 uint32_t cnt) {\n  int i;\n  uint32_t check_cnt;\n\n  check_cnt = (USER_IRQn_QTY + 31) / 32;\n  if (check_cnt > cnt) {\n    check_cnt = cnt;\n  }\n\n#if defined(__GIC_PRESENT) && (__GIC_PRESENT)\n  for (i = 0; i < check_cnt; i++) {\n    if (GICDistributor->ICPENDR[i] & GICDistributor->ISENABLER[i] & irq[i]) {\n      return 1;\n    }\n  }\n#else\n  for (i = 0; i < check_cnt; i++) {\n    if (NVIC->ICPR[i] & NVIC->ISER[i] & irq[i]) {\n      return 1;\n    }\n  }\n#endif\n\n  return 0;\n}\n\nvoid WEAK bt_drv_sleep(void) {}\n\nvoid WEAK bt_drv_wakeup(void) {}\n\nstatic enum HAL_SLEEP_STATUS_T SRAM_TEXT_LOC hal_sleep_lowpower_mode(void) {\n  enum HAL_SLEEP_STATUS_T ret;\n  enum HAL_CMU_LPU_SLEEP_MODE_T mode;\n  uint32_t time = 0;\n\n  ret = HAL_SLEEP_STATUS_LIGHT;\n\n  // Deep sleep hook\n  if (hal_sleep_exec_deep_sleep_hook() || hal_trace_busy()) {\n    return ret;\n  }\n\n  if (stats_started) {\n    time = hal_sys_timer_get();\n  }\n\n  // Modules (except for psram and flash) sleep\n  hal_gpadc_sleep();\n  if (chip_wake_lock_map == 0) {\n    analog_sleep();\n    pmu_sleep();\n  }\n  bt_drv_sleep();\n\n  // End of sleep\n\n  // psram_sleep();\n  hal_norflash_sleep(HAL_NORFLASH_ID_0);\n\n  // Now neither psram nor flash are usable\n\n  if (!hal_sleep_irq_pending()) {\n    if (chip_wake_lock_map) {\n      mode = HAL_CMU_LPU_SLEEP_MODE_SYS;\n    } else {\n      mode = HAL_CMU_LPU_SLEEP_MODE_CHIP;\n    }\n    hal_cmu_lpu_sleep(mode);\n    ret = HAL_SLEEP_STATUS_DEEP;\n  }\n\n  hal_norflash_wakeup(HAL_NORFLASH_ID_0);\n  // psram_wakeup();\n\n  // Now both psram and flash are usable\n\n  if (chip_wake_lock_map == 0) {\n    pmu_wakeup();\n    analog_wakeup();\n  }\n  bt_drv_wakeup();\n\n  hal_gpadc_wakeup();\n  // Modules (except for psram and flash) wakeup\n\n  // End of wakeup\n\n  if (stats_started) {\n    time = hal_sys_timer_get() - time;\n    if (chip_wake_lock_map) {\n      sys_deep_sleep_time += time;\n    } else {\n      chip_deep_sleep_time += time;\n    }\n  }\n\n  return ret;\n}\n\n// GCC has trouble in detecting static function usage in embedded ASM\n// statements. The following function might be optimized away if there is no\n// explicted call in C codes. Specifying \"used\" (or \"noclone\") attribute on the\n// function can avoid the mistaken optimization.\nstatic enum HAL_SLEEP_STATUS_T SRAM_TEXT_LOC NOINLINE USED\nhal_sleep_proc(int light_sleep) {\n  enum HAL_SLEEP_STATUS_T ret;\n  uint32_t time = 0;\n  uint32_t interval;\n\n  ret = HAL_SLEEP_STATUS_LIGHT;\n\n  // Check the sleep conditions in interrupt-locked context\n  if (hal_sleep_cpu_busy()) {\n    // Cannot sleep\n  } else {\n    // Sleep hook\n    if (hal_sleep_exec_sleep_hook()) {\n      goto _exit_sleep;\n    }\n\n    if (hal_sleep_sys_busy()) {\n      // Light sleep\n\n      if (stats_started) {\n        time = hal_sys_timer_get();\n      }\n\n#ifdef NO_LIGHT_SLEEP\n      // WFI during USB ISO transfer might generate very weak (0.1 mV) 1K tone\n      // interference ???\n      while (!hal_sleep_irq_pending())\n        ;\n#else\n#ifndef __ARM_ARCH_ISA_ARM\n      SCB->SCR = 0;\n#endif\n      __DSB();\n      __WFI();\n#endif\n\n      if (stats_started) {\n        light_sleep_time += hal_sys_timer_get() - time;\n      }\n#ifdef DEBUG\n    } else if (hal_trace_busy()) {\n      // Light sleep with trace busy only\n\n      if (stats_started) {\n        time = hal_sys_timer_get();\n      }\n\n      // No irq will be generated when trace becomes idle, so the trace status\n      // should be kept polling actively instead of entering WFI\n      while (!hal_sleep_irq_pending() && hal_trace_busy())\n        ;\n\n      if (stats_started) {\n        light_sleep_time += hal_sys_timer_get() - time;\n      }\n\n      if (!hal_sleep_irq_pending()) {\n        goto _deep_sleep;\n      }\n#endif\n    } else {\n      // Deep sleep\n\n    _deep_sleep:\n      POSSIBLY_UNUSED;\n\n      if (light_sleep) {\n        ret = HAL_SLEEP_STATUS_DEEP;\n      } else {\n        ret = hal_sleep_lowpower_mode();\n      }\n    }\n  }\n\n_exit_sleep:\n  if (stats_started) {\n    time = hal_sys_timer_get();\n    interval = time - stats_start_time;\n    if (interval >= stats_interval) {\n      if (light_sleep_time > UINT32_MAX / 100) {\n        light_sleep_ratio = (uint64_t)light_sleep_time * 100 / interval;\n      } else {\n        light_sleep_ratio = light_sleep_time * 100 / interval;\n      }\n      if (sys_deep_sleep_time > UINT32_MAX / 100) {\n        sys_deep_sleep_ratio = (uint64_t)sys_deep_sleep_time * 100 / interval;\n      } else {\n        sys_deep_sleep_ratio = sys_deep_sleep_time * 100 / interval;\n      }\n      if (chip_deep_sleep_time > UINT32_MAX / 100) {\n        chip_deep_sleep_ratio = (uint64_t)chip_deep_sleep_time * 100 / interval;\n      } else {\n        chip_deep_sleep_ratio = chip_deep_sleep_time * 100 / interval;\n      }\n      stats_valid = true;\n      light_sleep_time = 0;\n      sys_deep_sleep_time = 0;\n      chip_deep_sleep_time = 0;\n      stats_start_time = time;\n    }\n#ifdef SLEEP_STATS_TRACE\n    if (stats_valid && stats_trace_interval) {\n      uint32_t time = hal_sys_timer_get();\n      if (time - stats_trace_time >= stats_trace_interval) {\n        TRACE(4, \"CPU USAGE: busy=%d light=%d sys_deep=%d chip_deep=%d\",\n              100 - (light_sleep_ratio + sys_deep_sleep_ratio +\n                     chip_deep_sleep_ratio),\n              light_sleep_ratio, sys_deep_sleep_ratio, chip_deep_sleep_ratio);\n        stats_trace_time = time;\n#ifdef DEBUG_SLEEP_USER\n        TRACE(4, \"SLEEP_USER: cpulock=0x%X syslock=0x%X irq=0x%08X_%08X\",\n              cpu_wake_lock_map, sys_wake_lock_map,\n              (NVIC->ICPR[1] & NVIC->ISER[1]), (NVIC->ICPR[0] & NVIC->ISER[0]));\n        hal_sysfreq_print();\n#endif\n      }\n    }\n#endif\n  }\n\n  return ret;\n}\n\n#ifndef __ARM_ARCH_ISA_ARM\nstatic enum HAL_SLEEP_STATUS_T SRAM_TEXT_LOC NOINLINE USED NAKED\nhal_sleep_deep_sleep_wrapper(void) {\n  asm volatile(\"push {r4, lr} \\n\"\n               // Switch current stack pointer to MSP\n               \"mrs r4, control \\n\"\n               \"bic r4, #2 \\n\"\n               \"msr control, r4 \\n\"\n               \"isb \\n\"\n               \"movs r0, #0 \\n\"\n               \"bl hal_sleep_proc \\n\"\n               // Switch current stack pointer back to PSP\n               \"orr r4, #2 \\n\"\n               \"msr control, r4 \\n\"\n               \"isb \\n\"\n               \"pop {r4, pc} \\n\");\n\n#ifndef __ARMCC_VERSION\n  return HAL_SLEEP_STATUS_LIGHT;\n#endif\n}\n#endif\n\nenum HAL_SLEEP_STATUS_T SRAM_TEXT_LOC hal_sleep_enter_sleep(void) {\n  enum HAL_SLEEP_STATUS_T ret;\n  uint32_t lock;\n\n  ret = HAL_SLEEP_STATUS_LIGHT;\n\n#ifdef NO_SLEEP\n  return ret;\n#endif\n\n  lock = int_lock_global();\n\n#ifndef __ARM_ARCH_ISA_ARM\n  if (__get_CONTROL() & 0x02) {\n    ret = hal_sleep_deep_sleep_wrapper();\n  } else\n#endif\n  {\n    ret = hal_sleep_proc(false);\n  }\n\n  int_unlock_global(lock);\n\n  return ret;\n}\n\nenum HAL_SLEEP_STATUS_T SRAM_TEXT_LOC hal_sleep_light_sleep(void) {\n  enum HAL_SLEEP_STATUS_T ret;\n  uint32_t lock;\n\n  ret = HAL_SLEEP_STATUS_LIGHT;\n\n#ifdef NO_SLEEP\n  return ret;\n#endif\n\n  lock = int_lock_global();\n\n  ret = hal_sleep_proc(true);\n\n  int_unlock_global(lock);\n\n  return ret;\n}\n\nint hal_cpu_wake_lock(enum HAL_CPU_WAKE_LOCK_USER_T user) {\n  uint32_t lock;\n\n  if (user >= HAL_CPU_WAKE_LOCK_USER_QTY) {\n    return 1;\n  }\n\n  lock = int_lock();\n  cpu_wake_lock_map |= (1 << user);\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_cpu_wake_unlock(enum HAL_CPU_WAKE_LOCK_USER_T user) {\n  uint32_t lock;\n\n  if (user >= HAL_CPU_WAKE_LOCK_USER_QTY) {\n    return 1;\n  }\n\n  lock = int_lock();\n  cpu_wake_lock_map &= ~(1 << user);\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_sys_wake_lock(enum HAL_SYS_WAKE_LOCK_USER_T user) {\n  uint32_t lock;\n\n  if (user >= HAL_SYS_WAKE_LOCK_USER_QTY) {\n    return 1;\n  }\n\n  lock = int_lock();\n  sys_wake_lock_map |= (1 << user);\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_sys_wake_unlock(enum HAL_SYS_WAKE_LOCK_USER_T user) {\n  uint32_t lock;\n\n  if (user >= HAL_SYS_WAKE_LOCK_USER_QTY) {\n    return 1;\n  }\n\n  lock = int_lock();\n  sys_wake_lock_map &= ~(1 << user);\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_chip_wake_lock(enum HAL_CHIP_WAKE_LOCK_USER_T user) {\n  uint32_t lock;\n\n  if (user >= HAL_CHIP_WAKE_LOCK_USER_QTY) {\n    return 1;\n  }\n\n  lock = int_lock();\n  chip_wake_lock_map |= (1 << user);\n  int_unlock(lock);\n\n  return 0;\n}\n\nint hal_chip_wake_unlock(enum HAL_CHIP_WAKE_LOCK_USER_T user) {\n  uint32_t lock;\n\n  if (user >= HAL_CHIP_WAKE_LOCK_USER_QTY) {\n    return 1;\n  }\n\n  lock = int_lock();\n  chip_wake_lock_map &= ~(1 << user);\n  int_unlock(lock);\n\n  return 0;\n}\n"
  },
  {
    "path": "platform/hal/hal_sleep.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SLEEP_H__\n#define __HAL_SLEEP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nenum HAL_CPU_WAKE_LOCK_USER_T {\n    HAL_CPU_WAKE_LOCK_USER_RTOS,\n    HAL_CPU_WAKE_LOCK_USER_EXTERNAL,\n    HAL_CPU_WAKE_LOCK_USER_AUDIOFLINGER,\n    HAL_CPU_WAKE_LOCK_USER_3,\n    HAL_CPU_WAKE_LOCK_USER_4,\n    HAL_CPU_WAKE_LOCK_USER_5,\n    HAL_CPU_WAKE_LOCK_USER_6,\n    HAL_CPU_WAKE_LOCK_USER_7,\n    HAL_CPU_WAKE_LOCK_USER_8,\n    HAL_CPU_WAKE_LOCK_USER_9,\n    HAL_CPU_WAKE_LOCK_USER_10,\n    HAL_CPU_WAKE_LOCK_USER_11,\n    HAL_CPU_WAKE_LOCK_USER_12,\n    HAL_CPU_WAKE_LOCK_USER_13,\n    HAL_CPU_WAKE_LOCK_USER_14,\n    HAL_CPU_WAKE_LOCK_USER_15,\n    HAL_CPU_WAKE_LOCK_USER_16,\n    HAL_CPU_WAKE_LOCK_USER_17,\n    HAL_CPU_WAKE_LOCK_USER_18,\n    HAL_CPU_WAKE_LOCK_USER_19,\n    HAL_CPU_WAKE_LOCK_USER_20,\n    HAL_CPU_WAKE_LOCK_USER_21,\n    HAL_CPU_WAKE_LOCK_USER_22,\n    HAL_CPU_WAKE_LOCK_USER_23,\n    HAL_CPU_WAKE_LOCK_USER_24,\n    HAL_CPU_WAKE_LOCK_USER_25,\n    HAL_CPU_WAKE_LOCK_USER_26,\n    HAL_CPU_WAKE_LOCK_USER_27,\n    HAL_CPU_WAKE_LOCK_USER_28,\n    HAL_CPU_WAKE_LOCK_USER_29,\n    HAL_CPU_WAKE_LOCK_USER_30,\n    HAL_CPU_WAKE_LOCK_USER_31,\n\n    HAL_CPU_WAKE_LOCK_USER_QTY\n};\n\nenum HAL_SYS_WAKE_LOCK_USER_T {\n    HAL_SYS_WAKE_LOCK_USER_INTERSYS,\n    HAL_SYS_WAKE_LOCK_USER_INTERSYS_HCI,\n    HAL_SYS_WAKE_LOCK_USER_2,\n    HAL_SYS_WAKE_LOCK_USER_3,\n    HAL_SYS_WAKE_LOCK_USER_4,\n    HAL_SYS_WAKE_LOCK_USER_5,\n    HAL_SYS_WAKE_LOCK_USER_6,\n    HAL_SYS_WAKE_LOCK_USER_7,\n    HAL_SYS_WAKE_LOCK_USER_8,\n    HAL_SYS_WAKE_LOCK_USER_9,\n    HAL_SYS_WAKE_LOCK_USER_10,\n    HAL_SYS_WAKE_LOCK_USER_11,\n    HAL_SYS_WAKE_LOCK_USER_12,\n    HAL_SYS_WAKE_LOCK_USER_13,\n    HAL_SYS_WAKE_LOCK_USER_14,\n    HAL_SYS_WAKE_LOCK_USER_15,\n    HAL_SYS_WAKE_LOCK_USER_16,\n    HAL_SYS_WAKE_LOCK_USER_17,\n    HAL_SYS_WAKE_LOCK_USER_18,\n    HAL_SYS_WAKE_LOCK_USER_19,\n    HAL_SYS_WAKE_LOCK_USER_20,\n    HAL_SYS_WAKE_LOCK_USER_21,\n    HAL_SYS_WAKE_LOCK_USER_22,\n    HAL_SYS_WAKE_LOCK_USER_23,\n    HAL_SYS_WAKE_LOCK_USER_24,\n    HAL_SYS_WAKE_LOCK_USER_25,\n    HAL_SYS_WAKE_LOCK_USER_26,\n    HAL_SYS_WAKE_LOCK_USER_27,\n    HAL_SYS_WAKE_LOCK_USER_28,\n    HAL_SYS_WAKE_LOCK_USER_29,\n    HAL_SYS_WAKE_LOCK_USER_30,\n    HAL_SYS_WAKE_LOCK_USER_31,\n\n    HAL_SYS_WAKE_LOCK_USER_QTY\n};\n\nenum HAL_CHIP_WAKE_LOCK_USER_T {\n    HAL_CHIP_WAKE_LOCK_USER_ANC,\n    HAL_CHIP_WAKE_LOCK_USER_1,\n    HAL_CHIP_WAKE_LOCK_USER_2,\n    HAL_CHIP_WAKE_LOCK_USER_3,\n    HAL_CHIP_WAKE_LOCK_USER_4,\n    HAL_CHIP_WAKE_LOCK_USER_5,\n    HAL_CHIP_WAKE_LOCK_USER_6,\n    HAL_CHIP_WAKE_LOCK_USER_7,\n    HAL_CHIP_WAKE_LOCK_USER_8,\n    HAL_CHIP_WAKE_LOCK_USER_9,\n    HAL_CHIP_WAKE_LOCK_USER_10,\n    HAL_CHIP_WAKE_LOCK_USER_11,\n    HAL_CHIP_WAKE_LOCK_USER_12,\n    HAL_CHIP_WAKE_LOCK_USER_13,\n    HAL_CHIP_WAKE_LOCK_USER_14,\n    HAL_CHIP_WAKE_LOCK_USER_15,\n    HAL_CHIP_WAKE_LOCK_USER_16,\n    HAL_CHIP_WAKE_LOCK_USER_17,\n    HAL_CHIP_WAKE_LOCK_USER_18,\n    HAL_CHIP_WAKE_LOCK_USER_19,\n    HAL_CHIP_WAKE_LOCK_USER_20,\n    HAL_CHIP_WAKE_LOCK_USER_21,\n    HAL_CHIP_WAKE_LOCK_USER_22,\n    HAL_CHIP_WAKE_LOCK_USER_23,\n    HAL_CHIP_WAKE_LOCK_USER_24,\n    HAL_CHIP_WAKE_LOCK_USER_25,\n    HAL_CHIP_WAKE_LOCK_USER_26,\n    HAL_CHIP_WAKE_LOCK_USER_27,\n    HAL_CHIP_WAKE_LOCK_USER_28,\n    HAL_CHIP_WAKE_LOCK_USER_29,\n    HAL_CHIP_WAKE_LOCK_USER_30,\n    HAL_CHIP_WAKE_LOCK_USER_31,\n\n    HAL_CHIP_WAKE_LOCK_USER_QTY\n};\n\nenum HAL_SLEEP_HOOK_USER_T {\n    HAL_SLEEP_HOOK_USER_NVRECORD = 0,\n    HAL_SLEEP_HOOK_USER_OTA,\n    HAL_SLEEP_HOOK_NORFLASH_API,\n    HAL_SLEEP_HOOK_DUMP_LOG,\n    HAL_SLEEP_HOOK_USER_QTY\n};\n\nenum HAL_DEEP_SLEEP_HOOK_USER_T {\n    HAL_DEEP_SLEEP_HOOK_USER_WDT = 0,\n    HAL_DEEP_SLEEP_HOOK_USER_NVRECORD,\n    HAL_DEEP_SLEEP_HOOK_USER_OTA,\n    HAL_DEEP_SLEEP_HOOK_NORFLASH_API,\n    HAL_DEEP_SLEEP_HOOK_DUMP_LOG,\n    HAL_DEEP_SLEEP_HOOK_USER_QTY\n};\n\nenum HAL_SLEEP_STATUS_T {\n    HAL_SLEEP_STATUS_DEEP,\n    HAL_SLEEP_STATUS_LIGHT,\n};\n\nstruct CPU_USAGE_T {\n    uint8_t busy;\n    uint8_t light_sleep;\n    uint8_t sys_deep_sleep;\n    uint8_t chip_deep_sleep;\n};\n\ntypedef int (*HAL_SLEEP_HOOK_HANDLER)(void);\ntypedef int (*HAL_DEEP_SLEEP_HOOK_HANDLER)(void);\n\nint hal_sleep_irq_pending(void);\n\nint hal_sleep_specific_irq_pending(const uint32_t *irq, uint32_t cnt);\n\nenum HAL_SLEEP_STATUS_T hal_sleep_enter_sleep(void);\n\nenum HAL_SLEEP_STATUS_T hal_sleep_light_sleep(void);\n\nint hal_sleep_set_sleep_hook(enum HAL_SLEEP_HOOK_USER_T user, HAL_SLEEP_HOOK_HANDLER handler);\n\nint hal_sleep_set_deep_sleep_hook(enum HAL_DEEP_SLEEP_HOOK_USER_T user, HAL_DEEP_SLEEP_HOOK_HANDLER handler);\n\nint hal_cpu_wake_lock(enum HAL_CPU_WAKE_LOCK_USER_T user);\n\nint hal_cpu_wake_unlock(enum HAL_CPU_WAKE_LOCK_USER_T user);\n\nint hal_sys_wake_lock(enum HAL_SYS_WAKE_LOCK_USER_T user);\n\nint hal_sys_wake_unlock(enum HAL_SYS_WAKE_LOCK_USER_T user);\n\nint hal_chip_wake_lock(enum HAL_CHIP_WAKE_LOCK_USER_T user);\n\nint hal_chip_wake_unlock(enum HAL_CHIP_WAKE_LOCK_USER_T user);\n\nvoid hal_sleep_start_stats(uint32_t stats_interval_ms, uint32_t trace_interval_ms);\n\nint hal_sleep_get_stats(struct CPU_USAGE_T *usage);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_sleep_core_pd.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*\n=========================================================================\n\tCore Sleep Power Down and Wakeup Power Up Helper Functions\n=========================================================================\n*/\n\n\t#include \"cmsis.h\"\n\n    .syntax\tunified\n\n#ifdef CORE_SLEEP_POWER_DOWN\n\n#ifdef ROM_BUILD\n    .section .bss.core_sleep_stack\n#else\n    .section .sram_bss.core_sleep_stack\n#endif\n    .align    2\ncore_sleep_stack:\n    .space 4\n\n#ifdef ROM_BUILD\n    .section .text.hal_sleep_core_power_down, \"ax\", %progbits\n#else\n    .section .sram_text.hal_sleep_core_power_down, \"ax\", %progbits\n#endif\n    .thumb\n    .thumb_func\n    .align    2\n    .globl    hal_sleep_core_power_down\n    .type    hal_sleep_core_power_down, %function\nhal_sleep_core_power_down:\n\n    ldr r3, =core_sleep_stack\n    push {r4-r12,lr}\n#ifdef __ARM_ARCH_8M_MAIN__\n    mrs r0, msplim\n    push {r0,r1}\n#endif\n#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\n\tldr     r1, =0xE000EF34\n\tldr     r0, [r1]\t\t\t\t/* Load FPCCR */\n\tbic     r0, #1                  /* Clear LSPACT (Lazy state) */\n\tstr     r0, [r1]                /* Store FPCCR */\n#endif\n    /* TODO: Save FPU registers? */\n    str sp, [r3]\n\tbl hal_psc_core_auto_power_down\n.pd_loop:\n\tb .pd_loop\n\n    .pool\n    .size    hal_sleep_core_power_down, . - hal_sleep_core_power_down\n\n\n#ifdef ROM_BUILD\n    .section .text.hal_sleep_core_power_up, \"ax\", %progbits\n#else\n    .section .sram_text.hal_sleep_core_power_up, \"ax\", %progbits\n#endif\n    .thumb\n    .thumb_func\n    .align    2\n    .globl    hal_sleep_core_power_up\n    .type    hal_sleep_core_power_up, %function\nhal_sleep_core_power_up:\n\n    ldr r3, =core_sleep_stack\n    ldr sp, [r3]\n    isb\n    /* TODO: Restore FPU registers? */\n#ifdef __ARM_ARCH_8M_MAIN__\n\tpop {r0,r1}\n\tmsr msplim, r0\n#endif\n    pop {r4-r12,lr}\n    bx lr\n\n    .pool\n    .size    hal_sleep_core_power_up, . - hal_sleep_core_power_up\n\n#endif\n\n    .end\n"
  },
  {
    "path": "platform/hal/hal_sleep_core_pd.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SLEEP_MCU_PD_H__\n#define __HAL_SLEEP_MCU_PD_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nvoid hal_sleep_core_power_down(void);\n\nvoid hal_sleep_core_power_up(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_sleep_mcu_pd.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*\n=========================================================================\n\tMCU Sleep Power Down and Wakeup Power Up Helper Functions\n=========================================================================\n*/\n\n    .syntax\tunified\n\n#ifdef MCU_SLEEP_POWER_DOWN\n\n#ifdef ROM_BUILD\n    .section .bss.mcu_sleep_stack\n#else\n    .section .sram_bss.mcu_sleep_stack\n#endif\n    .align    2\nmcu_sleep_stack:\n    .space 4\n\n#ifdef ROM_BUILD\n    .section .text.hal_sleep_mcu_power_down, \"ax\", %progbits\n#else\n    .section .sram_text.hal_sleep_mcu_power_down, \"ax\", %progbits\n#endif\n    .thumb\n    .thumb_func\n    .align    2\n    .globl    hal_sleep_mcu_power_down\n    .type    hal_sleep_mcu_power_down, %function\nhal_sleep_mcu_power_down:\n\n    ldr r3, =mcu_sleep_stack\n    push {r4-r12,lr}\n    /* TODO: Save FPU registers? */\n    str sp, [r3]\n\tbl hal_psc_mcu_auto_power_down\n.pd_loop:\n\tb .pd_loop\n\n    .pool\n    .size    hal_sleep_mcu_power_down, . - hal_sleep_mcu_power_down\n\n\n#ifdef ROM_BUILD\n    .section .text.hal_sleep_mcu_power_up, \"ax\", %progbits\n#else\n    .section .sram_text.hal_sleep_mcu_power_up, \"ax\", %progbits\n#endif\n    .thumb\n    .thumb_func\n    .align    2\n    .globl    hal_sleep_mcu_power_up\n    .type    hal_sleep_mcu_power_up, %function\nhal_sleep_mcu_power_up:\n\n    ldr r3, =mcu_sleep_stack\n    ldr sp, [r3]\n    isb\n    /* TODO: Restore FPU registers? */\n    pop {r4-r12,lr}\n    bx lr\n\n    .pool\n    .size    hal_sleep_mcu_power_up, . - hal_sleep_mcu_power_up\n\n#endif\n\n    .end\n"
  },
  {
    "path": "platform/hal/hal_sleep_mcu_pd.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SLEEP_MCU_PD_H__\n#define __HAL_SLEEP_MCU_PD_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nvoid hal_sleep_mcu_power_down(void);\n\nvoid hal_sleep_mcu_power_up(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_spdif.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef CHIP_HAS_SPDIF\n\n#include \"hal_spdif.h\"\n#include \"analog.h\"\n#include \"cmsis.h\"\n#include \"hal_iomux.h\"\n#include \"hal_spdifip.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n#include \"reg_spdifip.h\"\n\n// #define SPDIF_CLOCK_SOURCE 240000000\n// #define SPDIF_CLOCK_SOURCE 22579200\n// #define SPDIF_CLOCK_SOURCE 48000000\n#define SPDIF_CLOCK_SOURCE 3072000\n\n// #define SPDIF_CLOCK_SOURCE 76800000\n// #define SPDIF_CLOCK_SOURCE 84672000\n\n// Trigger DMA request when TX-FIFO count <= threshold\n#define HAL_SPDIF_TX_FIFO_TRIGGER_LEVEL (SPDIFIP_FIFO_DEPTH / 2)\n// Trigger DMA request when RX-FIFO count >= threshold\n#define HAL_SPDIF_RX_FIFO_TRIGGER_LEVEL (SPDIFIP_FIFO_DEPTH / 2)\n\n#define HAL_SPDIF_YES 1\n#define HAL_SPDIF_NO 0\n\n#ifdef CHIP_BEST2000\n#define SPDIF_CMU_DIV CODEC_CMU_DIV\n#else\n#define SPDIF_CMU_DIV CODEC_PLL_DIV\n#endif\n\nenum HAL_SPDIF_STATUS_T {\n  HAL_SPDIF_STATUS_NULL,\n  HAL_SPDIF_STATUS_OPENED,\n  HAL_SPDIF_STATUS_STARTED,\n};\n\nstruct HAL_SPDIF_MOD_NAME_T {\n  enum HAL_CMU_MOD_ID_T mod;\n  enum HAL_CMU_MOD_ID_T apb;\n};\n\nstruct HAL_SPDIF_MOD_NAME_T spdif_mod[HAL_SPDIF_ID_QTY] = {\n    {\n        .mod = HAL_CMU_MOD_O_SPDIF0,\n        .apb = HAL_CMU_MOD_P_SPDIF0,\n    },\n#if (CHIP_HAS_SPDIF > 1)\n    {\n        .mod = HAL_CMU_MOD_O_SPDIF1,\n        .apb = HAL_CMU_MOD_P_SPDIF1,\n    },\n#endif\n};\n\nstatic const char *const invalid_id = \"Invalid SPDIF ID: %d\\n\";\n// static const char * const invalid_ch = \"Invalid SPDIF CH: %d\\n\";\n\nstruct SPDIF_SAMPLE_RATE_T {\n  enum AUD_SAMPRATE_T sample_rate;\n  uint32_t codec_freq;\n  uint8_t codec_div;\n  uint8_t pcm_div;\n  uint8_t tx_ratio;\n};\n\n// SAMPLE_RATE * 128 = PLL_nominal / PCM_DIV / TX_RATIO\nstatic const struct SPDIF_SAMPLE_RATE_T spdif_sample_rate[] = {\n#if defined(CHIP_BEST1000) && defined(AUD_PLL_DOUBLE)\n    {AUD_SAMPRATE_96000, CODEC_FREQ_48K_SERIES * 2, CODEC_PLL_DIV,\n     SPDIF_CMU_DIV, 4},\n    {AUD_SAMPRATE_192000, CODEC_FREQ_48K_SERIES * 2, CODEC_PLL_DIV,\n     SPDIF_CMU_DIV, 2},\n    {AUD_SAMPRATE_384000, CODEC_FREQ_48K_SERIES * 2, CODEC_PLL_DIV,\n     SPDIF_CMU_DIV, 1},\n#else\n    {AUD_SAMPRATE_8000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, SPDIF_CMU_DIV,\n     24},\n    {AUD_SAMPRATE_16000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, SPDIF_CMU_DIV,\n     12},\n    {AUD_SAMPRATE_22050, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, SPDIF_CMU_DIV,\n     8},\n    {AUD_SAMPRATE_24000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, SPDIF_CMU_DIV,\n     8},\n    {AUD_SAMPRATE_44100, CODEC_FREQ_44_1K_SERIES, CODEC_PLL_DIV, SPDIF_CMU_DIV,\n     4},\n    {AUD_SAMPRATE_48000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, SPDIF_CMU_DIV,\n     4},\n    {AUD_SAMPRATE_96000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, SPDIF_CMU_DIV,\n     2},\n    {AUD_SAMPRATE_192000, CODEC_FREQ_48K_SERIES, CODEC_PLL_DIV, SPDIF_CMU_DIV,\n     1},\n#endif\n};\n\n#if (CHIP_HAS_SPDIF > 1)\nstatic uint8_t spdif_map;\nSTATIC_ASSERT(HAL_SPDIF_ID_QTY <= sizeof(spdif_map) * 8, \"Too many SPDIF IDs\");\n#endif\n\nstatic enum HAL_SPDIF_STATUS_T spdif_status[HAL_SPDIF_ID_QTY][AUD_STREAM_NUM];\nstatic bool spdif_dma[HAL_SPDIF_ID_QTY][AUD_STREAM_NUM];\n\nstatic inline uint32_t _spdif_get_reg_base(enum HAL_SPDIF_ID_T id) {\n  ASSERT(id < HAL_SPDIF_ID_QTY, invalid_id, id);\n\n  switch (id) {\n  case HAL_SPDIF_ID_0:\n  default:\n    return SPDIF0_BASE;\n    break;\n#if (CHIP_HAS_SPDIF > 1)\n  case HAL_SPDIF_ID_1:\n    return SPDIF1_BASE;\n    break;\n#endif\n  }\n  return 0;\n}\n\nint hal_spdif_open(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n\n  reg_base = _spdif_get_reg_base(id);\n\n  if (spdif_status[id][stream] != HAL_SPDIF_STATUS_NULL) {\n    TRACE(2, \"Invalid SPDIF opening status for stream %d: %d\", stream,\n          spdif_status[id][stream]);\n    return 1;\n  }\n\n  if (spdif_status[id][AUD_STREAM_PLAYBACK] == HAL_SPDIF_STATUS_NULL &&\n      spdif_status[id][AUD_STREAM_CAPTURE] == HAL_SPDIF_STATUS_NULL) {\n#ifndef SIMU\n    bool cfg_pll = true;\n    int i;\n\n    for (i = HAL_SPDIF_ID_0; i < HAL_SPDIF_ID_QTY; i++) {\n      if (spdif_status[i][AUD_STREAM_PLAYBACK] != HAL_SPDIF_STATUS_NULL ||\n          spdif_status[i][AUD_STREAM_CAPTURE] != HAL_SPDIF_STATUS_NULL) {\n        cfg_pll = false;\n        break;\n      }\n    }\n    if (cfg_pll) {\n      analog_aud_pll_open(ANA_AUD_PLL_USER_SPDIF);\n    }\n#endif\n\n#if (CHIP_HAS_SPDIF > 1)\n    if (id == HAL_SPDIF_ID_1) {\n      hal_iomux_set_spdif1();\n    } else\n#endif\n    {\n      hal_iomux_set_spdif0();\n    }\n    hal_cmu_spdif_clock_enable(id);\n    hal_cmu_clock_enable(spdif_mod[id].mod);\n    hal_cmu_clock_enable(spdif_mod[id].apb);\n    hal_cmu_reset_clear(spdif_mod[id].mod);\n    hal_cmu_reset_clear(spdif_mod[id].apb);\n\n    spdifip_w_enable_spdifip(reg_base, HAL_SPDIF_YES);\n  }\n\n  spdif_dma[id][stream] = false;\n  spdif_status[id][stream] = HAL_SPDIF_STATUS_OPENED;\n\n  return 0;\n}\n\nint hal_spdif_close(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n\n  if (id >= HAL_SPDIF_ID_QTY) {\n    return 1;\n  }\n\n  if (spdif_status[id][stream] != HAL_SPDIF_STATUS_OPENED) {\n    TRACE(2, \"Invalid SPDIF closing status for stream %d: %d\", stream,\n          spdif_status[id][stream]);\n    return 1;\n  }\n\n  spdif_status[id][stream] = HAL_SPDIF_STATUS_NULL;\n\n  if (spdif_status[id][AUD_STREAM_PLAYBACK] == HAL_SPDIF_STATUS_NULL &&\n      spdif_status[id][AUD_STREAM_CAPTURE] == HAL_SPDIF_STATUS_NULL) {\n    reg_base = _spdif_get_reg_base(id);\n\n    spdifip_w_enable_spdifip(reg_base, HAL_SPDIF_NO);\n\n    hal_cmu_spdif_set_div(id, 0x1FFF + 2);\n    hal_cmu_reset_set(spdif_mod[id].apb);\n    hal_cmu_reset_set(spdif_mod[id].mod);\n    hal_cmu_clock_disable(spdif_mod[id].apb);\n    hal_cmu_clock_disable(spdif_mod[id].mod);\n    hal_cmu_spdif_clock_disable(id);\n\n#ifndef SIMU\n    bool cfg_pll = true;\n    int i;\n\n    for (i = HAL_SPDIF_ID_0; i < HAL_SPDIF_ID_QTY; i++) {\n      if (spdif_status[i][AUD_STREAM_PLAYBACK] != HAL_SPDIF_STATUS_NULL ||\n          spdif_status[i][AUD_STREAM_CAPTURE] != HAL_SPDIF_STATUS_NULL) {\n        cfg_pll = false;\n        break;\n      }\n    }\n    if (cfg_pll) {\n      analog_aud_pll_close(ANA_AUD_PLL_USER_SPDIF);\n    }\n#endif\n  }\n\n  return 0;\n}\n\nint hal_spdif_start_stream(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n  uint32_t lock;\n\n  reg_base = _spdif_get_reg_base(id);\n\n  if (spdif_status[id][stream] != HAL_SPDIF_STATUS_OPENED) {\n    TRACE(2, \"Invalid SPDIF starting status for stream %d: %d\", stream,\n          spdif_status[id][stream]);\n    return 1;\n  }\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    lock = int_lock();\n    spdifip_w_enable_tx_channel0(reg_base, HAL_SPDIF_YES);\n    spdifip_w_enable_tx(reg_base, HAL_SPDIF_YES);\n    spdifip_w_tx_valid(reg_base, HAL_SPDIF_YES);\n    if (spdif_dma[id][stream]) {\n      spdifip_w_enable_tx_dma(reg_base, HAL_SPDIF_YES);\n    }\n    int_unlock(lock);\n  } else {\n    if (spdif_dma[id][stream]) {\n      spdifip_w_enable_rx_dma(reg_base, HAL_SPDIF_YES);\n    }\n    spdifip_w_enable_rx_channel0(reg_base, HAL_SPDIF_YES);\n    spdifip_w_enable_rx(reg_base, HAL_SPDIF_YES);\n    spdifip_w_sample_en(reg_base, HAL_SPDIF_YES);\n  }\n\n  spdif_status[id][stream] = HAL_SPDIF_STATUS_STARTED;\n\n  return 0;\n}\n\nint hal_spdif_stop_stream(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream) {\n  uint32_t reg_base;\n\n  reg_base = _spdif_get_reg_base(id);\n\n  if (spdif_status[id][stream] != HAL_SPDIF_STATUS_STARTED) {\n    TRACE(2, \"Invalid SPDIF stopping status for stream %d: %d\", stream,\n          spdif_status[id][stream]);\n    return 1;\n  }\n\n  spdif_status[id][stream] = HAL_SPDIF_STATUS_OPENED;\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    spdifip_w_enable_tx(reg_base, HAL_SPDIF_NO);\n    spdifip_w_enable_tx_channel0(reg_base, HAL_SPDIF_NO);\n    spdifip_w_enable_tx_dma(reg_base, HAL_SPDIF_NO);\n    spdifip_w_tx_fifo_reset(reg_base);\n  } else {\n    spdifip_w_enable_rx(reg_base, HAL_SPDIF_NO);\n    spdifip_w_enable_rx_channel0(reg_base, HAL_SPDIF_NO);\n    spdifip_w_enable_rx_dma(reg_base, HAL_SPDIF_NO);\n    spdifip_w_rx_fifo_reset(reg_base);\n  }\n\n  return 0;\n}\n\nint hal_spdif_setup_stream(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream,\n                           struct HAL_SPDIF_CONFIG_T *cfg) {\n  uint8_t i;\n  uint32_t reg_base;\n  uint8_t fmt;\n\n  reg_base = _spdif_get_reg_base(id);\n\n  if (spdif_status[id][stream] != HAL_SPDIF_STATUS_OPENED) {\n    TRACE(2, \"Invalid SPDIF setup status for stream %d: %d\", stream,\n          spdif_status[id][stream]);\n    return 1;\n  }\n\n  for (i = 0; i < ARRAY_SIZE(spdif_sample_rate); i++) {\n    if (spdif_sample_rate[i].sample_rate == cfg->sample_rate) {\n      break;\n    }\n  }\n  ASSERT(i < ARRAY_SIZE(spdif_sample_rate), \"%s: Invalid spdif sample rate: %d\",\n         __func__, cfg->sample_rate);\n\n  TRACE(3, \"[%s] stream=%d sample_rate=%d\", __func__, stream, cfg->sample_rate);\n\n#ifndef SIMU\n  analog_aud_freq_pll_config(spdif_sample_rate[i].codec_freq,\n                             spdif_sample_rate[i].codec_div);\n#ifdef CHIP_BEST2000\n  analog_aud_pll_set_dig_div(spdif_sample_rate[i].codec_div /\n                             spdif_sample_rate[i].pcm_div);\n#endif\n#endif\n  // SPDIF module is working on 24.576M or 22.5792M\n  hal_cmu_spdif_set_div(id, spdif_sample_rate[i].pcm_div);\n\n  if ((stream == AUD_STREAM_PLAYBACK &&\n       spdif_status[id][AUD_STREAM_CAPTURE] == HAL_SPDIF_STATUS_NULL) ||\n      (stream == AUD_STREAM_CAPTURE &&\n       spdif_status[id][AUD_STREAM_PLAYBACK] == HAL_SPDIF_STATUS_NULL)) {\n    hal_cmu_reset_pulse(spdif_mod[id].mod);\n  }\n\n  spdif_dma[id][stream] = cfg->use_dma;\n\n  fmt = 0;\n  switch (cfg->bits) {\n  case AUD_BITS_16:\n    fmt = 0;\n    break;\n  // here, 32-bit is treated as 24-bit\n  case AUD_BITS_32:\n  case AUD_BITS_24:\n    fmt = 8;\n    break;\n  default:\n    ASSERT(0, \"%s: invalid bits[%d]\", __func__, cfg->bits);\n  }\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    spdifip_w_tx_ratio(reg_base, spdif_sample_rate[i].tx_ratio - 1);\n    spdifip_w_tx_format_cfg_reg(reg_base, fmt);\n    spdifip_w_tx_fifo_threshold(reg_base, HAL_SPDIF_TX_FIFO_TRIGGER_LEVEL);\n  } else {\n    spdifip_w_rx_format_cfg_reg(reg_base, fmt);\n    spdifip_w_rx_fifo_threshold(reg_base, HAL_SPDIF_RX_FIFO_TRIGGER_LEVEL);\n  }\n\n  return 0;\n}\n\nint hal_spdif_send(enum HAL_SPDIF_ID_T id, uint8_t *value, uint32_t value_len) {\n  uint32_t i = 0;\n  uint32_t reg_base;\n\n  reg_base = _spdif_get_reg_base(id);\n\n  for (i = 0; i < value_len; i += 4) {\n    while (!(spdifip_r_int_status(reg_base) &\n             SPDIFIP_INT_STATUS_TX_FIFO_EMPTY_MASK))\n      ;\n\n    spdifip_w_tx_left_fifo(reg_base, value[i + 1] << 8 | value[i]);\n    spdifip_w_tx_right_fifo(reg_base, value[i + 3] << 8 | value[i + 2]);\n  }\n\n  return 0;\n}\n\nuint8_t hal_spdif_recv(enum HAL_SPDIF_ID_T id, uint8_t *value,\n                       uint32_t value_len) {\n  // uint32_t reg_base;\n\n  // reg_base = _spdif_get_reg_base(id);\n  return 0;\n}\n\nint hal_spdif_clock_out_enable(enum HAL_SPDIF_ID_T id, uint32_t div) {\n  if (id >= HAL_SPDIF_ID_QTY) {\n    return 1;\n  }\n\n  hal_cmu_spdif_clock_enable(id);\n  hal_cmu_spdif_set_div(id, div);\n\n  return 0;\n}\n\nint hal_spdif_clock_out_disable(enum HAL_SPDIF_ID_T id) {\n  if (id >= HAL_SPDIF_ID_QTY) {\n    return 1;\n  }\n\n  hal_cmu_spdif_set_div(id, 0x1FFF + 2);\n  hal_cmu_spdif_clock_disable(id);\n\n  return 0;\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_spdif.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SPDIF_H__\n#define __HAL_SPDIF_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef CHIP_HAS_SPDIF\n\n#include \"plat_types.h\"\n#include \"hal_cmu.h\"\n#include \"hal_aud.h\"\n\nstruct HAL_SPDIF_CONFIG_T {\n    uint32_t bits;\n    uint32_t channel_num;\n    uint32_t sample_rate;\n\n    uint32_t use_dma;\n};\n\nint hal_spdif_open(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream);\nint hal_spdif_close(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream);\nint hal_spdif_start_stream(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream);\nint hal_spdif_stop_stream(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream);\nint hal_spdif_setup_stream(enum HAL_SPDIF_ID_T id, enum AUD_STREAM_T stream, struct HAL_SPDIF_CONFIG_T *cfg);\nint hal_spdif_send(enum HAL_SPDIF_ID_T id, uint8_t *value, uint32_t value_len);\nuint8_t hal_spdif_recv(enum HAL_SPDIF_ID_T id, uint8_t *value, uint32_t value_len);\n\nint hal_spdif_clock_out_enable(enum HAL_SPDIF_ID_T id, uint32_t div);\nint hal_spdif_clock_out_disable(enum HAL_SPDIF_ID_T id);\n\n#endif // CHIP_HAS_SPDIF\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_spdifip.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SPDIFIP_H__\n#define __HAL_SPDIFIP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"reg_spdifip.h\"\n\n#define spdifip_read32(b,a) \\\n     (*(volatile uint32_t *)(b+a))\n\n#define spdifip_write32(v,b,a) \\\n     ((*(volatile uint32_t *)(b+a)) = v)\n\nstatic inline void spdifip_w_enable_spdifip(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n\n    val = spdifip_read32(reg_base, SPDIFIP_ENABLE_REG_REG_OFFSET);\n    if (v)\n        val |= SPDIFIP_ENABLE_REG_SPDIF_ENABLE_MASK;\n    else\n        val &= ~SPDIFIP_ENABLE_REG_SPDIF_ENABLE_MASK;\n\n    spdifip_write32(val, reg_base, SPDIFIP_ENABLE_REG_REG_OFFSET);\n}\n#if 0\nstatic inline void spdifip_w_enable_clk_gen(uint32_t reg_base, uint32_t v)\n{\n    if (v)\n        spdifip_write32(1, reg_base, SPDIFIP_CLK_GEN_ENABLE_REG_REG_OFFSET);\n    else\n        spdifip_write32(0, reg_base, SPDIFIP_CLK_GEN_ENABLE_REG_REG_OFFSET);\n}\n#endif\n#if 0\nstatic inline void spdifip_w_enable_rx_block(uint32_t reg_base, uint32_t v)\n{\n    if (v)\n        spdifip_write32(1, reg_base, SPDIFIP_RX_BLOCK_ENABLE_REG_REG_OFFSET);\n    else\n        spdifip_write32(0, reg_base, SPDIFIP_RX_BLOCK_ENABLE_REG_REG_OFFSET);\n}\n#endif\nstatic inline void spdifip_w_sample_en(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n    val = spdifip_read32(reg_base, SPDIFIP_RX_CFG_REG_OFFSET);\n\n    if (v)\n        val |= SPDIFIP_RX_CFG_SAMPLEEN_MASK;\n    else\n        val &= ~SPDIFIP_RX_CFG_SAMPLEEN_MASK;\n\n    spdifip_write32(val, reg_base, SPDIFIP_RX_CFG_REG_OFFSET);\n}\nstatic inline void spdifip_w_enable_rx(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n    val = spdifip_read32(reg_base, SPDIFIP_RX_CFG_REG_OFFSET);\n\n    if (v)\n        val |= SPDIFIP_RX_CFG_RXEN_MASK;\n    else\n        val &= ~SPDIFIP_RX_CFG_RXEN_MASK;\n\n    spdifip_write32(val, reg_base, SPDIFIP_RX_CFG_REG_OFFSET);\n}\nstatic inline void spdifip_w_rx_format_cfg_reg(uint32_t reg_base, uint32_t v)\n{\n    uint32_t val = 0;\n\n    val = spdifip_read32(reg_base, SPDIFIP_RX_CFG_REG_OFFSET);\n    val &= ~SPDIFIP_RX_CFG_FORMAT_MASK;\n    val |= v<= 2)\n  HAL_SPI_CS_1,\n  HAL_SPI_CS_2,\n#if (CHIP_SPI_VER >= 3)\n  HAL_SPI_CS_3,\n#if (CHIP_SPI_VER >= 4)\n// HAL_SPI_CS_4,\n#endif\n#endif\n#endif\n\n  HAL_SPI_CS_QTY\n};\n\nenum HAL_SPI_XFER_TYPE_T {\n  HAL_SPI_XFER_TYPE_SEND,\n  HAL_SPI_XFER_TYPE_RECV,\n\n  HAL_SPI_XFER_TYPE_QTY\n};\n\nstruct HAL_SPI_MOD_NAME_T {\n  enum HAL_CMU_MOD_ID_T mod;\n  enum HAL_CMU_MOD_ID_T apb;\n};\n\nstatic struct SPI_T *const spi[HAL_SPI_ID_QTY] = {\n    (struct SPI_T *)ISPI_BASE,\n#ifdef CHIP_HAS_SPI\n    (struct SPI_T *)SPI_BASE,\n#endif\n#ifdef CHIP_HAS_SPILCD\n    (struct SPI_T *)SPILCD_BASE,\n#endif\n#ifdef CHIP_HAS_SPIPHY\n    (struct SPI_T *)SPIPHY_BASE,\n#endif\n#ifdef CHIP_HAS_SPIDPD\n    (struct SPI_T *)SPIDPD_BASE,\n#endif\n};\n\nstatic const struct HAL_SPI_MOD_NAME_T spi_mod[HAL_SPI_ID_QTY] = {\n    {\n        .mod = HAL_CMU_MOD_O_SPI_ITN,\n        .apb = HAL_CMU_MOD_P_SPI_ITN,\n    },\n#ifdef CHIP_HAS_SPI\n    {\n        .mod = HAL_CMU_MOD_O_SPI,\n        .apb = HAL_CMU_MOD_P_SPI,\n    },\n#endif\n#ifdef CHIP_HAS_SPILCD\n    {\n        .mod = HAL_CMU_MOD_O_SLCD,\n        .apb = HAL_CMU_MOD_P_SLCD,\n    },\n#endif\n#ifdef CHIP_HAS_SPIPHY\n    {\n        .mod = HAL_CMU_MOD_O_SPI_PHY,\n        .apb = HAL_CMU_MOD_P_SPI_PHY,\n    },\n#endif\n#ifdef CHIP_HAS_SPIDPD\n    {\n        .mod = HAL_CMU_MOD_O_SPI_DPD,\n        .apb = HAL_CMU_MOD_P_SPI_DPD,\n    },\n#endif\n};\n\n#ifndef SPI_ROM_ONLY\n#ifdef CHIP_HAS_SPI\nstatic struct HAL_SPI_CTRL_T spi0_ctrl[HAL_SPI_CS_QTY];\n#if (CHIP_SPI_VER >= 2)\nstatic enum HAL_SPI_CS_T spi0_cs = HAL_SPI_CS_0;\n#else\nstatic const enum HAL_SPI_CS_T spi0_cs = HAL_SPI_CS_0;\n#endif\n#endif\n#ifdef CHIP_HAS_SPILCD\nstatic struct HAL_SPI_CTRL_T spilcd_ctrl[HAL_SPI_CS_QTY];\n#if (CHIP_SPI_VER >= 2)\nstatic enum HAL_SPI_CS_T spilcd_cs = HAL_SPI_CS_0;\n#else\nstatic const enum HAL_SPI_CS_T spilcd_cs = HAL_SPI_CS_0;\n#endif\n#endif\n#ifdef CHIP_HAS_SPIDPD\nstatic struct HAL_SPI_CTRL_T spidpd_ctrl;\n#endif\n\nstatic uint8_t BOOT_BSS_LOC spi_cs_map[HAL_SPI_ID_QTY];\nSTATIC_ASSERT(sizeof(spi_cs_map[0]) * 8 >= HAL_SPI_CS_QTY,\n              \"spi_cs_map size too small\");\n\nstatic bool BOOT_BSS_LOC in_use[HAL_SPI_ID_QTY] = {\n    false,\n};\n\nstatic HAL_SPI_DMA_HANDLER_T BOOT_BSS_LOC spi_txdma_handler[HAL_SPI_ID_QTY];\nstatic HAL_SPI_DMA_HANDLER_T BOOT_BSS_LOC spi_rxdma_handler[HAL_SPI_ID_QTY];\nstatic uint8_t BOOT_BSS_LOC spi_txdma_chan[HAL_SPI_ID_QTY];\nstatic uint8_t BOOT_BSS_LOC spi_rxdma_chan[HAL_SPI_ID_QTY];\n\nstatic enum HAL_SPI_MOD_CLK_SEL_T clk_sel[HAL_SPI_ID_QTY];\n\nstatic bool BOOT_BSS_LOC spi_init_done = false;\n\nstatic int hal_spi_activate_cs_id(enum HAL_SPI_ID_T id, uint32_t cs);\n#endif\n\n// static const char *invalid_id = \"Invalid SPI ID: %d\";\n\nstatic inline uint8_t get_frame_bytes(enum HAL_SPI_ID_T id) {\n  uint8_t bits, cnt;\n\n  bits = GET_BITFIELD(spi[id]->SSPCR0, SPI_SSPCR0_DSS) + 1;\n  if (bits <= 8) {\n    cnt = 1;\n  } else if (bits <= 16) {\n    cnt = 2;\n  } else {\n    cnt = 4;\n  }\n\n  return cnt;\n}\n\nstatic inline void copy_frame_from_bytes(uint32_t *val, const uint8_t *data,\n                                         uint8_t cnt) {\n#ifdef UNALIGNED_ACCESS\n  if (cnt == 1) {\n    *val = *(const uint8_t *)data;\n  } else if (cnt == 2) {\n    *val = *(const uint16_t *)data;\n  } else {\n    *val = *(const uint32_t *)data;\n  }\n#else\n  if (cnt == 1) {\n    *val = data[0];\n  } else if (cnt == 2) {\n    *val = data[0] | (data[1] << 8);\n  } else {\n    *val = data[0] | (data[1] << 8) | (data[2] << 16) | (data[3] << 24);\n  }\n#endif\n}\n\nstatic inline void copy_bytes_from_frame(uint8_t *data, uint32_t val,\n                                         uint8_t cnt) {\n#ifdef UNALIGNED_ACCESS\n  if (cnt == 1) {\n    *(uint8_t *)data = (uint8_t)val;\n  } else if (cnt == 2) {\n    *(uint16_t *)data = (uint16_t)val;\n  } else {\n    *(uint32_t *)data = (uint32_t)val;\n  }\n#else\n  data[0] = (uint8_t)val;\n  if (cnt == 1) {\n    return;\n  } else if (cnt == 2) {\n    data[1] = (uint8_t)(val >> 8);\n  } else {\n    data[1] = (uint8_t)(val >> 8);\n    data[2] = (uint8_t)(val >> 16);\n    data[3] = (uint8_t)(val >> 24);\n  }\n#endif\n}\n\nint hal_spi_init_ctrl(const struct HAL_SPI_CFG_T *cfg,\n                      struct HAL_SPI_CTRL_T *ctrl) {\n  uint32_t div;\n  uint16_t cpsdvsr, scr;\n  uint32_t mod_clk;\n\n#ifdef SPI_ROM_ONLY\n  // Assume default crystal -- Never access global versatile data to ensure\n  // reentrance\n  mod_clk = HAL_CMU_DEFAULT_CRYSTAL_FREQ;\n#else // !SPI_ROM_ONLY\n  mod_clk = 0;\n#ifdef PERIPH_PLL_FREQ\n  if (PERIPH_PLL_FREQ / 2 > 2 * hal_cmu_get_crystal_freq()) {\n    // Init to OSC_X2\n    mod_clk = 2 * hal_cmu_get_crystal_freq();\n    if (cfg->rate * 2 > mod_clk) {\n      mod_clk = PERIPH_PLL_FREQ / 2;\n      ctrl->clk_sel = HAL_SPI_MOD_CLK_SEL_PLL;\n    } else {\n      mod_clk = 0;\n    }\n  }\n#endif\n  if (mod_clk == 0) {\n    // Init to OSC\n    mod_clk = hal_cmu_get_crystal_freq();\n    if (cfg->rate * 2 > mod_clk) {\n      mod_clk *= 2;\n      ctrl->clk_sel = HAL_SPI_MOD_CLK_SEL_OSC_X2;\n    } else {\n      ctrl->clk_sel = HAL_SPI_MOD_CLK_SEL_OSC;\n    }\n  }\n#endif // !SPI_ROM_ONLY\n\n  SPI_ASSERT(cfg->rate <= mod_clk / (MIN_CPSDVSR * (1 + MIN_SCR)),\n             \"SPI rate too large: %u\", cfg->rate);\n  SPI_ASSERT(cfg->rate >= mod_clk / (MAX_CPSDVSR * (1 + MAX_SCR)),\n             \"SPI rate too small: %u\", cfg->rate);\n  SPI_ASSERT(cfg->tx_bits <= MAX_DATA_BITS && cfg->tx_bits >= MIN_DATA_BITS,\n             \"Invalid SPI TX bits: %d\", cfg->tx_bits);\n  SPI_ASSERT(cfg->rx_bits <= MAX_DATA_BITS && cfg->rx_bits >= MIN_DATA_BITS,\n             \"Invalid SPI RX bits: %d\", cfg->rx_bits);\n  SPI_ASSERT(cfg->rx_frame_bits <= MAX_DATA_BITS &&\n                 (cfg->rx_frame_bits == 0 || cfg->rx_frame_bits > cfg->rx_bits),\n             \"Invalid SPI RX FRAME bits: %d\", cfg->rx_frame_bits);\n  SPI_ASSERT(cfg->cs < HAL_SPI_CS_QTY, \"SPI cs bad: %d\", cfg->cs);\n\n  div = (mod_clk + cfg->rate - 1) / cfg->rate;\n  cpsdvsr = (div + MAX_SCR) / (MAX_SCR + 1);\n  if (cpsdvsr < 2) {\n    cpsdvsr = 2;\n  } else {\n    if (cpsdvsr & 0x1) {\n      cpsdvsr += 1;\n    }\n    if (cpsdvsr > MAX_CPSDVSR) {\n      cpsdvsr = MAX_CPSDVSR;\n    }\n  }\n  scr = (div + cpsdvsr - 1) / cpsdvsr;\n  if (scr > 0) {\n    scr -= 1;\n  }\n  if (scr > MAX_SCR) {\n    scr = MAX_SCR;\n  }\n\n  ctrl->sspcr0_tx =\n      SPI_SSPCR0_SCR(scr) | (cfg->clk_delay_half ? SPI_SSPCR0_SPH : 0) |\n      (cfg->clk_polarity ? SPI_SSPCR0_SPO : 0) |\n      SPI_SSPCR0_FRF(0) | // Only support Motorola SPI frame format\n      SPI_SSPCR0_DSS(cfg->tx_bits - 1);\n  ctrl->sspcr1 = (cfg->rx_sep_line ? SPI_RX_SEL_EN : 0) |\n                 SPI_SLAVE_ID(cfg->cs) | SPI_SSPCR1_SOD |\n                 (cfg->slave ? SPI_SSPCR1_MS : 0) | SPI_SSPCR1_SSE;\n  ctrl->sspcpsr = SPI_SSPCPSR_CPSDVSR(cpsdvsr);\n  ctrl->sspdmacr = (cfg->dma_tx ? SPI_SSPDMACR_TXDMAE : 0) |\n                   (cfg->dma_rx ? SPI_SSPDMACR_RXDMAE : 0);\n  ctrl->ssprxcr_tx = 0;\n  if (cfg->rx_frame_bits > 0) {\n    ctrl->sspcr0_rx =\n        SET_BITFIELD(ctrl->sspcr0_tx, SPI_SSPCR0_DSS, cfg->rx_frame_bits - 1);\n    ctrl->ssprxcr_rx = SPI_SSPRXCR_EN | SPI_SSPRXCR_OEN_POLARITY |\n                       SPI_SSPRXCR_RXBITS(cfg->rx_bits - 1);\n  } else {\n    ctrl->sspcr0_rx =\n        SET_BITFIELD(ctrl->sspcr0_tx, SPI_SSPCR0_DSS, cfg->rx_bits - 1);\n    ctrl->ssprxcr_rx = 0;\n  }\n\n  return 0;\n}\n\nstatic void NOINLINE POSSIBLY_UNUSED hal_spi_set_xfer_type_id(\n    enum HAL_SPI_ID_T id, const struct HAL_SPI_CTRL_T *ctrl,\n    enum HAL_SPI_XFER_TYPE_T type) {\n  uint32_t sspcr0;\n  uint32_t ssprxcr;\n\n  if (type == HAL_SPI_XFER_TYPE_SEND) {\n    sspcr0 = ctrl->sspcr0_tx;\n    ssprxcr = ctrl->ssprxcr_tx;\n  } else {\n    sspcr0 = ctrl->sspcr0_rx;\n    ssprxcr = ctrl->ssprxcr_rx;\n  }\n\n  spi[id]->SSPCR0 = sspcr0;\n  spi[id]->SSPRXCR = ssprxcr;\n}\n\nstatic void NOINLINE hal_spi_enable_id(enum HAL_SPI_ID_T id,\n                                       const struct HAL_SPI_CTRL_T *ctrl,\n                                       enum HAL_SPI_XFER_TYPE_T type) {\n  hal_spi_set_xfer_type_id(id, ctrl, type);\n\n  spi[id]->SSPCR1 = ctrl->sspcr1;\n  spi[id]->SSPCPSR = ctrl->sspcpsr;\n  spi[id]->SSPDMACR = ctrl->sspdmacr;\n\n#ifdef SPI_ROM_ONLY\n  if (id == HAL_SPI_ID_INTERNAL) {\n    hal_cmu_ispi_set_freq(HAL_CMU_PERIPH_FREQ_26M);\n#ifdef CHIP_HAS_SPI\n  } else if (id == HAL_SPI_ID_0) {\n    hal_cmu_spi_set_freq(HAL_CMU_PERIPH_FREQ_26M);\n#endif\n#ifdef CHIP_HAS_SPILCD\n  } else if (id == HAL_SPI_ID_SLCD) {\n    hal_cmu_slcd_set_freq(HAL_CMU_PERIPH_FREQ_26M);\n#endif\n  }\n#else // !SPI_ROM_ONLY\n  if (clk_sel[id] != ctrl->clk_sel) {\n    clk_sel[id] = ctrl->clk_sel;\n    if (ctrl->clk_sel == HAL_SPI_MOD_CLK_SEL_PLL) {\n#ifdef PERIPH_PLL_FREQ\n      if (0) {\n#ifdef CHIP_HAS_SPI\n      } else if (id == HAL_SPI_ID_0) {\n        hal_cmu_spi_set_div(2);\n#endif\n#ifdef CHIP_HAS_SPILCD\n      } else if (id == HAL_SPI_ID_SLCD) {\n        hal_cmu_slcd_set_div(2);\n#endif\n      }\n      // ISPI cannot use PLL clock\n#endif\n    } else {\n      enum HAL_CMU_PERIPH_FREQ_T periph_freq;\n\n      if (ctrl->clk_sel == HAL_SPI_MOD_CLK_SEL_OSC_X2) {\n        periph_freq = HAL_CMU_PERIPH_FREQ_52M;\n      } else {\n        periph_freq = HAL_CMU_PERIPH_FREQ_26M;\n      }\n\n      if (id == HAL_SPI_ID_INTERNAL) {\n        hal_cmu_ispi_set_freq(periph_freq);\n#ifdef CHIP_HAS_SPI\n      } else if (id == HAL_SPI_ID_0) {\n        hal_cmu_spi_set_freq(periph_freq);\n#endif\n#ifdef CHIP_HAS_SPILCD\n      } else if (id == HAL_SPI_ID_SLCD) {\n        hal_cmu_slcd_set_freq(periph_freq);\n#endif\n      }\n    }\n  }\n#endif // !SPI_ROM_ONLY\n}\n\nstatic void hal_spi_disable_id(enum HAL_SPI_ID_T id) {\n  spi[id]->SSPCR1 &= ~SPI_SSPCR1_SSE;\n}\n\nstatic void POSSIBLY_UNUSED hal_spi_get_ctrl_id(enum HAL_SPI_ID_T id,\n                                                struct HAL_SPI_CTRL_T *ctrl) {\n  ctrl->sspcr0_tx = spi[id]->SSPCR0;\n  ctrl->sspcr1 = spi[id]->SSPCR1;\n  ctrl->sspcpsr = spi[id]->SSPCPSR;\n  ctrl->sspdmacr = spi[id]->SSPDMACR;\n  ctrl->ssprxcr_tx = spi[id]->SSPRXCR;\n}\n\nstatic int NOINLINE hal_spi_open_id(enum HAL_SPI_ID_T id,\n                                    const struct HAL_SPI_CFG_T *cfg,\n                                    struct HAL_SPI_CTRL_T *ctrl) {\n  int ret;\n  struct HAL_SPI_CTRL_T ctrl_regs;\n  bool cfg_clk = true;\n\n  // SPI_ASSERT(id < HAL_SPI_ID_QTY, invalid_id, id);\n\n  if (ctrl == NULL) {\n    ctrl = &ctrl_regs;\n  }\n\n  ret = hal_spi_init_ctrl(cfg, ctrl);\n  if (ret) {\n    return ret;\n  }\n\n#ifndef SPI_ROM_ONLY\n  if (!spi_init_done) {\n    spi_init_done = true;\n    for (int i = HAL_SPI_ID_INTERNAL; i < HAL_SPI_ID_QTY; i++) {\n      spi_txdma_chan[i] = HAL_DMA_CHAN_NONE;\n      spi_rxdma_chan[i] = HAL_DMA_CHAN_NONE;\n    }\n  }\n\n  if (spi_cs_map[id]) {\n    cfg_clk = false;\n  }\n  spi_cs_map[id] |= (1 << cfg->cs);\n#endif\n\n  if (cfg_clk) {\n    hal_cmu_clock_enable(spi_mod[id].mod);\n    hal_cmu_clock_enable(spi_mod[id].apb);\n    hal_cmu_reset_clear(spi_mod[id].mod);\n    hal_cmu_reset_clear(spi_mod[id].apb);\n  }\n\n  hal_spi_enable_id(id, ctrl, HAL_SPI_XFER_TYPE_SEND);\n\n  return 0;\n}\n\nstatic int POSSIBLY_UNUSED hal_spi_close_id(enum HAL_SPI_ID_T id, uint32_t cs) {\n  int ret = 0;\n  bool cfg_clk = true;\n\n#ifndef SPI_ROM_ONLY\n  if (spi_cs_map[id] & (1 << cs)) {\n    spi_cs_map[id] &= ~(1 << cs);\n#if (CHIP_SPI_VER >= 2)\n    if (spi_cs_map[id]) {\n      cfg_clk = false;\n    }\n#endif\n  } else {\n    ret = 1;\n    cfg_clk = false;\n  }\n#endif\n\n  if (cfg_clk) {\n    hal_spi_disable_id(id);\n\n    hal_cmu_reset_set(spi_mod[id].apb);\n    hal_cmu_reset_set(spi_mod[id].mod);\n    hal_cmu_clock_disable(spi_mod[id].apb);\n    hal_cmu_clock_disable(spi_mod[id].mod);\n  }\n\n  return ret;\n}\n\nstatic void POSSIBLY_UNUSED hal_spi_set_cs_id(enum HAL_SPI_ID_T id,\n                                              uint32_t cs) {\n  spi[id]->SSPCR1 = SET_BITFIELD(spi[id]->SSPCR1, SPI_SLAVE_ID, cs);\n}\n\nstatic bool hal_spi_busy_id(enum HAL_SPI_ID_T id) {\n  return ((spi[id]->SSPCR1 & SPI_SSPCR1_SSE) &&\n          (spi[id]->SSPSR & SPI_SSPSR_BSY));\n}\n\nstatic void hal_spi_enable_slave_output_id(enum HAL_SPI_ID_T id) {\n  if (spi[id]->SSPCR1 & SPI_SSPCR1_MS) {\n    spi[id]->SSPCR1 &= ~SPI_SSPCR1_SOD;\n  }\n}\n\nstatic void hal_spi_disable_slave_output_id(enum HAL_SPI_ID_T id) {\n  if (spi[id]->SSPCR1 & SPI_SSPCR1_MS) {\n    spi[id]->SSPCR1 |= SPI_SSPCR1_SOD;\n  }\n}\n\nstatic int hal_spi_send_id(enum HAL_SPI_ID_T id, const void *data,\n                           uint32_t len) {\n  uint8_t cnt;\n  uint32_t sent, value;\n  int ret;\n\n  // SPI_ASSERT(id < HAL_SPI_ID_QTY, invalid_id, id);\n  SPI_ASSERT((spi[id]->SSPDMACR & SPI_SSPDMACR_TXDMAE) == 0,\n             \"TX-DMA configured on SPI %d\", id);\n\n  cnt = get_frame_bytes(id);\n\n  if (len == 0 || (len & (cnt - 1)) != 0) {\n    return -1;\n  }\n\n  sent = 0;\n\n  hal_spi_enable_slave_output_id(id);\n\n  while (sent < len) {\n    if ((spi[id]->SSPCR1 & SPI_SSPCR1_SSE) == 0) {\n      break;\n    }\n    if (spi[id]->SSPSR & SPI_SSPSR_TNF) {\n      value = 0;\n      copy_frame_from_bytes(&value, (uint8_t *)data + sent, cnt);\n      spi[id]->SSPDR = value;\n      sent += cnt;\n    }\n  }\n\n  if (sent >= len) {\n    ret = 0;\n  } else {\n    ret = 1;\n  }\n\n  while (hal_spi_busy_id(id))\n    ;\n  hal_spi_disable_slave_output_id(id);\n\n  return ret;\n}\n\nstatic int hal_spi_recv_id(enum HAL_SPI_ID_T id, const void *cmd, void *data,\n                           uint32_t len) {\n  uint8_t cnt;\n  uint32_t sent, recv, value;\n  int ret;\n\n  // SPI_ASSERT(id < HAL_SPI_ID_QTY, invalid_id, id);\n  SPI_ASSERT(\n      (spi[id]->SSPDMACR & (SPI_SSPDMACR_TXDMAE | SPI_SSPDMACR_RXDMAE)) == 0,\n      \"RX/TX-DMA configured on SPI %d\", id);\n\n  cnt = get_frame_bytes(id);\n\n  if (len == 0 || (len & (cnt - 1)) != 0) {\n    return -1;\n  }\n\n  // Rx transaction should start from idle state\n  if (spi[id]->SSPSR & SPI_SSPSR_BSY) {\n    return -11;\n  }\n\n  sent = 0;\n  recv = 0;\n\n  // Flush the RX FIFO by reset or CPU read\n  while (spi[id]->SSPSR & SPI_SSPSR_RNE) {\n    spi[id]->SSPDR;\n  }\n  spi[id]->SSPICR = ~0UL;\n\n  hal_spi_enable_slave_output_id(id);\n\n  while (recv < len || sent < len) {\n    if ((spi[id]->SSPCR1 & SPI_SSPCR1_SSE) == 0) {\n      break;\n    }\n    if (sent < len && (spi[id]->SSPSR & SPI_SSPSR_TNF)) {\n      value = 0;\n      copy_frame_from_bytes(&value, (uint8_t *)cmd + sent, cnt);\n      spi[id]->SSPDR = value;\n      sent += cnt;\n    }\n    if (recv < len && (spi[id]->SSPSR & SPI_SSPSR_RNE)) {\n      value = spi[id]->SSPDR;\n      copy_bytes_from_frame((uint8_t *)data + recv, value, cnt);\n      recv += cnt;\n    }\n  }\n\n  if (recv >= len && sent >= len) {\n    ret = 0;\n  } else {\n    ret = 1;\n  }\n\n  while (hal_spi_busy_id(id))\n    ;\n  hal_spi_disable_slave_output_id(id);\n\n  return ret;\n}\n\n#ifdef SPI_ROM_ONLY\n\n//------------------------------------------------------------\n// ISPI ROM functions\n//------------------------------------------------------------\n\nint hal_ispi_rom_open(const struct HAL_SPI_CFG_T *cfg) {\n  SPI_ASSERT(cfg->tx_bits == cfg->rx_bits && cfg->rx_frame_bits == 0,\n             \"ISPI_ROM: Bad bits cfg\");\n\n  return hal_spi_open_id(HAL_SPI_ID_INTERNAL, cfg, NULL);\n}\n\nvoid hal_ispi_rom_activate_cs(uint32_t cs) {\n  SPI_ASSERT(cs < HAL_SPI_CS_QTY, \"ISPI_ROM: SPI cs bad: %d\", cs);\n\n  hal_spi_set_cs_id(HAL_SPI_ID_INTERNAL, cs);\n}\n\nint hal_ispi_rom_busy(void) { return hal_spi_busy_id(HAL_SPI_ID_INTERNAL); }\n\nint hal_ispi_rom_send(const void *data, uint32_t len) {\n  int ret;\n\n  ret = hal_spi_send_id(HAL_SPI_ID_INTERNAL, data, len);\n\n  return ret;\n}\n\nint hal_ispi_rom_recv(const void *cmd, void *data, uint32_t len) {\n  int ret;\n\n  ret = hal_spi_recv_id(HAL_SPI_ID_INTERNAL, cmd, data, len);\n\n  return ret;\n}\n\n#ifdef CHIP_HAS_SPIPHY\n//------------------------------------------------------------\n// SPI PHY ROM functions\n//------------------------------------------------------------\n\nint hal_spiphy_rom_open(const struct HAL_SPI_CFG_T *cfg) {\n  SPI_ASSERT(cfg->tx_bits == cfg->rx_bits && cfg->rx_frame_bits == 0,\n             \"SPIPHY_ROM: Bad bits cfg\");\n\n  return hal_spi_open_id(HAL_SPI_ID_PHY, cfg, NULL);\n}\n\nint hal_spiphy_rom_busy(void) { return hal_spi_busy_id(HAL_SPI_ID_PHY); }\n\nint hal_spiphy_rom_send(const void *data, uint32_t len) {\n  int ret;\n\n  ret = hal_spi_send_id(HAL_SPI_ID_PHY, data, len);\n\n  return ret;\n}\n\nint hal_spiphy_rom_recv(const void *cmd, void *data, uint32_t len) {\n  int ret;\n\n  ret = hal_spi_recv_id(HAL_SPI_ID_PHY, cmd, data, len);\n\n  return ret;\n}\n#endif\n\n#else // !SPI_ROM_ONLY\n\nstatic int hal_spi_activate_cs_id(enum HAL_SPI_ID_T id, uint32_t cs) {\n  struct HAL_SPI_CTRL_T *ctrl = NULL;\n\n  SPI_ASSERT(cs < HAL_SPI_CS_QTY, \"SPI cs bad: %d\", cs);\n  SPI_ASSERT(spi_cs_map[id] & (1 << cs), \"SPI cs not opened: %d\", cs);\n\n#if (CHIP_SPI_VER >= 2)\n  if (0) {\n#ifdef CHIP_HAS_SPI\n  } else if (id == HAL_SPI_ID_0) {\n    spi0_cs = cs;\n#endif\n#ifdef CHIP_HAS_SPILCD\n  } else if (id == HAL_SPI_ID_SLCD) {\n    spilcd_cs = cs;\n#endif\n  }\n#endif\n\n  if (0) {\n#ifdef CHIP_HAS_SPI\n  } else if (id == HAL_SPI_ID_0) {\n    ctrl = &spi0_ctrl[spi0_cs];\n#endif\n#ifdef CHIP_HAS_SPILCD\n  } else if (id == HAL_SPI_ID_SLCD) {\n    ctrl = &spilcd_ctrl[spilcd_cs];\n#endif\n  }\n  if (ctrl) {\n    hal_spi_enable_id(id, ctrl, HAL_SPI_XFER_TYPE_SEND);\n  }\n\n  return 0;\n}\n\nstatic int POSSIBLY_UNUSED hal_spi_enable_and_send_id(\n    enum HAL_SPI_ID_T id, const struct HAL_SPI_CTRL_T *ctrl, const void *data,\n    uint32_t len) {\n  int ret;\n  struct HAL_SPI_CTRL_T saved;\n\n  // SPI_ASSERT(id < HAL_SPI_ID_QTY, invalid_id, id);\n\n  if (set_bool_flag(&in_use[id])) {\n    return -31;\n  }\n\n  hal_spi_get_ctrl_id(id, &saved);\n  hal_spi_enable_id(id, ctrl, HAL_SPI_XFER_TYPE_SEND);\n  ret = hal_spi_send_id(id, data, len);\n  hal_spi_enable_id(id, &saved, HAL_SPI_XFER_TYPE_SEND);\n\n  clear_bool_flag(&in_use[id]);\n\n  return ret;\n}\n\nstatic int POSSIBLY_UNUSED hal_spi_enable_and_recv_id(\n    enum HAL_SPI_ID_T id, const struct HAL_SPI_CTRL_T *ctrl, const void *cmd,\n    void *data, uint32_t len) {\n  int ret;\n  struct HAL_SPI_CTRL_T saved;\n\n  if (set_bool_flag(&in_use[id])) {\n    return -31;\n  }\n\n  hal_spi_get_ctrl_id(id, &saved);\n  hal_spi_enable_id(id, ctrl, HAL_SPI_XFER_TYPE_RECV);\n  ret = hal_spi_recv_id(id, cmd, data, len);\n  hal_spi_enable_id(id, &saved, HAL_SPI_XFER_TYPE_SEND);\n\n  clear_bool_flag(&in_use[id]);\n\n  return ret;\n}\n\nstatic void hal_spi_txdma_handler(uint8_t chan, uint32_t remains,\n                                  uint32_t error, struct HAL_DMA_DESC_T *lli) {\n  enum HAL_SPI_ID_T id;\n  uint32_t lock;\n\n  lock = int_lock();\n  for (id = HAL_SPI_ID_INTERNAL; id < HAL_SPI_ID_QTY; id++) {\n    if (spi_txdma_chan[id] == chan) {\n      spi_txdma_chan[id] = HAL_DMA_CHAN_NONE;\n      break;\n    }\n  }\n  int_unlock(lock);\n\n  if (id >= HAL_SPI_ID_QTY) {\n    return;\n  }\n\n  hal_gpdma_free_chan(chan);\n\n  clear_bool_flag(&in_use[id]);\n\n  if (spi_txdma_handler[id]) {\n    spi_txdma_handler[id](error);\n  }\n}\n\nstatic int hal_spi_dma_send_id(enum HAL_SPI_ID_T id, const void *data,\n                               uint32_t len, HAL_SPI_DMA_HANDLER_T handler) {\n  uint8_t cnt;\n  enum HAL_DMA_RET_T ret;\n  struct HAL_DMA_CH_CFG_T dma_cfg;\n  enum HAL_DMA_WDITH_T dma_width;\n  uint32_t lock;\n  enum HAL_DMA_PERIPH_T dst_periph;\n\n  // SPI_ASSERT(id < HAL_SPI_ID_QTY, invalid_id, id);\n  SPI_ASSERT((spi[id]->SSPDMACR & SPI_SSPDMACR_TXDMAE),\n             \"TX-DMA not configured on SPI %d\", id);\n\n  spi_txdma_handler[id] = handler;\n\n  cnt = get_frame_bytes(id);\n\n  if ((len & (cnt - 1)) != 0) {\n    return -1;\n  }\n  if (((uint32_t)data & (cnt - 1)) != 0) {\n    return -2;\n  }\n\n  // Tx transaction should start from idle state for SPI mode 1 and 3 (SPH=1)\n  if ((spi[id]->SSPCR0 & SPI_SSPCR0_SPH) && (spi[id]->SSPSR & SPI_SSPSR_BSY)) {\n    return -11;\n  }\n\n  if (id == HAL_SPI_ID_INTERNAL) {\n    dst_periph = HAL_GPDMA_ISPI_TX;\n#ifdef CHIP_HAS_SPI\n  } else if (id == HAL_SPI_ID_0) {\n    dst_periph = HAL_GPDMA_SPI_TX;\n#endif\n#ifdef CHIP_HAS_SPILCD\n  } else if (id == HAL_SPI_ID_SLCD) {\n    dst_periph = HAL_GPDMA_SPILCD_TX;\n#endif\n  } else {\n    return -12;\n  }\n\n  lock = int_lock();\n  if (spi_txdma_chan[id] != HAL_DMA_CHAN_NONE) {\n    int_unlock(lock);\n    return -3;\n  }\n  spi_txdma_chan[id] = hal_gpdma_get_chan(dst_periph, HAL_DMA_HIGH_PRIO);\n  if (spi_txdma_chan[id] == HAL_DMA_CHAN_NONE) {\n    int_unlock(lock);\n    return -4;\n  }\n  int_unlock(lock);\n\n  if (cnt == 1) {\n    dma_width = HAL_DMA_WIDTH_BYTE;\n  } else if (cnt == 2) {\n    dma_width = HAL_DMA_WIDTH_HALFWORD;\n  } else {\n    dma_width = HAL_DMA_WIDTH_WORD;\n  }\n\n  memset(&dma_cfg, 0, sizeof(dma_cfg));\n  dma_cfg.ch = spi_txdma_chan[id];\n  dma_cfg.dst = 0; // useless\n  dma_cfg.dst_bsize = HAL_DMA_BSIZE_4;\n  dma_cfg.dst_periph = dst_periph;\n  dma_cfg.dst_width = dma_width;\n  dma_cfg.handler = handler ? hal_spi_txdma_handler : NULL;\n  dma_cfg.src = (uint32_t)data;\n  dma_cfg.src_bsize = HAL_DMA_BSIZE_16;\n  // dma_cfg.src_periph = HAL_GPDMA_PERIPH_QTY; // useless\n  dma_cfg.src_tsize = len / cnt;\n  dma_cfg.src_width = dma_width;\n  dma_cfg.try_burst = 0;\n  dma_cfg.type = HAL_DMA_FLOW_M2P_DMA;\n\n  hal_spi_enable_slave_output_id(id);\n\n  ret = hal_gpdma_start(&dma_cfg);\n  if (ret != HAL_DMA_OK) {\n    hal_spi_disable_slave_output_id(id);\n    return -5;\n  }\n\n  if (handler == NULL) {\n    while ((spi[id]->SSPCR1 & SPI_SSPCR1_SSE) &&\n           hal_gpdma_chan_busy(spi_txdma_chan[id]))\n      ;\n    hal_gpdma_free_chan(spi_txdma_chan[id]);\n    spi_txdma_chan[id] = HAL_DMA_CHAN_NONE;\n    while (hal_spi_busy_id(id))\n      ;\n    hal_spi_disable_slave_output_id(id);\n  }\n\n  return 0;\n}\n\nvoid hal_spi_stop_dma_send_id(enum HAL_SPI_ID_T id) {\n  uint32_t lock;\n  uint8_t tx_chan;\n\n  lock = int_lock();\n  tx_chan = spi_txdma_chan[id];\n  spi_txdma_chan[id] = HAL_DMA_CHAN_NONE;\n  int_unlock(lock);\n\n  if (tx_chan != HAL_DMA_CHAN_NONE) {\n    hal_gpdma_cancel(tx_chan);\n    hal_gpdma_free_chan(tx_chan);\n  }\n\n  clear_bool_flag(&in_use[id]);\n}\n\nstatic void hal_spi_rxdma_handler(uint8_t chan, uint32_t remains,\n                                  uint32_t error, struct HAL_DMA_DESC_T *lli) {\n  enum HAL_SPI_ID_T id;\n  uint32_t lock;\n  uint8_t tx_chan = HAL_DMA_CHAN_NONE;\n  struct HAL_SPI_CTRL_T *ctrl = NULL;\n\n  lock = int_lock();\n  for (id = HAL_SPI_ID_INTERNAL; id < HAL_SPI_ID_QTY; id++) {\n    if (spi_rxdma_chan[id] == chan) {\n      tx_chan = spi_txdma_chan[id];\n      spi_rxdma_chan[id] = HAL_DMA_CHAN_NONE;\n      spi_txdma_chan[id] = HAL_DMA_CHAN_NONE;\n      break;\n    }\n  }\n  int_unlock(lock);\n\n  if (id >= HAL_SPI_ID_QTY) {\n    return;\n  }\n\n  hal_gpdma_free_chan(chan);\n  hal_gpdma_cancel(tx_chan);\n  hal_gpdma_free_chan(tx_chan);\n\n  if (0) {\n#ifdef CHIP_HAS_SPI\n  } else if (id == HAL_SPI_ID_0) {\n    ctrl = &spi0_ctrl[spi0_cs];\n#endif\n#ifdef CHIP_HAS_SPILCD\n  } else if (id == HAL_SPI_ID_SLCD) {\n    ctrl = &spilcd_ctrl[spilcd_cs];\n#endif\n  }\n  if (ctrl) {\n    hal_spi_set_xfer_type_id(id, ctrl, HAL_SPI_XFER_TYPE_SEND);\n  }\n  clear_bool_flag(&in_use[id]);\n\n  if (spi_rxdma_handler[id]) {\n    spi_rxdma_handler[id](error);\n  }\n}\n\nstatic int hal_spi_dma_recv_id(enum HAL_SPI_ID_T id, const void *cmd,\n                               void *data, uint32_t len,\n                               HAL_SPI_DMA_HANDLER_T handler) {\n  uint8_t cnt;\n  enum HAL_DMA_RET_T ret;\n  struct HAL_DMA_CH_CFG_T dma_cfg;\n  enum HAL_DMA_WDITH_T dma_width;\n  uint32_t lock;\n  int result;\n  enum HAL_DMA_PERIPH_T dst_periph, src_periph;\n  struct HAL_SPI_CTRL_T *ctrl = NULL;\n\n  // SPI_ASSERT(id < HAL_SPI_ID_QTY, invalid_id, id);\n  SPI_ASSERT(\n      (spi[id]->SSPDMACR & (SPI_SSPDMACR_TXDMAE | SPI_SSPDMACR_RXDMAE)) ==\n          (SPI_SSPDMACR_TXDMAE | SPI_SSPDMACR_RXDMAE),\n      \"RX/TX-DMA not configured on SPI %d\", id);\n\n  spi_rxdma_handler[id] = handler;\n\n  result = 0;\n\n  cnt = get_frame_bytes(id);\n\n  if ((len & (cnt - 1)) != 0) {\n    return -1;\n  }\n  if (((uint32_t)data & (cnt - 1)) != 0) {\n    return -2;\n  }\n\n  // Rx transaction should start from idle state\n  if (spi[id]->SSPSR & SPI_SSPSR_BSY) {\n    return -11;\n  }\n\n  if (id == HAL_SPI_ID_INTERNAL) {\n    src_periph = HAL_GPDMA_ISPI_RX;\n    dst_periph = HAL_GPDMA_ISPI_TX;\n#ifdef CHIP_HAS_SPI\n  } else if (id == HAL_SPI_ID_0) {\n    src_periph = HAL_GPDMA_SPI_RX;\n    dst_periph = HAL_GPDMA_SPI_TX;\n#endif\n#ifdef CHIP_HAS_SPILCD\n  } else if (id == HAL_SPI_ID_SLCD) {\n    src_periph = HAL_GPDMA_SPILCD_RX;\n    dst_periph = HAL_GPDMA_SPILCD_TX;\n#endif\n  } else {\n    return -12;\n  }\n\n  lock = int_lock();\n  if (spi_txdma_chan[id] != HAL_DMA_CHAN_NONE ||\n      spi_rxdma_chan[id] != HAL_DMA_CHAN_NONE) {\n    int_unlock(lock);\n    return -3;\n  }\n  spi_txdma_chan[id] = hal_gpdma_get_chan(dst_periph, HAL_DMA_HIGH_PRIO);\n  if (spi_txdma_chan[id] == HAL_DMA_CHAN_NONE) {\n    int_unlock(lock);\n    return -4;\n  }\n  spi_rxdma_chan[id] = hal_gpdma_get_chan(src_periph, HAL_DMA_HIGH_PRIO);\n  if (spi_rxdma_chan[id] == HAL_DMA_CHAN_NONE) {\n    hal_gpdma_free_chan(spi_txdma_chan[id]);\n    spi_txdma_chan[id] = HAL_DMA_CHAN_NONE;\n    int_unlock(lock);\n    return -5;\n  }\n  int_unlock(lock);\n\n  if (cnt == 1) {\n    dma_width = HAL_DMA_WIDTH_BYTE;\n  } else if (cnt == 2) {\n    dma_width = HAL_DMA_WIDTH_HALFWORD;\n  } else {\n    dma_width = HAL_DMA_WIDTH_WORD;\n  }\n\n  memset(&dma_cfg, 0, sizeof(dma_cfg));\n  dma_cfg.ch = spi_rxdma_chan[id];\n  dma_cfg.dst = (uint32_t)data;\n  dma_cfg.dst_bsize = HAL_DMA_BSIZE_16;\n  // dma_cfg.dst_periph = HAL_GPDMA_PERIPH_QTY; // useless\n  dma_cfg.dst_width = dma_width;\n  dma_cfg.handler = handler ? hal_spi_rxdma_handler : NULL;\n  dma_cfg.src = 0; // useless\n  dma_cfg.src_periph = src_periph;\n  dma_cfg.src_bsize = HAL_DMA_BSIZE_4;\n  dma_cfg.src_tsize = len / cnt;\n  dma_cfg.src_width = dma_width;\n  dma_cfg.try_burst = 0;\n  dma_cfg.type = HAL_DMA_FLOW_P2M_DMA;\n\n  // Flush the RX FIFO by reset or DMA read (CPU read is forbidden when DMA is\n  // enabled)\n  if (spi[id]->SSPSR & SPI_SSPSR_RNE) {\n    // Reset SPI MODULE might cause the increment of the FIFO pointer\n    hal_cmu_reset_pulse(spi_mod[id].mod);\n    // Reset SPI APB will reset the FIFO pointer\n    hal_cmu_reset_pulse(spi_mod[id].apb);\n    if (0) {\n#ifdef CHIP_HAS_SPI\n    } else if (id == HAL_SPI_ID_0) {\n      ctrl = &spi0_ctrl[spi0_cs];\n#endif\n#ifdef CHIP_HAS_SPILCD\n    } else if (id == HAL_SPI_ID_SLCD) {\n      ctrl = &spilcd_ctrl[spilcd_cs];\n#endif\n    }\n    if (ctrl) {\n      // hal_spi_set_xfer_type_id() is not enough, for all the registers have\n      // been reset by APB reset\n      hal_spi_enable_id(id, ctrl, HAL_SPI_XFER_TYPE_RECV);\n    }\n  }\n  spi[id]->SSPICR = ~0UL;\n\n  ret = hal_gpdma_start(&dma_cfg);\n  if (ret != HAL_DMA_OK) {\n    result = -8;\n    goto _exit;\n  }\n\n  dma_cfg.ch = spi_txdma_chan[id];\n  dma_cfg.dst = 0; // useless\n  dma_cfg.dst_bsize = HAL_DMA_BSIZE_4;\n  dma_cfg.dst_periph = dst_periph;\n  dma_cfg.dst_width = dma_width;\n  dma_cfg.handler = NULL;\n  dma_cfg.src = (uint32_t)cmd;\n  dma_cfg.src_bsize = HAL_DMA_BSIZE_16;\n  // dma_cfg.src_periph = HAL_GPDMA_PERIPH_QTY; // useless\n  dma_cfg.src_tsize = len / cnt;\n  dma_cfg.src_width = dma_width;\n  dma_cfg.try_burst = 0;\n  dma_cfg.type = HAL_DMA_FLOW_M2P_DMA;\n\n  hal_spi_enable_slave_output_id(id);\n\n  ret = hal_gpdma_start(&dma_cfg);\n  if (ret != HAL_DMA_OK) {\n    result = -9;\n    goto _exit;\n  }\n\n  if (handler == NULL) {\n    while ((spi[id]->SSPCR1 & SPI_SSPCR1_SSE) &&\n           hal_gpdma_chan_busy(spi_rxdma_chan[id]))\n      ;\n  }\n\n_exit:\n  if (result || handler == NULL) {\n    hal_gpdma_cancel(spi_txdma_chan[id]);\n    hal_gpdma_free_chan(spi_txdma_chan[id]);\n    spi_txdma_chan[id] = HAL_DMA_CHAN_NONE;\n\n    while (hal_spi_busy_id(id))\n      ;\n    hal_spi_disable_slave_output_id(id);\n\n    hal_gpdma_cancel(spi_rxdma_chan[id]);\n    hal_gpdma_free_chan(spi_rxdma_chan[id]);\n    spi_rxdma_chan[id] = HAL_DMA_CHAN_NONE;\n\n    if (ctrl) {\n      hal_spi_set_xfer_type_id(id, ctrl, HAL_SPI_XFER_TYPE_SEND);\n    }\n  }\n\n  return 0;\n}\n\nvoid hal_spi_stop_dma_recv_id(enum HAL_SPI_ID_T id) {\n  uint32_t lock;\n  uint8_t rx_chan, tx_chan;\n  struct HAL_SPI_CTRL_T *ctrl = NULL;\n\n  lock = int_lock();\n  rx_chan = spi_rxdma_chan[id];\n  spi_rxdma_chan[id] = HAL_DMA_CHAN_NONE;\n  tx_chan = spi_txdma_chan[id];\n  spi_txdma_chan[id] = HAL_DMA_CHAN_NONE;\n  int_unlock(lock);\n\n  if (rx_chan == HAL_DMA_CHAN_NONE && tx_chan == HAL_DMA_CHAN_NONE) {\n    return;\n  }\n\n  if (rx_chan != HAL_DMA_CHAN_NONE) {\n    hal_gpdma_cancel(rx_chan);\n    hal_gpdma_free_chan(rx_chan);\n  }\n  if (tx_chan != HAL_DMA_CHAN_NONE) {\n    hal_gpdma_cancel(tx_chan);\n    hal_gpdma_free_chan(tx_chan);\n  }\n\n  if (0) {\n#ifdef CHIP_HAS_SPI\n  } else if (id == HAL_SPI_ID_0) {\n    ctrl = &spi0_ctrl[spi0_cs];\n#endif\n#ifdef CHIP_HAS_SPILCD\n  } else if (id == HAL_SPI_ID_SLCD) {\n    ctrl = &spilcd_ctrl[spilcd_cs];\n#endif\n  }\n  if (ctrl) {\n    hal_spi_set_xfer_type_id(id, ctrl, HAL_SPI_XFER_TYPE_SEND);\n  }\n  clear_bool_flag(&in_use[id]);\n}\n\n//------------------------------------------------------------\n// ISPI functions\n//------------------------------------------------------------\n\nint hal_ispi_open(const struct HAL_SPI_CFG_T *cfg) {\n  SPI_ASSERT(cfg->tx_bits == cfg->rx_bits && cfg->rx_frame_bits == 0,\n             \"ISPI: Bad bits cfg\");\n\n  return hal_spi_open_id(HAL_SPI_ID_INTERNAL, cfg, NULL);\n}\n\nint hal_ispi_close(uint32_t cs) {\n  return hal_spi_close_id(HAL_SPI_ID_INTERNAL, cs);\n}\n\nvoid hal_ispi_activate_cs(uint32_t cs) {\n  SPI_ASSERT(cs < HAL_SPI_CS_QTY, \"ISPI: SPI cs bad: %d\", cs);\n\n  hal_spi_set_cs_id(HAL_SPI_ID_INTERNAL, cs);\n}\n\nint hal_ispi_busy(void) { return hal_spi_busy_id(HAL_SPI_ID_INTERNAL); }\n\nint hal_ispi_send(const void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_INTERNAL])) {\n    return -31;\n  }\n\n  ret = hal_spi_send_id(HAL_SPI_ID_INTERNAL, data, len);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_INTERNAL]);\n\n  return ret;\n}\n\nint hal_ispi_recv(const void *cmd, void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_INTERNAL])) {\n    return -31;\n  }\n\n  ret = hal_spi_recv_id(HAL_SPI_ID_INTERNAL, cmd, data, len);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_INTERNAL]);\n\n  return ret;\n}\n\nint hal_ispi_dma_send(const void *data, uint32_t len,\n                      HAL_SPI_DMA_HANDLER_T handler) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_INTERNAL])) {\n    return -31;\n  }\n\n  ret = hal_spi_dma_send_id(HAL_SPI_ID_INTERNAL, data, len, handler);\n\n  if (ret || handler == NULL) {\n    clear_bool_flag(&in_use[HAL_SPI_ID_INTERNAL]);\n  }\n\n  return ret;\n}\n\nint hal_ispi_dma_recv(const void *cmd, void *data, uint32_t len,\n                      HAL_SPI_DMA_HANDLER_T handler) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_INTERNAL])) {\n    return -31;\n  }\n\n  ret = hal_spi_dma_recv_id(HAL_SPI_ID_INTERNAL, cmd, data, len, handler);\n\n  if (ret || handler == NULL) {\n    clear_bool_flag(&in_use[HAL_SPI_ID_INTERNAL]);\n  }\n\n  return ret;\n}\n\nvoid hal_ispi_stop_dma_send(void) {\n  hal_spi_stop_dma_send_id(HAL_SPI_ID_INTERNAL);\n}\n\nvoid hal_ispi_stop_dma_recv(void) {\n  hal_spi_stop_dma_recv_id(HAL_SPI_ID_INTERNAL);\n}\n\n#ifdef CHIP_HAS_SPI\n//------------------------------------------------------------\n// SPI peripheral functions\n//------------------------------------------------------------\n\nint hal_spi_open(const struct HAL_SPI_CFG_T *cfg) {\n  int ret;\n  uint32_t lock;\n\n  if (cfg->cs >= HAL_SPI_CS_QTY) {\n    return -1;\n  }\n\n  lock = int_lock();\n\n  ret = hal_spi_open_id(HAL_SPI_ID_0, cfg, &spi0_ctrl[cfg->cs]);\n\n#if (CHIP_SPI_VER >= 2)\n  if (ret == 0) {\n    spi0_cs = cfg->cs;\n  }\n#endif\n\n  int_unlock(lock);\n\n  return ret;\n}\n\nint hal_spi_close(uint32_t cs) {\n  int ret;\n  uint32_t lock;\n\n  lock = int_lock();\n\n  ret = hal_spi_close_id(HAL_SPI_ID_0, cs);\n\n#if (CHIP_SPI_VER >= 2)\n  if (ret == 0 && spi0_cs == cs) {\n    uint32_t lowest_cs;\n\n    lowest_cs = __CLZ(__RBIT(spi_cs_map[HAL_SPI_ID_0]));\n    if (lowest_cs < HAL_SPI_CS_QTY) {\n      hal_spi_activate_cs_id(HAL_SPI_ID_0, lowest_cs);\n    } else {\n      lowest_cs = HAL_SPI_CS_0;\n    }\n    spi0_cs = lowest_cs;\n  }\n#endif\n\n  int_unlock(lock);\n\n  return ret;\n}\n\nint hal_spi_activate_cs(uint32_t cs) {\n  return hal_spi_activate_cs_id(HAL_SPI_ID_0, cs);\n}\n\nint hal_spi_busy(void) { return hal_spi_busy_id(HAL_SPI_ID_0); }\n\nint hal_spi_send(const void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_0])) {\n    return -31;\n  }\n\n  ret = hal_spi_send_id(HAL_SPI_ID_0, data, len);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_0]);\n\n  return ret;\n}\n\nint hal_spi_recv(const void *cmd, void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_0])) {\n    return -31;\n  }\n\n  hal_spi_set_xfer_type_id(HAL_SPI_ID_0, &spi0_ctrl[spi0_cs],\n                           HAL_SPI_XFER_TYPE_RECV);\n  ret = hal_spi_recv_id(HAL_SPI_ID_0, cmd, data, len);\n  hal_spi_set_xfer_type_id(HAL_SPI_ID_0, &spi0_ctrl[spi0_cs],\n                           HAL_SPI_XFER_TYPE_SEND);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_0]);\n\n  return ret;\n}\n\nint hal_spi_dma_send(const void *data, uint32_t len,\n                     HAL_SPI_DMA_HANDLER_T handler) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_0])) {\n    return -31;\n  }\n\n  ret = hal_spi_dma_send_id(HAL_SPI_ID_0, data, len, handler);\n\n  if (ret || handler == NULL) {\n    clear_bool_flag(&in_use[HAL_SPI_ID_0]);\n  }\n\n  return ret;\n}\n\nint hal_spi_dma_recv(const void *cmd, void *data, uint32_t len,\n                     HAL_SPI_DMA_HANDLER_T handler) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_0])) {\n    return -31;\n  }\n\n  hal_spi_set_xfer_type_id(HAL_SPI_ID_0, &spi0_ctrl[spi0_cs],\n                           HAL_SPI_XFER_TYPE_RECV);\n\n  ret = hal_spi_dma_recv_id(HAL_SPI_ID_0, cmd, data, len, handler);\n\n  if (ret || handler == NULL) {\n    hal_spi_set_xfer_type_id(HAL_SPI_ID_0, &spi0_ctrl[spi0_cs],\n                             HAL_SPI_XFER_TYPE_SEND);\n\n    clear_bool_flag(&in_use[HAL_SPI_ID_0]);\n  }\n\n  return ret;\n}\n\nvoid hal_spi_stop_dma_send(void) { hal_spi_stop_dma_send_id(HAL_SPI_ID_0); }\n\nvoid hal_spi_stop_dma_recv(void) { hal_spi_stop_dma_recv_id(HAL_SPI_ID_0); }\n\nint hal_spi_enable_and_send(const struct HAL_SPI_CTRL_T *ctrl, const void *data,\n                            uint32_t len) {\n  return hal_spi_enable_and_send_id(HAL_SPI_ID_0, ctrl, data, len);\n}\n\nint hal_spi_enable_and_recv(const struct HAL_SPI_CTRL_T *ctrl, const void *cmd,\n                            void *data, uint32_t len) {\n  return hal_spi_enable_and_recv_id(HAL_SPI_ID_0, ctrl, cmd, data, len);\n}\n#endif // CHIP_HAS_SPI\n\n#ifdef CHIP_HAS_SPILCD\n//------------------------------------------------------------\n// SPI LCD functions\n//------------------------------------------------------------\n\nint hal_spilcd_open(const struct HAL_SPI_CFG_T *cfg) {\n  int ret;\n  uint32_t lock;\n\n  if (cfg->cs >= HAL_SPI_CS_QTY) {\n    return -1;\n  }\n\n  lock = int_lock();\n\n  ret = hal_spi_open_id(HAL_SPI_ID_SLCD, cfg, &spilcd_ctrl[cfg->cs]);\n\n#if (CHIP_SPI_VER >= 2)\n  if (ret == 0) {\n    spilcd_cs = cfg->cs;\n  }\n#endif\n\n  int_unlock(lock);\n\n  return ret;\n}\n\nint hal_spilcd_close(uint32_t cs) {\n  int ret;\n  uint32_t lock;\n\n  lock = int_lock();\n\n  ret = hal_spi_close_id(HAL_SPI_ID_SLCD, cs);\n\n#if (CHIP_SPI_VER >= 2)\n  if (ret == 0 && spilcd_cs == cs) {\n    uint32_t lowest_cs;\n\n    lowest_cs = __CLZ(__RBIT(spi_cs_map[HAL_SPI_ID_SLCD]));\n    if (lowest_cs < HAL_SPI_CS_QTY) {\n      hal_spi_activate_cs_id(HAL_SPI_ID_SLCD, lowest_cs);\n    } else {\n      lowest_cs = HAL_SPI_CS_0;\n    }\n    spilcd_cs = lowest_cs;\n  }\n#endif\n\n  int_unlock(lock);\n\n  return ret;\n}\n\nint hal_spilcd_activate_cs(uint32_t cs) {\n  return hal_spi_activate_cs_id(HAL_SPI_ID_SLCD, cs);\n}\n\nint hal_spilcd_busy(void) { return hal_spi_busy_id(HAL_SPI_ID_SLCD); }\n\nint hal_spilcd_send(const void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_SLCD])) {\n    return -31;\n  }\n\n  ret = hal_spi_send_id(HAL_SPI_ID_SLCD, data, len);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_SLCD]);\n\n  return ret;\n}\n\nint hal_spilcd_recv(const void *cmd, void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_SLCD])) {\n    return -31;\n  }\n\n  hal_spi_set_xfer_type_id(HAL_SPI_ID_SLCD, &spilcd_ctrl[spilcd_cs],\n                           HAL_SPI_XFER_TYPE_RECV);\n  ret = hal_spi_recv_id(HAL_SPI_ID_SLCD, cmd, data, len);\n  hal_spi_set_xfer_type_id(HAL_SPI_ID_SLCD, &spilcd_ctrl[spilcd_cs],\n                           HAL_SPI_XFER_TYPE_SEND);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_SLCD]);\n\n  return ret;\n}\n\nint hal_spilcd_dma_send(const void *data, uint32_t len,\n                        HAL_SPI_DMA_HANDLER_T handler) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_SLCD])) {\n    return -31;\n  }\n\n  ret = hal_spi_dma_send_id(HAL_SPI_ID_SLCD, data, len, handler);\n\n  if (ret || handler == NULL) {\n    clear_bool_flag(&in_use[HAL_SPI_ID_SLCD]);\n  }\n\n  return ret;\n}\n\nint hal_spilcd_dma_recv(const void *cmd, void *data, uint32_t len,\n                        HAL_SPI_DMA_HANDLER_T handler) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_SLCD])) {\n    return -31;\n  }\n\n  hal_spi_set_xfer_type_id(HAL_SPI_ID_SLCD, &spilcd_ctrl[spilcd_cs],\n                           HAL_SPI_XFER_TYPE_RECV);\n\n  ret = hal_spi_dma_recv_id(HAL_SPI_ID_SLCD, cmd, data, len, handler);\n\n  if (ret || handler == NULL) {\n    hal_spi_set_xfer_type_id(HAL_SPI_ID_SLCD, &spilcd_ctrl[spilcd_cs],\n                             HAL_SPI_XFER_TYPE_SEND);\n\n    clear_bool_flag(&in_use[HAL_SPI_ID_SLCD]);\n  }\n\n  return ret;\n}\n\nvoid hal_spilcd_stop_dma_send(void) {\n  hal_spi_stop_dma_send_id(HAL_SPI_ID_SLCD);\n}\n\nvoid hal_spilcd_stop_dma_recv(void) {\n  hal_spi_stop_dma_recv_id(HAL_SPI_ID_SLCD);\n}\n\nint hal_spilcd_set_data_mode(void) {\n  if (set_bool_flag(&in_use[HAL_SPI_ID_SLCD])) {\n    return -31;\n  }\n\n  spi[HAL_SPI_ID_SLCD]->SSPCR1 |= SPI_LCD_DC_DATA;\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_SLCD]);\n  return 0;\n}\n\nint hal_spilcd_set_cmd_mode(void) {\n  if (set_bool_flag(&in_use[HAL_SPI_ID_SLCD])) {\n    return -31;\n  }\n\n  spi[HAL_SPI_ID_SLCD]->SSPCR1 &= ~SPI_LCD_DC_DATA;\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_SLCD]);\n  return 0;\n}\n\nint hal_spilcd_enable_and_send(const struct HAL_SPI_CTRL_T *ctrl,\n                               const void *data, uint32_t len) {\n  return hal_spi_enable_and_send_id(HAL_SPI_ID_SLCD, ctrl, data, len);\n}\n\nint hal_spilcd_enable_and_recv(const struct HAL_SPI_CTRL_T *ctrl,\n                               const void *cmd, void *data, uint32_t len) {\n  return hal_spi_enable_and_recv_id(HAL_SPI_ID_SLCD, ctrl, cmd, data, len);\n}\n#endif // CHIP_HAS_SPILCD\n\n#ifdef CHIP_HAS_SPIPHY\n//------------------------------------------------------------\n// SPI PHY functions\n//------------------------------------------------------------\n\nint hal_spiphy_open(const struct HAL_SPI_CFG_T *cfg) {\n  SPI_ASSERT(cfg->tx_bits == cfg->rx_bits && cfg->rx_frame_bits == 0,\n             \"SPIPHY: Bad bits cfg\");\n\n  return hal_spi_open_id(HAL_SPI_ID_PHY, cfg, NULL);\n}\n\nint hal_spiphy_close(uint32_t cs) {\n  return hal_spi_close_id(HAL_SPI_ID_PHY, cs);\n}\n\nvoid hal_spiphy_activate_cs(uint32_t cs) {\n  SPI_ASSERT(cs < HAL_SPI_CS_QTY, \"SPIPHY: SPI cs bad: %d\", cs);\n\n  hal_spi_set_cs_id(HAL_SPI_ID_PHY, cs);\n}\n\nint hal_spiphy_busy(void) { return hal_spi_busy_id(HAL_SPI_ID_PHY); }\n\nint hal_spiphy_send(const void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_PHY])) {\n    return -31;\n  }\n\n  ret = hal_spi_send_id(HAL_SPI_ID_PHY, data, len);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_PHY]);\n\n  return ret;\n}\n\nint hal_spiphy_recv(const void *cmd, void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_PHY])) {\n    return -31;\n  }\n\n  ret = hal_spi_recv_id(HAL_SPI_ID_PHY, cmd, data, len);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_PHY]);\n\n  return ret;\n}\n#endif // CHIP_HAS_SPIPHY\n\n#ifdef CHIP_HAS_SPIDPD\n//------------------------------------------------------------\n// SPI DPD functions\n//------------------------------------------------------------\n\nint hal_spidpd_open(const struct HAL_SPI_CFG_T *cfg) {\n  SPI_ASSERT(cfg->rx_frame_bits == 0, \"SPIDPD: Bad bits cfg\");\n\n  return hal_spi_open_id(HAL_SPI_ID_DPD, cfg, &spidpd_ctrl);\n}\n\nint hal_spidpd_close(uint32_t cs) {\n  return hal_spi_close_id(HAL_SPI_ID_DPD, cs);\n}\n\nvoid hal_spidpd_activate_cs(uint32_t cs) {\n  SPI_ASSERT(cs < HAL_SPI_CS_QTY, \"SPIDPD: SPI cs bad: %d\", cs);\n\n  hal_spi_set_cs_id(HAL_SPI_ID_DPD, cs);\n}\n\nint hal_spidpd_busy(void) { return hal_spi_busy_id(HAL_SPI_ID_DPD); }\n\nint hal_spidpd_send(const void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_DPD])) {\n    return -31;\n  }\n\n  ret = hal_spi_send_id(HAL_SPI_ID_DPD, data, len);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_DPD]);\n\n  return ret;\n}\n\nint hal_spidpd_recv(const void *cmd, void *data, uint32_t len) {\n  int ret;\n\n  if (set_bool_flag(&in_use[HAL_SPI_ID_DPD])) {\n    return -31;\n  }\n\n  hal_spi_set_xfer_type_id(HAL_SPI_ID_DPD, &spidpd_ctrl,\n                           HAL_SPI_XFER_TYPE_RECV);\n  ret = hal_spi_recv_id(HAL_SPI_ID_DPD, cmd, data, len);\n  hal_spi_set_xfer_type_id(HAL_SPI_ID_DPD, &spidpd_ctrl,\n                           HAL_SPI_XFER_TYPE_SEND);\n\n  clear_bool_flag(&in_use[HAL_SPI_ID_DPD]);\n\n  return ret;\n}\n#endif // CHIP_HAS_SPIDPD\n\n#endif // !SPI_ROM_ONLY\n"
  },
  {
    "path": "platform/hal/hal_spi.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SPI_H__\n#define __HAL_SPI_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"stdbool.h\"\n#include \"plat_types.h\"\n\nenum HAL_SPI_MOD_CLK_SEL_T {\n    HAL_SPI_MOD_CLK_SEL_NONE,\n    HAL_SPI_MOD_CLK_SEL_OSC,\n    HAL_SPI_MOD_CLK_SEL_OSC_X2,\n    HAL_SPI_MOD_CLK_SEL_PLL,\n};\n\nstruct HAL_SPI_CTRL_T {\n    uint32_t sspcr0_tx;\n    uint32_t sspcr0_rx;\n    uint16_t sspcr1;\n    uint16_t sspcpsr;\n    uint16_t sspdmacr;\n    uint16_t ssprxcr_tx;\n    uint16_t ssprxcr_rx;\n    enum HAL_SPI_MOD_CLK_SEL_T clk_sel;\n};\n\nstruct HAL_SPI_CFG_T {\n    uint32_t rate;\n    bool clk_delay_half :1;\n    bool clk_polarity :1;\n    bool slave :1;\n    bool dma_rx :1;\n    bool dma_tx :1;\n    bool rx_sep_line :1;\n    uint8_t cs;\n    uint8_t tx_bits;\n    uint8_t rx_bits;\n    uint8_t rx_frame_bits;\n};\n\ntypedef void (*HAL_SPI_DMA_HANDLER_T)(int error);\n\n//------------------------------------------------------------\n// SPI common functions\n//------------------------------------------------------------\n\nint hal_spi_init_ctrl(const struct HAL_SPI_CFG_T *cfg, struct HAL_SPI_CTRL_T *ctrl);\n\n//------------------------------------------------------------\n// SPI ROM functions\n//------------------------------------------------------------\n\nint hal_ispi_rom_open(const struct HAL_SPI_CFG_T *cfg);\n\nvoid hal_ispi_rom_activate_cs(uint32_t cs);\n\nint hal_ispi_rom_busy(void);\n\nint hal_ispi_rom_send(const void *data, uint32_t len);\n\nint hal_ispi_rom_recv(const void *cmd, void *data, uint32_t len);\n\nint hal_spiphy_rom_open(const struct HAL_SPI_CFG_T *cfg);\n\nvoid hal_spiphy_rom_close(void);\n\nint hal_spiphy_rom_busy(void);\n\nint hal_spiphy_rom_send(const void *data, uint32_t len);\n\nint hal_spiphy_rom_recv(const void *cmd, void *data, uint32_t len);\n\n//------------------------------------------------------------\n// ISPI functions\n//------------------------------------------------------------\n\nint hal_ispi_open(const struct HAL_SPI_CFG_T *cfg);\n\nint hal_ispi_close(uint32_t cs);\n\nvoid hal_ispi_activate_cs(uint32_t cs);\n\nint hal_ispi_busy(void);\n\nint hal_ispi_send(const void *data, uint32_t len);\n\nint hal_ispi_recv(const void *cmd, void *data, uint32_t len);\n\nint hal_ispi_dma_send(const void *data, uint32_t len, HAL_SPI_DMA_HANDLER_T handler);\n\nint hal_ispi_dma_recv(const void *cmd, void *data, uint32_t len, HAL_SPI_DMA_HANDLER_T handler);\n\nvoid hal_ispi_stop_dma_send(void);\n\nvoid hal_ispi_stop_dma_recv(void);\n\n//------------------------------------------------------------\n// SPI peripheral functions\n//------------------------------------------------------------\n\nint hal_spi_open(const struct HAL_SPI_CFG_T *cfg);\n\nint hal_spi_close(uint32_t cs);\n\nint hal_spi_activate_cs(uint32_t cs);\n\nint hal_spi_busy(void);\n\nint hal_spi_send(const void *data, uint32_t len);\n\nint hal_spi_recv(const void *cmd, void *data, uint32_t len);\n\nint hal_spi_dma_send(const void *data, uint32_t len, HAL_SPI_DMA_HANDLER_T handler);\n\nint hal_spi_dma_recv(const void *cmd, void *data, uint32_t len, HAL_SPI_DMA_HANDLER_T handler);\n\nvoid hal_spi_stop_dma_send(void);\n\nvoid hal_spi_stop_dma_recv(void);\n\nint hal_spi_enable_and_send(const struct HAL_SPI_CTRL_T *ctrl, const void *data, uint32_t len);\n\nint hal_spi_enable_and_recv(const struct HAL_SPI_CTRL_T *ctrl, const void *cmd, void *data, uint32_t len);\n\n//------------------------------------------------------------\n// SPI LCD functions\n//------------------------------------------------------------\n\nint hal_spilcd_open(const struct HAL_SPI_CFG_T *cfg);\n\nint hal_spilcd_close(uint32_t cs);\n\nint hal_spilcd_activate_cs(uint32_t cs);\n\nint hal_spilcd_busy(void);\n\nint hal_spilcd_send(const void *data, uint32_t len);\n\nint hal_spilcd_recv(const void *cmd, void *data, uint32_t len);\n\nint hal_spilcd_dma_send(const void *data, uint32_t len, HAL_SPI_DMA_HANDLER_T handler);\n\nint hal_spilcd_dma_recv(const void *cmd, void *data, uint32_t len, HAL_SPI_DMA_HANDLER_T handler);\n\nvoid hal_spilcd_stop_dma_send(void);\n\nvoid hal_spilcd_stop_dma_recv(void);\n\nint hal_spilcd_set_data_mode(void);\n\nint hal_spilcd_set_cmd_mode(void);\n\nint hal_spilcd_enable_and_send(const struct HAL_SPI_CTRL_T *ctrl, const void *data, uint32_t len);\n\nint hal_spilcd_enable_and_recv(const struct HAL_SPI_CTRL_T *ctrl, const void *cmd, void *data, uint32_t len);\n\n//------------------------------------------------------------\n// SPI PHY functions\n//------------------------------------------------------------\n\nint hal_spiphy_open(const struct HAL_SPI_CFG_T *cfg);\n\nint hal_spiphy_close(uint32_t cs);\n\nvoid hal_spiphy_activate_cs(uint32_t cs);\n\nint hal_spiphy_busy(void);\n\nint hal_spiphy_send(const void *data, uint32_t len);\n\nint hal_spiphy_recv(const void *cmd, void *data, uint32_t len);\n\n//------------------------------------------------------------\n// SPI DPD functions\n//------------------------------------------------------------\n\nint hal_spidpd_open(const struct HAL_SPI_CFG_T *cfg);\n\nint hal_spidpd_close(uint32_t cs);\n\nint hal_spidpd_busy(void);\n\nint hal_spidpd_send(const void *data, uint32_t len);\n\nint hal_spidpd_recv(const void *cmd, void *data, uint32_t len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_sysfreq.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_sysfreq.h\"\n#include \"cmsis.h\"\n#include \"hal_location.h\"\n#include \"hal_trace.h\"\n#include \"plat_types.h\"\n#ifndef ROM_BUILD\n#include \"pmu.h\"\n#endif\n\nstatic uint32_t BOOT_BSS_LOC sysfreq_bundle[(HAL_SYSFREQ_USER_QTY + 3) / 4];\n\nstatic uint8_t *const sysfreq_per_user = (uint8_t *)&sysfreq_bundle[0];\n\nstatic enum HAL_SYSFREQ_USER_T BOOT_DATA_LOC top_user = HAL_SYSFREQ_USER_QTY;\n\nstatic enum HAL_CMU_FREQ_T BOOT_DATA_LOC min_sysfreq = HAL_CMU_FREQ_26M;\n\nstatic enum HAL_CMU_FREQ_T hal_sysfreq_revise_freq(enum HAL_CMU_FREQ_T freq) {\n  return freq > min_sysfreq ? freq : min_sysfreq;\n}\n\nvoid hal_sysfreq_set_min_freq(enum HAL_CMU_FREQ_T freq) {\n  uint32_t lock;\n\n  lock = int_lock();\n\n  if (min_sysfreq < freq) {\n    min_sysfreq = freq;\n    if (min_sysfreq > hal_sysfreq_get()) {\n      hal_cmu_sys_set_freq(min_sysfreq);\n    }\n  }\n\n  int_unlock(lock);\n}\n\nint hal_sysfreq_req(enum HAL_SYSFREQ_USER_T user, enum HAL_CMU_FREQ_T freq) {\n  uint32_t lock;\n  enum HAL_CMU_FREQ_T cur_sys_freq;\n  int i;\n\n  if (user >= HAL_SYSFREQ_USER_QTY) {\n    return 1;\n  }\n  if (freq >= HAL_CMU_FREQ_QTY) {\n    return 2;\n  }\n\n  lock = int_lock();\n\n  cur_sys_freq = hal_sysfreq_get();\n\n  sysfreq_per_user[user] = freq;\n\n  if (freq == cur_sys_freq) {\n    top_user = user;\n  } else if (freq > cur_sys_freq) {\n    top_user = user;\n    freq = hal_sysfreq_revise_freq(freq);\n#ifndef ROM_BUILD\n    pmu_sys_freq_config(freq);\n#ifdef ULTRA_LOW_POWER\n    // Enable PLL if required\n    hal_cmu_low_freq_mode_disable(hal_sysfreq_revise_freq(cur_sys_freq), freq);\n#endif\n#endif\n    hal_cmu_sys_set_freq(freq);\n  } else /* if (freq < cur_sys_freq) */ {\n    if (top_user == user || top_user == HAL_SYSFREQ_USER_QTY) {\n      if (top_user == user) {\n        freq = sysfreq_per_user[0];\n        user = 0;\n        for (i = 1; i < HAL_SYSFREQ_USER_QTY; i++) {\n          if (freq < sysfreq_per_user[i]) {\n            freq = sysfreq_per_user[i];\n            user = i;\n          }\n        }\n      }\n      top_user = user;\n      if (freq != cur_sys_freq) {\n        freq = hal_sysfreq_revise_freq(freq);\n        hal_cmu_sys_set_freq(freq);\n#ifndef ROM_BUILD\n#ifdef ULTRA_LOW_POWER\n        // Disable PLL if capable\n        hal_cmu_low_freq_mode_enable(hal_sysfreq_revise_freq(cur_sys_freq),\n                                     freq);\n#endif\n        pmu_sys_freq_config(freq);\n#endif\n      }\n    }\n  }\n\n  int_unlock(lock);\n\n  return 0;\n}\n\nenum HAL_CMU_FREQ_T hal_sysfreq_get(void) {\n  if (top_user < HAL_SYSFREQ_USER_QTY) {\n    return sysfreq_per_user[top_user];\n  } else {\n    return hal_cmu_sys_get_freq();\n  }\n}\n\nenum HAL_CMU_FREQ_T hal_sysfreq_get_hw_freq(void) {\n  if (top_user < HAL_SYSFREQ_USER_QTY) {\n    return hal_sysfreq_revise_freq(sysfreq_per_user[top_user]);\n  } else {\n    return hal_cmu_sys_get_freq();\n  }\n}\n\nint hal_sysfreq_busy(void) {\n  int i;\n\n  for (i = 0; i < ARRAY_SIZE(sysfreq_bundle); i++) {\n    if (sysfreq_bundle[i] != 0) {\n      return 1;\n    }\n  }\n\n  return 0;\n}\n\nvoid hal_sysfreq_print(void) {\n  int i;\n\n  for (i = 0; i < HAL_SYSFREQ_USER_QTY; i++) {\n    if (sysfreq_per_user[i] != 0) {\n      TRACE(2, \"*** SYSFREQ user=%d freq=%d\", i, sysfreq_per_user[i]);\n    }\n  }\n  TRACE(1, \"*** SYSFREQ top_user=%d\", top_user);\n}\n"
  },
  {
    "path": "platform/hal/hal_sysfreq.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_SYSFREQ_H__\n#define __HAL_SYSFREQ_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_cmu.h\"\n\nenum HAL_SYSFREQ_USER_T {\n    HAL_SYSFREQ_USER_INIT,\n    HAL_SYSFREQ_USER_OVERLAY,\n    HAL_SYSFREQ_USER_USB,\n    HAL_SYSFREQ_USER_BT,\n    HAL_SYSFREQ_USER_ANC,\n\n    HAL_SYSFREQ_USER_APP_0,\n    HAL_SYSFREQ_USER_APP_1,\n    HAL_SYSFREQ_USER_APP_2,\n    HAL_SYSFREQ_USER_APP_3,\n    HAL_SYSFREQ_USER_APP_4,\n    HAL_SYSFREQ_USER_APP_5,\n    HAL_SYSFREQ_USER_APP_6,\n    HAL_SYSFREQ_USER_APP_7,\n    HAL_SYSFREQ_USER_APP_8,\n    HAL_SYSFREQ_USER_APP_9,\n    HAL_SYSFREQ_USER_APP_10,\n    HAL_SYSFREQ_USER_APP_11,\n    HAL_SYSFREQ_USER_APP_12,\n    HAL_SYSFREQ_USER_APP_13,\n    HAL_SYSFREQ_USER_APP_14,\n    HAL_SYSFREQ_USER_APP_15,\n\n    HAL_SYSFREQ_USER_QTY\n};\n\nvoid hal_sysfreq_set_min_freq(enum HAL_CMU_FREQ_T freq);\n\nint hal_sysfreq_req(enum HAL_SYSFREQ_USER_T user, enum HAL_CMU_FREQ_T freq);\n\nenum HAL_CMU_FREQ_T hal_sysfreq_get(void);\n\nenum HAL_CMU_FREQ_T hal_sysfreq_get_hw_freq(void);\n\nint hal_sysfreq_busy(void);\n\nvoid hal_sysfreq_print(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_tdm.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_tdm.h\"\n#include \"hal_dma.h\"\n#include \"hal_i2s.h\"\n#include \"hal_trace.h\"\n#include \n#include \n#include \n#ifndef CHIP_HAS_TDM\n#include \"hal_i2s_tdm.h\"\n#endif\n\n#if 0\n#define TDM_TRACE TRACE\n#define TDM_DUMP8 DUMP8\n#else\n#define TDM_TRACE(n, str, ...)\n#define TDM_DUMP8(str, ...)\n#endif\n\n#ifdef CHIP_HAS_TDM\n\nstatic const char *const invalid_id = \"Invalid I2S ID: %d\\n\";\nstatic inline uint32_t _tdm_get_reg_base(enum HAL_I2S_ID_T id) {\n  ASSERT(id < HAL_I2S_ID_QTY, invalid_id, id);\n  switch (id) {\n  case HAL_I2S_ID_0:\n    return (I2S0_BASE | I2SIP_TDM_CTRL_REG_OFFSET);\n    break;\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n  case HAL_I2S_ID_1:\n    return (I2S1_BASE | I2SIP_TDM_CTRL_REG_OFFSET);\n    break;\n#endif\n  default:\n    break;\n  }\n  return 0;\n}\n\nstatic inline bool tdm_slot_cycles_in_arrays(uint8_t slot_cycles) {\n  if (slot_cycles == (uint8_t)HAL_TDM_SLOT_CYCLES_16 ||\n      slot_cycles == (uint8_t)HAL_TDM_SLOT_CYCLES_32)\n    return true;\n  else\n    return false;\n}\n\nstatic inline bool tdm_cycles_in_arrays(uint16_t cycles) {\n  if (cycles == (uint16_t)HAL_TDM_CYCLES_16 ||\n      cycles == (uint16_t)HAL_TDM_CYCLES_32 ||\n      cycles == (uint16_t)HAL_TDM_CYCLES_64 ||\n      cycles == (uint16_t)HAL_TDM_CYCLES_128 ||\n      cycles == (uint16_t)HAL_TDM_CYCLES_256)\n    return true;\n  else\n    return false;\n}\n\nstatic inline bool tdm_fs_cycles_in_arrays(uint16_t fs_cycles) {\n  if (fs_cycles == (uint16_t)HAL_TDM_FS_CYCLES_1 ||\n      fs_cycles == (uint16_t)HAL_TDM_FS_CYCLES_8 ||\n      fs_cycles == (uint16_t)HAL_TDM_FS_CYCLES_16 ||\n      fs_cycles == (uint16_t)HAL_TDM_FS_CYCLES_32 ||\n      fs_cycles == (uint16_t)HAL_TDM_FS_CYCLES_64 ||\n      fs_cycles == (uint16_t)HAL_TDM_FS_CYCLES_128 ||\n      fs_cycles == (uint16_t)HAL_TDM_FS_CYCLES_ONE_LESS)\n    return true;\n  else\n    return false;\n}\nstatic void tdm_get_config(enum HAL_I2S_ID_T i2s_id,\n                           struct HAL_TDM_CONFIG_T *tdm_config) {\n  volatile uint32_t *base_addr;\n  uint32_t val;\n\n  base_addr = (uint32_t *)_tdm_get_reg_base(i2s_id);\n  val = *base_addr;\n\n  if ((val & (TDM_MODE_FS_ASSERTED_AT_LAST << TDM_MODE_FS_ASSERTED_SHIFT)) ==\n      (TDM_MODE_FS_ASSERTED_AT_LAST << TDM_MODE_FS_ASSERTED_SHIFT)) {\n    tdm_config->mode = HAL_TDM_MODE_FS_ASSERTED_AT_LAST;\n  } else {\n    tdm_config->mode = HAL_TDM_MODE_FS_ASSERTED_AT_FIRST;\n  }\n\n  if ((val & (TDM_FS_EDGE_NEGEDGE << TDM_FS_EDGE_SHIFT)) ==\n      (TDM_FS_EDGE_NEGEDGE << TDM_FS_EDGE_SHIFT)) {\n    tdm_config->edge = HAL_TDM_FS_EDGE_NEGEDGE;\n  } else {\n    tdm_config->edge = HAL_TDM_FS_EDGE_POSEDGE;\n  }\n\n  if ((val & (TDM_FRAME_WIDTH_16_CYCLES << TDM_FRAME_WIDTH_SHIFT)) ==\n      (TDM_FRAME_WIDTH_16_CYCLES << TDM_FRAME_WIDTH_SHIFT)) {\n    tdm_config->cycles = HAL_TDM_CYCLES_16;\n  } else if ((val & (TDM_FRAME_WIDTH_32_CYCLES << TDM_FRAME_WIDTH_SHIFT)) ==\n             (TDM_FRAME_WIDTH_32_CYCLES << TDM_FRAME_WIDTH_SHIFT)) {\n    tdm_config->cycles = HAL_TDM_CYCLES_32;\n  } else if ((val & (TDM_FRAME_WIDTH_64_CYCLES << TDM_FRAME_WIDTH_SHIFT)) ==\n             (TDM_FRAME_WIDTH_64_CYCLES << TDM_FRAME_WIDTH_SHIFT)) {\n    tdm_config->cycles = HAL_TDM_CYCLES_64;\n  } else if ((val & (TDM_FRAME_WIDTH_128_CYCLES << TDM_FRAME_WIDTH_SHIFT)) ==\n             (TDM_FRAME_WIDTH_128_CYCLES << TDM_FRAME_WIDTH_SHIFT)) {\n    tdm_config->cycles = HAL_TDM_CYCLES_128;\n  } else if ((val & (TDM_FRAME_WIDTH_256_CYCLES << TDM_FRAME_WIDTH_SHIFT)) ==\n             (TDM_FRAME_WIDTH_256_CYCLES << TDM_FRAME_WIDTH_SHIFT)) {\n    tdm_config->cycles = HAL_TDM_CYCLES_256;\n  } else {\n    tdm_config->cycles = HAL_TDM_CYCLES_256;\n  }\n\n  if ((val & (TDM_FS_WIDTH_8_CYCLES << TDM_FS_WIDTH_SHIFT)) ==\n      (TDM_FS_WIDTH_8_CYCLES << TDM_FS_WIDTH_SHIFT)) {\n    tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_8;\n  } else if ((val & (TDM_FS_WIDTH_16_CYCLES << TDM_FS_WIDTH_SHIFT)) ==\n             (TDM_FS_WIDTH_16_CYCLES << TDM_FS_WIDTH_SHIFT)) {\n    tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_16;\n  } else if ((val & (TDM_FS_WIDTH_32_CYCLES << TDM_FS_WIDTH_SHIFT)) ==\n             (TDM_FS_WIDTH_32_CYCLES << TDM_FS_WIDTH_SHIFT)) {\n    tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_32;\n  } else if ((val & (TDM_FS_WIDTH_64_CYCLES << TDM_FS_WIDTH_SHIFT)) ==\n             (TDM_FS_WIDTH_64_CYCLES << TDM_FS_WIDTH_SHIFT)) {\n    tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_64;\n  } else if ((val & (TDM_FS_WIDTH_128_CYCLES << TDM_FS_WIDTH_SHIFT)) ==\n             (TDM_FS_WIDTH_128_CYCLES << TDM_FS_WIDTH_SHIFT)) {\n    tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_128;\n  } else if ((val & (TDM_FS_WIDTH_1_CYCLE << TDM_FS_WIDTH_SHIFT)) ==\n             (TDM_FS_WIDTH_1_CYCLE << TDM_FS_WIDTH_SHIFT)) {\n    tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_ONE_LESS;\n  } else {\n    tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_ONE_LESS;\n  }\n\n  if ((val & (TDM_SLOT_WIDTH_16_BIT << TDM_SLOT_WIDTH_SHIFT)) ==\n      (TDM_SLOT_WIDTH_16_BIT << TDM_SLOT_WIDTH_SHIFT)) {\n    tdm_config->slot_cycles = HAL_TDM_SLOT_CYCLES_16;\n  } else {\n    tdm_config->slot_cycles = HAL_TDM_SLOT_CYCLES_32;\n  }\n\n  tdm_config->data_offset = ((val >> TDM_DATA_OFFSET_SHIT) & 0x7);\n}\n\nstatic void tdm_set_config(enum HAL_I2S_ID_T i2s_id,\n                           struct HAL_TDM_CONFIG_T *tdm_config) {\n  volatile uint32_t *base_addr;\n  uint32_t val = 0;\n\n  base_addr = (uint32_t *)_tdm_get_reg_base(i2s_id);\n  ASSERT(tdm_config->mode < HAL_TDM_MODE_NUM, \"%s: mode = %d error!\", __func__,\n         tdm_config->mode);\n  ASSERT(tdm_config->edge < HAL_TDM_FS_EDGE_NUM, \"%s: edge = %d error!\",\n         __func__, tdm_config->edge);\n  ASSERT(tdm_cycles_in_arrays((uint16_t)tdm_config->cycles),\n         \"%s: cycles = %d error!\", __func__, tdm_config->cycles);\n  ASSERT(tdm_fs_cycles_in_arrays((uint16_t)tdm_config->fs_cycles),\n         \"%s: fs_cycles = %d cycles = %d error!\", __func__,\n         tdm_config->fs_cycles, tdm_config->cycles);\n  ASSERT(tdm_slot_cycles_in_arrays((uint8_t)tdm_config->slot_cycles),\n         \"%s: slot_cycles = %d error!\", __func__, tdm_config->slot_cycles);\n\n  if (tdm_config->mode == HAL_TDM_MODE_FS_ASSERTED_AT_LAST) {\n    val |= (TDM_MODE_FS_ASSERTED_AT_LAST << TDM_MODE_FS_ASSERTED_SHIFT);\n  }\n\n  if (tdm_config->edge == HAL_TDM_FS_EDGE_NEGEDGE) {\n    val |= (TDM_FS_EDGE_NEGEDGE << TDM_FS_EDGE_SHIFT);\n  }\n\n  if (tdm_config->cycles == HAL_TDM_CYCLES_16) {\n    val |= (TDM_FRAME_WIDTH_16_CYCLES << TDM_FRAME_WIDTH_SHIFT);\n  } else if (tdm_config->cycles == HAL_TDM_CYCLES_32) {\n    val |= (TDM_FRAME_WIDTH_32_CYCLES << TDM_FRAME_WIDTH_SHIFT);\n  } else if (tdm_config->cycles == HAL_TDM_CYCLES_64) {\n    val |= (TDM_FRAME_WIDTH_64_CYCLES << TDM_FRAME_WIDTH_SHIFT);\n  } else if (tdm_config->cycles == HAL_TDM_CYCLES_128) {\n    val |= (TDM_FRAME_WIDTH_128_CYCLES << TDM_FRAME_WIDTH_SHIFT);\n  } else {\n    val |= (TDM_FRAME_WIDTH_256_CYCLES << TDM_FRAME_WIDTH_SHIFT);\n  }\n\n  if (tdm_config->fs_cycles == HAL_TDM_FS_CYCLES_8) {\n    val |= (TDM_FS_WIDTH_8_CYCLES << TDM_FS_WIDTH_SHIFT);\n  } else if (tdm_config->fs_cycles == HAL_TDM_FS_CYCLES_16) {\n    val |= (TDM_FS_WIDTH_16_CYCLES << TDM_FS_WIDTH_SHIFT);\n  } else if (tdm_config->fs_cycles == HAL_TDM_FS_CYCLES_32) {\n    val |= (TDM_FS_WIDTH_32_CYCLES << TDM_FS_WIDTH_SHIFT);\n  } else if (tdm_config->fs_cycles == HAL_TDM_FS_CYCLES_64) {\n    val |= (TDM_FS_WIDTH_64_CYCLES << TDM_FS_WIDTH_SHIFT);\n  } else if (tdm_config->fs_cycles == HAL_TDM_FS_CYCLES_128) {\n    val |= (TDM_FS_WIDTH_128_CYCLES << TDM_FS_WIDTH_SHIFT);\n  } else {\n    val |= (TDM_FS_WIDTH_FRAME_LENGTH_1_CYCLES << TDM_FS_WIDTH_SHIFT);\n  }\n\n  if (tdm_config->slot_cycles == HAL_TDM_SLOT_CYCLES_16) {\n    val |= (TDM_SLOT_WIDTH_16_BIT << TDM_SLOT_WIDTH_SHIFT);\n  }\n\n  if (tdm_config->data_offset >= TDM_DATA_OFFSET_MIN &&\n      tdm_config->data_offset <= TDM_DATA_OFFSET_MAX) {\n    val |= (tdm_config->data_offset << TDM_DATA_OFFSET_SHIT);\n  }\n\n  *base_addr = val;\n}\n\nstatic void tdm_get_default_config(struct HAL_TDM_CONFIG_T *tdm_config) {\n  tdm_config->mode = HAL_TDM_MODE_FS_ASSERTED_AT_FIRST;\n  tdm_config->edge = HAL_TDM_FS_EDGE_POSEDGE;\n  tdm_config->cycles = HAL_TDM_CYCLES_32;\n  tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_1;\n  tdm_config->slot_cycles = HAL_TDM_SLOT_CYCLES_32;\n  tdm_config->data_offset = 0;\n}\n\nstatic void tdm_get_i2s_config(struct HAL_TDM_CONFIG_T *tdm_config) {\n  tdm_config->mode = HAL_TDM_MODE_FS_ASSERTED_AT_LAST;\n  tdm_config->edge = HAL_TDM_FS_EDGE_NEGEDGE;\n  tdm_config->cycles = HAL_TDM_CYCLES_32;\n  tdm_config->fs_cycles = HAL_TDM_FS_CYCLES_16;\n  tdm_config->slot_cycles = HAL_TDM_SLOT_CYCLES_16;\n  tdm_config->data_offset = 0;\n}\n\nstatic void tdm_enable(enum HAL_I2S_ID_T i2s_id, bool enable) {\n  volatile uint32_t *base_addr;\n  uint32_t val = 0;\n\n  base_addr = (uint32_t *)_tdm_get_reg_base(i2s_id);\n  val = *base_addr;\n\n  if (enable) {\n    val |= (TDM_ENABLE << TDM_ENABLE_SHIFT);\n  } else {\n    val &= ~(TDM_ENABLE << TDM_ENABLE_SHIFT);\n  }\n  *base_addr = val;\n}\n\nstatic int32_t tdm_open(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream,\n                        enum HAL_I2S_MODE_T mode) {\n  int ret;\n  struct HAL_TDM_CONFIG_T tdm_config;\n\n  TDM_TRACE(4, \"%s: i2s_id = %d, stream = %d, mode = %d.\", __func__, i2s_id,\n            stream, mode);\n  ret = hal_i2s_open(i2s_id, stream, mode);\n  if (ret) {\n    TDM_TRACE(2, \"%s: hal_i2s_open failed.ret = %d.\", __func__, ret);\n  }\n  tdm_enable(i2s_id, false);\n  tdm_get_default_config(&tdm_config);\n  tdm_set_config(i2s_id, &tdm_config);\n  TDM_TRACE(1, \"%s: done.\", __func__);\n  return ret;\n}\n\nstatic int32_t tdm_setup_stream(enum HAL_I2S_ID_T i2s_id,\n                                enum AUD_STREAM_T stream, uint32_t sample_rate,\n                                struct HAL_TDM_CONFIG_T *tdm_cfg) {\n  struct HAL_I2S_CONFIG_T i2s_cfg;\n  uint32_t cycles;\n  const uint8_t bits = 16;\n  int ret;\n\n  TDM_TRACE(4, \"%s: i2s_id = %d, stream = %d, sample_rate = %d\", __func__,\n            i2s_id, stream, sample_rate);\n  TDM_TRACE(5,\n            \"%s: tdm_cfg: mode = %d,edge = %d,cycles = %d,fs_cycles = %d,\"\n            \"slot_cycles= %d, offs = %d.\",\n            __func__, tdm_cfg->mode, tdm_cfg->edge, tdm_cfg->cycles,\n            tdm_cfg->fs_cycles, tdm_cfg->slot_cycles, tdm_cfg->data_offset);\n  cycles = tdm_cfg->cycles;\n  ASSERT(tdm_cycles_in_arrays(cycles), \"%s: cycles = %d error!\", __func__,\n         tdm_cfg->cycles);\n  memset(&i2s_cfg, 0, sizeof(i2s_cfg));\n  i2s_cfg.use_dma = true;\n  i2s_cfg.sync_start = tdm_cfg->sync_start;\n  i2s_cfg.chan_sep_buf = false;\n  i2s_cfg.bits = bits;\n  i2s_cfg.channel_num = 2;\n  i2s_cfg.channel_map = AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1;\n  i2s_cfg.sample_rate = sample_rate * (cycles / bits) / 2;\n  ret = hal_i2s_setup_stream(i2s_id, stream, &i2s_cfg);\n  if (ret) {\n    TDM_TRACE(2, \"%s: playback failed.ret = %d.\", __func__, ret);\n  } else {\n    tdm_enable(i2s_id, false);\n    tdm_set_config(i2s_id, tdm_cfg);\n  }\n\n  TDM_TRACE(1, \"%s done.\", __func__);\n  return ret;\n}\n\nint32_t tdm_as_i2s_setup_stream(enum HAL_I2S_ID_T i2s_id,\n                                enum AUD_STREAM_T stream,\n                                uint32_t sample_rate) {\n  struct HAL_I2S_CONFIG_T i2s_cfg;\n  struct HAL_TDM_CONFIG_T tdm_cfg;\n  int ret;\n\n  TDM_TRACE(4, \"%s: i2s_id = %d, stream = %d, sample_rate = 0x%x.\", __func__,\n            i2s_id, stream, sample_rate);\n  memset(&i2s_cfg, 0, sizeof(i2s_cfg));\n  i2s_cfg.use_dma = true;\n  i2s_cfg.sync_start = stream == AUD_STREAM_PLAYBACK ? true : false;\n  i2s_cfg.chan_sep_buf = false;\n  i2s_cfg.bits = 16;\n  i2s_cfg.channel_num = 2;\n  i2s_cfg.channel_map = AUD_CHANNEL_MAP_CH0 | AUD_CHANNEL_MAP_CH1;\n  i2s_cfg.sample_rate = sample_rate;\n  ret = hal_i2s_setup_stream(i2s_id, stream, &i2s_cfg);\n  if (ret) {\n    TDM_TRACE(2, \"%s: playback failed.ret = %d.\", __func__, ret);\n  } else {\n    tdm_enable(i2s_id, false);\n    tdm_get_i2s_config(&tdm_cfg);\n    tdm_set_config(i2s_id, &tdm_cfg);\n  }\n\n  TDM_TRACE(1, \"%s: done.\", __func__);\n  return ret;\n}\n\nstatic int32_t tdm_start_stream(enum HAL_I2S_ID_T i2s_id,\n                                enum AUD_STREAM_T stream) {\n  int ret;\n\n  TDM_TRACE(3, \"%s: i2s_id = %d, stream = %d.\", __func__, i2s_id, stream);\n  tdm_enable(i2s_id, true);\n  ret = hal_i2s_start_stream(i2s_id, stream);\n\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nstatic int32_t tdm_stop_stream(enum HAL_I2S_ID_T i2s_id,\n                               enum AUD_STREAM_T stream) {\n  int ret;\n\n  TDM_TRACE(3, \"%s: i2s_id = %d, stream = %d.\", __func__, i2s_id, stream);\n  tdm_enable(i2s_id, false);\n\n  ret = hal_i2s_stop_stream(i2s_id, stream);\n\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nstatic int32_t tdm_close(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream) {\n  int ret;\n\n  TDM_TRACE(3, \"%s: i2s_id = %d, stream = %d.\", __func__, i2s_id, stream);\n  tdm_enable(i2s_id, false);\n\n  ret = hal_i2s_close(i2s_id, stream);\n\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n#endif // CHIP_HAS_TDM\n\nint32_t hal_tdm_open(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream,\n                     enum HAL_I2S_MODE_T mode) {\n  int ret;\n\n  TDM_TRACE(3, \"hal_tdm_open:i2s_id = %d, stream = %d, mode = %d.\", i2s_id,\n            stream, mode);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n\n#ifdef CHIP_HAS_TDM\n  ret = tdm_open(i2s_id, stream, mode);\n#else\n  ASSERT(stream == AUD_STREAM_CAPTURE, \"stream = AUD_STREAM_PLAYBACK!\");\n  ret = hal_i2s_tdm_open(i2s_id, mode);\n#endif\n\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nint32_t hal_tdm_setup_stream(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream,\n                             uint32_t sample_rate,\n                             struct HAL_TDM_CONFIG_T *tdm_cfg) {\n  int ret;\n\n  TDM_TRACE(4, \"%s:i2s_id = %d, stream = %d, sample_rate = %d.\", __func__,\n            i2s_id, stream, sample_rate);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n  TDM_TRACE(4, \"%s: cycles = %d, fs_cycles = %d,slot_cycles = %d.\", __func__,\n            tdm_cfg->cycles, tdm_cfg->fs_cycles, tdm_cfg->slot_cycles);\n\n#ifdef CHIP_HAS_TDM\n  ret = tdm_setup_stream(i2s_id, stream, sample_rate, tdm_cfg);\n#else\n  struct HAL_I2S_TDM_CONFIG_T i2s_tdm_cfg;\n\n  i2s_tdm_cfg.cycles = (enum HAL_I2S_TDM_CYCLES_T)tdm_cfg->cycles;\n  i2s_tdm_cfg.fs_cycles = (enum HAL_I2S_TDM_FS_CYCLES_T)tdm_cfg->fs_cycles;\n  i2s_tdm_cfg.slot_cycles =\n      (enum HAL_I2S_TDM_SLOT_CYCLES_T)tdm_cfg->slot_cycles;\n  i2s_tdm_cfg.data_offset = tdm_cfg->data_offset;\n  ret = hal_i2s_tdm_setup(i2s_id, sample_rate, &i2s_tdm_cfg);\n#endif\n\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nint32_t hal_tdm_as_i2s_setup_stream(enum HAL_I2S_ID_T i2s_id,\n                                    enum AUD_STREAM_T stream,\n                                    uint32_t sample_rate) {\n  int ret;\n\n  TDM_TRACE(4, \"%s: i2s_id = %d, stream = %d, sample_rate = %d.\", __func__,\n            i2s_id, stream, sample_rate);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n\n  // i2s setup stream playback and capture.\n#ifdef CHIP_HAS_TDM\n  ret = tdm_as_i2s_setup_stream(i2s_id, stream, sample_rate);\n#else\n  struct HAL_I2S_TDM_CONFIG_T i2s_tdm_cfg = {\n      HAL_I2S_TDM_CYCLES_32,\n      HAL_I2S_TDM_FS_CYCLES_16,\n      HAL_I2S_TDM_SLOT_CYCLES_16,\n  };\n  ret = hal_i2s_tdm_setup(i2s_id, sample_rate, &i2s_tdm_cfg);\n#endif\n\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nint32_t hal_tdm_start_stream(enum HAL_I2S_ID_T i2s_id,\n                             enum AUD_STREAM_T stream) {\n  int ret;\n\n  TDM_TRACE(3, \"%s: i2s_id = %d stream = %d.\", __func__, i2s_id, stream);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n\n#ifdef CHIP_HAS_TDM\n  ret = tdm_start_stream(i2s_id, stream);\n#else\n  ret = hal_i2s_tdm_start_stream(i2s_id);\n#endif\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nint32_t hal_tdm_stop_stream(enum HAL_I2S_ID_T i2s_id,\n                            enum AUD_STREAM_T stream) {\n  int32_t ret;\n\n  TDM_TRACE(3, \"%s: i2s_id = %d stream = %d.\", __func__, i2s_id, stream);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n#ifdef CHIP_HAS_TDM\n  ret = tdm_stop_stream(i2s_id, stream);\n#else\n  ret = hal_i2s_tdm_stop_stream(i2s_id);\n#endif\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nint32_t hal_tdm_close(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream) {\n  int32_t ret;\n\n  TDM_TRACE(3, \"%s: i2s_id = %d stream = %d.\", __func__, i2s_id, stream);\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n#ifdef CHIP_HAS_TDM\n  ret = tdm_close(i2s_id, stream);\n#else\n  ret = hal_i2s_tdm_close(i2s_id);\n#endif\n  TDM_TRACE(2, \"%s done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nvoid hal_tdm_get_config(enum HAL_I2S_ID_T i2s_id,\n                        struct HAL_TDM_CONFIG_T *tdm_cfg) {\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n#ifdef CHIP_HAS_TDM\n  tdm_get_config(i2s_id, tdm_cfg);\n#else\n  struct HAL_I2S_TDM_CONFIG_T i2s_tdm_cfg;\n  hal_i2s_tdm_get_config(i2s_id, &i2s_tdm_cfg);\n  tdm_cfg->mode = HAL_TDM_MODE_FS_ASSERTED_AT_FIRST;\n  tdm_cfg->edge = HAL_TDM_FS_EDGE_POSEDGE;\n  tdm_cfg->cycles = (enum HAL_TDM_CYCLES_T)i2s_tdm_cfg.cycles;\n  tdm_cfg->fs_cycles = (enum HAL_TDM_FS_CYCLES)i2s_tdm_cfg.fs_cycles;\n  tdm_cfg->slot_cycles = (enum HAL_TDM_SLOT_CYCLES_T)i2s_tdm_cfg.slot_cycles;\n  tdm_cfg->data_offset = i2s_tdm_cfg.data_offset;\n#endif\n}\n\nvoid hal_tdm_set_config(enum HAL_I2S_ID_T i2s_id,\n                        struct HAL_TDM_CONFIG_T *tdm_cfg) {\n  ASSERT(i2s_id < HAL_I2S_ID_QTY, \"%s: i2s_id = %d!\", __func__, i2s_id);\n#ifdef CHIP_HAS_TDM\n  tdm_set_config(i2s_id, tdm_cfg);\n#else\n  struct HAL_I2S_TDM_CONFIG_T i2s_tdm_cfg;\n  i2s_tdm_cfg.cycles = HAL_I2S_TDM_CYCLES_32;\n  i2s_tdm_cfg.fs_cycles = HAL_I2S_TDM_FS_CYCLES_16;\n  i2s_tdm_cfg.slot_cycles = HAL_I2S_TDM_SLOT_CYCLES_16;\n  i2s_tdm_cfg.data_offset = 0;\n  hal_i2s_tdm_set_config(i2s_id, &i2s_tdm_cfg);\n#endif\n}\n"
  },
  {
    "path": "platform/hal/hal_tdm.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_TDM_H__\n#define __HAL_TDM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"reg_tdm.h\"\n#include \"hal_i2s.h\"\n\n#define TDM_BUF_ALIGN __attribute__((aligned(0x100)))\n\nenum HAL_TDM_ENABLE_T {\n    HAL_TDM_DISABLE,\n    HAL_TDM_ENABLE,\n    HAL_TDM_ENABLE_NUM,\n};\n\nenum HAL_TDM_MODE_T {\n    HAL_TDM_MODE_FS_ASSERTED_AT_FIRST,\n    HAL_TDM_MODE_FS_ASSERTED_AT_LAST,\n    HAL_TDM_MODE_NUM,\n};\n\nenum HAL_TDM_FS_EDGE_T {\n    HAL_TDM_FS_EDGE_POSEDGE,\n    HAL_TDM_FS_EDGE_NEGEDGE,\n    HAL_TDM_FS_EDGE_NUM,\n};\n\nenum HAL_TDM_CYCLES_T {\n    HAL_TDM_CYCLES_16     = 16,\n    HAL_TDM_CYCLES_32     = 32,\n    HAL_TDM_CYCLES_64     = 64,\n    HAL_TDM_CYCLES_128    = 128,\n    HAL_TDM_CYCLES_256    = 256,\n    HAL_TDM_CYCLES_512    = 512,\n};\n\nenum HAL_TDM_FS_CYCLES {\n    HAL_TDM_FS_CYCLES_ONE_LESS = 0,\n    HAL_TDM_FS_CYCLES_1     = 1,\n    HAL_TDM_FS_CYCLES_8    = 8,\n    HAL_TDM_FS_CYCLES_16   = 16,\n    HAL_TDM_FS_CYCLES_32   = 32,\n    HAL_TDM_FS_CYCLES_64   = 64,\n    HAL_TDM_FS_CYCLES_128  = 128,\n    HAL_TDM_FS_CYCLES_256  = 256,\n};\n\nenum HAL_TDM_SLOT_CYCLES_T {\n    HAL_TDM_SLOT_CYCLES_32 = 32,\n    HAL_TDM_SLOT_CYCLES_16 = 16,\n};\n\nstruct HAL_TDM_CONFIG_T {\n    enum HAL_TDM_MODE_T mode;\n    enum HAL_TDM_FS_EDGE_T edge;\n    enum HAL_TDM_CYCLES_T cycles;\n    enum HAL_TDM_FS_CYCLES fs_cycles;\n    enum HAL_TDM_SLOT_CYCLES_T slot_cycles;\n    uint32_t data_offset;\n    bool sync_start;\n};\n\nint32_t hal_tdm_open(enum HAL_I2S_ID_T i2s_id,enum AUD_STREAM_T stream,enum HAL_I2S_MODE_T mode);\nint32_t hal_tdm_setup_stream(enum HAL_I2S_ID_T i2s_id,\n                                       enum AUD_STREAM_T stream,\n                                       uint32_t sample_rate,\n                                       struct HAL_TDM_CONFIG_T *tdm_cfg);\nint32_t hal_tdm_as_i2s_setup_stream(enum HAL_I2S_ID_T i2s_id,\n                                       enum AUD_STREAM_T stream,\n                                       uint32_t sample_rate);\nint32_t hal_tdm_start_stream(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream);\nint32_t hal_tdm_stop_stream(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream);\nint32_t hal_tdm_close(enum HAL_I2S_ID_T i2s_id, enum AUD_STREAM_T stream);\nvoid hal_tdm_get_config(enum HAL_I2S_ID_T i2s_id,struct HAL_TDM_CONFIG_T *tdm_cfg);\nvoid hal_tdm_set_config(enum HAL_I2S_ID_T i2s_id,struct HAL_TDM_CONFIG_T *tdm_cfg);\n#ifdef __cplusplus\n}\n#endif\n\n#endif // __HAL_TDM_H__"
  },
  {
    "path": "platform/hal/hal_timer.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_timer.h\"\n#include \"plat_addr_map.h\"\n#define IGNORE_HAL_TIMER_RAW_API_CHECK\n#include \"cmsis_nvic.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer_raw.h\"\n#include \"reg_timer.h\"\n\n//#define ELAPSED_TIMER_ENABLED\n\n#if defined(CHIP_BEST3001) || defined(CHIP_BEST3003) ||                        \\\n    defined(CHIP_BEST3005) || defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n#define CLOCK_SYNC_WORKAROUND\n#endif\n\n#ifdef LOW_SYS_FREQ\n#if defined(CHIP_BEST1305) || defined(CHIP_BEST1501) ||                        \\\n    defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                       \\\n    defined(CHIP_BEST2300A)\n#define FAST_TIMER_WORKAROUND\n#endif\n#endif\n\n#if defined(__FPU_USED) && (__FPU_USED == 1)\n//#define TIMER_USE_FPU\n#endif\n\n#define SLOW_TIMER_VAL_DELTA 1\n#define SLOW_TIMER_VAL_DELTA_SLEEP 10\n#define FAST_TIMER_VAL_DELTA 20\n\n#ifdef CALIB_SLOW_TIMER\n#define MAX_CALIB_SYSTICK_HZ (CONFIG_SYSTICK_HZ_NOMINAL * 2)\n\n#define MIN_CALIB_TICKS (10 * (CONFIG_SYSTICK_HZ_NOMINAL / 1000))\n\n#define MAX_CALIB_TICKS (30 * CONFIG_SYSTICK_HZ_NOMINAL)\n\nstatic uint32_t BOOT_DATA_LOC sys_tick_hz = CONFIG_SYSTICK_HZ_NOMINAL;\nstatic uint32_t BOOT_BSS_LOC slow_val;\nstatic uint32_t BOOT_BSS_LOC fast_val;\n#endif\n\nstatic struct DUAL_TIMER_T *const BOOT_RODATA_SRAM_LOC dual_timer0 =\n    (struct DUAL_TIMER_T *)TIMER0_BASE;\n#ifdef TIMER1_BASE\nstatic struct DUAL_TIMER_T *const BOOT_RODATA_SRAM_LOC dual_timer1 =\n    (struct DUAL_TIMER_T *)TIMER1_BASE;\n#endif\n\nstatic HAL_TIMER_IRQ_HANDLER_T irq_handler = NULL;\n\n// static uint32_t load_value = 0;\nstatic uint32_t start_time;\n\nstatic void POSSIBLY_UNUSED hal_timer00_irq_handler(void);\nstatic void hal_timer01_irq_handler(void);\n\n__STATIC_FORCEINLINE uint32_t get_timer_value(struct TIMER_T *timer,\n                                              uint32_t delta) {\n#ifdef CLOCK_SYNC_WORKAROUND\n  uint32_t lock;\n  uint32_t v1, v2;\n\n  lock = int_lock();\n  do {\n    v1 = timer->Value;\n    v2 = timer->Value;\n  } while ((v1 < v2) || (v1 > v2 + delta));\n  int_unlock(lock);\n\n  return v2;\n#else\n  return timer->Value;\n#endif\n}\n\n__STATIC_FORCEINLINE void clear_timer_irq(struct TIMER_T *timer) {\n#ifdef CLOCK_SYNC_WORKAROUND\n  do {\n    timer->IntClr = 1;\n  } while (timer->RIS & TIMER_RIS_RIS);\n#else\n  timer->IntClr = 1;\n#endif\n}\n\n__STATIC_FORCEINLINE void set_timer_load(struct TIMER_T *timer, uint32_t load,\n                                         uint32_t delta) {\n#ifdef CLOCK_SYNC_WORKAROUND\n  uint32_t lock;\n  uint32_t val;\n\n  lock = int_lock();\n  do {\n    timer->Load = load;\n    val = timer->Value;\n  } while ((load < val) || (load > val + delta));\n  int_unlock(lock);\n#else\n  timer->Load = load;\n#endif\n}\n\n__STATIC_FORCEINLINE void fast_timer_open(void) {\n#ifdef TIMER1_BASE\n  hal_cmu_timer1_select_fast();\n  dual_timer1->timer[0].Control =\n      TIMER_CTRL_EN | TIMER_CTRL_PRESCALE_DIV_1 | TIMER_CTRL_SIZE_32_BIT;\n#endif\n}\n\nvoid BOOT_TEXT_FLASH_LOC hal_sys_timer_open(void) {\n  hal_cmu_timer0_select_slow();\n  dual_timer0->timer[0].Control =\n      TIMER_CTRL_EN | TIMER_CTRL_PRESCALE_DIV_1 | TIMER_CTRL_SIZE_32_BIT;\n  fast_timer_open();\n  ;\n}\n\n#ifdef CORE_SLEEP_POWER_DOWN\nvoid SRAM_TEXT_LOC hal_sys_timer_wakeup(void) {\n  fast_timer_open();\n  ;\n}\n#endif\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_sys_timer_get(void) {\n  return -get_timer_value(&dual_timer0->timer[0], SLOW_TIMER_VAL_DELTA);\n}\n\n#ifdef CLOCK_SYNC_WORKAROUND\nuint32_t SRAM_TEXT_LOC hal_sys_timer_get_in_sleep(void) {\n  return -get_timer_value(&dual_timer0->timer[0], SLOW_TIMER_VAL_DELTA_SLEEP);\n}\n#else\nuint32_t hal_sys_timer_get_in_sleep(void)\n    __attribute__((alias(\"hal_sys_timer_get\")));\n#endif\n\nuint32_t BOOT_TEXT_FLASH_LOC flash_hal_sys_timer_get(void) {\n  return -get_timer_value(&dual_timer0->timer[0], SLOW_TIMER_VAL_DELTA);\n}\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_sys_ms_get(void) { return GET_CURRENT_MS(); }\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_fast_sys_timer_get(void) {\n#ifdef TIMER1_BASE\n#ifdef FAST_TIMER_WORKAROUND\n  if (hal_cmu_fast_timer_offline()) {\n#ifdef TIMER_USE_FPU\n    return (uint32_t)(hal_sys_timer_get() *\n                      ((float)CONFIG_FAST_SYSTICK_HZ / CONFIG_SYSTICK_HZ));\n#else\n    return (uint32_t)(hal_sys_timer_get() * (uint64_t)CONFIG_FAST_SYSTICK_HZ /\n                      CONFIG_SYSTICK_HZ);\n#endif\n  }\n#endif // FAST_TIMER_WORKAROUND\n  return -get_timer_value(&dual_timer1->timer[0], FAST_TIMER_VAL_DELTA);\n#else\n  return 0;\n#endif\n}\n\nuint32_t hal_sys_timer_get_max(void) { return 0xFFFFFFFF; }\n\nvoid BOOT_TEXT_SRAM_LOC hal_sys_timer_delay(uint32_t ticks) {\n  uint32_t start = hal_sys_timer_get();\n\n  while (hal_sys_timer_get() - start < ticks)\n    ;\n}\n\n#ifdef CLOCK_SYNC_WORKAROUND\nvoid SRAM_TEXT_LOC hal_sys_timer_delay_in_sleep(uint32_t ticks) {\n  uint32_t start = hal_sys_timer_get_in_sleep();\n\n  while (hal_sys_timer_get_in_sleep() - start < ticks)\n    ;\n}\n#else\nvoid hal_sys_timer_delay_in_sleep(uint32_t ticks)\n    __attribute__((alias(\"hal_sys_timer_delay\")));\n#endif\n\nvoid BOOT_TEXT_FLASH_LOC flash_hal_sys_timer_delay(uint32_t ticks) {\n  uint32_t start = flash_hal_sys_timer_get();\n\n  while (flash_hal_sys_timer_get() - start < ticks)\n    ;\n}\n\nvoid BOOT_TEXT_SRAM_LOC hal_sys_timer_delay_us(uint32_t us) {\n#ifdef TIMER1_BASE\n#ifdef FAST_TIMER_WORKAROUND\n  if (hal_cmu_fast_timer_offline()) {\n    uint32_t start = hal_sys_timer_get();\n    uint32_t ticks = US_TO_TICKS(us);\n\n    while (hal_sys_timer_get() - start < ticks)\n      ;\n  }\n#endif // FAST_TIMER_WORKAROUND\n\n  uint32_t start = hal_fast_sys_timer_get();\n  uint32_t ticks = US_TO_FAST_TICKS(us);\n\n  while (hal_fast_sys_timer_get() - start < ticks)\n    ;\n#else\n  enum HAL_CMU_FREQ_T freq = hal_cmu_sys_get_freq();\n  uint32_t loop;\n  uint32_t i;\n\n  // Assuming:\n  // 1) system clock uses audio PLL\n  // 2) audio PLL is configured as 48K series, 196.608M\n  // 3) crystal is 26M\n\n  if (freq == HAL_CMU_FREQ_208M) {\n    loop = 197;\n  } else if (freq == HAL_CMU_FREQ_104M) {\n    loop = 197 / 2;\n  } else if (freq == HAL_CMU_FREQ_78M) {\n    loop = 197 / 3;\n  } else if (freq == HAL_CMU_FREQ_52M) {\n    loop = 52;\n  } else {\n    loop = 26;\n  }\n\n  loop = loop * us / 5;\n  for (i = 0; i < loop; i++) {\n    asm volatile(\"nop\");\n  }\n#endif\n}\n\nvoid SRAM_TEXT_LOC hal_sys_timer_delay_ns(uint32_t ns) {\n#ifdef TIMER1_BASE\n#ifdef FAST_TIMER_WORKAROUND\n  if (hal_cmu_fast_timer_offline()) {\n    uint32_t start = hal_sys_timer_get();\n    uint32_t ticks = US_TO_TICKS((ns + (1000 - 1)) / 1000);\n\n    while (hal_sys_timer_get() - start < ticks)\n      ;\n  }\n#endif // FAST_TIMER_WORKAROUND\n\n  uint32_t start = hal_fast_sys_timer_get();\n  uint32_t ticks = NS_TO_FAST_TICKS(ns);\n\n  while (hal_fast_sys_timer_get() - start < ticks)\n    ;\n#else\n  enum HAL_CMU_FREQ_T freq = hal_cmu_sys_get_freq();\n  uint32_t loop;\n  uint32_t i;\n\n  // Assuming:\n  // 1) system clock uses audio PLL\n  // 2) audio PLL is configured as 48K series, 196.608M\n  // 3) crystal is 26M\n\n  if (freq == HAL_CMU_FREQ_208M) {\n    loop = 197;\n  } else if (freq == HAL_CMU_FREQ_104M) {\n    loop = 197 / 2;\n  } else if (freq == HAL_CMU_FREQ_78M) {\n    loop = 197 / 3;\n  } else if (freq == HAL_CMU_FREQ_52M) {\n    loop = 52;\n  } else {\n    loop = 26;\n  }\n\n  loop = loop * ns / 5000;\n  for (i = 0; i < loop; i++) {\n    asm volatile(\"nop\");\n  }\n#endif\n}\n\nstatic uint32_t NOINLINE\nSRAM_TEXT_DEF(measure_cpu_freq_interval)(uint32_t cnt) {\n  uint32_t start;\n  struct DUAL_TIMER_T *t;\n  uint32_t delta;\n\n#ifdef TIMER1_BASE\n  t = dual_timer1;\n  delta = FAST_TIMER_VAL_DELTA;\n#ifdef FAST_TIMER_WORKAROUND\n  if (hal_cmu_fast_timer_offline()) {\n    t = dual_timer0;\n    delta = SLOW_TIMER_VAL_DELTA;\n  }\n#endif // FAST_TIMER_WORKAROUND\n#else\n  t = dual_timer0;\n  delta = SLOW_TIMER_VAL_DELTA;\n#endif\n\n  start = get_timer_value(&t->timer[0], delta);\n\n  asm volatile(\"_loop:;\"\n#ifdef __ARM_ARCH_ISA_ARM\n               \"nop;\"\n               \"nop;\"\n#endif\n               \"subs %0, #1;\"\n               \"cmp %0, #0;\"\n               \"bne _loop;\"\n               :\n               : \"r\"(cnt));\n\n  return start - get_timer_value(&t->timer[0], delta);\n}\n\nuint32_t hal_sys_timer_calc_cpu_freq(uint32_t interval_ms, int high_res) {\n  uint32_t ref_freq;\n  uint32_t cnt;\n  uint32_t one_sec;\n  uint32_t lock;\n  uint32_t run_interval;\n  uint32_t base_interval;\n  uint32_t freq;\n\n  // Default measurement interval\n  if (interval_ms == 0) {\n#ifdef TIMER1_BASE\n    interval_ms = 10;\n#else\n    interval_ms = 100;\n#endif\n  }\n\n  ref_freq = hal_cmu_get_crystal_freq();\n  // CPU loop cycle count\n  cnt = ref_freq / 4 * interval_ms / 1000;\n\n  // Timer ticks per second\n#ifdef TIMER1_BASE\n  one_sec = CONFIG_FAST_SYSTICK_HZ;\n#ifdef FAST_TIMER_WORKAROUND\n  if (hal_cmu_fast_timer_offline()) {\n    one_sec = CONFIG_SYSTICK_HZ;\n  }\n#endif // FAST_TIMER_WORKAROUND\n#else\n  if (high_res) {\n    one_sec = CONFIG_FAST_SYSTICK_HZ;\n  } else {\n    one_sec = CONFIG_SYSTICK_HZ;\n  }\n#endif\n  // Timer ticks per measurement interval\n  base_interval = one_sec * interval_ms / 1000;\n\n  lock = int_lock();\n\n#ifndef TIMER1_BASE\n  if (high_res) {\n    hal_cmu_timer0_select_fast();\n  }\n#endif\n\n  run_interval = measure_cpu_freq_interval(cnt);\n\n#ifndef TIMER1_BASE\n  if (high_res) {\n    hal_cmu_timer0_select_slow();\n  }\n#endif\n\n  int_unlock(lock);\n\n#ifdef TIMER_USE_FPU\n  freq = (uint32_t)((float)ref_freq / run_interval * base_interval);\n#else\n  freq = (uint32_t)((uint64_t)ref_freq * base_interval / run_interval);\n#endif\n\n  if (high_res == 0) {\n    freq = (freq + 500000) / 1000000 * 1000000;\n  }\n\n  return freq;\n}\n\n#ifdef CALIB_SLOW_TIMER\nvoid hal_sys_timer_calib_start(void) {\n  uint32_t lock;\n  uint32_t slow;\n  uint32_t fast;\n\n  lock = int_lock();\n  slow = hal_sys_timer_get();\n  while (hal_sys_timer_get() == slow)\n    ;\n  fast = hal_fast_sys_timer_get();\n  int_unlock(lock);\n\n  slow_val = slow + 1;\n  fast_val = fast;\n}\n\nint hal_sys_timer_calib_end(void) {\n  uint32_t lock;\n  uint32_t slow;\n  uint32_t fast;\n  uint32_t slow_diff;\n\n  lock = int_lock();\n  slow = hal_sys_timer_get();\n  while (hal_sys_timer_get() == slow)\n    ;\n  fast = hal_fast_sys_timer_get();\n  int_unlock(lock);\n\n  slow += 1;\n  slow_diff = slow - slow_val;\n\n  // Avoid computation error\n  if (slow_diff < MIN_CALIB_TICKS) {\n    return 1;\n  }\n  // Avoid fast tick overflow\n  if (slow_diff > MAX_CALIB_TICKS) {\n    return 2;\n  }\n\n#ifdef TIMER_USE_FPU\n  sys_tick_hz =\n      (uint32_t)((float)CONFIG_FAST_SYSTICK_HZ / (fast - fast_val) * slow_diff);\n#else\n  uint64_t mul;\n\n  mul = (uint64_t)CONFIG_FAST_SYSTICK_HZ * slow_diff;\n  if ((mul >> 32) == 0) {\n    sys_tick_hz = (uint32_t)mul / (fast - fast_val);\n  } else {\n    sys_tick_hz = mul / (fast - fast_val);\n  }\n#endif\n\n  if (sys_tick_hz > MAX_CALIB_SYSTICK_HZ) {\n    sys_tick_hz = MAX_CALIB_SYSTICK_HZ;\n  }\n\n  return 0;\n}\n\nvoid hal_sys_timer_calib(void) {\n  hal_sys_timer_calib_start();\n  hal_sys_timer_delay(MIN_CALIB_TICKS);\n  hal_sys_timer_calib_end();\n}\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_sys_timer_systick_hz(void) {\n  return sys_tick_hz;\n}\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_sys_timer_ms_to_ticks(uint32_t ms) {\n  if (ms <= (~0UL / MAX_CALIB_SYSTICK_HZ)) {\n    return (ms * sys_tick_hz / 1000);\n  } else {\n#ifdef TIMER_USE_FPU\n    return (uint32_t)((float)ms / 1000 * sys_tick_hz);\n#else\n    return ((uint64_t)ms * sys_tick_hz / 1000);\n#endif\n  }\n}\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_sys_timer_us_to_ticks(uint32_t us) {\n  if (us <= (~0UL / MAX_CALIB_SYSTICK_HZ)) {\n    return ((us * sys_tick_hz / 1000 + 1000 - 1) / 1000 + 1);\n  } else {\n#ifdef TIMER_USE_FPU\n    return (uint32_t)((float)us / (1000 * 1000) * sys_tick_hz + 1 + 1);\n#else\n    return (((uint64_t)us * sys_tick_hz / 1000 + 1000 - 1) / 1000 + 1);\n#endif\n  }\n}\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_sys_timer_ticks_to_ms(uint32_t tick) {\n  if (tick <= (~0UL / 1000)) {\n    return tick * 1000 / CONFIG_SYSTICK_HZ;\n  } else {\n#ifdef TIMER_USE_FPU\n    return (uint32_t)((float)tick / CONFIG_SYSTICK_HZ * 1000);\n#else\n    return (uint64_t)tick * 1000 / CONFIG_SYSTICK_HZ;\n#endif\n  }\n}\n\nuint32_t BOOT_TEXT_SRAM_LOC hal_sys_timer_ticks_to_us(uint32_t tick) {\n  if (tick <= (~0UL / (1000 * 1000))) {\n    return tick * (1000 * 1000) / CONFIG_SYSTICK_HZ;\n  } else {\n#ifdef TIMER_USE_FPU\n    return (uint32_t)((float)tick / CONFIG_SYSTICK_HZ * (1000 * 1000));\n#else\n    return (uint64_t)tick * (1000 * 1000) / CONFIG_SYSTICK_HZ;\n#endif\n  }\n}\n#endif\n\n#ifndef RTOS\nint osDelay(uint32_t ms) {\n  hal_sys_timer_delay(MS_TO_TICKS(ms));\n  return 0;\n}\n#endif\n\nstatic void hal_timer00_irq_handler(void) {\n  clear_timer_irq(&dual_timer0->timer[0]);\n  dual_timer0->timer[0].Control &= ~TIMER_CTRL_INTEN;\n}\n\nvoid hal_timer_setup(enum HAL_TIMER_TYPE_T type,\n                     HAL_TIMER_IRQ_HANDLER_T handler) {\n  uint32_t mode;\n\n  if (type == HAL_TIMER_TYPE_ONESHOT) {\n    mode = TIMER_CTRL_ONESHOT;\n  } else if (type == HAL_TIMER_TYPE_PERIODIC) {\n    mode = TIMER_CTRL_MODE_PERIODIC;\n  } else {\n    mode = 0;\n  }\n\n  irq_handler = handler;\n\n  clear_timer_irq(&dual_timer0->timer[1]);\n#ifdef ELAPSED_TIMER_ENABLED\n  dual_timer0->elapsed_timer[1].ElapsedCtrl = TIMER_ELAPSED_CTRL_CLR;\n#endif\n\n  if (handler) {\n    NVIC_SetVector(TIMER01_IRQn, (uint32_t)hal_timer01_irq_handler);\n    NVIC_SetPriority(TIMER01_IRQn, IRQ_PRIORITY_NORMAL);\n    NVIC_ClearPendingIRQ(TIMER01_IRQn);\n    NVIC_EnableIRQ(TIMER01_IRQn);\n  }\n\n  dual_timer0->timer[1].Control = mode | (handler ? TIMER_CTRL_INTEN : 0) |\n                                  TIMER_CTRL_PRESCALE_DIV_1 |\n                                  TIMER_CTRL_SIZE_32_BIT;\n}\n\nvoid hal_timer_start(uint32_t load) {\n  start_time = hal_sys_timer_get();\n  hal_timer_reload(load);\n  hal_timer_continue();\n}\n\nvoid hal_timer_stop(void) {\n  dual_timer0->timer[1].Control &= ~TIMER_CTRL_EN;\n#ifdef ELAPSED_TIMER_ENABLED\n  dual_timer0->elapsed_timer[1].ElapsedCtrl = TIMER_ELAPSED_CTRL_CLR;\n#endif\n  clear_timer_irq(&dual_timer0->timer[1]);\n  NVIC_ClearPendingIRQ(TIMER01_IRQn);\n}\n\nvoid hal_timer_continue(void) {\n#ifdef ELAPSED_TIMER_ENABLED\n  dual_timer0->elapsed_timer[1].ElapsedCtrl =\n      TIMER_ELAPSED_CTRL_EN | TIMER_ELAPSED_CTRL_CLR;\n#endif\n  dual_timer0->timer[1].Control |= TIMER_CTRL_EN;\n}\n\nint hal_timer_is_enabled(void) {\n  return !!(dual_timer0->timer[1].Control & TIMER_CTRL_EN);\n}\n\nvoid hal_timer_reload(uint32_t load) {\n  if (load > HAL_TIMER_LOAD_DELTA) {\n    // load_value = load;\n    load -= HAL_TIMER_LOAD_DELTA;\n  } else {\n    // load_value = HAL_TIMER_LOAD_DELTA + 1;\n    load = 1;\n  }\n  set_timer_load(&dual_timer0->timer[1], load, SLOW_TIMER_VAL_DELTA);\n}\n\nuint32_t hal_timer_get(void) {\n  return get_timer_value(&dual_timer0->timer[1], SLOW_TIMER_VAL_DELTA);\n}\n\nint hal_timer_irq_active(void) { return NVIC_GetActive(TIMER01_IRQn); }\n\nint hal_timer_irq_pending(void) {\n  // Or NVIC_GetPendingIRQ(TIMER2_IRQn) ?\n  return (dual_timer0->timer[1].MIS & TIMER_MIS_MIS);\n}\n\nuint32_t hal_timer_get_overrun_time(void) {\n#ifdef ELAPSED_TIMER_ENABLED\n  uint32_t extra;\n\n  if (dual_timer0->elapsed_timer[1].ElapsedCtrl & TIMER_ELAPSED_CTRL_EN) {\n    extra = dual_timer0->elapsed_timer[1].ElapsedVal;\n  } else {\n    extra = 0;\n  }\n\n  return extra;\n#else\n  return 0;\n#endif\n}\n\nuint32_t hal_timer_get_elapsed_time(void) {\n  // return load_value + hal_timer_get_overrun_time();\n  return hal_sys_timer_get() - start_time;\n}\n\nstatic void hal_timer01_irq_handler(void) {\n  uint32_t elapsed;\n\n  clear_timer_irq(&dual_timer0->timer[1]);\n  if (irq_handler) {\n    elapsed = hal_timer_get_elapsed_time();\n    irq_handler(elapsed);\n  } else {\n    dual_timer0->timer[1].Control &= ~TIMER_CTRL_INTEN;\n  }\n}\n\nuint32_t hal_timer_get_passed_ticks(uint32_t curr_ticks, uint32_t prev_ticks) {\n  if (curr_ticks < prev_ticks)\n    return ((0xffffffff - prev_ticks + 1) + curr_ticks);\n  else\n    return (curr_ticks - prev_ticks);\n}\n"
  },
  {
    "path": "platform/hal/hal_timer.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_TIMER_H__\n#define __HAL_TIMER_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_cmu.h\"\n\n//=============================================================================\n// Slow Timer (Default Timer)\n\n#define CONFIG_SYSTICK_HZ_NOMINAL (16000)\n\n// #if (CONFIG_SYSTICK_HZ_NOMINAL % 1000)\n// #error \"Bad CONFIG_SYSTICK_HZ_NOMINAL configuration\"\n// #endif\n\n#ifdef CALIB_SLOW_TIMER\n\n#define CONFIG_SYSTICK_HZ hal_sys_timer_systick_hz()\n\n#define __MS_TO_TICKS(ms) hal_sys_timer_ms_to_ticks(ms)\n\n#define __US_TO_TICKS(us) hal_sys_timer_us_to_ticks(us)\n\n#define __TICKS_TO_MS(tick) hal_sys_timer_ticks_to_ms(tick)\n\n#define __TICKS_TO_US(tick) hal_sys_timer_ticks_to_us(tick)\n\n#else\n\n#define CONFIG_SYSTICK_HZ CONFIG_SYSTICK_HZ_NOMINAL\n\n#define __MS_TO_TICKS(ms) ((ms) * ((uint32_t)CONFIG_SYSTICK_HZ / 1000))\n\n#define __US_TO_TICKS(us)                                                      \\\n  (((us) * ((uint32_t)CONFIG_SYSTICK_HZ / 1000) + 1000 - 1) / 1000 + 1)\n\n#define __TICKS_TO_MS(tick) ((tick) / ((uint32_t)CONFIG_SYSTICK_HZ / 1000))\n\n#define __TICKS_TO_US(tick) ((tick)*1000 / ((uint32_t)CONFIG_SYSTICK_HZ / 1000))\n\n#endif\n\n/*\n *\n * This is very confused with the common sense, because\n * MS_TO_TICKS is always refer to ms converted to os ticks\n * but here it is converted to a hardware timer's tick\n * which ticks is 16K one second;\n *\n * The same is as US_TO_TICKS, TICKS_TO_MS series;\n * They are reserved for historic reason;\n *\n * Note, don't use these macros, use MS_TO_HWTICKS/US_TO_HWTICKS/HWTICKS_TO_MS\n * alternately\n */\n#define MS_TO_TICKS(ms) __MS_TO_TICKS(ms)\n\n#define US_TO_TICKS(us) __US_TO_TICKS(us)\n\n#define TICKS_TO_MS(tick) __TICKS_TO_MS(tick)\n\n#define TICKS_TO_US(tick) __TICKS_TO_US(tick)\n\n#define MS_TO_HWTICKS(ms) __MS_TO_TICKS(ms)\n\n#define US_TO_HWTICKS(us) __US_TO_TICKS(us)\n\n#define HWTICKS_TO_MS(tick) __TICKS_TO_MS(tick)\n\n#define HWTICKS_TO_US(tick) __TICKS_TO_US(tick)\n\n#define GET_CURRENT_TICKS() hal_sys_timer_get()\n\n#define GET_CURRENT_MS() TICKS_TO_MS(GET_CURRENT_TICKS())\n\nvoid hal_sys_timer_open(void);\n\nuint32_t hal_sys_timer_get(void);\n\nuint32_t hal_sys_timer_get_in_sleep(void);\n\nuint32_t hal_sys_timer_get_max(void);\n\nvoid hal_sys_timer_delay(uint32_t ticks);\n\nvoid hal_sys_timer_delay_in_sleep(uint32_t ticks);\n\nvoid hal_sys_timer_delay_us(uint32_t us);\n\nvoid hal_sys_timer_delay_ns(uint32_t ns);\n\nuint32_t hal_sys_timer_calc_cpu_freq(uint32_t interval_ms, int high_res);\n\nuint32_t flash_hal_sys_timer_get(void);\n\nvoid flash_hal_sys_timer_delay(uint32_t ticks);\n\nvoid hal_sys_timer_calib_start(void);\n\nint hal_sys_timer_calib_end(void);\n\nvoid hal_sys_timer_calib(void);\n\nuint32_t hal_sys_timer_systick_hz(void);\n\nuint32_t hal_sys_timer_ms_to_ticks(uint32_t ms);\n\nuint32_t hal_sys_timer_us_to_ticks(uint32_t us);\n\nuint32_t hal_sys_timer_ticks_to_ms(uint32_t tick);\n\nuint32_t hal_sys_timer_ticks_to_us(uint32_t tick);\n\nuint32_t hal_timer_get_passed_ticks(uint32_t curr_ticks, uint32_t prev_ticks);\n\n//=============================================================================\n// Fast Timer\n\n#define CONFIG_FAST_SYSTICK_HZ (hal_cmu_get_crystal_freq() / 4)\n\n#define MS_TO_FAST_TICKS(ms) ((uint32_t)(ms) * (CONFIG_FAST_SYSTICK_HZ / 1000))\n\n#define US_TO_FAST_TICKS(us)                                                   \\\n  ((uint32_t)(us) * (CONFIG_FAST_SYSTICK_HZ / 1000 / 100) / 10)\n\n#define NS_TO_FAST_TICKS(ns)                                                   \\\n  ((uint32_t)(ns) * (CONFIG_FAST_SYSTICK_HZ / 1000 / 100) / 10 / 1000)\n\n#define FAST_TICKS_TO_MS(tick)                                                 \\\n  ((uint32_t)(tick) / (CONFIG_FAST_SYSTICK_HZ / 1000))\n\n#define FAST_TICKS_TO_US(tick)                                                 \\\n  ((uint32_t)(tick)*10 / (CONFIG_FAST_SYSTICK_HZ / 1000 / 100))\n\n#define FAST_TICKS_TO_NS(tick)                                                 \\\n  ((uint32_t)(tick)*10 * 1000 / (CONFIG_FAST_SYSTICK_HZ / 1000 / 100))\n\nuint32_t hal_fast_sys_timer_get(void);\n\n#ifndef RTOS\nint osDelay(uint32_t ms);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_timer_raw.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_TIMER_RAW_H__\n#define __HAL_TIMER_RAW_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef IGNORE_HAL_TIMER_RAW_API_CHECK\n#if !(defined(ROM_BUILD) || defined(SIMU))\n#error \"Raw timer API can only be used in rom or simulation environment!\"\n#endif\n#endif\n\n#include \"hal_timer.h\"\n\n#define HAL_TIMER_LOAD_DELTA            1\n\nenum HAL_TIMER_TYPE_T {\n    HAL_TIMER_TYPE_FREERUNNING = 0,\n    HAL_TIMER_TYPE_ONESHOT,\n    HAL_TIMER_TYPE_PERIODIC,\n    HAL_TIMER_TYPE_QTY\n};\n\ntypedef void (*HAL_TIMER_IRQ_HANDLER_T)(uint32_t elapsed);\n\nvoid hal_timer_setup(enum HAL_TIMER_TYPE_T type, HAL_TIMER_IRQ_HANDLER_T handler);\n\nvoid hal_timer_start(uint32_t load);\n\nvoid hal_timer_stop(void);\n\nvoid hal_timer_continue(void);\n\nint hal_timer_is_enabled(void);\n\nvoid hal_timer_reload(uint32_t load);\n\nuint32_t hal_timer_get(void);\n\nuint32_t hal_timer_get_overrun_time(void);\n\nint hal_timer_irq_active(void);\n\nint hal_timer_irq_pending(void);\n\nuint32_t hal_timer_get_elapsed_time(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_trace.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if !(defined(DEBUG) || defined(REL_TRACE_ENABLE))\n// Implement a local copy of dummy trace functions for library linking (which\n// might be built with DEBUG enabled)\n#define TRACE_FUNC_SPEC\n#endif\n#include \"hal_trace.h\"\n#include \"cmsis_nvic.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n#include \"hal_bootmode.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_codec.h\"\n#include \"hal_dma.h\"\n#include \"hal_iomux.h\"\n#include \"hal_location.h\"\n#include \"hal_memsc.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_uart.h\"\n#include \"stdarg.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n\n#ifdef CORE_DUMP\n#include \"CrashCatcherApi.h\"\n#endif\n\nextern const char sys_build_info[];\nextern void nv_record_flash_flush(void);\n\n#ifdef FAULT_DUMP\nvoid hal_trace_fault_dump(const uint32_t *regs, const uint32_t *extra,\n                          uint32_t extra_len);\n#ifndef __ARM_ARCH_ISA_ARM\nstatic void hal_trace_fault_handler(void);\n#endif\n#endif\n\n#if !(defined(ROM_BUILD) || defined(PROGRAMMER))\n#define ASSERT_MUTE_CODEC\n#define CRASH_DUMP_ENABLE\n#if !(defined(NO_TRACE_TIME_STAMP) || defined(AUDIO_DEBUG_V0_1_0))\n#define TRACE_TIME_STAMP\n#endif\n#if (defined(DUMP_LOG_ENABLE) || defined(DUMP_CRASH_ENABLE))\n#define TRACE_TO_APP\n#endif\n#ifdef CHIP_HAS_CP\n#define CP_TRACE_ENABLE\n#endif\n#endif\n\n#define TRACE_IDLE_OUTPUT 0\n\n#ifndef TRACE_BAUD_RATE\n#define TRACE_BAUD_RATE (921600)\n#endif\n\n#ifndef TRACE_BUF_SIZE\n#ifdef AUDIO_DEBUG\n#define TRACE_BUF_SIZE (6 * 1024)\n#else\n#define TRACE_BUF_SIZE (4 * 1024)\n#endif\n#endif\n\n#define CRASH_BUF_SIZE 100\n#define CRASH_BUF_ATTR ALIGNED(4) USED\n\n#ifndef TRACE_STACK_DUMP_PREV_WORD\n#define TRACE_STACK_DUMP_PREV_WORD 16\n#endif\n#ifndef TRACE_STACK_DUMP_WORD\n#define TRACE_STACK_DUMP_WORD 32\n#endif\n#ifndef TRACE_BACKTRACE_NUM\n#define TRACE_BACKTRACE_NUM 20\n#endif\n#ifndef TRACE_BACKTRACE_SEARCH_WORD\n#define TRACE_BACKTRACE_SEARCH_WORD 1024\n#endif\n\n#define STACK_DUMP_CNT_PER_LEN 4\n#define STACK_DUMP_CNT_PREV                                                    \\\n  ((TRACE_STACK_DUMP_PREV_WORD + STACK_DUMP_CNT_PER_LEN - 1) /                 \\\n   STACK_DUMP_CNT_PER_LEN * STACK_DUMP_CNT_PER_LEN)\n#define STACK_DUMP_CNT                                                         \\\n  ((TRACE_STACK_DUMP_WORD + STACK_DUMP_CNT_PER_LEN - 1) /                      \\\n   STACK_DUMP_CNT_PER_LEN * STACK_DUMP_CNT_PER_LEN)\n\n#define TRACE_FLUSH_TIMEOUT MS_TO_TICKS(2000)\n\n#define TRACE_NEAR_FULL_THRESH 200\n\n#define TRACE_CRLF\n\n#ifdef TRACE_CRLF\n#define NEW_LINE_STR \"\\r\\n\"\n#else\n#define NEW_LINE_STR \"\\n\"\n#endif\n\n#define HAL_TRACE_ASSERT_ID 0xBE57AAAA\n#define HAL_TRACE_EXCEPTION_ID 0xBE57EEEE\n\n#define HAL_MEMSC_ID_TRACE HAL_MEMSC_ID_0\n\n#define TRACE_BUF_LOC SYNC_FLAGS_LOC\n\nstruct ASSERT_INFO_T {\n  uint32_t ID;\n  uint32_t CPU_ID;\n  const char *FILE;\n  const char *FUNC;\n  uint32_t LINE;\n  const char *FMT;\n  uint32_t R[15];\n#ifndef __ARM_ARCH_ISA_ARM\n  uint32_t MSP;\n  uint32_t PSP;\n  uint32_t CONTROL;\n#ifdef __ARM_ARCH_8M_MAIN__\n  uint32_t MSPLIM;\n  uint32_t PSPLIM;\n#endif\n#endif\n};\n\nstruct EXCEPTION_INFO_T {\n  uint32_t ID;\n  uint32_t CPU_ID;\n  const uint32_t *REGS;\n#ifdef __ARM_ARCH_ISA_ARM\n  const uint32_t *extra;\n  uint32_t extra_len;\n#else\n  uint32_t MSP;\n  uint32_t PSP;\n  uint8_t PRIMASK;\n  uint8_t FAULTMASK;\n  uint8_t BASEPRI;\n  uint8_t CONTROL;\n  uint32_t ICSR;\n  uint32_t AIRCR;\n  uint32_t SCR;\n  uint32_t CCR;\n  uint32_t SHCSR;\n  uint32_t CFSR;\n  uint32_t HFSR;\n  uint32_t AFSR;\n  uint32_t MMFAR;\n  uint32_t BFAR;\n#ifdef __ARM_ARCH_8M_MAIN__\n  uint32_t MSPLIM;\n  uint32_t PSPLIM;\n#endif\n#endif\n};\n\nstatic CRASH_BUF_ATTR char crash_buf[CRASH_BUF_SIZE];\n\nSTATIC_ASSERT(sizeof(crash_buf) >= sizeof(((struct ASSERT_INFO_T *)0)->R),\n              \"crash_buf too small to hold assert registers\");\n\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n\nstruct HAL_TRACE_BUF_T {\n  unsigned char buf[TRACE_BUF_SIZE];\n  unsigned short wptr;\n  unsigned short rptr;\n#if (TRACE_IDLE_OUTPUT == 0)\n  unsigned short sends[2];\n#endif\n  unsigned short discards;\n  bool sending;\n  bool in_trace;\n  bool wrapped;\n};\n\nSTATIC_ASSERT(TRACE_BUF_SIZE <\n                  (1 << (8 * sizeof(((struct HAL_TRACE_BUF_T *)0)->wptr))),\n              \"TRACE_BUF_SIZE is too large to fit in wptr/rptr variable\");\n\nstatic const struct HAL_UART_CFG_T uart_cfg = {\n    .parity = HAL_UART_PARITY_NONE,\n    .stop = HAL_UART_STOP_BITS_1,\n    .data = HAL_UART_DATA_BITS_8,\n    .flow = HAL_UART_FLOW_CONTROL_NONE, // HAL_UART_FLOW_CONTROL_RTSCTS,\n    .tx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .rx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .baud = TRACE_BAUD_RATE,\n#ifdef HAL_TRACE_RX_ENABLE\n    .dma_rx = true,\n#else\n    .dma_rx = false,\n#endif\n#if (TRACE_IDLE_OUTPUT == 0)\n    .dma_tx = true,\n#else\n    .dma_tx = false,\n#endif\n    .dma_rx_stop_on_err = false,\n};\n\n#if (TRACE_IDLE_OUTPUT == 0)\nstatic const enum HAL_DMA_PERIPH_T uart_periph[] = {\n    HAL_GPDMA_UART0_TX,\n#if (CHIP_HAS_UART > 1)\n    HAL_GPDMA_UART1_TX,\n#endif\n#if (CHIP_HAS_UART > 2)\n    HAL_GPDMA_UART2_TX,\n#endif\n};\n\nstatic const struct HAL_UART_CFG_T uart_rx_enable_cfg = {\n    .parity = HAL_UART_PARITY_NONE,\n    .stop = HAL_UART_STOP_BITS_1,\n    .data = HAL_UART_DATA_BITS_8,\n    .flow = HAL_UART_FLOW_CONTROL_NONE, // HAL_UART_FLOW_CONTROL_RTSCTS,\n    .tx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .rx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .baud = TRACE_BAUD_RATE,\n    .dma_rx = true,\n\n#if (TRACE_IDLE_OUTPUT == 0)\n    .dma_tx = true,\n#else\n    .dma_tx = false,\n#endif\n    .dma_rx_stop_on_err = false,\n};\n\nstatic struct HAL_DMA_CH_CFG_T dma_cfg;\nTRACE_BUF_LOC static struct HAL_DMA_DESC_T dma_desc[2];\n#endif\n\nstatic enum HAL_TRACE_TRANSPORT_T trace_transport = HAL_TRACE_TRANSPORT_QTY;\nstatic enum HAL_UART_ID_T trace_uart;\n\nTRACE_BUF_LOC\nstatic struct HAL_TRACE_BUF_T trace;\n\nPOSSIBLY_UNUSED\nstatic const char newline[] = NEW_LINE_STR;\n\nstatic const char discards_prefix[] = NEW_LINE_STR \"LOST \";\nstatic const uint32_t max_discards = 99999;\n// 5 digits + \"\\r\\n\" = 7 chars\nstatic char discards_buf[sizeof(discards_prefix) - 1 + 7];\nstatic const unsigned char discards_digit_start = sizeof(discards_prefix) - 1;\n\nstatic bool crash_dump_onprocess = false;\n\n#ifdef CRASH_DUMP_ENABLE\nstatic HAL_TRACE_CRASH_DUMP_CB_T\n    crash_dump_cb_list[HAL_TRACE_CRASH_DUMP_MODULE_END];\nstatic bool crash_handling;\n#ifdef TRACE_TO_APP\nstatic HAL_TRACE_APP_NOTIFY_T app_notify_cb = NULL;\nstatic HAL_TRACE_APP_OUTPUT_T app_output_cb = NULL;\nstatic HAL_TRACE_APP_OUTPUT_T app_crash_custom_cb = NULL;\nstatic bool app_output_enabled =\n#if defined(DUMP_LOG_ENABLE)\n    true;\n#else\n    false;\n#endif\n#endif // TRACE_TO_APP\n#endif // CRASH_DUMP_ENABLE\n#ifdef CP_TRACE_ENABLE\nstatic HAL_TRACE_APP_NOTIFY_T cp_notify_cb = NULL;\nstatic HAL_TRACE_BUF_CTRL_T cp_buffer_cb = NULL;\n#endif\n\n#ifdef AUDIO_DEBUG_V0_1_0\nstatic const char trace_head_buf[] = \"[trace]\";\n#endif\n\nstatic enum LOG_LEVEL_T trace_max_level;\nstatic uint32_t trace_mod_map[(LOG_MODULE_QTY + 31) / 32];\n\nstatic bool hal_trace_is_uart_transport(enum HAL_TRACE_TRANSPORT_T transport) {\n  if (transport == HAL_TRACE_TRANSPORT_UART0\n#if (CHIP_HAS_UART > 1)\n      || transport == HAL_TRACE_TRANSPORT_UART1\n#endif\n#if (CHIP_HAS_UART > 2)\n      || transport == HAL_TRACE_TRANSPORT_UART2\n#endif\n  ) {\n    return true;\n  }\n  return false;\n}\n\n#if (TRACE_IDLE_OUTPUT == 0)\n\nstatic void hal_trace_uart_send(void) {\n  uint32_t wptr, rptr;\n  uint32_t sends[2];\n  uint32_t lock;\n\n  lock = int_lock();\n\n  wptr = trace.wptr;\n  rptr = trace.rptr;\n\n  // There is a race condition if we do not check s/w flag, but only check the\n  // h/w status. [e.g., hal_gpdma_chan_busy(dma_cfg.ch)] When the DMA is done,\n  // but DMA IRQ handler is still pending due to interrupt lock or higher\n  // priority IRQ, it will have a chance to send the same content twice.\n  if (!trace.sending && wptr != rptr) {\n    trace.sending = true;\n\n    sends[1] = 0;\n    if (wptr > rptr) {\n      sends[0] = wptr - rptr;\n    } else {\n      sends[0] = TRACE_BUF_SIZE - rptr;\n      if (sends[0] <= HAL_DMA_MAX_DESC_XFER_SIZE) {\n        sends[1] = wptr;\n      }\n    }\n    if (sends[0] > HAL_DMA_MAX_DESC_XFER_SIZE) {\n      sends[1] = sends[0] - HAL_DMA_MAX_DESC_XFER_SIZE;\n      sends[0] = HAL_DMA_MAX_DESC_XFER_SIZE;\n    }\n    if (sends[1] > HAL_DMA_MAX_DESC_XFER_SIZE) {\n      sends[1] = HAL_DMA_MAX_DESC_XFER_SIZE;\n    }\n\n    dma_cfg.src = (uint32_t)&trace.buf[rptr];\n    if (sends[1] == 0) {\n      dma_cfg.src_tsize = sends[0];\n      hal_gpdma_init_desc(&dma_desc[0], &dma_cfg, NULL, 1);\n    } else {\n      dma_cfg.src_tsize = sends[0];\n      hal_gpdma_init_desc(&dma_desc[0], &dma_cfg, &dma_desc[1], 0);\n\n      if (rptr + sends[0] < TRACE_BUF_SIZE) {\n        dma_cfg.src = (uint32_t)&trace.buf[rptr + sends[0]];\n      } else {\n        dma_cfg.src = (uint32_t)&trace.buf[0];\n      }\n      dma_cfg.src_tsize = sends[1];\n      hal_gpdma_init_desc(&dma_desc[1], &dma_cfg, NULL, 1);\n    }\n    trace.sends[0] = sends[0];\n    trace.sends[1] = sends[1];\n\n    hal_gpdma_sg_start(&dma_desc[0], &dma_cfg);\n  }\n\n  int_unlock(lock);\n}\n\nstatic void hal_trace_uart_xfer_done(uint8_t chan, uint32_t remain_tsize,\n                                     uint32_t error,\n                                     struct HAL_DMA_DESC_T *lli) {\n  uint32_t sends[2];\n  uint32_t lock;\n\n  lock = int_lock();\n\n  sends[0] = trace.sends[0];\n  sends[1] = trace.sends[1];\n\n  if (error) {\n    if (lli || sends[1] == 0) {\n      if (sends[0] > remain_tsize) {\n        sends[0] -= remain_tsize;\n      } else {\n        sends[0] = 0;\n      }\n      sends[1] = 0;\n    } else {\n      if (sends[1] > remain_tsize) {\n        sends[1] -= remain_tsize;\n      } else {\n        sends[1] = 0;\n      }\n    }\n  }\n\n  trace.rptr += sends[0] + sends[1];\n  if (trace.rptr >= TRACE_BUF_SIZE) {\n    trace.rptr -= TRACE_BUF_SIZE;\n  }\n  trace.sends[0] = 0;\n  trace.sends[1] = 0;\n  trace.sending = false;\n\n  hal_trace_uart_send();\n\n  int_unlock(lock);\n}\n\nstatic void hal_trace_send(void) {\n#ifdef CP_TRACE_ENABLE\n  if (get_cpu_id()) {\n    return;\n  }\n#endif\n\n  if (hal_trace_is_uart_transport(trace_transport)) {\n    hal_trace_uart_send();\n  }\n}\n\n#else // TRACE_IDLE_OUTPUT\n\nstatic void hal_trace_uart_idle_send(void) {\n  int i;\n  uint32_t lock;\n  unsigned short wptr, rptr;\n\n  lock = int_lock();\n  wptr = trace.wptr;\n  rptr = trace.rptr;\n  int_unlock(lock);\n\n  if (wptr == rptr) {\n    return;\n  }\n\n  if (wptr < rptr) {\n    for (i = rptr; i < TRACE_BUF_SIZE; i++) {\n      hal_uart_blocked_putc(trace_uart, trace.buf[i]);\n    }\n    rptr = 0;\n  }\n\n  for (i = rptr; i < wptr; i++) {\n    hal_uart_blocked_putc(trace_uart, trace.buf[i]);\n  }\n\n  trace.rptr = wptr;\n  if (trace.rptr >= TRACE_BUF_SIZE) {\n    trace.rptr -= TRACE_BUF_SIZE;\n  }\n}\n\nvoid hal_trace_idle_send(void) {\n  if (hal_trace_is_uart_transport(trace_transport)) {\n    hal_trace_uart_idle_send();\n  }\n}\n\n#endif // TRACE_IDLE_OUTPUT\n\nint hal_trace_open(enum HAL_TRACE_TRANSPORT_T transport) {\n  int ret;\n\n  crash_dump_onprocess = false;\n\n#if (CHIP_HAS_UART > 1)\n#ifdef FORCE_TRACE_UART1\n  transport = HAL_TRACE_TRANSPORT_UART1;\n#endif\n#endif\n\n#if (CHIP_HAS_UART > 2)\n#ifdef FORCE_TRACE_UART2\n  transport = HAL_TRACE_TRANSPORT_UART2;\n#endif\n#endif\n\n  if (transport >= HAL_TRACE_TRANSPORT_QTY) {\n    return 1;\n  }\n#ifdef CHIP_HAS_USB\n  if (transport == HAL_TRACE_TRANSPORT_USB) {\n    return 1;\n  }\n#endif\n\n  if (trace_transport != HAL_TRACE_TRANSPORT_QTY) {\n    return hal_trace_switch(transport);\n  }\n\n  trace_max_level = LOG_LEVEL_INFO;\n  for (int i = 0; i < ARRAY_SIZE(trace_mod_map); i++) {\n    trace_mod_map[i] = ~0;\n  }\n\n  memcpy(discards_buf, discards_prefix, discards_digit_start);\n\n  trace.wptr = 0;\n  trace.rptr = 0;\n  trace.discards = 0;\n  trace.sending = false;\n  trace.in_trace = false;\n  trace.wrapped = false;\n\n  if (hal_trace_is_uart_transport(transport)) {\n    trace_uart = HAL_UART_ID_0 + (transport - HAL_TRACE_TRANSPORT_UART0);\n    ret = hal_uart_open(trace_uart, &uart_cfg);\n    if (ret) {\n      return ret;\n    }\n\n#if (TRACE_IDLE_OUTPUT == 0)\n    trace.sends[0] = 0;\n    trace.sends[1] = 0;\n\n    memset(&dma_cfg, 0, sizeof(dma_cfg));\n    dma_cfg.dst = 0; // useless\n    dma_cfg.dst_bsize = HAL_DMA_BSIZE_8;\n    dma_cfg.dst_periph = uart_periph[trace_uart - HAL_UART_ID_0];\n    dma_cfg.dst_width = HAL_DMA_WIDTH_BYTE;\n    dma_cfg.handler = hal_trace_uart_xfer_done;\n    dma_cfg.src_bsize = HAL_DMA_BSIZE_32;\n    dma_cfg.src_periph = 0; // useless\n    dma_cfg.src_width = HAL_DMA_WIDTH_BYTE;\n    dma_cfg.type = HAL_DMA_FLOW_M2P_DMA;\n    dma_cfg.try_burst = 0;\n    dma_cfg.ch = hal_gpdma_get_chan(dma_cfg.dst_periph, HAL_DMA_HIGH_PRIO);\n\n    ASSERT(dma_cfg.ch != HAL_DMA_CHAN_NONE, \"Failed to get DMA channel\");\n#endif\n  }\n\n#ifdef FAULT_DUMP\n#ifdef __ARM_ARCH_ISA_ARM\n  GIC_SetFaultDumpHandler(hal_trace_fault_dump);\n#else\n  NVIC_SetDefaultFaultHandler(hal_trace_fault_handler);\n#endif\n#endif\n\n  trace_transport = transport;\n\n#ifdef HAL_TRACE_RX_ENABLE\n  hal_trace_rx_open();\n#endif\n\n  // Show build info\n  static const char dbl_new_line[] = NEW_LINE_STR NEW_LINE_STR;\n  hal_trace_output((unsigned char *)dbl_new_line, sizeof(dbl_new_line));\n  hal_trace_output((unsigned char *)sys_build_info, strlen(sys_build_info) + 1);\n\n  char buf[50];\n  int len;\n  len = snprintf(buf, sizeof(buf),\n                 NEW_LINE_STR NEW_LINE_STR \"------\" NEW_LINE_STR\n                                           \"METAL_ID: %d\" NEW_LINE_STR\n                                           \"------\" NEW_LINE_STR NEW_LINE_STR,\n                 hal_get_chip_metal_id());\n  hal_trace_output((unsigned char *)buf, len + 1);\n\n  return 0;\n}\n\nint hal_trace_switch(enum HAL_TRACE_TRANSPORT_T transport) {\n  uint32_t POSSIBLY_UNUSED lock;\n  int ret;\n\n#if (CHIP_HAS_UART > 1)\n#ifdef FORCE_TRACE_UART1\n  transport = HAL_TRACE_TRANSPORT_UART1;\n#endif\n#endif\n\n#if (CHIP_HAS_UART > 2)\n#ifdef FORCE_TRACE_UART2\n  transport = HAL_TRACE_TRANSPORT_UART2;\n#endif\n#endif\n\n#ifdef CHIP_HAS_USB\n  if (transport == HAL_TRACE_TRANSPORT_USB) {\n    return 1;\n  }\n#endif\n  if (transport >= HAL_TRACE_TRANSPORT_QTY) {\n    return 1;\n  }\n  if (trace_transport >= HAL_TRACE_TRANSPORT_QTY) {\n    return 1;\n  }\n  if (trace_transport == transport) {\n    return 0;\n  }\n\n  ret = 0;\n\n#if (CHIP_HAS_UART > 1)\n\n  lock = int_lock();\n\n  if (hal_trace_is_uart_transport(trace_transport)) {\n#if (TRACE_IDLE_OUTPUT == 0)\n    if (dma_cfg.ch != HAL_DMA_CHAN_NONE) {\n      hal_gpdma_cancel(dma_cfg.ch);\n    }\n#endif\n    hal_uart_close(trace_uart);\n  }\n\n  if (hal_trace_is_uart_transport(transport)) {\n    trace_uart = HAL_UART_ID_0 + (transport - HAL_TRACE_TRANSPORT_UART0);\n#if (TRACE_IDLE_OUTPUT == 0)\n    dma_cfg.dst_periph = uart_periph[trace_uart - HAL_UART_ID_0];\n    trace.sends[0] = 0;\n    trace.sends[1] = 0;\n#endif\n    ret = hal_uart_open(trace_uart, &uart_cfg);\n    if (ret) {\n#if (TRACE_IDLE_OUTPUT == 0)\n      hal_gpdma_free_chan(dma_cfg.ch);\n      dma_cfg.ch = HAL_DMA_CHAN_NONE;\n#endif\n      trace_transport = HAL_TRACE_TRANSPORT_QTY;\n      goto _exit;\n    }\n  }\n\n  trace.sending = false;\n\n  trace_transport = transport;\n\n_exit:\n  int_unlock(lock);\n\n#endif // CHIP_HAS_UART > 1\n\n  return ret;\n}\n\nint hal_trace_close(void) {\n  if (trace_transport >= HAL_TRACE_TRANSPORT_QTY) {\n    goto _exit;\n  }\n#ifdef CHIP_HAS_USB\n  if (trace_transport == HAL_TRACE_TRANSPORT_USB) {\n    goto _exit;\n  }\n#endif\n\n  if (hal_trace_is_uart_transport(trace_transport)) {\n#if (TRACE_IDLE_OUTPUT == 0)\n    if (dma_cfg.ch != HAL_DMA_CHAN_NONE) {\n      hal_gpdma_cancel(dma_cfg.ch);\n      hal_gpdma_free_chan(dma_cfg.ch);\n      dma_cfg.ch = HAL_DMA_CHAN_NONE;\n    }\n#endif\n    hal_uart_close(trace_uart);\n  }\n\n_exit:\n  trace_transport = HAL_TRACE_TRANSPORT_QTY;\n\n  return 0;\n}\n\nint hal_trace_enable_log_module(enum LOG_MODULE_T module) {\n  if (module >= LOG_MODULE_QTY) {\n    return 1;\n  }\n\n  trace_mod_map[module >> 5] |= (1 << (module & 0x1F));\n  return 0;\n}\n\nint hal_trace_disable_log_module(enum LOG_MODULE_T module) {\n  if (module >= LOG_MODULE_QTY) {\n    return 1;\n  }\n\n  trace_mod_map[module >> 5] &= ~(1 << (module & 0x1F));\n  return 0;\n}\n\nint hal_trace_set_log_module(const uint32_t *map, uint32_t word_cnt) {\n  if (map == NULL || word_cnt == 0) {\n    return 1;\n  }\n\n  if (word_cnt > ARRAY_SIZE(trace_mod_map)) {\n    word_cnt = ARRAY_SIZE(trace_mod_map);\n  }\n  for (int i = 0; i < word_cnt; i++) {\n    trace_mod_map[i] = map[i];\n  }\n  return 0;\n}\n\nint hal_trace_set_log_level(enum LOG_LEVEL_T level) {\n  if (level >= LOG_LEVEL_QTY) {\n    return 1;\n  }\n\n  trace_max_level = level;\n  return 0;\n}\n\nvoid hal_trace_get_history_buffer(const unsigned char **buf1,\n                                  unsigned int *len1,\n                                  const unsigned char **buf2,\n                                  unsigned int *len2) {\n  uint32_t lock;\n  uint8_t *b1, *b2;\n  uint32_t l1, l2;\n\n  b1 = b2 = NULL;\n  l1 = l2 = 0;\n\n  lock = int_lock();\n\n  if (TRACE_BUF_SIZE > trace.wptr) {\n    if (trace.wrapped) {\n      b1 = &trace.buf[trace.wptr];\n      l1 = TRACE_BUF_SIZE - trace.wptr;\n      b2 = &trace.buf[0];\n      l2 = trace.wptr;\n    } else {\n      b1 = &trace.buf[0];\n      l1 = trace.wptr;\n      b2 = NULL;\n      l2 = 0;\n    }\n  }\n\n  int_unlock(lock);\n\n  if (buf1) {\n    *buf1 = b1;\n  }\n  if (len1) {\n    *len1 = l1;\n  }\n  if (buf2) {\n    *buf2 = b2;\n  }\n  if (len2) {\n    *len2 = l2;\n  }\n}\n\nstatic void hal_trace_print_discards(uint32_t discards) {\n  static const uint8_t base = 10;\n  char digit[5], *d, *out;\n  uint16_t len;\n  uint16_t size;\n\n  if (discards > max_discards) {\n    discards = max_discards;\n  }\n\n  d = &digit[0];\n  do {\n    *d++ = (discards % base) + '0';\n  } while (discards /= base);\n\n  out = &discards_buf[discards_digit_start];\n  do {\n    *out++ = *--d;\n  } while (d > &digit[0]);\n#ifdef TRACE_CRLF\n  *out++ = '\\r';\n#endif\n  *out++ = '\\n';\n  len = out - &discards_buf[0];\n\n  size = TRACE_BUF_SIZE - trace.wptr;\n  if (size >= len) {\n    size = len;\n  }\n  memcpy(&trace.buf[trace.wptr], &discards_buf[0], size);\n  if (size < len) {\n    memcpy(&trace.buf[0], &discards_buf[size], len - size);\n  }\n  trace.wptr += len;\n  if (trace.wptr >= TRACE_BUF_SIZE) {\n    trace.wptr -= TRACE_BUF_SIZE;\n  }\n}\n\n#ifdef AUDIO_DEBUG_V0_1_0\nstatic void hal_trace_print_head(void) {\n  uint16_t len;\n  uint16_t size;\n\n  len = sizeof(trace_head_buf) - 1;\n\n  size = TRACE_BUF_SIZE - trace.wptr;\n  if (size >= len) {\n    size = len;\n  }\n  memcpy(&trace.buf[trace.wptr], &trace_head_buf[0], size);\n  if (size < len) {\n    memcpy(&trace.buf[0], &trace_head_buf[size], len - size);\n  }\n  trace.wptr += len;\n  if (trace.wptr >= TRACE_BUF_SIZE) {\n    trace.wptr -= TRACE_BUF_SIZE;\n  }\n}\n#endif\n\nint hal_trace_output(const unsigned char *buf, unsigned int buf_len) {\n  int ret;\n  uint32_t lock;\n  uint32_t avail;\n  uint32_t out_len;\n  uint16_t size;\n\n  ret = 0;\n\n  lock = int_lock();\n#ifdef CP_TRACE_ENABLE\n  while (hal_memsc_lock(HAL_MEMSC_ID_TRACE) == 0)\n    ;\n#endif\n\n  // Avoid troubles when NMI occurs during trace\n  if (!trace.in_trace) {\n    trace.in_trace = true;\n\n    if (trace.wptr >= trace.rptr) {\n      avail = TRACE_BUF_SIZE - (trace.wptr - trace.rptr) - 1;\n    } else {\n      avail = (trace.rptr - trace.wptr) - 1;\n    }\n\n    out_len = buf_len;\n#ifdef AUDIO_DEBUG_V0_1_0\n    out_len += sizeof(trace_head_buf) - 1;\n#endif\n    if (trace.discards) {\n      out_len += sizeof(discards_buf);\n    }\n\n    if (avail < out_len) {\n      ret = 1;\n      if (trace.discards < (1 << (sizeof(trace.discards) * 8)) - 1) {\n        trace.discards++;\n      }\n#ifdef CP_TRACE_ENABLE\n#if (TRACE_IDLE_OUTPUT == 0)\n      hal_trace_send();\n#endif\n#endif\n    } else {\n#ifdef AUDIO_DEBUG_V0_1_0\n      hal_trace_print_head();\n#endif\n\n      if (trace.discards) {\n        hal_trace_print_discards(trace.discards);\n        trace.discards = 0;\n      }\n\n      size = TRACE_BUF_SIZE - trace.wptr;\n      if (size >= buf_len) {\n        size = buf_len;\n      }\n      memcpy(&trace.buf[trace.wptr], &buf[0], size);\n      if (size < buf_len) {\n        memcpy(&trace.buf[0], &buf[size], buf_len - size);\n      }\n      trace.wptr += buf_len;\n      if (trace.wptr >= TRACE_BUF_SIZE) {\n        trace.wptr -= TRACE_BUF_SIZE;\n        trace.wrapped = true;\n      }\n#if (TRACE_IDLE_OUTPUT == 0)\n      hal_trace_send();\n#endif\n    }\n\n#ifdef CP_TRACE_ENABLE\n    if (get_cpu_id()) {\n      if (cp_buffer_cb) {\n        if (avail < out_len) {\n          cp_buffer_cb(HAL_TRACE_BUF_STATE_FULL);\n        } else if (avail - out_len < TRACE_NEAR_FULL_THRESH) {\n          cp_buffer_cb(HAL_TRACE_BUF_STATE_NEAR_FULL);\n        }\n      }\n    }\n#endif\n\n    trace.in_trace = false;\n\n#ifdef CRASH_DUMP_ENABLE\n#ifdef TRACE_TO_APP\n    if (app_output_cb && app_output_enabled) {\n      bool saved_output_state;\n\n      saved_output_state = app_output_enabled;\n      app_output_enabled = false;\n\n      app_output_cb(buf, buf_len);\n\n      app_output_enabled = saved_output_state;\n    }\n#endif\n#endif\n  }\n\n#ifdef CP_TRACE_ENABLE\n  hal_memsc_unlock(HAL_MEMSC_ID_TRACE);\n#endif\n  int_unlock(lock);\n\n  return ret ? 0 : buf_len;\n}\n#ifdef USE_TRACE_ID\n// define USE_CRC_CHECK\n//#define LITE_VERSION\n\ntypedef struct {\n  uint32_t crc : 6;\n  uint32_t count : 4;\n  uint32_t tskid : 5;\n  uint32_t addr : 17; // 127 KB trace space support\n} trace_info_t;\n\ntypedef struct {\n  uint32_t crc : 8;\n  uint32_t timestamp : 24; // 4 hours support\n} trace_head_t;\n\ntypedef struct {\n#ifndef LITE_VERSION\n  trace_head_t trace_head;\n#endif\n  trace_info_t trace_info;\n} __attribute__((packed)) LOG_DATA_T;\n\nextern const char *unkonw_str;\n\nextern uint32_t __trc_str_start__[];\nextern uint32_t __trc_str_end__[];\nuint8_t crc8(uint8_t *data, uint32_t length) {\n  uint8_t i;\n  uint8_t crc = 0; // Initial value\n  while (length--) {\n    crc ^= *data++; // crc ^= *data; data++;\n    for (i = 0; i < 8; i++) {\n      if (crc & 0x80)\n        crc = (crc << 1) ^ 0x07;\n      else\n        crc <<= 1;\n    }\n  }\n  return crc;\n}\n\nuint8_t crc6(uint8_t *data, uint32_t length) {\n  uint8_t i;\n  uint8_t crc = 0; // Initial value\n  while (length--) {\n    crc ^= *data++; // crc ^= *data; data++;\n    for (i = 0; i < 8; ++i) {\n      if (crc & 1)\n        crc = (crc >> 1) ^ 0x30; // 0x30 = (reverse 0x03)>>(8-6)\n      else\n        crc = (crc >> 1);\n    }\n  }\n  return crc;\n}\n\nstatic int hal_trace_format_id(uint32_t attr, char *buf, uint32_t size,\n                               const char *fmt, va_list ap) {\n  uint8_t num;\n  unsigned int value[10];\n  LOG_DATA_T trace;\n\n  if (size < sizeof(trace) + sizeof(value)) {\n    return -1;\n  }\n\n  num = GET_BITFIELD(attr, LOG_ATTR_ARG_NUM);\n  if (num > 10) {\n    num = 10;\n  }\n  for (int i = 0; i < num; i++) {\n    value[i] = va_arg(ap, unsigned long);\n  }\n\n  // memset(buf, 0, size);\n\n  trace.trace_info.count = num;\n  trace.trace_info.addr =\n      (uint32_t)fmt -\n      (uint32_t)0xFFFC0000; //(uint32_t)fmt-(uint32_t)__trc_str_start__;\n  trace.trace_info.tskid = osGetThreadIntId();\n  trace.trace_info.crc = 0x2A;\n#ifndef LITE_VERSION\n  trace.trace_head.timestamp = TICKS_TO_MS(hal_sys_timer_get());\n#ifdef USE_CRC_CHECK\n  trace.trace_head.crc = crc8(((uint8_t *)&trace) + 1, 7);\n#else\n  trace.trace_head.crc = 0xBE;\n#endif\n#else\n  trace.trace_info.crc = crc6(((uint8_t *)&trace) + 1, 3);\n#endif\n  memcpy(buf, &trace, sizeof(trace));\n  if (num != 0) {\n    memcpy(buf + sizeof(trace), value, 4 * num);\n  }\n\n  return sizeof(trace) + 4 * num;\n}\n#endif\n\nstatic int hal_trace_print_time(enum LOG_LEVEL_T level,\n                                enum LOG_MODULE_T module, char *buf,\n                                unsigned int size) {\n#ifdef TRACE_TIME_STAMP\n  static const char level_ch[] = {\n      'C', 'E', 'W', 'N', 'I', 'D', 'V', '-',\n  };\n  char ctx[10];\n  int len;\n  int i;\n  const char *mod_name;\n\n#ifdef CRASH_DUMP_ENABLE\n  if (crash_handling) {\n    return 0;\n  }\n#endif\n\n  if (0) {\n#ifdef CP_TRACE_ENABLE\n  } else if (get_cpu_id()) {\n    ctx[0] = ' ';\n    ctx[1] = 'C';\n    ctx[2] = 'P';\n    ctx[3] = '\\0';\n#endif\n  } else if (in_isr()) {\n    len = snprintf(ctx, sizeof(ctx), \"%2d\", (int8_t)NVIC_GetCurrentActiveIRQ());\n    if (len + 1 < ARRAY_SIZE(ctx)) {\n      ctx[len] = 'E';\n      ctx[len + 1] = '\\0';\n    } else {\n      ctx[ARRAY_SIZE(ctx) - 2] = '.';\n      ctx[ARRAY_SIZE(ctx) - 1] = '\\0';\n    }\n  } else {\n#ifdef RTOS\n#ifdef KERNEL_RTX5\n    /* const char *thread_name = osGetThreadName(); */\n    /* snprintf(ctx, sizeof(ctx), \"%.9s\", thread_name ? (char *)thread_name :\n     * \"NULL\"); */\n    ctx[0] = ' ';\n    ctx[1] = ' ';\n    ctx[2] = 't';\n    ctx[3] = '\\0';\n#else\n    snprintf(ctx, sizeof(ctx), \"%3d\", osGetThreadIntId());\n#endif\n#else\n    ctx[0] = ' ';\n    ctx[1] = ' ';\n    ctx[2] = '0';\n    ctx[3] = '\\0';\n#endif\n  }\n  ctx[ARRAY_SIZE(ctx) - 1] = '\\0';\n  len = 0;\n  len += snprintf(&buf[len], size - len, \"%9u/\",\n                  (unsigned)TICKS_TO_MS(hal_sys_timer_get()));\n  if (size > len + 2) {\n    buf[len++] = level_ch[level];\n    buf[len++] = '/';\n  }\n  if (size > len + 7) {\n    mod_name = hal_trace_get_log_module_desc(module);\n    for (i = 0; i < 6; i++) {\n      if (mod_name[i] == '\\0') {\n        break;\n      }\n      buf[len++] = mod_name[i];\n    }\n    for (; i < 6; i++) {\n      buf[len++] = ' ';\n    }\n    buf[len++] = '/';\n  }\n  len += snprintf(&buf[len], size - len, \"%s | \", ctx);\n  return len;\n#else  // !TRACE_TIME_STAMP\n  return 0;\n#endif // !TRACE_TIME_STAMP\n}\n\nstatic inline int hal_trace_format_va(uint32_t attr, char *buf,\n                                      unsigned int size, const char *fmt,\n                                      va_list ap) {\n  int len;\n\n  len = vsnprintf(&buf[0], size, fmt, ap);\n  if ((attr & LOG_ATTR_NO_LF) == 0) {\n#ifdef TRACE_CRLF\n    if (len + 2 < size) {\n      buf[len++] = '\\r';\n    }\n#endif\n    if (len + 1 < size) {\n      buf[len++] = '\\n';\n    }\n  }\n  // if (len < size) buf[len] = 0;\n\n  return len;\n}\n\nstatic int hal_trace_printf_internal(uint32_t attr, const char *fmt,\n                                     va_list ap) {\n#ifdef USE_TRACE_ID\n  char buf[60];\n#else\n  char buf[120];\n#endif\n  int len = 0;\n  enum LOG_LEVEL_T level;\n  enum LOG_MODULE_T module;\n\n  level = GET_BITFIELD(attr, LOG_ATTR_LEVEL);\n  module = GET_BITFIELD(attr, LOG_ATTR_MOD);\n\n#ifdef CRASH_DUMP_ENABLE\n  if (!crash_handling)\n#endif\n  {\n    if (level > trace_max_level) {\n      return 0;\n    }\n    if (level > LOG_LEVEL_CRITICAL &&\n        (trace_mod_map[module >> 5] & (1 << (module & 0x1F))) == 0) {\n      return 0;\n    }\n  }\n\n#ifdef USE_TRACE_ID\n  if ((attr & LOG_ATTR_NO_ID) ||\n      (len = hal_trace_format_id(attr, buf, sizeof(buf), fmt, ap)) < 0)\n#endif\n  {\n    len = 0;\n    if ((attr & LOG_ATTR_NO_TS) == 0) {\n      len += hal_trace_print_time(level, module, &buf[len], sizeof(buf) - len);\n    }\n    len += hal_trace_format_va(attr, &buf[len], sizeof(buf) - len, fmt, ap);\n  }\n\n  return hal_trace_output((unsigned char *)buf, len);\n}\n\nint hal_trace_printf(uint32_t attr, const char *fmt, ...) {\n  int ret;\n  va_list ap;\n\n  if (attr & LOG_ATTR_IMM) {\n    hal_trace_flush_buffer();\n  }\n\n  va_start(ap, fmt);\n  ret = hal_trace_printf_internal(attr, fmt, ap);\n  va_end(ap);\n\n  if (attr & LOG_ATTR_IMM) {\n    hal_trace_flush_buffer();\n  }\n\n  return ret;\n}\n\nint hal_trace_dump(const char *fmt, unsigned int size, unsigned int count,\n                   const void *buffer) {\n  char buf[255] = {0};\n  int len = 0, n = 0, i = 0;\n\n  switch (size) {\n  case sizeof(uint32_t):\n    while (i < count && len < sizeof(buf)) {\n      len += snprintf(&buf[len], sizeof(buf) - len, fmt,\n                      *(uint32_t *)((uint32_t *)buffer + i));\n      i++;\n    }\n    break;\n  case sizeof(uint16_t):\n    while (i < count && len < sizeof(buf)) {\n      len += snprintf(&buf[len], sizeof(buf) - len, fmt,\n                      *(int16_t *)((int16_t *)buffer + i));\n      i++;\n    }\n    break;\n  case sizeof(uint8_t):\n  default:\n    while (i < count && len < sizeof(buf)) {\n      len += snprintf(&buf[len], sizeof(buf) - len, fmt,\n                      *(uint8_t *)((uint8_t *)buffer + i));\n      i++;\n    }\n    break;\n  }\n\n#ifdef TRACE_CRLF\n  if (len + 2 < sizeof(buf)) {\n    buf[len++] = '\\r';\n  }\n#endif\n  if (len + 1 < sizeof(buf)) {\n    buf[len++] = '\\n';\n  }\n\n  n = hal_trace_output((unsigned char *)buf, len + 1);\n\n  return n;\n}\n\nint hal_trace_busy(void) {\n  union HAL_UART_FLAG_T flag;\n\n  if (hal_trace_is_uart_transport(trace_transport)) {\n    if (hal_uart_opened(trace_uart)) {\n      flag = hal_uart_get_flag(trace_uart);\n      return flag.BUSY;\n    }\n  }\n  return 0;\n}\n\nint hal_trace_pause(void) {\n  if (hal_trace_is_uart_transport(trace_transport)) {\n    return hal_uart_pause(trace_uart);\n  }\n  return 1;\n}\n\nint hal_trace_continue(void) {\n  if (hal_trace_is_uart_transport(trace_transport)) {\n    return hal_uart_continue(trace_uart);\n  }\n  return 1;\n}\n\nint hal_trace_flush_buffer(void) {\n  uint32_t lock;\n  uint32_t time;\n  int ret;\n  enum HAL_DMA_RET_T dma_ret;\n\n  if (!hal_trace_is_uart_transport(trace_transport)) {\n    return -1;\n  }\n\n#ifdef CP_TRACE_ENABLE\n  if (get_cpu_id()) {\n    if (cp_buffer_cb) {\n      cp_buffer_cb(HAL_TRACE_BUF_STATE_FLUSH);\n    }\n    return 0;\n  }\n#endif\n\n  hal_uart_continue(trace_uart);\n\n  lock = int_lock();\n\n  time = hal_sys_timer_get();\n  while (trace.wptr != trace.rptr &&\n         hal_sys_timer_get() - time < TRACE_FLUSH_TIMEOUT) {\n#if (TRACE_IDLE_OUTPUT == 0)\n    while (hal_gpdma_chan_busy(dma_cfg.ch))\n      ;\n    dma_ret = hal_gpdma_irq_run_chan(dma_cfg.ch);\n    if (dma_ret != HAL_DMA_OK) {\n      hal_trace_send();\n    }\n#else\n    hal_trace_idle_send();\n#endif\n  }\n\n  ret = (trace.wptr == trace.rptr) ? 0 : 1;\n\n  int_unlock(lock);\n\n  return ret;\n}\n\nuint32_t hal_trace_get_backtrace_addr(uint32_t addr) {\n  if (!hal_trace_address_executable(addr)) {\n    return 0;\n  }\n\n#ifndef __ARM_ARCH_ISA_ARM\n#if defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)\n  // BL Instruction\n  // OFFSET: 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 15 14 13 12 11 10\n  // 09 08 07 06 05 04 03 02 01 00 VALUE :  1  1  1  1  0  -  -  -  -  -  -  -\n  // -  -  -  -  1  1  -  1  -  -  -  -  -  -  -  -  -  -  -  -\n\n  // BLX Instruction\n  // OFFSET: 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00\n  // VALUE :  0  1  0  0  0  1  1  1  1  -  -  -  -  -  -  -\n\n  uint16_t val;\n  uint32_t new_addr;\n\n  new_addr = (addr & ~1) - 2;\n\n  val = *(uint16_t *)new_addr;\n  if ((val & 0xFF80) == 0x4780) {\n    // BLX\n    return new_addr;\n  } else if ((val & 0xD000) == 0xD000) {\n    new_addr -= 2;\n    val = *(uint16_t *)new_addr;\n    if ((val & 0xF800) == 0xF000) {\n      // BL\n      return new_addr;\n    }\n  }\n#else\n#error \"Only ARMv7-M/ARMv8-M function can be checked for BL/BLX instructions\"\n#endif\n#endif\n\n  return 0;\n}\n\n#ifndef __ARM_ARCH_ISA_ARM\nvoid hal_trace_print_special_stack_registers(void) {\n  int len;\n\n  hal_trace_output((const unsigned char *)newline, sizeof(newline) - 1);\n\n  len =\n      snprintf(crash_buf, sizeof(crash_buf), \"MSP=%08X, PSP=%08X\" NEW_LINE_STR,\n               (unsigned)__get_MSP(), (unsigned)__get_PSP());\n  hal_trace_output((unsigned char *)crash_buf, len);\n\n#ifdef __ARM_ARCH_8M_MAIN__\n  len = snprintf(crash_buf, sizeof(crash_buf),\n                 \"MSPLIM=%08X, PSPLIM=%08X\" NEW_LINE_STR,\n                 (unsigned)__get_MSPLIM(), (unsigned)__get_PSPLIM());\n  hal_trace_output((unsigned char *)crash_buf, len);\n#endif\n}\n#endif\n\nvoid hal_trace_print_common_registers(const uint32_t *regs) {\n  int len;\n  int i;\n  int index;\n\n  hal_trace_output((const unsigned char *)newline, sizeof(newline) - 1);\n\n  for (i = 0; i < 3; i++) {\n    index = i * 4;\n    len = snprintf(\n        crash_buf, sizeof(crash_buf),\n        \"R%-2d=%08X, R%-2d=%08X, R%-2d=%08X, R%-2d=%08X\" NEW_LINE_STR, index,\n        (unsigned)regs[index], index + 1, (unsigned)regs[index + 1], index + 2,\n        (unsigned)regs[index + 2], index + 3, (unsigned)regs[index + 3]);\n    hal_trace_output((unsigned char *)crash_buf, len);\n  }\n  len = snprintf(crash_buf, sizeof(crash_buf),\n                 \"R12=%08X, SP =%08X, LR =%08X\" NEW_LINE_STR,\n                 (unsigned)regs[12], (unsigned)regs[13], (unsigned)regs[14]);\n  hal_trace_output((unsigned char *)crash_buf, len);\n}\n\nvoid hal_trace_print_stack(uint32_t addr) {\n  static const char stack_title[] = \"Stack:\" NEW_LINE_STR;\n  int len = 0;\n  int i;\n  int pos;\n  uint32_t *stack;\n\n  addr &= ~3;\n  if (!hal_trace_address_writable(addr)) {\n    return;\n  }\n\n  hal_trace_output((const unsigned char *)newline, sizeof(newline) - 1);\n  hal_trace_output((const unsigned char *)stack_title, sizeof(stack_title) - 1);\n\n  stack = (uint32_t *)addr - STACK_DUMP_CNT_PREV;\n  for (i = 0; i < (STACK_DUMP_CNT_PREV + STACK_DUMP_CNT); i++) {\n    if (!hal_trace_address_writable((uint32_t)&stack[i])) {\n      break;\n    }\n    pos = (i % STACK_DUMP_CNT_PER_LEN);\n    if (pos == 0) {\n      len = snprintf(crash_buf, sizeof(crash_buf), \"%c %08X: %08X\",\n                     (i == STACK_DUMP_CNT_PREV) ? '*' : ' ',\n                     (unsigned)&stack[i], (unsigned)stack[i]);\n    } else {\n      len += snprintf(crash_buf + len, sizeof(crash_buf) - len, \" %08X\",\n                      (unsigned)stack[i]);\n      if (pos == (STACK_DUMP_CNT_PER_LEN - 1)) {\n#ifdef TRACE_CRLF\n        if (len + 2 < sizeof(crash_buf)) {\n          crash_buf[len++] = '\\r';\n        }\n#endif\n        if (len + 1 < sizeof(crash_buf)) {\n          crash_buf[len++] = '\\n';\n        }\n        hal_trace_output((unsigned char *)crash_buf, len);\n        hal_trace_flush_buffer();\n      }\n    }\n  }\n}\n\nvoid hal_trace_print_backtrace(uint32_t addr, uint32_t search_cnt,\n                               uint32_t print_cnt) {\n  static const char bt_title[] = \"Possible Backtrace:\" NEW_LINE_STR;\n  int i, j;\n  int len;\n  uint32_t *stack;\n  uint32_t call_addr;\n\n  addr &= ~3;\n  if (!hal_trace_address_writable(addr)) {\n    return;\n  }\n\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n  hal_trace_output((const unsigned char *)bt_title, sizeof(bt_title));\n\n  stack = (uint32_t *)addr;\n  for (i = 0, j = 0; i < search_cnt && j < print_cnt; i++) {\n    if (!hal_trace_address_writable((uint32_t)&stack[i])) {\n      break;\n    }\n    call_addr = hal_trace_get_backtrace_addr(stack[i]);\n    if (call_addr) {\n      len = snprintf(crash_buf, sizeof(crash_buf), \"%8X\" NEW_LINE_STR,\n                     (unsigned)call_addr);\n      hal_trace_output((unsigned char *)crash_buf, len + 1);\n      j++;\n    }\n  }\n}\n\nuint32_t hal_trace_get_baudrate(void) { return uart_cfg.baud; }\n\nbool hal_trace_crash_dump_onprocess(void) { return crash_dump_onprocess; }\n\nint hal_trace_crash_dump_register(enum HAL_TRACE_CRASH_DUMP_MODULE_T module,\n                                  HAL_TRACE_CRASH_DUMP_CB_T cb) {\n#ifdef CRASH_DUMP_ENABLE\n  ASSERT(module < HAL_TRACE_CRASH_DUMP_MODULE_END, \"%s module %d\", __func__,\n         module);\n  crash_dump_cb_list[module] = cb;\n#endif\n  return 0;\n}\n\n#ifdef CRASH_DUMP_ENABLE\nstatic void hal_trace_crash_dump_callback(void) {\n  int i;\n\n  crash_handling = true;\n\n  for (i = 0; i < ARRAY_SIZE(crash_dump_cb_list); i++) {\n    if (crash_dump_cb_list[i]) {\n      crash_dump_cb_list[i]();\n    }\n  }\n}\n#endif\n\nvoid hal_trace_app_register(HAL_TRACE_APP_NOTIFY_T notify_cb,\n                            HAL_TRACE_APP_OUTPUT_T output_cb) {\n#ifdef TRACE_TO_APP\n  app_notify_cb = notify_cb;\n  app_output_cb = output_cb;\n#endif\n}\n\nvoid hal_trace_app_custom_register(HAL_TRACE_APP_NOTIFY_T notify_cb,\n                                   HAL_TRACE_APP_OUTPUT_T output_cb,\n                                   HAL_TRACE_APP_OUTPUT_T crash_custom_cb) {\n#ifdef TRACE_TO_APP\n  hal_trace_app_register(notify_cb, output_cb);\n  app_crash_custom_cb = crash_custom_cb;\n#endif\n}\n\nvoid hal_trace_cp_register(HAL_TRACE_APP_NOTIFY_T notify_cb,\n                           HAL_TRACE_BUF_CTRL_T buf_cb) {\n#ifdef CP_TRACE_ENABLE\n  cp_notify_cb = notify_cb;\n  cp_buffer_cb = buf_cb;\n#endif\n}\n\n#else // !(DEBUG || REL_TRACE_ENABLE)\n\nint hal_trace_open(enum HAL_TRACE_TRANSPORT_T transport) {\n#ifdef FAULT_DUMP\n#ifdef __ARM_ARCH_ISA_ARM\n  GIC_SetFaultDumpHandler(hal_trace_fault_dump);\n#else\n  NVIC_SetDefaultFaultHandler(hal_trace_fault_handler);\n#endif\n#endif\n\n  return 0;\n}\n\n#endif // !(DEBUG || REL_TRACE_ENABLE)\n\nint hal_trace_open_cp(void) {\n#ifdef CP_TRACE_ENABLE\n#ifdef FAULT_DUMP\n  NVIC_SetDefaultFaultHandler_cp(hal_trace_fault_handler);\n#endif\n#endif\n  return 0;\n}\n\nint hal_trace_address_writable(uint32_t addr) {\n  if (RAM_BASE < addr && addr < RAM_BASE + RAM_SIZE) {\n    return 1;\n  }\n#ifdef PSRAM_BASE\n  if (PSRAM_BASE < addr && addr < PSRAM_BASE + PSRAM_SIZE) {\n    return 1;\n  }\n#endif\n#ifdef PSRAM_NC_BASE\n  if (PSRAM_NC_BASE < addr && addr < PSRAM_NC_BASE + PSRAM_SIZE) {\n    return 1;\n  }\n#endif\n#ifdef PSRAMUHS_BASE\n  if (PSRAMUHS_BASE < addr && addr < PSRAMUHS_BASE + PSRAMUHS_SIZE) {\n    return 1;\n  }\n#endif\n#ifdef PSRAMUHS_NC_BASE\n  if (PSRAMUHS_NC_BASE < addr && addr < PSRAMUHS_NC_BASE + PSRAMUHS_SIZE) {\n    return 1;\n  }\n#endif\n#ifdef RAMRET_BASE\n  if (RAMRET_BASE < addr && addr < RAMRET_BASE + RAMRET_SIZE) {\n    return 1;\n  }\n#endif\n#ifdef RAMCP_BASE\n  if (RAMCP_BASE < addr && addr < RAMCP_BASE + RAMCP_SIZE) {\n    return 1;\n  }\n#endif\n  return 0;\n}\n\nint hal_trace_address_executable(uint32_t addr) {\n// Avoid reading out of valid memory region when parsing instruction content\n#define X_ADDR_OFFSET 0x10\n\n  // Check thumb code\n  if ((addr & 1) == 0) {\n    return 0;\n  }\n  // Check location\n  if (RAMX_BASE + X_ADDR_OFFSET < addr && addr < RAMX_BASE + RAM_SIZE) {\n    return 1;\n  }\n  if (FLASHX_BASE + X_ADDR_OFFSET < addr && addr < FLASHX_BASE + FLASH_SIZE) {\n    return 1;\n  }\n#ifdef PSRAMX_BASE\n  if (PSRAMX_BASE + X_ADDR_OFFSET < addr && addr < PSRAMX_BASE + PSRAM_SIZE) {\n    return 1;\n  }\n#endif\n#ifdef PSRAMUHSX_BASE\n  if (PSRAMUHSX_BASE + X_ADDR_OFFSET < addr &&\n      addr < PSRAMUHSX_BASE + PSRAMUHS_SIZE) {\n    return 1;\n  }\n#endif\n#ifdef RAMXRET_BASE\n  if (RAMXRET_BASE < addr && addr < RAMXRET_BASE + RAMRET_SIZE) {\n    return 1;\n  }\n#endif\n\n//#define CHECK_ROM_CODE\n#ifdef CHECK_ROM_CODE\n#ifndef USED_ROM_SIZE\n#define USED_ROM_SIZE ROM_SIZE\n#endif\n  if (ROM_BASE + (NVIC_USER_IRQ_OFFSET * 4) < addr &&\n      addr < ROM_BASE + USED_ROM_SIZE) {\n    return 1;\n  }\n#endif\n\n#if 0\n    if (FLASHX_NC_BASE < addr && addr < FLASHX_NC_BASE + FLASH_SIZE) {\n        return 1;\n    }\n#ifdef PSRAMX_NC_BASE\n    if (PSRAMX_NC_BASE < addr && addr < PSRAMX_NC_BASE + PSRAM_SIZE) {\n        return 1;\n    }\n#endif\n#ifdef PSRAMUHSX_NC_BASE\n    if (PSRAMUHSX_NC_BASE < addr && addr < PSRAMUHSX_NC_BASE + PSRAMUHS_SIZE) {\n        return 1;\n    }\n#endif\n#endif\n  return 0;\n}\n\nint hal_trace_address_readable(uint32_t addr) {\n  if (hal_trace_address_writable(addr)) {\n    return 1;\n  }\n  if (hal_trace_address_executable(addr)) {\n    return 1;\n  }\n  if (FLASH_BASE < addr && addr < FLASH_BASE + FLASH_SIZE) {\n    return 1;\n  }\n  if (FLASH_NC_BASE < addr && addr < FLASH_NC_BASE + FLASH_SIZE) {\n    return 1;\n  }\n#ifdef PSRAM_NC_BASE\n  if (PSRAM_NC_BASE < addr && addr < PSRAM_NC_BASE + PSRAM_SIZE) {\n    return 1;\n  }\n#endif\n#ifdef PSRAMUHS_NC_BASE\n  if (PSRAMUHS_NC_BASE < addr && addr < PSRAMUHS_NC_BASE + PSRAMUHS_SIZE) {\n    return 1;\n  }\n#endif\n  return 0;\n}\n\nstatic void NORETURN hal_trace_crash_end(void) {\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n  hal_trace_flush_buffer();\n  hal_sys_timer_delay(MS_TO_TICKS(5));\n#endif\n\n  // Tag failure for simulation environment\n  hal_cmu_simu_fail();\n#ifndef PROGRAMMER\n#ifndef __BES_OTA_MODE__\n  nv_record_flash_flush();\n#endif\n#endif\n#ifdef CRASH_REBOOT\n\n  hal_sw_bootmode_set(HAL_SW_BOOTMODE_REBOOT |\n                      HAL_SW_BOOTMODE_REBOOT_FROM_CRASH);\n  hal_cmu_sys_reboot();\n#else\n  hal_iomux_set_analog_i2c();\n  hal_iomux_set_jtag();\n  hal_cmu_jtag_clock_enable();\n#endif\n\n  SAFE_PROGRAM_STOP();\n}\n\n__STATIC_FORCEINLINE uint32_t get_cpu_id_tag(void) {\n  uint32_t cpu_id;\n#ifdef CP_TRACE_ENABLE\n  cpu_id = get_cpu_id();\n#elif defined(__ARM_ARCH_ISA_ARM)\n  cpu_id = 0xAAAA0000 | (get_cpu_id() & 0xFFFF);\n#else\n  cpu_id = 0;\n#endif\n  return cpu_id;\n}\n\nstatic void NORETURN USED hal_trace_assert_dump_internal(ASSERT_DUMP_ARGS) {\n  const uint32_t *p_regs;\n  struct ASSERT_INFO_T info;\n  int i;\n\n  // MUST SAVE REGISTERS FIRST!\n  p_regs = (const uint32_t *)crash_buf;\n  for (i = 0; i < ARRAY_SIZE(info.R); i++) {\n    info.R[i] = p_regs[i];\n  }\n\n  int_lock_global();\n\n  info.ID = HAL_TRACE_ASSERT_ID;\n  info.CPU_ID = get_cpu_id_tag();\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE)) &&                           \\\n    defined(ASSERT_SHOW_FILE_FUNC)\n  info.FILE = file;\n#elif (defined(DEBUG) || defined(REL_TRACE_ENABLE)) && defined(ASSERT_SHOW_FILE)\n  info.FILE = scope;\n#else\n  info.FILE = NULL;\n#endif\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE)) &&                           \\\n    defined(ASSERT_SHOW_FILE_FUNC)\n  info.FUNC = func;\n#elif (defined(DEBUG) || defined(REL_TRACE_ENABLE)) && defined(ASSERT_SHOW_FUNC)\n  info.FUNC = scope;\n#else\n  info.FUNC = NULL;\n#endif\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE)) &&                           \\\n    (defined(ASSERT_SHOW_FILE_FUNC) || defined(ASSERT_SHOW_FILE) ||            \\\n     defined(ASSERT_SHOW_FUNC))\n  info.LINE = line;\n#else\n  info.LINE = 0;\n#endif\n  info.FMT = fmt;\n#ifndef __ARM_ARCH_ISA_ARM\n  info.MSP = __get_MSP();\n  info.PSP = __get_PSP();\n  info.CONTROL = __get_CONTROL();\n#ifdef __ARM_ARCH_8M_MAIN__\n  info.MSPLIM = __get_MSPLIM();\n  info.PSPLIM = __get_PSPLIM();\n#endif\n#endif\n\n  *(volatile uint32_t *)RAM_BASE = (uint32_t)&info;\n\n#ifdef ASSERT_MUTE_CODEC\n  bool crash_mute = true;\n#ifdef CP_TRACE_ENABLE\n  if (get_cpu_id()) {\n    // Forbid CP to access CODEC\n    crash_mute = false;\n  }\n#endif\n  if (crash_mute) {\n    hal_codec_crash_mute();\n  }\n#endif\n\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n\n  static const char POSSIBLY_UNUSED desc_file[] = \"FILE    : \";\n  static const char POSSIBLY_UNUSED desc_func[] = \"FUNCTION: \";\n  static const char POSSIBLY_UNUSED desc_line[] = \"LINE    : \";\n  int len;\n  va_list ap;\n\n#ifdef CRASH_DUMP_ENABLE\n  bool full_dump = true;\n\n#ifdef CP_TRACE_ENABLE\n  if (get_cpu_id()) {\n    full_dump = false;\n    if (cp_notify_cb) {\n      cp_notify_cb(HAL_TRACE_STATE_CRASH_ASSERT_START);\n    }\n  }\n#endif\n\n  if (full_dump) {\n#ifdef TRACE_TO_APP\n    if (app_notify_cb) {\n      app_notify_cb(HAL_TRACE_STATE_CRASH_ASSERT_START);\n    }\n    app_output_enabled = true;\n#endif\n\n    crash_dump_onprocess = true;\n    for (uint8_t i = 0; i < 10; i++) {\n      REL_TRACE_IMM(0, \"                                                       \"\n                       \"                 \");\n      REL_TRACE_IMM(0, \"                                                       \"\n                       \"                 \" NEW_LINE_STR);\n      hal_sys_timer_delay(MS_TO_TICKS(50));\n    }\n  }\n#endif\n\n  hal_trace_flush_buffer();\n\n  hal_sysfreq_req(HAL_SYSFREQ_USER_INIT, HAL_CMU_FREQ_52M);\n\n  len = hal_trace_print_time(LOG_LEVEL_CRITICAL, LOG_MODULE_NONE, &crash_buf[0],\n                             sizeof(crash_buf));\n  if (len > 0) {\n    hal_trace_output((const unsigned char *)newline, sizeof(newline));\n    hal_trace_output((unsigned char *)crash_buf, len);\n  }\n  len = snprintf(&crash_buf[0], sizeof(crash_buf),\n                 NEW_LINE_STR \"### ASSERT @ 0x%08X ###\" NEW_LINE_STR,\n                 (unsigned)info.R[14]);\n  hal_trace_output((unsigned char *)crash_buf, len);\n\n#if defined(ASSERT_SHOW_FILE_FUNC) || defined(ASSERT_SHOW_FILE) ||             \\\n    defined(ASSERT_SHOW_FUNC)\n  const char separate_line[] =\n      \"----------------------------------------\" NEW_LINE_STR;\n#ifdef ASSERT_SHOW_FILE\n  const char *file = scope;\n#elif defined(ASSERT_SHOW_FUNC)\n  const char *func = scope;\n#endif\n\n#if defined(ASSERT_SHOW_FILE_FUNC) || defined(ASSERT_SHOW_FILE)\n  hal_trace_output((const unsigned char *)desc_file, sizeof(desc_file));\n  hal_trace_output((const unsigned char *)file, strlen(file) + 1);\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n#endif\n\n#if defined(ASSERT_SHOW_FILE_FUNC) || defined(ASSERT_SHOW_FUNC)\n  hal_trace_output((const unsigned char *)desc_func, sizeof(desc_func));\n  hal_trace_output((const unsigned char *)func, strlen(func) + !);\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n#endif\n\n  hal_trace_output((const unsigned char *)desc_line, sizeof(desc_func));\n  len = snprintf(crash_buf, sizeof(crash_buf), \"%u\", line);\n  hal_trace_output((const unsigned char *)crash_buf, len);\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n\n  hal_trace_output((unsigned char *)separate_line, sizeof(separate_line));\n\n  hal_trace_flush_buffer();\n#endif\n\n  va_start(ap, fmt);\n  len = hal_trace_format_va(0, crash_buf, sizeof(crash_buf), fmt, ap);\n  va_end(ap);\n\n  hal_trace_output((unsigned char *)crash_buf, len);\n\n  hal_trace_flush_buffer();\n\n  hal_trace_print_common_registers(info.R);\n  hal_trace_print_special_stack_registers();\n\n  hal_trace_print_stack(info.R[13]);\n\n  hal_trace_print_backtrace(info.R[13], TRACE_BACKTRACE_SEARCH_WORD,\n                            TRACE_BACKTRACE_NUM);\n\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n\n  hal_trace_flush_buffer();\n\n#ifdef CRASH_DUMP_ENABLE\n  if (full_dump) {\n    hal_trace_crash_dump_callback();\n    hal_trace_flush_buffer();\n    hal_sys_timer_delay(MS_TO_TICKS(5));\n\n#ifdef CORE_DUMP\n    AssertCatcher_Entry();\n    hal_sys_timer_delay(MS_TO_TICKS(5));\n#endif\n\n#ifdef TRACE_TO_APP\n    if (app_notify_cb) {\n      app_notify_cb(HAL_TRACE_STATE_CRASH_END);\n    }\n#endif\n  }\n\n#ifdef CP_TRACE_ENABLE\n  if (get_cpu_id()) {\n    if (cp_notify_cb) {\n      cp_notify_cb(HAL_TRACE_STATE_CRASH_END);\n    }\n    SAFE_PROGRAM_STOP();\n  }\n#endif\n#endif // CRASH_DUMP_ENABLE\n\n#endif // DEBUG || REL_TRACE_ENABLE\n\n  hal_trace_crash_end();\n}\n\nvoid NORETURN NAKED hal_trace_assert_dump(ASSERT_DUMP_ARGS) {\n  asm volatile(\"subs sp, sp, #4*\" TO_STRING(\n      STACK_DUMP_CNT_PREV) \";\"\n                           \".cfi_def_cfa_offset 4*\" TO_STRING(\n                               STACK_DUMP_CNT_PREV) \";\"\n                                                    \"push {r0, r1};\"\n                                                    \"ldr r0, =crash_buf;\"\n                                                    \"ldr r1, [sp];\"\n                                                    \"str r1, [r0], 4;\"\n                                                    \"ldr r1, [sp, 4];\"\n                                                    \"str r1, [r0], 4;\"\n                                                    \"stmia r0!, {r2-r12};\"\n                                                    \"add r1, sp, \"\n                                                    \"#4*(2+\" TO_STRING(\n                                                        STACK_DUMP_CNT_PREV) \")\"\n                                                                             \";\"\n                                                                             \"s\"\n                                                                             \"t\"\n                                                                             \"r\"\n                                                                             \" \"\n                                                                             \"r\"\n                                                                             \"1\"\n                                                                             \",\"\n                                                                             \" \"\n                                                                             \"[\"\n                                                                             \"r\"\n                                                                             \"0\"\n                                                                             \"]\"\n                                                                             \",\"\n                                                                             \" \"\n                                                                             \"4\"\n                                                                             \";\"\n                                                                             \"s\"\n                                                                             \"t\"\n                                                                             \"r\"\n                                                                             \" \"\n                                                                             \"l\"\n                                                                             \"r\"\n                                                                             \",\"\n                                                                             \" \"\n                                                                             \"[\"\n                                                                             \"r\"\n                                                                             \"0\"\n                                                                             \"]\"\n                                                                             \",\"\n                                                                             \" \"\n                                                                             \"4\"\n                                                                             \";\"\n                                                                             \"p\"\n                                                                             \"o\"\n                                                                             \"p\"\n                                                                             \" \"\n                                                                             \"{\"\n                                                                             \"r\"\n                                                                             \"0\"\n                                                                             \",\"\n                                                                             \" \"\n                                                                             \"r\"\n                                                                             \"1\"\n                                                                             \"}\"\n                                                                             \";\"\n                                                                             \"b\"\n                                                                             \".\"\n                                                                             \"w\"\n                                                                             \" \"\n                                                                             \"h\"\n                                                                             \"a\"\n                                                                             \"l\"\n                                                                             \"_\"\n                                                                             \"t\"\n                                                                             \"r\"\n                                                                             \"a\"\n                                                                             \"c\"\n                                                                             \"e\"\n                                                                             \"_\"\n                                                                             \"a\"\n                                                                             \"s\"\n                                                                             \"s\"\n                                                                             \"e\"\n                                                                             \"r\"\n                                                                             \"t\"\n                                                                             \"_\"\n                                                                             \"d\"\n                                                                             \"u\"\n                                                                             \"m\"\n                                                                             \"p\"\n                                                                             \"_\"\n                                                                             \"i\"\n                                                                             \"n\"\n                                                                             \"t\"\n                                                                             \"e\"\n                                                                             \"r\"\n                                                                             \"n\"\n                                                                             \"a\"\n                                                                             \"l\"\n                                                                             \";\");\n}\n\n#ifdef FAULT_DUMP\nstatic void hal_trace_fill_exception_info(struct EXCEPTION_INFO_T *info,\n                                          const uint32_t *regs,\n                                          const uint32_t *extra,\n                                          uint32_t extra_len) {\n  info->ID = HAL_TRACE_EXCEPTION_ID;\n  info->CPU_ID = get_cpu_id_tag();\n  info->REGS = regs;\n#ifdef __ARM_ARCH_ISA_ARM\n  info->extra = extra;\n  info->extra_len = extra_len;\n#else\n  info->MSP = __get_MSP();\n  info->PSP = __get_PSP();\n  info->PRIMASK = regs[17];\n  info->FAULTMASK = __get_FAULTMASK();\n  info->BASEPRI = __get_BASEPRI();\n  info->CONTROL = __get_CONTROL();\n  info->ICSR = SCB->ICSR;\n  info->AIRCR = SCB->AIRCR;\n  info->SCR = SCB->SCR;\n  info->CCR = SCB->CCR;\n  info->SHCSR = SCB->SHCSR;\n  info->CFSR = SCB->CFSR;\n  info->HFSR = SCB->HFSR;\n  info->AFSR = SCB->AFSR;\n  info->MMFAR = SCB->MMFAR;\n  info->BFAR = SCB->BFAR;\n#ifdef __ARM_ARCH_8M_MAIN__\n  info->MSPLIM = __get_MSPLIM();\n  info->PSPLIM = __get_PSPLIM();\n#endif\n#endif\n}\n\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n#ifdef __ARM_ARCH_ISA_ARM\nstatic void hal_trace_print_fault_info_ca(const struct EXCEPTION_INFO_T *info) {\n  const struct FAULT_REGS_T *fregs;\n  const uint32_t *extra;\n  // uint32_t extra_len;\n  enum EXCEPTION_ID_T id;\n  int len;\n  uint32_t val;\n  const char *desc;\n\n  fregs = (const struct FAULT_REGS_T *)info->REGS;\n  extra = info->extra;\n  // extra_len = info->extra_len;\n\n  id = (enum EXCEPTION_ID_T)extra[0];\n\n  len = snprintf(crash_buf, sizeof(crash_buf), \"PC =%08X\",\n                 (unsigned)fregs->r[15]);\n  len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                  \", ExceptionNumber=%d\" NEW_LINE_STR, id);\n  hal_trace_output((unsigned char *)crash_buf, len);\n\n  hal_trace_print_common_registers(fregs->r);\n\n  len = snprintf(crash_buf, sizeof(crash_buf), \"SPSR=%08X\",\n                 (unsigned)fregs->spsr);\n  len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \", APSR=%c%c%c%c%c\",\n                  (fregs->spsr & (1 << 31)) ? 'N' : 'n',\n                  (fregs->spsr & (1 << 30)) ? 'Z' : 'z',\n                  (fregs->spsr & (1 << 29)) ? 'C' : 'c',\n                  (fregs->spsr & (1 << 28)) ? 'V' : 'v',\n                  (fregs->spsr & (1 << 27)) ? 'Q' : 'q');\n  len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \", XC=%c%c%c%c%c\",\n                  (fregs->spsr & (1 << 9)) ? 'E' : 'e',\n                  (fregs->spsr & (1 << 8)) ? 'A' : 'a',\n                  (fregs->spsr & (1 << 7)) ? 'I' : 'i',\n                  (fregs->spsr & (1 << 6)) ? 'F' : 'f',\n                  (fregs->spsr & (1 << 5)) ? 'T' : 't');\n  val = fregs->spsr & 0x1F;\n  if (val == 0x10) {\n    desc = \"USR\";\n  } else if (val == 0x11) {\n    desc = \"FIQ\";\n  } else if (val == 0x12) {\n    desc = \"IRQ\";\n  } else if (val == 0x13) {\n    desc = \"SVC\";\n  } else if (val == 0x16) {\n    desc = \"MON\";\n  } else if (val == 0x17) {\n    desc = \"ABT\";\n  } else if (val == 0x1A) {\n    desc = \"HYP\";\n  } else if (val == 0x1B) {\n    desc = \"UND\";\n  } else if (val == 0x1F) {\n    desc = \"SYS\";\n  } else {\n    desc = \"UNKNOWN\";\n  }\n  len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \", MODE=%02X (%s)\",\n                  (unsigned)val, desc);\n  hal_trace_output((unsigned char *)crash_buf, len);\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n\n  hal_trace_flush_buffer();\n\n  if (id == EXCEPTION_UNDEF) {\n  } else if (id == EXCEPTION_SVC) {\n  } else if (id == EXCEPTION_PABT) {\n  } else if (id == EXCEPTION_DABT) {\n  } else {\n  }\n}\n#else\nstatic void hal_trace_print_fault_info_cm(const struct EXCEPTION_INFO_T *info) {\n  const uint32_t *regs;\n  int len;\n  uint32_t val;\n  uint32_t primask;\n\n  regs = info->REGS;\n  primask = regs[17];\n\n  len = snprintf(crash_buf, sizeof(crash_buf), \"PC =%08X\", (unsigned)regs[15]);\n  val = __get_IPSR();\n  if (val == 0) {\n    len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                    \", ThreadMode\" NEW_LINE_STR);\n  } else {\n    len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                    \", ExceptionNumber=%d\" NEW_LINE_STR, (int)val - 16);\n  }\n  hal_trace_output((unsigned char *)crash_buf, len);\n\n  hal_trace_print_common_registers(regs);\n  hal_trace_print_special_stack_registers();\n\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n\n  len = snprintf(\n      crash_buf, sizeof(crash_buf),\n      \"PRIMASK=%02X, FAULTMASK=%02X, BASEPRI=%02X, CONTROL=%02X\" NEW_LINE_STR,\n      (unsigned)primask, (unsigned)__get_FAULTMASK(), (unsigned)__get_BASEPRI(),\n      (unsigned)__get_CONTROL());\n  hal_trace_output((unsigned char *)crash_buf, len);\n  len = snprintf(crash_buf, sizeof(crash_buf), \"XPSR=%08X\", (unsigned)regs[16]);\n  len += snprintf(\n      &crash_buf[len], sizeof(crash_buf) - len, \", APSR=%c%c%c%c%c\",\n      (regs[16] & (1 << 31)) ? 'N' : 'n', (regs[16] & (1 << 30)) ? 'Z' : 'z',\n      (regs[16] & (1 << 29)) ? 'C' : 'c', (regs[16] & (1 << 28)) ? 'V' : 'v',\n      (regs[16] & (1 << 27)) ? 'Q' : 'q');\n  val = regs[16] & 0xFF;\n  len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                  \", EPSR=%08X, IPSR=%02X\", (unsigned)(regs[16] & 0x0700FC00),\n                  (unsigned)val);\n  if (val == 0) {\n    len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (NoException)\");\n  }\n  hal_trace_output((unsigned char *)crash_buf, len);\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n\n  hal_trace_flush_buffer();\n\n  len = snprintf(crash_buf, sizeof(crash_buf),\n                 \"ICSR =%08X, AIRCR=%08X, SCR  =%08X, CCR  =%08X\" NEW_LINE_STR,\n                 (unsigned)info->ICSR, (unsigned)info->AIRCR,\n                 (unsigned)info->SCR, (unsigned)info->CCR);\n  hal_trace_output((unsigned char *)crash_buf, len);\n\n  len = snprintf(crash_buf, sizeof(crash_buf),\n                 \"SHCSR=%08X, CFSR =%08X, HFSR =%08X, AFSR =%08X\" NEW_LINE_STR,\n                 (unsigned)info->SHCSR, (unsigned)info->CFSR,\n                 (unsigned)info->HFSR, (unsigned)info->AFSR);\n  hal_trace_output((unsigned char *)crash_buf, len);\n\n  len = snprintf(crash_buf, sizeof(crash_buf),\n                 \"MMFAR=%08X, BFAR =%08X\" NEW_LINE_STR, (unsigned)info->MMFAR,\n                 (unsigned)info->BFAR);\n  hal_trace_output((unsigned char *)crash_buf, len);\n\n  if (info->HFSR & (1 << 30)) {\n    len = snprintf(crash_buf, sizeof(crash_buf),\n                   \"(Escalation HardFault)\" NEW_LINE_STR);\n    hal_trace_output((unsigned char *)crash_buf, len);\n  }\n\n  len = snprintf(crash_buf, sizeof(crash_buf), \"FaultInfo :\");\n  if ((info->SHCSR & 0x3F) == 0) {\n    len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (None)\");\n  } else {\n    if (info->SHCSR & (1 << 0)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (MemFault)\");\n    }\n    if (info->SHCSR & (1 << 1)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (BusFault)\");\n    }\n#ifdef __ARM_ARCH_8M_MAIN__\n    if (info->SHCSR & (1 << 2)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (HardFault)\");\n    }\n#endif\n    if (info->SHCSR & (1 << 3)) {\n      len +=\n          snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (UsageFault)\");\n    }\n#ifdef __ARM_ARCH_8M_MAIN__\n    if (info->SHCSR & (1 << 4)) {\n      len +=\n          snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (SecureFault)\");\n    }\n    if (info->SHCSR & (1 << 5)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (NMI)\");\n    }\n#endif\n  }\n  hal_trace_output((unsigned char *)crash_buf, len);\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n\n  len = snprintf(crash_buf, sizeof(crash_buf), \"FaultCause:\");\n  if (info->CFSR == 0) {\n    len += snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (None)\");\n  } else {\n    if (info->CFSR & (1 << 0)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Instruction access violation)\");\n    }\n    if (info->CFSR & (1 << 1)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Data access violation)\");\n    }\n    if (info->CFSR & (1 << 3)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (MemFault on unstacking for a return from exception)\");\n    }\n    if (info->CFSR & (1 << 4)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (MemFault on stacking for exception entry)\");\n    }\n    if (info->CFSR & (1 << 5)) {\n      len +=\n          snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                   \" (MemFault during floating-point lazy state preservation)\");\n    }\n    if (info->CFSR & (1 << 7)) {\n      len +=\n          snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (MMFAR valid)\");\n    }\n    if (len) {\n      hal_trace_output((unsigned char *)crash_buf, len);\n      hal_trace_flush_buffer();\n      len = 0;\n    }\n    if (info->CFSR & (1 << 8)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Instruction bus error)\");\n    }\n    if (info->CFSR & (1 << 9)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Precise data bus error)\");\n    }\n#ifndef __ARM_ARCH_8M_MAIN__\n    if (info->CFSR & (1 << 10)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Imprecise data bus error)\");\n    }\n#endif\n    if (info->CFSR & (1 << 11)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (BusFault on unstacking for a return from exception)\");\n    }\n    if (info->CFSR & (1 << 12)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (BusFault on stacking for exception entry)\");\n    }\n    if (info->CFSR & (1 << 13)) {\n      len +=\n          snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                   \" (BusFault during floating-point lazy state preservation)\");\n    }\n    if (info->CFSR & (1 << 15)) {\n      len +=\n          snprintf(&crash_buf[len], sizeof(crash_buf) - len, \" (BFAR valid)\");\n    }\n    if (len) {\n      hal_trace_output((unsigned char *)crash_buf, len);\n      hal_trace_flush_buffer();\n      len = 0;\n    }\n    if (info->CFSR & (1 << 16)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Undefined instruction UsageFault)\");\n    }\n    if (info->CFSR & (1 << 17)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Invalid state UsageFault)\");\n    }\n    if (info->CFSR & (1 << 18)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Invalid PC load by EXC_RETURN UsageFault)\");\n    }\n    if (info->CFSR & (1 << 19)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (No coprocessor UsageFault)\");\n    }\n#ifdef __ARM_ARCH_8M_MAIN__\n    if (info->CFSR & (1 << 20)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Stack overflow UsageFault)\");\n    }\n#endif\n    if (info->CFSR & (1 << 24)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Unaligned access UsageFault)\");\n    }\n    if (info->CFSR & (1 << 25)) {\n      len += snprintf(&crash_buf[len], sizeof(crash_buf) - len,\n                      \" (Divide by zero UsageFault)\");\n    }\n  }\n  hal_trace_output((unsigned char *)crash_buf, len);\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n}\n#endif\n\nstatic void hal_trace_print_fault_info(const struct EXCEPTION_INFO_T *info) {\n#ifdef __ARM_ARCH_ISA_ARM\n  hal_trace_print_fault_info_ca(info);\n#else\n  hal_trace_print_fault_info_cm(info);\n#endif\n}\n#endif // DEBUG || REL_TRACE_ENABLE\n\nvoid hal_trace_fault_dump(const uint32_t *regs, const uint32_t *extra,\n                          uint32_t extra_len) {\n  struct EXCEPTION_INFO_T info;\n\n  int_lock_global();\n\n  hal_trace_fill_exception_info(&info, regs, extra, extra_len);\n\n  *(volatile uint32_t *)RAM_BASE = (uint32_t)&info;\n\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n\n  static const char title[] = NEW_LINE_STR \"### EXCEPTION ###\" NEW_LINE_STR;\n  int len;\n\n#ifdef CRASH_DUMP_ENABLE\n  bool full_dump = true;\n\n#ifdef CP_TRACE_ENABLE\n  if (get_cpu_id()) {\n    full_dump = false;\n    if (cp_notify_cb) {\n      cp_notify_cb(HAL_TRACE_STATE_CRASH_FAULT_START);\n    }\n  }\n#endif\n\n  if (full_dump) {\n#ifdef TRACE_TO_APP\n    if (app_notify_cb) {\n      app_notify_cb(HAL_TRACE_STATE_CRASH_FAULT_START);\n    }\n    if (app_crash_custom_cb == NULL) {\n      app_output_enabled = true;\n    }\n#endif\n\n    crash_dump_onprocess = true;\n    for (uint8_t i = 0; i < 10; i++) {\n      REL_TRACE_IMM(0, \"                                                       \"\n                       \"                 \");\n      REL_TRACE_IMM(0, \"                                                       \"\n                       \"                 \" NEW_LINE_STR);\n      hal_sys_timer_delay(MS_TO_TICKS(50));\n    }\n  }\n#endif\n\n  hal_trace_flush_buffer();\n\n  hal_sysfreq_req(HAL_SYSFREQ_USER_INIT, HAL_CMU_FREQ_52M);\n\n  len = hal_trace_print_time(LOG_LEVEL_CRITICAL, LOG_MODULE_NONE, &crash_buf[0],\n                             sizeof(crash_buf));\n  if (len > 0) {\n    hal_trace_output((const unsigned char *)newline, sizeof(newline));\n    hal_trace_output((unsigned char *)crash_buf, len);\n  }\n  hal_trace_output((unsigned char *)title, sizeof(title));\n\n  hal_trace_print_fault_info(&info);\n\n  hal_trace_flush_buffer();\n\n  hal_trace_print_stack(regs[13]);\n\n  hal_trace_print_backtrace(regs[13], TRACE_BACKTRACE_SEARCH_WORD,\n                            TRACE_BACKTRACE_NUM);\n\n  hal_trace_output((const unsigned char *)newline, sizeof(newline));\n\n  hal_trace_flush_buffer();\n\n#ifdef CRASH_DUMP_ENABLE\n  if (full_dump) {\n    hal_trace_crash_dump_callback();\n    hal_trace_flush_buffer();\n\n#ifndef __ARM_ARCH_ISA_ARM\n#ifdef TRACE_TO_APP\n    // Crash-Dump \"Lite-Version\"\n    if (app_crash_custom_cb) {\n      app_crash_custom_cb((unsigned char *)regs,\n                          CRASH_DUMP_REGISTERS_NUM_BYTES);\n      stack = (uint32_t *)(__get_MSP() & ~3);\n      app_crash_custom_cb((unsigned char *)stack,\n                          ((CRASH_DUMP_STACK_NUM_BYTES) / 2));\n      stack = (uint32_t *)(__get_PSP() & ~3);\n      app_crash_custom_cb((unsigned char *)stack,\n                          ((CRASH_DUMP_STACK_NUM_BYTES) / 2));\n    }\n#endif\n\n#ifdef CORE_DUMP\n    {\n      static CrashCatcherExceptionRegisters eregs;\n\n      eregs.msp = info.MSP;\n      eregs.psp = info.PSP;\n      eregs.exceptionPSR = regs[16] & 0x0700FE00;\n      eregs.r4 = regs[4];\n      eregs.r5 = regs[5];\n      eregs.r6 = regs[6];\n      eregs.r7 = regs[7];\n      eregs.r8 = regs[8];\n      eregs.r9 = regs[9];\n      eregs.r10 = regs[10];\n      eregs.r11 = regs[11];\n      eregs.exceptionLR = regs[14];\n      CrashCatcher_Entry(&eregs);\n    }\n#endif\n#endif // !__ARM_ARCH_ISA_ARM\n\n#ifdef TRACE_TO_APP\n    if (app_notify_cb) {\n      app_notify_cb(HAL_TRACE_STATE_CRASH_END);\n    }\n#endif\n  }\n\n#ifdef CP_TRACE_ENABLE\n  if (get_cpu_id()) {\n    if (cp_notify_cb) {\n      cp_notify_cb(HAL_TRACE_STATE_CRASH_END);\n    }\n    SAFE_PROGRAM_STOP();\n  }\n#endif\n#endif // CRASH_DUMP_ENABLE\n\n#endif // DEBUG || REL_TRACE_ENABLE\n\n  hal_trace_crash_end();\n}\n\n#ifndef __ARM_ARCH_ISA_ARM\nstatic void NAKED hal_trace_fault_handler(void) {\n  // TODO: Save FP registers (and check lazy Floating-point context\n  // preservation)\n  asm volatile(\n      // Check EXC_RETURN.SPSEL (bit[2])\n      \"tst lr, #0x04;\"\n      \"ite eq;\"\n      // Using MSP\n      \"mrseq r3, msp;\"\n      // Using PSP\n      \"mrsne r3, psp;\"\n      // Check EXC_RETURN.FType (bit[4])\n      \"tst lr, #0x10;\"\n      \"ite eq;\"\n      // FPU context saved\n      \"moveq r1, #1;\"\n      // No FPU context\n      \"movne r1, #0;\"\n#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n      \"mov, r0, #0;\"\n      // -- Check EXC_RETURN.S (bit[6])\n      \"tst lr, #0x40;\"\n      \"beq _done_sec_cntx;\"\n      // -- Check EXC_RETURN.ES (bit[0])\n      \"tst lr, #0x01;\"\n      \"bne _done_sec_cntx;\"\n      // -- Check EXC_RETURN.DCRS (bit[5])\n      \"tst lr, #0x20;\"\n      \"bne _done_sec_cntx;\"\n      \"mov, r0, #1;\"\n      \"push {r4-r11};\"\n      \"add r3, #2*4;\"\n      \"ldm r3!, {r4-r11};\"\n      \"_done_sec_cntx:;\"\n      \"push {r0};\"\n#endif\n      // Make room for r0-r15,psr,primask\n      \"sub sp, #18*4;\"\n      \".cfi_def_cfa_offset 18*4;\"\n      // Save r4-r11\n      \"add r0, sp, #4*4;\"\n      \"stm r0, {r4-r11};\"\n      \".cfi_offset r4, -14*4;\"\n      \".cfi_offset r5, -13*4;\"\n      \".cfi_offset r6, -12*4;\"\n      \".cfi_offset r7, -11*4;\"\n      \".cfi_offset r8, -10*4;\"\n      \".cfi_offset r9, -9*4;\"\n      \".cfi_offset r10, -8*4;\"\n      \".cfi_offset r11, -7*4;\"\n      // Save r0-r3\n      \"ldm r3, {r4-r7};\"\n      \"stm sp, {r4-r7};\"\n      \".cfi_offset r0, -18*4;\"\n      \".cfi_offset r1, -17*4;\"\n      \".cfi_offset r2, -16*4;\"\n      \".cfi_offset r3, -15*4;\"\n      // Save r12\n      \"ldr r0, [r3, #4*4];\"\n      \"str r0, [sp, #12*4];\"\n      \".cfi_offset r12, -6*4;\"\n      // Save sp\n      \"teq r1, 0;\"\n      \"itt eq;\"\n      \"addeq r0, r3, #8*4;\"\n      \"beq _done_stack_frame;\"\n      \"add r0, r3, #(8+18)*4;\"\n#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n      // -- Check EXC_RETURN.S (bit[6])\n      \"tst lr, #0x40;\"\n      \"beq _done_stack_frame;\"\n      // -- Check FPCCR_S.TS (bit[26])\n      \"ldr r4, =0xE000EF34;\"\n      \"ldr r4, [r4];\"\n      \"tst r4, #(1 << 26);\"\n      \"it ne;\"\n      \"addne r3, #16*4;\"\n#endif\n      \"_done_stack_frame:;\"\n      // -- Check RETPSR.SPREALIGN (bit[9])\n      \"ldr r4, [r3, #7*4];\"\n      \"tst r4, #(1 << 9);\"\n      \"it ne;\"\n      \"addne r0, #4;\"\n      \"str r0, [sp, #13*4];\"\n      // Save lr\n      \"ldr r0, [r3, #5*4];\"\n      \"str r0, [sp, #14*4];\"\n      // Save pc\n      \"ldr r0, [r3, #6*4];\"\n      \"str r0, [sp, #15*4];\"\n      // Save PSR\n      \"ldr r0, [r3, #7*4];\"\n      \"str r0, [sp, #16*4];\"\n      // Save primask\n      \"mrs r0, primask;\"\n      \"str r0, [sp, #17*4];\"\n      // Save current exception lr\n      \"mov r4, lr;\"\n      \".cfi_register lr, r4;\"\n      // Invoke the fault handler\n      \"mov r0, sp;\"\n      \"ldr r2, =hal_trace_fault_dump;\"\n      \"blx r2;\"\n      // Restore current exception lr\n      \"mov lr, r4;\"\n      // Restore r4-r7\n      \"add r0, sp, #4*4;\"\n      \"ldm r0, {r4-r7};\"\n      \"mov r0, r3;\"\n      // Restore sp\n      \"add sp, #18*4;\"\n#if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)\n      \"pop {r0};\"\n      \"cmp r0, #1;\"\n      \"it eq;\"\n      \"popeq {r4-r11};\"\n#endif\n      \"bx lr;\"\n      \"\");\n}\n#endif\n#endif\n\n#define HAL_TRACE_RX_HEAD_SIZE 4\n#define HAL_TRACE_RX_NAME_SIZE 20\n#define HAL_TRACE_RX_BUF_SIZE 1024\n#define HAL_TRACE_RX_ROLE_NUM 6\n\n#define HAL_TRACE_RX_HEAD '['\n#define HAL_TRACE_RX_END ']'\n#define HAL_TRACE_RX_SEPARATOR ','\n\n// static struct HAL_DMA_CH_CFG_T dma_cfg_rx;\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\nstatic struct HAL_DMA_DESC_T dma_desc_rx;\n#endif\n\ntypedef struct {\n  char *name;\n  uint32_t len;\n  uint8_t *buf;\n} HAL_TRACE_RX_CFG_T;\n\ntypedef struct {\n  char name[HAL_TRACE_RX_NAME_SIZE];\n  HAL_TRACE_RX_CALLBACK_T callback;\n} HAL_TRACE_RX_LIST_T;\n\ntypedef struct {\n  uint32_t list_num;\n  HAL_TRACE_RX_LIST_T list[HAL_TRACE_RX_ROLE_NUM];\n\n  uint32_t rx_enable;\n  uint32_t pos;\n  uint8_t buf[HAL_TRACE_RX_BUF_SIZE];\n} HAL_TRACE_RX_T;\n\n#if defined(_AUTO_TEST_)\nextern int auto_test_prase(uint8_t *cmd);\n#endif\n\nHAL_TRACE_RX_T hal_trace_rx;\n\nint hal_trace_rx_dump_list(void) {\n  for (int i = 0; i < HAL_TRACE_RX_ROLE_NUM; i++) {\n    TRACE(2, \"%d: %s\", i, hal_trace_rx.list[i].name);\n  }\n  return 0;\n}\n\nint hal_trace_rx_is_in_list(const char *name) {\n  for (int i = 0; i < HAL_TRACE_RX_ROLE_NUM; i++) {\n    if (!strcmp(hal_trace_rx.list[i].name, name)) {\n      return i;\n    }\n  }\n  hal_trace_rx_dump_list();\n  // TRACE(1,\"%s\", hal_trace_rx.list[0].name);\n  // TRACE(1,\"%s\", name);\n  // TRACE(1,\"%d\", strlen(hal_trace_rx.list[0].name));\n  // TRACE(1,\"%d\", strlen(name));\n  // TRACE(1,\"%d\", strcmp(hal_trace_rx.list[0].name, name));\n  return -1;\n}\n\nint hal_trace_rx_add_item_to_list(const char *name,\n                                  HAL_TRACE_RX_CALLBACK_T callback) {\n  for (int i = 0; i < HAL_TRACE_RX_ROLE_NUM; i++) {\n    if (hal_trace_rx.list[i].name[0] == 0) {\n      memcpy(hal_trace_rx.list[i].name, name, strlen(name));\n      hal_trace_rx.list[i].callback = callback;\n      hal_trace_rx.list_num++;\n      return 0;\n    }\n  }\n\n  return 1;\n}\n\nint hal_trace_rx_del_item_to_list(int id) {\n  memset(hal_trace_rx.list[id].name, 0, sizeof(hal_trace_rx.list[id].name));\n  hal_trace_rx.list[id].callback = NULL;\n  hal_trace_rx.list_num--;\n\n  return 0;\n}\n\nint hal_trace_rx_register(const char *name, HAL_TRACE_RX_CALLBACK_T callback) {\n  TRACE(2, \"[%s] Add %s\", __func__, name);\n  if (hal_trace_rx_is_in_list(name) == -1) {\n    hal_trace_rx_add_item_to_list(name, callback);\n    return 0;\n  } else {\n    return 0;\n  }\n}\n\nint hal_trace_rx_deregister(const char *name) {\n  int id = 0;\n\n  id = hal_trace_rx_is_in_list(name);\n\n  if (id != -1) {\n    hal_trace_rx_del_item_to_list(id);\n    return 0;\n  } else {\n    return 1;\n  }\n}\n\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\nstatic int hal_trace_rx_reset(void) {\n\n  hal_trace_rx.pos = 0;\n  memset(hal_trace_rx.buf, 0, HAL_TRACE_RX_BUF_SIZE);\n\n  return 0;\n}\n#endif\n// [test,12,102.99]\nstatic int hal_trace_rx_parse(int8_t *buf, HAL_TRACE_RX_CFG_T *cfg) {\n  // TRACE(1,\"[%s] Start...\", __func__);\n  int pos = 0;\n  int len = 0;\n\n  for (; pos < HAL_TRACE_RX_HEAD_SIZE; pos++) {\n    if (buf[pos] == HAL_TRACE_RX_HEAD) {\n      buf[pos] = 0;\n      break;\n    }\n  }\n\n  if (pos == HAL_TRACE_RX_HEAD_SIZE) {\n    return 3;\n  }\n\n  pos++;\n\n  cfg->name = (char *)(buf + pos);\n  for (; pos < HAL_TRACE_RX_NAME_SIZE + HAL_TRACE_RX_HEAD_SIZE; pos++) {\n    if (buf[pos] == HAL_TRACE_RX_SEPARATOR) {\n      buf[pos] = 0;\n      break;\n    }\n  }\n\n  // TRACE(1,\"Step1: %s\", cfg->name);\n  // TRACE(1,\"%d\", strlen(cfg->name));\n\n  if (pos == HAL_TRACE_RX_NAME_SIZE) {\n    return 1;\n  }\n\n  pos++;\n\n  len = 0;\n  cfg->buf = (uint8_t *)(buf + pos);\n  for (; pos < HAL_TRACE_RX_BUF_SIZE; pos++) {\n    if (buf[pos] == HAL_TRACE_RX_END) {\n      buf[pos] = 0;\n      break;\n    }\n    len++;\n  }\n  cfg->len = len;\n  if (pos == HAL_TRACE_RX_BUF_SIZE) {\n    return 2;\n  }\n\n  return 0;\n}\n\n#if defined(IBRT)\nvoid app_ibrt_peripheral_automate_test(const char *ibrt_cmd, uint32_t cmd_len);\nvoid app_ibrt_peripheral_perform_test(const char *ibrt_cmd);\n#endif\n\nint hal_trace_rx_process(uint8_t *buf, uint32_t len) {\n  HAL_TRACE_RX_CFG_T cfg;\n  int id = 0;\n  int res = 0;\n\n#if defined(IBRT)\n  if (buf && strlen((char *)buf) >= 10 &&\n      ((strncmp((char *)buf, \"auto_test:\", 10) == 0) ||\n       (strncmp((char *)buf, \"ibrt_test:\", 10) == 0))) {\n#ifdef BES_AUTOMATE_TEST\n    app_ibrt_peripheral_automate_test((char *)(buf + 10), len - 10);\n#else\n    app_ibrt_peripheral_perform_test((char *)(buf + 10));\n#endif\n    return 0;\n  }\n#endif\n\n  res = hal_trace_rx_parse((int8_t *)buf, &cfg);\n\n  if (res) {\n    TRACE(1, \"ERROR: hal_trace_rx_parse %d\", res);\n    return 1;\n  } else {\n    // TRACE(1,\"%s rx OK\", cfg.name);\n  }\n\n  id = hal_trace_rx_is_in_list(cfg.name);\n\n  if (id == -1) {\n    TRACE(1, \"%s is invalid\", cfg.name);\n    return -1;\n  }\n\n  if (hal_trace_rx.list[id].callback) {\n    hal_trace_rx.list[id].callback(cfg.buf, cfg.len);\n  } else {\n    TRACE(1, \"%s has not callback\", hal_trace_rx.list[id].name);\n  }\n\n  return 0;\n}\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\nvoid hal_trace_rx_start(void) {\n  uint32_t desc_cnt = 1;\n  union HAL_UART_IRQ_T mask;\n\n  mask.reg = 0;\n  mask.BE = 0;\n  mask.FE = 0;\n  mask.OE = 0;\n  mask.PE = 0;\n  mask.RT = 1;\n\n  hal_uart_dma_recv_mask(trace_uart, hal_trace_rx.buf, HAL_TRACE_RX_BUF_SIZE,\n                         &dma_desc_rx, &desc_cnt, &mask);\n}\n\nvoid hal_trace_rx_irq_handler(uint32_t xfer_size, int dma_error,\n                              union HAL_UART_IRQ_T status) {\n  int res;\n  // TRACE(4,\"[%s] %d, %d, %d\", __func__, xfer_size, dma_error, status);\n\n  if (xfer_size) {\n    hal_trace_rx.buf[xfer_size] = 0;\n#if defined(_AUTO_TEST_)\n    res = auto_test_prase(hal_trace_rx.buf);\n    if (res) {\n      TRACE(2, \"%s:auto_test_prase prase data error, err_code = %d\", __func__,\n            res);\n    }\n#else\n    // TRACE(2,\"[%s] RX = %s\", __func__, hal_trace_rx.buf);\n    res = hal_trace_rx_process(hal_trace_rx.buf, xfer_size);\n    if (res) {\n      TRACE(2, \"%s:hal_trace_rx_process prase data error, err_code = %d\",\n            __func__, res);\n    }\n#endif\n    hal_trace_rx_reset();\n    hal_trace_rx_start();\n  }\n}\n\nuint32_t app_test_callback(unsigned char *buf, uint32_t len) {\n  TRACE(2, \"[%s] len = %d\", __func__, len);\n\n  // Process string\n  int num_int = 0;\n  int num_float = 0.0;\n  TRACE(2, \"[%s] %s\", __func__, buf);\n  hal_trace_rx_parser((char *)buf, \"%d,%d\", &num_int, &num_float);\n\n  TRACE(3, \"[%s] %d:%d\", __func__, num_int, num_float);\n\n  return 0;\n}\n\nint hal_trace_rx_open() {\n  hal_uart_irq_set_dma_handler(trace_uart, hal_trace_rx_irq_handler, NULL);\n  hal_trace_rx_start();\n\n  hal_trace_rx_register(\"test\", (HAL_TRACE_RX_CALLBACK_T)app_test_callback);\n\n  return 0;\n}\n\nint hal_trace_rx_reopen() {\n  hal_uart_reopen(trace_uart, &uart_rx_enable_cfg);\n  hal_trace_rx_open();\n\n  return 0;\n}\n#endif\n"
  },
  {
    "path": "platform/hal/hal_trace.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_TRACE_H__\n#define __HAL_TRACE_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_trace_mod.h\"\n\n#if 0\n#define AUDIO_DEBUG\n#define AUDIO_DEBUG_V0_1_0\n#define INTERSYS_RAW_DATA_ONLY\n#ifdef AUDIO_DEBUG\n#undef TRACE_BAUD_RATE\n#define TRACE_BAUD_RATE 2000000\n#endif\n#endif\n\n#if (defined(AUDIO_DEBUG) && !defined(AUDIO_DEBUG_V0_1_0))\n#define NO_REL_TRACE\n#endif\n#if (defined(AUDIO_DEBUG) && !defined(AUDIO_DEBUG_V0_1_0)) ||                  \\\n    defined(INTERSYS_RAW_DATA_ONLY)\n#define NO_TRACE\n#endif\n\n#if defined(__BT_DEBUG_TPORTS__) || defined(AUDIO_DEBUG_V0_1_0)\n#ifndef TPORTS_KEY_COEXIST\n#ifndef HAL_TRACE_RX_ENABLE\n#define HAL_TRACE_RX_ENABLE\n#endif\n#ifndef CRASH_REBOOT\n#define CRASH_REBOOT\n#endif\n#endif\n#endif\n\n/*\n * Total number of core registers stored\n */\n#define CRASH_DUMP_REGISTERS_NUM 17\n#define CRASH_DUMP_REGISTERS_NUM_BYTES ((CRASH_DUMP_REGISTERS_NUM)*4)\n\n/*\n * Number bytes to store from stack\n *   - this is total, not per PSP/MSP\n */\n#define CRASH_DUMP_STACK_NUM_BYTES 384\n\n// Log Attributes\n#define LOG_ATTR_ARG_NUM_SHIFT 0\n#define LOG_ATTR_ARG_NUM_MASK (0xF << LOG_ATTR_ARG_NUM_SHIFT)\n#define LOG_ATTR_ARG_NUM(n) BITFIELD_VAL(LOG_ATTR_ARG_NUM, n)\n#define LOG_ATTR_LEVEL_SHIFT 4\n#define LOG_ATTR_LEVEL_MASK (0x7 << LOG_ATTR_LEVEL_SHIFT)\n#define LOG_ATTR_LEVEL(n) BITFIELD_VAL(LOG_ATTR_LEVEL, n)\n#define LOG_ATTR_MOD_SHIFT 7\n#define LOG_ATTR_MOD_MASK (0x7F << LOG_ATTR_MOD_SHIFT)\n#define LOG_ATTR_MOD(n) BITFIELD_VAL(LOG_ATTR_MOD, n)\n#define LOG_ATTR_IMM (1 << 14)\n#define LOG_ATTR_NO_LF (1 << 15)\n#define LOG_ATTR_NO_TS (1 << 16)\n#define LOG_ATTR_NO_ID (1 << 17)\n\n// Count variadic argument number\n#define _VAR_ARG_12(a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, a11, a12, ...) a12\n#define COUNT_ARG_NUM(...)                                                     \\\n  _VAR_ARG_12(unused, ##__VA_ARGS__, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)\n\n#if defined(TRACE_STR_SECTION) && !(defined(ROM_BUILD) || defined(PROGRAMMER))\n#define CONCAT_(x, y) x##y\n#define CONCATS(x, y) CONCAT_(x, y)\n#define __trcname CONCATS(__trc, __LINE__)\n#define TRC_STR_LOC                                                            \\\n  __attribute__((section(TO_STRING(CONCATS(.trc_str, __LINE__)))))\n#define TRC_STR(s)                                                             \\\n  (({                                                                          \\\n    static const char TRC_STR_LOC __trcname[] = (s);                           \\\n    __trcname;                                                                 \\\n  }))\n#else\n#define TRC_STR_LOC\n#define TRC_STR(s) (s)\n#endif\n\n#define LOG_DUMMY(attr, str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE)) && !defined(NO_REL_TRACE)\n#define REL_LOG(attr, str, ...)                                                \\\n  hal_trace_printf(((attr) & ~LOG_ATTR_ARG_NUM_MASK) |                         \\\n                       LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), \\\n                   TRC_STR(str), ##__VA_ARGS__)\n#define REL_LOG_RAW_OUTPUT(str, len) hal_trace_output(str, len)\n#define REL_LOG_FLUSH() hal_trace_flush_buffer()\n#define REL_DUMP8(str, buf, cnt) hal_trace_dump(str, sizeof(uint8_t), cnt, buf)\n#define REL_DUMP16(str, buf, cnt)                                              \\\n  hal_trace_dump(str, sizeof(uint16_t), cnt, buf)\n#define REL_DUMP32(str, buf, cnt)                                              \\\n  hal_trace_dump(str, sizeof(uint32_t), cnt, buf)\n#else\n#define REL_LOG(attr, str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n#define REL_LOG_RAW_OUTPUT(str, len) hal_trace_dummy((const char *)str, len)\n#define REL_LOG_FLUSH() hal_trace_dummy(NULL)\n#define REL_DUMP8(str, buf, cnt) hal_dump_dummy(str, buf, cnt)\n#define REL_DUMP16(str, buf, cnt) hal_dump_dummy(str, buf, cnt)\n#define REL_DUMP32(str, buf, cnt) hal_dump_dummy(str, buf, cnt)\n#endif\n\n#if (!defined(DEBUG) && defined(REL_TRACE_ENABLE)) && !defined(NO_TRACE)\n// To avoid warnings on unused variables\n#define NORM_LOG(num, str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n#define NORM_LOG_RAW_OUTPUT(str, len) hal_trace_dummy((const char *)str, len)\n#define NORM_LOG_FLUSH() hal_trace_dummy(NULL)\n#define DUMP8(str, buf, cnt) hal_dump_dummy(str, buf, cnt)\n#define DUMP16(str, buf, cnt) hal_dump_dummy(str, buf, cnt)\n#define DUMP32(str, buf, cnt) hal_dump_dummy(str, buf, cnt)\n#else\n#define NORM_LOG REL_LOG\n#define NORM_LOG_RAW_OUTPUT REL_LOG_RAW_OUTPUT\n#define NORM_LOG_FLUSH REL_TRACE_FLUSH\n#define DUMP8 REL_DUMP8\n#define DUMP16 REL_DUMP16\n#define DUMP32 REL_DUMP32\n#endif\n\n#define RLOG_CRITICAL(attr, str, ...)                                          \\\n  REL_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) |                                    \\\n              LOG_ATTR_LEVEL(LOG_LEVEL_CRITICAL),                              \\\n          str, ##__VA_ARGS__)\n#define RLOG_ERROR(attr, str, ...)                                             \\\n  REL_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_ERROR),   \\\n          str, ##__VA_ARGS__)\n#define RLOG_WARN(attr, str, ...)                                              \\\n  REL_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_WARN),    \\\n          str, ##__VA_ARGS__)\n#define RLOG_NOTIF(attr, str, ...)                                             \\\n  REL_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_NOTIF),   \\\n          str, ##__VA_ARGS__)\n#define RLOG_INFO(attr, str, ...)                                              \\\n  REL_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_INFO),    \\\n          str, ##__VA_ARGS__)\n#define RLOG_DEBUG(attr, str, ...)                                             \\\n  REL_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_DEBUG),   \\\n          str, ##__VA_ARGS__)\n#define RLOG_VERBOSE(attr, str, ...)                                           \\\n  REL_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_VERBOSE), \\\n          str, ##__VA_ARGS__)\n\n#define LOG_CRITICAL(attr, str, ...)                                           \\\n  NORM_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) |                                   \\\n               LOG_ATTR_LEVEL(LOG_LEVEL_CRITICAL),                             \\\n           str, ##__VA_ARGS__)\n#define LOG_ERROR(attr, str, ...)                                              \\\n  NORM_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_ERROR),  \\\n           str, ##__VA_ARGS__)\n#define LOG_WARN(attr, str, ...)                                               \\\n  NORM_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_WARN),   \\\n           str, ##__VA_ARGS__)\n#define LOG_NOTIF(attr, str, ...)                                              \\\n  NORM_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_NOTIF),  \\\n           str, ##__VA_ARGS__)\n#define LOG_INFO(attr, str, ...)                                               \\\n  NORM_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_INFO),   \\\n           str, ##__VA_ARGS__)\n#define LOG_DEBUG(attr, str, ...)                                              \\\n  NORM_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) | LOG_ATTR_LEVEL(LOG_LEVEL_DEBUG),  \\\n           str, ##__VA_ARGS__)\n#define LOG_VERBOSE(attr, str, ...)                                            \\\n  NORM_LOG(((attr) & ~LOG_ATTR_LEVEL_MASK) |                                   \\\n               LOG_ATTR_LEVEL(LOG_LEVEL_VERBOSE),                              \\\n           str, ##__VA_ARGS__)\n\n#define REL_TRACE(attr, str, ...) RLOG_NOTIF(attr, str, ##__VA_ARGS__)\n#define REL_TRACE_IMM(attr, str, ...)                                          \\\n  RLOG_NOTIF((attr) | LOG_ATTR_IMM, str, ##__VA_ARGS__)\n#define REL_TRACE_NOCRLF(attr, str, ...)                                       \\\n  RLOG_NOTIF((attr) | LOG_ATTR_NO_LF, str, ##__VA_ARGS__)\n#define REL_TRACE_NOTS(attr, str, ...)                                         \\\n  RLOG_NOTIF((attr) | LOG_ATTR_NO_TS, str, ##__VA_ARGS__)\n#define REL_TRACE_IMM_NOTS(attr, str, ...)                                     \\\n  RLOG_NOTIF((attr) | LOG_ATTR_IMM | LOG_ATTR_NO_TS, str, ##__VA_ARGS__)\n#define REL_TRACE_NOCRLF_NOTS(attr, str, ...)                                  \\\n  RLOG_NOTIF((attr) | LOG_ATTR_NO_LF | LOG_ATTR_NO_TS, str, ##__VA_ARGS__)\n#define REL_FUNC_ENTRY_TRACE() RLOG_NOTIF(1, \"%s\", __FUNCTION__)\n#define REL_TRACE_OUTPUT(str, len) REL_LOG_RAW_OUTPUT(str, len)\n#define REL_TRACE_FLUSH() REL_LOG_FLUSH()\n\n#define TRACE(attr, str, ...) LOG_INFO(attr, str, ##__VA_ARGS__)\n#define TRACE_IMM(attr, str, ...)                                              \\\n  LOG_INFO((attr) | LOG_ATTR_IMM, str, ##__VA_ARGS__)\n#define TRACE_NOCRLF(attr, str, ...)                                           \\\n  LOG_INFO((attr) | LOG_ATTR_NO_LF, str, ##__VA_ARGS__)\n#define FUNC_ENTRY_TRACE() LOG_INFO(1, \"%s\", __FUNCTION__)\n#define TRACE_OUTPUT(str, len) NORM_LOG_RAW_OUTPUT(str, len)\n#define TRACE_FLUSH() NORM_LOG_FLUSH()\n#ifdef BES_AUTOMATE_TEST\n#define AUTO_TEST_TRACE(attr, str, ...)                                        \\\n  LOG_INFO(attr, \"_AT_\" str, ##__VA_ARGS__)\n#else\n#define AUTO_TEST_TRACE(attr, str, ...) LOG_INFO(attr, str, ##__VA_ARGS__)\n#endif\n\n#define TRACE_DUMMY(attr, str, ...) LOG_DUMMY(attr, str, ##__VA_ARGS__)\n\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE)) &&                           \\\n    defined(ASSERT_SHOW_FILE_FUNC)\n#define ASSERT(cond, str, ...)                                                 \\\n  {                                                                            \\\n    if (!(cond)) {                                                             \\\n      hal_trace_assert_dump(__FILE__, __FUNCTION__, __LINE__, str,             \\\n                            ##__VA_ARGS__);                                    \\\n    }                                                                          \\\n  }\n#define ASSERT_DUMP_ARGS                                                       \\\n  const char *file, const char *func, unsigned int line, const char *fmt, ...\n#define ASSERT_FMT_ARG_IDX 4\n#elif (defined(DEBUG) || defined(REL_TRACE_ENABLE)) && defined(ASSERT_SHOW_FILE)\n#define ASSERT(cond, str, ...)                                                 \\\n  {                                                                            \\\n    if (!(cond)) {                                                             \\\n      hal_trace_assert_dump(__FILE__, __LINE__, str, ##__VA_ARGS__);           \\\n    }                                                                          \\\n  }\n#define ASSERT_DUMP_ARGS                                                       \\\n  const char *file, const char *func, unsigned int line, const char *fmt, ...\n#define ASSERT_FMT_ARG_IDX 4\n#elif (defined(DEBUG) || defined(REL_TRACE_ENABLE)) && defined(ASSERT_SHOW_FUNC)\n#define ASSERT(cond, str, ...)                                                 \\\n  {                                                                            \\\n    if (!(cond)) {                                                             \\\n      hal_trace_assert_dump(__FUNCTION__, __LINE__, str, ##__VA_ARGS__);       \\\n    }                                                                          \\\n  }\n#define ASSERT_DUMP_ARGS                                                       \\\n  const char *scope, unsigned int line, const char *fmt, ...\n#define ASSERT_FMT_ARG_IDX 3\n#elif (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n#define ASSERT(cond, str, ...)                                                 \\\n  {                                                                            \\\n    if (!(cond)) {                                                             \\\n      hal_trace_assert_dump(str, ##__VA_ARGS__);                               \\\n    }                                                                          \\\n  }\n#define ASSERT_DUMP_ARGS const char *fmt, ...\n#define ASSERT_FMT_ARG_IDX 1\n#else\n#define ASSERT(cond, str, ...)                                                 \\\n  {                                                                            \\\n    if (!(cond)) {                                                             \\\n      hal_trace_dummy(str, ##__VA_ARGS__);                                     \\\n      hal_trace_assert_dump(NULL);                                             \\\n    }                                                                          \\\n  }\n#define ASSERT_DUMP_ARGS const char *fmt\n#define ASSERT_FMT_ARG_IDX 0\n#endif\n\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n#define TRACE_FUNC_DECLARE(d, r) d\n#else\n#ifndef TRACE_FUNC_SPEC\n#define TRACE_FUNC_SPEC static inline\n#endif\n#define TRACE_FUNC_DECLARE(d, r)                                               \\\n  TRACE_FUNC_SPEC d { r; }\n#endif\n\n#if defined(__GNUC__) && !defined(NO_CHK_TRC_FMT)\n#define TRC_FMT_CHK(sidx, vaidx)                                               \\\n  __attribute__((format(printf, (sidx), (vaidx))))\n#else\n#define TRC_FMT_CHK(sidx, vaidx)\n#endif\n\n#define ASSERT_NODUMP(cond)                                                    \\\n  {                                                                            \\\n    if (!(cond)) {                                                             \\\n      SAFE_PROGRAM_STOP();                                                     \\\n    }                                                                          \\\n  }\n\n#ifdef CHIP_BEST1000\n// Avoid CPU instruction fetch blocking the system bus on BEST1000\n#define SAFE_PROGRAM_STOP()                                                    \\\n  do {                                                                         \\\n    asm volatile(\"nop; nop; nop; nop\");                                        \\\n  } while (1)\n#else\n#define SAFE_PROGRAM_STOP()                                                    \\\n  do {                                                                         \\\n  } while (1)\n#endif\n\nenum HAL_TRACE_TRANSPORT_T {\n#ifdef CHIP_HAS_USB\n  HAL_TRACE_TRANSPORT_USB,\n#endif\n  HAL_TRACE_TRANSPORT_UART0,\n#if (CHIP_HAS_UART > 1)\n  HAL_TRACE_TRANSPORT_UART1,\n#endif\n#if (CHIP_HAS_UART > 2)\n  HAL_TRACE_TRANSPORT_UART2,\n#endif\n\n  HAL_TRACE_TRANSPORT_QTY\n};\n\nenum HAL_TRACE_STATE_T {\n  HAL_TRACE_STATE_CRASH_ASSERT_START,\n  HAL_TRACE_STATE_CRASH_FAULT_START,\n  HAL_TRACE_STATE_CRASH_END,\n};\n\nenum HAL_TRACE_BUF_STATE_T {\n  HAL_TRACE_BUF_STATE_FLUSH,\n  HAL_TRACE_BUF_STATE_NEAR_FULL,\n  HAL_TRACE_BUF_STATE_FULL,\n};\n\nenum HAL_TRACE_CRASH_DUMP_MODULE_T {\n  HAL_TRACE_CRASH_DUMP_MODULE_SYS = 0,\n  HAL_TRACE_CRASH_DUMP_MODULE_ID1 = 1,\n  HAL_TRACE_CRASH_DUMP_MODULE_ID2 = 2,\n  HAL_TRACE_CRASH_DUMP_MODULE_ID3 = 3,\n  HAL_TRACE_CRASH_DUMP_MODULE_BT = 4,\n  HAL_TRACE_CRASH_DUMP_MODULE_END = 5,\n};\n\nenum LOG_LEVEL_T {\n  LOG_LEVEL_CRITICAL = 0,\n  LOG_LEVEL_ERROR = 1,\n  LOG_LEVEL_WARN = 2,\n  LOG_LEVEL_NOTIF = 3,\n  LOG_LEVEL_INFO = 4,\n  LOG_LEVEL_DEBUG = 5,\n  LOG_LEVEL_VERBOSE = 6,\n\n  LOG_LEVEL_QTY,\n};\n\ntypedef void (*HAL_TRACE_CRASH_DUMP_CB_T)(void);\n\ntypedef void (*HAL_TRACE_APP_NOTIFY_T)(enum HAL_TRACE_STATE_T state);\n\ntypedef void (*HAL_TRACE_APP_OUTPUT_T)(const unsigned char *buf,\n                                       unsigned int buf_len);\n\ntypedef void (*HAL_TRACE_BUF_CTRL_T)(enum HAL_TRACE_BUF_STATE_T buf_ctrl);\n\nint hal_trace_open(enum HAL_TRACE_TRANSPORT_T transport);\n\nint hal_trace_open_cp(void);\n\nTRACE_FUNC_DECLARE(int hal_trace_switch(enum HAL_TRACE_TRANSPORT_T transport),\n                   return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_close(void), return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_enable_log_module(enum LOG_MODULE_T module),\n                   return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_disable_log_module(enum LOG_MODULE_T module),\n                   return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_set_log_module(const uint32_t *map,\n                                                uint32_t word_cnt),\n                   return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_set_log_level(enum LOG_LEVEL_T level),\n                   return 0);\n\nTRACE_FUNC_DECLARE(void hal_trace_get_history_buffer(const unsigned char **buf1,\n                                                     unsigned int *len1,\n                                                     const unsigned char **buf2,\n                                                     unsigned int *len2),\n                   {\n                     if (buf1) {\n                       *buf1 = NULL;\n                     }\n                     if (len1) {\n                       *len1 = 0;\n                     }\n                     if (buf2) {\n                       *buf2 = NULL;\n                     }\n                     if (len2) {\n                       *len2 = 0;\n                     }\n                   });\n\nTRACE_FUNC_DECLARE(int hal_trace_output(const unsigned char *buf,\n                                        unsigned int buf_len),\n                   return 0);\n\nTRC_FMT_CHK(2, 3)\nTRACE_FUNC_DECLARE(int hal_trace_printf(uint32_t attr, const char *fmt, ...),\n                   return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_dump(const char *fmt, unsigned int size,\n                                      unsigned int count, const void *buffer),\n                   return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_busy(void), return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_pause(void), return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_continue(void), return 0);\n\nTRACE_FUNC_DECLARE(int hal_trace_flush_buffer(void), return 0);\n\nTRACE_FUNC_DECLARE(void hal_trace_idle_send(void), return);\n\nTRACE_FUNC_DECLARE(\n    int hal_trace_crash_dump_register(enum HAL_TRACE_CRASH_DUMP_MODULE_T module,\n                                      HAL_TRACE_CRASH_DUMP_CB_T cb),\n    return 0);\n\nTRACE_FUNC_DECLARE(\n    void hal_trace_app_register(HAL_TRACE_APP_NOTIFY_T notify_cb,\n                                HAL_TRACE_APP_OUTPUT_T output_cb),\n    return);\n\nTRACE_FUNC_DECLARE(\n    void hal_trace_app_custom_register(HAL_TRACE_APP_NOTIFY_T notify_cb,\n                                       HAL_TRACE_APP_OUTPUT_T output_cb,\n                                       HAL_TRACE_APP_OUTPUT_T crash_custom_cb),\n    return);\n\nTRACE_FUNC_DECLARE(void hal_trace_cp_register(HAL_TRACE_APP_NOTIFY_T notify_cb,\n                                              HAL_TRACE_BUF_CTRL_T buf_cb),\n                   return);\n\nTRACE_FUNC_DECLARE(void hal_trace_print_backtrace(uint32_t addr,\n                                                  uint32_t search_cnt,\n                                                  uint32_t print_cnt),\n                   return);\n\nTRACE_FUNC_DECLARE(bool hal_trace_crash_dump_onprocess(void), return false);\n\nTRACE_FUNC_DECLARE(uint32_t hal_trace_get_baudrate(void), return 0);\n\nTRC_FMT_CHK(1, 2)\nstatic inline void hal_trace_dummy(const char *fmt, ...) {}\n\nstatic inline void hal_dump_dummy(const char *fmt, ...) {}\n\n#if (ASSERT_FMT_ARG_IDX > 0)\nTRC_FMT_CHK(ASSERT_FMT_ARG_IDX, ASSERT_FMT_ARG_IDX + 1)\n#endif\nvoid NORETURN hal_trace_assert_dump(ASSERT_DUMP_ARGS);\n\nint hal_trace_address_writable(uint32_t addr);\n\nint hal_trace_address_executable(uint32_t addr);\n\nint hal_trace_address_readable(uint32_t addr);\n\n//==============================================================================\n// AUDIO_DEBUG\n//==============================================================================\n\n#ifdef AUDIO_DEBUG\n#define AUDIO_DEBUG_TRACE(str, ...) hal_trace_printf(str, ##__VA_ARGS__)\n#define AUDIO_DEBUG_DUMP(buf, cnt) hal_trace_output(buf, cnt)\n#endif\n\n//==============================================================================\n// INTERSYS_RAW_DATA_ONLY\n//==============================================================================\n\n#ifdef INTERSYS_RAW_DATA_ONLY\n#define TRACE_RAW(str, ...) hal_trace_printf(str, ##__VA_ARGS__)\n#define DUMP8_RAW(str, buf, cnt) hal_trace_dump(str, sizeof(uint8_t), cnt, buf)\n#endif\n\n//==============================================================================\n// TRACE RX\n//==============================================================================\n\n#if defined(_AUTO_TEST_)\n#ifndef HAL_TRACE_RX_ENABLE\n#define HAL_TRACE_RX_ENABLE\n#endif\nextern int auto_test_send(char *resp);\n#define AUTO_TEST_SEND(str) auto_test_send((char *)str)\n#endif\n\n#include \"stdio.h\"\n\n#define hal_trace_rx_parser(buf, str, ...) sscanf(buf, str, ##__VA_ARGS__)\n\ntypedef unsigned int (*HAL_TRACE_RX_CALLBACK_T)(unsigned char *buf,\n                                                unsigned int len);\n\nint hal_trace_rx_register(const char *name, HAL_TRACE_RX_CALLBACK_T callback);\nint hal_trace_rx_deregister(const char *name);\nint hal_trace_rx_reopen();\nint hal_trace_rx_open();\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_trace_mod.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_trace_mod.h\"\n#include \"plat_types.h\"\n\n#undef _LOG_MODULE_DEF_A\n#define _LOG_MODULE_DEF_A(p, m) #m\n\nstatic const char *mod_desc[] = {_LOG_MODULE_LIST};\n\nconst char *hal_trace_get_log_module_desc(enum LOG_MODULE_T module) {\n  if (module < ARRAY_SIZE(mod_desc)) {\n    return mod_desc[module];\n  }\n  return NULL;\n}\n"
  },
  {
    "path": "platform/hal/hal_trace_mod.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_TRACE_MOD_H__\n#define __HAL_TRACE_MOD_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define LOG_MOD(m)                          LOG_ATTR_MOD(LOG_MODULE_ ## m)\n\n#define _LOG_MODULE_DEF_A(p, m)             p ## m\n#define _LOG_MODULE_DEF(m)                  _LOG_MODULE_DEF_A(LOG_MODULE_, m)\n\n#define _LOG_MODULE_LIST                    \\\n    _LOG_MODULE_DEF(NONE),                  \\\n    _LOG_MODULE_DEF(HAL),                   \\\n    _LOG_MODULE_DEF(DRVANA),                \\\n    _LOG_MODULE_DEF(DRVCODEC),              \\\n    _LOG_MODULE_DEF(DRVBT),                 \\\n    _LOG_MODULE_DEF(DRVFLS),                \\\n    _LOG_MODULE_DEF(DRVSEC),                \\\n    _LOG_MODULE_DEF(DRVUSB),                \\\n    _LOG_MODULE_DEF(AUDFLG),                \\\n    _LOG_MODULE_DEF(MAIN),                  \\\n    _LOG_MODULE_DEF(RT_OS),                 \\\n    _LOG_MODULE_DEF(BTPRF),                 \\\n    _LOG_MODULE_DEF(BLEPRF),                \\\n    _LOG_MODULE_DEF(BTAPP),                 \\\n    _LOG_MODULE_DEF(BLEAPP),                \\\n    _LOG_MODULE_DEF(TWSAPP),                \\\n    _LOG_MODULE_DEF(IBRTAPP),               \\\n    _LOG_MODULE_DEF(APPMAIN),               \\\n    _LOG_MODULE_DEF(APPTHREAD),             \\\n    _LOG_MODULE_DEF(PLAYER),                \\\n    _LOG_MODULE_DEF(TEST),                  \\\n    _LOG_MODULE_DEF(AUD),                   \\\n    _LOG_MODULE_DEF(OTA),                   \\\n    _LOG_MODULE_DEF(NV_SEC),                \\\n    _LOG_MODULE_DEF(AI_GVA),                \\\n    _LOG_MODULE_DEF(AI_AMA),                \\\n    _LOG_MODULE_DEF(AI_GMA),                \\\n\n\nenum LOG_MODULE_T {\n    _LOG_MODULE_LIST\n\n    // Should <= 128\n    LOG_MODULE_QTY,\n};\n\nconst char *hal_trace_get_log_module_desc(enum LOG_MODULE_T module);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_transq.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef CHIP_HAS_TRANSQ\n\n#include \"hal_transq.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_cmu.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include \"reg_transq.h\"\n#include \"stdbool.h\"\n\n// BITMAP:\n// [High Priority Slots] ...... [Normal Priority Slots]\n// 31 30 29 28 27 26 25  ...... 10 9 8 7 6 5 4 3 2 1 0\n\nstatic struct TRANSQ_T *const transq[HAL_TRANSQ_ID_QTY] = {\n    (struct TRANSQ_T *)TRANSQ0_BASE,\n#if (CHIP_HAS_TRANSQ > 1)\n    (struct TRANSQ_T *)TRANSQ1_BASE,\n#endif\n};\n\nstatic struct TRANSQ_T *const peer_transq[HAL_TRANSQ_ID_QTY] = {\n    (struct TRANSQ_T *)TRANSQ0_PEER_BASE,\n#if (CHIP_HAS_TRANSQ > 1)\n    (struct TRANSQ_T *)TRANSQ1_PEER_BASE,\n#endif\n};\n\nstatic const IRQn_Type remote_irq_num[HAL_TRANSQ_ID_QTY] = {\n    TRANSQ0_RMT_IRQn,\n#if (CHIP_HAS_TRANSQ > 1)\n    TRANSQ1_RMT_IRQn,\n#endif\n};\n\nstatic const IRQn_Type local_irq_num[HAL_TRANSQ_ID_QTY] = {\n    TRANSQ0_LCL_IRQn,\n#if (CHIP_HAS_TRANSQ > 1)\n    TRANSQ1_LCL_IRQn,\n#endif\n};\n\nstatic struct HAL_TRANSQ_CFG_T transq_cfg[HAL_TRANSQ_ID_QTY];\n\nstatic uint8_t next_tx_slot[HAL_TRANSQ_ID_QTY][HAL_TRANSQ_PRI_QTY];\n\nstatic uint8_t active_tx_slot[HAL_TRANSQ_ID_QTY][HAL_TRANSQ_PRI_QTY];\n\nstatic bool tx_slot_full[HAL_TRANSQ_ID_QTY][HAL_TRANSQ_PRI_QTY];\n\nstatic uint8_t next_rx_slot[HAL_TRANSQ_ID_QTY][HAL_TRANSQ_PRI_QTY];\n\nstatic uint32_t rx_irq_mask[HAL_TRANSQ_ID_QTY][HAL_TRANSQ_PRI_QTY];\n\nstatic uint32_t construct_mask(uint32_t lsb, uint32_t width) {\n  int i;\n  uint32_t result;\n\n  if (lsb >= 32 || width == 0) {\n    return 0;\n  }\n\n  result = 0;\n  for (i = lsb; i < lsb + width; i++) {\n    result |= (1 << i);\n  }\n\n  return result;\n}\n\nstatic uint32_t get_next_rx_slot(enum HAL_TRANSQ_ID_T id,\n                                 enum HAL_TRANSQ_PRI_T pri, uint32_t slot) {\n  slot++;\n  if (pri == HAL_TRANSQ_PRI_HIGH) {\n    if (slot >= TRANSQ_SLOT_NUM) {\n      slot = TRANSQ_SLOT_NUM - transq_cfg[id].slot.rx_num[pri];\n    }\n  } else {\n    if (slot >= transq_cfg[id].slot.rx_num[pri]) {\n      slot = 0;\n    }\n  }\n\n  return slot;\n}\n\nstatic uint32_t get_next_tx_slot(enum HAL_TRANSQ_ID_T id,\n                                 enum HAL_TRANSQ_PRI_T pri, uint32_t slot) {\n  slot++;\n  if (pri == HAL_TRANSQ_PRI_HIGH) {\n    if (slot >= TRANSQ_SLOT_NUM) {\n      slot = TRANSQ_SLOT_NUM - transq_cfg[id].slot.tx_num[pri];\n    }\n  } else {\n    if (slot >= transq_cfg[id].slot.tx_num[pri]) {\n      slot = 0;\n    }\n  }\n\n  return slot;\n}\n\nstatic void hal_transq_remote_irq_handler(void) {\n  enum HAL_TRANSQ_ID_T id;\n  enum HAL_TRANSQ_PRI_T pri;\n  uint32_t status;\n  uint32_t slot;\n\n#if (CHIP_HAS_TRANSQ > 1)\n  IRQn_Type irq = NVIC_GetCurrentActiveIRQ();\n\n  for (id = HAL_TRANSQ_ID_0; id < HAL_TRANSQ_ID_QTY; id++) {\n    if (irq == remote_irq_num[id]) {\n      break;\n    }\n  }\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return;\n  }\n#else\n  id = HAL_TRANSQ_ID_0;\n#endif\n\n  while ((status = peer_transq[id]->RMT_MIS) != 0) {\n    slot = next_rx_slot[id][HAL_TRANSQ_PRI_HIGH];\n    if (slot < TRANSQ_SLOT_NUM && (status & (1 << slot))) {\n      pri = HAL_TRANSQ_PRI_HIGH;\n    } else {\n      pri = HAL_TRANSQ_PRI_NORMAL;\n      slot = next_rx_slot[id][HAL_TRANSQ_PRI_NORMAL];\n\n      ASSERT(slot < TRANSQ_SLOT_NUM && (status & (1 << slot)),\n             \"TRANSQ-%d: Rx IRQ when no slot or out of order: status=0x%08x \"\n             \"next=%d pri_next=%d\",\n             id, status, next_rx_slot[id][HAL_TRANSQ_PRI_NORMAL],\n             next_rx_slot[id][HAL_TRANSQ_PRI_HIGH]);\n    }\n\n    // Mask IRQ from corresponding slots\n    peer_transq[id]->RMT_INTMASK &= ~rx_irq_mask[id][pri];\n\n    if (transq_cfg[id].rx_handler) {\n      transq_cfg[id].rx_handler(pri);\n    }\n  }\n}\n\nstatic int hal_transq_active_tx_valid(enum HAL_TRANSQ_ID_T id,\n                                      enum HAL_TRANSQ_PRI_T pri) {\n  return (active_tx_slot[id][pri] >= TRANSQ_SLOT_NUM ||\n          active_tx_slot[id][pri] != next_tx_slot[id][pri] ||\n          tx_slot_full[id][pri]);\n}\n\nstatic void hal_transq_local_irq_handler(void) {\n  enum HAL_TRANSQ_ID_T id;\n  enum HAL_TRANSQ_PRI_T pri;\n  uint32_t status;\n  uint32_t slot, next_slot;\n  uint32_t lock;\n\n#if (CHIP_HAS_TRANSQ > 1)\n  IRQn_Type irq = NVIC_GetCurrentActiveIRQ();\n\n  for (id = HAL_TRANSQ_ID_0; id < HAL_TRANSQ_ID_QTY; id++) {\n    if (irq == local_irq_num[id]) {\n      break;\n    }\n  }\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return;\n  }\n#else\n  id = HAL_TRANSQ_ID_0;\n#endif\n\n  while ((status = transq[id]->LERR_MIS) != 0) {\n    transq[id]->LERR_ISC.LERR_INTCLR = status;\n    ASSERT(false, \"TRANSQ-%d: Tx on active slot: 0x%08x\", id, status);\n  }\n\n  while ((status = transq[id]->LDONE_MIS) != 0) {\n    if (transq_cfg[id].tx_handler) {\n      lock = int_lock();\n\n      ASSERT(hal_transq_active_tx_valid(id, HAL_TRANSQ_PRI_HIGH),\n             \"TRANSQ-%d: Corrupted pri active tx: active=%d next=%d full=%d\",\n             id, active_tx_slot[id][HAL_TRANSQ_PRI_HIGH],\n             next_tx_slot[id][HAL_TRANSQ_PRI_HIGH],\n             tx_slot_full[id][HAL_TRANSQ_PRI_HIGH]);\n      ASSERT(hal_transq_active_tx_valid(id, HAL_TRANSQ_PRI_NORMAL),\n             \"TRANSQ-%d: Corrupted active tx: active=%d next=%d full=%d\", id,\n             active_tx_slot[id][HAL_TRANSQ_PRI_NORMAL],\n             next_tx_slot[id][HAL_TRANSQ_PRI_NORMAL],\n             tx_slot_full[id][HAL_TRANSQ_PRI_NORMAL]);\n\n      slot = active_tx_slot[id][HAL_TRANSQ_PRI_HIGH];\n      if (slot < TRANSQ_SLOT_NUM && (status & (1 << slot))) {\n        pri = HAL_TRANSQ_PRI_HIGH;\n      } else {\n        pri = HAL_TRANSQ_PRI_NORMAL;\n        slot = active_tx_slot[id][HAL_TRANSQ_PRI_NORMAL];\n\n        ASSERT(slot < TRANSQ_SLOT_NUM && (status & (1 << slot)),\n               \"TRANSQ-%d: Tx done IRQ when slot empty or out of order: \"\n               \"status=0x%08x next=%d pri_next=%d\",\n               id, status, active_tx_slot[id][HAL_TRANSQ_PRI_NORMAL],\n               active_tx_slot[id][HAL_TRANSQ_PRI_HIGH]);\n      }\n\n      // Clear the interrupt\n      transq[id]->LDONE_ISC.LDONE_INTCLR = (1 << slot);\n\n      next_slot = get_next_tx_slot(id, pri, slot);\n\n      if (!tx_slot_full[id][pri] && next_slot == next_tx_slot[id][pri]) {\n        // No tx in progress\n        active_tx_slot[id][pri] = TRANSQ_SLOT_NUM;\n      } else {\n        tx_slot_full[id][pri] = false;\n        if (transq_cfg[id].slot.tx_num[pri] == 1) {\n          // No tx in progress\n          active_tx_slot[id][pri] = TRANSQ_SLOT_NUM;\n        } else {\n          // Some tx in progress\n          active_tx_slot[id][pri] = next_slot;\n        }\n      }\n\n      int_unlock(lock);\n\n      transq_cfg[id].tx_handler(pri,\n                                (const uint8_t *)transq[id]->WSLOT[slot].ADDR,\n                                transq[id]->WSLOT[slot].LEN);\n    } else {\n      transq[id]->LDONE_INTMASK = 0;\n    }\n  }\n}\n\nenum HAL_TRANSQ_RET_T hal_transq_get_rx_status(enum HAL_TRANSQ_ID_T id,\n                                               enum HAL_TRANSQ_PRI_T pri,\n                                               bool *ready) {\n  uint32_t lock;\n  uint32_t slot;\n\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return HAL_TRANSQ_RET_BAD_ID;\n  }\n  if (pri >= HAL_TRANSQ_PRI_QTY) {\n    return HAL_TRANSQ_RET_BAD_PRI;\n  }\n  if (transq_cfg[id].slot.rx_num[pri] == 0) {\n    return HAL_TRANSQ_RET_BAD_RX_NUM;\n  }\n  if (transq_cfg[id].rx_handler) {\n    // Rx will be processed by IRQ handler\n    return HAL_TRANSQ_RET_BAD_MODE;\n  }\n\n  lock = int_lock();\n\n  slot = next_rx_slot[id][pri];\n\n  if (slot < TRANSQ_SLOT_NUM &&\n      peer_transq[id]->RMT_ISC.RMT_RIS & (1 << slot)) {\n    *ready = true;\n  } else {\n    *ready = false;\n  }\n\n  int_unlock(lock);\n\n  return HAL_TRANSQ_RET_OK;\n}\n\nenum HAL_TRANSQ_RET_T hal_transq_get_tx_status(enum HAL_TRANSQ_ID_T id,\n                                               enum HAL_TRANSQ_PRI_T pri,\n                                               bool *done) {\n  uint32_t lock;\n  uint32_t slot, next_slot;\n\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return HAL_TRANSQ_RET_BAD_ID;\n  }\n  if (pri >= HAL_TRANSQ_PRI_QTY) {\n    return HAL_TRANSQ_RET_BAD_PRI;\n  }\n  if (transq_cfg[id].slot.tx_num[pri] == 0) {\n    return HAL_TRANSQ_RET_BAD_TX_NUM;\n  }\n  if (transq_cfg[id].tx_handler) {\n    // Tx done will be processed by IRQ handler\n    return HAL_TRANSQ_RET_BAD_MODE;\n  }\n\n  lock = int_lock();\n\n  slot = active_tx_slot[id][pri];\n\n  ASSERT(hal_transq_active_tx_valid(id, pri),\n         \"TRANSQ-%d: Corrupted active tx: pri=%d active=%d next=%d full=%d\", id,\n         pri, active_tx_slot[id][pri], next_tx_slot[id][pri],\n         tx_slot_full[id][pri]);\n\n  if (transq[id]->LDONE_ISC.LDONE_RIS & (1 << slot)) {\n    *done = true;\n\n    // Clear the interrupt\n    transq[id]->LDONE_ISC.LDONE_INTCLR = (1 << slot);\n\n    next_slot = get_next_tx_slot(id, pri, slot);\n\n    if (!tx_slot_full[id][pri] && next_slot == next_tx_slot[id][pri]) {\n      // No tx in progress\n      active_tx_slot[id][pri] = TRANSQ_SLOT_NUM;\n    } else {\n      tx_slot_full[id][pri] = false;\n      if (transq_cfg[id].slot.tx_num[pri] == 1) {\n        // No tx in progress\n        active_tx_slot[id][pri] = TRANSQ_SLOT_NUM;\n      } else {\n        // Some tx in progress\n        active_tx_slot[id][pri] = next_slot;\n      }\n    }\n  } else {\n    *done = false;\n  }\n\n  int_unlock(lock);\n\n  return HAL_TRANSQ_RET_OK;\n}\n\nenum HAL_TRANSQ_RET_T hal_transq_rx_first(enum HAL_TRANSQ_ID_T id,\n                                          enum HAL_TRANSQ_PRI_T pri,\n                                          const uint8_t **data, uint32_t *len) {\n  enum HAL_TRANSQ_RET_T ret;\n  uint32_t slot;\n  // uint32_t lock;\n\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return HAL_TRANSQ_RET_BAD_ID;\n  }\n  if (pri >= HAL_TRANSQ_PRI_QTY) {\n    return HAL_TRANSQ_RET_BAD_PRI;\n  }\n  if (transq_cfg[id].slot.rx_num[pri] == 0) {\n    return HAL_TRANSQ_RET_BAD_RX_NUM;\n  }\n\n  // lock = int_lock();\n\n  slot = next_rx_slot[id][pri];\n\n  if (slot < TRANSQ_SLOT_NUM &&\n      peer_transq[id]->RMT_ISC.RMT_RIS & (1 << slot)) {\n    // Msg available\n    ret = HAL_TRANSQ_RET_OK;\n\n    if (data) {\n      *data = (const uint8_t *)peer_transq[id]->RSLOT[slot].ADDR;\n    }\n    if (len) {\n      *len = peer_transq[id]->RSLOT[slot].LEN;\n    }\n  } else {\n    // No msg. Re-enable IRQ\n    ret = HAL_TRANSQ_RET_RX_EMPTY;\n\n    if (data) {\n      *data = NULL;\n    }\n    if (len) {\n      *len = 0;\n    }\n    peer_transq[id]->RMT_INTMASK |= rx_irq_mask[id][pri];\n  }\n\n  // int_unlock(lock);\n\n  return ret;\n}\n\nenum HAL_TRANSQ_RET_T hal_transq_rx_next(enum HAL_TRANSQ_ID_T id,\n                                         enum HAL_TRANSQ_PRI_T pri,\n                                         const uint8_t **data, uint32_t *len) {\n  enum HAL_TRANSQ_RET_T ret;\n  uint32_t slot;\n  // uint32_t lock;\n\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return HAL_TRANSQ_RET_BAD_ID;\n  }\n  if (pri >= HAL_TRANSQ_PRI_QTY) {\n    return HAL_TRANSQ_RET_BAD_PRI;\n  }\n  if (transq_cfg[id].slot.rx_num[pri] == 0) {\n    return HAL_TRANSQ_RET_BAD_RX_NUM;\n  }\n\n  ret = HAL_TRANSQ_RET_OK;\n\n  // lock = int_lock();\n\n  slot = next_rx_slot[id][pri];\n\n  if (slot < TRANSQ_SLOT_NUM &&\n      peer_transq[id]->RMT_ISC.RMT_RIS & (1 << slot)) {\n    // Clear cur IRQ\n    peer_transq[id]->RMT_ISC.RMT_INTCLR = (1 << slot);\n\n    // Update next_rx_slot\n    slot = get_next_rx_slot(id, pri, slot);\n    next_rx_slot[id][pri] = slot;\n\n    if (slot < TRANSQ_SLOT_NUM &&\n        peer_transq[id]->RMT_ISC.RMT_RIS & (1 << slot)) {\n      // Next msg available\n      if (data) {\n        *data = (const uint8_t *)peer_transq[id]->RSLOT[slot].ADDR;\n      }\n      if (len) {\n        *len = peer_transq[id]->RSLOT[slot].LEN;\n      }\n    } else {\n      // No msg\n      ret = HAL_TRANSQ_RET_RX_EMPTY;\n    }\n  } else {\n    // No msg\n    ret = HAL_TRANSQ_RET_RX_EMPTY;\n  }\n\n  if (ret == HAL_TRANSQ_RET_RX_EMPTY) {\n    if (data) {\n      *data = NULL;\n    }\n    if (len) {\n      *len = 0;\n    }\n    // Re-enable IRQ\n    peer_transq[id]->RMT_INTMASK |= rx_irq_mask[id][pri];\n  }\n\n  // int_unlock(lock);\n\n  return ret;\n}\n\nenum HAL_TRANSQ_RET_T hal_transq_tx(enum HAL_TRANSQ_ID_T id,\n                                    enum HAL_TRANSQ_PRI_T pri,\n                                    const uint8_t *data, uint32_t len) {\n  enum HAL_TRANSQ_RET_T ret;\n  uint32_t lock;\n  uint32_t slot;\n\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return HAL_TRANSQ_RET_BAD_ID;\n  }\n  if (pri >= HAL_TRANSQ_PRI_QTY) {\n    return HAL_TRANSQ_RET_BAD_PRI;\n  }\n  if (transq_cfg[id].slot.tx_num[pri] == 0) {\n    return HAL_TRANSQ_RET_BAD_TX_NUM;\n  }\n\n  lock = int_lock();\n\n  if (tx_slot_full[id][pri]) {\n    ret = HAL_TRANSQ_RET_TX_FULL;\n  } else {\n    ret = HAL_TRANSQ_RET_OK;\n\n    slot = next_tx_slot[id][pri];\n\n    transq[id]->WSLOT[slot].ADDR = (uint32_t)data;\n    transq[id]->WSLOT[slot].LEN = len;\n    transq[id]->RMT_INTSET = (1 << slot);\n\n    // Update active_tx_slot if this is the only tx in progress\n    if (active_tx_slot[id][pri] >= TRANSQ_SLOT_NUM) {\n      active_tx_slot[id][pri] = slot;\n    }\n\n    // Update next_tx_slot\n    next_tx_slot[id][pri] = get_next_tx_slot(id, pri, slot);\n\n    if (next_tx_slot[id][pri] == active_tx_slot[id][pri]) {\n      tx_slot_full[id][pri] = true;\n    }\n  }\n\n  int_unlock(lock);\n\n  return ret;\n}\n\nenum HAL_TRANSQ_RET_T\nhal_transq_update_num(enum HAL_TRANSQ_ID_T id,\n                      const struct HAL_TRANSQ_SLOT_NUM_T *slot) {\n  uint32_t tx_mask;\n\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return HAL_TRANSQ_RET_BAD_ID;\n  }\n  if (slot == NULL) {\n    return HAL_TRANSQ_RET_BAD_SLOT;\n  }\n  if (slot->tx_num[HAL_TRANSQ_PRI_NORMAL] + slot->tx_num[HAL_TRANSQ_PRI_HIGH] >\n      TRANSQ_SLOT_NUM) {\n    return HAL_TRANSQ_RET_BAD_TX_NUM;\n  }\n  if (slot->rx_num[HAL_TRANSQ_PRI_NORMAL] + slot->rx_num[HAL_TRANSQ_PRI_HIGH] >\n      TRANSQ_SLOT_NUM) {\n    return HAL_TRANSQ_RET_BAD_RX_NUM;\n  }\n\n  transq_cfg[id].slot = *slot;\n\n  rx_irq_mask[id][HAL_TRANSQ_PRI_NORMAL] =\n      construct_mask(0, slot->rx_num[HAL_TRANSQ_PRI_NORMAL]);\n  rx_irq_mask[id][HAL_TRANSQ_PRI_HIGH] =\n      construct_mask(TRANSQ_SLOT_NUM - slot->rx_num[HAL_TRANSQ_PRI_HIGH],\n                     slot->rx_num[HAL_TRANSQ_PRI_HIGH]);\n\n  tx_mask = construct_mask(0, slot->tx_num[HAL_TRANSQ_PRI_NORMAL]) |\n            construct_mask(TRANSQ_SLOT_NUM - slot->tx_num[HAL_TRANSQ_PRI_HIGH],\n                           slot->tx_num[HAL_TRANSQ_PRI_HIGH]);\n\n  transq[id]->RMT_INTMASK = tx_mask;\n  transq[id]->LERR_INTMASK = tx_mask;\n  if (transq_cfg[id].tx_handler) {\n    transq[id]->LDONE_INTMASK = tx_mask;\n  } else {\n    transq[id]->LDONE_INTMASK = 0;\n  }\n\n  return HAL_TRANSQ_RET_OK;\n}\n\nenum HAL_TRANSQ_RET_T hal_transq_open(enum HAL_TRANSQ_ID_T id,\n                                      const struct HAL_TRANSQ_CFG_T *cfg) {\n  const struct HAL_TRANSQ_SLOT_NUM_T *slot;\n  uint32_t ctrl;\n  enum HAL_TRANSQ_RET_T ret;\n\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return HAL_TRANSQ_RET_BAD_ID;\n  }\n  if (cfg == NULL) {\n    return HAL_TRANSQ_RET_BAD_CFG;\n  }\n\n#ifdef CHIP_BEST2000\n  hal_cmu_clock_enable(HAL_CMU_MOD_P_TRANSQ_WF);\n  hal_cmu_reset_clear(HAL_CMU_MOD_P_TRANSQ_WF);\n#elif defined(CHIP_BEST2001) && !defined(CHIP_BEST2001_DSP)\n  // 2001 dsp has enable transq clk at hal_cmu_dsp_clock_enable()\n  hal_cmu_clock_enable(HAL_CMU_MOD_P_TQWF);\n  hal_cmu_reset_clear(HAL_CMU_MOD_P_TQWF);\n  hal_cmu_clock_enable(HAL_CMU_MOD_P_TQA7);\n  hal_cmu_reset_clear(HAL_CMU_MOD_P_TQA7);\n#endif\n\n  transq_cfg[id] = *cfg;\n\n  slot = &cfg->slot;\n\n  ret = hal_transq_update_num(id, slot);\n  if (ret) {\n    return ret;\n  }\n\n  next_tx_slot[id][HAL_TRANSQ_PRI_NORMAL] =\n      slot->tx_num[HAL_TRANSQ_PRI_NORMAL] ? 0 : TRANSQ_SLOT_NUM;\n  active_tx_slot[id][HAL_TRANSQ_PRI_NORMAL] = TRANSQ_SLOT_NUM;\n  tx_slot_full[id][HAL_TRANSQ_PRI_NORMAL] = false;\n  next_rx_slot[id][HAL_TRANSQ_PRI_NORMAL] =\n      slot->rx_num[HAL_TRANSQ_PRI_NORMAL] ? 0 : TRANSQ_SLOT_NUM;\n\n  next_tx_slot[id][HAL_TRANSQ_PRI_HIGH] =\n      slot->tx_num[HAL_TRANSQ_PRI_HIGH]\n          ? (TRANSQ_SLOT_NUM - slot->tx_num[HAL_TRANSQ_PRI_HIGH])\n          : TRANSQ_SLOT_NUM;\n  active_tx_slot[id][HAL_TRANSQ_PRI_HIGH] = TRANSQ_SLOT_NUM;\n  tx_slot_full[id][HAL_TRANSQ_PRI_HIGH] = false;\n  next_rx_slot[id][HAL_TRANSQ_PRI_HIGH] =\n      slot->rx_num[HAL_TRANSQ_PRI_HIGH]\n          ? (TRANSQ_SLOT_NUM - slot->rx_num[HAL_TRANSQ_PRI_HIGH])\n          : TRANSQ_SLOT_NUM;\n\n  transq[id]->LDONE_ISC.LDONE_INTCLR = ~0UL;\n  transq[id]->LERR_ISC.LERR_INTCLR = ~0UL;\n  transq[id]->RMT_ISC.RMT_INTCLR = ~0UL;\n\n  ctrl = CTRL_REMOTE_IRQ_EN | CTRL_LOCAL_ERR_IRQ_EN;\n  if (cfg->tx_handler) {\n    ctrl |= CTRL_LOCAL_DONE_IRQ_EN;\n  }\n  transq[id]->CTRL = ctrl;\n\n  if (cfg->rx_handler) {\n    NVIC_SetVector(remote_irq_num[id], (uint32_t)hal_transq_remote_irq_handler);\n    NVIC_SetPriority(remote_irq_num[id], IRQ_PRIORITY_NORMAL);\n    NVIC_ClearPendingIRQ(remote_irq_num[id]);\n    NVIC_EnableIRQ(remote_irq_num[id]);\n  }\n\n  NVIC_SetVector(local_irq_num[id], (uint32_t)hal_transq_local_irq_handler);\n  NVIC_SetPriority(local_irq_num[id], IRQ_PRIORITY_NORMAL);\n  NVIC_ClearPendingIRQ(local_irq_num[id]);\n  NVIC_EnableIRQ(local_irq_num[id]);\n\n  return HAL_TRANSQ_RET_OK;\n}\n\nenum HAL_TRANSQ_RET_T hal_transq_close(enum HAL_TRANSQ_ID_T id) {\n  if (id >= HAL_TRANSQ_ID_QTY) {\n    return HAL_TRANSQ_RET_BAD_ID;\n  }\n\n  transq[id]->CTRL = 0;\n  NVIC_DisableIRQ(remote_irq_num[id]);\n  NVIC_DisableIRQ(local_irq_num[id]);\n\n  return HAL_TRANSQ_RET_OK;\n}\n\n#endif // CHIP_HAS_TRANSQ\n"
  },
  {
    "path": "platform/hal/hal_transq.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_TRANSQ_H__\n#define __HAL_TRANSQ_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef CHIP_HAS_TRANSQ\n\n#include \"plat_types.h\"\n\nenum HAL_TRANSQ_ID_T {\n    HAL_TRANSQ_ID_0 = 0,\n#if (CHIP_HAS_TRANSQ > 1)\n    HAL_TRANSQ_ID_1,\n#endif\n\n    HAL_TRANSQ_ID_QTY\n};\n\nenum HAL_TRANSQ_PRI_T {\n    HAL_TRANSQ_PRI_NORMAL = 0,\n    HAL_TRANSQ_PRI_HIGH,\n\n    HAL_TRANSQ_PRI_QTY\n};\n\nenum HAL_TRANSQ_RET_T {\n    HAL_TRANSQ_RET_OK = 0,\n    HAL_TRANSQ_RET_BAD_ID,\n    HAL_TRANSQ_RET_BAD_PRI,\n    HAL_TRANSQ_RET_BAD_CFG,\n    HAL_TRANSQ_RET_BAD_SLOT,\n    HAL_TRANSQ_RET_BAD_TX_NUM,\n    HAL_TRANSQ_RET_BAD_RX_NUM,\n    HAL_TRANSQ_RET_BAD_MODE,\n    HAL_TRANSQ_RET_RX_EMPTY,\n    HAL_TRANSQ_RET_TX_FULL,\n};\n\ntypedef void (*HAL_TRANSQ_RX_IRQ_HANDLER)(enum HAL_TRANSQ_PRI_T pri);\ntypedef void (*HAL_TRANSQ_TX_IRQ_HANDLER)(enum HAL_TRANSQ_PRI_T pri, const uint8_t *data, uint32_t len);\n\nstruct HAL_TRANSQ_SLOT_NUM_T {\n    uint8_t tx_num[HAL_TRANSQ_PRI_QTY];\n    uint8_t rx_num[HAL_TRANSQ_PRI_QTY];\n};\n\nstruct HAL_TRANSQ_CFG_T {\n    struct HAL_TRANSQ_SLOT_NUM_T slot;\n    HAL_TRANSQ_RX_IRQ_HANDLER rx_handler;\n    HAL_TRANSQ_TX_IRQ_HANDLER tx_handler;\n};\n\nenum HAL_TRANSQ_RET_T hal_transq_get_rx_status(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, bool *ready);\n\nenum HAL_TRANSQ_RET_T hal_transq_get_tx_status(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, bool *done);\n\nenum HAL_TRANSQ_RET_T hal_transq_rx_first(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, const uint8_t **data, uint32_t *len);\n\nenum HAL_TRANSQ_RET_T hal_transq_rx_next(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, const uint8_t **data, uint32_t *len);\n\nenum HAL_TRANSQ_RET_T hal_transq_tx(enum HAL_TRANSQ_ID_T id, enum HAL_TRANSQ_PRI_T pri, const uint8_t *data, uint32_t len);\n\nenum HAL_TRANSQ_RET_T hal_transq_update_num(enum HAL_TRANSQ_ID_T id, const struct HAL_TRANSQ_SLOT_NUM_T *slot);\n\nenum HAL_TRANSQ_RET_T hal_transq_open(enum HAL_TRANSQ_ID_T id, const struct HAL_TRANSQ_CFG_T *cfg);\n\nenum HAL_TRANSQ_RET_T hal_transq_close(enum HAL_TRANSQ_ID_T id);\n\n#endif // CHIP_HAS_TRANSQ\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_uart.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef CHIP_HAS_UART\n\n#include \"hal_uart.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_cmu.h\"\n#include \"hal_dma.h\"\n#include \"hal_iomux.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include \"reg_uart.h\"\n#include \"string.h\"\n\n#define UART_FLUSH_DELAY_DEFAULT 2\n\nenum UART_RX_DMA_MODE_T {\n  UART_RX_DMA_MODE_NORMAL,\n  UART_RX_DMA_MODE_PINGPANG,\n  UART_RX_DMA_MODE_STREAM,\n  UART_RX_DMA_MODE_BUF_LIST,\n};\n\nstruct HAL_UART_HW_DESC_T {\n  struct UART_T *base;\n  IRQn_Type irq;\n  enum HAL_CMU_MOD_ID_T mod;\n  enum HAL_CMU_MOD_ID_T apb;\n  enum HAL_DMA_PERIPH_T rx_periph;\n  enum HAL_DMA_PERIPH_T tx_periph;\n};\n\nstatic const struct HAL_UART_HW_DESC_T uart[HAL_UART_ID_QTY] = {\n    {\n        .base = (struct UART_T *)UART0_BASE,\n        .irq = UART0_IRQn,\n        .mod = HAL_CMU_MOD_O_UART0,\n        .apb = HAL_CMU_MOD_P_UART0,\n        .rx_periph = HAL_GPDMA_UART0_RX,\n        .tx_periph = HAL_GPDMA_UART0_TX,\n    },\n#if (CHIP_HAS_UART > 1)\n    {\n        .base = (struct UART_T *)UART1_BASE,\n        .irq = UART1_IRQn,\n        .mod = HAL_CMU_MOD_O_UART1,\n        .apb = HAL_CMU_MOD_P_UART1,\n        .rx_periph = HAL_GPDMA_UART1_RX,\n        .tx_periph = HAL_GPDMA_UART1_TX,\n    },\n#endif\n#if (CHIP_HAS_UART > 2)\n    {\n        .base = (struct UART_T *)UART2_BASE,\n        .irq = UART2_IRQn,\n        .mod = HAL_CMU_MOD_O_UART2,\n        .apb = HAL_CMU_MOD_P_UART2,\n        .rx_periph = HAL_GPDMA_UART2_RX,\n        .tx_periph = HAL_GPDMA_UART2_TX,\n    },\n#endif\n#ifdef BT_UART\n    {\n        .base = (struct UART_T *)BT_UART_BASE,\n        .irq = INVALID_IRQn,\n        .mod = HAL_CMU_MOD_QTY,\n        .apb = HAL_CMU_MOD_QTY,\n        .rx_periph = HAL_DMA_PERIPH_NULL,\n        .tx_periph = HAL_DMA_PERIPH_NULL,\n    },\n#endif\n};\n\nstatic bool init_done = false;\n\nstatic HAL_UART_IRQ_HANDLER_T irq_handler[HAL_UART_ID_QTY] = {NULL};\n\nstatic HAL_UART_IRQ_RXDMA_HANDLER_T rxdma_handler[HAL_UART_ID_QTY] = {NULL};\nstatic HAL_UART_IRQ_TXDMA_HANDLER_T txdma_handler[HAL_UART_ID_QTY] = {NULL};\n\nstatic uint8_t recv_dma_chan[HAL_UART_ID_QTY];\nstatic uint8_t send_dma_chan[HAL_UART_ID_QTY];\n\nstatic uint32_t recv_dma_size[HAL_UART_ID_QTY];\nstatic uint32_t send_dma_size[HAL_UART_ID_QTY];\n\nstatic union HAL_UART_IRQ_T recv_mask[HAL_UART_ID_QTY];\n\nstatic enum UART_RX_DMA_MODE_T recv_dma_mode[HAL_UART_ID_QTY];\n\nstatic const char *const err_invalid_id = \"Invalid UART ID: %d\";\nstatic const char *const err_recv_dma_api =\n    \"%s: Set RT irq in hal_uart_dma_recv_mask... to avoid data lost\";\n\nstatic const struct HAL_UART_CFG_T default_cfg = {\n    .parity = HAL_UART_PARITY_NONE,\n    .stop = HAL_UART_STOP_BITS_1,\n    .data = HAL_UART_DATA_BITS_8,\n    .flow = HAL_UART_FLOW_CONTROL_RTSCTS,\n    .tx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .rx_level = HAL_UART_FIFO_LEVEL_1_4,\n    .baud = 921600,\n    .dma_rx = false,\n    .dma_tx = false,\n    .dma_rx_stop_on_err = false,\n};\n\nstatic void hal_uart_irq_handler(void);\n\nstatic void set_baud_rate(enum HAL_UART_ID_T id, uint32_t rate) {\n  uint32_t mod_clk;\n  uint32_t ibrd, fbrd;\n  uint32_t div;\n\n  mod_clk = 0;\n#ifdef PERIPH_PLL_FREQ\n  if (PERIPH_PLL_FREQ / 2 > 2 * hal_cmu_get_crystal_freq()) {\n    // Init to OSC_X2\n    mod_clk = 2 * hal_cmu_get_crystal_freq() / 16;\n    if (cfg->baud > mod_clk) {\n      mod_clk = PERIPH_PLL_FREQ / 2 / 16;\n\n      if (id == HAL_UART_ID_0) {\n        hal_cmu_uart0_set_div(2);\n#if (CHIP_HAS_UART > 1)\n      } else if (id == HAL_UART_ID_1) {\n        hal_cmu_uart1_set_div(2);\n#endif\n#if (CHIP_HAS_UART > 2)\n      } else if (id == HAL_UART_ID_2) {\n        hal_cmu_uart2_set_div(2);\n#endif\n      }\n    } else {\n      mod_clk = 0;\n    }\n  }\n#endif\n  if (mod_clk == 0) {\n    enum HAL_CMU_PERIPH_FREQ_T periph_freq;\n\n    // Init to OSC\n    mod_clk = hal_cmu_get_crystal_freq() / 16;\n    if (rate > mod_clk) {\n      mod_clk *= 2;\n      periph_freq = HAL_CMU_PERIPH_FREQ_52M;\n    } else {\n      periph_freq = HAL_CMU_PERIPH_FREQ_26M;\n    }\n\n    if (id == HAL_UART_ID_0) {\n      hal_cmu_uart0_set_freq(periph_freq);\n#if (CHIP_HAS_UART > 1)\n    } else if (id == HAL_UART_ID_1) {\n      hal_cmu_uart1_set_freq(periph_freq);\n#endif\n#if (CHIP_HAS_UART > 2)\n    } else if (id == HAL_UART_ID_2) {\n      hal_cmu_uart2_set_freq(periph_freq);\n#endif\n    }\n  }\n\n  div = (mod_clk * 64 + rate / 2) / rate;\n  ibrd = div / 64;\n  fbrd = div % 64;\n  if (ibrd == 0 || ibrd >= 65535) {\n    ASSERT(false, \"Invalid baud param: %d\", rate);\n  }\n\n  uart[id].base->UARTIBRD = ibrd;\n  uart[id].base->UARTFBRD = fbrd;\n\n  return;\n}\n\nint hal_uart_open(enum HAL_UART_ID_T id, const struct HAL_UART_CFG_T *cfg) {\n  uint32_t cr, lcr, dmacr;\n  int i;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n\n  if (!init_done) {\n    init_done = true;\n    for (i = HAL_UART_ID_0; i < HAL_UART_ID_QTY; i++) {\n      recv_dma_chan[i] = HAL_DMA_CHAN_NONE;\n      send_dma_chan[i] = HAL_DMA_CHAN_NONE;\n    }\n  }\n\n  if (hal_uart_opened(id)) {\n    hal_uart_close(id);\n  }\n\n  if (cfg == NULL) {\n    cfg = &default_cfg;\n  }\n\n  hal_cmu_clock_enable(uart[id].mod);\n  hal_cmu_clock_enable(uart[id].apb);\n  hal_cmu_reset_clear(uart[id].mod);\n  hal_cmu_reset_clear(uart[id].apb);\n\n  cr = lcr = 0;\n\n  switch (cfg->parity) {\n  case HAL_UART_PARITY_NONE:\n    break;\n  case HAL_UART_PARITY_ODD:\n    lcr |= UARTLCR_H_PEN;\n    break;\n  case HAL_UART_PARITY_EVEN:\n    lcr |= UARTLCR_H_PEN | UARTLCR_H_EPS;\n    break;\n  case HAL_UART_PARITY_FORCE1:\n    lcr |= UARTLCR_H_PEN | UARTLCR_H_SPS;\n    break;\n  case HAL_UART_PARITY_FORCE0:\n    lcr |= UARTLCR_H_PEN | UARTLCR_H_EPS | UARTLCR_H_SPS;\n    break;\n  default:\n    ASSERT(false, \"Invalid parity param: %d\", cfg->parity);\n    break;\n  }\n\n  if (cfg->stop == HAL_UART_STOP_BITS_2) {\n    lcr |= UARTLCR_H_STP2;\n  } else if (cfg->stop != HAL_UART_STOP_BITS_1) {\n    ASSERT(false, \"Invalid stop bits param: %d\", cfg->stop);\n  }\n\n  switch (cfg->data) {\n  case HAL_UART_DATA_BITS_5:\n    lcr |= UARTLCR_H_WLEN_5;\n    break;\n  case HAL_UART_DATA_BITS_6:\n    lcr |= UARTLCR_H_WLEN_6;\n    break;\n  case HAL_UART_DATA_BITS_7:\n    lcr |= UARTLCR_H_WLEN_7;\n    break;\n  case HAL_UART_DATA_BITS_8:\n    lcr |= UARTLCR_H_WLEN_8;\n    break;\n  default:\n    ASSERT(false, \"Invalid data bits param: %d\", cfg->data);\n    break;\n  }\n\n  switch (cfg->flow) {\n  case HAL_UART_FLOW_CONTROL_NONE:\n    break;\n  case HAL_UART_FLOW_CONTROL_RTS:\n    cr |= UARTCR_RTSEN;\n    break;\n  case HAL_UART_FLOW_CONTROL_CTS:\n    cr |= UARTCR_CTSEN;\n    break;\n  case HAL_UART_FLOW_CONTROL_RTSCTS:\n    cr |= UARTCR_RTSEN | UARTCR_CTSEN;\n    break;\n  default:\n    ASSERT(false, \"Invalid flow control param: %d\", cfg->flow);\n    break;\n  }\n\n  lcr |= UARTLCR_H_FEN | UARTLCR_H_DMA_RT_CNT(9);\n  cr |= UARTCR_UARTEN | UARTCR_TXE | UARTCR_RXE;\n\n  dmacr = 0;\n  if (cfg->dma_rx) {\n    dmacr |= UARTDMACR_RXDMAE;\n  }\n  if (cfg->dma_tx) {\n    dmacr |= UARTDMACR_TXDMAE;\n  }\n  if (cfg->dma_rx_stop_on_err) {\n    dmacr |= UARTDMACR_DMAONERR;\n  }\n\n  // Disable UART\n  uart[id].base->UARTCR &= ~UARTCR_UARTEN;\n  // Empty FIFO\n  uart[id].base->UARTLCR_H &= ~UARTLCR_H_FEN;\n  // Wait until UART becomes idle\n  while (((uart[id].base->UARTFR) & UARTFR_BUSY) != 0)\n    ;\n  // Clear previous errors\n  uart[id].base->UARTECR = 1;\n  // Clear previous IRQs\n  uart[id].base->UARTIMSC = 0;\n  uart[id].base->UARTICR = ~0UL;\n  // Configure UART\n  set_baud_rate(id, cfg->baud);\n  uart[id].base->UARTLCR_H = lcr;\n  uart[id].base->UARTDMACR = dmacr;\n  uart[id].base->UARTIFLS = UARTIFLS_TXFIFO_LEVEL(cfg->tx_level) |\n                            UARTIFLS_RXFIFO_LEVEL(cfg->rx_level);\n  uart[id].base->UARTCR = cr;\n\n  if (uart[id].irq != INVALID_IRQn) {\n    NVIC_SetVector(uart[id].irq, (uint32_t)hal_uart_irq_handler);\n    // The priority should be the same as DMA's\n    NVIC_SetPriority(uart[id].irq, IRQ_PRIORITY_NORMAL);\n    NVIC_ClearPendingIRQ(uart[id].irq);\n    NVIC_EnableIRQ(uart[id].irq);\n  }\n\n  return 0;\n}\n\nint hal_uart_reopen(enum HAL_UART_ID_T id, const struct HAL_UART_CFG_T *cfg) {\n  uint32_t cr, dmacr;\n  int i;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n\n  if (!init_done) {\n    init_done = true;\n    for (i = HAL_UART_ID_0; i < HAL_UART_ID_QTY; i++) {\n      recv_dma_chan[i] = HAL_DMA_CHAN_NONE;\n      send_dma_chan[i] = HAL_DMA_CHAN_NONE;\n    }\n  }\n\n  cr = 0;\n  switch (cfg->flow) {\n  case HAL_UART_FLOW_CONTROL_NONE:\n    break;\n  case HAL_UART_FLOW_CONTROL_RTS:\n    cr |= UARTCR_RTSEN;\n    break;\n  case HAL_UART_FLOW_CONTROL_CTS:\n    cr |= UARTCR_CTSEN;\n    break;\n  case HAL_UART_FLOW_CONTROL_RTSCTS:\n    cr |= UARTCR_RTSEN | UARTCR_CTSEN;\n    break;\n  default:\n    ASSERT(false, \"Invalid flow control param: %d\", cfg->flow);\n    break;\n  }\n\n  dmacr = 0;\n  if (cfg->dma_rx) {\n    dmacr |= UARTDMACR_RXDMAE;\n  }\n  if (cfg->dma_tx) {\n    dmacr |= UARTDMACR_TXDMAE;\n  }\n  if (cfg->dma_rx_stop_on_err) {\n    dmacr |= UARTDMACR_DMAONERR;\n  }\n\n  // Configure UART\n  uart[id].base->UARTDMACR = dmacr;\n  uart[id].base->UARTCR =\n      (uart[id].base->UARTCR & ~(UARTCR_RTSEN | UARTCR_CTSEN)) | cr;\n\n  if (uart[id].irq != INVALID_IRQn) {\n    NVIC_SetVector(uart[id].irq, (uint32_t)hal_uart_irq_handler);\n    // The priority should be the same as DMA's\n    NVIC_SetPriority(uart[id].irq, IRQ_PRIORITY_NORMAL);\n    NVIC_ClearPendingIRQ(uart[id].irq);\n    NVIC_EnableIRQ(uart[id].irq);\n  }\n\n  return 0;\n}\n\nint hal_uart_close(enum HAL_UART_ID_T id) {\n  uint32_t lock;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n\n  if (uart[id].irq != INVALID_IRQn) {\n    NVIC_DisableIRQ(uart[id].irq);\n  }\n\n  lock = int_lock();\n  if (recv_dma_chan[id] != HAL_DMA_CHAN_NONE) {\n    hal_gpdma_cancel(recv_dma_chan[id]);\n    hal_gpdma_free_chan(recv_dma_chan[id]);\n    recv_dma_chan[id] = HAL_DMA_CHAN_NONE;\n  }\n  if (send_dma_chan[id] != HAL_DMA_CHAN_NONE) {\n    hal_gpdma_cancel(send_dma_chan[id]);\n    hal_gpdma_free_chan(send_dma_chan[id]);\n    send_dma_chan[id] = HAL_DMA_CHAN_NONE;\n  }\n  int_unlock(lock);\n\n  // Disable UART\n  uart[id].base->UARTCR &= ~UARTCR_UARTEN;\n  // Empty FIFO\n  uart[id].base->UARTLCR_H &= ~UARTLCR_H_FEN;\n\n  hal_cmu_reset_set(uart[id].apb);\n  hal_cmu_reset_set(uart[id].mod);\n  hal_cmu_clock_disable(uart[id].apb);\n  hal_cmu_clock_disable(uart[id].mod);\n\n  return 0;\n}\n\nint hal_uart_opened(enum HAL_UART_ID_T id) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  if (uart[id].apb < HAL_CMU_MOD_QTY &&\n      hal_cmu_clock_get_status(uart[id].apb) != HAL_CMU_CLK_ENABLED) {\n    return 0;\n  }\n  if (uart[id].base->UARTCR & UARTCR_UARTEN) {\n    return 1;\n  }\n  return 0;\n}\n\nint hal_uart_change_baud_rate(enum HAL_UART_ID_T id, uint32_t rate) {\n  union HAL_UART_FLAG_T flag;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n\n  if (!hal_uart_opened(id)) {\n    return 1;\n  }\n\n  flag.reg = uart[id].base->UARTFR;\n  if (flag.BUSY) {\n    return 2;\n  }\n\n  uart[id].base->UARTCR &= ~UARTCR_UARTEN;\n\n  set_baud_rate(id, rate);\n\n  uart[id].base->UARTLCR_H = uart[id].base->UARTLCR_H;\n  uart[id].base->UARTCR |= UARTCR_UARTEN;\n\n  return 0;\n}\n\nint hal_uart_pause(enum HAL_UART_ID_T id) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  if (hal_uart_opened(id)) {\n    uart[id].base->UARTCR &= ~(UARTCR_TXE | UARTCR_RXE);\n    return 0;\n  }\n  return 1;\n}\n\nint hal_uart_continue(enum HAL_UART_ID_T id) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  if (hal_uart_opened(id)) {\n    uart[id].base->UARTCR |= (UARTCR_TXE | UARTCR_RXE);\n    return 0;\n  }\n  return 1;\n}\n\nint hal_uart_readable(enum HAL_UART_ID_T id) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  return (uart[id].base->UARTFR & UARTFR_RXFE) == 0;\n}\n\nint hal_uart_writable(enum HAL_UART_ID_T id) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  return (uart[id].base->UARTFR & UARTFR_TXFF) == 0;\n}\n\nuint8_t hal_uart_getc(enum HAL_UART_ID_T id) {\n  uint32_t c;\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  ASSERT((uart[id].base->UARTDMACR & UARTDMACR_RXDMAE) == 0,\n         \"RX-DMA configured on UART %d\", id);\n  c = uart[id].base->UARTDR;\n  return (c & 0xFF);\n}\n\nint hal_uart_putc(enum HAL_UART_ID_T id, uint8_t c) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  ASSERT((uart[id].base->UARTDMACR & UARTDMACR_TXDMAE) == 0,\n         \"TX-DMA configured on UART %d\", id);\n  uart[id].base->UARTDR = c;\n  return 0;\n}\n\nuint8_t hal_uart_blocked_getc(enum HAL_UART_ID_T id) {\n  while (hal_uart_readable(id) == 0)\n    ;\n  return hal_uart_getc(id);\n}\n\nint hal_uart_blocked_putc(enum HAL_UART_ID_T id, uint8_t c) {\n  while (hal_uart_writable(id) == 0)\n    ;\n  return hal_uart_putc(id, c);\n}\n\nunion HAL_UART_FLAG_T hal_uart_get_flag(enum HAL_UART_ID_T id) {\n  union HAL_UART_FLAG_T flag;\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  flag.reg = uart[id].base->UARTFR;\n  return flag;\n}\n\nunion HAL_UART_STATUS_T hal_uart_get_status(enum HAL_UART_ID_T id) {\n  union HAL_UART_STATUS_T status;\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  status.reg = uart[id].base->UARTRSR;\n  return status;\n}\n\nvoid hal_uart_clear_status(enum HAL_UART_ID_T id) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  uart[id].base->UARTECR = 0;\n}\n\nvoid hal_uart_break_set(enum HAL_UART_ID_T id) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  uart[id].base->UARTLCR_H |= UARTLCR_H_BRK;\n}\n\nvoid hal_uart_break_clear(enum HAL_UART_ID_T id) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  uart[id].base->UARTLCR_H &= ~UARTLCR_H_BRK;\n}\n\nvoid hal_uart_flush(enum HAL_UART_ID_T id, uint32_t ticks) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n\n  if (!hal_uart_opened(id)) {\n    return;\n  }\n  if ((uart[id].base->UARTLCR_H & UARTLCR_H_FEN) == 0) {\n    return;\n  }\n\n  // Disable the UART\n  uart[id].base->UARTCR &= ~UARTCR_UARTEN;\n  // Wait for the end of transmission or reception of the current character\n  hal_sys_timer_delay((ticks > 0) ? ticks : UART_FLUSH_DELAY_DEFAULT);\n\n  // Flush FIFO\n  uart[id].base->UARTLCR_H &= ~UARTLCR_H_FEN;\n  uart[id].base->UARTLCR_H |= UARTLCR_H_FEN;\n\n  // Enable the UART\n  uart[id].base->UARTCR |= UARTCR_UARTEN;\n}\n\nunion HAL_UART_IRQ_T hal_uart_get_raw_irq(enum HAL_UART_ID_T id) {\n  union HAL_UART_IRQ_T irq;\n\n  irq.reg = uart[id].base->UARTRIS;\n\n  return irq;\n}\n\nvoid hal_uart_clear_irq(enum HAL_UART_ID_T id, union HAL_UART_IRQ_T irq) {\n  uart[id].base->UARTICR = irq.reg;\n}\n\nunion HAL_UART_IRQ_T hal_uart_irq_get_mask(enum HAL_UART_ID_T id) {\n  union HAL_UART_IRQ_T mask;\n\n  mask.reg = uart[id].base->UARTIMSC;\n\n  return mask;\n}\n\nunion HAL_UART_IRQ_T hal_uart_irq_set_mask(enum HAL_UART_ID_T id,\n                                           union HAL_UART_IRQ_T mask) {\n  union HAL_UART_IRQ_T old_mask;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  if (mask.RT) {\n    ASSERT(recv_dma_chan[id] == HAL_DMA_CHAN_NONE, err_recv_dma_api,\n           __FUNCTION__);\n  }\n  old_mask.reg = uart[id].base->UARTIMSC;\n  uart[id].base->UARTIMSC = mask.reg;\n\n  return old_mask;\n}\n\nHAL_UART_IRQ_HANDLER_T\nhal_uart_irq_set_handler(enum HAL_UART_ID_T id,\n                         HAL_UART_IRQ_HANDLER_T handler) {\n  HAL_UART_IRQ_HANDLER_T old_handler;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  old_handler = irq_handler[id];\n  irq_handler[id] = handler;\n\n  return old_handler;\n}\n\nstatic void dma_mode_uart_irq_handler(enum HAL_UART_ID_T id,\n                                      union HAL_UART_IRQ_T status) {\n  uint32_t xfer = 0;\n  uint32_t lock;\n\n  if (status.RT || status.FE || status.OE || status.PE || status.BE) {\n    if (recv_dma_mode[id] == UART_RX_DMA_MODE_NORMAL) {\n      // Restore the traditional RT behaviour\n      lock = int_lock();\n      uart[id].base->UARTLCR_H &= ~UARTLCR_H_DMA_RT_EN;\n      int_unlock(lock);\n    }\n\n    if (rxdma_handler[id]) {\n      if (recv_dma_chan[id] != HAL_DMA_CHAN_NONE) {\n        if (recv_dma_mode[id] == UART_RX_DMA_MODE_NORMAL) {\n          xfer = hal_uart_stop_dma_recv(id);\n          if (recv_dma_size[id] > xfer) {\n            xfer = recv_dma_size[id] - xfer;\n          } else {\n            xfer = 0;\n          }\n        }\n      }\n      rxdma_handler[id](xfer, 0, status);\n    }\n  }\n}\n\nvoid hal_uart_irq_set_dma_handler(enum HAL_UART_ID_T id,\n                                  HAL_UART_IRQ_RXDMA_HANDLER_T rxdma,\n                                  HAL_UART_IRQ_TXDMA_HANDLER_T txdma) {\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  rxdma_handler[id] = rxdma;\n  txdma_handler[id] = txdma;\n  irq_handler[id] = dma_mode_uart_irq_handler;\n}\n\nstatic void recv_dma_irq_handler(uint8_t chan, uint32_t remain_tsize,\n                                 uint32_t error, struct HAL_DMA_DESC_T *lli) {\n  enum HAL_UART_ID_T id;\n  uint32_t xfer;\n  uint32_t lock;\n  union HAL_UART_IRQ_T status;\n\n  lock = int_lock();\n  for (id = HAL_UART_ID_0; id < HAL_UART_ID_QTY; id++) {\n    if (recv_dma_chan[id] == chan) {\n      if (recv_dma_mode[id] == UART_RX_DMA_MODE_NORMAL) {\n        recv_dma_chan[id] = HAL_DMA_CHAN_NONE;\n      }\n      break;\n    }\n  }\n  int_unlock(lock);\n\n  if (id == HAL_UART_ID_QTY) {\n    return;\n  }\n\n  if (recv_dma_mode[id] == UART_RX_DMA_MODE_NORMAL) {\n    // Get remain xfer size\n    xfer = hal_gpdma_get_sg_remain_size(chan);\n\n    hal_gpdma_free_chan(chan);\n  } else {\n    xfer = 0;\n    status.reg = 0;\n  }\n\n  if (rxdma_handler[id]) {\n    if (recv_dma_mode[id] == UART_RX_DMA_MODE_NORMAL) {\n      // Already get xfer size\n      if (recv_dma_size[id] > xfer) {\n        xfer = recv_dma_size[id] - xfer;\n      } else {\n        xfer = 0;\n      }\n    } else if (recv_dma_mode[id] == UART_RX_DMA_MODE_PINGPANG) {\n      xfer = recv_dma_size[id] / 2;\n    }\n    rxdma_handler[id](xfer, error, status);\n  }\n}\n\nstatic void recv_dma_start_callback(uint8_t chan) {\n  enum HAL_UART_ID_T id;\n\n  for (id = HAL_UART_ID_0; id < HAL_UART_ID_QTY; id++) {\n    if (recv_dma_chan[id] == chan) {\n      break;\n    }\n  }\n\n  if (id == HAL_UART_ID_QTY) {\n    return;\n  }\n\n  uart[id].base->UARTIMSC = recv_mask[id].reg;\n}\n\nstatic int fill_buf_list_dma_desc(struct HAL_DMA_DESC_T *desc, uint32_t cnt,\n                                  struct HAL_DMA_CH_CFG_T *cfg,\n                                  const struct HAL_UART_BUF_T *ubuf,\n                                  uint32_t ucnt, uint32_t step) {\n  enum HAL_DMA_RET_T ret;\n  struct HAL_DMA_DESC_T *last_desc;\n  int tc_irq;\n  int i;\n  int u;\n  uint32_t remain;\n  uint32_t dlen;\n\n  last_desc = NULL;\n\n  u = 0;\n  remain = ubuf[0].len;\n\n  for (i = 0, u = 0; i < cnt - 1; i++) {\n    if (ubuf[u].loop_hdr && last_desc == NULL) {\n      last_desc = &desc[i];\n    }\n    if (remain <= step) {\n      dlen = remain;\n      tc_irq = ubuf[u].irq;\n    } else {\n      dlen = step;\n      tc_irq = 0;\n    }\n    cfg->src_tsize = dlen;\n    ret = hal_gpdma_init_desc(&desc[i], cfg, &desc[i + 1], tc_irq);\n    if (ret != HAL_DMA_OK) {\n      return 1;\n    }\n    remain -= dlen;\n    if (remain) {\n      cfg->dst += dlen;\n    } else {\n      u++;\n      if (u >= ucnt) {\n        return 2;\n      }\n      cfg->dst = (uint32_t)ubuf[u].buf;\n      remain = ubuf[u].len;\n    }\n  }\n\n  cfg->src_tsize = remain;\n  ret = hal_gpdma_init_desc(&desc[i], cfg, last_desc, ubuf[u].irq);\n  if (ret != HAL_DMA_OK) {\n    return 1;\n  }\n\n  return 0;\n}\n\nstatic int fill_dma_desc(struct HAL_DMA_DESC_T *desc, uint32_t cnt,\n                         struct HAL_DMA_CH_CFG_T *cfg, uint32_t len,\n                         enum UART_RX_DMA_MODE_T mode, uint32_t step) {\n  enum HAL_DMA_RET_T ret;\n  struct HAL_DMA_DESC_T *last_desc;\n  int tc_irq;\n  int i;\n\n  for (i = 0; i < cnt - 1; i++) {\n    cfg->src_tsize = step;\n    tc_irq = 0;\n    if (mode == UART_RX_DMA_MODE_PINGPANG) {\n      tc_irq = (i == cnt / 2 - 1) ? 1 : 0;\n    } else if (mode == UART_RX_DMA_MODE_STREAM) {\n      tc_irq = 1;\n    }\n    ret = hal_gpdma_init_desc(&desc[i], cfg, &desc[i + 1], tc_irq);\n    if (ret != HAL_DMA_OK) {\n      return 1;\n    }\n    cfg->dst += step;\n  }\n\n  cfg->src_tsize = len - (step * i);\n  last_desc = NULL;\n  if (mode == UART_RX_DMA_MODE_PINGPANG || mode == UART_RX_DMA_MODE_STREAM) {\n    last_desc = &desc[0];\n  }\n  ret = hal_gpdma_init_desc(&desc[i], cfg, last_desc, 1);\n  if (ret != HAL_DMA_OK) {\n    return 1;\n  }\n\n  return 0;\n}\n\nstatic int start_recv_dma_with_mask(enum HAL_UART_ID_T id,\n                                    const struct HAL_UART_BUF_T *ubuf,\n                                    uint32_t ucnt, struct HAL_DMA_DESC_T *desc,\n                                    uint32_t *desc_cnt,\n                                    const union HAL_UART_IRQ_T *mask,\n                                    enum UART_RX_DMA_MODE_T mode,\n                                    uint32_t step) {\n  uint8_t *buf;\n  uint32_t len;\n  struct HAL_DMA_CH_CFG_T dma_cfg;\n  enum HAL_DMA_RET_T ret;\n  uint32_t lock;\n  uint32_t cnt;\n  uint32_t i;\n  enum HAL_DMA_PERIPH_T periph;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  ASSERT(uart[id].irq != INVALID_IRQn, \"DMA not supported on UART %d\", id);\n  ASSERT((uart[id].base->UARTDMACR & UARTDMACR_RXDMAE),\n         \"DMA not configured on UART %d\", id);\n\n  if (ucnt == 0) {\n    return -21;\n  }\n  if (step > HAL_UART_DMA_TRANSFER_STEP || step == 0) {\n    return -22;\n  }\n\n  buf = ubuf[0].buf;\n  len = ubuf[0].len;\n\n  if (buf == NULL) {\n    return -23;\n  }\n  if (len == 0) {\n    return -24;\n  }\n\n  if (0) {\n  } else if (mode == UART_RX_DMA_MODE_NORMAL) {\n    cnt = (len + step - 1) / step;\n  } else if (mode == UART_RX_DMA_MODE_PINGPANG) {\n    cnt = ((len / 2 + step - 1) / step) * 2;\n    step = len / cnt;\n    if (len % cnt != 0) {\n      return -11;\n    }\n    if (step == 0) {\n      return -12;\n    }\n  } else if (mode == UART_RX_DMA_MODE_STREAM) {\n    cnt = (len + step - 1) / step;\n    if (cnt == 1) {\n      // cnt should >= 2\n      cnt++;\n    }\n    step = (len + cnt - 1) / cnt;\n    if (step == 0) {\n      return -13;\n    }\n  } else if (mode == UART_RX_DMA_MODE_BUF_LIST) {\n    cnt = 0;\n    for (i = 0; i < ucnt; i++) {\n      if (ubuf->buf == NULL) {\n        return -14;\n      }\n      if (ubuf->len == 0) {\n        return -15;\n      }\n      cnt += (ubuf->len + step - 1) / step;\n    }\n  } else {\n    return -10;\n  }\n\n  // Return the required DMA descriptor count\n  if (desc == NULL && desc_cnt) {\n    *desc_cnt = (cnt == 1) ? 0 : cnt;\n    return 0;\n  }\n\n  if (cnt > 1) {\n    if (desc == NULL || desc_cnt == NULL) {\n      return -1;\n    }\n    if (*desc_cnt < cnt) {\n      return -2;\n    }\n  }\n  if (desc_cnt) {\n    *desc_cnt = (cnt == 1) ? 0 : cnt;\n  }\n\n  periph = uart[id].rx_periph;\n\n  lock = int_lock();\n  if (recv_dma_chan[id] != HAL_DMA_CHAN_NONE) {\n    int_unlock(lock);\n    return 1;\n  }\n  recv_dma_chan[id] = hal_gpdma_get_chan(periph, HAL_DMA_HIGH_PRIO);\n  if (recv_dma_chan[id] == HAL_DMA_CHAN_NONE) {\n    int_unlock(lock);\n    return 2;\n  }\n  int_unlock(lock);\n\n  recv_dma_mode[id] = mode;\n  recv_dma_size[id] = len;\n\n  memset(&dma_cfg, 0, sizeof(dma_cfg));\n  dma_cfg.ch = recv_dma_chan[id];\n  dma_cfg.dst = (uint32_t)buf;\n  dma_cfg.dst_bsize = HAL_DMA_BSIZE_32;\n  dma_cfg.dst_periph = 0; // useless\n  dma_cfg.dst_width = HAL_DMA_WIDTH_BYTE;\n  dma_cfg.handler = recv_dma_irq_handler;\n  dma_cfg.src = 0; // useless\n  dma_cfg.src_bsize = HAL_DMA_BSIZE_8;\n  dma_cfg.src_periph = periph;\n  dma_cfg.src_tsize = len;\n  dma_cfg.src_width = HAL_DMA_WIDTH_BYTE;\n  dma_cfg.type = HAL_DMA_FLOW_P2M_DMA;\n  dma_cfg.try_burst = 0;\n\n  if (mask) {\n    recv_mask[id] = *mask;\n    dma_cfg.start_cb = recv_dma_start_callback;\n  } else {\n    union HAL_UART_IRQ_T irq_mask;\n\n    irq_mask.reg = uart[id].base->UARTIMSC;\n    ASSERT(irq_mask.RT == 0, err_recv_dma_api, __FUNCTION__);\n  }\n\n  // Activate DMA RT behaviour\n  lock = int_lock();\n  uart[id].base->UARTLCR_H |= UARTLCR_H_DMA_RT_EN;\n  int_unlock(lock);\n\n  if (cnt == 1) {\n    ret = hal_gpdma_start(&dma_cfg);\n  } else {\n    if (mode == UART_RX_DMA_MODE_BUF_LIST) {\n      ret = fill_buf_list_dma_desc(desc, cnt, &dma_cfg, ubuf, ucnt, step);\n    } else {\n      ret = fill_dma_desc(desc, cnt, &dma_cfg, len, mode, step);\n    }\n    if (ret) {\n      goto _err_exit;\n    }\n    ret = hal_gpdma_sg_start(desc, &dma_cfg);\n  }\n\n  if (ret != HAL_DMA_OK) {\n  _err_exit:\n    // Restore the traditional RT behaviour\n    lock = int_lock();\n    uart[id].base->UARTLCR_H &= ~UARTLCR_H_DMA_RT_EN;\n    int_unlock(lock);\n    hal_gpdma_free_chan(recv_dma_chan[id]);\n    recv_dma_chan[id] = HAL_DMA_CHAN_NONE;\n    return 3;\n  }\n\n  return 0;\n}\n\n// Safe API to trigger receive timeout IRQ and DMA IRQ\nint hal_uart_dma_recv_mask(enum HAL_UART_ID_T id, uint8_t *buf, uint32_t len,\n                           struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt,\n                           const union HAL_UART_IRQ_T *mask) {\n  struct HAL_UART_BUF_T uart_buf;\n\n  uart_buf.buf = buf;\n  uart_buf.len = len;\n  uart_buf.irq = false;\n  uart_buf.loop_hdr = false;\n  return start_recv_dma_with_mask(id, &uart_buf, 1, desc, desc_cnt, mask,\n                                  UART_RX_DMA_MODE_NORMAL,\n                                  HAL_UART_DMA_TRANSFER_STEP);\n}\n\n// Safe API to trigger receive timeout IRQ and DMA IRQ\nint hal_uart_dma_recv_mask_pingpang(enum HAL_UART_ID_T id, uint8_t *buf,\n                                    uint32_t len, struct HAL_DMA_DESC_T *desc,\n                                    uint32_t *desc_cnt,\n                                    const union HAL_UART_IRQ_T *mask,\n                                    uint32_t step) {\n  struct HAL_UART_BUF_T uart_buf;\n\n  uart_buf.buf = buf;\n  uart_buf.len = len;\n  uart_buf.irq = false;\n  uart_buf.loop_hdr = false;\n  return start_recv_dma_with_mask(id, &uart_buf, 1, desc, desc_cnt, mask,\n                                  UART_RX_DMA_MODE_PINGPANG, step);\n}\n\n// Safe API to trigger receive timeout IRQ and DMA IRQ\nint hal_uart_dma_recv_mask_stream(enum HAL_UART_ID_T id, uint8_t *buf,\n                                  uint32_t len, struct HAL_DMA_DESC_T *desc,\n                                  uint32_t *desc_cnt,\n                                  const union HAL_UART_IRQ_T *mask,\n                                  uint32_t step) {\n  struct HAL_UART_BUF_T uart_buf;\n\n  uart_buf.buf = buf;\n  uart_buf.len = len;\n  uart_buf.irq = false;\n  uart_buf.loop_hdr = false;\n  return start_recv_dma_with_mask(id, &uart_buf, 1, desc, desc_cnt, mask,\n                                  UART_RX_DMA_MODE_STREAM, step);\n}\n\n// Safe API to trigger receive timeout IRQ and DMA IRQ\nint hal_uart_dma_recv_mask_buf_list(enum HAL_UART_ID_T id,\n                                    const struct HAL_UART_BUF_T *ubuf,\n                                    uint32_t ucnt, struct HAL_DMA_DESC_T *desc,\n                                    uint32_t *desc_cnt,\n                                    const union HAL_UART_IRQ_T *mask) {\n  return start_recv_dma_with_mask(id, ubuf, ucnt, desc, desc_cnt, mask,\n                                  UART_RX_DMA_MODE_BUF_LIST,\n                                  HAL_UART_DMA_TRANSFER_STEP);\n}\n\nint hal_uart_dma_recv(enum HAL_UART_ID_T id, uint8_t *buf, uint32_t len,\n                      struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt) {\n  struct HAL_UART_BUF_T uart_buf;\n\n  uart_buf.buf = buf;\n  uart_buf.len = len;\n  uart_buf.irq = false;\n  uart_buf.loop_hdr = false;\n  return start_recv_dma_with_mask(id, &uart_buf, 1, desc, desc_cnt, NULL,\n                                  UART_RX_DMA_MODE_NORMAL,\n                                  HAL_UART_DMA_TRANSFER_STEP);\n}\n\nint hal_uart_dma_recv_pingpang(enum HAL_UART_ID_T id, uint8_t *buf,\n                               uint32_t len, struct HAL_DMA_DESC_T *desc,\n                               uint32_t *desc_cnt) {\n  struct HAL_UART_BUF_T uart_buf;\n\n  uart_buf.buf = buf;\n  uart_buf.len = len;\n  uart_buf.irq = false;\n  uart_buf.loop_hdr = false;\n  return start_recv_dma_with_mask(id, &uart_buf, 1, desc, desc_cnt, NULL,\n                                  UART_RX_DMA_MODE_PINGPANG,\n                                  HAL_UART_DMA_TRANSFER_STEP_PINGPANG);\n}\n\nuint32_t hal_uart_get_dma_recv_addr(enum HAL_UART_ID_T id) {\n  uint32_t lock;\n  uint32_t addr;\n  int i;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n\n  addr = 0;\n\n  lock = int_lock();\n  if (recv_dma_chan[id] != HAL_DMA_CHAN_NONE) {\n    for (i = 0; i < 2; i++) {\n      addr = hal_dma_get_cur_dst_addr(recv_dma_chan[id]);\n      if (addr) {\n        break;\n      }\n    }\n  }\n  int_unlock(lock);\n\n  return addr;\n}\n\nuint32_t hal_uart_stop_dma_recv(enum HAL_UART_ID_T id) {\n  uint32_t remains;\n  uint32_t lock;\n  uint8_t chan;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n\n  lock = int_lock();\n  chan = recv_dma_chan[id];\n  recv_dma_chan[id] = HAL_DMA_CHAN_NONE;\n  // Restore the traditional RT behaviour\n  uart[id].base->UARTLCR_H &= ~UARTLCR_H_DMA_RT_EN;\n  int_unlock(lock);\n\n  if (chan == HAL_DMA_CHAN_NONE) {\n    return 0;\n  }\n\n  // Save the data in DMA FIFO\n  hal_gpdma_stop(chan);\n  remains = hal_gpdma_get_sg_remain_size(chan);\n  hal_gpdma_free_chan(chan);\n\n  return remains;\n}\n\nstatic void send_dma_irq_handler(uint8_t chan, uint32_t remain_tsize,\n                                 uint32_t error, struct HAL_DMA_DESC_T *lli) {\n  enum HAL_UART_ID_T id;\n  uint32_t xfer;\n  uint32_t lock;\n\n  lock = int_lock();\n  for (id = HAL_UART_ID_0; id < HAL_UART_ID_QTY; id++) {\n    if (send_dma_chan[id] == chan) {\n      send_dma_chan[id] = HAL_DMA_CHAN_NONE;\n      break;\n    }\n  }\n  int_unlock(lock);\n\n  if (id == HAL_UART_ID_QTY) {\n    return;\n  }\n\n  // Get remain xfer size\n  xfer = hal_gpdma_get_sg_remain_size(chan);\n\n  hal_gpdma_free_chan(chan);\n\n  if (txdma_handler[id]) {\n    // Get already xfer size\n    if (send_dma_size[id] > xfer) {\n      xfer = send_dma_size[id] - xfer;\n    } else {\n      xfer = 0;\n    }\n    txdma_handler[id](xfer, error);\n  }\n}\n\nint hal_uart_dma_send(enum HAL_UART_ID_T id, const uint8_t *buf, uint32_t len,\n                      struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt) {\n  struct HAL_DMA_CH_CFG_T dma_cfg;\n  enum HAL_DMA_RET_T ret;\n  uint32_t lock;\n  uint32_t cnt;\n  uint32_t i;\n  enum HAL_DMA_PERIPH_T periph;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n  ASSERT(uart[id].irq != INVALID_IRQn, \"DMA not supported on UART %d\", id);\n  ASSERT((uart[id].base->UARTDMACR & UARTDMACR_TXDMAE),\n         \"DMA not configured on UART %d\", id);\n\n  cnt = (len + HAL_UART_DMA_TRANSFER_STEP - 1) / HAL_UART_DMA_TRANSFER_STEP;\n\n  // Return the required DMA descriptor count\n  if (desc == NULL && desc_cnt) {\n    *desc_cnt = (cnt == 1) ? 0 : cnt;\n    return 0;\n  }\n\n  if (cnt == 0) {\n    return 0;\n  }\n  if (cnt > 1) {\n    if (desc == NULL || desc_cnt == NULL) {\n      return -1;\n    }\n    if (*desc_cnt < cnt) {\n      return -2;\n    }\n  }\n  if (desc_cnt) {\n    *desc_cnt = (cnt == 1) ? 0 : cnt;\n  }\n\n  periph = uart[id].tx_periph;\n\n  lock = int_lock();\n  if (send_dma_chan[id] != HAL_DMA_CHAN_NONE) {\n    int_unlock(lock);\n    return 1;\n  }\n  send_dma_chan[id] = hal_gpdma_get_chan(periph, HAL_DMA_HIGH_PRIO);\n  if (send_dma_chan[id] == HAL_DMA_CHAN_NONE) {\n    int_unlock(lock);\n    return 2;\n  }\n  int_unlock(lock);\n\n  send_dma_size[id] = len;\n\n  memset(&dma_cfg, 0, sizeof(dma_cfg));\n  dma_cfg.ch = send_dma_chan[id];\n  dma_cfg.dst = 0; // useless\n  dma_cfg.dst_bsize = HAL_DMA_BSIZE_8;\n  dma_cfg.dst_periph = periph;\n  dma_cfg.dst_width = HAL_DMA_WIDTH_BYTE;\n  dma_cfg.handler = send_dma_irq_handler;\n  dma_cfg.src = (uint32_t)buf;\n  dma_cfg.src_bsize = HAL_DMA_BSIZE_32;\n  dma_cfg.src_periph = 0; // useless\n  dma_cfg.src_tsize = len;\n  dma_cfg.src_width = HAL_DMA_WIDTH_BYTE;\n  dma_cfg.type = HAL_DMA_FLOW_M2P_DMA;\n  dma_cfg.try_burst = 0;\n\n  if (cnt == 1) {\n    ret = hal_gpdma_start(&dma_cfg);\n  } else {\n    for (i = 0; i < cnt - 1; i++) {\n      dma_cfg.src_tsize = HAL_UART_DMA_TRANSFER_STEP;\n      ret = hal_gpdma_init_desc(&desc[i], &dma_cfg, &desc[i + 1], 0);\n      if (ret != HAL_DMA_OK) {\n        goto _err_exit;\n      }\n      dma_cfg.src += HAL_UART_DMA_TRANSFER_STEP;\n    }\n    dma_cfg.src_tsize = len - (HAL_UART_DMA_TRANSFER_STEP * i);\n    ret = hal_gpdma_init_desc(&desc[i], &dma_cfg, NULL, 1);\n    if (ret != HAL_DMA_OK) {\n      goto _err_exit;\n    }\n    ret = hal_gpdma_sg_start(desc, &dma_cfg);\n  }\n\n  if (ret != HAL_DMA_OK) {\n  _err_exit:\n    hal_gpdma_free_chan(send_dma_chan[id]);\n    send_dma_chan[id] = HAL_DMA_CHAN_NONE;\n    return 3;\n  }\n\n  return 0;\n}\n\nuint32_t hal_uart_stop_dma_send(enum HAL_UART_ID_T id) {\n  uint32_t remains;\n  uint32_t lock;\n  uint8_t chan;\n\n  ASSERT(id < HAL_UART_ID_QTY, err_invalid_id, id);\n\n  lock = int_lock();\n  chan = send_dma_chan[id];\n  send_dma_chan[id] = HAL_DMA_CHAN_NONE;\n  int_unlock(lock);\n\n  if (chan == HAL_DMA_CHAN_NONE) {\n    return 0;\n  }\n\n  // Not to keep the data in DMA FIFO\n  hal_gpdma_cancel(chan);\n  remains = hal_gpdma_get_sg_remain_size(chan);\n  hal_gpdma_free_chan(chan);\n\n  return remains;\n}\n\nstatic void hal_uart_irq_handler(void) {\n  enum HAL_UART_ID_T id;\n  union HAL_UART_IRQ_T state;\n\n  for (id = HAL_UART_ID_0; id < HAL_UART_ID_QTY; id++) {\n    state.reg = uart[id].base->UARTMIS;\n\n    if (state.reg) {\n      uart[id].base->UARTICR = state.reg;\n\n      if (irq_handler[id] != NULL) {\n        irq_handler[id](id, state);\n      }\n    }\n  }\n}\n\n// ========================================================================\n// Test function\n\n#include \"stdarg.h\"\n#include \"stdio.h\"\n\n#if !defined(DEBUG_PORT) || (DEBUG_PORT == 1)\n#define UART_PRINTF_ID HAL_UART_ID_0\n#else\n#define UART_PRINTF_ID HAL_UART_ID_1\n#endif\n\n#ifndef TRACE_BAUD_RATE\n#define TRACE_BAUD_RATE (921600)\n#endif\n\nint hal_uart_printf_init(void) {\n  static const struct HAL_UART_CFG_T uart_cfg = {\n      .parity = HAL_UART_PARITY_NONE,\n      .stop = HAL_UART_STOP_BITS_1,\n      .data = HAL_UART_DATA_BITS_8,\n      .flow = HAL_UART_FLOW_CONTROL_NONE, // HAL_UART_FLOW_CONTROL_RTSCTS,\n      .tx_level = HAL_UART_FIFO_LEVEL_1_2,\n      .rx_level = HAL_UART_FIFO_LEVEL_1_4,\n      .baud = TRACE_BAUD_RATE,\n      .dma_rx = false,\n      .dma_tx = false,\n      .dma_rx_stop_on_err = false,\n  };\n\n  if (UART_PRINTF_ID == HAL_UART_ID_0) {\n    hal_iomux_set_uart0();\n  } else {\n    hal_iomux_set_uart1();\n  }\n\n  return hal_uart_open(UART_PRINTF_ID, &uart_cfg);\n}\n\nvoid hal_uart_printf(const char *fmt, ...) {\n  char buf[200];\n  int ret;\n  int i;\n  va_list ap;\n\n  va_start(ap, fmt);\n  ret = vsnprintf(buf, sizeof(buf), fmt, ap);\n#ifdef TRACE_CRLF\n  if (ret + 2 < sizeof(buf)) {\n    buf[ret++] = '\\r';\n  }\n#endif\n  if (ret + 1 < sizeof(buf)) {\n    buf[ret++] = '\\n';\n  }\n  // buf[ret] = 0;\n  va_end(ap);\n\n  if (ret > 0) {\n    for (i = 0; i < ret; i++) {\n      hal_uart_blocked_putc(UART_PRINTF_ID, buf[i]);\n    }\n  }\n}\n\n#endif // CHIP_HAS_UART\n"
  },
  {
    "path": "platform/hal/hal_uart.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HAL_UART_H__\n#define __HAL_UART_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef CHIP_HAS_UART\n\n#include \"plat_types.h\"\n#include \"stdbool.h\"\n#include \"stdint.h\"\n#include \"hal_dma.h\"\n\n//#define BT_UART\n\n#define HAL_UART_DMA_TRANSFER_STEP                  0xFFF\n#ifdef __KNOWLES\n#define HAL_UART_DMA_TRANSFER_STEP_PINGPANG         640\n#else\n#define HAL_UART_DMA_TRANSFER_STEP_PINGPANG         4\n#endif\n\nenum HAL_UART_ID_T {\n    HAL_UART_ID_0 = 0,\n#if (CHIP_HAS_UART > 1)\n    HAL_UART_ID_1,\n#endif\n#if (CHIP_HAS_UART > 2)\n    HAL_UART_ID_2,\n#endif\n#ifdef BT_UART\n    HAL_UART_ID_BT,\n#endif\n\n    HAL_UART_ID_QTY\n};\n\nenum HAL_UART_PARITY_T {\n    HAL_UART_PARITY_NONE,\n    HAL_UART_PARITY_ODD,\n    HAL_UART_PARITY_EVEN,\n    HAL_UART_PARITY_FORCE1,\n    HAL_UART_PARITY_FORCE0,\n};\n\nenum HAL_UART_STOP_BITS_T {\n    HAL_UART_STOP_BITS_1,\n    HAL_UART_STOP_BITS_2,\n};\n\nenum HAL_UART_DATA_BITS_T {\n    HAL_UART_DATA_BITS_5,\n    HAL_UART_DATA_BITS_6,\n    HAL_UART_DATA_BITS_7,\n    HAL_UART_DATA_BITS_8,\n};\n\nenum HAL_UART_FLOW_CONTROL_T {\n    HAL_UART_FLOW_CONTROL_NONE,\n    HAL_UART_FLOW_CONTROL_RTS,\n    HAL_UART_FLOW_CONTROL_CTS,\n    HAL_UART_FLOW_CONTROL_RTSCTS,\n};\n\nenum HAL_UART_FIFO_LEVEL_T {\n    HAL_UART_FIFO_LEVEL_1_8,\n    HAL_UART_FIFO_LEVEL_1_4,\n    HAL_UART_FIFO_LEVEL_1_2,\n    HAL_UART_FIFO_LEVEL_3_4,\n    HAL_UART_FIFO_LEVEL_7_8,\n};\n\nstruct HAL_UART_CFG_T {\n    enum HAL_UART_PARITY_T parity;\n    enum HAL_UART_STOP_BITS_T stop;\n    enum HAL_UART_DATA_BITS_T data;\n    enum HAL_UART_FLOW_CONTROL_T flow;\n    enum HAL_UART_FIFO_LEVEL_T rx_level;\n    enum HAL_UART_FIFO_LEVEL_T tx_level;\n    uint32_t baud;\n    bool dma_rx : 1;\n    bool dma_tx : 1;\n    bool dma_rx_stop_on_err : 1;\n};\n\nstruct HAL_UART_BUF_T {\n    uint8_t *buf;\n    uint32_t len;\n    bool irq;\n    bool loop_hdr;\n};\n\nunion HAL_UART_STATUS_T {\n    struct {\n        uint32_t FE   :1; // frame error\n        uint32_t PE   :1; // parity error\n        uint32_t BE   :1; // break error\n        uint32_t OE   :1; // overrun error\n    };\n    uint32_t reg;\n};\n\nunion HAL_UART_FLAG_T {\n    struct {\n        uint32_t CTS  :1;\n        uint32_t DSR  :1;\n        uint32_t DCD  :1;\n        uint32_t BUSY :1;\n        uint32_t RXFE :1; // rx fifo empty\n        uint32_t TXFF :1; // tx fifo full\n        uint32_t RXFF :1; // rx fifo full\n        uint32_t TXFE :1; // tx fifo empty\n        uint32_t RI   :1; // ring indicator\n    };\n    uint32_t reg;\n};\n\nunion HAL_UART_IRQ_T {\n    struct {\n        uint32_t RIM  :1; // ri\n        uint32_t CTSM :1; // cts\n        uint32_t DCDM :1; // dcd\n        uint32_t DSRM :1; // dsr\n        uint32_t RX   :1; // rx\n        uint32_t TX   :1; // tx\n        uint32_t RT   :1; // receive timeout\n        uint32_t FE   :1; // framing error\n        uint32_t PE   :1; // parity error\n        uint32_t BE   :1; // break error\n        uint32_t OE   :1; // overrun\n    };\n    uint32_t reg;\n};\n\ntypedef void (*HAL_UART_IRQ_HANDLER_T)(enum HAL_UART_ID_T id, union HAL_UART_IRQ_T status);\n\ntypedef void (*HAL_UART_IRQ_RXDMA_HANDLER_T)(uint32_t xfer_size, int dma_error, union HAL_UART_IRQ_T status);\n\ntypedef void (*HAL_UART_IRQ_TXDMA_HANDLER_T)(uint32_t xfer_size, int dma_error);\n\nint hal_uart_open(enum HAL_UART_ID_T id, const struct HAL_UART_CFG_T *cfg);\n\nint hal_uart_reopen(enum HAL_UART_ID_T id, const struct HAL_UART_CFG_T *cfg);\n\nint hal_uart_close(enum HAL_UART_ID_T id);\n\nint hal_uart_opened(enum HAL_UART_ID_T id);\n\nint hal_uart_change_baud_rate(enum HAL_UART_ID_T id, uint32_t rate);\n\nint hal_uart_pause(enum HAL_UART_ID_T id);\n\nint hal_uart_continue(enum HAL_UART_ID_T id);\n\nint hal_uart_readable(enum HAL_UART_ID_T id);\n\nint hal_uart_writable(enum HAL_UART_ID_T id);\n\nuint8_t hal_uart_getc(enum HAL_UART_ID_T id);\n\nint hal_uart_putc(enum HAL_UART_ID_T id, uint8_t c);\n\nuint8_t hal_uart_blocked_getc(enum HAL_UART_ID_T id);\n\nint hal_uart_blocked_putc(enum HAL_UART_ID_T id, uint8_t c);\n\nunion HAL_UART_FLAG_T hal_uart_get_flag(enum HAL_UART_ID_T id);\n\nunion HAL_UART_STATUS_T hal_uart_get_status(enum HAL_UART_ID_T id);\n\nvoid hal_uart_clear_status(enum HAL_UART_ID_T id);\n\nvoid hal_uart_break_set(enum HAL_UART_ID_T id);\n\nvoid hal_uart_break_clear(enum HAL_UART_ID_T id);\n\nvoid hal_uart_flush(enum HAL_UART_ID_T id, uint32_t ticks);\n\nunion HAL_UART_IRQ_T hal_uart_get_raw_irq(enum HAL_UART_ID_T id);\n\nvoid hal_uart_clear_irq(enum HAL_UART_ID_T id, union HAL_UART_IRQ_T irq);\n\nunion HAL_UART_IRQ_T hal_uart_irq_get_mask(enum HAL_UART_ID_T id);\n\nunion HAL_UART_IRQ_T hal_uart_irq_set_mask(enum HAL_UART_ID_T id, union HAL_UART_IRQ_T mask);\n\nHAL_UART_IRQ_HANDLER_T hal_uart_irq_set_handler(enum HAL_UART_ID_T id, HAL_UART_IRQ_HANDLER_T handler);\n\nvoid hal_uart_irq_set_dma_handler(enum HAL_UART_ID_T id, HAL_UART_IRQ_RXDMA_HANDLER_T rxdma, HAL_UART_IRQ_TXDMA_HANDLER_T txdma);\n\nint hal_uart_dma_recv(enum HAL_UART_ID_T id, uint8_t *buf, uint32_t len,\n                      struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt);\n\nint hal_uart_dma_recv_pingpang(enum HAL_UART_ID_T id, uint8_t *buf, uint32_t len,\n                      struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt);\n\n\nint hal_uart_dma_recv_mask(enum HAL_UART_ID_T id, uint8_t *buf, uint32_t len,\n                           struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt,\n                           const union HAL_UART_IRQ_T *mask);\n\nint hal_uart_dma_recv_mask_pingpang(enum HAL_UART_ID_T id, uint8_t *buf, uint32_t len,\n                                    struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt,\n                                    const union HAL_UART_IRQ_T *mask, uint32_t step);\n\nint hal_uart_dma_recv_mask_stream(enum HAL_UART_ID_T id, uint8_t *buf, uint32_t len,\n                                  struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt,\n                                  const union HAL_UART_IRQ_T *mask, uint32_t step);\n\nint hal_uart_dma_recv_mask_buf_list(enum HAL_UART_ID_T id, const struct HAL_UART_BUF_T *ubuf, uint32_t ucnt,\n                                    struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt, const union HAL_UART_IRQ_T *mask);\n\nuint32_t hal_uart_get_dma_recv_addr(enum HAL_UART_ID_T id);\n\nuint32_t hal_uart_stop_dma_recv(enum HAL_UART_ID_T id);\n\nint hal_uart_dma_send(enum HAL_UART_ID_T id, const uint8_t *buf, uint32_t len,\n                      struct HAL_DMA_DESC_T *desc, uint32_t *desc_cnt);\n\nuint32_t hal_uart_stop_dma_send(enum HAL_UART_ID_T id);\n\n\n// ========================================================================\n// Test function\n\nint hal_uart_printf_init(void);\n\nvoid hal_uart_printf(const char *fmt, ...);\n\n#endif // CHIP_HAS_UART\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/hal_wdt.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_wdt.h\"\n#include \"cmsis.h\"\n#include \"cmsis_nvic.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"plat_addr_map.h\"\n#include \"plat_types.h\"\n\n#if defined(CHIP_BEST3001) || defined(CHIP_BEST3003) ||                        \\\n    defined(CHIP_BEST3005) || defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n#define CLOCK_SYNC_WORKAROUND\n#endif\n\n#define SLOW_TIMER_VAL_DELTA 1\n#define FAST_TIMER_VAL_DELTA 20\n\n/* wdt controller */\n/* reg address */\n/* default timeout in seconds */\n#define DEFAULT_TIMEOUT 60\n\n#define WDT_RATE CONFIG_SYSTICK_HZ\n\n/* watchdog register offsets and masks */\n#define WDTLOAD_REG_OFFSET 0x000\n#define WDTLOAD_LOAD_MIN 0x00000001\n#define WDTLOAD_LOAD_MAX 0xFFFFFFFF\n\n#define WDTVALUE_REG_OFFSET 0x004\n\n#define WDTCONTROL_REG_OFFSET 0x008\n#define WDTCONTROL_REG_INT_ENABLE (1 << 0)\n#define WDTCONTROL_REG_RESET_ENABLE (1 << 1)\n\n#define WDTINTCLR_REG_OFFSET 0x00C\n\n#define WDTRIS_REG_OFFSET 0x010\n#define WDTRIS_REG_INT_MASK (1 << 0)\n\n#define WDTMIS_REG_OFFSET 0x014\n#define WDTMIS_REG_INT_MASK (1 << 0)\n\n#define WDTLOCK_REG_OFFSET 0xC00\n#define WDTLOCK_REG_UNLOCK 0x1ACCE551\n#define WDTLOCK_REG_LOCK 0x00000001\n\n/* read write */\n#define wdtip_write32(v, b, a) (*((volatile unsigned int *)(b + a)) = v)\n#define wdtip_read32(b, a) (*((volatile unsigned int *)(b + a)))\n\n#if 1\ntypedef void (*HAL_WDT_IRQ_HANDLER)(void);\n\nstruct HAL_WDT_CTX {\n  unsigned int load_val;\n};\n\nstruct HAL_WDT_CTX hal_wdt_ctx[HAL_WDT_ID_NUM];\nstatic void _wdt1_irq_handler(void);\nHAL_WDT_IRQ_HANDLER hal_wdt_irq_handler[HAL_WDT_ID_NUM] = {\n    _wdt1_irq_handler,\n};\nHAL_WDT_IRQ_CALLBACK hal_wdt_irq_callback[HAL_WDT_ID_NUM];\n\nstatic void _wdt1_irq_handler(void) {\n  if (hal_wdt_irq_callback[HAL_WDT_ID_0] != 0) {\n    hal_wdt_irq_callback[HAL_WDT_ID_0](HAL_WDT_ID_0, HAL_WDT_EVENT_FIRE);\n  }\n}\n\nstatic unsigned int _wdt_get_base(enum HAL_WDT_ID_T id) {\n  switch (id) {\n  default:\n  case HAL_WDT_ID_0:\n    return WDT_BASE;\n    break;\n  }\n\n  return 0;\n}\n\nstatic void _wdt_load(enum HAL_WDT_ID_T id) {\n  unsigned int reg_base = 0;\n  struct HAL_WDT_CTX *wdt = &hal_wdt_ctx[id];\n  uint32_t lock;\n\n  reg_base = _wdt_get_base(id);\n\n  lock = int_lock();\n\n  wdtip_write32(WDTLOCK_REG_UNLOCK, reg_base, WDTLOCK_REG_OFFSET);\n\n#ifdef CLOCK_SYNC_WORKAROUND\n  uint32_t val;\n\n  do {\n    wdtip_write32(wdt->load_val, reg_base, WDTLOAD_REG_OFFSET);\n    val = wdtip_read32(reg_base, WDTVALUE_REG_OFFSET);\n  } while ((wdt->load_val < val) ||\n           (wdt->load_val > val + SLOW_TIMER_VAL_DELTA));\n#else\n  wdtip_write32(wdt->load_val, reg_base, WDTLOAD_REG_OFFSET);\n#endif\n\n  wdtip_write32(WDTLOCK_REG_LOCK, reg_base, WDTLOCK_REG_OFFSET);\n\n  int_unlock(lock);\n\n  /* Flush posted writes. */\n  wdtip_read32(reg_base, WDTLOCK_REG_OFFSET);\n}\n\nstatic void _wdt_config(enum HAL_WDT_ID_T id) {\n  unsigned int reg_base = 0;\n  uint32_t lock;\n\n  reg_base = _wdt_get_base(id);\n\n  lock = int_lock();\n  wdtip_write32(WDTLOCK_REG_UNLOCK, reg_base, WDTLOCK_REG_OFFSET);\n  wdtip_write32(WDTRIS_REG_INT_MASK, reg_base, WDTINTCLR_REG_OFFSET);\n  wdtip_write32(WDTCONTROL_REG_INT_ENABLE | WDTCONTROL_REG_RESET_ENABLE,\n                reg_base, WDTCONTROL_REG_OFFSET);\n  wdtip_write32(WDTLOCK_REG_LOCK, reg_base, WDTLOCK_REG_OFFSET);\n  int_unlock(lock);\n\n  /* Flush posted writes. */\n  wdtip_read32(reg_base, WDTLOCK_REG_OFFSET);\n}\n\nstatic int wdt_start;\n\n/* mandatory operations */\nint hal_wdt_start(enum HAL_WDT_ID_T id) {\n  _wdt_load(id);\n  _wdt_config(id);\n  wdt_start = 1;\n  return 0;\n}\nint hal_wdt_stop(enum HAL_WDT_ID_T id) {\n  unsigned int reg_base = 0;\n  uint32_t lock;\n\n  reg_base = _wdt_get_base(id);\n\n  lock = int_lock();\n  wdtip_write32(WDTLOCK_REG_UNLOCK, reg_base, WDTLOCK_REG_OFFSET);\n  wdtip_write32(0, reg_base, WDTCONTROL_REG_OFFSET);\n  wdtip_write32(WDTLOCK_REG_LOCK, reg_base, WDTLOCK_REG_OFFSET);\n  int_unlock(lock);\n\n  /* Flush posted writes. */\n  wdtip_read32(reg_base, WDTLOCK_REG_OFFSET);\n\n  wdt_start = 0;\n  return 0;\n}\n\n/* optional operations */\nint hal_wdt_ping(enum HAL_WDT_ID_T id) {\n  if (wdt_start) {\n    _wdt_load(id);\n  }\n\n  return 0;\n}\nint hal_wdt_set_timeout(enum HAL_WDT_ID_T id, unsigned int timeout) {\n  uint64_t load;\n  struct HAL_WDT_CTX *wdt = &hal_wdt_ctx[id];\n\n  /*\n   * sp805 runs counter with given value twice, after the end of first\n   * counter it gives an interrupt and then starts counter again. If\n   * interrupt already occurred then it resets the system. This is why\n   * load is half of what should be required.\n   */\n  load = WDT_RATE * timeout - 1;\n\n  load = (load > WDTLOAD_LOAD_MAX) ? WDTLOAD_LOAD_MAX : load;\n  load = (load < WDTLOAD_LOAD_MIN) ? WDTLOAD_LOAD_MIN : load;\n\n  wdt->load_val = load;\n\n  return 0;\n}\nunsigned int hal_wdt_get_timeleft(enum HAL_WDT_ID_T id) {\n  uint64_t load;\n  unsigned int reg_base = 0;\n  struct HAL_WDT_CTX *wdt = &hal_wdt_ctx[id];\n\n  reg_base = _wdt_get_base(id);\n\n  load = wdtip_read32(reg_base, WDTVALUE_REG_OFFSET);\n\n  /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */\n  if (!(wdtip_read32(reg_base, WDTRIS_REG_OFFSET) & WDTRIS_REG_INT_MASK))\n    load += wdt->load_val + 1;\n\n  return load / WDT_RATE;\n}\n\nvoid hal_wdt_set_irq_callback(enum HAL_WDT_ID_T id, HAL_WDT_IRQ_CALLBACK cb) {\n  switch (id) {\n  default:\n  case HAL_WDT_ID_0:\n    NVIC_SetVector(WDT_IRQn, (uint32_t)hal_wdt_irq_handler[id]);\n    NVIC_SetPriority(WDT_IRQn, IRQ_PRIORITY_NORMAL);\n    NVIC_ClearPendingIRQ(WDT_IRQn);\n    NVIC_EnableIRQ(WDT_IRQn);\n    break;\n  }\n\n  hal_wdt_irq_callback[id] = cb;\n}\n\n#endif\n"
  },
  {
    "path": "platform/hal/hal_wdt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef WDT_HAL_H\n#define WDT_HAL_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\nenum HAL_WDT_ID_T {\n    HAL_WDT_ID_0 = 0,\n    HAL_WDT_ID_NUM,\n};\n\nenum HAL_WDT_EVENT_T {\n    HAL_WDT_EVENT_FIRE = 0,\n};\n\n#define HAL_WDT_YES 1\n#define HAL_WDT_NO 0\n\ntypedef void (*HAL_WDT_IRQ_CALLBACK)(enum HAL_WDT_ID_T id, uint32_t status);\n/* hal api */\nvoid hal_wdt_set_irq_callback(enum HAL_WDT_ID_T id, HAL_WDT_IRQ_CALLBACK handler);\n\n/* mandatory operations */\nint hal_wdt_start(enum HAL_WDT_ID_T id);\nint hal_wdt_stop(enum HAL_WDT_ID_T id);\n\n/* optional operations */\nint hal_wdt_ping(enum HAL_WDT_ID_T id);\nint hal_wdt_set_timeout(enum HAL_WDT_ID_T id, unsigned int);\nunsigned int hal_wdt_get_timeleft(enum HAL_WDT_ID_T id);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* WDT_HAL_H */\n"
  },
  {
    "path": "platform/hal/plat_addr_map.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PLAT_ADDR_MAP_H__\n#define __PLAT_ADDR_MAP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#if 0\n#elif defined(CHIP_BEST1000)\n#define CHIP_ID_LITERAL                         best1000\n#elif defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n#define CHIP_ID_LITERAL                         best1400\n#elif defined(CHIP_BEST2000)\n#define CHIP_ID_LITERAL                         best2000\n#elif defined(CHIP_BEST2001)\n#define CHIP_ID_LITERAL                         best2001\n#elif defined(CHIP_BEST2300)\n#define CHIP_ID_LITERAL                         best2300\n#elif defined(CHIP_BEST2300A)\n#define CHIP_ID_LITERAL                         best2300a\n#elif defined(CHIP_BEST2300P)\n#define CHIP_ID_LITERAL                         best2300p\n#elif defined(CHIP_BEST3001) || defined(CHIP_BEST3005)\n#define CHIP_ID_LITERAL                         best3001\n#elif defined(CHIP_BEST3003)\n#define CHIP_ID_LITERAL                         best3003\n#else\n#error \"Unknown chip ID\"\n#endif\n\n#define _TO_STRING_A(s)                         # s\n#define _TO_STRING(s)                           _TO_STRING_A(s)\n\n#define CONCAT_NAME_A(a, b)                     a ## b\n#define CONCAT_NAME(a, b)                       CONCAT_NAME_A(a, b)\n#define CONCAT_SUFFIX(a, b)                     a.b\n\n#define CONSTRUCT_HDR_NAME_A(d, n)              d/n ## _ ## d\n#define CONSTRUCT_HDR_NAME(d, n)                CONSTRUCT_HDR_NAME_A(d, n)\n#define CHIP_SPECIFIC_HDR(n)                    _TO_STRING(CONSTRUCT_HDR_NAME(CHIP_ID_LITERAL, n).h)\n\n#include CHIP_SPECIFIC_HDR(plat_addr_map)\n\n#define RAM_TO_RAMX(d)                          ((d) - RAM_BASE + RAMX_BASE)\n#define RAMX_TO_RAM(d)                          ((d) - RAMX_BASE + RAM_BASE)\n\n#define FLASH_TO_FLASHX(d)                      ((d) - FLASH_BASE + FLASHX_BASE)\n#define FLASHX_TO_FLASH(d)                      ((d) - FLASHX_BASE + FLASH_BASE)\n\n#define FLASH_C_TO_NC(d)                        ((d) - FLASH_BASE + FLASH_NC_BASE)\n#define FLASH_NC_TO_C(d)                        ((d) - FLASH_NC_BASE + FLASH_BASE)\n\n#define PSRAM_TO_PSRAMX(d)                      ((d) - PSRAM_BASE + PSRAMX_BASE)\n#define PSRAMX_TO_PSRAM(d)                      ((d) - PSRAMX_BASE + PSRAM_BASE)\n\n#define PSRAM_C_TO_NC(d)                        ((d) - PSRAM_BASE + PSRAM_NC_BASE)\n#define PSRAM_NC_TO_C(d)                        ((d) - PSRAM_NC_BASE + PSRAM_BASE)\n\n#define BUILD_INFO_MAGIC                        0xBE57341D\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "platform/hal/plat_types.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PLAT_TYPES_H__\n#define __PLAT_TYPES_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stddef.h\"\n#include \"stdint.h\"\n#include \"stdbool.h\"\n\n#ifndef __uint32_t_defined\ntypedef unsigned int uint32_t;\n# define __uint32_t_defined\n#endif\n\ntypedef unsigned char               u8;\ntypedef unsigned short              u16;\ntypedef unsigned long               u32;\ntypedef unsigned long long          u64;\ntypedef char                        s8;\ntypedef short                       s16;\ntypedef long                        s32;\ntypedef long long                   s64;\n\ntypedef char                        ascii;\ntypedef unsigned char               byte;           /*  unsigned 8-bit data     */\ntypedef unsigned short              word;           /*  unsigned 16-bit data    */\ntypedef unsigned long               dword;          /*  unsigned 32-bit data    */\n\n\n/* IO definitions (access restrictions to peripheral registers) */\n/**\n    \\defgroup CMSIS_glob_defs CMSIS Global Defines\n\n    IO Type Qualifiers are used\n    \\li to specify the access to peripheral variables.\n    \\li for automatic generation of peripheral register debug information.\n*/\n#ifndef __I\n#ifdef __cplusplus\n  #define   __I     volatile             /*!< Defines 'read only' permissions                 */\n#else\n  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */\n#endif\n#define     __O     volatile             /*!< Defines 'write only' permissions                */\n#define     __IO    volatile             /*!< Defines 'read / write' permissions              */\n#endif\n\n\n#define BITFIELD_VAL(field, value)          (((value) & (field ## _MASK >> field ## _SHIFT)) << field ## _SHIFT)\n#define SET_BITFIELD(reg, field, value)     (((reg) & ~field ## _MASK) | BITFIELD_VAL(field, value))\n#define GET_BITFIELD(reg, field)            (((reg) & field ## _MASK) >> field ## _SHIFT)\n\n\n/* Frequently used macros */\n\n#ifndef ALIGN\n#define ALIGN(val,exp)                  (((val) + ((exp)-1)) & ~((exp)-1))\n#endif\n\n#define ARRAY_SIZE(a)                   (sizeof(a)/sizeof(a[0]))\n#define LAST_ELEMENT(x)                 (&x[ARRAY_SIZE(x)-1])\n#define BOUND(x, min, max)              ( (x) < (min) ? (min) : ((x) > (max) ? (max):(x)) )\n#define ROUND_SIZEOF(t)                 ((sizeof(t)+sizeof(int)-1)&~(sizeof(int)-1))\n\n#ifndef MAX\n#define MAX(a,b)                        (((a) > (b)) ? (a) : (b))\n#endif\n#ifndef MIN\n#define MIN(a,b)                        (((a) < (b)) ? (a) : (b))\n#endif\n#ifndef ABS\n#define ABS(x)                          ((x<0)?(-(x)):(x))\n#endif\n\n#define TO_STRING_A(s)                  # s\n#define TO_STRING(s)                    TO_STRING_A(s)\n\n#ifdef __GNUC__\n\n/* Remove const cast-away warnings from gcc -Wcast-qual */\n#define __UNCONST(a)                    ((void *)(unsigned long)(const void *)(a))\n\n/// From http://www.ibm.com/developerworks/linux/library/l-gcc-hacks/\n/// Macro to use in a if statement to tell the compiler this branch\n/// is likely taken, and optimize accordingly.\n#define LIKELY(x)                       __builtin_expect(!!(x), 1)\n/// Macro to use in a if statement to tell the compiler this branch\n/// is unlikely take, and optimize accordingly.\n#define UNLIKELY(x)                     __builtin_expect(!!(x), 0)\n\n/// For packing structure\n#define PACKED                          __attribute__((packed))\n\n/// To describe alignment\n#define ALIGNED(a)                      __attribute__((aligned(a)))\n\n/// For possibly unused functions or variables (e.g., debugging stuff)\n#define POSSIBLY_UNUSED                 __attribute__((unused))\n\n/// For functions or variables must be emitted even if not referenced\n#define USED                            __attribute__((used))\n\n/// For inline functions\n#define ALWAYS_INLINE                   __attribute__((always_inline))\n\n// For functions never inlined\n#define NOINLINE                        __attribute__((noinline))\n\n// For functions not caring performance\n#ifdef __ARMCC_VERSION\n#define OPT_SIZE\n#else\n#define OPT_SIZE                        __attribute__((optimize(\"Os\")))\n#endif\n\n// For functions not returning\n#define NORETURN                        __attribute__((noreturn))\n\n// For ASM functions in C\n#ifdef __arm__\n#define NAKED                           __attribute__((naked))\n#else\n#define NAKED                           __attribute__((error(\"Unsupport naked functions\")))\n#endif\n\n// For weak symbols\n#define WEAK                            __attribute__((weak))\n\n// Structure offset\n#ifndef OFFSETOF\n#define OFFSETOF(TYPE, MEMBER)          ((size_t) &((TYPE *)0)->MEMBER)\n#endif\n\n/**\n * CONTAINER_OF - cast a member of a structure out to the containing structure\n * @ptr:        the pointer to the member.\n * @type:       the type of the container struct this is embedded in.\n * @member:     the name of the member within the struct.\n *\n */\n#ifndef CONTAINER_OF\n#define CONTAINER_OF(ptr, type, member) ({                      \\\n        const typeof( ((type *)0)->member ) *__mptr = (ptr);    \\\n        (type *)( (char *)__mptr - OFFSETOF(type,member) );})\n#endif\n\n#else // Not GCC\n\n#define __UNCONST(a)\n#define LIKELY(x)\n#define UNLIKELY(x)\n#define PACKED\n#define ALIGNED(a)\n#define POSSIBLY_UNUSED\n#define USED\n#define ALWAYS_INLINE\n#define NOINLINE\n#define OPT_SIZE\n#define NORETURN\n#define NAKED\n#define WEAK\n#define OFFSETOF(TYPE, MEMBER)\n\n#endif // Not GCC\n\n/// C preprocessor conditional check\n/// --------------------------------\n#define GCC_VERSION (__GNUC__ * 10000 \\\n                       + __GNUC_MINOR__ * 100 \\\n                       + __GNUC_PATCHLEVEL__)\n\n#if defined(__GNUC__) && (GCC_VERSION >= 40600) && !defined(__cplusplus)\n\n// GCC 4.6 or later\n#define STATIC_ASSERT(e, m)             _Static_assert(e, m)\n\n#elif defined(__GNUC__) && (GCC_VERSION >= 40300) && defined(__cplusplus) && (__cplusplus >= 201103L)\n\n#define STATIC_ASSERT(e, m)             static_assert(e, m)\n\n#else // No built-in static assert\n\n/// FROM: http://www.pixelbeat.org/programming/gcc/static_assert.html\n#define ASSERT_CONCAT_(a, b)            a##b\n#define ASSERT_CONCAT(a, b)             ASSERT_CONCAT_(a, b)\n/* These can't be used after statements in c89. */\n#ifdef __COUNTER__\n#define STATIC_ASSERT(e, m) \\\n    enum { ASSERT_CONCAT(static_assert_, __COUNTER__) = 1/(!!(e)) };\n#else\n/* This can't be used twice on the same line so ensure if using in headers\n * that the headers are not included twice (by wrapping in #ifndef...#endif)\n * Note it doesn't cause an issue when used on same line of separate modules\n * compiled with gcc -combine -fwhole-program.  */\n#define STATIC_ASSERT(e, m) \\\n    enum { ASSERT_CONCAT(assert_line_, __LINE__) = 1/(!!(e)) };\n#endif\n\n#endif // No built-in static assert\n/// --------------------------------\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/reg_btpcmip.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_BTPCMIP_H_\n#define __REG_BTPCMIP_H_\n\n#include \"plat_types.h\"\n\n#define BTPCMIP_FIFO_DEPTH 8\n\n/* btpcmip register */\n/* enable register */\n#define BTPCMIP_ENABLE_REG_REG_OFFSET 0x0\n#define BTPCMIP_ENABLE_REG_BTPCM_ENABLE_SHIFT (0)\n#define BTPCMIP_ENABLE_REG_BTPCM_ENABLE_MASK ((0x1)<= 3)\n    __IO uint32_t RESERVED_0B4[0x13];\n    __IO uint32_t REG_100;\n    __IO uint32_t REG_104;\n    __IO uint32_t REG_108;\n    __IO uint32_t REG_10C;\n    __IO uint32_t REG_110;\n    __IO uint32_t REG_114;\n    __IO uint32_t REG_118;\n    __IO uint32_t REG_11C;\n    __IO uint32_t REG_120;\n    __IO uint32_t REG_124;\n    __IO uint32_t REG_128;\n    __IO uint32_t REG_12C;\n    __IO uint32_t REG_130;\n    __IO uint32_t REG_134;\n    __IO uint32_t REG_138;\n    __IO uint32_t REG_13C;\n    __IO uint32_t REG_140;\n    __IO uint32_t REG_144;\n    __IO uint32_t REG_148;\n    __IO uint32_t REG_14C;\n    __IO uint32_t REG_150;\n#endif\n#endif\n#endif\n};\n\n// REG_000\n#define REG_000_ADDR_SHIFT                  8\n#define REG_000_ADDR_MASK                   (0xFFFFFF << REG_000_ADDR_SHIFT)\n#define REG_000_ADDR(n)                     BITFIELD_VAL(REG_000_ADDR, n)\n#define REG_000_CMD_SHIFT                   0\n#define REG_000_CMD_MASK                    (0xFF << REG_000_CMD_SHIFT)\n#define REG_000_CMD(n)                      BITFIELD_VAL(REG_000_CMD, n)\n\n#define REG_000_NEW_CMD_RX_LEN_SHIFT        13\n#define REG_000_NEW_CMD_RX_LEN_MASK         (0x3FFF << REG_000_NEW_CMD_RX_LEN_SHIFT)\n#define REG_000_NEW_CMD_RX_LEN(n)           BITFIELD_VAL(REG_000_NEW_CMD_RX_LEN, n)\n#define REG_000_NEW_CMD_RX_LINE_SHIFT       11\n#define REG_000_NEW_CMD_RX_LINE_MASK        (0x3 << REG_000_NEW_CMD_RX_LINE_SHIFT)\n#define REG_000_NEW_CMD_RX_LINE(n)          BITFIELD_VAL(REG_000_NEW_CMD_RX_LINE, n)\n#define REG_000_NEW_CMD_TX_LINE_SHIFT       9\n#define REG_000_NEW_CMD_TX_LINE_MASK        (0x3 << REG_000_NEW_CMD_TX_LINE_SHIFT)\n#define REG_000_NEW_CMD_TX_LINE(n)          BITFIELD_VAL(REG_000_NEW_CMD_TX_LINE, n)\n#define REG_000_NEW_CMD_RX_EN               (1 << 8)\n\n#define NEW_CMD_LINE_4X                     2\n#define NEW_CMD_LINE_2X                     1\n#define NEW_CMD_LINE_1X                     0\n\n// REG_004\n#define REG_004_RES26_SHIFT                 26\n#define REG_004_RES26_MASK                  (0x3F << REG_004_RES26_SHIFT)\n#define REG_004_RES26(n)                    BITFIELD_VAL(REG_004_RES26, n)\n#define REG_004_CONTINUOUS_MODE             (1 << 25)\n#define REG_004_BLOCK_SIZE_SHIFT            12\n#define REG_004_BLOCK_SIZE_MASK             (0x1FFF << REG_004_BLOCK_SIZE_SHIFT)\n#define REG_004_BLOCK_SIZE(n)               BITFIELD_VAL(REG_004_BLOCK_SIZE, n)\n#define REG_004_MODEBIT_SHIFT               4\n#define REG_004_MODEBIT_MASK                (0xFF << REG_004_MODEBIT_SHIFT)\n#define REG_004_MODEBIT(n)                  BITFIELD_VAL(REG_004_MODEBIT, n)\n#define REG_004_RES1_SHIFT                  1\n#define REG_004_RES1_MASK                   (0x7 << REG_004_RES1_SHIFT)\n#define REG_004_RES1(n)                     BITFIELD_VAL(REG_004_RES1, n)\n#define REG_004_NEW_CMD_EN                  (1 << 0)\n\n// REG_008\n#define REG_008_TXDATA_SHIFT                0\n#define REG_008_TXDATA_MASK                 (0xFFFFFFFF << REG_008_TXDATA_SHIFT)\n#define REG_008_TXDATA(n)                   BITFIELD_VAL(REG_008_TXDATA, n)\n\n// REG_00C\n#define REG_00C_RES_SHIFT                   13\n#define REG_00C_RES_MASK                    (0x7FFFF << REG_00C_RES_SHIFT)\n#define REG_00C_RES(n)                      BITFIELD_VAL(REG_00C_RES, n)\n#define REG_00C_TXFIFO_EMPCNT_SHIFT         8\n#define REG_00C_TXFIFO_EMPCNT_MASK          (0x1F << REG_00C_TXFIFO_EMPCNT_SHIFT)\n#define REG_00C_TXFIFO_EMPCNT(n)            BITFIELD_VAL(REG_00C_TXFIFO_EMPCNT, n)\n#define REG_00C_RXFIFO_COUNT_SHIFT          4\n#define REG_00C_RXFIFO_COUNT_MASK           (0xF << REG_00C_RXFIFO_COUNT_SHIFT)\n#define REG_00C_RXFIFO_COUNT(n)             BITFIELD_VAL(REG_00C_RXFIFO_COUNT, n)\n#define REG_00C_RXFIFO_EMPTY                (1 << 3)\n#define REG_00C_TXFIFO_FULL                 (1 << 2)\n#define REG_00C_TXFIFO_EMPTY                (1 << 1)\n#define REG_00C_BUSY                        (1 << 0)\n\n// REG_010\n#define REG_010_RXDATA_SHIFT                0\n#define REG_010_RXDATA_MASK                 (0xFFFFFFFF << REG_010_RXDATA_SHIFT)\n#define REG_010_RXDATA(n)                   BITFIELD_VAL(REG_010_RXDATA, n)\n\n// REG_014\n#define REG_014_RES29_SHIFT                 29\n#define REG_014_RES29_MASK                  (0x7 << REG_014_RES29_SHIFT)\n#define REG_014_RES29(n)                    BITFIELD_VAL(REG_014_RES29, n)\n#define REG_014_EXTRA_SHSL_SHIFT            25\n#define REG_014_EXTRA_SHSL_MASK             (0xF << REG_014_EXTRA_SHSL_SHIFT)\n#define REG_014_EXTRA_SHSL(n)               BITFIELD_VAL(REG_014_EXTRA_SHSL, n)\n#define REG_014_EXTRA_SHSL_EN               (1 << 24)\n#define REG_014_CLKDIV_SHIFT                16\n#define REG_014_CLKDIV_MASK                 (0xFF << REG_014_CLKDIV_SHIFT)\n#define REG_014_CLKDIV(n)                   BITFIELD_VAL(REG_014_CLKDIV, n)\n#define REG_014_SAMPLESEL_SHIFT             12\n#define REG_014_SAMPLESEL_MASK              (0xF << REG_014_SAMPLESEL_SHIFT)\n#define REG_014_SAMPLESEL(n)                BITFIELD_VAL(REG_014_SAMPLESEL, n)\n// Since 2300p\n#define EXTRA_TCHSH_O_SHIFT                 8\n#define EXTRA_TCHSH_O_MASK                  (0xF << EXTRA_TCHSH_O_SHIFT)\n#define EXTRA_TCHSH_O(n)                    BITFIELD_VAL(EXTRA_TCHSH_O, n)\n#define EXTRA_TCHSH_EN_O                    (1 << 7)\n// End of since 2300p\n#define REG_014_CMDQUAD                     (1 << 6)\n#define REG_014_RAM_DUALMODE                (1 << 5)\n#define REG_014_RAM_QUADMODE                (1 << 4)\n#define REG_014_FOUR_BYTE_ADDR_EN           (1 << 3)\n#define REG_014_RES2                        (1 << 2)\n#define REG_014_HOLDPIN                     (1 << 1)\n#define REG_014_WPROPIN                     (1 << 0)\n\n// REG_018\n#define REG_018_RES_SHIFT                   2\n#define REG_018_RES_MASK                    (0x3FFFFFFF << REG_018_RES_SHIFT)\n#define REG_018_RES(n)                      BITFIELD_VAL(REG_018_RES, n)\n#define REG_018_TXFIFOCLR                   (1 << 1)\n#define REG_018_RXFIFOCLR                   (1 << 0)\n\n// REG_01C\n#define REG_01C_RES18_SHIFT                 18\n#define REG_01C_RES18_MASK                  (0x3FFF << REG_01C_RES18_SHIFT)\n#define REG_01C_RES18(n)                    BITFIELD_VAL(REG_01C_RES18, n)\n#define REG_01C_DMA_RX_SIZE_SHIFT           16\n#define REG_01C_DMA_RX_SIZE_MASK            (0x3 << REG_01C_DMA_RX_SIZE_SHIFT)\n#define REG_01C_DMA_RX_SIZE(n)              BITFIELD_VAL(REG_01C_DMA_RX_SIZE, n)\n#define REG_01C_TX_THRESHOLD_SHIFT          8\n#define REG_01C_TX_THRESHOLD_MASK           (0x1F << REG_01C_TX_THRESHOLD_SHIFT)\n#define REG_01C_TX_THRESHOLD(n)             BITFIELD_VAL(REG_01C_TX_THRESHOLD, n)\n#define REG_01C_RX_THRESHOLD_SHIFT          4\n#define REG_01C_RX_THRESHOLD_MASK           (0xF << REG_01C_RX_THRESHOLD_SHIFT)\n#define REG_01C_RX_THRESHOLD(n)             BITFIELD_VAL(REG_01C_RX_THRESHOLD, n)\n#define REG_01C_RES3                        (1 << 3)\n#define REG_01C_DMACTRL_RX_EN               (1 << 2)\n#define REG_01C_DMACTRL_TX_EN               (1 << 1)\n#define REG_01C_NAND_SEL                    (1 << 0)\n\n// REG_020\n#define REG_020_DUALCMD_SHIFT               24\n#define REG_020_DUALCMD_MASK                (0xFF << REG_020_DUALCMD_SHIFT)\n#define REG_020_DUALCMD(n)                  BITFIELD_VAL(REG_020_DUALCMD, n)\n#define REG_020_READCMD_SHIFT               16\n#define REG_020_READCMD_MASK                (0xFF << REG_020_READCMD_SHIFT)\n#define REG_020_READCMD(n)                  BITFIELD_VAL(REG_020_READCMD, n)\n#define REG_020_FREADCMD_SHIFT              8\n#define REG_020_FREADCMD_MASK               (0xFF << REG_020_FREADCMD_SHIFT)\n#define REG_020_FREADCMD(n)                 BITFIELD_VAL(REG_020_FREADCMD, n)\n#define REG_020_QUADCMD_SHIFT               0\n#define REG_020_QUADCMD_MASK                (0xFF << REG_020_QUADCMD_SHIFT)\n#define REG_020_QUADCMD(n)                  BITFIELD_VAL(REG_020_QUADCMD, n)\n\n// REG_024\n#define REG_024_CMD_SEQ1_SHIFT              0\n#define REG_024_CMD_SEQ1_MASK               (0xFFFFFFFF << REG_024_CMD_SEQ1_SHIFT)\n#define REG_024_CMD_SEQ1(n)                 BITFIELD_VAL(REG_024_CMD_SEQ1, n)\n\n// REG_028\n#define REG_028_CMD_SEQ_EN                  (1 << 4)\n#define REG_028_CMD_SEQ2_SHIFT              0\n#define REG_028_CMD_SEQ2_MASK               (0xF << REG_028_CMD_SEQ2_SHIFT)\n#define REG_028_CMD_SEQ2(n)                 BITFIELD_VAL(REG_028_CMD_SEQ2, n)\n\n// REG_02C\n#define REG_02C_RES_SHIFT                   1\n#define REG_02C_RES_MASK                    (0x7FFFFFFF << REG_02C_RES_SHIFT)\n#define REG_02C_RES(n)                      BITFIELD_VAL(REG_02C_RES, n)\n#define REG_02C_FETCH_EN                    (1 << 0)\n\n// REG_030\n#define REG_030_RES_SHIFT                   2\n#define REG_030_RES_MASK                    (0x3FFFFFFF << REG_030_RES_SHIFT)\n#define REG_030_RES(n)                      BITFIELD_VAL(REG_030_RES, n)\n#define REG_030_ADDR_25_24_SHIFT            0\n#define REG_030_ADDR_25_24_MASK             (0x3 << REG_030_ADDR_25_24_SHIFT)\n#define REG_030_ADDR_25_24(n)               BITFIELD_VAL(REG_030_ADDR_25_24, n)\n\n// REG_034\n#define REG_034_RES_SHIFT                   22\n#define REG_034_RES_MASK                    (0x3FF << REG_034_RES_SHIFT)\n#define REG_034_RES(n)                      BITFIELD_VAL(REG_034_RES, n)\n#define REG_034_SPI_IOEN_SHIFT              18\n#define REG_034_SPI_IOEN_MASK               (0xF << REG_034_SPI_IOEN_SHIFT)\n#define REG_034_SPI_IOEN(n)                 BITFIELD_VAL(REG_034_SPI_IOEN, n)\n#define REG_034_SPI_IODRV_SHIFT             16\n#define REG_034_SPI_IODRV_MASK              (0x3 << REG_034_SPI_IODRV_SHIFT)\n#define REG_034_SPI_IODRV(n)                BITFIELD_VAL(REG_034_SPI_IODRV, n)\n#define REG_034_SPI_IORES_SHIFT             8\n#define REG_034_SPI_IORES_MASK              (0xFF << REG_034_SPI_IORES_SHIFT)\n#define REG_034_SPI_IORES(n)                BITFIELD_VAL(REG_034_SPI_IORES, n)\n#define REG_034_SPI_RDEN_SHIFT              4\n#define REG_034_SPI_RDEN_MASK               (0xF << REG_034_SPI_RDEN_SHIFT)\n#define REG_034_SPI_RDEN(n)                 BITFIELD_VAL(REG_034_SPI_RDEN, n)\n#define REG_034_SPI_RUEN_SHIFT              0\n#define REG_034_SPI_RUEN_MASK               (0xF << REG_034_SPI_RUEN_SHIFT)\n#define REG_034_SPI_RUEN(n)                 BITFIELD_VAL(REG_034_SPI_RUEN, n)\n\n// REG_038\n#define REG_038_MAN_WRAP_BITS_SHIFT         13\n#define REG_038_MAN_WRAP_BITS_MASK          (0x3 << REG_038_MAN_WRAP_BITS_SHIFT)\n#define REG_038_MAN_WRAP_BITS(n)            BITFIELD_VAL(REG_038_MAN_WRAP_BITS, n)\n#define REG_038_MAN_WRAP_ENABLE_SHIFT       12\n#define REG_038_MAN_WRAP_ENABLE_MASK        (0x1 << REG_038_MAN_WRAP_ENABLE_SHIFT)\n#define REG_038_MAN_WRAP_ENABLE             (REG_038_MAN_WRAP_ENABLE_MASK)\n#define REG_038_AUTO_WRAP_CMD_SHIFT         4\n#define REG_038_AUTO_WRAP_CMD_MASK          (0xFF << REG_038_AUTO_WRAP_CMD_SHIFT)\n#define REG_038_AUTO_WRAP_CMD(n)            BITFIELD_VAL(REG_038_AUTO_WRAP_CMD, n)\n#define REG_038_WRAP_MODE_SEL_SHIFT         0\n#define REG_038_WRAP_MODE_SEL_MASK          (0x1 << REG_038_WRAP_MODE_SEL_SHIFT)\n#define REG_038_WRAP_MODE_SEL               (REG_038_WRAP_MODE_SEL_MASK)\n\n#if (CHIP_FLASH_CTRL_VER >= 3)\n// REG_40\n#define REG_40_RES_31_6_SHIFT               6\n#define REG_40_RES_31_6_MASK                (0x3FFFFFF << REG_40_RES_31_6_SHIFT)\n#define REG_40_RES_31_6(n)                  BITFIELD_VAL(REG_40_RES_31_6, n)\n#define REG_40_SPH                          (1 << 5)\n#define REG_40_RES_4                        (1 << 4)\n#define REG_40_DQS_MODE                     (1 << 3)\n#define REG_40_DTR_MODE                     (1 << 2)\n#define REG_40_OPI_MODE                     (1 << 1)\n#define REG_40_QPI_MODE                     (1 << 0)\n#endif\n\n// REG_058\n#define REG_058_IDX_SHIFT                   0\n#define REG_058_IDX_MASK                    (0x7 << REG_058_IDX_SHIFT)\n#define REG_058_IDX(n)                      BITFIELD_VAL(REG_058_IDX, n)\n\n// REG_060\n#define REG_060_ADDR_BGN_SHIFT              0\n#define REG_060_ADDR_BGN_MASK               (0xFFFFFFFF << REG_060_ADDR_BGN_SHIFT)\n#define REG_060_ADDR_BGN(n)                 BITFIELD_VAL(REG_060_ADDR_BGN, n)\n\n// REG_064\n#define REG_064_ADDR_END_SHIFT              0\n#define REG_064_ADDR_END_MASK               (0xFFFFFFFF << REG_064_ADDR_END_SHIFT)\n#define REG_064_ADDR_END(n)                 BITFIELD_VAL(REG_064_ADDR_END, n)\n\n// REG_06C\n#define REG_06C_DEC_ENABLE_SHIFT            0\n#define REG_06C_DEC_ENABLE_MASK             (0x1 << REG_06C_DEC_ENABLE_SHIFT)\n#define REG_06C_DEC_ENABLE                  (REG_06C_DEC_ENABLE_MASK)\n\n// REG_0A0\n#ifdef CHIP_BEST2300P\n#define REG_0A0_LEN_WIDTH3_SHIFT            12\n#define REG_0A0_LEN_WIDTH3_MASK             (0xF << REG_0A0_LEN_WIDTH3_SHIFT)\n#define REG_0A0_LEN_WIDTH3(n)               BITFIELD_VAL(REG_0A0_LEN_WIDTH3, n)\n#define REG_0A0_LEN_WIDTH2_SHIFT            8\n#define REG_0A0_LEN_WIDTH2_MASK             (0xF << REG_0A0_LEN_WIDTH2_SHIFT)\n#define REG_0A0_LEN_WIDTH2(n)               BITFIELD_VAL(REG_0A0_LEN_WIDTH2, n)\n#define REG_0A0_LEN_WIDTH1_SHIFT            4\n#define REG_0A0_LEN_WIDTH1_MASK             (0xF << REG_0A0_LEN_WIDTH1_SHIFT)\n#define REG_0A0_LEN_WIDTH1(n)               BITFIELD_VAL(REG_0A0_LEN_WIDTH1, n)\n#define REG_0A0_LEN_WIDTH0_SHIFT            0\n#define REG_0A0_LEN_WIDTH0_MASK             (0xF << REG_0A0_LEN_WIDTH0_SHIFT)\n#define REG_0A0_LEN_WIDTH0(n)               BITFIELD_VAL(REG_0A0_LEN_WIDTH0, n)\n#endif\n\n// REG_0B0\n#define REG_0B0_ADDR3_REMAP_EN              (1 << 4)\n#define REG_0B0_ADDR2_REMAP_EN              (1 << 3)\n#define REG_0B0_ADDR1_REMAP_EN              (1 << 2)\n#define REG_0B0_ADDR0_REMAP_EN              (1 << 1)\n#define REG_0B0_GLB_REMAP_EN                (1 << 0)\n// End of since 2300p\n\n#if (CHIP_FLASH_CTRL_VER >= 3)\n// REG_100\n#define REG_100_DUMMY_READ_SHIFT            0\n#define REG_100_DUMMY_READ_MASK             (0x1F << REG_100_DUMMY_READ_SHIFT)\n#define REG_100_DUMMY_READ(n)               BITFIELD_VAL(REG_100_DUMMY_READ, n)\n\n// REG_104\n#define REG_104_DUMMY_DIOR_SHIFT            0\n#define REG_104_DUMMY_DIOR_MASK             (0x1F << REG_104_DUMMY_DIOR_SHIFT)\n#define REG_104_DUMMY_DIOR(n)               BITFIELD_VAL(REG_104_DUMMY_DIOR, n)\n\n// REG_108\n#define REG_108_DUMMY_QIOR_SHIFT            0\n#define REG_108_DUMMY_QIOR_MASK             (0x1F << REG_108_DUMMY_QIOR_SHIFT)\n#define REG_108_DUMMY_QIOR(n)               BITFIELD_VAL(REG_108_DUMMY_QIOR, n)\n\n// REG_10C\n#define REG_10C_DUMMY_FREAD_SHIFT           0\n#define REG_10C_DUMMY_FREAD_MASK            (0x1F << REG_10C_DUMMY_FREAD_SHIFT)\n#define REG_10C_DUMMY_FREAD(n)              BITFIELD_VAL(REG_10C_DUMMY_FREAD, n)\n\n// REG_110\n#define REG_110_DUMMY_DOR_SHIFT             0\n#define REG_110_DUMMY_DOR_MASK              (0x1F << REG_110_DUMMY_DOR_SHIFT)\n#define REG_110_DUMMY_DOR(n)                BITFIELD_VAL(REG_110_DUMMY_DOR, n)\n\n// REG_114\n#define REG_114_DUMMY_QOR_SHIFT             0\n#define REG_114_DUMMY_QOR_MASK              (0x1F << REG_114_DUMMY_QOR_SHIFT)\n#define REG_114_DUMMY_QOR(n)                BITFIELD_VAL(REG_114_DUMMY_QOR, n)\n\n// REG_118\n#define REG_118_DUMMY_QIOWR_SHIFT           0\n#define REG_118_DUMMY_QIOWR_MASK            (0x1F << REG_118_DUMMY_QIOWR_SHIFT)\n#define REG_118_DUMMY_QIOWR(n)              BITFIELD_VAL(REG_118_DUMMY_QIOWR, n)\n\n// REG_11C\n#define REG_11C_DUMMY_BRWR_SHIFT            0\n#define REG_11C_DUMMY_BRWR_MASK             (0x1F << REG_11C_DUMMY_BRWR_SHIFT)\n#define REG_11C_DUMMY_BRWR(n)               BITFIELD_VAL(REG_11C_DUMMY_BRWR, n)\n\n// REG_120\n#define REG_120_DUMMY_BFRD_SHIFT            0\n#define REG_120_DUMMY_BFRD_MASK             (0x1F << REG_120_DUMMY_BFRD_SHIFT)\n#define REG_120_DUMMY_BFRD(n)               BITFIELD_VAL(REG_120_DUMMY_BFRD, n)\n\n// REG_124\n#define REG_124_DUMMY_DTRFRD_SHIFT          0\n#define REG_124_DUMMY_DTRFRD_MASK           (0x1F << REG_124_DUMMY_DTRFRD_SHIFT)\n#define REG_124_DUMMY_DTRFRD(n)             BITFIELD_VAL(REG_124_DUMMY_DTRFRD, n)\n\n// REG_128\n#define REG_128_DUMMY_DTR2RD_SHIFT          0\n#define REG_128_DUMMY_DTR2RD_MASK           (0x1F << REG_128_DUMMY_DTR2RD_SHIFT)\n#define REG_128_DUMMY_DTR2RD(n)             BITFIELD_VAL(REG_128_DUMMY_DTR2RD, n)\n\n// REG_12C\n#define REG_12C_DUMMY_DTR4RD_SHIFT          0\n#define REG_12C_DUMMY_DTR4RD_MASK           (0x1F << REG_12C_DUMMY_DTR4RD_SHIFT)\n#define REG_12C_DUMMY_DTR4RD(n)             BITFIELD_VAL(REG_12C_DUMMY_DTR4RD, n)\n\n// REG_130\n#define REG_130_DUMMY_DTRRWR_SHIFT          0\n#define REG_130_DUMMY_DTRRWR_MASK           (0x1F << REG_130_DUMMY_DTRRWR_SHIFT)\n#define REG_130_DUMMY_DTRRWR(n)             BITFIELD_VAL(REG_130_DUMMY_DTRRWR, n)\n\n// REG_134\n#define REG_134_DUMMY_OCTFRD_SHIFT          0\n#define REG_134_DUMMY_OCTFRD_MASK           (0x1F << REG_134_DUMMY_OCTFRD_SHIFT)\n#define REG_134_DUMMY_OCTFRD(n)             BITFIELD_VAL(REG_134_DUMMY_OCTFRD, n)\n\n// REG_138\n#define REG_138_DUMMY_OCTIORD_SHIFT         0\n#define REG_138_DUMMY_OCTIORD_MASK          (0x1F << REG_138_DUMMY_OCTIORD_SHIFT)\n#define REG_138_DUMMY_OCTIORD(n)            BITFIELD_VAL(REG_138_DUMMY_OCTIORD, n)\n\n// REG_13C\n#define REG_13C_DUMMY_4BDTROCTRD_SHIFT      0\n#define REG_13C_DUMMY_4BDTROCTRD_MASK       (0x1F << REG_13C_DUMMY_4BDTROCTRD_SHIFT)\n#define REG_13C_DUMMY_4BDTROCTRD(n)         BITFIELD_VAL(REG_13C_DUMMY_4BDTROCTRD, n)\n\n// REG_150\n#define REG_150_DUMMY_OTHERS_SHIFT          0\n#define REG_150_DUMMY_OTHERS_MASK           (0x1F << REG_150_DUMMY_OTHERS_SHIFT)\n#define REG_150_DUMMY_OTHERS(n)             BITFIELD_VAL(REG_150_DUMMY_OTHERS, n)\n#endif\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/reg_psram_mc_v2.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_PSRAM_MC_V2_H__\n#define __REG_PSRAM_MC_V2_H__\n\n#include \"plat_types.h\"\n\nstruct PSRAM_MC_T {\n    __IO uint32_t REG_000;\n    __IO uint32_t REG_004;\n    __IO uint32_t REG_008;\n    __IO uint32_t REG_00C;\n    __IO uint32_t REG_010;\n    __IO uint32_t REG_014;\n    __IO uint32_t REG_018;\n    __IO uint32_t REG_01C;\n    __IO uint32_t REG_020;\n    __IO uint32_t REG_024;\n    __IO uint32_t REG_028;\n    __IO uint32_t REG_02C;\n    __IO uint32_t REG_030;\n    __IO uint32_t REG_034;\n    __IO uint32_t REG_038;\n    __IO uint32_t REG_03C;\n    __IO uint32_t REG_040;\n    __IO uint32_t REG_044;\n    __IO uint32_t REG_048;\n    __IO uint32_t REG_04C;\n    __IO uint32_t REG_050;\n    __IO uint32_t REG_054;\n    __IO uint32_t REG_058;\n    __IO uint32_t REG_05C;\n    __IO uint32_t REG_060;\n    __IO uint32_t REG_064;\n    __IO uint32_t REG_068;\n    __IO uint32_t REG_06C;\n    __IO uint32_t REG_070;\n    __IO uint32_t REG_074;\n    __IO uint32_t REG_078;\n    __IO uint32_t REG_07C;\n    __IO uint32_t REG_080;\n    __IO uint32_t REG_084;\n    __IO uint32_t REG_088;\n    __IO uint32_t REG_08C;\n    __IO uint32_t REG_090;\n    __IO uint32_t REG_094;\n    __IO uint32_t REG_098;\n    __IO uint32_t REG_09C;\n    __IO uint32_t REG_0A0;\n    __IO uint32_t REG_0A4;\n    __IO uint32_t REG_0A8;\n    __IO uint32_t REG_0AC;\n    __IO uint32_t REG_0B0;\n    __IO uint32_t REG_0B4;\n    __IO uint32_t REG_0B8;\n    __IO uint32_t REG_0BC;\n    __IO uint32_t REG_RESERVED_0C0[0x20];\n    __IO uint32_t REG_140;\n    __IO uint32_t REG_144;\n    __IO uint32_t REG_148;\n    __IO uint32_t REG_14C;\n    __IO uint32_t REG_150;\n    __IO uint32_t REG_154;\n    __IO uint32_t REG_158;\n    __IO uint32_t REG_15C;\n    __IO uint32_t REG_160;\n    __IO uint32_t REG_RESERVED_164[7];\n    __IO uint32_t REG_180;\n    __IO uint32_t REG_184;\n    __IO uint32_t REG_188;\n    __IO uint32_t REG_18C;\n    __IO uint32_t REG_190;\n    __IO uint32_t REG_194;\n    __IO uint32_t REG_RESERVED_198[0x1A];\n    __IO uint32_t REG_200;\n    __IO uint32_t REG_RESERVED_204[0x7F];\n    __IO uint32_t REG_400;\n    __IO uint32_t REG_404;\n    __IO uint32_t REG_RESERVED_408[0xE];\n    __IO uint32_t REG_440;\n    __IO uint32_t REG_444;\n    __IO uint32_t REG_448;\n    __IO uint32_t REG_44C;\n    __IO uint32_t REG_450;\n    __IO uint32_t REG_454;\n    __IO uint32_t REG_458;\n    __IO uint32_t REG_45C;\n    __IO uint32_t REG_460;\n    __IO uint32_t REG_464;\n    __IO uint32_t REG_468;\n    __IO uint32_t REG_46C;\n};\n\n// reg_00\n#define PSRAM_ULP_MC_CHIP_BIT                    (1 << 0)\n#define PSRAM_ULP_MC_CHIP_TYPE                   (1 << 1)\n#define PSRAM_ULP_MC_RES_3_2_REG00               (1 << 2)\n#define PSRAM_ULP_MC_CHIP_CA_PATTERN(n)          (((n) & 0x7) << 3)\n#define PSRAM_ULP_MC_CHIP_CA_PATTERN_MASK        (0x7 << 3)\n#define PSRAM_ULP_MC_CHIP_CA_PATTERN_SHIFT       (3)\n\n// reg_04\n#define PSRAM_ULP_MC_MGR_CMD(n)                  (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_MGR_CMD_MASK                (0xFF << 0)\n#define PSRAM_ULP_MC_MGR_CMD_SHIFT               (0)\n\n// reg_08\n#define PSRAM_ULP_MC_MGR_ADDR(n)                 (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_MGR_ADDR_MASK               (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_MGR_ADDR_SHIFT              (0)\n\n// reg_0c\n#define PSRAM_ULP_MC_MGR_LEN(n)                  (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_MGR_LEN_MASK                (0xFF << 0)\n#define PSRAM_ULP_MC_MGR_LEN_SHIFT               (0)\n\n// reg_10\n#define PSRAM_ULP_MC_MGR_WSTRB(n)                (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_MGR_WSTRB_MASK              (0xFF << 0)\n#define PSRAM_ULP_MC_MGR_WSTRB_SHIFT             (0)\n\n// reg_14\n#define PSRAM_ULP_MC_MGR_TX_FIFO(n)              (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_MGR_TX_FIFO_MASK            (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_MGR_TX_FIFO_SHIFT           (0)\n\n// reg_18\n#define PSRAM_ULP_MC_MGR_RX_FIFO(n)              (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_MGR_RX_FIFO_MASK            (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_MGR_RX_FIFO_SHIFT           (0)\n\n// reg_1c\n#define PSRAM_ULP_MC_MGR_TX_FIFO_CLR             (1 << 0)\n#define PSRAM_ULP_MC_MGR_RX_FIFO_CLR             (1 << 1)\n\n// reg_20\n#define PSRAM_ULP_MC_REFRESH_MODE                (1 << 0)\n#define PSRAM_ULP_MC_BURST_REFRESH_EN            (1 << 1)\n\n// reg_24\n#define PSRAM_ULP_MC_ENTRY_SLEEP_IDLE            (1 << 0)\n#define PSRAM_ULP_MC_ENTRY_SELF_REFRESH_IDLE     (1 << 1)\n#define PSRAM_ULP_MC_STOP_CLK_IDLE               (1 << 2)\n#define PSRAM_ULP_MC_AUTOWAKEUP_EN               (1 << 3)\n#define PSRAM_ULP_MC_RES_7_4_REG24(n)            (((n) & 0xF) << 4)\n#define PSRAM_ULP_MC_RES_7_4_REG24_MASK          (0xF << 4)\n#define PSRAM_ULP_MC_RES_7_4_REG24_SHIFT         (4)\n#define PSRAM_ULP_MC_PD_MR(n)                    (((n) & 0xFF) << 8)\n#define PSRAM_ULP_MC_PD_MR_MASK                  (0xFF << 8)\n#define PSRAM_ULP_MC_PD_MR_SHIFT                 (8)\n#define PSRAM_ULP_MC_PD_CMD(n)                   (((n) & 0xFF) << 16)\n#define PSRAM_ULP_MC_PD_CMD_MASK                 (0xFF << 16)\n#define PSRAM_ULP_MC_PD_CMD_SHIFT                (16)\n\n// reg_28\n#define PSRAM_ULP_MC_WRITE_LATENCY(n)            (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_WRITE_LATENCY_MASK          (0xFF << 0)\n#define PSRAM_ULP_MC_WRITE_LATENCY_SHIFT         (0)\n\n// reg_2c\n#define PSRAM_ULP_MC_READ_LATENCY(n)             (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_READ_LATENCY_MASK           (0xFF << 0)\n#define PSRAM_ULP_MC_READ_LATENCY_SHIFT          (0)\n\n// reg_30\n#define PSRAM_ULP_MC_MEMORY_WIDTH(n)             (((n) & 0x3) << 0)\n#define PSRAM_ULP_MC_MEMORY_WIDTH_MASK           (0x3 << 0)\n#define PSRAM_ULP_MC_MEMORY_WIDTH_SHIFT          (0)\n\n// reg_34\n#define PSRAM_ULP_MC_BURST_LENGTH(n)             (((n) & 0x7) << 0)\n#define PSRAM_ULP_MC_BURST_LENGTH_MASK           (0x7 << 0)\n#define PSRAM_ULP_MC_BURST_LENGTH_SHIFT          (0)\n#define PSRAM_ULP_MC_RES_3_3_REG34               (1 << 3)\n#define PSRAM_ULP_MC_PAGE_BOUNDARY(n)            (((n) & 0x3) << 4)\n#define PSRAM_ULP_MC_PAGE_BOUNDARY_MASK          (0x3 << 4)\n#define PSRAM_ULP_MC_PAGE_BOUNDARY_SHIFT         (4)\n\n// reg_38\n#define PSRAM_ULP_MC_BUS_WIDTH                   (1 << 0)\n\n// reg_3c\n#define PSRAM_ULP_MC_HIGH_PRI_LEVEL(n)           (((n) & 0x1F) << 0)\n#define PSRAM_ULP_MC_HIGH_PRI_LEVEL_MASK         (0x1F << 0)\n#define PSRAM_ULP_MC_HIGH_PRI_LEVEL_SHIFT        (0)\n\n// reg_40\n#define PSRAM_ULP_MC_CP_WRAP_EN                  (1 << 0)\n#define PSRAM_ULP_MC_AUTO_PRECHARGE              (1 << 1)\n#define PSRAM_ULP_MC_WRAP_CRT_RET_EN             (1 << 2)\n\n// reg_44\n#define PSRAM_ULP_MC_WB_DRAIN                    (1 << 0)\n#define PSRAM_ULP_MC_WB_INVALID                  (1 << 1)\n#define PSRAM_ULP_MC_RB_INVALID                  (1 << 2)\n#define PSRAM_ULP_MC_SNP_DISABLE                 (1 << 3)\n#define PSRAM_ULP_MC_BUFFERABLE_WB_EN            (1 << 4)\n\n// reg_48\n#define PSRAM_ULP_MC_FRE_RATIO(n)                (((n) & 0x3) << 0)\n#define PSRAM_ULP_MC_FRE_RATIO_MASK              (0x3 << 0)\n#define PSRAM_ULP_MC_FRE_RATIO_SHIFT             (0)\n\n// reg_4c\n#define PSRAM_ULP_MC_T_REFI(n)                   (((n) & 0xFFFF) << 0)\n#define PSRAM_ULP_MC_T_REFI_MASK                 (0xFFFF << 0)\n#define PSRAM_ULP_MC_T_REFI_SHIFT                (0)\n#define PSRAM_ULP_MC_NUM_OF_BURST_RFS(n)         (((n) & 0xFFFF) << 16)\n#define PSRAM_ULP_MC_NUM_OF_BURST_RFS_MASK       (0xFFFF << 16)\n#define PSRAM_ULP_MC_NUM_OF_BURST_RFS_SHIFT      (16)\n\n// reg_50\n#define PSRAM_ULP_MC_T_RC(n)                     (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_T_RC_MASK                   (0xFF << 0)\n#define PSRAM_ULP_MC_T_RC_SHIFT                  (0)\n\n// reg_54\n#define PSRAM_ULP_MC_T_RFC(n)                    (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_T_RFC_MASK                  (0xFF << 0)\n#define PSRAM_ULP_MC_T_RFC_SHIFT                 (0)\n\n// reg_58\n#define PSRAM_ULP_MC_T_CPHR(n)                   (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_CPHR_MASK                 (0x3F << 0)\n#define PSRAM_ULP_MC_T_CPHR_SHIFT                (0)\n\n// reg_5c\n#define PSRAM_ULP_MC_T_CPHR_AP(n)                (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_CPHR_AP_MASK              (0x3F << 0)\n#define PSRAM_ULP_MC_T_CPHR_AP_SHIFT             (0)\n\n// reg_60\n#define PSRAM_ULP_MC_T_CPHW(n)                   (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_CPHW_MASK                 (0x3F << 0)\n#define PSRAM_ULP_MC_T_CPHW_SHIFT                (0)\n\n// reg_64\n#define PSRAM_ULP_MC_T_CPHW_AP(n)                (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_CPHW_AP_MASK              (0x3F << 0)\n#define PSRAM_ULP_MC_T_CPHW_AP_SHIFT             (0)\n\n// reg_68\n#define PSRAM_ULP_MC_T_MRR(n)                    (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_MRR_MASK                  (0x3F << 0)\n#define PSRAM_ULP_MC_T_MRR_SHIFT                 (0)\n\n// reg_6c\n#define PSRAM_ULP_MC_T_MRS(n)                    (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_MRS_MASK                  (0x3F << 0)\n#define PSRAM_ULP_MC_T_MRS_SHIFT                 (0)\n\n// reg_70\n#define PSRAM_ULP_MC_T_CEM(n)                    (((n) & 0xFFFF) << 0)\n#define PSRAM_ULP_MC_T_CEM_MASK                  (0xFFFF << 0)\n#define PSRAM_ULP_MC_T_CEM_SHIFT                 (0)\n\n// reg_74\n#define PSRAM_ULP_MC_T_RST(n)                    (((n) & 0xFFFF) << 0)\n#define PSRAM_ULP_MC_T_RST_MASK                  (0xFFFF << 0)\n#define PSRAM_ULP_MC_T_RST_SHIFT                 (0)\n\n// reg_78\n#define PSRAM_ULP_MC_T_SRF(n)                    (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_T_SRF_MASK                  (0xFF << 0)\n#define PSRAM_ULP_MC_T_SRF_SHIFT                 (0)\n\n// reg_7c\n#define PSRAM_ULP_MC_T_XSR(n)                    (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_T_XSR_MASK                  (0xFF << 0)\n#define PSRAM_ULP_MC_T_XSR_SHIFT                 (0)\n\n// reg_80\n#define PSRAM_ULP_MC_T_HS(n)                     (((n) & 0xFFFF) << 0)\n#define PSRAM_ULP_MC_T_HS_MASK                   (0xFFFF << 0)\n#define PSRAM_ULP_MC_T_HS_SHIFT                  (0)\n\n// reg_84\n#define PSRAM_ULP_MC_T_XPHS(n)                   (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_T_XPHS_MASK                 (0xFF << 0)\n#define PSRAM_ULP_MC_T_XPHS_SHIFT                (0)\n\n// reg_88\n#define PSRAM_ULP_MC_T_XHS(n)                    (((n) & 0xFFFFF) << 0)\n#define PSRAM_ULP_MC_T_XHS_MASK                  (0xFFFFF << 0)\n#define PSRAM_ULP_MC_T_XHS_SHIFT                 (0)\n\n// reg_8c\n#define PSRAM_ULP_MC_T_ZQCAL(n)                  (((n) & 0xFFFFF) << 0)\n#define PSRAM_ULP_MC_T_ZQCAL_MASK                (0xFFFFF << 0)\n#define PSRAM_ULP_MC_T_ZQCAL_SHIFT               (0)\n\n// reg_90\n#define PSRAM_ULP_MC_T_ZQCRST(n)                 (((n) & 0xFFFFF) << 0)\n#define PSRAM_ULP_MC_T_ZQCRST_MASK               (0xFFFFF << 0)\n#define PSRAM_ULP_MC_T_ZQCRST_SHIFT              (0)\n\n// reg_94\n#define PSRAM_ULP_MC_T_XCKD(n)                   (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_XCKD_MASK                 (0x3F << 0)\n#define PSRAM_ULP_MC_T_XCKD_SHIFT                (0)\n\n// reg_98\n#define PSRAM_ULP_MC_T_ECKD(n)                   (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_ECKD_MASK                 (0x3F << 0)\n#define PSRAM_ULP_MC_T_ECKD_SHIFT                (0)\n\n// reg_9c\n#define PSRAM_ULP_MC_WR_DMY_CYC(n)               (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_WR_DMY_CYC_MASK             (0xFF << 0)\n#define PSRAM_ULP_MC_WR_DMY_CYC_SHIFT            (0)\n\n// reg_a0\n#define PSRAM_ULP_MC_STOP_CLK_IN_NOP             (1 << 0)\n#define PSRAM_ULP_MC_NOP_DMY_CYC(n)              (((n) & 0xFF) << 1)\n#define PSRAM_ULP_MC_NOP_DMY_CYC_MASK            (0xFF << 1)\n#define PSRAM_ULP_MC_NOP_DMY_CYC_SHIFT           (1)\n\n// reg_a4\n#define PSRAM_ULP_MC_QUEUE_IDLE_CYCLE(n)         (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_QUEUE_IDLE_CYCLE_MASK       (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_QUEUE_IDLE_CYCLE_SHIFT      (0)\n\n// reg_a8\n#define PSRAM_ULP_MC_T_EXPANDRD(n)               (((n) & 0x3F) << 0)\n#define PSRAM_ULP_MC_T_EXPANDRD_MASK             (0x3F << 0)\n#define PSRAM_ULP_MC_T_EXPANDRD_SHIFT            (0)\n\n// reg_ac\n#define PSRAM_ULP_MC_RX_SYNC_BYPASS              (1 << 0)\n\n// reg_b4\n#define PSRAM_ULP_MC_T_ZQCAS(n)                  (((n) & 0xFFFFF) << 0)\n#define PSRAM_ULP_MC_T_ZQCAS_MASK                (0xFFFFF << 0)\n#define PSRAM_ULP_MC_T_ZQCAS_SHIFT               (0)\n\n// reg_b8\n#define PSRAM_ULP_MC_T_NEW_HOLD(n)               (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_T_NEW_HOLD_MASK             (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_T_NEW_HOLD_SHIFT            (0)\n\n// reg_bc\n#define PSRAM_ULP_MC_NEW_CMD_OP(n)               (((n) & 0x7) << 0)\n#define PSRAM_ULP_MC_NEW_CMD_OP_MASK             (0x7 << 0)\n#define PSRAM_ULP_MC_NEW_CMD_OP_SHIFT            (0)\n\n// reg_140\n#define PSRAM_ULP_MC_CMD_TABLE_ARRAY_RD(n)       (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_ARRAY_RD_MASK     (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_ARRAY_RD_SHIFT    (0)\n\n// reg_144\n#define PSRAM_ULP_MC_CMD_TABLE_ARRAY_WR(n)       (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_ARRAY_WR_MASK     (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_ARRAY_WR_SHIFT    (0)\n\n// reg_148\n#define PSRAM_ULP_MC_CMD_TABLE_REG_RD(n)         (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_REG_RD_MASK       (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_REG_RD_SHIFT      (0)\n\n// reg_14c\n#define PSRAM_ULP_MC_CMD_TABLE_REG_WR(n)         (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_REG_WR_MASK       (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_REG_WR_SHIFT      (0)\n\n// reg_150\n#define PSRAM_ULP_MC_CMD_TABLE_AUTO_REFR(n)      (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_AUTO_REFR_MASK    (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_AUTO_REFR_SHIFT   (0)\n\n// reg_154\n#define PSRAM_ULP_MC_CMD_TABLE_SELF_REFR(n)      (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_SELF_REFR_MASK    (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_SELF_REFR_SHIFT   (0)\n\n// reg_158\n#define PSRAM_ULP_MC_CMD_TABLE_HSLP_ENTRY(n)     (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_HSLP_ENTRY_MASK   (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_HSLP_ENTRY_SHIFT  (0)\n\n// reg_15c\n#define PSRAM_ULP_MC_CMD_TABLE_GLBRST(n)         (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_GLBRST_MASK       (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_GLBRST_SHIFT      (0)\n\n// reg_160\n#define PSRAM_ULP_MC_CMD_TABLE_NOP(n)            (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_NOP_MASK          (0xFF << 0)\n#define PSRAM_ULP_MC_CMD_TABLE_NOP_SHIFT         (0)\n\n// reg_180\n#define PSRAM_ULP_MC_CA_MAP_BIT0(n)              (((n) & 0x1F) << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT0_MASK            (0x1F << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT0_SHIFT           (0)\n#define PSRAM_ULP_MC_CA_MAP_BIT1(n)              (((n) & 0x1F) << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT1_MASK            (0x1F << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT1_SHIFT           (5)\n#define PSRAM_ULP_MC_CA_MAP_BIT2(n)              (((n) & 0x1F) << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT2_MASK            (0x1F << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT2_SHIFT           (10)\n#define PSRAM_ULP_MC_CA_MAP_BIT3(n)              (((n) & 0x1F) << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT3_MASK            (0x1F << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT3_SHIFT           (15)\n#define PSRAM_ULP_MC_CA_MAP_BIT4(n)              (((n) & 0x1F) << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT4_MASK            (0x1F << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT4_SHIFT           (20)\n#define PSRAM_ULP_MC_CA_MAP_BIT5(n)              (((n) & 0x1F) << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT5_MASK            (0x1F << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT5_SHIFT           (25)\n\n// reg_184\n#define PSRAM_ULP_MC_CA_MAP_BIT6(n)              (((n) & 0x1F) << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT6_MASK            (0x1F << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT6_SHIFT           (0)\n#define PSRAM_ULP_MC_CA_MAP_BIT7(n)              (((n) & 0x1F) << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT7_MASK            (0x1F << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT7_SHIFT           (5)\n#define PSRAM_ULP_MC_CA_MAP_BIT8(n)              (((n) & 0x1F) << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT8_MASK            (0x1F << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT8_SHIFT           (10)\n#define PSRAM_ULP_MC_CA_MAP_BIT9(n)              (((n) & 0x1F) << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT9_MASK            (0x1F << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT9_SHIFT           (15)\n#define PSRAM_ULP_MC_CA_MAP_BIT10(n)             (((n) & 0x1F) << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT10_MASK           (0x1F << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT10_SHIFT          (20)\n#define PSRAM_ULP_MC_CA_MAP_BIT11(n)             (((n) & 0x1F) << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT11_MASK           (0x1F << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT11_SHIFT          (25)\n\n// reg_188\n#define PSRAM_ULP_MC_CA_MAP_BIT12(n)             (((n) & 0x1F) << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT12_MASK           (0x1F << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT12_SHIFT          (0)\n#define PSRAM_ULP_MC_CA_MAP_BIT13(n)             (((n) & 0x1F) << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT13_MASK           (0x1F << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT13_SHIFT          (5)\n#define PSRAM_ULP_MC_CA_MAP_BIT14(n)             (((n) & 0x1F) << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT14_MASK           (0x1F << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT14_SHIFT          (10)\n#define PSRAM_ULP_MC_CA_MAP_BIT15(n)             (((n) & 0x1F) << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT15_MASK           (0x1F << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT15_SHIFT          (15)\n#define PSRAM_ULP_MC_CA_MAP_BIT16(n)             (((n) & 0x1F) << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT16_MASK           (0x1F << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT16_SHIFT          (20)\n#define PSRAM_ULP_MC_CA_MAP_BIT17(n)             (((n) & 0x1F) << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT17_MASK           (0x1F << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT17_SHIFT          (25)\n\n// reg_18c\n#define PSRAM_ULP_MC_CA_MAP_BIT18(n)             (((n) & 0x1F) << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT18_MASK           (0x1F << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT18_SHIFT          (0)\n#define PSRAM_ULP_MC_CA_MAP_BIT19(n)             (((n) & 0x1F) << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT19_MASK           (0x1F << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT19_SHIFT          (5)\n#define PSRAM_ULP_MC_CA_MAP_BIT20(n)             (((n) & 0x1F) << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT20_MASK           (0x1F << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT20_SHIFT          (10)\n#define PSRAM_ULP_MC_CA_MAP_BIT21(n)             (((n) & 0x1F) << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT21_MASK           (0x1F << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT21_SHIFT          (15)\n#define PSRAM_ULP_MC_CA_MAP_BIT22(n)             (((n) & 0x1F) << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT22_MASK           (0x1F << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT22_SHIFT          (20)\n#define PSRAM_ULP_MC_CA_MAP_BIT23(n)             (((n) & 0x1F) << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT23_MASK           (0x1F << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT23_SHIFT          (25)\n\n// reg_190\n#define PSRAM_ULP_MC_CA_MAP_BIT24(n)             (((n) & 0x1F) << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT24_MASK           (0x1F << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT24_SHIFT          (0)\n#define PSRAM_ULP_MC_CA_MAP_BIT25(n)             (((n) & 0x1F) << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT25_MASK           (0x1F << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT25_SHIFT          (5)\n#define PSRAM_ULP_MC_CA_MAP_BIT26(n)             (((n) & 0x1F) << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT26_MASK           (0x1F << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT26_SHIFT          (10)\n#define PSRAM_ULP_MC_CA_MAP_BIT27(n)             (((n) & 0x1F) << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT27_MASK           (0x1F << 15)\n#define PSRAM_ULP_MC_CA_MAP_BIT27_SHIFT          (15)\n#define PSRAM_ULP_MC_CA_MAP_BIT28(n)             (((n) & 0x1F) << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT28_MASK           (0x1F << 20)\n#define PSRAM_ULP_MC_CA_MAP_BIT28_SHIFT          (20)\n#define PSRAM_ULP_MC_CA_MAP_BIT29(n)             (((n) & 0x1F) << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT29_MASK           (0x1F << 25)\n#define PSRAM_ULP_MC_CA_MAP_BIT29_SHIFT          (25)\n\n// reg_194\n#define PSRAM_ULP_MC_CA_MAP_BIT30(n)             (((n) & 0x1F) << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT30_MASK           (0x1F << 0)\n#define PSRAM_ULP_MC_CA_MAP_BIT30_SHIFT          (0)\n#define PSRAM_ULP_MC_CA_MAP_BIT31(n)             (((n) & 0x1F) << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT31_MASK           (0x1F << 5)\n#define PSRAM_ULP_MC_CA_MAP_BIT31_SHIFT          (5)\n#define PSRAM_ULP_MC_CA_MAP_BIT32(n)             (((n) & 0x1F) << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT32_MASK           (0x1F << 10)\n#define PSRAM_ULP_MC_CA_MAP_BIT32_SHIFT          (10)\n\n// reg_190\n\n// reg_200\n#define PSRAM_ULP_MC_RESERVED_0(n)               (((n) & 0xFF) << 0)\n#define PSRAM_ULP_MC_RESERVED_0_MASK             (0xFF << 0)\n#define PSRAM_ULP_MC_RESERVED_0_SHIFT            (0)\n\n// reg_400\n#define PSRAM_ULP_MC_INIT_COMPLETE               (1 << 0)\n\n// reg_404\n#define PSRAM_ULP_MC_BUSY                        (1 << 0)\n#define PSRAM_ULP_MC_MGR_RXFIFO_R_EMPTY          (1 << 1)\n#define PSRAM_ULP_MC_MGR_RXFIFO_FULL_CNT(n)      (((n) & 0xF) << 2)\n#define PSRAM_ULP_MC_MGR_RXFIFO_FULL_CNT_MASK    (0xF << 2)\n#define PSRAM_ULP_MC_MGR_RXFIFO_FULL_CNT_SHIFT   (2)\n#define PSRAM_ULP_MC_MGR_TXFIFO_W_FULL           (1 << 6)\n#define PSRAM_ULP_MC_MGR_TXFIFO_EMPTY_CNT(n)     (((n) & 0xF) << 7)\n#define PSRAM_ULP_MC_MGR_TXFIFO_EMPTY_CNT_MASK   (0xF << 7)\n#define PSRAM_ULP_MC_MGR_TXFIFO_EMPTY_CNT_SHIFT  (7)\n#define PSRAM_ULP_MC_WB_FILL_LEVEL(n)            (((n) & 0x1F) << 11)\n#define PSRAM_ULP_MC_WB_FILL_LEVEL_MASK          (0x1F << 11)\n#define PSRAM_ULP_MC_WB_FILL_LEVEL_SHIFT         (11)\n#define PSRAM_ULP_MC_CP_FSM_STATE(n)             (((n) & 0xF) << 16)\n#define PSRAM_ULP_MC_CP_FSM_STATE_MASK           (0xF << 16)\n#define PSRAM_ULP_MC_CP_FSM_STATE_SHIFT          (16)\n#define PSRAM_ULP_MC_RD_FSM(n)                   (((n) & 0x3) << 20)\n#define PSRAM_ULP_MC_RD_FSM_MASK                 (0x3 << 20)\n#define PSRAM_ULP_MC_RD_FSM_SHIFT                (20)\n\n// reg_440\n#define PSRAM_ULP_MC_PMU_MONITOR_START           (1 << 0)\n#define PSRAM_ULP_MC_PMU_MONITOR_END             (1 << 1)\n\n// reg_444\n#define PSRAM_ULP_MC_PMU_TOL_MON_CLK_CYCLE0(n)   (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_MON_CLK_CYCLE0_MASK (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_MON_CLK_CYCLE0_SHIFT (0)\n\n// reg_448\n#define PSRAM_ULP_MC_PMU_TOL_MON_CLK_CYCLE1(n)   (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_MON_CLK_CYCLE1_MASK (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_MON_CLK_CYCLE1_SHIFT (0)\n\n// reg_44c\n#define PSRAM_ULP_MC_PMU_TOL_WR_DATA_BYTES0(n)   (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_WR_DATA_BYTES0_MASK (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_WR_DATA_BYTES0_SHIFT (0)\n\n// reg_450\n#define PSRAM_ULP_MC_PMU_TOL_WR_DATA_BYTES1(n)   (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_WR_DATA_BYTES1_MASK (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_WR_DATA_BYTES1_SHIFT (0)\n\n// reg_454\n#define PSRAM_ULP_MC_PMU_TOL_RD_DATA_BYTES0(n)   (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_DATA_BYTES0_MASK (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_DATA_BYTES0_SHIFT (0)\n\n// reg_458\n#define PSRAM_ULP_MC_PMU_TOL_RD_DATA_BYTES1(n)   (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_DATA_BYTES1_MASK (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_DATA_BYTES1_SHIFT (0)\n\n// reg_45c\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_LATENCY0(n)  (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_LATENCY0_MASK (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_LATENCY0_SHIFT (0)\n\n// reg_460\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_LATENCY1(n)  (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_LATENCY1_MASK (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_LATENCY1_SHIFT (0)\n\n// reg_464\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_NUM0(n)      (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_NUM0_MASK    (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_NUM0_SHIFT   (0)\n\n// reg_468\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_NUM1(n)      (((n) & 0xFFFFFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_NUM1_MASK    (0xFFFFFFFF << 0)\n#define PSRAM_ULP_MC_PMU_TOL_RD_ACC_NUM1_SHIFT   (0)\n\n// reg_46c\n#define PSRAM_ULP_MC_PMU_MAX_RD_ACC_LATENCY(n)   (((n) & 0xFFFF) << 0)\n#define PSRAM_ULP_MC_PMU_MAX_RD_ACC_LATENCY_MASK (0xFFFF << 0)\n#define PSRAM_ULP_MC_PMU_MAX_RD_ACC_LATENCY_SHIFT (0)\n\n#endif\n"
  },
  {
    "path": "platform/hal/reg_psram_phy_v2.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_PSRAM_PHY_V2_H__\n#define __REG_PSRAM_PHY_V2_H__\n\n#include \"plat_types.h\"\n\nstruct PSRAM_PHY_T {\n    __IO uint32_t REG_000;\n    __IO uint32_t REG_004;\n    __IO uint32_t REG_008;\n    __IO uint32_t REG_00C;\n    __IO uint32_t REG_010;\n    __IO uint32_t REG_014;\n    __IO uint32_t REG_018;\n    __IO uint32_t REG_01C;\n    __IO uint32_t REG_020;\n    __IO uint32_t REG_024;\n    __IO uint32_t REG_028;\n    __IO uint32_t REG_02C;\n    __IO uint32_t REG_030;\n    __IO uint32_t REG_034;\n    __IO uint32_t REG_038;\n    __IO uint32_t REG_03C;\n    __IO uint32_t REG_040;\n    __IO uint32_t REG_044;\n    __IO uint32_t REG_048;\n    __IO uint32_t REG_04C;\n    __IO uint32_t REG_050;\n    __IO uint32_t REG_054;\n    __IO uint32_t REG_058;\n    __IO uint32_t REG_05C;\n};\n\n// reg_00\n#define PSRAM_ULP_PHY_CHIP_TYPE                  (1 << 0)\n#define PSRAM_ULP_PHY_CHIP_BIT                   (1 << 1)\n#define PSRAM_ULP_PHY_MEMORY_WIDTH(n)            (((n) & 0x3) << 2)\n#define PSRAM_ULP_PHY_MEMORY_WIDTH_MASK          (0x3 << 2)\n#define PSRAM_ULP_PHY_MEMORY_WIDTH_SHIFT         (2)\n#define PSRAM_ULP_PHY_FRE_RATIO(n)               (((n) & 0x3) << 4)\n#define PSRAM_ULP_PHY_FRE_RATIO_MASK             (0x3 << 4)\n#define PSRAM_ULP_PHY_FRE_RATIO_SHIFT            (4)\n\n// reg_04\n#define PSRAM_ULP_PHY_CTRL_DELAY(n)              (((n) & 0x3) << 0)\n#define PSRAM_ULP_PHY_CTRL_DELAY_MASK            (0x3 << 0)\n#define PSRAM_ULP_PHY_CTRL_DELAY_SHIFT           (0)\n#define PSRAM_ULP_PHY_RX_DLY_EN                  (1 << 2)\n#define PSRAM_ULP_PHY_ALIGN_BYPASS               (1 << 3)\n#define PSRAM_ULP_PHY_PHY_LOOPBACK_EN            (1 << 4)\n#define PSRAM_ULP_PHY_PHY_DUMMY_CYC_EN           (1 << 5)\n\n// reg_08\n#define PSRAM_ULP_PHY_T_WPST(n)                  (((n) & 0x7) << 0)\n#define PSRAM_ULP_PHY_T_WPST_MASK                (0x7 << 0)\n#define PSRAM_ULP_PHY_T_WPST_SHIFT               (0)\n\n// reg_0c\n#define PSRAM_ULP_PHY_RESERVED(n)                (((n) & 0x3F) << 0)\n#define PSRAM_ULP_PHY_RESERVED_MASK              (0x3F << 0)\n#define PSRAM_ULP_PHY_RESERVED_SHIFT             (0)\n\n// reg_00\n\n// reg_10\n#define PSRAM_ULP_PHY_CMD_CONFLICT_CLR           (1 << 0)\n\n// reg_40\n#define PSRAM_ULP_PHY_PHY_CFG_UPDATE             (1 << 0)\n\n// reg_44\n#define PSRAM_ULP_PHY_CMD_CONFLICT_STS           (1 << 0)\n#define PSRAM_ULP_PHY_PHY_FSM_STATE(n)           (((n) & 0xF) << 1)\n#define PSRAM_ULP_PHY_PHY_FSM_STATE_MASK         (0xF << 1)\n#define PSRAM_ULP_PHY_PHY_FSM_STATE_SHIFT        (1)\n\n// reg_48\n#define PSRAM_ULP_PHY_REG_LDO_PU                 (1 << 0)\n#define PSRAM_ULP_PHY_REG_LDO_PRECHARGE          (1 << 1)\n#define PSRAM_ULP_PHY_REG_LDO_IEN1(n)            (((n) & 0xF) << 2)\n#define PSRAM_ULP_PHY_REG_LDO_IEN1_MASK          (0xF << 2)\n#define PSRAM_ULP_PHY_REG_LDO_IEN1_SHIFT         (2)\n#define PSRAM_ULP_PHY_REG_LDO_IEN2(n)            (((n) & 0xF) << 6)\n#define PSRAM_ULP_PHY_REG_LDO_IEN2_MASK          (0xF << 6)\n#define PSRAM_ULP_PHY_REG_LDO_IEN2_SHIFT         (6)\n#define PSRAM_ULP_PHY_REG_LDO_VTUNE(n)           (((n) & 0x7) << 10)\n#define PSRAM_ULP_PHY_REG_LDO_VTUNE_MASK         (0x7 << 10)\n#define PSRAM_ULP_PHY_REG_LDO_VTUNE_SHIFT        (10)\n\n// reg_4c\n#define PSRAM_ULP_PHY_REG_PSRAM_PU               (1 << 0)\n#define PSRAM_ULP_PHY_REG_PSRAM_SWRC(n)          (((n) & 0x3) << 1)\n#define PSRAM_ULP_PHY_REG_PSRAM_SWRC_MASK        (0x3 << 1)\n#define PSRAM_ULP_PHY_REG_PSRAM_SWRC_SHIFT       (1)\n#define PSRAM_ULP_PHY_REG_PSRAM_TXDRV(n)         (((n) & 0x7) << 3)\n#define PSRAM_ULP_PHY_REG_PSRAM_TXDRV_MASK       (0x7 << 3)\n#define PSRAM_ULP_PHY_REG_PSRAM_TXDRV_SHIFT      (3)\n#define PSRAM_ULP_PHY_REG_PSRAM_LOOPBACK_EN      (1 << 6)\n\n// reg_50\n#define PSRAM_ULP_PHY_REG_DLL_PU                 (1 << 0)\n#define PSRAM_ULP_PHY_REG_DLL_SWRC(n)            (((n) & 0x3) << 1)\n#define PSRAM_ULP_PHY_REG_DLL_SWRC_MASK          (0x3 << 1)\n#define PSRAM_ULP_PHY_REG_DLL_SWRC_SHIFT         (1)\n#define PSRAM_ULP_PHY_REG_DLL_RANGE(n)           (((n) & 0x3) << 3)\n#define PSRAM_ULP_PHY_REG_DLL_RANGE_MASK         (0x3 << 3)\n#define PSRAM_ULP_PHY_REG_DLL_RANGE_SHIFT        (3)\n#define PSRAM_ULP_PHY_REG_DLL_DLY_INI(n)         (((n) & 0xFF) << 5)\n#define PSRAM_ULP_PHY_REG_DLL_DLY_INI_MASK       (0xFF << 5)\n#define PSRAM_ULP_PHY_REG_DLL_DLY_INI_SHIFT      (5)\n#define PSRAM_ULP_PHY_REG_DLL(n)                 (((n) & 0xFF) << 13)\n#define PSRAM_ULP_PHY_REG_DLL_MASK               (0xFF << 13)\n#define PSRAM_ULP_PHY_REG_DLL_SHIFT              (13)\n#define PSRAM_ULP_PHY_REG_DLL_RESETB             (1 << 21)\n#define PSRAM_ULP_PHY_REG_DLL_CK_RDY             (1 << 22)\n\n// reg_54\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_CEB_DLY(n)    (((n) & 0x1F) << 0)\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_CEB_DLY_MASK  (0x1F << 0)\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_CEB_DLY_SHIFT (0)\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_CLK_DLY(n)    (((n) & 0x1F) << 5)\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_CLK_DLY_MASK  (0x1F << 5)\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_CLK_DLY_SHIFT (5)\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY(n)    (((n) & 0x1F) << 10)\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY_MASK  (0x1F << 10)\n#define PSRAM_ULP_PHY_REG_PSRAM_TX_DQS_DLY_SHIFT (10)\n#define PSRAM_ULP_PHY_REG_PSRAM_RX_DQS_DLY(n)    (((n) & 0x1F) << 15)\n#define PSRAM_ULP_PHY_REG_PSRAM_RX_DQS_DLY_MASK  (0x1F << 15)\n#define PSRAM_ULP_PHY_REG_PSRAM_RX_DQS_DLY_SHIFT (15)\n\n// reg_58\n#define PSRAM_ULP_PHY_DLL_DLY_IN(n)              (((n) & 0x3F) << 0)\n#define PSRAM_ULP_PHY_DLL_DLY_IN_MASK            (0x3F << 0)\n#define PSRAM_ULP_PHY_DLL_DLY_IN_SHIFT           (0)\n#define PSRAM_ULP_PHY_DLL_LOCK                   (1 << 6)\n#define PSRAM_ULP_PHY_DLL_ALL_ZERO               (1 << 7)\n#define PSRAM_ULP_PHY_DLL_ALL_ONE                (1 << 8)\n\n#endif\n"
  },
  {
    "path": "platform/hal/reg_psramip_v1.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef PSRAM_REG_H\n#define PSRAM_REG_H\n\n#include \"plat_types.h\"\n\n/* ip register */\n/* 0x0 */\n#define PSRIP_CMD_ADDR_REG_OFFSET 0x0\n#define PSRIP_CMD_ADDR_ADDR_SHIFT (8)\n#define PSRIP_CMD_ADDR_ADDR_MASK ((0xfffffff)<= 4)\n#define SPI_RX_SEL_EN               (1 << 11)\n#define SPI_SLAVE_ID_SHIFT          (7)\n#define SPI_SLAVE_ID_MASK           (0xF << SPI_SLAVE_ID_SHIFT)\n#define SPI_SLAVE_ID(n)             BITFIELD_VAL(SPI_SLAVE_ID, n)\n#else\n#define SPI_RX_SEL_EN               (1 << 9)\n#define SPI_SLAVE_ID_SHIFT          (7)\n#define SPI_SLAVE_ID_MASK           (3 << SPI_SLAVE_ID_SHIFT)\n#define SPI_SLAVE_ID(n)             BITFIELD_VAL(SPI_SLAVE_ID, n)\n#endif\n#define SPI_LCD_DC_DATA             (1 << 4)\n#define SPI_SSPCR1_SOD              (1 << 3)\n#define SPI_SSPCR1_MS               (1 << 2)\n#define SPI_SSPCR1_SSE              (1 << 1)\n#define SPI_SSPCR1_LBM              (1 << 0)\n\n#define SPI_SSPSR_BSY               (1 << 4)\n#define SPI_SSPSR_RFF               (1 << 3)\n#define SPI_SSPSR_RNE               (1 << 2)\n#define SPI_SSPSR_TNF               (1 << 1)\n#define SPI_SSPSR_TFE               (1 << 0)\n\n#define MAX_CPSDVSR                 (0xFE)\n#define MIN_CPSDVSR                 (2)\n\n#define SPI_SSPCPSR_CPSDVSR(n)      (((n) & 0xFF) << 0)\n#define SPI_SSPCPSR_CPSDVSR_MASK    (0xFF << 0)\n#define SPI_SSPCPSR_CPSDVSR_SHIFT   (0)\n\n#define SPI_SSPIMSC_TXIM            (1 << 3)\n#define SPI_SSPIMSC_RXIM            (1 << 2)\n#define SPI_SSPIMSC_RTIM            (1 << 1)\n#define SPI_SSPIMSC_RORIM           (1 << 0)\n\n#define SPI_SSPRIS_TXRIS            (1 << 3)\n#define SPI_SSPRIS_RXRIS            (1 << 2)\n#define SPI_SSPRIS_RTRIS            (1 << 1)\n#define SPI_SSPRIS_RORRIS           (1 << 0)\n\n#define SPI_SSPMIS_TXMIS            (1 << 3)\n#define SPI_SSPMIS_RXMIS            (1 << 2)\n#define SPI_SSPMIS_RTMIS            (1 << 1)\n#define SPI_SSPMIS_RORMIS           (1 << 0)\n\n#define SPI_SSPICR_RTIC             (1 << 1)\n#define SPI_SSPICR_RORIC            (1 << 0)\n\n#define SPI_SSPDMACR_TXDMAE         (1 << 1)\n#define SPI_SSPDMACR_RXDMAE         (1 << 0)\n\n#define SPI_SSPRXCR_EN              (1 << 6)\n#define SPI_SSPRXCR_OEN_POLARITY    (1 << 5)\n#define SPI_SSPRXCR_RXBITS(n)       (((n) & 0x1F) << 0)\n#define SPI_SSPRXCR_RXBITS_MASK     (0x1F << 0)\n#define SPI_SSPRXCR_RXBITS_SHIFT    (0)\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/reg_tdm.h",
    "content": "#ifndef _REG_TDM_H_\n#define _REG_TDM_H_\n\n#include \"plat_types.h\"\n#include \"reg_i2sip.h\"\n// 0  enable offset\n#define TDM_ENABLE_SHIFT                  0x0\n#define TDM_ENABLE                            0x1\n#define TDM_DISABLE                           0x0\n// 1  FS_ASSERTED\n#define TDM_MODE_FS_ASSERTED_SHIFT        0x1\n#define TDM_MODE_FS_ASSERTED_AT_FIRST         0x0\n#define TDM_MODE_FS_ASSERTED_AT_LAST          0x1\n// 2  FS_EDGE\n#define TDM_FS_EDGE_SHIFT                 0x2\n#define TDM_FS_EDGE_POSEDGE                   0x0\n#define TDM_FS_EDGE_NEGEDGE                   0x1\n// 3  FRAME_WIDTH\n#define TDM_FRAME_WIDTH_SHIFT             0x3\n#define TDM_FRAME_WIDTH_16_CYCLES             0x1\n#define TDM_FRAME_WIDTH_32_CYCLES             0x2\n#define TDM_FRAME_WIDTH_64_CYCLES             0x3\n#define TDM_FRAME_WIDTH_128_CYCLES            0x4\n#define TDM_FRAME_WIDTH_256_CYCLES            0x5\n// 6 FRAME_WIDTH\n#define TDM_FS_WIDTH_SHIFT                0x6\n#define TDM_FS_WIDTH_1_CYCLE                  0x0\n#define TDM_FS_WIDTH_8_CYCLES                 0x1\n#define TDM_FS_WIDTH_16_CYCLES                0x2\n#define TDM_FS_WIDTH_32_CYCLES                0x3\n#define TDM_FS_WIDTH_64_CYCLES                0x4\n#define TDM_FS_WIDTH_128_CYCLES               0x5\n#define TDM_FS_WIDTH_FRAME_LENGTH_1_CYCLES    0x7\n// 9 SLOT_WIDTH\n#define TDM_SLOT_WIDTH_SHIFT              0x9\n#define TDM_SLOT_WIDTH_32_BIT                 0x0\n#define TDM_SLOT_WIDTH_16_BIT                 0x1\n\n#define TDM_DATA_OFFSET_SHIT              0xa\n#define TDM_DATA_OFFSET_MIN                   0x0\n#define TDM_DATA_OFFSET_SIZE                  0x0\n#define TDM_DATA_OFFSET_MAX                   0x7\n\n#endif\n"
  },
  {
    "path": "platform/hal/reg_timer.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_TIMER_H_\n#define __REG_TIMER_H_\n\n#include \"plat_types.h\"\n\n/* ================================================================================ */\n/* ================                   Timer (TIM)                  ================ */\n/* ================================================================================ */\nstruct DUAL_TIMER_T {\n    struct TIMER_T {\n        __IO uint32_t Load;       /* Offset: 0x000 (R/W)  Timer X Load */\n        __I  uint32_t Value;      /* Offset: 0x004 (R/ )  Timer X Counter Current Value */\n        __IO uint32_t Control;    /* Offset: 0x008 (R/W)  Timer X Control */\n        __O  uint32_t IntClr;     /* Offset: 0x00C ( /W)  Timer X Interrupt Clear */\n        __I  uint32_t RIS;        /* Offset: 0x010 (R/ )  Timer X Raw Interrupt Status */\n        __I  uint32_t MIS;        /* Offset: 0x014 (R/ )  Timer X Masked Interrupt Status */\n        __IO uint32_t BGLoad;     /* Offset: 0x018 (R/W)  Background Load Register */\n             uint32_t RESERVED0[1];\n    } timer[2];\n    struct ELAPSED_TIMER_T {\n        __IO uint32_t ElapsedCtrl;\n        __I  uint32_t ElapsedVal;\n             uint32_t RESERVED1[6];\n    } elapsed_timer[2];\n};\n\n#define TIMER_CTRL_EN                   (1 << 7)\n#define TIMER_CTRL_MODE_PERIODIC        (1 << 6)\n#define TIMER_CTRL_INTEN                (1 << 5)\n#define TIMER_CTRL_PRESCALE_DIV_1       (0 << 2)\n#define TIMER_CTRL_PRESCALE_DIV_16      (1 << 2)\n#define TIMER_CTRL_PRESCALE_DIV_256     (2 << 2)\n#define TIMER_CTRL_PRESCALE_MASK        (3 << 2)\n#define TIMER_CTRL_SIZE_32_BIT          (1 << 1)\n#define TIMER_CTRL_ONESHOT              (1 << 0)\n\n#define TIMER_RIS_RIS                   (1 << 0)\n\n#define TIMER_MIS_MIS                   (1 << 0)\n\n#define TIMER_ELAPSED_CTRL_EN           (1 << 0)\n#define TIMER_ELAPSED_CTRL_CLR          (1 << 1)\n\n#endif\n\n"
  },
  {
    "path": "platform/hal/reg_transq.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_TRANSQ_H__\n#define __REG_TRANSQ_H__\n\n#include \"plat_types.h\"\n\n#define TRANSQ_SLOT_NUM                 32\n\nstruct TRANSQ_T\n{\n    __IO uint32_t CTRL;                 // 0x000\n    __IO uint32_t RMT_INTMASK;          // 0x004\n    __IO uint32_t RMT_INTSET;           // 0x008\n    __IO uint32_t LDONE_INTMASK;        // 0x00C\n    union {\n        __I  uint32_t LDONE_RIS;        // 0x010\n        __O  uint32_t LDONE_INTCLR;     // 0x010\n    } LDONE_ISC;\n    __IO uint32_t LERR_INTMASK;         // 0x014\n    union {\n        __I  uint32_t LERR_RIS;         // 0x018\n        __O  uint32_t LERR_INTCLR;      // 0x018\n    } LERR_ISC;\n    __IO uint32_t RESERVED_01C;         // 0x01C\n    __I  uint32_t LDONE_MIS;            // 0x020\n    __I  uint32_t LERR_MIS;             // 0x024\n    __IO uint32_t RESERVED_028[2];      // 0x028\n    struct {\n        __IO uint32_t ADDR;             // 0x030 + N * 8\n        __IO uint32_t LEN;              // 0x038 + N * 8\n    } WSLOT[TRANSQ_SLOT_NUM];\n    __IO uint32_t RESERVED_130[0x34];   // 0x130\n    union {\n        __I  uint32_t RMT_RIS;          // 0x200\n        __O  uint32_t RMT_INTCLR;       // 0x200\n    } RMT_ISC;\n    __IO uint32_t RMT_MIS;              // 0x204\n    __IO uint32_t RESERVED_208[10];     // 0x208\n    struct {\n        __I  uint32_t ADDR;             // 0x230 + N * 8\n        __I  uint32_t LEN;              // 0x238 + N * 8\n    } RSLOT[TRANSQ_SLOT_NUM];\n};\n\n// CTRL\n#define CTRL_REMOTE_IRQ_EN          (1 << 0)\n#define CTRL_LOCAL_DONE_IRQ_EN      (1 << 1)\n#define CTRL_LOCAL_ERR_IRQ_EN       (1 << 2)\n\n#define TRANSQ_BIT(n)               (1 << (n))\n\n#endif\n"
  },
  {
    "path": "platform/hal/reg_uart.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REG_UART_H__\n#define __REG_UART_H__\n\n#include \"plat_types.h\"\n\n// UART Registers\nstruct UART_T {\n    __IO uint32_t UARTDR;           // 0x000\n    union {\n        __I  uint32_t UARTRSR;      // 0x004\n        __O  uint32_t UARTECR;      // 0x004\n    };\n    uint32_t RESERVED_008[4];       // 0x008\n    __I  uint32_t UARTFR;           // 0x018\n    uint32_t RESERVED_01C;          // 0x01C\n    __IO uint32_t UARTILPR;         // 0x020\n    __IO uint32_t UARTIBRD;         // 0x024\n    __IO uint32_t UARTFBRD;         // 0x028\n    __IO uint32_t UARTLCR_H;        // 0x02C\n    __IO uint32_t UARTCR;           // 0x030\n    __IO uint32_t UARTIFLS;         // 0x034\n    __IO uint32_t UARTIMSC;         // 0x038\n    __I  uint32_t UARTRIS;          // 0x03C\n    __I  uint32_t UARTMIS;          // 0x040\n    __O  uint32_t UARTICR;          // 0x044\n    __IO uint32_t UARTDMACR;        // 0x048\n    uint32_t RESERVED_04C[997];     // 0x04C\n    __I  uint32_t UARTPID0;         // 0xFE0\n    __I  uint32_t UARTPID1;         // 0xFE4\n    __I  uint32_t UARTPID2;         // 0xFE8\n    __I  uint32_t UARTPID3;         // 0xFEC\n    __I  uint32_t UARTPCID0;        // 0xFF0\n    __I  uint32_t UARTPCID1;        // 0xFF4\n    __I  uint32_t UARTPCID2;        // 0xFF8\n    __I  uint32_t UARTPCID3;        // 0xFFC\n};\n\n// Data status bits\n#define UART_DATA_ERROR_MASK      0x0F00\n\n// Status reg bits\n#define UART_STATUS_ERROR_MASK    0x0F\n\n// Flag reg bits\n#define UARTFR_RI           (1 << 8)  // Ring indicator\n#define UARTFR_TXFE         (1 << 7)  // Transmit FIFO empty\n#define UARTFR_RXFF         (1 << 6)  // Receive  FIFO full\n#define UARTFR_TXFF         (1 << 5)  // Transmit FIFO full\n#define UARTFR_RXFE         (1 << 4)  // Receive  FIFO empty\n#define UARTFR_BUSY         (1 << 3)  // UART busy\n#define UARTFR_DCD          (1 << 2)  // Data carrier detect\n#define UARTFR_DSR          (1 << 1)  // Data set ready\n#define UARTFR_CTS          (1 << 0)  // Clear to send\n\n// Flag reg bits - alternative names\n#define UART_TX_EMPTY_FLAG_MASK   UARTFR_TXFE\n#define UART_RX_FULL_FLAG_MASK    UARTFR_RXFF\n#define UART_TX_FULL_FLAG_MASK    UARTFR_TXFF\n#define UART_RX_EMPTY_FLAG_MASK   UARTFR_RXFE\n#define UART_BUSY_FLAG_MASK       UARTFR_BUSY\n\n// Control reg bits\n#define UARTCR_CTSEN        (1 << 15) // CTS hardware flow control enable\n#define UARTCR_RTSEN        (1 << 14) // RTS hardware flow control enable\n#define UARTCR_RTS          (1 << 11) // Request to send\n#define UARTCR_DTR          (1 << 10) // Data transmit ready.\n#define UARTCR_RXE          (1 << 9)  // Receive enable\n#define UARTCR_TXE          (1 << 8)  // Transmit enable\n#define UARTCR_LBE          (1 << 7)  // Loopback enable\n#define UARTCR_UARTEN       (1 << 0)  // UART Enable\n\n// Line Control Register Bits\n#define UARTLCR_H_DMA_RT_EN         (1 << 15)\n#define UARTLCR_H_DMA_RT_CNT(n)     (((n) & 0x7F) << 8)\n#define UARTLCR_H_DMA_RT_CNT_MASK   (0x7F << 8)\n#define UARTLCR_H_DMA_RT_CNT_SHIFT  (8)\n#define UARTLCR_H_SPS               (1 << 7)  // Stick parity select\n#define UARTLCR_H_WLEN_8            (3 << 5)\n#define UARTLCR_H_WLEN_7            (2 << 5)\n#define UARTLCR_H_WLEN_6            (1 << 5)\n#define UARTLCR_H_WLEN_5            (0 << 5)\n#define UARTLCR_H_FEN               (1 << 4)  // FIFOs Enable\n#define UARTLCR_H_STP2              (1 << 3)  // Two stop bits select\n#define UARTLCR_H_EPS               (1 << 2)  // Even parity select\n#define UARTLCR_H_PEN               (1 << 1)  // Parity Enable\n#define UARTLCR_H_BRK               (1 << 0)  // Send break\n\n// UARTIFLS reg bits\n#define UARTIFLS_TXFIFO_LEVEL(n)      (((n) & 3) << 0)\n#define UARTIFLS_TXFIFO_LEVEL_MASK    (3 << 0)\n#define UARTIFLS_TXFIFO_LEVEL_SHIFT   (0)\n#define UARTIFLS_RXFIFO_LEVEL(n)      (((n) & 3) << 3)\n#define UARTIFLS_RXFIFO_LEVEL_MASK    (3 << 3)\n#define UARTIFLS_RXFIFO_LEVEL_SHIFT   (3)\n\n// DMACR reg bits\n#define UARTDMACR_RXDMAE    (1 << 0)\n#define UARTDMACR_TXDMAE    (1 << 1)\n#define UARTDMACR_DMAONERR  (1 << 2)\n\n#endif\n"
  },
  {
    "path": "platform/hal/reg_usb.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _REG_USB_H_\n#define _REG_USB_H_\n\n#include \"stdint.h\"\n#include \"plat_types.h\"\n\n// =============================================================================\n//  MACROS\n// =============================================================================\n#define SPFIFORAM_SIZE                          (1024)\n\n// =============================================================================\n//  TYPES\n// =============================================================================\n\n// ============================================================================\n// USBC_T\n// -----------------------------------------------------------------------------\n///\n// =============================================================================\nstruct USBC_T {\n    //common part\n    __IO uint32_t GOTGCTL;                  //0x00000000\n    __IO uint32_t GOTGINT;                  //0x00000004\n    __IO uint32_t GAHBCFG;                  //0x00000008\n    __IO uint32_t GUSBCFG;                  //0x0000000C\n    __IO uint32_t GRSTCTL;                  //0x00000010\n    __IO uint32_t GINTSTS;                  //0x00000014\n    __IO uint32_t GINTMSK;                  //0x00000018\n    __IO uint32_t GRXSTSR;                  //0x0000001C\n    __IO uint32_t GRXSTSP;                  //0x00000020\n    __IO uint32_t GRXFSIZ;                  //0x00000024\n    __IO uint32_t GNPTXFSIZ;                //0x00000028\n    __IO uint32_t GNPTXSTS;                 //0x0000002C\n    __IO uint32_t GI2CCTL;                  //0x00000030\n    __IO uint32_t GPVNDCTL;                 //0x00000034\n    __IO uint32_t GGPIO;                    //0x00000038\n    __IO uint32_t GUID;                     //0x0000003C\n    __IO uint32_t GSNPSID;                  //0x00000040\n    __IO uint32_t GHWCFG1;                  //0x00000044\n    __IO uint32_t GHWCFG2;                  //0x00000048\n    __IO uint32_t GHWCFG3;                  //0x0000004C\n    __IO uint32_t GHWCFG4;                  //0x00000050\n    __IO uint32_t GLPMCFG;                  //0x00000054\n    __IO uint32_t GPWRDN;                   //0x00000058\n    __IO uint32_t GDFIFOCFG;                //0x0000005C\n    __IO uint32_t GADPCTL;                  //0x00000060\n    __IO uint32_t Reserved_00000054[0x27];  //0x00000064\n    __IO uint32_t HPTXFSIZ;                 //0x00000100\n    union\n    {\n        __IO uint32_t DPTXFSIZn;            //0x00000104 - 13F\n        __IO uint32_t DIEPTXFn;             //0x00000104 - 13F\n    } DTXFSIZE[15];\n    __IO uint32_t Reserved_00000140[0xB0];  //0x00000140 - 3FF\n    //host part\n    __IO uint32_t HCFG;                     //0x00000400\n    __IO uint32_t HFIR;                     //0x00000404\n    __IO uint32_t HFNUM;                    //0x00000408\n    __IO uint32_t Reserved_0000040C;        //0x0000040C\n    __IO uint32_t HPTXSTS;                  //0x00000410\n    __IO uint32_t HAINT;                    //0x00000414\n    __IO uint32_t HAINTMSK;                 //0x00000418\n    __IO uint32_t Reserved_0000041C[9];     //0x0000041C\n    __IO uint32_t HPRT;                     //0x00000440\n    __IO uint32_t Reserved_00000444[0x2F];  //0x00000444\n    struct\n    {\n        __IO uint32_t HCCHARn;              //0x00000500+n*0x20\n        __IO uint32_t HCSPLTn;              //0x00000504+n*0x20\n        __IO uint32_t HCINTn;               //0x00000508+n*0x20\n        __IO uint32_t HCINTMSKn;            //0x0000050C+n*0x20\n        __IO uint32_t HCTSIZn;              //0x00000510+n*0x20\n        __IO uint32_t HCDMAn;               //0x00000514+n*0x20\n        __IO uint32_t Reserved_00000518;    //0x00000518+n*0x20\n        __IO uint32_t HCDMABn;              //0x0000051C+n*0x20\n    } HCSR[16];\n    __IO uint32_t Reserved_00000700[0x40];  //0x00000700\n    //device part\n    __IO uint32_t DCFG;                     //0x00000800\n    __IO uint32_t DCTL;                     //0x00000804\n    __IO uint32_t DSTS;                     //0x00000808\n    __IO uint32_t Reserved_0000080C;        //0x0000080C\n    __IO uint32_t DIEPMSK;                  //0x00000810\n    __IO uint32_t DOEPMSK;                  //0x00000814\n    __IO uint32_t DAINT;                    //0x00000818\n    __IO uint32_t DAINTMSK;                 //0x0000081C\n    __IO uint32_t DTKNQR1;                  //0x00000820\n    __IO uint32_t DTKNQR2;                  //0x00000824\n    __IO uint32_t DVBUSDIS;                 //0x00000828\n    __IO uint32_t DVBUSPULSE;               //0x0000082C\n    __IO uint32_t DTHRCTL;                  //0x00000830\n    __IO uint32_t DIEPEMPMSK;               //0x00000834\n    __IO uint32_t Reserved_00000838[0x32];  //0x00000838\n    __IO uint32_t DIEPCTL0;                 //0x00000900\n    __IO uint32_t Reserved_00000904;        //0x00000904\n    __IO uint32_t DIEPINT0;                 //0x00000908\n    __IO uint32_t Reserved_0000090C;        //0x0000090C\n    __IO uint32_t DIEPTSIZ0;                //0x00000910\n    __IO uint32_t DIEPDMA0;                 //0x00000914\n    __IO uint32_t DIEPFSTS0;                //0x00000918\n    __IO uint32_t DIEPDMAB0;                //0x0000091C\n    struct\n    {\n        __IO uint32_t DIEPCTL;              //0x00000920\n        __IO uint32_t Reserved_00000924;    //0x00000924\n        __IO uint32_t DIEPINT;              //0x00000928\n        __IO uint32_t Reserved_0000092C;    //0x0000092C\n        __IO uint32_t DIEPTSIZ;             //0x00000930\n        __IO uint32_t DIEPDMA;              //0x00000934\n        __IO uint32_t DIEPFSTS;             //0x00000938\n        __IO uint32_t DIEPDMAB;             //0x0000093C\n    } DIEPnCONFIG[15];\n    __IO uint32_t DOEPCTL0;                 //0x00000B00\n    __IO uint32_t Reserved_00000B04;        //0x00000B04\n    __IO uint32_t DOEPINT0;                 //0x00000B08\n    __IO uint32_t Reserved_00000B0C;        //0x00000B0C\n    __IO uint32_t DOEPTSIZ0;                //0x00000B10\n    __IO uint32_t DOEPDMA0;                 //0x00000B14\n    __IO uint32_t Reserved_00000B18;        //0x00000B18\n    __IO uint32_t DOEPDMAB0;                //0x00000B1C\n    struct\n    {\n        __IO uint32_t DOEPCTL;              //0x00000B20\n        __IO uint32_t Reserved_00000B24;    //0x00000B24\n        __IO uint32_t DOEPINT;              //0x00000B28\n        __IO uint32_t Reserved_00000B2C;    //0x00000B2C\n        __IO uint32_t DOEPTSIZ;             //0x00000B30\n        __IO uint32_t DOEPDMA;              //0x00000B34\n        __IO uint32_t Reserved_00000B38;    //0x00000B38\n        __IO uint32_t DOEPDMAB;             //0x00000B3C\n    } DOEPnCONFIG[15];\n    __IO uint32_t Reserved_00000D00[0x40];  //0x00000D00\n    __IO uint32_t PCGCCTL;                  //0x00000E00\n    __IO uint32_t Reserved_00000E04;        //0x00000E04\n    __IO uint32_t TPORTDBG0;                //0x00000E08\n    __IO uint32_t TPORTDBG1;                //0x00000E0C\n    __IO uint32_t Reserved_00000E0C[0x7C];  //0x00000E10\n    struct\n    {\n        __IO uint32_t TxRxData;             //0x00001000\n        __IO uint32_t Reserved_00001004[0x3FF]; //0x00001004\n    } EPnFIFO[16];\n    __IO uint32_t Reserved_00011000[0x3C00]; //0x00011000\n    struct\n    {\n        __IO uint32_t RAMData;              //0x00020000\n    } SPFIFORAM[SPFIFORAM_SIZE];\n};\n\n//GOTGCTL\n#define USBC_SESREQSCS              (1<<0)\n#define USBC_SESREQSCS_MASK         (1<<0)\n#define USBC_SESREQSCS_SHIFT        (0)\n#define USBC_SESREQ                 (1<<1)\n#define USBC_SESREQ_MASK            (1<<1)\n#define USBC_SESREQ_SHIFT           (1)\n#define USBC_HSTNEGSCS              (1<<8)\n#define USBC_HSTNEGSCS_MASK         (1<<8)\n#define USBC_HSTNEGSCS_SHIFT        (8)\n#define USBC_HNPREQ                 (1<<9)\n#define USBC_HNPREQ_MASK            (1<<9)\n#define USBC_HNPREQ_SHIFT           (9)\n#define USBC_HSTSETHNPEN            (1<<10)\n#define USBC_HSTSETHNPEN_MASK       (1<<10)\n#define USBC_HSTSETHNPEN_SHIFT      (10)\n#define USBC_DEVHNPEN               (1<<11)\n#define USBC_DEVHNPEN_MASK          (1<<11)\n#define USBC_DEVHNPEN_SHIFT         (11)\n#define USBC_CONLDSTS               (1<<16)\n#define USBC_CONLDSTS_MASK          (1<<16)\n#define USBC_CONLDSTS_SHIFT         (16)\n#define USBC_DBNCTIME               (1<<17)\n#define USBC_DBNCTIME_MASK          (1<<17)\n#define USBC_DBNCTIME_SHIFT         (17)\n#define USBC_ASESVLD                (1<<18)\n#define USBC_ASESVLD_MASK           (1<<18)\n#define USBC_ASESVLD_SHIFT          (18)\n#define USBC_BSESVLD                (1<<19)\n#define USBC_BSESVLD_MASK           (1<<19)\n#define USBC_BSESVLD_SHIFT          (19)\n\n//GOTGINT\n#define USBC_SESENDDET              (1<<2)\n#define USBC_SESENDDET_MASK         (1<<2)\n#define USBC_SESENDDET_SHIFT        (2)\n#define USBC_SESREQSUCSTSCHNG       (1<<8)\n#define USBC_SESREQSUCSTSCHNG_MASK  (1<<8)\n#define USBC_SESREQSUCSTSCHNG_SHIFT (8)\n#define USBC_HSTNEGSUCSTSCHNG       (1<<9)\n#define USBC_HSTNEGSUCSTSCHNG_MASK  (1<<9)\n#define USBC_HSTNEGSUCSTSCHNG_SHIFT (9)\n#define USBC_HSTNEGDET              (1<<17)\n#define USBC_HSTNEGDET_MASK         (1<<17)\n#define USBC_HSTNEGDET_SHIFT        (17)\n#define USBC_ADEVTOUTCHG            (1<<18)\n#define USBC_ADEVTOUTCHG_MASK       (1<<18)\n#define USBC_ADEVTOUTCHG_SHIFT      (18)\n#define USBC_DBNCEDONE              (1<<19)\n#define USBC_DBNCEDONE_MASK         (1<<19)\n#define USBC_DBNCEDONE_SHIFT        (19)\n\n//GAHBCFG\n#define USBC_GLBLINTRMSK            (1<<0)\n#define USBC_GLBLINTRMSK_MASK       (1<<0)\n#define USBC_GLBLINTRMSK_SHIFT      (0)\n#define USBC_HBSTLEN(n)             (((n)&15)<<1)\n#define USBC_HBSTLEN_MASK           (15<<1)\n#define USBC_HBSTLEN_SHIFT          (1)\n#define USBC_DMAEN                  (1<<5)\n#define USBC_DMAEN_MASK             (1<<5)\n#define USBC_DMAEN_SHIFT            (5)\n#define USBC_NPTXFEMPLVL            (1<<7)\n#define USBC_NPTXFEMPLVL_MASK       (1<<7)\n#define USBC_NPTXFEMPLVL_SHIFT      (7)\n#define USBC_PTXFEMPLVL             (1<<8)\n#define USBC_PTXFEMPLVL_MASK        (1<<8)\n#define USBC_PTXFEMPLVL_SHIFT       (8)\n\n//GUSBCFG\n#define USBC_TOUTCAL(n)             (((n)&7)<<0)\n#define USBC_TOUTCAL_MASK           (7<<0)\n#define USBC_TOUTCAL_SHIFT          (0)\n#define USBC_PHYIF                  (1<<3)\n#define USBC_PHYIF_MASK             (1<<3)\n#define USBC_PHYIF_SHIFT            (3)\n#define USBC_ULPI_UTMI_SEL          (1<<4)\n#define USBC_ULPI_UTMI_SEL_MASK     (1<<4)\n#define USBC_ULPI_UTMI_SEL_SHIFT    (4)\n#define USBC_FSINTF                 (1<<5)\n#define USBC_FSINTF_MASK            (1<<5)\n#define USBC_FSINTF_SHIFT           (5)\n#define USBC_PHYSEL                 (1<<6)\n#define USBC_PHYSEL_MASK            (1<<6)\n#define USBC_PHYSEL_SHIFT           (6)\n#define USBC_DDRSEL                 (1<<7)\n#define USBC_DDRSEL_MASK            (1<<7)\n#define USBC_DDRSEL_SHIFT           (7)\n#define USBC_SRPCAP                 (1<<8)\n#define USBC_SRPCAP_MASK            (1<<8)\n#define USBC_SRPCAP_SHIFT           (8)\n#define USBC_HNPCAP                 (1<<9)\n#define USBC_HNPCAP_MASK            (1<<9)\n#define USBC_HNPCAP_SHIFT           (9)\n#define USBC_USBTRDTIM(n)           (((n)&15)<<10)\n#define USBC_USBTRDTIM_MASK         (15<<10)\n#define USBC_USBTRDTIM_SHIFT        (10)\n#define USBC_PHYPWRCLKSEL           (1<<15)\n#define USBC_PHYPWRCLKSEL_MASK      (1<<15)\n#define USBC_PHYPWRCLKSEL_SHIFT     (15)\n#define USBC_OTGI2CSEL              (1<<16)\n#define USBC_OTGI2CSEL_MASK         (1<<16)\n#define USBC_OTGI2CSEL_SHIFT        (16)\n#define USBC_ULPIFSLS               (1<<17)\n#define USBC_ULPIFSLS_MASK          (1<<17)\n#define USBC_ULPIFSLS_SHIFT         (17)\n#define USBC_ULPIAUTORES            (1<<18)\n#define USBC_ULPIAUTORES_MASK       (1<<18)\n#define USBC_ULPIAUTORES_SHIFT      (18)\n#define USBC_ULPICLKSUSM            (1<<19)\n#define USBC_ULPICLKSUSM_MASK       (1<<19)\n#define USBC_ULPICLKSUSM_SHIFT      (19)\n#define USBC_ULPIEXTVBUSDRV         (1<<20)\n#define USBC_ULPIEXTVBUSDRV_MASK    (1<<20)\n#define USBC_ULPIEXTVBUSDRV_SHIFT   (20)\n#define USBC_ULPIEXTVBUSINDICATOR   (1<<21)\n#define USBC_ULPIEXTVBUSINDICATOR_MASK (1<<21)\n#define USBC_ULPIEXTVBUSINDICATOR_SHIFT (21)\n#define USBC_TERMSELDLPULSE         (1<<22)\n#define USBC_TERMSELDLPULSE_MASK    (1<<22)\n#define USBC_TERMSELDLPULSE_SHIFT   (22)\n#define USBC_FORCEHSTMODE           (1<<29)\n#define USBC_FORCEHSTMODE_MASK      (1<<29)\n#define USBC_FORCEHSTMODE_SHIFT     (29)\n#define USBC_FORCEDEVMODE           (1<<30)\n#define USBC_FORCEDEVMODE_MASK      (1<<30)\n#define USBC_FORCEDEVMODE_SHIFT     (30)\n#define USBC_CORRUPTTXPACKET        (1<<31)\n#define USBC_CORRUPTTXPACKET_MASK   (1<<31)\n#define USBC_CORRUPTTXPACKET_SHIFT  (31)\n\n//GRSTCTL\n#define USBC_CSFTRST                (1<<0)\n#define USBC_CSFTRST_MASK           (1<<0)\n#define USBC_CSFTRST_SHIFT          (0)\n#define USBC_FRMCNTRRST             (1<<2)\n#define USBC_FRMCNTRRST_MASK        (1<<2)\n#define USBC_FRMCNTRRST_SHIFT       (2)\n#define USBC_INTKNQFLSH             (1<<3)\n#define USBC_INTKNQFLSH_MASK        (1<<3)\n#define USBC_INTKNQFLSH_SHIFT       (3)\n#define USBC_RXFFLSH                (1<<4)\n#define USBC_RXFFLSH_MASK           (1<<4)\n#define USBC_RXFFLSH_SHIFT          (4)\n#define USBC_TXFFLSH                (1<<5)\n#define USBC_TXFFLSH_MASK           (1<<5)\n#define USBC_TXFFLSH_SHIFT          (5)\n#define USBC_TXFNUM(n)              (((n)&31)<<6)\n#define USBC_TXFNUM_MASK            (31<<6)\n#define USBC_TXFNUM_SHIFT           (6)\n#define USBC_DMAREQ                 (1<<30)\n#define USBC_DMAREQ_MASK            (1<<30)\n#define USBC_DMAREQ_SHIFT           (30)\n#define USBC_AHBIDLE                (1<<31)\n#define USBC_AHBIDLE_MASK           (1<<31)\n#define USBC_AHBIDLE_SHIFT          (31)\n\n//GINTSTS\n#define USBC_CURMOD                 (1<<0)\n#define USBC_CURMOD_MASK            (1<<0)\n#define USBC_CURMOD_SHIFT           (0)\n#define USBC_MODEMIS                (1<<1)\n#define USBC_MODEMIS_MASK           (1<<1)\n#define USBC_MODEMIS_SHIFT          (1)\n#define USBC_OTGINT                 (1<<2)\n#define USBC_OTGINT_MASK            (1<<2)\n#define USBC_OTGINT_SHIFT           (2)\n#define USBC_SOF                    (1<<3)\n#define USBC_SOF_MASK               (1<<3)\n#define USBC_SOF_SHIFT              (3)\n#define USBC_RXFLVL                 (1<<4)\n#define USBC_RXFLVL_MASK            (1<<4)\n#define USBC_RXFLVL_SHIFT           (4)\n#define USBC_NPTXFEMP               (1<<5)\n#define USBC_NPTXFEMP_MASK          (1<<5)\n#define USBC_NPTXFEMP_SHIFT         (5)\n#define USBC_GINNAKEFF              (1<<6)\n#define USBC_GINNAKEFF_MASK         (1<<6)\n#define USBC_GINNAKEFF_SHIFT        (6)\n#define USBC_GOUTNAKEFF             (1<<7)\n#define USBC_GOUTNAKEFF_MASK        (1<<7)\n#define USBC_GOUTNAKEFF_SHIFT       (7)\n#define USBC_ULPICKINT              (1<<8)\n#define USBC_ULPICKINT_MASK         (1<<8)\n#define USBC_ULPICKINT_SHIFT        (8)\n#define USBC_I2CINT                 (1<<9)\n#define USBC_I2CINT_MASK            (1<<9)\n#define USBC_I2CINT_SHIFT           (9)\n#define USBC_ERLYSUSP               (1<<10)\n#define USBC_ERLYSUSP_MASK          (1<<10)\n#define USBC_ERLYSUSP_SHIFT         (10)\n#define USBC_USBSUSP                (1<<11)\n#define USBC_USBSUSP_MASK           (1<<11)\n#define USBC_USBSUSP_SHIFT          (11)\n#define USBC_USBRST                 (1<<12)\n#define USBC_USBRST_MASK            (1<<12)\n#define USBC_USBRST_SHIFT           (12)\n#define USBC_ENUMDONE               (1<<13)\n#define USBC_ENUMDONE_MASK          (1<<13)\n#define USBC_ENUMDONE_SHIFT         (13)\n#define USBC_ISOOUTDROP             (1<<14)\n#define USBC_ISOOUTDROP_MASK        (1<<14)\n#define USBC_ISOOUTDROP_SHIFT       (14)\n#define USBC_EOPF                   (1<<15)\n#define USBC_EOPF_MASK              (1<<15)\n#define USBC_EOPF_SHIFT             (15)\n#define USBC_EPMIS                  (1<<17)\n#define USBC_EPMIS_MASK             (1<<17)\n#define USBC_EPMIS_SHIFT            (17)\n#define USBC_IEPINT                 (1<<18)\n#define USBC_IEPINT_MASK            (1<<18)\n#define USBC_IEPINT_SHIFT           (18)\n#define USBC_OEPINT                 (1<<19)\n#define USBC_OEPINT_MASK            (1<<19)\n#define USBC_OEPINT_SHIFT           (19)\n#define USBC_INCOMPISOIN            (1<<20)\n#define USBC_INCOMPISOIN_MASK       (1<<20)\n#define USBC_INCOMPISOIN_SHIFT      (20)\n#define USBC_INCOMPISOOUT           (1<<21)\n#define USBC_INCOMPISOOUT_MASK      (1<<21)\n#define USBC_INCOMPISOOUT_SHIFT     (21)\n#define USBC_FETSUSP                (1<<22)\n#define USBC_FETSUSP_MASK           (1<<22)\n#define USBC_FETSUSP_SHIFT          (22)\n#define USBC_PRTINT                 (1<<24)\n#define USBC_PRTINT_MASK            (1<<24)\n#define USBC_PRTINT_SHIFT           (24)\n#define USBC_HCHINT                 (1<<25)\n#define USBC_HCHINT_MASK            (1<<25)\n#define USBC_HCHINT_SHIFT           (25)\n#define USBC_PTXFEMP                (1<<26)\n#define USBC_PTXFEMP_MASK           (1<<26)\n#define USBC_PTXFEMP_SHIFT          (26)\n#define USBC_LPM_INT                (1<<27)\n#define USBC_LPM_INT_MASK           (1<<27)\n#define USBC_LPM_INT_SHIFT          (27)\n#define USBC_CONLDSTSCHNG           (1<<28)\n#define USBC_CONLDSTSCHNG_MASK      (1<<28)\n#define USBC_CONLDSTSCHNG_SHIFT     (28)\n#define USBC_DISCONNINT             (1<<29)\n#define USBC_DISCONNINT_MASK        (1<<29)\n#define USBC_DISCONNINT_SHIFT       (29)\n#define USBC_SESSREQINT             (1<<30)\n#define USBC_SESSREQINT_MASK        (1<<30)\n#define USBC_SESSREQINT_SHIFT       (30)\n#define USBC_WKUPINT                (1<<31)\n#define USBC_WKUPINT_MASK           (1<<31)\n#define USBC_WKUPINT_SHIFT          (31)\n\n//GINTMSK\n//#define USBC_MODEMIS              (1<<1)\n//#define USBC_MODEMIS_MASK         (1<<1)\n//#define USBC_MODEMIS_SHIFT        (1)\n//#define USBC_OTGINT               (1<<2)\n//#define USBC_OTGINT_MASK          (1<<2)\n//#define USBC_OTGINT_SHIFT         (2)\n//#define USBC_SOF                  (1<<3)\n//#define USBC_SOF_MASK             (1<<3)\n//#define USBC_SOF_SHIFT            (3)\n//#define USBC_RXFLVL               (1<<4)\n//#define USBC_RXFLVL_MASK          (1<<4)\n//#define USBC_RXFLVL_SHIFT         (4)\n//#define USBC_NPTXFEMP             (1<<5)\n//#define USBC_NPTXFEMP_MASK        (1<<5)\n//#define USBC_NPTXFEMP_SHIFT       (5)\n//#define USBC_GINNAKEFF            (1<<6)\n//#define USBC_GINNAKEFF_MASK       (1<<6)\n//#define USBC_GINNAKEFF_SHIFT      (6)\n//#define USBC_GOUTNAKEFF           (1<<7)\n//#define USBC_GOUTNAKEFF_MASK      (1<<7)\n//#define USBC_GOUTNAKEFF_SHIFT     (7)\n//#define USBC_ULPICKINT            (1<<8)\n//#define USBC_ULPICKINT_MASK       (1<<8)\n//#define USBC_ULPICKINT_SHIFT      (8)\n//#define USBC_I2CINT               (1<<9)\n//#define USBC_I2CINT_MASK          (1<<9)\n//#define USBC_I2CINT_SHIFT         (9)\n//#define USBC_ERLYSUSP             (1<<10)\n//#define USBC_ERLYSUSP_MASK        (1<<10)\n//#define USBC_ERLYSUSP_SHIFT       (10)\n//#define USBC_USBSUSP              (1<<11)\n//#define USBC_USBSUSP_MASK         (1<<11)\n//#define USBC_USBSUSP_SHIFT        (11)\n//#define USBC_USBRST               (1<<12)\n//#define USBC_USBRST_MASK          (1<<12)\n//#define USBC_USBRST_SHIFT         (12)\n//#define USBC_ENUMDONE             (1<<13)\n//#define USBC_ENUMDONE_MASK        (1<<13)\n//#define USBC_ENUMDONE_SHIFT       (13)\n//#define USBC_ISOOUTDROP           (1<<14)\n//#define USBC_ISOOUTDROP_MASK      (1<<14)\n//#define USBC_ISOOUTDROP_SHIFT     (14)\n//#define USBC_EOPF                 (1<<15)\n//#define USBC_EOPF_MASK            (1<<15)\n//#define USBC_EOPF_SHIFT           (15)\n//#define USBC_EPMIS                (1<<17)\n//#define USBC_EPMIS_MASK           (1<<17)\n//#define USBC_EPMIS_SHIFT          (17)\n//#define USBC_IEPINT               (1<<18)\n//#define USBC_IEPINT_MASK          (1<<18)\n//#define USBC_IEPINT_SHIFT         (18)\n//#define USBC_OEPINT               (1<<19)\n//#define USBC_OEPINT_MASK          (1<<19)\n//#define USBC_OEPINT_SHIFT         (19)\n//#define USBC_INCOMPLSOIN          (1<<20)\n//#define USBC_INCOMPLSOIN_MASK     (1<<20)\n//#define USBC_INCOMPLSOIN_SHIFT    (20)\n//#define USBC_INCOMPIP             (1<<21)\n//#define USBC_INCOMPIP_MASK        (1<<21)\n//#define USBC_INCOMPIP_SHIFT       (21)\n//#define USBC_FETSUSP              (1<<22)\n//#define USBC_FETSUSP_MASK         (1<<22)\n//#define USBC_FETSUSP_SHIFT        (22)\n//#define USBC_PRTINT               (1<<24)\n//#define USBC_PRTINT_MASK          (1<<24)\n//#define USBC_PRTINT_SHIFT         (24)\n//#define USBC_HCHINT               (1<<25)\n//#define USBC_HCHINT_MASK          (1<<25)\n//#define USBC_HCHINT_SHIFT         (25)\n//#define USBC_PTXFEMP              (1<<26)\n//#define USBC_PTXFEMP_MASK         (1<<26)\n//#define USBC_PTXFEMP_SHIFT        (26)\n//#define USBC_CONLDSTSCHNG         (1<<28)\n//#define USBC_CONLDSTSCHNG_MASK    (1<<28)\n//#define USBC_CONLDSTSCHNG_SHIFT   (28)\n//#define USBC_DISCONNINT           (1<<29)\n//#define USBC_DISCONNINT_MASK      (1<<29)\n//#define USBC_DISCONNINT_SHIFT     (29)\n//#define USBC_SESSREQINT           (1<<30)\n//#define USBC_SESSREQINT_MASK      (1<<30)\n//#define USBC_SESSREQINT_SHIFT     (30)\n//#define USBC_WKUPINT              (1<<31)\n//#define USBC_WKUPINT_MASK         (1<<31)\n//#define USBC_WKUPINT_SHIFT        (31)\n\n//GRXSTSR\n#define USBC_EPNUM(n)               (((n)&15)<<0)\n#define USBC_EPNUM_MASK             (15<<0)\n#define USBC_EPNUM_SHIFT            (0)\n#define USBC_BCNT(n)                (((n)&0x7FF)<<4)\n#define USBC_BCNT_MASK              (0x7FF<<4)\n#define USBC_BCNT_SHIFT             (4)\n#define USBC_DPID(n)                (((n)&3)<<15)\n#define USBC_DPID_MASK              (3<<15)\n#define USBC_DPID_SHIFT             (15)\n#define USBC_PKTSTS(n)              (((n)&15)<<17)\n#define USBC_PKTSTS_MASK            (15<<17)\n#define USBC_PKTSTS_SHIFT           (17)\n#define USBC_FN(n)                  (((n)&15)<<21)\n#define USBC_FN_MASK                (15<<21)\n#define USBC_FN_SHIFT               (21)\n\n//GRXSTSP\n//#define USBC_EPNUM(n)             (((n)&15)<<0)\n//#define USBC_EPNUM_MASK           (15<<0)\n//#define USBC_EPNUM_SHIFT          (0)\n//#define USBC_BCNT(n)              (((n)&0x7FF)<<4)\n//#define USBC_BCNT_MASK            (0x7FF<<4)\n//#define USBC_BCNT_SHIFT           (4)\n//#define USBC_DPID(n)              (((n)&3)<<15)\n//#define USBC_DPID_MASK            (3<<15)\n//#define USBC_DPID_SHIFT           (15)\n//#define USBC_PKTSTS(n)            (((n)&15)<<17)\n//#define USBC_PKTSTS_MASK          (15<<17)\n//#define USBC_PKTSTS_SHIFT         (17)\n//#define USBC_FN(n)                (((n)&15)<<21)\n//#define USBC_FN_MASK              (15<<21)\n//#define USBC_FN_SHIFT             (21)\n\n//GRXFSIZ\n#define USBC_RXFDEP(n)              (((n)&0xFFFF)<<0)\n#define USBC_RXFDEP_MASK            (0xFFFF<<0)\n#define USBC_RXFDEP_SHIFT           (0)\n\n//GNPTXFSIZ\n#define USBC_NPTXFSTADDR(n)         (((n)&0xFFFF)<<0)\n#define USBC_NPTXFSTADDR_MASK       (0xFFFF<<0)\n#define USBC_NPTXFSTADDR_SHIFT      (0)\n#define USBC_NPTXFDEPS(n)           (((n)&0xFFFF)<<16)\n#define USBC_NPTXFDEPS_MASK         (0xFFFF<<16)\n#define USBC_NPTXFDEPS_SHIFT        (16)\n\n//GNPTXSTS\n#define USBC_NPTXFSPCAVAIL(n)       (((n)&0xFFFF)<<0)\n#define USBC_NPTXFSPCAVAIL_MASK     (0xFFFF<<0)\n#define USBC_NPTXFSPCAVAIL_SHIFT    (0)\n#define USBC_NPTXQSPCAVAIL(n)       (((n)&0xFF)<<16)\n#define USBC_NPTXQSPCAVAIL_MASK     (0xFF<<16)\n#define USBC_NPTXQSPCAVAIL_SHIFT    (16)\n#define USBC_NPTXQTOP(n)            (((n)&0x7F)<<24)\n#define USBC_NPTXQTOP_MASK          (0x7F<<24)\n#define USBC_NPTXQTOP_SHIFT         (24)\n\n//GPVNDCTL\n#define USBC_GPVNDCTL_DISULPIDRVR                    (1<<31)\n#define USBC_GPVNDCTL_DISULPIDRVR_MASK                    (1<<31)\n#define USBC_GPVNDCTL_DISULPIDRVR_SHIFT                    (31)\n#define USBC_GPVNDCTL_VSTSDONE                    (1<<27)\n#define USBC_GPVNDCTL_VSTSDONE_MASK                    (1<<27)\n#define USBC_GPVNDCTL_VSTSDONE_SHIFT                    (27)\n#define USBC_GPVNDCTL_VSTSBSY                    (1<<26)\n#define USBC_GPVNDCTL_VSTSBSY_MASK                    (1<<26)\n#define USBC_GPVNDCTL_VSTSBSY_SHIFT                    (26)\n#define USBC_GPVNDCTL_NEWREGREQ                    (1<<25)\n#define USBC_GPVNDCTL_NEWREGREQ_MASK                    (1<<25)\n#define USBC_GPVNDCTL_NEWREGREQ_SHIFT                    (25)\n#define USBC_GPVNDCTL_REGWR                    (1<<22)\n#define USBC_GPVNDCTL_REGWR_MASK                    (1<<22)\n#define USBC_GPVNDCTL_REGWR_SHIFT                    (22)\n#define USBC_GPVNDCTL_REGADDR(n)                    (((n)&0x3f)<<16)\n#define USBC_GPVNDCTL_REGADDR_MASK                    (0x3f<<16)\n#define USBC_GPVNDCTL_REGADDR_SHIFT                    (16)\n#define USBC_GPVNDCTL_EXTREGADDR(n)                    (((n)&0xff)<<8)\n#define USBC_GPVNDCTL_EXTREGADDR_MASK                    (0xff<<8)\n#define USBC_GPVNDCTL_EXTREGADDR_SHIFT                    (8)\n#define USBC_GPVNDCTL_REGDATA(n)                    (((n)&0xff)<<0)\n#define USBC_GPVNDCTL_REGDATA_MASK                    (0xff<<0)\n#define USBC_GPVNDCTL_REGDATA_SHIFT                    (0)\n\n//GUID\n#define USBC_USERID(n)              (((n)&0xFFFFFFFF)<<0)\n#define USBC_USERID_MASK            (0xFFFFFFFF<<0)\n#define USBC_USERID_SHIFT           (0)\n\n//GSNPSID\n#define USBC_SYNOPSYSID(n)          (((n)&0xFFFFFFFF)<<0)\n#define USBC_SYNOPSYSID_MASK        (0xFFFFFFFF<<0)\n#define USBC_SYNOPSYSID_SHIFT       (0)\n\n//GHWCFG1\n#define USBC_EPDIR(n)               (((n)&0xFFFFFFFF)<<0)\n#define USBC_EPDIR_MASK             (0xFFFFFFFF<<0)\n#define USBC_EPDIR_SHIFT            (0)\n\n//GHWCFG2\n#define USBC_OTGMODE(n)             (((n)&7)<<0)\n#define USBC_OTGMODE_MASK           (7<<0)\n#define USBC_OTGMODE_SHIFT          (0)\n#define USBC_OTGARCH(n)             (((n)&3)<<3)\n#define USBC_OTGARCH_MASK           (3<<3)\n#define USBC_OTGARCH_SHIFT          (3)\n#define USBC_SINGPNT                (1<<5)\n#define USBC_SINGPNT_MASK           (1<<5)\n#define USBC_SINGPNT_SHIFT          (5)\n#define USBC_HSPHYTYPE(n)           (((n)&3)<<6)\n#define USBC_HSPHYTYPE_MASK         (3<<6)\n#define USBC_HSPHYTYPE_SHIFT        (6)\n#define USBC_FSPHYTYPE(n)           (((n)&3)<<8)\n#define USBC_FSPHYTYPE_MASK         (3<<8)\n#define USBC_FSPHYTYPE_SHIFT        (8)\n#define USBC_NUMDEVEPS(n)           (((n)&15)<<10)\n#define USBC_NUMDEVEPS_MASK         (15<<10)\n#define USBC_NUMDEVEPS_SHIFT        (10)\n#define USBC_NUMHSTCHNL(n)          (((n)&15)<<14)\n#define USBC_NUMHSTCHNL_MASK        (15<<14)\n#define USBC_NUMHSTCHNL_SHIFT       (14)\n#define USBC_PERIOSUPPORT           (1<<18)\n#define USBC_PERIOSUPPORT_MASK      (1<<18)\n#define USBC_PERIOSUPPORT_SHIFT     (18)\n#define USBC_DYNFIFOSIZING          (1<<19)\n#define USBC_DYNFIFOSIZING_MASK     (1<<19)\n#define USBC_DYNFIFOSIZING_SHIFT    (19)\n#define USBC_NPTXQDEPTH(n)          (((n)&3)<<22)\n#define USBC_NPTXQDEPTH_MASK        (3<<22)\n#define USBC_NPTXQDEPTH_SHIFT       (22)\n#define USBC_PTXQDEPTH(n)           (((n)&3)<<24)\n#define USBC_PTXQDEPTH_MASK         (3<<24)\n#define USBC_PTXQDEPTH_SHIFT        (24)\n#define USBC_TKNQDEPTH(n)           (((n)&31)<<26)\n#define USBC_TKNQDEPTH_MASK         (31<<26)\n#define USBC_TKNQDEPTH_SHIFT        (26)\n\n//GHWCFG3\n#define USBC_XFERSIZEWIDTH(n)       (((n)&15)<<0)\n#define USBC_XFERSIZEWIDTH_MASK     (15<<0)\n#define USBC_XFERSIZEWIDTH_SHIFT    (0)\n#define USBC_PKTSIZEWIDTH(n)        (((n)&7)<<4)\n#define USBC_PKTSIZEWIDTH_MASK      (7<<4)\n#define USBC_PKTSIZEWIDTH_SHIFT     (4)\n#define USBC_OTGEN                  (1<<7)\n#define USBC_OTGEN_MASK             (1<<7)\n#define USBC_OTGEN_SHIFT            (7)\n#define USBC_I2CINTSEL              (1<<8)\n#define USBC_I2CINTSEL_MASK         (1<<8)\n#define USBC_I2CINTSEL_SHIFT        (8)\n//#define USBC_VNDCTLSUPT             (1<<9)\n#define USBC_VNDCTLSUPT(n)             (((n)&0x1)<<9)\n#define USBC_VNDCTLSUPT_MASK        (1<<9)\n#define USBC_VNDCTLSUPT_SHIFT       (9)\n#define USBC_OPTFEATURE             (1<<10)\n#define USBC_OPTFEATURE_MASK        (1<<10)\n#define USBC_OPTFEATURE_SHIFT       (10)\n#define USBC_RSTTYPE                (1<<11)\n#define USBC_RSTTYPE_MASK           (1<<11)\n#define USBC_RSTTYPE_SHIFT          (11)\n#define USBC_DFIFODEPTH(n)          (((n)&0xFFFF)<<16)\n#define USBC_DFIFODEPTH_MASK        (0xFFFF<<16)\n#define USBC_DFIFODEPTH_SHIFT       (16)\n\n//GHWCFG4\n#define USBC_NUMDEVPERIOEPS(n)      (((n)&15)<<0)\n#define USBC_NUMDEVPERIOEPS_MASK    (15<<0)\n#define USBC_NUMDEVPERIOEPS_SHIFT   (0)\n#define USBC_ENABLEPWROPT           (1<<4)\n#define USBC_ENABLEPWROPT_MASK      (1<<4)\n#define USBC_ENABLEPWROPT_SHIFT     (4)\n#define USBC_AHBFREQ                (1<<5)\n#define USBC_AHBFREQ_MASK           (1<<5)\n#define USBC_AHBFREQ_SHIFT          (5)\n#define USBC_PHYDATAWIDTH(n)        (((n)&3)<<14)\n#define USBC_PHYDATAWIDTH_MASK      (3<<14)\n#define USBC_PHYDATAWIDTH_SHIFT     (14)\n#define USBC_NUMCTLEPS(n)           (((n)&15)<<16)\n#define USBC_NUMCTLEPS_MASK         (15<<16)\n#define USBC_NUMCTLEPS_SHIFT        (16)\n#define USBC_IDDIGFLTR              (1<<20)\n#define USBC_IDDIGFLTR_MASK         (1<<20)\n#define USBC_IDDIGFLTR_SHIFT        (20)\n#define USBC_VBUSVALIDFLTR          (1<<21)\n#define USBC_VBUSVALIDFLTR_MASK     (1<<21)\n#define USBC_VBUSVALIDFLTR_SHIFT    (21)\n#define USBC_AVALIDFLTR             (1<<22)\n#define USBC_AVALIDFLTR_MASK        (1<<22)\n#define USBC_AVALIDFLTR_SHIFT       (22)\n#define USBC_BVALIDFLTR             (1<<23)\n#define USBC_BVALIDFLTR_MASK        (1<<23)\n#define USBC_BVALIDFLTR_SHIFT       (23)\n#define USBC_SESSENDFLTR            (1<<24)\n#define USBC_SESSENDFLTR_MASK       (1<<24)\n#define USBC_SESSENDFLTR_SHIFT      (24)\n#define USBC_DEFIFOMODE             (1<<25)\n#define USBC_DEFIFOMODE_MASK        (1<<25)\n#define USBC_DEFIFOMODE_SHIFT       (25)\n#define USBC_INEPS(n)               (((n)&15)<<26)\n#define USBC_INEPS_MASK             (15<<26)\n#define USBC_INEPS_SHIFT            (26)\n\n//GLPMCFG\n#define USBC_LPMCAP                 (1<<0)\n#define USBC_LPMCAP_MASK            (1<<0)\n#define USBC_LPMCAP_SHIFT           (0)\n#define USBC_APPL1RES               (1<<1)\n#define USBC_APPL1RES_MASK          (1<<1)\n#define USBC_APPL1RES_SHIFT         (1)\n#define USBC_HIRD(n)                (((n)&15)<<2)\n#define USBC_HIRD_MASK              (15<<2)\n#define USBC_HIRD_SHIFT             (2)\n#define USBC_BREMOTEWAKE            (1 << 6)\n#define USBC_BREMOTEWAKE_MASK       (1 << 6)\n#define USBC_BREMOTEWAKE_SHIFT      (6)\n#define USBC_ENBLSLPM               (1<<7)\n#define USBC_ENBLSLPM_MASK          (1<<7)\n#define USBC_ENBLSLPM_SHIFT         (7)\n#define USBC_HIRD_THRES(n)          (((n)&15)<<8)\n#define USBC_HIRD_THRES_MASK        (15<<8)\n#define USBC_HIRD_THRES_SHIFT       (8)\n#define USBC_HIRD_THRES_BIT4        (1 << 12)\n#define USBC_HIRD_THRES_BIT4_MASK   (1 << 12)\n#define USBC_HIRD_THRES_BIT4_SHIFT  (12)\n#define USBC_COREL1RES(n)           (((n)&3)<<13)\n#define USBC_COREL1RES_MASK         (3<<13)\n#define USBC_COREL1RES_SHIFT        (13)\n#define USBC_SLPSTS                 (1<<15)\n#define USBC_SLPSTS_MASK            (1<<15)\n#define USBC_SLPSTS_SHIFT           (15)\n#define USBC_L1RESUMEOK             (1<<16)\n#define USBC_L1RESUMEOK_MASK        (1<<16)\n#define USBC_L1RESUMEOK_SHIFT       (16)\n#define USBC_ENBESL                 (1<<28)\n#define USBC_ENBESL_MASK            (1<<28)\n#define USBC_ENBESL_SHIFT           (28)\n#define USBC_RSTRSLPSTS             (1<<29)\n#define USBC_RSTRSLPSTS_MASK        (1<<29)\n#define USBC_RSTRSLPSTS_SHIFT       (29)\n\n//GDFIFOCFG\n#define USBC_GDFIFOCFG_SHIFT        0\n#define USBC_GDFIFOCFG_MASK         (0xFFFF << USBC_GDFIFOCFG_SHIFT)\n#define USBC_GDFIFOCFG(n)           BITFIELD_VAL(USBC_GDFIFOCFG, n)\n#define USBC_EPINFOBASEADDR_SHIFT   16\n#define USBC_EPINFOBASEADDR_MASK    (0xFFFF << USBC_EPINFOBASEADDR_SHIFT)\n#define USBC_EPINFOBASEADDR(n)      BITFIELD_VAL(USBC_EPINFOBASEADDR, n)\n\n//DPTXFSIZn\n#define USBC_DPTXFSTADDR(n)          (((n)&0xFFFF)<<0)\n#define USBC_DPTXFSTADDR_MASK        (0xFFFF<<0)\n#define USBC_DPTXFSTADDR_SHIFT       (0)\n#define USBC_DPTXFSIZE(n)             (((n)&0xFFFF)<<16)\n#define USBC_DPTXFSIZE_MASK           (0xFFFF<<16)\n#define USBC_DPTXFSIZE_SHIFT          (16)\n\n//DIEPTXFn\n#define USBC_INEPNTXFSTADDR(n)      (((n)&0xFFFF)<<0)\n#define USBC_INEPNTXFSTADDR_MASK    (0xFFFF<<0)\n#define USBC_INEPNTXFSTADDR_SHIFT   (0)\n#define USBC_INEPNTXFDEP(n)         (((n)&0xFFFF)<<16)\n#define USBC_INEPNTXFDEP_MASK       (0xFFFF<<16)\n#define USBC_INEPNTXFDEP_SHIFT      (16)\n\n//HPTXFSIZ\n#define USBC_HPTXFSIZ_PTXFSTADDR(n)      (((n)&0xFFFF)<<0)\n#define USBC_HPTXFSIZ_PTXFSTADDR_MASK    (0xFFFF<<0)\n#define USBC_HPTXFSIZ_PTXFSTADDR_SHIFT   (0)\n#define USBC_HPTXFSIZ_PTXFSIZE(n)         (((n)&0xFFFF)<<16)\n#define USBC_HPTXFSIZ_PTXFSIZE_MASK       (0xFFFF<<16)\n#define USBC_HPTXFSIZ_PTXFSIZE_SHIFT      (16)\n\n//HCFG\n#define USBC_HCFG_MODECHTIMEN                    (1<<31)\n#define USBC_HCFG_MODECHTIMEN_MASK                    (1<<31)\n#define USBC_HCFG_MODECHTIMEN_SHIFT                    (31)\n#define USBC_HCFG_PERSCHEDENA                    (1<<26)\n#define USBC_HCFG_PERSCHEDENA_MASK                    (1<<26)\n#define USBC_HCFG_PERSCHEDENA_SHIFT                    (26)\n#define USBC_HCFG_FRLISTEN(n)                    (((n)&0x3)<<24)\n#define USBC_HCFG_FRLISTEN_MASK                    (0x3<<24)\n#define USBC_HCFG_FRLISTEN_SHIFT                    (24)\n#define USBC_HCFG_DESCDMA                    (1<<23)\n#define USBC_HCFG_DESCDMA_MASK                    (1<<23)\n#define USBC_HCFG_DESCDMA_SHIFT                    (23)\n#define USBC_HCFG_RESVALID(n)                    (((n)&0xff)<<8)\n#define USBC_HCFG_RESVALID_MASK                    (0xff<<8)\n#define USBC_HCFG_RESVALID_SHIFT                    (8)\n#define USBC_HCFG_ENA32KHZS                    (1<<7)\n#define USBC_HCFG_ENA32KHZS_MASK                    (1<<7)\n#define USBC_HCFG_ENA32KHZS_SHIFT                    (7)\n#define USBC_HCFG_FSLSSUPP                    (1<<2)\n#define USBC_HCFG_FSLSSUPP_MASK                    (1<<2)\n#define USBC_HCFG_FSLSSUPP_SHIFT                    (2)\n#define USBC_HCFG_FSLSPCLKSEL(n)                    (((n)&0x3)<<0)\n#define USBC_HCFG_FSLSPCLKSEL_MASK                    (0x3<<0)\n#define USBC_HCFG_FSLSPCLKSEL_SHIFT                    (0)\n\n//HFIR\n#define USBC_HFIR_HFIRRLDCTRL                    (1<<16)\n#define USBC_HFIR_HFIRRLDCTRL_MASK                    (1<<16)\n#define USBC_HFIR_HFIRRLDCTRL_SHIFT                    (16)\n#define USBC_HFIR_FRINT(n)                    (((n)&0xffff)<<0)\n#define USBC_HFIR_FRINT_MASK                    (0xffff<<0)\n#define USBC_HFIR_FRINT_SHIFT                    (0)\n\n//HFNUM\n#define USBC_HFNUM_FRREM(n)                    (((n)&0xffff)<<16)\n#define USBC_HFNUM_FRREM_MASK                    (0xffff<<16)\n#define USBC_HFNUM_FRREM_SHIFT                    (16)\n#define USBC_HFNUM_FRNUM(n)                    (((n)&0xffff)<<0)\n#define USBC_HFNUM_FRNUM_MASK                    (0xffff<<0)\n#define USBC_HFNUM_FRNUM_SHIFT                    (0)\n\n//HPTXSTS\n#define USBC_HPTXSTS_PTXQTOP(n)                    (((n)&0xff)<<24)\n#define USBC_HPTXSTS_PTXQTOP_MASK                    (0xff<<24)\n#define USBC_HPTXSTS_PTXQTOP_SHIFT                    (24)\n#define USBC_HPTXSTS_PTXQSPCAVAIL(n)                    (((n)&0xff)<<16)\n#define USBC_HPTXSTS_PTXQSPCAVAIL_MASK                    (0xff<<16)\n#define USBC_HPTXSTS_PTXQSPCAVAIL_SHIFT                    (16)\n#define USBC_HPTXSTS_PTXFSPCAVAIL(n)                    (((n)&0xffff)<<0)\n#define USBC_HPTXSTS_PTXFSPCAVAIL_MASK                    (0xffff<<0)\n#define USBC_HPTXSTS_PTXFSPCAVAIL_SHIFT                    (0)\n\n//HAINT\n#define USBC_HAINT_HAINT(n)                    (((n)&0xffff)<<0)\n#define USBC_HAINT_HAINT_MASK                    (0xffff<<0)\n#define USBC_HAINT_HAINT_SHIFT                    (0)\n\n//HAINTMSK\n#define USBC_HAINTMSK_HAINTMSK(n)                    (((n)&0xffff)<<0)\n#define USBC_HAINTMSK_HAINTMSK_MASK                    (0xffff<<0)\n#define USBC_HAINTMSK_HAINTMSK_SHIFT                    (0)\n\n//HPRT\n#define USBC_HPRT_PRTSPD(n)                    (((n)&0x3)<<17)\n#define USBC_HPRT_PRTSPD_MASK                    (0x3<<17)\n#define USBC_HPRT_PRTSPD_SHIFT                    (17)\n#define USBC_HPRT_PRTTSTCTL(n)                    (((n)&0xf)<<13)\n#define USBC_HPRT_PRTTSTCTL_MASK                    (0xf<<13)\n#define USBC_HPRT_PRTTSTCTL_SHIFT                    (13)\n#define USBC_HPRT_PRTPWR                    (1<<12)\n#define USBC_HPRT_PRTPWR_MASK                    (1<<12)\n#define USBC_HPRT_PRTPWR_SHIFT                    (12)\n#define USBC_HPRT_PRTLNSTS(n)                    (((n)&0x3)<<10)\n#define USBC_HPRT_PRTLNSTS_MASK                    (0x3<<10)\n#define USBC_HPRT_PRTLNSTS_SHIFT                    (10)\n#define USBC_HPRT_PRTRST                    (1<<8)\n#define USBC_HPRT_PRTRST_MASK                    (1<<8)\n#define USBC_HPRT_PRTRST_SHIFT                    (8)\n#define USBC_HPRT_PRTSUSP                    (1<<7)\n#define USBC_HPRT_PRTSUSP_MASK                    (1<<7)\n#define USBC_HPRT_PRTSUSP_SHIFT                    (7)\n#define USBC_HPRT_PRTRES                    (1<<6)\n#define USBC_HPRT_PRTRES_MASK                    (1<<6)\n#define USBC_HPRT_PRTRES_SHIFT                    (6)\n#define USBC_HPRT_PRTOVRCURRCHNG                    (1<<5)\n#define USBC_HPRT_PRTOVRCURRCHNG_MASK                    (1<<5)\n#define USBC_HPRT_PRTOVRCURRCHNG_SHIFT                    (5)\n#define USBC_HPRT_PRTOVRCURRACT                    (1<<4)\n#define USBC_HPRT_PRTOVRCURRACT_MASK                    (1<<4)\n#define USBC_HPRT_PRTOVRCURRACT_SHIFT                    (4)\n#define USBC_HPRT_PRTENCHNG                    (1<<3)\n#define USBC_HPRT_PRTENCHNG_MASK                    (1<<3)\n#define USBC_HPRT_PRTENCHNG_SHIFT                    (3)\n#define USBC_HPRT_PRTENA                    (1<<2)\n#define USBC_HPRT_PRTENA_MASK                    (1<<2)\n#define USBC_HPRT_PRTENA_SHIFT                    (2)\n#define USBC_HPRT_PRTCONNDET                    (1<<1)\n#define USBC_HPRT_PRTCONNDET_MASK                    (1<<1)\n#define USBC_HPRT_PRTCONNDET_SHIFT                    (1)\n#define USBC_HPRT_PRTCONNSTS                    (1<<0)\n#define USBC_HPRT_PRTCONNSTS_MASK                    (1<<0)\n#define USBC_HPRT_PRTCONNSTS_SHIFT                    (0)\n\n//HCCHARN\n#define USBC_HCCHARN_CHENA                    (1<<31)\n#define USBC_HCCHARN_CHENA_MASK                    (1<<31)\n#define USBC_HCCHARN_CHENA_SHIFT                    (31)\n#define USBC_HCCHARN_CHDIS                    (1<<30)\n#define USBC_HCCHARN_CHDIS_MASK                    (1<<30)\n#define USBC_HCCHARN_CHDIS_SHIFT                    (30)\n#define USBC_HCCHARN_ODDFRM                    (1<<29)\n#define USBC_HCCHARN_ODDFRM_MASK                    (1<<29)\n#define USBC_HCCHARN_ODDFRM_SHIFT                    (29)\n#define USBC_HCCHARN_DEVADDR(n)                    (((n)&0x7f)<<22)\n#define USBC_HCCHARN_DEVADDR_MASK                    (0x7f<<22)\n#define USBC_HCCHARN_DEVADDR_SHIFT                    (22)\n#define USBC_HCCHARN_EC(n)                    (((n)&0x3)<<20)\n#define USBC_HCCHARN_EC_MASK                    (0x3<<20)\n#define USBC_HCCHARN_EC_SHIFT                    (20)\n#define USBC_HCCHARN_EPTYPE(n)                    (((n)&0x3)<<18)\n#define USBC_HCCHARN_EPTYPE_MASK                    (0x3<<18)\n#define USBC_HCCHARN_EPTYPE_SHIFT                    (18)\n#define USBC_HCCHARN_LSPDDEV                    (1<<17)\n#define USBC_HCCHARN_LSPDDEV_MASK                    (1<<17)\n#define USBC_HCCHARN_LSPDDEV_SHIFT                    (17)\n#define USBC_HCCHARN_EPDIR                    (1<<15)\n#define USBC_HCCHARN_EPDIR_MASK                    (1<<15)\n#define USBC_HCCHARN_EPDIR_SHIFT                    (15)\n#define USBC_HCCHARN_EPNUM(n)                    (((n)&0xf)<<11)\n#define USBC_HCCHARN_EPNUM_MASK                    (0xf<<11)\n#define USBC_HCCHARN_EPNUM_SHIFT                    (11)\n#define USBC_HCCHARN_MPS(n)                    (((n)&0x7ff)<<0)\n#define USBC_HCCHARN_MPS_MASK                    (0x7ff<<0)\n#define USBC_HCCHARN_MPS_SHIFT                    (0)\n\n//HCSPLTN\n#define USBC_HCSPLTN_SPLTENA                    (1<<31)\n#define USBC_HCSPLTN_SPLTENA_MASK                    (1<<31)\n#define USBC_HCSPLTN_SPLTENA_SHIFT                    (31)\n#define USBC_HCSPLTN_COMPSPLT                    (1<<16)\n#define USBC_HCSPLTN_COMPSPLT_MASK                    (1<<16)\n#define USBC_HCSPLTN_COMPSPLT_SHIFT                    (16)\n#define USBC_HCSPLTN_EPDIR(n)                    (((n)&0x3)<<14)\n#define USBC_HCSPLTN_EPDIR_MASK                    (0x3<<14)\n#define USBC_HCSPLTN_EPDIR_SHIFT                    (14)\n#define USBC_HCSPLTN_EPNUM(n)                    (((n)&0x7f)<<7)\n#define USBC_HCSPLTN_EPNUM_MASK                    (0x7f<<7)\n#define USBC_HCSPLTN_EPNUM_SHIFT                    (7)\n#define USBC_HCSPLTN_MPS(n)                    (((n)&0x7f)<<0)\n#define USBC_HCSPLTN_MPS_MASK                    (0x7f<<0)\n#define USBC_HCSPLTN_MPS_SHIFT                    (0)\n\n//HCINTN\n#define USBC_HCINTN_DESC_LST_ROLLINTR                    (1<<13)\n#define USBC_HCINTN_DESC_LST_ROLLINTR_MASK                    (1<<13)\n#define USBC_HCINTN_DESC_LST_ROLLINTR_SHIFT                    (13)\n#define USBC_HCINTN_XCS_XACT_ERR                    (1<<12)\n#define USBC_HCINTN_XCS_XACT_ERR_MASK                    (1<<12)\n#define USBC_HCINTN_XCS_XACT_ERR_SHIFT                    (12)\n#define USBC_HCINTN_BNAINTR                    (1<<11)\n#define USBC_HCINTN_BNAINTR_MASK                    (1<<11)\n#define USBC_HCINTN_BNAINTR_SHIFT                    (11)\n#define USBC_HCINTN_DATATGLERR                    (1<<10)\n#define USBC_HCINTN_DATATGLERR_MASK                    (1<<10)\n#define USBC_HCINTN_DATATGLERR_SHIFT                    (10)\n#define USBC_HCINTN_FRMOVRUN                    (1<<9)\n#define USBC_HCINTN_FRMOVRUN_MASK                    (1<<9)\n#define USBC_HCINTN_FRMOVRUN_SHIFT                    (9)\n#define USBC_HCINTN_BBLERR                    (1<<8)\n#define USBC_HCINTN_BBLERR_MASK                    (1<<8)\n#define USBC_HCINTN_BBLERR_SHIFT                    (8)\n#define USBC_HCINTN_XACTERR                    (1<<7)\n#define USBC_HCINTN_XACTERR_MASK                    (1<<7)\n#define USBC_HCINTN_XACTERR_SHIFT                    (7)\n#define USBC_HCINTN_NYET                    (1<<6)\n#define USBC_HCINTN_NYET_MASK                    (1<<6)\n#define USBC_HCINTN_NYET_SHIFT                    (6)\n#define USBC_HCINTN_ACK                    (1<<5)\n#define USBC_HCINTN_ACK_MASK                    (1<<5)\n#define USBC_HCINTN_ACK_SHIFT                    (5)\n#define USBC_HCINTN_NAK                    (1<<4)\n#define USBC_HCINTN_NAK_MASK                    (1<<4)\n#define USBC_HCINTN_NAK_SHIFT                    (4)\n#define USBC_HCINTN_STALL                    (1<<3)\n#define USBC_HCINTN_STALL_MASK                    (1<<3)\n#define USBC_HCINTN_STALL_SHIFT                    (3)\n#define USBC_HCINTN_AHBERR                    (1<<2)\n#define USBC_HCINTN_AHBERR_MASK                    (1<<2)\n#define USBC_HCINTN_AHBERR_SHIFT                    (2)\n#define USBC_HCINTN_CHHLTD                    (1<<1)\n#define USBC_HCINTN_CHHLTD_MASK                    (1<<1)\n#define USBC_HCINTN_CHHLTD_SHIFT                    (1)\n#define USBC_HCINTN_XFERCOMPL                    (1<<0)\n#define USBC_HCINTN_XFERCOMPL_MASK                    (1<<0)\n#define USBC_HCINTN_XFERCOMPL_SHIFT                    (0)\n\n//HCINTMSKN\n#define USBC_HCINTMSKN_DESC_LST_ROLLINTRMSK                    (1<<13)\n#define USBC_HCINTMSKN_DESC_LST_ROLLINTRMSK_MASK                    (1<<13)\n#define USBC_HCINTMSKN_DESC_LST_ROLLINTRMSK_SHIFT                    (13)\n#define USBC_HCINTMSKN_BNAINTRMSK                    (1<<11)\n#define USBC_HCINTMSKN_BNAINTRMSK_MASK                    (1<<11)\n#define USBC_HCINTMSKN_BNAINTRMSK_SHIFT                    (11)\n#define USBC_HCINTMSKN_DATATGLERRMSK                    (1<<10)\n#define USBC_HCINTMSKN_DATATGLERRMSK_MASK                    (1<<10)\n#define USBC_HCINTMSKN_DATATGLERRMSK_SHIFT                    (10)\n#define USBC_HCINTMSKN_FRMOVRUNMSK                    (1<<9)\n#define USBC_HCINTMSKN_FRMOVRUNMSK_MASK                    (1<<9)\n#define USBC_HCINTMSKN_FRMOVRUNMSK_SHIFT                    (9)\n#define USBC_HCINTMSKN_BBLERRMSK                    (1<<8)\n#define USBC_HCINTMSKN_BBLERRMSK_MASK                    (1<<8)\n#define USBC_HCINTMSKN_BBLERRMSK_SHIFT                    (8)\n#define USBC_HCINTMSKN_XACTERRMSK                    (1<<7)\n#define USBC_HCINTMSKN_XACTERRMSK_MASK                    (1<<7)\n#define USBC_HCINTMSKN_XACTERRMSK_SHIFT                    (7)\n#define USBC_HCINTMSKN_NYETMSK                    (1<<6)\n#define USBC_HCINTMSKN_NYETMSK_MASK                    (1<<6)\n#define USBC_HCINTMSKN_NYETMSK_SHIFT                    (6)\n#define USBC_HCINTMSKN_ACKMSK                    (1<<5)\n#define USBC_HCINTMSKN_ACKMSK_MASK                    (1<<5)\n#define USBC_HCINTMSKN_ACKMSK_SHIFT                    (5)\n#define USBC_HCINTMSKN_NAKMSK                    (1<<4)\n#define USBC_HCINTMSKN_NAKMSK_MASK                    (1<<4)\n#define USBC_HCINTMSKN_NAKMSK_SHIFT                    (4)\n#define USBC_HCINTMSKN_STALLMSK                    (1<<3)\n#define USBC_HCINTMSKN_STALLMSK_MASK                    (1<<3)\n#define USBC_HCINTMSKN_STALLMSK_SHIFT                    (3)\n#define USBC_HCINTMSKN_AHBERRMSK                    (1<<2)\n#define USBC_HCINTMSKN_AHBERRMSK_MASK                    (1<<2)\n#define USBC_HCINTMSKN_AHBERRMSK_SHIFT                    (2)\n#define USBC_HCINTMSKN_CHHLTDMSK                    (1<<1)\n#define USBC_HCINTMSKN_CHHLTDMSK_MASK                    (1<<1)\n#define USBC_HCINTMSKN_CHHLTDMSK_SHIFT                    (1)\n#define USBC_HCINTMSKN_XFERCOMPLMSK                    (1<<0)\n#define USBC_HCINTMSKN_XFERCOMPLMSK_MASK                    (1<<0)\n#define USBC_HCINTMSKN_XFERCOMPLMSK_SHIFT                    (0)\n\n//HCTSIZN\n//SCATTER/GATHER DMA MODE\n#define USBC_HCTSIZN_DOPNG                    (1<<31)\n#define USBC_HCTSIZN_DOPNG_MASK                    (1<<31)\n#define USBC_HCTSIZN_DOPNG_SHIFT                    (31)\n#define USBC_HCTSIZN_PID(n)                    (((n)&0x3)<<29)\n#define USBC_HCTSIZN_PID_MASK                    (0x3<<29)\n#define USBC_HCTSIZN_PID_SHIFT                    (29)\n#define USBC_HCTSIZN_NTD(n)                    (((n)&0xff)<<8)\n#define USBC_HCTSIZN_NTD_MASK                    (0xff<<8)\n#define USBC_HCTSIZN_NTD_SHIFT                    (8)\n#define USBC_HCTSIZN_SCHED(n)                    (((n)&0xff)<<0)\n#define USBC_HCTSIZN_SCHED_MASK                    (0xff<<0)\n#define USBC_HCTSIZN_SCHED_SHIFT                    (0)\n\n//HCTSIZN\n//NON-SCATTER/GATHER DMA MODE\n#define USBC_HCTSIZN_DOPNG                    (1<<31)\n#define USBC_HCTSIZN_DOPNG_MASK                    (1<<31)\n#define USBC_HCTSIZN_DOPNG_SHIFT                    (31)\n#define USBC_HCTSIZN_PID(n)                    (((n)&0x3)<<29)\n#define USBC_HCTSIZN_PID_MASK                    (0x3<<29)\n#define USBC_HCTSIZN_PID_SHIFT                    (29)\n#define USBC_HCTSIZN_PKTCNT(n)                    (((n)&0x3ff)<<19)\n#define USBC_HCTSIZN_PKTCNT_MASK                    (0x3ff<<19)\n#define USBC_HCTSIZN_PKTCNT_SHIFT                    (19)\n#define USBC_HCTSIZN_XFERSIZE(n)                    (((n)&0x7ffff)<<0)\n#define USBC_HCTSIZN_XFERSIZE_MASK                    (0x7ffff<<0)\n#define USBC_HCTSIZN_XFERSIZE_SHIFT                    (0)\n\n//HCDMAN\n//BUFFER DMA MODE\n#define USBC_HCDMAN_DMAADDR(n)                    (((n)&0xffffffff)<<0)\n#define USBC_HCDMAN_DMAADDR_MASK                    (0xffffffff<<0)\n#define USBC_HCDMAN_DMAADDR_SHIFT                    (0)\n\n//HCDMABN\n#define USBC_HCDMABN_DMAADDR(n)                    (((n)&0xffffffff)<<0)\n#define USBC_HCDMABN_DMAADDR_MASK                    (0xffffffff<<0)\n#define USBC_HCDMABN_DMAADDR_SHIFT                    (0)\n\n//DCFG\n#define USBC_DEVSPD(n)              (((n)&3)<<0)\n#define USBC_DEVSPD_MASK            (3<<0)\n#define USBC_DEVSPD_SHIFT           (0)\n#define USBC_NZSTSOUTHSHK           (1<<2)\n#define USBC_NZSTSOUTHSHK_MASK      (1<<2)\n#define USBC_NZSTSOUTHSHK_SHIFT     (2)\n#define USBC_DEVADDR(n)             (((n)&0x7F)<<4)\n#define USBC_DEVADDR_MASK           (0x7F<<4)\n#define USBC_DEVADDR_SHIFT          (4)\n#define USBC_PERFRINT(n)            (((n)&3)<<11)\n#define USBC_PERFRINT_MASK          (3<<11)\n#define USBC_PERFRINT_SHIFT         (11)\n#define USBC_EPMISCNT(n)            (((n)&31)<<18)\n#define USBC_EPMISCNT_MASK          (31<<18)\n#define USBC_EPMISCNT_SHIFT         (18)\n\n//DCTL\n#define USBC_RMTWKUPSIG             (1<<0)\n#define USBC_RMTWKUPSIG_MASK        (1<<0)\n#define USBC_RMTWKUPSIG_SHIFT       (0)\n#define USBC_SFTDISCON              (1<<1)\n#define USBC_SFTDISCON_MASK         (1<<1)\n#define USBC_SFTDISCON_SHIFT        (1)\n#define USBC_GNPINNAKSTS            (1<<2)\n#define USBC_GNPINNAKSTS_MASK       (1<<2)\n#define USBC_GNPINNAKSTS_SHIFT      (2)\n#define USBC_GOUTNAKSTS             (1<<3)\n#define USBC_GOUTNAKSTS_MASK        (1<<3)\n#define USBC_GOUTNAKSTS_SHIFT       (3)\n#define USBC_TSTCTL(n)              (((n)&7)<<4)\n#define USBC_TSTCTL_MASK            (7<<4)\n#define USBC_TSTCTL_SHIFT           (4)\n#define USBC_SGNPINNAK              (1<<7)\n#define USBC_SGNPINNAK_MASK         (1<<7)\n#define USBC_SGNPINNAK_SHIFT        (7)\n#define USBC_CGNPINNAK              (1<<8)\n#define USBC_CGNPINNAK_MASK         (1<<8)\n#define USBC_CGNPINNAK_SHIFT        (8)\n#define USBC_SGOUTNAK               (1<<9)\n#define USBC_SGOUTNAK_MASK          (1<<9)\n#define USBC_SGOUTNAK_SHIFT         (9)\n#define USBC_CGOUTNAK               (1<<10)\n#define USBC_CGOUTNAK_MASK          (1<<10)\n#define USBC_CGOUTNAK_SHIFT         (10)\n#define USBC_PWRONPRGDONE           (1<<11)\n#define USBC_PWRONPRGDONE_MASK      (1<<11)\n#define USBC_PWRONPRGDONE_SHIFT     (11)\n#define USBC_GMC(n)                 (((n)&3)<<12)\n#define USBC_GMC_MASK               (3<<12)\n#define USBC_GMC_SHIFT              (12)\n#define USBC_IGNRFRMNUM             (1<<15)\n#define USBC_IGNRFRMNUM_MASK        (1<<15)\n#define USBC_IGNRFRMNUM_SHIFT       (15)\n\n//DSTS\n#define USBC_SUSPSTS                (1<<0)\n#define USBC_SUSPSTS_MASK           (1<<0)\n#define USBC_SUSPSTS_SHIFT          (0)\n#define USBC_ENUMSPD(n)             (((n)&3)<<1)\n#define USBC_ENUMSPD_MASK           (3<<1)\n#define USBC_ENUMSPD_SHIFT          (1)\n#define USBC_ERRTICERR              (1<<3)\n#define USBC_ERRTICERR_MASK         (1<<3)\n#define USBC_ERRTICERR_SHIFT        (3)\n#define USBC_SOFFN(n)               (((n)&0x3FFF)<<8)\n#define USBC_SOFFN_MASK             (0x3FFF<<8)\n#define USBC_SOFFN_SHIFT            (8)\n\n//DIEPMSK\n#define USBC_XFERCOMPLMSK           (1<<0)\n#define USBC_XFERCOMPLMSK_MASK      (1<<0)\n#define USBC_XFERCOMPLMSK_SHIFT     (0)\n#define USBC_EPDISBLDMSK            (1<<1)\n#define USBC_EPDISBLDMSK_MASK       (1<<1)\n#define USBC_EPDISBLDMSK_SHIFT      (1)\n#define USBC_AHBERRMSK              (1<<2)\n#define USBC_AHBERRMSK_MASK         (1<<2)\n#define USBC_AHBERRMSK_SHIFT        (2)\n#define USBC_TIMEOUTMSK             (1<<3)\n#define USBC_TIMEOUTMSK_MASK        (1<<3)\n#define USBC_TIMEOUTMSK_SHIFT       (3)\n#define USBC_INTKNTXFEMPMSK         (1<<4)\n#define USBC_INTKNTXFEMPMSK_MASK    (1<<4)\n#define USBC_INTKNTXFEMPMSK_SHIFT   (4)\n#define USBC_INTKNEPMISMSK          (1<<5)\n#define USBC_INTKNEPMISMSK_MASK     (1<<5)\n#define USBC_INTKNEPMISMSK_SHIFT    (5)\n#define USBC_INEPNAKEFFMSK          (1<<6)\n#define USBC_INEPNAKEFFMSK_MASK     (1<<6)\n#define USBC_INEPNAKEFFMSK_SHIFT    (6)\n#define USBC_TXFEMPMSK              (1<<7)\n#define USBC_TXFIFOUNDRNMSK         (1<<8)\n#define USBC_TXFIFOUNDRNMSK_MASK    (1<<8)\n#define USBC_TXFIFOUNDRNMSK_SHIFT   (8)\n#define USBC_BNAINTRMSK             (1<<9)\n#define USBC_PKTDRPSTSMSK           (1<<11)\n#define USBC_BBLEERRINTRPTMSK       (1<<12)\n#define USBC_NAKINTRPTMSK           (1<<13)\n#define USBC_NYETINTRPTMSK          (1<<14)\n#define USBC_STUPPKTRCVDMSK         (1<<15)\n\n//DOEPMSK\n//#define USBC_XFERCOMPLMSK         (1<<0)\n//#define USBC_XFERCOMPLMSK_MASK    (1<<0)\n//#define USBC_XFERCOMPLMSK_SHIFT   (0)\n//#define USBC_EPDISBLDMSK          (1<<1)\n//#define USBC_EPDISBLDMSK_MASK     (1<<1)\n//#define USBC_EPDISBLDMSK_SHIFT    (1)\n//#define USBC_AHBERRMSK            (1<<2)\n//#define USBC_AHBERRMSK_MASK       (1<<2)\n//#define USBC_AHBERRMSK_SHIFT      (2)\n#define USBC_SETUPMSK               (1<<3)\n#define USBC_SETUPMSK_MASK          (1<<3)\n#define USBC_SETUPMSK_SHIFT         (3)\n#define USBC_OUTTKNEPDISMSK         (1<<4)\n#define USBC_OUTTKNEPDISMSK_MASK    (1<<4)\n#define USBC_OUTTKNEPDISMSK_SHIFT   (4)\n#define USBC_BACK2BACKSETUPMSK      (1<<6)\n#define USBC_BACK2BACKSETUPMSK_MASK (1<<6)\n#define USBC_BACK2BACKSETUPMSK_SHIFT (6)\n#define USBC_OUTPKTERRMSK           (1<<8)\n#define USBC_OUTPKTERRMSK_MASK      (1<<8)\n#define USBC_OUTPKTERRMSK_SHIFT     (8)\n//#define USBC_BNAINTRMSK           (1<<9)\n//#define USBC_PKTDRPSTSMSK         (1<<11)\n//#define USBC_BBLEERRINTRPTMSK     (1<<12)\n//#define USBC_NAKINTRPTMSK         (1<<13)\n//#define USBC_NYETINTRPTMSK        (1<<14)\n//#define USBC_STUPPKTRCVDMSK       (1<<15)\n\n//DAINT\n#define USBC_INEPINT(n)             (((n)&0xFFFF)<<0)\n#define USBC_INEPINT_MASK           (0xFFFF<<0)\n#define USBC_INEPINT_SHIFT          (0)\n#define USBC_OUTEPINT(n)            (((n)&0xFFFF)<<16)\n#define USBC_OUTEPINT_MASK          (0xFFFF<<16)\n#define USBC_OUTEPINT_SHIFT         (16)\n\n//DAINTMSK\n#define USBC_INEPMSK(n)             (((n)&0xFFFF)<<0)\n#define USBC_INEPMSK_MASK           (0xFFFF<<0)\n#define USBC_INEPMSK_SHIFT          (0)\n#define USBC_OUTEPMSK(n)            (((n)&0xFFFF)<<16)\n#define USBC_OUTEPMSK_MASK          (0xFFFF<<16)\n#define USBC_OUTEPMSK_SHIFT         (16)\n\n//DVBUSDIS\n#define USBC_DVBUSDIS(n)            (((n)&0xFFFF)<<0)\n#define USBC_DVBUSDIS_MASK          (0xFFFF<<0)\n#define USBC_DVBUSDIS_SHIFT         (0)\n\n//DVBUSPULSE\n#define USBC_DVBUSPULSE(n)          (((n)&0xFFF)<<0)\n#define USBC_DVBUSPULSE_MASK        (0xFFF<<0)\n#define USBC_DVBUSPULSE_SHIFT       (0)\n\n//DTHRCTL\n#define USBC_NONISOTHREN            (1<<0)\n#define USBC_NONISOTHREN_MASK       (1<<0)\n#define USBC_NONISOTHREN_SHIFT      (0)\n#define USBC_ISOTHREN               (1<<1)\n#define USBC_ISOTHREN_MASK          (1<<1)\n#define USBC_ISOTHREN_SHIFT         (1)\n#define USBC_TXTHRLEN(n)            (((n)&0x1FF)<<2)\n#define USBC_TXTHRLEN_MASK          (0x1FF<<2)\n#define USBC_TXTHRLEN_SHIFT         (2)\n#define USBC_RXTHREN                (1<<16)\n#define USBC_RXTHREN_MASK           (1<<16)\n#define USBC_RXTHREN_SHIFT          (16)\n#define USBC_RXTHRLEN(n)            (((n)&0x1FF)<<17)\n#define USBC_RXTHRLEN_MASK          (0x1FF<<17)\n#define USBC_RXTHRLEN_SHIFT         (17)\n#define USBC_ARBPRKEN               (1<<27)\n#define USBC_ARBPRKEN_MASK          (1<<27)\n#define USBC_ARBPRKEN_SHIFT         (27)\n\n//DIEPEMPMSK\n#define USBC_INEPTXFEMPMSK(n)       (((n)&0xFFFF)<<0)\n#define USBC_INEPTXFEMPMSK_MASK     (0xFFFF<<0)\n#define USBC_INEPTXFEMPMSK_SHIFT    (0)\n\n//DIEPCTL0\n#define USBC_EP0_MPS(n)             (((n)&3)<<0)\n#define USBC_EP0_MPS_MASK           (3<<0)\n#define USBC_EP0_MPS_SHIFT          (0)\n#define USBC_NEXTEP(n)              (((n)&15)<<11)\n#define USBC_NEXTEP_MASK            (15<<11)\n#define USBC_NEXTEP_SHIFT           (11)\n#define USBC_USBACTEP               (1<<15)\n#define USBC_USBACTEP_MASK          (1<<15)\n#define USBC_USBACTEP_SHIFT         (15)\n#define USBC_NAKSTS                 (1<<17)\n#define USBC_NAKSTS_MASK            (1<<17)\n#define USBC_NAKSTS_SHIFT           (17)\n#define USBC_EPTYPE(n)              (((n)&3)<<18)\n#define USBC_EPTYPE_MASK            (3<<18)\n#define USBC_EPTYPE_SHIFT           (18)\n#define USBC_STALL                  (1<<21)\n#define USBC_STALL_MASK             (1<<21)\n#define USBC_STALL_SHIFT            (21)\n#define USBC_EPTXFNUM(n)            (((n)&15)<<22)\n#define USBC_EPTXFNUM_MASK          (15<<22)\n#define USBC_EPTXFNUM_SHIFT         (22)\n#define USBC_CNAK                   (1<<26)\n#define USBC_CNAK_MASK              (1<<26)\n#define USBC_CNAK_SHIFT             (26)\n#define USBC_SNAK                   (1<<27)\n#define USBC_SNAK_MASK              (1<<27)\n#define USBC_SNAK_SHIFT             (27)\n#define USBC_EPDIS                  (1<<30)\n#define USBC_EPDIS_MASK             (1<<30)\n#define USBC_EPDIS_SHIFT            (30)\n#define USBC_EPENA                  (1<<31)\n#define USBC_EPENA_MASK             (1<<31)\n#define USBC_EPENA_SHIFT            (31)\n\n//DIEPINT0\n#define USBC_XFERCOMPL              (1<<0)\n#define USBC_XFERCOMPL_MASK         (1<<0)\n#define USBC_XFERCOMPL_SHIFT        (0)\n#define USBC_EPDISBLD               (1<<1)\n#define USBC_EPDISBLD_MASK          (1<<1)\n#define USBC_EPDISBLD_SHIFT         (1)\n#define USBC_AHBERR                 (1<<2)\n#define USBC_AHBERR_MASK            (1<<2)\n#define USBC_AHBERR_SHIFT           (2)\n#define USBC_TIMEOUT                (1<<3)\n#define USBC_TIMEOUT_MASK           (1<<3)\n#define USBC_TIMEOUT_SHIFT          (3)\n#define USBC_INTKNTXFEMP            (1<<4)\n#define USBC_INTKNTXFEMP_MASK       (1<<4)\n#define USBC_INTKNTXFEMP_SHIFT      (4)\n#define USBC_INTKNEPMIS             (1<<5)\n#define USBC_INTKNEPMIS_MASK        (1<<5)\n#define USBC_INTKNEPMIS_SHIFT       (5)\n#define USBC_INEPNAKEFF             (1<<6)\n#define USBC_INEPNAKEFF_MASK        (1<<6)\n#define USBC_INEPNAKEFF_SHIFT       (6)\n#define USBC_TXFEMP                 (1<<7)\n#define USBC_TXFEMP_MASK            (1<<7)\n#define USBC_TXFEMP_SHIFT           (7)\n#define USBC_TXFIFOUNDRN            (1<<8)\n#define USBC_TXFIFOUNDRN_MASK       (1<<8)\n#define USBC_TXFIFOUNDRN_SHIFT      (8)\n#define USBC_BNAINTR                (1<<9)\n#define USBC_PKTDRPSTS              (1<<11)\n#define USBC_BBLEERRINTRPT          (1<<12)\n#define USBC_NAKINTRPT              (1<<13)\n#define USBC_NYETINTRPT             (1<<14)\n#define USBC_STUPPKTRCVD            (1<<15)\n\n//DIEPTSIZ0\n#define USBC_IEPXFERSIZE0(n)        (((n)&0x7F)<<0)\n#define USBC_IEPXFERSIZE0_MASK      (0x7F<<0)\n#define USBC_IEPXFERSIZE0_SHIFT     (0)\n#define USBC_IEPPKTCNT0(n)          (((n)&3)<<19)\n#define USBC_IEPPKTCNT0_MASK        (3<<19)\n#define USBC_IEPPKTCNT0_SHIFT       (19)\n\n//DIEPDMA0\n#define USBC_DMAADDR(n)             (((n)&0xFFFFFFFF)<<0)\n#define USBC_DMAADDR_MASK           (0xFFFFFFFF<<0)\n#define USBC_DMAADDR_SHIFT          (0)\n\n//DIEPFSTS0\n#define USBC_INEPTXFSPCAVAIL(n)     (((n)&0xFFFF)<<0)\n#define USBC_INEPTXFSPCAVAIL_MASK   (0xFFFF<<0)\n#define USBC_INEPTXFSPCAVAIL_SHIFT  (0)\n\n//DIEPCTL\n#define USBC_EPN_MPS(n)             (((n)&0x7FF)<<0)\n#define USBC_EPN_MPS_MASK           (0x7FF<<0)\n#define USBC_EPN_MPS_SHIFT          (0)\n//#define USBC_NEXTEP(n)            (((n)&15)<<11)\n//#define USBC_NEXTEP_MASK          (15<<11)\n//#define USBC_NEXTEP_SHIFT         (11)\n//#define USBC_USBACTEP             (1<<15)\n//#define USBC_USBACTEP_MASK        (1<<15)\n//#define USBC_USBACTEP_SHIFT       (15)\n#define USBC_EPDPID                 (1<<16)\n#define USBC_EPDPID_MASK            (1<<16)\n#define USBC_EPDPID_SHIFT           (16)\n//#define USBC_NAKSTS               (1<<17)\n//#define USBC_NAKSTS_MASK          (1<<17)\n//#define USBC_NAKSTS_SHIFT         (17)\n//#define USBC_EPTYPE(n)            (((n)&3)<<18)\n//#define USBC_EPTYPE_MASK          (3<<18)\n//#define USBC_EPTYPE_SHIFT         (18)\n#define USBC_SNP                    (1<<20)\n#define USBC_SNP_MASK               (1<<20)\n#define USBC_SNP_SHIFT              (20)\n//#define USBC_STALL                (1<<21)\n//#define USBC_STALL_MASK           (1<<21)\n//#define USBC_STALL_SHIFT          (21)\n//#define USBC_EPTXFNUM(n)          (((n)&15)<<22)\n//#define USBC_EPTXFNUM_MASK        (15<<22)\n//#define USBC_EPTXFNUM_SHIFT       (22)\n//#define USBC_CNAK                 (1<<26)\n//#define USBC_CNAK_MASK            (1<<26)\n//#define USBC_CNAK_SHIFT           (26)\n//#define USBC_SNAK                 (1<<27)\n//#define USBC_SNAK_MASK            (1<<27)\n//#define USBC_SNAK_SHIFT           (27)\n#define USBC_SETD0PID               (1<<28)\n#define USBC_SETD0PID_MASK          (1<<28)\n#define USBC_SETD0PID_SHIFT         (28)\n#define USBC_SETD1PID               (1<<29)\n#define USBC_SETD1PID_MASK          (1<<29)\n#define USBC_SETD1PID_SHIFT         (29)\n//#define USBC_EPDIS                (1<<30)\n//#define USBC_EPDIS_MASK           (1<<30)\n//#define USBC_EPDIS_SHIFT          (30)\n//#define USBC_EPENA                (1<<31)\n//#define USBC_EPENA_MASK           (1<<31)\n//#define USBC_EPENA_SHIFT          (31)\n\n//DIEPINT\n//#define USBC_XFERCOMPL            (1<<0)\n//#define USBC_XFERCOMPL_MASK       (1<<0)\n//#define USBC_XFERCOMPL_SHIFT      (0)\n//#define USBC_EPDISBLD             (1<<1)\n//#define USBC_EPDISBLD_MASK        (1<<1)\n//#define USBC_EPDISBLD_SHIFT       (1)\n//#define USBC_AHBERR               (1<<2)\n//#define USBC_AHBERR_MASK          (1<<2)\n//#define USBC_AHBERR_SHIFT         (2)\n//#define USBC_TIMEOUT              (1<<3)\n//#define USBC_TIMEOUT_MASK         (1<<3)\n//#define USBC_TIMEOUT_SHIFT        (3)\n//#define USBC_INTKNTXFEMP          (1<<4)\n//#define USBC_INTKNTXFEMP_MASK     (1<<4)\n//#define USBC_INTKNTXFEMP_SHIFT    (4)\n//#define USBC_INTKNEPMIS           (1<<5)\n//#define USBC_INTKNEPMIS_MASK      (1<<5)\n//#define USBC_INTKNEPMIS_SHIFT     (5)\n//#define USBC_INEPNAKEFF           (1<<6)\n//#define USBC_INEPNAKEFF_MASK      (1<<6)\n//#define USBC_INEPNAKEFF_SHIFT     (6)\n//#define USBC_TXFEMP               (1<<7)\n//#define USBC_TXFEMP_MASK          (1<<7)\n//#define USBC_TXFEMP_SHIFT         (7)\n//#define USBC_TXFIFOUNDRN          (1<<8)\n//#define USBC_TXFIFOUNDRN_MASK     (1<<8)\n//#define USBC_TXFIFOUNDRN_SHIFT    (8)\n\n//DIEPTSIZ\n#define USBC_IEPXFERSIZE(n)         (((n)&0x7FFFF)<<0)\n#define USBC_IEPXFERSIZE_MASK       (0x7FFFF<<0)\n#define USBC_IEPXFERSIZE_SHIFT      (0)\n#define USBC_IEPPKTCNT(n)           (((n)&0x3FF)<<19)\n#define USBC_IEPPKTCNT_MASK         (0x3FF<<19)\n#define USBC_IEPPKTCNT_SHIFT        (19)\n#define USBC_MC(n)                  (((n)&3)<<29)\n#define USBC_MC_MASK                (3<<29)\n#define USBC_MC_SHIFT               (29)\n\n//DIEPDMA\n//#define USBC_DMAADDR(n)           (((n)&0xFFFFFFFF)<<0)\n//#define USBC_DMAADDR_MASK         (0xFFFFFFFF<<0)\n//#define USBC_DMAADDR_SHIFT        (0)\n\n//DIEPFSTS\n//#define USBC_INEPTXFSPCAVAIL(n)   (((n)&0xFFFF)<<0)\n//#define USBC_INEPTXFSPCAVAIL_MASK (0xFFFF<<0)\n//#define USBC_INEPTXFSPCAVAIL_SHIFT (0)\n\n//DOEPCTL0\n//#define USBC_EP0_MPS(n)           (((n)&3)<<0)\n//#define USBC_EP0_MPS_MASK         (3<<0)\n//#define USBC_EP0_MPS_SHIFT        (0)\n//#define USBC_USBACTEP             (1<<15)\n//#define USBC_USBACTEP_MASK        (1<<15)\n//#define USBC_USBACTEP_SHIFT       (15)\n//#define USBC_NAKSTS               (1<<17)\n//#define USBC_NAKSTS_MASK          (1<<17)\n//#define USBC_NAKSTS_SHIFT         (17)\n//#define USBC_EPTYPE(n)            (((n)&3)<<18)\n//#define USBC_EPTYPE_MASK          (3<<18)\n//#define USBC_EPTYPE_SHIFT         (18)\n//#define USBC_SNP                  (1<<20)\n//#define USBC_SNP_MASK             (1<<20)\n//#define USBC_SNP_SHIFT            (20)\n//#define USBC_STALL                (1<<21)\n//#define USBC_STALL_MASK           (1<<21)\n//#define USBC_STALL_SHIFT          (21)\n//#define USBC_CNAK                 (1<<26)\n//#define USBC_CNAK_MASK            (1<<26)\n//#define USBC_CNAK_SHIFT           (26)\n//#define USBC_SNAK                 (1<<27)\n//#define USBC_SNAK_MASK            (1<<27)\n//#define USBC_SNAK_SHIFT           (27)\n//#define USBC_EPDIS                (1<<30)\n//#define USBC_EPDIS_MASK           (1<<30)\n//#define USBC_EPDIS_SHIFT          (30)\n//#define USBC_EPENA                (1<<31)\n//#define USBC_EPENA_MASK           (1<<31)\n//#define USBC_EPENA_SHIFT          (31)\n\n//DOEPINT0\n//#define USBC_XFERCOMPL            (1<<0)\n//#define USBC_XFERCOMPL_MASK       (1<<0)\n//#define USBC_XFERCOMPL_SHIFT      (0)\n//#define USBC_EPDISBLD             (1<<1)\n//#define USBC_EPDISBLD_MASK        (1<<1)\n//#define USBC_EPDISBLD_SHIFT       (1)\n//#define USBC_AHBERR               (1<<2)\n//#define USBC_AHBERR_MASK          (1<<2)\n//#define USBC_AHBERR_SHIFT         (2)\n#define USBC_SETUP                  (1<<3)\n#define USBC_SETUP_MASK             (1<<3)\n#define USBC_SETUP_SHIFT            (3)\n#define USBC_OUTTKNEPDIS            (1<<4)\n#define USBC_OUTTKNEPDIS_MASK       (1<<4)\n#define USBC_OUTTKNTPDIS_SHIFT      (4)\n#define USBC_STSPHSERCVD            (1<<5)\n#define USBC_STSPHSERCVD_MASK       (1<<5)\n#define USBC_STSPHSERCVD_SHIFT      (5)\n#define USBC_BACK2BACKSETUP         (1<<6)\n#define USBC_BACK2BACKSETUP_MASK    (1<<6)\n#define USBC_BACK2BACKSETUP_SHIFT   (6)\n//#define USBC_TXFEMP               (1<<7)\n//#define USBC_TXFEMP_MASK          (1<<7)\n//#define USBC_TXFEMP_SHIFT         (7)\n#define USBC_OUTPKTERR              (1<<8)\n#define USBC_OUTPKTERR_MASK         (1<<8)\n#define USBC_OUTPKTERR_SHIFT        (8)\n//#define USBC_BNAINTR              (1<<9)\n//#define USBC_PKTDRPSTS            (1<<11)\n//#define USBC_BBLEERRINTRPT        (1<<12)\n//#define USBC_NAKINTRPT            (1<<13)\n//#define USBC_NYETINTRPT           (1<<14)\n//#define USBC_STUPPKTRCVD          (1<<15)\n\n//DOEPTSIZ0\n#define USBC_OEPXFERSIZE0(n)        (((n)&0x7F)<<0)\n#define USBC_OEPXFERSIZE0_MASK      (0x7F<<0)\n#define USBC_OEPXFERSIZE0_SHIFT     (0)\n#define USBC_OEPPKTCNT0             (1<<19)\n#define USBC_OEPPKTCNT0_MASK        (1<<19)\n#define USBC_OEPPKTCNT0_SHIFT       (19)\n#define USBC_SUPCNT(n)              (((n)&3)<<29)\n#define USBC_SUPCNT_MASK            (3<<29)\n#define USBC_SUPCNT_SHIFT           (29)\n\n//DOEPDMA0\n//#define USBC_DMAADDR(n)           (((n)&0xFFFFFFFF)<<0)\n//#define USBC_DMAADDR_MASK         (0xFFFFFFFF<<0)\n//#define USBC_DMAADDR_SHIFT        (0)\n\n//DOEPCTL\n//#define USBC_EPN_MPS(n)           (((n)&0x7FF)<<0)\n//#define USBC_EPN_MPS_MASK         (0x7FF<<0)\n//#define USBC_EPN_MPS_SHIFT        (0)\n//#define USBC_NEXTEP(n)            (((n)&15)<<11)\n//#define USBC_NEXTEP_MASK          (15<<11)\n//#define USBC_NEXTEP_SHIFT         (11)\n//#define USBC_USBACTEP             (1<<15)\n//#define USBC_USBACTEP_MASK        (1<<15)\n//#define USBC_USBACTEP_SHIFT       (15)\n//#define USBC_EPDPID               (1<<16)\n//#define USBC_EPDPID_MASK          (1<<16)\n//#define USBC_EPDPID_SHIFT         (16)\n//#define USBC_NAKSTS               (1<<17)\n//#define USBC_NAKSTS_MASK          (1<<17)\n//#define USBC_NAKSTS_SHIFT         (17)\n//#define USBC_EPTYPE(n)            (((n)&3)<<18)\n//#define USBC_EPTYPE_MASK          (3<<18)\n//#define USBC_EPTYPE_SHIFT         (18)\n//#define USBC_SNP                  (1<<20)\n//#define USBC_SNP_MASK             (1<<20)\n//#define USBC_SNP_SHIFT            (20)\n//#define USBC_STALL                (1<<21)\n//#define USBC_STALL_MASK           (1<<21)\n//#define USBC_STALL_SHIFT          (21)\n//#define USBC_EPTXFNUM(n)          (((n)&15)<<22)\n//#define USBC_EPTXFNUM_MASK        (15<<22)\n//#define USBC_EPTXFNUM_SHIFT       (22)\n//#define USBC_CNAK                 (1<<26)\n//#define USBC_CNAK_MASK            (1<<26)\n//#define USBC_CNAK_SHIFT           (26)\n//#define USBC_SNAK                 (1<<27)\n//#define USBC_SNAK_MASK            (1<<27)\n//#define USBC_SNAK_SHIFT           (27)\n//#define USBC_SETD0PID             (1<<28)\n//#define USBC_SETD0PID_MASK        (1<<28)\n//#define USBC_SETD0PID_SHIFT       (28)\n//#define USBC_SETD1PID             (1<<29)\n//#define USBC_SETD1PID_MASK        (1<<29)\n//#define USBC_SETD1PID_SHIFT       (29)\n//#define USBC_EPDIS                (1<<30)\n//#define USBC_EPDIS_MASK           (1<<30)\n//#define USBC_EPDIS_SHIFT          (30)\n//#define USBC_EPENA                (1<<31)\n//#define USBC_EPENA_MASK           (1<<31)\n//#define USBC_EPENA_SHIFT          (31)\n\n//DOEPINT\n//#define USBC_XFERCOMPL            (1<<0)\n//#define USBC_XFERCOMPL_MASK       (1<<0)\n//#define USBC_XFERCOMPL_SHIFT      (0)\n//#define USBC_EPDISBLD             (1<<1)\n//#define USBC_EPDISBLD_MASK        (1<<1)\n//#define USBC_EPDISBLD_SHIFT       (1)\n//#define USBC_AHBERR               (1<<2)\n//#define USBC_AHBERR_MASK          (1<<2)\n//#define USBC_AHBERR_SHIFT         (2)\n//#define USBC_SETUP                (1<<3)\n//#define USBC_SETUP_MASK           (1<<3)\n//#define USBC_SETUP_SHIFT          (3)\n//#define USBC_OUTTKNEPDIS          (1<<4)\n//#define USBC_OUTTKNEPDIS_MASK     (1<<4)\n//#define USBC_OUTTKNTPDIS_SHIFT    (4)\n//#define USBC_STSPHSERCVD          (1<<5)\n//#define USBC_STSPHSERCVD_MASK     (1<<5)\n//#define USBC_STSPHSERCVD_SHIFT    (5)\n//#define USBC_BACK2BACKSETUP       (1<<6)\n//#define USBC_BACK2BACKSETUP_MASK  (1<<6)\n//#define USBC_BACK2BACKSETUP_SHIFT (6)\n//#define USBC_TXFEMP               (1<<7)\n//#define USBC_TXFEMP_MASK          (1<<7)\n//#define USBC_TXFEMP_SHIFT         (7)\n//#define USBC_OUTPKTERR            (1<<8)\n//#define USBC_OUTPKTERR_MASK       (1<<8)\n//#define USBC_OUTPKTERR_SHIFT      (8)\n//#define USBC_BNAINTR              (1<<9)\n//#define USBC_PKTDRPSTS            (1<<11)\n//#define USBC_BBLEERRINTRPT        (1<<12)\n//#define USBC_NAKINTRPT            (1<<13)\n//#define USBC_NYETINTRPT           (1<<14)\n//#define USBC_STUPPKTRCVD          (1<<15)\n\n//DOEPTSIZ\n#define USBC_OEPXFERSIZE(n)         (((n)&0x7FFFF)<<0)\n#define USBC_OEPXFERSIZE_MASK       (0x7FFFF<<0)\n#define USBC_OEPXFERSIZE_SHIFT      (0)\n#define USBC_OEPPKTCNT(n)           (((n)&0x3FF)<<19)\n#define USBC_OEPPKTCNT_MASK         (0x3FF<<19)\n#define USBC_OEPPKTCNT_SHIFT        (19)\n//#define USBC_MC(n)                (((n)&3)<<29)\n//#define USBC_MC_MASK              (3<<29)\n//#define USBC_MC_SHIFT             (29)\n#define USBC_RXDPID(n)              (((n)&3)<<29)\n#define USBC_RXDPID_MASK            (3<<29)\n#define USBC_RXDPID_SHIFT           (29)\n\n//DOEPDMA\n//#define USBC_DMAADDR(n)           (((n)&0xFFFFFFFF)<<0)\n//#define USBC_DMAADDR_MASK         (0xFFFFFFFF<<0)\n//#define USBC_DMAADDR_SHIFT        (0)\n\n//PCGCCTL\n#define USBC_STOPPCLK               (1<<0)\n#define USBC_STOPPCLK_MASK          (1<<0)\n#define USBC_STOPPCLK_SHIFT         (0)\n#define USBC_GATEHCLK               (1<<1)\n#define USBC_GATEHCLK_MASK          (1<<1)\n#define USBC_GATEHCLK_SHIFT         (1)\n#define USBC_PWRCLMP                (1<<2)\n#define USBC_PWRCLMP_MASK           (1<<2)\n#define USBC_PWRCLMP_SHIFT          (2)\n#define USBC_RSTPDWNMODULE          (1<<3)\n#define USBC_RSTPDWNMODULE_MASK     (1<<3)\n#define USBC_RSTPDWNMODULE_SHIFT    (3)\n#define USBC_ENBL_L1GATING          (1<<5)\n#define USBC_ENBL_L1GATING_MASK     (1<<5)\n#define USBC_ENBL_L1GATING_SHIFT    (5)\n#define USBC_PHYSLEEP               (1<<6)\n#define USBC_PHYSLEEP_MASK          (1<<6)\n#define USBC_PHYSLEEP_SHIFT         (6)\n#define USBC_SUSPENDED              (1<<7)\n#define USBC_SUSPENDED_MASK         (1<<7)\n#define USBC_SUSPENDED_SHIFT        (7)\n\n//TxRxData\n#define USBC_TXDATA(n)              (((n)&0xFFFFFFFF)<<0)\n#define USBC_TXDATA_MASK            (0xFFFFFFFF<<0)\n#define USBC_TXDATA_SHIFT           (0)\n#define USBC_RXDATA(n)              (((n)&0xFFFFFFFF)<<0)\n#define USBC_RXDATA_MASK            (0xFFFFFFFF<<0)\n#define USBC_RXDATA_SHIFT           (0)\n\n//RAMData\n#define USBC_DATA(n)                (((n)&0xFFFFFFFF)<<0)\n#define USBC_DATA_MASK              (0xFFFFFFFF<<0)\n#define USBC_DATA_SHIFT             (0)\n\n\n// ============================================================================\n// USBIF_T\n// -----------------------------------------------------------------------------\n///\n// =============================================================================\nstruct USBIF_T {\n    __IO uint32_t USBIF_00;\n    __IO uint32_t USBIF_04;\n    __IO uint32_t USBIF_08;\n    __IO uint32_t USBIF_0C;\n    __IO uint32_t USBIF_10;\n    __IO uint32_t USBIF_14;\n    __IO uint32_t USBIF_18;\n    __IO uint32_t USBIF_1C;\n    __IO uint32_t USBIF_20;\n};\n\n// USBIF_00\n#define USBIF_00_CFG_TP_SEL_SHIFT           0\n#define USBIF_00_CFG_TP_SEL_MASK            (0xFF << USBIF_00_CFG_TP_SEL_SHIFT)\n#define USBIF_00_CFG_TP_SEL(n)              BITFIELD_VAL(USBIF_00_CFG_TP_SEL, n)\n#define USBIF_00_CFG_EXT_PHY                (1 << 8)\n#define USBIF_00_CFG_EXT_ADP                (1 << 9)\n#define USBIF_00_CFG_EXT_OTG                (1 << 10)\n#define USBIF_00_CFG_EXT_RID                (1 << 11)\n#define USBIF_00_CFG_DR_PLL                 (1 << 16)\n#define USBIF_00_CFG_DR_SUSPEND             (1 << 17)\n#define USBIF_00_CFG_REG_PLL                (1 << 24)\n#define USBIF_00_CFG_REG_SUSPEND            (1 << 25)\n\n// USBIF_04\n#define USBIF_04_CFG_MODE_PLLEN_SHIFT       4\n#define USBIF_04_CFG_MODE_PLLEN_MASK        (0x3 << USBIF_04_CFG_MODE_PLLEN_SHIFT)\n#define USBIF_04_CFG_MODE_PLLEN(n)          BITFIELD_VAL(USBIF_04_CFG_MODE_PLLEN, n)\n#define USBIF_04_CFG_SUSPEND_MODE_SHIFT     6\n#define USBIF_04_CFG_SUSPEND_MODE_MASK      (0x3 << USBIF_04_CFG_SUSPEND_MODE_SHIFT)\n#define USBIF_04_CFG_SUSPEND_MODE(n)        BITFIELD_VAL(USBIF_04_CFG_SUSPEND_MODE, n)\n#define USBIF_04_CFG_SLEEP_THSD_SHIFT       8\n#define USBIF_04_CFG_SLEEP_THSD_MASK        (0xF << USBIF_04_CFG_SLEEP_THSD_SHIFT)\n#define USBIF_04_CFG_SLEEP_THSD(n)          BITFIELD_VAL(USBIF_04_CFG_SLEEP_THSD, n)\n\n// USBIF_08\n#define USBIF_08_CFG_EXTPHY_RXTIMING        (1 << 0)\n#define USBIF_08_CFG_EXTPHY_TXTIMING        (1 << 1)\n#define USBIF_08_CFG_PHY_TXTIMING           (1 << 2)\n#define USBIF_08_CFG_PHY_RXTIMING           (1 << 3)\n#define USBIF_08_CFG_PHY_RXLSTIMING         (1 << 4)\n#define USBIF_08_CFG_EN_HOSTDISC            (1 << 5)\n#define USBIF_08_CFG_MODE_FSRCV             (1 << 6)\n#define USBIF_08_CFG_PHY_TXOPMODE           (1 << 7)\n#define USBIF_08_CFG_PHY_TXXCVSEL           (1 << 8)\n#define USBIF_08_CFG_PHY_TXTERMSEL          (1 << 9)\n#define USBIF_08_CFG_SEL_HSIC               (1 << 10)\n#define USBIF_08_CFG_SEL48M                 (1 << 11)\n#define USBIF_08_CFG_POL_SPI_CLK            (1 << 12)\n#define USBIF_08_CFG_MACPLL_RDY             (1 << 13)\n#define USBIF_08_CFG_PHY_HOST_MODE          (1 << 14)\n#define USBIF_08_CFG_SOFT_RESETN_PHY        (1 << 15)\n\n// USBIF_0C\n#define USBIF_0C_PLL_EN_MSK                 (1 << 0)\n#define USBIF_0C_D1_DEV_HIRD_VALID_MSK      (1 << 1)\n#define USBIF_0C_SOF_TOGGLE_OUT_MSK         (1 << 2)\n#define USBIF_0C_SOF_SEND_MSK               (1 << 3)\n#define USBIF_0C_CHEP_LAST_TRANS_MSK        (1 << 4)\n#define USBIF_0C_ID_DIG_MSK                 (1 << 5)\n#define USBIF_0C_ENABLE_ALL_MSK             (1 << 6)\n\n// USBIF_10\n#define USBIF_10_PLL_EN_RIS                 (1 << 0)\n#define USBIF_10_D1_DEV_HIRD_VALID_RIS      (1 << 1)\n#define USBIF_10_SOF_TOGGLE_OUT_RIS         (1 << 2)\n#define USBIF_10_SOF_SEND_RIS               (1 << 3)\n#define USBIF_10_CHEP_LAST_TRANS_RIS        (1 << 4)\n#define USBIF_10_ID_DIG_RIS                 (1 << 5)\n\n// USBIF_14\n#define USBIF_14_PLL_EN_MIS                 (1 << 0)\n#define USBIF_14_D1_DEV_HIRD_VALID_MIS      (1 << 1)\n#define USBIF_14_SOF_TOGGLE_OUT_MIS         (1 << 2)\n#define USBIF_14_SOF_SEND_MIS               (1 << 3)\n#define USBIF_14_CHEP_LAST_TRANS_MIS        (1 << 4)\n#define USBIF_14_ID_DIG_MIS                 (1 << 5)\n\n// USBIF_18\n#define USBIF_18_LAST_DEV_HIRD_RCVD_SHIFT   0\n#define USBIF_18_LAST_DEV_HIRD_RCVD_MASK    (0xF << USBIF_18_LAST_DEV_HIRD_RCVD_SHIFT)\n#define USBIF_18_LAST_DEV_HIRD_RCVD(n)      BITFIELD_VAL(USBIF_18_LAST_DEV_HIRD_RCVD, n)\n#define USBIF_18_LAST_CHEP_NUMBER_SHIFT     4\n#define USBIF_18_LAST_CHEP_NUMBER_MASK      (0xF << USBIF_18_LAST_CHEP_NUMBER_SHIFT)\n#define USBIF_18_LAST_CHEP_NUMBER(n)        BITFIELD_VAL(USBIF_18_LAST_CHEP_NUMBER, n)\n#define USBIF_18_DEV_HIRD_RCVD_SHIFT        8\n#define USBIF_18_DEV_HIRD_RCVD_MASK         (0xF << USBIF_18_DEV_HIRD_RCVD_SHIFT)\n#define USBIF_18_DEV_HIRD_RCVD(n)           BITFIELD_VAL(USBIF_18_DEV_HIRD_RCVD, n)\n#define USBIF_18_CHEP_NUMBER_SHIFT          12\n#define USBIF_18_CHEP_NUMBER_MASK           (0xF << USBIF_18_CHEP_NUMBER_SHIFT)\n#define USBIF_18_CHEP_NUMBER(n)             BITFIELD_VAL(USBIF_18_CHEP_NUMBER, n)\n#define USBIF_18_CHEP_LAST_TRANS            (1 << 16)\n#define USBIF_18_SOF_SENT_RCVD_TGL          (1 << 17)\n#define USBIF_18_SOF_TOGGLE_OUT             (1 << 18)\n#define USBIF_18_DEV_HIRD_VLD_TGL           (1 << 19)\n#define USBIF_18_ID_DIG                     (1 << 20)\n\n#endif\n\n"
  },
  {
    "path": "platform/main/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\n#obj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y :=\n\nifeq ($(ROM_BUILD),1)\nobj-y += ../../tests/rom/startup_ARMCM.S\nelse\nobj-y += startup_main.S\nendif\n\nifeq ($(FACTORY_SUITE),1)\nobj-y += ../../tests/factory_suite/\nelse ifeq ($(RELIABILITY_TEST),1)\nobj-y += ../../tests/reliability_test/\nelse ifeq ($(NOSTD),1)\nobj-y += nostd_main.c\nelse ifeq ($(NOAPP),1)\nobj-y += noapp_main.cpp\nelse\nobj-y += main.cpp\nendif\n\nifneq ($(filter 1,$(USB_SERIAL_TEST) $(USB_SERIAL_DIRECT_XFER_TEST) $(USB_AUDIO_TEST) $(I2C_TEST) \\\n\t\t\t\t\t$(AF_TEST) $(VD_TEST) $(CP_TEST) $(TDM_TEST) $(SEC_ENG_TEST) $(A7_DSP_TEST) \\\n\t\t\t\t\t$(TRANSQ_TEST) $(FLASH_TEST) $(PSRAM_TEST) $(PSRAMUHS_TEST)),)\nccflags-y += -Itests/hwtest -DHWTEST\n\nifneq ($(filter 1,$(USB_SERIAL_TEST) $(USB_SERIAL_DIRECT_XFER_TEST) $(USB_AUDIO_TEST)),)\nobj-y += ../../tests/hwtest/usb_dev_test.c\nifeq ($(USB_SERIAL_TEST),1)\nccflags-y += -DUSB_SERIAL_TEST\nelse ifeq ($(USB_SERIAL_DIRECT_XFER_TEST),1)\nccflags-y += -DUSB_SERIAL_DIRECT_XFER_TEST\nelse\nccflags-y += -DUSB_AUDIO_TEST\nendif\nendif\n\nifneq ($(USB_SERIAL_DIRECT_XFER_SIZE),)\nccflags-y += -DUSB_SERIAL_DIRECT_XFER_SIZE=$(USB_SERIAL_DIRECT_XFER_SIZE)\nendif\n\nifeq ($(I2C_TEST),1)\nobj-y += ../../tests/hwtest/i2c_test.c\nccflags-y += -DI2C_TEST\n\nifeq ($(I2C_TEST_DMA_MODE),1)\nCFLAGS_i2c_test.o += -DI2C_TEST_DMA_MODE\nendif\nifeq ($(I2C_TEST_INT_MODE),1)\nCFLAGS_i2c_test.o += -DI2C_TEST_INT_MODE\nendif\nifneq ($(I2C_SPEED),)\nCFLAGS_i2c_test.o += -DI2C_SPEED=$(I2C_SPEED)\nendif\nendif # I2C_TEST\n\nifeq ($(AF_TEST),1)\nobj-y += ../../services/audioflinger/  ../../tests/hwtest/af_test.c\nccflags-y += -Iservices/audioflinger -DAF_TEST\n\nifeq ($(AF_INT_CODEC_TEST),1)\nobj-y += ../../platform/drivers/codec/\nCFLAGS_af_test.o += -DAF_INT_CODEC_TEST\nexport AF_DEVICE_INT_CODEC ?= 1\nexport AF_DEVICE_I2S ?= 0\nelse\nexport AF_DEVICE_INT_CODEC ?= 0\nexport AF_DEVICE_I2S ?= 1\nendif\n\nifneq ($(CHAN_NUM_CAPTURE),)\nCFLAGS_af_test.o += -DCHAN_NUM_CAPTURE=$(CHAN_NUM_CAPTURE)\nendif\nifneq ($(CHAN_SEP_BUF_CAPTURE),)\nCFLAGS_af_test.o += -DCHAN_SEP_BUF_CAPTURE=$(CHAN_SEP_BUF_CAPTURE)\nendif\nifeq ($(FIXED_BUF_CAPTURE),1)\nCFLAGS_af_test.o += -DFIXED_BUF_CAPTURE\nendif\nendif # AF_TEST\n\nifeq ($(VD_TEST),1)\nifneq ($(VOICE_DETECTOR_EN),1)\n$(error VOICE_DETECTOR_EN=1 missing when VD_TEST=1)\nendif\nobj-y += ../../apps/voice_detector/voice_detector.c \\\n    ../../apps/common/app_utils.c \\\n    ../../services/audioflinger/ \\\n    ../../services/audio_dump/ \\\n    ../../platform/drivers/codec/\nccflags-y += -DVD_TEST \\\n    -Iapps/voice_detector \\\n    -Iapps/common \\\n    -Iservices/audio_dump/include \\\n    -Iservices/multimedia/speech/inc\nsubdir-ccflags-y += -Iservices/audioflinger\nendif\n\nifeq ($(CP_TEST),1)\nobj-y += ../../tests/hwtest/cp_test.c\nccflags-y += -DCP_TEST\nendif\n\nifeq ($(TDM_TEST),1)\nobj-y += ../../tests/hwtest/tdm_test.c\nccflags-y += -DTDM_TEST\nccflags-y += -DCHIP_HAS_I2S=$(CHIP_HAS_I2S)\nifneq ($(CHIP_HAS_TDM),)\nccflags-y += -DCHIP_HAS_TDM=$(CHIP_HAS_TDM)\nendif\nifeq ($(LIS25_TEST), 1)\nccflags-y += -DLIS25_TEST\nobj-y += ../../tests/codec_vad/lis25ba.c\nccflags-y += -Itests/codec_vad/\nendif\n\nifeq ($(TDM_LOOPBACK_TEST), 1)\nccflags-y += -DTDM_LOOPBACK_TEST\nendif\n\nifeq ($(TDM_PLAYBACK_ONLY_TEST), 1)\nccflags-y += -DTDM_PLAYBACK_ONLY_TEST\nendif\n\nendif #TDM_TEST\n\nifeq ($(SEC_ENG_TEST),1)\nobj-y += ../../tests/hwtest/sec_eng_test.c ../../utils/hexdump/\nccflags-y += -DSEC_ENG_TEST -Iutils/hexdump\nifneq ($(filter 1,$(AES_LARGE_DATA) $(HASH_LARGE_DATA) $(HMAC_LARGE_DATA)),)\nobj-y += ../../tests/hwtest/asm_test.S\nasflags-y += -Itests/hwtest\nifeq ($(AES_LARGE_DATA),1)\nasflags-y += -DAES_LARGE_DATA\nccflags-y += -DAES_LARGE_DATA\nendif\nifeq ($(HASH_LARGE_DATA),1)\nasflags-y += -DHASH_LARGE_DATA\nccflags-y += -DHASH_LARGE_DATA\nendif\nifeq ($(HMAC_LARGE_DATA),1)\nasflags-y += -DHMAC_LARGE_DATA\nccflags-y += -DHMAC_LARGE_DATA\nendif\nendif\nendif\n\n$(call echo-help,INFO    Please make sure DSP bin is up to date: out/$(DSP_BIN_NAME)/$(DSP_BIN_NAME).bin)\nifeq ($(A7_DSP_TEST),1)\nobj-y += ../../tests/hwtest/a7_dsp_test.c\nobj-y += ../../tests/hwtest/asm_test.S\nccflags-y += -DA7_DSP_TEST\nAFLAGS_asm_test.o += -DA7_DSP_TEST -DDSP_BIN_NAME=$(DSP_BIN_NAME).bin -Iout/$(T)\nDSP_BIN_NAME ?= hwtest_a7_dsp\n$(obj)/../../tests/hwtest/asm_test.o : out/$(T)/$(DSP_BIN_NAME).bin\nout/$(T)/$(DSP_BIN_NAME).bin : $(srctree)/out/$(DSP_BIN_NAME)/$(DSP_BIN_NAME).bin\n\t$(call CMDCPFILE,$(srctree)/out/$(DSP_BIN_NAME)/$(DSP_BIN_NAME).bin,$(srctree)/$@)\n\t$(call CMDCPFILE,$(srctree)/out/$(DSP_BIN_NAME)/$(DSP_BIN_NAME).elf,$(srctree)/$(@:.bin=.elf))\n\t$(call CMDCPFILE,$(srctree)/out/$(DSP_BIN_NAME)/$(DSP_BIN_NAME).map,$(srctree)/$(@:.bin=.map))\n\t$(call CMDCPFILE,$(srctree)/out/$(DSP_BIN_NAME)/$(DSP_BIN_NAME).lst,$(srctree)/$(@:.bin=.lst))\n$(srctree)/out/$(DSP_BIN_NAME)/$(DSP_BIN_NAME).bin : FORCE\n\t$(call echo-help,)\n\t$(call echo-help,INFO    Please make sure DSP bin is up to date: out/$(DSP_BIN_NAME)/$(DSP_BIN_NAME).bin)\n# We cannot build $(DSP_BIN_NAME) automatically here, because the env inherited by sub-make cannot be cleaned:\n# E.g., KBUILD_SRC, TC, CHIP_HAS_CP, ...\n\t$(call echo-help,)\nendif #A7_DSP_TEST\n\nifeq ($(TRANSQ_TEST),1)\nobj-y += ../../tests/hwtest/transq_test.c\nccflags-y += -DTRANSQ_TEST\nifneq ($(RX_ROLE),)\nCFLAGS_transq_test.o += -DRX_ROLE\nendif\nifneq  ($(TRANSQ_ID),)\nCFLAGS_transq_test.o += -DTRANSQ_ID=$(TRANSQ_ID)\nendif\nendif #TRANSQ_TEST\n\nifeq ($(PSRAM_TEST),1)\nobj-y += ../../tests/hwtest/psram_test.c\nccflags-y += -DPSRAM_TEST -DCHIP_PSRAM_CTRL_VER=$(CHIP_PSRAM_CTRL_VER)\nendif #PSRAM_TEST\n\nifeq ($(PSRAMUHS_TEST),1)\nobj-y += ../../tests/hwtest/psram_test.c\nccflags-y += -DPSRAMUHS_TEST\nendif #PSRAMUHS_TEST\n\nendif # hwtest cases\n\n\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nobj-y += ../../utils/hwtimer_list/\n\nccflags-y +=  \\\n\t-Iutils/hwtimer_list \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/drivers/security_engine \\\n\t-Iapps/main \\\n\t-Iapps/factory \\\n\t-Iutils/list  \\\n\t-Iapps/audioplayers  \\\n\t-Iservices/bt_app  \\\n\t-Iapps/common  \\\n\t-Iservices/norflash_api  \\\n\t-Iservices/nv_section/log_section\n\nifneq ($(FLASH_FILL),)\nccflags-y += -DFLASH_FILL=$(FLASH_FILL)\nendif\n\nifneq ($(DEBUG_PORT),)\nccflags-y += -DDEBUG_PORT=$(DEBUG_PORT)\nendif\n\nifneq ($(FLASH_SIZE),)\nccflags-y += -DFLASH_SIZE=$(FLASH_SIZE)\nendif\n\nifeq ($(ROM_UTILS_ON),1)\nccflags-y += -DROM_UTILS_ON\nendif\n\nifeq ($(NO_PMU),1)\nccflags-y += -DNO_PMU\nendif\n\nifeq ($(NO_TIMER),1)\nccflags-y += -DNO_TIMER\nendif\n\nifeq ($(SLEEP_TEST),1)\nccflags-y += -DSLEEP_TEST\nendif\n\nifeq ($(RTOS),1)\nifeq ($(KERNEL),RTX)\nccflags-y += -Irtos/rtx/TARGET_CORTEX_M\nendif\nendif\n\nifeq ($(DEBUG_MODE_USB_DOWNLOAD),1)\nccflags-y += -DDEBUG_MODE_USB_DOWNLOAD\nendif\n\n"
  },
  {
    "path": "platform/main/main.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"app_bt_stream.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"cmsis.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_cmu.h\"\n#include \"hal_dma.h\"\n#include \"hal_gpio.h\"\n#include \"hal_iomux.h\"\n#include \"hal_location.h\"\n#include \"hal_norflash.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_wdt.h\"\n#include \"hwtimer_list.h\"\n#include \"mpu.h\"\n#include \"norflash_api.h\"\n#include \"plat_addr_map.h\"\n#include \"pmu.h\"\n#include \"stdlib.h\"\n#include \"tgt_hardware.h\"\n\n#ifdef RTOS\n#include \"app_factory.h\"\n#include \"cmsis_os.h\"\n#endif\n#ifdef CORE_DUMP_TO_FLASH\n#include \"coredump_section.h\"\n#endif\n\nextern \"C\" void log_dump_init(void);\nextern \"C\" void crash_dump_init(void);\n\n#ifdef FIRMWARE_REV\n#define SYS_STORE_FW_VER(x)                                                    \\\n  if (fw_rev_##x) {                                                            \\\n    *fw_rev_##x = fw.softwareRevByte##x;                                       \\\n  }\n\ntypedef struct {\n  uint8_t softwareRevByte0;\n  uint8_t softwareRevByte1;\n  uint8_t softwareRevByte2;\n  uint8_t softwareRevByte3;\n} FIRMWARE_REV_INFO_T;\n\nstatic FIRMWARE_REV_INFO_T fwRevInfoInFlash\n    __attribute((section(\".fw_rev\"))) = {0, 0, 1, 0};\nFIRMWARE_REV_INFO_T fwRevInfoInRam;\n\nextern \"C\" void system_get_info(uint8_t *fw_rev_0, uint8_t *fw_rev_1,\n                                uint8_t *fw_rev_2, uint8_t *fw_rev_3) {\n  FIRMWARE_REV_INFO_T fw = fwRevInfoInFlash;\n\n  SYS_STORE_FW_VER(0);\n  SYS_STORE_FW_VER(1);\n  SYS_STORE_FW_VER(2);\n  SYS_STORE_FW_VER(3);\n}\n#endif\n\n#if defined(_AUTO_TEST_)\nstatic uint8_t fwversion[4] = {0, 0, 1, 0};\n\nvoid system_get_fwversion(uint8_t *fw_rev_0, uint8_t *fw_rev_1,\n                          uint8_t *fw_rev_2, uint8_t *fw_rev_3) {\n  *fw_rev_0 = fwversion[0];\n  *fw_rev_1 = fwversion[1];\n  *fw_rev_2 = fwversion[2];\n  *fw_rev_3 = fwversion[3];\n}\n#endif\n\n#define system_shutdown_wdt_config(seconds)                                    \\\n  do {                                                                         \\\n    hal_wdt_stop(HAL_WDT_ID_0);                                                \\\n    hal_wdt_set_irq_callback(HAL_WDT_ID_0, NULL);                              \\\n    hal_wdt_set_timeout(HAL_WDT_ID_0, seconds);                                \\\n    hal_wdt_start(HAL_WDT_ID_0);                                               \\\n    hal_sleep_set_deep_sleep_hook(HAL_DEEP_SLEEP_HOOK_USER_WDT, NULL);         \\\n  } while (0)\n\nstatic osThreadId main_thread_tid = NULL;\n\nextern \"C\" int system_shutdown(void) {\n  TRACE(0, \"system_shutdown!!\");\n  osThreadSetPriority(main_thread_tid, osPriorityRealtime);\n  osSignalSet(main_thread_tid, 0x4);\n  return 0;\n}\n\nint system_reset(void) {\n  osThreadSetPriority(main_thread_tid, osPriorityRealtime);\n  osSignalSet(main_thread_tid, 0x8);\n  return 0;\n}\n\nint signal_send_to_main_thread(uint32_t signals) {\n  osSignalSet(main_thread_tid, signals);\n  return 0;\n}\n\nint tgt_hardware_setup(void) {\n#ifdef __APP_USE_LED_INDICATE_IBRT_STATUS__\n  for (uint8_t i = 0; i < 3; i++) {\n    hal_iomux_init(\n        (struct HAL_IOMUX_PIN_FUNCTION_MAP *)&cfg_ibrt_indication_pinmux_pwl[i],\n        1);\n    if (i == 0)\n      hal_gpio_pin_set_dir(\n          (enum HAL_GPIO_PIN_T)cfg_ibrt_indication_pinmux_pwl[i].pin,\n          HAL_GPIO_DIR_OUT, 0);\n    else\n      hal_gpio_pin_set_dir(\n          (enum HAL_GPIO_PIN_T)cfg_ibrt_indication_pinmux_pwl[i].pin,\n          HAL_GPIO_DIR_OUT, 1);\n  }\n#endif\n\n  hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)cfg_hw_pinmux_pwl,\n                 sizeof(cfg_hw_pinmux_pwl) /\n                     sizeof(struct HAL_IOMUX_PIN_FUNCTION_MAP));\n  if (app_battery_ext_charger_indicator_cfg.pin != HAL_IOMUX_PIN_NUM) {\n    hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP\n                        *)&app_battery_ext_charger_indicator_cfg,\n                   1);\n    hal_gpio_pin_set_dir(\n        (enum HAL_GPIO_PIN_T)app_battery_ext_charger_indicator_cfg.pin,\n        HAL_GPIO_DIR_IN, 1);\n  }\n  return 0;\n}\n\n#if defined(ROM_UTILS_ON)\nvoid rom_utils_init(void);\n#endif\n\n#if defined(_AUTO_TEST_)\nextern int32_t at_Init(void);\n#endif\n\n#ifdef DEBUG_MODE_USB_DOWNLOAD\nstatic void process_usb_download_mode(void) {\n  if (pmu_charger_get_status() == PMU_CHARGER_PLUGIN && hal_pwrkey_pressed()) {\n    hal_sw_bootmode_set(HAL_SW_BOOTMODE_FORCE_USB_DLD);\n    hal_cmu_sys_reboot();\n  }\n}\n#endif\nint main(void) {\n  uint8_t sys_case = 0;\n  int ret = 0;\n#ifdef __WATCHER_DOG_RESET__\n#if !defined(BLE_ONLY_ENABLED)\n  app_wdt_open(15);\n#else\n  app_wdt_open(30);\n#endif\n#endif\n\n#ifdef __FACTORY_MODE_SUPPORT__\n  uint32_t bootmode = hal_sw_bootmode_get();\n#endif\n\n#ifdef DEBUG_MODE_USB_DOWNLOAD\n  process_usb_download_mode();\n#endif\n\n  tgt_hardware_setup();\n\n#if defined(ROM_UTILS_ON)\n  rom_utils_init();\n#endif\n\n  main_thread_tid = osThreadGetId();\n\n  hwtimer_init();\n\n  hal_dma_set_delay_func((HAL_DMA_DELAY_FUNC)osDelay);\n  hal_audma_open();\n  hal_gpdma_open();\n  norflash_api_init();\n#if defined(DUMP_LOG_ENABLE)\n  log_dump_init();\n#endif\n#if defined(DUMP_CRASH_ENABLE)\n  crash_dump_init();\n#endif\n#ifdef CORE_DUMP_TO_FLASH\n  coredump_to_flash_init();\n#endif\n\n#ifdef DEBUG\n#if (DEBUG_PORT == 1)\n  hal_iomux_set_uart0();\n#ifdef __FACTORY_MODE_SUPPORT__\n  if (!(bootmode & HAL_SW_BOOTMODE_FACTORY))\n#endif\n  {\n    hal_trace_open(HAL_TRACE_TRANSPORT_UART0);\n  }\n#endif\n\n#if (DEBUG_PORT == 2)\n#ifdef __FACTORY_MODE_SUPPORT__\n  if (!(bootmode & HAL_SW_BOOTMODE_FACTORY))\n#endif\n  {\n    hal_iomux_set_analog_i2c();\n  }\n  hal_iomux_set_uart1();\n  hal_trace_open(HAL_TRACE_TRANSPORT_UART1);\n#endif\n  hal_sleep_start_stats(10000, 10000);\n  hal_trace_set_log_level(LOG_LEVEL_DEBUG);\n#endif\n\n  hal_iomux_ispi_access_init();\n\n  uint8_t flash_id[HAL_NORFLASH_DEVICE_ID_LEN];\n  hal_norflash_get_id(HAL_NORFLASH_ID_0, flash_id, ARRAY_SIZE(flash_id));\n  TRACE(3, \"FLASH_ID: %02X-%02X-%02X\", flash_id[0], flash_id[1], flash_id[2]);\n  ASSERT(hal_norflash_opened(HAL_NORFLASH_ID_0), \"Failed to init flash: %d\",\n         hal_norflash_get_open_state(HAL_NORFLASH_ID_0));\n\n  // Software will load the factory data and user data from the bottom TWO\n  // sectors from the flash, the FLASH_SIZE defined is the common.mk must be\n  // equal or greater than the actual chip flash size, otherwise the ota will\n  // load the wrong information\n  uint32_t actualFlashSize =\n      hal_norflash_get_flash_total_size(HAL_NORFLASH_ID_0);\n  if (FLASH_SIZE > actualFlashSize) {\n    TRACE_IMM(0, \"Wrong FLASH_SIZE defined in target.mk!\");\n    TRACE_IMM(2,\n              \"FLASH_SIZE is defined as 0x%x while the actual chip flash size \"\n              \"is 0x%x!\",\n              FLASH_SIZE, actualFlashSize);\n    TRACE_IMM(1,\n              \"Please change the FLASH_SIZE in common.mk to 0x%x to enable the \"\n              \"OTA feature.\",\n              actualFlashSize);\n    ASSERT(false, \" \");\n  }\n\n  pmu_open();\n\n  analog_open();\n\n  ret = mpu_open();\n  if (ret == 0) {\n    mpu_setup();\n  }\n\n  srand(hal_sys_timer_get());\n\n#if defined(_AUTO_TEST_)\n  at_Init();\n#endif\n\n#ifdef VOICE_DATAPATH\n  app_audio_buffer_check();\n#endif\n\n#ifdef __FACTORY_MODE_SUPPORT__\n  if (bootmode & HAL_SW_BOOTMODE_FACTORY) {\n    hal_sw_bootmode_clear(HAL_SW_BOOTMODE_FACTORY);\n    ret = app_factorymode_init(bootmode);\n\n  } else if (bootmode & HAL_SW_BOOTMODE_CALIB) {\n    hal_sw_bootmode_clear(HAL_SW_BOOTMODE_CALIB);\n    ret = app_factorymode_calib_only();\n  }\n#ifdef __USB_COMM__\n  else if (bootmode & HAL_SW_BOOTMODE_CDC_COMM) {\n    hal_sw_bootmode_clear(HAL_SW_BOOTMODE_CDC_COMM);\n    ret = app_factorymode_cdc_comm();\n  }\n#endif\n  else\n#endif\n  {\n#ifdef FIRMWARE_REV\n    fwRevInfoInRam = fwRevInfoInFlash;\n    TRACE(4, \"The Firmware rev is %d.%d.%d.%d\", fwRevInfoInRam.softwareRevByte0,\n          fwRevInfoInRam.softwareRevByte1, fwRevInfoInRam.softwareRevByte2,\n          fwRevInfoInRam.softwareRevByte3);\n#endif\n    ret = app_init();\n  }\n  if (!ret) {\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"BT Init ok.\");\n#endif\n    while (1) {\n      osEvent evt;\n#ifndef __POWERKEY_CTRL_ONOFF_ONLY__\n      osSignalClear(main_thread_tid, 0x0f);\n#endif\n      // wait any signal\n      evt = osSignalWait(0x0, osWaitForever);\n\n      // get role from signal value\n      if (evt.status == osEventSignal) {\n        if (evt.value.signals & 0x04) {\n          sys_case = 1;\n          break;\n        } else if (evt.value.signals & 0x08) {\n          sys_case = 2;\n          break;\n        }\n      } else {\n        sys_case = 1;\n        break;\n      }\n    }\n  }\n#ifdef __WATCHER_DOG_RESET__\n  system_shutdown_wdt_config(10);\n#endif\n  app_deinit(ret);\n  TRACE(1, \"byebye~~~ %d\\n\", sys_case);\n  if ((sys_case == 1) || (sys_case == 0)) {\n    TRACE(0, \"shutdown\\n\");\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"System shutdown.\");\n    osDelay(50);\n#endif\n    hal_sw_bootmode_clear(HAL_SW_BOOTMODE_REBOOT);\n    pmu_shutdown();\n  } else if (sys_case == 2) {\n    TRACE(0, \"reset\\n\");\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"System reset.\");\n    osDelay(50);\n#endif\n    hal_cmu_sys_reboot();\n  }\n\n  return 0;\n}\n"
  },
  {
    "path": "platform/main/noapp_main.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"cmsis.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_cmu.h\"\n#include \"hal_dma.h\"\n#include \"hal_iomux.h\"\n#include \"hal_norflash.h\"\n#include \"hal_sleep.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hwtimer_list.h\"\n#include \"main_entry.h\"\n#include \"pmu.h\"\n\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#ifdef KERNEL_RTX\n#include \"rt_Time.h\"\n#endif\n#endif\n\n#ifdef HWTEST\n#include \"hwtest.h\"\n#ifdef VD_TEST\n#include \"voice_detector.h\"\n#endif\n#endif\n\n#ifdef __cplusplus\n#define EXTERN_C extern \"C\"\n#else\n#define EXTERN_C extern\n#endif\n\n#define TIMER_IRQ_PERIOD_MS 2500\n#define DELAY_PERIOD_MS 4000\n\n#ifndef FLASH_FILL\n#define FLASH_FILL 1\n#endif\n\n#ifdef KERNEL_RTX\n#define OS_TIME_STR \"[%2u/%u]\"\n#define OS_CUR_TIME , SysTick->VAL, os_time\n#else\n#define OS_TIME_STR\n#define OS_CUR_TIME\n#endif\n\n#if defined(MS_TIME)\n#define TIME_STR \"[%u]\" OS_TIME_STR\n#define CUR_TIME TICKS_TO_MS(hal_sys_timer_get()) OS_CUR_TIME\n#elif defined(RAW_TIME)\n#define TIME_STR \"[0x%X]\" OS_TIME_STR\n#define CUR_TIME hal_sys_timer_get() OS_CUR_TIME\n#else\n#define TIME_STR \"[%u/0x%X]\" OS_TIME_STR\n#define CUR_TIME                                                               \\\n  TICKS_TO_MS(hal_sys_timer_get()), hal_sys_timer_get() OS_CUR_TIME\n#endif\n\n#ifndef NO_TIMER\nstatic HWTIMER_ID hw_timer = NULL;\n\nstatic void timer_handler(void *param) {\n  TRACE(1, TIME_STR \" Timer handler: %u\", CUR_TIME, (uint32_t)param);\n  hwtimer_start(hw_timer, MS_TO_TICKS(TIMER_IRQ_PERIOD_MS));\n  TRACE(1, TIME_STR \" Start timer %u ms\", CUR_TIME, TIMER_IRQ_PERIOD_MS);\n}\n#endif\n\nconst static unsigned char bytes[FLASH_FILL] = {\n    0x1,\n};\n\n// GDB can set a breakpoint on the main function only if it is\n// declared as below, when linking with STD libraries.\n\nint MAIN_ENTRY(void) {\n  int POSSIBLY_UNUSED ret;\n\n  hwtimer_init();\n  hal_audma_open();\n  hal_gpdma_open();\n#ifdef DEBUG\n#if (DEBUG_PORT == 3)\n  hal_iomux_set_analog_i2c();\n  hal_iomux_set_uart2();\n  hal_trace_open(HAL_TRACE_TRANSPORT_UART2);\n#elif (DEBUG_PORT == 2)\n  hal_iomux_set_analog_i2c();\n  hal_iomux_set_uart1();\n  hal_trace_open(HAL_TRACE_TRANSPORT_UART1);\n#else\n  hal_iomux_set_uart0();\n  hal_trace_open(HAL_TRACE_TRANSPORT_UART0);\n#endif\n#endif\n\n#if !defined(SIMU)\n  uint8_t flash_id[HAL_NORFLASH_DEVICE_ID_LEN];\n  hal_norflash_get_id(HAL_NORFLASH_ID_0, flash_id, ARRAY_SIZE(flash_id));\n  TRACE(3, \"FLASH_ID: %02X-%02X-%02X\", flash_id[0], flash_id[1], flash_id[2]);\n#endif\n\n  TRACE(1, TIME_STR \" main started: filled@0x%08x\", CUR_TIME, (uint32_t)bytes);\n\n#ifndef NO_PMU\n  ret = pmu_open();\n  ASSERT(ret == 0, \"Failed to open pmu\");\n#endif\n  analog_open();\n\n  hal_cmu_simu_pass();\n\n#ifdef SIMU\n  hal_sw_bootmode_set(HAL_SW_BOOTMODE_FLASH_BOOT);\n  hal_cmu_sys_reboot();\n#else\n#ifdef SLEEP_TEST\n  hal_sleep_start_stats(10000, 10000);\n  hal_sysfreq_req(HAL_SYSFREQ_USER_INIT, HAL_CMU_FREQ_32K);\n#else\n  hal_sysfreq_req(HAL_SYSFREQ_USER_INIT, HAL_CMU_FREQ_104M);\n#endif\n  TRACE(1, \"CPU freq: %u\", hal_sys_timer_calc_cpu_freq(5, 0));\n#endif\n\n#ifdef HWTEST\n\n#ifdef USB_SERIAL_TEST\n  pmu_usb_config(PMU_USB_CONFIG_TYPE_DEVICE);\n  usb_serial_test();\n#endif\n#ifdef USB_SERIAL_DIRECT_XFER_TEST\n  pmu_usb_config(PMU_USB_CONFIG_TYPE_DEVICE);\n  usb_serial_direct_xfer_test();\n#endif\n#ifdef USB_AUDIO_TEST\n  pmu_usb_config(PMU_USB_CONFIG_TYPE_DEVICE);\n  usb_audio_test();\n#endif\n#ifdef I2C_TEST\n  i2c_test();\n#endif\n#ifdef AF_TEST\n  af_test();\n#endif\n#ifdef VD_TEST\n  voice_detector_test();\n#endif\n#ifdef CP_TEST\n  cp_test();\n#endif\n#ifdef SEC_ENG_TEST\n  sec_eng_test();\n#endif\n#ifdef TDM_TEST\n  tdm_test();\n#endif\n#ifdef A7_DSP_TEST\n  a7_dsp_test();\n#endif\n#ifdef TRANSQ_TEST\n  transq_test();\n#endif\n#ifdef PSRAM_TEST\n  psram_test();\n#endif\n#ifdef PSRAMUHS_TEST\n  psramuhs_test();\n#endif\n\n  SAFE_PROGRAM_STOP();\n\n#endif // HWTEST\n\n#ifdef NO_TIMER\n  TRACE(0, TIME_STR \" Enter sleep ...\", CUR_TIME);\n#else\n  hw_timer = hwtimer_alloc(timer_handler, 0);\n  hwtimer_start(hw_timer, MS_TO_TICKS(TIMER_IRQ_PERIOD_MS));\n  TRACE(1, TIME_STR \" Start timer %u ms\", CUR_TIME, TIMER_IRQ_PERIOD_MS);\n#endif\n\n  while (1) {\n#if defined(SLEEP_TEST) && !defined(RTOS)\n    hal_sleep_enter_sleep();\n#else\n    osDelay(DELAY_PERIOD_MS);\n    TRACE(1, TIME_STR \" Delay %u ms done\", CUR_TIME, DELAY_PERIOD_MS);\n#endif\n  }\n\n  SAFE_PROGRAM_STOP();\n  return 0;\n}\n"
  },
  {
    "path": "platform/main/nostd_main.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"noapp_main.cpp\"\n"
  },
  {
    "path": "platform/main/startup_main.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __ARM_ARCH_ISA_ARM\n\n#if defined(NOSTD) || defined(__ARMCC_VERSION)\n#define __STARTUP_CLEAR_BSS\n#endif\n\n#ifdef __ARMCC_VERSION\n#include \"link_sym_armclang.h\"\n#endif\n\n    .syntax    unified\n\n    .section .boot_loader, \"ax\", %progbits\n    .thumb\n    .thumb_func\n    .align  2\n    .globl  Boot_Loader\n    .type   Boot_Loader, %function\nBoot_Loader:\n\n#ifdef __ARM_ARCH_8M_MAIN__\n    ldr     r0, =__StackLimit\n    msr     msplim, r0\n#endif\n\n#if defined(CHIP_BEST2001) && defined(LARGE_RAM)\n    ldr   r3, =0x4000008c\n    ldr   r0, [r3]\n    bic.w r0, r0, #0x03f80000\n    orr.w r0, r0, #0x00f80000\t/*0x1f<<19*/\n    str   r0, [r3]\n#endif\n\n    ldr   r3, =__StackTop\n    msr   msp, r3\n\n    bl    NVIC_InitVectors\n\n#ifndef __NO_BOOT_INIT\n    bl    BootInit\n#endif\n\n#ifdef USER_SECURE_BOOT\n    bl user_secure_boot_init\n#endif\n\n/*  Firstly it copies data from read only memory to RAM. There are two schemes\n *  to copy. One can copy more than one sections. Another can only copy\n *  one section.  The former scheme needs more instructions and read-only\n *  data to implement than the latter.\n *  Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes.  */\n\n#ifdef __STARTUP_COPY_MULTIPLE\n/*  Multiple sections scheme.\n *\n *  Between symbol address __copy_table_start__ and __copy_table_end__,\n *  there are array of triplets, each of which specify:\n *    offset 0: LMA of start of a section to copy from\n *    offset 4: VMA of start of a section to copy to\n *    offset 8: size of the section to copy. Must be multiply of 4\n *\n *  All addresses must be aligned to 4 bytes boundary.\n */\n    ldr    r4, =__copy_table_start__\n    ldr    r5, =__copy_table_end__\n\n.L_loop0:\n    cmp    r4, r5\n    bge    .L_loop0_done\n    ldr    r1, [r4]\n    ldr    r2, [r4, #4]\n    ldr    r3, [r4, #8]\n\n.L_loop0_0:\n    subs    r3, #4\n    ittt    ge\n    ldrge    r0, [r1, r3]\n    strge    r0, [r2, r3]\n    bge    .L_loop0_0\n\n    adds    r4, #12\n    b    .L_loop0\n\n.L_loop0_done:\n#else\n/*  Single section scheme.\n *\n *  The ranges of copy from/to are specified by following symbols\n *    __etext: LMA of start of the section to copy from. Usually end of text\n *    __data_start__: VMA of start of the section to copy to\n *    __data_end__: VMA of end of the section to copy to\n *\n *  All addresses must be aligned to 4 bytes boundary.\n */\n    ldr    r1, =__etext\n    ldr    r2, =__data_start__\n    ldr    r3, =__data_end__\n\n.L_loop1:\n    cmp    r2, r3\n    ittt    lt\n    ldrlt    r0, [r1], #4\n    strlt    r0, [r2], #4\n    blt    .L_loop1\n#endif /*__STARTUP_COPY_MULTIPLE */\n\n/*  This part of work usually is done in C library startup code. Otherwise,\n *  define this macro to enable it in this startup.\n *\n *  There are two schemes too. One can clear multiple BSS sections. Another\n *  can only clear one section. The former is more size expensive than the\n *  latter.\n *\n *  Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.\n *  Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.\n */\n#ifdef __STARTUP_CLEAR_BSS_MULTIPLE\n/*  Multiple sections scheme.\n *\n *  Between symbol address __copy_table_start__ and __copy_table_end__,\n *  there are array of tuples specifying:\n *    offset 0: Start of a BSS section\n *    offset 4: Size of this BSS section. Must be multiply of 4\n */\n    ldr    r3, =__zero_table_start__\n    ldr    r4, =__zero_table_end__\n\n.L_loop2:\n    cmp    r3, r4\n    bge    .L_loop2_done\n    ldr    r1, [r3]\n    ldr    r2, [r3, #4]\n    movs    r0, 0\n\n.L_loop2_0:\n    subs    r2, #4\n    itt    ge\n    strge    r0, [r1, r2]\n    bge    .L_loop2_0\n\n    adds    r3, #8\n    b    .L_loop2\n.L_loop2_done:\n#elif defined (__STARTUP_CLEAR_BSS)\n/*  Single BSS section scheme.\n *\n *  The BSS section is specified by following symbols\n *    __bss_start__: start of the BSS section.\n *    __bss_end__: end of the BSS section.\n *\n *  Both addresses must be aligned to 4 bytes boundary.\n */\n    ldr    r1, =__bss_start__\n    ldr    r2, =__bss_end__\n\n    movs    r0, 0\n.L_loop3:\n    cmp    r1, r2\n    itt    lt\n    strlt    r0, [r1], #4\n    blt    .L_loop3\n#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */\n\n#ifndef __NO_SYSTEM_INIT\n    bl    SystemInit\n#endif\n\n#if defined(__ARMCC_VERSION) && !defined(NOSTD)\n    bl    __rt_entry\n#else\n    bl    _start\n#endif\n\n    .pool\n    .size    Boot_Loader, . - Boot_Loader\n\n    .end\n\n#endif\n\n"
  },
  {
    "path": "rtos/Makefile",
    "content": "ifeq ($(KERNEL),RTX)\nrtos_lib-y := rtx/TARGET_CORTEX_M/\nelse ifeq ($(KERNEL),RTX5)\nrtos_lib-y := rtx5/\nelse ifeq ($(KERNEL),FREERTOS)\nrtos_lib-y := freertos/\nendif\n\nifeq ($(MBED),1)\nrtos_lib-y += rtos/\nendif\n\nobj-y := rtos_lib.o\n\nsubdir-ccflags-y += -Iplatform/cmsis/inc -Iplatform/hal -Iutils/hwtimer_list\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/ARM7/TOOLCHAIN_GCC/HAL_CM0.S",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM0.S\n *      Purpose: Hardware Abstraction Layer for ARM7TDMI\n *      Rev.:    V1.0\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used \n *    to endorse or promote products derived from this software without \n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\" \n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE \n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF \n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS \n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN \n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) \n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        .file   \"HAL_CM0.S\"\n        .syntax unified\n\n        .equ    TCB_TSTACK, 40\n\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        .arm\n\n        .section \".text\"\n        .align  2\n\n/*-------------------------- Save Context --------------------------------*/\n/* MUST be called the first */\n.macro SaveContext\n\n      /* Push R0 as we are going to use the register. */                                      \\\n        STMDB  SP!, {R0}\n\n        /* Set R0 to SP(user) */\n        STMDB  SP,{SP}^\n        NOP\n        SUB    SP, SP, #4\n        LDMIA  SP!,{R0}\n\n        /* Push the LR return address onto the user stack. */\n        STMDB  R0!, {LR}\n\n        /* Now we have saved LR we can use it instead of R0. */\n        MOV    LR, R0\n\n        /* Pop R0 so we can save it onto the system mode stack. */\n        LDMIA  SP!, {R0}\n\n        /* Push all the system mode registers onto the task stack. */\n        STMDB  LR,{R0-R12,LR}^      /* LR can not be changed because  user's LR is used*/\n        NOP                         /* pass 1 cycle before changing LR */\n        SUB    LR, LR, #14*4        /* change LR now -15 dwords (R0-R14)*/\n\n        /* Push the SPSR onto the task stack. */\n        MRS    R0, SPSR\n        STMDB  LR!, {R0}\n\n        /* Store the new top of stack for the task. */\n        LDR    R0,=os_tsk\n        LDR    R0, [R0]             /* R0 = (tcb) os_tsk.run */\n        STR    LR, [R0, TCB_TSTACK] /* tcb.tsk_stack = SP(user) */\n.endm\n\n/*-------------------------- Restore Context --------------------------------*/\n        .type   RestoreContext, %function\n        .global RestoreContext\nRestoreContext:\n        .fnstart\n        .cantunwind\n    /* Set the LR to the task stack. */\n    LDR     R0,=os_tsk\n    LDR     R1, [R0, 4]              /* R1 = (tcb) os_tsk.new */\n    STR     R1, [R0]                 /* os_tsk.run = os_tsk_newk */\n    LDR     LR, [R1, TCB_TSTACK]     /* LR = tcb.tsk_stack */\n\n    /* Get the SPSR from the stack. */\n    LDMFD   LR!, {R0}                /*  SPSR */\n    MSR     SPSR, R0\n\n    /* Restore all system mode registers for the task. */\n    LDMFD  LR, {R0-R12,LR}^\n    NOP\n\n    ADD    LR, LR, 15*4               /* increase starck pointer */\n    /* Set SP(user) to LR */\n    STMDB  SP!,{LR}\n    LDMIA  SP,{SP}^\n    NOP\n    ADD    SP, SP, #4\n\n    /* Restore the return address. */\n    LDR    LR, [LR,#-4]                   /* last dword is task's PC register */\n\n    /* And return - correcting the offset in the LR to obtain the */\n    /* correct address. */\n    SUBS    PC, LR, #4\n\n/*-------------------------- End --------------------------------*/\n .fnend\n        .size   RestoreContext, .-RestoreContext\n\n\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n#       void rt_set_PSP (U32 stack);\n\n        .type   rt_set_PSP, %function\n        .global rt_set_PSP\nrt_set_PSP:\n        .fnstart\n        .cantunwind\n\n        MOV     SP,R0\n        BX      LR\n\n        .fnend\n        .size   rt_set_PSP, .-rt_set_PSP\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n#       U32 rt_get_PSP (void);\n\n        .type   rt_get_PSP, %function\n        .global rt_get_PSP\nrt_get_PSP:\n        .fnstart\n        .cantunwind\n\n        MOV     R0,SP\n        BX      LR\n\n        .fnend\n        .size   rt_get_PSP, .-rt_get_PSP\n\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n#      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .type   _alloc_box, %function\n        .global _alloc_box\n_alloc_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R3,=rt_alloc_box\n        MOV     R12, R3\n        MRS     R3, CPSR\n        AND     R3, 0x1F\n        CMP     R3, 0x12 /* IRQ mode*/\n        BNE     PrivilegedA\n        CMP     R3, 0x1F /* System mode*/\n        BNE     PrivilegedA\n        SVC     0\n        BX      LR\nPrivilegedA:\n        BX      R12\n\n        .fnend\n        .size   _alloc_box, .-_alloc_box\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n#       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .type   _free_box, %function\n        .global _free_box\n_free_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R3,=rt_free_box\n        MOV     R12, R3\n        MRS     R3, CPSR\n        AND     R3, 0x1F\n        CMP     R3, 0x12 /* IRQ mode*/\n        BNE     PrivilegedA\n        CMP     R3, 0x1F /* System mode*/\n        BNE     PrivilegedA\n        SVC     0\n        BX      LR\nPrivilegedF:\n        BX      R12\n\n        .fnend\n        .size   _free_box, .-_free_box\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n#       void SVC_Handler (void);\n\n        .type   SVC_Handler, %function\n        .global SVC_Handler\nSVC_Handler:\n        .fnstart\n        .cantunwind\n        /* Within an IRQ ISR the link register has an offset from the true return\n        address, but an SWI ISR does not.  Add the offset manually so the same\n        ISR return code can be used in both cases. */\n\n        STMFD   SP!, {R0,LR}          /* Store registers. */\n        ADD     LR, LR, #4            /* Align LR with IRQ handler */\n        SaveContext\n        MOV     R11, LR               /* Save Task Stack Pointer */\n        LDMFD   SP!, {R0,LR}          /* Restore registers and return. */\n        STMFD   SP!, {R11}            /* Save Task Stack Pointer */\n\n        LDR     R5, [LR,#-4]          /* Calculate address of SWI instruction and load it into r5. */\n        BIC     R5, R5,#0xff000000    /* Mask off top 8 bits of instruction to give SWI number. */\n\n        CMP     R5, #0\n        BNE     SVC_User                /* User SVC Number > 0 */\n        MOV     LR, PC                  /* set LR to return address */\n        BX      R12                     /* Call SVC Function */\n\n        LDMFD   SP!, {R11}              /* Load Task Stack Pointer */\n        STMIB   R11!, {R0-R3}           /* Store return values to Task stack */\n\nSVC_Exit:\n        B       RestoreContext           /* return to the task */\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        LDR     R6,=SVC_Count\n        LDR     R6,[R6]\n        CMP     R5,R6\n        LDMFDHI   SP!, {R11}\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table - 4\n        LSLS    R5,R5,#2\n        LDR     R4,[R4,R5]              /* Load SVC Function Address */\n        /*  R0-R3,R12  are unchanged */\n        MOV     LR, PC                  /* set LR to return address */\n        BX      R4                      /* Call SVC Function */\n\n        LDMFD   SP!, {R11}              /* Load Task Stack Pointer */\n        BEQ     SVC_Exit                /* no need in return values */\n\n        STMIB   R11!, {R0-R3}           /* Store return values to Task stack */\nSVC_Done:\n        B       RestoreContext           /* return to the task */\n\n        .fnend\n        .size   SVC_Handler, .-SVC_Handler\n        \n\n/*-------------------------- IRQ_Handler ---------------------------------*/\n\n#       void IRQ_Handler (void);\n\n        .type   IRQ_Handler, %function\n        .global IRQ_Handler\nIRQ_Handler:\n        .fnstart\n        .cantunwind\n\n        SaveContext\n\n        MOV R0, #0xFFFFFF00\n        LDR R0, [R0]               /* Load address of raised IRQ handler*/\n\n        MOV LR, PC\n        BX  R0\n\n        MOV R0, #0xFFFFFF00\n        STR R0, [R0]              /* Clear interrupt */\n\n        B   RestoreContext\n\n        .fnend\n        .size   IRQ_Handler, .-IRQ_Handler\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n#       void SysTick_Handler (void);\n\n        .type   SysTick_Handler, %function\n        .global SysTick_Handler\nSysTick_Handler:\n        .fnstart\n        .cantunwind\n\n        PUSH    {LR}\n        BL      rt_systick\n        POP     {LR}\n        BX      LR               /* return to IRQ handler */\n\n/*-------------------------- End --------------------------------*/\n .fnend\n        .size   SysTick_Handler, .-SysTick_Handler\n\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n.end\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/ARM7/TOOLCHAIN_GCC/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.60\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used \n; *    to endorse or promote products derived from this software without \n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\" \n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE \n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF \n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS \n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN \n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) \n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n        .file   \"SVC_Table.S\"\n\n\n        .section \".svc_table\"\n\n        .global  SVC_Table\nSVC_Table:\n/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */\n#       .long   __SVC_1                 /* user SVC function */\nSVC_End:\n\n        .global  SVC_Count\nSVC_Count:\n        .long   (SVC_End-SVC_Table)/4\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/HAL_CM.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM.C\n *      Purpose: Hardware Abstraction Layer for ARM7TDMI\n *      Rev.:    V1.0\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n#ifdef DBG_MSG\nBIT dbg_msg;\n#endif\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_init_stack ---------------------------------*/\n\nvoid rt_init_stack(P_TCB p_TCB, FUNCP task_body) {\n  /* Prepare TCB and saved context for a first time start of a task. */\n  U32 *stk, i, size;\n\n  /* Prepare a complete interrupt frame for first task start */\n  size = p_TCB->priv_stack >> 2;\n\n  /* Write to the top of stack. */\n  stk = &p_TCB->stack[size];\n\n  /* Auto correct to 8-byte ARM stack alignment. */\n  if ((U32)stk & 0x04) {\n    stk--;\n  }\n\n  stk -= 16;\n\n  /* Default xPSR and initial PC */\n  stk[15] = (U32)task_body + 4; /* add 4 byte offset because SUB PC, LR - 4 */\n  stk[0] = INITIAL_xPSR;\n\n  /* Clear R0-R13/LR registers. */\n  for (i = 1; i < 14; i++) {\n    stk[i] = 0;\n  }\n\n  /* Assign a void pointer to R0. */\n  stk[TCB_STACK_R0_OFFSET_DWORDS] = (U32)p_TCB->msg;\n\n  /* Initial Task stack pointer. */\n  p_TCB->tsk_stack = (U32)stk;\n\n  /* Task entry point. */\n  p_TCB->ptask = task_body;\n\n  /* Set a magic word for checking of stack overflow.\n   For the main thread (ID: 0x01) the stack is in a memory area shared with the\n   heap, therefore the last word of the stack is a moving target.\n   We want to do stack/heap collision detection instead.\n  */\n  if (p_TCB->task_id != 0x01)\n    p_TCB->stack[0] = MAGIC_WORD;\n}\n\n/*--------------------------- rt_ret_val ----------------------------------*/\n\nstatic __inline U32 *rt_ret_regs(P_TCB p_TCB) {\n  /* Get pointer to task return value registers (R0..R3) in Stack */\n\n  /* Stack Frame: CPSR,R0-R13,PC */\n  return (U32 *)(p_TCB->tsk_stack + TCB_STACK_R0_OFFSET_BYTES);\n}\n\nvoid rt_ret_val(P_TCB p_TCB, U32 v0) {\n  U32 *ret;\n\n  ret = rt_ret_regs(p_TCB);\n  ret[0] = v0;\n}\n\nvoid rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {\n  U32 *ret;\n\n  ret = rt_ret_regs(p_TCB);\n  ret[0] = v0;\n  ret[1] = v1;\n}\n\n/*--------------------------- dbg_init --------------------------------------*/\n\n#ifdef DBG_MSG\nvoid dbg_init(void) {\n  if ((DEMCR & DEMCR_TRCENA) && (ITM_CONTROL & ITM_ITMENA) &&\n      (ITM_ENABLE & (1UL << 31))) {\n    dbg_msg = __TRUE;\n  }\n}\n#endif\n\n/*--------------------------- dbg_task_notify -------------------------------*/\n\n#ifdef DBG_MSG\nvoid dbg_task_notify(P_TCB p_tcb, BOOL create) {\n  while (ITM_PORT31_U32 == 0)\n    ;\n  ITM_PORT31_U32 = (U32)p_tcb->ptask;\n  while (ITM_PORT31_U32 == 0)\n    ;\n  ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;\n}\n#endif\n\n/*--------------------------- dbg_task_switch -------------------------------*/\n\n#ifdef DBG_MSG\nvoid dbg_task_switch(U32 task_id) {\n  while (ITM_PORT31_U32 == 0)\n    ;\n  ITM_PORT31_U8 = task_id;\n}\n#endif\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/RTX_CM_lib.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_CM_LIB.H\n *      Purpose: RTX Kernel System Configuration\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"cmsis_os.h\"\n\n#if   defined (__CC_ARM)\n#pragma O3\n#define __USED __attribute__((used))\n#elif defined (__GNUC__)\n#pragma GCC optimize (\"O3\")\n#define __USED __attribute__((used))\n#elif defined (__ICCARM__)\n#define __USED __root\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Definitions\n *---------------------------------------------------------------------------*/\n\n#define _declare_box(pool,size,cnt)  uint32_t pool[(((size)+3)/4)*(cnt) + 3]\n#define _declare_box8(pool,size,cnt) uint64_t pool[(((size)+7)/8)*(cnt) + 2]\n\n#define OS_TCB_SIZE     48\n#define OS_TMR_SIZE     8\n\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n\ntypedef void    *OS_ID;\ntypedef uint32_t OS_TID;\ntypedef uint32_t OS_MUT[3];\ntypedef uint32_t OS_RESULT;\n\n#define runtask_id()    rt_tsk_self()\n#define mutex_init(m)   rt_mut_init(m)\n#define mutex_wait(m)   os_mut_wait(m,0xFFFF)\n#define mutex_rel(m)    os_mut_release(m)\n\nextern OS_TID    rt_tsk_self    (void);\nextern void      rt_mut_init    (OS_ID mutex);\nextern OS_RESULT rt_mut_release (OS_ID mutex);\nextern OS_RESULT rt_mut_wait    (OS_ID mutex, uint16_t timeout);\n\n#define os_mut_wait(mutex,timeout) _os_mut_wait((uint32_t)rt_mut_wait,mutex,timeout)\n#define os_mut_release(mutex)      _os_mut_release((uint32_t)rt_mut_release,mutex)\n\nOS_RESULT _os_mut_release (uint32_t p, OS_ID mutex)                   __svc_indirect(0);\nOS_RESULT _os_mut_wait    (uint32_t p, OS_ID mutex, uint16_t timeout) __svc_indirect(0);\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n#if (OS_TIMERS != 0)\n#define OS_TASK_CNT (OS_TASKCNT + 1)\n#else\n#define OS_TASK_CNT  OS_TASKCNT\n#endif\n\nuint16_t const os_maxtaskrun = OS_TASK_CNT;\nuint32_t const os_rrobin     = (OS_ROBIN << 16) | OS_ROBINTOUT;\nuint32_t const os_trv        = OS_TRV;\nuint8_t  const os_flags      = OS_RUNPRIV;\n\n/* Export following defines to uVision debugger. */\n__USED uint32_t const os_clockrate = OS_TICK;\n__USED uint32_t const os_timernum  = 0;\n\n/* Stack for the os_idle_demon */\nunsigned int idle_task_stack[OS_IDLESTKSIZE];\nunsigned short const idle_task_stack_size = OS_IDLESTKSIZE;\n\n#ifndef OS_FIFOSZ\n #define OS_FIFOSZ      16\n#endif\n\n/* Fifo Queue buffer for ISR requests.*/\nuint32_t       os_fifo[OS_FIFOSZ*2+1];\nuint8_t  const os_fifo_size = OS_FIFOSZ;\n\n/* An array of Active task pointers. */\nvoid *os_active_TCB[OS_TASK_CNT];\n\n/* User Timers Resources */\n#if (OS_TIMERS != 0)\nextern void osTimerThread (void const *argument);\nosThreadDef(osTimerThread, (osPriority)(OS_TIMERPRIO-3), 4*OS_TIMERSTKSZ);\nosThreadId osThreadId_osTimerThread;\nosMessageQDef(osTimerMessageQ, OS_TIMERCBQS, void *);\nosMessageQId osMessageQId_osTimerMessageQ;\n#else\nosThreadDef_t os_thread_def_osTimerThread = { NULL };\nosThreadId osThreadId_osTimerThread;\nosMessageQDef(osTimerMessageQ, 0, void *);\nosMessageQId osMessageQId_osTimerMessageQ;\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      RTX Optimizations (empty functions)\n *---------------------------------------------------------------------------*/\n\n#if OS_ROBIN == 0\n void rt_init_robin (void) {;}\n void rt_chk_robin  (void) {;}\n#endif\n\n#if OS_STKCHECK == 0\n void rt_stk_check  (void) {;}\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Standard Library multithreading interface\n *---------------------------------------------------------------------------*/\n\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n static OS_MUT   std_libmutex[OS_MUTEXCNT];\n static uint32_t nr_mutex;\n\n /*--------------------------- _mutex_initialize -----------------------------*/\n\nint _mutex_initialize (OS_ID *mutex) {\n  /* Allocate and initialize a system mutex. */\n\n  if (nr_mutex >= OS_MUTEXCNT) {\n    /* If you are here, you need to increase the number OS_MUTEXCNT. */\n    os_error_str(\"Not enough stdlib mutexes\\n\");\n  }\n  *mutex = &std_libmutex[nr_mutex++];\n  mutex_init (*mutex);\n  return (1);\n}\n\n\n/*--------------------------- _mutex_acquire --------------------------------*/\n\n__attribute__((used)) void _mutex_acquire (OS_ID *mutex) {\n  /* Acquire a system mutex, lock stdlib resources. */\n  if (runtask_id ()) {\n    /* RTX running, acquire a mutex. */\n    mutex_wait (*mutex);\n  }\n}\n\n\n/*--------------------------- _mutex_release --------------------------------*/\n\n__attribute__((used)) void _mutex_release (OS_ID *mutex) {\n  /* Release a system mutex, unlock stdlib resources. */\n  if (runtask_id ()) {\n    /* RTX running, release a mutex. */\n    mutex_rel (*mutex);\n  }\n}\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      RTX Startup\n *---------------------------------------------------------------------------*/\n\n/* Main Thread definition */\nextern int main (void);\nosThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL};\n\n// This define should be probably moved to the CMSIS layer\n\n#if defined(TARGET_LPC2460)\nextern unsigned char     __usr_stack_top__[];\n#define INITIAL_SP            (__usr_stack_top__)\n\n#else\n#error \"no target defined\"\n\n#endif\n\n#ifdef __CC_ARM\nextern unsigned char     Image$$RW_IRAM1$$ZI$$Limit[];\n#define HEAP_START      (Image$$RW_IRAM1$$ZI$$Limit)\n#elif defined(__GNUC__)\nextern unsigned char     __end__[];\n#define HEAP_START      (__end__)\n#elif defined(__ICCARM__)\n#pragma section=\"HEAP\"\n#define HEAP_START     (void *)__section_begin(\"HEAP\")\n#endif\n\nvoid set_main_stack(void) {\n    // That is the bottom of the main stack block: no collision detection\n    os_thread_def_main.stack_pointer = HEAP_START;\n\n    // Leave OS_SCHEDULERSTKSIZE words for the scheduler and interrupts\n    os_thread_def_main.stacksize = (INITIAL_SP - (unsigned int)HEAP_START) - (OS_SCHEDULERSTKSIZE * 4);\n}\n\n#if defined (__CC_ARM)\n#ifdef __MICROLIB\nvoid _main_init (void) __attribute__((section(\".ARM.Collect$$$$000000FF\")));\nvoid _main_init (void) {\n  osKernelInitialize();\n  set_main_stack();\n  osThreadCreate(&os_thread_def_main, NULL);\n  osKernelStart();\n  for (;;);\n}\n#else\n\n/* The single memory model is checking for stack collision at run time, verifing\n   that the heap pointer is underneath the stack pointer.\n\n   With the RTOS there is not only one stack above the heap, there are multiple\n   stacks and some of them are underneath the heap pointer.\n*/\n#pragma import(__use_two_region_memory)\n\n__asm void __rt_entry (void) {\n\n  IMPORT  __user_setup_stackheap\n  IMPORT  __rt_lib_init\n  IMPORT  os_thread_def_main\n  IMPORT  osKernelInitialize\n  IMPORT  set_main_stack\n  IMPORT  osKernelStart\n  IMPORT  osThreadCreate\n  IMPORT  exit\n\n  BL      __user_setup_stackheap\n  MOV     R1,R2\n  BL      __rt_lib_init\n  BL      osKernelInitialize\n  BL      set_main_stack\n  LDR     R0,=os_thread_def_main\n  MOVS    R1,#0\n  BL      osThreadCreate\n  BL      osKernelStart\n  BL      exit\n\n  ALIGN\n}\n#endif\n\n#elif defined (__GNUC__)\n\n#ifdef __CS3__\n\n/* CS3 start_c routine.\n *\n * Copyright (c) 2006, 2007 CodeSourcery Inc\n *\n * The authors hereby grant permission to use, copy, modify, distribute,\n * and license this software and its documentation for any purpose, provided\n * that existing copyright notices are retained in all copies and that this\n * notice is included verbatim in any distributions. No written agreement,\n * license, or royalty fee is required for any of the authorized uses.\n * Modifications to this software may be copyrighted by their authors\n * and need not follow the licensing terms described here, provided that\n * the new terms are clearly indicated on the first page of each file where\n * they apply.\n */\n\n#include \"cs3.h\"\n\nextern void __libc_init_array (void);\n\n__attribute ((noreturn)) void __cs3_start_c (void){\n  unsigned regions = __cs3_region_num;\n  const struct __cs3_region *rptr = __cs3_regions;\n\n  /* Initialize memory */\n  for (regions = __cs3_region_num, rptr = __cs3_regions; regions--; rptr++) {\n    long long *src = (long long *)rptr->init;\n    long long *dst = (long long *)rptr->data;\n    unsigned limit = rptr->init_size;\n    unsigned count;\n\n    if (src != dst)\n      for (count = 0; count != limit; count += sizeof (long long))\n        *dst++ = *src++;\n    else\n      dst = (long long *)((char *)dst + limit);\n    limit = rptr->zero_size;\n    for (count = 0; count != limit; count += sizeof (long long))\n      *dst++ = 0;\n  }\n\n  /* Run initializers.  */\n  __libc_init_array ();\n\n  osKernelInitialize();\n  set_main_stack();\n  osThreadCreate(&os_thread_def_main, NULL);\n  osKernelStart();\n  for (;;);\n}\n\n#else\n\n__attribute__((naked)) void software_init_hook (void) {\n  __asm (\n    \".syntax unified\\n\"\n    \".thumb\\n\"\n    \"movs r0,#0\\n\"\n    \"movs r1,#0\\n\"\n    \"mov  r8,r0\\n\"\n    \"mov  r9,r1\\n\"\n    \"ldr  r0,= __libc_fini_array\\n\"\n    \"bl   atexit\\n\"\n    \"bl   __libc_init_array\\n\"\n    \"mov  r0,r8\\n\"\n    \"mov  r1,r9\\n\"\n    \"bl   osKernelInitialize\\n\"\n    \"bl   set_main_stack\\n\"\n    \"ldr  r0,=os_thread_def_main\\n\"\n    \"movs r1,#0\\n\"\n    \"bl   osThreadCreate\\n\"\n    \"bl   osKernelStart\\n\"\n    \"bl   exit\\n\"\n  );\n}\n\n#endif\n\n#elif defined (__ICCARM__)\n\nextern int  __low_level_init(void);\nextern void __iar_data_init3(void);\nextern void exit(int arg);\n\n__noreturn __stackless void __cmain(void) {\n  int a;\n\n  if (__low_level_init() != 0) {\n    __iar_data_init3();\n  }\n  osKernelInitialize();\n  set_main_stack();\n  osThreadCreate(&os_thread_def_main, NULL);\n  a = osKernelStart();\n  exit(a);\n}\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/RTX_Conf.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_CONFIG.H\n *      Purpose: Exported functions of RTX_Config.c\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n\n/* Error Codes */\n#define OS_ERR_STK_OVF          1\n#define OS_ERR_FIFO_OVF         2\n#define OS_ERR_MBX_OVF          3\n\n/* Definitions */\n#define BOX_ALIGN_8                   0x80000000\n#define _declare_box(pool,size,cnt)   U32 pool[(((size)+3)/4)*(cnt) + 3]\n#define _declare_box8(pool,size,cnt)  U64 pool[(((size)+7)/8)*(cnt) + 2]\n#define _init_box8(pool,size,bsize)   _init_box (pool,size,(bsize) | BOX_ALIGN_8)\n\n/* Variables */\nextern U32 idle_task_stack[];\nextern U32 os_fifo[];\nextern void *os_active_TCB[];\n\n/* Constants */\nextern U16 const os_maxtaskrun;\nextern U32 const os_trv;\nextern U8  const os_flags;\nextern U32 const os_rrobin;\nextern U32 const os_clockrate;\nextern U32 const os_timernum;\nextern U16 const idle_task_stack_size;\n\nextern U8  const os_fifo_size;\n\n/* Functions */\nextern void os_idle_demon   (void);\nextern int  os_tick_init    (void);\nextern void os_tick_irqack  (void);\nextern void os_tmr_call     (U16  info);\nextern void os_error        (U32 err_code);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/RTX_Conf_CM.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_Conf_CM.C\n *      Purpose: Configuration of CMSIS RTX Kernel for ARM7TDMI\n *      Rev.:    V1.0\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"cmsis_os.h\"\n\n/*----------------------------------------------------------------------------\n *      RTX User configuration part BEGIN\n *---------------------------------------------------------------------------*/\n\n//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------\n//\n// Thread Configuration\n// =======================\n//\n//   Number of concurrent running threads <0-250>\n//    Defines max. number of threads that will run at the same time.\n//       counting \"main\", but not counting \"osTimerThread\"\n//    Default: 6\n#ifndef OS_TASKCNT\n#if defined(TARGET_LPC2368) || defined(TARGET_LPC2460)\n#define OS_TASKCNT 14\n#else\n#error \"no target defined\"\n#endif\n#endif\n\n//   Scheduler (+ interrupts) stack size [bytes] <64-4096:8><#/4>\n#ifndef OS_SCHEDULERSTKSIZE\n#if defined(TARGET_LPC2368) || defined(TARGET_LPC2460)\n#define OS_SCHEDULERSTKSIZE (136 * 2)\n#else\n#error \"no target defined\"\n#endif\n#endif\n\n//   Idle stack size [bytes] <64-4096:8><#/4>\n//    Defines default stack size for the Idle thread.\n#ifndef OS_IDLESTKSIZE\n#define OS_IDLESTKSIZE 136\n#endif\n\n//   Timer Thread stack size [bytes] <64-4096:8><#/4>\n//    Defines stack size for Timer thread.\n//    Default: 200\n#ifndef OS_TIMERSTKSZ\n#define OS_TIMERSTKSZ WORDS_STACK_SIZE\n#endif\n\n// Check for stack overflow\n//  Includes the stack checking code for stack overflow.\n//  Note that additional code reduces the Kernel performance.\n#ifndef OS_STKCHECK\n#define OS_STKCHECK 1\n#endif\n\n// Processor mode for thread execution\n//   <0=> Unprivileged mode\n//   <1=> Privileged mode\n//  Default: Privileged mode\n#ifndef OS_RUNPRIV\n#define OS_RUNPRIV 1\n#endif\n\n// \n// SysTick Timer Configuration\n// ==============================\n//\n//   Timer clock value [Hz] <1-1000000000>\n//    Defines the timer clock value.\n//    Default: 6000000  (6MHz)\n#ifndef OS_CLOCK\n#if defined(TARGET_LPC2368)\n#define OS_CLOCK 96000000\n\n#elif defined(TARGET_LPC2460)\n#define OS_CLOCK 72000000\n\n#else\n#error \"no target defined\"\n#endif\n#endif\n\n//   Timer tick value [us] <1-1000000>\n//    Defines the timer tick value.\n//    Default: 1000  (1ms)\n#ifndef OS_TICK\n#define OS_TICK 1000\n#endif\n\n// \n\n// System Configuration\n// =======================\n//\n// Round-Robin Thread switching\n// ===============================\n//\n//  Enables Round-Robin Thread switching.\n#ifndef OS_ROBIN\n#define OS_ROBIN 1\n#endif\n\n//   Round-Robin Timeout [ticks] <1-1000>\n//    Defines how long a thread will execute before a thread switch.\n//    Default: 5\n#ifndef OS_ROBINTOUT\n#define OS_ROBINTOUT 5\n#endif\n\n// \n\n// User Timers\n// ==============\n//    Enables user Timers\n#ifndef OS_TIMERS\n#define OS_TIMERS 1\n#endif\n\n//   Timer Thread Priority\n//                        <1=> Low\n//                        <2=> Below Normal\n//                        <3=> Normal\n//                        <4=> Above Normal\n//                        <5=> High\n//                        <6=> Realtime (highest)\n//    Defines priority for Timer Thread\n//    Default: High\n#ifndef OS_TIMERPRIO\n#define OS_TIMERPRIO 5\n#endif\n\n//   Timer Callback Queue size <1-32>\n//    Number of concurrent active timer callback functions.\n//    Default: 4\n#ifndef OS_TIMERCBQSZ\n#define OS_TIMERCBQS 4\n#endif\n\n// \n\n//   ISR FIFO Queue size<4=>   4 entries  <8=>   8 entries\n//                         <12=> 12 entries  <16=> 16 entries\n//                         <24=> 24 entries  <32=> 32 entries\n//                         <48=> 48 entries  <64=> 64 entries\n//                         <96=> 96 entries\n//    ISR functions store requests to this buffer,\n//    when they are called from the interrupt handler.\n//    Default: 16 entries\n#ifndef OS_FIFOSZ\n#define OS_FIFOSZ 16\n#endif\n\n// \n\n//------------- <<< end of configuration section >>> -----------------------\n\n// Standard library system mutexes\n// ===============================\n//  Define max. number system mutexes that are used to protect\n//  the arm standard runtime library. For microlib they are not used.\n#ifndef OS_MUTEXCNT\n#define OS_MUTEXCNT 12\n#endif\n\n/*----------------------------------------------------------------------------\n *      RTX User configuration part END\n *---------------------------------------------------------------------------*/\n\n#define OS_TRV ((uint32_t)(((double)OS_CLOCK * (double)OS_TICK) / 1E6) - 1)\n\n/*----------------------------------------------------------------------------\n *      OS Idle daemon\n *---------------------------------------------------------------------------*/\nvoid os_idle_demon(void) {\n  /* The idle demon is a system thread, running when no other thread is      */\n  /* ready to run.                                                           */\n\n  /* Sleep: ideally, we should put the chip to sleep.\n     Unfortunately, this usually requires disconnecting the interface chip\n     (debugger). This can be done, but it would break the local file system.\n  */\n  for (;;) {\n    // sleep();\n  }\n}\n\n/*----------------------------------------------------------------------------\n *      RTX Errors\n *---------------------------------------------------------------------------*/\nextern void mbed_die(void);\n\nvoid os_error(uint32_t err_code) {\n  /* This function is called when a runtime error is detected. Parameter     */\n  /* 'err_code' holds the runtime error code (defined in RTX_Conf.h).      */\n  mbed_die();\n}\n\nvoid sysThreadError(osStatus status) {\n  if (status != osOK) {\n    mbed_die();\n  }\n}\n\n/*----------------------------------------------------------------------------\n *      RTX Configuration Functions\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_CM_lib.h\"\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/cmsis_os.h",
    "content": "/* ----------------------------------------------------------------------\n * Copyright (C) 2015 ARM Limited. All rights reserved.\n *\n * $Date:        5. June 2012\n * $Revision:    V1.01\n *\n * Project:      CMSIS-RTOS API\n * Title:        cmsis_os.h RTX header file\n *\n * Version 0.02\n *    Initial Proposal Phase\n * Version 0.03\n *    osKernelStart added, optional feature: main started as thread\n *    osSemaphores have standard behavior\n *    osTimerCreate does not start the timer, added osTimerStart\n *    osThreadPass is renamed to osThreadYield\n * Version 1.01\n *    Support for C++ interface\n *     - const attribute removed from the osXxxxDef_t typedef's\n *     - const attribute added to the osXxxxDef macros\n *    Added: osTimerDelete, osMutexDelete, osSemaphoreDelete\n *    Added: osKernelInitialize\n * -------------------------------------------------------------------- */\n\n/**\n\\page cmsis_os_h Header File Template: cmsis_os.h\n\nThe file \\b cmsis_os.h is a template header file for a CMSIS-RTOS compliant Real-Time Operating System (RTOS).\nEach RTOS that is compliant with CMSIS-RTOS shall provide a specific \\b cmsis_os.h header file that represents\nits implementation.\n\nThe file cmsis_os.h contains:\n - CMSIS-RTOS API function definitions\n - struct definitions for parameters and return types\n - status and priority values used by CMSIS-RTOS API functions\n - macros for defining threads and other kernel objects\n\n\nName conventions and header file modifications\n\nAll definitions are prefixed with \\b os to give an unique name space for CMSIS-RTOS functions.\nDefinitions that are prefixed \\b os_ are not used in the application code but local to this header file.\nAll definitions and functions that belong to a module are grouped and have a common prefix, i.e. \\b osThread.\n\nDefinitions that are marked with CAN BE CHANGED can be adapted towards the needs of the actual CMSIS-RTOS implementation.\nThese definitions can be specific to the underlying RTOS kernel.\n\nDefinitions that are marked with MUST REMAIN UNCHANGED cannot be altered. Otherwise the CMSIS-RTOS implementation is no longer\ncompliant to the standard. Note that some functions are optional and need not to be provided by every CMSIS-RTOS implementation.\n\n\nFunction calls from interrupt service routines\n\nThe following CMSIS-RTOS functions can be called from threads and interrupt service routines (ISR):\n  - \\ref osSignalSet\n  - \\ref osSemaphoreRelease\n  - \\ref osPoolAlloc, \\ref osPoolCAlloc, \\ref osPoolFree\n  - \\ref osMessagePut, \\ref osMessageGet\n  - \\ref osMailAlloc, \\ref osMailCAlloc, \\ref osMailGet, \\ref osMailPut, \\ref osMailFree\n\nFunctions that cannot be called from an ISR are verifying the interrupt status and return in case that they are called\nfrom an ISR context the status code \\b osErrorISR. In some implementations this condition might be caught using the HARD FAULT vector.\n\nSome CMSIS-RTOS implementations support CMSIS-RTOS function calls from multiple ISR at the same time.\nIf this is impossible, the CMSIS-RTOS rejects calls by nested ISR functions with the status code \\b osErrorISRRecursive.\n\n\nDefine and reference object definitions\n\nWith \\#define osObjectsExternal objects are defined as external symbols. This allows to create a consistent header file\nthat is used throughout a project as shown below:\n\nHeader File\n\\code\n#include                                          // CMSIS RTOS header file\n\n// Thread definition\nextern void thread_sample (void const *argument);             // function prototype\nosThreadDef (thread_sample, osPriorityBelowNormal, 1, 100);\n\n// Pool definition\nosPoolDef(MyPool, 10, long);\n\\endcode\n\n\nThis header file defines all objects when included in a C/C++ source file. When \\#define osObjectsExternal is\npresent before the header file, the objects are defined as external symbols. A single consistent header file can therefore be\nused throughout the whole project.\n\nExample\n\\code\n#include \"osObjects.h\"     // Definition of the CMSIS-RTOS objects\n\\endcode\n\n\\code\n#define osObjectExternal   // Objects will be defined as external symbols\n#include \"osObjects.h\"     // Reference to the CMSIS-RTOS objects\n\\endcode\n\n*/\n\n#ifndef _CMSIS_OS_H\n#define _CMSIS_OS_H\n\n/// \\note MUST REMAIN UNCHANGED: \\b osCMSIS identifies the CMSIS-RTOS API version.\n#define osCMSIS           0x10001      ///< API version (main [31:16] .sub [15:0])\n\n/// \\note CAN BE CHANGED: \\b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number.\n#define osCMSIS_RTX     ((4<<16)|61)   ///< RTOS identification and version (main [31:16] .sub [15:0])\n\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelSystemId shall be consistent in every CMSIS-RTOS.\n#define osKernelSystemId \"RTX V4.61\"   ///< RTOS identification string\n\n\n#define CMSIS_OS_RTX\n\n// The stack space occupied is mainly dependent on the underling C standard library\n#if defined(__GNUC__) || defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__ICCARM__)\n#    define WORDS_STACK_SIZE   512\n#elif defined(TOOLCHAIN_ARM_MICRO)\n#    define WORDS_STACK_SIZE   128\n#endif\n\n#define DEFAULT_STACK_SIZE         (WORDS_STACK_SIZE*4)\n\n\n/// \\note MUST REMAIN UNCHANGED: \\b osFeature_xxx shall be consistent in every CMSIS-RTOS.\n#define osFeature_MainThread   1       ///< main thread      1=main can be thread, 0=not available\n#define osFeature_Pool         1       ///< Memory Pools:    1=available, 0=not available\n#define osFeature_MailQ        1       ///< Mail Queues:     1=available, 0=not available\n#define osFeature_MessageQ     1       ///< Message Queues:  1=available, 0=not available\n#define osFeature_Signals      16      ///< maximum number of Signal Flags available per thread\n#define osFeature_Semaphore    65535   ///< maximum count for \\ref osSemaphoreCreate function\n#define osFeature_Wait         0       ///< osWait function: 1=available, 0=not available\n\n#if defined (__CC_ARM)\n#define os_InRegs __value_in_regs      // Compiler specific: force struct in registers\n#elif defined (__ICCARM__)\n#define os_InRegs __value_in_regs      // Compiler specific: force struct in registers\n#else\n#define os_InRegs\n#endif\n\n#include \n#include \n\n#ifdef  __cplusplus\nextern \"C\"\n{\n#endif\n\n#include \"os_tcb.h\"\n\n// ==== Enumeration, structures, defines ====\n\n/// Priority used for thread control.\n/// \\note MUST REMAIN UNCHANGED: \\b osPriority shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osPriorityIdle          = -3,          ///< priority: idle (lowest)\n  osPriorityLow           = -2,          ///< priority: low\n  osPriorityBelowNormal   = -1,          ///< priority: below normal\n  osPriorityNormal        =  0,          ///< priority: normal (default)\n  osPriorityAboveNormal   = +1,          ///< priority: above normal\n  osPriorityHigh          = +2,          ///< priority: high\n  osPriorityRealtime      = +3,          ///< priority: realtime (highest)\n  osPriorityError         =  0x84        ///< system cannot determine priority or thread has illegal priority\n} osPriority;\n\n/// Timeout value.\n/// \\note MUST REMAIN UNCHANGED: \\b osWaitForever shall be consistent in every CMSIS-RTOS.\n#define osWaitForever     0xFFFFFFFF     ///< wait forever timeout value\n\n/// Status code values returned by CMSIS-RTOS functions.\n/// \\note MUST REMAIN UNCHANGED: \\b osStatus shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osOK                    =     0,       ///< function completed; no error or event occurred.\n  osEventSignal           =  0x08,       ///< function completed; signal event occurred.\n  osEventMessage          =  0x10,       ///< function completed; message event occurred.\n  osEventMail             =  0x20,       ///< function completed; mail event occurred.\n  osEventTimeout          =  0x40,       ///< function completed; timeout occurred.\n  osErrorParameter        =  0x80,       ///< parameter error: a mandatory parameter was missing or specified an incorrect object.\n  osErrorResource         =  0x81,       ///< resource not available: a specified resource was not available.\n  osErrorTimeoutResource  =  0xC1,       ///< resource not available within given time: a specified resource was not available within the timeout period.\n  osErrorISR              =  0x82,       ///< not allowed in ISR context: the function cannot be called from interrupt service routines.\n  osErrorISRRecursive     =  0x83,       ///< function called multiple times from ISR with same object.\n  osErrorPriority         =  0x84,       ///< system cannot determine priority or thread has illegal priority.\n  osErrorNoMemory         =  0x85,       ///< system is out of memory: it was impossible to allocate or reserve memory for the operation.\n  osErrorValue            =  0x86,       ///< value of a parameter is out of range.\n  osErrorOS               =  0xFF,       ///< unspecified RTOS error: run-time error but no other error message fits.\n  os_status_reserved      =  0x7FFFFFFF  ///< prevent from enum down-size compiler optimization.\n} osStatus;\n\n\n/// Timer type value for the timer definition.\n/// \\note MUST REMAIN UNCHANGED: \\b os_timer_type shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osTimerOnce             =     0,       ///< one-shot timer\n  osTimerPeriodic         =     1        ///< repeating timer\n} os_timer_type;\n\n/// Entry point of a thread.\n/// \\note MUST REMAIN UNCHANGED: \\b os_pthread shall be consistent in every CMSIS-RTOS.\ntypedef void (*os_pthread) (void const *argument);\n\n/// Entry point of a timer call back function.\n/// \\note MUST REMAIN UNCHANGED: \\b os_ptimer shall be consistent in every CMSIS-RTOS.\ntypedef void (*os_ptimer) (void const *argument);\n\n// >>> the following data type definitions may shall adapted towards a specific RTOS\n\n/// Thread ID identifies the thread (pointer to a thread control block).\n/// \\note CAN BE CHANGED: \\b os_thread_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_thread_cb *osThreadId;\n\n/// Timer ID identifies the timer (pointer to a timer control block).\n/// \\note CAN BE CHANGED: \\b os_timer_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_timer_cb *osTimerId;\n\n/// Mutex ID identifies the mutex (pointer to a mutex control block).\n/// \\note CAN BE CHANGED: \\b os_mutex_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mutex_cb *osMutexId;\n\n/// Semaphore ID identifies the semaphore (pointer to a semaphore control block).\n/// \\note CAN BE CHANGED: \\b os_semaphore_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_semaphore_cb *osSemaphoreId;\n\n/// Pool ID identifies the memory pool (pointer to a memory pool control block).\n/// \\note CAN BE CHANGED: \\b os_pool_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_pool_cb *osPoolId;\n\n/// Message ID identifies the message queue (pointer to a message queue control block).\n/// \\note CAN BE CHANGED: \\b os_messageQ_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_messageQ_cb *osMessageQId;\n\n/// Mail ID identifies the mail queue (pointer to a mail queue control block).\n/// \\note CAN BE CHANGED: \\b os_mailQ_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mailQ_cb *osMailQId;\n\n\n/// Thread Definition structure contains startup information of a thread.\n/// \\note CAN BE CHANGED: \\b os_thread_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_thread_def  {\n  os_pthread               pthread;      ///< start address of thread function\n  osPriority             tpriority;      ///< initial thread priority\n  uint32_t               stacksize;      ///< stack size requirements in bytes\n  uint32_t              *stack_pointer;  ///< pointer to the stack memory block\n  struct OS_TCB          tcb;\n} osThreadDef_t;\n\n/// Timer Definition structure contains timer parameters.\n/// \\note CAN BE CHANGED: \\b os_timer_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_timer_def  {\n  os_ptimer                 ptimer;    ///< start address of a timer function\n  void                      *timer;    ///< pointer to internal data\n} osTimerDef_t;\n\n/// Mutex Definition structure contains setup information for a mutex.\n/// \\note CAN BE CHANGED: \\b os_mutex_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mutex_def  {\n  void                      *mutex;    ///< pointer to internal data\n} osMutexDef_t;\n\n/// Semaphore Definition structure contains setup information for a semaphore.\n/// \\note CAN BE CHANGED: \\b os_semaphore_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_semaphore_def  {\n  void                  *semaphore;    ///< pointer to internal data\n} osSemaphoreDef_t;\n\n/// Definition structure for memory block allocation.\n/// \\note CAN BE CHANGED: \\b os_pool_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_pool_def  {\n  uint32_t                 pool_sz;    ///< number of items (elements) in the pool\n  uint32_t                 item_sz;    ///< size of an item\n  void                       *pool;    ///< pointer to memory for pool\n} osPoolDef_t;\n\n/// Definition structure for message queue.\n/// \\note CAN BE CHANGED: \\b os_messageQ_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_messageQ_def  {\n  uint32_t                queue_sz;    ///< number of elements in the queue\n  void                       *pool;    ///< memory array for messages\n} osMessageQDef_t;\n\n/// Definition structure for mail queue.\n/// \\note CAN BE CHANGED: \\b os_mailQ_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mailQ_def  {\n  uint32_t                queue_sz;    ///< number of elements in the queue\n  uint32_t                 item_sz;    ///< size of an item\n  void                       *pool;    ///< memory array for mail\n} osMailQDef_t;\n\n/// Event structure contains detailed information about an event.\n/// \\note MUST REMAIN UNCHANGED: \\b os_event shall be consistent in every CMSIS-RTOS.\n///       However the struct may be extended at the end.\ntypedef struct  {\n  osStatus                 status;     ///< status code: event or error information\n  union  {\n    uint32_t                    v;     ///< message as 32-bit value\n    void                       *p;     ///< message or mail as void pointer\n    int32_t               signals;     ///< signal flags\n  } value;                             ///< event value\n  union  {\n    osMailQId             mail_id;     ///< mail id obtained by \\ref osMailCreate\n    osMessageQId       message_id;     ///< message id obtained by \\ref osMessageCreate\n  } def;                               ///< event definition\n} osEvent;\n\n\n//  ==== Kernel Control Functions ====\n\n/// Initialize the RTOS Kernel for creating objects.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelInitialize shall be consistent in every CMSIS-RTOS.\nosStatus osKernelInitialize (void);\n\n/// Start the RTOS Kernel.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelStart shall be consistent in every CMSIS-RTOS.\nosStatus osKernelStart (void);\n\n/// Check if the RTOS kernel is already started.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelRunning shall be consistent in every CMSIS-RTOS.\n/// \\return 0 RTOS is not started, 1 RTOS is started.\nint32_t osKernelRunning(void);\n\n\n//  ==== Thread Management ====\n\n/// Create a Thread Definition with function, priority, and stack requirements.\n/// \\param         name         name of the thread function.\n/// \\param         priority     initial priority of the thread function.\n/// \\param         stacksz      stack size (in bytes) requirements for the thread function.\n/// \\note CAN BE CHANGED: The parameters to \\b osThreadDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osThreadDef(name, priority, stacksz)  \\\nextern osThreadDef_t os_thread_def_##name\n#else                            // define the object\n#define osThreadDef(name, priority, stacksz)  \\\nuint32_t os_thread_def_stack_##name [stacksz / sizeof(uint32_t)]; \\\nosThreadDef_t os_thread_def_##name = \\\n{ (name), (priority), (stacksz), (os_thread_def_stack_##name)}\n#endif\n\n/// Access a Thread definition.\n/// \\param         name          name of the thread definition object.\n/// \\note CAN BE CHANGED: The parameter to \\b osThread shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osThread(name)  \\\n&os_thread_def_##name\n\n/// Create a thread and add it to Active Threads and set it to state READY.\n/// \\param[in]     thread_def    thread definition referenced with \\ref osThread.\n/// \\param[in]     argument      pointer that is passed to the thread function as start argument.\n/// \\return thread ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadCreate shall be consistent in every CMSIS-RTOS.\nosThreadId osThreadCreate (osThreadDef_t *thread_def, void *argument);\n\n/// Return the thread ID of the current running thread.\n/// \\return thread ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadGetId shall be consistent in every CMSIS-RTOS.\nosThreadId osThreadGetId (void);\n\n/// Terminate execution of a thread and remove it from Active Threads.\n/// \\param[in]     thread_id   thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadTerminate shall be consistent in every CMSIS-RTOS.\nosStatus osThreadTerminate (osThreadId thread_id);\n\n/// Pass control to next thread that is in state \\b READY.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadYield shall be consistent in every CMSIS-RTOS.\nosStatus osThreadYield (void);\n\n/// Change priority of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     priority      new priority value for the thread function.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadSetPriority shall be consistent in every CMSIS-RTOS.\nosStatus osThreadSetPriority (osThreadId thread_id, osPriority priority);\n\n/// Get current priority of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return current priority value of the thread function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadGetPriority shall be consistent in every CMSIS-RTOS.\nosPriority osThreadGetPriority (osThreadId thread_id);\n\n\n//  ==== Generic Wait Functions ====\n\n/// Wait for Timeout (Time Delay).\n/// \\param[in]     millisec      time delay value\n/// \\return status code that indicates the execution status of the function.\nosStatus osDelay (uint32_t millisec);\n\n#if (defined (osFeature_Wait)  &&  (osFeature_Wait != 0))     // Generic Wait available\n\n/// Wait for Signal, Message, Mail, or Timeout.\n/// \\param[in] millisec          timeout value or 0 in case of no time-out\n/// \\return event that contains signal, message, or mail information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osWait shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osWait (uint32_t millisec);\n\n#endif  // Generic Wait available\n\n\n//  ==== Timer Management Functions ====\n/// Define a Timer object.\n/// \\param         name          name of the timer object.\n/// \\param         function      name of the timer call back function.\n/// \\note CAN BE CHANGED: The parameter to \\b osTimerDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osTimerDef(name, function)  \\\nextern osTimerDef_t os_timer_def_##name\n#else                            // define the object\n#define osTimerDef(name, function)  \\\nuint32_t os_timer_cb_##name[5]; \\\nosTimerDef_t os_timer_def_##name = \\\n{ (function), (os_timer_cb_##name) }\n#endif\n\n/// Access a Timer definition.\n/// \\param         name          name of the timer object.\n/// \\note CAN BE CHANGED: The parameter to \\b osTimer shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osTimer(name) \\\n&os_timer_def_##name\n\n/// Create a timer.\n/// \\param[in]     timer_def     timer object referenced with \\ref osTimer.\n/// \\param[in]     type          osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.\n/// \\param[in]     argument      argument to the timer call back function.\n/// \\return timer ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerCreate shall be consistent in every CMSIS-RTOS.\nosTimerId osTimerCreate (osTimerDef_t *timer_def, os_timer_type type, void *argument);\n\n/// Start or restart a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\param[in]     millisec      time delay value of the timer.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerStart shall be consistent in every CMSIS-RTOS.\nosStatus osTimerStart (osTimerId timer_id, uint32_t millisec);\n\n/// Stop the timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerStop shall be consistent in every CMSIS-RTOS.\nosStatus osTimerStop (osTimerId timer_id);\n\n/// Delete a timer that was created by \\ref osTimerCreate.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerDelete shall be consistent in every CMSIS-RTOS.\nosStatus osTimerDelete (osTimerId timer_id);\n\n\n//  ==== Signal Management ====\n\n/// Set the specified Signal Flags of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     signals       specifies the signal flags of the thread that should be set.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalSet shall be consistent in every CMSIS-RTOS.\nint32_t osSignalSet (osThreadId thread_id, int32_t signals);\n\n/// Clear the specified Signal Flags of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     signals       specifies the signal flags of the thread that shall be cleared.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalClear shall be consistent in every CMSIS-RTOS.\nint32_t osSignalClear (osThreadId thread_id, int32_t signals);\n\n/// Get Signal Flags status of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalGet shall be consistent in every CMSIS-RTOS.\nint32_t osSignalGet (osThreadId thread_id);\n\n/// Wait for one or more Signal Flags to become signaled for the current \\b RUNNING thread.\n/// \\param[in]     signals       wait until all specified signal flags set or 0 for any single signal flag.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return event flag information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalWait shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osSignalWait (int32_t signals, uint32_t millisec);\n\n\n//  ==== Mutex Management ====\n\n/// Define a Mutex.\n/// \\param         name          name of the mutex object.\n/// \\note CAN BE CHANGED: The parameter to \\b osMutexDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMutexDef(name)  \\\nextern osMutexDef_t os_mutex_def_##name\n#else                            // define the object\n#define osMutexDef(name)  \\\nuint32_t os_mutex_cb_##name[3]; \\\nosMutexDef_t os_mutex_def_##name = { (os_mutex_cb_##name) }\n#endif\n\n/// Access a Mutex definition.\n/// \\param         name          name of the mutex object.\n/// \\note CAN BE CHANGED: The parameter to \\b osMutex shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMutex(name)  \\\n&os_mutex_def_##name\n\n/// Create and Initialize a Mutex object.\n/// \\param[in]     mutex_def     mutex definition referenced with \\ref osMutex.\n/// \\return mutex ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexCreate shall be consistent in every CMSIS-RTOS.\nosMutexId osMutexCreate (osMutexDef_t *mutex_def);\n\n/// Wait until a Mutex becomes available.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexWait shall be consistent in every CMSIS-RTOS.\nosStatus osMutexWait (osMutexId mutex_id, uint32_t millisec);\n\n/// Release a Mutex that was obtained by \\ref osMutexWait.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexRelease shall be consistent in every CMSIS-RTOS.\nosStatus osMutexRelease (osMutexId mutex_id);\n\n/// Delete a Mutex that was created by \\ref osMutexCreate.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexDelete shall be consistent in every CMSIS-RTOS.\nosStatus osMutexDelete (osMutexId mutex_id);\n\n\n//  ==== Semaphore Management Functions ====\n\n#if (defined (osFeature_Semaphore)  &&  (osFeature_Semaphore != 0))     // Semaphore available\n\n/// Define a Semaphore object.\n/// \\param         name          name of the semaphore object.\n/// \\note CAN BE CHANGED: The parameter to \\b osSemaphoreDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osSemaphoreDef(name)  \\\nextern osSemaphoreDef_t os_semaphore_def_##name\n#else                            // define the object\n#define osSemaphoreDef(name)  \\\nuint32_t os_semaphore_cb_##name[2]; \\\nosSemaphoreDef_t os_semaphore_def_##name = { (os_semaphore_cb_##name) }\n#endif\n\n/// Access a Semaphore definition.\n/// \\param         name          name of the semaphore object.\n/// \\note CAN BE CHANGED: The parameter to \\b osSemaphore shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osSemaphore(name)  \\\n&os_semaphore_def_##name\n\n/// Create and Initialize a Semaphore object used for managing resources.\n/// \\param[in]     semaphore_def semaphore definition referenced with \\ref osSemaphore.\n/// \\param[in]     count         number of available resources.\n/// \\return semaphore ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreCreate shall be consistent in every CMSIS-RTOS.\nosSemaphoreId osSemaphoreCreate (osSemaphoreDef_t *semaphore_def, int32_t count);\n\n/// Wait until a Semaphore token becomes available.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return number of available tokens, or -1 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreWait shall be consistent in every CMSIS-RTOS.\nint32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);\n\n/// Release a Semaphore token.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreRelease shall be consistent in every CMSIS-RTOS.\nosStatus osSemaphoreRelease (osSemaphoreId semaphore_id);\n\n/// Delete a Semaphore that was created by \\ref osSemaphoreCreate.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreDelete shall be consistent in every CMSIS-RTOS.\nosStatus osSemaphoreDelete (osSemaphoreId semaphore_id);\n\n#endif     // Semaphore available\n\n\n//  ==== Memory Pool Management Functions ====\n\n#if (defined (osFeature_Pool)  &&  (osFeature_Pool != 0))  // Memory Pool Management available\n\n/// \\brief Define a Memory Pool.\n/// \\param         name          name of the memory pool.\n/// \\param         no            maximum number of blocks (objects) in the memory pool.\n/// \\param         type          data type of a single block (object).\n/// \\note CAN BE CHANGED: The parameter to \\b osPoolDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osPoolDef(name, no, type)   \\\nextern osPoolDef_t os_pool_def_##name\n#else                            // define the object\n#define osPoolDef(name, no, type)   \\\nuint32_t os_pool_m_##name[3+((sizeof(type)+3)/4)*(no)]; \\\nosPoolDef_t os_pool_def_##name = \\\n{ (no), sizeof(type), (os_pool_m_##name) }\n#endif\n\n/// \\brief Access a Memory Pool definition.\n/// \\param         name          name of the memory pool\n/// \\note CAN BE CHANGED: The parameter to \\b osPool shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osPool(name) \\\n&os_pool_def_##name\n\n/// Create and Initialize a memory pool.\n/// \\param[in]     pool_def      memory pool definition referenced with \\ref osPool.\n/// \\return memory pool ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolCreate shall be consistent in every CMSIS-RTOS.\nosPoolId osPoolCreate (osPoolDef_t *pool_def);\n\n/// Allocate a memory block from a memory pool.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osPoolAlloc (osPoolId pool_id);\n\n/// Allocate a memory block from a memory pool and set memory block to zero.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolCAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osPoolCAlloc (osPoolId pool_id);\n\n/// Return an allocated memory block back to a specific memory pool.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\param[in]     block         address of the allocated memory block that is returned to the memory pool.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolFree shall be consistent in every CMSIS-RTOS.\nosStatus osPoolFree (osPoolId pool_id, void *block);\n\n#endif   // Memory Pool Management available\n\n\n//  ==== Message Queue Management Functions ====\n\n#if (defined (osFeature_MessageQ)  &&  (osFeature_MessageQ != 0))     // Message Queues available\n\n/// \\brief Create a Message Queue Definition.\n/// \\param         name          name of the queue.\n/// \\param         queue_sz      maximum number of messages in the queue.\n/// \\param         type          data type of a single message element (for debugger).\n/// \\note CAN BE CHANGED: The parameter to \\b osMessageQDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMessageQDef(name, queue_sz, type)   \\\nextern osMessageQDef_t os_messageQ_def_##name\n#else                            // define the object\n#define osMessageQDef(name, queue_sz, type)   \\\nuint32_t os_messageQ_q_##name[4+(queue_sz)]; \\\nosMessageQDef_t os_messageQ_def_##name = \\\n{ (queue_sz), (os_messageQ_q_##name) }\n#endif\n\n/// \\brief Access a Message Queue Definition.\n/// \\param         name          name of the queue\n/// \\note CAN BE CHANGED: The parameter to \\b osMessageQ shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMessageQ(name) \\\n&os_messageQ_def_##name\n\n/// Create and Initialize a Message Queue.\n/// \\param[in]     queue_def     queue definition referenced with \\ref osMessageQ.\n/// \\param[in]     thread_id     thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return message queue ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessageCreate shall be consistent in every CMSIS-RTOS.\nosMessageQId osMessageCreate (osMessageQDef_t *queue_def, osThreadId thread_id);\n\n/// Put a Message to a Queue.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in]     info          message information.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessagePut shall be consistent in every CMSIS-RTOS.\nosStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec);\n\n/// Get a Message or Wait for a Message from a Queue.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return event information that includes status code.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessageGet shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);\n\n#endif     // Message Queues available\n\n\n//  ==== Mail Queue Management Functions ====\n\n#if (defined (osFeature_MailQ)  &&  (osFeature_MailQ != 0))     // Mail Queues available\n\n/// \\brief Create a Mail Queue Definition.\n/// \\param         name          name of the queue\n/// \\param         queue_sz      maximum number of messages in queue\n/// \\param         type          data type of a single message element\n/// \\note CAN BE CHANGED: The parameter to \\b osMailQDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMailQDef(name, queue_sz, type) \\\nextern osMailQDef_t os_mailQ_def_##name\n#else                            // define the object\n#define osMailQDef(name, queue_sz, type) \\\nuint32_t os_mailQ_q_##name[4+(queue_sz)]; \\\nuint32_t os_mailQ_m_##name[3+((sizeof(type)+3)/4)*(queue_sz)]; \\\nvoid *   os_mailQ_p_##name[2] = { (os_mailQ_q_##name), os_mailQ_m_##name }; \\\nosMailQDef_t os_mailQ_def_##name =  \\\n{ (queue_sz), sizeof(type), (os_mailQ_p_##name) }\n#endif\n\n/// \\brief Access a Mail Queue Definition.\n/// \\param         name          name of the queue\n/// \\note CAN BE CHANGED: The parameter to \\b osMailQ shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMailQ(name)  \\\n&os_mailQ_def_##name\n\n/// Create and Initialize mail queue.\n/// \\param[in]     queue_def     reference to the mail queue definition obtain with \\ref osMailQ\n/// \\param[in]     thread_id     thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return mail queue ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailCreate shall be consistent in every CMSIS-RTOS.\nosMailQId osMailCreate (osMailQDef_t *queue_def, osThreadId thread_id);\n\n/// Allocate a memory block from a mail.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osMailAlloc (osMailQId queue_id, uint32_t millisec);\n\n/// Allocate a memory block from a mail and set memory block to zero.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailCAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osMailCAlloc (osMailQId queue_id, uint32_t millisec);\n\n/// Put a mail to a queue.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     mail          memory block previously allocated with \\ref osMailAlloc or \\ref osMailCAlloc.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailPut shall be consistent in every CMSIS-RTOS.\nosStatus osMailPut (osMailQId queue_id, void *mail);\n\n/// Get a mail from a queue.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return event that contains mail information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailGet shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osMailGet (osMailQId queue_id, uint32_t millisec);\n\n/// Free a memory block from a mail.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     mail          pointer to the memory block that was obtained with \\ref osMailGet.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailFree shall be consistent in every CMSIS-RTOS.\nosStatus osMailFree (osMailQId queue_id, void *mail);\n\n#endif  // Mail Queues available\n\n\n#ifdef  __cplusplus\n}\n#endif\n\n#endif  // _CMSIS_OS_H\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/os_tcb.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef OS_TCB_H\n#define OS_TCB_H\n\n/* Types */\ntypedef char               S8;\ntypedef unsigned char      U8;\ntypedef short              S16;\ntypedef unsigned short     U16;\ntypedef int                S32;\ntypedef unsigned int       U32;\ntypedef long long          S64;\ntypedef unsigned long long U64;\ntypedef unsigned char      BIT;\ntypedef unsigned int       BOOL;\ntypedef void               (*FUNCP)(void);\n#define TCB_STACK_LR_OFFSET_BYTES   (14*4) // prelast DWORD\n#define TCB_STACK_LR_OFFSET_DWORDS  (14)   // prelast DWORD\n#define TCB_STACK_R0_OFFSET_BYTES   (1*4)  // second DWORD\n#define TCB_STACK_R0_OFFSET_DWORDS  (1)    // second DWORD\n\ntypedef struct OS_TCB {\n  /* General part: identical for all implementations.                        */\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     state;                   /* Task state                              */\n  U8     prio;                    /* Execution priority                      */\n  U8     task_id;                 /* Task ID value for optimized TCB access  */\n  struct OS_TCB *p_lnk;           /* Link pointer for ready/sem. wait list   */\n  struct OS_TCB *p_rlnk;          /* Link pointer for sem./mbx lst backwards */\n  struct OS_TCB *p_dlnk;          /* Link pointer for delay list             */\n  struct OS_TCB *p_blnk;          /* Link pointer for delay list backwards   */\n  U16    delta_time;              /* Time until time out                     */\n  U16    interval_time;           /* Time interval for periodic waits        */\n  U16    events;                  /* Event flags                             */\n  U16    waits;                   /* Wait flags                              */\n  void   **msg;                   /* Direct message passing when task waits  */\n\n  /* Hardware dependant part: specific for CM processor                      */\n  U8     stack_frame;             /* Stack frame: 0=Basic, 1=Extended        */\n  U8     reserved1;\n  U16    reserved2;\n  U32    priv_stack;              /* Private stack size in bytes             */\n  U32    tsk_stack;               /* Current task Stack pointer (R13)        */\n  U32    *stack;                  /* Pointer to Task Stack memory block      */\n\n  /* Library dependant part                                                   */\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n /* A memory space for arm standard library. */\n  U32 std_libspace[96/4];\n#endif\n\n  /* Task entry point used for uVision debugger                              */\n  FUNCP  ptask;                   /* Task entry address                      */\n} *P_TCB;\n\n#endif\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_CMSIS.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    rt_CMSIS.c\n *      Purpose: CMSIS RTOS API\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#define __CMSIS_GENERIC\n\n#include \"core_arm7.h\"\n\n#include \"RTX_Conf.h\"\n#include \"rt_Event.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Mailbox.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_Mutex.h\"\n#include \"rt_Semaphore.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n#define os_thread_cb OS_TCB\n\n#include \"cmsis_os.h\"\n\n#if (osFeature_Signals != 16)\n#error Invalid \"osFeature_Signals\" value!\n#endif\n#if (osFeature_Semaphore > 65535)\n#error Invalid \"osFeature_Semaphore\" value!\n#endif\n#if (osFeature_Wait != 0)\n#error osWait not supported!\n#endif\n\n// ==== Enumeration, structures, defines ====\n\n// Service Calls defines\n\n#if defined(__CC_ARM) /* ARM Compiler */\n\n#define __NO_RETURN __declspec(noreturn)\n\n#define osEvent_type osEvent\n#define osEvent_ret_status ret\n#define osEvent_ret_value ret\n#define osEvent_ret_msg ret\n#define osEvent_ret_mail ret\n\n#define osCallback_type osCallback\n#define osCallback_ret ret\n\n#define SVC_0_1(f, t, ...)                                                     \\\n  __svc_indirect(0) t _##f(t (*)());                                           \\\n  t f(void);                                                                   \\\n  __attribute__((always_inline)) static __inline t __##f(void) {               \\\n    return _##f(f);                                                            \\\n  }\n\n#define SVC_1_1(f, t, t1, ...)                                                 \\\n  __svc_indirect(0) t _##f(t (*)(t1), t1);                                     \\\n  t f(t1 a1);                                                                  \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1) {              \\\n    return _##f(f, a1);                                                        \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, ...)                                             \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2), t1, t2);                             \\\n  t f(t1 a1, t2 a2);                                                           \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2) {       \\\n    return _##f(f, a1, a2);                                                    \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, ...)                                         \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2, t3), t1, t2, t3);                     \\\n  t f(t1 a1, t2 a2, t3 a3);                                                    \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2,         \\\n                                                         t3 a3) {              \\\n    return _##f(f, a1, a2, a3);                                                \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, ...)                                     \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2, t3, t4), t1, t2, t3, t4);             \\\n  t f(t1 a1, t2 a2, t3 a3, t4 a4);                                             \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2, t3 a3,  \\\n                                                         t4 a4) {              \\\n    return _##f(f, a1, a2, a3, a4);                                            \\\n  }\n\n#define SVC_1_2 SVC_1_1\n#define SVC_1_3 SVC_1_1\n#define SVC_2_3 SVC_2_1\n\n#elif defined(__GNUC__) /* GNU Compiler */\n\n#define __NO_RETURN __attribute__((noreturn))\n\ntypedef uint32_t __attribute__((vector_size(8))) ret64;\ntypedef uint32_t __attribute__((vector_size(16))) ret128;\n\n#define RET_pointer __r0\n#define RET_int32_t __r0\n#define RET_osStatus __r0\n#define RET_osPriority __r0\n#define RET_osEvent                                                            \\\n  {                                                                            \\\n    (osStatus) __r0, {(uint32_t)__r1}, { (void *)__r2 }                        \\\n  }\n#define RET_osCallback                                                         \\\n  { (void *)__r0, (void *)__r1 }\n\n#define osEvent_type ret128\n#define osEvent_ret_status                                                     \\\n  (ret128) { ret.status }\n#define osEvent_ret_value                                                      \\\n  (ret128) { ret.status, ret.value.v }\n#define osEvent_ret_msg                                                        \\\n  (ret128) { ret.status, ret.value.v, (uint32_t)ret.def.message_id }\n#define osEvent_ret_mail                                                       \\\n  (ret128) { ret.status, ret.value.v, (uint32_t)ret.def.mail_id }\n\n#define osCallback_type ret64\n#define osCallback_ret                                                         \\\n  (ret64) { (uint32_t) ret.fp, (uint32_t)ret.arg }\n\n#define SVC_ArgN(n) register int __r##n __asm(\"r\" #n);\n\n#define SVC_ArgR(n, t, a) register t __r##n __asm(\"r\" #n) = a;\n\n#define SVC_Arg0() SVC_ArgN(0) SVC_ArgN(1) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg1(t1) SVC_ArgR(0, t1, a1) SVC_ArgN(1) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg2(t1, t2)                                                       \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg3(t1, t2, t3)                                                   \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgR(2, t3, a3) SVC_ArgN(3)\n\n#define SVC_Arg4(t1, t2, t3, t4)                                               \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgR(2, t3, a3)                  \\\n      SVC_ArgR(3, t4, a4)\n\n#if (defined(__CORTEX_M0)) || defined(__CORTEX_M0PLUS)\n#define SVC_Call(f)                                                            \\\n  __asm volatile(\"ldr r7,=\" #f \"\\n\\t\"                                          \\\n                 \"mov r12,r7\\n\\t\"                                              \\\n                 \"svc 0\"                                                       \\\n                 : \"=r\"(__r0), \"=r\"(__r1), \"=r\"(__r2), \"=r\"(__r3)              \\\n                 : \"r\"(__r0), \"r\"(__r1), \"r\"(__r2), \"r\"(__r3)                  \\\n                 : \"r7\", \"r12\", \"lr\", \"cc\");\n#else\n#define SVC_Call(f)                                                            \\\n  __asm volatile(\"ldr r12,=\" #f \"\\n\\t\"                                         \\\n                 \"svc 0\"                                                       \\\n                 : \"=r\"(__r0), \"=r\"(__r1), \"=r\"(__r2), \"=r\"(__r3)              \\\n                 : \"r\"(__r0), \"r\"(__r1), \"r\"(__r2), \"r\"(__r3)                  \\\n                 : \"r12\", \"lr\", \"cc\");\n#endif\n\n#define SVC_0_1(f, t, rv)                                                      \\\n  __attribute__((always_inline)) static inline t __##f(void) {                 \\\n    SVC_Arg0();                                                                \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_1_1(f, t, t1, rv)                                                  \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1) {                \\\n    SVC_Arg1(t1);                                                              \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, rv)                                              \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2) {         \\\n    SVC_Arg2(t1, t2);                                                          \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, rv)                                          \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2, t3 a3) {  \\\n    SVC_Arg3(t1, t2, t3);                                                      \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, rv)                                      \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2, t3 a3,    \\\n                                                       t4 a4) {                \\\n    SVC_Arg4(t1, t2, t3, t4);                                                  \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_1_2 SVC_1_1\n#define SVC_1_3 SVC_1_1\n#define SVC_2_3 SVC_2_1\n\n#elif defined(__ICCARM__) /* IAR Compiler */\n\n#define __NO_RETURN __noreturn\n\n#define osEvent_type osEvent\n#define osEvent_ret_status ret\n#define osEvent_ret_value ret\n#define osEvent_ret_msg ret\n#define osEvent_ret_mail ret\n\n#define osCallback_type osCallback\n#define osCallback_ret ret\n\n#define RET_osEvent osEvent\n#define RET_osCallback osCallback\n\n#define SVC_Setup(f) __asm(\"mov r12,%0\\n\" ::\"r\"(&f) : \"r12\");\n\n#define SVC_0_1(f, t, ...)                                                     \\\n  t f(void);                                                                   \\\n  _Pragma(\"swi_number=0\") __swi t _##f(void);                                  \\\n  static inline t __##f(void) {                                                \\\n    SVC_Setup(f);                                                              \\\n    return _##f();                                                             \\\n  }\n\n#define SVC_1_1(f, t, t1, ...)                                                 \\\n  t f(t1 a1);                                                                  \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1);                                 \\\n  static inline t __##f(t1 a1) {                                               \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1);                                                           \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, ...)                                             \\\n  t f(t1 a1, t2 a2);                                                           \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2);                          \\\n  static inline t __##f(t1 a1, t2 a2) {                                        \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2);                                                       \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, ...)                                         \\\n  t f(t1 a1, t2 a2, t3 a3);                                                    \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2, t3 a3);                   \\\n  static inline t __##f(t1 a1, t2 a2, t3 a3) {                                 \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2, a3);                                                   \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, ...)                                     \\\n  t f(t1 a1, t2 a2, t3 a3, t4 a4);                                             \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2, t3 a3, t4 a4);            \\\n  static inline t __##f(t1 a1, t2 a2, t3 a3, t4 a4) {                          \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2, a3, a4);                                               \\\n  }\n\n#define SVC_1_2 SVC_1_1\n#define SVC_1_3 SVC_1_1\n#define SVC_2_3 SVC_2_1\n\n#endif\n\n// Callback structure\ntypedef struct {\n  void *fp;  // Function pointer\n  void *arg; // Function argument\n} osCallback;\n\n// OS Section definitions\n#ifdef OS_SECTIONS_LINK_INFO\nextern const uint32_t os_section_id$$Base;\nextern const uint32_t os_section_id$$Limit;\n#endif\n\n// OS Timers external resources\nextern osThreadDef_t os_thread_def_osTimerThread;\nextern osThreadId osThreadId_osTimerThread;\nextern osMessageQDef_t os_messageQ_def_osTimerMessageQ;\nextern osMessageQId osMessageQId_osTimerMessageQ;\n\n// ==== Helper Functions ====\n\n/// Convert timeout in millisec to system ticks\nstatic uint32_t rt_ms2tick(uint32_t millisec) {\n  uint32_t tick;\n\n  if (millisec == osWaitForever)\n    return 0xFFFF; // Indefinite timeout\n  if (millisec > 4000000)\n    return 0xFFFE; // Max ticks supported\n\n  tick = ((1000 * millisec) + os_clockrate - 1) / os_clockrate;\n  if (tick > 0xFFFE)\n    return 0xFFFE;\n\n  return tick;\n}\n\n/// Convert Thread ID to TCB pointer\nstatic P_TCB rt_tid2ptcb(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  if (thread_id == NULL)\n    return NULL;\n\n  if ((uint32_t)thread_id & 3)\n    return NULL;\n\n#ifdef OS_SECTIONS_LINK_INFO\n  if ((os_section_id$$Base != 0) && (os_section_id$$Limit != 0)) {\n    if (thread_id < (osThreadId)os_section_id$$Base)\n      return NULL;\n    if (thread_id >= (osThreadId)os_section_id$$Limit)\n      return NULL;\n  }\n#endif\n\n  ptcb = thread_id;\n\n  if (ptcb->cb_type != TCB)\n    return NULL;\n\n  return ptcb;\n}\n\n/// Convert ID pointer to Object pointer\nstatic void *rt_id2obj(void *id) {\n\n  if ((uint32_t)id & 3)\n    return NULL;\n\n#ifdef OS_SECTIONS_LINK_INFO\n  if ((os_section_id$$Base != 0) && (os_section_id$$Limit != 0)) {\n    if (id < (void *)os_section_id$$Base)\n      return NULL;\n    if (id >= (void *)os_section_id$$Limit)\n      return NULL;\n  }\n#endif\n\n  return id;\n}\n\n// ==== Kernel Control ====\n\nuint8_t os_initialized; // Kernel Initialized flag\nuint8_t os_running;     // Kernel Running flag\n\n// Kernel Control Service Calls declarations\nSVC_0_1(svcKernelInitialize, osStatus, RET_osStatus)\nSVC_0_1(svcKernelStart, osStatus, RET_osStatus)\nSVC_0_1(svcKernelRunning, int32_t, RET_int32_t)\n\nextern void sysThreadError(osStatus status);\nosThreadId svcThreadCreate(osThreadDef_t *thread_def, void *argument);\nosMessageQId svcMessageCreate(osMessageQDef_t *queue_def, osThreadId thread_id);\n\n// Kernel Control Service Calls\n\n/// Initialize the RTOS Kernel for creating objects\nosStatus svcKernelInitialize(void) {\n  if (os_initialized)\n    return osOK;\n\n  rt_sys_init();          // RTX System Initialization\n  os_tsk.run->prio = 255; // Highest priority\n\n  sysThreadError(osOK);\n\n  os_initialized = 1;\n\n  return osOK;\n}\n\n/// Start the RTOS Kernel\nosStatus svcKernelStart(void) {\n\n  if (os_running)\n    return osOK;\n\n  // Create OS Timers resources (Message Queue & Thread)\n  osMessageQId_osTimerMessageQ =\n      svcMessageCreate(&os_messageQ_def_osTimerMessageQ, NULL);\n  osThreadId_osTimerThread =\n      svcThreadCreate(&os_thread_def_osTimerThread, NULL);\n\n  rt_tsk_prio(0, 0); // Lowest priority\n  //  __set_SP(os_tsk.run->tsk_stack + 8*4);       // New context\n  os_tsk.run = NULL; // Force context switch\n\n  rt_sys_start();\n\n  os_running = 1;\n\n  return osOK;\n}\n\n/// Check if the RTOS kernel is already started\nint32_t svcKernelRunning(void) { return os_running; }\n\n// Kernel Control Public API\n\n/// Initialize the RTOS Kernel for creating objects\nosStatus osKernelInitialize(void) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR;                      // Not allowed in ISR\n  if (__get_CONTROL() == MODE_SUPERVISOR) { // Privileged mode\n    return svcKernelInitialize();\n  } else {\n    return __svcKernelInitialize();\n  }\n}\n\n/// Start the RTOS Kernel\nosStatus osKernelStart(void) {\n\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  switch (__get_CONTROL()) {\n  case MODE_SUPERVISOR: // Privileged mode\n    break;\n  case MODE_USER:\n  case MODE_SYSTEM: // Unprivileged mode\n    return osErrorOS;\n  default: // Other invalid modes\n    return osErrorOS;\n    break;\n  }\n  return svcKernelStart();\n}\n\n/// Check if the RTOS kernel is already started\nint32_t osKernelRunning(void) {\n  if ((__get_CONTROL() == MODE_IRQ) || (__get_CONTROL() == MODE_SUPERVISOR)) {\n    // in ISR or Privileged\n    return os_running;\n  } else {\n    return __svcKernelRunning();\n  }\n}\n\n// ==== Thread Management ====\n\n__NO_RETURN void osThreadExit(void);\n\n// Thread Service Calls declarations\nSVC_2_1(svcThreadCreate, osThreadId, osThreadDef_t *, void *, RET_pointer)\nSVC_0_1(svcThreadGetId, osThreadId, RET_pointer)\nSVC_1_1(svcThreadTerminate, osStatus, osThreadId, RET_osStatus)\nSVC_0_1(svcThreadYield, osStatus, RET_osStatus)\nSVC_2_1(svcThreadSetPriority, osStatus, osThreadId, osPriority, RET_osStatus)\nSVC_1_1(svcThreadGetPriority, osPriority, osThreadId, RET_osPriority)\n\n// Thread Service Calls\nextern OS_TID rt_get_TID(void);\nextern void rt_init_context(P_TCB p_TCB, U8 priority, FUNCP task_body);\n\n/// Create a thread and add it to Active Threads and set it to state READY\nosThreadId svcThreadCreate(osThreadDef_t *thread_def, void *argument) {\n  P_TCB ptcb;\n\n  if ((thread_def == NULL) || (thread_def->pthread == NULL) ||\n      (thread_def->tpriority < osPriorityIdle) ||\n      (thread_def->tpriority > osPriorityRealtime) ||\n      (thread_def->stacksize == 0) || (thread_def->stack_pointer == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  U8 priority = thread_def->tpriority - osPriorityIdle + 1;\n  P_TCB task_context = &thread_def->tcb;\n\n  /* Utilize the user provided stack. */\n  task_context->stack = (U32 *)thread_def->stack_pointer;\n  task_context->priv_stack = thread_def->stacksize;\n  /* Find a free entry in 'os_active_TCB' table. */\n  OS_TID tsk = rt_get_TID();\n  os_active_TCB[tsk - 1] = task_context;\n  task_context->task_id = tsk;\n  /* Pass parameter 'argv' to 'rt_init_context' */\n  task_context->msg = argument;\n  /* For 'size == 0' system allocates the user stack from the memory pool. */\n  rt_init_context(task_context, priority, (FUNCP)thread_def->pthread);\n\n  /* Dispatch this task to the scheduler for execution. */\n  DBG_TASK_NOTIFY(task_context, __TRUE);\n  rt_dispatch(task_context);\n\n  ptcb = (P_TCB)os_active_TCB[tsk - 1]; // TCB pointer\n\n  *((uint32_t *)ptcb->tsk_stack + TCB_STACK_LR_OFFSET_DWORDS) =\n      (uint32_t)osThreadExit; /* LR = osThreadExit */\n\n  return ptcb;\n}\n\n/// Return the thread ID of the current running thread\nosThreadId svcThreadGetId(void) {\n  OS_TID tsk;\n\n  tsk = rt_tsk_self();\n  if (tsk == 0)\n    return NULL;\n  return (P_TCB)os_active_TCB[tsk - 1];\n}\n\n/// Terminate execution of a thread and remove it from ActiveThreads\nosStatus svcThreadTerminate(osThreadId thread_id) {\n  OS_RESULT res;\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n  res = rt_tsk_delete(ptcb->task_id); // Delete task\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Delete task failed\n\n  return osOK;\n}\n\n/// Pass control to next thread that is in state READY\nosStatus svcThreadYield(void) {\n  rt_tsk_pass(); // Pass control to next task\n  return osOK;\n}\n\n/// Change priority of an active thread\nosStatus svcThreadSetPriority(osThreadId thread_id, osPriority priority) {\n  OS_RESULT res;\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n  if ((priority < osPriorityIdle) || (priority > osPriorityRealtime)) {\n    return osErrorValue;\n  }\n\n  res = rt_tsk_prio(                // Change task priority\n      ptcb->task_id,                // Task ID\n      priority - osPriorityIdle + 1 // New task priority\n  );\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Change task priority failed\n\n  return osOK;\n}\n\n/// Get current priority of an active thread\nosPriority svcThreadGetPriority(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osPriorityError;\n\n  return (osPriority)(ptcb->prio - 1 + osPriorityIdle);\n}\n\n// Thread Public API\n\n/// Create a thread and add it to Active Threads and set it to state READY\nosThreadId osThreadCreate(osThreadDef_t *thread_def, void *argument) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return NULL; // Not allowed in ISR\n  if ((__get_CONTROL() == MODE_SUPERVISOR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcThreadCreate(thread_def, argument);\n  } else {\n    return __svcThreadCreate(thread_def, argument);\n  }\n}\n\n/// Return the thread ID of the current running thread\nosThreadId osThreadGetId(void) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return NULL; // Not allowed in ISR\n  return __svcThreadGetId();\n}\n\n/// Terminate execution of a thread and remove it from ActiveThreads\nosStatus osThreadTerminate(osThreadId thread_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadTerminate(thread_id);\n}\n\n/// Pass control to next thread that is in state READY\nosStatus osThreadYield(void) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadYield();\n}\n\n/// Change priority of an active thread\nosStatus osThreadSetPriority(osThreadId thread_id, osPriority priority) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadSetPriority(thread_id, priority);\n}\n\n/// Get current priority of an active thread\nosPriority osThreadGetPriority(osThreadId thread_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osPriorityError; // Not allowed in ISR\n  return __svcThreadGetPriority(thread_id);\n}\n\n/// INTERNAL - Not Public\n/// Auto Terminate Thread on exit (used implicitly when thread exists)\n__NO_RETURN void osThreadExit(void) {\n  __svcThreadTerminate(__svcThreadGetId());\n  for (;;)\n    ; // Should never come here\n}\n\n// ==== Generic Wait Functions ====\n\n// Generic Wait Service Calls declarations\nSVC_1_1(svcDelay, osStatus, uint32_t, RET_osStatus)\n#if osFeature_Wait != 0\nSVC_1_3(svcWait, os_InRegs osEvent, uint32_t, RET_osEvent)\n#endif\n\n// Generic Wait Service Calls\n\n/// Wait for Timeout (Time Delay)\nosStatus svcDelay(uint32_t millisec) {\n  if (millisec == 0)\n    return osOK;\n  rt_dly_wait(rt_ms2tick(millisec));\n  return osEventTimeout;\n}\n\n/// Wait for Signal, Message, Mail, or Timeout\n#if osFeature_Wait != 0\nos_InRegs osEvent_type svcWait(uint32_t millisec) {\n  osEvent ret;\n\n  if (millisec == 0) {\n    ret.status = osOK;\n    return osEvent_ret_status;\n  }\n\n  /* To Do: osEventSignal, osEventMessage, osEventMail */\n  rt_dly_wait(rt_ms2tick(millisec));\n  ret.status = osEventTimeout;\n\n  return osEvent_ret_status;\n}\n#endif\n\n// Generic Wait API\n\n/// Wait for Timeout (Time Delay)\nosStatus osDelay(uint32_t millisec) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcDelay(millisec);\n}\n\n/// Wait for Signal, Message, Mail, or Timeout\nos_InRegs osEvent osWait(uint32_t millisec) {\n  osEvent ret;\n\n#if osFeature_Wait == 0\n  ret.status = osErrorOS;\n  return ret;\n#else\n  if (__get_CONTROL() == MODE_IRQ) { // Not allowed in ISR\n    ret.status = osErrorISR;\n    return ret;\n  }\n  return __svcWait(millisec);\n#endif\n}\n\n// ==== Timer Management ====\n\n// Timer definitions\n#define osTimerInvalid 0\n#define osTimerStopped 1\n#define osTimerRunning 2\n\n// Timer structures\n\ntypedef struct os_timer_cb_ { // Timer Control Block\n  struct os_timer_cb_ *next;  // Pointer to next active Timer\n  uint8_t state;              // Timer State\n  uint8_t type;               // Timer Type (Periodic/One-shot)\n  uint16_t reserved;          // Reserved\n  uint16_t tcnt;              // Timer Delay Count\n  uint16_t icnt;              // Timer Initial Count\n  void *arg;                  // Timer Function Argument\n  osTimerDef_t *timer;        // Pointer to Timer definition\n} os_timer_cb;\n\n// Timer variables\nos_timer_cb *os_timer_head; // Pointer to first active Timer\n\n// Timer Helper Functions\n\n// Insert Timer into the list sorted by time\nstatic void rt_timer_insert(os_timer_cb *pt, uint32_t tcnt) {\n  os_timer_cb *p, *prev;\n\n  prev = NULL;\n  p = os_timer_head;\n  while (p != NULL) {\n    if (tcnt < p->tcnt)\n      break;\n    tcnt -= p->tcnt;\n    prev = p;\n    p = p->next;\n  }\n  pt->next = p;\n  pt->tcnt = (uint16_t)tcnt;\n  if (p != NULL) {\n    p->tcnt -= pt->tcnt;\n  }\n  if (prev != NULL) {\n    prev->next = pt;\n  } else {\n    os_timer_head = pt;\n  }\n}\n\n// Remove Timer from the list\nstatic int rt_timer_remove(os_timer_cb *pt) {\n  os_timer_cb *p, *prev;\n\n  prev = NULL;\n  p = os_timer_head;\n  while (p != NULL) {\n    if (p == pt)\n      break;\n    prev = p;\n    p = p->next;\n  }\n  if (p == NULL)\n    return -1;\n  if (prev != NULL) {\n    prev->next = pt->next;\n  } else {\n    os_timer_head = pt->next;\n  }\n  if (pt->next != NULL) {\n    pt->next->tcnt += pt->tcnt;\n  }\n\n  return 0;\n}\n\n// Timer Service Calls declarations\nSVC_3_1(svcTimerCreate, osTimerId, osTimerDef_t *, os_timer_type, void *,\n        RET_pointer)\nSVC_2_1(svcTimerStart, osStatus, osTimerId, uint32_t, RET_osStatus)\nSVC_1_1(svcTimerStop, osStatus, osTimerId, RET_osStatus)\nSVC_1_1(svcTimerDelete, osStatus, osTimerId, RET_osStatus)\nSVC_1_2(svcTimerCall, os_InRegs osCallback, osTimerId, RET_osCallback)\n\n// Timer Management Service Calls\n\n/// Create timer\nosTimerId svcTimerCreate(osTimerDef_t *timer_def, os_timer_type type,\n                         void *argument) {\n  os_timer_cb *pt;\n\n  if ((timer_def == NULL) || (timer_def->ptimer == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  pt = timer_def->timer;\n  if (pt == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if ((type != osTimerOnce) && (type != osTimerPeriodic)) {\n    sysThreadError(osErrorValue);\n    return NULL;\n  }\n\n  if (osThreadId_osTimerThread == NULL) {\n    sysThreadError(osErrorResource);\n    return NULL;\n  }\n\n  if (pt->state != osTimerInvalid) {\n    sysThreadError(osErrorResource);\n    return NULL;\n  }\n\n  pt->state = osTimerStopped;\n  pt->type = (uint8_t)type;\n  pt->arg = argument;\n  pt->timer = timer_def;\n\n  return (osTimerId)pt;\n}\n\n/// Start or restart timer\nosStatus svcTimerStart(osTimerId timer_id, uint32_t millisec) {\n  os_timer_cb *pt;\n  uint32_t tcnt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  tcnt = rt_ms2tick(millisec);\n  if (tcnt == 0)\n    return osErrorValue;\n\n  switch (pt->state) {\n  case osTimerRunning:\n    if (rt_timer_remove(pt) != 0) {\n      return osErrorResource;\n    }\n    break;\n  case osTimerStopped:\n    pt->state = osTimerRunning;\n    pt->icnt = (uint16_t)tcnt;\n    break;\n  default:\n    return osErrorResource;\n  }\n\n  rt_timer_insert(pt, tcnt);\n\n  return osOK;\n}\n\n/// Stop timer\nosStatus svcTimerStop(osTimerId timer_id) {\n  os_timer_cb *pt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  if (pt->state != osTimerRunning)\n    return osErrorResource;\n\n  pt->state = osTimerStopped;\n\n  if (rt_timer_remove(pt) != 0) {\n    return osErrorResource;\n  }\n\n  return osOK;\n}\n\n/// Delete timer\nosStatus svcTimerDelete(osTimerId timer_id) {\n  os_timer_cb *pt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  switch (pt->state) {\n  case osTimerRunning:\n    rt_timer_remove(pt);\n    break;\n  case osTimerStopped:\n    break;\n  default:\n    return osErrorResource;\n  }\n\n  pt->state = osTimerInvalid;\n\n  return osOK;\n}\n\n/// Get timer callback parameters\nos_InRegs osCallback_type svcTimerCall(osTimerId timer_id) {\n  os_timer_cb *pt;\n  osCallback ret;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL) {\n    ret.fp = NULL;\n    ret.arg = NULL;\n    return osCallback_ret;\n  }\n\n  ret.fp = (void *)pt->timer->ptimer;\n  ret.arg = pt->arg;\n\n  return osCallback_ret;\n}\n\nstatic __INLINE osStatus isrMessagePut(osMessageQId queue_id, uint32_t info,\n                                       uint32_t millisec);\n\n/// Timer Tick (called each SysTick)\nvoid sysTimerTick(void) {\n  os_timer_cb *pt, *p;\n\n  p = os_timer_head;\n  if (p == NULL)\n    return;\n\n  p->tcnt--;\n  while ((p != NULL) && (p->tcnt == 0)) {\n    pt = p;\n    p = p->next;\n    os_timer_head = p;\n    isrMessagePut(osMessageQId_osTimerMessageQ, (uint32_t)pt, 0);\n    if (pt->type == osTimerPeriodic) {\n      rt_timer_insert(pt, pt->icnt);\n    } else {\n      pt->state = osTimerStopped;\n    }\n  }\n}\n\n// Timer Management Public API\n\n/// Create timer\nosTimerId osTimerCreate(osTimerDef_t *timer_def, os_timer_type type,\n                        void *argument) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return NULL; // Not allowed in ISR\n  if ((__get_CONTROL() == MODE_SUPERVISOR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcTimerCreate(timer_def, type, argument);\n  } else {\n    return __svcTimerCreate(timer_def, type, argument);\n  }\n}\n\n/// Start or restart timer\nosStatus osTimerStart(osTimerId timer_id, uint32_t millisec) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerStart(timer_id, millisec);\n}\n\n/// Stop timer\nosStatus osTimerStop(osTimerId timer_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerStop(timer_id);\n}\n\n/// Delete timer\nosStatus osTimerDelete(osTimerId timer_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerDelete(timer_id);\n}\n\n/// INTERNAL - Not Public\n/// Get timer callback parameters (used by OS Timer Thread)\nos_InRegs osCallback osTimerCall(osTimerId timer_id) {\n  return __svcTimerCall(timer_id);\n}\n\n// Timer Thread\n__NO_RETURN void osTimerThread(void const *argument) {\n  osCallback cb;\n  osEvent evt;\n\n  for (;;) {\n    evt = osMessageGet(osMessageQId_osTimerMessageQ, osWaitForever);\n    if (evt.status == osEventMessage) {\n      cb = osTimerCall(evt.value.p);\n      if (cb.fp != NULL) {\n        (*(os_ptimer)cb.fp)(cb.arg);\n      }\n    }\n  }\n}\n\n// ==== Signal Management ====\n\n// Signal Service Calls declarations\nSVC_2_1(svcSignalSet, int32_t, osThreadId, int32_t, RET_int32_t)\nSVC_2_1(svcSignalClear, int32_t, osThreadId, int32_t, RET_int32_t)\nSVC_1_1(svcSignalGet, int32_t, osThreadId, RET_int32_t)\nSVC_2_3(svcSignalWait, os_InRegs osEvent, int32_t, uint32_t, RET_osEvent)\n\n// Signal Service Calls\n\n/// Set the specified Signal Flags of an active thread\nint32_t svcSignalSet(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  rt_evt_set(signals, ptcb->task_id); // Set event flags\n\n  return sig;\n}\n\n/// Clear the specified Signal Flags of an active thread\nint32_t svcSignalClear(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  rt_evt_clr(signals, ptcb->task_id); // Clear event flags\n\n  return sig;\n}\n\n/// Get Signal Flags status of an active thread\nint32_t svcSignalGet(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  return ptcb->events; // Return event flags\n}\n\n/// Wait for one or more Signal Flags to become signaled for the current RUNNING\n/// thread\nos_InRegs osEvent_type svcSignalWait(int32_t signals, uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals)) {\n    ret.status = osErrorValue;\n    return osEvent_ret_status;\n  }\n\n  if (signals != 0) { // Wait for all specified signals\n    res = rt_evt_wait(signals, rt_ms2tick(millisec), __TRUE);\n  } else { // Wait for any signal\n    res = rt_evt_wait(0xFFFF, rt_ms2tick(millisec), __FALSE);\n  }\n\n  if (res == OS_R_EVT) {\n    ret.status = osEventSignal;\n    ret.value.signals = signals ? signals : os_tsk.run->waits;\n  } else {\n    ret.status = millisec ? osEventTimeout : osOK;\n    ret.value.signals = 0;\n  }\n\n  return osEvent_ret_value;\n}\n\n// Signal ISR Calls\n\n/// Set the specified Signal Flags of an active thread\nstatic __INLINE int32_t isrSignalSet(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  isr_evt_set(signals, ptcb->task_id); // Set event flags\n\n  return sig;\n}\n\n// Signal Public API\n\n/// Set the specified Signal Flags of an active thread\nint32_t osSignalSet(osThreadId thread_id, int32_t signals) {\n  if (__get_CONTROL() == MODE_IRQ) { // in ISR\n    return isrSignalSet(thread_id, signals);\n  } else { // in Thread\n    return __svcSignalSet(thread_id, signals);\n  }\n}\n\n/// Clear the specified Signal Flags of an active thread\nint32_t osSignalClear(osThreadId thread_id, int32_t signals) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcSignalClear(thread_id, signals);\n}\n\n/// Get Signal Flags status of an active thread\nint32_t osSignalGet(osThreadId thread_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcSignalGet(thread_id);\n}\n\n/// Wait for one or more Signal Flags to become signaled for the current RUNNING\n/// thread\nos_InRegs osEvent osSignalWait(int32_t signals, uint32_t millisec) {\n  osEvent ret;\n\n  if (__get_CONTROL() == MODE_IRQ) { // Not allowed in ISR\n    ret.status = osErrorISR;\n    return ret;\n  }\n  return __svcSignalWait(signals, millisec);\n}\n\n// ==== Mutex Management ====\n\n// Mutex Service Calls declarations\nSVC_1_1(svcMutexCreate, osMutexId, osMutexDef_t *, RET_pointer)\nSVC_2_1(svcMutexWait, osStatus, osMutexId, uint32_t, RET_osStatus)\nSVC_1_1(svcMutexRelease, osStatus, osMutexId, RET_osStatus)\nSVC_1_1(svcMutexDelete, osStatus, osMutexId, RET_osStatus)\n\n// Mutex Service Calls\n\n/// Create and Initialize a Mutex object\nosMutexId svcMutexCreate(osMutexDef_t *mutex_def) {\n  OS_ID mut;\n\n  if (mutex_def == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  mut = mutex_def->mutex;\n  if (mut == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_MUCB)mut)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  rt_mut_init(mut); // Initialize Mutex\n\n  return mut;\n}\n\n/// Wait until a Mutex becomes available\nosStatus svcMutexWait(osMutexId mutex_id, uint32_t millisec) {\n  OS_ID mut;\n  OS_RESULT res;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  res = rt_mut_wait(mut, rt_ms2tick(millisec)); // Wait for Mutex\n\n  if (res == OS_R_TMO) {\n    return (millisec ? osErrorTimeoutResource : osErrorResource);\n  }\n\n  return osOK;\n}\n\n/// Release a Mutex that was obtained with osMutexWait\nosStatus svcMutexRelease(osMutexId mutex_id) {\n  OS_ID mut;\n  OS_RESULT res;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  res = rt_mut_release(mut); // Release Mutex\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Thread not owner or Zero Counter\n\n  return osOK;\n}\n\n/// Delete a Mutex that was created by osMutexCreate\nosStatus svcMutexDelete(osMutexId mutex_id) {\n  OS_ID mut;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  rt_mut_delete(mut); // Release Mutex\n\n  return osOK;\n}\n\n// Mutex Public API\n\n/// Create and Initialize a Mutex object\nosMutexId osMutexCreate(osMutexDef_t *mutex_def) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return NULL; // Not allowed in ISR\n  if ((__get_CONTROL() == MODE_SUPERVISOR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMutexCreate(mutex_def);\n  } else {\n    return __svcMutexCreate(mutex_def);\n  }\n}\n\n/// Wait until a Mutex becomes available\nosStatus osMutexWait(osMutexId mutex_id, uint32_t millisec) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexWait(mutex_id, millisec);\n}\n\n/// Release a Mutex that was obtained with osMutexWait\nosStatus osMutexRelease(osMutexId mutex_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexRelease(mutex_id);\n}\n\n/// Delete a Mutex that was created by osMutexCreate\nosStatus osMutexDelete(osMutexId mutex_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexDelete(mutex_id);\n}\n\n// ==== Semaphore Management ====\n\n// Semaphore Service Calls declarations\nSVC_2_1(svcSemaphoreCreate, osSemaphoreId, const osSemaphoreDef_t *, int32_t,\n        RET_pointer)\nSVC_2_1(svcSemaphoreWait, int32_t, osSemaphoreId, uint32_t, RET_int32_t)\nSVC_1_1(svcSemaphoreRelease, osStatus, osSemaphoreId, RET_osStatus)\nSVC_1_1(svcSemaphoreDelete, osStatus, osSemaphoreId, RET_osStatus)\n\n// Semaphore Service Calls\n\n/// Create and Initialize a Semaphore object\nosSemaphoreId svcSemaphoreCreate(const osSemaphoreDef_t *semaphore_def,\n                                 int32_t count) {\n  OS_ID sem;\n\n  if (semaphore_def == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  sem = semaphore_def->semaphore;\n  if (sem == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_SCB)sem)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (count > osFeature_Semaphore) {\n    sysThreadError(osErrorValue);\n    return NULL;\n  }\n\n  rt_sem_init(sem, count); // Initialize Semaphore\n\n  return sem;\n}\n\n/// Wait until a Semaphore becomes available\nint32_t svcSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec) {\n  OS_ID sem;\n  OS_RESULT res;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return -1;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return -1;\n\n  res = rt_sem_wait(sem, rt_ms2tick(millisec)); // Wait for Semaphore\n\n  if (res == OS_R_TMO)\n    return 0; // Timeout\n\n  return (((P_SCB)sem)->tokens + 1);\n}\n\n/// Release a Semaphore\nosStatus svcSemaphoreRelease(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->tokens == osFeature_Semaphore)\n    return osErrorResource;\n\n  rt_sem_send(sem); // Release Semaphore\n\n  return osOK;\n}\n\n/// Delete a Semaphore that was created by osSemaphoreCreate\nosStatus svcSemaphoreDelete(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  rt_sem_delete(sem); // Delete Semaphore\n\n  return osOK;\n}\n\n// Semaphore ISR Calls\n\n/// Release a Semaphore\nstatic __INLINE osStatus isrSemaphoreRelease(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->tokens == osFeature_Semaphore)\n    return osErrorResource;\n\n  isr_sem_send(sem); // Release Semaphore\n\n  return osOK;\n}\n\n// Semaphore Public API\n\n/// Create and Initialize a Semaphore object\nosSemaphoreId osSemaphoreCreate(osSemaphoreDef_t *semaphore_def,\n                                int32_t count) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return NULL; // Not allowed in ISR\n  if ((__get_CONTROL() == MODE_SUPERVISOR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcSemaphoreCreate(semaphore_def, count);\n  } else {\n    return __svcSemaphoreCreate(semaphore_def, count);\n  }\n}\n\n/// Wait until a Semaphore becomes available\nint32_t osSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return -1; // Not allowed in ISR\n  return __svcSemaphoreWait(semaphore_id, millisec);\n}\n\n/// Release a Semaphore\nosStatus osSemaphoreRelease(osSemaphoreId semaphore_id) {\n  if (__get_CONTROL() == MODE_IRQ) { // in ISR\n    return isrSemaphoreRelease(semaphore_id);\n  } else { // in Thread\n    return __svcSemaphoreRelease(semaphore_id);\n  }\n}\n\n/// Delete a Semaphore that was created by osSemaphoreCreate\nosStatus osSemaphoreDelete(osSemaphoreId semaphore_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return osErrorISR; // Not allowed in ISR\n  return __svcSemaphoreDelete(semaphore_id);\n}\n\n// ==== Memory Management Functions ====\n\n// Memory Management Helper Functions\n\n// Clear Memory Box (Zero init)\nstatic void rt_clr_box(void *box_mem, void *box) {\n  uint32_t *p, n;\n\n  if (box) {\n    p = box;\n    for (n = ((P_BM)box_mem)->blk_size; n; n -= 4) {\n      *p++ = 0;\n    }\n  }\n}\n\n// Memory Management Service Calls declarations\nSVC_1_1(svcPoolCreate, osPoolId, const osPoolDef_t *, RET_pointer)\nSVC_2_1(sysPoolAlloc, void *, osPoolId, uint32_t, RET_pointer)\nSVC_2_1(sysPoolFree, osStatus, osPoolId, void *, RET_osStatus)\n\n// Memory Management Service & ISR Calls\n\n/// Create and Initialize memory pool\nosPoolId svcPoolCreate(const osPoolDef_t *pool_def) {\n  uint32_t blk_sz;\n\n  if ((pool_def == NULL) || (pool_def->pool_sz == 0) ||\n      (pool_def->item_sz == 0) || (pool_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  blk_sz = (pool_def->item_sz + 3) & ~3;\n\n  _init_box(pool_def->pool, sizeof(struct OS_BM) + pool_def->pool_sz * blk_sz,\n            blk_sz);\n\n  return pool_def->pool;\n}\n\n/// Allocate a memory block from a memory pool\nvoid *sysPoolAlloc(osPoolId pool_id, uint32_t clr) {\n  void *ptr;\n\n  if (pool_id == NULL)\n    return NULL;\n\n  ptr = rt_alloc_box(pool_id);\n  if (clr) {\n    rt_clr_box(pool_id, ptr);\n  }\n\n  return ptr;\n}\n\n/// Return an allocated memory block back to a specific memory pool\nosStatus sysPoolFree(osPoolId pool_id, void *block) {\n  int32_t res;\n\n  if (pool_id == NULL)\n    return osErrorParameter;\n\n  res = rt_free_box(pool_id, block);\n  if (res != 0)\n    return osErrorValue;\n\n  return osOK;\n}\n\n// Memory Management Public API\n\n/// Create and Initialize memory pool\nosPoolId osPoolCreate(osPoolDef_t *pool_def) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return NULL; // Not allowed in ISR\n  if ((__get_CONTROL() == MODE_SUPERVISOR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcPoolCreate(pool_def);\n  } else {\n    return __svcPoolCreate(pool_def);\n  }\n}\n\n/// Allocate a memory block from a memory pool\nvoid *osPoolAlloc(osPoolId pool_id) {\n  if ((__get_CONTROL() == MODE_IRQ) ||\n      (__get_CONTROL() == MODE_SUPERVISOR)) { // in ISR or Privileged\n    return sysPoolAlloc(pool_id, 0);\n  } else { // in Thread\n    return __sysPoolAlloc(pool_id, 0);\n  }\n}\n\n/// Allocate a memory block from a memory pool and set memory block to zero\nvoid *osPoolCAlloc(osPoolId pool_id) {\n  if ((__get_CONTROL() == MODE_IRQ) ||\n      (__get_CONTROL() == MODE_SUPERVISOR)) { // in ISR or Privileged\n    return sysPoolAlloc(pool_id, 1);\n  } else { // in Thread\n    return __sysPoolAlloc(pool_id, 1);\n  }\n}\n\n/// Return an allocated memory block back to a specific memory pool\nosStatus osPoolFree(osPoolId pool_id, void *block) {\n  if ((__get_CONTROL() == MODE_IRQ) ||\n      (__get_CONTROL() == MODE_SUPERVISOR)) { // in ISR or Privileged\n    return sysPoolFree(pool_id, block);\n  } else { // in Thread\n    return __sysPoolFree(pool_id, block);\n  }\n}\n\n// ==== Message Queue Management Functions ====\n\n// Message Queue Management Service Calls declarations\nSVC_2_1(svcMessageCreate, osMessageQId, osMessageQDef_t *, osThreadId,\n        RET_pointer)\nSVC_3_1(svcMessagePut, osStatus, osMessageQId, uint32_t, uint32_t, RET_osStatus)\nSVC_2_3(svcMessageGet, os_InRegs osEvent, osMessageQId, uint32_t, RET_osEvent)\n\n// Message Queue Service Calls\n\n/// Create and Initialize Message Queue\nosMessageQId svcMessageCreate(osMessageQDef_t *queue_def,\n                              osThreadId thread_id) {\n\n  if ((queue_def == NULL) || (queue_def->queue_sz == 0) ||\n      (queue_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_MCB)queue_def->pool)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  rt_mbx_init(queue_def->pool, 4 * (queue_def->queue_sz + 4));\n\n  return queue_def->pool;\n}\n\n/// Put a Message to a Queue\nosStatus svcMessagePut(osMessageQId queue_id, uint32_t info,\n                       uint32_t millisec) {\n  OS_RESULT res;\n\n  if (queue_id == NULL)\n    return osErrorParameter;\n\n  if (((P_MCB)queue_id)->cb_type != MCB)\n    return osErrorParameter;\n\n  res = rt_mbx_send(queue_id, (void *)info, rt_ms2tick(millisec));\n\n  if (res == OS_R_TMO) {\n    return (millisec ? osErrorTimeoutResource : osErrorResource);\n  }\n\n  return osOK;\n}\n\n/// Get a Message or Wait for a Message from a Queue\nos_InRegs osEvent_type svcMessageGet(osMessageQId queue_id, uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if (queue_id == NULL) {\n    ret.status = osErrorParameter;\n    return osEvent_ret_status;\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB) {\n    ret.status = osErrorParameter;\n    return osEvent_ret_status;\n  }\n\n  res = rt_mbx_wait(queue_id, &ret.value.p, rt_ms2tick(millisec));\n\n  if (res == OS_R_TMO) {\n    ret.status = millisec ? osEventTimeout : osOK;\n    return osEvent_ret_value;\n  }\n\n  ret.status = osEventMessage;\n\n  return osEvent_ret_value;\n}\n\n// Message Queue ISR Calls\n\n/// Put a Message to a Queue\nstatic __INLINE osStatus isrMessagePut(osMessageQId queue_id, uint32_t info,\n                                       uint32_t millisec) {\n\n  if ((queue_id == NULL) || (millisec != 0)) {\n    return osErrorParameter;\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB)\n    return osErrorParameter;\n\n  if (rt_mbx_check(queue_id) == 0) { // Check if Queue is full\n    return osErrorResource;\n  }\n\n  isr_mbx_send(queue_id, (void *)info);\n\n  return osOK;\n}\n\n/// Get a Message or Wait for a Message from a Queue\nstatic __INLINE os_InRegs osEvent isrMessageGet(osMessageQId queue_id,\n                                                uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if ((queue_id == NULL) || (millisec != 0)) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  res = isr_mbx_receive(queue_id, &ret.value.p);\n\n  if (res != OS_R_MBX) {\n    ret.status = osOK;\n    return ret;\n  }\n\n  ret.status = osEventMessage;\n\n  return ret;\n}\n\n// Message Queue Management Public API\n\n/// Create and Initialize Message Queue\nosMessageQId osMessageCreate(osMessageQDef_t *queue_def, osThreadId thread_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return NULL; // Not allowed in ISR\n  if ((__get_CONTROL() == MODE_SUPERVISOR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMessageCreate(queue_def, thread_id);\n  } else {\n    return __svcMessageCreate(queue_def, thread_id);\n  }\n}\n\n/// Put a Message to a Queue\nosStatus osMessagePut(osMessageQId queue_id, uint32_t info, uint32_t millisec) {\n  if (__get_CONTROL() == MODE_IRQ) { // in ISR\n    return isrMessagePut(queue_id, info, millisec);\n  } else { // in Thread\n    return __svcMessagePut(queue_id, info, millisec);\n  }\n}\n\n/// Get a Message or Wait for a Message from a Queue\nos_InRegs osEvent osMessageGet(osMessageQId queue_id, uint32_t millisec) {\n  if (__get_CONTROL() == MODE_IRQ) { // in ISR\n    return isrMessageGet(queue_id, millisec);\n  } else { // in Thread\n    return __svcMessageGet(queue_id, millisec);\n  }\n}\n\n// ==== Mail Queue Management Functions ====\n\n// Mail Queue Management Service Calls declarations\nSVC_2_1(svcMailCreate, osMailQId, osMailQDef_t *, osThreadId, RET_pointer)\nSVC_4_1(sysMailAlloc, void *, osMailQId, uint32_t, uint32_t, uint32_t,\n        RET_pointer)\nSVC_3_1(sysMailFree, osStatus, osMailQId, void *, uint32_t, RET_osStatus)\n\n// Mail Queue Management Service & ISR Calls\n\n/// Create and Initialize mail queue\nosMailQId svcMailCreate(osMailQDef_t *queue_def, osThreadId thread_id) {\n  uint32_t blk_sz;\n  P_MCB pmcb;\n  void *pool;\n\n  if ((queue_def == NULL) || (queue_def->queue_sz == 0) ||\n      (queue_def->item_sz == 0) || (queue_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  pmcb = *(((void **)queue_def->pool) + 0);\n  pool = *(((void **)queue_def->pool) + 1);\n\n  if ((pool == NULL) || (pmcb == NULL) || (pmcb->cb_type != 0)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  blk_sz = (queue_def->item_sz + 3) & ~3;\n\n  _init_box(pool, sizeof(struct OS_BM) + queue_def->queue_sz * blk_sz, blk_sz);\n\n  rt_mbx_init(pmcb, 4 * (queue_def->queue_sz + 4));\n\n  return queue_def->pool;\n}\n\n/// Allocate a memory block from a mail\nvoid *sysMailAlloc(osMailQId queue_id, uint32_t millisec, uint32_t isr,\n                   uint32_t clr) {\n  P_MCB pmcb;\n  void *pool;\n  void *mem;\n\n  if (queue_id == NULL)\n    return NULL;\n\n  pmcb = *(((void **)queue_id) + 0);\n  pool = *(((void **)queue_id) + 1);\n\n  if ((pool == NULL) || (pmcb == NULL))\n    return NULL;\n\n  if (isr && (millisec != 0))\n    return NULL;\n\n  mem = rt_alloc_box(pool);\n  if (clr) {\n    rt_clr_box(pool, mem);\n  }\n\n  if ((mem == NULL) && (millisec != 0)) {\n    // Put Task to sleep when Memory not available\n    if (pmcb->p_lnk != NULL) {\n      rt_put_prio((P_XCB)pmcb, os_tsk.run);\n    } else {\n      pmcb->p_lnk = os_tsk.run;\n      os_tsk.run->p_lnk = NULL;\n      os_tsk.run->p_rlnk = (P_TCB)pmcb;\n      // Task is waiting to allocate a message\n      pmcb->state = 3;\n    }\n    rt_block(rt_ms2tick(millisec), WAIT_MBX);\n  }\n\n  return mem;\n}\n\n/// Free a memory block from a mail\nosStatus sysMailFree(osMailQId queue_id, void *mail, uint32_t isr) {\n  P_MCB pmcb;\n  P_TCB ptcb;\n  void *pool;\n  void *mem;\n  int32_t res;\n\n  if (queue_id == NULL)\n    return osErrorParameter;\n\n  pmcb = *(((void **)queue_id) + 0);\n  pool = *(((void **)queue_id) + 1);\n\n  if ((pmcb == NULL) || (pool == NULL))\n    return osErrorParameter;\n\n  res = rt_free_box(pool, mail);\n\n  if (res != 0)\n    return osErrorValue;\n\n  if (pmcb->state == 3) {\n    // Task is waiting to allocate a message\n    if (isr) {\n      rt_psq_enq(pmcb, (U32)pool);\n      rt_psh_req();\n    } else {\n      mem = rt_alloc_box(pool);\n      if (mem != NULL) {\n        ptcb = rt_get_first((P_XCB)pmcb);\n        if (pmcb->p_lnk == NULL) {\n          pmcb->state = 0;\n        }\n        rt_ret_val(ptcb, (U32)mem);\n        rt_rmv_dly(ptcb);\n        rt_dispatch(ptcb);\n      }\n    }\n  }\n\n  return osOK;\n}\n\n// Mail Queue Management Public API\n\n/// Create and Initialize mail queue\nosMailQId osMailCreate(osMailQDef_t *queue_def, osThreadId thread_id) {\n  if (__get_CONTROL() == MODE_IRQ)\n    return NULL; // Not allowed in ISR\n  if ((__get_CONTROL() == MODE_SUPERVISOR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMailCreate(queue_def, thread_id);\n  } else {\n    return __svcMailCreate(queue_def, thread_id);\n  }\n}\n\n/// Allocate a memory block from a mail\nvoid *osMailAlloc(osMailQId queue_id, uint32_t millisec) {\n  if (__get_CONTROL() == MODE_IRQ) { // in ISR\n    return sysMailAlloc(queue_id, millisec, 1, 0);\n  } else { // in Thread\n    return __sysMailAlloc(queue_id, millisec, 0, 0);\n  }\n}\n\n/// Allocate a memory block from a mail and set memory block to zero\nvoid *osMailCAlloc(osMailQId queue_id, uint32_t millisec) {\n  if (__get_CONTROL() == MODE_IRQ) { // in ISR\n    return sysMailAlloc(queue_id, millisec, 1, 1);\n  } else { // in Thread\n    return __sysMailAlloc(queue_id, millisec, 0, 1);\n  }\n}\n\n/// Free a memory block from a mail\nosStatus osMailFree(osMailQId queue_id, void *mail) {\n  if (__get_CONTROL() == MODE_IRQ) { // in ISR\n    return sysMailFree(queue_id, mail, 1);\n  } else { // in Thread\n    return __sysMailFree(queue_id, mail, 0);\n  }\n}\n\n/// Put a mail to a queue\nosStatus osMailPut(osMailQId queue_id, void *mail) {\n  if (queue_id == NULL)\n    return osErrorParameter;\n  if (mail == NULL)\n    return osErrorValue;\n  return osMessagePut(*((void **)queue_id), (uint32_t)mail, 0);\n}\n\n/// Get a mail from a queue\nos_InRegs osEvent osMailGet(osMailQId queue_id, uint32_t millisec) {\n  osEvent ret;\n\n  if (queue_id == NULL) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  ret = osMessageGet(*((void **)queue_id), millisec);\n  if (ret.status == osEventMessage)\n    ret.status = osEventMail;\n\n  return ret;\n}\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Event.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_EVENT.C\n *      Purpose: Implements waits and wake-ups for event flags\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Event.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_evt_wait -----------------------------------*/\n\nOS_RESULT rt_evt_wait(U16 wait_flags, U16 timeout, BOOL and_wait) {\n  /* Wait for one or more event flags with optional time-out.                */\n  /* \"wait_flags\" identifies the flags to wait for.                          */\n  /* \"timeout\" is the time-out limit in system ticks (0xffff if no time-out) */\n  /* \"and_wait\" specifies the AND-ing of \"wait_flags\" as condition to be met */\n  /* to complete the wait. (OR-ing if set to 0).                             */\n  U32 block_state;\n\n  if (and_wait) {\n    /* Check for AND-connected events */\n    if ((os_tsk.run->events & wait_flags) == wait_flags) {\n      os_tsk.run->events &= ~wait_flags;\n      return (OS_R_EVT);\n    }\n    block_state = WAIT_AND;\n  } else {\n    /* Check for OR-connected events */\n    if (os_tsk.run->events & wait_flags) {\n      os_tsk.run->waits = os_tsk.run->events & wait_flags;\n      os_tsk.run->events &= ~wait_flags;\n      return (OS_R_EVT);\n    }\n    block_state = WAIT_OR;\n  }\n  /* Task has to wait */\n  os_tsk.run->waits = wait_flags;\n  rt_block(timeout, (U8)block_state);\n  return (OS_R_TMO);\n}\n\n/*--------------------------- rt_evt_set ------------------------------------*/\n\nvoid rt_evt_set(U16 event_flags, OS_TID task_id) {\n  /* Set one or more event flags of a selectable task. */\n  P_TCB p_tcb;\n\n  p_tcb = os_active_TCB[task_id - 1];\n  if (p_tcb == NULL) {\n    return;\n  }\n  p_tcb->events |= event_flags;\n  event_flags = p_tcb->waits;\n  /* If the task is not waiting for an event, it should not be put */\n  /* to ready state. */\n  if (p_tcb->state == WAIT_AND) {\n    /* Check for AND-connected events */\n    if ((p_tcb->events & event_flags) == event_flags) {\n      goto wkup;\n    }\n  }\n  if (p_tcb->state == WAIT_OR) {\n    /* Check for OR-connected events */\n    if (p_tcb->events & event_flags) {\n      p_tcb->waits &= p_tcb->events;\n    wkup:\n      p_tcb->events &= ~event_flags;\n      rt_rmv_dly(p_tcb);\n      p_tcb->state = READY;\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_tcb, 0x08 /*osEventSignal*/, p_tcb->waits);\n#else\n      rt_ret_val(p_tcb, OS_R_EVT);\n#endif\n      rt_dispatch(p_tcb);\n    }\n  }\n}\n\n/*--------------------------- rt_evt_clr ------------------------------------*/\n\nvoid rt_evt_clr(U16 clear_flags, OS_TID task_id) {\n  /* Clear one or more event flags (identified by \"clear_flags\") of a */\n  /* selectable task (identified by \"task\"). */\n  P_TCB task = os_active_TCB[task_id - 1];\n\n  if (task == NULL) {\n    return;\n  }\n  task->events &= ~clear_flags;\n}\n\n/*--------------------------- isr_evt_set -----------------------------------*/\n\nvoid isr_evt_set(U16 event_flags, OS_TID task_id) {\n  /* Same function as \"os_evt_set\", but to be called by ISRs. */\n  P_TCB p_tcb = os_active_TCB[task_id - 1];\n\n  if (p_tcb == NULL) {\n    return;\n  }\n  rt_psq_enq(p_tcb, event_flags);\n  rt_psh_req();\n}\n\n/*--------------------------- rt_evt_get ------------------------------------*/\n\nU16 rt_evt_get(void) {\n  /* Get events of a running task after waiting for OR connected events. */\n  return (os_tsk.run->waits);\n}\n\n/*--------------------------- rt_evt_psh ------------------------------------*/\n\nvoid rt_evt_psh(P_TCB p_CB, U16 set_flags) {\n  /* Check if task has to be waken up */\n  U16 event_flags;\n\n  p_CB->events |= set_flags;\n  event_flags = p_CB->waits;\n  if (p_CB->state == WAIT_AND) {\n    /* Check for AND-connected events */\n    if ((p_CB->events & event_flags) == event_flags) {\n      goto rdy;\n    }\n  }\n  if (p_CB->state == WAIT_OR) {\n    /* Check for OR-connected events */\n    if (p_CB->events & event_flags) {\n      p_CB->waits &= p_CB->events;\n    rdy:\n      p_CB->events &= ~event_flags;\n      rt_rmv_dly(p_CB);\n      p_CB->state = READY;\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_CB, 0x08 /*osEventSignal*/, p_CB->waits);\n#else\n      rt_ret_val(p_CB, OS_R_EVT);\n#endif\n      rt_put_prio(&os_rdy, p_CB);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Event.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_EVENT.H\n *      Purpose: Implements waits and wake-ups for event flags\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\nextern OS_RESULT rt_evt_wait (U16 wait_flags,  U16 timeout, BOOL and_wait);\nextern void      rt_evt_set  (U16 event_flags, OS_TID task_id);\nextern void      rt_evt_clr  (U16 clear_flags, OS_TID task_id);\nextern void      isr_evt_set (U16 event_flags, OS_TID task_id);\nextern U16       rt_evt_get  (void);\nextern void      rt_evt_psh  (P_TCB p_CB, U16 set_flags);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_HAL_CM.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_HAL_CM.H\n *      Purpose: Hardware Abstraction Layer for Cortex-M definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"cmsis.h\"\n/* Definitions */\n#define INITIAL_xPSR    0x10000000\n#define DEMCR_TRCENA    0x01000000\n#define ITM_ITMENA      0x00000001\n#define MAGIC_WORD      0xE25A2EA5\n\n#define SYS_TICK_IRQn TIMER0_IRQn\n\nextern void rt_set_PSP (U32 stack);\nextern U32  rt_get_PSP (void);\nextern void os_set_env (void);\nextern void SysTick_Handler (void);\nextern void *_alloc_box (void *box_mem);\nextern int  _free_box (void *box_mem, void *box);\n\nextern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);\nextern void rt_ret_val  (P_TCB p_TCB, U32 v0);\nextern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);\n\nextern void dbg_init (void);\nextern void dbg_task_notify (P_TCB p_tcb, BOOL create);\nextern void dbg_task_switch (U32 task_id);\n\n\n#if defined (__CC_ARM)          /* ARM Compiler */\n\n#if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)\n #define __USE_EXCLUSIVE_ACCESS\n#else\n #undef  __USE_EXCLUSIVE_ACCESS\n#endif\n\n#elif defined (__GNUC__)        /* GNU Compiler */\n\n#undef  __USE_EXCLUSIVE_ACCESS\n\n#if defined (__CORTEX_M0) || defined (__CORTEX_M0PLUS)\n#define __TARGET_ARCH_6S_M 1\n#else\n#define __TARGET_ARCH_6S_M 0\n#endif\n\n#if defined (__VFP_FP__) && !defined(__SOFTFP__)\n#define __TARGET_FPU_VFP 1\n#else\n#define __TARGET_FPU_VFP 0\n#endif\n\n#define __inline inline\n#define __weak   __attribute__((weak))\n\n\n#elif defined (__ICCARM__)      /* IAR Compiler */\n\n#undef  __USE_EXCLUSIVE_ACCESS\n\n#if (__CORE__ == __ARM6M__)\n#define __TARGET_ARCH_6S_M 1\n#else\n#define __TARGET_ARCH_6S_M 0\n#endif\n\n#if defined __ARMVFP__\n#define __TARGET_FPU_VFP 1\n#else\n#define __TARGET_FPU_VFP 0\n#endif\n\n#define __inline inline\n\n#endif\n\n\n/* NVIC registers */\n\n#define OS_PEND_IRQ()   NVIC_PendIRQ(SYS_TICK_IRQn)\n#define OS_PENDING      NVIC_PendingIRQ(SYS_TICK_IRQn)\n#define OS_UNPEND(fl)   NVIC_UnpendIRQ(SYS_TICK_IRQn)\n#define OS_PEND(fl,p)   NVIC_PendIRQ(SYS_TICK_IRQn)\n#define OS_LOCK()       NVIC_DisableIRQ(SYS_TICK_IRQn)\n#define OS_UNLOCK()     NVIC_EnableIRQ(SYS_TICK_IRQn)\n\n#define OS_X_PENDING    NVIC_PendingIRQ(SYS_TICK_IRQn)\n#define OS_X_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)\n#define OS_X_PEND(fl,p) NVIC_PendIRQ(SYS_TICK_IRQn)\n\n#define OS_X_INIT(n)    NVIC_EnableIRQ(n)\n#define OS_X_LOCK(n)    NVIC_DisableIRQ(n)\n#define OS_X_UNLOCK(n)  NVIC_EnableIRQ(n)\n\n/* Variables */\nextern BIT dbg_msg;\n\n/* Functions */\n#ifdef __USE_EXCLUSIVE_ACCESS\n #define rt_inc(p)     while(__strex((__ldrex(p)+1),p))\n #define rt_dec(p)     while(__strex((__ldrex(p)-1),p))\n#else\n #define rt_inc(p)     __disable_irq();(*p)++;__enable_irq();\n #define rt_dec(p)     __disable_irq();(*p)--;__enable_irq();\n#endif\n\n__inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {\n  U32 cnt,c2;\n#ifdef __USE_EXCLUSIVE_ACCESS\n  do {\n    if ((cnt = __ldrex(count)) == size) {\n      __clrex();\n      return (cnt); }\n  } while (__strex(cnt+1, count));\n  do {\n    c2 = (cnt = __ldrex(first)) + 1;\n    if (c2 == size) c2 = 0;\n  } while (__strex(c2, first));\n#else\n  __disable_irq();\n  if ((cnt = *count) < size) {\n    *count = cnt+1;\n    c2 = (cnt = *first) + 1;\n    if (c2 == size) c2 = 0;\n    *first = c2;\n  }\n  __enable_irq ();\n#endif\n  return (cnt);\n}\n\n__inline static void rt_systick_init (void) {\n#if SYS_TICK_IRQn == TIMER0_IRQn\n #define SYS_TICK_TIMER  LPC_TIM0\n LPC_SC->PCONP |= (1 << PCTIM0);\n LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(1<<3))) | (1<<2); //PCLK == CPUCLK\n#elif SYS_TICK_IRQn == TIMER1_IRQn\n #define SYS_TICK_TIMER LPC_TIM1\n LPC_SC->PCONP |= (1 << PCTIM1);\n LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(1<<5))) | (1<<4); //PCLK == CPUCLK\n#elif SYS_TICK_IRQn == TIMER2_IRQn\n #define SYS_TICK_TIMER LPC_TIM2\n LPC_SC->PCONP |= (1 << PCTIM2);\n LPC_SC->PCLKSEL1 = (LPC_SC->PCLKSEL1 & (~(1<<13))) | (1<<12); //PCLK == CPUCLK\n#else\n #define SYS_TICK_TIMER LPC_TIM3\n LPC_SC->PCONP |= (1 << PCTIM3);\n LPC_SC->PCLKSEL1 = (LPC_SC->PCLKSEL1 & (~(1<<15))) | (1<<14); //PCLK == CPUCLK\n#endif\n\n  // setup Timer to count forever\n  //interrupt_reg\n  SYS_TICK_TIMER->TCR = 2; // reset & disable timer 0\n  SYS_TICK_TIMER->TC = os_trv;\n  SYS_TICK_TIMER->PR = 0; // set the prescale divider\n  //Reset of TC and Interrupt when MR3  MR2 matches TC\n  SYS_TICK_TIMER->MCR = (1 << 9) |(1 << 10); //TMCR_MR3_R_Msk | TMCR_MR3_I_Msk\n  SYS_TICK_TIMER->MR3 = os_trv; // match registers\n  SYS_TICK_TIMER->CCR = 0; // disable compare registers\n  SYS_TICK_TIMER->EMR = 0; // disable external match register\n  // initialize the interrupt vector\n  NVIC_SetVector(SYS_TICK_IRQn, (uint32_t)&SysTick_Handler);\n  SYS_TICK_TIMER->TCR = 1; // enable timer 0\n}\n\n__inline static void rt_svc_init (void) {\n// TODO: add svcInit\n\n}\n\n#ifdef DBG_MSG\n#define DBG_INIT() dbg_init()\n#define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)\n#define DBG_TASK_SWITCH(task_id)      if (dbg_msg && (os_tsk.new_tsk != os_tsk.run)) \\\n                                                   dbg_task_switch(task_id)\n#else\n#define DBG_INIT()\n#define DBG_TASK_NOTIFY(p_tcb,create)\n#define DBG_TASK_SWITCH(task_id)\n#endif\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_List.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_LIST.C\n *      Purpose: Functions for the management of different lists\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_List.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* List head of chained ready tasks */\nstruct OS_XCB os_rdy;\n/* List head of chained delay tasks */\nstruct OS_XCB os_dly;\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_put_prio -----------------------------------*/\n\nvoid rt_put_prio(P_XCB p_CB, P_TCB p_task) {\n  /* Put task identified with \"p_task\" into list ordered by priority.       */\n  /* \"p_CB\" points to head of list; list has always an element at end with  */\n  /* a priority less than \"p_task->prio\".                                   */\n  P_TCB p_CB2;\n  U32 prio;\n  BOOL sem_mbx = __FALSE;\n\n  if (p_CB->cb_type == SCB || p_CB->cb_type == MCB || p_CB->cb_type == MUCB) {\n    sem_mbx = __TRUE;\n  }\n  prio = p_task->prio;\n  p_CB2 = p_CB->p_lnk;\n  /* Search for an entry in the list */\n  while (p_CB2 != NULL && prio <= p_CB2->prio) {\n    p_CB = (P_XCB)p_CB2;\n    p_CB2 = p_CB2->p_lnk;\n  }\n  /* Entry found, insert the task into the list */\n  p_task->p_lnk = p_CB2;\n  p_CB->p_lnk = p_task;\n  if (sem_mbx) {\n    if (p_CB2 != NULL) {\n      p_CB2->p_rlnk = p_task;\n    }\n    p_task->p_rlnk = (P_TCB)p_CB;\n  } else {\n    p_task->p_rlnk = NULL;\n  }\n}\n\n/*--------------------------- rt_get_first ----------------------------------*/\n\nP_TCB rt_get_first(P_XCB p_CB) {\n  /* Get task at head of list: it is the task with highest priority. */\n  /* \"p_CB\" points to head of list. */\n  P_TCB p_first;\n\n  p_first = p_CB->p_lnk;\n  p_CB->p_lnk = p_first->p_lnk;\n  if (p_CB->cb_type == SCB || p_CB->cb_type == MCB || p_CB->cb_type == MUCB) {\n    if (p_first->p_lnk != NULL) {\n      p_first->p_lnk->p_rlnk = (P_TCB)p_CB;\n      p_first->p_lnk = NULL;\n    }\n    p_first->p_rlnk = NULL;\n  } else {\n    p_first->p_lnk = NULL;\n  }\n  return (p_first);\n}\n\n/*--------------------------- rt_put_rdy_first ------------------------------*/\n\nvoid rt_put_rdy_first(P_TCB p_task) {\n  /* Put task identified with \"p_task\" at the head of the ready list. The   */\n  /* task must have at least a priority equal to highest priority in list.  */\n  p_task->p_lnk = os_rdy.p_lnk;\n  p_task->p_rlnk = NULL;\n  os_rdy.p_lnk = p_task;\n}\n\n/*--------------------------- rt_get_same_rdy_prio --------------------------*/\n\nP_TCB rt_get_same_rdy_prio(void) {\n  /* Remove a task of same priority from ready list if any exists. Other-   */\n  /* wise return NULL.                                                      */\n  P_TCB p_first;\n\n  p_first = os_rdy.p_lnk;\n  if (p_first->prio == os_tsk.run->prio) {\n    os_rdy.p_lnk = os_rdy.p_lnk->p_lnk;\n    return (p_first);\n  }\n  return (NULL);\n}\n\n/*--------------------------- rt_resort_prio --------------------------------*/\n\nvoid rt_resort_prio(P_TCB p_task) {\n  /* Re-sort ordered lists after the priority of 'p_task' has changed.      */\n  P_TCB p_CB;\n\n  if (p_task->p_rlnk == NULL) {\n    if (p_task->state == READY) {\n      /* Task is chained into READY list. */\n      p_CB = (P_TCB)&os_rdy;\n      goto res;\n    }\n  } else {\n    p_CB = p_task->p_rlnk;\n    while (p_CB->cb_type == TCB) {\n      /* Find a header of this task chain list. */\n      p_CB = p_CB->p_rlnk;\n    }\n  res:\n    rt_rmv_list(p_task);\n    rt_put_prio((P_XCB)p_CB, p_task);\n  }\n}\n\n/*--------------------------- rt_put_dly ------------------------------------*/\n\nvoid rt_put_dly(P_TCB p_task, U16 delay) {\n  /* Put a task identified with \"p_task\" into chained delay wait list using */\n  /* a delay value of \"delay\".                                              */\n  P_TCB p;\n  U32 delta, idelay = delay;\n\n  p = (P_TCB)&os_dly;\n  if (p->p_dlnk == NULL) {\n    /* Delay list empty */\n    delta = 0;\n    goto last;\n  }\n  delta = os_dly.delta_time;\n  while (delta < idelay) {\n    if (p->p_dlnk == NULL) {\n      /* End of list found */\n    last:\n      p_task->p_dlnk = NULL;\n      p->p_dlnk = p_task;\n      p_task->p_blnk = p;\n      p->delta_time = (U16)(idelay - delta);\n      p_task->delta_time = 0;\n      return;\n    }\n    p = p->p_dlnk;\n    delta += p->delta_time;\n  }\n  /* Right place found */\n  p_task->p_dlnk = p->p_dlnk;\n  p->p_dlnk = p_task;\n  p_task->p_blnk = p;\n  if (p_task->p_dlnk != NULL) {\n    p_task->p_dlnk->p_blnk = p_task;\n  }\n  p_task->delta_time = (U16)(delta - idelay);\n  p->delta_time -= p_task->delta_time;\n}\n\n/*--------------------------- rt_dec_dly ------------------------------------*/\n\nvoid rt_dec_dly(void) {\n  /* Decrement delta time of list head: remove tasks having a value of zero.*/\n  P_TCB p_rdy;\n\n  if (os_dly.p_dlnk == NULL) {\n    return;\n  }\n  os_dly.delta_time--;\n  while ((os_dly.delta_time == 0) && (os_dly.p_dlnk != NULL)) {\n    p_rdy = os_dly.p_dlnk;\n    if (p_rdy->p_rlnk != NULL) {\n      /* Task is really enqueued, remove task from semaphore/mailbox */\n      /* timeout waiting list. */\n      p_rdy->p_rlnk->p_lnk = p_rdy->p_lnk;\n      if (p_rdy->p_lnk != NULL) {\n        p_rdy->p_lnk->p_rlnk = p_rdy->p_rlnk;\n        p_rdy->p_lnk = NULL;\n      }\n      p_rdy->p_rlnk = NULL;\n    }\n    rt_put_prio(&os_rdy, p_rdy);\n    os_dly.delta_time = p_rdy->delta_time;\n    if (p_rdy->state == WAIT_ITV) {\n      /* Calculate the next time for interval wait. */\n      p_rdy->delta_time = p_rdy->interval_time + (U16)os_time;\n    }\n    p_rdy->state = READY;\n    os_dly.p_dlnk = p_rdy->p_dlnk;\n    if (p_rdy->p_dlnk != NULL) {\n      p_rdy->p_dlnk->p_blnk = (P_TCB)&os_dly;\n      p_rdy->p_dlnk = NULL;\n    }\n    p_rdy->p_blnk = NULL;\n  }\n}\n\n/*--------------------------- rt_rmv_list -----------------------------------*/\n\nvoid rt_rmv_list(P_TCB p_task) {\n  /* Remove task identified with \"p_task\" from ready, semaphore or mailbox  */\n  /* waiting list if enqueued.                                              */\n  P_TCB p_b;\n\n  if (p_task->p_rlnk != NULL) {\n    /* A task is enqueued in semaphore / mailbox waiting list. */\n    p_task->p_rlnk->p_lnk = p_task->p_lnk;\n    if (p_task->p_lnk != NULL) {\n      p_task->p_lnk->p_rlnk = p_task->p_rlnk;\n    }\n    return;\n  }\n\n  p_b = (P_TCB)&os_rdy;\n  while (p_b != NULL) {\n    /* Search the ready list for task \"p_task\" */\n    if (p_b->p_lnk == p_task) {\n      p_b->p_lnk = p_task->p_lnk;\n      return;\n    }\n    p_b = p_b->p_lnk;\n  }\n}\n\n/*--------------------------- rt_rmv_dly ------------------------------------*/\n\nvoid rt_rmv_dly(P_TCB p_task) {\n  /* Remove task identified with \"p_task\" from delay list if enqueued.      */\n  P_TCB p_b;\n\n  p_b = p_task->p_blnk;\n  if (p_b != NULL) {\n    /* Task is really enqueued */\n    p_b->p_dlnk = p_task->p_dlnk;\n    if (p_task->p_dlnk != NULL) {\n      /* 'p_task' is in the middle of list */\n      p_b->delta_time += p_task->delta_time;\n      p_task->p_dlnk->p_blnk = p_b;\n      p_task->p_dlnk = NULL;\n    } else {\n      /* 'p_task' is at the end of list */\n      p_b->delta_time = 0;\n    }\n    p_task->p_blnk = NULL;\n  }\n}\n\n/*--------------------------- rt_psq_enq ------------------------------------*/\n\nvoid rt_psq_enq(OS_ID entry, U32 arg) {\n  /* Insert post service request \"entry\" into ps-queue. */\n  U32 idx;\n\n  idx = rt_inc_qi(os_psq->size, &os_psq->count, &os_psq->first);\n  if (idx < os_psq->size) {\n    os_psq->q[idx].id = entry;\n    os_psq->q[idx].arg = arg;\n  } else {\n    os_error(OS_ERR_FIFO_OVF);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_List.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_LIST.H\n *      Purpose: Functions for the management of different lists\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Definitions */\n\n/* Values for 'cb_type' */\n#define TCB             0\n#define MCB             1\n#define SCB             2\n#define MUCB            3\n#define HCB             4\n\n/* Variables */\nextern struct OS_XCB os_rdy;\nextern struct OS_XCB os_dly;\n\n/* Functions */\nextern void  rt_put_prio      (P_XCB p_CB, P_TCB p_task);\nextern P_TCB rt_get_first     (P_XCB p_CB);\nextern void  rt_put_rdy_first (P_TCB p_task);\nextern P_TCB rt_get_same_rdy_prio (void);\nextern void  rt_resort_prio   (P_TCB p_task);\nextern void  rt_put_dly       (P_TCB p_task, U16 delay);\nextern void  rt_dec_dly       (void);\nextern void  rt_rmv_list      (P_TCB p_task);\nextern void  rt_rmv_dly       (P_TCB p_task);\nextern void  rt_psq_enq       (OS_ID entry, U32 arg);\n\n/* This is a fast macro generating in-line code */\n#define rt_rdy_prio(void) (os_rdy.p_lnk->prio)\n\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Mailbox.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MAILBOX.C\n *      Purpose: Implements waits and wake-ups for mailbox messages\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Mailbox.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_mbx_init -----------------------------------*/\n\nvoid rt_mbx_init(OS_ID mailbox, U16 mbx_size) {\n  /* Initialize a mailbox */\n  P_MCB p_MCB = mailbox;\n\n  p_MCB->cb_type = MCB;\n  p_MCB->state = 0;\n  p_MCB->isr_st = 0;\n  p_MCB->p_lnk = NULL;\n  p_MCB->first = 0;\n  p_MCB->last = 0;\n  p_MCB->count = 0;\n  p_MCB->size =\n      (mbx_size + sizeof(void *) - sizeof(struct OS_MCB)) / (U32)sizeof(void *);\n}\n\n/*--------------------------- rt_mbx_send -----------------------------------*/\n\nOS_RESULT rt_mbx_send(OS_ID mailbox, void *p_msg, U16 timeout) {\n  /* Send message to a mailbox */\n  P_MCB p_MCB = mailbox;\n  P_TCB p_TCB;\n\n  if ((p_MCB->p_lnk != NULL) && (p_MCB->state == 1)) {\n    /* A task is waiting for message */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val2(p_TCB, 0x10 /*osEventMessage*/, (U32)p_msg);\n#else\n    *p_TCB->msg = p_msg;\n    rt_ret_val(p_TCB, OS_R_MBX);\n#endif\n    rt_rmv_dly(p_TCB);\n    rt_dispatch(p_TCB);\n  } else {\n    /* Store message in mailbox queue */\n    if (p_MCB->count == p_MCB->size) {\n      /* No free message entry, wait for one. If message queue is full, */\n      /* then no task is waiting for message. The 'p_MCB->p_lnk' list   */\n      /* pointer can now be reused for send message waits task list.    */\n      if (timeout == 0) {\n        return (OS_R_TMO);\n      }\n      if (p_MCB->p_lnk != NULL) {\n        rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n      } else {\n        p_MCB->p_lnk = os_tsk.run;\n        os_tsk.run->p_lnk = NULL;\n        os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n        /* Task is waiting to send a message */\n        p_MCB->state = 2;\n      }\n      os_tsk.run->msg = p_msg;\n      rt_block(timeout, WAIT_MBX);\n      return (OS_R_TMO);\n    }\n    /* Yes, there is a free entry in a mailbox. */\n    p_MCB->msg[p_MCB->first] = p_msg;\n    rt_inc(&p_MCB->count);\n    if (++p_MCB->first == p_MCB->size) {\n      p_MCB->first = 0;\n    }\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mbx_wait -----------------------------------*/\n\nOS_RESULT rt_mbx_wait(OS_ID mailbox, void **message, U16 timeout) {\n  /* Receive a message; possibly wait for it */\n  P_MCB p_MCB = mailbox;\n  P_TCB p_TCB;\n\n  /* If a message is available in the fifo buffer */\n  /* remove it from the fifo buffer and return. */\n  if (p_MCB->count) {\n    *message = p_MCB->msg[p_MCB->last];\n    if (++p_MCB->last == p_MCB->size) {\n      p_MCB->last = 0;\n    }\n    if ((p_MCB->p_lnk != NULL) && (p_MCB->state == 2)) {\n      /* A task is waiting to send message */\n      p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n      rt_ret_val(p_TCB, OS_R_OK);\n#endif\n      p_MCB->msg[p_MCB->first] = p_TCB->msg;\n      if (++p_MCB->first == p_MCB->size) {\n        p_MCB->first = 0;\n      }\n      rt_rmv_dly(p_TCB);\n      rt_dispatch(p_TCB);\n    } else {\n      rt_dec(&p_MCB->count);\n    }\n    return (OS_R_OK);\n  }\n  /* No message available: wait for one */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  if (p_MCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n  } else {\n    p_MCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n    /* Task is waiting to receive a message */\n    p_MCB->state = 1;\n  }\n  rt_block(timeout, WAIT_MBX);\n#ifndef __CMSIS_RTOS\n  os_tsk.run->msg = message;\n#endif\n  return (OS_R_TMO);\n}\n\n/*--------------------------- rt_mbx_check ----------------------------------*/\n\nOS_RESULT rt_mbx_check(OS_ID mailbox) {\n  /* Check for free space in a mailbox. Returns the number of messages     */\n  /* that can be stored to a mailbox. It returns 0 when mailbox is full.   */\n  P_MCB p_MCB = mailbox;\n\n  return (p_MCB->size - p_MCB->count);\n}\n\n/*--------------------------- isr_mbx_send ----------------------------------*/\n\nvoid isr_mbx_send(OS_ID mailbox, void *p_msg) {\n  /* Same function as \"os_mbx_send\", but to be called by ISRs. */\n  P_MCB p_MCB = mailbox;\n\n  rt_psq_enq(p_MCB, (U32)p_msg);\n  rt_psh_req();\n}\n\n/*--------------------------- isr_mbx_receive -------------------------------*/\n\nOS_RESULT isr_mbx_receive(OS_ID mailbox, void **message) {\n  /* Receive a message in the interrupt function. The interrupt function   */\n  /* should not wait for a message since this would block the rtx os.      */\n  P_MCB p_MCB = mailbox;\n\n  if (p_MCB->count) {\n    /* A message is available in the fifo buffer. */\n    *message = p_MCB->msg[p_MCB->last];\n    if (p_MCB->state == 2) {\n      /* A task is locked waiting to send message */\n      rt_psq_enq(p_MCB, 0);\n      rt_psh_req();\n    }\n    rt_dec(&p_MCB->count);\n    if (++p_MCB->last == p_MCB->size) {\n      p_MCB->last = 0;\n    }\n    return (OS_R_MBX);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mbx_psh ------------------------------------*/\n\nvoid rt_mbx_psh(P_MCB p_CB, void *p_msg) {\n  /* Store the message to the mailbox queue or pass it to task directly. */\n  P_TCB p_TCB;\n  void *mem;\n\n  if (p_CB->p_lnk != NULL)\n    switch (p_CB->state) {\n#ifdef __CMSIS_RTOS\n    case 3:\n      /* Task is waiting to allocate memory, remove it from the waiting list */\n      mem = rt_alloc_box(p_msg);\n      if (mem == NULL)\n        break;\n      p_TCB = rt_get_first((P_XCB)p_CB);\n      rt_ret_val(p_TCB, (U32)mem);\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n#endif\n    case 2:\n      /* Task is waiting to send a message, remove it from the waiting list */\n      p_TCB = rt_get_first((P_XCB)p_CB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n      rt_ret_val(p_TCB, OS_R_OK);\n#endif\n      p_CB->msg[p_CB->first] = p_TCB->msg;\n      rt_inc(&p_CB->count);\n      if (++p_CB->first == p_CB->size) {\n        p_CB->first = 0;\n      }\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n    case 1:\n      /* Task is waiting for a message, pass the message to the task directly */\n      p_TCB = rt_get_first((P_XCB)p_CB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_TCB, 0x10 /*osEventMessage*/, (U32)p_msg);\n#else\n      *p_TCB->msg = p_msg;\n      rt_ret_val(p_TCB, OS_R_MBX);\n#endif\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n    }\n  else {\n    /* No task is waiting for a message, store it to the mailbox queue */\n    if (p_CB->count < p_CB->size) {\n      p_CB->msg[p_CB->first] = p_msg;\n      rt_inc(&p_CB->count);\n      if (++p_CB->first == p_CB->size) {\n        p_CB->first = 0;\n      }\n    } else {\n      os_error(OS_ERR_MBX_OVF);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Mailbox.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MAILBOX.H\n *      Purpose: Implements waits and wake-ups for mailbox messages\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\nextern void      rt_mbx_init  (OS_ID mailbox, U16 mbx_size);\nextern OS_RESULT rt_mbx_send  (OS_ID mailbox, void *p_msg,    U16 timeout);\nextern OS_RESULT rt_mbx_wait  (OS_ID mailbox, void **message, U16 timeout);\nextern OS_RESULT rt_mbx_check (OS_ID mailbox);\nextern void      isr_mbx_send (OS_ID mailbox, void *p_msg);\nextern OS_RESULT isr_mbx_receive (OS_ID mailbox, void **message);\nextern void      rt_mbx_psh   (P_MCB p_CB,    void *p_msg);\n\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_MemBox.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MEMBOX.C\n *      Purpose: Interface functions for fixed memory block management system\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_MemBox.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_System.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- _init_box -------------------------------------*/\n\nint _init_box(void *box_mem, U32 box_size, U32 blk_size) {\n  /* Initialize memory block system, returns 0 if OK, 1 if fails. */\n  void *end;\n  void *blk;\n  void *next;\n  U32 sizeof_bm;\n\n  /* Create memory structure. */\n  if (blk_size & BOX_ALIGN_8) {\n    /* Memory blocks 8-byte aligned. */\n    blk_size = ((blk_size & ~BOX_ALIGN_8) + 7) & ~7;\n    sizeof_bm = (sizeof(struct OS_BM) + 7) & ~7;\n  } else {\n    /* Memory blocks 4-byte aligned. */\n    blk_size = (blk_size + 3) & ~3;\n    sizeof_bm = sizeof(struct OS_BM);\n  }\n  if (blk_size == 0) {\n    return (1);\n  }\n  if ((blk_size + sizeof_bm) > box_size) {\n    return (1);\n  }\n  /* Create a Memory structure. */\n  blk = ((U8 *)box_mem) + sizeof_bm;\n  ((P_BM)box_mem)->free = blk;\n  end = ((U8 *)box_mem) + box_size;\n  ((P_BM)box_mem)->end = end;\n  ((P_BM)box_mem)->blk_size = blk_size;\n\n  /* Link all free blocks using offsets. */\n  end = ((U8 *)end) - blk_size;\n  while (1) {\n    next = ((U8 *)blk) + blk_size;\n    if (next > end)\n      break;\n    *((void **)blk) = next;\n    blk = next;\n  }\n  /* end marker */\n  *((void **)blk) = 0;\n  return (0);\n}\n\n/*--------------------------- rt_alloc_box ----------------------------------*/\n\nvoid *rt_alloc_box(void *box_mem) {\n  /* Allocate a memory block and return start address. */\n  void **free;\n#ifndef __USE_EXCLUSIVE_ACCESS\n  int irq_dis;\n\n  irq_dis = __disable_irq();\n  free = ((P_BM)box_mem)->free;\n  if (free) {\n    ((P_BM)box_mem)->free = *free;\n  }\n  if (!irq_dis)\n    __enable_irq();\n#else\n  do {\n    if ((free = (void **)__ldrex(&((P_BM)box_mem)->free)) == 0) {\n      __clrex();\n      break;\n    }\n  } while (__strex((U32)*free, &((P_BM)box_mem)->free));\n#endif\n  return (free);\n}\n\n/*--------------------------- _calloc_box -----------------------------------*/\n\nvoid *_calloc_box(void *box_mem) {\n  /* Allocate a 0-initialized memory block and return start address. */\n  void *free;\n  U32 *p;\n  U32 i;\n\n  free = _alloc_box(box_mem);\n  if (free) {\n    p = free;\n    for (i = ((P_BM)box_mem)->blk_size; i; i -= 4) {\n      *p = 0;\n      p++;\n    }\n  }\n  return (free);\n}\n\n/*--------------------------- rt_free_box -----------------------------------*/\n\nint rt_free_box(void *box_mem, void *box) {\n  /* Free a memory block, returns 0 if OK, 1 if box does not belong to box_mem\n   */\n#ifndef __USE_EXCLUSIVE_ACCESS\n  int irq_dis;\n#endif\n\n  if (box < box_mem || box >= ((P_BM)box_mem)->end) {\n    return (1);\n  }\n\n#ifndef __USE_EXCLUSIVE_ACCESS\n  irq_dis = __disable_irq();\n  *((void **)box) = ((P_BM)box_mem)->free;\n  ((P_BM)box_mem)->free = box;\n  if (!irq_dis)\n    __enable_irq();\n#else\n  do {\n    *((void **)box) = (void *)__ldrex(&((P_BM)box_mem)->free);\n  } while (__strex((U32)box, &((P_BM)box_mem)->free));\n#endif\n  return (0);\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_MemBox.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MEMBOX.H\n *      Purpose: Interface functions for fixed memory block management system\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\n#define rt_init_box     _init_box\n#define rt_calloc_box   _calloc_box\nextern int     _init_box   (void *box_mem, U32 box_size, U32 blk_size);\nextern void *rt_alloc_box  (void *box_mem);\nextern void *  _calloc_box (void *box_mem);\nextern int   rt_free_box   (void *box_mem, void *box);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Mutex.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MUTEX.C\n *      Purpose: Implements mutex synchronization objects\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Mutex.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_mut_init -----------------------------------*/\n\nvoid rt_mut_init(OS_ID mutex) {\n  /* Initialize a mutex object */\n  P_MUCB p_MCB = mutex;\n\n  p_MCB->cb_type = MUCB;\n  p_MCB->prio = 0;\n  p_MCB->level = 0;\n  p_MCB->p_lnk = NULL;\n  p_MCB->owner = NULL;\n}\n\n/*--------------------------- rt_mut_delete ---------------------------------*/\n\n#ifdef __CMSIS_RTOS\nOS_RESULT rt_mut_delete(OS_ID mutex) {\n  /* Delete a mutex object */\n  P_MUCB p_MCB = mutex;\n  P_TCB p_TCB;\n\n  /* Restore owner task's priority. */\n  if (p_MCB->level != 0) {\n    p_MCB->owner->prio = p_MCB->prio;\n    if (p_MCB->owner != os_tsk.run) {\n      rt_resort_prio(p_MCB->owner);\n    }\n  }\n\n  while (p_MCB->p_lnk != NULL) {\n    /* A task is waiting for mutex. */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n    rt_ret_val(p_TCB, 0 /*osOK*/);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n    rt_put_prio(&os_rdy, p_TCB);\n  }\n\n  if (os_rdy.p_lnk && (os_rdy.p_lnk->prio > os_tsk.run->prio)) {\n    /* preempt running task */\n    rt_put_prio(&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_dispatch(NULL);\n  }\n\n  p_MCB->cb_type = 0;\n\n  return (OS_R_OK);\n}\n#endif\n\n/*--------------------------- rt_mut_release --------------------------------*/\n\nOS_RESULT rt_mut_release(OS_ID mutex) {\n  /* Release a mutex object */\n  P_MUCB p_MCB = mutex;\n  P_TCB p_TCB;\n\n  if (p_MCB->level == 0 || p_MCB->owner != os_tsk.run) {\n    /* Unbalanced mutex release or task is not the owner */\n    return (OS_R_NOK);\n  }\n  if (--p_MCB->level != 0) {\n    return (OS_R_OK);\n  }\n  /* Restore owner task's priority. */\n  os_tsk.run->prio = p_MCB->prio;\n  if (p_MCB->p_lnk != NULL) {\n    /* A task is waiting for mutex. */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n    rt_ret_val(p_TCB, OS_R_MUT);\n#endif\n    rt_rmv_dly(p_TCB);\n    /* A waiting task becomes the owner of this mutex. */\n    p_MCB->level = 1;\n    p_MCB->owner = p_TCB;\n    p_MCB->prio = p_TCB->prio;\n    /* Priority inversion, check which task continues. */\n    if (os_tsk.run->prio >= rt_rdy_prio()) {\n      rt_dispatch(p_TCB);\n    } else {\n      /* Ready task has higher priority than running task. */\n      rt_put_prio(&os_rdy, os_tsk.run);\n      rt_put_prio(&os_rdy, p_TCB);\n      os_tsk.run->state = READY;\n      p_TCB->state = READY;\n      rt_dispatch(NULL);\n    }\n  } else {\n    /* Check if own priority raised by priority inversion. */\n    if (rt_rdy_prio() > os_tsk.run->prio) {\n      rt_put_prio(&os_rdy, os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_dispatch(NULL);\n    }\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mut_wait -----------------------------------*/\n\nOS_RESULT rt_mut_wait(OS_ID mutex, U16 timeout) {\n  /* Wait for a mutex, continue when mutex is free. */\n  P_MUCB p_MCB = mutex;\n\n  if (p_MCB->level == 0) {\n    p_MCB->owner = os_tsk.run;\n    p_MCB->prio = os_tsk.run->prio;\n    goto inc;\n  }\n  if (p_MCB->owner == os_tsk.run) {\n    /* OK, running task is the owner of this mutex. */\n  inc:\n    p_MCB->level++;\n    return (OS_R_OK);\n  }\n  /* Mutex owned by another task, wait until released. */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  /* Raise the owner task priority if lower than current priority. */\n  /* This priority inversion is called priority inheritance.       */\n  if (p_MCB->prio < os_tsk.run->prio) {\n    p_MCB->owner->prio = os_tsk.run->prio;\n    rt_resort_prio(p_MCB->owner);\n  }\n  if (p_MCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n  } else {\n    p_MCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n  }\n  rt_block(timeout, WAIT_MUT);\n  return (OS_R_TMO);\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Mutex.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MUTEX.H\n *      Purpose: Implements mutex synchronization objects\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\nextern void      rt_mut_init    (OS_ID mutex);\nextern OS_RESULT rt_mut_delete  (OS_ID mutex);\nextern OS_RESULT rt_mut_release (OS_ID mutex);\nextern OS_RESULT rt_mut_wait    (OS_ID mutex, U16 timeout);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Robin.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_ROBIN.C\n *      Purpose: Round Robin Task switching\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Robin.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\nstruct OS_ROBIN os_robin;\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_init_robin ---------------------------------*/\n\n__weak void rt_init_robin(void) {\n  /* Initialize Round Robin variables. */\n  os_robin.task = NULL;\n  os_robin.tout = (U16)os_rrobin;\n}\n\n/*--------------------------- rt_chk_robin ----------------------------------*/\n\n__weak void rt_chk_robin(void) {\n  /* Check if Round Robin timeout expired and switch to the next ready task.*/\n  P_TCB p_new;\n\n  if (os_robin.task != os_rdy.p_lnk) {\n    /* New task was suspended, reset Round Robin timeout. */\n    os_robin.task = os_rdy.p_lnk;\n    os_robin.time = (U16)os_time + os_robin.tout - 1;\n  }\n  if (os_robin.time == (U16)os_time) {\n    /* Round Robin timeout has expired, swap Robin tasks. */\n    os_robin.task = NULL;\n    p_new = rt_get_first(&os_rdy);\n    rt_put_prio((P_XCB)&os_rdy, p_new);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Robin.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_ROBIN.H\n *      Purpose: Round Robin Task switching definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Variables */\nextern struct OS_ROBIN os_robin;\n\n/* Functions */\nextern void rt_init_robin (void);\nextern void rt_chk_robin  (void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Semaphore.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SEMAPHORE.C\n *      Purpose: Implements binary and counting semaphores\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Semaphore.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_sem_init -----------------------------------*/\n\nvoid rt_sem_init(OS_ID semaphore, U16 token_count) {\n  /* Initialize a semaphore */\n  P_SCB p_SCB = semaphore;\n\n  p_SCB->cb_type = SCB;\n  p_SCB->p_lnk = NULL;\n  p_SCB->tokens = token_count;\n}\n\n/*--------------------------- rt_sem_delete ---------------------------------*/\n\n#ifdef __CMSIS_RTOS\nOS_RESULT rt_sem_delete(OS_ID semaphore) {\n  /* Delete semaphore */\n  P_SCB p_SCB = semaphore;\n  P_TCB p_TCB;\n\n  while (p_SCB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_SCB);\n    rt_ret_val(p_TCB, 0);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n    rt_put_prio(&os_rdy, p_TCB);\n  }\n\n  if (os_rdy.p_lnk && (os_rdy.p_lnk->prio > os_tsk.run->prio)) {\n    /* preempt running task */\n    rt_put_prio(&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_dispatch(NULL);\n  }\n\n  p_SCB->cb_type = 0;\n\n  return (OS_R_OK);\n}\n#endif\n\n/*--------------------------- rt_sem_send -----------------------------------*/\n\nOS_RESULT rt_sem_send(OS_ID semaphore) {\n  /* Return a token to semaphore */\n  P_SCB p_SCB = semaphore;\n  P_TCB p_TCB;\n\n  if (p_SCB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_SCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 1);\n#else\n    rt_ret_val(p_TCB, OS_R_SEM);\n#endif\n    rt_rmv_dly(p_TCB);\n    rt_dispatch(p_TCB);\n  } else {\n    /* Store token. */\n    p_SCB->tokens++;\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_sem_wait -----------------------------------*/\n\nOS_RESULT rt_sem_wait(OS_ID semaphore, U16 timeout) {\n  /* Obtain a token; possibly wait for it */\n  P_SCB p_SCB = semaphore;\n\n  if (p_SCB->tokens) {\n    p_SCB->tokens--;\n    return (OS_R_OK);\n  }\n  /* No token available: wait for one */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  if (p_SCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_SCB, os_tsk.run);\n  } else {\n    p_SCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_SCB;\n  }\n  rt_block(timeout, WAIT_SEM);\n  return (OS_R_TMO);\n}\n\n/*--------------------------- isr_sem_send ----------------------------------*/\n\nvoid isr_sem_send(OS_ID semaphore) {\n  /* Same function as \"os_sem\"send\", but to be called by ISRs */\n  P_SCB p_SCB = semaphore;\n\n  rt_psq_enq(p_SCB, 0);\n  rt_psh_req();\n}\n\n/*--------------------------- rt_sem_psh ------------------------------------*/\n\nvoid rt_sem_psh(P_SCB p_CB) {\n  /* Check if task has to be waken up */\n  P_TCB p_TCB;\n\n  if (p_CB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_CB);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 1);\n#else\n    rt_ret_val(p_TCB, OS_R_SEM);\n#endif\n    rt_put_prio(&os_rdy, p_TCB);\n  } else {\n    /* Store token */\n    p_CB->tokens++;\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Semaphore.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SEMAPHORE.H\n *      Purpose: Implements binary and counting semaphores\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\nextern void      rt_sem_init  (OS_ID semaphore, U16 token_count);\nextern OS_RESULT rt_sem_delete(OS_ID semaphore);\nextern OS_RESULT rt_sem_send  (OS_ID semaphore);\nextern OS_RESULT rt_sem_wait  (OS_ID semaphore, U16 timeout);\nextern void      isr_sem_send (OS_ID semaphore);\nextern void      rt_sem_psh (P_SCB p_CB);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_System.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SYSTEM.C\n *      Purpose: System Task Manager\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_System.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_Event.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Mailbox.h\"\n#include \"rt_Robin.h\"\n#include \"rt_Semaphore.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\nint os_tick_irqn;\n\n/*----------------------------------------------------------------------------\n *      Local Variables\n *---------------------------------------------------------------------------*/\n\nstatic volatile BIT os_lock;\nstatic volatile BIT os_psh_flag;\nstatic U8 pend_flags;\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n#if defined(__CC_ARM)\n__asm void $$RTX$$version(void) {\n  /* Export a version number symbol for a version control. */\n\n  EXPORT __RL_RTX_VER\n\n      __RL_RTX_VER EQU 0x450\n}\n#endif\n\n/*--------------------------- rt_suspend ------------------------------------*/\nU32 rt_suspend(void) {\n  /* Suspend OS scheduler */\n  U32 delta = 0xFFFF;\n\n  rt_tsk_lock();\n\n  if (os_dly.p_dlnk) {\n    delta = os_dly.delta_time;\n  }\n#ifndef __CMSIS_RTOS\n  if (os_tmr.next) {\n    if (os_tmr.tcnt < delta)\n      delta = os_tmr.tcnt;\n  }\n#endif\n\n  return (delta);\n}\n\n/*--------------------------- rt_resume -------------------------------------*/\nvoid rt_resume(U32 sleep_time) {\n  /* Resume OS scheduler after suspend */\n  P_TCB next;\n  U32 delta;\n\n  os_tsk.run->state = READY;\n  rt_put_rdy_first(os_tsk.run);\n\n  os_robin.task = NULL;\n\n  /* Update delays. */\n  if (os_dly.p_dlnk) {\n    delta = sleep_time;\n    if (delta >= os_dly.delta_time) {\n      delta -= os_dly.delta_time;\n      os_time += os_dly.delta_time;\n      os_dly.delta_time = 1;\n      while (os_dly.p_dlnk) {\n        rt_dec_dly();\n        if (delta == 0)\n          break;\n        delta--;\n        os_time++;\n      }\n    } else {\n      os_time += delta;\n      os_dly.delta_time -= delta;\n    }\n  } else {\n    os_time += sleep_time;\n  }\n\n#ifndef __CMSIS_RTOS\n  /* Check the user timers. */\n  if (os_tmr.next) {\n    delta = sleep_time;\n    if (delta >= os_tmr.tcnt) {\n      delta -= os_tmr.tcnt;\n      os_tmr.tcnt = 1;\n      while (os_tmr.next) {\n        rt_tmr_tick();\n        if (delta == 0)\n          break;\n        delta--;\n      }\n    } else {\n      os_tmr.tcnt -= delta;\n    }\n  }\n#endif\n\n  /* Switch back to highest ready task */\n  next = rt_get_first(&os_rdy);\n  rt_switch_req(next);\n\n  rt_tsk_unlock();\n}\n\n/*--------------------------- rt_tsk_lock -----------------------------------*/\n\nvoid rt_tsk_lock(void) {\n  /* Prevent task switching by locking out scheduler */\n  OS_X_LOCK(os_tick_irqn);\n  os_lock = __TRUE;\n  OS_X_UNPEND(&pend_flags);\n}\n\n/*--------------------------- rt_tsk_unlock ---------------------------------*/\n\nvoid rt_tsk_unlock(void) {\n  /* Unlock scheduler and re-enable task switching */\n  OS_X_UNLOCK(os_tick_irqn);\n  os_lock = __FALSE;\n  OS_X_PEND(pend_flags, os_psh_flag);\n  os_psh_flag = __FALSE;\n}\n\n/*--------------------------- rt_psh_req ------------------------------------*/\n\nvoid rt_psh_req(void) {\n  /* Initiate a post service handling request if required. */\n  if (os_lock == __FALSE) {\n    OS_PEND_IRQ();\n  } else {\n    os_psh_flag = __TRUE;\n  }\n}\n\n/*--------------------------- rt_pop_req ------------------------------------*/\n\nvoid rt_pop_req(void) {\n  /* Process an ISR post service requests. */\n  struct OS_XCB *p_CB;\n  P_TCB next;\n  U32 idx;\n\n  os_tsk.run->state = READY;\n  rt_put_rdy_first(os_tsk.run);\n\n  idx = os_psq->last;\n  while (os_psq->count) {\n    p_CB = os_psq->q[idx].id;\n    if (p_CB->cb_type == TCB) {\n      /* Is of TCB type */\n      rt_evt_psh((P_TCB)p_CB, (U16)os_psq->q[idx].arg);\n    } else if (p_CB->cb_type == MCB) {\n      /* Is of MCB type */\n      rt_mbx_psh((P_MCB)p_CB, (void *)os_psq->q[idx].arg);\n    } else {\n      /* Must be of SCB type */\n      rt_sem_psh((P_SCB)p_CB);\n    }\n    if (++idx == os_psq->size)\n      idx = 0;\n    rt_dec(&os_psq->count);\n  }\n  os_psq->last = idx;\n\n  next = rt_get_first(&os_rdy);\n  rt_switch_req(next);\n}\n\n/*--------------------------- os_tick_init ----------------------------------*/\n\n__weak int os_tick_init(void) {\n  /* Initialize SysTick timer as system tick timer. */\n  rt_systick_init();\n  return (SYS_TICK_IRQn); /* Return IRQ number of SysTick timer */\n}\n\n/*--------------------------- os_tick_irqack --------------------------------*/\n\n__weak void os_tick_irqack(void) { /* Acknowledge timer interrupt. */\n}\n\n/*--------------------------- rt_systick ------------------------------------*/\n\nextern void sysTimerTick(void);\n\nvoid rt_systick(void) {\n  if (NVIC_Pending(SYS_TICK_IRQn)) {\n    rt_pop_req();\n    NVIC_UnpendIRQ(SYS_TICK_IRQn);\n    SYS_TICK_TIMER->IR = 0xF; // clear timer interrupt\n    return;\n  }\n  /* Check for system clock update, suspend running task. */\n  P_TCB next;\n\n  os_tsk.run->state = READY;\n  rt_put_rdy_first(os_tsk.run);\n\n  /* Check Round Robin timeout. */\n  rt_chk_robin();\n\n  /* Update delays. */\n  os_time++;\n  rt_dec_dly();\n\n  /* Check the user timers. */\n#ifdef __CMSIS_RTOS\n  sysTimerTick();\n#else\n  rt_tmr_tick();\n#endif\n\n  /* Switch back to highest ready task */\n  next = rt_get_first(&os_rdy);\n  rt_switch_req(next);\n  SYS_TICK_TIMER->IR = 0xF; // clear timer interrupt\n}\n\n/*--------------------------- rt_stk_check ----------------------------------*/\n__weak void rt_stk_check(void) {\n  /* Check for stack overflow. */\n  if (os_tsk.run->task_id == 0x01) {\n    // TODO: For the main thread the check should be done against the main heap\n    // pointer\n  } else {\n    if ((os_tsk.run->tsk_stack < (U32)os_tsk.run->stack) ||\n        (os_tsk.run->stack[0] != MAGIC_WORD)) {\n      os_error(OS_ERR_STK_OVF);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_System.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SYSTEM.H\n *      Purpose: System Task Manager definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Variables */\n#define os_psq  ((P_PSQ)&os_fifo)\nextern int os_tick_irqn;\n\n/* Functions */\nextern U32  rt_suspend    (void);\nextern void rt_resume     (U32 sleep_time);\nextern void rt_tsk_lock   (void);\nextern void rt_tsk_unlock (void);\nextern void rt_psh_req    (void);\nextern void rt_pop_req    (void);\nextern void rt_systick    (void);\nextern void rt_stk_check  (void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Task.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TASK.C\n *      Purpose: Task functions and system start up.\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Task.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_Robin.h\"\n#include \"rt_System.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* Running and next task info. */\nstruct OS_TSK os_tsk;\n\n/* Task Control Blocks of idle demon */\nstruct OS_TCB os_idle_TCB;\n\n/*----------------------------------------------------------------------------\n *      Local Functions\n *---------------------------------------------------------------------------*/\n\nOS_TID rt_get_TID(void) {\n  U32 tid;\n\n  for (tid = 1; tid <= os_maxtaskrun; tid++) {\n    if (os_active_TCB[tid - 1] == NULL) {\n      return ((OS_TID)tid);\n    }\n  }\n  return (0);\n}\n\n#if defined(__CC_ARM) && !defined(__MICROLIB)\n/*--------------------------- __user_perthread_libspace ---------------------*/\nextern void *__libspace_start;\n\nvoid *__user_perthread_libspace(void) {\n  /* Provide a separate libspace for each task. */\n  if (os_tsk.run == NULL) {\n    /* RTX not running yet. */\n    return (&__libspace_start);\n  }\n  return (void *)(os_tsk.run->std_libspace);\n}\n#endif\n\n/*--------------------------- rt_init_context -------------------------------*/\n\nvoid rt_init_context(P_TCB p_TCB, U8 priority, FUNCP task_body) {\n  /* Initialize general part of the Task Control Block. */\n  p_TCB->cb_type = TCB;\n  p_TCB->state = READY;\n  p_TCB->prio = priority;\n  p_TCB->p_lnk = NULL;\n  p_TCB->p_rlnk = NULL;\n  p_TCB->p_dlnk = NULL;\n  p_TCB->p_blnk = NULL;\n  p_TCB->delta_time = 0;\n  p_TCB->interval_time = 0;\n  p_TCB->events = 0;\n  p_TCB->waits = 0;\n  p_TCB->stack_frame = 0;\n\n  rt_init_stack(p_TCB, task_body);\n}\n\n/*--------------------------- rt_switch_req ---------------------------------*/\n\nvoid rt_switch_req(P_TCB p_new) {\n  /* Switch to next task (identified by \"p_new\"). */\n  os_tsk.new_tsk = p_new;\n  p_new->state = RUNNING;\n  DBG_TASK_SWITCH(p_new->task_id);\n}\n\n/*--------------------------- rt_dispatch -----------------------------------*/\n\nvoid rt_dispatch(P_TCB next_TCB) {\n  /* Dispatch next task if any identified or dispatch highest ready task    */\n  /* \"next_TCB\" identifies a task to run or has value NULL (=no next task)  */\n  if (next_TCB == NULL) {\n    /* Running task was blocked: continue with highest ready task */\n    next_TCB = rt_get_first(&os_rdy);\n    rt_switch_req(next_TCB);\n  } else {\n    /* Check which task continues */\n    if (next_TCB->prio > os_tsk.run->prio) {\n      /* preempt running task */\n      rt_put_rdy_first(os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_switch_req(next_TCB);\n    } else {\n      /* put next task into ready list, no task switch takes place */\n      next_TCB->state = READY;\n      rt_put_prio(&os_rdy, next_TCB);\n    }\n  }\n}\n\n/*--------------------------- rt_block --------------------------------------*/\n\nvoid rt_block(U16 timeout, U8 block_state) {\n  /* Block running task and choose next ready task.                         */\n  /* \"timeout\" sets a time-out value or is 0xffff (=no time-out).           */\n  /* \"block_state\" defines the appropriate task state */\n  P_TCB next_TCB;\n\n  if (timeout) {\n    if (timeout < 0xffff) {\n      rt_put_dly(os_tsk.run, timeout);\n    }\n    os_tsk.run->state = block_state;\n    next_TCB = rt_get_first(&os_rdy);\n    rt_switch_req(next_TCB);\n  }\n}\n\n/*--------------------------- rt_tsk_pass -----------------------------------*/\n\nvoid rt_tsk_pass(void) {\n  /* Allow tasks of same priority level to run cooperatively.*/\n  P_TCB p_new;\n\n  p_new = rt_get_same_rdy_prio();\n  if (p_new != NULL) {\n    rt_put_prio((P_XCB)&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_switch_req(p_new);\n  }\n}\n\n/*--------------------------- rt_tsk_self -----------------------------------*/\n\nOS_TID rt_tsk_self(void) {\n  /* Return own task identifier value. */\n  if (os_tsk.run == NULL) {\n    return (0);\n  }\n  return (os_tsk.run->task_id);\n}\n\n/*--------------------------- rt_tsk_prio -----------------------------------*/\n\nOS_RESULT rt_tsk_prio(OS_TID task_id, U8 new_prio) {\n  /* Change execution priority of a task to \"new_prio\". */\n  P_TCB p_task;\n\n  if (task_id == 0) {\n    /* Change execution priority of calling task. */\n    os_tsk.run->prio = new_prio;\n  run:\n    if (rt_rdy_prio() > new_prio) {\n      rt_put_prio(&os_rdy, os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_dispatch(NULL);\n    }\n    return (OS_R_OK);\n  }\n\n  /* Find the task in the \"os_active_TCB\" array. */\n  if (task_id > os_maxtaskrun || os_active_TCB[task_id - 1] == NULL) {\n    /* Task with \"task_id\" not found or not started. */\n    return (OS_R_NOK);\n  }\n  p_task = os_active_TCB[task_id - 1];\n  p_task->prio = new_prio;\n  if (p_task == os_tsk.run) {\n    goto run;\n  }\n  rt_resort_prio(p_task);\n  if (p_task->state == READY) {\n    /* Task enqueued in a ready list. */\n    p_task = rt_get_first(&os_rdy);\n    rt_dispatch(p_task);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_tsk_delete ---------------------------------*/\n\nOS_RESULT rt_tsk_delete(OS_TID task_id) {\n  /* Terminate the task identified with \"task_id\". */\n  P_TCB task_context;\n\n  if (task_id == 0 || task_id == os_tsk.run->task_id) {\n    /* Terminate itself. */\n    os_tsk.run->state = INACTIVE;\n    os_tsk.run->tsk_stack = 0;\n    rt_stk_check();\n    os_active_TCB[os_tsk.run->task_id - 1] = NULL;\n\n    os_tsk.run->stack = NULL;\n    DBG_TASK_NOTIFY(os_tsk.run, __FALSE);\n    os_tsk.run = NULL;\n    rt_dispatch(NULL);\n    /* The program should never come to this point. */\n  } else {\n    /* Find the task in the \"os_active_TCB\" array. */\n    if (task_id > os_maxtaskrun || os_active_TCB[task_id - 1] == NULL) {\n      /* Task with \"task_id\" not found or not started. */\n      return (OS_R_NOK);\n    }\n    task_context = os_active_TCB[task_id - 1];\n    rt_rmv_list(task_context);\n    rt_rmv_dly(task_context);\n    os_active_TCB[task_id - 1] = NULL;\n\n    task_context->stack = NULL;\n    DBG_TASK_NOTIFY(task_context, __FALSE);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_sys_init -----------------------------------*/\n\n#ifdef __CMSIS_RTOS\nvoid rt_sys_init(void) {\n#else\nvoid rt_sys_init(FUNCP first_task, U32 prio_stksz, void *stk) {\n#endif\n  /* Initialize system and start up task declared with \"first_task\". */\n  U32 i;\n\n  DBG_INIT();\n\n  /* Initialize dynamic memory and task TCB pointers to NULL. */\n  for (i = 0; i < os_maxtaskrun; i++) {\n    os_active_TCB[i] = NULL;\n  }\n\n  /* Set up TCB of idle demon */\n  os_idle_TCB.task_id = 255;\n  os_idle_TCB.priv_stack = idle_task_stack_size;\n  os_idle_TCB.stack = idle_task_stack;\n  rt_init_context(&os_idle_TCB, 0, os_idle_demon);\n\n  /* Set up ready list: initially empty */\n  os_rdy.cb_type = HCB;\n  os_rdy.p_lnk = NULL;\n  /* Set up delay list: initially empty */\n  os_dly.cb_type = HCB;\n  os_dly.p_dlnk = NULL;\n  os_dly.p_blnk = NULL;\n  os_dly.delta_time = 0;\n\n  /* Fix SP and systemvariables to assume idle task is running  */\n  /* Transform main program into idle task by assuming idle TCB */\n#ifndef __CMSIS_RTOS\n  rt_set_PSP(os_idle_TCB.tsk_stack);\n#endif\n  os_tsk.run = &os_idle_TCB;\n  os_tsk.run->state = RUNNING;\n\n  /* Initialize ps queue */\n  os_psq->first = 0;\n  os_psq->last = 0;\n  os_psq->size = os_fifo_size;\n\n  rt_init_robin();\n\n  /* Intitialize SVC and PendSV */\n  rt_svc_init();\n\n#ifndef __CMSIS_RTOS\n  /* Intitialize and start system clock timer */\n  os_tick_irqn = os_tick_init();\n  if (os_tick_irqn >= 0) {\n    OS_X_INIT(os_tick_irqn);\n  }\n\n  /* Start up first user task before entering the endless loop */\n  rt_tsk_create(first_task, prio_stksz, stk, NULL);\n#endif\n}\n\n/*--------------------------- rt_sys_start ----------------------------------*/\n\n#ifdef __CMSIS_RTOS\nvoid rt_sys_start(void) {\n  /* Start system */\n\n  /* Intitialize and start system clock timer */\n  os_tick_irqn = os_tick_init();\n  if (os_tick_irqn >= 0) {\n    OS_X_INIT(os_tick_irqn);\n  }\n  extern void RestoreContext();\n  RestoreContext(); // Start the first task\n}\n#endif\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Task.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TASK.H\n *      Purpose: Task functions and system start up.\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Definitions */\n#define __CMSIS_RTOS    1\n\n/* Values for 'state'   */\n#define INACTIVE        0\n#define READY           1\n#define RUNNING         2\n#define WAIT_DLY        3\n#define WAIT_ITV        4\n#define WAIT_OR         5\n#define WAIT_AND        6\n#define WAIT_SEM        7\n#define WAIT_MBX        8\n#define WAIT_MUT        9\n\n/* Return codes */\n#define OS_R_TMO        0x01\n#define OS_R_EVT        0x02\n#define OS_R_SEM        0x03\n#define OS_R_MBX        0x04\n#define OS_R_MUT        0x05\n\n#define OS_R_OK         0x00\n#define OS_R_NOK        0xff\n\n/* Variables */\nextern struct OS_TSK os_tsk;\nextern struct OS_TCB os_idle_TCB;\n\n/* Functions */\nextern void      rt_switch_req (P_TCB p_new);\nextern void      rt_dispatch   (P_TCB next_TCB);\nextern void      rt_block      (U16 timeout, U8 block_state);\nextern void      rt_tsk_pass   (void);\nextern OS_TID    rt_tsk_self   (void);\nextern OS_RESULT rt_tsk_prio   (OS_TID task_id, U8 new_prio);\nextern OS_RESULT rt_tsk_delete (OS_TID task_id);\nextern void      rt_sys_init   (void);\nextern void      rt_sys_start  (void);\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Time.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TIME.C\n *      Purpose: Delay and interval wait functions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Time.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* Free running system tick counter */\nU32 os_time;\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_time_get -----------------------------------*/\n\nU32 rt_time_get(void) {\n  /* Get system time tick */\n  return (os_time);\n}\n\n/*--------------------------- rt_dly_wait -----------------------------------*/\n\nvoid rt_dly_wait(U16 delay_time) {\n  /* Delay task by \"delay_time\" */\n  rt_block(delay_time, WAIT_DLY);\n}\n\n/*--------------------------- rt_itv_set ------------------------------------*/\n\nvoid rt_itv_set(U16 interval_time) {\n  /* Set interval length and define start of first interval */\n  os_tsk.run->interval_time = interval_time;\n  os_tsk.run->delta_time = interval_time + (U16)os_time;\n}\n\n/*--------------------------- rt_itv_wait -----------------------------------*/\n\nvoid rt_itv_wait(void) {\n  /* Wait for interval end and define start of next one */\n  U16 delta;\n\n  delta = os_tsk.run->delta_time - (U16)os_time;\n  os_tsk.run->delta_time += os_tsk.run->interval_time;\n  if ((delta & 0x8000) == 0) {\n    rt_block(delta, WAIT_ITV);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_Time.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TIME.H\n *      Purpose: Delay and interval wait functions definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Variables */\nextern U32 os_time;\n\n/* Functions */\nextern U32  rt_time_get (void);\nextern void rt_dly_wait (U16 delay_time);\nextern void rt_itv_set  (U16 interval_time);\nextern void rt_itv_wait (void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_ARM7/rt_TypeDef.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TYPEDEF.H\n *      Purpose: Type Definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#ifndef RT_TYPE_DEF_H\n#define RT_TYPE_DEF_H\n\n#include \"os_tcb.h\"\n\ntypedef U32     OS_TID;\ntypedef void    *OS_ID;\ntypedef U32     OS_RESULT;\n\n#define TCB_STACKF      32        /* 'stack_frame' offset                    */\n#define TCB_TSTACK      40        /* 'tsk_stack' offset                      */\n\ntypedef struct OS_PSFE {          /* Post Service Fifo Entry                 */\n  void  *id;                      /* Object Identification                   */\n  U32    arg;                     /* Object Argument                         */\n} *P_PSFE;\n\ntypedef struct OS_PSQ {           /* Post Service Queue                      */\n  U8     first;                   /* FIFO Head Index                         */\n  U8     last;                    /* FIFO Tail Index                         */\n  U8     count;                   /* Number of stored items in FIFO          */\n  U8     size;                    /* FIFO Size                               */\n  struct OS_PSFE q[1];            /* FIFO Content                            */\n} *P_PSQ;\n\ntypedef struct OS_TSK {\n  P_TCB  run;                     /* Current running task                    */\n  P_TCB  new_tsk;                 /* Scheduled task to run                   */\n} *P_TSK;\n\ntypedef struct OS_ROBIN {         /* Round Robin Control                     */\n  P_TCB  task;                    /* Round Robin task                        */\n  U16    time;                    /* Round Robin switch time                 */\n  U16    tout;                    /* Round Robin timeout                     */\n} *P_ROBIN;\n\ntypedef struct OS_XCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  struct OS_TCB *p_lnk;           /* Link pointer for ready/sem. wait list   */\n  struct OS_TCB *p_rlnk;          /* Link pointer for sem./mbx lst backwards */\n  struct OS_TCB *p_dlnk;          /* Link pointer for delay list             */\n  struct OS_TCB *p_blnk;          /* Link pointer for delay list backwards   */\n  U16    delta_time;              /* Time until time out                     */\n} *P_XCB;\n\ntypedef struct OS_MCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     state;                   /* State flag variable                     */\n  U8     isr_st;                  /* State flag variable for isr functions   */\n  struct OS_TCB *p_lnk;           /* Chain of tasks waiting for message      */\n  U16    first;                   /* Index of the message list begin         */\n  U16    last;                    /* Index of the message list end           */\n  U16    count;                   /* Actual number of stored messages        */\n  U16    size;                    /* Maximum number of stored messages       */\n  void   *msg[1];                 /* FIFO for Message pointers 1st element   */\n} *P_MCB;\n\ntypedef struct OS_SCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     mask;                    /* Semaphore token mask                    */\n  U16    tokens;                  /* Semaphore tokens                        */\n  struct OS_TCB *p_lnk;           /* Chain of tasks waiting for tokens       */\n} *P_SCB;\n\ntypedef struct OS_MUCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     prio;                    /* Owner task default priority             */\n  U16    level;                   /* Call nesting level                      */\n  struct OS_TCB *p_lnk;           /* Chain of tasks waiting for mutex        */\n  struct OS_TCB *owner;           /* Mutex owner task                        */\n} *P_MUCB;\n\ntypedef struct OS_XTMR {\n  struct OS_TMR  *next;\n  U16    tcnt;\n} *P_XTMR;\n\ntypedef struct OS_TMR {\n  struct OS_TMR  *next;           /* Link pointer to Next timer              */\n  U16    tcnt;                    /* Timer delay count                       */\n  U16    info;                    /* User defined call info                  */\n} *P_TMR;\n\ntypedef struct OS_BM {\n  void *free;                     /* Pointer to first free memory block      */\n  void *end;                      /* Pointer to memory block end             */\n  U32  blk_size;                  /* Memory block size                       */\n} *P_BM;\n\n/* Definitions */\n#define __TRUE          1\n#define __FALSE         0\n#define NULL            ((void *) 0)\n\n#endif\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/HAL_CA.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CA.C\n *      Purpose: Hardware Abstraction Layer for Cortex-A\n *      Rev.:\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 2012 ARM Limited\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_Config.h\"\n#include \"rt_HAL_CA.h\"\n#include \"rt_TypeDef.h\"\n\n/*--------------------------- os_init_context -------------------------------*/\n\nvoid rt_init_stack(P_TCB p_TCB, FUNCP task_body) {\n  /* Prepare TCB and saved context for a first time start of a task. */\n  U32 *stk, i, size;\n\n  /* Prepare a complete interrupt frame for first task start */\n  size = p_TCB->priv_stack >> 2;\n  if (size == 0) {\n    size = (U16)os_stackinfo >> 2;\n  }\n  /* Write to the top of stack. */\n  stk = &p_TCB->stack[size];\n\n  /* Auto correct to 8-byte ARM stack alignment. */\n  if ((U32)stk & 0x04) {\n    stk--;\n  }\n\n  stk -= 16;\n\n  /* Initial PC and default CPSR */\n  stk[14] = (U32)task_body;\n  /* Task run mode is inherited from the startup file. */\n  /*  (non-privileged USER or privileged SYSTEM mode)  */\n  stk[15] = (os_flags & 1) ? INIT_CPSR_SYS : INIT_CPSR_USER;\n  /* Set T-bit if task function in Thumb mode. */\n  if ((U32)task_body & 1) {\n    stk[15] |= CPSR_T_BIT;\n  }\n  /* Assign a void pointer to R0. */\n  stk[8] = (U32)p_TCB->msg;\n  /* Clear R1-R12,LR registers. */\n  for (i = 0; i < 8; i++) {\n    stk[i] = 0;\n  }\n  for (i = 9; i < 14; i++) {\n    stk[i] = 0;\n  }\n\n  /* Initial Task stack pointer. */\n  p_TCB->tsk_stack = (U32)stk;\n\n  /* Task entry point. */\n  p_TCB->ptask = task_body;\n\n  /* Set a magic word for checking of stack overflow. */\n  p_TCB->stack[0] = MAGIC_WORD;\n}\n\n/*--------------------------- rt_ret_val ----------------------------------*/\n\nstatic __inline U32 *rt_ret_regs(P_TCB p_TCB) {\n  /* Get pointer to task return value registers (R0..R3) in Stack */\n#if (__TARGET_FPU_VFP)\n  if (p_TCB->stack_frame & 0x2) {\n    /* Extended Stack Frame: S0-31,FPSCR,Reserved,R4-R11,R0-R3,R12,LR,PC,xPSR */\n    return (U32 *)(p_TCB->tsk_stack + 8 * 4 + 34 * 4);\n  } else {\n    /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */\n    return (U32 *)(p_TCB->tsk_stack + 8 * 4);\n  }\n#else\n  /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */\n  return (U32 *)(p_TCB->tsk_stack + 8 * 4);\n#endif\n}\n\nvoid rt_ret_val(P_TCB p_TCB, U32 v0) {\n  U32 *ret;\n\n  ret = rt_ret_regs(p_TCB);\n  ret[0] = v0;\n}\n\nvoid rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {\n  U32 *ret;\n\n  ret = rt_ret_regs(p_TCB);\n  ret[0] = v0;\n  ret[1] = v1;\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/RTX_CM_lib.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_CM_LIB.H\n *      Purpose: RTX Kernel System Configuration\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#if   defined (__CC_ARM)\n#pragma O3\n#define __USED __attribute__((used))\n#elif defined (__GNUC__)\n#pragma GCC optimize (\"O3\")\n#define __USED __attribute__((used))\n#elif defined (__ICCARM__)\n#define __USED __root\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Definitions\n *---------------------------------------------------------------------------*/\n\n#define _declare_box(pool,size,cnt)  uint32_t pool[(((size)+3)/4)*(cnt) + 3]\n#define _declare_box8(pool,size,cnt) uint64_t pool[(((size)+7)/8)*(cnt) + 2]\n\n#define OS_TCB_SIZE     48\n#define OS_TMR_SIZE     8\n\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n\ntypedef void    *OS_ID;\ntypedef uint32_t OS_TID;\ntypedef uint32_t OS_MUT[3];\ntypedef uint32_t OS_RESULT;\n\n#define runtask_id()    rt_tsk_self()\n#define mutex_init(m)   rt_mut_init(m)\n#define mutex_wait(m)   os_mut_wait(m,0xFFFF)\n#define mutex_rel(m)    os_mut_release(m)\n\nextern OS_TID    rt_tsk_self    (void);\nextern void      rt_mut_init    (OS_ID mutex);\nextern OS_RESULT rt_mut_release (OS_ID mutex);\nextern OS_RESULT rt_mut_wait    (OS_ID mutex, uint16_t timeout);\n\n#define os_mut_wait(mutex,timeout) _os_mut_wait((uint32_t)rt_mut_wait,mutex,timeout)\n#define os_mut_release(mutex)      _os_mut_release((uint32_t)rt_mut_release,mutex)\n\nOS_RESULT _os_mut_release (uint32_t p, OS_ID mutex)                   __svc_indirect(0);\nOS_RESULT _os_mut_wait    (uint32_t p, OS_ID mutex, uint16_t timeout) __svc_indirect(0);\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n#if (OS_TIMERS != 0)\n#define OS_TASK_CNT (OS_TASKCNT + 1)\n#ifndef __MBED_CMSIS_RTOS_CA9\n#define OS_PRIV_CNT (OS_PRIVCNT + 2)\n#define OS_STACK_SZ (4*(OS_PRIVSTKSIZE+OS_MAINSTKSIZE+OS_TIMERSTKSZ))\n#endif\n#else\n#define OS_TASK_CNT  OS_TASKCNT\n#ifndef __MBED_CMSIS_RTOS_CA9\n#define OS_PRIV_CNT (OS_PRIVCNT + 1)\n#define OS_STACK_SZ (4*(OS_PRIVSTKSIZE+OS_MAINSTKSIZE))\n#endif\n#endif\n\nuint16_t const os_maxtaskrun = OS_TASK_CNT;\n#ifdef __MBED_CMSIS_RTOS_CA9\nuint32_t const os_stackinfo  = (OS_STKCHECK<<24)| (OS_IDLESTKSIZE*4);\n#else\nuint32_t const os_stackinfo  = (OS_STKCHECK<<24)| (OS_PRIV_CNT<<16) | (OS_STKSIZE*4);\n#endif\nuint32_t const os_rrobin     = (OS_ROBIN << 16) | OS_ROBINTOUT;\nuint32_t const os_trv        = OS_TRV;\nuint8_t  const os_flags      = OS_RUNPRIV;\n\n/* Export following defines to uVision debugger. */\n__USED uint32_t const os_clockrate = OS_TICK;\n__USED uint32_t const os_timernum  = 0;\n\n/* Memory pool for TCB allocation    */\n_declare_box  (mp_tcb, OS_TCB_SIZE, OS_TASK_CNT);\nuint16_t const mp_tcb_size = sizeof(mp_tcb);\n\n#ifdef __MBED_CMSIS_RTOS_CA9\n/* Memory pool for os_idle_demon stack allocation. */\n_declare_box8 (mp_stk, OS_IDLESTKSIZE*4, 1);\nuint32_t const mp_stk_size = sizeof(mp_stk);\n#else\n/* Memory pool for System stack allocation (+os_idle_demon). */\n_declare_box8 (mp_stk, OS_STKSIZE*4, OS_TASK_CNT-OS_PRIV_CNT+1);\nuint32_t const mp_stk_size = sizeof(mp_stk);\n\n/* Memory pool for user specified stack allocation (+main, +timer) */\nuint64_t       os_stack_mem[2+OS_PRIV_CNT+(OS_STACK_SZ/8)];\nuint32_t const os_stack_sz = sizeof(os_stack_mem);\n#endif\n\n#ifndef OS_FIFOSZ\n #define OS_FIFOSZ      16\n#endif\n\n/* Fifo Queue buffer for ISR requests.*/\nuint32_t       os_fifo[OS_FIFOSZ*2+1];\nuint8_t  const os_fifo_size = OS_FIFOSZ;\n\n/* An array of Active task pointers. */\nvoid *os_active_TCB[OS_TASK_CNT];\n\n/* User Timers Resources */\n#if (OS_TIMERS != 0)\nextern void osTimerThread (void const *argument);\n#ifdef __MBED_CMSIS_RTOS_CA9\nosThreadDef(osTimerThread, (osPriority)(OS_TIMERPRIO-3), 4*OS_TIMERSTKSZ);\n#else\nosThreadDef(osTimerThread, (osPriority)(OS_TIMERPRIO-3), 1, 4*OS_TIMERSTKSZ);\n#endif\nosThreadId osThreadId_osTimerThread;\nosMessageQDef(osTimerMessageQ, OS_TIMERCBQS, void *);\nosMessageQId osMessageQId_osTimerMessageQ;\n#else\nosThreadDef_t os_thread_def_osTimerThread = { NULL };\nosThreadId osThreadId_osTimerThread;\nosMessageQDef(osTimerMessageQ, 0, void *);\nosMessageQId osMessageQId_osTimerMessageQ;\n#endif\n\n/* Legacy RTX User Timers not used */\nuint32_t       os_tmr = 0;\nuint32_t const *m_tmr = NULL;\nuint16_t const mp_tmr_size = 0;\n\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n /* A memory space for arm standard library. */\n static uint32_t std_libspace[OS_TASK_CNT][96/4];\n static OS_MUT   std_libmutex[OS_MUTEXCNT];\n static uint32_t nr_mutex;\n extern void  *__libspace_start;\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      RTX Optimizations (empty functions)\n *---------------------------------------------------------------------------*/\n\n#if OS_ROBIN == 0\n void rt_init_robin (void) {;}\n void rt_chk_robin  (void) {;}\n#endif\n\n#if OS_STKCHECK == 0\n void rt_stk_check  (void) {;}\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Standard Library multithreading interface\n *---------------------------------------------------------------------------*/\n\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n\n/*--------------------------- __user_perthread_libspace ---------------------*/\n\nvoid *__user_perthread_libspace (void) {\n  /* Provide a separate libspace for each task. */\n  uint32_t idx;\n\n  idx = runtask_id ();\n  if (idx == 0) {\n    /* RTX not running yet. */\n    return (&__libspace_start);\n  }\n  return ((void *)&std_libspace[idx-1]);\n}\n\n/*--------------------------- _mutex_initialize -----------------------------*/\n\nint _mutex_initialize (OS_ID *mutex) {\n  /* Allocate and initialize a system mutex. */\n\n  if (nr_mutex >= OS_MUTEXCNT) {\n    /* If you are here, you need to increase the number OS_MUTEXCNT. */\n    for (;;);\n  }\n  *mutex = &std_libmutex[nr_mutex++];\n  mutex_init (*mutex);\n  return (1);\n}\n\n\n/*--------------------------- _mutex_acquire --------------------------------*/\n\n__attribute__((used)) void _mutex_acquire (OS_ID *mutex) {\n  /* Acquire a system mutex, lock stdlib resources. */\n  if (runtask_id ()) {\n    /* RTX running, acquire a mutex. */\n    mutex_wait (*mutex);\n  }\n}\n\n\n/*--------------------------- _mutex_release --------------------------------*/\n\n__attribute__((used)) void _mutex_release (OS_ID *mutex) {\n  /* Release a system mutex, unlock stdlib resources. */\n  if (runtask_id ()) {\n    /* RTX running, release a mutex. */\n    mutex_rel (*mutex);\n  }\n}\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      RTX Startup\n *---------------------------------------------------------------------------*/\n\n/* Main Thread definition */\nextern int main (void);\n#ifdef __MBED_CMSIS_RTOS_CA9\nuint32_t os_thread_def_stack_main [(4 * OS_MAINSTKSIZE) / sizeof(uint32_t)];\nosThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 1, 4*OS_MAINSTKSIZE, os_thread_def_stack_main };\n#else\nosThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 1, 4*OS_MAINSTKSIZE };\n#endif\n\n\n#if defined (__CC_ARM)\n\n#ifdef __MICROLIB\nvoid _main_init (void) __attribute__((section(\".ARM.Collect$$$$000000FF\")));\n#if __TARGET_ARCH_ARM\n#pragma push\n#pragma arm\n#endif\nvoid _main_init (void) {\n  osKernelInitialize();\n  osThreadCreate(&os_thread_def_main, NULL);\n  osKernelStart();\n  for (;;);\n}\n#if __TARGET_ARCH_ARM\n#pragma pop\n#endif\n#else\n__asm void __rt_entry (void) {\n\n  IMPORT  __user_setup_stackheap\n  IMPORT  __rt_lib_init\n  IMPORT  os_thread_def_main\n  IMPORT  osKernelInitialize\n  IMPORT  osKernelStart\n  IMPORT  osThreadCreate\n  IMPORT  exit\n\n  BL      __user_setup_stackheap\n  MOV     R1,R2\n  BL      __rt_lib_init\n  BL      osKernelInitialize\n  LDR     R0,=os_thread_def_main\n  MOVS    R1,#0\n  BL      osThreadCreate\n  BL      osKernelStart\n  BL      exit\n\n  ALIGN\n}\n#endif\n\n#elif defined (__GNUC__)\n\n#ifdef __CS3__\n\n/* CS3 start_c routine.\n *\n * Copyright (c) 2006, 2007 CodeSourcery Inc\n *\n * The authors hereby grant permission to use, copy, modify, distribute,\n * and license this software and its documentation for any purpose, provided\n * that existing copyright notices are retained in all copies and that this\n * notice is included verbatim in any distributions. No written agreement,\n * license, or royalty fee is required for any of the authorized uses.\n * Modifications to this software may be copyrighted by their authors\n * and need not follow the licensing terms described here, provided that\n * the new terms are clearly indicated on the first page of each file where\n * they apply.\n */\n\n#include \"cs3.h\"\n\nextern void __libc_init_array (void);\n\n__attribute ((noreturn)) void __cs3_start_c (void){\n  unsigned regions = __cs3_region_num;\n  const struct __cs3_region *rptr = __cs3_regions;\n\n  /* Initialize memory */\n  for (regions = __cs3_region_num, rptr = __cs3_regions; regions--; rptr++) {\n    long long *src = (long long *)rptr->init;\n    long long *dst = (long long *)rptr->data;\n    unsigned limit = rptr->init_size;\n    unsigned count;\n\n    if (src != dst)\n      for (count = 0; count != limit; count += sizeof (long long))\n        *dst++ = *src++;\n    else\n      dst = (long long *)((char *)dst + limit);\n    limit = rptr->zero_size;\n    for (count = 0; count != limit; count += sizeof (long long))\n      *dst++ = 0;\n  }\n\n  /* Run initializers.  */\n  __libc_init_array ();\n\n  osKernelInitialize();\n  osThreadCreate(&os_thread_def_main, NULL);\n  osKernelStart();\n  for (;;);\n}\n\n#else\n\n__attribute__((naked)) void software_init_hook (void) {\n  __asm (\n    \".syntax unified\\n\"\n    \".arm\\n\"\n    \"movs r0,#0\\n\"\n    \"movs r1,#0\\n\"\n    \"mov  r4,r0\\n\"\n    \"mov  r5,r1\\n\"\n    \"ldr  r0,= __libc_fini_array\\n\"\n    \"bl   atexit\\n\"\n    \"bl   __libc_init_array\\n\"\n    \"mov  r0,r4\\n\"\n    \"mov  r1,r5\\n\"\n    \"bl   osKernelInitialize\\n\"\n    \"ldr  r0,=os_thread_def_main\\n\"\n    \"movs r1,#0\\n\"\n    \"bl   osThreadCreate\\n\"\n    \"bl   osKernelStart\\n\"\n    \"bl   exit\\n\"\n  );\n}\n\n#endif\n\n#elif defined (__ICCARM__)\n\nextern int  __low_level_init(void);\nextern void __iar_data_init3(void);\nextern void exit(int arg);\n\n__noreturn __stackless void __cmain(void) {\n  int a;\n\n  if (__low_level_init() != 0) {\n    __iar_data_init3();\n  }\n  osKernelInitialize();\n  osThreadCreate(&os_thread_def_main, NULL);\n  a = osKernelStart();\n  exit(a);\n}\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/RTX_Conf_CA.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_Conf_CM.C\n *      Purpose: Configuration of CMSIS RTX Kernel\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"cmsis_os.h\"\n\n/*----------------------------------------------------------------------------\n *      RTX User configuration part BEGIN\n *---------------------------------------------------------------------------*/\n\n//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------\n//\n// Thread Configuration\n// =======================\n//\n//   Number of concurrent running threads <0-250>\n//    Defines max. number of threads that will run at the same time.\n//    Default: 6\n#ifndef OS_TASKCNT\n#define OS_TASKCNT 25\n#endif\n\n#ifdef __MBED_CMSIS_RTOS_CA9\n//   Idle stack size [bytes] <64-4096:8><#/4>\n//    Defines default stack size for the Idle thread.\n#ifndef OS_IDLESTKSIZE\n#define OS_IDLESTKSIZE 128\n#endif\n#else // __MBED_CMSIS_RTOS_CA9\n//   Default Thread stack size [bytes] <64-4096:8><#/4>\n//    Defines default stack size for threads with osThreadDef stacksz = 0\n//    Default: 200\n#ifndef OS_STKSIZE\n#define OS_STKSIZE 200\n#endif\n#endif // __MBED_CMSIS_RTOS_CA9\n\n//   Main Thread stack size [bytes] <64-4096:8><#/4>\n//    Defines stack size for main thread.\n//    Default: 200\n#ifndef OS_MAINSTKSIZE\n#define OS_MAINSTKSIZE 2048\n#endif\n\n#ifndef __MBED_CMSIS_RTOS_CA9\n//   Number of threads with user-provided stack size <0-250>\n//    Defines the number of threads with user-provided stack size.\n//    Default: 0\n#ifndef OS_PRIVCNT\n#define OS_PRIVCNT 0\n#endif\n\n//   Total stack size [bytes] for threads with user-provided stack size\n//   <0-4096:8><#/4>  Defines the combined stack size for threads with\n//   user-provided stack size.  Default: 0\n#ifndef OS_PRIVSTKSIZE\n#define OS_PRIVSTKSIZE 0\n#endif\n#endif // __MBED_CMSIS_RTOS_CA9\n\n// Check for stack overflow\n//  Includes the stack checking code for stack overflow.\n//  Note that additional code reduces the Kernel performance.\n#ifndef OS_STKCHECK\n#define OS_STKCHECK 1\n#endif\n\n// Processor mode for thread execution\n//   <0=> Unprivileged mode\n//   <1=> Privileged mode\n//  Default: Privileged mode\n#ifndef OS_RUNPRIV\n#define OS_RUNPRIV 1\n#endif\n\n// \n\n// RTX Kernel Timer Tick Configuration\n// ======================================\n//  Use Cortex-M SysTick timer as RTX Kernel Timer\n//  Use the Cortex-M SysTick timer as a time-base for RTX.\n#ifndef OS_SYSTICK\n#define OS_SYSTICK 0\n#endif\n//\n//   Timer clock value [Hz] <1-1000000000>\n//    Defines the timer clock value.\n//    Default: 12000000  (12MHz)\n#ifndef OS_CLOCK\n#if defined(TARGET_RZ_A1H)\n#define OS_CLOCK 12000000\n#else\n#error \"no target defined\"\n#endif\n#endif\n\n//   Timer tick value [us] <1-1000000>\n//    Defines the timer tick value.\n//    Default: 1000  (1ms)\n#ifndef OS_TICK\n#define OS_TICK 1000\n#endif\n\n// \n\n// System Configuration\n// =======================\n//\n// Round-Robin Thread switching\n// ===============================\n//\n//  Enables Round-Robin Thread switching.\n#ifndef OS_ROBIN\n#define OS_ROBIN 1\n#endif\n\n//   Round-Robin Timeout [ticks] <1-1000>\n//    Defines how long a thread will execute before a thread switch.\n//    Default: 5\n#ifndef OS_ROBINTOUT\n#define OS_ROBINTOUT 5\n#endif\n\n// \n\n// User Timers\n// ==============\n//    Enables user Timers\n#ifndef OS_TIMERS\n#define OS_TIMERS 1\n#endif\n\n//   Timer Thread Priority\n//                        <1=> Low\n//     <2=> Below Normal  <3=> Normal  <4=> Above Normal\n//                        <5=> High\n//                        <6=> Realtime (highest)\n//    Defines priority for Timer Thread\n//    Default: High\n#ifndef OS_TIMERPRIO\n#define OS_TIMERPRIO 5\n#endif\n\n//   Timer Thread stack size [bytes] <64-4096:8><#/4>\n//    Defines stack size for Timer thread.\n//    Default: 200\n#ifndef OS_TIMERSTKSZ\n#define OS_TIMERSTKSZ WORDS_STACK_SIZE\n#endif\n\n//   Timer Callback Queue size <1-32>\n//    Number of concurrent active timer callback functions.\n//    Default: 4\n#ifndef OS_TIMERCBQS\n#define OS_TIMERCBQS 4\n#endif\n\n// \n\n//   ISR FIFO Queue size<4=>   4 entries  <8=>   8 entries\n//                         <12=> 12 entries  <16=> 16 entries\n//                         <24=> 24 entries  <32=> 32 entries\n//                         <48=> 48 entries  <64=> 64 entries\n//                         <96=> 96 entries\n//    ISR functions store requests to this buffer,\n//    when they are called from the interrupt handler.\n//    Default: 16 entries\n#ifndef OS_FIFOSZ\n#define OS_FIFOSZ 16\n#endif\n\n// \n\n//------------- <<< end of configuration section >>> -----------------------\n\n// Standard library system mutexes\n// ===============================\n//  Define max. number system mutexes that are used to protect\n//  the arm standard runtime library. For microlib they are not used.\n#ifndef OS_MUTEXCNT\n#define OS_MUTEXCNT 12\n#endif\n\n/*----------------------------------------------------------------------------\n *      RTX User configuration part END\n *---------------------------------------------------------------------------*/\n\n#define OS_TRV ((uint32_t)(((double)OS_CLOCK * (double)OS_TICK) / 1E6) - 1)\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- os_idle_demon ---------------------------------*/\n\nvoid os_idle_demon(void) {\n  /* The idle demon is a system thread, running when no other thread is      */\n  /* ready to run.                                                           */\n\n  for (;;) {\n    /* HERE: include optional user code to be executed when no thread runs.*/\n  }\n}\n\n#if (OS_SYSTICK == 0) // Functions for alternative timer as RTX kernel timer\n\n/*--------------------------- os_tick_init ----------------------------------*/\n#ifdef TARGET_RZ_A1H\n#define OSTM0 (0xFCFEC000uL) /* OSTM0 */\n#define OSTM1 (0xFCFEC400uL) /* OSTM1 */\n#define CPG (0xFCFE0410uL)   /* CPG */\n\n#define CPGSTBCR5 (*((volatile unsigned char *)(CPG + 0x00000018uL)))\n\n#define OSTM0CMP (*((volatile unsigned long *)(OSTM0 + 0x00000000uL)))\n#define OSTM0CNT (*((volatile unsigned long *)(OSTM0 + 0x00000004uL)))\n#define OSTM0TE (*((volatile unsigned char *)(OSTM0 + 0x00000010uL)))\n#define OSTM0TS (*((volatile unsigned char *)(OSTM0 + 0x00000014uL)))\n#define OSTM0TT (*((volatile unsigned char *)(OSTM0 + 0x00000018uL)))\n#define OSTM0CTL (*((volatile unsigned char *)(OSTM0 + 0x00000020uL)))\n\n#define OSTM1CMP (*((volatile unsigned long *)(OSTM1 + 0x00000000uL)))\n#define OSTM1CNT (*((volatile unsigned long *)(OSTM1 + 0x00000004uL)))\n#define OSTM1TE (*((volatile unsigned char *)(OSTM1 + 0x00000010uL)))\n#define OSTM1TS (*((volatile unsigned char *)(OSTM1 + 0x00000014uL)))\n#define OSTM1TT (*((volatile unsigned char *)(OSTM1 + 0x00000018uL)))\n#define OSTM1CTL (*((volatile unsigned char *)(OSTM1 + 0x00000020uL)))\n\n#define CPG_STBCR5_BIT_MSTP51 (0x02u) /* OSTM0 */\n#define CM1_RENESAS_RZ_A1_P0_CLK (32000000u)\n#define CM0_RENESAS_RZ_A1_P0_CLK (33333333u)\n\ntypedef enum { IRQ_SGI0 = 0, IRQ_OSTMI0TINT = 134 } IRQn_Type;\n\ntypedef void (*IRQHandler)();\n\nextern void PendSV_Handler(uint32_t);\nextern void OS_Tick_Handler(uint32_t);\nextern uint32_t InterruptHandlerRegister(IRQn_Type irq, IRQHandler handler);\n#endif\n\n// Initialize alternative hardware timer as RTX kernel timer\n// Return: IRQ number of the alternative hardware timer\nint os_tick_init(void) {\n#ifdef TARGET_RZ_A1H\n  CPGSTBCR5 &= ~(CPG_STBCR5_BIT_MSTP51); /* enable OSTM0 clock */\n\n  OSTM0TT = 0x1;  /* Stop the counter and clears the OSTM0TE bit.     */\n  OSTM0CTL = 0x1; /* Interval timer mode. Interrupt enabled  */\n\n  OSTM0CMP =\n      (uint32_t)(((double)CM0_RENESAS_RZ_A1_P0_CLK * (double)OS_TICK) / 1E6);\n\n  OSTM0TS = 0x1; /* Start the counter and sets the OSTM0TE bit.     */\n\n  InterruptHandlerRegister(IRQ_SGI0, (IRQHandler)PendSV_Handler);\n  InterruptHandlerRegister(IRQ_OSTMI0TINT, (IRQHandler)OS_Tick_Handler);\n\n  return IRQ_OSTMI0TINT; /* Return IRQ number of timer (0..239) */\n                         /* RTX will set and configure the interrupt */\n#endif\n}\n\n/*--------------------------- os_tick_irqack --------------------------------*/\n\n// Acknowledge alternative hardware timer interrupt\nvoid os_tick_irqack(void) { /* ... */\n}\n\n#endif // (OS_SYSTICK == 0)\n\n/*--------------------------- os_error --------------------------------------*/\nextern void mbed_die(void);\n\nvoid os_error(uint32_t err_code) {\n  /* This function is called when a runtime error is detected. Parameter */\n  /* 'err_code' holds the runtime error code (defined in RTL.H).         */\n  mbed_die();\n\n  /* HERE: include optional code to be executed on runtime error. */\n  for (;;)\n    ;\n}\n\n/*----------------------------------------------------------------------------\n *      RTX Configuration Functions\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_CM_lib.h\"\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/RTX_Config.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_CONFIG.H\n *      Purpose: Exported functions of RTX_Config.c\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n\n/* Error Codes */\n#define OS_ERR_STK_OVF          1\n#define OS_ERR_FIFO_OVF         2\n#define OS_ERR_MBX_OVF          3\n\n/* Definitions */\n#define BOX_ALIGN_8                   0x80000000\n#define _declare_box(pool,size,cnt)   U32 pool[(((size)+3)/4)*(cnt) + 3]\n#define _declare_box8(pool,size,cnt)  U64 pool[(((size)+7)/8)*(cnt) + 2]\n#define _init_box8(pool,size,bsize)   _init_box (pool,size,(bsize) | BOX_ALIGN_8)\n\n/* Variables */\nextern U32 mp_tcb[];\nextern U64 mp_stk[];\nextern U32 os_fifo[];\nextern void *os_active_TCB[];\n\n/* Constants */\nextern U16 const os_maxtaskrun;\nextern U32 const os_trv;\nextern U8  const os_flags;\nextern U32 const os_stackinfo;\nextern U32 const os_rrobin;\nextern U32 const os_clockrate;\nextern U32 const os_timernum;\nextern U16 const mp_tcb_size;\nextern U32 const mp_stk_size;\nextern U32 const *m_tmr;\nextern U16 const mp_tmr_size;\nextern U8  const os_fifo_size;\n\n/* Functions */\nextern void os_idle_demon   (void);\nextern int  os_tick_init    (void);\nextern void os_tick_irqack  (void);\nextern void os_tmr_call     (U16  info);\nextern void os_error        (U32 err_code);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/TOOLCHAIN_ARM/HAL_CA9.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CA9.c\n *      Purpose: Hardware Abstraction Layer for Cortex-A9\n *      Rev.:    3 Sept 2013\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 2012 - 2013 ARM Limited\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_Config.h\"\n#include \"rt_HAL_CA.h\"\n#include \"rt_List.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n// For A-class, set USR/SYS stack\n__asm void rt_set_PSP(U32 stack) {\n  ARM\n\n      MRS R1,\n      CPSR CPS #MODE_SYS;\n  no effect in USR mode ISB MOV SP, R0 MSR CPSR_c, R1;\n  no effect in USR mode ISB BX LR\n}\n\n// For A-class, get USR/SYS stack\n__asm U32 rt_get_PSP(void) {\n  ARM\n\n      MRS R1,\n      CPSR CPS #MODE_SYS;\n  no effect in USR mode ISB MOV R0, SP MSR CPSR_c, R1;\n  no effect in USR mode ISB BX LR\n}\n\n/*--------------------------- _alloc_box ------------------------------------*/\n__asm void *_alloc_box(void *box_mem) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  ARM\n\n      LDR R12,\n      = __cpp(rt_alloc_box) MRS R2, CPSR LSLS R2, #28 BXNE R12 SVC 0 BX LR\n}\n\n/*--------------------------- _free_box -------------------------------------*/\n__asm int _free_box(void *box_mem, void *box) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  ARM\n\n      LDR R12,\n      = __cpp(rt_free_box) MRS R2, CPSR LSLS R2, #28 BXNE R12 SVC 0 BX LR\n}\n\n/*-------------------------- SVC_Handler -----------------------------------*/\n\n#pragma push\n#pragma arm\n__asm void SVC_Handler(void) {\n  PRESERVE8\n  ARM\n\n      IMPORT rt_tsk_lock IMPORT rt_tsk_unlock IMPORT SVC_Count IMPORT SVC_Table\n          IMPORT rt_stk_check IMPORT FPUEnable\n\n              Mode_SVC EQU 0x13\n\n      SRSFD SP !,\n#Mode_SVC;\n      Push LR_SVC and SPRS_SVC onto SVC mode stack PUSH{R4};\n  Push R4 so we can use it as a temp\n\n      MRS R4,\n      SPSR;\n  Get SPSR TST R4, #CPSR_T_BIT;\n  Check Thumb Bit LDRNEH R4, [ LR, # - 2 ];\nThumb:\n  Load Halfword BICNE R4, R4, #0xFF00;\n  Extract SVC Number LDREQ R4, [ LR, # - 4 ];\nARM:\n  Load Word BICEQ R4, R4, #0xFF000000;\n  Extract SVC Number\n\n      /* Lock out systick and re-enable interrupts */\n      PUSH{R0 - R3, R12, LR}\n\n  AND R12,\n      SP, #4;\n  Ensure stack is 8 - byte aligned SUB SP, SP, R12;\n  Adjust stack PUSH{R12, LR};\n  Store stack adjustment and dummy LR to SVC stack\n\n      BLX rt_tsk_lock CPSIE i\n\n          POP{R12, LR};\n  Get stack adjustment &discard dummy LR ADD SP, SP, R12;\n  Unadjust stack\n\n      POP{R0 - R3, R12, LR}\n\n  CMP R4,\n# 0 BNE SVC_User\n\n      MRS R4, SPSR PUSH{R4};\n  Push R4 so we can use it as a temp AND R4, SP, #4;\n  Ensure stack is 8 - byte aligned SUB SP, SP, R4;\n  Adjust stack PUSH{R4, LR};\n  Store stack adjustment and dummy LR BLX R12 POP{R4, LR};\n  Get stack adjustment &discard dummy LR ADD SP, SP, R4;\n  Unadjust stack POP{R4};\n  Restore R4 MSR SPSR_CXSF,\n      R4\n\n          /* Here we will be in SVC mode (even if coming in from PendSV_Handler\n             or OS_Tick_Handler) */\n          Sys_Switch LDR LR,\n      = __cpp(&os_tsk) LDM LR, {R4, LR};\n  os_tsk.run, os_tsk.new CMP R4,\n      LR BNE switching\n\n          PUSH{R0 - R3, R12, LR}\n\n  AND R12,\n      SP, #4;\n  Ensure stack is 8 - byte aligned SUB SP, SP, R12;\n  Adjust stack PUSH{R12, LR};\n  Store stack adjustment and dummy LR to SVC stack\n\n      CPSID i BLX rt_tsk_unlock\n\n          POP{R12, LR};\n  Get stack adjustment &discard dummy LR ADD SP, SP, R12;\n  Unadjust stack\n\n      POP{R0 - R3, R12, LR} POP{R4} RFEFD SP !;\n  Return from exception,\n      no task switch\n\n      switching CLREX CMP R4,\n# 0 ADDEQ SP, SP, #12;\n      Original R4,\n      LR &SPSR do not need to be popped when we are paging in a different task\n          BEQ SVC_Next;\n  Runtask deleted ?\n\n                  PUSH{R8 - R11} // R4 and LR already stacked\n  MOV R10,\n      R4;\n  Preserve os_tsk.run MOV R11, LR;\n  Preserve os_tsk.new\n\n      ADD R8,\n      SP, #16;\n  Unstack R4, LR LDMIA R8,\n      {R4, LR}\n\n  SUB SP,\n      SP, #4; Make space on the stack for the next instn\n        STMIA   SP,{SP}^                ;\n  Put User SP onto stack POP{R8};\n  Pop User SP into R8\n\n      MRS R9,\n      SPSR STMDB R8 !, {R9};\n  User CPSR STMDB R8 !, {LR};\n  User PC STMDB R8, {LR} ^ ;\n  User LR SUB R8, R8, #4; No writeback for store of User LR\n        STMDB   R8!,{R0-R3,R12}         ;\n  User R0 - R3, R12 MOV R3, R10;\n  os_tsk.run MOV LR, R11;\n  os_tsk.new POP{R9 - R12} ADD SP, SP, #12; Fix up SP for unstack of R4, LR & SPSR\n        STMDB   R8!,{R4-R7,R9-R12}      ;\n  User R4 - R11\n\n                // If applicable, stack VFP state\n                MRC p15,\n      0, R1, c1, c0, 2;\n  VFP / NEON access enabled ? (CPACR)AND R2, R1, #0x00F00000 CMP R2,\n# 0x00F00000 BNE no_outgoing_vfp VMRS R2, FPSCR STMDB R8 !, {R2, R4 };\n      Push FPSCR, maintain 8 - byte alignment VSTMDB R8 !, {S0 - S31} LDRB R2,\n      [ R3, #TCB_STACKF ];\n  Record in TCB that VFP state is stacked ORR R2, #2 STRB R2,\n      [ R3, #TCB_STACKF ]\n\n      no_outgoing_vfp STR R8,\n      [R3, #TCB_TSTACK] MOV R4,\n      LR\n\n          PUSH { R4 };\n  Push R4 so we can use it as a temp AND R4, SP, #4;\n  Ensure stack is 8 - byte aligned SUB SP, SP, R4;\n  Adjust stack PUSH{R4, LR};\n  Store stack adjustment and dummy LR to SVC stack\n\n      BLX rt_stk_check\n\n          POP{R4, LR};\n  Get stack adjustment &discard dummy LR ADD SP, SP, R4;\n  Unadjust stack POP{R4};\n  Restore R4\n\n      MOV LR,\n      R4\n\n          SVC_Next // R4 == os_tsk.run, LR == os_tsk.new, R0-R3, R5-R12\n                   // corruptible\n              LDR R1,\n      = __cpp(&os_tsk);\n  os_tsk.run = os_tsk.new STR LR, [ R1 ] LDRB R1, [ LR, #TCB_TID ];\n  os_tsk.run->task_id LSL R1, #8;\n  Store PROCID MCR p15, 0, R1, c13, c0, 1;\n  Write CONTEXTIDR\n\n      LDR R0,\n      [ LR, #TCB_TSTACK ];\n  os_tsk.run->tsk_stack\n\n      // Does incoming task have VFP state in stack?\n      LDRB R3,\n      [ LR, #TCB_STACKF ] TST R3, #0x2 MRC p15, 0, R1, c1, c0, 2;\n  Read CPACR ANDEQ R1, R1, #0xFF0FFFFF;\n  Disable VFP access if incoming task does not have stacked VFP state ORRNE R1,\n      R1, #0x00F00000;\n  Enable VFP access if incoming task does have stacked VFP state MCR p15, 0, R1,\n      c1, c0, 2;\n  Write CPACR BEQ no_incoming_vfp ISB;\n  We only need the sync if we enabled,\n      otherwise we will context switch before next VFP instruction anyway VLDMIA\n          R0 !,\n      {S0 - S31} LDR R2, [R0] VMSR FPSCR, R2 ADD R0, R0,\n# 8\n\n      no_incoming_vfp LDR R1, [ R0, #60 ];\n  Restore User CPSR MSR SPSR_CXSF, R1 LDMIA R0 !, {R4 - R11};\n  Restore User R4 - R11 ADD R0, R0, #4;\n  Restore User R1 - R3, R12 LDMIA R0 !, {R1 - R3, R12} LDMIA R0, {LR} ^ ;\n  Restore User LR ADD R0, R0, #4; No writeback for load to user LR\n        LDMIA   R0!,{LR}                ;\n  Restore User PC ADD R0, R0, #4; Correct User SP for unstacked user CPSR\n\n        PUSH    {R0}                    ;\n  Push R0 onto stack LDMIA SP, {SP} ^ ;\n  Get R0 off stack into User SP ADD SP, SP, #4;\n  Put SP back\n\n      LDR R0,\n      [ R0, # - 32 ];\n  Restore R0\n\n      PUSH{R0 - R3, R12, LR}\n\n  AND R12,\n      SP, #4;\n  Ensure stack is 8 - byte aligned SUB SP, SP, R12;\n  Adjust stack PUSH{R12, LR};\n  Store stack adjustment and dummy LR to SVC stack\n\n      CPSID i BLX rt_tsk_unlock\n\n          POP{R12, LR};\n  Get stack adjustment &discard dummy LR ADD SP, SP, R12;\n  Unadjust stack\n\n      POP{R0 - R3, R12, LR}\n\n  MOVS PC,\n      LR;\n  Return from exception\n\n      /*------------------- User SVC -------------------------------*/\n\n      SVC_User LDR R12,\n      = SVC_Count LDR R12, [R12] CMP R4, R12; Check for overflow\n        BHI     SVC_Done\n\n        LDR     R12,=SVC_Table-4\n        LDR     R12,[R12,R4,LSL #2]     ;\n  Load SVC Function Address MRS R4, SPSR;\n  Save SPSR PUSH{R4};\n  Push R4 so we can use it as a temp AND R4, SP, #4;\n  Ensure stack is 8 - byte aligned SUB SP, SP, R4;\n  Adjust stack PUSH{R4, LR};\n  Store stack adjustment and dummy LR BLX R12;\n  Call SVC Function POP{R4, LR};\n  Get stack adjustment &discard dummy LR ADD SP, SP, R4;\n  Unadjust stack POP{R4};\n  Restore R4 MSR SPSR_CXSF, R4;\n  Restore SPSR\n\n      SVC_Done PUSH{R0 - R3, R12, LR}\n\n  PUSH{R4};\n  Push R4 so we can use it as a temp AND R4, SP, #4;\n  Ensure stack is 8 - byte aligned SUB SP, SP, R4;\n  Adjust stack PUSH{R4, LR};\n  Store stack adjustment and dummy LR\n\n      CPSID i BLX rt_tsk_unlock\n\n          POP{R4, LR};\n  Get stack adjustment &discard dummy LR ADD SP, SP, R4;\n  Unadjust stack POP{R4};\n  Restore R4\n\n      POP{R0 - R3, R12, LR} POP{R4} RFEFD SP !;\n  Return from exception\n}\n#pragma pop\n\n#pragma push\n#pragma arm\n__asm void PendSV_Handler(U32 IRQn) {\n  ARM\n\n      IMPORT rt_tsk_lock IMPORT IRQNestLevel\n\n          ADD SP,\n      SP,\n# 8 // fix up stack pointer (R0 has been pushed and will never be popped,      \\\n    // R1 was pushed for stack alignment)\n\n      // Disable systick interrupts, then write EOIR. We want interrupts\n      // disabled before we enter the context switcher.\n      PUSH{R0, R1} BLX rt_tsk_lock POP{R0, R1} LDR R1,\n      = __cpp(&GICInterface_BASE) LDR R1, [ R1, #0 ] STR R0,\n      [ R1, #0x10 ]\n\n      LDR R0,\n      = IRQNestLevel;\n  Get address of nesting counter LDR R1, [R0] SUB R1, R1, #1;\n  Decrement nesting counter STR R1, [R0]\n\n      BLX __cpp(rt_pop_req)\n\n          POP { R1, LR };\n  Get stack adjustment &discard dummy LR ADD SP, SP, R1;\n  Unadjust stack\n\n      LDR R0,\n      [SP, #24] MSR SPSR_CXSF, R0 POP { R0 - R3, R12 };\n  Leave SPSR &LR on the stack PUSH{R4} B Sys_Switch\n}\n#pragma pop\n\n#pragma push\n#pragma arm\n__asm void OS_Tick_Handler(U32 IRQn) {\n  ARM\n\n      IMPORT rt_tsk_lock IMPORT IRQNestLevel\n\n          ADD SP,\n      SP,\n# 8 // fix up stack pointer (R0 has been pushed and will never be popped,      \\\n    // R1 was pushed for stack alignment)\n\n      PUSH{R0, R1} BLX rt_tsk_lock POP{R0, R1} LDR R1,\n      = __cpp(&GICInterface_BASE) LDR R1, [ R1, #0 ] STR R0,\n      [ R1, #0x10 ]\n\n      LDR R0,\n      = IRQNestLevel;\n  Get address of nesting counter LDR R1, [R0] SUB R1, R1, #1;\n  Decrement nesting counter STR R1, [R0]\n\n      BLX __cpp(os_tick_irqack) BLX __cpp(rt_systick)\n\n          POP { R1, LR };\n  Get stack adjustment &discard dummy LR ADD SP, SP, R1;\n  Unadjust stack\n\n      LDR R0,\n      [SP, #24] MSR SPSR_CXSF, R0 POP { R0 - R3, R12 };\n  Leave SPSR &LR on the stack PUSH{R4} B Sys_Switch\n}\n#pragma pop\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/TOOLCHAIN_ARM/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.60\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                AREA    SVC_TABLE, CODE, READONLY\n\n                EXPORT  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;                IMPORT  __SVC_1\n\n                EXPORT  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;                DCD     __SVC_1                 ; InitMemorySubsystem\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/TOOLCHAIN_GCC/HAL_CA9.S",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CA9.c\n *      Purpose: Hardware Abstraction Layer for Cortex-A9\n *      Rev.:    3 Sept 2013\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 2012 - 2013 ARM Limited\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n    .global rt_set_PSP\n    .global rt_get_PSP\n    .global _alloc_box\n    .global _free_box\n    .global PendSV_Handler\n    .global OS_Tick_Handler\n\n    .EQU CPSR_T_BIT,    0x20\n    .EQU CPSR_I_BIT,    0x80\n    .EQU CPSR_F_BIT,    0x40\n\n    .EQU MODE_USR,      0x10\n    .EQU MODE_FIQ,      0x11\n    .EQU MODE_IRQ,      0x12\n    .EQU MODE_SVC,      0x13\n    .EQU MODE_ABT,      0x17\n    .EQU MODE_UND,      0x1B\n    .EQU MODE_SYS,      0x1F\n\n    .EQU TCB_TID,        3        /* 'task id' offset                        */\n    .EQU TCB_STACKF,    32        /* 'stack_frame' offset                    */\n    .EQU TCB_TSTACK,    36        /* 'tsk_stack' offset                      */\n\n    .extern rt_alloc_box\n    .extern os_tsk\n    .extern GICInterface_BASE\n    .extern rt_pop_req\n    .extern os_tick_irqack\n    .extern rt_systick\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n    .text\n@ For A-class, set USR/SYS stack\n@ __asm void rt_set_PSP (U32 stack) {\nrt_set_PSP:\n        .arm\n\n        MRS     R1, CPSR\n        CPS     #MODE_SYS   @no effect in USR mode\n        ISB\n        MOV     SP, R0\n        MSR     CPSR_c, R1  @no effect in USR mode\n        ISB\n        BX      LR\n\n@ }\n\n@ For A-class, get USR/SYS stack\n@ __asm U32 rt_get_PSP (void) {\nrt_get_PSP:\n        .arm\n\n        MRS     R1, CPSR\n        CPS     #MODE_SYS   @no effect in USR mode\n        ISB\n        MOV     R0, SP\n        MSR     CPSR_c, R1  @no effect in USR mode\n        ISB\n        BX      LR\n\n@ }\n\n/*--------------------------- _alloc_box ------------------------------------*/\n@ __asm void *_alloc_box (void *box_mem) {\n_alloc_box:\n    /* Function wrapper for Unprivileged/Privileged mode. */\n        .arm\n\n        LDR     R12,=rt_alloc_box       @ __cpp(rt_alloc_box)\n        MRS     R2, CPSR\n        LSLS    R2, #28\n        BXNE    R12\n        SVC     0\n        BX      LR\n@ }\n\n\n/*--------------------------- _free_box -------------------------------------*/\n@ __asm int _free_box (void *box_mem, void *box) {\n_free_box:\n   /* Function wrapper for Unprivileged/Privileged mode. */\n        .arm\n\n        LDR     R12,=rt_free_box        @ __cpp(rt_free_box)\n        MRS     R2, CPSR\n        LSLS    R2, #28\n        BXNE    R12\n        SVC     0\n        BX      LR\n\n@ }\n\n/*-------------------------- SVC_Handler -----------------------------------*/\n\n@ #pragma push\n@ #pragma arm\n@ __asm void SVC_Handler (void) {\n\n        .type   SVC_Handler, %function\n        .global SVC_Handler\nSVC_Handler:\n@         PRESERVE8\n        .arm\n        .extern  rt_tsk_lock\n        .extern  rt_tsk_unlock\n        .extern  SVC_Count\n        .extern  SVC_Table\n        .extern  rt_stk_check\n        .extern  FPUEnable\n\n        .EQU    Mode_SVC, 0x13\n\n        SRSDB   SP!, #Mode_SVC         @ Push LR_SVC and SPRS_SVC onto SVC mode stack\n        PUSH    {R4}                   @ Push R4 so we can use it as a temp\n\n\n        MRS     R4,SPSR                @ Get SPSR\n        TST     R4,#CPSR_T_BIT         @ Check Thumb Bit\n        LDRNEH  R4,[LR,#-2]            @ Thumb: Load Halfword\n        BICNE   R4,R4,#0xFF00          @        Extract SVC Number\n        LDREQ   R4,[LR,#-4]            @ ARM:   Load Word\n        BICEQ   R4,R4,#0xFF000000      @        Extract SVC Number\n\n        /* Lock out systick and re-enable interrupts */\n        PUSH    {R0-R3,R12,LR}\n\n        AND     R12, SP, #4            @ Ensure stack is 8-byte aligned\n        SUB     SP, SP, R12            @ Adjust stack\n        PUSH    {R12, LR}              @ Store stack adjustment and dummy LR to SVC stack\n\n        BLX     rt_tsk_lock\n        CPSIE   i\n\n        POP     {R12, LR}              @ Get stack adjustment & discard dummy LR\n        ADD     SP, SP, R12            @ Unadjust stack\n\n        POP     {R0-R3,R12,LR}\n\n        CMP     R4,#0\n        BNE     SVC_User\n\n        MRS     R4,SPSR\n        PUSH    {R4}                    @ Push R4 so we can use it as a temp\n        AND     R4, SP, #4              @ Ensure stack is 8-byte aligned\n        SUB     SP, SP, R4              @ Adjust stack\n        PUSH    {R4, LR}                @ Store stack adjustment and dummy LR\n        BLX     R12\n        POP     {R4, LR}                @ Get stack adjustment & discard dummy LR\n        ADD     SP, SP, R4              @ Unadjust stack\n        POP     {R4}                    @ Restore R4\n        MSR     SPSR_cxsf,R4\n\n        /* Here we will be in SVC mode (even if coming in from PendSV_Handler or OS_Tick_Handler) */\nSys_Switch:\n        LDR     LR,=os_tsk              @ __cpp(&os_tsk)\n        LDM     LR,{R4,LR}              @ os_tsk.run, os_tsk.new\n        CMP     R4,LR\n        BNE     switching\n\n        PUSH    {R0-R3,R12,LR}\n\n        AND     R12, SP, #4             @ Ensure stack is 8-byte aligned\n        SUB     SP, SP, R12             @ Adjust stack\n        PUSH    {R12, LR}               @ Store stack adjustment and dummy LR to SVC stack\n\n        CPSID   i\n        BLX     rt_tsk_unlock\n\n        POP     {R12, LR}               @ Get stack adjustment & discard dummy LR\n        ADD     SP, SP, R12             @ Unadjust stack\n\n        POP     {R0-R3,R12,LR}\n        POP     {R4}\n        RFEFD   SP!                     @ Return from exception, no task switch\n\nswitching:\n        CLREX\n        CMP     R4,#0\n        ADDEQ   SP,SP,#12               @ Original R4, LR & SPSR do not need to be popped when we are paging in a different task\n        BEQ     SVC_Next                @ Runtask deleted?\n\n\n        PUSH    {R8-R11} @ R4 and LR already stacked\n        MOV     R10,R4                  @ Preserve os_tsk.run\n        MOV     R11,LR                  @ Preserve os_tsk.new\n\n        ADD     R8,SP,#16               @ Unstack R4,LR\n        LDMIA   R8,{R4,LR}\n\n        SUB     SP,SP,#4                @ Make space on the stack for the next instn\n        STMIA   SP,{SP}^                @ Put User SP onto stack\n        POP     {R8}                    @ Pop User SP into R8\n\n        MRS     R9,SPSR\n        STMDB   R8!,{R9}                @ User CPSR\n        STMDB   R8!,{LR}                @ User PC\n        STMDB   R8,{LR}^                @ User LR\n        SUB     R8,R8,#4                @ No writeback for store of User LR\n        STMDB   R8!,{R0-R3,R12}         @ User R0-R3,R12\n        MOV     R3,R10                  @ os_tsk.run\n        MOV     LR,R11                  @ os_tsk.new\n        POP     {R9-R12}\n        ADD     SP,SP,#12               @ Fix up SP for unstack of R4, LR & SPSR\n        STMDB   R8!,{R4-R7,R9-R12}      @ User R4-R11\n\n        @ If applicable, stack VFP state\n        MRC     p15,0,R1,c1,c0,2        @ VFP/NEON access enabled? (CPACR)\n        AND     R2,R1,#0x00F00000\n        CMP     R2,#0x00F00000\n        BNE     no_outgoing_vfp\n        VMRS    R2,FPSCR\n        STMDB   R8!,{R2,R4}             @ Push FPSCR, maintain 8-byte alignment\n        VSTMDB  R8!,{S0-S31}\n        LDRB    R2,[R3,#TCB_STACKF]     @ Record in TCB that VFP state is stacked\n        ORR     R2,#2\n        STRB    R2,[R3,#TCB_STACKF]\n\nno_outgoing_vfp:\n        STR     R8,[R3,#TCB_TSTACK]\n        MOV     R4,LR\n\n        PUSH    {R4}                    @ Push R4 so we can use it as a temp\n        AND     R4, SP, #4              @ Ensure stack is 8-byte aligned\n        SUB     SP, SP, R4              @ Adjust stack\n        PUSH    {R4, LR}                @ Store stack adjustment and dummy LR to SVC stack\n\n        BLX     rt_stk_check\n\n        POP     {R4, LR}                @ Get stack adjustment & discard dummy LR\n        ADD     SP, SP, R4              @ Unadjust stack\n        POP     {R4}                    @ Restore R4\n\n        MOV     LR,R4\n\nSVC_Next:  @ R4 == os_tsk.run, LR == os_tsk.new, R0-R3, R5-R12 corruptible\n        LDR     R1,=os_tsk              @ __cpp(&os_tsk), os_tsk.run = os_tsk.new\n        STR     LR,[R1]\n        LDRB    R1,[LR,#TCB_TID]        @ os_tsk.run->task_id\n        LSL     R1,#8                   @ Store PROCID\n        MCR     p15,0,R1,c13,c0,1       @ Write CONTEXTIDR\n\n        LDR     R0,[LR,#TCB_TSTACK]     @ os_tsk.run->tsk_stack\n\n        @ Does incoming task have VFP state in stack?\n        LDRB    R3,[LR,#TCB_STACKF]\n        TST     R3,#0x2\n        MRC     p15,0,R1,c1,c0,2        @ Read CPACR\n        ANDEQ   R1,R1,#0xFF0FFFFF       @ Disable VFP access if incoming task does not have stacked VFP state\n        ORRNE   R1,R1,#0x00F00000       @ Enable VFP access if incoming task does have stacked VFP state\n        MCR     p15,0,R1,c1,c0,2        @ Write CPACR\n        BEQ     no_incoming_vfp\n        ISB                             @ We only need the sync if we enabled, otherwise we will context switch before next VFP instruction anyway\n        VLDMIA  R0!,{S0-S31}\n        LDR     R2,[R0]\n        VMSR    FPSCR,R2\n        ADD     R0,R0,#8\n\nno_incoming_vfp:\n        LDR     R1,[R0,#60]             @ Restore User CPSR\n        MSR     SPSR_cxsf,R1\n        LDMIA   R0!,{R4-R11}            @ Restore User R4-R11\n        ADD     R0,R0,#4                @ Restore User R1-R3,R12\n        LDMIA   R0!,{R1-R3,R12}\n        LDMIA   R0,{LR}^                @ Restore User LR\n        ADD     R0,R0,#4                @ No writeback for load to user LR\n        LDMIA   R0!,{LR}                @ Restore User PC\n        ADD     R0,R0,#4                @ Correct User SP for unstacked user CPSR\n\n        PUSH    {R0}                    @ Push R0 onto stack\n        LDMIA   SP,{SP}^                @ Get R0 off stack into User SP\n        ADD     SP,SP,#4                @ Put SP back\n\n        LDR     R0,[R0,#-32]            @ Restore R0\n\n        PUSH    {R0-R3,R12,LR}\n\n        AND     R12, SP, #4             @ Ensure stack is 8-byte aligned\n        SUB     SP, SP, R12             @ Adjust stack\n        PUSH    {R12, LR}               @ Store stack adjustment and dummy LR to SVC stack\n\n        CPSID   i\n        BLX     rt_tsk_unlock\n\n        POP     {R12, LR}               @ Get stack adjustment & discard dummy LR\n        ADD     SP, SP, R12             @ Unadjust stack\n\n        POP     {R0-R3,R12,LR}\n\n        MOVS    PC,LR                   @ Return from exception\n\n\n        /*------------------- User SVC -------------------------------*/\n\nSVC_User:\n        LDR     R12,=SVC_Count\n        LDR     R12,[R12]\n        CMP     R4,R12                  @ Check for overflow\n        BHI     SVC_Done\n\n        LDR     R12,=SVC_Table-4\n        LDR     R12,[R12,R4,LSL #2]     @ Load SVC Function Address\n        MRS     R4,SPSR                 @ Save SPSR\n        PUSH    {R4}                    @ Push R4 so we can use it as a temp\n        AND     R4, SP, #4              @ Ensure stack is 8-byte aligned\n        SUB     SP, SP, R4              @ Adjust stack\n        PUSH    {R4, LR}                @ Store stack adjustment and dummy LR\n        BLX     R12                     @ Call SVC Function\n        POP     {R4, LR}                @ Get stack adjustment & discard dummy LR\n        ADD     SP, SP, R4              @ Unadjust stack\n        POP     {R4}                    @ Restore R4\n        MSR     SPSR_cxsf,R4            @ Restore SPSR\n\nSVC_Done:\n        PUSH    {R0-R3,R12,LR}\n\n        PUSH    {R4}                    @ Push R4 so we can use it as a temp\n        AND     R4, SP, #4              @ Ensure stack is 8-byte aligned\n        SUB     SP, SP, R4              @ Adjust stack\n        PUSH    {R4, LR}                @ Store stack adjustment and dummy LR\n\n        CPSID   i\n        BLX     rt_tsk_unlock\n\n        POP     {R4, LR}                @ Get stack adjustment & discard dummy LR\n        ADD     SP, SP, R4              @ Unadjust stack\n        POP     {R4}                    @ Restore R4\n\n        POP     {R0-R3,R12,LR}\n        POP     {R4}\n        RFEFD   SP!                     @ Return from exception\n\n@ }\n\n@ #pragma pop\n\n\n@ #pragma push\n@ #pragma arm\n@ __asm void PendSV_Handler (U32 IRQn) {\nPendSV_Handler:\n    .arm\n\n    .extern  rt_tsk_lock\n    .extern  IRQNestLevel\n\n    ADD     SP,SP,#8 @ fix up stack pointer (R0 has been pushed and will never be popped, R1 was pushed for stack alignment)\n\n    @ Disable systick interrupts, then write EOIR. We want interrupts disabled before we enter the context switcher.\n    PUSH    {R0, R1}\n    BLX     rt_tsk_lock\n    POP     {R0, R1}\n    LDR     R1, =GICInterface_BASE      @ __cpp(&GICInterface_BASE)\n    LDR     R1, [R1, #0]\n    STR     R0, [R1, #0x10]\n\n    LDR     R0, =IRQNestLevel           @ Get address of nesting counter\n    LDR     R1, [R0]\n    SUB     R1, R1, #1                  @ Decrement nesting counter\n    STR     R1, [R0]\n\n    BLX     rt_pop_req                  @ __cpp(rt_pop_req)\n\n    POP     {R1, LR}                @ Get stack adjustment & discard dummy LR\n    ADD     SP, SP, R1              @ Unadjust stack\n\n    LDR     R0,[SP,#24]\n    MSR     SPSR_cxsf,R0\n    POP     {R0-R3,R12}             @ Leave SPSR & LR on the stack\n    PUSH    {R4}\n    B       Sys_Switch\n@ }\n@ #pragma pop\n\n@ #pragma push\n@ #pragma arm\n@ __asm void OS_Tick_Handler (U32 IRQn) {\nOS_Tick_Handler:\n    .arm\n\n    ADD     SP,SP,#8 @ fix up stack pointer (R0 has been pushed and will never be popped, R1 was pushed for stack alignment)\n\n    PUSH    {R0, R1}\n    BLX     rt_tsk_lock\n    POP     {R0, R1}\n    LDR     R1, =GICInterface_BASE      @ __cpp(&GICInterface_BASE)\n    LDR     R1, [R1, #0]\n    STR     R0, [R1, #0x10]\n\n    LDR     R0, =IRQNestLevel           @ Get address of nesting counter\n    LDR     R1, [R0]\n    SUB     R1, R1, #1                  @ Decrement nesting counter\n    STR     R1, [R0]\n\n    BLX      os_tick_irqack             @ __cpp(os_tick_irqack)\n    BLX      rt_systick                 @ __cpp(rt_systick)\n\n    POP     {R1, LR}                @ Get stack adjustment & discard dummy LR\n    ADD     SP, SP, R1              @ Unadjust stack\n\n    LDR     R0,[SP,#24]\n    MSR     SPSR_cxsf,R0\n    POP     {R0-R3,R12}             @ Leave SPSR & LR on the stack\n    PUSH    {R4}\n    B       Sys_Switch\n@ }\n@ #pragma pop\n\n    .global __set_PSP\n@ __STATIC_ASM void __set_PSP(uint32_t topOfProcStack)\n@ {\n__set_PSP:\n@     PRESERVE8\n    .arm\n\n    BIC     R0, R0, #7  @ensure stack is 8-byte aligned\n    MRS     R1, CPSR\n    CPS     #MODE_SYS   @no effect in USR mode\n    MOV     SP, R0\n    MSR     CPSR_c, R1  @no effect in USR mode\n    ISB\n    BX      LR\n\n@ }\n\n    .global __set_CPS_USR\n@ __STATIC_ASM void __set_CPS_USR(void)\n@ {\n__set_CPS_USR:\n    .arm\n\n    CPS  #MODE_USR\n    BX   LR\n@ }\n\n    .END\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/TOOLCHAIN_GCC/SVC_Table.S",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    SVC_TABLE.S\n *      Purpose: Pre-defined SVC Table for Cortex-M\n *      Rev.:    V4.70\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n\n                .section    SVC_TABLE @, CODE, READONLY\n                .align  5\n\n                .global  SVC_Count\n\n.EQU    SVC_Cnt,        (SVC_End-SVC_Table)/4\n\nSVC_Count:\n                .word   SVC_Cnt\n\n@ Import user SVC functions here.\n@                .extern __SVC_1\n                .global SVC_Table\nSVC_Table:\n@ Insert user SVC functions here. SVC 0 used by RTL Kernel.\n@                .word   __SVC_1                 @ InitMemorySubsystem\n\n@SVC_End\nSVC_End:\n\n                .END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/cmsis_os.h",
    "content": "/* ----------------------------------------------------------------------\n * $Date:        5. June 2012\n * $Revision:    V1.01\n *\n * Project:      CMSIS-RTOS API\n * Title:        cmsis_os.h RTX header file\n *\n * Version 0.02\n *    Initial Proposal Phase\n * Version 0.03\n *    osKernelStart added, optional feature: main started as thread\n *    osSemaphores have standard behavior\n *    osTimerCreate does not start the timer, added osTimerStart\n *    osThreadPass is renamed to osThreadYield\n * Version 1.01\n *    Support for C++ interface\n *     - const attribute removed from the osXxxxDef_t typedef's\n *     - const attribute added to the osXxxxDef macros\n *    Added: osTimerDelete, osMutexDelete, osSemaphoreDelete\n *    Added: osKernelInitialize\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 2012 ARM LIMITED\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/**\n\\page cmsis_os_h Header File Template: cmsis_os.h\n\nThe file \\b cmsis_os.h is a template header file for a CMSIS-RTOS compliant Real-Time Operating System (RTOS).\nEach RTOS that is compliant with CMSIS-RTOS shall provide a specific \\b cmsis_os.h header file that represents\nits implementation.\n\nThe file cmsis_os.h contains:\n - CMSIS-RTOS API function definitions\n - struct definitions for parameters and return types\n - status and priority values used by CMSIS-RTOS API functions\n - macros for defining threads and other kernel objects\n\n\nName conventions and header file modifications\n\nAll definitions are prefixed with \\b os to give an unique name space for CMSIS-RTOS functions.\nDefinitions that are prefixed \\b os_ are not used in the application code but local to this header file.\nAll definitions and functions that belong to a module are grouped and have a common prefix, i.e. \\b osThread.\n\nDefinitions that are marked with CAN BE CHANGED can be adapted towards the needs of the actual CMSIS-RTOS implementation.\nThese definitions can be specific to the underlying RTOS kernel.\n\nDefinitions that are marked with MUST REMAIN UNCHANGED cannot be altered. Otherwise the CMSIS-RTOS implementation is no longer\ncompliant to the standard. Note that some functions are optional and need not to be provided by every CMSIS-RTOS implementation.\n\n\nFunction calls from interrupt service routines\n\nThe following CMSIS-RTOS functions can be called from threads and interrupt service routines (ISR):\n  - \\ref osSignalSet\n  - \\ref osSemaphoreRelease\n  - \\ref osPoolAlloc, \\ref osPoolCAlloc, \\ref osPoolFree\n  - \\ref osMessagePut, \\ref osMessageGet\n  - \\ref osMailAlloc, \\ref osMailCAlloc, \\ref osMailGet, \\ref osMailPut, \\ref osMailFree\n\nFunctions that cannot be called from an ISR are verifying the interrupt status and return in case that they are called\nfrom an ISR context the status code \\b osErrorISR. In some implementations this condition might be caught using the HARD FAULT vector.\n\nSome CMSIS-RTOS implementations support CMSIS-RTOS function calls from multiple ISR at the same time.\nIf this is impossible, the CMSIS-RTOS rejects calls by nested ISR functions with the status code \\b osErrorISRRecursive.\n\n\nDefine and reference object definitions\n\nWith \\#define osObjectsExternal objects are defined as external symbols. This allows to create a consistent header file\nthat is used throughout a project as shown below:\n\nHeader File\n\\code\n#include                                          // CMSIS RTOS header file\n\n// Thread definition\nextern void thread_sample (void const *argument);             // function prototype\nosThreadDef (thread_sample, osPriorityBelowNormal, 1, 100);\n\n// Pool definition\nosPoolDef(MyPool, 10, long);\n\\endcode\n\n\nThis header file defines all objects when included in a C/C++ source file. When \\#define osObjectsExternal is\npresent before the header file, the objects are defined as external symbols. A single consistent header file can therefore be\nused throughout the whole project.\n\nExample\n\\code\n#include \"osObjects.h\"     // Definition of the CMSIS-RTOS objects\n\\endcode\n\n\\code\n#define osObjectExternal   // Objects will be defined as external symbols\n#include \"osObjects.h\"     // Reference to the CMSIS-RTOS objects\n\\endcode\n\n*/\n\n#ifndef _CMSIS_OS_H\n#define _CMSIS_OS_H\n\n/// \\note MUST REMAIN UNCHANGED: \\b osCMSIS identifies the CMSIS-RTOS API version.\n#define osCMSIS           0x10001      ///< API version (main [31:16] .sub [15:0])\n\n/// \\note CAN BE CHANGED: \\b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number.\n#define osCMSIS_RTX     ((4<<16)|61)   ///< RTOS identification and version (main [31:16] .sub [15:0])\n\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelSystemId shall be consistent in every CMSIS-RTOS.\n#define osKernelSystemId \"RTX V4.61\"   ///< RTOS identification string\n\n#define CMSIS_OS_RTX\n#define CMSIS_OS_RTX_CA          /* new define for Coretex-A */\n\n// The stack space occupied is mainly dependent on the underling C standard library\n#if defined(__GNUC__) || defined(__CC_ARM) || defined(__ARMCC_VERSION)\n#    define WORDS_STACK_SIZE   512\n#elif defined(TOOLCHAIN_ARM_MICRO)\n#    define WORDS_STACK_SIZE   128\n#endif\n\n#define DEFAULT_STACK_SIZE         (WORDS_STACK_SIZE*4)\n\n/// \\note MUST REMAIN UNCHANGED: \\b osFeature_xxx shall be consistent in every CMSIS-RTOS.\n#define osFeature_MainThread   1       ///< main thread      1=main can be thread, 0=not available\n#define osFeature_Pool         1       ///< Memory Pools:    1=available, 0=not available\n#define osFeature_MailQ        1       ///< Mail Queues:     1=available, 0=not available\n#define osFeature_MessageQ     1       ///< Message Queues:  1=available, 0=not available\n#define osFeature_Signals      16      ///< maximum number of Signal Flags available per thread\n#define osFeature_Semaphore    65535   ///< maximum count for \\ref osSemaphoreCreate function\n#define osFeature_Wait         0       ///< osWait function: 1=available, 0=not available\n\n#if defined (__CC_ARM)\n#define os_InRegs __value_in_regs      // Compiler specific: force struct in registers\n#else\n#define os_InRegs\n#endif\n\n#include \n#include \n\n#ifdef  __cplusplus\nextern \"C\"\n{\n#endif\n\n\n// ==== Enumeration, structures, defines ====\n\n/// Priority used for thread control.\n/// \\note MUST REMAIN UNCHANGED: \\b osPriority shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osPriorityIdle          = -3,          ///< priority: idle (lowest)\n  osPriorityLow           = -2,          ///< priority: low\n  osPriorityBelowNormal   = -1,          ///< priority: below normal\n  osPriorityNormal        =  0,          ///< priority: normal (default)\n  osPriorityAboveNormal   = +1,          ///< priority: above normal\n  osPriorityHigh          = +2,          ///< priority: high\n  osPriorityRealtime      = +3,          ///< priority: realtime (highest)\n  osPriorityError         =  0x84        ///< system cannot determine priority or thread has illegal priority\n} osPriority;\n\n/// Timeout value.\n/// \\note MUST REMAIN UNCHANGED: \\b osWaitForever shall be consistent in every CMSIS-RTOS.\n#define osWaitForever     0xFFFFFFFF     ///< wait forever timeout value\n\n/// Status code values returned by CMSIS-RTOS functions.\n/// \\note MUST REMAIN UNCHANGED: \\b osStatus shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osOK                    =     0,       ///< function completed; no error or event occurred.\n  osEventSignal           =  0x08,       ///< function completed; signal event occurred.\n  osEventMessage          =  0x10,       ///< function completed; message event occurred.\n  osEventMail             =  0x20,       ///< function completed; mail event occurred.\n  osEventTimeout          =  0x40,       ///< function completed; timeout occurred.\n  osErrorParameter        =  0x80,       ///< parameter error: a mandatory parameter was missing or specified an incorrect object.\n  osErrorResource         =  0x81,       ///< resource not available: a specified resource was not available.\n  osErrorTimeoutResource  =  0xC1,       ///< resource not available within given time: a specified resource was not available within the timeout period.\n  osErrorISR              =  0x82,       ///< not allowed in ISR context: the function cannot be called from interrupt service routines.\n  osErrorISRRecursive     =  0x83,       ///< function called multiple times from ISR with same object.\n  osErrorPriority         =  0x84,       ///< system cannot determine priority or thread has illegal priority.\n  osErrorNoMemory         =  0x85,       ///< system is out of memory: it was impossible to allocate or reserve memory for the operation.\n  osErrorValue            =  0x86,       ///< value of a parameter is out of range.\n  osErrorOS               =  0xFF,       ///< unspecified RTOS error: run-time error but no other error message fits.\n  os_status_reserved      =  0x7FFFFFFF  ///< prevent from enum down-size compiler optimization.\n} osStatus;\n\n\n/// Timer type value for the timer definition.\n/// \\note MUST REMAIN UNCHANGED: \\b os_timer_type shall be consistent in every CMSIS-RTOS.\ntypedef enum  {\n  osTimerOnce             =     0,       ///< one-shot timer\n  osTimerPeriodic         =     1        ///< repeating timer\n} os_timer_type;\n\n/// Entry point of a thread.\n/// \\note MUST REMAIN UNCHANGED: \\b os_pthread shall be consistent in every CMSIS-RTOS.\ntypedef void (*os_pthread) (void const *argument);\n\n/// Entry point of a timer call back function.\n/// \\note MUST REMAIN UNCHANGED: \\b os_ptimer shall be consistent in every CMSIS-RTOS.\ntypedef void (*os_ptimer) (void const *argument);\n\n// >>> the following data type definitions may shall adapted towards a specific RTOS\n\n/// Thread ID identifies the thread (pointer to a thread control block).\n/// \\note CAN BE CHANGED: \\b os_thread_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_thread_cb *osThreadId;\n\n/// Timer ID identifies the timer (pointer to a timer control block).\n/// \\note CAN BE CHANGED: \\b os_timer_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_timer_cb *osTimerId;\n\n/// Mutex ID identifies the mutex (pointer to a mutex control block).\n/// \\note CAN BE CHANGED: \\b os_mutex_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mutex_cb *osMutexId;\n\n/// Semaphore ID identifies the semaphore (pointer to a semaphore control block).\n/// \\note CAN BE CHANGED: \\b os_semaphore_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_semaphore_cb *osSemaphoreId;\n\n/// Pool ID identifies the memory pool (pointer to a memory pool control block).\n/// \\note CAN BE CHANGED: \\b os_pool_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_pool_cb *osPoolId;\n\n/// Message ID identifies the message queue (pointer to a message queue control block).\n/// \\note CAN BE CHANGED: \\b os_messageQ_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_messageQ_cb *osMessageQId;\n\n/// Mail ID identifies the mail queue (pointer to a mail queue control block).\n/// \\note CAN BE CHANGED: \\b os_mailQ_cb is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mailQ_cb *osMailQId;\n\n\n/// Thread Definition structure contains startup information of a thread.\n/// \\note CAN BE CHANGED: \\b os_thread_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_thread_def  {\n  os_pthread               pthread;    ///< start address of thread function\n  osPriority             tpriority;    ///< initial thread priority\n  uint32_t               instances;    ///< maximum number of instances of that thread function\n  uint32_t               stacksize;    ///< stack size requirements in bytes; 0 is default stack size\n#ifdef __MBED_CMSIS_RTOS_CA9\n  uint32_t               *stack_pointer;  ///< pointer to the stack memory block\n#endif\n} osThreadDef_t;\n\n/// Timer Definition structure contains timer parameters.\n/// \\note CAN BE CHANGED: \\b os_timer_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_timer_def  {\n  os_ptimer                 ptimer;    ///< start address of a timer function\n  void                      *timer;    ///< pointer to internal data\n} osTimerDef_t;\n\n/// Mutex Definition structure contains setup information for a mutex.\n/// \\note CAN BE CHANGED: \\b os_mutex_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mutex_def  {\n  void                      *mutex;    ///< pointer to internal data\n} osMutexDef_t;\n\n/// Semaphore Definition structure contains setup information for a semaphore.\n/// \\note CAN BE CHANGED: \\b os_semaphore_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_semaphore_def  {\n  void                  *semaphore;    ///< pointer to internal data\n} osSemaphoreDef_t;\n\n/// Definition structure for memory block allocation.\n/// \\note CAN BE CHANGED: \\b os_pool_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_pool_def  {\n  uint32_t                 pool_sz;    ///< number of items (elements) in the pool\n  uint32_t                 item_sz;    ///< size of an item\n  void                       *pool;    ///< pointer to memory for pool\n} osPoolDef_t;\n\n/// Definition structure for message queue.\n/// \\note CAN BE CHANGED: \\b os_messageQ_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_messageQ_def  {\n  uint32_t                queue_sz;    ///< number of elements in the queue\n  void                       *pool;    ///< memory array for messages\n} osMessageQDef_t;\n\n/// Definition structure for mail queue.\n/// \\note CAN BE CHANGED: \\b os_mailQ_def is implementation specific in every CMSIS-RTOS.\ntypedef struct os_mailQ_def  {\n  uint32_t                queue_sz;    ///< number of elements in the queue\n  uint32_t                 item_sz;    ///< size of an item\n  void                       *pool;    ///< memory array for mail\n} osMailQDef_t;\n\n/// Event structure contains detailed information about an event.\n/// \\note MUST REMAIN UNCHANGED: \\b os_event shall be consistent in every CMSIS-RTOS.\n///       However the struct may be extended at the end.\ntypedef struct  {\n  osStatus                 status;     ///< status code: event or error information\n  union  {\n    uint32_t                    v;     ///< message as 32-bit value\n    void                       *p;     ///< message or mail as void pointer\n    int32_t               signals;     ///< signal flags\n  } value;                             ///< event value\n  union  {\n    osMailQId             mail_id;     ///< mail id obtained by \\ref osMailCreate\n    osMessageQId       message_id;     ///< message id obtained by \\ref osMessageCreate\n  } def;                               ///< event definition\n} osEvent;\n\n\n//  ==== Kernel Control Functions ====\n\n/// Initialize the RTOS Kernel for creating objects.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelInitialize shall be consistent in every CMSIS-RTOS.\nosStatus osKernelInitialize (void);\n\n/// Start the RTOS Kernel.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelStart shall be consistent in every CMSIS-RTOS.\nosStatus osKernelStart (void);\n\n/// Check if the RTOS kernel is already started.\n/// \\note MUST REMAIN UNCHANGED: \\b osKernelRunning shall be consistent in every CMSIS-RTOS.\n/// \\return 0 RTOS is not started, 1 RTOS is started.\nint32_t osKernelRunning(void);\n\n\n//  ==== Thread Management ====\n\n/// Create a Thread Definition with function, priority, and stack requirements.\n/// \\param         name         name of the thread function.\n/// \\param         priority     initial priority of the thread function.\n/// \\param         instances    number of possible thread instances.\n/// \\param         stacksz      stack size (in bytes) requirements for the thread function.\n/// \\note CAN BE CHANGED: The parameters to \\b osThreadDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osThreadDef(name, priority, instances, stacksz)  \\\nextern const osThreadDef_t os_thread_def_##name\n#else                            // define the object\n#ifdef __MBED_CMSIS_RTOS_CA9\n#define osThreadDef(name, priority, stacksz)  \\\nuint32_t os_thread_def_stack_##name [stacksz / sizeof(uint32_t)]; \\\nconst osThreadDef_t os_thread_def_##name = \\\n{ (name), (priority), 1, (stacksz), (os_thread_def_stack_##name) }\n#else\n#define osThreadDef(name, priority, instances, stacksz)  \\\nconst osThreadDef_t os_thread_def_##name = \\\n{ (name), (priority), (instances), (stacksz)  }\n#endif\n#endif\n\n/// Access a Thread definition.\n/// \\param         name          name of the thread definition object.\n/// \\note CAN BE CHANGED: The parameter to \\b osThread shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osThread(name)  \\\n&os_thread_def_##name\n\n/// Create a thread and add it to Active Threads and set it to state READY.\n/// \\param[in]     thread_def    thread definition referenced with \\ref osThread.\n/// \\param[in]     argument      pointer that is passed to the thread function as start argument.\n/// \\return thread ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadCreate shall be consistent in every CMSIS-RTOS.\nosThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument);\n\n/// Return the thread ID of the current running thread.\n/// \\return thread ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadGetId shall be consistent in every CMSIS-RTOS.\nosThreadId osThreadGetId (void);\n\n/// Terminate execution of a thread and remove it from Active Threads.\n/// \\param[in]     thread_id   thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadTerminate shall be consistent in every CMSIS-RTOS.\nosStatus osThreadTerminate (osThreadId thread_id);\n\n/// Pass control to next thread that is in state \\b READY.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadYield shall be consistent in every CMSIS-RTOS.\nosStatus osThreadYield (void);\n\n/// Change priority of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     priority      new priority value for the thread function.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadSetPriority shall be consistent in every CMSIS-RTOS.\nosStatus osThreadSetPriority (osThreadId thread_id, osPriority priority);\n\n/// Get current priority of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return current priority value of the thread function.\n/// \\note MUST REMAIN UNCHANGED: \\b osThreadGetPriority shall be consistent in every CMSIS-RTOS.\nosPriority osThreadGetPriority (osThreadId thread_id);\n\n#ifdef __MBED_CMSIS_RTOS_CA9\n/// Get current thread state.\nuint8_t osThreadGetState (osThreadId thread_id);\n#endif\n\n//  ==== Generic Wait Functions ====\n\n/// Wait for Timeout (Time Delay).\n/// \\param[in]     millisec      time delay value\n/// \\return status code that indicates the execution status of the function.\nosStatus osDelay (uint32_t millisec);\n\n#if (defined (osFeature_Wait)  &&  (osFeature_Wait != 0))     // Generic Wait available\n\n/// Wait for Signal, Message, Mail, or Timeout.\n/// \\param[in] millisec          timeout value or 0 in case of no time-out\n/// \\return event that contains signal, message, or mail information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osWait shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osWait (uint32_t millisec);\n\n#endif  // Generic Wait available\n\n\n//  ==== Timer Management Functions ====\n/// Define a Timer object.\n/// \\param         name          name of the timer object.\n/// \\param         function      name of the timer call back function.\n/// \\note CAN BE CHANGED: The parameter to \\b osTimerDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osTimerDef(name, function)  \\\nextern const osTimerDef_t os_timer_def_##name\n#else                            // define the object\n#define osTimerDef(name, function)  \\\nuint32_t os_timer_cb_##name[5]; \\\nconst osTimerDef_t os_timer_def_##name = \\\n{ (function), (os_timer_cb_##name) }\n#endif\n\n/// Access a Timer definition.\n/// \\param         name          name of the timer object.\n/// \\note CAN BE CHANGED: The parameter to \\b osTimer shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osTimer(name) \\\n&os_timer_def_##name\n\n/// Create a timer.\n/// \\param[in]     timer_def     timer object referenced with \\ref osTimer.\n/// \\param[in]     type          osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.\n/// \\param[in]     argument      argument to the timer call back function.\n/// \\return timer ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerCreate shall be consistent in every CMSIS-RTOS.\nosTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument);\n\n/// Start or restart a timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\param[in]     millisec      time delay value of the timer.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerStart shall be consistent in every CMSIS-RTOS.\nosStatus osTimerStart (osTimerId timer_id, uint32_t millisec);\n\n/// Stop the timer.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerStop shall be consistent in every CMSIS-RTOS.\nosStatus osTimerStop (osTimerId timer_id);\n\n/// Delete a timer that was created by \\ref osTimerCreate.\n/// \\param[in]     timer_id      timer ID obtained by \\ref osTimerCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osTimerDelete shall be consistent in every CMSIS-RTOS.\nosStatus osTimerDelete (osTimerId timer_id);\n\n\n//  ==== Signal Management ====\n\n/// Set the specified Signal Flags of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     signals       specifies the signal flags of the thread that should be set.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalSet shall be consistent in every CMSIS-RTOS.\nint32_t osSignalSet (osThreadId thread_id, int32_t signals);\n\n/// Clear the specified Signal Flags of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\param[in]     signals       specifies the signal flags of the thread that shall be cleared.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalClear shall be consistent in every CMSIS-RTOS.\nint32_t osSignalClear (osThreadId thread_id, int32_t signals);\n\n/// Get Signal Flags status of an active thread.\n/// \\param[in]     thread_id     thread ID obtained by \\ref osThreadCreate or \\ref osThreadGetId.\n/// \\return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalGet shall be consistent in every CMSIS-RTOS.\nint32_t osSignalGet (osThreadId thread_id);\n\n/// Wait for one or more Signal Flags to become signaled for the current \\b RUNNING thread.\n/// \\param[in]     signals       wait until all specified signal flags set or 0 for any single signal flag.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return event flag information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osSignalWait shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osSignalWait (int32_t signals, uint32_t millisec);\n\n\n//  ==== Mutex Management ====\n\n/// Define a Mutex.\n/// \\param         name          name of the mutex object.\n/// \\note CAN BE CHANGED: The parameter to \\b osMutexDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMutexDef(name)  \\\nextern const osMutexDef_t os_mutex_def_##name\n#else                            // define the object\n#define osMutexDef(name)  \\\nuint32_t os_mutex_cb_##name[3]; \\\nconst osMutexDef_t os_mutex_def_##name = { (os_mutex_cb_##name) }\n#endif\n\n/// Access a Mutex definition.\n/// \\param         name          name of the mutex object.\n/// \\note CAN BE CHANGED: The parameter to \\b osMutex shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMutex(name)  \\\n&os_mutex_def_##name\n\n/// Create and Initialize a Mutex object.\n/// \\param[in]     mutex_def     mutex definition referenced with \\ref osMutex.\n/// \\return mutex ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexCreate shall be consistent in every CMSIS-RTOS.\nosMutexId osMutexCreate (const osMutexDef_t *mutex_def);\n\n/// Wait until a Mutex becomes available.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexWait shall be consistent in every CMSIS-RTOS.\nosStatus osMutexWait (osMutexId mutex_id, uint32_t millisec);\n\n/// Release a Mutex that was obtained by \\ref osMutexWait.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexRelease shall be consistent in every CMSIS-RTOS.\nosStatus osMutexRelease (osMutexId mutex_id);\n\n/// Delete a Mutex that was created by \\ref osMutexCreate.\n/// \\param[in]     mutex_id      mutex ID obtained by \\ref osMutexCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMutexDelete shall be consistent in every CMSIS-RTOS.\nosStatus osMutexDelete (osMutexId mutex_id);\n\n\n//  ==== Semaphore Management Functions ====\n\n#if (defined (osFeature_Semaphore)  &&  (osFeature_Semaphore != 0))     // Semaphore available\n\n/// Define a Semaphore object.\n/// \\param         name          name of the semaphore object.\n/// \\note CAN BE CHANGED: The parameter to \\b osSemaphoreDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osSemaphoreDef(name)  \\\nextern const osSemaphoreDef_t os_semaphore_def_##name\n#else                            // define the object\n#define osSemaphoreDef(name)  \\\nuint32_t os_semaphore_cb_##name[2]; \\\nconst osSemaphoreDef_t os_semaphore_def_##name = { (os_semaphore_cb_##name) }\n#endif\n\n/// Access a Semaphore definition.\n/// \\param         name          name of the semaphore object.\n/// \\note CAN BE CHANGED: The parameter to \\b osSemaphore shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osSemaphore(name)  \\\n&os_semaphore_def_##name\n\n/// Create and Initialize a Semaphore object used for managing resources.\n/// \\param[in]     semaphore_def semaphore definition referenced with \\ref osSemaphore.\n/// \\param[in]     count         number of available resources.\n/// \\return semaphore ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreCreate shall be consistent in every CMSIS-RTOS.\nosSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count);\n\n/// Wait until a Semaphore token becomes available.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return number of available tokens, or -1 in case of incorrect parameters.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreWait shall be consistent in every CMSIS-RTOS.\nint32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);\n\n/// Release a Semaphore token.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreRelease shall be consistent in every CMSIS-RTOS.\nosStatus osSemaphoreRelease (osSemaphoreId semaphore_id);\n\n/// Delete a Semaphore that was created by \\ref osSemaphoreCreate.\n/// \\param[in]     semaphore_id  semaphore object referenced with \\ref osSemaphoreCreate.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osSemaphoreDelete shall be consistent in every CMSIS-RTOS.\nosStatus osSemaphoreDelete (osSemaphoreId semaphore_id);\n\n#endif     // Semaphore available\n\n\n//  ==== Memory Pool Management Functions ====\n\n#if (defined (osFeature_Pool)  &&  (osFeature_Pool != 0))  // Memory Pool Management available\n\n/// \\brief Define a Memory Pool.\n/// \\param         name          name of the memory pool.\n/// \\param         no            maximum number of blocks (objects) in the memory pool.\n/// \\param         type          data type of a single block (object).\n/// \\note CAN BE CHANGED: The parameter to \\b osPoolDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osPoolDef(name, no, type)   \\\nextern const osPoolDef_t os_pool_def_##name\n#else                            // define the object\n#define osPoolDef(name, no, type)   \\\nuint32_t os_pool_m_##name[3+((sizeof(type)+3)/4)*(no)]; \\\nconst osPoolDef_t os_pool_def_##name = \\\n{ (no), sizeof(type), (os_pool_m_##name) }\n#endif\n\n/// \\brief Access a Memory Pool definition.\n/// \\param         name          name of the memory pool\n/// \\note CAN BE CHANGED: The parameter to \\b osPool shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osPool(name) \\\n&os_pool_def_##name\n\n/// Create and Initialize a memory pool.\n/// \\param[in]     pool_def      memory pool definition referenced with \\ref osPool.\n/// \\return memory pool ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolCreate shall be consistent in every CMSIS-RTOS.\nosPoolId osPoolCreate (const osPoolDef_t *pool_def);\n\n/// Allocate a memory block from a memory pool.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osPoolAlloc (osPoolId pool_id);\n\n/// Allocate a memory block from a memory pool and set memory block to zero.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\return address of the allocated memory block or NULL in case of no memory available.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolCAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osPoolCAlloc (osPoolId pool_id);\n\n/// Return an allocated memory block back to a specific memory pool.\n/// \\param[in]     pool_id       memory pool ID obtain referenced with \\ref osPoolCreate.\n/// \\param[in]     block         address of the allocated memory block that is returned to the memory pool.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osPoolFree shall be consistent in every CMSIS-RTOS.\nosStatus osPoolFree (osPoolId pool_id, void *block);\n\n#endif   // Memory Pool Management available\n\n\n//  ==== Message Queue Management Functions ====\n\n#if (defined (osFeature_MessageQ)  &&  (osFeature_MessageQ != 0))     // Message Queues available\n\n/// \\brief Create a Message Queue Definition.\n/// \\param         name          name of the queue.\n/// \\param         queue_sz      maximum number of messages in the queue.\n/// \\param         type          data type of a single message element (for debugger).\n/// \\note CAN BE CHANGED: The parameter to \\b osMessageQDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMessageQDef(name, queue_sz, type)   \\\nextern const osMessageQDef_t os_messageQ_def_##name\n#else                            // define the object\n#define osMessageQDef(name, queue_sz, type)   \\\nuint32_t os_messageQ_q_##name[4+(queue_sz)]; \\\nconst osMessageQDef_t os_messageQ_def_##name = \\\n{ (queue_sz), (os_messageQ_q_##name) }\n#endif\n\n/// \\brief Access a Message Queue Definition.\n/// \\param         name          name of the queue\n/// \\note CAN BE CHANGED: The parameter to \\b osMessageQ shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMessageQ(name) \\\n&os_messageQ_def_##name\n\n/// Create and Initialize a Message Queue.\n/// \\param[in]     queue_def     queue definition referenced with \\ref osMessageQ.\n/// \\param[in]     thread_id     thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return message queue ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessageCreate shall be consistent in every CMSIS-RTOS.\nosMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id);\n\n/// Put a Message to a Queue.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in]     info          message information.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessagePut shall be consistent in every CMSIS-RTOS.\nosStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec);\n\n/// Get a Message or Wait for a Message from a Queue.\n/// \\param[in]     queue_id      message queue ID obtained with \\ref osMessageCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out.\n/// \\return event information that includes status code.\n/// \\note MUST REMAIN UNCHANGED: \\b osMessageGet shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);\n\n#endif     // Message Queues available\n\n\n//  ==== Mail Queue Management Functions ====\n\n#if (defined (osFeature_MailQ)  &&  (osFeature_MailQ != 0))     // Mail Queues available\n\n/// \\brief Create a Mail Queue Definition.\n/// \\param         name          name of the queue\n/// \\param         queue_sz      maximum number of messages in queue\n/// \\param         type          data type of a single message element\n/// \\note CAN BE CHANGED: The parameter to \\b osMailQDef shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#if defined (osObjectsExternal)  // object is external\n#define osMailQDef(name, queue_sz, type) \\\nextern const osMailQDef_t os_mailQ_def_##name\n#else                            // define the object\n#define osMailQDef(name, queue_sz, type) \\\nuint32_t os_mailQ_q_##name[4+(queue_sz)]; \\\nuint32_t os_mailQ_m_##name[3+((sizeof(type)+3)/4)*(queue_sz)]; \\\nvoid *   os_mailQ_p_##name[2] = { (os_mailQ_q_##name), os_mailQ_m_##name }; \\\nconst osMailQDef_t os_mailQ_def_##name =  \\\n{ (queue_sz), sizeof(type), (os_mailQ_p_##name) }\n#endif\n\n/// \\brief Access a Mail Queue Definition.\n/// \\param         name          name of the queue\n/// \\note CAN BE CHANGED: The parameter to \\b osMailQ shall be consistent but the\n///       macro body is implementation specific in every CMSIS-RTOS.\n#define osMailQ(name)  \\\n&os_mailQ_def_##name\n\n/// Create and Initialize mail queue.\n/// \\param[in]     queue_def     reference to the mail queue definition obtain with \\ref osMailQ\n/// \\param[in]     thread_id     thread ID (obtained by \\ref osThreadCreate or \\ref osThreadGetId) or NULL.\n/// \\return mail queue ID for reference by other functions or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailCreate shall be consistent in every CMSIS-RTOS.\nosMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id);\n\n/// Allocate a memory block from a mail.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osMailAlloc (osMailQId queue_id, uint32_t millisec);\n\n/// Allocate a memory block from a mail and set memory block to zero.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return pointer to memory block that can be filled with mail or NULL in case of error.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailCAlloc shall be consistent in every CMSIS-RTOS.\nvoid *osMailCAlloc (osMailQId queue_id, uint32_t millisec);\n\n/// Put a mail to a queue.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     mail          memory block previously allocated with \\ref osMailAlloc or \\ref osMailCAlloc.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailPut shall be consistent in every CMSIS-RTOS.\nosStatus osMailPut (osMailQId queue_id, void *mail);\n\n/// Get a mail from a queue.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     millisec      timeout value or 0 in case of no time-out\n/// \\return event that contains mail information or error code.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailGet shall be consistent in every CMSIS-RTOS.\nos_InRegs osEvent osMailGet (osMailQId queue_id, uint32_t millisec);\n\n/// Free a memory block from a mail.\n/// \\param[in]     queue_id      mail queue ID obtained with \\ref osMailCreate.\n/// \\param[in]     mail          pointer to the memory block that was obtained with \\ref osMailGet.\n/// \\return status code that indicates the execution status of the function.\n/// \\note MUST REMAIN UNCHANGED: \\b osMailFree shall be consistent in every CMSIS-RTOS.\nosStatus osMailFree (osMailQId queue_id, void *mail);\n\n#endif  // Mail Queues available\n\n\n#ifdef  __cplusplus\n}\n#endif\n\n#endif  // _CMSIS_OS_H\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_CMSIS.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    rt_CMSIS.c\n *      Purpose: CMSIS RTOS API\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#define __CMSIS_GENERIC\n\n#include \"cmsis.h\"\n\n#include \"RTX_Config.h\"\n#include \"rt_Event.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Mailbox.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_Memory.h\"\n#include \"rt_Mutex.h\"\n#include \"rt_Semaphore.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n#define os_thread_cb OS_TCB\n\n#include \"cmsis_os.h\"\n\n#if (osFeature_Signals != 16)\n#error Invalid \"osFeature_Signals\" value!\n#endif\n#if (osFeature_Semaphore > 65535)\n#error Invalid \"osFeature_Semaphore\" value!\n#endif\n#if (osFeature_Wait != 0)\n#error osWait not supported!\n#endif\n\n// ==== Enumeration, structures, defines ====\n\n// Service Calls defines\n\n#if defined(__CC_ARM) /* ARM Compiler */\n\n#define __NO_RETURN __declspec(noreturn)\n\n#define osEvent_type osEvent\n#define osEvent_ret_status ret\n#define osEvent_ret_value ret\n#define osEvent_ret_msg ret\n#define osEvent_ret_mail ret\n\n#define osCallback_type osCallback\n#define osCallback_ret ret\n\n#define SVC_0_1(f, t, ...)                                                     \\\n  __svc_indirect(0) t _##f(t (*)());                                           \\\n  t f(void);                                                                   \\\n  __attribute__((always_inline)) static __inline t __##f(void) {               \\\n    return _##f(f);                                                            \\\n  }\n\n#define SVC_1_1(f, t, t1, ...)                                                 \\\n  __svc_indirect(0) t _##f(t (*)(t1), t1);                                     \\\n  t f(t1 a1);                                                                  \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1) {              \\\n    return _##f(f, a1);                                                        \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, ...)                                             \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2), t1, t2);                             \\\n  t f(t1 a1, t2 a2);                                                           \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2) {       \\\n    return _##f(f, a1, a2);                                                    \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, ...)                                         \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2, t3), t1, t2, t3);                     \\\n  t f(t1 a1, t2 a2, t3 a3);                                                    \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2,         \\\n                                                         t3 a3) {              \\\n    return _##f(f, a1, a2, a3);                                                \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, ...)                                     \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2, t3, t4), t1, t2, t3, t4);             \\\n  t f(t1 a1, t2 a2, t3 a3, t4 a4);                                             \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2, t3 a3,  \\\n                                                         t4 a4) {              \\\n    return _##f(f, a1, a2, a3, a4);                                            \\\n  }\n\n#define SVC_1_2 SVC_1_1\n#define SVC_1_3 SVC_1_1\n#define SVC_2_3 SVC_2_1\n\n#elif defined(__GNUC__) /* GNU Compiler */\n\n#define __NO_RETURN __attribute__((noreturn))\n\ntypedef uint32_t __attribute__((vector_size(8))) ret64;\ntypedef uint32_t __attribute__((vector_size(16))) ret128;\n\n#define RET_pointer __r0\n#define RET_int32_t __r0\n#define RET_uint32_t __r0\n#define RET_osStatus __r0\n#define RET_osPriority __r0\n#define RET_osEvent                                                            \\\n  {                                                                            \\\n    (osStatus) __r0, {(uint32_t)__r1}, { (void *)__r2 }                        \\\n  }\n#define RET_osCallback                                                         \\\n  { (void *)__r0, (void *)__r1 }\n\n#if defined(__ARM_PCS_VFP)\n\n#define osEvent_type void\n#define osEvent_ret_status                                                     \\\n  {                                                                            \\\n    __asm(\"MOV r0, %0;\"                                                        \\\n          : /* no outputs */                                                   \\\n          : \"r\"(ret.status)                                                    \\\n          : \"r0\");                                                             \\\n  }\n#define osEvent_ret_value                                                      \\\n  {                                                                            \\\n    __asm(\"MOV r1, %0;\"                                                        \\\n          \"MOV r0, %1;\"                                                        \\\n          : /* no outputs */                                                   \\\n          : \"r\"(ret.value.v), \"r\"(ret.status)                                  \\\n          : \"r0\", \"r1\");                                                       \\\n  }\n#define osEvent_ret_msg                                                        \\\n  {                                                                            \\\n    __asm(\"MOV r2, %0;\"                                                        \\\n          \"MOV r1, %1;\"                                                        \\\n          \"MOV r0, %2;\"                                                        \\\n          : /* no outputs */                                                   \\\n          : \"r\"(ret.def.message_id), \"r\"(ret.value.v), \"r\"(ret.status)         \\\n          : \"r0\", \"r1\", \"r2\");                                                 \\\n  }\n\n#define osEvent_ret_mail                                                       \\\n  {                                                                            \\\n    __asm(\"MOV r2, %0;\"                                                        \\\n          \"MOV r1, %1;\"                                                        \\\n          \"MOV r0, %2;\"                                                        \\\n          : /* no outputs */                                                   \\\n          : \"r\"(ret.def.mail_id), \"r\"(ret.value.v), \"r\"(ret.status)            \\\n          : \"r0\", \"r1\", \"r2\");                                                 \\\n  }\n\n#define osCallback_type void\n#define osCallback_ret                                                         \\\n  {                                                                            \\\n    __asm(\"MOV r1, %0;\"                                                        \\\n          \"MOV r0, %1;\"                                                        \\\n          : /* no outputs */                                                   \\\n          : \"r\"(ret.arg), \"r\"(ret.fp)                                          \\\n          : \"r0\", \"r1\");                                                       \\\n  }\n\n#else /* defined (__ARM_PCS_VFP) */\n\n#define osEvent_type ret128\n#define osEvent_ret_status                                                     \\\n  (ret128) { ret.status }\n#define osEvent_ret_value                                                      \\\n  (ret128) { ret.status, ret.value.v }\n#define osEvent_ret_msg                                                        \\\n  (ret128) { ret.status, ret.value.v, (uint32_t)ret.def.message_id }\n#define osEvent_ret_mail                                                       \\\n  (ret128) { ret.status, ret.value.v, (uint32_t)ret.def.mail_id }\n\n#define osCallback_type ret64\n#define osCallback_ret                                                         \\\n  (ret64) { (uint32_t) ret.fp, (uint32_t)ret.arg }\n\n#endif /* defined (__ARM_PCS_VFP) */\n\n#define SVC_ArgN(n) register int __r##n __asm(\"r\" #n);\n\n#define SVC_ArgR(n, t, a) register t __r##n __asm(\"r\" #n) = a;\n\n#define SVC_Arg0() SVC_ArgN(0) SVC_ArgN(1) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg1(t1) SVC_ArgR(0, t1, a1) SVC_ArgN(1) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg2(t1, t2)                                                       \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg3(t1, t2, t3)                                                   \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgR(2, t3, a3) SVC_ArgN(3)\n\n#define SVC_Arg4(t1, t2, t3, t4)                                               \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgR(2, t3, a3)                  \\\n      SVC_ArgR(3, t4, a4)\n\n#if (defined(__CORTEX_M0))\n#define SVC_Call(f)                                                            \\\n  __asm volatile(\"ldr r7,=\" #f \"\\n\\t\"                                          \\\n                 \"mov r12,r7\\n\\t\"                                              \\\n                 \"svc 0\"                                                       \\\n                 : \"=r\"(__r0), \"=r\"(__r1), \"=r\"(__r2), \"=r\"(__r3)              \\\n                 : \"r\"(__r0), \"r\"(__r1), \"r\"(__r2), \"r\"(__r3)                  \\\n                 : \"r7\", \"r12\", \"lr\", \"cc\");\n#else\n#define SVC_Call(f)                                                            \\\n  __asm volatile(\"ldr r12,=\" #f \"\\n\\t\"                                         \\\n                 \"svc 0\"                                                       \\\n                 : \"=r\"(__r0), \"=r\"(__r1), \"=r\"(__r2), \"=r\"(__r3)              \\\n                 : \"r\"(__r0), \"r\"(__r1), \"r\"(__r2), \"r\"(__r3)                  \\\n                 : \"r12\", \"lr\", \"cc\");\n#endif\n\n#define SVC_0_1(f, t, rv)                                                      \\\n  __attribute__((always_inline)) static inline t __##f(void) {                 \\\n    SVC_Arg0();                                                                \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_1_1(f, t, t1, rv)                                                  \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1) {                \\\n    SVC_Arg1(t1);                                                              \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, rv)                                              \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2) {         \\\n    SVC_Arg2(t1, t2);                                                          \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, rv)                                          \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2, t3 a3) {  \\\n    SVC_Arg3(t1, t2, t3);                                                      \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, rv)                                      \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2, t3 a3,    \\\n                                                       t4 a4) {                \\\n    SVC_Arg4(t1, t2, t3, t4);                                                  \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_1_2 SVC_1_1\n#define SVC_1_3 SVC_1_1\n#define SVC_2_3 SVC_2_1\n\n#elif defined(__ICCARM__) /* IAR Compiler */\n\n#define __NO_RETURN __noreturn\n\n#define RET_osEvent \"=r\"(ret.status), \"=r\"(ret.value), \"=r\"(ret.def)\n#define RET_osCallback \"=r\"(ret.fp), \"=r\"(ret.arg)\n\n#define osEvent_type osEvent\n#define osEvent_ret_status ret\n#define osEvent_ret_value ret\n#define osEvent_ret_msg ret\n#define osEvent_ret_mail ret\n\n#define osCallback_type uint64_t\n#define osCallback_ret ((uint64_t)ret.fp | ((uint64_t)ret.arg) << 32)\n\n#define SVC_Setup(f) __asm(\"mov r12,%0\\n\" ::\"r\"(&f) : \"r12\");\n\n#define SVC_Ret3()                                                             \\\n  __asm(\"ldr r0,[sp,#0]\\n\"                                                     \\\n        \"ldr r1,[sp,#4]\\n\"                                                     \\\n        \"ldr r2,[sp,#8]\\n\");\n\n#define SVC_0_1(f, t, ...)                                                     \\\n  t f(void);                                                                   \\\n  _Pragma(\"swi_number=0\") __swi t _##f(void);                                  \\\n  static inline t __##f(void) {                                                \\\n    SVC_Setup(f);                                                              \\\n    return _##f();                                                             \\\n  }\n\n#define SVC_1_1(f, t, t1, ...)                                                 \\\n  t f(t1 a1);                                                                  \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1);                                 \\\n  static inline t __##f(t1 a1) {                                               \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1);                                                           \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, ...)                                             \\\n  t f(t1 a1, t2 a2);                                                           \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2);                          \\\n  static inline t __##f(t1 a1, t2 a2) {                                        \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2);                                                       \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, ...)                                         \\\n  t f(t1 a1, t2 a2, t3 a3);                                                    \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2, t3 a3);                   \\\n  static inline t __##f(t1 a1, t2 a2, t3 a3) {                                 \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2, a3);                                                   \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, ...)                                     \\\n  t f(t1 a1, t2 a2, t3 a3, t4 a4);                                             \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2, t3 a3, t4 a4);            \\\n  static inline t __##f(t1 a1, t2 a2, t3 a3, t4 a4) {                          \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2, a3, a4);                                               \\\n  }\n\n#define SVC_1_2(f, t, t1, rr)                                                  \\\n  uint64_t f(t1 a1);                                                           \\\n  _Pragma(\"swi_number=0\") __swi uint64_t _##f(t1 a1);                          \\\n  static inline t __##f(t1 a1) {                                               \\\n    t ret;                                                                     \\\n    SVC_Setup(f);                                                              \\\n    _##f(a1);                                                                  \\\n    __asm(\"\" : rr : :);                                                        \\\n    return ret;                                                                \\\n  }\n\n#define SVC_1_3(f, t, t1, rr)                                                  \\\n  t f(t1 a1);                                                                  \\\n  void f##_(t1 a1) {                                                           \\\n    f(a1);                                                                     \\\n    SVC_Ret3();                                                                \\\n  }                                                                            \\\n  _Pragma(\"swi_number=0\") __swi void _##f(t1 a1);                              \\\n  static inline t __##f(t1 a1) {                                               \\\n    t ret;                                                                     \\\n    SVC_Setup(f##_);                                                           \\\n    _##f(a1);                                                                  \\\n    __asm(\"\" : rr : :);                                                        \\\n    return ret;                                                                \\\n  }\n\n#define SVC_2_3(f, t, t1, t2, rr)                                              \\\n  t f(t1 a1, t2 a2);                                                           \\\n  void f##_(t1 a1, t2 a2) {                                                    \\\n    f(a1, a2);                                                                 \\\n    SVC_Ret3();                                                                \\\n  }                                                                            \\\n  _Pragma(\"swi_number=0\") __swi void _##f(t1 a1, t2 a2);                       \\\n  static inline t __##f(t1 a1, t2 a2) {                                        \\\n    t ret;                                                                     \\\n    SVC_Setup(f##_);                                                           \\\n    _##f(a1, a2);                                                              \\\n    __asm(\"\" : rr : :);                                                        \\\n    return ret;                                                                \\\n  }\n\n#endif\n\n// Callback structure\ntypedef struct {\n  void *fp;  // Function pointer\n  void *arg; // Function argument\n} osCallback;\n\n// OS Section definitions\n#ifdef OS_SECTIONS_LINK_INFO\nextern const uint32_t os_section_id$$Base;\nextern const uint32_t os_section_id$$Limit;\n#endif\n\n#ifndef __MBED_CMSIS_RTOS_CA9\n// OS Stack Memory for Threads definitions\nextern uint64_t os_stack_mem[];\nextern const uint32_t os_stack_sz;\n#endif\n\n// OS Timers external resources\nextern const osThreadDef_t os_thread_def_osTimerThread;\nextern osThreadId osThreadId_osTimerThread;\nextern const osMessageQDef_t os_messageQ_def_osTimerMessageQ;\nextern osMessageQId osMessageQId_osTimerMessageQ;\n\nextern U32 IRQNestLevel; /* Indicates whether inside an ISR, and the depth of\n                            nesting.  0 = not in ISR. */\n\n// ==== Helper Functions ====\n\n/// Convert timeout in millisec to system ticks\nstatic uint32_t rt_ms2tick(uint32_t millisec) {\n  uint32_t tick;\n\n  if (millisec == osWaitForever)\n    return 0xFFFF; // Indefinite timeout\n  if (millisec > 4000000)\n    return 0xFFFE; // Max ticks supported\n\n  tick = ((1000 * millisec) + os_clockrate - 1) / os_clockrate;\n  if (tick > 0xFFFE)\n    return 0xFFFE;\n\n  return tick;\n}\n\n/// Convert Thread ID to TCB pointer\nstatic P_TCB rt_tid2ptcb(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  if (thread_id == NULL)\n    return NULL;\n\n  if ((uint32_t)thread_id & 3)\n    return NULL;\n\n#ifdef OS_SECTIONS_LINK_INFO\n  if ((os_section_id$$Base != 0) && (os_section_id$$Limit != 0)) {\n    if (thread_id < (osThreadId)os_section_id$$Base)\n      return NULL;\n    if (thread_id >= (osThreadId)os_section_id$$Limit)\n      return NULL;\n  }\n#endif\n\n  ptcb = thread_id;\n\n  if (ptcb->cb_type != TCB)\n    return NULL;\n\n  return ptcb;\n}\n\n/// Convert ID pointer to Object pointer\nstatic void *rt_id2obj(void *id) {\n\n  if ((uint32_t)id & 3)\n    return NULL;\n\n#ifdef OS_SECTIONS_LINK_INFO\n  if ((os_section_id$$Base != 0) && (os_section_id$$Limit != 0)) {\n    if (id < (void *)os_section_id$$Base)\n      return NULL;\n    if (id >= (void *)os_section_id$$Limit)\n      return NULL;\n  }\n#endif\n\n  return id;\n}\n\n// === Helper functions for system call interface ===\n\nstatic __inline char __get_mode(void) { return (char)(__get_CPSR() & 0x1f); }\n\nstatic __inline char __exceptional_mode(void) {\n  switch (__get_mode()) {\n  case MODE_USR:\n  case MODE_SYS:\n    return 0;\n  case MODE_SVC:\n    if (IRQNestLevel == 0)\n      return 0; /* handling a regular service call */\n    else\n      return 1; /* handling an ISR in SVC mode */\n  default:\n    return 1;\n  }\n}\n\n// ==== Kernel Control ====\n\nuint8_t os_initialized; // Kernel Initialized flag\nuint8_t os_running;     // Kernel Running flag\n\n// Kernel Control Service Calls declarations\nSVC_0_1(svcKernelInitialize, osStatus, RET_osStatus)\nSVC_0_1(svcKernelStart, osStatus, RET_osStatus)\nSVC_0_1(svcKernelRunning, int32_t, RET_int32_t)\n\nstatic void sysThreadError(osStatus status);\nosThreadId svcThreadCreate(const osThreadDef_t *thread_def, void *argument);\nosMessageQId svcMessageCreate(const osMessageQDef_t *queue_def,\n                              osThreadId thread_id);\n\n// Kernel Control Service Calls\n\n/// Initialize the RTOS Kernel for creating objects\nosStatus svcKernelInitialize(void) {\n#ifdef __MBED_CMSIS_RTOS_CA9\n  if (!os_initialized) {\n    rt_sys_init(); // RTX System Initialization\n  }\n#else\n  int ret;\n\n  if (!os_initialized) {\n\n    // Init Thread Stack Memory (must be 8-byte aligned)\n    if ((uint32_t)os_stack_mem & 7)\n      return osErrorNoMemory;\n    ret = rt_init_mem(os_stack_mem, os_stack_sz);\n    if (ret != 0)\n      return osErrorNoMemory;\n\n    rt_sys_init(); // RTX System Initialization\n  }\n#endif\n\n  os_tsk.run->prio = 255; // Highest priority\n\n  if (!os_initialized) {\n    // Create OS Timers resources (Message Queue & Thread)\n    osMessageQId_osTimerMessageQ =\n        svcMessageCreate(&os_messageQ_def_osTimerMessageQ, NULL);\n    osThreadId_osTimerThread =\n        svcThreadCreate(&os_thread_def_osTimerThread, NULL);\n  }\n\n  sysThreadError(osOK);\n\n  os_initialized = 1;\n\n  return osOK;\n}\n\n/// Start the RTOS Kernel\nosStatus svcKernelStart(void) {\n\n  if (os_running)\n    return osOK;\n\n  rt_tsk_prio(0, 0);                        // Lowest priority\n  __set_PSP(os_tsk.run->tsk_stack + 8 * 4); // New context\n  os_tsk.run = NULL;                        // Force context switch\n\n  rt_sys_start();\n\n  os_running = 1;\n\n  return osOK;\n}\n\n/// Check if the RTOS kernel is already started\nint32_t svcKernelRunning(void) { return os_running; }\n\n// Kernel Control Public API\n\n/// Initialize the RTOS Kernel for creating objects\nosStatus osKernelInitialize(void) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  if (__get_mode() != MODE_USR) {\n    return svcKernelInitialize();\n  } else {\n    return __svcKernelInitialize();\n  }\n}\n\n/// Start the RTOS Kernel\nosStatus osKernelStart(void) {\n  char mode = __get_mode();\n\n  switch (mode) {\n  case MODE_USR:\n    if (os_flags & 1)\n      return osErrorOS; // Privileged Thread mode requested from Unprivileged\n    break;\n  case MODE_SYS:\n    if (!(os_flags & 1)) {\n      __set_CPS_USR();\n    }\n    break;\n  default:\n    return osErrorISR; // Not allowed in ISR\n  }\n  return __svcKernelStart();\n}\n\n/// Check if the RTOS kernel is already started\nint32_t osKernelRunning(void) {\n  if (__get_mode() != MODE_USR) {\n    return os_running;\n  } else {\n    return __svcKernelRunning();\n  }\n}\n\n// ==== Thread Management ====\n\n/// Set Thread Error (for Create functions which return IDs)\nstatic void sysThreadError(osStatus status) {\n  // To Do\n}\n\n__NO_RETURN void osThreadExit(void);\n\n// Thread Service Calls declarations\nSVC_2_1(svcThreadCreate, osThreadId, const osThreadDef_t *, void *, RET_pointer)\nSVC_0_1(svcThreadGetId, osThreadId, RET_pointer)\nSVC_1_1(svcThreadTerminate, osStatus, osThreadId, RET_osStatus)\nSVC_0_1(svcThreadYield, osStatus, RET_osStatus)\nSVC_2_1(svcThreadSetPriority, osStatus, osThreadId, osPriority, RET_osStatus)\nSVC_1_1(svcThreadGetPriority, osPriority, osThreadId, RET_osPriority)\n\n// Thread Service Calls\n\n/// Create a thread and add it to Active Threads and set it to state READY\nosThreadId svcThreadCreate(const osThreadDef_t *thread_def, void *argument) {\n  P_TCB ptcb;\n  OS_TID tsk;\n  void *stk;\n\n  if ((thread_def == NULL) || (thread_def->pthread == NULL) ||\n      (thread_def->tpriority < osPriorityIdle) ||\n      (thread_def->tpriority > osPriorityRealtime)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n#ifdef __MBED_CMSIS_RTOS_CA9\n  if (thread_def->stacksize != 0) { // Custom stack size\n    stk = (void *)thread_def->stack_pointer;\n  } else { // Default stack size\n    stk = NULL;\n  }\n#else\n  if (thread_def->stacksize != 0) { // Custom stack size\n    stk = rt_alloc_mem(             // Allocate stack\n        os_stack_mem, thread_def->stacksize);\n    if (stk == NULL) {\n      sysThreadError(osErrorNoMemory); // Out of memory\n      return NULL;\n    }\n  } else { // Default stack size\n    stk = NULL;\n  }\n#endif\n\n  tsk = rt_tsk_create(                               // Create task\n      (FUNCP)thread_def->pthread,                    // Task function pointer\n      (thread_def->tpriority - osPriorityIdle + 1) | // Task priority\n          (thread_def->stacksize << 8),              // Task stack size in bytes\n      stk,                                           // Pointer to task's stack\n      argument                                       // Argument to the task\n  );\n\n  if (tsk == 0) { // Invalid task ID\n#ifndef __MBED_CMSIS_RTOS_CA9\n    if (stk != NULL) {\n      rt_free_mem(os_stack_mem, stk); // Free allocated stack\n    }\n#endif\n    sysThreadError(osErrorNoMemory); // Create task failed (Out of memory)\n    return NULL;\n  }\n\n  ptcb = (P_TCB)os_active_TCB[tsk - 1]; // TCB pointer\n\n  *((uint32_t *)ptcb->tsk_stack + 13) = (uint32_t)osThreadExit;\n\n  return ptcb;\n}\n\n/// Return the thread ID of the current running thread\nosThreadId svcThreadGetId(void) {\n  OS_TID tsk;\n\n  tsk = rt_tsk_self();\n  if (tsk == 0)\n    return NULL;\n  return (P_TCB)os_active_TCB[tsk - 1];\n}\n\n/// Terminate execution of a thread and remove it from ActiveThreads\nosStatus svcThreadTerminate(osThreadId thread_id) {\n  OS_RESULT res;\n  P_TCB ptcb;\n#ifndef __MBED_CMSIS_RTOS_CA9\n  void *stk;\n#endif\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n#ifndef __MBED_CMSIS_RTOS_CA9\n  stk = ptcb->priv_stack ? ptcb->stack : NULL; // Private stack\n#endif\n\n  res = rt_tsk_delete(ptcb->task_id); // Delete task\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Delete task failed\n\n#ifndef __MBED_CMSIS_RTOS_CA9\n  if (stk != NULL) {\n    rt_free_mem(os_stack_mem, stk); // Free private stack\n  }\n#endif\n\n  return osOK;\n}\n\n/// Pass control to next thread that is in state READY\nosStatus svcThreadYield(void) {\n  rt_tsk_pass(); // Pass control to next task\n  return osOK;\n}\n\n/// Change priority of an active thread\nosStatus svcThreadSetPriority(osThreadId thread_id, osPriority priority) {\n  OS_RESULT res;\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n  if ((priority < osPriorityIdle) || (priority > osPriorityRealtime)) {\n    return osErrorValue;\n  }\n\n  res = rt_tsk_prio(                // Change task priority\n      ptcb->task_id,                // Task ID\n      priority - osPriorityIdle + 1 // New task priority\n  );\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Change task priority failed\n\n  return osOK;\n}\n\n/// Get current priority of an active thread\nosPriority svcThreadGetPriority(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osPriorityError;\n\n  return (osPriority)(ptcb->prio - 1 + osPriorityIdle);\n}\n\n// Thread Public API\n\n/// Create a thread and add it to Active Threads and set it to state READY\nosThreadId osThreadCreate(const osThreadDef_t *thread_def, void *argument) {\n  if (__exceptional_mode())\n    return NULL; // Not allowed in ISR\n  if ((__get_mode() != MODE_USR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcThreadCreate(thread_def, argument);\n  } else {\n    return __svcThreadCreate(thread_def, argument);\n  }\n}\n\n/// Return the thread ID of the current running thread\nosThreadId osThreadGetId(void) {\n  if (__exceptional_mode())\n    return NULL; // Not allowed in ISR\n  return __svcThreadGetId();\n}\n\n/// Terminate execution of a thread and remove it from ActiveThreads\nosStatus osThreadTerminate(osThreadId thread_id) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadTerminate(thread_id);\n}\n\n/// Pass control to next thread that is in state READY\nosStatus osThreadYield(void) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadYield();\n}\n\n/// Change priority of an active thread\nosStatus osThreadSetPriority(osThreadId thread_id, osPriority priority) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadSetPriority(thread_id, priority);\n}\n\n/// Get current priority of an active thread\nosPriority osThreadGetPriority(osThreadId thread_id) {\n  if (__exceptional_mode())\n    return osPriorityError; // Not allowed in ISR\n  return __svcThreadGetPriority(thread_id);\n}\n\n/// INTERNAL - Not Public\n/// Auto Terminate Thread on exit (used implicitly when thread exists)\n__NO_RETURN void osThreadExit(void) {\n  __svcThreadTerminate(__svcThreadGetId());\n  for (;;)\n    ; // Should never come here\n}\n\n#ifdef __MBED_CMSIS_RTOS_CA9\n/// Get current thread state\nuint8_t osThreadGetState(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n  return ptcb->state;\n}\n#endif\n\n// ==== Generic Wait Functions ====\n\n// Generic Wait Service Calls declarations\nSVC_1_1(svcDelay, osStatus, uint32_t, RET_osStatus)\n#if osFeature_Wait != 0\nSVC_1_3(svcWait, os_InRegs osEvent, uint32_t, RET_osEvent)\n#endif\n\n// Generic Wait Service Calls\n\n/// Wait for Timeout (Time Delay)\nosStatus svcDelay(uint32_t millisec) {\n  if (millisec == 0)\n    return osOK;\n  rt_dly_wait(rt_ms2tick(millisec));\n  return osEventTimeout;\n}\n\n/// Wait for Signal, Message, Mail, or Timeout\n#if osFeature_Wait != 0\nos_InRegs osEvent_type svcWait(uint32_t millisec) {\n  osEvent ret;\n\n  if (millisec == 0) {\n    ret.status = osOK;\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n    osEvent_ret_status;\n    return;\n#else\n    return osEvent_ret_status;\n#endif\n  }\n\n  /* To Do: osEventSignal, osEventMessage, osEventMail */\n  rt_dly_wait(rt_ms2tick(millisec));\n  ret.status = osEventTimeout;\n\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n  osEvent_ret_status;\n  return;\n#else\n  return osEvent_ret_status;\n#endif\n}\n#endif\n\n// Generic Wait API\n\n/// Wait for Timeout (Time Delay)\nosStatus osDelay(uint32_t millisec) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcDelay(millisec);\n}\n\n/// Wait for Signal, Message, Mail, or Timeout\nos_InRegs osEvent osWait(uint32_t millisec) {\n  osEvent ret;\n\n#if osFeature_Wait == 0\n  ret.status = osErrorOS;\n  return ret;\n#else\n  if (__exceptional_mode()) { // Not allowed in ISR\n    ret.status = osErrorISR;\n    return ret;\n  }\n  return __svcWait(millisec);\n#endif\n}\n\n// ==== Timer Management ====\n\n// Timer definitions\n#define osTimerInvalid 0\n#define osTimerStopped 1\n#define osTimerRunning 2\n\n// Timer structures\n\ntypedef struct os_timer_cb_ { // Timer Control Block\n  struct os_timer_cb_ *next;  // Pointer to next active Timer\n  uint8_t state;              // Timer State\n  uint8_t type;               // Timer Type (Periodic/One-shot)\n  uint16_t reserved;          // Reserved\n  uint16_t tcnt;              // Timer Delay Count\n  uint16_t icnt;              // Timer Initial Count\n  void *arg;                  // Timer Function Argument\n  const osTimerDef_t *timer;  // Pointer to Timer definition\n} os_timer_cb;\n\n// Timer variables\nos_timer_cb *os_timer_head; // Pointer to first active Timer\n\n// Timer Helper Functions\n\n// Insert Timer into the list sorted by time\nstatic void rt_timer_insert(os_timer_cb *pt, uint32_t tcnt) {\n  os_timer_cb *p, *prev;\n\n  prev = NULL;\n  p = os_timer_head;\n  while (p != NULL) {\n    if (tcnt < p->tcnt)\n      break;\n    tcnt -= p->tcnt;\n    prev = p;\n    p = p->next;\n  }\n  pt->next = p;\n  pt->tcnt = (uint16_t)tcnt;\n  if (p != NULL) {\n    p->tcnt -= pt->tcnt;\n  }\n  if (prev != NULL) {\n    prev->next = pt;\n  } else {\n    os_timer_head = pt;\n  }\n}\n\n// Remove Timer from the list\nstatic int rt_timer_remove(os_timer_cb *pt) {\n  os_timer_cb *p, *prev;\n\n  prev = NULL;\n  p = os_timer_head;\n  while (p != NULL) {\n    if (p == pt)\n      break;\n    prev = p;\n    p = p->next;\n  }\n  if (p == NULL)\n    return -1;\n  if (prev != NULL) {\n    prev->next = pt->next;\n  } else {\n    os_timer_head = pt->next;\n  }\n  if (pt->next != NULL) {\n    pt->next->tcnt += pt->tcnt;\n  }\n\n  return 0;\n}\n\n// Timer Service Calls declarations\nSVC_3_1(svcTimerCreate, osTimerId, const osTimerDef_t *, os_timer_type, void *,\n        RET_pointer)\nSVC_2_1(svcTimerStart, osStatus, osTimerId, uint32_t, RET_osStatus)\nSVC_1_1(svcTimerStop, osStatus, osTimerId, RET_osStatus)\nSVC_1_1(svcTimerDelete, osStatus, osTimerId, RET_osStatus)\nSVC_1_2(svcTimerCall, os_InRegs osCallback, osTimerId, RET_osCallback)\n\n// Timer Management Service Calls\n\n/// Create timer\nosTimerId svcTimerCreate(const osTimerDef_t *timer_def, os_timer_type type,\n                         void *argument) {\n  os_timer_cb *pt;\n\n  if ((timer_def == NULL) || (timer_def->ptimer == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  pt = timer_def->timer;\n  if (pt == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if ((type != osTimerOnce) && (type != osTimerPeriodic)) {\n    sysThreadError(osErrorValue);\n    return NULL;\n  }\n\n  if (osThreadId_osTimerThread == NULL) {\n    sysThreadError(osErrorResource);\n    return NULL;\n  }\n\n  if (pt->state != osTimerInvalid) {\n    sysThreadError(osErrorResource);\n    return NULL;\n  }\n\n  pt->state = osTimerStopped;\n  pt->type = (uint8_t)type;\n  pt->arg = argument;\n  pt->timer = timer_def;\n\n  return (osTimerId)pt;\n}\n\n/// Start or restart timer\nosStatus svcTimerStart(osTimerId timer_id, uint32_t millisec) {\n  os_timer_cb *pt;\n  uint32_t tcnt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  tcnt = rt_ms2tick(millisec);\n  if (tcnt == 0)\n    return osErrorValue;\n\n  switch (pt->state) {\n  case osTimerRunning:\n    if (rt_timer_remove(pt) != 0) {\n      return osErrorResource;\n    }\n    break;\n  case osTimerStopped:\n    pt->state = osTimerRunning;\n    pt->icnt = (uint16_t)tcnt;\n    break;\n  default:\n    return osErrorResource;\n  }\n\n  rt_timer_insert(pt, tcnt);\n\n  return osOK;\n}\n\n/// Stop timer\nosStatus svcTimerStop(osTimerId timer_id) {\n  os_timer_cb *pt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  if (pt->state != osTimerRunning)\n    return osErrorResource;\n\n  pt->state = osTimerStopped;\n\n  if (rt_timer_remove(pt) != 0) {\n    return osErrorResource;\n  }\n\n  return osOK;\n}\n\n/// Delete timer\nosStatus svcTimerDelete(osTimerId timer_id) {\n  os_timer_cb *pt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  switch (pt->state) {\n  case osTimerRunning:\n    rt_timer_remove(pt);\n    break;\n  case osTimerStopped:\n    break;\n  default:\n    return osErrorResource;\n  }\n\n  pt->state = osTimerInvalid;\n\n  return osOK;\n}\n\n/// Get timer callback parameters\nos_InRegs osCallback_type svcTimerCall(osTimerId timer_id) {\n  os_timer_cb *pt;\n  osCallback ret;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL) {\n    ret.fp = NULL;\n    ret.arg = NULL;\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n    osCallback_ret;\n    return;\n#else\n    return osCallback_ret;\n#endif\n  }\n\n  ret.fp = (void *)pt->timer->ptimer;\n  ret.arg = pt->arg;\n\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n  osCallback_ret;\n  return;\n#else\n  return osCallback_ret;\n#endif\n}\n\nstatic __INLINE osStatus isrMessagePut(osMessageQId queue_id, uint32_t info,\n                                       uint32_t millisec);\n\n/// Timer Tick (called each SysTick)\nvoid sysTimerTick(void) {\n  os_timer_cb *pt, *p;\n\n  p = os_timer_head;\n  if (p == NULL)\n    return;\n\n  p->tcnt--;\n  while ((p != NULL) && (p->tcnt == 0)) {\n    pt = p;\n    p = p->next;\n    os_timer_head = p;\n    isrMessagePut(osMessageQId_osTimerMessageQ, (uint32_t)pt, 0);\n    if (pt->type == osTimerPeriodic) {\n      rt_timer_insert(pt, pt->icnt);\n    } else {\n      pt->state = osTimerStopped;\n    }\n  }\n}\n\n// Timer Management Public API\n\n/// Create timer\nosTimerId osTimerCreate(const osTimerDef_t *timer_def, os_timer_type type,\n                        void *argument) {\n  if (__exceptional_mode())\n    return NULL; // Not allowed in ISR\n  if ((__get_mode() != MODE_USR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcTimerCreate(timer_def, type, argument);\n  } else {\n    return __svcTimerCreate(timer_def, type, argument);\n  }\n}\n\n/// Start or restart timer\nosStatus osTimerStart(osTimerId timer_id, uint32_t millisec) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerStart(timer_id, millisec);\n}\n\n/// Stop timer\nosStatus osTimerStop(osTimerId timer_id) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerStop(timer_id);\n}\n\n/// Delete timer\nosStatus osTimerDelete(osTimerId timer_id) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerDelete(timer_id);\n}\n\n/// INTERNAL - Not Public\n/// Get timer callback parameters (used by OS Timer Thread)\nos_InRegs osCallback osTimerCall(osTimerId timer_id) {\n  return __svcTimerCall(timer_id);\n}\n\n// Timer Thread\n__NO_RETURN void osTimerThread(void const *argument) {\n  osCallback cb;\n  osEvent evt;\n\n  for (;;) {\n    evt = osMessageGet(osMessageQId_osTimerMessageQ, osWaitForever);\n    if (evt.status == osEventMessage) {\n      cb = osTimerCall(evt.value.p);\n      if (cb.fp != NULL) {\n        (*(os_ptimer)cb.fp)(cb.arg);\n      }\n    }\n  }\n}\n\n// ==== Signal Management ====\n\n// Signal Service Calls declarations\nSVC_2_1(svcSignalSet, int32_t, osThreadId, int32_t, RET_int32_t)\nSVC_2_1(svcSignalClear, int32_t, osThreadId, int32_t, RET_int32_t)\nSVC_1_1(svcSignalGet, int32_t, osThreadId, RET_int32_t)\nSVC_2_3(svcSignalWait, os_InRegs osEvent, int32_t, uint32_t, RET_osEvent)\n\n// Signal Service Calls\n\n/// Set the specified Signal Flags of an active thread\nint32_t svcSignalSet(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  rt_evt_set(signals, ptcb->task_id); // Set event flags\n\n  return sig;\n}\n\n/// Clear the specified Signal Flags of an active thread\nint32_t svcSignalClear(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  rt_evt_clr(signals, ptcb->task_id); // Clear event flags\n\n  return sig;\n}\n\n/// Get Signal Flags status of an active thread\nint32_t svcSignalGet(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  return ptcb->events; // Return event flags\n}\n\n/// Wait for one or more Signal Flags to become signaled for the current RUNNING\n/// thread\nos_InRegs osEvent_type svcSignalWait(int32_t signals, uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals)) {\n    ret.status = osErrorValue;\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n    osEvent_ret_status;\n    return;\n#else\n    return osEvent_ret_status;\n#endif\n  }\n\n  if (signals != 0) { // Wait for all specified signals\n    res = rt_evt_wait(signals, rt_ms2tick(millisec), __TRUE);\n  } else { // Wait for any signal\n    res = rt_evt_wait(0xFFFF, rt_ms2tick(millisec), __FALSE);\n  }\n\n  if (res == OS_R_EVT) {\n    ret.status = osEventSignal;\n    ret.value.signals = signals ? signals : os_tsk.run->waits;\n  } else {\n    ret.status = millisec ? osEventTimeout : osOK;\n    ret.value.signals = 0;\n  }\n\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n  osEvent_ret_value;\n  return;\n#else\n  return osEvent_ret_value;\n#endif\n}\n\n// Signal ISR Calls\n\n/// Set the specified Signal Flags of an active thread\nstatic __INLINE int32_t isrSignalSet(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  isr_evt_set(signals, ptcb->task_id); // Set event flags\n\n  return sig;\n}\n\n// Signal Public API\n\n/// Set the specified Signal Flags of an active thread\nint32_t osSignalSet(osThreadId thread_id, int32_t signals) {\n  if (__exceptional_mode()) { // in ISR\n    return isrSignalSet(thread_id, signals);\n  } else { // in Thread\n    return __svcSignalSet(thread_id, signals);\n  }\n}\n\n/// Clear the specified Signal Flags of an active thread\nint32_t osSignalClear(osThreadId thread_id, int32_t signals) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcSignalClear(thread_id, signals);\n}\n\n/// Get Signal Flags status of an active thread\nint32_t osSignalGet(osThreadId thread_id) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcSignalGet(thread_id);\n}\n\n/// Wait for one or more Signal Flags to become signaled for the current RUNNING\n/// thread\nos_InRegs osEvent osSignalWait(int32_t signals, uint32_t millisec) {\n  osEvent ret;\n\n  if (__exceptional_mode()) { // Not allowed in ISR\n    ret.status = osErrorISR;\n    return ret;\n  }\n  return __svcSignalWait(signals, millisec);\n}\n\n// ==== Mutex Management ====\n\n// Mutex Service Calls declarations\nSVC_1_1(svcMutexCreate, osMutexId, const osMutexDef_t *, RET_pointer)\nSVC_2_1(svcMutexWait, osStatus, osMutexId, uint32_t, RET_osStatus)\nSVC_1_1(svcMutexRelease, osStatus, osMutexId, RET_osStatus)\nSVC_1_1(svcMutexDelete, osStatus, osMutexId, RET_osStatus)\n\n// Mutex Service Calls\n\n/// Create and Initialize a Mutex object\nosMutexId svcMutexCreate(const osMutexDef_t *mutex_def) {\n  OS_ID mut;\n\n  if (mutex_def == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  mut = mutex_def->mutex;\n  if (mut == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_MUCB)mut)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  rt_mut_init(mut); // Initialize Mutex\n\n  return mut;\n}\n\n/// Wait until a Mutex becomes available\nosStatus svcMutexWait(osMutexId mutex_id, uint32_t millisec) {\n  OS_ID mut;\n  OS_RESULT res;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  res = rt_mut_wait(mut, rt_ms2tick(millisec)); // Wait for Mutex\n\n  if (res == OS_R_TMO) {\n    return (millisec ? osErrorTimeoutResource : osErrorResource);\n  }\n\n  return osOK;\n}\n\n/// Release a Mutex that was obtained with osMutexWait\nosStatus svcMutexRelease(osMutexId mutex_id) {\n  OS_ID mut;\n  OS_RESULT res;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  res = rt_mut_release(mut); // Release Mutex\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Thread not owner or Zero Counter\n\n  return osOK;\n}\n\n/// Delete a Mutex that was created by osMutexCreate\nosStatus svcMutexDelete(osMutexId mutex_id) {\n  OS_ID mut;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  rt_mut_delete(mut); // Release Mutex\n\n  return osOK;\n}\n\n// Mutex Public API\n\n/// Create and Initialize a Mutex object\nosMutexId osMutexCreate(const osMutexDef_t *mutex_def) {\n  if (__exceptional_mode())\n    return NULL; // Not allowed in ISR\n  if ((__get_mode() != MODE_USR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMutexCreate(mutex_def);\n  } else {\n    return __svcMutexCreate(mutex_def);\n  }\n}\n\n/// Wait until a Mutex becomes available\nosStatus osMutexWait(osMutexId mutex_id, uint32_t millisec) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexWait(mutex_id, millisec);\n}\n\n/// Release a Mutex that was obtained with osMutexWait\nosStatus osMutexRelease(osMutexId mutex_id) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexRelease(mutex_id);\n}\n\n/// Delete a Mutex that was created by osMutexCreate\nosStatus osMutexDelete(osMutexId mutex_id) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexDelete(mutex_id);\n}\n\n// ==== Semaphore Management ====\n\n// Semaphore Service Calls declarations\nSVC_2_1(svcSemaphoreCreate, osSemaphoreId, const osSemaphoreDef_t *, int32_t,\n        RET_pointer)\nSVC_2_1(svcSemaphoreWait, int32_t, osSemaphoreId, uint32_t, RET_int32_t)\nSVC_1_1(svcSemaphoreRelease, osStatus, osSemaphoreId, RET_osStatus)\nSVC_1_1(svcSemaphoreDelete, osStatus, osSemaphoreId, RET_osStatus)\n\n// Semaphore Service Calls\n\n/// Create and Initialize a Semaphore object\nosSemaphoreId svcSemaphoreCreate(const osSemaphoreDef_t *semaphore_def,\n                                 int32_t count) {\n  OS_ID sem;\n\n  if (semaphore_def == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  sem = semaphore_def->semaphore;\n  if (sem == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_SCB)sem)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (count > osFeature_Semaphore) {\n    sysThreadError(osErrorValue);\n    return NULL;\n  }\n\n  rt_sem_init(sem, count); // Initialize Semaphore\n\n  return sem;\n}\n\n/// Wait until a Semaphore becomes available\nint32_t svcSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec) {\n  OS_ID sem;\n  OS_RESULT res;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return -1;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return -1;\n\n  res = rt_sem_wait(sem, rt_ms2tick(millisec)); // Wait for Semaphore\n\n  if (res == OS_R_TMO)\n    return 0; // Timeout\n\n  return (((P_SCB)sem)->tokens + 1);\n}\n\n/// Release a Semaphore\nosStatus svcSemaphoreRelease(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->tokens == osFeature_Semaphore)\n    return osErrorResource;\n\n  rt_sem_send(sem); // Release Semaphore\n\n  return osOK;\n}\n\n/// Delete a Semaphore that was created by osSemaphoreCreate\nosStatus svcSemaphoreDelete(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  rt_sem_delete(sem); // Delete Semaphore\n\n  return osOK;\n}\n\n// Semaphore ISR Calls\n\n/// Release a Semaphore\nstatic __INLINE osStatus isrSemaphoreRelease(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->tokens == osFeature_Semaphore)\n    return osErrorResource;\n\n  isr_sem_send(sem); // Release Semaphore\n\n  return osOK;\n}\n\n// Semaphore Public API\n\n/// Create and Initialize a Semaphore object\nosSemaphoreId osSemaphoreCreate(const osSemaphoreDef_t *semaphore_def,\n                                int32_t count) {\n  if (__exceptional_mode())\n    return NULL; // Not allowed in ISR\n  if ((__get_mode() != MODE_USR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcSemaphoreCreate(semaphore_def, count);\n  } else {\n    return __svcSemaphoreCreate(semaphore_def, count);\n  }\n}\n\n/// Wait until a Semaphore becomes available\nint32_t osSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec) {\n  if (__exceptional_mode())\n    return -1; // Not allowed in ISR\n  return __svcSemaphoreWait(semaphore_id, millisec);\n}\n\n/// Release a Semaphore\nosStatus osSemaphoreRelease(osSemaphoreId semaphore_id) {\n  if (__exceptional_mode()) { // in ISR\n    return isrSemaphoreRelease(semaphore_id);\n  } else { // in Thread\n    return __svcSemaphoreRelease(semaphore_id);\n  }\n}\n\n/// Delete a Semaphore that was created by osSemaphoreCreate\nosStatus osSemaphoreDelete(osSemaphoreId semaphore_id) {\n  if (__exceptional_mode())\n    return osErrorISR; // Not allowed in ISR\n  return __svcSemaphoreDelete(semaphore_id);\n}\n\n// ==== Memory Management Functions ====\n\n// Memory Management Helper Functions\n\n// Clear Memory Box (Zero init)\nstatic void rt_clr_box(void *box_mem, void *box) {\n  uint32_t *p, n;\n\n  if (box) {\n    p = box;\n    for (n = ((P_BM)box_mem)->blk_size; n; n -= 4) {\n      *p++ = 0;\n    }\n  }\n}\n\n// Memory Management Service Calls declarations\nSVC_1_1(svcPoolCreate, osPoolId, const osPoolDef_t *, RET_pointer)\nSVC_2_1(sysPoolAlloc, void *, osPoolId, uint32_t, RET_pointer)\nSVC_2_1(sysPoolFree, osStatus, osPoolId, void *, RET_osStatus)\n\n// Memory Management Service & ISR Calls\n\n/// Create and Initialize memory pool\nosPoolId svcPoolCreate(const osPoolDef_t *pool_def) {\n  uint32_t blk_sz;\n\n  if ((pool_def == NULL) || (pool_def->pool_sz == 0) ||\n      (pool_def->item_sz == 0) || (pool_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  blk_sz = (pool_def->item_sz + 3) & ~3;\n\n  _init_box(pool_def->pool, sizeof(struct OS_BM) + pool_def->pool_sz * blk_sz,\n            blk_sz);\n\n  return pool_def->pool;\n}\n\n/// Allocate a memory block from a memory pool\nvoid *sysPoolAlloc(osPoolId pool_id, uint32_t clr) {\n  void *ptr;\n\n  if (pool_id == NULL)\n    return NULL;\n\n  ptr = rt_alloc_box(pool_id);\n  if (clr) {\n    rt_clr_box(pool_id, ptr);\n  }\n\n  return ptr;\n}\n\n/// Return an allocated memory block back to a specific memory pool\nosStatus sysPoolFree(osPoolId pool_id, void *block) {\n  int32_t res;\n\n  if (pool_id == NULL)\n    return osErrorParameter;\n\n  res = rt_free_box(pool_id, block);\n  if (res != 0)\n    return osErrorValue;\n\n  return osOK;\n}\n\n// Memory Management Public API\n\n/// Create and Initialize memory pool\nosPoolId osPoolCreate(const osPoolDef_t *pool_def) {\n  if (__exceptional_mode())\n    return NULL; // Not allowed in ISR\n  if ((__get_mode() != MODE_USR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcPoolCreate(pool_def);\n  } else {\n    return __svcPoolCreate(pool_def);\n  }\n}\n\n/// Allocate a memory block from a memory pool\nvoid *osPoolAlloc(osPoolId pool_id) {\n  if (__get_mode() != MODE_USR) { // in ISR or Privileged\n    return sysPoolAlloc(pool_id, 0);\n  } else { // in Thread\n    return __sysPoolAlloc(pool_id, 0);\n  }\n}\n\n/// Allocate a memory block from a memory pool and set memory block to zero\nvoid *osPoolCAlloc(osPoolId pool_id) {\n  if (__get_mode() != MODE_USR) { // in ISR or Privileged\n    return sysPoolAlloc(pool_id, 1);\n  } else { // in Thread\n    return __sysPoolAlloc(pool_id, 1);\n  }\n}\n\n/// Return an allocated memory block back to a specific memory pool\nosStatus osPoolFree(osPoolId pool_id, void *block) {\n  if (__get_mode() != MODE_USR) { // in ISR or Privileged\n    return sysPoolFree(pool_id, block);\n  } else { // in Thread\n    return __sysPoolFree(pool_id, block);\n  }\n}\n\n// ==== Message Queue Management Functions ====\n\n// Message Queue Management Service Calls declarations\nSVC_2_1(svcMessageCreate, osMessageQId, const osMessageQDef_t *, osThreadId,\n        RET_pointer)\nSVC_3_1(svcMessagePut, osStatus, osMessageQId, uint32_t, uint32_t, RET_osStatus)\nSVC_2_3(svcMessageGet, os_InRegs osEvent, osMessageQId, uint32_t, RET_osEvent)\n\n// Message Queue Service Calls\n\n/// Create and Initialize Message Queue\nosMessageQId svcMessageCreate(const osMessageQDef_t *queue_def,\n                              osThreadId thread_id) {\n\n  if ((queue_def == NULL) || (queue_def->queue_sz == 0) ||\n      (queue_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_MCB)queue_def->pool)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  rt_mbx_init(queue_def->pool, 4 * (queue_def->queue_sz + 4));\n\n  return queue_def->pool;\n}\n\n/// Put a Message to a Queue\nosStatus svcMessagePut(osMessageQId queue_id, uint32_t info,\n                       uint32_t millisec) {\n  OS_RESULT res;\n\n  if (queue_id == NULL)\n    return osErrorParameter;\n\n  if (((P_MCB)queue_id)->cb_type != MCB)\n    return osErrorParameter;\n\n  res = rt_mbx_send(queue_id, (void *)info, rt_ms2tick(millisec));\n\n  if (res == OS_R_TMO) {\n    return (millisec ? osErrorTimeoutResource : osErrorResource);\n  }\n\n  return osOK;\n}\n\n/// Get a Message or Wait for a Message from a Queue\nos_InRegs osEvent_type svcMessageGet(osMessageQId queue_id, uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if (queue_id == NULL) {\n    ret.status = osErrorParameter;\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n    osEvent_ret_status;\n    return;\n#else\n    return osEvent_ret_status;\n#endif\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB) {\n    ret.status = osErrorParameter;\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n    osEvent_ret_status;\n    return;\n#else\n    return osEvent_ret_status;\n#endif\n  }\n\n  res = rt_mbx_wait(queue_id, &ret.value.p, rt_ms2tick(millisec));\n\n  if (res == OS_R_TMO) {\n    ret.status = millisec ? osEventTimeout : osOK;\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n    osEvent_ret_value;\n    return;\n#else\n    return osEvent_ret_value;\n#endif\n  }\n\n  ret.status = osEventMessage;\n\n#if defined(__GNUC__) && defined(__ARM_PCS_VFP)\n  osEvent_ret_value;\n  return;\n#else\n  return osEvent_ret_value;\n#endif\n}\n\n// Message Queue ISR Calls\n\n/// Put a Message to a Queue\nstatic __INLINE osStatus isrMessagePut(osMessageQId queue_id, uint32_t info,\n                                       uint32_t millisec) {\n\n  if ((queue_id == NULL) || (millisec != 0)) {\n    return osErrorParameter;\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB)\n    return osErrorParameter;\n\n  if (rt_mbx_check(queue_id) == 0) { // Check if Queue is full\n    return osErrorResource;\n  }\n\n  isr_mbx_send(queue_id, (void *)info);\n\n  return osOK;\n}\n\n/// Get a Message or Wait for a Message from a Queue\nstatic __INLINE os_InRegs osEvent isrMessageGet(osMessageQId queue_id,\n                                                uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if ((queue_id == NULL) || (millisec != 0)) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  res = isr_mbx_receive(queue_id, &ret.value.p);\n\n  if (res != OS_R_MBX) {\n    ret.status = osOK;\n    return ret;\n  }\n\n  ret.status = osEventMessage;\n\n  return ret;\n}\n\n// Message Queue Management Public API\n\n/// Create and Initialize Message Queue\nosMessageQId osMessageCreate(const osMessageQDef_t *queue_def,\n                             osThreadId thread_id) {\n  if (__exceptional_mode())\n    return NULL; // Not allowed in ISR\n  if ((__get_mode() != MODE_USR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMessageCreate(queue_def, thread_id);\n  } else {\n    return __svcMessageCreate(queue_def, thread_id);\n  }\n}\n\n/// Put a Message to a Queue\nosStatus osMessagePut(osMessageQId queue_id, uint32_t info, uint32_t millisec) {\n  if (__exceptional_mode()) { // in ISR\n    return isrMessagePut(queue_id, info, millisec);\n  } else { // in Thread\n    return __svcMessagePut(queue_id, info, millisec);\n  }\n}\n\n/// Get a Message or Wait for a Message from a Queue\nos_InRegs osEvent osMessageGet(osMessageQId queue_id, uint32_t millisec) {\n  if (__exceptional_mode()) { // in ISR\n    return isrMessageGet(queue_id, millisec);\n  } else { // in Thread\n    return __svcMessageGet(queue_id, millisec);\n  }\n}\n\n// ==== Mail Queue Management Functions ====\n\n// Mail Queue Management Service Calls declarations\nSVC_2_1(svcMailCreate, osMailQId, const osMailQDef_t *, osThreadId, RET_pointer)\nSVC_4_1(sysMailAlloc, void *, osMailQId, uint32_t, uint32_t, uint32_t,\n        RET_pointer)\nSVC_3_1(sysMailFree, osStatus, osMailQId, void *, uint32_t, RET_osStatus)\n\n// Mail Queue Management Service & ISR Calls\n\n/// Create and Initialize mail queue\nosMailQId svcMailCreate(const osMailQDef_t *queue_def, osThreadId thread_id) {\n  uint32_t blk_sz;\n  P_MCB pmcb;\n  void *pool;\n\n  if ((queue_def == NULL) || (queue_def->queue_sz == 0) ||\n      (queue_def->item_sz == 0) || (queue_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  pmcb = *(((void **)queue_def->pool) + 0);\n  pool = *(((void **)queue_def->pool) + 1);\n\n  if ((pool == NULL) || (pmcb == NULL) || (pmcb->cb_type != 0)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  blk_sz = (queue_def->item_sz + 3) & ~3;\n\n  _init_box(pool, sizeof(struct OS_BM) + queue_def->queue_sz * blk_sz, blk_sz);\n\n  rt_mbx_init(pmcb, 4 * (queue_def->queue_sz + 4));\n\n  return queue_def->pool;\n}\n\n/// Allocate a memory block from a mail\nvoid *sysMailAlloc(osMailQId queue_id, uint32_t millisec, uint32_t isr,\n                   uint32_t clr) {\n  P_MCB pmcb;\n  void *pool;\n  void *mem;\n\n  if (queue_id == NULL)\n    return NULL;\n\n  pmcb = *(((void **)queue_id) + 0);\n  pool = *(((void **)queue_id) + 1);\n\n  if ((pool == NULL) || (pmcb == NULL))\n    return NULL;\n\n  if (isr && (millisec != 0))\n    return NULL;\n\n  mem = rt_alloc_box(pool);\n  if (clr) {\n    rt_clr_box(pool, mem);\n  }\n\n  if ((mem == NULL) && (millisec != 0)) {\n    // Put Task to sleep when Memory not available\n    if (pmcb->p_lnk != NULL) {\n      rt_put_prio((P_XCB)pmcb, os_tsk.run);\n    } else {\n      pmcb->p_lnk = os_tsk.run;\n      os_tsk.run->p_lnk = NULL;\n      os_tsk.run->p_rlnk = (P_TCB)pmcb;\n      // Task is waiting to allocate a message\n      pmcb->state = 3;\n    }\n    rt_block(rt_ms2tick(millisec), WAIT_MBX);\n  }\n\n  return mem;\n}\n\n/// Free a memory block from a mail\nosStatus sysMailFree(osMailQId queue_id, void *mail, uint32_t isr) {\n  P_MCB pmcb;\n  P_TCB ptcb;\n  void *pool;\n  void *mem;\n  int32_t res;\n\n  if (queue_id == NULL)\n    return osErrorParameter;\n\n  pmcb = *(((void **)queue_id) + 0);\n  pool = *(((void **)queue_id) + 1);\n\n  if ((pmcb == NULL) || (pool == NULL))\n    return osErrorParameter;\n\n  res = rt_free_box(pool, mail);\n\n  if (res != 0)\n    return osErrorValue;\n\n  if (pmcb->state == 3) {\n    // Task is waiting to allocate a message\n    if (isr) {\n      rt_psq_enq(pmcb, (U32)pool);\n      rt_psh_req();\n    } else {\n      mem = rt_alloc_box(pool);\n      if (mem != NULL) {\n        ptcb = rt_get_first((P_XCB)pmcb);\n        if (pmcb->p_lnk == NULL) {\n          pmcb->state = 0;\n        }\n        rt_ret_val(ptcb, (U32)mem);\n        rt_rmv_dly(ptcb);\n        rt_dispatch(ptcb);\n      }\n    }\n  }\n\n  return osOK;\n}\n\n// Mail Queue Management Public API\n\n/// Create and Initialize mail queue\nosMailQId osMailCreate(const osMailQDef_t *queue_def, osThreadId thread_id) {\n  if (__exceptional_mode())\n    return NULL; // Not allowed in ISR\n  if ((__get_mode() != MODE_USR) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMailCreate(queue_def, thread_id);\n  } else {\n    return __svcMailCreate(queue_def, thread_id);\n  }\n}\n\n/// Allocate a memory block from a mail\nvoid *osMailAlloc(osMailQId queue_id, uint32_t millisec) {\n  if (__exceptional_mode()) { // in ISR\n    return sysMailAlloc(queue_id, millisec, 1, 0);\n  } else { // in Thread\n    return __sysMailAlloc(queue_id, millisec, 0, 0);\n  }\n}\n\n/// Allocate a memory block from a mail and set memory block to zero\nvoid *osMailCAlloc(osMailQId queue_id, uint32_t millisec) {\n  if (__exceptional_mode()) { // in ISR\n    return sysMailAlloc(queue_id, millisec, 1, 1);\n  } else { // in Thread\n    return __sysMailAlloc(queue_id, millisec, 0, 1);\n  }\n}\n\n/// Free a memory block from a mail\nosStatus osMailFree(osMailQId queue_id, void *mail) {\n  if (__exceptional_mode()) { // in ISR\n    return sysMailFree(queue_id, mail, 1);\n  } else { // in Thread\n    return __sysMailFree(queue_id, mail, 0);\n  }\n}\n\n/// Put a mail to a queue\nosStatus osMailPut(osMailQId queue_id, void *mail) {\n  if (queue_id == NULL)\n    return osErrorParameter;\n  if (mail == NULL)\n    return osErrorValue;\n  return osMessagePut(*((void **)queue_id), (uint32_t)mail, 0);\n}\n\n#ifdef __CC_ARM\n#pragma push\n#pragma Ospace\n#endif // __arm__\n/// Get a mail from a queue\nos_InRegs osEvent osMailGet(osMailQId queue_id, uint32_t millisec) {\n  osEvent ret;\n\n  if (queue_id == NULL) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  ret = osMessageGet(*((void **)queue_id), millisec);\n  if (ret.status == osEventMessage)\n    ret.status = osEventMail;\n\n  return ret;\n}\n#ifdef __CC_ARM\n#pragma pop\n#endif // __arm__\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Event.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_EVENT.C\n *      Purpose: Implements waits and wake-ups for event flags\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Event.h\"\n#include \"RTX_Config.h\"\n#include \"rt_List.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_evt_wait -----------------------------------*/\n\nOS_RESULT rt_evt_wait(U16 wait_flags, U16 timeout, BOOL and_wait) {\n  /* Wait for one or more event flags with optional time-out.                */\n  /* \"wait_flags\" identifies the flags to wait for.                          */\n  /* \"timeout\" is the time-out limit in system ticks (0xffff if no time-out) */\n  /* \"and_wait\" specifies the AND-ing of \"wait_flags\" as condition to be met */\n  /* to complete the wait. (OR-ing if set to 0).                             */\n  U32 block_state;\n\n  if (and_wait) {\n    /* Check for AND-connected events */\n    if ((os_tsk.run->events & wait_flags) == wait_flags) {\n      os_tsk.run->events &= ~wait_flags;\n      return (OS_R_EVT);\n    }\n    block_state = WAIT_AND;\n  } else {\n    /* Check for OR-connected events */\n    if (os_tsk.run->events & wait_flags) {\n      os_tsk.run->waits = os_tsk.run->events & wait_flags;\n      os_tsk.run->events &= ~wait_flags;\n      return (OS_R_EVT);\n    }\n    block_state = WAIT_OR;\n  }\n  /* Task has to wait */\n  os_tsk.run->waits = wait_flags;\n  rt_block(timeout, (U8)block_state);\n  return (OS_R_TMO);\n}\n\n/*--------------------------- rt_evt_set ------------------------------------*/\n\nvoid rt_evt_set(U16 event_flags, OS_TID task_id) {\n  /* Set one or more event flags of a selectable task. */\n  P_TCB p_tcb;\n\n  p_tcb = os_active_TCB[task_id - 1];\n  if (p_tcb == NULL) {\n    return;\n  }\n  p_tcb->events |= event_flags;\n  event_flags = p_tcb->waits;\n  /* If the task is not waiting for an event, it should not be put */\n  /* to ready state. */\n  if (p_tcb->state == WAIT_AND) {\n    /* Check for AND-connected events */\n    if ((p_tcb->events & event_flags) == event_flags) {\n      goto wkup;\n    }\n  }\n  if (p_tcb->state == WAIT_OR) {\n    /* Check for OR-connected events */\n    if (p_tcb->events & event_flags) {\n      p_tcb->waits &= p_tcb->events;\n    wkup:\n      p_tcb->events &= ~event_flags;\n      rt_rmv_dly(p_tcb);\n      p_tcb->state = READY;\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_tcb, 0x08 /*osEventSignal*/, p_tcb->waits);\n#else\n      rt_ret_val(p_tcb, OS_R_EVT);\n#endif\n      rt_dispatch(p_tcb);\n    }\n  }\n}\n\n/*--------------------------- rt_evt_clr ------------------------------------*/\n\nvoid rt_evt_clr(U16 clear_flags, OS_TID task_id) {\n  /* Clear one or more event flags (identified by \"clear_flags\") of a */\n  /* selectable task (identified by \"task\"). */\n  P_TCB task = os_active_TCB[task_id - 1];\n\n  if (task == NULL) {\n    return;\n  }\n  task->events &= ~clear_flags;\n}\n\n/*--------------------------- isr_evt_set -----------------------------------*/\n\nvoid isr_evt_set(U16 event_flags, OS_TID task_id) {\n  /* Same function as \"os_evt_set\", but to be called by ISRs. */\n  P_TCB p_tcb = os_active_TCB[task_id - 1];\n\n  if (p_tcb == NULL) {\n    return;\n  }\n  rt_psq_enq(p_tcb, event_flags);\n  rt_psh_req();\n}\n\n/*--------------------------- rt_evt_get ------------------------------------*/\n\nU16 rt_evt_get(void) {\n  /* Get events of a running task after waiting for OR connected events. */\n  return (os_tsk.run->waits);\n}\n\n/*--------------------------- rt_evt_psh ------------------------------------*/\n\nvoid rt_evt_psh(P_TCB p_CB, U16 set_flags) {\n  /* Check if task has to be waken up */\n  U16 event_flags;\n\n  p_CB->events |= set_flags;\n  event_flags = p_CB->waits;\n  if (p_CB->state == WAIT_AND) {\n    /* Check for AND-connected events */\n    if ((p_CB->events & event_flags) == event_flags) {\n      goto rdy;\n    }\n  }\n  if (p_CB->state == WAIT_OR) {\n    /* Check for OR-connected events */\n    if (p_CB->events & event_flags) {\n      p_CB->waits &= p_CB->events;\n    rdy:\n      p_CB->events &= ~event_flags;\n      rt_rmv_dly(p_CB);\n      p_CB->state = READY;\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_CB, 0x08 /*osEventSignal*/, p_CB->waits);\n#else\n      rt_ret_val(p_CB, OS_R_EVT);\n#endif\n      rt_put_prio(&os_rdy, p_CB);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Event.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_EVENT.H\n *      Purpose: Implements waits and wake-ups for event flags\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\nextern OS_RESULT rt_evt_wait (U16 wait_flags,  U16 timeout, BOOL and_wait);\nextern void      rt_evt_set  (U16 event_flags, OS_TID task_id);\nextern void      rt_evt_clr  (U16 clear_flags, OS_TID task_id);\nextern void      isr_evt_set (U16 event_flags, OS_TID task_id);\nextern U16       rt_evt_get  (void);\nextern void      rt_evt_psh  (P_TCB p_CB, U16 set_flags);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_HAL_CA.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_HAL_CM.H\n *      Purpose: Hardware Abstraction Layer for Cortex-A definitions\n *      Rev.:    21 Aug 2013\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Definitions */\n#define INIT_CPSR_SYS   0x4000001F\n#define INIT_CPSR_USER  0x40000010\n\n#define CPSR_T_BIT      0x20\n#define CPSR_I_BIT      0x80\n#define CPSR_F_BIT      0x40\n\n#define MODE_USR        0x10\n#define MODE_FIQ        0x11\n#define MODE_IRQ        0x12\n#define MODE_SVC        0x13\n#define MODE_ABT        0x17\n#define MODE_UND        0x1B\n#define MODE_SYS        0x1F\n\n#define MAGIC_WORD      0xE25A2EA5\n\n#include \"core_ca9.h\"\n\n#if defined (__CC_ARM)          /* ARM Compiler */\n\n#if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M || __TARGET_ARCH_7_A) && !defined(NO_EXCLUSIVE_ACCESS))\n #define __USE_EXCLUSIVE_ACCESS\n#else\n #undef  __USE_EXCLUSIVE_ACCESS\n#endif\n\n#elif defined (__GNUC__)        /* GNU Compiler */\n\n#undef  __USE_EXCLUSIVE_ACCESS\n\n#if defined (__VFP_FP__) && !defined(__SOFTFP__)\n#define __TARGET_FPU_VFP 1\n#else\n#define __TARGET_FPU_VFP 0\n#endif\n\n#define __inline inline\n#define __weak   __attribute__((weak))\n\n#elif defined (__ICCARM__)      /* IAR Compiler */\n\n#error IAR Compiler support not implemented for Cortex-A\n\n#endif\n\nstatic U8 priority = 0xff;\n\nextern const U32 GICDistributor_BASE;\nextern const U32 GICInterface_BASE;\n\n/* GIC registers - Distributor */\n#define GICD_ICDICER0   (*((volatile U32 *)(GICDistributor_BASE + 0x180))) /* - RW - Interrupt Clear-Enable Registers */\n#define GICD_ICDISER0   (*((volatile U32 *)(GICDistributor_BASE + 0x100))) /* - RW - Interrupt Set-Enable Registers */\n#define GICD_ICDIPR0    (*((volatile U32 *)(GICDistributor_BASE + 0x400))) /* - RW - Interrupt Priority Registers */\n#define GICD_ICDSGIR    (*((volatile U32 *)(GICDistributor_BASE + 0xf00))) /* - RW - Interrupt Software Interrupt Register */\n#define GICD_ICDICERx(irq)   *(volatile U32 *)(&GICD_ICDICER0 + irq/32)\n#define GICD_ICDISERx(irq)   *(volatile U32 *)(&GICD_ICDISER0 + irq/32)\n\n/* GIC register  - CPU Interface  */\n#define GICI_ICCPMR     (*((volatile U32 *)(GICInterface_BASE + 0x004))) /* - RW - Interrupt Priority Mask Register */\n\n#define SGI_PENDSV      0 /* SGI0 */\n#define SGI_PENDSV_BIT  ((U32)(1 << (SGI_PENDSV & 0xf)))\n\n//Increase priority filter to prevent timer and PendSV interrupts signaling. Guarantees that interrupts will not be forwarded.\n#define OS_LOCK() int irq_dis = __disable_irq();\\\n                  priority = GICI_ICCPMR; \\\n                  GICI_ICCPMR = 0xff; \\\n                  GICI_ICCPMR = GICI_ICCPMR - 1; \\\n                  __DSB();\\\n                  if(!irq_dis) __enable_irq(); \\\n\n//Restore priority filter. Re-enable timer and PendSV signaling\n#define OS_UNLOCK() __DSB(); \\\n                    GICI_ICCPMR = priority; \\\n\n#define OS_PEND_IRQ() GICD_ICDSGIR = 0x0010000 | SGI_PENDSV\n#define OS_PEND(fl,p) if(p) OS_PEND_IRQ();\n#define OS_UNPEND(fl)\n\n/* HW initialization needs to be done in os_tick_init (void) -RTX_Conf_CM.c-\n * OS_X_INIT enables the IRQ n in the GIC */\n#define OS_X_INIT(n) volatile char *reg; \\\n                     reg = (char *)(&GICD_ICDIPR0 + n / 4); \\\n                     reg += n % 4; \\\n                     *reg = (char)0xff; \\\n                     *reg = *reg - 1; \\\n                     GICD_ICDISERx(n) = (U32)(1 << n % 32);\n#define OS_X_LOCK(n) OS_LOCK()\n#define OS_X_UNLOCK(n) OS_UNLOCK()\n#define OS_X_PEND_IRQ() OS_PEND_IRQ()\n#define OS_X_PEND(fl,p) if(p) OS_X_PEND_IRQ();\n#define OS_X_UNPEND(fl)\n\n\n/* Functions */\n#ifdef __USE_EXCLUSIVE_ACCESS\n #define rt_inc(p)     while(__strex((__ldrex(p)+1),p))\n #define rt_dec(p)     while(__strex((__ldrex(p)-1),p))\n#else\n #define rt_inc(p)     { int irq_dis = __disable_irq();(*p)++;if(!irq_dis) __enable_irq(); }\n #define rt_dec(p)     { int irq_dis = __disable_irq();(*p)--;if(!irq_dis) __enable_irq(); }\n#endif\n\n__inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {\n  U32 cnt,c2;\n#ifdef __USE_EXCLUSIVE_ACCESS\n  do {\n    if ((cnt = __ldrex(count)) == size) {\n      __clrex();\n      return (cnt); }\n  } while (__strex(cnt+1, count));\n  do {\n    c2 = (cnt = __ldrex(first)) + 1;\n    if (c2 == size) c2 = 0;\n  } while (__strex(c2, first));\n#else\n  int irq_dis;\n  irq_dis = __disable_irq();\n  if ((cnt = *count) < size) {\n    *count = cnt+1;\n    c2 = (cnt = *first) + 1;\n    if (c2 == size) c2 = 0;\n    *first = c2;\n  }\n  if(!irq_dis) __enable_irq ();\n#endif\n  return (cnt);\n}\n\n__inline static void rt_systick_init (void) {\n  /* Cortex-A doesn't have a Systick. User needs to provide an alternative timer using RTX_Conf_CM configuration */\n  /* HW initialization needs to be done in os_tick_init (void) -RTX_Conf_CM.c- */\n}\n\n__inline static void rt_svc_init (void) {\n  /* Register pendSV - through SGI */\n  volatile char *reg;\n\n  reg = (char *)(&GICD_ICDIPR0 + SGI_PENDSV/4);\n  reg += SGI_PENDSV % 4;\n  /* Write 0xff to read priority level */\n  *reg = (char)0xff;\n  /* Read priority level and set the lowest possible*/\n  *reg = *reg - 1;\n\n  GICD_ICDISERx(SGI_PENDSV) = (U32)SGI_PENDSV_BIT;\n}\n\nextern void rt_set_PSP (U32 stack);\nextern U32  rt_get_PSP (void);\nextern void os_set_env (P_TCB p_TCB);\nextern void *_alloc_box (void *box_mem);\nextern int  _free_box (void *box_mem, void *box);\n\nextern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);\nextern void rt_ret_val  (P_TCB p_TCB, U32 v0);\nextern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);\n\nextern void dbg_init (void);\nextern void dbg_task_notify (P_TCB p_tcb, BOOL create);\nextern void dbg_task_switch (U32 task_id);\n\n#define DBG_INIT()\n#define DBG_TASK_NOTIFY(p_tcb,create)\n#define DBG_TASK_SWITCH(task_id)\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_HAL_CM.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_HAL_CM.H\n *      Purpose: Hardware Abstraction Layer for Cortex-M definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Definitions */\n#define INITIAL_xPSR    0x01000000\n#define DEMCR_TRCENA    0x01000000\n#define ITM_ITMENA      0x00000001\n#define MAGIC_WORD      0xE25A2EA5\n\n#if defined (__CC_ARM)          /* ARM Compiler */\n\n#if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)\n #define __USE_EXCLUSIVE_ACCESS\n#else\n #undef  __USE_EXCLUSIVE_ACCESS\n#endif\n\n#elif defined (__GNUC__)        /* GNU Compiler */\n\n#undef  __USE_EXCLUSIVE_ACCESS\n\n#if defined (__CORTEX_M0)\n#define __TARGET_ARCH_6S_M 1\n#else\n#define __TARGET_ARCH_6S_M 0\n#endif\n\n#if defined (__VFP_FP__) && !defined(__SOFTFP__)\n#define __TARGET_FPU_VFP 1\n#else\n#define __TARGET_FPU_VFP 0\n#endif\n\n#define __inline inline\n#define __weak   __attribute__((weak))\n\n#ifndef __CMSIS_GENERIC\n\n__attribute__((always_inline)) static inline void __enable_irq(void)\n{\n  __asm volatile (\"cpsie i\");\n}\n\n__attribute__((always_inline)) static inline U32 __disable_irq(void)\n{\n  U32 result;\n\n  __asm volatile (\"mrs %0, primask\" : \"=r\" (result));\n  __asm volatile (\"cpsid i\");\n  return(result & 1);\n}\n\n#endif\n\n__attribute__(( always_inline)) static inline U8 __clz(U32 value)\n{\n  U8 result;\n\n  __asm volatile (\"clz %0, %1\" : \"=r\" (result) : \"r\" (value));\n  return(result);\n}\n\n#elif defined (__ICCARM__)      /* IAR Compiler */\n\n#undef  __USE_EXCLUSIVE_ACCESS\n\n#if (__CORE__ == __ARM6M__)\n#define __TARGET_ARCH_6S_M 1\n#else\n#define __TARGET_ARCH_6S_M 0\n#endif\n\n#if defined __ARMVFP__\n#define __TARGET_FPU_VFP 1\n#else\n#define __TARGET_FPU_VFP 0\n#endif\n\n#define __inline inline\n\n#ifndef __CMSIS_GENERIC\n\nstatic inline void __enable_irq(void)\n{\n  __asm volatile (\"cpsie i\");\n}\n\nstatic inline U32 __disable_irq(void)\n{\n  U32 result;\n\n  __asm volatile (\"mrs %0, primask\" : \"=r\" (result));\n  __asm volatile (\"cpsid i\");\n  return(result & 1);\n}\n\n#endif\n\nstatic inline U8 __clz(U32 value)\n{\n  U8 result;\n\n  __asm volatile (\"clz %0, %1\" : \"=r\" (result) : \"r\" (value));\n  return(result);\n}\n\n#endif\n\n/* NVIC registers */\n#define NVIC_ST_CTRL    (*((volatile U32 *)0xE000E010))\n#define NVIC_ST_RELOAD  (*((volatile U32 *)0xE000E014))\n#define NVIC_ST_CURRENT (*((volatile U32 *)0xE000E018))\n#define NVIC_ISER         ((volatile U32 *)0xE000E100)\n#define NVIC_ICER         ((volatile U32 *)0xE000E180)\n#if (__TARGET_ARCH_6S_M)\n#define NVIC_IP           ((volatile U32 *)0xE000E400)\n#else\n#define NVIC_IP           ((volatile U8  *)0xE000E400)\n#endif\n#define NVIC_INT_CTRL   (*((volatile U32 *)0xE000ED04))\n#define NVIC_AIR_CTRL   (*((volatile U32 *)0xE000ED0C))\n#define NVIC_SYS_PRI2   (*((volatile U32 *)0xE000ED1C))\n#define NVIC_SYS_PRI3   (*((volatile U32 *)0xE000ED20))\n\n#define OS_PEND_IRQ()   NVIC_INT_CTRL  = (1<<28)\n#define OS_PENDING      ((NVIC_INT_CTRL >> 26) & (1<<2 | 1))\n#define OS_UNPEND(fl)   NVIC_INT_CTRL  = (*fl = OS_PENDING) << 25\n#define OS_PEND(fl,p)   NVIC_INT_CTRL  = (fl | p<<2) << 26\n#define OS_LOCK()       NVIC_ST_CTRL   =  0x0005\n#define OS_UNLOCK()     NVIC_ST_CTRL   =  0x0007\n\n#define OS_X_PENDING    ((NVIC_INT_CTRL >> 28) & 1)\n#define OS_X_UNPEND(fl) NVIC_INT_CTRL  = (*fl = OS_X_PENDING) << 27\n#define OS_X_PEND(fl,p) NVIC_INT_CTRL  = (fl | p) << 28\n#if (__TARGET_ARCH_6S_M)\n#define OS_X_INIT(n)    NVIC_IP[n>>2] |= 0xFF << (8*(n & 0x03)); \\\n                        NVIC_ISER[n>>5] = 1 << (n & 0x1F)\n#else\n#define OS_X_INIT(n)    NVIC_IP[n] = 0xFF; \\\n                        NVIC_ISER[n>>5] = 1 << (n & 0x1F)\n#endif\n#define OS_X_LOCK(n)    NVIC_ICER[n>>5] = 1 << (n & 0x1F)\n#define OS_X_UNLOCK(n)  NVIC_ISER[n>>5] = 1 << (n & 0x1F)\n\n/* Core Debug registers */\n#define DEMCR           (*((volatile U32 *)0xE000EDFC))\n\n/* ITM registers */\n#define ITM_CONTROL     (*((volatile U32 *)0xE0000E80))\n#define ITM_ENABLE      (*((volatile U32 *)0xE0000E00))\n#define ITM_PORT30_U32  (*((volatile U32 *)0xE0000078))\n#define ITM_PORT31_U32  (*((volatile U32 *)0xE000007C))\n#define ITM_PORT31_U16  (*((volatile U16 *)0xE000007C))\n#define ITM_PORT31_U8   (*((volatile U8  *)0xE000007C))\n\n/* Variables */\nextern BIT dbg_msg;\n\n/* Functions */\n#ifdef __USE_EXCLUSIVE_ACCESS\n #define rt_inc(p)     while(__strex((__ldrex(p)+1),p))\n #define rt_dec(p)     while(__strex((__ldrex(p)-1),p))\n#else\n #define rt_inc(p)     __disable_irq();(*p)++;__enable_irq();\n #define rt_dec(p)     __disable_irq();(*p)--;__enable_irq();\n#endif\n\n__inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {\n  U32 cnt,c2;\n#ifdef __USE_EXCLUSIVE_ACCESS\n  do {\n    if ((cnt = __ldrex(count)) == size) {\n      __clrex();\n      return (cnt); }\n  } while (__strex(cnt+1, count));\n  do {\n    c2 = (cnt = __ldrex(first)) + 1;\n    if (c2 == size) c2 = 0;\n  } while (__strex(c2, first));\n#else\n  __disable_irq();\n  if ((cnt = *count) < size) {\n    *count = cnt+1;\n    c2 = (cnt = *first) + 1;\n    if (c2 == size) c2 = 0;\n    *first = c2;\n  }\n  __enable_irq ();\n#endif\n  return (cnt);\n}\n\n__inline static void rt_systick_init (void) {\n  NVIC_ST_RELOAD  = os_trv;\n  NVIC_ST_CURRENT = 0;\n  NVIC_ST_CTRL    = 0x0007;\n  NVIC_SYS_PRI3  |= 0xFF000000;\n}\n\n__inline static void rt_svc_init (void) {\n#if !(__TARGET_ARCH_6S_M)\n  int sh,prigroup;\n#endif\n  NVIC_SYS_PRI3 |= 0x00FF0000;\n#if (__TARGET_ARCH_6S_M)\n  NVIC_SYS_PRI2 |= (NVIC_SYS_PRI3<<(8+1)) & 0xFC000000;\n#else\n  sh       = 8 - __clz (~((NVIC_SYS_PRI3 << 8) & 0xFF000000));\n  prigroup = ((NVIC_AIR_CTRL >> 8) & 0x07);\n  if (prigroup >= sh) {\n    sh = prigroup + 1;\n  }\n  NVIC_SYS_PRI2 = ((0xFEFFFFFF << sh) & 0xFF000000) | (NVIC_SYS_PRI2 & 0x00FFFFFF);\n#endif\n}\n\nextern void rt_set_PSP (U32 stack);\nextern U32  rt_get_PSP (void);\nextern void os_set_env (void);\nextern void *_alloc_box (void *box_mem);\nextern int  _free_box (void *box_mem, void *box);\n\nextern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);\nextern void rt_ret_val  (P_TCB p_TCB, U32 v0);\nextern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);\n\nextern void dbg_init (void);\nextern void dbg_task_notify (P_TCB p_tcb, BOOL create);\nextern void dbg_task_switch (U32 task_id);\n\n#ifdef DBG_MSG\n#define DBG_INIT() dbg_init()\n#define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)\n#define DBG_TASK_SWITCH(task_id)      if (dbg_msg && (os_tsk.new!=os_tsk.run)) \\\n                                                   dbg_task_switch(task_id)\n#else\n#define DBG_INIT()\n#define DBG_TASK_NOTIFY(p_tcb,create)\n#define DBG_TASK_SWITCH(task_id)\n#endif\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_List.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_LIST.C\n *      Purpose: Functions for the management of different lists\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_List.h\"\n#include \"RTX_Config.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* List head of chained ready tasks */\nstruct OS_XCB os_rdy;\n/* List head of chained delay tasks */\nstruct OS_XCB os_dly;\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_put_prio -----------------------------------*/\n\nvoid rt_put_prio(P_XCB p_CB, P_TCB p_task) {\n  /* Put task identified with \"p_task\" into list ordered by priority.       */\n  /* \"p_CB\" points to head of list; list has always an element at end with  */\n  /* a priority less than \"p_task->prio\".                                   */\n  P_TCB p_CB2;\n  U32 prio;\n  BOOL sem_mbx = __FALSE;\n\n  if (p_CB->cb_type == SCB || p_CB->cb_type == MCB || p_CB->cb_type == MUCB) {\n    sem_mbx = __TRUE;\n  }\n  prio = p_task->prio;\n  p_CB2 = p_CB->p_lnk;\n  /* Search for an entry in the list */\n  while (p_CB2 != NULL && prio <= p_CB2->prio) {\n    p_CB = (P_XCB)p_CB2;\n    p_CB2 = p_CB2->p_lnk;\n  }\n  /* Entry found, insert the task into the list */\n  p_task->p_lnk = p_CB2;\n  p_CB->p_lnk = p_task;\n  if (sem_mbx) {\n    if (p_CB2 != NULL) {\n      p_CB2->p_rlnk = p_task;\n    }\n    p_task->p_rlnk = (P_TCB)p_CB;\n  } else {\n    p_task->p_rlnk = NULL;\n  }\n}\n\n/*--------------------------- rt_get_first ----------------------------------*/\n\nP_TCB rt_get_first(P_XCB p_CB) {\n  /* Get task at head of list: it is the task with highest priority. */\n  /* \"p_CB\" points to head of list. */\n  P_TCB p_first;\n\n  p_first = p_CB->p_lnk;\n  p_CB->p_lnk = p_first->p_lnk;\n  if (p_CB->cb_type == SCB || p_CB->cb_type == MCB || p_CB->cb_type == MUCB) {\n    if (p_first->p_lnk != NULL) {\n      p_first->p_lnk->p_rlnk = (P_TCB)p_CB;\n      p_first->p_lnk = NULL;\n    }\n    p_first->p_rlnk = NULL;\n  } else {\n    p_first->p_lnk = NULL;\n  }\n  return (p_first);\n}\n\n/*--------------------------- rt_put_rdy_first ------------------------------*/\n\nvoid rt_put_rdy_first(P_TCB p_task) {\n  /* Put task identified with \"p_task\" at the head of the ready list. The   */\n  /* task must have at least a priority equal to highest priority in list.  */\n  p_task->p_lnk = os_rdy.p_lnk;\n  p_task->p_rlnk = NULL;\n  os_rdy.p_lnk = p_task;\n}\n\n/*--------------------------- rt_get_same_rdy_prio --------------------------*/\n\nP_TCB rt_get_same_rdy_prio(void) {\n  /* Remove a task of same priority from ready list if any exists. Other-   */\n  /* wise return NULL.                                                      */\n  P_TCB p_first;\n\n  p_first = os_rdy.p_lnk;\n  if (p_first->prio == os_tsk.run->prio) {\n    os_rdy.p_lnk = os_rdy.p_lnk->p_lnk;\n    return (p_first);\n  }\n  return (NULL);\n}\n\n/*--------------------------- rt_resort_prio --------------------------------*/\n\nvoid rt_resort_prio(P_TCB p_task) {\n  /* Re-sort ordered lists after the priority of 'p_task' has changed.      */\n  P_TCB p_CB;\n\n  if (p_task->p_rlnk == NULL) {\n    if (p_task->state == READY) {\n      /* Task is chained into READY list. */\n      p_CB = (P_TCB)&os_rdy;\n      goto res;\n    }\n  } else {\n    p_CB = p_task->p_rlnk;\n    while (p_CB->cb_type == TCB) {\n      /* Find a header of this task chain list. */\n      p_CB = p_CB->p_rlnk;\n    }\n  res:\n    rt_rmv_list(p_task);\n    rt_put_prio((P_XCB)p_CB, p_task);\n  }\n}\n\n/*--------------------------- rt_put_dly ------------------------------------*/\n\nvoid rt_put_dly(P_TCB p_task, U16 delay) {\n  /* Put a task identified with \"p_task\" into chained delay wait list using */\n  /* a delay value of \"delay\".                                              */\n  P_TCB p;\n  U32 delta, idelay = delay;\n\n  p = (P_TCB)&os_dly;\n  if (p->p_dlnk == NULL) {\n    /* Delay list empty */\n    delta = 0;\n    goto last;\n  }\n  delta = os_dly.delta_time;\n  while (delta < idelay) {\n    if (p->p_dlnk == NULL) {\n      /* End of list found */\n    last:\n      p_task->p_dlnk = NULL;\n      p->p_dlnk = p_task;\n      p_task->p_blnk = p;\n      p->delta_time = (U16)(idelay - delta);\n      p_task->delta_time = 0;\n      return;\n    }\n    p = p->p_dlnk;\n    delta += p->delta_time;\n  }\n  /* Right place found */\n  p_task->p_dlnk = p->p_dlnk;\n  p->p_dlnk = p_task;\n  p_task->p_blnk = p;\n  if (p_task->p_dlnk != NULL) {\n    p_task->p_dlnk->p_blnk = p_task;\n  }\n  p_task->delta_time = (U16)(delta - idelay);\n  p->delta_time -= p_task->delta_time;\n}\n\n/*--------------------------- rt_dec_dly ------------------------------------*/\n\nvoid rt_dec_dly(void) {\n  /* Decrement delta time of list head: remove tasks having a value of zero.*/\n  P_TCB p_rdy;\n\n  if (os_dly.p_dlnk == NULL) {\n    return;\n  }\n  os_dly.delta_time--;\n  while ((os_dly.delta_time == 0) && (os_dly.p_dlnk != NULL)) {\n    p_rdy = os_dly.p_dlnk;\n    if (p_rdy->p_rlnk != NULL) {\n      /* Task is really enqueued, remove task from semaphore/mailbox */\n      /* timeout waiting list. */\n      p_rdy->p_rlnk->p_lnk = p_rdy->p_lnk;\n      if (p_rdy->p_lnk != NULL) {\n        p_rdy->p_lnk->p_rlnk = p_rdy->p_rlnk;\n        p_rdy->p_lnk = NULL;\n      }\n      p_rdy->p_rlnk = NULL;\n    }\n    rt_put_prio(&os_rdy, p_rdy);\n    os_dly.delta_time = p_rdy->delta_time;\n    if (p_rdy->state == WAIT_ITV) {\n      /* Calculate the next time for interval wait. */\n      p_rdy->delta_time = p_rdy->interval_time + (U16)os_time;\n    }\n    p_rdy->state = READY;\n    os_dly.p_dlnk = p_rdy->p_dlnk;\n    if (p_rdy->p_dlnk != NULL) {\n      p_rdy->p_dlnk->p_blnk = (P_TCB)&os_dly;\n      p_rdy->p_dlnk = NULL;\n    }\n    p_rdy->p_blnk = NULL;\n  }\n}\n\n/*--------------------------- rt_rmv_list -----------------------------------*/\n\nvoid rt_rmv_list(P_TCB p_task) {\n  /* Remove task identified with \"p_task\" from ready, semaphore or mailbox  */\n  /* waiting list if enqueued.                                              */\n  P_TCB p_b;\n\n  if (p_task->p_rlnk != NULL) {\n    /* A task is enqueued in semaphore / mailbox waiting list. */\n    p_task->p_rlnk->p_lnk = p_task->p_lnk;\n    if (p_task->p_lnk != NULL) {\n      p_task->p_lnk->p_rlnk = p_task->p_rlnk;\n    }\n    return;\n  }\n\n  p_b = (P_TCB)&os_rdy;\n  while (p_b != NULL) {\n    /* Search the ready list for task \"p_task\" */\n    if (p_b->p_lnk == p_task) {\n      p_b->p_lnk = p_task->p_lnk;\n      return;\n    }\n    p_b = p_b->p_lnk;\n  }\n}\n\n/*--------------------------- rt_rmv_dly ------------------------------------*/\n\nvoid rt_rmv_dly(P_TCB p_task) {\n  /* Remove task identified with \"p_task\" from delay list if enqueued.      */\n  P_TCB p_b;\n\n  p_b = p_task->p_blnk;\n  if (p_b != NULL) {\n    /* Task is really enqueued */\n    p_b->p_dlnk = p_task->p_dlnk;\n    if (p_task->p_dlnk != NULL) {\n      /* 'p_task' is in the middle of list */\n      p_b->delta_time += p_task->delta_time;\n      p_task->p_dlnk->p_blnk = p_b;\n      p_task->p_dlnk = NULL;\n    } else {\n      /* 'p_task' is at the end of list */\n      p_b->delta_time = 0;\n    }\n    p_task->p_blnk = NULL;\n  }\n}\n\n/*--------------------------- rt_psq_enq ------------------------------------*/\n\nvoid rt_psq_enq(OS_ID entry, U32 arg) {\n  /* Insert post service request \"entry\" into ps-queue. */\n  U32 idx;\n\n  idx = rt_inc_qi(os_psq->size, &os_psq->count, &os_psq->first);\n  if (idx < os_psq->size) {\n    os_psq->q[idx].id = entry;\n    os_psq->q[idx].arg = arg;\n  } else {\n    os_error(OS_ERR_FIFO_OVF);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_List.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_LIST.H\n *      Purpose: Functions for the management of different lists\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Definitions */\n\n/* Values for 'cb_type' */\n#define TCB             0\n#define MCB             1\n#define SCB             2\n#define MUCB            3\n#define HCB             4\n\n/* Variables */\nextern struct OS_XCB os_rdy;\nextern struct OS_XCB os_dly;\n\n/* Functions */\nextern void  rt_put_prio      (P_XCB p_CB, P_TCB p_task);\nextern P_TCB rt_get_first     (P_XCB p_CB);\nextern void  rt_put_rdy_first (P_TCB p_task);\nextern P_TCB rt_get_same_rdy_prio (void);\nextern void  rt_resort_prio   (P_TCB p_task);\nextern void  rt_put_dly       (P_TCB p_task, U16 delay);\nextern void  rt_dec_dly       (void);\nextern void  rt_rmv_list      (P_TCB p_task);\nextern void  rt_rmv_dly       (P_TCB p_task);\nextern void  rt_psq_enq       (OS_ID entry, U32 arg);\n\n/* This is a fast macro generating in-line code */\n#define rt_rdy_prio(void) (os_rdy.p_lnk->prio)\n\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Mailbox.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MAILBOX.C\n *      Purpose: Implements waits and wake-ups for mailbox messages\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Mailbox.h\"\n#include \"RTX_Config.h\"\n#include \"rt_List.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_mbx_init -----------------------------------*/\n\nvoid rt_mbx_init(OS_ID mailbox, U16 mbx_size) {\n  /* Initialize a mailbox */\n  P_MCB p_MCB = mailbox;\n\n  p_MCB->cb_type = MCB;\n  p_MCB->state = 0;\n  p_MCB->isr_st = 0;\n  p_MCB->p_lnk = NULL;\n  p_MCB->first = 0;\n  p_MCB->last = 0;\n  p_MCB->count = 0;\n  p_MCB->size =\n      (mbx_size + sizeof(void *) - sizeof(struct OS_MCB)) / (U32)sizeof(void *);\n}\n\n/*--------------------------- rt_mbx_send -----------------------------------*/\n\nOS_RESULT rt_mbx_send(OS_ID mailbox, void *p_msg, U16 timeout) {\n  /* Send message to a mailbox */\n  P_MCB p_MCB = mailbox;\n  P_TCB p_TCB;\n\n  if ((p_MCB->p_lnk != NULL) && (p_MCB->state == 1)) {\n    /* A task is waiting for message */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val2(p_TCB, 0x10 /*osEventMessage*/, (U32)p_msg);\n#else\n    *p_TCB->msg = p_msg;\n    rt_ret_val(p_TCB, OS_R_MBX);\n#endif\n    rt_rmv_dly(p_TCB);\n    rt_dispatch(p_TCB);\n  } else {\n    /* Store message in mailbox queue */\n    if (p_MCB->count == p_MCB->size) {\n      /* No free message entry, wait for one. If message queue is full, */\n      /* then no task is waiting for message. The 'p_MCB->p_lnk' list   */\n      /* pointer can now be reused for send message waits task list.    */\n      if (timeout == 0) {\n        return (OS_R_TMO);\n      }\n      if (p_MCB->p_lnk != NULL) {\n        rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n      } else {\n        p_MCB->p_lnk = os_tsk.run;\n        os_tsk.run->p_lnk = NULL;\n        os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n        /* Task is waiting to send a message */\n        p_MCB->state = 2;\n      }\n      os_tsk.run->msg = p_msg;\n      rt_block(timeout, WAIT_MBX);\n      return (OS_R_TMO);\n    }\n    /* Yes, there is a free entry in a mailbox. */\n    p_MCB->msg[p_MCB->first] = p_msg;\n    rt_inc(&p_MCB->count);\n    if (++p_MCB->first == p_MCB->size) {\n      p_MCB->first = 0;\n    }\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mbx_wait -----------------------------------*/\n\nOS_RESULT rt_mbx_wait(OS_ID mailbox, void **message, U16 timeout) {\n  /* Receive a message; possibly wait for it */\n  P_MCB p_MCB = mailbox;\n  P_TCB p_TCB;\n\n  /* If a message is available in the fifo buffer */\n  /* remove it from the fifo buffer and return. */\n  if (p_MCB->count) {\n    *message = p_MCB->msg[p_MCB->last];\n    if (++p_MCB->last == p_MCB->size) {\n      p_MCB->last = 0;\n    }\n    if ((p_MCB->p_lnk != NULL) && (p_MCB->state == 2)) {\n      /* A task is waiting to send message */\n      p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n      rt_ret_val(p_TCB, OS_R_OK);\n#endif\n      p_MCB->msg[p_MCB->first] = p_TCB->msg;\n      if (++p_MCB->first == p_MCB->size) {\n        p_MCB->first = 0;\n      }\n      rt_rmv_dly(p_TCB);\n      rt_dispatch(p_TCB);\n    } else {\n      rt_dec(&p_MCB->count);\n    }\n    return (OS_R_OK);\n  }\n  /* No message available: wait for one */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  if (p_MCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n  } else {\n    p_MCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n    /* Task is waiting to receive a message */\n    p_MCB->state = 1;\n  }\n  rt_block(timeout, WAIT_MBX);\n#ifndef __CMSIS_RTOS\n  os_tsk.run->msg = message;\n#endif\n  return (OS_R_TMO);\n}\n\n/*--------------------------- rt_mbx_check ----------------------------------*/\n\nOS_RESULT rt_mbx_check(OS_ID mailbox) {\n  /* Check for free space in a mailbox. Returns the number of messages     */\n  /* that can be stored to a mailbox. It returns 0 when mailbox is full.   */\n  P_MCB p_MCB = mailbox;\n\n  return (p_MCB->size - p_MCB->count);\n}\n\n/*--------------------------- isr_mbx_send ----------------------------------*/\n\nvoid isr_mbx_send(OS_ID mailbox, void *p_msg) {\n  /* Same function as \"os_mbx_send\", but to be called by ISRs. */\n  P_MCB p_MCB = mailbox;\n\n  rt_psq_enq(p_MCB, (U32)p_msg);\n  rt_psh_req();\n}\n\n/*--------------------------- isr_mbx_receive -------------------------------*/\n\nOS_RESULT isr_mbx_receive(OS_ID mailbox, void **message) {\n  /* Receive a message in the interrupt function. The interrupt function   */\n  /* should not wait for a message since this would block the rtx os.      */\n  P_MCB p_MCB = mailbox;\n\n  if (p_MCB->count) {\n    /* A message is available in the fifo buffer. */\n    *message = p_MCB->msg[p_MCB->last];\n    if (p_MCB->state == 2) {\n      /* A task is locked waiting to send message */\n      rt_psq_enq(p_MCB, 0);\n      rt_psh_req();\n    }\n    rt_dec(&p_MCB->count);\n    if (++p_MCB->last == p_MCB->size) {\n      p_MCB->last = 0;\n    }\n    return (OS_R_MBX);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mbx_psh ------------------------------------*/\n\nvoid rt_mbx_psh(P_MCB p_CB, void *p_msg) {\n  /* Store the message to the mailbox queue or pass it to task directly. */\n  P_TCB p_TCB;\n  void *mem;\n\n  if (p_CB->p_lnk != NULL)\n    switch (p_CB->state) {\n#ifdef __CMSIS_RTOS\n    case 3:\n      /* Task is waiting to allocate memory, remove it from the waiting list */\n      mem = rt_alloc_box(p_msg);\n      if (mem == NULL)\n        break;\n      p_TCB = rt_get_first((P_XCB)p_CB);\n      rt_ret_val(p_TCB, (U32)mem);\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n#endif\n    case 2:\n      /* Task is waiting to send a message, remove it from the waiting list */\n      p_TCB = rt_get_first((P_XCB)p_CB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n      rt_ret_val(p_TCB, OS_R_OK);\n#endif\n      p_CB->msg[p_CB->first] = p_TCB->msg;\n      rt_inc(&p_CB->count);\n      if (++p_CB->first == p_CB->size) {\n        p_CB->first = 0;\n      }\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n    case 1:\n      /* Task is waiting for a message, pass the message to the task directly */\n      p_TCB = rt_get_first((P_XCB)p_CB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_TCB, 0x10 /*osEventMessage*/, (U32)p_msg);\n#else\n      *p_TCB->msg = p_msg;\n      rt_ret_val(p_TCB, OS_R_MBX);\n#endif\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n    }\n  else {\n    /* No task is waiting for a message, store it to the mailbox queue */\n    if (p_CB->count < p_CB->size) {\n      p_CB->msg[p_CB->first] = p_msg;\n      rt_inc(&p_CB->count);\n      if (++p_CB->first == p_CB->size) {\n        p_CB->first = 0;\n      }\n    } else {\n      os_error(OS_ERR_MBX_OVF);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Mailbox.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MAILBOX.H\n *      Purpose: Implements waits and wake-ups for mailbox messages\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\nextern void      rt_mbx_init  (OS_ID mailbox, U16 mbx_size);\nextern OS_RESULT rt_mbx_send  (OS_ID mailbox, void *p_msg,    U16 timeout);\nextern OS_RESULT rt_mbx_wait  (OS_ID mailbox, void **message, U16 timeout);\nextern OS_RESULT rt_mbx_check (OS_ID mailbox);\nextern void      isr_mbx_send (OS_ID mailbox, void *p_msg);\nextern OS_RESULT isr_mbx_receive (OS_ID mailbox, void **message);\nextern void      rt_mbx_psh   (P_MCB p_CB,    void *p_msg);\n\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_MemBox.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MEMBOX.C\n *      Purpose: Interface functions for fixed memory block management system\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_MemBox.h\"\n#include \"RTX_Config.h\"\n#include \"rt_System.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- _init_box -------------------------------------*/\n\nint _init_box(void *box_mem, U32 box_size, U32 blk_size) {\n  /* Initialize memory block system, returns 0 if OK, 1 if fails. */\n  void *end;\n  void *blk;\n  void *next;\n  U32 sizeof_bm;\n\n  /* Create memory structure. */\n  if (blk_size & BOX_ALIGN_8) {\n    /* Memory blocks 8-byte aligned. */\n    blk_size = ((blk_size & ~BOX_ALIGN_8) + 7) & ~7;\n    sizeof_bm = (sizeof(struct OS_BM) + 7) & ~7;\n  } else {\n    /* Memory blocks 4-byte aligned. */\n    blk_size = (blk_size + 3) & ~3;\n    sizeof_bm = sizeof(struct OS_BM);\n  }\n  if (blk_size == 0) {\n    return (1);\n  }\n  if ((blk_size + sizeof_bm) > box_size) {\n    return (1);\n  }\n  /* Create a Memory structure. */\n  blk = ((U8 *)box_mem) + sizeof_bm;\n  ((P_BM)box_mem)->free = blk;\n  end = ((U8 *)box_mem) + box_size;\n  ((P_BM)box_mem)->end = end;\n  ((P_BM)box_mem)->blk_size = blk_size;\n\n  /* Link all free blocks using offsets. */\n  end = ((U8 *)end) - blk_size;\n  while (1) {\n    next = ((U8 *)blk) + blk_size;\n    if (next > end)\n      break;\n    *((void **)blk) = next;\n    blk = next;\n  }\n  /* end marker */\n  *((void **)blk) = 0;\n  return (0);\n}\n\n/*--------------------------- rt_alloc_box ----------------------------------*/\n\nvoid *rt_alloc_box(void *box_mem) {\n  /* Allocate a memory block and return start address. */\n  void **free;\n#ifndef __USE_EXCLUSIVE_ACCESS\n  int irq_dis;\n\n  irq_dis = __disable_irq();\n  free = ((P_BM)box_mem)->free;\n  if (free) {\n    ((P_BM)box_mem)->free = *free;\n  }\n  if (!irq_dis)\n    __enable_irq();\n#else\n  do {\n    if ((free = (void **)__ldrex(&((P_BM)box_mem)->free)) == 0) {\n      __clrex();\n      break;\n    }\n  } while (__strex((U32)*free, &((P_BM)box_mem)->free));\n#endif\n  return (free);\n}\n\n/*--------------------------- _calloc_box -----------------------------------*/\n\nvoid *_calloc_box(void *box_mem) {\n  /* Allocate a 0-initialized memory block and return start address. */\n  void *free;\n  U32 *p;\n  U32 i;\n\n  free = _alloc_box(box_mem);\n  if (free) {\n    p = free;\n    for (i = ((P_BM)box_mem)->blk_size; i; i -= 4) {\n      *p = 0;\n      p++;\n    }\n  }\n  return (free);\n}\n\n/*--------------------------- rt_free_box -----------------------------------*/\n\nint rt_free_box(void *box_mem, void *box) {\n  /* Free a memory block, returns 0 if OK, 1 if box does not belong to box_mem\n   */\n#ifndef __USE_EXCLUSIVE_ACCESS\n  int irq_dis;\n#endif\n\n  if (box < box_mem || box >= ((P_BM)box_mem)->end) {\n    return (1);\n  }\n\n#ifndef __USE_EXCLUSIVE_ACCESS\n  irq_dis = __disable_irq();\n  *((void **)box) = ((P_BM)box_mem)->free;\n  ((P_BM)box_mem)->free = box;\n  if (!irq_dis)\n    __enable_irq();\n#else\n  do {\n    *((void **)box) = (void *)__ldrex(&((P_BM)box_mem)->free);\n  } while (__strex((U32)box, &((P_BM)box_mem)->free));\n#endif\n  return (0);\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_MemBox.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MEMBOX.H\n *      Purpose: Interface functions for fixed memory block management system\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\n#define rt_init_box     _init_box\n#define rt_calloc_box   _calloc_box\nextern int     _init_box   (void *box_mem, U32 box_size, U32 blk_size);\nextern void *rt_alloc_box  (void *box_mem);\nextern void *  _calloc_box (void *box_mem);\nextern int   rt_free_box   (void *box_mem, void *box);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Memory.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MEMORY.C\n *      Purpose: Interface functions for Dynamic Memory Management System\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Memory.h\"\n#include \"rt_TypeDef.h\"\n\n/* Functions */\n\n// Initialize Dynamic Memory pool\n//   Parameters:\n//     pool:    Pointer to memory pool\n//     size:    Size of memory pool in bytes\n//   Return:    0 - OK, 1 - Error\n\nint rt_init_mem(void *pool, U32 size) {\n  MEMP *ptr;\n\n  if ((pool == NULL) || (size < sizeof(MEMP)))\n    return (1);\n\n  ptr = (MEMP *)pool;\n  ptr->next = (MEMP *)((U32)pool + size - sizeof(MEMP *));\n  ptr->next->next = NULL;\n  ptr->len = 0;\n\n  return (0);\n}\n\n// Allocate Memory from Memory pool\n//   Parameters:\n//     pool:    Pointer to memory pool\n//     size:    Size of memory in bytes to allocate\n//   Return:    Pointer to allocated memory\n\nvoid *rt_alloc_mem(void *pool, U32 size) {\n  MEMP *p, *p_search, *p_new;\n  U32 hole_size;\n\n  if ((pool == NULL) || (size == 0))\n    return NULL;\n\n  /* Add header offset to 'size' */\n  size += sizeof(MEMP);\n  /* Make sure that block is 4-byte aligned  */\n  size = (size + 3) & ~3;\n\n  p_search = (MEMP *)pool;\n  while (1) {\n    hole_size = (U32)p_search->next - (U32)p_search;\n    hole_size -= p_search->len;\n    /* Check if hole size is big enough */\n    if (hole_size >= size)\n      break;\n    p_search = p_search->next;\n    if (p_search->next == NULL) {\n      /* Failed, we are at the end of the list */\n      return NULL;\n    }\n  }\n\n  if (p_search->len == 0) {\n    /* No block is allocated, set the Length of the first element */\n    p_search->len = size;\n    p = (MEMP *)(((U32)p_search) + sizeof(MEMP));\n  } else {\n    /* Insert new list element into the memory list */\n    p_new = (MEMP *)((U32)p_search + p_search->len);\n    p_new->next = p_search->next;\n    p_new->len = size;\n    p_search->next = p_new;\n    p = (MEMP *)(((U32)p_new) + sizeof(MEMP));\n  }\n\n  return (p);\n}\n\n// Free Memory and return it to Memory pool\n//   Parameters:\n//     pool:    Pointer to memory pool\n//     mem:     Pointer to memory to free\n//   Return:    0 - OK, 1 - Error\n\nint rt_free_mem(void *pool, void *mem) {\n  MEMP *p_search, *p_prev, *p_return;\n\n  if ((pool == NULL) || (mem == NULL))\n    return (1);\n\n  p_return = (MEMP *)((U32)mem - sizeof(MEMP));\n\n  /* Set list header */\n  p_prev = NULL;\n  p_search = (MEMP *)pool;\n  while (p_search != p_return) {\n    p_prev = p_search;\n    p_search = p_search->next;\n    if (p_search == NULL) {\n      /* Valid Memory block not found */\n      return (1);\n    }\n  }\n\n  if (p_prev == NULL) {\n    /* First block to be released, only set length to 0 */\n    p_search->len = 0;\n  } else {\n    /* Discard block from chain list */\n    p_prev->next = p_search->next;\n  }\n\n  return (0);\n}\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Memory.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MEMORY.H\n *      Purpose: Interface functions for Dynamic Memory Management System\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Types */\ntypedef struct mem {              /* << Memory Pool management struct >>     */\n  struct mem *next;               /* Next Memory Block in the list           */\n  U32         len;                /* Length of data block                    */\n} MEMP;\n\n/* Functions */\nextern int   rt_init_mem  (void *pool, U32  size);\nextern void *rt_alloc_mem (void *pool, U32  size);\nextern int   rt_free_mem  (void *pool, void *mem);\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Mutex.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MUTEX.C\n *      Purpose: Implements mutex synchronization objects\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Mutex.h\"\n#include \"RTX_Config.h\"\n#include \"rt_List.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_mut_init -----------------------------------*/\n\nvoid rt_mut_init(OS_ID mutex) {\n  /* Initialize a mutex object */\n  P_MUCB p_MCB = mutex;\n\n  p_MCB->cb_type = MUCB;\n  p_MCB->prio = 0;\n  p_MCB->level = 0;\n  p_MCB->p_lnk = NULL;\n  p_MCB->owner = NULL;\n}\n\n/*--------------------------- rt_mut_delete ---------------------------------*/\n\n#ifdef __CMSIS_RTOS\nOS_RESULT rt_mut_delete(OS_ID mutex) {\n  /* Delete a mutex object */\n  P_MUCB p_MCB = mutex;\n  P_TCB p_TCB;\n\n  __DMB();\n  /* Restore owner task's priority. */\n  if (p_MCB->level != 0) {\n    p_MCB->owner->prio = p_MCB->prio;\n    if (p_MCB->owner != os_tsk.run) {\n      rt_resort_prio(p_MCB->owner);\n    }\n  }\n\n  while (p_MCB->p_lnk != NULL) {\n    /* A task is waiting for mutex. */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n    rt_ret_val(p_TCB, 0 /*osOK*/);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n    rt_put_prio(&os_rdy, p_TCB);\n  }\n\n  if (os_rdy.p_lnk && (os_rdy.p_lnk->prio > os_tsk.run->prio)) {\n    /* preempt running task */\n    rt_put_prio(&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_dispatch(NULL);\n  }\n\n  p_MCB->cb_type = 0;\n\n  return (OS_R_OK);\n}\n#endif\n\n/*--------------------------- rt_mut_release --------------------------------*/\n\nOS_RESULT rt_mut_release(OS_ID mutex) {\n  /* Release a mutex object */\n  P_MUCB p_MCB = mutex;\n  P_TCB p_TCB;\n\n  if (p_MCB->level == 0 || p_MCB->owner != os_tsk.run) {\n    /* Unbalanced mutex release or task is not the owner */\n    return (OS_R_NOK);\n  }\n  __DMB();\n  if (--p_MCB->level != 0) {\n    return (OS_R_OK);\n  }\n  /* Restore owner task's priority. */\n  os_tsk.run->prio = p_MCB->prio;\n  if (p_MCB->p_lnk != NULL) {\n    /* A task is waiting for mutex. */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n    rt_ret_val(p_TCB, OS_R_MUT);\n#endif\n    rt_rmv_dly(p_TCB);\n    /* A waiting task becomes the owner of this mutex. */\n    p_MCB->level = 1;\n    p_MCB->owner = p_TCB;\n    p_MCB->prio = p_TCB->prio;\n    /* Priority inversion, check which task continues. */\n    if (os_tsk.run->prio >= rt_rdy_prio()) {\n      rt_dispatch(p_TCB);\n    } else {\n      /* Ready task has higher priority than running task. */\n      rt_put_prio(&os_rdy, os_tsk.run);\n      rt_put_prio(&os_rdy, p_TCB);\n      os_tsk.run->state = READY;\n      p_TCB->state = READY;\n      rt_dispatch(NULL);\n    }\n  } else {\n    /* Check if own priority raised by priority inversion. */\n    if (rt_rdy_prio() > os_tsk.run->prio) {\n      rt_put_prio(&os_rdy, os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_dispatch(NULL);\n    }\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mut_wait -----------------------------------*/\n\nOS_RESULT rt_mut_wait(OS_ID mutex, U16 timeout) {\n  /* Wait for a mutex, continue when mutex is free. */\n  P_MUCB p_MCB = mutex;\n\n  if (p_MCB->level == 0) {\n    p_MCB->owner = os_tsk.run;\n    p_MCB->prio = os_tsk.run->prio;\n    goto inc;\n  }\n  if (p_MCB->owner == os_tsk.run) {\n    /* OK, running task is the owner of this mutex. */\n  inc:\n    p_MCB->level++;\n    __DMB();\n    return (OS_R_OK);\n  }\n  /* Mutex owned by another task, wait until released. */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  /* Raise the owner task priority if lower than current priority. */\n  /* This priority inversion is called priority inheritance.       */\n  if (p_MCB->prio < os_tsk.run->prio) {\n    p_MCB->owner->prio = os_tsk.run->prio;\n    rt_resort_prio(p_MCB->owner);\n  }\n  if (p_MCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n  } else {\n    p_MCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n  }\n  rt_block(timeout, WAIT_MUT);\n  return (OS_R_TMO);\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Mutex.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MUTEX.H\n *      Purpose: Implements mutex synchronization objects\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\nextern void      rt_mut_init    (OS_ID mutex);\nextern OS_RESULT rt_mut_delete  (OS_ID mutex);\nextern OS_RESULT rt_mut_release (OS_ID mutex);\nextern OS_RESULT rt_mut_wait    (OS_ID mutex, U16 timeout);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Robin.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_ROBIN.C\n *      Purpose: Round Robin Task switching\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Robin.h\"\n#include \"RTX_Config.h\"\n#include \"rt_List.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\nstruct OS_ROBIN os_robin;\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_init_robin ---------------------------------*/\n\n__weak void rt_init_robin(void) {\n  /* Initialize Round Robin variables. */\n  os_robin.task = NULL;\n  os_robin.tout = (U16)os_rrobin;\n}\n\n/*--------------------------- rt_chk_robin ----------------------------------*/\n\n__weak void rt_chk_robin(void) {\n  /* Check if Round Robin timeout expired and switch to the next ready task.*/\n  P_TCB p_new;\n\n  if (os_robin.task != os_rdy.p_lnk) {\n    /* New task was suspended, reset Round Robin timeout. */\n    os_robin.task = os_rdy.p_lnk;\n    os_robin.time = (U16)os_time + os_robin.tout - 1;\n  }\n  if (os_robin.time == (U16)os_time) {\n    /* Round Robin timeout has expired, swap Robin tasks. */\n    os_robin.task = NULL;\n    p_new = rt_get_first(&os_rdy);\n    rt_put_prio((P_XCB)&os_rdy, p_new);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Robin.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_ROBIN.H\n *      Purpose: Round Robin Task switching definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Variables */\nextern struct OS_ROBIN os_robin;\n\n/* Functions */\nextern void rt_init_robin (void);\nextern void rt_chk_robin  (void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Semaphore.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SEMAPHORE.C\n *      Purpose: Implements binary and counting semaphores\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Semaphore.h\"\n#include \"RTX_Config.h\"\n#include \"rt_List.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_sem_init -----------------------------------*/\n\nvoid rt_sem_init(OS_ID semaphore, U16 token_count) {\n  /* Initialize a semaphore */\n  P_SCB p_SCB = semaphore;\n\n  p_SCB->cb_type = SCB;\n  p_SCB->p_lnk = NULL;\n  p_SCB->tokens = token_count;\n}\n\n/*--------------------------- rt_sem_delete ---------------------------------*/\n\n#ifdef __CMSIS_RTOS\nOS_RESULT rt_sem_delete(OS_ID semaphore) {\n  /* Delete semaphore */\n  P_SCB p_SCB = semaphore;\n  P_TCB p_TCB;\n\n  __DMB();\n  while (p_SCB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_SCB);\n    rt_ret_val(p_TCB, 0);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n    rt_put_prio(&os_rdy, p_TCB);\n  }\n\n  if (os_rdy.p_lnk && (os_rdy.p_lnk->prio > os_tsk.run->prio)) {\n    /* preempt running task */\n    rt_put_prio(&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_dispatch(NULL);\n  }\n\n  p_SCB->cb_type = 0;\n\n  return (OS_R_OK);\n}\n#endif\n\n/*--------------------------- rt_sem_send -----------------------------------*/\n\nOS_RESULT rt_sem_send(OS_ID semaphore) {\n  /* Return a token to semaphore */\n  P_SCB p_SCB = semaphore;\n  P_TCB p_TCB;\n\n  __DMB();\n  if (p_SCB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_SCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 1);\n#else\n    rt_ret_val(p_TCB, OS_R_SEM);\n#endif\n    rt_rmv_dly(p_TCB);\n    rt_dispatch(p_TCB);\n  } else {\n    /* Store token. */\n    p_SCB->tokens++;\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_sem_wait -----------------------------------*/\n\nOS_RESULT rt_sem_wait(OS_ID semaphore, U16 timeout) {\n  /* Obtain a token; possibly wait for it */\n  P_SCB p_SCB = semaphore;\n\n  if (p_SCB->tokens) {\n    p_SCB->tokens--;\n    __DMB();\n    return (OS_R_OK);\n  }\n  /* No token available: wait for one */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  if (p_SCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_SCB, os_tsk.run);\n  } else {\n    p_SCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_SCB;\n  }\n  rt_block(timeout, WAIT_SEM);\n  return (OS_R_TMO);\n}\n\n/*--------------------------- isr_sem_send ----------------------------------*/\n\nvoid isr_sem_send(OS_ID semaphore) {\n  /* Same function as \"os_sem\"send\", but to be called by ISRs */\n  P_SCB p_SCB = semaphore;\n\n  rt_psq_enq(p_SCB, 0);\n  rt_psh_req();\n}\n\n/*--------------------------- rt_sem_psh ------------------------------------*/\n\nvoid rt_sem_psh(P_SCB p_CB) {\n  /* Check if task has to be waken up */\n  P_TCB p_TCB;\n\n  __DMB();\n  if (p_CB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_CB);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 1);\n#else\n    rt_ret_val(p_TCB, OS_R_SEM);\n#endif\n    rt_put_prio(&os_rdy, p_TCB);\n  } else {\n    /* Store token */\n    p_CB->tokens++;\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Semaphore.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SEMAPHORE.H\n *      Purpose: Implements binary and counting semaphores\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Functions */\nextern void      rt_sem_init  (OS_ID semaphore, U16 token_count);\nextern OS_RESULT rt_sem_delete(OS_ID semaphore);\nextern OS_RESULT rt_sem_send  (OS_ID semaphore);\nextern OS_RESULT rt_sem_wait  (OS_ID semaphore, U16 timeout);\nextern void      isr_sem_send (OS_ID semaphore);\nextern void      rt_sem_psh (P_SCB p_CB);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_System.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SYSTEM.C\n *      Purpose: System Task Manager\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_System.h\"\n#include \"RTX_Config.h\"\n#include \"rt_Event.h\"\n#include \"rt_List.h\"\n#include \"rt_Mailbox.h\"\n#include \"rt_Robin.h\"\n#include \"rt_Semaphore.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_Timer.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\nint os_tick_irqn;\n\n/*----------------------------------------------------------------------------\n *      Local Variables\n *---------------------------------------------------------------------------*/\n\nstatic volatile BIT os_lock;\nstatic volatile BIT os_psh_flag;\n#ifndef __CORTEX_A9\nstatic U8 pend_flags;\n#endif\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n#if defined(__CC_ARM)\n__asm void $$RTX$$version(void) {\n  /* Export a version number symbol for a version control. */\n\n  EXPORT __RL_RTX_VER\n\n      __RL_RTX_VER EQU 0x450\n}\n#endif\n\n/*--------------------------- rt_suspend ------------------------------------*/\n\nU32 rt_suspend(void) {\n  /* Suspend OS scheduler */\n  U32 delta = 0xFFFF;\n\n  rt_tsk_lock();\n\n  if (os_dly.p_dlnk) {\n    delta = os_dly.delta_time;\n  }\n#ifndef __CMSIS_RTOS\n  if (os_tmr.next) {\n    if (os_tmr.tcnt < delta)\n      delta = os_tmr.tcnt;\n  }\n#endif\n\n  return (delta);\n}\n\n/*--------------------------- rt_resume -------------------------------------*/\n\nvoid rt_resume(U32 sleep_time) {\n  /* Resume OS scheduler after suspend */\n  P_TCB next;\n  U32 delta;\n\n  os_tsk.run->state = READY;\n  rt_put_rdy_first(os_tsk.run);\n\n  os_robin.task = NULL;\n\n  /* Update delays. */\n  if (os_dly.p_dlnk) {\n    delta = sleep_time;\n    if (delta >= os_dly.delta_time) {\n      delta -= os_dly.delta_time;\n      os_time += os_dly.delta_time;\n      os_dly.delta_time = 1;\n      while (os_dly.p_dlnk) {\n        rt_dec_dly();\n        if (delta == 0)\n          break;\n        delta--;\n        os_time++;\n      }\n    } else {\n      os_time += delta;\n      os_dly.delta_time -= delta;\n    }\n  } else {\n    os_time += sleep_time;\n  }\n\n#ifndef __CMSIS_RTOS\n  /* Check the user timers. */\n  if (os_tmr.next) {\n    delta = sleep_time;\n    if (delta >= os_tmr.tcnt) {\n      delta -= os_tmr.tcnt;\n      os_tmr.tcnt = 1;\n      while (os_tmr.next) {\n        rt_tmr_tick();\n        if (delta == 0)\n          break;\n        delta--;\n      }\n    } else {\n      os_tmr.tcnt -= delta;\n    }\n  }\n#endif\n\n  /* Switch back to highest ready task */\n  next = rt_get_first(&os_rdy);\n  rt_switch_req(next);\n\n  rt_tsk_unlock();\n}\n\n/*--------------------------- rt_tsk_lock -----------------------------------*/\n\nvoid rt_tsk_lock(void) {\n  /* Prevent task switching by locking out scheduler */\n  if (os_tick_irqn < 0) {\n    OS_LOCK();\n    os_lock = __TRUE;\n    OS_UNPEND(&pend_flags);\n  } else {\n    OS_X_LOCK(os_tick_irqn);\n    os_lock = __TRUE;\n    OS_X_UNPEND(&pend_flags);\n  }\n}\n\n/*--------------------------- rt_tsk_unlock ---------------------------------*/\n\nvoid rt_tsk_unlock(void) {\n  /* Unlock scheduler and re-enable task switching */\n  if (os_tick_irqn < 0) {\n    OS_UNLOCK();\n    os_lock = __FALSE;\n    OS_PEND(pend_flags, os_psh_flag);\n    os_psh_flag = __FALSE;\n  } else {\n    OS_X_UNLOCK(os_tick_irqn);\n    os_lock = __FALSE;\n    OS_X_PEND(pend_flags, os_psh_flag);\n    os_psh_flag = __FALSE;\n  }\n}\n\n/*--------------------------- rt_psh_req ------------------------------------*/\n\nvoid rt_psh_req(void) {\n  /* Initiate a post service handling request if required. */\n  if (os_lock == __FALSE) {\n    OS_PEND_IRQ();\n  } else {\n    os_psh_flag = __TRUE;\n  }\n}\n\n/*--------------------------- rt_pop_req ------------------------------------*/\n\nvoid rt_pop_req(void) {\n  /* Process an ISR post service requests. */\n  struct OS_XCB *p_CB;\n  P_TCB next;\n  U32 idx;\n\n  os_tsk.run->state = READY;\n  rt_put_rdy_first(os_tsk.run);\n\n  idx = os_psq->last;\n  while (os_psq->count) {\n    p_CB = os_psq->q[idx].id;\n    if (p_CB->cb_type == TCB) {\n      /* Is of TCB type */\n      rt_evt_psh((P_TCB)p_CB, (U16)os_psq->q[idx].arg);\n    } else if (p_CB->cb_type == MCB) {\n      /* Is of MCB type */\n      rt_mbx_psh((P_MCB)p_CB, (void *)os_psq->q[idx].arg);\n    } else {\n      /* Must be of SCB type */\n      rt_sem_psh((P_SCB)p_CB);\n    }\n    if (++idx == os_psq->size)\n      idx = 0;\n    rt_dec(&os_psq->count);\n  }\n  os_psq->last = idx;\n\n  next = rt_get_first(&os_rdy);\n  rt_switch_req(next);\n}\n\n/*--------------------------- os_tick_init ----------------------------------*/\n\n__weak int os_tick_init(void) {\n  /* Initialize SysTick timer as system tick timer. */\n  rt_systick_init();\n  return (-1); /* Return IRQ number of SysTick timer */\n}\n\n/*--------------------------- os_tick_irqack --------------------------------*/\n\n__weak void os_tick_irqack(void) { /* Acknowledge timer interrupt. */\n}\n\n/*--------------------------- rt_systick ------------------------------------*/\n\nextern void sysTimerTick(void);\n\nvoid rt_systick(void) {\n  /* Check for system clock update, suspend running task. */\n  P_TCB next;\n\n  os_tsk.run->state = READY;\n  rt_put_rdy_first(os_tsk.run);\n\n  /* Check Round Robin timeout. */\n  rt_chk_robin();\n\n  /* Update delays. */\n  os_time++;\n  rt_dec_dly();\n\n  /* Check the user timers. */\n#ifdef __CMSIS_RTOS\n  sysTimerTick();\n#else\n  rt_tmr_tick();\n#endif\n\n  /* Switch back to highest ready task */\n  next = rt_get_first(&os_rdy);\n  rt_switch_req(next);\n}\n\n/*--------------------------- rt_stk_check ----------------------------------*/\n\n__weak void rt_stk_check(void) {\n  /* Check for stack overflow. */\n  if ((os_tsk.run->tsk_stack < (U32)os_tsk.run->stack) ||\n      (os_tsk.run->stack[0] != MAGIC_WORD)) {\n    os_error(OS_ERR_STK_OVF);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_System.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SYSTEM.H\n *      Purpose: System Task Manager definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Variables */\n#define os_psq  ((P_PSQ)&os_fifo)\nextern int os_tick_irqn;\n\n/* Functions */\nextern U32  rt_suspend    (void);\nextern void rt_resume     (U32 sleep_time);\nextern void rt_tsk_lock   (void);\nextern void rt_tsk_unlock (void);\nextern void rt_psh_req    (void);\nextern void rt_pop_req    (void);\nextern void rt_systick    (void);\nextern void rt_stk_check  (void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Task.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TASK.C\n *      Purpose: Task functions and system start up.\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Task.h\"\n#include \"RTX_Config.h\"\n#include \"rt_List.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_Robin.h\"\n#include \"rt_System.h\"\n#include \"rt_TypeDef.h\"\n#ifdef __CORTEX_A9\n#include \"rt_HAL_CA.h\"\n#else\n#include \"rt_HAL_CM.h\"\n#endif\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* Running and next task info. */\nstruct OS_TSK os_tsk;\n\n/* Task Control Blocks of idle demon */\nstruct OS_TCB os_idle_TCB;\n\n/*----------------------------------------------------------------------------\n *      Local Functions\n *---------------------------------------------------------------------------*/\n\nstatic OS_TID rt_get_TID(void) {\n  U32 tid;\n\n  for (tid = 1; tid <= os_maxtaskrun; tid++) {\n    if (os_active_TCB[tid - 1] == NULL) {\n      return ((OS_TID)tid);\n    }\n  }\n  return (0);\n}\n\n/*--------------------------- rt_init_context -------------------------------*/\n\nstatic void rt_init_context(P_TCB p_TCB, U8 priority, FUNCP task_body) {\n  /* Initialize general part of the Task Control Block. */\n  p_TCB->cb_type = TCB;\n  p_TCB->state = READY;\n  p_TCB->prio = priority;\n  p_TCB->p_lnk = NULL;\n  p_TCB->p_rlnk = NULL;\n  p_TCB->p_dlnk = NULL;\n  p_TCB->p_blnk = NULL;\n  p_TCB->delta_time = 0;\n  p_TCB->interval_time = 0;\n  p_TCB->events = 0;\n  p_TCB->waits = 0;\n  p_TCB->stack_frame = 0;\n\n  if (p_TCB->priv_stack == 0) {\n    /* Allocate the memory space for the stack. */\n    p_TCB->stack = rt_alloc_box(mp_stk);\n  }\n  rt_init_stack(p_TCB, task_body);\n}\n\n/*--------------------------- rt_switch_req ---------------------------------*/\n\nvoid rt_switch_req(P_TCB p_new) {\n  /* Switch to next task (identified by \"p_new\"). */\n  os_tsk.new = p_new;\n  p_new->state = RUNNING;\n  DBG_TASK_SWITCH(p_new->task_id);\n}\n\n/*--------------------------- rt_dispatch -----------------------------------*/\n\nvoid rt_dispatch(P_TCB next_TCB) {\n  /* Dispatch next task if any identified or dispatch highest ready task    */\n  /* \"next_TCB\" identifies a task to run or has value NULL (=no next task)  */\n  if (next_TCB == NULL) {\n    /* Running task was blocked: continue with highest ready task */\n    next_TCB = rt_get_first(&os_rdy);\n    rt_switch_req(next_TCB);\n  } else {\n    /* Check which task continues */\n    if (next_TCB->prio > os_tsk.run->prio) {\n      /* preempt running task */\n      rt_put_rdy_first(os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_switch_req(next_TCB);\n    } else {\n      /* put next task into ready list, no task switch takes place */\n      next_TCB->state = READY;\n      rt_put_prio(&os_rdy, next_TCB);\n    }\n  }\n}\n\n/*--------------------------- rt_block --------------------------------------*/\n\nvoid rt_block(U16 timeout, U8 block_state) {\n  /* Block running task and choose next ready task.                         */\n  /* \"timeout\" sets a time-out value or is 0xffff (=no time-out).           */\n  /* \"block_state\" defines the appropriate task state */\n  P_TCB next_TCB;\n\n  if (timeout) {\n    if (timeout < 0xffff) {\n      rt_put_dly(os_tsk.run, timeout);\n    }\n    os_tsk.run->state = block_state;\n    next_TCB = rt_get_first(&os_rdy);\n    rt_switch_req(next_TCB);\n  }\n}\n\n/*--------------------------- rt_tsk_pass -----------------------------------*/\n\nvoid rt_tsk_pass(void) {\n  /* Allow tasks of same priority level to run cooperatively.*/\n  P_TCB p_new;\n\n  p_new = rt_get_same_rdy_prio();\n  if (p_new != NULL) {\n    rt_put_prio((P_XCB)&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_switch_req(p_new);\n  }\n}\n\n/*--------------------------- rt_tsk_self -----------------------------------*/\n\nOS_TID rt_tsk_self(void) {\n  /* Return own task identifier value. */\n  if (os_tsk.run == NULL) {\n    return (0);\n  }\n  return (os_tsk.run->task_id);\n}\n\n/*--------------------------- rt_tsk_prio -----------------------------------*/\n\nOS_RESULT rt_tsk_prio(OS_TID task_id, U8 new_prio) {\n  /* Change execution priority of a task to \"new_prio\". */\n  P_TCB p_task;\n\n  if (task_id == 0) {\n    /* Change execution priority of calling task. */\n    os_tsk.run->prio = new_prio;\n  run:\n    if (rt_rdy_prio() > new_prio) {\n      rt_put_prio(&os_rdy, os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_dispatch(NULL);\n    }\n    return (OS_R_OK);\n  }\n\n  /* Find the task in the \"os_active_TCB\" array. */\n  if (task_id > os_maxtaskrun || os_active_TCB[task_id - 1] == NULL) {\n    /* Task with \"task_id\" not found or not started. */\n    return (OS_R_NOK);\n  }\n  p_task = os_active_TCB[task_id - 1];\n  p_task->prio = new_prio;\n  if (p_task == os_tsk.run) {\n    goto run;\n  }\n  rt_resort_prio(p_task);\n  if (p_task->state == READY) {\n    /* Task enqueued in a ready list. */\n    p_task = rt_get_first(&os_rdy);\n    rt_dispatch(p_task);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_tsk_create ---------------------------------*/\n\nOS_TID rt_tsk_create(FUNCP task, U32 prio_stksz, void *stk, void *argv) {\n  /* Start a new task declared with \"task\". */\n  P_TCB task_context;\n  U32 i;\n\n  /* Priority 0 is reserved for idle task! */\n  if ((prio_stksz & 0xFF) == 0) {\n    prio_stksz += 1;\n  }\n  task_context = rt_alloc_box(mp_tcb);\n  if (task_context == NULL) {\n    return (0);\n  }\n  /* If \"size != 0\" use a private user provided stack. */\n  task_context->stack = stk;\n  task_context->priv_stack = prio_stksz >> 8;\n  /* Pass parameter 'argv' to 'rt_init_context' */\n  task_context->msg = argv;\n  /* For 'size == 0' system allocates the user stack from the memory pool. */\n  rt_init_context(task_context, prio_stksz & 0xFF, task);\n\n  /* Find a free entry in 'os_active_TCB' table. */\n  i = rt_get_TID();\n  os_active_TCB[i - 1] = task_context;\n  task_context->task_id = i;\n  DBG_TASK_NOTIFY(task_context, __TRUE);\n  rt_dispatch(task_context);\n  return ((OS_TID)i);\n}\n\n/*--------------------------- rt_tsk_delete ---------------------------------*/\n\nOS_RESULT rt_tsk_delete(OS_TID task_id) {\n  /* Terminate the task identified with \"task_id\". */\n  P_TCB task_context;\n\n  if (task_id == 0 || task_id == os_tsk.run->task_id) {\n    /* Terminate itself. */\n    os_tsk.run->state = INACTIVE;\n    os_tsk.run->tsk_stack = rt_get_PSP();\n    rt_stk_check();\n    os_active_TCB[os_tsk.run->task_id - 1] = NULL;\n    rt_free_box(mp_stk, os_tsk.run->stack);\n    os_tsk.run->stack = NULL;\n    DBG_TASK_NOTIFY(os_tsk.run, __FALSE);\n    rt_free_box(mp_tcb, os_tsk.run);\n    os_tsk.run = NULL;\n    rt_dispatch(NULL);\n    /* The program should never come to this point. */\n  } else {\n    /* Find the task in the \"os_active_TCB\" array. */\n    if (task_id > os_maxtaskrun || os_active_TCB[task_id - 1] == NULL) {\n      /* Task with \"task_id\" not found or not started. */\n      return (OS_R_NOK);\n    }\n    task_context = os_active_TCB[task_id - 1];\n    rt_rmv_list(task_context);\n    rt_rmv_dly(task_context);\n    os_active_TCB[task_id - 1] = NULL;\n    rt_free_box(mp_stk, task_context->stack);\n    task_context->stack = NULL;\n    DBG_TASK_NOTIFY(task_context, __FALSE);\n    rt_free_box(mp_tcb, task_context);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_sys_init -----------------------------------*/\n\n#ifdef __CMSIS_RTOS\nvoid rt_sys_init(void) {\n#else\nvoid rt_sys_init(FUNCP first_task, U32 prio_stksz, void *stk) {\n#endif\n  /* Initialize system and start up task declared with \"first_task\". */\n  U32 i;\n\n  DBG_INIT();\n\n  /* Initialize dynamic memory and task TCB pointers to NULL. */\n  for (i = 0; i < os_maxtaskrun; i++) {\n    os_active_TCB[i] = NULL;\n  }\n  rt_init_box(&mp_tcb, mp_tcb_size, sizeof(struct OS_TCB));\n  rt_init_box(&mp_stk, mp_stk_size, BOX_ALIGN_8 | (U16)(os_stackinfo));\n  rt_init_box((U32 *)m_tmr, mp_tmr_size, sizeof(struct OS_TMR));\n\n  /* Set up TCB of idle demon */\n  os_idle_TCB.task_id = 255;\n  os_idle_TCB.priv_stack = 0;\n  rt_init_context(&os_idle_TCB, 0, os_idle_demon);\n\n  /* Set up ready list: initially empty */\n  os_rdy.cb_type = HCB;\n  os_rdy.p_lnk = NULL;\n  /* Set up delay list: initially empty */\n  os_dly.cb_type = HCB;\n  os_dly.p_dlnk = NULL;\n  os_dly.p_blnk = NULL;\n  os_dly.delta_time = 0;\n\n  /* Fix SP and system variables to assume idle task is running  */\n  /* Transform main program into idle task by assuming idle TCB */\n#ifndef __CMSIS_RTOS\n  rt_set_PSP(os_idle_TCB.tsk_stack + 32);\n#endif\n  os_tsk.run = &os_idle_TCB;\n  os_tsk.run->state = RUNNING;\n\n  /* Initialize ps queue */\n  os_psq->first = 0;\n  os_psq->last = 0;\n  os_psq->size = os_fifo_size;\n\n  rt_init_robin();\n\n  /* Initialize SVC and PendSV */\n  rt_svc_init();\n\n#ifndef __CMSIS_RTOS\n  /* Initialize and start system clock timer */\n  os_tick_irqn = os_tick_init();\n  if (os_tick_irqn >= 0) {\n    OS_X_INIT(os_tick_irqn);\n  }\n\n  /* Start up first user task before entering the endless loop */\n  rt_tsk_create(first_task, prio_stksz, stk, NULL);\n#endif\n}\n\n/*--------------------------- rt_sys_start ----------------------------------*/\n\n#ifdef __CMSIS_RTOS\nvoid rt_sys_start(void) {\n  /* Start system */\n\n  /* Initialize and start system clock timer */\n  os_tick_irqn = os_tick_init();\n  if (os_tick_irqn >= 0) {\n    OS_X_INIT(os_tick_irqn);\n  }\n}\n#endif\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Task.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TASK.H\n *      Purpose: Task functions and system start up.\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Definitions */\n\n/* Values for 'state'   */\n#define INACTIVE        0\n#define READY           1\n#define RUNNING         2\n#define WAIT_DLY        3\n#define WAIT_ITV        4\n#define WAIT_OR         5\n#define WAIT_AND        6\n#define WAIT_SEM        7\n#define WAIT_MBX        8\n#define WAIT_MUT        9\n\n/* Return codes */\n#define OS_R_TMO        0x01\n#define OS_R_EVT        0x02\n#define OS_R_SEM        0x03\n#define OS_R_MBX        0x04\n#define OS_R_MUT        0x05\n\n#define OS_R_OK         0x00\n#define OS_R_NOK        0xff\n\n/* Variables */\nextern struct OS_TSK os_tsk;\nextern struct OS_TCB os_idle_TCB;\n\n/* Functions */\nextern void      rt_switch_req (P_TCB p_new);\nextern void      rt_dispatch   (P_TCB next_TCB);\nextern void      rt_block      (U16 timeout, U8 block_state);\nextern void      rt_tsk_pass   (void);\nextern OS_TID    rt_tsk_self   (void);\nextern OS_RESULT rt_tsk_prio   (OS_TID task_id, U8 new_prio);\nextern OS_TID    rt_tsk_create (FUNCP task, U32 prio_stksz, void *stk, void *argv);\nextern OS_RESULT rt_tsk_delete (OS_TID task_id);\n#ifdef __CMSIS_RTOS\nextern void      rt_sys_init   (void);\nextern void      rt_sys_start  (void);\n#else\nextern void      rt_sys_init   (FUNCP first_task, U32 prio_stksz, void *stk);\n#endif\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n\n\n\n\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Time.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TIME.C\n *      Purpose: Delay and interval wait functions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Time.h\"\n#include \"RTX_Config.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* Free running system tick counter */\nU32 os_time;\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_time_get -----------------------------------*/\n\nU32 rt_time_get(void) {\n  /* Get system time tick */\n  return (os_time);\n}\n\n/*--------------------------- rt_dly_wait -----------------------------------*/\n\nvoid rt_dly_wait(U16 delay_time) {\n  /* Delay task by \"delay_time\" */\n  rt_block(delay_time, WAIT_DLY);\n}\n\n/*--------------------------- rt_itv_set ------------------------------------*/\n\nvoid rt_itv_set(U16 interval_time) {\n  /* Set interval length and define start of first interval */\n  os_tsk.run->interval_time = interval_time;\n  os_tsk.run->delta_time = interval_time + (U16)os_time;\n}\n\n/*--------------------------- rt_itv_wait -----------------------------------*/\n\nvoid rt_itv_wait(void) {\n  /* Wait for interval end and define start of next one */\n  U16 delta;\n\n  delta = os_tsk.run->delta_time - (U16)os_time;\n  os_tsk.run->delta_time += os_tsk.run->interval_time;\n  if ((delta & 0x8000) == 0) {\n    rt_block(delta, WAIT_ITV);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Time.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TIME.H\n *      Purpose: Delay and interval wait functions definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Variables */\nextern U32 os_time;\n\n/* Functions */\nextern U32  rt_time_get (void);\nextern void rt_dly_wait (U16 delay_time);\nextern void rt_itv_set  (U16 interval_time);\nextern void rt_itv_wait (void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_Timer.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TIMER.H\n *      Purpose: User timer functions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Variables */\nextern struct OS_XTMR os_tmr;\n\n/* Functions */\nextern void  rt_tmr_tick   (void);\nextern OS_ID rt_tmr_create (U16 tcnt, U16 info);\nextern OS_ID rt_tmr_kill   (OS_ID timer);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_A/rt_TypeDef.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TYPEDEF.H\n *      Purpose: Type Definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Types */\ntypedef char               S8;\ntypedef unsigned char      U8;\ntypedef short              S16;\ntypedef unsigned short     U16;\ntypedef int                S32;\ntypedef unsigned int       U32;\ntypedef long long          S64;\ntypedef unsigned long long U64;\ntypedef unsigned char      BIT;\ntypedef unsigned int       BOOL;\ntypedef void               (*FUNCP)(void);\n\ntypedef U32     OS_TID;\ntypedef void    *OS_ID;\ntypedef U32     OS_RESULT;\n\ntypedef struct OS_TCB {\n  /* General part: identical for all implementations.                        */\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     state;                   /* Task state                              */\n  U8     prio;                    /* Execution priority                      */\n  U8     task_id;                 /* Task ID value for optimized TCB access  */\n  struct OS_TCB *p_lnk;           /* Link pointer for ready/sem. wait list   */\n  struct OS_TCB *p_rlnk;          /* Link pointer for sem./mbx lst backwards */\n  struct OS_TCB *p_dlnk;          /* Link pointer for delay list             */\n  struct OS_TCB *p_blnk;          /* Link pointer for delay list backwards   */\n  U16    delta_time;              /* Time until time out                     */\n  U16    interval_time;           /* Time interval for periodic waits        */\n  U16    events;                  /* Event flags                             */\n  U16    waits;                   /* Wait flags                              */\n  void   **msg;                   /* Direct message passing when task waits  */\n\n  /* Hardware dependant part: specific for Cortex processor                  */\n  U8     stack_frame;             /* Stack frame: 0x1 Basic/Extended, 0x2 FP stacked/not stacked */\n  U8     reserved;\n  U16    priv_stack;              /* Private stack size, 0= system assigned  */\n  U32    tsk_stack;               /* Current task Stack pointer (R13)        */\n  U32    *stack;                  /* Pointer to Task Stack memory block      */\n\n  /* Task entry point used for uVision debugger                              */\n  FUNCP  ptask;                   /* Task entry address                      */\n} *P_TCB;\n#define TCB_TID          3        /* 'task id' offset                        */\n#define TCB_STACKF      32        /* 'stack_frame' offset                    */\n#define TCB_TSTACK      36        /* 'tsk_stack' offset                      */\n\ntypedef struct OS_PSFE {          /* Post Service Fifo Entry                 */\n  void  *id;                      /* Object Identification                   */\n  U32    arg;                     /* Object Argument                         */\n} *P_PSFE;\n\ntypedef struct OS_PSQ {           /* Post Service Queue                      */\n  U8     first;                   /* FIFO Head Index                         */\n  U8     last;                    /* FIFO Tail Index                         */\n  U8     count;                   /* Number of stored items in FIFO          */\n  U8     size;                    /* FIFO Size                               */\n  struct OS_PSFE q[1];            /* FIFO Content                            */\n} *P_PSQ;\n\ntypedef struct OS_TSK {\n  P_TCB  run;                     /* Current running task                    */\n  P_TCB  new;                     /* Scheduled task to run                   */\n} *P_TSK;\n\ntypedef struct OS_ROBIN {         /* Round Robin Control                     */\n  P_TCB  task;                    /* Round Robin task                        */\n  U16    time;                    /* Round Robin switch time                 */\n  U16    tout;                    /* Round Robin timeout                     */\n} *P_ROBIN;\n\ntypedef struct OS_XCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  struct OS_TCB *p_lnk;           /* Link pointer for ready/sem. wait list   */\n  struct OS_TCB *p_rlnk;          /* Link pointer for sem./mbx lst backwards */\n  struct OS_TCB *p_dlnk;          /* Link pointer for delay list             */\n  struct OS_TCB *p_blnk;          /* Link pointer for delay list backwards   */\n  U16    delta_time;              /* Time until time out                     */\n} *P_XCB;\n\ntypedef struct OS_MCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     state;                   /* State flag variable                     */\n  U8     isr_st;                  /* State flag variable for isr functions   */\n  struct OS_TCB *p_lnk;           /* Chain of tasks waiting for message      */\n  U16    first;                   /* Index of the message list begin         */\n  U16    last;                    /* Index of the message list end           */\n  U16    count;                   /* Actual number of stored messages        */\n  U16    size;                    /* Maximum number of stored messages       */\n  void   *msg[1];                 /* FIFO for Message pointers 1st element   */\n} *P_MCB;\n\ntypedef struct OS_SCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     mask;                    /* Semaphore token mask                    */\n  U16    tokens;                  /* Semaphore tokens                        */\n  struct OS_TCB *p_lnk;           /* Chain of tasks waiting for tokens       */\n} *P_SCB;\n\ntypedef struct OS_MUCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     prio;                    /* Owner task default priority             */\n  U16    level;                   /* Call nesting level                      */\n  struct OS_TCB *p_lnk;           /* Chain of tasks waiting for mutex        */\n  struct OS_TCB *owner;           /* Mutex owner task                        */\n} *P_MUCB;\n\ntypedef struct OS_XTMR {\n  struct OS_TMR  *next;\n  U16    tcnt;\n} *P_XTMR;\n\ntypedef struct OS_TMR {\n  struct OS_TMR  *next;           /* Link pointer to Next timer              */\n  U16    tcnt;                    /* Timer delay count                       */\n  U16    info;                    /* User defined call info                  */\n} *P_TMR;\n\ntypedef struct OS_BM {\n  void *free;                     /* Pointer to first free memory block      */\n  void *end;                      /* Pointer to memory block end             */\n  U32  blk_size;                  /* Memory block size                       */\n} *P_BM;\n\n/* Definitions */\n#define __TRUE          1\n#define __FALSE         0\n#define NULL            ((void *) 0)\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/HAL_CM.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM.C\n *      Purpose: Hardware Abstraction Layer for Cortex-M\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n#ifdef DBG_MSG\nBIT dbg_msg;\n#endif\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_init_stack ---------------------------------*/\n\nvoid rt_init_stack(P_TCB p_TCB, FUNCP task_body) {\n  /* Prepare TCB and saved context for a first time start of a task. */\n  U32 *stk, i, size;\n\n  /* Prepare a complete interrupt frame for first task start */\n  size = p_TCB->priv_stack >> 2;\n\n  /* Write to the top of stack. */\n  stk = &p_TCB->stack[size];\n\n  /* Auto correct to 8-byte ARM stack alignment. */\n  if ((U32)stk & 0x04) {\n    stk--;\n  }\n\n  stk -= 16;\n\n  /* Default xPSR and initial PC */\n  stk[15] = INITIAL_xPSR;\n  stk[14] = (U32)task_body;\n\n  /* Clear R4-R11,R0-R3,R12,LR registers. */\n  for (i = 0; i < 14; i++) {\n    stk[i] = 0;\n  }\n\n  /* Assign a void pointer to R0. */\n  stk[8] = (U32)p_TCB->msg;\n\n  /* Initial Task stack pointer. */\n  p_TCB->tsk_stack = (U32)stk;\n\n  /* Task entry point. */\n  p_TCB->ptask = task_body;\n\n  /* Set a magic word for checking of stack overflow.\n   For the main thread (ID: 0x01) the stack is in a memory area shared with the\n   heap, therefore the last word of the stack is a moving target.\n   We want to do stack/heap collision detection instead.\n  */\n  if (p_TCB->task_id != 0x01) {\n    p_TCB->stack[0] = MAGIC_WORD;\n#ifdef DEBUG\n    for (i = 1; i < (stk - p_TCB->stack); i++) {\n      p_TCB->stack[i] = 0xCCCCCCCC;\n    }\n#endif\n  }\n}\n\n/*--------------------------- rt_ret_val ----------------------------------*/\n\nstatic __inline U32 *rt_ret_regs(P_TCB p_TCB) {\n  /* Get pointer to task return value registers (R0..R3) in Stack */\n#if (__TARGET_FPU_VFP)\n  if (p_TCB->stack_frame) {\n    /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */\n    return (U32 *)(p_TCB->tsk_stack + 8 * 4 + 16 * 4);\n  } else {\n    /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */\n    return (U32 *)(p_TCB->tsk_stack + 8 * 4);\n  }\n#else\n  /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */\n  return (U32 *)(p_TCB->tsk_stack + 8 * 4);\n#endif\n}\n\nvoid rt_ret_val(P_TCB p_TCB, U32 v0) {\n  U32 *ret;\n\n  ret = rt_ret_regs(p_TCB);\n  ret[0] = v0;\n}\n\nvoid rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {\n  U32 *ret;\n\n  ret = rt_ret_regs(p_TCB);\n  ret[0] = v0;\n  ret[1] = v1;\n}\n\n/*--------------------------- dbg_init --------------------------------------*/\n\n#ifdef DBG_MSG\nvoid dbg_init(void) {\n  if ((DEMCR & DEMCR_TRCENA) && (ITM_CONTROL & ITM_ITMENA) &&\n      (ITM_ENABLE & (1UL << 31))) {\n    dbg_msg = __TRUE;\n  }\n}\n#endif\n\n/*--------------------------- dbg_task_notify -------------------------------*/\n\n#ifdef DBG_MSG\nvoid dbg_task_notify(P_TCB p_tcb, BOOL create) {\n  while (ITM_PORT31_U32 == 0)\n    ;\n  ITM_PORT31_U32 = (U32)p_tcb->ptask;\n  while (ITM_PORT31_U32 == 0)\n    ;\n  ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;\n}\n#endif\n\n/*--------------------------- dbg_task_switch -------------------------------*/\n\n#ifdef DBG_MSG\nvoid dbg_task_switch(U32 task_id) {\n  while (ITM_PORT31_U32 == 0)\n    ;\n  ITM_PORT31_U8 = task_id;\n}\n#endif\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)TARGET_M4/TOOLCHAIN_GCC/*.S))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y += -DOS_CLOCK_NOMINAL=$(OS_CLOCK_NOMINAL)\n\nifneq ($(OS_TASKCNT),)\nCFLAGS_RTX_Conf_CM.o += -DOS_TASKCNT=$(OS_TASKCNT)\nendif\n\nifneq ($(OS_SCHEDULERSTKSIZE),)\nCFLAGS_RTX_Conf_CM.o += -DOS_SCHEDULERSTKSIZE=$(OS_SCHEDULERSTKSIZE)\nendif\n\nifneq ($(OS_IDLESTKSIZE),)\nCFLAGS_RTX_Conf_CM.o += -DOS_IDLESTKSIZE=$(OS_IDLESTKSIZE)\nendif\n\nifneq ($(OS_FIFOSZ),)\nCFLAGS_RTX_Conf_CM.o += -DOS_FIFOSZ=$(OS_FIFOSZ)\nendif\n\nifneq ($(DEBUG_SLEEP),)\nCFLAGS_RTX_Conf_CM.o += -DDEBUG_SLEEP=$(DEBUG_SLEEP)\nCFLAGS_rt_System.o += -DDEBUG_SLEEP=$(DEBUG_SLEEP)\nendif\n\nifeq ($(OS_API_IN_INTLOCK),1)\nCFLAGS_rt_CMSIS.o += -DOS_API_IN_INTLOCK\nendif\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_CM_LIB.H\n *      Purpose: RTX Kernel System Configuration\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"cmsis_os.h\"\n\n#if   defined (__CC_ARM)\n#pragma O3\n#define __USED __attribute__((used))\n#elif defined (__GNUC__)\n#pragma GCC optimize (\"O3\")\n#define __USED __attribute__((used))\n#elif defined (__ICCARM__)\n#define __USED __root\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Definitions\n *---------------------------------------------------------------------------*/\n\n#define _declare_box(pool,size,cnt)  uint32_t pool[(((size)+3)/4)*(cnt) + 3]\n#define _declare_box8(pool,size,cnt) uint64_t pool[(((size)+7)/8)*(cnt) + 2]\n#if __RTX_CPU_STATISTICS__\n#define OS_TCB_SIZE     64\n#else\n#define OS_TCB_SIZE     48\n#endif\n#define OS_TMR_SIZE     8\n\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n\ntypedef void    *OS_ID;\ntypedef uint32_t OS_TID;\ntypedef uint32_t OS_MUT[3];\ntypedef uint32_t OS_RESULT;\n\n#define runtask_id()    rt_tsk_self()\n#define mutex_init(m)   rt_mut_init(m)\n#define mutex_wait(m)   os_mut_wait(m,0xFFFF)\n#define mutex_rel(m)    os_mut_release(m)\n\nextern OS_TID    rt_tsk_self    (void);\nextern void      rt_mut_init    (OS_ID mutex);\nextern OS_RESULT rt_mut_release (OS_ID mutex);\nextern OS_RESULT rt_mut_wait    (OS_ID mutex, uint16_t timeout);\n\n#define os_mut_wait(mutex,timeout) _os_mut_wait((uint32_t)rt_mut_wait,mutex,timeout)\n#define os_mut_release(mutex)      _os_mut_release((uint32_t)rt_mut_release,mutex)\n\nOS_RESULT _os_mut_release (uint32_t p, OS_ID mutex)                   __svc_indirect(0);\nOS_RESULT _os_mut_wait    (uint32_t p, OS_ID mutex, uint16_t timeout) __svc_indirect(0);\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n#if (OS_TIMERS != 0)\n#define OS_TASK_CNT (OS_TASKCNT + 1)\n#else\n#define OS_TASK_CNT  OS_TASKCNT\n#endif\n\nuint16_t const os_maxtaskrun = OS_TASK_CNT;\nuint32_t const os_rrobin     = (OS_ROBIN << 16) | OS_ROBINTOUT;\nuint8_t  const os_flags      = OS_RUNPRIV;\n\n/* Export following defines to uVision debugger. */\n__USED uint32_t const os_clockrate = OS_TICK;\n__USED uint32_t const os_timernum  = 0;\n\n/* Stack for the os_idle_demon */\nunsigned int idle_task_stack[OS_IDLESTKSIZE];\nunsigned short const idle_task_stack_size = sizeof(idle_task_stack); //OS_IDLESTKSIZE;\n\n#ifndef OS_FIFOSZ\n #define OS_FIFOSZ      16\n#endif\n\n/* Fifo Queue buffer for ISR requests.*/\nuint32_t       os_fifo[OS_FIFOSZ*2+1];\nuint8_t  const os_fifo_size = OS_FIFOSZ;\n\n/* An array of Active task pointers. */\nvoid *os_active_TCB[OS_TASK_CNT];\n\nuint32_t task_rtime[OS_TASK_CNT];\n\n/* User Timers Resources */\n#if (OS_TIMERS != 0)\nextern void osTimerThread (void const *argument);\nosThreadDef(osTimerThread, (osPriority)(OS_TIMERPRIO-3), 1, 4*OS_TIMERSTKSZ, \"os_timer\");\nosThreadId osThreadId_osTimerThread;\nosMessageQDef(osTimerMessageQ, OS_TIMERCBQS, void *);\nosMessageQId osMessageQId_osTimerMessageQ;\n#else\nosThreadDef_t os_thread_def_osTimerThread = { NULL };\nosThreadId osThreadId_osTimerThread;\nosMessageQDef(osTimerMessageQ, 0, void *);\nosMessageQId osMessageQId_osTimerMessageQ;\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      RTX Optimizations (empty functions)\n *---------------------------------------------------------------------------*/\n\n#if OS_ROBIN == 0\n void rt_init_robin (void) {;}\n void rt_chk_robin  (void) {;}\n#endif\n\n#if OS_STKCHECK == 0\n void rt_stk_check  (void) {;}\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      Standard Library multithreading interface\n *---------------------------------------------------------------------------*/\n\n#if defined (__CC_ARM) && !defined (__MICROLIB)\n static OS_MUT   std_libmutex[OS_MUTEXCNT];\n static uint32_t nr_mutex;\n\n /*--------------------------- _mutex_initialize -----------------------------*/\n\nint _mutex_initialize (OS_ID *mutex) {\n  /* Allocate and initialize a system mutex. */\n\n  if (nr_mutex >= OS_MUTEXCNT) {\n    /* If you are here, you need to increase the number OS_MUTEXCNT. */\n    os_error_str(\"Not enough stdlib mutexes\\n\");\n  }\n  *mutex = &std_libmutex[nr_mutex++];\n  mutex_init (*mutex);\n  return (1);\n}\n\n\n/*--------------------------- _mutex_acquire --------------------------------*/\n\n__attribute__((used)) void _mutex_acquire (OS_ID *mutex) {\n  /* Acquire a system mutex, lock stdlib resources. */\n  if (runtask_id ()) {\n    /* RTX running, acquire a mutex. */\n    mutex_wait (*mutex);\n  }\n}\n\n\n/*--------------------------- _mutex_release --------------------------------*/\n\n__attribute__((used)) void _mutex_release (OS_ID *mutex) {\n  /* Release a system mutex, unlock stdlib resources. */\n  if (runtask_id ()) {\n    /* RTX running, release a mutex. */\n    mutex_rel (*mutex);\n  }\n}\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n *      RTX Startup\n *---------------------------------------------------------------------------*/\n\n/* Main Thread definition */\nextern int main (void);\nosThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL};\n\n// This define should be probably moved to the CMSIS layer\nextern                        uint32_t __StackTop[];\n#define INITIAL_SP            ((unsigned int)__StackTop)\n\n#ifdef __CC_ARM\nextern uint32_t               Image$$RW_IRAM1$$ZI$$Limit[];\n#define MAIN_STACK_BUF        (Image$$RW_IRAM1$$ZI$$Limit)\n#elif defined(__GNUC__)\nextern uint32_t               __StackLimit[];\n#define MAIN_STACK_BUF        (__StackLimit)\n#elif defined(__ICCARM__)\n#pragma section=\"HEAP\"\n#define MAIN_STACK_BUF        (void *)__section_begin(\"HEAP\")\n#endif\n\nvoid set_main_stack(void) {\n    // That is the bottom of the main stack block: no collision detection\n    os_thread_def_main.stack_pointer = MAIN_STACK_BUF;\n\n    // Leave OS_SCHEDULERSTKSIZE words for the scheduler and interrupts\n    os_thread_def_main.stacksize = (INITIAL_SP - (unsigned int)MAIN_STACK_BUF) - (OS_SCHEDULERSTKSIZE * 4);\n}\n\n#if defined (__CC_ARM)\n#ifdef __MICROLIB\nvoid _main_init (void) __attribute__((section(\".ARM.Collect$$$$000000FF\")));\nvoid _main_init (void) {\n  osKernelInitialize();\n  set_main_stack();\n  osThreadCreate(&os_thread_def_main, NULL);\n  osKernelStart();\n  for (;;);\n}\n#else\n\n/* The single memory model is checking for stack collision at run time, verifing\n   that the heap pointer is underneath the stack pointer.\n\n   With the RTOS there is not only one stack above the heap, there are multiple\n   stacks and some of them are underneath the heap pointer.\n*/\n#pragma import(__use_two_region_memory)\n\n__asm void __rt_entry (void) {\n\n  IMPORT  __user_setup_stackheap\n  IMPORT  __rt_lib_init\n  IMPORT  os_thread_def_main\n  IMPORT  osKernelInitialize\n  IMPORT  set_main_stack\n  IMPORT  osKernelStart\n  IMPORT  osThreadCreate\n  IMPORT  exit\n\n  BL      __user_setup_stackheap\n  MOV     R1,R2\n  BL      __rt_lib_init\n  BL      osKernelInitialize\n  BL      set_main_stack\n  LDR     R0,=os_thread_def_main\n  MOVS    R1,#0\n  BL      osThreadCreate\n  BL      osKernelStart\n  BL      exit\n\n  ALIGN\n}\n#endif\n\n#elif defined (__GNUC__)\n\n#ifdef __CS3__\n\n/* CS3 start_c routine.\n *\n * Copyright (c) 2006, 2007 CodeSourcery Inc\n *\n * The authors hereby grant permission to use, copy, modify, distribute,\n * and license this software and its documentation for any purpose, provided\n * that existing copyright notices are retained in all copies and that this\n * notice is included verbatim in any distributions. No written agreement,\n * license, or royalty fee is required for any of the authorized uses.\n * Modifications to this software may be copyrighted by their authors\n * and need not follow the licensing terms described here, provided that\n * the new terms are clearly indicated on the first page of each file where\n * they apply.\n */\n\n#include \"cs3.h\"\n\nextern void __libc_init_array (void);\n\n__attribute ((noreturn)) void __cs3_start_c (void){\n  unsigned regions = __cs3_region_num;\n  const struct __cs3_region *rptr = __cs3_regions;\n\n  /* Initialize memory */\n  for (regions = __cs3_region_num, rptr = __cs3_regions; regions--; rptr++) {\n    long long *src = (long long *)rptr->init;\n    long long *dst = (long long *)rptr->data;\n    unsigned limit = rptr->init_size;\n    unsigned count;\n\n    if (src != dst)\n      for (count = 0; count != limit; count += sizeof (long long))\n        *dst++ = *src++;\n    else\n      dst = (long long *)((char *)dst + limit);\n    limit = rptr->zero_size;\n    for (count = 0; count != limit; count += sizeof (long long))\n      *dst++ = 0;\n  }\n\n  /* Run initializers.  */\n  __libc_init_array ();\n\n  osKernelInitialize();\n  set_main_stack();\n  osThreadCreate(&os_thread_def_main, NULL);\n  osKernelStart();\n  for (;;);\n}\n\n#else\n\n__attribute__((naked)) void software_init_hook (void) {\n  __asm (\n    \".syntax unified\\n\"\n    \".thumb\\n\"\n    \"movs r0,#0\\n\"\n    \"movs r1,#0\\n\"\n    \"mov  r4,r0\\n\"\n    \"mov  r5,r1\\n\"\n    \"ldr  r0,= __libc_fini_array\\n\"\n    \"bl   atexit\\n\"\n    \"bl   __libc_init_array\\n\"\n    \"mov  r0,r4\\n\"\n    \"mov  r1,r5\\n\"\n    \"bl   osKernelInitialize\\n\"\n    \"bl   set_main_stack\\n\"\n    \"ldr  r0,=os_thread_def_main\\n\"\n    \"movs r1,#0\\n\"\n    \"bl   osThreadCreate\\n\"\n    \"bl   osKernelStart\\n\"\n    \"bl   exit\\n\"\n  );\n}\n\n#endif\n\n#elif defined (__ICCARM__)\n\nextern void* __vector_table;\nextern int  __low_level_init(void);\nextern void __iar_data_init3(void);\nextern __weak void __iar_init_core( void );\nextern __weak void __iar_init_vfp( void );\nextern void __iar_dynamic_initialization(void);\n//extern void mbed_sdk_init(void);\nextern void exit(int arg);\n\n#pragma required=__vector_table\nvoid __iar_program_start( void )\n{\n  __iar_init_core();\n  __iar_init_vfp();\n\n  int a;\n\n  if (__low_level_init() != 0) {\n    __iar_data_init3();\n    //mbed_sdk_init();\n    __iar_dynamic_initialization();\n  }\n  osKernelInitialize();\n  set_main_stack();\n  osThreadCreate(&os_thread_def_main, NULL);\n  a = osKernelStart();\n  exit(a);\n\n}\n\n#endif\n\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/RTX_Conf.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_CONFIG.H\n *      Purpose: Exported functions of RTX_Config.c\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n\n/* Error Codes */\n#define OS_ERR_STK_OVF 1U\n#define OS_ERR_FIFO_OVF 2U\n#define OS_ERR_MBX_OVF 3U\n#define OS_ERR_TIMER_OVF 4U\n\n/* Definitions */\n#define BOX_ALIGN_8 0x80000000\n#define _declare_box(pool, size, cnt) U32 pool[(((size) + 3) / 4) * (cnt) + 3]\n#define _declare_box8(pool, size, cnt) U64 pool[(((size) + 7) / 8) * (cnt) + 2]\n#define _init_box8(pool, size, bsize)                                          \\\n  _init_box(pool, size, (bsize) | BOX_ALIGN_8)\n\n/* Variables */\nextern U32 idle_task_stack[];\nextern U32 os_fifo[];\nextern void *os_active_TCB[];\nextern U32 task_rtime[];\n\n/* Constants */\nextern U16 const os_maxtaskrun;\nextern U8 const os_flags;\nextern U32 const os_rrobin;\nextern U32 const os_clockrate;\nextern U32 const os_timernum;\nextern U16 const idle_task_stack_size;\n\nextern U8 const os_fifo_size;\n\n/* Functions */\nextern U32 os_get_trv(void);\nextern void os_idle_demon(void);\nextern int os_tick_init(void);\nextern void os_tick_irqack(void);\nextern void os_tmr_call(U16 info);\nextern void os_error(U32 err_code);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/RTX_Conf_CM.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RTX_Conf_CM.C\n *      Purpose: Configuration of CMSIS RTX Kernel for Cortex-M\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hwtimer_list.h\"\n#include \"rt_System.h\"\n#include \"rt_Time.h\"\n#include \"stdarg.h\"\n#include \"stdio.h\"\n\n#define WEAK __attribute__((weak))\n\nvoid WEAK sleep(void) { hal_sleep_enter_sleep(); }\n\n/*----------------------------------------------------------------------------\n *      RTX User configuration part BEGIN\n *---------------------------------------------------------------------------*/\n\n//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------\n//\n// Thread Configuration\n// =======================\n//\n//   Number of concurrent running threads <0-250>\n//    Defines max. number of threads that will run at the same time.\n//       counting \"main\", but not counting \"osTimerThread\"\n//    Default: 6\n#ifndef OS_TASKCNT\n#define OS_TASKCNT __BEST_D_OS_TASKCNT\n#endif\n\n//   Scheduler (+ interrupts) stack size [bytes] <64-4096:8><#/4>\n#ifndef OS_SCHEDULERSTKSIZE\n#define OS_SCHEDULERSTKSIZE __BEST_D_OS_SCHEDULERSTKSIZE\n#endif\n\n//   Idle stack size [bytes] <64-4096:8><#/4>\n//    Defines default stack size for the Idle thread.\n#ifndef OS_IDLESTKSIZE\n#define OS_IDLESTKSIZE 256\n#endif\n\n//   Timer Thread stack size [bytes] <64-4096:8><#/4>\n//    Defines stack size for Timer thread.\n//    Default: 200\n#ifndef OS_TIMERSTKSZ\n#define OS_TIMERSTKSZ WORDS_STACK_SIZE\n#endif\n\n// Check for stack overflow\n//  Includes the stack checking code for stack overflow.\n//  Note that additional code reduces the Kernel performance.\n#ifndef OS_STKCHECK\n#define OS_STKCHECK 1\n#endif\n\n// Processor mode for thread execution\n//   <0=> Unprivileged mode\n//   <1=> Privileged mode\n//  Default: Privileged mode\n#ifndef OS_RUNPRIV\n#define OS_RUNPRIV 1\n#endif\n\n//   Timer tick value [us] <1-1000000>\n//    Defines the timer tick value.\n//    Default: 1000  (1ms)\n#ifndef OS_TICK\n#define OS_TICK 1000\n#endif\n\n// \n\n// System Configuration\n// =======================\n//\n// Round-Robin Thread switching\n// ===============================\n//\n//  Enables Round-Robin Thread switching.\n#ifndef OS_ROBIN\n#define OS_ROBIN 1\n#endif\n\n//   Round-Robin Timeout [ticks] <1-1000>\n//    Defines how long a thread will execute before a thread switch.\n//    Default: 5\n#ifndef OS_ROBINTOUT\n#define OS_ROBINTOUT 5\n#endif\n\n// \n\n// User Timers\n// ==============\n//    Enables user Timers\n#ifndef OS_TIMERS\n#define OS_TIMERS 1\n#endif\n\n//   Timer Thread Priority\n//                        <1=> Low\n//                        <2=> Below Normal\n//                        <3=> Normal\n//                        <4=> Above Normal\n//                        <5=> High\n//                        <6=> Realtime (highest)\n//    Defines priority for Timer Thread\n//    Default: High\n#ifndef OS_TIMERPRIO\n#define OS_TIMERPRIO 5\n#endif\n\n//   Timer Callback Queue size <1-32>\n//    Number of concurrent active timer callback functions.\n//    Default: 4\n#ifndef OS_TIMERCBQSZ\n#define OS_TIMERCBQS 16\n#endif\n\n// \n\n//   ISR FIFO Queue size<4=>   4 entries  <8=>   8 entries\n//                         <12=> 12 entries  <16=> 16 entries\n//                         <24=> 24 entries  <32=> 32 entries\n//                         <48=> 48 entries  <64=> 64 entries\n//                         <96=> 96 entries\n//    ISR functions store requests to this buffer,\n//    when they are called from the interrupt handler.\n//    Default: 16 entries\n#ifndef OS_FIFOSZ\n#define OS_FIFOSZ 16\n#endif\n\n// \n\n//------------- <<< end of configuration section >>> -----------------------\n\n// Standard library system mutexes\n// ===============================\n//  Define max. number system mutexes that are used to protect\n//  the arm standard runtime library. For microlib they are not used.\n#ifndef OS_MUTEXCNT\n#define OS_MUTEXCNT 12\n#endif\n\n/*----------------------------------------------------------------------------\n *      RTX User configuration part END\n *---------------------------------------------------------------------------*/\n\n#define OS_TRV                                                                 \\\n  ((uint32_t)((((float)OS_CLOCK * (float)OS_TICK)) / (float)1E6 + 0.5f) - 1)\n\nU32 os_get_trv(void) { return OS_TRV; }\n\nextern void rtx_show_all_threads(void);\n\n#if TASK_HUNG_CHECK_ENABLED\nextern void check_hung_tasks(void);\n#endif\n\n/*----------------------------------------------------------------------------\n *      OS Idle daemon\n *---------------------------------------------------------------------------*/\nvoid os_idle_demon(void) {\n  /* The idle demon is a system thread, running when no other thread is      */\n  /* ready to run.                                                           */\n\n  unsigned int os_ticks;\n  HWTIMER_ID timer;\n  int ret;\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 2)\n  unsigned int start_time;\n  unsigned int start_os_time;\n  unsigned int start_tick;\n#endif\n#if !(defined(ROM_BUILD) || defined(PROGRAMMER))\n  ret = hal_trace_crash_dump_register(HAL_TRACE_CRASH_DUMP_MODULE_SYS,\n                                      rtx_show_all_threads);\n  ASSERT(ret == 0, \"IdleTask: Failed to register crash dump callback\");\n#endif\n  timer = hwtimer_alloc((HWTIMER_CALLBACK_T)rt_psh_req, NULL);\n  ASSERT(timer, \"IdleTask: Failed to alloc sleep timer\");\n  /* Sleep: ideally, we should put the chip to sleep.\n   Unfortunately, this usually requires disconnecting the interface chip\n   (debugger). This can be done, but it would break the local file system.\n  */\n  for (;;) {\n#if TASK_HUNG_CHECK_ENABLED\n    check_hung_tasks();\n#endif\n\n    if (hal_sleep_light_sleep() == HAL_SLEEP_STATUS_DEEP) {\n      os_ticks = rt_suspend();\n      if (os_ticks) {\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 2)\n        __disable_irq();\n#endif\n        ret = hwtimer_start(timer, MS_TO_HWTICKS(os_ticks * OS_TICK / 1000));\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 2)\n        start_time = hal_sys_timer_get();\n        start_tick = SysTick->VAL;\n        start_os_time = os_time;\n        __enable_irq();\n#endif\n        if (ret == 0) {\n          sleep();\n          ret = hwtimer_stop(timer);\n        }\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 2)\n        if (hal_sys_timer_get() - start_time >= MS_TO_HWTICKS(1)) {\n          TRACE(4, \"[%u/0x%X][%2u/%u] os_idle_demon start timer\",\n                TICKS_TO_MS(start_time), start_time, start_tick, start_os_time);\n        }\n#endif\n      }\n      rt_resume(os_ticks);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n *      RTX Errors\n *---------------------------------------------------------------------------*/\nextern void rtx_show_current_thread(void);\nvoid os_error(uint32_t err_code) {\n  /* This function is called when a runtime error is detected. Parameter     */\n  /* 'err_code' holds the runtime error code (defined in RTX_Conf.h).      */\n\n  rtx_show_current_thread();\n  ASSERT(0, \"os_error: %d ThreadId:%d\\n\", err_code, osGetThreadIntId());\n\n  // mbed_die();\n}\n\nvoid os_error_str(const char *str, ...) {\n  va_list ap;\n  static char buf[50];\n\n  va_start(ap, str);\n  vsnprintf(buf, sizeof(buf), str, ap);\n  va_end(ap);\n\n  ASSERT(0, \"%s\\n\", buf);\n}\n\nvoid sysThreadError(osStatus status) {\n  if (status != osOK) {\n    TRACE_IMM(1, \"osStatus: %08x\\n\", status);\n    rtx_show_current_thread();\n    ASSERT(0, \"sysThreadError ThreadId:%d\\n\", osGetThreadIntId());\n  }\n}\n\n/*----------------------------------------------------------------------------\n *      RTX Configuration Functions\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_CM_lib.h\"\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_ARM/HAL_CM0.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM0.C\n *      Purpose: Hardware Abstraction Layer for Cortex-M0\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n__asm void rt_set_PSP(U32 stack) { MSR PSP, R0 BX LR }\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n__asm U32 rt_get_PSP(void) { MRS R0, PSP BX LR }\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n__asm void os_set_env(void) {\n  /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n  MOV R0, SP;\n  PSP = MSP MSR PSP, R0 LDR R0, = __cpp(&os_flags) LDRB R0, [R0] LSLS R0,\n# 31 BNE PrivilegedE MOVS R0, #0x03;\n  Unprivileged Thread mode, use PSP MSR CONTROL, R0 BX LR PrivilegedE MOVS R0,\n# 0x02;\n  Privileged Thread mode, use PSP MSR CONTROL,\n  R0 BX LR\n\n      ALIGN\n}\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n__asm void *_alloc_box(void *box_mem) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  LDR R3, = __cpp(rt_alloc_box) MOV R12, R3 MRS R3, IPSR LSLS R3,\n# 24 BNE PrivilegedA MRS R3, CONTROL LSLS R3,\n# 31 BEQ PrivilegedA SVC 0 BX LR PrivilegedA BX R12\n\n      ALIGN\n}\n\n/*--------------------------- _free_box -------------------------------------*/\n\n__asm int _free_box(void *box_mem, void *box) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  LDR R3, = __cpp(rt_free_box) MOV R12, R3 MRS R3, IPSR LSLS R3,\n# 24 BNE PrivilegedF MRS R3, CONTROL LSLS R3,\n# 31 BEQ PrivilegedF SVC 0 BX LR PrivilegedF BX R12\n\n      ALIGN\n}\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n__asm void SVC_Handler(void) {\n  PRESERVE8\n\n  IMPORT SVC_Count IMPORT SVC_Table IMPORT rt_stk_check\n\n      MRS R0,\n      PSP;\n  Read PSP LDR R1, [ R0, #24 ];\n  Read Saved PC from Stack SUBS R1, R1, #2;\n  Point to SVC Instruction LDRB R1, [R1];\n  Load SVC Number CMP R1, #0 BNE SVC_User;\n  User SVC Number > 0\n\n      MOV LR,\n      R4 LDMIA R0, {R0 - R3, R4};\n  Read R0 - R3, R12 from stack MOV R12, R4 MOV R4, LR BLX R12;\n  Call SVC Function\n\n      MRS R3,\n      PSP;\n  Read PSP STMIA R3 !, {R0 - R2};\n  Store return values\n\n      LDR R3,\n      = __cpp(&os_tsk) LDMIA R3 !, {R1, R2};\n  os_tsk.run, os_tsk.new CMP R1, R2 BEQ SVC_Exit;\n  no task switch\n\n      SUBS R3,\n# 8 CMP R1, #0;\n      Runtask deleted ? BEQ SVC_Next\n\n                            MRS R0,\n      PSP;\n  Read PSP SUBS R0, R0, #32;\n  Adjust Start Address STR R0, [ R1, #TCB_TSTACK ];\n  Update os_tsk.run->tsk_stack STMIA R0 !, {R4 - R7};\n  Save old context(R4 - R7) MOV R4, R8 MOV R5, R9 MOV R6, R10 MOV R7,\n      R11 STMIA R0 !, {R4 - R7};\n  Save old context(R8 - R11)\n\n      PUSH{R2, R3} BL rt_stk_check; Check for Stack overflow\n        POP     {R2,R3}\n\nSVC_Next\n        STR     R2,[R3]                 ;\n  os_tsk.run = os_tsk.new\n\n               LDR R0,\n  [ R2, #TCB_TSTACK ];\n  os_tsk.new->tsk_stack ADDS R0, R0, #16;\n  Adjust Start Address LDMIA R0 !, {R4 - R7};\n  Restore new Context(R8 - R11) MOV R8, R4 MOV R9, R5 MOV R10, R6 MOV R11,\n      R7 MSR PSP, R0;\n  Write PSP SUBS R0, R0, #32;\n  Adjust Start Address LDMIA R0 !, {R4 - R7};\n  Restore new Context(R4 - R7)\n\n      SVC_Exit MOVS R0,\n# : NOT : 0xFFFFFFFD;\n      Set EXC_RETURN value MVNS R0, R0 BX R0;\n  RETI to Thread Mode,\n      use PSP\n\n          /*------------------- User SVC ------------------------------*/\n\n          SVC_User PUSH{R4, LR};\n  Save Registers LDR R2, = SVC_Count LDR R2, [R2] CMP R1, R2 BHI SVC_Done;\n  Overflow\n\n      LDR R4,\n      = SVC_Table - 4 LSLS R1, R1, #2 LDR R4, [ R4, R1 ];\n  Load SVC Function Address MOV LR,\n      R4\n\n          LDMIA R0,\n      {R0 - R3, R4};\n  Read R0 - R3, R12 from stack MOV R12, R4 BLX LR;\n  Call SVC Function\n\n      MRS R4,\n      PSP;\n  Read PSP STMIA R4 !, {R0 - R3};\n  Function return values SVC_Done POP{R4, PC};\n  RETI\n\n      ALIGN\n}\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n__asm void PendSV_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(rt_pop_req)\n\n      Sys_Switch LDR R3,\n      = __cpp(&os_tsk) LDMIA R3 !, {R1, R2};\n  os_tsk.run, os_tsk.new CMP R1, R2 BEQ Sys_Exit;\n  no task switch\n\n      SUBS R3,\n# 8\n\n      MRS R0, PSP;\n  Read PSP SUBS R0, R0, #32;\n  Adjust Start Address STR R0, [ R1, #TCB_TSTACK ];\n  Update os_tsk.run->tsk_stack STMIA R0 !, {R4 - R7};\n  Save old context(R4 - R7) MOV R4, R8 MOV R5, R9 MOV R6, R10 MOV R7,\n      R11 STMIA R0 !, {R4 - R7};\n  Save old context(R8 - R11)\n\n      PUSH{R2, R3} BL rt_stk_check; Check for Stack overflow\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 ;\n  os_tsk.run = os_tsk.new\n\n               LDR R0,\n  [ R2, #TCB_TSTACK ];\n  os_tsk.new->tsk_stack ADDS R0, R0, #16;\n  Adjust Start Address LDMIA R0 !, {R4 - R7};\n  Restore new Context(R8 - R11) MOV R8, R4 MOV R9, R5 MOV R10, R6 MOV R11,\n      R7 MSR PSP, R0;\n  Write PSP SUBS R0, R0, #32;\n  Adjust Start Address LDMIA R0 !, {R4 - R7};\n  Restore new Context(R4 - R7)\n\n      Sys_Exit MOVS R0,\n# : NOT : 0xFFFFFFFD;\n      Set EXC_RETURN value MVNS R0, R0 BX R0;\n  RETI to Thread Mode, use PSP\n\n                           ALIGN\n}\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n__asm void SysTick_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(rt_systick) B Sys_Switch\n\n      ALIGN\n}\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n__asm void OS_Tick_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(os_tick_irqack) BL __cpp(rt_systick) B Sys_Switch\n\n      ALIGN\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_ARM/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.60\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                AREA    SVC_TABLE, CODE, READONLY\n\n                EXPORT  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;               IMPORT  __SVC_1\n\n                EXPORT  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;               DCD     __SVC_1                 ; user SVC function\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/HAL_CM0.S",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM0.S\n *      Purpose: Hardware Abstraction Layer for Cortex-M0\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        .file   \"HAL_CM0.S\"\n        .syntax unified\n\n        .equ    TCB_TSTACK, 40\n\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        .thumb\n\n        .section \".text\"\n        .align  2\n\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n#       void rt_set_PSP (U32 stack);\n\n        .thumb_func\n        .type   rt_set_PSP, %function\n        .global rt_set_PSP\nrt_set_PSP:\n        .fnstart\n        .cantunwind\n\n        MSR     PSP,R0\n        BX      LR\n\n        .fnend\n        .size   rt_set_PSP, .-rt_set_PSP\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n#       U32 rt_get_PSP (void);\n\n        .thumb_func\n        .type   rt_get_PSP, %function\n        .global rt_get_PSP\nrt_get_PSP:\n        .fnstart\n        .cantunwind\n\n        MRS     R0,PSP\n        BX      LR\n\n        .fnend\n        .size   rt_get_PSP, .-rt_get_PSP\n\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n#       void os_set_env (void);\n        /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n\n        .thumb_func\n        .type   os_set_env, %function\n        .global os_set_env\nos_set_env:\n        .fnstart\n        .cantunwind\n\n        MOV     R0,SP                   /* PSP = MSP */\n        MSR     PSP,R0\n        LDR     R0,=os_flags\n        LDRB    R0,[R0]\n        LSLS    R0,#31\n        BNE     PrivilegedE\n        MOVS    R0,#0x03                /* Unprivileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\nPrivilegedE:\n        MOVS    R0,#0x02                /* Privileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\n\n        .fnend\n        .size   os_set_env, .-os_set_env\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n#      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .thumb_func\n        .type   _alloc_box, %function\n        .global _alloc_box\n_alloc_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R3,=rt_alloc_box\n        MOV     R12,R3\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        BNE     PrivilegedA\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        BEQ     PrivilegedA\n        SVC     0\n        BX      LR\nPrivilegedA:\n        BX      R12\n\n        .fnend\n        .size   _alloc_box, .-_alloc_box\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n#       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .thumb_func\n        .type   _free_box, %function\n        .global _free_box\n_free_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R3,=rt_free_box\n        MOV     R12,R3\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        BNE     PrivilegedF\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        BEQ     PrivilegedF\n        SVC     0\n        BX      LR\nPrivilegedF:\n        BX      R12\n\n        .fnend\n        .size   _free_box, .-_free_box\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n#       void SVC_Handler (void);\n\n        .thumb_func\n        .type   SVC_Handler, %function\n        .global SVC_Handler\nSVC_Handler:\n        .fnstart\n        .cantunwind\n\n        MRS     R0,PSP                  /* Read PSP */\n        LDR     R1,[R0,#24]             /* Read Saved PC from Stack */\n        SUBS    R1,R1,#2                /* Point to SVC Instruction */\n        LDRB    R1,[R1]                 /* Load SVC Number */\n        CMP     R1,#0\n        BNE     SVC_User                /* User SVC Number > 0 */\n\n        MOV     LR,R4\n        LDMIA   R0,{R0-R3,R4}           /* Read R0-R3,R12 from stack */\n        MOV     R12,R4\n        MOV     R4,LR\n        BLX     R12                     /* Call SVC Function */\n\n        MRS     R3,PSP                  /* Read PSP */\n        STMIA   R3!,{R0-R2}             /* Store return values */\n\n        LDR     R3,=os_tsk\n        LDMIA   R3!,{R1,R2}             /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     SVC_Exit                /* no task switch */\n\n        SUBS    R3,#8\n        CMP     R1,#0                   /* Runtask deleted? */\n        BEQ     SVC_Next\n\n        MRS     R0,PSP                  /* Read PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        STR     R0,[R1,#TCB_TSTACK]     /* Update os_tsk.run->tsk_stack */\n        STMIA   R0!,{R4-R7}             /* Save old context (R4-R7) */\n        MOV     R4,R8\n        MOV     R5,R9\n        MOV     R6,R10\n        MOV     R7,R11\n        STMIA   R0!,{R4-R7}             /* Save old context (R8-R11) */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\nSVC_Next:\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R0,[R2,#TCB_TSTACK]     /* os_tsk.new->tsk_stack */\n        ADDS    R0,R0,#16               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R8-R11) */\n        MOV     R8,R4\n        MOV     R9,R5\n        MOV     R10,R6\n        MOV     R11,R7\n        MSR     PSP,R0                  /* Write PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R4-R7) */\n\nSVC_Exit:\n        MOVS    R0,#~0xFFFFFFFD         /* Set EXC_RETURN value */\n        MVNS    R0,R0\n        BX      R0                      /* RETI to Thread Mode, use PSP */\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        PUSH    {R4,LR}                 /* Save Registers */\n        LDR     R2,=SVC_Count\n        LDR     R2,[R2]\n        CMP     R1,R2\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table-4\n        LSLS    R1,R1,#2\n        LDR     R4,[R4,R1]              /* Load SVC Function Address */\n        MOV     LR,R4\n\n        LDMIA   R0,{R0-R3,R4}           /* Read R0-R3,R12 from stack */\n        MOV     R12,R4\n        BLX     LR                      /* Call SVC Function */\n\n        MRS     R4,PSP                  /* Read PSP */\n        STMIA   R4!,{R0-R3}             /* Function return values */\nSVC_Done:\n        POP     {R4,PC}                 /* RETI */\n\n        .fnend\n        .size   SVC_Handler, .-SVC_Handler\n\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n#       void PendSV_Handler (void);\n\n        .thumb_func\n        .type   PendSV_Handler, %function\n        .global PendSV_Handler\n        .global Sys_Switch\nPendSV_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      rt_pop_req\n\nSys_Switch:\n        LDR     R3,=os_tsk\n        LDMIA   R3!,{R1,R2}             /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     Sys_Exit                /* no task switch */\n\n        SUBS    R3,#8\n\n        MRS     R0,PSP                  /* Read PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        STR     R0,[R1,#TCB_TSTACK]     /* Update os_tsk.run->tsk_stack */\n        STMIA   R0!,{R4-R7}             /* Save old context (R4-R7) */\n        MOV     R4,R8\n        MOV     R5,R9\n        MOV     R6,R10\n        MOV     R7,R11\n        STMIA   R0!,{R4-R7}             /* Save old context (R8-R11) */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R0,[R2,#TCB_TSTACK]     /* os_tsk.new->tsk_stack */\n        ADDS    R0,R0,#16               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R8-R11) */\n        MOV     R8,R4\n        MOV     R9,R5\n        MOV     R10,R6\n        MOV     R11,R7\n        MSR     PSP,R0                  /* Write PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R4-R7) */\n\nSys_Exit:\n        MOVS    R0,#~0xFFFFFFFD         /* Set EXC_RETURN value */\n        MVNS    R0,R0\n        BX      R0                      /* RETI to Thread Mode, use PSP */\n\n        .fnend\n        .size   PendSV_Handler, .-PendSV_Handler\n\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n#       void SysTick_Handler (void);\n\n        .thumb_func\n        .type   SysTick_Handler, %function\n        .global SysTick_Handler\nSysTick_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      rt_systick\n        B       Sys_Switch\n\n        .fnend\n        .size   SysTick_Handler, .-SysTick_Handler\n\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n#       void OS_Tick_Handler (void);\n\n        .thumb_func\n        .type   OS_Tick_Handler, %function\n        .global OS_Tick_Handler\nOS_Tick_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      os_tick_irqack\n        BL      rt_systick\n        B       Sys_Switch\n\n        .fnend\n        .size   OS_Tick_Handler, .-OS_Tick_Handler\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.60\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n        .file   \"SVC_Table.S\"\n\n\n        .section \".svc_table\"\n\n        .global  SVC_Table\nSVC_Table:\n/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */\n#       .long   __SVC_1                 /* user SVC function */\nSVC_End:\n\n        .global  SVC_Count\nSVC_Count:\n        .long   (SVC_End-SVC_Table)/4\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/HAL_CM0.S",
    "content": "/*----------------------------------------------------------------------------\n *      CMSIS-RTOS  -  RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM0.S\n *      Purpose: Hardware Abstraction Layer for Cortex-M0\n *      Rev.:    V4.70\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        NAME    HAL_CM0.S\n\n        #define TCB_TSTACK 40\n\n        EXTERN  os_flags\n        EXTERN  os_tsk\n        EXTERN  rt_alloc_box\n        EXTERN  rt_free_box\n        EXTERN  rt_stk_check\n        EXTERN  rt_pop_req\n        EXTERN  rt_systick\n        EXTERN  os_tick_irqack\n        EXTERN  SVC_Table\n        EXTERN  SVC_Count\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        SECTION .text:CODE:NOROOT(2)\n        THUMB\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n;       void rt_set_PSP (U32 stack);\n\n        PUBLIC  rt_set_PSP\nrt_set_PSP:\n\n        MSR     PSP,R0\n        BX      LR\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n;       U32 rt_get_PSP (void);\n\n        PUBLIC  rt_get_PSP\nrt_get_PSP:\n\n        MRS     R0,PSP\n        BX      LR\n\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n;       void os_set_env (void);\n        /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n\n        PUBLIC  os_set_env\nos_set_env:\n\n        MOV     R0,SP                   /* PSP = MSP */\n        MSR     PSP,R0\n        LDR     R0,=os_flags\n        LDRB    R0,[R0]\n        LSLS    R0,#31\n        BNE     PrivilegedE\n        MOVS    R0,#0x03                /* Unprivileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\nPrivilegedE:\n        MOVS    R0,#0x02                /* Privileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n;      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        PUBLIC  _alloc_box\n_alloc_box:\n\n        LDR     R3,=rt_alloc_box\n        MOV     R12,R3\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        BNE     PrivilegedA\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        BEQ     PrivilegedA\n        SVC     0\n        BX      LR\nPrivilegedA:\n        BX      R12\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n;       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        PUBLIC  _free_box\n_free_box:\n\n        LDR     R3,=rt_free_box\n        MOV     R12,R3\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        BNE     PrivilegedF\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        BEQ     PrivilegedF\n        SVC     0\n        BX      LR\nPrivilegedF:\n        BX      R12\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n;       void SVC_Handler (void);\n\n        PUBLIC  SVC_Handler\nSVC_Handler:\n\n        MRS     R0,PSP                  /* Read PSP */\n        LDR     R1,[R0,#24]             /* Read Saved PC from Stack */\n        SUBS    R1,R1,#2                /* Point to SVC Instruction */\n        LDRB    R1,[R1]                 /* Load SVC Number */\n        CMP     R1,#0\n        BNE     SVC_User                /* User SVC Number > 0 */\n\n        MOV     LR,R4\n        LDMIA   R0,{R0-R3,R4}           /* Read R0-R3,R12 from stack */\n        MOV     R12,R4\n        MOV     R4,LR\n        BLX     R12                     /* Call SVC Function */\n\n        MRS     R3,PSP                  /* Read PSP */\n        STMIA   R3!,{R0-R2}             /* Store return values */\n\n        LDR     R3,=os_tsk\n        LDMIA   R3!,{R1,R2}             /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     SVC_Exit                /* no task switch */\n\n        SUBS    R3,#8\n        CMP     R1,#0                   /* Runtask deleted? */\n        BEQ     SVC_Next\n\n        MRS     R0,PSP                  /* Read PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        STR     R0,[R1,#TCB_TSTACK]     /* Update os_tsk.run->tsk_stack */\n        STMIA   R0!,{R4-R7}             /* Save old context (R4-R7) */\n        MOV     R4,R8\n        MOV     R5,R9\n        MOV     R6,R10\n        MOV     R7,R11\n        STMIA   R0!,{R4-R7}             /* Save old context (R8-R11) */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\nSVC_Next:\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R0,[R2,#TCB_TSTACK]     /* os_tsk.new->tsk_stack */\n        ADDS    R0,R0,#16               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R8-R11) */\n        MOV     R8,R4\n        MOV     R9,R5\n        MOV     R10,R6\n        MOV     R11,R7\n        MSR     PSP,R0                  /* Write PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R4-R7) */\n\nSVC_Exit:\n        MOVS    R0,#~0xFFFFFFFD         /* Set EXC_RETURN value */\n        MVNS    R0,R0\n        BX      R0                      /* RETI to Thread Mode, use PSP */\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        PUSH    {R4,LR}                 /* Save Registers */\n        LDR     R2,=SVC_Count\n        LDR     R2,[R2]\n        CMP     R1,R2\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table-4\n        LSLS    R1,R1,#2\n        LDR     R4,[R4,R1]              /* Load SVC Function Address */\n        MOV     LR,R4\n\n        LDMIA   R0,{R0-R3,R4}           /* Read R0-R3,R12 from stack */\n        MOV     R12,R4\n        BLX     LR                      /* Call SVC Function */\n\n        MRS     R4,PSP                  /* Read PSP */\n        STMIA   R4!,{R0-R3}             /* Function return values */\nSVC_Done:\n        POP     {R4,PC}                 /* RETI */\n\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n;       void PendSV_Handler (void);\n\n        PUBLIC  PendSV_Handler\nPendSV_Handler:\n\n        BL      rt_pop_req\n\nSys_Switch:\n        LDR     R3,=os_tsk\n        LDMIA   R3!,{R1,R2}             /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     Sys_Exit                /* no task switch */\n\n        SUBS    R3,#8\n\n        MRS     R0,PSP                  /* Read PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        STR     R0,[R1,#TCB_TSTACK]     /* Update os_tsk.run->tsk_stack */\n        STMIA   R0!,{R4-R7}             /* Save old context (R4-R7) */\n        MOV     R4,R8\n        MOV     R5,R9\n        MOV     R6,R10\n        MOV     R7,R11\n        STMIA   R0!,{R4-R7}             /* Save old context (R8-R11) */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R0,[R2,#TCB_TSTACK]     /* os_tsk.new->tsk_stack */\n        ADDS    R0,R0,#16               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R8-R11) */\n        MOV     R8,R4\n        MOV     R9,R5\n        MOV     R10,R6\n        MOV     R11,R7\n        MSR     PSP,R0                  /* Write PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R4-R7) */\n\nSys_Exit:\n        MOVS    R0,#~0xFFFFFFFD         /* Set EXC_RETURN value */\n        MVNS    R0,R0\n        BX      R0                      /* RETI to Thread Mode, use PSP */\n\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n;       void SysTick_Handler (void);\n\n        PUBLIC  SysTick_Handler\nSysTick_Handler:\n\n        BL      rt_systick\n        B       Sys_Switch\n\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n;       void OS_Tick_Handler (void);\n\n        PUBLIC  OS_Tick_Handler\nOS_Tick_Handler:\n\n        BL      os_tick_irqack\n        BL      rt_systick\n        B       Sys_Switch\n\n\n        END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      CMSIS-RTOS  -  RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.70\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                NAME    SVC_TABLE\n                SECTION .text:CONST (2)\n\n                PUBLIC  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;               IMPORT  __SVC_1\n\n                PUBLIC  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;               DCD     __SVC_1                 ; user SVC function\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_ARM/HAL_CM0.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM0.C\n *      Purpose: Hardware Abstraction Layer for Cortex-M0\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n__asm void rt_set_PSP(U32 stack) { MSR PSP, R0 BX LR }\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n__asm U32 rt_get_PSP(void) { MRS R0, PSP BX LR }\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n__asm void os_set_env(void) {\n  /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n  MOV R0, SP;\n  PSP = MSP MSR PSP, R0 LDR R0, = __cpp(&os_flags) LDRB R0, [R0] LSLS R0,\n# 31 BNE PrivilegedE MOVS R0, #0x03;\n  Unprivileged Thread mode, use PSP MSR CONTROL, R0 BX LR PrivilegedE MOVS R0,\n# 0x02;\n  Privileged Thread mode, use PSP MSR CONTROL,\n  R0 BX LR\n\n      ALIGN\n}\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n__asm void *_alloc_box(void *box_mem) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  LDR R3, = __cpp(rt_alloc_box) MOV R12, R3 MRS R3, IPSR LSLS R3,\n# 24 BNE PrivilegedA MRS R3, CONTROL LSLS R3,\n# 31 BEQ PrivilegedA SVC 0 BX LR PrivilegedA BX R12\n\n      ALIGN\n}\n\n/*--------------------------- _free_box -------------------------------------*/\n\n__asm int _free_box(void *box_mem, void *box) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  LDR R3, = __cpp(rt_free_box) MOV R12, R3 MRS R3, IPSR LSLS R3,\n# 24 BNE PrivilegedF MRS R3, CONTROL LSLS R3,\n# 31 BEQ PrivilegedF SVC 0 BX LR PrivilegedF BX R12\n\n      ALIGN\n}\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n__asm void SVC_Handler(void) {\n  PRESERVE8\n\n  IMPORT SVC_Count IMPORT SVC_Table IMPORT rt_stk_check\n\n      MRS R0,\n      PSP;\n  Read PSP LDR R1, [ R0, #24 ];\n  Read Saved PC from Stack SUBS R1, R1, #2;\n  Point to SVC Instruction LDRB R1, [R1];\n  Load SVC Number CMP R1, #0 BNE SVC_User;\n  User SVC Number > 0\n\n      MOV LR,\n      R4 LDMIA R0, {R0 - R3, R4};\n  Read R0 - R3, R12 from stack MOV R12, R4 MOV R4, LR BLX R12;\n  Call SVC Function\n\n      MRS R3,\n      PSP;\n  Read PSP STMIA R3 !, {R0 - R2};\n  Store return values\n\n      LDR R3,\n      = __cpp(&os_tsk) LDMIA R3 !, {R1, R2};\n  os_tsk.run, os_tsk.new CMP R1, R2 BEQ SVC_Exit;\n  no task switch\n\n      SUBS R3,\n# 8 CMP R1, #0;\n      Runtask deleted ? BEQ SVC_Next\n\n                            MRS R0,\n      PSP;\n  Read PSP SUBS R0, R0, #32;\n  Adjust Start Address STR R0, [ R1, #TCB_TSTACK ];\n  Update os_tsk.run->tsk_stack STMIA R0 !, {R4 - R7};\n  Save old context(R4 - R7) MOV R4, R8 MOV R5, R9 MOV R6, R10 MOV R7,\n      R11 STMIA R0 !, {R4 - R7};\n  Save old context(R8 - R11)\n\n      PUSH{R2, R3} BL rt_stk_check; Check for Stack overflow\n        POP     {R2,R3}\n\nSVC_Next\n        STR     R2,[R3]                 ;\n  os_tsk.run = os_tsk.new\n\n               LDR R0,\n  [ R2, #TCB_TSTACK ];\n  os_tsk.new->tsk_stack ADDS R0, R0, #16;\n  Adjust Start Address LDMIA R0 !, {R4 - R7};\n  Restore new Context(R8 - R11) MOV R8, R4 MOV R9, R5 MOV R10, R6 MOV R11,\n      R7 MSR PSP, R0;\n  Write PSP SUBS R0, R0, #32;\n  Adjust Start Address LDMIA R0 !, {R4 - R7};\n  Restore new Context(R4 - R7)\n\n      SVC_Exit MOVS R0,\n# : NOT : 0xFFFFFFFD;\n      Set EXC_RETURN value MVNS R0, R0 BX R0;\n  RETI to Thread Mode,\n      use PSP\n\n          /*------------------- User SVC ------------------------------*/\n\n          SVC_User PUSH{R4, LR};\n  Save Registers LDR R2, = SVC_Count LDR R2, [R2] CMP R1, R2 BHI SVC_Done;\n  Overflow\n\n      LDR R4,\n      = SVC_Table - 4 LSLS R1, R1, #2 LDR R4, [ R4, R1 ];\n  Load SVC Function Address MOV LR,\n      R4\n\n          LDMIA R0,\n      {R0 - R3, R4};\n  Read R0 - R3, R12 from stack MOV R12, R4 BLX LR;\n  Call SVC Function\n\n      MRS R4,\n      PSP;\n  Read PSP STMIA R4 !, {R0 - R3};\n  Function return values SVC_Done POP{R4, PC};\n  RETI\n\n      ALIGN\n}\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n__asm void PendSV_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(rt_pop_req)\n\n      Sys_Switch LDR R3,\n      = __cpp(&os_tsk) LDMIA R3 !, {R1, R2};\n  os_tsk.run, os_tsk.new CMP R1, R2 BEQ Sys_Exit;\n  no task switch\n\n      SUBS R3,\n# 8\n\n      MRS R0, PSP;\n  Read PSP SUBS R0, R0, #32;\n  Adjust Start Address STR R0, [ R1, #TCB_TSTACK ];\n  Update os_tsk.run->tsk_stack STMIA R0 !, {R4 - R7};\n  Save old context(R4 - R7) MOV R4, R8 MOV R5, R9 MOV R6, R10 MOV R7,\n      R11 STMIA R0 !, {R4 - R7};\n  Save old context(R8 - R11)\n\n      PUSH{R2, R3} BL rt_stk_check; Check for Stack overflow\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 ;\n  os_tsk.run = os_tsk.new\n\n               LDR R0,\n  [ R2, #TCB_TSTACK ];\n  os_tsk.new->tsk_stack ADDS R0, R0, #16;\n  Adjust Start Address LDMIA R0 !, {R4 - R7};\n  Restore new Context(R8 - R11) MOV R8, R4 MOV R9, R5 MOV R10, R6 MOV R11,\n      R7 MSR PSP, R0;\n  Write PSP SUBS R0, R0, #32;\n  Adjust Start Address LDMIA R0 !, {R4 - R7};\n  Restore new Context(R4 - R7)\n\n      Sys_Exit MOVS R0,\n# : NOT : 0xFFFFFFFD;\n      Set EXC_RETURN value MVNS R0, R0 BX R0;\n  RETI to Thread Mode, use PSP\n\n                           ALIGN\n}\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n__asm void SysTick_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(rt_systick) B Sys_Switch\n\n      ALIGN\n}\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n__asm void OS_Tick_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(os_tick_irqack) BL __cpp(rt_systick) B Sys_Switch\n\n      ALIGN\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_ARM/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.60\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                AREA    SVC_TABLE, CODE, READONLY\n\n                EXPORT  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;               IMPORT  __SVC_1\n\n                EXPORT  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;               DCD     __SVC_1                 ; user SVC function\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/HAL_CM0.S",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM0.S\n *      Purpose: Hardware Abstraction Layer for Cortex-M0\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        .file   \"HAL_CM0.S\"\n        .syntax unified\n\n        .equ    TCB_TSTACK, 40\n\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        .thumb\n\n        .section \".text\"\n        .align  2\n\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n#       void rt_set_PSP (U32 stack);\n\n        .thumb_func\n        .type   rt_set_PSP, %function\n        .global rt_set_PSP\nrt_set_PSP:\n        .fnstart\n        .cantunwind\n\n        MSR     PSP,R0\n        BX      LR\n\n        .fnend\n        .size   rt_set_PSP, .-rt_set_PSP\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n#       U32 rt_get_PSP (void);\n\n        .thumb_func\n        .type   rt_get_PSP, %function\n        .global rt_get_PSP\nrt_get_PSP:\n        .fnstart\n        .cantunwind\n\n        MRS     R0,PSP\n        BX      LR\n\n        .fnend\n        .size   rt_get_PSP, .-rt_get_PSP\n\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n#       void os_set_env (void);\n        /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n\n        .thumb_func\n        .type   os_set_env, %function\n        .global os_set_env\nos_set_env:\n        .fnstart\n        .cantunwind\n\n        MOV     R0,SP                   /* PSP = MSP */\n        MSR     PSP,R0\n        LDR     R0,=os_flags\n        LDRB    R0,[R0]\n        LSLS    R0,#31\n        BNE     PrivilegedE\n        MOVS    R0,#0x03                /* Unprivileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\nPrivilegedE:\n        MOVS    R0,#0x02                /* Privileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\n\n        .fnend\n        .size   os_set_env, .-os_set_env\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n#      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .thumb_func\n        .type   _alloc_box, %function\n        .global _alloc_box\n_alloc_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R3,=rt_alloc_box\n        MOV     R12,R3\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        BNE     PrivilegedA\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        BEQ     PrivilegedA\n        SVC     0\n        BX      LR\nPrivilegedA:\n        BX      R12\n\n        .fnend\n        .size   _alloc_box, .-_alloc_box\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n#       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .thumb_func\n        .type   _free_box, %function\n        .global _free_box\n_free_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R3,=rt_free_box\n        MOV     R12,R3\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        BNE     PrivilegedF\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        BEQ     PrivilegedF\n        SVC     0\n        BX      LR\nPrivilegedF:\n        BX      R12\n\n        .fnend\n        .size   _free_box, .-_free_box\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n#       void SVC_Handler (void);\n\n        .thumb_func\n        .type   SVC_Handler, %function\n        .global SVC_Handler\nSVC_Handler:\n        .fnstart\n        .cantunwind\n\n        MRS     R0,PSP                  /* Read PSP */\n        LDR     R1,[R0,#24]             /* Read Saved PC from Stack */\n        SUBS    R1,R1,#2                /* Point to SVC Instruction */\n        LDRB    R1,[R1]                 /* Load SVC Number */\n        CMP     R1,#0\n        BNE     SVC_User                /* User SVC Number > 0 */\n\n        MOV     LR,R4\n        LDMIA   R0,{R0-R3,R4}           /* Read R0-R3,R12 from stack */\n        MOV     R12,R4\n        MOV     R4,LR\n        BLX     R12                     /* Call SVC Function */\n\n        MRS     R3,PSP                  /* Read PSP */\n        STMIA   R3!,{R0-R2}             /* Store return values */\n\n        LDR     R3,=os_tsk\n        LDMIA   R3!,{R1,R2}             /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     SVC_Exit                /* no task switch */\n\n        SUBS    R3,#8\n        CMP     R1,#0                   /* Runtask deleted? */\n        BEQ     SVC_Next\n\n        MRS     R0,PSP                  /* Read PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        STR     R0,[R1,#TCB_TSTACK]     /* Update os_tsk.run->tsk_stack */\n        STMIA   R0!,{R4-R7}             /* Save old context (R4-R7) */\n        MOV     R4,R8\n        MOV     R5,R9\n        MOV     R6,R10\n        MOV     R7,R11\n        STMIA   R0!,{R4-R7}             /* Save old context (R8-R11) */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\nSVC_Next:\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R0,[R2,#TCB_TSTACK]     /* os_tsk.new->tsk_stack */\n        ADDS    R0,R0,#16               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R8-R11) */\n        MOV     R8,R4\n        MOV     R9,R5\n        MOV     R10,R6\n        MOV     R11,R7\n        MSR     PSP,R0                  /* Write PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R4-R7) */\n\nSVC_Exit:\n        MOVS    R0,#~0xFFFFFFFD         /* Set EXC_RETURN value */\n        MVNS    R0,R0\n        BX      R0                      /* RETI to Thread Mode, use PSP */\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        PUSH    {R4,LR}                 /* Save Registers */\n        LDR     R2,=SVC_Count\n        LDR     R2,[R2]\n        CMP     R1,R2\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table-4\n        LSLS    R1,R1,#2\n        LDR     R4,[R4,R1]              /* Load SVC Function Address */\n        MOV     LR,R4\n\n        LDMIA   R0,{R0-R3,R4}           /* Read R0-R3,R12 from stack */\n        MOV     R12,R4\n        BLX     LR                      /* Call SVC Function */\n\n        MRS     R4,PSP                  /* Read PSP */\n        STMIA   R4!,{R0-R3}             /* Function return values */\nSVC_Done:\n        POP     {R4,PC}                 /* RETI */\n\n        .fnend\n        .size   SVC_Handler, .-SVC_Handler\n\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n#       void PendSV_Handler (void);\n\n        .thumb_func\n        .type   PendSV_Handler, %function\n        .global PendSV_Handler\n        .global Sys_Switch\nPendSV_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      rt_pop_req\n\nSys_Switch:\n        LDR     R3,=os_tsk\n        LDMIA   R3!,{R1,R2}             /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     Sys_Exit                /* no task switch */\n\n        SUBS    R3,#8\n\n        MRS     R0,PSP                  /* Read PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        STR     R0,[R1,#TCB_TSTACK]     /* Update os_tsk.run->tsk_stack */\n        STMIA   R0!,{R4-R7}             /* Save old context (R4-R7) */\n        MOV     R4,R8\n        MOV     R5,R9\n        MOV     R6,R10\n        MOV     R7,R11\n        STMIA   R0!,{R4-R7}             /* Save old context (R8-R11) */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R0,[R2,#TCB_TSTACK]     /* os_tsk.new->tsk_stack */\n        ADDS    R0,R0,#16               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R8-R11) */\n        MOV     R8,R4\n        MOV     R9,R5\n        MOV     R10,R6\n        MOV     R11,R7\n        MSR     PSP,R0                  /* Write PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R4-R7) */\n\nSys_Exit:\n        MOVS    R0,#~0xFFFFFFFD         /* Set EXC_RETURN value */\n        MVNS    R0,R0\n        BX      R0                      /* RETI to Thread Mode, use PSP */\n\n        .fnend\n        .size   PendSV_Handler, .-PendSV_Handler\n\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n#       void SysTick_Handler (void);\n\n        .thumb_func\n        .type   SysTick_Handler, %function\n        .global SysTick_Handler\nSysTick_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      rt_systick\n        B       Sys_Switch\n\n        .fnend\n        .size   SysTick_Handler, .-SysTick_Handler\n\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n#       void OS_Tick_Handler (void);\n\n        .thumb_func\n        .type   OS_Tick_Handler, %function\n        .global OS_Tick_Handler\nOS_Tick_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      os_tick_irqack\n        BL      rt_systick\n        B       Sys_Switch\n\n        .fnend\n        .size   OS_Tick_Handler, .-OS_Tick_Handler\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.60\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n        .file   \"SVC_Table.S\"\n\n\n        .section \".svc_table\"\n\n        .global  SVC_Table\nSVC_Table:\n/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */\n#       .long   __SVC_1                 /* user SVC function */\nSVC_End:\n\n        .global  SVC_Count\nSVC_Count:\n        .long   (SVC_End-SVC_Table)/4\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/HAL_CM0.S",
    "content": "/*----------------------------------------------------------------------------\n *      CMSIS-RTOS  -  RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM0.S\n *      Purpose: Hardware Abstraction Layer for Cortex-M0\n *      Rev.:    V4.70\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        NAME    HAL_CM0.S\n\n        #define TCB_TSTACK 40\n\n        EXTERN  os_flags\n        EXTERN  os_tsk\n        EXTERN  rt_alloc_box\n        EXTERN  rt_free_box\n        EXTERN  rt_stk_check\n        EXTERN  rt_pop_req\n        EXTERN  rt_systick\n        EXTERN  os_tick_irqack\n        EXTERN  SVC_Table\n        EXTERN  SVC_Count\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        SECTION .text:CODE:NOROOT(2)\n        THUMB\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n;       void rt_set_PSP (U32 stack);\n\n        PUBLIC  rt_set_PSP\nrt_set_PSP:\n\n        MSR     PSP,R0\n        BX      LR\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n;       U32 rt_get_PSP (void);\n\n        PUBLIC  rt_get_PSP\nrt_get_PSP:\n\n        MRS     R0,PSP\n        BX      LR\n\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n;       void os_set_env (void);\n        /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n\n        PUBLIC  os_set_env\nos_set_env:\n\n        MOV     R0,SP                   /* PSP = MSP */\n        MSR     PSP,R0\n        LDR     R0,=os_flags\n        LDRB    R0,[R0]\n        LSLS    R0,#31\n        BNE     PrivilegedE\n        MOVS    R0,#0x03                /* Unprivileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\nPrivilegedE:\n        MOVS    R0,#0x02                /* Privileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n;      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        PUBLIC  _alloc_box\n_alloc_box:\n\n        LDR     R3,=rt_alloc_box\n        MOV     R12,R3\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        BNE     PrivilegedA\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        BEQ     PrivilegedA\n        SVC     0\n        BX      LR\nPrivilegedA:\n        BX      R12\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n;       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        PUBLIC  _free_box\n_free_box:\n\n        LDR     R3,=rt_free_box\n        MOV     R12,R3\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        BNE     PrivilegedF\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        BEQ     PrivilegedF\n        SVC     0\n        BX      LR\nPrivilegedF:\n        BX      R12\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n;       void SVC_Handler (void);\n\n        PUBLIC  SVC_Handler\nSVC_Handler:\n\n        MRS     R0,PSP                  /* Read PSP */\n        LDR     R1,[R0,#24]             /* Read Saved PC from Stack */\n        SUBS    R1,R1,#2                /* Point to SVC Instruction */\n        LDRB    R1,[R1]                 /* Load SVC Number */\n        CMP     R1,#0\n        BNE     SVC_User                /* User SVC Number > 0 */\n\n        MOV     LR,R4\n        LDMIA   R0,{R0-R3,R4}           /* Read R0-R3,R12 from stack */\n        MOV     R12,R4\n        MOV     R4,LR\n        BLX     R12                     /* Call SVC Function */\n\n        MRS     R3,PSP                  /* Read PSP */\n        STMIA   R3!,{R0-R2}             /* Store return values */\n\n        LDR     R3,=os_tsk\n        LDMIA   R3!,{R1,R2}             /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     SVC_Exit                /* no task switch */\n\n        SUBS    R3,#8\n        CMP     R1,#0                   /* Runtask deleted? */\n        BEQ     SVC_Next\n\n        MRS     R0,PSP                  /* Read PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        STR     R0,[R1,#TCB_TSTACK]     /* Update os_tsk.run->tsk_stack */\n        STMIA   R0!,{R4-R7}             /* Save old context (R4-R7) */\n        MOV     R4,R8\n        MOV     R5,R9\n        MOV     R6,R10\n        MOV     R7,R11\n        STMIA   R0!,{R4-R7}             /* Save old context (R8-R11) */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\nSVC_Next:\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R0,[R2,#TCB_TSTACK]     /* os_tsk.new->tsk_stack */\n        ADDS    R0,R0,#16               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R8-R11) */\n        MOV     R8,R4\n        MOV     R9,R5\n        MOV     R10,R6\n        MOV     R11,R7\n        MSR     PSP,R0                  /* Write PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R4-R7) */\n\nSVC_Exit:\n        MOVS    R0,#~0xFFFFFFFD         /* Set EXC_RETURN value */\n        MVNS    R0,R0\n        BX      R0                      /* RETI to Thread Mode, use PSP */\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        PUSH    {R4,LR}                 /* Save Registers */\n        LDR     R2,=SVC_Count\n        LDR     R2,[R2]\n        CMP     R1,R2\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table-4\n        LSLS    R1,R1,#2\n        LDR     R4,[R4,R1]              /* Load SVC Function Address */\n        MOV     LR,R4\n\n        LDMIA   R0,{R0-R3,R4}           /* Read R0-R3,R12 from stack */\n        MOV     R12,R4\n        BLX     LR                      /* Call SVC Function */\n\n        MRS     R4,PSP                  /* Read PSP */\n        STMIA   R4!,{R0-R3}             /* Function return values */\nSVC_Done:\n        POP     {R4,PC}                 /* RETI */\n\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n;       void PendSV_Handler (void);\n\n        PUBLIC  PendSV_Handler\nPendSV_Handler:\n\n        BL      rt_pop_req\n\nSys_Switch:\n        LDR     R3,=os_tsk\n        LDMIA   R3!,{R1,R2}             /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     Sys_Exit                /* no task switch */\n\n        SUBS    R3,#8\n\n        MRS     R0,PSP                  /* Read PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        STR     R0,[R1,#TCB_TSTACK]     /* Update os_tsk.run->tsk_stack */\n        STMIA   R0!,{R4-R7}             /* Save old context (R4-R7) */\n        MOV     R4,R8\n        MOV     R5,R9\n        MOV     R6,R10\n        MOV     R7,R11\n        STMIA   R0!,{R4-R7}             /* Save old context (R8-R11) */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R0,[R2,#TCB_TSTACK]     /* os_tsk.new->tsk_stack */\n        ADDS    R0,R0,#16               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R8-R11) */\n        MOV     R8,R4\n        MOV     R9,R5\n        MOV     R10,R6\n        MOV     R11,R7\n        MSR     PSP,R0                  /* Write PSP */\n        SUBS    R0,R0,#32               /* Adjust Start Address */\n        LDMIA   R0!,{R4-R7}             /* Restore new Context (R4-R7) */\n\nSys_Exit:\n        MOVS    R0,#~0xFFFFFFFD         /* Set EXC_RETURN value */\n        MVNS    R0,R0\n        BX      R0                      /* RETI to Thread Mode, use PSP */\n\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n;       void SysTick_Handler (void);\n\n        PUBLIC  SysTick_Handler\nSysTick_Handler:\n\n        BL      rt_systick\n        B       Sys_Switch\n\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n;       void OS_Tick_Handler (void);\n\n        PUBLIC  OS_Tick_Handler\nOS_Tick_Handler:\n\n        BL      os_tick_irqack\n        BL      rt_systick\n        B       Sys_Switch\n\n\n        END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      CMSIS-RTOS  -  RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.70\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                NAME    SVC_TABLE\n                SECTION .text:CONST (2)\n\n                PUBLIC  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;               IMPORT  __SVC_1\n\n                PUBLIC  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;               DCD     __SVC_1                 ; user SVC function\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/HAL_CM3.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM3.C\n *      Purpose: Hardware Abstraction Layer for Cortex-M3\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n__asm void rt_set_PSP(U32 stack) { MSR PSP, R0 BX LR }\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n__asm U32 rt_get_PSP(void) { MRS R0, PSP BX LR }\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n__asm void os_set_env(void) {\n  /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n  MOV R0, SP;\n  PSP = MSP MSR PSP, R0 LDR R0, = __cpp(&os_flags) LDRB R0, [R0] LSLS R0,\n# 31 MOVNE R0, #0x02;\n  Privileged Thread mode, use PSP MOVEQ R0, #0x03;\n  Unprivileged Thread mode, use PSP MSR CONTROL,\n      R0 BX LR\n\n          ALIGN\n}\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n__asm void *_alloc_box(void *box_mem) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  LDR R12, = __cpp(rt_alloc_box) MRS R3, IPSR LSLS R3, #24 BXNE R12 MRS R3,\n      CONTROL LSLS R3,\n# 31 BXEQ R12 SVC 0 BX LR\n\n      ALIGN\n}\n\n/*--------------------------- _free_box -------------------------------------*/\n\n__asm int _free_box(void *box_mem, void *box) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  LDR R12, = __cpp(rt_free_box) MRS R3, IPSR LSLS R3, #24 BXNE R12 MRS R3,\n      CONTROL LSLS R3,\n# 31 BXEQ R12 SVC 0 BX LR\n\n      ALIGN\n}\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n__asm void SVC_Handler(void) {\n  PRESERVE8\n\n  IMPORT SVC_Count IMPORT SVC_Table IMPORT rt_stk_check\n\n      MRS R0,\n      PSP;\n  Read PSP LDR R1, [ R0, #24 ];\n  Read Saved PC from Stack LDRB R1, [ R1, # - 2 ];\n  Load SVC Number CBNZ R1,\n      SVC_User\n\n          LDM R0,\n      {R0 - R3, R12};\n  Read R0 - R3, R12 from stack BLX R12;\n  Call SVC Function\n\n      MRS R12,\n      PSP;\n  Read PSP STM R12, {R0 - R2};\n  Store return values\n\n      LDR R3,\n      = __cpp(&os_tsk) LDM R3, {R1, R2};\n  os_tsk.run, os_tsk.new CMP R1, R2 BEQ SVC_Exit;\n  no task switch\n\n      CBZ R1,\n      SVC_Next;\n  Runtask deleted ? STMDB R12 !, {R4 - R11};\n  Save Old context STR R12, [ R1, #TCB_TSTACK ];\n  Update os_tsk.run->tsk_stack\n\n      PUSH{R2, R3} BL rt_stk_check; Check for Stack overflow\n        POP     {R2,R3}\n\nSVC_Next\n        STR     R2,[R3]                 ;\n  os_tsk.run = os_tsk.new\n\n               LDR R12,\n  [ R2, #TCB_TSTACK ];\n  os_tsk.new->tsk_stack LDMIA R12 !, {R4 - R11};\n  Restore New Context MSR PSP, R12;\n  Write PSP\n\n      SVC_Exit MVN LR,\n# : NOT : 0xFFFFFFFD;\n      set EXC_RETURN value BX LR\n\n          /*------------------- User SVC ------------------------------*/\n\n          SVC_User PUSH{R4, LR};\n  Save Registers LDR R2, = SVC_Count LDR R2, [R2] CMP R1, R2 BHI SVC_Done;\n  Overflow\n\n      LDR R4,\n      = SVC_Table - 4 LDR R4, [ R4, R1, LSL #2 ];\n  Load SVC Function Address\n\n      LDM R0,\n      {R0 - R3, R12};\n  Read R0 - R3, R12 from stack BLX R4;\n  Call SVC Function\n\n      MRS R12,\n      PSP STM R12, {R0 - R3};\n  Function return values SVC_Done POP{R4, PC};\n  RETI\n\n      ALIGN\n}\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n__asm void PendSV_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(rt_pop_req)\n\n      Sys_Switch LDR R3,\n      = __cpp(&os_tsk) LDM R3, {R1, R2};\n  os_tsk.run, os_tsk.new CMP R1,\n      R2 BEQ Sys_Exit\n\n          MRS R12,\n      PSP;\n  Read PSP STMDB R12 !, {R4 - R11};\n  Save Old context STR R12, [ R1, #TCB_TSTACK ];\n  Update os_tsk.run->tsk_stack\n\n      PUSH{R2, R3} BL rt_stk_check; Check for Stack overflow\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 ;\n  os_tsk.run = os_tsk.new\n\n               LDR R12,\n  [ R2, #TCB_TSTACK ];\n  os_tsk.new->tsk_stack LDMIA R12 !, {R4 - R11};\n  Restore New Context MSR PSP, R12;\n  Write PSP\n\n      Sys_Exit MVN LR,\n# : NOT : 0xFFFFFFFD;\n      set EXC_RETURN value BX LR;\n  Return to Thread Mode\n\n      ALIGN\n}\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n__asm void SysTick_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(rt_systick) B Sys_Switch\n\n      ALIGN\n}\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n__asm void OS_Tick_Handler(void) {\n  PRESERVE8\n\n  BL __cpp(os_tick_irqack) BL __cpp(rt_systick) B Sys_Switch\n\n      ALIGN\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.60\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                AREA    SVC_TABLE, CODE, READONLY\n\n                EXPORT  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;               IMPORT  __SVC_1\n\n                EXPORT  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;               DCD     __SVC_1                 ; user SVC function\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/HAL_CM3.S",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM3.S\n *      Purpose: Hardware Abstraction Layer for Cortex-M3\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        .file   \"HAL_CM3.S\"\n        .syntax unified\n\n        .equ    TCB_TSTACK, 40\n\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        .thumb\n\n        .section \".text\"\n        .align  2\n\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n#       void rt_set_PSP (U32 stack);\n\n        .thumb_func\n        .type   rt_set_PSP, %function\n        .global rt_set_PSP\nrt_set_PSP:\n        .fnstart\n        .cantunwind\n\n        MSR     PSP,R0\n        BX      LR\n\n        .fnend\n        .size   rt_set_PSP, .-rt_set_PSP\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n#       U32 rt_get_PSP (void);\n\n        .thumb_func\n        .type   rt_get_PSP, %function\n        .global rt_get_PSP\nrt_get_PSP:\n        .fnstart\n        .cantunwind\n\n        MRS     R0,PSP\n        BX      LR\n\n        .fnend\n        .size   rt_get_PSP, .-rt_get_PSP\n\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n#       void os_set_env (void);\n        /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n\n        .thumb_func\n        .type   os_set_env, %function\n        .global os_set_env\nos_set_env:\n        .fnstart\n        .cantunwind\n\n        MOV     R0,SP                   /* PSP = MSP */\n        MSR     PSP,R0\n        LDR     R0,=os_flags\n        LDRB    R0,[R0]\n        LSLS    R0,#31\n        ITE     NE\n        MOVNE   R0,#0x02                /* Privileged Thread mode, use PSP */\n        MOVEQ   R0,#0x03                /* Unprivileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\n\n        .fnend\n        .size   os_set_env, .-os_set_env\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n#      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .thumb_func\n        .type   _alloc_box, %function\n        .global _alloc_box\n_alloc_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R12,=rt_alloc_box\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        IT      NE\n        BXNE    R12\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        IT      EQ\n        BXEQ    R12\n        SVC     0\n        BX      LR\n\n        .fnend\n        .size   _alloc_box, .-_alloc_box\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n#       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .thumb_func\n        .type   _free_box, %function\n        .global _free_box\n_free_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R12,=rt_free_box\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        IT      NE\n        BXNE    R12\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        IT      EQ\n        BXEQ    R12\n        SVC     0\n        BX      LR\n\n        .fnend\n        .size   _free_box, .-_free_box\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n#       void SVC_Handler (void);\n\n        .thumb_func\n        .type   SVC_Handler, %function\n        .global SVC_Handler\nSVC_Handler:\n        .fnstart\n        .cantunwind\n\n        MRS     R0,PSP                  /* Read PSP */\n        LDR     R1,[R0,#24]             /* Read Saved PC from Stack */\n        LDRB    R1,[R1,#-2]             /* Load SVC Number */\n        CBNZ    R1,SVC_User\n\n        LDM     R0,{R0-R3,R12}          /* Read R0-R3,R12 from stack */\n        BLX     R12                     /* Call SVC Function */\n\n        MRS     R12,PSP                 /* Read PSP */\n        STM     R12,{R0-R2}             /* Store return values */\n\n        LDR     R3,=os_tsk\n        LDM     R3,{R1,R2}              /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     SVC_Exit                /* no task switch */\n\n        CBZ     R1,SVC_Next             /* Runtask deleted? */\n        STMDB   R12!,{R4-R11}           /* Save Old context */\n        STR     R12,[R1,#TCB_TSTACK]    /* Update os_tsk.run->tsk_stack */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\nSVC_Next:\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R12,[R2,#TCB_TSTACK]    /* os_tsk.new->tsk_stack */\n        LDMIA   R12!,{R4-R11}           /* Restore New Context */\n        MSR     PSP,R12                 /* Write PSP */\n\nSVC_Exit:\n        MVN     LR,#~0xFFFFFFFD         /* set EXC_RETURN value */\n        BX      LR\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        PUSH    {R4,LR}                 /* Save Registers */\n        LDR     R2,=SVC_Count\n        LDR     R2,[R2]\n        CMP     R1,R2\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table-4\n        LDR     R4,[R4,R1,LSL #2]       /* Load SVC Function Address */\n\n        LDM     R0,{R0-R3,R12}          /* Read R0-R3,R12 from stack */\n        BLX     R4                      /* Call SVC Function */\n\n        MRS     R12,PSP\n        STM     R12,{R0-R3}             /* Function return values */\nSVC_Done:\n        POP     {R4,PC}                 /* RETI */\n\n        .fnend\n        .size   SVC_Handler, .-SVC_Handler\n\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n#       void PendSV_Handler (void);\n\n        .thumb_func\n        .type   PendSV_Handler, %function\n        .global PendSV_Handler\n        .global Sys_Switch\nPendSV_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      rt_pop_req\n\nSys_Switch:\n        LDR     R3,=os_tsk\n        LDM     R3,{R1,R2}              /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     Sys_Exit\n\n        MRS     R12,PSP                 /* Read PSP */\n        STMDB   R12!,{R4-R11}           /* Save Old context */\n        STR     R12,[R1,#TCB_TSTACK]    /* Update os_tsk.run->tsk_stack */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R12,[R2,#TCB_TSTACK]    /* os_tsk.new->tsk_stack */\n        LDMIA   R12!,{R4-R11}           /* Restore New Context */\n        MSR     PSP,R12                 /* Write PSP */\n\nSys_Exit:\n        MVN     LR,#~0xFFFFFFFD         /* set EXC_RETURN value */\n        BX      LR                      /* Return to Thread Mode */\n\n        .fnend\n        .size   PendSV_Handler, .-PendSV_Handler\n\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n#       void SysTick_Handler (void);\n\n        .thumb_func\n        .type   SysTick_Handler, %function\n        .global SysTick_Handler\nSysTick_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      rt_systick\n        B       Sys_Switch\n\n        .fnend\n        .size   SysTick_Handler, .-SysTick_Handler\n\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n#       void OS_Tick_Handler (void);\n\n        .thumb_func\n        .type   OS_Tick_Handler, %function\n        .global OS_Tick_Handler\nOS_Tick_Handler:\n        .fnstart\n        .cantunwind\n\n        BL      os_tick_irqack\n        BL      rt_systick\n        B       Sys_Switch\n\n        .fnend\n        .size   OS_Tick_Handler, .-OS_Tick_Handler\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.60\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n        .file   \"SVC_Table.S\"\n\n\n        .section \".svc_table\"\n\n        .global  SVC_Table\nSVC_Table:\n/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */\n#       .long   __SVC_1                 /* user SVC function */\nSVC_End:\n\n        .global  SVC_Count\nSVC_Count:\n        .long   (SVC_End-SVC_Table)/4\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/HAL_CM3.S",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM3.S\n *      Purpose: Hardware Abstraction Layer for Cortex-M3\n *      Rev.:    V4.70\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        NAME    HAL_CM3.S\n\n        #define TCB_TSTACK 40\n\n        EXTERN  os_flags\n        EXTERN  os_tsk\n        EXTERN  rt_alloc_box\n        EXTERN  rt_free_box\n        EXTERN  rt_stk_check\n        EXTERN  rt_pop_req\n        EXTERN  rt_systick\n        EXTERN  os_tick_irqack\n        EXTERN  SVC_Table\n        EXTERN  SVC_Count\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        SECTION .text:CODE:NOROOT(2)\n        THUMB\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n;       void rt_set_PSP (U32 stack);\n\n        PUBLIC  rt_set_PSP\nrt_set_PSP:\n\n        MSR     PSP,R0\n        BX      LR\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n;       U32 rt_get_PSP (void);\n\n        PUBLIC  rt_get_PSP\nrt_get_PSP:\n\n        MRS     R0,PSP\n        BX      LR\n\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n;       void os_set_env (void);\n        /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n\n        PUBLIC  os_set_env\nos_set_env:\n\n        MOV     R0,SP                   /* PSP = MSP */\n        MSR     PSP,R0\n        LDR     R0,=os_flags\n        LDRB    R0,[R0]\n        LSLS    R0,#31\n        ITE     NE\n        MOVNE   R0,#0x02                /* Privileged Thread mode, use PSP */\n        MOVEQ   R0,#0x03                /* Unprivileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n;      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        PUBLIC  _alloc_box\n_alloc_box:\n\n        LDR     R12,=rt_alloc_box\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        IT      NE\n        BXNE    R12\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        IT      EQ\n        BXEQ    R12\n        SVC     0\n        BX      LR\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n;       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        PUBLIC  _free_box\n_free_box:\n\n        LDR     R12,=rt_free_box\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        IT      NE\n        BXNE    R12\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        IT      EQ\n        BXEQ    R12\n        SVC     0\n        BX      LR\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n;       void SVC_Handler (void);\n\n        PUBLIC  SVC_Handler\nSVC_Handler:\n\n        MRS     R0,PSP                  /* Read PSP */\n        LDR     R1,[R0,#24]             /* Read Saved PC from Stack */\n        LDRB    R1,[R1,#-2]             /* Load SVC Number */\n        CBNZ    R1,SVC_User\n\n        LDM     R0,{R0-R3,R12}          /* Read R0-R3,R12 from stack */\n        BLX     R12                     /* Call SVC Function */\n\n        MRS     R12,PSP                 /* Read PSP */\n        STM     R12,{R0-R2}             /* Store return values */\n\n        LDR     R3,=os_tsk\n        LDM     R3,{R1,R2}              /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     SVC_Exit                /* no task switch */\n\n        CBZ     R1,SVC_Next             /* Runtask deleted? */\n        STMDB   R12!,{R4-R11}           /* Save Old context */\n        STR     R12,[R1,#TCB_TSTACK]    /* Update os_tsk.run->tsk_stack */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\nSVC_Next:\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R12,[R2,#TCB_TSTACK]    /* os_tsk.new->tsk_stack */\n        LDMIA   R12!,{R4-R11}           /* Restore New Context */\n        MSR     PSP,R12                 /* Write PSP */\n\nSVC_Exit:\n        MVN     LR,#~0xFFFFFFFD         /* set EXC_RETURN value */\n        BX      LR\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        PUSH    {R4,LR}                 /* Save Registers */\n        LDR     R2,=SVC_Count\n        LDR     R2,[R2]\n        CMP     R1,R2\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table-4\n        LDR     R4,[R4,R1,LSL #2]       /* Load SVC Function Address */\n\n        LDM     R0,{R0-R3,R12}          /* Read R0-R3,R12 from stack */\n        BLX     R4                      /* Call SVC Function */\n\n        MRS     R12,PSP\n        STM     R12,{R0-R3}             /* Function return values */\nSVC_Done:\n        POP     {R4,PC}                 /* RETI */\n\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n;       void PendSV_Handler (void);\n\n        PUBLIC  PendSV_Handler\nPendSV_Handler:\n\n        BL      rt_pop_req\n\nSys_Switch:\n        LDR     R3,=os_tsk\n        LDM     R3,{R1,R2}              /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        BEQ     Sys_Exit\n\n        MRS     R12,PSP                 /* Read PSP */\n        STMDB   R12!,{R4-R11}           /* Save Old context */\n        STR     R12,[R1,#TCB_TSTACK]    /* Update os_tsk.run->tsk_stack */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R12,[R2,#TCB_TSTACK]    /* os_tsk.new->tsk_stack */\n        LDMIA   R12!,{R4-R11}           /* Restore New Context */\n        MSR     PSP,R12                 /* Write PSP */\n\nSys_Exit:\n        MVN     LR,#~0xFFFFFFFD         /* set EXC_RETURN value */\n        BX      LR                      /* Return to Thread Mode */\n\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n;       void SysTick_Handler (void);\n\n        PUBLIC  SysTick_Handler\nSysTick_Handler:\n\n        BL      rt_systick\n        B       Sys_Switch\n\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n;       void OS_Tick_Handler (void);\n\n        PUBLIC  OS_Tick_Handler\nOS_Tick_Handler:\n\n        BL      os_tick_irqack\n        BL      rt_systick\n        B       Sys_Switch\n\n\n        END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      CMSIS-RTOS  -  RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.70\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                NAME    SVC_TABLE\n                SECTION .text:CONST (2)\n\n                PUBLIC  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;               IMPORT  __SVC_1\n\n                PUBLIC  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;               DCD     __SVC_1                 ; user SVC function\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_ARM/HAL_CM4.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM4.C\n *      Purpose: Hardware Abstraction Layer for Cortex-M4\n *      Rev.:    V4.70\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n__asm void rt_set_PSP(U32 stack) { MSR PSP, R0 BX LR }\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n__asm U32 rt_get_PSP(void) { MRS R0, PSP BX LR }\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n__asm void os_set_env(void) {\n  /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n  MOV R0, SP;\n  PSP = MSP MSR PSP, R0 LDR R0, = __cpp(&os_flags) LDRB R0, [R0] LSLS R0,\n# 31 MOVNE R0, #0x02;\n  Privileged Thread mode, use PSP MOVEQ R0, #0x03;\n  Unprivileged Thread mode, use PSP MSR CONTROL,\n      R0 BX LR\n\n          ALIGN\n}\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n__asm void *_alloc_box(void *box_mem) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  LDR R12, = __cpp(rt_alloc_box) MRS R3, IPSR LSLS R3, #24 BXNE R12 MRS R3,\n      CONTROL LSLS R3,\n# 31 BXEQ R12 SVC 0 BX LR\n\n      ALIGN\n}\n\n/*--------------------------- _free_box -------------------------------------*/\n\n__asm int _free_box(void *box_mem, void *box) {\n  /* Function wrapper for Unprivileged/Privileged mode. */\n  LDR R12, = __cpp(rt_free_box) MRS R3, IPSR LSLS R3, #24 BXNE R12 MRS R3,\n      CONTROL LSLS R3,\n# 31 BXEQ R12 SVC 0 BX LR\n\n      ALIGN\n}\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n__asm void SVC_Handler(void) {\n  PRESERVE8\n\n  IMPORT SVC_Count IMPORT SVC_Table IMPORT rt_stk_check\n\n#ifdef IFX_XMC4XXX\n      EXPORT SVC_Handler_Veneer SVC_Handler_Veneer\n#endif\n\n          MRS R0,\n      PSP;\n  Read PSP LDR R1, [ R0, #24 ];\n  Read Saved PC from Stack LDRB R1, [ R1, # - 2 ];\n  Load SVC Number CBNZ R1,\n      SVC_User\n\n          LDM R0,\n      {R0 - R3, R12};\n  Read R0 - R3, R12 from stack PUSH{R4, LR};\n  Save EXC_RETURN BLX R12;\n  Call SVC Function POP{R4, LR};\n  Restore EXC_RETURN\n\n      MRS R12,\n      PSP;\n  Read PSP STM R12, {R0 - R2};\n  Store return values\n\n      LDR R3,\n      = __cpp(&os_tsk) LDM R3, {R1, R2};\n  os_tsk.run, os_tsk.new CMP R1,\n      R2\n#ifdef IFX_XMC4XXX\n          PUSHEQ{LR} POPEQ {\n    PC\n  }\n#else\n          BXEQ LR;\n  RETI, no task switch\n#endif\n\n  CBZ R1, SVC_Next;\n  Runtask deleted      ? TST LR, #0x10;\n  is it extended frame ? VSTMDBEQ R12 !, {S16 - S31};\n  yes, stack also VFP hi - regs MOVEQ R0, #0x01;\n  os_tsk->stack_frame val MOVNE R0, #0x00 STRB R0, [ R1, #TCB_STACKF ];\n  os_tsk.run->stack_frame = val STMDB R12 !, {R4 - R11};\n  Save Old context STR R12, [ R1, #TCB_TSTACK ];\n  Update os_tsk.run->tsk_stack\n\n      PUSH{R2, R3} BL rt_stk_check; Check for Stack overflow\n        POP     {R2,R3}\n\nSVC_Next\n        STR     R2,[R3]                 ;\n  os_tsk.run = os_tsk.new\n\n               LDR R12,\n  [ R2, #TCB_TSTACK ];\n  os_tsk.new->tsk_stack LDMIA R12 !, {R4 - R11};\n  Restore New Context LDRB R0, [ R2, #TCB_STACKF ];\n  Stack Frame CMP R0, #0;\n  Basic / Extended Stack Frame VLDMIANE R12 !, {S16 - S31};\n  restore VFP hi - registers MVNNE LR, # : NOT : 0xFFFFFFED;\n  set EXC_RETURN value MVNEQ LR, # : NOT : 0xFFFFFFFD MSR PSP, R12;\n  Write PSP\n\n      SVC_Exit\n#ifdef IFX_XMC4XXX\n          PUSH{LR} POP {\n    PC\n  }\n#else\n          BX LR\n#endif\n\n  /*------------------- User SVC ------------------------------*/\n\n  SVC_User PUSH{R4, LR};\n  Save Registers LDR R2, = SVC_Count LDR R2, [R2] CMP R1, R2 BHI SVC_Done;\n  Overflow\n\n      LDR R4,\n      = SVC_Table - 4 LDR R4, [ R4, R1, LSL #2 ];\n  Load SVC Function Address\n\n      LDM R0,\n      {R0 - R3, R12};\n  Read R0 - R3, R12 from stack BLX R4;\n  Call SVC Function\n\n      MRS R12,\n      PSP STM R12, {R0 - R3};\n  Function return values SVC_Done POP{R4, PC};\n  RETI\n\n      ALIGN\n}\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n__asm void PendSV_Handler(void) {\n  PRESERVE8\n\n#ifdef IFX_XMC4XXX\n  EXPORT PendSV_Handler_Veneer PendSV_Handler_Veneer\n#endif\n\n      PUSH{R4, LR};\n  Save EXC_RETURN BL __cpp(rt_pop_req)\n\n      Sys_Switch POP{R4, LR};\n  Restore EXC_RETURN\n\n      LDR R3,\n      = __cpp(&os_tsk) LDM R3, {R1, R2};\n  os_tsk.run, os_tsk.new CMP R1,\n      R2\n#ifdef IFX_XMC4XXX\n          PUSHEQ{LR} POPEQ {\n    PC\n  }\n#else\n          BXEQ LR;\n  RETI, no task switch\n#endif\n\n  MRS R12, PSP;\n  Read PSP TST LR, #0x10;\n  is it extended frame ? VSTMDBEQ R12 !, {S16 - S31};\n  yes, stack also VFP hi - regs MOVEQ R0, #0x01;\n  os_tsk->stack_frame val MOVNE R0, #0x00 STRB R0, [ R1, #TCB_STACKF ];\n  os_tsk.run->stack_frame = val STMDB R12 !, {R4 - R11};\n  Save Old context STR R12, [ R1, #TCB_TSTACK ];\n  Update os_tsk.run->tsk_stack\n\n      PUSH{R2, R3} BL rt_stk_check; Check for Stack overflow\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 ;\n  os_tsk.run = os_tsk.new\n\n               LDR R12,\n  [ R2, #TCB_TSTACK ];\n  os_tsk.new->tsk_stack LDMIA R12 !, {R4 - R11};\n  Restore New Context LDRB R0, [ R2, #TCB_STACKF ];\n  Stack Frame CMP R0, #0;\n  Basic / Extended Stack Frame VLDMIANE R12 !, {S16 - S31};\n  restore VFP hi - regs MVNNE LR, # : NOT : 0xFFFFFFED;\n  set EXC_RETURN value MVNEQ LR, # : NOT : 0xFFFFFFFD MSR PSP, R12;\n  Write PSP\n\n      Sys_Exit\n#ifdef IFX_XMC4XXX\n          PUSH{LR} POP {\n    PC\n  }\n#else\n          BX LR;\n  Return to Thread Mode\n#endif\n\n  ALIGN\n}\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n__asm void SysTick_Handler(void) {\n  PRESERVE8\n\n#ifdef IFX_XMC4XXX\n  EXPORT SysTick_Handler_Veneer SysTick_Handler_Veneer\n#endif\n\n      PUSH{R4, LR};\n  Save EXC_RETURN BL __cpp(rt_systick) B Sys_Switch\n\n      ALIGN\n}\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n__asm void OS_Tick_Handler(void) {\n  PRESERVE8\n\n  PUSH{R4, LR};\n  Save EXC_RETURN BL __cpp(os_tick_irqack) BL __cpp(rt_systick) B Sys_Switch\n\n      ALIGN\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_ARM/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.70\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                AREA    SVC_TABLE, CODE, READONLY\n\n                EXPORT  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;               IMPORT  __SVC_1\n\n                EXPORT  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;               DCD     __SVC_1                 ; user SVC function\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.S",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM4.S\n *      Purpose: Hardware Abstraction Layer for Cortex-M4\n *      Rev.:    V4.70\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        #include \"cmsis.h\"\n\n        .file   \"HAL_CM4.S\"\n        .syntax unified\n\n        .equ    TCB_STACKF, 32\n        .equ    TCB_TSTACK, 40\n\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        .thumb\n\n        .section \".text\"\n        .align  2\n\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n#       void rt_set_PSP (U32 stack);\n\n        .thumb_func\n        .type   rt_set_PSP, %function\n        .global rt_set_PSP\nrt_set_PSP:\n        .fnstart\n        .cantunwind\n\n        MSR     PSP,R0\n        BX      LR\n\n        .fnend\n        .size   rt_set_PSP, .-rt_set_PSP\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n#       U32 rt_get_PSP (void);\n\n        .thumb_func\n        .type   rt_get_PSP, %function\n        .global rt_get_PSP\nrt_get_PSP:\n        .fnstart\n        .cantunwind\n\n        MRS     R0,PSP\n        BX      LR\n\n        .fnend\n        .size   rt_get_PSP, .-rt_get_PSP\n\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n#       void os_set_env (void);\n        /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n\n        .thumb_func\n        .type   os_set_env, %function\n        .global os_set_env\nos_set_env:\n        .fnstart\n        .cantunwind\n\n        MOV     R0,SP                   /* PSP = MSP */\n        MSR     PSP,R0\n        LDR     R0,=os_flags\n        LDRB    R0,[R0]\n        LSLS    R0,#31\n        ITE     NE\n        MOVNE   R0,#0x02                /* Privileged Thread mode, use PSP */\n        MOVEQ   R0,#0x03                /* Unprivileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\n\n        .fnend\n        .size   os_set_env, .-os_set_env\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n#      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .thumb_func\n        .type   _alloc_box, %function\n        .global _alloc_box\n_alloc_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R12,=rt_alloc_box\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        IT      NE\n        BXNE    R12\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        IT      EQ\n        BXEQ    R12\n        SVC     0\n        BX      LR\n\n        .fnend\n        .size   _alloc_box, .-_alloc_box\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n#       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        .thumb_func\n        .type   _free_box, %function\n        .global _free_box\n_free_box:\n        .fnstart\n        .cantunwind\n\n        LDR     R12,=rt_free_box\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        IT      NE\n        BXNE    R12\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        IT      EQ\n        BXEQ    R12\n        SVC     0\n        BX      LR\n\n        .fnend\n        .size   _free_box, .-_free_box\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n#       void SVC_Handler (void);\n\n        .thumb_func\n        .type   SVC_Handler, %function\n        .global SVC_Handler\nSVC_Handler:\n        .ifdef  IFX_XMC4XXX\n        .global SVC_Handler_Veneer\nSVC_Handler_Veneer:\n        .endif\n        .fnstart\n        .cantunwind\n\n        MRS     R0,PSP                  /* Read PSP */\n        LDR     R1,[R0,#24]             /* Read Saved PC from Stack */\n        LDRB    R1,[R1,#-2]             /* Load SVC Number */\n        CBNZ    R1,SVC_User\n\n        LDM     R0,{R0-R3,R12}          /* Read R0-R3,R12 from stack */\n        PUSH    {R4,LR}                 /* Save EXC_RETURN */\n        BLX     R12                     /* Call SVC Function */\n        POP     {R4,LR}                 /* Restore EXC_RETURN */\n\n        MRS     R12,PSP                 /* Read PSP */\n        STM     R12,{R0-R2}             /* Store return values */\n\n        LDR     R3,=os_tsk\n        LDM     R3,{R1,R2}              /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        .ifdef  IFX_XMC4XXX\n        ITT     EQ\n        PUSHEQ  {LR}\n        POPEQ   {PC}\n        .else\n        IT      EQ\n        BXEQ    LR                      /* RETI, no task switch */\n        .endif\n\n        CBNZ    R1,SVC_ContextSave      /* Runtask not deleted? */\n\n        #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\n        TST     LR,#0x10                /* is it extended frame? */\n        BNE     SVC_ContextRestore\n        LDR     R1,=0xE000EF34\n        LDR     R0,[R1]                 /* Load FPCCR */\n        BIC     R0,#1                   /* Clear LSPACT (Lazy state) */\n        STR     R0,[R1]                 /* Store FPCCR */\n        #endif\n        B       SVC_ContextRestore\n\nSVC_ContextSave:\n        TST     LR,#0x10                /* is it extended frame? */\n        #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\n        ITTE    EQ\n        VSTMDBEQ R12!,{S16-S31}         /* yes, stack also VFP hi-regs */\n        #else\n        ITE    EQ\n        #endif\n        MOVEQ   R0,#0x01                /* os_tsk->stack_frame val */\n        MOVNE   R0,#0x00\n        STRB    R0,[R1,#TCB_STACKF]     /* os_tsk.run->stack_frame = val */\n        STMDB   R12!,{R4-R11}           /* Save Old context */\n        STR     R12,[R1,#TCB_TSTACK]    /* Update os_tsk.run->tsk_stack */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\nSVC_ContextRestore:\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R12,[R2,#TCB_TSTACK]    /* os_tsk.new->tsk_stack */\n        LDMIA   R12!,{R4-R11}           /* Restore New Context */\n        LDRB    R0,[R2,#TCB_STACKF]     /* Stack Frame */\n        CMP     R0,#0                   /* Basic/Extended Stack Frame */\n        #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\n        ITTE    NE\n        VLDMIANE R12!,{S16-S31}         /* restore VFP hi-registers */\n        #else\n        ITE    NE\n        #endif\n        MVNNE   LR,#~0xFFFFFFED         /* set EXC_RETURN value */\n        MVNEQ   LR,#~0xFFFFFFFD\n        MSR     PSP,R12                 /* Write PSP */\n\nSVC_Exit:\n        .ifdef  IFX_XMC4XXX\n        PUSH    {LR}\n        POP     {PC}\n        .else\n        BX      LR\n        .endif\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        PUSH    {R4,LR}                 /* Save Registers */\n        LDR     R2,=SVC_Count\n        LDR     R2,[R2]\n        CMP     R1,R2\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table-4\n        LDR     R4,[R4,R1,LSL #2]       /* Load SVC Function Address */\n\n        LDM     R0,{R0-R3,R12}          /* Read R0-R3,R12 from stack */\n        BLX     R4                      /* Call SVC Function */\n\n        MRS     R12,PSP\n        STM     R12,{R0-R3}             /* Function return values */\nSVC_Done:\n        POP     {R4,PC}                 /* RETI */\n\n        .fnend\n        .size   SVC_Handler, .-SVC_Handler\n\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n#       void PendSV_Handler (void);\n\n        .thumb_func\n        .type   PendSV_Handler, %function\n        .global PendSV_Handler\n        .global Sys_Switch\nPendSV_Handler:\n        .ifdef  IFX_XMC4XXX\n        .global PendSV_Handler_Veneer\nPendSV_Handler_Veneer:\n        .endif\n        .fnstart\n        .cantunwind\n\n        PUSH    {R4,LR}                 /* Save EXC_RETURN */\n        BL      rt_pop_req\n\nSys_Switch:\n        POP     {R4,LR}                 /* Restore EXC_RETURN */\n\n        LDR     R3,=os_tsk\n        LDM     R3,{R1,R2}              /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n        .ifdef  IFX_XMC4XXX\n        ITT     EQ\n        PUSHEQ  {LR}\n        POPEQ   {PC}\n        .else\n        IT      EQ\n        BXEQ    LR                      /* RETI, no task switch */\n        .endif\n\n        MRS     R12,PSP                 /* Read PSP */\n        TST     LR,#0x10                /* is it extended frame? */\n        #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\n        ITTE    EQ\n        VSTMDBEQ R12!,{S16-S31}         /* yes, stack also VFP hi-regs */\n        #else\n        ITE    EQ\n        #endif\n        MOVEQ   R0,#0x01                /* os_tsk->stack_frame val */\n        MOVNE   R0,#0x00\n        STRB    R0,[R1,#TCB_STACKF]     /* os_tsk.run->stack_frame = val */\n        STMDB   R12!,{R4-R11}           /* Save Old context */\n        STR     R12,[R1,#TCB_TSTACK]    /* Update os_tsk.run->tsk_stack */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R12,[R2,#TCB_TSTACK]    /* os_tsk.new->tsk_stack */\n        LDMIA   R12!,{R4-R11}           /* Restore New Context */\n        LDRB    R0,[R2,#TCB_STACKF]     /* Stack Frame */\n        CMP     R0,#0                   /* Basic/Extended Stack Frame */\n        #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\n        ITTE    NE\n        VLDMIANE R12!,{S16-S31}         /* restore VFP hi-registers */\n        #else\n        ITE    NE\n        #endif\n        MVNNE   LR,#~0xFFFFFFED         /* set EXC_RETURN value */\n        MVNEQ   LR,#~0xFFFFFFFD\n        MSR     PSP,R12                 /* Write PSP */\n\nSys_Exit:\n        .ifdef  IFX_XMC4XXX\n        PUSH    {LR}\n        POP     {PC}\n        .else\n        BX      LR                      /* Return to Thread Mode */\n        .endif\n\n        .fnend\n        .size   PendSV_Handler, .-PendSV_Handler\n\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n#       void SysTick_Handler (void);\n\n        .thumb_func\n        .type   SysTick_Handler, %function\n        .global SysTick_Handler\nSysTick_Handler:\n        .ifdef  IFX_XMC4XXX\n        .global SysTick_Handler_Veneer\nSysTick_Handler_Veneer:\n        .endif\n        .fnstart\n        .cantunwind\n\n        PUSH    {R4,LR}                 /* Save EXC_RETURN */\n        BL      rt_systick\n        B       Sys_Switch\n\n        .fnend\n        .size   SysTick_Handler, .-SysTick_Handler\n\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n#       void OS_Tick_Handler (void);\n\n        .thumb_func\n        .type   OS_Tick_Handler, %function\n        .global OS_Tick_Handler\nOS_Tick_Handler:\n        .fnstart\n        .cantunwind\n\n        PUSH    {R4,LR}                 /* Save EXC_RETURN */\n        BL      os_tick_irqack\n        BL      rt_systick\n        B       Sys_Switch\n\n        .fnend\n        .size   OS_Tick_Handler, .-OS_Tick_Handler\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      RL-ARM - RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.70\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n        .file   \"SVC_Table.S\"\n\n\n        .section \".svc_table\"\n\n        .global  SVC_Table\nSVC_Table:\n/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */\n#       .long   __SVC_1                 /* user SVC function */\nSVC_End:\n\n        .global  SVC_Count\nSVC_Count:\n        .long   (SVC_End-SVC_Table)/4\n\n\n        .end\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_IAR/HAL_CM4.S",
    "content": "/*----------------------------------------------------------------------------\n *      CMSIS-RTOS  -  RTX\n *----------------------------------------------------------------------------\n *      Name:    HAL_CM4.S\n *      Purpose: Hardware Abstraction Layer for Cortex-M4\n *      Rev.:    V4.70\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n        NAME    HAL_CM4.S\n\n        #define TCB_STACKF 32\n        #define TCB_TSTACK 40\n\n        EXTERN  os_flags\n        EXTERN  os_tsk\n        EXTERN  rt_alloc_box\n        EXTERN  rt_free_box\n        EXTERN  rt_stk_check\n        EXTERN  rt_pop_req\n        EXTERN  rt_systick\n        EXTERN  os_tick_irqack\n        EXTERN  SVC_Table\n        EXTERN  SVC_Count\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n        SECTION .text:CODE:NOROOT(2)\n        THUMB\n\n/*--------------------------- rt_set_PSP ------------------------------------*/\n\n;       void rt_set_PSP (U32 stack);\n\n        PUBLIC  rt_set_PSP\nrt_set_PSP:\n\n        MSR     PSP,R0\n        BX      LR\n\n\n/*--------------------------- rt_get_PSP ------------------------------------*/\n\n;       U32 rt_get_PSP (void);\n\n        PUBLIC  rt_get_PSP\nrt_get_PSP:\n\n        MRS     R0,PSP\n        BX      LR\n\n\n/*--------------------------- os_set_env ------------------------------------*/\n\n;       void os_set_env (void);\n        /* Switch to Unprivileged/Privileged Thread mode, use PSP. */\n\n        PUBLIC  os_set_env\nos_set_env:\n\n        MOV     R0,SP                   /* PSP = MSP */\n        MSR     PSP,R0\n        LDR     R0,=os_flags\n        LDRB    R0,[R0]\n        LSLS    R0,#31\n        ITE     NE\n        MOVNE   R0,#0x02                /* Privileged Thread mode, use PSP */\n        MOVEQ   R0,#0x03                /* Unprivileged Thread mode, use PSP */\n        MSR     CONTROL,R0\n        BX      LR\n\n\n/*--------------------------- _alloc_box ------------------------------------*/\n\n;      void *_alloc_box (void *box_mem);\n       /* Function wrapper for Unprivileged/Privileged mode. */\n\n        PUBLIC  _alloc_box\n_alloc_box:\n\n        LDR     R12,=rt_alloc_box\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        IT      NE\n        BXNE    R12\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        IT      EQ\n        BXEQ    R12\n        SVC     0\n        BX      LR\n\n\n/*--------------------------- _free_box -------------------------------------*/\n\n;       int _free_box (void *box_mem, void *box);\n        /* Function wrapper for Unprivileged/Privileged mode. */\n\n        PUBLIC  _free_box\n_free_box:\n\n        LDR     R12,=rt_free_box\n        MRS     R3,IPSR\n        LSLS    R3,#24\n        IT      NE\n        BXNE    R12\n        MRS     R3,CONTROL\n        LSLS    R3,#31\n        IT      EQ\n        BXEQ    R12\n        SVC     0\n        BX      LR\n\n\n/*-------------------------- SVC_Handler ------------------------------------*/\n\n;       void SVC_Handler (void);\n\n        PUBLIC  SVC_Handler\nSVC_Handler:\n\n#ifdef IFX_XMC4XXX\n        PUBLIC  SVC_Handler_Veneer\nSVC_Handler_Veneer:\n#endif\n\n        MRS     R0,PSP                  /* Read PSP */\n        LDR     R1,[R0,#24]             /* Read Saved PC from Stack */\n        LDRB    R1,[R1,#-2]             /* Load SVC Number */\n        CBNZ    R1,SVC_User\n\n        LDM     R0,{R0-R3,R12}          /* Read R0-R3,R12 from stack */\n        PUSH    {R4,LR}                 /* Save EXC_RETURN */\n        BLX     R12                     /* Call SVC Function */\n        POP     {R4,LR}                 /* Restore EXC_RETURN */\n\n        MRS     R12,PSP                 /* Read PSP */\n        STM     R12,{R0-R2}             /* Store return values */\n\n        LDR     R3,=os_tsk\n        LDM     R3,{R1,R2}              /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n#ifdef  IFX_XMC4XXX\n        ITT      EQ\n        PUSHEQ  {LR}\n        POPEQ   {PC}\n#else\n        IT      EQ\n        BXEQ    LR                      /* RETI, no task switch */\n#endif\n\n        CBZ     R1,SVC_Next             /* Runtask deleted? */\n        TST     LR,#0x10                /* is it extended frame? */\n        ITTE    EQ\n        VSTMDBEQ R12!,{S16-S31}         /* yes, stack also VFP hi-regs */\n        MOVEQ   R0,#0x01                /* os_tsk->stack_frame val */\n        MOVNE   R0,#0x00\n        STRB    R0,[R1,#TCB_STACKF]     /* os_tsk.run->stack_frame = val */\n        STMDB   R12!,{R4-R11}           /* Save Old context */\n        STR     R12,[R1,#TCB_TSTACK]    /* Update os_tsk.run->tsk_stack */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\nSVC_Next:\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R12,[R2,#TCB_TSTACK]    /* os_tsk.new->tsk_stack */\n        LDMIA   R12!,{R4-R11}           /* Restore New Context */\n        LDRB    R0,[R2,#TCB_STACKF]     /* Stack Frame */\n        CMP     R0,#0                   /* Basic/Extended Stack Frame */\n        ITTE    NE\n        VLDMIANE R12!,{S16-S31}         /* restore VFP hi-registers */\n        MVNNE   LR,#~0xFFFFFFED         /* set EXC_RETURN value */\n        MVNEQ   LR,#~0xFFFFFFFD\n        MSR     PSP,R12                 /* Write PSP */\n\nSVC_Exit:\n#ifdef  IFX_XMC4XXX\n        PUSH    {LR}\n        POP     {PC}\n#else\n        BX      LR\n#endif\n\n        /*------------------- User SVC ------------------------------*/\n\nSVC_User:\n        PUSH    {R4,LR}                 /* Save Registers */\n        LDR     R2,=SVC_Count\n        LDR     R2,[R2]\n        CMP     R1,R2\n        BHI     SVC_Done                /* Overflow */\n\n        LDR     R4,=SVC_Table-4\n        LDR     R4,[R4,R1,LSL #2]       /* Load SVC Function Address */\n\n        LDM     R0,{R0-R3,R12}          /* Read R0-R3,R12 from stack */\n        BLX     R4                      /* Call SVC Function */\n\n        MRS     R12,PSP\n        STM     R12,{R0-R3}             /* Function return values */\nSVC_Done:\n        POP     {R4,PC}                 /* RETI */\n\n\n/*-------------------------- PendSV_Handler ---------------------------------*/\n\n;       void PendSV_Handler (void);\n\n        PUBLIC  PendSV_Handler\nPendSV_Handler:\n\n#ifdef  IFX_XMC4XXX\n        PUBLIC  PendSV_Handler_Veneer\nPendSV_Handler_Veneer:\n#endif\n\n        PUSH    {R4,LR}                 /* Save EXC_RETURN */\n        BL      rt_pop_req\n\nSys_Switch:\n        POP     {R4,LR}                 /* Restore EXC_RETURN */\n\n        LDR     R3,=os_tsk\n        LDM     R3,{R1,R2}              /* os_tsk.run, os_tsk.new */\n        CMP     R1,R2\n#ifdef  IFX_XMC4XXX\n        ITT     EQ\n        PUSHEQ  {LR}\n        POPEQ   {PC}\n#else\n        IT      EQ\n        BXEQ    LR                      /* RETI, no task switch */\n#endif\n\n        MRS     R12,PSP                 /* Read PSP */\n        TST     LR,#0x10                /* is it extended frame? */\n        ITTE    EQ\n        VSTMDBEQ R12!,{S16-S31}         /* yes, stack also VFP hi-regs */\n        MOVEQ   R0,#0x01                /* os_tsk->stack_frame val */\n        MOVNE   R0,#0x00\n        STRB    R0,[R1,#TCB_STACKF]     /* os_tsk.run->stack_frame = val */\n        STMDB   R12!,{R4-R11}           /* Save Old context */\n        STR     R12,[R1,#TCB_TSTACK]    /* Update os_tsk.run->tsk_stack */\n\n        PUSH    {R2,R3}\n        BL      rt_stk_check            /* Check for Stack overflow */\n        POP     {R2,R3}\n\n        STR     R2,[R3]                 /* os_tsk.run = os_tsk.new */\n\n        LDR     R12,[R2,#TCB_TSTACK]    /* os_tsk.new->tsk_stack */\n        LDMIA   R12!,{R4-R11}           /* Restore New Context */\n        LDRB    R0,[R2,#TCB_STACKF]     /* Stack Frame */\n        CMP     R0,#0                   /* Basic/Extended Stack Frame */\n        ITTE    NE\n        VLDMIANE R12!,{S16-S31}         /* restore VFP hi-registers */\n        MVNNE   LR,#~0xFFFFFFED         /* set EXC_RETURN value */\n        MVNEQ   LR,#~0xFFFFFFFD\n        MSR     PSP,R12                 /* Write PSP */\n\nSys_Exit:\n#ifdef  IFX_XMC4XXX\n        PUSH    {LR}\n        POP     {PC}\n#else\n        BX      LR                      /* Return to Thread Mode */\n#endif\n\n\n/*-------------------------- SysTick_Handler --------------------------------*/\n\n;       void SysTick_Handler (void);\n\n        PUBLIC  SysTick_Handler\nSysTick_Handler:\n#ifdef  IFX_XMC4XXX\n        PUBLIC  SysTick_Handler_Veneer\nSysTick_Handler_Veneer:\n#endif\n\n        PUSH    {R4,LR}                 /* Save EXC_RETURN */\n        BL      rt_systick\n        B       Sys_Switch\n\n\n/*-------------------------- OS_Tick_Handler --------------------------------*/\n\n;       void OS_Tick_Handler (void);\n\n        PUBLIC  OS_Tick_Handler\nOS_Tick_Handler:\n\n        PUSH    {R4,LR}                 /* Save EXC_RETURN */\n        BL      os_tick_irqack\n        BL      rt_systick\n        B       Sys_Switch\n\n\n        END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_IAR/SVC_Table.S",
    "content": ";/*----------------------------------------------------------------------------\n; *      CMSIS-RTOS  -  RTX\n; *----------------------------------------------------------------------------\n; *      Name:    SVC_TABLE.S\n; *      Purpose: Pre-defined SVC Table for Cortex-M\n; *      Rev.:    V4.70\n; *----------------------------------------------------------------------------\n; *\n; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH\n; * All rights reserved.\n; * Redistribution and use in source and binary forms, with or without\n; * modification, are permitted provided that the following conditions are met:\n; *  - Redistributions of source code must retain the above copyright\n; *    notice, this list of conditions and the following disclaimer.\n; *  - Redistributions in binary form must reproduce the above copyright\n; *    notice, this list of conditions and the following disclaimer in the\n; *    documentation and/or other materials provided with the distribution.\n; *  - Neither the name of ARM  nor the names of its contributors may be used\n; *    to endorse or promote products derived from this software without\n; *    specific prior written permission.\n; *\n; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n; * POSSIBILITY OF SUCH DAMAGE.\n; *---------------------------------------------------------------------------*/\n\n\n                NAME    SVC_TABLE\n                SECTION .text:CONST (2)\n\n                PUBLIC  SVC_Count\n\nSVC_Cnt         EQU    (SVC_End-SVC_Table)/4\nSVC_Count       DCD     SVC_Cnt\n\n; Import user SVC functions here.\n;               IMPORT  __SVC_1\n\n                PUBLIC  SVC_Table\nSVC_Table\n; Insert user SVC functions here. SVC 0 used by RTL Kernel.\n;               DCD     __SVC_1                 ; user SVC function\n\nSVC_End\n\n                END\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_CMSIS.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    rt_CMSIS.c\n *      Purpose: CMSIS RTOS API\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#define __CMSIS_GENERIC\n\n#include \"cmsis.h\"\n\n#include \"RTX_Conf.h\"\n#include \"rt_Event.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Mailbox.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_Mutex.h\"\n#include \"rt_Semaphore.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n#define os_thread_cb OS_TCB\n\n#include \"cmsis_os.h\"\n\n#if (osFeature_Signals != 16)\n#error Invalid \"osFeature_Signals\" value!\n#endif\n#if (osFeature_Semaphore > 65535)\n#error Invalid \"osFeature_Semaphore\" value!\n#endif\n#if (osFeature_Wait != 0)\n#error osWait not supported!\n#endif\n\n// OS_API_IN_INTLOCK can be enabled in target.mk by:\n// export OS_API_IN_INTLOCK ?= 1\n\n#ifdef OS_API_IN_INTLOCK\n// CAUTION:\n// It will be treated as in ISR when calling OS APIs in intlock(), but\n// the stack might still be using PSP instead of MSP.\n#define IN_ISR() (__get_IPSR() != 0 || __get_PRIMASK() != 0)\n#else\n#define IN_ISR() (__get_IPSR() != 0)\n#endif\n\n// ==== Enumeration, structures, defines ====\n\n// Service Calls defines\n\n#if defined(__CC_ARM) /* ARM Compiler */\n\n#define __NO_RETURN __declspec(noreturn)\n\n#define osEvent_type osEvent\n#define osEvent_ret_status ret\n#define osEvent_ret_value ret\n#define osEvent_ret_msg ret\n#define osEvent_ret_mail ret\n\n#define osCallback_type osCallback\n#define osCallback_ret ret\n\n#define SVC_0_1(f, t, ...)                                                     \\\n  __svc_indirect(0) t _##f(t (*)());                                           \\\n  t f(void);                                                                   \\\n  __attribute__((always_inline)) static __inline t __##f(void) {               \\\n    return _##f(f);                                                            \\\n  }\n\n#define SVC_1_1(f, t, t1, ...)                                                 \\\n  __svc_indirect(0) t _##f(t (*)(t1), t1);                                     \\\n  t f(t1 a1);                                                                  \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1) {              \\\n    return _##f(f, a1);                                                        \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, ...)                                             \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2), t1, t2);                             \\\n  t f(t1 a1, t2 a2);                                                           \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2) {       \\\n    return _##f(f, a1, a2);                                                    \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, ...)                                         \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2, t3), t1, t2, t3);                     \\\n  t f(t1 a1, t2 a2, t3 a3);                                                    \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2,         \\\n                                                         t3 a3) {              \\\n    return _##f(f, a1, a2, a3);                                                \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, ...)                                     \\\n  __svc_indirect(0) t _##f(t (*)(t1, t2, t3, t4), t1, t2, t3, t4);             \\\n  t f(t1 a1, t2 a2, t3 a3, t4 a4);                                             \\\n  __attribute__((always_inline)) static __inline t __##f(t1 a1, t2 a2, t3 a3,  \\\n                                                         t4 a4) {              \\\n    return _##f(f, a1, a2, a3, a4);                                            \\\n  }\n\n#define SVC_1_2 SVC_1_1\n#define SVC_1_3 SVC_1_1\n#define SVC_2_3 SVC_2_1\n\n#elif defined(__GNUC__) /* GNU Compiler */\n\n//#define __NO_RETURN __attribute__((noreturn))\n\ntypedef uint32_t __attribute__((vector_size(8))) ret64;\ntypedef uint32_t __attribute__((vector_size(16))) ret128;\n\n#define RET_pointer __r0\n#define RET_int32_t __r0\n#define RET_osStatus __r0\n#define RET_osPriority __r0\n#define RET_osEvent                                                            \\\n  {                                                                            \\\n    (osStatus) __r0, {(uint32_t)__r1}, { (void *)__r2 }                        \\\n  }\n#define RET_osCallback                                                         \\\n  { (void *)__r0, (void *)__r1 }\n\n#define osEvent_type __attribute__((pcs(\"aapcs\"))) ret128\n#define osEvent_ret_status                                                     \\\n  (ret128) { ret.status }\n#define osEvent_ret_value                                                      \\\n  (ret128) { ret.status, ret.value.v }\n#define osEvent_ret_msg                                                        \\\n  (ret128) { ret.status, ret.value.v, (uint32_t)ret.def.message_id }\n#define osEvent_ret_mail                                                       \\\n  (ret128) { ret.status, ret.value.v, (uint32_t)ret.def.mail_id }\n\n#define osCallback_type __attribute__((pcs(\"aapcs\"))) ret64\n#define osCallback_ret                                                         \\\n  (ret64) { (uint32_t) ret.fp, (uint32_t)ret.arg }\n\n#define SVC_ArgN(n) register int __r##n __asm(\"r\" #n);\n\n#define SVC_ArgR(n, t, a) register t __r##n __asm(\"r\" #n) = a;\n\n#define SVC_Arg0() SVC_ArgN(0) SVC_ArgN(1) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg1(t1) SVC_ArgR(0, t1, a1) SVC_ArgN(1) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg2(t1, t2)                                                       \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgN(2) SVC_ArgN(3)\n\n#define SVC_Arg3(t1, t2, t3)                                                   \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgR(2, t3, a3) SVC_ArgN(3)\n\n#define SVC_Arg4(t1, t2, t3, t4)                                               \\\n  SVC_ArgR(0, t1, a1) SVC_ArgR(1, t2, a2) SVC_ArgR(2, t3, a3)                  \\\n      SVC_ArgR(3, t4, a4)\n\n#if (defined(__CORTEX_M0)) || defined(__CORTEX_M0PLUS)\n#define SVC_Call(f)                                                            \\\n  __asm volatile(\"ldr r7,=\" #f \"\\n\\t\"                                          \\\n                 \"mov r12,r7\\n\\t\"                                              \\\n                 \"svc 0\"                                                       \\\n                 : \"=r\"(__r0), \"=r\"(__r1), \"=r\"(__r2), \"=r\"(__r3)              \\\n                 : \"r\"(__r0), \"r\"(__r1), \"r\"(__r2), \"r\"(__r3)                  \\\n                 : \"r7\", \"r12\", \"lr\", \"cc\");\n#else\n#define SVC_Call(f)                                                            \\\n  __asm volatile(\"ldr r12,=\" #f \"\\n\\t\"                                         \\\n                 \"svc 0\"                                                       \\\n                 : \"=r\"(__r0), \"=r\"(__r1), \"=r\"(__r2), \"=r\"(__r3)              \\\n                 : \"r\"(__r0), \"r\"(__r1), \"r\"(__r2), \"r\"(__r3)                  \\\n                 : \"r12\", \"lr\", \"cc\");\n#endif\n\n#define SVC_0_1(f, t, rv)                                                      \\\n  __attribute__((always_inline)) static inline t __##f(void) {                 \\\n    SVC_Arg0();                                                                \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_1_1(f, t, t1, rv)                                                  \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1) {                \\\n    SVC_Arg1(t1);                                                              \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, rv)                                              \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2) {         \\\n    SVC_Arg2(t1, t2);                                                          \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, rv)                                          \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2, t3 a3) {  \\\n    SVC_Arg3(t1, t2, t3);                                                      \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, rv)                                      \\\n  __attribute__((always_inline)) static inline t __##f(t1 a1, t2 a2, t3 a3,    \\\n                                                       t4 a4) {                \\\n    SVC_Arg4(t1, t2, t3, t4);                                                  \\\n    SVC_Call(f);                                                               \\\n    return (t)rv;                                                              \\\n  }\n\n#define SVC_1_2 SVC_1_1\n#define SVC_1_3 SVC_1_1\n#define SVC_2_3 SVC_2_1\n\n#elif defined(__ICCARM__) /* IAR Compiler */\n\n#define __NO_RETURN __noreturn\n\n#define osEvent_type osEvent\n#define osEvent_ret_status ret\n#define osEvent_ret_value ret\n#define osEvent_ret_msg ret\n#define osEvent_ret_mail ret\n\n#define osCallback_type osCallback\n#define osCallback_ret ret\n\n#define RET_osEvent osEvent\n#define RET_osCallback osCallback\n\n#define SVC_Setup(f) __asm(\"mov r12,%0\\n\" ::\"r\"(&f) : \"r12\");\n\n#define SVC_0_1(f, t, ...)                                                     \\\n  t f(void);                                                                   \\\n  _Pragma(\"swi_number=0\") __swi t _##f(void);                                  \\\n  static inline t __##f(void) {                                                \\\n    SVC_Setup(f);                                                              \\\n    return _##f();                                                             \\\n  }\n\n#define SVC_1_1(f, t, t1, ...)                                                 \\\n  t f(t1 a1);                                                                  \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1);                                 \\\n  static inline t __##f(t1 a1) {                                               \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1);                                                           \\\n  }\n\n#define SVC_2_1(f, t, t1, t2, ...)                                             \\\n  t f(t1 a1, t2 a2);                                                           \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2);                          \\\n  static inline t __##f(t1 a1, t2 a2) {                                        \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2);                                                       \\\n  }\n\n#define SVC_3_1(f, t, t1, t2, t3, ...)                                         \\\n  t f(t1 a1, t2 a2, t3 a3);                                                    \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2, t3 a3);                   \\\n  static inline t __##f(t1 a1, t2 a2, t3 a3) {                                 \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2, a3);                                                   \\\n  }\n\n#define SVC_4_1(f, t, t1, t2, t3, t4, ...)                                     \\\n  t f(t1 a1, t2 a2, t3 a3, t4 a4);                                             \\\n  _Pragma(\"swi_number=0\") __swi t _##f(t1 a1, t2 a2, t3 a3, t4 a4);            \\\n  static inline t __##f(t1 a1, t2 a2, t3 a3, t4 a4) {                          \\\n    SVC_Setup(f);                                                              \\\n    return _##f(a1, a2, a3, a4);                                               \\\n  }\n\n#define SVC_1_2 SVC_1_1\n#define SVC_1_3 SVC_1_1\n#define SVC_2_3 SVC_2_1\n\n#endif\n\n// Callback structure\ntypedef struct {\n  void *fp;  // Function pointer\n  void *arg; // Function argument\n} osCallback;\n\n// OS Section definitions\n#ifdef OS_SECTIONS_LINK_INFO\nextern const uint32_t os_section_id$$Base;\nextern const uint32_t os_section_id$$Limit;\n#endif\n\n// OS Timers external resources\nextern osThreadDef_t os_thread_def_osTimerThread;\nextern osThreadId osThreadId_osTimerThread;\nextern osMessageQDef_t os_messageQ_def_osTimerMessageQ;\nextern osMessageQId osMessageQId_osTimerMessageQ;\n\n// ==== Helper Functions ====\n\n/// Convert timeout in millisec to system ticks\nstatic uint32_t rt_ms2tick(uint32_t millisec) {\n  uint32_t tick;\n\n  if (millisec == osWaitForever)\n    return 0xFFFF; // Indefinite timeout\n  if (millisec > 4000000)\n    return 0xFFFE; // Max ticks supported\n\n  tick = ((1000 * millisec) + os_clockrate - 1) / os_clockrate;\n  if (tick > 0xFFFE)\n    return 0xFFFE;\n\n  return tick;\n}\n\n/// Convert Thread ID to TCB pointer\nstatic P_TCB rt_tid2ptcb(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  if (thread_id == NULL)\n    return NULL;\n\n  if ((uint32_t)thread_id & 3)\n    return NULL;\n\n#ifdef OS_SECTIONS_LINK_INFO\n  if ((os_section_id$$Base != 0) && (os_section_id$$Limit != 0)) {\n    if (thread_id < (osThreadId)os_section_id$$Base)\n      return NULL;\n    if (thread_id >= (osThreadId)os_section_id$$Limit)\n      return NULL;\n  }\n#endif\n\n  ptcb = thread_id;\n\n  if (ptcb->cb_type != TCB)\n    return NULL;\n\n  return ptcb;\n}\n\n/// Convert ID pointer to Object pointer\nstatic void *rt_id2obj(void *id) {\n\n  if ((uint32_t)id & 3)\n    return NULL;\n\n#ifdef OS_SECTIONS_LINK_INFO\n  if ((os_section_id$$Base != 0) && (os_section_id$$Limit != 0)) {\n    if (id < (void *)os_section_id$$Base)\n      return NULL;\n    if (id >= (void *)os_section_id$$Limit)\n      return NULL;\n  }\n#endif\n\n  return id;\n}\n\n// ==== Kernel Control ====\n\nuint8_t os_initialized; // Kernel Initialized flag\nuint8_t os_running;     // Kernel Running flag\n\n// Kernel Control Service Calls declarations\nSVC_0_1(svcKernelInitialize, osStatus, RET_osStatus)\nSVC_0_1(svcKernelStart, osStatus, RET_osStatus)\nSVC_0_1(svcKernelRunning, int32_t, RET_int32_t)\n\nextern void sysThreadError(osStatus status);\nosThreadId svcThreadCreate(osThreadDef_t *thread_def, void *argument);\nosMessageQId svcMessageCreate(const osMessageQDef_t *queue_def,\n                              osThreadId thread_id);\n\n// Kernel Control Service Calls\n\n/// Initialize the RTOS Kernel for creating objects\nosStatus svcKernelInitialize(void) {\n  if (os_initialized)\n    return osOK;\n\n  rt_sys_init();          // RTX System Initialization\n  os_tsk.run->prio = 255; // Highest priority\n\n  sysThreadError(osOK);\n\n  os_initialized = 1;\n\n  return osOK;\n}\n\n/// Start the RTOS Kernel\nosStatus svcKernelStart(void) {\n\n  if (os_running)\n    return osOK;\n\n  // Create OS Timers resources (Message Queue & Thread)\n  osMessageQId_osTimerMessageQ =\n      svcMessageCreate(&os_messageQ_def_osTimerMessageQ, NULL);\n  osThreadId_osTimerThread =\n      svcThreadCreate(&os_thread_def_osTimerThread, NULL);\n\n  rt_tsk_prio(0, 0); // Lowest priority\n#ifdef __ARM_ARCH_8M_MAIN__\n  __set_PSPLIM((uint32_t)os_tsk.run->stack);\n#endif\n  __set_PSP(os_tsk.run->tsk_stack + 8 * 4); // New context\n  os_tsk.run = NULL;                        // Force context switch\n\n  rt_sys_start();\n\n  os_running = 1;\n\n  return osOK;\n}\n\n/// Check if the RTOS kernel is already started\nint32_t svcKernelRunning(void) { return os_running; }\n\n// Kernel Control Public API\n\n/// Initialize the RTOS Kernel for creating objects\nosStatus osKernelInitialize(void) {\n  if (__get_IPSR() != 0)\n    return osErrorISR;              // Not allowed in ISR\n  if ((__get_CONTROL() & 1) == 0) { // Privileged mode\n    return svcKernelInitialize();\n  } else {\n    return __svcKernelInitialize();\n  }\n}\n\n/// Start the RTOS Kernel\nosStatus osKernelStart(void) {\n  uint32_t stack[8];\n\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  switch (__get_CONTROL() & 0x03) {\n  case 0x00: // Privileged Thread mode & MSP\n#ifdef __ARM_ARCH_8M_MAIN__\n    __set_PSPLIM(__get_MSPLIM());\n#endif\n    __set_PSP((uint32_t)(stack + 8)); // Initial PSP\n    if (os_flags & 1) {\n      __set_CONTROL(0x02); // Set Privileged Thread mode & PSP\n    } else {\n      __set_CONTROL(0x03); // Set Unprivileged Thread mode & PSP\n    }\n    __DSB();\n    __ISB();\n    break;\n  case 0x01: // Unprivileged Thread mode & MSP\n    return osErrorOS;\n  case 0x02:                   // Privileged Thread mode & PSP\n    if ((os_flags & 1) == 0) { // Unprivileged Thread mode requested\n      __set_CONTROL(0x03);     // Set Unprivileged Thread mode & PSP\n      __DSB();\n      __ISB();\n    }\n    break;\n  case 0x03: // Unprivileged Thread mode & PSP\n    if (os_flags & 1)\n      return osErrorOS; // Privileged Thread mode requested\n    break;\n  }\n  return __svcKernelStart();\n}\n\n/// Check if the RTOS kernel is already started\nint32_t osKernelRunning(void) {\n  if ((IN_ISR()) || ((__get_CONTROL() & 1) == 0)) {\n    // in ISR or Privileged\n    return os_running;\n  } else {\n    return __svcKernelRunning();\n  }\n}\n\n// ==== Thread Management ====\n\n__NO_RETURN void osThreadExit(void);\n\n// Thread Service Calls declarations\nSVC_2_1(svcThreadCreate, osThreadId, osThreadDef_t *, void *, RET_pointer)\nSVC_0_1(svcThreadGetId, osThreadId, RET_pointer)\nSVC_1_1(svcThreadTerminate, osStatus, osThreadId, RET_osStatus)\nSVC_0_1(svcThreadYield, osStatus, RET_osStatus)\nSVC_2_1(svcThreadSetPriority, osStatus, osThreadId, osPriority, RET_osStatus)\nSVC_1_1(svcThreadGetPriority, osPriority, osThreadId, RET_osPriority)\nSVC_1_1(svcThreadShow, osStatus, osThreadId, RET_osStatus)\nSVC_3_1(svcThreadSetHungCheck, osStatus, osThreadId, int32_t, uint32_t,\n        RET_osStatus)\n\n// Thread Service Calls\nextern OS_TID rt_get_TID(void);\nextern void rt_init_context(P_TCB p_TCB, U8 priority, FUNCP task_body);\n\n/// Create a thread and add it to Active Threads and set it to state READY\nosThreadId svcThreadCreate(osThreadDef_t *thread_def, void *argument) {\n  P_TCB ptcb;\n\n  if ((thread_def == NULL) || (thread_def->pthread == NULL) ||\n      (thread_def->tpriority < osPriorityIdle) ||\n      (thread_def->tpriority > osPriorityRealtime) ||\n      (thread_def->stacksize == 0) || (thread_def->stack_pointer == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  U8 priority = thread_def->tpriority - osPriorityIdle + 1;\n  P_TCB task_context = &thread_def->tcb;\n\n  /* Utilize the user provided stack. */\n  task_context->stack = (U32 *)thread_def->stack_pointer;\n  task_context->priv_stack = thread_def->stacksize;\n  /* Find a free entry in 'os_active_TCB' table. */\n  OS_TID tsk = rt_get_TID();\n  if (tsk == 0) {\n    sysThreadError(osErrorResource);\n    return NULL;\n  }\n  os_active_TCB[tsk - 1] = task_context;\n  task_context->task_id = tsk;\n  /* Pass parameter 'argv' to 'rt_init_context' */\n  task_context->msg = argument;\n#if __RTX_CPU_STATISTICS__\n  task_context->name = (U8 *)thread_def->name_str;\n#endif\n  /* Initialize thread context structure, including the thread's stack. */\n  rt_init_context(task_context, priority, (FUNCP)thread_def->pthread);\n\n  /* Dispatch this task to the scheduler for execution. */\n  DBG_TASK_NOTIFY(task_context, __TRUE);\n  rt_dispatch(task_context);\n\n  ptcb = (P_TCB)os_active_TCB[tsk - 1]; // TCB pointer\n\n  *((uint32_t *)ptcb->tsk_stack + 13) = (uint32_t)osThreadExit;\n\n  return ptcb;\n}\n\n/// Return the thread ID of the current running thread\nosThreadId svcThreadGetId(void) {\n  OS_TID tsk;\n\n  tsk = rt_tsk_self();\n  if (tsk == 0)\n    return NULL;\n  return (P_TCB)os_active_TCB[tsk - 1];\n}\n\n/// Terminate execution of a thread and remove it from ActiveThreads\nosStatus svcThreadTerminate(osThreadId thread_id) {\n  OS_RESULT res;\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n  res = rt_tsk_delete(ptcb->task_id); // Delete task\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Delete task failed\n\n  return osOK;\n}\n\n/// Pass control to next thread that is in state READY\nosStatus svcThreadYield(void) {\n  rt_tsk_pass(); // Pass control to next task\n  return osOK;\n}\n\n/// Change priority of an active thread\nosStatus svcThreadSetPriority(osThreadId thread_id, osPriority priority) {\n  OS_RESULT res;\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n  if ((priority < osPriorityIdle) || (priority > osPriorityRealtime)) {\n    return osErrorValue;\n  }\n\n  res = rt_tsk_prio(                // Change task priority\n      ptcb->task_id,                // Task ID\n      priority - osPriorityIdle + 1 // New task priority\n  );\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Change task priority failed\n\n  return osOK;\n}\n\n/// Get current priority of an active thread\nosPriority svcThreadGetPriority(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osPriorityError;\n\n  return (osPriority)(ptcb->prio - 1 + osPriorityIdle);\n}\n\n/// Show a thread\nosStatus svcThreadShow(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n  rt_tsk_show(ptcb);\n\n  return osOK;\n}\n\n// Thread Public API\n\n/// Create a thread and add it to Active Threads and set it to state READY\nosThreadId osThreadCreate(osThreadDef_t *thread_def, void *argument) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  if (((__get_CONTROL() & 1) == 0) && (os_running == 0)) {\n    // Privileged and not running\n    return svcThreadCreate(thread_def, argument);\n  } else {\n    return __svcThreadCreate(thread_def, argument);\n  }\n}\n\n/// Return the thread ID of the current running thread\nosThreadId osThreadGetId(void) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  return __svcThreadGetId();\n}\n\nint osGetThreadIntId(void) {\n  OS_TID tid;\n  uint32_t lock;\n\n  if (__get_IPSR() != 0)\n    return 0;\n  lock = int_lock();\n  tid = rt_tsk_self();\n  int_unlock(lock);\n  return tid;\n}\n\n/// Terminate execution of a thread and remove it from ActiveThreads\nosStatus osThreadTerminate(osThreadId thread_id) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadTerminate(thread_id);\n}\n\n/// Pass control to next thread that is in state READY\nosStatus osThreadYield(void) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadYield();\n}\n\n/// Change priority of an active thread\nosStatus osThreadSetPriority(osThreadId thread_id, osPriority priority) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadSetPriority(thread_id, priority);\n}\n\n/// Get current priority of an active thread\nosPriority osThreadGetPriority(osThreadId thread_id) {\n  if (__get_IPSR() != 0)\n    return osPriorityError; // Not allowed in ISR\n  return __svcThreadGetPriority(thread_id);\n}\n\n/// Dump a thread\nosStatus osThreadShow(osThreadId thread_id) {\n  if (__get_IPSR() != 0)\n    return osPriorityError; // Not allowed in ISR\n  return __svcThreadShow(thread_id);\n}\n\n/// INTERNAL - Not Public\n/// Auto Terminate Thread on exit (used implicitly when thread exists)\n__NO_RETURN void osThreadExit(void) {\n  __svcThreadTerminate(__svcThreadGetId());\n  for (;;)\n    ; // Should never come here\n}\n\n// ==== Generic Wait Functions ====\n\n// Generic Wait Service Calls declarations\nSVC_1_1(svcDelay, osStatus, uint32_t, RET_osStatus)\n#if osFeature_Wait != 0\nSVC_1_3(svcWait, os_InRegs osEvent, uint32_t, RET_osEvent)\n#endif\n\n// Generic Wait Service Calls\n\n/// Wait for Timeout (Time Delay)\nosStatus svcDelay(uint32_t millisec) {\n  if (millisec == 0)\n    return osOK;\n  rt_dly_wait(rt_ms2tick(millisec));\n  return osEventTimeout;\n}\n\n/// Wait for Signal, Message, Mail, or Timeout\n#if osFeature_Wait != 0\nos_InRegs osEvent_type svcWait(uint32_t millisec) {\n  osEvent ret;\n\n  if (millisec == 0) {\n    ret.status = osOK;\n    return osEvent_ret_status;\n  }\n\n  /* To Do: osEventSignal, osEventMessage, osEventMail */\n  rt_dly_wait(rt_ms2tick(millisec));\n  ret.status = osEventTimeout;\n\n  return osEvent_ret_status;\n}\n#endif\n\n// Generic Wait API\n\n/// Wait for Timeout (Time Delay)\nosStatus osDelay(uint32_t millisec) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcDelay(millisec);\n}\n\n/// Wait for Signal, Message, Mail, or Timeout\nos_InRegs osEvent osWait(uint32_t millisec) {\n  osEvent ret;\n\n#if osFeature_Wait == 0\n  ret.status = osErrorOS;\n  return ret;\n#else\n  if (__get_IPSR() != 0) { // Not allowed in ISR\n    ret.status = osErrorISR;\n    return ret;\n  }\n  return __svcWait(millisec);\n#endif\n}\n\n// ==== Timer Management ====\n\n// Timer definitions\n#define osTimerInvalid 0\n#define osTimerStopped 1\n#define osTimerRunning 2\n\n// Timer structures\n\ntypedef struct os_timer_cb_ { // Timer Control Block\n  struct os_timer_cb_ *next;  // Pointer to next active Timer\n  uint8_t state;              // Timer State\n  uint8_t type;               // Timer Type (Periodic/One-shot)\n  uint16_t reserved;          // Reserved\n  uint16_t tcnt;              // Timer Delay Count\n  uint16_t icnt;              // Timer Initial Count\n  void *arg;                  // Timer Function Argument\n  const osTimerDef_t *timer;  // Pointer to Timer definition\n} os_timer_cb;\n\n// Timer variables\nos_timer_cb *os_timer_head; // Pointer to first active Timer\n\n// Timer Helper Functions\n\n// Insert Timer into the list sorted by time\nstatic void rt_timer_insert(os_timer_cb *pt, uint32_t tcnt) {\n  os_timer_cb *p, *prev;\n\n  prev = NULL;\n  p = os_timer_head;\n  while (p != NULL) {\n    if (tcnt < p->tcnt)\n      break;\n    tcnt -= p->tcnt;\n    prev = p;\n    p = p->next;\n  }\n  pt->next = p;\n  pt->tcnt = (uint16_t)tcnt;\n  if (p != NULL) {\n    p->tcnt -= pt->tcnt;\n  }\n  if (prev != NULL) {\n    prev->next = pt;\n  } else {\n    os_timer_head = pt;\n  }\n}\n\n// Remove Timer from the list\nstatic int32_t rt_timer_remove(os_timer_cb *pt) {\n  os_timer_cb *p, *prev;\n\n  prev = NULL;\n  p = os_timer_head;\n  while (p != NULL) {\n    if (p == pt)\n      break;\n    prev = p;\n    p = p->next;\n  }\n  if (p == NULL)\n    return -1;\n  if (prev != NULL) {\n    prev->next = pt->next;\n  } else {\n    os_timer_head = pt->next;\n  }\n  if (pt->next != NULL) {\n    pt->next->tcnt += pt->tcnt;\n  }\n\n  return 0;\n}\n\n// Timer Service Calls declarations\nSVC_3_1(svcTimerCreate, osTimerId, const osTimerDef_t *, os_timer_type, void *,\n        RET_pointer)\nSVC_2_1(svcTimerStart, osStatus, osTimerId, uint32_t, RET_osStatus)\nSVC_1_1(svcTimerStop, osStatus, osTimerId, RET_osStatus)\nSVC_1_1(svcTimerDelete, osStatus, osTimerId, RET_osStatus)\nSVC_1_2(svcTimerCall, os_InRegs osCallback, osTimerId, RET_osCallback)\n\n// Timer Management Service Calls\n\n/// Create timer\nosTimerId svcTimerCreate(const osTimerDef_t *timer_def, os_timer_type type,\n                         void *argument) {\n  os_timer_cb *pt;\n\n  if ((timer_def == NULL) || (timer_def->ptimer == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  pt = timer_def->timer;\n  if (pt == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if ((type != osTimerOnce) && (type != osTimerPeriodic)) {\n    sysThreadError(osErrorValue);\n    return NULL;\n  }\n\n  if (osThreadId_osTimerThread == NULL) {\n    sysThreadError(osErrorResource);\n    return NULL;\n  }\n\n  if (pt->state != osTimerInvalid) {\n    sysThreadError(osErrorResource);\n    return NULL;\n  }\n\n  pt->next = NULL;\n  pt->state = osTimerStopped;\n  pt->type = (uint8_t)type;\n  pt->arg = argument;\n  pt->timer = timer_def;\n\n  return (osTimerId)pt;\n}\n\n/// Start or restart timer\nosStatus svcTimerStart(osTimerId timer_id, uint32_t millisec) {\n  os_timer_cb *pt;\n  uint32_t tcnt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  tcnt = rt_ms2tick(millisec);\n  if (tcnt == 0)\n    return osErrorValue;\n\n  switch (pt->state) {\n  case osTimerRunning:\n    if (rt_timer_remove(pt) != 0) {\n      return osErrorResource;\n    }\n    break;\n  case osTimerStopped:\n    pt->state = osTimerRunning;\n    pt->icnt = (uint16_t)tcnt;\n    break;\n  default:\n    return osErrorResource;\n  }\n\n  rt_timer_insert(pt, tcnt);\n\n  return osOK;\n}\n\n/// Stop timer\nosStatus svcTimerStop(osTimerId timer_id) {\n  os_timer_cb *pt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  if (pt->state != osTimerRunning)\n    return osErrorResource;\n\n  pt->state = osTimerStopped;\n\n  if (rt_timer_remove(pt) != 0) {\n    return osErrorResource;\n  }\n\n  return osOK;\n}\n\n/// Delete timer\nosStatus svcTimerDelete(osTimerId timer_id) {\n  os_timer_cb *pt;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL)\n    return osErrorParameter;\n\n  switch (pt->state) {\n  case osTimerRunning:\n    rt_timer_remove(pt);\n    break;\n  case osTimerStopped:\n    break;\n  default:\n    return osErrorResource;\n  }\n\n  pt->state = osTimerInvalid;\n\n  return osOK;\n}\n\n/// Get timer callback parameters\nos_InRegs osCallback_type svcTimerCall(osTimerId timer_id) {\n  os_timer_cb *pt;\n  osCallback ret;\n\n  pt = rt_id2obj(timer_id);\n  if (pt == NULL) {\n    ret.fp = NULL;\n    ret.arg = NULL;\n    return osCallback_ret;\n  }\n\n  ret.fp = (void *)pt->timer->ptimer;\n  ret.arg = pt->arg;\n\n  return osCallback_ret;\n}\n\nstatic __INLINE osStatus isrMessagePut(osMessageQId queue_id, uint32_t info,\n                                       uint32_t millisec);\n\n/// Timer Tick (called each SysTick)\nvoid sysTimerTick(void) {\n  os_timer_cb *pt, *p;\n  osStatus status;\n\n  p = os_timer_head;\n  if (p == NULL)\n    return;\n\n  p->tcnt--;\n  while ((p != NULL) && (p->tcnt == 0)) {\n    pt = p;\n    p = p->next;\n    os_timer_head = p;\n    status = isrMessagePut(osMessageQId_osTimerMessageQ, (uint32_t)pt, 0U);\n    if (status != osOK) {\n      os_error(OS_ERR_TIMER_OVF);\n    }\n    if (pt->type == (uint8_t)osTimerPeriodic) {\n      rt_timer_insert(pt, pt->icnt);\n    } else {\n      pt->state = osTimerStopped;\n    }\n  }\n}\n\nuint32_t rt_timer_delay_count(void) {\n  if (os_timer_head) {\n    return os_timer_head->tcnt;\n  }\n  return 0;\n}\n\n// Timer Management Public API\n\n/// Create timer\nosTimerId osTimerCreate(const osTimerDef_t *timer_def, os_timer_type type,\n                        void *argument) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  if (((__get_CONTROL() & 1) == 0) && (os_running == 0)) {\n    // Privileged and not running\n    return svcTimerCreate(timer_def, type, argument);\n  } else {\n    return __svcTimerCreate(timer_def, type, argument);\n  }\n}\n\n/// Start or restart timer\nosStatus osTimerStart(osTimerId timer_id, uint32_t millisec) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerStart(timer_id, millisec);\n}\n\n/// Stop timer\nosStatus osTimerStop(osTimerId timer_id) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerStop(timer_id);\n}\n\n/// Delete timer\nosStatus osTimerDelete(osTimerId timer_id) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcTimerDelete(timer_id);\n}\n\n/// INTERNAL - Not Public\n/// Get timer callback parameters (used by OS Timer Thread)\nos_InRegs osCallback osTimerCall(osTimerId timer_id) {\n  return __svcTimerCall(timer_id);\n}\n\n// Timer Thread\n__NO_RETURN void osTimerThread(void const *argument) {\n  osCallback cb;\n  osEvent evt;\n\n  for (;;) {\n    evt = osMessageGet(osMessageQId_osTimerMessageQ, osWaitForever);\n    if (evt.status == osEventMessage) {\n      cb = osTimerCall(evt.value.p);\n      if (cb.fp != NULL) {\n        (*(os_ptimer)cb.fp)(cb.arg);\n      }\n    }\n  }\n}\n\n// ==== Signal Management ====\n\n// Signal Service Calls declarations\nSVC_2_1(svcSignalSet, int32_t, osThreadId, int32_t, RET_int32_t)\nSVC_2_1(svcSignalClear, int32_t, osThreadId, int32_t, RET_int32_t)\nSVC_1_1(svcSignalGet, int32_t, osThreadId, RET_int32_t)\nSVC_2_3(svcSignalWait, os_InRegs osEvent, int32_t, uint32_t, RET_osEvent)\n\n// Signal Service Calls\n\n/// Set the specified Signal Flags of an active thread\nint32_t svcSignalSet(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  rt_evt_set(signals, ptcb->task_id); // Set event flags\n\n  return sig;\n}\n\n/// Clear the specified Signal Flags of an active thread\nint32_t svcSignalClear(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  rt_evt_clr(signals, ptcb->task_id); // Clear event flags\n\n  return sig;\n}\n\n/// Get Signal Flags status of an active thread\nint32_t svcSignalGet(osThreadId thread_id) {\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  return ptcb->events; // Return event flags\n}\n\n/// Wait for one or more Signal Flags to become signaled for the current RUNNING\n/// thread\nos_InRegs osEvent_type svcSignalWait(int32_t signals, uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals)) {\n    ret.status = osErrorValue;\n    return osEvent_ret_status;\n  }\n\n  if (signals != 0) { // Wait for all specified signals\n    res = rt_evt_wait(signals, rt_ms2tick(millisec), __TRUE);\n  } else { // Wait for any signal\n    res = rt_evt_wait(0xFFFF, rt_ms2tick(millisec), __FALSE);\n  }\n\n  if (res == OS_R_EVT) {\n    ret.status = osEventSignal;\n    ret.value.signals = signals ? signals : os_tsk.run->waits;\n  } else {\n    ret.status = millisec ? osEventTimeout : osOK;\n    ret.value.signals = 0;\n  }\n\n  return osEvent_ret_value;\n}\n\n// Signal ISR Calls\n\n/// Set the specified Signal Flags of an active thread\nstatic __INLINE int32_t isrSignalSet(osThreadId thread_id, int32_t signals) {\n  P_TCB ptcb;\n  int32_t sig;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return 0x80000000;\n\n  if (signals & (0xFFFFFFFF << osFeature_Signals))\n    return 0x80000000;\n\n  sig = ptcb->events; // Previous signal flags\n\n  isr_evt_set(signals, ptcb->task_id); // Set event flags\n\n  return sig;\n}\n\n// Signal Public API\n\n/// Set the specified Signal Flags of an active thread\nint32_t osSignalSet(osThreadId thread_id, int32_t signals) {\n  if (IN_ISR()) { // in ISR\n    return isrSignalSet(thread_id, signals);\n  } else { // in Thread\n    return __svcSignalSet(thread_id, signals);\n  }\n}\n\n/// Clear the specified Signal Flags of an active thread\nint32_t osSignalClear(osThreadId thread_id, int32_t signals) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcSignalClear(thread_id, signals);\n}\n\n/// Get Signal Flags status of an active thread\nint32_t osSignalGet(osThreadId thread_id) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcSignalGet(thread_id);\n}\n\n/// Wait for one or more Signal Flags to become signaled for the current RUNNING\n/// thread\nos_InRegs osEvent osSignalWait(int32_t signals, uint32_t millisec) {\n  osEvent ret;\n\n  if (__get_IPSR() != 0) { // Not allowed in ISR\n    ret.status = osErrorISR;\n    return ret;\n  }\n  return __svcSignalWait(signals, millisec);\n}\n\n// ==== Mutex Management ====\n\n// Mutex Service Calls declarations\nSVC_1_1(svcMutexCreate, osMutexId, const osMutexDef_t *, RET_pointer)\nSVC_2_1(svcMutexWait, osStatus, osMutexId, uint32_t, RET_osStatus)\nSVC_1_1(svcMutexRelease, osStatus, osMutexId, RET_osStatus)\nSVC_1_1(svcMutexDelete, osStatus, osMutexId, RET_osStatus)\nSVC_1_1(svcMutexGetOwner, osThreadId, osMutexId, RET_pointer)\n\n// Mutex Service Calls\n\n/// Create and Initialize a Mutex object\nosMutexId svcMutexCreate(const osMutexDef_t *mutex_def) {\n  OS_ID mut;\n\n  if (mutex_def == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  mut = mutex_def->mutex;\n  if (mut == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_MUCB)mut)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  rt_mut_init(mut); // Initialize Mutex\n\n  return mut;\n}\n\n/// Wait until a Mutex becomes available\nosStatus svcMutexWait(osMutexId mutex_id, uint32_t millisec) {\n  OS_ID mut;\n  OS_RESULT res;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  res = rt_mut_wait(mut, rt_ms2tick(millisec)); // Wait for Mutex\n\n  if (res == OS_R_TMO) {\n    return (millisec ? osErrorTimeoutResource : osErrorResource);\n  }\n  if (res == OS_R_NOK) {\n    return osErrorResource;\n  }\n\n  return osOK;\n}\n\n/// Release a Mutex that was obtained with osMutexWait\nosStatus svcMutexRelease(osMutexId mutex_id) {\n  OS_ID mut;\n  OS_RESULT res;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  res = rt_mut_release(mut); // Release Mutex\n\n  if (res == OS_R_NOK)\n    return osErrorResource; // Thread not owner or Zero Counter\n\n  return osOK;\n}\n\n/// Delete a Mutex that was created by osMutexCreate\nosStatus svcMutexDelete(osMutexId mutex_id) {\n  OS_ID mut;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return osErrorParameter;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return osErrorParameter;\n\n  rt_mut_delete(mut); // Release Mutex\n\n  return osOK;\n}\n\n/// Get owner thread of a Mutex object.\nosThreadId svcMutexGetOwner(osMutexId mutex_id) {\n  OS_ID mut;\n\n  mut = rt_id2obj(mutex_id);\n  if (mut == NULL)\n    return NULL;\n\n  if (((P_MUCB)mut)->cb_type != MUCB)\n    return NULL;\n\n  return (osThreadId)(((P_MUCB)mut)->owner);\n}\n\n// Mutex Public API\n\n/// Create and Initialize a Mutex object\nosMutexId osMutexCreate(const osMutexDef_t *mutex_def) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  if (((__get_CONTROL() & 1) == 0) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMutexCreate(mutex_def);\n  } else {\n    return __svcMutexCreate(mutex_def);\n  }\n}\n\n/// Wait until a Mutex becomes available\nosStatus osMutexWait(osMutexId mutex_id, uint32_t millisec) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexWait(mutex_id, millisec);\n}\n\n/// Release a Mutex that was obtained with osMutexWait\nosStatus osMutexRelease(osMutexId mutex_id) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexRelease(mutex_id);\n}\n\n/// Delete a Mutex that was created by osMutexCreate\nosStatus osMutexDelete(osMutexId mutex_id) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcMutexDelete(mutex_id);\n}\n\n/// Get owner thread of a Mutex object.\nosThreadId osMutexGetOwner(osMutexId mutex_id) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  return __svcMutexGetOwner(mutex_id);\n}\n\n// ==== Semaphore Management ====\n\n// Semaphore Service Calls declarations\nSVC_2_1(svcSemaphoreCreate, osSemaphoreId, const osSemaphoreDef_t *, int32_t,\n        RET_pointer)\nSVC_2_1(svcSemaphoreWait, int32_t, osSemaphoreId, uint32_t, RET_int32_t)\nSVC_1_1(svcSemaphoreRelease, osStatus, osSemaphoreId, RET_osStatus)\nSVC_1_1(svcSemaphoreDelete, osStatus, osSemaphoreId, RET_osStatus)\n\n// Semaphore Service Calls\n\n/// Create and Initialize a Semaphore object\nosSemaphoreId svcSemaphoreCreate(const osSemaphoreDef_t *semaphore_def,\n                                 int32_t count) {\n  OS_ID sem;\n\n  if (semaphore_def == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  sem = semaphore_def->semaphore;\n  if (sem == NULL) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_SCB)sem)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (count > osFeature_Semaphore) {\n    sysThreadError(osErrorValue);\n    return NULL;\n  }\n\n  rt_sem_init(sem, count); // Initialize Semaphore\n\n  return sem;\n}\n\n/// Wait until a Semaphore becomes available\nint32_t svcSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec) {\n  OS_ID sem;\n  OS_RESULT res;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return -1;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return -1;\n\n  res = rt_sem_wait(sem, rt_ms2tick(millisec)); // Wait for Semaphore\n\n  if (res == OS_R_TMO)\n    return 0; // Timeout\n\n  return (((P_SCB)sem)->tokens + 1);\n}\n\n/// Release a Semaphore\nosStatus svcSemaphoreRelease(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->tokens == osFeature_Semaphore)\n    return osErrorResource;\n\n  rt_sem_send(sem); // Release Semaphore\n\n  return osOK;\n}\n\n/// Delete a Semaphore that was created by osSemaphoreCreate\nosStatus svcSemaphoreDelete(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  rt_sem_delete(sem); // Delete Semaphore\n\n  return osOK;\n}\n\n// Semaphore ISR Calls\n\n/// Release a Semaphore\nstatic __INLINE osStatus isrSemaphoreRelease(osSemaphoreId semaphore_id) {\n  OS_ID sem;\n\n  sem = rt_id2obj(semaphore_id);\n  if (sem == NULL)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->cb_type != SCB)\n    return osErrorParameter;\n\n  if (((P_SCB)sem)->tokens == osFeature_Semaphore)\n    return osErrorResource;\n\n  isr_sem_send(sem); // Release Semaphore\n\n  return osOK;\n}\n\n// Semaphore Public API\n\n/// Create and Initialize a Semaphore object\nosSemaphoreId osSemaphoreCreate(const osSemaphoreDef_t *semaphore_def,\n                                int32_t count) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  if (((__get_CONTROL() & 1) == 0) && (os_running == 0)) {\n    // Privileged and not running\n    return svcSemaphoreCreate(semaphore_def, count);\n  } else {\n    return __svcSemaphoreCreate(semaphore_def, count);\n  }\n}\n\n/// Wait until a Semaphore becomes available\nint32_t osSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec) {\n  if (__get_IPSR() != 0)\n    return -1; // Not allowed in ISR\n  return __svcSemaphoreWait(semaphore_id, millisec);\n}\n\n/// Release a Semaphore\nosStatus osSemaphoreRelease(osSemaphoreId semaphore_id) {\n  if (IN_ISR()) { // in ISR\n    return isrSemaphoreRelease(semaphore_id);\n  } else { // in Thread\n    return __svcSemaphoreRelease(semaphore_id);\n  }\n}\n\n/// Delete a Semaphore that was created by osSemaphoreCreate\nosStatus osSemaphoreDelete(osSemaphoreId semaphore_id) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcSemaphoreDelete(semaphore_id);\n}\n\n// ==== Memory Management Functions ====\n\n// Memory Management Helper Functions\n\n// Clear Memory Box (Zero init)\nstatic void rt_clr_box(void *box_mem, void *box) {\n  uint32_t *p, n;\n\n  if ((box_mem != NULL) && (box != NULL)) {\n    p = box;\n    for (n = ((P_BM)box_mem)->blk_size; n; n -= 4) {\n      *p++ = 0;\n    }\n  }\n}\n\n// Memory Management Service Calls declarations\nSVC_1_1(svcPoolCreate, osPoolId, const osPoolDef_t *, RET_pointer)\nSVC_2_1(sysPoolAlloc, void *, osPoolId, uint32_t, RET_pointer)\nSVC_2_1(sysPoolFree, osStatus, osPoolId, void *, RET_osStatus)\n\n// Memory Management Service & ISR Calls\n\n/// Create and Initialize memory pool\nosPoolId svcPoolCreate(const osPoolDef_t *pool_def) {\n  uint32_t blk_sz;\n\n  if ((pool_def == NULL) || (pool_def->pool_sz == 0) ||\n      (pool_def->item_sz == 0) || (pool_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  blk_sz = (pool_def->item_sz + 3) & ~3;\n\n  _init_box(pool_def->pool, sizeof(struct OS_BM) + pool_def->pool_sz * blk_sz,\n            blk_sz);\n\n  return pool_def->pool;\n}\n\n/// Allocate a memory block from a memory pool\nvoid *sysPoolAlloc(osPoolId pool_id, uint32_t clr) {\n  void *ptr;\n\n  if (pool_id == NULL)\n    return NULL;\n\n  ptr = rt_alloc_box(pool_id);\n  if (clr) {\n    rt_clr_box(pool_id, ptr);\n  }\n\n  return ptr;\n}\n\n/// Return an allocated memory block back to a specific memory pool\nosStatus sysPoolFree(osPoolId pool_id, void *block) {\n  int32_t res;\n\n  if (pool_id == NULL)\n    return osErrorParameter;\n\n  res = rt_free_box(pool_id, block);\n  if (res != 0)\n    return osErrorValue;\n\n  return osOK;\n}\n\n// Memory Management Public API\n\n/// Create and Initialize memory pool\nosPoolId osPoolCreate(const osPoolDef_t *pool_def) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  if (((__get_CONTROL() & 1) == 0) && (os_running == 0)) {\n    // Privileged and not running\n    return svcPoolCreate(pool_def);\n  } else {\n    return __svcPoolCreate(pool_def);\n  }\n}\n\n/// Allocate a memory block from a memory pool\nvoid *osPoolAlloc(osPoolId pool_id) {\n  if ((__get_IPSR() != 0) ||\n      ((__get_CONTROL() & 1) == 0)) { // in ISR or Privileged\n    return sysPoolAlloc(pool_id, 0);\n  } else { // in Thread\n    return __sysPoolAlloc(pool_id, 0);\n  }\n}\n\n/// Allocate a memory block from a memory pool and set memory block to zero\nvoid *osPoolCAlloc(osPoolId pool_id) {\n  if ((IN_ISR()) || ((__get_CONTROL() & 1) == 0)) { // in ISR or Privileged\n    return sysPoolAlloc(pool_id, 1);\n  } else { // in Thread\n    return __sysPoolAlloc(pool_id, 1);\n  }\n}\n\n/// Return an allocated memory block back to a specific memory pool\nosStatus osPoolFree(osPoolId pool_id, void *block) {\n  if ((IN_ISR()) || ((__get_CONTROL() & 1) == 0)) { // in ISR or Privileged\n    return sysPoolFree(pool_id, block);\n  } else { // in Thread\n    return __sysPoolFree(pool_id, block);\n  }\n}\n\n// ==== Message Queue Management Functions ====\n\n// Message Queue Management Service Calls declarations\nSVC_2_1(svcMessageCreate, osMessageQId, const osMessageQDef_t *, osThreadId,\n        RET_pointer)\nSVC_3_1(svcMessagePut, osStatus, osMessageQId, uint32_t, uint32_t, RET_osStatus)\nSVC_2_3(svcMessageGet, os_InRegs osEvent, osMessageQId, uint32_t, RET_osEvent)\n\n// Message Queue Service Calls\n\n/// Create and Initialize Message Queue\nosMessageQId svcMessageCreate(const osMessageQDef_t *queue_def,\n                              osThreadId thread_id) {\n\n  if ((queue_def == NULL) || (queue_def->queue_sz == 0) ||\n      (queue_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  if (((P_MCB)queue_def->pool)->cb_type != 0) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  rt_mbx_init(queue_def->pool, 4 * (queue_def->queue_sz + 4));\n\n  return queue_def->pool;\n}\n\n/// Put a Message to a Queue\nosStatus svcMessagePut(osMessageQId queue_id, uint32_t info,\n                       uint32_t millisec) {\n  OS_RESULT res;\n\n  if (queue_id == NULL)\n    return osErrorParameter;\n\n  if (((P_MCB)queue_id)->cb_type != MCB)\n    return osErrorParameter;\n\n  res = rt_mbx_send(queue_id, (void *)info, rt_ms2tick(millisec));\n\n  if (res == OS_R_TMO) {\n    return (millisec ? osErrorTimeoutResource : osErrorResource);\n  }\n\n  return osOK;\n}\n\n/// Get a Message or Wait for a Message from a Queue\nos_InRegs osEvent_type svcMessageGet(osMessageQId queue_id, uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if (queue_id == NULL) {\n    ret.status = osErrorParameter;\n    return osEvent_ret_status;\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB) {\n    ret.status = osErrorParameter;\n    return osEvent_ret_status;\n  }\n\n  res = rt_mbx_wait(queue_id, &ret.value.p, rt_ms2tick(millisec));\n\n  if (res == OS_R_TMO) {\n    ret.status = millisec ? osEventTimeout : osOK;\n    return osEvent_ret_value;\n  }\n\n  ret.status = osEventMessage;\n\n  return osEvent_ret_value;\n}\n\n// Message Queue ISR Calls\n\n/// Put a Message to a Queue\nstatic __INLINE osStatus isrMessagePut(osMessageQId queue_id, uint32_t info,\n                                       uint32_t millisec) {\n\n  if ((queue_id == NULL) || (millisec != 0)) {\n    return osErrorParameter;\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB)\n    return osErrorParameter;\n\n  if (rt_mbx_check(queue_id) == 0) { // Check if Queue is full\n    return osErrorResource;\n  }\n\n  isr_mbx_send(queue_id, (void *)info);\n\n  return osOK;\n}\n\n/// Get a Message or Wait for a Message from a Queue\nstatic __INLINE os_InRegs osEvent isrMessageGet(osMessageQId queue_id,\n                                                uint32_t millisec) {\n  OS_RESULT res;\n  osEvent ret;\n\n  if ((queue_id == NULL) || (millisec != 0)) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  if (((P_MCB)queue_id)->cb_type != MCB) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  res = isr_mbx_receive(queue_id, &ret.value.p);\n\n  if (res != OS_R_MBX) {\n    ret.status = osOK;\n    return ret;\n  }\n\n  ret.status = osEventMessage;\n\n  return ret;\n}\n\n// Message Queue Management Public API\n\n/// Create and Initialize Message Queue\nosMessageQId osMessageCreate(const osMessageQDef_t *queue_def,\n                             osThreadId thread_id) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  if (((__get_CONTROL() & 1) == 0) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMessageCreate(queue_def, thread_id);\n  } else {\n    return __svcMessageCreate(queue_def, thread_id);\n  }\n}\n\n/// Put a Message to a Queue\nosStatus osMessagePut(osMessageQId queue_id, uint32_t info, uint32_t millisec) {\n  if (IN_ISR()) { // in ISR\n    return isrMessagePut(queue_id, info, millisec);\n  } else { // in Thread\n    return __svcMessagePut(queue_id, info, millisec);\n  }\n}\n\n/// Get a Message or Wait for a Message from a Queue\nos_InRegs osEvent osMessageGet(osMessageQId queue_id, uint32_t millisec) {\n  if (IN_ISR()) { // in ISR\n    return isrMessageGet(queue_id, millisec);\n  } else { // in Thread\n    return __svcMessageGet(queue_id, millisec);\n  }\n}\n\nuint32_t osMessageGetSpace(osMessageQId queue_id) {\n  return rt_mbx_check(queue_id);\n}\n\n// ==== Mail Queue Management Functions ====\n\n// Mail Queue Management Service Calls declarations\nSVC_2_1(svcMailCreate, osMailQId, const osMailQDef_t *, osThreadId, RET_pointer)\nSVC_4_1(sysMailAlloc, void *, osMailQId, uint32_t, uint32_t, uint32_t,\n        RET_pointer)\nSVC_3_1(sysMailFree, osStatus, osMailQId, void *, uint32_t, RET_osStatus)\n\n// Mail Queue Management Service & ISR Calls\n\n/// Create and Initialize mail queue\nosMailQId svcMailCreate(const osMailQDef_t *queue_def, osThreadId thread_id) {\n  uint32_t blk_sz;\n  P_MCB pmcb;\n  void *pool;\n\n  if ((queue_def == NULL) || (queue_def->queue_sz == 0) ||\n      (queue_def->item_sz == 0) || (queue_def->pool == NULL)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  pmcb = *(((void **)queue_def->pool) + 0);\n  pool = *(((void **)queue_def->pool) + 1);\n\n  if ((pool == NULL) || (pmcb == NULL) || (pmcb->cb_type != 0)) {\n    sysThreadError(osErrorParameter);\n    return NULL;\n  }\n\n  blk_sz = (queue_def->item_sz + 3) & ~3;\n\n  _init_box(pool, sizeof(struct OS_BM) + queue_def->queue_sz * blk_sz, blk_sz);\n\n  rt_mbx_init(pmcb, 4 * (queue_def->queue_sz + 4));\n\n  return queue_def->pool;\n}\n\n/// Allocate a memory block from a mail\nvoid *sysMailAlloc(osMailQId queue_id, uint32_t millisec, uint32_t isr,\n                   uint32_t clr) {\n  P_MCB pmcb;\n  void *pool;\n  void *mem;\n\n  if (queue_id == NULL)\n    return NULL;\n\n  pmcb = *(((void **)queue_id) + 0);\n  pool = *(((void **)queue_id) + 1);\n\n  if ((pool == NULL) || (pmcb == NULL))\n    return NULL;\n\n  if (isr && (millisec != 0))\n    return NULL;\n\n  mem = rt_alloc_box(pool);\n  if (clr) {\n    rt_clr_box(pool, mem);\n  }\n\n  if ((mem == NULL) && (millisec != 0)) {\n    // Put Task to sleep when Memory not available\n    if (pmcb->p_lnk != NULL) {\n      rt_put_prio((P_XCB)pmcb, os_tsk.run);\n    } else {\n      pmcb->p_lnk = os_tsk.run;\n      os_tsk.run->p_lnk = NULL;\n      os_tsk.run->p_rlnk = (P_TCB)pmcb;\n      // Task is waiting to allocate a message\n      pmcb->state = 3;\n    }\n    rt_block(rt_ms2tick(millisec), WAIT_MBX);\n  }\n\n  return mem;\n}\n\n/// Free a memory block from a mail\nosStatus sysMailFree(osMailQId queue_id, void *mail, uint32_t isr) {\n  P_MCB pmcb;\n  P_TCB ptcb;\n  void *pool;\n  void *mem;\n  int32_t res;\n\n  if (queue_id == NULL)\n    return osErrorParameter;\n\n  pmcb = *(((void **)queue_id) + 0);\n  pool = *(((void **)queue_id) + 1);\n\n  if ((pmcb == NULL) || (pool == NULL))\n    return osErrorParameter;\n\n  res = rt_free_box(pool, mail);\n\n  if (res != 0)\n    return osErrorValue;\n\n  if ((pmcb->p_lnk != NULL) && (pmcb->state == 3U)) {\n    // Task is waiting to allocate a message\n    if (isr) {\n      rt_psq_enq(pmcb, (U32)pool);\n      rt_psh_req();\n    } else {\n      mem = rt_alloc_box(pool);\n      if (mem != NULL) {\n        ptcb = rt_get_first((P_XCB)pmcb);\n        rt_ret_val(ptcb, (U32)mem);\n        rt_rmv_dly(ptcb);\n        rt_dispatch(ptcb);\n      }\n    }\n  }\n\n  return osOK;\n}\n\n// Mail Queue Management Public API\n\n/// Create and Initialize mail queue\nosMailQId osMailCreate(const osMailQDef_t *queue_def, osThreadId thread_id) {\n  if (__get_IPSR() != 0)\n    return NULL; // Not allowed in ISR\n  if (((__get_CONTROL() & 1) == 0) && (os_running == 0)) {\n    // Privileged and not running\n    return svcMailCreate(queue_def, thread_id);\n  } else {\n    return __svcMailCreate(queue_def, thread_id);\n  }\n}\n\n/// Allocate a memory block from a mail\nvoid *osMailAlloc(osMailQId queue_id, uint32_t millisec) {\n  if (IN_ISR()) { // in ISR\n    return sysMailAlloc(queue_id, millisec, 1, 0);\n  } else { // in Thread\n    return __sysMailAlloc(queue_id, millisec, 0, 0);\n  }\n}\n\n/// Allocate a memory block from a mail and set memory block to zero\nvoid *osMailCAlloc(osMailQId queue_id, uint32_t millisec) {\n  if (IN_ISR()) { // in ISR\n    return sysMailAlloc(queue_id, millisec, 1, 1);\n  } else { // in Thread\n    return __sysMailAlloc(queue_id, millisec, 0, 1);\n  }\n}\n\n/// Free a memory block from a mail\nosStatus osMailFree(osMailQId queue_id, void *mail) {\n  if (IN_ISR()) { // in ISR\n    return sysMailFree(queue_id, mail, 1);\n  } else { // in Thread\n    return __sysMailFree(queue_id, mail, 0);\n  }\n}\n\n/// Put a mail to a queue\nosStatus osMailPut(osMailQId queue_id, void *mail) {\n  if (queue_id == NULL)\n    return osErrorParameter;\n  if (mail == NULL)\n    return osErrorValue;\n  return osMessagePut(*((void **)queue_id), (uint32_t)mail, 0);\n}\n\n#if TASK_HUNG_CHECK_ENABLED\nosStatus svcThreadSetHungCheck(osThreadId thread_id, int32_t enable,\n                               uint32_t timeout) {\n  P_TCB ptcb;\n\n  ptcb = rt_tid2ptcb(thread_id); // Get TCB pointer\n  if (ptcb == NULL)\n    return osErrorParameter;\n\n  ptcb->hung_check = !!enable;\n  ptcb->hung_check_timeout = timeout;\n  return osOK;\n}\n\n/// enable/disable the hung check feature of an active thread\nosStatus osThreadSetHungCheck(osThreadId thread_id, int32_t enable,\n                              uint32_t timeout) {\n  if (__get_IPSR() != 0)\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadSetHungCheck(thread_id, enable, timeout);\n}\n#endif\n\n#ifdef __CC_ARM\n#pragma push\n#pragma Ospace\n#endif // __arm__\n/// Get a mail from a queue\nos_InRegs osEvent osMailGet(osMailQId queue_id, uint32_t millisec) {\n  osEvent ret;\n\n  if (queue_id == NULL) {\n    ret.status = osErrorParameter;\n    return ret;\n  }\n\n  ret = osMessageGet(*((void **)queue_id), millisec);\n  if (ret.status == osEventMessage)\n    ret.status = osEventMail;\n\n  return ret;\n}\n#ifdef __CC_ARM\n#pragma pop\n#endif // __arm__\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Event.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_EVENT.C\n *      Purpose: Implements waits and wake-ups for event flags\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Event.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_evt_wait -----------------------------------*/\n\nOS_RESULT rt_evt_wait(U16 wait_flags, U16 timeout, BOOL and_wait) {\n  /* Wait for one or more event flags with optional time-out.                */\n  /* \"wait_flags\" identifies the flags to wait for.                          */\n  /* \"timeout\" is the time-out limit in system ticks (0xffff if no time-out) */\n  /* \"and_wait\" specifies the AND-ing of \"wait_flags\" as condition to be met */\n  /* to complete the wait. (OR-ing if set to 0).                             */\n  U32 block_state;\n\n  if (and_wait) {\n    /* Check for AND-connected events */\n    if ((os_tsk.run->events & wait_flags) == wait_flags) {\n      os_tsk.run->events &= ~wait_flags;\n      return (OS_R_EVT);\n    }\n    block_state = WAIT_AND;\n  } else {\n    /* Check for OR-connected events */\n    if (os_tsk.run->events & wait_flags) {\n      os_tsk.run->waits = os_tsk.run->events & wait_flags;\n      os_tsk.run->events &= ~wait_flags;\n      return (OS_R_EVT);\n    }\n    block_state = WAIT_OR;\n  }\n  /* Task has to wait */\n  os_tsk.run->waits = wait_flags;\n  rt_block(timeout, (U8)block_state);\n  return (OS_R_TMO);\n}\n\n/*--------------------------- rt_evt_set ------------------------------------*/\n\nvoid rt_evt_set(U16 event_flags, OS_TID task_id) {\n  /* Set one or more event flags of a selectable task. */\n  P_TCB p_tcb;\n\n  p_tcb = os_active_TCB[task_id - 1];\n  if (p_tcb == NULL) {\n    return;\n  }\n  p_tcb->events |= event_flags;\n  event_flags = p_tcb->waits;\n  /* If the task is not waiting for an event, it should not be put */\n  /* to ready state. */\n  if (p_tcb->state == WAIT_AND) {\n    /* Check for AND-connected events */\n    if ((p_tcb->events & event_flags) == event_flags) {\n      goto wkup;\n    }\n  }\n  if (p_tcb->state == WAIT_OR) {\n    /* Check for OR-connected events */\n    if (p_tcb->events & event_flags) {\n      p_tcb->waits &= p_tcb->events;\n    wkup:\n      p_tcb->events &= ~event_flags;\n      rt_rmv_dly(p_tcb);\n      p_tcb->state = READY;\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_tcb, 0x08 /*osEventSignal*/, p_tcb->waits);\n#else\n      rt_ret_val(p_tcb, OS_R_EVT);\n#endif\n      rt_dispatch(p_tcb);\n    }\n  }\n}\n\n/*--------------------------- rt_evt_clr ------------------------------------*/\n\nvoid rt_evt_clr(U16 clear_flags, OS_TID task_id) {\n  /* Clear one or more event flags (identified by \"clear_flags\") of a */\n  /* selectable task (identified by \"task\"). */\n  P_TCB task = os_active_TCB[task_id - 1];\n\n  if (task == NULL) {\n    return;\n  }\n  task->events &= ~clear_flags;\n}\n\n/*--------------------------- isr_evt_set -----------------------------------*/\n\nvoid isr_evt_set(U16 event_flags, OS_TID task_id) {\n  /* Same function as \"os_evt_set\", but to be called by ISRs. */\n  P_TCB p_tcb = os_active_TCB[task_id - 1];\n\n  if (p_tcb == NULL) {\n    return;\n  }\n  rt_psq_enq(p_tcb, event_flags);\n  rt_psh_req();\n}\n\n/*--------------------------- rt_evt_get ------------------------------------*/\n\nU16 rt_evt_get(void) {\n  /* Get events of a running task after waiting for OR connected events. */\n  return (os_tsk.run->waits);\n}\n\n/*--------------------------- rt_evt_psh ------------------------------------*/\n\nvoid rt_evt_psh(P_TCB p_CB, U16 set_flags) {\n  /* Check if task has to be waken up */\n  U16 event_flags;\n\n  p_CB->events |= set_flags;\n  event_flags = p_CB->waits;\n  if (p_CB->state == WAIT_AND) {\n    /* Check for AND-connected events */\n    if ((p_CB->events & event_flags) == event_flags) {\n      goto rdy;\n    }\n  }\n  if (p_CB->state == WAIT_OR) {\n    /* Check for OR-connected events */\n    if (p_CB->events & event_flags) {\n      p_CB->waits &= p_CB->events;\n    rdy:\n      p_CB->events &= ~event_flags;\n      rt_rmv_dly(p_CB);\n      p_CB->state = READY;\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_CB, 0x08 /*osEventSignal*/, p_CB->waits);\n#else\n      rt_ret_val(p_CB, OS_R_EVT);\n#endif\n      rt_put_prio(&os_rdy, p_CB);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Event.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_EVENT.H\n *      Purpose: Implements waits and wake-ups for event flags\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n/* Functions */\nextern OS_RESULT rt_evt_wait(U16 wait_flags, U16 timeout, BOOL and_wait);\nextern void rt_evt_set(U16 event_flags, OS_TID task_id);\nextern void rt_evt_clr(U16 clear_flags, OS_TID task_id);\nextern void isr_evt_set(U16 event_flags, OS_TID task_id);\nextern U16 rt_evt_get(void);\nextern void rt_evt_psh(P_TCB p_CB, U16 set_flags);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_HAL_CM.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_HAL_CM.H\n *      Purpose: Hardware Abstraction Layer for Cortex-M definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_TypeDef.h\"\n\n/* Definitions */\n#define INITIAL_xPSR 0x01000000\n#define DEMCR_TRCENA 0x01000000\n#define ITM_ITMENA 0x00000001\n#define MAGIC_WORD 0xE25A2EA5\n\n#define SYSTICK_EXTERNAL_CLOCK 1\n\n#if defined(__CC_ARM) /* ARM Compiler */\n\n#if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)\n#define __USE_EXCLUSIVE_ACCESS\n#else\n#undef __USE_EXCLUSIVE_ACCESS\n#endif\n\n#elif defined(__GNUC__) /* GNU Compiler */\n\n#undef __USE_EXCLUSIVE_ACCESS\n\n#if defined(__CORTEX_M0) || defined(__CORTEX_M0PLUS)\n#define __TARGET_ARCH_6S_M 1\n#else\n#define __TARGET_ARCH_6S_M 0\n#endif\n\n#if defined(__VFP_FP__) && !defined(__SOFTFP__)\n#define __TARGET_FPU_VFP 1\n#else\n#define __TARGET_FPU_VFP 0\n#endif\n\n#define __inline inline\n#define __weak __attribute__((weak))\n\n#ifndef __CMSIS_GENERIC\n\n__attribute__((always_inline)) static inline void __enable_irq(void) {\n  __asm volatile(\"cpsie i\");\n}\n\n__attribute__((always_inline)) static inline U32 __disable_irq(void) {\n  U32 result;\n\n  __asm volatile(\"mrs %0, primask\" : \"=r\"(result));\n  __asm volatile(\"cpsid i\");\n  return (result & 1);\n}\n\n#endif\n\n__attribute__((always_inline)) static inline U8 __clz(U32 value) {\n  U8 result;\n\n  __asm volatile(\"clz %0, %1\" : \"=r\"(result) : \"r\"(value));\n  return (result);\n}\n\n#elif defined(__ICCARM__) /* IAR Compiler */\n\n#undef __USE_EXCLUSIVE_ACCESS\n\n#if (__CORE__ == __ARM6M__)\n#define __TARGET_ARCH_6S_M 1\n#else\n#define __TARGET_ARCH_6S_M 0\n#endif\n\n#if defined __ARMVFP__\n#define __TARGET_FPU_VFP 1\n#else\n#define __TARGET_FPU_VFP 0\n#endif\n\n#define __inline inline\n\n#ifndef __CMSIS_GENERIC\n\nstatic inline void __enable_irq(void) { __asm volatile(\"cpsie i\"); }\n\nstatic inline U32 __disable_irq(void) {\n  U32 result;\n\n  __asm volatile(\"mrs %0, primask\" : \"=r\"(result));\n  __asm volatile(\"cpsid i\");\n  return (result & 1);\n}\n\n#endif\n\nstatic inline U8 __clz(U32 value) {\n  U8 result;\n\n  __asm volatile(\"clz %0, %1\" : \"=r\"(result) : \"r\"(value));\n  return (result);\n}\n\n#endif\n\n/* NVIC registers */\n#define NVIC_ST_CTRL (*((volatile U32 *)0xE000E010))\n#define NVIC_ST_RELOAD (*((volatile U32 *)0xE000E014))\n#define NVIC_ST_CURRENT (*((volatile U32 *)0xE000E018))\n#define NVIC_ISER ((volatile U32 *)0xE000E100)\n#define NVIC_ICER ((volatile U32 *)0xE000E180)\n#if (__TARGET_ARCH_6S_M)\n#define NVIC_IP ((volatile U32 *)0xE000E400)\n#else\n#define NVIC_IP ((volatile U8 *)0xE000E400)\n#endif\n#define NVIC_INT_CTRL (*((volatile U32 *)0xE000ED04))\n#define NVIC_AIR_CTRL (*((volatile U32 *)0xE000ED0C))\n#define NVIC_SYS_PRI2 (*((volatile U32 *)0xE000ED1C))\n#define NVIC_SYS_PRI3 (*((volatile U32 *)0xE000ED20))\n\n#define OS_PEND_IRQ() NVIC_INT_CTRL = (1 << 28)\n#define OS_PENDING ((NVIC_INT_CTRL >> 26) & (1 << 2 | 1))\n#define OS_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_PENDING) << 25\n#define OS_PEND(fl, p) NVIC_INT_CTRL = (fl | p << 2) << 26\n#if (SYSTICK_EXTERNAL_CLOCK)\n#define OS_LOCK() NVIC_ST_CTRL = 0x0001\n#define OS_UNLOCK() NVIC_ST_CTRL = 0x0003\n#else\n#define OS_LOCK() NVIC_ST_CTRL = 0x0005\n#define OS_UNLOCK() NVIC_ST_CTRL = 0x0007\n#endif\n\n#define OS_X_PENDING ((NVIC_INT_CTRL >> 28) & 1)\n#define OS_X_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_X_PENDING) << 27\n#define OS_X_PEND(fl, p) NVIC_INT_CTRL = (fl | p) << 28\n#if (__TARGET_ARCH_6S_M)\n#define OS_X_INIT(n)                                                           \\\n  NVIC_IP[n >> 2] |= 0xFF << (8 * (n & 0x03));                                 \\\n  NVIC_ISER[n >> 5] = 1 << (n & 0x1F)\n#else\n#define OS_X_INIT(n)                                                           \\\n  NVIC_IP[n] = 0xFF;                                                           \\\n  NVIC_ISER[n >> 5] = 1 << (n & 0x1F)\n#endif\n#define OS_X_LOCK(n) NVIC_ICER[n >> 5] = 1 << (n & 0x1F)\n#define OS_X_UNLOCK(n) NVIC_ISER[n >> 5] = 1 << (n & 0x1F)\n\n/* Core Debug registers */\n#define DEMCR (*((volatile U32 *)0xE000EDFC))\n\n/* ITM registers */\n#define ITM_CONTROL (*((volatile U32 *)0xE0000E80))\n#define ITM_ENABLE (*((volatile U32 *)0xE0000E00))\n#define ITM_PORT30_U32 (*((volatile U32 *)0xE0000078))\n#define ITM_PORT31_U32 (*((volatile U32 *)0xE000007C))\n#define ITM_PORT31_U16 (*((volatile U16 *)0xE000007C))\n#define ITM_PORT31_U8 (*((volatile U8 *)0xE000007C))\n\n/* Variables */\nextern BIT dbg_msg;\n\n/* Functions */\n#ifdef __USE_EXCLUSIVE_ACCESS\n#define rt_inc(p) while (__strex((__ldrex(p) + 1), p))\n#define rt_dec(p) while (__strex((__ldrex(p) - 1), p))\n#else\n#define rt_inc(p)                                                              \\\n  __disable_irq();                                                             \\\n  (*p)++;                                                                      \\\n  __enable_irq();\n#define rt_dec(p)                                                              \\\n  __disable_irq();                                                             \\\n  (*p)--;                                                                      \\\n  __enable_irq();\n#endif\n\n__inline static U32 rt_inc_qi(U32 size, U8 *count, U8 *first) {\n  U32 cnt, c2;\n#ifdef __USE_EXCLUSIVE_ACCESS\n  do {\n    if ((cnt = __ldrex(count)) == size) {\n      __clrex();\n      return (cnt);\n    }\n  } while (__strex(cnt + 1, count));\n  do {\n    c2 = (cnt = __ldrex(first)) + 1;\n    if (c2 == size)\n      c2 = 0;\n  } while (__strex(c2, first));\n#else\n  __disable_irq();\n  if ((cnt = *count) < size) {\n    *count = cnt + 1;\n    c2 = (cnt = *first) + 1;\n    if (c2 == size)\n      c2 = 0;\n    *first = c2;\n  }\n  __enable_irq();\n#endif\n  return (cnt);\n}\n\n__inline static void rt_systick_init(void) {\n  NVIC_ST_RELOAD = os_get_trv();\n  NVIC_ST_CURRENT = 0;\n#if (SYSTICK_EXTERNAL_CLOCK)\n  NVIC_ST_CTRL = 0x0003;\n#else\n  NVIC_ST_CTRL = 0x0007;\n#endif\n  NVIC_SYS_PRI3 |= 0xFF000000;\n}\n\n__inline static void rt_svc_init(void) {\n#if !(__TARGET_ARCH_6S_M)\n  int sh, prigroup;\n#endif\n  NVIC_SYS_PRI3 |= 0x00FF0000;\n#if (__TARGET_ARCH_6S_M)\n  NVIC_SYS_PRI2 |= (NVIC_SYS_PRI3 << (8 + 1)) & 0xFC000000;\n#else\n  sh = 8 - __clz(~((NVIC_SYS_PRI3 << 8) & 0xFF000000));\n  prigroup = ((NVIC_AIR_CTRL >> 8) & 0x07);\n  if (prigroup >= sh) {\n    sh = prigroup + 1;\n  }\n  NVIC_SYS_PRI2 =\n      ((0xFEFFFFFF << sh) & 0xFF000000) | (NVIC_SYS_PRI2 & 0x00FFFFFF);\n#endif\n}\n\nextern void rt_set_PSP(U32 stack);\nextern U32 rt_get_PSP(void);\nextern void os_set_env(void);\nextern void *_alloc_box(void *box_mem);\nextern int _free_box(void *box_mem, void *box);\n\nextern void rt_init_stack(P_TCB p_TCB, FUNCP task_body);\nextern void rt_ret_val(P_TCB p_TCB, U32 v0);\nextern void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1);\n\nextern void dbg_init(void);\nextern void dbg_task_notify(P_TCB p_tcb, BOOL create);\nextern void dbg_task_switch(U32 task_id);\n\n#ifdef DBG_MSG\n#define DBG_INIT() dbg_init()\n#define DBG_TASK_NOTIFY(p_tcb, create)                                         \\\n  if (dbg_msg)                                                                 \\\n  dbg_task_notify(p_tcb, create)\n#define DBG_TASK_SWITCH(task_id)                                               \\\n  if (dbg_msg && (os_tsk.new_tsk != os_tsk.run))                               \\\n  dbg_task_switch(task_id)\n#else\n#define DBG_INIT()\n#define DBG_TASK_NOTIFY(p_tcb, create)\n#define DBG_TASK_SWITCH(task_id)\n#endif\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_List.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_LIST.C\n *      Purpose: Functions for the management of different lists\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_List.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* List head of chained ready tasks */\nstruct OS_XCB os_rdy;\n/* List head of chained delay tasks */\nstruct OS_XCB os_dly;\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_put_prio -----------------------------------*/\n\nvoid rt_put_prio(P_XCB p_CB, P_TCB p_task) {\n  /* Put task identified with \"p_task\" into list ordered by priority.       */\n  /* \"p_CB\" points to head of list; list has always an element at end with  */\n  /* a priority less than \"p_task->prio\".                                   */\n  P_TCB p_CB2;\n  U32 prio;\n  BOOL sem_mbx = __FALSE;\n\n  if (p_CB->cb_type == SCB || p_CB->cb_type == MCB || p_CB->cb_type == MUCB) {\n    sem_mbx = __TRUE;\n  }\n  prio = p_task->prio;\n  p_CB2 = p_CB->p_lnk;\n  /* Search for an entry in the list */\n  while (p_CB2 != NULL && prio <= p_CB2->prio) {\n    p_CB = (P_XCB)p_CB2;\n    p_CB2 = p_CB2->p_lnk;\n  }\n  /* Entry found, insert the task into the list */\n  p_task->p_lnk = p_CB2;\n  p_CB->p_lnk = p_task;\n  if (sem_mbx) {\n    if (p_CB2 != NULL) {\n      p_CB2->p_rlnk = p_task;\n    }\n    p_task->p_rlnk = (P_TCB)p_CB;\n  } else {\n    p_task->p_rlnk = NULL;\n  }\n}\n\n/*--------------------------- rt_get_first ----------------------------------*/\n\nP_TCB rt_get_first(P_XCB p_CB) {\n  /* Get task at head of list: it is the task with highest priority. */\n  /* \"p_CB\" points to head of list. */\n  P_TCB p_first;\n\n  p_first = p_CB->p_lnk;\n  p_CB->p_lnk = p_first->p_lnk;\n  if (p_CB->cb_type == SCB || p_CB->cb_type == MCB || p_CB->cb_type == MUCB) {\n    if (p_first->p_lnk != NULL) {\n      p_first->p_lnk->p_rlnk = (P_TCB)p_CB;\n      p_first->p_lnk = NULL;\n    }\n    p_first->p_rlnk = NULL;\n  } else {\n    p_first->p_lnk = NULL;\n  }\n  return (p_first);\n}\n\n/*--------------------------- rt_put_rdy_first ------------------------------*/\n\nvoid rt_put_rdy_first(P_TCB p_task) {\n  /* Put task identified with \"p_task\" at the head of the ready list. The   */\n  /* task must have at least a priority equal to highest priority in list.  */\n  p_task->p_lnk = os_rdy.p_lnk;\n  p_task->p_rlnk = NULL;\n  os_rdy.p_lnk = p_task;\n}\n\n/*--------------------------- rt_put_rdy_last ------------------------------*/\n\nvoid rt_put_rdy_last(P_TCB p_task) {\n  /* Put task identified with \"p_task\" at the tail of the ready list. The   */\n  /* task must have at least a priority equal to lowest priority in list.  */\n  P_TCB p_last;\n\n  p_last = os_rdy.p_lnk;\n\n  p_task->p_rlnk = NULL;\n  p_task->p_lnk = NULL;\n\n  if (p_last == NULL) {\n    os_rdy.p_lnk = p_task;\n  } else {\n    while (p_last->p_lnk != NULL) {\n      p_last = p_last->p_lnk;\n    }\n    p_last->p_lnk = p_task;\n  }\n}\n\n/*--------------------------- rt_get_same_rdy_prio --------------------------*/\n\nP_TCB rt_get_same_rdy_prio(void) {\n  /* Remove a task of same priority from ready list if any exists. Other-   */\n  /* wise return NULL.                                                      */\n  P_TCB p_first;\n\n  p_first = os_rdy.p_lnk;\n  if (p_first->prio == os_tsk.run->prio) {\n    os_rdy.p_lnk = os_rdy.p_lnk->p_lnk;\n    return (p_first);\n  }\n  return (NULL);\n}\n\n/*--------------------------- rt_resort_prio --------------------------------*/\n\nvoid rt_resort_prio(P_TCB p_task) {\n  /* Re-sort ordered lists after the priority of 'p_task' has changed.      */\n  P_TCB p_CB;\n\n  if (p_task->p_rlnk == NULL) {\n    if (p_task->state == READY) {\n      /* Task is chained into READY list. */\n      p_CB = (P_TCB)&os_rdy;\n      goto res;\n    }\n  } else {\n    p_CB = p_task->p_rlnk;\n    while (p_CB->cb_type == TCB) {\n      /* Find a header of this task chain list. */\n      p_CB = p_CB->p_rlnk;\n    }\n  res:\n    rt_rmv_list(p_task);\n    rt_put_prio((P_XCB)p_CB, p_task);\n  }\n}\n\n/*--------------------------- rt_put_dly ------------------------------------*/\n\nvoid rt_put_dly(P_TCB p_task, U16 delay) {\n  /* Put a task identified with \"p_task\" into chained delay wait list using */\n  /* a delay value of \"delay\".                                              */\n  P_TCB p;\n  U32 delta, idelay = delay;\n\n  p = (P_TCB)&os_dly;\n  if (p->p_dlnk == NULL) {\n    /* Delay list empty */\n    delta = 0;\n    goto last;\n  }\n  delta = os_dly.delta_time;\n  while (delta < idelay) {\n    if (p->p_dlnk == NULL) {\n      /* End of list found */\n    last:\n      p_task->p_dlnk = NULL;\n      p->p_dlnk = p_task;\n      p_task->p_blnk = p;\n      p->delta_time = (U16)(idelay - delta);\n      p_task->delta_time = 0;\n      return;\n    }\n    p = p->p_dlnk;\n    delta += p->delta_time;\n  }\n  /* Right place found */\n  p_task->p_dlnk = p->p_dlnk;\n  p->p_dlnk = p_task;\n  p_task->p_blnk = p;\n  if (p_task->p_dlnk != NULL) {\n    p_task->p_dlnk->p_blnk = p_task;\n  }\n  p_task->delta_time = (U16)(delta - idelay);\n  p->delta_time -= p_task->delta_time;\n}\n\n/*--------------------------- rt_dec_dly ------------------------------------*/\n\nvoid rt_dec_dly(void) {\n  /* Decrement delta time of list head: remove tasks having a value of zero.*/\n  P_TCB p_rdy;\n\n  if (os_dly.p_dlnk == NULL) {\n    return;\n  }\n  os_dly.delta_time--;\n  while ((os_dly.delta_time == 0) && (os_dly.p_dlnk != NULL)) {\n    p_rdy = os_dly.p_dlnk;\n    if (p_rdy->p_rlnk != NULL) {\n      /* Task is really enqueued, remove task from semaphore/mailbox */\n      /* timeout waiting list. */\n      p_rdy->p_rlnk->p_lnk = p_rdy->p_lnk;\n      if (p_rdy->p_lnk != NULL) {\n        p_rdy->p_lnk->p_rlnk = p_rdy->p_rlnk;\n        p_rdy->p_lnk = NULL;\n      }\n      p_rdy->p_rlnk = NULL;\n    }\n    rt_put_prio(&os_rdy, p_rdy);\n    os_dly.delta_time = p_rdy->delta_time;\n    if (p_rdy->state == WAIT_ITV) {\n      /* Calculate the next time for interval wait. */\n      p_rdy->delta_time = p_rdy->interval_time + (U16)os_time;\n    }\n    p_rdy->state = READY;\n    os_dly.p_dlnk = p_rdy->p_dlnk;\n    if (p_rdy->p_dlnk != NULL) {\n      p_rdy->p_dlnk->p_blnk = (P_TCB)&os_dly;\n      p_rdy->p_dlnk = NULL;\n    }\n    p_rdy->p_blnk = NULL;\n  }\n}\n\n/*--------------------------- rt_rmv_list -----------------------------------*/\n\nvoid rt_rmv_list(P_TCB p_task) {\n  /* Remove task identified with \"p_task\" from ready, semaphore or mailbox  */\n  /* waiting list if enqueued.                                              */\n  P_TCB p_b;\n\n  if (p_task->p_rlnk != NULL) {\n    /* A task is enqueued in semaphore / mailbox waiting list. */\n    p_task->p_rlnk->p_lnk = p_task->p_lnk;\n    if (p_task->p_lnk != NULL) {\n      p_task->p_lnk->p_rlnk = p_task->p_rlnk;\n    }\n    return;\n  }\n\n  p_b = (P_TCB)&os_rdy;\n  while (p_b != NULL) {\n    /* Search the ready list for task \"p_task\" */\n    if (p_b->p_lnk == p_task) {\n      p_b->p_lnk = p_task->p_lnk;\n      return;\n    }\n    p_b = p_b->p_lnk;\n  }\n}\n\n/*--------------------------- rt_rmv_dly ------------------------------------*/\n\nvoid rt_rmv_dly(P_TCB p_task) {\n  /* Remove task identified with \"p_task\" from delay list if enqueued.      */\n  P_TCB p_b;\n\n  p_b = p_task->p_blnk;\n  if (p_b != NULL) {\n    /* Task is really enqueued */\n    p_b->p_dlnk = p_task->p_dlnk;\n    if (p_task->p_dlnk != NULL) {\n      /* 'p_task' is in the middle of list */\n      p_b->delta_time += p_task->delta_time;\n      p_task->p_dlnk->p_blnk = p_b;\n      p_task->p_dlnk = NULL;\n    } else {\n      /* 'p_task' is at the end of list */\n      p_b->delta_time = 0;\n    }\n    p_task->p_blnk = NULL;\n  }\n}\n\n/*--------------------------- rt_psq_enq ------------------------------------*/\n\nvoid rt_psq_enq(OS_ID entry, U32 arg) {\n  /* Insert post service request \"entry\" into ps-queue. */\n  U32 idx;\n\n  idx = rt_inc_qi(os_psq->size, &os_psq->count, &os_psq->first);\n  if (idx < os_psq->size) {\n    os_psq->q[idx].id = entry;\n    os_psq->q[idx].arg = arg;\n  } else {\n    os_error(OS_ERR_FIFO_OVF);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_List.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_LIST.H\n *      Purpose: Functions for the management of different lists\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n/* Definitions */\n\n/* Values for 'cb_type' */\n#define TCB 0\n#define MCB 1\n#define SCB 2\n#define MUCB 3\n#define HCB 4\n\n/* Variables */\nextern struct OS_XCB os_rdy;\nextern struct OS_XCB os_dly;\n\n/* Functions */\nextern void rt_put_prio(P_XCB p_CB, P_TCB p_task);\nextern P_TCB rt_get_first(P_XCB p_CB);\nextern void rt_put_rdy_first(P_TCB p_task);\nextern void rt_put_rdy_last(P_TCB p_task);\nextern P_TCB rt_get_same_rdy_prio(void);\nextern void rt_resort_prio(P_TCB p_task);\nextern void rt_put_dly(P_TCB p_task, U16 delay);\nextern void rt_dec_dly(void);\nextern void rt_rmv_list(P_TCB p_task);\nextern void rt_rmv_dly(P_TCB p_task);\nextern void rt_psq_enq(OS_ID entry, U32 arg);\n\n/* This is a fast macro generating in-line code */\n#define rt_rdy_prio(void) (os_rdy.p_lnk->prio)\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Mailbox.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MAILBOX.C\n *      Purpose: Implements waits and wake-ups for mailbox messages\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Mailbox.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_mbx_init -----------------------------------*/\n\nvoid rt_mbx_init(OS_ID mailbox, U16 mbx_size) {\n  /* Initialize a mailbox */\n  P_MCB p_MCB = mailbox;\n\n  p_MCB->cb_type = MCB;\n  p_MCB->state = 0;\n  p_MCB->isr_st = 0;\n  p_MCB->p_lnk = NULL;\n  p_MCB->first = 0;\n  p_MCB->last = 0;\n  p_MCB->count = 0;\n  p_MCB->size =\n      (mbx_size + sizeof(void *) - sizeof(struct OS_MCB)) / (U32)sizeof(void *);\n}\n\n/*--------------------------- rt_mbx_send -----------------------------------*/\n\nOS_RESULT rt_mbx_send(OS_ID mailbox, void *p_msg, U16 timeout) {\n  /* Send message to a mailbox */\n  P_MCB p_MCB = mailbox;\n  P_TCB p_TCB;\n\n  if ((p_MCB->p_lnk != NULL) && (p_MCB->state == 1)) {\n    /* A task is waiting for message */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val2(p_TCB, 0x10 /*osEventMessage*/, (U32)p_msg);\n#else\n    *p_TCB->msg = p_msg;\n    rt_ret_val(p_TCB, OS_R_MBX);\n#endif\n    rt_rmv_dly(p_TCB);\n    rt_dispatch(p_TCB);\n  } else {\n    /* Store message in mailbox queue */\n    if (p_MCB->count == p_MCB->size) {\n      /* No free message entry, wait for one. If message queue is full, */\n      /* then no task is waiting for message. The 'p_MCB->p_lnk' list   */\n      /* pointer can now be reused for send message waits task list.    */\n      if (timeout == 0) {\n        return (OS_R_TMO);\n      }\n      if (p_MCB->p_lnk != NULL) {\n        rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n      } else {\n        p_MCB->p_lnk = os_tsk.run;\n        os_tsk.run->p_lnk = NULL;\n        os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n        /* Task is waiting to send a message */\n        p_MCB->state = 2;\n      }\n      os_tsk.run->msg = p_msg;\n      rt_block(timeout, WAIT_MBX);\n      return (OS_R_TMO);\n    }\n    /* Yes, there is a free entry in a mailbox. */\n    p_MCB->msg[p_MCB->first] = p_msg;\n    rt_inc(&p_MCB->count);\n    if (++p_MCB->first == p_MCB->size) {\n      p_MCB->first = 0;\n    }\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mbx_wait -----------------------------------*/\n\nOS_RESULT rt_mbx_wait(OS_ID mailbox, void **message, U16 timeout) {\n  /* Receive a message; possibly wait for it */\n  P_MCB p_MCB = mailbox;\n  P_TCB p_TCB;\n\n  /* If a message is available in the fifo buffer */\n  /* remove it from the fifo buffer and return. */\n  if (p_MCB->count) {\n    *message = p_MCB->msg[p_MCB->last];\n    if (++p_MCB->last == p_MCB->size) {\n      p_MCB->last = 0;\n    }\n    if ((p_MCB->p_lnk != NULL) && (p_MCB->state == 2)) {\n      /* A task is waiting to send message */\n      p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n      rt_ret_val(p_TCB, OS_R_OK);\n#endif\n      p_MCB->msg[p_MCB->first] = p_TCB->msg;\n      if (++p_MCB->first == p_MCB->size) {\n        p_MCB->first = 0;\n      }\n      rt_rmv_dly(p_TCB);\n      rt_dispatch(p_TCB);\n    } else {\n      rt_dec(&p_MCB->count);\n    }\n    return (OS_R_OK);\n  }\n  /* No message available: wait for one */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  if (p_MCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n  } else {\n    p_MCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n    /* Task is waiting to receive a message */\n    p_MCB->state = 1;\n  }\n  rt_block(timeout, WAIT_MBX);\n#ifndef __CMSIS_RTOS\n  os_tsk.run->msg = message;\n#endif\n  return (OS_R_TMO);\n}\n\n/*--------------------------- rt_mbx_check ----------------------------------*/\n\nOS_RESULT rt_mbx_check(OS_ID mailbox) {\n  /* Check for free space in a mailbox. Returns the number of messages     */\n  /* that can be stored to a mailbox. It returns 0 when mailbox is full.   */\n  P_MCB p_MCB = mailbox;\n\n  return (p_MCB->size - p_MCB->count);\n}\n\n/*--------------------------- isr_mbx_send ----------------------------------*/\n\nvoid isr_mbx_send(OS_ID mailbox, void *p_msg) {\n  /* Same function as \"os_mbx_send\", but to be called by ISRs. */\n  P_MCB p_MCB = mailbox;\n\n  rt_psq_enq(p_MCB, (U32)p_msg);\n  rt_psh_req();\n}\n\n/*--------------------------- isr_mbx_receive -------------------------------*/\n\nOS_RESULT isr_mbx_receive(OS_ID mailbox, void **message) {\n  /* Receive a message in the interrupt function. The interrupt function   */\n  /* should not wait for a message since this would block the rtx os.      */\n  P_MCB p_MCB = mailbox;\n\n  if (p_MCB->count) {\n    /* A message is available in the fifo buffer. */\n    *message = p_MCB->msg[p_MCB->last];\n    if (p_MCB->state == 2) {\n      /* A task is locked waiting to send message */\n      rt_psq_enq(p_MCB, 0);\n      rt_psh_req();\n    }\n    rt_dec(&p_MCB->count);\n    if (++p_MCB->last == p_MCB->size) {\n      p_MCB->last = 0;\n    }\n    return (OS_R_MBX);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mbx_psh ------------------------------------*/\n\nvoid rt_mbx_psh(P_MCB p_CB, void *p_msg) {\n  /* Store the message to the mailbox queue or pass it to task directly. */\n  P_TCB p_TCB;\n  void *mem;\n\n  if (p_CB->p_lnk != NULL)\n    switch (p_CB->state) {\n#ifdef __CMSIS_RTOS\n    case 3:\n      /* Task is waiting to allocate memory, remove it from the waiting list */\n      mem = rt_alloc_box(p_msg);\n      if (mem == NULL)\n        break;\n      p_TCB = rt_get_first((P_XCB)p_CB);\n      rt_ret_val(p_TCB, (U32)mem);\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n#endif\n    case 2:\n      /* Task is waiting to send a message, remove it from the waiting list */\n      p_TCB = rt_get_first((P_XCB)p_CB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n      rt_ret_val(p_TCB, OS_R_OK);\n#endif\n      p_CB->msg[p_CB->first] = p_TCB->msg;\n      rt_inc(&p_CB->count);\n      if (++p_CB->first == p_CB->size) {\n        p_CB->first = 0;\n      }\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n    case 1:\n      /* Task is waiting for a message, pass the message to the task directly */\n      p_TCB = rt_get_first((P_XCB)p_CB);\n#ifdef __CMSIS_RTOS\n      rt_ret_val2(p_TCB, 0x10 /*osEventMessage*/, (U32)p_msg);\n#else\n      *p_TCB->msg = p_msg;\n      rt_ret_val(p_TCB, OS_R_MBX);\n#endif\n      p_TCB->state = READY;\n      rt_rmv_dly(p_TCB);\n      rt_put_prio(&os_rdy, p_TCB);\n      break;\n    }\n  else {\n    /* No task is waiting for a message, store it to the mailbox queue */\n    if (p_CB->count < p_CB->size) {\n      p_CB->msg[p_CB->first] = p_msg;\n      rt_inc(&p_CB->count);\n      if (++p_CB->first == p_CB->size) {\n        p_CB->first = 0;\n      }\n    } else {\n      os_error(OS_ERR_MBX_OVF);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Mailbox.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MAILBOX.H\n *      Purpose: Implements waits and wake-ups for mailbox messages\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n/* Functions */\nextern void rt_mbx_init(OS_ID mailbox, U16 mbx_size);\nextern OS_RESULT rt_mbx_send(OS_ID mailbox, void *p_msg, U16 timeout);\nextern OS_RESULT rt_mbx_wait(OS_ID mailbox, void **message, U16 timeout);\nextern OS_RESULT rt_mbx_check(OS_ID mailbox);\nextern void isr_mbx_send(OS_ID mailbox, void *p_msg);\nextern OS_RESULT isr_mbx_receive(OS_ID mailbox, void **message);\nextern void rt_mbx_psh(P_MCB p_CB, void *p_msg);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_MemBox.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MEMBOX.C\n *      Purpose: Interface functions for fixed memory block management system\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_MemBox.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_System.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- _init_box -------------------------------------*/\n\nint _init_box(void *box_mem, U32 box_size, U32 blk_size) {\n  /* Initialize memory block system, returns 0 if OK, 1 if fails. */\n  void *end;\n  void *blk;\n  void *next;\n  U32 sizeof_bm;\n\n  /* Create memory structure. */\n  if (blk_size & BOX_ALIGN_8) {\n    /* Memory blocks 8-byte aligned. */\n    blk_size = ((blk_size & ~BOX_ALIGN_8) + 7) & ~7;\n    sizeof_bm = (sizeof(struct OS_BM) + 7) & ~7;\n  } else {\n    /* Memory blocks 4-byte aligned. */\n    blk_size = (blk_size + 3) & ~3;\n    sizeof_bm = sizeof(struct OS_BM);\n  }\n  if (blk_size == 0) {\n    return (1);\n  }\n  if ((blk_size + sizeof_bm) > box_size) {\n    return (1);\n  }\n  /* Create a Memory structure. */\n  blk = ((U8 *)box_mem) + sizeof_bm;\n  ((P_BM)box_mem)->free = blk;\n  end = ((U8 *)box_mem) + box_size;\n  ((P_BM)box_mem)->end = end;\n  ((P_BM)box_mem)->blk_size = blk_size;\n\n  /* Link all free blocks using offsets. */\n  end = ((U8 *)end) - blk_size;\n  while (1) {\n    next = ((U8 *)blk) + blk_size;\n    if (next > end)\n      break;\n    *((void **)blk) = next;\n    blk = next;\n  }\n  /* end marker */\n  *((void **)blk) = 0;\n  return (0);\n}\n\n/*--------------------------- rt_alloc_box ----------------------------------*/\n\nvoid *rt_alloc_box(void *box_mem) {\n  /* Allocate a memory block and return start address. */\n  void **free;\n#ifndef __USE_EXCLUSIVE_ACCESS\n  int irq_dis;\n\n  irq_dis = __disable_irq();\n  free = ((P_BM)box_mem)->free;\n  if (free) {\n    ((P_BM)box_mem)->free = *free;\n  }\n  if (!irq_dis)\n    __enable_irq();\n#else\n  do {\n    if ((free = (void **)__ldrex(&((P_BM)box_mem)->free)) == 0) {\n      __clrex();\n      break;\n    }\n  } while (__strex((U32)*free, &((P_BM)box_mem)->free));\n#endif\n  return (free);\n}\n\n/*--------------------------- _calloc_box -----------------------------------*/\n\nvoid *_calloc_box(void *box_mem) {\n  /* Allocate a 0-initialized memory block and return start address. */\n  void *free;\n  U32 *p;\n  U32 i;\n\n  free = _alloc_box(box_mem);\n  if (free) {\n    p = free;\n    for (i = ((P_BM)box_mem)->blk_size; i; i -= 4) {\n      *p = 0;\n      p++;\n    }\n  }\n  return (free);\n}\n\n/*--------------------------- rt_free_box -----------------------------------*/\n\nint rt_free_box(void *box_mem, void *box) {\n  /* Free a memory block, returns 0 if OK, 1 if box does not belong to box_mem\n   */\n#ifndef __USE_EXCLUSIVE_ACCESS\n  int irq_dis;\n#endif\n\n  if (box < box_mem || box >= ((P_BM)box_mem)->end) {\n    return (1);\n  }\n\n#ifndef __USE_EXCLUSIVE_ACCESS\n  irq_dis = __disable_irq();\n  *((void **)box) = ((P_BM)box_mem)->free;\n  ((P_BM)box_mem)->free = box;\n  if (!irq_dis)\n    __enable_irq();\n#else\n  do {\n    *((void **)box) = (void *)__ldrex(&((P_BM)box_mem)->free);\n  } while (__strex((U32)box, &((P_BM)box_mem)->free));\n#endif\n  return (0);\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_MemBox.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MEMBOX.H\n *      Purpose: Interface functions for fixed memory block management system\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n/* Functions */\n#define rt_init_box _init_box\n#define rt_calloc_box _calloc_box\nextern int _init_box(void *box_mem, U32 box_size, U32 blk_size);\nextern void *rt_alloc_box(void *box_mem);\nextern void *_calloc_box(void *box_mem);\nextern int rt_free_box(void *box_mem, void *box);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Mutex.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MUTEX.C\n *      Purpose: Implements mutex synchronization objects\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Mutex.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_mut_init -----------------------------------*/\n\nvoid rt_mut_init(OS_ID mutex) {\n  /* Initialize a mutex object */\n  P_MUCB p_MCB = mutex;\n\n  p_MCB->cb_type = MUCB;\n  p_MCB->prio = 0;\n  p_MCB->level = 0;\n  p_MCB->p_lnk = NULL;\n  p_MCB->owner = NULL;\n}\n\n/*--------------------------- rt_mut_delete ---------------------------------*/\n\n#ifdef __CMSIS_RTOS\nOS_RESULT rt_mut_delete(OS_ID mutex) {\n  /* Delete a mutex object */\n  P_MUCB p_MCB = mutex;\n  P_TCB p_TCB;\n\n  /* Restore owner task's priority. */\n  if (p_MCB->level != 0) {\n    p_MCB->owner->prio = p_MCB->prio;\n    if (p_MCB->owner != os_tsk.run) {\n      rt_resort_prio(p_MCB->owner);\n    }\n  }\n\n  while (p_MCB->p_lnk != NULL) {\n    /* A task is waiting for mutex. */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n    rt_ret_val(p_TCB, 0 /*osOK*/);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n    rt_put_prio(&os_rdy, p_TCB);\n  }\n\n  if (os_rdy.p_lnk && (os_rdy.p_lnk->prio > os_tsk.run->prio)) {\n    /* preempt running task */\n    rt_put_prio(&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_dispatch(NULL);\n  }\n\n  p_MCB->cb_type = 0;\n\n  return (OS_R_OK);\n}\n#endif\n\n/*--------------------------- rt_mut_release --------------------------------*/\n\nOS_RESULT rt_mut_release(OS_ID mutex) {\n  /* Release a mutex object */\n  P_MUCB p_MCB = mutex;\n  P_TCB p_TCB;\n\n  if (p_MCB->level == 0 || p_MCB->owner != os_tsk.run) {\n    /* Unbalanced mutex release or task is not the owner */\n    return (OS_R_NOK);\n  }\n  if (--p_MCB->level != 0) {\n    return (OS_R_OK);\n  }\n  /* Restore owner task's priority. */\n  os_tsk.run->prio = p_MCB->prio;\n  if (p_MCB->p_lnk != NULL) {\n    /* A task is waiting for mutex. */\n    p_TCB = rt_get_first((P_XCB)p_MCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 0 /*osOK*/);\n#else\n    rt_ret_val(p_TCB, OS_R_MUT);\n#endif\n    rt_rmv_dly(p_TCB);\n    /* A waiting task becomes the owner of this mutex. */\n    p_MCB->level = 1;\n    p_MCB->owner = p_TCB;\n    p_MCB->prio = p_TCB->prio;\n    /* Priority inversion, check which task continues. */\n    if (os_tsk.run->prio >= rt_rdy_prio()) {\n      rt_dispatch(p_TCB);\n    } else {\n      /* Ready task has higher priority than running task. */\n      rt_put_prio(&os_rdy, os_tsk.run);\n      rt_put_prio(&os_rdy, p_TCB);\n      os_tsk.run->state = READY;\n      p_TCB->state = READY;\n      rt_dispatch(NULL);\n    }\n  } else {\n    /* Check if own priority raised by priority inversion. */\n    if (rt_rdy_prio() > os_tsk.run->prio) {\n      rt_put_prio(&os_rdy, os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_dispatch(NULL);\n    }\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_mut_wait -----------------------------------*/\n\nOS_RESULT rt_mut_wait(OS_ID mutex, U16 timeout) {\n  /* Wait for a mutex, continue when mutex is free. */\n  P_MUCB p_MCB = mutex;\n\n  if (p_MCB->level == 0) {\n    p_MCB->owner = os_tsk.run;\n    p_MCB->prio = os_tsk.run->prio;\n    goto inc;\n  }\n  if (p_MCB->owner == os_tsk.run) {\n    /* OK, running task is the owner of this mutex. */\n  inc:\n    p_MCB->level++;\n    return (OS_R_OK);\n  }\n  /* Mutex owned by another task, wait until released. */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  /* Raise the owner task priority if lower than current priority. */\n  /* This priority inversion is called priority inheritance.       */\n  if (p_MCB->prio < os_tsk.run->prio) {\n    p_MCB->owner->prio = os_tsk.run->prio;\n    rt_resort_prio(p_MCB->owner);\n  }\n  if (p_MCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_MCB, os_tsk.run);\n  } else {\n    p_MCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_MCB;\n  }\n  rt_block(timeout, WAIT_MUT);\n  return (OS_R_TMO);\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Mutex.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_MUTEX.H\n *      Purpose: Implements mutex synchronization objects\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n/* Functions */\nextern void      rt_mut_init    (OS_ID mutex);\nextern OS_RESULT rt_mut_delete  (OS_ID mutex);\nextern OS_RESULT rt_mut_release (OS_ID mutex);\nextern OS_RESULT rt_mut_wait    (OS_ID mutex, U16 timeout);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Robin.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_ROBIN.C\n *      Purpose: Round Robin Task switching\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Robin.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\nstruct OS_ROBIN os_robin;\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_init_robin ---------------------------------*/\n\n__weak void rt_init_robin(void) {\n  /* Initialize Round Robin variables. */\n  os_robin.task = NULL;\n  os_robin.tout = (U16)os_rrobin;\n}\n\n/*--------------------------- rt_chk_robin ----------------------------------*/\n\n__weak void rt_chk_robin(void) {\n  /* Check if Round Robin timeout expired and switch to the next ready task.*/\n  P_TCB p_new;\n\n  if (os_robin.task != os_rdy.p_lnk) {\n    /* New task was suspended, reset Round Robin timeout. */\n    os_robin.task = os_rdy.p_lnk;\n    os_robin.time = (U16)os_time + os_robin.tout - 1;\n  }\n  if (os_robin.time == (U16)os_time) {\n    /* Round Robin timeout has expired, swap Robin tasks. */\n    os_robin.task = NULL;\n    p_new = rt_get_first(&os_rdy);\n    rt_put_prio((P_XCB)&os_rdy, p_new);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Robin.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_ROBIN.H\n *      Purpose: Round Robin Task switching definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n/* Variables */\nextern struct OS_ROBIN os_robin;\n\n/* Functions */\nextern void rt_init_robin (void);\nextern void rt_chk_robin  (void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Semaphore.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SEMAPHORE.C\n *      Purpose: Implements binary and counting semaphores\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Semaphore.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_System.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_sem_init -----------------------------------*/\n\nvoid rt_sem_init(OS_ID semaphore, U16 token_count) {\n  /* Initialize a semaphore */\n  P_SCB p_SCB = semaphore;\n\n  p_SCB->cb_type = SCB;\n  p_SCB->p_lnk = NULL;\n  p_SCB->tokens = token_count;\n}\n\n/*--------------------------- rt_sem_delete ---------------------------------*/\n\n#ifdef __CMSIS_RTOS\nOS_RESULT rt_sem_delete(OS_ID semaphore) {\n  /* Delete semaphore */\n  P_SCB p_SCB = semaphore;\n  P_TCB p_TCB;\n\n  while (p_SCB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_SCB);\n    rt_ret_val(p_TCB, 0);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n    rt_put_prio(&os_rdy, p_TCB);\n  }\n\n  if (os_rdy.p_lnk && (os_rdy.p_lnk->prio > os_tsk.run->prio)) {\n    /* preempt running task */\n    rt_put_prio(&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_dispatch(NULL);\n  }\n\n  p_SCB->cb_type = 0;\n\n  return (OS_R_OK);\n}\n#endif\n\n/*--------------------------- rt_sem_send -----------------------------------*/\n\nOS_RESULT rt_sem_send(OS_ID semaphore) {\n  /* Return a token to semaphore */\n  P_SCB p_SCB = semaphore;\n  P_TCB p_TCB;\n\n  if (p_SCB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_SCB);\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 1);\n#else\n    rt_ret_val(p_TCB, OS_R_SEM);\n#endif\n    rt_rmv_dly(p_TCB);\n    rt_dispatch(p_TCB);\n  } else {\n    /* Store token. */\n    p_SCB->tokens++;\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_sem_wait -----------------------------------*/\n\nOS_RESULT rt_sem_wait(OS_ID semaphore, U16 timeout) {\n  /* Obtain a token; possibly wait for it */\n  P_SCB p_SCB = semaphore;\n\n  if (p_SCB->tokens) {\n    p_SCB->tokens--;\n    return (OS_R_OK);\n  }\n  /* No token available: wait for one */\n  if (timeout == 0) {\n    return (OS_R_TMO);\n  }\n  if (p_SCB->p_lnk != NULL) {\n    rt_put_prio((P_XCB)p_SCB, os_tsk.run);\n  } else {\n    p_SCB->p_lnk = os_tsk.run;\n    os_tsk.run->p_lnk = NULL;\n    os_tsk.run->p_rlnk = (P_TCB)p_SCB;\n  }\n  rt_block(timeout, WAIT_SEM);\n  return (OS_R_TMO);\n}\n\n/*--------------------------- isr_sem_send ----------------------------------*/\n\nvoid isr_sem_send(OS_ID semaphore) {\n  /* Same function as \"os_sem\"send\", but to be called by ISRs */\n  P_SCB p_SCB = semaphore;\n\n  rt_psq_enq(p_SCB, 0);\n  rt_psh_req();\n}\n\n/*--------------------------- rt_sem_psh ------------------------------------*/\n\nvoid rt_sem_psh(P_SCB p_CB) {\n  /* Check if task has to be waken up */\n  P_TCB p_TCB;\n\n  if (p_CB->p_lnk != NULL) {\n    /* A task is waiting for token */\n    p_TCB = rt_get_first((P_XCB)p_CB);\n    rt_rmv_dly(p_TCB);\n    p_TCB->state = READY;\n#ifdef __CMSIS_RTOS\n    rt_ret_val(p_TCB, 1);\n#else\n    rt_ret_val(p_TCB, OS_R_SEM);\n#endif\n    rt_put_prio(&os_rdy, p_TCB);\n  } else {\n    /* Store token */\n    p_CB->tokens++;\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Semaphore.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SEMAPHORE.H\n *      Purpose: Implements binary and counting semaphores\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n/* Functions */\nextern void rt_sem_init(OS_ID semaphore, U16 token_count);\nextern OS_RESULT rt_sem_delete(OS_ID semaphore);\nextern OS_RESULT rt_sem_send(OS_ID semaphore);\nextern OS_RESULT rt_sem_wait(OS_ID semaphore, U16 timeout);\nextern void isr_sem_send(OS_ID semaphore);\nextern void rt_sem_psh(P_SCB p_CB);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_System.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SYSTEM.C\n *      Purpose: System Task Manager\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_System.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_Event.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_Mailbox.h\"\n#include \"rt_Robin.h\"\n#include \"rt_Semaphore.h\"\n#include \"rt_Task.h\"\n#include \"rt_Time.h\"\n#include \"rt_TypeDef.h\"\n\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n\nextern void sysTimerTick(void);\nextern uint32_t rt_timer_delay_count(void);\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\nint os_tick_irqn;\n\n/*----------------------------------------------------------------------------\n *      Local Variables\n *---------------------------------------------------------------------------*/\n\nstatic volatile BIT os_lock;\nstatic volatile BIT os_psh_flag;\nstatic U8 pend_flags;\nstatic U32 systick_lock_tick;\nstatic U32 systick_lock_ts;\n\n/*----------------------------------------------------------------------------\n *      Global Functions\n *---------------------------------------------------------------------------*/\n\n#if defined(__CC_ARM)\n__asm void $$RTX$$version(void) {\n  /* Export a version number symbol for a version control. */\n\n  EXPORT __RL_RTX_VER\n\n      __RL_RTX_VER EQU 0x450\n}\n#endif\n\n/*--------------------------- rt_suspend ------------------------------------*/\nU32 rt_suspend(void) {\n  /* Suspend OS scheduler */\n  U32 delta = 0xFFFF;\n  U32 start_tick;\n\n  __disable_irq();\n  start_tick = NVIC_ST_CURRENT;\n  rt_tsk_lock();\n  systick_lock_tick = NVIC_ST_CURRENT;\n  systick_lock_ts = hal_sys_timer_get();\n  if (start_tick != 0 &&\n      (systick_lock_tick == 0 || start_tick < systick_lock_tick)) {\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 1)\n    TRACE(6, \"[%u/0x%X][%2u/%u] rt_suspend corner case: %02u -> %02u\",\n          TICKS_TO_MS(hal_sys_timer_get()), hal_sys_timer_get(),\n          NVIC_ST_CURRENT, os_time, start_tick, systick_lock_tick);\n#endif\n    pend_flags |= 1;\n  }\n  if (pend_flags) {\n    delta = 0;\n  }\n  __enable_irq();\n\n  if (delta == 0) {\n    return 0;\n  }\n\n  if (os_dly.p_dlnk) {\n    delta = os_dly.delta_time;\n  }\n#ifdef __CMSIS_RTOS\n  {\n    uint32_t tcnt = rt_timer_delay_count();\n    if (tcnt && tcnt < delta) {\n      delta = tcnt;\n    }\n  }\n#else\n  if (os_tmr.next) {\n    if (os_tmr.tcnt < delta)\n      delta = os_tmr.tcnt;\n  }\n#endif\n\n  return (delta);\n}\n\n/*--------------------------- rt_resume -------------------------------------*/\nvoid rt_resume(U32 sleep_time) {\n  /* Resume OS scheduler after suspend */\n  // P_TCB next;\n  U32 delta;\n  U32 resume_ts;\n  U32 unlock_ts;\n  U32 systick_remain;\n  U32 sleep_ticks;\n  U8 tick_running = 0;\n  const U32 reload = (NVIC_ST_RELOAD + 1);\n\n  __disable_irq();\n  resume_ts = hal_sys_timer_get();\n  __enable_irq();\n\n  sleep_ticks = (resume_ts - systick_lock_ts) *\n                (OS_CLOCK_NOMINAL / CONFIG_SYSTICK_HZ_NOMINAL);\n  if (systick_lock_tick == 0) {\n    sleep_time = sleep_ticks / reload;\n    systick_remain = reload - sleep_ticks % reload;\n  } else if (sleep_ticks >= systick_lock_tick) {\n    delta = sleep_ticks - systick_lock_tick;\n    sleep_time = delta / reload + 1;\n    systick_remain = reload - delta % reload;\n  } else {\n    sleep_time = 0;\n    systick_remain = systick_lock_tick - sleep_ticks;\n  }\n\n  if (sleep_time == 0) {\n    tick_running = 1;\n    goto _task_unlock;\n  }\n\n  // Task switching is allowed in SVC/PENDSV/SYSTICK handlers only\n#if 0\n  os_tsk.run->state = READY;\n  rt_put_rdy_first (os_tsk.run);\n#endif\n\n_inc_sleep_time:\n\n  os_robin.task = NULL;\n\n  if (sleep_time) {\n    /* Update delays. */\n    if (os_dly.p_dlnk) {\n      delta = sleep_time;\n      if (delta >= os_dly.delta_time) {\n        delta -= os_dly.delta_time;\n        os_time += os_dly.delta_time;\n        os_dly.delta_time = 1;\n        while (os_dly.p_dlnk) {\n          rt_dec_dly();\n          if (delta == 0)\n            break;\n          delta--;\n          os_time++;\n        }\n        while (delta) {\n          delta--;\n          os_time++;\n        }\n        rt_psh_req();\n      } else {\n        os_time += delta;\n        os_dly.delta_time -= delta;\n      }\n    } else {\n      os_time += sleep_time;\n    }\n\n    os_idle_TCB.rtime += sleep_time;\n#ifdef __CMSIS_RTOS\n    delta = sleep_time;\n    while (delta && rt_timer_delay_count()) {\n      sysTimerTick();\n      delta--;\n    }\n#else\n    /* Check the user timers. */\n    if (os_tmr.next) {\n      delta = sleep_time;\n      if (delta >= os_tmr.tcnt) {\n        delta -= os_tmr.tcnt;\n        os_tmr.tcnt = 1;\n        while (os_tmr.next) {\n          rt_tmr_tick();\n          if (delta == 0)\n            break;\n          delta--;\n        }\n      } else {\n        os_tmr.tcnt -= delta;\n      }\n    }\n#endif\n  } // sleep_time\n\n  // Task switching is allowed in SVC/PENDSV/SYSTICK handlers only\n#if 0\n  /* Switch back to highest ready task */\n  next = rt_get_first (&os_rdy);\n  rt_switch_req (next);\n#endif\n\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 1)\n  if (sleep_time > 0) {\n    TRACE(7,\n          \"[%u/0x%X][%2u/%u] rt_resume: sleep_ticks=%u sleep_time=%u \"\n          \"systick_remain=%u\",\n          TICKS_TO_MS(hal_sys_timer_get()), hal_sys_timer_get(),\n          NVIC_ST_CURRENT, os_time, sleep_ticks, sleep_time, systick_remain);\n  }\n#endif\n\n_task_unlock:\n\n  sleep_time = 0;\n\n  __disable_irq();\n  // Handle corner case: systick counter wraps inside rt_resume()\n  unlock_ts = hal_sys_timer_get();\n  sleep_ticks = (unlock_ts - resume_ts) * 2;\n  // systick_remain value range: [1, reload]\n  if (sleep_ticks >= systick_remain) {\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 1)\n    TRACE(6,\n          \"[%u/0x%X][%2u/%u] rt_resume corner case: sleep_ticks=%u \"\n          \"systick_remain=%u\",\n          TICKS_TO_MS(hal_sys_timer_get()), hal_sys_timer_get(),\n          NVIC_ST_CURRENT, os_time, sleep_ticks, systick_remain);\n    // Update timestamp since traces also consume time\n    unlock_ts = hal_sys_timer_get();\n    sleep_ticks = (unlock_ts - resume_ts) *\n                  (OS_CLOCK_NOMINAL / CONFIG_SYSTICK_HZ_NOMINAL);\n#endif\n    delta = sleep_ticks - systick_remain;\n    sleep_time = delta / reload + 1;\n    systick_remain = reload - delta % reload;\n    resume_ts = unlock_ts;\n  } else {\n    if (tick_running == 0) {\n      systick_remain -= sleep_ticks;\n      // Adjust systick_remain value range to [0, reload - 1]\n      if (systick_remain == reload) {\n        systick_remain = 0;\n      }\n      if (systick_remain) {\n        NVIC_ST_RELOAD = systick_remain;\n        NVIC_ST_CURRENT = 0;\n        while (NVIC_ST_CURRENT == 0)\n          ;\n        NVIC_ST_RELOAD = reload - 1;\n      } else {\n        NVIC_ST_CURRENT = 0;\n      }\n    }\n    rt_tsk_unlock();\n  }\n  __enable_irq();\n\n  if (sleep_time) {\n    goto _inc_sleep_time;\n  }\n}\n\n/*--------------------------- rt_tsk_lock -----------------------------------*/\n\nvoid rt_tsk_lock(void) {\n  /* Prevent task switching by locking out scheduler */\n  if (os_tick_irqn < 0) {\n    OS_LOCK();\n    os_lock = __TRUE;\n    OS_UNPEND(&pend_flags);\n  } else {\n    OS_X_LOCK(os_tick_irqn);\n    os_lock = __TRUE;\n    OS_X_UNPEND(&pend_flags);\n  }\n}\n\n/*--------------------------- rt_tsk_unlock ---------------------------------*/\n\nvoid rt_tsk_unlock(void) {\n  /* Unlock scheduler and re-enable task switching */\n  if (os_tick_irqn < 0) {\n    OS_UNLOCK();\n    os_lock = __FALSE;\n    OS_PEND(pend_flags, os_psh_flag);\n    os_psh_flag = __FALSE;\n  } else {\n    OS_X_UNLOCK(os_tick_irqn);\n    os_lock = __FALSE;\n    OS_X_PEND(pend_flags, os_psh_flag);\n    os_psh_flag = __FALSE;\n  }\n  // Allow cpu sleep\n  hal_cpu_wake_unlock(HAL_CPU_WAKE_LOCK_USER_RTOS);\n}\n\n/*--------------------------- rt_psh_req ------------------------------------*/\n\nvoid rt_psh_req(void) {\n  /* Initiate a post service handling request if required. */\n  if (os_lock == __FALSE) {\n    OS_PEND_IRQ();\n  } else {\n    os_psh_flag = __TRUE;\n    // Prohibit cpu sleep when an OS service request is enqueued during os lock\n    // (rt_suspend)\n    hal_cpu_wake_lock(HAL_CPU_WAKE_LOCK_USER_RTOS);\n  }\n}\n\n/*--------------------------- rt_pop_req ------------------------------------*/\n\nvoid rt_pop_req(void) {\n  /* Process an ISR post service requests. */\n  struct OS_XCB *p_CB;\n  P_TCB next;\n  U32 idx;\n\n  os_tsk.run->state = READY;\n  if (os_tsk.run == &os_idle_TCB) {\n    rt_put_rdy_last(os_tsk.run);\n  } else {\n    rt_put_rdy_first(os_tsk.run);\n  }\n\n  idx = os_psq->last;\n  while (os_psq->count) {\n    p_CB = os_psq->q[idx].id;\n    if (p_CB->cb_type == TCB) {\n      /* Is of TCB type */\n      rt_evt_psh((P_TCB)p_CB, (U16)os_psq->q[idx].arg);\n    } else if (p_CB->cb_type == MCB) {\n      /* Is of MCB type */\n      rt_mbx_psh((P_MCB)p_CB, (void *)os_psq->q[idx].arg);\n    } else {\n      /* Must be of SCB type */\n      rt_sem_psh((P_SCB)p_CB);\n    }\n    if (++idx == os_psq->size)\n      idx = 0;\n    rt_dec(&os_psq->count);\n  }\n  os_psq->last = idx;\n\n  next = rt_get_first(&os_rdy);\n  rt_switch_req(next);\n}\n\n/*--------------------------- os_tick_init ----------------------------------*/\n\n__weak int os_tick_init(void) {\n  /* Initialize SysTick timer as system tick timer. */\n  rt_systick_init();\n  return (-1); /* Return IRQ number of SysTick timer */\n}\n\n/*--------------------------- os_tick_irqack --------------------------------*/\n\n__weak void os_tick_irqack(void) { /* Acknowledge timer interrupt. */\n}\n\n/*--------------------------- rt_systick ------------------------------------*/\nvoid rt_systick(void) {\n  /* Check for system clock update, suspend running task. */\n  P_TCB next;\n\n#if __RTX_CPU_STATISTICS__\n  os_tsk.run->rtime += 1;\n#endif\n\n  os_tsk.run->state = READY;\n  rt_put_rdy_first(os_tsk.run);\n\n  /* Check Round Robin timeout. */\n  rt_chk_robin();\n\n  /* Update delays. */\n  os_time++;\n  rt_dec_dly();\n\n  /* Check the user timers. */\n#ifdef __CMSIS_RTOS\n  sysTimerTick();\n#else\n  rt_tmr_tick();\n#endif\n\n  /* Switch back to highest ready task */\n  next = rt_get_first(&os_rdy);\n  rt_switch_req(next);\n}\n\n/*--------------------------- rt_stk_check ----------------------------------*/\n__weak void rt_stk_check(void) {\n  /* Check for stack overflow. */\n  if (os_tsk.run->task_id == 0x01) {\n    // TODO: For the main thread the check should be done against the main heap\n    // pointer\n  } else {\n    if ((os_tsk.run->tsk_stack < (U32)os_tsk.run->stack) ||\n        (os_tsk.run->stack[0] != MAGIC_WORD)) {\n      os_error(OS_ERR_STK_OVF);\n    }\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_System.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_SYSTEM.H\n *      Purpose: System Task Manager definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n/* Variables */\n#define os_psq ((P_PSQ)&os_fifo)\nextern int os_tick_irqn;\n\n/* Functions */\nextern U32 rt_suspend(void);\nextern void rt_resume(U32 sleep_time);\nextern void rt_tsk_lock(void);\nextern void rt_tsk_unlock(void);\nextern void rt_psh_req(void);\nextern void rt_pop_req(void);\nextern void rt_systick(void);\nextern void rt_stk_check(void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Task.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TASK.C\n *      Purpose: Task functions and system start up.\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Task.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_HAL_CM.h\"\n#include \"rt_List.h\"\n#include \"rt_MemBox.h\"\n#include \"rt_Robin.h\"\n#include \"rt_System.h\"\n#include \"rt_TypeDef.h\"\n\n#include \"hal_timer.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* Running and next task info. */\nstruct OS_TSK os_tsk;\n\n/* Task Control Blocks of idle demon */\nstruct OS_TCB os_idle_TCB;\n\nstatic U32 rtx_get_hwticks(void) { return hal_sys_timer_get(); }\n\n/*----------------------------------------------------------------------------\n *      Local Functions\n *---------------------------------------------------------------------------*/\n\nOS_TID rt_get_TID(void) {\n  U32 tid;\n\n  for (tid = 1; tid <= os_maxtaskrun; tid++) {\n    if (os_active_TCB[tid - 1] == NULL) {\n      return ((OS_TID)tid);\n    }\n  }\n  return (0);\n}\n\n#if defined(__CC_ARM) && !defined(__MICROLIB)\n/*--------------------------- __user_perthread_libspace ---------------------*/\nextern void *__libspace_start;\n\nvoid *__user_perthread_libspace(void) {\n  /* Provide a separate libspace for each task. */\n  if (os_tsk.run == NULL) {\n    /* RTX not running yet. */\n    return (&__libspace_start);\n  }\n  return (void *)(os_tsk.run->std_libspace);\n}\n#endif\n\n/*--------------------------- rt_init_context -------------------------------*/\n\nvoid rt_init_context(P_TCB p_TCB, U8 priority, FUNCP task_body) {\n  /* Initialize general part of the Task Control Block. */\n  p_TCB->cb_type = TCB;\n  p_TCB->state = READY;\n  p_TCB->prio = priority;\n  p_TCB->p_lnk = NULL;\n  p_TCB->p_rlnk = NULL;\n  p_TCB->p_dlnk = NULL;\n  p_TCB->p_blnk = NULL;\n  p_TCB->delta_time = 0;\n  p_TCB->interval_time = 0;\n  p_TCB->events = 0;\n  p_TCB->waits = 0;\n  p_TCB->stack_frame = 0;\n\n  rt_init_stack(p_TCB, task_body);\n}\n\n/*--------------------------- rt_switch_req ---------------------------------*/\n\nvoid rt_switch_req(P_TCB p_new) {\n  /* Switch to next task (identified by \"p_new\"). */\n  os_tsk.new_tsk = p_new;\n#if __RTX_CPU_STATISTICS__\n  if (os_tsk.run != p_new) {\n    os_tsk.run->swap_out_time = HWTICKS_TO_MS(rtx_get_hwticks());\n    p_new->swap_in_time = HWTICKS_TO_MS(rtx_get_hwticks());\n  }\n#endif\n  p_new->state = RUNNING;\n  DBG_TASK_SWITCH(p_new->task_id);\n}\n\n/*--------------------------- rt_dispatch -----------------------------------*/\n\nvoid rt_dispatch(P_TCB next_TCB) {\n  /* Dispatch next task if any identified or dispatch highest ready task    */\n  /* \"next_TCB\" identifies a task to run or has value NULL (=no next task)  */\n  if (next_TCB == NULL) {\n    /* Running task was blocked: continue with highest ready task */\n    next_TCB = rt_get_first(&os_rdy);\n    rt_switch_req(next_TCB);\n  } else {\n    /* Check which task continues */\n    if (next_TCB->prio > os_tsk.run->prio) {\n      /* preempt running task */\n      rt_put_rdy_first(os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_switch_req(next_TCB);\n    } else {\n      /* put next task into ready list, no task switch takes place */\n      next_TCB->state = READY;\n      rt_put_prio(&os_rdy, next_TCB);\n    }\n  }\n}\n\n/*--------------------------- rt_block --------------------------------------*/\n\nvoid rt_block(U16 timeout, U8 block_state) {\n  /* Block running task and choose next ready task.                         */\n  /* \"timeout\" sets a time-out value or is 0xffff (=no time-out).           */\n  /* \"block_state\" defines the appropriate task state */\n  P_TCB next_TCB;\n\n  if (timeout) {\n    if (timeout < 0xffff) {\n      rt_put_dly(os_tsk.run, timeout);\n    }\n    os_tsk.run->state = block_state;\n    next_TCB = rt_get_first(&os_rdy);\n    rt_switch_req(next_TCB);\n  }\n}\n\n/*--------------------------- rt_tsk_pass -----------------------------------*/\n\nvoid rt_tsk_pass(void) {\n  /* Allow tasks of same priority level to run cooperatively.*/\n  P_TCB p_new;\n\n  p_new = rt_get_same_rdy_prio();\n  if (p_new != NULL) {\n    rt_put_prio((P_XCB)&os_rdy, os_tsk.run);\n    os_tsk.run->state = READY;\n    rt_switch_req(p_new);\n  }\n}\n\n/*--------------------------- rt_tsk_self -----------------------------------*/\n\nOS_TID rt_tsk_self(void) {\n  /* Return own task identifier value. */\n  if (os_tsk.run == NULL) {\n    return (0);\n  }\n  return (os_tsk.run->task_id);\n}\n\n/*--------------------------- rt_tsk_prio -----------------------------------*/\n\nOS_RESULT rt_tsk_prio(OS_TID task_id, U8 new_prio) {\n  /* Change execution priority of a task to \"new_prio\". */\n  P_TCB p_task;\n\n  if (task_id == 0) {\n    /* Change execution priority of calling task. */\n    os_tsk.run->prio = new_prio;\n  run:\n    if (rt_rdy_prio() > new_prio) {\n      rt_put_prio(&os_rdy, os_tsk.run);\n      os_tsk.run->state = READY;\n      rt_dispatch(NULL);\n    }\n    return (OS_R_OK);\n  }\n\n  /* Find the task in the \"os_active_TCB\" array. */\n  if (task_id > os_maxtaskrun || os_active_TCB[task_id - 1] == NULL) {\n    /* Task with \"task_id\" not found or not started. */\n    return (OS_R_NOK);\n  }\n  p_task = os_active_TCB[task_id - 1];\n  p_task->prio = new_prio;\n  if (p_task == os_tsk.run) {\n    goto run;\n  }\n  rt_resort_prio(p_task);\n  if (p_task->state == READY) {\n    /* Task enqueued in a ready list. */\n    p_task = rt_get_first(&os_rdy);\n    rt_dispatch(p_task);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_tsk_delete ---------------------------------*/\n\nOS_RESULT rt_tsk_delete(OS_TID task_id) {\n  /* Terminate the task identified with \"task_id\". */\n  P_TCB task_context;\n\n  if (task_id == 0 || task_id == os_tsk.run->task_id) {\n    /* Terminate itself. */\n    os_tsk.run->state = INACTIVE;\n    os_tsk.run->tsk_stack = rt_get_PSP();\n    rt_stk_check();\n    os_active_TCB[os_tsk.run->task_id - 1] = NULL;\n\n    os_tsk.run->stack = NULL;\n    DBG_TASK_NOTIFY(os_tsk.run, __FALSE);\n    os_tsk.run = NULL;\n    rt_dispatch(NULL);\n    /* The program should never come to this point. */\n  } else {\n    /* Find the task in the \"os_active_TCB\" array. */\n    if (task_id > os_maxtaskrun || os_active_TCB[task_id - 1] == NULL) {\n      /* Task with \"task_id\" not found or not started. */\n      return (OS_R_NOK);\n    }\n    task_context = os_active_TCB[task_id - 1];\n    rt_rmv_list(task_context);\n    rt_rmv_dly(task_context);\n    os_active_TCB[task_id - 1] = NULL;\n\n    task_context->stack = NULL;\n    DBG_TASK_NOTIFY(task_context, __FALSE);\n  }\n  return (OS_R_OK);\n}\n\n/*--------------------------- rt_sys_init -----------------------------------*/\n\n#ifdef __CMSIS_RTOS\nvoid rt_sys_init(void) {\n#else\nvoid rt_sys_init(FUNCP first_task, U32 prio_stksz, void *stk) {\n#endif\n  /* Initialize system and start up task declared with \"first_task\". */\n  U32 i;\n\n  DBG_INIT();\n\n  /* Initialize dynamic memory and task TCB pointers to NULL. */\n  for (i = 0; i < os_maxtaskrun; i++) {\n    os_active_TCB[i] = NULL;\n  }\n\n  /* Set up TCB of idle demon */\n  os_idle_TCB.task_id = 255;\n  os_idle_TCB.priv_stack = idle_task_stack_size;\n  os_idle_TCB.stack = idle_task_stack;\n#if __RTX_CPU_STATISTICS__\n  os_idle_TCB.name = (U8 *)\"os_idle\";\n#endif\n  rt_init_context(&os_idle_TCB, 0, os_idle_demon);\n\n  /* Set up ready list: initially empty */\n  os_rdy.cb_type = HCB;\n  os_rdy.p_lnk = NULL;\n  /* Set up delay list: initially empty */\n  os_dly.cb_type = HCB;\n  os_dly.p_dlnk = NULL;\n  os_dly.p_blnk = NULL;\n  os_dly.delta_time = 0;\n\n  /* Fix SP and systemvariables to assume idle task is running  */\n  /* Transform main program into idle task by assuming idle TCB */\n#ifndef __CMSIS_RTOS\n  rt_set_PSP(os_idle_TCB.tsk_stack + 32);\n#endif\n  os_tsk.run = &os_idle_TCB;\n  os_tsk.run->state = RUNNING;\n\n  /* Initialize ps queue */\n  os_psq->first = 0;\n  os_psq->last = 0;\n  os_psq->size = os_fifo_size;\n#if __RTX_CPU_STATISTICS__\n  os_tsk.run->swap_in_time = HWTICKS_TO_MS(rtx_get_hwticks());\n#endif\n  rt_init_robin();\n\n  /* Intitialize SVC and PendSV */\n  rt_svc_init();\n\n#ifndef __CMSIS_RTOS\n  /* Intitialize and start system clock timer */\n  os_tick_irqn = os_tick_init();\n  if (os_tick_irqn >= 0) {\n    OS_X_INIT(os_tick_irqn);\n  }\n\n  /* Start up first user task before entering the endless loop */\n  rt_tsk_create(first_task, prio_stksz, stk, NULL);\n#endif\n}\n\n/*--------------------------- rt_sys_start ----------------------------------*/\n\n#ifdef __CMSIS_RTOS\nvoid rt_sys_start(void) {\n  /* Start system */\n\n  /* Intitialize and start system clock timer */\n  os_tick_irqn = os_tick_init();\n  if (os_tick_irqn >= 0) {\n    OS_X_INIT(os_tick_irqn);\n  }\n}\n#endif\n\n//------------------------------------------------------------------------------\n// Debug functions\n//------------------------------------------------------------------------------\n\n#include \"hal_location.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n\n#define RTX_DUMP_VERBOSE\n\nstruct IRQ_STACK_FRAME_T {\n  uint32_t r0;\n  uint32_t r1;\n  uint32_t r2;\n  uint32_t r3;\n  uint32_t r12;\n  uint32_t lr;\n  uint32_t pc;\n  uint32_t xpsr;\n};\n\nextern uint32_t __StackTop[];\n\nstatic inline uint32_t get_IPSR(void) {\n  uint32_t result;\n\n  asm volatile(\"MRS %0, ipsr\" : \"=r\"(result));\n  return (result);\n}\n\nstatic inline uint32_t get_PSP(void) {\n  uint32_t result;\n\n  asm volatile(\"MRS %0, psp\" : \"=r\"(result));\n  return (result);\n}\n\nstatic inline struct IRQ_STACK_FRAME_T *_rtx_get_irq_stack_frame(P_TCB tcb) {\n  uint32_t sp;\n\n  if (tcb == NULL) {\n    return NULL;\n  }\n  if (tcb == os_tsk.run && get_IPSR() == 0) {\n    return NULL;\n  }\n  if (tcb == os_tsk.run) {\n    sp = get_PSP();\n  } else {\n    sp = tcb->tsk_stack;\n  }\n  if ((sp & 3) || !hal_trace_address_writable(sp)) {\n    return NULL;\n  }\n\n  if (tcb != os_tsk.run) {\n    // r4-r11\n    sp += 4 * 8;\n    if (tcb->stack_frame) {\n      // s16-s31\n      sp += 4 * 16;\n    }\n  }\n\n  return (struct IRQ_STACK_FRAME_T *)sp;\n}\n\nFLASH_TEXT_LOC\nvoid rt_tsk_show(P_TCB tcb) {\n  static const char *const state_list[] = {\n      \"INACTIVE\", \"READY\",    \"RUNNING\",  \"WAIT_DLY\", \"WAIT_ITV\", \"WAIT_OR\",\n      \"WAIT_AND\", \"WAIT_SEM\", \"WAIT_MBX\", \"WAIT_MUT\", \"BAD\",\n  };\n  const char *task_st_str;\n  uint32_t idx;\n  struct IRQ_STACK_FRAME_T *frame;\n\n  if (tcb) {\n    if (tcb->cb_type == TCB &&\n        ((tcb->task_id >= 1 && tcb->task_id <= os_maxtaskrun) ||\n         tcb->task_id == 255) &&\n        tcb->ptask && tcb->stack) {\n      if (tcb->state < ARRAY_SIZE(state_list)) {\n        idx = tcb->state;\n      } else {\n        idx = ARRAY_SIZE(state_list) - 1;\n      }\n      task_st_str = state_list[idx];\n      REL_TRACE_NOCRLF_NOTS(1, \"--- Task %3u\", tcb->task_id);\n\n      REL_TRACE_NOTS(4, \" tcb=0x%08X prio=%u state=%-8s ptask=0x%08X\",\n                     (uint32_t)tcb, tcb->prio, task_st_str,\n                     (uint32_t)tcb->ptask);\n#if __RTX_CPU_STATISTICS__\n      if (tcb->name || tcb->task_id == 1) {\n        REL_TRACE_NOTS(1, \"    name=%s\",\n                       tcb->name ? (const char *)tcb->name : \"main\");\n      }\n#endif\n#ifdef RTX_DUMP_VERBOSE\n      REL_TRACE_NOTS(3, \"    p_lnk=0x%08X p_rlnk=0x%08X p_dlnk=0x%08X\",\n                     (uint32_t)tcb->p_lnk, (uint32_t)tcb->p_rlnk,\n                     (uint32_t)tcb->p_dlnk);\n      REL_TRACE_NOTS(3, \"    p_blnk=0x%08X delta_time=%u interval_time=%u\",\n                     (uint32_t)tcb->p_blnk, tcb->delta_time,\n                     tcb->interval_time);\n      REL_TRACE_NOTS(3, \"    events=0x%04X waits=0x%04X msg=0x%08X\",\n                     tcb->events, tcb->waits, (uint32_t)tcb->msg);\n      REL_TRACE_NOTS(2, \"    priv_stack(stack_size)=%4u tsk_stack(sp)=0x%08X\",\n                     tcb->priv_stack, tcb->tsk_stack);\n      REL_TRACE_NOTS(3, \"    stack(top)=0x%08X stack_frame=%u stk_msk:0x%04x\",\n                     (uint32_t)tcb->stack, tcb->stack_frame, tcb->stack[0]);\n#ifdef __RTX_CPU_STATISTICS__\n      REL_TRACE_NOTS(2, \"    swap_in_time=%u swap_out_time=%u\",\n                     tcb->swap_in_time, tcb->swap_out_time);\n      REL_TRACE_NOCRLF_NOTS(0, \"    after last switch \");\n      if (tcb->swap_in_time <= tcb->swap_out_time)\n        REL_TRACE_NOTS(1, \"task runtime %u ms\",\n                       tcb->swap_out_time - tcb->swap_in_time);\n      else\n        REL_TRACE_NOTS(1, \"task still runing, now %d\",\n                       HWTICKS_TO_MS(rtx_get_hwticks()));\n#endif\n#endif /*RTX_DUMP_VERBOSE*/\n\n      frame = _rtx_get_irq_stack_frame(tcb);\n      if (frame) {\n        uint32_t stack_end;\n        uint32_t search_cnt, print_cnt;\n\n        REL_TRACE_NOTS(0, \" \");\n        REL_TRACE_NOTS(4, \"    R0 =0x%08X R1=0x%08X R2=0x%08X R3  =0x%08X\",\n                       frame->r0, frame->r1, frame->r2, frame->r3);\n        REL_TRACE_NOTS(4, \"    R12=0x%08X LR=0x%08X PC=0x%08X XPSR=0x%08X\",\n                       frame->r12, frame->lr, frame->pc, frame->xpsr);\n\n        stack_end = (uint32_t)tcb->stack + tcb->priv_stack;\n        if (stack_end > tcb->tsk_stack) {\n          search_cnt = (stack_end - tcb->tsk_stack) / 4;\n          if (search_cnt > 512) {\n            search_cnt = 512;\n          }\n          print_cnt = 10;\n          hal_trace_print_backtrace(tcb->tsk_stack, search_cnt, print_cnt);\n        }\n      }\n    } else {\n      REL_TRACE_NOTS(0, \"--- Task BAD\");\n    }\n  } else {\n    REL_TRACE_NOTS(0, \"--- Task NONE\");\n  }\n}\n\nFLASH_TEXT_LOC\nvoid rtx_show_current_thread(void) {\n  REL_TRACE_NOTS(1, \"Current Task    : %u\",\n                 os_tsk.run ? os_tsk.run->task_id : 0);\n  REL_TRACE_NOTS(1, \"New Running Task: %u\",\n                 os_tsk.new_tsk ? os_tsk.new_tsk->task_id : 0);\n  REL_TRACE_IMM_NOTS(0, \" \");\n}\n\nFLASH_TEXT_LOC\nvoid rtx_show_ready_threads(void) {\n  P_TCB tcb;\n  uint32_t i;\n\n  REL_TRACE_NOTS(0, \"Ready Tasks:\");\n  if (os_rdy.p_lnk) {\n    tcb = os_rdy.p_lnk;\n    i = 0;\n    do {\n      REL_TRACE_NOCRLF_NOTS(1, \"%u \", tcb->task_id);\n      tcb = tcb->p_lnk;\n      i++;\n    } while (tcb && i < os_maxtaskrun);\n    REL_TRACE_NOTS(0, \" \");\n    if (tcb) {\n      REL_TRACE_NOTS(2, \"*** Error: List corrupted? count=%u next=0x%08X\\n\", i,\n                     (uint32_t)tcb);\n    }\n  } else {\n    REL_TRACE_NOTS(0, \"\");\n  }\n  REL_TRACE_IMM_NOTS(0, \" \");\n}\n\nFLASH_TEXT_LOC\nvoid rtx_show_delay_threads(void) {\n  P_TCB tcb;\n  uint32_t i;\n\n  REL_TRACE_NOTS(0, \"Delay Tasks:\");\n  if (os_dly.p_dlnk) {\n    tcb = os_dly.p_dlnk;\n    i = 0;\n    do {\n      REL_TRACE_NOCRLF_NOTS(1, \"%u \", tcb->task_id);\n      tcb = tcb->p_dlnk;\n      i++;\n    } while (tcb && i < os_maxtaskrun);\n    REL_TRACE_NOTS(0, \" \");\n    if (tcb) {\n      REL_TRACE_NOTS(2, \"*** Error: List corrupted? count=%u next=0x%08X\\n\", i,\n                     (uint32_t)tcb);\n    }\n  } else {\n    REL_TRACE_NOTS(0, \"\");\n  }\n  REL_TRACE_IMM_NOTS(0, \" \");\n}\n\nFLASH_TEXT_LOC\nvoid rtx_show_all_threads(void) {\n  int i;\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n  if (hal_trace_crash_dump_onprocess()) {\n    for (i = 0; i < 10; i++) {\n      REL_TRACE_IMM_NOTS(0, \"                                                  \"\n                            \"                      \");\n      REL_TRACE_IMM_NOTS(0, \"                                                  \"\n                            \"                      \\n\");\n      hal_sys_timer_delay(MS_TO_TICKS(200));\n    }\n  }\n#endif\n\n  REL_TRACE_NOTS(0, \"Task List:\");\n  for (i = 0; i < os_maxtaskrun; i++) {\n    if (os_active_TCB[i]) {\n      rt_tsk_show(os_active_TCB[i]);\n      REL_TRACE_IMM_NOTS(0, \" \");\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n      if (hal_trace_crash_dump_onprocess()) {\n        hal_sys_timer_delay(MS_TO_TICKS(500));\n      }\n#endif\n    }\n  }\n  rt_tsk_show(&os_idle_TCB);\n  REL_TRACE_IMM_NOTS(0, \" \");\n\n  rtx_show_current_thread();\n  rtx_show_ready_threads();\n  rtx_show_delay_threads();\n}\n\n#if __RTX_CPU_STATISTICS__\n\n#if TASK_HUNG_CHECK_ENABLED\nFLASH_TEXT_LOC NOINLINE static void print_hung_task(const P_TCB tcb,\n                                                    U32 curr_time) {\n  REL_TRACE_IMM_NOTS(2, \"Task \\\"%s\\\" blocked for %dms\",\n                     tcb->name == NULL ? (tcb->task_id == 1 ? \"main\" : \"null\")\n                                       : (char *)tcb->name,\n                     curr_time - tcb->swap_out_time);\n  ASSERT(0, \"Find task hung\");\n}\n\nstatic void check_hung_task(const P_TCB tcb) {\n  uint32_t curr_hwticks, curr_time;\n\n  if (!tcb->hung_check)\n    return;\n\n  curr_hwticks = hal_sys_timer_get();\n  curr_time = HWTICKS_TO_MS(curr_hwticks);\n  if ((curr_time - tcb->swap_out_time) > tcb->hung_check_timeout) {\n    print_hung_task(tcb, curr_time);\n  }\n}\n\nvoid check_hung_tasks(void) {\n  int i;\n\n  for (i = 0; i < os_maxtaskrun; i++) {\n    if (os_active_TCB[i]) {\n      P_TCB tcb = os_active_TCB[i];\n      check_hung_task(tcb);\n    }\n  }\n}\n#endif\n\nstatic inline void print_task_sw_statitics(P_TCB tcb) {\n  /*\n  REL_TRACE_NOTS(3,\"--- Task swap in:%d  out=%d runings %d\",\n          tcb->swap_in_time,\n          tcb->swap_out_time,\n          tcb->rtime);\n   */\n}\n\nFLASH_TEXT_LOC\nstatic void _rtx_show_thread_usage(P_TCB tcb, U32 sample_time) {\n  if (tcb) {\n    if (tcb->cb_type == TCB &&\n        ((tcb->task_id >= 1 && tcb->task_id <= os_maxtaskrun)) && tcb->ptask &&\n        tcb->stack) {\n      REL_TRACE_NOTS(\n          5, \"--- Task id:%d task_name=%s cpu=%%%d\", tcb->task_id,\n          tcb->name == NULL ? (tcb->task_id == 1 ? \"main\" : \"null\")\n                            : (char *)tcb->name,\n          sample_time != 0\n              ? ((tcb->rtime - task_rtime[tcb->task_id]) * 100 / sample_time)\n              : 0);\n      print_task_sw_statitics(tcb);\n      task_rtime[tcb->task_id] = tcb->rtime;\n    } else if (tcb->task_id == 255) {\n      REL_TRACE_NOTS(\n          5, \"--- Task id:%d task_name=%s cpu=%%%d\", tcb->task_id, \"idle\",\n          sample_time != 0 ? (tcb->rtime - task_rtime[0]) * 100 / sample_time\n                           : 0);\n      print_task_sw_statitics(tcb);\n      task_rtime[0] = tcb->rtime;\n    } else {\n      REL_TRACE_NOTS(0, \"--- Task BAD\");\n    }\n  } else {\n    REL_TRACE_NOTS(0, \"--- Task NONE\");\n  }\n}\n\nFLASH_TEXT_LOC\nvoid rtx_show_all_threads_usage(void) {\n  int i;\n  static BOOL first_time = 1;\n  uint32_t sample_time;\n  static U32 start_sample_time = 0;\n\n  if (first_time) {\n    for (i = 0; i < os_maxtaskrun; i++) {\n      if (os_active_TCB[i]) {\n        P_TCB tcb = os_active_TCB[i];\n        task_rtime[tcb->task_id] = tcb->rtime;\n      }\n    }\n    task_rtime[0] = os_idle_TCB.rtime;\n    start_sample_time = rtx_get_hwticks();\n    first_time = 0;\n    return;\n  }\n\n  sample_time = HWTICKS_TO_MS(rtx_get_hwticks() - start_sample_time);\n  REL_TRACE_IMM_NOTS(0, \" \");\n  REL_TRACE_NOTS(0, \"Task List:\");\n  for (i = 0; i < os_maxtaskrun; i++) {\n    if (os_active_TCB[i]) {\n      _rtx_show_thread_usage(os_active_TCB[i], sample_time);\n    }\n  }\n  _rtx_show_thread_usage(&os_idle_TCB, sample_time);\n  start_sample_time = rtx_get_hwticks();\n  REL_TRACE_IMM_NOTS(0, \" \");\n}\n\n#endif\n\n/*\n * health time period for idle thread scheduled\n */\n#define TASK_IDLE_HEALTH_PERIOD (60 * 1000)\n\nFLASH_TEXT_LOC\nint rtx_task_idle_health_check(void) {\n  P_TCB tcb = &os_idle_TCB;\n  uint32_t now, period;\n\n  now = HWTICKS_TO_MS(rtx_get_hwticks());\n\n  if (now >= tcb->swap_in_time) {\n    period = now - tcb->swap_in_time;\n  } else {\n    uint64_t temp;\n    temp = now + HWTICKS_TO_MS((-1u));\n    period = temp - tcb->swap_in_time;\n  }\n\n  if (period > TASK_IDLE_HEALTH_PERIOD) {\n    REL_TRACE_NOTS(1, \"--- Task idle hung %d seconds\", period / 1000);\n    return -1;\n  }\n  return 0;\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Task.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TASK.H\n *      Purpose: Task functions and system start up.\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n\n/* Definitions */\n#define __CMSIS_RTOS 1\n\n/* Values for 'state'   */\n#define INACTIVE 0\n#define READY 1\n#define RUNNING 2\n#define WAIT_DLY 3\n#define WAIT_ITV 4\n#define WAIT_OR 5\n#define WAIT_AND 6\n#define WAIT_SEM 7\n#define WAIT_MBX 8\n#define WAIT_MUT 9\n\n/* Return codes */\n#define OS_R_TMO 0x01\n#define OS_R_EVT 0x02\n#define OS_R_SEM 0x03\n#define OS_R_MBX 0x04\n#define OS_R_MUT 0x05\n\n#define OS_R_OK 0x00\n#define OS_R_NOK 0xff\n\n/* Variables */\nextern struct OS_TSK os_tsk;\nextern struct OS_TCB os_idle_TCB;\n\n/* Functions */\nextern void rt_switch_req(P_TCB p_new);\nextern void rt_dispatch(P_TCB next_TCB);\nextern void rt_block(U16 timeout, U8 block_state);\nextern void rt_tsk_pass(void);\nextern OS_TID rt_tsk_self(void);\nextern OS_RESULT rt_tsk_prio(OS_TID task_id, U8 new_prio);\nextern OS_RESULT rt_tsk_delete(OS_TID task_id);\nextern void rt_sys_init(void);\nextern void rt_sys_start(void);\nextern void rt_tsk_show(P_TCB tcb);\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Time.c",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TIME.C\n *      Purpose: Delay and interval wait functions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n\n#include \"rt_Time.h\"\n#include \"RTX_Conf.h\"\n#include \"rt_Task.h\"\n#include \"rt_TypeDef.h\"\n\n/*----------------------------------------------------------------------------\n *      Global Variables\n *---------------------------------------------------------------------------*/\n\n/* Free running system tick counter */\nU32 os_time;\n\n/*----------------------------------------------------------------------------\n *      Functions\n *---------------------------------------------------------------------------*/\n\n/*--------------------------- rt_time_get -----------------------------------*/\n\nU32 rt_time_get(void) {\n  /* Get system time tick */\n  return (os_time);\n}\n\n/*--------------------------- rt_dly_wait -----------------------------------*/\n\nvoid rt_dly_wait(U16 delay_time) {\n  /* Delay task by \"delay_time\" */\n  rt_block(delay_time, WAIT_DLY);\n}\n\n/*--------------------------- rt_itv_set ------------------------------------*/\n\nvoid rt_itv_set(U16 interval_time) {\n  /* Set interval length and define start of first interval */\n  os_tsk.run->interval_time = interval_time;\n  os_tsk.run->delta_time = interval_time + (U16)os_time;\n}\n\n/*--------------------------- rt_itv_wait -----------------------------------*/\n\nvoid rt_itv_wait(void) {\n  /* Wait for interval end and define start of next one */\n  U16 delta;\n\n  delta = os_tsk.run->delta_time - (U16)os_time;\n  os_tsk.run->delta_time += os_tsk.run->interval_time;\n  if ((delta & 0x8000) == 0) {\n    rt_block(delta, WAIT_ITV);\n  }\n}\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_Time.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TIME.H\n *      Purpose: Delay and interval wait functions definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#include \"rt_TypeDef.h\"\n// \n// SysTick Timer Configuration\n// ==============================\n//\n//   Timer clock value [Hz] <1-1000000000>\n//    Defines the timer clock value.\n//    Default: 6000000  (6MHz)\n#ifdef CALIB_SLOW_TIMER\n#define OS_CLOCK                                                               \\\n  (CONFIG_SYSTICK_HZ * (OS_CLOCK_NOMINAL / CONFIG_SYSTICK_HZ_NOMINAL))\n#else\n#define OS_CLOCK OS_CLOCK_NOMINAL\n#endif\n\n/* Variables */\nextern U32 os_time;\n\n/* Functions */\nextern U32 rt_time_get(void);\nextern void rt_dly_wait(U16 delay_time);\nextern void rt_itv_set(U16 interval_time);\nextern void rt_itv_wait(void);\n\n/*----------------------------------------------------------------------------\n * end of file\n *---------------------------------------------------------------------------*/\n"
  },
  {
    "path": "rtos/rtx/TARGET_CORTEX_M/rt_TypeDef.h",
    "content": "/*----------------------------------------------------------------------------\n *      RL-ARM - RTX\n *----------------------------------------------------------------------------\n *      Name:    RT_TYPEDEF.H\n *      Purpose: Type Definitions\n *      Rev.:    V4.60\n *----------------------------------------------------------------------------\n *\n * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH\n * All rights reserved.\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *  - Redistributions of source code must retain the above copyright\n *    notice, this list of conditions and the following disclaimer.\n *  - Redistributions in binary form must reproduce the above copyright\n *    notice, this list of conditions and the following disclaimer in the\n *    documentation and/or other materials provided with the distribution.\n *  - Neither the name of ARM  nor the names of its contributors may be used\n *    to endorse or promote products derived from this software without\n *    specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE\n * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n * POSSIBILITY OF SUCH DAMAGE.\n *---------------------------------------------------------------------------*/\n#ifndef RT_TYPE_DEF_H\n#define RT_TYPE_DEF_H\n\n#include \"os_tcb.h\"\n\ntypedef U32 OS_TID;\ntypedef void *OS_ID;\ntypedef U32 OS_RESULT;\n\n#define TCB_STACKF 32 /* 'stack_frame' offset                    */\n#define TCB_TSTACK 40 /* 'tsk_stack' offset                      */\n\ntypedef struct OS_PSFE { /* Post Service Fifo Entry                 */\n  void *id;              /* Object Identification                   */\n  U32 arg;               /* Object Argument                         */\n} *P_PSFE;\n\ntypedef struct OS_PSQ { /* Post Service Queue                      */\n  U8 first;             /* FIFO Head Index                         */\n  U8 last;              /* FIFO Tail Index                         */\n  U8 count;             /* Number of stored items in FIFO          */\n  U8 size;              /* FIFO Size                               */\n  struct OS_PSFE q[1];  /* FIFO Content                            */\n} *P_PSQ;\n\ntypedef struct OS_TSK {\n  P_TCB run;     /* Current running task                    */\n  P_TCB new_tsk; /* Scheduled task to run                   */\n} *P_TSK;\n\ntypedef struct OS_ROBIN { /* Round Robin Control                     */\n  P_TCB task;             /* Round Robin task                        */\n  U16 time;               /* Round Robin switch time                 */\n  U16 tout;               /* Round Robin timeout                     */\n} *P_ROBIN;\n\ntypedef struct OS_XCB {\n  U8 cb_type;            /* Control Block Type                      */\n  struct OS_TCB *p_lnk;  /* Link pointer for ready/sem. wait list   */\n  struct OS_TCB *p_rlnk; /* Link pointer for sem./mbx lst backwards */\n  struct OS_TCB *p_dlnk; /* Link pointer for delay list             */\n  struct OS_TCB *p_blnk; /* Link pointer for delay list backwards   */\n  U16 delta_time;        /* Time until time out                     */\n} *P_XCB;\n\ntypedef struct OS_MCB {\n  U8 cb_type;           /* Control Block Type                      */\n  U8 state;             /* State flag variable                     */\n  U8 isr_st;            /* State flag variable for isr functions   */\n  struct OS_TCB *p_lnk; /* Chain of tasks waiting for message      */\n  U16 first;            /* Index of the message list begin         */\n  U16 last;             /* Index of the message list end           */\n  U16 count;            /* Actual number of stored messages        */\n  U16 size;             /* Maximum number of stored messages       */\n  void *msg[1];         /* FIFO for Message pointers 1st element   */\n} *P_MCB;\n\ntypedef struct OS_SCB {\n  U8 cb_type;           /* Control Block Type                      */\n  U8 mask;              /* Semaphore token mask                    */\n  U16 tokens;           /* Semaphore tokens                        */\n  struct OS_TCB *p_lnk; /* Chain of tasks waiting for tokens       */\n} *P_SCB;\n\ntypedef struct OS_MUCB {\n  U8 cb_type;           /* Control Block Type                      */\n  U8 prio;              /* Owner task default priority             */\n  U16 level;            /* Call nesting level                      */\n  struct OS_TCB *p_lnk; /* Chain of tasks waiting for mutex        */\n  struct OS_TCB *owner; /* Mutex owner task                        */\n} *P_MUCB;\n\ntypedef struct OS_XTMR {\n  struct OS_TMR *next;\n  U16 tcnt;\n} *P_XTMR;\n\ntypedef struct OS_TMR {\n  struct OS_TMR *next; /* Link pointer to Next timer              */\n  U16 tcnt;            /* Timer delay count                       */\n  U16 info;            /* User defined call info                  */\n} *P_TMR;\n\ntypedef struct OS_BM {\n  void *free;   /* Pointer to first free memory block      */\n  void *end;    /* Pointer to memory block end             */\n  U32 blk_size; /* Memory block size                       */\n} *P_BM;\n\n/* Definitions */\n#define __TRUE 1\n#define __FALSE 0\n#define NULL ((void *)0)\n\n#ifndef BOOL_DEFINED\ntypedef unsigned int BOOL; /* IGNORESTYLE */\n#endif\n\ntypedef unsigned int U32;\ntypedef unsigned short U16;\ntypedef unsigned char U8;\n\ntypedef int S32;\ntypedef short S16;\ntypedef char S8;\n\n#ifndef U32_PTR_DEFINED\ntypedef U32 U32_PTR;\n\n#define U32_PTR_DEFINED\n#endif /* U32_PTR_DEFINED */\n#endif\n"
  },
  {
    "path": "rtos/rtx5/ARM/irq_armv8mbl.s",
    "content": ";/*\n; * Copyright (c) 2016-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       ARMv8M Baseline Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\n                IF       :LNOT::DEF:DOMAIN_NS\nDOMAIN_NS       EQU      0\n                ENDIF\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\nTCB_SF_OFS      EQU      34                     ; TCB.stack_frame offset\nTCB_TZM_OFS     EQU      64                     ; TCB.tz_memory offset\n\n\n                PRESERVE8\n                THUMB\n\n\n                AREA     |.constdata|, DATA, READONLY\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                AREA     |.text|, CODE, READONLY\n\n\nSVC_Handler     PROC\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n                IF       :DEF:MPU_LOAD\n                IMPORT   osRtxMpuLoad\n                ENDIF\n                IF       DOMAIN_NS = 1\n                IMPORT   TZ_LoadContext_S\n                IMPORT   TZ_StoreContext_S\n                ENDIF\n\n                MOV      R0,LR\n                LSRS     R0,R0,#3               ; Determine return stack from EXC_RETURN bit 2\n                BCC      SVC_MSP                ; Branch if return stack is MSP\n                MRS      R0,PSP                 ; Get PSP\n\nSVC_Number\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                SUBS     R1,R1,#2               ; Point to SVC instruction\n                LDRB     R1,[R1]                ; Load SVC number\n                CMP      R1,#0\n                BNE      SVC_User               ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDM      R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R7                     ; Call service function\n                POP      {R2,R3}                ; Restore SP and EXC_RETURN\n                STMIA    R2!,{R0-R1}            ; Store function return values\n                MOV      LR,R3                  ; Set EXC_RETURN\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDMIA    R3!,{R1,R2}            ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                BEQ      SVC_Exit               ; Branch when threads are the same\n\n                CBZ      R1,SVC_ContextSwitch   ; Branch if running thread is deleted\n\nSVC_ContextSave\n                IF       DOMAIN_NS = 1\n                LDR      R0,[R1,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,SVC_ContextSave1    ; Branch if there is no secure context\n                PUSH     {R1,R2,R3,R7}          ; Save registers\n                MOV      R7,LR                  ; Get EXC_RETURN\n                BL       TZ_StoreContext_S      ; Store secure context\n                MOV      LR,R7                  ; Set EXC_RETURN\n                POP      {R1,R2,R3,R7}          ; Restore registers\n                ENDIF\n\nSVC_ContextSave1\n                MRS      R0,PSP                 ; Get PSP\n                SUBS     R0,R0,#32              ; Calculate SP\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STMIA    R0!,{R4-R7}            ; Save R4..R7\n                MOV      R4,R8\n                MOV      R5,R9\n                MOV      R6,R10\n                MOV      R7,R11\n                STMIA    R0!,{R4-R7}            ; Save R8..R11\n\nSVC_ContextSave2\n                MOV      R0,LR                  ; Get EXC_RETURN\n                ADDS     R1,R1,#TCB_SF_OFS      ; Adjust address\n                STRB     R0,[R1]                ; Store stack frame information\n\nSVC_ContextSwitch\n                SUBS     R3,R3,#8               ; Adjust address\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\n                IF       :DEF:MPU_LOAD\n                PUSH     {R2,R3}                ; Save registers\n                MOV      R0,R2                  ; osRtxMpuLoad parameter\n                BL       osRtxMpuLoad           ; Load MPU for next thread\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSVC_ContextRestore\n                IF       DOMAIN_NS = 1\n                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,SVC_ContextRestore1 ; Branch if there is no secure context\n                PUSH     {R2,R3}                ; Save registers\n                BL       TZ_LoadContext_S       ; Load secure context\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSVC_ContextRestore1\n                MOV      R1,R2\n                ADDS     R1,R1,#TCB_SF_OFS      ; Adjust address\n                LDRB     R0,[R1]                ; Load stack frame information\n                MOVS     R1,#0xFF\n                MVNS     R1,R1                  ; R1=0xFFFFFF00\n                ORRS     R0,R1\n                MOV      LR,R0                  ; Set EXC_RETURN\n\n                IF       DOMAIN_NS = 1\n                LSLS     R0,R0,#25              ; Check domain of interrupted thread\n                BPL      SVC_ContextRestore2    ; Branch if non-secure\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                MSR      PSP,R0                 ; Set PSP\n                BX       LR                     ; Exit from handler\n                ELSE\n                LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base\n                MSR      PSPLIM,R0              ; Set PSPLIM\n                ENDIF\n\nSVC_ContextRestore2\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ADDS     R0,R0,#16              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R8..R11\n                MOV      R8,R4\n                MOV      R9,R5\n                MOV      R10,R6\n                MOV      R11,R7\n                MSR      PSP,R0                 ; Set PSP\n                SUBS     R0,R0,#32              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R4..R7\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_MSP\n                MRS      R0,MSP                 ; Get MSP\n                B        SVC_Number\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LSLS     R1,R1,#2\n                LDR      R3,[R2,R1]             ; Load address of SVC function\n                MOV      R12,R3\n                LDMIA    R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R2,R3}                ; Restore SP and EXC_RETURN\n                STR      R0,[R2]                ; Store function return value\n                MOV      LR,R3                  ; Set EXC_RETURN\n\n                BX       LR                     ; Return from handler\n\n                ALIGN\n                ENDP\n\n\nPendSV_Handler  PROC\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,R1}                ; Restore EXC_RETURN\n                MOV      LR,R1                  ; Set EXC_RETURN\n                B        Sys_Context\n\n                ALIGN\n                ENDP\n\n\nSysTick_Handler PROC\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,R1}                ; Restore EXC_RETURN\n                MOV      LR,R1                  ; Set EXC_RETURN\n                B        Sys_Context\n\n                ALIGN\n                ENDP\n\n\nSys_Context     PROC\n                EXPORT   Sys_Context\n                IMPORT   osRtxInfo\n                IF       :DEF:MPU_LOAD\n                IMPORT   osRtxMpuLoad\n                ENDIF\n                IF       DOMAIN_NS = 1\n                IMPORT   TZ_LoadContext_S\n                IMPORT   TZ_StoreContext_S\n                ENDIF\n\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3!,{R1,R2}            ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                BEQ      Sys_ContextExit        ; Branch when threads are the same\n\nSys_ContextSave\n                IF       DOMAIN_NS = 1\n                LDR      R0,[R1,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,Sys_ContextSave1    ; Branch if there is no secure context\n                PUSH     {R1,R2,R3,R7}          ; Save registers\n                MOV      R7,LR                  ; Get EXC_RETURN\n                BL       TZ_StoreContext_S      ; Store secure context\n                MOV      LR,R7                  ; Set EXC_RETURN\n                POP      {R1,R2,R3,R7}          ; Restore registers\n                MOV      R0,LR                  ; Get EXC_RETURN\n                LSLS     R0,R0,#25              ; Check domain of interrupted thread\n                BPL      Sys_ContextSave1       ; Branch if non-secure\n                MRS      R0,PSP                 ; Get PSP\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                B        Sys_ContextSave2\n                ENDIF\n\nSys_ContextSave1\n                MRS      R0,PSP                 ; Get PSP\n                SUBS     R0,R0,#32              ; Adjust address\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STMIA    R0!,{R4-R7}            ; Save R4..R7\n                MOV      R4,R8\n                MOV      R5,R9\n                MOV      R6,R10\n                MOV      R7,R11\n                STMIA    R0!,{R4-R7}            ; Save R8..R11\n\nSys_ContextSave2\n                MOV      R0,LR                  ; Get EXC_RETURN\n                ADDS     R1,R1,#TCB_SF_OFS      ; Adjust address\n                STRB     R0,[R1]                ; Store stack frame information\n\nSys_ContextSwitch\n                SUBS     R3,R3,#8               ; Adjust address\n                STR      R2,[R3]                ; osRtxInfo.run: curr = next\n\n                IF       :DEF:MPU_LOAD\n                PUSH     {R2,R3}                ; Save registers\n                MOV      R0,R2                  ; osRtxMpuLoad parameter\n                BL       osRtxMpuLoad           ; Load MPU for next thread\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSys_ContextRestore\n                IF       DOMAIN_NS = 1\n                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,Sys_ContextRestore1 ; Branch if there is no secure context\n                PUSH     {R2,R3}                ; Save registers\n                BL       TZ_LoadContext_S       ; Load secure context\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSys_ContextRestore1\n                MOV      R1,R2\n                ADDS     R1,R1,#TCB_SF_OFS      ; Adjust offset\n                LDRB     R0,[R1]                ; Load stack frame information\n                MOVS     R1,#0xFF\n                MVNS     R1,R1                  ; R1=0xFFFFFF00\n                ORRS     R0,R1\n                MOV      LR,R0                  ; Set EXC_RETURN\n\n                IF       DOMAIN_NS = 1\n                LSLS     R0,R0,#25              ; Check domain of interrupted thread\n                BPL      Sys_ContextRestore2    ; Branch if non-secure\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                MSR      PSP,R0                 ; Set PSP\n                BX       LR                     ; Exit from handler\n                ELSE\n                LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base\n                MSR      PSPLIM,R0              ; Set PSPLIM\n                ENDIF\n\nSys_ContextRestore2\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ADDS     R0,R0,#16              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R8..R11\n                MOV      R8,R4\n                MOV      R9,R5\n                MOV      R10,R6\n                MOV      R11,R7\n                MSR      PSP,R0                 ; Set PSP\n                SUBS     R0,R0,#32              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R4..R7\n\nSys_ContextExit\n                BX       LR                     ; Exit from handler\n\n                ALIGN\n                ENDP\n\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/ARM/irq_armv8mbl_ns.s",
    "content": "DOMAIN_NS       EQU      1\n                INCLUDE  irq_armv8mbl.s\n                END\n"
  },
  {
    "path": "rtos/rtx5/ARM/irq_armv8mml.s",
    "content": ";/*\n; * Copyright (c) 2016-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       ARMv8M Mainline Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\n                IF       :LNOT::DEF:DOMAIN_NS\nDOMAIN_NS       EQU      0\n                ENDIF\n\n                IF       ({FPU}=\"FPv5-SP\") || ({FPU}=\"FPv5_D16\")\n__FPU_USED      EQU      1\n                ELSE\n__FPU_USED      EQU      0\n                ENDIF\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\nTCB_SF_OFS      EQU      34                     ; TCB.stack_frame offset\nTCB_TZM_OFS     EQU      64                     ; TCB.tz_memory offset\n\n\n                PRESERVE8\n                THUMB\n\n\n                AREA     |.constdata|, DATA, READONLY\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                AREA     |.text|, CODE, READONLY\n\n\nSVC_Handler     PROC\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n                IF       :DEF:MPU_LOAD\n                IMPORT   osRtxMpuLoad\n                ENDIF\n                IF       DOMAIN_NS = 1\n                IMPORT   TZ_LoadContext_S\n                IMPORT   TZ_StoreContext_S\n                ENDIF\n\n                TST      LR,#0x04               ; Determine return stack from EXC_RETURN bit 2\n                ITE      EQ\n                MRSEQ    R0,MSP                 ; Get MSP if return stack is MSP\n                MRSNE    R0,PSP                 ; Get PSP if return stack is PSP\n\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                LDRB     R1,[R1,#-2]            ; Load SVC number\n                CMP      R1,#0\n                BNE      SVC_User               ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDM      R0,{R0-R3,R12}         ; Load function parameters and address from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STM      R12,{R0-R1}            ; Store function return values\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3,{R1,R2}             ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                IT       EQ\n                BXEQ     LR                     ; Exit when threads are the same\n\n                IF       __FPU_USED = 1\n                CBNZ     R1,SVC_ContextSave     ; Branch if running thread is not deleted\n                TST      LR,#0x10               ; Check if extended stack frame\n                BNE      SVC_ContextSwitch\n                LDR      R1,=0xE000EF34         ; FPCCR Address\n                LDR      R0,[R1]                ; Load FPCCR\n                BIC      R0,R0,#1               ; Clear LSPACT (Lazy state)\n                STR      R0,[R1]                ; Store FPCCR\n                B        SVC_ContextSwitch\n                ELSE\n                CBZ      R1,SVC_ContextSwitch   ; Branch if running thread is deleted\n                ENDIF\n\nSVC_ContextSave\n                IF       DOMAIN_NS = 1\n                LDR      R0,[R1,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,SVC_ContextSave1    ; Branch if there is no secure context\n                PUSH     {R1,R2,R3,LR}          ; Save registers and EXC_RETURN\n                BL       TZ_StoreContext_S      ; Store secure context\n                POP      {R1,R2,R3,LR}          ; Restore registers and EXC_RETURN\n                ENDIF\n\nSVC_ContextSave1\n                MRS      R0,PSP                 ; Get PSP\n                STMDB    R0!,{R4-R11}           ; Save R4..R11\n                IF       __FPU_USED = 1\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VSTMDBEQ R0!,{S16-S31}          ;  Save VFP S16.S31\n                ENDIF\n\nSVC_ContextSave2\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STRB     LR,[R1,#TCB_SF_OFS]    ; Store stack frame information\n\nSVC_ContextSwitch\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\n                IF       :DEF:MPU_LOAD\n                PUSH     {R2,R3}                ; Save registers\n                MOV      R0,R2                  ; osRtxMpuLoad parameter\n                BL       osRtxMpuLoad           ; Load MPU for next thread\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSVC_ContextRestore\n                IF       DOMAIN_NS = 1\n                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,SVC_ContextRestore1 ; Branch if there is no secure context\n                PUSH     {R2,R3}                ; Save registers\n                BL       TZ_LoadContext_S       ; Load secure context\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSVC_ContextRestore1\n                LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base\n                LDRB     R1,[R2,#TCB_SF_OFS]    ; Load stack frame information\n                MSR      PSPLIM,R0              ; Set PSPLIM\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ORR      LR,R1,#0xFFFFFF00      ; Set EXC_RETURN\n\n                IF       DOMAIN_NS = 1\n                TST      LR,#0x40               ; Check domain of interrupted thread\n                BNE      SVC_ContextRestore2    ; Branch if secure\n                ENDIF\n\n                IF       __FPU_USED = 1\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VLDMIAEQ R0!,{S16-S31}          ;  Restore VFP S16..S31\n                ENDIF\n                LDMIA    R0!,{R4-R11}           ; Restore R4..R11\n\nSVC_ContextRestore2\n                MSR      PSP,R0                 ; Set PSP\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDR      R12,[R2,R1,LSL #2]     ; Load address of SVC function\n                LDM      R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STR      R0,[R12]               ; Store function return value\n\n                BX       LR                     ; Return from handler\n\n                ALIGN\n                ENDP\n\n\nPendSV_Handler  PROC\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                B        Sys_Context\n\n                ALIGN\n                ENDP\n\n\nSysTick_Handler PROC\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                B        Sys_Context\n\n                ALIGN\n                ENDP\n\n\nSys_Context     PROC\n                EXPORT   Sys_Context\n                IMPORT   osRtxInfo\n                IF       :DEF:MPU_LOAD\n                IMPORT   osRtxMpuLoad\n                ENDIF\n                IF       DOMAIN_NS = 1\n                IMPORT   TZ_LoadContext_S\n                IMPORT   TZ_StoreContext_S\n                ENDIF\n\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3,{R1,R2}             ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                IT       EQ\n                BXEQ     LR                     ; Exit when threads are the same\n\nSys_ContextSave\n                IF       DOMAIN_NS = 1\n                LDR      R0,[R1,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,Sys_ContextSave1    ; Branch if there is no secure context\n                PUSH     {R1,R2,R3,LR}          ; Save registers and EXC_RETURN\n                BL       TZ_StoreContext_S      ; Store secure context\n                POP      {R1,R2,R3,LR}          ; Restore registers and EXC_RETURN\n                TST      LR,#0x40               ; Check domain of interrupted thread\n                IT       NE\n                MRSNE    R0,PSP                 ; Get PSP\n                BNE      Sys_ContextSave2       ; Branch if secure\n                ENDIF\n\nSys_ContextSave1\n                MRS      R0,PSP                 ; Get PSP\n                STMDB    R0!,{R4-R11}           ; Save R4..R11\n                IF       __FPU_USED = 1\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VSTMDBEQ R0!,{S16-S31}          ;  Save VFP S16.S31\n                ENDIF\n\nSys_ContextSave2\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STRB     LR,[R1,#TCB_SF_OFS]    ; Store stack frame information\n\nSys_ContextSwitch\n                STR      R2,[R3]                ; osRtxInfo.run: curr = next\n\n                IF       :DEF:MPU_LOAD\n                PUSH     {R2,R3}                ; Save registers\n                MOV      R0,R2                  ; osRtxMpuLoad parameter\n                BL       osRtxMpuLoad           ; Load MPU for next thread\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSys_ContextRestore\n                IF       DOMAIN_NS = 1\n                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,Sys_ContextRestore1 ; Branch if there is no secure context\n                PUSH     {R2,R3}                ; Save registers\n                BL       TZ_LoadContext_S       ; Load secure context\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSys_ContextRestore1\n                LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base\n                LDRB     R1,[R2,#TCB_SF_OFS]    ; Load stack frame information\n                MSR      PSPLIM,R0              ; Set PSPLIM\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ORR      LR,R1,#0xFFFFFF00      ; Set EXC_RETURN\n\n                IF       DOMAIN_NS = 1\n                TST      LR,#0x40               ; Check domain of interrupted thread\n                BNE      Sys_ContextRestore2    ; Branch if secure\n                ENDIF\n\n                IF       __FPU_USED = 1\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VLDMIAEQ R0!,{S16-S31}          ;  Restore VFP S16..S31\n                ENDIF\n                LDMIA    R0!,{R4-R11}           ; Restore R4..R11\n\nSys_ContextRestore2\n                MSR      PSP,R0                 ; Set PSP\n\nSys_ContextExit\n                BX       LR                     ; Exit from handler\n\n                ALIGN\n                ENDP\n\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/ARM/irq_armv8mml_ns.s",
    "content": "DOMAIN_NS       EQU      1\n                INCLUDE  irq_armv8mml.s\n                END\n"
  },
  {
    "path": "rtos/rtx5/ARM/irq_ca.s",
    "content": ";/*\n; * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       Cortex-A Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\nMODE_FIQ        EQU      0x11\nMODE_IRQ        EQU      0x12\nMODE_SVC        EQU      0x13\nMODE_ABT        EQU      0x17\nMODE_UND        EQU      0x1B\n\nCPSR_BIT_T      EQU      0x20\n\nK_STATE_RUNNING EQU      2                          ; osKernelState_t::osKernelRunning\nI_K_STATE_OFS   EQU      8                          ; osRtxInfo.kernel.state offset\nI_TICK_IRQN_OFS EQU      16                         ; osRtxInfo.tick_irqn offset\nI_T_RUN_OFS     EQU      20                         ; osRtxInfo.thread.run offset\nTCB_SP_FRAME    EQU      34                         ; osRtxThread_t.stack_frame offset\nTCB_SP_OFS      EQU      56                         ; osRtxThread_t.sp offset\n\n\n                PRESERVE8\n                ARM\n\n\n                AREA     |.constdata|, DATA, READONLY\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                          ; Non weak library reference\n\n\n                AREA     |.data|, DATA, READWRITE\n                EXPORT   IRQ_PendSV\nIRQ_NestLevel   DCD      0                          ; IRQ nesting level counter\nIRQ_PendSV      DCB      0                          ; Pending SVC flag\n\n\n                AREA     |.text|, CODE, READONLY\n\n\nUndef_Handler\\\n                PROC\n                EXPORT  Undef_Handler\n                IMPORT  CUndefHandler\n\n                SRSFD   SP!, #MODE_UND\n                PUSH    {R0-R4, R12}                ; Save APCS corruptible registers to UND mode stack\n\n                MRS     R0, SPSR\n                TST     R0, #CPSR_BIT_T             ; Check mode\n                MOVEQ   R1, #4                      ; R1 = 4 ARM mode\n                MOVNE   R1, #2                      ; R1 = 2 Thumb mode\n                SUB     R0, LR, R1\n                LDREQ   R0, [R0]                    ; ARM mode - R0 points to offending instruction\n                BEQ     Undef_Cont\n\n                ; Thumb instruction\n                ; Determine if it is a 32-bit Thumb instruction\n                LDRH    R0, [R0]\n                MOV     R2, #0x1C\n                CMP     R2, R0, LSR #11\n                BHS     Undef_Cont                  ; 16-bit Thumb instruction\n\n                ; 32-bit Thumb instruction. Unaligned - reconstruct the offending instruction\n                LDRH    R2, [LR]\n                ORR     R0, R2, R0, LSL #16\nUndef_Cont\n                MOV     R2, LR                      ; Set LR to third argument\n\n                AND     R12, SP, #4                 ; Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 ; Adjust stack\n                PUSH    {R12, LR}                   ; Store stack adjustment and dummy LR\n\n                ; R0 =Offending instruction, R1 =2(Thumb) or =4(ARM)\n                BL      CUndefHandler\n\n                POP     {R12, LR}                   ; Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 ; Unadjust stack\n\n                LDR     LR, [SP, #24]               ; Restore stacked LR and possibly adjust for retry\n                SUB     LR, LR, R0\n                LDR     R0, [SP, #28]               ; Restore stacked SPSR\n                MSR     SPSR_CXSF, R0\n                CLREX                               ; Clear exclusive monitor\n                POP     {R0-R4, R12}                ; Restore stacked APCS registers\n                ADD     SP, SP, #8                  ; Adjust SP for already-restored banked registers\n                MOVS    PC, LR\n\n                ENDP\n\n\nPAbt_Handler\\\n                PROC\n                EXPORT  PAbt_Handler\n                IMPORT  CPAbtHandler\n\n                SUB     LR, LR, #4                  ; Pre-adjust LR\n                SRSFD   SP!, #MODE_ABT              ; Save LR and SPRS to ABT mode stack\n                PUSH    {R0-R4, R12}                ; Save APCS corruptible registers to ABT mode stack\n                MRC     p15, 0, R0, c5, c0, 1       ; IFSR\n                MRC     p15, 0, R1, c6, c0, 2       ; IFAR\n\n                MOV     R2, LR                      ; Set LR to third argument\n\n                AND     R12, SP, #4                 ; Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 ; Adjust stack\n                PUSH    {R12, LR}                   ; Store stack adjustment and dummy LR\n\n                BL      CPAbtHandler\n\n                POP     {R12, LR}                   ; Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 ; Unadjust stack\n\n                CLREX                               ; Clear exclusive monitor\n                POP     {R0-R4, R12}                ; Restore stack APCS registers\n                RFEFD   SP!                         ; Return from exception\n\n                ENDP\n\n\nDAbt_Handler\\\n                PROC\n                EXPORT  DAbt_Handler\n                IMPORT  CDAbtHandler\n\n                SUB     LR, LR, #8                  ; Pre-adjust LR\n                SRSFD   SP!, #MODE_ABT              ; Save LR and SPRS to ABT mode stack\n                PUSH    {R0-R4, R12}                ; Save APCS corruptible registers to ABT mode stack\n                MRC     p15, 0, R0, c5, c0, 0       ; DFSR\n                MRC     p15, 0, R1, c6, c0, 0       ; DFAR\n\n                MOV     R2, LR                      ; Set LR to third argument\n\n                AND     R12, SP, #4                 ; Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 ; Adjust stack\n                PUSH    {R12, LR}                   ; Store stack adjustment and dummy LR\n\n                BL      CDAbtHandler\n\n                POP     {R12, LR}                   ; Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 ; Unadjust stack\n\n                CLREX                               ; Clear exclusive monitor\n                POP     {R0-R4, R12}                ; Restore stacked APCS registers\n                RFEFD   SP!                         ; Return from exception\n\n                ENDP\n\n\nIRQ_Handler\\\n                PROC\n                EXPORT  IRQ_Handler\n                IMPORT  IRQ_GetActiveIRQ\n                IMPORT  IRQ_GetHandler\n                IMPORT  IRQ_EndOfInterrupt\n\n                SUB     LR, LR, #4                  ; Pre-adjust LR\n                SRSFD   SP!, #MODE_SVC              ; Save LR_irq and SPSR_irq on to the SVC stack\n                CPS     #MODE_SVC                   ; Change to SVC mode\n                PUSH    {R0-R3, R12, LR}            ; Save APCS corruptible registers\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                ADD     R1, R1, #1                  ; Increment IRQ nesting level\n                STR     R1, [R0]\n\n                MOV     R3, SP                      ; Move SP into R3\n                AND     R3, R3, #4                  ; Get stack adjustment to ensure 8-byte alignment\n                SUB     SP, SP, R3                  ; Adjust stack\n                PUSH    {R3, R4}                    ; Store stack adjustment(R3) and user data(R4)\n\n                BLX     IRQ_GetActiveIRQ            ; Retrieve interrupt ID into R0\n                MOV     R4, R0                      ; Move interrupt ID to R4\n\n                BLX     IRQ_GetHandler              ; Retrieve interrupt handler address for current ID\n                CMP     R0, #0                      ; Check if handler address is 0\n                BEQ     IRQ_End                     ; If 0, end interrupt and return\n\n                CPSIE   i                           ; Re-enable interrupts\n                BLX     R0                          ; Call IRQ handler\n                CPSID   i                           ; Disable interrupts\n\nIRQ_End\n                MOV     R0, R4                      ; Move interrupt ID to R0\n                BLX     IRQ_EndOfInterrupt          ; Signal end of interrupt\n\n                POP     {R3, R4}                    ; Restore stack adjustment(R3) and user data(R4)\n                ADD     SP, SP, R3                  ; Unadjust stack\n\n                BL      osRtxContextSwitch          ; Continue in context switcher\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                SUBS    R1, R1, #1                  ; Decrement IRQ nesting level\n                STR     R1, [R0]\n\n                CLREX                               ; Clear exclusive monitor for interrupted code\n                POP     {R0-R3, R12, LR}            ; Restore stacked APCS registers\n                RFEFD   SP!                         ; Return from IRQ handler\n\n                ENDP\n\n\nSVC_Handler\\\n                PROC\n                EXPORT  SVC_Handler\n                IMPORT  IRQ_Disable\n                IMPORT  IRQ_Enable\n                IMPORT  osRtxUserSVC\n                IMPORT  osRtxInfo\n\n                SRSFD   SP!, #MODE_SVC              ; Store SPSR_svc and LR_svc onto SVC stack\n                PUSH    {R12, LR}\n\n                MRS     R12, SPSR                   ; Load SPSR\n                TST     R12, #CPSR_BIT_T            ; Thumb bit set?\n                LDRHNE  R12, [LR,#-2]               ; Thumb: load halfword\n                BICNE   R12, R12, #0xFF00           ;        extract SVC number\n                LDREQ   R12, [LR,#-4]               ; ARM:   load word\n                BICEQ   R12, R12, #0xFF000000       ;        extract SVC number\n                CMP     R12, #0                     ; Compare SVC number\n                BNE     SVC_User                    ; Branch if User SVC\n\n                PUSH    {R0-R3}\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                ADD     R1, R1, #1                  ; Increment IRQ nesting level\n                STR     R1, [R0]\n\n                LDR     R0, =osRtxInfo\n                LDR     R1, [R0, #I_K_STATE_OFS]    ; Load RTX5 kernel state\n                CMP     R1, #K_STATE_RUNNING        ; Check osKernelRunning\n                BLT     SVC_FuncCall                ; Continue if kernel is not running\n                LDR     R0, [R0, #I_TICK_IRQN_OFS]  ; Load OS Tick irqn\n                BLX     IRQ_Disable                 ; Disable OS Tick interrupt\nSVC_FuncCall\n                POP     {R0-R3}\n\n                LDR     R12, [SP]                   ; Reload R12 from stack\n\n                CPSIE   i                           ; Re-enable interrupts\n                BLX     R12                         ; Branch to SVC function\n                CPSID   i                           ; Disable interrupts\n\n                SUB     SP, SP, #4\n                STM     SP, {SP}^                   ; Store SP_usr onto stack\n                POP     {R12}                       ; Pop SP_usr into R12\n                SUB     R12, R12, #16               ; Adjust pointer to SP_usr\n                LDMDB   R12, {R2,R3}                ; Load return values from SVC function\n                PUSH    {R0-R3}                     ; Push return values to stack\n\n                LDR     R0, =osRtxInfo\n                LDR     R1, [R0, #I_K_STATE_OFS]    ; Load RTX5 kernel state\n                CMP     R1, #K_STATE_RUNNING        ; Check osKernelRunning\n                BLT     SVC_ContextCheck            ; Continue if kernel is not running\n                LDR     R0, [R0, #I_TICK_IRQN_OFS]  ; Load OS Tick irqn\n                BLX     IRQ_Enable                  ; Enable OS Tick interrupt\n\nSVC_ContextCheck\n                BL      osRtxContextSwitch          ; Continue in context switcher\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                SUB     R1, R1, #1                  ; Decrement IRQ nesting level\n                STR     R1, [R0]\n\n                CLREX                               ; Clear exclusive monitor\n                POP     {R0-R3, R12, LR}            ; Restore stacked APCS registers\n                RFEFD   SP!                         ; Return from exception\n\nSVC_User\n                PUSH    {R4, R5}\n                LDR     R5,=osRtxUserSVC            ; Load address of SVC table\n                LDR     R4,[R5]                     ; Load SVC maximum number\n                CMP     R12,R4                      ; Check SVC number range\n                BHI     SVC_Done                    ; Branch if out of range\n                LDR     R12,[R5,R12,LSL #2]         ; Load SVC Function Address\n                BLX     R12                         ; Call SVC Function\nSVC_Done\n                CLREX                               ; Clear exclusive monitor\n                POP     {R4, R5, R12, LR}\n                RFEFD   SP!                         ; Return from exception\n\n                ENDP\n\n\nosRtxContextSwitch\\\n                PROC\n                EXPORT  osRtxContextSwitch\n                IMPORT  osRtxPendSV_Handler\n                IMPORT  osRtxInfo\n                IMPORT  IRQ_Disable\n                IMPORT  IRQ_Enable\n\n                PUSH    {LR}\n\n                ; Check interrupt nesting level\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]                    ; Load IRQ nest level\n                CMP     R1, #1\n                BNE     osRtxContextExit            ; Nesting interrupts, exit context switcher\n\n                LDR     R12, =osRtxInfo+I_T_RUN_OFS ; Load address of osRtxInfo.run\n                LDM     R12, {R0, R1}               ; Load osRtxInfo.thread.run: curr & next\n                LDR     R2, =IRQ_PendSV             ; Load address of IRQ_PendSV flag\n                LDRB    R3, [R2]                    ; Load PendSV flag\n\n                CMP     R0, R1                      ; Check if context switch is required\n                BNE     osRtxContextCheck           ; Not equal, check if context save required\n                CMP     R3, #1                      ; Compare IRQ_PendSV value\n                BNE     osRtxContextExit            ; No post processing (and no context switch requested)\n\nosRtxContextCheck\n                STR     R1, [R12]                   ; Store run.next as run.curr\n                ; R0 = curr, R1 = next, R2 = &IRQ_PendSV, R3 = IRQ_PendSV, R12 = &osRtxInfo.thread.run\n                PUSH    {R1-R3, R12}\n\n                CMP     R0, #0                      ; Is osRtxInfo.thread.run.curr == 0\n                BEQ     osRtxPostProcess            ; Current deleted, skip context save\n\nosRtxContextSave\n                MOV     LR, R0                      ; Move &osRtxInfo.thread.run.curr to LR\n                MOV     R0, SP                      ; Move SP_svc into R0\n                ADD     R0, R0, #20                 ; Adjust SP_svc to R0 of the basic frame\n                SUB     SP, SP, #4\n                STM     SP, {SP}^                   ; Save SP_usr to current stack\n                POP     {R1}                        ; Pop SP_usr into R1\n\n                SUB     R1, R1, #64                 ; Adjust SP_usr to R4 of the basic frame\n                STMIA   R1!, {R4-R11}               ; Save R4-R11 to user stack\n                LDMIA   R0!, {R4-R8}                ; Load stacked R0-R3,R12 into R4-R8\n                STMIA   R1!, {R4-R8}                ; Store them to user stack\n                STM     R1, {LR}^                   ; Store LR_usr directly\n                ADD     R1, R1, #4                  ; Adjust user sp to PC\n                LDMIB   R0!, {R5-R6}                ; Load current PC, CPSR\n                STMIA   R1!, {R5-R6}                ; Restore user PC and CPSR\n\n                SUB     R1, R1, #64                 ; Adjust SP_usr to stacked R4\n\n                ; Check if VFP state need to be saved\n                MRC     p15, 0, R2, c1, c0, 2       ; VFP/NEON access enabled? (CPACR)\n                AND     R2, R2, #0x00F00000\n                CMP     R2, #0x00F00000\n                BNE     osRtxContextSave1           ; Continue, no VFP\n\n                VMRS    R2, FPSCR\n                STMDB   R1!, {R2,R12}               ; Push FPSCR, maintain 8-byte alignment\n\n                VSTMDB  R1!, {D0-D15}               ; Save D0-D15\n                IF {TARGET_FEATURE_EXTENSION_REGISTER_COUNT} == 32\n                VSTMDB  R1!, {D16-D31}              ; Save D16-D31\n                ENDIF\n\n                LDRB    R2, [LR, #TCB_SP_FRAME]     ; Load osRtxInfo.thread.run.curr frame info\n                IF {TARGET_FEATURE_EXTENSION_REGISTER_COUNT} == 32\n                ORR     R2, R2, #4                  ; NEON state\n                ELSE\n                ORR     R2, R2, #2                  ; VFP state\n                ENDIF\n                STRB    R2, [LR, #TCB_SP_FRAME]     ; Store VFP/NEON state\n\nosRtxContextSave1\n                STR     R1, [LR, #TCB_SP_OFS]       ; Store user sp to osRtxInfo.thread.run.curr\n\nosRtxPostProcess\n                ; RTX IRQ post processing check\n                POP     {R8-R11}                    ; Pop R8 = run.next, R9 = &IRQ_PendSV, R10 = IRQ_PendSV, R11 = &osRtxInfo.thread.run\n                CMP     R10, #1                     ; Compare PendSV value\n                BNE     osRtxContextRestore         ; Skip post processing if not pending\n\n                MOV     R4, SP                      ; Move SP_svc into R4\n                AND     R4, R4, #4                  ; Get stack adjustment to ensure 8-byte alignment\n                SUB     SP, SP, R4                  ; Adjust stack\n\n                ; Disable OS Tick\n                LDR     R5, =osRtxInfo              ; Load address of osRtxInfo\n                LDR     R5, [R5, #I_TICK_IRQN_OFS]  ; Load OS Tick irqn\n                MOV     R0, R5                      ; Set it as function parameter\n                BLX     IRQ_Disable                 ; Disable OS Tick interrupt\n                MOV     R6, #0                      ; Set PendSV clear value\n                B       osRtxPendCheck\nosRtxPendExec\n                STRB    R6, [R9]                    ; Clear PendSV flag\n                CPSIE   i                           ; Re-enable interrupts\n                BLX     osRtxPendSV_Handler         ; Post process pending objects\n                CPSID   i                           ; Disable interrupts\nosRtxPendCheck\n                LDR     R8, [R11, #4]               ; Load osRtxInfo.thread.run.next\n                STR     R8, [R11]                   ; Store run.next as run.curr\n                LDRB    R0, [R9]                    ; Load PendSV flag\n                CMP     R0, #1                      ; Compare PendSV value\n                BEQ     osRtxPendExec               ; Branch to PendExec if PendSV is set\n\n                ; Re-enable OS Tick\n                MOV     R0, R5                      ; Restore irqn as function parameter\n                BLX     IRQ_Enable                  ; Enable OS Tick interrupt\n\n                ADD     SP, SP, R4                  ; Restore stack adjustment\n\nosRtxContextRestore\n                LDR     LR, [R8, #TCB_SP_OFS]       ; Load next osRtxThread_t.sp\n                LDRB    R2, [R8, #TCB_SP_FRAME]     ; Load next osRtxThread_t.stack_frame\n\n                ANDS    R2, R2, #0x6                ; Check stack frame for VFP context\n                MRC     p15, 0, R2, c1, c0, 2       ; Read CPACR\n                ANDEQ   R2, R2, #0xFF0FFFFF         ; VFP/NEON state not stacked, disable VFP/NEON\n                ORRNE   R2, R2, #0x00F00000         ; VFP/NEON state is stacked, enable VFP/NEON\n                MCR     p15, 0, R2, c1, c0, 2       ; Write CPACR\n                BEQ     osRtxContextRestore1        ; No VFP\n                ISB                                 ; Sync if VFP was enabled\n                IF {TARGET_FEATURE_EXTENSION_REGISTER_COUNT} == 32\n                VLDMIA  LR!, {D16-D31}              ; Restore D16-D31\n                ENDIF\n                VLDMIA  LR!, {D0-D15}               ; Restore D0-D15\n                LDR     R2, [LR]\n                VMSR    FPSCR, R2                   ; Restore FPSCR\n                ADD     LR, LR, #8                  ; Adjust sp pointer to R4\n\nosRtxContextRestore1\n                LDMIA   LR!, {R4-R11}               ; Restore R4-R11\n                ADD     R12, LR, #32                ; Adjust sp and save it into R12\n                PUSH    {R12}                       ; Push sp onto stack\n                LDM     SP, {SP}^                   ; Restore SP_usr directly\n                ADD     SP, SP, #4                  ; Adjust SP_svc\n                LDMIA   LR!, {R0-R3, R12}           ; Load user registers R0-R3,R12\n                STMIB   SP!, {R0-R3, R12}           ; Store them to SP_svc\n                LDM     LR, {LR}^                   ; Restore LR_usr directly\n                LDMIB   LR!, {R0-R1}                ; Load user registers PC,CPSR\n                ADD     SP, SP, #4\n                STMIB   SP!, {R0-R1}                ; Store them to SP_svc\n                SUB     SP, SP, #32                 ; Adjust SP_svc to stacked LR\n\nosRtxContextExit\n                POP     {PC}                        ; Return\n\n                ENDP\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/ARM/irq_cm0.s",
    "content": ";/*\n; * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       Cortex-M0 Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\n\n\n                PRESERVE8\n                THUMB\n\n\n                AREA     |.constdata|, DATA, READONLY\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                AREA     |.text|, CODE, READONLY\n\n\nSVC_Handler     PROC\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n                IF       :DEF:MPU_LOAD\n                IMPORT   osRtxMpuLoad\n                ENDIF\n\n                MOV      R0,LR\n                LSRS     R0,R0,#3               ; Determine return stack from EXC_RETURN bit 2\n                BCC      SVC_MSP                ; Branch if return stack is MSP\n                MRS      R0,PSP                 ; Get PSP\n\nSVC_Number\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                SUBS     R1,R1,#2               ; Point to SVC instruction\n                LDRB     R1,[R1]                ; Load SVC number\n                CMP      R1,#0\n                BNE      SVC_User               ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDMIA    R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R7                     ; Call service function\n                POP      {R2,R3}                ; Restore SP and EXC_RETURN\n                STMIA    R2!,{R0-R1}            ; Store function return values\n                MOV      LR,R3                  ; Set EXC_RETURN\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDMIA    R3!,{R1,R2}            ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                BEQ      SVC_Exit               ; Branch when threads are the same\n\n                CMP      R1,#0\n                BEQ      SVC_ContextSwitch      ; Branch if running thread is deleted\n\nSVC_ContextSave\n                MRS      R0,PSP                 ; Get PSP\n                SUBS     R0,R0,#32              ; Calculate SP\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STMIA    R0!,{R4-R7}            ; Save R4..R7\n                MOV      R4,R8\n                MOV      R5,R9\n                MOV      R6,R10\n                MOV      R7,R11\n                STMIA    R0!,{R4-R7}            ; Save R8..R11\n\nSVC_ContextSwitch\n                SUBS     R3,R3,#8               ; Adjust address\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\n                IF       :DEF:MPU_LOAD\n                PUSH     {R2,R3}                ; Save registers\n                MOV      R0,R2                  ; osRtxMpuLoad parameter\n                BL       osRtxMpuLoad           ; Load MPU for next thread\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSVC_ContextRestore\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ADDS     R0,R0,#16              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R8..R11\n                MOV      R8,R4\n                MOV      R9,R5\n                MOV      R10,R6\n                MOV      R11,R7\n                MSR      PSP,R0                 ; Set PSP\n                SUBS     R0,R0,#32              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R4..R7\n\n                MOVS     R0,#~0xFFFFFFFD\n                MVNS     R0,R0                  ; Set EXC_RETURN value\n                BX       R0                     ; Exit from handler\n\nSVC_MSP\n                MRS      R0,MSP                 ; Get MSP\n                B        SVC_Number\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LSLS     R1,R1,#2\n                LDR      R3,[R2,R1]             ; Load address of SVC function\n                MOV      R12,R3\n                LDMIA    R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R2,R3}                ; Restore SP and EXC_RETURN\n                STR      R0,[R2]                ; Store function return value\n                MOV      LR,R3                  ; Set EXC_RETURN\n\n                BX       LR                     ; Return from handler\n\n                ALIGN\n                ENDP\n\n\nPendSV_Handler  PROC\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,R1}                ; Restore EXC_RETURN\n                MOV      LR,R1                  ; Set EXC_RETURN\n                B        SVC_Context\n\n                ALIGN\n                ENDP\n\n\nSysTick_Handler PROC\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,R1}                ; Restore EXC_RETURN\n                MOV      LR,R1                  ; Set EXC_RETURN\n                B        SVC_Context\n\n                ALIGN\n                ENDP\n\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/ARM/irq_cm3.s",
    "content": ";/*\n; * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       Cortex-M3 Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\n\n\n                PRESERVE8\n                THUMB\n\n\n                AREA     |.constdata|, DATA, READONLY\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                AREA     |.text|, CODE, READONLY\n\n\nSVC_Handler     PROC\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n                IF       :DEF:MPU_LOAD\n                IMPORT   osRtxMpuLoad\n                ENDIF\n\n                TST      LR,#0x04               ; Determine return stack from EXC_RETURN bit 2\n                ITE      EQ\n                MRSEQ    R0,MSP                 ; Get MSP if return stack is MSP\n                MRSNE    R0,PSP                 ; Get PSP if return stack is PSP\n\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                LDRB     R1,[R1,#-2]            ; Load SVC number\n                CBNZ     R1,SVC_User            ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDM      R0,{R0-R3,R12}         ; Load function parameters and address from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STM      R12,{R0-R1}            ; Store function return values\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3,{R1,R2}             ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                IT       EQ\n                BXEQ     LR                     ; Exit when threads are the same\n\n                CBZ      R1,SVC_ContextSwitch   ; Branch if running thread is deleted\n\nSVC_ContextSave\n                STMDB    R12!,{R4-R11}          ; Save R4..R11\n                STR      R12,[R1,#TCB_SP_OFS]   ; Store SP\n\nSVC_ContextSwitch\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\n                IF       :DEF:MPU_LOAD\n                PUSH     {R2,R3}                ; Save registers\n                MOV      R0,R2                  ; osRtxMpuLoad parameter\n                BL       osRtxMpuLoad           ; Load MPU for next thread\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSVC_ContextRestore\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                LDMIA    R0!,{R4-R11}           ; Restore R4..R11\n                MSR      PSP,R0                 ; Set PSP\n\n                MVN      LR,#~0xFFFFFFFD        ; Set EXC_RETURN value\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDR      R12,[R2,R1,LSL #2]     ; Load address of SVC function\n                LDM      R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STR      R0,[R12]               ; Store function return value\n\n                BX       LR                     ; Return from handler\n\n                ALIGN\n                ENDP\n\n\nPendSV_Handler  PROC\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                MRS      R12,PSP\n                B        SVC_Context\n\n                ALIGN\n                ENDP\n\n\nSysTick_Handler PROC\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                MRS      R12,PSP\n                B        SVC_Context\n\n                ALIGN\n                ENDP\n\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/ARM/irq_cm4f.s",
    "content": ";/*\n; * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       Cortex-M4F Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\nTCB_SF_OFS      EQU      34                     ; TCB.stack_frame offset\n\n\n                PRESERVE8\n                THUMB\n\n\n                AREA     |.constdata|, DATA, READONLY\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                AREA     |.text|, CODE, READONLY\n\n\nSVC_Handler     PROC\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n                IF       :DEF:MPU_LOAD\n                IMPORT   osRtxMpuLoad\n                ENDIF\n\n                TST      LR,#0x04               ; Determine return stack from EXC_RETURN bit 2\n                ITE      EQ\n                MRSEQ    R0,MSP                 ; Get MSP if return stack is MSP\n                MRSNE    R0,PSP                 ; Get PSP if return stack is PSP\n\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                LDRB     R1,[R1,#-2]            ; Load SVC number\n                CBNZ     R1,SVC_User            ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDM      R0,{R0-R3,R12}         ; Load function parameters and address from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STM      R12,{R0-R1}            ; Store function return values\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3,{R1,R2}             ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                IT       EQ\n                BXEQ     LR                     ; Exit when threads are the same\n\n                CBNZ     R1,SVC_ContextSave     ; Branch if running thread is not deleted\n                TST      LR,#0x10               ; Check if extended stack frame\n                BNE      SVC_ContextSwitch\n                LDR      R1,=0xE000EF34         ; FPCCR Address\n                LDR      R0,[R1]                ; Load FPCCR\n                BIC      R0,R0,#1               ; Clear LSPACT (Lazy state)\n                STR      R0,[R1]                ; Store FPCCR\n                B        SVC_ContextSwitch\n\nSVC_ContextSave\n                STMDB    R12!,{R4-R11}          ; Save R4..R11\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VSTMDBEQ R12!,{S16-S31}         ;  Save VFP S16.S31\n                STR      R12,[R1,#TCB_SP_OFS]   ; Store SP\n                STRB     LR, [R1,#TCB_SF_OFS]   ; Store stack frame information\n\nSVC_ContextSwitch\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\n                IF       :DEF:MPU_LOAD\n                PUSH     {R2,R3}                ; Save registers\n                MOV      R0,R2                  ; osRtxMpuLoad parameter\n                BL       osRtxMpuLoad           ; Load MPU for next thread\n                POP      {R2,R3}                ; Restore registers\n                ENDIF\n\nSVC_ContextRestore\n                LDRB     R1,[R2,#TCB_SF_OFS]    ; Load stack frame information\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ORR      LR,R1,#0xFFFFFF00      ; Set EXC_RETURN\n\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VLDMIAEQ R0!,{S16-S31}          ;  Restore VFP S16..S31\n                LDMIA    R0!,{R4-R11}           ; Restore R4..R11\n                MSR      PSP,R0                 ; Set PSP\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDR      R12,[R2,R1,LSL #2]     ; Load address of SVC function\n                LDM      R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STR      R0,[R12]               ; Store function return value\n\n                BX       LR                     ; Return from handler\n\n                ALIGN\n                ENDP\n\n\nPendSV_Handler  PROC\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                MRS      R12,PSP\n                B        SVC_Context\n\n                ALIGN\n                ENDP\n\n\nSysTick_Handler PROC\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                MRS      R12,PSP\n                B        SVC_Context\n\n                ALIGN\n                ENDP\n\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/GCC/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nifeq ($(CPU),m33)\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)irq_armv8mml_fp.S))\nelse ifeq ($(CPU),m4)\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)irq_cm4f.S))\nelse ifeq ($(CPU),a7)\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)irq_ca.S))\nelse\n$(error Invalid CPU: $(CPU))\nendif\n\nobj-y := $(obj_s:.S=.o)\n\nsubdir-asflags-y += -Irtos/rtx5/GCC\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_armv8mbl.S",
    "content": ";/*\n; * Copyright (c) 2016-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       ARMv8M Baseline Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\n        .file    \"irq_armv8mbl.S\"\n        .syntax  unified\n\n        .ifndef  DOMAIN_NS\n        .equ     DOMAIN_NS, 0\n        .endif\n\n        .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset\n        .equ     TCB_SM_OFS,  48        // TCB.stack_mem offset\n        .equ     TCB_SP_OFS,  56        // TCB.SP offset\n        .equ     TCB_SF_OFS,  34        // TCB.stack_frame offset\n        .equ     TCB_TZM_OFS, 64        // TCB.tz_memory offset\n\n        .section \".rodata\"\n        .global  irqRtxLib              // Non weak library reference\nirqRtxLib:\n        .byte    0\n\n\n        .thumb\n        .section \".text\"\n        .align   2\n\n\n        .thumb_func\n        .type    SVC_Handler, %function\n        .global  SVC_Handler\n        .fnstart\n        .cantunwind\nSVC_Handler:\n\n        MOV      R0,LR\n        LSRS     R0,R0,#3               // Determine return stack from EXC_RETURN bit 2\n        BCC      SVC_MSP                // Branch if return stack is MSP\n        MRS      R0,PSP                 // Get PSP\n\nSVC_Number:\n        LDR      R1,[R0,#24]            // Load saved PC from stack\n        SUBS     R1,R1,#2               // Point to SVC instruction\n        LDRB     R1,[R1]                // Load SVC number\n        CMP      R1,#0\n        BNE      SVC_User               // Branch if not SVC 0\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LDM      R0,{R0-R3}             // Load function parameters from stack\n        BLX      R7                     // Call service function\n        POP      {R2,R3}                // Restore SP and EXC_RETURN\n        STMIA    R2!,{R0-R1}            // Store function return values\n        MOV      LR,R3                  // Set EXC_RETURN\n\nSVC_Context:\n        LDR      R3,=osRtxInfo+I_T_RUN_OFS // Load address of osRtxInfo.run\n        LDMIA    R3!,{R1,R2}            // Load osRtxInfo.thread.run: curr & next\n        CMP      R1,R2                  // Check if thread switch is required\n        BEQ      SVC_Exit               // Branch when threads are the same\n\n        CBZ      R1,SVC_ContextSwitch   // Branch if running thread is deleted\n\nSVC_ContextSave:\n        .if      DOMAIN_NS == 1\n        LDR      R0,[R1,#TCB_TZM_OFS]   // Load TrustZone memory identifier\n        CBZ      R0,SVC_ContextSave1    // Branch if there is no secure context\n        PUSH     {R1,R2,R3,R7}          // Save registers\n        MOV      R7,LR                  // Get EXC_RETURN\n        BL       TZ_StoreContext_S      // Store secure context\n        MOV      LR,R7                  // Set EXC_RETURN\n        POP      {R1,R2,R3,R7}          // Restore registers\n        .endif\n\nSVC_ContextSave1:\n        MRS      R0,PSP                 // Get PSP\n        SUBS     R0,R0,#32              // Calculate SP\n        STR      R0,[R1,#TCB_SP_OFS]    // Store SP\n        STMIA    R0!,{R4-R7}            // Save R4..R7\n        MOV      R4,R8\n        MOV      R5,R9\n        MOV      R6,R10\n        MOV      R7,R11\n        STMIA    R0!,{R4-R7}            // Save R8..R11\n\nSVC_ContextSave2:\n        MOV      R0,LR                  // Get EXC_RETURN\n        ADDS     R1,R1,#TCB_SF_OFS      // Adjust address\n        STRB     R0,[R1]                // Store stack frame information\n\nSVC_ContextSwitch:\n        SUBS     R3,R3,#8               // Adjust address\n        STR      R2,[R3]                // osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore:\n        .if      DOMAIN_NS == 1\n        LDR      R0,[R2,#TCB_TZM_OFS]   // Load TrustZone memory identifier\n        CBZ      R0,SVC_ContextRestore1 // Branch if there is no secure context\n        PUSH     {R2,R3}                // Save registers\n        BL       TZ_LoadContext_S       // Load secure context\n        POP      {R2,R3}                // Restore registers\n        .endif\n\nSVC_ContextRestore1:\n        MOV      R1,R2\n        ADDS     R1,R1,#TCB_SF_OFS      // Adjust address\n        LDRB     R0,[R1]                // Load stack frame information\n        MOVS     R1,#0xFF\n        MVNS     R1,R1                  // R1=0xFFFFFF00\n        ORRS     R0,R1\n        MOV      LR,R0                  // Set EXC_RETURN\n\n        .if      DOMAIN_NS == 1\n        LSLS     R0,R0,#25              // Check domain of interrupted thread\n        BPL      SVC_ContextRestore2    // Branch if non-secure\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        MSR      PSP,R0                 // Set PSP\n        BX       LR                     // Exit from handler\n        .else\n        LDR      R0,[R2,#TCB_SM_OFS]    // Load stack memory base\n        MSR      PSPLIM,R0              // Set PSPLIM\n        .endif\n\nSVC_ContextRestore2:\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        ADDS     R0,R0,#16              // Adjust address\n        LDMIA    R0!,{R4-R7}            // Restore R8..R11\n        MOV      R8,R4\n        MOV      R9,R5\n        MOV      R10,R6\n        MOV      R11,R7\n        MSR      PSP,R0                 // Set PSP\n        SUBS     R0,R0,#32              // Adjust address\n        LDMIA    R0!,{R4-R7}            // Restore R4..R7\n\nSVC_Exit:\n        BX       LR                     // Exit from handler\n\nSVC_MSP:\n        MRS      R0,MSP                 // Get MSP\n        B        SVC_Number\n\nSVC_User:\n        LDR      R2,=osRtxUserSVC       // Load address of SVC table\n        LDR      R3,[R2]                // Load SVC maximum number\n        CMP      R1,R3                  // Check SVC number range\n        BHI      SVC_Exit               // Branch if out of range\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LSLS     R1,R1,#2\n        LDR      R3,[R2,R1]             // Load address of SVC function\n        MOV      R12,R3\n        LDMIA    R0,{R0-R3}             // Load function parameters from stack\n        BLX      R12                    // Call service function\n        POP      {R2,R3}                // Restore SP and EXC_RETURN\n        STR      R0,[R2]                // Store function return value\n        MOV      LR,R3                  // Set EXC_RETURN\n\n        BX       LR                     // Return from handler\n\n        .fnend\n        .size    SVC_Handler, .-SVC_Handler\n\n\n        .thumb_func\n        .type    PendSV_Handler, %function\n        .global  PendSV_Handler\n        .fnstart\n        .cantunwind\nPendSV_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxPendSV_Handler    // Call osRtxPendSV_Handler\n        POP      {R0,R1}                // Restore EXC_RETURN\n        MOV      LR,R1                  // Set EXC_RETURN\n        B        Sys_Context\n\n        .fnend\n        .size    PendSV_Handler, .-PendSV_Handler\n\n\n        .thumb_func\n        .type    SysTick_Handler, %function\n        .global  SysTick_Handler\n        .fnstart\n        .cantunwind\nSysTick_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxTick_Handler      // Call osRtxTick_Handler\n        POP      {R0,R1}                // Restore EXC_RETURN\n        MOV      LR,R1                  // Set EXC_RETURN\n        B        Sys_Context\n\n        .fnend\n        .size   SysTick_Handler, .-SysTick_Handler\n\n\n        .thumb_func\n        .type    Sys_Context, %function\n        .global  Sys_Context\n        .fnstart\n        .cantunwind\nSys_Context:\n\n        LDR      R3,=osRtxInfo+I_T_RUN_OFS // Load address of osRtxInfo.run\n        LDM      R3!,{R1,R2}            // Load osRtxInfo.thread.run: curr & next\n        CMP      R1,R2                  // Check if thread switch is required\n        BEQ      Sys_ContextExit        // Branch when threads are the same\n\nSys_ContextSave:\n        .if      DOMAIN_NS == 1\n        LDR      R0,[R1,#TCB_TZM_OFS]   // Load TrustZone memory identifier\n        CBZ      R0,Sys_ContextSave1    // Branch if there is no secure context\n        PUSH     {R1,R2,R3,R7}          // Save registers\n        MOV      R7,LR                  // Get EXC_RETURN\n        BL       TZ_StoreContext_S      // Store secure context\n        MOV      LR,R7                  // Set EXC_RETURN\n        POP      {R1,R2,R3,R7}          // Restore registers\n        MOV      R0,LR                  // Get EXC_RETURN\n        LSLS     R0,R0,#25              // Check domain of interrupted thread\n        BPL      Sys_ContextSave1       // Branch if non-secure\n        MRS      R0,PSP                 // Get PSP\n        STR      R0,[R1,#TCB_SP_OFS]    // Store SP\n        B        Sys_ContextSave2\n        .endif\n\nSys_ContextSave1:\n        MRS      R0,PSP                 // Get PSP\n        SUBS     R0,R0,#32              // Adjust address\n        STR      R0,[R1,#TCB_SP_OFS]    // Store SP\n        STMIA    R0!,{R4-R7}            // Save R4..R7\n        MOV      R4,R8\n        MOV      R5,R9\n        MOV      R6,R10\n        MOV      R7,R11\n        STMIA    R0!,{R4-R7}            // Save R8..R11\n\nSys_ContextSave2:\n        MOV      R0,LR                  // Get EXC_RETURN\n        ADDS     R1,R1,#TCB_SF_OFS      // Adjust address\n        STRB     R0,[R1]                // Store stack frame information\n\nSys_ContextSwitch:\n        SUBS     R3,R3,#8               // Adjust address\n        STR      R2,[R3]                // osRtxInfo.run: curr = next\n\nSys_ContextRestore:\n        .if      DOMAIN_NS == 1\n        LDR      R0,[R2,#TCB_TZM_OFS]   // Load TrustZone memory identifier\n        CBZ      R0,Sys_ContextRestore1 // Branch if there is no secure context\n        PUSH     {R2,R3}                // Save registers\n        BL       TZ_LoadContext_S       // Load secure context\n        POP      {R2,R3}                // Restore registers\n        .endif\n\nSys_ContextRestore1:\n        MOV      R1,R2\n        ADDS     R1,R1,#TCB_SF_OFS      // Adjust offset\n        LDRB     R0,[R1]                // Load stack frame information\n        MOVS     R1,#0xFF\n        MVNS     R1,R1                  // R1=0xFFFFFF00\n        ORRS     R0,R1\n        MOV      LR,R0                  // Set EXC_RETURN\n\n        .if      DOMAIN_NS == 1\n        LSLS     R0,R0,#25              // Check domain of interrupted thread\n        BPL      Sys_ContextRestore2    // Branch if non-secure\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        MSR      PSP,R0                 // Set PSP\n        BX       LR                     // Exit from handler\n        .else\n        LDR      R0,[R2,#TCB_SM_OFS]    // Load stack memory base\n        MSR      PSPLIM,R0              // Set PSPLIM\n        .endif\n\nSys_ContextRestore2:\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        ADDS     R0,R0,#16              // Adjust address\n        LDMIA    R0!,{R4-R7}            // Restore R8..R11\n        MOV      R8,R4\n        MOV      R9,R5\n        MOV      R10,R6\n        MOV      R11,R7\n        MSR      PSP,R0                 // Set PSP\n        SUBS     R0,R0,#32              // Adjust address\n        LDMIA    R0!,{R4-R7}            // Restore R4..R7\n\nSys_ContextExit:\n        BX       LR                     // Exit from handler\n\n        .fnend\n        .size    Sys_Context, .-Sys_Context\n\n\n        .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_armv8mbl_ns.S",
    "content": "        .equ     DOMAIN_NS,   1\n        .include \"./irq_armv8mbl.S\"\n        .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_armv8mml.S",
    "content": "/*\n * Copyright (c) 2016-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       ARMv8M Mainline Exception handlers\n *\n * -----------------------------------------------------------------------------\n */\n\n\n        .file    \"irq_armv8mml.S\"\n        .syntax  unified\n\n        .ifndef  DOMAIN_NS\n        .equ     DOMAIN_NS, 0\n        .endif\n\n        .ifndef  __FPU_USED\n        .equ     __FPU_USED,  0\n        .endif\n\n        .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset\n        .equ     TCB_SM_OFS,  48        // TCB.stack_mem offset\n        .equ     TCB_SP_OFS,  56        // TCB.SP offset\n        .equ     TCB_SF_OFS,  34        // TCB.stack_frame offset\n        .equ     TCB_TZM_OFS, 64        // TCB.tz_memory offset\n\n        .section \".rodata\"\n        .global  irqRtxLib              // Non weak library reference\nirqRtxLib:\n        .byte    0\n\n\n        .thumb\n        .section \".text\"\n        .align   2\n\n\n        .thumb_func\n        .type    SVC_Handler, %function\n        .global  SVC_Handler\n        .fnstart\n        .cantunwind\nSVC_Handler:\n\n        TST      LR,#0x04               // Determine return stack from EXC_RETURN bit 2\n        ITE      EQ\n        MRSEQ    R0,MSP                 // Get MSP if return stack is MSP\n        MRSNE    R0,PSP                 // Get PSP if return stack is PSP\n\n        LDR      R1,[R0,#24]            // Load saved PC from stack\n        LDRB     R1,[R1,#-2]            // Load SVC number\n        CMP      R1,#0\n        BNE      SVC_User               // Branch if not SVC 0\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LDM      R0,{R0-R3,R12}         // Load function parameters and address from stack\n        BLX      R12                    // Call service function\n        POP      {R12,LR}               // Restore SP and EXC_RETURN\n        STM      R12,{R0-R1}            // Store function return values\n\nSVC_Context:\n        LDR      R3,=osRtxInfo+I_T_RUN_OFS // Load address of osRtxInfo.run\n        LDM      R3,{R1,R2}             // Load osRtxInfo.thread.run: curr & next\n        CMP      R1,R2                  // Check if thread switch is required\n        IT       EQ\n        BXEQ     LR                     // Exit when threads are the same\n\n        .if      __FPU_USED == 1\n        CBNZ     R1,SVC_ContextSave     // Branch if running thread is not deleted\n        TST      LR,#0x10               // Check if extended stack frame\n        BNE      SVC_ContextSwitch\n        LDR      R1,=0xE000EF34         // FPCCR Address\n        LDR      R0,[R1]                // Load FPCCR\n        BIC      R0,R0,#1               // Clear LSPACT (Lazy state)\n        STR      R0,[R1]                // Store FPCCR\n        B        SVC_ContextSwitch\n        .else\n        CBZ      R1,SVC_ContextSwitch   // Branch if running thread is deleted\n        .endif\n\nSVC_ContextSave:\n        .if      DOMAIN_NS == 1\n        LDR      R0,[R1,#TCB_TZM_OFS]   // Load TrustZone memory identifier\n        CBZ      R0,SVC_ContextSave1    // Branch if there is no secure context\n        PUSH     {R1,R2,R3,LR}          // Save registers and EXC_RETURN\n        BL       TZ_StoreContext_S      // Store secure context\n        POP      {R1,R2,R3,LR}          // Restore registers and EXC_RETURN\n        .endif\n\nSVC_ContextSave1:\n        MRS      R0,PSP                 // Get PSP\n        STMDB    R0!,{R4-R11}           // Save R4..R11\n        .if      __FPU_USED == 1\n        TST      LR,#0x10               // Check if extended stack frame\n        IT       EQ\n        VSTMDBEQ R0!,{S16-S31}          //  Save VFP S16.S31\n        .endif\n\nSVC_ContextSave2:\n        STR      R0,[R1,#TCB_SP_OFS]    // Store SP\n        STRB     LR,[R1,#TCB_SF_OFS]    // Store stack frame information\n\nSVC_ContextSwitch:\n        STR      R2,[R3]                // osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore:\n        .if      DOMAIN_NS == 1\n        LDR      R0,[R2,#TCB_TZM_OFS]   // Load TrustZone memory identifier\n        CBZ      R0,SVC_ContextRestore1 // Branch if there is no secure context\n        PUSH     {R2,R3}                // Save registers\n        BL       TZ_LoadContext_S       // Load secure context\n        POP      {R2,R3}                // Restore registers\n        .endif\n\nSVC_ContextRestore1:\n        LDR      R0,[R2,#TCB_SM_OFS]    // Load stack memory base\n        LDRB     R1,[R2,#TCB_SF_OFS]    // Load stack frame information\n        MSR      PSPLIM,R0              // Set PSPLIM\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        ORR      LR,R1,#0xFFFFFF00      // Set EXC_RETURN\n\n        .if      DOMAIN_NS == 1\n        TST      LR,#0x40               // Check domain of interrupted thread\n        BNE      SVC_ContextRestore2    // Branch if secure\n        .endif\n\n        .if      __FPU_USED == 1\n        TST      LR,#0x10               // Check if extended stack frame\n        IT       EQ\n        VLDMIAEQ R0!,{S16-S31}          //  Restore VFP S16..S31\n        .endif\n        LDMIA    R0!,{R4-R11}           // Restore R4..R11\n\nSVC_ContextRestore2:\n        MSR      PSP,R0                 // Set PSP\n\nSVC_Exit:\n        BX       LR                     // Exit from handler\n\nSVC_User:\n        LDR      R2,=osRtxUserSVC       // Load address of SVC table\n        LDR      R3,[R2]                // Load SVC maximum number\n        CMP      R1,R3                  // Check SVC number range\n        BHI      SVC_Exit               // Branch if out of range\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LDR      R12,[R2,R1,LSL #2]     // Load address of SVC function\n        LDM      R0,{R0-R3}             // Load function parameters from stack\n        BLX      R12                    // Call service function\n        POP      {R12,LR}               // Restore SP and EXC_RETURN\n        STR      R0,[R12]               // Store function return value\n\n        BX       LR                     // Return from handler\n\n        .fnend\n        .size    SVC_Handler, .-SVC_Handler\n\n\n        .thumb_func\n        .type    PendSV_Handler, %function\n        .global  PendSV_Handler\n        .fnstart\n        .cantunwind\nPendSV_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxPendSV_Handler    // Call osRtxPendSV_Handler\n        POP      {R0,LR}                // Restore EXC_RETURN\n        B        Sys_Context\n\n        .fnend\n        .size    PendSV_Handler, .-PendSV_Handler\n\n\n        .thumb_func\n        .type    SysTick_Handler, %function\n        .global  SysTick_Handler\n        .fnstart\n        .cantunwind\nSysTick_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxTick_Handler      // Call osRtxTick_Handler\n        POP      {R0,LR}                // Restore EXC_RETURN\n        B        Sys_Context\n\n        .fnend\n        .size   SysTick_Handler, .-SysTick_Handler\n\n\n        .thumb_func\n        .type    Sys_Context, %function\n        .global  Sys_Context\n        .fnstart\n        .cantunwind\nSys_Context:\n\n        LDR      R3,=osRtxInfo+I_T_RUN_OFS // Load address of osRtxInfo.run\n        LDM      R3,{R1,R2}             // Load osRtxInfo.thread.run: curr & next\n        CMP      R1,R2                  // Check if thread switch is required\n        IT       EQ\n        BXEQ     LR                     // Exit when threads are the same\n\nSys_ContextSave:\n        .if      DOMAIN_NS == 1\n        LDR      R0,[R1,#TCB_TZM_OFS]   // Load TrustZone memory identifier\n        CBZ      R0,Sys_ContextSave1    // Branch if there is no secure context\n        PUSH     {R1,R2,R3,LR}          // Save registers and EXC_RETURN\n        BL       TZ_StoreContext_S      // Store secure context\n        POP      {R1,R2,R3,LR}          // Restore registers and EXC_RETURN\n        TST      LR,#0x40               // Check domain of interrupted thread\n        IT       NE\n        MRSNE    R0,PSP                 // Get PSP\n        BNE      Sys_ContextSave2       // Branch if secure\n        .endif\n\nSys_ContextSave1:\n        MRS      R0,PSP                 // Get PSP\n        STMDB    R0!,{R4-R11}           // Save R4..R11\n        .if      __FPU_USED == 1\n        TST      LR,#0x10               // Check if extended stack frame\n        IT       EQ\n        VSTMDBEQ R0!,{S16-S31}          //  Save VFP S16.S31\n        .endif\n\nSys_ContextSave2:\n        STR      R0,[R1,#TCB_SP_OFS]    // Store SP\n        STRB     LR,[R1,#TCB_SF_OFS]    // Store stack frame information\n\nSys_ContextSwitch:\n        STR      R2,[R3]                // osRtxInfo.run: curr = next\n\nSys_ContextRestore:\n        .if      DOMAIN_NS == 1\n        LDR      R0,[R2,#TCB_TZM_OFS]   // Load TrustZone memory identifier\n        CBZ      R0,Sys_ContextRestore1 // Branch if there is no secure context\n        PUSH     {R2,R3}                // Save registers\n        BL       TZ_LoadContext_S       // Load secure context\n        POP      {R2,R3}                // Restore registers\n        .endif\n\nSys_ContextRestore1:\n        LDR      R0,[R2,#TCB_SM_OFS]    // Load stack memory base\n        LDRB     R1,[R2,#TCB_SF_OFS]    // Load stack frame information\n        MSR      PSPLIM,R0              // Set PSPLIM\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        ORR      LR,R1,#0xFFFFFF00      // Set EXC_RETURN\n\n        .if      DOMAIN_NS == 1\n        TST      LR,#0x40               // Check domain of interrupted thread\n        BNE      Sys_ContextRestore2    // Branch if secure\n        .endif\n\n        .if      __FPU_USED == 1\n        TST      LR,#0x10               // Check if extended stack frame\n        IT       EQ\n        VLDMIAEQ R0!,{S16-S31}          //  Restore VFP S16..S31\n        .endif\n        LDMIA    R0!,{R4-R11}           // Restore R4..R11\n\nSys_ContextRestore2:\n        MSR      PSP,R0                 // Set PSP\n\nSys_ContextExit:\n        BX       LR                     // Exit from handler\n\n        .fnend\n        .size    Sys_Context, .-Sys_Context\n\n\n        .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_armv8mml_fp.S",
    "content": "        .equ     __FPU_USED,  1\n        .include \"./irq_armv8mml.S\"\n        .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_armv8mml_fp_ns.S",
    "content": "        .equ     __FPU_USED,  1\n        .equ     DOMAIN_NS,   1\n        .include \"./irq_armv8mml.S\"\n        .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_armv8mml_ns.S",
    "content": "        .equ     DOMAIN_NS,   1\n        .include \"./irq_armv8mml.S\"\n        .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_ca.S",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Cortex-A Exception handlers\n *\n * -----------------------------------------------------------------------------\n */\n\n                .file    \"irq_ca.S\"\n                .syntax  unified\n\n                .equ   MODE_FIQ,        0x11\n                .equ   MODE_IRQ,        0x12\n                .equ   MODE_SVC,        0x13\n                .equ   MODE_ABT,        0x17\n                .equ   MODE_UND,        0x1B\n\n                .equ   CPSR_BIT_T,      0x20\n\n                .equ   K_STATE_RUNNING, 2           // osKernelState_t::osKernelRunning\n                .equ   I_K_STATE_OFS,   8           // osRtxInfo.kernel.state offset\n                .equ   I_TICK_IRQN_OFS, 16          // osRtxInfo.tick_irqn offset\n                .equ   I_T_RUN_OFS,     20          // osRtxInfo.thread.run offset\n                .equ   TCB_SP_FRAME,    34          // osRtxThread_t.stack_frame offset\n                .equ   TCB_SP_OFS,      56          // osRtxThread_t.sp offset\n\n\n                .section \".rodata\"\n                .global  irqRtxLib                  // Non weak library reference\nirqRtxLib:\n                .byte    0\n\n                .section \".data\"\n                .global  IRQ_PendSV\nIRQ_NestLevel:\n                .word    0                          // IRQ nesting level counter\nIRQ_PendSV:\n                .byte    0                          // Pending SVC flag\n\n                .arm\n                .section \".text\"\n                .align   4\n\n\n                .type    Undef_Handler, %function\n                .global  Undef_Handler\n                .fnstart\n                .cantunwind\nUndef_Handler:\n\n                SRSFD   SP!, #MODE_UND\n                PUSH    {R0-R4, R12}                // Save APCS corruptible registers to UND mode stack\n\n                MRS     R0, SPSR\n                TST     R0, #CPSR_BIT_T             // Check mode\n                MOVEQ   R1, #4                      // R1 = 4 ARM mode\n                MOVNE   R1, #2                      // R1 = 2 Thumb mode\n                SUB     R0, LR, R1\n                LDREQ   R0, [R0]                    // ARM mode - R0 points to offending instruction\n                BEQ     Undef_Cont\n\n                // Thumb instruction\n                // Determine if it is a 32-bit Thumb instruction\n                LDRH    R0, [R0]\n                MOV     R2, #0x1C\n                CMP     R2, R0, LSR #11\n                BHS     Undef_Cont                  // 16-bit Thumb instruction\n\n                // 32-bit Thumb instruction. Unaligned - reconstruct the offending instruction\n                LDRH    R2, [LR]\n                ORR     R0, R2, R0, LSL #16\nUndef_Cont:\n                MOV     R2, LR                      // Set LR to third argument\n\n                AND     R12, SP, #4                 // Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 // Adjust stack\n                PUSH    {R12, LR}                   // Store stack adjustment and dummy LR\n\n                // R0 =Offending instruction, R1 =2(Thumb) or =4(ARM)\n                BL      CUndefHandler\n\n                POP     {R12, LR}                   // Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 // Unadjust stack\n\n                LDR     LR, [SP, #24]               // Restore stacked LR and possibly adjust for retry\n                SUB     LR, LR, R0\n                LDR     R0, [SP, #28]               // Restore stacked SPSR\n                MSR     SPSR_cxsf, R0\n                CLREX                               // Clear exclusive monitor\n                POP     {R0-R4, R12}                // Restore stacked APCS registers\n                ADD     SP, SP, #8                  // Adjust SP for already-restored banked registers\n                MOVS    PC, LR\n\n                .fnend\n                .size    Undef_Handler, .-Undef_Handler\n\n\n                .type    PAbt_Handler, %function\n                .global  PAbt_Handler\n                .fnstart\n                .cantunwind\nPAbt_Handler:\n\n                SUB     LR, LR, #4                  // Pre-adjust LR\n                SRSFD   SP!, #MODE_ABT              // Save LR and SPRS to ABT mode stack\n                PUSH    {R0-R4, R12}                // Save APCS corruptible registers to ABT mode stack\n                MRC     p15, 0, R0, c5, c0, 1       // IFSR\n                MRC     p15, 0, R1, c6, c0, 2       // IFAR\n\n                MOV     R2, LR                      // Set LR to third argument\n\n                AND     R12, SP, #4                 // Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 // Adjust stack\n                PUSH    {R12, LR}                   // Store stack adjustment and dummy LR\n\n                BL      CPAbtHandler\n\n                POP     {R12, LR}                   // Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 // Unadjust stack\n\n                CLREX                               // Clear exclusive monitor\n                POP     {R0-R4, R12}                // Restore stack APCS registers\n                RFEFD   SP!                         // Return from exception\n\n                .fnend\n                .size    PAbt_Handler, .-PAbt_Handler\n\n\n                .type    DAbt_Handler, %function\n                .global  DAbt_Handler\n                .fnstart\n                .cantunwind\nDAbt_Handler:\n                SUB     LR, LR, #8                  // Pre-adjust LR\n                SRSFD   SP!, #MODE_ABT              // Save LR and SPRS to ABT mode stack\n                PUSH    {R0-R4, R12}                // Save APCS corruptible registers to ABT mode stack\n                MRC     p15, 0, R0, c5, c0, 0       // DFSR\n                MRC     p15, 0, R1, c6, c0, 0       // DFAR\n\n                MOV     R2, LR                      // Set LR to third argument\n\n                AND     R12, SP, #4                 // Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 // Adjust stack\n                PUSH    {R12, LR}                   // Store stack adjustment and dummy LR\n\n                BL      CDAbtHandler\n\n                POP     {R12, LR}                   // Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 // Unadjust stack\n\n                CLREX                               // Clear exclusive monitor\n                POP     {R0-R4, R12}                // Restore stacked APCS registers\n                RFEFD   SP!                         // Return from exception\n\n                .fnend\n                .size    DAbt_Handler, .-DAbt_Handler\n\n\n                .type    IRQ_Handler, %function\n                .global  IRQ_Handler\n                .fnstart\n                .cantunwind\nIRQ_Handler:\n\n                SUB     LR, LR, #4                  // Pre-adjust LR\n                SRSFD   SP!, #MODE_SVC              // Save LR_irq and SPSR_irq on to the SVC stack\n                CPS     #MODE_SVC                   // Change to SVC mode\n                PUSH    {R0-R3, R12, LR}            // Save APCS corruptible registers\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                ADD     R1, R1, #1                  // Increment IRQ nesting level\n                STR     R1, [R0]\n\n                MOV     R3, SP                      // Move SP into R3\n                AND     R3, R3, #4                  // Get stack adjustment to ensure 8-byte alignment\n                SUB     SP, SP, R3                  // Adjust stack\n                PUSH    {R3, R4}                    // Store stack adjustment(R3) and user data(R4)\n\n                BLX     IRQ_GetActiveIRQ            // Retrieve interrupt ID into R0\n                MOV     R4, R0                      // Move interrupt ID to R4\n\n                BLX     IRQ_GetHandler              // Retrieve interrupt handler address for current ID\n                CMP     R0, #0                      // Check if handler address is 0\n                BEQ     IRQ_End                     // If 0, end interrupt and return\n\n                CPSIE   i                           // Re-enable interrupts\n                BLX     R0                          // Call IRQ handler\n                CPSID   i                           // Disable interrupts\n\nIRQ_End:\n                MOV     R0, R4                      // Move interrupt ID to R0\n                BLX     IRQ_EndOfInterrupt          // Signal end of interrupt\n\n                POP     {R3, R4}                    // Restore stack adjustment(R3) and user data(R4)\n                ADD     SP, SP, R3                  // Unadjust stack\n\n                BL      osRtxContextSwitch          // Continue in context switcher\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                SUBS    R1, R1, #1                  // Decrement IRQ nesting level\n                STR     R1, [R0]\n\n                CLREX                               // Clear exclusive monitor for interrupted code\n                POP     {R0-R3, R12, LR}            // Restore stacked APCS registers\n                RFEFD   SP!                         // Return from IRQ handler\n\n                .fnend\n                .size    IRQ_Handler, .-IRQ_Handler\n\n\n                .type    SVC_Handler, %function\n                .global  SVC_Handler\n                .fnstart\n                .cantunwind\nSVC_Handler:\n\n                SRSFD   SP!, #MODE_SVC              // Store SPSR_svc and LR_svc onto SVC stack\n                PUSH    {R12, LR}\n\n                MRS     R12, SPSR                   // Load SPSR\n                TST     R12, #CPSR_BIT_T            // Thumb bit set?\n                LDRHNE  R12, [LR,#-2]               // Thumb: load halfword\n                BICNE   R12, R12, #0xFF00           //        extract SVC number\n                LDREQ   R12, [LR,#-4]               // ARM:   load word\n                BICEQ   R12, R12, #0xFF000000       //        extract SVC number\n                CMP     R12, #0                     // Compare SVC number\n                BNE     SVC_User                    // Branch if User SVC\n\n                PUSH    {R0-R3}\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                ADD     R1, R1, #1                  // Increment IRQ nesting level\n                STR     R1, [R0]\n\n                LDR     R0, =osRtxInfo\n                LDR     R1, [R0, #I_K_STATE_OFS]    // Load RTX5 kernel state\n                CMP     R1, #K_STATE_RUNNING        // Check osKernelRunning\n                BLT     SVC_FuncCall                // Continue if kernel is not running\n                LDR     R0, [R0, #I_TICK_IRQN_OFS]  // Load OS Tick irqn\n                BLX     IRQ_Disable                 // Disable OS Tick interrupt\nSVC_FuncCall:\n                POP     {R0-R3}\n\n                LDR     R12, [SP]                   // Reload R12 from stack\n\n                CPSIE   i                           // Re-enable interrupts\n                BLX     R12                         // Branch to SVC function\n                CPSID   i                           // Disable interrupts\n\n                SUB     SP, SP, #4\n                STM     SP, {SP}^                   // Store SP_usr onto stack\n                POP     {R12}                       // Pop SP_usr into R12\n                SUB     R12, R12, #16               // Adjust pointer to SP_usr\n                LDMDB   R12, {R2,R3}                // Load return values from SVC function\n                PUSH    {R0-R3}                     // Push return values to stack\n\n                LDR     R0, =osRtxInfo\n                LDR     R1, [R0, #I_K_STATE_OFS]    // Load RTX5 kernel state\n                CMP     R1, #K_STATE_RUNNING        // Check osKernelRunning\n                BLT     SVC_ContextCheck            // Continue if kernel is not running\n                LDR     R0, [R0, #I_TICK_IRQN_OFS]  // Load OS Tick irqn\n                BLX     IRQ_Enable                  // Enable OS Tick interrupt\n\nSVC_ContextCheck:\n                BL      osRtxContextSwitch          // Continue in context switcher\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                SUB     R1, R1, #1                  // Decrement IRQ nesting level\n                STR     R1, [R0]\n\n                CLREX                               // Clear exclusive monitor\n                POP     {R0-R3, R12, LR}            // Restore stacked APCS registers\n                RFEFD   SP!                         // Return from exception\n\nSVC_User:\n                PUSH    {R4, R5}\n                LDR     R5,=osRtxUserSVC            // Load address of SVC table\n                LDR     R4,[R5]                     // Load SVC maximum number\n                CMP     R12,R4                      // Check SVC number range\n                BHI     SVC_Done                    // Branch if out of range\n\n                LDR     R12,[R5,R12,LSL #2]         // Load SVC Function Address\n                BLX     R12                         // Call SVC Function\n\nSVC_Done:\n                CLREX                               // Clear exclusive monitor\n                POP     {R4, R5, R12, LR}\n                RFEFD   SP!                         // Return from exception\n\n                .fnend\n                .size    SVC_Handler, .-SVC_Handler\n\n\n                .type    osRtxContextSwitch, %function\n                .global  osRtxContextSwitch\n                .fnstart\n                .cantunwind\nosRtxContextSwitch:\n\n                PUSH    {LR}\n\n                // Check interrupt nesting level\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]                    // Load IRQ nest level\n                CMP     R1, #1\n                BNE     osRtxContextExit            // Nesting interrupts, exit context switcher\n\n                LDR     R12, =osRtxInfo+I_T_RUN_OFS // Load address of osRtxInfo.run\n                LDM     R12, {R0, R1}               // Load osRtxInfo.thread.run: curr & next\n                LDR     R2, =IRQ_PendSV             // Load address of IRQ_PendSV flag\n                LDRB    R3, [R2]                    // Load PendSV flag\n\n                CMP     R0, R1                      // Check if context switch is required\n                BNE     osRtxContextCheck           // Not equal, check if context save required\n                CMP     R3, #1                      // Compare IRQ_PendSV value\n                BNE     osRtxContextExit            // No post processing (and no context switch requested)\n\nosRtxContextCheck:\n                STR     R1, [R12]                   // Store run.next as run.curr\n                // R0 = curr, R1 = next, R2 = &IRQ_PendSV, R3 = IRQ_PendSV, R12 = &osRtxInfo.thread.run\n                PUSH    {R1-R3, R12}\n\n                CMP     R0, #0                      // Is osRtxInfo.thread.run.curr == 0\n                BEQ     osRtxPostProcess            // Current deleted, skip context save\n\nosRtxContextSave:\n                MOV     LR, R0                      // Move &osRtxInfo.thread.run.curr to LR\n                MOV     R0, SP                      // Move SP_svc into R0\n                ADD     R0, R0, #20                 // Adjust SP_svc to R0 of the basic frame\n                SUB     SP, SP, #4\n                STM     SP, {SP}^                   // Save SP_usr to current stack\n                POP     {R1}                        // Pop SP_usr into R1\n\n                SUB     R1, R1, #64                 // Adjust SP_usr to R4 of the basic frame\n                STMIA   R1!, {R4-R11}               // Save R4-R11 to user stack\n                LDMIA   R0!, {R4-R8}                // Load stacked R0-R3,R12 into R4-R8\n                STMIA   R1!, {R4-R8}                // Store them to user stack\n                STM     R1, {LR}^                   // Store LR_usr directly\n                ADD     R1, R1, #4                  // Adjust user sp to PC\n                LDMIB   R0!, {R5-R6}                // Load current PC, CPSR\n                STMIA   R1!, {R5-R6}                // Restore user PC and CPSR\n\n                SUB     R1, R1, #64                 // Adjust SP_usr to stacked R4\n\n                // Check if VFP state need to be saved\n                MRC     p15, 0, R2, c1, c0, 2       // VFP/NEON access enabled? (CPACR)\n                AND     R2, R2, #0x00F00000\n                CMP     R2, #0x00F00000\n                BNE     osRtxContextSave1           // Continue, no VFP\n\n                VMRS    R2, FPSCR\n                STMDB   R1!, {R2,R12}               // Push FPSCR, maintain 8-byte alignment\n\n                VSTMDB  R1!, {D0-D15}               // Save D0-D15\n                #if     __ARM_NEON == 1\n                VSTMDB  R1!, {D16-D31}              // Save D16-D31\n                #endif\n\n                LDRB    R2, [LR, #TCB_SP_FRAME]     // Load osRtxInfo.thread.run.curr frame info\n                #if     __ARM_NEON == 1\n                ORR     R2, R2, #4                  // NEON state\n                #else\n                ORR     R2, R2, #2                  // VFP state\n                #endif\n                STRB    R2, [LR, #TCB_SP_FRAME]     // Store VFP/NEON state\n\nosRtxContextSave1:\n                STR     R1, [LR, #TCB_SP_OFS]       // Store user sp to osRtxInfo.thread.run.curr\n\nosRtxPostProcess:\n                // RTX IRQ post processing check\n                POP     {R8-R11}                    // Pop R8 = run.next, R9 = &IRQ_PendSV, R10 = IRQ_PendSV, R11 = &osRtxInfo.thread.run\n                CMP     R10, #1                     // Compare PendSV value\n                BNE     osRtxContextRestore         // Skip post processing if not pending\n\n                MOV     R4, SP                      // Move SP_svc into R4\n                AND     R4, R4, #4                  // Get stack adjustment to ensure 8-byte alignment\n                SUB     SP, SP, R4                  // Adjust stack\n\n                // Disable OS Tick\n                LDR     R5, =osRtxInfo              // Load address of osRtxInfo\n                LDR     R5, [R5, #I_TICK_IRQN_OFS]  // Load OS Tick irqn\n                MOV     R0, R5                      // Set it as function parameter\n                BLX     IRQ_Disable                 // Disable OS Tick interrupt\n                MOV     R6, #0                      // Set PendSV clear value\n                B       osRtxPendCheck\nosRtxPendExec:\n                STRB    R6, [R9]                    // Clear PendSV flag\n                CPSIE   i                           // Re-enable interrupts\n                BLX     osRtxPendSV_Handler         // Post process pending objects\n                CPSID   i                           // Disable interrupts\nosRtxPendCheck:\n                LDR     R8, [R11, #4]               // Load osRtxInfo.thread.run.next\n                STR     R8, [R11]                   // Store run.next as run.curr\n                LDRB    R0, [R9]                    // Load PendSV flag\n                CMP     R0, #1                      // Compare PendSV value\n                BEQ     osRtxPendExec               // Branch to PendExec if PendSV is set\n\n                // Re-enable OS Tick\n                MOV     R0, R5                      // Restore irqn as function parameter\n                BLX     IRQ_Enable                  // Enable OS Tick interrupt\n\n                ADD     SP, SP, R4                  // Restore stack adjustment\n\nosRtxContextRestore:\n                LDR     LR, [R8, #TCB_SP_OFS]       // Load next osRtxThread_t.sp\n                LDRB    R2, [R8, #TCB_SP_FRAME]     // Load next osRtxThread_t.stack_frame\n\n                ANDS    R2, R2, #0x6                // Check stack frame for VFP context\n                MRC     p15, 0, R2, c1, c0, 2       // Read CPACR\n                ANDEQ   R2, R2, #0xFF0FFFFF         // VFP/NEON state not stacked, disable VFP/NEON\n                ORRNE   R2, R2, #0x00F00000         // VFP/NEON state is stacked, enable VFP/NEON\n                MCR     p15, 0, R2, c1, c0, 2       // Write CPACR\n                BEQ     osRtxContextRestore1        // No VFP\n                ISB                                 // Sync if VFP was enabled\n                #if     __ARM_NEON == 1\n                VLDMIA  LR!, {D16-D31}              // Restore D16-D31\n                #endif\n                VLDMIA  LR!, {D0-D15}               // Restore D0-D15\n                LDR     R2, [LR]\n                VMSR    FPSCR, R2                   // Restore FPSCR\n                ADD     LR, LR, #8                  // Adjust sp pointer to R4\n\nosRtxContextRestore1:\n                LDMIA   LR!, {R4-R11}               // Restore R4-R11\n                ADD     R12, LR, #32                // Adjust sp and save it into R12\n                PUSH    {R12}                       // Push sp onto stack\n                LDM     SP, {SP}^                   // Restore SP_usr directly\n                ADD     SP, SP, #4                  // Adjust SP_svc\n                LDMIA   LR!, {R0-R3, R12}           // Load user registers R0-R3,R12\n                STMIB   SP!, {R0-R3, R12}           // Store them to SP_svc\n                LDM     LR, {LR}^                   // Restore LR_usr directly\n                LDMIB   LR!, {R0-R1}                // Load user registers PC,CPSR\n                ADD     SP, SP, #4\n                STMIB   SP!, {R0-R1}                // Store them to SP_svc\n                SUB     SP, SP, #32                 // Adjust SP_svc to stacked LR\n\nosRtxContextExit:\n                POP     {PC}                        // Return\n\n                .fnend\n                .size    osRtxContextSwitch, .-osRtxContextSwitch\n\n                .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_cm0.S",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Cortex-M0 Exception handlers\n *\n * -----------------------------------------------------------------------------\n */\n\n\n        .file    \"irq_cm0.S\"\n        .syntax  unified\n\n        .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset\n        .equ     TCB_SP_OFS,  56        // TCB.SP offset\n\n        .section \".rodata\"\n        .global  irqRtxLib              // Non weak library reference\nirqRtxLib:\n        .byte    0\n\n\n        .thumb\n        .section \".text\"\n        .align   2\n\n\n        .thumb_func\n        .type    SVC_Handler, %function\n        .global  SVC_Handler\n        .fnstart\n        .cantunwind\nSVC_Handler:\n\n        MOV      R0,LR\n        LSRS     R0,R0,#3               // Determine return stack from EXC_RETURN bit 2\n        BCC      SVC_MSP                // Branch if return stack is MSP\n        MRS      R0,PSP                 // Get PSP\n\nSVC_Number:\n        LDR      R1,[R0,#24]            // Load saved PC from stack\n        SUBS     R1,R1,#2               // Point to SVC instruction\n        LDRB     R1,[R1]                // Load SVC number\n        CMP      R1,#0\n        BNE      SVC_User               // Branch if not SVC 0\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LDMIA    R0,{R0-R3}             // Load function parameters from stack\n        BLX      R7                     // Call service function\n        POP      {R2,R3}                // Restore SP and EXC_RETURN\n        STMIA    R2!,{R0-R1}            // Store function return values\n        MOV      LR,R3                  // Set EXC_RETURN\n\nSVC_Context:\n        LDR      R3,=osRtxInfo+I_T_RUN_OFS // Load address of osRtxInfo.run\n        LDMIA    R3!,{R1,R2}            // Load osRtxInfo.thread.run: curr & next\n        CMP      R1,R2                  // Check if thread switch is required\n        BEQ      SVC_Exit               // Branch when threads are the same\n\n        CMP      R1,#0\n        BEQ      SVC_ContextSwitch      // Branch if running thread is deleted\n\nSVC_ContextSave:\n        MRS      R0,PSP                 // Get PSP\n        SUBS     R0,R0,#32              // Calculate SP\n        STR      R0,[R1,#TCB_SP_OFS]    // Store SP\n        STMIA    R0!,{R4-R7}            // Save R4..R7\n        MOV      R4,R8\n        MOV      R5,R9\n        MOV      R6,R10\n        MOV      R7,R11\n        STMIA    R0!,{R4-R7}            // Save R8..R11\n\nSVC_ContextSwitch:\n        SUBS     R3,R3,#8               // Adjust address\n        STR      R2,[R3]                // osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore:\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        ADDS     R0,R0,#16              // Adjust address\n        LDMIA    R0!,{R4-R7}            // Restore R8..R11\n        MOV      R8,R4\n        MOV      R9,R5\n        MOV      R10,R6\n        MOV      R11,R7\n        MSR      PSP,R0                 // Set PSP\n        SUBS     R0,R0,#32              // Adjust address\n        LDMIA    R0!,{R4-R7}            // Restore R4..R7\n\n        MOVS     R0,#~0xFFFFFFFD\n        MVNS     R0,R0                  // Set EXC_RETURN value\n        BX       R0                     // Exit from handler\n\nSVC_MSP:\n        MRS      R0,MSP                 // Get MSP\n        B        SVC_Number\n\nSVC_Exit:\n        BX       LR                     // Exit from handler\n\nSVC_User:\n        LDR      R2,=osRtxUserSVC       // Load address of SVC table\n        LDR      R3,[R2]                // Load SVC maximum number\n        CMP      R1,R3                  // Check SVC number range\n        BHI      SVC_Exit               // Branch if out of range\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LSLS     R1,R1,#2\n        LDR      R3,[R2,R1]             // Load address of SVC function\n        MOV      R12,R3\n        LDMIA    R0,{R0-R3}             // Load function parameters from stack\n        BLX      R12                    // Call service function\n        POP      {R2,R3}                // Restore SP and EXC_RETURN\n        STR      R0,[R2]                // Store function return value\n        MOV      LR,R3                  // Set EXC_RETURN\n\n        BX       LR                     // Return from handler\n\n        .fnend\n        .size    SVC_Handler, .-SVC_Handler\n\n\n        .thumb_func\n        .type    PendSV_Handler, %function\n        .global  PendSV_Handler\n        .fnstart\n        .cantunwind\nPendSV_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxPendSV_Handler    // Call osRtxPendSV_Handler\n        POP      {R0,R1}                // Restore EXC_RETURN\n        MOV      LR,R1                  // Set EXC_RETURN\n        B        SVC_Context\n\n        .fnend\n        .size    PendSV_Handler, .-PendSV_Handler\n\n\n        .thumb_func\n        .type    SysTick_Handler, %function\n        .global  SysTick_Handler\n        .fnstart\n        .cantunwind\nSysTick_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxTick_Handler      // Call osRtxTick_Handler\n        POP      {R0,R1}                // Restore EXC_RETURN\n        MOV      LR,R1                  // Set EXC_RETURN\n        B        SVC_Context\n\n        .fnend\n        .size    SysTick_Handler, .-SysTick_Handler\n\n\n        .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_cm3.S",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Cortex-M3 Exception handlers\n *\n * -----------------------------------------------------------------------------\n */\n\n\n        .file    \"irq_cm3.S\"\n        .syntax  unified\n\n        .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset\n        .equ     TCB_SP_OFS,  56        // TCB.SP offset\n\n        .section \".rodata\"\n        .global  irqRtxLib              // Non weak library reference\nirqRtxLib:\n        .byte    0\n\n\n        .thumb\n        .section \".text\"\n        .align   2\n\n\n        .thumb_func\n        .type    SVC_Handler, %function\n        .global  SVC_Handler\n        .fnstart\n        .cantunwind\nSVC_Handler:\n\n        TST      LR,#0x04               // Determine return stack from EXC_RETURN bit 2\n        ITE      EQ\n        MRSEQ    R0,MSP                 // Get MSP if return stack is MSP\n        MRSNE    R0,PSP                 // Get PSP if return stack is PSP\n\n        LDR      R1,[R0,#24]            // Load saved PC from stack\n        LDRB     R1,[R1,#-2]            // Load SVC number\n        CBNZ     R1,SVC_User            // Branch if not SVC 0\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LDM      R0,{R0-R3,R12}         // Load function parameters and address from stack\n        BLX      R12                    // Call service function\n        POP      {R12,LR}               // Restore SP and EXC_RETURN\n        STM      R12,{R0-R1}            // Store function return values\n\nSVC_Context:\n        LDR      R3,=osRtxInfo+I_T_RUN_OFS // Load address of osRtxInfo.run\n        LDM      R3,{R1,R2}             // Load osRtxInfo.thread.run: curr & next\n        CMP      R1,R2                  // Check if thread switch is required\n        IT       EQ\n        BXEQ     LR                     // Exit when threads are the same\n\n        CBZ      R1,SVC_ContextSwitch   // Branch if running thread is deleted\n\nSVC_ContextSave:\n        STMDB    R12!,{R4-R11}          // Save R4..R11\n        STR      R12,[R1,#TCB_SP_OFS]   // Store SP\n\nSVC_ContextSwitch:\n        STR      R2,[R3]                // osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore:\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        LDMIA    R0!,{R4-R11}           // Restore R4..R11\n        MSR      PSP,R0                 // Set PSP\n        MVN      LR,#~0xFFFFFFFD        // Set EXC_RETURN value\n\nSVC_Exit:\n        BX       LR                     // Exit from handler\n\nSVC_User:\n        LDR      R2,=osRtxUserSVC       // Load address of SVC table\n        LDR      R3,[R2]                // Load SVC maximum number\n        CMP      R1,R3                  // Check SVC number range\n        BHI      SVC_Exit               // Branch if out of range\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LDR      R12,[R2,R1,LSL #2]     // Load address of SVC function\n        LDM      R0,{R0-R3}             // Load function parameters from stack\n        BLX      R12                    // Call service function\n        POP      {R12,LR}               // Restore SP and EXC_RETURN\n        STR      R0,[R12]               // Store function return value\n\n        BX       LR                     // Return from handler\n\n        .fnend\n        .size    SVC_Handler, .-SVC_Handler\n\n\n        .thumb_func\n        .type    PendSV_Handler, %function\n        .global  PendSV_Handler\n        .fnstart\n        .cantunwind\nPendSV_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxPendSV_Handler    // Call osRtxPendSV_Handler\n        POP      {R0,LR}                // Restore EXC_RETURN\n        MRS      R12,PSP\n        B        SVC_Context\n\n        .fnend\n        .size    PendSV_Handler, .-PendSV_Handler\n\n\n        .thumb_func\n        .type    SysTick_Handler, %function\n        .global  SysTick_Handler\n        .fnstart\n        .cantunwind\nSysTick_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxTick_Handler      // Call osRtxTick_Handler\n        POP      {R0,LR}                // Restore EXC_RETURN\n        MRS      R12,PSP\n        B        SVC_Context\n\n        .fnend\n        .size    SysTick_Handler, .-SysTick_Handler\n\n\n        .end\n"
  },
  {
    "path": "rtos/rtx5/GCC/irq_cm4f.S",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Cortex-M4F Exception handlers\n *\n * -----------------------------------------------------------------------------\n */\n\n\n        .file    \"irq_cm4f.S\"\n        .syntax  unified\n\n        .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset\n        .equ     TCB_SP_OFS,  56        // TCB.SP offset\n        .equ     TCB_SF_OFS,  34        // TCB.stack_frame offset\n\n        .section \".rodata\"\n        .global  irqRtxLib              // Non weak library reference\nirqRtxLib:\n        .byte    0\n\n\n        .thumb\n        .section \".text\"\n        .align   2\n\n\n        .thumb_func\n        .type    SVC_Handler, %function\n        .global  SVC_Handler\n        .fnstart\n        .cantunwind\nSVC_Handler:\n\n        TST      LR,#0x04               // Determine return stack from EXC_RETURN bit 2\n        ITE      EQ\n        MRSEQ    R0,MSP                 // Get MSP if return stack is MSP\n        MRSNE    R0,PSP                 // Get PSP if return stack is PSP\n\n        LDR      R1,[R0,#24]            // Load saved PC from stack\n        LDRB     R1,[R1,#-2]            // Load SVC number\n        CBNZ     R1,SVC_User            // Branch if not SVC 0\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LDM      R0,{R0-R3,R12}         // Load function parameters and address from stack\n        BLX      R12                    // Call service function\n        POP      {R12,LR}               // Restore SP and EXC_RETURN\n        STM      R12,{R0-R1}            // Store function return values\n\nSVC_Context:\n        LDR      R3,=osRtxInfo+I_T_RUN_OFS // Load address of osRtxInfo.run\n        LDM      R3,{R1,R2}             // Load osRtxInfo.thread.run: curr & next\n        CMP      R1,R2                  // Check if thread switch is required\n        IT       EQ\n        BXEQ     LR                     // Exit when threads are the same\n\n        CBNZ     R1,SVC_ContextSave     // Branch if running thread is not deleted\n        TST      LR,#0x10               // Check if extended stack frame\n        BNE      SVC_ContextSwitch\n        LDR      R1,=0xE000EF34         // FPCCR Address\n        LDR      R0,[R1]                // Load FPCCR\n        BIC      R0,R0,#1               // Clear LSPACT (Lazy state)\n        STR      R0,[R1]                // Store FPCCR\n        B        SVC_ContextSwitch\n\nSVC_ContextSave:\n        STMDB    R12!,{R4-R11}          // Save R4..R11\n        TST      LR,#0x10               // Check if extended stack frame\n        IT       EQ\n        VSTMDBEQ R12!,{S16-S31}         //  Save VFP S16.S31\n        STR      R12,[R1,#TCB_SP_OFS]   // Store SP\n        STRB     LR, [R1,#TCB_SF_OFS]   // Store stack frame information\n\nSVC_ContextSwitch:\n        STR      R2,[R3]                // osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore:\n        LDRB     R1,[R2,#TCB_SF_OFS]    // Load stack frame information\n        LDR      R0,[R2,#TCB_SP_OFS]    // Load SP\n        ORR      LR,R1,#0xFFFFFF00      // Set EXC_RETURN\n\n        TST      LR,#0x10               // Check if extended stack frame\n        IT       EQ\n        VLDMIAEQ R0!,{S16-S31}          //  Restore VFP S16..S31\n        LDMIA    R0!,{R4-R11}           // Restore R4..R11\n        MSR      PSP,R0                 // Set PSP\n\nSVC_Exit:\n        BX       LR                     // Exit from handler\n\nSVC_User:\n        LDR      R2,=osRtxUserSVC       // Load address of SVC table\n        LDR      R3,[R2]                // Load SVC maximum number\n        CMP      R1,R3                  // Check SVC number range\n        BHI      SVC_Exit               // Branch if out of range\n\n        PUSH     {R0,LR}                // Save SP and EXC_RETURN\n        LDR      R12,[R2,R1,LSL #2]     // Load address of SVC function\n        LDM      R0,{R0-R3}             // Load function parameters from stack\n        BLX      R12                    // Call service function\n        POP      {R12,LR}               // Restore SP and EXC_RETURN\n        STR      R0,[R12]               // Store function return value\n\n        BX       LR                     // Return from handler\n\n        .fnend\n        .size    SVC_Handler, .-SVC_Handler\n\n\n        .thumb_func\n        .type    PendSV_Handler, %function\n        .global  PendSV_Handler\n        .fnstart\n        .cantunwind\nPendSV_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxPendSV_Handler    // Call osRtxPendSV_Handler\n        POP      {R0,LR}                // Restore EXC_RETURN\n        MRS      R12,PSP\n        B        SVC_Context\n\n        .fnend\n        .size    PendSV_Handler, .-PendSV_Handler\n\n\n        .thumb_func\n        .type    SysTick_Handler, %function\n        .global  SysTick_Handler\n        .fnstart\n        .cantunwind\nSysTick_Handler:\n\n        PUSH     {R0,LR}                // Save EXC_RETURN\n        BL       osRtxTick_Handler      // Call osRtxTick_Handler\n        POP      {R0,LR}                // Restore EXC_RETURN\n        MRS      R12,PSP\n        B        SVC_Context\n\n        .fnend\n        .size    SysTick_Handler, .-SysTick_Handler\n\n\n        .end\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_armv8mbl.s",
    "content": "                NAME    irq_armv8mbl.s\n#define         DOMAIN_NS 0\n#include        \"irq_armv8mbl_common.s\"\n                END\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_armv8mbl_common.s",
    "content": ";/*\n; * Copyright (c) 2016-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       ARMv8M Baseline Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\n#ifndef DOMAIN_NS\n#define DOMAIN_NS        0\n#endif\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\nTCB_SF_OFS      EQU      34                     ; TCB.stack_frame offset\nTCB_TZM_OFS     EQU      64                     ; TCB.tz_memory offset\n\n\n                PRESERVE8\n\n\n                SECTION  .rodata:DATA:NOROOT(2)\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                SECTION  .text:CODE:NOROOT(2)\n                THUMB\n\n\nSVC_Handler\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n                #if     (DOMAIN_NS == 1)\n                IMPORT   TZ_LoadContext_S\n                IMPORT   TZ_StoreContext_S\n                #endif\n\n                MOV      R0,LR\n                LSRS     R0,R0,#3               ; Determine return stack from EXC_RETURN bit 2\n                BCC      SVC_MSP                ; Branch if return stack is MSP\n                MRS      R0,PSP                 ; Get PSP\n\nSVC_Number\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                SUBS     R1,R1,#2               ; Point to SVC instruction\n                LDRB     R1,[R1]                ; Load SVC number\n                CMP      R1,#0\n                BNE      SVC_User               ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDM      R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R7                     ; Call service function\n                POP      {R2,R3}                ; Restore SP and EXC_RETURN\n                STMIA    R2!,{R0-R1}            ; Store function return values\n                MOV      LR,R3                  ; Set EXC_RETURN\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDMIA    R3!,{R1,R2}            ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                BEQ      SVC_Exit               ; Branch when threads are the same\n\n                CBZ      R1,SVC_ContextSwitch   ; Branch if running thread is deleted\n\nSVC_ContextSave\n                #if     (DOMAIN_NS == 1)\n                LDR      R0,[R1,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,SVC_ContextSave1    ; Branch if there is no secure context\n                PUSH     {R1,R2,R3,R7}          ; Save registers\n                MOV      R7,LR                  ; Get EXC_RETURN\n                BL       TZ_StoreContext_S      ; Store secure context\n                MOV      LR,R7                  ; Set EXC_RETURN\n                POP      {R1,R2,R3,R7}          ; Restore registers\n                #endif\n\nSVC_ContextSave1\n                MRS      R0,PSP                 ; Get PSP\n                SUBS     R0,R0,#32              ; Calculate SP\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STMIA    R0!,{R4-R7}            ; Save R4..R7\n                MOV      R4,R8\n                MOV      R5,R9\n                MOV      R6,R10\n                MOV      R7,R11\n                STMIA    R0!,{R4-R7}            ; Save R8..R11\n\nSVC_ContextSave2\n                MOV      R0,LR                  ; Get EXC_RETURN\n                ADDS     R1,R1,#TCB_SF_OFS      ; Adjust address\n                STRB     R0,[R1]                ; Store stack frame information\n\nSVC_ContextSwitch\n                SUBS     R3,R3,#8               ; Adjust address\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore\n                #if     (DOMAIN_NS == 1)\n                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,SVC_ContextRestore1 ; Branch if there is no secure context\n                PUSH     {R2,R3}                ; Save registers\n                BL       TZ_LoadContext_S       ; Load secure context\n                POP      {R2,R3}                ; Restore registers\n                #endif\n\nSVC_ContextRestore1\n                MOV      R1,R2\n                ADDS     R1,R1,#TCB_SF_OFS      ; Adjust address\n                LDRB     R0,[R1]                ; Load stack frame information\n                MOVS     R1,#0xFF\n                MVNS     R1,R1                  ; R1=0xFFFFFF00\n                ORRS     R0,R1\n                MOV      LR,R0                  ; Set EXC_RETURN\n\n                #if     (DOMAIN_NS == 1)\n                LSLS     R0,R0,#25              ; Check domain of interrupted thread\n                BPL      SVC_ContextRestore2    ; Branch if non-secure\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                MSR      PSP,R0                 ; Set PSP\n                BX       LR                     ; Exit from handler\n                #else\n                LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base\n                MSR      PSPLIM,R0              ; Set PSPLIM\n                #endif\n\nSVC_ContextRestore2\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ADDS     R0,R0,#16              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R8..R11\n                MOV      R8,R4\n                MOV      R9,R5\n                MOV      R10,R6\n                MOV      R11,R7\n                MSR      PSP,R0                 ; Set PSP\n                SUBS     R0,R0,#32              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R4..R7\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_MSP\n                MRS      R0,MSP                 ; Get MSP\n                B        SVC_Number\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LSLS     R1,R1,#2\n                LDR      R3,[R2,R1]             ; Load address of SVC function\n                MOV      R12,R3\n                LDMIA    R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R2,R3}                ; Restore SP and EXC_RETURN\n                STR      R0,[R2]                ; Store function return value\n                MOV      LR,R3                  ; Set EXC_RETURN\n\n                BX       LR                     ; Return from handler\n\n\nPendSV_Handler\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,R1}                ; Restore EXC_RETURN\n                MOV      LR,R1                  ; Set EXC_RETURN\n                B        Sys_Context\n\n\nSysTick_Handler\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,R1}                ; Restore EXC_RETURN\n                MOV      LR,R1                  ; Set EXC_RETURN\n                B        Sys_Context\n\n\n\nSys_Context\n                EXPORT   Sys_Context\n                IMPORT   osRtxInfo\n                #if     (DOMAIN_NS == 1)\n                IMPORT   TZ_LoadContext_S\n                IMPORT   TZ_StoreContext_S\n                #endif\n\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3!,{R1,R2}            ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                BEQ      Sys_ContextExit        ; Branch when threads are the same\n\nSys_ContextSave\n                #if     (DOMAIN_NS == 1)\n                LDR      R0,[R1,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,Sys_ContextSave1    ; Branch if there is no secure context\n                PUSH     {R1,R2,R3,R7}          ; Save registers\n                MOV      R7,LR                  ; Get EXC_RETURN\n                BL       TZ_StoreContext_S      ; Store secure context\n                MOV      LR,R7                  ; Set EXC_RETURN\n                POP      {R1,R2,R3,R7}          ; Restore registers\n                MOV      R0,LR                  ; Get EXC_RETURN\n                LSLS     R0,R0,#25              ; Check domain of interrupted thread\n                BPL      Sys_ContextSave1       ; Branch if non-secure\n                MRS      R0,PSP                 ; Get PSP\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                B        Sys_ContextSave2\n                #endif\n\nSys_ContextSave1\n                MRS      R0,PSP                 ; Get PSP\n                SUBS     R0,R0,#32              ; Adjust address\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STMIA    R0!,{R4-R7}            ; Save R4..R7\n                MOV      R4,R8\n                MOV      R5,R9\n                MOV      R6,R10\n                MOV      R7,R11\n                STMIA    R0!,{R4-R7}            ; Save R8..R11\n\nSys_ContextSave2\n                MOV      R0,LR                  ; Get EXC_RETURN\n                ADDS     R1,R1,#TCB_SF_OFS      ; Adjust address\n                STRB     R0,[R1]                ; Store stack frame information\n\nSys_ContextSwitch\n                SUBS     R3,R3,#8               ; Adjust address\n                STR      R2,[R3]                ; osRtxInfo.run: curr = next\n\nSys_ContextRestore\n                #if     (DOMAIN_NS == 1)\n                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,Sys_ContextRestore1 ; Branch if there is no secure context\n                PUSH     {R2,R3}                ; Save registers\n                BL       TZ_LoadContext_S       ; Load secure context\n                POP      {R2,R3}                ; Restore registers\n                #endif\n\nSys_ContextRestore1\n                MOV      R1,R2\n                ADDS     R1,R1,#TCB_SF_OFS      ; Adjust offset\n                LDRB     R0,[R1]                ; Load stack frame information\n                MOVS     R1,#0xFF\n                MVNS     R1,R1                  ; R1=0xFFFFFF00\n                ORRS     R0,R1\n                MOV      LR,R0                  ; Set EXC_RETURN\n\n                #if     (DOMAIN_NS == 1)\n                LSLS     R0,R0,#25              ; Check domain of interrupted thread\n                BPL      Sys_ContextRestore2    ; Branch if non-secure\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                MSR      PSP,R0                 ; Set PSP\n                BX       LR                     ; Exit from handler\n                #else\n                LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base\n                MSR      PSPLIM,R0              ; Set PSPLIM\n                #endif\n\nSys_ContextRestore2\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ADDS     R0,R0,#16              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R8..R11\n                MOV      R8,R4\n                MOV      R9,R5\n                MOV      R10,R6\n                MOV      R11,R7\n                MSR      PSP,R0                 ; Set PSP\n                SUBS     R0,R0,#32              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R4..R7\n\nSys_ContextExit\n                BX       LR                     ; Exit from handler\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_armv8mbl_ns.s",
    "content": "                NAME    irq_armv8mbl_ns.s\n#define         DOMAIN_NS 1\n#include        \"irq_armv8mbl_common.s\"\n                END\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_armv8mml.s",
    "content": "                NAME    irq_armv8mml.s\n#define         DOMAIN_NS 0\n#include        \"irq_armv8mml_common.s\"\n                END\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_armv8mml_common.s",
    "content": ";/*\n; * Copyright (c) 2016-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       ARMv8M Mainline Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\n#ifndef DOMAIN_NS\n#define DOMAIN_NS        0\n#endif\n\n#ifdef __ARMVFP__\n__FPU_USED      EQU      1\n#else\n__FPU_USED      EQU      0\n#endif\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\nTCB_SF_OFS      EQU      34                     ; TCB.stack_frame offset\nTCB_TZM_OFS     EQU      64                     ; TCB.tz_memory offset\n\n\n                PRESERVE8\n\n\n                SECTION  .rodata:DATA:NOROOT(2)\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                SECTION  .text:CODE:NOROOT(2)\n                THUMB\n\n\nSVC_Handler\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n                #if     (DOMAIN_NS == 1)\n                IMPORT   TZ_LoadContext_S\n                IMPORT   TZ_StoreContext_S\n                #endif\n\n                TST      LR,#0x04               ; Determine return stack from EXC_RETURN bit 2\n                ITE      EQ\n                MRSEQ    R0,MSP                 ; Get MSP if return stack is MSP\n                MRSNE    R0,PSP                 ; Get PSP if return stack is PSP\n\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                LDRB     R1,[R1,#-2]            ; Load SVC number\n                CMP      R1,#0\n                BNE      SVC_User               ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDM      R0,{R0-R3,R12}         ; Load function parameters and address from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STM      R12,{R0-R1}            ; Store function return values\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3,{R1,R2}             ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                IT       EQ\n                BXEQ     LR                     ; Exit when threads are the same\n\n                #if     (__FPU_USED == 1)\n                CBNZ     R1,SVC_ContextSave     ; Branch if running thread is not deleted\n                TST      LR,#0x10               ; Check if extended stack frame\n                BNE      SVC_ContextSwitch\n                LDR      R1,=0xE000EF34         ; FPCCR Address\n                LDR      R0,[R1]                ; Load FPCCR\n                BIC      R0,R0,#1               ; Clear LSPACT (Lazy state)\n                STR      R0,[R1]                ; Store FPCCR\n                B        SVC_ContextSwitch\n                #else\n                CBZ      R1,SVC_ContextSwitch   ; Branch if running thread is deleted\n                #endif\n\nSVC_ContextSave\n                #if     (DOMAIN_NS == 1)\n                LDR      R0,[R1,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,SVC_ContextSave1    ; Branch if there is no secure context\n                PUSH     {R1,R2,R3,LR}          ; Save registers and EXC_RETURN\n                BL       TZ_StoreContext_S      ; Store secure context\n                POP      {R1,R2,R3,LR}          ; Restore registers and EXC_RETURN\n                #endif\n\nSVC_ContextSave1\n                MRS      R0,PSP                 ; Get PSP\n                STMDB    R0!,{R4-R11}           ; Save R4..R11\n                #if     (__FPU_USED == 1)\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VSTMDBEQ R0!,{S16-S31}          ;  Save VFP S16.S31\n                #endif\n\nSVC_ContextSave2\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STRB     LR,[R1,#TCB_SF_OFS]    ; Store stack frame information\n\nSVC_ContextSwitch\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore\n                #if     (DOMAIN_NS == 1)\n                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,SVC_ContextRestore1 ; Branch if there is no secure context\n                PUSH     {R2,R3}                ; Save registers\n                BL       TZ_LoadContext_S       ; Load secure context\n                POP      {R2,R3}                ; Restore registers\n                #endif\n\nSVC_ContextRestore1\n                LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base\n                LDRB     R1,[R2,#TCB_SF_OFS]    ; Load stack frame information\n                MSR      PSPLIM,R0              ; Set PSPLIM\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ORR      LR,R1,#0xFFFFFF00      ; Set EXC_RETURN\n\n                #if     (DOMAIN_NS == 1)\n                TST      LR,#0x40               ; Check domain of interrupted thread\n                BNE      SVC_ContextRestore2    ; Branch if secure\n                #endif\n\n                #if     (__FPU_USED == 1)\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VLDMIAEQ R0!,{S16-S31}          ;  Restore VFP S16..S31\n                #endif\n                LDMIA    R0!,{R4-R11}           ; Restore R4..R11\n\nSVC_ContextRestore2\n                MSR      PSP,R0                 ; Set PSP\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDR      R12,[R2,R1,LSL #2]     ; Load address of SVC function\n                LDM      R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STR      R0,[R12]               ; Store function return value\n\n                BX       LR                     ; Return from handler\n\n\nPendSV_Handler\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                B        Sys_Context\n\n\nSysTick_Handler\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                B        Sys_Context\n\n\n\nSys_Context\n                EXPORT   Sys_Context\n                IMPORT   osRtxInfo\n                #if     (DOMAIN_NS == 1)\n                IMPORT   TZ_LoadContext_S\n                IMPORT   TZ_StoreContext_S\n                #endif\n\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3,{R1,R2}             ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                IT       EQ\n                BXEQ     LR                     ; Exit when threads are the same\n\nSys_ContextSave\n                #if     (DOMAIN_NS == 1)\n                LDR      R0,[R1,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,Sys_ContextSave1    ; Branch if there is no secure context\n                PUSH     {R1,R2,R3,LR}          ; Save registers and EXC_RETURN\n                BL       TZ_StoreContext_S      ; Store secure context\n                POP      {R1,R2,R3,LR}          ; Restore registers and EXC_RETURN\n                TST      LR,#0x40               ; Check domain of interrupted thread\n                IT       NE\n                MRSNE    R0,PSP                 ; Get PSP\n                BNE      Sys_ContextSave2       ; Branch if secure\n                #endif\n\nSys_ContextSave1\n                MRS      R0,PSP                 ; Get PSP\n                STMDB    R0!,{R4-R11}           ; Save R4..R11\n                #if     (__FPU_USED == 1)\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VSTMDBEQ R0!,{S16-S31}          ;  Save VFP S16.S31\n                #endif\n\nSys_ContextSave2\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STRB     LR,[R1,#TCB_SF_OFS]    ; Store stack frame information\n\nSys_ContextSwitch\n                STR      R2,[R3]                ; osRtxInfo.run: curr = next\n\nSys_ContextRestore\n                #if     (DOMAIN_NS == 1)\n                LDR      R0,[R2,#TCB_TZM_OFS]   ; Load TrustZone memory identifier\n                CBZ      R0,Sys_ContextRestore1 ; Branch if there is no secure context\n                PUSH     {R2,R3}                ; Save registers\n                BL       TZ_LoadContext_S       ; Load secure context\n                POP      {R2,R3}                ; Restore registers\n                #endif\n\nSys_ContextRestore1\n                LDR      R0,[R2,#TCB_SM_OFS]    ; Load stack memory base\n                LDRB     R1,[R2,#TCB_SF_OFS]    ; Load stack frame information\n                MSR      PSPLIM,R0              ; Set PSPLIM\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ORR      LR,R1,#0xFFFFFF00      ; Set EXC_RETURN\n\n                #if     (DOMAIN_NS == 1)\n                TST      LR,#0x40               ; Check domain of interrupted thread\n                BNE      Sys_ContextRestore2    ; Branch if secure\n                #endif\n\n                #if     (__FPU_USED == 1)\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VLDMIAEQ R0!,{S16-S31}          ;  Restore VFP S16..S31\n                #endif\n                LDMIA    R0!,{R4-R11}           ; Restore R4..R11\n\nSys_ContextRestore2\n                MSR      PSP,R0                 ; Set PSP\n\nSys_ContextExit\n                BX       LR                     ; Exit from handler\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_armv8mml_ns.s",
    "content": "                NAME    irq_armv8mml_ns.s\n#define         DOMAIN_NS 1\n#include        \"irq_armv8mml_common.s\"\n                END\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_ca.s",
    "content": ";/*\n; * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       Cortex-A Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n                NAME     irq_ca.s\n\nMODE_FIQ        EQU      0x11\nMODE_IRQ        EQU      0x12\nMODE_SVC        EQU      0x13\nMODE_ABT        EQU      0x17\nMODE_UND        EQU      0x1B\n\nCPSR_BIT_T      EQU      0x20\n\nK_STATE_RUNNING EQU      2                          ; osKernelState_t::osKernelRunning\nI_K_STATE_OFS   EQU      8                          ; osRtxInfo.kernel.state offset\nI_TICK_IRQN_OFS EQU      16                         ; osRtxInfo.tick_irqn offset\nI_T_RUN_OFS     EQU      20                         ; osRtxInfo.thread.run offset\nTCB_SP_FRAME    EQU      34                         ; osRtxThread_t.stack_frame offset\nTCB_SP_OFS      EQU      56                         ; osRtxThread_t.sp offset\n\n\n                PRESERVE8\n\n\n                SECTION .rodata:DATA:NOROOT(2)\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                          ; Non weak library reference\n\n\n                SECTION .data:DATA:NOROOT(2)\n                EXPORT   IRQ_PendSV\nIRQ_NestLevel   DCD      0                          ; IRQ nesting level counter\nIRQ_PendSV      DCB      0                          ; Pending SVC flag\n\n\n                SECTION .text:CODE:NOROOT(2)\n\n\nUndef_Handler\n                EXPORT  Undef_Handler\n                IMPORT  CUndefHandler\n\n                SRSFD   SP!, #MODE_UND\n                PUSH    {R0-R4, R12}                ; Save APCS corruptible registers to UND mode stack\n\n                MRS     R0, SPSR\n                TST     R0, #CPSR_BIT_T             ; Check mode\n                MOVEQ   R1, #4                      ; R1 = 4 ARM mode\n                MOVNE   R1, #2                      ; R1 = 2 Thumb mode\n                SUB     R0, LR, R1\n                LDREQ   R0, [R0]                    ; ARM mode - R0 points to offending instruction\n                BEQ     Undef_Cont\n\n                ; Thumb instruction\n                ; Determine if it is a 32-bit Thumb instruction\n                LDRH    R0, [R0]\n                MOV     R2, #0x1C\n                CMP     R2, R0, LSR #11\n                BHS     Undef_Cont                  ; 16-bit Thumb instruction\n\n                ; 32-bit Thumb instruction. Unaligned - reconstruct the offending instruction\n                LDRH    R2, [LR]\n                ORR     R0, R2, R0, LSL #16\nUndef_Cont\n                MOV     R2, LR                      ; Set LR to third argument\n\n                AND     R12, SP, #4                 ; Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 ; Adjust stack\n                PUSH    {R12, LR}                   ; Store stack adjustment and dummy LR\n\n                ; R0 =Offending instruction, R1 =2(Thumb) or =4(ARM)\n                BL      CUndefHandler\n\n                POP     {R12, LR}                   ; Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 ; Unadjust stack\n\n                LDR     LR, [SP, #24]               ; Restore stacked LR and possibly adjust for retry\n                SUB     LR, LR, R0\n                LDR     R0, [SP, #28]               ; Restore stacked SPSR\n                MSR     SPSR_CXSF, R0\n                CLREX                               ; Clear exclusive monitor\n                POP     {R0-R4, R12}                ; Restore stacked APCS registers\n                ADD     SP, SP, #8                  ; Adjust SP for already-restored banked registers\n                MOVS    PC, LR\n\n\nPAbt_Handler\n                EXPORT  PAbt_Handler\n                IMPORT  CPAbtHandler\n\n                SUB     LR, LR, #4                  ; Pre-adjust LR\n                SRSFD   SP!, #MODE_ABT              ; Save LR and SPRS to ABT mode stack\n                PUSH    {R0-R4, R12}                ; Save APCS corruptible registers to ABT mode stack\n                MRC     p15, 0, R0, c5, c0, 1       ; IFSR\n                MRC     p15, 0, R1, c6, c0, 2       ; IFAR\n\n                MOV     R2, LR                      ; Set LR to third argument\n\n                AND     R12, SP, #4                 ; Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 ; Adjust stack\n                PUSH    {R12, LR}                   ; Store stack adjustment and dummy LR\n\n                BL      CPAbtHandler\n\n                POP     {R12, LR}                   ; Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 ; Unadjust stack\n\n                CLREX                               ; Clear exclusive monitor\n                POP     {R0-R4, R12}                ; Restore stack APCS registers\n                RFEFD   SP!                         ; Return from exception\n\n\nDAbt_Handler\n                EXPORT  DAbt_Handler\n                IMPORT  CDAbtHandler\n\n                SUB     LR, LR, #8                  ; Pre-adjust LR\n                SRSFD   SP!, #MODE_ABT              ; Save LR and SPRS to ABT mode stack\n                PUSH    {R0-R4, R12}                ; Save APCS corruptible registers to ABT mode stack\n                MRC     p15, 0, R0, c5, c0, 0       ; DFSR\n                MRC     p15, 0, R1, c6, c0, 0       ; DFAR\n\n                MOV     R2, LR                      ; Set LR to third argument\n\n                AND     R12, SP, #4                 ; Ensure stack is 8-byte aligned\n                SUB     SP, SP, R12                 ; Adjust stack\n                PUSH    {R12, LR}                   ; Store stack adjustment and dummy LR\n\n                BL      CDAbtHandler\n\n                POP     {R12, LR}                   ; Get stack adjustment & discard dummy LR\n                ADD     SP, SP, R12                 ; Unadjust stack\n\n                CLREX                               ; Clear exclusive monitor\n                POP     {R0-R4, R12}                ; Restore stacked APCS registers\n                RFEFD   SP!                         ; Return from exception\n\n\nIRQ_Handler\n                EXPORT  IRQ_Handler\n                IMPORT  IRQ_GetActiveIRQ\n                IMPORT  IRQ_GetHandler\n                IMPORT  IRQ_EndOfInterrupt\n\n                SUB     LR, LR, #4                  ; Pre-adjust LR\n                SRSFD   SP!, #MODE_SVC              ; Save LR_irq and SPSR_irq on to the SVC stack\n                CPS     #MODE_SVC                   ; Change to SVC mode\n                PUSH    {R0-R3, R12, LR}            ; Save APCS corruptible registers\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                ADD     R1, R1, #1                  ; Increment IRQ nesting level\n                STR     R1, [R0]\n\n                MOV     R3, SP                      ; Move SP into R3\n                AND     R3, R3, #4                  ; Get stack adjustment to ensure 8-byte alignment\n                SUB     SP, SP, R3                  ; Adjust stack\n                PUSH    {R3, R4}                    ; Store stack adjustment(R3) and user data(R4)\n\n                BLX     IRQ_GetActiveIRQ            ; Retrieve interrupt ID into R0\n                MOV     R4, R0                      ; Move interrupt ID to R4\n\n                BLX     IRQ_GetHandler              ; Retrieve interrupt handler address for current ID\n                CMP     R0, #0                      ; Check if handler address is 0\n                BEQ     IRQ_End                     ; If 0, end interrupt and return\n\n                CPSIE   i                           ; Re-enable interrupts\n                BLX     R0                          ; Call IRQ handler\n                CPSID   i                           ; Disable interrupts\n\nIRQ_End\n                MOV     R0, R4                      ; Move interrupt ID to R0\n                BLX     IRQ_EndOfInterrupt          ; Signal end of interrupt\n\n                POP     {R3, R4}                    ; Restore stack adjustment(R3) and user data(R4)\n                ADD     SP, SP, R3                  ; Unadjust stack\n\n                BL      osRtxContextSwitch          ; Continue in context switcher\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                SUBS    R1, R1, #1                  ; Decrement IRQ nesting level\n                STR     R1, [R0]\n\n                CLREX                               ; Clear exclusive monitor for interrupted code\n                POP     {R0-R3, R12, LR}            ; Restore stacked APCS registers\n                RFEFD   SP!                         ; Return from IRQ handler\n\n\nSVC_Handler\n                EXPORT  SVC_Handler\n                IMPORT  IRQ_Disable\n                IMPORT  IRQ_Enable\n                IMPORT  osRtxUserSVC\n                IMPORT  osRtxInfo\n\n                SRSFD   SP!, #MODE_SVC              ; Store SPSR_svc and LR_svc onto SVC stack\n                PUSH    {R12, LR}\n\n                MRS     R12, SPSR                   ; Load SPSR\n                TST     R12, #CPSR_BIT_T            ; Thumb bit set?\n                LDRHNE  R12, [LR,#-2]               ; Thumb: load halfword\n                BICNE   R12, R12, #0xFF00           ;        extract SVC number\n                LDREQ   R12, [LR,#-4]               ; ARM:   load word\n                BICEQ   R12, R12, #0xFF000000       ;        extract SVC number\n                CMP     R12, #0                     ; Compare SVC number\n                BNE     SVC_User                    ; Branch if User SVC\n\n                PUSH    {R0-R3}\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                ADD     R1, R1, #1                  ; Increment IRQ nesting level\n                STR     R1, [R0]\n\n                LDR     R0, =osRtxInfo\n                LDR     R1, [R0, #I_K_STATE_OFS]    ; Load RTX5 kernel state\n                CMP     R1, #K_STATE_RUNNING        ; Check osKernelRunning\n                BLT     SVC_FuncCall                ; Continue if kernel is not running\n                LDR     R0, [R0, #I_TICK_IRQN_OFS]  ; Load OS Tick irqn\n                BLX     IRQ_Disable                 ; Disable OS Tick interrupt\nSVC_FuncCall\n                POP     {R0-R3}\n\n                LDR     R12, [SP]                   ; Reload R12 from stack\n\n                CPSIE   i                           ; Re-enable interrupts\n                BLX     R12                         ; Branch to SVC function\n                CPSID   i                           ; Disable interrupts\n\n                SUB     SP, SP, #4\n                STM     SP, {SP}^                   ; Store SP_usr onto stack\n                POP     {R12}                       ; Pop SP_usr into R12\n                SUB     R12, R12, #16               ; Adjust pointer to SP_usr\n                LDMDB   R12, {R2,R3}                ; Load return values from SVC function\n                PUSH    {R0-R3}                     ; Push return values to stack\n\n                LDR     R0, =osRtxInfo\n                LDR     R1, [R0, #I_K_STATE_OFS]    ; Load RTX5 kernel state\n                CMP     R1, #K_STATE_RUNNING        ; Check osKernelRunning\n                BLT     SVC_ContextCheck            ; Continue if kernel is not running\n                LDR     R0, [R0, #I_TICK_IRQN_OFS]  ; Load OS Tick irqn\n                BLX     IRQ_Enable                  ; Enable OS Tick interrupt\n\nSVC_ContextCheck\n                BL      osRtxContextSwitch          ; Continue in context switcher\n\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]\n                SUB     R1, R1, #1                  ; Decrement IRQ nesting level\n                STR     R1, [R0]\n\n                CLREX                               ; Clear exclusive monitor\n                POP     {R0-R3, R12, LR}            ; Restore stacked APCS registers\n                RFEFD   SP!                         ; Return from exception\n\nSVC_User\n                PUSH    {R4, R5}\n                LDR     R5,=osRtxUserSVC            ; Load address of SVC table\n                LDR     R4,[R5]                     ; Load SVC maximum number\n                CMP     R12,R4                      ; Check SVC number range\n                BHI     SVC_Done                    ; Branch if out of range\n                LDR     R12,[R5,R12,LSL #2]         ; Load SVC Function Address\n                BLX     R12                         ; Call SVC Function\nSVC_Done\n                CLREX                               ; Clear exclusive monitor\n                POP     {R4, R5, R12, LR}\n                RFEFD   SP!                         ; Return from exception\n\n\nosRtxContextSwitch\n                EXPORT  osRtxContextSwitch\n                IMPORT  osRtxPendSV_Handler\n                IMPORT  osRtxInfo\n                IMPORT  IRQ_Disable\n                IMPORT  IRQ_Enable\n\n                PUSH    {LR}\n\n                ; Check interrupt nesting level\n                LDR     R0, =IRQ_NestLevel\n                LDR     R1, [R0]                    ; Load IRQ nest level\n                CMP     R1, #1\n                BNE     osRtxContextExit            ; Nesting interrupts, exit context switcher\n\n                LDR     R12, =osRtxInfo+I_T_RUN_OFS ; Load address of osRtxInfo.run\n                LDM     R12, {R0, R1}               ; Load osRtxInfo.thread.run: curr & next\n                LDR     R2, =IRQ_PendSV             ; Load address of IRQ_PendSV flag\n                LDRB    R3, [R2]                    ; Load PendSV flag\n\n                CMP     R0, R1                      ; Check if context switch is required\n                BNE     osRtxContextCheck           ; Not equal, check if context save required\n                CMP     R3, #1                      ; Compare IRQ_PendSV value\n                BNE     osRtxContextExit            ; No post processing (and no context switch requested)\n\nosRtxContextCheck\n                STR     R1, [R12]                   ; Store run.next as run.curr\n                ; R0 = curr, R1 = next, R2 = &IRQ_PendSV, R3 = IRQ_PendSV, R12 = &osRtxInfo.thread.run\n                PUSH    {R1-R3, R12}\n\n                CMP     R0, #0                      ; Is osRtxInfo.thread.run.curr == 0\n                BEQ     osRtxPostProcess            ; Current deleted, skip context save\n\nosRtxContextSave\n                MOV     LR, R0                      ; Move &osRtxInfo.thread.run.curr to LR\n                MOV     R0, SP                      ; Move SP_svc into R0\n                ADD     R0, R0, #20                 ; Adjust SP_svc to R0 of the basic frame\n                SUB     SP, SP, #4\n                STM     SP, {SP}^                   ; Save SP_usr to current stack\n                POP     {R1}                        ; Pop SP_usr into R1\n\n                SUB     R1, R1, #64                 ; Adjust SP_usr to R4 of the basic frame\n                STMIA   R1!, {R4-R11}               ; Save R4-R11 to user stack\n                LDMIA   R0!, {R4-R8}                ; Load stacked R0-R3,R12 into R4-R8\n                STMIA   R1!, {R4-R8}                ; Store them to user stack\n                STM     R1, {LR}^                   ; Store LR_usr directly\n                ADD     R1, R1, #4                  ; Adjust user sp to PC\n                LDMIB   R0!, {R5-R6}                ; Load current PC, CPSR\n                STMIA   R1!, {R5-R6}                ; Restore user PC and CPSR\n\n                SUB     R1, R1, #64                 ; Adjust SP_usr to stacked R4\n\n                ; Check if VFP state need to be saved\n                MRC     p15, 0, R2, c1, c0, 2       ; VFP/NEON access enabled? (CPACR)\n                AND     R2, R2, #0x00F00000\n                CMP     R2, #0x00F00000\n                BNE     osRtxContextSave1           ; Continue, no VFP\n\n                VMRS    R2, FPSCR\n                STMDB   R1!, {R2,R12}               ; Push FPSCR, maintain 8-byte alignment\n\n                VSTMDB  R1!, {D0-D15}               ; Save D0-D15\n                #ifdef  __ARM_ADVANCED_SIMD__\n                VSTMDB  R1!, {D16-D31}              ; Save D16-D31\n                #endif\n\n                LDRB    R2, [LR, #TCB_SP_FRAME]     ; Load osRtxInfo.thread.run.curr frame info\n                #ifdef  __ARM_ADVANCED_SIMD__\n                ORR     R2, R2, #4                  ; NEON state\n                #else\n                ORR     R2, R2, #2                  ; VFP state\n                #endif\n                STRB    R2, [LR, #TCB_SP_FRAME]     ; Store VFP/NEON state\n\nosRtxContextSave1\n                STR     R1, [LR, #TCB_SP_OFS]       ; Store user sp to osRtxInfo.thread.run.curr\n\nosRtxPostProcess\n                ; RTX IRQ post processing check\n                POP     {R8-R11}                    ; Pop R8 = run.next, R9 = &IRQ_PendSV, R10 = IRQ_PendSV, R11 = &osRtxInfo.thread.run\n                CMP     R10, #1                     ; Compare PendSV value\n                BNE     osRtxContextRestore         ; Skip post processing if not pending\n\n                MOV     R4, SP                      ; Move SP_svc into R4\n                AND     R4, R4, #4                  ; Get stack adjustment to ensure 8-byte alignment\n                SUB     SP, SP, R4                  ; Adjust stack\n\n                ; Disable OS Tick\n                LDR     R5, =osRtxInfo              ; Load address of osRtxInfo\n                LDR     R5, [R5, #I_TICK_IRQN_OFS]  ; Load OS Tick irqn\n                MOV     R0, R5                      ; Set it as function parameter\n                BLX     IRQ_Disable                 ; Disable OS Tick interrupt\n                MOV     R6, #0                      ; Set PendSV clear value\n                B       osRtxPendCheck\nosRtxPendExec\n                STRB    R6, [R9]                    ; Clear PendSV flag\n                CPSIE   i                           ; Re-enable interrupts\n                BLX     osRtxPendSV_Handler         ; Post process pending objects\n                CPSID   i                           ; Disable interrupts\nosRtxPendCheck\n                LDR     R8, [R11, #4]               ; Load osRtxInfo.thread.run.next\n                STR     R8, [R11]                   ; Store run.next as run.curr\n                LDRB    R0, [R9]                    ; Load PendSV flag\n                CMP     R0, #1                      ; Compare PendSV value\n                BEQ     osRtxPendExec               ; Branch to PendExec if PendSV is set\n\n                ; Re-enable OS Tick\n                MOV     R0, R5                      ; Restore irqn as function parameter\n                BLX     IRQ_Enable                  ; Enable OS Tick interrupt\n\n                ADD     SP, SP, R4                  ; Restore stack adjustment\n\nosRtxContextRestore\n                LDR     LR, [R8, #TCB_SP_OFS]       ; Load next osRtxThread_t.sp\n                LDRB    R2, [R8, #TCB_SP_FRAME]     ; Load next osRtxThread_t.stack_frame\n\n                ANDS    R2, R2, #0x6                ; Check stack frame for VFP context\n                MRC     p15, 0, R2, c1, c0, 2       ; Read CPACR\n                ANDEQ   R2, R2, #0xFF0FFFFF         ; VFP/NEON state not stacked, disable VFP/NEON\n                ORRNE   R2, R2, #0x00F00000         ; VFP/NEON state is stacked, enable VFP/NEON\n                MCR     p15, 0, R2, c1, c0, 2       ; Write CPACR\n                BEQ     osRtxContextRestore1        ; No VFP\n                ISB                                 ; Sync if VFP was enabled\n                #ifdef  __ARM_ADVANCED_SIMD__\n                VLDMIA  LR!, {D16-D31}              ; Restore D16-D31\n                #endif\n                VLDMIA  LR!, {D0-D15}               ; Restore D0-D15\n                LDR     R2, [LR]\n                VMSR    FPSCR, R2                   ; Restore FPSCR\n                ADD     LR, LR, #8                  ; Adjust sp pointer to R4\n\nosRtxContextRestore1\n                LDMIA   LR!, {R4-R11}               ; Restore R4-R11\n                ADD     R12, LR, #32                ; Adjust sp and save it into R12\n                PUSH    {R12}                       ; Push sp onto stack\n                LDM     SP, {SP}^                   ; Restore SP_usr directly\n                ADD     SP, SP, #4                  ; Adjust SP_svc\n                LDMIA   LR!, {R0-R3, R12}           ; Load user registers R0-R3,R12\n                STMIB   SP!, {R0-R3, R12}           ; Store them to SP_svc\n                LDM     LR, {LR}^                   ; Restore LR_usr directly\n                LDMIB   LR!, {R0-R1}                ; Load user registers PC,CPSR\n                ADD     SP, SP, #4\n                STMIB   SP!, {R0-R1}                ; Store them to SP_svc\n                SUB     SP, SP, #32                 ; Adjust SP_svc to stacked LR\n\nosRtxContextExit\n                POP     {PC}                        ; Return\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_cm0.s",
    "content": ";/*\n; * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       Cortex-M0 Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\n                NAME    irq_cm0.s\n\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\n\n\n                PRESERVE8\n                SECTION .rodata:DATA:NOROOT(2)\n\n\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                THUMB\n                SECTION .text:CODE:NOROOT(2)\n\n\nSVC_Handler\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n\n                MOV      R0,LR\n                LSRS     R0,R0,#3               ; Determine return stack from EXC_RETURN bit 2\n                BCC      SVC_MSP                ; Branch if return stack is MSP\n                MRS      R0,PSP                 ; Get PSP\n\nSVC_Number\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                SUBS     R1,R1,#2               ; Point to SVC instruction\n                LDRB     R1,[R1]                ; Load SVC number\n                CMP      R1,#0\n                BNE      SVC_User               ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDMIA    R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R7                     ; Call service function\n                POP      {R2,R3}                ; Restore SP and EXC_RETURN\n                STMIA    R2!,{R0-R1}            ; Store function return values\n                MOV      LR,R3                  ; Set EXC_RETURN\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDMIA    R3!,{R1,R2}            ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                BEQ      SVC_Exit               ; Branch when threads are the same\n\n                CMP      R1,#0\n                BEQ      SVC_ContextSwitch      ; Branch if running thread is deleted\n\nSVC_ContextSave\n                MRS      R0,PSP                 ; Get PSP\n                SUBS     R0,R0,#32              ; Calculate SP\n                STR      R0,[R1,#TCB_SP_OFS]    ; Store SP\n                STMIA    R0!,{R4-R7}            ; Save R4..R7\n                MOV      R4,R8\n                MOV      R5,R9\n                MOV      R6,R10\n                MOV      R7,R11\n                STMIA    R0!,{R4-R7}            ; Save R8..R11\n\nSVC_ContextSwitch\n                SUBS     R3,R3,#8               ; Adjust address\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ADDS     R0,R0,#16              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R8..R11\n                MOV      R8,R4\n                MOV      R9,R5\n                MOV      R10,R6\n                MOV      R11,R7\n                MSR      PSP,R0                 ; Set PSP\n                SUBS     R0,R0,#32              ; Adjust address\n                LDMIA    R0!,{R4-R7}            ; Restore R4..R7\n\n                MOVS     R0,#~0xFFFFFFFD\n                MVNS     R0,R0                  ; Set EXC_RETURN value\n                BX       R0                     ; Exit from handler\n\nSVC_MSP\n                MRS      R0,MSP                 ; Get MSP\n                B        SVC_Number\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LSLS     R1,R1,#2\n                LDR      R3,[R2,R1]             ; Load address of SVC function\n                MOV      R12,R3\n                LDMIA    R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R2,R3}                ; Restore SP and EXC_RETURN\n                STR      R0,[R2]                ; Store function return value\n                MOV      LR,R3                  ; Set EXC_RETURN\n\n                BX       LR                     ; Return from handler\n\n\nPendSV_Handler\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,R1}                ; Restore EXC_RETURN\n                MOV      LR,R1                  ; Set EXC_RETURN\n                B        SVC_Context\n\n\nSysTick_Handler\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,R1}                ; Restore EXC_RETURN\n                MOV      LR,R1                  ; Set EXC_RETURN\n                B        SVC_Context\n\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_cm3.s",
    "content": ";/*\n; * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       Cortex-M3 Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\n                NAME    irq_cm3.s\n\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\n\n\n                PRESERVE8\n                SECTION .rodata:DATA:NOROOT(2)\n\n\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                THUMB\n                SECTION .text:CODE:NOROOT(2)\n\n\nSVC_Handler\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n\n                TST      LR,#0x04               ; Determine return stack from EXC_RETURN bit 2\n                ITE      EQ\n                MRSEQ    R0,MSP                 ; Get MSP if return stack is MSP\n                MRSNE    R0,PSP                 ; Get PSP if return stack is PSP\n\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                LDRB     R1,[R1,#-2]            ; Load SVC number\n                CBNZ     R1,SVC_User            ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDM      R0,{R0-R3,R12}         ; Load function parameters and address from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STM      R12,{R0-R1}            ; Store function return values\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3,{R1,R2}             ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                IT       EQ\n                BXEQ     LR                     ; Exit when threads are the same\n\n                CBZ      R1,SVC_ContextSwitch   ; Branch if running thread is deleted\n\nSVC_ContextSave\n                STMDB    R12!,{R4-R11}          ; Save R4..R11\n                STR      R12,[R1,#TCB_SP_OFS]   ; Store SP\n\nSVC_ContextSwitch\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                LDMIA    R0!,{R4-R11}           ; Restore R4..R11\n                MSR      PSP,R0                 ; Set PSP\n\n                MVN      LR,#~0xFFFFFFFD        ; Set EXC_RETURN value\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDR      R12,[R2,R1,LSL #2]     ; Load address of SVC function\n                LDM      R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STR      R0,[R12]               ; Store function return value\n\n                BX       LR                     ; Return from handler\n\n\nPendSV_Handler\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                MRS      R12,PSP\n                B        SVC_Context\n\n\nSysTick_Handler\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                MRS      R12,PSP\n                B        SVC_Context\n\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/IAR/irq_cm4f.s",
    "content": ";/*\n; * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n; *\n; * SPDX-License-Identifier: Apache-2.0\n; *\n; * Licensed under the Apache License, Version 2.0 (the License); you may\n; * not use this file except in compliance with the License.\n; * You may obtain a copy of the License at\n; *\n; * www.apache.org/licenses/LICENSE-2.0\n; *\n; * Unless required by applicable law or agreed to in writing, software\n; * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n; * See the License for the specific language governing permissions and\n; * limitations under the License.\n; *\n; * -----------------------------------------------------------------------------\n; *\n; * Project:     CMSIS-RTOS RTX\n; * Title:       Cortex-M4F Exception handlers\n; *\n; * -----------------------------------------------------------------------------\n; */\n\n\n                NAME    irq_cm4f.s\n\n\nI_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset\nTCB_SP_OFS      EQU      56                     ; TCB.SP offset\nTCB_SF_OFS      EQU      34                     ; TCB.stack_frame offset\n\n\n                PRESERVE8\n                SECTION .rodata:DATA:NOROOT(2)\n\n\n                EXPORT   irqRtxLib\nirqRtxLib       DCB      0                      ; Non weak library reference\n\n\n                THUMB\n                SECTION .text:CODE:NOROOT(2)\n\n\nSVC_Handler\n                EXPORT   SVC_Handler\n                IMPORT   osRtxUserSVC\n                IMPORT   osRtxInfo\n\n                TST      LR,#0x04               ; Determine return stack from EXC_RETURN bit 2\n                ITE      EQ\n                MRSEQ    R0,MSP                 ; Get MSP if return stack is MSP\n                MRSNE    R0,PSP                 ; Get PSP if return stack is PSP\n\n                LDR      R1,[R0,#24]            ; Load saved PC from stack\n                LDRB     R1,[R1,#-2]            ; Load SVC number\n                CBNZ     R1,SVC_User            ; Branch if not SVC 0\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDM      R0,{R0-R3,R12}         ; Load function parameters and address from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STM      R12,{R0-R1}            ; Store function return values\n\nSVC_Context\n                LDR      R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run\n                LDM      R3,{R1,R2}             ; Load osRtxInfo.thread.run: curr & next\n                CMP      R1,R2                  ; Check if thread switch is required\n                IT       EQ\n                BXEQ     LR                     ; Exit when threads are the same\n\n                CBNZ     R1,SVC_ContextSave     ; Branch if running thread is not deleted\n                TST      LR,#0x10               ; Check if extended stack frame\n                BNE      SVC_ContextSwitch\n                LDR      R1,=0xE000EF34         ; FPCCR Address\n                LDR      R0,[R1]                ; Load FPCCR\n                BIC      R0,R0,#1               ; Clear LSPACT (Lazy state)\n                STR      R0,[R1]                ; Store FPCCR\n                B        SVC_ContextSwitch\n\nSVC_ContextSave\n                STMDB    R12!,{R4-R11}          ; Save R4..R11\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VSTMDBEQ R12!,{S16-S31}         ;  Save VFP S16.S31\n                STR      R12,[R1,#TCB_SP_OFS]   ; Store SP\n                STRB     LR, [R1,#TCB_SF_OFS]   ; Store stack frame information\n\nSVC_ContextSwitch\n                STR      R2,[R3]                ; osRtxInfo.thread.run: curr = next\n\nSVC_ContextRestore\n                LDRB     R1,[R2,#TCB_SF_OFS]    ; Load stack frame information\n                LDR      R0,[R2,#TCB_SP_OFS]    ; Load SP\n                ORR      LR,R1,#0xFFFFFF00      ; Set EXC_RETURN\n\n                TST      LR,#0x10               ; Check if extended stack frame\n                IT       EQ\n                VLDMIAEQ R0!,{S16-S31}          ;  Restore VFP S16..S31\n                LDMIA    R0!,{R4-R11}           ; Restore R4..R11\n                MSR      PSP,R0                 ; Set PSP\n\nSVC_Exit\n                BX       LR                     ; Exit from handler\n\nSVC_User\n                LDR      R2,=osRtxUserSVC       ; Load address of SVC table\n                LDR      R3,[R2]                ; Load SVC maximum number\n                CMP      R1,R3                  ; Check SVC number range\n                BHI      SVC_Exit               ; Branch if out of range\n\n                PUSH     {R0,LR}                ; Save SP and EXC_RETURN\n                LDR      R12,[R2,R1,LSL #2]     ; Load address of SVC function\n                LDM      R0,{R0-R3}             ; Load function parameters from stack\n                BLX      R12                    ; Call service function\n                POP      {R12,LR}               ; Restore SP and EXC_RETURN\n                STR      R0,[R12]               ; Store function return value\n\n                BX       LR                     ; Return from handler\n\n\nPendSV_Handler\n                EXPORT   PendSV_Handler\n                IMPORT   osRtxPendSV_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxPendSV_Handler    ; Call osRtxPendSV_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                MRS      R12,PSP\n                B        SVC_Context\n\n\nSysTick_Handler\n                EXPORT   SysTick_Handler\n                IMPORT   osRtxTick_Handler\n\n                PUSH     {R0,LR}                ; Save EXC_RETURN\n                BL       osRtxTick_Handler      ; Call osRtxTick_Handler\n                POP      {R0,LR}                ; Restore EXC_RETURN\n                MRS      R12,PSP\n                B        SVC_Context\n\n\n                END\n"
  },
  {
    "path": "rtos/rtx5/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nobj-y += GCC/\n\nobj-y += rtx_config/\n\nCFLAGS_rtx_lib.o += -DOS_IDLE_THREAD_NAME=\\\"idle\\\" \\\n                    -DOS_TIMER_THREAD_NAME=\\\"timer\\\"\n\nsubdir-ccflags-y += -DOS_CLOCK_NOMINAL=$(OS_CLOCK_NOMINAL)\n\nifneq ($(OS_IDLESTKSIZE),)\nsubdir-ccflags-y += -DOS_IDLE_THREAD_STACK_SIZE=$(OS_IDLESTKSIZE)\nendif\n\nifneq ($(OS_FIFOSZ),)\nsubdir-ccflags-y += -DOS_ISR_FIFO_QUEUE=$(OS_FIFOSZ)\nendif\n\nifneq ($(OS_SCHEDULERSTKSIZE),)\nCFLAGS_rtx_lib.o += -DOS_SCHEDULERSTKSIZE=$(OS_SCHEDULERSTKSIZE)\nendif\n\nifneq ($(DEBUG_SLEEP),)\nsubdir-ccflags-y += -DDEBUG_SLEEP=$(DEBUG_SLEEP)\nendif\n\nsubdir-ccflags-y += -Irtos/rtx5/rtx_config\n\n"
  },
  {
    "path": "rtos/rtx5/RTE_Components.h",
    "content": "#ifndef RTE_COMPONENTS_H\n#define RTE_COMPONENTS_H\n\n#include \"plat_addr_map.h\"\n#define CMSIS_device_header _TO_STRING(CONCAT_SUFFIX(CHIP_ID_LITERAL, h))\n\n#endif\n"
  },
  {
    "path": "rtos/rtx5/cmsis_os1.c",
    "content": "/*\n * Copyright (c) 2013-2017 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * ----------------------------------------------------------------------\n *\n * $Date:        10. January 2017\n * $Revision:    V1.2\n *\n * Project:      CMSIS-RTOS API V1\n * Title:        cmsis_os_v1.c V1 module file\n *---------------------------------------------------------------------------*/\n\n#include \"cmsis_os.h\"\n#include \"rtx_os.h\"\n#include \n\n#if (osCMSIS >= 0x20000U)\n\n// Thread\nosThreadId osThreadCreate(const osThreadDef_t *thread_def, void *argument) {\n\n  if (thread_def == NULL) {\n    return (osThreadId)NULL;\n  }\n  return osThreadNew((osThreadFunc_t)thread_def->pthread, argument,\n                     &thread_def->attr);\n}\n\n// Signals\n\n#define SignalMask ((1U << osFeature_Signals) - 1U)\n\nint32_t osSignalSet(osThreadId thread_id, int32_t signals) {\n  uint32_t flags;\n\n  flags = osThreadFlagsSet(thread_id, (uint32_t)signals);\n  if ((flags & 0x80000000U) != 0U) {\n    return ((int32_t)0x80000000U);\n  }\n  return ((int32_t)(flags & ~((uint32_t)signals)));\n}\n\nint32_t osSignalClear(osThreadId thread_id, int32_t signals) {\n  uint32_t flags;\n\n  if (thread_id != osThreadGetId()) {\n    return ((int32_t)0x80000000U);\n  }\n  flags = osThreadFlagsClear((uint32_t)signals);\n  if ((flags & 0x80000000U) != 0U) {\n    return ((int32_t)0x80000000U);\n  }\n  return ((int32_t)flags);\n}\n\nosEvent osSignalWait(int32_t signals, uint32_t millisec) {\n  osEvent event;\n  uint32_t flags;\n\n  if (signals != 0) {\n    flags = osThreadFlagsWait((uint32_t)signals, osFlagsWaitAll, millisec);\n  } else {\n    flags = osThreadFlagsWait(SignalMask, osFlagsWaitAny, millisec);\n  }\n  if ((flags > 0U) && (flags < 0x80000000U)) {\n    event.status = osEventSignal;\n    event.value.signals = (int32_t)flags;\n  } else {\n    switch ((int32_t)flags) {\n    case osErrorResource:\n      event.status = osOK;\n      break;\n    case osErrorTimeout:\n      event.status = osEventTimeout;\n      break;\n    case osErrorParameter:\n      event.status = osErrorValue;\n      break;\n    default:\n      event.status = (osStatus)flags;\n      break;\n    }\n  }\n  return event;\n}\n\n// Timer\nosTimerId osTimerCreate(const osTimerDef_t *timer_def, os_timer_type type,\n                        void *argument) {\n\n  if (timer_def == NULL) {\n    return (osTimerId)NULL;\n  }\n  return osTimerNew((osTimerFunc_t)timer_def->ptimer, type, argument,\n                    &timer_def->attr);\n}\n\n// Mutex\nosMutexId osMutexCreate(const osMutexDef_t *mutex_def) {\n\n  if (mutex_def == NULL) {\n    return (osMutexId)NULL;\n  }\n  return osMutexNew(mutex_def);\n}\n\n// Semaphore\n\n#if (defined(osFeature_Semaphore) && (osFeature_Semaphore != 0U))\n\nosSemaphoreId osSemaphoreCreate(const osSemaphoreDef_t *semaphore_def,\n                                int32_t count) {\n\n  if (semaphore_def == NULL) {\n    return (osSemaphoreId)NULL;\n  }\n  return osSemaphoreNew(osRtxSemaphoreTokenLimit, (uint32_t)count,\n                        semaphore_def);\n}\n\nint32_t osSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec) {\n  osStatus_t status;\n  uint32_t count;\n\n  status = osSemaphoreAcquire(semaphore_id, millisec);\n  switch (status) {\n  case osOK:\n    count = osSemaphoreGetCount(semaphore_id);\n    return ((int32_t)count + 1);\n  case osErrorResource:\n  case osErrorTimeout:\n    return 0;\n  default:\n    break;\n  }\n  return -1;\n}\n\n#endif // Semaphore\n\n// Memory Pool\n\n#if (defined(osFeature_Pool) && (osFeature_Pool != 0))\n\nosPoolId osPoolCreate(const osPoolDef_t *pool_def) {\n\n  if (pool_def == NULL) {\n    return (osPoolId)NULL;\n  }\n  return ((osPoolId)(\n      osMemoryPoolNew(pool_def->pool_sz, pool_def->item_sz, &pool_def->attr)));\n}\n\nvoid *osPoolAlloc(osPoolId pool_id) {\n  return osMemoryPoolAlloc((osMemoryPoolId_t)pool_id, 0U);\n}\n\nvoid *osPoolCAlloc(osPoolId pool_id) {\n  void *block;\n  uint32_t block_size;\n\n  block_size = osMemoryPoolGetBlockSize((osMemoryPoolId_t)pool_id);\n  if (block_size == 0U) {\n    return NULL;\n  }\n  block = osMemoryPoolAlloc((osMemoryPoolId_t)pool_id, 0U);\n  if (block != NULL) {\n    memset(block, 0, block_size);\n  }\n  return block;\n}\n\nosStatus osPoolFree(osPoolId pool_id, void *block) {\n  return osMemoryPoolFree((osMemoryPoolId_t)pool_id, block);\n}\n\n#endif // Memory Pool\n\n// Message Queue\n\n#if (defined(osFeature_MessageQ) && (osFeature_MessageQ != 0))\n\nosMessageQId osMessageCreate(const osMessageQDef_t *queue_def,\n                             osThreadId thread_id) {\n  (void)thread_id;\n\n  if (queue_def == NULL) {\n    return (osMessageQId)NULL;\n  }\n  return ((osMessageQId)(osMessageQueueNew(\n      queue_def->queue_sz, sizeof(uint32_t), &queue_def->attr)));\n}\n\nosStatus osMessagePut(osMessageQId queue_id, uint32_t info, uint32_t millisec) {\n  return osMessageQueuePut((osMessageQueueId_t)queue_id, &info, 0U, millisec);\n}\n\nosEvent osMessageGet(osMessageQId queue_id, uint32_t millisec) {\n  osStatus_t status;\n  osEvent event;\n  uint32_t message;\n\n  status =\n      osMessageQueueGet((osMessageQueueId_t)queue_id, &message, NULL, millisec);\n  switch (status) {\n  case osOK:\n    event.status = osEventMessage;\n    event.value.v = message;\n    break;\n  case osErrorResource:\n    event.status = osOK;\n    break;\n  case osErrorTimeout:\n    event.status = osEventTimeout;\n    break;\n  default:\n    event.status = status;\n    break;\n  }\n  return event;\n}\n\nuint32_t osMessageGetSpace(osMessageQId queue_id) {\n  return osMessageQueueGetSpace(queue_id);\n}\n\n#endif // Message Queue\n\n// Mail Queue\n\n#if (defined(osFeature_MailQ) && (osFeature_MailQ != 0))\n\ntypedef struct os_mail_queue_s {\n  osMemoryPoolId_t mp_id;\n  osMessageQueueId_t mq_id;\n} os_mail_queue_t;\n\nosMailQId osMailCreate(const osMailQDef_t *queue_def, osThreadId thread_id) {\n  os_mail_queue_t *ptr;\n  (void)thread_id;\n\n  if (queue_def == NULL) {\n    return (osMailQId)NULL;\n  }\n\n  ptr = queue_def->mail;\n  if (ptr == NULL) {\n    return (osMailQId)NULL;\n  }\n\n  ptr->mp_id = osMemoryPoolNew(queue_def->queue_sz, queue_def->item_sz,\n                               &queue_def->mp_attr);\n  ptr->mq_id = osMessageQueueNew(queue_def->queue_sz, sizeof(void *),\n                                 &queue_def->mq_attr);\n  if ((ptr->mp_id == (osMemoryPoolId_t)NULL) ||\n      (ptr->mq_id == (osMessageQueueId_t)NULL)) {\n    if (ptr->mp_id != (osMemoryPoolId_t)NULL) {\n      osMemoryPoolDelete(ptr->mp_id);\n    }\n    if (ptr->mq_id != (osMessageQueueId_t)NULL) {\n      osMessageQueueDelete(ptr->mq_id);\n    }\n    return (osMailQId)NULL;\n  }\n\n  return (osMailQId)ptr;\n}\n\nvoid *osMailAlloc(osMailQId queue_id, uint32_t millisec) {\n  os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id;\n\n  if (ptr == NULL) {\n    return NULL;\n  }\n  return osMemoryPoolAlloc(ptr->mp_id, millisec);\n}\n\nvoid *osMailCAlloc(osMailQId queue_id, uint32_t millisec) {\n  os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id;\n  void *block;\n  uint32_t block_size;\n\n  if (ptr == NULL) {\n    return NULL;\n  }\n  block_size = osMemoryPoolGetBlockSize(ptr->mp_id);\n  if (block_size == 0U) {\n    return NULL;\n  }\n  block = osMemoryPoolAlloc(ptr->mp_id, millisec);\n  if (block != NULL) {\n    memset(block, 0, block_size);\n  }\n\n  return block;\n}\n\nosStatus osMailPut(osMailQId queue_id, const void *mail) {\n  os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id;\n\n  if (ptr == NULL) {\n    return osErrorParameter;\n  }\n  if (mail == NULL) {\n    return osErrorValue;\n  }\n  return osMessageQueuePut(ptr->mq_id, &mail, 0U, 0U);\n}\n\nosEvent osMailGet(osMailQId queue_id, uint32_t millisec) {\n  os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id;\n  osStatus_t status;\n  osEvent event;\n  void *mail;\n\n  if (ptr == NULL) {\n    event.status = osErrorParameter;\n    return event;\n  }\n\n  status = osMessageQueueGet(ptr->mq_id, &mail, NULL, millisec);\n  switch (status) {\n  case osOK:\n    event.status = osEventMail;\n    event.value.p = mail;\n    break;\n  case osErrorResource:\n    event.status = osOK;\n    break;\n  case osErrorTimeout:\n    event.status = osEventTimeout;\n    break;\n  default:\n    event.status = status;\n    break;\n  }\n  return event;\n}\n\nosStatus osMailFree(osMailQId queue_id, void *mail) {\n  os_mail_queue_t *ptr = (os_mail_queue_t *)queue_id;\n\n  if (ptr == NULL) {\n    return osErrorParameter;\n  }\n  if (mail == NULL) {\n    return osErrorValue;\n  }\n  return osMemoryPoolFree(ptr->mp_id, mail);\n}\n\n#endif // Mail Queue\n\n#endif // osCMSIS\n"
  },
  {
    "path": "rtos/rtx5/os_systick.c",
    "content": "/**************************************************************************/ /**\n                                                                              * @file     os_systick.c\n                                                                              * @brief    CMSIS OS Tick SysTick implementation\n                                                                              * @version  V1.0.1\n                                                                              * @date     24. November 2017\n                                                                              ******************************************************************************/\n/*\n * Copyright (c) 2017-2017 ARM Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n */\n#include \"hal_timer.h\"\n\n#include \"os_tick.h\"\n\n// lint -emacro((923,9078),SCB,SysTick) \"cast from unsigned long to pointer\"\n#include \"RTE_Components.h\"\n#include CMSIS_device_header\n\n#ifdef SysTick\n\n#ifndef SYSTICK_IRQ_PRIORITY\n#define SYSTICK_IRQ_PRIORITY 0xFFU\n#endif\n\n#ifdef CALIB_SLOW_TIMER\n#define OS_CLOCK                                                               \\\n  (CONFIG_SYSTICK_HZ * (OS_CLOCK_NOMINAL / CONFIG_SYSTICK_HZ_NOMINAL))\n#else\n#define OS_CLOCK OS_CLOCK_NOMINAL\n#endif\n\nuint32_t SystemCoreClock;\n\n#define SYSTICK_EXTERNAL_CLOCK 1\n\nvoid SystemCoreClockUpdate() { SystemCoreClock = OS_CLOCK; }\n\nstatic uint8_t PendST;\n// Setup OS Tick.\n__WEAK int32_t OS_Tick_Setup(uint32_t freq, IRQHandler_t handler) {\n  uint32_t load;\n  (void)handler;\n\n  if (freq == 0U) {\n    // lint -e{904} \"Return statement before end of function\"\n    return (-1);\n  }\n\n  load = (SystemCoreClock / freq) - 1U;\n  if (load > 0x00FFFFFFU) {\n    // lint -e{904} \"Return statement before end of function\"\n    return (-1);\n  }\n\n  // Set SysTick Interrupt Priority\n#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)) ||         \\\n     (defined(__CORTEX_M) && (__CORTEX_M == 7U)))\n  SCB->SHPR[11] = SYSTICK_IRQ_PRIORITY;\n#elif (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n  SCB->SHPR[1] |= ((uint32_t)SYSTICK_IRQ_PRIORITY << 24);\n#elif ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ != 0)) ||                 \\\n       (defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ != 0)))\n  SCB->SHP[11] = SYSTICK_IRQ_PRIORITY;\n#elif (defined(__ARM_ARCH_6M__) && (__ARM_ARCH_6M__ != 0))\n  SCB->SHP[1] |= ((uint32_t)SYSTICK_IRQ_PRIORITY << 24);\n#else\n#error \"Unknown ARM Core!\"\n#endif\n\n#if (SYSTICK_EXTERNAL_CLOCK)\n  SysTick->CTRL = SysTick_CTRL_TICKINT_Msk;\n#else\n  SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk;\n#endif\n  SysTick->LOAD = load;\n  SysTick->VAL = 0U;\n\n  PendST = 0U;\n\n  return (0);\n}\n\n/// Enable OS Tick.\n__WEAK void OS_Tick_Enable(void) {\n\n  if (PendST != 0U) {\n    PendST = 0U;\n    SCB->ICSR = SCB_ICSR_PENDSTSET_Msk;\n  }\n\n  SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;\n}\n\n/// Disable OS Tick.\n__WEAK void OS_Tick_Disable(void) {\n\n  SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;\n\n  if ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0U) {\n    SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;\n    PendST = 1U;\n  }\n}\n\n// Acknowledge OS Tick IRQ.\n__WEAK void OS_Tick_AcknowledgeIRQ(void) { (void)SysTick->CTRL; }\n\n// Get OS Tick IRQ number.\n__WEAK int32_t OS_Tick_GetIRQn(void) { return ((int32_t)SysTick_IRQn); }\n\n// Get OS Tick clock.\n__WEAK uint32_t OS_Tick_GetClock(void) { return (SystemCoreClock); }\n\n// Get OS Tick interval.\n__WEAK uint32_t OS_Tick_GetInterval(void) { return (SysTick->LOAD + 1U); }\n\n// Get OS Tick count value.\n__WEAK uint32_t OS_Tick_GetCount(void) {\n  uint32_t load = SysTick->LOAD;\n  return (load - SysTick->VAL);\n}\n\n// Get OS Tick overflow status.\n__WEAK uint32_t OS_Tick_GetOverflow(void) {\n  return ((SysTick->CTRL >> 16) & 1U);\n}\n\n#endif // SysTick\n"
  },
  {
    "path": "rtos/rtx5/rtx_config/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.S))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nsubdir-ccflags-y += -Irtos/rtx5/\n\n"
  },
  {
    "path": "rtos/rtx5/rtx_config/rtx_config.c",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * $Revision:   V5.1.0\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       RTX Configuration\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"RTE_Components.h\"\n#include \"cmsis_compiler.h\"\n#include CMSIS_device_header\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"rtx_config.h\"\n#include \"rtx_os.h\"\n\n#include \"cmsis_os2.h\"\n#include \"hwtimer_list.h\"\n\nvoid WEAK sleep(void) { hal_sleep_enter_sleep(); }\n\nextern void rtx_show_all_threads(void);\n#if TASK_HUNG_CHECK_ENABLED\nextern void check_hung_threads(void);\n#endif\n\n// OS Idle Thread\n__NO_RETURN void osRtxIdleThread(void *argument) {\n  unsigned int os_ticks;\n  HWTIMER_ID timer;\n  int ret;\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 2)\n  unsigned int start_time;\n  unsigned int start_os_time;\n  unsigned int start_tick;\n#endif\n#if !(defined(ROM_BUILD) || defined(PROGRAMMER))\n  ret = hal_trace_crash_dump_register(HAL_TRACE_CRASH_DUMP_MODULE_SYS,\n                                      rtx_show_all_threads);\n  ASSERT(ret == 0, \"IdleTask: Failed to register crash dump callback\");\n#endif\n  timer = hwtimer_alloc(NULL, NULL);\n  ASSERT(timer, \"IdleTask: Failed to alloc sleep timer\");\n\n  for (;;) {\n#if TASK_HUNG_CHECK_ENABLED\n    check_hung_threads();\n#endif\n\n    if (hal_sleep_light_sleep() == HAL_SLEEP_STATUS_DEEP) {\n      os_ticks = osKernelSuspend();\n      if (os_ticks) {\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 2)\n        __disable_irq();\n#endif\n        ret =\n            hwtimer_start(timer, MS_TO_HWTICKS(os_ticks * OS_TICK_FREQ / 1000));\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 2)\n        start_time = hal_sys_timer_get();\n        start_tick = SysTick->VAL;\n        start_os_time = osRtxInfo.kernel.tick;\n        __enable_irq();\n#endif\n        if (ret == 0) {\n          sleep();\n          ret = hwtimer_stop(timer);\n        }\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 2)\n        if (hal_sys_timer_get() - start_time >= MS_TO_HWTICKS(1)) {\n          TRACE(5, \"[%u/0x%X][%2u/%u] os_idle_demon start timer. tick:%u\",\n                TICKS_TO_MS(start_time), start_time, start_tick, start_os_time,\n                os_ticks);\n        }\n#endif\n      }\n      osKernelResume(os_ticks);\n    }\n  }\n}\n\n// OS Error Callback function\n__WEAK uint32_t osRtxErrorNotify(uint32_t code, void *object_id) {\n  (void)object_id;\n\n  switch (code) {\n  case osRtxErrorStackUnderflow:\n    // Stack overflow detected for thread (thread_id=object_id)\n    break;\n  case osRtxErrorISRQueueOverflow:\n    // ISR Queue overflow detected when inserting object (object_id)\n    break;\n  case osRtxErrorTimerQueueOverflow:\n    // User Timer Callback Queue overflow detected for timer\n    // (timer_id=object_id)\n    break;\n  case osRtxErrorClibSpace:\n    // Standard C/C++ library libspace not available: increase\n    // OS_THREAD_LIBSPACE_NUM\n    break;\n  case osRtxErrorClibMutex:\n    // Standard C/C++ library mutex initialization failed\n    break;\n  default:\n    // Reserved\n    break;\n  }\n  ASSERT(0, \"osRtxErrorNotify, code: %08x\\n\", code);\n  // return 0U;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_config/rtx_config.h",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * $Revision:   V5.5.0\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       RTX Configuration definitions\n *\n * -----------------------------------------------------------------------------\n */\n\n#ifndef RTX_CONFIG_H_\n#define RTX_CONFIG_H_\n\n#ifdef   _RTE_\n#include \"RTE_Components.h\"\n#ifdef    RTE_RTX_CONFIG_H\n#include  RTE_RTX_CONFIG_H\n#endif\n#endif\n\n//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------\n\n// System Configuration\n// =======================\n\n//   Global Dynamic Memory size [bytes] <0-1073741824:8>\n//    Defines the combined global dynamic memory size.\n//    Default: 4096\n#ifndef OS_DYNAMIC_MEM_SIZE\n#define OS_DYNAMIC_MEM_SIZE         0x3000\n#endif\n\n//   Kernel Tick Frequency [Hz] <1-1000000>\n//    Defines base time unit for delays and timeouts.\n//    Default: 1000 (1ms tick)\n#ifndef OS_TICK_FREQ\n#define OS_TICK_FREQ                1000\n#endif\n\n//   Round-Robin Thread switching\n//    Enables Round-Robin Thread switching.\n#ifndef OS_ROBIN_ENABLE\n#define OS_ROBIN_ENABLE             1\n#endif\n\n//     Round-Robin Timeout <1-1000>\n//      Defines how many ticks a thread will execute before a thread switch.\n//      Default: 5\n#ifndef OS_ROBIN_TIMEOUT\n#define OS_ROBIN_TIMEOUT            5\n#endif\n\n//   \n\n//   ISR FIFO Queue\n//      <4=>  4 entries    <8=>   8 entries   <12=>  12 entries   <16=>  16 entries\n//     <24=> 24 entries   <32=>  32 entries   <48=>  48 entries   <64=>  64 entries\n//     <96=> 96 entries  <128=> 128 entries  <196=> 196 entries  <256=> 256 entries\n//    RTOS Functions called from ISR store requests to this buffer.\n//    Default: 16 entries\n#ifndef OS_ISR_FIFO_QUEUE\n#define OS_ISR_FIFO_QUEUE           16\n#endif\n\n//   Object Memory usage counters\n//    Enables object memory usage counters (requires RTX source variant).\n#ifndef OS_OBJ_MEM_USAGE\n#define OS_OBJ_MEM_USAGE            0\n#endif\n\n// \n\n// Thread Configuration\n// =======================\n\n//   Object specific Memory allocation\n//    Enables object specific memory allocation.\n#ifndef OS_THREAD_OBJ_MEM\n#define OS_THREAD_OBJ_MEM           0\n#endif\n\n//     Number of user Threads <1-1000>\n//      Defines maximum number of user threads that can be active at the same time.\n//      Applies to user threads with system provided memory for control blocks.\n#ifndef OS_THREAD_NUM\n#define OS_THREAD_NUM               1\n#endif\n\n//     Number of user Threads with default Stack size <0-1000>\n//      Defines maximum number of user threads with default stack size.\n//      Applies to user threads with zero stack size specified.\n#ifndef OS_THREAD_DEF_STACK_NUM\n#define OS_THREAD_DEF_STACK_NUM     0\n#endif\n\n//     Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8>\n//      Defines the combined stack size for user threads with user-provided stack size.\n//      Applies to user threads with user-provided stack size and system provided memory for stack.\n//      Default: 0\n#ifndef OS_THREAD_USER_STACK_SIZE\n#define OS_THREAD_USER_STACK_SIZE   0\n#endif\n\n//   \n\n//   Default Thread Stack size [bytes] <96-1073741824:8>\n//    Defines stack size for threads with zero stack size specified.\n//    Default: 256\n#ifndef OS_STACK_SIZE\n#define OS_STACK_SIZE               0x1000\n#endif\n\n//   Idle Thread Stack size [bytes] <72-1073741824:8>\n//    Defines stack size for Idle thread.\n//    Default: 256\n#ifndef OS_IDLE_THREAD_STACK_SIZE\n#define OS_IDLE_THREAD_STACK_SIZE   256\n#endif\n\n//   Idle Thread TrustZone Module Identifier\n//    Defines TrustZone Thread Context Management Identifier.\n//    Applies only to cores with TrustZone technology.\n//    Default: 0 (not used)\n#ifndef OS_IDLE_THREAD_TZ_MOD_ID\n#define OS_IDLE_THREAD_TZ_MOD_ID    0\n#endif\n\n//   Stack overrun checking\n//    Enables stack overrun check at thread switch.\n//    Enabling this option increases slightly the execution time of a thread switch.\n#ifndef OS_STACK_CHECK\n#define OS_STACK_CHECK              1\n#endif\n\n//   Stack usage watermark\n//    Initializes thread stack with watermark pattern for analyzing stack usage.\n//    Enabling this option increases significantly the execution time of thread creation.\n#ifndef OS_STACK_WATERMARK\n#define OS_STACK_WATERMARK          0\n#endif\n\n//   Processor mode for Thread execution\n//     <0=> Unprivileged mode\n//     <1=> Privileged mode\n//    Default: Privileged mode\n#ifndef OS_PRIVILEGE_MODE\n#define OS_PRIVILEGE_MODE           1\n#endif\n\n// \n\n// Timer Configuration\n// ======================\n\n//   Object specific Memory allocation\n//    Enables object specific memory allocation.\n#ifndef OS_TIMER_OBJ_MEM\n#define OS_TIMER_OBJ_MEM            0\n#endif\n\n//     Number of Timer objects <1-1000>\n//      Defines maximum number of objects that can be active at the same time.\n//      Applies to objects with system provided memory for control blocks.\n#ifndef OS_TIMER_NUM\n#define OS_TIMER_NUM                6\n#endif\n\n//   \n\n//   Timer Thread Priority\n//      <8=> Low\n//     <16=> Below Normal  <24=> Normal  <32=> Above Normal\n//     <40=> High\n//     <48=> Realtime\n//    Defines priority for timer thread\n//    Default: High\n#ifndef OS_TIMER_THREAD_PRIO\n#define OS_TIMER_THREAD_PRIO        40\n#endif\n\n//   Timer Thread Stack size [bytes] <0-1073741824:8>\n//    Defines stack size for Timer thread.\n//    May be set to 0 when timers are not used.\n//    Default: 256\n#ifndef OS_TIMER_THREAD_STACK_SIZE\n#define OS_TIMER_THREAD_STACK_SIZE  0x1000\n#endif\n\n//   Timer Thread TrustZone Module Identifier\n//    Defines TrustZone Thread Context Management Identifier.\n//    Applies only to cores with TrustZone technology.\n//    Default: 0 (not used)\n#ifndef OS_TIMER_THREAD_TZ_MOD_ID\n#define OS_TIMER_THREAD_TZ_MOD_ID   0\n#endif\n\n//   Timer Callback Queue entries <0-256>\n//    Number of concurrent active timer callback functions.\n//    May be set to 0 when timers are not used.\n//    Default: 4\n#ifndef OS_TIMER_CB_QUEUE\n#define OS_TIMER_CB_QUEUE           16\n#endif\n\n// \n\n// Event Flags Configuration\n// ============================\n\n//   Object specific Memory allocation\n//    Enables object specific memory allocation.\n#ifndef OS_EVFLAGS_OBJ_MEM\n#define OS_EVFLAGS_OBJ_MEM          0\n#endif\n\n//     Number of Event Flags objects <1-1000>\n//      Defines maximum number of objects that can be active at the same time.\n//      Applies to objects with system provided memory for control blocks.\n#ifndef OS_EVFLAGS_NUM\n#define OS_EVFLAGS_NUM              1\n#endif\n\n//   \n\n// \n\n// Mutex Configuration\n// ======================\n\n//   Object specific Memory allocation\n//    Enables object specific memory allocation.\n#ifndef OS_MUTEX_OBJ_MEM\n#define OS_MUTEX_OBJ_MEM            0\n#endif\n\n//     Number of Mutex objects <1-1000>\n//      Defines maximum number of objects that can be active at the same time.\n//      Applies to objects with system provided memory for control blocks.\n#ifndef OS_MUTEX_NUM\n#define OS_MUTEX_NUM                1\n#endif\n\n//   \n\n// \n\n// Semaphore Configuration\n// ==========================\n\n//   Object specific Memory allocation\n//    Enables object specific memory allocation.\n#ifndef OS_SEMAPHORE_OBJ_MEM\n#define OS_SEMAPHORE_OBJ_MEM        0\n#endif\n\n//     Number of Semaphore objects <1-1000>\n//      Defines maximum number of objects that can be active at the same time.\n//      Applies to objects with system provided memory for control blocks.\n#ifndef OS_SEMAPHORE_NUM\n#define OS_SEMAPHORE_NUM            1\n#endif\n\n//   \n\n// \n\n// Memory Pool Configuration\n// ============================\n\n//   Object specific Memory allocation\n//    Enables object specific memory allocation.\n#ifndef OS_MEMPOOL_OBJ_MEM\n#define OS_MEMPOOL_OBJ_MEM          0\n#endif\n\n//     Number of Memory Pool objects <1-1000>\n//      Defines maximum number of objects that can be active at the same time.\n//      Applies to objects with system provided memory for control blocks.\n#ifndef OS_MEMPOOL_NUM\n#define OS_MEMPOOL_NUM              1\n#endif\n\n//     Data Storage Memory size [bytes] <0-1073741824:8>\n//      Defines the combined data storage memory size.\n//      Applies to objects with system provided memory for data storage.\n//      Default: 0\n#ifndef OS_MEMPOOL_DATA_SIZE\n#define OS_MEMPOOL_DATA_SIZE        0\n#endif\n\n//   \n\n// \n\n// Message Queue Configuration\n// ==============================\n\n//   Object specific Memory allocation\n//    Enables object specific memory allocation.\n#ifndef OS_MSGQUEUE_OBJ_MEM\n#define OS_MSGQUEUE_OBJ_MEM         0\n#endif\n\n//     Number of Message Queue objects <1-1000>\n//      Defines maximum number of objects that can be active at the same time.\n//      Applies to objects with system provided memory for control blocks.\n#ifndef OS_MSGQUEUE_NUM\n#define OS_MSGQUEUE_NUM             1\n#endif\n\n//     Data Storage Memory size [bytes] <0-1073741824:8>\n//      Defines the combined data storage memory size.\n//      Applies to objects with system provided memory for data storage.\n//      Default: 0\n#ifndef OS_MSGQUEUE_DATA_SIZE\n#define OS_MSGQUEUE_DATA_SIZE       0\n#endif\n\n//   \n\n// \n\n// Event Recorder Configuration\n// ===============================\n\n//   Global Initialization\n//    Initialize Event Recorder during 'osKernelInitialize'.\n#ifndef OS_EVR_INIT\n#define OS_EVR_INIT                 0\n#endif\n\n//     Start recording\n//      Start event recording after initialization.\n#ifndef OS_EVR_START\n#define OS_EVR_START                1\n#endif\n\n//     Global Event Filter Setup\n//      Initial recording level applied to all components.\n//       Error events\n//       API function call events\n//       Operation events\n//       Detailed operation events\n//     \n#ifndef OS_EVR_LEVEL\n#define OS_EVR_LEVEL                0x00U\n#endif\n\n//     RTOS Event Filter Setup\n//      Recording levels for RTX components.\n//      Only applicable if events for the respective component are generated.\n\n//       Memory Management\n//        Recording level for Memory Management events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_MEMORY_LEVEL\n#define OS_EVR_MEMORY_LEVEL         0x01U\n#endif\n\n//       Kernel\n//        Recording level for Kernel events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_KERNEL_LEVEL\n#define OS_EVR_KERNEL_LEVEL         0x01U\n#endif\n\n//       Thread\n//        Recording level for Thread events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_THREAD_LEVEL\n#define OS_EVR_THREAD_LEVEL         0x05U\n#endif\n\n//       Generic Wait\n//        Recording level for Generic Wait events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_WAIT_LEVEL\n#define OS_EVR_WAIT_LEVEL           0x01U\n#endif\n\n//       Thread Flags\n//        Recording level for Thread Flags events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_THFLAGS_LEVEL\n#define OS_EVR_THFLAGS_LEVEL        0x01U\n#endif\n\n//       Event Flags\n//        Recording level for Event Flags events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_EVFLAGS_LEVEL\n#define OS_EVR_EVFLAGS_LEVEL        0x01U\n#endif\n\n//       Timer\n//        Recording level for Timer events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_TIMER_LEVEL\n#define OS_EVR_TIMER_LEVEL          0x01U\n#endif\n\n//       Mutex\n//        Recording level for Mutex events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_MUTEX_LEVEL\n#define OS_EVR_MUTEX_LEVEL          0x01U\n#endif\n\n//       Semaphore\n//        Recording level for Semaphore events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_SEMAPHORE_LEVEL\n#define OS_EVR_SEMAPHORE_LEVEL      0x01U\n#endif\n\n//       Memory Pool\n//        Recording level for Memory Pool events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_MEMPOOL_LEVEL\n#define OS_EVR_MEMPOOL_LEVEL        0x01U\n#endif\n\n//       Message Queue\n//        Recording level for Message Queue events.\n//         Error events\n//         API function call events\n//         Operation events\n//         Detailed operation events\n//       \n#ifndef OS_EVR_MSGQUEUE_LEVEL\n#define OS_EVR_MSGQUEUE_LEVEL       0x01U\n#endif\n\n//     \n\n//   \n\n//   RTOS Event Generation\n//    Enables event generation for RTX components (requires RTX source variant).\n\n//     Memory Management\n//      Enables Memory Management event generation.\n#ifndef OS_EVR_MEMORY\n#define OS_EVR_MEMORY               1\n#endif\n\n//     Kernel\n//      Enables Kernel event generation.\n#ifndef OS_EVR_KERNEL\n#define OS_EVR_KERNEL               1\n#endif\n\n//     Thread\n//      Enables Thread event generation.\n#ifndef OS_EVR_THREAD\n#define OS_EVR_THREAD               1\n#endif\n\n//     Generic Wait\n//      Enables Generic Wait event generation.\n#ifndef OS_EVR_WAIT\n#define OS_EVR_WAIT                 1\n#endif\n\n//     Thread Flags\n//      Enables Thread Flags event generation.\n#ifndef OS_EVR_THFLAGS\n#define OS_EVR_THFLAGS              1\n#endif\n\n//     Event Flags\n//      Enables Event Flags event generation.\n#ifndef OS_EVR_EVFLAGS\n#define OS_EVR_EVFLAGS              1\n#endif\n\n//     Timer\n//      Enables Timer event generation.\n#ifndef OS_EVR_TIMER\n#define OS_EVR_TIMER                1\n#endif\n\n//     Mutex\n//      Enables Mutex event generation.\n#ifndef OS_EVR_MUTEX\n#define OS_EVR_MUTEX                1\n#endif\n\n//     Semaphore\n//      Enables Semaphore event generation.\n#ifndef OS_EVR_SEMAPHORE\n#define OS_EVR_SEMAPHORE            1\n#endif\n\n//     Memory Pool\n//      Enables Memory Pool event generation.\n#ifndef OS_EVR_MEMPOOL\n#define OS_EVR_MEMPOOL              1\n#endif\n\n//     Message Queue\n//      Enables Message Queue event generation.\n#ifndef OS_EVR_MSGQUEUE\n#define OS_EVR_MSGQUEUE             1\n#endif\n\n//   \n\n// \n\n// Number of Threads which use standard C/C++ library libspace\n// (when thread specific memory allocation is not used).\n#if (OS_THREAD_OBJ_MEM == 0)\n#define OS_THREAD_LIBSPACE_NUM      4\n#else\n#define OS_THREAD_LIBSPACE_NUM      OS_THREAD_NUM\n#endif\n\n//------------- <<< end of configuration section >>> ---------------------------\n\n#endif  // RTX_CONFIG_H_\n"
  },
  {
    "path": "rtos/rtx5/rtx_core_c.h",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Cortex Core definitions\n *\n * -----------------------------------------------------------------------------\n */\n\n#ifndef RTX_CORE_C_H_\n#define RTX_CORE_C_H_\n\n//lint -emacro((923,9078),SCB) \"cast from unsigned long to pointer\" [MISRA Note 9]\n#include \"RTE_Components.h\"\n#include CMSIS_device_header\n\n#if ((!defined(__ARM_ARCH_6M__))      && \\\n     (!defined(__ARM_ARCH_7A__))      && \\\n     (!defined(__ARM_ARCH_7M__))      && \\\n     (!defined(__ARM_ARCH_7EM__))     && \\\n     (!defined(__ARM_ARCH_8M_BASE__)) && \\\n     (!defined(__ARM_ARCH_8M_MAIN__)))\n#error \"Unknown Arm Architecture!\"\n#endif\n\n#if   (defined(__ARM_ARCH_7A__) && (__ARM_ARCH_7A__ != 0))\n#include \"rtx_core_ca.h\"\n#else\n#include \"rtx_core_cm.h\"\n#endif\n\n#endif  // RTX_CORE_C_H_\n"
  },
  {
    "path": "rtos/rtx5/rtx_core_ca.h",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Cortex-A Core definitions\n *\n * -----------------------------------------------------------------------------\n */\n\n#ifndef RTX_CORE_CA_H_\n#define RTX_CORE_CA_H_\n\n#ifndef RTX_CORE_C_H_\n#include \"RTE_Components.h\"\n#include CMSIS_device_header\n#endif\n\n#include \ntypedef bool bool_t;\n#define FALSE                   ((bool_t)0)\n#define TRUE                    ((bool_t)1)\n\n#define DOMAIN_NS               0\n#define EXCLUSIVE_ACCESS        1\n\n#define OS_TICK_HANDLER         osRtxTick_Handler\n\n// CPSR bit definitions\n#define CPSR_T_BIT              0x20U\n#define CPSR_I_BIT              0x80U\n#define CPSR_F_BIT              0x40U\n\n// CPSR mode bitmasks\n#define CPSR_MODE_USER          0x10U\n#define CPSR_MODE_SYSTEM        0x1FU\n\n/// xPSR_Initialization Value\n/// \\param[in]  privileged      true=privileged, false=unprivileged\n/// \\param[in]  thumb           true=Thumb, false=Arm\n/// \\return                     xPSR Init Value\n__STATIC_INLINE uint32_t xPSR_InitVal (bool_t privileged, bool_t thumb) {\n  uint32_t psr;\n\n  if (privileged) {\n    if (thumb) {\n      psr = CPSR_MODE_SYSTEM | CPSR_T_BIT;\n    } else {\n      psr = CPSR_MODE_SYSTEM;\n    }\n  } else {\n    if (thumb) {\n      psr = CPSR_MODE_USER   | CPSR_T_BIT;\n    } else {\n      psr = CPSR_MODE_USER;\n    }\n  }\n\n  return psr;\n}\n\n// Stack Frame:\n//  - VFP-D32: D16-31, D0-D15, FPSCR, Reserved, R4-R11, R0-R3, R12, LR, PC, CPSR\n//  - VFP-D16:         D0-D15, FPSCR, Reserved, R4-R11, R0-R3, R12, LR, PC, CPSR\n//  - Basic:                                    R4-R11, R0-R3, R12, LR, PC, CPSR\n\n/// Stack Frame Initialization Value\n#define STACK_FRAME_INIT_VAL    0x00U\n\n/// Stack Offset of Register R0\n/// \\param[in]  stack_frame     Stack Frame\n/// \\return                     R0 Offset\n__STATIC_INLINE uint32_t StackOffsetR0 (uint8_t stack_frame) {\n  uint32_t offset;\n\n  if        ((stack_frame & 0x04U) != 0U) {\n    offset = (32U*8U) + (2U*4U) + (8U*4U);\n  } else if ((stack_frame & 0x02U) != 0U) {\n    offset = (16U*8U) + (2U*4U) + (8U*4U);\n  } else {\n    offset =                      (8U*4U);\n  }\n  return offset;\n}\n\n\n//  ==== Emulated Cortex-M functions ====\n\n/// Get xPSR Register - emulate M profile: SP_usr - (8*4)\n/// \\return      xPSR Register value\n#if defined(__CC_ARM)\n#pragma push\n#pragma arm\nstatic __asm    uint32_t __get_PSP (void) {\n  sub   sp, sp, #4\n  stm   sp, {sp}^\n  pop   {r0}\n  sub   r0, r0, #32\n  bx    lr\n}\n#pragma pop\n#else\n#ifdef __ICCARM__\n__arm\n#else\n__attribute__((target(\"arm\")))\n#endif\n__STATIC_INLINE uint32_t __get_PSP (void) {\n  register uint32_t ret;\n\n  __ASM volatile (\n    \"sub  sp,sp,#4\\n\\t\"\n    \"stm  sp,{sp}^\\n\\t\"\n    \"pop  {%[ret]}\\n\\t\"\n    \"sub  %[ret],%[ret],#32\\n\\t\"\n    : [ret] \"=&l\" (ret)\n    :\n    : \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Set Control Register - not needed for A profile\n/// \\param[in]  control         Control Register value to set\n__STATIC_INLINE void __set_CONTROL(uint32_t control) {\n  (void)control;\n}\n\n\n//  ==== Core functions ====\n\n/// Check if running Privileged\n/// \\return     true=privileged, false=unprivileged\n__STATIC_INLINE bool_t IsPrivileged (void) {\n  return (__get_mode() != CPSR_MODE_USER);\n}\n\n/// Check if in IRQ Mode\n/// \\return     true=IRQ, false=thread\n__STATIC_INLINE bool_t IsIrqMode (void) {\n  return ((__get_mode() != CPSR_MODE_USER) && (__get_mode() != CPSR_MODE_SYSTEM));\n}\n\n/// Check if IRQ is Masked\n/// \\return     true=masked, false=not masked\n__STATIC_INLINE bool_t IsIrqMasked (void) {\n  return  FALSE;\n}\n\n\n//  ==== Core Peripherals functions ====\n\nextern uint8_t IRQ_PendSV;\n\n/// Setup SVC and PendSV System Service Calls (not needed on Cortex-A)\n__STATIC_INLINE void SVC_Setup (void) {\n}\n\n/// Get Pending SV (Service Call) Flag\n/// \\return     Pending SV Flag\n__STATIC_INLINE uint8_t GetPendSV (void) {\n  return (IRQ_PendSV);\n}\n\n/// Clear Pending SV (Service Call) Flag\n__STATIC_INLINE void ClrPendSV (void) {\n  IRQ_PendSV = 0U;\n}\n\n/// Set Pending SV (Service Call) Flag\n__STATIC_INLINE void SetPendSV (void) {\n  IRQ_PendSV = 1U;\n}\n\n\n//  ==== Service Calls definitions ====\n\n#if defined(__CC_ARM)\n\n#define __SVC_INDIRECT(n) __svc_indirect(n)\n\n#define SVC0_0N(f,t)                                                           \\\n__SVC_INDIRECT(0) t    svc##f (t(*)());                                        \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (void) {                                         \\\n  svc##f(svcRtx##f);                                                           \\\n}\n\n#define SVC0_0(f,t)                                                            \\\n__SVC_INDIRECT(0) t    svc##f (t(*)());                                        \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (void) {                                         \\\n  return svc##f(svcRtx##f);                                                    \\\n}\n\n#define SVC0_1N(f,t,t1)                                                        \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1),t1);                                   \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1) {                                        \\\n  svc##f(svcRtx##f,a1);                                                        \\\n}\n\n#define SVC0_1(f,t,t1)                                                         \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1),t1);                                   \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1) {                                        \\\n  return svc##f(svcRtx##f,a1);                                                 \\\n}\n\n#define SVC0_2(f,t,t1,t2)                                                      \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1,t2),t1,t2);                             \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2) {                                 \\\n  return svc##f(svcRtx##f,a1,a2);                                              \\\n}\n\n#define SVC0_3(f,t,t1,t2,t3)                                                   \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1,t2,t3),t1,t2,t3);                       \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2, t3 a3) {                          \\\n  return svc##f(svcRtx##f,a1,a2,a3);                                           \\\n}\n\n#define SVC0_4(f,t,t1,t2,t3,t4)                                                \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1,t2,t3,t4),t1,t2,t3,t4);                 \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2, t3 a3, t4 a4) {                   \\\n  return svc##f(svcRtx##f,a1,a2,a3,a4);                                        \\\n}\n\n#elif defined(__ICCARM__)\n\n#define SVC_ArgF(f)                                                            \\\n  __asm(                                                                       \\\n    \"mov r12,%0\\n\"                                                             \\\n    :: \"r\"(&f): \"r12\"                                                          \\\n  );\n\n#define STRINGIFY(a) #a\n#define __SVC_INDIRECT(n) _Pragma(STRINGIFY(swi_number = n)) __swi\n\n#define SVC0_0N(f,t)                                                           \\\n__SVC_INDIRECT(0) t    svc##f ();                                              \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (void) {                                         \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  svc##f();                                                                    \\\n}\n\n#define SVC0_0(f,t)                                                            \\\n__SVC_INDIRECT(0) t    svc##f ();                                              \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (void) {                                         \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f();                                                             \\\n}\n\n#define SVC0_1N(f,t,t1)                                                        \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1);                                         \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1) {                                        \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  svc##f(a1);                                                                  \\\n}\n\n#define SVC0_1(f,t,t1)                                                         \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1);                                         \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1) {                                        \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f(a1);                                                           \\\n}\n\n#define SVC0_2(f,t,t1,t2)                                                      \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1, t2 a2);                                  \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2) {                                 \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f(a1,a2);                                                        \\\n}\n\n#define SVC0_3(f,t,t1,t2,t3)                                                   \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1, t2 a2, t3 a3);                           \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2, t3 a3) {                          \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f(a1,a2,a3);                                                     \\\n}\n\n#define SVC0_4(f,t,t1,t2,t3,t4)                                                \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1, t2 a2, t3 a3, t4 a4);                    \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2, t3 a3, t4 a4) {                   \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f(a1,a2,a3,a4);                                                  \\\n}\n\n#else   // !(defined(__CC_ARM) || defined(__ICCARM__))\n\n#define SVC_RegF \"r12\"\n\n#define SVC_ArgN(n) \\\nregister uint32_t __r##n __ASM(\"r\"#n)\n\n#define SVC_ArgR(n,a) \\\nregister uint32_t __r##n __ASM(\"r\"#n) = (uint32_t)a\n\n#define SVC_ArgF(f) \\\nregister uint32_t __rf   __ASM(SVC_RegF) = (uint32_t)f\n\n#define SVC_In0 \"r\"(__rf)\n#define SVC_In1 \"r\"(__rf),\"r\"(__r0)\n#define SVC_In2 \"r\"(__rf),\"r\"(__r0),\"r\"(__r1)\n#define SVC_In3 \"r\"(__rf),\"r\"(__r0),\"r\"(__r1),\"r\"(__r2)\n#define SVC_In4 \"r\"(__rf),\"r\"(__r0),\"r\"(__r1),\"r\"(__r2),\"r\"(__r3)\n\n#define SVC_Out0\n#define SVC_Out1 \"=r\"(__r0)\n\n#define SVC_CL0\n#define SVC_CL1 \"r1\"\n#define SVC_CL2 \"r0\",\"r1\"\n\n#define SVC_Call0(in, out, cl)                                                 \\\n  __ASM volatile (\"svc 0\" : out : in : cl)\n\n#define SVC0_0N(f,t)                                                           \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (void) {                                            \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In0, SVC_Out0, SVC_CL2);                                       \\\n}\n\n#define SVC0_0(f,t)                                                            \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (void) {                                            \\\n  SVC_ArgN(0);                                                                 \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In0, SVC_Out1, SVC_CL1);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#define SVC0_1N(f,t,t1)                                                        \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1) {                                           \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In1, SVC_Out0, SVC_CL1);                                       \\\n}\n\n#define SVC0_1(f,t,t1)                                                         \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1) {                                           \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In1, SVC_Out1, SVC_CL1);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#define SVC0_2(f,t,t1,t2)                                                      \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1, t2 a2) {                                    \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgR(1,a2);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In2, SVC_Out1, SVC_CL0);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#define SVC0_3(f,t,t1,t2,t3)                                                   \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1, t2 a2, t3 a3) {                             \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgR(1,a2);                                                              \\\n  SVC_ArgR(2,a3);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In3, SVC_Out1, SVC_CL0);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#define SVC0_4(f,t,t1,t2,t3,t4)                                                \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1, t2 a2, t3 a3, t4 a4) {                      \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgR(1,a2);                                                              \\\n  SVC_ArgR(2,a3);                                                              \\\n  SVC_ArgR(3,a4);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In4, SVC_Out1, SVC_CL0);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#endif\n\n\n//  ==== Exclusive Access Operation ====\n\n#if (EXCLUSIVE_ACCESS == 1)\n\n/// Atomic Access Operation: Write (8-bit)\n/// \\param[in]  mem             Memory address\n/// \\param[in]  val             Value to write\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint8_t atomic_wr8 (uint8_t *mem, uint8_t val) {\n  mov    r2,r0\n1\n  ldrexb r0,[r2]\n  strexb r3,r1,[r2]\n  cmp    r3,#0\n  bne    %B1\n  bx     lr\n}\n#else\n__STATIC_INLINE uint8_t atomic_wr8 (uint8_t *mem, uint8_t val) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint8_t  ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrexb %[ret],[%[mem]]\\n\\t\"\n    \"strexb %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp    %[res],#0\\n\\t\"\n    \"bne    1b\\n\\t\"\n  : [ret] \"=&l\" (ret),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem),\n    [val] \"l\"   (val)\n  : \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Set bits (32-bit)\n/// \\param[in]  mem             Memory address\n/// \\param[in]  bits            Bit mask\n/// \\return                     New value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_set32 (uint32_t *mem, uint32_t bits) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  orr   r0,r0,r1\n  strex r3,r0,[r2]\n  cmp   r3,#0\n  bne   %B1\n  bx    lr\n}\n#else\n__STATIC_INLINE uint32_t atomic_set32 (uint32_t *mem, uint32_t bits) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[val],[%[mem]]\\n\\t\"\n    \"orr   %[ret],%[val],%[bits]\\n\\t\"\n    \"strex %[res],%[ret],[%[mem]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [mem]  \"l\"   (mem),\n    [bits] \"l\"   (bits)\n  : \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Clear bits (32-bit)\n/// \\param[in]  mem             Memory address\n/// \\param[in]  bits            Bit mask\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_clr32 (uint32_t *mem, uint32_t bits) {\n  push  {r4,lr}\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  bic   r4,r0,r1\n  strex r3,r4,[r2]\n  cmp   r3,#0\n  bne   %B1\n  pop   {r4,pc}\n}\n#else\n__STATIC_INLINE uint32_t atomic_clr32 (uint32_t *mem, uint32_t bits) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"bic   %[val],%[ret],%[bits]\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [mem]  \"l\"   (mem),\n    [bits] \"l\"   (bits)\n  : \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Check if all specified bits (32-bit) are active and clear them\n/// \\param[in]  mem             Memory address\n/// \\param[in]  bits            Bit mask\n/// \\return                     Active bits before clearing or 0 if not active\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_chk32_all (uint32_t *mem, uint32_t bits) {\n  push  {r4,lr}\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  and   r4,r0,r1\n  cmp   r4,r1\n  beq   %F2\n  clrex\n  movs  r0,#0\n  pop   {r4,pc}\n2\n  bic   r4,r0,r1\n  strex r3,r4,[r2]\n  cmp   r3,#0\n  bne   %B1\n  pop   {r4,pc}\n}\n#else\n__STATIC_INLINE uint32_t atomic_chk32_all (uint32_t *mem, uint32_t bits) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"and   %[val],%[ret],%[bits]\\n\\t\"\n    \"cmp   %[val],%[bits]\\n\\t\"\n    \"beq   2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"movs  %[ret],#0\\n\\t\"\n    \"b     3f\\n\"\n  \"2:\\n\\t\"\n    \"bic   %[val],%[ret],%[bits]\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  \"3:\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [mem]  \"l\"   (mem),\n    [bits] \"l\"   (bits)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Check if any specified bits (32-bit) are active and clear them\n/// \\param[in]  mem             Memory address\n/// \\param[in]  bits            Bit mask\n/// \\return                     Active bits before clearing or 0 if not active\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_chk32_any (uint32_t *mem, uint32_t bits) {\n  push  {r4,lr}\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  tst   r0,r1\n  bne   %F2\n  clrex\n  movs  r0,#0\n  pop   {r4,pc}\n2\n  bic   r4,r0,r1\n  strex r3,r4,[r2]\n  cmp    r3,#0\n  bne   %B1\n  pop   {r4,pc}\n}\n#else\n__STATIC_INLINE uint32_t atomic_chk32_any (uint32_t *mem, uint32_t bits) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"tst   %[ret],%[bits]\\n\\t\"\n    \"bne   2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"movs  %[ret],#0\\n\\t\"\n    \"b     3f\\n\"\n  \"2:\\n\\t\"\n    \"bic   %[val],%[ret],%[bits]\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  \"3:\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [mem]  \"l\"   (mem),\n    [bits] \"l\"   (bits)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Increment (32-bit)\n/// \\param[in]  mem             Memory address\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_inc32 (uint32_t *mem) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  adds  r1,r0,#1\n  strex r3,r1,[r2]\n  cmp   r3,#0\n  bne   %B1\n  bx    lr\n}\n#else\n__STATIC_INLINE uint32_t atomic_inc32 (uint32_t *mem) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"adds  %[val],%[ret],#1\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Increment (16-bit) if Less Than\n/// \\param[in]  mem             Memory address\n/// \\param[in]  max             Maximum value\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint16_t atomic_inc16_lt (uint16_t *mem, uint16_t max) {\n  push   {r4,lr}\n  mov    r2,r0\n1\n  ldrexh r0,[r2]\n  cmp    r1,r0\n  bhi    %F2\n  clrex\n  pop    {r4,pc}\n2\n  adds   r4,r0,#1\n  strexh r3,r4,[r2]\n  cmp    r3,#0\n  bne    %B1\n  pop    {r4,pc}\n}\n#else\n__STATIC_INLINE uint16_t atomic_inc16_lt (uint16_t *mem, uint16_t max) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint16_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrexh %[ret],[%[mem]]\\n\\t\"\n    \"cmp    %[max],%[ret]\\n\\t\"\n    \"bhi    2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"b      3f\\n\"\n  \"2:\\n\\t\"\n    \"adds   %[val],%[ret],#1\\n\\t\"\n    \"strexh %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp    %[res],#0\\n\\t\"\n    \"bne    1b\\n\"\n  \"3:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem),\n    [max] \"l\"   (max)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Increment (16-bit) and clear on Limit\n/// \\param[in]  mem             Memory address\n/// \\param[in]  max             Maximum value\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint16_t atomic_inc16_lim (uint16_t *mem, uint16_t lim) {\n  push   {r4,lr}\n  mov    r2,r0\n1\n  ldrexh r0,[r2]\n  adds   r4,r0,#1\n  cmp    r1,r4\n  bhi    %F2\n  movs   r4,#0\n2\n  strexh r3,r4,[r2]\n  cmp    r3,#0\n  bne    %B1\n  pop    {r4,pc}\n}\n#else\n__STATIC_INLINE uint16_t atomic_inc16_lim (uint16_t *mem, uint16_t lim) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint16_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrexh %[ret],[%[mem]]\\n\\t\"\n    \"adds   %[val],%[ret],#1\\n\\t\"\n    \"cmp    %[lim],%[val]\\n\\t\"\n    \"bhi    2f\\n\\t\"\n    \"movs   %[val],#0\\n\"\n  \"2:\\n\\t\"\n    \"strexh %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp    %[res],#0\\n\\t\"\n    \"bne    1b\\n\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem),\n    [lim] \"l\"   (lim)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Decrement (32-bit)\n/// \\param[in]  mem             Memory address\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_dec32 (uint32_t *mem) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  subs  r1,r0,#1\n  strex r3,r1,[r2]\n  cmp   r3,#0\n  bne   %B1\n  bx    lr\n}\n#else\n__STATIC_INLINE uint32_t atomic_dec32 (uint32_t *mem) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"subs  %[val],%[ret],#1\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Decrement (32-bit) if Not Zero\n/// \\param[in]  mem             Memory address\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_dec32_nz (uint32_t *mem) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  cmp   r0,#0\n  bne   %F2\n  clrex\n  bx    lr\n2\n  subs  r1,r0,#1\n  strex r3,r1,[r2]\n  cmp   r3,#0\n  bne   %B1\n  bx    lr\n}\n#else\n__STATIC_INLINE uint32_t atomic_dec32_nz (uint32_t *mem) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"cmp   %[ret],#0\\n\\t\"\n    \"bne   2f\\n\"\n    \"clrex\\n\\t\"\n    \"b     3f\\n\"\n  \"2:\\n\\t\"\n    \"subs  %[val],%[ret],#1\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  \"3:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Decrement (16-bit) if Not Zero\n/// \\param[in]  mem             Memory address\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint16_t atomic_dec16_nz (uint16_t *mem) {\n  mov    r2,r0\n1\n  ldrexh r0,[r2]\n  cmp    r0,#0\n  bne    %F2\n  clrex\n  bx     lr\n2\n  subs   r1,r0,#1\n  strexh r3,r1,[r2]\n  cmp    r3,#0\n  bne    %B1\n  bx      lr\n}\n#else\n__STATIC_INLINE uint16_t atomic_dec16_nz (uint16_t *mem) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint16_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrexh %[ret],[%[mem]]\\n\\t\"\n    \"cmp    %[ret],#0\\n\\t\"\n    \"bne    2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"b      3f\\n\"\n  \"2:\\n\\t\"\n    \"subs   %[val],%[ret],#1\\n\\t\"\n    \"strexh %[res],%[val],[%[mem]]\\n\\t\"\n    \"cmp    %[res],#0\\n\\t\"\n    \"bne    1b\\n\"\n  \"3:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Link Get\n/// \\param[in]  root            Root address\n/// \\return                     Link\n#if defined(__CC_ARM)\nstatic __asm    void *atomic_link_get (void **root) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  cmp   r0,#0\n  bne   %F2\n  clrex\n  bx    lr\n2\n  ldr   r1,[r0]\n  strex r3,r1,[r2]\n  cmp   r3,#0\n  bne   %B1\n  bx    lr\n}\n#else\n__STATIC_INLINE void *atomic_link_get (void **root) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register void    *ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[root]]\\n\\t\"\n    \"cmp   %[ret],#0\\n\\t\"\n    \"bne   2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"b     3f\\n\"\n  \"2:\\n\\t\"\n    \"ldr   %[val],[%[ret]]\\n\\t\"\n    \"strex %[res],%[val],[%[root]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  \"3:\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [root] \"l\"   (root)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Link Put\n/// \\param[in]  root            Root address\n/// \\param[in]  lnk             Link\n#if defined(__CC_ARM)\nstatic __asm    void atomic_link_put (void **root, void *link) {\n1\n  ldr   r2,[r0]\n  str   r2,[r1]\n  dmb\n  ldrex r2,[r0]\n  ldr   r3,[r1]\n  cmp   r3,r2\n  bne   %B1\n  strex r3,r1,[r0]\n  cmp   r3,#0\n  bne   %B1\n  bx    lr\n}\n#else\n__STATIC_INLINE void atomic_link_put (void **root, void *link) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val1, val2, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldr   %[val1],[%[root]]\\n\\t\"\n    \"str   %[val1],[%[link]]\\n\\t\"\n    \"dmb\\n\\t\"\n    \"ldrex %[val1],[%[root]]\\n\\t\"\n    \"ldr   %[val2],[%[link]]\\n\\t\"\n    \"cmp   %[val2],%[val1]\\n\\t\"\n    \"bne   1b\\n\\t\"\n    \"strex %[res],%[link],[%[root]]\\n\\t\"\n    \"cmp   %[res],#0\\n\\t\"\n    \"bne   1b\\n\"\n  : [val1] \"=&l\" (val1),\n    [val2] \"=&l\" (val2),\n    [res]  \"=&l\" (res)\n  : [root] \"l\"   (root),\n    [link] \"l\"   (link)\n  : \"cc\", \"memory\"\n  );\n}\n#endif\n\n#endif  // (EXCLUSIVE_ACCESS == 1)\n\n\n#endif  // RTX_CORE_CA_H_\n"
  },
  {
    "path": "rtos/rtx5/rtx_core_cm.h",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Cortex-M Core definitions\n *\n * -----------------------------------------------------------------------------\n */\n\n#ifndef RTX_CORE_CM_H_\n#define RTX_CORE_CM_H_\n\n#ifndef RTX_CORE_C_H_\n#include \"RTE_Components.h\"\n#include CMSIS_device_header\n#endif\n\n#include \ntypedef bool bool_t;\n#define FALSE                   ((bool_t)0)\n#define TRUE                    ((bool_t)1)\n\n#ifdef  RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS\n#define DOMAIN_NS               1\n#endif\n\n#ifndef DOMAIN_NS\n#define DOMAIN_NS               0\n#endif\n\n#if    (DOMAIN_NS == 1)\n#if   ((!defined(__ARM_ARCH_8M_BASE__) || (__ARM_ARCH_8M_BASE__ == 0)) && \\\n       (!defined(__ARM_ARCH_8M_MAIN__) || (__ARM_ARCH_8M_MAIN__ == 0)))\n#error \"Non-secure domain requires ARMv8-M Architecture!\"\n#endif\n#endif\n\n#ifndef EXCLUSIVE_ACCESS\n#if    ((defined(__ARM_ARCH_7M__)      && (__ARM_ARCH_7M__      != 0)) || \\\n        (defined(__ARM_ARCH_7EM__)     && (__ARM_ARCH_7EM__     != 0)) || \\\n        (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0)) || \\\n        (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)))\n#define EXCLUSIVE_ACCESS        1\n#else\n#define EXCLUSIVE_ACCESS        0\n#endif\n#endif\n\n#define OS_TICK_HANDLER         SysTick_Handler\n\n/// xPSR_Initialization Value\n/// \\param[in]  privileged      true=privileged, false=unprivileged\n/// \\param[in]  thumb           true=Thumb, false=ARM\n/// \\return                     xPSR Init Value\n__STATIC_INLINE uint32_t xPSR_InitVal (bool_t privileged, bool_t thumb) {\n  (void)privileged;\n  (void)thumb;\n  return (0x01000000U);\n}\n\n// Stack Frame:\n//  - Extended: S16-S31, R4-R11, R0-R3, R12, LR, PC, xPSR, S0-S15, FPSCR\n//  - Basic:             R4-R11, R0-R3, R12, LR, PC, xPSR\n\n/// Stack Frame Initialization Value (EXC_RETURN[7..0])\n#if (DOMAIN_NS == 1)\n#define STACK_FRAME_INIT_VAL    0xBCU\n#else\n#define STACK_FRAME_INIT_VAL    0xFDU\n#endif\n\n/// Stack Offset of Register R0\n/// \\param[in]  stack_frame     Stack Frame (EXC_RETURN[7..0])\n/// \\return                     R0 Offset\n__STATIC_INLINE uint32_t StackOffsetR0 (uint8_t stack_frame) {\n#if (__FPU_USED == 1U)\n  return (((stack_frame & 0x10U) == 0U) ? ((16U+8U)*4U) : (8U*4U));\n#else\n  (void)stack_frame;\n  return (8U*4U);\n#endif\n}\n\n\n//  ==== Core functions ====\n\n//lint -sem(__get_CONTROL, pure)\n//lint -sem(__get_IPSR,    pure)\n//lint -sem(__get_PRIMASK, pure)\n//lint -sem(__get_BASEPRI, pure)\n\n/// Check if running Privileged\n/// \\return     true=privileged, false=unprivileged\n__STATIC_INLINE bool_t IsPrivileged (void) {\n  return ((__get_CONTROL() & 1U) == 0U);\n}\n\n/// Check if in IRQ Mode\n/// \\return     true=IRQ, false=thread\n__STATIC_INLINE bool_t IsIrqMode (void) {\n  return (__get_IPSR() != 0U);\n}\n\n/// Check if IRQ is Masked\n/// \\return     true=masked, false=not masked\n__STATIC_INLINE bool_t IsIrqMasked (void) {\n#if   ((defined(__ARM_ARCH_7M__)      && (__ARM_ARCH_7M__      != 0)) || \\\n       (defined(__ARM_ARCH_7EM__)     && (__ARM_ARCH_7EM__     != 0)) || \\\n       (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)))\n  return ((__get_PRIMASK() != 0U) || (__get_BASEPRI() != 0U));\n#else\n  return  (__get_PRIMASK() != 0U);\n#endif\n}\n\n\n//  ==== Core Peripherals functions ====\n\n/// Setup SVC and PendSV System Service Calls\n__STATIC_INLINE void SVC_Setup (void) {\n#if   ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)) || \\\n       (defined(__CORTEX_M)           && (__CORTEX_M == 7U)))\n  uint32_t p, n;\n\n  SCB->SHPR[10] = 0xFFU;\n  n = 32U - (uint32_t)__CLZ(~(SCB->SHPR[10] | 0xFFFFFF00U));\n  p = NVIC_GetPriorityGrouping();\n  if (p >= n) {\n    n = p + 1U;\n  }\n  SCB->SHPR[7] = (uint8_t)(0xFEU << n);\n#elif  (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n  uint32_t n;\n\n  SCB->SHPR[1] |= 0x00FF0000U;\n  n = SCB->SHPR[1];\n  SCB->SHPR[0] |= (n << (8+1)) & 0xFC000000U;\n#elif ((defined(__ARM_ARCH_7M__)      && (__ARM_ARCH_7M__      != 0)) || \\\n       (defined(__ARM_ARCH_7EM__)     && (__ARM_ARCH_7EM__     != 0)))\n  uint32_t p, n;\n\n  SCB->SHP[10] = 0xFFU;\n  n = 32U - (uint32_t)__CLZ(~(SCB->SHP[10] | 0xFFFFFF00U));\n  p = NVIC_GetPriorityGrouping();\n  if (p >= n) {\n    n = p + 1U;\n  }\n  SCB->SHP[7] = (uint8_t)(0xFEU << n);\n#elif  (defined(__ARM_ARCH_6M__)      && (__ARM_ARCH_6M__      != 0))\n  uint32_t n;\n\n  SCB->SHP[1] |= 0x00FF0000U;\n  n = SCB->SHP[1];\n  SCB->SHP[0] |= (n << (8+1)) & 0xFC000000U;\n#endif\n}\n\n/// Get Pending SV (Service Call) Flag\n/// \\return     Pending SV Flag\n__STATIC_INLINE uint8_t GetPendSV (void) {\n  return ((uint8_t)((SCB->ICSR & (SCB_ICSR_PENDSVSET_Msk)) >> 24));\n}\n\n/// Clear Pending SV (Service Call) Flag\n__STATIC_INLINE void ClrPendSV (void) {\n  SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk;\n}\n\n/// Set Pending SV (Service Call) Flag\n__STATIC_INLINE void SetPendSV (void) {\n  SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;\n}\n\n\n//  ==== Service Calls definitions ====\n\n//lint -save -e9023 -e9024 -e9026 \"Function-like macros using '#/##'\" [MISRA Note 10]\n\n#if defined(__CC_ARM)\n\n#if   ((defined(__ARM_ARCH_7M__)      && (__ARM_ARCH_7M__      != 0)) ||       \\\n       (defined(__ARM_ARCH_7EM__)     && (__ARM_ARCH_7EM__     != 0)) ||       \\\n       (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)))\n#define __SVC_INDIRECT(n) __svc_indirect(n)\n#elif ((defined(__ARM_ARCH_6M__)      && (__ARM_ARCH_6M__      != 0)) ||       \\\n       (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0)))\n#define __SVC_INDIRECT(n) __svc_indirect_r7(n)\n#endif\n\n#define SVC0_0N(f,t)                                                           \\\n__SVC_INDIRECT(0) t    svc##f (t(*)());                                        \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (void) {                                         \\\n  svc##f(svcRtx##f);                                                           \\\n}\n\n#define SVC0_0(f,t)                                                            \\\n__SVC_INDIRECT(0) t    svc##f (t(*)());                                        \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (void) {                                         \\\n  return svc##f(svcRtx##f);                                                    \\\n}\n\n#define SVC0_1N(f,t,t1)                                                        \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1),t1);                                   \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1) {                                        \\\n  svc##f(svcRtx##f,a1);                                                        \\\n}\n\n#define SVC0_1(f,t,t1)                                                         \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1),t1);                                   \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1) {                                        \\\n  return svc##f(svcRtx##f,a1);                                                 \\\n}\n\n#define SVC0_2(f,t,t1,t2)                                                      \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1,t2),t1,t2);                             \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2) {                                 \\\n  return svc##f(svcRtx##f,a1,a2);                                              \\\n}\n\n#define SVC0_3(f,t,t1,t2,t3)                                                   \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1,t2,t3),t1,t2,t3);                       \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2, t3 a3) {                          \\\n  return svc##f(svcRtx##f,a1,a2,a3);                                           \\\n}\n\n#define SVC0_4(f,t,t1,t2,t3,t4)                                                \\\n__SVC_INDIRECT(0) t    svc##f (t(*)(t1,t2,t3,t4),t1,t2,t3,t4);                 \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2, t3 a3, t4 a4) {                   \\\n  return svc##f(svcRtx##f,a1,a2,a3,a4);                                        \\\n}\n\n#elif defined(__ICCARM__)\n\n#if   ((defined(__ARM_ARCH_7M__)      && (__ARM_ARCH_7M__      != 0)) ||       \\\n       (defined(__ARM_ARCH_7EM__)     && (__ARM_ARCH_7EM__     != 0)) ||       \\\n       (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)))\n#define SVC_ArgF(f)                                                            \\\n  __asm(                                                                       \\\n    \"mov r12,%0\\n\"                                                             \\\n    :: \"r\"(&f): \"r12\"                                                          \\\n  );\n#elif ((defined(__ARM_ARCH_6M__)      && (__ARM_ARCH_6M__      != 0)) ||       \\\n       (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0)))\n#define SVC_ArgF(f)                                                            \\\n  __asm(                                                                       \\\n    \"mov r7,%0\\n\"                                                              \\\n    :: \"r\"(&f): \"r7\"                                                           \\\n  );\n#endif\n\n#define STRINGIFY(a) #a\n#define __SVC_INDIRECT(n) _Pragma(STRINGIFY(swi_number = n)) __swi\n\n#define SVC0_0N(f,t)                                                           \\\n__SVC_INDIRECT(0) t    svc##f ();                                              \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (void) {                                         \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  svc##f();                                                                    \\\n}\n\n#define SVC0_0(f,t)                                                            \\\n__SVC_INDIRECT(0) t    svc##f ();                                              \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (void) {                                         \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f();                                                             \\\n}\n\n#define SVC0_1N(f,t,t1)                                                        \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1);                                         \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1) {                                        \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  svc##f(a1);                                                                  \\\n}\n\n#define SVC0_1(f,t,t1)                                                         \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1);                                         \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1) {                                        \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f(a1);                                                           \\\n}\n\n#define SVC0_2(f,t,t1,t2)                                                      \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1, t2 a2);                                  \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2) {                                 \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f(a1,a2);                                                        \\\n}\n\n#define SVC0_3(f,t,t1,t2,t3)                                                   \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1, t2 a2, t3 a3);                           \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2, t3 a3) {                          \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f(a1,a2,a3);                                                     \\\n}\n\n#define SVC0_4(f,t,t1,t2,t3,t4)                                                \\\n__SVC_INDIRECT(0) t    svc##f (t1 a1, t2 a2, t3 a3, t4 a4);                    \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE   t  __svc##f (t1 a1, t2 a2, t3 a3, t4 a4) {                   \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  return svc##f(a1,a2,a3,a4);                                                  \\\n}\n\n#else   // !(defined(__CC_ARM) || defined(__ICCARM__))\n\n//lint -esym(522,__svc*) \"Functions '__svc*' are impure (side-effects)\"\n\n#if   ((defined(__ARM_ARCH_7M__)      && (__ARM_ARCH_7M__      != 0)) ||       \\\n       (defined(__ARM_ARCH_7EM__)     && (__ARM_ARCH_7EM__     != 0)) ||       \\\n       (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)))\n#define SVC_RegF \"r12\"\n#elif ((defined(__ARM_ARCH_6M__)      && (__ARM_ARCH_6M__      != 0)) ||       \\\n       (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0)))\n#define SVC_RegF \"r7\"\n#endif\n\n#define SVC_ArgN(n) \\\nregister uint32_t __r##n __ASM(\"r\"#n)\n\n#define SVC_ArgR(n,a) \\\nregister uint32_t __r##n __ASM(\"r\"#n) = (uint32_t)a\n\n#define SVC_ArgF(f) \\\nregister uint32_t __rf   __ASM(SVC_RegF) = (uint32_t)f\n\n#define SVC_In0 \"r\"(__rf)\n#define SVC_In1 \"r\"(__rf),\"r\"(__r0)\n#define SVC_In2 \"r\"(__rf),\"r\"(__r0),\"r\"(__r1)\n#define SVC_In3 \"r\"(__rf),\"r\"(__r0),\"r\"(__r1),\"r\"(__r2)\n#define SVC_In4 \"r\"(__rf),\"r\"(__r0),\"r\"(__r1),\"r\"(__r2),\"r\"(__r3)\n\n#define SVC_Out0\n#define SVC_Out1 \"=r\"(__r0)\n\n#define SVC_CL0\n#define SVC_CL1 \"r1\"\n#define SVC_CL2 \"r0\",\"r1\"\n\n#define SVC_Call0(in, out, cl)                                                 \\\n  __ASM volatile (\"svc 0\" : out : in : cl)\n\n#define SVC0_0N(f,t)                                                           \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (void) {                                            \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In0, SVC_Out0, SVC_CL2);                                       \\\n}\n\n#define SVC0_0(f,t)                                                            \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (void) {                                            \\\n  SVC_ArgN(0);                                                                 \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In0, SVC_Out1, SVC_CL1);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#define SVC0_1N(f,t,t1)                                                        \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1) {                                           \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In1, SVC_Out0, SVC_CL1);                                       \\\n}\n\n#define SVC0_1(f,t,t1)                                                         \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1) {                                           \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In1, SVC_Out1, SVC_CL1);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#define SVC0_2(f,t,t1,t2)                                                      \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1, t2 a2) {                                    \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgR(1,a2);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In2, SVC_Out1, SVC_CL0);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#define SVC0_3(f,t,t1,t2,t3)                                                   \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1, t2 a2, t3 a3) {                             \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgR(1,a2);                                                              \\\n  SVC_ArgR(2,a3);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In3, SVC_Out1, SVC_CL0);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#define SVC0_4(f,t,t1,t2,t3,t4)                                                \\\n__attribute__((always_inline))                                                 \\\n__STATIC_INLINE t __svc##f (t1 a1, t2 a2, t3 a3, t4 a4) {                      \\\n  SVC_ArgR(0,a1);                                                              \\\n  SVC_ArgR(1,a2);                                                              \\\n  SVC_ArgR(2,a3);                                                              \\\n  SVC_ArgR(3,a4);                                                              \\\n  SVC_ArgF(svcRtx##f);                                                         \\\n  SVC_Call0(SVC_In4, SVC_Out1, SVC_CL0);                                       \\\n  return (t) __r0;                                                             \\\n}\n\n#endif\n\n//lint -restore [MISRA Note 10]\n\n\n//  ==== Exclusive Access Operation ====\n\n#if (EXCLUSIVE_ACCESS == 1)\n\n//lint ++flb \"Library Begin\" [MISRA Note 12]\n\n/// Atomic Access Operation: Write (8-bit)\n/// \\param[in]  mem             Memory address\n/// \\param[in]  val             Value to write\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint8_t atomic_wr8 (uint8_t *mem, uint8_t val) {\n  mov    r2,r0\n1\n  ldrexb r0,[r2]\n  strexb r3,r1,[r2]\n  cbz    r3,%F2\n  b      %B1\n2\n  bx     lr\n}\n#else\n__STATIC_INLINE uint8_t atomic_wr8 (uint8_t *mem, uint8_t val) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint8_t  ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrexb %[ret],[%[mem]]\\n\\t\"\n    \"strexb %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz    %[res],2f\\n\\t\"\n    \"b       1b\\n\"\n  \"2:\"\n  : [ret] \"=&l\" (ret),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem),\n    [val] \"l\"   (val)\n  : \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Set bits (32-bit)\n/// \\param[in]  mem             Memory address\n/// \\param[in]  bits            Bit mask\n/// \\return                     New value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_set32 (uint32_t *mem, uint32_t bits) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  orr   r0,r0,r1\n  strex r3,r0,[r2]\n  cbz   r3,%F2\n  b     %B1\n2\n  bx     lr\n}\n#else\n__STATIC_INLINE uint32_t atomic_set32 (uint32_t *mem, uint32_t bits) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[val],[%[mem]]\\n\\t\"\n#if (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n    \"mov   %[ret],%[val]\\n\\t\"\n    \"orrs  %[ret],%[bits]\\n\\t\"\n#else\n    \"orr   %[ret],%[val],%[bits]\\n\\t\"\n#endif\n    \"strex %[res],%[ret],[%[mem]]\\n\\t\"\n    \"cbz   %[res],2f\\n\\t\"\n    \"b     1b\\n\"\n  \"2:\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [mem]  \"l\"   (mem),\n    [bits] \"l\"   (bits)\n#if (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n  : \"memory\", \"cc\"\n#else\n  : \"memory\"\n#endif\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Clear bits (32-bit)\n/// \\param[in]  mem             Memory address\n/// \\param[in]  bits            Bit mask\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_clr32 (uint32_t *mem, uint32_t bits) {\n  push  {r4,lr}\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  bic   r4,r0,r1\n  strex r3,r4,[r2]\n  cbz   r3,%F2\n  b     %B1\n2\n  pop   {r4,pc}\n}\n#else\n__STATIC_INLINE uint32_t atomic_clr32 (uint32_t *mem, uint32_t bits) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n#if (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n    \"mov   %[val],%[ret]\\n\\t\"\n    \"bics  %[val],%[bits]\\n\\t\"\n#else\n    \"bic   %[val],%[ret],%[bits]\\n\\t\"\n#endif\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz   %[res],2f\\n\\t\"\n    \"b     1b\\n\"\n  \"2:\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [mem]  \"l\"   (mem),\n    [bits] \"l\"   (bits)\n#if (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n  : \"memory\", \"cc\"\n#else\n  : \"memory\"\n#endif\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Check if all specified bits (32-bit) are active and clear them\n/// \\param[in]  mem             Memory address\n/// \\param[in]  bits            Bit mask\n/// \\return                     Active bits before clearing or 0 if not active\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_chk32_all (uint32_t *mem, uint32_t bits) {\n  push  {r4,lr}\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  and   r4,r0,r1\n  cmp   r4,r1\n  beq   %F2\n  clrex\n  movs  r0,#0\n  pop   {r4,pc}\n2\n  bic   r4,r0,r1\n  strex r3,r4,[r2]\n  cbz   r3,%F3\n  b     %B1\n3\n  pop   {r4,pc}\n}\n#else\n__STATIC_INLINE uint32_t atomic_chk32_all (uint32_t *mem, uint32_t bits) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n#if (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n    \"mov   %[val],%[ret]\\n\\t\"\n    \"ands  %[val],%[bits]\\n\\t\"\n#else\n    \"and   %[val],%[ret],%[bits]\\n\\t\"\n#endif\n    \"cmp   %[val],%[bits]\\n\\t\"\n    \"beq   2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"movs  %[ret],#0\\n\\t\"\n    \"b     3f\\n\"\n  \"2:\\n\\t\"\n#if (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n    \"mov   %[val],%[ret]\\n\\t\"\n    \"bics  %[val],%[bits]\\n\\t\"\n#else\n    \"bic   %[val],%[ret],%[bits]\\n\\t\"\n#endif\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz   %[res],3f\\n\\t\"\n    \"b     1b\\n\"\n  \"3:\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [mem]  \"l\"   (mem),\n    [bits] \"l\"   (bits)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Check if any specified bits (32-bit) are active and clear them\n/// \\param[in]  mem             Memory address\n/// \\param[in]  bits            Bit mask\n/// \\return                     Active bits before clearing or 0 if not active\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_chk32_any (uint32_t *mem, uint32_t bits) {\n  push  {r4,lr}\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  tst   r0,r1\n  bne   %F2\n  clrex\n  movs  r0,#0\n  pop   {r4,pc}\n2\n  bic   r4,r0,r1\n  strex r3,r4,[r2]\n  cbz   r3,%F3\n  b     %B1\n3\n  pop   {r4,pc}\n}\n#else\n__STATIC_INLINE uint32_t atomic_chk32_any (uint32_t *mem, uint32_t bits) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"tst   %[ret],%[bits]\\n\\t\"\n    \"bne   2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"movs  %[ret],#0\\n\\t\"\n    \"b     3f\\n\"\n  \"2:\\n\\t\"\n#if (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))\n    \"mov   %[val],%[ret]\\n\\t\"\n    \"bics  %[val],%[bits]\\n\\t\"\n#else\n    \"bic   %[val],%[ret],%[bits]\\n\\t\"\n#endif\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz   %[res],3f\\n\\t\"\n    \"b     1b\\n\"\n  \"3:\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [mem]  \"l\"   (mem),\n    [bits] \"l\"   (bits)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Increment (32-bit)\n/// \\param[in]  mem             Memory address\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_inc32 (uint32_t *mem) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  adds  r1,r0,#1\n  strex r3,r1,[r2]\n  cbz   r3,%F2\n  b     %B1\n2\n  bx     lr\n}\n#else\n__STATIC_INLINE uint32_t atomic_inc32 (uint32_t *mem) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"adds  %[val],%[ret],#1\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz   %[res],2f\\n\\t\"\n    \"b     1b\\n\"\n  \"2:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Increment (16-bit) if Less Than\n/// \\param[in]  mem             Memory address\n/// \\param[in]  max             Maximum value\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint16_t atomic_inc16_lt (uint16_t *mem, uint16_t max) {\n  push   {r4,lr}\n  mov    r2,r0\n1\n  ldrexh r0,[r2]\n  cmp    r1,r0\n  bhi    %F2\n  clrex\n  pop    {r4,pc}\n2\n  adds   r4,r0,#1\n  strexh r3,r4,[r2]\n  cbz    r3,%F3\n  b      %B1\n3\n  pop    {r4,pc}\n}\n#else\n__STATIC_INLINE uint16_t atomic_inc16_lt (uint16_t *mem, uint16_t max) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint16_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrexh %[ret],[%[mem]]\\n\\t\"\n    \"cmp    %[max],%[ret]\\n\\t\"\n    \"bhi    2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"b      3f\\n\"\n  \"2:\\n\\t\"\n    \"adds   %[val],%[ret],#1\\n\\t\"\n    \"strexh %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz    %[res],3f\\n\\t\"\n    \"b      1b\\n\"\n  \"3:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem),\n    [max] \"l\"   (max)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Increment (16-bit) and clear on Limit\n/// \\param[in]  mem             Memory address\n/// \\param[in]  max             Maximum value\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint16_t atomic_inc16_lim (uint16_t *mem, uint16_t lim) {\n  push   {r4,lr}\n  mov    r2,r0\n1\n  ldrexh r0,[r2]\n  adds   r4,r0,#1\n  cmp    r1,r4\n  bhi    %F2\n  movs   r4,#0\n2\n  strexh r3,r4,[r2]\n  cbz    r3,%F3\n  b      %B1\n3\n  pop    {r4,pc}\n}\n#else\n__STATIC_INLINE uint16_t atomic_inc16_lim (uint16_t *mem, uint16_t lim) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint16_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrexh %[ret],[%[mem]]\\n\\t\"\n    \"adds   %[val],%[ret],#1\\n\\t\"\n    \"cmp    %[lim],%[val]\\n\\t\"\n    \"bhi    2f\\n\\t\"\n    \"movs   %[val],#0\\n\"\n  \"2:\\n\\t\"\n    \"strexh %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz    %[res],3f\\n\\t\"\n    \"b      1b\\n\"\n  \"3:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem),\n    [lim] \"l\"   (lim)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Decrement (32-bit)\n/// \\param[in]  mem             Memory address\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_dec32 (uint32_t *mem) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  subs  r1,r0,#1\n  strex r3,r1,[r2]\n  cbz   r3,%F2\n  b     %B1\n2\n  bx     lr\n}\n#else\n__STATIC_INLINE uint32_t atomic_dec32 (uint32_t *mem) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"subs  %[val],%[ret],#1\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz   %[res],2f\\n\\t\"\n    \"b     1b\\n\"\n  \"2:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Decrement (32-bit) if Not Zero\n/// \\param[in]  mem             Memory address\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint32_t atomic_dec32_nz (uint32_t *mem) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  cbnz  r0,%F2\n  clrex\n  bx    lr\n2\n  subs  r1,r0,#1\n  strex r3,r1,[r2]\n  cbz   r3,%F3\n  b     %B1\n3\n  bx     lr\n}\n#else\n__STATIC_INLINE uint32_t atomic_dec32_nz (uint32_t *mem) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint32_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[mem]]\\n\\t\"\n    \"cbnz  %[ret],2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"b     3f\\n\"\n  \"2:\\n\\t\"\n    \"subs  %[val],%[ret],#1\\n\\t\"\n    \"strex %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz   %[res],3f\\n\\t\"\n    \"b     1b\\n\"\n  \"3:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Decrement (16-bit) if Not Zero\n/// \\param[in]  mem             Memory address\n/// \\return                     Previous value\n#if defined(__CC_ARM)\nstatic __asm    uint16_t atomic_dec16_nz (uint16_t *mem) {\n  mov    r2,r0\n1\n  ldrexh r0,[r2]\n  cbnz   r0,%F2\n  clrex\n  bx     lr\n2\n  subs   r1,r0,#1\n  strexh r3,r1,[r2]\n  cbz    r3,%F3\n  b      %B1\n3\n  bx      lr\n}\n#else\n__STATIC_INLINE uint16_t atomic_dec16_nz (uint16_t *mem) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register uint16_t ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrexh %[ret],[%[mem]]\\n\\t\"\n    \"cbnz   %[ret],2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"b      3f\\n\"\n  \"2:\\n\\t\"\n    \"subs   %[val],%[ret],#1\\n\\t\"\n    \"strexh %[res],%[val],[%[mem]]\\n\\t\"\n    \"cbz    %[res],3f\\n\\t\"\n    \"b      1b\\n\"\n  \"3:\"\n  : [ret] \"=&l\" (ret),\n    [val] \"=&l\" (val),\n    [res] \"=&l\" (res)\n  : [mem] \"l\"   (mem)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Link Get\n/// \\param[in]  root            Root address\n/// \\return                     Link\n#if defined(__CC_ARM)\nstatic __asm    void *atomic_link_get (void **root) {\n  mov   r2,r0\n1\n  ldrex r0,[r2]\n  cbnz  r0,%F2\n  clrex\n  bx    lr\n2\n  ldr   r1,[r0]\n  strex r3,r1,[r2]\n  cbz   r3,%F3\n  b     %B1\n3\n  bx     lr\n}\n#else\n__STATIC_INLINE void *atomic_link_get (void **root) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n  register void    *ret;\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldrex %[ret],[%[root]]\\n\\t\"\n    \"cbnz  %[ret],2f\\n\\t\"\n    \"clrex\\n\\t\"\n    \"b     3f\\n\"\n  \"2:\\n\\t\"\n    \"ldr   %[val],[%[ret]]\\n\\t\"\n    \"strex %[res],%[val],[%[root]]\\n\\t\"\n    \"cbz   %[res],3f\\n\\t\"\n    \"b     1b\\n\"\n  \"3:\"\n  : [ret]  \"=&l\" (ret),\n    [val]  \"=&l\" (val),\n    [res]  \"=&l\" (res)\n  : [root] \"l\"   (root)\n  : \"cc\", \"memory\"\n  );\n\n  return ret;\n}\n#endif\n\n/// Atomic Access Operation: Link Put\n/// \\param[in]  root            Root address\n/// \\param[in]  lnk             Link\n#if defined(__CC_ARM)\nstatic __asm    void atomic_link_put (void **root, void *link) {\n1\n  ldr   r2,[r0]\n  str   r2,[r1]\n  dmb\n  ldrex r2,[r0]\n  ldr   r3,[r1]\n  cmp   r3,r2\n  bne   %B1\n  strex r3,r1,[r0]\n  cbz   r3,%F2\n  b     %B1\n2\n  bx    lr\n}\n#else\n__STATIC_INLINE void atomic_link_put (void **root, void *link) {\n#ifdef  __ICCARM__\n#pragma diag_suppress=Pe550\n#endif\n  register uint32_t val1, val2, res;\n#ifdef  __ICCARM__\n#pragma diag_default=Pe550\n#endif\n\n  __ASM volatile (\n#ifndef __ICCARM__\n  \".syntax unified\\n\\t\"\n#endif\n  \"1:\\n\\t\"\n    \"ldr   %[val1],[%[root]]\\n\\t\"\n    \"str   %[val1],[%[link]]\\n\\t\"\n    \"dmb\\n\\t\"\n    \"ldrex %[val1],[%[root]]\\n\\t\"\n    \"ldr   %[val2],[%[link]]\\n\\t\"\n    \"cmp   %[val2],%[val1]\\n\\t\"\n    \"bne   1b\\n\\t\"\n    \"strex %[res],%[link],[%[root]]\\n\\t\"\n    \"cbz   %[res],2f\\n\\t\"\n    \"b     1b\\n\"\n  \"2:\"\n  : [val1] \"=&l\" (val1),\n    [val2] \"=&l\" (val2),\n    [res]  \"=&l\" (res)\n  : [root] \"l\"   (root),\n    [link] \"l\"   (link)\n  : \"cc\", \"memory\"\n  );\n}\n#endif\n\n//lint --flb \"Library End\" [MISRA Note 12]\n\n#endif  // (EXCLUSIVE_ACCESS == 1)\n\n\n#endif  // RTX_CORE_CM_H_\n"
  },
  {
    "path": "rtos/rtx5/rtx_delay.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Delay functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  ==== Service Calls ====\n\n/// Wait for Timeout (Time Delay).\n/// \\note API identical to osDelay\nstatic osStatus_t svcRtxDelay(uint32_t ticks) {\n\n  if (ticks != 0U) {\n    if (osRtxThreadWaitEnter(osRtxThreadWaitingDelay, ticks)) {\n      EvrRtxDelayStarted(ticks);\n    } else {\n      EvrRtxDelayCompleted(osRtxThreadGetRunning());\n    }\n  }\n\n  return osOK;\n}\n\n/// Wait until specified time.\n/// \\note API identical to osDelayUntil\nstatic osStatus_t svcRtxDelayUntil(uint32_t ticks) {\n\n  ticks -= osRtxInfo.kernel.tick;\n  if ((ticks == 0U) || (ticks > 0x7FFFFFFFU)) {\n    EvrRtxDelayError((int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  if (osRtxThreadWaitEnter(osRtxThreadWaitingDelay, ticks)) {\n    EvrRtxDelayUntilStarted(ticks);\n  } else {\n    EvrRtxDelayCompleted(osRtxThreadGetRunning());\n  }\n\n  return osOK;\n}\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_1(Delay, osStatus_t, uint32_t)\nSVC0_1(DelayUntil, osStatus_t, uint32_t)\n// lint --flb \"Library End\"\n\n//  ==== Public API ====\n\n/// Wait for Timeout (Time Delay).\nosStatus_t osDelay(uint32_t ticks) {\n  osStatus_t status;\n\n  EvrRtxDelay(ticks);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxDelayError((int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcDelay(ticks);\n  }\n  return status;\n}\n\n/// Wait until specified time.\nosStatus_t osDelayUntil(uint32_t ticks) {\n  osStatus_t status;\n\n  EvrRtxDelayUntil(ticks);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxDelayError((int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcDelayUntil(ticks);\n  }\n  return status;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_evflags.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Event Flags functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  OS Runtime Object Memory Usage\n#if ((defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0)))\nosRtxObjectMemUsage_t osRtxEventFlagsMemUsage\n    __attribute__((section(\".data.os.evflags.obj\"))) = {0U, 0U, 0U};\n#endif\n\n//  ==== Helper functions ====\n\n/// Set Event Flags.\n/// \\param[in]  ef              event flags object.\n/// \\param[in]  flags           specifies the flags to set.\n/// \\return event flags after setting.\nstatic uint32_t EventFlagsSet(os_event_flags_t *ef, uint32_t flags) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  uint32_t event_flags;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  ef->event_flags |= flags;\n  event_flags = ef->event_flags;\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  event_flags = atomic_set32(&ef->event_flags, flags);\n#endif\n\n  return event_flags;\n}\n\n/// Clear Event Flags.\n/// \\param[in]  ef              event flags object.\n/// \\param[in]  flags           specifies the flags to clear.\n/// \\return event flags before clearing.\nstatic uint32_t EventFlagsClear(os_event_flags_t *ef, uint32_t flags) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  uint32_t event_flags;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  event_flags = ef->event_flags;\n  ef->event_flags &= ~flags;\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  event_flags = atomic_clr32(&ef->event_flags, flags);\n#endif\n\n  return event_flags;\n}\n\n/// Check Event Flags.\n/// \\param[in]  ef              event flags object.\n/// \\param[in]  flags           specifies the flags to check.\n/// \\param[in]  options         specifies flags options (osFlagsXxxx).\n/// \\return event flags before clearing or 0 if specified flags have not been\n/// set.\nstatic uint32_t EventFlagsCheck(os_event_flags_t *ef, uint32_t flags,\n                                uint32_t options) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask;\n#endif\n  uint32_t event_flags;\n\n  if ((options & osFlagsNoClear) == 0U) {\n#if (EXCLUSIVE_ACCESS == 0)\n    primask = __get_PRIMASK();\n    __disable_irq();\n\n    event_flags = ef->event_flags;\n    if ((((options & osFlagsWaitAll) != 0U) &&\n         ((event_flags & flags) != flags)) ||\n        (((options & osFlagsWaitAll) == 0U) && ((event_flags & flags) == 0U))) {\n      event_flags = 0U;\n    } else {\n      ef->event_flags &= ~flags;\n    }\n\n    if (primask == 0U) {\n      __enable_irq();\n    }\n#else\n    if ((options & osFlagsWaitAll) != 0U) {\n      event_flags = atomic_chk32_all(&ef->event_flags, flags);\n    } else {\n      event_flags = atomic_chk32_any(&ef->event_flags, flags);\n    }\n#endif\n  } else {\n    event_flags = ef->event_flags;\n    if ((((options & osFlagsWaitAll) != 0U) &&\n         ((event_flags & flags) != flags)) ||\n        (((options & osFlagsWaitAll) == 0U) && ((event_flags & flags) == 0U))) {\n      event_flags = 0U;\n    }\n  }\n\n  return event_flags;\n}\n\n//  ==== Post ISR processing ====\n\n/// Event Flags post ISR processing.\n/// \\param[in]  ef              event flags object.\nstatic void osRtxEventFlagsPostProcess(os_event_flags_t *ef) {\n  os_thread_t *thread;\n  os_thread_t *thread_next;\n  uint32_t event_flags;\n\n  // Check if Threads are waiting for Event Flags\n  thread = ef->thread_list;\n  while (thread != NULL) {\n    thread_next = thread->thread_next;\n    event_flags =\n        EventFlagsCheck(ef, thread->wait_flags, thread->flags_options);\n    if (event_flags != 0U) {\n      osRtxThreadListRemove(thread);\n      osRtxThreadWaitExit(thread, event_flags, FALSE);\n      EvrRtxEventFlagsWaitCompleted(ef, thread->wait_flags,\n                                    thread->flags_options, event_flags);\n    }\n    thread = thread_next;\n  }\n}\n\n//  ==== Service Calls ====\n\n/// Create and Initialize an Event Flags object.\n/// \\note API identical to osEventFlagsNew\nstatic osEventFlagsId_t svcRtxEventFlagsNew(const osEventFlagsAttr_t *attr) {\n  os_event_flags_t *ef;\n  uint8_t flags;\n  const char *name;\n\n  // Process attributes\n  if (attr != NULL) {\n    name = attr->name;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    ef = attr->cb_mem;\n    if (ef != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)ef & 3U) != 0U) ||\n          (attr->cb_size < sizeof(os_event_flags_t))) {\n        EvrRtxEventFlagsError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (attr->cb_size != 0U) {\n        EvrRtxEventFlagsError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n  } else {\n    name = NULL;\n    ef = NULL;\n  }\n\n  // Allocate object memory if not provided\n  if (ef == NULL) {\n    if (osRtxInfo.mpi.event_flags != NULL) {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      ef = osRtxMemoryPoolAlloc(osRtxInfo.mpi.event_flags);\n    } else {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      ef = osRtxMemoryAlloc(osRtxInfo.mem.common, sizeof(os_event_flags_t), 1U);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    if (ef != NULL) {\n      uint32_t used;\n      osRtxEventFlagsMemUsage.cnt_alloc++;\n      used =\n          osRtxEventFlagsMemUsage.cnt_alloc - osRtxEventFlagsMemUsage.cnt_free;\n      if (osRtxEventFlagsMemUsage.max_used < used) {\n        osRtxEventFlagsMemUsage.max_used = used;\n      }\n    }\n#endif\n    flags = osRtxFlagSystemObject;\n  } else {\n    flags = 0U;\n  }\n\n  if (ef != NULL) {\n    // Initialize control block\n    ef->id = osRtxIdEventFlags;\n    ef->flags = flags;\n    ef->name = name;\n    ef->thread_list = NULL;\n    ef->event_flags = 0U;\n\n    // Register post ISR processing function\n    osRtxInfo.post_process.event_flags = osRtxEventFlagsPostProcess;\n\n    EvrRtxEventFlagsCreated(ef, ef->name);\n  } else {\n    EvrRtxEventFlagsError(NULL, (int32_t)osErrorNoMemory);\n  }\n\n  return ef;\n}\n\n/// Get name of an Event Flags object.\n/// \\note API identical to osEventFlagsGetName\nstatic const char *svcRtxEventFlagsGetName(osEventFlagsId_t ef_id) {\n  os_event_flags_t *ef = osRtxEventFlagsId(ef_id);\n\n  // Check parameters\n  if ((ef == NULL) || (ef->id != osRtxIdEventFlags)) {\n    EvrRtxEventFlagsGetName(ef, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  EvrRtxEventFlagsGetName(ef, ef->name);\n\n  return ef->name;\n}\n\n/// Set the specified Event Flags.\n/// \\note API identical to osEventFlagsSet\nstatic uint32_t svcRtxEventFlagsSet(osEventFlagsId_t ef_id, uint32_t flags) {\n  os_event_flags_t *ef = osRtxEventFlagsId(ef_id);\n  os_thread_t *thread;\n  os_thread_t *thread_next;\n  uint32_t event_flags;\n  uint32_t event_flags0;\n\n  // Check parameters\n  if ((ef == NULL) || (ef->id != osRtxIdEventFlags) ||\n      ((flags & ~(((uint32_t)1U << osRtxEventFlagsLimit) - 1U)) != 0U)) {\n    EvrRtxEventFlagsError(ef, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Set Event Flags\n  event_flags = EventFlagsSet(ef, flags);\n\n  // Check if Threads are waiting for Event Flags\n  thread = ef->thread_list;\n  while (thread != NULL) {\n    thread_next = thread->thread_next;\n    event_flags0 =\n        EventFlagsCheck(ef, thread->wait_flags, thread->flags_options);\n    if (event_flags0 != 0U) {\n      if ((thread->flags_options & osFlagsNoClear) == 0U) {\n        event_flags = event_flags0 & ~thread->wait_flags;\n      } else {\n        event_flags = event_flags0;\n      }\n      osRtxThreadListRemove(thread);\n      osRtxThreadWaitExit(thread, event_flags0, FALSE);\n      EvrRtxEventFlagsWaitCompleted(ef, thread->wait_flags,\n                                    thread->flags_options, event_flags0);\n    }\n    thread = thread_next;\n  }\n  osRtxThreadDispatch(NULL);\n\n  EvrRtxEventFlagsSetDone(ef, event_flags);\n\n  return event_flags;\n}\n\n/// Clear the specified Event Flags.\n/// \\note API identical to osEventFlagsClear\nstatic uint32_t svcRtxEventFlagsClear(osEventFlagsId_t ef_id, uint32_t flags) {\n  os_event_flags_t *ef = osRtxEventFlagsId(ef_id);\n  uint32_t event_flags;\n\n  // Check parameters\n  if ((ef == NULL) || (ef->id != osRtxIdEventFlags) ||\n      ((flags & ~(((uint32_t)1U << osRtxEventFlagsLimit) - 1U)) != 0U)) {\n    EvrRtxEventFlagsError(ef, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Clear Event Flags\n  event_flags = EventFlagsClear(ef, flags);\n\n  EvrRtxEventFlagsClearDone(ef, event_flags);\n\n  return event_flags;\n}\n\n/// Get the current Event Flags.\n/// \\note API identical to osEventFlagsGet\nstatic uint32_t svcRtxEventFlagsGet(osEventFlagsId_t ef_id) {\n  os_event_flags_t *ef = osRtxEventFlagsId(ef_id);\n\n  // Check parameters\n  if ((ef == NULL) || (ef->id != osRtxIdEventFlags)) {\n    EvrRtxEventFlagsGet(ef, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxEventFlagsGet(ef, ef->event_flags);\n\n  return ef->event_flags;\n}\n\n/// Wait for one or more Event Flags to become signaled.\n/// \\note API identical to osEventFlagsWait\nstatic uint32_t svcRtxEventFlagsWait(osEventFlagsId_t ef_id, uint32_t flags,\n                                     uint32_t options, uint32_t timeout) {\n  os_event_flags_t *ef = osRtxEventFlagsId(ef_id);\n  os_thread_t *thread;\n  uint32_t event_flags;\n\n  // Check parameters\n  if ((ef == NULL) || (ef->id != osRtxIdEventFlags) ||\n      ((flags & ~(((uint32_t)1U << osRtxEventFlagsLimit) - 1U)) != 0U)) {\n    EvrRtxEventFlagsError(ef, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Check Event Flags\n  event_flags = EventFlagsCheck(ef, flags, options);\n  if (event_flags != 0U) {\n    EvrRtxEventFlagsWaitCompleted(ef, flags, options, event_flags);\n  } else {\n    // Check if timeout is specified\n    if (timeout != 0U) {\n      EvrRtxEventFlagsWaitPending(ef, flags, options, timeout);\n      // Suspend current Thread\n      if (osRtxThreadWaitEnter(osRtxThreadWaitingEventFlags, timeout)) {\n        thread = osRtxThreadGetRunning();\n        osRtxThreadListPut(osRtxObject(ef), thread);\n        // Store waiting flags and options\n        thread->wait_flags = flags;\n        thread->flags_options = (uint8_t)options;\n      } else {\n        EvrRtxEventFlagsWaitTimeout(ef);\n      }\n      event_flags = (uint32_t)osErrorTimeout;\n    } else {\n      EvrRtxEventFlagsWaitNotCompleted(ef, flags, options);\n      event_flags = (uint32_t)osErrorResource;\n    }\n  }\n\n  return event_flags;\n}\n\n/// Delete an Event Flags object.\n/// \\note API identical to osEventFlagsDelete\nstatic osStatus_t svcRtxEventFlagsDelete(osEventFlagsId_t ef_id) {\n  os_event_flags_t *ef = osRtxEventFlagsId(ef_id);\n  os_thread_t *thread;\n\n  // Check parameters\n  if ((ef == NULL) || (ef->id != osRtxIdEventFlags)) {\n    EvrRtxEventFlagsError(ef, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Unblock waiting threads\n  if (ef->thread_list != NULL) {\n    do {\n      thread = osRtxThreadListGet(osRtxObject(ef));\n      osRtxThreadWaitExit(thread, (uint32_t)osErrorResource, FALSE);\n    } while (ef->thread_list != NULL);\n    osRtxThreadDispatch(NULL);\n  }\n\n  // Mark object as invalid\n  ef->id = osRtxIdInvalid;\n\n  // Free object memory\n  if ((ef->flags & osRtxFlagSystemObject) != 0U) {\n    if (osRtxInfo.mpi.event_flags != NULL) {\n      (void)osRtxMemoryPoolFree(osRtxInfo.mpi.event_flags, ef);\n    } else {\n      (void)osRtxMemoryFree(osRtxInfo.mem.common, ef);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    osRtxEventFlagsMemUsage.cnt_free++;\n#endif\n  }\n\n  EvrRtxEventFlagsDestroyed(ef);\n\n  return osOK;\n}\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_1(EventFlagsNew, osEventFlagsId_t, const osEventFlagsAttr_t *)\nSVC0_1(EventFlagsGetName, const char *, osEventFlagsId_t)\nSVC0_2(EventFlagsSet, uint32_t, osEventFlagsId_t, uint32_t)\nSVC0_2(EventFlagsClear, uint32_t, osEventFlagsId_t, uint32_t)\nSVC0_1(EventFlagsGet, uint32_t, osEventFlagsId_t)\nSVC0_4(EventFlagsWait, uint32_t, osEventFlagsId_t, uint32_t, uint32_t, uint32_t)\nSVC0_1(EventFlagsDelete, osStatus_t, osEventFlagsId_t)\n// lint --flb \"Library End\"\n\n//  ==== ISR Calls ====\n\n/// Set the specified Event Flags.\n/// \\note API identical to osEventFlagsSet\n__STATIC_INLINE\nuint32_t isrRtxEventFlagsSet(osEventFlagsId_t ef_id, uint32_t flags) {\n  os_event_flags_t *ef = osRtxEventFlagsId(ef_id);\n  uint32_t event_flags;\n\n  // Check parameters\n  if ((ef == NULL) || (ef->id != osRtxIdEventFlags) ||\n      ((flags & ~(((uint32_t)1U << osRtxEventFlagsLimit) - 1U)) != 0U)) {\n    EvrRtxEventFlagsError(ef, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Set Event Flags\n  event_flags = EventFlagsSet(ef, flags);\n\n  // Register post ISR processing\n  osRtxPostProcess(osRtxObject(ef));\n\n  EvrRtxEventFlagsSetDone(ef, event_flags);\n\n  return event_flags;\n}\n\n/// Wait for one or more Event Flags to become signaled.\n/// \\note API identical to osEventFlagsWait\n__STATIC_INLINE\nuint32_t isrRtxEventFlagsWait(osEventFlagsId_t ef_id, uint32_t flags,\n                              uint32_t options, uint32_t timeout) {\n  os_event_flags_t *ef = osRtxEventFlagsId(ef_id);\n  uint32_t event_flags;\n\n  // Check parameters\n  if ((ef == NULL) || (ef->id != osRtxIdEventFlags) || (timeout != 0U) ||\n      ((flags & ~(((uint32_t)1U << osRtxEventFlagsLimit) - 1U)) != 0U)) {\n    EvrRtxEventFlagsError(ef, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Check Event Flags\n  event_flags = EventFlagsCheck(ef, flags, options);\n  if (event_flags != 0U) {\n    EvrRtxEventFlagsWaitCompleted(ef, flags, options, event_flags);\n  } else {\n    EvrRtxEventFlagsWaitNotCompleted(ef, flags, options);\n    event_flags = (uint32_t)osErrorResource;\n  }\n\n  return event_flags;\n}\n\n//  ==== Public API ====\n\n/// Create and Initialize an Event Flags object.\nosEventFlagsId_t osEventFlagsNew(const osEventFlagsAttr_t *attr) {\n  osEventFlagsId_t ef_id;\n\n  EvrRtxEventFlagsNew(attr);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxEventFlagsError(NULL, (int32_t)osErrorISR);\n    ef_id = NULL;\n  } else {\n    ef_id = __svcEventFlagsNew(attr);\n  }\n  return ef_id;\n}\n\n/// Get name of an Event Flags object.\nconst char *osEventFlagsGetName(osEventFlagsId_t ef_id) {\n  const char *name;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxEventFlagsGetName(ef_id, NULL);\n    name = NULL;\n  } else {\n    name = __svcEventFlagsGetName(ef_id);\n  }\n  return name;\n}\n\n/// Set the specified Event Flags.\nuint32_t osEventFlagsSet(osEventFlagsId_t ef_id, uint32_t flags) {\n  uint32_t event_flags;\n\n  EvrRtxEventFlagsSet(ef_id, flags);\n  if (IsIrqMode() || IsIrqMasked()) {\n    event_flags = isrRtxEventFlagsSet(ef_id, flags);\n  } else {\n    event_flags = __svcEventFlagsSet(ef_id, flags);\n  }\n  return event_flags;\n}\n\n/// Clear the specified Event Flags.\nuint32_t osEventFlagsClear(osEventFlagsId_t ef_id, uint32_t flags) {\n  uint32_t event_flags;\n\n  EvrRtxEventFlagsClear(ef_id, flags);\n  if (IsIrqMode() || IsIrqMasked()) {\n    event_flags = svcRtxEventFlagsClear(ef_id, flags);\n  } else {\n    event_flags = __svcEventFlagsClear(ef_id, flags);\n  }\n  return event_flags;\n}\n\n/// Get the current Event Flags.\nuint32_t osEventFlagsGet(osEventFlagsId_t ef_id) {\n  uint32_t event_flags;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    event_flags = svcRtxEventFlagsGet(ef_id);\n  } else {\n    event_flags = __svcEventFlagsGet(ef_id);\n  }\n  return event_flags;\n}\n\n/// Wait for one or more Event Flags to become signaled.\nuint32_t osEventFlagsWait(osEventFlagsId_t ef_id, uint32_t flags,\n                          uint32_t options, uint32_t timeout) {\n  uint32_t event_flags;\n\n  EvrRtxEventFlagsWait(ef_id, flags, options, timeout);\n  if (IsIrqMode() || IsIrqMasked()) {\n    event_flags = isrRtxEventFlagsWait(ef_id, flags, options, timeout);\n  } else {\n    event_flags = __svcEventFlagsWait(ef_id, flags, options, timeout);\n  }\n  return event_flags;\n}\n\n/// Delete an Event Flags object.\nosStatus_t osEventFlagsDelete(osEventFlagsId_t ef_id) {\n  osStatus_t status;\n\n  EvrRtxEventFlagsDelete(ef_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxEventFlagsError(ef_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcEventFlagsDelete(ef_id);\n  }\n  return status;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_evr.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       RTX Event Recorder\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_evr.h\" // RTX Event Recorder definitions\n#include \"cmsis_compiler.h\"\n#include \"hal_trace.h\"\n#include \"rtx_lib.h\"\n#include \n\n#ifdef RTE_Compiler_EventRecorder\n\n// lint -e923 -e9074 -e9078 [MISRA Note 13]\n\n/// Event IDs for \"RTX Memory Management\"\n#define EvtRtxMemoryInit EventID(EventLevelOp, EvtRtxMemoryNo, 0x00U)\n#define EvtRtxMemoryAlloc EventID(EventLevelOp, EvtRtxMemoryNo, 0x01U)\n#define EvtRtxMemoryFree EventID(EventLevelOp, EvtRtxMemoryNo, 0x02U)\n#define EvtRtxMemoryBlockInit EventID(EventLevelOp, EvtRtxMemoryNo, 0x03U)\n#define EvtRtxMemoryBlockAlloc EventID(EventLevelOp, EvtRtxMemoryNo, 0x04U)\n#define EvtRtxMemoryBlockFree EventID(EventLevelOp, EvtRtxMemoryNo, 0x05U)\n\n/// Event IDs for \"RTX Kernel\"\n#define EvtRtxKernelError EventID(EventLevelError, EvtRtxKernelNo, 0x00U)\n#define EvtRtxKernelInitialize EventID(EventLevelAPI, EvtRtxKernelNo, 0x01U)\n#define EvtRtxKernelInitialized EventID(EventLevelOp, EvtRtxKernelNo, 0x02U)\n#define EvtRtxKernelGetInfo EventID(EventLevelAPI, EvtRtxKernelNo, 0x03U)\n#define EvtRtxKernelInfoRetrieved EventID(EventLevelOp, EvtRtxKernelNo, 0x04U)\n#define EvtRtxKernelInfoRetrieved_Detail                                       \\\n  EventID(EventLevelDetail, EvtRtxKernelNo, 0x05U)\n#define EvtRtxKernelGetState EventID(EventLevelAPI, EvtRtxKernelNo, 0x06U)\n#define EvtRtxKernelStart EventID(EventLevelAPI, EvtRtxKernelNo, 0x07U)\n#define EvtRtxKernelStarted EventID(EventLevelOp, EvtRtxKernelNo, 0x08U)\n#define EvtRtxKernelLock EventID(EventLevelAPI, EvtRtxKernelNo, 0x09U)\n#define EvtRtxKernelLocked EventID(EventLevelOp, EvtRtxKernelNo, 0x0AU)\n#define EvtRtxKernelUnlock EventID(EventLevelAPI, EvtRtxKernelNo, 0x0BU)\n#define EvtRtxKernelUnlocked EventID(EventLevelOp, EvtRtxKernelNo, 0x0CU)\n#define EvtRtxKernelRestoreLock EventID(EventLevelAPI, EvtRtxKernelNo, 0x0DU)\n#define EvtRtxKernelLockRestored EventID(EventLevelOp, EvtRtxKernelNo, 0x0EU)\n#define EvtRtxKernelSuspend EventID(EventLevelAPI, EvtRtxKernelNo, 0x0FU)\n#define EvtRtxKernelSuspended EventID(EventLevelOp, EvtRtxKernelNo, 0x10U)\n#define EvtRtxKernelResume EventID(EventLevelAPI, EvtRtxKernelNo, 0x11U)\n#define EvtRtxKernelResumed EventID(EventLevelOp, EvtRtxKernelNo, 0x12U)\n#define EvtRtxKernelGetTickCount EventID(EventLevelAPI, EvtRtxKernelNo, 0x13U)\n#define EvtRtxKernelGetTickFreq EventID(EventLevelAPI, EvtRtxKernelNo, 0x14U)\n#define EvtRtxKernelGetSysTimerCount                                           \\\n  EventID(EventLevelAPI, EvtRtxKernelNo, 0x15U)\n#define EvtRtxKernelGetSysTimerFreq                                            \\\n  EventID(EventLevelAPI, EvtRtxKernelNo, 0x16U)\n\n/// Event IDs for \"RTX Thread\"\n#define EvtRtxThreadError EventID(EventLevelError, EvtRtxThreadNo, 0x00U)\n#define EvtRtxThreadNew EventID(EventLevelAPI, EvtRtxThreadNo, 0x01U)\n#define EvtRtxThreadCreated_Addr EventID(EventLevelOp, EvtRtxThreadNo, 0x03U)\n#define EvtRtxThreadCreated_Name EventID(EventLevelOp, EvtRtxThreadNo, 0x2CU)\n#define EvtRtxThreadGetName EventID(EventLevelAPI, EvtRtxThreadNo, 0x04U)\n#define EvtRtxThreadGetId EventID(EventLevelAPI, EvtRtxThreadNo, 0x06U)\n#define EvtRtxThreadGetState EventID(EventLevelAPI, EvtRtxThreadNo, 0x07U)\n#define EvtRtxThreadGetStackSize EventID(EventLevelAPI, EvtRtxThreadNo, 0x08U)\n#define EvtRtxThreadGetStackSpace EventID(EventLevelAPI, EvtRtxThreadNo, 0x09U)\n#define EvtRtxThreadSetPriority EventID(EventLevelAPI, EvtRtxThreadNo, 0x0AU)\n#define EvtRtxThreadPriorityUpdated EventID(EventLevelOp, EvtRtxThreadNo, 0x2DU)\n#define EvtRtxThreadGetPriority EventID(EventLevelAPI, EvtRtxThreadNo, 0x0BU)\n#define EvtRtxThreadYield EventID(EventLevelAPI, EvtRtxThreadNo, 0x0CU)\n#define EvtRtxThreadSuspend EventID(EventLevelAPI, EvtRtxThreadNo, 0x0DU)\n#define EvtRtxThreadSuspended EventID(EventLevelOp, EvtRtxThreadNo, 0x0EU)\n#define EvtRtxThreadResume EventID(EventLevelAPI, EvtRtxThreadNo, 0x0FU)\n#define EvtRtxThreadResumed EventID(EventLevelOp, EvtRtxThreadNo, 0x10U)\n#define EvtRtxThreadDetach EventID(EventLevelAPI, EvtRtxThreadNo, 0x11U)\n#define EvtRtxThreadDetached EventID(EventLevelOp, EvtRtxThreadNo, 0x12U)\n#define EvtRtxThreadJoin EventID(EventLevelAPI, EvtRtxThreadNo, 0x13U)\n#define EvtRtxThreadJoinPending EventID(EventLevelOp, EvtRtxThreadNo, 0x14U)\n#define EvtRtxThreadJoined EventID(EventLevelOp, EvtRtxThreadNo, 0x15U)\n#define EvtRtxThreadBlocked EventID(EventLevelDetail, EvtRtxThreadNo, 0x16U)\n#define EvtRtxThreadUnblocked EventID(EventLevelDetail, EvtRtxThreadNo, 0x17U)\n#define EvtRtxThreadPreempted EventID(EventLevelDetail, EvtRtxThreadNo, 0x18U)\n#define EvtRtxThreadSwitched EventID(EventLevelOp, EvtRtxThreadNo, 0x19U)\n#define EvtRtxThreadExit EventID(EventLevelAPI, EvtRtxThreadNo, 0x1AU)\n#define EvtRtxThreadTerminate EventID(EventLevelAPI, EvtRtxThreadNo, 0x1BU)\n#define EvtRtxThreadDestroyed EventID(EventLevelOp, EvtRtxThreadNo, 0x1CU)\n#define EvtRtxThreadGetCount EventID(EventLevelAPI, EvtRtxThreadNo, 0x1DU)\n#define EvtRtxThreadEnumerate EventID(EventLevelAPI, EvtRtxThreadNo, 0x1EU)\n\n/// Event IDs for \"RTX Thread Flags\"\n#define EvtRtxThreadFlagsError                                                 \\\n  EventID(EventLevelError, EvtRtxThreadFlagsNo, 0x00U)\n#define EvtRtxThreadFlagsSet EventID(EventLevelAPI, EvtRtxThreadFlagsNo, 0x01U)\n#define EvtRtxThreadFlagsSetDone                                               \\\n  EventID(EventLevelOp, EvtRtxThreadFlagsNo, 0x02U)\n#define EvtRtxThreadFlagsClear                                                 \\\n  EventID(EventLevelAPI, EvtRtxThreadFlagsNo, 0x03U)\n#define EvtRtxThreadFlagsClearDone                                             \\\n  EventID(EventLevelOp, EvtRtxThreadFlagsNo, 0x04U)\n#define EvtRtxThreadFlagsGet EventID(EventLevelAPI, EvtRtxThreadFlagsNo, 0x05U)\n#define EvtRtxThreadFlagsWait EventID(EventLevelAPI, EvtRtxThreadFlagsNo, 0x06U)\n#define EvtRtxThreadFlagsWaitPending                                           \\\n  EventID(EventLevelOp, EvtRtxThreadFlagsNo, 0x07U)\n#define EvtRtxThreadFlagsWaitTimeout                                           \\\n  EventID(EventLevelOp, EvtRtxThreadFlagsNo, 0x08U)\n#define EvtRtxThreadFlagsWaitCompleted                                         \\\n  EventID(EventLevelOp, EvtRtxThreadFlagsNo, 0x09U)\n#define EvtRtxThreadFlagsWaitNotCompleted                                      \\\n  EventID(EventLevelOp, EvtRtxThreadFlagsNo, 0x0AU)\n\n/// Event IDs for \"RTX Generic Wait\"\n#define EvtRtxDelayError EventID(EventLevelError, EvtRtxWaitNo, 0x00U)\n#define EvtRtxDelay EventID(EventLevelAPI, EvtRtxWaitNo, 0x01U)\n#define EvtRtxDelayUntil EventID(EventLevelAPI, EvtRtxWaitNo, 0x02U)\n#define EvtRtxDelayStarted EventID(EventLevelOp, EvtRtxWaitNo, 0x03U)\n#define EvtRtxDelayUntilStarted EventID(EventLevelOp, EvtRtxWaitNo, 0x04U)\n#define EvtRtxDelayCompleted EventID(EventLevelOp, EvtRtxWaitNo, 0x05U)\n\n/// Event IDs for \"RTX Timer\"\n#define EvtRtxTimerError EventID(EventLevelError, EvtRtxTimerNo, 0x00U)\n#define EvtRtxTimerCallback EventID(EventLevelOp, EvtRtxTimerNo, 0x01U)\n#define EvtRtxTimerNew EventID(EventLevelAPI, EvtRtxTimerNo, 0x02U)\n#define EvtRtxTimerCreated EventID(EventLevelOp, EvtRtxTimerNo, 0x04U)\n#define EvtRtxTimerGetName EventID(EventLevelAPI, EvtRtxTimerNo, 0x05U)\n#define EvtRtxTimerStart EventID(EventLevelAPI, EvtRtxTimerNo, 0x07U)\n#define EvtRtxTimerStarted EventID(EventLevelOp, EvtRtxTimerNo, 0x08U)\n#define EvtRtxTimerStop EventID(EventLevelAPI, EvtRtxTimerNo, 0x09U)\n#define EvtRtxTimerStopped EventID(EventLevelOp, EvtRtxTimerNo, 0x0AU)\n#define EvtRtxTimerIsRunning EventID(EventLevelAPI, EvtRtxTimerNo, 0x0BU)\n#define EvtRtxTimerDelete EventID(EventLevelAPI, EvtRtxTimerNo, 0x0CU)\n#define EvtRtxTimerDestroyed EventID(EventLevelOp, EvtRtxTimerNo, 0x0DU)\n\n/// Event IDs for \"RTX Event Flags\"\n#define EvtRtxEventFlagsError                                                  \\\n  EventID(EventLevelError, EvtRtxEventFlagsNo, 0x00U)\n#define EvtRtxEventFlagsNew EventID(EventLevelAPI, EvtRtxEventFlagsNo, 0x01U)\n#define EvtRtxEventFlagsCreated EventID(EventLevelOp, EvtRtxEventFlagsNo, 0x03U)\n#define EvtRtxEventFlagsGetName                                                \\\n  EventID(EventLevelAPI, EvtRtxEventFlagsNo, 0x04U)\n#define EvtRtxEventFlagsSet EventID(EventLevelAPI, EvtRtxEventFlagsNo, 0x06U)\n#define EvtRtxEventFlagsSetDone EventID(EventLevelOp, EvtRtxEventFlagsNo, 0x07U)\n#define EvtRtxEventFlagsClear EventID(EventLevelAPI, EvtRtxEventFlagsNo, 0x08U)\n#define EvtRtxEventFlagsClearDone                                              \\\n  EventID(EventLevelOp, EvtRtxEventFlagsNo, 0x09U)\n#define EvtRtxEventFlagsGet EventID(EventLevelAPI, EvtRtxEventFlagsNo, 0x0AU)\n#define EvtRtxEventFlagsWait EventID(EventLevelAPI, EvtRtxEventFlagsNo, 0x0BU)\n#define EvtRtxEventFlagsWaitPending                                            \\\n  EventID(EventLevelOp, EvtRtxEventFlagsNo, 0x0CU)\n#define EvtRtxEventFlagsWaitTimeout                                            \\\n  EventID(EventLevelOp, EvtRtxEventFlagsNo, 0x0DU)\n#define EvtRtxEventFlagsWaitCompleted                                          \\\n  EventID(EventLevelOp, EvtRtxEventFlagsNo, 0x0EU)\n#define EvtRtxEventFlagsWaitNotCompleted                                       \\\n  EventID(EventLevelOp, EvtRtxEventFlagsNo, 0x0FU)\n#define EvtRtxEventFlagsDelete EventID(EventLevelAPI, EvtRtxEventFlagsNo, 0x10U)\n#define EvtRtxEventFlagsDestroyed                                              \\\n  EventID(EventLevelOp, EvtRtxEventFlagsNo, 0x11U)\n\n/// Event IDs for \"RTX Mutex\"\n#define EvtRtxMutexError EventID(EventLevelError, EvtRtxMutexNo, 0x00U)\n#define EvtRtxMutexNew EventID(EventLevelAPI, EvtRtxMutexNo, 0x01U)\n#define EvtRtxMutexCreated EventID(EventLevelOp, EvtRtxMutexNo, 0x03U)\n#define EvtRtxMutexGetName EventID(EventLevelAPI, EvtRtxMutexNo, 0x04U)\n#define EvtRtxMutexAcquire EventID(EventLevelAPI, EvtRtxMutexNo, 0x06U)\n#define EvtRtxMutexAcquirePending EventID(EventLevelOp, EvtRtxMutexNo, 0x07U)\n#define EvtRtxMutexAcquireTimeout EventID(EventLevelOp, EvtRtxMutexNo, 0x08U)\n#define EvtRtxMutexAcquired EventID(EventLevelOp, EvtRtxMutexNo, 0x09U)\n#define EvtRtxMutexNotAcquired EventID(EventLevelOp, EvtRtxMutexNo, 0x0AU)\n#define EvtRtxMutexRelease EventID(EventLevelAPI, EvtRtxMutexNo, 0x0BU)\n#define EvtRtxMutexReleased EventID(EventLevelOp, EvtRtxMutexNo, 0x0CU)\n#define EvtRtxMutexGetOwner EventID(EventLevelAPI, EvtRtxMutexNo, 0x0DU)\n#define EvtRtxMutexDelete EventID(EventLevelAPI, EvtRtxMutexNo, 0x0EU)\n#define EvtRtxMutexDestroyed EventID(EventLevelOp, EvtRtxMutexNo, 0x0FU)\n\n/// Event IDs for \"RTX Semaphore\"\n#define EvtRtxSemaphoreError EventID(EventLevelError, EvtRtxSemaphoreNo, 0x00U)\n#define EvtRtxSemaphoreNew EventID(EventLevelAPI, EvtRtxSemaphoreNo, 0x01U)\n#define EvtRtxSemaphoreCreated EventID(EventLevelOp, EvtRtxSemaphoreNo, 0x03U)\n#define EvtRtxSemaphoreGetName EventID(EventLevelAPI, EvtRtxSemaphoreNo, 0x04U)\n#define EvtRtxSemaphoreAcquire EventID(EventLevelAPI, EvtRtxSemaphoreNo, 0x06U)\n#define EvtRtxSemaphoreAcquirePending                                          \\\n  EventID(EventLevelOp, EvtRtxSemaphoreNo, 0x07U)\n#define EvtRtxSemaphoreAcquireTimeout                                          \\\n  EventID(EventLevelOp, EvtRtxSemaphoreNo, 0x08U)\n#define EvtRtxSemaphoreAcquired EventID(EventLevelOp, EvtRtxSemaphoreNo, 0x09U)\n#define EvtRtxSemaphoreNotAcquired                                             \\\n  EventID(EventLevelOp, EvtRtxSemaphoreNo, 0x0AU)\n#define EvtRtxSemaphoreRelease EventID(EventLevelAPI, EvtRtxSemaphoreNo, 0x0BU)\n#define EvtRtxSemaphoreReleased EventID(EventLevelOp, EvtRtxSemaphoreNo, 0x0CU)\n#define EvtRtxSemaphoreGetCount EventID(EventLevelAPI, EvtRtxSemaphoreNo, 0x0DU)\n#define EvtRtxSemaphoreDelete EventID(EventLevelAPI, EvtRtxSemaphoreNo, 0x0EU)\n#define EvtRtxSemaphoreDestroyed EventID(EventLevelOp, EvtRtxSemaphoreNo, 0x0FU)\n\n/// Event IDs for \"RTX Memory Pool\"\n#define EvtRtxMemoryPoolError                                                  \\\n  EventID(EventLevelError, EvtRtxMemoryPoolNo, 0x00U)\n#define EvtRtxMemoryPoolNew EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x01U)\n#define EvtRtxMemoryPoolCreated EventID(EventLevelOp, EvtRtxMemoryPoolNo, 0x03U)\n#define EvtRtxMemoryPoolGetName                                                \\\n  EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x04U)\n#define EvtRtxMemoryPoolAlloc EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x06U)\n#define EvtRtxMemoryPoolAllocPending                                           \\\n  EventID(EventLevelOp, EvtRtxMemoryPoolNo, 0x07U)\n#define EvtRtxMemoryPoolAllocTimeout                                           \\\n  EventID(EventLevelOp, EvtRtxMemoryPoolNo, 0x08U)\n#define EvtRtxMemoryPoolAllocated                                              \\\n  EventID(EventLevelOp, EvtRtxMemoryPoolNo, 0x09U)\n#define EvtRtxMemoryPoolAllocFailed                                            \\\n  EventID(EventLevelOp, EvtRtxMemoryPoolNo, 0x0AU)\n#define EvtRtxMemoryPoolFree EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x0BU)\n#define EvtRtxMemoryPoolDeallocated                                            \\\n  EventID(EventLevelOp, EvtRtxMemoryPoolNo, 0x0CU)\n#define EvtRtxMemoryPoolFreeFailed                                             \\\n  EventID(EventLevelOp, EvtRtxMemoryPoolNo, 0x0DU)\n#define EvtRtxMemoryPoolGetCapacity                                            \\\n  EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x0EU)\n#define EvtRtxMemoryPoolGetBlockSize                                           \\\n  EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x0FU)\n#define EvtRtxMemoryPoolGetCount                                               \\\n  EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x10U)\n#define EvtRtxMemoryPoolGetSpace                                               \\\n  EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x11U)\n#define EvtRtxMemoryPoolDelete EventID(EventLevelAPI, EvtRtxMemoryPoolNo, 0x12U)\n#define EvtRtxMemoryPoolDestroyed                                              \\\n  EventID(EventLevelOp, EvtRtxMemoryPoolNo, 0x13U)\n\n/// Event IDs for \"RTX Message Queue\"\n#define EvtRtxMessageQueueError                                                \\\n  EventID(EventLevelError, EvtRtxMessageQueueNo, 0x00U)\n#define EvtRtxMessageQueueNew                                                  \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x01U)\n#define EvtRtxMessageQueueCreated                                              \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x03U)\n#define EvtRtxMessageQueueGetName                                              \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x04U)\n#define EvtRtxMessageQueuePut                                                  \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x06U)\n#define EvtRtxMessageQueuePutPending                                           \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x07U)\n#define EvtRtxMessageQueuePutTimeout                                           \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x08U)\n#define EvtRtxMessageQueueInsertPending                                        \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x09U)\n#define EvtRtxMessageQueueInserted                                             \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x0AU)\n#define EvtRtxMessageQueueNotInserted                                          \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x0BU)\n#define EvtRtxMessageQueueGet                                                  \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x0CU)\n#define EvtRtxMessageQueueGetPending                                           \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x0DU)\n#define EvtRtxMessageQueueGetTimeout                                           \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x0EU)\n#define EvtRtxMessageQueueRetrieved                                            \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x0FU)\n#define EvtRtxMessageQueueNotRetrieved                                         \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x10U)\n#define EvtRtxMessageQueueGetCapacity                                          \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x11U)\n#define EvtRtxMessageQueueGetMsgSize                                           \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x12U)\n#define EvtRtxMessageQueueGetCount                                             \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x13U)\n#define EvtRtxMessageQueueGetSpace                                             \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x14U)\n#define EvtRtxMessageQueueReset                                                \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x15U)\n#define EvtRtxMessageQueueResetDone                                            \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x16U)\n#define EvtRtxMessageQueueDelete                                               \\\n  EventID(EventLevelAPI, EvtRtxMessageQueueNo, 0x17U)\n#define EvtRtxMessageQueueDestroyed                                            \\\n  EventID(EventLevelOp, EvtRtxMessageQueueNo, 0x18U)\n\n#endif // RTE_Compiler_EventRecorder\n\n// lint -esym(522, EvrRtx*) \"Functions 'EvrRtx*' can be overridden (do not lack\n// side-effects)\"\n\n//  ==== Memory Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) &&                      \\\n     !defined(EVR_RTX_MEMORY_INIT_DISABLE))\n__WEAK void EvrRtxMemoryInit(void *mem, uint32_t size, uint32_t result) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMemoryInit, (uint32_t)mem, size, result, 0U);\n#else\n  (void)mem;\n  (void)size;\n  (void)result;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) &&                      \\\n     !defined(EVR_RTX_MEMORY_ALLOC_DISABLE))\n__WEAK void EvrRtxMemoryAlloc(void *mem, uint32_t size, uint32_t type,\n                              void *block) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMemoryAlloc, (uint32_t)mem, size, type,\n                     (uint32_t)block);\n#else\n  (void)mem;\n  (void)size;\n  (void)type;\n  (void)block;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) &&                      \\\n     !defined(EVR_RTX_MEMORY_FREE_DISABLE))\n__WEAK void EvrRtxMemoryFree(void *mem, void *block, uint32_t result) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMemoryFree, (uint32_t)mem, (uint32_t)block, result,\n                     0U);\n#else\n  (void)mem;\n  (void)block;\n  (void)result;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) &&                      \\\n     !defined(EVR_RTX_MEMORY_BLOCK_INIT_DISABLE))\n__WEAK void EvrRtxMemoryBlockInit(osRtxMpInfo_t *mp_info, uint32_t block_count,\n                                  uint32_t block_size, void *block_mem) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMemoryBlockInit, (uint32_t)mp_info, block_count,\n                     block_size, (uint32_t)block_mem);\n#else\n  (void)mp_info;\n  (void)block_count;\n  (void)block_size;\n  (void)block_mem;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) &&                      \\\n     !defined(EVR_RTX_MEMORY_BLOCK_ALLOC_DISABLE))\n__WEAK void EvrRtxMemoryBlockAlloc(osRtxMpInfo_t *mp_info, void *block) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryBlockAlloc, (uint32_t)mp_info,\n                     (uint32_t)block);\n#else\n  (void)mp_info;\n  (void)block;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMORY != 0) &&                      \\\n     !defined(EVR_RTX_MEMORY_BLOCK_FREE_DISABLE))\n__WEAK void EvrRtxMemoryBlockFree(osRtxMpInfo_t *mp_info, void *block,\n                                  int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMemoryBlockFree, (uint32_t)mp_info, (uint32_t)block,\n                     (uint32_t)status, 0U);\n#else\n  (void)mp_info;\n  (void)block;\n  (void)status;\n#endif\n}\n#endif\n\n//  ==== Kernel Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_ERROR_DISABLE))\n__WEAK void EvrRtxKernelError(int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelError, (uint32_t)status, 0U);\n#else\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_INITIALIZE_DISABLE))\n__WEAK void EvrRtxKernelInitialize(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelInitialize, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_INITIALIZED_DISABLE))\n__WEAK void EvrRtxKernelInitialized(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelInitialized, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_GET_INFO_DISABLE))\n__WEAK void EvrRtxKernelGetInfo(osVersion_t *version, char *id_buf,\n                                uint32_t id_size) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxKernelGetInfo, (uint32_t)version, (uint32_t)id_buf,\n                     id_size, 0U);\n#else\n  (void)version;\n  (void)id_buf;\n  (void)id_size;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_INFO_RETRIEVED_DISABLE))\n__WEAK void EvrRtxKernelInfoRetrieved(const osVersion_t *version,\n                                      const char *id_buf, uint32_t id_size) {\n#if defined(RTE_Compiler_EventRecorder)\n  if (version != NULL) {\n    (void)EventRecord2(EvtRtxKernelInfoRetrieved, version->api,\n                       version->kernel);\n  }\n  if (id_buf != NULL) {\n    (void)EventRecordData(EvtRtxKernelInfoRetrieved_Detail, id_buf, id_size);\n  }\n#else\n  (void)version;\n  (void)id_buf;\n  (void)id_size;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_GET_STATE_DISABLE))\n__WEAK void EvrRtxKernelGetState(osKernelState_t state) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelGetState, (uint32_t)state, 0U);\n#else\n  (void)state;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_START_DISABLE))\n__WEAK void EvrRtxKernelStart(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelStart, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_STARTED_DISABLE))\n__WEAK void EvrRtxKernelStarted(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelStarted, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_LOCK_DISABLE))\n__WEAK void EvrRtxKernelLock(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelLock, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_LOCKED_DISABLE))\n__WEAK void EvrRtxKernelLocked(int32_t lock) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelLocked, (uint32_t)lock, 0U);\n#else\n  (void)lock;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_UNLOCK_DISABLE))\n__WEAK void EvrRtxKernelUnlock(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelUnlock, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_UNLOCKED_DISABLE))\n__WEAK void EvrRtxKernelUnlocked(int32_t lock) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelUnlocked, (uint32_t)lock, 0U);\n#else\n  (void)lock;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_RESTORE_LOCK_DISABLE))\n__WEAK void EvrRtxKernelRestoreLock(int32_t lock) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelRestoreLock, (uint32_t)lock, 0U);\n#else\n  (void)lock;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_LOCK_RESTORED_DISABLE))\n__WEAK void EvrRtxKernelLockRestored(int32_t lock) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelLockRestored, (uint32_t)lock, 0U);\n#else\n  (void)lock;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_SUSPEND_DISABLE))\n__WEAK void EvrRtxKernelSuspend(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelSuspend, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_SUSPENDED_DISABLE))\n__WEAK void EvrRtxKernelSuspended(uint32_t sleep_ticks) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelSuspended, sleep_ticks, 0U);\n#else\n  (void)sleep_ticks;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_RESUME_DISABLE))\n__WEAK void EvrRtxKernelResume(uint32_t sleep_ticks) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelResume, sleep_ticks, 0U);\n#else\n  (void)sleep_ticks;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_RESUMED_DISABLE))\n__WEAK void EvrRtxKernelResumed(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelResumed, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_GET_TICK_COUNT_DISABLE))\n__WEAK void EvrRtxKernelGetTickCount(uint32_t count) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelGetTickCount, count, 0U);\n#else\n  (void)count;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_GET_TICK_FREQ_DISABLE))\n__WEAK void EvrRtxKernelGetTickFreq(uint32_t freq) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelGetTickFreq, freq, 0U);\n#else\n  (void)freq;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_GET_SYS_TIMER_COUNT_DISABLE))\n__WEAK void EvrRtxKernelGetSysTimerCount(uint32_t count) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelGetSysTimerCount, count, 0U);\n#else\n  (void)count;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) &&                      \\\n     !defined(EVR_RTX_KERNEL_GET_SYS_TIMER_FREQ_DISABLE))\n__WEAK void EvrRtxKernelGetSysTimerFreq(uint32_t freq) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxKernelGetSysTimerFreq, freq, 0U);\n#else\n  (void)freq;\n#endif\n}\n#endif\n\n//  ==== Thread Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_ERROR_DISABLE))\n__WEAK void EvrRtxThreadError(osThreadId_t thread_id, int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadError, (uint32_t)thread_id, (uint32_t)status);\n#else\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  TRACE(2, \"EvrRtxThreadError, thread name:%s, status:%d\",\n        thread ? thread->name : \"NULL\", status);\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_NEW_DISABLE))\n__WEAK void EvrRtxThreadNew(osThreadFunc_t func, void *argument,\n                            const osThreadAttr_t *attr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxThreadNew, (uint32_t)func, (uint32_t)argument,\n                     (uint32_t)attr, 0U);\n#else\n  (void)func;\n  (void)argument;\n  (void)attr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_CREATED_DISABLE))\n__WEAK void EvrRtxThreadCreated(osThreadId_t thread_id, uint32_t thread_addr,\n                                const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  if (name != NULL) {\n    (void)EventRecord2(EvtRtxThreadCreated_Name, (uint32_t)thread_id,\n                       (uint32_t)name);\n  } else {\n    (void)EventRecord2(EvtRtxThreadCreated_Addr, (uint32_t)thread_id,\n                       thread_addr);\n  }\n#else\n  (void)thread_id;\n  (void)thread_addr;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_GET_NAME_DISABLE))\n__WEAK void EvrRtxThreadGetName(osThreadId_t thread_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadGetName, (uint32_t)thread_id, (uint32_t)name);\n#else\n  (void)thread_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_GET_ID_DISABLE))\n__WEAK void EvrRtxThreadGetId(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadGetId, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_GET_STATE_DISABLE))\n__WEAK void EvrRtxThreadGetState(osThreadId_t thread_id,\n                                 osThreadState_t state) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadGetState, (uint32_t)thread_id,\n                     (uint32_t)state);\n#else\n  (void)thread_id;\n  (void)state;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_GET_STACK_SIZE_DISABLE))\n__WEAK void EvrRtxThreadGetStackSize(osThreadId_t thread_id,\n                                     uint32_t stack_size) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadGetStackSize, (uint32_t)thread_id, stack_size);\n#else\n  (void)thread_id;\n  (void)stack_size;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_GET_STACK_SPACE_DISABLE))\n__WEAK void EvrRtxThreadGetStackSpace(osThreadId_t thread_id,\n                                      uint32_t stack_space) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadGetStackSpace, (uint32_t)thread_id,\n                     stack_space);\n#else\n  (void)thread_id;\n  (void)stack_space;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_SET_PRIORITY_DISABLE))\n__WEAK void EvrRtxThreadSetPriority(osThreadId_t thread_id,\n                                    osPriority_t priority) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadSetPriority, (uint32_t)thread_id,\n                     (uint32_t)priority);\n#else\n  (void)thread_id;\n  (void)priority;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_PRIORITY_UPDATED_DISABLE))\n__WEAK void EvrRtxThreadPriorityUpdated(osThreadId_t thread_id,\n                                        osPriority_t priority) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadPriorityUpdated, (uint32_t)thread_id,\n                     (uint32_t)priority);\n#else\n  (void)thread_id;\n  (void)priority;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_GET_PRIORITY_DISABLE))\n__WEAK void EvrRtxThreadGetPriority(osThreadId_t thread_id,\n                                    osPriority_t priority) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadGetPriority, (uint32_t)thread_id,\n                     (uint32_t)priority);\n#else\n  (void)thread_id;\n  (void)priority;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_YIELD_DISABLE))\n__WEAK void EvrRtxThreadYield(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadYield, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_SUSPEND_DISABLE))\n__WEAK void EvrRtxThreadSuspend(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadSuspend, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_SUSPENDED_DISABLE))\n__WEAK void EvrRtxThreadSuspended(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadSuspended, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_RESUME_DISABLE))\n__WEAK void EvrRtxThreadResume(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadResume, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_RESUMED_DISABLE))\n__WEAK void EvrRtxThreadResumed(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadResumed, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_DETACH_DISABLE))\n__WEAK void EvrRtxThreadDetach(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadDetach, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_DETACHED_DISABLE))\n__WEAK void EvrRtxThreadDetached(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadDetached, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_JOIN_DISABLE))\n__WEAK void EvrRtxThreadJoin(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadJoin, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_JOIN_PENDING_DISABLE))\n__WEAK void EvrRtxThreadJoinPending(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadJoinPending, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_JOINED_DISABLE))\n__WEAK void EvrRtxThreadJoined(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadJoined, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_BLOCKED_DISABLE))\n__WEAK void EvrRtxThreadBlocked(osThreadId_t thread_id, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadBlocked, (uint32_t)thread_id, timeout);\n#else\n  (void)thread_id;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_UNBLOCKED_DISABLE))\n__WEAK void EvrRtxThreadUnblocked(osThreadId_t thread_id, uint32_t ret_val) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadUnblocked, (uint32_t)thread_id, ret_val);\n#else\n  (void)thread_id;\n  (void)ret_val;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_PREEMPTED_DISABLE))\n__WEAK void EvrRtxThreadPreempted(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadPreempted, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_SWITCHED_DISABLE))\n__WEAK void EvrRtxThreadSwitched(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadSwitched, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_EXIT_DISABLE))\n__WEAK void EvrRtxThreadExit(void) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadExit, 0U, 0U);\n#else\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_TERMINATE_DISABLE))\n__WEAK void EvrRtxThreadTerminate(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadTerminate, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_DESTROYED_DISABLE))\n__WEAK void EvrRtxThreadDestroyed(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadDestroyed, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_GET_COUNT_DISABLE))\n__WEAK void EvrRtxThreadGetCount(uint32_t count) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadGetCount, count, 0U);\n#else\n  (void)count;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THREAD != 0) &&                      \\\n     !defined(EVR_RTX_THREAD_ENUMERATE_DISABLE))\n__WEAK void EvrRtxThreadEnumerate(osThreadId_t *thread_array,\n                                  uint32_t array_items, uint32_t count) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxThreadEnumerate, (uint32_t)thread_array, array_items,\n                     count, 0U);\n#else\n  (void)thread_array;\n  (void)array_items;\n  (void)count;\n#endif\n}\n#endif\n\n//  ==== Thread Flags Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_ERROR_DISABLE))\n__WEAK void EvrRtxThreadFlagsError(osThreadId_t thread_id, int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadFlagsError, (uint32_t)thread_id,\n                     (uint32_t)status);\n#else\n  (void)thread_id;\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_SET_DISABLE))\n__WEAK void EvrRtxThreadFlagsSet(osThreadId_t thread_id, uint32_t flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadFlagsSet, (uint32_t)thread_id, flags);\n#else\n  (void)thread_id;\n  (void)flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_SET_DONE_DISABLE))\n__WEAK void EvrRtxThreadFlagsSetDone(osThreadId_t thread_id,\n                                     uint32_t thread_flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadFlagsSetDone, (uint32_t)thread_id,\n                     thread_flags);\n#else\n  (void)thread_id;\n  (void)thread_flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_CLEAR_DISABLE))\n__WEAK void EvrRtxThreadFlagsClear(uint32_t flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadFlagsClear, flags, 0U);\n#else\n  (void)flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_CLEAR_DONE_DISABLE))\n__WEAK void EvrRtxThreadFlagsClearDone(uint32_t thread_flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadFlagsClearDone, thread_flags, 0U);\n#else\n  (void)thread_flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_GET_DISABLE))\n__WEAK void EvrRtxThreadFlagsGet(uint32_t thread_flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadFlagsGet, thread_flags, 0U);\n#else\n  (void)thread_flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_WAIT_DISABLE))\n__WEAK void EvrRtxThreadFlagsWait(uint32_t flags, uint32_t options,\n                                  uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxThreadFlagsWait, flags, options, timeout, 0U);\n#else\n  (void)flags;\n  (void)options;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_WAIT_PENDING_DISABLE))\n__WEAK void EvrRtxThreadFlagsWaitPending(uint32_t flags, uint32_t options,\n                                         uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxThreadFlagsWaitPending, flags, options, timeout, 0U);\n#else\n  (void)flags;\n  (void)options;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_WAIT_TIMEOUT_DISABLE))\n__WEAK void EvrRtxThreadFlagsWaitTimeout(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadFlagsWaitTimeout, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_WAIT_COMPLETED_DISABLE))\n__WEAK void EvrRtxThreadFlagsWaitCompleted(uint32_t flags, uint32_t options,\n                                           uint32_t thread_flags,\n                                           osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxThreadFlagsWaitCompleted, flags, options,\n                     thread_flags, (uint32_t)thread_id);\n#else\n  (void)flags;\n  (void)options;\n  (void)thread_flags;\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_THFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_THREAD_FLAGS_WAIT_NOT_COMPLETED_DISABLE))\n__WEAK void EvrRtxThreadFlagsWaitNotCompleted(uint32_t flags,\n                                              uint32_t options) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxThreadFlagsWaitNotCompleted, flags, options);\n#else\n  (void)flags;\n  (void)options;\n#endif\n}\n#endif\n\n//  ==== Generic Wait Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) &&                        \\\n     !defined(EVR_RTX_DELAY_ERROR_DISABLE))\n__WEAK void EvrRtxDelayError(int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxDelayError, (uint32_t)status, 0U);\n#else\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) &&                        \\\n     !defined(EVR_RTX_DELAY_DISABLE))\n__WEAK void EvrRtxDelay(uint32_t ticks) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxDelay, ticks, 0U);\n#else\n  (void)ticks;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) &&                        \\\n     !defined(EVR_RTX_DELAY_UNTIL_DISABLE))\n__WEAK void EvrRtxDelayUntil(uint32_t ticks) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxDelayUntil, ticks, 0U);\n#else\n  (void)ticks;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) &&                        \\\n     !defined(EVR_RTX_DELAY_STARTED_DISABLE))\n__WEAK void EvrRtxDelayStarted(uint32_t ticks) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxDelayStarted, ticks, 0U);\n#else\n  (void)ticks;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) &&                        \\\n     !defined(EVR_RTX_DELAY_UNTIL_STARTED_DISABLE))\n__WEAK void EvrRtxDelayUntilStarted(uint32_t ticks) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxDelayUntilStarted, ticks, 0U);\n#else\n  (void)ticks;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_WAIT != 0) &&                        \\\n     !defined(EVR_RTX_DELAY_COMPLETED_DISABLE))\n__WEAK void EvrRtxDelayCompleted(osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxDelayCompleted, (uint32_t)thread_id, 0U);\n#else\n  (void)thread_id;\n#endif\n}\n#endif\n\n//  ==== Timer Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_ERROR_DISABLE))\n__WEAK void EvrRtxTimerError(osTimerId_t timer_id, int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerError, (uint32_t)timer_id, (uint32_t)status);\n#else\n  (void)timer_id;\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_CALLBACK_DISABLE))\n__WEAK void EvrRtxTimerCallback(osTimerFunc_t func, void *argument) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerCallback, (uint32_t)func, (uint32_t)argument);\n#else\n  (void)func;\n  (void)argument;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_NEW_DISABLE))\n__WEAK void EvrRtxTimerNew(osTimerFunc_t func, osTimerType_t type,\n                           void *argument, const osTimerAttr_t *attr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxTimerNew, (uint32_t)func, (uint32_t)type,\n                     (uint32_t)argument, (uint32_t)attr);\n#else\n  (void)func;\n  (void)type;\n  (void)argument;\n  (void)attr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_CREATED_DISABLE))\n__WEAK void EvrRtxTimerCreated(osTimerId_t timer_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerCreated, (uint32_t)timer_id, (uint32_t)name);\n#else\n  (void)timer_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_GET_NAME_DISABLE))\n__WEAK void EvrRtxTimerGetName(osTimerId_t timer_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerGetName, (uint32_t)timer_id, (uint32_t)name);\n#else\n  (void)timer_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_START_DISABLE))\n__WEAK void EvrRtxTimerStart(osTimerId_t timer_id, uint32_t ticks) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerStart, (uint32_t)timer_id, ticks);\n#else\n  (void)timer_id;\n  (void)ticks;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_STARTED_DISABLE))\n__WEAK void EvrRtxTimerStarted(osTimerId_t timer_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerStarted, (uint32_t)timer_id, 0U);\n#else\n  (void)timer_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_STOP_DISABLE))\n__WEAK void EvrRtxTimerStop(osTimerId_t timer_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerStop, (uint32_t)timer_id, 0U);\n#else\n  (void)timer_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_STOPPED_DISABLE))\n__WEAK void EvrRtxTimerStopped(osTimerId_t timer_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerStopped, (uint32_t)timer_id, 0U);\n#else\n  (void)timer_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_IS_RUNNING_DISABLE))\n__WEAK void EvrRtxTimerIsRunning(osTimerId_t timer_id, uint32_t running) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerIsRunning, (uint32_t)timer_id, running);\n#else\n  (void)timer_id;\n  (void)running;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_DELETE_DISABLE))\n__WEAK void EvrRtxTimerDelete(osTimerId_t timer_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerDelete, (uint32_t)timer_id, 0U);\n#else\n  (void)timer_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_TIMER != 0) &&                       \\\n     !defined(EVR_RTX_TIMER_DESTROYED_DISABLE))\n__WEAK void EvrRtxTimerDestroyed(osTimerId_t timer_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxTimerDestroyed, (uint32_t)timer_id, 0U);\n#else\n  (void)timer_id;\n#endif\n}\n#endif\n\n//  ==== Event Flags Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_ERROR_DISABLE))\n__WEAK void EvrRtxEventFlagsError(osEventFlagsId_t ef_id, int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsError, (uint32_t)ef_id, (uint32_t)status);\n#else\n  (void)ef_id;\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_NEW_DISABLE))\n__WEAK void EvrRtxEventFlagsNew(const osEventFlagsAttr_t *attr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsNew, (uint32_t)attr, 0U);\n#else\n  (void)attr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_CREATED_DISABLE))\n__WEAK void EvrRtxEventFlagsCreated(osEventFlagsId_t ef_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsCreated, (uint32_t)ef_id, (uint32_t)name);\n#else\n  (void)ef_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_GET_NAME_DISABLE))\n__WEAK void EvrRtxEventFlagsGetName(osEventFlagsId_t ef_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsGetName, (uint32_t)ef_id, (uint32_t)name);\n#else\n  (void)ef_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_SET_DISABLE))\n__WEAK void EvrRtxEventFlagsSet(osEventFlagsId_t ef_id, uint32_t flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsSet, (uint32_t)ef_id, flags);\n#else\n  (void)ef_id;\n  (void)flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_SET_DONE_DISABLE))\n__WEAK void EvrRtxEventFlagsSetDone(osEventFlagsId_t ef_id,\n                                    uint32_t event_flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsSetDone, (uint32_t)ef_id, event_flags);\n#else\n  (void)ef_id;\n  (void)event_flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_CLEAR_DISABLE))\n__WEAK void EvrRtxEventFlagsClear(osEventFlagsId_t ef_id, uint32_t flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsClear, (uint32_t)ef_id, flags);\n#else\n  (void)ef_id;\n  (void)flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_CLEAR_DONE_DISABLE))\n__WEAK void EvrRtxEventFlagsClearDone(osEventFlagsId_t ef_id,\n                                      uint32_t event_flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsClearDone, (uint32_t)ef_id, event_flags);\n#else\n  (void)ef_id;\n  (void)event_flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_GET_DISABLE))\n__WEAK void EvrRtxEventFlagsGet(osEventFlagsId_t ef_id, uint32_t event_flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsGet, (uint32_t)ef_id, event_flags);\n#else\n  (void)ef_id;\n  (void)event_flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_WAIT_DISABLE))\n__WEAK void EvrRtxEventFlagsWait(osEventFlagsId_t ef_id, uint32_t flags,\n                                 uint32_t options, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxEventFlagsWait, (uint32_t)ef_id, flags, options,\n                     timeout);\n#else\n  (void)ef_id;\n  (void)flags;\n  (void)options;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_WAIT_PENDING_DISABLE))\n__WEAK void EvrRtxEventFlagsWaitPending(osEventFlagsId_t ef_id, uint32_t flags,\n                                        uint32_t options, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxEventFlagsWaitPending, (uint32_t)ef_id, flags,\n                     options, timeout);\n#else\n  (void)ef_id;\n  (void)flags;\n  (void)options;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_WAIT_TIMEOUT_DISABLE))\n__WEAK void EvrRtxEventFlagsWaitTimeout(osEventFlagsId_t ef_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsWaitTimeout, (uint32_t)ef_id, 0U);\n#else\n  (void)ef_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_WAIT_COMPLETED_DISABLE))\n__WEAK void EvrRtxEventFlagsWaitCompleted(osEventFlagsId_t ef_id,\n                                          uint32_t flags, uint32_t options,\n                                          uint32_t event_flags) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxEventFlagsWaitCompleted, (uint32_t)ef_id, flags,\n                     options, event_flags);\n#else\n  (void)ef_id;\n  (void)flags;\n  (void)options;\n  (void)event_flags;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_WAIT_NOT_COMPLETED_DISABLE))\n__WEAK void EvrRtxEventFlagsWaitNotCompleted(osEventFlagsId_t ef_id,\n                                             uint32_t flags, uint32_t options) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxEventFlagsWaitNotCompleted, (uint32_t)ef_id, flags,\n                     options, 0U);\n#else\n  (void)ef_id;\n  (void)flags;\n  (void)options;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_DELETE_DISABLE))\n__WEAK void EvrRtxEventFlagsDelete(osEventFlagsId_t ef_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsDelete, (uint32_t)ef_id, 0U);\n#else\n  (void)ef_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_EVFLAGS != 0) &&                     \\\n     !defined(EVR_RTX_EVENT_FLAGS_DESTROYED_DISABLE))\n__WEAK void EvrRtxEventFlagsDestroyed(osEventFlagsId_t ef_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxEventFlagsDestroyed, (uint32_t)ef_id, 0U);\n#else\n  (void)ef_id;\n#endif\n}\n#endif\n\n//  ==== Mutex Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_ERROR_DISABLE))\n__WEAK void EvrRtxMutexError(osMutexId_t mutex_id, int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexError, (uint32_t)mutex_id, (uint32_t)status);\n#else\n  (void)mutex_id;\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_NEW_DISABLE))\n__WEAK void EvrRtxMutexNew(const osMutexAttr_t *attr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexNew, (uint32_t)attr, 0U);\n#else\n  (void)attr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_CREATED_DISABLE))\n__WEAK void EvrRtxMutexCreated(osMutexId_t mutex_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexCreated, (uint32_t)mutex_id, (uint32_t)name);\n#else\n  (void)mutex_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_GET_NAME_DISABLE))\n__WEAK void EvrRtxMutexGetName(osMutexId_t mutex_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexGetName, (uint32_t)mutex_id, (uint32_t)name);\n#else\n  (void)mutex_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_ACQUIRE_DISABLE))\n__WEAK void EvrRtxMutexAcquire(osMutexId_t mutex_id, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexAcquire, (uint32_t)mutex_id, timeout);\n#else\n  (void)mutex_id;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_ACQUIRE_PENDING_DISABLE))\n__WEAK void EvrRtxMutexAcquirePending(osMutexId_t mutex_id, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexAcquirePending, (uint32_t)mutex_id, timeout);\n#else\n  (void)mutex_id;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_ACQUIRE_TIMEOUT_DISABLE))\n__WEAK void EvrRtxMutexAcquireTimeout(osMutexId_t mutex_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexAcquireTimeout, (uint32_t)mutex_id, 0U);\n#else\n  (void)mutex_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_ACQUIRED_DISABLE))\n__WEAK void EvrRtxMutexAcquired(osMutexId_t mutex_id, uint32_t lock) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexAcquired, (uint32_t)mutex_id, lock);\n#else\n  (void)mutex_id;\n  (void)lock;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_NOT_ACQUIRED_DISABLE))\n__WEAK void EvrRtxMutexNotAcquired(osMutexId_t mutex_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexNotAcquired, (uint32_t)mutex_id, 0U);\n#else\n  (void)mutex_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_RELEASE_DISABLE))\n__WEAK void EvrRtxMutexRelease(osMutexId_t mutex_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexRelease, (uint32_t)mutex_id, 0U);\n#else\n  (void)mutex_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_RELEASED_DISABLE))\n__WEAK void EvrRtxMutexReleased(osMutexId_t mutex_id, uint32_t lock) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexReleased, (uint32_t)mutex_id, lock);\n#else\n  (void)mutex_id;\n  (void)lock;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_GET_OWNER_DISABLE))\n__WEAK void EvrRtxMutexGetOwner(osMutexId_t mutex_id, osThreadId_t thread_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexGetOwner, (uint32_t)mutex_id,\n                     (uint32_t)thread_id);\n#else\n  (void)mutex_id;\n  (void)thread_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_DELETE_DISABLE))\n__WEAK void EvrRtxMutexDelete(osMutexId_t mutex_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexDelete, (uint32_t)mutex_id, 0U);\n#else\n  (void)mutex_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MUTEX != 0) &&                       \\\n     !defined(EVR_RTX_MUTEX_DESTROYED_DISABLE))\n__WEAK void EvrRtxMutexDestroyed(osMutexId_t mutex_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMutexDestroyed, (uint32_t)mutex_id, 0U);\n#else\n  (void)mutex_id;\n#endif\n}\n#endif\n\n//  ==== Semaphore Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_ERROR_DISABLE))\n__WEAK void EvrRtxSemaphoreError(osSemaphoreId_t semaphore_id, int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreError, (uint32_t)semaphore_id,\n                     (uint32_t)status);\n#else\n  (void)semaphore_id;\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_NEW_DISABLE))\n__WEAK void EvrRtxSemaphoreNew(uint32_t max_count, uint32_t initial_count,\n                               const osSemaphoreAttr_t *attr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxSemaphoreNew, max_count, initial_count,\n                     (uint32_t)attr, 0U);\n#else\n  (void)max_count;\n  (void)initial_count;\n  (void)attr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_CREATED_DISABLE))\n__WEAK void EvrRtxSemaphoreCreated(osSemaphoreId_t semaphore_id,\n                                   const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreCreated, (uint32_t)semaphore_id,\n                     (uint32_t)name);\n#else\n  (void)semaphore_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_GET_NAME_DISABLE))\n__WEAK void EvrRtxSemaphoreGetName(osSemaphoreId_t semaphore_id,\n                                   const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreGetName, (uint32_t)semaphore_id,\n                     (uint32_t)name);\n#else\n#endif\n  (void)semaphore_id;\n  (void)name;\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_ACQUIRE_DISABLE))\n__WEAK void EvrRtxSemaphoreAcquire(osSemaphoreId_t semaphore_id,\n                                   uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreAcquire, (uint32_t)semaphore_id, timeout);\n#else\n  (void)semaphore_id;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_ACQUIRE_PENDING_DISABLE))\n__WEAK void EvrRtxSemaphoreAcquirePending(osSemaphoreId_t semaphore_id,\n                                          uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreAcquirePending, (uint32_t)semaphore_id,\n                     (uint32_t)timeout);\n#else\n  (void)semaphore_id;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_ACQUIRE_TIMEOUT_DISABLE))\n__WEAK void EvrRtxSemaphoreAcquireTimeout(osSemaphoreId_t semaphore_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreAcquireTimeout, (uint32_t)semaphore_id, 0U);\n#else\n  (void)semaphore_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_ACQUIRED_DISABLE))\n__WEAK void EvrRtxSemaphoreAcquired(osSemaphoreId_t semaphore_id,\n                                    uint32_t tokens) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreAcquired, (uint32_t)semaphore_id, tokens);\n#else\n  (void)semaphore_id;\n  (void)tokens;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_NOT_ACQUIRED_DISABLE))\n__WEAK void EvrRtxSemaphoreNotAcquired(osSemaphoreId_t semaphore_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreNotAcquired, (uint32_t)semaphore_id, 0U);\n#else\n  (void)semaphore_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_RELEASE_DISABLE))\n__WEAK void EvrRtxSemaphoreRelease(osSemaphoreId_t semaphore_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreRelease, (uint32_t)semaphore_id, 0U);\n#else\n  (void)semaphore_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_RELEASED_DISABLE))\n__WEAK void EvrRtxSemaphoreReleased(osSemaphoreId_t semaphore_id,\n                                    uint32_t tokens) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreReleased, (uint32_t)semaphore_id, tokens);\n#else\n  (void)semaphore_id;\n  (void)tokens;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_GET_COUNT_DISABLE))\n__WEAK void EvrRtxSemaphoreGetCount(osSemaphoreId_t semaphore_id,\n                                    uint32_t count) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreGetCount, (uint32_t)semaphore_id, count);\n#else\n  (void)semaphore_id;\n  (void)count;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_DELETE_DISABLE))\n__WEAK void EvrRtxSemaphoreDelete(osSemaphoreId_t semaphore_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreDelete, (uint32_t)semaphore_id, 0U);\n#else\n  (void)semaphore_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_SEMAPHORE != 0) &&                   \\\n     !defined(EVR_RTX_SEMAPHORE_DESTROYED_DISABLE))\n__WEAK void EvrRtxSemaphoreDestroyed(osSemaphoreId_t semaphore_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxSemaphoreDestroyed, (uint32_t)semaphore_id, 0U);\n#else\n  (void)semaphore_id;\n#endif\n}\n#endif\n\n//  ==== Memory Pool Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_ERROR_DISABLE))\n__WEAK void EvrRtxMemoryPoolError(osMemoryPoolId_t mp_id, int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolError, (uint32_t)mp_id, (uint32_t)status);\n#else\n  (void)mp_id;\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_NEW_DISABLE))\n__WEAK void EvrRtxMemoryPoolNew(uint32_t block_count, uint32_t block_size,\n                                const osMemoryPoolAttr_t *attr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMemoryPoolNew, block_count, block_size,\n                     (uint32_t)attr, 0U);\n#else\n  (void)block_count;\n  (void)block_size;\n  (void)attr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_CREATED_DISABLE))\n__WEAK void EvrRtxMemoryPoolCreated(osMemoryPoolId_t mp_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolCreated, (uint32_t)mp_id, (uint32_t)name);\n#else\n  (void)mp_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_GET_NAME_DISABLE))\n__WEAK void EvrRtxMemoryPoolGetName(osMemoryPoolId_t mp_id, const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolGetName, (uint32_t)mp_id, (uint32_t)name);\n#else\n  (void)mp_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_ALLOC_DISABLE))\n__WEAK void EvrRtxMemoryPoolAlloc(osMemoryPoolId_t mp_id, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolAlloc, (uint32_t)mp_id, timeout);\n#else\n  (void)mp_id;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_ALLOC_PENDING_DISABLE))\n__WEAK void EvrRtxMemoryPoolAllocPending(osMemoryPoolId_t mp_id,\n                                         uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolAllocPending, (uint32_t)mp_id, timeout);\n#else\n  (void)mp_id;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_ALLOC_TIMEOUT_DISABLE))\n__WEAK void EvrRtxMemoryPoolAllocTimeout(osMemoryPoolId_t mp_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolAllocTimeout, (uint32_t)mp_id, 0U);\n#else\n  (void)mp_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_ALLOCATED_DISABLE))\n__WEAK void EvrRtxMemoryPoolAllocated(osMemoryPoolId_t mp_id, void *block) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolAllocated, (uint32_t)mp_id,\n                     (uint32_t)block);\n#else\n  (void)mp_id;\n  (void)block;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_ALLOC_FAILED_DISABLE))\n__WEAK void EvrRtxMemoryPoolAllocFailed(osMemoryPoolId_t mp_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolAllocFailed, (uint32_t)mp_id, 0U);\n#else\n  (void)mp_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_FREE_DISABLE))\n__WEAK void EvrRtxMemoryPoolFree(osMemoryPoolId_t mp_id, void *block) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolFree, (uint32_t)mp_id, (uint32_t)block);\n#else\n  (void)mp_id;\n  (void)block;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_DEALLOCATED_DISABLE))\n__WEAK void EvrRtxMemoryPoolDeallocated(osMemoryPoolId_t mp_id, void *block) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolDeallocated, (uint32_t)mp_id,\n                     (uint32_t)block);\n#else\n  (void)mp_id;\n  (void)block;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_FREE_FAILED_DISABLE))\n__WEAK void EvrRtxMemoryPoolFreeFailed(osMemoryPoolId_t mp_id, void *block) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolFreeFailed, (uint32_t)mp_id,\n                     (uint32_t)block);\n#else\n  (void)mp_id;\n  (void)block;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_GET_CAPACITY_DISABLE))\n__WEAK void EvrRtxMemoryPoolGetCapacity(osMemoryPoolId_t mp_id,\n                                        uint32_t capacity) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolGetCapacity, (uint32_t)mp_id, capacity);\n#else\n  (void)mp_id;\n  (void)capacity;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_GET_BLOCK_SZIE_DISABLE))\n__WEAK void EvrRtxMemoryPoolGetBlockSize(osMemoryPoolId_t mp_id,\n                                         uint32_t block_size) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolGetBlockSize, (uint32_t)mp_id, block_size);\n#else\n  (void)mp_id;\n  (void)block_size;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_GET_COUNT_DISABLE))\n__WEAK void EvrRtxMemoryPoolGetCount(osMemoryPoolId_t mp_id, uint32_t count) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolGetCount, (uint32_t)mp_id, count);\n#else\n  (void)mp_id;\n  (void)count;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_GET_SPACE_DISABLE))\n__WEAK void EvrRtxMemoryPoolGetSpace(osMemoryPoolId_t mp_id, uint32_t space) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolGetSpace, (uint32_t)mp_id, space);\n#else\n  (void)mp_id;\n  (void)space;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_DELETE_DISABLE))\n__WEAK void EvrRtxMemoryPoolDelete(osMemoryPoolId_t mp_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolDelete, (uint32_t)mp_id, 0U);\n#else\n  (void)mp_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MEMPOOL != 0) &&                     \\\n     !defined(EVR_RTX_MEMORY_POOL_DESTROYED_DISABLE))\n__WEAK void EvrRtxMemoryPoolDestroyed(osMemoryPoolId_t mp_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMemoryPoolDestroyed, (uint32_t)mp_id, 0U);\n#else\n  (void)mp_id;\n#endif\n}\n#endif\n\n//  ==== Message Queue Events ====\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_ERROR_DISABLE))\n__WEAK void EvrRtxMessageQueueError(osMessageQueueId_t mq_id, int32_t status) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueError, (uint32_t)mq_id,\n                     (uint32_t)status);\n#else\n  (void)mq_id;\n  (void)status;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_NEW_DISABLE))\n__WEAK void EvrRtxMessageQueueNew(uint32_t msg_count, uint32_t msg_size,\n                                  const osMessageQueueAttr_t *attr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMessageQueueNew, msg_count, msg_size, (uint32_t)attr,\n                     0U);\n#else\n  (void)msg_count;\n  (void)msg_size;\n  (void)attr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_CREATED_DISABLE))\n__WEAK void EvrRtxMessageQueueCreated(osMessageQueueId_t mq_id,\n                                      const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueCreated, (uint32_t)mq_id,\n                     (uint32_t)name);\n#else\n  (void)mq_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_GET_NAME_DISABLE))\n__WEAK void EvrRtxMessageQueueGetName(osMessageQueueId_t mq_id,\n                                      const char *name) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueGetName, (uint32_t)mq_id,\n                     (uint32_t)name);\n#else\n  (void)mq_id;\n  (void)name;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_PUT_DISABLE))\n__WEAK void EvrRtxMessageQueuePut(osMessageQueueId_t mq_id, const void *msg_ptr,\n                                  uint8_t msg_prio, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMessageQueuePut, (uint32_t)mq_id, (uint32_t)msg_ptr,\n                     (uint32_t)msg_prio, timeout);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n  (void)msg_prio;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_PUT_PENDING_DISABLE))\n__WEAK void EvrRtxMessageQueuePutPending(osMessageQueueId_t mq_id,\n                                         const void *msg_ptr,\n                                         uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMessageQueuePutPending, (uint32_t)mq_id,\n                     (uint32_t)msg_ptr, timeout, 0U);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_PUT_TIMEOUT_DISABLE))\n__WEAK void EvrRtxMessageQueuePutTimeout(osMessageQueueId_t mq_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueuePutTimeout, (uint32_t)mq_id, 0U);\n#else\n  (void)mq_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_INSERT_PENDING_DISABLE))\n__WEAK void EvrRtxMessageQueueInsertPending(osMessageQueueId_t mq_id,\n                                            const void *msg_ptr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueInsertPending, (uint32_t)mq_id,\n                     (uint32_t)msg_ptr);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_INSERTED_DISABLE))\n__WEAK void EvrRtxMessageQueueInserted(osMessageQueueId_t mq_id,\n                                       const void *msg_ptr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueInserted, (uint32_t)mq_id,\n                     (uint32_t)msg_ptr);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_NOT_INSERTED_DISABLE))\n__WEAK void EvrRtxMessageQueueNotInserted(osMessageQueueId_t mq_id,\n                                          const void *msg_ptr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueNotInserted, (uint32_t)mq_id,\n                     (uint32_t)msg_ptr);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_GET_DISABLE))\n__WEAK void EvrRtxMessageQueueGet(osMessageQueueId_t mq_id, void *msg_ptr,\n                                  uint8_t *msg_prio, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMessageQueueGet, (uint32_t)mq_id, (uint32_t)msg_ptr,\n                     (uint32_t)msg_prio, timeout);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n  (void)msg_prio;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_GET_PENDING_DISABLE))\n__WEAK void EvrRtxMessageQueueGetPending(osMessageQueueId_t mq_id,\n                                         void *msg_ptr, uint32_t timeout) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord4(EvtRtxMessageQueueGetPending, (uint32_t)mq_id,\n                     (uint32_t)msg_ptr, timeout, 0U);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n  (void)timeout;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_GET_TIMEOUT_DISABLE))\n__WEAK void EvrRtxMessageQueueGetTimeout(osMessageQueueId_t mq_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueGetTimeout, (uint32_t)mq_id, 0U);\n#else\n  (void)mq_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_RETRIEVED_DISABLE))\n__WEAK void EvrRtxMessageQueueRetrieved(osMessageQueueId_t mq_id,\n                                        void *msg_ptr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueRetrieved, (uint32_t)mq_id,\n                     (uint32_t)msg_ptr);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_NOT_RETRIEVED_DISABLE))\n__WEAK void EvrRtxMessageQueueNotRetrieved(osMessageQueueId_t mq_id,\n                                           void *msg_ptr) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueNotRetrieved, (uint32_t)mq_id,\n                     (uint32_t)msg_ptr);\n#else\n  (void)mq_id;\n  (void)msg_ptr;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_GET_CAPACITY_DISABLE))\n__WEAK void EvrRtxMessageQueueGetCapacity(osMessageQueueId_t mq_id,\n                                          uint32_t capacity) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueGetCapacity, (uint32_t)mq_id, capacity);\n#else\n  (void)mq_id;\n  (void)capacity;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_GET_MSG_SIZE_DISABLE))\n__WEAK void EvrRtxMessageQueueGetMsgSize(osMessageQueueId_t mq_id,\n                                         uint32_t msg_size) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueGetMsgSize, (uint32_t)mq_id, msg_size);\n#else\n  (void)mq_id;\n  (void)msg_size;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_GET_COUNT_DISABLE))\n__WEAK void EvrRtxMessageQueueGetCount(osMessageQueueId_t mq_id,\n                                       uint32_t count) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueGetCount, (uint32_t)mq_id, count);\n#else\n  (void)mq_id;\n  (void)count;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_GET_SPACE_DISABLE))\n__WEAK void EvrRtxMessageQueueGetSpace(osMessageQueueId_t mq_id,\n                                       uint32_t space) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueGetSpace, (uint32_t)mq_id, space);\n#else\n  (void)mq_id;\n  (void)space;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_RESET_DISABLE))\n__WEAK void EvrRtxMessageQueueReset(osMessageQueueId_t mq_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueReset, (uint32_t)mq_id, 0U);\n#else\n  (void)mq_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_RESET_DONE_DISABLE))\n__WEAK void EvrRtxMessageQueueResetDone(osMessageQueueId_t mq_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueResetDone, (uint32_t)mq_id, 0U);\n#else\n  (void)mq_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_DELETE_DISABLE))\n__WEAK void EvrRtxMessageQueueDelete(osMessageQueueId_t mq_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueDelete, (uint32_t)mq_id, 0U);\n#else\n  (void)mq_id;\n#endif\n}\n#endif\n\n#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_MSGQUEUE != 0) &&                    \\\n     !defined(EVR_RTX_MESSAGE_QUEUE_DESTROYED_DISABLE))\n__WEAK void EvrRtxMessageQueueDestroyed(osMessageQueueId_t mq_id) {\n#if defined(RTE_Compiler_EventRecorder)\n  (void)EventRecord2(EvtRtxMessageQueueDestroyed, (uint32_t)mq_id, 0U);\n#else\n  (void)mq_id;\n#endif\n}\n#endif\n"
  },
  {
    "path": "rtos/rtx5/rtx_kernel.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Kernel functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"os_tick.h\"\n#include \"rtx_lib.h\"\n\n//  OS Runtime Information\nosRtxInfo_t osRtxInfo __attribute__((section(\".data.os\"))) =\n    // lint -e{785} \"Initialize only OS ID, OS Version and Kernel State\"\n    {.os_id = osRtxKernelId,\n     .version = osRtxVersionKernel,\n     .kernel.state = osRtxKernelInactive};\n\n#define OS_BSS_LOC __attribute__((section(\".bss.os\")))\nOS_BSS_LOC static uint32_t systick_lock_val;\nOS_BSS_LOC static uint32_t systick_lock_ts;\n\n//  ==== Helper functions ====\n\n/// Block Kernel (disable: thread switching, time tick, post ISR processing).\nstatic void KernelBlock(void) {\n\n  OS_Tick_Disable();\n\n  osRtxInfo.kernel.blocked = 1U;\n  __DSB();\n\n  if (GetPendSV() != 0U) {\n    ClrPendSV();\n    osRtxInfo.kernel.pendSV = 1U;\n  }\n}\n\n/// Unblock Kernel\nstatic void KernelUnblock(void) {\n\n  osRtxInfo.kernel.blocked = 0U;\n  __DSB();\n\n  if (osRtxInfo.kernel.pendSV != 0U) {\n    osRtxInfo.kernel.pendSV = 0U;\n    SetPendSV();\n  }\n\n  OS_Tick_Enable();\n}\n\n//  ==== Service Calls ====\n\n/// Initialize the RTOS Kernel.\n/// \\note API identical to osKernelInitialize\nstatic osStatus_t svcRtxKernelInitialize(void) {\n\n  if (osRtxInfo.kernel.state == osRtxKernelReady) {\n    EvrRtxKernelInitialized();\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osOK;\n  }\n  if (osRtxInfo.kernel.state != osRtxKernelInactive) {\n    EvrRtxKernelError((int32_t)osError);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osError;\n  }\n\n#if (DOMAIN_NS == 1)\n  // Initialize Secure Process Stack\n  if (TZ_InitContextSystem_S() == 0U) {\n    EvrRtxKernelError(osRtxErrorTZ_InitContext_S);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osError;\n  }\n#endif\n\n  // Initialize osRtxInfo\n  memset((uint8_t *)&osRtxInfo + offsetof(osRtxInfo_t, kernel), 0,\n         sizeof(osRtxInfo) - offsetof(osRtxInfo_t, kernel));\n\n  osRtxInfo.isr_queue.data = osRtxConfig.isr_queue.data;\n  osRtxInfo.isr_queue.max = osRtxConfig.isr_queue.max;\n\n  osRtxInfo.thread.robin.timeout = osRtxConfig.robin_timeout;\n\n  // Initialize Memory Pools (Variable Block Size)\n  if (osRtxMemoryInit(osRtxConfig.mem.common_addr,\n                      osRtxConfig.mem.common_size) != 0U) {\n    osRtxInfo.mem.common = osRtxConfig.mem.common_addr;\n  }\n  if (osRtxMemoryInit(osRtxConfig.mem.stack_addr, osRtxConfig.mem.stack_size) !=\n      0U) {\n    osRtxInfo.mem.stack = osRtxConfig.mem.stack_addr;\n  } else {\n    osRtxInfo.mem.stack = osRtxInfo.mem.common;\n  }\n  if (osRtxMemoryInit(osRtxConfig.mem.mp_data_addr,\n                      osRtxConfig.mem.mp_data_size) != 0U) {\n    osRtxInfo.mem.mp_data = osRtxConfig.mem.mp_data_addr;\n  } else {\n    osRtxInfo.mem.mp_data = osRtxInfo.mem.common;\n  }\n  if (osRtxMemoryInit(osRtxConfig.mem.mq_data_addr,\n                      osRtxConfig.mem.mq_data_size) != 0U) {\n    osRtxInfo.mem.mq_data = osRtxConfig.mem.mq_data_addr;\n  } else {\n    osRtxInfo.mem.mq_data = osRtxInfo.mem.common;\n  }\n\n  // Initialize Memory Pools (Fixed Block Size)\n  if (osRtxConfig.mpi.stack != NULL) {\n    (void)osRtxMemoryPoolInit(\n        osRtxConfig.mpi.stack, osRtxConfig.mpi.stack->max_blocks,\n        osRtxConfig.mpi.stack->block_size, osRtxConfig.mpi.stack->block_base);\n    osRtxInfo.mpi.stack = osRtxConfig.mpi.stack;\n  }\n  if (osRtxConfig.mpi.thread != NULL) {\n    (void)osRtxMemoryPoolInit(\n        osRtxConfig.mpi.thread, osRtxConfig.mpi.thread->max_blocks,\n        osRtxConfig.mpi.thread->block_size, osRtxConfig.mpi.thread->block_base);\n    osRtxInfo.mpi.thread = osRtxConfig.mpi.thread;\n  }\n  if (osRtxConfig.mpi.timer != NULL) {\n    (void)osRtxMemoryPoolInit(\n        osRtxConfig.mpi.timer, osRtxConfig.mpi.timer->max_blocks,\n        osRtxConfig.mpi.timer->block_size, osRtxConfig.mpi.timer->block_base);\n    osRtxInfo.mpi.timer = osRtxConfig.mpi.timer;\n  }\n  if (osRtxConfig.mpi.event_flags != NULL) {\n    (void)osRtxMemoryPoolInit(osRtxConfig.mpi.event_flags,\n                              osRtxConfig.mpi.event_flags->max_blocks,\n                              osRtxConfig.mpi.event_flags->block_size,\n                              osRtxConfig.mpi.event_flags->block_base);\n    osRtxInfo.mpi.event_flags = osRtxConfig.mpi.event_flags;\n  }\n  if (osRtxConfig.mpi.mutex != NULL) {\n    (void)osRtxMemoryPoolInit(\n        osRtxConfig.mpi.mutex, osRtxConfig.mpi.mutex->max_blocks,\n        osRtxConfig.mpi.mutex->block_size, osRtxConfig.mpi.mutex->block_base);\n    osRtxInfo.mpi.mutex = osRtxConfig.mpi.mutex;\n  }\n  if (osRtxConfig.mpi.semaphore != NULL) {\n    (void)osRtxMemoryPoolInit(osRtxConfig.mpi.semaphore,\n                              osRtxConfig.mpi.semaphore->max_blocks,\n                              osRtxConfig.mpi.semaphore->block_size,\n                              osRtxConfig.mpi.semaphore->block_base);\n    osRtxInfo.mpi.semaphore = osRtxConfig.mpi.semaphore;\n  }\n  if (osRtxConfig.mpi.memory_pool != NULL) {\n    (void)osRtxMemoryPoolInit(osRtxConfig.mpi.memory_pool,\n                              osRtxConfig.mpi.memory_pool->max_blocks,\n                              osRtxConfig.mpi.memory_pool->block_size,\n                              osRtxConfig.mpi.memory_pool->block_base);\n    osRtxInfo.mpi.memory_pool = osRtxConfig.mpi.memory_pool;\n  }\n  if (osRtxConfig.mpi.message_queue != NULL) {\n    (void)osRtxMemoryPoolInit(osRtxConfig.mpi.message_queue,\n                              osRtxConfig.mpi.message_queue->max_blocks,\n                              osRtxConfig.mpi.message_queue->block_size,\n                              osRtxConfig.mpi.message_queue->block_base);\n    osRtxInfo.mpi.message_queue = osRtxConfig.mpi.message_queue;\n  }\n\n  osRtxInfo.kernel.state = osRtxKernelReady;\n\n  EvrRtxKernelInitialized();\n\n  return osOK;\n}\n\n///  Get RTOS Kernel Information.\n/// \\note API identical to osKernelGetInfo\nstatic osStatus_t svcRtxKernelGetInfo(osVersion_t *version, char *id_buf,\n                                      uint32_t id_size) {\n  uint32_t size;\n\n  if (version != NULL) {\n    version->api = osRtxVersionAPI;\n    version->kernel = osRtxVersionKernel;\n  }\n\n  if ((id_buf != NULL) && (id_size != 0U)) {\n    if (id_size > sizeof(osRtxKernelId)) {\n      size = sizeof(osRtxKernelId);\n    } else {\n      size = id_size;\n    }\n    memcpy(id_buf, osRtxKernelId, size);\n  }\n\n  EvrRtxKernelInfoRetrieved(version, id_buf, id_size);\n\n  return osOK;\n}\n\n/// Get the current RTOS Kernel state.\n/// \\note API identical to osKernelGetState\nstatic osKernelState_t svcRtxKernelGetState(void) {\n  osKernelState_t state = osRtxKernelState();\n  EvrRtxKernelGetState(state);\n  return state;\n}\n\n/// Start the RTOS Kernel scheduler.\n/// \\note API identical to osKernelStart\nstatic osStatus_t svcRtxKernelStart(void) {\n  os_thread_t *thread;\n\n  if (osRtxInfo.kernel.state != osRtxKernelReady) {\n    EvrRtxKernelError(osRtxErrorKernelNotReady);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osError;\n  }\n\n  // Thread startup (Idle and Timer Thread)\n  if (!osRtxThreadStartup()) {\n    EvrRtxKernelError((int32_t)osError);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osError;\n  }\n\n  // Setup SVC and PendSV System Service Calls\n  SVC_Setup();\n\n  // Setup RTOS Tick\n  if (OS_Tick_Setup(osRtxConfig.tick_freq, OS_TICK_HANDLER) != 0) {\n    EvrRtxKernelError((int32_t)osError);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osError;\n  }\n  osRtxInfo.tick_irqn = OS_Tick_GetIRQn();\n\n  // Enable RTOS Tick\n  OS_Tick_Enable();\n\n  // Switch to Ready Thread with highest Priority\n  thread = osRtxThreadListGet(&osRtxInfo.thread.ready);\n  osRtxThreadSwitch(thread);\n\n  if ((osRtxConfig.flags & osRtxConfigPrivilegedMode) != 0U) {\n    // Privileged Thread mode & PSP\n    __set_CONTROL(0x02U);\n  } else {\n    // Unprivileged Thread mode & PSP\n    __set_CONTROL(0x03U);\n  }\n\n  osRtxInfo.kernel.state = osRtxKernelRunning;\n\n  EvrRtxKernelStarted();\n\n  return osOK;\n}\n\n/// Lock the RTOS Kernel scheduler.\n/// \\note API identical to osKernelLock\nstatic int32_t svcRtxKernelLock(void) {\n  int32_t lock;\n\n  switch (osRtxInfo.kernel.state) {\n  case osRtxKernelRunning:\n    osRtxInfo.kernel.state = osRtxKernelLocked;\n    EvrRtxKernelLocked(0);\n    lock = 0;\n    break;\n  case osRtxKernelLocked:\n    EvrRtxKernelLocked(1);\n    lock = 1;\n    break;\n  default:\n    EvrRtxKernelError((int32_t)osError);\n    lock = (int32_t)osError;\n    break;\n  }\n  return lock;\n}\n\n/// Unlock the RTOS Kernel scheduler.\n/// \\note API identical to osKernelUnlock\nstatic int32_t svcRtxKernelUnlock(void) {\n  int32_t lock;\n\n  switch (osRtxInfo.kernel.state) {\n  case osRtxKernelRunning:\n    EvrRtxKernelUnlocked(0);\n    lock = 0;\n    break;\n  case osRtxKernelLocked:\n    osRtxInfo.kernel.state = osRtxKernelRunning;\n    EvrRtxKernelUnlocked(1);\n    lock = 1;\n    break;\n  default:\n    EvrRtxKernelError((int32_t)osError);\n    lock = (int32_t)osError;\n    break;\n  }\n  return lock;\n}\n\n/// Restore the RTOS Kernel scheduler lock state.\n/// \\note API identical to osKernelRestoreLock\nstatic int32_t svcRtxKernelRestoreLock(int32_t lock) {\n  int32_t lock_new;\n\n  switch (osRtxInfo.kernel.state) {\n  case osRtxKernelRunning:\n  case osRtxKernelLocked:\n    switch (lock) {\n    case 0:\n      osRtxInfo.kernel.state = osRtxKernelRunning;\n      EvrRtxKernelLockRestored(0);\n      lock_new = 0;\n      break;\n    case 1:\n      osRtxInfo.kernel.state = osRtxKernelLocked;\n      EvrRtxKernelLockRestored(1);\n      lock_new = 1;\n      break;\n    default:\n      EvrRtxKernelError((int32_t)osError);\n      lock_new = (int32_t)osError;\n      break;\n    }\n    break;\n  default:\n    EvrRtxKernelError((int32_t)osError);\n    lock_new = (int32_t)osError;\n    break;\n  }\n  return lock_new;\n}\n\n/// Suspend the RTOS Kernel scheduler.\n/// \\note API identical to osKernelSuspend\nstatic uint32_t svcRtxKernelSuspend(void) {\n  const os_thread_t *thread;\n  const os_timer_t *timer;\n  uint32_t delay;\n\n  if (osRtxInfo.kernel.state != osRtxKernelRunning) {\n    EvrRtxKernelError(osRtxErrorKernelNotRunning);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  KernelBlock();\n\n  systick_lock_val = OS_Tick_GetInterval() - 1 - OS_Tick_GetCount();\n  systick_lock_ts = hal_sys_timer_get();\n\n  delay = osWaitForever;\n\n  // Check Thread Delay list\n  thread = osRtxInfo.thread.delay_list;\n  if (thread != NULL) {\n    delay = thread->delay;\n  }\n\n  // Check Active Timer list\n  timer = osRtxInfo.timer.list;\n  if (timer != NULL) {\n    if (timer->tick < delay) {\n      delay = timer->tick;\n    }\n  }\n\n  osRtxInfo.kernel.state = osRtxKernelSuspended;\n\n  EvrRtxKernelSuspended(delay);\n\n  return delay;\n}\n\n/// Resume the RTOS Kernel scheduler.\n/// \\note API identical to osKernelResume\nstatic void svcRtxKernelResume(uint32_t sleep_ticks) {\n  os_thread_t *thread;\n  os_timer_t *timer;\n  uint32_t delay;\n  uint32_t ticks;\n\n  uint32_t resume_ts;\n  uint32_t tick_interval;\n  uint32_t sysclk_remain;\n  uint32_t delta_clk;\n  uint32_t sleep_clk;\n\n  if (osRtxInfo.kernel.state != osRtxKernelSuspended) {\n    EvrRtxKernelResumed();\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return;\n  }\n\n  tick_interval = OS_Tick_GetInterval();\n  resume_ts = hal_sys_timer_get();\n  sleep_clk = (resume_ts - systick_lock_ts) *\n              (OS_CLOCK_NOMINAL / CONFIG_SYSTICK_HZ_NOMINAL);\n  if (systick_lock_val == 0) {\n    sleep_ticks = sleep_clk / tick_interval;\n    sysclk_remain = sleep_clk % tick_interval;\n  } else if (sleep_clk >= systick_lock_val) {\n    delta_clk = sleep_clk - systick_lock_val;\n    sleep_ticks = delta_clk / tick_interval + 1;\n    sysclk_remain = tick_interval - delta_clk % tick_interval;\n  } else {\n    sleep_ticks = 0;\n    sysclk_remain = systick_lock_val - sleep_clk;\n  }\n#if __RTX_CPU_STATISTICS__\n  osRtxInfo.thread.run.curr->rtime += sleep_ticks;\n#endif\n  osRtxInfo.kernel.tick += sleep_ticks;\n\n  // Process Thread Delay list\n  thread = osRtxInfo.thread.delay_list;\n  if (thread != NULL) {\n    delay = sleep_ticks;\n    do {\n      if (delay >= thread->delay) {\n        delay -= thread->delay;\n        thread->delay = 1U;\n        osRtxThreadDelayTick();\n        thread = osRtxInfo.thread.delay_list;\n      } else {\n        thread->delay -= delay;\n        delay = 0U;\n      }\n    } while ((thread != NULL) && (delay != 0U));\n  }\n\n  // Process Active Timer list\n  timer = osRtxInfo.timer.list;\n  if (timer != NULL) {\n    ticks = sleep_ticks;\n    do {\n      if (ticks >= timer->tick) {\n        ticks -= timer->tick;\n        timer->tick = 1U;\n        osRtxInfo.timer.tick();\n        timer = osRtxInfo.timer.list;\n      } else {\n        timer->tick -= ticks;\n        ticks = 0U;\n      }\n    } while ((timer != NULL) && (ticks != 0U));\n  }\n\n  osRtxInfo.kernel.state = osRtxKernelRunning;\n\n  osRtxThreadDispatch(NULL);\n\n  if (sysclk_remain == tick_interval) {\n    sysclk_remain = 0;\n  }\n  if (sysclk_remain) {\n    SysTick->LOAD = sysclk_remain;\n    SysTick->VAL = 0;\n    SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;\n    while (SysTick->VAL == 0)\n      ;\n    SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;\n    SysTick->LOAD = tick_interval - 1;\n  } else\n    SysTick->VAL = 0;\n\n#if defined(DEBUG_SLEEP) && (DEBUG_SLEEP >= 1)\n  if (sleep_clk > 0) {\n    TRACE(7, \"[%u/0x%X][%2u/%u] resume: suspend tick:%u, sleep_clk=%u ticks=%u\",\n          TICKS_TO_MS(hal_sys_timer_get()), hal_sys_timer_get(), sysclk_remain,\n          SysTick->VAL, systick_lock_val, sleep_clk, sleep_ticks);\n  }\n#endif\n\n  KernelUnblock();\n\n  EvrRtxKernelResumed();\n}\n\n/// Get the RTOS kernel tick count.\n/// \\note API identical to osKernelGetTickCount\nstatic uint32_t svcRtxKernelGetTickCount(void) {\n  EvrRtxKernelGetTickCount(osRtxInfo.kernel.tick);\n  return osRtxInfo.kernel.tick;\n}\n\n/// Get the RTOS kernel tick frequency.\n/// \\note API identical to osKernelGetTickFreq\nstatic uint32_t svcRtxKernelGetTickFreq(void) {\n  EvrRtxKernelGetTickFreq(osRtxConfig.tick_freq);\n  return osRtxConfig.tick_freq;\n}\n\n/// Get the RTOS kernel system timer count.\n/// \\note API identical to osKernelGetSysTimerCount\nstatic uint32_t svcRtxKernelGetSysTimerCount(void) {\n  uint32_t tick;\n  uint32_t count;\n\n  tick = (uint32_t)osRtxInfo.kernel.tick;\n  count = OS_Tick_GetCount();\n  if (OS_Tick_GetOverflow() != 0U) {\n    count = OS_Tick_GetCount();\n    tick++;\n  }\n  count += tick * OS_Tick_GetInterval();\n  EvrRtxKernelGetSysTimerCount(count);\n  return count;\n}\n\n/// Get the RTOS kernel system timer frequency.\n/// \\note API identical to osKernelGetSysTimerFreq\nstatic uint32_t svcRtxKernelGetSysTimerFreq(void) {\n  uint32_t freq = OS_Tick_GetClock();\n  EvrRtxKernelGetSysTimerFreq(freq);\n  return freq;\n}\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_0(KernelInitialize, osStatus_t)\nSVC0_3(KernelGetInfo, osStatus_t, osVersion_t *, char *, uint32_t)\nSVC0_0(KernelStart, osStatus_t)\nSVC0_0(KernelLock, int32_t)\nSVC0_0(KernelUnlock, int32_t)\nSVC0_1(KernelRestoreLock, int32_t, int32_t)\nSVC0_0(KernelSuspend, uint32_t)\nSVC0_1N(KernelResume, void, uint32_t)\nSVC0_0(KernelGetState, osKernelState_t)\nSVC0_0(KernelGetTickCount, uint32_t)\nSVC0_0(KernelGetTickFreq, uint32_t)\nSVC0_0(KernelGetSysTimerCount, uint32_t)\nSVC0_0(KernelGetSysTimerFreq, uint32_t)\n// lint --flb \"Library End\"\n\n//  ==== Library functions ====\n\n/// RTOS Kernel Pre-Initialization Hook\n// lint -esym(759,osRtxKernelPreInit) \"Prototype in header\"\n// lint -esym(765,osRtxKernelPreInit) \"Global scope (can be overridden)\"\n// lint -esym(522,osRtxKernelPreInit) \"Can be overridden (do not lack\n// side-effects)\"\n__WEAK void osRtxKernelPreInit(void) {}\n\n//  ==== Public API ====\n\n/// Initialize the RTOS Kernel.\nosStatus_t osKernelInitialize(void) {\n  osStatus_t status;\n\n  osRtxKernelPreInit();\n  EvrRtxKernelInitialize();\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxKernelError((int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcKernelInitialize();\n  }\n  return status;\n}\n\n///  Get RTOS Kernel Information.\nosStatus_t osKernelGetInfo(osVersion_t *version, char *id_buf,\n                           uint32_t id_size) {\n  osStatus_t status;\n\n  EvrRtxKernelGetInfo(version, id_buf, id_size);\n  if (IsIrqMode() || IsIrqMasked() || IsPrivileged()) {\n    status = svcRtxKernelGetInfo(version, id_buf, id_size);\n  } else {\n    status = __svcKernelGetInfo(version, id_buf, id_size);\n  }\n  return status;\n}\n\n/// Get the current RTOS Kernel state.\nosKernelState_t osKernelGetState(void) {\n  osKernelState_t state;\n\n  if (IsIrqMode() || IsIrqMasked() || IsPrivileged()) {\n    state = svcRtxKernelGetState();\n  } else {\n    state = __svcKernelGetState();\n  }\n  return state;\n}\n\n/// Start the RTOS Kernel scheduler.\nosStatus_t osKernelStart(void) {\n  osStatus_t status;\n\n  EvrRtxKernelStart();\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxKernelError((int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcKernelStart();\n  }\n  return status;\n}\n\n/// Lock the RTOS Kernel scheduler.\nint32_t osKernelLock(void) {\n  int32_t lock;\n\n  EvrRtxKernelLock();\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxKernelError((int32_t)osErrorISR);\n    lock = (int32_t)osErrorISR;\n  } else {\n    lock = __svcKernelLock();\n  }\n  return lock;\n}\n\n/// Unlock the RTOS Kernel scheduler.\nint32_t osKernelUnlock(void) {\n  int32_t lock;\n\n  EvrRtxKernelUnlock();\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxKernelError((int32_t)osErrorISR);\n    lock = (int32_t)osErrorISR;\n  } else {\n    lock = __svcKernelUnlock();\n  }\n  return lock;\n}\n\n/// Restore the RTOS Kernel scheduler lock state.\nint32_t osKernelRestoreLock(int32_t lock) {\n  int32_t lock_new;\n\n  EvrRtxKernelRestoreLock(lock);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxKernelError((int32_t)osErrorISR);\n    lock_new = (int32_t)osErrorISR;\n  } else {\n    lock_new = __svcKernelRestoreLock(lock);\n  }\n  return lock_new;\n}\n\n/// Suspend the RTOS Kernel scheduler.\nuint32_t osKernelSuspend(void) {\n  uint32_t ticks;\n\n  EvrRtxKernelSuspend();\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxKernelError((int32_t)osErrorISR);\n    ticks = 0U;\n  } else {\n    ticks = __svcKernelSuspend();\n  }\n  return ticks;\n}\n\n/// Resume the RTOS Kernel scheduler.\nvoid osKernelResume(uint32_t sleep_ticks) {\n\n  EvrRtxKernelResume(sleep_ticks);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxKernelError((int32_t)osErrorISR);\n  } else {\n    __svcKernelResume(sleep_ticks);\n  }\n}\n\n/// Get the RTOS kernel tick count.\nuint32_t osKernelGetTickCount(void) {\n  uint32_t count;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    count = svcRtxKernelGetTickCount();\n  } else {\n    count = __svcKernelGetTickCount();\n  }\n  return count;\n}\n\n/// Get the RTOS kernel tick frequency.\nuint32_t osKernelGetTickFreq(void) {\n  uint32_t freq;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    freq = svcRtxKernelGetTickFreq();\n  } else {\n    freq = __svcKernelGetTickFreq();\n  }\n  return freq;\n}\n\n/// Get the RTOS kernel system timer count.\nuint32_t osKernelGetSysTimerCount(void) {\n  uint32_t count;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    count = svcRtxKernelGetSysTimerCount();\n  } else {\n    count = __svcKernelGetSysTimerCount();\n  }\n  return count;\n}\n\n/// Get the RTOS kernel system timer frequency.\nuint32_t osKernelGetSysTimerFreq(void) {\n  uint32_t freq;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    freq = svcRtxKernelGetSysTimerFreq();\n  } else {\n    freq = __svcKernelGetSysTimerFreq();\n  }\n  return freq;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_lib.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       RTX Library Configuration\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"cmsis_compiler.h\"\n#include \"rtx_config.h\"\n#include \"rtx_os.h\"\n\n#ifdef RTE_Compiler_EventRecorder\n#include \"EventRecorder.h\"\n#include \"EventRecorderConf.h\"\n#endif\n#include \"rtx_evr.h\"\n\n// System Configuration\n// ====================\n\n// Dynamic Memory\n#if (OS_DYNAMIC_MEM_SIZE != 0)\n#if ((OS_DYNAMIC_MEM_SIZE % 8) != 0)\n#error \"Invalid Dynamic Memory size!\"\n#endif\nstatic uint64_t os_mem[OS_DYNAMIC_MEM_SIZE / 8]\n    __attribute__((section(\".bss.os\")));\n#endif\n\n// Kernel Tick Frequency\n#if (OS_TICK_FREQ < 1)\n#error \"Invalid Kernel Tick Frequency!\"\n#endif\n\n// ISR FIFO Queue\n#if (OS_ISR_FIFO_QUEUE < 4)\n#error \"Invalid ISR FIFO Queue size!\"\n#endif\nstatic void *os_isr_queue[OS_ISR_FIFO_QUEUE]\n    __attribute__((section(\".bss.os\")));\n\n// Thread Configuration\n// ====================\n\n#if (((OS_STACK_SIZE % 8) != 0) || (OS_STACK_SIZE < 72))\n#error \"Invalid default Thread Stack size!\"\n#endif\n\n#if (((OS_IDLE_THREAD_STACK_SIZE % 8) != 0) || (OS_IDLE_THREAD_STACK_SIZE < 72))\n#error \"Invalid Idle Thread Stack size!\"\n#endif\n\n#if (OS_THREAD_OBJ_MEM != 0)\n\n#if (OS_THREAD_NUM == 0)\n#error \"Invalid number of user Threads!\"\n#endif\n\n#if ((OS_THREAD_USER_STACK_SIZE != 0) && ((OS_THREAD_USER_STACK_SIZE % 8) != 0))\n#error \"Invalid total Stack size!\"\n#endif\n\n// Thread Control Blocks\nstatic osRtxThread_t os_thread_cb[OS_THREAD_NUM]\n    __attribute__((section(\".bss.os.thread.cb\")));\n\n// Thread Default Stack\n#if (OS_THREAD_DEF_STACK_NUM != 0)\nstatic uint64_t\n    os_thread_def_stack[OS_THREAD_DEF_STACK_NUM * (OS_STACK_SIZE / 8)]\n    __attribute__((section(\".bss.os.thread.stack\")));\n#endif\n\n// Memory Pool for Thread Control Blocks\nstatic osRtxMpInfo_t os_mpi_thread\n    __attribute__((section(\".data.os.thread.mpi\"))) = {\n        (uint32_t)OS_THREAD_NUM, 0U,   (uint32_t)osRtxThreadCbSize,\n        &os_thread_cb[0],        NULL, NULL};\n\n// Memory Pool for Thread Default Stack\n#if (OS_THREAD_DEF_STACK_NUM != 0)\nstatic osRtxMpInfo_t os_mpi_def_stack\n    __attribute__((section(\".data.os.thread.mpi\"))) = {\n        (uint32_t)OS_THREAD_DEF_STACK_NUM, 0U,   (uint32_t)OS_STACK_SIZE,\n        &os_thread_def_stack[0],           NULL, NULL};\n#endif\n\n// Memory Pool for Thread Stack\n#if (OS_THREAD_USER_STACK_SIZE != 0)\nstatic uint64_t\n    os_thread_stack[2 + OS_THREAD_NUM + (OS_THREAD_USER_STACK_SIZE / 8)]\n    __attribute__((section(\".bss.os.thread.stack\")));\n#endif\n\n#endif // (OS_THREAD_OBJ_MEM != 0)\n\n// Stack overrun checking\n#if (OS_STACK_CHECK == 0)\n// Override library function\nextern void osRtxThreadStackCheck(void);\nvoid osRtxThreadStackCheck(void) {}\n#endif\n\n// Idle Thread Control Block\nstatic osRtxThread_t os_idle_thread_cb\n    __attribute__((section(\".bss.os.thread.cb\")));\n\n// Idle Thread Stack\nstatic uint64_t os_idle_thread_stack[OS_IDLE_THREAD_STACK_SIZE / 8]\n    __attribute__((section(\".bss.os.thread.stack\")));\n\n// Idle Thread Attributes\nstatic const osThreadAttr_t os_idle_thread_attr = {\n#if defined(OS_IDLE_THREAD_NAME)\n    OS_IDLE_THREAD_NAME,\n#else\n    NULL,\n#endif\n    osThreadDetached,\n    &os_idle_thread_cb,\n    (uint32_t)sizeof(os_idle_thread_cb),\n    &os_idle_thread_stack[0],\n    (uint32_t)sizeof(os_idle_thread_stack),\n    osPriorityIdle,\n#if defined(OS_IDLE_THREAD_TZ_MOD_ID)\n    (uint32_t)OS_IDLE_THREAD_TZ_MOD_ID,\n#else\n    0U,\n#endif\n    0U};\n\n// Timer Configuration\n// ===================\n\n#if (OS_TIMER_OBJ_MEM != 0)\n\n#if (OS_TIMER_NUM == 0)\n#error \"Invalid number of Timer objects!\"\n#endif\n\n// Timer Control Blocks\nstatic osRtxTimer_t os_timer_cb[OS_TIMER_NUM]\n    __attribute__((section(\".bss.os.timer.cb\")));\n\n// Memory Pool for Timer Control Blocks\nstatic osRtxMpInfo_t os_mpi_timer\n    __attribute__((section(\".data.os.timer.mpi\"))) = {\n        (uint32_t)OS_TIMER_NUM, 0U,   (uint32_t)osRtxTimerCbSize,\n        &os_timer_cb[0],        NULL, NULL};\n\n#endif // (OS_TIMER_OBJ_MEM != 0)\n\n#if ((OS_TIMER_THREAD_STACK_SIZE != 0) && (OS_TIMER_CB_QUEUE != 0))\n\n#if (((OS_TIMER_THREAD_STACK_SIZE % 8) != 0) ||                                \\\n     (OS_TIMER_THREAD_STACK_SIZE < 96))\n#error \"Invalid Timer Thread Stack size!\"\n#endif\n\n// Timer Thread Control Block\nstatic osRtxThread_t os_timer_thread_cb\n    __attribute__((section(\".bss.os.thread.cb\")));\n\n// Timer Thread Stack\nstatic uint64_t os_timer_thread_stack[OS_TIMER_THREAD_STACK_SIZE / 8]\n    __attribute__((section(\".bss.os.thread.stack\")));\n\n// Timer Thread Attributes\nstatic const osThreadAttr_t os_timer_thread_attr = {\n#if defined(OS_TIMER_THREAD_NAME)\n    OS_TIMER_THREAD_NAME,\n#else\n    NULL,\n#endif\n    osThreadDetached, &os_timer_thread_cb, (uint32_t)sizeof(os_timer_thread_cb),\n    &os_timer_thread_stack[0], (uint32_t)sizeof(os_timer_thread_stack),\n    // lint -e{9030} -e{9034} \"cast from signed to enum\"\n    (osPriority_t)OS_TIMER_THREAD_PRIO,\n#if defined(OS_TIMER_THREAD_TZ_MOD_ID)\n    (uint32_t)OS_TIMER_THREAD_TZ_MOD_ID,\n#else\n    0U,\n#endif\n    0U};\n\n// Timer Message Queue Control Block\nstatic osRtxMessageQueue_t os_timer_mq_cb\n    __attribute__((section(\".bss.os.msgqueue.cb\")));\n\n// Timer Message Queue Data\nstatic uint32_t\n    os_timer_mq_data[osRtxMessageQueueMemSize(OS_TIMER_CB_QUEUE, 8) / 4]\n    __attribute__((section(\".bss.os.msgqueue.mem\")));\n\n// Timer Message Queue Attributes\nstatic const osMessageQueueAttr_t os_timer_mq_attr = {\n    NULL,\n    0U,\n    &os_timer_mq_cb,\n    (uint32_t)sizeof(os_timer_mq_cb),\n    &os_timer_mq_data[0],\n    (uint32_t)sizeof(os_timer_mq_data)};\n\n#else\n\nextern void osRtxTimerThread(void *argument);\nvoid osRtxTimerThread(void *argument) { (void)argument; }\n\n#endif // ((OS_TIMER_THREAD_STACK_SIZE != 0) && (OS_TIMER_CB_QUEUE != 0))\n\n// Event Flags Configuration\n// =========================\n\n#if (OS_EVFLAGS_OBJ_MEM != 0)\n\n#if (OS_EVFLAGS_NUM == 0)\n#error \"Invalid number of Event Flags objects!\"\n#endif\n\n// Event Flags Control Blocks\nstatic osRtxEventFlags_t os_ef_cb[OS_EVFLAGS_NUM]\n    __attribute__((section(\".bss.os.evflags.cb\")));\n\n// Memory Pool for Event Flags Control Blocks\nstatic osRtxMpInfo_t os_mpi_ef __attribute__((\n    section(\".data.os.evflags.mpi\"))) = {(uint32_t)OS_EVFLAGS_NUM,\n                                         0U,\n                                         (uint32_t)osRtxEventFlagsCbSize,\n                                         &os_ef_cb[0],\n                                         NULL,\n                                         NULL};\n\n#endif // (OS_EVFLAGS_OBJ_MEM != 0)\n\n// Mutex Configuration\n// ===================\n\n#if (OS_MUTEX_OBJ_MEM != 0)\n\n#if (OS_MUTEX_NUM == 0)\n#error \"Invalid number of Mutex objects!\"\n#endif\n\n// Mutex Control Blocks\nstatic osRtxMutex_t os_mutex_cb[OS_MUTEX_NUM]\n    __attribute__((section(\".bss.os.mutex.cb\")));\n\n// Memory Pool for Mutex Control Blocks\nstatic osRtxMpInfo_t os_mpi_mutex\n    __attribute__((section(\".data.os.mutex.mpi\"))) = {\n        (uint32_t)OS_MUTEX_NUM, 0U,   (uint32_t)osRtxMutexCbSize,\n        &os_mutex_cb[0],        NULL, NULL};\n\n#endif // (OS_MUTEX_OBJ_MEM != 0)\n\n// Semaphore Configuration\n// =======================\n\n#if (OS_SEMAPHORE_OBJ_MEM != 0)\n\n#if (OS_SEMAPHORE_NUM == 0)\n#error \"Invalid number of Semaphore objects!\"\n#endif\n\n// Semaphore Control Blocks\nstatic osRtxSemaphore_t os_semaphore_cb[OS_SEMAPHORE_NUM]\n    __attribute__((section(\".bss.os.semaphore.cb\")));\n\n// Memory Pool for Semaphore Control Blocks\nstatic osRtxMpInfo_t os_mpi_semaphore\n    __attribute__((section(\".data.os.semaphore.mpi\"))) = {\n        (uint32_t)OS_SEMAPHORE_NUM, 0U,   (uint32_t)osRtxSemaphoreCbSize,\n        &os_semaphore_cb[0],        NULL, NULL};\n\n#endif // (OS_SEMAPHORE_OBJ_MEM != 0)\n\n// Memory Pool Configuration\n// =========================\n\n#if (OS_MEMPOOL_OBJ_MEM != 0)\n\n#if (OS_MEMPOOL_NUM == 0)\n#error \"Invalid number of Memory Pool objects!\"\n#endif\n\n// Memory Pool Control Blocks\nstatic osRtxMemoryPool_t os_mp_cb[OS_MEMPOOL_NUM]\n    __attribute__((section(\".bss.os.mempool.cb\")));\n\n// Memory Pool for Memory Pool Control Blocks\nstatic osRtxMpInfo_t os_mpi_mp __attribute__((\n    section(\".data.os.mempool.mpi\"))) = {(uint32_t)OS_MEMPOOL_NUM,\n                                         0U,\n                                         (uint32_t)osRtxMemoryPoolCbSize,\n                                         &os_mp_cb[0],\n                                         NULL,\n                                         NULL};\n\n// Memory Pool for Memory Pool Data Storage\n#if (OS_MEMPOOL_DATA_SIZE != 0)\n#if ((OS_MEMPOOL_DATA_SIZE % 8) != 0)\n#error \"Invalid Data Memory size for Memory Pools!\"\n#endif\nstatic uint64_t os_mp_data[2 + OS_MEMPOOL_NUM + (OS_MEMPOOL_DATA_SIZE / 8)]\n    __attribute__((section(\".bss.os.mempool.mem\")));\n#endif\n\n#endif // (OS_MEMPOOL_OBJ_MEM != 0)\n\n// Message Queue Configuration\n// ===========================\n\n#if (OS_MSGQUEUE_OBJ_MEM != 0)\n\n#if (OS_MSGQUEUE_NUM == 0)\n#error \"Invalid number of Message Queue objects!\"\n#endif\n\n// Message Queue Control Blocks\nstatic osRtxMessageQueue_t os_mq_cb[OS_MSGQUEUE_NUM]\n    __attribute__((section(\".bss.os.msgqueue.cb\")));\n\n// Memory Pool for Message Queue Control Blocks\nstatic osRtxMpInfo_t os_mpi_mq __attribute__((\n    section(\".data.os.msgqueue.mpi\"))) = {(uint32_t)OS_MSGQUEUE_NUM,\n                                          0U,\n                                          (uint32_t)osRtxMessageQueueCbSize,\n                                          &os_mq_cb[0],\n                                          NULL,\n                                          NULL};\n\n// Memory Pool for Message Queue Data Storage\n#if (OS_MSGQUEUE_DATA_SIZE != 0)\n#if ((OS_MSGQUEUE_DATA_SIZE % 8) != 0)\n#error \"Invalid Data Memory size for Message Queues!\"\n#endif\nstatic uint64_t os_mq_data[2 + OS_MSGQUEUE_NUM + (OS_MSGQUEUE_DATA_SIZE / 8)]\n    __attribute__((section(\".bss.os.msgqueue.mem\")));\n#endif\n\n#endif // (OS_MSGQUEUE_OBJ_MEM != 0)\n\n// Event Recorder Configuration\n// ============================\n\n#if (defined(OS_EVR_INIT) && (OS_EVR_INIT != 0))\n\n// Initial Thread configuration covered also Thread Flags and Generic Wait\n#if defined(OS_EVR_THREAD_FILTER)\n#if !defined(OS_EVR_THFLAGS_FILTER)\n#define OS_EVR_THFLAGS_FILTER OS_EVR_THREAD_FILTER\n#endif\n#if !defined(OS_EVR_WAIT_FILTER)\n#define OS_EVR_WAIT_FILTER OS_EVR_THREAD_FILTER\n#endif\n#endif\n\n// Migrate initial filter configuration\n#if defined(OS_EVR_MEMORY_FILTER)\n#define OS_EVR_MEMORY_LEVEL                                                    \\\n  (((OS_EVR_MEMORY_FILTER & 0x80U) != 0U) ? (OS_EVR_MEMORY_FILTER & 0x0FU) : 0U)\n#endif\n#if defined(OS_EVR_KERNEL_FILTER)\n#define OS_EVR_KERNEL_LEVEL                                                    \\\n  (((OS_EVR_KERNEL_FILTER & 0x80U) != 0U) ? (OS_EVR_KERNEL_FILTER & 0x0FU) : 0U)\n#endif\n#if defined(OS_EVR_THREAD_FILTER)\n#define OS_EVR_THREAD_LEVEL                                                    \\\n  (((OS_EVR_THREAD_FILTER & 0x80U) != 0U) ? (OS_EVR_THREAD_FILTER & 0x0FU) : 0U)\n#endif\n#if defined(OS_EVR_WAIT_FILTER)\n#define OS_EVR_WAIT_LEVEL                                                      \\\n  (((OS_EVR_WAIT_FILTER & 0x80U) != 0U) ? (OS_EVR_WAIT_FILTER & 0x0FU) : 0U)\n#endif\n#if defined(OS_EVR_THFLAGS_FILTER)\n#define OS_EVR_THFLAGS_LEVEL                                                   \\\n  (((OS_EVR_THFLAGS_FILTER & 0x80U) != 0U) ? (OS_EVR_THFLAGS_FILTER & 0x0FU)   \\\n                                           : 0U)\n#endif\n#if defined(OS_EVR_EVFLAGS_FILTER)\n#define OS_EVR_EVFLAGS_LEVEL                                                   \\\n  (((OS_EVR_EVFLAGS_FILTER & 0x80U) != 0U) ? (OS_EVR_EVFLAGS_FILTER & 0x0FU)   \\\n                                           : 0U)\n#endif\n#if defined(OS_EVR_TIMER_FILTER)\n#define OS_EVR_TIMER_LEVEL                                                     \\\n  (((OS_EVR_TIMER_FILTER & 0x80U) != 0U) ? (OS_EVR_TIMER_FILTER & 0x0FU) : 0U)\n#endif\n#if defined(OS_EVR_MUTEX_FILTER)\n#define OS_EVR_MUTEX_LEVEL                                                     \\\n  (((OS_EVR_MUTEX_FILTER & 0x80U) != 0U) ? (OS_EVR_MUTEX_FILTER & 0x0FU) : 0U)\n#endif\n#if defined(OS_EVR_SEMAPHORE_FILTER)\n#define OS_EVR_SEMAPHORE_LEVEL                                                 \\\n  (((OS_EVR_SEMAPHORE_FILTER & 0x80U) != 0U)                                   \\\n       ? (OS_EVR_SEMAPHORE_FILTER & 0x0FU)                                     \\\n       : 0U)\n#endif\n#if defined(OS_EVR_MEMPOOL_FILTER)\n#define OS_EVR_MEMPOOL_LEVEL                                                   \\\n  (((OS_EVR_MEMPOOL_FILTER & 0x80U) != 0U) ? (OS_EVR_MEMPOOL_FILTER & 0x0FU)   \\\n                                           : 0U)\n#endif\n#if defined(OS_EVR_MSGQUEUE_FILTER)\n#define OS_EVR_MSGQUEUE_LEVEL                                                  \\\n  (((OS_EVR_MSGQUEUE_FILTER & 0x80U) != 0U) ? (OS_EVR_MSGQUEUE_FILTER & 0x0FU) \\\n                                            : 0U)\n#endif\n\n#if defined(RTE_Compiler_EventRecorder)\n\n// Event Recorder Initialize\n__STATIC_INLINE void evr_initialize(void) {\n\n  (void)EventRecorderInitialize(OS_EVR_LEVEL, (uint32_t)OS_EVR_START);\n\n  (void)EventRecorderEnable(OS_EVR_MEMORY_LEVEL, EvtRtxMemoryNo,\n                            EvtRtxMemoryNo);\n  (void)EventRecorderEnable(OS_EVR_KERNEL_LEVEL, EvtRtxKernelNo,\n                            EvtRtxKernelNo);\n  (void)EventRecorderEnable(OS_EVR_THREAD_LEVEL, EvtRtxThreadNo,\n                            EvtRtxThreadNo);\n  (void)EventRecorderEnable(OS_EVR_WAIT_LEVEL, EvtRtxWaitNo, EvtRtxWaitNo);\n  (void)EventRecorderEnable(OS_EVR_THFLAGS_LEVEL, EvtRtxThreadFlagsNo,\n                            EvtRtxThreadFlagsNo);\n  (void)EventRecorderEnable(OS_EVR_EVFLAGS_LEVEL, EvtRtxEventFlagsNo,\n                            EvtRtxEventFlagsNo);\n  (void)EventRecorderEnable(OS_EVR_TIMER_LEVEL, EvtRtxTimerNo, EvtRtxTimerNo);\n  (void)EventRecorderEnable(OS_EVR_MUTEX_LEVEL, EvtRtxMutexNo, EvtRtxMutexNo);\n  (void)EventRecorderEnable(OS_EVR_SEMAPHORE_LEVEL, EvtRtxSemaphoreNo,\n                            EvtRtxSemaphoreNo);\n  (void)EventRecorderEnable(OS_EVR_MEMPOOL_LEVEL, EvtRtxMemoryPoolNo,\n                            EvtRtxMemoryPoolNo);\n  (void)EventRecorderEnable(OS_EVR_MSGQUEUE_LEVEL, EvtRtxMessageQueueNo,\n                            EvtRtxMessageQueueNo);\n}\n\n#else\n#warning                                                                       \\\n    \"Event Recorder cannot be initialized (Event Recorder component is not selected)!\"\n#define evr_initialize()\n#endif\n\n#endif // (OS_EVR_INIT != 0)\n\n// OS Configuration\n// ================\n\nconst osRtxConfig_t osRtxConfig __USED __attribute__((section(\".rodata\"))) = {\n    // lint -e{835} \"Zero argument to operator\"\n    0U // Flags\n#if (OS_PRIVILEGE_MODE != 0)\n        | osRtxConfigPrivilegedMode\n#endif\n#if (OS_STACK_CHECK != 0)\n        | osRtxConfigStackCheck\n#endif\n#if (OS_STACK_WATERMARK != 0)\n        | osRtxConfigStackWatermark\n#endif\n    ,\n    (uint32_t)OS_TICK_FREQ,\n#if (OS_ROBIN_ENABLE != 0)\n    (uint32_t)OS_ROBIN_TIMEOUT,\n#else\n    0U,\n#endif\n    {&os_isr_queue[0], (uint16_t)(sizeof(os_isr_queue) / sizeof(void *)), 0U},\n    {\n// Memory Pools (Variable Block Size)\n#if ((OS_THREAD_OBJ_MEM != 0) && (OS_THREAD_USER_STACK_SIZE != 0))\n        &os_thread_stack[0],\n        sizeof(os_thread_stack),\n#else\n        NULL, 0U,\n#endif\n#if ((OS_MEMPOOL_OBJ_MEM != 0) && (OS_MEMPOOL_DATA_SIZE != 0))\n        &os_mp_data[0],\n        sizeof(os_mp_data),\n#else\n        NULL, 0U,\n#endif\n#if ((OS_MSGQUEUE_OBJ_MEM != 0) && (OS_MSGQUEUE_DATA_SIZE != 0))\n        &os_mq_data[0],\n        sizeof(os_mq_data),\n#else\n        NULL, 0U,\n#endif\n#if (OS_DYNAMIC_MEM_SIZE != 0)\n        &os_mem[0],\n        (uint32_t)OS_DYNAMIC_MEM_SIZE,\n#else\n        NULL, 0U\n#endif\n    },\n    {\n// Memory Pools (Fixed Block Size)\n#if (OS_THREAD_OBJ_MEM != 0)\n#if (OS_THREAD_DEF_STACK_NUM != 0)\n        &os_mpi_def_stack,\n#else\n        NULL,\n#endif\n        &os_mpi_thread,\n#else\n        NULL,\n        NULL,\n#endif\n#if (OS_TIMER_OBJ_MEM != 0)\n        &os_mpi_timer,\n#else\n        NULL,\n#endif\n#if (OS_EVFLAGS_OBJ_MEM != 0)\n        &os_mpi_ef,\n#else\n        NULL,\n#endif\n#if (OS_MUTEX_OBJ_MEM != 0)\n        &os_mpi_mutex,\n#else\n        NULL,\n#endif\n#if (OS_SEMAPHORE_OBJ_MEM != 0)\n        &os_mpi_semaphore,\n#else\n        NULL,\n#endif\n#if (OS_MEMPOOL_OBJ_MEM != 0)\n        &os_mpi_mp,\n#else\n        NULL,\n#endif\n#if (OS_MSGQUEUE_OBJ_MEM != 0)\n        &os_mpi_mq,\n#else\n        NULL,\n#endif\n    },\n    (uint32_t)OS_STACK_SIZE,\n    &os_idle_thread_attr,\n#if ((OS_TIMER_THREAD_STACK_SIZE != 0) && (OS_TIMER_CB_QUEUE != 0))\n    &os_timer_thread_attr,\n    &os_timer_mq_attr,\n    (uint32_t)OS_TIMER_CB_QUEUE\n#else\n    NULL,\n    NULL,\n    0U\n#endif\n};\n\n// Non weak reference to library irq module\n// lint -esym(526,irqRtxLib)    \"Defined by Exception handlers\"\n// lint -esym(714,irqRtxLibRef) \"Non weak reference\"\n// lint -esym(765,irqRtxLibRef) \"Global scope\"\nextern uint8_t irqRtxLib;\nextern const uint8_t *irqRtxLibRef;\nconst uint8_t *irqRtxLibRef = &irqRtxLib;\n\n// Default User SVC Table\n// lint -esym(714,osRtxUserSVC) \"Referenced by Exception handlers\"\n// lint -esym(765,osRtxUserSVC) \"Global scope\"\n// lint -e{9067} \"extern array declared without size\"\nextern void *const osRtxUserSVC[];\n__WEAK void *const osRtxUserSVC[1] = {(void *)0};\n\n// OS Sections\n// ===========\n\n#if defined(__CC_ARM) ||                                                       \\\n    (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\nstatic uint32_t __os_thread_cb_start__ __attribute__((weakref(\n    \".bss.os.thread.cb$$Base\"))); // lint -esym(728,__os_thread_cb_start__)\nstatic uint32_t __os_thread_cb_end__ __attribute__((weakref(\n    \".bss.os.thread.cb$$Limit\"))); // lint -esym(728,__os_thread_cb_end__)\nstatic uint32_t __os_timer_cb_start__ __attribute__((weakref(\n    \".bss.os.timer.cb$$Base\"))); // lint -esym(728,__os_timer_cb_start__)\nstatic uint32_t __os_timer_cb_end__ __attribute__((\n    weakref(\".bss.os.timer.cb$$Limit\"))); // lint -esym(728,__os_timer_cb_end__)\nstatic uint32_t __os_evflags_cb_start__ __attribute__((weakref(\n    \".bss.os.evflags.cb$$Base\"))); // lint -esym(728,__os_evflags_cb_start__)\nstatic uint32_t __os_evflags_cb_end__ __attribute__((weakref(\n    \".bss.os.evflags.cb$$Limit\"))); // lint -esym(728,__os_evflags_cb_end__)\nstatic uint32_t __os_mutex_cb_start__ __attribute__((weakref(\n    \".bss.os.mutex.cb$$Base\"))); // lint -esym(728,__os_mutex_cb_start__)\nstatic uint32_t __os_mutex_cb_end__ __attribute__((\n    weakref(\".bss.os.mutex.cb$$Limit\"))); // lint -esym(728,__os_mutex_cb_end__)\nstatic uint32_t __os_semaphore_cb_start__ __attribute__((weakref(\n    \".bss.os.semaphore.cb$$Base\"))); // lint\n                                     // -esym(728,__os_semaphore_cb_start__)\nstatic uint32_t __os_semaphore_cb_end__ __attribute__((weakref(\n    \".bss.os.semaphore.cb$$Limit\"))); // lint -esym(728,__os_semaphore_cb_end__)\nstatic uint32_t __os_mempool_cb_start__ __attribute__((weakref(\n    \".bss.os.mempool.cb$$Base\"))); // lint -esym(728,__os_mempool_cb_start__)\nstatic uint32_t __os_mempool_cb_end__ __attribute__((weakref(\n    \".bss.os.mempool.cb$$Limit\"))); // lint -esym(728,__os_mempool_cb_end__)\nstatic uint32_t __os_msgqueue_cb_start__ __attribute__((weakref(\n    \".bss.os.msgqueue.cb$$Base\"))); // lint -esym(728,__os_msgqueue_cb_start__)\nstatic uint32_t __os_msgqueue_cb_end__ __attribute__((weakref(\n    \".bss.os.msgqueue.cb$$Limit\"))); // lint -esym(728,__os_msgqueue_cb_end__)\n#else\nextern uint32_t __os_thread_cb_start__ __attribute__((weak));\nextern uint32_t __os_thread_cb_end__ __attribute__((weak));\nextern uint32_t __os_timer_cb_start__ __attribute__((weak));\nextern uint32_t __os_timer_cb_end__ __attribute__((weak));\nextern uint32_t __os_evflags_cb_start__ __attribute__((weak));\nextern uint32_t __os_evflags_cb_end__ __attribute__((weak));\nextern uint32_t __os_mutex_cb_start__ __attribute__((weak));\nextern uint32_t __os_mutex_cb_end__ __attribute__((weak));\nextern uint32_t __os_semaphore_cb_start__ __attribute__((weak));\nextern uint32_t __os_semaphore_cb_end__ __attribute__((weak));\nextern uint32_t __os_mempool_cb_start__ __attribute__((weak));\nextern uint32_t __os_mempool_cb_end__ __attribute__((weak));\nextern uint32_t __os_msgqueue_cb_start__ __attribute__((weak));\nextern uint32_t __os_msgqueue_cb_end__ __attribute__((weak));\n#endif\n\n// lint -e{9067} \"extern array declared without size\"\nextern const uint32_t *const os_cb_sections[];\n\n// lint -esym(714,os_cb_sections) \"Referenced by debugger\"\n// lint -esym(765,os_cb_sections) \"Global scope\"\nconst uint32_t *const os_cb_sections[] __USED\n    __attribute__((section(\".rodata\"))) = {\n        &__os_thread_cb_start__,    &__os_thread_cb_end__,\n        &__os_timer_cb_start__,     &__os_timer_cb_end__,\n        &__os_evflags_cb_start__,   &__os_evflags_cb_end__,\n        &__os_mutex_cb_start__,     &__os_mutex_cb_end__,\n        &__os_semaphore_cb_start__, &__os_semaphore_cb_end__,\n        &__os_mempool_cb_start__,   &__os_mempool_cb_end__,\n        &__os_msgqueue_cb_start__,  &__os_msgqueue_cb_end__};\n\n// OS Initialization\n// =================\n\n#if defined(__CC_ARM) ||                                                       \\\n    (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))\n\n#ifndef __MICROLIB\n// lint -esym(714,_platform_post_stackheap_init) \"Referenced by C library\"\n// lint -esym(765,_platform_post_stackheap_init) \"Global scope\"\nextern void _platform_post_stackheap_init(void);\n__WEAK void _platform_post_stackheap_init(void) { (void)osKernelInitialize(); }\n#endif\n\n#elif defined(__GNUC__)\nosThreadAttr_t os_thread_attr_main = {\"main\", osThreadDetached, NULL, 0, NULL,\n                                      0,      osPriorityNormal, 0,    0};\n\n#ifndef OS_SCHEDULERSTKSIZE\n#define OS_SCHEDULERSTKSIZE 512\n#endif\n\nextern uint32_t __StackTop[];\n#define INITIAL_SP ((uint32_t)__StackTop)\n\nextern uint32_t __StackLimit[];\n#define MAIN_STACK_BUF (__StackLimit)\n\n#define ROUND_UP(x, align) (((uint32_t)(x) + (align - 1)) & ~(align - 1))\n#define ROUND_DOWN(x, align) ((uint32_t)(x) & ~(align - 1))\n\nvoid set_main_stack(void) {\n  // That is the bottom of the main stack block: no collision detection\n  os_thread_attr_main.stack_mem = (uint32_t *)ROUND_UP(MAIN_STACK_BUF, 8);\n\n  // Leave OS_SCHEDULERSTKSIZE words for the scheduler and interrupts\n  os_thread_attr_main.stack_size =\n      ROUND_DOWN((INITIAL_SP - (unsigned int)ROUND_UP(MAIN_STACK_BUF, 8)) -\n                     (OS_SCHEDULERSTKSIZE * 4),\n                 8);\n}\n\nextern void software_init_hook(void);\n__WEAK void software_init_hook(void) {\n  __asm(\".syntax unified\\n\"\n        \".thumb\\n\"\n        \"movs r0,#0\\n\"\n        \"movs r1,#0\\n\"\n        \"mov  r4,r0\\n\"\n        \"mov  r5,r1\\n\"\n        \"bl   SystemCoreClockUpdate\\n\"\n        \"bl   osKernelInitialize\\n\"\n        \"ldr  r0,= __libc_fini_array\\n\"\n        \"bl   atexit\\n\"\n        \"bl   __libc_init_array\\n\"\n        \"mov  r0,r4\\n\"\n        \"mov  r1,r5\\n\"\n        \"bl   set_main_stack\\n\"\n        \"ldr  r0,=main\\n\"\n        \"movs r1,#0\\n\"\n        \"ldr r2,=os_thread_attr_main\\n\"\n        \"bl   osThreadNew\\n\"\n        \"bl   osKernelStart\\n\"\n        \"bl   exit\\n\");\n}\n#endif\n\n// OS Hooks\n// ========\n\n// RTOS Kernel Pre-Initialization Hook\n#if (defined(OS_EVR_INIT) && (OS_EVR_INIT != 0))\nvoid osRtxKernelPreInit(void);\nvoid osRtxKernelPreInit(void) {\n  if (osKernelGetState() == osKernelInactive) {\n    evr_initialize();\n  }\n}\n#endif\n\n// C/C++ Standard Library Multithreading Interface\n// ===============================================\n\n#if (!defined(RTX_NO_MULTITHREAD_CLIB) &&                                      \\\n     (defined(__CC_ARM) ||                                                     \\\n      (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))) &&           \\\n     !defined(__MICROLIB))\n\n#define LIBSPACE_SIZE 96\n\n// lint -esym(714,__user_perthread_libspace,_mutex_*) \"Referenced by C library\"\n// lint -esym(765,__user_perthread_libspace,_mutex_*) \"Global scope\"\n// lint -esym(9003, os_libspace*) \"variables 'os_libspace*' defined at module\n// scope\"\n\n// Memory for libspace\nstatic uint32_t os_libspace[OS_THREAD_LIBSPACE_NUM + 1][LIBSPACE_SIZE / 4]\n    __attribute__((section(\".bss.os.libspace\")));\n\n// Thread IDs for libspace\nstatic osThreadId_t os_libspace_id[OS_THREAD_LIBSPACE_NUM]\n    __attribute__((section(\".bss.os.libspace\")));\n\n// Check if Kernel has been started\nstatic uint32_t os_kernel_is_active(void) {\n  static uint8_t os_kernel_active = 0U;\n\n  if (os_kernel_active == 0U) {\n    if (osKernelGetState() > osKernelReady) {\n      os_kernel_active = 1U;\n    }\n  }\n  return (uint32_t)os_kernel_active;\n}\n\n// Provide libspace for current thread\nvoid *__user_perthread_libspace(void);\nvoid *__user_perthread_libspace(void) {\n  osThreadId_t id;\n  uint32_t n;\n\n  if (os_kernel_is_active() != 0U) {\n    id = osThreadGetId();\n    for (n = 0U; n < (uint32_t)OS_THREAD_LIBSPACE_NUM; n++) {\n      if (os_libspace_id[n] == NULL) {\n        os_libspace_id[n] = id;\n      }\n      if (os_libspace_id[n] == id) {\n        break;\n      }\n    }\n    if (n == (uint32_t)OS_THREAD_LIBSPACE_NUM) {\n      (void)osRtxErrorNotify(osRtxErrorClibSpace, id);\n    }\n  } else {\n    n = OS_THREAD_LIBSPACE_NUM;\n  }\n\n  // lint -e{9087} \"cast between pointers to different object types\"\n  return (void *)&os_libspace[n][0];\n}\n\n// Mutex identifier\ntypedef void *mutex;\n\n// lint -save \"Function prototypes defined in C library\"\n// lint -e970 \"Use of 'int' outside of a typedef\"\n// lint -e818 \"Pointer 'm' could be declared as pointing to const\"\n\n// Initialize mutex\n__USED\nint _mutex_initialize(mutex *m);\nint _mutex_initialize(mutex *m) {\n  int result;\n\n  *m = osMutexNew(NULL);\n  if (*m != NULL) {\n    result = 1;\n  } else {\n    result = 0;\n    (void)osRtxErrorNotify(osRtxErrorClibMutex, m);\n  }\n  return result;\n}\n\n// Acquire mutex\n__USED\nvoid _mutex_acquire(mutex *m);\nvoid _mutex_acquire(mutex *m) {\n  if (os_kernel_is_active() != 0U) {\n    (void)osMutexAcquire(*m, osWaitForever);\n  }\n}\n\n// Release mutex\n__USED\nvoid _mutex_release(mutex *m);\nvoid _mutex_release(mutex *m) {\n  if (os_kernel_is_active() != 0U) {\n    (void)osMutexRelease(*m);\n  }\n}\n\n// Free mutex\n__USED\nvoid _mutex_free(mutex *m);\nvoid _mutex_free(mutex *m) { (void)osMutexDelete(*m); }\n\n// lint -restore\n\n#endif\n"
  },
  {
    "path": "rtos/rtx5/rtx_lib.h",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       RTX Library definitions\n *\n * -----------------------------------------------------------------------------\n */\n\n#ifndef RTX_LIB_H_\n#define RTX_LIB_H_\n\n#include \n#include \"rtx_core_c.h\"                 // Cortex core definitions\n#if ((defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0)) || \\\n     (defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)))\n#include \"tz_context.h\"                 // TrustZone Context API\n#endif\n#include \"os_tick.h\"                    // CMSIS OS Tick API\n#include \"cmsis_os2.h\"                  // CMSIS RTOS API\n#include \"rtx_config.h\"                 // RTX Configuration\n#include \"rtx_os.h\"                     // RTX OS definitions\n#include \"rtx_evr.h\"                    // RTX Event Recorder definitions\n\n\n//  ==== Library defines ====\n\n#define os_thread_t         osRtxThread_t\n#define os_timer_t          osRtxTimer_t\n#define os_timer_finfo_t    osRtxTimerFinfo_t\n#define os_event_flags_t    osRtxEventFlags_t\n#define os_mutex_t          osRtxMutex_t\n#define os_semaphore_t      osRtxSemaphore_t\n#define os_mp_info_t        osRtxMpInfo_t\n#define os_memory_pool_t    osRtxMemoryPool_t\n#define os_message_t        osRtxMessage_t\n#define os_message_queue_t  osRtxMessageQueue_t\n#define os_object_t         osRtxObject_t\n\n//  ==== Inline functions ====\n\n// Thread ID\n__STATIC_INLINE os_thread_t *osRtxThreadId (osThreadId_t thread_id) {\n  //lint -e{9079} -e{9087} \"cast from pointer to void to pointer to object type\" [MISRA Note 2]\n  return ((os_thread_t *)thread_id);\n}\n// Timer ID\n__STATIC_INLINE os_timer_t *osRtxTimerId (osTimerId_t timer_id) {\n  //lint -e{9079} -e{9087} \"cast from pointer to void to pointer to object type\" [MISRA Note 2]\n  return ((os_timer_t *)timer_id);\n}\n// Event Flags ID\n__STATIC_INLINE os_event_flags_t *osRtxEventFlagsId (osEventFlagsId_t ef_id) {\n  //lint -e{9079} -e{9087} \"cast from pointer to void to pointer to object type\" [MISRA Note 2]\n  return ((os_event_flags_t *)ef_id);\n}\n// Mutex ID\n__STATIC_INLINE os_mutex_t *osRtxMutexId (osMutexId_t mutex_id) {\n  //lint -e{9079} -e{9087} \"cast from pointer to void to pointer to object type\" [MISRA Note 2]\n  return ((os_mutex_t *)mutex_id);\n}\n// Semaphore ID\n__STATIC_INLINE os_semaphore_t *osRtxSemaphoreId (osSemaphoreId_t semaphore_id) {\n  //lint -e{9079} -e{9087} \"cast from pointer to void to pointer to object type\" [MISRA Note 2]\n  return ((os_semaphore_t *)semaphore_id);\n}\n// Memory Pool ID\n__STATIC_INLINE os_memory_pool_t *osRtxMemoryPoolId (osMemoryPoolId_t mp_id) {\n  //lint -e{9079} -e{9087} \"cast from pointer to void to pointer to object type\" [MISRA Note 2]\n  return ((os_memory_pool_t *)mp_id);\n}\n// Message Queue ID\n__STATIC_INLINE os_message_queue_t *osRtxMessageQueueId (osMessageQueueId_t mq_id) {\n  //lint -e{9079} -e{9087} \"cast from pointer to void to pointer to object type\" [MISRA Note 2]\n  return ((os_message_queue_t *)mq_id);\n}\n\n// Generic Object\n__STATIC_INLINE os_object_t *osRtxObject (void *object) {\n  //lint -e{9079} -e{9087} \"cast from pointer to void to pointer to object type\" [MISRA Note 3]\n  return ((os_object_t *)object);\n}\n\n// Thread Object\n__STATIC_INLINE os_thread_t *osRtxThreadObject (os_object_t *object) {\n  //lint -e{740} -e{826} -e{9087} \"cast from pointer to generic object to specific object\" [MISRA Note 4]\n  return ((os_thread_t *)object);\n}\n// Timer Object\n__STATIC_INLINE os_timer_t *osRtxTimerObject (os_object_t *object) {\n  //lint -e{740} -e{826} -e{9087} \"cast from pointer to generic object to specific object\" [MISRA Note 4]\n  return ((os_timer_t *)object);\n}\n// Event Flags Object\n__STATIC_INLINE os_event_flags_t *osRtxEventFlagsObject (os_object_t *object) {\n  //lint -e{740} -e{826} -e{9087} \"cast from pointer to generic object to specific object\" [MISRA Note 4]\n  return ((os_event_flags_t *)object);\n}\n// Mutex Object\n__STATIC_INLINE os_mutex_t *osRtxMutexObject (os_object_t *object) {\n  //lint -e{740} -e{826} -e{9087} \"cast from pointer to generic object to specific object\" [MISRA Note 4]\n  return ((os_mutex_t *)object);\n}\n// Semaphore Object\n__STATIC_INLINE os_semaphore_t *osRtxSemaphoreObject (os_object_t *object) {\n  //lint -e{740} -e{826} -e{9087} \"cast from pointer to generic object to specific object\" [MISRA Note 4]\n  return ((os_semaphore_t *)object);\n}\n// Memory Pool Object\n__STATIC_INLINE os_memory_pool_t *osRtxMemoryPoolObject (os_object_t *object) {\n  //lint -e{740} -e{826} -e{9087} \"cast from pointer to generic object to specific object\" [MISRA Note 4]\n  return ((os_memory_pool_t *)object);\n}\n// Message Queue Object\n__STATIC_INLINE os_message_queue_t *osRtxMessageQueueObject (os_object_t *object) {\n  //lint -e{740} -e{826} -e{9087} \"cast from pointer to generic object to specific object\" [MISRA Note 4]\n  return ((os_message_queue_t *)object);\n}\n// Message Object\n__STATIC_INLINE os_message_t *osRtxMessageObject (os_object_t *object) {\n  //lint -e{740} -e{826} -e{9087} \"cast from pointer to generic object to specific object\" [MISRA Note 4]\n  return ((os_message_t *)object);\n}\n\n// Kernel State\n__STATIC_INLINE osKernelState_t osRtxKernelState (void) {\n  //lint -e{9030} -e{9034} \"cast to enum\"\n  return ((osKernelState_t)(osRtxInfo.kernel.state));\n}\n\n// Thread State\n__STATIC_INLINE osThreadState_t osRtxThreadState (const os_thread_t *thread) {\n  uint8_t state = thread->state & osRtxThreadStateMask;\n  //lint -e{9030} -e{9034} \"cast to enum\"\n  return ((osThreadState_t)state);\n}\n\n// Thread Priority\n__STATIC_INLINE osPriority_t osRtxThreadPriority (const os_thread_t *thread) {\n  //lint -e{9030} -e{9034} \"cast to enum\"\n  return ((osPriority_t)thread->priority);\n}\n\n// Kernel Get State\n__STATIC_INLINE uint8_t osRtxKernelGetState (void) {\n  return osRtxInfo.kernel.state;\n}\n\n// Thread Get/Set Running\n__STATIC_INLINE os_thread_t *osRtxThreadGetRunning (void) {\n  return osRtxInfo.thread.run.curr;\n}\n__STATIC_INLINE void osRtxThreadSetRunning (os_thread_t *thread) {\n  osRtxInfo.thread.run.curr = thread;\n}\n\n\n//  ==== Library functions ====\n\n// Kernel Library functions\nextern void         osRtxKernelPreInit (void);\n\n// Thread Library functions\nextern void         osRtxThreadListPut    (os_object_t *object, os_thread_t *thread);\nextern os_thread_t *osRtxThreadListGet    (os_object_t *object);\nextern void         osRtxThreadListSort   (os_thread_t *thread);\nextern void         osRtxThreadListRemove (os_thread_t *thread);\nextern void         osRtxThreadReadyPut   (os_thread_t *thread);\nextern void         osRtxThreadDelayTick  (void);\nextern uint32_t    *osRtxThreadRegPtr     (const os_thread_t *thread);\nextern void         osRtxThreadSwitch     (os_thread_t *thread);\n#if __RTX_CPU_STATISTICS__\nuint32_t rtx_get_hwticks(void);\n#endif\nextern void         osRtxThreadDispatch   (os_thread_t *thread);\nextern void         osRtxThreadWaitExit   (os_thread_t *thread, uint32_t ret_val, bool_t dispatch);\nextern bool_t       osRtxThreadWaitEnter  (uint8_t state, uint32_t timeout);\nextern void         osRtxThreadStackCheck (void);\nextern bool_t       osRtxThreadStartup    (void);\n\n// Timer Library functions\nextern void osRtxTimerThread (void *argument);\n\n// Mutex Library functions\nextern void osRtxMutexOwnerRelease (os_mutex_t *mutex_list);\n\n// Memory Heap Library functions\nextern uint32_t osRtxMemoryInit (void *mem, uint32_t size);\nextern void    *osRtxMemoryAlloc(void *mem, uint32_t size, uint32_t type);\nextern uint32_t osRtxMemoryFree (void *mem, void *block);\n\n// Memory Pool Library functions\nextern uint32_t   osRtxMemoryPoolInit  (os_mp_info_t *mp_info, uint32_t block_count, uint32_t block_size, void *block_mem);\nextern void      *osRtxMemoryPoolAlloc (os_mp_info_t *mp_info);\nextern osStatus_t osRtxMemoryPoolFree  (os_mp_info_t *mp_info, void *block);\n\n// System Library functions\nextern void osRtxTick_Handler   (void);\nextern void osRtxPendSV_Handler (void);\nextern void osRtxPostProcess    (os_object_t *object);\n\n\n#endif  // RTX_LIB_H_\n"
  },
  {
    "path": "rtos/rtx5/rtx_memory.c",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Memory functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  Memory Pool Header structure\ntypedef struct {\n  uint32_t size; // Memory Pool size\n  uint32_t used; // Used Memory\n} mem_head_t;\n\n//  Memory Block Header structure\ntypedef struct mem_block_s {\n  struct mem_block_s *next; // Next Memory Block in list\n  uint32_t info;            // Block Info or max used Memory (in last block)\n} mem_block_t;\n\n//  Memory Block Info: Length = <31:2>:'00', Type = <1:0>\n#define MB_INFO_LEN_MASK 0xFFFFFFFCU  // Length mask\n#define MB_INFO_TYPE_MASK 0x00000003U // Type mask\n\n//  Memory Head Pointer\n__STATIC_INLINE mem_head_t *MemHeadPtr(void *mem) {\n  // lint -e{9079} -e{9087} \"conversion from pointer to void to pointer to other\n  // type\" [MISRA Note 6]\n  return ((mem_head_t *)mem);\n}\n\n//  Memory Block Pointer\n__STATIC_INLINE mem_block_t *MemBlockPtr(void *mem, uint32_t offset) {\n  uint32_t addr;\n  mem_block_t *ptr;\n\n  // lint --e{923} --e{9078} \"cast between pointer and unsigned int\" [MISRA Note\n  // 8]\n  addr = (uint32_t)mem + offset;\n  ptr = (mem_block_t *)addr;\n\n  return ptr;\n}\n\n//  ==== Library functions ====\n\n/// Initialize Memory Pool with variable block size.\n/// \\param[in]  mem             pointer to memory pool.\n/// \\param[in]  size            size of a memory pool in bytes.\n/// \\return 1 - success, 0 - failure.\n__WEAK uint32_t osRtxMemoryInit(void *mem, uint32_t size) {\n  mem_head_t *head;\n  mem_block_t *ptr;\n\n  // Check parameters\n  // lint -e{923} \"cast from pointer to unsigned int\" [MISRA Note 7]\n  if ((mem == NULL) || (((uint32_t)mem & 7U) != 0U) || ((size & 7U) != 0U) ||\n      (size < (sizeof(mem_head_t) + (2U * sizeof(mem_block_t))))) {\n    EvrRtxMemoryInit(mem, size, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  // Initialize memory pool header\n  head = MemHeadPtr(mem);\n  head->size = size;\n  head->used = sizeof(mem_head_t) + sizeof(mem_block_t);\n\n  // Initialize first and last block header\n  ptr = MemBlockPtr(mem, sizeof(mem_head_t));\n  ptr->next = MemBlockPtr(mem, size - sizeof(mem_block_t));\n  ptr->next->next = NULL;\n  ptr->next->info = sizeof(mem_head_t) + sizeof(mem_block_t);\n  ptr->info = 0U;\n\n  EvrRtxMemoryInit(mem, size, 1U);\n\n  return 1U;\n}\n\n/// Allocate a memory block from a Memory Pool.\n/// \\param[in]  mem             pointer to memory pool.\n/// \\param[in]  size            size of a memory block in bytes.\n/// \\param[in]  type            memory block type: 0 - generic, 1 - control\n/// block \\return allocated memory block or NULL in case of no memory is\n/// available.\n__WEAK void *osRtxMemoryAlloc(void *mem, uint32_t size, uint32_t type) {\n  mem_block_t *ptr;\n  mem_block_t *p, *p_new;\n  uint32_t block_size;\n  uint32_t hole_size;\n\n  // Check parameters\n  if ((mem == NULL) || (size == 0U) || ((type & ~MB_INFO_TYPE_MASK) != 0U)) {\n    EvrRtxMemoryAlloc(mem, size, type, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  // Add block header to size\n  block_size = size + sizeof(mem_block_t);\n  // Make sure that block is 8-byte aligned\n  block_size = (block_size + 7U) & ~((uint32_t)7U);\n\n  // Search for hole big enough\n  p = MemBlockPtr(mem, sizeof(mem_head_t));\n  for (;;) {\n    // lint -e{923} -e{9078} \"cast from pointer to unsigned int\"\n    hole_size = (uint32_t)p->next - (uint32_t)p;\n    hole_size -= p->info & MB_INFO_LEN_MASK;\n    if (hole_size >= block_size) {\n      // Hole found\n      break;\n    }\n    p = p->next;\n    if (p->next == NULL) {\n      // Failed (end of list)\n      EvrRtxMemoryAlloc(mem, size, type, NULL);\n      // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n      return NULL;\n    }\n  }\n\n  // Update used memory\n  (MemHeadPtr(mem))->used += block_size;\n\n  // Update max used memory\n  p_new = MemBlockPtr(mem, (MemHeadPtr(mem))->size - sizeof(mem_block_t));\n  if (p_new->info < (MemHeadPtr(mem))->used) {\n    p_new->info = (MemHeadPtr(mem))->used;\n  }\n\n  // Allocate block\n  if (p->info == 0U) {\n    // No block allocated, set info of first element\n    p->info = block_size | type;\n    ptr = MemBlockPtr(p, sizeof(mem_block_t));\n  } else {\n    // Insert new element into the list\n    p_new = MemBlockPtr(p, p->info & MB_INFO_LEN_MASK);\n    p_new->next = p->next;\n    p_new->info = block_size | type;\n    p->next = p_new;\n    ptr = MemBlockPtr(p_new, sizeof(mem_block_t));\n  }\n\n  EvrRtxMemoryAlloc(mem, size, type, ptr);\n\n  return ptr;\n}\n\n/// Return an allocated memory block back to a Memory Pool.\n/// \\param[in]  mem             pointer to memory pool.\n/// \\param[in]  block           memory block to be returned to the memory pool.\n/// \\return 1 - success, 0 - failure.\n__WEAK uint32_t osRtxMemoryFree(void *mem, void *block) {\n  const mem_block_t *ptr;\n  mem_block_t *p, *p_prev;\n\n  // Check parameters\n  if ((mem == NULL) || (block == NULL)) {\n    EvrRtxMemoryFree(mem, block, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  // Memory block header\n  ptr = MemBlockPtr(block, 0U);\n  ptr--;\n\n  // Search for block header\n  p_prev = NULL;\n  p = MemBlockPtr(mem, sizeof(mem_head_t));\n  while (p != ptr) {\n    p_prev = p;\n    p = p->next;\n    if (p == NULL) {\n      // Not found\n      EvrRtxMemoryFree(mem, block, 0U);\n      // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n      return 0U;\n    }\n  }\n\n  // Update used memory\n  (MemHeadPtr(mem))->used -= p->info & MB_INFO_LEN_MASK;\n\n  // Free block\n  if (p_prev == NULL) {\n    // Release first block, only set info to 0\n    p->info = 0U;\n  } else {\n    // Discard block from chained list\n    p_prev->next = p->next;\n  }\n\n  EvrRtxMemoryFree(mem, block, 1U);\n\n  return 1U;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_mempool.c",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Memory Pool functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  OS Runtime Object Memory Usage\n#if ((defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0)))\nosRtxObjectMemUsage_t osRtxMemoryPoolMemUsage\n    __attribute__((section(\".data.os.mempool.obj\"))) = {0U, 0U, 0U};\n#endif\n\n//  ==== Library functions ====\n\n/// Initialize Memory Pool.\n/// \\param[in]  mp_info         memory pool info.\n/// \\param[in]  block_count     maximum number of memory blocks in memory pool.\n/// \\param[in]  block_size      size of a memory block in bytes.\n/// \\param[in]  block_mem       pointer to memory for block storage.\n/// \\return 1 - success, 0 - failure.\nuint32_t osRtxMemoryPoolInit(os_mp_info_t *mp_info, uint32_t block_count,\n                             uint32_t block_size, void *block_mem) {\n  // lint --e{9079} --e{9087} \"conversion from pointer to void to pointer to\n  // other type\" [MISRA Note 6]\n  void *mem;\n  void *block;\n\n  // Check parameters\n  if ((mp_info == NULL) || (block_count == 0U) || (block_size == 0U) ||\n      (block_mem == NULL)) {\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  // Initialize information structure\n  mp_info->max_blocks = block_count;\n  mp_info->used_blocks = 0U;\n  mp_info->block_size = block_size;\n  mp_info->block_base = block_mem;\n  mp_info->block_free = block_mem;\n  mp_info->block_lim = &(((uint8_t *)block_mem)[block_count * block_size]);\n\n  EvrRtxMemoryBlockInit(mp_info, block_count, block_size, block_mem);\n\n  // Link all free blocks\n  mem = block_mem;\n  while (--block_count != 0U) {\n    block = &((uint8_t *)mem)[block_size];\n    *((void **)mem) = block;\n    mem = block;\n  }\n  *((void **)mem) = NULL;\n\n  return 1U;\n}\n\n/// Allocate a memory block from a Memory Pool.\n/// \\param[in]  mp_info         memory pool info.\n/// \\return address of the allocated memory block or NULL in case of no memory\n/// is available.\nvoid *osRtxMemoryPoolAlloc(os_mp_info_t *mp_info) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  void *block;\n\n  if (mp_info == NULL) {\n    EvrRtxMemoryBlockAlloc(NULL, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  block = mp_info->block_free;\n  if (block != NULL) {\n    // lint --e{9079} --e{9087} \"conversion from pointer to void to pointer to\n    // other type\"\n    mp_info->block_free = *((void **)block);\n    mp_info->used_blocks++;\n  }\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  block = atomic_link_get(&mp_info->block_free);\n  if (block != NULL) {\n    (void)atomic_inc32(&mp_info->used_blocks);\n  }\n#endif\n\n  EvrRtxMemoryBlockAlloc(mp_info, block);\n\n  return block;\n}\n\n/// Return an allocated memory block back to a Memory Pool.\n/// \\param[in]  mp_info         memory pool info.\n/// \\param[in]  block           address of the allocated memory block to be\n/// returned to the memory pool. \\return status code that indicates the\n/// execution status of the function.\nosStatus_t osRtxMemoryPoolFree(os_mp_info_t *mp_info, void *block) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n\n  // lint -e{946} \"Relational operator applied to pointers\"\n  if ((mp_info == NULL) || (block < mp_info->block_base) ||\n      (block >= mp_info->block_lim)) {\n    EvrRtxMemoryBlockFree(mp_info, block, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  // lint --e{9079} --e{9087} \"conversion from pointer to void to pointer to\n  // other type\"\n  *((void **)block) = mp_info->block_free;\n  mp_info->block_free = block;\n  mp_info->used_blocks--;\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  atomic_link_put(&mp_info->block_free, block);\n  (void)atomic_dec32(&mp_info->used_blocks);\n#endif\n\n  EvrRtxMemoryBlockFree(mp_info, block, (int32_t)osOK);\n\n  return osOK;\n}\n\n//  ==== Post ISR processing ====\n\n/// Memory Pool post ISR processing.\n/// \\param[in]  mp              memory pool object.\nstatic void osRtxMemoryPoolPostProcess(os_memory_pool_t *mp) {\n  void *block;\n  os_thread_t *thread;\n\n  // Check if Thread is waiting to allocate memory\n  if (mp->thread_list != NULL) {\n    // Allocate memory\n    block = osRtxMemoryPoolAlloc(&mp->mp_info);\n    if (block != NULL) {\n      // Wakeup waiting Thread with highest Priority\n      thread = osRtxThreadListGet(osRtxObject(mp));\n      // lint -e{923} \"cast from pointer to unsigned int\"\n      osRtxThreadWaitExit(thread, (uint32_t)block, FALSE);\n      EvrRtxMemoryPoolAllocated(mp, block);\n    }\n  }\n}\n\n//  ==== Service Calls ====\n\n/// Create and Initialize a Memory Pool object.\n/// \\note API identical to osMemoryPoolNew\nstatic osMemoryPoolId_t svcRtxMemoryPoolNew(uint32_t block_count,\n                                            uint32_t block_size,\n                                            const osMemoryPoolAttr_t *attr) {\n  os_memory_pool_t *mp;\n  void *mp_mem;\n  uint32_t mp_size;\n  uint32_t b_count;\n  uint32_t b_size;\n  uint32_t size;\n  uint8_t flags;\n  const char *name;\n\n  // Check parameters\n  if ((block_count == 0U) || (block_size == 0U)) {\n    EvrRtxMemoryPoolError(NULL, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n  b_count = block_count;\n  b_size = (block_size + 3U) & ~3UL;\n  if ((__CLZ(b_count) + __CLZ(b_size)) < 32U) {\n    EvrRtxMemoryPoolError(NULL, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  size = b_count * b_size;\n\n  // Process attributes\n  if (attr != NULL) {\n    name = attr->name;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    mp = attr->cb_mem;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    mp_mem = attr->mp_mem;\n    mp_size = attr->mp_size;\n    if (mp != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)mp & 3U) != 0U) ||\n          (attr->cb_size < sizeof(os_memory_pool_t))) {\n        EvrRtxMemoryPoolError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (attr->cb_size != 0U) {\n        EvrRtxMemoryPoolError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n    if (mp_mem != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)mp_mem & 3U) != 0U) || (mp_size < size)) {\n        EvrRtxMemoryPoolError(NULL, osRtxErrorInvalidDataMemory);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (mp_size != 0U) {\n        EvrRtxMemoryPoolError(NULL, osRtxErrorInvalidDataMemory);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n  } else {\n    name = NULL;\n    mp = NULL;\n    mp_mem = NULL;\n  }\n\n  // Allocate object memory if not provided\n  if (mp == NULL) {\n    if (osRtxInfo.mpi.memory_pool != NULL) {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      mp = osRtxMemoryPoolAlloc(osRtxInfo.mpi.memory_pool);\n    } else {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      mp = osRtxMemoryAlloc(osRtxInfo.mem.common, sizeof(os_memory_pool_t), 1U);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    if (mp != NULL) {\n      uint32_t used;\n      osRtxMemoryPoolMemUsage.cnt_alloc++;\n      used =\n          osRtxMemoryPoolMemUsage.cnt_alloc - osRtxMemoryPoolMemUsage.cnt_free;\n      if (osRtxMemoryPoolMemUsage.max_used < used) {\n        osRtxMemoryPoolMemUsage.max_used = used;\n      }\n    }\n#endif\n    flags = osRtxFlagSystemObject;\n  } else {\n    flags = 0U;\n  }\n\n  // Allocate data memory if not provided\n  if ((mp != NULL) && (mp_mem == NULL)) {\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 5]\n    mp_mem = osRtxMemoryAlloc(osRtxInfo.mem.mp_data, size, 0U);\n    if (mp_mem == NULL) {\n      if ((flags & osRtxFlagSystemObject) != 0U) {\n        if (osRtxInfo.mpi.memory_pool != NULL) {\n          (void)osRtxMemoryPoolFree(osRtxInfo.mpi.memory_pool, mp);\n        } else {\n          (void)osRtxMemoryFree(osRtxInfo.mem.common, mp);\n        }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n        osRtxMemoryPoolMemUsage.cnt_free++;\n#endif\n      }\n      mp = NULL;\n    } else {\n      memset(mp_mem, 0, size);\n    }\n    flags |= osRtxFlagSystemMemory;\n  }\n\n  if (mp != NULL) {\n    // Initialize control block\n    mp->id = osRtxIdMemoryPool;\n    mp->flags = flags;\n    mp->name = name;\n    mp->thread_list = NULL;\n    (void)osRtxMemoryPoolInit(&mp->mp_info, b_count, b_size, mp_mem);\n\n    // Register post ISR processing function\n    osRtxInfo.post_process.memory_pool = osRtxMemoryPoolPostProcess;\n\n    EvrRtxMemoryPoolCreated(mp, mp->name);\n  } else {\n    EvrRtxMemoryPoolError(NULL, (int32_t)osErrorNoMemory);\n  }\n\n  return mp;\n}\n\n/// Get name of a Memory Pool object.\n/// \\note API identical to osMemoryPoolGetName\nstatic const char *svcRtxMemoryPoolGetName(osMemoryPoolId_t mp_id) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolGetName(mp, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  EvrRtxMemoryPoolGetName(mp, mp->name);\n\n  return mp->name;\n}\n\n/// Allocate a memory block from a Memory Pool.\n/// \\note API identical to osMemoryPoolAlloc\nstatic void *svcRtxMemoryPoolAlloc(osMemoryPoolId_t mp_id, uint32_t timeout) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n  void *block;\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolError(mp, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  // Allocate memory\n  block = osRtxMemoryPoolAlloc(&mp->mp_info);\n  if (block != NULL) {\n    EvrRtxMemoryPoolAllocated(mp, block);\n  } else {\n    // No memory available\n    if (timeout != 0U) {\n      EvrRtxMemoryPoolAllocPending(mp, timeout);\n      // Suspend current Thread\n      if (osRtxThreadWaitEnter(osRtxThreadWaitingMemoryPool, timeout)) {\n        osRtxThreadListPut(osRtxObject(mp), osRtxThreadGetRunning());\n      } else {\n        EvrRtxMemoryPoolAllocTimeout(mp);\n      }\n    } else {\n      EvrRtxMemoryPoolAllocFailed(mp);\n    }\n  }\n\n  return block;\n}\n\n/// Return an allocated memory block back to a Memory Pool.\n/// \\note API identical to osMemoryPoolFree\nstatic osStatus_t svcRtxMemoryPoolFree(osMemoryPoolId_t mp_id, void *block) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n  void *block0;\n  os_thread_t *thread;\n  osStatus_t status;\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolError(mp, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Free memory\n  status = osRtxMemoryPoolFree(&mp->mp_info, block);\n  if (status == osOK) {\n    EvrRtxMemoryPoolDeallocated(mp, block);\n    // Check if Thread is waiting to allocate memory\n    if (mp->thread_list != NULL) {\n      // Allocate memory\n      block0 = osRtxMemoryPoolAlloc(&mp->mp_info);\n      if (block0 != NULL) {\n        // Wakeup waiting Thread with highest Priority\n        thread = osRtxThreadListGet(osRtxObject(mp));\n        // lint -e{923} \"cast from pointer to unsigned int\"\n        osRtxThreadWaitExit(thread, (uint32_t)block0, TRUE);\n        EvrRtxMemoryPoolAllocated(mp, block0);\n      }\n    }\n  } else {\n    EvrRtxMemoryPoolFreeFailed(mp, block);\n  }\n\n  return status;\n}\n\n/// Get maximum number of memory blocks in a Memory Pool.\n/// \\note API identical to osMemoryPoolGetCapacity\nstatic uint32_t svcRtxMemoryPoolGetCapacity(osMemoryPoolId_t mp_id) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolGetCapacity(mp, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxMemoryPoolGetCapacity(mp, mp->mp_info.max_blocks);\n\n  return mp->mp_info.max_blocks;\n}\n\n/// Get memory block size in a Memory Pool.\n/// \\note API identical to osMemoryPoolGetBlockSize\nstatic uint32_t svcRtxMemoryPoolGetBlockSize(osMemoryPoolId_t mp_id) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolGetBlockSize(mp, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxMemoryPoolGetBlockSize(mp, mp->mp_info.block_size);\n\n  return mp->mp_info.block_size;\n}\n\n/// Get number of memory blocks used in a Memory Pool.\n/// \\note API identical to osMemoryPoolGetCount\nstatic uint32_t svcRtxMemoryPoolGetCount(osMemoryPoolId_t mp_id) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolGetCount(mp, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxMemoryPoolGetCount(mp, mp->mp_info.used_blocks);\n\n  return mp->mp_info.used_blocks;\n}\n\n/// Get number of memory blocks available in a Memory Pool.\n/// \\note API identical to osMemoryPoolGetSpace\nstatic uint32_t svcRtxMemoryPoolGetSpace(osMemoryPoolId_t mp_id) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolGetSpace(mp, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxMemoryPoolGetSpace(mp,\n                           mp->mp_info.max_blocks - mp->mp_info.used_blocks);\n\n  return (mp->mp_info.max_blocks - mp->mp_info.used_blocks);\n}\n\n/// Delete a Memory Pool object.\n/// \\note API identical to osMemoryPoolDelete\nstatic osStatus_t svcRtxMemoryPoolDelete(osMemoryPoolId_t mp_id) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n  os_thread_t *thread;\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolError(mp, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Unblock waiting threads\n  if (mp->thread_list != NULL) {\n    do {\n      thread = osRtxThreadListGet(osRtxObject(mp));\n      osRtxThreadWaitExit(thread, 0U, FALSE);\n    } while (mp->thread_list != NULL);\n    osRtxThreadDispatch(NULL);\n  }\n\n  // Mark object as invalid\n  mp->id = osRtxIdInvalid;\n\n  // Free data memory\n  if ((mp->flags & osRtxFlagSystemMemory) != 0U) {\n    (void)osRtxMemoryFree(osRtxInfo.mem.mp_data, mp->mp_info.block_base);\n  }\n\n  // Free object memory\n  if ((mp->flags & osRtxFlagSystemObject) != 0U) {\n    if (osRtxInfo.mpi.memory_pool != NULL) {\n      (void)osRtxMemoryPoolFree(osRtxInfo.mpi.memory_pool, mp);\n    } else {\n      (void)osRtxMemoryFree(osRtxInfo.mem.common, mp);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    osRtxMemoryPoolMemUsage.cnt_free++;\n#endif\n  }\n\n  EvrRtxMemoryPoolDestroyed(mp);\n\n  return osOK;\n}\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_3(MemoryPoolNew, osMemoryPoolId_t, uint32_t, uint32_t,\n       const osMemoryPoolAttr_t *)\nSVC0_1(MemoryPoolGetName, const char *, osMemoryPoolId_t)\nSVC0_2(MemoryPoolAlloc, void *, osMemoryPoolId_t, uint32_t)\nSVC0_2(MemoryPoolFree, osStatus_t, osMemoryPoolId_t, void *)\nSVC0_1(MemoryPoolGetCapacity, uint32_t, osMemoryPoolId_t)\nSVC0_1(MemoryPoolGetBlockSize, uint32_t, osMemoryPoolId_t)\nSVC0_1(MemoryPoolGetCount, uint32_t, osMemoryPoolId_t)\nSVC0_1(MemoryPoolGetSpace, uint32_t, osMemoryPoolId_t)\nSVC0_1(MemoryPoolDelete, osStatus_t, osMemoryPoolId_t)\n// lint --flb \"Library End\"\n\n//  ==== ISR Calls ====\n\n/// Allocate a memory block from a Memory Pool.\n/// \\note API identical to osMemoryPoolAlloc\n__STATIC_INLINE\nvoid *isrRtxMemoryPoolAlloc(osMemoryPoolId_t mp_id, uint32_t timeout) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n  void *block;\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool) || (timeout != 0U)) {\n    EvrRtxMemoryPoolError(mp, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  // Allocate memory\n  block = osRtxMemoryPoolAlloc(&mp->mp_info);\n  if (block == NULL) {\n    EvrRtxMemoryPoolAllocFailed(mp);\n  } else {\n    EvrRtxMemoryPoolAllocated(mp, block);\n  }\n\n  return block;\n}\n\n/// Return an allocated memory block back to a Memory Pool.\n/// \\note API identical to osMemoryPoolFree\n__STATIC_INLINE\nosStatus_t isrRtxMemoryPoolFree(osMemoryPoolId_t mp_id, void *block) {\n  os_memory_pool_t *mp = osRtxMemoryPoolId(mp_id);\n  osStatus_t status;\n\n  // Check parameters\n  if ((mp == NULL) || (mp->id != osRtxIdMemoryPool)) {\n    EvrRtxMemoryPoolError(mp, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Free memory\n  status = osRtxMemoryPoolFree(&mp->mp_info, block);\n  if (status == osOK) {\n    // Register post ISR processing\n    osRtxPostProcess(osRtxObject(mp));\n    EvrRtxMemoryPoolDeallocated(mp, block);\n  } else {\n    EvrRtxMemoryPoolFreeFailed(mp, block);\n  }\n\n  return status;\n}\n\n//  ==== Public API ====\n\n/// Create and Initialize a Memory Pool object.\nosMemoryPoolId_t osMemoryPoolNew(uint32_t block_count, uint32_t block_size,\n                                 const osMemoryPoolAttr_t *attr) {\n  osMemoryPoolId_t mp_id;\n\n  EvrRtxMemoryPoolNew(block_count, block_size, attr);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMemoryPoolError(NULL, (int32_t)osErrorISR);\n    mp_id = NULL;\n  } else {\n    mp_id = __svcMemoryPoolNew(block_count, block_size, attr);\n  }\n  return mp_id;\n}\n\n/// Get name of a Memory Pool object.\nconst char *osMemoryPoolGetName(osMemoryPoolId_t mp_id) {\n  const char *name;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMemoryPoolGetName(mp_id, NULL);\n    name = NULL;\n  } else {\n    name = __svcMemoryPoolGetName(mp_id);\n  }\n  return name;\n}\n\n/// Allocate a memory block from a Memory Pool.\nvoid *osMemoryPoolAlloc(osMemoryPoolId_t mp_id, uint32_t timeout) {\n  void *memory;\n\n  EvrRtxMemoryPoolAlloc(mp_id, timeout);\n  if (IsIrqMode() || IsIrqMasked()) {\n    memory = isrRtxMemoryPoolAlloc(mp_id, timeout);\n  } else {\n    memory = __svcMemoryPoolAlloc(mp_id, timeout);\n  }\n  return memory;\n}\n\n/// Return an allocated memory block back to a Memory Pool.\nosStatus_t osMemoryPoolFree(osMemoryPoolId_t mp_id, void *block) {\n  osStatus_t status;\n\n  EvrRtxMemoryPoolFree(mp_id, block);\n  if (IsIrqMode() || IsIrqMasked()) {\n    status = isrRtxMemoryPoolFree(mp_id, block);\n  } else {\n    status = __svcMemoryPoolFree(mp_id, block);\n  }\n  return status;\n}\n\n/// Get maximum number of memory blocks in a Memory Pool.\nuint32_t osMemoryPoolGetCapacity(osMemoryPoolId_t mp_id) {\n  uint32_t capacity;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    capacity = svcRtxMemoryPoolGetCapacity(mp_id);\n  } else {\n    capacity = __svcMemoryPoolGetCapacity(mp_id);\n  }\n  return capacity;\n}\n\n/// Get memory block size in a Memory Pool.\nuint32_t osMemoryPoolGetBlockSize(osMemoryPoolId_t mp_id) {\n  uint32_t block_size;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    block_size = svcRtxMemoryPoolGetBlockSize(mp_id);\n  } else {\n    block_size = __svcMemoryPoolGetBlockSize(mp_id);\n  }\n  return block_size;\n}\n\n/// Get number of memory blocks used in a Memory Pool.\nuint32_t osMemoryPoolGetCount(osMemoryPoolId_t mp_id) {\n  uint32_t count;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    count = svcRtxMemoryPoolGetCount(mp_id);\n  } else {\n    count = __svcMemoryPoolGetCount(mp_id);\n  }\n  return count;\n}\n\n/// Get number of memory blocks available in a Memory Pool.\nuint32_t osMemoryPoolGetSpace(osMemoryPoolId_t mp_id) {\n  uint32_t space;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    space = svcRtxMemoryPoolGetSpace(mp_id);\n  } else {\n    space = __svcMemoryPoolGetSpace(mp_id);\n  }\n  return space;\n}\n\n/// Delete a Memory Pool object.\nosStatus_t osMemoryPoolDelete(osMemoryPoolId_t mp_id) {\n  osStatus_t status;\n\n  EvrRtxMemoryPoolDelete(mp_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMemoryPoolError(mp_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcMemoryPoolDelete(mp_id);\n  }\n  return status;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_msgqueue.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Message Queue functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  OS Runtime Object Memory Usage\n#if ((defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0)))\nosRtxObjectMemUsage_t osRtxMessageQueueMemUsage\n    __attribute__((section(\".data.os.msgqueue.obj\"))) = {0U, 0U, 0U};\n#endif\n\n//  ==== Helper functions ====\n\n/// Put a Message into Queue sorted by Priority (Highest at Head).\n/// \\param[in]  mq              message queue object.\n/// \\param[in]  msg             message object.\nstatic void MessageQueuePut(os_message_queue_t *mq, os_message_t *msg) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  os_message_t *prev, *next;\n\n  if (mq->msg_last != NULL) {\n    prev = mq->msg_last;\n    next = NULL;\n    while ((prev != NULL) && (prev->priority < msg->priority)) {\n      next = prev;\n      prev = prev->prev;\n    }\n    msg->prev = prev;\n    msg->next = next;\n    if (prev != NULL) {\n      prev->next = msg;\n    } else {\n      mq->msg_first = msg;\n    }\n    if (next != NULL) {\n      next->prev = msg;\n    } else {\n      mq->msg_last = msg;\n    }\n  } else {\n    msg->prev = NULL;\n    msg->next = NULL;\n    mq->msg_first = msg;\n    mq->msg_last = msg;\n  }\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  mq->msg_count++;\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  (void)atomic_inc32(&mq->msg_count);\n#endif\n}\n\n/// Get a Message from Queue with Highest Priority.\n/// \\param[in]  mq              message queue object.\n/// \\return message object or NULL.\nstatic os_message_t *MessageQueueGet(os_message_queue_t *mq) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  os_message_t *msg;\n  uint32_t count;\n  uint8_t flags;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  count = mq->msg_count;\n  if (count != 0U) {\n    mq->msg_count--;\n  }\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  count = atomic_dec32_nz(&mq->msg_count);\n#endif\n\n  if (count != 0U) {\n    msg = mq->msg_first;\n\n    while (msg != NULL) {\n#if (EXCLUSIVE_ACCESS == 0)\n      __disable_irq();\n\n      flags = msg->flags;\n      msg->flags = 1U;\n\n      if (primask == 0U) {\n        __enable_irq();\n      }\n#else\n      flags = atomic_wr8(&msg->flags, 1U);\n#endif\n      if (flags == 0U) {\n        break;\n      }\n      msg = msg->next;\n    }\n  } else {\n    msg = NULL;\n  }\n\n  return msg;\n}\n\n/// Remove a Message from Queue\n/// \\param[in]  mq              message queue object.\n/// \\param[in]  msg             message object.\nstatic void MessageQueueRemove(os_message_queue_t *mq,\n                               const os_message_t *msg) {\n\n  if (msg->prev != NULL) {\n    msg->prev->next = msg->next;\n  } else {\n    mq->msg_first = msg->next;\n  }\n  if (msg->next != NULL) {\n    msg->next->prev = msg->prev;\n  } else {\n    mq->msg_last = msg->prev;\n  }\n}\n\n//  ==== Post ISR processing ====\n\n/// Message Queue post ISR processing.\n/// \\param[in]  msg             message object.\nstatic void osRtxMessageQueuePostProcess(os_message_t *msg) {\n  os_message_queue_t *mq;\n  os_message_t *msg0;\n  os_thread_t *thread;\n  const uint32_t *reg;\n  const void *ptr_src;\n  void *ptr_dst;\n\n  if (msg->flags != 0U) {\n    // Remove Message\n    // lint -e{9079} -e{9087} \"cast between pointers to different object types\"\n    mq = *((os_message_queue_t **)(void *)&msg[1]);\n    MessageQueueRemove(mq, msg);\n    // Free memory\n    msg->id = osRtxIdInvalid;\n    (void)osRtxMemoryPoolFree(&mq->mp_info, msg);\n    // Check if Thread is waiting to send a Message\n    if (mq->thread_list != NULL) {\n      // Try to allocate memory\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      msg0 = osRtxMemoryPoolAlloc(&mq->mp_info);\n      if (msg0 != NULL) {\n        // Wakeup waiting Thread with highest Priority\n        thread = osRtxThreadListGet(osRtxObject(mq));\n        osRtxThreadWaitExit(thread, (uint32_t)osOK, FALSE);\n        // Copy Message (R2: const void *msg_ptr, R3: uint8_t msg_prio)\n        reg = osRtxThreadRegPtr(thread);\n        // lint -e{923} \"cast from unsigned int to pointer\"\n        ptr_src = (const void *)reg[2];\n        memcpy(&msg0[1], ptr_src, mq->msg_size);\n        // Store Message into Queue\n        msg0->id = osRtxIdMessage;\n        msg0->flags = 0U;\n        msg0->priority = (uint8_t)reg[3];\n        MessageQueuePut(mq, msg0);\n        EvrRtxMessageQueueInserted(mq, ptr_src);\n      }\n    }\n  } else {\n    // New Message\n    // lint -e{9079} -e{9087} \"cast between pointers to different object types\"\n    mq = (void *)msg->next;\n    // lint -e{9087} \"cast between pointers to different object types\"\n    ptr_src = (const void *)msg->prev;\n    // Check if Thread is waiting to receive a Message\n    if ((mq->thread_list != NULL) &&\n        (mq->thread_list->state == osRtxThreadWaitingMessageGet)) {\n      EvrRtxMessageQueueInserted(mq, ptr_src);\n      // Wakeup waiting Thread with highest Priority\n      thread = osRtxThreadListGet(osRtxObject(mq));\n      osRtxThreadWaitExit(thread, (uint32_t)osOK, FALSE);\n      // Copy Message (R2: void *msg_ptr, R3: uint8_t *msg_prio)\n      reg = osRtxThreadRegPtr(thread);\n      // lint -e{923} \"cast from unsigned int to pointer\"\n      ptr_dst = (void *)reg[2];\n      memcpy(ptr_dst, &msg[1], mq->msg_size);\n      if (reg[3] != 0U) {\n        // lint -e{923} -e{9078} \"cast from unsigned int to pointer\"\n        *((uint8_t *)reg[3]) = msg->priority;\n      }\n      EvrRtxMessageQueueRetrieved(mq, ptr_dst);\n      // Free memory\n      msg->id = osRtxIdInvalid;\n      (void)osRtxMemoryPoolFree(&mq->mp_info, msg);\n    } else {\n      EvrRtxMessageQueueInserted(mq, ptr_src);\n      MessageQueuePut(mq, msg);\n    }\n  }\n}\n\n//  ==== Service Calls ====\n\n/// Create and Initialize a Message Queue object.\n/// \\note API identical to osMessageQueueNew\nstatic osMessageQueueId_t\nsvcRtxMessageQueueNew(uint32_t msg_count, uint32_t msg_size,\n                      const osMessageQueueAttr_t *attr) {\n  os_message_queue_t *mq;\n  void *mq_mem;\n  uint32_t mq_size;\n  uint32_t block_size;\n  uint32_t size;\n  uint8_t flags;\n  const char *name;\n\n  // Check parameters\n  if ((msg_count == 0U) || (msg_size == 0U)) {\n    EvrRtxMessageQueueError(NULL, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n  block_size = ((msg_size + 3U) & ~3UL) + sizeof(os_message_t);\n  if ((__CLZ(msg_count) + __CLZ(block_size)) < 32U) {\n    EvrRtxMessageQueueError(NULL, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  size = msg_count * block_size;\n\n  // Process attributes\n  if (attr != NULL) {\n    name = attr->name;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    mq = attr->cb_mem;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    mq_mem = attr->mq_mem;\n    mq_size = attr->mq_size;\n    if (mq != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)mq & 3U) != 0U) ||\n          (attr->cb_size < sizeof(os_message_queue_t))) {\n        EvrRtxMessageQueueError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (attr->cb_size != 0U) {\n        EvrRtxMessageQueueError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n    if (mq_mem != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)mq_mem & 3U) != 0U) || (mq_size < size)) {\n        EvrRtxMessageQueueError(NULL, osRtxErrorInvalidDataMemory);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (mq_size != 0U) {\n        EvrRtxMessageQueueError(NULL, osRtxErrorInvalidDataMemory);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n  } else {\n    name = NULL;\n    mq = NULL;\n    mq_mem = NULL;\n  }\n\n  // Allocate object memory if not provided\n  if (mq == NULL) {\n    if (osRtxInfo.mpi.message_queue != NULL) {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      mq = osRtxMemoryPoolAlloc(osRtxInfo.mpi.message_queue);\n    } else {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      mq = osRtxMemoryAlloc(osRtxInfo.mem.common, sizeof(os_message_queue_t),\n                            1U);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    if (mq != NULL) {\n      uint32_t used;\n      osRtxMessageQueueMemUsage.cnt_alloc++;\n      used = osRtxMessageQueueMemUsage.cnt_alloc -\n             osRtxMessageQueueMemUsage.cnt_free;\n      if (osRtxMessageQueueMemUsage.max_used < used) {\n        osRtxMessageQueueMemUsage.max_used = used;\n      }\n    }\n#endif\n    flags = osRtxFlagSystemObject;\n  } else {\n    flags = 0U;\n  }\n\n  // Allocate data memory if not provided\n  if ((mq != NULL) && (mq_mem == NULL)) {\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 5]\n    mq_mem = osRtxMemoryAlloc(osRtxInfo.mem.mq_data, size, 0U);\n    if (mq_mem == NULL) {\n      if ((flags & osRtxFlagSystemObject) != 0U) {\n        if (osRtxInfo.mpi.message_queue != NULL) {\n          (void)osRtxMemoryPoolFree(osRtxInfo.mpi.message_queue, mq);\n        } else {\n          (void)osRtxMemoryFree(osRtxInfo.mem.common, mq);\n        }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n        osRtxMessageQueueMemUsage.cnt_free++;\n#endif\n      }\n      mq = NULL;\n    } else {\n      memset(mq_mem, 0, size);\n    }\n    flags |= osRtxFlagSystemMemory;\n  }\n\n  if (mq != NULL) {\n    // Initialize control block\n    mq->id = osRtxIdMessageQueue;\n    mq->flags = flags;\n    mq->name = name;\n    mq->thread_list = NULL;\n    mq->msg_size = msg_size;\n    mq->msg_count = 0U;\n    mq->msg_first = NULL;\n    mq->msg_last = NULL;\n    (void)osRtxMemoryPoolInit(&mq->mp_info, msg_count, block_size, mq_mem);\n\n    // Register post ISR processing function\n    osRtxInfo.post_process.message = osRtxMessageQueuePostProcess;\n\n    EvrRtxMessageQueueCreated(mq, mq->name);\n  } else {\n    EvrRtxMessageQueueError(NULL, (int32_t)osErrorNoMemory);\n  }\n\n  return mq;\n}\n\n/// Get name of a Message Queue object.\n/// \\note API identical to osMessageQueueGetName\nstatic const char *svcRtxMessageQueueGetName(osMessageQueueId_t mq_id) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue)) {\n    EvrRtxMessageQueueGetName(mq, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  EvrRtxMessageQueueGetName(mq, mq->name);\n\n  return mq->name;\n}\n\n/// Put a Message into a Queue or timeout if Queue is full.\n/// \\note API identical to osMessageQueuePut\nstatic osStatus_t svcRtxMessageQueuePut(osMessageQueueId_t mq_id,\n                                        const void *msg_ptr, uint8_t msg_prio,\n                                        uint32_t timeout) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n  os_message_t *msg;\n  os_thread_t *thread;\n  uint32_t *reg;\n  void *ptr;\n  osStatus_t status;\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue) || (msg_ptr == NULL)) {\n    EvrRtxMessageQueueError(mq, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check if Thread is waiting to receive a Message\n  if ((mq->thread_list != NULL) &&\n      (mq->thread_list->state == osRtxThreadWaitingMessageGet)) {\n    EvrRtxMessageQueueInserted(mq, msg_ptr);\n    // Wakeup waiting Thread with highest Priority\n    thread = osRtxThreadListGet(osRtxObject(mq));\n    osRtxThreadWaitExit(thread, (uint32_t)osOK, TRUE);\n    // Copy Message (R2: void *msg_ptr, R3: uint8_t *msg_prio)\n    reg = osRtxThreadRegPtr(thread);\n    // lint -e{923} \"cast from unsigned int to pointer\"\n    ptr = (void *)reg[2];\n    memcpy(ptr, msg_ptr, mq->msg_size);\n    if (reg[3] != 0U) {\n      // lint -e{923} -e{9078} \"cast from unsigned int to pointer\"\n      *((uint8_t *)reg[3]) = msg_prio;\n    }\n    EvrRtxMessageQueueRetrieved(mq, ptr);\n    status = osOK;\n  } else {\n    // Try to allocate memory\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 5]\n    msg = osRtxMemoryPoolAlloc(&mq->mp_info);\n    if (msg != NULL) {\n      // Copy Message\n      memcpy(&msg[1], msg_ptr, mq->msg_size);\n      // Put Message into Queue\n      msg->id = osRtxIdMessage;\n      msg->flags = 0U;\n      msg->priority = msg_prio;\n      MessageQueuePut(mq, msg);\n      EvrRtxMessageQueueInserted(mq, msg_ptr);\n      status = osOK;\n    } else {\n      // No memory available\n      if (timeout != 0U) {\n        EvrRtxMessageQueuePutPending(mq, msg_ptr, timeout);\n        // Suspend current Thread\n        if (osRtxThreadWaitEnter(osRtxThreadWaitingMessagePut, timeout)) {\n          osRtxThreadListPut(osRtxObject(mq), osRtxThreadGetRunning());\n          // Save arguments (R2: const void *msg_ptr, R3: uint8_t msg_prio)\n          // lint -e{923} -e{9078} \"cast from unsigned int to pointer\"\n          reg = (uint32_t *)(__get_PSP());\n          // lint -e{923} -e{9078} \"cast from pointer to unsigned int\"\n          reg[2] = (uint32_t)msg_ptr;\n          // lint -e{923} -e{9078} \"cast from pointer to unsigned int\"\n          reg[3] = (uint32_t)msg_prio;\n        } else {\n          EvrRtxMessageQueuePutTimeout(mq);\n        }\n        status = osErrorTimeout;\n      } else {\n        EvrRtxMessageQueueNotInserted(mq, msg_ptr);\n        status = osErrorResource;\n      }\n    }\n  }\n\n  return status;\n}\n\n/// Get a Message from a Queue or timeout if Queue is empty.\n/// \\note API identical to osMessageQueueGet\nstatic osStatus_t svcRtxMessageQueueGet(osMessageQueueId_t mq_id, void *msg_ptr,\n                                        uint8_t *msg_prio, uint32_t timeout) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n  os_message_t *msg;\n  os_thread_t *thread;\n  uint32_t *reg;\n  const void *ptr;\n  osStatus_t status;\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue) || (msg_ptr == NULL)) {\n    EvrRtxMessageQueueError(mq, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Get Message from Queue\n  msg = MessageQueueGet(mq);\n  if (msg != NULL) {\n    MessageQueueRemove(mq, msg);\n    // Copy Message\n    memcpy(msg_ptr, &msg[1], mq->msg_size);\n    if (msg_prio != NULL) {\n      *msg_prio = msg->priority;\n    }\n    EvrRtxMessageQueueRetrieved(mq, msg_ptr);\n    // Free memory\n    msg->id = osRtxIdInvalid;\n    (void)osRtxMemoryPoolFree(&mq->mp_info, msg);\n    // Check if Thread is waiting to send a Message\n    if (mq->thread_list != NULL) {\n      // Try to allocate memory\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      msg = osRtxMemoryPoolAlloc(&mq->mp_info);\n      if (msg != NULL) {\n        // Wakeup waiting Thread with highest Priority\n        thread = osRtxThreadListGet(osRtxObject(mq));\n        osRtxThreadWaitExit(thread, (uint32_t)osOK, TRUE);\n        // Copy Message (R2: const void *msg_ptr, R3: uint8_t msg_prio)\n        reg = osRtxThreadRegPtr(thread);\n        // lint -e{923} \"cast from unsigned int to pointer\"\n        ptr = (const void *)reg[2];\n        memcpy(&msg[1], ptr, mq->msg_size);\n        // Store Message into Queue\n        msg->id = osRtxIdMessage;\n        msg->flags = 0U;\n        msg->priority = (uint8_t)reg[3];\n        MessageQueuePut(mq, msg);\n        EvrRtxMessageQueueInserted(mq, ptr);\n      }\n    }\n    status = osOK;\n  } else {\n    // No Message available\n    if (timeout != 0U) {\n      EvrRtxMessageQueueGetPending(mq, msg_ptr, timeout);\n      // Suspend current Thread\n      if (osRtxThreadWaitEnter(osRtxThreadWaitingMessageGet, timeout)) {\n        osRtxThreadListPut(osRtxObject(mq), osRtxThreadGetRunning());\n        // Save arguments (R2: void *msg_ptr, R3: uint8_t *msg_prio)\n        // lint -e{923} -e{9078} \"cast from unsigned int to pointer\"\n        reg = (uint32_t *)(__get_PSP());\n        // lint -e{923} -e{9078} \"cast from pointer to unsigned int\"\n        reg[2] = (uint32_t)msg_ptr;\n        // lint -e{923} -e{9078} \"cast from pointer to unsigned int\"\n        reg[3] = (uint32_t)msg_prio;\n      } else {\n        EvrRtxMessageQueueGetTimeout(mq);\n      }\n      status = osErrorTimeout;\n    } else {\n      EvrRtxMessageQueueNotRetrieved(mq, msg_ptr);\n      status = osErrorResource;\n    }\n  }\n\n  return status;\n}\n\n/// Get maximum number of messages in a Message Queue.\n/// \\note API identical to osMessageQueueGetCapacity\nstatic uint32_t svcRtxMessageQueueGetCapacity(osMessageQueueId_t mq_id) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue)) {\n    EvrRtxMessageQueueGetCapacity(mq, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxMessageQueueGetCapacity(mq, mq->mp_info.max_blocks);\n\n  return mq->mp_info.max_blocks;\n}\n\n/// Get maximum message size in a Memory Pool.\n/// \\note API identical to osMessageQueueGetMsgSize\nstatic uint32_t svcRtxMessageQueueGetMsgSize(osMessageQueueId_t mq_id) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue)) {\n    EvrRtxMessageQueueGetMsgSize(mq, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxMessageQueueGetMsgSize(mq, mq->msg_size);\n\n  return mq->msg_size;\n}\n\n/// Get number of queued messages in a Message Queue.\n/// \\note API identical to osMessageQueueGetCount\nstatic uint32_t svcRtxMessageQueueGetCount(osMessageQueueId_t mq_id) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue)) {\n    EvrRtxMessageQueueGetCount(mq, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxMessageQueueGetCount(mq, mq->msg_count);\n\n  return mq->msg_count;\n}\n\n/// Get number of available slots for messages in a Message Queue.\n/// \\note API identical to osMessageQueueGetSpace\nstatic uint32_t svcRtxMessageQueueGetSpace(osMessageQueueId_t mq_id) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue)) {\n    EvrRtxMessageQueueGetSpace(mq, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxMessageQueueGetSpace(mq, mq->mp_info.max_blocks - mq->msg_count);\n\n  return (mq->mp_info.max_blocks - mq->msg_count);\n}\n\n/// Reset a Message Queue to initial empty state.\n/// \\note API identical to osMessageQueueReset\nstatic osStatus_t svcRtxMessageQueueReset(osMessageQueueId_t mq_id) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n  os_message_t *msg;\n  os_thread_t *thread;\n  const uint32_t *reg;\n  const void *ptr;\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue)) {\n    EvrRtxMessageQueueError(mq, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Remove Messages from Queue\n  for (;;) {\n    // Get Message from Queue\n    msg = MessageQueueGet(mq);\n    if (msg == NULL) {\n      break;\n    }\n    MessageQueueRemove(mq, msg);\n    EvrRtxMessageQueueRetrieved(mq, NULL);\n    // Free memory\n    msg->id = osRtxIdInvalid;\n    (void)osRtxMemoryPoolFree(&mq->mp_info, msg);\n  }\n\n  // Check if Threads are waiting to send Messages\n  if ((mq->thread_list != NULL) &&\n      (mq->thread_list->state == osRtxThreadWaitingMessagePut)) {\n    do {\n      // Try to allocate memory\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      msg = osRtxMemoryPoolAlloc(&mq->mp_info);\n      if (msg != NULL) {\n        // Wakeup waiting Thread with highest Priority\n        thread = osRtxThreadListGet(osRtxObject(mq));\n        osRtxThreadWaitExit(thread, (uint32_t)osOK, FALSE);\n        // Copy Message (R2: const void *msg_ptr, R3: uint8_t msg_prio)\n        reg = osRtxThreadRegPtr(thread);\n        // lint -e{923} \"cast from unsigned int to pointer\"\n        ptr = (const void *)reg[2];\n        memcpy(&msg[1], ptr, mq->msg_size);\n        // Store Message into Queue\n        msg->id = osRtxIdMessage;\n        msg->flags = 0U;\n        msg->priority = (uint8_t)reg[3];\n        MessageQueuePut(mq, msg);\n        EvrRtxMessageQueueInserted(mq, ptr);\n      }\n    } while ((msg != NULL) && (mq->thread_list != NULL));\n    osRtxThreadDispatch(NULL);\n  }\n\n  EvrRtxMessageQueueResetDone(mq);\n\n  return osOK;\n}\n\n/// Delete a Message Queue object.\n/// \\note API identical to osMessageQueueDelete\nstatic osStatus_t svcRtxMessageQueueDelete(osMessageQueueId_t mq_id) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n  os_thread_t *thread;\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue)) {\n    EvrRtxMessageQueueError(mq, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Unblock waiting threads\n  if (mq->thread_list != NULL) {\n    do {\n      thread = osRtxThreadListGet(osRtxObject(mq));\n      osRtxThreadWaitExit(thread, (uint32_t)osErrorResource, FALSE);\n    } while (mq->thread_list != NULL);\n    osRtxThreadDispatch(NULL);\n  }\n\n  // Mark object as invalid\n  mq->id = osRtxIdInvalid;\n\n  // Free data memory\n  if ((mq->flags & osRtxFlagSystemMemory) != 0U) {\n    (void)osRtxMemoryFree(osRtxInfo.mem.mq_data, mq->mp_info.block_base);\n  }\n\n  // Free object memory\n  if ((mq->flags & osRtxFlagSystemObject) != 0U) {\n    if (osRtxInfo.mpi.message_queue != NULL) {\n      (void)osRtxMemoryPoolFree(osRtxInfo.mpi.message_queue, mq);\n    } else {\n      (void)osRtxMemoryFree(osRtxInfo.mem.common, mq);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    osRtxMessageQueueMemUsage.cnt_free++;\n#endif\n  }\n\n  EvrRtxMessageQueueDestroyed(mq);\n\n  return osOK;\n}\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_3(MessageQueueNew, osMessageQueueId_t, uint32_t, uint32_t,\n       const osMessageQueueAttr_t *)\nSVC0_1(MessageQueueGetName, const char *, osMessageQueueId_t)\nSVC0_4(MessageQueuePut, osStatus_t, osMessageQueueId_t, const void *, uint8_t,\n       uint32_t)\nSVC0_4(MessageQueueGet, osStatus_t, osMessageQueueId_t, void *, uint8_t *,\n       uint32_t)\nSVC0_1(MessageQueueGetCapacity, uint32_t, osMessageQueueId_t)\nSVC0_1(MessageQueueGetMsgSize, uint32_t, osMessageQueueId_t)\nSVC0_1(MessageQueueGetCount, uint32_t, osMessageQueueId_t)\nSVC0_1(MessageQueueGetSpace, uint32_t, osMessageQueueId_t)\nSVC0_1(MessageQueueReset, osStatus_t, osMessageQueueId_t)\nSVC0_1(MessageQueueDelete, osStatus_t, osMessageQueueId_t)\n// lint --flb \"Library End\"\n\n//  ==== ISR Calls ====\n\n/// Put a Message into a Queue or timeout if Queue is full.\n/// \\note API identical to osMessageQueuePut\n__STATIC_INLINE\nosStatus_t isrRtxMessageQueuePut(osMessageQueueId_t mq_id, const void *msg_ptr,\n                                 uint8_t msg_prio, uint32_t timeout) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n  os_message_t *msg;\n  osStatus_t status;\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue) || (msg_ptr == NULL) ||\n      (timeout != 0U)) {\n    EvrRtxMessageQueueError(mq, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Try to allocate memory\n  // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n  // [MISRA Note 5]\n  msg = osRtxMemoryPoolAlloc(&mq->mp_info);\n  if (msg != NULL) {\n    // Copy Message\n    memcpy(&msg[1], msg_ptr, mq->msg_size);\n    msg->id = osRtxIdMessage;\n    msg->flags = 0U;\n    msg->priority = msg_prio;\n    // Register post ISR processing\n    // lint -e{9079} -e{9087} \"cast between pointers to different object types\"\n    *((const void **)(void *)&msg->prev) = msg_ptr;\n    // lint -e{9079} -e{9087} \"cast between pointers to different object types\"\n    *((void **)&msg->next) = mq;\n    osRtxPostProcess(osRtxObject(msg));\n    EvrRtxMessageQueueInsertPending(mq, msg_ptr);\n    status = osOK;\n  } else {\n    // No memory available\n    EvrRtxMessageQueueNotInserted(mq, msg_ptr);\n    status = osErrorResource;\n  }\n\n  return status;\n}\n\n/// Get a Message from a Queue or timeout if Queue is empty.\n/// \\note API identical to osMessageQueueGet\n__STATIC_INLINE\nosStatus_t isrRtxMessageQueueGet(osMessageQueueId_t mq_id, void *msg_ptr,\n                                 uint8_t *msg_prio, uint32_t timeout) {\n  os_message_queue_t *mq = osRtxMessageQueueId(mq_id);\n  os_message_t *msg;\n  osStatus_t status;\n\n  // Check parameters\n  if ((mq == NULL) || (mq->id != osRtxIdMessageQueue) || (msg_ptr == NULL) ||\n      (timeout != 0U)) {\n    EvrRtxMessageQueueError(mq, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Get Message from Queue\n  msg = MessageQueueGet(mq);\n  if (msg != NULL) {\n    // Copy Message\n    memcpy(msg_ptr, &msg[1], mq->msg_size);\n    if (msg_prio != NULL) {\n      *msg_prio = msg->priority;\n    }\n    // Register post ISR processing\n    // lint -e{9079} -e{9087} \"cast between pointers to different object types\"\n    *((os_message_queue_t **)(void *)&msg[1]) = mq;\n    osRtxPostProcess(osRtxObject(msg));\n    EvrRtxMessageQueueRetrieved(mq, msg_ptr);\n    status = osOK;\n  } else {\n    // No Message available\n    EvrRtxMessageQueueNotRetrieved(mq, msg_ptr);\n    status = osErrorResource;\n  }\n\n  return status;\n}\n\n//  ==== Public API ====\n\n/// Create and Initialize a Message Queue object.\nosMessageQueueId_t osMessageQueueNew(uint32_t msg_count, uint32_t msg_size,\n                                     const osMessageQueueAttr_t *attr) {\n  osMessageQueueId_t mq_id;\n\n  EvrRtxMessageQueueNew(msg_count, msg_size, attr);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMessageQueueError(NULL, (int32_t)osErrorISR);\n    mq_id = NULL;\n  } else {\n    mq_id = __svcMessageQueueNew(msg_count, msg_size, attr);\n  }\n  return mq_id;\n}\n\n/// Get name of a Message Queue object.\nconst char *osMessageQueueGetName(osMessageQueueId_t mq_id) {\n  const char *name;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMessageQueueGetName(mq_id, NULL);\n    name = NULL;\n  } else {\n    name = __svcMessageQueueGetName(mq_id);\n  }\n  return name;\n}\n\n/// Put a Message into a Queue or timeout if Queue is full.\nosStatus_t osMessageQueuePut(osMessageQueueId_t mq_id, const void *msg_ptr,\n                             uint8_t msg_prio, uint32_t timeout) {\n  osStatus_t status;\n\n  EvrRtxMessageQueuePut(mq_id, msg_ptr, msg_prio, timeout);\n  if (IsIrqMode() || IsIrqMasked()) {\n    status = isrRtxMessageQueuePut(mq_id, msg_ptr, msg_prio, timeout);\n  } else {\n    status = __svcMessageQueuePut(mq_id, msg_ptr, msg_prio, timeout);\n  }\n  return status;\n}\n\n/// Get a Message from a Queue or timeout if Queue is empty.\nosStatus_t osMessageQueueGet(osMessageQueueId_t mq_id, void *msg_ptr,\n                             uint8_t *msg_prio, uint32_t timeout) {\n  osStatus_t status;\n\n  EvrRtxMessageQueueGet(mq_id, msg_ptr, msg_prio, timeout);\n  if (IsIrqMode() || IsIrqMasked()) {\n    status = isrRtxMessageQueueGet(mq_id, msg_ptr, msg_prio, timeout);\n  } else {\n    status = __svcMessageQueueGet(mq_id, msg_ptr, msg_prio, timeout);\n  }\n  return status;\n}\n\n/// Get maximum number of messages in a Message Queue.\nuint32_t osMessageQueueGetCapacity(osMessageQueueId_t mq_id) {\n  uint32_t capacity;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    capacity = svcRtxMessageQueueGetCapacity(mq_id);\n  } else {\n    capacity = __svcMessageQueueGetCapacity(mq_id);\n  }\n  return capacity;\n}\n\n/// Get maximum message size in a Memory Pool.\nuint32_t osMessageQueueGetMsgSize(osMessageQueueId_t mq_id) {\n  uint32_t msg_size;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    msg_size = svcRtxMessageQueueGetMsgSize(mq_id);\n  } else {\n    msg_size = __svcMessageQueueGetMsgSize(mq_id);\n  }\n  return msg_size;\n}\n\n/// Get number of queued messages in a Message Queue.\nuint32_t osMessageQueueGetCount(osMessageQueueId_t mq_id) {\n  uint32_t count;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    count = svcRtxMessageQueueGetCount(mq_id);\n  } else {\n    count = __svcMessageQueueGetCount(mq_id);\n  }\n  return count;\n}\n\n/// Get number of available slots for messages in a Message Queue.\nuint32_t osMessageQueueGetSpace(osMessageQueueId_t mq_id) {\n  uint32_t space;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    space = svcRtxMessageQueueGetSpace(mq_id);\n  } else {\n    space = __svcMessageQueueGetSpace(mq_id);\n  }\n  return space;\n}\n\n/// Reset a Message Queue to initial empty state.\nosStatus_t osMessageQueueReset(osMessageQueueId_t mq_id) {\n  osStatus_t status;\n\n  EvrRtxMessageQueueReset(mq_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMessageQueueError(mq_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcMessageQueueReset(mq_id);\n  }\n  return status;\n}\n\n/// Delete a Message Queue object.\nosStatus_t osMessageQueueDelete(osMessageQueueId_t mq_id) {\n  osStatus_t status;\n\n  EvrRtxMessageQueueDelete(mq_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMessageQueueError(mq_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcMessageQueueDelete(mq_id);\n  }\n  return status;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_mutex.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Mutex functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  OS Runtime Object Memory Usage\n#if ((defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0)))\nosRtxObjectMemUsage_t osRtxMutexMemUsage\n    __attribute__((section(\".data.os.mutex.obj\"))) = {0U, 0U, 0U};\n#endif\n\n//  ==== Library functions ====\n\n/// Release Mutex list when owner Thread terminates.\n/// \\param[in]  mutex           mutex object.\n/// \\return 1 - success, 0 - failure.\nvoid osRtxMutexOwnerRelease(os_mutex_t *mutex_list) {\n  os_mutex_t *mutex;\n  os_mutex_t *mutex_next;\n  os_thread_t *thread;\n\n  mutex = mutex_list;\n  while (mutex != NULL) {\n    mutex_next = mutex->owner_next;\n    // Check if Mutex is Robust\n    if ((mutex->attr & osMutexRobust) != 0U) {\n      // Clear Lock counter\n      mutex->lock = 0U;\n      EvrRtxMutexReleased(mutex, 0U);\n      // Check if Thread is waiting for a Mutex\n      if (mutex->thread_list != NULL) {\n        // Wakeup waiting Thread with highest Priority\n        thread = osRtxThreadListGet(osRtxObject(mutex));\n        osRtxThreadWaitExit(thread, (uint32_t)osOK, FALSE);\n        // Thread is the new Mutex owner\n        mutex->owner_thread = thread;\n        mutex->owner_prev = NULL;\n        mutex->owner_next = thread->mutex_list;\n        if (thread->mutex_list != NULL) {\n          thread->mutex_list->owner_prev = mutex;\n        }\n        thread->mutex_list = mutex;\n        mutex->lock = 1U;\n        EvrRtxMutexAcquired(mutex, 1U);\n      }\n    }\n    mutex = mutex_next;\n  }\n}\n\n//  ==== Service Calls ====\n\n/// Create and Initialize a Mutex object.\n/// \\note API identical to osMutexNew\nstatic osMutexId_t svcRtxMutexNew(const osMutexAttr_t *attr) {\n  os_mutex_t *mutex;\n  uint32_t attr_bits;\n  uint8_t flags;\n  const char *name;\n\n  // Process attributes\n  if (attr != NULL) {\n    name = attr->name;\n    attr_bits = attr->attr_bits;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    mutex = attr->cb_mem;\n    if (mutex != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)mutex & 3U) != 0U) ||\n          (attr->cb_size < sizeof(os_mutex_t))) {\n        EvrRtxMutexError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (attr->cb_size != 0U) {\n        EvrRtxMutexError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n  } else {\n    name = NULL;\n    attr_bits = 0U;\n    mutex = NULL;\n  }\n\n  // Allocate object memory if not provided\n  if (mutex == NULL) {\n    if (osRtxInfo.mpi.mutex != NULL) {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      mutex = osRtxMemoryPoolAlloc(osRtxInfo.mpi.mutex);\n    } else {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      mutex = osRtxMemoryAlloc(osRtxInfo.mem.common, sizeof(os_mutex_t), 1U);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    if (mutex != NULL) {\n      uint32_t used;\n      osRtxMutexMemUsage.cnt_alloc++;\n      used = osRtxMutexMemUsage.cnt_alloc - osRtxMutexMemUsage.cnt_free;\n      if (osRtxMutexMemUsage.max_used < used) {\n        osRtxMutexMemUsage.max_used = used;\n      }\n    }\n#endif\n    flags = osRtxFlagSystemObject;\n  } else {\n    flags = 0U;\n  }\n\n  if (mutex != NULL) {\n    // Initialize control block\n    mutex->id = osRtxIdMutex;\n    mutex->flags = flags;\n    mutex->attr = (uint8_t)attr_bits;\n    mutex->name = name;\n    mutex->thread_list = NULL;\n    mutex->owner_thread = NULL;\n    mutex->owner_prev = NULL;\n    mutex->owner_next = NULL;\n    mutex->lock = 0U;\n\n    EvrRtxMutexCreated(mutex, mutex->name);\n  } else {\n    EvrRtxMutexError(NULL, (int32_t)osErrorNoMemory);\n  }\n\n  return mutex;\n}\n\n/// Get name of a Mutex object.\n/// \\note API identical to osMutexGetName\nstatic const char *svcRtxMutexGetName(osMutexId_t mutex_id) {\n  os_mutex_t *mutex = osRtxMutexId(mutex_id);\n\n  // Check parameters\n  if ((mutex == NULL) || (mutex->id != osRtxIdMutex)) {\n    EvrRtxMutexGetName(mutex, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  EvrRtxMutexGetName(mutex, mutex->name);\n\n  return mutex->name;\n}\n\n/// Acquire a Mutex or timeout if it is locked.\n/// \\note API identical to osMutexAcquire\nstatic osStatus_t svcRtxMutexAcquire(osMutexId_t mutex_id, uint32_t timeout) {\n  os_mutex_t *mutex = osRtxMutexId(mutex_id);\n  os_thread_t *thread;\n  osStatus_t status;\n\n  // Check running thread\n  thread = osRtxThreadGetRunning();\n  if (thread == NULL) {\n    EvrRtxMutexError(mutex, osRtxErrorKernelNotRunning);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osError;\n  }\n\n  // Check parameters\n  if ((mutex == NULL) || (mutex->id != osRtxIdMutex)) {\n    EvrRtxMutexError(mutex, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check if Mutex is not locked\n  if (mutex->lock == 0U) {\n    // Acquire Mutex\n    mutex->owner_thread = thread;\n    mutex->owner_prev = NULL;\n    mutex->owner_next = thread->mutex_list;\n    if (thread->mutex_list != NULL) {\n      thread->mutex_list->owner_prev = mutex;\n    }\n    thread->mutex_list = mutex;\n    mutex->lock = 1U;\n    EvrRtxMutexAcquired(mutex, mutex->lock);\n    status = osOK;\n  } else {\n    // Check if Mutex is recursive and running Thread is the owner\n    if (((mutex->attr & osMutexRecursive) != 0U) &&\n        (mutex->owner_thread == thread)) {\n      // Try to increment lock counter\n      if (mutex->lock == osRtxMutexLockLimit) {\n        EvrRtxMutexError(mutex, osRtxErrorMutexLockLimit);\n        status = osErrorResource;\n      } else {\n        mutex->lock++;\n        EvrRtxMutexAcquired(mutex, mutex->lock);\n        status = osOK;\n      }\n    } else {\n      // Check if timeout is specified\n      if (timeout != 0U) {\n        // Check if Priority inheritance protocol is enabled\n        if ((mutex->attr & osMutexPrioInherit) != 0U) {\n          // Raise priority of owner Thread if lower than priority of running\n          // Thread\n          if (mutex->owner_thread->priority < thread->priority) {\n            mutex->owner_thread->priority = thread->priority;\n            osRtxThreadListSort(mutex->owner_thread);\n          }\n        }\n        EvrRtxMutexAcquirePending(mutex, timeout);\n        // Suspend current Thread\n        if (osRtxThreadWaitEnter(osRtxThreadWaitingMutex, timeout)) {\n          osRtxThreadListPut(osRtxObject(mutex), thread);\n        } else {\n          EvrRtxMutexAcquireTimeout(mutex);\n        }\n        status = osErrorTimeout;\n      } else {\n        EvrRtxMutexNotAcquired(mutex);\n        status = osErrorResource;\n      }\n    }\n  }\n\n  return status;\n}\n\n/// Release a Mutex that was acquired by osMutexAcquire.\n/// \\note API identical to osMutexRelease\nstatic osStatus_t svcRtxMutexRelease(osMutexId_t mutex_id) {\n  os_mutex_t *mutex = osRtxMutexId(mutex_id);\n  const os_mutex_t *mutex0;\n  os_thread_t *thread;\n  int8_t priority;\n\n  // Check running thread\n  thread = osRtxThreadGetRunning();\n  if (thread == NULL) {\n    EvrRtxMutexError(mutex, osRtxErrorKernelNotRunning);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osError;\n  }\n\n  // Check parameters\n  if ((mutex == NULL) || (mutex->id != osRtxIdMutex)) {\n    EvrRtxMutexError(mutex, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check if Mutex is not locked\n  if (mutex->lock == 0U) {\n    EvrRtxMutexError(mutex, osRtxErrorMutexNotLocked);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorResource;\n  }\n\n  // Check if running Thread is not the owner\n  if (mutex->owner_thread != thread) {\n    EvrRtxMutexError(mutex, osRtxErrorMutexNotOwned);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorResource;\n  }\n\n  // Decrement Lock counter\n  mutex->lock--;\n  EvrRtxMutexReleased(mutex, mutex->lock);\n\n  // Check Lock counter\n  if (mutex->lock == 0U) {\n\n    // Remove Mutex from Thread owner list\n    if (mutex->owner_next != NULL) {\n      mutex->owner_next->owner_prev = mutex->owner_prev;\n    }\n    if (mutex->owner_prev != NULL) {\n      mutex->owner_prev->owner_next = mutex->owner_next;\n    } else {\n      thread->mutex_list = mutex->owner_next;\n    }\n\n    // Restore running Thread priority\n    if ((mutex->attr & osMutexPrioInherit) != 0U) {\n      priority = thread->priority_base;\n      mutex0 = thread->mutex_list;\n      while (mutex0 != NULL) {\n        // Mutexes owned by running Thread\n        if ((mutex0->thread_list != NULL) &&\n            (mutex0->thread_list->priority > priority)) {\n          // Higher priority Thread is waiting for Mutex\n          priority = mutex0->thread_list->priority;\n        }\n        mutex0 = mutex0->owner_next;\n      }\n      thread->priority = priority;\n    }\n\n    // Check if Thread is waiting for a Mutex\n    if (mutex->thread_list != NULL) {\n      // Wakeup waiting Thread with highest Priority\n      thread = osRtxThreadListGet(osRtxObject(mutex));\n      osRtxThreadWaitExit(thread, (uint32_t)osOK, FALSE);\n      // Thread is the new Mutex owner\n      mutex->owner_thread = thread;\n      mutex->owner_prev = NULL;\n      mutex->owner_next = thread->mutex_list;\n      if (thread->mutex_list != NULL) {\n        thread->mutex_list->owner_prev = mutex;\n      }\n      thread->mutex_list = mutex;\n      mutex->lock = 1U;\n      EvrRtxMutexAcquired(mutex, 1U);\n    }\n\n    osRtxThreadDispatch(NULL);\n  }\n\n  return osOK;\n}\n\n/// Get Thread which owns a Mutex object.\n/// \\note API identical to osMutexGetOwner\nstatic osThreadId_t svcRtxMutexGetOwner(osMutexId_t mutex_id) {\n  os_mutex_t *mutex = osRtxMutexId(mutex_id);\n\n  // Check parameters\n  if ((mutex == NULL) || (mutex->id != osRtxIdMutex)) {\n    EvrRtxMutexGetOwner(mutex, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  // Check if Mutex is not locked\n  if (mutex->lock == 0U) {\n    EvrRtxMutexGetOwner(mutex, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  EvrRtxMutexGetOwner(mutex, mutex->owner_thread);\n\n  return mutex->owner_thread;\n}\n\n/// Delete a Mutex object.\n/// \\note API identical to osMutexDelete\nstatic osStatus_t svcRtxMutexDelete(osMutexId_t mutex_id) {\n  os_mutex_t *mutex = osRtxMutexId(mutex_id);\n  const os_mutex_t *mutex0;\n  os_thread_t *thread;\n  int8_t priority;\n\n  // Check parameters\n  if ((mutex == NULL) || (mutex->id != osRtxIdMutex)) {\n    EvrRtxMutexError(mutex, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check if Mutex is locked\n  if (mutex->lock != 0U) {\n\n    thread = mutex->owner_thread;\n\n    // Remove Mutex from Thread owner list\n    if (mutex->owner_next != NULL) {\n      mutex->owner_next->owner_prev = mutex->owner_prev;\n    }\n    if (mutex->owner_prev != NULL) {\n      mutex->owner_prev->owner_next = mutex->owner_next;\n    } else {\n      thread->mutex_list = mutex->owner_next;\n    }\n\n    // Restore owner Thread priority\n    if ((mutex->attr & osMutexPrioInherit) != 0U) {\n      priority = thread->priority_base;\n      mutex0 = thread->mutex_list;\n      while (mutex0 != NULL) {\n        // Mutexes owned by running Thread\n        if ((mutex0->thread_list != NULL) &&\n            (mutex0->thread_list->priority > priority)) {\n          // Higher priority Thread is waiting for Mutex\n          priority = mutex0->thread_list->priority;\n        }\n        mutex0 = mutex0->owner_next;\n      }\n      if (thread->priority != priority) {\n        thread->priority = priority;\n        osRtxThreadListSort(thread);\n      }\n    }\n\n    // Unblock waiting threads\n    while (mutex->thread_list != NULL) {\n      thread = osRtxThreadListGet(osRtxObject(mutex));\n      osRtxThreadWaitExit(thread, (uint32_t)osErrorResource, FALSE);\n    }\n\n    osRtxThreadDispatch(NULL);\n  }\n\n  // Mark object as invalid\n  mutex->id = osRtxIdInvalid;\n\n  // Free object memory\n  if ((mutex->flags & osRtxFlagSystemObject) != 0U) {\n    if (osRtxInfo.mpi.mutex != NULL) {\n      (void)osRtxMemoryPoolFree(osRtxInfo.mpi.mutex, mutex);\n    } else {\n      (void)osRtxMemoryFree(osRtxInfo.mem.common, mutex);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    osRtxMutexMemUsage.cnt_free++;\n#endif\n  }\n\n  EvrRtxMutexDestroyed(mutex);\n\n  return osOK;\n}\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_1(MutexNew, osMutexId_t, const osMutexAttr_t *)\nSVC0_1(MutexGetName, const char *, osMutexId_t)\nSVC0_2(MutexAcquire, osStatus_t, osMutexId_t, uint32_t)\nSVC0_1(MutexRelease, osStatus_t, osMutexId_t)\nSVC0_1(MutexGetOwner, osThreadId_t, osMutexId_t)\nSVC0_1(MutexDelete, osStatus_t, osMutexId_t)\n// lint --flb \"Library End\"\n\n//  ==== Public API ====\n\n/// Create and Initialize a Mutex object.\nosMutexId_t osMutexNew(const osMutexAttr_t *attr) {\n  osMutexId_t mutex_id;\n\n  EvrRtxMutexNew(attr);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMutexError(NULL, (int32_t)osErrorISR);\n    mutex_id = NULL;\n  } else {\n    mutex_id = __svcMutexNew(attr);\n  }\n  return mutex_id;\n}\n\n/// Get name of a Mutex object.\nconst char *osMutexGetName(osMutexId_t mutex_id) {\n  const char *name;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMutexGetName(mutex_id, NULL);\n    name = NULL;\n  } else {\n    name = __svcMutexGetName(mutex_id);\n  }\n  return name;\n}\n\n/// Acquire a Mutex or timeout if it is locked.\nosStatus_t osMutexAcquire(osMutexId_t mutex_id, uint32_t timeout) {\n  osStatus_t status;\n\n  EvrRtxMutexAcquire(mutex_id, timeout);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMutexError(mutex_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcMutexAcquire(mutex_id, timeout);\n  }\n  return status;\n}\n\n/// Release a Mutex that was acquired by \\ref osMutexAcquire.\nosStatus_t osMutexRelease(osMutexId_t mutex_id) {\n  osStatus_t status;\n\n  EvrRtxMutexRelease(mutex_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMutexError(mutex_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcMutexRelease(mutex_id);\n  }\n  return status;\n}\n\n/// Get Thread which owns a Mutex object.\nosThreadId_t osMutexGetOwner(osMutexId_t mutex_id) {\n  osThreadId_t thread;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMutexGetOwner(mutex_id, NULL);\n    thread = NULL;\n  } else {\n    thread = __svcMutexGetOwner(mutex_id);\n  }\n  return thread;\n}\n\n/// Delete a Mutex object.\nosStatus_t osMutexDelete(osMutexId_t mutex_id) {\n  osStatus_t status;\n\n  EvrRtxMutexDelete(mutex_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxMutexError(mutex_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcMutexDelete(mutex_id);\n  }\n  return status;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_semaphore.c",
    "content": "/*\n * Copyright (c) 2013-2018 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Semaphore functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  OS Runtime Object Memory Usage\n#if ((defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0)))\nosRtxObjectMemUsage_t osRtxSemaphoreMemUsage\n    __attribute__((section(\".data.os.semaphore.obj\"))) = {0U, 0U, 0U};\n#endif\n\n//  ==== Helper functions ====\n\n/// Decrement Semaphore tokens.\n/// \\param[in]  semaphore       semaphore object.\n/// \\return 1 - success, 0 - failure.\nstatic uint32_t SemaphoreTokenDecrement(os_semaphore_t *semaphore) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  uint32_t ret;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  if (semaphore->tokens != 0U) {\n    semaphore->tokens--;\n    ret = 1U;\n  } else {\n    ret = 0U;\n  }\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  if (atomic_dec16_nz(&semaphore->tokens) != 0U) {\n    ret = 1U;\n  } else {\n    ret = 0U;\n  }\n#endif\n\n  return ret;\n}\n\n/// Increment Semaphore tokens.\n/// \\param[in]  semaphore       semaphore object.\n/// \\return 1 - success, 0 - failure.\nstatic uint32_t SemaphoreTokenIncrement(os_semaphore_t *semaphore) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  uint32_t ret;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  if (semaphore->tokens < semaphore->max_tokens) {\n    semaphore->tokens++;\n    ret = 1U;\n  } else {\n    ret = 0U;\n  }\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  if (atomic_inc16_lt(&semaphore->tokens, semaphore->max_tokens) <\n      semaphore->max_tokens) {\n    ret = 1U;\n  } else {\n    ret = 0U;\n  }\n#endif\n\n  return ret;\n}\n\n//  ==== Post ISR processing ====\n\n/// Semaphore post ISR processing.\n/// \\param[in]  semaphore       semaphore object.\nstatic void osRtxSemaphorePostProcess(os_semaphore_t *semaphore) {\n  os_thread_t *thread;\n\n  // Check if Thread is waiting for a token\n  if (semaphore->thread_list != NULL) {\n    // Try to acquire token\n    if (SemaphoreTokenDecrement(semaphore) != 0U) {\n      // Wakeup waiting Thread with highest Priority\n      thread = osRtxThreadListGet(osRtxObject(semaphore));\n      osRtxThreadWaitExit(thread, (uint32_t)osOK, FALSE);\n      EvrRtxSemaphoreAcquired(semaphore, semaphore->tokens);\n    }\n  }\n}\n\n//  ==== Service Calls ====\n\n/// Create and Initialize a Semaphore object.\n/// \\note API identical to osSemaphoreNew\nstatic osSemaphoreId_t svcRtxSemaphoreNew(uint32_t max_count,\n                                          uint32_t initial_count,\n                                          const osSemaphoreAttr_t *attr) {\n  os_semaphore_t *semaphore;\n  uint8_t flags;\n  const char *name;\n\n  // Check parameters\n  if ((max_count == 0U) || (max_count > osRtxSemaphoreTokenLimit) ||\n      (initial_count > max_count)) {\n    EvrRtxSemaphoreError(NULL, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  // Process attributes\n  if (attr != NULL) {\n    name = attr->name;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    semaphore = attr->cb_mem;\n    if (semaphore != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)semaphore & 3U) != 0U) ||\n          (attr->cb_size < sizeof(os_semaphore_t))) {\n        EvrRtxSemaphoreError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (attr->cb_size != 0U) {\n        EvrRtxSemaphoreError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n  } else {\n    name = NULL;\n    semaphore = NULL;\n  }\n\n  // Allocate object memory if not provided\n  if (semaphore == NULL) {\n    if (osRtxInfo.mpi.semaphore != NULL) {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      semaphore = osRtxMemoryPoolAlloc(osRtxInfo.mpi.semaphore);\n    } else {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      semaphore =\n          osRtxMemoryAlloc(osRtxInfo.mem.common, sizeof(os_semaphore_t), 1U);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    if (semaphore != NULL) {\n      uint32_t used;\n      osRtxSemaphoreMemUsage.cnt_alloc++;\n      used = osRtxSemaphoreMemUsage.cnt_alloc - osRtxSemaphoreMemUsage.cnt_free;\n      if (osRtxSemaphoreMemUsage.max_used < used) {\n        osRtxSemaphoreMemUsage.max_used = used;\n      }\n    }\n#endif\n    flags = osRtxFlagSystemObject;\n  } else {\n    flags = 0U;\n  }\n\n  if (semaphore != NULL) {\n    // Initialize control block\n    semaphore->id = osRtxIdSemaphore;\n    semaphore->flags = flags;\n    semaphore->name = name;\n    semaphore->thread_list = NULL;\n    semaphore->tokens = (uint16_t)initial_count;\n    semaphore->max_tokens = (uint16_t)max_count;\n\n    // Register post ISR processing function\n    osRtxInfo.post_process.semaphore = osRtxSemaphorePostProcess;\n\n    EvrRtxSemaphoreCreated(semaphore, semaphore->name);\n  } else {\n    EvrRtxSemaphoreError(NULL, (int32_t)osErrorNoMemory);\n  }\n\n  return semaphore;\n}\n\n/// Get name of a Semaphore object.\n/// \\note API identical to osSemaphoreGetName\nstatic const char *svcRtxSemaphoreGetName(osSemaphoreId_t semaphore_id) {\n  os_semaphore_t *semaphore = osRtxSemaphoreId(semaphore_id);\n\n  // Check parameters\n  if ((semaphore == NULL) || (semaphore->id != osRtxIdSemaphore)) {\n    EvrRtxSemaphoreGetName(semaphore, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  EvrRtxSemaphoreGetName(semaphore, semaphore->name);\n\n  return semaphore->name;\n}\n\n/// Acquire a Semaphore token or timeout if no tokens are available.\n/// \\note API identical to osSemaphoreAcquire\nstatic osStatus_t svcRtxSemaphoreAcquire(osSemaphoreId_t semaphore_id,\n                                         uint32_t timeout) {\n  os_semaphore_t *semaphore = osRtxSemaphoreId(semaphore_id);\n  osStatus_t status;\n\n  // Check parameters\n  if ((semaphore == NULL) || (semaphore->id != osRtxIdSemaphore)) {\n    EvrRtxSemaphoreError(semaphore, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Try to acquire token\n  if (SemaphoreTokenDecrement(semaphore) != 0U) {\n    EvrRtxSemaphoreAcquired(semaphore, semaphore->tokens);\n    status = osOK;\n  } else {\n    // No token available\n    if (timeout != 0U) {\n      EvrRtxSemaphoreAcquirePending(semaphore, timeout);\n      // Suspend current Thread\n      if (osRtxThreadWaitEnter(osRtxThreadWaitingSemaphore, timeout)) {\n        osRtxThreadListPut(osRtxObject(semaphore), osRtxThreadGetRunning());\n      } else {\n        EvrRtxSemaphoreAcquireTimeout(semaphore);\n      }\n      status = osErrorTimeout;\n    } else {\n      EvrRtxSemaphoreNotAcquired(semaphore);\n      status = osErrorResource;\n    }\n  }\n\n  return status;\n}\n\n/// Release a Semaphore token that was acquired by osSemaphoreAcquire.\n/// \\note API identical to osSemaphoreRelease\nstatic osStatus_t svcRtxSemaphoreRelease(osSemaphoreId_t semaphore_id) {\n  os_semaphore_t *semaphore = osRtxSemaphoreId(semaphore_id);\n  os_thread_t *thread;\n  osStatus_t status;\n\n  // Check parameters\n  if ((semaphore == NULL) || (semaphore->id != osRtxIdSemaphore)) {\n    EvrRtxSemaphoreError(semaphore, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check if Thread is waiting for a token\n  if (semaphore->thread_list != NULL) {\n    EvrRtxSemaphoreReleased(semaphore, semaphore->tokens);\n    // Wakeup waiting Thread with highest Priority\n    thread = osRtxThreadListGet(osRtxObject(semaphore));\n    osRtxThreadWaitExit(thread, (uint32_t)osOK, TRUE);\n    EvrRtxSemaphoreAcquired(semaphore, semaphore->tokens);\n    status = osOK;\n  } else {\n    // Try to release token\n    if (SemaphoreTokenIncrement(semaphore) != 0U) {\n      EvrRtxSemaphoreReleased(semaphore, semaphore->tokens);\n      status = osOK;\n    } else {\n      EvrRtxSemaphoreError(semaphore, osRtxErrorSemaphoreCountLimit);\n      status = osErrorResource;\n    }\n  }\n\n  return status;\n}\n\n/// Get current Semaphore token count.\n/// \\note API identical to osSemaphoreGetCount\nstatic uint32_t svcRtxSemaphoreGetCount(osSemaphoreId_t semaphore_id) {\n  os_semaphore_t *semaphore = osRtxSemaphoreId(semaphore_id);\n\n  // Check parameters\n  if ((semaphore == NULL) || (semaphore->id != osRtxIdSemaphore)) {\n    EvrRtxSemaphoreGetCount(semaphore, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxSemaphoreGetCount(semaphore, semaphore->tokens);\n\n  return semaphore->tokens;\n}\n\n/// Delete a Semaphore object.\n/// \\note API identical to osSemaphoreDelete\nstatic osStatus_t svcRtxSemaphoreDelete(osSemaphoreId_t semaphore_id) {\n  os_semaphore_t *semaphore = osRtxSemaphoreId(semaphore_id);\n  os_thread_t *thread;\n\n  // Check parameters\n  if ((semaphore == NULL) || (semaphore->id != osRtxIdSemaphore)) {\n    EvrRtxSemaphoreError(semaphore, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Unblock waiting threads\n  if (semaphore->thread_list != NULL) {\n    do {\n      thread = osRtxThreadListGet(osRtxObject(semaphore));\n      osRtxThreadWaitExit(thread, (uint32_t)osErrorResource, FALSE);\n    } while (semaphore->thread_list != NULL);\n    osRtxThreadDispatch(NULL);\n  }\n\n  // Mark object as invalid\n  semaphore->id = osRtxIdInvalid;\n\n  // Free object memory\n  if ((semaphore->flags & osRtxFlagSystemObject) != 0U) {\n    if (osRtxInfo.mpi.semaphore != NULL) {\n      (void)osRtxMemoryPoolFree(osRtxInfo.mpi.semaphore, semaphore);\n    } else {\n      (void)osRtxMemoryFree(osRtxInfo.mem.common, semaphore);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    osRtxSemaphoreMemUsage.cnt_free++;\n#endif\n  }\n\n  EvrRtxSemaphoreDestroyed(semaphore);\n\n  return osOK;\n}\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_3(SemaphoreNew, osSemaphoreId_t, uint32_t, uint32_t,\n       const osSemaphoreAttr_t *)\nSVC0_1(SemaphoreGetName, const char *, osSemaphoreId_t)\nSVC0_2(SemaphoreAcquire, osStatus_t, osSemaphoreId_t, uint32_t)\nSVC0_1(SemaphoreRelease, osStatus_t, osSemaphoreId_t)\nSVC0_1(SemaphoreGetCount, uint32_t, osSemaphoreId_t)\nSVC0_1(SemaphoreDelete, osStatus_t, osSemaphoreId_t)\n// lint --flb \"Library End\"\n\n//  ==== ISR Calls ====\n\n/// Acquire a Semaphore token or timeout if no tokens are available.\n/// \\note API identical to osSemaphoreAcquire\n__STATIC_INLINE\nosStatus_t isrRtxSemaphoreAcquire(osSemaphoreId_t semaphore_id,\n                                  uint32_t timeout) {\n  os_semaphore_t *semaphore = osRtxSemaphoreId(semaphore_id);\n  osStatus_t status;\n\n  // Check parameters\n  if ((semaphore == NULL) || (semaphore->id != osRtxIdSemaphore) ||\n      (timeout != 0U)) {\n    EvrRtxSemaphoreError(semaphore, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Try to acquire token\n  if (SemaphoreTokenDecrement(semaphore) != 0U) {\n    EvrRtxSemaphoreAcquired(semaphore, semaphore->tokens);\n    status = osOK;\n  } else {\n    // No token available\n    EvrRtxSemaphoreNotAcquired(semaphore);\n    status = osErrorResource;\n  }\n\n  return status;\n}\n\n/// Release a Semaphore token that was acquired by osSemaphoreAcquire.\n/// \\note API identical to osSemaphoreRelease\n__STATIC_INLINE\nosStatus_t isrRtxSemaphoreRelease(osSemaphoreId_t semaphore_id) {\n  os_semaphore_t *semaphore = osRtxSemaphoreId(semaphore_id);\n  osStatus_t status;\n\n  // Check parameters\n  if ((semaphore == NULL) || (semaphore->id != osRtxIdSemaphore)) {\n    EvrRtxSemaphoreError(semaphore, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Try to release token\n  if (SemaphoreTokenIncrement(semaphore) != 0U) {\n    // Register post ISR processing\n    osRtxPostProcess(osRtxObject(semaphore));\n    EvrRtxSemaphoreReleased(semaphore, semaphore->tokens);\n    status = osOK;\n  } else {\n    EvrRtxSemaphoreError(semaphore, osRtxErrorSemaphoreCountLimit);\n    status = osErrorResource;\n  }\n\n  return status;\n}\n\n//  ==== Public API ====\n\n/// Create and Initialize a Semaphore object.\nosSemaphoreId_t osSemaphoreNew(uint32_t max_count, uint32_t initial_count,\n                               const osSemaphoreAttr_t *attr) {\n  osSemaphoreId_t semaphore_id;\n\n  EvrRtxSemaphoreNew(max_count, initial_count, attr);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxSemaphoreError(NULL, (int32_t)osErrorISR);\n    semaphore_id = NULL;\n  } else {\n    semaphore_id = __svcSemaphoreNew(max_count, initial_count, attr);\n  }\n  return semaphore_id;\n}\n\n/// Get name of a Semaphore object.\nconst char *osSemaphoreGetName(osSemaphoreId_t semaphore_id) {\n  const char *name;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxSemaphoreGetName(semaphore_id, NULL);\n    name = NULL;\n  } else {\n    name = __svcSemaphoreGetName(semaphore_id);\n  }\n  return name;\n}\n\n/// Acquire a Semaphore token or timeout if no tokens are available.\nosStatus_t osSemaphoreAcquire(osSemaphoreId_t semaphore_id, uint32_t timeout) {\n  osStatus_t status;\n\n  EvrRtxSemaphoreAcquire(semaphore_id, timeout);\n  if (IsIrqMode() || IsIrqMasked()) {\n    status = isrRtxSemaphoreAcquire(semaphore_id, timeout);\n  } else {\n    status = __svcSemaphoreAcquire(semaphore_id, timeout);\n  }\n  return status;\n}\n\n/// Release a Semaphore token that was acquired by osSemaphoreAcquire.\nosStatus_t osSemaphoreRelease(osSemaphoreId_t semaphore_id) {\n  osStatus_t status;\n\n  EvrRtxSemaphoreRelease(semaphore_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    status = isrRtxSemaphoreRelease(semaphore_id);\n  } else {\n    status = __svcSemaphoreRelease(semaphore_id);\n  }\n  return status;\n}\n\n/// Get current Semaphore token count.\nuint32_t osSemaphoreGetCount(osSemaphoreId_t semaphore_id) {\n  uint32_t count;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    count = svcRtxSemaphoreGetCount(semaphore_id);\n  } else {\n    count = __svcSemaphoreGetCount(semaphore_id);\n  }\n  return count;\n}\n\n/// Delete a Semaphore object.\nosStatus_t osSemaphoreDelete(osSemaphoreId_t semaphore_id) {\n  osStatus_t status;\n\n  EvrRtxSemaphoreDelete(semaphore_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxSemaphoreError(semaphore_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcSemaphoreDelete(semaphore_id);\n  }\n  return status;\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_system.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       System functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  ==== Helper functions ====\n\n/// Put Object into ISR Queue.\n/// \\param[in]  object          object.\n/// \\return 1 - success, 0 - failure.\nstatic uint32_t isr_queue_put(os_object_t *object) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#else\n  uint32_t n;\n#endif\n  uint16_t max;\n  uint32_t ret;\n\n  max = osRtxInfo.isr_queue.max;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  if (osRtxInfo.isr_queue.cnt < max) {\n    osRtxInfo.isr_queue.cnt++;\n    osRtxInfo.isr_queue.data[osRtxInfo.isr_queue.in] = object;\n    if (++osRtxInfo.isr_queue.in == max) {\n      osRtxInfo.isr_queue.in = 0U;\n    }\n    ret = 1U;\n  } else {\n    ret = 0U;\n  }\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  if (atomic_inc16_lt(&osRtxInfo.isr_queue.cnt, max) < max) {\n    n = atomic_inc16_lim(&osRtxInfo.isr_queue.in, max);\n    osRtxInfo.isr_queue.data[n] = object;\n    ret = 1U;\n  } else {\n    ret = 0U;\n  }\n#endif\n\n  return ret;\n}\n\n/// Get Object from ISR Queue.\n/// \\return object or NULL.\nstatic os_object_t *isr_queue_get(void) {\n#if (EXCLUSIVE_ACCESS != 0)\n  uint32_t n;\n#endif\n  uint16_t max;\n  os_object_t *ret;\n\n  max = osRtxInfo.isr_queue.max;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  if (osRtxInfo.isr_queue.cnt != 0U) {\n    osRtxInfo.isr_queue.cnt--;\n    ret = osRtxObject(osRtxInfo.isr_queue.data[osRtxInfo.isr_queue.out]);\n    if (++osRtxInfo.isr_queue.out == max) {\n      osRtxInfo.isr_queue.out = 0U;\n    }\n  } else {\n    ret = NULL;\n  }\n\n  __enable_irq();\n#else\n  if (atomic_dec16_nz(&osRtxInfo.isr_queue.cnt) != 0U) {\n    n = atomic_inc16_lim(&osRtxInfo.isr_queue.out, max);\n    ret = osRtxObject(osRtxInfo.isr_queue.data[n]);\n  } else {\n    ret = NULL;\n  }\n#endif\n\n  return ret;\n}\n\n//  ==== Library Functions ====\n\n/// Tick Handler.\n// lint -esym(714,osRtxTick_Handler) \"Referenced by Exception handlers\"\n// lint -esym(759,osRtxTick_Handler) \"Prototype in header\"\n// lint -esym(765,osRtxTick_Handler) \"Global scope\"\nvoid osRtxTick_Handler(void) {\n  os_thread_t *thread;\n\n  OS_Tick_AcknowledgeIRQ();\n  osRtxInfo.kernel.tick++;\n\n#if __RTX_CPU_STATISTICS__\n  osRtxInfo.thread.run.curr->rtime += 1;\n#endif\n\n  // Process Timers\n  if (osRtxInfo.timer.tick != NULL) {\n    osRtxInfo.timer.tick();\n  }\n\n  // Process Thread Delays\n  osRtxThreadDelayTick();\n\n  osRtxThreadDispatch(NULL);\n\n  // Check Round Robin timeout\n  if (osRtxInfo.thread.robin.timeout != 0U) {\n    if (osRtxInfo.thread.robin.thread != osRtxInfo.thread.run.next) {\n      // Reset Round Robin\n      osRtxInfo.thread.robin.thread = osRtxInfo.thread.run.next;\n      osRtxInfo.thread.robin.tick = osRtxInfo.thread.robin.timeout;\n    } else {\n      if (osRtxInfo.thread.robin.tick != 0U) {\n        osRtxInfo.thread.robin.tick--;\n      }\n      if (osRtxInfo.thread.robin.tick == 0U) {\n        // Round Robin Timeout\n        if (osRtxKernelGetState() == osRtxKernelRunning) {\n          thread = osRtxInfo.thread.ready.thread_list;\n          if ((thread != NULL) &&\n              (thread->priority == osRtxInfo.thread.robin.thread->priority)) {\n            osRtxThreadListRemove(thread);\n            osRtxThreadReadyPut(osRtxInfo.thread.robin.thread);\n            EvrRtxThreadPreempted(osRtxInfo.thread.robin.thread);\n            osRtxThreadSwitch(thread);\n            osRtxInfo.thread.robin.thread = thread;\n            osRtxInfo.thread.robin.tick = osRtxInfo.thread.robin.timeout;\n          }\n        }\n      }\n    }\n  }\n}\n\n/// Pending Service Call Handler.\n// lint -esym(714,osRtxPendSV_Handler) \"Referenced by Exception handlers\"\n// lint -esym(759,osRtxPendSV_Handler) \"Prototype in header\"\n// lint -esym(765,osRtxPendSV_Handler) \"Global scope\"\nvoid osRtxPendSV_Handler(void) {\n  os_object_t *object;\n\n  for (;;) {\n    object = isr_queue_get();\n    if (object == NULL) {\n      break;\n    }\n    switch (object->id) {\n    case osRtxIdThread:\n      osRtxInfo.post_process.thread(osRtxThreadObject(object));\n      break;\n    case osRtxIdEventFlags:\n      osRtxInfo.post_process.event_flags(osRtxEventFlagsObject(object));\n      break;\n    case osRtxIdSemaphore:\n      osRtxInfo.post_process.semaphore(osRtxSemaphoreObject(object));\n      break;\n    case osRtxIdMemoryPool:\n      osRtxInfo.post_process.memory_pool(osRtxMemoryPoolObject(object));\n      break;\n    case osRtxIdMessage:\n      osRtxInfo.post_process.message(osRtxMessageObject(object));\n      break;\n    default:\n      // Should never come here\n      break;\n    }\n  }\n\n  osRtxThreadDispatch(NULL);\n}\n\n/// Register post ISR processing.\n/// \\param[in]  object          generic object.\nvoid osRtxPostProcess(os_object_t *object) {\n\n  if (isr_queue_put(object) != 0U) {\n    if (osRtxInfo.kernel.blocked == 0U) {\n      SetPendSV();\n    } else {\n      osRtxInfo.kernel.pendSV = 1U;\n    }\n  } else {\n    (void)osRtxErrorNotify(osRtxErrorISRQueueOverflow, object);\n  }\n}\n"
  },
  {
    "path": "rtos/rtx5/rtx_thread.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Thread functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"hal_timer.h\"\n#include \"rtx_lib.h\"\n\n//  OS Runtime Object Memory Usage\n#if ((defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0)))\nosRtxObjectMemUsage_t osRtxThreadMemUsage\n    __attribute__((section(\".data.os.thread.obj\"))) = {0U, 0U, 0U};\n#endif\n\n#if __RTX_CPU_STATISTICS__\nuint32_t rtx_get_hwticks(void) { return hal_sys_timer_get(); }\n#endif\n\n//  ==== Helper functions ====\n\n/// Set Thread Flags.\n/// \\param[in]  thread          thread object.\n/// \\param[in]  flags           specifies the flags to set.\n/// \\return thread flags after setting.\nstatic uint32_t ThreadFlagsSet(os_thread_t *thread, uint32_t flags) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  uint32_t thread_flags;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  thread->thread_flags |= flags;\n  thread_flags = thread->thread_flags;\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  thread_flags = atomic_set32(&thread->thread_flags, flags);\n#endif\n\n  return thread_flags;\n}\n\n/// Clear Thread Flags.\n/// \\param[in]  thread          thread object.\n/// \\param[in]  flags           specifies the flags to clear.\n/// \\return thread flags before clearing.\nstatic uint32_t ThreadFlagsClear(os_thread_t *thread, uint32_t flags) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask = __get_PRIMASK();\n#endif\n  uint32_t thread_flags;\n\n#if (EXCLUSIVE_ACCESS == 0)\n  __disable_irq();\n\n  thread_flags = thread->thread_flags;\n  thread->thread_flags &= ~flags;\n\n  if (primask == 0U) {\n    __enable_irq();\n  }\n#else\n  thread_flags = atomic_clr32(&thread->thread_flags, flags);\n#endif\n\n  return thread_flags;\n}\n\n/// Check Thread Flags.\n/// \\param[in]  thread          thread object.\n/// \\param[in]  flags           specifies the flags to check.\n/// \\param[in]  options         specifies flags options (osFlagsXxxx).\n/// \\return thread flags before clearing or 0 if specified flags have not been\n/// set.\nstatic uint32_t ThreadFlagsCheck(os_thread_t *thread, uint32_t flags,\n                                 uint32_t options) {\n#if (EXCLUSIVE_ACCESS == 0)\n  uint32_t primask;\n#endif\n  uint32_t thread_flags;\n\n  if ((options & osFlagsNoClear) == 0U) {\n#if (EXCLUSIVE_ACCESS == 0)\n    primask = __get_PRIMASK();\n    __disable_irq();\n\n    thread_flags = thread->thread_flags;\n    if ((((options & osFlagsWaitAll) != 0U) &&\n         ((thread_flags & flags) != flags)) ||\n        (((options & osFlagsWaitAll) == 0U) &&\n         ((thread_flags & flags) == 0U))) {\n      thread_flags = 0U;\n    } else {\n      thread->thread_flags &= ~flags;\n    }\n\n    if (primask == 0U) {\n      __enable_irq();\n    }\n#else\n    if ((options & osFlagsWaitAll) != 0U) {\n      thread_flags = atomic_chk32_all(&thread->thread_flags, flags);\n    } else {\n      thread_flags = atomic_chk32_any(&thread->thread_flags, flags);\n    }\n#endif\n  } else {\n    thread_flags = thread->thread_flags;\n    if ((((options & osFlagsWaitAll) != 0U) &&\n         ((thread_flags & flags) != flags)) ||\n        (((options & osFlagsWaitAll) == 0U) &&\n         ((thread_flags & flags) == 0U))) {\n      thread_flags = 0U;\n    }\n  }\n\n  return thread_flags;\n}\n\n//  ==== Library functions ====\n\n/// Put a Thread into specified Object list sorted by Priority (Highest at\n/// Head). \\param[in]  object          generic object. \\param[in]  thread thread\n/// object.\nvoid osRtxThreadListPut(os_object_t *object, os_thread_t *thread) {\n  os_thread_t *prev, *next;\n  int32_t priority;\n\n  priority = thread->priority;\n\n  prev = osRtxThreadObject(object);\n  next = prev->thread_next;\n  while ((next != NULL) && (next->priority >= priority)) {\n    prev = next;\n    next = next->thread_next;\n  }\n  thread->thread_prev = prev;\n  thread->thread_next = next;\n  prev->thread_next = thread;\n  if (next != NULL) {\n    next->thread_prev = thread;\n  }\n}\n\n/// Get a Thread with Highest Priority from specified Object list and remove it.\n/// \\param[in]  object          generic object.\n/// \\return thread object.\nos_thread_t *osRtxThreadListGet(os_object_t *object) {\n  os_thread_t *thread;\n\n  thread = object->thread_list;\n  object->thread_list = thread->thread_next;\n  if (thread->thread_next != NULL) {\n    thread->thread_next->thread_prev = osRtxThreadObject(object);\n  }\n  thread->thread_prev = NULL;\n\n  return thread;\n}\n\n#if (!defined(EVR_RTX_DISABLE) &&                                              \\\n     (((OS_EVR_EVFLAGS != 0) &&                                                \\\n       !defined(EVR_RTX_EVENT_FLAGS_WAIT_TIMEOUT_DISABLE)) ||                  \\\n      ((OS_EVR_MUTEX != 0) &&                                                  \\\n       !defined(EVR_RTX_MUTEX_ACQUIRE_TIMEOUT_DISABLE)) ||                     \\\n      ((OS_EVR_SEMAPHORE != 0) &&                                              \\\n       !defined(EVR_RTX_SEMAPHORE_ACQUIRE_TIMEOUT_DISABLE)) ||                 \\\n      ((OS_EVR_MEMPOOL != 0) &&                                                \\\n       !defined(EVR_RTX_MEMORY_POOL_ALLOC_TIMEOUT_DISABLE)) ||                 \\\n      ((OS_EVR_MSGQUEUE != 0) &&                                               \\\n       !defined(EVR_RTX_MESSAGE_QUEUE_GET_TIMEOUT_DISABLE)) ||                 \\\n      ((OS_EVR_MSGQUEUE != 0) &&                                               \\\n       !defined(EVR_RTX_MESSAGE_QUEUE_PUT_TIMEOUT_DISABLE))))\n\n/// Retrieve Thread list root.\n/// \\param[in]  thread          thread object.\nstatic void *osRtxThreadListRoot(os_thread_t *thread) {\n  os_thread_t *thread0;\n\n  thread0 = thread;\n  while (thread0->id == osRtxIdThread) {\n    thread0 = thread0->thread_prev;\n  }\n  return thread0;\n}\n\n#endif\n\n/// Re-sort a Thread in linked Object list by Priority (Highest at Head).\n/// \\param[in]  thread          thread object.\nvoid osRtxThreadListSort(os_thread_t *thread) {\n  os_object_t *object;\n  os_thread_t *thread0;\n\n  // Search for object\n  thread0 = thread;\n  while ((thread0 != NULL) && (thread0->id == osRtxIdThread)) {\n    thread0 = thread0->thread_prev;\n  }\n  object = osRtxObject(thread0);\n\n  if (object != NULL) {\n    osRtxThreadListRemove(thread);\n    osRtxThreadListPut(object, thread);\n  }\n}\n\n/// Remove a Thread from linked Object list.\n/// \\param[in]  thread          thread object.\nvoid osRtxThreadListRemove(os_thread_t *thread) {\n\n  if (thread->thread_prev != NULL) {\n    thread->thread_prev->thread_next = thread->thread_next;\n    if (thread->thread_next != NULL) {\n      thread->thread_next->thread_prev = thread->thread_prev;\n    }\n    thread->thread_prev = NULL;\n  }\n}\n\n/// Unlink a Thread from specified linked list.\n/// \\param[in]  thread          thread object.\nstatic void osRtxThreadListUnlink(os_thread_t **thread_list,\n                                  os_thread_t *thread) {\n\n  if (thread->thread_next != NULL) {\n    thread->thread_next->thread_prev = thread->thread_prev;\n  }\n  if (thread->thread_prev != NULL) {\n    thread->thread_prev->thread_next = thread->thread_next;\n    thread->thread_prev = NULL;\n  } else {\n    *thread_list = thread->thread_next;\n  }\n}\n\n/// Mark a Thread as Ready and put it into Ready list (sorted by Priority).\n/// \\param[in]  thread          thread object.\nvoid osRtxThreadReadyPut(os_thread_t *thread) {\n\n  thread->state = osRtxThreadReady;\n  osRtxThreadListPut(&osRtxInfo.thread.ready, thread);\n}\n\n/// Insert a Thread into the Delay list sorted by Delay (Lowest at Head).\n/// \\param[in]  thread          thread object.\n/// \\param[in]  delay           delay value.\nstatic void osRtxThreadDelayInsert(os_thread_t *thread, uint32_t delay) {\n  os_thread_t *prev, *next;\n\n  if (delay == osWaitForever) {\n    prev = NULL;\n    next = osRtxInfo.thread.wait_list;\n    while (next != NULL) {\n      prev = next;\n      next = next->delay_next;\n    }\n    thread->delay = delay;\n    thread->delay_prev = prev;\n    thread->delay_next = NULL;\n    if (prev != NULL) {\n      prev->delay_next = thread;\n    } else {\n      osRtxInfo.thread.wait_list = thread;\n    }\n  } else {\n    prev = NULL;\n    next = osRtxInfo.thread.delay_list;\n    while ((next != NULL) && (next->delay <= delay)) {\n      delay -= next->delay;\n      prev = next;\n      next = next->delay_next;\n    }\n    thread->delay = delay;\n    thread->delay_prev = prev;\n    thread->delay_next = next;\n    if (prev != NULL) {\n      prev->delay_next = thread;\n    } else {\n      osRtxInfo.thread.delay_list = thread;\n    }\n    if (next != NULL) {\n      next->delay -= delay;\n      next->delay_prev = thread;\n    }\n  }\n}\n\n/// Remove a Thread from the Delay list.\n/// \\param[in]  thread          thread object.\nstatic void osRtxThreadDelayRemove(os_thread_t *thread) {\n\n  if (thread->delay == osWaitForever) {\n    if (thread->delay_next != NULL) {\n      thread->delay_next->delay_prev = thread->delay_prev;\n    }\n    if (thread->delay_prev != NULL) {\n      thread->delay_prev->delay_next = thread->delay_next;\n      thread->delay_prev = NULL;\n    } else {\n      osRtxInfo.thread.wait_list = thread->delay_next;\n    }\n  } else {\n    if (thread->delay_next != NULL) {\n      thread->delay_next->delay += thread->delay;\n      thread->delay_next->delay_prev = thread->delay_prev;\n    }\n    if (thread->delay_prev != NULL) {\n      thread->delay_prev->delay_next = thread->delay_next;\n      thread->delay_prev = NULL;\n    } else {\n      osRtxInfo.thread.delay_list = thread->delay_next;\n    }\n  }\n}\n\n/// Process Thread Delay Tick (executed each System Tick).\nvoid osRtxThreadDelayTick(void) {\n  os_thread_t *thread;\n\n  thread = osRtxInfo.thread.delay_list;\n  if (thread == NULL) {\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return;\n  }\n\n  thread->delay--;\n\n  if (thread->delay == 0U) {\n    do {\n      switch (thread->state) {\n      case osRtxThreadWaitingDelay:\n        EvrRtxDelayCompleted(thread);\n        break;\n      case osRtxThreadWaitingThreadFlags:\n        EvrRtxThreadFlagsWaitTimeout(thread);\n        break;\n      case osRtxThreadWaitingEventFlags:\n        EvrRtxEventFlagsWaitTimeout(\n            (osEventFlagsId_t)osRtxThreadListRoot(thread));\n        break;\n      case osRtxThreadWaitingMutex:\n        EvrRtxMutexAcquireTimeout((osMutexId_t)osRtxThreadListRoot(thread));\n        break;\n      case osRtxThreadWaitingSemaphore:\n        EvrRtxSemaphoreAcquireTimeout(\n            (osSemaphoreId_t)osRtxThreadListRoot(thread));\n        break;\n      case osRtxThreadWaitingMemoryPool:\n        EvrRtxMemoryPoolAllocTimeout(\n            (osMemoryPoolId_t)osRtxThreadListRoot(thread));\n        break;\n      case osRtxThreadWaitingMessageGet:\n        EvrRtxMessageQueueGetTimeout(\n            (osMessageQueueId_t)osRtxThreadListRoot(thread));\n        break;\n      case osRtxThreadWaitingMessagePut:\n        EvrRtxMessageQueuePutTimeout(\n            (osMessageQueueId_t)osRtxThreadListRoot(thread));\n        break;\n      default:\n        // Invalid\n        break;\n      }\n      EvrRtxThreadUnblocked(thread, (osRtxThreadRegPtr(thread))[0]);\n      osRtxThreadListRemove(thread);\n      osRtxThreadReadyPut(thread);\n      thread = thread->delay_next;\n    } while ((thread != NULL) && (thread->delay == 0U));\n    if (thread != NULL) {\n      thread->delay_prev = NULL;\n    }\n    osRtxInfo.thread.delay_list = thread;\n  }\n}\n\n/// Get pointer to Thread registers (R0..R3)\n/// \\param[in]  thread          thread object.\n/// \\return pointer to registers R0-R3.\nuint32_t *osRtxThreadRegPtr(const os_thread_t *thread) {\n  uint32_t addr = thread->sp + StackOffsetR0(thread->stack_frame);\n  // lint -e{923} -e{9078} \"cast from unsigned int to pointer\"\n  return ((uint32_t *)addr);\n}\n\n/// Block running Thread execution and register it as Ready to Run.\n/// \\param[in]  thread          running thread object.\nstatic void osRtxThreadBlock(os_thread_t *thread) {\n  os_thread_t *prev, *next;\n  int32_t priority;\n\n  thread->state = osRtxThreadReady;\n\n  priority = thread->priority;\n\n  prev = osRtxThreadObject(&osRtxInfo.thread.ready);\n  next = prev->thread_next;\n\n  while ((next != NULL) && (next->priority > priority)) {\n    prev = next;\n    next = next->thread_next;\n  }\n  thread->thread_prev = prev;\n  thread->thread_next = next;\n  prev->thread_next = thread;\n  if (next != NULL) {\n    next->thread_prev = thread;\n  }\n\n  EvrRtxThreadPreempted(thread);\n}\n\n/// Switch to specified Thread.\n/// \\param[in]  thread          thread object.\nvoid osRtxThreadSwitch(os_thread_t *thread) {\n\n  thread->state = osRtxThreadRunning;\n  osRtxInfo.thread.run.next = thread;\n#if __RTX_CPU_STATISTICS__\n  if (osRtxInfo.thread.run.curr != thread) {\n    if (osRtxInfo.thread.run.curr)\n      osRtxInfo.thread.run.curr->swap_out_time =\n          HWTICKS_TO_MS(rtx_get_hwticks());\n    thread->swap_in_time = HWTICKS_TO_MS(rtx_get_hwticks());\n  }\n#endif\n  osRtxThreadStackCheck();\n  EvrRtxThreadSwitched(thread);\n}\n\n/// Dispatch specified Thread or Ready Thread with Highest Priority.\n/// \\param[in]  thread          thread object or NULL.\nvoid osRtxThreadDispatch(os_thread_t *thread) {\n  uint8_t kernel_state;\n  os_thread_t *thread_running;\n  os_thread_t *thread_ready;\n\n  kernel_state = osRtxKernelGetState();\n  thread_running = osRtxThreadGetRunning();\n\n  if (thread == NULL) {\n    thread_ready = osRtxInfo.thread.ready.thread_list;\n    if ((kernel_state == osRtxKernelRunning) && (thread_ready != NULL) &&\n        (thread_ready->priority > thread_running->priority)) {\n      // Preempt running Thread\n      osRtxThreadListRemove(thread_ready);\n      osRtxThreadBlock(thread_running);\n      osRtxThreadSwitch(thread_ready);\n    }\n  } else {\n    if ((kernel_state == osRtxKernelRunning) &&\n        (thread->priority > thread_running->priority)) {\n      // Preempt running Thread\n      osRtxThreadBlock(thread_running);\n      osRtxThreadSwitch(thread);\n    } else {\n      // Put Thread into Ready list\n      osRtxThreadReadyPut(thread);\n    }\n  }\n}\n\n/// Exit Thread wait state.\n/// \\param[in]  thread          thread object.\n/// \\param[in]  ret_val         return value.\n/// \\param[in]  dispatch        dispatch flag.\nvoid osRtxThreadWaitExit(os_thread_t *thread, uint32_t ret_val,\n                         bool_t dispatch) {\n  uint32_t *reg;\n\n  EvrRtxThreadUnblocked(thread, ret_val);\n\n  reg = osRtxThreadRegPtr(thread);\n  reg[0] = ret_val;\n\n  osRtxThreadDelayRemove(thread);\n  if (dispatch) {\n    osRtxThreadDispatch(thread);\n  } else {\n    osRtxThreadReadyPut(thread);\n  }\n}\n\n/// Enter Thread wait state.\n/// \\param[in]  state           new thread state.\n/// \\param[in]  timeout         timeout.\n/// \\return true - success, false - failure.\nbool_t osRtxThreadWaitEnter(uint8_t state, uint32_t timeout) {\n  os_thread_t *thread;\n\n  // Check if Kernel is running\n  if (osRtxKernelGetState() != osRtxKernelRunning) {\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return FALSE;\n  }\n\n  // Check if any thread is ready\n  if (osRtxInfo.thread.ready.thread_list == NULL) {\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return FALSE;\n  }\n\n  // Get running thread\n  thread = osRtxThreadGetRunning();\n\n  EvrRtxThreadBlocked(thread, timeout);\n\n  thread->state = state;\n  osRtxThreadDelayInsert(thread, timeout);\n  thread = osRtxThreadListGet(&osRtxInfo.thread.ready);\n  osRtxThreadSwitch(thread);\n\n  return TRUE;\n}\n\n/// Check current running Thread Stack.\n// lint -esym(759,osRtxThreadStackCheck) \"Prototype in header\"\n// lint -esym(765,osRtxThreadStackCheck) \"Global scope (can be overridden)\"\n__WEAK void osRtxThreadStackCheck(void) {\n  os_thread_t *thread;\n\n  thread = osRtxThreadGetRunning();\n  if (thread != NULL) {\n    // lint -e{923} \"cast from pointer to unsigned int\"\n    // lint -e{9079} -e{9087} \"cast between pointers to different object types\"\n    if ((thread->sp <= (uint32_t)thread->stack_mem) ||\n        (*((uint32_t *)thread->stack_mem) != osRtxStackMagicWord)) {\n      (void)osRtxErrorNotify(osRtxErrorStackUnderflow, thread);\n    }\n  }\n}\n\n#ifdef RTX_TF_M_EXTENSION\n/// Get TrustZone Module Identifier of running Thread.\n/// \\return TrustZone Module Identifier.\nuint32_t osRtxTzGetModuleId(void) {\n  os_thread_t *thread;\n  uint32_t tz_module;\n\n  thread = osRtxThreadGetRunning();\n  if (thread != NULL) {\n    tz_module = thread->tz_module;\n  } else {\n    tz_module = 0U;\n  }\n\n  return tz_module;\n}\n#endif\n\n//  ==== Post ISR processing ====\n\n/// Thread post ISR processing.\n/// \\param[in]  thread          thread object.\nstatic void osRtxThreadPostProcess(os_thread_t *thread) {\n  uint32_t thread_flags;\n\n  // Check if Thread is waiting for Thread Flags\n  if (thread->state == osRtxThreadWaitingThreadFlags) {\n    thread_flags =\n        ThreadFlagsCheck(thread, thread->wait_flags, thread->flags_options);\n    if (thread_flags != 0U) {\n      osRtxThreadWaitExit(thread, thread_flags, FALSE);\n      EvrRtxThreadFlagsWaitCompleted(thread->wait_flags, thread->flags_options,\n                                     thread_flags, thread);\n    }\n  }\n}\n\n//  ==== Service Calls ====\n\n/// Create a thread and add it to Active Threads.\n/// \\note API identical to osThreadNew\nstatic osThreadId_t svcRtxThreadNew(osThreadFunc_t func, void *argument,\n                                    const osThreadAttr_t *attr) {\n  os_thread_t *thread;\n  uint32_t attr_bits;\n  void *stack_mem;\n  uint32_t stack_size;\n  osPriority_t priority;\n  uint8_t flags;\n  const char *name;\n  uint32_t *ptr;\n  uint32_t n;\n#if (DOMAIN_NS == 1)\n  TZ_ModuleId_t tz_module;\n  TZ_MemoryId_t tz_memory;\n#endif\n\n  // Check parameters\n  if (func == NULL) {\n    EvrRtxThreadError(NULL, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  // Process attributes\n  if (attr != NULL) {\n    name = attr->name;\n    attr_bits = attr->attr_bits;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    thread = attr->cb_mem;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    stack_mem = attr->stack_mem;\n    stack_size = attr->stack_size;\n    priority = attr->priority;\n#if (DOMAIN_NS == 1)\n    tz_module = attr->tz_module;\n#endif\n    if (thread != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)thread & 3U) != 0U) ||\n          (attr->cb_size < sizeof(os_thread_t))) {\n        EvrRtxThreadError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (attr->cb_size != 0U) {\n        EvrRtxThreadError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n    if (stack_mem != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)stack_mem & 7U) != 0U) || (stack_size == 0U)) {\n        EvrRtxThreadError(NULL, osRtxErrorInvalidThreadStack);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n    if (priority == osPriorityNone) {\n      priority = osPriorityNormal;\n    } else {\n      if ((priority < osPriorityIdle) || (priority > osPriorityISR)) {\n        EvrRtxThreadError(NULL, osRtxErrorInvalidPriority);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n  } else {\n    name = NULL;\n    attr_bits = 0U;\n    thread = NULL;\n    stack_mem = NULL;\n    stack_size = 0U;\n    priority = osPriorityNormal;\n#if (DOMAIN_NS == 1)\n    tz_module = 0U;\n#endif\n  }\n\n  // Check stack size\n  if ((stack_size != 0U) &&\n      (((stack_size & 7U) != 0U) || (stack_size < (64U + 8U)))) {\n    EvrRtxThreadError(NULL, osRtxErrorInvalidThreadStack);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  // Allocate object memory if not provided\n  if (thread == NULL) {\n    if (osRtxInfo.mpi.thread != NULL) {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      thread = osRtxMemoryPoolAlloc(osRtxInfo.mpi.thread);\n    } else {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      thread = osRtxMemoryAlloc(osRtxInfo.mem.common, sizeof(os_thread_t), 1U);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    if (thread != NULL) {\n      uint32_t used;\n      osRtxThreadMemUsage.cnt_alloc++;\n      used = osRtxThreadMemUsage.cnt_alloc - osRtxThreadMemUsage.cnt_free;\n      if (osRtxThreadMemUsage.max_used < used) {\n        osRtxThreadMemUsage.max_used = used;\n      }\n    }\n#endif\n    flags = osRtxFlagSystemObject;\n  } else {\n    flags = 0U;\n  }\n\n  // Allocate stack memory if not provided\n  if ((thread != NULL) && (stack_mem == NULL)) {\n    if (stack_size == 0U) {\n      stack_size = osRtxConfig.thread_stack_size;\n      if (osRtxInfo.mpi.stack != NULL) {\n        // lint -e{9079} \"conversion from pointer to void to pointer to other\n        // type\" [MISRA Note 5]\n        stack_mem = osRtxMemoryPoolAlloc(osRtxInfo.mpi.stack);\n        if (stack_mem != NULL) {\n          flags |= osRtxThreadFlagDefStack;\n        }\n      } else {\n        // lint -e{9079} \"conversion from pointer to void to pointer to other\n        // type\" [MISRA Note 5]\n        stack_mem = osRtxMemoryAlloc(osRtxInfo.mem.stack, stack_size, 0U);\n      }\n    } else {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      stack_mem = osRtxMemoryAlloc(osRtxInfo.mem.stack, stack_size, 0U);\n    }\n    if (stack_mem == NULL) {\n      if ((flags & osRtxFlagSystemObject) != 0U) {\n        if (osRtxInfo.mpi.thread != NULL) {\n          (void)osRtxMemoryPoolFree(osRtxInfo.mpi.thread, thread);\n        } else {\n          (void)osRtxMemoryFree(osRtxInfo.mem.common, thread);\n        }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n        osRtxThreadMemUsage.cnt_free++;\n#endif\n      }\n      thread = NULL;\n    }\n    flags |= osRtxFlagSystemMemory;\n  }\n\n#if (DOMAIN_NS == 1)\n  // Allocate secure process stack\n  if ((thread != NULL) && (tz_module != 0U)) {\n    tz_memory = TZ_AllocModuleContext_S(tz_module);\n    if (tz_memory == 0U) {\n      EvrRtxThreadError(NULL, osRtxErrorTZ_AllocContext_S);\n      if ((flags & osRtxFlagSystemMemory) != 0U) {\n        if ((flags & osRtxThreadFlagDefStack) != 0U) {\n          (void)osRtxMemoryPoolFree(osRtxInfo.mpi.stack, thread->stack_mem);\n        } else {\n          (void)osRtxMemoryFree(osRtxInfo.mem.stack, thread->stack_mem);\n        }\n      }\n      if ((flags & osRtxFlagSystemObject) != 0U) {\n        if (osRtxInfo.mpi.thread != NULL) {\n          (void)osRtxMemoryPoolFree(osRtxInfo.mpi.thread, thread);\n        } else {\n          (void)osRtxMemoryFree(osRtxInfo.mem.common, thread);\n        }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n        osRtxThreadMemUsage.cnt_free++;\n#endif\n      }\n      thread = NULL;\n    }\n  } else {\n    tz_memory = 0U;\n  }\n#endif\n\n  if (thread != NULL) {\n    // Initialize control block\n    // lint --e{923}  --e{9078} \"cast between pointers and unsigned int\"\n    // lint --e{9079} --e{9087} \"cast between pointers to different object\n    // types\" lint --e{9074} \"conversion between a pointer to function and\n    // another type\"\n    thread->id = osRtxIdThread;\n    thread->state = osRtxThreadReady;\n    thread->flags = flags;\n    thread->attr = (uint8_t)attr_bits;\n    thread->name = name;\n    thread->thread_next = NULL;\n    thread->thread_prev = NULL;\n    thread->delay_next = NULL;\n    thread->delay_prev = NULL;\n    thread->thread_join = NULL;\n    thread->delay = 0U;\n    thread->priority = (int8_t)priority;\n    thread->priority_base = (int8_t)priority;\n    thread->stack_frame = STACK_FRAME_INIT_VAL;\n    thread->flags_options = 0U;\n    thread->wait_flags = 0U;\n    thread->thread_flags = 0U;\n    thread->mutex_list = NULL;\n    thread->stack_mem = stack_mem;\n    thread->stack_size = stack_size;\n    thread->sp = (uint32_t)stack_mem + stack_size - 64U;\n    thread->thread_addr = (uint32_t)func;\n#if (DOMAIN_NS == 1)\n    thread->tz_memory = tz_memory;\n#ifdef RTX_TF_M_EXTENSION\n    thread->tz_module = tz_module;\n#endif\n#endif\n#if __RTX_CPU_STATISTICS__\n    thread->rtime = 0;\n    thread->step_rtime = 0;\n#endif\n    // Initialize stack\n    // lint --e{613} false detection: \"Possible use of null pointer\"\n    ptr = (uint32_t *)stack_mem;\n    ptr[0] = osRtxStackMagicWord;\n    if ((osRtxConfig.flags & osRtxConfigStackWatermark) != 0U) {\n      for (n = (stack_size / 4U) - (16U + 1U); n != 0U; n--) {\n        ptr++;\n        *ptr = osRtxStackFillPattern;\n      }\n    }\n    ptr = (uint32_t *)thread->sp;\n    for (n = 0U; n != 13U; n++) {\n      ptr[n] = 0U; // R4..R11, R0..R3, R12\n    }\n    ptr[13] = (uint32_t)osThreadExit; // LR\n    ptr[14] = (uint32_t)func;         // PC\n    ptr[15] = xPSR_InitVal(\n        (bool_t)((osRtxConfig.flags & osRtxConfigPrivilegedMode) != 0U),\n        (bool_t)(((uint32_t)func & 1U) != 0U)); // xPSR\n    ptr[8] = (uint32_t)argument;                // R0\n\n    // Register post ISR processing function\n    osRtxInfo.post_process.thread = osRtxThreadPostProcess;\n\n    EvrRtxThreadCreated(thread, thread->thread_addr, thread->name);\n  } else {\n    EvrRtxThreadError(NULL, (int32_t)osErrorNoMemory);\n  }\n\n  if (thread != NULL) {\n    osRtxThreadDispatch(thread);\n  }\n\n  return thread;\n}\n\n/// Get name of a thread.\n/// \\note API identical to osThreadGetName\nstatic const char *svcRtxThreadGetName(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadGetName(thread, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  EvrRtxThreadGetName(thread, thread->name);\n\n  return thread->name;\n}\n\n/// Return the thread ID of the current running thread.\n/// \\note API identical to osThreadGetId\nstatic osThreadId_t svcRtxThreadGetId(void) {\n  os_thread_t *thread;\n\n  thread = osRtxThreadGetRunning();\n  EvrRtxThreadGetId(thread);\n  return thread;\n}\n\n/// Get current thread state of a thread.\n/// \\note API identical to osThreadGetState\nstatic osThreadState_t svcRtxThreadGetState(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  osThreadState_t state;\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadGetState(thread, osThreadError);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osThreadError;\n  }\n\n  state = osRtxThreadState(thread);\n\n  EvrRtxThreadGetState(thread, state);\n\n  return state;\n}\n\n/// Get stack size of a thread.\n/// \\note API identical to osThreadGetStackSize\nstatic uint32_t svcRtxThreadGetStackSize(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadGetStackSize(thread, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxThreadGetStackSize(thread, thread->stack_size);\n\n  return thread->stack_size;\n}\n\n/// Get available stack space of a thread based on stack watermark recording\n/// during execution. \\note API identical to osThreadGetStackSpace\nstatic uint32_t svcRtxThreadGetStackSpace(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  const uint32_t *stack;\n  uint32_t space;\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadGetStackSpace(thread, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  // Check if stack watermark is not enabled\n  if ((osRtxConfig.flags & osRtxConfigStackWatermark) == 0U) {\n    EvrRtxThreadGetStackSpace(thread, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n  stack = thread->stack_mem;\n  if (*stack++ == osRtxStackMagicWord) {\n    for (space = 4U; space < thread->stack_size; space += 4U) {\n      if (*stack++ != osRtxStackFillPattern) {\n        break;\n      }\n    }\n  } else {\n    space = 0U;\n  }\n\n  EvrRtxThreadGetStackSpace(thread, space);\n\n  return space;\n}\n\n/// Change priority of a thread.\n/// \\note API identical to osThreadSetPriority\nstatic osStatus_t svcRtxThreadSetPriority(osThreadId_t thread_id,\n                                          osPriority_t priority) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread) ||\n      (priority < osPriorityIdle) || (priority > osPriorityISR)) {\n    EvrRtxThreadError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check object state\n  if (thread->state == osRtxThreadTerminated) {\n    EvrRtxThreadError(thread, (int32_t)osErrorResource);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorResource;\n  }\n\n  if (thread->priority != (int8_t)priority) {\n    thread->priority = (int8_t)priority;\n    thread->priority_base = (int8_t)priority;\n    EvrRtxThreadPriorityUpdated(thread, priority);\n    osRtxThreadListSort(thread);\n    osRtxThreadDispatch(NULL);\n  }\n\n  return osOK;\n}\n\n/// Get current priority of a thread.\n/// \\note API identical to osThreadGetPriority\nstatic osPriority_t svcRtxThreadGetPriority(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  osPriority_t priority;\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadGetPriority(thread, osPriorityError);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osPriorityError;\n  }\n\n  // Check object state\n  if (thread->state == osRtxThreadTerminated) {\n    EvrRtxThreadGetPriority(thread, osPriorityError);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osPriorityError;\n  }\n\n  priority = osRtxThreadPriority(thread);\n\n  EvrRtxThreadGetPriority(thread, priority);\n\n  return priority;\n}\n\n/// Pass control to next thread that is in state READY.\n/// \\note API identical to osThreadYield\nstatic osStatus_t svcRtxThreadYield(void) {\n  os_thread_t *thread_running;\n  os_thread_t *thread_ready;\n\n  if (osRtxKernelGetState() == osRtxKernelRunning) {\n    thread_running = osRtxThreadGetRunning();\n    thread_ready = osRtxInfo.thread.ready.thread_list;\n    if ((thread_ready != NULL) &&\n        (thread_ready->priority == thread_running->priority)) {\n      osRtxThreadListRemove(thread_ready);\n      osRtxThreadReadyPut(thread_running);\n      EvrRtxThreadPreempted(thread_running);\n      osRtxThreadSwitch(thread_ready);\n    }\n  }\n\n  return osOK;\n}\n\n/// Suspend execution of a thread.\n/// \\note API identical to osThreadSuspend\nstatic osStatus_t svcRtxThreadSuspend(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  osStatus_t status;\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check object state\n  switch (thread->state & osRtxThreadStateMask) {\n  case osRtxThreadRunning:\n    if ((osRtxKernelGetState() != osRtxKernelRunning) ||\n        (osRtxInfo.thread.ready.thread_list == NULL)) {\n      EvrRtxThreadError(thread, (int32_t)osErrorResource);\n      status = osErrorResource;\n    } else {\n      status = osOK;\n    }\n    break;\n  case osRtxThreadReady:\n    osRtxThreadListRemove(thread);\n    status = osOK;\n    break;\n  case osRtxThreadBlocked:\n    osRtxThreadListRemove(thread);\n    osRtxThreadDelayRemove(thread);\n    status = osOK;\n    break;\n  case osRtxThreadInactive:\n  case osRtxThreadTerminated:\n  default:\n    EvrRtxThreadError(thread, (int32_t)osErrorResource);\n    status = osErrorResource;\n    break;\n  }\n\n  if (status == osOK) {\n    EvrRtxThreadSuspended(thread);\n\n    if (thread->state == osRtxThreadRunning) {\n      osRtxThreadSwitch(osRtxThreadListGet(&osRtxInfo.thread.ready));\n    }\n\n    // Update Thread State and put it into Delay list\n    thread->state = osRtxThreadBlocked;\n    thread->thread_prev = NULL;\n    thread->thread_next = NULL;\n    osRtxThreadDelayInsert(thread, osWaitForever);\n  }\n\n  return status;\n}\n\n/// Resume execution of a thread.\n/// \\note API identical to osThreadResume\nstatic osStatus_t svcRtxThreadResume(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check object state\n  if ((thread->state & osRtxThreadStateMask) != osRtxThreadBlocked) {\n    EvrRtxThreadError(thread, (int32_t)osErrorResource);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorResource;\n  }\n\n  EvrRtxThreadResumed(thread);\n\n  // Wakeup Thread\n  osRtxThreadListRemove(thread);\n  osRtxThreadDelayRemove(thread);\n  osRtxThreadDispatch(thread);\n\n  return osOK;\n}\n\n/// Free Thread resources.\n/// \\param[in]  thread          thread object.\nstatic void osRtxThreadFree(os_thread_t *thread) {\n\n  // Mark object as inactive and invalid\n  thread->state = osRtxThreadInactive;\n  thread->id = osRtxIdInvalid;\n\n#if (DOMAIN_NS == 1)\n  // Free secure process stack\n  if (thread->tz_memory != 0U) {\n    (void)TZ_FreeModuleContext_S(thread->tz_memory);\n  }\n#endif\n\n  // Free stack memory\n  if ((thread->flags & osRtxFlagSystemMemory) != 0U) {\n    if ((thread->flags & osRtxThreadFlagDefStack) != 0U) {\n      (void)osRtxMemoryPoolFree(osRtxInfo.mpi.stack, thread->stack_mem);\n    } else {\n      (void)osRtxMemoryFree(osRtxInfo.mem.stack, thread->stack_mem);\n    }\n  }\n\n  // Free object memory\n  if ((thread->flags & osRtxFlagSystemObject) != 0U) {\n    if (osRtxInfo.mpi.thread != NULL) {\n      (void)osRtxMemoryPoolFree(osRtxInfo.mpi.thread, thread);\n    } else {\n      (void)osRtxMemoryFree(osRtxInfo.mem.common, thread);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    osRtxThreadMemUsage.cnt_free++;\n#endif\n  }\n}\n\n/// Detach a thread (thread storage can be reclaimed when thread terminates).\n/// \\note API identical to osThreadDetach\nstatic osStatus_t svcRtxThreadDetach(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check object attributes\n  if ((thread->attr & osThreadJoinable) == 0U) {\n    EvrRtxThreadError(thread, osRtxErrorThreadNotJoinable);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorResource;\n  }\n\n  if (thread->state == osRtxThreadTerminated) {\n    osRtxThreadListUnlink(&osRtxInfo.thread.terminate_list, thread);\n    osRtxThreadFree(thread);\n  } else {\n    thread->attr &= ~osThreadJoinable;\n  }\n\n  EvrRtxThreadDetached(thread);\n\n  return osOK;\n}\n\n/// Wait for specified thread to terminate.\n/// \\note API identical to osThreadJoin\nstatic osStatus_t svcRtxThreadJoin(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  osStatus_t status;\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check object attributes\n  if ((thread->attr & osThreadJoinable) == 0U) {\n    EvrRtxThreadError(thread, osRtxErrorThreadNotJoinable);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorResource;\n  }\n\n  // Check object state\n  if (thread->state == osRtxThreadRunning) {\n    EvrRtxThreadError(thread, (int32_t)osErrorResource);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorResource;\n  }\n\n  if (thread->state == osRtxThreadTerminated) {\n    osRtxThreadListUnlink(&osRtxInfo.thread.terminate_list, thread);\n    osRtxThreadFree(thread);\n    EvrRtxThreadJoined(thread);\n    status = osOK;\n  } else {\n    // Suspend current Thread\n    if (osRtxThreadWaitEnter(osRtxThreadWaitingJoin, osWaitForever)) {\n      thread->thread_join = osRtxThreadGetRunning();\n      thread->attr &= ~osThreadJoinable;\n      EvrRtxThreadJoinPending(thread);\n    } else {\n      EvrRtxThreadError(thread, (int32_t)osErrorResource);\n    }\n    status = osErrorResource;\n  }\n\n  return status;\n}\n\n/// Terminate execution of current running thread.\n/// \\note API identical to osThreadExit\nstatic void svcRtxThreadExit(void) {\n  os_thread_t *thread;\n\n  // Check if switch to next Ready Thread is possible\n  if ((osRtxKernelGetState() != osRtxKernelRunning) ||\n      (osRtxInfo.thread.ready.thread_list == NULL)) {\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return;\n  }\n\n  // Get running thread\n  thread = osRtxThreadGetRunning();\n\n  // Release owned Mutexes\n  osRtxMutexOwnerRelease(thread->mutex_list);\n\n  // Wakeup Thread waiting to Join\n  if (thread->thread_join != NULL) {\n    osRtxThreadWaitExit(thread->thread_join, (uint32_t)osOK, FALSE);\n    EvrRtxThreadJoined(thread->thread_join);\n  }\n\n  // Switch to next Ready Thread\n  thread->sp = __get_PSP();\n  osRtxThreadSwitch(osRtxThreadListGet(&osRtxInfo.thread.ready));\n  osRtxThreadSetRunning(NULL);\n\n  if ((thread->attr & osThreadJoinable) == 0U) {\n    osRtxThreadFree(thread);\n  } else {\n    // Update Thread State and put it into Terminate Thread list\n    thread->state = osRtxThreadTerminated;\n    thread->thread_prev = NULL;\n    thread->thread_next = osRtxInfo.thread.terminate_list;\n    if (osRtxInfo.thread.terminate_list != NULL) {\n      osRtxInfo.thread.terminate_list->thread_prev = thread;\n    }\n    osRtxInfo.thread.terminate_list = thread;\n  }\n\n  EvrRtxThreadDestroyed(thread);\n}\n\n/// Terminate execution of a thread.\n/// \\note API identical to osThreadTerminate\nstatic osStatus_t svcRtxThreadTerminate(osThreadId_t thread_id) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  osStatus_t status;\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread)) {\n    EvrRtxThreadError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check object state\n  switch (thread->state & osRtxThreadStateMask) {\n  case osRtxThreadRunning:\n    if ((osRtxKernelGetState() != osRtxKernelRunning) ||\n        (osRtxInfo.thread.ready.thread_list == NULL)) {\n      EvrRtxThreadError(thread, (int32_t)osErrorResource);\n      status = osErrorResource;\n    } else {\n      status = osOK;\n    }\n    break;\n  case osRtxThreadReady:\n    osRtxThreadListRemove(thread);\n    status = osOK;\n    break;\n  case osRtxThreadBlocked:\n    osRtxThreadListRemove(thread);\n    osRtxThreadDelayRemove(thread);\n    status = osOK;\n    break;\n  case osRtxThreadInactive:\n  case osRtxThreadTerminated:\n  default:\n    EvrRtxThreadError(thread, (int32_t)osErrorResource);\n    status = osErrorResource;\n    break;\n  }\n\n  if (status == osOK) {\n    // Release owned Mutexes\n    osRtxMutexOwnerRelease(thread->mutex_list);\n\n    // Wakeup Thread waiting to Join\n    if (thread->thread_join != NULL) {\n      osRtxThreadWaitExit(thread->thread_join, (uint32_t)osOK, FALSE);\n      EvrRtxThreadJoined(thread->thread_join);\n    }\n\n    // Switch to next Ready Thread when terminating running Thread\n    if (thread->state == osRtxThreadRunning) {\n      thread->sp = __get_PSP();\n      osRtxThreadSwitch(osRtxThreadListGet(&osRtxInfo.thread.ready));\n      osRtxThreadSetRunning(NULL);\n    } else {\n      osRtxThreadDispatch(NULL);\n    }\n\n    if ((thread->attr & osThreadJoinable) == 0U) {\n      osRtxThreadFree(thread);\n    } else {\n      // Update Thread State and put it into Terminate Thread list\n      thread->state = osRtxThreadTerminated;\n      thread->thread_prev = NULL;\n      thread->thread_next = osRtxInfo.thread.terminate_list;\n      if (osRtxInfo.thread.terminate_list != NULL) {\n        osRtxInfo.thread.terminate_list->thread_prev = thread;\n      }\n      osRtxInfo.thread.terminate_list = thread;\n    }\n\n    EvrRtxThreadDestroyed(thread);\n  }\n\n  return status;\n}\n\n/// Get number of active threads.\n/// \\note API identical to osThreadGetCount\nstatic uint32_t svcRtxThreadGetCount(void) {\n  const os_thread_t *thread;\n  uint32_t count;\n\n  // Running Thread\n  count = 1U;\n\n  // Ready List\n  for (thread = osRtxInfo.thread.ready.thread_list; thread != NULL;\n       thread = thread->thread_next) {\n    count++;\n  }\n\n  // Delay List\n  for (thread = osRtxInfo.thread.delay_list; thread != NULL;\n       thread = thread->delay_next) {\n    count++;\n  }\n\n  // Wait List\n  for (thread = osRtxInfo.thread.wait_list; thread != NULL;\n       thread = thread->delay_next) {\n    count++;\n  }\n\n  EvrRtxThreadGetCount(count);\n\n  return count;\n}\n\n/// Enumerate active threads.\n/// \\note API identical to osThreadEnumerate\nstatic uint32_t svcRtxThreadEnumerate(osThreadId_t *thread_array,\n                                      uint32_t array_items) {\n  os_thread_t *thread;\n  uint32_t count;\n\n  // Check parameters\n  if ((thread_array == NULL) || (array_items == 0U)) {\n    EvrRtxThreadEnumerate(thread_array, array_items, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  // Running Thread\n  *thread_array = osRtxThreadGetRunning();\n  thread_array++;\n  count = 1U;\n\n  // Ready List\n  for (thread = osRtxInfo.thread.ready.thread_list;\n       (thread != NULL) && (count < array_items);\n       thread = thread->thread_next) {\n    *thread_array = thread;\n    thread_array++;\n    count++;\n  }\n\n  // Delay List\n  for (thread = osRtxInfo.thread.delay_list;\n       (thread != NULL) && (count < array_items); thread = thread->delay_next) {\n    *thread_array = thread;\n    thread_array++;\n    count++;\n  }\n\n  // Wait List\n  for (thread = osRtxInfo.thread.wait_list;\n       (thread != NULL) && (count < array_items); thread = thread->delay_next) {\n    *thread_array = thread;\n    thread_array++;\n    count++;\n  }\n\n  EvrRtxThreadEnumerate(thread_array - count, array_items, count);\n\n  return count;\n}\n\n/// Set the specified Thread Flags of a thread.\n/// \\note API identical to osThreadFlagsSet\nstatic uint32_t svcRtxThreadFlagsSet(osThreadId_t thread_id, uint32_t flags) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  uint32_t thread_flags;\n  uint32_t thread_flags0;\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread) ||\n      ((flags & ~(((uint32_t)1U << osRtxThreadFlagsLimit) - 1U)) != 0U)) {\n    EvrRtxThreadFlagsError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Check object state\n  if (thread->state == osRtxThreadTerminated) {\n    EvrRtxThreadFlagsError(thread, (int32_t)osErrorResource);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorResource);\n  }\n\n  // Set Thread Flags\n  thread_flags = ThreadFlagsSet(thread, flags);\n\n  // Check if Thread is waiting for Thread Flags\n  if (thread->state == osRtxThreadWaitingThreadFlags) {\n    thread_flags0 =\n        ThreadFlagsCheck(thread, thread->wait_flags, thread->flags_options);\n    if (thread_flags0 != 0U) {\n      if ((thread->flags_options & osFlagsNoClear) == 0U) {\n        thread_flags = thread_flags0 & ~thread->wait_flags;\n      } else {\n        thread_flags = thread_flags0;\n      }\n      osRtxThreadWaitExit(thread, thread_flags0, TRUE);\n      EvrRtxThreadFlagsWaitCompleted(thread->wait_flags, thread->flags_options,\n                                     thread_flags0, thread);\n    }\n  }\n\n  EvrRtxThreadFlagsSetDone(thread, thread_flags);\n\n  return thread_flags;\n}\n\n/// Clear the specified Thread Flags of current running thread.\n/// \\note API identical to osThreadFlagsClear\nstatic uint32_t svcRtxThreadFlagsClear(uint32_t flags) {\n  os_thread_t *thread;\n  uint32_t thread_flags;\n\n  // Check running thread\n  thread = osRtxThreadGetRunning();\n  if (thread == NULL) {\n    EvrRtxThreadFlagsError(NULL, osRtxErrorKernelNotRunning);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osError);\n  }\n\n  // Check parameters\n  if ((flags & ~(((uint32_t)1U << osRtxThreadFlagsLimit) - 1U)) != 0U) {\n    EvrRtxThreadFlagsError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Clear Thread Flags\n  thread_flags = ThreadFlagsClear(thread, flags);\n\n  EvrRtxThreadFlagsClearDone(thread_flags);\n\n  return thread_flags;\n}\n\n/// Get the current Thread Flags of current running thread.\n/// \\note API identical to osThreadFlagsGet\nstatic uint32_t svcRtxThreadFlagsGet(void) {\n  const os_thread_t *thread;\n\n  // Check running thread\n  thread = osRtxThreadGetRunning();\n  if (thread == NULL) {\n    EvrRtxThreadFlagsGet(0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  EvrRtxThreadFlagsGet(thread->thread_flags);\n\n  return thread->thread_flags;\n}\n\n/// Wait for one or more Thread Flags of the current running thread to become\n/// signaled. \\note API identical to osThreadFlagsWait\nstatic uint32_t svcRtxThreadFlagsWait(uint32_t flags, uint32_t options,\n                                      uint32_t timeout) {\n  os_thread_t *thread;\n  uint32_t thread_flags;\n\n  // Check running thread\n  thread = osRtxThreadGetRunning();\n  if (thread == NULL) {\n    EvrRtxThreadFlagsError(NULL, osRtxErrorKernelNotRunning);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osError);\n  }\n\n  // Check parameters\n  if ((flags & ~(((uint32_t)1U << osRtxThreadFlagsLimit) - 1U)) != 0U) {\n    EvrRtxThreadFlagsError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Check Thread Flags\n  thread_flags = ThreadFlagsCheck(thread, flags, options);\n  if (thread_flags != 0U) {\n    EvrRtxThreadFlagsWaitCompleted(flags, options, thread_flags, thread);\n  } else {\n    // Check if timeout is specified\n    if (timeout != 0U) {\n      // Store waiting flags and options\n      EvrRtxThreadFlagsWaitPending(flags, options, timeout);\n      thread->wait_flags = flags;\n      thread->flags_options = (uint8_t)options;\n      // Suspend current Thread\n      if (!osRtxThreadWaitEnter(osRtxThreadWaitingThreadFlags, timeout)) {\n        EvrRtxThreadFlagsWaitTimeout(thread);\n      }\n      thread_flags = (uint32_t)osErrorTimeout;\n    } else {\n      EvrRtxThreadFlagsWaitNotCompleted(flags, options);\n      thread_flags = (uint32_t)osErrorResource;\n    }\n  }\n  return thread_flags;\n}\n#if TASK_HUNG_CHECK_ENABLED\nosStatus_t svcRtxThreadSetHungCheck(osThreadId_t thread_id, int32_t enable,\n                                    uint32_t timeout) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n\n  if (thread == NULL)\n    return osErrorParameter;\n\n  thread->hung_check = !!enable;\n  thread->hung_check_timeout = timeout;\n  return osOK;\n}\n#endif\n\nint rtx_task_idle_health_check(void) { return 0; }\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_3(ThreadNew, osThreadId_t, osThreadFunc_t, void *, const osThreadAttr_t *)\nSVC0_1(ThreadGetName, const char *, osThreadId_t)\nSVC0_0(ThreadGetId, osThreadId_t)\nSVC0_1(ThreadGetState, osThreadState_t, osThreadId_t)\nSVC0_1(ThreadGetStackSize, uint32_t, osThreadId_t)\nSVC0_1(ThreadGetStackSpace, uint32_t, osThreadId_t)\nSVC0_2(ThreadSetPriority, osStatus_t, osThreadId_t, osPriority_t)\nSVC0_1(ThreadGetPriority, osPriority_t, osThreadId_t)\nSVC0_0(ThreadYield, osStatus_t)\nSVC0_1(ThreadSuspend, osStatus_t, osThreadId_t)\nSVC0_1(ThreadResume, osStatus_t, osThreadId_t)\nSVC0_1(ThreadDetach, osStatus_t, osThreadId_t)\nSVC0_1(ThreadJoin, osStatus_t, osThreadId_t)\nSVC0_0N(ThreadExit, void)\nSVC0_1(ThreadTerminate, osStatus_t, osThreadId_t)\nSVC0_0(ThreadGetCount, uint32_t)\nSVC0_2(ThreadEnumerate, uint32_t, osThreadId_t *, uint32_t)\nSVC0_2(ThreadFlagsSet, uint32_t, osThreadId_t, uint32_t)\nSVC0_1(ThreadFlagsClear, uint32_t, uint32_t)\nSVC0_0(ThreadFlagsGet, uint32_t)\nSVC0_3(ThreadFlagsWait, uint32_t, uint32_t, uint32_t, uint32_t)\n#if TASK_HUNG_CHECK_ENABLED\nSVC0_3(ThreadSetHungCheck, osStatus_t, osThreadId_t, int32_t, uint32_t)\n#endif\n// lint --flb \"Library End\"\n\n//  ==== ISR Calls ====\n\n/// Set the specified Thread Flags of a thread.\n/// \\note API identical to osThreadFlagsSet\n__STATIC_INLINE\nuint32_t isrRtxThreadFlagsSet(osThreadId_t thread_id, uint32_t flags) {\n  os_thread_t *thread = osRtxThreadId(thread_id);\n  uint32_t thread_flags;\n\n  // Check parameters\n  if ((thread == NULL) || (thread->id != osRtxIdThread) ||\n      ((flags & ~(((uint32_t)1U << osRtxThreadFlagsLimit) - 1U)) != 0U)) {\n    EvrRtxThreadFlagsError(thread, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorParameter);\n  }\n\n  // Check object state\n  if (thread->state == osRtxThreadTerminated) {\n    EvrRtxThreadFlagsError(thread, (int32_t)osErrorResource);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return ((uint32_t)osErrorResource);\n  }\n\n  // Set Thread Flags\n  thread_flags = ThreadFlagsSet(thread, flags);\n\n  // Register post ISR processing\n  osRtxPostProcess(osRtxObject(thread));\n\n  EvrRtxThreadFlagsSetDone(thread, thread_flags);\n\n  return thread_flags;\n}\n\n//  ==== Library functions ====\n\n/// Thread startup (Idle and Timer Thread).\n/// \\return true - success, false - failure.\nbool_t osRtxThreadStartup(void) {\n  bool_t ret = TRUE;\n\n  // Create Idle Thread\n  osRtxInfo.thread.idle = osRtxThreadId(\n      svcRtxThreadNew(osRtxIdleThread, NULL, osRtxConfig.idle_thread_attr));\n\n  // Create Timer Thread\n  if (osRtxConfig.timer_mq_mcnt != 0U) {\n    osRtxInfo.timer.thread = osRtxThreadId(\n        svcRtxThreadNew(osRtxTimerThread, NULL, osRtxConfig.timer_thread_attr));\n    if (osRtxInfo.timer.thread == NULL) {\n      ret = FALSE;\n    }\n  }\n\n  return ret;\n}\n\n//  ==== Public API ====\n\n/// Create a thread and add it to Active Threads.\nosThreadId_t osThreadNew(osThreadFunc_t func, void *argument,\n                         const osThreadAttr_t *attr) {\n  osThreadId_t thread_id;\n\n  EvrRtxThreadNew(func, argument, attr);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadError(NULL, (int32_t)osErrorISR);\n    thread_id = NULL;\n  } else {\n    thread_id = __svcThreadNew(func, argument, attr);\n  }\n  return thread_id;\n}\n\n/// Get name of a thread.\nconst char *osThreadGetName(osThreadId_t thread_id) {\n  const char *name;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadGetName(thread_id, NULL);\n    name = NULL;\n  } else {\n    name = __svcThreadGetName(thread_id);\n  }\n  return name;\n}\n\n/// Return the thread ID of the current running thread.\nosThreadId_t osThreadGetId(void) {\n  osThreadId_t thread_id;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    thread_id = svcRtxThreadGetId();\n  } else {\n    thread_id = __svcThreadGetId();\n  }\n  return thread_id;\n}\n\nconst char *osGetThreadName(void) {\n  os_thread_t *thread = osRtxThreadId(osThreadGetId());\n  return thread->name;\n}\n\n/// Get current thread state of a thread.\nosThreadState_t osThreadGetState(osThreadId_t thread_id) {\n  osThreadState_t state;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadGetState(thread_id, osThreadError);\n    state = osThreadError;\n  } else {\n    state = __svcThreadGetState(thread_id);\n  }\n  return state;\n}\n\n/// Get stack size of a thread.\nuint32_t osThreadGetStackSize(osThreadId_t thread_id) {\n  uint32_t stack_size;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadGetStackSize(thread_id, 0U);\n    stack_size = 0U;\n  } else {\n    stack_size = __svcThreadGetStackSize(thread_id);\n  }\n  return stack_size;\n}\n\n/// Get available stack space of a thread based on stack watermark recording\n/// during execution.\nuint32_t osThreadGetStackSpace(osThreadId_t thread_id) {\n  uint32_t stack_space;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadGetStackSpace(thread_id, 0U);\n    stack_space = 0U;\n  } else {\n    stack_space = __svcThreadGetStackSpace(thread_id);\n  }\n  return stack_space;\n}\n\n/// Change priority of a thread.\nosStatus_t osThreadSetPriority(osThreadId_t thread_id, osPriority_t priority) {\n  osStatus_t status;\n\n  EvrRtxThreadSetPriority(thread_id, priority);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadError(thread_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcThreadSetPriority(thread_id, priority);\n  }\n  return status;\n}\n\n/// Get current priority of a thread.\nosPriority_t osThreadGetPriority(osThreadId_t thread_id) {\n  osPriority_t priority;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadGetPriority(thread_id, osPriorityError);\n    priority = osPriorityError;\n  } else {\n    priority = __svcThreadGetPriority(thread_id);\n  }\n  return priority;\n}\n\n/// Pass control to next thread that is in state READY.\nosStatus_t osThreadYield(void) {\n  osStatus_t status;\n\n  EvrRtxThreadYield();\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadError(NULL, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcThreadYield();\n  }\n  return status;\n}\n\n/// Suspend execution of a thread.\nosStatus_t osThreadSuspend(osThreadId_t thread_id) {\n  osStatus_t status;\n\n  EvrRtxThreadSuspend(thread_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadError(thread_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcThreadSuspend(thread_id);\n  }\n  return status;\n}\n\n/// Resume execution of a thread.\nosStatus_t osThreadResume(osThreadId_t thread_id) {\n  osStatus_t status;\n\n  EvrRtxThreadResume(thread_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadError(thread_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcThreadResume(thread_id);\n  }\n  return status;\n}\n\n/// Detach a thread (thread storage can be reclaimed when thread terminates).\nosStatus_t osThreadDetach(osThreadId_t thread_id) {\n  osStatus_t status;\n\n  EvrRtxThreadDetach(thread_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadError(thread_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcThreadDetach(thread_id);\n  }\n  return status;\n}\n\n/// Wait for specified thread to terminate.\nosStatus_t osThreadJoin(osThreadId_t thread_id) {\n  osStatus_t status;\n\n  EvrRtxThreadJoin(thread_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadError(thread_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcThreadJoin(thread_id);\n  }\n  return status;\n}\n\n/// Terminate execution of current running thread.\n__NO_RETURN void osThreadExit(void) {\n  EvrRtxThreadExit();\n  __svcThreadExit();\n  EvrRtxThreadError(NULL, (int32_t)osError);\n  for (;;) {\n  }\n}\n\n/// Terminate execution of a thread.\nosStatus_t osThreadTerminate(osThreadId_t thread_id) {\n  osStatus_t status;\n\n  EvrRtxThreadTerminate(thread_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadError(thread_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcThreadTerminate(thread_id);\n  }\n  return status;\n}\n\n/// Get number of active threads.\nuint32_t osThreadGetCount(void) {\n  uint32_t count;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadGetCount(0U);\n    count = 0U;\n  } else {\n    count = __svcThreadGetCount();\n  }\n  return count;\n}\n\n/// Enumerate active threads.\nuint32_t osThreadEnumerate(osThreadId_t *thread_array, uint32_t array_items) {\n  uint32_t count;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadEnumerate(thread_array, array_items, 0U);\n    count = 0U;\n  } else {\n    count = __svcThreadEnumerate(thread_array, array_items);\n  }\n  return count;\n}\n\n/// Set the specified Thread Flags of a thread.\nuint32_t osThreadFlagsSet(osThreadId_t thread_id, uint32_t flags) {\n  uint32_t thread_flags;\n\n  EvrRtxThreadFlagsSet(thread_id, flags);\n  if (IsIrqMode() || IsIrqMasked()) {\n    thread_flags = isrRtxThreadFlagsSet(thread_id, flags);\n  } else {\n    thread_flags = __svcThreadFlagsSet(thread_id, flags);\n  }\n  return thread_flags;\n}\n\n/// Clear the specified Thread Flags of current running thread.\nuint32_t osThreadFlagsClear(uint32_t flags) {\n  uint32_t thread_flags;\n\n  EvrRtxThreadFlagsClear(flags);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadFlagsError(NULL, (int32_t)osErrorISR);\n    thread_flags = (uint32_t)osErrorISR;\n  } else {\n    thread_flags = __svcThreadFlagsClear(flags);\n  }\n  return thread_flags;\n}\n\n/// Get the current Thread Flags of current running thread.\nuint32_t osThreadFlagsGet(void) {\n  uint32_t thread_flags;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadFlagsGet(0U);\n    thread_flags = 0U;\n  } else {\n    thread_flags = __svcThreadFlagsGet();\n  }\n  return thread_flags;\n}\n\n/// Wait for one or more Thread Flags of the current running thread to become\n/// signaled.\nuint32_t osThreadFlagsWait(uint32_t flags, uint32_t options, uint32_t timeout) {\n  uint32_t thread_flags;\n\n  EvrRtxThreadFlagsWait(flags, options, timeout);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxThreadFlagsError(NULL, (int32_t)osErrorISR);\n    thread_flags = (uint32_t)osErrorISR;\n  } else {\n    thread_flags = __svcThreadFlagsWait(flags, options, timeout);\n  }\n  return thread_flags;\n}\n#if TASK_HUNG_CHECK_ENABLED\n/// enable/disable the hung check feature of an active thread\nosStatus_t osThreadSetHungCheck(osThreadId_t thread_id, int32_t enable,\n                                uint32_t timeout) {\n  if (IsIrqMode() || IsIrqMasked())\n    return osErrorISR; // Not allowed in ISR\n  return __svcThreadSetHungCheck(thread_id, enable, timeout);\n}\n#endif\n"
  },
  {
    "path": "rtos/rtx5/rtx_thread_dump.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Thread functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"plat_addr_map.h\"\n#include \"rtx_lib.h\"\n\n#define RTX_DUMP_VERBOSE\n\nstruct IRQ_STACK_FRAME_T {\n  uint32_t r0;\n  uint32_t r1;\n  uint32_t r2;\n  uint32_t r3;\n  uint32_t r12;\n  uint32_t lr;\n  uint32_t pc;\n  uint32_t xpsr;\n};\n\nextern uint32_t __StackTop[];\n\nstatic inline uint32_t get_IPSR(void) {\n  uint32_t result;\n\n  asm volatile(\"MRS %0, ipsr\" : \"=r\"(result));\n  return (result);\n}\n\nstatic inline uint32_t get_PSP(void) {\n  uint32_t result;\n\n  asm volatile(\"MRS %0, psp\" : \"=r\"(result));\n  return (result);\n}\n\nstatic inline struct IRQ_STACK_FRAME_T *\n_rtx_get_irq_stack_frame(const os_thread_t *thread) {\n  uint32_t sp;\n\n  if (thread == NULL) {\n    return NULL;\n  }\n  if (thread == osRtxThreadGetRunning() && get_IPSR() == 0) {\n    return NULL;\n  }\n  if (thread == osRtxThreadGetRunning()) {\n    sp = get_PSP();\n  } else {\n    sp = thread->sp;\n  }\n  if ((sp & 3) || !hal_trace_address_writable(sp)) {\n    return NULL;\n  }\n\n  if (thread != osRtxThreadGetRunning()) {\n    // r4-r11\n    sp += 4 * 8;\n    if ((thread->stack_frame & 0x10) == 0) {\n      // s16-s31\n      sp += 4 * 16;\n    }\n  }\n\n  return (struct IRQ_STACK_FRAME_T *)sp;\n}\n\nFLASH_TEXT_LOC\nvoid rtx_thread_show(const os_thread_t *thread) {\n  const char *thread_st_str;\n  struct IRQ_STACK_FRAME_T *frame;\n\n  if (thread) {\n    switch (thread->state) {\n    case osRtxThreadInactive:\n      thread_st_str = \"INACTIVE\";\n      break;\n    case osRtxThreadReady:\n      thread_st_str = \"READY\";\n      break;\n    case osRtxThreadRunning:\n      thread_st_str = \"RUNNING\";\n      break;\n    case osRtxThreadTerminated:\n      thread_st_str = \"TERMINAT\";\n      break;\n    case osRtxThreadWaitingDelay:\n      thread_st_str = \"WAIT_DLY\";\n      break;\n    case osRtxThreadWaitingJoin:\n      thread_st_str = \"WAIT_JOIN\";\n      break;\n    case osRtxThreadWaitingThreadFlags:\n      thread_st_str = \"WAIT_FLAG\";\n      break;\n    case osRtxThreadWaitingEventFlags:\n      thread_st_str = \"WAIT_EVE\";\n      break;\n    case osRtxThreadWaitingMutex:\n      thread_st_str = \"WAIT_MUT\";\n      break;\n    case osRtxThreadWaitingSemaphore:\n      thread_st_str = \"WAIT_SEM\";\n      break;\n    case osRtxThreadWaitingMemoryPool:\n      thread_st_str = \"WAIT_MEM\";\n      break;\n    case osRtxThreadWaitingMessageGet:\n      thread_st_str = \"WAIT_MGET\";\n      break;\n    case osRtxThreadWaitingMessagePut:\n      thread_st_str = \"WAIT_MPUT\";\n      break;\n    default:\n      thread_st_str = \"BAD\";\n      break;\n    }\n    REL_TRACE_NOCRLF_NOTS(0, \"--- Thread \");\n    REL_TRACE_NOCRLF_NOTS(1, \"name=%s\", thread->name ? thread->name : \"NULL\");\n\n    REL_TRACE_NOTS(4, \" thread=0x%x, prio=%u state=%-9s thread_addr=0x%08X\",\n                   (uint32_t)thread, thread->priority, thread_st_str,\n                   thread->thread_addr);\n#ifdef RTX_DUMP_VERBOSE\n    REL_TRACE_NOTS(4,\n                   \"    thread_next=0x%08X thread_prev=0x%08X \"\n                   \"delay_next=0x%08X delay_prev=0x%08X\",\n                   (uint32_t)thread->thread_next, (uint32_t)thread->thread_prev,\n                   (uint32_t)thread->delay_next, (uint32_t)thread->delay_prev);\n    REL_TRACE_NOTS(\n        4,\n        \"    thread_join=0x%08X flags_options=%u wait_flags=%u thread_flags=%u\",\n        (uint32_t)thread->thread_join, thread->flags_options,\n        thread->wait_flags, thread->thread_flags);\n    REL_TRACE_NOTS(3, \"    stack_mem=0x%08X stack_size=%u sp:0x%04x\",\n                   (uint32_t)thread->stack_mem, thread->stack_size, thread->sp);\n#ifdef __RTX_CPU_STATISTICS__\n    REL_TRACE_NOTS(2, \"    swap_in_time=%u swap_out_time=%u\",\n                   thread->swap_in_time, thread->swap_out_time);\n    REL_TRACE_NOCRLF_NOTS(0, \"    after last switch \");\n    if (thread->swap_in_time <= thread->swap_out_time)\n      REL_TRACE_NOTS(1, \"thread runtime %ums\",\n                     thread->swap_out_time - thread->swap_in_time);\n    else\n      REL_TRACE_NOTS(1, \"thread still runing, now %d\",\n                     HWTICKS_TO_MS(rtx_get_hwticks()));\n#endif\n#endif /*RTX_DUMP_VERBOSE*/\n\n    frame = _rtx_get_irq_stack_frame(thread);\n    if (frame) {\n      uint32_t stack_end;\n      uint32_t search_cnt, print_cnt;\n\n      REL_TRACE_NOTS(1, \"    frame:0x%08X\", (uint32_t)frame);\n      REL_TRACE_NOTS(4, \"    R0 =0x%08X R1=0x%08X R2=0x%08X R3  =0x%08X\",\n                     frame->r0, frame->r1, frame->r2, frame->r3);\n      REL_TRACE_NOTS(4, \"    R12=0x%08X LR=0x%08X PC=0x%08X XPSR=0x%08X\",\n                     frame->r12, frame->lr, frame->pc, frame->xpsr);\n\n      stack_end = (uint32_t)thread->stack_mem + thread->stack_size;\n      if (stack_end > thread->sp) {\n        search_cnt = (stack_end - thread->sp) / 4;\n        if (search_cnt > 512) {\n          search_cnt = 512;\n        }\n        print_cnt = 10;\n        hal_trace_print_backtrace(thread->sp, search_cnt, print_cnt);\n      }\n    }\n  } else {\n    REL_TRACE_NOTS(0, \"--- Thread NONE\");\n  }\n\n  REL_TRACE_IMM_NOTS(0, \" \");\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n  if (hal_trace_crash_dump_onprocess()) {\n    hal_sys_timer_delay(MS_TO_TICKS(500));\n  }\n#endif\n}\n\nvoid rtx_show_all_threads(void) {\n  int i;\n  const os_thread_t *thread;\n#if (defined(DEBUG) || defined(REL_TRACE_ENABLE))\n  if (hal_trace_crash_dump_onprocess()) {\n    for (i = 0; i < 10; i++) {\n      REL_TRACE_IMM_NOTS(0, \"                                                  \"\n                            \"                      \");\n      REL_TRACE_IMM_NOTS(0, \"                                                  \"\n                            \"                      \\n\");\n      hal_sys_timer_delay(MS_TO_TICKS(200));\n    }\n  }\n#endif\n\n  REL_TRACE_NOTS(0, \"Thread List:\");\n\n  // Current List\n  REL_TRACE_NOTS(0, \"Current List\");\n  rtx_thread_show(osRtxInfo.thread.run.curr);\n\n  // Next List\n  if (osRtxInfo.thread.run.next != osRtxInfo.thread.run.curr) {\n    REL_TRACE_NOTS(0, \"Next List\");\n    rtx_thread_show(osRtxInfo.thread.run.next);\n  }\n\n  // Ready List\n  REL_TRACE_NOTS(0, \"Ready List\");\n  for (thread = osRtxInfo.thread.ready.thread_list; thread != NULL;\n       thread = thread->thread_next) {\n    rtx_thread_show(thread);\n  }\n\n  // Delay List\n  REL_TRACE_NOTS(0, \"Delay List\");\n  for (thread = osRtxInfo.thread.delay_list; thread != NULL;\n       thread = thread->delay_next) {\n    rtx_thread_show(thread);\n  }\n\n  // Wait List\n  REL_TRACE_NOTS(0, \"Wait List\");\n  for (thread = osRtxInfo.thread.wait_list; thread != NULL;\n       thread = thread->delay_next) {\n    rtx_thread_show(thread);\n  }\n\n  // Terminate List\n  REL_TRACE_NOTS(0, \"Terminate List\");\n  for (thread = osRtxInfo.thread.terminate_list; thread != NULL;\n       thread = thread->thread_next) {\n    rtx_thread_show(thread);\n  }\n\n  REL_TRACE_IMM_NOTS(0, \" \");\n}\n\n#if __RTX_CPU_STATISTICS__\n\n#if TASK_HUNG_CHECK_ENABLED\nFLASH_TEXT_LOC NOINLINE static void print_hung_task(const os_thread_t *thread,\n                                                    U32 curr_time) {\n  REL_TRACE_IMM_NOTS(2, \"Thread \\\"%s\\\" blocked for %dms\",\n                     thread->name == NULL ? \"NULL\" : (char *)thread->name,\n                     curr_time - thread->swap_out_time);\n  ASSERT(0, \"Find thread hung \");\n}\n\nstatic void check_hung_thread(const os_thread_t *thread) {\n  uint32_t curr_hwticks, curr_time;\n\n  if (!thread->hung_check)\n    return;\n\n  curr_hwticks = hal_sys_timer_get();\n  curr_time = HWTICKS_TO_MS(curr_hwticks);\n  if ((curr_time - thread->swap_out_time) > thread->hung_check_timeout) {\n    print_hung_task(thread, curr_time);\n  }\n}\n\nvoid check_hung_threads(void) {\n  const os_thread_t *thread;\n  // Current List\n  check_hung_thread(osRtxInfo.thread.run.curr);\n\n  // Next List\n  if (osRtxInfo.thread.run.next != osRtxInfo.thread.run.curr)\n    check_hung_thread(osRtxInfo.thread.run.next);\n\n  // Ready List\n  for (thread = osRtxInfo.thread.ready.thread_list; thread != NULL;\n       thread = thread->thread_next) {\n    check_hung_thread(thread);\n  }\n\n  // Delay List\n  for (thread = osRtxInfo.thread.delay_list; thread != NULL;\n       thread = thread->delay_next) {\n    check_hung_thread(thread);\n  }\n\n  // Wait List\n  for (thread = osRtxInfo.thread.wait_list; thread != NULL;\n       thread = thread->delay_next) {\n    check_hung_thread(thread);\n  }\n\n  // Terminate List\n  for (thread = osRtxInfo.thread.terminate_list; thread != NULL;\n       thread = thread->thread_next) {\n    check_hung_thread(thread);\n  }\n}\n#endif\n\nstatic inline void print_thread_sw_statitics(const os_thread_t *thread) {\n  /*\n  REL_TRACE_NOTS(3,\"--- Thread swap in:%d  out=%d runings %d\",\n          thread->swap_in_time,\n          thread->swap_out_time,\n          thread->rtime);\n   */\n}\n\nFLASH_TEXT_LOC\nstatic void _rtx_show_thread_usage(const os_thread_t *thread,\n                                   uint32_t sample_time) {\n  if (thread) {\n    if (thread->thread_addr && thread->stack_mem) {\n      REL_TRACE_NOTS(4, \"--- Thread name=%s cpu=%%%d\",\n                     thread->name == NULL ? \"null\" : (char *)thread->name,\n                     sample_time != 0 ? ((thread->rtime - thread->step_rtime) *\n                                         100 / sample_time)\n                                      : 0);\n      print_thread_sw_statitics(thread);\n      ((os_thread_t *)thread)->step_rtime = thread->rtime;\n    } else {\n      REL_TRACE_NOTS(0, \"--- Thread BAD\");\n    }\n  } else {\n    REL_TRACE_NOTS(0, \"--- Thread NONE\");\n  }\n}\n\nFLASH_TEXT_LOC\nvoid rtx_show_all_threads_usage(void) {\n  const os_thread_t *thread;\n  static bool first_time = 1;\n  uint32_t sample_time;\n  static uint32_t start_sample_time = 0;\n\n  if (first_time) {\n    start_sample_time = rtx_get_hwticks();\n    first_time = 0;\n    return;\n  }\n\n  sample_time = HWTICKS_TO_MS(rtx_get_hwticks() - start_sample_time);\n  REL_TRACE_IMM_NOTS(0, \" \");\n  REL_TRACE_NOTS(0, \"Thread List:\");\n\n  // Current List\n  _rtx_show_thread_usage(osRtxInfo.thread.run.curr, sample_time);\n\n  // Next List\n  if (osRtxInfo.thread.run.next != osRtxInfo.thread.run.curr)\n    _rtx_show_thread_usage(osRtxInfo.thread.run.next, sample_time);\n\n  // Ready List\n  for (thread = osRtxInfo.thread.ready.thread_list; thread != NULL;\n       thread = thread->thread_next) {\n    _rtx_show_thread_usage(thread, sample_time);\n  }\n\n  // Delay List\n  for (thread = osRtxInfo.thread.delay_list; thread != NULL;\n       thread = thread->delay_next) {\n    _rtx_show_thread_usage(thread, sample_time);\n  }\n\n  // Wait List\n  for (thread = osRtxInfo.thread.wait_list; thread != NULL;\n       thread = thread->delay_next) {\n    _rtx_show_thread_usage(thread, sample_time);\n  }\n\n  // Terminate List\n  for (thread = osRtxInfo.thread.terminate_list; thread != NULL;\n       thread = thread->thread_next) {\n    _rtx_show_thread_usage(thread, sample_time);\n  }\n  start_sample_time = rtx_get_hwticks();\n  REL_TRACE_IMM_NOTS(0, \" \");\n}\n\n#endif\n"
  },
  {
    "path": "rtos/rtx5/rtx_timer.c",
    "content": "/*\n * Copyright (c) 2013-2019 Arm Limited. All rights reserved.\n *\n * SPDX-License-Identifier: Apache-2.0\n *\n * Licensed under the Apache License, Version 2.0 (the License); you may\n * not use this file except in compliance with the License.\n * You may obtain a copy of the License at\n *\n * www.apache.org/licenses/LICENSE-2.0\n *\n * Unless required by applicable law or agreed to in writing, software\n * distributed under the License is distributed on an AS IS BASIS, WITHOUT\n * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n * See the License for the specific language governing permissions and\n * limitations under the License.\n *\n * -----------------------------------------------------------------------------\n *\n * Project:     CMSIS-RTOS RTX\n * Title:       Timer functions\n *\n * -----------------------------------------------------------------------------\n */\n\n#include \"rtx_lib.h\"\n\n//  OS Runtime Object Memory Usage\n#if ((defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0)))\nosRtxObjectMemUsage_t osRtxTimerMemUsage\n    __attribute__((section(\".data.os.timer.obj\"))) = {0U, 0U, 0U};\n#endif\n\n//  ==== Helper functions ====\n\n/// Insert Timer into the Timer List sorted by Time.\n/// \\param[in]  timer           timer object.\n/// \\param[in]  tick            timer tick.\nstatic void TimerInsert(os_timer_t *timer, uint32_t tick) {\n  os_timer_t *prev, *next;\n\n  prev = NULL;\n  next = osRtxInfo.timer.list;\n  while ((next != NULL) && (next->tick <= tick)) {\n    tick -= next->tick;\n    prev = next;\n    next = next->next;\n  }\n  timer->tick = tick;\n  timer->prev = prev;\n  timer->next = next;\n  if (next != NULL) {\n    next->tick -= timer->tick;\n    next->prev = timer;\n  }\n  if (prev != NULL) {\n    prev->next = timer;\n  } else {\n    osRtxInfo.timer.list = timer;\n  }\n}\n\n/// Remove Timer from the Timer List.\n/// \\param[in]  timer           timer object.\nstatic void TimerRemove(const os_timer_t *timer) {\n\n  if (timer->next != NULL) {\n    timer->next->tick += timer->tick;\n    timer->next->prev = timer->prev;\n  }\n  if (timer->prev != NULL) {\n    timer->prev->next = timer->next;\n  } else {\n    osRtxInfo.timer.list = timer->next;\n  }\n}\n\n/// Unlink Timer from the Timer List Head.\n/// \\param[in]  timer           timer object.\nstatic void TimerUnlink(const os_timer_t *timer) {\n\n  if (timer->next != NULL) {\n    timer->next->prev = timer->prev;\n  }\n  osRtxInfo.timer.list = timer->next;\n}\n\n//  ==== Library functions ====\n\n/// Timer Tick (called each SysTick).\nstatic void osRtxTimerTick(void) {\n  os_timer_t *timer;\n  osStatus_t status;\n\n  timer = osRtxInfo.timer.list;\n  if (timer == NULL) {\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return;\n  }\n\n  timer->tick--;\n  while ((timer != NULL) && (timer->tick == 0U)) {\n    TimerUnlink(timer);\n    status = osMessageQueuePut(osRtxInfo.timer.mq, &timer->finfo, 0U, 0U);\n    if (status != osOK) {\n      (void)osRtxErrorNotify(osRtxErrorTimerQueueOverflow, timer);\n    }\n    if (timer->type == osRtxTimerPeriodic) {\n      TimerInsert(timer, timer->load);\n    } else {\n      timer->state = osRtxTimerStopped;\n    }\n    timer = osRtxInfo.timer.list;\n  }\n}\n\n/// Timer Thread\n__WEAK __NO_RETURN void osRtxTimerThread(void *argument) {\n  os_timer_finfo_t finfo;\n  osStatus_t status;\n  (void)argument;\n\n  osRtxInfo.timer.mq = osRtxMessageQueueId(\n      osMessageQueueNew(osRtxConfig.timer_mq_mcnt, sizeof(os_timer_finfo_t),\n                        osRtxConfig.timer_mq_attr));\n  osRtxInfo.timer.tick = osRtxTimerTick;\n\n  for (;;) {\n    // lint -e{934} \"Taking address of near auto variable\"\n    status = osMessageQueueGet(osRtxInfo.timer.mq, &finfo, NULL, osWaitForever);\n    if (status == osOK) {\n      EvrRtxTimerCallback(finfo.func, finfo.arg);\n      (finfo.func)(finfo.arg);\n    }\n  }\n}\n\n//  ==== Service Calls ====\n\n/// Create and Initialize a timer.\n/// \\note API identical to osTimerNew\nstatic osTimerId_t svcRtxTimerNew(osTimerFunc_t func, osTimerType_t type,\n                                  void *argument, const osTimerAttr_t *attr) {\n  os_timer_t *timer;\n  uint8_t flags;\n  const char *name;\n\n  // Check parameters\n  if ((func == NULL) || ((type != osTimerOnce) && (type != osTimerPeriodic))) {\n    EvrRtxTimerError(NULL, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  // Process attributes\n  if (attr != NULL) {\n    name = attr->name;\n    // lint -e{9079} \"conversion from pointer to void to pointer to other type\"\n    // [MISRA Note 6]\n    timer = attr->cb_mem;\n    if (timer != NULL) {\n      // lint -e(923) -e(9078) \"cast from pointer to unsigned int\" [MISRA Note\n      // 7]\n      if ((((uint32_t)timer & 3U) != 0U) ||\n          (attr->cb_size < sizeof(os_timer_t))) {\n        EvrRtxTimerError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    } else {\n      if (attr->cb_size != 0U) {\n        EvrRtxTimerError(NULL, osRtxErrorInvalidControlBlock);\n        // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n        return NULL;\n      }\n    }\n  } else {\n    name = NULL;\n    timer = NULL;\n  }\n\n  // Allocate object memory if not provided\n  if (timer == NULL) {\n    if (osRtxInfo.mpi.timer != NULL) {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      timer = osRtxMemoryPoolAlloc(osRtxInfo.mpi.timer);\n    } else {\n      // lint -e{9079} \"conversion from pointer to void to pointer to other\n      // type\" [MISRA Note 5]\n      timer = osRtxMemoryAlloc(osRtxInfo.mem.common, sizeof(os_timer_t), 1U);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    if (timer != NULL) {\n      uint32_t used;\n      osRtxTimerMemUsage.cnt_alloc++;\n      used = osRtxTimerMemUsage.cnt_alloc - osRtxTimerMemUsage.cnt_free;\n      if (osRtxTimerMemUsage.max_used < used) {\n        osRtxTimerMemUsage.max_used = used;\n      }\n    }\n#endif\n    flags = osRtxFlagSystemObject;\n  } else {\n    flags = 0U;\n  }\n\n  if (timer != NULL) {\n    // Initialize control block\n    timer->id = osRtxIdTimer;\n    timer->state = osRtxTimerStopped;\n    timer->flags = flags;\n    timer->type = (uint8_t)type;\n    timer->name = name;\n    timer->prev = NULL;\n    timer->next = NULL;\n    timer->tick = 0U;\n    timer->load = 0U;\n    timer->finfo.func = func;\n    timer->finfo.arg = argument;\n\n    EvrRtxTimerCreated(timer, timer->name);\n  } else {\n    EvrRtxTimerError(NULL, (int32_t)osErrorNoMemory);\n  }\n\n  return timer;\n}\n\n/// Get name of a timer.\n/// \\note API identical to osTimerGetName\nstatic const char *svcRtxTimerGetName(osTimerId_t timer_id) {\n  os_timer_t *timer = osRtxTimerId(timer_id);\n\n  // Check parameters\n  if ((timer == NULL) || (timer->id != osRtxIdTimer)) {\n    EvrRtxTimerGetName(timer, NULL);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return NULL;\n  }\n\n  EvrRtxTimerGetName(timer, timer->name);\n\n  return timer->name;\n}\n\n/// Start or restart a timer.\n/// \\note API identical to osTimerStart\nstatic osStatus_t svcRtxTimerStart(osTimerId_t timer_id, uint32_t ticks) {\n  os_timer_t *timer = osRtxTimerId(timer_id);\n\n  // Check parameters\n  if ((timer == NULL) || (timer->id != osRtxIdTimer) || (ticks == 0U)) {\n    EvrRtxTimerError(timer, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  if (timer->state == osRtxTimerRunning) {\n    TimerRemove(timer);\n  } else {\n    if (osRtxInfo.timer.tick == NULL) {\n      EvrRtxTimerError(timer, (int32_t)osErrorResource);\n      // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n      return osErrorResource;\n    } else {\n      timer->state = osRtxTimerRunning;\n      timer->load = ticks;\n    }\n  }\n\n  TimerInsert(timer, ticks);\n\n  EvrRtxTimerStarted(timer);\n\n  return osOK;\n}\n\n/// Stop a timer.\n/// \\note API identical to osTimerStop\nstatic osStatus_t svcRtxTimerStop(osTimerId_t timer_id) {\n  os_timer_t *timer = osRtxTimerId(timer_id);\n\n  // Check parameters\n  if ((timer == NULL) || (timer->id != osRtxIdTimer)) {\n    EvrRtxTimerError(timer, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  // Check object state\n  if (timer->state != osRtxTimerRunning) {\n    EvrRtxTimerError(timer, (int32_t)osErrorResource);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorResource;\n  }\n\n  timer->state = osRtxTimerStopped;\n\n  TimerRemove(timer);\n\n  EvrRtxTimerStopped(timer);\n\n  return osOK;\n}\n\n/// Check if a timer is running.\n/// \\note API identical to osTimerIsRunning\nstatic uint32_t svcRtxTimerIsRunning(osTimerId_t timer_id) {\n  os_timer_t *timer = osRtxTimerId(timer_id);\n  uint32_t is_running;\n\n  // Check parameters\n  if ((timer == NULL) || (timer->id != osRtxIdTimer)) {\n    EvrRtxTimerIsRunning(timer, 0U);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return 0U;\n  }\n\n  if (timer->state == osRtxTimerRunning) {\n    EvrRtxTimerIsRunning(timer, 1U);\n    is_running = 1U;\n  } else {\n    EvrRtxTimerIsRunning(timer, 0U);\n    is_running = 0;\n  }\n\n  return is_running;\n}\n\n/// Delete a timer.\n/// \\note API identical to osTimerDelete\nstatic osStatus_t svcRtxTimerDelete(osTimerId_t timer_id) {\n  os_timer_t *timer = osRtxTimerId(timer_id);\n\n  // Check parameters\n  if ((timer == NULL) || (timer->id != osRtxIdTimer)) {\n    EvrRtxTimerError(timer, (int32_t)osErrorParameter);\n    // lint -e{904} \"Return statement before end of function\" [MISRA Note 1]\n    return osErrorParameter;\n  }\n\n  if (timer->state == osRtxTimerRunning) {\n    TimerRemove(timer);\n  }\n\n  // Mark object as inactive and invalid\n  timer->state = osRtxTimerInactive;\n  timer->id = osRtxIdInvalid;\n\n  // Free object memory\n  if ((timer->flags & osRtxFlagSystemObject) != 0U) {\n    if (osRtxInfo.mpi.timer != NULL) {\n      (void)osRtxMemoryPoolFree(osRtxInfo.mpi.timer, timer);\n    } else {\n      (void)osRtxMemoryFree(osRtxInfo.mem.common, timer);\n    }\n#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))\n    osRtxTimerMemUsage.cnt_free++;\n#endif\n  }\n\n  EvrRtxTimerDestroyed(timer);\n\n  return osOK;\n}\n\n//  Service Calls definitions\n// lint ++flb \"Library Begin\" [MISRA Note 11]\nSVC0_4(TimerNew, osTimerId_t, osTimerFunc_t, osTimerType_t, void *,\n       const osTimerAttr_t *)\nSVC0_1(TimerGetName, const char *, osTimerId_t)\nSVC0_2(TimerStart, osStatus_t, osTimerId_t, uint32_t)\nSVC0_1(TimerStop, osStatus_t, osTimerId_t)\nSVC0_1(TimerIsRunning, uint32_t, osTimerId_t)\nSVC0_1(TimerDelete, osStatus_t, osTimerId_t)\n// lint --flb \"Library End\"\n\n//  ==== Public API ====\n\n/// Create and Initialize a timer.\nosTimerId_t osTimerNew(osTimerFunc_t func, osTimerType_t type, void *argument,\n                       const osTimerAttr_t *attr) {\n  osTimerId_t timer_id;\n\n  EvrRtxTimerNew(func, type, argument, attr);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxTimerError(NULL, (int32_t)osErrorISR);\n    timer_id = NULL;\n  } else {\n    timer_id = __svcTimerNew(func, type, argument, attr);\n  }\n  return timer_id;\n}\n\n/// Get name of a timer.\nconst char *osTimerGetName(osTimerId_t timer_id) {\n  const char *name;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxTimerGetName(timer_id, NULL);\n    name = NULL;\n  } else {\n    name = __svcTimerGetName(timer_id);\n  }\n  return name;\n}\n\n/// Start or restart a timer.\nosStatus_t osTimerStart(osTimerId_t timer_id, uint32_t ticks) {\n  osStatus_t status;\n\n  EvrRtxTimerStart(timer_id, ticks);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxTimerError(timer_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcTimerStart(timer_id, ticks);\n  }\n  return status;\n}\n\n/// Stop a timer.\nosStatus_t osTimerStop(osTimerId_t timer_id) {\n  osStatus_t status;\n\n  EvrRtxTimerStop(timer_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxTimerError(timer_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcTimerStop(timer_id);\n  }\n  return status;\n}\n\n/// Check if a timer is running.\nuint32_t osTimerIsRunning(osTimerId_t timer_id) {\n  uint32_t is_running;\n\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxTimerIsRunning(timer_id, 0U);\n    is_running = 0U;\n  } else {\n    is_running = __svcTimerIsRunning(timer_id);\n  }\n  return is_running;\n}\n\n/// Delete a timer.\nosStatus_t osTimerDelete(osTimerId_t timer_id) {\n  osStatus_t status;\n\n  EvrRtxTimerDelete(timer_id);\n  if (IsIrqMode() || IsIrqMasked()) {\n    EvrRtxTimerError(timer_id, (int32_t)osErrorISR);\n    status = osErrorISR;\n  } else {\n    status = __svcTimerDelete(timer_id);\n  }\n  return status;\n}\n"
  },
  {
    "path": "scripts/build.mk",
    "content": "cur_makefile := $(lastword $(MAKEFILE_LIST))\n\n# ==========================================================================\n# Building\n# ==========================================================================\n\nsrc := $(obj)\n\nPHONY := __build\n__build:\n\n$(cur_makefile): ;\n\n# Init all relevant variables used in kbuild files so\n# 1) they have correct type\n# 2) they do not inherit any value from the environment\nobj-y :=\nlib-y :=\nsubdir-y :=\narchive-custom :=\narchive-custom-valid :=\nalways :=\ntargets :=\nEXTRA_AFLAGS   :=\nEXTRA_CFLAGS   :=\nEXTRA_CPPFLAGS :=\nEXTRA_LDFLAGS  :=\nasflags-y  :=\nccflags-y  :=\ncppflags-y :=\nldflags-y  :=\n\nsubdir-asflags-y :=\nsubdir-ccflags-y :=\n\ninclude scripts/include.mk\n\n# For backward compatibility check that these variables do not change\nsave-cflags := $(CFLAGS)\n\nkbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))\nkbuild-file := $(kbuild-dir)/Makefile\ninclude $(kbuild-file)\n\n$(kbuild-file): ;\n\n# If the save-* variables changed error out\nifeq ($(KBUILD_NOPEDANTIC),)\n        ifneq (\"$(save-cflags)\",\"$(CFLAGS)\")\n                $(error CFLAGS was changed in \"$(kbuild-file)\". Fix it to use ccflags-y)\n        endif\nendif\n\ninclude scripts/lib.mk\n\nifeq ($(WIN_PLAT),y)\ncreate_dir = if not exist $(subst /,\\,$(1)) mkdir $(subst /,\\,$(1))\nelse\ncreate_dir = [ -d $(1) ] || mkdir -p $(1)\nendif\n\nifneq ($(KBUILD_SRC),)\n# Create output directory if not already present\n_dummy := $(shell $(call create_dir,$(obj)))\n\n# Create directories for object files if directory does not exist\n# Needed when obj-y := dir/file.o syntax is used\n_dummy := $(foreach d,$(obj-dirs), $(shell $(call create_dir,$(d))))\nendif\n\nifndef obj\n$(warning kbuild: build.mk is included improperly)\nendif\n\n# ===========================================================================\n\nifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)\nlib-target := $(obj)/lib.a\nendif\n\nifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)\nbuiltin-target := $(obj)/built-in$(built_in_suffix)\nendif\n\nsubmodgoals =\nSUBMODS := $(filter $(obj)/%,$(SUBMODS))\n\nifneq ($(SUBMODS),)\n\nlst_target := $(filter %.s %.i %.lst, $(SUBMODS))\nifeq ($(lib-target),)\nifneq ($(filter $(obj)/lib.lst,$(lst_target)),)\n$(error Cannot make lib.lst: lib-target not exists)\nendif\nendif\nifeq ($(builtin-target),)\nifneq ($(filter $(obj)/built-in.lst,$(lst_target)),)\n$(error Cannot make built-in.lst: builtin-target not exists)\nendif\nendif\n\nlst_target_obj := $(lst_target)\nlst_target_obj := $(filter-out $(obj)/built-in.lst $(obj)/lib.lst,$(lst_target_obj))\nlst_target_obj := $(lst_target_obj:.s=.o)\nlst_target_obj := $(lst_target_obj:.i=.o)\nlst_target_obj := $(lst_target_obj:.lst=.o)\nlst_target_obj := $(sort $(lst_target_obj))\n\ncur_submods := $(filter-out $(lst_target),$(SUBMODS))\ncur_submods += $(lst_target_obj)\n\ninclude scripts/submods.mk\n\nbuildextra-y := $(filter $(cur_submods),$(extra-y))\n\nifeq ($(filter $(obj)/built-in.lst,$(lst_target)),)\n\n# Just compile some of the object files\nbuildsubdir-y := $(call get_subdirs,$(subdir-y),$(cur_submods))\nbuildobj-y := $(filter $(cur_submods) $(addsuffix /built-in$(built_in_suffix),$(buildsubdir-y)),$(obj-y))\nbuildobj-y += $(foreach m,$(multi-used-y),$(if $(filter $(cur_submods),$(call get_multi_objs,$m))),$m,)\n\nelse\n\n# Compile all the object files\nbuildsubdir-y := $(subdir-y)\nbuildobj-y := $(obj-y)\n\nendif\n\nifeq ($(filter $(obj)/lib.lst,$(lst_target)),)\n# Just compile some of the lib files\nbuildlib-y := $(filter $(cur_submods),$(lib-y))\nelse\n# Compile all the lib files\nbuildlib-y := $(lib-y)\nendif\n\n# Check for invalid targets\nerrobj-y := $(cur_submods)\nerrobj-y := $(filter-out $(buildsubdir-y) $(addsuffix /%,$(buildsubdir-y)),$(errobj-y))\nerrobj-y := $(filter-out $(buildextra-y) $(buildobj-y) $(buildlib-y),$(errobj-y))\nerrobj-y := $(filter-out $(foreach m,$(multi-used-y),$(call get_multi_objs,$m)),$(errobj-y))\nifneq ($(errobj-y),)\n$(warning Unknown targets in [$(obj)]: $(errobj-y))\nendif\n\n# Update lst targets\nall_buildobj-y := $(buildextra-y) $(buildobj-y) $(filter-out %.a,$(builtin-target))\nall_buildlib-y := $(filter %.a,$(builtin-target)) $(lib-target)\nlst_target := $(filter $(lst_target), \\\n\t\t$(all_buildobj-y:.o=.s) \\\n\t\t$(all_buildobj-y:.o=.i) \\\n\t\t$(all_buildobj-y:.o=.lst) \\\n\t\t$(patsubst %.a,%.lst,$(all_buildlib-y)))\n\n# Avoid .o compile error affecting .i generation\nlst_i_target := $(filter %.i, $(lst_target))\nifneq ($(lst_i_target),)\n$(lst_i_target:.i=.o) : | $(lst_i_target)\nendif\n\nifeq ($(COMPILE_ONLY),1)\nsubmodgoals = $(call get_submodgoals,$@,$(SUBMODS))\nendif\n\nelse # SUBMODS\n\nbuildsubdir-y := $(subdir-y)\nbuildextra-y := $(extra-y)\nbuildobj-y := $(obj-y)\nbuildlib-y := $(lib-y)\n\nendif # SUBMODS\n\narchive-src-target :=\narchive-custom-target :=\nifeq ($(GEN_LIB),1)\narchive-src-target := $(addprefix $(srctree)/$(src)/lib/,$(notdir $(archive-src-y)))\narchive-src-target += $(archive-custom-valid)\narchive-src-target := $(strip $(archive-src-target))\narchive-custom-target := $(addprefix $(srctree)/$(src)/lib/,$(notdir $(archive-custom-valid)))\nendif\n\n__build: $(builtin-target) $(lib-target) $(buildextra-y) $(buildsubdir-y) $(lst_target) $(archive-src-target) $(archive-custom-target) $(always)\n\t@:\n\n# Compile C sources (.c)\n# ---------------------------------------------------------------------------\n\n# Default is built-in, unless we know otherwise\nquiet_modtag := $(empty)   $(empty)\n\nquiet_cmd_cc_dummy = CC $(quiet_modtag)  $@\ncmd_cc_dummy       = $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) -c -x c -o $@ $(devnull)\n\n# For dummy object files. Recipe is: $(call if_changed,cc_dummy)\n\nquiet_cmd_cc_s_c = CC $(quiet_modtag)  $@\ncmd_cc_s_c       = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<\n\n$(obj)/%.s: $(src)/%.c FORCE\n\t$(call if_changed_dep,cc_s_c)\n\nquiet_cmd_cc_i_c = CPP $(quiet_modtag) $@\ncmd_cc_i_c       = $(CPP) $(c_flags) -o $@ $<\n\n$(obj)/%.i: $(src)/%.c FORCE\n\t$(call if_changed_dep,cc_i_c)\n\n# C (.c) files\n# The C file is compiled and updated dependency information is generated.\n# (See cmd_cc_o_c + relevant part of rule_cc_o_c)\n\nquiet_cmd_cc_o_c = CC $(quiet_modtag)  $@\ncmd_cc_o_c       = $(CC) $(c_flags) -c -o $@ $<\n\ndefine rule_cc_o_c\n\t$(call echo-cmd,cc_o_c) $(cmd_cc_o_c)\nendef\n\n# Built-in and composite module parts\n$(obj)/%.o: $(src)/%.c FORCE\n\t$(call if_changed_rule,cc_o_c)\n\n# Compile C++ sources (.cpp)\n# ---------------------------------------------------------------------------\n\nquiet_cmd_cc_s_c++ = C++ $(quiet_modtag) $@\ncmd_cc_s_c++       = $(CC) $(c++_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<\n\n$(obj)/%.s: $(src)/%.cpp FORCE\n\t$(call if_changed_dep,cc_s_c++)\n\n$(obj)/%.s: $(src)/%.cc FORCE\n\t$(call if_changed_dep,cc_s_c++)\n\nquiet_cmd_cc_i_c++ = CPP $(quiet_modtag) $@\ncmd_cc_i_c++       = $(CPP) $(c++_flags) -o $@ $<\n\n$(obj)/%.i: $(src)/%.cpp FORCE\n\t$(call if_changed_dep,cc_i_c++)\n\n$(obj)/%.i: $(src)/%.cc FORCE\n\t$(call if_changed_dep,cc_i_c++)\n\n# Convert sounds (audio to .cpp)\n# ---------------------------------------------------------------------------\n\n%.snd.cpp: % FORCE\n\t../../convert.sh -C $< $@\n#\t$(call if_changed_dep,as_s_S)        TODO! Reference, delete once implemented below\n\n\n# C++ (.cpp) files\n# The C++ file is compiled and updated dependency information is generated.\n# (See cmd_cc_o_c++ + relevant part of rule_cc_o_c)\n\nquiet_cmd_cc_o_c++ = C++ $(quiet_modtag) $@\ncmd_cc_o_c++       = $(C++) $(c++_flags) -c -o $@ $<\n\ndefine rule_cc_o_c++\n\t$(call echo-cmd,cc_o_c++) $(cmd_cc_o_c++)\nendef\n\n# Built-in and composite module parts\n$(obj)/%.o: $(src)/%.cpp FORCE\n\t$(call if_changed_rule,cc_o_c++)\n\n$(obj)/%.o: $(src)/%.cc FORCE\n\t$(call if_changed_rule,cc_o_c++)\n\n# Compile assembler sources (.S)\n# ---------------------------------------------------------------------------\n\nquiet_cmd_as_s_S = CPP $(quiet_modtag) $@\ncmd_as_s_S       = $(CPP) $(a_cpp_flags) -o $@ $<\n\n$(obj)/%.s: $(src)/%.S FORCE\n\t$(call if_changed_dep,as_s_S)\n\nquiet_cmd_as_o_S = AS $(quiet_modtag)  $@\ncmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<\n\n$(obj)/%.o: $(src)/%.S FORCE\n\t$(call if_changed_dep,as_o_S)\n\ntargets += $(real-objs-y) $(real-objs-m) $(lib-y) $(lst_target)\ntargets += $(MAKECMDGOALS) $(always)\n\n# Common list command\n# ---------------------------------------------------------------------------\n\nquiet_cmd_dump_lst_o = MKLST   $@\nifeq ($(TOOLCHAIN),armclang)\n      cmd_dump_lst_o = $(OBJDUMP) --datasymbols --text -c -d --interleave=source --output=$@ $<\nelse\n      cmd_dump_lst_o = $(OBJDUMP) -Sdlxr $< > $@\nendif\n\nlst-cmd = @$(call echo-cmd,dump_lst_o) $(cmd_dump_lst_o)\n\n$(obj)/%.lst: $(obj)/%.o\n\t$(call lst-cmd)\n\n# Build the compiled-in targets\n# ---------------------------------------------------------------------------\n\n# To build objects in subdirs, we need to descend into the directories\n$(sort $(subdir-obj-y)): $(buildsubdir-y) ;\n\n# Archive command\n\nifeq ($(TOOLCHAIN),armclang)\narchive-cmd = $(AR) --create --debug_symbols $@ $(1)\nelse\nifeq ($(WIN_PLAT),y)\narchive-cmd = ( ( echo create $@ && \\\n  echo addmod $(subst $(space),$(comma),$(strip $(filter-out %.a %.cpp,$(1)))) && \\\n  $(foreach o,$(filter %.a,$(1)),echo addlib $o && ) \\\n  echo save && \\\n  echo end ) | $(AR) -M )\nelse\n# Command \"/bin/echo -e\" cannot work on Apple Mac machines, so we use \"/usr/bin/printf\" instead\narchive-cmd = ( printf 'create $@\\n\\\n  addmod $(subst $(space),$(comma),$(strip $(filter-out %.a %.cpp,$(1))))\\n\\\n  $(foreach o,$(filter %.a,$(1)),addlib $o\\n)save\\nend' | $(AR) -M )\nendif\nendif\n\n# Archive check\n\nifeq ($(CHECK_LIB_SRC),1)\nifneq ($(archive-bin-y),)\n$(info )\n$(info Library source check OK: $(archive-bin-y))\n$(info )\nendif\n\nifneq ($(archive-src-y),)\n$(info )\n$(error Error: The source files exist for libraries: $(archive-src-y))\nendif\nendif\n\n# Archive without source files\n\n      cmd_use_lib_file = $(call CMDCPFILE,$<,$@)\nquiet_cmd_use_lib_file = USELIB  $(@)\n\nifneq ($(archive-bin-y),)\n\nifeq ($(GEN_LIB),1)\n$(info )\n$(warning WARNING: No source files found for libraries: $(archive-bin-y))\n$(info )\nendif\n\n$(archive-bin-y): $(obj)/%: $(srctree)/$(src)/lib/% FORCE\nifeq ($(FORCE_TO_USE_LIB),1)\n\t$(call cmd,use_lib_file)\nelse\n\t$(call if_changed,use_lib_file)\nendif\n\ntargets += $(archive-bin-y)\n\nendif # archive-bin-y\n\n# Archive generation (with source files)\n\nifeq ($(GEN_LIB),1)\nifeq ($(FORCE_TO_USE_LIB),1)\n$(error Conflicted options: GEN_LIB and FORCE_TO_USE_LIB)\nendif\nifneq ($(archive-src-target),)\n\n      cmd_gen_lib_file = ( $(call create_dir,$(dir $(@))) ) && $(call archive-cmd,$(filter-out $(PHONY),$^))\nquiet_cmd_gen_lib_file = GENLIB  $(@)\n\ndefine archive-src-target-rule\n$(1): $(addprefix $(obj)/,$(patsubst %/,%/$(notdir $(builtin-target)),$($(notdir $(1:.a=-y)))))\nendef\n\n$(foreach m, $(archive-src-target), $(eval $(call archive-src-target-rule,$(m))))\n\n$(archive-src-target): FORCE\nifeq ($(CHECK_GEN_LIB_DEP),1)\n\t$(call if_changed,gen_lib_file)\nelse\n# Always pack lib\n\t$(call cmd,gen_lib_file)\nendif\n\ntargets += $(archive-src-target)\n\nendif # archive-src-y\nendif # GEN_LIB\n\n#\n# Rule to compile a set of .o files into one .o/.a built-in file\n#\nifdef builtin-target\n\nifeq ($(BUILT-IN-OBJ),1)\n\nquiet_cmd_link_o_target = LD      $@\n# If the list of objects to link is empty, just create an empty built-in.o\nifeq ($(TOOLCHAIN),armclang)\n      cmd_link_o_target = $(if $(strip $(obj-y)),\\\n              $(LD) -Wl$(comma)$(subst $(space),$(comma),$(strip $(ld_flags) --partial)) -nostdlib $(LINK_CFLAGS) -o $@ $(obj-y), \\\n              $(call CMDRMFILE,$@) && $(AR) --create --debug_symbols $@)\nelse\n      cmd_link_o_target = $(if $(strip $(obj-y)),\\\n              $(LD) -Wl$(comma)$(subst $(space),$(comma),$(strip $(ld_flags) -r)) -nostdlib -nostartfiles $(LINK_CFLAGS) -o $@ $(obj-y), \\\n              $(call CMDRMFILE,$@) && $(AR) rcs$(KBUILD_ARFLAGS) $@)\nendif\n\n$(builtin-target): $(buildobj-y) FORCE\n\t$(call if_changed,link_o_target)\n\nelse # BUILT-IN-OBJ\n\nquiet_cmd_ar_o_target = AR      $@\ncmd_ar_o_target = $(call archive-cmd,$(obj-y))\n\n$(builtin-target): $(buildobj-y) FORCE\n\t$(call if_changed,ar_o_target)\n\nendif # BUILT-IN-OBJ\n\ntargets += $(builtin-target)\n\n$(obj)/built-in.lst: $(builtin-target)\n\t$(call lst-cmd)\n\nendif # builtin-target\n\n#\n# Rule to compile a set of .o files into one .a file\n#\nifdef lib-target\n\nquiet_cmd_link_l_target = AR      $@\nifeq ($(TOOLCHAIN),armclang)\n      cmd_link_l_target = $(call CMDRMFILE,$@) && $(AR) --create --debug_symbols $@ $(lib-y)\nelse\n      cmd_link_l_target = $(call CMDRMFILE,$@) && $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)\nendif\n\n$(lib-target): $(buildlib-y) FORCE\n\t$(call if_changed,link_l_target)\n\ntargets += $(lib-target)\n\n$(obj)/lib.lst: $(lib-target)\n\t$(call lst-cmd)\n\nendif\n\n#\n# Rule to link composite objects\n#\n#  Composite objects are specified in kbuild makefile as follows:\n#    -objs := \n#  or\n#    -y    := \nlink_multi_deps =                     \\\n$(filter $(addprefix $(obj)/,         \\\n$($(subst $(obj)/,,$(@:.o=-objs)))    \\\n$($(subst $(obj)/,,$(@:.o=-y)))), $^)\n\nquiet_cmd_link_multi-y = LD      $@\nifeq ($(TOOLCHAIN),armclang)\n      cmd_link_multi-y = $(LD) -Wl,$(subst $(space),$(comma),$(strip $(ld_flags) --partial)) -nostdlib $(LINK_CFLAGS) -o $@ $(link_multi_deps)\nelse\n      cmd_link_multi-y = $(LD) -Wl,$(subst $(space),$(comma),$(strip $(ld_flags) -r --whole-archive)) -nostdlib -nostartfiles $(LINK_CFLAGS) -o $@ $(link_multi_deps)\nendif\n\n$(multi-used-y): FORCE\n\t$(call if_changed,link_multi-y)\n$(call multi_depend, $(multi-used-y), .o, -objs -y)\n\ntargets += $(multi-used-y)\n\n$(multi-used-y:.o=.lst): %.lst : %.o\n\t$(call lst-cmd)\n\n# Descending\n# ---------------------------------------------------------------------------\n\nPHONY += $(subdir-y)\n\n$(subdir-y):\n\t$(Q)$(MAKE) $(build)=$@ $(submodgoals)\n\n# Add FORCE to the prequisites of a target to force it to be always rebuilt.\n# ---------------------------------------------------------------------------\n\nPHONY += FORCE\n\nFORCE:\n\n# Read all saved command lines and dependencies for the $(targets) we\n# may be building above, using $(if_changed{,_dep}). As an\n# optimization, we don't need to read them if the target does not\n# exist, we will rebuild anyway in that case.\n\ntargets := $(wildcard $(sort $(targets)))\ncmd_files := $(wildcard $(foreach f,$(targets),$(call get_depfile_name,$(f))))\n\nifneq ($(cmd_files),)\ninclude $(cmd_files)\n$(cmd_files): ;\nendif\n\n# Declare the contents of the .PHONY variable as phony.  We keep that\n# information in a variable se we can use it in if_changed and friends.\n\n.PHONY: $(PHONY)\n\n# Last-resort default rule for unknown targets\n\n%::\n\t@$(call echo-help,*** Error: No rule is defined for target: $@)\n\t@exit 1\n\n"
  },
  {
    "path": "scripts/clean.mk",
    "content": "cur_makefile := $(lastword $(MAKEFILE_LIST))\n\n# ==========================================================================\n# Cleaning up\n# ==========================================================================\n\nsrc := $(obj)\n\nPHONY := __clean\n__clean:\n\n$(cur_makefile): ;\n\n# Shorthand for $(Q)$(MAKE) scripts/Makefile.clean obj=dir\n# Usage:\n# $(Q)$(MAKE) $(clean)=dir\nclean := -f $(srctree)/scripts/clean.mk obj\n\nkbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))\ninclude $(kbuild-dir)/Makefile\n\n# Figure out what we need to build from the various variables\n# ==========================================================================\n\n__subdir-y\t:= $(patsubst %/,%,$(filter %/, $(obj-y)))\nsubdir-y\t+= $(__subdir-y)\n__subdir-m      := $(patsubst %/,%,$(filter %/, $(obj-m)))\nsubdir-m        += $(__subdir-m)\n__subdir-       := $(patsubst %/,%,$(filter %/, $(obj-)))\nsubdir-         += $(__subdir-)\n\n# Subdirectories we need to descend into\n\nsubdir-ym\t:= $(sort $(subdir-y) $(subdir-m))\nsubdir-ymn      := $(sort $(subdir-ym) $(subdir-))\n\nobj-ymn\t\t:= $(obj-y) $(obj-m) $(obj-)\nlib-ymn\t\t:= $(lib-y) $(lib-m) $(lib-)\n\n# if $(foo-objs) exists, foo.o is a composite object\nmulti-used-ymn\t:= $(sort $(foreach m,$(obj-ymn), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))), $(m))))\nmulti-objs-ymn\t:= $(foreach m, $(multi-used-ymn), $($(m:.o=-objs)) $($(m:.o=-y)))\n\nobj-ymn\t\t:= $(patsubst %/, %/built-in.o %/built-in.a, $(obj-y) $(obj-m) $(obj-))\n\nextra-ymn\t:= $(extra-y) $(extra-m) $(extra-)\n\n# build a list of files to remove, usually relative to the current\n# directory\n\n__clean-files\t:= $(obj-ymn) $(lib-ymn) $(multi-used-ymn) \\\n\t\t   $(multi-objs-ymn) $(extra-ymn) \\\n\t\t   built-in.o built-in.a lib.a \\\n\t\t   $(always) $(targets) $(clean-files)\n\n__clean-files   := $(filter-out $(no-clean-files), $(__clean-files))\n\n# clean-files is given relative to the current directory, unless it\n# starts with $(objtree)/ (which means \"./\", so do not add \"./\" unless\n# you want to delete a file from the toplevel object directory).\n\n__clean-files   := $(addprefix $(obj)/, $(filter-out $(objtree)/%, $(__clean-files))) \\\n\t\t   $(filter $(objtree)/%, $(__clean-files))\n\n# same as clean-files\n\n__clean-dirs    := $(addprefix $(obj)/, $(filter-out $(objtree)/%, $(clean-dirs)))    \\\n\t\t   $(filter $(objtree)/%, $(clean-dirs))\n\n# Add subdir path\nsubdir-ymn\t:= $(addprefix $(obj)/,$(subdir-ymn))\nobj-ymn\t\t:= $(addprefix $(obj)/,$(obj-ymn))\nlib-ymn\t\t:= $(addprefix $(obj)/,$(lib-ymn))\nmulti-used-ymn\t:= $(addprefix $(obj)/,$(multi-used-ymn))\nmulti-objs-ymn\t:= $(addprefix $(obj)/,$(multi-objs-ymn))\n\nSUBMODS\t\t:= $(filter $(obj)/%,$(SUBMODS))\n\nifneq ($(SUBMODS),)\ninclude scripts/submods.mk\n\nbuildsubdir-ymn\t:= $(call get_subdirs,$(subdir-ymn),$(SUBMODS))\n__full-clean-files\t:= $(__clean-files)\n__clean-files\t:= $(filter $(SUBMODS),$(__full-clean-files))\n__clean-files\t+= $(obj)/built-in.o $(obj)/built-in.a $(obj)/lib.a\n__clean-files\t+= $(foreach m,$(multi-used-ymn),$(if $(filter $(SUBMODS),$(call get_multi_objs,$m))),$m,)\n\n# Check for invalid targets\nerrobj-ymn := $(SUBMODS)\nerrobj-ymn := $(filter-out $(buildsubdir-ymn) $(addsuffix /%,$(buildsubdir-ymn)),$(errobj-ymn))\nerrobj-ymn := $(filter-out $(__clean-files),$(errobj-ymn))\nerrobj-ymn := $(filter-out $(foreach m,$(multi-used-ymn),$(call get_multi_objs,$m)),$(errobj-ymn))\nifneq ($(errobj-ymn),)\n$(warning Unknown targets in [$(obj)]: $(errobj-ymn))\nendif\n\nelse # SUBMODS\n\nifeq ($(ALLCLEAN),1)\nRM_ALL := 1\nifneq ($(KBUILD_OUTPUT),)\nRM_DIR := 1\nendif\nendif\n\nifeq ($(RM_DIR),1)\nbuildsubdir-ymn\t:=\nelse\nbuildsubdir-ymn\t:= $(subdir-ymn)\nendif\n\nendif # SUBMODS\n\n# Include intermediate files\ninclude scripts/include.mk\n__clean-files\t+= $(foreach f,$(__clean-files),$(call get_depfile_name,$f))\n\n#$(info RM_DIR=$(RM_DIR), RM_ALL=$(RM_ALL))\n#$(info buildsubdir-ymn=$(buildsubdir-ymn))\n#$(info __clean-files=$(__clean-files))\n\n__clean-files\t:= $(wildcard $(__clean-files))\n__clean-dirs\t:= $(wildcard $(__clean-dirs))\n\n# ==========================================================================\n\nifeq ($(RM_DIR),1)\n\nquiet_cmd_clean    = RMDIR   $(obj)\n      cmd_clean    = $(call CMDRMDIR,$(obj))\n\nelse # RM_DIR\n\nquiet_cmd_clean    = CLEAN   $(obj)\nifeq ($(RM_ALL),1)\n      cmd_clean    = $(call CMDRMFILER,$(obj),*.o *.a *.s *.d)\nelse\n      cmd_clean    = $(call CMDRMFILE,$(__clean-files))\nendif\nquiet_cmd_cleandir = CLEAN   $(__clean-dirs)\n      cmd_cleandir = $(call CMDRMDIR,$(__clean-dirs))\n\nendif # RM_DIR\n\n\n__clean: $(buildsubdir-ymn)\n\t@:\nifeq ($(RM_DIR),1)\n\t+$(call cmd,clean)\nelse # RM_DIR\nifeq ($(RM_ALL),1)\n\t+$(call cmd,clean)\nelse\nifneq ($(strip $(__clean-files)),)\n\t+$(call cmd,clean)\nendif\nendif\nifneq ($(strip $(__clean-dirs)),)\n\t+$(call cmd,cleandir)\nendif\nendif # RM_DIR\n\n\n# ===========================================================================\n# Generic stuff\n# ===========================================================================\n\n# Descending\n# ---------------------------------------------------------------------------\n\nPHONY += $(subdir-ymn)\n$(subdir-ymn):\n\t$(Q)$(MAKE) $(clean)=$@\n\n\n# Declare the contents of the .PHONY variable as phony.  We keep that\n# information in a variable se we can use it in if_changed and friends.\n\n.PHONY: $(PHONY)\n"
  },
  {
    "path": "scripts/extrawarn.mk",
    "content": "cur_makefile := $(lastword $(MAKEFILE_LIST))\n\n$(cur_makefile): ;\n\n# ==========================================================================\n#\n# make W=... settings\n#\n# W=1 - warnings that may be relevant and does not occur too often\n# W=2 - warnings that occur quite often but may still be relevant\n# W=3 - the more obscure warnings, can most likely be ignored\n#\n# $(call cc-option, -W...) handles gcc -W.. options which\n# are not supported by all versions of the compiler\n# ==========================================================================\n\nifeq (\"$(origin W)\",\"command line\")\n  export KBUILD_ENABLE_EXTRA_GCC_CHECKS := $(W)\nendif\n\nifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS\nwarning-  := $(empty)\n\nwarning-1 := -Wextra -Wunused -Wno-unused-parameter\nwarning-1 += -Wmissing-declarations\nwarning-1 += -Wmissing-format-attribute\nwarning-1 += -Wmissing-include-dirs\nwarning-1 += -Wunused-but-set-variable\nwarning-1 += -Wno-missing-field-initializers\nc_warning-1 := -Wmissing-prototypes -Wold-style-definition\n\nwarning-2 := -Waggregate-return\nwarning-2 += -Wcast-align\nwarning-2 += -Wdisabled-optimization\nwarning-2 += -Wshadow\nwarning-2 += -Wlogical-op\nwarning-2 += -Wmissing-field-initializers\nc_warning-2 := -Wnested-externs\n\nwarning-3 := -Wcast-qual\nwarning-3 += -Wconversion\nwarning-3 += -Wpacked\nwarning-3 += -Wpadded\nwarning-3 += -Wpointer-arith\nwarning-3 += -Wredundant-decls\nwarning-3 += -Wswitch-default\nwarning-3 += -Wpacked-bitfield-compat\nwarning-3 += -Wvla\nc_warning-3 := -Wbad-function-cast\n\nwarning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))\nwarning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))\nwarning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))\n\nc_warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))\nc_warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))\nc_warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))\n\nifeq (\"$(strip $(warning) $(c_warning))\",\"\")\n        $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)\nendif\n\nKBUILD_CFLAGS += $(warning)\nC_ONLY_FLAGS += $(c_warning)\nelse\n\nifeq ($(COMPILER),clang)\nKBUILD_CFLAGS += -Wno-initializer-overrides\nKBUILD_CFLAGS += -Wno-unused-value\nKBUILD_CFLAGS += -Wno-format\nKBUILD_CFLAGS += -Wno-unknown-warning-option\nKBUILD_CFLAGS += -Wno-sign-compare)\nKBUILD_CFLAGS += -Wno-format-zero-length\nKBUILD_CFLAGS += -Wno-uninitialized\nendif\nendif\n"
  },
  {
    "path": "scripts/include.mk",
    "content": "ifndef __INCLUDE_MK__\n__INCLUDE_MK__ := 1\n\ncur_makefile := $(lastword $(MAKEFILE_LIST))\n\n$(cur_makefile): ;\n\n####\n# Generic definitions\n\nifeq ($(WIN_PLAT),y)\nifeq ($(WIN_SHELL),y)\n# make will choose sh.exe as SHELL if it finds sh.exe in the directories of PATH, regardless of\n# the setting in environment or parent (e.g., when git.exe is in the PATH)\nSHELL := cmd.exe\nendif\nendif\n\n# Convenient variables\nlparen\t:= (\nrparen\t:= )\ncomma   := ,\nquote   := \"\nsquote  := '\nempty   :=\nspace   := $(empty) $(empty)\n\nifeq ($(WIN_PLAT),y)\ndevnull := nul\nelse\ndevnull := /dev/null\nendif\n\n###\n# Remove/copy commands\nifeq ($(WIN_PLAT),y)\nCMDRMFILE\t= del /f /q $(subst /,\\,$1) >nul 2>&1\nCMDRMFILER\t= cd $(subst /,\\,$1) && del /f /q /s $(subst /,\\,$2)\nCMDRMDIR\t= rmdir /s /q $(subst /,\\,$1) >nul 2>&1 || del /f /q /s $(subst /,\\,$1)\\*\nCMDCPFILE\t= copy /y $(subst /,\\,$1 $2)\nelse\nCMDRMFILE\t= rm -f $1\nCMDRMFILER\t= find $1 $(RCS_FIND_IGNORE) \\\n\t\t   \\( $(addprefix -name ,'$(firstword $2)') \\\n\t\t      $(addprefix -o -name ',$(addsuffix ',$(filter-out $(firstword $2),$2))) \\) \\\n\t\t    -type f -print | xargs rm -f\nCMDRMDIR\t= rm -fr $1\nCMDCPFILE\t= cp -f $1 $2\nendif\n\n###\n# Build-in obj suffix\nifeq ($(BUILT-IN-OBJ),1)\nbuilt_in_suffix := .o\nelse\nbuilt_in_suffix := .a\nendif\n\n###\n# Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o\ndot-target = $(dir $(1)).$(notdir $(1))\n\n###\n# The temporary file to save gcc -MF generated dependencies must not\n# contain a comma\nget_depfile_name = $(subst $(comma),_,$(dot-target).d)\ndepfile = $(call get_depfile_name,$@)\n\n###\n# filename of target with directory and extension stripped\nbasetarget = $(basename $(notdir $@))\n\n###\n# filename of first prerequisite with directory and extension stripped\nbaseprereq = $(basename $(notdir $<))\n\n###\n# Escape special characters for use in echo statements\nifeq ($(WIN_PLAT),y)\n# Escape redirection character in echo in Windows\nescchar = $(subst $(lparen),^$(lparen),$(subst $(rparen),^$(rparen),$(subst &,^&,$(subst |,^|,$(subst <,^<,$(subst >,^>,$1))))))\nelse\n# Escape single quote for use in echo statements\nescchar = $(subst $(squote),'\\$(squote)',$1)\nendif\n\n###\n# Easy method for doing a status message\n       kecho := :\nifeq ($(WIN_PLAT),y)\n quiet_kecho := echo.\nelse\n quiet_kecho := echo\nendif\nsilent_kecho := :\nkecho := $($(quiet)kecho)\n\nifeq ($(WIN_PLAT),y)\necho-help = @echo.  $(call escchar,$(1)) &\nelse\necho-help = @echo '  $(call escchar,$(1))'\nendif\n\n###\n# try-run\nifeq ($(WIN_PLAT),y)\ntry-run = $(shell ($(1) >$(devnull) 2>&1) && echo. $(2) || echo. $(3))\n# Or, using define to construct multi-line WIN commands,\n# with if command: if not errorlevel 1\nelse\ntry-run = $(shell if ($(1)) >$(devnull) 2>&1; \\\n                  then echo \"$(2)\"; \\\n                  else echo \"$(3)\"; \\\n                  fi)\nendif\n\n###\n# cc-option\ncc-option = $(call try-run, \\\n\t$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c \\\n\t\t-o $(devnull) $(devnull),$(1),$(2))\n\n###\n# Shorthand for $(Q)$(MAKE) -f scripts/build.mk obj=\n# Usage:\n# $(Q)$(MAKE) $(build)=dir\nbuild := -f $(srctree)/scripts/build.mk obj\n\n# Prefix -I with $(srctree) if it is not an absolute path.\n# skip if -I has no parameter\n#addtree = $(if $(patsubst -I%,%,$(1)), \\\n#$(if $(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1))\nifeq ($(WIN_PLAT),y)\naddtree = $(if $(patsubst -I%,%,$(1)), \\\n    $(if $(filter-out -I$(KBUILD_ROOT)/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1)),$(1)))\nelse\naddtree = $(if $(patsubst -I%,%,$(1)), \\\n    $(if $(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1)),$(1)))\nendif\n\n# Find all -I options and call addtree\nflags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))\n\n# echo command.\n# Short version is used, if $(quiet) equals `quiet_', otherwise full one.\nifeq ($(WIN_PLAT),y)\necho-cmd = $(if $($(quiet)cmd_$(1)),\\\n\techo.  $(call escchar,$($(quiet)cmd_$(1)))$(echo-why) &&)\necho-cmd-nowhy = $(if $($(quiet)cmd_$(1)),\\\n\techo.  $(call escchar,$($(quiet)cmd_$(1))) &&)\nelse\necho-cmd = $(if $($(quiet)cmd_$(1)),\\\n\techo '  $(call escchar,$($(quiet)cmd_$(1)))$(echo-why)' ;)\necho-cmd-nowhy = $(if $($(quiet)cmd_$(1)),\\\n\techo '  $(call escchar,$($(quiet)cmd_$(1)))' ;)\nendif\n\n# printing commands\ncmd = @$(echo-cmd) $(cmd_$(1))\n\n# Add $(obj)/ for paths that are not absolute\nobjectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o)))\n\n###\n# if_changed      - execute command if any prerequisite is newer than\n#                   target, or command line has changed\n# if_changed_dep  - as if_changed, but uses fixdep to reveal dependencies\n#                   including used config symbols\n# if_changed_rule - as if_changed but execute rule instead\n# See Documentation/kbuild/makefiles.txt for more info\n\nifneq ($(KBUILD_NOCMDDEP),1)\n# Check if both arguments has same arguments. Result is empty string if equal.\n# User may override this check using make KBUILD_NOCMDDEP=1\narg-check = $(strip $(filter-out $(cmd_$(1)), $(cmd_$@)) \\\n                    $(filter-out $(cmd_$@),   $(cmd_$(1))) )\nelse\narg-check = $(if $(strip $(cmd_$@)),,1)\nendif\n\n# Replace >$< with >$$< to preserve $ when reloading the .cmd file\n# (needed for make)\n# Replace >#< with >\\#< to avoid starting a comment in the .cmd file\n# (needed for make)\n# Replace >'< with >'\\''< to be able to enclose the whole string in '...'\n# (needed for the shell)\nmake-cmd = $(call escchar,$(subst \\#,\\\\\\#,$(subst $$,$$$$,$(cmd_$(1)))))\n\n# Find any prerequisites that is newer than target or that does not exist.\n# PHONY targets skipped in both cases.\nany-prereq = $(filter-out $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^)\n\nifeq ($(WIN_PLAT),y)\ndepfile-new = echo. > $(depfile) && \\\n              echo cmd_$@ := $(make-cmd) >> $(depfile) && \\\n\t      echo. >> $(depfile)\ndepfile-add = echo. >> $(depfile) && \\\n              echo cmd_$@ := $(make-cmd) >> $(depfile) && \\\n\t      echo. >> $(depfile)\nelse\ndepfile-new = printf '\\n%s\\n' 'cmd_$@ := $(make-cmd)' > $(depfile)\ndepfile-add = printf '\\n%s\\n' 'cmd_$@ := $(make-cmd)' >> $(depfile)\nendif\n\n# Execute command if command has changed or prerequisite(s) are updated.\n#\nif_changed = $(if $(strip $(any-prereq) $(arg-check)),                       \\\n\t@ ( $(echo-cmd) $(cmd_$(1)) ) &&                                     \\\n\t  ( $(depfile-new) ))\n\nif_changed2 = $(if $(strip $(any-prereq) $(call arg-check,$(2))),             \\\n\t@ ( $(call echo-cmd,$(1)) $(cmd_$(1)) && \\\n\t    $(call echo-cmd,$(2)) $(cmd_$(2)) ) &&                           \\\n\t  ( $(call depfile-new,$(2)) ))\n\n# Execute the command and also postprocess generated .d dependencies file.\nif_changed_dep = $(if $(strip $(any-prereq) $(arg-check)),                   \\\n\t@ ( $(echo-cmd) $(cmd_$(1)) ) &&                                     \\\n\t  ( $(depfile-add) ))\n\n# Usage: $(call if_changed_rule,foo)\n# Will check if $(cmd_foo) or any of the prerequisites changed,\n# and if so will execute $(rule_foo).\nif_changed_rule = $(if $(strip $(any-prereq) $(arg-check)),                  \\\n\t@ ( $(rule_$(1)) ) &&                                                \\\n\t  ( $(depfile-add) ))\n\n###\n# why - tell why a a target got build\n#       enabled by make V=2\n#       Output (listed in the order they are checked):\n#          (1) - due to target is PHONY\n#          (2) - due to target missing\n#          (3) - due to: file1.h file2.h\n#          (4) - due to command line change\n#          (5) - due to missing .cmd file\n#          (6) - due to target not in $(targets)\n# (1) PHONY targets are always build\n# (2) No target, so we better build it\n# (3) Prerequisite is newer than target\n# (4) The command line stored in the file named dir/.target.cmd\n#     differed from actual command line. This happens when compiler\n#     options changes\n# (5) No dir/.target.d file (used to store command line)\n# (6) No dir/.target.d file and target not listed in $(targets)\n#     This is a good hint that there is a bug in the kbuild file\nifeq ($(KBUILD_VERBOSE),2)\nwhy =                                                                        \\\n    $(if $(filter $@, $(PHONY)),- due to target is PHONY,                    \\\n        $(if $(wildcard $@),                                                 \\\n            $(if $(strip $(any-prereq)),- due to: $(any-prereq),             \\\n                $(if $(arg-check),                                           \\\n                    $(if $(cmd_$@),- due to command line change,             \\\n                        $(if $(filter $@, $(targets)),                       \\\n                            - due to missing .d file,                        \\\n                            - due to $(notdir $@) not in $$(targets)         \\\n                         )                                                   \\\n                     )                                                       \\\n                 )                                                           \\\n             ),                                                              \\\n             - due to target missing                                         \\\n         )                                                                   \\\n     )\n\necho-why = $(call escchar, $(strip $(why)))\nendif\n\nendif # __INCLUDE_MK__\n"
  },
  {
    "path": "scripts/lib.mk",
    "content": "cur_makefile := $(lastword $(MAKEFILE_LIST))\n\n$(cur_makefile): ;\n\n# Backward compatibility\nasflags-y  += $(EXTRA_AFLAGS)\nccflags-y  += $(EXTRA_CFLAGS)\ncppflags-y += $(EXTRA_CPPFLAGS)\nldflags-y  += $(EXTRA_LDFLAGS)\n\n#\n# flags that take effect in sub directories\nexport KBUILD_SUBDIR_ASFLAGS := $(KBUILD_SUBDIR_ASFLAGS) $(subdir-asflags-y)\nexport KBUILD_SUBDIR_CCFLAGS := $(KBUILD_SUBDIR_CCFLAGS) $(subdir-ccflags-y)\n\n# Figure out what we need to build from the various variables\n# ===========================================================================\n\n# Handle archives\n# ---------------------------------------------------------------------------\n\n# Extract archives from $(obj-y)\narchive-y\t\t\t\t:= $(filter %.a, $(obj-y))\narchive-custom-valid\t:= $(filter $(archive-custom), $(archive-y))\n\nifeq ($(archive-y),)\narchive-src-y\t:=\narchive-bin-y\t:=\nelse # archive-y\nifeq ($(FORCE_TO_USE_LIB),1)\narchive-bin-y\t:= $(archive-y)\nelse\n# Filter out archive-custom-valid\narchive-y\t:= $(filter-out $(archive-custom-valid), $(archive-y))\n\n# Extract archives that have source files available\narchive-src-y\t:= $(foreach m, $(archive-y), $(if $(wildcard $(addprefix $(srctree)/$(src)/,$($(m:.a=-y):.o=.*))), $(m)))\n\n# Extract archives that do NOT have source files\narchive-bin-y\t:= $(filter-out $(archive-src-y), $(archive-y))\nendif\n\n# If the source files of the archive (including archive-custom-valid) exist, build the source files directly\nobj-y\t\t\t:= $(filter-out $(archive-src-y) $(archive-custom-valid), $(obj-y)) $(foreach m, $(archive-src-y) $(archive-custom-valid), $($(m:.a=-y)))\nendif # archive-y\n\n# Handle composite objects\n# ---------------------------------------------------------------------------\n\n# if $(foo-objs) exists, foo.o is a composite object\nmulti-used-y := $(sort $(foreach m,$(obj-y), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))), $(m))))\n\n# Build list of the parts of our composite objects, our composite\n# objects depend on those (obviously)\nmulti-objs-y := $(foreach m, $(multi-used-y), $($(m:.o=-objs)) $($(m:.o=-y)))\nmulti-objs-subdir \t:= $(patsubst %/,%,$(filter %/, $(multi-objs-y)))\nmulti-objs-archive\t:= $(filter %.a, $(multi-objs-y))\nmulti-objs-y := $(patsubst %/, %/built-in$(built_in_suffix), $(multi-objs-y))\nmulti-objs   := $(multi-objs-y)\n\ndefine multi_subdir_built_in\n$(foreach m, $(1), $(if $($(m:.o=$(strip $2))), $(eval $(m:.o=$(strip $2)) := $(patsubst %/, %/built-in$(built_in_suffix), $($(m:.o=$(strip $2)))))))\nendef\n\nifneq ($(multi-objs-subdir),)\n$(call multi_subdir_built_in,$(multi-used-y),-objs)\n$(call multi_subdir_built_in,$(multi-used-y),-y)\nendif\n\nifneq ($(multi-objs-archive),)\nifneq ($(filter $(archive-custom), $(multi-objs-archive)),)\n$(error Composite objects cannot be built from customized archives)\nendif\nmobjs-archive-src-y\t:=\nmobjs-archive-bin-y\t:=\nmobjs-archive-y\t\t:= $(multi-objs-archive)\n\nifeq ($(FORCE_TO_USE_LIB),1)\nmobjs-archive-bin-y\t+= $(mobjs-archive-y)\nelse\n# Extract archives that have source files available\nmobjs-archive-src-y\t+= $(foreach m, $(mobjs-archive-y), $(if $(wildcard $(addprefix $(srctree)/$(src)/,$($(m:.a=-y):.o=.*))), $(m)))\n\n# Extract archives that do NOT have source files\nmobjs-archive-bin-y\t:= $(filter-out $(mobjs-archive-src-y), $(mobjs-archive-y))\nendif\n\n# If the source files of the archive (including archive-custom-valid) exist, build the source files directly\nmobjs-obj-y\t\t\t:= $(foreach m, $(mobjs-archive-src-y), $($(m:.a=-y)))\n\narchive-y\t\t\t+= $(mobjs-archive-y)\narchive-bin-y\t\t+= $(mobjs-archive-bin-y)\narchive-src-y\t\t+= $(mobjs-archive-src-y)\nobj-y\t\t\t\t+= $(mobjs-obj-y)\nendif\n\n# Handle objects in subdirs\n# ---------------------------------------------------------------------------\n# o if we encounter foo/ in $(obj-y), replace it by foo/built-in.o or .a\n#   and add the directory to the list of dirs to descend into: $(subdir-y)\n\n__subdir-y\t:= $(patsubst %/,%,$(filter %/, $(obj-y)))\nsubdir-y\t+= $(__subdir-y)\nobj-y\t\t:= $(patsubst %/, %/built-in$(built_in_suffix), $(obj-y))\n\n# Subdirectories we need to descend into\nsubdir-y\t:= $(sort $(subdir-y) $(multi-objs-subdir))\n\n# $(subdir-obj-y) is the list of objects in $(obj-y) which uses dir/ to\n# tell kbuild to descend\nsubdir-obj-y := $(filter %/built-in$(built_in_suffix), $(obj-y) $(multi-objs-y))\n\n# $(obj-dirs) is a list of directories that contain object files\nobj-dirs := $(dir $(multi-objs) $(obj-y))\n\n# Replace multi-part objects by their individual parts, look at local dir only\nreal-objs-y := $(foreach m, $(filter-out $(subdir-obj-y), $(obj-y)), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))),$($(m:.o=-objs)) $($(m:.o=-y)),$(m))) $(extra-y)\n\n# Add subdir path\n\nextra-y\t\t:= $(addprefix $(obj)/,$(extra-y))\nalways\t\t:= $(addprefix $(obj)/,$(always))\ntargets\t\t:= $(addprefix $(obj)/,$(targets))\nobj-y\t\t:= $(addprefix $(obj)/,$(obj-y))\nlib-y\t\t:= $(addprefix $(obj)/,$(lib-y))\nsubdir-obj-y\t:= $(addprefix $(obj)/,$(subdir-obj-y))\nreal-objs-y\t:= $(addprefix $(obj)/,$(real-objs-y))\nmulti-used-y\t:= $(addprefix $(obj)/,$(multi-used-y))\nmulti-objs-y\t:= $(addprefix $(obj)/,$(multi-objs-y))\nsubdir-y\t:= $(addprefix $(obj)/,$(subdir-y))\nobj-dirs\t:= $(addprefix $(obj)/,$(obj-dirs))\narchive-y\t:= $(addprefix $(obj)/,$(archive-y))\narchive-src-y\t:= $(addprefix $(obj)/,$(archive-src-y))\narchive-bin-y\t:= $(addprefix $(obj)/,$(archive-bin-y))\narchive-custom-valid\t:= $(addprefix $(obj)/,$(archive-custom-valid))\n\norig_c_flags   = $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(KBUILD_SUBDIR_CCFLAGS) \\\n                 $(ccflags-y) $(CFLAGS_$(basetarget).o)\n_c_flags       = $(filter-out $(CFLAGS_REMOVE_$(basetarget).o), $(orig_c_flags) $(C_ONLY_FLAGS))\n_c++_flags     = $(filter-out $(CFLAGS_REMOVE_$(basetarget).o), $(orig_c_flags) $(C++_ONLY_FLAGS))\n_a_flags       = $(KBUILD_CPPFLAGS) $(KBUILD_AFLAGS) $(KBUILD_SUBDIR_ASFLAGS) \\\n                 $(asflags-y) $(AFLAGS_$(basetarget).o)\n_cpp_flags     = $(KBUILD_CPPFLAGS) $(cppflags-y) $(CPPFLAGS_$(@F))\n\n# If building the kernel in a separate objtree expand all occurrences\n# of -Idir to -I$(srctree)/dir except for absolute paths (starting with '/').\n\nifeq ($(KBUILD_SRC),)\n__c_flags\t= $(_c_flags)\n__c++_flags\t= $(_c++_flags)\n__a_flags\t= $(_a_flags)\n__cpp_flags     = $(_cpp_flags)\nelse\n\n# -I$(obj) locates generated .h files\n# $(call addtree,-I$(obj)) locates .h files in srctree, from generated .c files\n#   and locates generated .h files\n# FIXME: Replace both with specific CFLAGS* statements in the makefiles\n__c_flags\t= $(call addtree,-I$(obj)) $(call flags,_c_flags)\n__c++_flags\t= $(call addtree,-I$(obj)) $(call flags,_c++_flags)\n__a_flags\t=                          $(call flags,_a_flags)\n__cpp_flags\t=                          $(call flags,_cpp_flags)\nendif\n\nifeq ($(WIN_PLAT),y)\n# Not to include system header files in dependency files,\n# for there are space characters in system path by default.\ndepfile_flags  = -MMD -MP -MF $(depfile)\nelse\ndepfile_flags  = -MD -MP -MF $(depfile)\nendif\n\nc_flags        = $(depfile_flags) $(NOSTDINC_FLAGS) $(__c_flags)\n\nc++_flags      = $(depfile_flags) $(NOSTDINC_FLAGS) $(__c++_flags)\n\na_flags        = $(depfile_flags) $(NOSTDINC_FLAGS) $(__a_flags)\n\na_cpp_flags    = $(a_flags)\n\ncpp_flags      = $(depfile_flags) $(NOSTDINC_FLAGS) $(__cpp_flags)\n\nld_flags       = $(LDFLAGS) $(ldflags-y)\n\n# Useful for describing the dependency of composite objects\n# Usage:\n#   $(call multi_depend, multi_used_targets, suffix_to_remove, suffix_to_add)\ndefine multi_depend\n$(foreach m, $(notdir $1), \\\n\t$(eval $(obj)/$m: \\\n\t$(addprefix $(obj)/, $(foreach s, $3, $($(m:%$(strip $2)=%$(s)))))))\nendef\n\n# Commands useful for building a boot image\n# ===========================================================================\n#\n#\tUse as following:\n#\n#\ttarget: source(s) FORCE\n#\t\t$(if_changed,ld/objcopy/gzip)\n#\n#\tand add target to extra-y so that we know we have to\n#\tread in the saved command line\n\n# Linking\n# ---------------------------------------------------------------------------\n\nquiet_cmd_ld = LD      $@\ncmd_ld = $(LD) $(LDFLAGS) $(ldflags-y) $(LDFLAGS_$(@F)) \\\n\t       $(filter-out FORCE,$^) -o $@\n\n# Objcopy\n# ---------------------------------------------------------------------------\n\nquiet_cmd_objcopy = OBJCOPY $@\ncmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@\n\n"
  },
  {
    "path": "scripts/link/armca.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define __TTB_SIZE                  0x5000\n\n#define __HEAP_SIZE                 0x1000\n#define __STACK_SIZE                0x1000\n#define __FIQ_STACK_SIZE            0\n#define __IRQ_STACK_SIZE            0x1000\n#define __SVC_STACK_SIZE            0\n#define __ABT_STACK_SIZE            0\n#define __UND_STACK_SIZE            0\n\n/* TODO: Add FLASH_REGION_OFFSET if there are multiple levels of boot loaders */\n#if !defined(OTA_BOOT_SIZE) && defined(OTA_CODE_OFFSET)\n#define FLASH_REGION_BASE           (FLASH_BASE + OTA_CODE_OFFSET)\n#else\n#define FLASH_REGION_BASE           (FLASH_BASE)\n#endif\n\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE           (FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n\n#ifdef EXEC_IN_RAM\n#define EXEC_REGION                 RAM\n#elif defined(EXEC_IN_PSRAM)\n#define EXEC_REGION                 PSRAM\n#else\n#define EXEC_REGION                 PSRAMUHS\n#endif\n\n#define PSRAMUHSX_SECTION_SIZE      0x100000\n\nMEMORY\n{\n    BOOT        (rwx)   : ORIGIN = DSP_BOOT_BASE,           LENGTH = DSP_BOOT_SIZE\n    FLASH       (rx)    : ORIGIN = FLASH_REGION_BASE,       LENGTH = FLASH_REGION_SIZE\n    RAM         (rwx)   : ORIGIN = DSP_RAM_BASE,            LENGTH = DSP_RAM_SIZE - __TTB_SIZE\n    L_TTB       (rw)    : ORIGIN = DSP_RAM_BASE + DSP_RAM_SIZE - __TTB_SIZE,    LENGTH = __TTB_SIZE\n#ifdef PSRAM_BASE\n    PSRAM       (rwx)   : ORIGIN = PSRAM_BASE,              LENGTH = PSRAM_SIZE\n#endif\n#ifdef PSRAMUHS_BASE\n    PSRAMUHS    (rwx)   : ORIGIN = PSRAMUHS_BASE,           LENGTH = PSRAMUHS_SIZE - PSRAMUHSX_SECTION_SIZE\n    PSRAMUHSX   (rx)    : ORIGIN = PSRAMUHSX_BASE+PSRAMUHS_SIZE-PSRAMUHSX_SECTION_SIZE,         LENGTH = PSRAMUHSX_SECTION_SIZE\n#endif\n}\n\n/* Library configurations */\nGROUP(libgcc.a)\n\n#ifdef GEN_BOOT_SECTION\nENTRY(Vectors)\n#else\nENTRY(Reset_Handler)\n#endif\n\nSECTIONS\n{\n#ifdef GEN_BOOT_SECTION\n\n    .boot :\n    {\n        KEEP(*(.vectors))\n    } > BOOT\n\n    /DISCARD/ :\n    {\n        *(*)\n    }\n\n#else // !GEN_BOOT_SECTION\n\n    .boot_loader :\n    {\n        *(.boot_loader)\n        *(.boot_text_flash*)\n\n        . = ALIGN(4);\n    } > EXEC_REGION\n\n    .sram_text :\n    {\n        __sram_text_data_start__ = .;\n        /* memcpy.o or libc_nano.a(lib_a-memcpy.o/lib_a-memcpy-stub.o) */\n        *:memcpy.o(.text*)\n        *:lib_a-memcpy*.o(.text*)\n        *:libc_rom.o(.text*)\n\n        /* memset.o or libc_nano.a(lib_a-memset.o) */\n        *:memset.o(.text*)\n        *:lib_a-memset*.o(.text*)\n\n        *(.boot_text_sram*)\n        *(.sram_text*)\n        *(.fast_text_sram*)\n\n        . = ALIGN(4);\n    } > RAM AT > EXEC_REGION\n\n    __sram_text_data_start_load__ = LOADADDR(.sram_text);\n\n    .sram_data :\n    {\n        *(.boot_data*)\n        . = ALIGN(4);\n        *(.sram_data*)\n        . = ALIGN(4);\n    } > RAM AT > EXEC_REGION\n\n    __sram_text_data_end_load__ = LOADADDR(.sram_data) + SIZEOF(.sram_data);\n\n    .text :\n    {\n        *(SVC_TABLE)\n        *(.text*)\n        *(.flash_text*)\n\n        KEEP(*(.init))\n        KEEP(*(.fini))\n\n        /* .ctors */\n        *crtbegin.o(.ctors)\n        *crtbegin?.o(.ctors)\n        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n        *(SORT(.ctors.*))\n        *(.ctors)\n\n        /* .dtors */\n        *crtbegin.o(.dtors)\n        *crtbegin?.o(.dtors)\n        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n        *(SORT(.dtors.*))\n        *(.dtors)\n\n        . = ALIGN(4);\n\n        __rodata_start = .;\n        *(.rodata*)\n        *(.boot_rodata*)\n        __rodata_end = .;\n\n        . = ALIGN(4);\n\n        KEEP(*(.eh_frame*))\n        KEEP(*(.build_info))\n\n        *(.note.gnu.build-id)\n\n        . = ALIGN(4);\n    } > EXEC_REGION\n\n    .ARM.extab :\n    {\n        *(.ARM.extab* .gnu.linkonce.armextab.*)\n    } > EXEC_REGION\n\n    __exidx_start = .;\n    .ARM.exidx :\n    {\n        *(.ARM.exidx* .gnu.linkonce.armexidx.*)\n    } > EXEC_REGION\n    __exidx_end = .;\n\n    .copy.table :\n    {\n        . = ALIGN(4);\n        __copy_table_start__ = .;\n        LONG (__etext)\n        LONG (__data_start__)\n        LONG (__data_end__ - __data_start__)\n        __copy_table_end__ = .;\n    } > EXEC_REGION\n\n    .zero.table :\n    {\n        . = ALIGN(4);\n        __zero_table_start__ = .;\n        LONG (__bss_start__)\n        LONG (__bss_end__ - __bss_start__)\n        __zero_table_end__ = .;\n    } > EXEC_REGION\n\n    __etext = .;\n\n    .data :\n    {\n        Image$$RW_DATA$$Base = .;\n        __data_start__ = .;\n        *(.data*)\n        Image$$RW_DATA$$Limit = .;\n\n        . = ALIGN(4);\n        /* preinit data */\n        PROVIDE (__preinit_array_start = .);\n        KEEP(*(.preinit_array))\n        PROVIDE (__preinit_array_end = .);\n\n        . = ALIGN(4);\n        /* init data */\n        PROVIDE (__init_array_start = .);\n        KEEP(*(SORT(.init_array.*)))\n        KEEP(*(.init_array))\n        PROVIDE (__init_array_end = .);\n\n\n        . = ALIGN(4);\n        /* finit data */\n        PROVIDE (__fini_array_start = .);\n        KEEP(*(SORT(.fini_array.*)))\n        KEEP(*(.fini_array))\n        PROVIDE (__fini_array_end = .);\n\n        . = ALIGN(4);\n        /* All data end */\n        __data_end__ = .;\n\n    } > EXEC_REGION\n\n    .sram_bss (NOLOAD) : AT (ADDR(.sram_bss))\n    {\n        __sram_bss_start__ = .;\n        *(.boot_bss*)\n        . = ALIGN(4);\n        *(.sram_bss*)\n        . = ALIGN(4);\n        __sram_bss_end__ = .;\n    } > RAM\n\n#ifndef EXEC_IN_RAM\n    __ram_end = .;\n#endif\n\n    .bss ALIGN(0x400) (NOLOAD) :\n    {\n        Image$$ZI_DATA$$Base = .;\n        __bss_start__ = .;\n        *(.bss*)\n        *(COMMON)\n        __bss_end__ = .;\n        Image$$ZI_DATA$$Limit = .;\n        __end__ = .;\n        end = __end__;\n    } > EXEC_REGION\n\n#if defined(__HEAP_SIZE) && (__HEAP_SIZE > 0)\n    .heap (NOLOAD) :\n    {\n        . = ALIGN(8);\n        Image$$HEAP$$ZI$$Base = .;\n        . += __HEAP_SIZE;\n        Image$$HEAP$$ZI$$Limit = .;\n        __HeapLimit = .;\n    } > EXEC_REGION\n#endif\n\n    .sync_flags ALIGN(0x1000) (NOLOAD) :\n    {\n        __sync_flags_start = .;\n        *(.sync_flags*)\n        . = ALIGN(0x1000);\n        __sync_flags_end = .;\n    } > EXEC_REGION\n\n#ifdef EXEC_IN_RAM\n    __ram_end = .;\n#else\n    __free_exec_region = ORIGIN(EXEC_REGION) + LENGTH(EXEC_REGION) - .;\n#endif\n\n    __psramuhs_text_data_start_load__ = LOADADDR(.data) + SIZEOF(.data);\n    .psramuhs_text (ORIGIN(PSRAMUHSX)) : AT (__psramuhs_text_data_start_load__)\n    {\n        __psramuhs_text_start = PSRAMUHSX_TO_PSRAMUHS(.);\n        *(.psramuhs_text*)\n        . = ALIGN(4);\n        __psramuhs_text_end = PSRAMUHSX_TO_PSRAMUHS(.);\n    } > PSRAMUHSX\n    __psramuhs_text_data_end_load__ = __psramuhs_text_data_start_load__ + SIZEOF(.psramuhs_text);\n\n    /* The following section MUST be the last loaded section */\n    .code_start_addr : AT (__psramuhs_text_data_end_load__)\n    {\n        LONG(ADDR(.boot_loader));\n    } > EXEC_REGION\n\n    .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __FIQ_STACK_SIZE - __IRQ_STACK_SIZE - __SVC_STACK_SIZE - __ABT_STACK_SIZE - __UND_STACK_SIZE) (NOLOAD) : AT (ADDR(.stack))\n    {\n        . = ALIGN(8);\n\n        __StackTop = .;\n        Image$$SYS_STACK$$ZI$$Base = .;\n        . += __STACK_SIZE;\n        Image$$SYS_STACK$$ZI$$Limit = .;\n        __stack = .;\n\n        Image$$FIQ_STACK$$ZI$$Base = .;\n        . += __FIQ_STACK_SIZE;\n        Image$$FIQ_STACK$$ZI$$Limit = .;\n\n        Image$$IRQ_STACK$$ZI$$Base = .;\n        . += __IRQ_STACK_SIZE;\n        Image$$IRQ_STACK$$ZI$$Limit = .;\n\n        Image$$SVC_STACK$$ZI$$Base = .;\n        . += __SVC_STACK_SIZE;\n        Image$$SVC_STACK$$ZI$$Limit = .;\n\n        Image$$ABT_STACK$$ZI$$Base = .;\n        . += __ABT_STACK_SIZE;\n        Image$$ABT_STACK$$ZI$$Limit = .;\n\n        Image$$UND_STACK$$ZI$$Base = .;\n        . += __UND_STACK_SIZE;\n        Image$$UND_STACK$$ZI$$Limit = .;\n    } > RAM\n\n    __free_ram = ADDR(.stack) - __ram_end;\n#ifdef EXEC_IN_RAM\n    __free_exec_region = __free_ram;\n#endif\n\n    .ttb_l2 (NOLOAD) :\n    {\n        Image$$TTB$$ZI$$Base = .;\n        *(.ttb_l2)\n    } > L_TTB\n\n    .ttb_l1 (NOLOAD) :\n    {\n        *(.ttb_l1)\n        Image$$TTB$$ZI$$Limit = .;\n    } > L_TTB\n\n    __free_ttb = ORIGIN(L_TTB) + LENGTH(L_TTB) - .;\n\n#endif // !GEN_BOOT_SECTION\n}\n\n"
  },
  {
    "path": "scripts/link/best1000.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#ifdef RB_CODEC\n#define HEAP_SECTION_SIZE\t\t\t0x1000\n#else\n#define HEAP_SECTION_SIZE\t\t\t0x1000\n#endif\n\n#define STACK_SECTION_SIZE\t\t\t0x1000\n#define CP_STACK_SECTION_SIZE\t\t0x1000\n\n#if defined(ROM_UTILS_ON)\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n#define ROM_UTILS_RESV_RAM_SIZE     0x64\n#else\n#define ROM_UTILS_RESV_RAM_SIZE     0x0\n#endif\n#endif\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n#define OVERLAY_DATA_SECTION_SIZE\t0x10000\n#elif defined(RB_CODEC)\n#define OVERLAY_DATA_SECTION_SIZE\t0xA000\n#else\n#define OVERLAY_DATA_SECTION_SIZE\t0x8000\n#endif\n\n#if !defined(FAST_XRAM_SECTION_SIZE)\n#if (RAM_SIZE >= 0x48000)\n#define RTOS_IN_RAM\n#if defined(BTUSB_AUDIO_MODE)\n#define FAST_XRAM_SECTION_SIZE\t\t0x20000\n#elif (defined(CHIP_BEST1402) && defined(SPEECH_TX_2MIC_NS2))\n#define FAST_XRAM_SECTION_SIZE\t\t0xF800\n#else\n#define FAST_XRAM_SECTION_SIZE\t\t0x16000\n#endif\n#elif (RAM_SIZE >= 0x40000)\n#if defined(CHIP_BEST1402) || defined(CHIP_BEST1400)\n#define FAST_XRAM_SECTION_SIZE\t\t0x5200\n#else\n#define FAST_XRAM_SECTION_SIZE\t\t0x3800\n#endif\n#else\n#define FAST_XRAM_SECTION_SIZE\t\t0x6000\n#endif\n#endif\n\n/* TODO: Add FLASH_REGION_OFFSET if there are multiple levels of boot loaders */\n#if !defined(OTA_BOOT_SIZE) && defined(OTA_CODE_OFFSET)\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE + OTA_CODE_OFFSET)\n#else\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE)\n#endif\n\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE\t\t\t(FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n\n#define FLASH_NC_REGION_BASE\t\tFLASH_C_TO_NC(FLASH_REGION_BASE)\n#define FLASHX_REGION_BASE\t\t\tFLASH_TO_FLASHX(FLASH_REGION_BASE)\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n#define OVERLAY_FOR_CP\n#endif\n\n#ifdef OVERLAY_FOR_CP\n#define REGION_OVERLAY_TEXT\t\t\tRAMCPX\n#define REGION_OVERLAY_DATA\t\t\tRAMCP\n#else\n#define REGION_OVERLAY_TEXT\t\t\tFRAMX\n#define REGION_OVERLAY_DATA\t\t\tRAM\n#endif\n\n/* Linker script to configure memory regions. */\n/* See plat_addr_map.h and common.mk for the macro definitions */\nMEMORY\n{\n\tROM\t\t\t(rx)\t: ORIGIN = ROM_BASE,\t\t\t\tLENGTH = ROM_SIZE\n\tFLASH \t\t(r)\t\t: ORIGIN = FLASH_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tFLASH_NC\t(r)\t\t: ORIGIN = FLASH_NC_REGION_BASE,\tLENGTH = FLASH_REGION_SIZE\n\tFLASHX\t\t(rx)\t: ORIGIN = FLASHX_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tRAM\t\t\t(rwx)\t: ORIGIN = RAM_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tRAMX\t\t(rx)\t: ORIGIN = RAMX_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tFRAMX\t\t(rwx)\t: ORIGIN = RAMX_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE,\tLENGTH = FAST_XRAM_SECTION_SIZE\n#ifdef PSRAM_BASE\n\tPSRAM \t\t(rwx)\t: ORIGIN = PSRAM_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAM_NC\t(rwx)\t: ORIGIN = PSRAM_NC_BASE,\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAMX\t\t(rx)\t: ORIGIN = PSRAMX_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n#endif\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\tRAMCP \t\t(rwx)\t: ORIGIN = RAMCP_BASE,\t\t\t\tLENGTH = RAMCP_SIZE\n\tRAMCPX \t\t(rwx)\t: ORIGIN = RAMCPX_BASE,\t\t\t\tLENGTH = RAMCPX_SIZE\n#endif\n}\n\n/* Library configurations */\nGROUP(libgcc.a libc.a libm.a libnosys.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions FLASH and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exidx_start\n *   __exidx_end\n *   __copy_table_start__\n *   __copy_table_end__\n *   __zero_table_start__\n *   __zero_table_end__\n *   __etext\n *   __data_start__\n *   __preinit_array_start\n *   __preinit_array_end\n *   __init_array_start\n *   __init_array_end\n *   __fini_array_start\n *   __fini_array_end\n *   __data_end__\n *   __bss_start__\n *   __bss_end__\n *   __end__\n *   end\n *   __HeapLimit\n *   __StackLimit\n *   __StackTop\n *   __stack\n *   __free_ram\n *   __factory_start\n *   __factory_end\n *   __calib_start\n *   __calib_end\n *   __flash_start\n *   __flash_end\n *   __free_flash\n *   __boot_sram_start_flash__\n *   __boot_sram_end_flash__\n *   __boot_sram_start__\n *   __boot_bss_sram_start__\n *   __boot_bss_sram_end__\n *   __sram_text_data_start_flash__\n *   __sram_text_data_end_flash__\n *   __fast_sram_text_data_start__\n *   __fast_sram_text_data_end__\n *   __fast_sram_text_data_start_flash__\n *   __fast_sram_text_data_end_flash__\n *   __sram_text_data_start__\n *   __sram_bss_start__\n *   __sram_bss_end__\n *   __overlay_text_start__\n *   __overlay_text_exec_start__\n *   __overlay_data_start__\n */\nENTRY(Boot_Loader)\n\nSECTIONS\n{\n\t__export_fn_rom = (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE);\n\n\t.boot_struct (ORIGIN(FLASH)) :\n\t{\n\t\t__flash_start = .;\n\t\tKEEP(*(.boot_struct))\n\t\t. = ALIGN(4);\n\t} > FLASH\n\n\t. = FLASH_TO_FLASHX(.);\n\n\t.boot_text_flash (.) : AT (FLASHX_TO_FLASH(ADDR(.boot_text_flash)))\n\t{\n\t\t*(.boot_loader)\n\t\t*(.boot_text_flash*)\n\t\t*(.boot_rodata_flash*)\n\t\t. = ALIGN(4);\n\t} > FLASHX\n\n#if defined(__BES_OTA_MODE__)\n\t.ota_boot_info (ALIGN(4096)) :\n\t{\n\t\t*(.ota_boot_info)\n\t\t. = (0x1000);\n\t} > FLASHX\n\n\t.ota_boot_rev (ALIGN(4096)) :\n\t{\n\t\t*(.ota_boot_rev)\n\t\t. = (0x1000);\n\t} > FLASHX\n#endif\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.got_info (.) :\n\t{\n\t\t__got_info_start = .;\n\t\t__got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__got_end = .;\n\t\t__got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__got_info_end = .;\n\t} > FLASH\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.userdata_pool (.) (NOLOAD) :\n\t{\n\t\t*(.userdata_pool)\n\t\t. = ALIGN(4);\n\t\t__userdata_pool_end__ = .;\n\t} > RAM\n\n\t__boot_sram_start_flash__ = LOADADDR(.got_info) + SIZEOF(.got_info);\n\t__boot_sram_start__ = __userdata_pool_end__;\n\n\t.boot_text_sram (RAM_TO_RAMX(__boot_sram_start__)) : AT (__boot_sram_start_flash__)\n\t{\n\t\t/* memcpy.o or libc_nano.a(lib_a-memcpy.o/lib_a-memcpy-stub.o) */\n\t\t*:memcpy.o(.text*)\n\t\t*:lib_a-memcpy*.o(.text*)\n\t\t*:libc_rom.o(.text*)\n\n\t\t/* memset.o or libc_nano.a(lib_a-memset.o) */\n\t\t*:memset.o(.text*)\n\t\t*:lib_a-memset*.o(.text*)\n\n\t\t*:hal_norflash*.o(.text*)\n\t\t*:norflash_*.o(EXCLUDE_FILE(*:norflash_api.o) .text*)\n\n#ifdef BOOT_CODE_IN_RAM\n\t\t*:hal_cmu_*.o(.text*)\n\t\t*:hal_iomux_*.o(.text*)\n\t\t*:hal_analogif_*.o(.text*)\n\t\t*:hal_spi.o(.text*)\n\t\t*:hal_timer.o(.text*)\n\t\t*:hal_sysfreq.o(.text*)\n#endif\n\n\t\t*(.boot_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__boot_text_sram_end = .;\n\t} > RAMX\n\n\t.boot_data_sram (RAMX_TO_RAM(ADDR(.boot_text_sram) + SIZEOF(.boot_text_sram))) :\n\t\t\t\t\tAT (__boot_sram_start_flash__ + SIZEOF(.boot_text_sram))\n\t{\n\t\t*:hal_norflash*.o(.data* .rodata*)\n\t\t*:norflash_*.o(EXCLUDE_FILE(*:norflash_api.o) .data* EXCLUDE_FILE(*:norflash_api.o) .rodata*)\n\t\t*:hal_psram.o(.data* .rodata*)\n\t\t*:libc_rom.o(.rodata*)\n\n\t\t*(.boot_rodata_sram*)\n\t\t*(.boot_data*)\n\t\t. = ALIGN(4);\n\t\t__boot_data_sram_end = .;\n\t} > RAM\n\n\t__boot_sram_end_flash__ = __boot_sram_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.boot_text_sram) + SIZEOF(.boot_data_sram);\n\n\t.boot_bss_sram (.) (NOLOAD) : AT (ADDR(.boot_bss_sram))\n\t{\n\t\t__boot_bss_sram_start__ = .;\n\t\t*:hal_norflash*.o(.bss*)\n\t\t*:norflash_*.o(EXCLUDE_FILE(*:norflash_api.o) .bss*)\n\t\t*:hal_psram.o(.bss*)\n\t\t*(.boot_bss*)\n\t\t. = ALIGN(32);\n\t\t__boot_bss_sram_end__ = .;\n\t} > RAM\n\n\t__sram_text_data_start_flash__ = __boot_sram_end_flash__;\n\t__sram_text_data_start__ = __boot_bss_sram_end__;\n\n\t.sram_text (RAM_TO_RAMX(__sram_text_data_start__)) : AT (__sram_text_data_start_flash__)\n\t{\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t\t*:hal_memsc.o(.text*)\n\t\t*:hal_trace.o(.text*)\n\t\t*:hal_trace_mod.o(.text*)\n\t\t*:mpu_armv*.o(.text*)\n\t\t*:codec_sbc.o(.text*)\n\t\t*:multi_heap.o(.text*)\n\t\t*:pool_api.o(.text*)\n\t\t*libgcc.a:(.text*)\n\n\t\t/* for LIBC_ROM=0 */\n\t\t*libc_nano.a:(.text*)\n\n\t\t/* for SCO_CP_ACCEL=1 */\n\t\t*:cmsis_dsp_lib.o(.text*)\n\t\t*libm.a:(.text*)\n#endif\n\n#ifdef KWS_IN_RAM\n\t\t*:kws_lib.o(.text*)\n#endif\n\n#if defined(GSOUND_HOTWORD_EXTERNAL)\n\t\t*:voice_sbc.o(.text*)\n\t\t*:gsound_custom_audio.o(.text*)\n\t\t*:gsound_custom_hotword_external.o(.text*)\n\t\t*:libspeech*.o(.text*)\n#endif\n\n\t\t*:norflash_api.o(.text*)\n\t\t*(.sram_text*)\n\t\t/*\n\t\t   If you want protect one section by armv8's mpu, the section should\n\t\t   be aligned to 32bytes\n\t\t */\n\t\t. = ALIGN(32);\n\t\t__sram_text_end__ = .;\n\t} > RAMX\n\n\t.sram_data (RAMX_TO_RAM(ADDR(.sram_text) + SIZEOF(.sram_text))) :\n\t\t\t\tAT (__sram_text_data_start_flash__ + SIZEOF(.sram_text))\n\t{\n#ifdef RTOS_IN_RAM\n\t\t*:rtos_lib.o(.data* .rodata*)\n#endif\n\n#if defined(GLOBAL_SRAM_KISS_FFT)\n\t\t*:fftwrap.o(.data* .rodata*)\n\t\t*:kiss_fft.o(.data* .rodata*)\n\t\t*:kiss_fftr.o(.data* .rodata*)\n#endif\n\n#if defined(GLOBAL_SRAM_CMSIS_FFT) || defined(AI_CAPTURE_DATA_AEC)\n\t\t*:CommonTables.o(.rodata.armBitRevIndexTable256)\n\t\t*:CommonTables.o(.rodata.twiddleCoef_256)\n\t\t*:CommonTables.o(.rodata.twiddleCoef_rfft_512)\n\t\t*:CommonTables.o(.rodata.armBitRevIndexTable128)\n\t\t*:CommonTables.o(.rodata.twiddleCoef_128)\n\t\t*:CommonTables.o(.rodata.twiddleCoef_rfft_256)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_usb.o(.rodata*)\n#endif\n\n#if defined(SCO_CP_ACCEL)\n\t\t*:plc_8000.o(.data* .rodata*)\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t*:Pcm8k_Cvsd.o(.data* .rodata* .bss*)\n#endif\n#if defined(HFP_1_6_ENABLE)\n\t\t*:table.o(.data* .rodata*)\n\t\t*:plc_16000.o(.data* .rodata*)\n#endif\n\t\t/* Move algos from overlay to here */\n#endif\n\n\t\t*:utils.o(.data* .rodata*)\n\t\t*:cqueue.o(.data* .rodata*)\n\t\t*:iir_process.o(.data* .rodata*)\n#if defined(HFP_1_6_ENABLE)\n\t\t*:sbcplc.o(.data* .rodata*)\n\t\t*:sbc.o(.data* .rodata*)\n\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n\t\t*:crossover_filter.o(.data* .rodata*)\n\t\t*:exp_func_tables.o(.data* .rodata*)\n#if defined(KWS_BES)\n\t\t*:cnn.o(.data* .rodata.second_conv_wt)\n\t\t*:command_recognition.o(.data* .rodata*)\n\t\t*:arm_bitreversal_16.o(.data* .rodata*)\n\t\t*:arm_cfft_radix8_f32.o(.data* .rodata*)\n\t\t*:arm_bitreversal2.o(.data* .rodata*)\n\t\t*:arm_mult_f32.o(.data* .rodata*)\n\t\t*:arm_cmplx_mag_squared_f32.o(.data* .rodata*)\n\t\t*:arm_cmplx_mult_cmplx_f32.o(.data* .rodata*)\n\t\t*:arm_abs_f32.o(.data* .rodata*)\n\t\t*:arm_cos_f32.o(.data* .rodata*)\n\t\t*:arm_sin_f32.o(.data* .rodata*)\n\t\t*:nsx_core.o(.data* .rodata*)\n#endif\n\n#if defined(__BESNNDenoise__)\n\t\t*:denoise_10ms.o(.data* .rodata*)\n\t\t*:denoise_20ms.o(.data* .rodata*)\n#endif\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t\t*:hal_memsc.o(.rodata*)\n\t\t*:hal_trace.o(.rodata*)\n\t\t*:hal_trace_mod.o(.rodata*)\n\t\t*:mpu.o(.rodata*)\n\t\t*:multi_heap.o(.rodata*)\n\t\t*:pool_api.o(.rodata*)\n\t\t*:a2dp_decoder_cp.o(.rodata*)\n\t\t*libgcc.a:(.rodata*)\n\n\t\t/* for LIBC_ROM=0 */\n\t\t*libc_nano.a:(.rodata*)\n\n\t\t/* for SCO_CP_ACCEL=1 */\n\t\t*:cmsis_dsp_lib.o(.rodata*)\n\t\t*libm.a:(.rodata*)\n#endif\n\n#if defined(GSOUND_HOTWORD_EXTERNAL)\n\t\t*:voice_sbc.o(.data* .rodata*)\n\t\t*:gsound_custom_audio.o(.data* .rodata*)\n\t\t*:gsound_custom_hotword_external.o(.data* .rodata*)\n\t\t*:libspeech*.o(.data* .rodata*)\n#endif\n\n\t\t*:norflash_api.o(.rodata*)\n\t\t*(.sram_data*)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__sram_text_data_end_flash__ = __sram_text_data_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.sram_text) + SIZEOF(.sram_data);\n\n\t.sram_bss (.) (NOLOAD) : AT (ADDR(.sram_bss))\n\t{\n\t\t__sram_bss_start__ = .;\n\t\t*:utils.o(.bss*)\n\t\t*(.sram_bss*)\n\t\t. = ALIGN(4);\n\t\t__sram_bss_end__ = .;\n\t} > RAM\n\n\t__fast_sram_text_data_start_flash__ = __sram_text_data_end_flash__;\n\n\t.fast_text_sram (ORIGIN(FRAMX)) : AT (__fast_sram_text_data_start_flash__)\n\t{\n\t\t__fast_sram_text_exec_start__ = .;\n\n#ifdef RTOS_IN_RAM\n\t\t*:rtos_lib.o(.text*)\n#endif\n\n#if defined(GLOBAL_SRAM_KISS_FFT)\n\t\t*:fftwrap.o(.text*)\n\t\t*:kiss_fft.o(.text*)\n\t\t*:kiss_fftr.o(.text*)\n#endif\n\n#if defined(GLOBAL_SRAM_CMSIS_FFT) || defined(AI_CAPTURE_DATA_AEC)\n\t\t*:cmsis_fftwrap.o(.text*)\n\t\t*:arm_rfft_fast_f32.o(.text*)\n\t\t*:arm_cfft_f32.o(.text*)\n#endif\n\n#if defined(SCO_CP_ACCEL)\n\t\t*:frame_resize.o(.text*)\n\t\t*:buffer_manager.o(.text*)\n\t\t*:plc_8000.o(.text*)\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t*:Pcm8k_Cvsd.o(.text*)\n#endif\n#if defined(HFP_1_6_ENABLE)\n\t\t*:dspfns.o(.text*)\n\t\t*:lpc_plc.o(.text*)\n\t\t*:plc_16000.o(.text*)\n\t\t*:sbc_filter.o(.text*)\n#endif\n/* Move algos from overlay to here */\n\n#endif\n\n#if defined(ROM_UTILS_ON)\n\t\t*:rom_utils.o(.text*)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_dma.o(.text*)\n\t\t*:hal_uart.o(.text*)\n\t\t*:hal_trace.o(.text*)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_usb.o(.text*)\n\n\t\t*:usb_audio.o(.text*)\n\t\t*:usb_audio_sync.o(.text*)\n\t\t*:usb_audio_cdc.o(.text*)\n\n\t\t*:usbaudio_entry.o(.text*)\n\t\t*:usb_audio_app.o(.text*)\n#endif\n\n\t\t/* memmove.o or libc_nano.a(lib_a-memmove.o) */\n\t\t*:memmove.o(.text*)\n\t\t*:lib_a-memmove.o(.text*)\n\t\t*:utils.o(.text*)\n\t\t*:cqueue.o(.text*)\n\t\t*:audio_resample_ex.o(.text*)\n#if defined(MIX_MIC_DURING_MUSIC)\n\t\t*:app_bt_stream.o(.text*)\n#endif\n#if defined(HFP_1_6_ENABLE)\n#if defined(__SBC_FUNC_IN_ROM__) || (defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0))\n\t\t*:sbc.o(.text*)\n#else\n\t\t*:sbc.o(.text*.sbc_is_stream_info_valid)\n\t\t*:sbc.o(.text*.sbc_frame_length_get)\n\t\t*:sbc.o(.text*.sbc_4bit_crc_calc)\n\t\t*:sbc.o(.text*.sbc_bits_for_mono_alloc)\n\t\t*:sbc.o(.text*.sbc_bits_for_stereo_alloc)\n\t\t*:sbc.o(.text*.sbc_header_process)\n\t\t*:sbc.o(.text*.sbc_factors_process)\n\t\t*:sbc.o(.text*.sbc_sample_extract)\n\t\t*:sbc.o(.text*.sbc_sbsamples_make)\n\t\t*:sbc.o(.text*.sbc_joint_process)\n\t\t*:sbc.o(.text*.sbc_4band_synth_filter)\n\t\t*:sbc.o(.text*.sbc_8band_synth_filter)\n\t\t*:sbc.o(.text*.sbc_decoder_state_reset)\n\t\t*:sbc.o(.text*.sbc_frame_mute)\n\t\t*:sbc.o(.text*.sbc_frames_decode)\n\t\t*:sbc.o(.text*.sbc_samples_quant)\n\t\t*:sbc.o(.text*.sbc_decoder_init)\n\t\t*:sbc.o(.text*.sbc_encoder_init)\n\t\t*:sbc.o(.text*.sbc_frames_encode)\n#endif\n\t\t*:sbc_math.o(.text*)\n#endif\n#if defined(A2DP_AAC_ON)\n\t\t*:fixpoint_math.o(.text*)\n\t\t*:FDK_bitbuffer.o(.text*)\n\t\t*:FDK_tools_rom.o(.text*FDKgetWindowSlope*)\n\t\t*:FDK_tools_rom.o(.text*getBitstreamElementList*)\n\t\t*:dct.o(.text*dct_IV*)\n#if !defined(__SBC_FUNC_IN_ROM_VBEST2000__)\n\t\t*:fft.o(.text*._Z3fftiPlPi)\n\t\t*:fft_rad2.o(.text*dit_fft*)\n\t\t*:dct.o(.text*getTables*)\n#endif\n#if defined(OPUS_IN_OVERLAY)\n\t\t*:voice_opus.o(.text*)\n#elif defined(VOICE_DATAPATH) || defined(__ALEXA_WWE) || defined(__KWS_ALEXA__)\n\t\t*:opus_encoder.o(.text*)\n#elif defined(__AI_VOICE__) && (RAM_SIZE >= 0x48000)\n\t\t*:voice_opus.o(.text*)\n\t\t/**:opus_encoder.o(.text*)*/\n\t\t*:opus_encoder.o(.text*.frame_size_select)\n\t\t*:opus_encoder.o(.text*.opus_encode_native)\n\t\t*:opus_encoder.o(.text*.user_bitrate_to_bitrate)\n\t\t*:opus_encoder.o(.text*.compute_equiv_rate)\n\t\t*:opus_encoder.o(.text*.decide_fec)\n\t\t*:opus_encoder.o(.text*.dc_reject)\n\t\t*:opus_encoder.o(.text*.gen_toc)\n\t\t*:opus_encoder.o(.text*.opus_encode)\n\t\t*:opus_encoder.o(.text*.opus_encoder_create)\n\t\t*:opus_encoder.o(.text*.opus_encoder_get_size)\n\t\t*:opus_encoder.o(.text*.opus_encoder_init)\n\t\t*:opus_encoder.o(.text*.opus_encoder_ctl)\n\t\t*:analysis.o(.text*)\n\t\t/**:celt_encoder.o(.text*)*/\n\t\t*:celt_encoder.o(.text*.opus_custom_encoder_ctl)\n\t\t*:celt_encoder.o(.text*.celt_encoder_get_size)\n\t\t*:celt_encoder.o(.text*.opus_custom_encoder_get_size)\n\t\t*:celt_encoder.o(.text*.celt_encoder_init)\n\t\t*:celt_encoder.o(.text*.opus_custom_encoder_init_arch)\n\t\t/**:repacketizer.o(.text*)*/\n\t\t*:repacketizer.o(.text*.opus_packet_pad)\n\t\t*:repacketizer.o(.text*.opus_repacketizer_init)\n\t\t*:repacketizer.o(.text*.opus_repacketizer_cat)\n\t\t*:repacketizer.o(.text*.opus_repacketizer_cat_impl)\n\t\t*:repacketizer.o(.text*.opus_repacketizer_out_range_impl)\n\t\t*:opus.o(.text*)\n\t\t*:enc_API.o(.text*)\n\t\t/**:entenc.o(.text*)*/\n\t\t*:entenc.o(.text*.ec_enc_init)\n\t\t*:entenc.o(.text*.ec_enc_icdf)\n\t\t*:entenc.o(.text*.ec_enc_normalize)\n\t\t*:entenc.o(.text*.ec_enc_carry_out)\n\t\t*:entenc.o(.text*.ec_write_byte)\n\t\t*:entenc.o(.text*.ec_enc_patch_initial_bits)\n\t\t*:entenc.o(.text*.ec_enc_done)\n\t\t*:control_audio_bandwidth.o(.text*)\n\t\t*:encode_pulses.o(.text*)\n\t\t*:LPC_analysis_filter.o(.text*)\n\t\t*:burg_modified_FIX.o(.text*.silk_burg_modified_c)\n\t\t*:vector_ops_FIX.o(.text*.silk_scale_copy_vector16)\n\t\t*:vector_ops_FIX.o(.text*.silk_inner_prod_aligned)\n\t\t*:vector_ops_FIX.o(.text*.silk_inner_prod16_aligned_64_c)\n\t\t*:NLSF_del_dec_quant.o(.text*.silk_NLSF_del_dec_quant)\n\t\t*:encode_frame_FIX.o(.text*.silk_encode_frame_FIX)\n\t\t*:encode_frame_FIX.o(.text*.silk_encode_do_VAD_FIX)\n\t\t*:encode_frame_FIX.o(.text*.silk_LBRR_encode_FIX)\n\t\t/**:pitch.o(.text*)*/\n\t\t*:pitch.o(.text*.celt_pitch_xcorr_c)\n\t\t*:resampler.o(.text*)\n\t\t*:VAD.o(.text*)\n\t\t*:encode_indices.o(.text*)\n\t\t/**:control_codec.o(.text*)*/\n\t\t*:control_codec.o(.text*.silk_control_encoder)\n\t\t*:control_codec.o(.text*.silk_setup_resamplers)\n\t\t*:control_codec.o(.text*.silk_setup_fs)\n\t\t*:control_codec.o(.text*.silk_setup_complexity)\n\t\t*:control_codec.o(.text*.silk_setup_LBRR)\n\t\t/**:celt_lpc.o(.text*)*/\n\t\t*:celt_lpc.o(.text*._celt_autocorr)\n\t\t/**:shell_coder.o(.text*)*/\n\t\t*:shell_coder.o(.text*.combine_pulses)\n\t\t*:shell_coder.o(.text*.silk_shell_encoder)\n\t\t*:shell_coder.o(.text*.encode_split)\n\t\t*:init_encoder.o(.text*)\n\t\t*:log2lin.o(.text*)\n\t\t*:biquad_alt.o(.text*)\n\t\t*:stereo_encode_pred.o(.text*)\n\t\t*:NLSF_unpack.o(.text*)\n\t\t*:code_signs.o(.text*)\n\t\t*:lin2log.o(.text*)\n\t\t*:HP_variable_cutoff.o(.text*)\n\t\t*:sum_sqr_shift.o(.text*)\n\t\t*:inner_prod_aligned.o(.text*)\n\t\t*:stereo_quant_pred.o(.text*)\n\t\t*:entcode.o(.text*)\n\t\t*:celt.o(.text*)\n\t\t*:laplace.o(.text*)\n\t\t/**:NSQ.o(.text*)*/ /*complexity 1*/\n\t\t/**:NSQ_del_dec.o(.text*)*/ /*complexity 2*/\n#endif\n#endif\n\n#if defined(AI_CAPTURE_DATA_AEC)\n\t\t*:coherence.o(.text*)\n\t\t*:echo_canceller.o(.text*)\n\t\t*:echo_suppression.o(.text*)\n\t\t*:lcmmse.o(.text*)\n\t\t*:logmmse.o(.text*)\n\t\t*:mdf2.o(.text*)\n\t\t*:noise_generator.o(.text*)\n\t\t*:pink_noise_gen.o(.text*)\n\t\t*:white_noise_gen.o(.text*)\n#endif\n\n#if defined(__AUDIO_SPECTRUM__)\n\t\t*:spectrum_fix.o(.text*)\n\t\t*:audio_spectrum.o(.text*)\n#endif\n#if defined(A2DP_SCALABLE_ON) && defined(A2DP_AAC_ON)\n\t\t*:mdct.o(.text*)\n#endif\n\t\t*:crossover_filter.o(.text*)\n\t\t*:data_compressor.o(.text*)\n\t\t*:drc.o(.text*)\n\t\t*:limiter.o(.text*)\n\t\t*:iir_process.o(.text*.iir_run .text*.*iir_run_per_*)\n\n#if defined(KWS_BES)\n\t\t*:arm_*.o(.text*)\n\t\t*:mfcc.o(.text*)\n\t\t*:cnn.o(.text*)\n#ifndef __KWS_TIANMAO__\n\t\t*:command_recognition.o(.text*)\n#endif\n\t\t*:arm_radix8_butterfly_f32.o(.text*)\n\t\t*:arm_bitreversal_32.o(.text*)\n\t\t*:arm_bitreversal_16.o(.text*)\n\t\t*:dct.o(.text*dct_IV*)\n\t\t*:fft.o(.text*._Z3fftiPlPi)\n\t\t*:fft_rad2.o(.text*dit_fft*)\n\t\t*:dct.o(.text*getTables*)\n\t\t*:arm_cfft_radix8_f32.o(.text*)\n\t\t*:arm_bitreversal2.o(.text*)\n\t\t*:arm_mult_f32.o(.text*)\n\t\t*:arm_cmplx_mag_squared_f32.o(.text*)\n\t\t*:arm_cmplx_mult_cmplx_f32.o(.text*)\n\t\t*:lib_a-wf_sqrt.o(.text*)\n\t\t*:arm_abs_f32.o(.text*)\n\t\t*:arm_cos_f32.o(.text*)\n\t\t*:arm_sin_f32.o(.text*)\n\n\t\t*:coherence.o(.text*)\n\t\t*:echo_canceller.o(.text*)\n\t\t*:echo_suppression.o(.text*)\n\t\t*:lcmmse.o(.text*)\n\t\t*:logmmse.o(.text*)\n\t\t*:mdf2.o(.text*)\n\t\t*:noise_generator.o(.text*)\n\t\t*:pink_noise_gen.o(.text*)\n\t\t*:white_noise_gen.o(.text*)\n\n\t\t*:ae_common.o(.text*)\n\t\t*:ae_rand.o(.text*)\n\t\t*:fastmath.o(.text*)\n\t\t*:integer_delay.o(.text*)\n\t\t*:iirfilt.o(.text*)\n\t\t*:ringbuf.o(.text*)\n\t\t*:scale_int16.o(.text*)\n\t\t*:speech_conv.o(.text*)\n\t\t*:speech_trans_buf.o(.text*)\n\n\t\t*:ns3.o(.text*)\n\t\t*:noise_suppression_x.o(.text*)\n\t\t*:nsx_core.o(.text*)\n\t\t*:nsx_core_c.o(.text*)\n\t\t*:copy_set_operations.o(.text*)\n\t\t*:cross_correlation.o(.text*)\n\t\t*:division_operations.o(.text*)\n\t\t*:dot_product_with_scale.o(.text*)\n\t\t*:downsample_fast.o(.text*)\n\t\t*:energy.o(.text*)\n\t\t*:get_scaling_square.o(.text*)\n\t\t*:min_max_operations.o(.text*)\n\t\t*:real_fft.o(.text*)\n\t\t*:resample_by_2.o(.text*)\n\t\t*:resample_by_2_internal.o(.text*)\n\t\t*:spl_init.o(.text*)\n\t\t*:spl_sqrt.o(.text*)\n\t\t*:spl_sqrt_floor.o(.text*)\n\t\t*:vector_scaling_operations.o(.text*)\n#endif\n#if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t:audio_prompt_sbc.o(.text*)\n#endif\n\t\t*(.fast_text_sram*)\n\t\t/*\n\t\t   If you want protect one section by armv8's mpu, the section should\n\t\t   be aligned to 32bytes\n\t\t */\n\t\t. = ALIGN(32);\n\t\t__fast_sram_text_exec_end__ = .;\n\t} > FRAMX\n\n\t__fast_sram_text_data_end_flash__ = __fast_sram_text_data_start_flash__ + SIZEOF(.fast_text_sram);\n\t__fast_sram_text_data_start__ = RAMX_TO_RAM(__fast_sram_text_exec_start__);\n\t__fast_sram_text_data_end__ = RAMX_TO_RAM(__fast_sram_text_exec_end__);\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t__cp_text_sram_start_flash__ = __fast_sram_text_data_end_flash__;\n\n\t.cp_text_sram (ORIGIN(RAMCPX)) : AT (__cp_text_sram_start_flash__)\n\t{\n\t\t__cp_text_sram_exec_start__ = .;\n\t\t*(.cp_text_sram*)\n\t\t*:cp_queue.o(.text*)\n#if defined(GSOUND_HOTWORD_EXTERNAL)\n\t\t//*:libspeech*.o(.text*)\n#endif\n\t\t. = ALIGN(4);\n\t\t__cp_text_sram_exec_end__ = .;\n\t} > RAMCPX\n\n\t__cp_text_sram_start = RAMX_TO_RAM(__cp_text_sram_exec_start__);\n\t__cp_text_sram_end = RAMX_TO_RAM(__cp_text_sram_exec_end__);\n\n\t.vector_table_cp (ORIGIN(RAMCP)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table_cp))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAMCP\n\n\t__cp_data_sram_start_flash__ = __cp_text_sram_start_flash__ + SIZEOF(.cp_text_sram);\n\n\t.cp_data_sram (.) : AT (__cp_data_sram_start_flash__)\n\t{\n\t\t__cp_data_sram_start = .;\n\t\t*(.cp_data*)\n\t\t*:cp_queue.o(.data* .rodata*)\n#if defined(GSOUND_HOTWORD_EXTERNAL)\n\t\t//*:libspeech*.o(.data* .rodata*)\n#endif\n\t\t. = ALIGN(4);\n\t\t__cp_data_sram_end = .;\n\t} > RAMCP\n\n\t__cp_sram_end_flash__ = __cp_data_sram_start_flash__ + SIZEOF(.cp_data_sram);\n\n\t.cp_bss_sram (.) (NOLOAD) : AT (ADDR(.cp_bss_sram))\n\t{\n\t\t__cp_bss_sram_start = .;\n\t\t*(.cp_bss*)\n\t\t. = ALIGN(4);\n\t\t__cp_bss_sram_end = .;\n\t} > RAMCP\n\n\t__overlay_text_start_flash__ = __cp_sram_end_flash__;\n#else\n\t__overlay_text_start_flash__ = __fast_sram_text_data_end_flash__;\n#endif\n\n#ifdef OVERLAY_FOR_CP\n\t__overlay_text_start__ = __cp_text_sram_end;\n#else\n\t__overlay_text_start__ = __fast_sram_text_data_end__;\n#endif\n\t__overlay_text_exec_start__ = RAM_TO_RAMX(__overlay_text_start__);\n\n\tOVERLAY (__overlay_text_exec_start__) : NOCROSSREFS AT (__overlay_text_start_flash__)\n\t{\n#ifndef NO_OVERLAY\n\t\t.overlay_text0\n\t\t{\n\t\t\tLONG(0);\n\n#if !defined(GLOBAL_SRAM_KISS_FFT)\n\t\t\t*:kiss_fft.o(.text*)\n\t\t\t*:kiss_fftr.o(.text*)\n\t\t\t*:fftwrap.o(.text*)\n#endif\n\n#if !defined(GLOBAL_SRAM_CMSIS_FFT)\n\t\t\t*:cmsis_fftwrap.o(.text*)\n\t\t\t*:arm_rfft_fast_f32.o(.text*)\n\t\t\t*:arm_cfft_f32.o(.text*)\n#endif\n\n#if defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t*:arm_biquad_cascade_df1_f32.o(.text*)\n\t\t\t*:integer_delay.o(.text*)\n\t\t\t*:lc_mmse_ns_float.o(.text*.speech_ns2float_process)\n\t\t\t*:coherence.o(.text*)\n\t\t\t*:echo_suppression.o(.text*.float_cmp)\n\t\t\t*:echo_suppression.o(.text*.es_process)\n\t\t\t*:lcmmse.o(.text*.lcmmse_noise_estimate)\n\t\t\t*:lcmmse.o(.text*.lcmmse_get_speech_prob)\n\t\t\t*:logmmse.o(.text*.filterbank_compute_bank_pflt)\n\t\t\t*:logmmse.o(.text*.filterbank_compute_psd_pflt)\n\t\t\t*:logmmse.o(.text*.logmmse_analysis)\n\t\t\t*:logmmse.o(.text*.logmmse_process)\n#if defined(CHIP_BEST1402) || defined(CHIP_BEST1400)\n\t\t\t*:lpc_plc.o(.text*.WB_PLC_common)\n\t\t\t*:lpc_plc.o(.text*.WB_PLC_erasure)\n\t\t\t*:lpc_plc.o(.text*.apfilterQ1_Q0)\n\t\t\t*:lpc_plc.o(.text*.apfilterQ0_Q0)\n\t\t\t*:lpc_plc.o(.text*.azfilterQ0_Q1)\n\t\t\t*:lpc_plc.o(.text*.decim)\n\t\t\t*:lpc_plc.o(.text*.merit)\n#endif\n#else\n\t\t\t/* common */\n#if !defined(AUDIO_ANC_FB_ADJ_MC)\t\n\t\t\t*:ae_common.o(.text*)\t\t\n\t\t\t*:ae_rand.o(.text*)\n\t\t\t*:fastmath.o(.text*)\n\t\t\t*:integer_delay.o(.text*)\n\t\t\t*:iirfilt.o(.text*)\n\t\t\t*:ringbuf.o(.text*)\n#endif\t\t\t\n\t\t\t*:scale_int16.o(.text*)\n\t\t\t*:speech_conv.o(.text*)\n\t\t\t*:speech_trans_buf.o(.text*)\n\n#if !defined(SCO_CP_ACCEL)\n\t\t\t*:frame_resize.o(.text*)\n\t\t\t*:buffer_manager.o(.text*)\n\t\t\t*:plc_8000.o(.text*)\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.text*)\n#endif\n#if defined(HFP_1_6_ENABLE)\n\t\t\t*:dspfns.o(.text*)\n\t\t\t*:lpc_plc.o(.text*)\n\t\t\t*:plc_16000.o(.text*)\n\t\t\t*:sbc_filter.o(.text*)\n#endif\n#endif\n\t\t\t*:preprocess.o(.text*)\n\t\t\t*:filterbank.o(.text*)\n\t\t\t*:mdf.o(.text*)\n#if defined(SPEECH_TX_2MIC_NS)\n\t\t\t*:webrtc_vad.o(.text*.WebRtcVad_Process)\n\t\t\t*:webrtc_vad.o(.text*.WebRtcVad_ValidRateAndFrameLength)\n\t\t\t*:webrtc_vad.o(.text*.WebRtcVad_CalcVad16khz)\n\t\t\t*:webrtc_vad.o(.text*.WebRtcVad_Downsampling)\n\t\t\t*:webrtc_vad.o(.text*.WebRtcVad_CalcVad8khz)\n\t\t\t*:vad_filterbank.o(.text*)\n\t\t\t*:energy.o(.text*)\n\t\t\t*:get_scaling_square.o(.text*)\n\t\t\t*:dual_mic_denoise.o(.text*)\n\t\t\t*:cross_correlation.o(.text*)\n\t\t\t*:min_max_operations.o(.text*)\n\t\t\t*:resample_by_2_internal.o(.text*)\n\t\t\t*:division_operations.o(.text*)\n\t\t\t*:downsample_fast.o(.text*)\n\t\t\t*:resample_fractional.o(.text*)\n\t\t\t*:resample_48khz.o(.text*)\n\t\t\t*:vad_sp.o(.text*)\n\t\t\t*:vad_core.o(.text*)\n\t\t\t*:webrtc_vad.o(.text*)\n\t\t\t*:vad_gmm.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n\t\t\t*:speech_2mic_ns2_denoise.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS4)\n\t\t\t*:sensormic_denoise.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS5)\n            *:leftright_denoise.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS2) || defined(SPEECH_RX_NS2)\n\t\t\t*:lc_mmse_ns.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT)\n\t\t\t*:lc_mmse_ns_float.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS3) || defined(SPEECH_RX_NS3)\n\t\t\t*:ns3.o(.text*)\n\t\t\t*:noise_suppression_x.o(.text*)\n\t\t\t*:nsx_core.o(.text*)\n\t\t\t*:nsx_core_c.o(.text*)\n\t\t\t*:copy_set_operations.o(.text*)\n\t\t\t*:cross_correlation.o(.text*)\n\t\t\t*:division_operations.o(.text*)\n\t\t\t*:dot_product_with_scale.o(.text*)\n\t\t\t*:downsample_fast.o(.text*)\n\t\t\t*:energy.o(.text*)\n\t\t\t*:get_scaling_square.o(.text*)\n\t\t\t*:min_max_operations.o(.text*)\n\t\t\t*:real_fft.o(.text*)\n\t\t\t*:resample_by_2.o(.text*)\n\t\t\t*:resample_by_2_internal.o(.text*)\n\t\t\t*:spl_init.o(.text*)\n\t\t\t*:spl_sqrt.o(.text*)\n\t\t\t*:spl_sqrt_floor.o(.text*)\n\t\t\t*:vector_scaling_operations.o(.text*)\n#endif\n#if defined(SPEECH_TX_AEC2FLOAT) && !defined(AUDIO_ANC_FB_ADJ_MC)\n\t\t\t*:coherence.o(.text*)\n\t\t\t*:echo_canceller.o(.text*)\n\t\t\t*:echo_suppression.o(.text*)\n\t\t\t*:lcmmse.o(.text*)\n\t\t\t*:logmmse.o(.text*)\n\t\t\t*:mdf2.o(.text*)\n\t\t\t*:noise_generator.o(.text*)\n\t\t\t*:pink_noise_gen.o(.text*)\n\t\t\t*:white_noise_gen.o(.text*)\n#endif\n#if defined(SPEECH_TX_AEC3)\n\t\t\t*:SubBandBasedAEC.o(.text*)\n#endif\n#if defined(SPEECH_TX_3MIC_NS)\n\t\t\t*:speech_3mic_ns.o(.text*)\n#endif\n#if defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:iir_resample.o(.text*)\n#endif\n#if defined(SPEECH_TX_COMPEXP)\n\t\t\t*:compexp.o(.text*)\n#endif\n#if defined(SPEECH_TX_EQ) || defined(SPEECH_RX_EQ) || defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:speech_eq.o(.text*)\n\t\t\t*:speech_arm_eq.o(.text*)\n\t\t\t*:arm_biquad_cascade_df1_f32.o(.text*)\n#endif\n#if defined(SPEECH_TX_POST_GAIN) || defined(SPEECH_RX_POST_GAIN)\n\t\t\t*:speech_gain.o(.text*)\n#endif\n#if defined(__SMARTVOICE__)\n#if defined(SPEECH_TX_2MIC_NS2) || defined(SPEECH_TX_NS2)\n\t\t\t*:app_smartvoice.o(.text*._Z23mic_data_process_deinitv)\n\t\t\t*:app_smartvoice.o(.text*._Z21mic_data_process_initv)\n\t\t\t*:app_smartvoice.o(.text*._Z20mic_data_process_runPsm)\n#endif\n#endif\n\n#endif // #if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t*(.overlay_text0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.text*)\n\t\t\t*:sbc_math.o(.text*)\n#endif\n\t\t\t*:fixedpoint.o(.text*)\n\t\t\t*:replaygain.o(.text*)\n\t\t\t*:dsp_core.o(.text*)\n\t\t\t*:dsp_misc.o(.text*)\n\t\t\t*:dsp_filter.o(.text*)\n\t\t\t*:dsp_sample_input.o(.text*)\n\t\t\t*:dsp_sample_output.o(.text*)\n\t\t\t*:eq.o(.text*)\n\t\t\t*:pga.o(.text*)\n#if !defined(A2DP_AAC_ON) && !defined(A2DP_LHDC_ON)\n\t\t\t*:fir_process.o(.text*)\n#endif\n#endif\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n#endif\n\t\t\t*(.overlay_a2dp_sbc*)\n\t\t\t*(.overlay_text1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fmdec.o(.text* .data* .rodata* .bss*)\n\t\t\t*(.overlay_text2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.text*)\n\t\t\t*(.overlay_text3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:block.o(.text*.*CBlock_GetEscape*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_GetBitstream*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_GetAuBitsRemaining*)\n\t\t\t*:tpdec_latm.o(.text*.*CLatmDemux_GetValue*)\n\t\t\t*:tpdec_latm.o(.text*.*CLatmDemux_Read*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_FillData*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_ReadAccessUnit*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_readHeader*)\n\t\t\t*:block.o(.text*.*ApplyTools*)\n\t\t\t*:aacdec_pns.o(.text*.*CPns_Apply*)\n\t\t\t*:aacdec_tns.o(.text*.*CTns_Apply*)\n\t\t\t*:aacdec_tns.o(.text*.*CTns_Reset*)\n\t\t\t*:aacdec_pns.o(.text*.*CPns_ResetData*)\n\t\t\t*:pulsedata.o(.text*.*CPulseData_Read*)\n#if !defined(AAC_TEXT_PARTIAL_IN_FLASH)\n\t\t\t*:channel.o(.text*.*CChannelElement_Read*)\n\t\t\t*:tpdec_asc.o(.text*.*CProgramConfig_Reset*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_CrcCheck*)\n\t\t\t*:block.o(.text*.*CBlock_FrequencyToTime*)\n\t\t\t*:block.o(.text*.*CBlock_ReadSectionData*)\n\t\t\t*:channel.o(.text*.*CChannelElement_Decode*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_CrcEndReg*)\n\t\t\t*:aacdecoder.o(.text*.*CAacDecoder_DecodeFrame*)\n\t\t\t*:mdct.o(.text*)\n#endif\n\n#if !defined(__SBC_FUNC_IN_ROM_VBEST2000__) && !defined(AAC_TEXT_PARTIAL_IN_FLASH)\n\t\t\t*:block.o(.text*.*CBlock_ReadSpectralData*)\n\t\t\t*:block.o(.text*.*CBlock_ScaleSpectralData*)\n\t\t\t*:aacdec_tns.o(.text*.*CTns_ReadDataPresentFlag*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_CrcStartReg*)\n\t\t\t*:block.o(.text*.*CBlock_ReadScaleFactorData*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_EndAccessUnit*)\n\t\t\t*:tpdec_latm.o(.text*.*CLatmDemux_GetNrOfSubFrames*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_GetAuBitsTotal*)\n\t\t\t*:tpdec_asc.o(.text*.*CProgramConfig_LookupElement*)\n\t\t\t*:tpdec_latm.o(.text*.*CLatmDemux_GetFrameLengthInBits*)\n\t\t\t*:tpdec_latm.o(.text*.*CLatmDemux_ReadPayloadLengthInfo*)\n\t\t\t*:block.o(.text*.*CBlock_InverseQuantizeSpectralData*)\n\t\t\t*:channelinfo.o(.text*.*IcsRead*)\n\t\t\t*:aacdec_tns.o(.text*.*CTns_Read*)\n\t\t\t*:tpdec_lib.o(.text*.*transportDec_AdjustEndOfAccessUnit*)\n\t\t\t*:pulsedata.o(.text*.*CPulseData_Apply*)\n\t\t\t*:tpdec_asc.o(.text*.*AudioSpecificConfig_Init*)\n\t\t\t*:tpdec_asc.o(.text*.*AudioSpecificConfig_Parse*)\n\t\t\t*:tpdec_latm.o(.text*.*CLatmDemux_ReadStreamMuxConfig*)\n\t\t\t*:tpdec_asc.o(.text*.*getSampleRate*)\n\t\t\t*:tpdec_asc.o(.text*.*getAOT*)\n\t\t\t*:aacdecoder.o(.text*.*CAacDecoder_Init*)\n\t\t\t*:tpdec_asc.o(.text*.*CProgramConfig_Init*)\n\t\t\t*:aacdecoder_lib.o(.text*.*aacDecoder_ConfigCallback*)\n\t\t\t*:aacdecoder.o(.text*.*CAacDecoder_ExtPayloadParse*)\n\t\t\t*:stereo.o(.text*.*CJointStereo_Read*)\n#endif\n#endif\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t\t\t*:a2dp_decoder_aac_lc.o(.text*)\n\t\t\t*:fdkaac_codec.o(.text*)\n#endif\n\t\t\t*(.overlay_a2dp_aac*)\n\t\t\t*(.overlay_text4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:mpa.o(.text*)\n\t\t\t*:bit.o(.text*)\n\t\t\t*:frame.o(.text*)\n\t\t\t*:huffman.o(.text*)\n\t\t\t*:layer12.o(.text*)\n\t\t\t*:layer3.o(.text*)\n\t\t\t*:stream.o(.text*)\n\t\t\t*:synth.o(.text*)\n\t\t\t*(.overlay_text5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text6\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_SCALABLE_ON)\n\t\t\t*:rc_decode.o(.text*)\n\t\t\t*:audio_int32.o(.text*)\n\t\t\t*:ssc_ifft.o(.text*)\n\t\t\t*:util.o(.text*)\n\t\t\t*:vector_quant.o(.text*)\n\t\t\t*:ssc_quant.o(.text*)\n\t\t\t*:ssc_pulsealloc.o(.text*)\n\t\t\t*:audio.o(.text*)\n\t\t\t*:set_sbm.o(.text*)\n\t\t\t*:rc_code.o(.text*)\n\t\t\t*:SBM_pitchBased.o(.text*)\n\t\t\t*:ssc_imdct.o(.text*)\n\t\t\t*:audio_decoder.o(.text*)\n\t\t\t*:SoundBooster_DRC_classic.o(.text*)\n\t\t\t*:ssc_cwrs.o(.text*)\n\t\t\t*:ssc_mode.o(.text*)\n\t\t\t*:ssc_math.o(.text*)\n\t\t\t*:ssc_lap.o(.text*)\n\t\t\t*:SeamlessBufferManagement.o(.text*)\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t\t\t*:a2dp_decoder_scalable.o(.text*)\n#endif\n\t\t\t*(.overlay_a2dp_ssc*)\n#endif\n\n#if defined(A2DP_LHDC_ON)\n\t\t\t*(.overlay_a2dp_lhdc*)\n\t\t\t*:a2dp_decoder_lhdc.o(.text*)\n\t\t\t*:testkey.o(.text*)\n\t\t\t*:lhdcUtil.o(.text*)\n\t\t\t*:lzh_dec.o(.text*)\n\t\t\t*:licdecrypt.o(.text*)\n\t\t\t*:lic_check.o(.text*)\n\t\t\t*:fast_upsampling_2x.o(.text*)\n\t\t\t*:encdec.o(.text*)\n\t\t\t*:dec.o(.text*)\n\t\t\t*:cirbuf.o(.text*)\n\t\t\t*:DecodeUps2xLPF.o(.text*)\n\t\t\t*:Arc.o(.text*)\n#endif\n\n\t\t\t*(.overlay_text6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text7\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_LDAC_ON)\n\t\t\t*:a2dp_decoder_ldac.o(.text*)\n\t\t\t*:bitalloc_ldac.o(.text*)\n\t\t\t*:bitalloc_sub_ldac.o(.text*)\n\t\t\t*:encode_ldac.o(.text*)\n\t\t\t*:ldacBT.o(.text*)\n\t\t\t*:ldaclib.o(.text*)\n\t\t\t*:pack_ldac.o(.text*)\n\t\t\t*:quant_ldac.o(.text*)\n\t\t\t*:mdct_ldac.o(.text*)\n\t\t\t*:ldacBT_api.o(.text*)\n\t\t\t*:decode_ldac.o(.text*)\n\t\t\t*:dequant_ldac.o(.text*)\n\t\t\t*:imdct_ldac.o(.text*)\n\t\t\t*:ldacBT_internal.o(.text*)\n\t\t\t*:ldaclib_api.o(.text*)\n\t\t\t*:memory_ldac.o(.text*)\n\t\t\t*:setpcm_ldac.o(.text*)\n\t\t\t*:sigana_ldac.o(.text*)\n\t\t\t*:tables_ldac.o(.text*)\n\t\t\t*:tables_sigproc_ldac.o(.text*)\n\t\t\t*:unpack_ldac.o(.text*)\n\t\t\t*(.overlay_a2dp_ldac*)\n#endif\n#if defined(OPUS_IN_OVERLAY)\n\t\t\t/**:voice_opus.o(.text*)*/\n\t\t\t*:opus_encoder.o(.text*)\n\t\t\t*:analysis.o(.text*)\n\t\t\t/**:celt_encoder.o(.text*)*/\n\t\t\t*:celt_encoder.o(.text*.opus_custom_encoder_ctl)\n\t\t\t*:celt_encoder.o(.text*.celt_encoder_get_size)\n\t\t\t*:celt_encoder.o(.text*.opus_custom_encoder_get_size)\n\t\t\t*:celt_encoder.o(.text*.celt_encoder_init)\n\t\t\t*:celt_encoder.o(.text*.opus_custom_encoder_init_arch)\n\t\t\t*:celt_encoder.o(.text*.transient_analysis)\n\t\t\t*:celt_encoder.o(.text*.patch_transient_decision)\n\t\t\t*:celt_encoder.o(.text*.celt_preemphasis)\n\t\t\t*:celt_encoder.o(.text*.l1_metric)\n\t\t\t*:celt_encoder.o(.text*.tf_analysis)\n\t\t\t*:celt_encoder.o(.text*.tf_encode)\n\t\t\t*:celt_encoder.o(.text*.alloc_trim_analysis)\n\t\t\t*:celt_encoder.o(.text*.stereo_analysis)\n\t\t\t*:celt_encoder.o(.text*.median_of_5)\n\t\t\t*:celt_encoder.o(.text*.median_of_3)\n\t\t\t*:celt_encoder.o(.text*.dynalloc_analysis)\n\t\t\t*:celt_encoder.o(.text*.run_prefilter)\n\t\t\t*:celt_encoder.o(.text*.compute_vbr)\n\t\t\t*:celt_encoder.o(.text*.celt_encode_with_ec)\n\t\t\t*:celt_encoder.o(.text*.opus_custom_encoder_ctl)\n\t\t\t*:repacketizer.o(.text*)\n\t\t\t*:opus.o(.text*)\n\t\t\t*:enc_API.o(.text*)\n\t\t\t*:entenc.o(.text*)\n\t\t\t*:control_audio_bandwidth.o(.text*)\n\t\t\t*:encode_pulses.o(.text*)\n\t\t\t*:LPC_analysis_filter.o(.text*)\n\t\t\t*:burg_modified_FIX.o(.text*)\n\t\t\t*:vector_ops_FIX.o(.text*)\n\t\t\t*:NLSF_del_dec_quant.o(.text*)\n\t\t\t*:encode_frame_FIX.o(.text*)\n\t\t\t*:pitch.o(.text*)\n\t\t\t*:resampler.o(.text*)\n\t\t\t*:VAD.o(.text*)\n\t\t\t*:encode_indices.o(.text*)\n\t\t\t*:control_codec.o(.text*)\n\t\t\t*:celt_lpc.o(.text*)\n\t\t\t*:shell_coder.o(.text*)\n\t\t\t*:init_encoder.o(.text*)\n\t\t\t*:log2lin.o(.text*)\n\t\t\t*:biquad_alt.o(.text*)\n\t\t\t*:stereo_encode_pred.o(.text*)\n\t\t\t*:NLSF_unpack.o(.text*)\n\t\t\t*:code_signs.o(.text*)\n\t\t\t*:lin2log.o(.text*)\n\t\t\t*:HP_variable_cutoff.o(.text*)\n\t\t\t*:sum_sqr_shift.o(.text*)\n\t\t\t*:inner_prod_aligned.o(.text*)\n\t\t\t*:stereo_quant_pred.o(.text*)\n\t\t\t*:entcode.o(.text*)\n\t\t\t*:celt.o(.text*)\n\t\t\t*:laplace.o(.text*)\n\t\t\t*:NSQ.o(.text*) /*complexity 1*/\n\t\t\t*:NSQ_del_dec.o(.text*) /*complexity 2*/\n#endif\n\t\t\t*(.overlay_text7)\n\t\t\t. = ALIGN(4);\n\t\t}\n#endif\n\t\t.overlay_text_last\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > REGION_OVERLAY_TEXT\n\n\t.dummy_overlay_text_end (.) (NOLOAD) : AT (ADDR(.dummy_overlay_text_end))\n\t{\n\t\t__overlay_text_exec_end__ = .;\n\t} > REGION_OVERLAY_TEXT\n\n#ifdef OVERLAY_FOR_CP\n\t__fast_sram_end__ = __fast_sram_text_data_end__;\n#else\n\t__fast_sram_end__ = RAMX_TO_RAM(__overlay_text_exec_end__);\n#endif\n\n\tASSERT(__fast_sram_end__ - __fast_sram_text_data_start__ <= FAST_XRAM_SECTION_SIZE, \"fast xram sections too large\")\n\t__free_fram = FAST_XRAM_SECTION_SIZE - (__fast_sram_end__ - __fast_sram_text_data_start__);\n\n#ifdef OVERLAY_FOR_CP\n\t__overlay_data_start__ = __cp_bss_sram_end;\n#else\n\t__overlay_data_start__ = __sram_bss_end__;\n#endif\n\n\tOVERLAY (__overlay_data_start__) : NOCROSSREFS AT (__load_stop_overlay_text_last)\n\t{\n#ifndef NO_OVERLAY\n\t\t.overlay_data0\n\t\t{\n\t\t\t/* Explicitly place 4 bytes at section start to avoid \"section type changed to PROGBITS\" warnings */\n\t\t\tLONG(0);\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t\t\t*:bt_sco_chain.o(.data* .rodata*)\n\t\t\t*:bt_sco_chain_cp.o(.data* .rodata*)\n#endif\n#if !defined(SCO_OPTIMIZE_FOR_RAM)\n\n#if !defined(GLOBAL_SRAM_KISS_FFT)\n\t\t\t*:fftwrap.o(.data* .rodata*)\n\t\t\t*:kiss_fft.o(.data* .rodata*)\n\t\t\t*:kiss_fftr.o(.data* .rodata*)\n#endif\n\n#if !defined(GLOBAL_SRAM_CMSIS_FFT)\n\t\t\t*:CommonTables.o(.rodata.armBitRevIndexTable256)\n\t\t\t*:CommonTables.o(.rodata.twiddleCoef_256)\n\t\t\t*:CommonTables.o(.rodata.twiddleCoef_rfft_512)\n\t\t\t*:CommonTables.o(.rodata.armBitRevIndexTable128)\n\t\t\t*:CommonTables.o(.rodata.twiddleCoef_128)\n\t\t\t*:CommonTables.o(.rodata.twiddleCoef_rfft_256)\n#endif\n\n\t\t\t/* common */\n\t\t\t*:fastmath_const.o(.data* .rodata*)\n\n\t\t\t*:preprocess.o(.data* .rodata*)\n\t\t\t*:filterbank.o(.data* .rodata*)\n\n#if !defined(SCO_CP_ACCEL)\n\t\t\t*:plc_8000.o(.data* .rodata*)\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.data* .rodata* .bss*)\n#endif\n#if defined(HFP_1_6_ENABLE)\n\t\t\t*:table.o(.data* .rodata*)\n\t\t\t*:plc_16000.o(.data* .rodata*)\n#endif\n#endif\n#if !defined(AUDIO_ANC_FB_ADJ_MC)\n\t\t\t*:mdf.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n\t\t\t*:dual_mic_denoise.o(.data* .rodata*)\n\t\t\t*:vad_filterbank.o(.data* .rodata*)\n\t\t\t*:energy.o(.data* .rodata*)\n\t\t\t*:get_scaling_square.o(.data* .rodata*)\n\n\t\t\t*:cross_correlation.o(.data* .rodata*)\n\t\t\t*:min_max_operations.o(.data* .rodata*)\n\t\t\t*:resample_by_2_internal.o(.data* .rodata*)\n\t\t\t*:division_operations.o(.data* .rodata*)\n\t\t\t*:downsample_fast.o(.data* .rodata*)\n\t\t\t*:resample_fractional.o(.data* .rodata*)\n\t\t\t*:resample_48khz.o(.data* .rodata*)\n\t\t\t*:vad_sp.o(.data* .rodata*)\n\t\t\t*:vad_core.o(.data* .rodata*)\n\t\t\t*:webrtc_vad.o(.data* .rodata*)\n\t\t\t*:vad_gmm.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n\t\t\t*:speech_2mic_ns2_denoise.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS4)\n\t\t\t*:sensormic_denoise.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS5)\n            *:leftright_denoise.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2) || defined(SPEECH_RX_NS2)\n\t\t\t*:lc_mmse_ns.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS3) || defined(SPEECH_RX_NS3)\n\t\t\t*:nsx_core.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT)\n\t\t\t*:lc_mmse_ns_float.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_3MIC_NS)\n\t\t\t*:speech_3mic_ns.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_AEC3)\n\t\t\t*:SubBandBasedAEC.o(.data* .rodata*)\n#endif\n#if defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:iir_resample.o(.data* .rodata*)\n#endif\n\n#endif // #if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t*(.overlay_data0 .overlay_rodata0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.data* .rodata*)\n\t\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n\t\t\t*:fixedpoint.o(.data* .rodata*)\n\t\t\t*:replaygain.o(.data* .rodata*)\n\t\t\t*:dsp_core.o(.data* .rodata*)\n\t\t\t*:dsp_misc.o(.data* .rodata*)\n\t\t\t*:dsp_filter.o(.data* .rodata*)\n\t\t\t*:dsp_sample_input.o(.data* .rodata*)\n\t\t\t*:dsp_sample_output.o(.data* .rodata*)\n\t\t\t*:eq.o(.data* .rodata*)\n\t\t\t*:pga.o(.data* .rodata*)\n#if !defined(A2DP_AAC_ON)\n\t\t\t*:fir_process.o(.data* .rodata*)\n#endif\n#endif\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t\t*:a2dp_decoder_sbc.o(.rodata*)\n#endif\n\t\t\t*(.overlay_data1 .overlay_rodata1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data2 .overlay_rodata2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.data* .rodata*)\n\t\t\t*(.overlay_data3 .overlay_rodata3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:block.o(.data* .rodata*)\n\t\t\t*:tpdec_lib.o(.data* .rodata*)\n\t\t\t*:tpdec_latm.o(.data* .rodata*)\n\t\t\t*:aacdec_pns.o(.data* .rodata*)\n\t\t\t*:aacdec_tns.o(.data* .rodata*)\n\t\t\t*:pulsedata.o(.data* .rodata*)\n\t\t\t*:channel.o(.data* .rodata*)\n\t\t\t*:tpdec_asc.o(.data* .rodata*)\n\t\t\t*:aacdecoder.o(.data* .rodata*)\n\t\t\t*:channelinfo.o(.data* .rodata*)\n\t\t\t*:aacdecoder_lib.o(.data* .rodata*)\n\t\t\t*:stereo.o(.data* .rodata*)\n\t\t\t*:fixpoint_math.o(.data* .rodata*)\n\t\t\t*:FDK_bitbuffer.o(.data* .rodata*)\n#endif\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t\t\t*:a2dp_decoder_aac_lc.o(.rodata*)\n\t\t\t*:fdkaac_codec.o(.rodata*)\n#endif\n\t\t\t*(.overlay_data4 .overlay_rodata4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:mpa.o(.data* .bss*)\n\t\t\t*:bit.o(.data* .bss*)\n\t\t\t*:frame.o(.data* .bss*)\n\t\t\t*:huffman.o(.data* .bss*)\n\t\t\t*:layer12.o(.data* .bss*)\n\t\t\t*:layer3.o(.data* .bss*)\n\t\t\t*:stream.o(.data* .bss*)\n\t\t\t*:synth.o(.data* .bss*)\n\t\t\t*(.overlay_data5 .overlay_rodata5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data6\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_SCALABLE_ON) \n\t\t\t*:rc_decode.o(.data* .rodata*)\n\t\t\t*:audio_int32.o(.data* .rodata*)\n\t\t\t*:ssc_ifft.o(.data* .rodata*)\n\t\t\t*:util.o(.data* .rodata*)\n\t\t\t*:vector_quant.o(.data* .rodata*)\n\t\t\t*:ssc_quant.o(.data* .rodata*)\n\t\t\t*:ssc_pulsealloc.o(.data* .rodata*)\n\t\t\t*:audio.o(.data* .rodata*)\n\t\t\t*:set_sbm.o(.data* .rodata*)\n\t\t\t*:rc_code.o(.data* .rodata*)\n\t\t\t*:SBM_pitchBased.o(.data* .rodata*)\n\t\t\t*:ssc_imdct.o(.data* .rodata*)\n\t\t\t*:audio_decoder.o(.data* .rodata*)\n\t\t\t*:SoundBooster_DRC_classic.o(.data* .rodata*)\n\t\t\t*:ssc_cwrs.o(.data* .rodata*)\n\t\t\t*:ssc_mode.o(.data* .rodata*)\n\t\t\t*:ssc_math.o(.data* .rodata*)\n\t\t\t*:ssc_lap.o(.data* .rodata*)\n\t\t\t*:SeamlessBufferManagement.o(.data* .rodata*)\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t\t\t*:a2dp_decoder_scalable.o(.rodata*)\n#endif\t\t\t\n#endif\n#if defined(A2DP_LHDC_ON)\n\t\t\t*:a2dp_decoder_lhdc.o(.data* .rodata*)\n\t\t\t*:testkey.o(.data* .rodata*)\n\t\t\t*:lhdcUtil.o(.data* .rodata*)\n\t\t\t*:lzh_dec.o(.data* .rodata*)\n\t\t\t*:licdecrypt.o(.data* .rodata*)\n\t\t\t*:lic_check.o(.data* .rodata*)\n\t\t\t*:fast_upsampling_2x.o(.data* .rodata*)\n\t\t\t*:encdec.o(.data* .rodata*)\n\t\t\t*:dec.o(.data* .rodata*)\n\t\t\t*:cirbuf.o(.data* .rodata*)\n\t\t\t*:DecodeUps2xLPF.o(.data* .rodata*)\n\t\t\t*:Arc.o(.data* .rodata*)\n#endif\n\n\t\t\t*(.overlay_data6 .overlay_rodata6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data7\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_LDAC_ON)\n\t\t\t*:a2dp_decoder_ldac.o(.data* .rodata*)\n\t\t\t*:bitalloc_ldac.o(.data* .rodata*)\n\t\t\t*:bitalloc_sub_ldac.o(.data* .rodata*)\n\t\t\t*:encode_ldac.o(.data* .rodata*)\n\t\t\t*:ldacBT.o(.data* .rodata*)\n\t\t\t*:ldaclib.o(.data* .rodata*)\n\t\t\t*:pack_ldac.o(.data* .rodata*)\n\t\t\t*:quant_ldac.o(.data* .rodata*)\n\t\t\t*:mdct_ldac.o(.data* .rodata*)\n\t\t\t*:ldacBT_api.o(.data* .rodata*)\n\t\t\t*:decode_ldac.o(.data* .rodata*)\n\t\t\t*:dequant_ldac.o(.data* .rodata*)\n\t\t\t*:imdct_ldac.o(.data* .rodata*)\n\t\t\t*:ldacBT_internal.o(.data* .rodata*)\n\t\t\t*:ldaclib_api.o(.data* .rodata*)\n\t\t\t*:memory_ldac.o(.data* .rodata*)\n\t\t\t*:setpcm_ldac.o(.data* .rodata*)\n\t\t\t*:sigana_ldac.o(.data* .rodata*)\n\t\t\t*:tables_ldac.o(.data* .rodata*)\n\t\t\t*:tables_sigproc_ldac.o(.data* .rodata*)\n\t\t\t*:unpack_ldac.o(.data* .rodata*)\n#endif\n\n#if defined(OPUS_IN_OVERLAY)\n\t\t\t*:voice_opus.o(.data* .rodata*)\n\t\t\t*:opus_encoder.o(.data* .rodata*)\n\t\t\t*:analysis.o(.data* .rodata*)\n\t\t\t*:celt_encoder.o(.data* .rodata*)\n\t\t\t*:repacketizer.o(.data* .rodata*)\n\t\t\t*:opus.o(.data* .rodata*)\n\t\t\t*:enc_API.o(data* .rodata)\n\t\t\t*:entenc.o(.data* .rodata*)\n\t\t\t*:control_audio_bandwidth.o(.data* .rodata*)\n\t\t\t*:encode_pulses.o(.data* .rodata*)\n\t\t\t*:LPC_analysis_filter.o(.data* .rodata*)\n\t\t\t*:burg_modified_FIX.o(.data* .rodata*)\n\t\t\t*:vector_ops_FIX.o(.data* .rodata*)\n\t\t\t*:NLSF_del_dec_quant.o(.data* .rodata*)\n\t\t\t*:encode_frame_FIX.o(.data* .rodata*)\n\t\t\t*:pitch.o(.data* .rodata*)\n\t\t\t*:resampler.o(.data* .rodata*)\n\t\t\t*:VAD.o(.data* .rodata*)\n\t\t\t*:encode_indices.o(.data* .rodata*)\n\t\t\t*:control_codec.o(.data* .rodata*)\n\t\t\t*:celt_lpc.o(.data* .rodata*)\n\t\t\t*:shell_coder.o(.data* .rodata*)\n\t\t\t*:init_encoder.o(.data* .rodata*)\n\t\t\t*:log2lin.o(.data* .rodata*)\n\t\t\t*:biquad_alt.o(.data* .rodata*)\n\t\t\t*:stereo_encode_pred.o(.data* .rodata*)\n\t\t\t*:NLSF_unpack.o(.data* .rodata*)\n\t\t\t*:code_signs.o(.data* .rodata*)\n\t\t\t*:lin2log.o(.data* .rodata*)\n\t\t\t*:HP_variable_cutoff.o(.data* .rodata*)\n\t\t\t*:sum_sqr_shift.o(.data* .rodata*)\n\t\t\t*:inner_prod_aligned.o(.data* .rodata*)\n\t\t\t*:stereo_quant_pred.o(.data* .rodata*)\n\t\t\t*:entcode.o(.data* .rodata*)\n\t\t\t*:celt.o(.data* .rodata*)\n\t\t\t*:laplace.o(.data* .rodata*)\n\t\t\t*:NSQ.o(.data* .rodata*) /*complexity 1*/\n\t\t\t*:NSQ_del_dec.o(.data* .rodata*) /*complexity 2*/\n#endif\n\t\t\t*(.overlay_data7 .overlay_rodata7)\n\t\t\t. = ALIGN(4);\n\t\t}\n#endif\n\t\t.overlay_data_last\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > REGION_OVERLAY_DATA\n\n\t.dummy_overlay_data_end (.) (NOLOAD) : AT (ADDR(.dummy_overlay_data_end))\n\t{\n\t\t__overlay_data_end__ = .;\n\t} > REGION_OVERLAY_DATA\n\n\tASSERT(__overlay_data_end__ - __overlay_data_start__ <= OVERLAY_DATA_SECTION_SIZE, \"overlay data sections too large\")\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t.cp_ramx_last_dummy (NOLOAD) : AT (ADDR(.cp_ramx_last_dummy))\n\t{\n\t\t__cp_ramx_last_dummy_start = .;\n\t} > RAMCPX\n\n\t.cp_ram_last_dummy (NOLOAD) : AT (ADDR(.cp_ram_last_dummy))\n\t{\n\t\t. = ALIGN(8);\n\t\t__cp_ram_last_dummy_start = .;\n\t} > RAMCP\n\n\t__cp_stack_top = ORIGIN(RAMCP) + LENGTH(RAMCP);\n\t__cp_stack_limit = __cp_stack_top - CP_STACK_SECTION_SIZE;\n\n\t/* LD v2.24 (GCC 4.9) cannot handle address conversion correctly if involving immediate value.\n\t   E.g.,  +  +  */\n\t__free_ramcpx = ORIGIN(RAMCPX) + LENGTH(RAMCPX) - ABSOLUTE(__cp_ramx_last_dummy_start);\n\tASSERT(__cp_stack_limit >= __cp_ram_last_dummy_start, \"region RAMCP overflowed with stack\")\n\t__free_ramcp = __cp_stack_limit - __cp_ram_last_dummy_start;\n#endif\n\n\t.text (FLASH_TO_FLASHX(__load_stop_overlay_data_last)) : AT (FLASHX_TO_FLASH(ADDR(.text)))\n\t{\n\t\t*(.text*)\n\t\t*(.flash_text*)\n\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n\t} > FLASHX\n\n\t.ARM.extab (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.extab)))\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > FLASHX\n\n\t__exidx_start = .;\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.exidx)))\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > FLASHX\n\t__exidx_end = .;\n\n\t. = FLASHX_TO_FLASH(.);\n#ifdef TRACE_STR_SECTION\n\t.rodata_str (.):\n\t{\n\t    __rodata_str_start__ = .;\n\t\t*(.rodata.__func__.*)\n\t\t*(.rodata.*__func__)\n\t\t*(.rodata.__FUNCTION__.*)\n\t\t*(.rodata.*__FUNCTION__)\n\t\t__rodata_str_end__ = .;\n\t} > FLASH\n\n\tRODATA_ADDRESS = .;\n\t. = 0xFFFC0000;\n\t.trc_str (.):\n\t{\n\t\t*(.rodata.__func__.*)\n\t\t*(.rodata.*__func__)\n\t\t*(.rodata.__FUNCTION__.*)\n\t\t*(.rodata.*__FUNCTION__)\n\t\t*(.trc_str*)\n\t}\n\t. = RODATA_ADDRESS;\n#endif\n\t.rodata (.) :\n\t{\n\t\t*(.rodata*)\n\t\t*(.flash_rodata*)\n\n\t\t. = ALIGN(4);\n\t\t__cust_cmd_hldr_tbl_start = .;\n\t\tKEEP(*(.cust_cmd_hldr_tbl))\n\t\t__cust_cmd_hldr_tbl_end = .;\n\t\t. = ALIGN(4);\n\t\t__ai_gatt_server_table_start = .;\n\t\tKEEP(*(.ai_gatt_server_table))\n\t\t__ai_gatt_server_table_end = .;\n\t\t. = ALIGN(4);\n\t\t__ai_ble_handler_table_start = .;\n\t\tKEEP(*(.ai_ble_handler_table))\n\t\t__ai_ble_handler_table_end = .;\n\t\t. = ALIGN(4);\n\t\t__ai_spp_register_table_start = .;\n\t\tKEEP(*(.ai_spp_register_table))\n\t\t__ai_spp_register_table_end = .;\n\t\t. = ALIGN(4);\n\t\t__tota_handler_table_start = .;\n\t\tKEEP(*(.tota_handler_table))\n\t\t__tota_handler_table_end = .;\n\t\t. = ALIGN(4);\n\t\t__ai_handler_function_table_start = .;\n\t\tKEEP(*(.ai_handler_function_table))\n\t\t__ai_handler_function_table_end = .;\n\t\t. = ALIGN(4);\n\t\t__custom_handler_table_start = .;\n\t\tKEEP(*(.custom_handler_table))\n\t\t__custom_handler_table_end = .;\n\t\t. = ALIGN(4);\n\t\t__mixprompt_property_table_start = .;\n\t\tKEEP(*(.mixprompt_property_table))\n\t\t__mixprompt_property_table_end = .;\n\t \tKEEP(*(.eh_frame*))\n\t\t*(.note.gnu.build-id)\n\t\t*(.constdata)\n\t} > FLASH\n\n#if defined(FIRMWARE_REV)\n\t.firmware_rev (.) :\n\t{\n\t\t. = ALIGN(64);\n\t\t*(.fw_rev)\n\t} > FLASH\n#endif\n\n\t/* To copy multiple FLASH to RAM sections,\n\t * uncomment .copy.table section and,\n\t * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.copy.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__copy_table_start__ = .;\n\t\tLONG (__etext)\n\t\tLONG (__data_start__)\n\t\tLONG (__data_end__ - __data_start__)\n\t\tLONG (__etext2)\n\t\tLONG (__data2_start__)\n\t\tLONG (__data2_end__ - __data2_start__)\n\t\t__copy_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t/* To clear multiple BSS sections,\n\t * uncomment .zero.table section and,\n\t * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.zero.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__zero_table_start__ = .;\n\t\tLONG (__bss_start__)\n\t\tLONG (__bss_end__ - __bss_start__)\n\t\tLONG (__bss2_start__)\n\t\tLONG (__bss2_end__ - __bss2_start__)\n\t\t__zero_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t/* Location counter can end up 2byte aligned with narrow Thumb code but\n\t   __etext is assumed by startup code to be the LMA of a section in RAM\n\t   which must be 4byte aligned */\n\t__etext = ALIGN(4);\n\n\t/* The VMA is either the end of overlay_data or the end of sram bss */\n\n\t.data : AT (__etext)\n\t{\n\t\t__data_start__ = .;\n\n\t\t*(vtable)\n\t\t. = ALIGN(4);\n\t\t*(.data*)\n\n\t\t. = ALIGN(4);\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\n\t\t/* All data end */\n\t\t. = ALIGN(4);\n\t\t__data_end__ = .;\n\n\t} > RAM\n\n\t.bss (.) (NOLOAD) : AT (ADDR(.bss))\n\t{\n\t\t. = ALIGN(4);\n\t\t__bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__bss_end__ = .;\n\t} > RAM\n\n\t.reboot_custom_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_custom_param*))\n\t\t. = ALIGN(4);\n\t\t__reboot_custom_param_end__ = .;\n\t} > RAM\n\n\t.heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__HeapBase = .;\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t\t__HeapLimit = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n#if defined(ROM_UTILS_ON)\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM) - ROM_UTILS_RESV_RAM_SIZE;\n#else\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM);\n#endif\n\t__StackLimit = __StackTop - SIZEOF(.stack_dummy);\n\tPROVIDE(__stack = __StackTop);\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__StackLimit >= __HeapLimit, \"region RAM overflowed with stack\")\n\t__free_ram = __StackLimit - __HeapLimit;\n\n\t. = __etext + SIZEOF(.data);\n\n\t.system_info (.) :\n\t{\n\t\tKEEP(*(.system_info_list_size))\n\t\tKEEP(*(.system_info_list))\n\t\t. = ALIGN(4);\n\t}  > FLASH\n\n\t.build_info (.) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ALIGN(4);\n\t} > FLASH = 0x00000000\n\n#ifdef SLAVE_BIN_FLASH_OFFSET\n\t.slave_code (ORIGIN(FLASH) + SLAVE_BIN_FLASH_OFFSET):\n\t{\n\t\tKEEP(*(.slave_code_flash_rodata))\n\t} > FLASH\n#endif\n\n\t/* The following section MUST be the last loaded section */\n\t.code_start_addr (.) :\n\t{\n#ifdef TRACE_STR_SECTION\n\t\tLONG(ABSOLUTE(__rodata_str_start__));\n#else\n\t\tLONG(0);\n#endif\n\t\tLONG(BUILD_INFO_MAGIC);\n\t\tLONG(ABSOLUTE(__flash_start));\n\t} > FLASH\n\n\t__flash_end = .;\n\t\n\t.hotword_model (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tLHDC_LICENSE_SECTION_SIZE - CRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE - \n\t\tOTA_UPGRADE_LOG_SIZE - CORE_DUMP_SECTION_SIZE -\tHOTWORD_SECTION_SIZE) (NOLOAD):\n\t{\n\t\t__hotword_model_start = .;\n\t\t. = HOTWORD_SECTION_SIZE;\n\t\t__hotword_model_end = .;\n\t} > FLASH_NC\n\n\t.coredump_section (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tLHDC_LICENSE_SECTION_SIZE - CRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE - \n\t\tOTA_UPGRADE_LOG_SIZE - CORE_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__coredump_section_start = .;\n\t\t. = CORE_DUMP_SECTION_SIZE;\n\t\t__coredump_section_end = .;\n\t} > FLASH_NC\n\n\t.ota_upgrade_log (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tLHDC_LICENSE_SECTION_SIZE - CRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE -\n\t\tOTA_UPGRADE_LOG_SIZE) (NOLOAD) :\n\t{\n\t\t__ota_upgrade_log_start = .;\n\t\t. = OTA_UPGRADE_LOG_SIZE;\n\t\t__ota_upgrade_log_end = .;\n\t} > FLASH_NC\n\n\t.log_dump (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tLHDC_LICENSE_SECTION_SIZE - CRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__log_dump_start = .;\n\t\t. = LOG_DUMP_SECTION_SIZE;\n\t\t__log_dump_end = .;\n\t} > FLASH_NC\n\n\t.crash_dump (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE -  USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tLHDC_LICENSE_SECTION_SIZE - CRASH_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__crash_dump_start = .;\n\t\t. = CRASH_DUMP_SECTION_SIZE;\n\t\t__crash_dump_end = .;\n\t} > FLASH_NC\n\n\t.custom_parameter (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tLHDC_LICENSE_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__custom_parameter_start = .;\n\t\t. = CUSTOM_PARAMETER_SECTION_SIZE;\n\t\t__custom_parameter_end = .;\n\t} > FLASH_NC\n\t\n\t.lhdc_license (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - LHDC_LICENSE_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__lhdc_license_start = .;\n\t\t. = LHDC_LICENSE_SECTION_SIZE;\n\t\t__lhdc_license_end = .;\n\t} > FLASH_NC\n\n\t.userdata (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2) (NOLOAD) :\n\t{\n\t\t__userdata_start = .;\n\t\t. = USERDATA_SECTION_SIZE*2;\n\t\t__userdata_end = .;\n\t} > FLASH_NC\n\n\t.audio (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__aud_start = .;\n\t\t. = AUD_SECTION_SIZE;\n\t\t__aud_end = .;\n\t} > FLASH_NC\n\n\t.reserved (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__reserved_start = .;\n\t\t. = RESERVED_SECTION_SIZE;\n\t\t__reserved_end = .;\n\t} > FLASH_NC\n\n\t.factory (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__factory_start = .;\n\t\t. = FACTORY_SECTION_SIZE;\n\t\t__factory_end = .;\n\t} > FLASH_NC\n\n#ifdef OTA_BOOT_SIZE\n#if (OTA_BOOT_SIZE > FLASH_SIZE)\n#error \"OTA_BOOT_SIZE should <= FLASH_SIZE\"\n#endif\n#if defined(OTA_CODE_OFFSET) && (OTA_BOOT_SIZE > OTA_CODE_OFFSET)\n#error \"OTA_BOOT_SIZE should <= OTA_CODE_OFFSET\"\n#endif\n\t__tail_section_start = FLASH_BASE + OTA_BOOT_SIZE;\n#else\n\t__tail_section_start = __hotword_model_start;\n#endif\n\n\tASSERT(FLASH_NC_TO_C(__tail_section_start) >= __flash_end, \"region FLASH overflowed\")\n\t__free_flash = FLASH_NC_TO_C(__tail_section_start) - __flash_end;\n\n#if !defined(OTA_BOOT_SIZE) && defined(OTA_REMAP_OFFSET)\n\tASSERT((FLASH_BASE & 0x03FFFFFF) == 0, \"bad FLASH_BASE\")\n\tASSERT((FLASH_SIZE & (FLASH_SIZE - 1)) == 0, \"bad FLASH_SIZE\")\n#ifdef CHIP_BEST2300P\n\tASSERT(__flash_end <= FLASH_BASE + OTA_REMAP_OFFSET, \"flash code size too large to remap\")\n\tASSERT(__flash_start - FLASH_BASE >= FLASH_NC_BASE + FLASH_SIZE - __tail_section_start, \"flash code conflicted with tail sections in remap\")\n\tASSERT(__flash_start - FLASH_BASE >= FLASH_SIZE / (1 << (4 + 1)), \"flash code cannot remap within 4 regions (max code size is half of flash size)\")\n\tASSERT((__flash_start - FLASH_BASE) % (FLASH_SIZE / (1 << (4 + 1))) == 0, \"flash code start address not aligned with remap region boundary\")\n#else\n\tASSERT(((OTA_REMAP_OFFSET) & (0x1000 - 1)) == 0, \"OTA_REMAP_OFFSET not aligned with 4K sector boundary\")\n\tASSERT(__flash_end <= FLASH_BASE + (OTA_REMAP_OFFSET), \"flash code size too large to remap\")\n\tASSERT((__tail_section_start & (0x1000 - 1)) == 0, \"__tail_section_start not aligned with 4K sector boundary\")\n\tASSERT(__flash_end + (OTA_REMAP_OFFSET) <= __tail_section_start, \"flash code conflicted with tail sections in remap\")\n#endif\n#endif\n}\n\n"
  },
  {
    "path": "scripts/link/best1000_fpga_rom.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define HEAP_SECTION_SIZE\t\t\t0x400\n#define STACK_SECTION_SIZE\t\t\t0x1000\n#define FAST_XRAM_SECTION_SIZE\t\t0x3000\n/* Linker script to configure memory regions. */\nMEMORY\n{\n  ROM    (rx)  : ORIGIN = ROM_BASE,    LENGTH = ROM_SIZE\n  RAM    (rwx) : ORIGIN = RAM_BASE,    LENGTH = RAM_SIZE\n  RAMX   (rwx) : ORIGIN = RAMX_BASE,   LENGTH = RAM_SIZE\n  FRAMX  (rwx) : ORIGIN = RAM_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE,\tLENGTH = FAST_XRAM_SECTION_SIZE  \n}\n\n/* Library configurations */\nGROUP(libgcc.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions ROM and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exidx_start\n *   __exidx_end\n *   __rom_etext\n *   __rom_data_start__\n *   __rom_data_end__\n *   __rom_bss_start__\n *   __rom_bss_end__\n *   __rom_HeapLimit\n *   __rom_StackLimit\n *   __rom_StackTop\n *   __rom_stack\n *   __Vectors_End\n *   __Vectors_Size\n *   __free_rom_ram\n *   __rom_end\n *   __free_rom\n *   __audio_const_rom_start\n *   __audio_const_rom_end\n *   __audio_const_rom_size\n */\nENTRY(Reset_Handler)\n\nSECTIONS\n{\n\t.rom_text (ORIGIN(ROM)) :\n\t{\n\t\t__vector_table = .;\n\t\tKEEP(*(.vectors_table))\n\t\t*(.text.Reset_Handler)\n\t\t*(.text.System_Init)\n\t\t. = ALIGN(4);\n\n\t\t__Vectors_End = .;\n\t\t__Vectors_Size = __Vectors_End - __Vectors;\n\n\t\t*(.text*)\n\n#ifndef NOSTD\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n#endif\n\n\t\t. = ALIGN(4);\n\n\t\t*(.rodata*)\n\n#ifdef CHIP_HAS_AUDIO_CONST_ROM\n\t\t__audio_const_rom_start = .;\n\t\tKEEP(*audio_const_rom.o(.audio_const_index))\n\t\tKEEP(*audio_const_rom.o(.rodata*))\n\t\t__audio_const_rom_end = .;\n\t\t__audio_const_rom_size = __audio_const_rom_end - __audio_const_rom_start;\n#endif\n#ifndef NOSTD\n\t\tKEEP(*(.eh_frame*))\n#endif\n\t\t*(.note.gnu.build-id)\n\n\t\t. = ALIGN(4);\n\t} > ROM\n\n\t.rom_got_info (.) :\n\t{\n\t\t__rom_got_info_start = .;\n\t\t__rom_got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__rom_got_end = .;\n\t\t__rom_got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__rom_igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__rom_dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__rom_got_info_end = .;\n\t} > ROM\n\n\t.ARM.extab (.) :\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > ROM\n\n\t__exidx_start = .;\n\t.ARM.exidx (.) :\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > ROM\n\t__exidx_end = .;\n\n\t. = ALIGN(4);\n\n\t.custom.cmd.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__custom_handler_table_start = .;\n\t\tKEEP(*(.custom_handler_table))\n\t__custom_handler_table_end = .;\n\t} > ROM\n\n\t__rom_text0_end = .;\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.rom_ramx (RAM_TO_RAMX(.)) : AT (__rom_text0_end)\n\t{\n\t\t__rom_ramx_start = .;\n\t\t*(.rom_ramx)\n\t\t. = ALIGN(4);\n\t\t__rom_ramx_end = .;\n\t} > RAMX\n\n\t__rom_etext = __rom_text0_end + SIZEOF(.rom_ramx);\n\n\t.rom_data (RAMX_TO_RAM(.)) : AT (__rom_etext)\n\t{\n\t\t__rom_data_start__ = .;\n\t\t*(.data*)\n\t\t. = ALIGN(4);\n\n#ifndef NOSTD\n\t\t*(vtable)\n\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\t\t. = ALIGN(4);\n#endif\n\n\t\t/* All data end */\n\t\t__rom_data_end__ = .;\n\t} > RAM\n\n\t.rom_bss (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__rom_bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t*(AHBSDRAM1)\n\t\t. = ALIGN(4);\n\t\t__rom_bss_end__ = .;\n#ifndef NOSTD\n\t\t__bss_start__ = __rom_bss_start__;\n\t\t__bss_end__ = __rom_bss_end__;\n#endif\n\t} > RAM\n\n\t.rom_heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__rom_HeapBase = .;\n#ifndef NOSTD\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n#endif\n\t\t. = ALIGN(8);\n\t\t__rom_HeapLimit = .;\n#ifndef NOSTD\n\t\t__HeapLimit = __rom_HeapLimit;\n#endif\n\t} > RAM\n\n\t.scratch_buf (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t*(.scratch_buf)\n\t\t. = ALIGN(4);\n\t} > RAM\n\t\n\t.rodata (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__mixprompt_property_table_start = .;\n\t\tKEEP(*(.mixprompt_property_table))\n\t\t__mixprompt_property_table_end = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.rom_stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n\t__rom_StackTop = ORIGIN(RAM) + LENGTH(RAM);\n\t__rom_StackLimit = __rom_StackTop - SIZEOF(.rom_stack_dummy);\n\tPROVIDE(__rom_stack = __rom_StackTop);\n#ifndef NOSTD\n\t__StackLimit = __rom_StackLimit;\n\t__StackTop = __rom_StackTop;\n\tPROVIDE(__stack = __rom_StackTop);\n#endif\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__rom_StackLimit >= __rom_HeapLimit, \"region RAM overflowed with stack\")\n\t__free_rom_ram = __rom_StackLimit - __rom_HeapLimit;\n\n\t__rom_end = __rom_etext + SIZEOF(.rom_data);\n\n\t.rom_export_fn (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE - CRASH_DUMP_SECTION_SIZE\n\t\t\t\t\t- CUSTOM_PARAMETER_SECTION_SIZE) :\n\t{\n\t\t__export_fn_rom = .;\n\t\tKEEP(*(.export_fn))\n\t\t. = ROM_EXPORT_FN_SECTION_SIZE;\n\t} > ROM = 0x00000000\n\n\t.rom_build_info (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - CRASH_DUMP_SECTION_SIZE - CUSTOM_PARAMETER_SECTION_SIZE) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ROM_BUILD_INFO_SECTION_SIZE;\n\t} > ROM = 0x00000000\n\t.crash_dump (ORIGIN(ROM) + LENGTH(ROM) - CRASH_DUMP_SECTION_SIZE - CUSTOM_PARAMETER_SECTION_SIZE) :\n\t{\n\t\t__crash_dump_start = .;\n\t\t. = CRASH_DUMP_SECTION_SIZE;\n\t\t__crash_dump_end = .;\n\t} > ROM = 0x00000000\n\t.custom_parameter (ORIGIN(ROM) + LENGTH(ROM) - CUSTOM_PARAMETER_SECTION_SIZE) :\n\t{\n\t\t__custom_parameter_start = .;\n\t\t. = CUSTOM_PARAMETER_SECTION_SIZE;\n\t\t__custom_parameter_end = .;\n\t} > ROM = 0x00000000\n\n\tASSERT(ADDR(.rom_export_fn) >= __rom_end, \"region ROM overflowed with .rom_export_fn\")\n\t__free_rom = ADDR(.rom_export_fn) - __rom_end;\n}\n\n"
  },
  {
    "path": "scripts/link/best1000_intsram.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define HEAP_SECTION_SIZE\t\t\t0x40\n\n#define STACK_SECTION_SIZE\t\t\t0xD00\n\n#define OVERLAY_DATA_SECTION_SIZE\t0x1000\n\n#define FAST_XRAM_SECTION_SIZE\t\t0x0010\n\n#ifndef OTA_CODE_OFFSET\n#define OTA_CODE_OFFSET\t\t\t\t0\n#endif\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE + OTA_CODE_OFFSET)\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE\t\t\t(FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n#define FLASH_NC_REGION_BASE\t\tFLASH_C_TO_NC(FLASH_REGION_BASE)\n#define FLASHX_REGION_BASE\t\t\tFLASH_TO_FLASHX(FLASH_REGION_BASE)\n\n/* Linker script to configure memory regions. */\n/* See plat_addr_map.h and common.mk for the macro definitions */\nMEMORY\n{\n\tROM\t\t\t(rx)\t: ORIGIN = ROM_BASE,\t\t\t\tLENGTH = ROM_SIZE\n\tFLASH \t\t(r)\t\t: ORIGIN = FLASH_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tFLASH_NC\t(r)\t\t: ORIGIN = FLASH_NC_REGION_BASE,\tLENGTH = FLASH_REGION_SIZE\n\tFLASHX\t\t(rx)\t: ORIGIN = FLASHX_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tRAM\t\t\t(rwx)\t: ORIGIN = RAM_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tRAMX\t\t(rx)\t: ORIGIN = RAMX_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tFRAMX\t\t(rwx)\t: ORIGIN = RAMX_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE,\tLENGTH = FAST_XRAM_SECTION_SIZE\n#ifdef PSRAM_BASE\n\tPSRAM \t\t(rwx)\t: ORIGIN = PSRAM_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAM_NC\t(rwx)\t: ORIGIN = PSRAM_NC_BASE,\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAMX\t\t(rx)\t: ORIGIN = PSRAMX_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n#endif\n}\n\n/* Library configurations */\nGROUP(libgcc.a libc.a libm.a libnosys.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions FLASH and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exidx_start\n *   __exidx_end\n *   __copy_table_start__\n *   __copy_table_end__\n *   __zero_table_start__\n *   __zero_table_end__\n *   __etext\n *   __data_start__\n *   __preinit_array_start\n *   __preinit_array_end\n *   __init_array_start\n *   __init_array_end\n *   __fini_array_start\n *   __fini_array_end\n *   __data_end__\n *   __bss_start__\n *   __bss_end__\n *   __end__\n *   end\n *   __HeapLimit\n *   __StackLimit\n *   __StackTop\n *   __stack\n *   __free_ram\n *   __factory_start\n *   __factory_end\n *   __calib_start\n *   __calib_end\n *   __flash_start\n *   __flash_end\n *   __free_flash\n *   __boot_sram_start_flash__\n *   __boot_sram_end_flash__\n *   __boot_sram_start__\n *   __boot_bss_sram_start__\n *   __boot_bss_sram_end__\n *   __sram_text_data_start_flash__\n *   __sram_text_data_end_flash__\n *   __fast_sram_text_data_start__\n *   __fast_sram_text_data_end__\n *   __fast_sram_text_data_start_flash__\n *   __fast_sram_text_data_end_flash__\n *   __sram_text_data_start__\n *   __sram_bss_start__\n *   __sram_bss_end__\n *   __overlay_text_start__\n *   __overlay_text_exec_start__\n *   __overlay_data_start__\n */\nENTRY(Boot_Loader)\n\nSECTIONS\n{\n\t__export_fn_rom = (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE);\n\n\t.boot_struct (ORIGIN(FLASH)) :\n\t{\n\t\t__flash_start = .;\n\t\tKEEP(*(.boot_struct))\n\t\t. = ALIGN(4);\n\t} > FLASH\n\n\t. = FLASH_TO_FLASHX(.);\n\n\t.boot_text_flash (.) : AT (FLASHX_TO_FLASH(ADDR(.boot_text_flash)))\n\t{\n\t\t*(.boot_loader)\n\t\t*(.boot_text_flash*)\n\t\t*(.boot_rodata*)\n\t\t. = ALIGN(4);\n\t} > FLASHX\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.got_info (.) :\n\t{\n\t\t__got_info_start = .;\n\t\t__got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__got_end = .;\n\t\t__got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__got_info_end = .;\n\t} > FLASH\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.userdata_pool (.) (NOLOAD) :\n\t{\n\t\t*(.userdata_pool)\n\t\t. = ALIGN(4);\n\t\t__userdata_pool_end__ = .;\n\t} > RAM\n\n\t__boot_sram_start_flash__ = LOADADDR(.got_info) + SIZEOF(.got_info);\n\t__boot_sram_start__ = __userdata_pool_end__;\n\t.boot_text_sram (RAM_TO_RAMX(__boot_sram_start__)) : AT (__boot_sram_start_flash__)\n\t{\n\t\t/* memcpy.o or libc_nano.a(lib_a-memcpy.o/lib_a-memcpy-stub.o) */\n\t\t*:memcpy.o(.text*)\n\t\t*:lib_a-memcpy*.o(.text*)\n\t\t*:libc_rom.o(.text*)\n\n\t\t/* memset.o or libc_nano.a(lib_a-memset.o) */\n\t\t*:memset.o(.text*)\n\t\t*:lib_a-memset*.o(.text*)\n\n\t\t*:hal_norflash*.o(.text*)\n\t\t*:norflash_*.o(.text*)\n\n\t\t*(.boot_text_sram*)\n\n\t\t/* All the codes that are run both in boot and non-boot */\n\t\t*:hal_*(.text*)\n\t\t*:system_ARMCM.o(.text*)\n\t\t*:system_utils.o(.text*)\n\t\t*:cmsis_nvic.o(.text*)\n\t\t/* For 64-bit div in boot, e.g., __aeabi_uldivmod */\n\t\t*libgcc.a:(.text*)\n\t\t. = ALIGN(4);\n\t} > RAMX\n\n\t.boot_data_sram (RAMX_TO_RAM(ADDR(.boot_text_sram) + SIZEOF(.boot_text_sram))) :\n\t\t\t\t\tAT (__boot_sram_start_flash__ + SIZEOF(.boot_text_sram))\n\t{\n\t\t*:hal_norflash*.o(.data* .rodata*)\n\t\t*:norflash_*.o(.data* .rodata*)\n\t\t*:hal_psram.o(.data* .rodata*)\n\t\t*(.boot_data*)\n\t\t/* All the data that is accessed both in boot and non-boot */\n\t\t*:hal_*(.rodata*)\n\t\t*:system_ARMCM.o(.rodata*)\n\t\t*:system_utils.o(.rodata*)\n\t\t*:cmsis_nvic.o(.rodata*)\n\t\t*libgcc.a:(.rodata*)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__boot_sram_end_flash__ = __boot_sram_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.boot_text_sram) + SIZEOF(.boot_data_sram);\n\n\t.boot_bss_sram (.) (NOLOAD) :\n\t{\n\t\t__boot_bss_sram_start__ = .;\n\t\t*:hal_norflash*.o(.bss*)\n\t\t*:norflash_*.o(.bss*)\n\t\t*:hal_psram.o(.bss*)\n\t\t*(.boot_bss*)\n\t\t. = ALIGN(4);\n\t\t__boot_bss_sram_end__ = .;\n\t} > RAM\n\n\t__fast_sram_text_data_start_flash__ = __boot_sram_end_flash__;\n\t.fast_text_sram (ORIGIN(FRAMX)) : AT (__fast_sram_text_data_start_flash__)\n\t{\n\t\t__fast_sram_text_data_start__ = .;\n\t\t. = ALIGN(4);\n\t\t__fast_sram_text_data_end__ = .;\n\t} > FRAMX\n\t__fast_sram_text_data_end_flash__ = __fast_sram_text_data_start_flash__ + SIZEOF(.fast_text_sram);\n\n\t__overlay_text_start__ = RAMX_TO_RAM(__fast_sram_text_data_end__);\n\t__overlay_text_exec_start__ = RAM_TO_RAMX(__overlay_text_start__);\n\tOVERLAY (__overlay_text_exec_start__) : NOCROSSREFS AT (__fast_sram_text_data_end_flash__)\n\t{\n\t\t.overlay_text0\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text1\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text4\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text6\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text7)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > FRAMX\n\n\t.dummy_overlay_text (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_text_end__ = .;\n\t} > FRAMX\n\n\tASSERT(__dummy_overlay_text_end__ - __fast_sram_text_data_start__ <= FAST_XRAM_SECTION_SIZE, \"fast xram sections too large\")\n\t__overlay_data_start__ = __boot_bss_sram_end__;\n\tOVERLAY (__overlay_data_start__) : NOCROSSREFS AT (__load_stop_overlay_text_end)\n\t{\n\t\t.overlay_data0\n\t\t{\n\t\t\t/* Explicitly place 4 bytes at section start to avoid \"section type changed to PROGBITS\" warnings */\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data0 .overlay_rodata0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data1\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data1 .overlay_rodata1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data2 .overlay_rodata2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data3 .overlay_rodata3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data4\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data4 .overlay_rodata4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data5 .overlay_rodata5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data6\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data6 .overlay_rodata6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data7 .overlay_rodata7)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > RAM\n\n\t.dummy_overlay_data (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_data_end__ = .;\n\t} > RAM\n\n\tASSERT(__dummy_overlay_data_end__ - __overlay_data_start__ <= OVERLAY_DATA_SECTION_SIZE, \"overlay sections too large\")\n\n\t__sram_text_data_start_flash__ = __load_stop_overlay_data_end;\n\t__sram_text_data_start__ = __dummy_overlay_data_end__;\n\t.sram_text (RAM_TO_RAMX(__sram_text_data_start__)) :\n\t\t\t\tAT (__sram_text_data_start_flash__)\n\t{\n\t\t*(.sram_text*)\n\t\t*:filter_process.o(.text*)\n\n\t\t*(.fast_text_sram*)\n\n\t\t*(.text*)\n\t\t*(.flash_text*)\n\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n\n\t\t. = ALIGN(4);\n\t} > RAMX\n\n\t.sram_data (RAMX_TO_RAM(ADDR(.sram_text) + SIZEOF(.sram_text))) :\n\t\t\t\tAT (__sram_text_data_start_flash__ + SIZEOF(.sram_text))\n\t{\n\t\t*(.rodata*)\n\t\t*(.sram_data*)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__sram_text_data_end_flash__ = __sram_text_data_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.sram_text) + SIZEOF(.sram_data);\n\n\t.sram_bss (.) (NOLOAD) :\n\t{\n\t\t__sram_bss_start__ = .;\n\t\t*(.sram_bss*)\n\t\t. = ALIGN(4);\n\t\t__sram_bss_end__ = .;\n\t} > RAM\n\n\t.text (FLASH_TO_FLASHX(__sram_text_data_end_flash__)) : AT (FLASHX_TO_FLASH(ADDR(.text)))\n\t{\n\t\t__dummy_text = .;\n\t} > FLASHX\n\n\t.ARM.extab (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.extab)))\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > FLASHX\n\n\t__exidx_start = .;\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.exidx)))\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > FLASHX\n\t__exidx_end = .;\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.rodata (.) :\n\t{\n\t\t__dummy_rodata = .;\n\t\t*(.flash_rodata*)\n\t\tKEEP(*(.eh_frame*))\n\t\t*(.note.gnu.build-id)\n\t} > FLASH\n\n\t/* To copy multiple FLASH to RAM sections,\n\t * uncomment .copy.table section and,\n\t * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.copy.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__copy_table_start__ = .;\n\t\tLONG (__etext)\n\t\tLONG (__data_start__)\n\t\tLONG (__data_end__ - __data_start__)\n\t\tLONG (__etext2)\n\t\tLONG (__data2_start__)\n\t\tLONG (__data2_end__ - __data2_start__)\n\t\t__copy_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t/* To clear multiple BSS sections,\n\t * uncomment .zero.table section and,\n\t * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.zero.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__zero_table_start__ = .;\n\t\tLONG (__bss_start__)\n\t\tLONG (__bss_end__ - __bss_start__)\n\t\tLONG (__bss2_start__)\n\t\tLONG (__bss2_end__ - __bss2_start__)\n\t\t__zero_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t__etext = .;\n\n#ifdef DATA_BUF_START\n\t.data_dummy (NOLOAD) :\n\t{\n\t\t__data_dummy_start = ABSOLUTE(.);\n\t\t. = DATA_BUF_START - __data_dummy_start;\n\t} > RAM\n#endif\n\n\t.data : AT (__etext)\n\t{\n\t\t__data_start__ = .;\n\t\t*(vtable)\n\t\t*(.data*)\n\n\t\t. = ALIGN(4);\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\t\t. = ALIGN(4);\n\t\t/* All data end */\n\t\t__data_end__ = .;\n\n\t} > RAM\n\n\t.bss (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__bss_end__ = .;\n\t} > RAM\n\n\t.heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__HeapBase = .;\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t\t__HeapLimit = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM);\n\t__StackLimit = __StackTop - SIZEOF(.stack_dummy);\n\tPROVIDE(__stack = __StackTop);\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__StackLimit >= __HeapLimit, \"region RAM overflowed with stack\")\n\t__free_ram = __StackLimit - __HeapLimit;\n\n\t. = __etext + SIZEOF(.data);\n\t.build_info (.) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ALIGN(4);\n\t} > FLASH = 0x00000000\n\n\t/* The following section be the last loaded section */\n\t.code_start_addr (.) :\n\t{\n\t\tLONG(BUILD_INFO_MAGIC);\n\t\tLONG(ABSOLUTE(__flash_start));\n\t} > FLASH\n\n\t__flash_end = .;\n\n\t.custom_parameter (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t AUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__custom_parameter_start = .;\n\t\t. = CUSTOM_PARAMETER_SECTION_SIZE;\n\t\t__custom_parameter_end = .;\n\t} > FLASH_NC\n\n\t.userdata (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2) (NOLOAD) :\n\t{\n\t\t__userdata_start = .;\n\t\t. = USERDATA_SECTION_SIZE*2;\n\t\t__userdata_end = .;\n\t} > FLASH_NC\n\n\t.audio (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE -\n\tAUD_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__aud_start = .;\n\t\t. = AUD_SECTION_SIZE;\n\t\t__aud_end = .;\n\t} > FLASH_NC\n\n\t.reserved (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__reserved_start = .;\n\t\t. = RESERVED_SECTION_SIZE;\n\t\t__reserved_end = .;\n\t} > FLASH_NC\n\n\t.factory (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__factory_start = .;\n\t\t. = FACTORY_SECTION_SIZE;\n\t\t__factory_end = .;\n\t} > FLASH_NC\n\n\tASSERT(FLASH_NC_TO_C(__custom_parameter_start) >= __flash_end, \"region FLASH overflowed\")\n\t__free_flash = FLASH_NC_TO_C(__custom_parameter_start) - __flash_end;\n}\n\n"
  },
  {
    "path": "scripts/link/best1000_intsram.lds_scat.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define HEAP_SECTION_SIZE\t\t\t0x40\n\n#define STACK_SECTION_SIZE\t\t\t0xD00\n#define CP_STACK_SECTION_SIZE\t\t0x1000\n\n#define OVERLAY_DATA_SECTION_SIZE\t0x1000\n\n#define FAST_XRAM_SECTION_SIZE\t\t0x0010\n\n#ifndef OTA_CODE_OFFSET\n#define OTA_CODE_OFFSET\t\t\t\t0\n#endif\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE + OTA_CODE_OFFSET)\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE\t\t\t(FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n#define FLASH_NC_REGION_BASE\t\tFLASH_C_TO_NC(FLASH_REGION_BASE)\n#define FLASHX_REGION_BASE\t\t\tFLASH_TO_FLASHX(FLASH_REGION_BASE)\n\n#define RESERVED_SECTION_SIZE\t\t0x1000\n\n#define MAX(a, b)\t\t\t\t\t((a) > (b) ? (a) : (b))\n\nLR_boot_struct FLASHX_REGION_BASE NOCOMPRESS\n{\n\tboot_struct FLASH_REGION_BASE\n\t{\n\t\t*(.boot_struct, +FIRST)\n\t}\n}\n\nLR_boot_flash +0\n{\n\tboot_text_flash +0 FIXED\n\t{\n\t\t*(.boot_loader, +FIRST)\n\t\t*(.boot_text_flash*)\n\t\t*(.boot_rodata*)\n\t}\n\n\tvector_table RAM_BASE UNINIT VECTOR_SECTION_SIZE\n\t{\n\t\t*(.bss.vector_table, +FIRST)\n\t}\n\n\treboot_param (ImageBase(vector_table) + VECTOR_SECTION_SIZE) UNINIT REBOOT_PARAM_SECTION_SIZE\n\t{\n\t\t*(.bss.reboot_param, +FIRST)\n\t}\n\n\tuserdata_pool (ImageBase(reboot_param) + REBOOT_PARAM_SECTION_SIZE) UNINIT\n\t{\n\t\t*(.bss.userdata_pool)\n\t}\n}\n\nLR_boot_sram +0\n{\n\tboot_text_sram RAM_TO_RAMX(ImageLimit(userdata_pool))\n\t{\n\t\t*armlib/c_*(:gdef:*memcpy*)\n\t\t*armlib/c_*(:gdef:*memset*)\n\t\tmemcpy.o(.text*)\n\t\tmemset.o(.text*)\n\t\tlibc_rom.o(.text*)\n\n\t\thal_norflash*.o(.text*)\n\t\tnorflash_*.o(.text*)\n\n\t\t*(.boot_text_sram*)\n\n\t\t/* All the codes that are run both in boot and non-boot */\n\t\thal_*(.text*)\n\t\tsystem_ARMCM.o(.text*)\n\t\tsystem_utils.o(.text*)\n\t\tcmsis_nvic.o(.text*)\n\t\t/* For 64-bit div in boot, e.g., __aeabi_uldivmod */\n\t\t/* *libgcc.a:((.text*)) */\n\t}\n\n\tboot_data_sram RAMX_TO_RAM(+0)\n\t{\n\t\thal_norflash*.o(.data*, .rodata*)\n\t\tnorflash_*.o(.data*, .rodata*)\n\t\thal_psram.o(.data*, .rodata*)\n\t\t*(.boot_data*)\n\t\t/* All the data that is accessed both in boot and non-boot */\n\t\thal_*(.rodata*)\n\t\tsystem_ARMCM.o(.rodata*)\n\t\tsystem_utils.o(.rodata*)\n\t\tcmsis_nvic.o(.rodata*)\n\t\t/* *libgcc.a:(.rodata*) */\n\t}\n\n\tboot_bss_sram +0 UNINIT\n\t{\n\t\thal_norflash*.o(+BSS)\n\t\tnorflash_*.o(+BSS)\n\t\thal_psram.o(+BSS)\n\t\t*(.bss.boot_bss*)\n\t}\n}\n\nLR_fast_sram +0\n{\n\tfast_text_sram (RAMX_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE)\n\t{\n\t\t*(.fast_text_sram)\n\t}\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\tcp_text_sram RAMCPX_BASE\n\t{\n\t\t*(.cp_text_sram*)\n\t}\n\n\tcp_text_sram_start RAMX_TO_RAM(ImageBase(cp_text_sram)) EMPTY ImageLength(cp_text_sram)\n\t{\n\t}\n\n\tvector_table_cp RAMCP_BASE UNINIT VECTOR_SECTION_SIZE\n\t{\n\t\t*(.vector_table_cp, +FIRST)\n\t}\n\n\tcp_data_sram (ImageBase(vector_table_cp) + VECTOR_SECTION_SIZE)\n\t{\n\t\t*(.cp_data*)\n\t}\n\n\tcp_bss_sram +0 UNINIT\n\t{\n\t\t*(.bss.cp_bss*)\n\t}\n\n\tcp_stack (RAMCP_BASE + RAMCP_SIZE - CP_STACK_SECTION_SIZE) EMPTY CP_STACK_SECTION_SIZE\n\t{\n\t}\n\n\tScatterAssert(ImageLimit(cp_stack) <= RAMCP_BASE + RAMCP_SIZE)\n\n#define OVERLAY_TEXT_EXEC_START\t\t\tImageLimit(cp_text_sram)\n#define OVERLAY_DATA_START\t\t\t\tImageLimit(cp_bss_sram)\n#define SRAM_TEXT_START\t\t\t\t\tRAM_TO_RAMX(ImageLimit(boot_bss_sram))\n#else\n#define OVERLAY_TEXT_EXEC_START\t\t\tImageLimit(fast_text_sram)\n#define OVERLAY_DATA_START\t\t\t\tImageLimit(boot_bss_sram)\n#define SRAM_TEXT_START\t\t\t\t\tRAM_TO_RAMX(ImageLimit(overlay_data_end))\n#endif\n#define OVERLAY_TEXT_START\t\t\t\tRAMX_TO_RAM(OVERLAY_TEXT_EXEC_START)\n}\n\nLR_overlay +0\n{\n\toverlay_start OVERLAY_TEXT_START EMPTY 0\n\t{\n\t}\n\n\toverlay_text0 OVERLAY_TEXT_EXEC_START OVERLAY\n\t{\n\t\t*(.overlay_text0)\n\t}\n\toverlay_text1 OVERLAY_TEXT_EXEC_START OVERLAY\n\t{\n\t\t*(.overlay_text1)\n\t}\n\toverlay_text2 OVERLAY_TEXT_EXEC_START OVERLAY\n\t{\n\t\t*(.overlay_text2)\n\t}\n\toverlay_text3 OVERLAY_TEXT_EXEC_START OVERLAY\n\t{\n\t\t*(.overlay_text3)\n\t}\n\toverlay_text4 OVERLAY_TEXT_EXEC_START OVERLAY\n\t{\n\t\t*(.overlay_text4)\n\t}\n\toverlay_text5 OVERLAY_TEXT_EXEC_START OVERLAY\n\t{\n\t\t*(.overlay_text5)\n\t}\n\toverlay_text6 OVERLAY_TEXT_EXEC_START OVERLAY\n\t{\n\t\t*(.overlay_text6)\n\t}\n\toverlay_text7 OVERLAY_TEXT_EXEC_START OVERLAY\n\t{\n\t\t*(.overlay_text7)\n\t}\n\n\toverlay_text_end (MAX(ImageLimit(overlay_text0), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_text1), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_text2), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_text3), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_text4), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_text5), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_text6), \\\n\t\t\t\t\t\t\tImageLimit(overlay_text7))))))))) EMPTY 0\n\t{\n\t}\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\tScatterAssert(ImageLimit(overlay_text_end) <= RAMCPX_BASE + RAMCPX_SIZE)\n#else\n\tScatterAssert(ImageLimit(overlay_text_end) <= ImageBase(fast_text_sram) + FAST_XRAM_SECTION_SIZE)\n#endif\n\n\toverlay_data0 OVERLAY_DATA_START OVERLAY\n\t{\n\t\t*(.overlay_data0, .overlay_rodata0)\n\t}\n\toverlay_data1 OVERLAY_DATA_START OVERLAY\n\t{\n\t\t*(.overlay_data1, .overlay_rodata1)\n\t}\n\toverlay_data2 OVERLAY_DATA_START OVERLAY\n\t{\n\t\t*(.overlay_data2, .overlay_rodata2)\n\t}\n\toverlay_data3 OVERLAY_DATA_START OVERLAY\n\t{\n\t\t*(.overlay_data3, .overlay_rodata3)\n\t}\n\toverlay_data4 OVERLAY_DATA_START OVERLAY\n\t{\n\t\t*(.overlay_data4, .overlay_rodata4)\n\t}\n\toverlay_data5 OVERLAY_DATA_START OVERLAY\n\t{\n\t\t*(.overlay_data5, .overlay_rodata5)\n\t}\n\toverlay_data6 OVERLAY_DATA_START OVERLAY\n\t{\n\t\t*(.overlay_data6, .overlay_rodata6)\n\t}\n\toverlay_data7 OVERLAY_DATA_START OVERLAY\n\t{\n\t\t*(.overlay_data7, .overlay_rodata7)\n\t}\n\n\toverlay_data_end (MAX(ImageLimit(overlay_data0), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_data1), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_data2), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_data3), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_data4), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_data5), \\\n\t\t\t\t\t\tMAX(ImageLimit(overlay_data6), \\\n\t\t\t\t\t\t\tImageLimit(overlay_data7))))))))) EMPTY 0\n\t{\n\t}\n\tScatterAssert(ImageLimit(overlay_data_end) <= ImageBase(overlay_data0) + OVERLAY_DATA_SECTION_SIZE)\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\tScatterAssert(ImageLimit(overlay_data_end) <= ImageBase(cp_stack))\n#endif\n}\n\nLR_sram +0\n{\n\tsram_text AlignExpr(SRAM_TEXT_START, 8)\n\t{\n\t\t*(InRoot$$Sections)\n\t\t*armlib*(+TEXT)\n\n\t\t*(.sram_text*)\n\t\tfilter_process.o(.text*)\n\n\t\t*(.fast_text_sram*)\n\n\t\t*(.text*)\n\t\t*(.flash_text*)\n\n\t}\n\n\tsram_data RAMX_TO_RAM(+0)\n\t{\n\t\t*armlib*(+DATA +CONST)\n\n\t\t*(.rodata*)\n\t\t*(.sram_data*)\n\t}\n\n\tsram_bss +0 UNINIT\n\t{\n\t\t*armlib*(+BSS)\n\n\t\t*(.bss.sram_bss*)\n\t}\n}\n\nLR_text +0\n{\n\ttext +0 EMPTY 0\n\t{\n\t}\n\n\t.ARM.extab +0\n\t{\n\t\t*(.ARM.extab*, .gnu.linkonce.armextab.*)\n\t}\n\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx +0\n\t{\n\t\t*(.ARM.exidx*, .gnu.linkonce.armexidx.*)\n\t}\n\n\trodata FLASHX_TO_FLASH(+0) :\n\t{\n\t\t*(.flash_rodata*)\n\t\t*(.eh_frame*)\n\t\t*(.note.gnu.build-id)\n\t}\n}\n\nLR_data +0\n{\n#ifdef DATA_BUF_START\n#define DATA_SEC_START \t\t\t\t\tDATA_BUF_START\n#else\n#define DATA_SEC_START \t\t\t\t\tImageLimit(sram_bss)\n#endif\n\n\tdata DATA_SEC_START\n\t{\n\t\t*(vtable)\n\t\t*(.data*)\n\t}\n\n\tbss +0 UNINIT\n\t{\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t}\n\n\tARM_LIB_HEAP +0 ALIGN 8 EMPTY HEAP_SECTION_SIZE\n\t{\n\t}\n\n\tARM_LIB_STACK (RAM_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE - STACK_SECTION_SIZE) ALIGN 8 EMPTY STACK_SECTION_SIZE\n\t{\n\t}\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tScatterAssert(ImageBase(ARM_LIB_STACK) >= ImageLimit(ARM_LIB_HEAP))\n\tScatterAssert(ImageLimit(ARM_LIB_STACK) <= (RAM_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE))\n\n\tfree_ram ImageLimit(ARM_LIB_HEAP) EMPTY (ImageBase(ARM_LIB_STACK) - ImageLimit(ARM_LIB_HEAP))\n\t{\n\t}\n}\n\nLR_tail +0\n{\n\tbuild_info FLASHX_TO_FLASH(+0)\n\t{\n\t\t*(.build_info, +FIRST)\n\t}\n\n\t/* The following section be the last loaded section */\n\tcode_start_addr +0\n\t{\n\t\t*(.code_start_addr, +LAST)\n\t}\n\n\tcustom_parameter (FLASH_NC_REGION_BASE + FLASH_REGION_SIZE - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE) EMPTY CUSTOM_PARAMETER_SECTION_SIZE\n\t{\n\t}\n\n\tuserdata (FLASH_NC_REGION_BASE + FLASH_REGION_SIZE - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2) EMPTY (USERDATA_SECTION_SIZE*2)\n\t{\n\t}\n\n\taudio (FLASH_NC_REGION_BASE + FLASH_REGION_SIZE - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE) EMPTY AUD_SECTION_SIZE\n\t{\n\t}\n\n\treserved (FLASH_NC_REGION_BASE + FLASH_REGION_SIZE - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE) EMPTY RESERVED_SECTION_SIZE\n\t{\n\t}\n\n\tfactory (FLASH_NC_REGION_BASE + FLASH_REGION_SIZE - FACTORY_SECTION_SIZE) EMPTY FACTORY_SECTION_SIZE\n\t{\n\t}\n\n\tScatterAssert(FLASH_C_TO_NC(ImageLimit(code_start_addr)) <= ImageBase(custom_parameter))\n}\n\n"
  },
  {
    "path": "scripts/link/best1000_msbc_aac.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define HEAP_SECTION_SIZE\t\t\t0x40\n#define STACK_SECTION_SIZE\t\t\t0xD00\n\n#define OVERLAY_DATA_SECTION_SIZE\t0x8000\n#define FAST_XRAM_SECTION_SIZE\t\t0xa000\n\n#ifndef OTA_CODE_OFFSET\n#define OTA_CODE_OFFSET\t\t\t\t0\n#endif\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE + OTA_CODE_OFFSET)\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE\t\t\t(FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n#define FLASH_NC_REGION_BASE\t\tFLASH_C_TO_NC(FLASH_REGION_BASE)\n#define FLASHX_REGION_BASE\t\t\tFLASH_TO_FLASHX(FLASH_REGION_BASE)\n\n/* Linker script to configure memory regions. */\n/* See plat_addr_map.h and common.mk for the macro definitions */\nMEMORY\n{\n\tROM\t\t\t(rx)\t: ORIGIN = ROM_BASE,\t\t\t\tLENGTH = ROM_SIZE\n\tFLASH \t\t(r)\t\t: ORIGIN = FLASH_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tFLASH_NC\t(r)\t\t: ORIGIN = FLASH_NC_REGION_BASE,\tLENGTH = FLASH_REGION_SIZE\n\tFLASHX\t\t(rx)\t: ORIGIN = FLASHX_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tRAM\t\t\t(rwx)\t: ORIGIN = RAM_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tRAMX\t\t(rx)\t: ORIGIN = RAMX_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tFRAMX\t\t(rwx)\t: ORIGIN = RAMX_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE,\tLENGTH = FAST_XRAM_SECTION_SIZE\n#ifdef PSRAM_BASE\n\tPSRAM \t\t(rwx)\t: ORIGIN = PSRAM_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAM_NC\t(rwx)\t: ORIGIN = PSRAM_NC_BASE,\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAMX\t\t(rx)\t: ORIGIN = PSRAMX_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n#endif\n}\n\n/* Library configurations */\nGROUP(libgcc.a libc.a libm.a libnosys.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions FLASH and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exidx_start\n *   __exidx_end\n *   __copy_table_start__\n *   __copy_table_end__\n *   __zero_table_start__\n *   __zero_table_end__\n *   __etext\n *   __data_start__\n *   __preinit_array_start\n *   __preinit_array_end\n *   __init_array_start\n *   __init_array_end\n *   __fini_array_start\n *   __fini_array_end\n *   __data_end__\n *   __bss_start__\n *   __bss_end__\n *   __end__\n *   end\n *   __HeapLimit\n *   __StackLimit\n *   __StackTop\n *   __stack\n *   __free_ram\n *   __factory_start\n *   __factory_end\n *   __calib_start\n *   __calib_end\n *   __flash_start\n *   __flash_end\n *   __free_flash\n *   __boot_sram_start_flash__\n *   __boot_sram_end_flash__\n *   __boot_sram_start__\n *   __boot_bss_sram_start__\n *   __boot_bss_sram_end__\n *   __sram_text_data_start_flash__\n *   __sram_text_data_end_flash__\n *   __fast_sram_text_data_start__\n *   __fast_sram_text_data_end__\n *   __fast_sram_text_data_start_flash__\n *   __fast_sram_text_data_end_flash__\n *   __sram_text_data_start__\n *   __sram_bss_start__\n *   __sram_bss_end__\n *   __sram_userdata_pool_start__\n *   __overlay_text_start__\n *   __overlay_text_exec_start__\n *   __overlay_data_start__\n *   __overlay_bss_start__\n */\nENTRY(Boot_Loader)\n\nSECTIONS\n{\n\t__export_fn_rom = (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE);\n\n\t.boot_struct (ORIGIN(FLASH)) :\n\t{\n\t\t__flash_start = .;\n\t\tKEEP(*(.boot_struct))\n\t\t. = ALIGN(4);\n\t} > FLASH\n\n\t. = FLASH_TO_FLASHX(.);\n\n\t.boot_text_flash (.) : AT (FLASHX_TO_FLASH(ADDR(.boot_text_flash)))\n\t{\n\t\t*(.boot_loader)\n\t\t*(.boot_text_flash*)\n\t\t*(.boot_rodata*)\n\t\t. = ALIGN(4);\n\t} > FLASHX\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.got_info (.) :\n\t{\n\t\t__got_info_start = .;\n\t\t__got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__got_end = .;\n\t\t__got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__got_info_end = .;\n\t} > FLASH\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.userdata_pool (.) (NOLOAD) :\n\t{\n\t\t*(.userdata_pool)\n\t\t. = ALIGN(4);\n\t\t__userdata_pool_end__ = .;\n\t} > RAM\n\n\t__boot_sram_start_flash__ = LOADADDR(.got_info) + SIZEOF(.got_info);\n\t__boot_sram_start__ = __userdata_pool_end__;\n\t.boot_text_sram (RAM_TO_RAMX(__boot_sram_start__)) : AT (__boot_sram_start_flash__)\n\t{\n\t\t/* memcpy.o or libc_nano.a(lib_a-memcpy.o/lib_a-memcpy-stub.o) */\n\t\t*:memcpy.o(.text*)\n\t\t*:lib_a-memcpy*.o(.text*)\n\t\t*:libc_rom.o(.text*)\n\n\t\t/* memset.o or libc_nano.a(lib_a-memset.o) */\n\t\t*:memset.o(.text*)\n\t\t*:lib_a-memset*.o(.text*)\n\n\t\t*:hal_norflash*.o(.text*)\n\t\t*:norflash_*.o(.text*)\n\n\t\t*(.boot_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__boot_text_sram_end = .;\n\t} > RAMX\n\n\t.boot_data_sram (RAMX_TO_RAM(ADDR(.boot_text_sram) + SIZEOF(.boot_text_sram))) :\n\t\t\t\t\tAT (__boot_sram_start_flash__ + SIZEOF(.boot_text_sram))\n\t{\n\t\t*:hal_norflash*.o(.data* .rodata*)\n\t\t*:norflash_*.o(.data* .rodata*)\n\t\t*:hal_psram.o(.data* .rodata*)\n\t\t*(.boot_data*)\n\t\t. = ALIGN(4);\n\t\t__boot_data_sram_end = .;\n\t} > RAM\n\n\t__boot_sram_end_flash__ = __boot_sram_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.boot_text_sram) + SIZEOF(.boot_data_sram);\n\n\t.boot_bss_sram (.) (NOLOAD) :\n\t{\n\t\t__boot_bss_sram_start__ = .;\n\t\t*:hal_norflash*.o(.bss*)\n\t\t*:norflash_*.o(.bss*)\n\t\t*:hal_psram.o(.bss*)\n\t\t*(.boot_bss*)\n\t\t. = ALIGN(4);\n\t\t__boot_bss_sram_end__ = .;\n\t} > RAM\n\n\t__sram_text_data_start_flash__ = __boot_sram_end_flash__;\n\t__sram_text_data_start__ = __boot_bss_sram_end__;\n\t.sram_text (RAM_TO_RAMX(__sram_text_data_start__)) :\n\t\t\t\tAT (__sram_text_data_start_flash__)\n\t{\n\t\t*(.sram_text*)\n#if defined(A2DP_AAC_ON)\n\t\t*:utils.o(.text*)\n\t\t*:cqueue.o(.text*)\n#endif\n\t\t. = ALIGN(4);\n\t} > RAMX\n\n\t.sram_data (RAMX_TO_RAM(ADDR(.sram_text) + SIZEOF(.sram_text))) :\n\t\t\t\tAT (__sram_text_data_start_flash__ + SIZEOF(.sram_text))\n\t{\n\t\t*:utils.o(.data* .rodata*)\n\t\t*:cqueue.o(.data* .rodata*)\n\t\t*:iir_process.o(.data* .rodata*)\n\t\t*(.sram_data*)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__sram_text_data_end_flash__ = __sram_text_data_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.sram_text) + SIZEOF(.sram_data);\n\n\t.sram_bss (.) (NOLOAD) :\n\t{\n\t\t__sram_bss_start__ = .;\n\t\t*:utils.o(.bss*)\n\t\t*(.sram_bss*)\n\t\t. = ALIGN(4);\n\t\t__sram_bss_end__ = .;\n\t} > RAM\n\n\t__fast_sram_text_data_start_flash__ = __sram_text_data_end_flash__;\n\t.fast_text_sram (ORIGIN(FRAMX)) : AT (__fast_sram_text_data_start_flash__)\n\t{\n\t\t__fast_sram_text_data_start__ = .;\n\t\t*:audio_resample_ex.o(.text*)\n#if defined(HFP_1_6_ENABLE)\n#if !defined(__SBC_FUNC_IN_ROM__)\n\t\t*:sbc.o(.text.sbc_is_stream_info_valid)\n\t\t*:sbc.o(.text.sbc_frame_length_get)\n\t\t*:sbc.o(.text.sbc_4bit_crc_calc)\n\t\t*:sbc.o(.text.sbc_bits_for_mono_alloc)\n\t\t*:sbc.o(.text.sbc_bits_for_stereo_alloc)\n\t\t*:sbc.o(.text.sbc_header_process)\n\t\t*:sbc.o(.text.sbc_factors_process)\n\t\t*:sbc.o(.text.sbc_sample_extract)\n\t\t*:sbc.o(.text.sbc_sbsamples_make)\n\t\t*:sbc.o(.text.sbc_joint_process)\n\t\t*:sbc.o(.text.sbc_4band_synth_filter)\n\t\t*:sbc.o(.text.sbc_8band_synth_filter)\n\t\t*:sbc.o(.text.sbc_decoder_state_reset)\n\t\t*:sbc.o(.text.sbc_frame_mute)\n\t\t*:sbc.o(.text.sbc_frames_decode)\n#endif\n\t\t*:sbc_math.o(.text*)\n#endif\n#if !defined(A2DP_AAC_ON) && !defined(A2DP_LHDC_ON)\n\t\t*:fir_process.o(.text*)\n\t\t*:iir_process.o(.text.iir_run .text.*iir_run_per_*)\n#else\n\t\t/* libc_nano.a(lib_a-memmove.o) or memmove.o */\n\t\t*memmove.o(.text*)\n\t\t*:utils.o(.text*)\n\t\t*:cqueue.o(.text*)\n#endif\n\t\t*(.fast_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__fast_sram_text_data_end__ = .;\n\t} > FRAMX\n\t__fast_sram_text_data_end_flash__ = __fast_sram_text_data_start_flash__ + SIZEOF(.fast_text_sram);\n\n\t__overlay_text_start__ = RAMX_TO_RAM(__fast_sram_text_data_end__);\n\t__overlay_text_exec_start__ = RAM_TO_RAMX(__overlay_text_start__);\n\tOVERLAY (__overlay_text_exec_start__) : NOCROSSREFS AT (__fast_sram_text_data_end_flash__)\n\t{\n\t\t.overlay_text0\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:preprocess.o(.text.speex_preprocess_run)\n\t\t\t*:fftwrap.o(.text*)\n\t\t\t*:mdf.o(.text.speex_echo_cancellation)\n\t\t\t*:plc.o(.text*)\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.text*)\n#endif\n#if defined(HFP_1_6_ENABLE) && defined(__SBC_FUNC_IN_ROM__)\n\t\t\t*:sbc.o(.text.sbc_encoder_init)\n\t\t\t*:sbc.o(.text.sbc_filter_4band_analysis)\n\t\t\t*:sbc.o(.text.sbc_filter_8band_analysis)\n\t\t\t*:sbc.o(.text.sbc_factors_calc)\n\t\t\t*:sbc.o(.text.sbc_header_make)\n\t\t\t*:sbc.o(.text.sbc_sample_pack)\n\t\t\t*:sbc.o(.text.sbc_samples_quant)\n\t\t\t*:sbc.o(.text.sbc_frames_encode)\n#endif\n\t\t\t*(.overlay_text0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.text.sbc_is_stream_info_valid)\n\t\t\t*:sbc.o(.text.sbc_frame_length_get)\n\t\t\t*:sbc.o(.text.sbc_4bit_crc_calc)\n\t\t\t*:sbc.o(.text.sbc_bits_for_mono_alloc)\n\t\t\t*:sbc.o(.text.sbc_bits_for_stereo_alloc)\n\t\t\t*:sbc.o(.text.sbc_header_process)\n\t\t\t*:sbc.o(.text.sbc_factors_process)\n\t\t\t*:sbc.o(.text.sbc_sample_extract)\n\t\t\t*:sbc.o(.text.sbc_sbsamples_make)\n\t\t\t*:sbc.o(.text.sbc_joint_process)\n\t\t\t*:sbc.o(.text.sbc_4band_synth_filter)\n\t\t\t*:sbc.o(.text.sbc_8band_synth_filter)\n\t\t\t*:sbc.o(.text.sbc_decoder_state_reset)\n\t\t\t*:sbc.o(.text.sbc_frame_mute)\n\t\t\t*:sbc.o(.text.sbc_frames_decode)\n\t\t\t*:sbc_math.o(.text*)\n#endif\n\t\t\t*:fixedpoint.o(.text*)\n\t\t\t*:replaygain.o(.text*)\n\t\t\t*:dsp_core.o(.text*)\n\t\t\t*:dsp_misc.o(.text*)\n\t\t\t*:dsp_filter.o(.text*)\n\t\t\t*:dsp_sample_input.o(.text*)\n\t\t\t*:dsp_sample_output.o(.text*)\n\t\t\t*:eq.o(.text*)\n\t\t\t*:pga.o(.text*)\n#if !defined(A2DP_AAC_ON) && !defined(A2DP_LHDC_ON)\n\t\t\t*:fir_process.o(.text*)\n\t\t\t*:iir_process.o(.text.iir_run .text.*iir_run_per_*)\n#endif\n#endif\n\t\t\t*(.overlay_a2dp_sbc*)\n\t\t\t*(.overlay_text1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fmdec.o(.text* .data* .rodata* .bss*)\n\t\t\t*(.overlay_text2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.text*)\n\t\t\t*(.overlay_text3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:aacdec.o(.text*)\n\t\t\t*:aactabs.o(.text*)\n\t\t\t*:bitstream.o(.text*)\n\t\t\t*:buffers.o(.text*)\n\t\t\t*:dct4.o(.text*)\n\t\t\t*:decelmnt.o(.text*)\n\t\t\t*:dequant.o(.text*)\n\t\t\t*:fft.o(.text*)\n\t\t\t*:filefmt.o(.text*)\n\t\t\t*:huffman.o(.text*)\n\t\t\t*:hufftabs.o(.text*)\n\t\t\t*:imdct.o(.text*)\n\t\t\t*:noiseless.o(.text*)\n\t\t\t*:pns.o(.text*)\n\t\t\t*:stproc.o(.text*)\n\t\t\t*:tns.o(.text*)\n\t\t\t*:trigtabs.o(.text*)\n\t\t\t*:trigtabs_fltgen.o(.text*)\n#endif\n\t\t\t*(.overlay_a2dp_aac*)\n\t\t\t*(.overlay_text4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text6\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text7)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > FRAMX\n\n\t.dummy_overlay_text (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_text_end__ = .;\n\t} > FRAMX\n\n\tASSERT(__dummy_overlay_text_end__ - __fast_sram_text_data_start__ <= FAST_XRAM_SECTION_SIZE, \"fast xram sections too large\")\n\t__free_fram = FAST_XRAM_SECTION_SIZE - (__dummy_overlay_text_end__ - __fast_sram_text_data_start__);\n\n\t__overlay_data_start__ = __sram_bss_end__;\n\tOVERLAY (__overlay_data_start__) : NOCROSSREFS AT (__load_stop_overlay_text_end)\n\t{\n\t\t.overlay_data0\n\t\t{\n\t\t\t/* Explicitly place 4 bytes at section start to avoid \"section type changed to PROGBITS\" warnings */\n\t\t\tLONG(0);\n\t\t\t*:preprocess.o(.data* .rodata*)\n\t\t\t*:filterbank.o(.data* .rodata*)\n\t\t\t*:kiss_fft.o(.data* .rodata*)\n\t\t\t*:kiss_fftr.o(.data* .rodata*)\n\t\t\t*:fftwrap.o(.data* .rodata*)\n\t\t\t*:mdf.o(.data* .rodata*)\n\t\t\t*:plc.o(.data* .rodata*)\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.data* .rodata* .bss*)\n#endif\n\t\t\t*(.overlay_data0 .overlay_rodata0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\n\t\t.overlay_data1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.data* .rodata*)\n\t\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n\t\t\t*:fixedpoint.o(.data* .rodata*)\n\t\t\t*:replaygain.o(.data* .rodata*)\n\t\t\t*:dsp_core.o(.data* .rodata*)\n\t\t\t*:dsp_misc.o(.data* .rodata*)\n\t\t\t*:dsp_filter.o(.data* .rodata*)\n\t\t\t*:dsp_sample_input.o(.data* .rodata*)\n\t\t\t*:dsp_sample_output.o(.data* .rodata*)\n\t\t\t*:eq.o(.data* .rodata*)\n\t\t\t*:pga.o(.data* .rodata*)\n#if !defined(A2DP_AAC_ON)\n\t\t\t*:fir_process.o(.data* .rodata*)\n#endif\n#endif\n\t\t\t*(.overlay_data1 .overlay_rodata1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data2 .overlay_rodata2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.data* .rodata*)\n\t\t\t*(.overlay_data3 .overlay_rodata3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:aacdec.o(.data*)\n\t\t\t*:aactabs.o(.data*)\n\t\t\t*:bitstream.o(.data*)\n\t\t\t*:dct4.o(.data*)\n\t\t\t*:decelmnt.o(.data*)\n\t\t\t*:dequant.o(.data*)\n\t\t\t*:fft.o(.data*)\n\t\t\t*:filefmt.o(.data*)\n\t\t\t*:huffman.o(.data*)\n\t\t\t*:hufftabs.o(.data*)\n\t\t\t*:imdct.o(.data*)\n\t\t\t*:noiseless.o(.data*)\n\t\t\t*:pns.o(.data*)\n\t\t\t*:stproc.o(.data*)\n\t\t\t*:tns.o(.data*)\n\t\t\t*:trigtabs.o(.data*)\n\t\t\t*:trigtabs_fltgen.o(.data*)\n\t\t\t*:buffers.o(.data* . .rodata*)\n#endif\n\t\t\t*(.overlay_data4 .overlay_rodata4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data5 .overlay_rodata5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data6\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data6 .overlay_rodata6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data7 .overlay_rodata7)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > RAM\n\n\t.dummy_overlay_data (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_data_end__ = .;\n\t} > RAM\n\n\t__overlay_bss_start__ = __dummy_overlay_data_end__;\n\tOVERLAY (__overlay_bss_start__) :NOCROSSREFS AT (__load_stop_overlay_data_end)\n\t{\n\t\t.overlay_bss0\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:voicebtpcmplay.o(.bss*)\n\t\t\t*:preprocess.o(.bss*)\n\t\t\t*:filterbank.o(.bss*)\n\t\t\t*:kiss_fft.o(.bss*)\n\t\t\t*:kiss_fftr.o(.bss*)\n\t\t\t*:fftwrap.o(.bss*)\n\t\t\t*:mdf.o(.bss*)\n\t\t\t*:plc.o(.bss*)\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.bss*)\n#endif\n\t\t\t*(.overlay_bss0 .overlay_rwbss0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\n\t\t.overlay_bss1\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_bss1 .overlay_rwbss1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_bss2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_bss2 .overlay_rwbss2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_bss3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.data* .rodata*)\n\t\t\t*(.overlay_bss3 .overlay_rwbss3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_bss4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:aacdec.o(.bss*)\n\t\t\t*:aactabs.o(.bss*)\n\t\t\t*:bitstream.o( .bss*)\n\t\t\t*:dct4.o( .bss*)\n\t\t\t*:decelmnt.o( .bss*)\n\t\t\t*:dequant.o( .bss*)\n\t\t\t*:fft.o(.bss*)\n\t\t\t*:filefmt.o(.bss*)\n\t\t\t*:huffman.o(.bss*)\n\t\t\t*:hufftabs.o(.bss*)\n\t\t\t*:imdct.o(.bss*)\n\t\t\t*:noiseless.o(.bss*)\n\t\t\t*:pns.o(.bss*)\n\t\t\t*:stproc.o(.bss*)\n\t\t\t*:tns.o(.bss*)\n\t\t\t*:trigtabs.o(.bss*)\n\t\t\t*:trigtabs_fltgen.o(.bss*)\n\t\t\t*:buffers.o(.bss*)\n\t\t\t*:a2dpplay.o(.bss.*raw_aac_pcm_data)\n#endif\n\t\t\t*(.overlay_bss4 .overlay_rwbss4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_bss5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_bss5 .overlay_rwbss5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_bss6\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_bss6 .overlay_rwbss6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_bss7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_bss7 .overlay_rwbss7)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_bss_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > RAM\n\n\t.dummy_overlay_bss (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_bss_end__ = .;\n\t} > RAM\n\n\t.text (FLASH_TO_FLASHX(__load_stop_overlay_bss_end)) : AT (FLASHX_TO_FLASH(ADDR(.text)))\n\t{\n\t\t*(.text*)\n\t\t*(.flash_text*)\n\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n\t} > FLASHX\n\n\t.ARM.extab (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.extab)))\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > FLASHX\n\n\t__exidx_start = .;\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.exidx)))\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > FLASHX\n\t__exidx_end = .;\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.rodata (.) :\n\t{\n\t\t*(.rodata*)\n\t\t*(.flash_rodata*)\n\t\tKEEP(*(.eh_frame*))\n\t\t*(.note.gnu.build-id)\n\t} > FLASH\n\n#ifdef TRACE_STR_SECTION\n\t.trc_str (.) :\n\t{\n\t\t*(.trc_str*)\n\t} > FLASH\n#endif\n\n\t.custom.cmd.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__custom_handler_table_start = .;\n\t\tKEEP(*(.custom_handler_table))\n\t\t__custom_handler_table_end = .;\n\t} > FLASH\n\n\t.thirdparty.event.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__thirdparty_handler_table_start = .;\n\t\tKEEP(*(.thirdparty_handler_table))\n\t\t__thirdparty_handler_table_end = .;\n\t} > FLASH\n\n#if defined(FIRMWARE_REV)\n\t.firmware_rev (.) :\n\t{\n\t\t. = ALIGN(64);\n\t\t*(.fw_rev)\n\t} > FLASH\n#endif\n\n\t/* To copy multiple FLASH to RAM sections,\n\t * uncomment .copy.table section and,\n\t * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.copy.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__copy_table_start__ = .;\n\t\tLONG (__etext)\n\t\tLONG (__data_start__)\n\t\tLONG (__data_end__ - __data_start__)\n\t\tLONG (__etext2)\n\t\tLONG (__data2_start__)\n\t\tLONG (__data2_end__ - __data2_start__)\n\t\t__copy_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t/* To clear multiple BSS sections,\n\t * uncomment .zero.table section and,\n\t * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.zero.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__zero_table_start__ = .;\n\t\tLONG (__bss_start__)\n\t\tLONG (__bss_end__ - __bss_start__)\n\t\tLONG (__bss2_start__)\n\t\tLONG (__bss2_end__ - __bss2_start__)\n\t\t__zero_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t__etext = .;\n\n\t.data : AT (__etext)\n\t{\n\t\t__data_start__ = .;\n\t\t*(vtable)\n\t\t*(.data*)\n\n\t\t. = ALIGN(4);\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\t\t. = ALIGN(4);\n\t\t/* All data end */\n\t\t__data_end__ = .;\n\n\t} > RAM\n\n\t.bss (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__bss_end__ = .;\n\t} > RAM\n\n\t.heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__HeapBase = .;\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t\t__HeapLimit = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM);\n\t__StackLimit = __StackTop - SIZEOF(.stack_dummy);\n\tPROVIDE(__stack = __StackTop);\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__StackLimit >= __HeapLimit, \"region RAM overflowed with stack\")\n\t__free_ram = __StackLimit - __HeapLimit;\n\n\t. = __etext + SIZEOF(.data);\n\n\t.system_info (.) :\n\t{\n\t\tKEEP(*(.system_info_list_size))\n\t\tKEEP(*(.system_info_list))\n\t\t. = ALIGN(4);\n\t}  > FLASH\n\n\t.build_info (.) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ALIGN(4);\n\t} > FLASH = 0x00000000\n\n#ifdef SLAVE_BIN_FLASH_OFFSET\n\t.slave_code (ORIGIN(FLASH) + SLAVE_BIN_FLASH_OFFSET):\n\t{\n\t\tKEEP(*(.slave_code_flash_rodata))\n\t} > FLASH\n#endif\n\n\t/* The following section be the last loaded section */\n\t.code_start_addr (.) :\n\t{\n\t\tLONG(BUILD_INFO_MAGIC);\n\t\tLONG(ABSOLUTE(__flash_start));\n\t} > FLASH\n\n\t__flash_end = .;\n\n\n\t.crash_dump (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t  AUD_SECTION_SIZE -  USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__crash_dump_start = .;\n\t\t. = CRASH_DUMP_SECTION_SIZE;\n\t\t__crash_dump_end = .;\n\t} > FLASH_NC\n\n\t.custom_parameter (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t AUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__custom_parameter_start = .;\n\t\t. = CUSTOM_PARAMETER_SECTION_SIZE;\n\t\t__custom_parameter_end = .;\n\t} > FLASH_NC\n\n\t.userdata (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2) (NOLOAD) :\n\t{\n\t\t__userdata_start = .;\n\t\t. = USERDATA_SECTION_SIZE*2;\n\t\t__userdata_end = .;\n\t} > FLASH_NC\n\n\t.audio (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE -\n\tAUD_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__aud_start = .;\n\t\t. = AUD_SECTION_SIZE;\n\t\t__aud_end = .;\n\t} > FLASH_NC\n\n\t.reserved (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__reserved_start = .;\n\t\t. = RESERVED_SECTION_SIZE;\n\t\t__reserved_end = .;\n\t} > FLASH_NC\n\n\t.factory (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__factory_start = .;\n\t\t. = FACTORY_SECTION_SIZE;\n\t\t__factory_end = .;\n\t} > FLASH_NC\n\n\tASSERT(FLASH_NC_TO_C(__crash_dump_start) >= __flash_end, \"region FLASH overflowed\")\n\t__free_flash = FLASH_NC_TO_C(__crash_dump_start) - __flash_end;\n}\n\n"
  },
  {
    "path": "scripts/link/best1000savepower.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#ifdef RB_CODEC\n#define HEAP_SECTION_SIZE\t\t\t0x1000\n#else\n#define HEAP_SECTION_SIZE\t\t\t0x1000\n#endif\n\n#define STACK_SECTION_SIZE\t\t\t0xD00\n#define CP_STACK_SECTION_SIZE\t\t0x1000\n\n#if defined(ROM_UTILS_ON)\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n#define ROM_UTILS_RESV_RAM_SIZE     0x64\n#else\n#define ROM_UTILS_RESV_RAM_SIZE     0x0\n#endif\n#endif\n\n#ifdef RB_CODEC\n#define OVERLAY_DATA_SECTION_SIZE\t0xA000\n#else\n#define OVERLAY_DATA_SECTION_SIZE\t0x8000\n#endif\n\n#if (RAM_SIZE >= 0x48000)\n#define FAST_XRAM_SECTION_SIZE\t\t0x78000\n#endif\n\n/* TODO: Add FLASH_REGION_OFFSET if there are multiple levels of boot loaders */\n#if !defined(OTA_BOOT_SIZE) && defined(OTA_CODE_OFFSET)\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE + OTA_CODE_OFFSET)\n#else\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE)\n#endif\n\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE\t\t\t(FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n\n#define FLASH_NC_REGION_BASE\t\tFLASH_C_TO_NC(FLASH_REGION_BASE)\n#define FLASHX_REGION_BASE\t\t\tFLASH_TO_FLASHX(FLASH_REGION_BASE)\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n#define OVERLAY_FOR_CP\n#endif\n\n#ifdef OVERLAY_FOR_CP\n#define REGION_OVERLAY_TEXT\t\t\tRAMCPX\n#define REGION_OVERLAY_DATA\t\t\tRAMCP\n#else\n#define REGION_OVERLAY_TEXT\t\t\tFRAMX\n#define REGION_OVERLAY_DATA\t\t\tRAM\n#endif\n\n/* Linker script to configure memory regions. */\n/* See plat_addr_map.h and common.mk for the macro definitions */\nMEMORY\n{\n\tROM\t\t\t(rx)\t: ORIGIN = ROM_BASE,\t\t\t\tLENGTH = ROM_SIZE\n\tFLASH \t\t(r)\t\t: ORIGIN = FLASH_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tFLASH_NC\t(r)\t\t: ORIGIN = FLASH_NC_REGION_BASE,\tLENGTH = FLASH_REGION_SIZE\n\tFLASHX\t\t(rx)\t: ORIGIN = FLASHX_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tRAM\t\t\t(rwx)\t: ORIGIN = RAM_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tRAMX\t\t(rx)\t: ORIGIN = RAMX_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tFRAMX\t\t(rwx)\t: ORIGIN = RAMX_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE,\tLENGTH = FAST_XRAM_SECTION_SIZE\n#ifdef PSRAM_BASE\n\tPSRAM \t\t(rwx)\t: ORIGIN = PSRAM_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAM_NC\t(rwx)\t: ORIGIN = PSRAM_NC_BASE,\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAMX\t\t(rx)\t: ORIGIN = PSRAMX_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n#endif\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\tRAMCP \t\t(rwx)\t: ORIGIN = RAMCP_BASE,\t\t\t\tLENGTH = RAMCP_SIZE\n\tRAMCPX \t\t(rwx)\t: ORIGIN = RAMCPX_BASE,\t\t\t\tLENGTH = RAMCPX_SIZE\n#endif\n}\n\n/* Library configurations */\nGROUP(libgcc.a libc.a libm.a libnosys.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions FLASH and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exidx_start\n *   __exidx_end\n *   __copy_table_start__\n *   __copy_table_end__\n *   __zero_table_start__\n *   __zero_table_end__\n *   __etext\n *   __data_start__\n *   __preinit_array_start\n *   __preinit_array_end\n *   __init_array_start\n *   __init_array_end\n *   __fini_array_start\n *   __fini_array_end\n *   __data_end__\n *   __bss_start__\n *   __bss_end__\n *   __end__\n *   end\n *   __HeapLimit\n *   __StackLimit\n *   __StackTop\n *   __stack\n *   __free_ram\n *   __factory_start\n *   __factory_end\n *   __calib_start\n *   __calib_end\n *   __flash_start\n *   __flash_end\n *   __free_flash\n *   __boot_sram_start_flash__\n *   __boot_sram_end_flash__\n *   __boot_sram_start__\n *   __boot_bss_sram_start__\n *   __boot_bss_sram_end__\n *   __sram_text_data_start_flash__\n *   __sram_text_data_end_flash__\n *   __fast_sram_text_data_start__\n *   __fast_sram_text_data_end__\n *   __fast_sram_text_data_start_flash__\n *   __fast_sram_text_data_end_flash__\n *   __sram_text_data_start__\n *   __sram_bss_start__\n *   __sram_bss_end__\n *   __overlay_text_start__\n *   __overlay_text_exec_start__\n *   __overlay_data_start__\n */\nENTRY(Boot_Loader)\n\nSECTIONS\n{\n\t__export_fn_rom = (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE);\n\n\t.boot_struct (ORIGIN(FLASH)) :\n\t{\n\t\t__flash_start = .;\n\t\tKEEP(*(.boot_struct))\n\t\t. = ALIGN(4);\n\t} > FLASH\n\n\t. = FLASH_TO_FLASHX(.);\n\n\t.boot_text_flash (.) : AT (FLASHX_TO_FLASH(ADDR(.boot_text_flash)))\n\t{\n\t\t*(.boot_loader)\n\t\t*(.boot_text_flash*)\n\t\t*(.boot_rodata*)\n\t\t. = ALIGN(4);\n\t} > FLASHX\n\n#if defined(__BES_OTA_MODE__)\n\t.ota_boot_info (ALIGN(4096)) :\n\t{\n\t\t*(.ota_boot_info)\n\t\t. = (0x1000);\n\t} > FLASHX\n\n\t.ota_boot_rev (ALIGN(4096)) :\n\t{\n\t\t*(.ota_boot_rev)\n\t\t. = (0x1000);\n\t} > FLASHX\n#endif\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.got_info (.) :\n\t{\n\t\t__got_info_start = .;\n\t\t__got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__got_end = .;\n\t\t__got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__got_info_end = .;\n\t} > FLASH\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.userdata_pool (.) (NOLOAD) :\n\t{\n\t\t*(.userdata_pool)\n\t\t. = ALIGN(4);\n\t\t__userdata_pool_end__ = .;\n\t} > RAM\n\n\t__boot_sram_start_flash__ = LOADADDR(.got_info) + SIZEOF(.got_info);\n\t__boot_sram_start__ = __userdata_pool_end__;\n\n\t.boot_text_sram (RAM_TO_RAMX(__boot_sram_start__)) : AT (__boot_sram_start_flash__)\n\t{\n\t\t/* memcpy.o or libc_nano.a(lib_a-memcpy.o/lib_a-memcpy-stub.o) */\n\t\t*:memcpy.o(.text*)\n\t\t*:lib_a-memcpy*.o(.text*)\n\t\t*:libc_rom.o(.text*)\n\n\t\t/* memset.o or libc_nano.a(lib_a-memset.o) */\n\t\t*:memset.o(.text*)\n\t\t*:lib_a-memset*.o(.text*)\n\n\t\t*:hal_norflash*.o(.text*)\n\t\t*:norflash_*.o(EXCLUDE_FILE(*:norflash_api.o) .text*)\n\n#ifdef BOOT_CODE_IN_RAM\n\t\t*:hal_cmu_*.o(.text*)\n\t\t*:hal_iomux_*.o(.text*)\n\t\t*:hal_analogif_*.o(.text*)\n\t\t*:hal_spi.o(.text*)\n\t\t*:hal_timer.o(.text*)\n\t\t*:hal_sysfreq.o(.text*)\n#endif\n            *:hal_iomux_best2300p.o(.text* .rodata*)\n            *:hal_analogif_best2300p.o(.text* .rodata*)\n            *:hal_timer.o(.text* .rodata*)\n            *:hal_spi.o(.text* .rodata*)\n            *:hal_sysfreq.o(.text* .rodata*)\n            *:hal_cmu_best2300p.o(.text* .rodata*)\n            *:hal_cmu_common.o(.text* .rodata*)\n            *:hal_chipid.o (.text* .rodata)\n            *:hal_cache.o (.text* .rodata)\n            *:hal_btpcm.o (.text* .rodata)\n            *:hal_bootmode.o (.text* .rodata)\n\n\t\t*(.boot_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__boot_text_sram_end = .;\n\t} > RAMX\n\n\t.boot_data_sram (RAMX_TO_RAM(ADDR(.boot_text_sram) + SIZEOF(.boot_text_sram))) :\n\t\t\t\t\tAT (__boot_sram_start_flash__ + SIZEOF(.boot_text_sram))\n\t{\n\t\t*:hal_norflash*.o(.data* .rodata*)\n\t\t*:norflash_*.o(EXCLUDE_FILE(*:norflash_api.o) .data* EXCLUDE_FILE(*:norflash_api.o) .rodata*)\n\t\t*:hal_psram.o(.data* .rodata*)\n\t\t*(.boot_data*)\n\t\t. = ALIGN(4);\n\t\t__boot_data_sram_end = .;\n\t} > RAM\n\n\t__boot_sram_end_flash__ = __boot_sram_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.boot_text_sram) + SIZEOF(.boot_data_sram);\n\n\t.boot_bss_sram (.) (NOLOAD) :\n\t{\n\t\t__boot_bss_sram_start__ = .;\n\t\t*:hal_norflash*.o(.bss*)\n\t\t*:norflash_*.o(EXCLUDE_FILE(*:norflash_api.o) .bss*)\n\t\t*:hal_psram.o(.bss*)\n\t\t*(.boot_bss*)\n\t\t. = ALIGN(4);\n\t\t__boot_bss_sram_end__ = .;\n\t} > RAM\n\n\t__sram_text_data_start_flash__ = __boot_sram_end_flash__;\n\t__sram_text_data_start__ = __boot_bss_sram_end__;\n\n\t.sram_text (RAM_TO_RAMX(__sram_text_data_start__)) : AT (__sram_text_data_start_flash__)\n\t{\n\t\t*:norflash_api.o(.text*)\n\t\t*(.sram_text*)\n\t\t. = ALIGN(4);\n\t} > RAMX\n\n\t.sram_data (RAMX_TO_RAM(ADDR(.sram_text) + SIZEOF(.sram_text))) :\n\t\t\t\tAT (__sram_text_data_start_flash__ + SIZEOF(.sram_text))\n\t{\n#if defined(GLOBAL_SRAM_KISS_FFT)\n\t\t\t*:fftwrap.o(.data* .rodata*)\n\t\t\t*:kiss_fft.o(.data* .rodata*)\n\t\t\t*:kiss_fftr.o(.data* .rodata*)\n#endif\n\n#if defined(GLOBAL_SRAM_CMSIS_FFT)\n\t\t*:arm_common_tables.o(.rodata.armBitRevIndexTable256)\n\t\t*:arm_common_tables.o(.rodata.twiddleCoef_256)\n\t\t*:arm_common_tables.o(.rodata.twiddleCoef_rfft_512)\n\t\t*:arm_common_tables.o(.rodata.armBitRevIndexTable128)\n\t\t*:arm_common_tables.o(.rodata.twiddleCoef_128)\n\t\t*:arm_common_tables.o(.rodata.twiddleCoef_rfft_256)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_usb.o(.rodata*)\n#endif\n\t\t*:utils.o(.data* .rodata*)\n\t\t*:cqueue.o(.data* .rodata*)\n\t\t*:iir_process.o(.data* .rodata*)\n#if defined(HFP_1_6_ENABLE)\n\t\t*:sbcplc.o(.data* .rodata*)\n\t\t*:sbc.o(.data* .rodata*)\n\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n#if defined(A2DP_AAC_ON)\n\t\t*:fixpoint_math.o(.data* .rodata*)\n\t\t*:FDK_bitbuffer.o(.data* .rodata*)\n#endif\n\t\t*:crossover_filter.o(.data* .rodata*)\n\t\t*:exp_func_tables.o(.data* .rodata*)\n#if defined(KWS_BES)\n\t\t*:cnn.o(.data* .rodata.second_conv_wt)\n\t\t*:command_recognition.o(.data* .rodata*)\n\t\t*:arm_bitreversal_16.o(.data* .rodata*)\n\t\t*:arm_cfft_radix8_f32.o(.data* .rodata*)\n\t\t*:arm_bitreversal2.o(.data* .rodata*)\n\t\t*:arm_mult_f32.o(.data* .rodata*)\n\t\t*:arm_cmplx_mag_squared_f32.o(.data* .rodata*)\n\t\t*:arm_cmplx_mult_cmplx_f32.o(.data* .rodata*)\n\t\t*:arm_abs_f32.o(.data* .rodata*)\n\t\t*:arm_cos_f32.o(.data* .rodata*)\n\t\t*:arm_sin_f32.o(.data* .rodata*)\n#endif\n\t\t*:norflash_api.o(.rodata*)\n\t\t*(.sram_data*)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__sram_text_data_end_flash__ = __sram_text_data_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.sram_text) + SIZEOF(.sram_data);\n\n\t.sram_bss (.) (NOLOAD) :\n\t{\n\t\t__sram_bss_start__ = .;\n\t\t*:utils.o(.bss*)\n\t\t*(.sram_bss*)\n\t\t. = ALIGN(4);\n\t\t__sram_bss_end__ = .;\n\t} > RAM\n\n\t__fast_sram_text_data_start_flash__ = __sram_text_data_end_flash__;\n\n\t.fast_text_sram (ORIGIN(FRAMX)) : AT (__fast_sram_text_data_start_flash__)\n\t{\n\t\t__fast_sram_text_exec_start__ = .;\n\n#if defined(GLOBAL_SRAM_KISS_FFT)\n\t\t*:fftwrap.o(.text*)\n\t\t*:kiss_fft.o(.text*)\n\t\t*:kiss_fftr.o(.text*)\n#endif\n\n#if defined(GLOBAL_SRAM_CMSIS_FFT)\n\t\t*:cmsis_fftwrap.o(.text*)\n\t\t*:arm_rfft_fast_f32.o(.text*)\n\t\t*:arm_cfft_f32.o(.text*)\n#endif\n\n\n#if defined(ROM_UTILS_ON)\n\t\t*:rom_utils.o(.text*)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_dma.o(.text*)\n\t\t*:hal_uart.o(.text*)\n\t\t*:hal_trace.o(.text*)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_usb.o(.text*)\n\n\t\t*:usb_audio.o(.text*)\n\t\t*:usb_audio_sync.o(.text*)\n\t\t*:usb_audio_cdc.o(.text*)\n\n\t\t*:usbaudio_entry.o(.text*)\n\t\t*:usb_audio_app.o(.text*)\n#endif\n\n\t\t/* memmove.o or libc_nano.a(lib_a-memmove.o) */\n\t\t*:memmove.o(.text*)\n\t\t*:lib_a-memmove.o(.text*)\n\t\t*:utils.o(.text*)\n\t\t*:cqueue.o(.text*)\n\t\t*:audio_resample_ex.o(.text*)\n#if defined(MIX_MIC_DURING_MUSIC)\n\t\t*:app_bt_stream.o(.text*)\n#endif\n#if defined(HFP_1_6_ENABLE)\n#if defined(__SBC_FUNC_IN_ROM__)\n\t\t*:sbc.o(.text*)\n#else\n\t\t*:sbc.o(.text.SbcIsValidStreamInfo)\n\t\t*:sbc.o(.text.SBC_FrameLen)\n\t\t*:sbc.o(.text.SbcCrcSum4)\n\t\t*:sbc.o(.text.SbcMonoBitAlloc)\n\t\t*:sbc.o(.text.SbcStereoBitAlloc)\n\t\t*:sbc.o(.text.SbcParseHeader)\n\t\t*:sbc.o(.text.SbcParseScaleFactors)\n\t\t*:sbc.o(.text.SbcUnpackSample)\n\t\t*:sbc.o(.text.SbcBuildSubbandSamples)\n\t\t*:sbc.o(.text.SbcJointProcessing)\n\t\t*:sbc.o(.text.SbcSynthesisFilter4)\n\t\t*:sbc.o(.text.SbcSynthesisFilter8)\n\t\t*:sbc.o(.text.SbcResetDecoderState)\n\t\t*:sbc.o(.text.SbcMuteFrame)\n\t\t*:sbc.o(.text.SBC_DecodeFrames)\n\t\t*:sbc.o(.text.SbcQuantizeSamples)\n\t\t*:sbc.o(.text.SBC_InitDecoder)\n\t\t*:sbc.o(.text.SBC_InitEncoder)\n\t\t*:sbc.o(.text.SBC_EncodeFrames)\n#endif\n\t\t*:sbc_math.o(.text*)\n#endif\n#if defined(A2DP_AAC_ON)\n\t\t*:fixpoint_math.o(.text*)\n\t\t*:FDK_bitbuffer.o(.text*)\n\t\t*:FDK_tools_rom.o(.text*FDKgetWindowSlope*)\n\t\t*:FDK_tools_rom.o(.text*getBitstreamElementList*)\n\t\t*:dct.o(.text*dct_IV*)\n#if !defined(__SBC_FUNC_IN_ROM_VBEST2000__)\n\t\t*:fft.o(.text._Z3fftiPlPi)\n\t\t*:fft_rad2.o(.text*dit_fft*)\n\t\t*:dct.o(.text*getTables*)\n#endif\n#ifdef VOICE_DATAPATH\n\t\t*:opus_encoder.o(.text*)\n#else\n#if defined(__AI_VOICE__) && (RAM_SIZE >= 0x48000)\n\t\t*:voice_opus.o(.text*)\n\t\t/**:opus_encoder.o(.text*)*/\n\t\t*:opus_encoder.o(.text.frame_size_select)\n\t\t*:opus_encoder.o(.text.opus_encode_native)\n\t\t*:opus_encoder.o(.text.user_bitrate_to_bitrate)\n\t\t*:opus_encoder.o(.text.compute_equiv_rate)\n\t\t*:opus_encoder.o(.text.decide_fec)\n\t\t*:opus_encoder.o(.text.dc_reject)\n\t\t*:opus_encoder.o(.text.gen_toc)\n\t\t*:opus_encoder.o(.text.opus_encode)\n\t\t*:opus_encoder.o(.text.opus_encoder_create)\n\t\t*:opus_encoder.o(.text.opus_encoder_get_size)\n\t\t*:opus_encoder.o(.text.opus_encoder_init)\n\t\t*:opus_encoder.o(.text.opus_encoder_ctl)\n\t\t*:analysis.o(.text*)\n\t\t/**:celt_encoder.o(.text*)*/\n\t\t*:celt_encoder.o(.text.opus_custom_encoder_ctl)\n\t\t*:celt_encoder.o(.text.celt_encoder_get_size)\n\t\t*:celt_encoder.o(.text.opus_custom_encoder_get_size)\n\t\t*:celt_encoder.o(.text.celt_encoder_init)\n\t\t*:celt_encoder.o(.text.opus_custom_encoder_init_arch)\n\t\t/**:repacketizer.o(.text*)*/\n\t\t*:repacketizer.o(.text.opus_packet_pad)\n\t\t*:repacketizer.o(.text.opus_repacketizer_init)\n\t\t*:repacketizer.o(.text.opus_repacketizer_cat)\n\t\t*:repacketizer.o(.text.opus_repacketizer_cat_impl)\n\t\t*:repacketizer.o(.text.opus_repacketizer_out_range_impl)\n\t\t*:opus.o(.text*)\n\t\t*:enc_API.o(.text*)\n\t\t/**:entenc.o(.text*)*/\n\t\t*:entenc.o(.text.ec_enc_init)\n\t\t*:entenc.o(.text.ec_enc_icdf)\n\t\t*:entenc.o(.text.ec_enc_normalize)\n\t\t*:entenc.o(.text.ec_enc_carry_out)\n\t\t*:entenc.o(.text.ec_write_byte)\n\t\t*:entenc.o(.text.ec_enc_patch_initial_bits)\n\t\t*:entenc.o(.text.ec_enc_done)\n\t\t*:control_audio_bandwidth.o(.text*)\n\t\t*:encode_pulses.o(.text*)\n\t\t*:LPC_analysis_filter.o(.text*)\n\t\t*:burg_modified_FIX.o(.text.silk_burg_modified_c)\n\t\t*:vector_ops_FIX.o(.text.silk_scale_copy_vector16)\n\t\t*:vector_ops_FIX.o(.text.silk_inner_prod_aligned)\n\t\t*:vector_ops_FIX.o(.text.silk_inner_prod16_aligned_64_c)\n\t\t*:NLSF_del_dec_quant.o(.text.silk_NLSF_del_dec_quant)\n\t\t*:encode_frame_FIX.o(.text.silk_encode_frame_FIX)\n\t\t*:encode_frame_FIX.o(.text.silk_encode_do_VAD_FIX)\n\t\t*:encode_frame_FIX.o(.text.silk_LBRR_encode_FIX)\n\t\t/**:pitch.o(.text*)*/\n\t\t*:pitch.o(.text.celt_pitch_xcorr_c)\n\t\t*:resampler.o(.text*)\n\t\t*:VAD.o(.text*)\n\t\t*:encode_indices.o(.text*)\n\t\t/**:control_codec.o(.text*)*/\n\t\t*:control_codec.o(.text.silk_control_encoder)\n\t\t*:control_codec.o(.text.silk_setup_resamplers)\n\t\t*:control_codec.o(.text.silk_setup_fs)\n\t\t*:control_codec.o(.text.silk_setup_complexity)\n\t\t*:control_codec.o(.text.silk_setup_LBRR)\n\t\t/**:celt_lpc.o(.text*)*/\n\t\t*:celt_lpc.o(.text._celt_autocorr)\n\t\t/**:shell_coder.o(.text*)*/\n\t\t*:shell_coder.o(.text.combine_pulses)\n\t\t*:shell_coder.o(.text.silk_shell_encoder)\n\t\t*:shell_coder.o(.text.encode_split)\n\t\t*:init_encoder.o(.text*)\n\t\t*:log2lin.o(.text*)\n\t\t*:biquad_alt.o(.text*)\n\t\t*:stereo_encode_pred.o(.text*)\n\t\t*:NLSF_unpack.o(.text*)\n\t\t*:code_signs.o(.text*)\n\t\t*:lin2log.o(.text*)\n\t\t*:HP_variable_cutoff.o(.text*)\n\t\t*:sum_sqr_shift.o(.text*)\n\t\t*:inner_prod_aligned.o(.text*)\n\t\t*:stereo_quant_pred.o(.text*)\n\t\t*:entcode.o(.text*)\n\t\t*:celt.o(.text*)\n\t\t*:laplace.o(.text*)\n\t\t/**:NSQ.o(.text*)*/ /*complexity 1*/\n\t\t/**:NSQ_del_dec.o(.text*)*/ /*complexity 2*/\n#endif\n#endif\n#endif\n\n#if defined(__AUDIO_SPECTRUM__)\n\t\t*:spectrum_fix.o(.text*)\n\t\t*:audio_spectrum.o(.text*)\n#endif\n\t\t*:mdct.o(.text*)\n\t\t*:crossover_filter.o(.text*)\n\t\t*:data_compressor.o(.text*)\n\t\t*:drc.o(.text*)\n\t\t*:limiter.o(.text*)\n#if defined(KWS_BES)\n\t\t*:arm_*.o(.text*)\n\t\t*:mfcc.o(.text*)\n\t\t*:cnn.o(.text*)\n\t\t*:command_recognition.o(.text*)\n\t\t*:arm_radix8_butterfly_f32.o(.text*)\n\t\t*:arm_bitreversal_32.o(.text*)\n\t\t*:arm_bitreversal_16.o(.text*)\n\t\t*:dct.o(.text*dct_IV*)\n\t\t*:fft.o(.text._Z3fftiPlPi)\n\t\t*:fft_rad2.o(.text*dit_fft*)\n\t\t*:dct.o(.text*getTables*)\n\t\t*:arm_cfft_radix8_f32.o(.text*)\n\t\t*:arm_bitreversal2.o(.text*)\n\t\t*:arm_mult_f32.o(.text*)\n\t\t*:arm_cmplx_mag_squared_f32.o(.text*)\n\t\t*:arm_cmplx_mult_cmplx_f32.o(.text*)\n\t\t*:lib_a-wf_sqrt.o(.text*)\n\t\t*:arm_abs_f32.o(.text*)\n\t\t*:arm_cos_f32.o(.text*)\n\t\t*:arm_sin_f32.o(.text*)\n#endif\n#if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t:audio_prompt_sbc.o(.text*)\n#endif\n\n\n        /*apps*/\n\n*:app_battery.o(.text* .rodata*)\n*:app_pwl.o(.text* .rodata*)\n*:app_key.o(.text* .rodata*)\n*:app_status_ind.o(.text* .rodata*)\n*:apps.o(.text* .rodata*)\n*:app_spec_ostimer.o(.text* .rodata*)\n*:app_utils.o(.text* .rodata*)\n*:app_thread.o(.text* .rodata*)\n*:app_audio.o(.text* .rodata*)\n*:plc_utils.o(.text* .rodata*)\n*:a2dp_decoder.o(.text* .rodata*)\n*:a2dp_decoder_sbc.o(.text* .rodata*)\n*:a2dp_decoder_aac_lc.o(.text* .rodata*)\n*:a2dp_decoder_cp.o(.text* .rodata*)\n\n/*cq*/\n*:cqueue.o(.text* .rodata*)\n/*heap api*/\n*:heap_api.o(.text* .rodata*)\n*:multi_heap.o(.text* .rodata*)\n*:pool_api.o(.text* .rodata*)\n/*hwtimer*/\n*:hwtimer_list.o(.text* .rodata*)\n/*kfifo*/\n*:kfifo.o(.text* .rodata*)\n/*list*/\n*:list.o(.text* .rodata*)\n\n\n*:sbcaac_dummy.o(.text* .rodata*)\n\n*:system_cp.o(.text* .rodata*)\n*:system_ARMCM.o(.text* .rodata*)\n*:patch.o(.text* .rodata*)\n*:cmsis_nvic.o(.text* .rodata*)\n*:arm_var_q31.o(.text* .rodata*)\n*:arm_var_q15.o(.text* .rodata*)\n*:arm_var_f32.o(.text* .rodata*)\n*:arm_std_q31.o(.text* .rodata*)\n*:arm_std_q15.o(.text* .rodata*)\n*:arm_std_f32.o(.text* .rodata*)\n*:arm_rms_q31.o(.text* .rodata*)\n*:arm_rms_q15.o(.text* .rodata*)\n*:arm_rms_f32.o(.text* .rodata*)\n*:arm_power_q7.o(.text* .rodata*)\n*:arm_power_q31.o(.text* .rodata*)\n*:arm_power_q15.o(.text* .rodata*)\n*:arm_power_f32.o(.text* .rodata*)\n*:arm_min_q7.o(.text* .rodata*)\n*:arm_min_q31.o(.text* .rodata*)\n*:arm_min_q15.o(.text* .rodata*)\n*:arm_min_f32.o(.text* .rodata*)\n*:arm_mean_q7.o(.text* .rodata*)\n*:arm_mean_q31.o(.text* .rodata*)\n*:arm_mean_q15.o(.text* .rodata*)\n*:arm_mean_f32.o(.text* .rodata*)\n*:arm_max_q7.o(.text* .rodata*)\n*:arm_max_q31.o(.text* .rodata*)\n*:arm_max_q15.o(.text* .rodata*)\n*:arm_max_f32.o(.text* .rodata*)\n*:arm_const_structs.o(.text* .rodata*)\n*:arm_common_tables.o(.text* .rodata*)\n*:arm_dot_prod_q15.o(.text* .rodata*)\n*:arm_biquad_cascade_df1_init_f32.o(.text* .rodata*)\n*:arm_fir_init_q15.o(.text* .rodata*)\n*:arm_fir_fast_q15.o(.text* .rodata*)\n*:arm_bitreversal2.o(.text* .rodata*)\n*:arm_cfft_q15.o(.text* .rodata*)\n*:arm_cfft_radix4_q15.o(.text* .rodata*)\n*:arm_cfft_radix8_f32.o(.text* .rodata*)\n*:arm_rfft_fast_init_f32.o(.text* .rodata*)\n*:arm_rfft_init_q15.o(.text* .rodata*)\n*:arm_rfft_q15.o(.text* .rodata*)\n*:arm_copy_q31.o(.text* .rodata*)\n*:arm_fill_q31.o(.text* .rodata*)\n*:arm_q15_to_float.o(.text* .rodata*)\n*:arm_dot_prod_q7.o(.text* .rodata*)\n*:arm_add_q15.o(.text* .rodata*)\n*:arm_shift_q15.o(.text* .rodata*)\n*:arm_negate_q15.o(.text* .rodata*)\n*:arm_offset_q15.o(.text* .rodata*)\n*:arm_mult_q15.o(.text* .rodata*)\n\n#if 1\n                    /*bt app*/\n                    *:a2dp_codec_scalable.o(.text* .rodata*)\n                    *:a2dp_codec_sbc.o(.text* .rodata*)\n                    *:a2dp_codec_opus.o(.text* .rodata*)\n                    *:codec_lhdc.o(.text* .rodata*)\n                    *:a2dp_codec_lhdc.o(.text* .rodata*)\n                    *:a2dp_codec_ldac.o(.text* .rodata*)\n                    *:a2dp_codec_aac.o(.text* .rodata*)\n                    *:app_a2dp_codecs.o(.text* .rodata*)\n                    *:app_a2dp.o(.text* .rodata*)\n                    *:app_bt.o(.text* .rodata*)\n                    *:app_bt_func.o(.text* .rodata*)\n                    *:app_bt_media_manager.o(.text* .rodata*)\n                    *:app_bt_stream.o(.text* .rodata*)\n                    *:app_keyhandle.o(.text* .rodata*)\n                    *:app_ring_merge.o(.text* .rodata*)\n                    *:app_sec.o(.text* .rodata*)\n                    *:app_spp.o(.text* .rodata*)\n                    *:audio_prompt_sbc.o(.text* .rodata*)\n                    *:besmain.o(.text* .rodata*)\n\n\n                    /*bt if*/\n                    *:bt_status_conv.o(.text* .rodata*)\n                    *:bt_if.o(.text* .rodata*)\n                    *:a2dp_api.o(.text* .rodata*)\n                    *:codec_sbc.o(.text* .rodata*)\n                    *:avrcp_api.o(.text* .rodata*)\n                    *:cmgr_api.o(.text* .rodata*)\n                    *:hci_api.o(.text* .rodata*)\n                    *:l2cap_api.o(.text* .rodata*)\n                    *:me_api.o(.text* .rodata*)\n                    *:utils.o(.text* .rodata*)\n                    *:sdp_api.o(.text* .rodata*)\n                    *:spp.o(.text* .rodata*)\n                    *:spp_api.o(.text* .rodata*)\n                    *:hfp_api.o(.text* .rodata*)\n                    *:os_api.o(.text* .rodata*)\n                    *:rfcomm_api.o(.text* .rodata*)\n                    *:bt_xtal_sync.o(.text* .rodata*)\n                    *:besaud_api.o(.text* .rodata*)\n#if 0\n                    /*bt prf*/\n                    *:a2dp.o(.text*)\n                    *:sbc.o(.text*)\n                    *:avctp.o(.text*)\n                    *:avrcp.o(.text*)\n                    *:besaud.o(.text*)\n                    *:besaudalloc.o(.text*)\n                    *:besaudcon.o(.text*)\n                    *:btm.o(.text*)\n                    *:btm_devicedb.o(.text*)\n                    *:btm_handle_hcievent.o(.text*)\n                    *:btm_sco_interface.o(.text*)\n                    *:btm_security.o(.text*)\n                    *:avdtp.o(.text*)\n                    *:connect.o(.text*)\n                    *:hfp.o(.text*)\n                    *:hshf.o(.text*)\n                    *:hsp.o(.text*)\n                    *:l2cap.o(.text*)\n                    *:l2cap_er.o(.text*)\n                    *:bt_common.o(.text*)\n                    *:co_lib.o(.text*)\n                    *:co_ppbuff.o(.text*)\n                    *:md5.o(.text*)\n                    *:obex.o(.text*)\n                    *:pbap.o(.text*)\n                    *:rfcomm.o(.text*)\n                    *:sco.o(.text*)\n                    *:sdp.o(.text*)\n                    *:co_printf.o(.text*)\n                    *:co_queue.o(.text*)\n                    *:co_timer.o(.text*)\n                    *:cobuf.o(.text*)\n                    *:bes_os.o(.text*)\n                    *:hci.o(.text*)\n                    *:hci_buff.o(.text*)\n                    *:bt_schedule.o(.text*)\n#else\n*:a2dp.o(.text* .rodata*)\n*:sbc.o(.text* .rodata*)\n*:avctp.o(.text* .rodata*)\n*:avrcp.o(.text* .rodata*)\n*:besaud.o(.text* .rodata*)\n*:besaudalloc.o(.text* .rodata*)\n*:besaudcon.o(.text* .rodata*)\n*:btm.o(.text* .rodata*)\n*:btm_devicedb.o(.text* .rodata*)\n*:btm_handle_hcievent.o(.text* .rodata*)\n*:btm_sco_interface.o(.text* .rodata*)\n*:btm_security.o(.text* .rodata*)\n*:avdtp.o(.text* .rodata*)\n*:connect.o(.text* .rodata*)\n*:hfp.o(.text* .rodata*)\n*:hshf.o(.text* .rodata*)\n*:hsp.o(.text* .rodata*)\n*:l2cap.o(.text* .rodata*)\n*:l2cap_er.o(.text* .rodata*)\n*:bt_common.o(.text* .rodata*)\n*:co_lib.o(.text* .rodata*)\n*:co_ppbuff.o(.text* .rodata*)\n*:md5.o(.text* .rodata*)\n*:obex.o(.text* .rodata*)\n*:pbap.o(.text* .rodata*)\n*:rfcomm.o(.text* .rodata*)\n*:sco.o(.text* .rodata*)\n*:sdp.o(.text* .rodata*)\n*:co_printf.o(.text* .rodata*)\n*:co_queue.o(.text* .rodata*)\n*:co_timer.o(.text* .rodata*)\n*:cobuf.o(.text* .rodata*)\n*:bes_os.o(.text* .rodata*)\n*:hci.o(.text* .rodata*)\n*:hci_buff.o(.text* .rodata*)\n*:bt_schedule.o(.text* .rodata*)\n\n#endif\n\n#endif\n\n#if 1\n            /*af */\n            *:audioflinger.o(.text* .rodata*)\n\n            /*intersys*/\n            *:hal_intersys.o(.text* .rodata*)\n            *:intersyshci.o(.text* .rodata*)\n            *:trans_adapt_v2.o(.text* .rodata*)\n\n            /*tws ibrt*/\n\n            *:app_ibrt_bt_profile_sync.o(.text* .rodata*)\n            *:app_ibrt_ui.o(.text* .rodata*)\n            *:app_tws_besaud.o(.text* .rodata*)\n            *:app_tws_ctrl_thread.o(.text* .rodata*)\n            *:app_tws_ibrt.o(.text* .rodata*)\n            *:app_tws_ibrt_audio_analysis.o(.text* .rodata*)\n            *:app_tws_ibrt_audio_sync.o(.text* .rodata*)\n            *:app_tws_ibrt_cmd_handler.o(.text* .rodata*)\n            *:app_tws_ibrt_mock.o(.text* .rodata*)\n            *:app_tws_ibrt_queue.o(.text* .rodata*)\n            *:app_tws_ibrt_trace.o(.text* .rodata*)\n            *:app_tws_profile_sync.o(.text* .rodata*)\n            *:app_vendor_cmd_evt.o(.text* .rodata*)\n\n\n                    /*app ibrt*/\n                    *:app_ibrt_customif_cmd.o(.text* .rodata*)\n                    *:app_ibrt_customif_ui.o(.text* .rodata*)\n                    *:app_ibrt_if.o(.text* .rodata*)\n                    *:app_ibrt_keyboard.o(.text* .rodata*)\n                    *:app_ibrt_nvrecord.o(.text* .rodata*)\n                    *:app_ibrt_ota_update.o(.text* .rodata*)\n                    *:app_ibrt_peripheral_manager.o(.text* .rodata*)\n                    *:app_ibrt_search_pair_ui.o(.text* .rodata*)\n                    *:app_ibrt_ui_test.o(.text* .rodata*)\n                    *:app_ibrt_voice_report.o(.text* .rodata*)\n#endif\n                    /*rtos*/\n                    *:SVC_Table.o(.text* .rodata*)\n                    *:HAL_CM4.o(.text* .rodata*)\n                    *:RTX_Conf_CM.o(.text* .rodata*)\n                    *:rt_Time.o(.text* .rodata*)\n                    *:rt_Task.o(.text* .rodata*)\n                    *:rt_System.o(.text* .rodata*)\n                    *:rt_Semaphore.o(.text* .rodata*)\n                    *:rt_Robin.o(.text* .rodata*)\n                    *:rt_Mutex.o(.text* .rodata*)\n                    *:rt_MemBox.o(.text* .rodata*)\n                    *:rt_Mailbox.o(.text* .rodata*)\n                    *:rt_List.o(.text* .rodata*)\n                    *:rt_Event.o(.text* .rodata*)\n                    *:rt_CMSIS.o(.text* .rodata*)\n                    *:HAL_CM.o(.text* .rodata*)\n\n/*services multimedia*/\n\n        *:g711.o(.text* .rodata*)\n        *:g726.o(.text* .rodata*)\n        *:g726_16.o(.text* .rodata*)\n        *:g726_24.o(.text* .rodata*)\n        *:g726_32.o(.text* .rodata*)\n        *:g72x.o(.text* .rodata*)\n        *:armfirfilt.o(.text* .rodata*)\n        *:buffer_manager.o(.text* .rodata*)\n        *:exp_func_tables.o(.text* .rodata*)\n        *:fastmath_const.o(.text* .rodata*)\n        *:firfilt.o(.text* .rodata*)\n        *:fraction_delay.o(.text* .rodata*)\n        *:frame_resize.o(.text* .rodata*)\n        *:fftfilt.o(.text* .rodata*)\n        *:speech_iir_calibration.o(.text* .rodata*)\n        *:speech_aec.o(.text* .rodata*)\n        *:codec_op_cpx.o(.text* .rodata*)\n        *:codec_op_etsi.o(.text* .rodata*)\n        *:codec_op_float.o(.text* .rodata*)\n        *:codec_op_lib.o(.text* .rodata*)\n        *:codec_op_netsi.o(.text* .rodata*)\n        *:codec_op_vec.o(.text* .rodata*)\n        *:med_aec_delay.o(.text* .rodata*)\n        *:med_aec_hf_af.o(.text* .rodata*)\n        *:med_aec_hf_nlp.o(.text* .rodata*)\n        *:med_aec_hpf.o(.text* .rodata*)\n        *:med_aec_main.o(.text* .rodata*)\n        *:med_emph_filter.o(.text* .rodata*)\n        *:med_fft.o(.text* .rodata*)\n        *:med_fft_tab.o(.text* .rodata*)\n        *:med_kissfft.o(.text* .rodata*)\n        *:mdf1.o(.text* .rodata*)\n        *:digital_agc.o(.text* .rodata*)\n        *:triple_mic_denoise3.o(.text* .rodata*)\n        *:buffer.o(.text* .rodata*)\n        *:jitter.o(.text* .rodata*)\n        *:scal.o(.text* .rodata*)\n        *:smallft.o(.text* .rodata*)\n        *:speech_ns.o(.text* .rodata*)\n        *:cng.o(.text* .rodata*)\n        *:ns3f.o(.text* .rodata*)\n        *:wnr.o(.text* .rodata*)\n        *:table.o(.text* .rodata*)\n        *:dtw.o(.text* .rodata*)\n        *:mfcc.o(.text* .rodata*)\n        *:recognition.o(.text* .rodata*)\n        *:vad.o(.text* .rodata*)\n        *:resample.o(.text* .rodata*)\n        *:spectrum.o(.text* .rodata*)\n        *:spectrum_fix.o(.text* .rodata*)\n        *:window_generator.o(.text* .rodata*)\n        *:speech_dc_filter.o(.text* .rodata*)\n        *:iirfilt_design.o(.text* .rodata*)\n        *:genericStds.o(.text* .rodata*)\n        *:conv_string.o(.text* .rodata*)\n        *:cmdl_parser.o(.text* .rodata*)\n        *:tran_det.o(.text* .rodata*)\n        *:ton_corr.o(.text* .rodata*)\n        *:sbrenc_freq_sca.o(.text* .rodata*)\n        *:sbr_rom.o(.text* .rodata*)\n        *:sbr_ram.o(.text* .rodata*)\n        *:sbr_misc.o(.text* .rodata*)\n        *:sbr_encoder.o(.text* .rodata*)\n        *:resampler.o(.text* .rodata*)\n        *:ps_main.o(.text* .rodata*)\n        *:ps_encode.o(.text* .rodata*)\n        *:ps_bitenc.o(.text* .rodata*)\n        *:nf_est.o(.text* .rodata*)\n        *:mh_det.o(.text* .rodata*)\n        *:invf_est.o(.text* .rodata*)\n        *:fram_gen.o(.text* .rodata*)\n        *:env_est.o(.text* .rodata*)\n        *:env_bit.o(.text* .rodata*)\n        *:code_env.o(.text* .rodata*)\n        *:bit_sbr.o(.text* .rodata*)\n        *:sbrdecoder.o(.text* .rodata*)\n        *:sbrdec_freq_sca.o(.text* .rodata*)\n        *:sbrdec_drc.o(.text* .rodata*)\n        *:sbr_rom.o(.text* .rodata*)\n        *:sbr_ram.o(.text* .rodata*)\n        *:sbr_dec.o(.text* .rodata*)\n        *:sbr_deb.o(.text* .rodata*)\n        *:sbr_crc.o(.text* .rodata*)\n        *:psdec_hybrid.o(.text* .rodata*)\n        *:psdec.o(.text* .rodata*)\n        *:psbitdec.o(.text* .rodata*)\n        *:lpp_tran.o(.text* .rodata*)\n        *:huff_dec.o(.text* .rodata*)\n        *:env_extr.o(.text* .rodata*)\n        *:env_dec.o(.text* .rodata*)\n        *:env_calc.o(.text* .rodata*)\n        *:pcmutils_lib.o(.text* .rodata*)\n        *:limiter.o(.text* .rodata*)\n        *:tpenc_lib.o(.text* .rodata*)\n        *:tpenc_latm.o(.text* .rodata*)\n        *:tpenc_asc.o(.text* .rodata*)\n        *:tpenc_adts.o(.text* .rodata*)\n        *:tpenc_adif.o(.text* .rodata*)\n        *:tpdec_drm.o(.text* .rodata*)\n        *:tpdec_adts.o(.text* .rodata*)\n        *:tpdec_adif.o(.text* .rodata*)\n        *:scale.o(.text* .rodata*)\n        *:qmf.o(.text* .rodata*)\n        *:mdct.o(.text* .rodata*)\n        *:fixpoint_math.o(.text* .rodata*)\n        *:fft_rad2.o(.text* .rodata*)\n        *:fft.o(.text* .rodata*)\n        *:FDK_trigFcts.o(.text* .rodata*)\n        *:FDK_tools_rom.o(.text* .rodata*)\n        *:FDK_hybrid.o(.text* .rodata*)\n        *:FDK_crc.o(.text* .rodata*)\n        *:FDK_core.o(.text* .rodata*)\n        *:FDK_bitbuffer.o(.text* .rodata*)\n        *:dct.o(.text* .rodata*)\n        *:autocorr2nd.o(.text* .rodata*)\n        *:transform.o(.text* .rodata*)\n        *:tonality.o(.text* .rodata*)\n        *:spreading.o(.text* .rodata*)\n        *:sf_estim.o(.text* .rodata*)\n        *:quantize.o(.text* .rodata*)\n        *:qc_main.o(.text* .rodata*)\n        *:psy_main.o(.text* .rodata*)\n        *:psy_configuration.o(.text* .rodata*)\n        *:pre_echo_control.o(.text* .rodata*)\n        *:pnsparam.o(.text* .rodata*)\n        *:noisedet.o(.text* .rodata*)\n        *:ms_stereo.o(.text* .rodata*)\n        *:metadata_main.o(.text* .rodata*)\n        *:metadata_compressor.o(.text* .rodata*)\n        *:line_pe.o(.text* .rodata*)\n        *:intensity.o(.text* .rodata*)\n        *:grp_data.o(.text* .rodata*)\n        *:dyn_bits.o(.text* .rodata*)\n        *:chaosmeasure.o(.text* .rodata*)\n        *:channel_map.o(.text* .rodata*)\n        *:block_switch.o(.text* .rodata*)\n        *:bitenc.o(.text* .rodata*)\n        *:bit_cnt.o(.text* .rodata*)\n        *:bandwidth.o(.text* .rodata*)\n        *:band_nrg.o(.text* .rodata*)\n        *:adj_thr.o(.text* .rodata*)\n        *:aacenc_tns.o(.text* .rodata*)\n        *:aacEnc_rom.o(.text* .rodata*)\n        *:aacEnc_ram.o(.text* .rodata*)\n        *:aacenc_pns.o(.text* .rodata*)\n        *:aacenc_lib.o(.text* .rodata*)\n        *:aacenc.o(.text* .rodata*)\n        *:rvlcconceal.o(.text* .rodata*)\n        *:rvlcbit.o(.text* .rodata*)\n        *:rvlc.o(.text* .rodata*)\n        *:ldfiltbank.o(.text* .rodata*)\n        *:conceal.o(.text* .rodata*)\n        *:aacdec_hcrs.o(.text* .rodata*)\n        *:aacdec_hcr_bit.o(.text* .rodata*)\n        *:aacdec_hcr.o(.text* .rodata*)\n        *:aacdec_drc.o(.text* .rodata*)\n        *:aac_rom.o(.text* .rodata*)\n        *:aac_ram.o(.text* .rodata*)\n        *:floatlimiter.o(.text* .rodata*)\n        *:audio_resample_ex_32bit.o(.text* .rodata*)\n        *:audio_resample_ex.o(.text* .rodata*)\n        *:audio_resample.o(.text* .rodata*)\n        *:limiter.o(.text* .rodata*)\n        *:hw_iir_process_best2300p.o(.text* .rodata*)\n        *:hw_codec_iir_process_best2300p.o(.text* .rodata*)\n        *:fir_process_best2300p.o(.text* .rodata*)\n        *:dsd_process_best2300p.o(.text* .rodata*)\n        *:crossover_filter.o(.text* .rodata*)\n        *:audio_memory.o(.text* .rodata*)\n        *:anc_process_best2300p.o(.text* .rodata*)\n        *:adp_smallft.o(.text* .rodata*)\n        *:adp_filter.o(.text* .rodata*)\n        *:adp_fftwrap.o(.text* .rodata*)\n        *:fft128dot.o(.text* .rodata*)\n        *:resample_coef.o(.text* .rodata*)\n        *:eq_cfg.o(.text* .rodata*)\n\n/*platform*/\n#if 1\n        *:main.o (.text* .rodata)\n        *:hwtimer_list.o (.text* .rodata)\n        *:hal_mcu2cp_cp.o (.text* .rodata)\n        *:hal_mcu2cp_mcu.o (.text* .rodata)\n        *:hal_sleep_mcu_pd.o (.text* .rodata)\n        *:hal_wdt.o (.text* .rodata)\n        *:hal_usbhost.o (.text* .rodata)\n        *:hal_usb.o (.text* .rodata)\n        *:hal_uart.o (.text* .rodata)\n        *:hal_transq.o (.text* .rodata)\n        *:hal_trace.o (.text* .rodata)\n        *:hal_tdm.o (.text* .rodata)\n        *:hal_sleep.o (.text* .rodata)\n        *:hal_sdmmc.o (.text* .rodata)\n        *:hal_rtc.o (.text* .rodata)\n        *:hal_pwm.o (.text* .rodata)\n        *:hal_overlay.o (.text* .rodata)\n        *:hal_key.o (.text* .rodata)\n        *:hal_i2s_tdm.o (.text* .rodata)\n        *:hal_i2s.o (.text* .rodata)\n        *:hal_i2c.o (.text* .rodata)\n        *:hal_gpio.o (.text* .rodata)\n        *:hal_gpadc.o (.text* .rodata)\n        *:hal_dma.o (.text* .rodata)\n        *:hal_codec_common.o (.text* .rodata)\n        *:hal_cmd.o (.text* .rodata)\n\n*:hal_intersys.o (.text* .rodata)\n*:hal_psram.o (.text* .rodata)\n*:hal_memsc.o (.text* .rodata)\n*:hal_spdif.o (.text* .rodata)\n*:hal_phyif.o (.text* .rodata)\n#else\n\n#endif\n/*\n        *:hal_cmu_common.o (.text* .rodata)\n        *:hal_timer.o (.text* .rodata)\n            *:hal_sysfreq.o (.text* .rodata)\n            *:hal_spi.o (.text* .rodata)\n\n        *:hal_analogif_best2300p.o (.text* .rodata)\n        *:hal_cmu_best2300p.o (.text* .rodata)\n        *:hal_iomux_best2300p.o (.text* .rodata)\n        */\n        #if 1\n        *:hal_psc_best2300p.o (.text* .rodata)\n        *:hal_sensor_eng_best2300p.o (.text* .rodata)\n        *:usbphy_best2300p.o (.text* .rodata)\n        *:pmu_best2300p.o (.text* .rodata)\n        *:analog_best2300p.o (.text* .rodata)\n        *:codec_best2300p.o (.text* .rodata)\n        *:codec_tlv32aic32.o (.text* .rodata)\n    *:hal_codec_best2300p.o (.text* .rodata)\n        *:bt_drv_reg_op.o (.text* .rodata)\n        *:bt_drv_calibration.o (.text* .rodata)\n        *:bt_drv.o (.text* .rodata)\n        *:iqcorrect.o (.text* .rodata)\n        *:bt_drv_uart_bridge_intsys.o (.text* .rodata)\n        *:bt_drv_rfconfig.o (.text* .rodata)\n        *:bt_drv_patch.o (.text* .rodata)\n        *:bt_drv_config.o (.text* .rodata)\n        *:bt_drv_common.o (.text* .rodata)\n        *:btpcm.o (.text* .rodata)\n        *:sbcaac_dummy.o (.text* .rodata)\n        *:usb_cdc.o (.text* .rodata)\n        *:usb_audio_sync.o (.text* .rodata)\n        *:usb_audio.o (.text* .rodata)\n        *:usb_dev_desc.o (.text* .rodata)\n        #endif\n/*\n*:system_utils.o (.text* .rodata)\n        */\n        *:system_cp.o (.text* .rodata)\n        *:system_ARMCM.o (.text* .rodata)\n        *:patch.o (.text* .rodata)\n        *:mpu.o (.text* .rodata)\n        *:cmsis_nvic.o (.text* .rodata)\n        *:arm_var_q31.o (.text* .rodata)\n        *:arm_var_q15.o (.text* .rodata)\n        *:arm_var_f32.o (.text* .rodata)\n        *:arm_std_q31.o (.text* .rodata)\n        *:arm_std_q15.o (.text* .rodata)\n        *:arm_std_f32.o (.text* .rodata)\n        *:arm_rms_q31.o (.text* .rodata)\n        *:arm_rms_q15.o (.text* .rodata)\n        *:arm_rms_f32.o (.text* .rodata)\n        *:arm_power_q7.o (.text* .rodata)\n        *:arm_power_q31.o (.text* .rodata)\n        *:arm_power_q15.o (.text* .rodata)\n        *:arm_power_f32.o (.text* .rodata)\n        *:arm_min_q7.o (.text* .rodata)\n        *:arm_min_q31.o (.text* .rodata)\n        *:arm_min_q15.o (.text* .rodata)\n        *:arm_min_f32.o (.text* .rodata)\n        *:arm_mean_q7.o (.text* .rodata)\n        *:arm_mean_q31.o (.text* .rodata)\n        *:arm_mean_q15.o (.text* .rodata)\n        *:arm_mean_f32.o (.text* .rodata)\n        *:arm_max_q7.o (.text* .rodata)\n        *:arm_max_q31.o (.text* .rodata)\n        *:arm_max_q15.o (.text* .rodata)\n        *:arm_max_f32.o (.text* .rodata)\n        *:arm_const_structs.o (.text* .rodata)\n        *:arm_common_tables.o (.text* .rodata)\n        *:arm_dot_prod_q15.o (.text* .rodata)\n        *:arm_biquad_cascade_df1_init_f32.o (.text* .rodata)\n        *:arm_fir_init_q15.o (.text* .rodata)\n        *:arm_fir_fast_q15.o (.text* .rodata)\n        *:arm_bitreversal2.o (.text* .rodata)\n        *:arm_cfft_q15.o (.text* .rodata)\n        *:arm_cfft_radix4_q15.o (.text* .rodata)\n        *:arm_cfft_radix8_f32.o (.text* .rodata)\n        *:arm_rfft_fast_init_f32.o (.text* .rodata)\n        *:arm_rfft_init_q15.o (.text* .rodata)\n        *:arm_rfft_q15.o (.text* .rodata)\n        *:arm_copy_q31.o (.text* .rodata)\n        *:arm_fill_q31.o (.text* .rodata)\n        *:arm_q15_to_float.o (.text* .rodata)\n        *:arm_dot_prod_q7.o (.text* .rodata)\n        *:arm_add_q15.o (.text* .rodata)\n        *:arm_shift_q15.o (.text* .rodata)\n        *:arm_negate_q15.o (.text* .rodata)\n        *:arm_offset_q15.o (.text* .rodata)\n        *:arm_mult_q15.o (.text* .rodata)\n\n\n\t\t*(.fast_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__fast_sram_text_exec_end__ = .;\n\t} > FRAMX\n\n\t__fast_sram_text_data_end_flash__ = __fast_sram_text_data_start_flash__ + SIZEOF(.fast_text_sram);\n\t__fast_sram_text_data_start__ = RAMX_TO_RAM(__fast_sram_text_exec_start__);\n\t__fast_sram_text_data_end__ = RAMX_TO_RAM(__fast_sram_text_exec_end__);\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t__cp_text_sram_start_flash__ = __fast_sram_text_data_end_flash__;\n\n\t.cp_text_sram (ORIGIN(RAMCPX)) : AT (__cp_text_sram_start_flash__)\n\t{\n\t\t__cp_text_sram_exec_start__ = .;\n\t\t*(.cp_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__cp_text_sram_exec_end__ = .;\n\t} > RAMCPX\n\n\t__cp_text_sram_start = RAMX_TO_RAM(__cp_text_sram_exec_start__);\n\t__cp_text_sram_end = RAMX_TO_RAM(__cp_text_sram_exec_end__);\n\n\t.vector_table_cp (ORIGIN(RAMCP)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table_cp))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAMCP\n\n\t__cp_data_sram_start_flash__ = __cp_text_sram_start_flash__ + SIZEOF(.cp_text_sram);\n\n\t.cp_data_sram (.) : AT (__cp_data_sram_start_flash__)\n\t{\n\t\t__cp_data_sram_start = .;\n\t\t*(.cp_data*)\n\t\t. = ALIGN(4);\n\t\t__cp_data_sram_end = .;\n\t} > RAMCP\n\n\t__cp_sram_end_flash__ = __cp_data_sram_start_flash__ + SIZEOF(.cp_data_sram);\n\n\t.cp_bss_sram (.) (NOLOAD) :\n\t{\n\t\t__cp_bss_sram_start = .;\n\t\t*(.cp_bss*)\n\t\t. = ALIGN(4);\n\t\t__cp_bss_sram_end = .;\n\t} > RAMCP\n\n\t__overlay_text_start_flash__ = __cp_sram_end_flash__;\n#else\n\t__overlay_text_start_flash__ = __fast_sram_text_data_end_flash__;\n#endif\n\n#ifdef OVERLAY_FOR_CP\n\t__overlay_text_start__ = __cp_text_sram_end;\n#else\n\t__overlay_text_start__ = __fast_sram_text_data_end__;\n#endif\n\t__overlay_text_exec_start__ = RAM_TO_RAMX(__overlay_text_start__);\n\n\tOVERLAY (__overlay_text_exec_start__) : NOCROSSREFS AT (__overlay_text_start_flash__)\n\t{\n#ifndef NO_OVERLAY\n\t\t.overlay_text0\n\t\t{\n\t\t\tLONG(0);\n\n#if !defined(GLOBAL_SRAM_KISS_FFT)\n\t\t\t*:kiss_fft.o(.text*)\n\t\t\t*:kiss_fftr.o(.text*)\n\t\t\t*:fftwrap.o(.text*)\n#endif\n\n#if !defined(GLOBAL_SRAM_CMSIS_FFT)\n\t\t\t*:cmsis_fftwrap.o(.text*)\n\t\t\t*:arm_rfft_fast_f32.o(.text*)\n\t\t\t*:arm_cfft_f32.o(.text*)\n#endif\n\n#if defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t*:arm_biquad_cascade_df1_f32.o(.text*  .rodata*)\n\t\t\t*:integer_delay.o(.text* .rodata*)\n\t\t\t*:lc_mmse_ns_float.o(.text.speech_ns2float_process .rodata*)\n\t\t\t*:coherence.o(.text* .rodata*)\n\t\t\t*:echo_suppression.o(.text.float_cmp .rodata*)\n\t\t\t*:echo_suppression.o(.text.es_process .rodata*)\n\t\t\t*:lcmmse.o(.text.lcmmse_noise_estimate .rodata*)\n\t\t\t*:lcmmse.o(.text.lcmmse_get_speech_prob .rodata*)\n\t\t\t*:logmmse.o(.text.filterbank_compute_bank_pflt .rodata*)\n\t\t\t*:logmmse.o(.text.filterbank_compute_psd_pflt .rodata*)\n\t\t\t*:logmmse.o(.text.logmmse_analysis .rodata*)\n\t\t\t*:logmmse.o(.text.logmmse_process .rodata*)\n#else\n\t\t\t/* common */\n\t\t\t*:ae_common.o(.text* .rodata*)\n\t\t\t*:ae_rand.o(.text* .rodata*)\n\t\t\t*:fastmath.o(.text* .rodata*)\n\t\t\t*:integer_delay.o(.text* .rodata*)\n\t\t\t*:iirfilt.o(.text* .rodata*)\n\t\t\t*:ringbuf.o(.text* .rodata*)\n\t\t\t*:scale_int16.o(.text* .rodata*)\n\t\t\t*:speech_conv.o(.text* .rodata*)\n\t\t\t*:speech_trans_buf.o(.text* .rodata*)\n\n\t\t\t*:preprocess.o(.text* .rodata*)\n\t\t\t*:filterbank.o(.text* .rodata*)\n\t\t\t*:mdf.o(.text* .rodata*)\n\t\t\t*:plc_8000.o(.text* .rodata*)\n#if defined(HFP_1_6_ENABLE)\n\t\t\t*:dspfns.o(.text* .rodata*)\n\t\t\t*:lpc_plc.o(.text* .rodata*)\n\t\t\t*:plc_16000.o(.text* .rodata*)\n#endif\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.text* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_Process)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_ValidRateAndFrameLength)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_CalcVad16khz)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_Downsampling)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_CalcVad8khz)\n\t\t\t*:vad_filterbank.o(.text.*)\n\t\t\t*:energy.o(.text.*)\n\t\t\t*:get_scaling_square.o(.text.*)\n\t\t\t*:dual_mic_denoise.o(.text*)\n\t\t\t*:cross_correlation.o(.text*)\n\t\t\t*:min_max_operations.o(.text*)\n\t\t\t*:resample_by_2_internal.o(.text*)\n\t\t\t*:division_operations.o(.text*)\n\t\t\t*:downsample_fast.o(.text*)\n\t\t\t*:resample_fractional.o(.text*)\n\t\t\t*:resample_48khz.o(.text*)\n\t\t\t*:vad_sp.o(.text*)\n\t\t\t*:vad_core.o(.text*)\n\t\t\t*:webrtc_vad.o(.text*)\n\t\t\t*:vad_gmm.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n\t\t\t*:speech_2mic_ns2_denoise.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS5)\n            *:leftright_denoise.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS2) || defined(SPEECH_RX_NS2)\n\t\t\t*:lc_mmse_ns.o(.text* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT)\n\t\t\t*:lc_mmse_ns_float.o(.text* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS3) || defined(SPEECH_RX_NS3)\n\t\t\t*:ns3.o(.text* .rodata*)\n\t\t\t*:noise_suppression_x.o(.text* .rodata*)\n\t\t\t*:nsx_core.o(.text* .rodata*)\n\t\t\t*:nsx_core_c.o(.text* .rodata*)\n\t\t\t*:copy_set_operations.o(.text* .rodata*)\n\t\t\t*:cross_correlation.o(.text* .rodata*)\n\t\t\t*:division_operations.o(.text* .rodata*)\n\t\t\t*:dot_product_with_scale.o(.text* .rodata*)\n\t\t\t*:downsample_fast.o(.text* .rodata*)\n\t\t\t*:energy.o(.text* .rodata*)\n\t\t\t*:get_scaling_square.o(.text* .rodata*)\n\t\t\t*:min_max_operations.o(.text* .rodata*)\n\t\t\t*:real_fft.o(.text* .rodata*)\n\t\t\t*:resample_by_2.o(.text* .rodata*)\n\t\t\t*:resample_by_2_internal.o(.text* .rodata*)\n\t\t\t*:spl_init.o(.text* .rodata*)\n\t\t\t*:spl_sqrt.o(.text* .rodata*)\n\t\t\t*:spl_sqrt_floor.o(.text* .rodata*)\n\t\t\t*:vector_scaling_operations.o(.text* .rodata*)\n#endif\n#if defined(SPEECH_TX_AEC2FLOAT)\n\t\t\t*:coherence.o(.text* .rodata*)\n\t\t\t*:echo_canceller.o(.text* .rodata*)\n\t\t\t*:echo_suppression.o(.text* .rodata*)\n\t\t\t*:lcmmse.o(.text* .rodata*)\n\t\t\t*:logmmse.o(.text* .rodata*)\n\t\t\t*:mdf2.o(.text* .rodata*)\n\t\t\t*:noise_generator.o(.text* .rodata*)\n\t\t\t*:pink_noise_gen.o(.text* .rodata*)\n\t\t\t*:white_noise_gen.o(.text* .rodata*)\n#endif\n#if defined(SPEECH_TX_3MIC_NS)\n\t\t\t*:speech_3mic_ns.o(.text* .rodata*)\n#endif\n#if defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:iir_resample.o(.text* .rodata*)\n#endif\n#if defined(SPEECH_TX_COMPEXP)\n\t\t\t*:compexp.o(.text* .rodata*)\n#endif\n#if defined(SPEECH_TX_EQ) || defined(SPEECH_RX_EQ) || defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:speech_eq.o(.text* .rodata*)\n\t\t\t*:speech_arm_eq.o(.text* .rodata*)\n\t\t\t*:arm_biquad_cascade_df1_f32.o(.text* .rodata*)\n#endif\n#if defined(SPEECH_TX_POST_GAIN) || defined(SPEECH_RX_POST_GAIN)\n\t\t\t*:speech_gain.o(.text* .rodata*)\n#endif\n#if defined(__SMARTVOICE__)\n#if defined(SPEECH_TX_2MIC_NS2) || defined(SPEECH_TX_NS2)\n\t\t\t*:app_smartvoice.o(.text._Z23mic_data_process_deinitv)\n\t\t\t*:app_smartvoice.o(.text._Z21mic_data_process_initv)\n\t\t\t*:app_smartvoice.o(.text._Z20mic_data_process_runPsm)\n#endif\n#endif\n\n#endif // #if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t*(.overlay_text0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.text* .rodata*)\n\t\t\t*:sbc_math.o(.text* .rodata*)\n#endif\n\t\t\t*:fixedpoint.o(.text* .rodata*)\n\t\t\t*:replaygain.o(.text* .rodata*)\n\t\t\t*:dsp_core.o(.text* .rodata*)\n\t\t\t*:dsp_misc.o(.text* .rodata*)\n\t\t\t*:dsp_filter.o(.text* .rodata*)\n\t\t\t*:dsp_sample_input.o(.text* .rodata*)\n\t\t\t*:dsp_sample_output.o(.text* .rodata*)\n\t\t\t*:eq.o(.text* .rodata*)\n\t\t\t*:pga.o(.text* .rodata*)\n#if !defined(A2DP_AAC_ON) && !defined(A2DP_LHDC_ON)\n\t\t\t*:fir_process.o(.text* .rodata*)\n\t\t\t*:iir_process.o(.text.iir_run .text.*iir_run_per_* .rodata*)\n#endif\n#endif\n\t\t\t*(.overlay_a2dp_sbc*)\n\t\t\t*(.overlay_text1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fmdec.o(.text* .data* .rodata* .bss*)\n\t\t\t*(.overlay_text2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.text*)\n\t\t\t*(.overlay_text3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:block.o(.text.*CBlock_GetEscape*  .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_GetBitstream* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_GetAuBitsRemaining* .rodata*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_GetValue* .rodata*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_Read* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_FillData* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_ReadAccessUnit* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_readHeader* .rodata*)\n\t\t\t*:block.o(.text.*ApplyTools* .rodata*)\n\t\t\t*:aacdec_pns.o(.text.*CPns_Apply* .rodata*)\n\t\t\t*:aacdec_tns.o(.text.*CTns_Apply* .rodata*)\n\t\t\t*:aacdec_tns.o(.text.*CTns_Reset* .rodata*)\n\t\t\t*:aacdec_pns.o(.text.*CPns_ResetData* .rodata*)\n\t\t\t*:pulsedata.o(.text.*CPulseData_Read* .rodata*)\n#if !defined(AAC_TEXT_PARTIAL_IN_FLASH)\n\t\t\t*:channel.o(.text.*CChannelElement_Read* .rodata*)\n\t\t\t*:tpdec_asc.o(.text.*CProgramConfig_Reset* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_CrcCheck* .rodata*)\n\t\t\t*:block.o(.text.*CBlock_FrequencyToTime* .rodata*)\n\t\t\t*:block.o(.text.*CBlock_ReadSectionData* .rodata*)\n\t\t\t*:channel.o(.text.*CChannelElement_Decode* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_CrcEndReg* .rodata*)\n\t\t\t*:aacdecoder.o(.text.*CAacDecoder_DecodeFrame* .rodata*)\n#endif\n\n#if !defined(__SBC_FUNC_IN_ROM_VBEST2000__) && !defined(AAC_TEXT_PARTIAL_IN_FLASH)\n\t\t\t*:block.o(.text.*CBlock_ReadSpectralData* .rodata*)\n\t\t\t*:block.o(.text.*CBlock_ScaleSpectralData* .rodata*)\n\t\t\t*:aacdec_tns.o(.text.*CTns_ReadDataPresentFlag* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_CrcStartReg* .rodata*)\n\t\t\t*:block.o(.text.*CBlock_ReadScaleFactorData* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_EndAccessUnit* .rodata*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_GetNrOfSubFrames* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_GetAuBitsTotal* .rodata*)\n\t\t\t*:tpdec_asc.o(.text.*CProgramConfig_LookupElement* .rodata*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_GetFrameLengthInBits* .rodata*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_ReadPayloadLengthInfo* .rodata*)\n\t\t\t*:block.o(.text.*CBlock_InverseQuantizeSpectralData* .rodata*)\n\t\t\t*:channelinfo.o(.text.*IcsRead* .rodata*)\n\t\t\t*:aacdec_tns.o(.text.*CTns_Read* .rodata*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_AdjustEndOfAccessUnit* .rodata*)\n\t\t\t*:pulsedata.o(.text.*CPulseData_Apply* .rodata*)\n\t\t\t*:tpdec_asc.o(.text.*AudioSpecificConfig_Init* .rodata*)\n\t\t\t*:tpdec_asc.o(.text.*AudioSpecificConfig_Parse* .rodata*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_ReadStreamMuxConfig* .rodata*)\n\t\t\t*:tpdec_asc.o(.text.*getSampleRate* .rodata*)\n\t\t\t*:tpdec_asc.o(.text.*getAOT* .rodata*)\n\t\t\t*:aacdecoder.o(.text.*CAacDecoder_Init* .rodata*)\n\t\t\t*:tpdec_asc.o(.text.*CProgramConfig_Init* .rodata*)\n\t\t\t*:aacdecoder_lib.o(.text.*aacDecoder_ConfigCallback* .rodata*)\n\t\t\t*:aacdecoder.o(.text.*CAacDecoder_ExtPayloadParse* .rodata*)\n\t\t\t*:stereo.o(.text.*CJointStereo_Read* .rodata*)\n#endif\n#endif\n\t\t\t*(.overlay_a2dp_aac*)\n\t\t\t*(.overlay_text4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:mpa.o(.text*)\n\t\t\t*:bit.o(.text*)\n\t\t\t*:frame.o(.text*)\n\t\t\t*:huffman.o(.text*)\n\t\t\t*:layer12.o(.text*)\n\t\t\t*:layer3.o(.text*)\n\t\t\t*:stream.o(.text*)\n\t\t\t*:synth.o(.text*)\n\t\t\t*(.overlay_text5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text6\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_SCALABLE_ON)\n\t\t\t*:Audio_asm.o(.text*)\n\t\t\t*:vq.o(.text*)\n\t\t\t*:util.o(.text*)\n\t\t\t*:rate.o(.text*)\n\t\t\t*:quant_bands.o(.text*)\n\t\t\t*:modes.o(.text*)\n\t\t\t*:mathops.o(.text*)\n\t\t\t*:laplace.o(.text*)\n\t\t\t*:entdec.o(.text*)\n\t\t\t*:entcode.o(.text*)\n\t\t\t*:cwrs.o(.text*)\n\t\t\t*:audio_int32.o(.text*)\n\t\t\t*:audio_decoder.o(.text*)\n\t\t\t*:audio.o(.text*)\n\t\t\t*(.overlay_a2dp_ssc*)\n#endif\n\n#if defined(A2DP_LHDC_ON)\n\t\t\t*:lhdcUtil.o(.text*)\n\t\t\t*:dec.o(.text*)\n\t\t\t*:cirbuf.o(.text*)\n\t\t\t*(.overlay_a2dp_lhdc*)\n#endif\n#if defined(A2DP_LDAC_ON)\n\t\t\t*:ldacBT_api.o(.text*)\n\t\t\t*:decode_ldac.o(.text*)\n\t\t\t*:dequant_ldac.o(.text*)\n\t\t\t*:imdct_ldac.o(.text*)\n\t\t\t*:ldacBT_internal.o(.text*)\n\t\t\t*:ldaclib_api.o(.text*)\n\t\t\t*:memory_ldac.o(.text*)\n\t\t\t*:setpcm_ldac.o(.text*)\n\t\t\t*:sigana_ldac.o(.text*)\n\t\t\t*:tables_ldac.o(.text*)\n\t\t\t*:tables_sigproc_ldac.o(.text*)\n\t\t\t*:unpack_ldac.o(.text*)\n\t\t\t*(.overlay_a2dp_ldac*)\n#endif\n\n\t\t\t*(.overlay_text6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text7)\n\t\t\t. = ALIGN(4);\n\t\t}\n#endif\n\t\t.overlay_text_last\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > REGION_OVERLAY_TEXT\n\n\t.dummy_overlay_text_end (.) (NOLOAD) :\n\t{\n\t\t__overlay_text_exec_end__ = .;\n\t} > REGION_OVERLAY_TEXT\n\n#ifdef OVERLAY_FOR_CP\n\t__fast_sram_end__ = __fast_sram_text_data_end__;\n#else\n\t__fast_sram_end__ = RAMX_TO_RAM(__overlay_text_exec_end__);\n#endif\n\n\tASSERT(__fast_sram_end__ - __fast_sram_text_data_start__ <= FAST_XRAM_SECTION_SIZE, \"fast xram sections too large\")\n\t__free_fram = FAST_XRAM_SECTION_SIZE - (__fast_sram_end__ - __fast_sram_text_data_start__);\n\n#ifdef OVERLAY_FOR_CP\n\t__overlay_data_start__ = __cp_bss_sram_end;\n#else\n\t__overlay_data_start__ = __sram_bss_end__;\n#endif\n\n\tOVERLAY (__overlay_data_start__) : NOCROSSREFS AT (__load_stop_overlay_text_last)\n\t{\n#ifndef NO_OVERLAY\n\t\t.overlay_data0\n\t\t{\n\t\t\t/* Explicitly place 4 bytes at section start to avoid \"section type changed to PROGBITS\" warnings */\n\t\t\tLONG(0);\n#if !defined(SCO_OPTIMIZE_FOR_RAM)\n\n#if !defined(GLOBAL_SRAM_KISS_FFT)\n\t\t\t*:fftwrap.o(.data* .rodata*)\n\t\t\t*:kiss_fft.o(.data* .rodata*)\n\t\t\t*:kiss_fftr.o(.data* .rodata*)\n#endif\n\n#if !defined(GLOBAL_SRAM_CMSIS_FFT)\n\t\t\t*:arm_common_tables.o(.rodata.armBitRevIndexTable256)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_256)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_rfft_512)\n\t\t\t*:arm_common_tables.o(.rodata.armBitRevIndexTable128)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_128)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_rfft_256)\n#endif\n\n\t\t\t/* common */\n\t\t\t*:fastmath_const.o(.data* .rodata*)\n\n\t\t\t*:preprocess.o(.data* .rodata*)\n\t\t\t*:filterbank.o(.data* .rodata*)\n\t\t\t*:mdf.o(.data* .rodata*)\n\t\t\t*:plc_8000.o(.data* .rodata*)\n#if defined(HFP_1_6_ENABLE)\n\t\t\t*:table.o(.data* .rodata*)\n\t\t\t*:plc_16000.o(.data* .rodata*)\n#endif\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.data* .rodata* .bss*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n\t\t\t*:dual_mic_denoise.o(.data* .rodata*)\n\t\t\t*:vad_filterbank.o(.data* .rodata*)\n\t\t\t*:energy.o(.data* .rodata*)\n\t\t\t*:get_scaling_square.o(.data* .rodata*)\n\n\t\t\t*:cross_correlation.o(.data* .rodata*)\n\t\t\t*:min_max_operations.o(.data* .rodata*)\n\t\t\t*:resample_by_2_internal.o(.data* .rodata*)\n\t\t\t*:division_operations.o(.data* .rodata*)\n\t\t\t*:downsample_fast.o(.data* .rodata*)\n\t\t\t*:resample_fractional.o(.data* .rodata*)\n\t\t\t*:resample_48khz.o(.data* .rodata*)\n\t\t\t*:vad_sp.o(.data* .rodata*)\n\t\t\t*:vad_core.o(.data* .rodata*)\n\t\t\t*:webrtc_vad.o(.data* .rodata*)\n\t\t\t*:vad_gmm.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n\t\t\t*:speech_2mic_ns2_denoise.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS5)\n            *:leftright_denoise.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2) || defined(SPEECH_RX_NS2)\n\t\t\t*:lc_mmse_ns.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS3) || defined(SPEECH_RX_NS3)\n\t\t\t*:nsx_core.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT)\n\t\t\t*:lc_mmse_ns_float.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_3MIC_NS)\n\t\t\t*:speech_3mic_ns.o(.data* .rodata*)\n#endif\n#if defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:iir_resample.o(.data* .rodata*)\n#endif\n\n#endif // #if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t*(.overlay_data0 .overlay_rodata0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.data* .rodata*)\n\t\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n\t\t\t*:fixedpoint.o(.data* .rodata*)\n\t\t\t*:replaygain.o(.data* .rodata*)\n\t\t\t*:dsp_core.o(.data* .rodata*)\n\t\t\t*:dsp_misc.o(.data* .rodata*)\n\t\t\t*:dsp_filter.o(.data* .rodata*)\n\t\t\t*:dsp_sample_input.o(.data* .rodata*)\n\t\t\t*:dsp_sample_output.o(.data* .rodata*)\n\t\t\t*:eq.o(.data* .rodata*)\n\t\t\t*:pga.o(.data* .rodata*)\n#if !defined(A2DP_AAC_ON)\n\t\t\t*:fir_process.o(.data* .rodata*)\n#endif\n#endif\n\t\t\t*(.overlay_data1 .overlay_rodata1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data2 .overlay_rodata2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.data* .rodata*)\n\t\t\t*(.overlay_data3 .overlay_rodata3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:block.o(.data* .rodata*)\n\t\t\t*:tpdec_lib.o(.data* .rodata*)\n\t\t\t*:tpdec_latm.o(.data* .rodata*)\n\t\t\t*:aacdec_pns.o(.data* .rodata*)\n\t\t\t*:aacdec_tns.o(.data* .rodata*)\n\t\t\t*:pulsedata.o(.data* .rodata*)\n\t\t\t*:channel.o(.data* .rodata*)\n\t\t\t*:tpdec_asc.o(.data* .rodata*)\n\t\t\t*:aacdecoder.o(.data* .rodata*)\n\t\t\t*:channelinfo.o(.data* .rodata*)\n\t\t\t*:aacdecoder_lib.o(.data* .rodata*)\n\t\t\t*:stereo.o(.data* .rodata*)\n#endif\n\t\t\t*(.overlay_data4 .overlay_rodata4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:mpa.o(.data* .bss*)\n\t\t\t*:bit.o(.data* .bss*)\n\t\t\t*:frame.o(.data* .bss*)\n\t\t\t*:huffman.o(.data* .bss*)\n\t\t\t*:layer12.o(.data* .bss*)\n\t\t\t*:layer3.o(.data* .bss*)\n\t\t\t*:stream.o(.data* .bss*)\n\t\t\t*:synth.o(.data* .bss*)\n\t\t\t*(.overlay_data5 .overlay_rodata5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data6\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_SCALABLE_ON)\n\t\t\t*(.constdata)\n\t\t\t*:Audio_asm.o(.data* .rodata*)\n\t\t\t*:vq.o(.data* .rodata*)\n\t\t\t*:util.o(.data* .rodata*)\n\t\t\t*:rate.o(.data* .rodata*)\n\t\t\t*:quant_bands.o(.data* .rodata*)\n\t\t\t*:modes.o(.data* .rodata*)\n\t\t\t*:mathops.o(.data* .rodata*)\n\t\t\t*:laplace.o(.data* .rodata*)\n\t\t\t*:entdec.o(.data* .rodata*)\n\t\t\t*:entcode.o(.data* .rodata*)\n\t\t\t*:cwrs.o(.data* .rodata*)\n\t\t\t*:audio_int32.o(.data* .rodata*)\n\t\t\t*:audio_decoder.o(.data* .rodata*)\n\t\t\t*:audio.o(.data* .rodata*)\n#endif\n#if defined(A2DP_LHDC_ON)\n\t\t\t*:lhdcUtil.o(.data* .rodata*)\n\t\t\t*:dec.o(.data* .rodata*)\n\t\t\t*:cirbuf.o(.data* .rodata*)\n#endif\n#if defined(A2DP_LDAC_ON)\n\t\t\t*:ldacBT_api.o(.data* .rodata*)\n\t\t\t*:decode_ldac.o(.data* .rodata*)\n\t\t\t*:dequant_ldac.o(.data* .rodata*)\n\t\t\t*:imdct_ldac.o(.data* .rodata*)\n\t\t\t*:ldacBT_internal.o(.data* .rodata*)\n\t\t\t*:ldaclib_api.o(.data* .rodata*)\n\t\t\t*:memory_ldac.o(.data* .rodata*)\n\t\t\t*:setpcm_ldac.o(.data* .rodata*)\n\t\t\t*:sigana_ldac.o(.data* .rodata*)\n\t\t\t*:tables_ldac.o(.data* .rodata*)\n\t\t\t*:tables_sigproc_ldac.o(.data* .rodata*)\n\t\t\t*:unpack_ldac.o(.data* .rodata*)\n#endif\n\t\t\t*(.overlay_data6 .overlay_rodata6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data7 .overlay_rodata7)\n\t\t\t. = ALIGN(4);\n\t\t}\n#endif\n\t\t.overlay_data_last\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > REGION_OVERLAY_DATA\n\n\t.dummy_overlay_data_end (.) (NOLOAD) :\n\t{\n\t\t__overlay_data_end__ = .;\n\t} > REGION_OVERLAY_DATA\n\n\tASSERT(__overlay_data_end__ - __overlay_data_start__ <= OVERLAY_DATA_SECTION_SIZE, \"overlay sections too large\")\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t.cp_ramx_last_dummy (NOLOAD) :\n\t{\n\t\t__cp_ramx_last_dummy_start = .;\n\t} > RAMCPX\n\n\t.cp_ram_last_dummy (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__cp_ram_last_dummy_start = .;\n\t} > RAMCP\n\n\t__cp_stack_top = ORIGIN(RAMCP) + LENGTH(RAMCP);\n\t__cp_stack_limit = __cp_stack_top - CP_STACK_SECTION_SIZE;\n\n\t__free_ramcpx = ORIGIN(RAMCPX) + LENGTH(RAMCPX) - __cp_ramx_last_dummy_start;\n\tASSERT(__cp_stack_limit >= __cp_ram_last_dummy_start, \"region RAMCP overflowed with stack\")\n\t__free_ramcp = __cp_stack_limit - __cp_ram_last_dummy_start;\n#endif\n\n\t.text (FLASH_TO_FLASHX(__load_stop_overlay_data_last)) : AT (FLASHX_TO_FLASH(ADDR(.text)))\n\t{\n\t\t*(.text*)\n\t\t*(.flash_text*)\n\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n\t} > FLASHX\n\n\t.ARM.extab (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.extab)))\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > FLASHX\n\n\t__exidx_start = .;\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.exidx)))\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > FLASHX\n\t__exidx_end = .;\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.rodata (.) :\n\t{\n\t\t*(.rodata*)\n\t\t*(.flash_rodata*)\n\t\tKEEP(*(.eh_frame*))\n\t\t*(.note.gnu.build-id)\n\t} > FLASH\n\n#ifdef TRACE_STR_SECTION\n\t.trc_str (.) :\n\t{\n\t\t*(.trc_str*)\n\t} > FLASH\n#endif\n\n\t.ai.gatt.server.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__ai_gatt_server_table_start = .;\n\t\tKEEP(*(.ai_gatt_server_table))\n\t__ai_gatt_server_table_end = .;\n\t} > FLASH\n\n\t.ai.ble.handler.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__ai_ble_handler_table_start = .;\n\t\tKEEP(*(.ai_ble_handler_table))\n\t__ai_ble_handler_table_end = .;\n\t} > FLASH\n\n\t.ai.spp.register.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__ai_spp_register_table_start = .;\n\t\tKEEP(*(.ai_spp_register_table))\n\t__ai_spp_register_table_end = .;\n\t} > FLASH\n\n\t.tota.cmd.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__tota_handler_table_start = .;\n\t\tKEEP(*(.tota_handler_table))\n\t\t__tota_handler_table_end = .;\n\t} > FLASH\n\n\t.ai.handler.function.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__ai_handler_function_table_start = .;\n\t\tKEEP(*(.ai_handler_function_table))\n\t__ai_handler_function_table_end = .;\n\t} > FLASH\n\n\t.custom.cmd.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__custom_handler_table_start = .;\n\t\tKEEP(*(.custom_handler_table))\n\t\t__custom_handler_table_end = .;\n\t} > FLASH\n\n\t.thirdparty.event.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__thirdparty_handler_table_start = .;\n\t\tKEEP(*(.thirdparty_handler_table))\n\t\t__thirdparty_handler_table_end = .;\n\t} > FLASH\n\n#if defined(FIRMWARE_REV)\n\t.firmware_rev (.) :\n\t{\n\t\t. = ALIGN(64);\n\t\t*(.fw_rev)\n\t} > FLASH\n#endif\n\n\t/* To copy multiple FLASH to RAM sections,\n\t * uncomment .copy.table section and,\n\t * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.copy.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__copy_table_start__ = .;\n\t\tLONG (__etext)\n\t\tLONG (__data_start__)\n\t\tLONG (__data_end__ - __data_start__)\n\t\tLONG (__etext2)\n\t\tLONG (__data2_start__)\n\t\tLONG (__data2_end__ - __data2_start__)\n\t\t__copy_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t/* To clear multiple BSS sections,\n\t * uncomment .zero.table section and,\n\t * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.zero.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__zero_table_start__ = .;\n\t\tLONG (__bss_start__)\n\t\tLONG (__bss_end__ - __bss_start__)\n\t\tLONG (__bss2_start__)\n\t\tLONG (__bss2_end__ - __bss2_start__)\n\t\t__zero_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t/* Location counter can end up 2byte aligned with narrow Thumb code but\n\t   __etext is assumed by startup code to be the LMA of a section in RAM\n\t   which must be 4byte aligned */\n\t__etext = ALIGN(4);\n\n\t/* The VMA is either the end of overlay_data or the end of sram bss */\n\n\t.data : AT (__etext)\n\t{\n\t\t__data_start__ = .;\n\n\t\t*(vtable)\n\t\t. = ALIGN(4);\n\t\t*(.data*)\n\n\t\t. = ALIGN(4);\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\n\t\t/* All data end */\n\t\t. = ALIGN(4);\n\t\t__data_end__ = .;\n\n\t} > RAM\n\n\t.bss (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__bss_end__ = .;\n\t} > RAM\n\n\t.heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__HeapBase = .;\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t\t__HeapLimit = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n#if defined(ROM_UTILS_ON)\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM) - ROM_UTILS_RESV_RAM_SIZE;\n#else\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM);\n#endif\n\t__StackLimit = __StackTop - SIZEOF(.stack_dummy);\n\tPROVIDE(__stack = __StackTop);\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__StackLimit >= __HeapLimit, \"region RAM overflowed with stack\")\n\t__free_ram = __StackLimit - __HeapLimit;\n\n\t. = __etext + SIZEOF(.data);\n\n\t.system_info (.) :\n\t{\n\t\tKEEP(*(.system_info_list_size))\n\t\tKEEP(*(.system_info_list))\n\t\t. = ALIGN(4);\n\t}  > FLASH\n\n\t.build_info (.) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ALIGN(4);\n\t} > FLASH = 0x00000000\n\n#ifdef SLAVE_BIN_FLASH_OFFSET\n\t.slave_code (ORIGIN(FLASH) + SLAVE_BIN_FLASH_OFFSET):\n\t{\n\t\tKEEP(*(.slave_code_flash_rodata))\n\t} > FLASH\n#endif\n\n\t/* The following section MUST be the last loaded section */\n\t.code_start_addr (.) :\n\t{\n\t\tLONG(BUILD_INFO_MAGIC);\n\t\tLONG(ABSOLUTE(__flash_start));\n\t} > FLASH\n\n\t__flash_end = .;\n\n\t.coredump_section (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE - OTA_UPGRADE_LOG_SIZE - CORE_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__coredump_section_start = .;\n\t\t. = CORE_DUMP_SECTION_SIZE;\n\t\t__coredump_section_end = .;\n\t} > FLASH_NC\n\n\t.ota_upgrade_log (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE - OTA_UPGRADE_LOG_SIZE) (NOLOAD) :\n\t{\n\t\t__ota_upgrade_log_start = .;\n\t\t. = OTA_UPGRADE_LOG_SIZE;\n\t\t__ota_upgrade_log_end = .;\n\t} > FLASH_NC\n\n\t.log_dump (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__log_dump_start = .;\n\t\t. = LOG_DUMP_SECTION_SIZE;\n\t\t__log_dump_end = .;\n\t} > FLASH_NC\n\n\t.crash_dump (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE -  USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__crash_dump_start = .;\n\t\t. = CRASH_DUMP_SECTION_SIZE;\n\t\t__crash_dump_end = .;\n\t} > FLASH_NC\n\n\t.custom_parameter (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t AUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__custom_parameter_start = .;\n\t\t. = CUSTOM_PARAMETER_SECTION_SIZE;\n\t\t__custom_parameter_end = .;\n\t} > FLASH_NC\n\n\t.userdata (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2) (NOLOAD) :\n\t{\n\t\t__userdata_start = .;\n\t\t. = USERDATA_SECTION_SIZE*2;\n\t\t__userdata_end = .;\n\t} > FLASH_NC\n\n\t.audio (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE -\n\t\tAUD_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__aud_start = .;\n\t\t. = AUD_SECTION_SIZE;\n\t\t__aud_end = .;\n\t} > FLASH_NC\n\n\t.reserved (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__reserved_start = .;\n\t\t. = RESERVED_SECTION_SIZE;\n\t\t__reserved_end = .;\n\t} > FLASH_NC\n\n\t.factory (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__factory_start = .;\n\t\t. = FACTORY_SECTION_SIZE;\n\t\t__factory_end = .;\n\t} > FLASH_NC\n\n#ifdef OTA_BOOT_SIZE\n#if (OTA_BOOT_SIZE > FLASH_SIZE)\n#error \"OTA_BOOT_SIZE should <= FLASH_SIZE\"\n#endif\n#if defined(OTA_CODE_OFFSET) && (OTA_BOOT_SIZE > OTA_CODE_OFFSET)\n#error \"OTA_BOOT_SIZE should <= OTA_CODE_OFFSET\"\n#endif\n\t__tail_section_start = FLASH_BASE + OTA_BOOT_SIZE;\n#else\n\t__tail_section_start = __ota_upgrade_log_start;\n#endif\n\n\tASSERT(FLASH_NC_TO_C(__tail_section_start) >= __flash_end, \"region FLASH overflowed\")\n\t__free_flash = FLASH_NC_TO_C(__tail_section_start) - __flash_end;\n\n#if !defined(OTA_BOOT_SIZE) && defined(OTA_REMAP_OFFSET)\n\tASSERT((FLASH_BASE & 0x03FFFFFF) == 0, \"bad FLASH_BASE\")\n\tASSERT((FLASH_SIZE & (FLASH_SIZE - 1)) == 0, \"bad FLASH_SIZE\")\n#ifdef CHIP_BEST2300P\n\tASSERT(__flash_end <= FLASH_BASE + OTA_REMAP_OFFSET, \"flash code size too large to remap\")\n\tASSERT(__flash_start - FLASH_BASE >= FLASH_NC_BASE + FLASH_SIZE - __tail_section_start, \"flash code conflicted with tail sections in remap\")\n\tASSERT(__flash_start - FLASH_BASE >= FLASH_SIZE / (1 << (4 + 1)), \"flash code cannot remap within 4 regions (max code size is half of flash size)\")\n\tASSERT((__flash_start - FLASH_BASE) % (FLASH_SIZE / (1 << (4 + 1))) == 0, \"flash code start address not aligned with remap region boundary\")\n#else\n\tASSERT(((OTA_REMAP_OFFSET) & (0x1000 - 1)) == 0, \"OTA_REMAP_OFFSET not aligned with 4K sector boundary\")\n\tASSERT(__flash_end <= FLASH_BASE + (OTA_REMAP_OFFSET), \"flash code size too large to remap\")\n\tASSERT((__tail_section_start & (0x1000 - 1)) == 0, \"__tail_section_start not aligned with 4K sector boundary\")\n\tASSERT(__flash_end + (OTA_REMAP_OFFSET) <= __tail_section_start, \"flash code conflicted with tail sections in remap\")\n#endif\n#endif\n}\n\n"
  },
  {
    "path": "scripts/link/best2000_bisto.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#ifdef RB_CODEC\n#define HEAP_SECTION_SIZE\t\t\t0x1000\n#else\n#define HEAP_SECTION_SIZE\t\t\t0x1000\n#endif\n\n#define STACK_SECTION_SIZE\t\t\t0xD00\n\n#ifdef RB_CODEC\n#define OVERLAY_DATA_SECTION_SIZE\t0xA000\n#else\n#define OVERLAY_DATA_SECTION_SIZE\t0x8000\n#endif\n\n#if (RAM_SIZE >= 0x48000)\n#if defined(CHIP_BEST2000)\n#if defined(BTUSB_AUDIO_MODE)\n#define FAST_XRAM_SECTION_SIZE\t\t0xC200\n#else\n#define FAST_XRAM_SECTION_SIZE\t\t0xC200\n#endif\n#else\n#if defined(BTUSB_AUDIO_MODE)\n#define FAST_XRAM_SECTION_SIZE\t\t0x1A000\n#else\n#define FAST_XRAM_SECTION_SIZE\t\t0x16000\n#endif\n#endif\n#else\n#define FAST_XRAM_SECTION_SIZE\t\t0x8000\n#endif\n\n#ifndef OTA_CODE_OFFSET\n#define OTA_CODE_OFFSET\t\t\t\t0\n#endif\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE + OTA_CODE_OFFSET)\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE\t\t\t(FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n#define FLASH_NC_REGION_BASE\t\tFLASH_C_TO_NC(FLASH_REGION_BASE)\n#define FLASHX_REGION_BASE\t\t\tFLASH_TO_FLASHX(FLASH_REGION_BASE)\n\n\n/* Linker script to configure memory regions. */\n/* See plat_addr_map.h and common.mk for the macro definitions */\nMEMORY\n{\n\tROM\t\t\t(rx)\t: ORIGIN = ROM_BASE,\t\t\t\tLENGTH = ROM_SIZE\n\tFLASH \t\t(r)\t\t: ORIGIN = FLASH_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tFLASH_NC\t(r)\t\t: ORIGIN = FLASH_NC_REGION_BASE,\tLENGTH = FLASH_REGION_SIZE\n\tFLASHX\t\t(rx)\t: ORIGIN = FLASHX_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tRAM\t\t\t(rwx)\t: ORIGIN = RAM_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tRAMX\t\t(rx)\t: ORIGIN = RAMX_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tFRAMX\t\t(rwx)\t: ORIGIN = RAMX_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE,\tLENGTH = FAST_XRAM_SECTION_SIZE\n#ifdef PSRAM_BASE\n\tPSRAM \t\t(rwx)\t: ORIGIN = PSRAM_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAM_NC\t(rwx)\t: ORIGIN = PSRAM_NC_BASE,\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAMX\t\t(rx)\t: ORIGIN = PSRAMX_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n#endif\n}\n\n/* Library configurations */\nGROUP(libgcc.a libc.a libm.a libnosys.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions FLASH and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exidx_start\n *   __exidx_end\n *   __copy_table_start__\n *   __copy_table_end__\n *   __zero_table_start__\n *   __zero_table_end__\n *   __etext\n *   __data_start__\n *   __preinit_array_start\n *   __preinit_array_end\n *   __init_array_start\n *   __init_array_end\n *   __fini_array_start\n *   __fini_array_end\n *   __data_end__\n *   __bss_start__\n *   __bss_end__\n *   __end__\n *   end\n *   __HeapLimit\n *   __StackLimit\n *   __StackTop\n *   __stack\n *   __free_ram\n *   __factory_start\n *   __factory_end\n *   __calib_start\n *   __calib_end\n *   __flash_start\n *   __flash_end\n *   __free_flash\n *   __boot_sram_start_flash__\n *   __boot_sram_end_flash__\n *   __boot_sram_start__\n *   __boot_bss_sram_start__\n *   __boot_bss_sram_end__\n *   __sram_text_data_start_flash__\n *   __sram_text_data_end_flash__\n *   __fast_sram_text_data_start__\n *   __fast_sram_text_data_end__\n *   __fast_sram_text_data_start_flash__\n *   __fast_sram_text_data_end_flash__\n *   __sram_text_data_start__\n *   __sram_bss_start__\n *   __sram_bss_end__\n *   __overlay_text_start__\n *   __overlay_text_exec_start__\n *   __overlay_data_start__\n */\nENTRY(Boot_Loader)\n\nSECTIONS\n{\n\t__export_fn_rom = (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE);\n\n\t.boot_struct (ORIGIN(FLASH)) :\n\t{\n\t\t__flash_start = .;\n\t\tKEEP(*(.boot_struct))\n\t\t. = ALIGN(4);\n\t} > FLASH\n\n\t. = FLASH_TO_FLASHX(.);\n\n\t.boot_text_flash (.) : AT (FLASHX_TO_FLASH(ADDR(.boot_text_flash)))\n\t{\n\t\t*(.boot_loader)\n\t\t*(.boot_text_flash*)\n\t\t*(.boot_rodata*)\n\t\t. = ALIGN(4);\n\t} > FLASHX\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.got_info (.) :\n\t{\n\t\t__got_info_start = .;\n\t\t__got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__got_end = .;\n\t\t__got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__got_info_end = .;\n\t} > FLASH\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.userdata_pool (.) (NOLOAD) :\n\t{\n\t\t*(.userdata_pool)\n\t\t. = ALIGN(4);\n\t\t__userdata_pool_end__ = .;\n\t} > RAM\n\n\t__boot_sram_start_flash__ = LOADADDR(.got_info) + SIZEOF(.got_info);\n\t__boot_sram_start__ = __userdata_pool_end__;\n\t.boot_text_sram (RAM_TO_RAMX(__boot_sram_start__)) : AT (__boot_sram_start_flash__)\n\t{\n\t\t/* memcpy.o or libc_nano.a(lib_a-memcpy.o/lib_a-memcpy-stub.o) */\n\t\t*:memcpy.o(.text*)\n\t\t*:lib_a-memcpy*.o(.text*)\n\t\t*:libc_rom.o(.text*)\n\n\t\t/* memset.o or libc_nano.a(lib_a-memset.o) */\n\t\t*:memset.o(.text*)\n\t\t*:lib_a-memset*.o(.text*)\n\n\t\t*:hal_norflash*.o(.text*)\n\t\t*:norflash_*.o(.text*)\n\n\t\t*(.boot_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__boot_text_sram_end = .;\n\t} > RAMX\n\n\t.boot_data_sram (RAMX_TO_RAM(ADDR(.boot_text_sram) + SIZEOF(.boot_text_sram))) :\n\t\t\t\t\tAT (__boot_sram_start_flash__ + SIZEOF(.boot_text_sram))\n\t{\n\t\t*:hal_norflash*.o(.data* .rodata*)\n\t\t*:norflash_*.o(.data* .rodata*)\n\t\t*:hal_psram.o(.data* .rodata*)\n\t\t*(.boot_data*)\n\t\t. = ALIGN(4);\n\t\t__boot_data_sram_end = .;\n\t} > RAM\n\n\t__boot_sram_end_flash__ = __boot_sram_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.boot_text_sram) + SIZEOF(.boot_data_sram);\n\n\t.boot_bss_sram (.) (NOLOAD) :\n\t{\n\t\t__boot_bss_sram_start__ = .;\n\t\t*:hal_norflash*.o(.bss*)\n\t\t*:norflash_*.o(.bss*)\n\t\t*:hal_psram.o(.bss*)\n\t\t*(.boot_bss*)\n\t\t. = ALIGN(4);\n\t\t__boot_bss_sram_end__ = .;\n\t} > RAM\n\n\t__sram_text_data_start_flash__ = __boot_sram_end_flash__;\n\t__sram_text_data_start__ = __boot_bss_sram_end__;\n\t.sram_text (RAM_TO_RAMX(__sram_text_data_start__)) :\n\t\t\t\tAT (__sram_text_data_start_flash__)\n\t{\n\t\t*(.sram_text*)\n\t\t. = ALIGN(4);\n\t} > RAMX\n\n\t.sram_data (RAMX_TO_RAM(ADDR(.sram_text) + SIZEOF(.sram_text))) :\n\t\t\t\tAT (__sram_text_data_start_flash__ + SIZEOF(.sram_text))\n\t{\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_usb.o(.rodata*)\n#endif\n\t\t*:utils.o(.data* .rodata*)\n\t\t*:cqueue.o(.data* .rodata*)\n\t\t*:iir_process.o(.data* .rodata*)\n#if defined(HFP_1_6_ENABLE)\n\t\t*:sbcplc.o(.data* .rodata*)\n\t\t*:sbc.o(.data* .rodata*)\n\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n#if defined(A2DP_AAC_ON)\n\t\t*:fixpoint_math.o(.data* .rodata*)\n\t\t*:FDK_bitbuffer.o(.data* .rodata*)\n#endif\n\t\t*(.sram_data*)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__sram_text_data_end_flash__ = __sram_text_data_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.sram_text) + SIZEOF(.sram_data);\n\n\t.sram_bss (.) (NOLOAD) :\n\t{\n\t\t__sram_bss_start__ = .;\n\t\t*:utils.o(.bss*)\n\t\t*(.sram_bss*)\n\t\t. = ALIGN(4);\n\t\t__sram_bss_end__ = .;\n\t} > RAM\n\n\t__fast_sram_text_data_start_flash__ = __sram_text_data_end_flash__;\n\t.fast_text_sram (ORIGIN(FRAMX)) : AT (__fast_sram_text_data_start_flash__)\n\t{\n\t\t__fast_sram_text_data_start__ = .;\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_dma.o(.text*)\n\t\t*:hal_uart.o(.text*)\n\t\t*:hal_trace.o(.text*)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_usb.o(.text*)\n\n\t\t*:usb_audio.o(.text*)\n\t\t*:usb_audio_sync.o(.text*)\n\t\t*:usb_audio_cdc.o(.text*)\n\n\t\t*:usbaudio_entry.o(.text*)\n\t\t*:usb_audio_app.o(.text*)\n#endif\n\n\t\t/* memmove.o or libc_nano.a(lib_a-memmove.o) */\n\t\t*:memmove.o(.text*)\n\t\t*:lib_a-memmove.o(.text*)\n\t\t*:utils.o(.text*)\n\t\t*:cqueue.o(.text*)\n\t\t*:audio_resample_ex.o(.text*)\n#if defined(MIX_MIC_DURING_MUSIC)\n\t\t*:app_bt_stream.o(.text*)\n#endif\n#if defined(HFP_1_6_ENABLE)\n#if defined(__SBC_FUNC_IN_ROM__)\n\t\t*:sbc.o(.text*)\n#else\n\t\t*:sbc.o(.text.sbc_is_stream_info_valid)\n\t\t*:sbc.o(.text.sbc_frame_length_get)\n\t\t*:sbc.o(.text.sbc_4bit_crc_calc)\n\t\t*:sbc.o(.text.sbc_bits_for_mono_alloc)\n\t\t*:sbc.o(.text.sbc_bits_for_stereo_alloc)\n\t\t*:sbc.o(.text.sbc_header_process)\n\t\t*:sbc.o(.text.sbc_factors_process)\n\t\t*:sbc.o(.text.sbc_sample_extract)\n\t\t*:sbc.o(.text.sbc_sbsamples_make)\n\t\t*:sbc.o(.text.sbc_joint_process)\n\t\t*:sbc.o(.text.sbc_4band_synth_filter)\n\t\t*:sbc.o(.text.sbc_8band_synth_filter)\n\t\t*:sbc.o(.text.sbc_decoder_state_reset)\n\t\t*:sbc.o(.text.sbc_frame_mute)\n\t\t*:sbc.o(.text.sbc_frames_decode)\n\t\t*:sbc.o(.text.sbc_samples_quant)\n\t\t*:sbc.o(.text.sbc_decoder_init)\n\t\t*:sbc.o(.text.sbc_encoder_init)\n\t\t*:sbc.o(.text.sbc_frames_encode)\n#endif\n\t\t*:sbc_math.o(.text*)\n#endif\n#if defined(A2DP_AAC_ON)\n\t\t*:fixpoint_math.o(.text*)\n\t\t*:FDK_bitbuffer.o(.text*)\n\t\t*:FDK_tools_rom.o(.text*FDKgetWindowSlope*)\n\t\t*:FDK_tools_rom.o(.text*getBitstreamElementList*)\n\t\t*:dct.o(.text*dct_IV*)\n#if !defined(__SBC_FUNC_IN_ROM_VBEST2000__)\n\t\t*:fft.o(.text._Z3fftiPlPi)\n\t\t*:fft_rad2.o(.text*dit_fft*)\n\t\t*:dct.o(.text*getTables*)\n#endif\n#ifdef VOICE_DATAPATH\n\t\t*:opus_encoder.o(.text*)\n#endif\n#endif\n\n#if defined(__AUDIO_SPECTRUM__)\n\t\t*:kiss_fft.o(.text*)\n\t\t*:kiss_fftr.o(.text*)\n\t\t*:fftwrap.o(.text*)\n\t\t*:spectrum_fix.o(.text*)\n\t\t*:audio_spectrum.o(.text*)\n#endif\n\t\t*:exp_func.o(.data* .rodata*)\n\t\t*(.fast_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__fast_sram_text_data_end__ = .;\n\t} > FRAMX\n\t__fast_sram_text_data_end_flash__ = __fast_sram_text_data_start_flash__ + SIZEOF(.fast_text_sram);\n\n\t__overlay_text_start__ = RAMX_TO_RAM(__fast_sram_text_data_end__);\n\t__overlay_text_exec_start__ = RAM_TO_RAMX(__overlay_text_start__);\n\tOVERLAY (__overlay_text_exec_start__) : NOCROSSREFS AT (__fast_sram_text_data_end_flash__)\n\t{\n#ifndef NO_OVERLAY\n\t\t.overlay_text0\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:preprocess.o(.text*)\n\t\t\t*:filterbank.o(.text*)\n#if !defined(A2DP_SCALABLE_ON)\n\t\t\t*:kiss_fft.o(.text*)\n#endif\n\t\t\t*:kiss_fftr.o(.text*)\n\t\t\t*:fftwrap.o(.text*)\n\t\t\t*:mdf.o(.text*)\n\t\t\t*:plc_8000.o(.text*)\n#if defined(HFP_1_6_ENABLE)\n\t\t\t*:plc_16000.o(.text*)\n#endif\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_Process)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_ValidRateAndFrameLength)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_CalcVad16khz)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_Downsampling)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_CalcVad8khz)\n\t\t\t*:vad_filterbank.o(.text.*)\n\t\t\t*:energy.o(.text.*)\n\t\t\t*:get_scaling_square.o(.text.*)\n\t\t\t*:dual_mic_denoise.o(.text*)\n\t\t\t*:cross_correlation.o(.text*)\n\t\t\t*:min_max_operations.o(.text*)\n\t\t\t*:resample_by_2_internal.o(.text*)\n\t\t\t*:division_operations.o(.text*)\n\t\t\t*:downsample_fast.o(.text*)\n\t\t\t*:resample_fractional.o(.text*)\n\t\t\t*:resample_48khz.o(.text*)\n\t\t\t*:vad_sp.o(.text*)\n\t\t\t*:vad_core.o(.text*)\n\t\t\t*:webrtc_vad.o(.text*)\n\t\t\t*:vad_gmm.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n\t\t\t*:speech_2mic_ns2_denoise.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS4)\n\t\t\t*:sensormic_denoise.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS2)\n\t\t\t*:lc_mmse_ns.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT)\n\t\t\t*:lc_mmse_ns_float.o(.text*)\n\t\t\t*:cmsis_fftwrap.o(.text*)\n\t\t\t*:arm_rfft_fast_f32.o(.text*)\n\t\t\t*:arm_cfft_f32.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS3) || defined(SPEECH_RX_NS3)\n\t\t\t*:ns3.o(.text*)\n\t\t\t*:noise_suppression_x.o(.text*)\n\t\t\t*:nsx_core.o(.text*)\n\t\t\t*:nsx_core_c.o(.text*)\n\t\t\t*:copy_set_operations.o(.text*)\n\t\t\t*:cross_correlation.o(.text*)\n\t\t\t*:division_operations.o(.text*)\n\t\t\t*:dot_product_with_scale.o(.text*)\n\t\t\t*:downsample_fast.o(.text*)\n\t\t\t*:energy.o(.text*)\n\t\t\t*:get_scaling_square.o(.text*)\n\t\t\t*:min_max_operations.o(.text*)\n\t\t\t*:real_fft.o(.text*)\n\t\t\t*:resample_by_2.o(.text*)\n\t\t\t*:resample_by_2_internal.o(.text*)\n\t\t\t*:spl_init.o(.text*)\n\t\t\t*:spl_sqrt.o(.text*)\n\t\t\t*:spl_sqrt_floor.o(.text*)\n\t\t\t*:vector_scaling_operations.o(.text*)\n#endif\n#if defined(SPEECH_TX_AEC2FLOAT)\n\t\t\t*:coherence.o(.text*)\n\t\t\t*:echo_canceller.o(.text*)\n\t\t\t*:echo_suppression(.text*)\n\t\t\t*:iirfilt.o(.text*)\n\t\t\t*:integer_delay.o(.text*)\n\t\t\t*:mdf2.o(.text*)\n\t\t\t*:ringbuf.o(.text*)\n#endif\n#if defined(SPEECH_TX_EQ)\n\t\t\t*:speech_arm_eq.o(.text*)\n\t\t\t*:arm_biquad_cascade_df1_f32.o(.text*)\n#endif\n#if defined(__SMARTVOICE__)\n#if defined(SPEECH_TX_2MIC_NS2) || defined(SPEECH_TX_2MIC_NS4) || defined(SPEECH_TX_NS2)\n            *:app_smartvoice.o(.text._Z23mic_data_process_deinitv)\n            *:app_smartvoice.o(.text._Z21mic_data_process_initv)\n            *:app_smartvoice.o(.text._Z20mic_data_process_runPsm)\n#endif\n#endif\n\t\t\t*(.overlay_text0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.text*)\n\t\t\t*:sbc_math.o(.text*)\n#endif\n\t\t\t*:fixedpoint.o(.text*)\n\t\t\t*:replaygain.o(.text*)\n\t\t\t*:dsp_core.o(.text*)\n\t\t\t*:dsp_misc.o(.text*)\n\t\t\t*:dsp_filter.o(.text*)\n\t\t\t*:dsp_sample_input.o(.text*)\n\t\t\t*:dsp_sample_output.o(.text*)\n\t\t\t*:eq.o(.text*)\n\t\t\t*:pga.o(.text*)\n#if !defined(A2DP_AAC_ON) && !defined(A2DP_LHDC_ON)\n\t\t\t*:fir_process.o(.text*)\n\t\t\t*:iir_process.o(.text.iir_run .text.*iir_run_per_*)\n#endif\n#endif\n\t\t\t*(.overlay_a2dp_sbc*)\n\t\t\t*(.overlay_text1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fmdec.o(.text* .data* .rodata* .bss*)\n\t\t\t*(.overlay_text2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.text*)\n\t\t\t*(.overlay_text3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:aacdec.o(.text*)\n\t\t\t*:aactabs.o(.text*)\n\t\t\t*:bitstream.o(.text*)\n\t\t\t*:buffers.o(.text*)\n\t\t\t*:dct4.o(.text*)\n\t\t\t*:decelmnt.o(.text*)\n\t\t\t*:dequant.o(.text*)\n\t\t\t*:fft.o(.text*)\n\t\t\t*:filefmt.o(.text*)\n\t\t\t*:huffman.o(.text*)\n\t\t\t*:hufftabs.o(.text*)\n\t\t\t*:imdct.o(.text*)\n\t\t\t*:noiseless.o(.text*)\n\t\t\t*:pns.o(.text*)\n\t\t\t*:stproc.o(.text*)\n\t\t\t*:tns.o(.text*)\n\t\t\t*:trigtabs.o(.text*)\n\t\t\t*:trigtabs_fltgen.o(.text*)\n#endif\n\t\t\t*(.overlay_a2dp_aac*)\n\t\t\t*(.overlay_text4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:mpa.o(.text*)\n\t\t\t*:bit.o(.text*)\n\t\t\t*:frame.o(.text*)\n\t\t\t*:huffman.o(.text*)\n\t\t\t*:layer12.o(.text*)\n\t\t\t*:layer3.o(.text*)\n\t\t\t*:stream.o(.text*)\n\t\t\t*:synth.o(.text*)\n\t\t\t*(.overlay_text5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text6\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_SCALABLE_ON)\n\t\t\t*:Audio_asm.o(.text*)\n\t\t\t*:vq.o(.text*)\n\t\t\t*:util.o(.text*)\n\t\t\t*:rate.o(.text*)\n\t\t\t*:quant_bands.o(.text*)\n\t\t\t*:modes.o(.text*)\n\t\t\t*:mathops.o(.text*)\n\t\t\t*:laplace.o(.text*)\n\t\t\t*:entdec.o(.text*)\n\t\t\t*:entcode.o(.text*)\n\t\t\t*:cwrs.o(.text*)\n\t\t\t*:audio_int32.o(.text*)\n\t\t\t*:audio_decoder.o(.text*)\n\t\t\t*:audio.o(.text*)\n\t\t\t*(.overlay_a2dp_ssc*)\n#endif\n\n#if defined(A2DP_LHDC_ON)\n\t\t\t*:lhdcUtil.o(.text*)\n\t\t\t*:dec.o(.text*)\n\t\t\t*:cirbuf.o(.text*)\n\t\t\t*(.overlay_a2dp_lhdc*)\n#endif\n#if defined(A2DP_LDAC_ON)\n\t\t\t*:ldacBT_api.o(.text*)\n\t\t\t*:decode_ldac.o(.text*)\n\t\t\t*:dequant_ldac.o(.text*)\n\t\t\t*:imdct_ldac.o(.text*)\n\t\t\t*:ldacBT_internal.o(.text*)\n\t\t\t*:ldaclib_api.o(.text*)\n\t\t\t*:memory_ldac.o(.text*)\n\t\t\t*:setpcm_ldac.o(.text*)\n\t\t\t*:sigana_ldac.o(.text*)\n\t\t\t*:tables_ldac.o(.text*)\n\t\t\t*:tables_sigproc_ldac.o(.text*)\n\t\t\t*:unpack_ldac.o(.text*)\n\t\t\t*(.overlay_a2dp_ldac*)\n#endif\n\n\t\t\t*(.overlay_text6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text7)\n\t\t\t. = ALIGN(4);\n\t\t}\n#endif\n\t\t.overlay_text_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > FRAMX\n\n\t.dummy_overlay_text (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_text_end__ = .;\n\t} > FRAMX\n\n\tASSERT(__dummy_overlay_text_end__ - __fast_sram_text_data_start__ <= FAST_XRAM_SECTION_SIZE, \"fast xram sections too large\")\n\t__free_fram = FAST_XRAM_SECTION_SIZE - (__dummy_overlay_text_end__ - __fast_sram_text_data_start__);\n\n\t__overlay_data_start__ = __sram_bss_end__;\n\tOVERLAY (__overlay_data_start__) : NOCROSSREFS AT (__load_stop_overlay_text_end)\n\t{\n#ifndef NO_OVERLAY\n\t\t.overlay_data0\n\t\t{\n\t\t\t/* Explicitly place 4 bytes at section start to avoid \"section type changed to PROGBITS\" warnings */\n\t\t\tLONG(0);\n\t\t\t/* common */\n\t\t\t*:fastmath_const.o(.data* .rodata*)\n\t\t\t*:speech_win.o(.data* .rodata*)\n\n\t\t\t*:preprocess.o(.data* .rodata*)\n\t\t\t*:filterbank.o(.data* .rodata*)\n#if !defined(A2DP_SCALABLE_ON)\n\t\t\t*:kiss_fft.o(.data* .rodata*)\n#endif\n\t\t\t*:kiss_fftr.o(.data* .rodata*)\n\t\t\t*:fftwrap.o(.data* .rodata*)\n\t\t\t*:mdf.o(.data* .rodata*)\n\t\t\t*:plc_8000.o(.data* .rodata*)\n#if defined(HFP_1_6_ENABLE)\n\t\t\t*:plc_16000.o(.data* .rodata*)\n#endif\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.data* .rodata* .bss*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n\t\t\t*:dual_mic_denoise.o(.data* .rodata*)\n\t\t\t*:vad_filterbank.o(.data* .rodata*)\n\t\t\t*:energy.o(.data* .rodata*)\n\t\t\t*:get_scaling_square.o(.data* .rodata*)\n\n\t\t\t*:cross_correlation.o(.data* .rodata*)\n\t\t\t*:min_max_operations.o(.data* .rodata*)\n\t\t\t*:resample_by_2_internal.o(.data* .rodata*)\n\t\t\t*:division_operations.o(.data* .rodata*)\n\t\t\t*:downsample_fast.o(.data* .rodata*)\n\t\t\t*:resample_fractional.o(.data* .rodata*)\n\t\t\t*:resample_48khz.o(.data* .rodata*)\n\t\t\t*:vad_sp.o(.data* .rodata*)\n\t\t\t*:vad_core.o(.data* .rodata*)\n\t\t\t*:webrtc_vad.o(.data* .rodata*)\n\t\t\t*:vad_gmm.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n\t\t\t*:speech_2mic_ns2_denoise.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2) || defined(SPEECH_RX_NS2)\n\t\t\t*:lc_mmse_ns.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS3) || defined(SPEECH_RX_NS3)\n\t\t\t*:nsx_core.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT)\n\t\t\t*:lc_mmse_ns_float.o(.data* .rodata*)\n#endif\n#if defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:iir_resample.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT) || defined(SPEECH_TX_AEC2FLOAT)\n\t\t\t*:arm_common_tables.o(.rodata.armBitRevIndexTable256)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_256)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_rfft_512)\n\t\t\t*:arm_common_tables.o(.rodata.armBitRevIndexTable128)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_128)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_rfft_256)\n#endif\n\t\t\t*(.overlay_data0 .overlay_rodata0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.data* .rodata*)\n\t\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n\t\t\t*:fixedpoint.o(.data* .rodata*)\n\t\t\t*:replaygain.o(.data* .rodata*)\n\t\t\t*:dsp_core.o(.data* .rodata*)\n\t\t\t*:dsp_misc.o(.data* .rodata*)\n\t\t\t*:dsp_filter.o(.data* .rodata*)\n\t\t\t*:dsp_sample_input.o(.data* .rodata*)\n\t\t\t*:dsp_sample_output.o(.data* .rodata*)\n\t\t\t*:eq.o(.data* .rodata*)\n\t\t\t*:pga.o(.data* .rodata*)\n#if !defined(A2DP_AAC_ON)\n\t\t\t*:fir_process.o(.data* .rodata*)\n#endif\n#endif\n\t\t\t*(.overlay_data1 .overlay_rodata1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data2 .overlay_rodata2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.data* .rodata*)\n\t\t\t*(.overlay_data3 .overlay_rodata3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:block.o(.data* .rodata*)\n\t\t\t*:tpdec_lib.o(.data* .rodata*)\n\t\t\t*:tpdec_latm.o(.data* .rodata*)\n\t\t\t*:aacdec_pns.o(.data* .rodata*)\n\t\t\t*:aacdec_tns.o(.data* .rodata*)\n\t\t\t*:mdct.o(.data* .rodata*)\n\t\t\t*:pulsedata.o(.data* .rodata*)\n\t\t\t*:channel.o(.data* .rodata*)\n\t\t\t*:tpdec_asc.o(.data* .rodata*)\n\t\t\t*:aacdecoder.o(.data* .rodata*)\n\t\t\t*:channelinfo.o(.data* .rodata*)\n\t\t\t*:aacdecoder_lib.o(.data* .rodata*)\n\t\t\t*:stereo.o(.data* .rodata*)\n#endif\n\t\t\t*(.overlay_data4 .overlay_rodata4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:mpa.o(.data* .bss*)\n\t\t\t*:bit.o(.data* .bss*)\n\t\t\t*:frame.o(.data* .bss*)\n\t\t\t*:huffman.o(.data* .bss*)\n\t\t\t*:layer12.o(.data* .bss*)\n\t\t\t*:layer3.o(.data* .bss*)\n\t\t\t*:stream.o(.data* .bss*)\n\t\t\t*:synth.o(.data* .bss*)\n\t\t\t*(.overlay_data5 .overlay_rodata5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data6\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_SCALABLE_ON)\n\t\t\t*(.constdata)\n\t\t\t*:Audio_asm.o(.data* .rodata*)\n\t\t\t*:vq.o(.data* .rodata*)\n\t\t\t*:util.o(.data* .rodata*)\n\t\t\t*:rate.o(.data* .rodata*)\n\t\t\t*:quant_bands.o(.data* .rodata*)\n\t\t\t*:modes.o(.data* .rodata*)\n\t\t\t*:mathops.o(.data* .rodata*)\n\t\t\t*:laplace.o(.data* .rodata*)\n\t\t\t*:entdec.o(.data* .rodata*)\n\t\t\t*:entcode.o(.data* .rodata*)\n\t\t\t*:cwrs.o(.data* .rodata*)\n\t\t\t*:audio_int32.o(.data* .rodata*)\n\t\t\t*:audio_decoder.o(.data* .rodata*)\n\t\t\t*:audio.o(.data* .rodata*)\n\t\t\t*:a2dpplay.o(.bss.*scalable_decoder_place)\n\t\t\t*:a2dpplay.o(.bss.*scalable_input_mid_buf)\n#endif\n#if defined(A2DP_LHDC_ON)\n\t\t\t*:lhdcUtil.o(.data* .rodata*)\n    \t\t        *:dec.o(.data* .rodata*)\n\t\t\t*:cirbuf.o(.data* .rodata*)\n#endif\n\t\t\t*(.overlay_data6 .overlay_rodata6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data7 .overlay_rodata7)\n\t\t\t. = ALIGN(4);\n\t\t}\n#endif\n\t\t.overlay_data_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > RAM\n\n\t.dummy_overlay_data (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_data_end__ = .;\n\t} > RAM\n\n\tASSERT(__dummy_overlay_data_end__ - __overlay_data_start__ <= OVERLAY_DATA_SECTION_SIZE, \"overlay sections too large\")\n\n\t.text (FLASH_TO_FLASHX(__load_stop_overlay_data_end)) : AT (FLASHX_TO_FLASH(ADDR(.text)))\n\t{\n\t\t*(.text*)\n\t\t*(.flash_text*)\n\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n\t} > FLASHX\n\n\t.ARM.extab (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.extab)))\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > FLASHX\n\n\t__exidx_start = .;\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.exidx)))\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > FLASHX\n\t__exidx_end = .;\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.rodata (.) :\n\t{\n\t\t*(.rodata*)\n\t\t*(.flash_rodata*)\n\t\tKEEP(*(.eh_frame*))\n\t\t*(.note.gnu.build-id)\n\t} > FLASH\n\n#ifdef TRACE_STR_SECTION\n\t.trc_str (.) :\n\t{\n\t\t*(.trc_str*)\n\t} > FLASH\n#endif\n\n\t.custom.cmd.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__custom_handler_table_start = .;\n\t\tKEEP(*(.custom_handler_table))\n\t\t__custom_handler_table_end = .;\n\t} > FLASH\n\n\t.thirdparty.event.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__thirdparty_handler_table_start = .;\n\t\tKEEP(*(.thirdparty_handler_table))\n\t\t__thirdparty_handler_table_end = .;\n\t} > FLASH\n\n#if defined(FIRMWARE_REV)\n\t.firmware_rev (.) :\n\t{\n\t\t. = ALIGN(64);\n\t\t*(.fw_rev)\n\t} > FLASH\n#endif\n\n\t/* To copy multiple FLASH to RAM sections,\n\t * uncomment .copy.table section and,\n\t * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.copy.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__copy_table_start__ = .;\n\t\tLONG (__etext)\n\t\tLONG (__data_start__)\n\t\tLONG (__data_end__ - __data_start__)\n\t\tLONG (__etext2)\n\t\tLONG (__data2_start__)\n\t\tLONG (__data2_end__ - __data2_start__)\n\t\t__copy_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t/* To clear multiple BSS sections,\n\t * uncomment .zero.table section and,\n\t * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.zero.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__zero_table_start__ = .;\n\t\tLONG (__bss_start__)\n\t\tLONG (__bss_end__ - __bss_start__)\n\t\tLONG (__bss2_start__)\n\t\tLONG (__bss2_end__ - __bss2_start__)\n\t\t__zero_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t__etext = .;\n\n\t.data : AT (__etext)\n\t{\n\t\t__data_start__ = .;\n\t\t*(vtable)\n\t\t*(.data*)\n\n\t\t. = ALIGN(4);\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\t\t. = ALIGN(4);\n\t\t/* All data end */\n\t\t__data_end__ = .;\n\n\t} > RAM\n\n\t.bss (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__bss_end__ = .;\n\t} > RAM\n\n\t.heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__HeapBase = .;\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t\t__HeapLimit = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM);\n\t__StackLimit = __StackTop - SIZEOF(.stack_dummy);\n\tPROVIDE(__stack = __StackTop);\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__StackLimit >= __HeapLimit, \"region RAM overflowed with stack\")\n\t__free_ram = __StackLimit - __HeapLimit;\n\n\t. = __etext + SIZEOF(.data);\n\n\t.system_info (.) :\n\t{\n\t\tKEEP(*(.system_info_list_size))\n\t\tKEEP(*(.system_info_list))\n\t\t. = ALIGN(4);\n\t}  > FLASH\n\n\t.build_info (.) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ALIGN(4);\n\t} > FLASH = 0x00000000\n\n#ifdef SLAVE_BIN_FLASH_OFFSET\n\t.slave_code (ORIGIN(FLASH) + SLAVE_BIN_FLASH_OFFSET):\n\t{\n\t\tKEEP(*(.slave_code_flash_rodata))\n\t} > FLASH\n#endif\n\n\t/* The following section be the last loaded section */\n\t.code_start_addr (.) :\n\t{\n\t\tLONG(BUILD_INFO_MAGIC);\n\t\tLONG(ABSOLUTE(__flash_start));\n\t} > FLASH\n\n\t__flash_end = .;\n\n\n\t.crash_dump (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t  AUD_SECTION_SIZE -  USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__crash_dump_start = .;\n\t\t. = CRASH_DUMP_SECTION_SIZE;\n\t\t__crash_dump_end = .;\n\t} > FLASH_NC\n\n\t.custom_parameter (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t AUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__custom_parameter_start = .;\n\t\t. = CUSTOM_PARAMETER_SECTION_SIZE;\n\t\t__custom_parameter_end = .;\n\t} > FLASH_NC\n\n\t.userdata (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2) (NOLOAD) :\n\t{\n\t\t__userdata_start = .;\n\t\t. = USERDATA_SECTION_SIZE*2;\n\t\t__userdata_end = .;\n\t} > FLASH_NC\n\n\t.audio (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE -\n\tAUD_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__aud_start = .;\n\t\t. = AUD_SECTION_SIZE;\n\t\t__aud_end = .;\n\t} > FLASH_NC\n\n\t.reserved (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__reserved_start = .;\n\t\t. = RESERVED_SECTION_SIZE;\n\t\t__reserved_end = .;\n\t} > FLASH_NC\n\n\t.factory (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__factory_start = .;\n\t\t. = FACTORY_SECTION_SIZE;\n\t\t__factory_end = .;\n\t} > FLASH_NC\n\n\tASSERT(FLASH_NC_TO_C(__crash_dump_start) >= __flash_end, \"region FLASH overflowed\")\n\t__free_flash = FLASH_NC_TO_C(__crash_dump_start) - __flash_end;\n}\n\n"
  },
  {
    "path": "scripts/link/best2000_dma.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#ifdef RB_CODEC\n#define HEAP_SECTION_SIZE\t\t\t0x1000\n#else\n#define HEAP_SECTION_SIZE\t\t\t0x1000\n#endif\n\n#define STACK_SECTION_SIZE\t\t\t0xD00\n\n#if defined(ROM_UTILS_ON)\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n#define ROM_UTILS_RESV_RAM_SIZE     0x64\n#else\n#define ROM_UTILS_RESV_RAM_SIZE     0x0\n#endif\n#endif\n\n#ifdef RB_CODEC\n#define OVERLAY_DATA_SECTION_SIZE\t0xA000\n#else\n#define OVERLAY_DATA_SECTION_SIZE\t0x8000\n#endif\n\n#if (RAM_SIZE >= 0x48000)\n#if defined(BTUSB_AUDIO_MODE)\n#define FAST_XRAM_SECTION_SIZE\t\t0x20000\n#else\n#define FAST_XRAM_SECTION_SIZE\t\t0x12000\n#endif\n#elif (RAM_SIZE >= 0x40000)\n#define FAST_XRAM_SECTION_SIZE\t\t0x8000\n#else\n#define FAST_XRAM_SECTION_SIZE\t\t0x4000\n#endif\n\n#ifndef OTA_CODE_OFFSET\n#define OTA_CODE_OFFSET\t\t\t\t0\n#endif\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE + OTA_CODE_OFFSET)\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE\t\t\t(FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n#define FLASH_NC_REGION_BASE\t\tFLASH_C_TO_NC(FLASH_REGION_BASE)\n#define FLASHX_REGION_BASE\t\t\tFLASH_TO_FLASHX(FLASH_REGION_BASE)\n\n/* Linker script to configure memory regions. */\n/* See plat_addr_map.h and common.mk for the macro definitions */\nMEMORY\n{\n\tROM\t\t\t(rx)\t: ORIGIN = ROM_BASE,\t\t\t\tLENGTH = ROM_SIZE\n\tFLASH \t\t(r)\t\t: ORIGIN = FLASH_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tFLASH_NC\t(r)\t\t: ORIGIN = FLASH_NC_REGION_BASE,\tLENGTH = FLASH_REGION_SIZE\n\tFLASHX\t\t(rx)\t: ORIGIN = FLASHX_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tRAM\t\t\t(rwx)\t: ORIGIN = RAM_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tRAMX\t\t(rx)\t: ORIGIN = RAMX_BASE,\t\t\t\tLENGTH = RAM_SIZE - FAST_XRAM_SECTION_SIZE\n\tFRAMX\t\t(rwx)\t: ORIGIN = RAMX_BASE + RAM_SIZE - FAST_XRAM_SECTION_SIZE,\tLENGTH = FAST_XRAM_SECTION_SIZE\n#ifdef PSRAM_BASE\n\tPSRAM \t\t(rwx)\t: ORIGIN = PSRAM_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAM_NC\t(rwx)\t: ORIGIN = PSRAM_NC_BASE,\t\t\tLENGTH = PSRAM_SIZE\n\tPSRAMX\t\t(rx)\t: ORIGIN = PSRAMX_BASE,\t\t\t\tLENGTH = PSRAM_SIZE\n#endif\n}\n\n/* Library configurations */\nGROUP(libgcc.a libc.a libm.a libnosys.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions FLASH and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exidx_start\n *   __exidx_end\n *   __copy_table_start__\n *   __copy_table_end__\n *   __zero_table_start__\n *   __zero_table_end__\n *   __etext\n *   __data_start__\n *   __preinit_array_start\n *   __preinit_array_end\n *   __init_array_start\n *   __init_array_end\n *   __fini_array_start\n *   __fini_array_end\n *   __data_end__\n *   __bss_start__\n *   __bss_end__\n *   __end__\n *   end\n *   __HeapLimit\n *   __StackLimit\n *   __StackTop\n *   __stack\n *   __free_ram\n *   __factory_start\n *   __factory_end\n *   __calib_start\n *   __calib_end\n *   __flash_start\n *   __flash_end\n *   __free_flash\n *   __boot_sram_start_flash__\n *   __boot_sram_end_flash__\n *   __boot_sram_start__\n *   __boot_bss_sram_start__\n *   __boot_bss_sram_end__\n *   __sram_text_data_start_flash__\n *   __sram_text_data_end_flash__\n *   __fast_sram_text_data_start__\n *   __fast_sram_text_data_end__\n *   __fast_sram_text_data_start_flash__\n *   __fast_sram_text_data_end_flash__\n *   __sram_text_data_start__\n *   __sram_bss_start__\n *   __sram_bss_end__\n *   __overlay_text_start__\n *   __overlay_text_exec_start__\n *   __overlay_data_start__\n */\nENTRY(Boot_Loader)\n\nSECTIONS\n{\n\t__export_fn_rom = (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE);\n\n\t.boot_struct (ORIGIN(FLASH)) :\n\t{\n\t\t__flash_start = .;\n\t\tKEEP(*(.boot_struct))\n\t\t. = ALIGN(4);\n\t} > FLASH\n\n\t. = FLASH_TO_FLASHX(.);\n\n\t.boot_text_flash (.) : AT (FLASHX_TO_FLASH(ADDR(.boot_text_flash)))\n\t{\n\t\t*(.boot_loader)\n\t\t*(.boot_text_flash*)\n\t\t*(.boot_rodata*)\n\t\t. = ALIGN(4);\n\t} > FLASHX\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.got_info (.) :\n\t{\n\t\t__got_info_start = .;\n\t\t__got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__got_end = .;\n\t\t__got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__got_info_end = .;\n\t} > FLASH\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.userdata_pool (.) (NOLOAD) :\n\t{\n\t\t*(.userdata_pool)\n\t\t. = ALIGN(4);\n\t\t__userdata_pool_end__ = .;\n\t} > RAM\n\n\t__boot_sram_start_flash__ = LOADADDR(.got_info) + SIZEOF(.got_info);\n\t__boot_sram_start__ = __userdata_pool_end__;\n\t.boot_text_sram (RAM_TO_RAMX(__boot_sram_start__)) : AT (__boot_sram_start_flash__)\n\t{\n\t\t/* memcpy.o or libc_nano.a(lib_a-memcpy.o/lib_a-memcpy-stub.o) */\n\t\t*:memcpy.o(.text*)\n\t\t*:lib_a-memcpy*.o(.text*)\n\t\t*:libc_rom.o(.text*)\n\n\t\t/* memset.o or libc_nano.a(lib_a-memset.o) */\n\t\t*:memset.o(.text*)\n\t\t*:lib_a-memset*.o(.text*)\n\n\t\t*:hal_norflash*.o(.text*)\n\t\t*:norflash_*.o(.text*)\n\n\t\t*(.boot_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__boot_text_sram_end = .;\n\t} > RAMX\n\n\t.boot_data_sram (RAMX_TO_RAM(ADDR(.boot_text_sram) + SIZEOF(.boot_text_sram))) :\n\t\t\t\t\tAT (__boot_sram_start_flash__ + SIZEOF(.boot_text_sram))\n\t{\n\t\t*:hal_norflash*.o(.data* .rodata*)\n\t\t*:norflash_*.o(.data* .rodata*)\n\t\t*:hal_psram.o(.data* .rodata*)\n\t\t*(.boot_data*)\n\t\t. = ALIGN(4);\n\t\t__boot_data_sram_end = .;\n\t} > RAM\n\n\t__boot_sram_end_flash__ = __boot_sram_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.boot_text_sram) + SIZEOF(.boot_data_sram);\n\n\t.boot_bss_sram (.) (NOLOAD) :\n\t{\n\t\t__boot_bss_sram_start__ = .;\n\t\t*:hal_norflash*.o(.bss*)\n\t\t*:norflash_*.o(.bss*)\n\t\t*:hal_psram.o(.bss*)\n\t\t*(.boot_bss*)\n\t\t. = ALIGN(4);\n\t\t__boot_bss_sram_end__ = .;\n\t} > RAM\n\n\t__sram_text_data_start_flash__ = __boot_sram_end_flash__;\n\t__sram_text_data_start__ = __boot_bss_sram_end__;\n\t.sram_text (RAM_TO_RAMX(__sram_text_data_start__)) :\n\t\t\t\tAT (__sram_text_data_start_flash__)\n\t{\n\t\t*(.sram_text*)\n\t\t. = ALIGN(4);\n\t} > RAMX\n\n\t.sram_data (RAMX_TO_RAM(ADDR(.sram_text) + SIZEOF(.sram_text))) :\n\t\t\t\tAT (__sram_text_data_start_flash__ + SIZEOF(.sram_text))\n\t{\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_usb.o(.rodata*)\n#endif\n\t\t*:utils.o(.data* .rodata*)\n\t\t*:cqueue.o(.data* .rodata*)\n\t\t*:iir_process.o(.data* .rodata*)\n#if defined(HFP_1_6_ENABLE)\n\t\t*:sbcplc.o(.data* .rodata*)\n\t\t*:sbc.o(.data* .rodata*)\n\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n#if defined(A2DP_AAC_ON)\n\t\t*:fixpoint_math.o(.data* .rodata*)\n\t\t*:FDK_bitbuffer.o(.data* .rodata*)\n#endif\n\t\t*:crossover_filter.o(.data* .rodata*)\n\t\t*:exp_func_tables.o(.data* .rodata*)\n\t\t*(.sram_data*)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__sram_text_data_end_flash__ = __sram_text_data_start_flash__ +\n\t\t\t\t\t\t\t\tSIZEOF(.sram_text) + SIZEOF(.sram_data);\n\n\t.sram_bss (.) (NOLOAD) :\n\t{\n\t\t__sram_bss_start__ = .;\n\t\t*:utils.o(.bss*)\n\t\t*(.sram_bss*)\n\t\t. = ALIGN(4);\n\t\t__sram_bss_end__ = .;\n\t} > RAM\n\n\t__fast_sram_text_data_start_flash__ = __sram_text_data_end_flash__;\n\t.fast_text_sram (ORIGIN(FRAMX)) : AT (__fast_sram_text_data_start_flash__)\n\t{\n\t\t__fast_sram_text_data_start__ = .;\n#if defined(ROM_UTILS_ON)\n\t\t*:rom_utils.o(.text*)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_dma.o(.text*)\n\t\t*:hal_uart.o(.text*)\n\t\t*:hal_trace.o(.text*)\n#endif\n\n#if defined(BTUSB_AUDIO_MODE)\n\t\t*:hal_usb.o(.text*)\n\n\t\t*:usb_audio.o(.text*)\n\t\t*:usb_audio_sync.o(.text*)\n\t\t*:usb_audio_cdc.o(.text*)\n\n\t\t*:usbaudio_entry.o(.text*)\n\t\t*:usb_audio_app.o(.text*)\n#endif\n\n\t\t/* memmove.o or libc_nano.a(lib_a-memmove.o) */\n\t\t*:memmove.o(.text*)\n\t\t*:lib_a-memmove.o(.text*)\n\t\t*:utils.o(.text*)\n\t\t*:cqueue.o(.text*)\n\t\t*:audio_resample_ex.o(.text*)\n#if defined(MIX_MIC_DURING_MUSIC)\n\t\t*:app_bt_stream.o(.text*)\n#endif\n#if defined(HFP_1_6_ENABLE)\n#if defined(__SBC_FUNC_IN_ROM__)\n\t\t*:sbc.o(.text*)\n#else\n\t\t*:sbc.o(.text.sbc_is_stream_info_valid)\n\t\t*:sbc.o(.text.sbc_frame_length_get)\n\t\t*:sbc.o(.text.sbc_4bit_crc_calc)\n\t\t*:sbc.o(.text.sbc_bits_for_mono_alloc)\n\t\t*:sbc.o(.text.sbc_bits_for_stereo_alloc)\n\t\t*:sbc.o(.text.sbc_header_process)\n\t\t*:sbc.o(.text.sbc_factors_process)\n\t\t*:sbc.o(.text.sbc_sample_extract)\n\t\t*:sbc.o(.text.sbc_sbsamples_make)\n\t\t*:sbc.o(.text.sbc_joint_process)\n\t\t*:sbc.o(.text.sbc_4band_synth_filter)\n\t\t*:sbc.o(.text.sbc_8band_synth_filter)\n\t\t*:sbc.o(.text.sbc_decoder_state_reset)\n\t\t*:sbc.o(.text.sbc_frame_mute)\n\t\t*:sbc.o(.text.sbc_frames_decode)\n\t\t*:sbc.o(.text.sbc_samples_quant)\n\t\t*:sbc.o(.text.sbc_decoder_init)\n\t\t*:sbc.o(.text.sbc_encoder_init)\n\t\t*:sbc.o(.text.sbc_frames_encode)\n#endif\n\t\t*:sbc_math.o(.text*)\n#endif\n#if defined(A2DP_AAC_ON)\n\t\t*:fixpoint_math.o(.text*)\n\t\t*:FDK_bitbuffer.o(.text*)\n\t\t*:FDK_tools_rom.o(.text*FDKgetWindowSlope*)\n\t\t*:FDK_tools_rom.o(.text*getBitstreamElementList*)\n\t\t*:dct.o(.text*dct_IV*)\n#if !defined(__SBC_FUNC_IN_ROM_VBEST2000__)\n\t\t*:fft.o(.text._Z3fftiPlPi)\n\t\t*:fft_rad2.o(.text*dit_fft*)\n\t\t*:dct.o(.text*getTables*)\n#endif\n#ifdef VOICE_DATAPATH\n\t\t*:opus_encoder.o(.text*)\n#endif\n#endif\n\n#if defined(__AUDIO_SPECTRUM__)\n\t\t*:kiss_fft.o(.text*)\n\t\t*:kiss_fftr.o(.text*)\n\t\t*:fftwrap.o(.text*)\n\t\t*:spectrum_fix.o(.text*)\n\t\t*:audio_spectrum.o(.text*)\n#endif\n\t\t*:mdct.o(.text*)\n\t\t*:crossover_filter.o(.text*)\n\t\t*:data_compressor.o(.text*)\n\t\t*:drc.o(.text*)\n\t\t*:limiter.o(.text*)\n\t\t*(.fast_text_sram*)\n\t\t. = ALIGN(4);\n\t\t__fast_sram_text_data_end__ = .;\n\t} > FRAMX\n\t__fast_sram_text_data_end_flash__ = __fast_sram_text_data_start_flash__ + SIZEOF(.fast_text_sram);\n\n\t__overlay_text_start__ = RAMX_TO_RAM(__fast_sram_text_data_end__);\n\t__overlay_text_exec_start__ = RAM_TO_RAMX(__overlay_text_start__);\n\tOVERLAY (__overlay_text_exec_start__) : NOCROSSREFS AT (__fast_sram_text_data_end_flash__)\n\t{\n#ifndef NO_OVERLAY\n\t\t.overlay_text0\n\t\t{\n\t\t\tLONG(0);\n#if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t/* common */\n\t\t\t*:ae_common.o(.text*)\n\t\t\t*:ae_rand.o(.text*)\n\t\t\t*:cmsis_fftwrap.o(.text*)\n\t\t\t*:fastmath.o(.text*)\n\t\t\t*:integer_delay.o(.text*)\n\t\t\t*:iirfilt.o(.text*)\n\t\t\t*:ringbuf.o(.text*)\n\t\t\t*:scale_int16.o(.text*)\n\t\t\t*:speech_conv.o(.text*)\n\t\t\t*:speech_trans_buf.o(.text*)\n\t\t\t*:speech_win.o(.text*)\n\n\t\t\t*:preprocess.o(.text*)\n\t\t\t*:filterbank.o(.text*)\n#if !defined(__AUDIO_SPECTRUM__)\n#if !defined(A2DP_SCALABLE_ON)\n\t\t\t*:kiss_fft.o(.text*)\n#endif\n\t\t\t*:kiss_fftr.o(.text*)\n\t\t\t*:fftwrap.o(.text*)\n#endif\n\t\t\t*:mdf.o(.text*)\n\t\t\t*:plc_8000.o(.text*)\n#if defined(HFP_1_6_ENABLE)\n\t\t\t*:plc_16000.o(.text*)\n#endif\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_Process)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_ValidRateAndFrameLength)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_CalcVad16khz)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_Downsampling)\n\t\t\t*:webrtc_vad.o(.text.WebRtcVad_CalcVad8khz)\n\t\t\t*:vad_filterbank.o(.text.*)\n\t\t\t*:energy.o(.text.*)\n\t\t\t*:get_scaling_square.o(.text.*)\n\t\t\t*:dual_mic_denoise.o(.text*)\n\t\t\t*:cross_correlation.o(.text*)\n\t\t\t*:min_max_operations.o(.text*)\n\t\t\t*:resample_by_2_internal.o(.text*)\n\t\t\t*:division_operations.o(.text*)\n\t\t\t*:downsample_fast.o(.text*)\n\t\t\t*:resample_fractional.o(.text*)\n\t\t\t*:resample_48khz.o(.text*)\n\t\t\t*:vad_sp.o(.text*)\n\t\t\t*:vad_core.o(.text*)\n\t\t\t*:webrtc_vad.o(.text*)\n\t\t\t*:vad_gmm.o(.text*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n\t\t\t*:speech_2mic_ns2_denoise.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS2) || defined(SPEECH_RX_NS2)\n\t\t\t*:lc_mmse_ns.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT)\n\t\t\t*:lc_mmse_ns_float.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS3) || defined(SPEECH_RX_NS3)\n\t\t\t*:ns3.o(.text*)\n\t\t\t*:noise_suppression_x.o(.text*)\n\t\t\t*:nsx_core.o(.text*)\n\t\t\t*:nsx_core_c.o(.text*)\n\t\t\t*:copy_set_operations.o(.text*)\n\t\t\t*:cross_correlation.o(.text*)\n\t\t\t*:division_operations.o(.text*)\n\t\t\t*:dot_product_with_scale.o(.text*)\n\t\t\t*:downsample_fast.o(.text*)\n\t\t\t*:energy.o(.text*)\n\t\t\t*:get_scaling_square.o(.text*)\n\t\t\t*:min_max_operations.o(.text*)\n\t\t\t*:real_fft.o(.text*)\n\t\t\t*:resample_by_2.o(.text*)\n\t\t\t*:resample_by_2_internal.o(.text*)\n\t\t\t*:spl_init.o(.text*)\n\t\t\t*:spl_sqrt.o(.text*)\n\t\t\t*:spl_sqrt_floor.o(.text*)\n\t\t\t*:vector_scaling_operations.o(.text*)\n#endif\n#if defined(SPEECH_TX_AEC2FLOAT)\n\t\t\t*:coherence.o(.text*)\n\t\t\t*:echo_canceller.o(.text*)\n\t\t\t*:echo_suppression.o(.text*)\n\t\t\t*:lcmmse.o(.text*)\n\t\t\t*:logmmse.o(.text*)\n\t\t\t*:mdf2.o(.text*)\n\t\t\t*:noise_generator.o(.text*)\n\t\t\t*:pink_noise_gen.o(.text*)\n\t\t\t*:white_noise_gen.o(.text*)\n#endif\n#if defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:iir_resample.o(.text*)\n#endif\n#if defined(SPEECH_TX_COMPEXP)\n\t\t\t*:compexp.o(.text*)\n#endif\n#if defined(SPEECH_TX_EQ) || defined(SPEECH_RX_EQ) || defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:speech_eq.o(.text*)\n\t\t\t*:speech_arm_eq.o(.text*)\n\t\t\t*:arm_biquad_cascade_df1_f32.o(.text*)\n#endif\n#if defined(SPEECH_TX_POST_GAIN) || defined(SPEECH_RX_POST_GAIN)\n\t\t\t*:speech_gain.o(.text*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT) || defined(SPEECH_TX_AEC2FLOAT)\n\t\t\t*:arm_rfft_fast_f32.o(.text*)\n\t\t\t*:arm_cfft_f32.o(.text*)\n#endif\n#if defined(__SMARTVOICE__)\n#if defined(SPEECH_TX_2MIC_NS2) || defined(SPEECH_TX_NS2)\n\t\t\t*:app_smartvoice.o(.text._Z23mic_data_process_deinitv)\n\t\t\t*:app_smartvoice.o(.text._Z21mic_data_process_initv)\n\t\t\t*:app_smartvoice.o(.text._Z20mic_data_process_runPsm)\n#endif\n#endif\n\n#endif // #if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t*(.overlay_text0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.text*)\n\t\t\t*:sbc_math.o(.text*)\n#endif\n\t\t\t*:fixedpoint.o(.text*)\n\t\t\t*:replaygain.o(.text*)\n\t\t\t*:dsp_core.o(.text*)\n\t\t\t*:dsp_misc.o(.text*)\n\t\t\t*:dsp_filter.o(.text*)\n\t\t\t*:dsp_sample_input.o(.text*)\n\t\t\t*:dsp_sample_output.o(.text*)\n\t\t\t*:eq.o(.text*)\n\t\t\t*:pga.o(.text*)\n#if !defined(A2DP_AAC_ON) && !defined(A2DP_LHDC_ON)\n\t\t\t*:fir_process.o(.text*)\n\t\t\t*:iir_process.o(.text.iir_run .text.*iir_run_per_*)\n#endif\n#endif\n\t\t\t*(.overlay_a2dp_sbc*)\n\t\t\t*(.overlay_text1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fmdec.o(.text* .data* .rodata* .bss*)\n\t\t\t*(.overlay_text2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.text*)\n\t\t\t*(.overlay_text3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:block.o(.text.*CBlock_GetEscape*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_GetBitstream*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_GetAuBitsRemaining*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_GetValue*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_Read*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_FillData*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_ReadAccessUnit*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_readHeader*)\n\t\t\t*:block.o(.text.*ApplyTools*)\n\t\t\t*:aacdec_pns.o(.text.*CPns_Apply*)\n\t\t\t*:aacdec_tns.o(.text.*CTns_Apply*)\n\t\t\t*:aacdec_tns.o(.text.*CTns_Reset*)\n\t\t\t*:aacdec_pns.o(.text.*CPns_ResetData*)\n\t\t\t*:pulsedata.o(.text.*CPulseData_Read*)\n\t\t\t*:channel.o(.text.*CChannelElement_Read*)\n\t\t\t*:tpdec_asc.o(.text.*CProgramConfig_Reset*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_CrcCheck*)\n\t\t\t*:block.o(.text.*CBlock_FrequencyToTime*)\n\t\t\t*:block.o(.text.*CBlock_ReadSectionData*)\n\t\t\t*:channel.o(.text.*CChannelElement_Decode*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_CrcEndReg*)\n\t\t\t*:aacdecoder.o(.text.*CAacDecoder_DecodeFrame*)\n#if !defined(__SBC_FUNC_IN_ROM_VBEST2000__)\n\t\t\t*:block.o(.text.*CBlock_ReadSpectralData*)\n\t\t\t*:block.o(.text.*CBlock_ScaleSpectralData*)\n\t\t\t*:aacdec_tns.o(.text.*CTns_ReadDataPresentFlag*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_CrcStartReg*)\n\t\t\t*:block.o(.text.*CBlock_ReadScaleFactorData*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_EndAccessUnit*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_GetNrOfSubFrames*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_GetAuBitsTotal*)\n\t\t\t*:tpdec_asc.o(.text.*CProgramConfig_LookupElement*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_GetFrameLengthInBits*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_ReadPayloadLengthInfo*)\n\t\t\t*:block.o(.text.*CBlock_InverseQuantizeSpectralData*)\n\t\t\t*:channelinfo.o(.text.*IcsRead*)\n\t\t\t*:aacdec_tns.o(.text.*CTns_Read*)\n\t\t\t*:tpdec_lib.o(.text.*transportDec_AdjustEndOfAccessUnit*)\n\t\t\t*:pulsedata.o(.text.*CPulseData_Apply*)\n\t\t\t*:tpdec_asc.o(.text.*AudioSpecificConfig_Init*)\n\t\t\t*:tpdec_asc.o(.text.*AudioSpecificConfig_Parse*)\n\t\t\t*:tpdec_latm.o(.text.*CLatmDemux_ReadStreamMuxConfig*)\n\t\t\t*:tpdec_asc.o(.text.*getSampleRate*)\n\t\t\t*:tpdec_asc.o(.text.*getAOT*)\n\t\t\t*:aacdecoder.o(.text.*CAacDecoder_Init*)\n\t\t\t*:tpdec_asc.o(.text.*CProgramConfig_Init*)\n\t\t\t*:aacdecoder_lib.o(.text.*aacDecoder_ConfigCallback*)\n\t\t\t*:aacdecoder.o(.text.*CAacDecoder_ExtPayloadParse*)\n\t\t\t*:stereo.o(.text.*CJointStereo_Read*)\n#endif\n#endif\n\t\t\t*(.overlay_a2dp_aac*)\n\t\t\t*(.overlay_text4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:mpa.o(.text*)\n\t\t\t*:bit.o(.text*)\n\t\t\t*:frame.o(.text*)\n\t\t\t*:huffman.o(.text*)\n\t\t\t*:layer12.o(.text*)\n\t\t\t*:layer3.o(.text*)\n\t\t\t*:stream.o(.text*)\n\t\t\t*:synth.o(.text*)\n\t\t\t*(.overlay_text5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text6\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_SCALABLE_ON)\n\t\t\t*:Audio_asm.o(.text*)\n\t\t\t*:vq.o(.text*)\n\t\t\t*:util.o(.text*)\n\t\t\t*:rate.o(.text*)\n\t\t\t*:quant_bands.o(.text*)\n\t\t\t*:modes.o(.text*)\n\t\t\t*:mathops.o(.text*)\n\t\t\t*:laplace.o(.text*)\n\t\t\t*:entdec.o(.text*)\n\t\t\t*:entcode.o(.text*)\n\t\t\t*:cwrs.o(.text*)\n\t\t\t*:audio_int32.o(.text*)\n\t\t\t*:audio_decoder.o(.text*)\n\t\t\t*:audio.o(.text*)\n\t\t\t*(.overlay_a2dp_ssc*)\n#endif\n\n#if defined(A2DP_LHDC_ON)\n\t\t\t*:lhdcUtil.o(.text*)\n\t\t\t*:dec.o(.text*)\n\t\t\t*:cirbuf.o(.text*)\n\t\t\t*(.overlay_a2dp_lhdc*)\n#endif\n#if defined(A2DP_LDAC_ON)\n\t\t\t*:ldacBT_api.o(.text*)\n\t\t\t*:decode_ldac.o(.text*)\n\t\t\t*:dequant_ldac.o(.text*)\n\t\t\t*:imdct_ldac.o(.text*)\n\t\t\t*:ldacBT_internal.o(.text*)\n\t\t\t*:ldaclib_api.o(.text*)\n\t\t\t*:memory_ldac.o(.text*)\n\t\t\t*:setpcm_ldac.o(.text*)\n\t\t\t*:sigana_ldac.o(.text*)\n\t\t\t*:tables_ldac.o(.text*)\n\t\t\t*:tables_sigproc_ldac.o(.text*)\n\t\t\t*:unpack_ldac.o(.text*)\n\t\t\t*(.overlay_a2dp_ldac*)\n#endif\n\n\t\t\t*(.overlay_text6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_text7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_text7)\n\t\t\t. = ALIGN(4);\n\t\t}\n#endif\n\t\t.overlay_text_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > FRAMX\n\n\t.dummy_overlay_text (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_text_end__ = .;\n\t} > FRAMX\n\n\tASSERT(__dummy_overlay_text_end__ - __fast_sram_text_data_start__ <= FAST_XRAM_SECTION_SIZE, \"fast xram sections too large\")\n\t__free_fram = FAST_XRAM_SECTION_SIZE - (__dummy_overlay_text_end__ - __fast_sram_text_data_start__);\n\n\t__overlay_data_start__ = __sram_bss_end__;\n\tOVERLAY (__overlay_data_start__) : NOCROSSREFS AT (__load_stop_overlay_text_end)\n\t{\n#ifndef NO_OVERLAY\n\t\t.overlay_data0\n\t\t{\n\t\t\t/* Explicitly place 4 bytes at section start to avoid \"section type changed to PROGBITS\" warnings */\n\t\t\tLONG(0);\n#if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t/* common */\n\t\t\t*:fastmath_const.o(.data* .rodata*)\n\t\t\t*:speech_win.o(.data* .rodata*)\n\n\t\t\t*:preprocess.o(.data* .rodata*)\n\t\t\t*:filterbank.o(.data* .rodata*)\n#if !defined(A2DP_SCALABLE_ON)\n\t\t\t*:kiss_fft.o(.data* .rodata*)\n#endif\n\t\t\t*:kiss_fftr.o(.data* .rodata*)\n\t\t\t*:fftwrap.o(.data* .rodata*)\n\t\t\t*:mdf.o(.data* .rodata*)\n\t\t\t*:plc_8000.o(.data* .rodata*)\n#if defined(HFP_1_6_ENABLE)\n\t\t\t*:plc_16000.o(.data* .rodata*)\n#endif\n#if defined(_CVSD_BYPASS_) || defined(CVSD_BYPASS)\n\t\t\t*:Pcm8k_Cvsd.o(.data* .rodata* .bss*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS)\n\t\t\t*:dual_mic_denoise.o(.data* .rodata*)\n\t\t\t*:vad_filterbank.o(.data* .rodata*)\n\t\t\t*:energy.o(.data* .rodata*)\n\t\t\t*:get_scaling_square.o(.data* .rodata*)\n\n\t\t\t*:cross_correlation.o(.data* .rodata*)\n\t\t\t*:min_max_operations.o(.data* .rodata*)\n\t\t\t*:resample_by_2_internal.o(.data* .rodata*)\n\t\t\t*:division_operations.o(.data* .rodata*)\n\t\t\t*:downsample_fast.o(.data* .rodata*)\n\t\t\t*:resample_fractional.o(.data* .rodata*)\n\t\t\t*:resample_48khz.o(.data* .rodata*)\n\t\t\t*:vad_sp.o(.data* .rodata*)\n\t\t\t*:vad_core.o(.data* .rodata*)\n\t\t\t*:webrtc_vad.o(.data* .rodata*)\n\t\t\t*:vad_gmm.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_2MIC_NS2)\n\t\t\t*:speech_2mic_ns2_denoise.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2) || defined(SPEECH_RX_NS2)\n\t\t\t*:lc_mmse_ns.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS3) || defined(SPEECH_RX_NS3)\n\t\t\t*:nsx_core.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT)\n\t\t\t*:lc_mmse_ns_float.o(.data* .rodata*)\n#endif\n#if defined(MSBC_8K_SAMPLE_RATE)\n\t\t\t*:iir_resample.o(.data* .rodata*)\n#endif\n#if defined(SPEECH_TX_NS2FLOAT) || defined(SPEECH_RX_NS2FLOAT) || defined(SPEECH_TX_AEC2FLOAT)\n\t\t\t*:arm_common_tables.o(.rodata.armBitRevIndexTable256)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_256)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_rfft_512)\n\t\t\t*:arm_common_tables.o(.rodata.armBitRevIndexTable128)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_128)\n\t\t\t*:arm_common_tables.o(.rodata.twiddleCoef_rfft_256)\n#endif\n\n#endif // #if !defined(SCO_OPTIMIZE_FOR_RAM)\n\t\t\t*(.overlay_data0 .overlay_rodata0)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data1\n\t\t{\n\t\t\tLONG(0);\n#if !defined(RB_CODEC)\n#if !defined(HFP_1_6_ENABLE)\n\t\t\t*:sbc.o(.data* .rodata*)\n\t\t\t*:sbc_math.o(.data* .rodata*)\n#endif\n\t\t\t*:fixedpoint.o(.data* .rodata*)\n\t\t\t*:replaygain.o(.data* .rodata*)\n\t\t\t*:dsp_core.o(.data* .rodata*)\n\t\t\t*:dsp_misc.o(.data* .rodata*)\n\t\t\t*:dsp_filter.o(.data* .rodata*)\n\t\t\t*:dsp_sample_input.o(.data* .rodata*)\n\t\t\t*:dsp_sample_output.o(.data* .rodata*)\n\t\t\t*:eq.o(.data* .rodata*)\n\t\t\t*:pga.o(.data* .rodata*)\n#if !defined(A2DP_AAC_ON)\n\t\t\t*:fir_process.o(.data* .rodata*)\n#endif\n#endif\n\t\t\t*(.overlay_data1 .overlay_rodata1)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data2\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data2 .overlay_rodata2)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data3\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:fft128dot.o(.data* .rodata*)\n\t\t\t*(.overlay_data3 .overlay_rodata3)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data4\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_AAC_ON)\n\t\t\t*:block.o(.data* .rodata*)\n\t\t\t*:tpdec_lib.o(.data* .rodata*)\n\t\t\t*:tpdec_latm.o(.data* .rodata*)\n\t\t\t*:aacdec_pns.o(.data* .rodata*)\n\t\t\t*:aacdec_tns.o(.data* .rodata*)\n\t\t\t*:pulsedata.o(.data* .rodata*)\n\t\t\t*:channel.o(.data* .rodata*)\n\t\t\t*:tpdec_asc.o(.data* .rodata*)\n\t\t\t*:aacdecoder.o(.data* .rodata*)\n\t\t\t*:channelinfo.o(.data* .rodata*)\n\t\t\t*:aacdecoder_lib.o(.data* .rodata*)\n\t\t\t*:stereo.o(.data* .rodata*)\n#endif\n\t\t\t*(.overlay_data4 .overlay_rodata4)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data5\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*:mpa.o(.data* .bss*)\n\t\t\t*:bit.o(.data* .bss*)\n\t\t\t*:frame.o(.data* .bss*)\n\t\t\t*:huffman.o(.data* .bss*)\n\t\t\t*:layer12.o(.data* .bss*)\n\t\t\t*:layer3.o(.data* .bss*)\n\t\t\t*:stream.o(.data* .bss*)\n\t\t\t*:synth.o(.data* .bss*)\n\t\t\t*(.overlay_data5 .overlay_rodata5)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data6\n\t\t{\n\t\t\tLONG(0);\n#if defined(A2DP_SCALABLE_ON)\n\t\t\t*(.constdata)\n\t\t\t*:Audio_asm.o(.data* .rodata*)\n\t\t\t*:vq.o(.data* .rodata*)\n\t\t\t*:util.o(.data* .rodata*)\n\t\t\t*:rate.o(.data* .rodata*)\n\t\t\t*:quant_bands.o(.data* .rodata*)\n\t\t\t*:modes.o(.data* .rodata*)\n\t\t\t*:mathops.o(.data* .rodata*)\n\t\t\t*:laplace.o(.data* .rodata*)\n\t\t\t*:entdec.o(.data* .rodata*)\n\t\t\t*:entcode.o(.data* .rodata*)\n\t\t\t*:cwrs.o(.data* .rodata*)\n\t\t\t*:audio_int32.o(.data* .rodata*)\n\t\t\t*:audio_decoder.o(.data* .rodata*)\n\t\t\t*:audio.o(.data* .rodata*)\n#endif\n#if defined(A2DP_LHDC_ON)\n\t\t\t*:lhdcUtil.o(.data* .rodata*)\n    \t\t        *:dec.o(.data* .rodata*)\n\t\t\t*:cirbuf.o(.data* .rodata*)\n#endif\n#if defined(A2DP_LDAC_ON)\n\t\t\t*:ldacBT_api.o(.data* .rodata*)\n\t\t\t*:decode_ldac.o(.data* .rodata*)\n\t\t\t*:dequant_ldac.o(.data* .rodata*)\n\t\t\t*:imdct_ldac.o(.data* .rodata*)\n\t\t\t*:ldacBT_internal.o(.data* .rodata*)\n\t\t\t*:ldaclib_api.o(.data* .rodata*)\n\t\t\t*:memory_ldac.o(.data* .rodata*)\n\t\t\t*:setpcm_ldac.o(.data* .rodata*)\n\t\t\t*:sigana_ldac.o(.data* .rodata*)\n\t\t\t*:tables_ldac.o(.data* .rodata*)\n\t\t\t*:tables_sigproc_ldac.o(.data* .rodata*)\n\t\t\t*:unpack_ldac.o(.data* .rodata*)\n#endif\n\t\t\t*(.overlay_data6 .overlay_rodata6)\n\t\t\t. = ALIGN(4);\n\t\t}\n\t\t.overlay_data7\n\t\t{\n\t\t\tLONG(0);\n\t\t\t*(.overlay_data7 .overlay_rodata7)\n\t\t\t. = ALIGN(4);\n\t\t}\n#endif\n\t\t.overlay_data_end\n\t\t{\n\t\t\tLONG(0);\n\t\t\t. = ALIGN(4);\n\t\t}\n\t} > RAM\n\n\t.dummy_overlay_data (.) (NOLOAD) :\n\t{\n\t\t__dummy_overlay_data_end__ = .;\n\t} > RAM\n\n\tASSERT(__dummy_overlay_data_end__ - __overlay_data_start__ <= OVERLAY_DATA_SECTION_SIZE, \"overlay sections too large\")\n\n\t__text_start_flash__ = __load_stop_overlay_data_end;\n\n\t.text (FLASH_TO_FLASHX(__text_start_flash__)) : AT (FLASHX_TO_FLASH(ADDR(.text)))\n\t{\n\t\t*(.text*)\n\t\t*(.flash_text*)\n\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n\t} > FLASHX\n\n\t.ARM.extab (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.extab)))\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > FLASHX\n\n\t__exidx_start = .;\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx (.) : AT (FLASHX_TO_FLASH(ADDR(.ARM.exidx)))\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > FLASHX\n\t__exidx_end = .;\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.rodata (.) :\n\t{\n\t\t*(.rodata*)\n\t\t*(.flash_rodata*)\n\t\tKEEP(*(.eh_frame*))\n\t\t*(.note.gnu.build-id)\n\t} > FLASH\n\n#ifdef TRACE_STR_SECTION\n\t.trc_str (.) :\n\t{\n\t\t*(.trc_str*)\n\t} > FLASH\n#endif\n\n\t.ai.gatt.server.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__ai_gatt_server_table_start = .;\n\t\tKEEP(*(.ai_gatt_server_table))\n\t__ai_gatt_server_table_end = .;\n\t} > FLASH\n\n\t.ai.ble.handler.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__ai_ble_handler_table_start = .;\n\t\tKEEP(*(.ai_ble_handler_table))\n\t__ai_ble_handler_table_end = .;\n\t} > FLASH\n\n\t.ai.spp.register.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__ai_spp_register_table_start = .;\n\t\tKEEP(*(.ai_spp_register_table))\n\t__ai_spp_register_table_end = .;\n\t} > FLASH\n\n\t.tota.cmd.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__tota_handler_table_start = .;\n\t\tKEEP(*(.tota_handler_table))\n\t\t__tota_handler_table_end = .;\n\t} > FLASH\n\n\t.ai.handler.function.table (.) :\n\t{\n\t. = ALIGN(4);\n\t__ai_handler_function_table_start = .;\n\t\tKEEP(*(.ai_handler_function_table))\n\t__ai_handler_function_table_end = .;\n\t} > FLASH\n\n\t.custom.cmd.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__custom_handler_table_start = .;\n\t\tKEEP(*(.custom_handler_table))\n\t\t__custom_handler_table_end = .;\n\t} > FLASH\n\n\t.thirdparty.event.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__thirdparty_handler_table_start = .;\n\t\tKEEP(*(.thirdparty_handler_table))\n\t\t__thirdparty_handler_table_end = .;\n\t} > FLASH\n\n#if defined(FIRMWARE_REV)\n\t.firmware_rev (.) :\n\t{\n\t\t. = ALIGN(64);\n\t\t*(.fw_rev)\n\t} > FLASH\n#endif\n\n\t/* To copy multiple FLASH to RAM sections,\n\t * uncomment .copy.table section and,\n\t * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.copy.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__copy_table_start__ = .;\n\t\tLONG (__etext)\n\t\tLONG (__data_start__)\n\t\tLONG (__data_end__ - __data_start__)\n\t\tLONG (__etext2)\n\t\tLONG (__data2_start__)\n\t\tLONG (__data2_end__ - __data2_start__)\n\t\t__copy_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t/* To clear multiple BSS sections,\n\t * uncomment .zero.table section and,\n\t * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */\n\t/*\n\t.zero.table (.) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__zero_table_start__ = .;\n\t\tLONG (__bss_start__)\n\t\tLONG (__bss_end__ - __bss_start__)\n\t\tLONG (__bss2_start__)\n\t\tLONG (__bss2_end__ - __bss2_start__)\n\t\t__zero_table_end__ = .;\n\t} > FLASH\n\t*/\n\n\t__etext = .;\n\n\t.data : AT (__etext)\n\t{\n\t\t__data_start__ = .;\n\n\t\t*(vtable)\n\t\t. = ALIGN(4);\n\t\t*(.data*)\n\n\t\t. = ALIGN(4);\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\t\t. = ALIGN(4);\n\n\n\t\t/* All data end */\n\t\t__data_end__ = .;\n\n\t} > RAM\n\n\t.bss (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__bss_end__ = .;\n\t} > RAM\n\n\t.heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__HeapBase = .;\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t\t__HeapLimit = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n#if defined(ROM_UTILS_ON)\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM) - ROM_UTILS_RESV_RAM_SIZE;\n#else\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM);\n#endif\n\t__StackLimit = __StackTop - SIZEOF(.stack_dummy);\n\tPROVIDE(__stack = __StackTop);\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__StackLimit >= __HeapLimit, \"region RAM overflowed with stack\")\n\t__free_ram = __StackLimit - __HeapLimit;\n\n\t. = __etext + SIZEOF(.data);\n\n\t.system_info (.) :\n\t{\n\t\tKEEP(*(.system_info_list_size))\n\t\tKEEP(*(.system_info_list))\n\t\t. = ALIGN(4);\n\t}  > FLASH\n\n\t.build_info (.) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ALIGN(4);\n\t} > FLASH = 0x00000000\n\n#ifdef SLAVE_BIN_FLASH_OFFSET\n\t.slave_code (ORIGIN(FLASH) + SLAVE_BIN_FLASH_OFFSET):\n\t{\n\t\tKEEP(*(.slave_code_flash_rodata))\n\t} > FLASH\n#endif\n\n\t/* The following section be the last loaded section */\n\t.code_start_addr (.) :\n\t{\n\t\tLONG(BUILD_INFO_MAGIC);\n\t\tLONG(ABSOLUTE(__flash_start));\n\t} > FLASH\n\n\t__flash_end = .;\n\n\t.ota_upgrade_log (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t  AUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE - OTA_UPGRADE_LOG_SIZE) (NOLOAD) :\n\t{\n\t\t__ota_upgrade_log_start = .;\n\t\t. = OTA_UPGRADE_LOG_SIZE;\n\t\t__ota_upgrade_log_end = .;\n\t} > FLASH_NC\n\n\t.log_dump (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t  AUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE - LOG_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__log_dump_start = .;\n\t\t. = LOG_DUMP_SECTION_SIZE;\n\t\t__log_dump_end = .;\n\t} > FLASH_NC\n\n\t.crash_dump (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t  AUD_SECTION_SIZE -  USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE -\n\t\tCRASH_DUMP_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__crash_dump_start = .;\n\t\t. = CRASH_DUMP_SECTION_SIZE;\n\t\t__crash_dump_end = .;\n\t} > FLASH_NC\n\n\t.custom_parameter (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\t AUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2 - CUSTOM_PARAMETER_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__custom_parameter_start = .;\n\t\t. = CUSTOM_PARAMETER_SECTION_SIZE;\n\t\t__custom_parameter_end = .;\n\t} > FLASH_NC\n\n\t.userdata (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE  - RESERVED_SECTION_SIZE -\n\tAUD_SECTION_SIZE - USERDATA_SECTION_SIZE*2) (NOLOAD) :\n\t{\n\t\t__userdata_start = .;\n\t\t. = USERDATA_SECTION_SIZE*2;\n\t\t__userdata_end = .;\n\t} > FLASH_NC\n\n\t.audio (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE -\n\tAUD_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__aud_start = .;\n\t\t. = AUD_SECTION_SIZE;\n\t\t__aud_end = .;\n\t} > FLASH_NC\n\n\t.reserved (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE - RESERVED_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__reserved_start = .;\n\t\t. = RESERVED_SECTION_SIZE;\n\t\t__reserved_end = .;\n\t} > FLASH_NC\n\n\t.factory (ORIGIN(FLASH_NC) + LENGTH(FLASH_NC) - FACTORY_SECTION_SIZE) (NOLOAD) :\n\t{\n\t\t__factory_start = .;\n\t\t. = FACTORY_SECTION_SIZE;\n\t\t__factory_end = .;\n\t} > FLASH_NC\n\n#ifdef OTA_BOOT_SIZE\n#if (OTA_BOOT_SIZE > FLASH_SIZE)\n#error \"OTA_BOOT_SIZE should <= FLASH_SIZE\"\n#endif\n#if defined(OTA_CODE_OFFSET) && (OTA_BOOT_SIZE > OTA_CODE_OFFSET)\n#error \"OTA_BOOT_SIZE should <= OTA_CODE_OFFSET\"\n#endif\n\t__tail_section_start = FLASH_BASE + OTA_BOOT_SIZE;\n#else\n\t__tail_section_start = __ota_upgrade_log_start;\n#endif\n\n\tASSERT(FLASH_NC_TO_C(__tail_section_start) >= __flash_end, \"region FLASH overflowed\")\n\t__free_flash = FLASH_NC_TO_C(__tail_section_start) - __flash_end;\n\n#if !defined(OTA_BOOT_SIZE) && defined(OTA_REMAP_OFFSET)\n\tASSERT((FLASH_BASE & 0x00FFFFFF) == 0, \"bad FLASH_BASE\")\n\tASSERT((FLASH_SIZE & (FLASH_SIZE - 1)) == 0, \"bad FLASH_SIZE\")\n\tASSERT(__flash_end <= FLASH_BASE + FLASH_SIZE / 2, \"flash code size too large to remap\")\n\tASSERT(__flash_start - FLASH_BASE >= FLASH_NC_BASE + FLASH_SIZE - __tail_section_start, \"flash code conflicted with tail sections in remap\")\n\tASSERT(__flash_start - FLASH_BASE >= FLASH_SIZE / (1 << (4 + 1)), \"flash code cannot remap within 4 regions (max code size is half of flash size)\")\n\tASSERT((__flash_start - FLASH_BASE) % (FLASH_SIZE / (1 << (4 + 1))) == 0, \"flash code start address not aligned with remap region boundary\")\n#endif\n}\n\n"
  },
  {
    "path": "scripts/link/programmer.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define MIN_BURN_BUFFER_SIZE\t\t0x2000\n\n#define HEAP_SECTION_SIZE\t\t\t0x40\n#define STACK_SECTION_SIZE\t\t\t0x1000\n\n#define CODE_MSG_OVERHEAD\t\t\t8\n\n/* Linker script to configure memory regions. */\nMEMORY\n{\n  ROM    (rx)  : ORIGIN = ROM_BASE,    LENGTH = ROM_SIZE\t/* see plat_addr_map.h and common.mk */\n  RAM    (rwx) : ORIGIN = RAM_BASE,    LENGTH = RAM_SIZE\n  RAMX   (rx)  : ORIGIN = RAMX_BASE,   LENGTH = RAM_SIZE\n}\n\n/* Library configurations */\nGROUP(libgcc.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions ROM and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exec_struct_start\n *   __cust_cmd_init_tbl_start\n *   __cust_cmd_init_tbl_end\n *   __cust_cmd_hldr_tbl_start\n *   __cust_cmd_hldr_tbl_end\n *   __exidx_start\n *   __exidx_end\n *   __etext\n *   __data_start__\n *   __data_end__\n *   __bss_start__\n *   __bss_end__\n *   __end__\n *   end\n *   __HeapLimit\n *   __StackLimit\n *   __StackTop\n *   __stack\n *   __free_ram\n */\nENTRY(programmer_start)\n\nSECTIONS\n{\n\t__export_fn_rom = (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE);\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.burn_buffer (.) (NOLOAD) :\n\t{\n\t\t/* The size of .burn_buffer should be greater than __rom_HeapLimit. In most cases 8K is enough. */\n\t\t*(.burn_buffer)\n\t\t. = MAX(., MIN_BURN_BUFFER_SIZE);\n\t\t. = ALIGN(4);\n\t} > RAM\n\n/*\n\t.code_dummy (.) (NOLOAD) :\n\t{\n\t\t. = CODE_MSG_OVERHEAD;\n\t\t. = ALIGN(4);\n\t} > RAM\n*/\n\n\t.boot_struct (.) :\n\t{\n\t\tKEEP(*(.boot_struct))\n\n\t\t__exec_struct_start = .;\n\t\tKEEP(*(.exec_struct))\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.got_info (.) :\n\t{\n\t\t__got_info_start = .;\n\t\t__got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__got_end = .;\n\t\t__got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__got_info_end = .;\n\t} > RAM\n\n\t. = RAM_TO_RAMX(.);\n\n\t.text (.) : AT (RAMX_TO_RAM(ADDR(.text)))\n\t{\n\t\t*(.text*)\n\n#ifndef NOSTD\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n#endif\n\n\t\t. = ALIGN(4);\n\t} > RAMX\n\n\t.ARM.extab (.) : AT (RAMX_TO_RAM(ADDR(.ARM.extab)))\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > RAMX\n\n\t__exidx_start = .;\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx (.) : AT (RAMX_TO_RAM(ADDR(.ARM.exidx)))\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > RAMX\n\t__exidx_end = .;\n\n\t. = RAMX_TO_RAM(.);\n\n\t.rodata (.) :\n\t{\n\t\t*(.rodata*)\n\n\t\t. = ALIGN(4);\n\t\t__cust_cmd_init_tbl_start = .;\n\t\tKEEP(*(.cust_cmd_init_tbl))\n\t\t__cust_cmd_init_tbl_end = .;\n\n\t\t. = ALIGN(4);\n\t\t__cust_cmd_hldr_tbl_start = .;\n\t\tKEEP(*(.cust_cmd_hldr_tbl))\n\t\t__cust_cmd_hldr_tbl_end = .;\n\n#ifndef NOSTD\n\t\tKEEP(*(.eh_frame*))\n#endif\n\t\t*(.note.gnu.build-id)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__etext = .;\n\n\t.data (.) :\n\t{\n\t\t__data_start__ = .;\n\t\t*(.data*)\n\t\t. = ALIGN(4);\n\n#ifndef NOSTD\n\t\t*(vtable)\n\n\t\t. = ALIGN(4);\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\t\t. = ALIGN(4);\n#endif\n\t\t/* All data end */\n\t\t__data_end__ = .;\n\n\t} > RAM\n\n\t.build_info (.) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ALIGN(4);\n\t} > RAM = 0x00000000\n\n\t/* The following section be the last loaded section */\n\t.code_start_addr (.) :\n\t{\n\t\tLONG(ABSOLUTE(__exec_struct_start));\n\t} > RAM\n\n\t.bss (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__bss_end__ = .;\n\t} > RAM\n\n\t.heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__HeapBase = .;\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t\t__HeapLimit = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM);\n\t__StackLimit = __StackTop - SIZEOF(.stack_dummy);\n\tPROVIDE(__stack = __StackTop);\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__StackLimit >= __HeapLimit, \"region RAM overflowed with stack\")\n\t__free_ram = __StackLimit - __HeapLimit;\n}\n"
  },
  {
    "path": "scripts/link/programmer.lds_scat.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define MIN_BURN_BUFFER_SIZE\t\t0x2000\n#define BURN_BUFFER_END\t\t\t\t0x11000\n\n#define HEAP_SECTION_SIZE\t\t\t0x40\n#define STACK_SECTION_SIZE\t\t\t0x1000\n\n#define CODE_MSG_OVERHEAD\t\t\t8\n\nLR_vector (RAMX_BASE + BURN_BUFFER_END) NOCOMPRESS\n{\n\tvector_table RAM_BASE UNINIT VECTOR_SECTION_SIZE\n\t{\n\t\t*(.bss.vector_table, +FIRST)\n\t}\n\n\treboot_param (ImageBase(vector_table) + VECTOR_SECTION_SIZE) UNINIT REBOOT_PARAM_SECTION_SIZE\n\t{\n\t\t*(.bss.reboot_param, +FIRST)\n\t}\n\n\tburn_buffer (ImageBase(reboot_param) + REBOOT_PARAM_SECTION_SIZE) UNINIT\n\t{\n\t\t/* The size of .burn_buffer should be greater than __rom_HeapLimit. In most cases 8K is enough. */\n\t\t*(.bss.burn_buffer)\n\t}\n\n\tScatterAssert(ImageLimit(burn_buffer) <= (ImageBase(vector_table) + BURN_BUFFER_END))\n}\n\nLR_boot_struct +0\n{\n\tboot_struct RAMX_TO_RAM(+0)\n\t{\n\t\t*(.boot_struct, +FIRST)\n\t}\n\n\texec_struct +0\n\t{\n\t\t*(.exec_struct, +FIRST)\n\t}\n\n\tgot_info +0\n\t{\n\t\t*(.got)\n\t\t*(.got.plt)\n\t\t*(.igot.plt)\n\t\t*(.dynamic)\n\t}\n}\n\nLR_text +0\n{\n\ttext +0 FIXED\n\t{\n\t\t*(.text*)\n\n#ifndef NOSTD\n\t\t*(InRoot$$Sections)\n\t\t*armlib*(+TEXT)\n#endif\n\t}\n\n\t.ARM.extab +0\n\t{\n\t\t*(.ARM.extab*, .gnu.linkonce.armextab.*)\n\t}\n\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx +0\n\t{\n\t\t*(.ARM.exidx*, .gnu.linkonce.armexidx.*)\n\t}\n\n\trodata RAMX_TO_RAM(+0)\n\t{\n\t\t*(.rodata*)\n\n#ifndef NOSTD\n\t\t*armlib*(+CONST)\n\t\tKEEP(*(.eh_frame*))\n#endif\n\t\t*(.note.gnu.build-id)\n\t\t. = ALIGN(4);\n\t}\n\n\tcust_cmd_init_tbl +0\n\t{\n\t\t*(.cust_cmd_init_tbl)\n\t}\n\n\tcust_cmd_hdlr_tbl +0\n\t{\n\t\t*(.cust_cmd_hldr_tbl)\n\t}\n\n\tdata +0\n\t{\n\t\t*(.data*)\n\n#ifndef NOSTD\n\t\t*armlib*(+DATA)\n#endif\n\t}\n\n\t.build_info +0\n\t{\n\t\t*(.build_info, +FIRST)\n\t}\n\n\t/* The following section be the last loaded section */\n\tcode_start_addr +0\n\t{\n\t\t*(.code_start_addr, +LAST)\n\t}\n\n\tbss +0 UNINIT\n\t{\n\t\t*(.bss*)\n\t\t*(COMMON)\n\n#ifndef NOSTD\n\t\t*armlib*(+BSS)\n#endif\n\t}\n\n\tARM_LIB_HEAP +0 ALIGN 8 EMPTY HEAP_SECTION_SIZE\n\t{\n\t}\n\n\tARM_LIB_STACK (RAM_BASE + RAM_SIZE - STACK_SECTION_SIZE) ALIGN 8 EMPTY STACK_SECTION_SIZE\n\t{\n\t}\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tScatterAssert(ImageBase(ARM_LIB_STACK) >= ImageLimit(ARM_LIB_HEAP))\n\tScatterAssert(ImageLimit(ARM_LIB_STACK) <= (RAM_BASE + RAM_SIZE))\n\n\tfree_ram ImageLimit(ARM_LIB_HEAP) EMPTY (ImageBase(ARM_LIB_STACK) - ImageLimit(ARM_LIB_HEAP))\n\t{\n\t}\n}\n"
  },
  {
    "path": "scripts/link/programmer_inflash.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define HEAP_SECTION_SIZE\t\t\t0x40\n#define STACK_SECTION_SIZE\t\t\t0x1000\n\n#define CODE_MSG_OVERHEAD\t\t\t8\n\n/* TODO: Add FLASH_REGION_OFFSET if there are multiple levels of boot loaders */\n#if !defined(OTA_BOOT_SIZE) && defined(OTA_CODE_OFFSET)\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE + OTA_CODE_OFFSET)\n#else\n#define FLASH_REGION_BASE\t\t\t(FLASH_BASE)\n#endif\n\n#ifndef FLASH_REGION_SIZE\n#define FLASH_REGION_SIZE\t\t\t(FLASH_SIZE - (FLASH_REGION_BASE - FLASH_BASE))\n#endif\n#define FLASH_NC_REGION_BASE\t\tFLASH_C_TO_NC(FLASH_REGION_BASE)\n#define FLASHX_REGION_BASE\t\t\tFLASH_TO_FLASHX(FLASH_REGION_BASE)\n/* Linker script to configure memory regions. */\nMEMORY\n{\n\tROM    (rx)  : ORIGIN = ROM_BASE,    LENGTH = ROM_SIZE\t/* see plat_addr_map.h and common.mk */\n\tFLASH \t\t(r)\t\t: ORIGIN = FLASH_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tFLASH_NC\t(r)\t\t: ORIGIN = FLASH_NC_REGION_BASE,\tLENGTH = FLASH_REGION_SIZE\n\tFLASHX\t\t(rx)\t: ORIGIN = FLASHX_REGION_BASE,\t\tLENGTH = FLASH_REGION_SIZE\n\tRAM    (rwx) : ORIGIN = RAM_BASE,    LENGTH = RAM_SIZE\n\tRAMX   (rx)  : ORIGIN = RAMX_BASE,   LENGTH = RAM_SIZE\n}\n\n/* Library configurations */\nGROUP(libgcc.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions ROM and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exec_struct_start\n *   __cust_cmd_init_tbl_start\n *   __cust_cmd_init_tbl_end\n *   __cust_cmd_hldr_tbl_start\n *   __cust_cmd_hldr_tbl_end\n *   __exidx_start\n *   __exidx_end\n *   __etext\n *   __data_start__\n *   __data_end__\n *   __bss_start__\n *   __bss_end__\n *   __end__\n *   end\n *   __HeapLimit\n *   __StackLimit\n *   __StackTop\n *   __stack\n *   __free_ram\n */\n\nENTRY(Boot_Loader)\n\nSECTIONS\n{\n\t__export_fn_rom = (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE);\n\n\t.boot_struct (ORIGIN(FLASH)) :\n\t{\n\t\t__flash_start = .;\n\t\tKEEP(*(.boot_struct))\n\t\t. = ALIGN(4);\n\t} > FLASH\n\n\t. = FLASH_TO_FLASHX(.);\n\n\t.boot_text_flash (.) : AT (FLASHX_TO_FLASH(ADDR(.boot_text_flash)))\n\t{\n\t\t*(.boot_loader)\n\t\t*(.boot_text_flash*)\n\t\t*(.boot_rodata_flash*)\n\t\t*:main.o(.text* .rodata*)\n\t\t*:hal_bootmode.o(.text* .rodata*)\n\t\t*:hal_cmu_*.o(.text.hal_cmu_get_bootmode_addr .rodata.hal_cmu_get_bootmode_addr)\n\t\t*:cmsis_nvic.o(.text.NVIC_DisableAllIRQs .rodata.NVIC_DisableAllIRQs)\n\t\t. = ALIGN(4);\n\t} > FLASHX\n\n\t.ota_boot_info (ALIGN(4096)) :\n\t{\n\t\t*(.ota_boot_info)\n\t\t. = (0x1000);\n\t} > FLASHX\n\n\t.ota_boot_rev (ALIGN(4096)) :\n\t{\n\t\t*(.ota_boot_rev)\n\t\t. = (0x1000);\n\t} > FLASHX\n\n\t. = FLASHX_TO_FLASH(.);\n\n\t.got_info (.) :\n\t{\n\t\t__got_info_start = .;\n\t\t__got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__got_end = .;\n\t\t__got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__got_info_end = .;\n\t} > FLASH\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.burn_buffer (.) (NOLOAD) :\n\t{\n\t\t/* The size of .burn_buffer should be greater than __rom_HeapLimit. In most cases 8K is enough. */\n\t\tKEEP(*(.burn_buffer))\n\t\t. = ALIGN(4);\n\t} > RAM\n\n/*\n\t.code_dummy (.) (NOLOAD) :\n\t{\n\t\t. = CODE_MSG_OVERHEAD;\n\t\t. = ALIGN(4);\n\t} > RAM\n*/\n\n\t__boot_sram_start__ = .;\n\n\t. = RAM_TO_RAMX(.);\n\n\t__boot_sram_start_flash__ = LOADADDR(.got_info) + SIZEOF(.got_info);\n\n\t.text (.) : AT (__boot_sram_start_flash__)\n\t{\n\t\t*(.text*)\n\t\t. = ALIGN(4);\n\t} > RAMX\n\n\t.ARM.extab (.) : AT (LOADADDR(.text) + SIZEOF(.text))\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > RAMX\n\n\t__exidx_start = .;\n\t/* .ARM.exidx contains R_ARM_PREL31 (+-0x40000000) offset to functions, which means\n\t * the session location cannot be too far away from the function addresses */\n\t.ARM.exidx (.) : AT (LOADADDR(.ARM.extab) + SIZEOF(.ARM.extab))\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > RAMX\n\t__exidx_end = .;\n\n\t. = RAMX_TO_RAM(.);\n\n\t.rodata (.) : AT (LOADADDR(.ARM.exidx) + SIZEOF(.ARM.exidx))\n\t{\n\t\t*(.rodata*)\n\t\t*(.boot_rodata_sram*)\n\n\t\t. = ALIGN(4);\n\t\t__cust_cmd_init_tbl_start = .;\n\t\tKEEP(*(.cust_cmd_init_tbl))\n\t\t__cust_cmd_init_tbl_end = .;\n\n\t\t. = ALIGN(4);\n\t\t__cust_cmd_hldr_tbl_start = .;\n\t\tKEEP(*(.cust_cmd_hldr_tbl))\n\t\t__cust_cmd_hldr_tbl_end = .;\n\n\t\t*(.note.gnu.build-id)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t__etext = .;\n\n\t.data (.) : AT (LOADADDR(.rodata) + SIZEOF(.rodata))\n\t{\n\t\t__data_start__ = .;\n\t\t*(.data*)\n\n\t\t. = ALIGN(4);\n\t\t/* All data end */\n\t\t__data_end__ = .;\n\n\t} > RAM\n\n\t__boot_sram_end__ = .;\n\n\t__boot_sram_end_flash__ = LOADADDR(.data) + SIZEOF(.data);\n\t\n\t.build_info (LOADADDR(.data) + SIZEOF(.data)) : AT (LOADADDR(.data) + SIZEOF(.data))\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ALIGN(4);\n\t} > FLASH = 0x00000000\n\n\t/* The following section be the last loaded section */\n\t.code_start_addr (.) :\n\t{\n\t\t__app_entry_address__ = .;\n\t\tLONG(APP_ENTRY_ADDRESS);\n\t\t__download_uart_bandrate__ = .;\n\t\tLONG(DOWNLOAD_UART_BANDRATE);\n\t\tLONG(BUILD_INFO_MAGIC);\n\t\tLONG(ABSOLUTE(__flash_start));\n\t} > FLASH\n\t\n\t__flash_end = .;\n\t\n\t.bss (ADDR(.data)+SIZEOF(.data)) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t__bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__bss_end__ = .;\n\t} > RAM\n\n\t.heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__HeapBase = .;\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t\t__HeapLimit = .;\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n\t__StackTop = ORIGIN(RAM) + LENGTH(RAM);\n\t__StackLimit = __StackTop - SIZEOF(.stack_dummy);\n\tPROVIDE(__stack = __StackTop);\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__StackLimit >= __HeapLimit, \"region RAM overflowed with stack\")\n\t__free_ram = __StackLimit - __HeapLimit;\n\n\t__boot_bss_sram_start__ = .;\n\t__boot_bss_sram_end__ = .;\n\t__sram_text_data_start_flash__ = .;\n\t__sram_text_data_end_flash__ = .;\n\t__sram_text_data_start__ = .;\n\t__sram_bss_start__ = .;\n\t__sram_bss_end__ = .;\n\t__fast_sram_text_data_start_flash__ = .;\n\t__fast_sram_text_data_end_flash__ = .;\n\t__fast_sram_text_data_start__ = .;\t\n}\n"
  },
  {
    "path": "scripts/link/rom.lds.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#define HEAP_SECTION_SIZE\t\t\t0x40\n#define STACK_SECTION_SIZE\t\t\t0x1000\n#define CP_STACK_SECTION_SIZE\t\t0x1000\n\n/* Linker script to configure memory regions. */\nMEMORY\n{\n\tROM    \t\t(rx)  \t: ORIGIN = ROM_BASE,    \t\t\tLENGTH = ROM_SIZE\t/* see plat_addr_map.h and common.mk */\n\tRAM    \t\t(rwx) \t: ORIGIN = RAM_BASE,    \t\t\tLENGTH = RAM_SIZE\n\tRAMX   \t\t(rwx) \t: ORIGIN = RAMX_BASE,   \t\t\tLENGTH = RAM_SIZE\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\tRAMCP \t\t(rwx)\t: ORIGIN = RAMCP_BASE,\t\t\t\tLENGTH = RAMCP_SIZE\n\tRAMCPX \t\t(rwx)\t: ORIGIN = RAMCPX_BASE,\t\t\t\tLENGTH = RAMCPX_SIZE\n#endif\n}\n\n/* Library configurations */\nGROUP(libgcc.a)\n\n/* Linker script to place sections and symbol values. Should be used together\n * with other linker script that defines memory regions ROM and RAM.\n * It references following symbols, which must be defined in code:\n *   Reset_Handler : Entry of reset handler\n *\n * It defines following symbols, which code can use without definition:\n *   __export_fn_rom\n *   __exidx_start\n *   __exidx_end\n *   __rom_etext\n *   __rom_data_start__\n *   __rom_data_end__\n *   __rom_bss_start__\n *   __rom_bss_end__\n *   __rom_HeapLimit\n *   __rom_StackLimit\n *   __rom_StackTop\n *   __rom_stack\n *   __Vectors_End\n *   __Vectors_Size\n *   __free_rom_ram\n *   __rom_end\n *   __free_rom\n *   __audio_const_rom_start\n *   __audio_const_rom_end\n *   __audio_const_rom_size\n */\nENTRY(Reset_Handler)\n\nSECTIONS\n{\n\t.rom_text (ORIGIN(ROM)) :\n\t{\n\t\tKEEP(*(.vectors))\n\n\t\t*(.text*)\n\n#ifndef NOSTD\n\t\tKEEP(*(.init))\n\t\tKEEP(*(.fini))\n\n\t\t/* .ctors */\n\t\t*crtbegin.o(.ctors)\n\t\t*crtbegin?.o(.ctors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)\n\t\t*(SORT(.ctors.*))\n\t\t*(.ctors)\n\n\t\t/* .dtors */\n\t\t*crtbegin.o(.dtors)\n\t\t*crtbegin?.o(.dtors)\n\t\t*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)\n\t\t*(SORT(.dtors.*))\n\t\t*(.dtors)\n#endif\n\n\t\t. = ALIGN(4);\n\n\t\t*(.rodata*)\n\n#ifdef CHIP_HAS_AUDIO_CONST_ROM\n\t\t__audio_const_rom_start = .;\n\t\tKEEP(*audio_const_rom.o(.audio_const_index))\n\t\tKEEP(*audio_const_rom.o(.rodata*))\n\t\t__audio_const_rom_end = .;\n\t\t__audio_const_rom_size = __audio_const_rom_end - __audio_const_rom_start;\n#endif\n#ifndef NOSTD\n\t\tKEEP(*(.eh_frame*))\n#endif\n\t\t*(.note.gnu.build-id)\n\n\t\t. = ALIGN(4);\n\t} > ROM\n\n\t.rom_got_info (.) :\n\t{\n\t\t__rom_got_info_start = .;\n\t\t__rom_got_start = .;\n\t\t*(.got)\n\t\t. = ALIGN(4);\n\t\t__rom_got_end = .;\n\t\t__rom_got_plt_start = .;\n\t\t*(.got.plt)\n\t\t. = ALIGN(4);\n\t\t__rom_igot_plt_start = .;\n\t\t*(.igot.plt)\n\t\t. = ALIGN(4);\n\t\t__rom_dynamic_start = .;\n\t\t*(.dynamic)\n\t\t. = ALIGN(4);\n\t\t__rom_got_info_end = .;\n\t} > ROM\n\n\t.ARM.extab (.) :\n\t{\n\t\t*(.ARM.extab* .gnu.linkonce.armextab.*)\n\t} > ROM\n\n\t__exidx_start = .;\n\t.ARM.exidx (.) :\n\t{\n\t\t*(.ARM.exidx* .gnu.linkonce.armexidx.*)\n\t} > ROM\n\t__exidx_end = .;\n\n\t. = ALIGN(4);\n\t__rom_text0_end = .;\n\n\t.vector_table (ORIGIN(RAM)) (NOLOAD) :\n\t{\n\t\tKEEP(*(.vector_table))\n\t\t. = VECTOR_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.reboot_param (.) (NOLOAD) :\n\t{\n\t\tKEEP(*(.reboot_param))\n\t\t. = REBOOT_PARAM_SECTION_SIZE;\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t.rom_ramx (RAM_TO_RAMX(.)) : AT (__rom_text0_end)\n\t{\n\t\t__rom_ramx_start = .;\n\t\t*(.rom_ramx)\n\t\t. = ALIGN(4);\n\t\t__rom_ramx_end = .;\n\t} > RAMX\n\n\t__rom_etext = __rom_text0_end + SIZEOF(.rom_ramx);\n\n\t.rom_data (RAMX_TO_RAM(.)) : AT (__rom_etext)\n\t{\n\t\t__rom_data_start__ = .;\n\n\t\t*(.data*)\n\t\t. = ALIGN(4);\n\n#ifndef NOSTD\n\t\t*(vtable)\n\n\t\t. = ALIGN(4);\n\t\t/* preinit data */\n\t\tPROVIDE_HIDDEN (__preinit_array_start = .);\n\t\tKEEP(*(.preinit_array))\n\t\tPROVIDE_HIDDEN (__preinit_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* init data */\n\t\tPROVIDE_HIDDEN (__init_array_start = .);\n\t\tKEEP(*(SORT(.init_array.*)))\n\t\tKEEP(*(.init_array))\n\t\tPROVIDE_HIDDEN (__init_array_end = .);\n\n\t\t. = ALIGN(4);\n\t\t/* finit data */\n\t\tPROVIDE_HIDDEN (__fini_array_start = .);\n\t\tKEEP(*(SORT(.fini_array.*)))\n\t\tKEEP(*(.fini_array))\n\t\tPROVIDE_HIDDEN (__fini_array_end = .);\n\n\t\tKEEP(*(.jcr*))\n\t\t. = ALIGN(4);\n#endif\n\n\t\t/* All data end */\n\t\t__rom_data_end__ = .;\n\t} > RAM\n\n\t.rom_bss (.) (NOLOAD) : AT (ADDR(.rom_bss))\n\t{\n\t\t. = ALIGN(4);\n\t\t__rom_bss_start__ = .;\n\t\t*(.bss*)\n\t\t*(COMMON)\n\t\t. = ALIGN(4);\n\t\t__rom_bss_end__ = .;\n#ifndef NOSTD\n\t\t__bss_start__ = __rom_bss_start__;\n\t\t__bss_end__ = __rom_bss_end__;\n#endif\n\t} > RAM\n\n\t.rom_heap (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__rom_HeapBase = .;\n#ifndef NOSTD\n\t\t__end__ = .;\n\t\tend = __end__;\n\t\t. += HEAP_SECTION_SIZE;\n#endif\n\t\t. = ALIGN(8);\n\t\t__rom_HeapLimit = .;\n\t} > RAM\n\n\t.scratch_buf (.) (NOLOAD) :\n\t{\n\t\t. = ALIGN(4);\n\t\t*(.scratch_buf)\n\t\t. = ALIGN(4);\n\t} > RAM\n\n\t/* .stack_dummy section doesn't contains any symbols. It is only\n\t * used for linker to calculate size of stack sections, and assign\n\t * values to stack symbols later */\n\t.rom_stack_dummy (.) (COPY) :\n\t{\n\t\t. = STACK_SECTION_SIZE;\n\t\t. = ALIGN(8);\n\t} > RAM\n\n\t/* Set stack top to end of RAM, and stack limit move down by\n\t * size of stack_dummy section */\n\t__rom_StackTop = ORIGIN(RAM) + LENGTH(RAM);\n\t__rom_StackLimit = __rom_StackTop - SIZEOF(.rom_stack_dummy);\n\tPROVIDE(__rom_stack = __rom_StackTop);\n#ifndef NOSTD\n\t__StackTop = __rom_StackTop;\n\tPROVIDE(__stack = __rom_StackTop);\n#endif\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tASSERT(__rom_StackLimit >= __rom_HeapLimit, \"region RAM overflowed with stack\")\n\t__free_rom_ram = __rom_StackLimit - __rom_HeapLimit;\n\n\t__rom_end = __rom_etext + SIZEOF(.rom_data);\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\t.cp_ramx_last_dummy (NOLOAD) :\n\t{\n\t\t__cp_ramx_last_dummy_start = .;\n\t} > RAMCPX\n\n\t.cp_ram_last_dummy (NOLOAD) :\n\t{\n\t\t. = ALIGN(8);\n\t\t__cp_ram_last_dummy_start = .;\n\t} > RAMCP\n\n\t__cp_stack_top = ORIGIN(RAMCP) + LENGTH(RAMCP);\n\t__cp_stack_limit = __cp_stack_top - CP_STACK_SECTION_SIZE;\n\n\t__free_ramcpx = ORIGIN(RAMCPX) + LENGTH(RAMCPX) - __cp_ramx_last_dummy_start;\n\tASSERT(__cp_stack_limit >= __cp_ram_last_dummy_start, \"region RAMCP overflowed with stack\")\n\t__free_ramcp = __cp_stack_limit - __cp_ram_last_dummy_start;\n#endif\n\n\t.rom_export_fn (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE) :\n\t{\n\t\t__export_fn_rom = .;\n\t\tKEEP(*(.export_fn))\n\t\t. = ROM_EXPORT_FN_SECTION_SIZE;\n\t} > ROM = 0x00000000\n\n\t.rom_build_info (ORIGIN(ROM) + LENGTH(ROM) - ROM_BUILD_INFO_SECTION_SIZE) :\n\t{\n\t\tKEEP(*(.build_info))\n\t\t. = ROM_BUILD_INFO_SECTION_SIZE;\n\t} > ROM = 0x00000000\n\n\tASSERT(ADDR(.rom_export_fn) >= __rom_end, \"region ROM overflowed with .rom_export_fn\")\n\t__free_rom = ADDR(.rom_export_fn) - __rom_end;\n}\n\n"
  },
  {
    "path": "scripts/link/rom.lds_scat.S",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"plat_addr_map.h\"\n\n#ifdef NOSTD\n#define HEAP_SECTION_SIZE\t\t\t0\n#else\n#define HEAP_SECTION_SIZE\t\t\t0x40\n#endif\n#define STACK_SECTION_SIZE\t\t\t0x1000\n#define CP_STACK_SECTION_SIZE\t\t0x1000\n\nLR_rom ROM_BASE NOCOMPRESS\n{\n\trom_vectors +0\n\t{\n\t\t*(.vectors, +FIRST)\n\t}\n\n\trom_text +0 FIXED\n\t{\n\t\t*(.text*)\n\n#ifndef NOSTD\n\t\t*(InRoot$$Sections)\n\t\t*armlib*(+TEXT)\n\t\t*armlib*(+CONST)\n#endif\n\n\t\t*(.rodata*)\n\t}\n\n#ifdef CHIP_HAS_AUDIO_CONST_ROM\n\trom_audio_const +0\n\t{\n\t\t*audio_const_rom.o(.audio_const_index)\n\t\t*audio_const_rom.o(.rodata*)\n\t}\n#endif\n\n\trom_build_id +0\n\t{\n#ifndef NOSTD\n\t\t*(.eh_frame*)\n#endif\n\t\t*(.note.gnu.build-id)\n\t}\n\n\trom_got_info +0\n\t{\n\t\t*(.got)\n\t\t*(.got.plt)\n\t\t*(.igot.plt)\n\t\t*(.dynamic)\n\t}\n\n\t.ARM.extab +0\n\t{\n\t\t*(.ARM.extab*, .gnu.linkonce.armextab.*)\n\t}\n\n\t.ARM.exidx +0\n\t{\n\t\t*(.ARM.exidx*, .gnu.linkonce.armexidx.*)\n\t}\n\n\trom_text0_end +0 EMPTY 0\n\t{\n\t}\n\n\tvector_table RAM_BASE UNINIT VECTOR_SECTION_SIZE\n\t{\n\t\t*(.bss.vector_table, +FIRST)\n\t}\n\n\treboot_param (ImageBase(vector_table) + VECTOR_SECTION_SIZE) UNINIT REBOOT_PARAM_SECTION_SIZE\n\t{\n\t\t*(.bss.reboot_param, +FIRST)\n\t}\n\n\trom_ramx RAM_TO_RAMX(ImageBase(reboot_param) + REBOOT_PARAM_SECTION_SIZE)\n\t{\n\t\t*(.rom_ramx)\n\t}\n\n\trom_data RAMX_TO_RAM(+0)\n\t{\n\t\t*(.data*)\n\n#ifndef NOSTD\n\t\t*armlib*(+DATA)\n#endif\n\t}\n\n\trom_bss +0 UNINIT\n\t{\n\t\t*(.bss*)\n\t\t*(COMMON)\n\n#ifndef NOSTD\n\t\t*armlib*(+BSS)\n#endif\n\t}\n\n\tARM_LIB_HEAP +0 ALIGN 8 EMPTY HEAP_SECTION_SIZE\n\t{\n\t}\n\n\tscratch_buf +0 UNINIT\n\t{\n\t\t*(.bss.scratch_buf)\n\t}\n\n\tARM_LIB_STACK (RAM_BASE + RAM_SIZE - STACK_SECTION_SIZE) ALIGN 8 EMPTY STACK_SECTION_SIZE\n\t{\n\t}\n\n\t/* Check if data + heap + stack exceeds RAM limit */\n\tScatterAssert(ImageBase(ARM_LIB_STACK) >= ImageLimit(ARM_LIB_HEAP))\n\tScatterAssert(ImageLimit(ARM_LIB_STACK) <= (RAM_BASE + RAM_SIZE))\n\n\tfree_ram ImageLimit(scratch_buf) EMPTY (ImageBase(ARM_LIB_STACK) - ImageLimit(scratch_buf))\n\t{\n\t}\n\n#if defined(CHIP_HAS_CP) && (RAMCP_SIZE > 0)\n\tcp_ramx_last_dummy RAMCPX_BASE EMPTY 0\n\t{\n\t}\n\n\tcp_ram_last_dummy RAMCP_BASE EMPTY 0\n\t{\n\t}\n\n\tcp_stack (RAMCP_BASE + RAMCP_SIZE - CP_STACK_SECTION_SIZE) EMPTY CP_STACK_SECTION_SIZE\n\t{\n\t}\n\n\tScatterAssert(ImageBase(cp_stack) >= ImageLimit(cp_ram_last_dummy))\n\tScatterAssert(ImageLimit(cp_stack) <= RAMCP_BASE + RAMCP_SIZE)\n#endif\n}\n\nLR_build_info +0\n{\n\tlr_build_info_start +0 FIXED EMPTY 0\n\t{\n\t}\n\n\trom_export_fn (ROM_BASE + ROM_SIZE - ROM_BUILD_INFO_SECTION_SIZE - ROM_EXPORT_FN_SECTION_SIZE) FIXED\n\t{\n\t\t*(.export_fn)\n\t}\n\n\trom_build_info (ROM_BASE + ROM_SIZE - ROM_BUILD_INFO_SECTION_SIZE) FIXED\n\t{\n\t\t*(.build_info, +FIRST)\n\t}\n\n\tfree_rom ImageLimit(lr_build_info_start) EMPTY (ImageBase(rom_export_fn) - ImageLimit(lr_build_info_start))\n\t{\n\t}\n\n\tScatterAssert(LoadLimit(rom_build_info) <= (ROM_BASE + ROM_SIZE))\n}\n\n"
  },
  {
    "path": "scripts/submods.mk",
    "content": "cur_makefile := $(lastword $(MAKEFILE_LIST))\n\n$(cur_makefile): ;\n\nget_subdirs = $(foreach m, $(1), $(if $(filter $m/% $m,$(2)),$m,))\n\nget_submodgoals = $(foreach m, \\\n  $(patsubst $(1)/%,%,$(filter $(1)/%,$(2))), \\\n  $(addprefix $(1)/,$(firstword $(subst /,$(space),$m))))\n\nget_multi_objs = $(addprefix $(obj)/, $($(subst $(obj)/,,$(1:.o=-objs))) \\\n  $($(subst $(obj)/,,$(1:.o=-objs))))\n\n"
  },
  {
    "path": "scripts/submods_init.mk",
    "content": "cur_makefile := $(lastword $(MAKEFILE_LIST))\n\n$(cur_makefile): ;\n\nifeq ($(WIN_PLAT),y)\nSUBMODGOALS := $(sort $(foreach m, $(MAKECMDGOALS), \\\n  $(if $(filter-out ./,$(wildcard $(dir $(subst \\,/,$m)) $(subst \\,/,$m))),$m,)))\nelse\n  SUBMODGOALS := $(sort $(foreach m, $(MAKECMDGOALS), \\\n  $(if $(filter-out ./,$(wildcard $(dir $m) $m)),$m,)))\nendif\n\nifneq ($(SUBMODGOALS),)\nMAKECMDGOALS := $(filter-out $(SUBMODGOALS),$(MAKECMDGOALS))\nifeq ($(WIN_PLAT),y)\nSUBMODGOALS := $(subst \\,/,$(SUBMODGOALS))\nendif\nSUBMODS := $(patsubst $(CURDIR)/%,%,$(SUBMODGOALS))\nSUBMODS := $(patsubst %/,%,$(SUBMODS))\n# Filter out subdirectories if their parent directories already in SUBMODS\nSUBMODS := $(filter-out $(addsuffix /%,$(SUBMODS)),$(SUBMODS))\nexport SUBMODS\nendif\n\n"
  },
  {
    "path": "services/Makefile",
    "content": "obj-y := audio_dump/ \\\n         audioflinger/ \\\n         audio_process/ \\\n         hw_dsp/ \\\n         bt_app/ \\\n         overlay/ \\\n         resources/ \\\n         ../utils/crc32/ \\\n         ../utils/crc16/ \\\n         ../utils/heap/ \\\n         osif/ \\\n         norflash_api/ \\\n\nifeq ($(BONE_SENSOR_TDM),1)\nobj-y += bone_sensor/\nendif\n\nifneq ($(INTERCONNECTION)_$(AI_VOICE),0_0)\nobj-y += interconnection/\nendif\n\nifeq ($(ENHANCED_STACK),1)\nobj-y += bt_profiles_enhanced/\nobj-y += bt_if_enhanced/\nelse\nobj-y += bt_profiles/\nobj-y += bt_if/\nendif\n\nifeq ($(MBED),1)\nobj-y += fs/\nendif\n\nifneq ($(MBED)_$(AI_VOICE),0_0)\nobj-y +=../utils/kfifo/\nendif\n\nifeq ($(VOICE_DATAPATH_ENABLED),1)\nobj-y += voicepath/\nobj-y += voicepath/$(VOICE_DATAPATH_TYPE)/\nendif\n\nifneq ($(VOICE_DATAPATH_ENABLED)_$(AI_VOICE),0_0)\nobj-y += app_ai/\nendif\n\nifeq ($(BLE),1)\nobj-y += ble_app/ \\\n         bridge/ \\\n         ble_stack/ \\\n         ../utils/retention_ram/ \\\n         ble_profiles/\nendif\n\nifeq ($(AUTO_TEST),1)\nobj-y += auto_test/\nendif\n\nobj-y += nv_section/\n\nobj-y += nvrecord/\n\nifeq ($(VOICE_RECOGNITION),1)\nobj-y += voice_recognition/\nendif\n\nifeq ($(APP_ANC_TEST),1)\nobj-y += anc_spp_tool/\nendif\n\nifeq ($(TEST_OVER_THE_AIR),1)\nobj-y += tota/\nendif\n\nifeq ($(OTA_ENABLE),1)\nifeq ($(IBRT),1)\nobj-y += ibrt_ota/\nelse\nendif\nifeq ($(OTA_ENABLE), 1)\nobj-y += ota/\nendif\nendif\n\nifeq ($(TILE_DATAPATH_ENABLED),1)\nobj-y += ../thirdparty/tile/\nendif\n\nifeq ($(AI_VOICE),1)\nobj-y += ai_voice/\nendif\n\nifeq ($(CHIP_HAS_CP),1)\nobj-y += cp_accel/\nendif\n\nifeq ($(IBRT),1)\nobj-y += ibrt_core/\nobj-y += app_ibrt/\nobj-y += ibrt_ui/\nendif\n\nifeq ($(TWS_SYSTEM_ENABLED),1)\nobj-y += app_tws/\nendif\n\nifeq ($(RSA_SHA),1)\nobj-y +=../utils/sha256/ ../utils/rsa2048/ \nendif\n\nifeq ($(AES256_FOR_BIN),1)\nobj-y +=../utils/aes256/\nendif\n\nobj-y += communication/\n\nifeq ($(RPC_SUPPORT),1)\nobj-y += rpc/\nendif\n\nifeq ($(A2DP_LHDC_ON),1)\nobj-y += lhdc_license/\nendif\n\nifeq ($(THROUGH_PUT),1)\nobj-y += through_put/\nendif\n"
  },
  {
    "path": "services/anc_spp_tool/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nANC_TEST_LIB_NAME := libanc_spp_tool\n\n$(ANC_TEST_LIB_NAME)-y := $(src_obj)\n\nobj-y += $(ANC_TEST_LIB_NAME).a\n\nccflags-y += -Iutils/hexdump    \\\n        -Iapps/key  \\\n        -Iservices/bt_app   \\\n        -Iservices/bt_if/inc  \\\n        -Iplatform/drivers/ana \\\n\t\t-Iservices/multimedia/audio/process/anc/include \\\n\t\t-Iservices/audioflinger \\\n\t\t-Iservices/nv_section/aud_section \\\n\t\t-Iservices/nv_section/include \\\n\t\t-Iservices/audio_eq \\\n\t\t-Iservices/tota \\\n\t\t-Iplatform/hal \\\n\t\t-Iplatform/drivers/norflash \\\n\t\t-Iservices/multimedia/audio/process/filters/include \\\n\t\t-Iutils/crc32 \\\n\t\t-Iutils/boot_struct \\\n\t\t-Iutils/libc/inc \\\n\t\t-Iutils/hwtimer_list \\\n\t\t-Iutils/heap \\\n        -Iservices/tws/inc \\\n        -Iutils/cqueue \\\n        -Iapps/audioplayers\n\n\nifeq ($(ANC_FF_ENABLED),1)\nCFLAGS_anc_usb_app.o += -DANC_FF_ENABLED\nendif\n\nifeq ($(ANC_FB_ENABLED),1)\nCFLAGS_anc_usb_app.o += -DANC_FB_ENABLED\nendif\n\n"
  },
  {
    "path": "services/anc_spp_tool/anc_parse_data.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ANC_PARSE_DATA_H__\n#define __ANC_PARSE_DATA_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \"tool_msg.h\"\n#include \"crc32.h\"\n// #include \"app_tws.h\"\n\n#define COMMAND_PARSER_VERSION          0x0100\n\n#define ANC_PARSE_DATA_BUFF_SIZE ((8 * 1024 + BURN_DATA_MSG_OVERHEAD + 63) / 64 * 64)\n#define ANC_PARSE_DATA_BUFF_OFFSET (PCM_BUFFER_SZ_TWS+TRANS_BUFFER_SZ_TWS+A2DP_BUFFER_SZ_TWS - ANC_PARSE_DATA_BUFF_SIZE)\n\n#define ANC_SHARE_BUF                   0\n\n#define BURN_BUFFER_LOC\n\nenum PROGRAMMER_STATE{\n    PROGRAMMER_NONE,\n    PROGRAMMER_ERASE_BURN_START,\n    PROGRAMMER_BULK_WRITE_START,\n};\n\nenum DATA_BUF_STATE {\n    DATA_BUF_FREE,\n    DATA_BUF_RECV,\n    DATA_BUF_BURN,\n    DATA_BUF_DONE,\n};\n\nenum FLASH_CMD_TYPE {\n    FLASH_CMD_ERASE_SECTOR = 0x21,\n    FLASH_CMD_BURN_DATA = 0x22,\n    FLASH_CMD_ERASE_CHIP = 0x31,\n};\n\nenum CUST_CMD_STAGE {\n    CUST_CMD_STAGE_HEADER,\n    CUST_CMD_STAGE_DATA,\n    CUST_CMD_STAGE_EXTRA,\n\n    CUST_CMD_STAGE_QTY\n};\n\nstruct CUST_CMD_PARAM {\n    enum CUST_CMD_STAGE stage;\n    const struct message_t *msg;\n    int extra;\n    unsigned char *buf;\n    size_t expect;\n    size_t size;\n    unsigned int timeout;\n};\n\ntypedef enum ERR_CODE (*CUST_CMD_HANDLER_T)(struct CUST_CMD_PARAM *param);\n\n#define CUST_CMD_HDLR_TBL_LOC           __attribute__((section(\".cust_cmd_hldr_tbl\"), used))\n#define TIMEOUT_INFINITE                ((uint32_t)-1)\n\nextern struct message_t recv_msg;\n\n/**\n * @brief\n * Data transmission will be slightly slower in sniff mode. PC Tool may disconnet SPP connection\n * because of command response timed out. We should always in active mode to work around this case. \n */\nextern void anc_data_buff_init(void);\nextern void anc_data_buff_deinit(void);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/app_ai/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)/src/*.cpp))\n\nifeq ($(BISTO_ENABLE),0)\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)voice_sbc/*.cpp))\nendif\n\nifeq ($(ANC_APP),1)\nCFLAGS_app_ai_if.o += -DANC_APP\nendif\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nsubdir-ccflags-y += -Iapps/audioplayers \\\n                    -Iapps/common \\\n                    -Iapps/key \\\n                    -Iapps/main \\\n                    -Iplatform/drivers/bt \\\n                    -Iplatform/hal \\\n                    -Iservices/ai_voice/audio \\\n                    -Iservices/ai_voice/transport \\\n                    -Iservices/ai_voice/manager \\\n                    -Iservices/ai_voice/protocol/ama/ama_stream \\\n                    -Iservices/audio_dump/include \\\n                    -Iservices/app_ai/inc \\\n                    -Iservices/app_ibrt/inc \\\n                    -Iservices/app_tws/inc \\\n                    -Iservices/ble_app/app_main \\\n                    -Iservices/ble_stack/hl/api \\\n                    -Iservices/ble_stack/ble_ip \\\n                    $(BT_IF_INCLUDES) \\\n                    -Iservices/bt_app \\\n                    -Iservices/bt_app/a2dp_codecs/include \\\n                    -Iservices/multimedia/audio/codec/sbc/inc \\\n                    -Iservices/multimedia/speech/inc \\\n                    -Iservices/norflash_api \\\n                    -Iservices/nvrecord \\\n                    -Iservices/ibrt_core/inc \\\n                    -Iservices/ibrt_ui/inc \\\n                    -Iservices/ble_stack/common/api \\\n                    -Iservices/ble_stack/hl/inc \\\n                    -Iservices/ble_stack/ke/api \\\n                    -Iservices/cp_accel \\\n                    -Iservices/resources \\\n                    -Iservices/through_put \\\n                    -Iservices/voicepath \\\n                    -Iservices/voicepath/gsound/gsound_custom/inc \\\n                    -Iservices/voicepath/gsound/gsound_target \\\n                    -Iservices/voicepath/gsound/gsound_target_api_read_only \\\n                    -Ithirdparty/userapi \\\n                    -Iutils/cqueue \\\n                    -Iutils/heap \\\n                    -Iapps/anc/inc\n"
  },
  {
    "path": "services/app_ai/inc/app_ai_algorithm.h",
    "content": "#ifndef APP_AI_ALGORITHM_H_\n#define APP_AI_ALGORITHM_H_\n\n//the ai aec data cache state\ntypedef enum {\n    AI_AEC_CACHE_IDLE,\n    AI_AEC_CACHE_CACHED,\n    AI_AEC_CACHE_PROCESSED,\n} AI_AEC_CACHE_STATE_E;\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*---------------------------------------------------------------------------\n *            app_ai_algorithm_mic_data_handle\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    use algorithm to handle the data that cuptrued from mic\n *\n * Parameters:\n *    uint8_t *buf\n *    uint32_t length\n *\n * Return:\n *    void\n */\nvoid app_ai_algorithm_mic_data_handle(uint8_t *buf, uint32_t length);\n\n/*---------------------------------------------------------------------------\n *            app_ai_algorithm_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    initialize AI algorithm\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_algorithm_init(void);\n\nvoid cp_aec_init(void);\nvoid cp_aec_deinit(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n\n#endif //APP_AI_ALGORITHM_H_\n\n"
  },
  {
    "path": "services/app_ai/inc/app_ai_if.h",
    "content": "#ifndef AI_IF_H_\n#define AI_IF_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"app_ai_if_config.h\"\n#include \"bluetooth.h\"\n\n#if (VOB_ENCODING_ALGORITHM == ENCODING_ALGORITHM_OPUS)\n#if defined(SPEECH_CAPTURE_TWO_CHANNEL)\n#define APP_AI_IF_CAPTURE_BUFFER_SIZE   (76*1024)\n#elif defined(__DUAL_MIC_RECORDING__)\n#define APP_AI_IF_CAPTURE_BUFFER_SIZE   (79*1024)\n#else\n#define APP_AI_IF_CAPTURE_BUFFER_SIZE   (63*1024)\n#endif\n#elif (VOB_ENCODING_ALGORITHM == ENCODING_ALGORITHM_SBC)\n#if defined(CHIP_BEST1400)\n#define APP_AI_IF_CAPTURE_BUFFER_SIZE   (13*1024)\n#else\n#define APP_AI_IF_CAPTURE_BUFFER_SIZE   (17*1024)\n#endif\n#endif\n\n//the ai type now use\ntypedef enum {\n    AI_SPEC_INIT,\n    AI_SPEC_GSOUND,\n    AI_SPEC_AMA,\n    AI_SPEC_BES,\n    AI_SPEC_BAIDU,\n    AI_SPEC_TENCENT,\n    AI_SPEC_ALI,\n    AI_SPEC_COMMON,\n    AI_SPEC_RECORDING,\n    AI_SPEC_COUNT,\n} AI_SPEC_TYPE_E;\n\ntypedef struct{\n    uint8_t connPathType;\n    uint8_t connPathState;\n    uint8_t connBtState;\n    uint8_t connBdAddr[6];\n}AI_CONNECTION_STATE_T;\n\ntypedef struct{\n    uint8_t *buff;\n    uint32_t buff_size_total;\n    uint32_t buff_size_used;\n    uint32_t buff_size_free;\n}AI_CAPTURE_BUFFER_T;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nconst char *ai_spec_type2str(AI_SPEC_TYPE_E ai_spec);\n\n/*---------------------------------------------------------------------------\n *            app_ai_key_event_handle\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for AI handle key event\n *\n * Parameters:\n *    void *param1\n *    uint32_t param2\n *\n * Return:\n *    void\n */\nvoid app_ai_key_event_handle(void *param1, uint32_t param2);\n\n/*---------------------------------------------------------------------------\n *            app_ai_if_get_ai_spec\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get the ai current spec\n *\n * Parameters:\n *    void\n *\n * Return:\n *    uint32_t -- ai spec\n */\nuint32_t app_ai_if_get_ai_spec(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_if_mobile_connect_handle\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handle ai when mobile connect\n *\n * Parameters:\n *    _addr -- the address of connected mobile\n *\n * Return:\n *    void\n */\nvoid app_ai_if_mobile_connect_handle(bt_bdaddr_t *_addr);\n\n/*---------------------------------------------------------------------------\n *            app_ai_voice_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    init ai voice\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_voice_init(void);\n\n/*---------------------------------------------------------------------------\n *            ai_if_is_ai_stream_mic_open\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get whether ai stream is opened\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool true means ai stream is opened\n */\nbool ai_if_is_ai_stream_mic_open(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_if_get_ble_connection_index\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get ai ble connection index\n *\n * Parameters:\n *    void\n *\n * Return:\n *    uint8_t --  ble connection index\n */\nuint8_t app_ai_if_get_ble_connection_index(void);\n\n/*---------------------------------------------------------------------------\n*            app_ai_if_mempool_deinit\n*---------------------------------------------------------------------------\n*\n*Synopsis:\n*    init ai voice capture mempool\n*\n* Parameters:\n*    void\n*\n* Return:\n*    void\n*/\nvoid app_ai_if_mempool_deinit(void);\n\n/*---------------------------------------------------------------------------\n*            app_ai_if_mempool_get_buff\n*---------------------------------------------------------------------------\n*\n*Synopsis:\n*    get buf form ai voice capture mempool\n*\n* Parameters:\n*    buff -- the pointer of buf that get from mempool\n*    size -- the size of buf that get from mempool\n*\n* Return:\n*    void\n*/\nvoid app_ai_if_mempool_get_buff(uint8_t **buff, uint32_t size);\n\nvoid app_ai_if_inform_music_or_prompt_status(bool isOn, uint32_t sampleRate);\n\nbool app_ai_if_is_music_or_prompt_ongoing(void);\n\nuint32_t app_ai_if_get_music_or_prompt_sample_rate(void);\n\nvoid app_ai_if_pre_music_or_prompt_check(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n\n#endif //AI_IF_H_\n\n"
  },
  {
    "path": "services/app_ai/inc/app_ai_if_config.h",
    "content": "#ifndef APP_AI_IF_CONFIG_H_\n#define APP_AI_IF_CONFIG_H_\n\n#ifdef __KNOWLES\n#define DIG_MIC_WORKAROUND\n#define KNOWLES_UART_DATA\n#endif\n\n#ifdef __AMA_VOICE__\n//#define PUSH_AND_HOLD_ENABLED\n//#define AI_32KBPS_VOICE\n//#define NO_LOCAL_START_TONE\n#endif\n\n#ifdef __DMA_VOICE__\n//#define PUSH_AND_HOLD_ENABLED\n//#define AI_32KBPS_VOICE\n\n#define FLOW_CONTROL_ON_UPLEVEL\n#define ASSAM_PKT_ON_UPLEVEL\n#define CLOSE_BLE_ADV_WHEN_VOICE_CALL\n#define CLOSE_BLE_ADV_WHEN_SPP_CONNECTED\n#define BAIDU_RFCOMM_DIRECT_CONN\n#define BYPASS_SLOW_ADV_MODE\n#endif\n\n#ifdef __SMART_VOICE__\n#define PUSH_AND_HOLD_ENABLED\n//#define AI_32KBPS_VOICE\n#endif\n\n#ifdef __TENCENT_VOICE__\n#define PUSH_AND_HOLD_ENABLED\n//#define AI_32KBPS_VOICE\n#endif\n\n#ifdef __GMA_VOICE__\n//#define PUSH_AND_HOLD_ENABLED\n//#define AI_32KBPS_VOICE\n#endif\n\n#endif //APP_AI_IF_CONFIG_H_\n\n"
  },
  {
    "path": "services/app_ai/inc/app_ai_if_custom_ui.h",
    "content": "#ifndef APP_AI_IF_CUSTOM_UI_H_\n#define APP_AI_IF_CUSTOM_UI_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*---------------------------------------------------------------------------\n *            app_ai_if_custom_ui_send_cmd\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for custom to send cmd\n *\n * Parameters:\n *    cmd_buf -- cmd data buff\n *    cmd_len -- cmd data length\n *\n * Return:\n *    void\n */\nbool app_ai_if_custom_ui_send_cmd(uint8_t *cmd_buf,uint16_t cmd_len);\n\n/*---------------------------------------------------------------------------\n *            app_ai_if_custom_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    init custom\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_if_custom_init(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n\n#endif //APP_AI_IF_CUSTOM_UI_H_\n\n"
  },
  {
    "path": "services/app_ai/inc/app_ai_if_gsound.h",
    "content": "#ifndef APP_AI_IF_GSOUND_H_\n#define APP_AI_IF_GSOUND_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*---------------------------------------------------------------------------\n *            app_ai_if_gsound_service_enable_switch\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    give the interface to AI to control gsound switch\n *\n * Parameters:\n *    onOff -- control gsound enable or not\n *\n * Return:\n *    void\n */\nvoid app_ai_if_gsound_service_enable_switch(bool onOff);\n\n#ifdef __cplusplus\n    }\n#endif\n\n\n#endif //APP_AI_IF_GSOUND_H_\n\n"
  },
  {
    "path": "services/app_ai/inc/app_ai_if_thirdparty.h",
    "content": "#ifndef APP_AI_IF_THIRDPARTY_H_\n#define APP_AI_IF_THIRDPARTY_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"app_thirdparty.h\"\n\n#if defined(__ALEXA_WWE_LITE)\n#ifdef VOICE_DETECTOR_EN\n#if defined(CHIP_BEST2300A)\n#define APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE   (127*1024)\n#else\n#define APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE   (111*1024)\n#endif\n#else\n#define APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE   (99*1024)\n#endif\n#elif defined(GSOUND_HOTWORD_EXTERNAL)\n#define APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE   (68*1024)\n#else\n#define APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE   (0)\n#endif\n\ntypedef struct{\n    uint8_t *buff;\n    uint32_t buff_size_total;\n    uint32_t buff_size_used;\n    uint32_t buff_size_free;\n}THIRDPARTY_AI_MEMPOOL_BUFFER_T;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*---------------------------------------------------------------------------\n*            app_ai_if_thirdparty_mempool_init\n*---------------------------------------------------------------------------\n*\n*Synopsis:\n*    init ai voice thirdparty mempool\n*\n* Parameters:\n*    void\n*\n* Return:\n*    void\n*/\nPOSSIBLY_UNUSED void app_ai_if_thirdparty_mempool_init(void);\n\n/*---------------------------------------------------------------------------\n*            app_ai_if_thirdparty_mempool_deinit\n*---------------------------------------------------------------------------\n*\n*Synopsis:\n*    init ai voice thirdparty mempool\n*\n* Parameters:\n*    void\n*\n* Return:\n*    void\n*/\nvoid app_ai_if_thirdparty_mempool_deinit(void);\n\n/*---------------------------------------------------------------------------\n*            app_ai_if_thirdparty_mempool_get_buff\n*---------------------------------------------------------------------------\n*\n*Synopsis:\n*    get buf form ai voice thirdparty mempool\n*\n* Parameters:\n*    buff -- the pointer of buf that get from mempool\n*    size -- the size of buf that get from mempool\n*\n* Return:\n*    void\n*/\nvoid app_ai_if_thirdparty_mempool_get_buff(uint8_t **buff, uint32_t size);\n\n/*---------------------------------------------------------------------------\n*            app_ai_if_thirdparty_start_stream_by_app_audio_manager\n*---------------------------------------------------------------------------\n*\n*Synopsis:\n*    start mic stream of thirdparty\n*\n* Parameters:\n*    void\n*\n* Return:\n*    void\n*/\nvoid app_ai_if_thirdparty_start_stream_by_app_audio_manager(void);\n\n/*---------------------------------------------------------------------------\n*            app_ai_if_thirdparty_stop_stream_by_app_audio_manager\n*---------------------------------------------------------------------------\n*\n*Synopsis:\n*    stop mic stream of thirdparty\n*\n* Parameters:\n*    void\n*\n* Return:\n*    void\n*/\nvoid app_ai_if_thirdparty_stop_stream_by_app_audio_manager(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_if_thirdparty_event_handle\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for AI use thirdparty event handle\n *\n * Parameters:\n *    funcId -- function ID\n *    event_type event type ID\n *\n * Return:\n *    void\n */\nint app_ai_if_thirdparty_event_handle(THIRDPARTY_FUNC_ID funcId, THIRDPARTY_EVENT_TYPE event_type);\n\n/*---------------------------------------------------------------------------\n *            app_ai_if_thirdparty_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for AI init thirdparty\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_if_thirdparty_init(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n\n#endif //APP_AI_IF_THIRDPARTY_H_\n\n"
  },
  {
    "path": "services/app_ai/inc/app_ai_manager_api.h",
    "content": "#ifndef APP_AI_MANAGER_API_H_\n#define APP_AI_MANAGER_API_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"app_ai_if.h\"\n\n\n#define MAI_TYPE_REBOOT_WITHOUT_OEM_APP\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_is_in_multi_ai_mode\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to know ai manager is in multi ai mode or not\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool -- true is in multi ai mode\n */\nbool app_ai_manager_is_in_multi_ai_mode(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_voicekey_is_enable\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get the voicekey is enable or not\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool -- true: voice key is enable\n */\nbool app_ai_manager_voicekey_is_enable(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_voicekey_save_status\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager save voice key status\n *\n * Parameters:\n *    state -- the voice key status\n *\n * Return:\n *    void\n */\nvoid app_ai_manager_voicekey_save_status(bool state);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_switch_spec\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager switch ai spec\n *\n * Parameters:\n *    ai_spec -- the ai spec want to switch\n *\n * Return:\n *    void\n */\nvoid app_ai_manager_switch_spec(AI_SPEC_TYPE_E ai_spec);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_set_current_spec\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager set current ai spec\n *\n * Parameters:\n *    ai_spec -- the ai spec need to set\n *\n * Return:\n *    void\n */\nvoid app_ai_manager_set_current_spec(AI_SPEC_TYPE_E ai_spec);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_get_current_spec\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager get current ai spec\n *\n * Parameters:\n *    bool\n *\n * Return:\n *    ai_spec -- the current ai spec\n */\nuint8_t app_ai_manager_get_current_spec(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_is_need_reboot\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    check if ai manager need to reboot\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool -- true is need to reboot\n */\nbool app_ai_manager_is_need_reboot(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_enable\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager set a ai_spec enable or disable\n *\n * Parameters:\n *    isEnabled -- true is set the spec enable; false is disable\n *    ai_spec -- the ai spec you want to operate\n *\n * Return:\n *    void\n */\nvoid app_ai_manager_enable(bool isEnabled, AI_SPEC_TYPE_E ai_spec);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_set_spec_connected_status\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager set a ai_spec connect status\n *\n * Parameters:\n *    ai_spec -- the ai spec you want to operate\n *    connected -- true is set the spec connected; false is disconnected\n *\n * Return:\n *    void\n */\nvoid app_ai_manager_set_spec_connected_status(AI_SPEC_TYPE_E ai_spec, uint8_t connected);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_get_spec_connected_status\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager get a ai_spec connect status\n *\n * Parameters:\n *    ai_spec -- the ai spec you want to operate\n *\n * Return:\n *    int8_t -- 1 is the spec connected; 0 is disconnected; -1 is invalue\n */\nint8_t app_ai_manager_get_spec_connected_status(uint8_t ai_spec);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_spec_get_status_is_in_invalid\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager get a ai_spec invalue status\n *\n * Parameters:\n *    ai_spec -- the ai spec you want to operate\n *\n * Return:\n *    bool -- true is the spec invalue; false is value\n */\nbool app_ai_manager_spec_get_status_is_in_invalid(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_set_spec_update_flag\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager set spec update flag, when this flag seted, AI entry switch spec status.\n *    And then reboot\n *\n * Parameters:\n *    onOff -- true is AI entry switch spec status\n *\n * Return:\n *    void\n */\nvoid app_ai_manager_set_spec_update_flag(bool onOff);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_get_spec_update_flag\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager get spec update flag\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool -- true is AI entry switch spec status\n */\nbool app_ai_manager_get_spec_update_flag(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_spec_update_start_reboot\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager update spec, start reboot now\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_manager_spec_update_start_reboot(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_manager_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager init\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool\n */\nvoid app_ai_manager_init(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n\n#endif //APP_AI_MANAGER_API_H_\n\n"
  },
  {
    "path": "services/app_ai/inc/app_ai_tws.h",
    "content": "#ifndef APP_AI_TWS_H_\n#define APP_AI_TWS_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#define   APP_AI_TWS_MASTER       0\n#define   APP_AI_TWS_SLAVE        1\n#define   APP_AI_TWS_UNKNOW       0xff\n\n\ntypedef struct\n{\n    bool        is_ai_reboot;\n    uint8_t     box_state;\n} APP_AI_TWS_REBOOT_T;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*---------------------------------------------------------------------------\n *            app_ai_ibrt_role_switch_direct\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai ibrt role switch direct\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool false -- switch direct, don't need prepare\n *         true -- tws role switch need prepare\n */\nbool app_ai_tws_role_switch_direct(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_role_switch_dis_ble\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai disconnect ble before role switch\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool false -- switch direct, don't need prepare\n *         true -- tws role switch need prepare\n */\nbool app_ai_tws_role_switch_dis_ble(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_master_role_switch_prepare\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    master role switch API for AI module\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_master_role_switch_prepare(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_role_switch_prepare\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai role switch prepare, give a time to ibrt for role switch\n *\n * Parameters:\n *    void\n *\n * Return:\n *    uint32_t return the AI now use\n */\nuint32_t app_ai_ibrt_role_switch_prepare(uint32_t *wait_ms);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_role_switch_prepare_done\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    master role switch prepare done, slave receive a masegge from master\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_role_switch_prepare_done(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_role_switch_prepare\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    AI interface controlled tws role switch API\n *\n * Parameters:\n *    wait_ms - time delay before role switch started for AI module\n *\n * Return:\n *    true - need delay\n *    false - not need delay\n */\nuint32_t app_ai_tws_role_switch_prepare(uint32_t *wait_ms);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_role_switch\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    role switch API for AI module\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_role_switch(void);\n\n/*---------------------------------------------------------------------------\n*            app_ai_tws_role_switch_complete\n*---------------------------------------------------------------------------\n*\n*Synopsis:\n*    when ibrt role switch done, call this function\n*\n* Parameters:\n*    void\n*\n* Return:\n*    bool\n*/\nvoid app_ai_tws_role_switch_complete(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_sync_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai tws sync init\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool\n */\nvoid app_ai_tws_sync_init(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_sync_info\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai tws synchronize AI info\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool\n */\nvoid app_ai_tws_sync_ai_info(void);\n\n/*---------------------------------------------------------------------------\n *            ai_manager_sync_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai manager sync init\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool\n */\nvoid ai_manager_sync_init(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_sync_ai_manager_info\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    app ai tws synchronize AI manager info\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool\n */\nvoid app_ai_tws_sync_ai_manager_info(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_gsound_sync_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    gsound related environment initialization for AI interface\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_gsound_sync_init(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_send_cmd_to_peer\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for AI send cmd to peer\n *\n * Parameters:\n *    uint8_t *p_buff -- the cmd pointer\n *    uint16_t length -- the cmd length\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_send_cmd_to_peer(uint8_t *p_buff, uint16_t length);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_rev_peer_cmd_hanlder\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for AI handle the cmd receive from peer\n *\n * Parameters:\n *    uint16_t rsp_seq -- seq number\n *    uint8_t *p_buff -- the cmd pointer\n *    uint16_t length -- the cmd length\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_rev_peer_cmd_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nvoid app_ai_tws_send_cmd_with_rsp_to_peer(uint8_t *p_buff, uint16_t length);\n\nvoid app_ai_tws_send_cmd_rsp_to_peer(uint8_t *p_buff, uint16_t rsp_seq, uint16_t length);\n\nvoid app_ai_tws_rev_peer_cmd_with_rsp_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nvoid app_ai_tws_rev_cmd_rsp_from_peer_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nvoid app_ai_tws_rev_cmd_rsp_timeout_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_init_done\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get tws init status\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool -- true is tws init done\n */\nbool app_ai_tws_init_done(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_link_connected\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get tws connect status\n *\n * Parameters:\n *    void\n *\n * Return:\n *    bool -- true is tws connected\n */\nbool app_ai_tws_link_connected(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_local_address\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get tws local address\n *\n * Parameters:\n *    void\n *\n * Return:\n *    uint8_t -- the address of local\n */\nuint8_t *app_ai_tws_local_address(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_peer_address\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get tws peer address\n *\n * Parameters:\n *    void\n *\n * Return:\n *    uint8_t -- the address of peer\n */\nuint8_t *app_ai_tws_peer_address(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_reboot_record_box_state\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    record the current state of box before reboot\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_reboot_record_box_state(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_reboot_get_box_action\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    return a box action due to the box state before reboot\n *\n * Parameters:\n *    void\n *\n * Return:\n *    uint8_t box action\n */\nuint8_t app_ai_tws_reboot_get_box_action(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_clear_reboot_box_state\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    clear the current state of box before reboot\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_clear_reboot_box_state(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_disconnect_all_bt_connection\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    ai disconnect all bt connection\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_disconnect_all_bt_connection(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_get_local_role\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    get tws local role\n *\n * Parameters:\n *    void\n *\n * Return:\n *    uint8_t -- the role of local\n */\nuint8_t app_ai_tws_get_local_role(void);\n\n/*---------------------------------------------------------------------------\n *            app_ai_tws_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    init tws for ai\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ai_tws_init(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n\n#endif //APP_AI_TWS_H_\n\n"
  },
  {
    "path": "services/app_ai/src/app_ai_algorithm.cpp",
    "content": "#ifdef AI_ALGORITHM_ENABLE\n\n#include \"app_ai_algorithm.h\"\n#include \"audio_dump.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"hal_aud.h\"\n#include \"hal_location.h\"\n#include \"hal_trace.h\"\n#include \"heap_api.h\"\n#include \"norflash_api.h\"\n\n#ifdef BISTO_ENABLED\n#include \"app_voicepath.h\"\n#endif\n\n#ifdef AI_CAPTURE_DATA_AEC\n#include \"echo_canceller.h\"\n#endif\n\n#ifdef AI_AEC_CP_ACCEL\n#include \"cp_accel.h\"\n#define AI_TEXT_SRAM_LOC CP_TEXT_SRAM_LOC\n#define AI_CP_BSS_LOC CP_BSS_LOC\n#else\n#define AI_TEXT_SRAM_LOC\n#define AI_CP_BSS_LOC\n#endif\n\n#define AI_CP_CACHE_ATTR ALIGNED(4) AI_CP_BSS_LOC\n\n#define AI_ABS(x) (x >= 0 ? x : (-x))\n\n#define FRAME_LEN (256)\n#if AI_CAPTURE_CHANNEL_NUM == 2\n#define CAPTURE_CHANNEL_NUM (2)\n#else\n#define CAPTURE_CHANNEL_NUM (1)\n#endif\n#ifdef AI_CAPTURE_DATA_AEC\n#define AUDIO_CHANNEL_NUM (2)\n#else\n#define AUDIO_CHANNEL_NUM (0)\n#endif\n#define CAPTURE_AUDIO_CHANNEL_NUM (CAPTURE_CHANNEL_NUM + AUDIO_CHANNEL_NUM)\n#define MIC_DATA_PROCESS_SIZE                                                  \\\n  (FRAME_LEN * CAPTURE_AUDIO_CHANNEL_NUM * sizeof(short))\n\n#define AI_AEC_CACHE_NUM 6\ntypedef struct {\n  uint8_t cp_data_cache[AI_AEC_CACHE_NUM][MIC_DATA_PROCESS_SIZE];\n  uint8_t cp_data_in_cache_num;\n  uint8_t cp_data_process_cache_num;\n  uint8_t cp_data_out_cache_num;\n  uint8_t cp_data_use_cache_num;\n  uint8_t cp_data_use_max_cache_num;\n  AI_AEC_CACHE_STATE_E cache_state[AI_AEC_CACHE_NUM];\n} AI_AEC_struct;\n\n#define MED_MEM_POOL_SIZE (1024 * 136)\nstatic uint8_t g_medMemPool[MED_MEM_POOL_SIZE] __attribute__((aligned(4)));\n\nosMutexId mic_data_handle_mutex_id = NULL;\nosMutexDef(mic_data_handle_queue_mutex);\n\n#define LOCK_MIC_DATA_HANDLE_QUEUE()                                           \\\n  osMutexWait(mic_data_handle_mutex_id, osWaitForever);\n\n#define UNLOCK_MIC_DATA_HANDLE_QUEUE() osMutexRelease(mic_data_handle_mutex_id);\n\nCQueue mic_data_handle_queue;\nunsigned char mic_data_handle_queue_buff[MIC_DATA_PROCESS_SIZE * 6]\n    __attribute__((aligned(4)));\nunsigned char mic_data_handle_temp_buff[MIC_DATA_PROCESS_SIZE]\n    __attribute__((aligned(4)));\n\n#ifdef AI_CAPTURE_DATA_AEC\nstatic bool ai_aec_inited = false;\nEc2FloatState *speech_aec2float_st1 = NULL;\n\nstatic AI_CP_BSS_LOC short data_mic1[FRAME_LEN] = {0};\nstatic AI_CP_BSS_LOC short echo_ref1[FRAME_LEN] = {0};\nstatic AI_CP_BSS_LOC short echo_ref2[FRAME_LEN] = {0};\nstatic AI_CP_BSS_LOC short aec2_out_buf1[FRAME_LEN] = {0};\n\n#if AI_CAPTURE_CHANNEL_NUM == 2\nEc2FloatState *speech_aec2float_st2 = NULL;\nstatic AI_CP_BSS_LOC short data_mic2[FRAME_LEN] = {0};\nstatic AI_CP_BSS_LOC short aec2_out_buf2[FRAME_LEN] = {0};\n#endif\n\nEc2FloatConfig speech_aec2float_cfg = {\n    .bypass = 0,\n    .hpf_enabled = false,\n    .af_enabled = true,\n    .nlp_enabled = false,\n    .clip_enabled = false,\n    .stsupp_enabled = false,\n    .ns_enabled = false,\n    .cng_enabled = false,\n    .blocks = 6,\n    .delay = 0,\n    .min_ovrd = 2,\n    .target_supp = -40,\n    .noise_supp = -15,\n    .cng_type = 1,\n    .cng_level = -60,\n    .clip_threshold = -20.f,\n    .banks = 32,\n};\n#endif\n\n#ifdef AI_AEC_CP_ACCEL\nstatic AI_CP_CACHE_ATTR AI_AEC_struct ai_aec_struct;\n#endif\n\n#define IGNORE_ECHO_VOL 60\nCP_TEXT_SRAM_LOC\nvoid app_ai_aec_process(uint8_t *buf, uint32_t length) {\n  uint16_t i = 0;\n  short *tmp_in = (short *)buf;\n  float echo_vol = 0;\n\n  for (i = 0; i < FRAME_LEN; i++) {\n    data_mic1[i] = tmp_in[i * CAPTURE_AUDIO_CHANNEL_NUM];\n    echo_ref1[i] = tmp_in[i * CAPTURE_AUDIO_CHANNEL_NUM + 2];\n    echo_ref2[i] = tmp_in[i * CAPTURE_AUDIO_CHANNEL_NUM + 3];\n    echo_vol += AI_ABS((float)echo_ref1[i]) / FRAME_LEN;\n  }\n\n  // TRACE(3, \"%s len %d echo_vol %d\", __func__, length, (uint16_t)echo_vol);\n\n  if (echo_vol < IGNORE_ECHO_VOL) {\n    // TRACE(1, \"%s echo_vol is too small\", __func__);\n    return;\n  }\n\n  ec2float_stereo(speech_aec2float_st1, data_mic1, echo_ref1, echo_ref2,\n                  FRAME_LEN, aec2_out_buf1);\n  for (i = 0; i < FRAME_LEN; i++) {\n    tmp_in[i * CAPTURE_AUDIO_CHANNEL_NUM] = aec2_out_buf1[i];\n  }\n\n#if AI_CAPTURE_CHANNEL_NUM == 2\n  for (i = 0; i < FRAME_LEN; i++) {\n    data_mic2[i] = tmp_in[i * CAPTURE_AUDIO_CHANNEL_NUM + 1];\n    echo_ref1[i] = tmp_in[i + FRAME_LEN * 2];\n    echo_ref2[i] = tmp_in[i + FRAME_LEN * 3];\n  }\n  ec2float_stereo(speech_aec2float_st2, data_mic2, echo_ref1, echo_ref2,\n                  FRAME_LEN, aec2_out_buf2);\n\n  for (i = 0; i < FRAME_LEN; i++) {\n    tmp_in[i * CAPTURE_AUDIO_CHANNEL_NUM + 1] = aec2_out_buf2[i];\n  }\n#endif\n\n#if defined(AUDIO_DEBUG)\n  audio_dump_clear_up();\n  audio_dump_add_channel_data(0, data_mic1, FRAME_LEN);\n  audio_dump_add_channel_data(1, aec2_out_buf1, FRAME_LEN);\n#if AI_CAPTURE_CHANNEL_NUM == 2\n  audio_dump_add_channel_data(2, data_mic2, FRAME_LEN);\n  audio_dump_add_channel_data(3, aec2_out_buf2, FRAME_LEN);\n#endif\n  audio_dump_run();\n#endif\n}\n\nbool app_ai_aec_get_data_from_cache(uint8_t *buf, uint32_t length) {\n  bool ret = false;\n  uint8_t out_cache_num = ai_aec_struct.cp_data_out_cache_num;\n  uint8_t *out_data_cache = ai_aec_struct.cp_data_cache[out_cache_num];\n  AI_AEC_CACHE_STATE_E out_cache_state =\n      ai_aec_struct.cache_state[out_cache_num];\n\n#ifdef AI_AEC_CP_ACCEL\n  // TRACE(2, \"%s cache_num %d state %d\", __func__,\n  // ai_aec_struct.cp_data_out_cache_num, out_cache_state);\n\n  if (AI_AEC_CACHE_PROCESSED == out_cache_state) {\n    memcpy(buf, out_data_cache, length);\n    ai_aec_struct.cache_state[out_cache_num] = AI_AEC_CACHE_IDLE;\n    if (++ai_aec_struct.cp_data_out_cache_num >= AI_AEC_CACHE_NUM) {\n      ai_aec_struct.cp_data_out_cache_num = 0;\n    }\n    ai_aec_struct.cp_data_use_cache_num--;\n    ret = true;\n  } else {\n    ret = false;\n  }\n#else\n  ret = true;\n#endif\n\n  return ret;\n}\n\nvoid app_ai_aec_mic_data_handle(uint8_t *buf, uint32_t length) {\n  uint8_t in_cache_num = ai_aec_struct.cp_data_in_cache_num;\n  uint8_t *in_data_cache = ai_aec_struct.cp_data_cache[in_cache_num];\n  AI_AEC_CACHE_STATE_E in_cache_state = ai_aec_struct.cache_state[in_cache_num];\n\n#ifdef AI_AEC_CP_ACCEL\n  // TRACE(2, \"%s cache_num %d state %d max_num %d\", __func__,\n  // ai_aec_struct.cp_data_in_cache_num, in_cache_state,\n  // ai_aec_struct.cp_data_use_max_cache_num);\n  if (AI_AEC_CACHE_IDLE == in_cache_state) {\n    memcpy(in_data_cache, buf, length);\n    ai_aec_struct.cache_state[in_cache_num] = AI_AEC_CACHE_CACHED;\n    if (++ai_aec_struct.cp_data_in_cache_num >= AI_AEC_CACHE_NUM) {\n      ai_aec_struct.cp_data_in_cache_num = 0;\n    }\n    ai_aec_struct.cp_data_use_cache_num++;\n    if (ai_aec_struct.cp_data_use_cache_num >\n        ai_aec_struct.cp_data_use_max_cache_num) {\n      ai_aec_struct.cp_data_use_max_cache_num =\n          ai_aec_struct.cp_data_use_cache_num;\n    }\n    cp_accel_send_event_mcu2cp(\n        CP_BUILD_ID(CP_TASK_AEC, CP_EVENT_AEC_PROCESSING));\n  } else {\n    TRACE(3, \"%s cache %d state error %d\", __func__, in_cache_num,\n          in_cache_state);\n  }\n#else\n  app_ai_aec_process(buf, length);\n#endif\n\n  return;\n}\n\nvoid app_ai_algorithm_mic_data_handle(uint8_t *buf, uint32_t length) {\n  bool ret = false;\n  uint16_t i = 0;\n  uint32_t queue_len = 0;\n  short *tmp_out = (short *)mic_data_handle_temp_buff;\n\n  // TRACE(2, \"%s len %d\", __func__, length);\n  LOCK_MIC_DATA_HANDLE_QUEUE();\n  if (EnCQueue(&mic_data_handle_queue, (CQItemType *)buf, length) == CQ_ERR) {\n    TRACE(2, \"###far_field_queue overflow, want %d bytes, has %d bytes\\n\",\n          length, AvailableOfCQueue(&mic_data_handle_queue));\n  }\n  queue_len = LengthOfCQueue(&mic_data_handle_queue);\n  UNLOCK_MIC_DATA_HANDLE_QUEUE();\n\n  while (queue_len >= MIC_DATA_PROCESS_SIZE) {\n    LOCK_MIC_DATA_HANDLE_QUEUE();\n    ret = (DeCQueue(&mic_data_handle_queue, mic_data_handle_temp_buff,\n                    MIC_DATA_PROCESS_SIZE) == CQ_OK)\n              ? true\n              : false;\n    queue_len = LengthOfCQueue(&mic_data_handle_queue);\n    UNLOCK_MIC_DATA_HANDLE_QUEUE();\n\n#ifdef AI_CAPTURE_DATA_AEC\n    if (ai_aec_inited && ret) {\n      app_ai_aec_mic_data_handle(mic_data_handle_temp_buff,\n                                 MIC_DATA_PROCESS_SIZE);\n      ret = app_ai_aec_get_data_from_cache(mic_data_handle_temp_buff,\n                                           MIC_DATA_PROCESS_SIZE);\n    }\n#endif\n\n    while (ret) {\n      // ret = other algorithm handle result\n\n      if (ret) {\n        for (i = 0; i < FRAME_LEN; i++) {\n          tmp_out[i] = tmp_out[i * CAPTURE_AUDIO_CHANNEL_NUM];\n        }\n        app_voicepath_enqueue_pcm_data(mic_data_handle_temp_buff,\n                                       FRAME_LEN * 2);\n      }\n\n      if (ai_aec_inited) {\n        ret = app_ai_aec_get_data_from_cache(mic_data_handle_temp_buff,\n                                             MIC_DATA_PROCESS_SIZE);\n      } else {\n        ret = false;\n      }\n    }\n  }\n}\n\n#ifdef AI_AEC_CP_ACCEL\nAI_TEXT_SRAM_LOC\nvoid cp_aec_data_process(void) {\n  uint8_t process_cache_num = ai_aec_struct.cp_data_process_cache_num;\n  uint8_t *data_cache = ai_aec_struct.cp_data_cache[process_cache_num];\n  AI_AEC_CACHE_STATE_E process_cache_state =\n      ai_aec_struct.cache_state[process_cache_num];\n\n  while (AI_AEC_CACHE_CACHED == process_cache_state) {\n    app_ai_aec_process(data_cache, MIC_DATA_PROCESS_SIZE);\n    ai_aec_struct.cache_state[process_cache_num] = AI_AEC_CACHE_PROCESSED;\n    if (++ai_aec_struct.cp_data_process_cache_num >= AI_AEC_CACHE_NUM) {\n      ai_aec_struct.cp_data_process_cache_num = 0;\n    }\n    process_cache_num = ai_aec_struct.cp_data_process_cache_num;\n    data_cache = ai_aec_struct.cp_data_cache[process_cache_num];\n    process_cache_state = ai_aec_struct.cache_state[process_cache_num];\n  }\n  // else\n  //{\n  // TRACE(3, \"%s cache state %d error %d\", __func__, process_cache_num,\n  // process_cache_state);\n  //}\n}\n\nAI_TEXT_SRAM_LOC\nunsigned int cp_aec_main(uint8_t event) {\n  switch (event) {\n  case CP_EVENT_AEC_PROCESSING:\n    cp_aec_data_process();\n    break;\n  default:\n    break;\n  }\n  return 0;\n}\n\nstatic struct cp_task_desc TASK_DESC_AEC = {CP_ACCEL_STATE_CLOSED, cp_aec_main,\n                                            NULL, NULL, NULL};\nvoid cp_aec_init(void) {\n  uint8_t i = 0;\n  TRACE(2, \"%s ai_aec_inited %d\", __func__, ai_aec_inited);\n\n  if (!ai_aec_inited) {\n    memset(&ai_aec_struct, 0, sizeof(ai_aec_struct));\n    ai_aec_struct.cp_data_in_cache_num = 0;\n    ai_aec_struct.cp_data_process_cache_num = 0;\n    ai_aec_struct.cp_data_out_cache_num = 0;\n    for (i = 0; i < AI_AEC_CACHE_NUM; i++) {\n      ai_aec_struct.cache_state[i] = AI_AEC_CACHE_IDLE;\n    }\n    norflash_api_flush_disable(NORFLASH_API_USER_CP,\n                               (uint32_t)cp_accel_init_done);\n    cp_accel_open(CP_TASK_AEC, &TASK_DESC_AEC);\n    while (cp_accel_init_done() == false) {\n      hal_sys_timer_delay_us(100);\n    }\n    norflash_api_flush_enable(NORFLASH_API_USER_CP);\n    ai_aec_inited = true;\n  }\n}\n\nvoid cp_aec_deinit(void) {\n  TRACE(2, \"%s ai_aec_inited %d\", __func__, ai_aec_inited);\n\n  if (ai_aec_inited) {\n    memset(&ai_aec_struct, 0, sizeof(ai_aec_struct));\n    ai_aec_inited = false;\n    cp_accel_close(CP_TASK_AEC);\n  }\n}\n#endif\n\nvoid app_ai_algorithm_init(void) {\n  TRACE(1, \"%s\", __func__);\n\n  med_heap_init(&g_medMemPool[0], MED_MEM_POOL_SIZE);\n\n#if defined(AUDIO_DEBUG)\n  audio_dump_init(FRAME_LEN, sizeof(short), 4);\n#endif\n\n#ifdef AI_CAPTURE_DATA_AEC\n  // TRACE(\"init AEC2\");\n  speech_aec2float_st1 =\n      ec2float_create(AUD_SAMPRATE_16000, FRAME_LEN, &speech_aec2float_cfg);\n#if AI_CAPTURE_CHANNEL_NUM == 2\n  speech_aec2float_st2 =\n      ec2float_create(AUD_SAMPRATE_16000, FRAME_LEN, &speech_aec2float_cfg);\n#endif\n#ifdef AI_AEC_CP_ACCEL\n  ai_aec_inited = false;\n#else\n  ai_aec_inited = true;\n#endif\n#endif\n\n  if (mic_data_handle_mutex_id == NULL) {\n    mic_data_handle_mutex_id =\n        osMutexCreate((osMutex(mic_data_handle_queue_mutex)));\n    if (mic_data_handle_mutex_id == NULL) {\n      ASSERT(0, \"[%s] ERROR: async_enc_queue_mutex_id fail!\", __func__);\n    }\n  }\n  // TRACE(\"line %d\", __LINE__);\n  InitCQueue(&mic_data_handle_queue, sizeof(mic_data_handle_queue_buff),\n             mic_data_handle_queue_buff);\n}\n\n#endif // AI_ALGORITHM_ENABLE\n"
  },
  {
    "path": "services/app_ai/src/app_ai_if.cpp",
    "content": "#include \"app_ai_if.h\"\n#include \"app_ai_ble.h\"\n#include \"app_ai_if_config.h\"\n#include \"app_ai_if_custom_ui.h\"\n#include \"app_ai_if_thirdparty.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_ai_tws.h\"\n#include \"app_audio.h\"\n#include \"app_dip.h\"\n#include \"app_through_put.h\"\n#include \"cmsis_os.h\"\n#include \"dip_api.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord_bt.h\"\n\n#ifdef BLE_ENABLE\n#include \"app_ble_mode_switch.h\"\n#endif\n\n#ifdef __AI_VOICE__\n#include \"ai_control.h\"\n#include \"ai_manager.h\"\n#include \"ai_thread.h\"\n#include \"app_ai_voice.h\"\n#endif\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom.h\"\n#include \"gsound_custom_bt.h\"\n#endif\n\n#ifdef ANC_APP\n#include \"app_anc.h\"\n#endif\n\n#define CASE_S(s)                                                              \\\n  case s:                                                                      \\\n    return \"[\" #s \"]\";\n#define CASE_D()                                                               \\\n  default:                                                                     \\\n    return \"[INVALID]\";\n\nAI_CAPTURE_BUFFER_T app_ai_if_capture_buf;\n\nconst char *ai_spec_type2str(AI_SPEC_TYPE_E ai_spec) {\n  switch (ai_spec) {\n    CASE_S(AI_SPEC_INIT)\n    CASE_S(AI_SPEC_GSOUND)\n    CASE_S(AI_SPEC_AMA)\n    CASE_S(AI_SPEC_BES)\n    CASE_S(AI_SPEC_BAIDU)\n    CASE_S(AI_SPEC_TENCENT)\n    CASE_S(AI_SPEC_ALI)\n    CASE_S(AI_SPEC_COMMON)\n    CASE_D()\n  }\n}\n\nvoid app_ai_key_event_handle(void *param1, uint32_t param2) {\n#if defined(__AI_VOICE__)\n\n  if (app_ai_dont_have_mobile_connect()) {\n    TRACE(1, \"%s no mobile connected\", __func__);\n    return;\n  }\n\n#ifdef PUSH_AND_HOLD_ENABLED\n  app_ai_set_wake_up_type(TYPE__PRESS_AND_HOLD);\n#else\n  app_ai_set_wake_up_type(TYPE__TAP);\n#endif\n\n  if (0 == ai_function_handle(CALLBACK_KEY_EVENT_HANDLE, param1, param2)) {\n    if (app_ai_is_use_thirdparty()) {\n      app_ai_if_thirdparty_event_handle(THIRDPARTY_FUNC_KWS,\n                                        THIRDPARTY_AI_PROVIDE_SPEECH);\n    }\n  }\n#endif\n}\n\nbool ai_if_is_ai_stream_mic_open(void) {\n  bool mic_open = false;\n\n#ifdef __AI_VOICE__\n  mic_open = app_ai_is_stream_mic_open();\n#endif\n\n  return mic_open;\n}\n\nuint8_t app_ai_if_get_ble_connection_index(void) {\n  uint8_t ble_connection_index = 0xFF;\n\n#ifdef __AI_VOICE__\n  ble_connection_index = app_ai_ble_get_connection_index();\n#endif\n\n  return ble_connection_index;\n}\n\nuint32_t app_ai_if_get_ai_spec(void) {\n  uint32_t ai_spec = AI_SPEC_INIT;\n\n#ifdef __AMA_VOICE__\n  ai_spec = AI_SPEC_AMA;\n#elif defined(__DMA_VOICE__)\n  ai_spec = AI_SPEC_BAIDU;\n#elif defined(__SMART_VOICE__)\n  ai_spec = AI_SPEC_BES;\n#elif defined(__TENCENT_VOICE__)\n  ai_spec = AI_SPEC_TENCENT;\n#elif defined(__GMA_VOICE__)\n  ai_spec = AI_SPEC_ALI;\n#elif defined(__CUSTOMIZE_VOICE__)\n  ai_spec = AI_SPEC_COMMON;\n#elif defined(__DUAL_MIC_RECORDING__)\n  ai_spec = AI_SPEC_RECORDING;\n#endif\n\n  return ai_spec;\n}\n\nstatic POSSIBLY_UNUSED void app_ai_if_mempool_init(void) {\n  uint8_t *buf = NULL;\n  app_capture_audio_mempool_get_buff(&buf, APP_AI_IF_CAPTURE_BUFFER_SIZE);\n\n  memset((uint8_t *)buf, 0, APP_AI_IF_CAPTURE_BUFFER_SIZE);\n\n  app_ai_if_capture_buf.buff = buf;\n  app_ai_if_capture_buf.buff_size_total = APP_AI_IF_CAPTURE_BUFFER_SIZE;\n  app_ai_if_capture_buf.buff_size_used = 0;\n  app_ai_if_capture_buf.buff_size_free = APP_AI_IF_CAPTURE_BUFFER_SIZE;\n\n  TRACE(3, \"%s buf %p size %d\", __func__, buf, APP_AI_IF_CAPTURE_BUFFER_SIZE);\n}\n\nvoid app_ai_if_mempool_deinit(void) {\n  TRACE(2, \"%s size %d\", __func__, app_ai_if_capture_buf.buff_size_total);\n\n  memset((uint8_t *)app_ai_if_capture_buf.buff, 0,\n         app_ai_if_capture_buf.buff_size_total);\n\n  app_ai_if_capture_buf.buff_size_used = 0;\n  app_ai_if_capture_buf.buff_size_free = app_ai_if_capture_buf.buff_size_total;\n}\n\nvoid app_ai_if_mempool_get_buff(uint8_t **buff, uint32_t size) {\n  uint32_t buff_size_free;\n\n  buff_size_free = app_ai_if_capture_buf.buff_size_free;\n\n  if (size % 4) {\n    size = size + (4 - size % 4);\n  }\n\n  TRACE(3, \"%s free %d to allocate %d\", __func__, buff_size_free, size);\n\n  ASSERT(size <= buff_size_free, \"[%s] size = %d > free size = %d\", __func__,\n         size, buff_size_free);\n\n  *buff = app_ai_if_capture_buf.buff + app_ai_if_capture_buf.buff_size_used;\n\n  app_ai_if_capture_buf.buff_size_used += size;\n  app_ai_if_capture_buf.buff_size_free -= size;\n\n  TRACE(3, \"AI allocate %d, now used %d left %d\", size,\n        app_ai_if_capture_buf.buff_size_used,\n        app_ai_if_capture_buf.buff_size_free);\n}\n\nvoid app_ai_if_mobile_connect_handle(bt_bdaddr_t *_addr) {\n  MOBILE_CONN_TYPE_E type = MOBILE_CONNECT_IDLE;\n  uint16_t vend_id = 0;\n  uint16_t vend_id_source = 0;\n\n  btif_dip_get_record_vend_id_and_source(_addr, &vend_id, &vend_id_source);\n  TRACE(3, \"%s vend_id 0x%x vend_id_source 0x%x\", __func__, vend_id,\n        vend_id_source);\n  if (vend_id) {\n    type = btif_dip_check_is_ios_by_vend_id(vend_id, vend_id_source)\n               ? MOBILE_CONNECT_IOS\n               : MOBILE_CONNECT_ANDROID;\n#ifdef __AI_VOICE__\n    app_ai_mobile_connect_handle(type, _addr);\n#endif\n#ifdef BISTO_ENABLED\n    gsound_custom_bt_link_connected_handler(_addr->address);\n    gsound_mobile_type_get_callback(type);\n#endif\n  }\n\n#ifdef BLE_ENABLE\n  app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n#endif\n}\n\nvoid app_ai_voice_init(void) {\n#ifdef __AI_VOICE__\n  uint32_t ai_spec = app_ai_if_get_ai_spec();\n\n  app_ai_manager_init();\n  if (ai_spec != AI_SPEC_INIT) {\n    ai_open(ai_spec);\n    app_ai_tws_init();\n\n#ifdef OPUS_IN_OVERLAY\n    app_ai_set_opus_in_overlay(true);\n#endif\n\n#if VOB_ENCODING_ALGORITHM == ENCODING_ALGORITHM_OPUS\n    app_ai_set_encode_type(ENCODING_ALGORITHM_OPUS);\n#elif VOB_ENCODING_ALGORITHM == ENCODING_ALGORITHM_SBC\n    app_ai_set_encode_type(ENCODING_ALGORITHM_SBC);\n#else\n    app_ai_set_encode_type(NO_ENCODING);\n#endif\n\n#ifdef AI_32KBPS_VOICE\n    app_ai_set_use_ai_32kbps_voice(true);\n#endif\n\n#ifdef NO_LOCAL_START_TONE\n    app_ai_set_local_start_tone(false);\n#endif\n\n    app_ai_if_custom_init();\n\n#ifdef __THROUGH_PUT__\n    app_throughput_test_init();\n#endif\n  }\n\n  app_capture_audio_mempool_init();\n\n#ifdef __THIRDPARTY\n  app_ai_if_thirdparty_init();\n#endif\n\n  app_ai_if_mempool_init();\n#endif\n}\n\nstatic bool isMusicOrPromptOnGoing = false;\nstatic uint32_t musicOrPromptSampleRate;\n\nvoid app_ai_if_inform_music_or_prompt_status(bool isOn, uint32_t sampleRate) {\n  isMusicOrPromptOnGoing = isOn;\n  musicOrPromptSampleRate = sampleRate;\n}\n\nbool app_ai_if_is_music_or_prompt_ongoing(void) {\n#ifdef ANC_APP\n  return isMusicOrPromptOnGoing || app_anc_is_on();\n#else\n  return isMusicOrPromptOnGoing;\n#endif\n}\n\nuint32_t app_ai_if_get_music_or_prompt_sample_rate(void) {\n#ifdef ANC_APP\n  if (isMusicOrPromptOnGoing) {\n    return musicOrPromptSampleRate;\n  } else if (app_anc_is_on()) {\n    return app_anc_get_sample_rate();\n  } else {\n    return 0;\n  }\n#else\n  return musicOrPromptSampleRate;\n#endif\n}\n\nextern void alexa_wwe_pre_music_or_prompt_check(void);\nextern \"C\" void app_voicepath_pre_music_or_prompt_check(void);\n\nvoid app_ai_if_pre_music_or_prompt_check(void) {\n#ifdef __ALEXA_WWE_LITE\n  alexa_wwe_pre_music_or_prompt_check();\n#endif\n\n#ifdef BISTO_ENABLED\n  app_voicepath_pre_music_or_prompt_check();\n#endif\n}\n"
  },
  {
    "path": "services/app_ai/src/app_ai_if_custom_ui.cpp",
    "content": "#include \"app_ai_if_custom_ui.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_if_config.h\"\n#include \"app_ai_tws.h\"\n#include \"app_ble_mode_switch.h\"\n#include \"app_spp.h\"\n#include \"app_through_put.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#endif\n#include \"app_status_ind.h\"\n\n#ifdef __AI_VOICE__\n#include \"ai_control.h\"\n#include \"ai_thread.h\"\n#include \"ai_transport.h\"\n#endif\n\n#ifdef __AI_VOICE__\nstatic void app_ai_if_custom_ui_global_handler_ind(uint32_t cmd, void *param1,\n                                                   uint32_t param2) {\n  switch (cmd) {\n  case AI_CUSTOM_CODE_AI_ROLE_SWITCH:\n    break;\n\n  case AI_CUSTOM_CODE_CMD_RECEIVE:\n#ifdef __THROUGH_PUT__\n    app_throughput_receive_cmd(param1, param2);\n#endif\n    break;\n\n  case AI_CUSTOM_CODE_DATA_RECEIVE:\n    break;\n\n  case AI_CUSTOM_CODE_AI_CONNECT:\n    break;\n\n  case AI_CUSTOM_CODE_AI_DISCONNECT:\n#ifdef __THROUGH_PUT__\n    app_stop_throughput_test();\n#endif\n    break;\n\n  case AI_CUSTOM_CODE_UPDATE_MTU:\n    break;\n\n  case AI_CUSTOM_CODE_WAKE_UP:\n    break;\n\n  case AI_CUSTOM_CODE_START_SPEECH:\n    break;\n\n  case AI_CUSTOM_CODE_ENDPOINT_SPEECH:\n    break;\n\n  case AI_CUSTOM_CODE_STOP_SPEECH:\n    break;\n  case AI_CUSTOM_CODE_DATA_SEND_DONE:\n#ifdef __THROUGH_PUT__\n    app_throughput_cmd_send_done(param1, param2);\n#endif\n    break;\n\n  case AI_CUSTOM_CODE_KEY_EVENT_HANDLE:\n    break;\n\n  case AI_CUSTOM_CODE_AI_ROLE_SWITCH_COMPLETE:\n    break;\n\n  case AI_CUSTOM_CODE_MOBILE_CONNECT:\n    break;\n\n  case AI_CUSTOM_CODE_MOBILE_DISCONNECT:\n    break;\n\n  case AI_CUSTOM_CODE_SETUP_COMPLETE:\n    break;\n\n  default:\n    break;\n  }\n}\n#endif\n\nbool app_ai_if_custom_ui_send_cmd(uint8_t *cmd_buf, uint16_t cmd_len) {\n  osStatus status = (osStatus)osErrorValue;\n#ifdef __AI_VOICE__\n  TRACE(1, \"%s\", __func__);\n\n  uint8_t send_buf[L2CAP_MTU] = {0};\n  uint16_t *output_size_p = NULL;\n  uint8_t *output_buf_p = NULL;\n\n  output_size_p = (uint16_t *)send_buf;\n  output_buf_p = &send_buf[AI_CMD_CODE_SIZE];\n\n  memcpy(output_buf_p, cmd_buf, cmd_len);\n  *output_size_p = cmd_len;\n\n  if (ai_transport_cmd_put(send_buf, (cmd_len + AI_CMD_CODE_SIZE))) {\n    status = ai_mailbox_put(SIGN_AI_TRANSPORT, cmd_len);\n  }\n#endif\n  return (osOK == status);\n}\n\nvoid app_ai_if_custom_init(void) {\n#ifdef __AI_VOICE__\n  app_ai_register_ui_global_handler_ind(app_ai_if_custom_ui_global_handler_ind);\n#endif\n}\n"
  },
  {
    "path": "services/app_ai/src/app_ai_if_gsound.cpp",
    "content": "#include \"app_ai_if_gsound.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom_service.h\"\n#endif\n\nvoid app_ai_if_gsound_service_enable_switch(bool onOff) {\n#ifdef BISTO_ENABLED\n  gsound_service_enable_switch(onOff);\n#endif\n}\n"
  },
  {
    "path": "services/app_ai/src/app_ai_if_thirdparty.cpp",
    "content": "#include \"app_ai_if_thirdparty.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_ai_tws.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_thirdparty.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"spp_api.h\"\n\n#ifdef __AI_VOICE__\n#include \"ai_control.h\"\n#include \"ai_manager.h\"\n#include \"ai_thread.h\"\n#include \"app_ai_voice.h\"\n#endif\n\nuint8_t\n    app_ai_if_thirdparty_mempool_buf[APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE];\nTHIRDPARTY_AI_MEMPOOL_BUFFER_T app_ai_if_thirdparty_mempool_buf_t;\n\nPOSSIBLY_UNUSED void app_ai_if_thirdparty_mempool_init(void) {\n  memset((uint8_t *)app_ai_if_thirdparty_mempool_buf, 0,\n         APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE);\n\n  app_ai_if_thirdparty_mempool_buf_t.buff = app_ai_if_thirdparty_mempool_buf;\n  app_ai_if_thirdparty_mempool_buf_t.buff_size_total =\n      APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE;\n  app_ai_if_thirdparty_mempool_buf_t.buff_size_used = 0;\n  app_ai_if_thirdparty_mempool_buf_t.buff_size_free =\n      APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE;\n\n  TRACE(3, \"%s buf %p size %d\", __func__, app_ai_if_thirdparty_mempool_buf,\n        APP_AI_IF_THIRDPARTY_MEMPOOL_BUFFER_SIZE);\n}\n\nvoid app_ai_if_thirdparty_mempool_deinit(void) {\n  TRACE(2, \"%s size %d\", __func__,\n        app_ai_if_thirdparty_mempool_buf_t.buff_size_total);\n\n  memset((uint8_t *)app_ai_if_thirdparty_mempool_buf_t.buff, 0,\n         app_ai_if_thirdparty_mempool_buf_t.buff_size_total);\n\n  app_ai_if_thirdparty_mempool_buf_t.buff_size_used = 0;\n  app_ai_if_thirdparty_mempool_buf_t.buff_size_free =\n      app_ai_if_thirdparty_mempool_buf_t.buff_size_total;\n}\n\nvoid app_ai_if_thirdparty_mempool_get_buff(uint8_t **buff, uint32_t size) {\n  uint32_t buff_size_free;\n\n  buff_size_free = app_ai_if_thirdparty_mempool_buf_t.buff_size_free;\n\n  if (size % 4) {\n    size = size + (4 - size % 4);\n  }\n\n  TRACE(3, \"%s free %d to allocate %d\", __func__, buff_size_free, size);\n\n  ASSERT(size <= buff_size_free, \"[%s] size = %d > free size = %d\", __func__,\n         size, buff_size_free);\n\n  *buff = app_ai_if_thirdparty_mempool_buf_t.buff +\n          app_ai_if_thirdparty_mempool_buf_t.buff_size_used;\n\n  app_ai_if_thirdparty_mempool_buf_t.buff_size_used += size;\n  app_ai_if_thirdparty_mempool_buf_t.buff_size_free -= size;\n\n  TRACE(3, \"thirdparty allocate %d, now used %d left %d\", size,\n        app_ai_if_thirdparty_mempool_buf_t.buff_size_used,\n        app_ai_if_thirdparty_mempool_buf_t.buff_size_free);\n}\n\nvoid app_ai_if_thirdparty_start_stream_by_app_audio_manager(void) {\n#ifdef __THIRDPARTY\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n                                BT_STREAM_THIRDPARTY_VOICE, 0, 0);\n#endif\n}\n\nvoid app_ai_if_thirdparty_stop_stream_by_app_audio_manager(void) {\n#ifdef __THIRDPARTY\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP,\n                                BT_STREAM_THIRDPARTY_VOICE, 0, 0);\n#endif\n}\n\nint app_ai_if_thirdparty_event_handle(THIRDPARTY_FUNC_ID funcId,\n                                      THIRDPARTY_EVENT_TYPE event_type) {\n  int ret = 0;\n#ifdef __THIRDPARTY\n  ret = app_thirdparty_specific_lib_event_handle(funcId, event_type);\n#endif\n  return ret;\n}\n\nvoid app_ai_if_thirdparty_init(void) {\n#if defined(__THIRDPARTY) && defined(__AI_VOICE__)\n  app_ai_set_use_thirdparty(true);\n  app_ai_if_thirdparty_mempool_init();\n  app_thirdparty_callback_init(THIRDPARTY_DATA_COME_CALLBACK,\n                               app_ai_voice_thirdparty_data_come_callback);\n  app_thirdparty_callback_init(THIRDPARTY_WAKE_UP_CALLBACK,\n                               app_ai_voice_thirdparty_wake_up_callback);\n  app_thirdparty_callback_init(THIRDPARTY_START_SPEECH_CALLBACK,\n                               app_ai_voice_thirdparty_start_speech_callback);\n  app_thirdparty_callback_init(THIRDPARTY_STOP_SPEECH_CALLBACK,\n                               app_ai_voice_thirdparty_stop_speech_callback);\n  app_ai_if_thirdparty_event_handle(THIRDPARTY_FUNC_KWS, THIRDPARTY_INIT);\n#endif\n}\n"
  },
  {
    "path": "services/app_ai/src/app_ai_manager_api.cpp",
    "content": "#include \"app_ai_manager_api.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_tws.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n\n#ifdef __AI_VOICE__\n#include \"ai_manager.h\"\n#include \"ai_thread.h\"\n#endif\n\nbool app_ai_manager_is_in_multi_ai_mode(void) {\n  bool ret = false;\n#ifdef IS_MULTI_AI_ENABLED\n  ret = true;\n#endif\n  return ret;\n}\n\nbool app_ai_manager_voicekey_is_enable(void) {\n  bool ret = true;\n#ifdef IS_MULTI_AI_ENABLED\n  ret = ai_voicekey_is_enable();\n#endif\n  return ret;\n}\n\nvoid app_ai_manager_voicekey_save_status(bool state) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_voicekey_save_status(state);\n#endif\n}\n\nvoid app_ai_manager_switch_spec(AI_SPEC_TYPE_E ai_spec) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_switch_spec(ai_spec);\n#endif\n}\n\nvoid app_ai_manager_set_current_spec(AI_SPEC_TYPE_E ai_spec) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_set_current_spec(ai_spec);\n#endif\n}\n\nuint8_t app_ai_manager_get_current_spec(void) {\n  uint8_t ret = -1;\n#ifdef IS_MULTI_AI_ENABLED\n  ret = ai_manager_get_current_spec();\n#endif\n  return ret;\n}\n\nbool app_ai_manager_is_need_reboot(void) {\n  bool ret = false;\n#ifdef IS_MULTI_AI_ENABLED\n  ret = ai_manager_is_need_reboot();\n#endif\n  return ret;\n}\n\nvoid app_ai_manager_enable(bool isEnabled, AI_SPEC_TYPE_E ai_spec) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_enable(isEnabled, ai_spec);\n#endif\n}\n\nvoid app_ai_manager_set_spec_connected_status(AI_SPEC_TYPE_E ai_spec,\n                                              uint8_t connected) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_set_spec_connected_status(ai_spec, connected);\n#endif\n}\n\nint8_t app_ai_manager_get_spec_connected_status(uint8_t ai_spec) {\n  uint8_t ret = -1;\n#ifdef IS_MULTI_AI_ENABLED\n  ret = ai_manager_get_spec_connected_status(ai_spec);\n#endif\n  return ret;\n}\n\nbool app_ai_manager_spec_get_status_is_in_invalid(void) {\n  bool ret = true;\n#ifdef IS_MULTI_AI_ENABLED\n  ret = ai_manager_spec_get_status_is_in_invalid();\n#endif\n  return ret;\n}\n\nvoid app_ai_manager_set_spec_update_flag(bool onOff) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_set_spec_update_flag(onOff);\n#endif\n}\n\nbool app_ai_manager_get_spec_update_flag(void) {\n  bool ret = false;\n#ifdef IS_MULTI_AI_ENABLED\n  ret = ai_manager_get_spec_update_flag();\n#endif\n  return ret;\n}\n\nvoid app_ai_manager_spec_update_start_reboot(void) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_spec_update_start_reboot();\n#endif\n}\n\nvoid app_ai_manager_init(void) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_init();\n#endif\n}\n"
  },
  {
    "path": "services/app_ai/src/app_ai_tws.cpp",
    "content": "#include \"app_ai_tws.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_if_thirdparty.h\"\n#include \"app_ble_mode_switch.h\"\n#include \"cmsis_os.h\"\n#include \"hal_location.h\"\n#include \"hal_trace.h\"\n#include \"spp_api.h\"\n\n#ifdef __AI_VOICE__\n#include \"ai_control.h\"\n#include \"ai_manager.h\"\n#include \"ai_thread.h\"\n#include \"app_ai_voice.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_if.h\"\n#endif\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom.h\"\n#include \"gsound_custom_bt.h\"\n#include \"gsound_custom_tws.h\"\n#endif\n\n#define CASE_S(s)                                                              \\\n  case s:                                                                      \\\n    return \"[\" #s \"]\";\n#define CASE_D()                                                               \\\n  default:                                                                     \\\n    return \"[INVALID]\";\n#define APP_AI_ROLE_SWITCH_TIME_IN_MS (500)\n\nAPP_AI_TWS_REBOOT_T REBOOT_CUSTOM_PARAM_LOC app_ai_tws_reboot = {false, 0xFF};\n\n#if defined(IBRT) && defined(__AI_VOICE__)\nstatic void app_ai_role_switch_timeout_cb(void const *n);\nosTimerDef(APP_AI_ROLE_SWITCH_TIMER, app_ai_role_switch_timeout_cb);\nosTimerId app_ai_role_switch_timer_id = NULL;\n\nstatic void app_ai_role_switch_timeout_cb(void const *n) {\n  app_ai_tws_role_switch_dis_ble();\n}\n\n#define APP_AI_BLE_DISC_TIME_IN_MS (100)\nstatic void app_ai_ble_disc_timeout_cb(void const *n);\nosTimerDef(APP_AI_BLE_DISC_TIMER, app_ai_ble_disc_timeout_cb);\nosTimerId app_ai_ble_disc_timer_id = NULL;\n\nextern \"C\" bool app_ai_ble_is_connected(void);\nextern \"C\" uint16_t app_ai_ble_get_conhdl(void);\n\nstatic void app_ai_ble_disc_timeout_cb(void const *n) {\n  TRACE(1, \"%s\", __func__);\n\n  app_ai_tws_role_switch_direct();\n}\n#endif\n\nvoid app_ai_let_slave_continue_roleswitch(void) {\n#if defined(IBRT) && defined(__AI_VOICE__)\n  uint8_t role = app_ai_get_ai_spec();\n  tws_ctrl_send_cmd(APP_TWS_CMD_LET_SLAVE_CONTINUE_RS, &role, 1);\n#endif\n}\n\nbool app_ai_tws_role_switch_direct(void) {\n  bool ret = false;\n#if defined(IBRT) && defined(__AI_VOICE__)\n  if (!app_ai_is_role_switching()) {\n    TRACE(1, \"%s isn't switching now\", __func__);\n    return ret;\n  }\n\n  TRACE(2, \"%s initiative %d\", __func__, app_ai_is_initiative_switch());\n  if (app_ai_is_role_switch_direct()) {\n    TRACE(1, \"%s has done\", __func__);\n    return ret;\n  }\n  app_ai_set_role_switch_direct(true);\n\n  osTimerStop(app_ai_role_switch_timer_id);\n  osTimerStop(app_ai_ble_disc_timer_id);\n\n  if (app_ai_is_initiative_switch()) {\n    app_ibrt_if_tws_switch_prepare_done_in_bt_thread(IBRT_ROLE_SWITCH_USER_AI,\n                                                     app_ai_get_ai_spec());\n    return ret;\n  } else {\n    app_ai_let_slave_continue_roleswitch();\n    // ret = true;\n  }\n#endif\n\n  return ret;\n}\n\nbool app_ai_tws_role_switch_dis_ble(void) {\n  bool ret = false;\n#if defined(IBRT) && defined(__AI_VOICE__)\n  uint16_t ble_Conhandle = 0;\n  bool ble_connected = app_ai_ble_is_connected();\n  TRACE(2, \"%s ble_connected %d\", __func__, ble_connected);\n\n  osTimerStop(app_ai_role_switch_timer_id);\n\n  if (ble_connected) {\n    // disconnect ble connection if existing\n    ble_Conhandle = app_ai_ble_get_conhdl();\n    bt_drv_reg_op_ble_sup_timeout_set(\n        ble_Conhandle,\n        15); // fix ble disconnection takes long time:connSupervisionTime=150ms\n    app_ble_disconnect_all();\n    osTimerStart(app_ai_ble_disc_timer_id, APP_AI_BLE_DISC_TIME_IN_MS);\n    ret = true;\n  } else {\n    ret = app_ai_tws_role_switch_direct();\n  }\n#endif\n\n  return ret;\n}\n\n#if defined(IBRT) && defined(__AI_VOICE__)\nstatic void app_ai_tws_slave_request_master_role_switch(void) {\n  TRACE(3, \"%s complete %d switching %d\", __func__, app_ai_is_setup_complete(),\n        app_ai_is_role_switching());\n\n  uint8_t role = app_ai_get_ai_spec();\n  tws_ctrl_send_cmd(APP_TWS_CMD_LET_MASTER_PREPARE_RS, &role, 1);\n  osTimerStart(app_ai_ble_disc_timer_id,\n               APP_AI_ROLE_SWITCH_TIME_IN_MS + APP_AI_BLE_DISC_TIME_IN_MS);\n}\n#endif\n\nbool app_ai_tws_master_role_switch(void) {\n  bool ret = false;\n#if defined(IBRT) && defined(__AI_VOICE__)\n  TRACE(3, \"%s complete %d switching %d\", __func__, app_ai_is_setup_complete(),\n        app_ai_is_role_switching());\n\n  if (app_ai_is_use_thirdparty()) {\n    app_ai_if_thirdparty_stop_stream_by_app_audio_manager();\n    app_ai_if_thirdparty_event_handle(THIRDPARTY_FUNC_KWS,\n                                      THIRDPARTY_AI_DISCONNECT);\n  }\n\n  app_ai_set_role_switching(true);\n  osTimerStart(app_ai_role_switch_timer_id, APP_AI_ROLE_SWITCH_TIME_IN_MS);\n  if (app_ai_is_stream_running() ||\n      (app_ai_get_speech_state() != AI_SPEECH_STATE__IDLE)) {\n    TRACE(2, \"%s stream runing %d\", __func__, app_ai_is_stream_running());\n\n    ai_function_handle(CALLBACK_STOP_SPEECH, NULL, 0);\n  }\n\n  if (ERROR_RETURN != ai_function_handle(API_AI_ROLE_SWITCH, NULL, 0)) {\n    return true;\n  }\n\n  ret = app_ai_tws_role_switch_dis_ble();\n#endif\n\n  return ret;\n}\n\nbool app_ai_role_switch(void) {\n  bool ret = false;\n#ifdef __AI_VOICE__\n  TRACE(3, \"%s complete %d switching %d\", __func__, app_ai_is_setup_complete(),\n        app_ai_is_role_switching());\n\n  if (app_ai_is_role_switching()) {\n    TRACE(1, \"%s is switching now\", __func__);\n    return ret;\n  }\n  app_ai_set_role_switching(true);\n  app_ai_set_initiative_switch(true);\n\n  if (!app_ai_is_setup_complete() && !app_ai_is_peer_setup_complete()) {\n    TRACE(1, \"%s ai not setup complete\", __func__);\n    return ret;\n  }\n\n#if defined(IBRT)\n  if (app_ai_tws_get_local_role() == APP_AI_TWS_MASTER) {\n    ret = app_ai_tws_master_role_switch();\n  } else {\n    app_ai_tws_slave_request_master_role_switch();\n    ret = true;\n  }\n#endif\n#endif\n\n  return ret;\n}\n\nuint32_t app_ai_tws_role_switch_prepare(uint32_t *wait_ms) {\n  uint32_t ret = 0;\n\n#ifdef BISTO_ENABLED\n  *wait_ms = 800;\n  ret |= (1 << AI_SPEC_GSOUND);\n#endif\n\n#ifdef __AI_VOICE__\n  if (app_ai_role_switch()) {\n    *wait_ms = 800;\n    ret |= (1 << app_ai_get_ai_spec());\n  }\n#endif\n\n  TRACE(3, \"[%s] ret=%d, wait_ms=%d\", __func__, ret, *wait_ms);\n  return ret;\n}\n\nvoid app_ai_tws_master_role_switch_prepare(void) {\n#ifdef __AI_VOICE__\n  app_ai_tws_master_role_switch();\n#endif\n}\n\nvoid app_ai_tws_role_switch_prepare_done(void) {\n#if defined(IBRT) && defined(__AI_VOICE__)\n  TRACE(1, \"%s\", __func__);\n\n  app_ai_tws_role_switch_direct();\n#endif\n}\n\nvoid app_ai_tws_role_switch(void) {\n  TRACE(1, \"[%s]\", __func__);\n\n#ifdef BISTO_ENABLED\n  gsound_tws_request_roleswitch();\n#endif\n}\n\nvoid app_ai_tws_role_switch_complete(void) {\n#ifdef __AI_VOICE__\n  TRACE(1, \"%s\", __func__);\n\n  app_ai_set_role_switching(false);\n  app_ai_set_initiative_switch(false);\n  app_ai_set_role_switch_direct(false);\n  app_ai_set_can_role_switch(false);\n  app_ai_set_ble_adv();\n\n  if (app_ai_is_setup_complete()) {\n    app_ai_set_speech_state(AI_SPEECH_STATE__IDLE);\n    app_ai_voice_stream_deinit();\n#if defined(IBRT)\n    if (app_tws_ibrt_tws_link_connected() &&\n        (app_ai_tws_get_local_role() == APP_AI_TWS_MASTER))\n#endif\n    {\n      if (app_ai_is_in_multi_ai_mode()) {\n        if (AI_SPEC_GSOUND == ai_manager_get_current_spec() ||\n            AI_SPEC_INIT == ai_manager_get_current_spec()) {\n          return;\n        }\n      }\n\n      if (app_ai_is_use_thirdparty()) {\n        app_ai_if_thirdparty_event_handle(THIRDPARTY_FUNC_KWS,\n                                          THIRDPARTY_AI_CONNECT);\n        app_ai_if_thirdparty_start_stream_by_app_audio_manager();\n      }\n    }\n  }\n\n  app_ai_ui_global_handler_ind(AI_CUSTOM_CODE_AI_ROLE_SWITCH_COMPLETE, NULL, 0);\n#endif\n}\n\nvoid app_ai_tws_sync_info_prepare_handler(uint8_t *buf, uint16_t *length) {\n#ifdef __AI_VOICE__\n  uint16_t buf_len = 0;\n\n  *length = ai_save_ctx(buf, buf_len);\n#endif\n}\n\nvoid app_ai_tws_sync_info_received_handler(uint8_t *buf, uint16_t length) {\n#ifdef __AI_VOICE__\n  ai_restore_ctx(buf, length);\n#endif\n}\n\nvoid app_ai_tws_sync_init(void) {\n#if defined(IBRT) && defined(__AI_VOICE__)\n  TWS_SYNC_USER_T user_app_ai_t = {\n      app_ai_tws_sync_info_prepare_handler,\n      app_ai_tws_sync_info_received_handler,\n      NULL,\n      NULL,\n      NULL,\n  };\n\n  app_tws_if_register_sync_user(TWS_SYNC_USER_AI_INFO, &user_app_ai_t);\n\n  if (NULL == app_ai_role_switch_timer_id) {\n    app_ai_role_switch_timer_id =\n        osTimerCreate(osTimer(APP_AI_ROLE_SWITCH_TIMER), osTimerOnce, NULL);\n  }\n  if (NULL == app_ai_ble_disc_timer_id) {\n    app_ai_ble_disc_timer_id =\n        osTimerCreate(osTimer(APP_AI_BLE_DISC_TIMER), osTimerOnce, NULL);\n  }\n#endif\n}\n\nvoid app_ai_tws_sync_ai_info(void) {\n#if defined(IBRT) && defined(__AI_VOICE__)\n  app_tws_if_sync_info(TWS_SYNC_USER_AI_INFO);\n#endif\n}\n\nvoid ai_manager_sync_info_prepare_handler(uint8_t *buf, uint16_t *length) {\n#ifdef IS_MULTI_AI_ENABLED\n  uint16_t buf_len = 0;\n\n  *length = ai_manager_save_ctx(buf, buf_len);\n#endif\n}\n\nvoid ai_manager_sync_info_received_handler(uint8_t *buf, uint16_t length) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_restore_ctx(buf, length);\n#endif\n}\n\nvoid ai_manager_sync_info_received_rsp_handler(uint8_t *buf, uint16_t length) {\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_save_ctx_rsp_handle(buf, length);\n#endif\n}\n\nvoid ai_manager_sync_init(void) {\n#if defined(IBRT) && defined(IS_MULTI_AI_ENABLED)\n  TWS_SYNC_USER_T user_ai_manager_t = {\n      ai_manager_sync_info_prepare_handler,\n      ai_manager_sync_info_received_handler,\n      NULL,\n      ai_manager_sync_info_received_rsp_handler,\n      ai_manager_sync_info_received_rsp_handler,\n  };\n\n  app_tws_if_register_sync_user(TWS_SYNC_USER_AI_MANAGER, &user_ai_manager_t);\n#endif\n}\n\nvoid app_ai_tws_sync_ai_manager_info(void) {\n#if defined(IBRT) && defined(IS_MULTI_AI_ENABLED)\n  app_tws_if_sync_info(TWS_SYNC_USER_AI_MANAGER);\n#endif\n}\n\n#ifdef IBRT\nstatic void gsound_connect_sync_info_prepare_handler(uint8_t *buf,\n                                                     uint16_t *length) {\n#ifdef BISTO_ENABLED\n  *length = 0;\n\n  AI_CONNECTION_STATE_T *pAiInfo = (AI_CONNECTION_STATE_T *)buf;\n\n  pAiInfo->connBtState = gsound_is_bt_connected();\n  pAiInfo->connPathType = gsound_custom_get_connection_path();\n  memcpy(pAiInfo->connBdAddr, gsound_get_connected_bd_addr(), 6);\n\n  if (CONNECTION_BLE == pAiInfo->connPathType) {\n    pAiInfo->connPathState = gsound_get_ble_connect_state();\n  } else if (CONNECTION_BT == pAiInfo->connPathType) {\n    pAiInfo->connPathState = gsound_get_bt_connect_state();\n  } else {\n    pAiInfo->connPathState = 0;\n  }\n\n  *length = sizeof(AI_CONNECTION_STATE_T);\n#endif\n}\n\nstatic void gsound_connect_sync_info_received_handler(uint8_t *buf,\n                                                      uint16_t length) {\n#ifdef BISTO_ENABLED\n  gsound_custom_connection_state_received_handler(buf);\n#endif\n}\n#endif\n\nvoid app_ai_tws_gsound_sync_init(void) {\n#ifdef IBRT\n  TWS_SYNC_USER_T userAiConnect = {\n      gsound_connect_sync_info_prepare_handler,\n      gsound_connect_sync_info_received_handler,\n      NULL,\n      NULL,\n      NULL,\n  };\n\n  app_tws_if_register_sync_user(TWS_SYNC_USER_AI_CONNECTION, &userAiConnect);\n#endif\n}\n\nvoid app_ai_tws_send_cmd_to_peer(uint8_t *p_buff, uint16_t length) {\n#ifdef IBRT\n  if (app_tws_ibrt_tws_link_connected()) {\n    app_tws_if_ai_send_cmd_to_peer(p_buff, length);\n  }\n#endif\n}\n\nvoid app_ai_tws_rev_peer_cmd_hanlder(uint16_t rsp_seq, uint8_t *p_buff,\n                                     uint16_t length) {\n#ifdef __AI_VOICE__\n  app_ai_rev_peer_cmd_hanlder(rsp_seq, p_buff, length);\n#endif\n}\n\nvoid app_ai_tws_send_cmd_with_rsp_to_peer(uint8_t *p_buff, uint16_t length) {\n#ifdef IBRT\n  if (app_tws_ibrt_tws_link_connected()) {\n    app_tws_if_ai_send_cmd_with_rsp_to_peer(p_buff, length);\n  }\n#endif\n}\n\nvoid app_ai_tws_send_cmd_rsp_to_peer(uint8_t *p_buff, uint16_t rsp_seq,\n                                     uint16_t length) {\n#ifdef IBRT\n  if (app_tws_ibrt_tws_link_connected()) {\n    app_tws_if_ai_send_cmd_rsp_to_peer(p_buff, rsp_seq, length);\n  }\n#endif\n}\n\nvoid app_ai_tws_rev_peer_cmd_with_rsp_hanlder(uint16_t rsp_seq, uint8_t *p_buff,\n                                              uint16_t length) {\n#ifdef __AI_VOICE__\n  app_ai_rev_peer_cmd_hanlder(rsp_seq, p_buff, length);\n#endif\n}\n\nvoid app_ai_tws_rev_cmd_rsp_from_peer_hanlder(uint16_t rsp_seq, uint8_t *p_buff,\n                                              uint16_t length) {\n#ifdef __AI_VOICE__\n  app_ai_rev_peer_cmd_hanlder(rsp_seq, p_buff, length);\n#endif\n}\n\nvoid app_ai_tws_rev_cmd_rsp_timeout_hanlder(uint16_t rsp_seq, uint8_t *p_buff,\n                                            uint16_t length) {\n#ifdef __AI_VOICE__\n  app_ai_rev_peer_cmd_rsp_timeout_hanlder(rsp_seq, p_buff, length);\n#endif\n}\n\nbool app_ai_tws_init_done(void) {\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  return (p_ibrt_ctrl->init_done != 0);\n#endif\n  return false;\n}\n\nbool app_ai_tws_link_connected(void) {\n#if defined(IBRT)\n  return app_tws_ibrt_tws_link_connected();\n#endif\n  return false;\n}\n\nuint8_t *app_ai_tws_local_address(void) {\n  uint8_t *local_addr = NULL;\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  local_addr = p_ibrt_ctrl->local_addr.address;\n#endif\n  return local_addr;\n}\n\nuint8_t *app_ai_tws_peer_address(void) {\n  uint8_t *peer_addr = NULL;\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  peer_addr = p_ibrt_ctrl->local_addr.address;\n#endif\n  return peer_addr;\n}\n\nvoid app_ai_tws_reboot_record_box_state(void) {\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n  app_ai_tws_reboot.is_ai_reboot = true;\n  app_ai_tws_reboot.box_state = p_ibrt_ui->box_state;\n  TRACE(2, \"%s box state %d\", __func__, p_ibrt_ui->box_state);\n}\n\nuint8_t app_ai_tws_reboot_get_box_action(void) {\n  uint8_t box_state = 0xFF;\n\n  if (app_ai_tws_reboot.is_ai_reboot) {\n    box_state = app_ai_tws_reboot.box_state;\n  }\n\n  TRACE(2, \"%s box state %d\", __func__, box_state);\n  if (box_state == IBRT_IN_BOX_OPEN) {\n    return IBRT_OPEN_BOX_EVENT;\n  } else if (box_state == IBRT_OUT_BOX) {\n    return IBRT_FETCH_OUT_EVENT;\n  } else if (box_state == IBRT_OUT_BOX_WEARED) {\n    return IBRT_WEAR_UP_EVENT;\n  }\n\n  return 0xFF;\n}\n\nvoid app_ai_tws_clear_reboot_box_state(void) {\n  TRACE(2, \"%s box state %d\", __func__, app_ai_tws_reboot.box_state);\n  app_ai_tws_reboot.is_ai_reboot = false;\n  app_ai_tws_reboot.box_state = 0xFF;\n}\n\nvoid app_ai_tws_disconnect_all_bt_connection(void) {\n#if defined(IBRT)\n  app_tws_ibrt_disconnect_all_connection();\n#endif\n}\n\nuint8_t app_ai_tws_get_local_role(void) {\n  uint8_t local_role = APP_AI_TWS_UNKNOW;\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (app_ibrt_ui_is_profile_exchanged()) {\n    if (app_tws_ibrt_mobile_link_connected()) {\n      local_role = APP_AI_TWS_MASTER;\n    } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n      local_role = APP_AI_TWS_SLAVE;\n    } else {\n      local_role = APP_AI_TWS_UNKNOW;\n    }\n  } else if (app_tws_ibrt_tws_link_connected()) {\n    if (app_tws_ibrt_mobile_link_connected()) {\n      local_role = APP_AI_TWS_MASTER;\n    } else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n      local_role = APP_AI_TWS_MASTER;\n    } else {\n      local_role = APP_AI_TWS_SLAVE;\n    }\n\n  } else {\n    local_role = APP_AI_TWS_UNKNOW;\n  }\n\n  TRACE(5, \"[%s] %d exchanged %d tws %d mobile %d\", __func__, local_role,\n        app_ibrt_ui_is_profile_exchanged(), app_tws_ibrt_tws_link_connected(),\n        app_tws_ibrt_mobile_link_connected());\n#endif\n  return local_role;\n}\n\nvoid app_ai_tws_init(void) {\n#if defined(IBRT) && defined(__AI_VOICE__)\n  app_ai_set_in_tws_mode(true);\n#endif\n}\n"
  },
  {
    "path": "services/app_ai/voice_sbc/voice_sbc.cpp",
    "content": "#ifndef VOICE_DATAPATH\n/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"voice_sbc.h\"\n#include \"hal_trace.h\"\n\nstatic VOICE_SBC_CONFIG_T voice_sbc_config = {\n    VOICE_SBC_CHANNEL_COUNT,   VOICE_SBC_CHANNEL_MODE, VOICE_SBC_BIT_POOL,\n    VOICE_SBC_SIZE_PER_SAMPLE, VOICE_SBC_SAMPLE_RATE,  VOICE_SBC_NUM_BLOCKS,\n    VOICE_SBC_NUM_SUB_BANDS,   VOICE_SBC_MSBC_FLAG,    VOICE_SBC_ALLOC_METHOD,\n};\n\nstatic int voice_sbc_init_encoder(void);\n\nstatic btif_sbc_encoder_t voice_sbc_encoder;\nstatic btif_sbc_decoder_t voice_sbc_decoder;\nstatic uint32_t voice_sbc_frame_len = 0;\n\nstatic float voice_sbc_eq_band_gain[8] = {1, 1, 1, 1, 1, 1, 1, 1};\n\nstatic int voice_sbc_init_encoder(void) {\n  btif_sbc_init_encoder(&voice_sbc_encoder);\n  voice_sbc_encoder.streamInfo.numChannels = voice_sbc_config.channelCnt;\n  voice_sbc_encoder.streamInfo.channelMode = voice_sbc_config.channelMode;\n  voice_sbc_encoder.streamInfo.bitPool = voice_sbc_config.bitPool;\n  voice_sbc_encoder.streamInfo.sampleFreq = voice_sbc_config.sampleRate;\n  voice_sbc_encoder.streamInfo.allocMethod = voice_sbc_config.allocMethod;\n  voice_sbc_encoder.streamInfo.numBlocks = voice_sbc_config.numBlocks;\n  voice_sbc_encoder.streamInfo.numSubBands = voice_sbc_config.numSubBands;\n  voice_sbc_encoder.streamInfo.mSbcFlag = voice_sbc_config.mSbcFlag;\n\n  voice_sbc_frame_len = btif_sbc_frame_len(&(voice_sbc_encoder.streamInfo));\n\n  TRACE(1, \"frame len is %d\", voice_sbc_frame_len);\n  return 0;\n}\n\nstatic int voice_sbc_init_decoder(void) {\n  btif_sbc_init_decoder(&voice_sbc_decoder);\n  voice_sbc_decoder.streamInfo.numChannels = voice_sbc_config.channelCnt;\n  voice_sbc_decoder.streamInfo.channelMode = voice_sbc_config.channelMode;\n  voice_sbc_decoder.streamInfo.bitPool = voice_sbc_config.bitPool;\n  voice_sbc_decoder.streamInfo.sampleFreq = voice_sbc_config.sampleRate;\n  voice_sbc_decoder.streamInfo.allocMethod = voice_sbc_config.allocMethod;\n  voice_sbc_decoder.streamInfo.numBlocks = voice_sbc_config.numBlocks;\n  voice_sbc_decoder.streamInfo.numSubBands = voice_sbc_config.numSubBands;\n  voice_sbc_decoder.streamInfo.mSbcFlag = voice_sbc_config.mSbcFlag;\n  return 0;\n}\n\nuint32_t voice_sbc_get_frame_len(void) { return voice_sbc_frame_len; }\n\nuint32_t voice_sbc_encode(uint8_t *input, uint32_t inputBytes,\n                          uint32_t *purchasedBytes, uint8_t *output,\n                          uint8_t isReset) {\n  if (isReset) {\n    voice_sbc_init_encoder();\n  }\n\n  btif_sbc_pcm_data_t PcmEncData;\n  uint16_t outputSbcBytes, bytes_encoded;\n\n  PcmEncData.numChannels = voice_sbc_encoder.streamInfo.numChannels;\n  PcmEncData.sampleFreq = voice_sbc_encoder.streamInfo.sampleFreq;\n\n  if (voice_sbc_encoder.streamInfo.mSbcFlag) {\n    uint16_t outputOffset = 0;\n    uint16_t oneChunkOutput = 0;\n    uint16_t oneChunkConsumed;\n    bytes_encoded = 0;\n\n    for (uint32_t index = 0; index < inputBytes;\n         index += (uint32_t)VOICE_SBC_PCM_DATA_SIZE_PER_FRAME) {\n      PcmEncData.data = input + index;\n      PcmEncData.dataLen = VOICE_SBC_PCM_DATA_SIZE_PER_FRAME;\n      // output[outputOffset++] = 0xAD;\n      // output[outputOffset++] = 0x02;\n      btif_sbc_encode_frames(&voice_sbc_encoder, &PcmEncData, &oneChunkConsumed,\n                             &output[outputOffset], &oneChunkOutput, 0xFFFF);\n      outputOffset += oneChunkOutput;\n      // output[outputOffset++] = 0x00;\n\n      bytes_encoded += oneChunkConsumed;\n    }\n\n    outputSbcBytes = outputOffset;\n  } else {\n    PcmEncData.data = input;\n    PcmEncData.dataLen = inputBytes;\n\n    btif_sbc_encode_frames(&voice_sbc_encoder, &PcmEncData, &bytes_encoded,\n                           output, &outputSbcBytes, 0xFFFF);\n  }\n\n  TRACE(2, \"Encode %d bytes PCM data into %d bytes SBC data.\", inputBytes,\n        outputSbcBytes);\n  TRACE(1, \"Consumed PCM data %d bytes\", bytes_encoded);\n\n  *purchasedBytes = bytes_encoded;\n\n  return outputSbcBytes;\n}\n\nuint32_t voice_sbc_decode(uint8_t *pcm_buffer, CQueue *encodedDataQueue,\n                          uint32_t expectedOutputSize, uint8_t isReset) {\n  if (isReset) {\n    voice_sbc_init_decoder();\n  }\n  int r = 0;\n  unsigned char *e1 = NULL, *e2 = NULL;\n  unsigned int len1 = 0, len2 = 0;\n  uint32_t sbcDataBytesToDecode;\n  unsigned int pcm_offset = 0;\n  uint16_t byte_decode;\n  int8_t ret;\n  btif_sbc_pcm_data_t voice_PcmDecData;\n\nget_again:\n  voice_PcmDecData.data = pcm_buffer + pcm_offset;\n  voice_PcmDecData.dataLen = 0;\n\n  if (LengthOfCQueue(encodedDataQueue) >\n      VOICE_SBC_ENCODED_DATA_SIZE_PER_FRAME) {\n    sbcDataBytesToDecode = VOICE_SBC_ENCODED_DATA_SIZE_PER_FRAME;\n  } else {\n    sbcDataBytesToDecode = LengthOfCQueue(encodedDataQueue);\n  }\n\n  len1 = len2 = 0;\n  r = PeekCQueue(encodedDataQueue, sbcDataBytesToDecode, &e1, &len1, &e2,\n                 &len2);\n  if ((r == CQ_ERR) || (0 == len1)) {\n    goto exit;\n  }\n\n  ret = btif_sbc_decode_frames(&voice_sbc_decoder, (unsigned char *)e1, len1,\n                               &byte_decode, &voice_PcmDecData,\n                               expectedOutputSize - pcm_offset,\n                               voice_sbc_eq_band_gain);\n\n  TRACE(4, \"len1 %d byte_decode %d expectedOutputSize %d pcm_offset %d\", len1,\n        byte_decode, expectedOutputSize, pcm_offset);\n  TRACE(1, \"voice_PcmDecData.dataLen %d\", voice_PcmDecData.dataLen);\n\n  DeCQueue(encodedDataQueue, 0, byte_decode);\n\n  pcm_offset += voice_PcmDecData.dataLen;\n\n  if (expectedOutputSize == pcm_offset) {\n    goto exit;\n  }\n\n  if ((ret == BT_STS_SDP_CONT_STATE) || (ret == BT_STS_SUCCESS)) {\n    goto get_again;\n  }\n\nexit:\n  TRACE(1, \"Get pcm data size %d\", pcm_offset);\n  return pcm_offset;\n}\n\nint voice_sbc_init(VOICE_SBC_CONFIG_T *pConfig) {\n  voice_sbc_config = *pConfig;\n  return 0;\n}\n\n#endif\n"
  },
  {
    "path": "services/app_ai/voice_sbc/voice_sbc.h",
    "content": "#ifndef __VOICE_SBC_H__\n#define __VOICE_SBC_H__\n\n#include \"cqueue.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \"codec_sbc.h\"\n\ntypedef struct\n{\n\tuint8_t\t\tchannelCnt;\n\tuint8_t\t\tchannelMode;\n\tuint8_t\t\tbitPool;\n\tuint8_t\t\tsizePerSample;\n\tuint8_t\t\tsampleRate;\n\tuint8_t\t\tnumBlocks;\n\tuint8_t \tnumSubBands;\n\tuint8_t\t\tmSbcFlag;\n\tuint8_t\t\tallocMethod;\n} VOICE_SBC_CONFIG_T;\n\n\n#define VOICE_SBC_CHANNEL_COUNT \t\t(1)\n#define VOICE_SBC_CHANNEL_MODE \t\t\t(BTIF_SBC_CHNL_MODE_MONO)\n// bitpool vs block size:\n/*\nblock size = 4 + (4 * nrof_subbands * nrof_channels ) / 8 + round_up(nrof_blocks * nrof_channels * bitpool / 8)\n\nblock size = 4 + (4 * 8 * 1) / 8 + round_up(16 * 1 * bitpool / 8)\n\nblock size = 56\n*/\n// 10 - 28: 3.5KB/s (suggested to be used for android ble)\n// 12 - 32: 4KB/s \t(suggested to be used for ios ble)\n// 24 - 56: 7KB/s\t(suggested to be used for android RFComm)\n\n#define VOICE_SBC_BIT_POOL\t \t\t\t(26)\n#define VOICE_SBC_BLOCK_SIZE\t\t\t60\n\n#define VOICE_SBC_SIZE_PER_SAMPLE\t\t(2)\t// 16 bits, 1 channel\n#define VOICE_SBC_SAMPLE_RATE\t\t\t(BTIF_SBC_CHNL_SAMPLE_FREQ_16)\n#define VOICE_SBC_NUM_BLOCKS\t\t\t15\n#define VOICE_SBC_NUM_SUB_BANDS\t\t\t8\n#define VOICE_SBC_MSBC_FLAG\t\t\t\t1\n#define VOICE_SBC_ALLOC_METHOD\t\t\tBTIF_SBC_ALLOC_METHOD_LOUDNESS\n\n#define VOICE_SBC_SAMPLE_RATE_VALUE\t\t16000\n#define VOICE_SBC_FRAME_PERIOD_IN_MS\t(7.5)\n\n#define VOICE_SBC_PCM_DATA_SIZE_PER_FRAME\t\\\n\t(((VOICE_SBC_FRAME_PERIOD_IN_MS*VOICE_SBC_SAMPLE_RATE_VALUE)/1000)*VOICE_SBC_SIZE_PER_SAMPLE)\n\n#define VOICE_SBC_ENCODED_DATA_SIZE_PER_FRAME\t(VOICE_SBC_BLOCK_SIZE)\n\n\n\n// Set the codec capture and encoding interval as 48ms,\n// to avoid too small time-slice from interrupting the bluetooth transmission\n#define VOICE_SBC_CAPTURE_INTERVAL_IN_MS\t(120)\nuint32_t voice_sbc_encode(uint8_t *input, uint32_t inputBytes, uint32_t* purchasedBytes, uint8_t *output, uint8_t isReset);\nuint32_t voice_sbc_decode(uint8_t* pcm_buffer, CQueue* encodedDataQueue, uint32_t expectedOutputSize, uint8_t isReset);\nint voice_sbc_init(VOICE_SBC_CONFIG_T* pConfig);\nuint32_t voice_sbc_get_frame_len(void);\n\n#ifdef __cplusplus\t\n}\n#endif\n\n#endif\t// __VOICE_SBC_H__\n\n"
  },
  {
    "path": "services/app_ibrt/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\n\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.cpp))\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nIBRT_LIB_NAME := libtws_ibrt_ui\n\n$(IBRT_LIB_NAME)-y := $(src_obj)\n\nobj-y :=  $(IBRT_LIB_NAME).a\n\nsubdir-ccflags-y += \\\n\t-Iservices/osif \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/fs/fat/ChaN \\\n\t-Iservices/overlay \\\n\t-Iservices/nvrecord \\\n\t-Iservices/resources \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iservices/nv_section/factory_section \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/drivers/bt \\\n\t-Iutils/cqueue \\\n\t-Iutils/heap \\\n\t-Iservices/audioflinger \\\n\t-Iutils/lockcqueue \\\n\t-Iutils/intersyshci \\\n\t-Iapps/key \\\n\t-Iapps/main \\\n\t-Iapps/common \\\n\t-Iapps/audioplayers \\\n\t-Iapps/audioplayers/a2dp_decoder \\\n\t-Iapps/anc/inc \\\n\t-Iapps/factory \\\n\t-Iservices/ble_app \\\n\t-Iservices/ble_app \\\n\t-Iservices/interconnection/green \\\n\t-Iutils/hwtimer_list \\\n\t-Ithirdparty/audio_codec_lib/liblhdc-dec/inc \\\n\t$(BT_PROFILES_INCLUDES) \\\n\t-Iservices/ble_stack/common/api \\\n\t-Iservices/ble_app/app_tws \\\n\t-Iservices/nv_section/log_section \\\n\t-Iservices/ai_voice/manager \\\n\t-Iservices/app_ai/inc \\\n\t-Iapps/battery/ \\\n\t-Iutils/crc16 \\\n\t-Iutils/crc32 \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n\t-Iservices/bt_app/a2dp_codecs/include \\\n\t-Iservices/voicepath/gsound/gsound_target \\\n\t-Iservices/ble_app/app_main \\\n\t-Iservices/app_tws/inc \\\n\t-Iservices/ai_voice/protocol/gma/gma_manager \\\n\t-Iservices/ai_voice/protocol/gma/gma_crypto  \\\n\t-Iservices/ai_voice/protocol/smartvoice/smartvoice_ble\\\n\t-Iservices/ota \\\n\t-Iservices/tota \\\n\t-Iservices/ble_stack/ble_ip \\\n\t-Iservices/ble_stack/hl/api \\\n\t-Iservices/ble_stack/app/api/ \\\n\t-Iservices/ble_stack/common/api/ \\\n\t-Iservices/ble_stack/hl/inc/ \\\n\t-Iservices/ble_stack/ke/api \\\n\t-Iservices/norflash_api \\\n\t-Iservices/ai_voice/transport  \\\n\t-Iservices/ai_voice/manager\t\\\n\t-Iservices/ai_voice/protocol/dual_mic_recording/voice_manager \\\n\t-Iapps/anc/inc \n\n\t\nifeq ($(IBRT),1)\nsubdir-ccflags-y += \\\n\t-Iservices/ibrt_core/inc \\\n\t-Iservices/ibrt_ui/inc \\\n\t-Iservices/app_ibrt/inc \\\n\t-Iservices/bt_app\nendif\n\nifeq ($(OTA_ENABLE),1)\nsubdir-ccflags-y += \\\n    -Iservices/ibrt_ota/inc\nendif\n\nifeq ($(ANC_APP),1)\nCFLAGS_app_ibrt_ui_test.o += -DANC_APP\nendif\n\nifeq ($(VOICE_DATAPATH_ENABLED),1)\nsubdir-ccflags-y += \\\n    -Iservices/voicepath/gsound/gsound_custom/inc \\\n\t-Iservices/voicepath/gsound/gsound_target_api_read_only\nendif"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_a2dp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_A2DP__\n#define __APP_IBRT_A2DP__\n#include \"a2dp_api.h\"\n#include \"app_tws_ibrt_cmd_sync_a2dp_status.h\"\n#include \n\na2dp_stream_t *app_bt_get_mobile_a2dp_stream(uint32_t deviceId);\nint a2dp_ibrt_sync_set_status(ibrt_a2dp_status_t *a2dp_status);\nint a2dp_ibrt_sync_get_status(ibrt_a2dp_status_t *a2dp_status);\nint a2dp_ibrt_stream_open_mock(void);\nint a2dp_ibrt_session_reset(void);\nint a2dp_ibrt_session_new(void);\nuint32_t a2dp_ibrt_session_get(void);\nint a2dp_ibrt_session_set(uint8_t session);\nint a2dp_ibrt_stream_need_autotrigger_set_flag(void);\nint a2dp_ibrt_stream_need_autotrigger_getandclean_flag(void);\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_auto_test.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_AUTO_TEST_H__\n#define __APP_IBRT_AUTO_TEST_H__\n#include \n#include \"plat_types.h\"\n\ntypedef struct\n{\n    uint8_t     local_volume;\n    uint8_t     a2dp_volume;\n    uint8_t     hfp_volume;\n    uint8_t     a2dp_streamming;\n    uint8_t     a2dp_codec_type;\n    uint8_t     a2dp_sample_rate;\n    uint8_t     a2dp_sample_bit;\n    uint8_t     sco_streaming;\n    uint8_t     sco_codec_type;\n    uint8_t     call_status;\n} __attribute__((__packed__)) AUTO_TEST_BT_STREAM_STATE_T;\n\ntypedef struct\n{\n    uint16_t media_active;\n    uint16_t curr_active_media; // low 8 bits are out direciton, while high 8 bits are in direction\n    uint8_t  promt_exist; // low 8 bits are out direciton, while high 8 bits are in direction\n} __attribute__((__packed__)) AUTO_TEST_MEDIA_STATE_T;\n\ntypedef struct\n{\n    uint32_t    current_ms;\n    uint8_t     cpu_freq;\n    uint8_t     super_state;\n    uint8_t     active_event;\n    uint8_t     ibrt_sm_running;\n    uint8_t     ui_state;\n    uint8_t     mobile_link_bt_role;\n    uint8_t     mobile_link_bt_mode;\n    uint32_t    mobile_constate;\n    uint8_t     tws_role;\n    uint8_t     tws_link_bt_role;\n    uint8_t     tws_link_bt_mode;\n    uint32_t    tws_constate;\n    uint8_t     role_switch_state;    // 1:ongoing, 0:idle\n    uint8_t     ble_state;\n    uint8_t     ble_operation;\n    uint8_t     ble_connection_state; // bits are in the order of connection index\n} __attribute__((__packed__)) AUTO_TEST_UI_STATE_T;\n\n\ntypedef struct\n{\n    uint8_t head[3];\n    uint8_t length;\n    AUTO_TEST_BT_STREAM_STATE_T bt_stream_state;\n    AUTO_TEST_MEDIA_STATE_T bt_media_state;\n    AUTO_TEST_UI_STATE_T ui_state;\n} __attribute__((__packed__)) AUTO_TEST_STATE_T;\n\n\nextern AUTO_TEST_STATE_T auto_test_state_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_tws_ibrt_disconnect_mobile(void);\nuint16_t app_ibrt_auto_test_get_tws_page_timeout_value(void);\nvoid app_ibrt_auto_test_init(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_auto_test_cmd_handle.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_AUTO_TEST_CMD_HANDLE_H__\n#define __APP_IBRT_AUTO_TEST_CMD_HANDLE_H__\n#include \n\n#ifdef BES_AUTOMATE_TEST\n\n//automate test group code\n#define AUTO_TEST_A2DP          0\n#define AUTO_TEST_HFP           1\n#define AUTO_TEST_BLE           2\n\n#define AUTO_TEST_UI            20\n#define AUTO_TEST_VOICE_PROMPT  21\n\n#define AUTO_TEST_AI            30\n#define AUTO_TEST_FLASH         31\n#define AUTO_TEST_OTA           32\n\n#define AUTO_TEST_UNUSE         127\n\n//voice promt automate test operation code\n\n// A2DP automate test operation code, configure the respective\n// .ini file used for auto test script\n#define A2DP_AUTO_TEST_AUDIO_PLAY       0\n#define A2DP_AUTO_TEST_AUDIO_PAUSE      1\n#define A2DP_AUTO_TEST_AUDIO_FORWARD    2\n#define A2DP_AUTO_TEST_AUDIO_BACKWARD   3\n#define A2DP_AUTO_TEST_AVRCP_VOL_UP     4\n#define A2DP_AUTO_TEST_AVRCP_VOL_DOWN   5\n\n// HFP automate test operation code, configure the respective\n// .ini file used for auto test script\n#define HFP_AUTO_TEST_SCO_CREATE        0\n#define HFP_AUTO_TEST_SCO_DISC          1\n#define HFP_AUTO_TEST_CALL_REDIAL       2\n#define HFP_AUTO_TEST_CALL_ANSWER       3\n#define HFP_AUTO_TEST_CALL_HANGUP       4\n#define HFP_AUTO_TEST_VOLUME_UP         5\n#define HFP_AUTO_TEST_VOLUME_DOWN       6\n\n// UI automate test operation code , configure the respective\n// .ini file used for auto test script\n#define UI_AUTO_TEST_OPEN_BOX           0\n#define UI_AUTO_TEST_CLOSE_BOX          1\n#define UI_AUTO_TEST_FETCH_OUT_BOX      2\n#define UI_AUTO_TEST_PUT_IN_BOX         3\n#define UI_AUTO_TEST_WEAR_UP            4\n#define UI_AUTO_TEST_WEAR_DOWN          5\n#define UI_AUTO_TEST_ROLE_SWITCH        6\n#define UI_AUTO_TEST_PHONE_CONN_EVENT   7\n#define UI_AUTO_TEST_RECONN_EVENT       8\n#define UI_AUTO_TEST_CONN_SECOND_MOBILE 9\n#define UI_AUTO_TEST_MOBILE_TWS_DISC    10\n#define UI_AUTO_TEST_PAIRING_MODE       11\n#define UI_AUTO_TEST_FREEMAN_MODE       12\n#define UI_AUTO_TEST_SUSPEND_IBRT       13\n#define UI_AUTO_TEST_RESUME_IBRT        14\n#define UI_AUTO_TEST_SHUT_DOWN          15\n#define UI_AUTO_TEST_REBOOT             16\n#define UI_AUTO_TEST_FACTORY_RESET      17\n#define UI_AUTO_TEST_ASSERT             18\n#define UI_AUTO_TEST_CONNECT_MOBILE     19\n#define UI_AUTO_TEST_DISCONNECT_MOBILE  20\n#define UI_AUTO_TEST_CONNECT_TWS        21\n#define UI_AUTO_TEST_DISCONNECT_TWS     22\n#define UI_AUTO_TEST_ENABLE_TPORTS      23\n\n// AI automate test operation code, configure the respective\n// .ini file used for auto test script\n#define AI_AUTO_TEST_PTT_BUTTON_ACTION  0\n#define AI_AUTO_TEST_DISCONNECT_AI      1\n\n// BLE automate test operation code, configure the respective\n// .ini file used for auto test script\n#define BLE_AUTO_TEST_START_ADV         0\n#define BLE_AUTO_TEST_STOP_ADV          1\n#define BLE_AUTO_TEST_DISCONNECT        2\n#define BLE_AUTO_TEST_START_CONNECT     3\n#define BLE_AUTO_TEST_STOP_CONNECT      4\n#define BLE_AUTO_TEST_START_SCAN        5\n#define BLE_AUTO_TEST_STOP_SCAN         6\n#define BLE_AUTO_TEST_UPDATE_CONN_PARAM 7\n\n// flash automate test operation code, configure the respective\n// .ini file used for auto test script\n#define FLASH_AUTO_TEST_PROGRAM         0\n#define FLASH_AUTO_TEST_ERASE           1\n#define FLASH_AUTO_TEST_FLUSH_NV        2\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n#endif\n\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_ble_adv.h",
    "content": "#ifndef __APP_IBRT__BLE_ADV__H__\n#define __APP_IBRT__BLE_ADV__H__\n\n#include \"stdint.h\"\n#include \"bluetooth.h\"\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\n#define APP_IBRT_BLE_ADV_INTERVAL 100\n\n//HCI opcode\n#define    HCI_BLE_ADV_CMD_OPCODE      0x200a\n\ntypedef enum {\n    BLE_STATE_IDLE       = 0,\n    BLE_ADVERTISING      = 1,\n    BLE_STARTING_ADV     = 2,\n    BLE_STOPPING_ADV     = 3,\n} SLAVE_BLE_STATE_E;\n\ntypedef enum {\n    BLE_OP_IDLE       = 0,\n    BLE_START_ADV     = 1,\n    BLE_STOP_ADV      = 2,\n} SLAVE_BLE_OP_E;\n\ntypedef struct\n{\n    SLAVE_BLE_STATE_E state;\n    SLAVE_BLE_OP_E op;\n} SLAVE_BLE_MODE_T;\n\ntypedef struct  {\n\t// le_adv_param\n\tuint16_t advInterval_Ms;\n\tuint8_t adv_type;\n    bt_bdaddr_t bd_addr;\n    uint8_t own_addr_type;\n    uint8_t peer_addr_type;\n    uint8_t adv_chanmap;\n    uint8_t adv_filter_policy;\n\t// adv data\n\tuint8_t adv_data_len;\n\tuint8_t adv_data[31];\n\t\n\t// scan response data\t\n\tuint8_t scan_rsp_data_len;\n\tuint8_t scan_rsp_data[31];\t\n}app_ble_adv_para_data_t;\ntypedef struct\n{\n    uint8_t   num_hci_cmd_packets;\n    uint16_t  cmd_opcode;\n    uint8_t   param[1];\n} __attribute__ ((packed)) slave_ble_cmd_comp_t;\n\n\nvoid app_ibrt_ble_adv_para_data_init(void);\nvoid app_ibrt_ble_adv_start(uint8_t adv_type, uint16_t advInterval);\nvoid app_ibrt_ble_adv_stop(void);\nvoid app_ibrt_ble_adv_data_config(uint8_t *advData, uint8_t advDataLen,\n                                            uint8_t *scanRspData, uint8_t scanRspDataLen);\nvoid app_ibrt_ble_switch_activities(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_custom_cmd.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_CUSTOM_CMD__\n#define __APP_IBRT_CUSTOM_CMD__\n#include \n\n#define APP_IBRT_CMD_BASE 0x8000\n#define APP_IBRT_CMD_MASK 0x0F00\n#define APP_IBRT_CUSTOM_CMD_PREFIX 0x0100\n#define APP_IBRT_OTA_CMD_PREFIX 0x0200\n#define APP_IBRT_OTA_TWS_CMD_PREFIX 0x0300\n\nint app_ibrt_customif_cmd_table_get(void **cmd_tbl, uint16_t *cmd_size);\nint app_ibrt_ota_cmd_table_get(void **cmd_tbl, uint16_t *cmd_size);\nint app_ibrt_ota_tws_cmd_table_get(void **cmd_tbl, uint16_t *cmd_size);\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_customif_cmd.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_IF_CUSTOM_CMD__\n#define __APP_IBRT_IF_CUSTOM_CMD__\n\n#include \"app_ibrt_custom_cmd.h\"\n\ntypedef enum\n{\n    APP_IBRT_CUSTOM_CMD_TEST1 = APP_IBRT_CMD_BASE|APP_IBRT_CUSTOM_CMD_PREFIX|0x01,\n    APP_IBRT_CUSTOM_CMD_TEST2 = APP_IBRT_CMD_BASE|APP_IBRT_CUSTOM_CMD_PREFIX|0x02,\n    APP_IBRT_CUSTOM_CMD_TEST3 = APP_IBRT_CMD_BASE|APP_IBRT_CUSTOM_CMD_PREFIX|0x03,\n    APP_IBRT_CUSTOM_CMD_TEST4 = APP_IBRT_CMD_BASE|APP_IBRT_CUSTOM_CMD_PREFIX|0x04,\n    APP_IBRT_CUSTOM_CMD_TEST5 = APP_IBRT_CMD_BASE|APP_IBRT_CUSTOM_CMD_PREFIX|0x05,\n\n    APP_TWS_CMD_SHARE_FASTPAIR_INFO = APP_IBRT_CMD_BASE|APP_IBRT_CUSTOM_CMD_PREFIX|0x03,\n\n#ifdef BISTO_ENABLED\n    APP_TWS_CMD_BISTO_DIP_SYNC      = APP_IBRT_CMD_BASE|APP_IBRT_CUSTOM_CMD_PREFIX|0x04,\n#endif\n#ifdef __DUAL_MIC_RECORDING__\n    APP_IBRT_CUSTOM_CMD_DMA_AUDIO     = APP_IBRT_CMD_BASE | APP_IBRT_CUSTOM_CMD_PREFIX | 0x05,\n#endif\n    //new customer cmd add here\n} app_ibrt_custom_cmd_code_e;\n\ntypedef struct\n{\n    uint8_t rsv;\n    uint8_t buff[6];\n} __attribute__((packed))ibrt_custom_cmd_test_t;\n\nvoid app_ibrt_customif_cmd_test(ibrt_custom_cmd_test_t *cmd_test);\nvoid app_ibrt_customif_test3_cmd_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_customif_test4_cmd_send(uint8_t *p_buff, uint16_t length);\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_customif_ui.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_CUSTOMIF_UI_UI__\n#define __APP_IBRT_CUSTOMIF_UI_UI__\n\n#define  IBRT_UI_ROLE_SWITCH_TIME_THRESHOLD                         (2)  //\n#define  IBRT_UI_ROLE_SWITCH_THRESHOLD_WITH_RSSI                    (10) //dbm\n#define  IBRT_UI_CLOSE_BOX_EVENT_WAIT_RESPONSE_TIMEOUT              (400)//ms\n#define  IBRT_UI_MOBILE_RECONNECT_WAIT_READY_TIMEOUT                (1000)//ms\n#define  IBRT_UI_TWS_RECONNECT_WAIT_READY_TIMEOUT                   (500)//ms\n#define  IBRT_UI_RECONNECT_MOBILE_WAIT_RESPONSE_TIMEOUT             (5000)//5s\n#define  IBRT_UI_RECONNECT_IBRT_WAIT_RESPONSE_TIMEOUT               (300)//ms\n#define  IBRT_UI_NV_SLAVE_RECONNECT_TWS_WAIT_RESPONSE_TIMEOUT       (1000)//ms\n#define  IBRT_UI_NV_MASTER_RECONNECT_TWS_WAIT_RESPONSE_TIMEOUT      (300)//ms\n#define  IBRT_UI_DISABLE_BT_SCAN_TIMEOUT                            (3000000)//5min\n#define  IBRT_UI_STOP_IBRT_TIMEOUT                                  (3000000)//40min\n\n\n#define  IBRT_UI_OPEN_RECONNECT_MOBILE_MAX_TIMES            (0)\n#define  IBRT_UI_OPEN_RECONNECT_TWS_MAX_TIMES               (0)\n#define  IBRT_UI_RECONNECT_MOBILE_MAX_TIMES                 (30)\n#define  IBRT_UI_RECONNECT_TWS_MAX_TIMES                    (30)\n#define  IBRT_UI_RECONNECT_IBRT_MAX_TIMES                   (1)\n\n#define  IBRT_UI_LONG_POLL_INTERVAL                         (0x68)\n#define  IBRT_UI_DEFAULT_POLL_INTERVAL                      (0x34)\n#define  IBRT_UI_SHORT_POLL_INTERVAL                        (0x34)\n\n#define  IBRT_UI_DEFAULT_POLL_INTERVAL_IN_SCO               (0x9c)\n#define  IBRT_UI_SHORT_POLL_INTERVAL_IN_SCO                 (0x3C)\n\n#define  IBRT_TWS_PAGE_TIMEOUT_ON_CONNECT_SUCCESS_LAST      (0x2000)\n#define  IBRT_TWS_PAGE_TIMEOUT_ON_CONNECT_FAILED_LAST       (0x2000)\n#define  IBRT_MOBILE_PAGE_TIMEOUT                           (0x2000)\n#define  IBRT_TWS_PAGE_TIMEOUT_ON_RECONNECT_MOBILE_FAILED   (0x2000)\n#define  IBRT_TWS_PAGE_TIMEOUT_ON_RECONNECT_MOBILE_SUCCESS  (0x2000)\n\n#define  IBRT_UI_TWS_CONNECTION_TIMEOUT                   (3200)//1600 slot=1s/3200 slot = 2s/8000slot=5s\n\n\n#define  IBRT_TWS_RECONNECT_ONE_CYCLE                     (3)\n#define  IBRT_MOBILE_RECONNECT_ONE_CYCLE                  (5)\n\n#define  IBRT_CONTROLLER_DBG_STATE_TIMEOUT                (200)\n\n#define  IBRT_UI_RX_SEQ_ERROR_TIMEOUT                     (10000)\n#define  IBRT_UI_RX_SEQ_ERROR_THRESHOLD                   (50)\n#define  IBRT_UI_RX_SEQ_ERROR_RECOVER_TIMEOUT             (5000)\n\n\n#define  IBRT_STOP_IBRT_WAIT_TIME                         (500)\n#define  TWS_CONN_FAILED_WAIT_TIME                        (5)\n#define  IBRT_EVENT_HUNG_TIMEOUT                          (200)//ms\n\n#define  IBRT_TWS_SWITCH_RSSI_THRESHOLD                   (30)\n#define  IBRT_UI_RADICAL_SAN_INTERVAL_NV_MASTER           (BTIF_BT_DEFAULT_PAGE_SCAN_INTERVAL/4)\n#define  IBRT_UI_RADICAL_SAN_INTERVAL_NV_SLAVE            ((BTIF_BT_DEFAULT_PAGE_SCAN_INTERVAL/4)-0x48)\n\n/*\n* ibrt ui event error handling timeout\n*/\n#define  SM_RUNNING_TIMEOUT                               (20000)\n#define  PEER_SM_RUNNING_TIMEOUT                          (2 * (IBRT_UI_OPEN_RECONNECT_MOBILE_MAX_TIMES+2) * (IBRT_UI_RECONNECT_MOBILE_WAIT_RESPONSE_TIMEOUT+5000))\n#define  RECONNECT_PEER_SM_RUNNING_TIMEOUT                (2 * (IBRT_UI_RECONNECT_MOBILE_MAX_TIMES+2) * (IBRT_UI_RECONNECT_MOBILE_WAIT_RESPONSE_TIMEOUT+5000))\n#define  CONNECT_NO_03_TIMEOUT                            (15000)\n#define  DISCONNECT_NO_05_TIMEOUT                         (8000)\n\n#define  IBRT_UI_TWS_CMD_SEND_TIMEOUT                     (10000)\n#define  IBRT_UI_TWS_COUNTER_THRESHOLD                    (500000)\n#define  IBRT_UI_TWS_SWITCH_STABLE_TIMEOUT                (300)\n#define  IBRT_UI_DISC_TWS_TIMEOUT                         (10000)\n#ifdef TEST_OVER_THE_AIR_ENANBLED\n#define  IBRT_UI_RSSI_MONITOR_TIMEOUT                     (1000)//ms\n#else\n#define  IBRT_UI_RSSI_MONITOR_TIMEOUT                     (5000)//ms\n#endif\nint app_ibrt_customif_ui_start(void);\nbool app_ibrt_customif_ui_tws_switch(void);\nbool app_ibrt_customif_ui_is_tws_switching(void);\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_hf.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_HF__\n#define __APP_IBRT_HF__\n\n#include \"app_tws_ibrt_cmd_sync_hfp_status.h\"\n#include \"hfp_api.h\"\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nint hfp_ibrt_service_connected_mock(void);\n\nint hfp_ibrt_sync_get_status(ibrt_hfp_status_t *hfp_status);\n\nint hfp_ibrt_sync_set_status(ibrt_hfp_status_t *hfp_status);\n\nint hfp_ibrt_sco_audio_disconnected(void);\n\nint hfp_ibrt_sco_audio_connected(hfp_sco_codec_t codec, uint16_t sco_connhdl);\n\nbool btapp_hfp_is_sco_active(void);\n\nuint8_t btapp_hfp_get_call_state(void);\n\nuint8_t btapp_hfp_get_call_setup(void);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_if.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_IF__\n#define __APP_IBRT_IF__\n#include \"cmsis_os.h\"\n#include \"app_tws_ibrt.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_key.h\"\n\ntypedef enum {\n    APP_IBRT_IF_STATUS_SUCCESS                  = 0,\n    APP_IBRT_IF_STATUS_PENDING                  = 1,\n    APP_IBRT_IF_STATUS_ERROR_INVALID_PARAMETERS = 2,\n    APP_IBRT_IF_STATUS_ERROR_NO_CONNECTION      = 3,\n    APP_IBRT_IF_STATUS_ERROR_CONNECTION_EXISTS  = 4,\n    APP_IBRT_IF_STATUS_IN_PROGRESS              = 5,\n    APP_IBRT_IF_STATUS_ERROR_DUPLICATE_REQUEST  = 6,\n    APP_IBRT_IF_STATUS_ERROR_INVALID_STATE      = 7,\n    APP_IBRT_IF_STATUS_ERROR_TIMEOUT            = 8,\n    APP_IBRT_IF_STATUS_ERROR_ROLE_SWITCH_FAILED = 9,\n    APP_IBRT_IF_STATUS_ERROR_UNEXPECTED_VALUE  = 10,\n    APP_IBRT_IF_STATUS_ERROR_OP_NOT_ALLOWED    = 11,\n} AppIbrtStatus;\n\n\ntypedef enum {\n    APP_IBRT_IF_A2DP_IDLE                             = 0,\n    APP_IBRT_IF_A2DP_CODEC_CONFIGURED = 1,\n    APP_IBRT_IF_A2DP_OPEN                          = 2,\n    APP_IBRT_IF_A2DP_STREAMING                = 3,\n    APP_IBRT_IF_A2DP_CLOSED                       = 4,\n}AppIbrtA2dpState;\n\ntypedef enum {\n    APP_IBRT_IF_AVRCP_DISCONNECTED   = 0,\n    APP_IBRT_IF_AVRCP_CONNECTED      = 1,\n    APP_IBRT_IF_AVRCP_PLAYING        = 2,\n    APP_IBRT_IF_AVRCP_PAUSED         = 3,\n    APP_IBRT_IF_AVRCP_VOLUME_UPDATED = 4,\n}AppIbrtAvrcpState;\n\ntypedef enum {\n    APP_IBRT_IF_HFP_SLC_DISCONNECTED = 0,\n    APP_IBRT_IF_HFP_CLOSED           = 1,\n    APP_IBRT_IF_HFP_SCO_CLOSED       = 2,\n    APP_IBRT_IF_HFP_PENDING          = 3,\n    APP_IBRT_IF_HFP_SLC_OPEN         = 4,\n    APP_IBRT_IF_HFP_NEGOTIATE        = 5,\n    APP_IBRT_IF_HFP_CODEC_CONFIGURED = 6,\n    APP_IBRT_IF_HFP_SCO_OPEN         = 7,\n    APP_IBRT_IF_HFP_INCOMING_CALL    = 8,\n    APP_IBRT_IF_HFP_OUTGOING_CALL    = 9,\n    APP_IBRT_IF_HFP_RING_INDICATION  = 10,\n} AppIbrtHfpState;\n\ntypedef enum {\n    APP_IBRT_IF_NO_CALL               = 0,\n    APP_IBRT_IF_CALL_ACTIVE         = 1,\n    APP_IBRT_IF_HOLD                    = 2,\n    APP_IBRT_IF_SETUP_INCOMMING         = 3,\n    APP_IBRT_IF_SETUP_OUTGOING         = 4,\n    APP_IBRT_IF_SETUP_ALERT        = 5,\n} AppIbrtCallStatus;\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\ntypedef APP_IBRT_UI_VENDER_EVENT_HANDLER_IND APP_IBRT_IF_VENDER_EVENT_HANDLER_IND;\ntypedef APP_IBRT_UI_GLOBAL_HANDLER_IND APP_IBRT_IF_GLOBAL_HANDLER_IND;\ntypedef APP_IBRT_UI_GLOBAL_EVENT_UPDATE_IND APP_IBRT_IF_GLOBAL_EVENT_UPDATE_IND;\ntypedef APP_IBRT_UI_PROFILE_STATE_CHANGE_IND APP_IBRT_IF_PROFILE_STATE_CHANGE_IND;\ntypedef APP_IBRT_UI_CONNECT_MOBILE_HANDLER_IND APP_IBRT_IF_CONNECT_MOBILE_NEEDED_IND;\ntypedef APP_IBRT_UI_TWS_SWITCH_HANDLER_IND APP_IBRT_IF_TWS_SWITCH_NEEDED_IND;\n\ntypedef app_ibrt_ui_t app_ibrt_if_ui_t;\ntypedef ibrt_ctrl_t app_ibrt_if_ctrl_t;\n\nenum APP_IBRT_IF_SNIFF_CHECKER_USER_T\n{\n    APP_IBRT_IF_SNIFF_CHECKER_USER_HFP,\n    APP_IBRT_IF_SNIFF_CHECKER_USER_A2DP,\n    APP_IBRT_IF_SNIFF_CHECKER_USER_SPP,\n\n    APP_IBRT_IF_SNIFF_CHECKER_USER_QTY\n};\n\nenum APP_IBRT_IF_SLEEP_HOOK_BLOCKER_T\n{\n   APP_IBRT_IF_SLEEP_HOOK_BLOCKER_A2DP_STREAMING = 1<<0,\n   APP_IBRT_IF_SLEEP_HOOK_BLOCKER_HFP_SCO        = 1<<1,\n\n   APP_IBRT_IF_SLEEP_HOOK_BLOCKER_ALL            = (1<<0)|(1<<1),\n};\n\nvoid app_ibrt_if_register_global_handler_ind(APP_IBRT_IF_GLOBAL_HANDLER_IND handler);\nvoid app_ibrt_if_register_vender_handler_ind(APP_IBRT_IF_VENDER_EVENT_HANDLER_IND handler);\nvoid app_ibrt_if_register_connect_mobile_needed_ind(APP_IBRT_IF_CONNECT_MOBILE_NEEDED_IND connect_moible_need_ind);\nvoid app_ibrt_if_register_tws_switch_needed_ind(APP_IBRT_IF_TWS_SWITCH_NEEDED_IND tws_switch_need_ind);\nvoid app_ibrt_if_register_global_event_update_ind(APP_IBRT_IF_GLOBAL_EVENT_UPDATE_IND handler);\nvoid app_ibrt_if_register_link_connected_ind(APP_IBRT_UI_CONNECTED_HANDLER_IND mobile_connected_ind,\n                                             APP_IBRT_UI_CONNECTED_HANDLER_IND ibrt_connected_ind,\n                                             APP_IBRT_UI_CONNECTED_HANDLER_IND tws_connected_ind);\nvoid app_ibrt_if_register_profile_state_change_ind(APP_IBRT_IF_PROFILE_STATE_CHANGE_IND handler);\nvoid app_ibrt_if_register_pairing_mode_ind(APP_IBRT_UI_PAIRING_MODE_HANDLER_IND set_callback, APP_IBRT_UI_PAIRING_MODE_HANDLER_IND clear_callback);\n\nint app_ibrt_if_config_load(ibrt_config_t *config);\nint app_ibrt_if_reconfig(ibrt_config_t *config);\nint app_ibrt_if_ui_reconfig(ibrt_ui_config_t *config);\nint app_ibrt_core_if_reconfig(ibrt_config_t *config);\nint app_ibrt_if_config(ibrt_ui_config_t *ui_config);\nint app_ibrt_if_event_entry(ibrt_event_type event);\nvoid app_ibrt_if_choice_connect_second_mobile(void);\nvoid app_ibrt_if_choice_mobile_connect(uint8_t index);\nvoid app_ibrt_if_disconnect_mobile_tws_link(void);\napp_ibrt_if_ui_t* app_ibrt_if_ui_get_ctx(void);\napp_ibrt_if_ctrl_t *app_ibrt_if_get_bt_ctrl_ctx(void);\nvoid app_ibrt_if_enter_pairing_after_tws_connected(void);\nvoid app_ibrt_if_enter_freeman_pairing(void);\nint app_ibrt_if_voice_report_trig_retrigger(void);\nint app_ibrt_if_force_audio_retrigger(void);\nint app_ibrt_if_force_audio_retrigger_slave_sync(void);\nint app_ibrt_if_keyboard_notify(APP_KEY_STATUS *status, void *param);\nvoid app_ibrt_if_a2dp_lowlatency_scan(uint16_t interval, uint16_t window, uint8_t interlanced);\nvoid app_ibrt_if_a2dp_restore_scan(void);\nvoid app_ibrt_if_sco_lowlatency_scan(uint16_t interval, uint16_t window, uint8_t interlanced);\nvoid app_ibrt_if_sco_restore_scan(void);\n#ifdef IBRT_SEARCH_UI\nvoid app_start_tws_serching_direactly();\nvoid app_bt_manager_ibrt_role_process(const btif_event_t *Event);\nvoid app_ibrt_search_ui_init(bool boxOperation,ibrt_event_type evt_type);\nvoid app_ibrt_enter_limited_mode(void);\nvoid app_ibrt_reconfig_btAddr_from_nv();\nvoid app_bt_enter_mono_pairing_mode(void);\n#endif\n\nvoid app_ibrt_ui_automate_test_cmd_handler(uint8_t group_code, uint8_t operation_code, uint8_t *param, uint8_t param_len);\nvoid app_ibrt_auto_test_inform_cmd_received(uint8_t group_code, uint8_t operation_code);\nint app_ibrt_ui_test_cmd_handler(unsigned char *buf, unsigned int length);\nvoid app_ibrt_if_ctx_checker(void);\nextern \"C\" bool btdrv_get_page_pscan_coex_enable(void);\nint app_ibrt_if_tws_sniff_block(uint32_t block_next_sec);\nint app_ibrt_if_sniff_checker_start(enum APP_IBRT_IF_SNIFF_CHECKER_USER_T user);\nint app_ibrt_if_sniff_checker_stop(enum APP_IBRT_IF_SNIFF_CHECKER_USER_T user);\nint app_ibrt_if_sniff_checker_init(uint32_t delay_ms);\nint app_ibrt_if_sniff_checker_reset(void);\n\nvoid app_ibrt_if_exec_sleep_hook_blocker_set(APP_IBRT_IF_SLEEP_HOOK_BLOCKER_T blocker);\nvoid app_ibrt_if_exec_sleep_hook_blocker_clr(APP_IBRT_IF_SLEEP_HOOK_BLOCKER_T blocker);\nbool app_ibrt_if_exec_sleep_hook_blocker_is_a2dp_streaming(void);\nbool app_ibrt_if_exec_sleep_hook_blocker_is_hfp_sco(void);\nbool app_ibrt_if_exec_sleep_hook_allowed(void);\nint app_ibrt_if_config_keeper_clear(void);\nint app_ibrt_if_config_keeper_mobile_update(bt_bdaddr_t *addr);\nint app_ibrt_if_config_keeper_tws_update(bt_bdaddr_t *addr);\nvoid app_ibrt_ui_adaptive_fa_rx_gain(void);\nvoid app_tws_ibrt_record_sync_id(void);\nvoid app_tws_ibrt_resume_sync_id(void);\nvoid app_ibrt_if_pairing_mode_refresh(void);\nbool app_ibrt_if_tws_switch_prepare_needed(uint32_t *wait_ms);\nvoid app_ibrt_if_tws_swtich_prepare(void);\nvoid app_ibrt_if_tws_switch_prepare_done_in_bt_thread(IBRT_ROLE_SWITCH_USER_E user, uint32_t role);\nbool app_ibrt_if_start_ibrt_onporcess(void);\nbool app_ibrt_if_tws_switch_onporcess(void);\nAppIbrtStatus app_ibrt_if_get_a2dp_state(AppIbrtA2dpState *a2dp_state);\nAppIbrtStatus app_ibrt_if_get_avrcp_state(AppIbrtAvrcpState *avrcp_state);\nAppIbrtStatus app_ibrt_if_get_hfp_state(AppIbrtHfpState *hfp_state);\nAppIbrtStatus app_ibrt_if_get_hfp_call_status(AppIbrtCallStatus *call_status);\nibrt_role_e app_ibrt_if_get_ibrt_role();\n\n\n\n#ifdef __cplusplus\n}\n#endif                          /*  */\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_if_internal.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_IF_INTERNAL__\n#define __APP_IBRT_IF_INTERNAL__\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nbool app_ibrt_if_false_trigger_protect(ibrt_event_type evt_type);\nbool app_ibrt_if_tws_reconnect_allowed(void);\nvoid app_ibrt_if_sniff_event_callback(const btif_event_t *event);\nbool app_ibrt_if_tws_sniff_allowed(void);\nvoid app_ibrt_if_audio_mute(void);\nvoid app_ibrt_if_audio_recover(void);\nvoid app_ibrt_if_pairing_mode_refresh(void);\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_keyboard.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_KEYBOARD__\n#define __APP_IBRT_KEYBOARD__\n#include \"app_key.h\"\n\n#ifdef IBRT_SEARCH_UI\nvoid app_ibrt_search_ui_handle_key(APP_KEY_STATUS *status, void *param);\n#else\nvoid app_ibrt_normal_ui_handle_key(APP_KEY_STATUS *status, void *param);\n#endif\n\nvoid app_ibrt_send_keyboard_request(uint8_t *p_buff, uint16_t length);\n\nvoid app_ibrt_keyboard_request_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\n#define IBRT_ACTION_PLAY                                0x01\n#define IBRT_ACTION_PAUSE                               0x02\n#define IBRT_ACTION_FORWARD                             0x03\n#define IBRT_ACTION_BACKWARD                            0x04\n#define IBRT_ACTION_AVRCP_VOLUP                         0x05\n#define IBRT_ACTION_AVRCP_VOLDN                         0x06\n#define IBRT_ACTION_HFSCO_CREATE                        0x07\n#define IBRT_ACTION_HFSCO_DISC                          0x08\n#define IBRT_ACTION_REDIAL                              0x09\n#define IBRT_ACTION_ANSWER                              0x0a\n#define IBRT_ACTION_HANGUP                              0x0b\n#define IBRT_ACTION_LOCAL_VOLUP                         0x0c\n#define IBRT_ACTION_LOCAL_VOLDN                         0x0d\n#define IBRT_ACTION_ANC_NOTIRY_MASTER_EXCHANGE_COEF     0x0e\n#define IBRT_ACTION_SYNC_WNR                            0x0f\n\n\nvoid app_ibrt_if_start_user_action(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ui_perform_user_action(uint8_t *p_buff, uint16_t length);\n\nextern bool Is_Slave_Key_Down_Event;\n\n#define TWS_Sync_Shutdowm\t\t1\n#define QXW_TOUCH_INEAR_DET\t0\n#define BT_FACTORY_CLEAR_RECORD\t0\n\n#define Auto_Shutdowm_TIME\t\t300\n\n#if(TWS_Sync_Shutdowm)\nint app_ibrt_poweroff_notify_force(void);\nint app_ibrt_reboot_notify_force(void);\n#endif\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_nvrecord.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_IF_NVRECORD__\n#define __APP_IBRT_IF_NVRECORD__\n#include \"cmsis_os.h\"\n#include \"app_tws_ibrt.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nvoid app_ibrt_nvrecord_config_load(void *config);\n\nvoid app_ibrt_nvrecord_update_ibrt_mode_tws(bool status);\n\nbt_status_t app_ibrt_nvrecord_get_mobile_addr(bt_bdaddr_t *mobile_addr);\n\nint app_ibrt_nvrecord_get_latest_mobiles_addr(bt_bdaddr_t *mobile_addr1, bt_bdaddr_t* mobile_addr2);\n\nint app_ibrt_nvrecord_choice_mobile_addr(bt_bdaddr_t *mobile_addr, uint8_t index);\n\nvoid app_ibrt_nvrecord_delete_all_mobile_record(void);\n\n\n#ifdef __cplusplus\n}\n#endif                          /*  */\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_ota_cmd.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_OTA_CMD__\n#define __APP_IBRT_OTA_CMD__\n\n#include \"app_ibrt_custom_cmd.h\"\n\n#define RESEND_TIME 2\n\n#define app_ibrt_ota_image_buff_cmd_rsp_timeout_handler_null   (0)\n#define app_ibrt_ota_image_buff_cmd_rsp_handler_null           (0)\n\ntypedef enum\n{\n#ifdef IBRT_OTA\n    IBRT_OTA_TWS_GET_VERSION_CMD     = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x01,\n    IBRT_OTA_TWS_SELECT_SIDE_CMD     = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x02,\n    IBRT_OTA_TWS_BP_CHECK_CMD        = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x03,\n    IBRT_OTA_TWS_START_OTA_CMD       = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x04,\n    IBRT_OTA_TWS_OTA_CONFIG_CMD      = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x05,\n    IBRT_OTA_TWS_SEGMENT_CRC_CMD     = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x06,\n    IBRT_OTA_TWS_IMAGE_CRC_CMD       = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x07,\n    IBRT_OTA_TWS_IMAGE_OVERWRITE_CMD = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x08,\n    IBRT_OTA_TWS_ROLE_SWITCH_CMD     = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x0C,\n    IBRT_OTA_TWS_ACK_CMD             = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x0D,\n#endif\n    IBRT_OTA_TWS_IMAGE_BUFF          = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x09,\n    IBRT_COMMON_OTA                   = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x0B,\n//    IBRT_OTA_TWS_IMAGE_BUFF_SLAVE    = APP_IBRT_CMD_BASE|APP_IBRT_OTA_TWS_CMD_PREFIX|0x0A,\n} app_ibrt_ota_tws_cmd_code_e;\n\n#ifdef IBRT_OTA\nextern uint32_t ibrt_ota_cmd_type;\nextern uint32_t twsBreakPoint;\n//extern uint8_t ibrt_connect_slave;\nextern uint8_t errOtaCode;\n#endif\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_ota_update.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_OTA_UPDATE_CMD__\n#define __APP_IBRT_OTA_UPDATE_CMD__\n#define APP_TWS_CTRL_BUFFER_LEN 512\n\n#include \"app_ibrt_custom_cmd.h\"\n\ntypedef enum\n{\n    APP_TWS_CMD_OTA_UPDATE_NOW = APP_IBRT_OTA_CMD_PREFIX | 0x01,\n    APP_TWS_CMD_UPDATE_SECTION = APP_IBRT_OTA_CMD_PREFIX | 0x02,\n    APP_TWS_CMD_CHECK_UPDATE_INFO = APP_IBRT_OTA_CMD_PREFIX | 0x03,\n    APP_TWS_CMD_CHECK_UPDATE_INFO2 = APP_IBRT_OTA_CMD_PREFIX | 0x04,\n    APP_TWS_CMD_SYNC_BREAKPIONT = APP_IBRT_OTA_CMD_PREFIX | 0x05,\n    APP_TWS_CMD_VALIDATION_DONE = APP_IBRT_OTA_CMD_PREFIX | 0x06,\n    //new customer cmd add here\n} app_ibrt_ota_cmd_code_e;\n\ntypedef struct\n{\n    uint8_t* address;\n    uint32_t length;\n} __attribute__((packed))ibrt_ota_check_cmd_t;\n\ntypedef struct\n{\n    uint32_t local_point;\n    uint32_t remote_point;\n} __attribute__((packed))ibrt_ota_sync_breakpoint_cmd_t;\n\ntypedef struct\n{\n    uint8_t flag;\n} __attribute__((packed))ibrt_ota_sync_validation_cmd_t;\n\ntypedef struct\n{\n    uint32_t  address;\n    uint32_t length;\n    uint8_t number;\n    uint32_t point;\n    uint32_t crc;\n    uint8_t buff[APP_TWS_CTRL_BUFFER_LEN];\n} __attribute__((packed))ibrt_ota_update_cmd_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid reset_error_list();\nuint32_t get_error_list();\nvoid set_all_error_list();\nvoid set_error_list(uint16_t list);\nvoid app_ibrt_view_update_sector();\nvoid app_ibrt_view_update_list();\nvoid app_ibrt_ota_check_update_list();\nvoid app_ibrt_ota_update_immediately();\nvoid app_ibrt_ota_force_update();\nvoid app_ibrt_ota_check_update_info();\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_peripheral_manager.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_PERIPHERAL_MANAGER_H__\n#define __APP_IBRT_PERIPHERAL_MANAGER_H__\n#include \n#include \"plat_types.h\"\n/*************************\n *   automate_cmd format\n *   item        len(byte)\n *   group_code  1\n *   opera_code  1\n *   test_times  1\n *   param_len   1\n *   *param      param_len(0-255)\n *************************/\n#define AUTOMATE_TEST_CMD_CRC_RECORD_LEN (2)\n#define AUTOMATE_TEST_CMD_PARAM_MAX_LEN (255)\n\ntypedef struct {\n  uint8_t group_code;\n  uint8_t opera_code;\n  uint8_t test_times;\n  uint8_t param_len;\n  uint8_t param[0];\n} AUTO_TEST_CMD_T;\n\ntypedef struct {\n  uint32_t message_id;\n  uint32_t message_ptr;\n  uint32_t message_Param0;\n  uint32_t message_Param1;\n  uint32_t message_Param2;\n} TWS_PD_MSG_BODY;\n\ntypedef struct {\n  TWS_PD_MSG_BODY msg_body;\n} TWS_PD_MSG_BLOCK;\n\nint app_ibrt_peripheral_mailbox_put(TWS_PD_MSG_BLOCK *msg_src);\nint app_ibrt_peripheral_mailbox_free(TWS_PD_MSG_BLOCK *msg_p);\nint app_ibrt_peripheral_mailbox_get(TWS_PD_MSG_BLOCK **msg_p);\nvoid app_ibrt_peripheral_thread_init(void);\nvoid app_ibrt_peripheral_run0(uint32_t ptr);\nvoid app_ibrt_peripheral_run1(uint32_t ptr, uint32_t param0);\nvoid app_ibrt_peripheral_run2(uint32_t ptr, uint32_t param0, uint32_t param1);\nvoid app_ibrt_peripheral_auto_test_stop(void);\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_rssi.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_RSSI_H__\n#define __APP_IBRT_RSSI_H__\n#if defined(IBRT)\n\ntypedef struct\n{\n    int8_t    fa_gain;\n    float     sample_ref;\n    int8_t    cur_buf_size_l;\n}tota_stutter_t;\n\nvoid app_ibrt_rssi_get_stutter(uint8_t * data,uint32_t * data_len);\nvoid app_ibrt_debug_parse(uint8_t *data, uint32_t data_len);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nvoid app_ibrt_ui_rssi_reset(void);\nvoid app_ibrt_ui_rssi_process(void);\nvoid app_ibrt_ui_check_roleswitch_timer_cb(void const *current_evt);\nvoid app_ibrt_get_peer_mobile_rssi(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_get_peer_mobile_rssi_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_get_peer_mobile_rssi_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n#ifdef __cplusplus\n    }\n#endif\n\n#endif\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_ui_test.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_UI_TEST_H__\n#define __APP_IBRT_UI_TEST_H__\n#include \"app_key.h\"\n#include \n#if defined(IBRT)\n\ntypedef void (*app_uart_test_function_handle)(void);\n\ntypedef struct {\n  const char *string;\n  app_uart_test_function_handle function;\n} app_uart_handle_t;\n\napp_uart_test_function_handle app_ibrt_ui_find_uart_handle(unsigned char *buf);\n\nvoid app_ibrt_ui_test_key_init(void);\n\nvoid app_ibrt_ui_test_init(void);\n\nint app_ibrt_ui_test_config_load(void *config);\n\nvoid app_ibrt_ui_sync_status(uint8_t status);\n\nvoid app_ibrt_ui_test_voice_assistant_key(APP_KEY_STATUS *status, void *param);\n\nvoid app_ibrt_search_ui_gpio_key_handle(APP_KEY_STATUS *status, void *param);\nvoid pwrkey_detinit(void);\nvoid startpwrkey_det(int ms);\n#endif\n#endif\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_ui_test_cmd_if.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_UI_TEST_CMD_IF_H__\n#define __APP_IBRT_UI_TEST_CMD_IF_H__\n#include \n\nextern void app_bt_volumedown();\nextern void app_bt_volumeup();\nextern void app_ibrt_nvrecord_rebuild(void);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid btif_pts_hf_create_link_with_pts(void);\nvoid btif_pts_av_create_channel_with_pts(void);\nvoid btif_pts_ar_connect_with_pts(void);\n\n\nvoid app_ibrt_ui_audio_play_test(void);\nvoid app_ibrt_ui_audio_pause_test(void);\nvoid app_ibrt_ui_audio_forward_test(void);\nvoid app_ibrt_ui_audio_backward_test(void);\nvoid app_ibrt_ui_avrcp_volume_up_test(void);\nvoid app_ibrt_ui_avrcp_volume_down_test(void);\nvoid app_ibrt_ui_hfsco_create_test(void);\nvoid app_ibrt_ui_hfsco_disc_test(void);\nvoid app_ibrt_ui_call_redial_test(void);\nvoid app_ibrt_ui_call_answer_test(void);\nvoid app_ibrt_ui_call_hangup_test(void);\nvoid app_ibrt_ui_local_volume_up_test(void);\nvoid app_ibrt_ui_local_volume_down_test(void);\nvoid app_ibrt_ui_get_tws_conn_state_test(void);\n\n\nvoid app_ibrt_ui_soft_reset_test(void);\nvoid app_ibrt_ui_iic_uart_switch_test(void);\nvoid app_ibrt_ui_get_a2dp_state_test(void);\nvoid app_ibrt_ui_get_avrcp_state_test(void);\nvoid app_ibrt_ui_get_hfp_state_test(void);\nvoid app_ibrt_ui_get_call_status_test();\nvoid app_ibrt_ui_get_ibrt_role_test(void);\n\nvoid app_ibrt_ui_soft_reset_test(void);\nvoid app_ibrt_ui_iic_uart_switch_test(void);\nvoid app_ibrt_ui_open_box_event_test(void);\nvoid app_ibrt_ui_fetch_out_box_event_test(void);\nvoid app_ibrt_ui_put_in_box_event_test(void);\nvoid app_ibrt_ui_close_box_event_test(void);\nvoid app_ibrt_ui_reconnect_event_test(void);\nvoid app_ibrt_ui_ware_up_event_test(void);\nvoid app_ibrt_ui_ware_down_event_test(void);\nvoid app_ibrt_ui_phone_connect_event_test(void);\nvoid app_ibrt_ui_shut_down_test(void);\nvoid app_ibrt_enable_tports_test(void);\nvoid app_ibrt_ui_tws_swtich_test(void);\nvoid app_ibrt_ui_suspend_ibrt_test(void);\nvoid app_ibrt_ui_resume_ibrt_test(void);\nvoid app_ibrt_ui_pairing_mode_test(void);\nvoid app_ibrt_ui_freeman_pairing_mode_test(void);\nvoid app_ibrt_inquiry_start_test(void);\nvoid app_ibrt_role_switch_test(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/app_ibrt/inc/app_ibrt_voice_report.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_VOICE_REPORT_H__\n#define __APP_IBRT_VOICE_REPORT_H__\n#include \n#include \"plat_types.h\"\ntypedef struct {\n  uint32_t aud_id;\n  uint32_t aud_pram;\n  uint32_t tg_tick;\n  uint32_t vol;\n} __attribute__((packed)) app_ibrt_voice_report_info_t;\n\ntypedef struct {\n  uint32_t aud_id;\n  uint32_t aud_pram;\n  uint32_t vol;\n} __attribute__((packed)) app_ibrt_voice_report_request_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nint app_ibrt_voice_report_trigger_checker(void);\nint app_ibrt_voice_report_trigger_init(uint32_t aud_id, uint32_t aud_pram);\nint app_ibrt_voice_report_trigger_deinit(void);\nvoid app_ibrt_send_voice_report_request_req(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_voice_report_request_req_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length);\nvoid app_ibrt_send_voice_report_start_req(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_voice_report_request_start_handler(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length);\nint app_ibrt_if_voice_report_handler(uint32_t aud_id, uint16_t aud_pram);\nbool app_ibrt_voice_report_is_me(uint32_t voice_chnlsel);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_auto_test.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_auto_test.h\"\n#include \"a2dp_decoder.h\"\n#include \"app_a2dp.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_anc.h\"\n#include \"app_audio.h\"\n#include \"app_battery.h\"\n#include \"app_ble_mode_switch.h\"\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_keyboard.h\"\n#include \"app_ibrt_peripheral_manager.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_ibrt_ui_test.h\"\n#include \"app_key.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"factory_section.h\"\n#include \"hal_timer.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_env.h\"\n#include \n\n#if defined(IBRT)\n#include \"btapp.h\"\nextern struct BT_DEVICE_T app_bt_device;\nextern int hfp_volume_get(enum BT_DEVICE_ID_T id);\nint bt_sco_player_get_codetype(void);\n\nAUTO_TEST_STATE_T auto_test_state_t = {0};\n\nuint16_t app_ibrt_auto_test_get_tws_page_timeout_value(void) {\n  return app_ibrt_ui_get_tws_page_timeout_value();\n}\n\n#ifdef BES_AUTOMATE_TEST\nvoid app_ibrt_auto_test_print_earphone_state(void const *n) {\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  auto_test_state_t.head[0] = 0xE1;\n  auto_test_state_t.head[1] = 0x38;\n  auto_test_state_t.head[2] = 0x7C;\n  auto_test_state_t.length = sizeof(auto_test_state_t);\n\n  // a2dp & hfp state\n  auto_test_state_t.bt_stream_state.local_volume =\n      app_bt_stream_local_volume_get();\n  auto_test_state_t.bt_stream_state.a2dp_volume =\n      a2dp_volume_get(BT_DEVICE_ID_1);\n  auto_test_state_t.bt_stream_state.hfp_volume = hfp_volume_get(BT_DEVICE_ID_1);\n  auto_test_state_t.bt_stream_state.a2dp_streamming = a2dp_is_music_ongoing();\n  auto_test_state_t.bt_stream_state.a2dp_codec_type =\n      app_bt_device.codec_type[BT_DEVICE_ID_1];\n  auto_test_state_t.bt_stream_state.a2dp_sample_rate =\n      app_bt_device.sample_rate[BT_DEVICE_ID_1];\n  auto_test_state_t.bt_stream_state.a2dp_sample_bit =\n      app_bt_device.sample_bit[BT_DEVICE_ID_1];\n\n  auto_test_state_t.bt_stream_state.sco_streaming = is_sco_mode();\n  auto_test_state_t.bt_stream_state.sco_codec_type =\n      (uint8_t)bt_sco_player_get_codetype();\n  app_ibrt_if_get_hfp_call_status(\n      (AppIbrtCallStatus *)&auto_test_state_t.bt_stream_state.call_status);\n\n  // media state\n  auto_test_state_t.bt_media_state.media_active =\n      bt_media_get_media_active(BT_DEVICE_ID_1);\n  auto_test_state_t.bt_media_state.curr_active_media =\n      bt_media_get_current_media();\n  auto_test_state_t.bt_media_state.promt_exist =\n      app_audio_list_playback_exist();\n\n  // ui state\n  auto_test_state_t.ui_state.current_ms = TICKS_TO_MS(hal_sys_timer_get());\n  auto_test_state_t.ui_state.cpu_freq = hal_sysfreq_get();\n  auto_test_state_t.ui_state.super_state = p_ibrt_ui->super_state;\n  auto_test_state_t.ui_state.active_event = p_ibrt_ui->active_event;\n  auto_test_state_t.ui_state.ibrt_sm_running = p_ibrt_ui->ibrt_sm_running;\n  auto_test_state_t.ui_state.ui_state = p_ibrt_ui->box_state;\n\n  if (IBRT_SLAVE != p_ibrt_ctrl->current_role) {\n    auto_test_state_t.ui_state.mobile_link_bt_role =\n        app_tws_ibrt_get_local_mobile_role();\n    auto_test_state_t.ui_state.mobile_link_bt_mode = p_ibrt_ctrl->mobile_mode;\n    auto_test_state_t.ui_state.mobile_constate = p_ibrt_ctrl->mobile_constate;\n    // auto_test_state_t.ui_state.mobile_connect =\n    // app_tws_ibrt_mobile_link_connected();\n  }\n  auto_test_state_t.ui_state.tws_role = p_ibrt_ctrl->current_role;\n  auto_test_state_t.ui_state.tws_link_bt_role =\n      app_tws_ibrt_get_local_tws_role();\n  auto_test_state_t.ui_state.tws_link_bt_mode = p_ibrt_ctrl->tws_mode;\n  auto_test_state_t.ui_state.tws_constate = p_ibrt_ctrl->tws_constate;\n  auto_test_state_t.ui_state.role_switch_state =\n      (p_ibrt_ctrl->slave_tws_switch_pending ||\n       p_ibrt_ctrl->master_tws_switch_pending);\n#ifdef __IAG_BLE_INCLUDE__\n  auto_test_state_t.ui_state.ble_state = app_ble_get_current_state();\n  auto_test_state_t.ui_state.ble_operation = app_ble_get_current_operation();\n  auto_test_state_t.ui_state.ble_connection_state = 0;\n  for (uint8_t i = 0; i < BLE_CONNECTION_MAX; i++) {\n    if (app_ble_is_connection_on(i)) {\n      auto_test_state_t.ui_state.ble_connection_state |= (1 << i);\n    }\n  }\n#endif\n\n  // TRACE(1, \"earphone len %d state :\", auto_test_state_t.length);\n  DUMP8(\"%02x\", (uint8_t *)&auto_test_state_t, auto_test_state_t.length);\n}\n\n#define APP_AUTO_TEST_PRINT_STATE_TIME_IN_MS 500\nosTimerDef(APP_AUTO_TEST_PRINT_STATE_TIMEOUT,\n           app_ibrt_auto_test_print_earphone_state);\nosTimerId app_auto_test_print_state_timeout_timer_id = NULL;\n#endif\n\nvoid app_ibrt_auto_test_init(void) {\n#ifdef BES_AUTOMATE_TEST\n  memset((uint8_t *)&auto_test_state_t, 0, sizeof(auto_test_state_t));\n  if (app_auto_test_print_state_timeout_timer_id == NULL) {\n    app_auto_test_print_state_timeout_timer_id = osTimerCreate(\n        osTimer(APP_AUTO_TEST_PRINT_STATE_TIMEOUT), osTimerPeriodic, NULL);\n    osTimerStart(app_auto_test_print_state_timeout_timer_id,\n                 APP_AUTO_TEST_PRINT_STATE_TIME_IN_MS);\n  }\n#endif\n}\n\nvoid app_ibrt_auto_test_inform_cmd_received(uint8_t group_code,\n                                            uint8_t operation_code) {\n  AUTO_TEST_TRACE(2, \"AUTO_TEST_CMD received:%d:%d:\", group_code,\n                  operation_code);\n}\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_auto_test_cmd_handle.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_auto_test_cmd_handle.h\"\n#include \"a2dp_decoder.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_anc.h\"\n#include \"app_battery.h\"\n#include \"app_ble_uart.h\"\n#include \"app_bt.h\"\n#include \"app_ibrt_auto_test.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_keyboard.h\"\n#include \"app_ibrt_peripheral_manager.h\"\n#include \"app_ibrt_ui_test.h\"\n#include \"app_ibrt_ui_test_cmd_if.h\"\n#include \"app_key.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"factory_section.h\"\n#include \"norflash_api.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(BISTO_ENABLED)\n#include \"gsound_custom_actions.h\"\n#include \"gsound_custom_ble.h\"\n#include \"gsound_custom_bt.h\"\n\n#endif\n#ifdef __IAG_BLE_INCLUDE__\n#include \"app.h\"\n#include \"app_ble_mode_switch.h\"\n#endif\n\n#ifdef BES_OTA\n#include \"ota_control.h\"\n#endif\n\n#if defined(IBRT)\n#ifdef BES_AUTOMATE_TEST\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_reboot_test\n Description  : system reboot test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/5/8\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_reboot_test(void) {\n  app_ibrt_peripheral_auto_test_stop();\n  app_reset();\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_factory_reset_test\n Description  : Factory reset test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/5/8\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_factory_reset_test(void) {\n  app_ibrt_peripheral_auto_test_stop();\n  nv_record_rebuild();\n  app_reset();\n}\n\n/*****************************************************************************\n Prototype    : app_tws_ibrt_disconnect_tws\n Description  : disconnect tws\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/24\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_disconnect_tws(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  btif_remote_device_t *remdev = NULL;\n\n  if (app_tws_ibrt_tws_link_connected()) {\n    remdev = btif_me_get_remote_device_by_handle(p_ibrt_ctrl->tws_conhandle);\n\n    if (remdev != NULL) {\n      app_tws_ibrt_disconnect_connection(remdev);\n    }\n  }\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_auto_test_voice_promt_handle\n Description  : handle voice promt test cmd handle\n Input        : uint8_t operation_code\n              : uint8_t *param\n              : uint8_t param_len\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2020/3/3\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nstatic void app_ibrt_ui_auto_test_voice_promt_handle(uint8_t operation_code,\n                                                     uint8_t *param,\n                                                     uint8_t param_len) {\n  TRACE(2, \"%s op_code 0x%x\", __func__, operation_code);\n  switch (operation_code) {\n  default:\n    break;\n  }\n}\n\n/*****************************************************************************\nPrototype    : app_ibrt_ui_auto_test_a2dp_handle\nDescription  : handle a2dp test cmd handle\nInput        : uint8_t operation_code\n             : uint8_t *param\n             : uint8_t param_len\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/3/3\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nstatic void app_ibrt_ui_auto_test_a2dp_handle(uint8_t operation_code,\n                                              uint8_t *param,\n                                              uint8_t param_len) {\n  TRACE(2, \"%s op_code 0x%x\", __func__, operation_code);\n\n  switch (operation_code) {\n  case A2DP_AUTO_TEST_AUDIO_PLAY:\n    app_ibrt_ui_audio_play_test();\n    break;\n  case A2DP_AUTO_TEST_AUDIO_PAUSE:\n    app_ibrt_ui_audio_pause_test();\n    break;\n  case A2DP_AUTO_TEST_AUDIO_FORWARD:\n    app_ibrt_ui_audio_forward_test();\n    break;\n  case A2DP_AUTO_TEST_AUDIO_BACKWARD:\n    app_ibrt_ui_audio_backward_test();\n    break;\n  case A2DP_AUTO_TEST_AVRCP_VOL_UP:\n    app_bt_volumeup();\n    break;\n  case A2DP_AUTO_TEST_AVRCP_VOL_DOWN:\n    app_bt_volumedown();\n    break;\n  default:\n    break;\n  }\n}\n\n/*****************************************************************************\nPrototype    : app_ibrt_ui_auto_test_hfp_handle\nDescription  : handle hfp test cmd handle\nInput        : uint8_t operation_code\n             : uint8_t *param\n             : uint8_t param_len\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/3/3\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nstatic void app_ibrt_ui_auto_test_hfp_handle(uint8_t operation_code,\n                                             uint8_t *param,\n                                             uint8_t param_len) {\n  TRACE(2, \"%s op_code 0x%x\", __func__, operation_code);\n\n  switch (operation_code) {\n  case HFP_AUTO_TEST_SCO_CREATE:\n    app_ibrt_ui_hfsco_create_test();\n    break;\n  case HFP_AUTO_TEST_SCO_DISC:\n    app_ibrt_ui_hfsco_disc_test();\n    break;\n  case HFP_AUTO_TEST_CALL_REDIAL:\n    app_ibrt_ui_call_redial_test();\n    break;\n  case HFP_AUTO_TEST_CALL_ANSWER:\n    app_ibrt_ui_call_answer_test();\n    break;\n  case HFP_AUTO_TEST_CALL_HANGUP:\n    app_ibrt_ui_call_hangup_test();\n    break;\n  case HFP_AUTO_TEST_VOLUME_UP:\n    app_ibrt_ui_local_volume_up_test();\n    break;\n  case HFP_AUTO_TEST_VOLUME_DOWN:\n    app_ibrt_ui_local_volume_down_test();\n    break;\n  default:\n    break;\n  }\n}\n/*****************************************************************************\nPrototype    : app_ibrt_ui_auto_test_ui_handle\nDescription  : handle UI test cmd handle\nInput        : uint8_t operation_code\n             : uint8_t *param\n             : uint8_t param_len\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/3/3\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nstatic void app_ibrt_ui_auto_test_ui_handle(uint8_t operation_code,\n                                            uint8_t *param, uint8_t param_len) {\n  TRACE(2, \"%s op_code 0x%x\", __func__, operation_code);\n\n  switch (operation_code) {\n  case UI_AUTO_TEST_OPEN_BOX:\n    app_ibrt_ui_open_box_event_test();\n    break;\n  case UI_AUTO_TEST_CLOSE_BOX:\n    app_ibrt_ui_close_box_event_test();\n    break;\n  case UI_AUTO_TEST_FETCH_OUT_BOX:\n    app_ibrt_ui_fetch_out_box_event_test();\n    break;\n  case UI_AUTO_TEST_PUT_IN_BOX:\n    app_ibrt_ui_put_in_box_event_test();\n    break;\n  case UI_AUTO_TEST_WEAR_UP:\n    app_ibrt_ui_ware_up_event_test();\n    break;\n  case UI_AUTO_TEST_WEAR_DOWN:\n    app_ibrt_ui_ware_down_event_test();\n    break;\n  case UI_AUTO_TEST_ROLE_SWITCH:\n    app_tws_if_trigger_role_switch();\n    break;\n  case UI_AUTO_TEST_PHONE_CONN_EVENT:\n    app_ibrt_ui_phone_connect_event_test();\n    break;\n  case UI_AUTO_TEST_RECONN_EVENT:\n    app_ibrt_ui_reconnect_event_test();\n    break;\n  case UI_AUTO_TEST_CONN_SECOND_MOBILE:\n    app_ibrt_ui_choice_connect_second_mobile();\n    break;\n  case UI_AUTO_TEST_MOBILE_TWS_DISC:\n    app_ibrt_if_disconnect_mobile_tws_link();\n    break;\n  case UI_AUTO_TEST_PAIRING_MODE:\n    app_ibrt_ui_pairing_mode_test();\n    break;\n  case UI_AUTO_TEST_FREEMAN_MODE:\n    app_ibrt_ui_freeman_pairing_mode_test();\n    break;\n  case UI_AUTO_TEST_SUSPEND_IBRT:\n    app_ibrt_ui_suspend_ibrt_test();\n    break;\n  case UI_AUTO_TEST_RESUME_IBRT:\n    app_ibrt_ui_resume_ibrt_test();\n    break;\n  case UI_AUTO_TEST_SHUT_DOWN:\n    app_ibrt_ui_shut_down_test();\n    break;\n  case UI_AUTO_TEST_REBOOT:\n    app_ibrt_ui_reboot_test();\n    break;\n  case UI_AUTO_TEST_FACTORY_RESET:\n    app_ibrt_ui_factory_reset_test();\n    break;\n  case UI_AUTO_TEST_ASSERT:\n    app_ibrt_peripheral_auto_test_stop();\n    ASSERT(false, \"Force Panic!!!\");\n    break;\n  case UI_AUTO_TEST_CONNECT_MOBILE:\n    app_ibrt_if_choice_mobile_connect(0);\n    break;\n  case UI_AUTO_TEST_DISCONNECT_MOBILE:\n    app_tws_ibrt_disconnect_mobile();\n    break;\n  case UI_AUTO_TEST_CONNECT_TWS:\n    app_tws_ibrt_create_tws_connection(\n        app_ibrt_auto_test_get_tws_page_timeout_value());\n    break;\n  case UI_AUTO_TEST_DISCONNECT_TWS:\n    app_ibrt_ui_disconnect_tws();\n    break;\n  case UI_AUTO_TEST_ENABLE_TPORTS:\n    app_ibrt_enable_tports_test();\n    break;\n  default:\n    break;\n  }\n}\n\n/*****************************************************************************\nPrototype    : app_ibrt_ui_auto_test_ai_simulate_button_action\nDescription  : simulate ai button action\nInput        : enum APP_KEY_EVENT_T eventCode\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/5/8\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_auto_test_ai_simulate_button_action(\n    enum APP_KEY_EVENT_T eventCode) {\n  APP_KEY_STATUS keyEvent;\n  keyEvent.code = APP_KEY_CODE_GOOGLE;\n  keyEvent.event = eventCode;\n  app_ibrt_ui_test_voice_assistant_key(&keyEvent, NULL);\n}\n\n/*****************************************************************************\nPrototype    : app_ibrt_ui_auto_test_ai_disconnect\nDescription  : disconnect AI connection\nInput        : None\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/5/8\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_auto_test_ai_disconnect(void) {\n#ifdef __AI_VOICE__\n  // if (app_ai_ble_is_connected() && AI_TRANSPORT_BLE !=\n  // app_ai_get_transport_type())\n  //{\n  // app_ai_disconnect_ble();\n  //}\n  // if (app_ai_spp_is_connected() && AI_TRANSPORT_SPP !=\n  // app_ai_get_transport_type())\n  //{\n  // app_ai_spp_disconnlink();\n  //}\n#endif\n\n#ifdef BISTO_ENABLED\n  // gsound_custom_ble_disconnect_ble_link();\n  // gsound_custom_bt_disconnect_all_channel();\n#endif\n}\n\n/*****************************************************************************\nPrototype    : app_ibrt_ui_auto_test_ai_handle\nDescription  : handle AI test cmd handle\nInput        : uint8_t operation_code\n             : uint8_t *param\n             : uint8_t param_len\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/3/3\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nstatic void app_ibrt_ui_auto_test_ai_handle(uint8_t operation_code,\n                                            uint8_t *param, uint8_t param_len) {\n  TRACE(2, \"%s op_code 0x%x\", __func__, operation_code);\n  switch (operation_code) {\n  case AI_AUTO_TEST_PTT_BUTTON_ACTION:\n    app_ibrt_ui_auto_test_ai_simulate_button_action((enum APP_KEY_EVENT_T) *\n                                                    param);\n    break;\n  case AI_AUTO_TEST_DISCONNECT_AI:\n    app_ibrt_ui_auto_test_ai_disconnect();\n    break;\n  default:\n    break;\n  }\n}\n\ntypedef struct {\n  uint8_t scanFilterPolicy;\n  uint16_t scanWindowInMs;\n  uint16_t scanIntervalInMs;\n} APP_IBRT_UI_AUTO_TEST_BLE_SCAN_PARAM_T;\n\ntypedef struct {\n  uint8_t conidx;\n  uint32_t min_interval_in_ms;\n  uint32_t max_interval_in_ms;\n  uint32_t supervision_timeout_in_ms;\n  uint8_t slaveLantency;\n} APP_IBRT_UI_AUTO_TEST_BLE_UPDATED_CONN_PARAM_T;\n\n/*****************************************************************************\nPrototype    : app_ibrt_ui_auto_test_ble_handle\nDescription  : handle ble test cmd handle\nInput        : uint8_t operation_code\n             : uint8_t *param\n             : uint8_t param_len\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/3/3\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nstatic void app_ibrt_ui_auto_test_ble_handle(uint8_t operation_code,\n                                             uint8_t *param,\n                                             uint8_t param_len) {\n  TRACE(2, \"%s op_code 0x%x\", __func__, operation_code);\n#ifdef __IAG_BLE_INCLUDE__\n  switch (operation_code) {\n  case BLE_AUTO_TEST_START_ADV: {\n    uint16_t advIntervalMs = *(uint16_t *)param;\n    app_ble_start_connectable_adv(advIntervalMs);\n    break;\n  }\n  case BLE_AUTO_TEST_STOP_ADV: {\n    app_ble_stop_activities();\n    break;\n  }\n  case BLE_AUTO_TEST_DISCONNECT: {\n    app_ble_disconnect_all();\n    break;\n  }\n  case BLE_AUTO_TEST_START_CONNECT: {\n    // six bytes ble address as the parameter\n    app_ble_start_connect(param);\n    break;\n  }\n  case BLE_AUTO_TEST_STOP_CONNECT: {\n    app_ble_stop_activities();\n    break;\n  }\n  case BLE_AUTO_TEST_START_SCAN: {\n    APP_IBRT_UI_AUTO_TEST_BLE_SCAN_PARAM_T *pScanParam =\n        (APP_IBRT_UI_AUTO_TEST_BLE_SCAN_PARAM_T *)param;\n    app_ble_start_scan(\n        (enum BLE_SCAN_FILTER_POLICY)(pScanParam->scanFilterPolicy),\n        pScanParam->scanWindowInMs, pScanParam->scanIntervalInMs);\n    break;\n  }\n  case BLE_AUTO_TEST_STOP_SCAN: {\n    app_ble_stop_activities();\n    break;\n  }\n  case BLE_AUTO_TEST_UPDATE_CONN_PARAM: {\n#ifdef __IAG_BLE_INCLUDE__\n    APP_IBRT_UI_AUTO_TEST_BLE_UPDATED_CONN_PARAM_T *pConnParam =\n        (APP_IBRT_UI_AUTO_TEST_BLE_UPDATED_CONN_PARAM_T *)param;\n    if (app_ble_is_connection_on(pConnParam->conidx)) {\n      l2cap_update_param(pConnParam->conidx, pConnParam->min_interval_in_ms,\n                         pConnParam->max_interval_in_ms,\n                         pConnParam->supervision_timeout_in_ms,\n                         pConnParam->slaveLantency);\n    }\n#endif\n    break;\n  }\n  default:\n    break;\n  }\n#endif\n}\n/*****************************************************************************\nPrototype    : app_ibrt_ui_auto_test_flash_handle\nDescription  : handle flash test cmd handle\nInput        : uint8_t operation_code\n             : uint8_t *param\n             : uint8_t param_len\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/3/3\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nstatic void app_ibrt_ui_auto_test_flash_handle(uint8_t operation_code,\n                                               uint8_t *param,\n                                               uint8_t param_len) {\n  TRACE(2, \"%s op_code 0x%x\", __func__, operation_code);\n  switch (operation_code) {\n  case FLASH_AUTO_TEST_PROGRAM:\n    break;\n  case FLASH_AUTO_TEST_ERASE:\n    break;\n  case FLASH_AUTO_TEST_FLUSH_NV: {\n    nv_record_flash_flush();\n    norflash_flush_all_pending_op();\n    break;\n  }\n  default:\n    break;\n  }\n}\n\n/*****************************************************************************\nPrototype    : app_ibrt_ui_automate_test_cmd_handler\nDescription  : ibrt ui automate test cmd handler\nInput        : uint8_t group_code\n: uint8_t operation_code\n: uint8_t *param\n: uint8_t param_len\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2020/3/3\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nextern \"C\" void app_ibrt_ui_automate_test_cmd_handler(uint8_t group_code,\n                                                      uint8_t operation_code,\n                                                      uint8_t *param,\n                                                      uint8_t param_len) {\n  switch (group_code) {\n  case AUTO_TEST_VOICE_PROMPT:\n    app_ibrt_ui_auto_test_voice_promt_handle(operation_code, param, param_len);\n    break;\n  case AUTO_TEST_A2DP:\n    app_ibrt_ui_auto_test_a2dp_handle(operation_code, param, param_len);\n    break;\n  case AUTO_TEST_HFP:\n    app_ibrt_ui_auto_test_hfp_handle(operation_code, param, param_len);\n    break;\n  case AUTO_TEST_UI:\n    app_ibrt_ui_auto_test_ui_handle(operation_code, param, param_len);\n    break;\n  case AUTO_TEST_AI:\n    app_ibrt_ui_auto_test_ai_handle(operation_code, param, param_len);\n    break;\n  case AUTO_TEST_BLE:\n    app_ibrt_ui_auto_test_ble_handle(operation_code, param, param_len);\n    break;\n  case AUTO_TEST_FLASH:\n    app_ibrt_ui_auto_test_flash_handle(operation_code, param, param_len);\n    break;\n  case AUTO_TEST_UNUSE:\n    break;\n  default:\n    break;\n  }\n}\n\n#endif\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_ble_adv.cpp",
    "content": "#include \"app_ibrt_ble_adv.h\"\n#include \"app_tws_ibrt.h\"\n#include \"cmsis_os.h\"\n#include \"co_bt_defines.h\"\n#include \"factory_section.h\"\n#include \"hal_trace.h\"\n#include \"me_api.h\"\n\nSLAVE_BLE_MODE_T slaveBleMode;\nstatic app_ble_adv_para_data_t app_ble_adv_para_data_cfg;\n#define APP_IBRT_BLE_ADV_DATA_MAX_LEN (31)\n#define APP_IBRT_BLE_SCAN_RSP_DATA_MAX_LEN (31)\n\nconst char *g_slave_ble_state_str[] = {\n    \"BLE_STATE_IDLE\",\n    \"BLE_ADVERTISING\",\n    \"BLE_STARTING_ADV\",\n    \"BLE_STOPPING_ADV\",\n};\n\nconst char *g_slave_ble_op_str[] = {\n    \"BLE_OP_IDLE\",\n    \"BLE_START_ADV\",\n    \"BLE_STOP_ADV\",\n    \"BLE_STOPPING_ADV\",\n};\n\n#define SET_SLAVE_BLE_STATE(newState)                                          \\\n  do {                                                                         \\\n    TRACE(3, \"[BLE][STATE]%s->%s at line %d\",                                  \\\n          g_slave_ble_state_str[slaveBleMode.state],                           \\\n          g_slave_ble_state_str[newState], __LINE__);                          \\\n    slaveBleMode.state = (newState);                                           \\\n  } while (0);\n\n#define SET_SLAVE_BLE_OP(newOp)                                                \\\n  do {                                                                         \\\n    TRACE(3, \"[BLE][OP]%s->%s at line %d\",                                     \\\n          g_slave_ble_op_str[slaveBleMode.op], g_slave_ble_op_str[newOp],      \\\n          __LINE__);                                                           \\\n    slaveBleMode.op = (newOp);                                                 \\\n  } while (0);\n/*****************************************************************************\n Prototype    : app_slave_ble_cmd_complete_callback\n Description  : stop ble adv\n Input        : const void *para\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History      :\n Date         : 2019/12/28\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_slave_ble_cmd_complete_callback(const void *para) {\n  slave_ble_cmd_comp_t *p_cmd_complete = (slave_ble_cmd_comp_t *)para;\n\n  switch (p_cmd_complete->cmd_opcode) {\n  case HCI_BLE_ADV_CMD_OPCODE:\n    if (!p_cmd_complete->param[0])\n      app_ibrt_ble_switch_activities();\n    else {\n      TRACE(2, \"%s error p_cmd_complete->param[0] %d\", __func__,\n            p_cmd_complete->param[0]);\n      SET_SLAVE_BLE_STATE(BLE_STATE_IDLE);\n      SET_SLAVE_BLE_OP(BLE_OP_IDLE);\n    }\n  default:\n    break;\n  }\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ble_adv_para_data_init\n Description  : initialize ble adv parameter and adv data\n Input        : None\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History      :\n Date         : 2019/12/28\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ble_adv_para_data_init(void) {\n  app_ble_adv_para_data_t *adv_para_cfg = &app_ble_adv_para_data_cfg;\n\n  adv_para_cfg->adv_type = ADV_CONN_UNDIR;\n  adv_para_cfg->advInterval_Ms = APP_IBRT_BLE_ADV_INTERVAL;\n  adv_para_cfg->own_addr_type = ADDR_PUBLIC;\n  adv_para_cfg->peer_addr_type = ADDR_PUBLIC;\n  adv_para_cfg->adv_chanmap = ADV_ALL_CHNLS_EN;\n  adv_para_cfg->adv_filter_policy = ADV_ALLOW_SCAN_ANY_CON_ANY;\n  memset(adv_para_cfg->bd_addr.address, 0, BTIF_BD_ADDR_SIZE);\n\n  const char *ble_name_in_nv = (const char *)factory_section_get_ble_name();\n  uint32_t nameLen = strlen(ble_name_in_nv);\n\n  ASSERT(APP_IBRT_BLE_ADV_DATA_MAX_LEN >= nameLen, \"ble adv data exceed\");\n\n  adv_para_cfg->adv_data_len = 0;\n  adv_para_cfg->adv_data[adv_para_cfg->adv_data_len++] = nameLen + 1;\n  adv_para_cfg->adv_data[adv_para_cfg->adv_data_len++] = 0x08;\n  memcpy(&adv_para_cfg->adv_data[adv_para_cfg->adv_data_len], ble_name_in_nv,\n         nameLen);\n  adv_para_cfg->adv_data_len += nameLen;\n\n  adv_para_cfg->scan_rsp_data_len = 0;\n  memset(adv_para_cfg->scan_rsp_data, 0, sizeof(adv_para_cfg->scan_rsp_data));\n\n  memset(&slaveBleMode, 0, sizeof(slaveBleMode));\n  btif_me_register_cmd_complete_callback(\n      HCI_CMD_COMPLETE_USER_BLE, app_ibrt_slave_ble_cmd_complete_callback);\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ble_set_adv_para_handler\n Description  : config ble adv parameter\n Input        : app_ble_adv_para_data_t *adv_para_cfg\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History      :\n Date         : 2019/12/28\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ble_set_adv_para_handler(app_ble_adv_para_data_t *adv_para_cfg) {\n  btif_adv_para_struct_t adv_para;\n  adv_para.adv_type = adv_para_cfg->adv_type;\n  adv_para.interval_max = adv_para_cfg->advInterval_Ms * 8 / 5;\n  adv_para.interval_min = adv_para_cfg->advInterval_Ms * 8 / 5;\n  adv_para.own_addr_type = adv_para_cfg->own_addr_type;\n  adv_para.peer_addr_type = adv_para_cfg->peer_addr_type;\n  adv_para.adv_chanmap = adv_para_cfg->adv_chanmap;\n  adv_para.adv_filter_policy = adv_para_cfg->adv_filter_policy;\n  memcpy(adv_para.bd_addr.address, adv_para_cfg->bd_addr.address,\n         BTIF_BD_ADDR_SIZE);\n\n  btif_me_ble_set_adv_parameters(&adv_para);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ble_set_adv_data_handler\n Description  : config ble adv data and scan response data\n Input        : app_ble_adv_para_data_t *adv_data_cfg\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History      :\n Date         : 2019/12/28\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ble_set_adv_data_handler(app_ble_adv_para_data_t *adv_data_cfg) {\n  btif_me_ble_set_adv_data(adv_data_cfg->adv_data_len, adv_data_cfg->adv_data);\n  btif_me_ble_set_scan_rsp_data(adv_data_cfg->scan_rsp_data_len,\n                                adv_data_cfg->scan_rsp_data);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ble_adv_start\n Description  : enable ble adv\n Input        : uint8_t adv_type, uint16_t advInterval\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History      :\n Date         : 2019/12/28\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ble_adv_start(uint8_t adv_type, uint16_t advInterval) {\n  TRACE(2, \"ble adv start with adv_type %d advIntervalms %dms\", adv_type,\n        advInterval);\n  app_ble_adv_para_data_cfg.adv_type = adv_type;\n  app_ble_adv_para_data_cfg.advInterval_Ms = advInterval;\n\n  switch (slaveBleMode.state) {\n  case BLE_ADVERTISING:\n    SET_SLAVE_BLE_STATE(BLE_STOPPING_ADV);\n    SET_SLAVE_BLE_OP(BLE_START_ADV);\n    btif_me_ble_set_adv_en(false);\n    break;\n  case BLE_STARTING_ADV:\n  case BLE_STOPPING_ADV:\n    SET_SLAVE_BLE_OP(BLE_START_ADV);\n    break;\n  case BLE_STATE_IDLE:\n    SET_SLAVE_BLE_STATE(BLE_STARTING_ADV);\n    app_ibrt_ble_set_adv_para_handler(&app_ble_adv_para_data_cfg);\n    app_ibrt_ble_set_adv_data_handler(&app_ble_adv_para_data_cfg);\n    btif_me_ble_set_adv_en(true);\n    break;\n  default:\n    break;\n  }\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ble_adv_stop\n Description  : disable ble adv\n Input        : None\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History      :\n Date         : 2019/12/28\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ble_adv_stop(void) {\n  TRACE(1, \"%s\", __func__);\n  SET_SLAVE_BLE_STATE(BLE_STOPPING_ADV);\n  SET_SLAVE_BLE_OP(BLE_STOP_ADV);\n  btif_me_ble_set_adv_en(false);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ble_switch_activities\n Description  : ble adv state machine switch\n Input        : None\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History      :\n Date         : 2019/12/28\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ble_switch_activities(void) {\n  switch (slaveBleMode.state) {\n  case BLE_STARTING_ADV:\n    SET_SLAVE_BLE_STATE(BLE_ADVERTISING);\n    if (slaveBleMode.op == BLE_START_ADV) {\n      SET_SLAVE_BLE_OP(BLE_OP_IDLE);\n    }\n    break;\n  case BLE_STOPPING_ADV:\n    SET_SLAVE_BLE_STATE(BLE_STATE_IDLE);\n    if (slaveBleMode.op == BLE_STOP_ADV) {\n      SET_SLAVE_BLE_OP(BLE_OP_IDLE);\n    }\n    break;\n  default:\n    break;\n  }\n  switch (slaveBleMode.op) {\n  case BLE_START_ADV:\n    app_ibrt_ble_adv_start(ADV_CONN_UNDIR,\n                           app_ble_adv_para_data_cfg.advInterval_Ms);\n    break;\n  default:\n    break;\n  }\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ble_adv_data_config\n Description  : config ble adv data and scan response data by customer\n Input        : uint8_t *advData, uint8_t advDataLen\n              : uint8_t *scanRspData, uint8_t scanRspDataLen\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History      :\n Date         : 2019/12/28\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ble_adv_data_config(uint8_t *advData, uint8_t advDataLen,\n                                  uint8_t *scanRspData,\n                                  uint8_t scanRspDataLen) {\n  ASSERT(APP_IBRT_BLE_ADV_DATA_MAX_LEN >= advDataLen,\n         \"ble adv data len exceed\");\n  ASSERT(APP_IBRT_BLE_SCAN_RSP_DATA_MAX_LEN >= scanRspDataLen,\n         \"scan response data len exceed\")\n  memcpy(app_ble_adv_para_data_cfg.adv_data, advData, advDataLen);\n  memcpy(app_ble_adv_para_data_cfg.scan_rsp_data, scanRspData, scanRspDataLen);\n  app_ble_adv_para_data_cfg.adv_data_len = advDataLen;\n  app_ble_adv_para_data_cfg.scan_rsp_data_len = scanRspDataLen;\n}\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_customif_cmd.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_customif_cmd.h\"\n#include \"app_dip.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"string.h\"\n#ifdef BISTO_ENABLED\n#include \"gsound_custom.h\"\n#endif\n#ifdef __DUAL_MIC_RECORDING__\n#include \"ai_control.h\"\n#include \"app_recording_handle.h\"\n#endif\n#include \"apps.h\"\n#if defined(IBRT)\n/*\n * custom cmd handler add here, this is just a example\n */\n\n#define app_ibrt_custom_cmd_rsp_timeout_handler_null (0)\n#define app_ibrt_custom_cmd_rsp_handler_null (0)\n#define app_ibrt_custom_cmd_rx_handler_null (0)\n\n#ifdef BISTO_ENABLED\nstatic void app_ibrt_bisto_dip_sync(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_bisto_dip_sync_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                            uint16_t length);\n#endif\n#ifdef __DUAL_MIC_RECORDING__\nstatic void app_ibrt_customif_audio_send(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_customif_audio_send_done(uint16_t cmdcode,\n                                              uint16_t rsp_seq,\n                                              uint8_t *ptrParam,\n                                              uint16_t paramLen);\nstatic void app_ibrt_customif_audio_send_handler(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length);\n#endif\nvoid app_ibrt_customif_test1_cmd_send(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_customif_test1_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length);\n\nstatic void app_ibrt_customif_test2_cmd_send(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_customif_test2_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length);\nstatic void app_ibrt_customif_test2_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_customif_test2_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                         uint8_t *p_buff,\n                                                         uint16_t length);\nstatic void app_ibrt_customif_test3_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length);\n\nstatic void app_ibrt_customif_test4_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length);\nstatic const app_tws_cmd_instance_t g_ibrt_custom_cmd_handler_table[] = {\n#ifdef GFPS_ENABLED\n    {APP_TWS_CMD_SHARE_FASTPAIR_INFO, \"SHARE_FASTPAIR_INFO\",\n     app_ibrt_share_fastpair_info,\n     app_ibrt_shared_fastpair_info_received_handler, 0,\n     app_ibrt_custom_cmd_rsp_timeout_handler_null,\n     app_ibrt_custom_cmd_rsp_handler_null},\n#endif\n\n#ifdef BISTO_ENABLED\n    {APP_TWS_CMD_BISTO_DIP_SYNC, \"BISTO_DIP_SYNC\", app_ibrt_bisto_dip_sync,\n     app_ibrt_bisto_dip_sync_handler, 0, app_ibrt_cmd_rsp_timeout_handler_null,\n     app_ibrt_cmd_rsp_handler_null},\n#endif\n#ifdef __DUAL_MIC_RECORDING__\n    {\n        APP_IBRT_CUSTOM_CMD_DMA_AUDIO,\n        \"TWS_CMD_DMA_AUDIO\",\n        app_ibrt_customif_audio_send,\n        app_ibrt_customif_audio_send_handler,\n        0,\n        app_ibrt_custom_cmd_rsp_timeout_handler_null,\n        app_ibrt_custom_cmd_rsp_handler_null,\n        app_ibrt_customif_audio_send_done,\n    },\n#endif\n    {APP_IBRT_CUSTOM_CMD_TEST1, \"TWS_CMD_TEST1\",\n     app_ibrt_customif_test1_cmd_send, app_ibrt_customif_test1_cmd_send_handler,\n     0, app_ibrt_custom_cmd_rsp_timeout_handler_null,\n     app_ibrt_custom_cmd_rsp_handler_null},\n    {APP_IBRT_CUSTOM_CMD_TEST2, \"TWS_CMD_TEST2\",\n     app_ibrt_customif_test2_cmd_send, app_ibrt_customif_test2_cmd_send_handler,\n     RSP_TIMEOUT_DEFAULT, app_ibrt_customif_test2_cmd_send_rsp_timeout_handler,\n     app_ibrt_customif_test2_cmd_send_rsp_handler},\n    {APP_IBRT_CUSTOM_CMD_TEST3, \"TWS_CMD_TEST3\",\n     app_ibrt_customif_test3_cmd_send, app_ibrt_customif_test3_cmd_send_handler,\n     0, app_ibrt_custom_cmd_rsp_timeout_handler_null,\n     app_ibrt_custom_cmd_rsp_handler_null},\n    {APP_IBRT_CUSTOM_CMD_TEST4, \"TWS_CMD_TEST4\",\n     app_ibrt_customif_test4_cmd_send, app_ibrt_customif_test4_cmd_send_handler,\n     0, app_ibrt_custom_cmd_rsp_timeout_handler_null,\n     app_ibrt_custom_cmd_rsp_handler_null},\n};\n\nint app_ibrt_customif_cmd_table_get(void **cmd_tbl, uint16_t *cmd_size) {\n  *cmd_tbl = (void *)&g_ibrt_custom_cmd_handler_table;\n  *cmd_size = ARRAY_SIZE(g_ibrt_custom_cmd_handler_table);\n  return 0;\n}\n\n#ifdef BISTO_ENABLED\nstatic void app_ibrt_bisto_dip_sync(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_BISTO_DIP_SYNC, p_buff, length);\n}\n\nstatic void app_ibrt_bisto_dip_sync_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                            uint16_t length) {\n  gsound_mobile_type_get_callback(*(MOBILE_CONN_TYPE_E *)p_buff);\n}\n#endif\n#ifdef __DUAL_MIC_RECORDING__\nstatic void app_ibrt_customif_audio_send(uint8_t *p_buff, uint16_t length) {\n  TRACE(1, \"%s\", __func__);\n  app_recording_send_data_to_master();\n}\n\nstatic void app_ibrt_customif_audio_send_handler(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length) {\n  ai_function_handle(CALLBACK_STORE_SLAVE_DATA, (void *)p_buff, length);\n  // TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_customif_audio_send_done(uint16_t cmdcode,\n                                              uint16_t rsp_seq,\n                                              uint8_t *ptrParam,\n                                              uint16_t paramLen) {\n  TRACE(1, \"%s\", __func__);\n  app_recording_audio_send_done();\n}\n#endif\nvoid app_ibrt_customif_cmd_test(ibrt_custom_cmd_test_t *cmd_test) {\n  tws_ctrl_send_cmd(APP_IBRT_CUSTOM_CMD_TEST1, (uint8_t *)cmd_test,\n                    sizeof(ibrt_custom_cmd_test_t));\n  tws_ctrl_send_cmd(APP_IBRT_CUSTOM_CMD_TEST2, (uint8_t *)cmd_test,\n                    sizeof(ibrt_custom_cmd_test_t));\n  tws_ctrl_send_cmd(APP_IBRT_CUSTOM_CMD_TEST3, (uint8_t *)cmd_test,\n                    sizeof(ibrt_custom_cmd_test_t));\n}\n\nvoid app_ibrt_customif_test1_cmd_send(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_without_rsp(APP_IBRT_CUSTOM_CMD_TEST1, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_customif_test1_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length) {\n  TRACE(1, \"%s\", __func__);\n  app_ibrt_search_ui_handle_key((APP_KEY_STATUS *)p_buff, NULL);\n}\n\nstatic void app_ibrt_customif_test2_cmd_send(uint8_t *p_buff, uint16_t length) {\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_customif_test2_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length) {\n  tws_ctrl_send_rsp(APP_IBRT_CUSTOM_CMD_TEST2, rsp_seq, NULL, 0);\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_customif_test2_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length) {\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_customif_test2_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                         uint8_t *p_buff,\n                                                         uint16_t length) {\n  TRACE(1, \"%s\", __func__);\n}\n\nvoid app_ibrt_customif_test3_cmd_send(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_without_rsp(APP_IBRT_CUSTOM_CMD_TEST3, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nextern void app_ibrt_ui_test_mtu_change_sync_notify(void);\nstatic void app_ibrt_customif_test3_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length) {\n  /*TRACE(3,\"%s,latency_mode_is_open = %d\", __func__,latency_mode_is_open);\n  if(*p_buff == latency_mode_is_open)return;\n  if(*p_buff == 0)\n          latency_mode_is_open = 1;\n  else if(*p_buff == 1)\n          latency_mode_is_open = 0;\n  app_ibrt_ui_test_mtu_change_sync_notify();*/\n}\n\nvoid app_ibrt_customif_test4_cmd_send(uint8_t *p_buff, uint16_t length) {\n  TRACE(3, \"%s\", __func__);\n  app_ibrt_send_cmd_without_rsp(APP_IBRT_CUSTOM_CMD_TEST4, p_buff, length);\n}\nextern void app_ibrt_sync_volume_info();\nstatic void app_ibrt_customif_test4_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length) {\n  TRACE(3, \"!!!!app_ibrt_customif_test4_cmd_send_handler\");\n  app_ibrt_sync_volume_info();\n}\n\n#ifdef CUSTOM_BITRATE\n//#include \"product_config.h\"\n#include \"nvrecord_extension.h\"\nextern void a2dp_avdtpcodec_aac_user_configure(uint32_t bitrate,\n                                               uint8_t user_configure);\nextern void a2dp_avdtpcodec_sbc_user_configure(uint32_t bitpool,\n                                               uint8_t user_configure);\nextern void app_audio_dynamic_update_dest_packet_mtu(uint8_t codec_index,\n                                                     uint8_t packet_mtu,\n                                                     uint8_t user_configure);\n\nvoid app_ibrt_user_a2dp_info_sync_tws_share_cmd_send(uint8_t *p_buff,\n                                                     uint16_t length) {\n  tws_ctrl_send_cmd(APP_TWS_CMD_A2DP_CONFIG_SYNC, p_buff, length);\n}\n\nstatic void app_ibrt_user_a2dp_info_sync(uint8_t *p_buff, uint16_t length) {\n  if ((app_tws_ibrt_mobile_link_connected())) {\n    app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_A2DP_CONFIG_SYNC, p_buff, length);\n  }\n}\n\nstatic void app_ibrt_user_a2dp_info_sync_handler(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length) {\n  ibrt_custome_codec_t *a2dp_user_config_ptr = (ibrt_custome_codec_t *)p_buff;\n  TRACE(4, \"%s %d %d %d\", __func__, a2dp_user_config_ptr->aac_bitrate,\n        a2dp_user_config_ptr->sbc_bitpool,\n        a2dp_user_config_ptr->audio_latentcy);\n  if ((app_tws_ibrt_slave_ibrt_link_connected())) {\n    a2dp_avdtpcodec_sbc_user_configure(a2dp_user_config_ptr->sbc_bitpool, true);\n    a2dp_avdtpcodec_aac_user_configure(a2dp_user_config_ptr->aac_bitrate, true);\n    app_audio_dynamic_update_dest_packet_mtu(\n        0,\n        (a2dp_user_config_ptr->audio_latentcy -\n         USER_CONFIG_AUDIO_LATENCY_ERROR) /\n            3,\n        true); // sbc\n    app_audio_dynamic_update_dest_packet_mtu(\n        1,\n        (a2dp_user_config_ptr->audio_latentcy -\n         USER_CONFIG_AUDIO_LATENCY_ERROR) /\n            23,\n        true); // aac\n    uint32_t lock = nv_record_pre_write_operation();\n    nv_record_get_extension_entry_ptr()->a2dp_user_info.aac_bitrate =\n        a2dp_user_config_ptr->aac_bitrate;\n    nv_record_get_extension_entry_ptr()->a2dp_user_info.sbc_bitpool =\n        a2dp_user_config_ptr->sbc_bitpool;\n    nv_record_get_extension_entry_ptr()->a2dp_user_info.audio_latentcy =\n        a2dp_user_config_ptr->audio_latentcy;\n    nv_record_post_write_operation(lock);\n    nv_record_flash_flush();\n  }\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_customif_ui.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_customif_ui.h\"\n#include \"anc_wnr.h\"\n#include \"app_battery.h\"\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_hfp.h\"\n#include \"app_ibrt_customif_cmd.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_spp.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"app_vendor_cmd_evt.h\"\n#include \"apps.h\"\n#include \"besaud_api.h\"\n#include \"cmsis_os.h\"\n#include \"me_api.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_extension.h\"\n#include \n\n#ifdef MEDIA_PLAYER_SUPPORT\n#include \"app_media_player.h\"\n#endif\n#ifdef BLE_ENABLE\n#include \"app_ble_mode_switch.h\"\n#endif\n\n#if defined(IBRT)\n#ifdef ANC_APP\nextern \"C\" void app_anc_sync_status(void);\n#endif\nvoid app_ibrt_customif_ui_vender_event_handler_ind(uint8_t evt_type,\n                                                   uint8_t *buffer,\n                                                   uint8_t length) {\n  uint8_t subcode = evt_type;\n  POSSIBLY_UNUSED ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  switch (subcode) {\n  case HCI_DBG_SNIFFER_INIT_CMP_EVT_SUBCODE:\n    break;\n\n  case HCI_DBG_IBRT_CONNECTED_EVT_SUBCODE:\n    app_tws_if_ibrt_connected_handler();\n    break;\n\n  case HCI_DBG_IBRT_DISCONNECTED_EVT_SUBCODE:\n    app_tws_if_ibrt_disconnected_handler();\n    break;\n\n  case HCI_DBG_IBRT_SWITCH_COMPLETE_EVT_SUBCODE:\n\n    /*\n     *  New Master do some special action,such as update battery to phone,\n     * since TWS switch may lead to old TWS master update battery fail\n     */\n#if defined(SUPPORT_BATTERY_REPORT) || defined(SUPPORT_HF_INDICATORS)\n    if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n      uint8_t battery_level;\n      TRACE(0, \"New TWS master update battery report after tws switch\");\n      app_battery_get_info(NULL, &battery_level, NULL);\n      app_hfp_battery_report(battery_level);\n    }\n#endif\n\n    app_tws_if_tws_role_switch_complete_handler(p_ibrt_ctrl->current_role);\n    break;\n\n  case HCI_NOTIFY_CURRENT_ADDR_EVT_CODE:\n    break;\n\n  case HCI_DBG_TRACE_WARNING_EVT_CODE:\n    break;\n\n  case HCI_SCO_SNIFFER_STATUS_EVT_CODE:\n    break;\n\n  case HCI_DBG_RX_SEQ_ERROR_EVT_SUBCODE:\n    break;\n\n  case HCI_LL_MONITOR_EVT_CODE:\n    break;\n\n  case HCI_GET_TWS_SLAVE_MOBILE_RSSI_CODE:\n    break;\n\n  default:\n    break;\n  }\n}\nextern void startonce_delay_event_Timer_(int ms);\nextern void startreconnectfail_delay_report(int ms);\n\nextern uint8_t once_event_case;\nextern bool IsMobileLinkLossing;\nextern bool IsTwsLinkdiscon;\n\nextern bool IsTwsLinkLossing;\nextern void app_ibrt_customif_test4_cmd_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_customif_ui_global_handler_ind(ibrt_link_type_e link_type,\n                                             uint8_t evt_type, uint8_t status) {\n  static ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n  static app_ibrt_ui_t *p_ui_ctrl = app_ibrt_ui_get_ctx();\n  TRACE(0, \"%s,evt_type = %d,link_type = %d,status = %d\", __func__, evt_type,\n        link_type, status);\n  switch (evt_type) {\n  case BTIF_BTEVENT_LINK_CONNECT_CNF: // An outgoing ACL connection is up\n                                      // fall through\n    if ((!IsMobileLinkLossing) && (MOBILE_LINK == link_type) &&\n        (p_ui_ctrl->box_state != IBRT_IN_BOX_CLOSED) &&\n        ((status == BTIF_BEC_NO_ERROR) || (status == BTIF_BEC_PAGE_TIMEOUT))) {\n      TRACE(3, \"xqd log 1 -- reconnected mobile fail\\n\");\n      // app_voice_report(APP_STATUS_INDICATION_BOTHSCAN,0);\n      startreconnectfail_delay_report(1200);\n    }\n    if ((!IsTwsLinkLossing) && (TWS_LINK == link_type) &&\n        (p_ui_ctrl->box_state != IBRT_IN_BOX_CLOSED) &&\n        ((status == BTIF_BEC_NO_ERROR) || (status == BTIF_BEC_PAGE_TIMEOUT))) {\n      TRACE(3, \"xqd log 1 -- reconnected TWS fail\\n\");\n    }\n    break;\n  case BTIF_BTEVENT_LINK_CONNECT_IND: // An incoming ACL connection is up\n    if (MOBILE_LINK == link_type) {\n      if (BTIF_BEC_NO_ERROR == status) {\n        app_status_indication_set(APP_STATUS_INDICATION_CONNECTED);\n        app_tws_if_mobile_connected_handler(p_ibrt_ctrl->mobile_addr.address);\n      }\n    }\n    break;\n  case BTIF_BTEVENT_LINK_DISCONNECT:\n    if ((MOBILE_LINK == link_type) &&\n        (p_ui_ctrl->box_state != IBRT_IN_BOX_CLOSED) &&\n        ((status == BTIF_BEC_CONNECTION_TIMEOUT) ||\n         (status == BTIF_BEC_LOW_RESOURCES))) {\n      TRACE(3, \"xqd log 1 -- mobile linkloss\\n\");\n      IsMobileLinkLossing = TRUE;\n      nv_record_flash_flush();\n    }\n    if (!app_tws_ibrt_mobile_link_connected()) {\n      app_ibrt_if_sniff_checker_reset();\n    }\n    if (MOBILE_LINK == link_type) {\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                    BT_DEVICE_ID_1, MAX_RECORD_NUM);\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                    BT_DEVICE_ID_1, MAX_RECORD_NUM);\n      app_tws_if_mobile_disconnected_handler(p_ibrt_ctrl->mobile_addr.address);\n    }\n    if (TWS_LINK == link_type) {\n#ifdef MEDIA_PLAYER_SUPPORT\n      app_tws_sync_prompt_manager_reset();\n#endif\n    }\n\n    break;\n  case BTIF_STACK_LINK_DISCONNECT_COMPLETE:\n    //       app_status_indication_set(APP_STATUS_INDICATION_DISCONNECTED);\n    if ((MOBILE_LINK == link_type) &&\n        (p_ui_ctrl->box_state != IBRT_IN_BOX_CLOSED) &&\n        ((status == BTIF_BEC_USER_TERMINATED) ||\n         (status == BTIF_BEC_LOCAL_TERMINATED))) {\n      if ((app_tws_ibrt_tws_link_connected()) &&\n          (p_ibrt_ctrl->current_role == IBRT_SLAVE)) {\n        TRACE(0, \"4TWS connected and This is Slave!!!\");\n      } /*else{\n                       once_event_case = 2;\n                       startonce_delay_event_Timer_(1500);\n                }*/\n    }\n\n    if ((MOBILE_LINK == link_type) &&\n        (p_ui_ctrl->box_state != IBRT_IN_BOX_CLOSED) &&\n        ((status == BTIF_BEC_CONNECTION_TIMEOUT) ||\n         (status == BTIF_BEC_LOW_RESOURCES))) {\n      TRACE(3, \"xqd log 2 -- mobile linkloss\\n\");\n      IsMobileLinkLossing = TRUE;\n      nv_record_flash_flush();\n      if (p_ibrt_ctrl->current_role != IBRT_SLAVE) {\n        once_event_case = 4;\n        startonce_delay_event_Timer_(5000);\n      }\n    } else if ((TWS_LINK == link_type) &&\n               (p_ui_ctrl->box_state != IBRT_IN_BOX_CLOSED) &&\n               ((status == BTIF_BEC_CONNECTION_TIMEOUT) ||\n                (status == BTIF_BEC_LOW_RESOURCES))) {\n      TRACE(3, \"xqd log 3 -- tws linkloss\\n\");\n      IsTwsLinkLossing = true;\n      once_event_case = 4;\n      nv_record_flash_flush();\n      startonce_delay_event_Timer_(10000);\n      TRACE(3, \"MyLog: The TWS connection is lost, reset the indication!!!\");\n      if (!app_device_bt_is_connected() && !IsMobileLinkLossing) {\n        TRACE(3, \"MyLog: The TWS connection is lost, reset the indication!!!\");\n        // app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n      }\n    }\n    break;\n\n  case BTIF_BTEVENT_ROLE_CHANGE:\n    break;\n\n  case BTIF_BTEVENT_BES_AUD_CONNECTED: {\n    // tws link callback when besaud connection complete\n    if (TWS_LINK == link_type) {\n      /*if((p_ibrt_ctrl->current_role == IBRT_MASTER))\n      {\n              app_ibrt_customif_test4_cmd_send(&status,1);\n      }*/\n      if (latency_mode_is_open)\n        app_ibrt_customif_test3_cmd_send(&latency_mode_is_open, 1);\n      if (!IsTwsLinkdiscon) {\n        // startdelay_report_tone(1000,APP_STATUS_INDICATION_DUDU);\n        // app_status_indication_set(APP_STATUS_INDICATION_TWS_CONNECTED);\n      }\n      IsTwsLinkdiscon = false;\n      // app_voice_report(APP_STATUS_INDICATION_CONNECTED, 0);\n    }\n    if (BTIF_BEC_NO_ERROR == status) {\n      TRACE(3, \"tjmLOG----------------------TJM!!!!!current_role = 0x%x\",\n            p_ibrt_ctrl->current_role);\n#ifdef ANC_APP\n      app_anc_sync_status();\n#endif\n#ifdef ANC_WNR_ENABLED\n      app_wnr_sync_state();\n#endif\n      if (p_ibrt_ctrl->current_role == IBRT_MASTER &&\n          app_ibrt_ui_get_enter_pairing_mode()) {\n#if defined(MEDIA_PLAYER_SUPPORT)\n        app_voice_report(APP_STATUS_INDICATION_CONNECTED, 0);\n#endif\n        app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n      } else {\n        app_status_indication_set(APP_STATUS_INDICATION_CONNECTED);\n      }\n\n      app_tws_if_tws_connected_handler();\n    }\n\n  } break;\n\n  case BTIF_BTEVENT_BES_AUD_DISCONNECTED:\n    app_tws_if_tws_disconnected_handler();\n    if (!app_poweroff_flag && !IsTwsLinkLossing && !IsMobileLinkLossing) {\n      TRACE(3, \"xqd--log: TWS is disconnected and it isn't tws link lossed.\");\n    } else {\n      IsTwsLinkdiscon = true;\n    }\n    break;\n\n  case BTIF_BTEVENT_ENCRYPTION_CHANGE:\n    break;\n\n  case BTIF_BTEVENT_MODE_CHANGE:\n    break;\n\n  default:\n    break;\n  }\n}\nvoid app_ibrt_customif_open_box_complete_ind(void) {}\nvoid app_ibrt_customif_close_box_complete_ind(void) {}\nvoid app_ibrt_customif_fetch_out_complete_ind(void) {}\nvoid app_ibrt_customif_put_in_complete_ind(void) {}\nvoid app_ibrt_customif_wear_up_complete_ind(void) {}\nvoid app_ibrt_customif_wear_down_complete_ind(void) {}\nvoid app_ibrt_customif_ui_global_event_update(ibrt_event_type evt_type,\n                                              ibrt_ui_state_e old_state,\n                                              ibrt_ui_state_e new_state,\n                                              ibrt_action_e action,\n                                              ibrt_ui_error_e status) {\n  switch (new_state) {\n  case IBRT_UI_IDLE:\n    if (IBRT_UI_IDLE != old_state) {\n      // callback when UI event completed\n      switch (evt_type) {\n      case IBRT_OPEN_BOX_EVENT:\n        app_ibrt_customif_open_box_complete_ind();\n        break;\n      case IBRT_FETCH_OUT_EVENT:\n        app_ibrt_customif_fetch_out_complete_ind();\n        break;\n      case IBRT_PUT_IN_EVENT:\n        app_ibrt_customif_put_in_complete_ind();\n        break;\n      case IBRT_CLOSE_BOX_EVENT:\n        app_ibrt_customif_close_box_complete_ind();\n        break;\n      case IBRT_WEAR_UP_EVENT:\n        app_ibrt_customif_wear_up_complete_ind();\n        break;\n      case IBRT_WEAR_DOWN_EVENT:\n        app_ibrt_customif_wear_down_complete_ind();\n        break;\n      default:\n        break;\n      }\n    }\n    break;\n\n  case IBRT_UI_IDLE_WAIT:\n    break;\n\n  case IBRT_UI_W4_TWS_CONNECTION:\n    break;\n\n  case IBRT_UI_W4_TWS_INFO_EXCHANGE_COMPLETE:\n    break;\n\n  case IBRT_UI_W4_TWS_BT_MSS_COMPLETE:\n    break;\n\n  case IBRT_UI_W4_SET_ENV_COMPLETE:\n    break;\n\n  case IBRT_UI_W4_MOBILE_CONNECTION:\n    break;\n\n  case IBRT_UI_W4_MOBILE_MSS_COMPLETE:\n    break;\n\n  case IBRT_UI_W4_MOBILE_ENTER_ACTIVE_MODE:\n    break;\n\n  case IBRT_UI_W4_START_IBRT_COMPLETE:\n    break;\n\n  case IBRT_UI_W4_IBRT_DATA_EXCHANGE_COMPLETE:\n    break;\n\n  case IBRT_UI_W4_TWS_SWITCH_COMPLETE:\n    break;\n\n  case IBRT_UI_W4_SM_STOP:\n    break;\n\n  default:\n    break;\n  }\n}\n/*\n * custom tws switch interface\n * tws switch cmd send sucess, return true, else return false\n */\nbool app_ibrt_customif_ui_tws_switch(void) { return app_ibrt_ui_tws_switch(); }\n\n/*\n * custom tws switching check interface\n * whether doing tws switch now, return true, else return false\n */\nbool app_ibrt_customif_ui_is_tws_switching(void) {\n  return app_ibrt_ui_is_tws_switching();\n}\n\n/*\n * custom reconfig bd_addr\n */\nvoid app_ibrt_customif_ui_reconfig_bd_addr(bt_bdaddr_t local_addr,\n                                           bt_bdaddr_t peer_addr,\n                                           ibrt_role_e nv_role) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  p_ibrt_ctrl->local_addr = local_addr;\n  p_ibrt_ctrl->peer_addr = peer_addr;\n  p_ibrt_ctrl->nv_role = nv_role;\n\n  if (!p_ibrt_ctrl->is_ibrt_search_ui) {\n    if (IBRT_MASTER == p_ibrt_ctrl->nv_role) {\n      p_ibrt_ctrl->peer_addr = local_addr;\n      btif_me_set_bt_address(p_ibrt_ctrl->local_addr.address);\n    } else if (IBRT_SLAVE == p_ibrt_ctrl->nv_role) {\n      p_ibrt_ctrl->local_addr = peer_addr;\n      btif_me_set_bt_address(p_ibrt_ctrl->local_addr.address);\n    } else {\n      ASSERT(0, \"%s nv_role error\", __func__);\n    }\n  }\n  p_ibrt_ui->bonding_success = true;\n}\n/*custom can block connect mobile if needed*/\nbool app_ibrt_customif_connect_mobile_needed_ind(void) { return true; }\n\nvoid app_ibrt_customif_mobile_connected_ind(bt_bdaddr_t *addr) {\n#ifdef BLE_ENABLE\n  app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n#endif\n\n  app_ibrt_if_config_keeper_mobile_update(addr);\n}\n\nvoid app_ibrt_customif_ibrt_connected_ind(bt_bdaddr_t *addr) {\n  app_ibrt_if_config_keeper_mobile_update(addr);\n}\n\nvoid app_ibrt_customif_tws_connected_ind(bt_bdaddr_t *addr) {\n  app_ibrt_if_config_keeper_tws_update(addr);\n}\n\nvoid app_ibrt_customif_profile_state_change_ind(uint32_t profile,\n                                                uint8_t connected) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  TRACE(2, \"custom if profle=%x state change to =%x\", profile, connected);\n\n  switch (profile) {\n  case BTIF_APP_A2DP_PROFILE_ID:\n    if (connected) {\n      // TRACE(0,\"cutomif A2DP profile connected\");\n      // ibrt slave\n      if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n        // TO DO\n      }\n      // ibrt master\n      else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n        // TO DO\n      }\n      // no tws connected\n      else {\n        // TO DO\n      }\n    } else {\n      // TRACE(0,\"cutomif A2DP profile disconnected\");\n      // ibrt slave\n      if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n        // TO DO\n      }\n      // ibrt master\n      else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n        // TO DO\n      }\n      // no tws connected\n      else {\n        // TO DO\n      }\n    }\n    break;\n\n  case BTIF_APP_AVRCP_PROFILE_ID:\n    if (connected) {\n      // TRACE(0,\"cutomif AVRCP profile connected\");\n      // ibrt slave\n      if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n        // TO DO\n      }\n      // ibrt master\n      else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n        // TO DO\n      }\n      // no tws connected\n      else {\n        // TO DO\n      }\n    } else {\n      // TRACE(0,\"cutomif AVRCP profile disconnected\");\n      // ibrt slave\n      if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n        // TO DO\n      }\n      // ibrt master\n      else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n        // TO DO\n      }\n      // no tws connected\n      else {\n        // TO DO\n      }\n    }\n    break;\n\n  case BTIF_APP_HFP_PROFILE_ID:\n    if (connected) {\n      // TRACE(0,\"cutomif HFP profile connected\");\n      // ibrt slave\n      if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n        // TO DO\n      }\n      // ibrt master\n      else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n        // TO DO\n      }\n      // no tws connected\n      else {\n        // TO DO\n      }\n    } else {\n      // TRACE(0,\"cutomif HFP profile disconnected\");\n      // ibrt slave\n      if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n        // TO DO\n      }\n      // ibrt master\n      else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n        // TO DO\n      }\n      // no tws connected\n      else {\n        // TO DO\n      }\n    }\n    break;\n\n  case BTIF_APP_SPP_CLIENT_AI_VOICE_ID:\n  case BTIF_APP_SPP_SERVER_AI_VOICE_ID:\n  case BTIF_APP_SPP_SERVER_GREEN_ID:\n  case BTIF_APP_SPP_CLIENT_CCMP_ID:\n  case BTIF_APP_SPP_CLIENT_RED_ID:\n  case BTIF_APP_SPP_SERVER_RED_ID:\n  case BTIF_APP_SPP_SERVER_TOTA_ID:\n  case BTIF_APP_SPP_SERVER_GSOUND_CTL_ID:\n  case BTIF_APP_SPP_SERVER_GSOUND_AUD_ID:\n  case BTIF_APP_SPP_SERVER_BES_OTA_ID:\n  case BTIF_APP_SPP_SERVER_FP_RFCOMM_ID:\n  case BTIF_APP_SPP_SERVER_TOTA_GENERAL_ID:\n    if (connected) {\n      // TRACE(0,\"cutomif SPP profile connected\");\n      // ibrt slave\n      if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n        // TO DO\n      }\n      // ibrt master\n      else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n        // TO DO\n      }\n      // no tws connected\n      else {\n        // TO DO\n      }\n\n    } else {\n      // TRACE(0,\"cutomif SPP profile disconnected\");\n      // ibrt slave\n      if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n        // TO DO\n      }\n      // ibrt master\n      else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n        // TO DO\n      }\n      // no tws connected\n      else {\n        // TO DO\n      }\n    }\n    break;\n\n  default:\n    TRACE(1, \"unknown profle=%x state change\", profile);\n    break;\n  }\n}\n\n/******************************reconnectfail_delay_report_timer*********************************************************/\nosTimerId reconnectfail_delay_reportid = NULL;\nvoid startreconnectfail_delay_report(int ms);\nvoid stopreconnectfail_delay_report(void);\nstatic void reconnectfail_delay_reportfun(const void *);\nosTimerDef(defreconnectfail_delay_report, reconnectfail_delay_reportfun);\nvoid reconnectfail_delay_reportinit(void) {\n  reconnectfail_delay_reportid = osTimerCreate(\n      osTimer(defreconnectfail_delay_report), osTimerOnce, (void *)0);\n}\n\nstatic void reconnectfail_delay_reportfun(const void *) {\n  static ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n  TRACE(3, \"\\n\\n!!!!!!enter %s\\n\\n\", __func__);\n  if ((p_ibrt_ctrl->access_mode == 0x3) &&\n      (p_ibrt_ctrl->current_role != IBRT_SLAVE)) {\n    app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n    app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n  }\n}\n\nvoid startreconnectfail_delay_report(int ms) {\n  TRACE(3, \"\\n\\n !!!!!!!!!!start %s\\n\\n\", __func__);\n  osTimerStart(reconnectfail_delay_reportid, ms);\n}\n\nvoid stopreconnectfail_delay_report(void) {\n\n  TRACE(3, \"\\n\\n!!!!!!!!!!  stop %s\\n\\n\", __func__);\n  osTimerStop(reconnectfail_delay_reportid);\n}\n\n/********************************reconnectfail_delay_report_timer*******************************************************/\nvoid app_ibrt_customif_ui_pairing_set(\n    trigger_pairing_mode_type_e trigger_type) {\n  TRACE(2, \"%s: %d\", __func__, __LINE__);\n}\n\nvoid app_ibrt_customif_ui_pairing_clear(\n    trigger_pairing_mode_type_e trigger_type) {\n  TRACE(2, \"%s: %d\", __func__, __LINE__);\n}\n\n/*\n * custom config main function\n */\n\nint app_ibrt_customif_ui_start(void) {\n  ibrt_ui_config_t config;\n\n  // zero init the config\n  memset(&config, 0, sizeof(ibrt_ui_config_t));\n\n  // freeman mode config, default should be false\n  config.freeman_enable = false;\n\n  // dont do role switch with mobile when enter freeman mode\n  config.freeman_dont_role_switch = false;\n\n  // tws earphone set the same addr, UI will be flexible, default should be true\n  config.tws_use_same_addr = true;\n\n  // ibrt slave will reconnect to mobile if tws connect failed, default should\n  // be true\n  config.slave_reconnect_enable = true;\n\n  // do tws switch when wearup or weardown, must be true because MIC will be\n  // with IBRT master\n  config.wear_updown_tws_switch_enable = true;\n\n  // pairing mode default value, default should be set false\n  config.enter_pairing_mode = false;\n\n  // following cases the reconnect will be fail for freeman, please set to true\n  // if you want to reconnect successful:\n  // 1. freeman has link key but mobile deleted the link key\n  // 2. freeman changed its bt address after reboot and use the new address to\n  // reconnect mobile\n  config.freeman_accept_mobile_new_pairing = false;\n\n  // for some proj no box key, default should be false;\n  config.enter_pairing_on_empty_mobile_addr = true;\n\n  // for some proj no box key, default should be false\n  config.enter_pairing_on_reconnect_mobile_failed = true;\n\n  // when mobile has connected, enter_pairing_on_reconnect_mobile_failed will be\n  // cleared, default false\n  config.enter_pairing_on_reconnect_mobile_failed_once = false;\n\n  // for some proj no box key, default should be false\n  config.enter_pairing_on_mobile_disconnect = true;\n\n  // for 08 error reconnect event, default must be true\n  config.disc_tws_before_reconnect_mobile = true;\n  config.wait_time_before_disc_tws = 3000;\n\n  // do tws switch when RSII value change, default should be true\n  config.tws_switch_according_to_rssi_value = false;\n\n  // disable tws switch, NOT recommended to open\n  config.disable_tws_switch = false;\n\n  // disable tws switch, NOT recommended to open\n  config.disable_stop_ibrt = true;\n\n  // exchange snoop info by BLE_box, special custom config, default should be\n  // false\n  config.snoop_via_ble_enable = false;\n  // controller basband monitor\n  config.lowlayer_monitor_enable = false;\n\n  config.delay_exit_sniff = true;\n  config.delay_ms_exit_sniff = 3000;\n\n  config.check_plugin_excute_closedbox_event = true;\n\n  config.share_tws_info_done = false;\n\n  config.nv_slave_enter_pairing_on_mobile_disconnect = true;\n  config.nv_slave_enter_pairing_on_empty_mobile_addr = true;\n\n  // only allow paired mobile device incoming when not in paring mode,default\n  // should be false\n  config.mobile_incoming_filter_unpaired = false;\n  // close box debounce time config\n  config.close_box_event_wait_response_timeout =\n      IBRT_UI_CLOSE_BOX_EVENT_WAIT_RESPONSE_TIMEOUT;\n\n  // do tws switch when RSII value change, timer threshold\n  config.role_switch_timer_threshold = IBRT_UI_ROLE_SWITCH_TIME_THRESHOLD;\n\n  // do tws switch when rssi value change over threshold\n  config.rssi_threshold = IBRT_UI_ROLE_SWITCH_THRESHOLD_WITH_RSSI;\n\n  // wait time before launch reconnect event\n  config.reconnect_mobile_wait_response_timeout =\n      IBRT_UI_RECONNECT_MOBILE_WAIT_RESPONSE_TIMEOUT;\n\n  // reconnect event internal config wait timer when tws disconnect\n  config.reconnect_wait_ready_timeout =\n      IBRT_UI_MOBILE_RECONNECT_WAIT_READY_TIMEOUT;\n  config.reconnect_mobile_wait_ready_timeout =\n      IBRT_UI_MOBILE_RECONNECT_WAIT_READY_TIMEOUT;\n  config.reconnect_tws_wait_ready_timeout =\n      IBRT_UI_TWS_RECONNECT_WAIT_READY_TIMEOUT;\n  config.reconnect_ibrt_wait_response_timeout =\n      IBRT_UI_RECONNECT_IBRT_WAIT_RESPONSE_TIMEOUT;\n  config.nv_master_reconnect_tws_wait_response_timeout =\n      IBRT_UI_NV_MASTER_RECONNECT_TWS_WAIT_RESPONSE_TIMEOUT;\n  config.nv_slave_reconnect_tws_wait_response_timeout =\n      IBRT_UI_NV_SLAVE_RECONNECT_TWS_WAIT_RESPONSE_TIMEOUT;\n\n  // pairing mode timeout config\n  config.disable_bt_scan_timeout = IBRT_UI_DISABLE_BT_SCAN_TIMEOUT;\n\n  // open box reconnect mobile times config\n  config.open_reconnect_mobile_max_times =\n      IBRT_UI_OPEN_RECONNECT_MOBILE_MAX_TIMES;\n\n  // open box reconnect tws times config\n  config.open_reconnect_tws_max_times = IBRT_UI_OPEN_RECONNECT_TWS_MAX_TIMES;\n\n  // connection timeout reconnect mobile times config\n  config.reconnect_mobile_max_times = IBRT_UI_RECONNECT_MOBILE_MAX_TIMES;\n\n  // connection timeout reconnect tws times config\n  config.reconnect_tws_max_times = IBRT_UI_RECONNECT_TWS_MAX_TIMES;\n\n  // connection timeout reconnect ibrt times config\n  config.reconnect_ibrt_max_times = IBRT_UI_RECONNECT_IBRT_MAX_TIMES;\n\n  // reconnect tws one cycle\n  config.tws_reconnect_cycle = IBRT_TWS_RECONNECT_ONE_CYCLE;\n\n  // reconnect mobile one cycle\n  config.mobile_reconnect_cycle = IBRT_MOBILE_RECONNECT_ONE_CYCLE;\n\n  // BES internal config, DO NOT modify\n  config.long_private_poll_interval = IBRT_UI_LONG_POLL_INTERVAL;\n  config.default_private_poll_interval = IBRT_UI_DEFAULT_POLL_INTERVAL;\n  config.short_private_poll_interval = IBRT_UI_SHORT_POLL_INTERVAL;\n  config.default_private_poll_interval_in_sco =\n      IBRT_UI_DEFAULT_POLL_INTERVAL_IN_SCO;\n  config.short_private_poll_interval_in_sco =\n      IBRT_UI_SHORT_POLL_INTERVAL_IN_SCO;\n  config.default_bt_tpoll = IBRT_TWS_BT_TPOLL_DEFAULT;\n\n  // for fast connect when only one headset in the nearby\n  config.tws_page_timeout_on_last_success =\n      IBRT_TWS_PAGE_TIMEOUT_ON_CONNECT_SUCCESS_LAST;\n  config.tws_page_timeout_on_last_failed =\n      IBRT_TWS_PAGE_TIMEOUT_ON_CONNECT_FAILED_LAST;\n  config.mobile_page_timeout = IBRT_MOBILE_PAGE_TIMEOUT;\n  config.tws_page_timeout_on_reconnect_mobile_failed =\n      IBRT_TWS_PAGE_TIMEOUT_ON_RECONNECT_MOBILE_FAILED;\n  config.tws_page_timeout_on_reconnect_mobile_success =\n      IBRT_TWS_PAGE_TIMEOUT_ON_RECONNECT_MOBILE_SUCCESS;\n\n  // tws connection timeout\n  config.tws_connection_timeout = IBRT_UI_TWS_CONNECTION_TIMEOUT;\n\n  config.rx_seq_error_timeout = IBRT_UI_RX_SEQ_ERROR_TIMEOUT;\n  config.rx_seq_error_threshold = IBRT_UI_RX_SEQ_ERROR_THRESHOLD;\n  config.rx_seq_recover_wait_timeout = IBRT_UI_RX_SEQ_ERROR_RECOVER_TIMEOUT;\n\n  config.rssi_monitor_timeout = IBRT_UI_RSSI_MONITOR_TIMEOUT;\n\n  config.wear_updown_detect_supported = false;\n  config.stop_ibrt_timeout = IBRT_UI_STOP_IBRT_TIMEOUT;\n\n  config.radical_scan_interval_nv_slave = IBRT_UI_RADICAL_SAN_INTERVAL_NV_SLAVE;\n  config.radical_scan_interval_nv_master =\n      IBRT_UI_RADICAL_SAN_INTERVAL_NV_MASTER;\n  config.event_hung_timeout = IBRT_EVENT_HUNG_TIMEOUT;\n  config.rssi_tws_switch_threshold = IBRT_TWS_SWITCH_RSSI_THRESHOLD;\n  config.stop_ibrt_wait_time_after_tws_switch = IBRT_STOP_IBRT_WAIT_TIME;\n  config.tws_conn_failed_wait_time = TWS_CONN_FAILED_WAIT_TIME;\n\n  config.sm_running_timeout = SM_RUNNING_TIMEOUT;\n  config.peer_sm_running_timeout = PEER_SM_RUNNING_TIMEOUT;\n  config.reconnect_peer_sm_running_timeout = RECONNECT_PEER_SM_RUNNING_TIMEOUT;\n  config.connect_no_03_timeout = CONNECT_NO_03_TIMEOUT;\n  config.disconnect_no_05_timeout = DISCONNECT_NO_05_TIMEOUT;\n\n  config.tws_switch_tx_data_protect = true;\n  config.tws_cmd_send_timeout = IBRT_UI_TWS_CMD_SEND_TIMEOUT;\n  config.tws_cmd_send_counter_threshold = IBRT_UI_TWS_COUNTER_THRESHOLD;\n  config.tws_switch_stable_timeout = IBRT_UI_TWS_SWITCH_STABLE_TIMEOUT;\n\n  config.invoke_event_when_box_closed = true;\n\n  // if open_box/close box detect supported, may open this config to speed up\n  // connection setup\n  config.tws_stay_when_close_box = false;\n  config.free_tws_timeout = IBRT_UI_DISC_TWS_TIMEOUT;\n\n  config.profile_concurrency_supported = false;\n\n  config.audio_sync_mismatch_resume_version = 2;\n  config.filter_duplicate_event = true;\n\n  app_ibrt_if_register_global_handler_ind(\n      app_ibrt_customif_ui_global_handler_ind);\n  app_ibrt_if_register_vender_handler_ind(\n      app_ibrt_customif_ui_vender_event_handler_ind);\n  app_ibrt_if_register_global_event_update_ind(\n      app_ibrt_customif_ui_global_event_update);\n  app_ibrt_if_register_link_connected_ind(\n      app_ibrt_customif_mobile_connected_ind,\n      app_ibrt_customif_ibrt_connected_ind,\n      app_ibrt_customif_tws_connected_ind);\n  app_ibrt_if_register_profile_state_change_ind(\n      app_ibrt_customif_profile_state_change_ind);\n  app_ibrt_if_register_connect_mobile_needed_ind(\n      app_ibrt_customif_connect_mobile_needed_ind);\n  app_ibrt_if_register_pairing_mode_ind(app_ibrt_customif_ui_pairing_set,\n                                        app_ibrt_customif_ui_pairing_clear);\n  app_ibrt_if_config(&config);\n\n  if (config.delay_exit_sniff) {\n    app_ibrt_if_sniff_checker_init(config.delay_ms_exit_sniff);\n  }\n  reconnectfail_delay_reportinit();\n  return 0;\n}\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_if.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_if.h\"\n#include \"a2dp_decoder.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_tws.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_bt_stream.h\"\n#include \"app_ibrt_a2dp.h\"\n#include \"app_ibrt_hf.h\"\n#include \"app_ibrt_if_internal.h\"\n#include \"app_ibrt_nvrecord.h\"\n#include \"app_ibrt_ui_test.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_sync_a2dp_status.h\"\n#include \"app_tws_ibrt_cmd_sync_hfp_status.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"besaud_api.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"btapp.h\"\n#include \"cmsis_os.h\"\n#include \"crc32.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord.h\"\n#include \n#ifdef BLE_ENABLE\n#include \"app_ble_include.h\"\n#endif\n\n#ifdef IBRT_OTA\n#include \"ota_control.h\"\n#endif\n\n#if defined(TOTA) || defined(TEST_OVER_THE_AIR_ENANBLED)\n#include \"app_spp_tota.h\"\n#endif\n\nextern struct BT_DEVICE_T app_bt_device;\n\nextern uint8_t avrcp_get_media_status(void);\n\n#if defined(IBRT)\n\nstatic uint32_t tws_sniff_block_start = 0;\nstatic uint32_t tws_sniff_block_next_sec = 0;\nvoid app_ibrt_if_register_tws_switch_needed_ind(\n    APP_IBRT_IF_TWS_SWITCH_NEEDED_IND tws_switch_need_ind) {\n  app_ibrt_ui_register_tws_switch_needed_ind(tws_switch_need_ind);\n}\n\nvoid app_ibrt_if_register_connect_mobile_needed_ind(\n    APP_IBRT_IF_CONNECT_MOBILE_NEEDED_IND connect_moible_need_ind) {\n  app_ibrt_ui_register_connect_mobile_needed_ind(connect_moible_need_ind);\n}\n\nvoid app_ibrt_if_register_vender_handler_ind(\n    APP_IBRT_IF_VENDER_EVENT_HANDLER_IND handler) {\n  app_ibrt_ui_register_vender_event_update_ind(handler);\n}\n\nvoid app_ibrt_if_register_global_handler_ind(\n    APP_IBRT_IF_GLOBAL_HANDLER_IND handler) {\n  app_ibrt_ui_register_global_handler_ind(handler);\n}\n\nvoid app_ibrt_if_register_global_event_update_ind(\n    APP_IBRT_IF_GLOBAL_EVENT_UPDATE_IND handler) {\n  app_ibrt_ui_register_global_event_update_ind(handler);\n}\n\nvoid app_ibrt_if_register_pairing_mode_ind(\n    APP_IBRT_UI_PAIRING_MODE_HANDLER_IND set_callback,\n    APP_IBRT_UI_PAIRING_MODE_HANDLER_IND clear_callback) {\n  app_ibrt_ui_register_pairing_mode_ind(set_callback, clear_callback);\n}\n\nvoid app_ibrt_if_register_cmd_complete_ind(\n    APP_IBRT_UI_CMD_COMPLETE_HANDLER_IND cmd_complete_ind) {\n  app_ibrt_ui_register_cmd_complete_ind(cmd_complete_ind);\n}\n\nvoid app_ibrt_if_register_link_connected_ind(\n    APP_IBRT_UI_CONNECTED_HANDLER_IND mobile_connected_ind,\n    APP_IBRT_UI_CONNECTED_HANDLER_IND ibrt_connected_ind,\n    APP_IBRT_UI_CONNECTED_HANDLER_IND tws_connected_ind) {\n  app_ibrt_ui_register_link_connected_ind(\n      mobile_connected_ind, ibrt_connected_ind, tws_connected_ind);\n}\n\nvoid app_ibrt_if_register_profile_state_change_ind(\n    APP_IBRT_IF_PROFILE_STATE_CHANGE_IND handler) {\n  app_ibrt_ui_register_profile_state_change_ind(handler);\n}\n\ntypedef struct {\n  ibrt_config_t ibrt_config;\n  nvrec_btdevicerecord rec_mobile;\n  nvrec_btdevicerecord rec_peer;\n  uint8_t reserved __attribute__((aligned(4)));\n  uint32_t crc;\n} ibrt_config_ram_bak_t;\n\nibrt_config_ram_bak_t REBOOT_CUSTOM_PARAM_LOC ibrt_config_ram_bak;\n\nint app_ibrt_if_config_keeper_clear(void) {\n  memset(&ibrt_config_ram_bak, 0, sizeof(ibrt_config_ram_bak));\n  return 0;\n}\n\nvoid app_ibrt_if_set_silent_mode(void) {\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  p_ibrt_ui->silent_mode = true;\n  app_ibrt_ui_event_entry(IBRT_TWS_PAIRING_EVENT);\n}\n\nvoid app_ibrt_if_clear_silent_mode(void) {\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  p_ibrt_ui->silent_mode = false;\n  app_ibrt_ui_judge_scan_type(IBRT_RESTORE_SCAN, NO_LINK_TYPE,\n                              IBRT_UI_NO_ERROR);\n}\n\nint app_ibrt_if_config_keeper_flush(void) {\n  ibrt_config_ram_bak.crc =\n      crc32(0, (uint8_t *)(&ibrt_config_ram_bak),\n            (sizeof(ibrt_config_ram_bak_t) - sizeof(uint32_t)));\n  TRACE(2, \"%s crc:%08x\", __func__, ibrt_config_ram_bak.crc);\n  return 0;\n}\n\nint app_ibrt_if_volume_ptr_update(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  btif_remote_device_t *remDev = NULL;\n\n  if (app_tws_ibrt_mobile_link_connected()) {\n    remDev = btif_me_get_remote_device_by_handle(p_ibrt_ctrl->mobile_conhandle);\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    remDev = btif_me_get_remote_device_by_handle(p_ibrt_ctrl->ibrt_conhandle);\n  }\n\n  if (remDev) {\n    app_bt_stream_volume_ptr_update(\n        (uint8_t *)btif_me_get_remote_device_bdaddr(remDev));\n  }\n\n  return 0;\n}\n\nvoid app_ibrt_if_pairing_mode_refresh(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (p_ibrt_ctrl->nv_role == IBRT_MASTER) {\n    app_ibrt_ui_event_entry(IBRT_TWS_PAIRING_EVENT);\n  } else {\n    if (!btif_besaud_is_connected()) {\n      app_ibrt_ui_set_enter_pairing_mode(IBRT_TWS_PAIR_MODE_ENTER);\n      app_ibrt_ui_judge_scan_type(IBRT_ENTER_PAIRING_MODE_TRIGGER, NO_LINK_TYPE,\n                                  0);\n    } else {\n      tws_ctrl_send_cmd(APP_TWS_CMD_PAIRING_MODE_REFRESH, NULL, 0);\n    }\n  }\n}\n\nint app_ibrt_if_config_keeper_mobile_update(bt_bdaddr_t *addr) {\n  nvrec_btdevicerecord *nv_record = NULL;\n  nvrec_btdevicerecord *rambak_record = NULL;\n\n  rambak_record = &ibrt_config_ram_bak.rec_mobile;\n\n  if (!nv_record_btdevicerecord_find(addr, &nv_record)) {\n    TRACE(1, \"%s success\", __func__);\n    DUMP8(\"%02x \", nv_record->record.bdAddr.address,\n          sizeof(nv_record->record.bdAddr.address));\n    DUMP8(\"%02x \", nv_record->record.linkKey,\n          sizeof(nv_record->record.linkKey));\n    ibrt_config_ram_bak.ibrt_config.mobile_addr = *addr;\n    *rambak_record = *nv_record;\n    app_ibrt_if_config_keeper_flush();\n    app_ibrt_if_volume_ptr_update();\n  } else {\n    TRACE(1, \"%s failure\", __func__);\n  }\n\n  return 0;\n}\n\nint app_ibrt_if_config_keeper_tws_update(bt_bdaddr_t *addr) {\n  nvrec_btdevicerecord *nv_record = NULL;\n  nvrec_btdevicerecord *rambak_record = NULL;\n\n  rambak_record = &ibrt_config_ram_bak.rec_peer;\n\n  if (!nv_record_btdevicerecord_find(addr, &nv_record)) {\n    TRACE(1, \"%s success\", __func__);\n    DUMP8(\"%02x \", nv_record->record.bdAddr.address,\n          sizeof(nv_record->record.bdAddr.address));\n    DUMP8(\"%02x \", nv_record->record.linkKey,\n          sizeof(nv_record->record.linkKey));\n    ibrt_config_ram_bak.ibrt_config.peer_addr = *addr;\n    *rambak_record = *nv_record;\n    app_ibrt_if_config_keeper_flush();\n    app_ibrt_if_volume_ptr_update();\n  } else {\n    TRACE(1, \"%s failure\", __func__);\n  }\n\n  return 0;\n}\n/*\n * tws preparation before tws switch if needed\n */\n#ifdef IBRT_OTA\nextern void ota_control_send_start_role_switch(void);\n#endif\nbool app_ibrt_if_tws_switch_prepare_needed(uint32_t *wait_ms) {\n  __attribute__((unused)) ibrt_ctrl_t *p_ibrt_ctrl =\n      app_tws_ibrt_get_bt_ctrl_ctx();\n  bool ret = false;\n\n#ifdef BLE_ENABLE\n  ble_callback_evnet_t event;\n  event.evt_type = BLE_CALLBACK_RS_START;\n  app_ble_core_global_callback_event(&event, NULL);\n#endif\n\n#if defined(__AI_VOICE__) || defined(BISTO_ENABLED)\n  p_ibrt_ctrl->ibrt_ai_role_switch_handle =\n      app_ai_tws_role_switch_prepare(wait_ms);\n  if (p_ibrt_ctrl->ibrt_ai_role_switch_handle) {\n    p_ibrt_ctrl->ibrt_role_switch_handle_user |=\n        (1 << IBRT_ROLE_SWITCH_USER_AI);\n  }\n#endif\n\n#ifdef IBRT_OTA\n  if (app_get_bes_ota_state()) {\n    p_ibrt_ctrl->ibrt_role_switch_handle_user |=\n        (1 << IBRT_ROLE_SWITCH_USER_OTA);\n    *wait_ms = 800;\n  }\n#endif\n\n  if (p_ibrt_ctrl->ibrt_role_switch_handle_user) {\n    ret = true;\n  }\n\n  app_tws_if_role_switch_started_handler();\n\n  TRACE(2, \"tws_switch_prepare_needed=%d, wait_ms=%d\", ret, *wait_ms);\n  return ret;\n}\n/*\n * tws preparation before tws switch\n */\nvoid app_ibrt_if_tws_swtich_prepare(void) {\n#if defined(BISTO_ENABLED)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (p_ibrt_ctrl->ibrt_ai_role_switch_handle & (1 << AI_SPEC_GSOUND)) {\n    app_ai_tws_role_switch();\n  }\n#endif\n\n#ifdef IBRT_OTA\n  ibrt_ctrl_t *ota_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if ((app_get_bes_ota_state()) &&\n      (ota_ibrt_ctrl->ibrt_role_switch_handle_user &\n       IBRT_ROLE_SWITCH_USER_OTA)) {\n    app_set_ota_role_switch_initiator(true);\n    bes_ota_send_role_switch_req();\n  }\n#endif\n}\n/*\n * notify UI SM tws preparation done\n */\nextern osTimerId ibrt_ui_tws_switch_prepare_timer_id;\nstatic void app_ibrt_if_tws_switch_prepare_done(IBRT_ROLE_SWITCH_USER_E user,\n                                                uint32_t role) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (p_ibrt_ctrl->ibrt_role_switch_handle_user) {\n#if defined(__AI_VOICE__) || defined(BISTO_ENABLED)\n    TRACE(4, \"%s ai_handle 0x%x role %d%s\", __func__,\n          p_ibrt_ctrl->ibrt_ai_role_switch_handle, role,\n          ai_spec_type2str((AI_SPEC_TYPE_E)role));\n\n    if (user == IBRT_ROLE_SWITCH_USER_AI) {\n      if (role >= AI_SPEC_COUNT) {\n        TRACE(1, \"%s role error\", __func__);\n        return;\n      }\n      if (!p_ibrt_ctrl->ibrt_ai_role_switch_handle) {\n        TRACE(1, \"%s ai_handle is 0\", __func__);\n        return;\n      }\n\n      p_ibrt_ctrl->ibrt_ai_role_switch_handle &= ~(1 << role);\n      if (!p_ibrt_ctrl->ibrt_ai_role_switch_handle) {\n        p_ibrt_ctrl->ibrt_role_switch_handle_user &= ~IBRT_ROLE_SWITCH_USER_AI;\n      }\n    } else\n#endif\n    {\n      p_ibrt_ctrl->ibrt_role_switch_handle_user &= ~user;\n    }\n\n    if (!p_ibrt_ctrl->ibrt_role_switch_handle_user) {\n      osTimerStop(ibrt_ui_tws_switch_prepare_timer_id);\n      app_ibrt_ui_event_handler(IBRT_ACTION_TWS_SWITCH_PREPARE_COMPLETE,\n                                IBRT_UI_NO_ERROR);\n    }\n  }\n}\n\nvoid app_ibrt_if_tws_switch_prepare_done_in_bt_thread(\n    IBRT_ROLE_SWITCH_USER_E user, uint32_t role) {\n  app_bt_start_custom_function_in_bt_thread(\n      user, role, (uint32_t)app_ibrt_if_tws_switch_prepare_done);\n}\n\nint app_ibrt_if_config_keeper_resume(ibrt_config_t *config) {\n  uint32_t crc;\n  nvrec_btdevicerecord *nv_record = NULL;\n  nvrec_btdevicerecord *rambak_record = NULL;\n  bool mobile_check_ok = false;\n  bool peer_check_ok = false;\n  bool flash_need_flush = false;\n  bt_bdaddr_t zeroAddr = {0, 0, 0, 0, 0, 0};\n\n  crc = crc32(0, (uint8_t *)(&ibrt_config_ram_bak),\n              (sizeof(ibrt_config_ram_bak_t) - sizeof(uint32_t)));\n\n  TRACE(3, \"%s start crc:%08x/%08x\", __func__, ibrt_config_ram_bak.crc, crc);\n  if (crc == ibrt_config_ram_bak.crc) {\n    TRACE_IMM(1, \"%s success\", __func__);\n    TRACE(1, \"%s config loc\", __func__);\n    DUMP8(\"%02x \", config->local_addr.address, 6);\n    TRACE(1, \"%s config mobile\", __func__);\n    DUMP8(\"%02x \", config->mobile_addr.address, 6);\n    TRACE(1, \"%s config peer\", __func__);\n    DUMP8(\"%02x \", config->peer_addr.address, 6);\n\n    rambak_record = &ibrt_config_ram_bak.rec_mobile;\n    if (!nv_record_btdevicerecord_find(&config->mobile_addr, &nv_record)) {\n      TRACE(1, \"%s  find mobile\", __func__);\n      DUMP8(\"%02x \", nv_record->record.bdAddr.address,\n            sizeof(nv_record->record.bdAddr.address));\n      DUMP8(\"%02x \", nv_record->record.linkKey,\n            sizeof(nv_record->record.linkKey));\n      if (!memcmp(rambak_record->record.linkKey, nv_record->record.linkKey,\n                  sizeof(nv_record->record.linkKey))) {\n        TRACE(1, \"%s  check mobile success\", __func__);\n        mobile_check_ok = true;\n      }\n    }\n    if (!mobile_check_ok) {\n      TRACE(1, \"%s  check mobile failure\", __func__);\n      DUMP8(\"%02x \", rambak_record->record.bdAddr.address, sizeof(zeroAddr));\n      DUMP8(\"%02x \", rambak_record->record.linkKey,\n            sizeof(rambak_record->record.linkKey));\n      if (memcmp(rambak_record->record.bdAddr.address, zeroAddr.address,\n                 sizeof(zeroAddr))) {\n        nv_record_add(section_usrdata_ddbrecord, rambak_record);\n        config->mobile_addr = rambak_record->record.bdAddr;\n        flash_need_flush = true;\n        TRACE(1, \"%s resume mobile\", __func__);\n      }\n    }\n\n    rambak_record = &ibrt_config_ram_bak.rec_peer;\n    if (!nv_record_btdevicerecord_find(&config->peer_addr, &nv_record)) {\n      TRACE(1, \"%s  find tws peer\", __func__);\n      DUMP8(\"%02x \", nv_record->record.bdAddr.address,\n            sizeof(nv_record->record.bdAddr.address));\n      DUMP8(\"%02x \", nv_record->record.linkKey,\n            sizeof(nv_record->record.linkKey));\n      if (!memcmp(rambak_record->record.linkKey, nv_record->record.linkKey,\n                  sizeof(nv_record->record.linkKey))) {\n        TRACE(1, \"%s  check tws peer success\", __func__);\n        peer_check_ok = true;\n      }\n    }\n    if (!peer_check_ok) {\n      TRACE(1, \"%s  check tws peer failure\", __func__);\n      DUMP8(\"%02x \", rambak_record->record.bdAddr.address,\n            sizeof(rambak_record->record.bdAddr));\n      DUMP8(\"%02x \", rambak_record->record.linkKey,\n            sizeof(rambak_record->record.linkKey));\n      if (memcmp(rambak_record->record.bdAddr.address, zeroAddr.address,\n                 sizeof(zeroAddr))) {\n        nv_record_add(section_usrdata_ddbrecord, rambak_record);\n        config->peer_addr = rambak_record->record.bdAddr;\n        flash_need_flush = true;\n        TRACE(1, \"%s resume tws peer\", __func__);\n      }\n    }\n  }\n\n  ibrt_config_ram_bak.ibrt_config = *config;\n  rambak_record = &ibrt_config_ram_bak.rec_mobile;\n  if (!nv_record_btdevicerecord_find(&config->mobile_addr, &nv_record)) {\n    *rambak_record = *nv_record;\n  } else {\n    memset(rambak_record, 0, sizeof(nvrec_btdevicerecord));\n  }\n  rambak_record = &ibrt_config_ram_bak.rec_peer;\n  if (!nv_record_btdevicerecord_find(&config->peer_addr, &nv_record)) {\n    *rambak_record = *nv_record;\n  } else {\n    memset(rambak_record, 0, sizeof(nvrec_btdevicerecord));\n  }\n  app_ibrt_if_config_keeper_flush();\n  if (flash_need_flush) {\n    nv_record_flash_flush();\n  }\n  TRACE_IMM(2, \"%s end crc:%08x\", __func__, ibrt_config_ram_bak.crc);\n\n  TRACE(1, \"%s mobile\", __func__);\n  DUMP8(\"%02x \", ibrt_config_ram_bak.rec_mobile.record.bdAddr.address,\n        sizeof(ibrt_config_ram_bak.rec_mobile.record.bdAddr));\n  DUMP8(\"%02x \", ibrt_config_ram_bak.rec_mobile.record.linkKey,\n        sizeof(ibrt_config_ram_bak.rec_mobile.record.linkKey));\n  TRACE(1, \"%s peer\", __func__);\n  DUMP8(\"%02x \", ibrt_config_ram_bak.rec_peer.record.bdAddr.address,\n        sizeof(ibrt_config_ram_bak.rec_peer.record.bdAddr));\n  DUMP8(\"%02x \", ibrt_config_ram_bak.rec_peer.record.linkKey,\n        sizeof(ibrt_config_ram_bak.rec_peer.record.linkKey));\n  return 0;\n}\n\nint app_ibrt_if_config_load(ibrt_config_t *config) {\n  memset(config->mobile_addr.address, 0, BD_ADDR_LEN);\n#ifdef IBRT_SEARCH_UI\n  app_ibrt_nvrecord_config_load((void *)config);\n  config->audio_chnl_sel = A2DP_AUDIO_CHANNEL_SELECT_LRMERGE;\n#else\n  app_ibrt_ui_test_config_load((void *)config);\n#endif\n  return 0;\n}\n\nint app_ibrt_if_reconfig(ibrt_config_t *config) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  p_ibrt_ctrl->nv_role = config->nv_role;\n  memcpy(p_ibrt_ctrl->peer_addr.address, config->peer_addr.address, 6);\n  return 0;\n}\n\nint app_ibrt_if_ui_reconfig(ibrt_ui_config_t *config) {\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  p_ibrt_ui->config = *config;\n\n  return 0;\n}\n\nint app_ibrt_core_if_reconfig(ibrt_core_config_t *config) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  p_ibrt_ctrl->config = *config;\n\n  return 0;\n}\n\nint app_ibrt_if_config(ibrt_ui_config_t *ui_config) {\n  app_ibrt_if_ui_reconfig(ui_config);\n\n  ibrt_core_config_t core_config;\n  core_config.lowlayer_monitor_enable = ui_config->lowlayer_monitor_enable;\n  core_config.long_private_poll_interval =\n      ui_config->long_private_poll_interval;\n  core_config.default_private_poll_interval =\n      ui_config->default_private_poll_interval;\n  core_config.short_private_poll_interval =\n      ui_config->short_private_poll_interval;\n  core_config.default_private_poll_interval_in_sco =\n      ui_config->default_private_poll_interval_in_sco;\n  core_config.short_private_poll_interval_in_sco =\n      ui_config->short_private_poll_interval_in_sco;\n  core_config.default_bt_tpoll = ui_config->default_bt_tpoll;\n  core_config.tws_switch_tx_data_protect =\n      ui_config->tws_switch_tx_data_protect;\n  core_config.tws_cmd_send_timeout = ui_config->tws_cmd_send_timeout;\n  core_config.tws_cmd_send_counter_threshold =\n      ui_config->tws_cmd_send_counter_threshold;\n  core_config.tws_switch_stable_timeout = ui_config->tws_switch_stable_timeout;\n  core_config.mobile_page_timeout = ui_config->mobile_page_timeout;\n  core_config.tws_connection_timeout = ui_config->tws_connection_timeout;\n  core_config.delay_exit_sniff = ui_config->delay_exit_sniff;\n  core_config.delay_ms_exit_sniff = ui_config->delay_ms_exit_sniff;\n  core_config.audio_sync_mismatch_resume_version =\n      ui_config->audio_sync_mismatch_resume_version;\n  app_ibrt_core_if_reconfig(&core_config);\n\n  return 0;\n}\n\nint app_ibrt_if_event_entry(ibrt_event_type event) {\n  TRACE(1, \"ibrt_ui_log:custom event entry enter=%s\", g_log_event_str[event]);\n  // int status = app_ibrt_ui_event_entry(event);\n\n  app_bt_start_custom_function_in_bt_thread((uint32_t)event, 0,\n                                            (uint32_t)app_ibrt_ui_event_entry);\n\n#ifdef BLE_ENABLE\n  ble_callback_evnet_t ble_callback_event;\n  ble_callback_event.evt_type = BLE_CALLBACK_IBRT_EVENT_ENTRY;\n  ble_callback_event.p.ibrt_event_entry_handled.event = event;\n  app_ble_core_global_callback_event(&ble_callback_event, NULL);\n#endif\n\n  return 0;\n}\n\nvoid app_ibrt_if_choice_connect_second_mobile(void) {\n  TRACE(0, \"ibrt_ui_log:app_ibrt_if_choice_connect_second_mobile\");\n  app_ibrt_ui_choice_connect_second_mobile();\n}\n\nvoid app_ibrt_if_choice_mobile_connect(uint8_t index) {\n  TRACE(0, \"ibrt_ui_log:app_ibrt_if_choice_mobile_connect\");\n  app_ibrt_ui_choice_mobile_connect(index);\n}\n\nvoid app_ibrt_if_disconnect_mobile(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (app_tws_ibrt_mobile_link_connected()) {\n    app_tws_ibrt_disconnect_connection(\n        btif_me_get_remote_device_by_handle(p_ibrt_ctrl->mobile_conhandle));\n  } else if (btif_besaud_is_connected()) {\n    tws_ctrl_send_cmd(APP_TWS_CMD_DISC_MOBILE, NULL, 0);\n  }\n}\n\nvoid app_ibrt_if_disconnect_mobile_tws_link(void) {\n  TRACE(0, \"ibrt_ui_log:app_ibrt_if_disconnect_mobile_tws_link\");\n  app_ibrt_ui_event_entry(IBRT_DISCONNECT_MOBILE_TWS_EVENT);\n}\n\napp_ibrt_if_ui_t *app_ibrt_if_ui_get_ctx(void) {\n  return (app_ibrt_if_ui_t *)app_ibrt_ui_get_ctx();\n}\n\napp_ibrt_if_ctrl_t *app_ibrt_if_get_bt_ctrl_ctx(void) {\n  return (app_ibrt_if_ctrl_t *)app_tws_ibrt_get_bt_ctrl_ctx();\n}\n/*\n * this function is only for tws ibrt pairing mode\n * when tws earphone is in the nearby, tws link will be connected firstly\n * when mobile link exist, this function will disconnect mobile link\n */\nvoid app_ibrt_if_enter_pairing_after_tws_connected(void) {\n  app_ibrt_ui_event_entry(IBRT_TWS_PAIRING_EVENT);\n}\n/*\n * this function is only for freeman pairing\n * no tws link or ibrt link should be connected\n * when mobile link or tws link exist, this function will disconnect mobile link\n * and tws link\n */\nvoid app_ibrt_if_enter_freeman_pairing(void) {\n  app_ibrt_ui_event_entry(IBRT_FREEMAN_PAIRING_EVENT);\n}\nvoid app_ibrt_if_ctx_checker(void) {\n  app_ibrt_if_ui_t *ibrt_if_ui_ctx = app_ibrt_if_ui_get_ctx();\n  ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n\n  TRACE(3, \"checker: nv_role:%d current_role:%d access_mode:%d\",\n        p_ibrt_ctrl->nv_role, p_ibrt_ctrl->current_role,\n        p_ibrt_ctrl->access_mode);\n\n  DUMP8(\"%02x \", p_ibrt_ctrl->local_addr.address, BD_ADDR_LEN);\n  DUMP8(\"%02x \", p_ibrt_ctrl->peer_addr.address, BD_ADDR_LEN);\n\n  TRACE(4, \"checker: super_state:%s/%s evt:%s plf:%d\",\n        g_log_super_state_str[ibrt_if_ui_ctx->super_state],\n        g_log_super_state_str[ibrt_if_ui_ctx->wait_state],\n        g_log_event_str[ibrt_if_ui_ctx->active_event & 0x0F],\n        ibrt_if_ui_ctx->profile_exchanged);\n\n  TRACE(4, \"checker: box_state:%s/%s sm_run:%d/%d\",\n        g_log_box_state_str[ibrt_if_ui_ctx->box_state],\n        g_log_box_state_str[ibrt_if_ui_ctx->peer_tws_info.box_state],\n        ibrt_if_ui_ctx->ibrt_sm_running,\n        ibrt_if_ui_ctx->peer_tws_info.ibrt_sm_running);\n\n  if (p_ibrt_ctrl->mobile_mode == IBRT_ACTIVE_MODE ||\n      p_ibrt_ctrl->tws_mode == IBRT_ACTIVE_MODE) {\n    bt_drv_reg_op_controller_state_checker();\n  }\n}\n\nint app_ibrt_if_force_audio_retrigger(void) {\n  a2dp_audio_detect_next_packet_callback_register(NULL);\n  a2dp_audio_detect_store_packet_callback_register(NULL);\n  app_ibrt_if_voice_report_trig_retrigger();\n  return 0;\n}\n\nint app_ibrt_if_force_audio_retrigger_slave_sync(void) {\n  a2dp_audio_detect_next_packet_callback_register(NULL);\n  a2dp_audio_detect_store_packet_callback_register(NULL);\n  // app_ibrt_if_voice_report_trig_retrigger();\n  return 0;\n}\n\nbool app_ibrt_if_is_audio_active(void) {\n  btif_avdtp_stream_state_t state = btif_a2dp_get_stream_state(\n      app_bt_get_mobile_a2dp_stream(BTIF_DEVICE_ID_1));\n  return ((state == BTIF_AVDTP_STRM_STATE_STREAMING) ||\n          btapp_hfp_is_sco_active());\n}\nbool app_ibrt_if_false_trigger_protect(ibrt_event_type evt_type) {\n  app_ibrt_ui_t *p_ui_ctrl = app_ibrt_ui_get_ctx();\n  ibrt_box_state box_state;\n  if (app_ibrt_ui_event_queue_empty() ||\n      (IBRT_BOX_UNKNOWN == p_ui_ctrl->box_state_future)) {\n    box_state = p_ui_ctrl->box_state;\n    p_ui_ctrl->box_state_future = IBRT_BOX_UNKNOWN;\n  } else {\n    TRACE(2,\n          \"event queue not empty, use future box state to judge, rear=%d, \"\n          \"front=%d\",\n          p_ui_ctrl->event_q_manager.rear, p_ui_ctrl->event_q_manager.front);\n\n    box_state = p_ui_ctrl->box_state_future;\n  }\n\n  TRACE(1, \"ibrt_ui_log:current box state=%s\", g_log_box_state_str[box_state]);\n\n#ifdef IBRT_SEARCH_UI\n  return false;\n#else\n  switch (evt_type) {\n  case IBRT_OPEN_BOX_EVENT:\n    return (box_state != IBRT_IN_BOX_CLOSED);\n\n  case IBRT_FETCH_OUT_EVENT:\n    return (box_state != IBRT_IN_BOX_OPEN);\n\n  case IBRT_PUT_IN_EVENT:\n    return (box_state != IBRT_OUT_BOX);\n\n  case IBRT_CLOSE_BOX_EVENT:\n    return (box_state != IBRT_IN_BOX_OPEN);\n\n  case IBRT_WEAR_UP_EVENT:\n    return (box_state != IBRT_OUT_BOX);\n\n  case IBRT_WEAR_DOWN_EVENT:\n    return (box_state != IBRT_OUT_BOX_WEARED);\n\n  default:\n    break;\n  }\n  return false;\n#endif\n}\nvoid app_ibrt_if_sco_lowlatency_scan(uint16_t interval, uint16_t window,\n                                     uint8_t interlanced) {\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n  TRACE(3, \"ibrt_ui_log:custom pscan int 0x%02x win 0x%02x type %d\\n\", interval,\n        window, interlanced);\n  p_ibrt_ui->pscan_cust_interval = interval;\n  p_ibrt_ui->pscan_cust_window = window;\n  p_ibrt_ui->pscan_cust_type = interlanced;\n  app_ibrt_ui_judge_scan_type(IBRT_SCO_PLAYING_TRIGGER, NO_LINK_TYPE,\n                              IBRT_UI_NO_ERROR);\n}\n\nvoid app_ibrt_if_sco_restore_scan(void) {\n  TRACE(0, \"ibrt_ui_log:restore pscan\\n\");\n  app_ibrt_ui_judge_scan_type(IBRT_SCO_SUSPEND_TRIGGER, NO_LINK_TYPE,\n                              IBRT_UI_NO_ERROR);\n}\n\nvoid app_ibrt_if_a2dp_lowlatency_scan(uint16_t interval, uint16_t window,\n                                      uint8_t interlanced) {\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n  TRACE(3, \"ibrt_ui_log:custom pscan int 0x%02x win 0x%02x type %d\\n\", interval,\n        window, interlanced);\n  p_ibrt_ui->pscan_cust_interval = interval;\n  p_ibrt_ui->pscan_cust_window = window;\n  p_ibrt_ui->pscan_cust_type = interlanced;\n  app_ibrt_ui_judge_scan_type(IBRT_A2DP_PLAYING_TRIGGER, NO_LINK_TYPE,\n                              IBRT_UI_NO_ERROR);\n}\n\nvoid app_ibrt_if_a2dp_restore_scan(void) {\n  TRACE(0, \"ibrt_ui_log:restore pscan\\n\");\n  app_ibrt_ui_judge_scan_type(IBRT_A2DP_SUSPEND_TRIGGER, NO_LINK_TYPE,\n                              IBRT_UI_NO_ERROR);\n}\n\n/*check if tws link reconnect is allowed*/\nbool app_ibrt_if_tws_reconnect_allowed(void) {\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  if (app_ibrt_ui_is_box_closed()) {\n    TRACE(2, \" connect tws disallowed_1, box_state=%d, f_box_state=%d\",\n          p_ibrt_ui->box_state, p_ibrt_ui->box_state_future);\n    return false;\n  } else if (app_tws_ibrt_mobile_link_connected() &&\n             app_ibrt_if_is_audio_active()) {\n\n    TRACE(2, \" connect tws disallowed_2, box_state=%d, f_box_state=%d\",\n          p_ibrt_ui->box_state, p_ibrt_ui->box_state_future);\n    return false;\n  } else {\n    TRACE(0, \" connect tws allowed\");\n    return true;\n  }\n}\n\nvoid app_ibrt_if_sniff_event_callback(const btif_event_t *event) {}\n\nvoid app_ibrt_if_audio_mute(void) {}\n\nvoid app_ibrt_if_audio_recover(void) {}\n\nint app_ibrt_if_tws_sniff_block(uint32_t block_next_sec) {\n  tws_sniff_block_start = hal_sys_timer_get();\n  tws_sniff_block_next_sec = block_next_sec;\n  return 0;\n}\n\nstatic bool app_ibrt_if_tws_sniff_block_need(void) {\n  bool tws_sniff_block = false;\n  uint32_t passed_ticks = 0;\n\n  if (tws_sniff_block_start) {\n    tws_sniff_block = true;\n    passed_ticks =\n        hal_timer_get_passed_ticks(hal_sys_timer_get(), tws_sniff_block_start);\n    if (TICKS_TO_MS(passed_ticks) > (tws_sniff_block_next_sec * 1000)) {\n      tws_sniff_block_start = 0;\n      tws_sniff_block_next_sec = 0;\n      tws_sniff_block = false;\n    }\n  } else {\n    tws_sniff_block = false;\n  }\n\n  return tws_sniff_block;\n}\n\nbool app_ibrt_if_tws_sniff_allowed(void) {\n  btif_avdtp_stream_state_t a2dp_state = BTIF_AVDTP_STRM_STATE_IDLE;\n  if (app_bt_get_mobile_a2dp_stream(BTIF_DEVICE_ID_1)) {\n    a2dp_state = btif_a2dp_get_stream_state(\n        app_bt_get_mobile_a2dp_stream(BTIF_DEVICE_ID_1));\n  }\n  if (a2dp_state == BTIF_AVDTP_STRM_STATE_STREAMING ||\n      btapp_hfp_is_sco_active() || btapp_hfp_get_call_state() ||\n      btapp_hfp_get_call_setup() != BTIF_HF_CALL_SETUP_NONE ||\n      bt_media_cur_is_bt_stream_media() || app_ibrt_if_tws_sniff_block_need() ||\n      app_ibrt_ui_wait_ibrt_connected()\n#if defined(IBRT_OTA)\n      || ota_is_in_progress()\n#endif\n#ifdef TEST_OVER_THE_AIR_ENANBLED\n      || spp_tota_in_progress()\n#endif\n  ) {\n    TRACE(0, \"ibrt_ui_log:sniff not allow\\n\");\n    return false;\n  } else {\n    TRACE(0, \"ibrt_ui_log:sniff allowed\\n\");\n    return true;\n  }\n}\n\n#define IBRT_IF_SNIFF_CHECKER_INTERVAL_MS (3000)\nstatic void app_ibrt_if_sniff_checker_handler(void const *param);\nosTimerDef(APP_IBRT_IF_SNIFF_CHECKER_TIMER, app_ibrt_if_sniff_checker_handler);\nstatic osTimerId app_ibrt_if_sniff_checker_timer = NULL;\nstatic uint32_t app_ibrt_if_sniff_checker_interval_ms =\n    IBRT_IF_SNIFF_CHECKER_INTERVAL_MS;\nstatic uint32_t app_ibrt_if_sniff_checker_user_map = 0;\n\nstatic void app_ibrt_if_sniff_checker_handler(void const *param) {\n  app_ibrt_if_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n  if (app_ibrt_if_tws_sniff_allowed()) {\n    app_ibrt_if_sniff_checker_reset();\n  } else {\n    if (app_tws_ibrt_mobile_link_connected()) {\n      if (p_ibrt_ctrl->mobile_mode == IBRT_SNIFF_MODE) {\n        TRACE(0, \"ibrt_ui_log:force exit_sniff_with_mobile\\n\");\n        app_tws_ibrt_exit_sniff_with_mobile();\n      }\n      if (p_ibrt_ctrl->tws_mode == IBRT_SNIFF_MODE) {\n        TRACE(0, \"ibrt_ui_log:force exit_sniff_with_tws\\n\");\n        app_tws_ibrt_exit_sniff_with_tws();\n      }\n      osTimerStart(app_ibrt_if_sniff_checker_timer,\n                   app_ibrt_if_sniff_checker_interval_ms);\n    } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n      osTimerStart(app_ibrt_if_sniff_checker_timer,\n                   app_ibrt_if_sniff_checker_interval_ms);\n    } else {\n      app_ibrt_if_sniff_checker_reset();\n    }\n  }\n}\n\nint app_ibrt_if_sniff_checker_init(uint32_t delay_ms) {\n  TRACE(1, \"ibrt_ui_log:sniff_checker_init interval:%d \\n\", delay_ms);\n  if (app_ibrt_if_sniff_checker_timer == NULL) {\n    app_ibrt_if_sniff_checker_timer = osTimerCreate(\n        osTimer(APP_IBRT_IF_SNIFF_CHECKER_TIMER), osTimerOnce, NULL);\n  }\n  app_ibrt_if_sniff_checker_interval_ms = delay_ms;\n  app_ibrt_if_sniff_checker_user_map = 0;\n  return 0;\n}\n\nint app_ibrt_if_sniff_checker_start(\n    enum APP_IBRT_IF_SNIFF_CHECKER_USER_T user) {\n  if (app_ibrt_if_sniff_checker_timer) {\n    TRACE(1, \"ibrt_ui_log:sniff_checker_start usr:%d\\n\", user);\n    app_ibrt_if_sniff_checker_user_map |= (1 << user);\n    osTimerStart(app_ibrt_if_sniff_checker_timer,\n                 app_ibrt_if_sniff_checker_interval_ms);\n  }\n  return 0;\n}\n\nint app_ibrt_if_sniff_checker_stop(enum APP_IBRT_IF_SNIFF_CHECKER_USER_T user) {\n  if (app_ibrt_if_sniff_checker_timer) {\n    app_ibrt_if_sniff_checker_user_map &= ~(1 << user);\n    if (!app_ibrt_if_sniff_checker_user_map) {\n      TRACE(1, \"ibrt_ui_log:sniff_checker_stop usr:%d\\n\", user);\n      osTimerStop(app_ibrt_if_sniff_checker_timer);\n    }\n  }\n  return 0;\n}\n\nint app_ibrt_if_sniff_checker_reset(void) {\n  if (app_ibrt_if_sniff_checker_timer) {\n    TRACE(0, \"ibrt_ui_log:sniff_checker_reset\\n\");\n    app_ibrt_if_sniff_checker_user_map = 0;\n    osTimerStop(app_ibrt_if_sniff_checker_timer);\n  }\n  return 0;\n}\n\nstatic uint32_t sleep_hook_blocker = 0;\nvoid app_ibrt_if_exec_sleep_hook_blocker_set(\n    APP_IBRT_IF_SLEEP_HOOK_BLOCKER_T blocker) {\n  sleep_hook_blocker |= (uint32_t)blocker;\n}\n\nvoid app_ibrt_if_exec_sleep_hook_blocker_clr(\n    APP_IBRT_IF_SLEEP_HOOK_BLOCKER_T blocker) {\n  sleep_hook_blocker &= ~(uint32_t)blocker;\n}\n\nbool app_ibrt_if_exec_sleep_hook_blocker_is_hfp_sco(void) {\n  return sleep_hook_blocker & APP_IBRT_IF_SLEEP_HOOK_BLOCKER_HFP_SCO ? true\n                                                                     : false;\n}\n\nbool app_ibrt_if_exec_sleep_hook_blocker_is_a2dp_streaming(void) {\n  return sleep_hook_blocker & APP_IBRT_IF_SLEEP_HOOK_BLOCKER_A2DP_STREAMING\n             ? true\n             : false;\n}\n\nbool app_ibrt_if_exec_sleep_hook_allowed(void) {\n  if (!sleep_hook_blocker) {\n    return true;\n  }\n  return false;\n}\n\nvoid app_ibrt_ui_adaptive_fa_rx_gain(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (app_tws_ibrt_tws_link_connected()) {\n    rx_agc_t tws_agc = {0};\n    bt_drv_reg_op_read_rssi_in_dbm(p_ibrt_ctrl->tws_conhandle, &tws_agc);\n    static int8_t old_tws_rssi = tws_agc.rssi;\n    if (tws_agc.rssi != old_tws_rssi) {\n      bt_drv_adaptive_fa_rx_gain(tws_agc.rssi);\n      old_tws_rssi = tws_agc.rssi;\n    }\n  }\n}\n\nvoid app_tws_ibrt_record_sync_id(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  uint8_t sync_id = bt_drv_reg_op_get_sync_id_op(READ_OP, 0);\n  if (is_sco_mode() && sync_id != 0xff) {\n    uint16_t sync_id_mask = (1 << 8) | (sync_id & 0xff);\n    TRACE(3, \"%s:sync id=%d, mask=0x%x\", __func__, sync_id, sync_id_mask);\n    p_ibrt_ctrl->sync_id_mask = sync_id_mask;\n  }\n}\n\nvoid app_tws_ibrt_resume_sync_id(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  uint8_t sync_id_mask = p_ibrt_ctrl->sync_id_mask >> 8;\n  uint8_t sync_id = p_ibrt_ctrl->sync_id_mask & 0xff;\n  if (sync_id_mask) {\n    p_ibrt_ctrl->sync_id_mask = 0;\n    if (is_sco_mode() && (sync_id != 0xff)) {\n      TRACE(2, \"%s: sync id=%d\", __func__, sync_id);\n      bt_drv_reg_op_get_sync_id_op(WRITE_OP, sync_id);\n    }\n  }\n}\n\nbool app_ibrt_if_start_ibrt_onporcess(void) {\n  app_ibrt_if_ui_t *p_ibrt_ui_ctx = app_ibrt_if_ui_get_ctx();\n  if (p_ibrt_ui_ctx->super_state == IBRT_UI_W4_SET_ENV_COMPLETE) {\n    return true;\n  }\n\n  if (p_ibrt_ui_ctx->super_state == IBRT_UI_W4_START_IBRT_COMPLETE) {\n    return true;\n  }\n\n  if (p_ibrt_ui_ctx->super_state == IBRT_UI_W4_IBRT_DATA_EXCHANGE_COMPLETE) {\n    return true;\n  }\n\n  return false;\n}\n\nbool app_ibrt_if_tws_switch_onporcess(void) {\n  app_ibrt_if_ui_t *p_ibrt_ui_ctx = app_ibrt_if_ui_get_ctx();\n  if (p_ibrt_ui_ctx->super_state == IBRT_UI_W4_TWS_SWITCH_COMPLETE) {\n    return true;\n  }\n\n  return false;\n}\n\nAppIbrtStatus app_ibrt_if_get_a2dp_state(AppIbrtA2dpState *a2dp_state) {\n  if (app_tws_ibrt_mobile_link_connected() ||\n      app_tws_ibrt_slave_ibrt_link_connected()) {\n#if defined(A2DP_AAC_ON)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream) >\n        BTIF_AVDTP_STRM_STATE_IDLE) {\n      if (a2dp_state != NULL) {\n        *a2dp_state = (AppIbrtA2dpState)btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream);\n      }\n    }\n#else\n    if (0)\n      ;\n#endif\n    else if (btif_a2dp_get_stream_state(\n                 app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream) >\n             BTIF_AVDTP_STRM_STATE_IDLE) {\n      if (a2dp_state != NULL) {\n        *a2dp_state = (AppIbrtA2dpState)btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream);\n      }\n    } else {\n      if (a2dp_state != NULL) {\n        *a2dp_state = APP_IBRT_IF_A2DP_IDLE;\n      }\n    }\n  } else {\n    if (a2dp_state != NULL) {\n      *a2dp_state = APP_IBRT_IF_A2DP_IDLE;\n    }\n  }\n\n  return APP_IBRT_IF_STATUS_SUCCESS;\n}\n\nAppIbrtStatus app_ibrt_if_get_avrcp_state(AppIbrtAvrcpState *avrcp_state) {\n  if (BTIF_AVRCP_STATE_DISCONNECTED !=\n      app_bt_device.avrcp_state[BT_DEVICE_ID_1]) {\n    if (avrcp_state != NULL) {\n      if (avrcp_get_media_status() == BTIF_AVRCP_MEDIA_PLAYING) {\n        *avrcp_state = APP_IBRT_IF_AVRCP_PLAYING;\n      } else if (avrcp_get_media_status() == BTIF_AVRCP_MEDIA_PAUSED) {\n        *avrcp_state = APP_IBRT_IF_AVRCP_PAUSED;\n      } else {\n        *avrcp_state = APP_IBRT_IF_AVRCP_CONNECTED;\n      }\n    }\n  } else {\n    if (avrcp_state != NULL) {\n      *avrcp_state = APP_IBRT_IF_AVRCP_DISCONNECTED;\n    }\n  }\n  return APP_IBRT_IF_STATUS_SUCCESS;\n}\n\nAppIbrtStatus app_ibrt_if_get_hfp_state(AppIbrtHfpState *hfp_state) {\n  if (btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_1]) ==\n      BTIF_HF_STATE_OPEN) {\n    if (app_bt_device.hf_audio_state[BT_DEVICE_ID_1] == BTIF_HF_AUDIO_CON) {\n      if (hfp_state != NULL) {\n        *hfp_state = APP_IBRT_IF_HFP_SCO_OPEN;\n      }\n    } else {\n      if (hfp_state != NULL) {\n        *hfp_state = APP_IBRT_IF_HFP_SCO_CLOSED;\n      }\n    }\n  } else {\n    if (hfp_state != NULL) {\n      *hfp_state = APP_IBRT_IF_HFP_SLC_DISCONNECTED;\n    }\n  }\n  return APP_IBRT_IF_STATUS_SUCCESS;\n}\n\nAppIbrtStatus app_ibrt_if_get_hfp_call_status(AppIbrtCallStatus *call_status) {\n  if (call_status == NULL) {\n    return APP_IBRT_IF_STATUS_ERROR_INVALID_PARAMETERS;\n  }\n\n  if (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_IN) {\n    *call_status = APP_IBRT_IF_SETUP_INCOMMING;\n  } else if (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] ==\n             BTIF_HF_CALL_SETUP_OUT) {\n    *call_status = APP_IBRT_IF_SETUP_OUTGOING;\n  } else if (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] ==\n             BTIF_HF_CALL_SETUP_ALERT) {\n    *call_status = APP_IBRT_IF_SETUP_ALERT;\n  } else if ((app_bt_device.hfchan_call[BT_DEVICE_ID_1] ==\n              BTIF_HF_CALL_ACTIVE) &&\n             (app_bt_device.hf_audio_state[BT_DEVICE_ID_1] ==\n              BTIF_HF_AUDIO_CON)) {\n    *call_status = APP_IBRT_IF_CALL_ACTIVE;\n  } else if (app_bt_device.hf_callheld[BT_DEVICE_ID_1] ==\n             BTIF_HF_CALL_HELD_ACTIVE) {\n    *call_status = APP_IBRT_IF_HOLD;\n  } else {\n    *call_status = APP_IBRT_IF_NO_CALL;\n  }\n\n  return APP_IBRT_IF_STATUS_SUCCESS;\n}\n\nibrt_role_e app_ibrt_if_get_ibrt_role() {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  return (p_ibrt_ctrl->current_role);\n}\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_keyboard.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_keyboard.h\"\n#include \"anc_wnr.h\"\n#include \"app_anc.h\"\n#include \"app_bt.h\"\n#include \"app_factory_bt.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ui_test.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"apps.h\"\n#include \"btapp.h\"\n#include \"cmsis_os.h\"\n#include \"hal_bootmode.h\"\n#include \"norflash_api.h\"\n#include \"pmu.h\"\n#include \n#if defined(IBRT)\n#ifdef TILE_DATAPATH\nextern \"C\" void app_tile_key_handler(APP_KEY_STATUS *status, void *param);\n#endif\nextern struct BT_DEVICE_T app_bt_device;\nextern void app_bt_volumedown();\nextern void app_bt_volumeup();\nextern void app_otaMode_enter(APP_KEY_STATUS *status, void *param);\n\n#if defined(__BT_DEBUG_TPORTS__) && !defined(TPORTS_KEY_COEXIST)\nextern void app_ibrt_simulate_charger_plug_in_test(void);\nextern void app_ibrt_simulate_charger_plug_out_test(void);\n#endif\n\nstatic bool qxw_dut_mode_enable = false;\n\n#ifdef IBRT_SEARCH_UI\nvoid app_ibrt_search_ui_handle_key(APP_KEY_STATUS *status, void *param) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n  if (APP_KEY_CODE_GOOGLE != status->code) {\n    switch (status->event) {\n    case APP_KEY_EVENT_CLICK:\n      app_tws_if_handle_click();\n      break;\n\n    case APP_KEY_EVENT_DOUBLECLICK:\n      TRACE(0, \"double kill\");\n      if (IBRT_UNKNOW == p_ibrt_ctrl->current_role) {\n        app_start_tws_serching_direactly();\n      } else {\n#if defined(__BT_DEBUG_TPORTS__) && !defined(TPORTS_KEY_COEXIST)\n        app_ibrt_simulate_charger_plug_in_test();\n#else\n        bt_key_handle_func_doubleclick();\n#endif\n      }\n      break;\n\n    case APP_KEY_EVENT_LONGPRESS:\n      // dont use this key for customer release due to\n      // it is auto triggered by circuit of 3s high-level voltage.\n      bt_key_handle_func_longpress();\n#if 0\n                app_ibrt_ui_judge_scan_type(IBRT_FREEMAN_PAIR_TRIGGER,NO_LINK_TYPE, IBRT_UI_NO_ERROR);\n                app_ibrt_ui_set_freeman_enable();\n#endif\n#if 0\n                app_bt_volumeup();\n                if(IBRT_MASTER==p_ibrt_ctrl->current_role)\n                {\n                    TRACE(0,\"ibrt master sync volume to slave !\");\n                    app_ibrt_sync_volume_info();\n                }\n#endif\n#if defined(__BT_DEBUG_TPORTS__) && !defined(TPORTS_KEY_COEXIST)\n      app_ibrt_simulate_charger_plug_out_test();\n#endif\n      break;\n\n    case APP_KEY_EVENT_TRIPLECLICK:\n      // bt_key_handle_func_tripleclick();\n      /*#ifdef TILE_DATAPATH\n          app_tile_key_handler(status,NULL);\n      #else\n          app_otaMode_enter(NULL,NULL);\n      #endif*/\n      break;\n    case HAL_KEY_EVENT_LONGLONGPRESS:\n      TRACE(0, \"long long press\");\n      // if(qxw_dut_mode_enable){\n      //\tqxw_dut_mode_enable = false;\n      app_bt_power_off_customize();\n\n      ///}\n      break;\n\n    case APP_KEY_EVENT_ULTRACLICK:\n      TRACE(0, \"ultra kill\");\n      if (IBRT_UNKNOW == p_ibrt_ctrl->nv_role) {\n        app_bt_enter_mono_pairing_mode();\n      }\n      break;\n\n    case APP_KEY_EVENT_RAMPAGECLICK:\n      TRACE(0, \"rampage kill!you are crazy!\");\n      if (!app_device_bt_is_connected() &&\n          (!app_tws_ibrt_tws_link_connected())) {\n        app_nvrecord_rebuild();\n        osDelay(200);\n        hal_cmu_sys_reboot();\n      }\n      break;\n    case APP_KEY_EVENT_SIXTHCLICK:\n      if (!app_device_bt_is_connected() &&\n          (!app_tws_ibrt_tws_link_connected())) {\n        qxw_dut_mode_enable = true;\n#ifdef __FACTORY_MODE_SUPORT__\n        app_factorymode_bt_signalingtest(NULL, NULL);\n#endif\n      }\n      break;\n    case APP_KEY_EVENT_EIGHTHCLICK:\n      if (!app_device_bt_is_connected()) {\n        app_otaMode_enter(NULL, NULL);\n      }\n      break;\n    case APP_KEY_EVENT_UP:\n      break;\n    }\n  }\n\n#ifdef TILE_DATAPATH\n  if (APP_KEY_CODE_TILE == status->code)\n    app_tile_key_handler(status, NULL);\n#endif\n}\n#endif\n\nvoid app_ibrt_normal_ui_handle_key(APP_KEY_STATUS *status, void *param) {\n  if (APP_KEY_CODE_GOOGLE != status->code) {\n    switch (status->event) {\n    case APP_KEY_EVENT_CLICK:\n      TRACE(0, \"first blood.\");\n      app_tws_if_handle_click();\n      break;\n\n    case APP_KEY_EVENT_DOUBLECLICK:\n      TRACE(0, \"double kill\");\n      app_ibrt_if_enter_freeman_pairing();\n      break;\n\n    case APP_KEY_EVENT_LONGPRESS:\n      app_ibrt_if_enter_pairing_after_tws_connected();\n      break;\n\n    case APP_KEY_EVENT_TRIPLECLICK:\n#ifdef TILE_DATAPATH\n      app_tile_key_handler(status, NULL);\n#endif\n      break;\n\n    case HAL_KEY_EVENT_LONGLONGPRESS:\n      TRACE(0, \"long long press\");\n      break;\n\n    case APP_KEY_EVENT_ULTRACLICK:\n      TRACE(0, \"ultra kill\");\n      app_shutdown();\n      break;\n\n    case APP_KEY_EVENT_RAMPAGECLICK:\n      TRACE(0, \"rampage kill!you are crazy!\");\n#ifndef HAL_TRACE_RX_ENABLE\n      hal_trace_rx_reopen();\n#endif\n      break;\n\n    case APP_KEY_EVENT_UP:\n      break;\n    }\n  }\n\n#ifdef TILE_DATAPATH\n  if (APP_KEY_CODE_TILE == status->code)\n    app_tile_key_handler(status, NULL);\n#endif\n}\n\nextern void app_ibrt_customif_test1_cmd_send(uint8_t *p_buff, uint16_t length);\nint app_ibrt_if_keyboard_notify(APP_KEY_STATUS *status, void *param) {\n  if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    tws_ctrl_send_cmd(APP_TWS_CMD_KEYBOARD_REQUEST, (uint8_t *)status,\n                      sizeof(APP_KEY_STATUS));\n  }\n  return 0;\n}\n\n#if (TWS_Sync_Shutdowm)\nint app_ibrt_poweroff_notify_force(void) {\n  APP_KEY_STATUS status[] = {APP_KEY_CODE_FN2, HAL_KEY_EVENT_LONGLONGPRESS};\n\n  if (app_tws_ibrt_tws_link_connected()) {\n    app_ibrt_customif_test1_cmd_send((uint8_t *)status, sizeof(APP_KEY_STATUS));\n  }\n  return 0;\n}\n\nint app_ibrt_reboot_notify_force(void) {\n  APP_KEY_STATUS status[] = {APP_KEY_CODE_FN1, HAL_KEY_EVENT_LONGLONGPRESS};\n\n  if (app_tws_ibrt_tws_link_connected()) {\n    app_ibrt_customif_test1_cmd_send((uint8_t *)status, sizeof(APP_KEY_STATUS));\n  }\n  return 0;\n}\n\n#endif\nvoid app_ibrt_send_keyboard_request(uint8_t *p_buff, uint16_t length) {\n  if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_KEYBOARD_REQUEST, p_buff, length);\n  }\n}\n\nbool Is_Slave_Key_Down_Event = false;\nvoid app_ibrt_keyboard_request_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                       uint16_t length) {\n  APP_KEY_STATUS *key_status = (APP_KEY_STATUS *)p_buff;\n  if (key_status == NULL)\n    return;\n\n  if (app_tws_ibrt_mobile_link_connected()) {\n#ifdef IBRT_SEARCH_UI\n    Is_Slave_Key_Down_Event = true;\n    if (key_status->code == APP_KEY_CODE_PWR) {\n      app_ibrt_search_ui_handle_key(key_status, NULL);\n    } else {\n      app_ibrt_search_ui_gpio_key_handle(key_status, NULL);\n    }\n\n#else\n    app_ibrt_normal_ui_handle_key(key_status, NULL);\n#endif\n\n    app_ibrt_ui_test_voice_assistant_key(key_status, NULL);\n  }\n}\n\nvoid app_ibrt_if_start_user_action(uint8_t *p_buff, uint16_t length) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  TRACE(3, \"%s role %d code %d\", __func__, p_ibrt_ctrl->current_role,\n        p_buff[0]);\n\n  if (IBRT_SLAVE == p_ibrt_ctrl->current_role) {\n    app_ibrt_ui_send_user_action(p_buff, length);\n  } else {\n    app_ibrt_ui_perform_user_action(p_buff, length);\n  }\n}\n\nextern void app_bt_volumeup();\nextern void app_bt_volumedown();\n\nvoid app_ibrt_ui_perform_user_action(uint8_t *p_buff, uint16_t length) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n#ifdef ANC_APP\n  //Doesnt actully get used!!!\n  app_anc_cmd_receive_process(p_buff, length);\n#endif\n#ifdef ANC_WNR_ENABLED\n  app_wnr_cmd_receive_process(p_buff, length);\n#endif\n\n  if (IBRT_MASTER != p_ibrt_ctrl->current_role) {\n    TRACE(2, \"%s not ibrt master, skip cmd %02x\\n\", __func__, p_buff[0]);\n    return;\n  }\n\n  switch (p_buff[0]) {\n  case IBRT_ACTION_PLAY:\n    a2dp_handleKey(AVRCP_KEY_PLAY);\n    break;\n  case IBRT_ACTION_PAUSE:\n    a2dp_handleKey(AVRCP_KEY_PAUSE);\n    break;\n  case IBRT_ACTION_FORWARD:\n    a2dp_handleKey(AVRCP_KEY_FORWARD);\n    break;\n  case IBRT_ACTION_BACKWARD:\n    a2dp_handleKey(AVRCP_KEY_BACKWARD);\n    break;\n  case IBRT_ACTION_AVRCP_VOLUP:\n    a2dp_handleKey(AVRCP_KEY_VOLUME_UP);\n    break;\n  case IBRT_ACTION_AVRCP_VOLDN:\n    a2dp_handleKey(AVRCP_KEY_VOLUME_DOWN);\n    break;\n  case IBRT_ACTION_HFSCO_CREATE:\n    if (!btif_hf_audio_link_is_up()) {\n      btif_pts_hf_create_audio_link();\n    } else {\n      TRACE(1, \"%s cannot create audio link\\n\", __func__);\n    }\n    break;\n  case IBRT_ACTION_HFSCO_DISC:\n    if (btif_hf_audio_link_is_up()) {\n      btif_pts_hf_disc_audio_link();\n    } else {\n      TRACE(1, \"%s cannot disc audio link\\n\", __func__);\n    }\n    break;\n  case IBRT_ACTION_REDIAL:\n    if (btif_hf_service_link_is_up()) {\n      btif_pts_hf_redial_call();\n    } else {\n      TRACE(1, \"%s cannot redial call\\n\", __func__);\n    }\n    break;\n  case IBRT_ACTION_ANSWER:\n    if (btif_hf_service_link_is_up()) {\n      btif_pts_hf_answer_call();\n    } else {\n      TRACE(1, \"%s cannot answer call\\n\", __func__);\n    }\n    break;\n  case IBRT_ACTION_HANGUP:\n    if (btif_hf_service_link_is_up()) {\n      btif_pts_hf_hangup_call();\n    } else {\n      TRACE(1, \"%s cannot hangup call\\n\", __func__);\n    }\n    break;\n  case IBRT_ACTION_LOCAL_VOLUP:\n    app_bt_volumeup();\n    app_ibrt_sync_volume_info();\n    break;\n  case IBRT_ACTION_LOCAL_VOLDN:\n    app_bt_volumedown();\n    app_ibrt_sync_volume_info();\n    break;\n  case IBRT_ACTION_ANC_NOTIRY_MASTER_EXCHANGE_COEF:\n    app_anc_key(NULL, NULL);\n    break;\n  default:\n    TRACE(2, \"%s unknown user action %d\\n\", __func__, p_buff[0]);\n    break;\n  }\n}\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_nvrecord.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_nvrecord.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"ddbif.h\"\n#include \"factory_section.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_env.h\"\n#include \n\n/*****************************************************************************\n\nPrototype    : app_ibrt_ui_config_ibrt_info\nDescription  : app ui init\nInput        : void\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2019/3/29\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_nvrecord_config_load(void *config) {\n  struct nvrecord_env_t *nvrecord_env;\n  ibrt_config_t *ibrt_config = (ibrt_config_t *)config;\n  // factory_section_original_btaddr_get(ibrt_config->local_addr.address);\n  nv_record_env_get(&nvrecord_env);\n  if (nvrecord_env->ibrt_mode.mode != IBRT_UNKNOW) {\n    ibrt_config->nv_role = nvrecord_env->ibrt_mode.mode;\n    ibrt_config->peer_addr = nvrecord_env->ibrt_mode.record.bdAddr;\n    ibrt_config->local_addr = nvrecord_env->ibrt_mode.record.bdAddr;\n    if (nvrecord_env->ibrt_mode.tws_connect_success == 0) {\n      app_ibrt_ui_clear_tws_connect_success_last();\n    } else {\n      app_ibrt_ui_set_tws_connect_success_last();\n    }\n  } else {\n    ibrt_config->nv_role = IBRT_UNKNOW;\n  }\n}\n/*****************************************************************************\n\nPrototype    : app_ibrt_ui_config_ibrt_info\nDescription  : app ui init\nInput        : void\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2019/3/29\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nint app_ibrt_nvrecord_find(const bt_bdaddr_t *bd_ddr,\n                           nvrec_btdevicerecord **record) {\n  return nv_record_btdevicerecord_find(bd_ddr, record);\n}\n/*****************************************************************************\n\nPrototype    : app_ibrt_nvrecord_update_ibrt_mode_tws\nDescription  : app_ibrt_nvrecord_update_ibrt_mode_tws\nInput        : status\nOutput       : None\nReturn Value :\nCalls        :\nCalled By    :\n\nHistory        :\nDate         : 2019/3/29\nAuthor       : bestechnic\nModification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_nvrecord_update_ibrt_mode_tws(bool status) {\n  struct nvrecord_env_t *nvrecord_env;\n\n  TRACE(2, \"##%s,%d\", __func__, status);\n  nv_record_env_get(&nvrecord_env);\n  nvrecord_env->ibrt_mode.tws_connect_success = status;\n  nv_record_env_set(nvrecord_env);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_nvrecord_get_latest_mobiles_addr\n Description  : get latest mobile addr from nv\n Input        : bt_bdaddr_t *mobile_addr\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/25\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nint app_ibrt_nvrecord_get_latest_mobiles_addr(bt_bdaddr_t *mobile_addr1,\n                                              bt_bdaddr_t *mobile_addr2) {\n  btif_device_record_t record;\n  int found_mobile_addr_count = 0;\n  int paired_dev_count = nv_record_get_paired_dev_count();\n\n  /* the tail is latest, the head is oldest */\n  for (int i = paired_dev_count - 1; i >= 0; --i) {\n    if (BT_STS_SUCCESS != nv_record_enum_dev_records(i, &record)) {\n      break;\n    }\n\n    if (MOBILE_LINK == app_tws_ibrt_get_link_type_by_addr(&record.bdAddr)) {\n      found_mobile_addr_count += 1;\n\n      if (found_mobile_addr_count == 1) {\n        *mobile_addr1 = record.bdAddr;\n      } else if (found_mobile_addr_count == 2) {\n        *mobile_addr2 = record.bdAddr;\n        break;\n      }\n    }\n  }\n\n  return found_mobile_addr_count;\n}\n\nint app_ibrt_nvrecord_choice_mobile_addr(bt_bdaddr_t *mobile_addr,\n                                         uint8_t index) {\n  btif_device_record_t record;\n  int paired_dev_count = nv_record_get_paired_dev_count();\n  int mobile_found_count = 0;\n  if (paired_dev_count < index + 1) {\n    return 0;\n  }\n\n  /* the tail is latest, the head is oldest */\n  for (int i = paired_dev_count - 1; i >= 0; --i) {\n    if (BT_STS_SUCCESS != nv_record_enum_dev_records(i, &record)) {\n      break;\n    }\n\n    if (MOBILE_LINK == app_tws_ibrt_get_link_type_by_addr(&record.bdAddr)) {\n      if (mobile_found_count == index) {\n        *mobile_addr = record.bdAddr;\n        return 1;\n      }\n\n      mobile_found_count += 1;\n    }\n  }\n\n  return 0;\n}\n/*****************************************************************************\n Prototype    : app_ibrt_nvrecord_get_mobile_addr\n Description  : get mobile addr from nv\n Input        : bt_bdaddr_t *mobile_addr\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/25\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nbt_status_t app_ibrt_nvrecord_get_mobile_addr(bt_bdaddr_t *mobile_addr) {\n  btif_device_record_t record1;\n  btif_device_record_t record2;\n  btif_device_record_t record;\n  ibrt_link_type_e link_type;\n\n  uint8_t null_addr[6] = {0};\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  int record_num = nv_record_enum_latest_two_paired_dev(&record1, &record2);\n\n  if (memcmp(&p_ibrt_ctrl->mobile_addr.address[0], &null_addr[0],\n             BTIF_BD_ADDR_SIZE) &&\n      (ddbif_find_record((const bt_bdaddr_t *)&p_ibrt_ctrl->mobile_addr,\n                         &record) == BT_STS_SUCCESS)) {\n    // first check if mobile addr exist in RAM\n    *mobile_addr = p_ibrt_ctrl->mobile_addr;\n    return BT_STS_SUCCESS;\n  }\n\n  if ((record_num == 1) || (record_num == 2)) {\n    // check nv mobile addr\n    link_type = app_tws_ibrt_get_link_type_by_addr(&record1.bdAddr);\n    if (link_type == MOBILE_LINK) {\n      *mobile_addr = record1.bdAddr;\n      return BT_STS_SUCCESS;\n    } else if (record_num == 2) {\n      link_type = app_tws_ibrt_get_link_type_by_addr(&record2.bdAddr);\n      if (link_type == MOBILE_LINK) {\n        *mobile_addr = record2.bdAddr;\n        return BT_STS_SUCCESS;\n      }\n    }\n  }\n  return BT_STS_FAILED;\n}\n/*****************************************************************************\n Prototype    : app_ibrt_nvrecord_delete_all_mobile_record\n Description  : app_ibrt_nvrecord_delete_all_mobile_record\n Input        : None\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/25\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_nvrecord_delete_all_mobile_record(void) {\n  btif_device_record_t record = {0};\n  int paired_dev_count = nv_record_get_paired_dev_count();\n\n  for (int i = paired_dev_count - 1; i >= 0; --i) {\n    nv_record_enum_dev_records(i, &record);\n\n    if (MOBILE_LINK == app_tws_ibrt_get_link_type_by_addr(&record.bdAddr)) {\n      nv_record_ddbrec_delete(&record.bdAddr);\n    }\n  }\n  app_ibrt_if_config_keeper_clear();\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_nvrecord_rebuild\n Description  : app_ibrt_nvrecord_rebuild\n Input        : None\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/25\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_nvrecord_rebuild(void) {\n  struct nvrecord_env_t *nvrecord_env;\n  nv_record_env_get(&nvrecord_env);\n\n  nv_record_sector_clear();\n  nv_record_env_init();\n  nv_record_update_factory_tester_status(\n      NVRAM_ENV_FACTORY_TESTER_STATUS_DEFAULT);\n  nv_record_env_set(nvrecord_env);\n  nv_record_flash_flush();\n  app_ibrt_if_config_keeper_clear();\n  app_ibrt_ui_reboot_sdk();\n}\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_ota_cmd.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_ota_cmd.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"string.h\"\n\n#ifdef IBRT_OTA\n#include \"../../ibrt_ota/inc/ota_control.h\"\n#include \"ota_common.h\"\n#include \"ota_spp.h\"\n\nstatic void app_ibrt_ota_get_version_cmd_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ota_get_version_cmd_send_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length);\nstatic void app_ibrt_ota_get_version_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                          uint8_t *p_buff,\n                                                          uint16_t length);\nstatic void app_ibrt_ota_get_version_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nstatic void app_ibrt_ota_select_side_cmd_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ota_select_side_cmd_send_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length);\nstatic void app_ibrt_ota_select_side_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                          uint8_t *p_buff,\n                                                          uint16_t length);\nstatic void app_ibrt_ota_select_side_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nstatic void app_ibrt_ota_bp_check_cmd_send(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_ota_bp_check_cmd_send_handler(uint16_t rsp_seq,\n                                                   uint8_t *p_buff,\n                                                   uint16_t length);\nstatic void app_ibrt_ota_bp_check_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                       uint8_t *p_buff,\n                                                       uint16_t length);\nstatic void app_ibrt_ota_bp_check_cmd_send_rsp_timeout_handler(uint16_t rsp_seq,\n                                                               uint8_t *p_buff,\n                                                               uint16_t length);\n\nstatic void app_ibrt_ota_start_cmd_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ota_start_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                         uint16_t length);\nstatic void app_ibrt_ota_start_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                    uint8_t *p_buff,\n                                                    uint16_t length);\nstatic void app_ibrt_ota_start_cmd_send_rsp_timeout_handler(uint16_t rsp_seq,\n                                                            uint8_t *p_buff,\n                                                            uint16_t length);\n\nstatic void app_ibrt_ota_config_cmd_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ota_config_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                          uint16_t length);\nstatic void app_ibrt_ota_config_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length);\nstatic void app_ibrt_ota_config_cmd_send_rsp_timeout_handler(uint16_t rsp_seq,\n                                                             uint8_t *p_buff,\n                                                             uint16_t length);\n\nstatic void app_ibrt_ota_segment_crc_cmd_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ota_segment_crc_cmd_send_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length);\nstatic void app_ibrt_ota_segment_crc_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                          uint8_t *p_buff,\n                                                          uint16_t length);\nstatic void app_ibrt_ota_segment_crc_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nstatic void app_ibrt_ota_image_crc_cmd_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ota_image_crc_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                             uint16_t length);\nstatic void app_ibrt_ota_image_crc_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                        uint8_t *p_buff,\n                                                        uint16_t length);\nstatic void app_ibrt_ota_image_crc_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nstatic void app_ibrt_ota_image_overwrite_cmd_send(uint8_t *p_buff,\n                                                  uint16_t length);\nvoid app_ibrt_ota_image_overwrite_cmd_send_handler(uint16_t rsp_seq,\n                                                   uint8_t *p_buff,\n                                                   uint16_t length);\nstatic void app_ibrt_ota_image_overwrite_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                              uint8_t *p_buff,\n                                                              uint16_t length);\nstatic void app_ibrt_ota_image_overwrite_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nstatic void app_ibrt_ota_start_role_switch_cmd_send(uint8_t *p_buff,\n                                                    uint16_t length);\nstatic void app_ibrt_ota_start_role_switch_cmd_send_handler(uint16_t rsp_seq,\n                                                            uint8_t *p_buff,\n                                                            uint16_t length);\n\nstatic void app_ibrt_ota_image_buff_cmd_send(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_ota_image_buff_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length);\n\nstatic void app_ibrt_common_ota_cmd_send(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_common_ota_cmd_received(uint16_t rsp_seq, uint8_t *p_buff,\n                                             uint16_t length);\n\nstatic app_tws_cmd_instance_t g_ibrt_ota_tws_cmd_handler_table[] = {\n    {IBRT_OTA_TWS_GET_VERSION_CMD, \"OTA_GET_VERSION\",\n     app_ibrt_ota_get_version_cmd_send,\n     app_ibrt_ota_get_version_cmd_send_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_ota_get_version_cmd_send_rsp_timeout_handler,\n     app_ibrt_ota_get_version_cmd_send_rsp_handler},\n    {IBRT_OTA_TWS_SELECT_SIDE_CMD, \"OTA_SELECT_SIDE\",\n     app_ibrt_ota_select_side_cmd_send,\n     app_ibrt_ota_select_side_cmd_send_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_ota_select_side_cmd_send_rsp_timeout_handler,\n     app_ibrt_ota_select_side_cmd_send_rsp_handler},\n    {IBRT_OTA_TWS_BP_CHECK_CMD, \"OTA_BP_CHECK\", // Break-point\n     app_ibrt_ota_bp_check_cmd_send, app_ibrt_ota_bp_check_cmd_send_handler,\n     RSP_TIMEOUT_DEFAULT, app_ibrt_ota_bp_check_cmd_send_rsp_timeout_handler,\n     app_ibrt_ota_bp_check_cmd_send_rsp_handler},\n    {IBRT_OTA_TWS_START_OTA_CMD, \"OTA_START\", app_ibrt_ota_start_cmd_send,\n     app_ibrt_ota_start_cmd_send_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_ota_start_cmd_send_rsp_timeout_handler,\n     app_ibrt_ota_start_cmd_send_rsp_handler},\n    {IBRT_OTA_TWS_OTA_CONFIG_CMD, \"OTA_CONFIG\", app_ibrt_ota_config_cmd_send,\n     app_ibrt_ota_config_cmd_send_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_ota_config_cmd_send_rsp_timeout_handler,\n     app_ibrt_ota_config_cmd_send_rsp_handler},\n    {IBRT_OTA_TWS_SEGMENT_CRC_CMD, \"OTA_SEGMENT_CRC\",\n     app_ibrt_ota_segment_crc_cmd_send,\n     app_ibrt_ota_segment_crc_cmd_send_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_ota_segment_crc_cmd_send_rsp_timeout_handler,\n     app_ibrt_ota_segment_crc_cmd_send_rsp_handler},\n    {IBRT_OTA_TWS_IMAGE_CRC_CMD, \"OTA_IMAGE_CRC\",\n     app_ibrt_ota_image_crc_cmd_send, app_ibrt_ota_image_crc_cmd_send_handler,\n     RSP_TIMEOUT_DEFAULT, app_ibrt_ota_image_crc_cmd_send_rsp_timeout_handler,\n     app_ibrt_ota_image_crc_cmd_send_rsp_handler},\n    {IBRT_OTA_TWS_IMAGE_OVERWRITE_CMD, \"OTA_IMAGE_OVERWRITE\",\n     app_ibrt_ota_image_overwrite_cmd_send,\n     app_ibrt_ota_image_overwrite_cmd_send_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_ota_image_overwrite_cmd_send_rsp_timeout_handler,\n     app_ibrt_ota_image_overwrite_cmd_send_rsp_handler},\n    {IBRT_OTA_TWS_ROLE_SWITCH_CMD, \"OTA_ROLE_SWITCH\",\n     app_ibrt_ota_start_role_switch_cmd_send,\n     app_ibrt_ota_start_role_switch_cmd_send_handler, 0,\n     app_ibrt_ota_image_buff_cmd_rsp_timeout_handler_null,\n     app_ibrt_ota_image_buff_cmd_rsp_handler_null},\n    {IBRT_OTA_TWS_IMAGE_BUFF, \"OTA_IMAGE_BUFF\",\n     app_ibrt_ota_image_buff_cmd_send, app_ibrt_ota_image_buff_cmd_send_handler,\n     0, app_ibrt_ota_image_buff_cmd_rsp_timeout_handler_null,\n     app_ibrt_ota_image_buff_cmd_rsp_handler_null},\n    {IBRT_COMMON_OTA, \"COMMON_OTA_CMD\", app_ibrt_common_ota_cmd_send,\n     app_ibrt_common_ota_cmd_received, 0,\n     app_ibrt_ota_image_buff_cmd_rsp_timeout_handler_null,\n     app_ibrt_ota_image_buff_cmd_rsp_handler_null},\n};\n\nint app_ibrt_ota_tws_cmd_table_get(void **cmd_tbl, uint16_t *cmd_size) {\n  *cmd_tbl = (void *)&g_ibrt_ota_tws_cmd_handler_table;\n  *cmd_size = ARRAY_SIZE(g_ibrt_ota_tws_cmd_handler_table);\n  return 0;\n}\n\nextern OTA_IBRT_TWS_CMD_EXECUTED_RESULT_FROM_SLAVE_T\n    receivedResultAlreadyProcessedBySlave;\n\nuint32_t ibrt_ota_cmd_type = 0;\nuint32_t twsBreakPoint = 0;\nuint8_t errOtaCode = 0;\nstatic uint8_t resend = RESEND_TIME;\n\nstatic void app_ibrt_ota_cache_slave_info(uint8_t typeCode, uint16_t rsp_seq,\n                                          uint8_t *p_buff, uint16_t length) {\n  memcpy(&receivedResultAlreadyProcessedBySlave.typeCode, &typeCode,\n         sizeof(typeCode));\n  memcpy(&receivedResultAlreadyProcessedBySlave.rsp_seq, &rsp_seq,\n         sizeof(rsp_seq));\n  memcpy(&receivedResultAlreadyProcessedBySlave.length, &length,\n         sizeof(length));\n  memcpy(receivedResultAlreadyProcessedBySlave.p_buff, p_buff, length);\n}\n\nstatic void app_ibrt_ota_get_version_cmd_send(uint8_t *p_buff,\n                                              uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(IBRT_OTA_TWS_GET_VERSION_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nvoid app_ibrt_ota_get_version_cmd_send_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length) {\n  if (ibrt_ota_cmd_type == OTA_RSP_VERSION) {\n    ibrt_ota_send_version_rsp();\n    tws_ctrl_send_rsp(IBRT_OTA_TWS_GET_VERSION_CMD, rsp_seq, p_buff, length);\n    ibrt_ota_cmd_type = 0;\n  } else {\n    app_ibrt_ota_cache_slave_info(OTA_RSP_VERSION, rsp_seq, p_buff, length);\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_get_version_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                          uint8_t *p_buff,\n                                                          uint16_t length) {\n  resend = RESEND_TIME;\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_get_version_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length) {\n  if (resend > 0) {\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_GET_VERSION_CMD, p_buff, length);\n    resend--;\n  } else {\n    resend = RESEND_TIME;\n  }\n  TRACE(2, \"%s, %d\", __func__, resend);\n}\n\nstatic void app_ibrt_ota_select_side_cmd_send(uint8_t *p_buff,\n                                              uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(IBRT_OTA_TWS_SELECT_SIDE_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nvoid app_ibrt_ota_select_side_cmd_send_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length) {\n  if (ibrt_ota_cmd_type == OTA_RSP_SIDE_SELECTION) {\n    if (1 == p_buff[1]) {\n      ota_control_side_selection_rsp(true);\n    } else {\n      ota_control_side_selection_rsp(false);\n    }\n    tws_ctrl_send_rsp(IBRT_OTA_TWS_SELECT_SIDE_CMD, rsp_seq, p_buff, length);\n    ibrt_ota_cmd_type = 0;\n  } else {\n    app_ibrt_ota_cache_slave_info(OTA_RSP_SIDE_SELECTION, rsp_seq, p_buff,\n                                  length);\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_select_side_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                          uint8_t *p_buff,\n                                                          uint16_t length) {\n  resend = RESEND_TIME;\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_select_side_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length) {\n  if (resend > 0) {\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_SELECT_SIDE_CMD, p_buff, length);\n    resend--;\n  } else {\n    resend = RESEND_TIME;\n  }\n  TRACE(2, \"%s, %d\", __func__, resend);\n}\n\nstatic void app_ibrt_ota_bp_check_cmd_send(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(IBRT_OTA_TWS_BP_CHECK_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_bp_check_cmd_send_handler(uint16_t rsp_seq,\n                                                   uint8_t *p_buff,\n                                                   uint16_t length) {\n  OTA_RSP_RESUME_VERIFY_T *tRsp = (OTA_RSP_RESUME_VERIFY_T *)p_buff;\n  if (ibrt_ota_cmd_type == OTA_RSP_RESUME_VERIFY) {\n    TRACE(2, \"breakPoint %d, tRsp->breakPoint %d\", twsBreakPoint,\n          tRsp->breakPoint);\n    if (twsBreakPoint == tRsp->breakPoint) {\n      if (twsBreakPoint == 0) {\n        LOG_DBG(0, \"reset random code:\");\n        LOG_DUMP(\"%02x \", (uint8_t *)tRsp, sizeof(OTA_RSP_RESUME_VERIFY_T));\n        ota_randomCode_log((uint8_t *)&tRsp->randomCode);\n      }\n      ota_control_send_resume_response(tRsp->breakPoint, tRsp->randomCode);\n      ibrt_ota_cmd_type = 0;\n    } else {\n      TRACE(1, \"%s tws break-point is not synchronized\", __func__);\n      ota_upgradeLog_destroy();\n      ota_randomCode_log((uint8_t *)&tRsp->randomCode);\n      ota_control_reset_env();\n      ota_status_change(true);\n      tRsp->breakPoint = 0xFFFFFFFF;\n      twsBreakPoint = 0;\n    }\n    tws_ctrl_send_rsp(IBRT_OTA_TWS_BP_CHECK_CMD, rsp_seq, (uint8_t *)tRsp,\n                      length);\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_bp_check_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                       uint8_t *p_buff,\n                                                       uint16_t length) {\n  resend = RESEND_TIME;\n  OTA_RSP_RESUME_VERIFY_T *tRsp = (OTA_RSP_RESUME_VERIFY_T *)p_buff;\n  if (tRsp->breakPoint == 0xFFFFFFFF) {\n    TRACE(1, \"%s tws break-point is not synchronized\", __func__);\n    ota_upgradeLog_destroy();\n    ota_randomCode_log((uint8_t *)&tRsp->randomCode);\n    ota_control_reset_env();\n    ota_status_change(true);\n    tRsp->breakPoint = 0;\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_BP_CHECK_CMD, (uint8_t *)tRsp, length);\n  }\n  TRACE(1, \"%s\", __func__);\n}\nstatic void app_ibrt_ota_bp_check_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length) {\n  if (resend > 0) {\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_BP_CHECK_CMD, p_buff, length);\n    resend--;\n  } else {\n    resend = RESEND_TIME;\n  }\n  TRACE(2, \"%s, %d\", __func__, resend);\n}\n\nstatic void app_ibrt_ota_start_cmd_send(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(IBRT_OTA_TWS_START_OTA_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nvoid app_ibrt_ota_start_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                         uint16_t length) {\n  if (ibrt_ota_cmd_type == OTA_RSP_START) {\n    ibrt_ota_send_start_response(*p_buff);\n    ibrt_ota_cmd_type = 0;\n    tws_ctrl_send_rsp(IBRT_OTA_TWS_START_OTA_CMD, rsp_seq, p_buff, length);\n  } else {\n    app_ibrt_ota_cache_slave_info(OTA_RSP_START, rsp_seq, p_buff, length);\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_start_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                    uint8_t *p_buff,\n                                                    uint16_t length) {\n  resend = RESEND_TIME;\n  TRACE(1, \"%s\", __func__);\n}\nstatic void app_ibrt_ota_start_cmd_send_rsp_timeout_handler(uint16_t rsp_seq,\n                                                            uint8_t *p_buff,\n                                                            uint16_t length) {\n  if (resend > 0) {\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_START_OTA_CMD, p_buff, length);\n    resend--;\n  } else {\n    resend = RESEND_TIME;\n  }\n  TRACE(2, \"%s, %d\", __func__, resend);\n}\n\nstatic void app_ibrt_ota_config_cmd_send(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(IBRT_OTA_TWS_OTA_CONFIG_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nvoid app_ibrt_ota_config_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                          uint16_t length) {\n  if (ibrt_ota_cmd_type == OTA_RSP_CONFIG) {\n    if (*p_buff == 1 && errOtaCode == 1) {\n      ibrt_ota_send_configuration_response(true);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_OTA_CONFIG_CMD, rsp_seq, p_buff, length);\n    } else if (*p_buff == OTA_RESULT_ERR_IMAGE_SIZE ||\n               errOtaCode == OTA_RESULT_ERR_IMAGE_SIZE) {\n      uint8_t errImageSize = OTA_RESULT_ERR_IMAGE_SIZE;\n      ibrt_ota_send_result_response(OTA_RESULT_ERR_IMAGE_SIZE);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_OTA_CONFIG_CMD, rsp_seq,\n                        (uint8_t *)&errImageSize, length);\n    } else if (*p_buff == OTA_RESULT_ERR_BREAKPOINT ||\n               errOtaCode == OTA_RESULT_ERR_BREAKPOINT) {\n      uint8_t errBreakPoint = OTA_RESULT_ERR_BREAKPOINT;\n      ota_upgradeLog_destroy();\n      ibrt_ota_send_result_response(OTA_RESULT_ERR_BREAKPOINT);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_OTA_CONFIG_CMD, rsp_seq,\n                        (uint8_t *)&errBreakPoint, length);\n    } else {\n      ibrt_ota_send_configuration_response(false);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_OTA_CONFIG_CMD, rsp_seq, p_buff, length);\n    }\n    errOtaCode = 0;\n    ibrt_ota_cmd_type = 0;\n  } else {\n    app_ibrt_ota_cache_slave_info(OTA_RSP_CONFIG, rsp_seq, p_buff, length);\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_config_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length) {\n  resend = RESEND_TIME;\n  if (*p_buff == OTA_RESULT_ERR_BREAKPOINT) {\n    ota_upgradeLog_destroy();\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_config_cmd_send_rsp_timeout_handler(uint16_t rsp_seq,\n                                                             uint8_t *p_buff,\n                                                             uint16_t length) {\n  if (resend > 0) {\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_OTA_CONFIG_CMD, p_buff, length);\n    resend--;\n  } else {\n    resend = RESEND_TIME;\n  }\n  TRACE(2, \"%s, %d\", __func__, resend);\n}\n\nstatic void app_ibrt_ota_segment_crc_cmd_send(uint8_t *p_buff,\n                                              uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(IBRT_OTA_TWS_SEGMENT_CRC_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nvoid app_ibrt_ota_segment_crc_cmd_send_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length) {\n  if (ibrt_ota_cmd_type == OTA_RSP_SEGMENT_VERIFY) {\n    TRACE(3, \"%s: %d %d\", __func__, *p_buff, errOtaCode);\n    if (*p_buff == 1 && errOtaCode == 1) {\n      ibrt_ota_send_segment_verification_response(true);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_SEGMENT_CRC_CMD, rsp_seq, p_buff, length);\n    } else if (*p_buff == OTA_RESULT_ERR_SEG_VERIFY ||\n               errOtaCode == OTA_RESULT_ERR_SEG_VERIFY) {\n      uint8_t errSegVerify = OTA_RESULT_ERR_SEG_VERIFY;\n      ota_upgradeLog_destroy();\n      ibrt_ota_send_result_response(OTA_RESULT_ERR_SEG_VERIFY);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_SEGMENT_CRC_CMD, rsp_seq,\n                        (uint8_t *)&errSegVerify, length);\n    } else if (*p_buff == OTA_RESULT_ERR_FLASH_OFFSET ||\n               errOtaCode == OTA_RESULT_ERR_FLASH_OFFSET) {\n      uint8_t errFlashOffset = OTA_RESULT_ERR_FLASH_OFFSET;\n      ota_upgradeLog_destroy();\n      ibrt_ota_send_result_response(OTA_RESULT_ERR_FLASH_OFFSET);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_SEGMENT_CRC_CMD, rsp_seq,\n                        (uint8_t *)&errFlashOffset, length);\n    } else {\n      ibrt_ota_send_segment_verification_response(false);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_SEGMENT_CRC_CMD, rsp_seq, p_buff, length);\n    }\n    errOtaCode = 0;\n    ibrt_ota_cmd_type = 0;\n  } else {\n    app_ibrt_ota_cache_slave_info(OTA_RSP_SEGMENT_VERIFY, rsp_seq, p_buff,\n                                  length);\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_segment_crc_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                          uint8_t *p_buff,\n                                                          uint16_t length) {\n  resend = RESEND_TIME;\n  if (*p_buff == OTA_RESULT_ERR_SEG_VERIFY ||\n      *p_buff == OTA_RESULT_ERR_FLASH_OFFSET) {\n    ota_upgradeLog_destroy();\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_segment_crc_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length) {\n  if (resend > 0) {\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_SEGMENT_CRC_CMD, p_buff, length);\n    resend--;\n  } else {\n    resend = RESEND_TIME;\n  }\n  TRACE(2, \"%s, %d\", __func__, resend);\n}\n\nstatic void app_ibrt_ota_image_crc_cmd_send(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(IBRT_OTA_TWS_IMAGE_CRC_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nvoid app_ibrt_ota_image_crc_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                             uint16_t length) {\n  if (ibrt_ota_cmd_type == OTA_RSP_RESULT) {\n    if (*p_buff == 1 && errOtaCode == 1) {\n      ibrt_ota_send_result_response(true);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_IMAGE_CRC_CMD, rsp_seq, p_buff, length);\n      errOtaCode = 0;\n    } else {\n      uint8_t crcErr = 0;\n      ibrt_ota_send_result_response(false);\n      ota_upgradeLog_destroy();\n      ota_control_reset_env();\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_IMAGE_CRC_CMD, rsp_seq, (uint8_t *)&crcErr,\n                        length);\n    }\n    ibrt_ota_cmd_type = 0;\n  } else {\n    app_ibrt_ota_cache_slave_info(OTA_RSP_RESULT, rsp_seq, p_buff, length);\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_image_crc_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                        uint8_t *p_buff,\n                                                        uint16_t length) {\n  resend = RESEND_TIME;\n  if (*p_buff == 0) {\n    ota_upgradeLog_destroy();\n    ota_control_reset_env();\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_image_crc_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length) {\n  if (resend > 0) {\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_IMAGE_CRC_CMD, p_buff, length);\n    resend--;\n  } else {\n    resend = RESEND_TIME;\n  }\n  TRACE(2, \"%s, %d\", __func__, resend);\n}\n\nstatic void app_ibrt_ota_image_overwrite_cmd_send(uint8_t *p_buff,\n                                                  uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(IBRT_OTA_TWS_IMAGE_OVERWRITE_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nvoid app_ibrt_ota_image_overwrite_cmd_send_handler(uint16_t rsp_seq,\n                                                   uint8_t *p_buff,\n                                                   uint16_t length) {\n  if (ibrt_ota_cmd_type == OTA_RSP_IMAGE_APPLY) {\n    if (*p_buff == 1 && errOtaCode == 1) {\n      int ret = tws_ctrl_send_rsp(IBRT_OTA_TWS_IMAGE_OVERWRITE_CMD, rsp_seq,\n                                  p_buff, length);\n      if (0 == ret) {\n        ota_update_info();\n        ota_control_image_apply_rsp(true);\n        ota_check_and_reboot_to_use_new_image();\n      }\n    } else {\n      uint8_t cantOverWrite = 0;\n      ota_control_image_apply_rsp(false);\n      tws_ctrl_send_rsp(IBRT_OTA_TWS_IMAGE_OVERWRITE_CMD, rsp_seq,\n                        (uint8_t *)&cantOverWrite, length);\n    }\n    errOtaCode = 0;\n    ibrt_ota_cmd_type = 0;\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_image_overwrite_cmd_send_rsp_handler(uint16_t rsp_seq,\n                                                              uint8_t *p_buff,\n                                                              uint16_t length) {\n  resend = RESEND_TIME;\n  if (*p_buff == 1) {\n    ota_update_info();\n    ota_check_and_reboot_to_use_new_image();\n  }\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_image_overwrite_cmd_send_rsp_timeout_handler(\n    uint16_t rsp_seq, uint8_t *p_buff, uint16_t length) {\n  if (resend > 0) {\n    tws_ctrl_send_cmd(IBRT_OTA_TWS_IMAGE_OVERWRITE_CMD, p_buff, length);\n    resend--;\n  } else {\n    resend = RESEND_TIME;\n  }\n  TRACE(2, \"%s, %d\", __func__, resend);\n}\n\nstatic void app_ibrt_ota_image_buff_cmd_send(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_without_rsp(IBRT_OTA_TWS_IMAGE_BUFF, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_image_buff_cmd_send_handler(uint16_t rsp_seq,\n                                                     uint8_t *p_buff,\n                                                     uint16_t length) {\n  ota_bes_handle_received_data(p_buff, true, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_common_ota_cmd_send(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_without_rsp(IBRT_COMMON_OTA, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_common_ota_cmd_received(uint16_t rsp_seq, uint8_t *p_buff,\n                                             uint16_t length) {\n  ota_common_on_relay_data_received(p_buff, length);\n}\n\n#ifdef IBRT_OTA\nstatic void app_ibrt_ota_start_role_switch_cmd_send(uint8_t *p_buff,\n                                                    uint16_t length) {\n  app_ibrt_send_cmd_without_rsp(IBRT_OTA_TWS_ROLE_SWITCH_CMD, p_buff, length);\n  TRACE(1, \"%s\", __func__);\n}\n\nstatic void app_ibrt_ota_start_role_switch_cmd_send_handler(uint16_t rsp_seq,\n                                                            uint8_t *p_buff,\n                                                            uint16_t length) {\n  TRACE(2, \"%s:%d %d\", __func__, p_buff[0], length);\n\n  if ((p_buff[0] == OTA_RS_INFO_MASTER_SEND_RS_REQ_CMD) && (length == 1)) {\n    bes_ota_send_role_switch_req();\n  } else if ((p_buff[0] == OTA_RS_INFO_MASTER_DISCONECT_CMD) && (length == 1)) {\n    ota_disconnect();\n  }\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_ota_update.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef __INTERACTION__\n#if defined(IBRT)\n#include \"app_ibrt_ota_update.h\"\n#include \"app_bt_stream.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_interaction.h\"\n#include \"app_interaction_ota.h\"\n#include \"app_media_player.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"audioflinger.h\"\n#include \"bt_drv_interface.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"crc32.h\"\n#include \"hal_norflash.h\"\n#include \"me_api.h\"\n#include \"pmu.h\"\n#include \nextern uint32_t __ota_upgrade_log_start[];\nextern INTERACTION_OTA_VALIDATION_DONE_CFM_T Ota_validation_done_cfm;\nextern uint32_t get_upgradeSize_log(void);\nextern uint32_t breakPoint_local;\nextern uint32_t breakPoint_remote;\nextern app_ibrt_ota_cmd_code_e cmd_rsp_type;\n\nuint8_t *ota_address = NULL;\nuint32_t ota_address_offset = 0;\nbool ota_check_md5 = 1;\nuint32_t error_list[16] = {0};\nstatic void app_ota_reset_timer_handler(void const *param) {\n  app_interaction_ota_finished_handler();\n}\n\nosTimerDef(APP_OTA_RESET, app_ota_reset_timer_handler);\nstatic osTimerId app_ota_reset_timer = NULL;\n\n/*\n * custom cmd handler add here, this is just a example\n */\n\nstatic void app_ibrt_ota_update_now(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_ota_update_now_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                            uint16_t length);\nstatic void app_ibrt_ota_update_now_rsp_timeout_handler(uint16_t rsp_seq,\n                                                        uint8_t *p_buff,\n                                                        uint16_t length);\nstatic void app_ibrt_ota_update_now_rsp_handler(uint16_t rsp_seq,\n                                                uint8_t *p_buff,\n                                                uint16_t length);\n\nstatic void app_ibrt_check_update_info(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_check_update_info_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length);\nstatic void app_ibrt_check_update_info2_handler(uint16_t rsp_seq,\n                                                uint8_t *p_buff,\n                                                uint16_t length);\n\nstatic void app_ibrt_sync_breakpoint(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_sync_breakpoint_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                             uint16_t length);\nstatic void app_ibrt_sync_breakpoint_rsp_timeout_handler(uint16_t rsp_seq,\n                                                         uint8_t *p_buff,\n                                                         uint16_t length);\nstatic void app_ibrt_sync_breakpoint_rsp_handler(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length);\n\nstatic void app_ibrt_validation(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_validation_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                        uint16_t length);\nstatic void app_ibrt_validation_rsp_timeout_handler(uint16_t rsp_seq,\n                                                    uint8_t *p_buff,\n                                                    uint16_t length);\nstatic void app_ibrt_validation_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                            uint16_t length);\n\nstatic void app_ibrt_update_section(uint8_t *p_buff, uint16_t length);\nstatic void app_ibrt_update_section_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                            uint16_t length);\nstatic void app_ibrt_update_section_rsp_timeout_handler(uint16_t rsp_seq,\n                                                        uint8_t *p_buff,\n                                                        uint16_t length);\nstatic void app_ibrt_update_section_rsp_handler(uint16_t rsp_seq,\n                                                uint8_t *p_buff,\n                                                uint16_t length);\n\nvoid app_ibrt_view_update_list(void) {\n  TRACE(0, \"view_update_list start: =====================\");\n  for (uint8_t i = 0; i < 16; i += 8)\n    TRACE(8, \"0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\",\n          error_list[i], error_list[i + 1], error_list[i + 2],\n          error_list[i + 3], error_list[i + 4], error_list[i + 5],\n          error_list[i + 6], error_list[i + 7]);\n  TRACE(0, \"view_update_list end: =====================\");\n}\n\nvoid app_ibrt_view_update_sector(void) {\n  TRACE(0, \"view_update_sector start: =====================\");\n  TRACE(2, \"0x%08x 0x%08x\\n\", __ota_upgrade_log_start[0],\n        __ota_upgrade_log_start[1]);\n  for (uint16_t i = 2; i < 512; i += 8) {\n    if (i != 506) {\n      TRACE(9, \"%d 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\", i,\n            __ota_upgrade_log_start[i], __ota_upgrade_log_start[i + 1],\n            __ota_upgrade_log_start[i + 2], __ota_upgrade_log_start[i + 3],\n            __ota_upgrade_log_start[i + 4], __ota_upgrade_log_start[i + 5],\n            __ota_upgrade_log_start[i + 6], __ota_upgrade_log_start[i + 7]);\n    } else {\n      TRACE(7, \"%d 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\", i,\n            __ota_upgrade_log_start[i], __ota_upgrade_log_start[i + 1],\n            __ota_upgrade_log_start[i + 2], __ota_upgrade_log_start[i + 3],\n            __ota_upgrade_log_start[i + 4], __ota_upgrade_log_start[i + 5]);\n    }\n  }\n  TRACE(0, \"view_update_sector end: =====================\");\n}\n\nvoid reset_error_list() { memset(error_list, 0, sizeof(error_list)); }\n\nvoid set_all_error_list() {\n  memset(error_list, 0xFFFFFFFF, sizeof(error_list));\n}\n\nvoid set_error_list(uint16_t list) {\n  if (list < 512)\n    error_list[list / 32] |= (1 << (31 - list % 32));\n}\n\nvoid clr_error_list(uint16_t list) {\n  if (list < 512)\n    error_list[list / 32] &= ~(1 << (31 - list % 32));\n}\n\nuint32_t get_error_list() {\n  int8_t i, j;\n  for (i = 0; i < 16; i++) {\n    for (j = 31; j >= 0; j--) {\n      if (error_list[i] & (1 << j))\n        return (i * 32 + 32 - j) * 0x1000;\n    }\n  }\n  return 0;\n}\n\nstatic app_tws_cmd_instance_t g_ibrt_ota_cmd_handler_table[] = {\n    {APP_TWS_CMD_OTA_UPDATE_NOW, \"OTA_UPDATE_NOW\", app_ibrt_ota_update_now,\n     app_ibrt_ota_update_now_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_ota_update_now_rsp_timeout_handler,\n     app_ibrt_ota_update_now_rsp_handler},\n    {APP_TWS_CMD_CHECK_UPDATE_INFO, \"CHECK_UPDATE_INFO\",\n     app_ibrt_check_update_info, app_ibrt_check_update_info_handler, 0, 0, 0},\n    {APP_TWS_CMD_CHECK_UPDATE_INFO2, \"CHECK_UPDATE_INFO2\", 0,\n     app_ibrt_check_update_info2_handler, 0, 0, 0},\n    {APP_TWS_CMD_SYNC_BREAKPIONT, \"SYNC_BREAKPIONT\", app_ibrt_sync_breakpoint,\n     app_ibrt_sync_breakpoint_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_sync_breakpoint_rsp_timeout_handler,\n     app_ibrt_sync_breakpoint_rsp_handler},\n    {APP_TWS_CMD_VALIDATION_DONE, \"VALIDATION_DONE\", app_ibrt_validation,\n     app_ibrt_validation_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_validation_rsp_timeout_handler, app_ibrt_validation_rsp_handler},\n    {APP_TWS_CMD_UPDATE_SECTION, \"UPDATE_SECTION\", app_ibrt_update_section,\n     app_ibrt_update_section_handler, RSP_TIMEOUT_DEFAULT,\n     app_ibrt_update_section_rsp_timeout_handler,\n     app_ibrt_update_section_rsp_handler},\n};\n\nint app_ibrt_ota_cmd_table_get(void **cmd_tbl, uint16_t *cmd_size) {\n  *cmd_tbl = (void *)&g_ibrt_ota_cmd_handler_table;\n  *cmd_size = ARRAY_SIZE(g_ibrt_ota_cmd_handler_table);\n  return 0;\n}\n\n/*===============================================================================*/\nvoid app_ibrt_ota_update_immediately(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (p_ibrt_ctrl->nv_role == IBRT_MASTER) {\n    if (app_ota_reset_timer == NULL)\n      app_ota_reset_timer =\n          osTimerCreate(osTimer(APP_OTA_RESET), osTimerOnce, NULL);\n    osTimerStop(app_ota_reset_timer);\n    osTimerStart(app_ota_reset_timer, 500);\n    tws_ctrl_send_cmd(APP_TWS_CMD_OTA_UPDATE_NOW, NULL, 0);\n  }\n}\n\nvoid app_ibrt_ota_update_now(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(APP_TWS_CMD_OTA_UPDATE_NOW, NULL, 0);\n}\n\nvoid app_ibrt_ota_update_now_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                     uint16_t length) {\n  app_interaction_ota_finished_handler();\n}\n\nvoid app_ibrt_ota_update_now_rsp_timeout_handler(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length) {\n  TRACE(1, \"ibrt_ui_log:%s\", __func__);\n}\n\nvoid app_ibrt_ota_update_now_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                         uint16_t length) {\n  TRACE(2, \"ibrt_ui_log:0x%08x,%d\", p_buff, length);\n}\n\n/*===============================================================================*/\nvoid app_ibrt_ota_check_update_info(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  reset_error_list();\n  if (p_ibrt_ctrl->nv_role == IBRT_MASTER)\n    tws_ctrl_send_cmd(APP_TWS_CMD_CHECK_UPDATE_INFO, NULL, 0);\n}\n\nvoid app_ibrt_check_update_info(uint8_t *p_buff, uint16_t length) {\n  if (ota_address_offset >= FLASH_SECTOR_SIZE_IN_BYTES) {\n    TRACE(0,\n          \"ibrt_ui_log:app_ibrt_get_update_list before ota completed!!!!!!\\n\");\n    ota_check_md5 = 1;\n    ota_address_offset = 0;\n    ota_address = (uint8_t *)__ota_upgrade_log_start;\n    app_ibrt_view_update_list();\n    tws_ctrl_send_cmd(cmd_rsp_type, NULL, 0);\n  } else {\n    ibrt_ota_check_cmd_t cmd;\n    cmd.length = APP_TWS_CTRL_BUFFER_LEN;\n    cmd.address = ota_address =\n        (uint8_t *)__ota_upgrade_log_start + ota_address_offset;\n    breakPoint_local = breakPoint_remote = 0;\n    TRACE(2, \"== > addr:0x%08x length:%d\\n\", cmd.address, cmd.length);\n    app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_CHECK_UPDATE_INFO,\n                                  (uint8_t *)&cmd,\n                                  sizeof(ibrt_ota_check_cmd_t));\n  }\n}\n\nvoid app_ibrt_check_update_info_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                        uint16_t length) {\n  ibrt_ota_check_cmd_t *p_ibrt_ota_check_cmd = (ibrt_ota_check_cmd_t *)p_buff;\n  app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_CHECK_UPDATE_INFO2,\n                                p_ibrt_ota_check_cmd->address,\n                                p_ibrt_ota_check_cmd->length);\n}\n\nvoid app_ibrt_check_update_info2_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                         uint16_t length) {\n  for (uint16_t i = 0; i < length / 4; i += 2) {\n    if (ota_check_md5) {\n      ota_check_md5 = 0;\n      if (*((uint32_t *)ota_address) != *((uint32_t *)p_buff)) {\n        TRACE(0, \"md5 header error!!!!!\");\n        TRACE(2, \"== >>>0 0x%08x 0x%08x\", *((uint32_t *)ota_address),\n              *((uint32_t *)p_buff));\n        set_all_error_list();\n        ota_address_offset = FLASH_SECTOR_SIZE_IN_BYTES;\n        break;\n      }\n    } else {\n      if ((*((uint32_t *)ota_address + i) != *((uint32_t *)p_buff + i)) ||\n          (*((uint32_t *)ota_address + i + 1) !=\n           *((uint32_t *)p_buff + i + 1))) {\n        TRACE(1, \"%d offset or crc error!!!!!\", i);\n        TRACE(2, \"== >>>1 0x%08x 0x%08x\", *((uint32_t *)ota_address + i),\n              *((uint32_t *)p_buff + i));\n        TRACE(2, \"== >>>2 0x%08x 0x%08x\", *((uint32_t *)ota_address + i + 1),\n              *((uint32_t *)p_buff + i + 1));\n        set_error_list(ota_address_offset / 8 + (i - 2) / 2);\n      }\n    }\n  }\n  ota_address_offset += APP_TWS_CTRL_BUFFER_LEN;\n  app_ibrt_check_update_info(NULL, 0);\n}\n\n/*===============================================================================*/\nvoid app_ibrt_sync_breakpoint(uint8_t *p_buff, uint16_t length) {\n  ibrt_ota_sync_breakpoint_cmd_t cmd;\n  cmd.local_point = breakPoint_local = get_upgradeSize_log();\n  cmd.remote_point = breakPoint_remote = get_error_list();\n  app_ibrt_send_cmd_with_rsp(APP_TWS_CMD_SYNC_BREAKPIONT, (uint8_t *)&cmd,\n                             sizeof(ibrt_ota_check_cmd_t));\n}\n\nvoid app_ibrt_sync_breakpoint_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                      uint16_t length) {\n  ibrt_ota_sync_breakpoint_cmd_t *cmd =\n      (ibrt_ota_sync_breakpoint_cmd_t *)p_buff;\n  breakPoint_local = cmd->local_point;\n  breakPoint_remote = cmd->remote_point;\n  tws_ctrl_send_rsp(APP_TWS_CMD_SYNC_BREAKPIONT, rsp_seq, NULL, 0);\n}\n\nvoid app_ibrt_sync_breakpoint_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                          uint16_t length) {\n  app_interaction_ota_upgrade_sys_rsp();\n}\n\nvoid app_ibrt_sync_breakpoint_rsp_timeout_handler(uint16_t rsp_seq,\n                                                  uint8_t *p_buff,\n                                                  uint16_t length) {}\n\nvoid app_ibrt_validation(uint8_t *p_buff, uint16_t length) {\n  ibrt_ota_sync_validation_cmd_t cmd;\n  if (get_error_list() == 0) {\n    cmd.flag = INTERACTION_SUCESS;\n    Ota_validation_done_cfm.status = INTERACTION_SUCESS;\n  } else {\n    cmd.flag = INTERACTION_VALIDATION_FAILURE;\n    Ota_validation_done_cfm.status = INTERACTION_VALIDATION_FAILURE;\n  }\n  app_interaction_ota_upgrade_is_validation_done_rsp();\n  app_ibrt_send_cmd_with_rsp(APP_TWS_CMD_VALIDATION_DONE, (uint8_t *)&cmd,\n                             sizeof(ibrt_ota_sync_validation_cmd_t));\n}\n\nvoid app_ibrt_validation_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                 uint16_t length) {\n  ibrt_ota_sync_validation_cmd_t *cmd =\n      (ibrt_ota_sync_validation_cmd_t *)p_buff;\n  if (cmd->flag == INTERACTION_SUCESS) {\n    app_interaction_ota_upgrade_is_complete_hanlder(); // for send 0x0305 cmd to\n                                                       // phone;\n  }\n  tws_ctrl_send_rsp(APP_TWS_CMD_VALIDATION_DONE, rsp_seq, NULL, 0);\n  app_interaction_ota_finished_handler();\n}\n\nvoid app_ibrt_validation_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                     uint16_t length) {\n  app_interaction_ota_upgrade_is_complete_hanlder(); // for send 0x0305 cmd to\n                                                     // phone;\n  app_interaction_ota_finished_handler();\n}\n\nvoid app_ibrt_validation_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                             uint16_t length) {}\n\n/*===============================================================================*/\nvoid app_ibrt_ota_force_update(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (p_ibrt_ctrl->nv_role == IBRT_MASTER) {\n    static uint8_t number = 0;\n    ibrt_ota_update_cmd_t cmd = {0};\n    cmd.point = get_error_list();\n    TRACE(1, \"update_point: 0x%08x\\n\", cmd.point);\n    if (cmd.point != 0) {\n      cmd.length = APP_TWS_CTRL_BUFFER_LEN;\n      cmd.address = OTA_FLASH_ENTRY2_OFFSET + cmd.point +\n                    number * APP_TWS_CTRL_BUFFER_LEN;\n      memcpy(cmd.buff, (uint8_t *)cmd.address, APP_TWS_CTRL_BUFFER_LEN);\n      cmd.number =\n          number % (FLASH_SECTOR_SIZE_IN_BYTES / APP_TWS_CTRL_BUFFER_LEN);\n      number++;\n      TRACE(\n          3,\n          \"ibrt_ui_log:app_ibrt_ota_force_update addr:0x%08x length:%d no:%d\\n\",\n          cmd.address, cmd.length, cmd.number);\n      tws_ctrl_send_cmd(APP_TWS_CMD_UPDATE_SECTION, (uint8_t *)&cmd,\n                        sizeof(ibrt_ota_update_cmd_t));\n      // TRACE(0,\"Calculate the crc32 of the segment.\");\n      // uint32_t startFlashAddr = cmd.address/FLASH_SECTOR_SIZE_IN_BYTES;\n      // ota_crc = cmd.crc = crc32(0, (uint8_t *)(startFlashAddr),\n      // FLASH_SECTOR_SIZE_IN_BYTES); TRACE(1,\"CRC32 of the segement is 0x%x\",\n      // cmd.crc); TRACE(2,\"startFlashAddr is 0x%x, length is\n      // %d\",startFlashAddr,FLASH_SECTOR_SIZE_IN_BYTES);\n    } else {\n      TRACE(0, \"ibrt_ui_log:app_ibrt_ota_force_update completed!!!!!!\\n\");\n      app_ibrt_ota_update_immediately();\n    }\n  }\n}\n\nvoid app_ibrt_update_section(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_with_rsp(APP_TWS_CMD_UPDATE_SECTION, p_buff, length);\n}\n\nvoid app_ibrt_update_section_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                     uint16_t length) {\n  ibrt_ota_update_cmd_t *p_ibrt_ota_update_cmd =\n      (ibrt_ota_update_cmd_t *)p_buff;\n  uint32_t lock;\n  enum HAL_NORFLASH_RET_T ret = HAL_NORFLASH_OK;\n  TRACE(4,\n        \"ibrt_ui_log:app_ibrt_update_section_handler addr:0x%08x length:%d \"\n        \"no:%d point:%d\\n\",\n        p_ibrt_ota_update_cmd->address, p_ibrt_ota_update_cmd->length,\n        p_ibrt_ota_update_cmd->number, p_ibrt_ota_update_cmd->point);\n\n  lock = int_lock();\n  pmu_flash_write_config();\n  if (p_ibrt_ota_update_cmd->number == 0) {\n    ret = hal_norflash_erase(HAL_NORFLASH_ID_0, p_ibrt_ota_update_cmd->address,\n                             FLASH_SECTOR_SIZE_IN_BYTES);\n    TRACE(1, \"hal_norflash_erase Sector. %d\", ret);\n  }\n\n  ret = hal_norflash_write(HAL_NORFLASH_ID_0, p_ibrt_ota_update_cmd->address,\n                           (uint8_t *)p_ibrt_ota_update_cmd->buff,\n                           p_ibrt_ota_update_cmd->length);\n  TRACE(1, \"hal_norflash_write Sector. %d\", ret);\n  pmu_flash_read_config();\n  int_unlock(lock);\n\n  ibrt_ota_update_cmd_t cmd = {0};\n  cmd.number = p_ibrt_ota_update_cmd->number;\n  cmd.point = p_ibrt_ota_update_cmd->point;\n  /*\n      if(p_ibrt_ota_update_cmd->number ==\n     FLASH_SECTOR_SIZE_IN_BYTES/APP_TWS_CTRL_BUFFER_LEN-1){ TRACE(0,\"Calculate\n     the crc32 of the segment.\"); uint32_t startFlashAddr =\n     p_ibrt_ota_update_cmd->address - FLASH_SECTOR_SIZE_IN_BYTES +\n     APP_TWS_CTRL_BUFFER_LEN; cmd.crc = crc32(0, (uint8_t *)(startFlashAddr),\n     FLASH_SECTOR_SIZE_IN_BYTES); TRACE(1,\"CRC32 of the segement is 0x%x\",\n     cmd.crc); TRACE(2,\"startFlashAddr is 0x%x, length is\n     %d\",startFlashAddr,FLASH_SECTOR_SIZE_IN_BYTES);\n      }\n  */\n  tws_ctrl_send_rsp(APP_TWS_CMD_UPDATE_SECTION, rsp_seq, (uint8_t *)&cmd,\n                    sizeof(ibrt_ota_update_cmd_t));\n}\n\nvoid app_ibrt_update_section_rsp_timeout_handler(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length) {\n  TRACE(1, \"ibrt_ui_log:%s\", __func__);\n}\n\nvoid app_ibrt_update_section_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                         uint16_t length) {\n  ibrt_ota_update_cmd_t *p_ibrt_ota_update_rsp =\n      (ibrt_ota_update_cmd_t *)p_buff;\n  TRACE(3,\n        \"ibrt_ui_log:app_ibrt_update_section_rsp_handler addr:0x%08x length:%d \"\n        \"no:%d\\n\",\n        p_ibrt_ota_update_rsp->address, p_ibrt_ota_update_rsp->length,\n        p_ibrt_ota_update_rsp->number);\n  if (p_ibrt_ota_update_rsp->number ==\n      FLASH_SECTOR_SIZE_IN_BYTES / APP_TWS_CTRL_BUFFER_LEN - 1) {\n    TRACE(1, \"CRC32 of the update is 0x%08x\", p_ibrt_ota_update_rsp->crc);\n    // if(p_ibrt_ota_update_rsp->crc == ota_crc)\n    clr_error_list(p_ibrt_ota_update_rsp->point);\n    app_ibrt_view_update_list();\n  }\n  app_ibrt_ota_force_update();\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_peripheral_manager.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_peripheral_manager.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_tws_besaud.h\"\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_vendor_cmd_evt.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"bt_if.h\"\n#include \"cmsis_os.h\"\n#include \"conmgr_api.h\"\n#include \"crc16.h\"\n#include \"hci_api.h\"\n#include \"heap_api.h\"\n#include \"l2cap_api.h\"\n#include \"me_api.h\"\n#include \"rfcomm_api.h\"\n#include \"tws_role_switch.h\"\n#include \n#if defined(IBRT)\nosThreadId app_ibrt_peripheral_tid;\nstatic void app_ibrt_peripheral_thread(void const *argument);\nosThreadDef(app_ibrt_peripheral_thread, osPriorityHigh, 1, 2048,\n            \"app_ibrt_peripheral_thread\");\n\n#define TWS_PERIPHERAL_DEVICE_MAILBOX_MAX (10)\nosMailQDef(app_ibrt_peripheral_mailbox, TWS_PERIPHERAL_DEVICE_MAILBOX_MAX,\n           TWS_PD_MSG_BLOCK);\nstatic osMailQId app_ibrt_peripheral_mailbox = NULL;\nstatic uint8_t app_ibrt_peripheral_mailbox_cnt = 0;\n\nstatic int app_ibrt_peripheral_mailbox_init(void) {\n  app_ibrt_peripheral_mailbox =\n      osMailCreate(osMailQ(app_ibrt_peripheral_mailbox), NULL);\n  if (app_ibrt_peripheral_mailbox == NULL) {\n    TRACE(0, \"Failed to Create app_ibrt_peripheral_mailbox\\n\");\n    return -1;\n  }\n  app_ibrt_peripheral_mailbox_cnt = 0;\n  return 0;\n}\n\nint app_ibrt_peripheral_mailbox_put(TWS_PD_MSG_BLOCK *msg_src) {\n  if (!msg_src) {\n    TRACE(0, \"msg_src is a null pointer in app_ibrt_peripheral_mailbox_put!\");\n    return -1;\n  }\n\n  osStatus status;\n  TWS_PD_MSG_BLOCK *msg_p = NULL;\n  msg_p = (TWS_PD_MSG_BLOCK *)osMailAlloc(app_ibrt_peripheral_mailbox, 0);\n  ASSERT(msg_p, \"osMailAlloc error\");\n  msg_p->msg_body.message_id = msg_src->msg_body.message_id;\n  msg_p->msg_body.message_ptr = msg_src->msg_body.message_ptr;\n  msg_p->msg_body.message_Param0 = msg_src->msg_body.message_Param0;\n  msg_p->msg_body.message_Param1 = msg_src->msg_body.message_Param1;\n  msg_p->msg_body.message_Param2 = msg_src->msg_body.message_Param2;\n\n  status = osMailPut(app_ibrt_peripheral_mailbox, msg_p);\n  if (osOK == status)\n    app_ibrt_peripheral_mailbox_cnt++;\n  return (int)status;\n}\n\nint app_ibrt_peripheral_mailbox_free(TWS_PD_MSG_BLOCK *msg_p) {\n  if (!msg_p) {\n    TRACE(0, \"msg_p is a null pointer in app_ibrt_peripheral_mailbox_free!\");\n    return -1;\n  }\n  osStatus status;\n\n  status = osMailFree(app_ibrt_peripheral_mailbox, msg_p);\n  if (osOK == status)\n    app_ibrt_peripheral_mailbox_cnt--;\n\n  return (int)status;\n}\n\nint app_ibrt_peripheral_mailbox_get(TWS_PD_MSG_BLOCK **msg_p) {\n  if (!msg_p) {\n    TRACE(0, \"msg_p is a null pointer in app_ibrt_peripheral_mailbox_get!\");\n    return -1;\n  }\n\n  osEvent evt;\n  evt = osMailGet(app_ibrt_peripheral_mailbox, osWaitForever);\n  if (evt.status == osEventMail) {\n    *msg_p = (TWS_PD_MSG_BLOCK *)evt.value.p;\n    return 0;\n  }\n  return -1;\n}\n\n#ifdef BES_AUTOMATE_TEST\n#define APP_IBRT_PERIPHERAL_BUF_SIZE 2048\nstatic heap_handle_t app_ibrt_peripheral_heap;\nuint8_t app_ibrt_peripheral_buf[APP_IBRT_PERIPHERAL_BUF_SIZE];\nbool app_ibrt_auto_test_started = false;\nvoid app_ibrt_peripheral_heap_init(void) {\n  app_ibrt_auto_test_started = true;\n  app_ibrt_peripheral_heap =\n      heap_register(app_ibrt_peripheral_buf, APP_IBRT_PERIPHERAL_BUF_SIZE);\n}\n\nvoid *app_ibrt_peripheral_heap_malloc(uint32_t size) {\n  void *ptr = heap_malloc(app_ibrt_peripheral_heap, size);\n  ASSERT(ptr, \"%s size:%d\", __func__, size);\n  return ptr;\n}\n\nvoid *app_ibrt_peripheral_heap_cmalloc(uint32_t size) {\n  void *ptr = heap_malloc(app_ibrt_peripheral_heap, size);\n  ASSERT(ptr, \"%s size:%d\", __func__, size);\n  memset(ptr, 0, size);\n  return ptr;\n}\n\nvoid *app_ibrt_peripheral_heap_realloc(void *rmem, uint32_t newsize) {\n  void *ptr = heap_realloc(app_ibrt_peripheral_heap, rmem, newsize);\n  ASSERT(ptr, \"%s rmem:%p size:%d\", __func__, rmem, newsize);\n  return ptr;\n}\n\nvoid app_ibrt_peripheral_heap_free(void *rmem) {\n  ASSERT(rmem, \"%s rmem:%p\", __func__, rmem);\n  heap_free(app_ibrt_peripheral_heap, rmem);\n}\n#endif\n\nvoid app_ibrt_peripheral_auto_test_stop(void) {\n#ifdef BES_AUTOMATE_TEST\n  app_ibrt_auto_test_started = false;\n#endif\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_peripheral_thread\n Description  : peripheral manager thread\n Input        : void const *argument\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/18\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\ntypedef void (*app_ibrt_peripheral_cb0)(void);\ntypedef void (*app_ibrt_peripheral_cb1)(void *);\ntypedef void (*app_ibrt_peripheral_cb2)(void *, void *);\nvoid app_ibrt_peripheral_automate_test_handler(uint8_t *cmd_buf,\n                                               uint32_t cmd_len);\n\nvoid app_ibrt_peripheral_thread(void const *argument) {\n  while (1) {\n    TWS_PD_MSG_BLOCK *msg_p = NULL;\n    if ((!app_ibrt_peripheral_mailbox_get(&msg_p)) && (!argument)) {\n      switch (msg_p->msg_body.message_id) {\n      case 0:\n        if (msg_p->msg_body.message_ptr) {\n          ((app_ibrt_peripheral_cb0)(msg_p->msg_body.message_ptr))();\n        }\n        break;\n      case 1:\n        if (msg_p->msg_body.message_ptr) {\n          ((app_ibrt_peripheral_cb1)(msg_p->msg_body.message_ptr))(\n              (void *)msg_p->msg_body.message_Param0);\n        }\n        break;\n      case 2:\n        if (msg_p->msg_body.message_ptr) {\n          ((app_ibrt_peripheral_cb2)(msg_p->msg_body.message_ptr))(\n              (void *)msg_p->msg_body.message_Param0,\n              (void *)msg_p->msg_body.message_Param1);\n        }\n        break;\n      case 0xfe:\n        app_ibrt_peripheral_automate_test_handler(\n            (uint8_t *)msg_p->msg_body.message_Param0,\n            (uint32_t)msg_p->msg_body.message_Param1);\n        break;\n      case 0xff: { // ibrt test\n        char ibrt_cmd[20] = {0};\n        memcpy(ibrt_cmd + 0, &msg_p->msg_body.message_Param0, 4);\n        memcpy(ibrt_cmd + 4, &msg_p->msg_body.message_Param1, 4);\n        memcpy(ibrt_cmd + 8, &msg_p->msg_body.message_Param2, 4);\n        TRACE(1, \"ibrt_ui_log: %s\\n\", ibrt_cmd);\n        app_ibrt_ui_test_cmd_handler((unsigned char *)ibrt_cmd,\n                                     strlen(ibrt_cmd) + 1);\n      } break;\n      default:\n        break;\n      }\n      app_ibrt_peripheral_mailbox_free(msg_p);\n    }\n  }\n}\n\nvoid app_ibrt_peripheral_automate_test_handler(uint8_t *cmd_buf,\n                                               uint32_t cmd_len) {\n#ifdef BES_AUTOMATE_TEST\n  AUTO_TEST_CMD_T *test_cmd = (AUTO_TEST_CMD_T *)cmd_buf;\n  static uint8_t last_group_code = 0xFF;\n  static uint8_t last_operation_code = 0xFF;\n\n  // TRACE(4, \"%s group 0x%x op 0x%x times %d len %d\", __func__,\n  // test_cmd->group_code, test_cmd->opera_code, test_cmd->test_times,\n  // test_cmd->param_len);\n  // TRACE(2, \"last group 0x%x last op 0x%x\", last_group_code,\n  // last_operation_code);\n  if (last_group_code != test_cmd->group_code ||\n      last_operation_code != test_cmd->opera_code) {\n    for (uint8_t i = 0; i < test_cmd->test_times; i++) {\n      last_group_code = test_cmd->group_code;\n      last_operation_code = test_cmd->opera_code;\n      app_ibrt_ui_automate_test_cmd_handler(\n          test_cmd->group_code, test_cmd->opera_code, test_cmd->param,\n          test_cmd->param_len);\n    }\n  }\n  app_ibrt_peripheral_heap_free(cmd_buf);\n#endif\n}\n\nextern \"C\" void app_ibrt_peripheral_automate_test(const char *ibrt_cmd,\n                                                  uint32_t cmd_len) {\n#ifdef BES_AUTOMATE_TEST\n  uint16_t crc16_rec = 0;\n  uint16_t crc16_result = 0;\n  uint8_t *cmd_buf = NULL;\n  uint32_t _cmd_data_len = 0;\n  uint32_t _cmd_data_min_len =\n      sizeof(AUTO_TEST_CMD_T) + AUTOMATE_TEST_CMD_CRC_RECORD_LEN;\n  TWS_PD_MSG_BLOCK msg;\n\n  if (ibrt_cmd && cmd_len >= _cmd_data_min_len &&\n      cmd_len <= (_cmd_data_min_len + AUTOMATE_TEST_CMD_PARAM_MAX_LEN)) {\n    _cmd_data_len = cmd_len - AUTOMATE_TEST_CMD_CRC_RECORD_LEN;\n    crc16_rec = *(uint16_t *)(&ibrt_cmd[_cmd_data_len]);\n    crc16_result =\n        _crc16(crc16_result, (const unsigned char *)ibrt_cmd, _cmd_data_len);\n    // DUMP8(\"0x%x \", ibrt_cmd, cmd_len);\n    // TRACE(4, \"%s crc16 rec 0x%x result 0x%x buf_len %d\", __func__, crc16_rec,\n    // crc16_result, cmd_len);\n    if (crc16_rec == crc16_result && app_ibrt_auto_test_started) {\n      app_ibrt_auto_test_inform_cmd_received(ibrt_cmd[0], ibrt_cmd[1]);\n      cmd_buf = (uint8_t *)app_ibrt_peripheral_heap_cmalloc(_cmd_data_len);\n      memcpy(cmd_buf, ibrt_cmd, _cmd_data_len);\n      msg.msg_body.message_id = 0xfe;\n      msg.msg_body.message_Param0 = (uint32_t)cmd_buf;\n      msg.msg_body.message_Param1 = _cmd_data_len;\n      app_ibrt_peripheral_mailbox_put(&msg);\n    }\n    return;\n  }\n\n  // ASSERT(0, \"%s ibrt_cmd %p cmd_len %d\", __func__, ibrt_cmd, cmd_len);\n#endif\n}\n\nextern \"C\" void app_ibrt_peripheral_perform_test(const char *ibrt_cmd) {\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 0xff;\n  memcpy(&msg.msg_body.message_Param0, ibrt_cmd + 0, 4);\n  memcpy(&msg.msg_body.message_Param1, ibrt_cmd + 4, 4);\n  memcpy(&msg.msg_body.message_Param2, ibrt_cmd + 8, 4);\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_peripheral_run0(uint32_t ptr) {\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 0;\n  msg.msg_body.message_ptr = ptr;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_peripheral_run1(uint32_t ptr, uint32_t param0) {\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 1;\n  msg.msg_body.message_ptr = ptr;\n  msg.msg_body.message_Param0 = param0;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_peripheral_run2(uint32_t ptr, uint32_t param0, uint32_t param1) {\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 2;\n  msg.msg_body.message_ptr = ptr;\n  msg.msg_body.message_Param0 = param0;\n  msg.msg_body.message_Param1 = param1;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_peripheral_thread_init(void) {\n  if (app_ibrt_peripheral_mailbox_init())\n    return;\n\n  app_ibrt_peripheral_tid =\n      osThreadCreate(osThread(app_ibrt_peripheral_thread), NULL);\n  if (app_ibrt_peripheral_tid == NULL) {\n    TRACE(0, \"Failed to Create app_ibrt_peripheral_thread\\n\");\n    return;\n  }\n\n#ifdef BES_AUTOMATE_TEST\n  app_ibrt_peripheral_heap_init();\n#endif\n  return;\n}\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_rssi.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n//#include \"mbed.h\"\n#if defined(IBRT)\n#include \n#include \n\n#include \"a2dp_decoder.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_rssi.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"hal_trace.h\"\n\n#define RSSI_WINDOW_SIZE 30\n\nstatic tota_stutter_t g_stutter = {\n    0,\n};\nextern float a2dp_audio_get_sample_reference(void);\nextern int8_t a2dp_audio_get_current_buf_size(void);\nextern diff_us_t *app_tws_ibrt_audio_sync_get_diff_us(void);\n\nstruct rssi_window_struct {\n  int8_t buf[RSSI_WINDOW_SIZE];\n  uint8_t index;\n};\n\nextern osTimerId ibrt_ui_check_roleswitch_timer_id;\nstatic struct rssi_window_struct tws_rssi_window = {0};\nstatic struct rssi_window_struct mobile_rssi_window = {0};\nstatic bool need_roleswitch_with_rssi_bak = false;\n\nstatic void rssi_window_push(struct rssi_window_struct *p, int8_t data) {\n  if (p == NULL) {\n    return;\n  }\n\n  if (p->index < RSSI_WINDOW_SIZE) {\n    for (uint8_t i = p->index; i > 0; i--) {\n      p->buf[i] = p->buf[i - 1];\n    }\n    p->buf[0] = data;\n    p->index++;\n  } else {\n    for (uint8_t i = p->index - 1; i > 0; i--) {\n      p->buf[i] = p->buf[i - 1];\n    }\n    p->buf[0] = data;\n  }\n}\n\nvoid app_ibrt_ui_rssi_reset(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  memset(&tws_rssi_window, 0, sizeof(rssi_window_struct));\n  memset(&mobile_rssi_window, 0, sizeof(rssi_window_struct));\n  need_roleswitch_with_rssi_bak = false;\n  p_ibrt_ctrl->raw_rssi.agc_idx0 = 0;\n  p_ibrt_ctrl->raw_rssi.rssi0 = 0;\n  p_ibrt_ctrl->raw_rssi.rssi0_max = 0x7f;\n  p_ibrt_ctrl->raw_rssi.rssi0_min = 0x80;\n  p_ibrt_ctrl->raw_rssi.agc_idx1 = 0;\n  p_ibrt_ctrl->raw_rssi.rssi1 = 0;\n  p_ibrt_ctrl->raw_rssi.rssi1_max = 0x7f;\n  p_ibrt_ctrl->raw_rssi.rssi1_min = 0x80;\n  p_ibrt_ctrl->raw_rssi.rssi2 = 0;\n  p_ibrt_ctrl->raw_rssi.rssi2_max = 0x7f;\n  p_ibrt_ctrl->raw_rssi.rssi2_min = 0x80;\n  p_ibrt_ctrl->raw_rssi.ser = 0;\n  p_ibrt_ctrl->raw_rssi.rx_data_sum = 0;\n\n  p_ibrt_ctrl->peer_raw_rssi.agc_idx0 = 0;\n  p_ibrt_ctrl->peer_raw_rssi.rssi0 = 0;\n  p_ibrt_ctrl->peer_raw_rssi.rssi0_max = 0x7f;\n  p_ibrt_ctrl->peer_raw_rssi.rssi0_min = 0x80;\n  p_ibrt_ctrl->peer_raw_rssi.agc_idx1 = 0;\n  p_ibrt_ctrl->peer_raw_rssi.rssi1 = 0;\n  p_ibrt_ctrl->peer_raw_rssi.rssi1_max = 0x7f;\n  p_ibrt_ctrl->peer_raw_rssi.rssi1_min = 0x80;\n  p_ibrt_ctrl->peer_raw_rssi.rssi2 = 0;\n  p_ibrt_ctrl->peer_raw_rssi.rssi2_max = 0x7f;\n  p_ibrt_ctrl->peer_raw_rssi.rssi2_min = 0x80;\n  p_ibrt_ctrl->peer_raw_rssi.ser = 0;\n  p_ibrt_ctrl->peer_raw_rssi.rx_data_sum = 0;\n  p_ibrt_ctrl->role_switch_debonce_time = 0;\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_check_roleswitch_timer_cb\n Description  : close bt scan when timeout\n Input        : current_evt\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/17\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_rssi_process(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (app_tws_ibrt_tws_link_connected()) {\n    rx_agc_t tws_agc = {0};\n    bt_drv_reg_op_read_rssi_in_dbm(p_ibrt_ctrl->tws_conhandle, &tws_agc);\n    rssi_window_push(&tws_rssi_window, tws_agc.rssi);\n    if (tws_rssi_window.index >= RSSI_WINDOW_SIZE) {\n      int32_t tws_rssi_sum = 0;\n      for (uint8_t i = 0; i < RSSI_WINDOW_SIZE; i++) {\n        tws_rssi_sum += tws_rssi_window.buf[i];\n      }\n\n      p_ibrt_ctrl->raw_rssi.rssi1 = tws_rssi_sum / RSSI_WINDOW_SIZE;\n      p_ibrt_ctrl->raw_rssi.agc_idx1 = tws_agc.rxgain;\n\n      if (p_ibrt_ctrl->raw_rssi.rssi1 >= p_ibrt_ctrl->raw_rssi.rssi1_max)\n        p_ibrt_ctrl->raw_rssi.rssi1_max = p_ibrt_ctrl->raw_rssi.rssi1;\n      if (p_ibrt_ctrl->raw_rssi.rssi1 <= p_ibrt_ctrl->raw_rssi.rssi1_min)\n        p_ibrt_ctrl->raw_rssi.rssi1_min = p_ibrt_ctrl->raw_rssi.rssi1;\n    } else {\n      p_ibrt_ctrl->raw_rssi.rssi1 = 0;\n      p_ibrt_ctrl->raw_rssi.rssi1_max = 0x80;\n      p_ibrt_ctrl->raw_rssi.rssi1_min = 0x7f;\n      p_ibrt_ctrl->raw_rssi.agc_idx1 = 0;\n    }\n  }\n\n  bool mobile_link_flag = app_tws_ibrt_mobile_link_connected();\n  bool slave_ibrt_link_flag = app_tws_ibrt_slave_ibrt_link_connected();\n\n  if (mobile_link_flag || slave_ibrt_link_flag) {\n    rx_agc_t mobile_agc = {0};\n    if (mobile_link_flag) {\n      bt_drv_reg_op_read_rssi_in_dbm(p_ibrt_ctrl->mobile_conhandle,\n                                     &mobile_agc);\n    } else if (slave_ibrt_link_flag) {\n      bt_drv_reg_op_read_rssi_in_dbm(p_ibrt_ctrl->ibrt_conhandle, &mobile_agc);\n    }\n    rssi_window_push(&mobile_rssi_window, mobile_agc.rssi);\n    if (mobile_rssi_window.index >= RSSI_WINDOW_SIZE) {\n      int32_t mobile_rssi_sum = 0;\n      for (uint8_t i = 0; i < RSSI_WINDOW_SIZE; i++) {\n        mobile_rssi_sum += mobile_rssi_window.buf[i];\n      }\n\n      p_ibrt_ctrl->raw_rssi.rssi0 = mobile_rssi_sum / RSSI_WINDOW_SIZE;\n      p_ibrt_ctrl->raw_rssi.agc_idx0 = mobile_agc.rxgain;\n\n      if (p_ibrt_ctrl->raw_rssi.rssi0 >= p_ibrt_ctrl->raw_rssi.rssi0_max)\n        p_ibrt_ctrl->raw_rssi.rssi0_max = p_ibrt_ctrl->raw_rssi.rssi0;\n      if (p_ibrt_ctrl->raw_rssi.rssi0 <= p_ibrt_ctrl->raw_rssi.rssi0_min)\n        p_ibrt_ctrl->raw_rssi.rssi0_min = p_ibrt_ctrl->raw_rssi.rssi0;\n    } else {\n      p_ibrt_ctrl->raw_rssi.rssi0 = 0;\n      p_ibrt_ctrl->raw_rssi.rssi0_max = 0x80;\n      p_ibrt_ctrl->raw_rssi.rssi0_min = 0x7f;\n      p_ibrt_ctrl->raw_rssi.agc_idx0 = 0;\n    }\n  }\n  // TRACE(5,\"mobile -> %d:%d tws -> %d:%d SER:%d/100\",\n  // p_ibrt_ctrl->raw_rssi.rssi0, p_ibrt_ctrl->raw_rssi.agc_idx0,\n  // p_ibrt_ctrl->raw_rssi.rssi1,\n  // p_ibrt_ctrl->raw_rssi.agc_idx1,p_ibrt_ctrl->raw_rssi.ser);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_tws_switch_according_rssi_needed\n Description  :\n Input        : void\n Output       : bool\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/6/5\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nbool app_ibrt_ui_tws_switch_according_rssi_needed(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  if ((p_ibrt_ctrl->raw_rssi.rssi0 != IBRT_UI_INVALID_RSSI) &&\n      (p_ibrt_ctrl->peer_raw_rssi.rssi0 != IBRT_UI_INVALID_RSSI) &&\n      (p_ibrt_ctrl->peer_raw_rssi.rssi0 >= IBRT_UI_MIN_RSSI) &&\n      (p_ibrt_ctrl->raw_rssi.rssi0 >= IBRT_UI_MIN_RSSI)) {\n    int8_t rssi_d_value_diff =\n        p_ibrt_ctrl->peer_raw_rssi.rssi0 - p_ibrt_ctrl->raw_rssi.rssi0;\n\n    if (rssi_d_value_diff >= p_ibrt_ui->config.rssi_threshold) {\n      // local RSSI is stronger than peer and local role is SLAVE\n      return true;\n    }\n  }\n  return false;\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_check_roleswitch_timer_cb\n Description  : close bt scan when timeout\n Input        : current_evt\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/17\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_check_roleswitch_timer_cb(void const *current_evt) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  // app_ibrt_ui_rssi_process();\n\n  if (app_tws_ibrt_mobile_link_connected() &&\n      app_ibrt_ui_is_profile_exchanged() &&\n      (p_ibrt_ctrl->tws_mode == BTIF_BLM_ACTIVE_MODE)) {\n    tws_ctrl_send_cmd(APP_TWS_CMD_GET_PEER_MOBILE_RSSI, NULL, 0);\n  }\n\n  osTimerStart(ibrt_ui_check_roleswitch_timer_id,\n               p_ibrt_ui->config.rssi_monitor_timeout);\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_get_peer_mobile_rssi\n Description  :\n Input        : uint8_t *p_buff\n                uint16_t length\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/6/4\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_get_peer_mobile_rssi(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_GET_PEER_MOBILE_RSSI, p_buff,\n                                length);\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_get_peer_mobile_rssi_handler\n Description  :\n Input        : uint8_t *p_buff\n                uint16_t length\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/6/4\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_get_peer_mobile_rssi_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                           uint16_t length) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  diff_us_t *p_diff_us = app_tws_ibrt_audio_sync_get_diff_us();\n\n  if (app_tws_ibrt_slave_ibrt_link_connected() &&\n      app_ibrt_ui_is_profile_exchanged() &&\n      (p_ibrt_ctrl->tws_mode == BTIF_BLM_ACTIVE_MODE)) {\n    app_ui_rssi_battery_info_t rssi_battery_buffer;\n    rssi_battery_buffer.battery_volt = p_ibrt_ctrl->local_battery_volt;\n    rssi_battery_buffer.raw_rssi = p_ibrt_ctrl->raw_rssi;\n    rssi_battery_buffer.mobile_conhandle = p_ibrt_ctrl->ibrt_conhandle;\n    rssi_battery_buffer.tws_conhandle = p_ibrt_ctrl->tws_conhandle;\n    rssi_battery_buffer.mobile_diff_us = p_diff_us->mobile_diff_us;\n    rssi_battery_buffer.tws_diff_us = p_diff_us->tws_diff_us;\n    rssi_battery_buffer.cur_buf_size = a2dp_audio_get_current_buf_size();\n\n    tws_ctrl_send_rsp(APP_TWS_CMD_GET_PEER_MOBILE_RSSI, rsp_seq,\n                      (uint8_t *)&rssi_battery_buffer,\n                      sizeof(app_ui_rssi_battery_info_t));\n  }\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_get_peer_mobile_rssi_rsp_handler\n Description  :\n Input        : uint8_t *p_buff\n                uint16_t length\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/6/4\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nstatic void app_ibrt_print_rssi_info(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  TRACE(0, \"RSSI local mobile : local tws <> peer mobile : peer tws\");\n  TRACE(19,\n        \"RSSI %d %d %d %d : %d %d %d %d %d/100 <> %d %d %d %d : %d %d %d %d \"\n        \"%d/100 %d\",\n        p_ibrt_ctrl->raw_rssi.agc_idx0, p_ibrt_ctrl->raw_rssi.rssi0,\n        p_ibrt_ctrl->raw_rssi.rssi0_max, p_ibrt_ctrl->raw_rssi.rssi0_min,\n        p_ibrt_ctrl->raw_rssi.agc_idx1, p_ibrt_ctrl->raw_rssi.rssi1,\n        p_ibrt_ctrl->raw_rssi.rssi1_max, p_ibrt_ctrl->raw_rssi.rssi1_min,\n        p_ibrt_ctrl->raw_rssi.ser, p_ibrt_ctrl->peer_raw_rssi.agc_idx0,\n        p_ibrt_ctrl->peer_raw_rssi.rssi0, p_ibrt_ctrl->peer_raw_rssi.rssi0_max,\n        p_ibrt_ctrl->peer_raw_rssi.rssi0_min,\n        p_ibrt_ctrl->peer_raw_rssi.agc_idx1, p_ibrt_ctrl->peer_raw_rssi.rssi1,\n        p_ibrt_ctrl->peer_raw_rssi.rssi1_max,\n        p_ibrt_ctrl->peer_raw_rssi.rssi1_min, p_ibrt_ctrl->peer_raw_rssi.ser,\n        p_ibrt_ctrl->current_role);\n}\n\nvoid app_ibrt_get_peer_mobile_rssi_rsp_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (app_tws_ibrt_mobile_link_connected() &&\n      app_ibrt_ui_is_profile_exchanged() &&\n      (p_ibrt_ctrl->tws_mode == BTIF_BLM_ACTIVE_MODE)) {\n    if (p_ibrt_ctrl->role_switch_debonce_time == 0) {\n      app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n      app_ui_rssi_battery_info_t rssi_battery_info =\n          *(app_ui_rssi_battery_info_t *)p_buff;\n      p_ibrt_ctrl->peer_mobile_conhandle = rssi_battery_info.mobile_conhandle;\n      p_ibrt_ctrl->peer_tws_conhandle = rssi_battery_info.tws_conhandle;\n      p_ibrt_ctrl->peer_battery_volt = rssi_battery_info.battery_volt;\n      p_ibrt_ctrl->peer_raw_rssi = rssi_battery_info.raw_rssi;\n      p_ibrt_ctrl->mobile_diff_us = rssi_battery_info.mobile_diff_us;\n      p_ibrt_ctrl->tws_diff_us = rssi_battery_info.tws_diff_us;\n      p_ibrt_ctrl->cur_buf_size = rssi_battery_info.cur_buf_size;\n\n      app_ibrt_print_rssi_info();\n\n      if (p_ibrt_ui->config.tws_switch_according_to_rssi_value) {\n        bool need_roleswitch_with_rssi =\n            app_ibrt_ui_tws_switch_according_rssi_needed();\n\n        if (need_roleswitch_with_rssi != need_roleswitch_with_rssi_bak) {\n          if (need_roleswitch_with_rssi) {\n            TRACE(2,\n                  \"ibrt_ui_log:one headset far away cause tws switch used rssi \"\n                  \"%d %d\",\n                  p_ibrt_ctrl->raw_rssi.rssi0,\n                  p_ibrt_ctrl->peer_raw_rssi.rssi0);\n            app_ibrt_ui_tws_switch();\n            p_ibrt_ctrl->role_switch_debonce_time =\n                p_ibrt_ui->config.role_switch_timer_threshold;\n          }\n          need_roleswitch_with_rssi_bak = need_roleswitch_with_rssi;\n        }\n      }\n    } else {\n      p_ibrt_ctrl->role_switch_debonce_time--;\n    }\n  }\n}\n\nvoid app_ibrt_rssi_get_stutter(uint8_t *data, uint32_t *data_len) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  uint8_t temp;\n\n  data[0] = p_ibrt_ctrl->raw_rssi.agc_idx0;\n  data[1] = p_ibrt_ctrl->raw_rssi.rssi0;\n  data[2] = p_ibrt_ctrl->raw_rssi.rssi0_max;\n  data[3] = p_ibrt_ctrl->raw_rssi.rssi0_min;\n\n  data[4] = p_ibrt_ctrl->raw_rssi.agc_idx1;\n  data[5] = p_ibrt_ctrl->raw_rssi.rssi1;\n  data[6] = p_ibrt_ctrl->raw_rssi.rssi1_max;\n  data[7] = p_ibrt_ctrl->raw_rssi.rssi1_min;\n  data[8] = p_ibrt_ctrl->raw_rssi.ser;\n\n  data[9] = p_ibrt_ctrl->peer_raw_rssi.agc_idx0;\n  data[10] = p_ibrt_ctrl->peer_raw_rssi.rssi0;\n  data[11] = p_ibrt_ctrl->peer_raw_rssi.rssi0_max;\n  data[12] = p_ibrt_ctrl->peer_raw_rssi.rssi0_min;\n\n  data[13] = p_ibrt_ctrl->peer_raw_rssi.agc_idx1;\n  data[14] = p_ibrt_ctrl->peer_raw_rssi.rssi1;\n  data[15] = p_ibrt_ctrl->peer_raw_rssi.rssi1_max;\n  data[16] = p_ibrt_ctrl->peer_raw_rssi.rssi1_min;\n  data[17] = p_ibrt_ctrl->peer_raw_rssi.ser;\n\n  g_stutter.sample_ref = a2dp_audio_get_sample_reference();\n  g_stutter.cur_buf_size_l = a2dp_audio_get_current_buf_size();\n\n  TRACE(2, \"diff us: mobile:%d,tws:%d.\", p_ibrt_ctrl->mobile_diff_us,\n        p_ibrt_ctrl->tws_diff_us);\n\n  TRACE(\n      19,\n      \"%d %d %d %d : %d %d %d %d %d/100 <> %d %d %d %d : %d %d %d %d %d/100 %d\",\n      p_ibrt_ctrl->raw_rssi.agc_idx0, p_ibrt_ctrl->raw_rssi.rssi0,\n      p_ibrt_ctrl->raw_rssi.rssi0_max, p_ibrt_ctrl->raw_rssi.rssi0_min,\n      p_ibrt_ctrl->raw_rssi.agc_idx1, p_ibrt_ctrl->raw_rssi.rssi1,\n      p_ibrt_ctrl->raw_rssi.rssi1_max, p_ibrt_ctrl->raw_rssi.rssi1_min,\n      p_ibrt_ctrl->raw_rssi.ser, p_ibrt_ctrl->peer_raw_rssi.agc_idx0,\n      p_ibrt_ctrl->peer_raw_rssi.rssi0, p_ibrt_ctrl->peer_raw_rssi.rssi0_max,\n      p_ibrt_ctrl->peer_raw_rssi.rssi0_min, p_ibrt_ctrl->peer_raw_rssi.agc_idx1,\n      p_ibrt_ctrl->peer_raw_rssi.rssi1, p_ibrt_ctrl->peer_raw_rssi.rssi1_max,\n      p_ibrt_ctrl->peer_raw_rssi.rssi1_min, p_ibrt_ctrl->peer_raw_rssi.ser,\n      p_ibrt_ctrl->current_role);\n\n  if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n    for (int i = 0; i < 9; i++) {\n      temp = data[i + 9];\n      data[i + 9] = data[i];\n      data[i] = temp;\n    }\n  }\n  data[18] = p_ibrt_ctrl->current_role;\n\n  data[19] = bt_drv_reg_op_fa_gain_direct_get();\n  data[20] = g_stutter.cur_buf_size_l;  // L buffer size\n  data[21] = p_ibrt_ctrl->cur_buf_size; // R buffer size\n  // sample_reference\n  data[22] = *((int8_t *)&g_stutter.sample_ref);\n  data[23] = *((int8_t *)&g_stutter.sample_ref + 1);\n  data[24] = *((int8_t *)&g_stutter.sample_ref + 2);\n  data[25] = *((int8_t *)&g_stutter.sample_ref + 3);\n  // mobile diff / us\n  data[26] = *((int8_t *)&p_ibrt_ctrl->mobile_diff_us);\n  data[27] = *((int8_t *)&p_ibrt_ctrl->mobile_diff_us + 1);\n  data[28] = *((int8_t *)&p_ibrt_ctrl->mobile_diff_us + 2);\n  data[29] = *((int8_t *)&p_ibrt_ctrl->mobile_diff_us + 3);\n  // tws diff / us\n  data[30] = *((int8_t *)&p_ibrt_ctrl->tws_diff_us);\n  data[31] = *((int8_t *)&p_ibrt_ctrl->tws_diff_us + 1);\n  data[32] = *((int8_t *)&p_ibrt_ctrl->tws_diff_us + 2);\n  data[33] = *((int8_t *)&p_ibrt_ctrl->tws_diff_us + 3);\n\n  // L error_sum\n  data[34] = *((int8_t *)&p_ibrt_ctrl->raw_rssi.ser);\n  data[35] = *((int8_t *)&p_ibrt_ctrl->raw_rssi.ser + 1);\n  // L Total_sum\n  data[36] = *((int8_t *)&p_ibrt_ctrl->raw_rssi.rx_data_sum);\n  data[37] = *((int8_t *)&p_ibrt_ctrl->raw_rssi.rx_data_sum + 1);\n  // R error_sum\n  data[38] = *((int8_t *)&p_ibrt_ctrl->peer_raw_rssi.ser);\n  data[39] = *((int8_t *)&p_ibrt_ctrl->peer_raw_rssi.ser + 1);\n  // R Total_sum\n  data[40] = *((int8_t *)&p_ibrt_ctrl->peer_raw_rssi.rx_data_sum);\n  data[41] = *((int8_t *)&p_ibrt_ctrl->peer_raw_rssi.rx_data_sum + 1);\n\n  TRACE(1, \"0x%08x\", p_ibrt_ctrl->mobile_diff_us);\n  TRACE(1, \"0x%08x\", p_ibrt_ctrl->tws_diff_us);\n  TRACE(1, \"0x%08x\", p_ibrt_ctrl->raw_rssi.ser);\n  TRACE(1, \"0x%08x\", p_ibrt_ctrl->raw_rssi.rx_data_sum);\n  TRACE(1, \"0x%08x\", p_ibrt_ctrl->peer_raw_rssi.ser);\n  TRACE(1, \"0x%08x\", p_ibrt_ctrl->peer_raw_rssi.rx_data_sum);\n\n  TRACE(23,\n        \"%d %d %d %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x \"\n        \"%02x %02x %02x %02x %02x %02x %02x %02x\",\n        data[19], data[20], data[21], data[22], data[23], data[24], data[25],\n        data[26], data[27], data[28], data[29], data[30], data[31], data[32],\n        data[33], data[34], data[35], data[36], data[37], data[38], data[39],\n        data[40], data[41]);\n  *data_len = 42;\n}\n\nvoid app_ibrt_debug_parse(uint8_t *data, uint32_t data_len) {\n  bool do_it = false;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  uint8_t *parse_p = data;\n\n  TRACE(2, \"%s len:%d\", __func__, data_len);\n  DUMP8(\"%02x \", data, data_len);\n\n  if (p_ibrt_ctrl->audio_chnl_sel == A2DP_AUDIO_CHANNEL_SELECT_LCHNL) {\n    if (*parse_p & 0x01) {\n      do_it = true;\n    }\n  }\n  if (p_ibrt_ctrl->audio_chnl_sel == A2DP_AUDIO_CHANNEL_SELECT_RCHNL) {\n    if (*parse_p & 0x02) {\n      do_it = true;\n    }\n  }\n  parse_p++;\n  if (do_it) {\n    uint8_t funcCode = *parse_p;\n    parse_p++;\n    switch (funcCode) {\n    case 1:\n      if (app_tws_ibrt_mobile_link_connected()) {\n        bt_drv_reg_op_dgb_link_gain_ctrl_set(p_ibrt_ctrl->mobile_conhandle, 0,\n                                             *parse_p,\n                                             *parse_p == 0xff ? 0 : 1);\n      } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n        bt_drv_reg_op_dgb_link_gain_ctrl_set(\n            p_ibrt_ctrl->ibrt_conhandle, 0, *parse_p, *parse_p == 0xff ? 0 : 1);\n      }\n      break;\n    case 2:\n      bt_drv_reg_op_dgb_link_gain_ctrl_set(p_ibrt_ctrl->tws_conhandle, 0,\n                                           *parse_p, *parse_p == 0xff ? 0 : 1);\n      break;\n    case 3:\n      bt_drv_reg_op_fa_gain_direct_set(*parse_p);\n      break;\n    case 4: {\n      uint32_t data_format = 0;\n      data_format = be_to_host32(parse_p);\n      TRACE(1, \"lowlayer_monitor len:%d\", data_format);\n      if (app_tws_ibrt_mobile_link_connected()) {\n        btif_me_set_link_lowlayer_monitor(\n            btif_me_get_remote_device_by_handle(p_ibrt_ctrl->mobile_conhandle),\n            FLAG_START_DATA, REP_FORMAT_PACKET, data_format, 0);\n      } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n        btif_me_set_link_lowlayer_monitor(\n            btif_me_get_remote_device_by_handle(p_ibrt_ctrl->ibrt_conhandle),\n            FLAG_START_DATA, REP_FORMAT_PACKET, data_format, 0);\n      }\n    } break;\n    default:\n      TRACE(1, \"wrong cmd 0x%x\", funcCode);\n      break;\n    }\n  }\n}\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_search_pair_ui.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"a2dp_decoder.h\"\n#include \"app_battery.h\"\n#include \"app_bt.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_peripheral_manager.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_status_ind.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"app_vendor_cmd_evt.h\"\n#include \"besbt.h\"\n#include \"bluetooth.h\"\n#include \"btapp.h\"\n#include \"cmsis_os.h\"\n#include \"factory_section.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_env.h\"\n#include \"stdlib.h\"\n#include \n\nextern \"C\" {}\n#ifdef IBRT_SEARCH_UI\nstatic void app_tws_inquiry_timeout_handler(void const *param);\nosTimerDef(APP_TWS_INQ, app_tws_inquiry_timeout_handler);\nstatic osTimerId app_tws_timer = NULL;\n\nstatic void app_tws_delay_connect_handler(void const *param);\nosTimerDef(APP_TWS_DELAY_CONNECT, app_tws_delay_connect_handler);\nstatic osTimerId app_tws_delay_connect_timer = NULL;\n\nstatic uint8_t tws_find_process = 0;\nstatic uint8_t tws_inquiry_count = 0;\n#define MAX_TWS_INQUIRY_TIMES 3\n#define IBRT_MAX_SEARCH_TIME 10 /* 12.8s */\n\nuint8_t tws_inq_addr_used;\ntypedef struct {\n  uint8_t used;\n  bt_bdaddr_t bdaddr;\n} TWS_INQ_ADDR_STRUCT;\nTWS_INQ_ADDR_STRUCT tws_inq_addr[5];\n\n#define IBRT_SEARCH_DEBUG\n#ifdef IBRT_SEARCH_DEBUG\n#define TWSCON_DBLOG TRACE\n#else\n#define TWSCON_DBLOG(...)\n#endif\n\nuint8_t box_event = IBRT_NONE_EVENT;\nstatic void app_box_handle_timehandler(void const *param);\nosTimerDef(APP_BOX_HANDLE, app_box_handle_timehandler);\nstatic osTimerId app_box_handle_timer = NULL;\n\nstatic void app_box_handle_timehandler(void const *param) {\n  uint8_t *box_event_ptr = (uint8_t *)param;\n  uint8_t boxStatus = *box_event_ptr;\n  TRACE(1, \"box event:%d\", boxStatus);\n  app_ibrt_search_ui_init(true, boxStatus);\n  app_ibrt_if_event_entry(boxStatus);\n  if (IBRT_IN_BOX_CLOSED == boxStatus)\n    app_ibrt_search_ui_init(true, boxStatus);\n}\n\nstatic void app_tws_inquiry_timeout_handler(void const *param) {\n\n  TWSCON_DBLOG(0, \"app_tws_inquiry_timeout_handler\\n\");\n  btif_me_inquiry(BTIF_BT_IAC_LIAC, IBRT_MAX_SEARCH_TIME, 0);\n}\n\nstatic void app_tws_delay_connect_handler(void const *parma) {\n  TWSCON_DBLOG(1, \"%s\", __func__);\n  app_ibrt_if_enter_pairing_after_tws_connected();\n}\n\nbool app_tws_is_addr_in_tws_inq_array(const bt_bdaddr_t *addr) {\n  uint8_t i;\n  for (i = 0; i < sizeof(tws_inq_addr) / sizeof(tws_inq_addr[0]); i++) {\n    if (tws_inq_addr[i].used == 1) {\n      if (!memcmp(tws_inq_addr[i].bdaddr.address, addr->address,\n                  BTIF_BD_ADDR_SIZE))\n        return true;\n    }\n  }\n  return false;\n}\nvoid app_tws_clear_tws_inq_array(void) {\n  memset(&tws_inq_addr, 0, sizeof(tws_inq_addr));\n}\n\nint app_tws_fill_addr_to_array(const bt_bdaddr_t *addr) {\n  uint8_t i;\n  for (i = 0; i < sizeof(tws_inq_addr) / sizeof(tws_inq_addr[0]); i++) {\n    if (tws_inq_addr[i].used == 0) {\n      tws_inq_addr[i].used = 1;\n      memcpy(tws_inq_addr[i].bdaddr.address, addr->address, BTIF_BD_ADDR_SIZE);\n      return 0;\n    }\n  }\n\n  return -1;\n}\n\nuint8_t app_tws_get_tws_addr_inq_num(void) {\n  uint8_t i, count = 0;\n  for (i = 0; i < sizeof(tws_inq_addr) / sizeof(tws_inq_addr[0]); i++) {\n    if (tws_inq_addr[i].used == 1) {\n      count++;\n    }\n  }\n  return count;\n}\n/*****************************************************************************\n Prototype    : app_tws_ibrt_update_info\n Description  : config tws info\n Input        : ibrt_role_e twsRole\n                bt_bdaddr_t *twsAddr\n\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/26\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_tws_ibrt_update_info(ibrt_role_e ibrtRole, bt_bdaddr_t *ibrtPeerAddr) {\n  TRACE(1, \"%s\", __func__);\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (p_ibrt_ctrl->nv_role == IBRT_UNKNOW)\n    p_ibrt_ctrl->nv_role = ibrtRole;\n  if (NULL != ibrtPeerAddr) {\n    memcpy(p_ibrt_ctrl->peer_addr.address, ibrtPeerAddr->address, BD_ADDR_LEN);\n    nv_record_update_ibrt_info(p_ibrt_ctrl->nv_role, ibrtPeerAddr);\n  }\n}\n\nvoid tws_app_stop_find(void) {\n  tws_find_process = 0;\n  btif_me_unregister_globa_handler((btif_handler *)btif_me_get_bt_handler());\n}\n\nvoid app_bt_manager_ibrt_role_process(const btif_event_t *Event) {\n  switch (btif_me_get_callback_event_type(Event)) {\n  case BTIF_BTEVENT_LINK_CONNECT_IND:\n  case BTIF_BTEVENT_LINK_CONNECT_CNF:\n    if (BTIF_BEC_NO_ERROR == btif_me_get_callback_event_err_code(Event)) {\n      bt_bdaddr_t *p_remote_dev_addr = NULL;\n      ibrt_ctrl_t *p_ibrt_ctrl = NULL;\n      p_remote_dev_addr = btif_me_get_callback_event_rem_dev_bd_addr(Event);\n      p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n      if (p_ibrt_ctrl->nv_role == IBRT_UNKNOW)\n        factory_section_original_btaddr_get(p_ibrt_ctrl->local_addr.address);\n\n      TRACE(2, \"local:%x remd:%x\", p_ibrt_ctrl->local_addr.address[5],\n            p_remote_dev_addr->address[5]);\n      if ((p_ibrt_ctrl->local_addr.address[3] ==\n           p_remote_dev_addr->address[3]) &&\n          (p_ibrt_ctrl->local_addr.address[4] ==\n           p_remote_dev_addr->address[4]) &&\n          (p_ibrt_ctrl->local_addr.address[5] ==\n           p_remote_dev_addr->address[5])) {\n        app_tws_ibrt_update_info(IBRT_SLAVE, p_remote_dev_addr);\n        if (app_ibrt_ui_get_tws_use_same_addr_enable()) {\n          memcpy(p_ibrt_ctrl->local_addr.address, p_remote_dev_addr->address,\n                 6);\n        }\n        if (app_tws_is_left_side()) {\n          p_ibrt_ctrl->audio_chnl_sel = A2DP_AUDIO_CHANNEL_SELECT_LCHNL;\n        } else {\n          p_ibrt_ctrl->audio_chnl_sel = A2DP_AUDIO_CHANNEL_SELECT_RCHNL;\n        }\n\n        // #if 0\n        //                     p_ibrt_ctrl->audio_chnl_sel =\n        //                     A2DP_AUDIO_CHANNEL_SELECT_LRMERGE;\n        // #else\n        //                     if(IBRT_MASTER == p_ibrt_ctrl->nv_role)\n        //                     {\n        //                         TRACE(0,\"#right\");\n        //                         p_ibrt_ctrl->audio_chnl_sel =\n        //                         A2DP_AUDIO_CHANNEL_SELECT_RCHNL;\n        //                     }\n        //                     else if(IBRT_SLAVE == p_ibrt_ctrl->nv_role)\n        //                     {\n        //                         TRACE(0,\"#left\");\n        //                         p_ibrt_ctrl->audio_chnl_sel =\n        //                         A2DP_AUDIO_CHANNEL_SELECT_LCHNL;\n\n        //                     }\n        // #endif\n      }\n    }\n    break;\n  default:\n    break;\n  }\n}\n\nvoid app_ibrt_config_the_same_bd_addr(bt_bdaddr_t *ibrtSearchedAddr) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  app_tws_ibrt_set_access_mode(BTIF_BAM_NOT_ACCESSIBLE);\n\n  memcpy(p_ibrt_ctrl->local_addr.address, ibrtSearchedAddr->address,\n         BD_ADDR_LEN);\n  memcpy(p_ibrt_ctrl->peer_addr.address, ibrtSearchedAddr->address,\n         BD_ADDR_LEN);\n  btif_me_set_bt_address(ibrtSearchedAddr->address);\n\n#ifdef __GMA_VOICE__\n  btif_me_set_ble_bd_address(ibrtSearchedAddr->address);\n  bt_set_ble_local_address(ibrtSearchedAddr->address);\n  NV_EXTENSION_RECORD_T *pNvExtRec = nv_record_get_extension_entry_ptr();\n  memcpy(pNvExtRec->tws_info.ble_info.ble_addr, ibrtSearchedAddr->address,\n         BLE_IRK_SIZE);\n  nv_record_tws_exchange_ble_info();\n#endif\n  TRACE(1, \"%s\", __func__);\n  DUMP8(\"%02x \", p_ibrt_ctrl->local_addr.address, BD_ADDR_LEN);\n\n  // after change the bd_addr, we should reset access mode again\n  app_tws_ibrt_set_access_mode(BTIF_BAM_CONNECTABLE_ONLY);\n}\n\nvoid app_ibrt_reconfig_btAddr_from_nv() {\n  struct nvrecord_env_t *nvrecord_env;\n  if (nv_record_env_get(&nvrecord_env) != -1) {\n    if (nvrecord_env->ibrt_mode.mode != IBRT_UNKNOW) {\n      TRACE(0, \"reconfig addr from nv\");\n      DUMP8(\"%02x \", nvrecord_env->ibrt_mode.record.bdAddr.address, 6);\n      bt_set_local_address(nvrecord_env->ibrt_mode.record.bdAddr.address);\n\n      bt_set_ble_local_address(nvrecord_env->ibrt_mode.record.bdAddr.address);\n    }\n  }\n}\nvoid app_bt_inquiry_call_back(const btif_event_t *event) {\n  TWSCON_DBLOG(2, \"\\nenter: %s %d\\n\", __func__, __LINE__);\n  uint8_t device_name[64];\n  uint8_t device_name_len;\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  factory_section_original_btaddr_get(p_ibrt_ctrl->local_addr.address);\n\n  switch (btif_me_get_callback_event_type(event)) {\n  case BTIF_BTEVENT_NAME_RESULT:\n    TWSCON_DBLOG(2, \"\\n%s %d BTEVENT_NAME_RESULT\\n\", __func__, __LINE__);\n    break;\n  case BTIF_BTEVENT_INQUIRY_RESULT:\n    TWSCON_DBLOG(2, \"\\n%s %d BTEVENT_INQUIRY_RESULT\\n\", __func__, __LINE__);\n    DUMP8(\"%02x \", btif_me_get_callback_event_inq_result_bd_addr_addr(event),\n          6);\n    TWSCON_DBLOG(1, \"inqmode = %x\",\n                 btif_me_get_callback_event_inq_result_inq_mode(event));\n    DUMP8(\"%02x \", btif_me_get_callback_event_inq_result_ext_inq_resp(event),\n          20);\n    /// check the uap and nap if equal ,get the name for tws slave\n    TRACE(1, \"##RSSI:%d\", (int8_t)btif_me_get_callback_event_rssi(event));\n    TRACE(\n        6, \"local %02x %02x %02x %02x %02x %02x\\n\",\n        p_ibrt_ctrl->local_addr.address[0], p_ibrt_ctrl->local_addr.address[1],\n        p_ibrt_ctrl->local_addr.address[2], p_ibrt_ctrl->local_addr.address[3],\n        p_ibrt_ctrl->local_addr.address[4], p_ibrt_ctrl->local_addr.address[5]);\n    if ((btif_me_get_callback_event_inq_result_bd_addr(event)->address[5] ==\n         p_ibrt_ctrl->local_addr.address[5]) &&\n        (btif_me_get_callback_event_inq_result_bd_addr(event)->address[4] ==\n         p_ibrt_ctrl->local_addr.address[4]) &&\n        (btif_me_get_callback_event_inq_result_bd_addr(event)->address[3] ==\n         p_ibrt_ctrl->local_addr.address[3])) {\n      /// check the device is already checked\n      TWSCON_DBLOG(0, \"<1>\");\n      if (app_tws_is_addr_in_tws_inq_array(\n              btif_me_get_callback_event_inq_result_bd_addr(event))) {\n        break;\n      }\n      ////if rssi event is eir,so find name derictly\n      if (btif_me_get_callback_event_inq_result_inq_mode(event) ==\n          BTIF_INQ_MODE_EXTENDED) {\n\n        TWSCON_DBLOG(0, \"<2>\");\n        uint8_t *eir =\n            (uint8_t *)btif_me_get_callback_event_inq_result_ext_inq_resp(\n                event);\n        // device_name_len =\n        // ME_GetExtInqData(eir,0x09,device_name,sizeof(device_name));\n        device_name_len = btif_me_get_ext_inq_data(eir, 0x09, device_name,\n                                                   sizeof(device_name));\n        if (device_name_len > 0) {\n          TWSCON_DBLOG(3, \"<3> search name len %d %s local name %s\\n\",\n                       device_name_len, device_name, bt_get_local_name());\n          ////if name is the same as the local name so we think the device is\n          /// the tws slave\n          if (!memcmp(device_name, bt_get_local_name(), device_name_len)) {\n            TWSCON_DBLOG(0, \"<4>\");\n\n            // modify local addr\n            app_ibrt_config_the_same_bd_addr(\n                btif_me_get_callback_event_inq_result_bd_addr(event));\n            btif_me_cancel_inquiry();\n            osTimerStop(app_tws_timer);\n            tws_app_stop_find();\n            app_tws_ibrt_update_info(\n                IBRT_MASTER,\n                btif_me_get_callback_event_inq_result_bd_addr(event));\n            p_ibrt_ctrl->audio_chnl_sel = A2DP_AUDIO_CHANNEL_SELECT_LRMERGE;\n            if (NULL != app_tws_delay_connect_timer) {\n              osTimerStop(app_tws_delay_connect_timer);\n              osTimerStart(app_tws_delay_connect_timer, 500);\n            }\n\n          } else {\n            if (app_tws_get_tws_addr_inq_num() <\n                sizeof(tws_inq_addr) / sizeof(tws_inq_addr[0])) {\n              app_tws_fill_addr_to_array(\n                  btif_me_get_callback_event_inq_result_bd_addr(event));\n              if (app_tws_get_tws_addr_inq_num() ==\n                  sizeof(tws_inq_addr) / sizeof(tws_inq_addr[0])) {\n                /// fail to find a tws slave\n                btif_me_cancel_inquiry();\n                tws_app_stop_find();\n              }\n            } else {\n              /// fail to find a tws slave\n              btif_me_cancel_inquiry();\n              tws_app_stop_find();\n            }\n          }\n          break;\n        }\n        /////have no name so just wait for next device\n        //////we can do remote name req for tws slave if eir can't received\n        /// correctly\n      }\n    }\n    break;\n  case BTIF_BTEVENT_INQUIRY_COMPLETE:\n    TWSCON_DBLOG(2, \"\\n%s %d BTEVENT_INQUIRY_COMPLETE\\n\", __FUNCTION__,\n                 __LINE__);\n    if (tws_inquiry_count >= MAX_TWS_INQUIRY_TIMES) {\n      tws_app_stop_find();\n      return;\n    }\n    if (p_ibrt_ui->super_state == IBRT_UI_IDLE) {\n      ////inquiry complete if bt don't find any slave ,so do inquiry again\n\n      uint8_t rand_delay = rand() % 5;\n      tws_inquiry_count++;\n\n      if (rand_delay == 0) {\n        // btif_me_inquiry(BTIF_BT_IAC_GIAC, IBRT_MAX_SEARCH_TIME, 0);\n        btif_me_inquiry(BTIF_BT_IAC_LIAC, IBRT_MAX_SEARCH_TIME, 0);\n      } else {\n        osTimerStart(app_tws_timer, rand_delay * 1000);\n      }\n    }\n    break;\n  /** The Inquiry process is canceled. */\n  case BTIF_BTEVENT_INQUIRY_CANCELED:\n    TWSCON_DBLOG(2, \"\\n%s %d BTEVENT_INQUIRY_CANCELED\\n\", __FUNCTION__,\n                 __LINE__);\n    // tws.notify(&tws);\n    break;\n  case BTIF_BTEVENT_LINK_CONNECT_CNF:\n    TWSCON_DBLOG(3, \"\\n%s %d BTEVENT_LINK_CONNECT_CNF stats=%x\\n\", __FUNCTION__,\n                 __LINE__, btif_me_get_callback_event_err_code(event));\n\n    // connect fail start inquiry again\n    if (btif_me_get_callback_event_err_code(event) == 4 &&\n        tws_find_process == 1) {\n      if (tws_inquiry_count >= MAX_TWS_INQUIRY_TIMES) {\n        tws_app_stop_find();\n        return;\n      }\n      uint8_t rand_delay = rand() % 5;\n      tws_inquiry_count++;\n      if (rand_delay == 0) {\n        // btif_me_inquiry(BTIF_BT_IAC_GIAC, IBRT_MAX_SEARCH_TIME, 0);\n        btif_me_inquiry(BTIF_BT_IAC_LIAC, IBRT_MAX_SEARCH_TIME, 0);\n      } else {\n        osTimerStart(app_tws_timer, rand_delay * 1000);\n      }\n    }\n    /// connect succ,so stop the finding tws procedure\n    else if (btif_me_get_callback_event_err_code(event) == 0) {\n      tws_app_stop_find();\n    }\n    break;\n  case BTIF_BTEVENT_LINK_CONNECT_IND:\n    TWSCON_DBLOG(3, \"\\n%s %d BTEVENT_LINK_CONNECT_IND stats=%x\\n\", __FUNCTION__,\n                 __LINE__, btif_me_get_callback_event_err_code(event));\n    ////there is a incoming connect so cancel the inquiry and the timer and the\n    /// connect creating\n    btif_me_cancel_inquiry();\n    osTimerStop(app_tws_timer);\n    break;\n  default:\n    // TWS_DBLOG(\"\\n%s %d etype:%d\\n\",__FUNCTION__,__LINE__,event->eType);\n    break;\n  }\n\n  // TWS_DBLOG(\"\\nexit: %s %d\\n\",__FUNCTION__,__LINE__);\n}\n\nuint8_t is_find_tws_peer_device_onprocess(void) { return tws_find_process; }\n\nvoid find_tws_peer_device_start(void) {\n  TWSCON_DBLOG(2, \"\\nibrt_ui_log: %s %d\\n\", __func__, __LINE__);\n  bt_status_t status;\n  app_tws_clear_tws_inq_array();\n  if (tws_find_process == 0) {\n    tws_find_process = 1;\n    tws_inquiry_count = 0;\n    if (app_tws_timer == NULL)\n      app_tws_timer = osTimerCreate(osTimer(APP_TWS_INQ), osTimerOnce, NULL);\n    btif_me_set_handler(btif_me_get_bt_handler(), app_bt_inquiry_call_back);\n    btif_me_register_global_handler(btif_me_get_bt_handler());\n\n    btif_me_set_event_mask(\n        btif_me_get_bt_handler(),\n        BTIF_BEM_LINK_DISCONNECT | BTIF_BEM_ROLE_CHANGE |\n            BTIF_BEM_INQUIRY_RESULT | BTIF_BEM_INQUIRY_COMPLETE |\n            BTIF_BEM_INQUIRY_CANCELED | BTIF_BEM_LINK_CONNECT_CNF |\n            BTIF_BEM_LINK_CONNECT_IND);\n\n  again:\n    TWSCON_DBLOG(2, \"\\n%s %d\\n\", __func__, __LINE__);\n\n    status = btif_me_inquiry(BTIF_BT_IAC_LIAC, IBRT_MAX_SEARCH_TIME, 0);\n    TWSCON_DBLOG(2, \"\\n%s %d\\n\", __func__, __LINE__);\n    if (status != BT_STS_PENDING) {\n      osDelay(500);\n      goto again;\n    }\n    TWSCON_DBLOG(2, \"\\n%s %d\\n\", __func__, __LINE__);\n  }\n}\n\nvoid find_tws_peer_device_stop(void) {\n  btif_me_cancel_inquiry();\n  tws_app_stop_find();\n}\n\nvoid app_start_tws_serching_direactly() {\n  btif_accessible_mode_t mode;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  mode = p_ibrt_ctrl->access_mode;\n  TWSCON_DBLOG(1, \"ibrt_ui_log:search tws direactly access_mode:%d\", mode);\n  // if\n  // ((BTIF_DEFAULT_ACCESS_MODE_PAIR==mode)||(BTIF_BAM_LIMITED_ACCESSIBLE==mode))\n  if (BTIF_BAM_LIMITED_ACCESSIBLE == mode) {\n    if (NULL == app_tws_delay_connect_timer)\n      app_tws_delay_connect_timer =\n          osTimerCreate(osTimer(APP_TWS_DELAY_CONNECT), osTimerOnce, NULL);\n    if (is_find_tws_peer_device_onprocess()) {\n      find_tws_peer_device_stop();\n    } else {\n      p_ibrt_ctrl->nv_role = IBRT_UNKNOW;\n      find_tws_peer_device_start();\n\n      // app_status_indication_set(APP_STATUS_INDICATION_CONNECTING);\n    }\n  }\n}\n\nstatic void\napp_ibrt_battery_handle_process_normal(uint32_t status,\n                                       union APP_BATTERY_MSG_PRAMS prams) {\n  app_ibrt_ui_t *p_ui_ctrl = app_ibrt_ui_get_ctx();\n\n  switch (status) {\n  case APP_BATTERY_STATUS_CHARGING:\n\n    TWSCON_DBLOG(1, \"charger:%d\", prams.charger);\n    if (prams.charger == APP_BATTERY_CHARGER_PLUGIN) {\n      ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n      TWSCON_DBLOG(1, \"APP_BATTERY_CHARGER_PLUGIN nv_role %02x\",\n                   p_ibrt_ctrl->nv_role);\n      /*if (p_ibrt_ctrl->nv_role == IBRT_UNKNOW)\n      {\n          return;\n      }*/\n      if (p_ui_ctrl->config.check_plugin_excute_closedbox_event == true)\n        box_event = IBRT_CLOSE_BOX_EVENT;\n      else\n        box_event = IBRT_PUT_IN_EVENT;\n\n      if (app_box_handle_timer != NULL) {\n        osTimerStop(app_box_handle_timer);\n        osTimerStart(app_box_handle_timer, 500);\n      }\n\n    } else if (prams.charger == APP_BATTERY_CHARGER_PLUGOUT) {\n      ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n      TWSCON_DBLOG(1, \"APP_BATTERY_CHARGER_PLUGOUT nv_role %02x\",\n                   p_ibrt_ctrl->nv_role);\n      if (p_ibrt_ctrl->nv_role == IBRT_UNKNOW) {\n        return;\n      }\n      box_event = IBRT_FETCH_OUT_EVENT;\n\n      if (app_box_handle_timer != NULL) {\n        osTimerStop(app_box_handle_timer);\n        osTimerStart(app_box_handle_timer, 500);\n      }\n    }\n    break;\n  case APP_BATTERY_STATUS_INVALID:\n  default:\n    break;\n  }\n}\n\nvoid app_ibrt_battery_callback(APP_BATTERY_MV_T currvolt, uint8_t currlevel,\n                               enum APP_BATTERY_STATUS_T curstatus,\n                               uint32_t status,\n                               union APP_BATTERY_MSG_PRAMS prams) {\n  switch (curstatus) {\n  case APP_BATTERY_STATUS_NORMAL:\n  case APP_BATTERY_STATUS_CHARGING:\n    app_ibrt_battery_handle_process_normal(status, prams);\n    break;\n\n  default:\n    break;\n  }\n}\n\n#ifdef BOX_DET_USE_GPIO\n#define BOX_DET_PIN HAL_IOMUX_PIN_P1_0\n\nstatic void box_det_pin_irq_set(enum HAL_GPIO_IRQ_POLARITY_T polarity);\n\nstatic void box_det_pin_irq_update(void) {\n  if (hal_gpio_pin_get_val((enum HAL_GPIO_PIN_T)BOX_DET_PIN))\n    box_det_pin_irq_set(HAL_GPIO_IRQ_POLARITY_LOW_FALLING);\n  else\n    box_det_pin_irq_set(HAL_GPIO_IRQ_POLARITY_HIGH_RISING);\n}\n\nstatic void box_det_handler(uint32_t val) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  TRACE(2, \"%s: %d\", __func__, p_ibrt_ctrl->nv_role);\n  box_det_pin_irq_update();\n  if (val) {\n    box_event = IBRT_FETCH_OUT_EVENT;\n  } else {\n    box_event = IBRT_CLOSE_BOX_EVENT;\n  }\n\n  if (p_ibrt_ctrl->nv_role == IBRT_UNKNOW)\n    return;\n\n  if (app_box_handle_timer) {\n    osTimerStop(app_box_handle_timer);\n    osTimerStart(app_box_handle_timer, 500);\n  }\n}\n\nstatic void box_det_irq_handler(enum HAL_GPIO_PIN_T pin) {\n  uint8_t val = hal_gpio_pin_get_val(pin);\n  TRACE(3, \"%s: %d, %d\", __func__, pin, val);\n  app_ibrt_peripheral_run1((uint32_t)box_det_handler, (uint32_t)val);\n}\n\nstatic void box_det_pin_irq_set(enum HAL_GPIO_IRQ_POLARITY_T polarity) {\n  struct HAL_GPIO_IRQ_CFG_T box_det_pin_cfg;\n  box_det_pin_cfg.irq_debounce = true;\n  box_det_pin_cfg.irq_handler = box_det_irq_handler;\n  box_det_pin_cfg.irq_type = HAL_GPIO_IRQ_TYPE_EDGE_SENSITIVE;\n\n  box_det_pin_cfg.irq_enable = true;\n  box_det_pin_cfg.irq_polarity = polarity;\n  hal_gpio_setup_irq((enum HAL_GPIO_PIN_T)BOX_DET_PIN, &box_det_pin_cfg);\n}\n\nstatic void box_det_pin_init(void) {\n  const struct HAL_IOMUX_PIN_FUNCTION_MAP box_det_gpio_cfg = {\n      BOX_DET_PIN, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n      HAL_IOMUX_PIN_PULLUP_ENABLE};\n\n  hal_iomux_init((struct HAL_IOMUX_PIN_FUNCTION_MAP *)&box_det_gpio_cfg, 1);\n  hal_gpio_pin_set_dir((enum HAL_GPIO_PIN_T)box_det_gpio_cfg.pin,\n                       HAL_GPIO_DIR_IN, 1);\n\n  box_det_pin_irq_update();\n}\n#endif\n\nvoid app_ibrt_search_ui_init(bool boxOperation, ibrt_event_type evt_type) {\n  app_ibrt_ui_t *p_ui_ctrl = app_ibrt_ui_get_ctx();\n  if ((true == p_ui_ctrl->config.check_plugin_excute_closedbox_event) ||\n      (false == boxOperation))\n    p_ui_ctrl->box_state = IBRT_IN_BOX_OPEN;\n\n  if (false == boxOperation) {\n#ifdef BOX_DET_USE_GPIO\n    box_det_pin_init();\n#else\n    app_battery_register(app_ibrt_battery_callback);\n#endif\n\n    if (app_box_handle_timer == NULL)\n      app_box_handle_timer =\n          osTimerCreate(osTimer(APP_BOX_HANDLE), osTimerOnce, &box_event);\n  } else if (evt_type != IBRT_IN_BOX_CLOSED) {\n    app_ibrt_ui_judge_scan_type(IBRT_OPEN_BOX_TRIGGER, NO_LINK_TYPE,\n                                IBRT_UI_NO_ERROR);\n  }\n}\n\nvoid app_ibrt_remove_history_paired_device(void) {\n  bt_status_t retStatus;\n  btif_device_record_t record;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  int paired_dev_count = nv_record_get_paired_dev_count();\n\n  TWSCON_DBLOG(0, \"Remove all history tws nv records.\");\n  TWSCON_DBLOG(0, \"Master addr:\");\n  DUMP8(\"%02x \", p_ibrt_ctrl->local_addr.address, BTIF_BD_ADDR_SIZE);\n  TWSCON_DBLOG(0, \"Slave addr:\");\n  DUMP8(\"%02x \", p_ibrt_ctrl->peer_addr.address, BTIF_BD_ADDR_SIZE);\n\n  for (int32_t index = paired_dev_count - 1; index >= 0; index--) {\n    retStatus = nv_record_enum_dev_records(index, &record);\n    if (BT_STS_SUCCESS == retStatus) {\n      TWSCON_DBLOG(1, \"The index %d of nv records:\", index);\n      DUMP8(\"%02x \", record.bdAddr.address, BTIF_BD_ADDR_SIZE);\n      if (!memcmp(record.bdAddr.address, p_ibrt_ctrl->local_addr.address,\n                  BTIF_BD_ADDR_SIZE) ||\n          !memcmp(record.bdAddr.address, p_ibrt_ctrl->peer_addr.address,\n                  BTIF_BD_ADDR_SIZE)) {\n        nv_record_ddbrec_delete(&record.bdAddr);\n        TWSCON_DBLOG(1, \"Delete the nv record entry %d\", index);\n      }\n    }\n  }\n\n  memset(p_ibrt_ctrl->local_addr.address, 0, BTIF_BD_ADDR_SIZE);\n  memset(p_ibrt_ctrl->peer_addr.address, 0, BTIF_BD_ADDR_SIZE);\n}\n\nvoid app_bt_enter_mono_pairing_mode(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  p_ibrt_ui->box_state = IBRT_OUT_BOX;\n\n  TRACE(0, \"ibrt_ui_log:app_bt_enter_mono_pairing_mode\");\n\n  if (!app_device_bt_is_connected()) {\n    if (p_ibrt_ctrl->nv_role == IBRT_UNKNOW) {\n      app_ibrt_ui_judge_scan_type(IBRT_FREEMAN_PAIR_TRIGGER, NO_LINK_TYPE,\n                                  IBRT_UI_NO_ERROR);\n      app_ibrt_ui_set_freeman_enable();\n    } else {\n      // app_tws_ibrt_set_access_mode(BTIF_BAM_GENERAL_ACCESSIBLE);\n      app_ibrt_ui_set_enter_pairing_mode(IBRT_CONNECT_MOBILE_FAILED);\n      app_ibrt_ui_judge_scan_type(IBRT_CONNECTE_TRIGGER, MOBILE_LINK, 0);\n    }\n  }\n}\nvoid app_ibrt_enter_limited_mode(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n\n  p_ibrt_ctrl->nv_role = IBRT_UNKNOW;\n  p_ibrt_ui->box_state = IBRT_OUT_BOX;\n\n  app_ibrt_remove_history_paired_device();\n  TRACE(0, \"ibrt_ui_log:power on enter pairing\");\n  app_ibrt_ui_judge_scan_type(IBRT_SEARCH_SLAVE_TRIGGER, NO_LINK_TYPE,\n                              IBRT_UI_NO_ERROR);\n}\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_ui_test.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_ui_test.h\"\n#include \"a2dp_decoder.h\"\n#include \"app.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_anc.h\"\n#include \"app_battery.h\"\n#include \"app_ble_mode_switch.h\"\n#include \"app_bt.h\"\n#include \"app_ibrt_auto_test.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_keyboard.h\"\n#include \"app_ibrt_peripheral_manager.h\"\n#include \"app_ibrt_ui_test_cmd_if.h\"\n#include \"app_key.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"btapp.h\"\n#include \"factory_section.h\"\n#include \"norflash_api.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_env.h\"\n#include \"nvrecord_extension.h\"\n#include \n#if defined(BISTO_ENABLED)\n#include \"gsound_custom_actions.h\"\n#include \"gsound_custom_ble.h\"\n#include \"gsound_custom_bt.h\"\n#endif\n\n#ifdef __AI_VOICE__\n#include \"ai_spp.h\"\n#include \"ai_thread.h\"\n#include \"app_ai_ble.h\"\n#endif\n\n#ifdef IBRT_OTA\n#include \"ota_control.h\"\n#endif\n\nvoid app_voice_assistant_key(APP_KEY_STATUS *status, void *param);\nextern void app_bt_volumedown();\nextern void app_bt_volumeup();\n#ifdef IBRT_OTA\nextern uint8_t ota_role_switch_flag;\nextern uint8_t avoid_even_packets_protect_flag;\n#endif\n#if defined(IBRT)\n#include \"btapp.h\"\nextern struct BT_DEVICE_T app_bt_device;\n\nbt_bdaddr_t master_ble_addr = {0x76, 0x33, 0x33, 0x22, 0x11, 0x11};\nbt_bdaddr_t slave_ble_addr = {0x77, 0x33, 0x33, 0x22, 0x11, 0x11};\nbt_bdaddr_t box_ble_addr = {0x78, 0x33, 0x33, 0x22, 0x11, 0x11};\n\n#ifdef IBRT_SEARCH_UI\nvoid app_ibrt_battery_callback(APP_BATTERY_MV_T currvolt, uint8_t currlevel,\n                               enum APP_BATTERY_STATUS_T curstatus,\n                               uint32_t status,\n                               union APP_BATTERY_MSG_PRAMS prams);\nvoid app_ibrt_simulate_charger_plug_in_test(void) {\n  union APP_BATTERY_MSG_PRAMS msg_prams;\n  msg_prams.charger = APP_BATTERY_CHARGER_PLUGIN;\n  app_ibrt_battery_callback(0, 0, APP_BATTERY_STATUS_CHARGING, 1, msg_prams);\n}\nvoid app_ibrt_simulate_charger_plug_out_test(void) {\n  union APP_BATTERY_MSG_PRAMS msg_prams;\n  msg_prams.charger = APP_BATTERY_CHARGER_PLUGOUT;\n  app_ibrt_battery_callback(0, 0, APP_BATTERY_STATUS_CHARGING, 1, msg_prams);\n}\nvoid app_ibrt_simulate_charger_plug_box_test(void) {\n  static int count = 0;\n  if (count++ % 2 == 0) {\n    app_ibrt_simulate_charger_plug_in_test();\n  } else {\n    app_ibrt_simulate_charger_plug_out_test();\n  }\n}\nextern void app_ibrt_sync_volume_info();\n\nvoid app_ibrt_search_ui_gpio_key_handle(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s,event:%d,code:%d\", __func__, status->event, status->code);\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (IBRT_SLAVE == p_ibrt_ctrl->current_role &&\n      status->event == APP_KEY_EVENT_DOUBLECLICK) {\n    app_ibrt_if_keyboard_notify(status, param);\n  } else {\n    switch (status->event) {\n    case APP_KEY_EVENT_CLICK:\n      /*if (status->code == APP_KEY_CODE_FN1)\n      {\n          app_ibrt_simulate_charger_plug_in_test();\n      }\n      else if(status->code == APP_KEY_CODE_FN2)\n      {\n          app_ibrt_simulate_charger_plug_out_test();\n      }\n      else\n      {\n\n      }*/\n      break;\n    case APP_KEY_EVENT_DOUBLECLICK:\n      if (status->code == APP_KEY_CODE_FN1) {\n        app_bt_volumeup();\n        if (IBRT_MASTER == p_ibrt_ctrl->current_role) {\n          TRACE(0, \"ibrt master sync volume up to slave !\");\n          app_ibrt_sync_volume_info();\n        }\n\n      } else if (status->code == APP_KEY_CODE_FN2) {\n        app_bt_volumedown();\n        if (IBRT_MASTER == p_ibrt_ctrl->current_role) {\n          TRACE(0, \"ibrt master sync volume up to slave !\");\n          app_ibrt_sync_volume_info();\n        }\n      } else {\n      }\n      break;\n    case APP_KEY_EVENT_LONGPRESS:\n      if (status->code == APP_KEY_CODE_FN1) {\n#ifdef TPORTS_KEY_COEXIST\n        app_ibrt_simulate_charger_plug_out_test();\n#else\n        app_ibrt_ui_tws_switch();\n#endif\n      } else if (status->code == APP_KEY_CODE_FN2) {\n\n      } else {\n      }\n      break;\n    default:\n      break;\n    }\n  }\n}\n#endif\n\nconst app_uart_handle_t app_ibrt_uart_test_handle[] = {\n    {\"factoryreset_test\", app_ibrt_nvrecord_rebuild},\n    {\"roleswitch_test\", app_ibrt_role_switch_test},\n    {\"inquiry_start_test\", app_ibrt_inquiry_start_test},\n    {\"open_box_event_test\", app_ibrt_ui_open_box_event_test},\n    {\"fetch_out_box_event_test\", app_ibrt_ui_fetch_out_box_event_test},\n    {\"put_in_box_event_test\", app_ibrt_ui_put_in_box_event_test},\n    {\"close_box_event_test\", app_ibrt_ui_close_box_event_test},\n    {\"reconnect_event_test\", app_ibrt_ui_reconnect_event_test},\n    {\"wear_up_event_test\", app_ibrt_ui_ware_up_event_test},\n    {\"wear_down_event_test\", app_ibrt_ui_ware_down_event_test},\n    {\"shut_down_test\", app_ibrt_ui_shut_down_test},\n    {\"phone_connect_event_test\", app_ibrt_ui_phone_connect_event_test},\n    {\"switch_ibrt_test\", app_ibrt_ui_tws_swtich_test},\n    {\"suspend_ibrt_test\", app_ibrt_ui_suspend_ibrt_test},\n    {\"resume_ibrt_test\", app_ibrt_ui_resume_ibrt_test},\n    {\"conn_second_mobile_test\", app_ibrt_ui_choice_connect_second_mobile},\n    {\"mobile_tws_disc_test\", app_ibrt_if_disconnect_mobile_tws_link},\n    {\"pairing_mode_test\", app_ibrt_ui_pairing_mode_test},\n    {\"freeman_mode_test\", app_ibrt_ui_freeman_pairing_mode_test},\n    {\"audio_play\", app_ibrt_ui_audio_play_test},\n    {\"audio_pause\", app_ibrt_ui_audio_pause_test},\n    {\"audio_forward\", app_ibrt_ui_audio_forward_test},\n    {\"audio_backward\", app_ibrt_ui_audio_backward_test},\n    {\"avrcp_volup\", app_ibrt_ui_avrcp_volume_up_test},\n    {\"avrcp_voldn\", app_ibrt_ui_avrcp_volume_down_test},\n    {\"hfsco_create\", app_ibrt_ui_hfsco_create_test},\n    {\"hfsco_disc\", app_ibrt_ui_hfsco_disc_test},\n    {\"call_redial\", app_ibrt_ui_call_redial_test},\n    {\"call_answer\", app_ibrt_ui_call_answer_test},\n    {\"call_hangup\", app_ibrt_ui_call_hangup_test},\n    {\"volume_up\", app_ibrt_ui_local_volume_up_test},\n    {\"volume_down\", app_ibrt_ui_local_volume_down_test},\n    {\"get_a2dp_state\", app_ibrt_ui_get_a2dp_state_test},\n    {\"get_avrcp_state\", app_ibrt_ui_get_avrcp_state_test},\n    {\"get_hfp_state\", app_ibrt_ui_get_hfp_state_test},\n    {\"get_call_status\", app_ibrt_ui_get_call_status_test},\n    {\"get_ibrt_role\", app_ibrt_ui_get_ibrt_role_test},\n    {\"get_tws_state\", app_ibrt_ui_get_tws_conn_state_test},\n    {\"iic_switch\", app_ibrt_ui_iic_uart_switch_test},\n    {\"soft_reset\", app_ibrt_ui_soft_reset_test},\n#ifdef IBRT_SEARCH_UI\n    {\"plug_in_test\", app_ibrt_simulate_charger_plug_in_test},\n    {\"plug_out_test\", app_ibrt_simulate_charger_plug_out_test},\n    {\"plug_box_test\", app_ibrt_simulate_charger_plug_box_test},\n#endif\n#ifdef IBRT_ENHANCED_STACK_PTS\n    {\"hf_create_service_link\", btif_pts_hf_create_link_with_pts},\n    {\"hf_disc_service_link\", btif_pts_hf_disc_service_link},\n    {\"hf_create_audio_link\", btif_pts_hf_create_audio_link},\n    {\"hf_disc_audio_link\", btif_pts_hf_disc_audio_link},\n    {\"hf_answer_call\", btif_pts_hf_answer_call},\n    {\"hf_hangup_call\", btif_pts_hf_hangup_call},\n    {\"rfc_register\", btif_pts_rfc_register_channel},\n    {\"rfc_close\", btif_pts_rfc_close},\n    {\"av_create_channel\", btif_pts_av_create_channel_with_pts},\n    {\"av_disc_channel\", btif_pts_av_disc_channel},\n    {\"ar_connect\", btif_pts_ar_connect_with_pts},\n    {\"ar_disconnect\", btif_pts_ar_disconnect},\n    {\"ar_panel_play\", btif_pts_ar_panel_play},\n    {\"ar_panel_pause\", btif_pts_ar_panel_pause},\n    {\"ar_panel_stop\", btif_pts_ar_panel_stop},\n    {\"ar_panel_forward\", btif_pts_ar_panel_forward},\n    {\"ar_panel_backward\", btif_pts_ar_panel_backward},\n    {\"ar_volume_up\", btif_pts_ar_volume_up},\n    {\"ar_volume_down\", btif_pts_ar_volume_down},\n    {\"ar_volume_notify\", btif_pts_ar_volume_notify},\n    {\"ar_volume_change\", btif_pts_ar_volume_change},\n    {\"ar_set_absolute_volume\", btif_pts_ar_set_absolute_volume},\n#endif\n};\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_find_uart_handle\n Description  : find the test cmd handle\n Input        : uint8_t* buf\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\napp_uart_test_function_handle app_ibrt_ui_find_uart_handle(unsigned char *buf) {\n  app_uart_test_function_handle p = NULL;\n  for (uint8_t i = 0;\n       i < sizeof(app_ibrt_uart_test_handle) / sizeof(app_uart_handle_t); i++) {\n    if (strncmp((char *)buf, app_ibrt_uart_test_handle[i].string,\n                strlen(app_ibrt_uart_test_handle[i].string)) == 0 ||\n        strstr(app_ibrt_uart_test_handle[i].string, (char *)buf)) {\n      p = app_ibrt_uart_test_handle[i].function;\n      break;\n    }\n  }\n  return p;\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_test_cmd_handler\n Description  : ibrt ui test cmd handler\n Input        : uint8_t *buf\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nextern \"C\" int app_ibrt_ui_test_cmd_handler(unsigned char *buf,\n                                            unsigned int length) {\n  int ret = 0;\n\n  if (buf[length - 2] == 0x0d || buf[length - 2] == 0x0a) {\n    buf[length - 2] = 0;\n  }\n\n  app_uart_test_function_handle handl_function =\n      app_ibrt_ui_find_uart_handle(buf);\n  if (handl_function) {\n    handl_function();\n  } else {\n    ret = -1;\n    TRACE(0, \"can not find handle function\");\n  }\n  return ret;\n}\n#ifdef BES_AUDIO_DEV_Main_Board_9v0\nvoid app_ibrt_key1(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 0;\n  msg.msg_body.message_ptr = (uint32_t)NULL;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_key2(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 1;\n  msg.msg_body.message_ptr = (uint32_t)NULL;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_key3(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 2;\n  msg.msg_body.message_ptr = (uint32_t)NULL;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_key4(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 3;\n  msg.msg_body.message_ptr = (uint32_t)NULL;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_key5(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 4;\n  msg.msg_body.message_ptr = (uint32_t)NULL;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n\nvoid app_ibrt_key6(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  TWS_PD_MSG_BLOCK msg;\n  msg.msg_body.message_id = 5;\n  msg.msg_body.message_ptr = (uint32_t)NULL;\n  app_ibrt_peripheral_mailbox_put(&msg);\n}\n#endif\n\nvoid app_bt_sleep(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  // app_ibrt_ui_event_entry(IBRT_CLOSE_BOX_EVENT);\n  bt_key_handle_func_click();\n}\n\nvoid app_wakeup_sleep(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  // app_ibrt_ui_event_entry(IBRT_FETCH_OUT_EVENT);\n  a2dp_handleKey(AVRCP_KEY_PLAY);\n}\n\nvoid app_test_key(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  // app_ibrt_ui_event_entry(IBRT_FETCH_OUT_EVENT);\n  a2dp_handleKey(AVRCP_KEY_PLAY);\n}\n\n#if defined(__BT_DEBUG_TPORTS__) && !defined(TPORTS_KEY_COEXIST)\n\nvoid app_ibrt_ui_test_key(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  {\n#ifdef IBRT_SEARCH_UI\n    app_ibrt_search_ui_handle_key(status, param);\n#else\n    app_ibrt_normal_ui_handle_key(status, param);\n#endif\n  }\n}\n\n#else\n\nvoid app_ibrt_ui_test_key(APP_KEY_STATUS *status, void *param) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n#ifdef TILE_DATAPATH\n  uint8_t shutdown_key = HAL_KEY_EVENT_TRIPLECLICK;\n#else\n  uint8_t shutdown_key = HAL_KEY_EVENT_LONGLONGPRESS;\n#endif\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n\n#if 0 // def IBRT_OTA\n\tif ((status->code == HAL_KEY_CODE_PWR)&&\\\n        (status->event == APP_KEY_EVENT_CLICK)&&\\\n        (app_check_user_can_role_switch_in_ota()))\n\t{\n\t    TRACE(0, \"[OTA] role switch in progress!\");\n        return ;\n\t}\n#endif\n\n  if (IBRT_SLAVE == p_ibrt_ctrl->current_role &&\n      status->event != shutdown_key) {\n    /*       if(((status->code == HAL_KEY_CODE_PWR)&&(status->event ==\n       APP_KEY_EVENT_CLICK)) &&\\\n                      ((p_ibrt_ctrl->master_tws_switch_pending != false) || \\\n                       (p_ibrt_ctrl->slave_tws_switch_pending != false) ||  \\\n                       (ota_role_switch_flag != 0)||\\\n                       (avoid_even_packets_protect_flag != 0)))\n           {\n               TRACE(0, \"[OTA] role switch in progress!\");\n                           return ;\n           }\n   */\n    app_ibrt_if_keyboard_notify(status, param);\n  }\n\n  else {\n#ifdef IBRT_SEARCH_UI\n    app_ibrt_search_ui_handle_key(status, param);\n#else\n    app_ibrt_normal_ui_handle_key(status, param);\n#endif\n  }\n}\n#endif\n\nvoid app_ibrt_ui_test_key_io_event(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  switch (status->event) {\n  case APP_KEY_EVENT_CLICK:\n    if (status->code == APP_KEY_CODE_FN1) {\n      app_ibrt_if_event_entry(IBRT_OPEN_BOX_EVENT);\n    } else if (status->code == APP_KEY_CODE_FN2) {\n      app_ibrt_if_event_entry(IBRT_FETCH_OUT_EVENT);\n    } else {\n      app_ibrt_if_event_entry(IBRT_WEAR_UP_EVENT);\n    }\n    break;\n\n  case APP_KEY_EVENT_DOUBLECLICK:\n    if (status->code == APP_KEY_CODE_FN1) {\n      app_ibrt_if_event_entry(IBRT_CLOSE_BOX_EVENT);\n    } else if (status->code == APP_KEY_CODE_FN2) {\n      app_ibrt_if_event_entry(IBRT_PUT_IN_EVENT);\n    } else {\n      app_ibrt_if_event_entry(IBRT_WEAR_DOWN_EVENT);\n    }\n    break;\n\n  case APP_KEY_EVENT_LONGPRESS:\n    break;\n\n  case APP_KEY_EVENT_TRIPLECLICK:\n    break;\n\n  case HAL_KEY_EVENT_LONGLONGPRESS:\n    break;\n\n  case APP_KEY_EVENT_ULTRACLICK:\n    break;\n\n  case APP_KEY_EVENT_RAMPAGECLICK:\n    break;\n  }\n}\n\nvoid app_ibrt_ui_test_key_custom_event(APP_KEY_STATUS *status, void *param) {\n  TRACE(3, \"%s %d,%d\", __func__, status->code, status->event);\n  switch (status->event) {\n  case APP_KEY_EVENT_CLICK:\n    break;\n\n  case APP_KEY_EVENT_DOUBLECLICK:\n    break;\n\n  case APP_KEY_EVENT_LONGPRESS:\n    break;\n\n  case APP_KEY_EVENT_TRIPLECLICK:\n    break;\n\n  case HAL_KEY_EVENT_LONGLONGPRESS:\n    break;\n\n  case APP_KEY_EVENT_ULTRACLICK:\n    break;\n\n  case APP_KEY_EVENT_RAMPAGECLICK:\n    break;\n  }\n}\n\nvoid app_ibrt_ui_test_voice_assistant_key(APP_KEY_STATUS *status, void *param) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  TRACE(3, \"%s code 0x%x event %d\", __func__, status->code, status->event);\n\n  if (APP_KEY_CODE_GOOGLE != status->code) {\n    return;\n  } else {\n    ibrt_ctrl_t *pIbrtCtrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n    if (IBRT_ACTIVE_MODE != pIbrtCtrl->tws_mode) {\n      app_tws_ibrt_exit_sniff_with_mobile();\n    }\n  }\n\n  if (p_ibrt_ctrl->current_role != IBRT_MASTER) {\n    app_ibrt_if_keyboard_notify(status, param);\n    TRACE(2, \"%s isn't master %d\", __func__, p_ibrt_ctrl->current_role);\n    return;\n  }\n\n#ifdef IS_MULTI_AI_ENABLED\n  if (app_ai_manager_spec_get_status_is_in_invalid()) {\n    TRACE(0, \"AI feature has been diabled\");\n    return;\n  }\n\n  if (app_ai_manager_is_need_reboot()) {\n    TRACE(1, \"%s ai need to reboot\", __func__);\n    return;\n  }\n\n#ifdef MAI_TYPE_REBOOT_WITHOUT_OEM_APP\n  if (app_ai_manager_get_spec_update_flag()) {\n    TRACE(0, \"device reboot is ongoing...\");\n    return;\n  }\n#endif\n\n  if (app_ai_manager_voicekey_is_enable()) {\n    if (AI_SPEC_GSOUND == app_ai_manager_get_current_spec()) {\n#ifdef BISTO_ENABLED\n      gsound_custom_actions_handle_key(status, param);\n#endif\n    } else if (AI_SPEC_INIT != app_ai_manager_get_current_spec()) {\n      app_ai_key_event_handle(status, 0);\n    }\n  }\n#else\n#ifdef __AI_VOICE__\n  app_ai_key_event_handle(status, 0);\n#endif\n#ifdef BISTO_ENABLED\n  gsound_custom_actions_handle_key(status, param);\n#endif\n#endif\n}\n\nconst APP_KEY_HANDLE app_ibrt_ui_test_key_cfg[] = {\n\n#if defined(ANC_APP)\n\n#endif\n\n#if defined(__BT_ANC_KEY__) && defined(ANC_APP)\n    //{{APP_KEY_CODE_PWR,APP_KEY_EVENT_CLICK},\"bt anc key\",app_anc_key, NULL},\n    {{APP_KEY_CODE_PWR, APP_KEY_EVENT_LONGPRESS},\n     \"app_ibrt_ui_test_key\",\n     app_anc_key,\n     NULL},\n#else\n//{{APP_KEY_CODE_PWR,APP_KEY_EVENT_CLICK},\"app_ibrt_ui_test_key\",\n// app_ibrt_ui_test_key, NULL},\n#endif\n\n    {{APP_KEY_CODE_PWR, APP_KEY_EVENT_CLICK},\n     \"app_ibrt_ui_test_key\",\n     app_bt_sleep,\n     NULL},\n    {{APP_KEY_CODE_PWR, APP_KEY_EVENT_DOUBLECLICK},\n     \"app_ibrt_ui_test_key\",\n     app_wakeup_sleep,\n     NULL},\n    {{APP_KEY_CODE_PWR, APP_KEY_EVENT_TRIPLECLICK},\n     \"app_ibrt_ui_test_key\",\n     app_ibrt_ui_test_key,\n     NULL},\n    {{APP_KEY_CODE_PWR, APP_KEY_EVENT_ULTRACLICK},\n     \"app_ibrt_ui_test_key\",\n     app_ibrt_ui_test_key,\n     NULL},\n};\n\n/*\n * customer addr config here\n */\nibrt_pairing_info_t g_ibrt_pairing_info[] = {\n    {{0x51, 0x33, 0x33, 0x22, 0x11, 0x11},\n     {0x50, 0x33, 0x33, 0x22, 0x11, 0x11}},\n    {{0x53, 0x33, 0x33, 0x22, 0x11, 0x11},\n     {0x52, 0x33, 0x33, 0x22, 0x11, 0x11}}, /*LJH*/\n    {{0x61, 0x33, 0x33, 0x22, 0x11, 0x11},\n     {0x60, 0x33, 0x33, 0x22, 0x11, 0x11}},\n    {{0x67, 0x66, 0x66, 0x22, 0x11, 0x11},\n     {0x66, 0x66, 0x66, 0x22, 0x11, 0x11}}, /*bisto*/\n    {{0x71, 0x33, 0x33, 0x22, 0x11, 0x11},\n     {0x70, 0x33, 0x33, 0x22, 0x11, 0x11}},\n    {{0x81, 0x33, 0x33, 0x22, 0x11, 0x11},\n     {0x80, 0x33, 0x33, 0x22, 0x11, 0x11}},\n    {{0x91, 0x33, 0x33, 0x22, 0x11, 0x11},\n     {0x90, 0x33, 0x33, 0x22, 0x11, 0x11}}, /*Customer use*/\n    {{0x05, 0x33, 0x33, 0x22, 0x11, 0x11},\n     {0x04, 0x33, 0x33, 0x22, 0x11, 0x11}}, /*Rui*/\n    {{0x07, 0x33, 0x33, 0x22, 0x11, 0x11},\n     {0x06, 0x33, 0x33, 0x22, 0x11, 0x11}}, /*zsl*/\n    {{0x88, 0xaa, 0x33, 0x22, 0x11, 0x11},\n     {0x87, 0xaa, 0x33, 0x22, 0x11, 0x11}}, /*Lufang*/\n    {{0x77, 0x22, 0x66, 0x22, 0x11, 0x11},\n     {0x77, 0x33, 0x66, 0x22, 0x11, 0x11}}, /*xiao*/\n    {{0xAA, 0x22, 0x66, 0x22, 0x11, 0x11},\n     {0xBB, 0x33, 0x66, 0x22, 0x11, 0x11}}, /*LUOBIN*/\n    {{0x08, 0x33, 0x66, 0x22, 0x11, 0x11},\n     {0x07, 0x33, 0x66, 0x22, 0x11, 0x11}}, /*Yangbin1*/\n    {{0x0B, 0x33, 0x66, 0x22, 0x11, 0x11},\n     {0x0A, 0x33, 0x66, 0x22, 0x11, 0x11}}, /*Yangbin2*/\n    {{0x35, 0x33, 0x66, 0x22, 0x11, 0x11},\n     {0x34, 0x33, 0x66, 0x22, 0x11, 0x11}}, /*Lulu*/\n    {{0xF8, 0x33, 0x66, 0x22, 0x11, 0x11},\n     {0xF7, 0x33, 0x66, 0x22, 0x11, 0x11}}, /*jtx*/\n    {{0xd3, 0x53, 0x86, 0x42, 0x71, 0x31},\n     {0xd2, 0x53, 0x86, 0x42, 0x71, 0x31}}, /*shhx*/\n    {{0xcc, 0xaa, 0x99, 0x88, 0x77, 0x66},\n     {0xbb, 0xaa, 0x99, 0x88, 0x77, 0x66}}, /*mql*/\n    {{0x95, 0x33, 0x69, 0x22, 0x11, 0x11},\n     {0x94, 0x33, 0x69, 0x22, 0x11, 0x11}}, /*wyl*/\n    {{0x82, 0x35, 0x68, 0x24, 0x19, 0x17},\n     {0x81, 0x35, 0x68, 0x24, 0x19, 0x17}}, /*hy*/\n    {{0x66, 0x66, 0x88, 0x66, 0x66, 0x88},\n     {0x65, 0x66, 0x88, 0x66, 0x66, 0x88}}, /*xdl*/\n    {{0x61, 0x66, 0x66, 0x66, 0x66, 0x81},\n     {0x16, 0x66, 0x66, 0x66, 0x66, 0x18}}, /*test1*/\n    {{0x62, 0x66, 0x66, 0x66, 0x66, 0x82},\n     {0x26, 0x66, 0x66, 0x66, 0x66, 0x28}}, /*test2*/\n    {{0x63, 0x66, 0x66, 0x66, 0x66, 0x83},\n     {0x36, 0x66, 0x66, 0x66, 0x66, 0x38}}, /*test3*/\n    {{0x64, 0x66, 0x66, 0x66, 0x66, 0x84},\n     {0x46, 0x66, 0x66, 0x66, 0x66, 0x48}}, /*test4*/\n    {{0x65, 0x66, 0x66, 0x66, 0x66, 0x85},\n     {0x56, 0x66, 0x66, 0x66, 0x66, 0x58}}, /*test5*/\n    {{0xaa, 0x66, 0x66, 0x66, 0x66, 0x86},\n     {0xaa, 0x66, 0x66, 0x66, 0x66, 0x68}}, /*test6*/\n    {{0x67, 0x66, 0x66, 0x66, 0x66, 0x87},\n     {0x76, 0x66, 0x66, 0x66, 0x66, 0x78}}, /*test7*/\n    {{0x68, 0x66, 0x66, 0x66, 0x66, 0xa8},\n     {0x86, 0x66, 0x66, 0x66, 0x66, 0x8a}}, /*test8*/\n    {{0x69, 0x66, 0x66, 0x66, 0x66, 0x89},\n     {0x86, 0x66, 0x66, 0x66, 0x66, 0x18}}, /*test9*/\n    {{0x93, 0x33, 0x33, 0x33, 0x33, 0x33},\n     {0x92, 0x33, 0x33, 0x33, 0x33, 0x33}}, /*gxl*/\n    {{0xae, 0x28, 0x00, 0xe9, 0xc6, 0x5c},\n     {0xd8, 0x29, 0x00, 0xe9, 0xc6, 0x5c}}, /*lsk*/\n    {{0x07, 0x13, 0x66, 0x22, 0x11, 0x11},\n     {0x06, 0x13, 0x66, 0x22, 0x11, 0x11}}, /*yangguo*/\n    {{0x02, 0x15, 0x66, 0x22, 0x11, 0x11},\n     {0x01, 0x15, 0x66, 0x22, 0x11, 0x11}}, /*mql fpga*/\n\n};\n\n// /******************************pwrkey_det_timer*********************************************************/\n// osTimerId pwrkey_detid = NULL;\n// void startpwrkey_det(int ms);\n// void stoppwrkey_det(void);\n// static void pwrkey_detfun(const void *);\n// osTimerDef(defpwrkey_det,pwrkey_detfun);\n// void pwrkey_detinit(void)\n// {\n// \tTRACE(3,\"%s\",__func__);\n// \tpwrkey_detid = osTimerCreate(osTimer(defpwrkey_det),osTimerOnce,(void\n// *)0);\n// }\n\n// extern void app_ibrt_customif_test1_cmd_send(uint8_t *p_buff, uint16_t\n// length); static void pwrkey_detfun(const void *)\n// {\n\n// \tstatic ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n// \tstatic bool last_pwrkey = false;\n// \tbool curr_pwrkey_sta;\n// \tcurr_pwrkey_sta = hal_pwrkey_pressed();\n// \tAPP_KEY_STATUS inear_status[] = {APP_KEY_CODE_FN3,HAL_KEY_EVENT_CLICK};\n// \tAPP_KEY_STATUS outear_status[] = {APP_KEY_CODE_FN4,HAL_KEY_EVENT_CLICK};\n// \t//TRACE(3,\"pwrkey = %d\",curr_pwrkey_sta);\n// \tif(curr_pwrkey_sta != last_pwrkey){\n// \t\tif(curr_pwrkey_sta == true){\n// \t\t\t//app_wakeup_sleep(NULL,NULL);\n// \t\t    \tTRACE(3,\"%s PLAY\",__func__);\n//                 \tapp_bt_accessmode_set(BTIF_BT_DEFAULT_ACCESS_MODE_PAIR);\n// \t\t\t\t\tapp_voice_report(APP_STATUS_INDICATION_BOTHSCAN,0);\n\n// \t\t\tif (IBRT_SLAVE == p_ibrt_ctrl->current_role){\n// \t\t\t\tapp_ibrt_customif_test1_cmd_send((uint8_t\n// *)inear_status, sizeof(APP_KEY_STATUS)); \t\t\t}else{\n// a2dp_handleKey(AVRCP_KEY_PLAY);\n// \t\t\t}\n// \t\t}else{\n// \t\t\t//app_bt_sleep(NULL,NULL);\n// \t\t\tTRACE(3,\"%s PAUSE\",__func__);\n// \t\t\t//a2dp_handleKey(AVRCP_KEY_PAUSE);\n// \t\t\tif (IBRT_SLAVE == p_ibrt_ctrl->current_role){\n// \t\t\t\tapp_ibrt_customif_test1_cmd_send((uint8_t\n// *)outear_status, sizeof(APP_KEY_STATUS)); \t\t\t}else{\n// \t\t\t\ta2dp_handleKey(AVRCP_KEY_PAUSE);\n// \t\t\t}\n// \t\t}\n// \t\tlast_pwrkey = curr_pwrkey_sta;\n// \t}\n// \tstartpwrkey_det(200);\n// }\n\n// void startpwrkey_det(int ms)\n// {\n// \t//TRACE(3,\"\\n\\n !!!!!!!!!!start %s\\n\\n\",__func__);\n// \tosTimerStart(pwrkey_detid,ms);\n// }\n\n// void stoppwrkey_det(void)\n// {\n// \t//TRACE(\"\\n\\n!!!!!!!!!!  stop %s\\n\\n\",__func__);\n// \tosTimerStop(pwrkey_detid);\n// }\n\n/********************************pwrkey_det_timer*******************************************************/\n\nint app_ibrt_ui_test_config_load(void *config) {\n  ibrt_pairing_info_t *ibrt_pairing_info_lst = g_ibrt_pairing_info;\n  uint32_t lst_size = sizeof(g_ibrt_pairing_info) / sizeof(ibrt_pairing_info_t);\n  ibrt_config_t *ibrt_config = (ibrt_config_t *)config;\n  struct nvrecord_env_t *nvrecord_env;\n  uint8_t ble_address[6] = {0, 0, 0, 0, 0, 0};\n\n  nv_record_env_get(&nvrecord_env);\n  if (nvrecord_env->ibrt_mode.tws_connect_success == 0) {\n    app_ibrt_ui_clear_tws_connect_success_last();\n  } else {\n    app_ibrt_ui_set_tws_connect_success_last();\n  }\n\n  if (memcmp(nv_record_tws_get_self_ble_info(), bt_get_ble_local_address(),\n             BD_ADDR_LEN) &&\n      memcmp(nv_record_tws_get_self_ble_info(), ble_address, BD_ADDR_LEN)) {\n    nv_record_tws_exchange_ble_info();\n  }\n\n  factory_section_original_btaddr_get(ibrt_config->local_addr.address);\n  for (uint32_t i = 0; i < lst_size; i++) {\n    if (!memcmp(ibrt_pairing_info_lst[i].master_bdaddr.address,\n                ibrt_config->local_addr.address, BD_ADDR_LEN)) {\n      ibrt_config->nv_role = IBRT_MASTER;\n      ibrt_config->audio_chnl_sel = AUDIO_CHANNEL_SELECT_RCHNL;\n      memcpy(ibrt_config->peer_addr.address,\n             ibrt_pairing_info_lst[i].slave_bdaddr.address, BD_ADDR_LEN);\n      return 0;\n    } else if (!memcmp(ibrt_pairing_info_lst[i].slave_bdaddr.address,\n                       ibrt_config->local_addr.address, BD_ADDR_LEN)) {\n      ibrt_config->nv_role = IBRT_SLAVE;\n      ibrt_config->audio_chnl_sel = AUDIO_CHANNEL_SELECT_LCHNL;\n      memcpy(ibrt_config->peer_addr.address,\n             ibrt_pairing_info_lst[i].master_bdaddr.address, BD_ADDR_LEN);\n      return 0;\n    }\n  }\n  return -1;\n}\n\nvoid app_ibrt_ui_test_key_init(void) {\n  app_key_handle_clear();\n  for (uint8_t i = 0; i < ARRAY_SIZE(app_ibrt_ui_test_key_cfg); i++) {\n    app_key_handle_registration(&app_ibrt_ui_test_key_cfg[i]);\n  }\n}\n\nvoid app_ibrt_ui_test_init(void) {\n  TRACE(1, \"%s\", __func__);\n\n  app_ibrt_ui_box_init(&box_ble_addr);\n  app_ibrt_auto_test_init();\n}\n\nvoid app_ibrt_ui_sync_status(uint8_t status) {\n#ifdef ANC_APP\n  app_anc_status_post(status);\n#endif\n}\n\n#endif\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_ui_test_cmd_if.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_ui_test_cmd_if.h\"\n#include \"a2dp_decoder.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_anc.h\"\n#include \"app_battery.h\"\n#include \"app_ble_uart.h\"\n#include \"app_bt.h\"\n#include \"app_ibrt_auto_test.h\"\n#include \"app_ibrt_auto_test_cmd_handle.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_keyboard.h\"\n#include \"app_ibrt_peripheral_manager.h\"\n#include \"app_ibrt_ui_test.h\"\n#include \"app_key.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"app_tws_if.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"bt_if.h\"\n#include \"btapp.h\"\n#include \"factory_section.h\"\n#include \"me_api.h\"\n#include \"norflash_api.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(BISTO_ENABLED)\n#include \"gsound_custom_actions.h\"\n#include \"gsound_custom_ble.h\"\n#include \"gsound_custom_bt.h\"\n\n#endif\n#ifdef __IAG_BLE_INCLUDE__\n#include \"app.h\"\n#include \"app_ble_mode_switch.h\"\n#endif\n\n#ifdef BES_OTA\n#include \"ota_control.h\"\n#endif\n\n#define IBRT_ENHANCED_STACK_PTS\nstatic bt_bdaddr_t pts_bt_addr = {{\n#if 0\n        0x14, 0x71, 0xda, 0x7d, 0x1a, 0x00\n#else\n    0x13, 0x71, 0xda, 0x7d, 0x1a, 0x00\n#endif\n}};\nvoid btif_pts_hf_create_link_with_pts(void) {\n  btif_pts_hf_create_service_link(&pts_bt_addr);\n}\nvoid btif_pts_av_create_channel_with_pts(void) {\n  btif_pts_av_create_channel(&pts_bt_addr);\n}\nvoid btif_pts_ar_connect_with_pts(void) { btif_pts_ar_connect(&pts_bt_addr); }\n\nvoid app_ibrt_ui_audio_play_test(void) {\n  uint8_t action[] = {IBRT_ACTION_PLAY};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_audio_pause_test(void) {\n  uint8_t action[] = {IBRT_ACTION_PAUSE};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_audio_forward_test(void) {\n  uint8_t action[] = {IBRT_ACTION_FORWARD};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_audio_backward_test(void) {\n  uint8_t action[] = {IBRT_ACTION_BACKWARD};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_avrcp_volume_up_test(void) {\n  uint8_t action[] = {IBRT_ACTION_AVRCP_VOLUP};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_avrcp_volume_down_test(void) {\n  uint8_t action[] = {IBRT_ACTION_AVRCP_VOLDN};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_hfsco_create_test(void) {\n  uint8_t action[] = {IBRT_ACTION_HFSCO_CREATE};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_hfsco_disc_test(void) {\n  uint8_t action[] = {IBRT_ACTION_HFSCO_DISC};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_call_redial_test(void) {\n  uint8_t action[] = {IBRT_ACTION_REDIAL};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_call_answer_test(void) {\n  uint8_t action[] = {IBRT_ACTION_ANSWER};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_call_hangup_test(void) {\n  uint8_t action[] = {IBRT_ACTION_HANGUP};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_local_volume_up_test(void) {\n  uint8_t action[] = {IBRT_ACTION_LOCAL_VOLUP};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\nvoid app_ibrt_ui_local_volume_down_test(void) {\n  uint8_t action[] = {IBRT_ACTION_LOCAL_VOLDN};\n  app_ibrt_if_start_user_action(action, sizeof(action));\n}\n\nvoid app_ibrt_ui_get_tws_conn_state_test(void) {\n  if (app_tws_ibrt_tws_link_connected()) {\n    TRACE(0, \"ibrt_ui_log:TWS CONNECTED\");\n  } else {\n    TRACE(0, \"ibrt_ui_log:TWS DISCONNECTED\");\n  }\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_soft_reset_test\n Description  : soft reset device\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/7/7\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_soft_reset_test(void) { app_reset(); }\n\nextern void bt_change_to_iic(APP_KEY_STATUS *status, void *param);\nvoid app_ibrt_ui_iic_uart_switch_test(void) { bt_change_to_iic(NULL, NULL); }\n\nvoid app_ibrt_ui_get_a2dp_state_test(void) {\n  const char *a2dp_state_strings[] = {\n      \"IDLE\", \"CODEC_CONFIGURED\", \"OPEN\", \"STREAMING\", \"CLOSED\", \"ABORTING\"};\n  AppIbrtA2dpState a2dp_state;\n\n  AppIbrtStatus status = app_ibrt_if_get_a2dp_state(&a2dp_state);\n  if (APP_IBRT_IF_STATUS_SUCCESS == status) {\n    TRACE(0, \"ibrt_ui_log:a2dp_state=%s\", a2dp_state_strings[a2dp_state]);\n  } else {\n    TRACE(0, \"ibrt_ui_log:get a2dp state error\");\n  }\n}\n\nvoid app_ibrt_ui_get_avrcp_state_test(void) {\n  const char *avrcp_state_strings[] = {\"DISCONNECTED\", \"CONNECTED\", \"PLAYING\",\n                                       \"PAUSED\", \"VOLUME_UPDATED\"};\n  AppIbrtAvrcpState avrcp_state;\n\n  AppIbrtStatus status = app_ibrt_if_get_avrcp_state(&avrcp_state);\n  if (APP_IBRT_IF_STATUS_SUCCESS == status) {\n    TRACE(0, \"ibrt_ui_log:avrcp_state=%s\", avrcp_state_strings[avrcp_state]);\n  } else {\n    TRACE(0, \"ibrt_ui_log:get avrcp state error\");\n  }\n}\n\nvoid app_ibrt_ui_get_hfp_state_test(void) {\n  const char *hfp_state_strings[] = {\n      \"SLC_DISCONNECTED\", \"CLOSED\",        \"SCO_CLOSED\",       \"PENDING\",\n      \"SLC_OPEN\",         \"NEGOTIATE\",     \"CODEC_CONFIGURED\", \"SCO_OPEN\",\n      \"INCOMING_CALL\",    \"OUTGOING_CALL\", \"RING_INDICATION\"};\n  AppIbrtHfpState hfp_state;\n  AppIbrtStatus status = app_ibrt_if_get_hfp_state(&hfp_state);\n\n  if (APP_IBRT_IF_STATUS_SUCCESS == status) {\n    TRACE(0, \"ibrt_ui_log:hfp_state=%s\", hfp_state_strings[hfp_state]);\n  } else {\n    TRACE(0, \"ibrt_ui_log:get hfp state error\");\n  }\n}\n\nvoid app_ibrt_ui_get_call_status_test() {\n  const char *call_status_strings[] = {\"NO_CALL\",   \"CALL_ACTIVE\", \"HOLD\",\n                                       \"INCOMMING\", \"OUTGOING\",    \"ALERT\"};\n  AppIbrtCallStatus call_status;\n\n  AppIbrtStatus status = app_ibrt_if_get_hfp_call_status(&call_status);\n  if (APP_IBRT_IF_STATUS_SUCCESS == status) {\n    TRACE(0, \"ibrt_ui_log:call_status=%s\", call_status_strings[call_status]);\n  } else {\n    TRACE(0, \"ibrt_ui_log:get call status error\");\n  }\n}\n\nvoid app_ibrt_ui_get_ibrt_role_test(void) {\n  ibrt_role_e role = app_ibrt_if_get_ibrt_role();\n\n  if (IBRT_MASTER == role) {\n    TRACE(0, \"ibrt_ui_log:ibrt role is MASTER\");\n  } else if (IBRT_SLAVE == role) {\n    TRACE(0, \"ibrt_ui_log:ibrt role is SLAVE\");\n  } else {\n    TRACE(0, \"ibrt_ui_log:ibrt role is UNKNOW\");\n  }\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_open_box_event_test\n Description  : app ibrt ui open box test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_open_box_event_test(void) {\n  app_ibrt_if_event_entry(IBRT_OPEN_BOX_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_fetch_out_box_event_test\n Description  : fetch out box test function\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_fetch_out_box_event_test(void) {\n  app_ibrt_if_event_entry(IBRT_FETCH_OUT_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_put_in_box_event_test\n Description  : app ibrt put in box test function\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_put_in_box_event_test(void) {\n  app_ibrt_if_event_entry(IBRT_PUT_IN_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_close_box_event_test\n Description  : app ibrt close box test function\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_close_box_event_test(void) {\n  app_ibrt_if_event_entry(IBRT_CLOSE_BOX_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_reconnect_event_test\n Description  : app ibrt reconnect function test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_reconnect_event_test(void) {\n  app_ibrt_if_event_entry(IBRT_RECONNECT_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_ware_up_event_test\n Description  : app ibrt wear up function test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_ware_up_event_test(void) {\n  app_ibrt_if_event_entry(IBRT_WEAR_UP_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_ware_down_event_test\n Description  : app ibrt wear down function test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/3/30\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_ware_down_event_test(void) {\n  app_ibrt_if_event_entry(IBRT_WEAR_DOWN_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_phone_connect_event_test\n Description  : app ibrt ui phone connect event\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/3\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_phone_connect_event_test(void) {\n  app_ibrt_if_event_entry(IBRT_PHONE_CONNECT_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_shut_down_test\n Description  : shut down test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/10\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nextern \"C\" int app_shutdown(void);\nvoid app_ibrt_ui_shut_down_test(void) {\n  app_ibrt_peripheral_auto_test_stop();\n  app_shutdown();\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_enable_tports_test\n Description  : enable BT tports\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/10\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nextern void bt_enable_tports(void);\nvoid app_ibrt_enable_tports_test(void) { bt_enable_tports(); }\n/*****************************************************************************\n Prototype    : app_ibrt_ui_tws_swtich_test\n Description  : tws switch test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/10\n Author       : bestechnic\n Modification : Created function\n\n *****************************************************************************/\nvoid app_ibrt_ui_tws_swtich_test(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n    btif_me_ibrt_role_switch(p_ibrt_ctrl->mobile_conhandle);\n  } else {\n    TRACE(0, \"ibrt_ui_log:local role is ibrt_slave, pls send tws switch in \"\n             \"another dev\");\n  }\n}\n\n/*****************************************************************************\n Prototype    : app_ibrt_ui_suspend_ibrt_test\n Description  : suspend ibrt fastack\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/24\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_suspend_ibrt_test(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n    btif_me_suspend_ibrt();\n  } else {\n    TRACE(0, \"ibrt_ui_log:local role is ibrt_slave, suspend ibrt failed\");\n  }\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_resume_ibrt_test\n Description  : resume ibrt test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/4/27\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_resume_ibrt_test(void) { btif_me_resume_ibrt(1); }\n/*****************************************************************************\n Prototype    : app_ibrt_ui_pairing_mode_test\n Description  : pairing mode test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/11/20\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_pairing_mode_test(void) {\n  app_ibrt_ui_event_entry(IBRT_TWS_PAIRING_EVENT);\n}\n/*****************************************************************************\n Prototype    : app_ibrt_ui_freeman_pairing_mode_test\n Description  : ibrt freeman pairing mode test\n Input        : void\n Output       : None\n Return Value :\n Calls        :\n Called By    :\n\n History        :\n Date         : 2019/11/21\n Author       : bestechnic\n Modification : Created function\n\n*****************************************************************************/\nvoid app_ibrt_ui_freeman_pairing_mode_test(void) {\n  app_ibrt_ui_event_entry(IBRT_FREEMAN_PAIRING_EVENT);\n}\n\nvoid app_ibrt_inquiry_start_test(void) { app_bt_start_search(); }\n\nvoid app_ibrt_role_switch_test(void) { app_tws_if_trigger_role_switch(); }\n"
  },
  {
    "path": "services/app_ibrt/src/app_ibrt_voice_report.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ibrt_voice_report.h\"\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_bt_stream.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_media_player.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_ibrt_trace.h\"\n#include \"audioflinger.h\"\n#include \"bt_drv_interface.h\"\n#include \"cmsis_os.h\"\n#include \"me_api.h\"\n#include \n#ifdef TWS_PROMPT_SYNC\n#include \"audio_prompt_sbc.h\"\n#endif\n#include \"app_audio.h\"\n\n#if defined(IBRT)\nextern uint8_t g_findme_fadein_vol;\n\ntypedef uint8_t voice_report_role_t;\n#define VOICE_REPORT_MASTER 0x00\n#define VOICE_REPORT_SLAVE 0x01\n#define VOICE_REPORT_LOCAL 0x02\n\n#define APP_PLAY_AUDIO_SYNC_DELAY_US (250 * 1000)\n#define APP_PLAY_AUDIO_SYNC_TRIGGER_TIMEROUT                                   \\\n  (APP_PLAY_AUDIO_SYNC_DELAY_US / 1000 * 2)\n\nstatic uint32_t app_ibrt_voice_tg_tick = 0;\nstatic uint32_t app_ibrt_voice_trigger_enable = 0;\n\nstatic void app_ibrt_voice_report_trigger_timeout_cb(void const *n);\nosTimerDef(APP_IBRT_VOICE_REPORT_TRIGGER_TIMEOUT,\n           app_ibrt_voice_report_trigger_timeout_cb);\nosTimerId app_ibrt_voice_report_trigger_timeout_id = NULL;\n\nstatic void app_ibrt_voice_report_trigger_timeout_cb(void const *n) {\n  TRACE_VOICE_RPT_D(\"[TRIG][TIMEOUT]\");\n  app_play_audio_stop();\n}\n\nstatic int app_ibrt_voice_report_trigger_checker_init(void) {\n  if (app_ibrt_voice_report_trigger_timeout_id == NULL) {\n    app_ibrt_voice_report_trigger_timeout_id = osTimerCreate(\n        osTimer(APP_IBRT_VOICE_REPORT_TRIGGER_TIMEOUT), osTimerOnce, NULL);\n  }\n  return 0;\n}\n\nstatic int app_ibrt_voice_report_trigger_checker_start(void) {\n  app_ibrt_voice_trigger_enable = true;\n  osTimerStart(app_ibrt_voice_report_trigger_timeout_id,\n               APP_PLAY_AUDIO_SYNC_TRIGGER_TIMEROUT);\n  return 0;\n}\n\nstatic int app_ibrt_voice_report_trigger_checker_stop(void) {\n  app_ibrt_voice_trigger_enable = false;\n  osTimerStop(app_ibrt_voice_report_trigger_timeout_id);\n  return 0;\n}\n\nint app_ibrt_voice_report_trigger_checker(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (!p_ibrt_ctrl->init_done) {\n    return 0;\n  }\n\n  if (app_ibrt_voice_trigger_enable) {\n    TRACE_VOICE_RPT_I(\"[TRIG][OK]\");\n    app_ibrt_voice_trigger_enable = false;\n    osTimerStop(app_ibrt_voice_report_trigger_timeout_id);\n  }\n  return 0;\n}\n\nvoice_report_role_t app_ibrt_voice_report_get_role(void) {\n  voice_report_role_t report_role = VOICE_REPORT_LOCAL;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (app_ibrt_ui_is_profile_exchanged()) {\n    if (app_tws_ibrt_mobile_link_connected()) {\n      report_role = VOICE_REPORT_MASTER;\n    } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n      report_role = VOICE_REPORT_SLAVE;\n    } else {\n      TRACE_VOICE_RPT_I(\"[GET_ROLE] skip it (profile_exchanged)\");\n    }\n  } else if (app_tws_ibrt_tws_link_connected()) {\n    if (app_tws_ibrt_mobile_link_connected()) {\n      report_role = VOICE_REPORT_MASTER;\n    } else if (p_ibrt_ctrl->current_role == IBRT_MASTER) {\n      report_role = VOICE_REPORT_MASTER;\n    } else {\n      report_role = VOICE_REPORT_SLAVE;\n    }\n\n  } else {\n    TRACE_VOICE_RPT_I(\"[GET_ROLE] loc only\");\n  }\n\n  TRACE_VOICE_RPT_I(\"[GET_ROLE] report_role: %d\", report_role);\n  return report_role;\n}\n\nstatic void app_ibrt_voice_report_set_trigger_time(uint32_t tg_tick) {\n  if (tg_tick) {\n    ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n    btif_connection_role_t connection_role = app_tws_ibrt_get_local_tws_role();\n    btdrv_syn_trigger_codec_en(0);\n    btdrv_syn_clr_trigger();\n    btdrv_enable_playback_triggler(ACL_TRIGGLE_MODE);\n    if (connection_role == BTIF_BCR_MASTER) {\n      bt_syn_set_tg_ticks(tg_tick, p_ibrt_ctrl->tws_conhandle,\n                          BT_TRIG_MASTER_ROLE);\n    } else if (connection_role == BTIF_BCR_SLAVE) {\n      bt_syn_set_tg_ticks(tg_tick, p_ibrt_ctrl->tws_conhandle,\n                          BT_TRIG_SLAVE_ROLE);\n    }\n    btdrv_syn_trigger_codec_en(1);\n    app_ibrt_voice_report_trigger_checker_start();\n    TRACE_VOICE_RPT_I(\"[TRIG] set trigger tg_tick:%08x\", tg_tick);\n  } else {\n    btdrv_syn_trigger_codec_en(0);\n    btdrv_syn_clr_trigger();\n    app_ibrt_voice_report_trigger_checker_stop();\n    TRACE_VOICE_RPT_I(\"[TRIG] trigger clear\");\n  }\n}\n\nint app_ibrt_voice_report_trigger_init(uint32_t aud_id, uint32_t aud_pram) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (!p_ibrt_ctrl->init_done) {\n    TRACE_VOICE_RPT_I(\"ibrt not init done.\");\n    return 0;\n  }\n\n  app_ibrt_voice_report_trigger_checker_init();\n  if (app_tws_ibrt_tws_link_connected()) {\n    ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n    voice_report_role_t report_role = app_ibrt_voice_report_get_role();\n    uint32_t curr_ticks = 0;\n    uint32_t tg_tick = 0;\n    app_ibrt_voice_report_trigger_deinit();\n\n    curr_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->tws_conhandle);\n\n    if (report_role == VOICE_REPORT_MASTER) {\n      app_ibrt_voice_report_info_t voice_report_info;\n\n      tg_tick = curr_ticks + US_TO_BTCLKS(APP_PLAY_AUDIO_SYNC_DELAY_US);\n#ifdef PLAYBACK_USE_I2S\n      af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, false);\n      af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, true);\n#else\n      af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, false);\n      af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, true);\n#endif\n      app_ibrt_voice_report_set_trigger_time(tg_tick);\n      voice_report_info.aud_id = aud_id;\n      voice_report_info.aud_pram = aud_pram;\n      voice_report_info.tg_tick = tg_tick;\n#ifdef __INTERACTION__\n      voice_report_info.vol = g_findme_fadein_vol;\n#endif\n      if (p_ibrt_ctrl->tws_mode == IBRT_SNIFF_MODE) {\n        TRACE_VOICE_RPT_I(\"[TRIG][INIT][EXIT_SNIFF] force_exit_with_tws\\n\");\n        app_tws_ibrt_exit_sniff_with_tws();\n      }\n      tws_ctrl_send_cmd(APP_TWS_CMD_VOICE_REPORT_START,\n                        (uint8_t *)&voice_report_info,\n                        sizeof(app_ibrt_voice_report_info_t));\n      TRACE_VOICE_RPT_I(\n          \"[TRIG][INIT] MASTER aud_id:%d trigger [%08x]-->[%08x]\", aud_id,\n          bt_syn_get_curr_ticks(p_ibrt_ctrl->tws_conhandle), tg_tick);\n    } else if (report_role == VOICE_REPORT_SLAVE) {\n      tg_tick = app_ibrt_voice_tg_tick;\n      if (curr_ticks < tg_tick && tg_tick != 0) {\n#ifdef PLAYBACK_USE_I2S\n        af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, false);\n        af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, true);\n#else\n        af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, false);\n        af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, true);\n#endif\n        app_ibrt_voice_report_set_trigger_time(tg_tick);\n      }\n      app_ibrt_voice_tg_tick = 0;\n      if (tg_tick <= curr_ticks) {\n        app_audio_sendrequest(APP_PLAY_BACK_AUDIO,\n                              (uint8_t)APP_BT_SETTING_CLOSE, 0);\n        TRACE_VOICE_RPT_I(\"[TRIG][INIT] Prompt TRIGGER ERROR !!!\");\n      }\n\n      TRACE_VOICE_RPT_I(\n          \"[TRIG][INIT] SLAVE aud_id:%d trigger [%08x]-->[%08x]\", aud_id,\n          bt_syn_get_curr_ticks(p_ibrt_ctrl->tws_conhandle), tg_tick);\n    }\n  } else {\n    TRACE_VOICE_RPT_I(\"[TRIG][INIT] tws not connected.\");\n  }\n\n  return 0;\n}\n\nint app_ibrt_voice_report_trigger_deinit(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (!p_ibrt_ctrl->init_done) {\n    return 0;\n  }\n\n#ifdef PLAYBACK_USE_I2S\n  af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, false);\n#else\n  af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, false);\n#endif\n  app_ibrt_voice_report_set_trigger_time(0);\n\n  return 0;\n}\n\nint app_ibrt_if_voice_report_filter(uint32_t aud_id) {\n  int nRet = 0;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n\n  switch (aud_id) {\n  case AUD_ID_BT_PAIRING_SUC:\n    nRet = 1;\n    break;\n  default:\n    break;\n  }\n\n  if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    switch (aud_id) {\n    case AUD_ID_BT_CALL_INCOMING_CALL:\n    case AUD_ID_BT_CALL_INCOMING_NUMBER:\n    case AUD_ID_BT_CALL_OVER:\n    case AUD_ID_BT_CALL_ANSWER:\n    case AUD_ID_BT_CONNECTED:\n    case AUD_ID_BT_CALL_HUNG_UP:\n    case AUD_ID_BT_CALL_REFUSE:\n      nRet = 1;\n      break;\n    default:\n      break;\n    }\n  }\n\n  if (!app_tws_ibrt_slave_ibrt_link_connected() &&\n      !app_tws_ibrt_mobile_link_connected()) {\n    if (p_ibrt_ctrl->nv_role == IBRT_SLAVE) {\n      switch (aud_id) {\n      case AUD_ID_BT_CONNECTED:\n        nRet = 1;\n        break;\n      default:\n        break;\n      }\n    }\n  }\n\n  return nRet;\n}\n\nint app_ibrt_if_voice_report_local_only(uint32_t aud_id) {\n  int nRet = 0;\n\n  switch (aud_id) {\n  default:\n    break;\n  }\n\n  return nRet;\n}\n\nint app_ibrt_if_voice_report_force_audio_retrigger_hander(uint32_t msg_id,\n                                                          uint32_t aud_id) {\n  if (msg_id == APP_BT_STREAM_MANAGER_STOP_MEDIA) {\n    if (aud_id == AUDIO_ID_BT_MUTE) {\n      TRACE_VOICE_RPT_I(\"[ID_BT_MUTE]\");\n#ifdef MEDIA_PLAYER_SUPPORT\n      trigger_media_play((AUD_ID_ENUM)aud_id, 0,\n                         PROMOT_ID_BIT_MASK_CHNLSEl_ALL);\n#endif\n    }\n  }\n  return 0;\n}\n\nstatic int app_ibrt_if_voice_report_init(uint32_t aud_id, uint16_t aud_pram,\n                                         uint8_t init_play) {\n#ifdef MEDIA_PLAYER_SUPPORT\n\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (!p_ibrt_ctrl->init_done) {\n    trigger_media_play((AUD_ID_ENUM)aud_id, 0, aud_pram);\n  } else if (app_ibrt_if_voice_report_filter(aud_id) && init_play) {\n    TRACE_VOICE_RPT_I(\"[INIT] skip aud_id:%d%s\", aud_id, aud_id2str(aud_id));\n  } else if (app_ibrt_if_voice_report_local_only(aud_id)) {\n    trigger_media_play((AUD_ID_ENUM)aud_id, 0, aud_pram);\n  } else if (!app_tws_ibrt_tws_link_connected()) {\n    trigger_media_play((AUD_ID_ENUM)aud_id, 0, aud_pram);\n  } else {\n    voice_report_role_t report_role = app_ibrt_voice_report_get_role();\n\n    app_ibrt_if_tws_sniff_block(5);\n    if (report_role == VOICE_REPORT_MASTER) {\n      TRACE_VOICE_RPT_I(\"[INIT] loc aud_id:%d%s aud_pram:%04x\", aud_id,\n                        aud_id2str(aud_id), aud_pram);\n\n      if (aud_id == AUDIO_ID_BT_MUTE) {\n#ifdef TWS_PROMPT_SYNC\n        audio_prompt_stop_playing();\n#endif\n        app_audio_manager_sendrequest_need_callback(\n            APP_BT_STREAM_MANAGER_STOP_MEDIA, BT_STREAM_MEDIA, BT_DEVICE_ID_1,\n            0, (uintptr_t)app_ibrt_if_voice_report_force_audio_retrigger_hander,\n            AUDIO_ID_BT_MUTE);\n      } else {\n        trigger_media_play((AUD_ID_ENUM)aud_id, 0, aud_pram);\n      }\n    } else if (report_role == VOICE_REPORT_SLAVE) {\n      app_ibrt_voice_report_request_t voice_report_request;\n      TRACE_VOICE_RPT_I(\"[INIT] rmt aud_id:%d%s aud_pram:%04x\", aud_id,\n                        aud_id2str(aud_id), aud_pram);\n      app_ibrt_voice_tg_tick = 0;\n      if (aud_id == AUDIO_ID_BT_MUTE) {\n#ifdef TWS_PROMPT_SYNC\n        audio_prompt_stop_playing();\n#endif\n        app_audio_manager_sendrequest_need_callback(\n            APP_BT_STREAM_MANAGER_STOP_MEDIA, BT_STREAM_MEDIA, BT_DEVICE_ID_1,\n            0, 0, 0);\n      }\n\n      voice_report_request.aud_id = aud_id;\n      voice_report_request.aud_pram = aud_pram;\n      voice_report_request.vol = 0;\n      if ((aud_id & AUDIO_ID_FIND_MY_BUDS) == AUDIO_ID_FIND_MY_BUDS) {\n        trigger_media_play((AUD_ID_ENUM)aud_id, 0, aud_pram);\n      } else\n        tws_ctrl_send_cmd(APP_TWS_CMD_VOICE_REPORT_REQUEST,\n                          (uint8_t *)&voice_report_request,\n                          sizeof(voice_report_request));\n\n    } else {\n      TRACE_VOICE_RPT_I(\"[INIT] loc only aud_id:%d aud_pram:%04x\", aud_id,\n                        aud_pram);\n#ifdef MEDIA_PLAYER_SUPPORT\n      trigger_media_play((AUD_ID_ENUM)aud_id, 0, aud_pram);\n#endif\n    }\n  }\n#endif\n  return 0;\n}\n\nint app_ibrt_if_voice_report_trig_retrigger(void) {\n  return app_ibrt_if_voice_report_handler(AUDIO_ID_BT_MUTE,\n                                          PROMOT_ID_BIT_MASK_CHNLSEl_ALL);\n}\n\nint app_ibrt_if_voice_report_handler(uint32_t aud_id, uint16_t aud_pram) {\n  return app_ibrt_if_voice_report_init(aud_id, aud_pram, true);\n}\n\nvoid app_ibrt_send_voice_report_request_req(uint8_t *p_buff, uint16_t length) {\n  voice_report_role_t report_role = app_ibrt_voice_report_get_role();\n\n  if (report_role == VOICE_REPORT_SLAVE) {\n    app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_VOICE_REPORT_REQUEST, p_buff,\n                                  length);\n  }\n}\n\nvoid app_ibrt_voice_report_request_req_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length) {\n  voice_report_role_t report_role = app_ibrt_voice_report_get_role();\n\n  if (report_role == VOICE_REPORT_MASTER) {\n    app_ibrt_voice_report_request_t *voice_report_request =\n        (app_ibrt_voice_report_request_t *)p_buff;\n    app_ibrt_if_voice_report_init(voice_report_request->aud_id,\n                                  voice_report_request->aud_pram, false);\n  } else {\n    TRACE_VOICE_RPT_I(\"[REQUEST_REQ][HANDLER] role is :%d\", report_role);\n  }\n}\n\nvoid app_ibrt_send_voice_report_start_req(uint8_t *p_buff, uint16_t length) {\n  voice_report_role_t report_role = app_ibrt_voice_report_get_role();\n\n  if (report_role == VOICE_REPORT_MASTER)\n\n  {\n    app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_VOICE_REPORT_START, p_buff,\n                                  length);\n  } else {\n    TRACE_VOICE_RPT_I(\"[START_REQ] role is :%d\", report_role);\n  }\n}\n\nvoid app_ibrt_voice_report_request_start_handler(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length) {\n#ifdef MEDIA_PLAYER_SUPPORT\n  voice_report_role_t report_role = app_ibrt_voice_report_get_role();\n\n  if (report_role == VOICE_REPORT_SLAVE) {\n    app_ibrt_voice_report_info_t *voice_report_info =\n        (app_ibrt_voice_report_info_t *)p_buff;\n    app_ibrt_voice_tg_tick = voice_report_info->tg_tick;\n#ifdef __INTERACTION__\n    g_findme_fadein_vol = voice_report_info->vol;\n#endif\n\n    if (voice_report_info->aud_id == AUDIO_ID_BT_MUTE) {\n      app_audio_manager_sendrequest_need_callback(\n          APP_BT_STREAM_MANAGER_STOP_MEDIA, BT_STREAM_MEDIA, BT_DEVICE_ID_1, 0,\n          (uintptr_t)app_ibrt_if_voice_report_force_audio_retrigger_hander,\n          AUDIO_ID_BT_MUTE);\n    } else {\n      TRACE_VOICE_RPT_I(\"[START_REQ][HANDLER] aud id:%d\",\n                        voice_report_info->aud_id);\n      trigger_media_play((AUD_ID_ENUM)voice_report_info->aud_id, 0,\n                         voice_report_info->aud_pram);\n    }\n  } else {\n    TRACE_VOICE_RPT_I(\"[START_REQ][HANDLER] role is :%d\", report_role);\n  }\n#endif\n}\n\nbool app_ibrt_voice_report_is_me(uint32_t voice_chnlsel) {\n  bool is_me = true;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  switch ((AUDIO_CHANNEL_SELECT_E)p_ibrt_ctrl->audio_chnl_sel) {\n  case AUDIO_CHANNEL_SELECT_LCHNL:\n    if (IS_PROMPT_CHNLSEl_RCHNL(voice_chnlsel)) {\n      is_me = false;\n    }\n    break;\n  case AUDIO_CHANNEL_SELECT_RCHNL:\n    if (IS_PROMPT_CHNLSEl_LCHNL(voice_chnlsel)) {\n      is_me = false;\n    }\n    break;\n  default:\n    break;\n  }\n  return is_me;\n}\n#endif\n"
  },
  {
    "path": "services/app_tws/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s   := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.s))\nobj_c   := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.cpp))\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nobj-y :=  $(src_obj)\n\nsubdir-ccflags-y += \\\n    -Iapps/key \\\n    -Iplatform/hal \\\n    -Iplatform/drivers/bt \\\n    -Iservices/ble_stack/ble_ip \\\n    -Iservices/ble_stack/ke/api \\\n    -Iservices/ble_stack/hl/api \\\n    -Iservices/ble_stack/hl/inc \\\n    -Iservices/ble_stack/common/api \\\n    -Iservices/ai_voice/manager \\\n    -Iservices/app_ibrt/inc \\\n    -Iservices/app_tws/inc \\\n    -Iservices/ble_app/app_gfps \\\n    -Iservices/ble_app/app_main \\\n    -Iservices/ble_app/app_sec \\\n    -Iservices/bt_if_enhanced/inc \\\n    -Iservices/bt_app \\\n    -Iservices/bt_app/a2dp_codecs/include \\\n    -Iservices/multimedia/audio/codec/sbc/inc \\\n    -Iservices/ibrt_core/inc \\\n    -Iservices/ibrt_ui/inc \\\n    -Iservices/voicepath \\\n    -Iservices/voicepath/gsound/gsound_target_api_read_only \\\n    -Iservices/voicepath/gsound/gsound_custom/inc \\\n    -Iservices/voicepath/gsound/gsound_target \\\n    -Ithirdparty/userapi \\\n    -Iservices/app_ai/inc \\\n    -Iutils/cqueue \\\n    -Iservices/ota\\\n    -Iservices/ibrt_ota/inc \\\n\t-Iservices/ai_voice/protocol/gma/gma_manager\n"
  },
  {
    "path": "services/app_tws/inc/app_tws_if.h",
    "content": "/***************************************************************************\n *\n *Copyright 2015-2019 BES.\n *All rights reserved. All unpublished rights reserved.\n *\n *No part of this work may be used or reproduced in any form or by any\n *means, or stored in a database or retrieval system, without prior written\n *permission of BES.\n *\n *Use of this work is governed by a license granted by BES.\n *This work contains confidential and proprietary information of\n *BES. which is protected by copyright, trade secret,\n *trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __APP_TWS_IF_H__\n#define __APP_TWS_IF_H__\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*****************************header include********************************/\n\n/******************************macro defination*****************************/\n#define TWS_SYNC_BUF_SIZE 300\n\n/******************************type defination******************************/\ntypedef enum {\n  EAR_SIDE_UNKNOWN = 0,\n  EAR_SIDE_LEFT = 1,\n  EAR_SIDE_RIGHT = 2,\n  EAR_SIDE_NUM,\n} APP_TWS_SIDE_T;\n\nenum {\n  DISCONNECTED = 0,\n  CONNECTED = 1,\n\n  CONNECTION_STATE_NUM,\n};\n\ntypedef enum {\n  TWS_SYNC_USER_BLE_INFO = 0,\n  TWS_SYNC_USER_OTA = 1,\n  TWS_SYNC_USER_AI_CONNECTION = 2,\n  TWS_SYNC_USER_GFPS_INFO = 3,\n  TWS_SYNC_USER_AI_INFO = 4,\n  TWS_SYNC_USER_AI_MANAGER = 5,\n  TWS_SYNC_USER_DIP = 6,\n\n  TWS_SYNC_USER_NUM,\n} TWS_SYNC_USER_E;\n\ntypedef void (*TWS_SYNC_INFO_PREPARE_FUNC_T)(uint8_t *buf, uint16_t *len);\ntypedef void (*TWS_INFO_SYNC_FUNC_T)(uint8_t *buf, uint16_t len);\ntypedef struct {\n  TWS_SYNC_INFO_PREPARE_FUNC_T sync_info_prepare_handler;\n  TWS_INFO_SYNC_FUNC_T sync_info_received_handler;\n  TWS_SYNC_INFO_PREPARE_FUNC_T sync_info_prepare_rsp_handler;\n  TWS_INFO_SYNC_FUNC_T sync_info_rsp_received_handler;\n  TWS_INFO_SYNC_FUNC_T sync_info_rsp_timeout_handler;\n} TWS_SYNC_USER_T;\n\ntypedef struct {\n  TWS_SYNC_USER_T syncUser[TWS_SYNC_USER_NUM];\n} TWS_ENV_T;\n\ntypedef struct {\n  TWS_SYNC_USER_E userId;\n  uint8_t info[TWS_SYNC_BUF_SIZE - 1];\n} TWS_SYNC_DATA_T;\n\n/****************************function declearation**************************/\n/*---------------------------------------------------------------------------\n *            app_tws_if_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    initialize the tws interface related parameter\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_init(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_role_switch_started_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler for role switch started event of tws system\n *\n * Parameters:\n *    void\n *\n * Return:\n *    voide\n */\nvoid app_tws_if_role_switch_started_handler(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_tws_role_switch_complete_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    callback function of role switch complete event for tws system\n *    NOTE: tws system include relay_tws and IBRT\n *\n * Parameters:\n *    newRole - current role of device after role switch complete\n *\n * Return:\n *    void\n */\nvoid app_tws_if_tws_role_switch_complete_handler(uint8_t newRole);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_tws_role_updated_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    callback function of tws role updated event for tws system\n *    NOTE: tws system include relay_tws and IBRT\n *\n * Parameters:\n *    newRole - current role of device after role updated\n *\n * Return:\n *    void\n */\nvoid app_tws_if_tws_role_updated_handler(uint8_t newRole);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_sync_info_received_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler for tws common info received event\n *    NOTE: see @ to get more info for common info received\n *\n * Parameters:\n *    rsp_seq - sequence number of response\n *    p_buff - pointer for received data\n *    lenght - length of received data\n *\n * Return:\n *    void\n */\nvoid app_tws_if_sync_info_received_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                           uint16_t length);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_common_info_rsp_recieved_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    shared common info response received handler\n *\n * Parameters:\n *    rsp_seq - sequence number of response\n *    p_buff - pointer for received data\n *    lenght - length of received data\n *\n * Return:\n *    void\n */\nvoid app_tws_if_sync_info_rsp_received_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_sync_info_rsp_timeout_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    shared common info response timeout handler\n *\n * Parameters:\n *    rsp_seq - sequence number of response\n *    p_buff - pointer for received data\n *    lenght - length of received data\n *\n * Return:\n *    void\n */\nvoid app_tws_if_sync_info_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                              uint16_t length);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_mobile_connected_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler of tws connected with mobile phone\n *\n * Parameters:\n *    addr - connected mobile address\n *\n * Return:\n *    void\n */\nvoid app_tws_if_mobile_connected_handler(uint8_t *addr);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_mobile_disconnected_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler of tws disconnected with mobile phone\n *\n * Parameters:\n *    addr - disconnected mobile phone\n *\n * Return:\n *    void\n */\nvoid app_tws_if_mobile_disconnected_handler(uint8_t *addr);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_ibrt_connected_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler of ibrt connected\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_ibrt_connected_handler(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_ibrt_disconnected_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler of ibrt disconnected\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_ibrt_disconnected_handler(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_ble_connected_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler of ble connected event for tws system\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_ble_connected_handler(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_ble_disconnected_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    ble disconnected handler for tws system\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_ble_disconnected_handler(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_tws_connected_sync_info\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    sync BLE\\BISTO\\AI info after tws connected\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_tws_connected_sync_info(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_tws_connected_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler of tws connected event\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_tws_connected_handler(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_tws_disconnected_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handler of tws disconnected event\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_tws_disconnected_handler(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_trigger_role_switch\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    role switch trigger for tws system\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_trigger_role_switch(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_handle_click\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    handle the power key click event\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_handle_click(void);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_master_prepare_rs\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    master prepare for role switch for BISTO and AI\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_master_prepare_rs(uint8_t *p_buff, uint16_t length);\n\n#ifdef IBRT\n/*---------------------------------------------------------------------------\n *            app_tws_if_slave_continue_rs\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    slave continue role switch progress\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_tws_if_slave_continue_rs(uint8_t *p_buff, uint16_t length);\n#endif\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_register_sync_user\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    register info sync user for tws system\n *\n * Parameters:\n *    id - user ID, see @TWS_SYNC_USER_E\n *    user - user related functions\n *\n * Return:\n *    void\n */\nvoid app_tws_if_register_sync_user(uint8_t id, TWS_SYNC_USER_T *user);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_deregister_sync_user\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    deregister info sync user for tws system\n *\n * Parameters:\n *   id - id of user to deregister, see @TWS_SYNC_USER_E\n *\n * Return:\n *    void\n */\nvoid app_tws_if_deregister_sync_user(uint8_t id);\n\n/*---------------------------------------------------------------------------\n *            app_tws_if_sync_info\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    sync tws if\n *\n * Parameters:\n *    id - user ID\n *\n * Return:\n *    void\n */\nvoid app_tws_if_sync_info(TWS_SYNC_USER_E id);\n\nvoid app_tws_if_ai_send_cmd_to_peer(uint8_t *p_buff, uint16_t length);\nvoid app_tws_if_ai_rev_peer_cmd_hanlder(uint16_t rsp_seq, uint8_t *p_buff,\n                                        uint16_t length);\nvoid app_tws_if_ai_send_cmd_with_rsp_to_peer(uint8_t *p_buff, uint16_t length);\nvoid app_tws_if_ai_send_cmd_rsp_to_peer(uint8_t *p_buff, uint16_t rsp_seq,\n                                        uint16_t length);\nvoid app_tws_if_ai_rev_peer_cmd_with_rsp_hanlder(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length);\nvoid app_tws_if_ai_rev_cmd_rsp_from_peer_hanlder(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length);\nvoid app_tws_if_ai_rev_cmd_rsp_timeout_hanlder(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length);\n\n#ifdef GFPS_ENABLED\nvoid app_ibrt_share_fastpair_info(uint8_t *p_buff, uint16_t length);\nvoid app_tws_send_fastpair_info_to_slave(void);\nvoid app_ibrt_shared_fastpair_info_received_handler(uint16_t rsp_seq,\n                                                    uint8_t *p_buff,\n                                                    uint16_t length);\n#endif\n\nbool app_tws_is_master_mode(void);\nbool app_tws_is_slave_mode(void);\nbool app_tws_is_freeman_mode(void);\nvoid app_ibrt_sync_volume_info(void);\nbool app_tws_is_left_side(void);\nbool app_tws_is_right_side(void);\nbool app_tws_is_unknown_side(void);\nvoid app_tws_set_side_from_addr(uint8_t *addr);\nbool app_tws_nv_is_master_role(void);\nvoid app_tws_set_side_from_gpio(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __APP_TWS_IF_H__ */\n"
  },
  {
    "path": "services/app_tws/src/app_tws_if.cpp",
    "content": "/***************************************************************************\n *\n *Copyright 2015-2019 BES.\n *All rights reserved. All unpublished rights reserved.\n *\n *No part of this work may be used or reproduced in any form or by any\n *means, or stored in a database or retrieval system, without prior written\n *permission of BES.\n *\n *Use of this work is governed by a license granted by BES.\n *This work contains confidential and proprietary information of\n *BES. which is protected by copyright, trade secret,\n *trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*****************************header include********************************/\n#include \"app_tws_if.h\"\n#include \"app.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_ai_tws.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_stream.h\"\n#include \"app_dip.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_sec.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"besbt.h\"\n#include \"btapp.h\"\n#include \"cmsis.h\"\n#include \"hal_trace.h\"\n#include \"me_api.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_env.h\"\n#include \"nvrecord_extension.h\"\n#include \"tgt_hardware.h\"\n#ifdef __THIRDPARTY\n#include \"app_thirdparty.h\"\n#endif\n\n#ifdef IBRT\n#include \"app_ibrt_customif_cmd.h\"\n#include \"app_ibrt_customif_ui.h\"\n#include \"app_ibrt_if.h\"\n#endif\n\n#ifdef BLE_ENABLE\n#include \"app_ble_include.h\"\n#endif\n\n#ifdef OTA_ENABLED\n#include \"ota_common.h\"\n#endif\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom.h\"\n#include \"gsound_custom_tws.h\"\n#endif\n\n#ifdef __AI_VOICE__\n#include \"ai_thread.h\"\n#endif\n\n#ifdef IBRT_OTA\n#include \"ota_control.h\"\n#endif\n\n#ifdef IS_MULTI_AI_ENABLED\n#include \"ai_manager.h\"\n#endif\n\n#ifdef GFPS_ENABLED\n#include \"app_gfps.h\"\n#include \"nvrecord_fp_account_key.h\"\n#endif\n\n#ifdef __GMA_VOICE__\n#include \"app_gma_ota.h\"\n#endif\n\n/************************private macro defination***************************/\n\n/************************private struct defination****************************/\n\n/**********************private function declearation************************/\n\n/************************private variable defination************************/\nstatic TWS_ENV_T twsEnv;\nstatic TWS_SYNC_DATA_T twsSyncBuf;\n\nosMutexId twsSyncBufMutexId = NULL;\nosMutexDef(twsSyncBufMutex);\n\n#define POST_ROLESWITCH_STATE_STAYING_MS 15000\nosTimerId app_post_roleswitch_handling_timer_id = NULL;\nstatic int app_post_roleswitch_handling_timer_handler(void const *param);\nosTimerDef(APP_POST_ROLESWITCH_HANDLING_TIMER,\n           (void (*)(void const *))\n               app_post_roleswitch_handling_timer_handler); // define timers\n\n/****************************function defination****************************/\nextern int hfp_volume_get(enum BT_DEVICE_ID_T id);\nextern int a2dp_volume_get(enum BT_DEVICE_ID_T id);\nstatic const char *tws_sync_user2str(TWS_SYNC_USER_E user) {\n  const char *str = NULL;\n#define CASES(user)                                                            \\\n  case user:                                                                   \\\n    str = \"[\" #user \"]\";                                                       \\\n    break\n\n  switch (user) {\n    CASES(TWS_SYNC_USER_BLE_INFO);\n    CASES(TWS_SYNC_USER_OTA);\n    CASES(TWS_SYNC_USER_AI_CONNECTION);\n    CASES(TWS_SYNC_USER_GFPS_INFO);\n    CASES(TWS_SYNC_USER_AI_INFO);\n    CASES(TWS_SYNC_USER_AI_MANAGER);\n    CASES(TWS_SYNC_USER_DIP);\n\n  default:\n    str = \"[INVALID]\";\n    break;\n  }\n\n  return str;\n}\n\nvoid app_tws_if_init(void) {\n  // reset the environment\n  memset(&twsEnv, 0, sizeof(twsEnv));\n  memset(&twsSyncBuf, 0, TWS_SYNC_BUF_SIZE);\n\n  // init the tws sync buffer mutex\n  if (NULL == twsSyncBufMutexId) {\n    twsSyncBufMutexId = osMutexCreate(osMutex(twsSyncBufMutex));\n  }\n\n  // register all users\n#ifdef BLE_ENABLE\n  // init ble tws interface\n  app_ble_mode_tws_sync_init();\n#endif\n\n#ifdef OTA_ENABLED\n  ota_common_tws_sync_init();\n#endif\n\n#ifdef BISTO_ENABLED\n  // init gsound tws interface\n  app_ai_tws_gsound_sync_init();\n#endif\n\n#ifdef GFPS_ENABLED\n  app_gfps_tws_sync_init();\n#endif\n\n#ifdef __AI_VOICE__\n  app_ai_tws_sync_init();\n#endif\n\n#ifdef IS_MULTI_AI_ENABLED\n  ai_manager_sync_init();\n#endif\n\n#ifdef BTIF_DIP_DEVICE\n  app_dip_sync_init();\n#endif\n}\n\nvoid app_tws_if_role_switch_started_handler(void) {\n  TRACE(1, \"[%s]+++\", __func__);\n  if (NULL == app_post_roleswitch_handling_timer_id) {\n    app_post_roleswitch_handling_timer_id = osTimerCreate(\n        osTimer(APP_POST_ROLESWITCH_HANDLING_TIMER), osTimerOnce, NULL);\n  }\n\n  osTimerStop(app_post_roleswitch_handling_timer_id);\n\n  app_bt_active_mode_clear(ACTIVE_MODE_KEEPER_ROLE_SWITCH,\n                           UPDATE_ACTIVE_MODE_FOR_ALL_LINKS);\n\n  TRACE(1, \"[%s]---\", __func__);\n}\n\nstatic int app_post_roleswitch_handling_timer_handler(void const *param) {\n  app_bt_start_custom_function_in_bt_thread(ACTIVE_MODE_KEEPER_ROLE_SWITCH,\n                                            UPDATE_ACTIVE_MODE_FOR_ALL_LINKS,\n                                            (uint32_t)app_bt_active_mode_clear);\n  return 0;\n}\n\nstatic void app_tws_if_post_roleswitch_handler(void) {\n  if (NULL == app_post_roleswitch_handling_timer_id) {\n    app_post_roleswitch_handling_timer_id = osTimerCreate(\n        osTimer(APP_POST_ROLESWITCH_HANDLING_TIMER), osTimerOnce, NULL);\n  }\n\n  osTimerStart(app_post_roleswitch_handling_timer_id,\n               POST_ROLESWITCH_STATE_STAYING_MS);\n  // keep bt link in active mode right after role switch\n  app_bt_active_mode_set(ACTIVE_MODE_KEEPER_ROLE_SWITCH,\n                         UPDATE_ACTIVE_MODE_FOR_ALL_LINKS);\n}\n\nvoid app_tws_if_tws_role_switch_complete_handler(uint8_t newRole) {\n  TRACE(2, \"[%s]+++ role %d\", __func__, newRole);\n\n#ifdef BISTO_ENABLED\n  gsound_on_system_role_switch_done(newRole);\n#endif\n\n  // update BLE info saved in flash after role switch complete\n  nv_record_tws_exchange_ble_info();\n\n#ifdef BLE_USE_RPA\n  appm_refresh_ble_irk();\n#else\n  btif_me_set_ble_bd_address(bt_get_ble_local_address());\n#endif\n\n#ifdef __AI_VOICE__\n  app_ai_tws_role_switch_complete();\n#endif\n\n#ifdef BLE_ENABLE\n  ble_callback_evnet_t event;\n  event.evt_type = BLE_CALLBACK_RS_COMPLETE;\n  event.p.rs_complete_handled.newRole = newRole;\n  app_ble_core_global_callback_event(&event, NULL);\n#endif\n\n  app_tws_if_post_roleswitch_handler();\n\n  TRACE(1, \"[%s]---\", __func__);\n\n#ifdef IBRT_OTA\n  ota_control_send_role_switch_complete();\n#endif\n}\n\nvoid app_tws_if_register_sync_user(uint8_t id, TWS_SYNC_USER_T *user) {\n  memcpy(&twsEnv.syncUser[id], user, sizeof(TWS_SYNC_USER_T));\n}\n\nvoid app_tws_if_deregister_sync_user(uint8_t id) {\n  memset(&twsEnv.syncUser[id], 0, sizeof(TWS_SYNC_USER_T));\n}\n\nvoid app_tws_if_sync_info(TWS_SYNC_USER_E id) {\n  TRACE(1, \"[%s]+++\", __func__);\n  TRACE(1, \"user:%s\", tws_sync_user2str(id));\n\n  osMutexWait(twsSyncBufMutexId, osWaitForever);\n  if (twsEnv.syncUser[id].sync_info_prepare_handler) {\n    uint16_t length = 0;\n    twsEnv.syncUser[id].sync_info_prepare_handler(twsSyncBuf.info, &length);\n\n    if (length) {\n      twsSyncBuf.userId = id;\n      length++;\n\n      tws_ctrl_send_cmd(APP_TWS_CMD_SHARE_COMMON_INFO, (uint8_t *)&twsSyncBuf,\n                        length);\n    } else {\n      TRACE(0, \"no info to sync\");\n    }\n  } else {\n    TRACE(0, \"prepare handler is null pointer\");\n  }\n  osMutexRelease(twsSyncBufMutexId);\n\n  TRACE(1, \"[%s]---\", __func__);\n}\n\nvoid app_tws_if_sync_info_received_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                           uint16_t length) {\n  TRACE(1, \"[%s]+++\", __func__);\n\n  TWS_SYNC_DATA_T *pInfo = (TWS_SYNC_DATA_T *)p_buff;\n  TRACE(1, \"user:%s\", tws_sync_user2str(pInfo->userId));\n\n  // handle received data\n  if (twsEnv.syncUser[pInfo->userId].sync_info_received_handler) {\n    twsEnv.syncUser[pInfo->userId].sync_info_received_handler(pInfo->info,\n                                                              (length - 1));\n  }\n\n  // send response to peer device\n  uint16_t len = 0;\n  osMutexWait(twsSyncBufMutexId, osWaitForever);\n\n  if (twsEnv.syncUser[pInfo->userId].sync_info_prepare_rsp_handler) {\n    twsEnv.syncUser[pInfo->userId].sync_info_prepare_rsp_handler(\n        twsSyncBuf.info, &len);\n  }\n\n  twsSyncBuf.userId = pInfo->userId;\n  len++;\n\n  tws_ctrl_send_rsp(APP_TWS_CMD_SHARE_COMMON_INFO, rsp_seq,\n                    (uint8_t *)&twsSyncBuf, len);\n  osMutexRelease(twsSyncBufMutexId);\n\n  TRACE(1, \"[%s]---\", __func__);\n}\n\nvoid app_tws_if_sync_info_rsp_received_handler(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length) {\n  TRACE(1, \"[%s]+++\", __func__);\n\n  TWS_SYNC_DATA_T *pInfo = (TWS_SYNC_DATA_T *)p_buff;\n\n  // handle received data\n  if (twsEnv.syncUser[pInfo->userId].sync_info_rsp_received_handler) {\n    twsEnv.syncUser[pInfo->userId].sync_info_rsp_received_handler(pInfo->info,\n                                                                  (length - 1));\n  }\n\n  TRACE(1, \"[%s]---\", __func__);\n}\n\nvoid app_tws_if_sync_info_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                              uint16_t length) {\n  TRACE(1, \"[%s]+++\", __func__);\n\n  TWS_SYNC_DATA_T *pInfo = (TWS_SYNC_DATA_T *)p_buff;\n\n  if (twsEnv.syncUser[pInfo->userId].sync_info_rsp_timeout_handler) {\n    twsEnv.syncUser[pInfo->userId].sync_info_rsp_timeout_handler(pInfo->info,\n                                                                 (length - 1));\n  }\n\n  TRACE(1, \"[%s]---\", __func__);\n}\n\nvoid app_tws_if_tws_role_updated_handler(uint8_t newRole) {\n#ifdef BLE_ENABLE\n  ble_callback_evnet_t event;\n  event.evt_type = BLE_CALLBACK_ROLE_UPDATE;\n  event.p.role_update_handled.newRole = newRole;\n  app_ble_core_global_callback_event(&event, NULL);\n#endif\n\n#if defined(BISTO_ENABLED) && defined(IBRT)\n  gsound_on_tws_role_updated(newRole);\n#endif\n}\n\nvoid app_tws_if_tws_connected_sync_info(void) {\n  TRACE(2, \"[%s]+++ role %d\", __func__, app_tws_ibrt_role_get_callback(NULL));\n\n  if (IBRT_MASTER == app_tws_ibrt_role_get_callback(NULL)) {\n    // inform peer to update the common info\n    app_tws_if_sync_info(TWS_SYNC_USER_BLE_INFO);\n    app_tws_if_sync_info(TWS_SYNC_USER_OTA);\n    // app_tws_if_sync_info(TWS_SYNC_USER_AI_CONNECTION);\n    app_tws_if_sync_info(TWS_SYNC_USER_GFPS_INFO);\n    app_tws_if_sync_info(TWS_SYNC_USER_AI_INFO);\n    app_tws_if_sync_info(TWS_SYNC_USER_AI_MANAGER);\n    app_tws_if_sync_info(TWS_SYNC_USER_DIP);\n\n#ifdef GFPS_ENABLED\n    if (!app_tws_ibrt_mobile_link_connected()) {\n      app_enter_fastpairing_mode();\n    }\n#endif\n  }\n\n  TRACE(1, \"[%s]---\", __func__);\n}\n\nvoid app_tws_if_tws_connected_handler(void) {\n  TRACE(1, \"twsif_tws_connected, role %d\",\n        app_tws_ibrt_role_get_callback(NULL));\n}\n\nvoid app_tws_if_tws_disconnected_handler(void) {\n  TRACE(0, \"twsif_tws_disconnected.\");\n\n#ifdef IBRT\n  if (IBRT_SLAVE == app_tws_ibrt_role_get_callback(NULL)) {\n#ifdef BISTO_ENABLED\n    gsound_set_ble_connect_state(GSOUND_CHANNEL_AUDIO, false);\n    gsound_set_ble_connect_state(GSOUND_CHANNEL_CONTROL, false);\n#endif\n  }\n#ifdef __GMA_VOICE__\n  app_gma_ota_exception_reboot(); // shuailong\n#endif\n#endif\n}\n\nvoid app_tws_if_mobile_connected_handler(uint8_t *addr) {\n  TRACE(0, \"twsif_mobile_connected\");\n\n#ifdef IBRT\n  if (IBRT_MASTER == app_tws_ibrt_role_get_callback(NULL))\n#endif\n  {\n    // inform peer to update the common info\n    // app_tws_if_sync_info(TWS_SYNC_USER_AI_CONNECTION);\n    app_tws_if_sync_info(TWS_SYNC_USER_GFPS_INFO);\n  }\n}\n\nvoid app_tws_if_mobile_disconnected_handler(uint8_t *addr) {\n  TRACE(0, \"twsif_mobile_disconnected\");\n}\n\nvoid app_tws_if_ibrt_connected_handler(void) {\n  TRACE(0, \"twsif_ibrt_connected\");\n\n#ifdef IBRT\n  if (IBRT_MASTER == app_tws_ibrt_role_get_callback(NULL))\n#endif\n  {\n    // inform peer to update the common info\n    app_tws_if_sync_info(TWS_SYNC_USER_AI_INFO);\n    app_tws_if_sync_info(TWS_SYNC_USER_AI_MANAGER);\n  }\n}\n\nvoid app_tws_if_ibrt_disconnected_handler(void) {\n  TRACE(0, \"twsif_ibrt_disconnected\");\n}\n\nvoid app_tws_if_ble_connected_handler(void) {\n  TRACE(0, \"twsif_ble_connected\");\n\n#ifdef IBRT\n  if (IBRT_MASTER == app_tws_ibrt_role_get_callback(NULL))\n#endif\n  {\n    // inform peer to update the common info\n    // app_tws_if_sync_info(TWS_SYNC_USER_BLE_INFO);\n    app_tws_if_sync_info(TWS_SYNC_USER_OTA);\n    // app_tws_if_sync_info(TWS_SYNC_USER_AI_CONNECTION);\n    app_tws_if_sync_info(TWS_SYNC_USER_GFPS_INFO);\n  }\n}\n\nvoid app_tws_if_ble_disconnected_handler(void) {\n  TRACE(0, \"twsif_ble_disconnected\");\n\n#ifdef IBRT\n  if (IBRT_MASTER == app_tws_ibrt_role_get_callback(NULL))\n#endif\n  {\n    // inform peer to update the common info\n    // app_tws_if_sync_info(TWS_SYNC_USER_AI_CONNECTION);\n  }\n}\n\nvoid app_tws_if_trigger_role_switch(void) {\n  if (false == app_ibrt_ui_can_tws_switch()) {\n    TRACE(1, \"%s can't switch\", __func__);\n    return;\n  }\n\n  app_ibrt_customif_ui_tws_switch();\n}\n\nvoid app_tws_if_handle_click(void) {\n  TRACE(1, \"%s\", __func__);\n\n#if defined(BISTO_ENABLED) || defined(__AI_VOICE__)\n  app_tws_if_trigger_role_switch();\n#else\n  bt_key_handle_func_click();\n#endif\n}\n\n#ifdef IBRT\nvoid app_tws_if_ai_send_cmd_to_peer(uint8_t *p_buff, uint16_t length) {\n  TRACE(1, \"[%s]\", __func__);\n\n  tws_ctrl_send_cmd(APP_TWS_CMD_AI_SEND_CMD_TO_PEER, p_buff, length);\n}\n\nvoid app_tws_if_ai_rev_peer_cmd_hanlder(uint16_t rsp_seq, uint8_t *p_buff,\n                                        uint16_t length) {\n  TRACE(1, \"[%s]\", __func__);\n\n#ifdef __AI_VOICE__\n  app_ai_tws_rev_peer_cmd_hanlder(rsp_seq, p_buff, length);\n#endif\n}\n\nvoid app_tws_if_ai_send_cmd_with_rsp_to_peer(uint8_t *p_buff, uint16_t length) {\n  TRACE(1, \"[%s]\", __func__);\n\n  tws_ctrl_send_cmd(APP_TWS_CMD_AI_SEND_CMD_TO_PEER_WITH_RSP, p_buff, length);\n}\n\nvoid app_tws_if_ai_send_cmd_rsp_to_peer(uint8_t *p_buff, uint16_t rsp_seq,\n                                        uint16_t length) {\n  TRACE(1, \"[%s]\", __func__);\n\n  tws_ctrl_send_rsp(APP_TWS_CMD_AI_SEND_CMD_TO_PEER_WITH_RSP, rsp_seq, p_buff,\n                    length);\n}\n\nvoid app_tws_if_ai_rev_peer_cmd_with_rsp_hanlder(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length) {\n  TRACE(1, \"[%s]\", __func__);\n\n#ifdef __AI_VOICE__\n  app_ai_tws_rev_peer_cmd_with_rsp_hanlder(rsp_seq, p_buff, length);\n#endif\n}\n\nvoid app_tws_if_ai_rev_cmd_rsp_from_peer_hanlder(uint16_t rsp_seq,\n                                                 uint8_t *p_buff,\n                                                 uint16_t length) {\n  TRACE(1, \"[%s]\", __func__);\n\n#ifdef __AI_VOICE__\n  app_ai_tws_rev_cmd_rsp_from_peer_hanlder(rsp_seq, p_buff, length);\n#endif\n}\n\nvoid app_tws_if_ai_rev_cmd_rsp_timeout_hanlder(uint16_t rsp_seq,\n                                               uint8_t *p_buff,\n                                               uint16_t length) {\n  TRACE(1, \"[%s]\", __func__);\n\n#ifdef __AI_VOICE__\n  app_ai_tws_rev_cmd_rsp_timeout_hanlder(rsp_seq, p_buff, length);\n#endif\n}\n\nvoid app_tws_if_master_prepare_rs(uint8_t *p_buff, uint16_t length) {\n#ifdef BLE_ENABLE\n  ble_callback_evnet_t event;\n  event.evt_type = BLE_CALLBACK_RS_START;\n  app_ble_core_global_callback_event(&event, NULL);\n#endif\n#ifdef BISTO_ENABLED\n  if (*p_buff == AI_SPEC_GSOUND) {\n    gsound_tws_update_roleswitch_initiator(IBRT_SLAVE);\n    gsound_tws_request_roleswitch();\n  }\n#endif\n#ifdef __AI_VOICE__\n  if (*p_buff != AI_SPEC_GSOUND) {\n    app_ai_tws_master_role_switch_prepare();\n  }\n#endif\n}\n\nvoid app_tws_if_slave_continue_rs(uint8_t *p_buff, uint16_t length) {\n  TRACE(2, \"%s len %d\", __func__, length);\n  DUMP8(\"%x \", p_buff, length);\n\n#ifdef __AI_VOICE__\n  if (*p_buff != AI_SPEC_GSOUND) {\n    app_ai_tws_role_switch_prepare_done();\n  } else\n#endif\n  {\n    app_ibrt_if_tws_switch_prepare_done_in_bt_thread(IBRT_ROLE_SWITCH_USER_AI,\n                                                     (uint32_t)*p_buff);\n  }\n}\n#endif\n\n#if defined(GFPS_ENABLED) && defined(IBRT)\nvoid app_ibrt_share_fastpair_info(uint8_t *p_buff, uint16_t length) {\n  app_ibrt_send_cmd_without_rsp(APP_TWS_CMD_SHARE_FASTPAIR_INFO, p_buff,\n                                length);\n}\n\nvoid app_tws_send_fastpair_info_to_slave(void) {\n  TRACE(0, \"Send fastpair info to secondary device.\");\n  NV_FP_ACCOUNT_KEY_RECORD_T *pFpData = nv_record_get_fp_data_structure_info();\n  app_ibrt_share_fastpair_info((uint8_t *)pFpData,\n                               sizeof(NV_FP_ACCOUNT_KEY_RECORD_T));\n}\n\nvoid app_ibrt_shared_fastpair_info_received_handler(uint16_t rsp_seq,\n                                                    uint8_t *p_buff,\n                                                    uint16_t length) {\n  NV_FP_ACCOUNT_KEY_RECORD_T *pFpData = (NV_FP_ACCOUNT_KEY_RECORD_T *)p_buff;\n  nv_record_update_fp_data_structure(pFpData);\n}\n#endif\n\n#ifdef IBRT\nbool app_tws_is_master_mode(void) {\n  return (IBRT_MASTER == app_tws_ibrt_role_get_callback(NULL)) ? true : false;\n}\n\nbool app_tws_is_slave_mode(void) {\n  return (IBRT_SLAVE == app_tws_ibrt_role_get_callback(NULL)) ? true : false;\n}\n\nbool app_tws_is_freeman_mode(void) {\n  return (IBRT_UNKNOW == app_tws_ibrt_role_get_callback(NULL)) ? true : false;\n}\n\nbool app_tws_nv_is_master_role(void) {\n  TRACE(1, \"[ZYH]%s -> %d\", __func__, app_tws_ibrt_nv_role_get_callback(NULL));\n  return (IBRT_MASTER == app_tws_ibrt_nv_role_get_callback(NULL)) ? true\n                                                                  : false;\n}\n\nvoid app_ibrt_sync_volume_info(void) {\n  if (app_tws_ibrt_tws_link_connected()) {\n    ibrt_volume_info_t ibrt_volume_req;\n    ibrt_volume_req.a2dp_volume = a2dp_volume_get(BT_DEVICE_ID_1);\n    ibrt_volume_req.hfp_volume = hfp_volume_get(BT_DEVICE_ID_1);\n    tws_ctrl_send_cmd(APP_TWS_CMD_SYNC_VOLUME_INFO, (uint8_t *)&ibrt_volume_req,\n                      sizeof(ibrt_volume_req));\n  }\n}\n\nstatic APP_TWS_SIDE_T app_tws_side = EAR_SIDE_UNKNOWN;\n\nvoid app_tws_set_side(APP_TWS_SIDE_T side) {\n  ASSERT((EAR_SIDE_LEFT == side) || (EAR_SIDE_RIGHT == side),\n         \"Error: setting invalid side\");\n  TRACE(1, \"Set TWS side to %d\", side);\n  app_tws_side = side;\n}\n\nbool app_tws_is_left_side(void) { return (app_tws_side == EAR_SIDE_LEFT); }\n\nbool app_tws_is_right_side(void) { return (app_tws_side == EAR_SIDE_RIGHT); }\n\nbool app_tws_is_unknown_side(void) {\n  return (app_tws_side == EAR_SIDE_UNKNOWN);\n}\n\n// void app_tws_set_side_from_addr(uint8_t *addr)\n// {\n//     ASSERT(addr, \"Error: address invalid\");\n//     if (addr[0] & 0x1) {\n//         app_tws_set_side(EAR_SIDE_RIGHT);\n//         TRACE(0, \"Right earbud\");\n//     } else {\n//         app_tws_set_side(EAR_SIDE_LEFT);\n//         TRACE(0, \"Left earbud\");\n//     }\n// }\n\nvoid app_tws_set_side_from_gpio(void) {\n  if (tgt_tws_get_channel_is_right()) {\n    app_tws_set_side(EAR_SIDE_RIGHT);\n  } else {\n    app_tws_set_side(EAR_SIDE_LEFT);\n  }\n}\n#endif\n"
  },
  {
    "path": "services/audio_dump/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-Iservices/tota \\\n\t-Iservices/audio_dump/include\n\n"
  },
  {
    "path": "services/audio_dump/include/audio_dump.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AUDIO_DUMP_H__\n#define __AUDIO_DUMP_H__\n#include \n#include \n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef AUDIO_DEBUG\n#define AUDIO_DUMP\n#endif\n\nvoid audio_dump_init(int frame_len, int sample_bytes, int channel_num);\nvoid audio_dump_deinit(void);\nvoid audio_dump_clear_up(void);\nvoid audio_dump_add_channel_data_from_multi_channels(int channel_id,\n                                                     void *pcm_buf, int pcm_len,\n                                                     int channel_num,\n                                                     int channel_index);\nvoid audio_dump_add_channel_data(int channel_id, void *pcm_buf, int pcm_len);\nvoid audio_dump_run(void);\n\nvoid data_dump_init(void);\nvoid data_dump_deinit(void);\nvoid data_dump_run(const char *str, void *data_buf, uint32_t data_len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/audio_dump/src/audio_dump.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"audio_dump.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n\n#ifdef AUDIO_DEBUG_V0_1_0\n\n// #define DATA_DUMP_TOTA\n// #define DUMP_PLC_ENABLE\n\n#ifdef DATA_DUMP_TOTA\n#include \"app_tota_audio_dump.h\"\n#endif\n\n#ifdef AUDIO_DUMP\n#define AUDIO_DUMP_HEAD_STR (\"[audio dump]\")\n#define AUDIO_DUMP_HEAD_LEN (sizeof(AUDIO_DUMP_HEAD_STR) - 1)\n#define AUDIO_DUMP_INDEX_LEN (4)\n#define AUDIO_DUMP_CRC_LEN (4)\n#define AUDIO_DUMP_DATA_LEN (4)\n#define AUDIO_DUMP_MAX_SAMPLE_BYTES (sizeof(int))\n#define AUDIO_DUMP_MAX_FRAME_LEN (512)\n#define AUDIO_DUMP_MAX_CHANNEL_NUM (8)\n#define AUDIO_DUMP_MAX_DATA_SIZE                                               \\\n  (AUDIO_DUMP_MAX_FRAME_LEN * AUDIO_DUMP_MAX_CHANNEL_NUM *                     \\\n   AUDIO_DUMP_MAX_SAMPLE_BYTES / sizeof(char))\n#define AUDIO_DUMP_BUFFER_SIZE                                                 \\\n  (AUDIO_DUMP_HEAD_LEN + AUDIO_DUMP_INDEX_LEN + AUDIO_DUMP_CRC_LEN +           \\\n   AUDIO_DUMP_DATA_LEN + AUDIO_DUMP_MAX_DATA_SIZE)\n\nstatic int audio_dump_index = 0;\nstatic int audio_dump_crc = 0;\nstatic int audio_dump_frame_len = 256;\nstatic int audio_dump_sample_bytes = sizeof(short) / sizeof(char);\nstatic int audio_dump_channel_num = 2;\nstatic int audio_dump_data_size = 0;\nstatic int audio_dump_buf_size = 0;\nstatic char *audio_dump_data_ptr = NULL;\nstatic char audio_dump_buf[AUDIO_DUMP_BUFFER_SIZE];\n#endif\n\nvoid audio_dump_clear_up(void) {\n#ifdef AUDIO_DUMP\n  memset(audio_dump_data_ptr, 0, audio_dump_data_size);\n#endif\n}\n\nvoid audio_dump_init(int frame_len, int sample_bytes, int channel_num) {\n#ifdef AUDIO_DUMP\n  ASSERT(frame_len <= AUDIO_DUMP_MAX_FRAME_LEN, \"[%s] frame_len(%d) is invalid\",\n         __func__, frame_len);\n  ASSERT(sample_bytes <= AUDIO_DUMP_MAX_SAMPLE_BYTES,\n         \"[%s] sample_bytes(%d) is invalid\", __func__, sample_bytes);\n  ASSERT(channel_num <= AUDIO_DUMP_MAX_CHANNEL_NUM,\n         \"[%s] channel_num(%d) is invalid\", __func__, channel_num);\n\n  char *buf_ptr = audio_dump_buf;\n  audio_dump_index = 0;\n  audio_dump_crc = 0;\n  audio_dump_frame_len = frame_len;\n  audio_dump_sample_bytes = sample_bytes / sizeof(char);\n  audio_dump_channel_num = channel_num;\n\n  memcpy(buf_ptr, AUDIO_DUMP_HEAD_STR, AUDIO_DUMP_HEAD_LEN);\n\n#ifdef DUMP_PLC_ENABLE\n  buf_ptr += AUDIO_DUMP_HEAD_LEN + AUDIO_DUMP_INDEX_LEN + AUDIO_DUMP_CRC_LEN;\n#else\n  buf_ptr += AUDIO_DUMP_HEAD_LEN;\n#endif\n\n  int *data_len = (int *)buf_ptr;\n  *data_len = frame_len * channel_num * audio_dump_sample_bytes;\n  audio_dump_data_size = *data_len;\n#ifdef DUMP_PLC_ENABLE\n  audio_dump_buf_size = AUDIO_DUMP_HEAD_LEN + AUDIO_DUMP_INDEX_LEN +\n                        AUDIO_DUMP_CRC_LEN + AUDIO_DUMP_DATA_LEN +\n                        audio_dump_data_size;\n#else\n  audio_dump_buf_size =\n      AUDIO_DUMP_HEAD_LEN + AUDIO_DUMP_DATA_LEN + audio_dump_data_size;\n#endif\n\n  buf_ptr += AUDIO_DUMP_DATA_LEN;\n\n  audio_dump_data_ptr = buf_ptr;\n\n  audio_dump_clear_up();\n#endif\n}\n\nvoid audio_dump_deinit(void) { ; }\n\nvoid audio_dump_add_channel_data_from_multi_channels(int channel_id,\n                                                     void *pcm_buf, int pcm_len,\n                                                     int channel_num,\n                                                     int channel_index) {\n#ifdef AUDIO_DUMP\n  ASSERT(audio_dump_frame_len >= pcm_len, \"[%s] frame_len(%d) < pcm_len(%d)\",\n         __func__, audio_dump_frame_len, pcm_len);\n\n  if (channel_id >= audio_dump_channel_num) {\n    return;\n  }\n\n  if (audio_dump_sample_bytes == sizeof(short)) {\n    short *_pcm_buf = (short *)pcm_buf;\n    short *_dump_buf = (short *)audio_dump_data_ptr;\n\n    for (int i = 0; i < pcm_len; i++) {\n      _dump_buf[audio_dump_channel_num * i + channel_id] =\n          _pcm_buf[i * channel_num + channel_index];\n    }\n  } else if (audio_dump_sample_bytes == sizeof(int)) {\n    int *_pcm_buf = (int *)pcm_buf;\n    int *_dump_buf = (int *)audio_dump_data_ptr;\n\n    for (int i = 0; i < pcm_len; i++) {\n      _dump_buf[audio_dump_channel_num * i + channel_id] =\n          _pcm_buf[i * channel_num + channel_index];\n    }\n  } else {\n    ASSERT(0, \"[%s] audio_dump_sample_bytes(%d) is invalid\", __func__,\n           audio_dump_sample_bytes);\n  }\n#endif\n}\n\nvoid audio_dump_add_channel_data(int channel_id, void *pcm_buf, int pcm_len) {\n  audio_dump_add_channel_data_from_multi_channels(channel_id, pcm_buf, pcm_len,\n                                                  1, 0);\n}\n\n#ifdef DUMP_PLC_ENABLE\nstatic void audio_debug_add_index(void) {\n  int *index_ptr = (int *)(audio_dump_buf + AUDIO_DUMP_HEAD_LEN);\n\n  *index_ptr = audio_dump_index;\n}\n\n// unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned int\n// len)\n// {\n//     unsigned long c;\n\n//     c = crc ^ 0xffffffffL;\n\n//     while (len)\n//     {\n//         c = crc_table[(c ^ (*buf++)) & 0xff] ^ (c >> 8);\n//         len--;\n//     }\n\n//     return c ^ 0xffffffffL;\n// }\n\nstatic void audio_debug_add_crc(void) {\n  int *crc_ptr =\n      (int *)(audio_dump_buf + AUDIO_DUMP_HEAD_LEN + AUDIO_DUMP_CRC_LEN);\n\n  *crc_ptr = 0;\n}\n#endif\n\nvoid audio_dump_run(void) {\n#ifdef AUDIO_DUMP\n#ifdef DATA_DUMP_TOTA\n  int offset = AUDIO_DUMP_HEAD_LEN + AUDIO_DUMP_DATA_LEN;\n\n#ifdef DUMP_PLC_ENABLE\n  offset += AUDIO_DUMP_INDEX_LEN + AUDIO_DUMP_CRC_LEN;\n#endif\n\n  app_tota_audio_dump_send((uint8_t *)&audio_dump_buf[offset],\n                           audio_dump_buf_size - offset);\n#else\n#ifdef DUMP_PLC_ENABLE\n  audio_debug_add_index();\n  audio_debug_add_crc();\n  audio_dump_index++;\n\n  // if (audio_dump_index % 20 == 0)\n  // {\n  //     audio_dump_index++;\n  // }\n#endif\n  AUDIO_DEBUG_DUMP((const unsigned char *)audio_dump_buf, audio_dump_buf_size);\n#endif\n#endif\n}\n\n#ifdef AUDIO_DUMP\n// Make sure DATA_DUMP_BUF_SIZE < TRACE_BUF_SIZE\n#define DATA_DUMP_BUF_SIZE (1024 * 6)\nstatic uint8_t data_dump_buf[DATA_DUMP_BUF_SIZE];\n\nstatic int data_dump_index = 0;\n#endif\n\nvoid data_dump_init(void) {\n#ifdef AUDIO_DUMP\n  data_dump_index = 0;\n#endif\n}\n\nvoid data_dump_deinit(void) { ; }\n\nvoid data_dump_run(const char *str, void *data_buf, uint32_t data_len) {\n#ifdef AUDIO_DUMP\n  uint8_t *buf_ptr = data_dump_buf;\n  uint32_t len = 0;\n\n  // head\n  memcpy(buf_ptr + len, str, strlen(str));\n  len += strlen(str);\n\n#ifdef DUMP_PLC_ENABLE\n  int32_t *int_ptr = NULL;\n\n  // index\n  int_ptr = (int32_t *)(buf_ptr + len);\n  *int_ptr = data_dump_index;\n  len += sizeof(int32_t);\n\n  // crc\n  int_ptr = (int32_t *)(buf_ptr + len);\n  *int_ptr = 0;\n  len += sizeof(int32_t);\n\n  data_dump_index++;\n\n  // if (data_dump_index % 20 == 0)\n  // {\n  //     data_dump_index++;\n  // }\n#endif\n\n  // length\n  memcpy(buf_ptr + len, &data_len, sizeof(uint32_t));\n  len += sizeof(uint32_t);\n\n  // data\n  memcpy(buf_ptr + len, (uint8_t *)data_buf, data_len);\n  len += data_len;\n\n  ASSERT(len < DATA_DUMP_BUF_SIZE, \"[%s] len(%d) > DATA_DUMP_BUF_SIZE\",\n         __func__, len);\n\n  // TRACE(5,\"[%s] %d, %d, %d, %d\", __func__, strlen(str), sizeof(uint32_t),\n  // data_len, len);\n  AUDIO_DEBUG_DUMP(buf_ptr, len);\n#endif\n}\n#else // AUDIO_DEBUG\nvoid audio_dump_clear_up(void) { ; }\nvoid audio_dump_init(int frame_len, int sample_bytes, int channel_num) { ; }\nvoid audio_dump_deinit(void) { ; }\nvoid audio_dump_add_channel_data_from_multi_channels(int channel_id,\n                                                     void *pcm_buf, int pcm_len,\n                                                     int channel_num,\n                                                     int channel_index) {\n  ;\n}\nvoid audio_dump_add_channel_data(int channel_id, void *pcm_buf, int pcm_len) {\n  ;\n}\nvoid audio_dump_run(void) { ; }\nvoid data_dump_init(void) { ; }\nvoid data_dump_deinit(void) { ; }\nvoid data_dump_run(const char *str, void *data_buf, uint32_t data_len) { ; }\n#endif\n"
  },
  {
    "path": "services/audio_process/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/audio/process/common/include \\\n\t-Iservices/multimedia/audio/process/drc/include \\\n\t-Iservices/multimedia/audio/process/limiter/include \\\n\t-Iservices/multimedia/speech/inc \\\n\t-Iservices/nv_section/aud_section \\\n\t-Iservices/nv_section/include \\\n\t-Iutils/heap/\n\nifeq ($(HW_FIR_EQ_PROCESS),1)\nccflags-y += -D__HW_FIR_EQ_PROCESS__\nendif\n\nifeq ($(HW_IIR_EQ_PROCESS),1)\nccflags-y += -D__HW_IIR_EQ_PROCESS__\nendif\n\nifeq ($(SW_IIR_EQ_PROCESS),1)\nccflags-y += -D__SW_IIR_EQ_PROCESS__\nendif\n\nifeq ($(AUDIO_DRC),1)\nccflags-y += -D__AUDIO_DRC__\nendif\n\nifeq ($(AUDIO_DRC2),1)\nccflags-y += -D__AUDIO_DRC2__\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\nccflags-y += -D__AUDIO_RESAMPLE__\nendif\n\nifeq ($(HW_DAC_IIR_EQ_PROCESS),1)\nccflags-y += -D__HW_DAC_IIR_EQ_PROCESS__\nifneq ($(filter best2300p best1400 best3001 best2300 best2000 best1000,$(CHIP)),)\nifneq ($(CHIP_SUBTYPE),best1402)\nifeq ($(ANC_APP),1)\n$(error \"error: ANC and Hardware codec iir can't be used in the same\")\nendif\nendif\nendif\nendif\n\nifeq ($(FIR_HIGHSPEED),1)\nccflags-y += -DFIR_HIGHSPEED\nendif\n\nifeq ($(PC_CMD_UART),1)\nCFLAGS_audio_process.o += -D__PC_CMD_UART__\nendif\n\nifeq ($(USB_AUDIO_APP), 1)\nCFLAGS_audio_process.o += -DUSB_AUDIO_APP\nendif\n\nifeq ($(SPEECH_LIB),1)\nCFLAGS_audio_spectrum.o += -DSPEECH_LIB\nendif\n\nifeq ($(USB_EQ_TUNING), 1)\nccflags-y += -DUSB_EQ_TUNING\nendif\n\nCFLAGS_audio_spectrum.o += -DUSE_MED_MALLOC\n"
  },
  {
    "path": "services/audio_process/audio_cfg.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"audio_cfg.h\"\n#include \"aud_section.h\"\n#include \"drc.h\"\n#include \"hal_trace.h\"\n#include \"iir_process.h\"\n#include \"limiter.h\"\n#include \"string.h\"\n\n#define TOOL_SUPPORT_MAX_IIR_EQ_BAND_NUM (20)\n\nstruct AUDIO_CFG_T_ {\n  IIR_CFG_T iir_eq; // Now just support one type\n  IIR_PARAM_T reserved[TOOL_SUPPORT_MAX_IIR_EQ_BAND_NUM - IIR_PARAM_NUM];\n  DrcConfig drc;\n  LimiterConfig limiter;\n};\n\ntypedef struct {\n  uint8_t reserved[AUDIO_SECTION_CFG_RESERVED_LEN];\n  AUDIO_CFG_T cfg;\n} AUDIO_SECTION_AUDIO_CFG_T;\n\nstatic AUDIO_SECTION_AUDIO_CFG_T audio_section_audio_cfg;\n\n// Can not use sizeof(AUDIO_CFG_T), so define this function\nint sizeof_audio_cfg(void) { return sizeof(AUDIO_CFG_T); }\n\nint store_audio_cfg_into_audio_section(AUDIO_CFG_T *cfg) {\n  int res = 0;\n\n  memcpy(&audio_section_audio_cfg.cfg, cfg, sizeof(AUDIO_CFG_T));\n\n  res = audio_section_store_cfg(AUDIO_SECTION_DEVICE_AUDIO,\n                                (uint8_t *)&audio_section_audio_cfg,\n                                sizeof(AUDIO_SECTION_AUDIO_CFG_T));\n\n  if (res) {\n    TRACE(2, \"[%s] ERROR: res = %d\", __func__, res);\n  } else {\n    TRACE(1, \"[%s] Store audio cfg into audio section!!!\", __func__);\n  }\n\n  return res;\n}\n\nvoid *load_audio_cfg_from_audio_section(enum AUDIO_PROCESS_TYPE_T type) {\n  ASSERT(type < AUDIO_PROCESS_TYPE_NUM, \"[%s] type(%d) is invalid\", __func__,\n         type);\n  int res = 0;\n  res = audio_section_load_cfg(AUDIO_SECTION_DEVICE_AUDIO,\n                               (uint8_t *)&audio_section_audio_cfg,\n                               sizeof(AUDIO_SECTION_AUDIO_CFG_T));\n\n  void *res_ptr = NULL;\n\n  if (res) {\n    TRACE(2, \"[%s] ERROR: res = %d\", __func__, res);\n    res_ptr = NULL;\n  } else {\n    if (type == AUDIO_PROCESS_TYPE_IIR_EQ) {\n      TRACE(1, \"[%s] Load iir_eq from audio section!!!\", __func__);\n      res_ptr = (void *)&audio_section_audio_cfg.cfg.iir_eq;\n    } else if (type == AUDIO_PROCESS_TYPE_DRC) {\n      TRACE(1, \"[%s] Load drc from audio section!!!\", __func__);\n      res_ptr = (void *)&audio_section_audio_cfg.cfg.drc;\n    } else if (type == AUDIO_PROCESS_TYPE_LIMITER) {\n      TRACE(1, \"[%s] Load limiter from audio section!!!\", __func__);\n      res_ptr = (void *)&audio_section_audio_cfg.cfg.limiter;\n    } else {\n      TRACE(2, \"[%s] ERROR: Invalid type(%d)\", __func__, type);\n      res_ptr = NULL;\n    }\n  }\n\n  return res_ptr;\n}\n"
  },
  {
    "path": "services/audio_process/audio_cfg.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AUDIO_CFG_H__\n#define __AUDIO_CFG_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n\nenum AUDIO_PROCESS_TYPE_T {\n    AUDIO_PROCESS_TYPE_IIR_EQ = 0,\n    AUDIO_PROCESS_TYPE_DRC,\n    AUDIO_PROCESS_TYPE_LIMITER,\n    AUDIO_PROCESS_TYPE_NUM,\n};\n\nstruct AUDIO_CFG_T_;\ntypedef struct AUDIO_CFG_T_ AUDIO_CFG_T;\n\nint sizeof_audio_cfg(void);\nint store_audio_cfg_into_audio_section(AUDIO_CFG_T *cfg);\nvoid *load_audio_cfg_from_audio_section(enum AUDIO_PROCESS_TYPE_T type);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/audio_process/audio_process.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/*******************************************************************************\n** namer    : Audio Process\n** description  : Manage auido process algorithms, include :hw iir eq, sw iir\n*eq,\n**                  hw fir eq, drc...\n** version  : V1.0\n** author   : Yunjie Huo\n** modify   : 2018.12.4\n** todo     : NULL\n** MIPS     :   NO PROCESS: 34M(TWS, one ear, Mono, AAC, 48k)\n**              DRC1: 36M(3 bands)\n**              DRC2: 12M\n*******************************************************************************/\n/*\nAudio Flow:\n    DECODE --> SW IIR EQ --> DRC --> LIMTER --> VOLUME --> HW IIR EQ --> SPK\n\n                                                       +-----------------------------+\n                                                       |             DAC | | |\n+--------+     +-----------+    +-----+    +--------+  | +--------+\n+-----------+ |  +-----+ |        | PCM |           |    |     |    |        |\n| |        |    |           | |  |     | | DECODE +---->+ SW IIR EQ +--->+ DRC\n+--->+ LIMTER +--->+ VOLUME +--->+ HW IIR EQ +--->+ SPK | |        |     | | |\n|    |        |  | |        |    |           | |  |     |\n+--------+     +-----------+    +-----+    +--------+  | +--------+\n+-----------+ |  +-----+\n                                                       +-----------------------------+\n\n| ------------ | ------------------------- | -------- | ----------- |\n| Algorithm    | description               | MIPS(M)  | RAM(kB)     |\n| ------------ | ------------------------- | -------- | ----------- |\n| DRC          | Dynamic Range Compression | 12M/band | 13          |\n| Limiter/DRC2 | Limiter                   | 12M      | 5           |\n| EQ           | Equalizer                 | 1M/band  | Almost zero |\n*/\n\n#include \"audio_process.h\"\n#include \"audio_cfg.h\"\n#include \"drc.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hw_codec_iir_process.h\"\n#include \"hw_iir_process.h\"\n#include \"limiter.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n\n#if defined(USB_EQ_TUNING)\n#if !defined(__HW_DAC_IIR_EQ_PROCESS__) && !defined(__SW_IIR_EQ_PROCESS__)\n#error                                                                         \\\n    \"Either HW_DAC_IIR_EQ_PROCESS or SW_IIR_EQ_PROCESS should be defined when enabling USB_EQ_TUNING\"\n#endif\n#endif\n\n#if defined(__PC_CMD_UART__) || defined(USB_EQ_TUNING)\n#include \"hal_cmd.h\"\n\n#if defined(__SW_IIR_EQ_PROCESS__)\n#define AUDIO_EQ_SW_IIR_UPDATE_CFG\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\n#define AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG\n#endif\n\n#if defined(__HW_IIR_EQ_PROCESS__)\n#define AUDIO_EQ_HW_IIR_UPDATE_CFG\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\n#define AUDIO_EQ_HW_FIR_UPDATE_CFG\n#endif\n\n#ifdef __AUDIO_DRC__\n#define AUDIO_DRC_UPDATE_CFG\n#endif\n\n#ifdef __AUDIO_DRC2__\n#define AUDIO_DRC2_UPDATE_CFG\n#endif\n\n#endif\n\n#if defined(__SW_IIR_EQ_PROCESS__)\nextern const IIR_CFG_T *const audio_eq_sw_iir_cfg_list[EQ_SW_IIR_LIST_NUM];\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\nextern const IIR_CFG_T *const POSSIBLY_UNUSED\n    audio_eq_hw_dac_iir_cfg_list[EQ_HW_DAC_IIR_LIST_NUM];\n#endif\n\n#if defined(__HW_IIR_EQ_PROCESS__)\nextern const IIR_CFG_T *const POSSIBLY_UNUSED\n    audio_eq_hw_iir_cfg_list[EQ_HW_IIR_LIST_NUM];\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\nextern const FIR_CFG_T *const audio_eq_hw_fir_cfg_list[EQ_HW_FIR_LIST_NUM];\n#endif\n\n#ifdef __AUDIO_DRC__\nextern const DrcConfig audio_drc_cfg;\n#endif\n\n#ifdef __AUDIO_DRC2__\nextern const LimiterConfig audio_drc2_cfg;\n#endif\n\n#if defined(AUDIO_EQ_SW_IIR_UPDATE_CFG) ||                                     \\\n    defined(AUDIO_EQ_HW_FIR_UPDATE_CFG) ||                                     \\\n    defined(AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG) ||                                 \\\n    defined(AUDIO_EQ_HW_IIR_UPDATE_CFG) || defined(AUDIO_DRC_UPDATE_CFG) ||    \\\n    defined(AUDIO_DRC2_UPDATE_CFG)\n#define AUDIO_UPDATE_CFG\n#endif\n\n#ifdef __AUDIO_DRC__\n#define AUDIO_DRC_NEEDED_SIZE (1024 * 13)\n#else\n#define AUDIO_DRC_NEEDED_SIZE (0)\n#endif\n\n#ifdef __AUDIO_DRC2__\n#define AUDIO_DRC2_NEEDED_SIZE (1024 * 5)\n#else\n#define AUDIO_DRC2_NEEDED_SIZE (0)\n#endif\n\n#define AUDIO_MEMORY_SIZE (AUDIO_DRC_NEEDED_SIZE + AUDIO_DRC2_NEEDED_SIZE)\n\n#if AUDIO_MEMORY_SIZE > 0\n#include \"audio_memory.h\"\n#endif\n\n#ifndef CODEC_OUTPUT_DEV\n#define CODEC_OUTPUT_DEV CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV\n#endif\n\ntypedef signed int pcm_24bits_t;\ntypedef signed short int pcm_16bits_t;\n\ntypedef struct {\n  enum AUD_BITS_T sample_bits;\n  enum AUD_SAMPRATE_T sample_rate;\n  enum AUD_CHANNEL_NUM_T sw_ch_num;\n  enum AUD_CHANNEL_NUM_T hw_ch_num;\n\n#if defined(__SW_IIR_EQ_PROCESS__)\n  bool sw_iir_enable;\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\n  bool hw_dac_iir_enable;\n#endif\n\n#if defined(__HW_IIR_EQ_PROCESS__)\n  bool hw_iir_enable;\n#endif\n\n#if defined(__HW_FIR_EQ_PROCESS__)\n  bool hw_fir_enable;\n#endif\n\n#if AUDIO_MEMORY_SIZE > 0\n  uint8_t *audio_heap;\n#endif\n\n#ifdef __AUDIO_DRC__\n  DrcState *drc_st;\n#endif\n\n#ifdef __AUDIO_DRC2__\n  LimiterState *drc2_st;\n#endif\n\n#ifdef AUDIO_UPDATE_CFG\n  bool update_cfg;\n#endif\n\n#ifdef USB_EQ_TUNING\n  bool eq_updated_cfg;\n#endif\n\n#ifdef AUDIO_EQ_SW_IIR_UPDATE_CFG\n  IIR_CFG_T sw_iir_cfg;\n#endif\n\n#ifdef AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG\n  IIR_CFG_T hw_dac_iir_cfg;\n#endif\n\n#ifdef AUDIO_EQ_HW_IIR_UPDATE_CFG\n  IIR_CFG_T hw_iir_cfg;\n#endif\n\n#ifdef AUDIO_EQ_HW_FIR_UPDATE_CFG\n  FIR_CFG_T hw_fir_cfg;\n#endif\n\n#ifdef AUDIO_DRC_UPDATE_CFG\n  bool drc_update;\n  DrcConfig drc_cfg;\n#endif\n\n#ifdef AUDIO_DRC2_UPDATE_CFG\n  bool drc2_update;\n  LimiterConfig drc2_cfg;\n#endif\n} AUDIO_PROCESS_T;\n\nstatic AUDIO_PROCESS_T audio_process = {\n    .sample_bits = AUD_BITS_NULL,\n    .sample_rate = AUD_SAMPRATE_NULL,\n    .sw_ch_num = AUD_CHANNEL_NUM_NULL,\n    .hw_ch_num = AUD_CHANNEL_NUM_NULL,\n\n#if defined(__SW_IIR_EQ_PROCESS__)\n    .sw_iir_enable = false,\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\n    .hw_dac_iir_enable = false,\n#endif\n\n#if defined(__HW_IIR_EQ_PROCESS__)\n    .hw_iir_enable = false,\n#endif\n\n#if defined(__HW_FIR_EQ_PROCESS__)\n    .hw_fir_enable = false,\n#endif\n\n#ifdef AUDIO_UPDATE_CFG\n    .update_cfg = false,\n#endif\n\n#ifdef AUDIO_EQ_SW_IIR_UPDATE_CFG\n    .sw_iir_cfg = {.num = 0},\n#endif\n\n#ifdef AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG\n    .hw_dac_iir_cfg = {.num = 0},\n#endif\n\n#ifdef AUDIO_EQ_HW_IIR_UPDATE_CFG\n    .hw_iir_cfg = {.num = 0},\n#endif\n\n#ifdef AUDIO_EQ_HW_FIR_UPDATE_CFG\n    .hw_fir_cfg = {.len = 0},\n#endif\n\n#ifdef AUDIO_DRC_UPDATE_CFG\n    .drc_update = false,\n    .drc_cfg = {.knee = 0,\n                .filter_type = {-1, -1},\n                .band_num = 1,\n                .look_ahead_time = 0,\n                .band_settings =\n                    {\n                        {0, 0, 1, 1, 1, 1},\n                        {0, 0, 1, 1, 1, 1},\n                    }},\n#endif\n\n#ifdef AUDIO_DRC2_UPDATE_CFG\n    .drc2_update = false,\n    .drc2_cfg =\n        {\n            .knee = 0,\n            .look_ahead_time = 0,\n            .threshold = 0,\n            .makeup_gain = 0,\n            .ratio = 1000,\n            .attack_time = 1,\n            .release_time = 1,\n        },\n#endif\n};\n\nint audio_eq_set_cfg(const FIR_CFG_T *fir_cfg, const IIR_CFG_T *iir_cfg,\n                     AUDIO_EQ_TYPE_T audio_eq_type) {\n#if defined(__SW_IIR_EQ_PROCESS__) || defined(__HW_FIR_EQ_PROCESS__) ||        \\\n    defined(__HW_DAC_IIR_EQ_PROCESS__) || defined(__HW_IIR_EQ_PROCESS__)\n  switch (audio_eq_type) {\n#if defined(__SW_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_SW_IIR: {\n    if (iir_cfg) {\n      audio_process.sw_iir_enable = false;\n#ifdef USB_EQ_TUNING\n      if (audio_process.eq_updated_cfg) {\n        iir_set_cfg(&audio_process.sw_iir_cfg);\n      } else\n#endif\n      {\n        iir_set_cfg(iir_cfg);\n      }\n      audio_process.sw_iir_enable = true;\n    } else {\n      audio_process.sw_iir_enable = false;\n    }\n  } break;\n#endif\n\n#if defined(__HW_FIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_FIR: {\n    if (fir_cfg) {\n      audio_process.hw_fir_enable = false;\n      fir_set_cfg(fir_cfg);\n      audio_process.hw_fir_enable = true;\n    } else {\n      audio_process.hw_fir_enable = false;\n    }\n  } break;\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_DAC_IIR: {\n    if (iir_cfg) {\n      HW_CODEC_IIR_CFG_T *hw_iir_cfg_dac = NULL;\n      enum AUD_SAMPRATE_T sample_rate_hw_dac_iir;\n#ifdef __AUDIO_RESAMPLE__\n      int i;\n      for (i = 1; i < 129; i++) {\n        if (audio_process.sample_rate == AUD_SAMPRATE_7350 * i)\n          break;\n        if (audio_process.sample_rate == AUD_SAMPRATE_8000 * i)\n          break;\n      }\n      TRACE(1, \"audio_process.sample_rate i:%d\", i);\n      if (i == 129)\n        i = 6;                                   // set default eq parameter;\n      sample_rate_hw_dac_iir = i * 8463.541666f; // AUD_SAMPRATE_8463\n#else\n      sample_rate_hw_dac_iir = audio_process.sample_rate;\n#endif\n      audio_process.hw_dac_iir_enable = false;\n#ifdef USB_EQ_TUNING\n      if (audio_process.eq_updated_cfg) {\n        hw_iir_cfg_dac = hw_codec_iir_get_cfg(sample_rate_hw_dac_iir,\n                                              &audio_process.hw_dac_iir_cfg);\n      } else\n#endif\n      {\n        hw_iir_cfg_dac = hw_codec_iir_get_cfg(sample_rate_hw_dac_iir, iir_cfg);\n      }\n      ASSERT(hw_iir_cfg_dac != NULL, \"[%s] codec IIR parameter error!\",\n             __func__);\n      hw_codec_iir_set_cfg(hw_iir_cfg_dac, sample_rate_hw_dac_iir,\n                           HW_CODEC_IIR_DAC);\n      audio_process.hw_dac_iir_enable = true;\n    } else {\n      audio_process.hw_dac_iir_enable = false;\n    }\n  } break;\n#endif\n\n#if defined(__HW_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_IIR: {\n    if (iir_cfg) {\n      HW_IIR_CFG_T *hw_iir_cfg = NULL;\n      audio_process.hw_iir_enable = false;\n      hw_iir_cfg = hw_iir_get_cfg(audio_process.sample_rate, iir_cfg);\n      ASSERT(hw_iir_cfg != NULL, \"[%s] 0x%x codec IIR parameter error!\",\n             __func__, (unsigned int)hw_iir_cfg);\n      hw_iir_set_cfg(hw_iir_cfg);\n      audio_process.hw_iir_enable = true;\n    } else {\n      audio_process.hw_iir_enable = false;\n    }\n\n  } break;\n#endif\n\n  default: {\n    ASSERT(false, \"[%s]Error eq type!\", __func__);\n  }\n  }\n#endif\n\n  return 0;\n}\n\nint SRAM_TEXT_LOC audio_process_run(uint8_t *buf, uint32_t len) {\n  int POSSIBLY_UNUSED pcm_len = 0;\n\n  if (audio_process.sample_bits == AUD_BITS_16) {\n    pcm_len = len / sizeof(pcm_16bits_t);\n  } else if (audio_process.sample_bits == AUD_BITS_24) {\n    pcm_len = len / sizeof(pcm_24bits_t);\n  } else {\n    ASSERT(0, \"[%s] bits(%d) is invalid\", __func__, audio_process.sample_bits);\n  }\n\n  if (audio_process.sw_ch_num == audio_process.hw_ch_num) {\n    // do nothing\n  } else if (audio_process.sw_ch_num == AUD_CHANNEL_NUM_1 &&\n             audio_process.hw_ch_num == AUD_CHANNEL_NUM_2) {\n    if (audio_process.sample_bits == AUD_BITS_16) {\n      int16_t *pcm_buf = (int16_t *)buf;\n      for (uint32_t i = 0, j = 0; i < pcm_len; i += 2, j++) {\n        pcm_buf[j] = pcm_buf[i];\n      }\n    } else {\n      int32_t *pcm_buf = (int32_t *)buf;\n      for (uint32_t i = 0, j = 0; i < pcm_len; i += 2, j++) {\n        pcm_buf[j] = pcm_buf[i];\n      }\n    }\n\n    pcm_len /= 2;\n  } else {\n    ASSERT(0, \"[%s] sw_ch_num(%d) or hw_ch_num(%d) is invalid\", __FUNCTION__,\n           audio_process.sw_ch_num, audio_process.hw_ch_num);\n  }\n\n#ifdef AUDIO_PROCESS_DUMP\n  int *buf32 = (int *)buf;\n  for (int i = 0; i < 1024; i++)\n    dump_buf[i] = buf32[2 * i] >> 8;\n  audio_dump_clear_up();\n  audio_dump_add_channel_data(0, dump_buf, 1024);\n\n#endif\n\n  // int32_t s_time,e_time;\n  // s_time = hal_fast_sys_timer_get();\n\n#ifdef __SW_IIR_EQ_PROCESS__\n  if (audio_process.sw_iir_enable) {\n    iir_run(buf, pcm_len);\n  }\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\n  if (audio_process.hw_fir_enable) {\n    fir_run(buf, pcm_len);\n  }\n#endif\n\n#ifdef __AUDIO_DRC__\n#ifdef AUDIO_DRC_UPDATE_CFG\n  if (audio_process.drc_update) {\n    drc_set_config(audio_process.drc_st, &audio_process.drc_cfg);\n    audio_process.drc_update = false;\n  }\n#endif\n\n  drc_process(audio_process.drc_st, buf, pcm_len);\n#endif\n\n  // int32_t m_time = hal_fast_sys_timer_get();\n\n#ifdef __AUDIO_DRC2__\n#ifdef AUDIO_DRC2_UPDATE_CFG\n  if (audio_process.drc2_update) {\n    limiter_set_config(audio_process.drc2_st, &audio_process.drc2_cfg);\n    audio_process.drc2_update = false;\n  }\n#endif\n\n  limiter_process(audio_process.drc2_st, buf, pcm_len);\n#endif\n\n#ifdef __HW_IIR_EQ_PROCESS__\n  if (audio_process.hw_iir_enable) {\n    hw_iir_run(buf, pcm_len);\n  }\n#endif\n\n  if (audio_process.sw_ch_num == audio_process.hw_ch_num) {\n    // do nothing\n  } else if (audio_process.sw_ch_num == AUD_CHANNEL_NUM_1 &&\n             audio_process.hw_ch_num == AUD_CHANNEL_NUM_2) {\n    if (audio_process.sample_bits == AUD_BITS_16) {\n      int16_t *pcm_buf = (int16_t *)buf;\n      for (int32_t i = pcm_len - 1, j = 2 * pcm_len - 1; i >= 0; i--, j -= 2) {\n        pcm_buf[j + 1] = pcm_buf[i];\n        pcm_buf[j + 0] = pcm_buf[i];\n      }\n    } else {\n      int32_t *pcm_buf = (int32_t *)buf;\n      for (int32_t i = pcm_len - 1, j = 2 * pcm_len - 2; i >= 0; i--, j -= 2) {\n        pcm_buf[j + 1] = pcm_buf[i];\n        pcm_buf[j + 0] = pcm_buf[i];\n      }\n    }\n\n    pcm_len *= 2;\n  } else {\n    ASSERT(0, \"[%s] sw_ch_num(%d) or hw_ch_num(%d) is invalid\", __FUNCTION__,\n           audio_process.sw_ch_num, audio_process.hw_ch_num);\n  }\n\n#ifdef AUDIO_PROCESS_DUMP\n  // for(int i=0;i<1024;i++)\n  //    dump_buf[i] = buf32[2 * i+0]>>8;\n  // audio_dump_add_channel_data(1, dump_buf, 1024);\n  audio_dump_run();\n#endif\n\n  // e_time = hal_fast_sys_timer_get();\n  // TRACE(4,\"[%s] Sample len = %d, drc1 %d us, drc2 %d us\",\n  //    __func__, pcm_len, FAST_TICKS_TO_US(m_time - s_time),\n  //    FAST_TICKS_TO_US(e_time - m_time));\n\n  return 0;\n}\n\n/*\n * frame_size stands for samples per channel\n */\nint audio_process_open(enum AUD_SAMPRATE_T sample_rate,\n                       enum AUD_BITS_T sample_bits,\n                       enum AUD_CHANNEL_NUM_T sw_ch_num,\n                       enum AUD_CHANNEL_NUM_T hw_ch_num, int32_t frame_size,\n                       void *eq_buf, uint32_t len) {\n  TRACE(\n      5,\n      \"[%s] sample_rate = %d, sample_bits = %d, sw_ch_num = %d, hw_ch_num = %d\",\n      __func__, sample_rate, sample_bits, sw_ch_num, hw_ch_num);\n#ifdef AUDIO_PROCESS_DUMP\n  audio_dump_init(1024, sizeof(short), 2);\n#endif\n  audio_process.sample_rate = sample_rate;\n  audio_process.sample_bits = sample_bits;\n  audio_process.sw_ch_num = sw_ch_num;\n  audio_process.hw_ch_num = hw_ch_num;\n\n#if defined(__HW_FIR_EQ_PROCESS__) && defined(__HW_IIR_EQ_PROCESS__)\n  void *fir_eq_buf = eq_buf;\n  uint32_t fir_len = len / 2;\n  void *iir_eq_buf = (uint8_t *)eq_buf + fir_len;\n  uint32_t iir_len = len / 2;\n#elif defined(__HW_FIR_EQ_PROCESS__) && !defined(__HW_IIR_EQ_PROCESS__)\n  void *fir_eq_buf = eq_buf;\n  uint32_t fir_len = len;\n#elif !defined(__HW_FIR_EQ_PROCESS__) && defined(__HW_IIR_EQ_PROCESS__)\n  void *iir_eq_buf = eq_buf;\n  uint32_t iir_len = len;\n#endif\n\n#ifdef __SW_IIR_EQ_PROCESS__\n  iir_open(sample_rate, sample_bits, sw_ch_num);\n#ifdef AUDIO_EQ_SW_IIR_UPDATE_CFG\n  audio_eq_set_cfg(NULL, &audio_process.sw_iir_cfg, AUDIO_EQ_TYPE_SW_IIR);\n#endif\n#endif\n\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n  enum AUD_SAMPRATE_T sample_rate_hw_dac_iir;\n#ifdef __AUDIO_RESAMPLE__\n  int i;\n  for (i = 1; i < 129; i++) {\n    if (audio_process.sample_rate == AUD_SAMPRATE_7350 * i)\n      break;\n    if (audio_process.sample_rate == AUD_SAMPRATE_8000 * i)\n      break;\n  }\n  TRACE(1, \"sample_rate i:%d\", i);\n  if (i == 129)\n    i = 6;                                   // set default eq parameter;\n  sample_rate_hw_dac_iir = i * 8463.541666f; // AUD_SAMPRATE_8463\n#else\n  sample_rate_hw_dac_iir = audio_process.sample_rate;\n#endif\n\n  hw_codec_iir_open(sample_rate_hw_dac_iir, HW_CODEC_IIR_DAC, CODEC_OUTPUT_DEV);\n#ifdef AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG\n  audio_eq_set_cfg(NULL, &audio_process.hw_dac_iir_cfg,\n                   AUDIO_EQ_TYPE_HW_DAC_IIR);\n#endif\n#endif\n\n#ifdef __HW_IIR_EQ_PROCESS__\n  hw_iir_open(sample_rate, sample_bits, sw_ch_num, iir_eq_buf, iir_len);\n#ifdef AUDIO_EQ_HW_IIR_UPDATE_CFG\n  audio_eq_set_cfg(NULL, &audio_process.hw_iir_cfg, AUDIO_EQ_TYPE_HW_IIR);\n#endif\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\n#if defined(CHIP_BEST1000) && defined(FIR_HIGHSPEED)\n  hal_cmu_fir_high_speed_enable(HAL_CMU_FIR_USER_EQ);\n#endif\n  fir_open(sample_rate, sample_bits, sw_ch_num, fir_eq_buf, fir_len);\n#ifdef AUDIO_EQ_HW_FIR_UPDATE_CFG\n  audio_eq_set_cfg(&audio_process.hw_fir_cfg, NULL, AUDIO_EQ_TYPE_HW_FIR);\n#endif\n#endif\n\n#if AUDIO_MEMORY_SIZE > 0\n  syspool_get_buff(&audio_process.audio_heap, AUDIO_MEMORY_SIZE);\n  audio_heap_init(audio_process.audio_heap, AUDIO_MEMORY_SIZE);\n#endif\n\n#ifdef __AUDIO_DRC__\n  audio_process.drc_st =\n      drc_create(sample_rate, frame_size, sample_bits, sw_ch_num,\n#ifdef AUDIO_DRC_UPDATE_CFG\n                 &audio_process.drc_cfg\n#else\n                 &audio_drc_cfg\n#endif\n      );\n#ifdef AUDIO_DRC_UPDATE_CFG\n  audio_process.drc_update = false;\n#endif\n#endif\n\n#ifdef __AUDIO_DRC2__\n  audio_process.drc2_st =\n      limiter_create(sample_rate, frame_size, sample_bits, sw_ch_num,\n#ifdef AUDIO_DRC2_UPDATE_CFG\n                     &audio_process.drc2_cfg\n#else\n                     &audio_drc2_cfg\n#endif\n      );\n#ifdef AUDIO_DRC2_UPDATE_CFG\n  audio_process.drc2_update = false;\n#endif\n#endif\n\n#if defined(__PC_CMD_UART__) && defined(USB_AUDIO_APP)\n  hal_cmd_open();\n#endif\n\n  return 0;\n}\n\nint audio_process_close(void) {\n#ifdef __SW_IIR_EQ_PROCESS__\n  audio_process.sw_iir_enable = false;\n  iir_close();\n#endif\n\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n  audio_process.hw_dac_iir_enable = false;\n  hw_codec_iir_close(HW_CODEC_IIR_DAC);\n#endif\n\n#ifdef __HW_IIR_EQ_PROCESS__\n  audio_process.hw_iir_enable = false;\n  hw_iir_close();\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\n  audio_process.hw_fir_enable = false;\n  fir_close();\n#if defined(CHIP_BEST1000) && defined(FIR_HIGHSPEED)\n  hal_cmu_fir_high_speed_disable(HAL_CMU_FIR_USER_EQ);\n#endif\n#endif\n\n#ifdef __AUDIO_DRC__\n#ifdef AUDIO_DRC_UPDATE_CFG\n  audio_process.drc_update = false;\n#endif\n  drc_destroy(audio_process.drc_st);\n  audio_process.drc_st = NULL;\n#endif\n\n#ifdef __AUDIO_DRC2__\n#ifdef AUDIO_DRC2_UPDATE_CFG\n  audio_process.drc2_update = false;\n#endif\n  limiter_destroy(audio_process.drc2_st);\n  audio_process.drc2_st = NULL;\n#endif\n\n#if AUDIO_MEMORY_SIZE > 0\n  size_t total = 0, used = 0, max_used = 0;\n  audio_memory_info(&total, &used, &max_used);\n  TRACE(3, \"AUDIO MALLOC MEM: total - %d, used - %d, max_used - %d.\", total,\n        used, max_used);\n  ASSERT(used == 0, \"[%s] used != 0\", __func__);\n#endif\n\n#if defined(__PC_CMD_UART__) && defined(USB_AUDIO_APP)\n  hal_cmd_close();\n#endif\n\n  return 0;\n}\n\n#if defined(__PC_CMD_UART__) || defined(USB_EQ_TUNING)\nint audio_ping_callback(uint8_t *buf, uint32_t len) {\n  // TRACE(0,\"\");\n  return 0;\n}\n\n#if defined(AUDIO_EQ_SW_IIR_UPDATE_CFG) && !defined(USB_EQ_TUNING)\n#ifndef USB_AUDIO_APP\nint audio_eq_sw_iir_callback(uint8_t *buf, uint32_t len) {\n  TRACE(3, \"[%s] len = %d, sizeof(struct) = %d\", __func__, len,\n        sizeof(IIR_CFG_T));\n\n  if (len != sizeof(IIR_CFG_T)) {\n    return 1;\n  }\n\n  memcpy(&audio_process.sw_iir_cfg, buf, sizeof(IIR_CFG_T));\n  TRACE(3, \"band num:%d gain0:%d, gain1:%d\",\n        (int32_t)audio_process.sw_iir_cfg.num,\n        (int32_t)(audio_process.sw_iir_cfg.gain0 * 10),\n        (int32_t)(audio_process.sw_iir_cfg.gain1 * 10));\n  for (uint8_t i = 0; i < audio_process.sw_iir_cfg.num; i++) {\n    TRACE(5, \"band num:%d type %d gain:%d fc:%d q:%d\", i,\n          (int32_t)(audio_process.sw_iir_cfg.param[i].type),\n          (int32_t)(audio_process.sw_iir_cfg.param[i].gain * 10),\n          (int32_t)(audio_process.sw_iir_cfg.param[i].fc * 10),\n          (int32_t)(audio_process.sw_iir_cfg.param[i].Q * 10));\n  }\n\n#ifdef __SW_IIR_EQ_PROCESS__\n  {\n    iir_set_cfg(&audio_process.sw_iir_cfg);\n    audio_process.sw_iir_enable = true;\n  }\n#endif\n\n  return 0;\n}\n#else\nint audio_eq_sw_iir_callback(uint8_t *buf, uint32_t len) {\n  // IIR_CFG_T *rx_iir_cfg = NULL;\n\n  // rx_iir_cfg = (IIR_CFG_T *)buf;\n\n  // TRACE(3,\"[%s] left gain = %f, right gain = %f\", __func__,\n  // rx_iir_cfg->gain0, rx_iir_cfg->gain1);\n\n  // for(int i=0; inum; i++)\n  // {\n  //     TRACE(5,\"[%s] iir[%d] gain = %f, f = %f, Q = %f\", __func__, i,\n  //     rx_iir_cfg->param[i].gain, rx_iir_cfg->param[i].fc,\n  //     rx_iir_cfg->param[i].Q);\n  // }\n\n  // audio_eq_set_cfg(NULL,(const IIR_CFG_T *)rx_iir_cfg,AUDIO_EQ_TYPE_SW_IIR);\n\n  iir_update_cfg_tbl(buf, len);\n\n  return 0;\n}\n#endif\n#endif\n\n#ifdef AUDIO_EQ_HW_FIR_UPDATE_CFG\nint audio_eq_hw_fir_callback(uint8_t *buf, uint32_t len) {\n  TRACE(3, \"[%s] len = %d, sizeof(struct) = %d\", __func__, len,\n        sizeof(FIR_CFG_T));\n\n  if (len != sizeof(FIR_CFG_T)) {\n    return 1;\n  }\n\n  FIR_CFG_T *rx_fir_cfg = NULL;\n\n  rx_fir_cfg = (FIR_CFG_T *)buf;\n\n  TRACE(3, \"[%s] left gain = %d, right gain = %d\", __func__, rx_fir_cfg->gain0,\n        rx_fir_cfg->gain1);\n\n  TRACE(6, \"[%s] len = %d, coef: %d, %d......%d, %d\", __func__, rx_fir_cfg->len,\n        rx_fir_cfg->coef[0], rx_fir_cfg->coef[1],\n        rx_fir_cfg->coef[rx_fir_cfg->len - 2],\n        rx_fir_cfg->coef[rx_fir_cfg->len - 1]);\n\n  rx_fir_cfg->gain0 = 6;\n  rx_fir_cfg->gain1 = 6;\n\n  if (rx_fir_cfg) {\n    memcpy(&audio_process.fir_cfg, rx_fir_cfg, sizeof(audio_process.fir_cfg));\n    audio_process.fir_enable = true;\n    fir_set_cfg(&audio_process.fir_cfg);\n  } else {\n    audio_process.fir_enable = false;\n  }\n\n  return 0;\n}\n#endif\n\n#ifdef AUDIO_DRC_UPDATE_CFG\nint audio_drc_callback(uint8_t *buf, uint32_t len) {\n  TRACE(3, \"[%s] len = %d, sizeof(struct) = %d\", __func__, len,\n        sizeof(DrcConfig));\n\n  if (len != sizeof(DrcConfig)) {\n    TRACE(1, \"[%s] WARNING: Length is different\", __func__);\n\n    return 1;\n  }\n\n  if (audio_process.drc_st == NULL) {\n    TRACE(1, \"[%s] WARNING: audio_process.drc2_st = NULL\", __func__);\n    TRACE(1, \"[%s] WARNING: Please Play music, then tuning Limiter\", __func__);\n\n    return 2;\n  }\n\n  memcpy(&audio_process.drc_cfg, buf, sizeof(DrcConfig));\n  audio_process.drc_update = true;\n\n  return 0;\n}\n#endif\n\n#ifdef AUDIO_DRC2_UPDATE_CFG\nint audio_drc2_callback(uint8_t *buf, uint32_t len) {\n  TRACE(3, \"[%s] len = %d, sizeof(struct) = %d\", __func__, len,\n        sizeof(LimiterConfig));\n\n  if (len != sizeof(LimiterConfig)) {\n    TRACE(1, \"[%s] WARNING: Length is different\", __func__);\n\n    return 1;\n  }\n\n  if (audio_process.drc2_st == NULL) {\n    TRACE(1, \"[%s] WARNING: audio_process.drc2_st = NULL\", __func__);\n    TRACE(1, \"[%s] WARNING: Please Play music, then tuning Limiter\", __func__);\n\n    return 2;\n  }\n\n  memcpy(&audio_process.drc2_cfg, buf, sizeof(LimiterConfig));\n  audio_process.drc2_update = true;\n\n  return 0;\n}\n#endif\n\n#if defined(AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG) && !defined(USB_EQ_TUNING)\nint audio_eq_hw_dac_iir_callback(uint8_t *buf, uint32_t len) {\n  TRACE(3, \"[%s] len = %d, sizeof(struct) = %d\", __func__, len,\n        sizeof(IIR_CFG_T));\n\n  if (len != sizeof(IIR_CFG_T)) {\n    return 1;\n  }\n\n  memcpy(&audio_process.hw_dac_iir_cfg, buf, sizeof(IIR_CFG_T));\n  TRACE(3, \"band num:%d gain0:%d, gain1:%d\",\n        (int32_t)audio_process.hw_dac_iir_cfg.num,\n        (int32_t)(audio_process.hw_dac_iir_cfg.gain0 * 10),\n        (int32_t)(audio_process.hw_dac_iir_cfg.gain1 * 10));\n  for (uint8_t i = 0; i < audio_process.hw_dac_iir_cfg.num; i++) {\n    TRACE(5, \"band num:%d type %d gain:%d fc:%d q:%d\", i,\n          (int32_t)(audio_process.hw_dac_iir_cfg.param[i].type),\n          (int32_t)(audio_process.hw_dac_iir_cfg.param[i].gain * 10),\n          (int32_t)(audio_process.hw_dac_iir_cfg.param[i].fc * 10),\n          (int32_t)(audio_process.hw_dac_iir_cfg.param[i].Q * 10));\n  }\n\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n  {\n    HW_CODEC_IIR_CFG_T *hw_iir_cfg_dac = NULL;\n    enum AUD_SAMPRATE_T sample_rate_hw_dac_iir;\n#ifdef __AUDIO_RESAMPLE__\n    int i;\n    for (i = 1; i < 129; i++) {\n      if (audio_process.sample_rate == AUD_SAMPRATE_7350 * i)\n        break;\n      if (audio_process.sample_rate == AUD_SAMPRATE_8000 * i)\n        break;\n    }\n    TRACE(1, \"audio_process.sample_rate i:%d\", i);\n    if (i == 129)\n      i = 6;                                   // set default eq parameter;\n    sample_rate_hw_dac_iir = i * 8463.541666f; // AUD_SAMPRATE_8463\n#else\n    sample_rate_hw_dac_iir = audio_process.sample_rate;\n#endif\n    hw_iir_cfg_dac = hw_codec_iir_get_cfg(sample_rate_hw_dac_iir,\n                                          &audio_process.hw_dac_iir_cfg);\n    ASSERT(hw_iir_cfg_dac != NULL, \"[%s] %d codec IIR parameter error!\",\n           __func__, (uint32_t)hw_iir_cfg_dac);\n\n    // hal_codec_iir_dump(hw_iir_cfg_dac);\n\n    hw_codec_iir_set_cfg(hw_iir_cfg_dac, sample_rate_hw_dac_iir,\n                         HW_CODEC_IIR_DAC);\n    audio_process.hw_dac_iir_enable = true;\n  }\n#endif\n\n  return 0;\n}\n#endif\n\n#ifdef AUDIO_EQ_HW_IIR_UPDATE_CFG\nint audio_eq_hw_iir_callback(uint8_t *buf, uint32_t len) {\n  TRACE(3, \"[%s] len = %d, sizeof(struct) = %d\", __func__, len,\n        sizeof(IIR_CFG_T));\n\n  if (len != sizeof(IIR_CFG_T)) {\n    return 1;\n  }\n\n  memcpy(&audio_process.hw_iir_cfg, buf, sizeof(IIR_CFG_T));\n  TRACE(3, \"band num:%d gain0:%d, gain1:%d\",\n        (int32_t)audio_process.hw_iir_cfg.num,\n        (int32_t)(audio_process.hw_iir_cfg.gain0 * 10),\n        (int32_t)(audio_process.hw_iir_cfg.gain1 * 10));\n\n  for (uint8_t i = 0; i < audio_process.hw_iir_cfg.num; i++) {\n    TRACE(5, \"band num:%d type %d gain:%d fc:%d q:%d\", i,\n          (int32_t)(audio_process.hw_iir_cfg.param[i].type),\n          (int32_t)(audio_process.hw_iir_cfg.param[i].gain * 10),\n          (int32_t)(audio_process.hw_iir_cfg.param[i].fc * 10),\n          (int32_t)(audio_process.hw_iir_cfg.param[i].Q * 10));\n  }\n\n#ifdef __HW_IIR_EQ_PROCESS__\n  {\n    HW_IIR_CFG_T *hw_iir_cfg = NULL;\n#ifdef __AUDIO_RESAMPLE__\n    enum AUD_SAMPRATE_T sample_rate_hw_iir = AUD_SAMPRATE_50781;\n#else\n    enum AUD_SAMPRATE_T sample_rate_hw_iir = audio_process.sample_rate;\n#endif\n    hw_iir_cfg = hw_iir_get_cfg(sample_rate_hw_iir, &audio_process.hw_iir_cfg);\n    ASSERT(hw_iir_cfg != NULL, \"[%s] %d codec IIR parameter error!\", __func__,\n           hw_iir_cfg);\n    hw_iir_set_cfg(hw_iir_cfg);\n    audio_process.hw_iir_enable = true;\n  }\n#endif\n\n  return 0;\n}\n#endif\n#endif // #ifdef __PC_CMD_UART__\n\n#ifdef USB_EQ_TUNING\n\nint audio_eq_usb_iir_callback(uint8_t *buf, uint32_t len) {\n  IIR_CFG_T *cur_cfg;\n\n  TRACE(2, \"usb_iir_cb: len=[%d - %d]\", len, sizeof(IIR_CFG_T));\n\n  if (len != sizeof(IIR_CFG_T)) {\n    return 1;\n  }\n\n  cur_cfg = (IIR_CFG_T *)buf;\n  TRACE(2, \"-> sample_rate[%d], num[%d]\",\n        /*cur_cfg->samplerate,*/ audio_process.sample_rate, cur_cfg->num);\n\n#if defined(AUDIO_EQ_SW_IIR_UPDATE_CFG)\n  audio_process.sw_iir_cfg.gain0 = cur_cfg->gain0;\n  audio_process.sw_iir_cfg.gain1 = cur_cfg->gain1;\n#endif\n\n#if defined(AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG)\n#if defined(AUDIO_EQ_SW_IIR_UPDATE_CFG)\n  audio_process.hw_dac_iir_cfg.gain0 = 0;\n  audio_process.hw_dac_iir_cfg.gain1 = 0;\n#else\n  audio_process.hw_dac_iir_cfg.gain0 = cur_cfg->gain0;\n  audio_process.hw_dac_iir_cfg.gain1 = cur_cfg->gain1;\n#endif\n#endif\n\n#if defined(AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG)\n  if (cur_cfg->num > AUD_DAC_IIR_NUM_EQ) {\n    audio_process.hw_dac_iir_cfg.num = AUD_DAC_IIR_NUM_EQ;\n  } else {\n    audio_process.hw_dac_iir_cfg.num = cur_cfg->num;\n  }\n  TRACE(1, \"-> hw_dac_iir_num[%d]\", audio_process.hw_dac_iir_cfg.num);\n#endif\n\n#if defined(AUDIO_EQ_SW_IIR_UPDATE_CFG)\n  audio_process.sw_iir_cfg.num =\n      cur_cfg->num - audio_process.hw_dac_iir_cfg.num;\n  TRACE(1, \"-> sw_iir_num[%d]\", audio_process.sw_iir_cfg.num);\n#endif\n  // TRACE(2,\"-> iir_num[%d - %d]\", audio_process.hw_dac_iir_cfg.num,\n  // audio_process.sw_iir_cfg.num);\n\n#if defined(AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG)\n  if (audio_process.hw_dac_iir_cfg.num) {\n    memcpy((void *)(&audio_process.hw_dac_iir_cfg.param[0]),\n           (void *)(&cur_cfg->param[0]),\n           audio_process.hw_dac_iir_cfg.num * sizeof(IIR_PARAM_T));\n  }\n#endif\n\n#if defined(AUDIO_EQ_SW_IIR_UPDATE_CFG)\n  if (audio_process.sw_iir_cfg.num) {\n\n    memcpy((void *)(&audio_process.sw_iir_cfg.param[0]),\n           (void *)(&cur_cfg->param[audio_process.hw_dac_iir_cfg.num]),\n           audio_process.sw_iir_cfg.num * sizeof(IIR_PARAM_T));\n\n  } else {\n\n    // set a default filter\n    audio_process.sw_iir_cfg.num = 1;\n\n    audio_process.sw_iir_cfg.param[0].fc = 1000.0;\n    audio_process.sw_iir_cfg.param[0].gain = 0.0;\n    audio_process.sw_iir_cfg.param[0].type = IIR_TYPE_PEAK;\n    audio_process.sw_iir_cfg.param[0].Q = 1.0;\n  }\n#endif\n\n  if (audio_process.sample_rate) {\n    audio_process.update_cfg = true;\n  }\n\n  audio_process.eq_updated_cfg = true;\n\n  return 0;\n}\n\nvoid audio_eq_usb_eq_update(void) {\n  if (audio_process.update_cfg) {\n\n#if defined(AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG)\n    HW_CODEC_IIR_CFG_T *hw_iir_cfg_dac = NULL;\n\n    if (audio_process.hw_dac_iir_cfg.num) {\n      enum AUD_SAMPRATE_T sample_rate_hw_dac_iir;\n#ifdef __AUDIO_RESAMPLE__\n      int i;\n      for (i = 1; i < 129; i++) {\n        if (audio_process.sample_rate == AUD_SAMPRATE_7350 * i)\n          break;\n        if (audio_process.sample_rate == AUD_SAMPRATE_8000 * i)\n          break;\n      }\n      TRACE(1, \"audio_process.sample_rate i:%d\", i);\n      if (i == 129)\n        i = 6;                                   // set default eq parameter;\n      sample_rate_hw_dac_iir = i * 8463.541666f; // AUD_SAMPRATE_8463\n#else\n      sample_rate_hw_dac_iir = audio_process.sample_rate;\n#endif\n      hw_iir_cfg_dac = hw_codec_iir_get_cfg(sample_rate_hw_dac_iir,\n                                            &audio_process.hw_dac_iir_cfg);\n\n      hw_codec_iir_set_cfg(hw_iir_cfg_dac, sample_rate_hw_dac_iir,\n                           HW_CODEC_IIR_DAC);\n      audio_process.hw_dac_iir_enable = true;\n\n    } else {\n\n      audio_process.hw_dac_iir_enable = false;\n    }\n#endif\n\n#if defined(AUDIO_EQ_SW_IIR_UPDATE_CFG)\n    iir_set_cfg(&audio_process.sw_iir_cfg);\n    audio_process.sw_iir_enable = true;\n#endif\n\n    audio_process.update_cfg = false;\n\n    /*\n                    TRACE(4,\"USB EQ Update: en[%d-%d], num[%d-%d]\",\n                                    audio_process.hw_dac_iir_enable,\n       audio_process.sw_iir_enable, audio_process.hw_dac_iir_cfg.num,\n       audio_process.sw_iir_cfg.num);\n    */\n  }\n}\n\n#endif // USB_EQ_TUNING\n\ntypedef struct {\n  uint8_t type;\n  uint8_t maxEqBandNum;\n  uint16_t sample_rate_num;\n  uint8_t sample_rate[50];\n} query_eq_info_t;\n\nextern int getMaxEqBand(void);\nextern int getSampleArray(uint8_t *buf, uint16_t *num);\n\nextern void hal_cmd_set_res_playload(uint8_t *data, int len);\n#define CMD_TYPE_QUERY_DUT_EQ_INFO 0x00\nint audio_cmd_callback(uint8_t *buf, uint32_t len) {\n  uint8_t type;\n  // uint32_t* sample_rate;\n  // uint8_t* p;\n  query_eq_info_t info;\n\n  type = buf[0];\n  // p = buf + 1;\n\n  TRACE(2, \"%s type: %d\", __func__, type);\n  switch (type) {\n  case CMD_TYPE_QUERY_DUT_EQ_INFO:\n    info.type = CMD_TYPE_QUERY_DUT_EQ_INFO;\n    info.maxEqBandNum = getMaxEqBand();\n    getSampleArray(info.sample_rate, &info.sample_rate_num);\n\n    hal_cmd_set_res_playload((uint8_t *)&info, 4 + info.sample_rate_num * 4);\n    break;\n  default:\n    break;\n  }\n\n  return 0;\n}\n\n#ifdef AUDIO_SECTION_ENABLE\nint audio_cfg_burn_callback(uint8_t *buf, uint32_t len) {\n  TRACE(3, \"[%s] len = %d, sizeof(struct) = %d\", __func__, len,\n        sizeof_audio_cfg());\n\n  if (len != sizeof_audio_cfg()) {\n    return 1;\n  }\n\n  int res = 0;\n  res = store_audio_cfg_into_audio_section((AUDIO_CFG_T *)buf);\n\n  if (res) {\n    TRACE(2, \"[%s] ERROR: res = %d\", __func__, res);\n    res += 100;\n  } else {\n    TRACE(1, \"[%s] Store audio cfg into audio section!!!\", __func__);\n  }\n\n  return res;\n}\n#endif\n\nint audio_process_init(void) {\n#ifdef __PC_CMD_UART__\n  hal_cmd_init();\n\n#ifdef AUDIO_EQ_SW_IIR_UPDATE_CFG\n  hal_cmd_register(\"iir_eq\", audio_eq_sw_iir_callback); // Will be removed\n  hal_cmd_register(\"sw_iir_eq\", audio_eq_sw_iir_callback);\n#endif\n\n#ifdef AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG\n  hal_cmd_register(\"iir_eq\", audio_eq_hw_dac_iir_callback); // Will be removed\n  hal_cmd_register(\"dac_iir_eq\", audio_eq_hw_dac_iir_callback);\n#endif\n\n#ifdef AUDIO_EQ_HW_IIR_UPDATE_CFG\n  hal_cmd_register(\"iir_eq\", audio_eq_hw_iir_callback); // Will be removed\n  hal_cmd_register(\"hw_iir_eq\", audio_eq_hw_iir_callback);\n#endif\n\n#ifdef AUDIO_EQ_HW_FIR_UPDATE_CFG\n  hal_cmd_register(\"fir_eq\", audio_eq_hw_fir_callback);\n#endif\n\n#ifdef AUDIO_DRC_UPDATE_CFG\n  hal_cmd_register(\"drc\", audio_drc_callback);\n#endif\n\n#ifdef AUDIO_DRC2_UPDATE_CFG\n  hal_cmd_register(\"limiter\", audio_drc2_callback);\n#endif\n\n#ifdef AUDIO_SECTION_ENABLE\n  hal_cmd_register(\"burn\", audio_cfg_burn_callback);\n  hal_cmd_register(\"audio_burn\", audio_cfg_burn_callback);\n#endif\n\n  hal_cmd_register(\"cmd\", audio_cmd_callback);\n  hal_cmd_register(\"ping\", audio_ping_callback);\n#endif\n\n#ifdef USB_EQ_TUNING\n\n  hal_cmd_init();\n\n#if defined(AUDIO_EQ_SW_IIR_UPDATE_CFG) ||                                     \\\n    defined(AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG)\n  hal_cmd_register(\"iir_eq\", audio_eq_usb_iir_callback);\n#endif\n\n  hal_cmd_register(\"cmd\", audio_cmd_callback);\n  hal_cmd_register(\"ping\", audio_ping_callback);\n\n#endif\n\n  // load default cfg\n#ifdef AUDIO_EQ_SW_IIR_UPDATE_CFG\n  memcpy(&audio_process.sw_iir_cfg, audio_eq_sw_iir_cfg_list[0],\n         sizeof(IIR_CFG_T));\n#endif\n\n#ifdef AUDIO_EQ_HW_DAC_IIR_UPDATE_CFG\n  memcpy(&audio_process.hw_dac_iir_cfg, audio_eq_hw_dac_iir_cfg_list[0],\n         sizeof(IIR_CFG_T));\n#endif\n\n#ifdef AUDIO_EQ_HW_IIR_UPDATE_CFG\n  memcpy(&audio_process.hw_iir_cfg, audio_eq_hw_iir_cfg_list[0],\n         sizeof(IIR_CFG_T));\n#endif\n\n#ifdef AUDIO_EQ_HW_FIR_UPDATE_CFG\n  memcpy(&audio_process.hw_fir_cfg, audio_eq_hw_fir_cfg_list[0],\n         sizeof(FIR_CFG_T));\n#endif\n\n#ifdef AUDIO_DRC_UPDATE_CFG\n  memcpy(&audio_process.drc_cfg, &audio_drc_cfg, sizeof(DrcConfig));\n#endif\n\n#ifdef AUDIO_DRC2_UPDATE_CFG\n  memcpy(&audio_process.drc2_cfg, &audio_drc2_cfg, sizeof(LimiterConfig));\n#endif\n\n  return 0;\n}\n"
  },
  {
    "path": "services/audio_process/audio_process.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AUDIO_PROCESS_H__\n#define __AUDIO_PROCESS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"iir_process.h\"\n#include \"fir_process.h\"\n\ntypedef enum {\n    AUDIO_EQ_TYPE_SW_IIR = 0,\n    AUDIO_EQ_TYPE_HW_FIR,\n    AUDIO_EQ_TYPE_HW_DAC_IIR,\n    AUDIO_EQ_TYPE_HW_IIR,\n} AUDIO_EQ_TYPE_T;\n\nint audio_process_init(void);\nint audio_process_open(enum AUD_SAMPRATE_T sample_rate, enum AUD_BITS_T sample_bits,enum AUD_CHANNEL_NUM_T sw_ch_num, enum AUD_CHANNEL_NUM_T hw_ch_num,int32_t frame_size, void *eq_buf, uint32_t len);\nint audio_process_run(uint8_t *buf, uint32_t len);\nint audio_process_close(void);\n\nint audio_eq_set_cfg(const FIR_CFG_T *fir_cfg,const IIR_CFG_T *iir_cfg,AUDIO_EQ_TYPE_T audio_eq_type);\n\n#ifdef USB_EQ_TUNING\nvoid audio_eq_usb_eq_update (void);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/audio_process/audio_spectrum.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef SPEECH_LIB\n\n#include \"hal_aud.h\"\n#include \"hal_trace.h\"\n#include \"spectrum_fix.h\"\n#include \"speech_memory.h\"\n\n#define AUDIO_SPECTRUM_FRAME_SIZE (256)\n\nstruct AudioSpectrum {\n  SpectrumFixState *state;\n  enum AUD_BITS_T bits;\n  int16_t *frame;\n  int16_t *data;\n};\n\nstatic AudioSpectrum audio_spectrum;\n\nextern const SpectrumFixConfig audio_spectrum_cfg;\n\nvoid audio_spectrum_open(int sample_rate, enum AUD_BITS_T sample_bits) {\n  uint8_t *speech_buf = NULL;\n  int speech_buf_size = 1024 * 5;\n\n  syspool_get_buff((uint8_t **)&(audio_spectrum.frame),\n                   AUDIO_SPECTRUM_FRAME_SIZE * sizeof(int16_t));\n  syspool_get_buff((uint8_t **)&(audio_spectrum.data),\n                   audio_spectrum_cfg.freq_num * sizeof(int16_t));\n  syspool_get_buff(&speech_buf, speech_buf_size);\n  speech_heap_init(speech_buf, speech_buf_size);\n\n  audio_spectrum.state = spectrum_fix_init(\n      sample_rate, AUDIO_SPECTRUM_FRAME_SIZE, &audio_spectrum_cfg);\n  audio_spectrum.bits = sample_bits;\n}\n\nvoid audio_spectrum_close(void) {\n  spectrum_fix_destroy(audio_spectrum.state);\n\n  size_t total = 0, used = 0, max_used = 0;\n  speech_memory_info(&total, &used, &max_used);\n  TRACE(3, \"SPEECH MALLOC MEM: total - %d, used - %d, max_used - %d.\", total,\n        used, max_used);\n  ASSERT(used == 0, \"[%s] used != 0\", __func__);\n}\n\nstatic inline int16_t convertTo16Bit(int16_t x) { return x; }\n\nstatic inline int16_t convertTo16Bit(int32_t x) { return (x >> 8); }\n\n// convert stream to 16bit mono stream\ntemplate \nstatic void convertToMono16Bit(int16_t *out, DataType *in, int frame_size) {\n  for (int i = 0; i < frame_size; i++) {\n    out[i] = convertTo16Bit(in[i * 2]) / 2 + convertTo16Bit(in[i * 2 + 1]) / 2;\n  }\n}\n\ntemplate \nvoid audio_spectrum_run_impl(const uint8_t *buf, int len) {\n  int frame_size = len / sizeof(DataType);\n  DataType *pBuf = (DataType *)buf;\n\n  ASSERT(frame_size % (2 * AUDIO_SPECTRUM_FRAME_SIZE) == 0,\n         \"[%s] only support N*%d frame size\", __FUNCTION__,\n         AUDIO_SPECTRUM_FRAME_SIZE);\n\n  int audio_spectrum_block_cnt = frame_size / 2 / AUDIO_SPECTRUM_FRAME_SIZE;\n\n  for (int i = 0; i < audio_spectrum_block_cnt; i++) {\n    // stereo to mono, 24bit to 16bit\n    convertToMono16Bit(audio_spectrum.frame,\n                       pBuf + i * AUDIO_SPECTRUM_FRAME_SIZE * 2,\n                       AUDIO_SPECTRUM_FRAME_SIZE);\n\n    // TRACE(0,\"pcm:\");\n    // DUMP16(\"0x%x, \", audio_spectrum.frame, 8);\n\n    spectrum_fix_analysis(audio_spectrum.state, audio_spectrum.frame);\n    if (i == 0) {\n      spectrum_fix_process(audio_spectrum.state, audio_spectrum.data,\n                           audio_spectrum_cfg.freq_num);\n      // TRACE(1,\"spectrum: %d\", sizeof(DataType));\n      // DUMP16(\"0x%x, \", audio_spectrum.data, audio_spectrum_cfg.freq_num);\n    }\n  }\n}\n\nvoid audio_spectrum_run(const uint8_t *buf, int len) {\n  if (audio_spectrum.bits == AUD_BITS_16)\n    audio_spectrum_run_impl(buf, len);\n  else if (audio_spectrum.bits == AUD_BITS_24)\n    audio_spectrum_run_impl(buf, len);\n  else\n    TRACE(1, \"[%s] warning not suitable callback available\", __func__);\n}\n\n#endif\n"
  },
  {
    "path": "services/audio_process/audio_spectrum.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef AUDIO_SPECTRUM_H\n#define AUDIO_SPECTRUM_H\n\nvoid audio_spectrum_open(int sample_rate, enum AUD_BITS_T sample_bits);\n\nvoid audio_spectrum_close(void);\n\nvoid audio_spectrum_run(const uint8_t *buf, int len);\n\n#endif\n"
  },
  {
    "path": "services/audioflinger/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/fs/fat/ChaN \\\n\t-Iutils/uarthci \\\n\t-Iutils/cqueue \\\n\t-Iplatform/drivers/codec  \\\n\t-Iservices/multimedia/audio/process/floatlimiter/include \\\n\t-Iplatform/drivers/ana\n\nifeq ($(RAND_FROM_MIC),1)\nccflags-y += \\\n\t-Iapps/common\nendif\n\nifneq ($(AF_STACK_SIZE),)\nCFLAGS_audioflinger.o += -DAF_STACK_SIZE=$(AF_STACK_SIZE)\nendif\n\nifeq ($(AUDIO_CODEC_ASYNC_CLOSE),1)\nCFLAGS_audioflinger.o += -D__CODEC_ASYNC_CLOSE__\nendif\n\nifeq ($(CODEC_PLAY_BEFORE_CAPTURE),1)\nCFLAGS_audioflinger.o += -DCODEC_PLAY_BEFORE_CAPTURE\nendif\n\nifeq ($(AUDIO_OUTPUT_SMALL_GAIN_ATTN),1)\nCFLAGS_audioflinger.o += -DAUDIO_OUTPUT_SMALL_GAIN_ATTN\nendif\n\nifeq ($(AUDIO_OUTPUT_SW_GAIN),1)\nCFLAGS_audioflinger.o += -DAUDIO_OUTPUT_SW_GAIN\nendif\n\nifeq ($(ANC_APP),1)\nCFLAGS_audioflinger.o += -DANC_APP\nifeq ($(CODEC_ANC_BOOST),1)\nCFLAGS_audioflinger.o += -DCODEC_ANC_BOOST\nendif\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_audioflinger.o += -D__AUDIO_RESAMPLE__\nendif\n\nifeq ($(AUDIO_OUTPUT_DC_CALIB),1)\nCFLAGS_audioflinger.o += -DAUDIO_OUTPUT_DC_CALIB\nendif\nifeq ($(AUDIO_OUTPUT_DC_CALIB_ANA),1)\nCFLAGS_audioflinger.o += -DAUDIO_OUTPUT_DC_CALIB_ANA\nendif\n\nifeq ($(AUDIO_OUTPUT_GAIN_M60DB_CHECK),1)\nCFLAGS_audioflinger.o += -DAUDIO_OUTPUT_GAIN_M60DB_CHECK\nendif\n\nifeq ($(CODEC_DSD),1)\nCFLAGS_audioflinger.o += -DCODEC_DSD\nendif\n\nifeq ($(AUDIO_OUTPUT_INVERT_RIGHT_CHANNEL),1)\nCFLAGS_audioflinger.o += -DAUDIO_OUTPUT_INVERT_RIGHT_CHANNEL\nendif\n\nifeq ($(AUDIO_OUTPUT_CALIB_GAIN_MISSMATCH),1)\nCFLAGS_audioflinger.o += -DAUDIO_OUTPUT_CALIB_GAIN_MISSMATCH\nendif\n\nifneq ($(CHIP_HAS_I2S),)\nCFLAGS_audioflinger.o += -DCHIP_HAS_I2S=$(CHIP_HAS_I2S)\nendif\n\n#-------------------------------\n# Audioflinger device selection\n#-------------------------------\n# Internal codec default on\nAF_DEVICE_INT_CODEC ?= 1\n\n# BT PCM default on for BT applications\nifeq ($(RTOS),1)\nAF_DEVICE_BT_PCM ?= 1\nendif\n\n# Individual device macro\nifeq ($(AF_DEVICE_EXT_CODEC),1)\nCFLAGS_audioflinger.o += -DAF_DEVICE_EXT_CODEC\nendif\nifeq ($(AF_DEVICE_I2S),1)\nCFLAGS_audioflinger.o += -DAF_DEVICE_I2S\nendif\nifeq ($(AF_DEVICE_TDM),1)\nCFLAGS_audioflinger.o += -DAF_DEVICE_TDM\nendif\nifeq ($(AF_DEVICE_INT_CODEC),1)\nCFLAGS_audioflinger.o += -DAF_DEVICE_INT_CODEC\nendif\nifeq ($(AF_DEVICE_SPDIF),1)\nCFLAGS_audioflinger.o += -DAF_DEVICE_SPDIF\nendif\nifeq ($(AF_DEVICE_BT_PCM),1)\nCFLAGS_audioflinger.o += -DAF_DEVICE_BT_PCM\nendif\nifeq ($(AF_DEVICE_DPD_RX),1)\nCFLAGS_audioflinger.o += -DAF_DEVICE_DPD_RX\nendif\nifeq ($(AUDIO_ANC_FB_MC),1)\nCFLAGS_audioflinger.o += -DAF_DEVICE_MC\nendif\n\n#-------------------------------\n# End\n#-------------------------------\n\n"
  },
  {
    "path": "services/audioflinger/audioflinger.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"audioflinger.h\"\n#include \"codec_int.h\"\n#include \"codec_tlv32aic32.h\"\n#include \"hal_btpcm.h\"\n#include \"hal_codec.h\"\n#include \"hal_dma.h\"\n#include \"hal_i2s.h\"\n#include \"hal_spdif.h\"\n#include \"hal_tdm.h\"\n\n#include \"analog.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n\n#include \"cmsis.h\"\n\n#ifdef __RAND_FROM_MIC__\n#include \"randfrommic.h\"\n#endif\n\n#ifdef TWS_PROMPT_SYNC\nextern void tws_playback_ticks_check_for_mix_prompt(void);\n#endif\n\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#else\n#include \"hal_sleep.h\"\n#endif\n\n#ifdef AUDIO_OUTPUT_SW_LIMITER\n#include \"floatlimiter.h\"\n#endif\n\n#define AF_TRACE_DEBUG() // TRACE(2,\"%s:%d\\n\", __func__, __LINE__)\n\n// #define AF_STREAM_ID_0_PLAYBACK_FADEOUT\n\n// #define CORRECT_SAMPLE_VALUE\n\n#ifdef AUDIO_OUTPUT_DC_CALIB\n#ifdef CHIP_BEST1000\n#define AUDIO_OUTPUT_DC_CALIB_SW\n#define AUDIO_OUTPUT_PA_ON_FADE_IN\n#if !(defined(__TWS__) || defined(IBRT))\n#define AUDIO_OUTPUT_PA_OFF_FADE_OUT\n#endif\n#elif (defined(__TWS__) || defined(IBRT)) && !defined(ANC_APP)\n#define AUDIO_OUTPUT_PA_ON_FADE_IN\n#endif // !CHIP_BEST1000 && __TWS__\n#elif defined(AUDIO_OUTPUT_DC_CALIB_ANA) &&                                    \\\n    (defined(__TWS__) || defined(IBRT)) && !defined(ANC_APP)\n#define AUDIO_OUTPUT_PA_ON_FADE_IN\n#endif // !AUDIO_OUTPUT_DC_CALIB && AUDIO_OUTPUT_DC_CALIB_ANA && __TWS__\n\n#define AF_FADE_OUT_SIGNAL_ID 15\n#define AF_FADE_IN_SIGNAL_ID 14\n\n/* config params */\n#define AF_CODEC_INST HAL_CODEC_ID_0\n#define AF_SPDIF_INST HAL_SPDIF_ID_0\n#define AF_BTPCM_INST HAL_BTPCM_ID_0\n\n#define AF_CPU_WAKE_USER HAL_CPU_WAKE_LOCK_USER_AUDIOFLINGER\n\n#define AF_CODEC_RIGHT_CHAN_ATTN 0.968277856 // -0.28 dB\n\n#define AF_CODEC_VOL_UPDATE_STEP 0.00002\n\n#define AF_CODEC_DC_MAX_SCALE 32767\n\n#define AF_CODEC_DC_STABLE_INTERVAL MS_TO_TICKS(4)\n#ifdef AUDIO_OUTPUT_PA_OFF_FADE_OUT\n#define AF_CODEC_PA_RESTART_INTERVAL MS_TO_TICKS(160)\n#else\n#define AF_CODEC_PA_RESTART_INTERVAL MS_TO_TICKS(8)\n#endif\n\n// The following might have been defined in tgt_hardware.h\n#ifndef AF_CODEC_FADE_IN_MS\n#define AF_CODEC_FADE_IN_MS 20\n#endif\n#ifndef AF_CODEC_FADE_OUT_MS\n#define AF_CODEC_FADE_OUT_MS 20\n#endif\n#define AF_CODEC_FADE_MIN_SAMPLE_CNT 200\n\n#define PP_PINGPANG(v) (v == PP_PING ? PP_PANG : PP_PING)\n\n#ifdef AUDIO_ANC_FB_ADJ_MC\n#define AF_STACK_SIZE (1024 * 10)\n#else\n#ifndef AF_STACK_SIZE\n#define AF_STACK_SIZE (1024 * 8)\n#endif\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP)\n#define DYNAMIC_AUDIO_BUFFER_COUNT\n#endif\n\n#ifdef DYNAMIC_AUDIO_BUFFER_COUNT\n#define MAX_AUDIO_BUFFER_COUNT 16\n#define MIN_AUDIO_BUFFER_COUNT 2\n#define AUDIO_BUFFER_COUNT (role->dma_desc_cnt)\n#else\n#define MAX_AUDIO_BUFFER_COUNT 4\n#define AUDIO_BUFFER_COUNT MAX_AUDIO_BUFFER_COUNT\n#if (AUDIO_BUFFER_COUNT & 0x1)\n#error \"AUDIO_BUFFER_COUNT must be an even number\"\n#endif\n#endif\n\n/* internal use */\nenum AF_BOOL_T { AF_FALSE = 0, AF_TRUE = 1 };\n\nenum AF_RESULT_T { AF_RES_SUCCESS = 0, AF_RES_FAILD = 1 };\n\nenum AF_DAC_PA_STATE_T {\n  AF_DAC_PA_NULL,\n  AF_DAC_PA_ON_TRIGGER,\n  AF_DAC_PA_ON_SOFT_START,\n  AF_DAC_PA_OFF_TRIGGER,\n  AF_DAC_PA_OFF_SOFT_END,\n  AF_DAC_PA_OFF_SOFT_END_DONE,\n  AF_DAC_PA_OFF_DC_START,\n};\n\n// status machine\nenum AF_STATUS_T {\n  AF_STATUS_NULL = 0x00,\n  AF_STATUS_OPEN_CLOSE = 0x01,\n  AF_STATUS_STREAM_OPEN_CLOSE = 0x02,\n  AF_STATUS_STREAM_START_STOP = 0x04,\n  AF_STATUS_STREAM_PAUSE_RESTART = 0x08,\n  AF_STATUS_MASK = 0x0F,\n};\n\nstruct af_stream_ctl_t {\n  enum AF_PP_T pp_index; // pingpong operate\n  uint8_t pp_cnt;        // use to count the lost signals\n  uint8_t status;        // status machine\n  enum AUD_STREAM_USE_DEVICE_T use_device;\n};\n\nstruct af_stream_cfg_t {\n  // used inside\n  struct af_stream_ctl_t ctl;\n\n  // dma buf parameters, RAM can be alloced in different way\n  uint8_t *dma_buf_ptr;\n  uint32_t dma_buf_size;\n\n  // store stream cfg parameters\n  struct AF_STREAM_CONFIG_T cfg;\n\n  // dma cfg parameters\n#ifdef DYNAMIC_AUDIO_BUFFER_COUNT\n  uint8_t dma_desc_cnt;\n#endif\n  struct HAL_DMA_DESC_T dma_desc[MAX_AUDIO_BUFFER_COUNT];\n  struct HAL_DMA_CH_CFG_T dma_cfg;\n\n  // callback function\n  AF_STREAM_HANDLER_T handler;\n};\n\nstatic struct af_stream_cfg_t af_stream[AUD_STREAM_ID_NUM][AUD_STREAM_NUM];\nstatic uint8_t af_sig_lost_cnt[AUD_STREAM_ID_NUM][AUD_STREAM_NUM];\n\nstatic AF_CODEC_PLAYBACK_POST_HANDLER_T codec_play_post_hdlr;\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\nvolatile static float saved_output_coef;\n#ifdef AUDIO_OUTPUT_SW_LIMITER\nstatic FloatLimiterPtr FloatLimiterP;\n#else\ntypedef struct {\n  float coefs_b[3];\n  float coefs_a[3];\n  float history_x[2];\n  float history_y[2];\n} SW_GAIN_IIR_T;\nSW_GAIN_IIR_T sw_gain_iir = {\n    .coefs_b = {0.00000042780818597736f, 0.00000085561637195472f,\n                0.00000042780818597736f},\n    .coefs_a = {1.00000000000000000000f, -1.99738371810092970000f,\n                0.99738542933367369000f},\n    .history_x = {0, 0},\n    .history_y = {0, 0},\n};\n#endif\n#endif\n\n#ifdef AUDIO_OUTPUT_DC_CALIB\nstatic bool dac_dc_valid;\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\nstatic int16_t dac_dc[2];\n#endif\n#endif\n\n#if defined(AUDIO_OUTPUT_PA_ON_FADE_IN) || defined(AUDIO_OUTPUT_PA_OFF_FADE_OUT)\nstatic volatile enum AF_DAC_PA_STATE_T dac_pa_state;\nstatic uint32_t dac_dc_start_time;\nstatic uint32_t dac_pa_stop_time;\n#endif\n\n#if defined(AUDIO_OUTPUT_PA_OFF_FADE_OUT) && defined(RTOS)\nstatic osThreadId fade_thread_id;\n#ifdef AF_STREAM_ID_0_PLAYBACK_FADEOUT\n#error \"Cannot enable 2 kinds of fade out codes at the same time\"\n#endif\n#endif\n\n#ifdef RTOS\n\n#ifdef AF_STREAM_ID_0_PLAYBACK_FADEOUT\nstruct af_stream_fade_out_t {\n  bool stop_on_process;\n  uint8_t stop_process_cnt;\n  osThreadId stop_request_tid;\n  uint32_t need_fadeout_len;\n  uint32_t need_fadeout_len_processed;\n};\n\nstatic struct af_stream_fade_out_t af_stream_fade_out = {\n    .stop_on_process = false,\n    .stop_process_cnt = 0,\n    .stop_request_tid = NULL,\n    .need_fadeout_len = 0,\n    .need_fadeout_len_processed = 0,\n};\n#endif\n\nstatic osThreadId af_thread_tid;\n\nstatic void af_thread(void const *argument);\nosThreadDef(af_thread, osPriorityAboveNormal, 1, AF_STACK_SIZE,\n            \"audio_flinger\");\nstatic int af_default_priority;\n\nosMutexId audioflinger_mutex_id = NULL;\nosMutexDef(audioflinger_mutex);\n\nstatic AF_IRQ_NOTIFICATION_T irq_notif;\n\n#else // !RTOS\n\nstatic volatile uint32_t af_flag_lock;\n\n#endif // RTOS\n\n#ifdef CODEC_DSD\nstatic bool af_dsd_enabled;\n#endif\n\nvoid af_lock_thread(void) {\n  void *POSSIBLY_UNUSED lr = __builtin_return_address(0);\n#ifdef RTOS\n  osMutexWait(audioflinger_mutex_id, osWaitForever);\n#else\n  static void *POSSIBLY_UNUSED locked_lr;\n  ASSERT(af_flag_lock == 0, \"audioflinger has been locked by %p. LR=%p\",\n         (void *)locked_lr, (void *)lr);\n  af_flag_lock = 1;\n  locked_lr = lr;\n#endif\n}\n\nvoid af_unlock_thread(void) {\n  void *POSSIBLY_UNUSED lr = __builtin_return_address(0);\n#ifdef RTOS\n  osMutexRelease(audioflinger_mutex_id);\n#else\n  static void *POSSIBLY_UNUSED unlocked_lr;\n  ASSERT(af_flag_lock == 1,\n         \"audioflinger not locked before (lastly unlocked by %p). LR=%p\",\n         (void *)unlocked_lr, (void *)lr);\n  af_flag_lock = 0;\n  unlocked_lr = lr;\n#endif\n}\n\n#if defined(RTOS) && defined(AF_STREAM_ID_0_PLAYBACK_FADEOUT)\nint af_stream_fadeout_start(uint32_t sample) {\n  TRACE(1, \"fadein_config sample:%d\", sample);\n  af_stream_fade_out.need_fadeout_len = sample;\n  af_stream_fade_out.need_fadeout_len_processed = sample;\n  return 0;\n}\n\nint af_stream_fadeout_stop(void) {\n  af_stream_fade_out.stop_process_cnt = 0;\n  af_stream_fade_out.stop_on_process = false;\n  return 0;\n}\n\nuint32_t af_stream_fadeout(int16_t *buf, uint32_t len,\n                           enum AUD_CHANNEL_NUM_T num) {\n  uint32_t i;\n  uint32_t j = 0;\n  uint32_t start;\n  uint32_t end;\n\n  start = af_stream_fade_out.need_fadeout_len_processed;\n  end = af_stream_fade_out.need_fadeout_len_processed > len\n            ? af_stream_fade_out.need_fadeout_len_processed - len\n            : 0;\n\n  if (start <= end) {\n    //        TRACE(0,\"skip fadeout\");\n    memset(buf, 0, len * 2);\n    return len;\n  }\n  //    TRACE(3,\"fadeout l:%d start:%d end:%d\", len, start, end);\n  //    DUMP16(\"%05d \", buf, 10);\n  //    DUMP16(\"%05d \", buf+len-10, 10);\n\n  if (num == AUD_CHANNEL_NUM_1) {\n    for (i = start; i > end; i--) {\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n    }\n  } else if (num == AUD_CHANNEL_NUM_2) {\n    for (i = start; i > end; i -= 2) {\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n    }\n  } else if (num == AUD_CHANNEL_NUM_4) {\n    for (i = start; i > end; i -= 4) {\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n    }\n  } else if (num == AUD_CHANNEL_NUM_8) {\n    for (i = start; i > end; i -= 8) {\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n      *(buf + j) = *(buf + j) * i / af_stream_fade_out.need_fadeout_len;\n      j++;\n    }\n  }\n  af_stream_fade_out.need_fadeout_len_processed -= j;\n\n  //    TRACE(3,\"out i:%d process:%d x:%d\", i,\n  //    af_stream_fade_out.need_fadeout_len_processed,\n  //    end+((start-end)/AUD_CHANNEL_NUM_2)); DUMP16(\"%05d \", buf, 10);\n  //    DUMP16(\"%05d \", buf+len-10, 10);\n\n  return len;\n}\n\nvoid af_stream_stop_wait_finish() {\n  af_stream_fade_out.stop_on_process = true;\n  af_stream_fade_out.stop_request_tid = osThreadGetId();\n  osSignalClear(af_stream_fade_out.stop_request_tid,\n                (1 << AF_FADE_OUT_SIGNAL_ID));\n  af_unlock_thread();\n  osSignalWait((1 << AF_FADE_OUT_SIGNAL_ID), 300);\n  af_lock_thread();\n}\n\nvoid af_stream_stop_process(struct af_stream_cfg_t *af_cfg, uint8_t *buf,\n                            uint32_t len) {\n  af_lock_thread();\n  if (af_stream_fade_out.stop_on_process) {\n    //        TRACE(5,\"%s num:%d size:%d len:%d cnt:%d\", __func__,\n    //        af_cfg->cfg.channel_num, af_cfg->cfg.data_size, len,\n    //        af_stream_fade_out.stop_process_cnt);\n    af_stream_fadeout((int16_t *)buf, len / 2, af_cfg->cfg.channel_num);\n\n    //        TRACE(3,\"process ret:%d %d %d\", *(int16_t *)(buf+len-2-2-2),\n    //        *(int16_t *)(buf+len-2-2), *(int16_t *)(buf+len-2));\n    if (af_stream_fade_out.stop_process_cnt++ > 3) {\n      TRACE(0, \"stop_process end\");\n      osSignalSet(af_stream_fade_out.stop_request_tid,\n                  (1 << AF_FADE_OUT_SIGNAL_ID));\n    }\n  }\n  af_unlock_thread();\n}\n#endif // RTOS && AF_STREAM_ID_0_PLAYBACK_FADEOUT\n\n// used by dma irq and af_thread\nstatic inline struct af_stream_cfg_t *\naf_get_stream_role(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream) {\n  ASSERT(id < AUD_STREAM_ID_NUM, \"[%s] Bad id=%d\", __func__, id);\n  ASSERT(stream < AUD_STREAM_NUM, \"[%s] Bad stream=%d\", __func__, stream);\n\n  return &af_stream[id][stream];\n}\n\nstatic void af_set_status(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream,\n                          enum AF_STATUS_T status) {\n  struct af_stream_cfg_t *role = NULL;\n\n  role = af_get_stream_role(id, stream);\n\n  role->ctl.status |= status;\n}\n\nstatic void af_clear_status(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream,\n                            enum AF_STATUS_T status) {\n  struct af_stream_cfg_t *role = NULL;\n\n  role = af_get_stream_role(id, stream);\n\n  role->ctl.status &= ~status;\n}\n\n// get current stream config parameters\nuint32_t af_stream_get_cfg(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream,\n                           struct AF_STREAM_CONFIG_T **cfg, bool needlock) {\n  AF_TRACE_DEBUG();\n\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n\n  if (needlock) {\n    af_lock_thread();\n  }\n  role = af_get_stream_role(id, stream);\n  // check stream is open\n  if (role->ctl.status & AF_STATUS_STREAM_OPEN_CLOSE) {\n    *cfg = &(role->cfg);\n    ret = AF_RES_SUCCESS;\n  } else {\n    ret = AF_RES_FAILD;\n  }\n  if (needlock) {\n    af_unlock_thread();\n  }\n  return ret;\n}\n\n#if 0\nstatic void af_dump_cfg()\n{\n    struct af_stream_cfg_t *role = NULL;\n\n    TRACE(0,\"dump cfg.........start\");\n    //initial parameter\n    for(uint8_t id=0; id< AUD_STREAM_ID_NUM; id++)\n    {\n        for(uint8_t stream=0; stream < AUD_STREAM_NUM; stream++)\n        {\n            role = af_get_stream_role((enum AUD_STREAM_ID_T)id, (enum AUD_STREAM_T)stream);\n\n            TRACE(2,\"id = %d, stream = %d:\", id, stream);\n            TRACE(1,\"ctl.use_device = %d\", role->ctl.use_device);\n            TRACE(1,\"cfg.device = %d\", role->cfg.device);\n            TRACE(1,\"dma_cfg.ch = %d\", role->dma_cfg.ch);\n        }\n    }\n    TRACE(0,\"dump cfg.........end\");\n}\n#endif\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\nstatic void af_codec_output_gain_changed(float coef) {\n  saved_output_coef = coef;\n}\n#ifndef AUDIO_OUTPUT_SW_LIMITER\nstatic float af_codec_sw_gain_filter(float gain_in) {\n  float gain_out = saved_output_coef * sw_gain_iir.coefs_b[0] +\n                   sw_gain_iir.history_x[0] * sw_gain_iir.coefs_b[1] +\n                   sw_gain_iir.history_x[1] * sw_gain_iir.coefs_b[2] -\n                   sw_gain_iir.history_y[0] * sw_gain_iir.coefs_a[1] -\n                   sw_gain_iir.history_y[1] * sw_gain_iir.coefs_a[2];\n\n  sw_gain_iir.history_y[1] = sw_gain_iir.history_y[0];\n  sw_gain_iir.history_y[0] = gain_out;\n  sw_gain_iir.history_x[1] = sw_gain_iir.history_x[0];\n  sw_gain_iir.history_x[0] = saved_output_coef;\n\n  return gain_out;\n}\nstatic void af_codec_sw_gain_process(uint8_t *buf, uint32_t size,\n                                     enum AUD_BITS_T bits,\n                                     enum AUD_CHANNEL_NUM_T chans) {\n  uint32_t i, pcm_len;\n  int32_t pcm_out;\n  float output_gain = 1.0f;\n\n  // TRACE(1,\"af_codec_sw_gain_process:%d\",(int32_t)(saved_output_coef*1000));\n\n  if (chans == AUD_CHANNEL_NUM_1) {\n    if (bits <= AUD_BITS_16) {\n      pcm_len = size / sizeof(int16_t);\n      int16_t *pcm_buf = (int16_t *)buf;\n      for (i = 0; i < pcm_len; i++) {\n        output_gain = af_codec_sw_gain_filter(saved_output_coef);\n\n        pcm_out = (int32_t)(pcm_buf[i] * output_gain);\n        pcm_buf[i] = __SSAT(pcm_out, 16);\n      }\n    } else {\n      pcm_len = size / sizeof(int32_t);\n      int32_t *pcm_buf = (int32_t *)buf;\n      for (i = 0; i < pcm_len; i++) {\n        output_gain = af_codec_sw_gain_filter(saved_output_coef);\n\n        pcm_out = (int32_t)(pcm_buf[i] * output_gain);\n        pcm_buf[i] = __SSAT(pcm_out, 24);\n      }\n    }\n  } else if (chans == AUD_CHANNEL_NUM_2) {\n    if (bits <= AUD_BITS_16) {\n      pcm_len = size / sizeof(int16_t);\n      int16_t *pcm_buf = (int16_t *)buf;\n      for (i = 0; i < pcm_len; i = i + 2) {\n        output_gain = af_codec_sw_gain_filter(saved_output_coef);\n\n        pcm_out = (int32_t)(pcm_buf[i] * output_gain);\n        pcm_buf[i] = __SSAT(pcm_out, 16);\n        pcm_out = (int32_t)(pcm_buf[i + 1] * output_gain);\n        pcm_buf[i + 1] = __SSAT(pcm_out, 16);\n      }\n    } else {\n      pcm_len = size / sizeof(int32_t);\n      int32_t *pcm_buf = (int32_t *)buf;\n      for (i = 0; i < pcm_len; i = i + 2) {\n        output_gain = af_codec_sw_gain_filter(saved_output_coef);\n\n        pcm_out = (int32_t)(pcm_buf[i] * output_gain);\n        pcm_buf[i] = __SSAT(pcm_out, 24);\n        pcm_out = (int32_t)(pcm_buf[i + 1] * output_gain);\n        pcm_buf[i + 1] = __SSAT(pcm_out, 24);\n      }\n    }\n  }\n}\n#endif\n#endif // AUDIO_OUTPUT_SW_GAIN\n\nstatic uint32_t POSSIBLY_UNUSED af_codec_get_sample_count(\n    uint32_t size, enum AUD_BITS_T bits, enum AUD_CHANNEL_NUM_T chans) {\n  uint32_t div;\n\n  if (bits <= AUD_BITS_16) {\n    div = 2;\n  } else {\n    div = 4;\n  }\n  div *= chans;\n  return size / div;\n}\n\nstatic void POSSIBLY_UNUSED af_zero_mem(void *dst, unsigned int size) {\n  uint32_t *d = dst;\n  uint32_t count = size / 4;\n\n  while (count--) {\n    *d++ = 0;\n  }\n}\n\nstatic bool af_codec_playback_pre_handler(uint8_t *buf, uint32_t len,\n                                          const struct af_stream_cfg_t *role) {\n  uint32_t POSSIBLY_UNUSED time;\n\n  if (0) {\n\n#ifdef AUDIO_OUTPUT_PA_ON_FADE_IN\n  } else if (dac_pa_state == AF_DAC_PA_ON_TRIGGER &&\n             (time = hal_sys_timer_get()) - dac_dc_start_time >=\n                 AF_CODEC_DC_STABLE_INTERVAL &&\n             time - dac_pa_stop_time >= AF_CODEC_PA_RESTART_INTERVAL) {\n    analog_aud_codec_speaker_enable(true);\n    dac_pa_state = AF_DAC_PA_NULL;\n#endif // AUDIO_OUTPUT_PA_ON_FADE_IN\n\n#ifdef AUDIO_OUTPUT_PA_OFF_FADE_OUT\n  } else if (dac_pa_state == AF_DAC_PA_OFF_TRIGGER) {\n    dac_dc_start_time = hal_sys_timer_get();\n    dac_pa_state = AF_DAC_PA_OFF_DC_START;\n  } else if (dac_pa_state == AF_DAC_PA_OFF_DC_START) {\n    time = hal_sys_timer_get();\n    if (time - dac_dc_start_time >= AF_CODEC_DC_STABLE_INTERVAL) {\n      dac_pa_state = AF_DAC_PA_NULL;\n      analog_aud_codec_speaker_enable(false);\n      dac_pa_stop_time = time;\n#ifdef RTOS\n      osSignalSet(fade_thread_id, (1 << AF_FADE_OUT_SIGNAL_ID));\n#endif\n    }\n#endif // AUDIO_OUTPUT_PA_OFF_FADE_OUT\n  }\n\n#if defined(AUDIO_OUTPUT_PA_ON_FADE_IN) || defined(AUDIO_OUTPUT_PA_OFF_FADE_OUT)\n  if (dac_pa_state == AF_DAC_PA_ON_TRIGGER ||\n      dac_pa_state == AF_DAC_PA_OFF_DC_START) {\n    af_zero_mem(buf, len);\n    return true;\n  }\n#endif\n\n  return false;\n}\n\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\nstatic void af_codec_playback_sw_dc_calib(uint8_t *buf, uint32_t len,\n                                          enum AUD_BITS_T bits,\n                                          enum AUD_CHANNEL_NUM_T chans) {\n  uint32_t cnt;\n\n  if (bits <= AUD_BITS_16) {\n    int16_t *ptr16 = (int16_t *)buf;\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n    int16_t dc_l = dac_dc[0];\n    int16_t dc_r = dac_dc[1];\n#endif\n    if (chans == AUD_CHANNEL_NUM_1) {\n      cnt = len / sizeof(int16_t);\n      while (cnt-- > 0) {\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n        *ptr16 = __SSAT(*ptr16 + dc_l, 16);\n#endif\n        ptr16++;\n      }\n    } else {\n      cnt = len / sizeof(int16_t) / 2;\n      while (cnt-- > 0) {\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n        *ptr16 = __SSAT(*ptr16 + dc_l, 16);\n        *(ptr16 + 1) = __SSAT(*(ptr16 + 1) + dc_r, 16);\n#endif\n        ptr16 += 2;\n      }\n    }\n  } else {\n    int32_t *ptr32 = (int32_t *)buf;\n    int32_t dac_bits =\n#ifdef CHIP_BEST1000\n        CODEC_PLAYBACK_BIT_DEPTH;\n#else\n        24;\n#endif\n    int32_t val_shift;\n\n    if (dac_bits < 24) {\n      val_shift = 24 - dac_bits;\n    } else {\n      val_shift = 0;\n    }\n\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n    int32_t dc_l = dac_dc[0] << 8;\n    int32_t dc_r = dac_dc[1] << 8;\n#endif\n    if (chans == AUD_CHANNEL_NUM_1) {\n      cnt = len / sizeof(int32_t);\n      while (cnt-- > 0) {\n#ifdef CORRECT_SAMPLE_VALUE\n        *ptr32 = ((*ptr32) << (32 - dac_bits)) >> (32 - dac_bits);\n#endif\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n        *ptr32 = __SSAT((*ptr32 + dc_l) >> val_shift, dac_bits);\n#elif defined(CORRECT_SAMPLE_VALUE)\n        *ptr32 = __SSAT(*ptr32 >> val_shift, dac_bits);\n#else\n        *ptr32 = *ptr32 >> val_shift;\n#endif\n        ptr32++;\n      }\n    } else {\n      cnt = len / sizeof(int32_t) / 2;\n      while (cnt-- > 0) {\n#ifdef CORRECT_SAMPLE_VALUE\n        *ptr32 = ((*ptr32) << (32 - dac_bits)) >> (32 - dac_bits);\n        *(ptr32 + 1) = ((*(ptr32 + 1)) << (32 - dac_bits)) >> (32 - dac_bits);\n#endif\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n        *ptr32 = __SSAT((*ptr32 + dc_l) >> val_shift, dac_bits);\n        *(ptr32 + 1) = __SSAT((*(ptr32 + 1) + dc_r) >> val_shift, dac_bits);\n#elif defined(CORRECT_SAMPLE_VALUE)\n        *ptr32 = __SSAT(*ptr32 >> val_shift, dac_bits);\n        *(ptr32 + 1) = __SSAT(*(ptr32 + 1) >> val_shift, dac_bits);\n#else\n        *ptr32 = *ptr32 >> val_shift;\n        *(ptr32 + 1) = *(ptr32 + 1) >> val_shift;\n#endif\n        ptr32 += 2;\n      }\n    }\n  }\n}\n#endif // AUDIO_OUTPUT_DC_CALIB_SW\n\nstatic void af_codec_playback_post_handler(uint8_t *buf, uint32_t len,\n                                           const struct af_stream_cfg_t *role) {\n  POSSIBLY_UNUSED enum AUD_BITS_T bits;\n  POSSIBLY_UNUSED enum AUD_CHANNEL_NUM_T chans;\n  POSSIBLY_UNUSED uint32_t cnt;\n\n  bits = role->cfg.bits;\n  chans = role->cfg.channel_num;\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n#ifdef AUDIO_OUTPUT_SW_LIMITER\n  if (bits <= AUD_BITS_16) {\n    cnt = len / sizeof(int16_t);\n  } else {\n    cnt = len / sizeof(int32_t);\n  }\n  ApplyFloatLimiter(FloatLimiterP, buf, saved_output_coef, cnt);\n#else\n  af_codec_sw_gain_process(buf, len, bits, chans);\n#endif\n#endif\n\n  if (codec_play_post_hdlr) {\n    codec_play_post_hdlr(buf, len, (void *)&role->cfg);\n  }\n\n#if defined(AUDIO_OUTPUT_INVERT_RIGHT_CHANNEL)\n  if (chans == AUD_CHANNEL_NUM_2) {\n    if (bits == AUD_BITS_16) {\n      int16_t *buf16 = (int16_t *)buf;\n      for (int i = 1; i < len / sizeof(int16_t); i += 2) {\n        int32_t tmp = -buf16[i];\n        buf16[i] = __SSAT(tmp, 16);\n      }\n    } else {\n      int32_t *buf32 = (int32_t *)buf;\n      for (int i = 1; i < len / sizeof(int32_t); i += 2) {\n        int32_t tmp = -buf32[i];\n        buf32[i] = __SSAT(tmp, 24);\n      }\n    }\n  }\n#endif\n\n#if (defined(CHIP_BEST1000) || defined(CHIP_BEST2000)) &&                      \\\n    defined(AUDIO_OUTPUT_CALIB_GAIN_MISSMATCH)\n  // gain must less than 1.0\n  float gain = 0.9441f;\n  if (chans == AUD_CHANNEL_NUM_2) {\n    if (bits == AUD_BITS_16) {\n      int16_t *buf16 = (int16_t *)buf;\n      for (int i = 1; i < len / sizeof(int16_t); i += 2) {\n        int32_t tmp = (int)(buf16[i + 1] * gain);\n        buf16[i + 1] = __SSAT(tmp, 16);\n      }\n    } else {\n      int32_t *buf32 = (int32_t *)buf;\n      for (int i = 1; i < len / sizeof(int32_t); i += 2) {\n        int32_t tmp = (int)(buf32[i + 1] * gain);\n        buf32[i + 1] = __SSAT(tmp, 24);\n      }\n    }\n  }\n#endif\n\n#if defined(AUDIO_OUTPUT_DC_CALIB_SW)\n  af_codec_playback_sw_dc_calib(buf, len, bits, chans);\n#elif defined(CHIP_BEST1000)\n  if (bits == AUD_BITS_24 || bits == AUD_BITS_32) {\n    int32_t *ptr32 = (int32_t *)buf;\n    int32_t val_shift;\n\n    if (bits == AUD_BITS_24) {\n      val_shift = 24 - CODEC_PLAYBACK_BIT_DEPTH;\n    } else {\n      val_shift = 32 - CODEC_PLAYBACK_BIT_DEPTH;\n    }\n\n    cnt = len / sizeof(int32_t);\n    while (cnt-- > 0) {\n      *ptr32 >>= val_shift;\n      ptr32++;\n    }\n  }\n#endif\n\n#if defined(CHIP_BEST1000) && defined(AUDIO_OUTPUT_GAIN_M60DB_CHECK)\n  hal_codec_dac_gain_m60db_check(HAL_CODEC_PERF_TEST_M60DB);\n#endif\n}\n\nstatic inline void af_thread_stream_handler(enum AUD_STREAM_ID_T id,\n                                            enum AUD_STREAM_T stream) {\n  uint32_t lock;\n  struct af_stream_cfg_t *role;\n  uint32_t dma_addr, hw_pos;\n  uint8_t *buf;\n  uint32_t len;\n  uint32_t pp_cnt;\n  bool codec_playback;\n  bool skip_handler;\n  enum AF_PP_T pp_index;\n\n  role = af_get_stream_role(id, stream);\n\n  af_lock_thread();\n\n  if (role->handler && (role->ctl.status & AF_STATUS_STREAM_START_STOP)) {\n    lock = int_lock();\n    pp_cnt = role->ctl.pp_cnt;\n    role->ctl.pp_cnt = 0;\n    int_unlock(lock);\n\n    af_sig_lost_cnt[id][stream] = pp_cnt - 1;\n    if (af_sig_lost_cnt[id][stream]) {\n      TRACE(3, \"af_thread:WARNING: id=%d stream=%d lost %u signals\", id, stream,\n            af_sig_lost_cnt[id][stream]);\n    }\n\n    pp_index = PP_PINGPANG(role->ctl.pp_index);\n\n    // Get PP index from accurate DMA pos\n    dma_addr = af_stream_get_cur_dma_addr(id, stream);\n    hw_pos = dma_addr - (uint32_t)role->dma_buf_ptr;\n    if (hw_pos > role->dma_buf_size) {\n      TRACE(\n          3,\n          \"af_thread: Failed to get valid dma addr for id=%d stream=%d: 0x%08x\",\n          id, stream, dma_addr);\n    }\n#ifndef CHIP_BEST1000\n    if (role->cfg.chan_sep_buf && role->cfg.channel_num > AUD_CHANNEL_NUM_1) {\n      uint32_t chan_size;\n\n      chan_size = role->dma_buf_size / role->cfg.channel_num;\n\n      if (hw_pos <= role->dma_buf_size) {\n        hw_pos = hw_pos % chan_size;\n        if (hw_pos < chan_size / 2) {\n          pp_index = PP_PANG;\n        } else if (hw_pos < chan_size) {\n          pp_index = PP_PING;\n        }\n      }\n      if (pp_index == PP_PING) {\n        buf = role->dma_buf_ptr;\n      } else {\n        buf = role->dma_buf_ptr + chan_size / 2;\n      }\n    } else\n#endif\n    {\n      if (hw_pos < role->dma_buf_size / 2) {\n        pp_index = PP_PANG;\n      } else if (hw_pos < role->dma_buf_size) {\n        pp_index = PP_PING;\n      }\n      if (pp_index == PP_PING) {\n        buf = role->dma_buf_ptr;\n      } else {\n        buf = role->dma_buf_ptr + role->dma_buf_size / 2;\n      }\n    }\n\n    if (stream == AUD_STREAM_PLAYBACK &&\n        role->ctl.use_device == AUD_STREAM_USE_INT_CODEC) {\n      codec_playback = true;\n    } else {\n      codec_playback = false;\n    }\n\n    skip_handler = false;\n    len = role->dma_buf_size / 2;\n\n    if (codec_playback) {\n      skip_handler = af_codec_playback_pre_handler(buf, len, role);\n    }\n\n    if (!skip_handler) {\n#ifdef __RAND_FROM_MIC__\n      if ((AUD_STREAM_CAPTURE == stream) &&\n          (AUD_STREAM_USE_INT_CODEC == role->cfg.device)) {\n        random_data_process(buf, role->dma_buf_size / 2, role->cfg.bits,\n                            role->cfg.channel_num);\n      }\n#endif\n      role->handler(buf, len);\n    }\n\n    if (codec_playback) {\n      af_codec_playback_post_handler(buf, len, role);\n    }\n\n#if defined(RTOS) && defined(AF_STREAM_ID_0_PLAYBACK_FADEOUT)\n    af_stream_stop_process(role, buf, len);\n#endif\n\n    if (role->ctl.pp_cnt) {\n      TRACE(3,\n            \"af_thread:WARNING: id=%d stream=%d hdlr ran too long (pp_cnt=%u)\",\n            id, stream, role->ctl.pp_cnt);\n    }\n  }\n\n  af_unlock_thread();\n}\n\n#ifdef RTOS\n\nstatic void af_thread(void const *argument) {\n  osEvent evt;\n  uint32_t signals = 0;\n  enum AUD_STREAM_ID_T id;\n  enum AUD_STREAM_T stream;\n\n  while (1) {\n    // wait any signal\n    evt = osSignalWait(0x0, osWaitForever);\n    signals = evt.value.signals;\n    //        TRACE(3,\"[%s] status = %x, signals = %d\", __func__, evt.status,\n    //        evt.value.signals);\n\n    if (evt.status == osEventSignal) {\n      for (uint8_t i = 0; i < AUD_STREAM_ID_NUM * AUD_STREAM_NUM; i++) {\n        if (signals & (1 << i)) {\n          id = (enum AUD_STREAM_ID_T)(i >> 1);\n          stream = (enum AUD_STREAM_T)(i & 1);\n\n          af_thread_stream_handler(id, stream);\n        }\n      }\n    } else {\n      TRACE(2, \"[%s] ERROR: evt.status = %d\", __func__, evt.status);\n      continue;\n    }\n  }\n}\n\n#else // !RTOS\n\n#include \"cmsis.h\"\nstatic volatile uint32_t af_flag_open;\nstatic volatile uint32_t af_flag_signal;\n\nstatic void af_set_flag(volatile uint32_t *flag, uint32_t set) {\n  uint32_t lock;\n\n  lock = int_lock();\n  *flag |= set;\n  int_unlock(lock);\n}\n\nstatic void af_clear_flag(volatile uint32_t *flag, uint32_t clear) {\n  uint32_t lock;\n\n  lock = int_lock();\n  *flag &= ~clear;\n  int_unlock(lock);\n}\n\nstatic bool af_flag_active(volatile uint32_t *flag, uint32_t bits) {\n  return !!(*flag & bits);\n}\n\nvoid af_thread(void const *argument) {\n  uint32_t lock;\n  uint32_t i;\n  enum AUD_STREAM_ID_T id;\n  enum AUD_STREAM_T stream;\n\n  if (af_flag_open == 0) {\n    return;\n  }\n\n  for (i = 0; i < AUD_STREAM_ID_NUM * AUD_STREAM_NUM; i++) {\n    if (!af_flag_active(&af_flag_signal, 1 << i)) {\n      continue;\n    }\n    af_clear_flag(&af_flag_signal, 1 << i);\n\n    id = (enum AUD_STREAM_ID_T)(i >> 1);\n    stream = (enum AUD_STREAM_T)(i & 1);\n\n    af_thread_stream_handler(id, stream);\n  }\n\n  lock = int_lock();\n  if (af_flag_signal == 0) {\n    hal_cpu_wake_unlock(AF_CPU_WAKE_USER);\n  }\n  int_unlock(lock);\n}\n\n#endif // !RTOS\n\nstatic void af_dma_irq_handler(uint8_t ch, uint32_t remain_dst_tsize,\n                               uint32_t error, struct HAL_DMA_DESC_T *lli) {\n  struct af_stream_cfg_t *role = NULL;\n\n  // initial parameter\n  for (uint8_t id = 0; id < AUD_STREAM_ID_NUM; id++) {\n    for (uint8_t stream = 0; stream < AUD_STREAM_NUM; stream++) {\n      role = af_get_stream_role((enum AUD_STREAM_ID_T)id,\n                                (enum AUD_STREAM_T)stream);\n\n      if (role->dma_cfg.ch == ch) {\n        role->ctl.pp_index = PP_PINGPANG(role->ctl.pp_index);\n        role->ctl.pp_cnt++;\n        // TRACE(4,\"[%s] id = %d, stream = %d, ch = %d\", __func__, id, stream,\n        // ch); TRACE(2,\"[%s] PLAYBACK pp_cnt = %d\", __func__,\n        // role->ctl.pp_cnt);\n#ifdef RTOS\n        if (irq_notif) {\n          irq_notif(id, stream);\n        }\n        osSignalSet(af_thread_tid, 0x01 << (id * 2 + stream));\n#else\n        af_set_flag(&af_flag_signal, 0x01 << (id * 2 + stream));\n        hal_cpu_wake_lock(AF_CPU_WAKE_USER);\n#endif\n        return;\n      }\n    }\n  }\n\n  // invalid dma irq\n  ASSERT(0, \"[%s] ERROR: channel id = %d\", __func__, ch);\n}\n\n#ifdef __CODEC_ASYNC_CLOSE__\nstatic void af_codec_async_close(void) {\n  af_lock_thread();\n  codec_int_close(CODEC_CLOSE_ASYNC_REAL);\n  af_unlock_thread();\n}\n#endif\n\nvoid *af_thread_tid_get(void) {\n#ifdef RTOS\n  return (void *)af_thread_tid;\n#else\n  return NULL;\n#endif\n}\n\n#ifdef CODEC_ANC_BOOST\nstatic void af_codec_anc_boost_delay(uint32_t ms) {\n  af_unlock_thread();\n\n  osDelay(ms);\n\n  af_lock_thread();\n}\n#endif\n\nuint32_t af_open(void) {\n  AF_TRACE_DEBUG();\n  struct af_stream_cfg_t *role = NULL;\n\n#ifdef RTOS\n  if (audioflinger_mutex_id == NULL) {\n    audioflinger_mutex_id = osMutexCreate((osMutex(audioflinger_mutex)));\n  }\n#endif\n\n  af_lock_thread();\n\n#ifdef AUDIO_OUTPUT_DC_CALIB\n  if (!dac_dc_valid) {\n    int16_t dc_l, dc_r;\n    uint16_t max_dc;\n    float attn;\n\n    dac_dc_valid = true;\n    analog_aud_get_dc_calib_value(&dc_l, &dc_r);\n    if (ABS(dc_l) >= ABS(dc_r)) {\n      max_dc = ABS(dc_l);\n    } else {\n      max_dc = ABS(dc_r);\n    }\n    ASSERT(max_dc + 1 < AF_CODEC_DC_MAX_SCALE, \"Bad dc values: (%d, %d)\", dc_l,\n           dc_r);\n    if (max_dc) {\n      attn = 1 - (float)(max_dc + 1) / AF_CODEC_DC_MAX_SCALE;\n    } else {\n      attn = 1;\n    }\n    hal_codec_set_dac_dc_gain_attn(attn);\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n    dac_dc[0] = dc_l;\n    dac_dc[1] = dc_r;\n#else\n    hal_codec_set_dac_dc_offset(dc_l, dc_r);\n#endif\n  }\n#endif\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n  hal_codec_set_sw_output_coef_callback(af_codec_output_gain_changed);\n#endif\n\n#ifdef __CODEC_ASYNC_CLOSE__\n  codec_int_set_close_handler(af_codec_async_close);\n#endif\n\n#ifdef CODEC_ANC_BOOST\n  codec_set_anc_boost_delay_func(af_codec_anc_boost_delay);\n#endif\n\n  // initial parameters\n  for (uint8_t id = 0; id < AUD_STREAM_ID_NUM; id++) {\n    for (uint8_t stream = 0; stream < AUD_STREAM_NUM; stream++) {\n      role = af_get_stream_role((enum AUD_STREAM_ID_T)id,\n                                (enum AUD_STREAM_T)stream);\n\n      if (role->ctl.status == AF_STATUS_NULL) {\n        role->dma_buf_ptr = NULL;\n        role->dma_buf_size = 0;\n        role->ctl.pp_index = PP_PING;\n        role->ctl.status = AF_STATUS_OPEN_CLOSE;\n        role->ctl.use_device = AUD_STREAM_USE_DEVICE_NULL;\n        role->dma_cfg.ch = HAL_DMA_CHAN_NONE;\n      } else {\n        ASSERT(0, \"[%s] ERROR: id = %d, stream = %d\", __func__, id, stream);\n      }\n    }\n  }\n\n#ifdef RTOS\n  af_thread_tid = osThreadCreate(osThread(af_thread), NULL);\n  af_default_priority = af_get_priority();\n  osSignalSet(af_thread_tid, 0x0);\n#endif\n#ifdef __RAND_FROM_MIC__\n  randInit();\n#endif\n  af_unlock_thread();\n\n  return AF_RES_SUCCESS;\n}\n\nstatic void af_stream_update_dma_buffer(enum AUD_STREAM_T stream,\n                                        struct af_stream_cfg_t *role,\n                                        const struct AF_STREAM_CONFIG_T *cfg) {\n  int i;\n  enum HAL_DMA_RET_T dma_ret;\n  struct HAL_DMA_DESC_T *dma_desc, *next_desc;\n  struct HAL_DMA_CH_CFG_T *dma_cfg;\n  int irq;\n  uint32_t desc_xfer_size;\n  uint32_t align;\n  uint8_t samp_size;\n  enum HAL_DMA_WDITH_T width;\n#ifndef CHIP_BEST1000\n  bool dma_2d_en;\n  uint32_t chan_desc_xfer_size = 0;\n#endif\n\n  dma_desc = &role->dma_desc[0];\n  dma_cfg = &role->dma_cfg;\n\n#ifdef CODEC_DSD\n  if (stream == AUD_STREAM_PLAYBACK &&\n      role->cfg.device == AUD_STREAM_USE_INT_CODEC) {\n    if (dma_cfg->dst_periph == HAL_AUDMA_DSD_TX) {\n      dma_cfg->dst_bsize = HAL_DMA_BSIZE_1;\n    } else {\n      dma_cfg->dst_bsize = HAL_DMA_BSIZE_4;\n    }\n  }\n#endif\n\n  if (role->cfg.device == AUD_STREAM_USE_BT_PCM) {\n    dma_cfg->dst_bsize = HAL_DMA_BSIZE_1;\n    dma_cfg->src_bsize = HAL_DMA_BSIZE_1;\n    dma_cfg->try_burst = 0;\n  }\n\n  role->dma_buf_ptr = cfg->data_ptr;\n  role->dma_buf_size = cfg->data_size;\n\n  if (cfg->bits == AUD_BITS_24 || cfg->bits == AUD_BITS_32) {\n    width = HAL_DMA_WIDTH_WORD;\n    samp_size = 4;\n  } else if (cfg->bits == AUD_BITS_16) {\n    width = HAL_DMA_WIDTH_HALFWORD;\n    samp_size = 2;\n  } else {\n    ASSERT(false, \"%s: Invalid stream config bits=%d\", __func__, cfg->bits);\n    width = HAL_DMA_WIDTH_BYTE;\n    samp_size = 1;\n  }\n\n#ifdef DYNAMIC_AUDIO_BUFFER_COUNT\n  uint32_t desc_cnt;\n\n  desc_cnt = (cfg->data_size / samp_size + HAL_DMA_MAX_DESC_XFER_SIZE - 1) /\n             HAL_DMA_MAX_DESC_XFER_SIZE;\n  if (desc_cnt < 2) {\n    desc_cnt = 2;\n  } else if (desc_cnt & (desc_cnt - 1)) {\n    desc_cnt = 1 << (31 - __CLZ(desc_cnt) + 1);\n  }\n  TRACE(4, \"%s: desc_cnt=%u data_size=%u samp_size=%u\", __func__, desc_cnt,\n        cfg->data_size, samp_size);\n  ASSERT(MIN_AUDIO_BUFFER_COUNT <= desc_cnt &&\n             desc_cnt <= MAX_AUDIO_BUFFER_COUNT,\n         \"%s: Bad desc_cnt=%u\", __func__, desc_cnt);\n  role->dma_desc_cnt = desc_cnt;\n#endif\n\n  desc_xfer_size = cfg->data_size / AUDIO_BUFFER_COUNT;\n\n#ifndef CHIP_BEST1000\n  if (cfg->chan_sep_buf && cfg->channel_num > AUD_CHANNEL_NUM_1) {\n    dma_2d_en = true;\n  } else {\n    dma_2d_en = false;\n  }\n\n  if (dma_2d_en) {\n    enum HAL_DMA_BSIZE_T bsize;\n    uint8_t burst_size;\n\n    chan_desc_xfer_size = desc_xfer_size / cfg->channel_num;\n\n    if (stream == AUD_STREAM_PLAYBACK) {\n      bsize = dma_cfg->src_bsize;\n    } else {\n      bsize = dma_cfg->dst_bsize;\n    }\n    if (bsize == HAL_DMA_BSIZE_1) {\n      burst_size = 1;\n    } else if (bsize == HAL_DMA_BSIZE_4) {\n      burst_size = 4;\n    } else {\n      burst_size = 8;\n    }\n    align = burst_size * samp_size * cfg->channel_num;\n    // Ensure word-aligned too\n    if (align & 0x1) {\n      align *= 4;\n    } else if (align & 0x2) {\n      align *= 2;\n    }\n  } else\n#endif\n  {\n    align = 4;\n  }\n  ASSERT(desc_xfer_size * AUDIO_BUFFER_COUNT == cfg->data_size &&\n             (desc_xfer_size % align) == 0,\n         \"%s: Dma data size is not aligned: data_size=%u AUDIO_BUFFER_COUNT=%u \"\n         \"align=%u\",\n         __func__, cfg->data_size, AUDIO_BUFFER_COUNT, align);\n\n  dma_cfg->dst_width = width;\n  dma_cfg->src_width = width;\n  dma_cfg->src_tsize = desc_xfer_size / samp_size;\n\n  for (i = 0; i < AUDIO_BUFFER_COUNT; i++) {\n    if (i == AUDIO_BUFFER_COUNT - 1) {\n      next_desc = &dma_desc[0];\n      irq = 1;\n    } else {\n      next_desc = &dma_desc[i + 1];\n      if (i == AUDIO_BUFFER_COUNT / 2 - 1) {\n        irq = 1;\n      } else {\n        irq = 0;\n      }\n    }\n\n    if (stream == AUD_STREAM_PLAYBACK) {\n#ifndef CHIP_BEST1000\n      if (dma_2d_en) {\n        dma_cfg->src = (uint32_t)(role->dma_buf_ptr + chan_desc_xfer_size * i);\n      } else\n#endif\n      {\n        dma_cfg->src = (uint32_t)(role->dma_buf_ptr + desc_xfer_size * i);\n      }\n    } else {\n#ifndef CHIP_BEST1000\n      if (dma_2d_en) {\n        dma_cfg->dst = (uint32_t)(role->dma_buf_ptr + chan_desc_xfer_size * i);\n      } else\n#endif\n      {\n        dma_cfg->dst = (uint32_t)(role->dma_buf_ptr + desc_xfer_size * i);\n      }\n    }\n\n    dma_ret = hal_audma_init_desc(&dma_desc[i], dma_cfg, next_desc, irq);\n    ASSERT(dma_ret == HAL_DMA_OK,\n           \"[%s] Failed to init dma desc for stream %d: ret=%d\", __func__,\n           stream, dma_ret);\n  }\n}\n\n// Support memory<-->peripheral\n// Note: Do not support peripheral <--> peripheral\nuint32_t af_stream_open(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream,\n                        const struct AF_STREAM_CONFIG_T *cfg) {\n  AF_TRACE_DEBUG();\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n  enum AUD_STREAM_USE_DEVICE_T device;\n  struct HAL_DMA_CH_CFG_T *dma_cfg = NULL;\n\n#ifdef __RAND_FROM_MIC__\n  random_status_sync();\n#endif\n\n  role = af_get_stream_role(id, stream);\n  TRACE(3, \"[%s] id = %d, stream = %d\", __func__, id, stream);\n\n  ASSERT(cfg->data_ptr != NULL, \"[%s] ERROR: data_ptr == NULL!!!\", __func__);\n  ASSERT(((uint32_t)cfg->data_ptr) % 4 == 0,\n         \"[%s] ERROR: data_ptr(%p) is not align!!!\", __func__, cfg->data_ptr);\n  ASSERT(cfg->data_size != 0, \"[%s] ERROR: data_size == 0!!!\", __func__);\n#ifndef CHIP_BEST1000\n  if (cfg->chan_sep_buf && cfg->channel_num > AUD_CHANNEL_NUM_1) {\n    ASSERT(cfg->device == AUD_STREAM_USE_INT_CODEC ||\n               cfg->device == AUD_STREAM_USE_I2S0_MASTER ||\n               cfg->device == AUD_STREAM_USE_I2S0_SLAVE ||\n               cfg->device == AUD_STREAM_USE_I2S1_MASTER ||\n               cfg->device == AUD_STREAM_USE_I2S1_SLAVE ||\n               cfg->device == AUD_STREAM_USE_TDM0_MASTER ||\n               cfg->device == AUD_STREAM_USE_TDM0_SLAVE ||\n               cfg->device == AUD_STREAM_USE_TDM1_MASTER ||\n               cfg->device == AUD_STREAM_USE_TDM1_SLAVE,\n           \"[%s] ERROR: Unsupport chan_sep_buf for device %d\", __func__,\n           cfg->device);\n  }\n#endif\n\n  ret = AF_RES_FAILD;\n\n  af_lock_thread();\n\n  // check af is open\n  if (role->ctl.status != AF_STATUS_OPEN_CLOSE) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    goto _exit;\n  }\n\n  role->cfg = *cfg;\n\n  device = cfg->device;\n  role->ctl.use_device = device;\n\n  dma_cfg = &role->dma_cfg;\n  memset(dma_cfg, 0, sizeof(*dma_cfg));\n\n  if (device == AUD_STREAM_USE_BT_PCM) {\n    dma_cfg->dst_bsize = HAL_DMA_BSIZE_1;\n    dma_cfg->src_bsize = HAL_DMA_BSIZE_1;\n    dma_cfg->try_burst = 0;\n  } else {\n    dma_cfg->dst_bsize = HAL_DMA_BSIZE_4;\n\n#ifndef CHIP_BEST1000\n    // If channel num > 1, burst size should be set to 1 for:\n    // 1) all playback streams with 2D DMA enabled; or\n    // 2) internal codec capture streams with 2D DMA disabled.\n    if (cfg->channel_num > AUD_CHANNEL_NUM_1 &&\n        ((stream == AUD_STREAM_PLAYBACK && cfg->chan_sep_buf) ||\n         (device == AUD_STREAM_USE_INT_CODEC && stream == AUD_STREAM_CAPTURE &&\n          !cfg->chan_sep_buf))) {\n      dma_cfg->src_bsize = HAL_DMA_BSIZE_1;\n    } else\n#endif\n    {\n      dma_cfg->src_bsize = HAL_DMA_BSIZE_4;\n    }\n    dma_cfg->try_burst = 1;\n  }\n\n  dma_cfg->handler = af_dma_irq_handler;\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    AF_TRACE_DEBUG();\n    dma_cfg->src_periph = (enum HAL_DMA_PERIPH_T)0;\n    dma_cfg->type = HAL_DMA_FLOW_M2P_DMA;\n\n    // open device and stream\n    if (0) {\n\n    }\n#ifdef AF_DEVICE_EXT_CODEC\n    else if (device == AUD_STREAM_USE_EXT_CODEC) {\n      AF_TRACE_DEBUG();\n      tlv32aic32_open();\n      tlv32aic32_stream_open(stream);\n\n      dma_cfg->dst_periph = HAL_AUDMA_I2S0_TX;\n    }\n#endif\n#ifdef AF_DEVICE_I2S\n    else if (device == AUD_STREAM_USE_I2S0_MASTER) {\n      AF_TRACE_DEBUG();\n      hal_i2s_open(HAL_I2S_ID_0, stream, HAL_I2S_MODE_MASTER);\n      dma_cfg->dst_periph = HAL_AUDMA_I2S0_TX;\n    } else if (device == AUD_STREAM_USE_I2S0_SLAVE) {\n      AF_TRACE_DEBUG();\n      hal_i2s_open(HAL_I2S_ID_0, stream, HAL_I2S_MODE_SLAVE);\n      dma_cfg->dst_periph = HAL_AUDMA_I2S0_TX;\n    }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n    else if (device == AUD_STREAM_USE_I2S1_MASTER) {\n      AF_TRACE_DEBUG();\n      hal_i2s_open(HAL_I2S_ID_1, stream, HAL_I2S_MODE_MASTER);\n      dma_cfg->dst_periph = HAL_AUDMA_I2S1_TX;\n    } else if (device == AUD_STREAM_USE_I2S1_SLAVE) {\n      AF_TRACE_DEBUG();\n      hal_i2s_open(HAL_I2S_ID_1, stream, HAL_I2S_MODE_SLAVE);\n      dma_cfg->dst_periph = HAL_AUDMA_I2S1_TX;\n    }\n#endif\n#endif\n#ifdef AF_DEVICE_TDM\n    else if (device == AUD_STREAM_USE_TDM0_MASTER) {\n      AF_TRACE_DEBUG();\n      hal_tdm_open(HAL_I2S_ID_0, stream, HAL_I2S_MODE_MASTER);\n      dma_cfg->dst_periph = HAL_AUDMA_I2S0_TX;\n    } else if (device == AUD_STREAM_USE_TDM0_SLAVE) {\n      AF_TRACE_DEBUG();\n      hal_tdm_open(HAL_I2S_ID_0, stream, HAL_I2S_MODE_SLAVE);\n      dma_cfg->dst_periph = HAL_AUDMA_I2S0_TX;\n    }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n    else if (device == AUD_STREAM_USE_TDM1_MASTER) {\n      AF_TRACE_DEBUG();\n      hal_tdm_open(HAL_I2S_ID_1, stream, HAL_I2S_MODE_MASTER);\n      dma_cfg->dst_periph = HAL_AUDMA_I2S1_TX;\n    } else if (device == AUD_STREAM_USE_TDM1_SLAVE) {\n      AF_TRACE_DEBUG();\n      hal_tdm_open(HAL_I2S_ID_1, stream, HAL_I2S_MODE_SLAVE);\n      dma_cfg->dst_periph = HAL_AUDMA_I2S1_TX;\n    }\n#endif\n#endif\n#ifdef AF_DEVICE_INT_CODEC\n    else if (device == AUD_STREAM_USE_INT_CODEC) {\n      AF_TRACE_DEBUG();\n      codec_int_open();\n      codec_int_stream_open(stream);\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n#ifdef AUDIO_OUTPUT_SW_LIMITER\n      FLOATLIMITER_ERROR limiter_err;\n\n      if (FloatLimiterP == NULL) {\n        FloatLimiterP = CreateFloatLimiter(\n            FL_ATTACK_DEFAULT_MS, FL_RELEASE_DEFAULT_MS, FL_THRESHOLD,\n            MAX_CHANEL, MAX_SAMPLERATE, MAX_SAMPLEBIT);\n      }\n\n      limiter_err = SetFloatLimiterNChannels(FloatLimiterP, cfg->channel_num);\n      if (limiter_err != FLOATLIMIT_OK) {\n        goto _exit;\n      }\n      limiter_err = SetFloatLimiterSampleRate(FloatLimiterP, cfg->sample_rate);\n      if (limiter_err != FLOATLIMIT_OK) {\n        goto _exit;\n      }\n      limiter_err = SetFloatLimiterSampleBit(FloatLimiterP, cfg->bits);\n      if (limiter_err != FLOATLIMIT_OK) {\n        goto _exit;\n      }\n#else\n      sw_gain_iir.history_x[0] = 0.0f;\n      sw_gain_iir.history_x[1] = 0.0f;\n      sw_gain_iir.history_y[0] = 0.0f;\n      sw_gain_iir.history_y[1] = 0.0f;\n#endif\n#endif\n\n#ifdef CODEC_DSD\n      if (af_dsd_enabled) {\n        dma_cfg->dst_periph = HAL_AUDMA_DSD_TX;\n        dma_cfg->dst_bsize = HAL_DMA_BSIZE_1;\n      } else\n#endif\n      {\n        dma_cfg->dst_periph = HAL_AUDMA_CODEC_TX;\n      }\n    }\n#endif\n#ifdef AF_DEVICE_SPDIF\n    else if (device == AUD_STREAM_USE_INT_SPDIF) {\n      AF_TRACE_DEBUG();\n      hal_spdif_open(AF_SPDIF_INST, stream);\n      dma_cfg->dst_periph = HAL_AUDMA_SPDIF0_TX;\n    }\n#endif\n#ifdef AF_DEVICE_BT_PCM\n    else if (device == AUD_STREAM_USE_BT_PCM) {\n      AF_TRACE_DEBUG();\n      hal_btpcm_open(AF_BTPCM_INST, stream);\n      dma_cfg->dst_periph = HAL_AUDMA_BTPCM_TX;\n    }\n#endif\n#ifdef AUDIO_ANC_FB_MC\n    else if (device == AUD_STREAM_USE_MC) {\n      AF_TRACE_DEBUG();\n      dma_cfg->dst_periph = HAL_AUDMA_MC_RX;\n    }\n#endif\n    else {\n      ASSERT(0, \"[%s] ERROR: device %d is not defined!\", __func__, device);\n    }\n\n    dma_cfg->ch = hal_audma_get_chan(dma_cfg->dst_periph, HAL_DMA_HIGH_PRIO);\n  } else {\n    AF_TRACE_DEBUG();\n    dma_cfg->dst_periph = (enum HAL_DMA_PERIPH_T)0;\n    dma_cfg->type = HAL_DMA_FLOW_P2M_DMA;\n\n    // open device and stream\n    if (0) {\n    }\n#ifdef AF_DEVICE_EXT_CODEC\n    else if (device == AUD_STREAM_USE_EXT_CODEC) {\n      AF_TRACE_DEBUG();\n      tlv32aic32_open();\n      tlv32aic32_stream_open(stream);\n\n      dma_cfg->src_periph = HAL_AUDMA_I2S0_RX;\n    }\n#endif\n#ifdef AF_DEVICE_I2S\n    else if (device == AUD_STREAM_USE_I2S0_MASTER) {\n      AF_TRACE_DEBUG();\n      hal_i2s_open(HAL_I2S_ID_0, stream, HAL_I2S_MODE_MASTER);\n      dma_cfg->src_periph = HAL_AUDMA_I2S0_RX;\n    } else if (device == AUD_STREAM_USE_I2S0_SLAVE) {\n      AF_TRACE_DEBUG();\n      hal_i2s_open(HAL_I2S_ID_0, stream, HAL_I2S_MODE_SLAVE);\n      dma_cfg->src_periph = HAL_AUDMA_I2S0_RX;\n    }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n    else if (device == AUD_STREAM_USE_I2S1_MASTER) {\n      AF_TRACE_DEBUG();\n      hal_i2s_open(HAL_I2S_ID_1, stream, HAL_I2S_MODE_MASTER);\n      dma_cfg->src_periph = HAL_AUDMA_I2S1_RX;\n    } else if (device == AUD_STREAM_USE_I2S1_SLAVE) {\n      AF_TRACE_DEBUG();\n      hal_i2s_open(HAL_I2S_ID_1, stream, HAL_I2S_MODE_SLAVE);\n      dma_cfg->src_periph = HAL_AUDMA_I2S1_RX;\n    }\n#endif\n#endif\n#ifdef AF_DEVICE_TDM\n    else if (device == AUD_STREAM_USE_TDM0_MASTER) {\n      AF_TRACE_DEBUG();\n      hal_tdm_open(HAL_I2S_ID_0, stream, HAL_I2S_MODE_MASTER);\n      dma_cfg->src_periph = HAL_AUDMA_I2S0_RX;\n      AF_TRACE_DEBUG();\n    } else if (device == AUD_STREAM_USE_TDM0_SLAVE) {\n      AF_TRACE_DEBUG();\n      hal_tdm_open(HAL_I2S_ID_0, stream, HAL_I2S_MODE_SLAVE);\n      dma_cfg->src_periph = HAL_AUDMA_I2S0_RX;\n    }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n    else if (device == AUD_STREAM_USE_TDM1_MASTER) {\n      AF_TRACE_DEBUG();\n      hal_tdm_open(HAL_I2S_ID_1, stream, HAL_I2S_MODE_MASTER);\n      dma_cfg->src_periph = HAL_AUDMA_I2S1_RX;\n    } else if (device == AUD_STREAM_USE_TDM1_SLAVE) {\n      AF_TRACE_DEBUG();\n      hal_tdm_open(HAL_I2S_ID_1, stream, HAL_I2S_MODE_SLAVE);\n      dma_cfg->src_periph = HAL_AUDMA_I2S1_RX;\n    }\n#endif\n#endif\n#ifdef AF_DEVICE_INT_CODEC\n    else if (device == AUD_STREAM_USE_INT_CODEC) {\n      AF_TRACE_DEBUG();\n      codec_int_open();\n      codec_int_stream_open(stream);\n\n      dma_cfg->src_periph = HAL_AUDMA_CODEC_RX;\n    }\n#endif\n#ifdef AF_DEVICE_SPDIF\n    else if (device == AUD_STREAM_USE_INT_SPDIF) {\n      AF_TRACE_DEBUG();\n      hal_spdif_open(AF_SPDIF_INST, stream);\n\n      dma_cfg->src_periph = HAL_AUDMA_SPDIF0_RX;\n    }\n#endif\n#ifdef AF_DEVICE_BT_PCM\n    else if (device == AUD_STREAM_USE_BT_PCM) {\n      AF_TRACE_DEBUG();\n      hal_btpcm_open(AF_BTPCM_INST, stream);\n\n      dma_cfg->src_periph = HAL_AUDMA_BTPCM_RX;\n    }\n#endif\n#ifdef AF_DEVICE_DPD_RX\n    else if (device == AUD_STREAM_USE_DPD_RX) {\n      AF_TRACE_DEBUG();\n      dma_cfg->src_periph = HAL_AUDMA_DPD_RX;\n    }\n#endif\n    else {\n      ASSERT(0, \"[%s] ERROR: device %d is not defined!\", __func__, device);\n    }\n    dma_cfg->ch = hal_audma_get_chan(dma_cfg->src_periph, HAL_DMA_HIGH_PRIO);\n  }\n  af_stream_update_dma_buffer(stream, role, cfg);\n  role->handler = cfg->handler;\n\n  af_set_status(id, stream, AF_STATUS_STREAM_OPEN_CLOSE);\n#ifndef RTOS\n  af_clear_flag(&af_flag_signal, 1 << (id * 2 + stream));\n  af_set_flag(&af_flag_open, 1 << (id * 2 + stream));\n#endif\n\n  AF_TRACE_DEBUG();\n  ret = AF_RES_SUCCESS;\n\n_exit:\n  af_unlock_thread();\n  if (ret == AF_RES_SUCCESS) {\n    af_stream_setup(id, stream, &role->cfg);\n  }\n\n  return ret;\n}\n\n// volume, path, sample rate, channel num ...\nuint32_t af_stream_setup(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream,\n                         const struct AF_STREAM_CONFIG_T *cfg) {\n  AF_TRACE_DEBUG();\n\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n  enum AUD_STREAM_USE_DEVICE_T device;\n\n  role = af_get_stream_role(id, stream);\n  TRACE(3, \"[%s] id = %d, stream = %d\", __func__, id, stream);\n\n  ret = AF_RES_FAILD;\n\n  af_lock_thread();\n\n  // check stream is open\n  if (!(role->ctl.status & AF_STATUS_STREAM_OPEN_CLOSE)) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    goto _exit;\n  }\n\n  device = role->ctl.use_device;\n\n  if (&role->cfg != cfg) {\n    bool update_dma = false;\n\n    if (role->cfg.bits != cfg->bits) {\n      TRACE(4, \"[%s] Change bits from %d to %d for stream %d\", __func__,\n            role->cfg.bits, cfg->bits, stream);\n      update_dma = true;\n    }\n    if (role->cfg.data_ptr != cfg->data_ptr) {\n      TRACE(4, \"[%s] Change data_ptr from %p to %p for stream %d\", __func__,\n            role->cfg.data_ptr, cfg->data_ptr, stream);\n      update_dma = true;\n    }\n    if (role->cfg.data_size != cfg->data_size) {\n      TRACE(4, \"[%s] Change data_size from %d to %d for stream %d\", __func__,\n            role->cfg.data_size, cfg->data_size, stream);\n      update_dma = true;\n    }\n    if (update_dma) {\n      // To avoid FIFO corruption, streams must be stopped before changing\n      // sample size\n      ASSERT((role->ctl.status & AF_STATUS_STREAM_START_STOP) == 0,\n             \"[%s] ERROR: Update dma while stream %d started\", __func__,\n             stream);\n\n      af_stream_update_dma_buffer(stream, role, cfg);\n    }\n\n    if (role->cfg.sample_rate != cfg->sample_rate) {\n      TRACE(4, \"[%s] Change sample rate from %d to %d for stream %d\", __func__,\n            role->cfg.sample_rate, cfg->sample_rate, stream);\n\n      // To avoid L/R sample misalignment, streams must be stopped before\n      // changing sample rate\n      ASSERT((role->ctl.status & AF_STATUS_STREAM_START_STOP) == 0,\n             \"[%s] ERROR: Change sample rate from %d to %d while stream %d \"\n             \"started\",\n             __func__, role->cfg.sample_rate, cfg->sample_rate, stream);\n    }\n\n    role->cfg = *cfg;\n  }\n\n  AF_TRACE_DEBUG();\n  if (0) {\n  }\n#ifdef AF_DEVICE_EXT_CODEC\n  else if (device == AUD_STREAM_USE_EXT_CODEC) {\n    AF_TRACE_DEBUG();\n\n    struct tlv32aic32_config_t tlv32aic32_cfg;\n\n    memset(&tlv32aic32_cfg, 0, sizeof(tlv32aic32_cfg));\n    tlv32aic32_cfg.bits = cfg->bits;\n    tlv32aic32_cfg.channel_num = cfg->channel_num;\n    tlv32aic32_cfg.channel_map = cfg->channel_map;\n    tlv32aic32_cfg.sample_rate = cfg->sample_rate;\n    tlv32aic32_cfg.use_dma = AF_TRUE;\n    tlv32aic32_cfg.chan_sep_buf = cfg->chan_sep_buf;\n    tlv32aic32_cfg.sync_start = cfg->sync_start;\n    tlv32aic32_cfg.slot_cycles = cfg->slot_cycles;\n    tlv32aic32_stream_setup(stream, &tlv32aic32_cfg);\n  }\n#endif\n#ifdef AF_DEVICE_I2S\n  else if (device == AUD_STREAM_USE_I2S0_MASTER ||\n           device == AUD_STREAM_USE_I2S0_SLAVE\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n           || device == AUD_STREAM_USE_I2S1_MASTER ||\n           device == AUD_STREAM_USE_I2S1_SLAVE\n#endif\n  ) {\n    AF_TRACE_DEBUG();\n\n    struct HAL_I2S_CONFIG_T i2s_cfg;\n    enum HAL_I2S_ID_T i2s_id;\n\n    i2s_id = HAL_I2S_ID_0;\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n    if (device == AUD_STREAM_USE_I2S1_MASTER ||\n        device == AUD_STREAM_USE_I2S1_SLAVE) {\n      i2s_id = HAL_I2S_ID_1;\n    }\n#endif\n\n    memset(&i2s_cfg, 0, sizeof(i2s_cfg));\n    i2s_cfg.use_dma = AF_TRUE;\n    i2s_cfg.chan_sep_buf = cfg->chan_sep_buf;\n    i2s_cfg.sync_start = cfg->sync_start;\n    i2s_cfg.cycles = cfg->slot_cycles;\n    i2s_cfg.bits = cfg->bits;\n    i2s_cfg.channel_num = cfg->channel_num;\n    i2s_cfg.channel_map = cfg->channel_map;\n    i2s_cfg.sample_rate = cfg->sample_rate;\n    hal_i2s_setup_stream(i2s_id, stream, &i2s_cfg);\n  }\n#endif\n#ifdef AF_DEVICE_TDM\n  else if (device == AUD_STREAM_USE_TDM0_MASTER ||\n           device == AUD_STREAM_USE_TDM0_SLAVE\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n           || device == AUD_STREAM_USE_TDM1_MASTER ||\n           device == AUD_STREAM_USE_TDM1_SLAVE\n#endif\n  ) {\n    AF_TRACE_DEBUG();\n\n    struct HAL_TDM_CONFIG_T tdm_cfg;\n    enum HAL_I2S_ID_T i2s_id;\n\n    i2s_id = HAL_I2S_ID_0;\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n    if (device == AUD_STREAM_USE_TDM1_MASTER ||\n        device == AUD_STREAM_USE_TDM1_SLAVE) {\n      i2s_id = HAL_I2S_ID_1;\n    }\n#endif\n\n    memset(&tdm_cfg, 0, sizeof(tdm_cfg));\n    tdm_cfg.mode = HAL_TDM_MODE_FS_ASSERTED_AT_FIRST;\n    tdm_cfg.edge = HAL_TDM_FS_EDGE_POSEDGE;\n    tdm_cfg.cycles = (cfg->channel_num * cfg->slot_cycles);\n    tdm_cfg.fs_cycles = cfg->fs_cycles;\n    tdm_cfg.slot_cycles = cfg->slot_cycles;\n    tdm_cfg.data_offset = 0;\n    tdm_cfg.sync_start = cfg->sync_start;\n    TRACE(5, \"%s: cycle = %d, fs_cycles = %d, slot_cycles = %d,wait = %d.\",\n          __func__, tdm_cfg.cycles, tdm_cfg.fs_cycles, tdm_cfg.slot_cycles,\n          tdm_cfg.sync_start);\n    hal_tdm_setup_stream(i2s_id, stream, cfg->sample_rate, &tdm_cfg);\n  }\n\n#endif\n#ifdef AF_DEVICE_INT_CODEC\n  else if (device == AUD_STREAM_USE_INT_CODEC) {\n    AF_TRACE_DEBUG();\n    struct HAL_CODEC_CONFIG_T codec_cfg;\n    memset(&codec_cfg, 0, sizeof(codec_cfg));\n    codec_cfg.bits = cfg->bits;\n    codec_cfg.sample_rate = cfg->sample_rate;\n    codec_cfg.channel_num = cfg->channel_num;\n    codec_cfg.channel_map = cfg->channel_map;\n    codec_cfg.use_dma = AF_TRUE;\n    codec_cfg.vol = cfg->vol;\n    codec_cfg.io_path = cfg->io_path;\n\n    AF_TRACE_DEBUG();\n    codec_int_stream_setup(stream, &codec_cfg);\n  }\n#endif\n#ifdef AF_DEVICE_SPDIF\n  else if (device == AUD_STREAM_USE_INT_SPDIF) {\n    AF_TRACE_DEBUG();\n    struct HAL_SPDIF_CONFIG_T spdif_cfg;\n\n    memset(&spdif_cfg, 0, sizeof(spdif_cfg));\n    spdif_cfg.use_dma = AF_TRUE;\n    spdif_cfg.bits = cfg->bits;\n    spdif_cfg.channel_num = cfg->channel_num;\n    spdif_cfg.sample_rate = cfg->sample_rate;\n    hal_spdif_setup_stream(AF_SPDIF_INST, stream, &spdif_cfg);\n  }\n#endif\n#ifdef AF_DEVICE_BT_PCM\n  else if (device == AUD_STREAM_USE_BT_PCM) {\n    AF_TRACE_DEBUG();\n    struct HAL_BTPCM_CONFIG_T btpcm_cfg;\n\n    memset(&btpcm_cfg, 0, sizeof(btpcm_cfg));\n    btpcm_cfg.use_dma = AF_TRUE;\n    btpcm_cfg.bits = cfg->bits;\n    btpcm_cfg.channel_num = cfg->channel_num;\n    btpcm_cfg.sample_rate = cfg->sample_rate;\n    hal_btpcm_setup_stream(AF_BTPCM_INST, stream, &btpcm_cfg);\n  }\n#endif\n#ifdef AF_DEVICE_DPD_RX\n  else if (device == AUD_STREAM_USE_DPD_RX) {\n    AF_TRACE_DEBUG();\n  }\n#endif\n#ifdef AUDIO_ANC_FB_MC\n  else if (device == AUD_STREAM_USE_MC) {\n    AF_TRACE_DEBUG();\n    hal_codec_setup_mc(cfg->channel_num, cfg->bits);\n  }\n#endif\n  else {\n    ASSERT(0, \"[%s] ERROR: device %d is not defined!\", __func__, device);\n  }\n\n  AF_TRACE_DEBUG();\n\n  ret = AF_RES_SUCCESS;\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n}\n\nuint32_t af_stream_mute(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream,\n                        bool mute) {\n  AF_TRACE_DEBUG();\n\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n  enum AUD_STREAM_USE_DEVICE_T device;\n\n  ret = AF_RES_FAILD;\n  role = af_get_stream_role(id, stream);\n\n  af_lock_thread();\n\n  if ((role->ctl.status & AF_STATUS_STREAM_OPEN_CLOSE) == 0) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    goto _exit;\n  }\n\n  device = role->ctl.use_device;\n\n  if (device == AUD_STREAM_USE_INT_CODEC) {\n    codec_int_stream_mute(stream, mute);\n    ret = AF_RES_SUCCESS;\n  }\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n}\n\nuint32_t af_stream_set_chan_vol(enum AUD_STREAM_ID_T id,\n                                enum AUD_STREAM_T stream,\n                                enum AUD_CHANNEL_MAP_T ch_map, uint8_t vol) {\n  AF_TRACE_DEBUG();\n\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n  enum AUD_STREAM_USE_DEVICE_T device;\n\n  ret = AF_RES_FAILD;\n  role = af_get_stream_role(id, stream);\n\n  af_lock_thread();\n\n  if ((role->ctl.status & AF_STATUS_STREAM_OPEN_CLOSE) == 0) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    goto _exit;\n  }\n\n  device = role->ctl.use_device;\n\n  if (device == AUD_STREAM_USE_INT_CODEC) {\n    codec_int_stream_set_chan_vol(stream, ch_map, vol);\n    ret = AF_RES_SUCCESS;\n  }\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n}\n\nuint32_t af_stream_restore_chan_vol(enum AUD_STREAM_ID_T id,\n                                    enum AUD_STREAM_T stream) {\n  AF_TRACE_DEBUG();\n\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n  enum AUD_STREAM_USE_DEVICE_T device;\n\n  ret = AF_RES_FAILD;\n  role = af_get_stream_role(id, stream);\n\n  af_lock_thread();\n\n  if ((role->ctl.status & AF_STATUS_STREAM_OPEN_CLOSE) == 0) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    goto _exit;\n  }\n\n  device = role->ctl.use_device;\n\n  if (device == AUD_STREAM_USE_INT_CODEC) {\n    codec_int_stream_restore_chan_vol(stream);\n    ret = AF_RES_SUCCESS;\n  }\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n}\n\n#ifdef CODEC_PLAY_BEFORE_CAPTURE\nstatic struct af_stream_cfg_t *codec_capture_role;\n\nstatic void af_codec_stream_pre_start(enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role = NULL;\n\n  if (stream == AUD_STREAM_CAPTURE) {\n    return;\n  }\n\n  for (uint8_t id = 0; id < AUD_STREAM_ID_NUM; id++) {\n    role = af_get_stream_role((enum AUD_STREAM_ID_T)id, AUD_STREAM_CAPTURE);\n    if (role->cfg.device == AUD_STREAM_USE_INT_CODEC &&\n        role->ctl.status ==\n            (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE |\n             AF_STATUS_STREAM_START_STOP)) {\n      hal_audma_stop(role->dma_cfg.ch);\n      codec_int_stream_stop(AUD_STREAM_CAPTURE);\n      codec_capture_role = role;\n      return;\n    }\n  }\n}\n\nstatic void af_codec_stream_post_start(enum AUD_STREAM_T stream) {\n  if (stream == AUD_STREAM_CAPTURE) {\n    return;\n  }\n\n  if (codec_capture_role) {\n    hal_audma_sg_start(&codec_capture_role->dma_desc[0],\n                       &codec_capture_role->dma_cfg);\n    codec_int_stream_start(AUD_STREAM_CAPTURE);\n    codec_capture_role = NULL;\n  }\n}\n\nstatic void af_codec_stream_pre_stop(enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role = NULL;\n\n  if (stream == AUD_STREAM_CAPTURE) {\n    return;\n  }\n\n  for (uint8_t id = 0; id < AUD_STREAM_ID_NUM; id++) {\n    role = af_get_stream_role((enum AUD_STREAM_ID_T)id, AUD_STREAM_CAPTURE);\n    if (role->cfg.device == AUD_STREAM_USE_INT_CODEC &&\n        role->ctl.status ==\n            (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE |\n             AF_STATUS_STREAM_START_STOP)) {\n      hal_audma_stop(role->dma_cfg.ch);\n      codec_int_stream_stop(AUD_STREAM_CAPTURE);\n      codec_capture_role = role;\n      return;\n    }\n  }\n}\n\nstatic void af_codec_stream_post_stop(enum AUD_STREAM_T stream) {\n  if (stream == AUD_STREAM_CAPTURE) {\n    return;\n  }\n\n  if (codec_capture_role) {\n    hal_audma_sg_start(&codec_capture_role->dma_desc[0],\n                       &codec_capture_role->dma_cfg);\n    codec_int_stream_start(AUD_STREAM_CAPTURE);\n    codec_capture_role = NULL;\n  }\n}\n#endif\n\nuint32_t af_stream_start(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n  enum AUD_STREAM_USE_DEVICE_T device;\n  enum HAL_DMA_RET_T dma_ret;\n\n  role = af_get_stream_role(id, stream);\n  TRACE(3, \"[%s] id = %d, stream = %d\", __func__, id, stream);\n\n  af_lock_thread();\n\n  // check stream is open and not start.\n  if (role->ctl.status !=\n      (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE)) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    ret = AF_RES_FAILD;\n    goto _exit;\n  }\n\n  device = role->ctl.use_device;\n\n  role->ctl.pp_index = PP_PING;\n  role->ctl.pp_cnt = 0;\n\n#ifndef RTOS\n  af_clear_flag(&af_flag_signal, 1 << (id * 2 + stream));\n#endif\n\n  if (device == AUD_STREAM_USE_INT_CODEC && stream == AUD_STREAM_PLAYBACK) {\n#ifdef AUDIO_OUTPUT_PA_ON_FADE_IN\n    dac_pa_state = AF_DAC_PA_ON_TRIGGER;\n    // Has the buffer been zero-ed out?\n    af_zero_mem(role->dma_buf_ptr, role->dma_buf_size);\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n    af_codec_playback_sw_dc_calib(role->dma_buf_ptr, role->dma_buf_size,\n                                  role->cfg.bits, role->cfg.channel_num);\n#endif\n    dac_dc_start_time = hal_sys_timer_get();\n#endif\n  }\n\n#ifndef CHIP_BEST1000\n  if (role->cfg.chan_sep_buf && role->cfg.channel_num > AUD_CHANNEL_NUM_1) {\n    struct HAL_DMA_2D_CFG_T *src, *dst;\n    struct HAL_DMA_2D_CFG_T dma_2d_cfg;\n    uint8_t burst_size = 1;\n    uint32_t chan_xfer_cnt;\n\n    src = NULL;\n    dst = NULL;\n    if (stream == AUD_STREAM_PLAYBACK) {\n      if (role->cfg.channel_num == AUD_CHANNEL_NUM_2) {\n        ASSERT(role->dma_cfg.src_bsize == HAL_DMA_BSIZE_1,\n               \"Play 2D DMA: Bad src burst size: %d\", role->dma_cfg.src_bsize);\n        burst_size = 1;\n        src = &dma_2d_cfg;\n      }\n    } else {\n      if (role->cfg.channel_num > AUD_CHANNEL_NUM_1) {\n        ASSERT(role->dma_cfg.src_bsize == role->dma_cfg.dst_bsize,\n               \"Cap 2D DMA: src burst size (%d) != dst (%d)\",\n               role->dma_cfg.src_bsize, role->dma_cfg.dst_bsize);\n        if (role->dma_cfg.dst_bsize == HAL_DMA_BSIZE_1) {\n          burst_size = 1;\n        } else if (role->dma_cfg.dst_bsize == HAL_DMA_BSIZE_4) {\n          burst_size = 4;\n        } else if (role->dma_cfg.dst_bsize == HAL_DMA_BSIZE_8) {\n          burst_size = 8;\n        } else {\n          ASSERT(false, \"Cap 2D DMA: Bad dst burst size: %d\",\n                 role->dma_cfg.dst_bsize);\n        }\n        dst = &dma_2d_cfg;\n      }\n    }\n\n    if (src || dst) {\n      chan_xfer_cnt =\n          role->dma_cfg.src_tsize * AUDIO_BUFFER_COUNT / role->cfg.channel_num;\n      dma_2d_cfg.xcount = role->cfg.channel_num;\n      dma_2d_cfg.xmodify = chan_xfer_cnt - burst_size;\n      dma_2d_cfg.ycount = chan_xfer_cnt / burst_size;\n      dma_2d_cfg.ymodify = -chan_xfer_cnt * (role->cfg.channel_num - 1);\n    }\n\n    dma_ret = hal_dma_sg_2d_start(&role->dma_desc[0], &role->dma_cfg, src, dst);\n  } else\n#endif\n  {\n    dma_ret = hal_dma_sg_start(&role->dma_desc[0], &role->dma_cfg);\n  }\n  ASSERT(dma_ret == HAL_DMA_OK,\n         \"[%s] Failed to start dma for stream %d: ret=%d\", __func__, stream,\n         dma_ret);\n\n  AF_TRACE_DEBUG();\n  if (0) {\n  }\n#ifdef AF_DEVICE_EXT_CODEC\n  else if (device == AUD_STREAM_USE_EXT_CODEC) {\n    AF_TRACE_DEBUG();\n    tlv32aic32_stream_start(stream);\n  }\n#endif\n#ifdef AF_DEVICE_I2S\n  else if (device == AUD_STREAM_USE_I2S0_MASTER ||\n           device == AUD_STREAM_USE_I2S0_SLAVE) {\n    hal_i2s_start_stream(HAL_I2S_ID_0, stream);\n  }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n  else if (device == AUD_STREAM_USE_I2S1_MASTER ||\n           device == AUD_STREAM_USE_I2S1_SLAVE) {\n    hal_i2s_start_stream(HAL_I2S_ID_1, stream);\n  }\n#endif\n#endif\n#ifdef AF_DEVICE_TDM\n  else if (device == AUD_STREAM_USE_TDM0_MASTER ||\n           device == AUD_STREAM_USE_TDM0_SLAVE) {\n    hal_tdm_start_stream(HAL_I2S_ID_0, stream);\n  }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n  else if (device == AUD_STREAM_USE_TDM1_MASTER ||\n           device == AUD_STREAM_USE_TDM1_SLAVE) {\n    hal_tdm_start_stream(HAL_I2S_ID_1, stream);\n  }\n#endif\n#endif\n#ifdef AF_DEVICE_INT_CODEC\n  else if (device == AUD_STREAM_USE_INT_CODEC) {\n    AF_TRACE_DEBUG();\n#ifdef CODEC_PLAY_BEFORE_CAPTURE\n    af_codec_stream_pre_start(stream);\n#endif\n    codec_int_stream_start(stream);\n#ifdef CODEC_PLAY_BEFORE_CAPTURE\n    af_codec_stream_post_start(stream);\n#endif\n  }\n#endif\n#ifdef AF_DEVICE_SPDIF\n  else if (device == AUD_STREAM_USE_INT_SPDIF) {\n    AF_TRACE_DEBUG();\n    hal_spdif_start_stream(AF_SPDIF_INST, stream);\n  }\n#endif\n#ifdef AF_DEVICE_BT_PCM\n  else if (device == AUD_STREAM_USE_BT_PCM) {\n    AF_TRACE_DEBUG();\n    hal_btpcm_start_stream(AF_BTPCM_INST, stream);\n  }\n#endif\n#ifdef AF_DEVICE_DPD_RX\n  else if (device == AUD_STREAM_USE_DPD_RX) {\n    AF_TRACE_DEBUG();\n    hal_btpcm_start_stream(AF_BTPCM_INST, stream);\n  }\n#endif\n#ifdef AUDIO_ANC_FB_MC\n  else if (device == AUD_STREAM_USE_MC) {\n    AF_TRACE_DEBUG();\n  }\n#endif\n  else {\n    ASSERT(0, \"[%s] ERROR: device %d is not defined!\", __func__, device);\n  }\n\n  AF_TRACE_DEBUG();\n  af_set_status(id, stream, AF_STATUS_STREAM_START_STOP);\n\n  ret = AF_RES_SUCCESS;\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n}\n\nuint32_t af_stream_stop(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n  enum AUD_STREAM_USE_DEVICE_T device;\n\n  role = af_get_stream_role(id, stream);\n  TRACE(3, \"[%s] id = %d, stream = %d\", __func__, id, stream);\n\n  af_lock_thread();\n\n  device = role->ctl.use_device;\n\n  if (device == AUD_STREAM_USE_INT_CODEC &&\n      role->ctl.status ==\n          (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE |\n           AF_STATUS_STREAM_START_STOP | AF_STATUS_STREAM_PAUSE_RESTART)) {\n    af_clear_status(id, stream, AF_STATUS_STREAM_PAUSE_RESTART);\n    goto _pause_stop;\n  }\n\n  // check stream is start and not stop\n  if (role->ctl.status != (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE |\n                           AF_STATUS_STREAM_START_STOP)) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    ret = AF_RES_FAILD;\n    goto _exit;\n  }\n\n#if defined(RTOS) && defined(AF_STREAM_ID_0_PLAYBACK_FADEOUT)\n  if (id == AUD_STREAM_ID_0 && stream == AUD_STREAM_PLAYBACK) {\n    af_stream_fadeout_start(512);\n    af_stream_stop_wait_finish();\n  }\n#endif\n\n  if (device == AUD_STREAM_USE_INT_CODEC && stream == AUD_STREAM_PLAYBACK) {\n#ifdef AUDIO_OUTPUT_PA_OFF_FADE_OUT\n    dac_pa_state = AF_DAC_PA_OFF_TRIGGER;\n    af_unlock_thread();\n    while (dac_pa_state != AF_DAC_PA_NULL) {\n#ifdef RTOS\n      osSignalWait((1 << AF_FADE_OUT_SIGNAL_ID), 300);\n      osSignalClear(fade_thread_id, (1 << AF_FADE_OUT_SIGNAL_ID));\n#else\n      af_thread(NULL);\n#endif\n    }\n    af_lock_thread();\n#elif defined(AUDIO_OUTPUT_PA_ON_FADE_IN)\n    dac_pa_state = AF_DAC_PA_NULL;\n    analog_aud_codec_speaker_enable(false);\n    dac_pa_stop_time = hal_sys_timer_get();\n#endif // !AUDIO_OUTPUT_PA_OFF_FADE_OUT && AUDIO_OUTPUT_PA_ON_FADE_IN\n  }\n\n  hal_audma_stop(role->dma_cfg.ch);\n\n#if defined(RTOS) && defined(AF_STREAM_ID_0_PLAYBACK_FADEOUT)\n  if (id == AUD_STREAM_ID_0 && stream == AUD_STREAM_PLAYBACK) {\n    af_stream_fadeout_stop();\n  }\n#endif\n\n  if (0) {\n  }\n#ifdef AF_DEVICE_EXT_CODEC\n  else if (device == AUD_STREAM_USE_EXT_CODEC) {\n    AF_TRACE_DEBUG();\n    tlv32aic32_stream_stop(stream);\n  }\n#endif\n#ifdef AF_DEVICE_I2S\n  else if (device == AUD_STREAM_USE_I2S0_MASTER ||\n           device == AUD_STREAM_USE_I2S0_SLAVE) {\n    AF_TRACE_DEBUG();\n    hal_i2s_stop_stream(HAL_I2S_ID_0, stream);\n  }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n  else if (device == AUD_STREAM_USE_I2S1_MASTER ||\n           device == AUD_STREAM_USE_I2S1_SLAVE) {\n    AF_TRACE_DEBUG();\n    hal_i2s_stop_stream(HAL_I2S_ID_1, stream);\n  }\n#endif\n#endif\n#ifdef AF_DEVICE_TDM\n  else if (device == AUD_STREAM_USE_TDM0_MASTER ||\n           device == AUD_STREAM_USE_TDM0_SLAVE) {\n    AF_TRACE_DEBUG();\n    hal_tdm_stop_stream(HAL_I2S_ID_0, stream);\n  }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n  else if (device == AUD_STREAM_USE_TDM1_MASTER ||\n           device == AUD_STREAM_USE_TDM1_SLAVE) {\n    AF_TRACE_DEBUG();\n    hal_tdm_stop_stream(HAL_I2S_ID_1, stream);\n  }\n#endif\n#endif\n#ifdef AF_DEVICE_INT_CODEC\n  else if (device == AUD_STREAM_USE_INT_CODEC) {\n    AF_TRACE_DEBUG();\n#ifdef CODEC_PLAY_BEFORE_CAPTURE\n    af_codec_stream_pre_stop(stream);\n#endif\n    codec_int_stream_stop(stream);\n#ifdef CODEC_PLAY_BEFORE_CAPTURE\n    af_codec_stream_post_stop(stream);\n#endif\n  }\n#endif\n#ifdef AF_DEVICE_SPDIF\n  else if (device == AUD_STREAM_USE_INT_SPDIF) {\n    AF_TRACE_DEBUG();\n    hal_spdif_stop_stream(AF_SPDIF_INST, stream);\n  }\n#endif\n#ifdef AF_DEVICE_BT_PCM\n  else if (device == AUD_STREAM_USE_BT_PCM) {\n    AF_TRACE_DEBUG();\n    hal_btpcm_stop_stream(AF_BTPCM_INST, stream);\n  }\n#endif\n#ifdef AF_DEVICE_DPD_RX\n  else if (device == AUD_STREAM_USE_DPD_RX) {\n    AF_TRACE_DEBUG();\n    hal_btpcm_stop_stream(AF_BTPCM_INST, stream);\n  }\n#endif\n#ifdef AUDIO_ANC_FB_MC\n  else if (device == AUD_STREAM_USE_MC) {\n    AF_TRACE_DEBUG();\n  }\n#endif\n  else {\n    ASSERT(0, \"[%s] ERROR: device %d is not defined!\", __func__, device);\n  }\n\n_pause_stop:\n  AF_TRACE_DEBUG();\n  af_clear_status(id, stream, AF_STATUS_STREAM_START_STOP);\n\n#ifndef RTOS\n  af_clear_flag(&af_flag_signal, 1 << (id * 2 + stream));\n#endif\n\n  ret = AF_RES_SUCCESS;\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n}\n\nuint32_t af_stream_pause(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream) {\n#ifdef CHIP_BEST1000\n\n  struct af_stream_cfg_t *role = NULL;\n  enum AF_RESULT_T ret;\n\n  role = af_get_stream_role(id, stream);\n  TRACE(3, \"[%s] id = %d, stream = %d\", __func__, id, stream);\n\n  af_lock_thread();\n\n  if (role->cfg.device != AUD_STREAM_USE_INT_CODEC) {\n    ret = AF_RES_FAILD;\n    goto _exit;\n  }\n  if (role->ctl.status != (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE |\n                           AF_STATUS_STREAM_START_STOP)) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    ret = AF_RES_FAILD;\n    goto _exit;\n  }\n\n#if defined(AUDIO_OUTPUT_PA_ON_FADE_IN) || defined(AUDIO_OUTPUT_PA_OFF_FADE_OUT)\n  if (AUD_STREAM_PLAYBACK == stream) {\n    dac_pa_state = AF_DAC_PA_NULL;\n    analog_aud_codec_speaker_enable(false);\n    dac_pa_stop_time = hal_sys_timer_get();\n  }\n#endif\n\n  hal_audma_stop(role->dma_cfg.ch);\n\n  codec_int_stream_stop(stream);\n\n  af_set_status(id, stream, AF_STATUS_STREAM_PAUSE_RESTART);\n\n  ret = AF_RES_SUCCESS;\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n\n#else\n\n  return af_stream_stop(id, stream);\n\n#endif\n}\n\nuint32_t af_stream_restart(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream) {\n#ifdef CHIP_BEST1000\n\n  struct af_stream_cfg_t *role = NULL;\n  enum AF_RESULT_T ret;\n\n  role = af_get_stream_role(id, stream);\n  TRACE(3, \"[%s] id = %d, stream = %d\", __func__, id, stream);\n\n  af_lock_thread();\n\n  if (role->cfg.device != AUD_STREAM_USE_INT_CODEC) {\n    ret = AF_RES_FAILD;\n    goto _exit;\n  }\n  if (role->ctl.status !=\n      (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE |\n       AF_STATUS_STREAM_START_STOP | AF_STATUS_STREAM_PAUSE_RESTART)) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    ret = AF_RES_FAILD;\n    goto _exit;\n  }\n\n  role->ctl.pp_index = PP_PING;\n  role->ctl.pp_cnt = 0;\n\n#ifdef AUDIO_OUTPUT_PA_ON_FADE_IN\n  if (AUD_STREAM_PLAYBACK == stream) {\n    dac_pa_state = AF_DAC_PA_ON_TRIGGER;\n    af_zero_mem(role->dma_buf_ptr, role->dma_buf_size);\n#ifdef AUDIO_OUTPUT_DC_CALIB_SW\n    af_codec_playback_sw_dc_calib(role->dma_buf_ptr, role->dma_buf_size,\n                                  role->cfg.bits, role->cfg.channel_num);\n#endif\n    dac_dc_start_time = hal_sys_timer_get();\n  }\n#endif\n\n  hal_audma_sg_start(&role->dma_desc[0], &role->dma_cfg);\n  codec_int_stream_start(stream);\n  af_clear_status(id, stream, AF_STATUS_STREAM_PAUSE_RESTART);\n  ret = AF_RES_SUCCESS;\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n\n#else\n\n  return af_stream_start(id, stream);\n\n#endif\n}\n\nuint32_t af_stream_close(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role;\n  enum AF_RESULT_T ret;\n  enum AUD_STREAM_USE_DEVICE_T device;\n\n  role = af_get_stream_role(id, stream);\n  TRACE(3, \"[%s] id = %d, stream = %d\", __func__, id, stream);\n\n  af_lock_thread();\n\n  // check stream is stop and not close.\n  if (role->ctl.status !=\n      (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE)) {\n    TRACE(2, \"[%s] ERROR: status = %d\", __func__, role->ctl.status);\n    ret = AF_RES_FAILD;\n    goto _exit;\n  }\n\n  device = role->ctl.use_device;\n\n  memset(role->dma_buf_ptr, 0, role->dma_buf_size);\n  hal_audma_free_chan(role->dma_cfg.ch);\n\n  //  TODO: more parameter should be set!!!\n  //    memset(role, 0xff, sizeof(struct af_stream_cfg_t));\n  role->handler = NULL;\n  role->ctl.pp_index = PP_PING;\n  role->ctl.use_device = AUD_STREAM_USE_DEVICE_NULL;\n  role->dma_buf_ptr = NULL;\n  role->dma_buf_size = 0;\n\n  role->dma_cfg.ch = HAL_DMA_CHAN_NONE;\n\n  if (0) {\n  }\n#ifdef AF_DEVICE_EXT_CODEC\n  else if (device == AUD_STREAM_USE_EXT_CODEC) {\n    AF_TRACE_DEBUG();\n    tlv32aic32_stream_close(stream);\n  }\n#endif\n#ifdef AF_DEVICE_I2S\n  else if (device == AUD_STREAM_USE_I2S0_MASTER ||\n           device == AUD_STREAM_USE_I2S0_SLAVE) {\n    AF_TRACE_DEBUG();\n    hal_i2s_close(HAL_I2S_ID_0, stream);\n  }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n  else if (device == AUD_STREAM_USE_I2S1_MASTER ||\n           device == AUD_STREAM_USE_I2S1_SLAVE) {\n    AF_TRACE_DEBUG();\n    hal_i2s_close(HAL_I2S_ID_1, stream);\n  }\n#endif\n#endif\n#ifdef AF_DEVICE_TDM\n  else if (device == AUD_STREAM_USE_TDM0_MASTER ||\n           device == AUD_STREAM_USE_TDM0_SLAVE) {\n    AF_TRACE_DEBUG();\n    hal_tdm_close(HAL_I2S_ID_0, stream);\n  }\n#if defined(CHIP_HAS_I2S) && (CHIP_HAS_I2S > 1)\n  else if (device == AUD_STREAM_USE_TDM1_MASTER ||\n           device == AUD_STREAM_USE_TDM1_SLAVE) {\n    AF_TRACE_DEBUG();\n    hal_tdm_close(HAL_I2S_ID_1, stream);\n  }\n#endif\n#endif\n#ifdef AF_DEVICE_INT_CODEC\n  else if (device == AUD_STREAM_USE_INT_CODEC) {\n    AF_TRACE_DEBUG();\n    codec_int_stream_close(stream);\n    codec_int_close(CODEC_CLOSE_NORMAL);\n  }\n#endif\n#ifdef AF_DEVICE_SPDIF\n  else if (device == AUD_STREAM_USE_INT_SPDIF) {\n    AF_TRACE_DEBUG();\n    hal_spdif_close(AF_SPDIF_INST, stream);\n  }\n#endif\n#ifdef AF_DEVICE_BT_PCM\n  else if (device == AUD_STREAM_USE_BT_PCM) {\n    AF_TRACE_DEBUG();\n    hal_btpcm_close(AF_BTPCM_INST, stream);\n  }\n#endif\n#ifdef AF_DEVICE_DPD_RX\n  else if (device == AUD_STREAM_USE_DPD_RX) {\n    AF_TRACE_DEBUG();\n  }\n#endif\n#ifdef AUDIO_ANC_FB_MC\n  else if (device == AUD_STREAM_USE_MC) {\n    AF_TRACE_DEBUG();\n  }\n#endif\n  else {\n    ASSERT(0, \"[%s] ERROR: device %d is not defined!\", __func__, device);\n  }\n\n  AF_TRACE_DEBUG();\n  af_clear_status(id, stream, AF_STATUS_STREAM_OPEN_CLOSE);\n\n#ifndef RTOS\n  af_clear_flag(&af_flag_open, 1 << (id * 2 + stream));\n  if (af_flag_open == 0) {\n    hal_cpu_wake_unlock(AF_CPU_WAKE_USER);\n  }\n#endif\n\n  ret = AF_RES_SUCCESS;\n\n_exit:\n  af_unlock_thread();\n\n  return ret;\n}\n\nuint32_t af_close(void) {\n  struct af_stream_cfg_t *role;\n\n  // Avoid blocking shutdown process\n  // af_lock_thread();\n\n  for (uint8_t id = 0; id < AUD_STREAM_ID_NUM; id++) {\n    for (uint8_t stream = 0; stream < AUD_STREAM_NUM; stream++) {\n      role = af_get_stream_role((enum AUD_STREAM_ID_T)id,\n                                (enum AUD_STREAM_T)stream);\n      role->ctl.status = AF_STATUS_NULL;\n    }\n  }\n\n  codec_int_close(CODEC_CLOSE_FORCED);\n\n  // af_unlock_thread();\n\n  return AF_RES_SUCCESS;\n}\n\nuint32_t af_stream_get_cur_dma_addr(enum AUD_STREAM_ID_T id,\n                                    enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role;\n  int i;\n  uint32_t addr = 0;\n\n  role = af_get_stream_role(id, stream);\n\n  // check stream is start and not stop\n  if (role->ctl.status == (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE |\n                           AF_STATUS_STREAM_START_STOP)) {\n    if (role->dma_cfg.ch != HAL_DMA_CHAN_NONE) {\n      for (i = 0; i < 2; i++) {\n        if (stream == AUD_STREAM_PLAYBACK) {\n          addr = hal_audma_get_cur_src_addr(role->dma_cfg.ch);\n        } else {\n          addr = hal_audma_get_cur_dst_addr(role->dma_cfg.ch);\n        }\n        if (addr) {\n          break;\n        }\n        // Previous link list item was just finished. Read current DMA address\n        // again.\n      }\n    }\n  }\n\n  return addr;\n}\n\nint af_stream_get_cur_dma_pos(enum AUD_STREAM_ID_T id,\n                              enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role;\n  uint32_t addr;\n  int pos;\n\n  role = af_get_stream_role(id, stream);\n\n  addr = af_stream_get_cur_dma_addr(id, stream);\n\n  pos = addr - (uint32_t)role->dma_buf_ptr;\n\n  if (pos < 0 || pos > role->dma_buf_size) {\n    return -1;\n  }\n\n#ifndef CHIP_BEST1000\n  if (role->cfg.chan_sep_buf && role->cfg.channel_num > AUD_CHANNEL_NUM_1) {\n    uint32_t chan_size;\n    uint8_t chan_idx;\n    uint8_t desc_idx;\n    uint16_t chan_desc_offset;\n    uint16_t chan_desc_xfer_size;\n    uint32_t chan_offset;\n\n    chan_size = role->dma_buf_size / role->cfg.channel_num;\n    chan_desc_xfer_size = chan_size / AUDIO_BUFFER_COUNT;\n\n    chan_idx = pos / chan_size;\n    chan_offset = pos % chan_size;\n    desc_idx = chan_offset / chan_desc_xfer_size;\n    chan_desc_offset = chan_offset % chan_desc_xfer_size;\n\n    pos = desc_idx * (role->dma_buf_size / AUDIO_BUFFER_COUNT) +\n          chan_idx * chan_desc_xfer_size + chan_desc_offset;\n  }\n#endif\n\n  return pos;\n}\n\nint af_stream_buffer_error(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream) {\n  return af_sig_lost_cnt[id][stream];\n}\n\nuint32_t af_stream_dma_tc_irq_enable(enum AUD_STREAM_ID_T id,\n                                     enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role;\n\n  role = af_get_stream_role(id, stream);\n\n  // Check if opened\n  if ((role->ctl.status &\n       (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE)) ==\n      (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE)) {\n    hal_dma_tc_irq_enable(role->dma_cfg.ch);\n    return AF_RES_SUCCESS;\n  }\n\n  return AF_RES_FAILD;\n}\n\nuint32_t af_stream_dma_tc_irq_disable(enum AUD_STREAM_ID_T id,\n                                      enum AUD_STREAM_T stream) {\n  struct af_stream_cfg_t *role;\n\n  role = af_get_stream_role(id, stream);\n\n  // Check if opened\n  if ((role->ctl.status &\n       (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE)) ==\n      (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE)) {\n    hal_dma_tc_irq_disable(role->dma_cfg.ch);\n    return AF_RES_SUCCESS;\n  }\n\n  return AF_RES_FAILD;\n}\n\n#ifdef RTOS\nvoid af_set_irq_notification(AF_IRQ_NOTIFICATION_T notif) { irq_notif = notif; }\n\nstatic int af_priority[AF_USER_NUM];\n\nvoid af_set_priority(AF_USER_E user, int priority) {\n  uint8_t i = 0;\n  int max_priority = 0;\n  af_priority[user] = priority;\n\n  for (i = 0; i < AF_USER_NUM; i++) {\n    if (max_priority < af_priority[i]) {\n      max_priority = af_priority[i];\n    }\n  }\n\n  if (max_priority != af_get_priority()) {\n    osThreadSetPriority(af_thread_tid, max_priority);\n  }\n}\n\nint af_get_priority(void) { return (int)osThreadGetPriority(af_thread_tid); }\n\nint af_get_default_priority(void) { return af_default_priority; }\n\nvoid af_reset_priority(void) {\n  osThreadSetPriority(af_thread_tid, af_default_priority);\n}\n#endif\n\nvoid af_codec_tune_resample_rate(enum AUD_STREAM_T stream, float ratio) {\n  af_lock_thread();\n\n  af_codec_direct_tune_resample_rate(stream, ratio);\n\n  af_unlock_thread();\n}\n\nvoid af_codec_direct_tune_resample_rate(enum AUD_STREAM_T stream, float ratio) {\n  ASSERT(stream < AUD_STREAM_NUM, \"[%s] Bad stream=%d\", __func__, stream);\n\n  hal_codec_tune_resample_rate(stream, ratio);\n}\n\nvoid af_codec_tune_both_resample_rate(float ratio) {\n  af_lock_thread();\n\n  hal_codec_tune_both_resample_rate(ratio);\n\n  af_unlock_thread();\n}\n\nvoid af_codec_tune_pll(float ratio) {\n  af_lock_thread();\n\n  analog_aud_pll_tune(ratio);\n\n  af_unlock_thread();\n}\n\nvoid af_codec_tune_xtal(float ratio) {\n  af_lock_thread();\n\n  analog_aud_xtal_tune(ratio);\n\n  af_unlock_thread();\n}\n\nvoid af_codec_tune(enum AUD_STREAM_T stream, float ratio) {\n  af_lock_thread();\n\n  af_codec_direct_tune(stream, ratio);\n\n  af_unlock_thread();\n}\n\nvoid af_codec_direct_tune(enum AUD_STREAM_T stream, float ratio) {\n  ASSERT(stream <= AUD_STREAM_NUM, \"[%s] Bad stream=%d\", __func__, stream);\n\n#ifdef __AUDIO_RESAMPLE__\n  if (hal_cmu_get_audio_resample_status()) {\n    if (stream < AUD_STREAM_NUM) {\n      hal_codec_tune_resample_rate(stream, ratio);\n    } else {\n      hal_codec_tune_both_resample_rate(ratio);\n    }\n  } else\n#endif\n  {\n    analog_aud_pll_tune(ratio);\n  }\n}\n\nvoid af_codec_set_perf_test_power(int type) {\n  af_lock_thread();\n\n  hal_codec_dac_gain_m60db_check((enum HAL_CODEC_PERF_TEST_POWER_T)type);\n\n  af_unlock_thread();\n}\n\nvoid af_codec_set_noise_reduction(bool enable) {\n  af_lock_thread();\n\n  hal_codec_set_noise_reduction(enable);\n\n  af_unlock_thread();\n}\n\nvoid af_codec_bt_trigger_config(bool en,\n                                AF_CODEC_BT_TRIGGER_CALLBACK callback) {\n  if (en) {\n    hal_codec_set_bt_trigger_callback(callback);\n    hal_codec_bt_trigger_start();\n  } else {\n    hal_codec_bt_trigger_stop();\n  }\n}\n\nvoid af_codec_sync_config(enum AUD_STREAM_T stream,\n                          enum AF_CODEC_SYNC_TYPE_T type, bool enable) {\n#ifndef CHIP_BEST1000\n  af_lock_thread();\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    if (enable) {\n      hal_codec_sync_dac_enable((enum HAL_CODEC_SYNC_TYPE_T)type);\n    } else {\n      hal_codec_sync_dac_disable();\n    }\n  } else {\n    if (enable) {\n      hal_codec_sync_adc_enable((enum HAL_CODEC_SYNC_TYPE_T)type);\n    } else {\n      hal_codec_sync_adc_disable();\n    }\n  }\n\n  af_unlock_thread();\n#endif\n}\n\nvoid af_i2s_sync_config(enum AUD_STREAM_T stream, enum AF_I2S_SYNC_TYPE_T type,\n                        bool enable) {\n#ifdef CHIP_BEST2300A\n  af_lock_thread();\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    if (enable) {\n      hal_i2s_clk_sync_enable((enum HAL_I2S_SYNC_TYPE_T)type);\n    } else {\n      hal_i2s_clk_sync_disable();\n    }\n  } else {\n    if (enable) {\n      hal_i2s_clk_sync_enable((enum HAL_I2S_SYNC_TYPE_T)type);\n    } else {\n      hal_i2s_clk_sync_disable();\n    }\n  }\n\n  af_unlock_thread();\n#endif\n}\n\nvoid af_codec_sync_resample_rate_config(enum AUD_STREAM_T stream,\n                                        enum AF_CODEC_SYNC_TYPE_T type,\n                                        bool enable) {\n#ifndef CHIP_BEST1000\n  af_lock_thread();\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    if (enable) {\n      hal_codec_sync_dac_resample_rate_enable((enum HAL_CODEC_SYNC_TYPE_T)type);\n    } else {\n      hal_codec_sync_dac_resample_rate_disable();\n    }\n  } else {\n    if (enable) {\n      hal_codec_sync_adc_resample_rate_enable((enum HAL_CODEC_SYNC_TYPE_T)type);\n    } else {\n      hal_codec_sync_adc_resample_rate_disable();\n    }\n  }\n\n  af_unlock_thread();\n#endif\n}\n\nvoid af_codec_sync_gain_config(enum AUD_STREAM_T stream,\n                               enum AF_CODEC_SYNC_TYPE_T type, bool enable) {\n#ifndef CHIP_BEST1000\n  af_lock_thread();\n\n  if (stream == AUD_STREAM_PLAYBACK) {\n    if (enable) {\n      hal_codec_sync_dac_gain_enable((enum HAL_CODEC_SYNC_TYPE_T)type);\n    } else {\n      hal_codec_sync_dac_gain_disable();\n    }\n  } else {\n    if (enable) {\n      hal_codec_sync_adc_gain_enable((enum HAL_CODEC_SYNC_TYPE_T)type);\n    } else {\n      hal_codec_sync_adc_gain_disable();\n    }\n  }\n\n  af_unlock_thread();\n#endif\n}\n\nvoid af_codec_swap_output(bool swap) {\n  af_lock_thread();\n\n  hal_codec_swap_output(swap);\n\n  af_unlock_thread();\n}\n\nvoid af_codec_set_playback_post_handler(AF_CODEC_PLAYBACK_POST_HANDLER_T hdlr) {\n  codec_play_post_hdlr = hdlr;\n}\n\nint af_anc_open(enum ANC_TYPE_T type, enum AUD_SAMPRATE_T play_rate,\n                enum AUD_SAMPRATE_T capture_rate, AF_ANC_HANDLER handler) {\n  FUNC_ENTRY_TRACE();\n\n  af_lock_thread();\n\n  codec_anc_open(type, play_rate, capture_rate, handler);\n\n  af_unlock_thread();\n\n  return AF_RES_SUCCESS;\n}\n\nint af_anc_close(enum ANC_TYPE_T type) {\n  FUNC_ENTRY_TRACE();\n\n  af_lock_thread();\n\n  codec_anc_close(type);\n\n  af_unlock_thread();\n\n  return AF_RES_SUCCESS;\n}\n\n#ifdef VOICE_DETECTOR_EN\nint af_vad_open(const struct AUD_VAD_CONFIG_T *cfg) {\n  FUNC_ENTRY_TRACE();\n\n  af_lock_thread();\n\n  codec_vad_open(cfg);\n\n  af_unlock_thread();\n\n  return AF_RES_SUCCESS;\n}\n\nint af_vad_close(void) {\n  FUNC_ENTRY_TRACE();\n\n  af_lock_thread();\n\n  codec_vad_close();\n\n  af_unlock_thread();\n\n  return AF_RES_SUCCESS;\n}\n\nint af_vad_start(void) {\n  FUNC_ENTRY_TRACE();\n\n  af_lock_thread();\n\n  hal_codec_vad_start();\n\n  af_unlock_thread();\n\n  return AF_RES_SUCCESS;\n}\n\nint af_vad_stop(void) {\n  FUNC_ENTRY_TRACE();\n\n  af_lock_thread();\n\n  hal_codec_vad_stop();\n\n  af_unlock_thread();\n\n  return AF_RES_SUCCESS;\n}\n\nuint32_t af_vad_get_data(uint8_t *buf, uint32_t len) {\n  return hal_codec_vad_recv_data(buf, len);\n}\n\nvoid af_vad_get_data_info(struct CODEC_VAD_BUF_INFO_T *vad_buf_info) {\n  hal_codec_get_vad_data_info(vad_buf_info);\n}\n\n#endif\n\n#ifdef CODEC_DSD\nvoid af_dsd_enable(void) {\n  enum AUD_STREAM_ID_T id;\n  struct af_stream_cfg_t *role;\n  bool opened = false;\n\n  af_lock_thread();\n\n  for (id = AUD_STREAM_ID_0; id < AUD_STREAM_ID_NUM; id++) {\n    role = af_get_stream_role(id, AUD_STREAM_PLAYBACK);\n    if (role->ctl.status & AF_STATUS_STREAM_OPEN_CLOSE) {\n      if (role->cfg.device == AUD_STREAM_USE_INT_CODEC &&\n          role->dma_cfg.dst_periph == HAL_AUDMA_CODEC_TX) {\n        ASSERT(role->ctl.status ==\n                   (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE),\n               \"Bad stream status when DSD enabled: 0x%X\", role->ctl.status);\n        role->dma_cfg.dst_periph = HAL_AUDMA_DSD_TX;\n        af_stream_update_dma_buffer(AUD_STREAM_PLAYBACK, role, &role->cfg);\n        opened = true;\n        break;\n      }\n    }\n  }\n\n  hal_codec_dsd_enable();\n  af_dsd_enabled = true;\n\n  af_unlock_thread();\n\n  if (opened) {\n    // Enable DSD sample rate handling\n    af_stream_setup(id, AUD_STREAM_PLAYBACK, &role->cfg);\n  }\n}\n\nvoid af_dsd_disable(void) {\n  enum AUD_STREAM_ID_T id;\n  struct af_stream_cfg_t *role;\n  bool opened = false;\n\n  af_lock_thread();\n\n  for (id = AUD_STREAM_ID_0; id < AUD_STREAM_ID_NUM; id++) {\n    role = af_get_stream_role(id, AUD_STREAM_PLAYBACK);\n    if (role->ctl.status & AF_STATUS_STREAM_OPEN_CLOSE) {\n      if (role->cfg.device == AUD_STREAM_USE_INT_CODEC &&\n          role->dma_cfg.dst_periph == HAL_AUDMA_DSD_TX) {\n        ASSERT(role->ctl.status ==\n                   (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE),\n               \"Bad stream status when DSD disabled: 0x%X\", role->ctl.status);\n        role->dma_cfg.dst_periph = HAL_AUDMA_CODEC_TX;\n        af_stream_update_dma_buffer(AUD_STREAM_PLAYBACK, role, &role->cfg);\n        opened = true;\n        break;\n      }\n    }\n  }\n\n  hal_codec_dsd_disable();\n  af_dsd_enabled = false;\n\n  af_unlock_thread();\n\n  if (opened) {\n    // Disable DSD sample rate handling\n    af_stream_setup(id, AUD_STREAM_PLAYBACK, &role->cfg);\n  }\n}\n#endif\n#ifdef __RAND_FROM_MIC__\nuint8_t random_mic_is_on(uint8_t *deviceId) {\n  struct af_stream_cfg_t *role = NULL;\n\n  *deviceId = 0;\n\n  for (uint8_t id = 0; id < AUD_STREAM_ID_NUM; id++) {\n    role = af_get_stream_role((enum AUD_STREAM_ID_T)id, AUD_STREAM_CAPTURE);\n    if (role->cfg.device == AUD_STREAM_USE_INT_CODEC &&\n        role->ctl.status ==\n            (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE |\n             AF_STATUS_STREAM_START_STOP)) {\n      return RAND_STATUS_MIC_STARTED;\n    } else if (role->cfg.device == AUD_STREAM_USE_INT_CODEC &&\n               role->ctl.status ==\n                   (AF_STATUS_OPEN_CLOSE | AF_STATUS_STREAM_OPEN_CLOSE)) {\n      *deviceId = id;\n      return RAND_STATUS_MIC_OPENED;\n    }\n  }\n\n  return RAND_STATUS_CLOSE;\n}\n#endif\n"
  },
  {
    "path": "services/audioflinger/audioflinger.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef AUDIO_FLINGER_H\n#define AUDIO_FLINGER_H\n\n#include \"plat_types.h\"\n#include \"stdbool.h\"\n#include \"hal_aud.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef uint32_t (*AF_STREAM_HANDLER_T)(uint8_t *buf, uint32_t len);\ntypedef void (*AF_IRQ_NOTIFICATION_T)(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\ntypedef void (*AF_CODEC_PLAYBACK_POST_HANDLER_T)(uint8_t *buf, uint32_t len, void *config);\n\n//pingpong machine\nenum AF_PP_T{\n    PP_PING = 0,\n    PP_PANG = 1\n};\n\ntypedef enum  {\n    AF_USER_AI,\n    AF_USER_THIRDPART,\n    AF_USER_AUDIO,\n    AF_USER_SBC,\n    AF_USER_SCO,\n    AF_USER_TEST,\n    AF_USER_NUM\n} AF_USER_E;\n\nstruct AF_STREAM_CONFIG_T {\n    enum AUD_BITS_T bits;\n    enum AUD_SAMPRATE_T sample_rate;\n    enum AUD_CHANNEL_NUM_T channel_num;\n    enum AUD_CHANNEL_MAP_T channel_map;\n    enum AUD_STREAM_USE_DEVICE_T device;\n    enum AUD_IO_PATH_T io_path;\n    bool chan_sep_buf;\n    bool sync_start;\n    uint8_t slot_cycles;\n    uint16_t fs_cycles;\n    AF_STREAM_HANDLER_T handler;\n\n    uint8_t *data_ptr;\n    uint32_t data_size;\n\n    //should define type\n    uint8_t vol;\n};\n\n//Should define return status\nuint32_t af_open(void);\nvoid *af_thread_tid_get(void);\nuint32_t af_stream_open(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream, const struct AF_STREAM_CONFIG_T *cfg);\nuint32_t af_stream_setup(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream, const struct AF_STREAM_CONFIG_T *cfg);\nuint32_t af_stream_mute(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream, bool mute);\nuint32_t af_stream_set_chan_vol(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream, enum AUD_CHANNEL_MAP_T ch_map, uint8_t vol);\nuint32_t af_stream_restore_chan_vol(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nuint32_t af_stream_get_cfg(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream, struct AF_STREAM_CONFIG_T **cfg, bool needlock);\nuint32_t af_stream_start(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nuint32_t af_stream_stop(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nuint32_t af_stream_pause(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nuint32_t af_stream_restart(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nuint32_t af_stream_close(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nuint32_t af_close(void);\nuint32_t af_stream_get_cur_dma_addr(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nint af_stream_get_cur_dma_pos(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nint af_stream_buffer_error(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nuint32_t af_stream_dma_tc_irq_enable(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nuint32_t af_stream_dma_tc_irq_disable(enum AUD_STREAM_ID_T id, enum AUD_STREAM_T stream);\nvoid af_set_irq_notification(AF_IRQ_NOTIFICATION_T notif);\n\nvoid af_lock_thread(void);\nvoid af_unlock_thread(void);\nvoid af_set_priority(AF_USER_E user, int priority);\nint af_get_priority(void);\nint af_get_default_priority(void);\nvoid af_reset_priority(void);\n\nvoid af_codec_tune_resample_rate(enum AUD_STREAM_T stream, float ratio);\nvoid af_codec_direct_tune_resample_rate(enum AUD_STREAM_T stream, float ratio);\nvoid af_codec_tune_both_resample_rate(float ratio);\nvoid af_codec_tune_pll(float ratio);\nvoid af_codec_tune_xtal(float ratio);\nvoid af_codec_tune(enum AUD_STREAM_T stream, float ratio);\nvoid af_codec_direct_tune(enum AUD_STREAM_T stream, float ratio);\n\nvoid af_codec_set_perf_test_power(int type);\nvoid af_codec_set_noise_reduction(bool enable);\nvoid af_codec_swap_output(bool swap);\nvoid af_codec_set_playback_post_handler(AF_CODEC_PLAYBACK_POST_HANDLER_T hdlr);\n\nenum AF_CODEC_SYNC_TYPE_T {\n    AF_CODEC_SYNC_TYPE_NONE,\n    AF_CODEC_SYNC_TYPE_GPIO,\n    AF_CODEC_SYNC_TYPE_BT,\n    AF_CODEC_SYNC_TYPE_WIFI,\n};\n\nenum AF_I2S_SYNC_TYPE_T {\n    AF_I2S_SYNC_TYPE_NONE,\n    AF_I2S_SYNC_TYPE_BT,\n    AF_I2S_SYNC_TYPE_GPIO,\n};\n\n\nvoid af_codec_sync_config(enum AUD_STREAM_T stream, enum AF_CODEC_SYNC_TYPE_T type, bool enable);\nvoid af_codec_sync_resample_rate_config(enum AUD_STREAM_T stream, enum AF_CODEC_SYNC_TYPE_T type, bool enable);\nvoid af_codec_sync_gain_config(enum AUD_STREAM_T stream, enum AF_CODEC_SYNC_TYPE_T type, bool enable);\nvoid af_i2s_sync_config(enum AUD_STREAM_T stream, enum AF_I2S_SYNC_TYPE_T type, bool enable);\n\ntypedef void (*AF_ANC_HANDLER)(enum AUD_STREAM_T stream, enum AUD_SAMPRATE_T rate, enum AUD_SAMPRATE_T *new_play, enum AUD_SAMPRATE_T *new_cap);\n\nint af_anc_open(enum ANC_TYPE_T type, enum AUD_SAMPRATE_T play_rate, enum AUD_SAMPRATE_T capture_rate, AF_ANC_HANDLER handler);\nint af_anc_close(enum ANC_TYPE_T type);\n\nint af_vad_open(const struct AUD_VAD_CONFIG_T *cfg);\nint af_vad_close(void);\nint af_vad_start(void);\nint af_vad_stop(void);\nuint32_t af_vad_get_data(uint8_t *buf, uint32_t len);\nvoid af_vad_get_data_info(struct CODEC_VAD_BUF_INFO_T * vad_buf_info);\n\nvoid af_dsd_enable(void);\nvoid af_dsd_disable(void);\n\ntypedef void (*AF_CODEC_BT_TRIGGER_CALLBACK)(void);\nvoid af_codec_bt_trigger_config(bool en, AF_CODEC_BT_TRIGGER_CALLBACK callback);\n\n#ifdef __RAND_FROM_MIC__\nuint8_t random_mic_is_on(uint8_t *deviceId);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* AUDIO_FLINGER_H */\n"
  },
  {
    "path": "services/auto_test/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\n\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y += \\\n\t-Iservices/audio_process \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/fs/fat/ChaN \\\n\t$(BT_PROFILES_INCLUDES) \\\n\t-Iservices/overlay \\\n\t-Iservices/nvrecord \\\n\t-Iservices/bt_app \\\n\t-Iservices/bt_app/a2dp_codecs/include \\\n\t-Iservices/resources \\\n\t-Iservices/multimedia/rbcodec/inc \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/audio/process/drc/include \\\n\t-Iservices/multimedia/audio/process/anc/include\\\n\t-Iservices/osif\\\n\t-Iservices/nv_section/aud_section \\\n    -Iservices/nv_section/include   \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/drivers/bt \\\n\t-Iutils/cqueue \\\n\t-Iutils/heap \\\n\t-Iservices/audioflinger \\\n\t-Iutils/lockcqueue \\\n\t-Iutils/intersyshci \\\n\t-Iapps/key \\\n\t-Iapps/main \\\n\t-Iapps/common \\\n\t-Iapps/audioplayers \\\n\t-Iapps/audioplayers/rbplay \\\n\t-Iapps/battery \\\n\t-Iapps/factory \\\n\t-Iservices/ble_app \\\n\t-Iservices/tws/inc \\\n\t-Iutils/hwtimer_list  \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n\t$(BT_IF_INCLUDES) \\\n  -Iservices/norflash_api\n\n\n\n\n\n\n"
  },
  {
    "path": "services/auto_test/at_thread.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"at_thread.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n\nstatic void at_thread(void const *argument);\nosThreadDef(at_thread, osPriorityNormal, 1, 1024, \"AT_cmd\");\n\nosMailQDef(at_mailbox, AT_MAILBOX_MAX, AT_MESSAGE);\nstatic osMailQId at_mailbox = NULL;\nstatic uint8_t at_mailbox_cnt = 0;\n#define AT_DEBUG TRACE\nstatic int at_mailbox_init(void) {\n  AT_DEBUG(\"%s,%d\", __func__, __LINE__);\n  at_mailbox = osMailCreate(osMailQ(at_mailbox), NULL);\n  if (at_mailbox == NULL) {\n    AT_DEBUG(\"Failed to Create at_mailbox\\n\");\n    return -1;\n  }\n  at_mailbox_cnt = 0;\n  return 0;\n}\n\nstatic int at_mailbox_put(AT_MESSAGE *msg_src) {\n  osStatus status;\n  AT_MESSAGE *msg_p = NULL;\n\n  AT_DEBUG(\"%s,%d\", __func__, __LINE__);\n  if (at_mailbox_cnt >= 1) {\n    AT_DEBUG(\"%s,%d at_mailbox_cnt  = %d.\", __func__, __LINE__, at_mailbox_cnt);\n    return 0;\n  }\n  msg_p = (AT_MESSAGE *)osMailAlloc(at_mailbox, 0);\n  ASSERT(msg_p, \"osMailAlloc error\");\n  msg_p->id = msg_src->id;\n  msg_p->ptr = msg_src->ptr;\n  msg_p->param0 = msg_src->param0;\n  msg_p->param1 = msg_src->param1;\n\n  status = osMailPut(at_mailbox, msg_p);\n  if (osOK == status)\n    at_mailbox_cnt++;\n  AT_DEBUG(\"%s,%d,at_mailbox_cnt = %d.\", __func__, __LINE__, at_mailbox_cnt);\n  return (int)status;\n}\n\nstatic int at_mailbox_free(AT_MESSAGE *msg_p) {\n  osStatus status;\n\n  AT_DEBUG(\"%s,%d\", __func__, __LINE__);\n  status = osMailFree(at_mailbox, msg_p);\n  if (osOK == status)\n    at_mailbox_cnt--;\n  AT_DEBUG(\"%s,%d,at_mailbox_cnt = %d.\", __func__, __LINE__, at_mailbox_cnt);\n  return (int)status;\n}\n\nstatic int at_mailbox_get(AT_MESSAGE **msg_p) {\n  osEvent evt;\n  evt = osMailGet(at_mailbox, osWaitForever);\n  if (evt.status == osEventMail) {\n    *msg_p = (AT_MESSAGE *)evt.value.p;\n    return 0;\n  }\n  return -1;\n}\n\nstatic void at_thread(void const *argument) {\n  AT_FUNC_T pfunc;\n  // USB_FUNC_T usb_funcp;\n  AT_DEBUG(\"%s,%d\", __func__, __LINE__);\n  while (1) {\n    AT_MESSAGE *msg_p = NULL;\n    if (!at_mailbox_get(&msg_p)) {\n      AT_DEBUG(\"_debug: %s,%d\", __func__, __LINE__);\n      AT_DEBUG(\"at_thread: id = 0x%x, ptr = 0x%x,param0 = 0x%x,param1 = 0x%x.\",\n               msg_p->id, msg_p->ptr, msg_p->param0, msg_p->param1);\n      pfunc = (AT_FUNC_T)msg_p->ptr;\n      pfunc(msg_p->param0, msg_p->param1);\n      at_mailbox_free(msg_p);\n    }\n  }\n}\n\nint at_os_init(void) {\n  osThreadId at_tid;\n\n  AT_DEBUG(\"%s,%d\", __func__, __LINE__);\n  if (at_mailbox_init()) {\n    AT_DEBUG(\"_debug: %s,%d\", __func__, __LINE__);\n    return -1;\n  }\n  at_tid = osThreadCreate(osThread(at_thread), NULL);\n  if (at_tid == NULL) {\n    AT_DEBUG(\"Failed to Create at_thread\\n\");\n    return -2;\n  }\n  return 0;\n}\n\nint at_enqueue_cmd(uint32_t cmd_id, uint32_t param, uint32_t pfunc) {\n  AT_MESSAGE at_msg;\n  int32_t ret;\n\n  at_msg.id = AT_MESSAGE_ID_CMD;\n  at_msg.param0 = param;\n  at_msg.param1 = cmd_id;\n  at_msg.ptr = pfunc;\n  ret = at_mailbox_put(&at_msg);\n  return ret;\n}\n"
  },
  {
    "path": "services/auto_test/at_thread.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AT_THREAD_H__\n#define __AT_THREAD_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define AT_MAILBOX_MAX (20)\n\ntypedef struct {\n\tuint32_t id;\n\tuint32_t ptr;\n\tuint32_t param0;\n\tuint32_t param1;\n} AT_MESSAGE;\n\n#define AT_MESSAGE_ID_CMD    0\n\n\ntypedef void (*AT_FUNC_T)(uint32_t, uint32_t);\n\ntypedef void (*AT_THREAD)(void*);\nint at_os_init(void);\nint at_enqueue_cmd(uint32_t cmd_id, uint32_t param,uint32_t pfunc);\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif // __AT_THREAD_H__\n\n"
  },
  {
    "path": "services/auto_test/at_thread_user.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"at_thread_user.h\"\n#include \"at_thread.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n\n#if 1\n#define AT_THREAD_TRACE TRACE\n#else\n#define AT_THREAD_TRACE(str, ...)\n#endif\n\n// static osThreadId at_tid_user1  = NULL;\nstatic void at_thread_user0(void const *argument);\nstatic void at_thread_user1(void const *argument);\nstatic void at_thread_user2(void const *argument);\nstatic void at_thread_user3(void const *argument);\nstatic void at_thread_user4(void const *argument);\n// static osMailQId at_mailbox_user0 = NULL;\n// static osMailQId at_mailbox_user1 = NULL;\n// static osMailQId at_mailbox_user2 = NULL;\n// static osMailQId at_mailbox_user3 = NULL;\n// static osMailQId at_mailbox_user4 = NULL;\n\nosThreadDef(at_thread_user0, osPriorityLow, 1, 1024, \"at_user0\");\nosMailQDef(at_mailbox_user0, AT_MAILBOX_MAX, AT_USER_MESSAGE);\n\nosThreadDef(at_thread_user1, osPriorityLow, 1, 1024, \"at_user1\");\nosMailQDef(at_mailbox_user1, AT_MAILBOX_MAX, AT_USER_MESSAGE);\nosThreadDef(at_thread_user2, osPriorityLow, 1, 1024, \"at_user2\");\nosMailQDef(at_mailbox_user2, AT_MAILBOX_MAX, AT_USER_MESSAGE);\nosThreadDef(at_thread_user3, osPriorityNormal, 1, 512, \"at_user3\");\nosMailQDef(at_mailbox_user3, AT_MAILBOX_MAX, AT_USER_MESSAGE);\nosThreadDef(at_thread_user4, osPriorityNormal, 1, 512, \"at user4\");\nosMailQDef(at_mailbox_user4, AT_MAILBOX_MAX, AT_USER_MESSAGE);\n\ntypedef struct {\n  bool is_inited;\n  osMailQId mid;\n  osThreadId til;\n  uint32_t mail_count;\n} AT_TREAD_INFO;\n\nAT_TREAD_INFO at_thread_info[THREAD_USER_COUNT] = {\n    {false, NULL, NULL, 0}, {false, NULL, NULL, 0}, {false, NULL, NULL, 0},\n    {false, NULL, NULL, 0}, {false, NULL, NULL, 0},\n};\n\nstatic int at_mailbox_user_put(enum THREAD_USER_ID user_id,\n                               AT_MESSAGE *msg_src) {\n  osStatus status;\n  AT_MESSAGE *msg_p = NULL;\n\n  AT_THREAD_TRACE(3, \"%s,%d,user_id = %d.\", __func__, __LINE__, user_id);\n  if (at_thread_info[user_id].mail_count >= 1) {\n    AT_THREAD_TRACE(3, \"%s,%d mail_count  = %d.\", __func__, __LINE__,\n                    at_thread_info[user_id].mail_count);\n    return 0;\n  }\n  msg_p = (AT_MESSAGE *)osMailAlloc(at_thread_info[user_id].mid, 0);\n  ASSERT(msg_p, \"osMailAlloc error\");\n  msg_p->id = msg_src->id;\n  msg_p->ptr = msg_src->ptr;\n  msg_p->param0 = msg_src->param0;\n  msg_p->param1 = msg_src->param1;\n\n  status = osMailPut(at_thread_info[user_id].mid, msg_p);\n  if (osOK == status)\n    at_thread_info[user_id].mail_count++;\n  AT_THREAD_TRACE(3, \"%s,%d,at_mailbox_cnt = %d.\", __func__, __LINE__,\n                  at_thread_info[user_id].mail_count);\n  return (int)status;\n}\n\nstatic int at_mailbox_user_free(enum THREAD_USER_ID user_id,\n                                AT_MESSAGE *msg_p) {\n  osStatus status;\n\n  AT_THREAD_TRACE(3, \"%s,%d,user_id = %d.\", __func__, __LINE__, user_id);\n  status = osMailFree(at_thread_info[user_id].mid, msg_p);\n  if (osOK == status)\n    at_thread_info[user_id].mail_count--;\n  AT_THREAD_TRACE(3, \"%s,%d,at_mailbox_cnt = %d.\", __func__, __LINE__,\n                  at_thread_info[user_id].mail_count);\n  return (int)status;\n}\n\nstatic int at_mailbox_user_get(enum THREAD_USER_ID user_id,\n                               AT_MESSAGE **msg_p) {\n  osEvent evt;\n  evt = osMailGet(at_thread_info[user_id].mid, osWaitForever);\n  if (evt.status == osEventMail) {\n    *msg_p = (AT_MESSAGE *)evt.value.p;\n    return 0;\n  }\n  return -1;\n}\n\nstatic void at_thread_user0(const void *argument) {\n  AT_FUNC_T pfunc;\n  // enum THREAD_USER_ID user_id = THREAD_USER_COUNT;\n  // uint32_t arg;\n\n  AT_THREAD_TRACE(2, \"%s,%d.\", __func__, __LINE__);\n  // arg = (uint32_t)argument;\n\n  // AT_THREAD_TRACE(3,\"%s,%d,user_id = %d.\",__func__,__LINE__,user_id);\n  while (1) {\n    AT_THREAD_TRACE(2, \"%s,%d.\", __func__, __LINE__);\n    AT_MESSAGE *msg_p = NULL;\n    if (!at_mailbox_user_get(THREAD_USER0, &msg_p)) {\n      AT_THREAD_TRACE(2, \"_debug: %s,%d\", __func__, __LINE__);\n      AT_THREAD_TRACE(\n          4,\n          \"at_thread_user1: id = 0x%x, ptr = 0x%x,param0 = 0x%x,param1 = 0x%x.\",\n          msg_p->id, msg_p->ptr, msg_p->param0, msg_p->param1);\n      pfunc = (AT_FUNC_T)msg_p->ptr;\n      pfunc(msg_p->param0, msg_p->param1);\n      at_mailbox_user_free(THREAD_USER0, msg_p);\n    }\n    AT_THREAD_TRACE(2, \"%s,%d.\", __func__, __LINE__);\n  }\n}\n\nstatic void at_thread_user1(void const *argument) {\n  AT_FUNC_T pfunc;\n\n  AT_THREAD_TRACE(2, \"%s,%d\", __func__, __LINE__);\n  while (1) {\n    AT_MESSAGE *msg_p = NULL;\n    if (!at_mailbox_user_get(THREAD_USER1, &msg_p)) {\n      AT_THREAD_TRACE(2, \"_debug: %s,%d\", __func__, __LINE__);\n      AT_THREAD_TRACE(\n          4,\n          \"at_thread_user1: id = 0x%x, ptr = 0x%x,param0 = 0x%x,param1 = 0x%x.\",\n          msg_p->id, msg_p->ptr, msg_p->param0, msg_p->param1);\n      pfunc = (AT_FUNC_T)msg_p->ptr;\n      pfunc(msg_p->param0, msg_p->param1);\n      at_mailbox_user_free(THREAD_USER1, msg_p);\n    }\n  }\n}\n#if 1\nstatic void at_thread_user2(void const *argument) {\n  AT_FUNC_T pfunc;\n  AT_THREAD_TRACE(2, \"%s,%d\", __func__, __LINE__);\n  while (1) {\n    AT_MESSAGE *msg_p = NULL;\n    if (!at_mailbox_user_get(THREAD_USER2, &msg_p)) {\n      AT_THREAD_TRACE(2, \"_debug: %s,%d\", __func__, __LINE__);\n      AT_THREAD_TRACE(\n          4,\n          \"at_thread_user1: id = 0x%x, ptr = 0x%x,param0 = 0x%x,param1 = 0x%x.\",\n          msg_p->id, msg_p->ptr, msg_p->param0, msg_p->param1);\n      pfunc = (AT_FUNC_T)msg_p->ptr;\n      pfunc(msg_p->param0, msg_p->param1);\n      at_mailbox_user_free(THREAD_USER2, msg_p);\n    }\n  }\n}\nstatic void at_thread_user3(void const *argument) {\n  AT_FUNC_T pfunc;\n  AT_THREAD_TRACE(2, \"%s,%d\", __func__, __LINE__);\n  while (1) {\n    AT_MESSAGE *msg_p = NULL;\n    if (!at_mailbox_user_get(THREAD_USER3, &msg_p)) {\n      AT_THREAD_TRACE(2, \"_debug: %s,%d\", __func__, __LINE__);\n      AT_THREAD_TRACE(\n          4,\n          \"at_thread_user1: id = 0x%x, ptr = 0x%x,param0 = 0x%x,param1 = 0x%x.\",\n          msg_p->id, msg_p->ptr, msg_p->param0, msg_p->param1);\n      pfunc = (AT_FUNC_T)msg_p->ptr;\n      pfunc(msg_p->param0, msg_p->param1);\n      at_mailbox_user_free(THREAD_USER3, msg_p);\n    }\n  }\n}\n\nstatic void at_thread_user4(void const *argument) {\n  AT_FUNC_T pfunc;\n  AT_THREAD_TRACE(2, \"%s,%d\", __func__, __LINE__);\n  while (1) {\n    AT_MESSAGE *msg_p = NULL;\n    if (!at_mailbox_user_get(THREAD_USER4, &msg_p)) {\n      AT_THREAD_TRACE(2, \"_debug: %s,%d\", __func__, __LINE__);\n      AT_THREAD_TRACE(\n          4,\n          \"at_thread_user1: id = 0x%x, ptr = 0x%x,param0 = 0x%x,param1 = 0x%x.\",\n          msg_p->id, msg_p->ptr, msg_p->param0, msg_p->param1);\n      pfunc = (AT_FUNC_T)msg_p->ptr;\n      pfunc(msg_p->param0, msg_p->param1);\n      at_mailbox_user_free(THREAD_USER4, msg_p);\n    }\n  }\n}\n#endif\n\nint at_thread_user_init(enum THREAD_USER_ID user_id) {\n  AT_THREAD_TRACE(3, \"%s,%d,user_id = %d.\", __func__, __LINE__, user_id);\n\n  if (user_id == THREAD_USER0) {\n    at_thread_info[user_id].mid = osMailCreate(osMailQ(at_mailbox_user0), NULL);\n    at_thread_info[user_id].til =\n        osThreadCreate(osThread(at_thread_user0), (void *)user_id);\n  }\n  if (user_id == THREAD_USER1) {\n    at_thread_info[user_id].mid = osMailCreate(osMailQ(at_mailbox_user1), NULL);\n    at_thread_info[user_id].til =\n        osThreadCreate(osThread(at_thread_user1), (void *)user_id);\n  }\n\n  if (user_id == THREAD_USER2) {\n    at_thread_info[user_id].mid = osMailCreate(osMailQ(at_mailbox_user2), NULL);\n    at_thread_info[user_id].til =\n        osThreadCreate(osThread(at_thread_user2), (void *)user_id);\n  }\n  if (user_id == THREAD_USER3) {\n    at_thread_info[user_id].mid = osMailCreate(osMailQ(at_mailbox_user3), NULL);\n    at_thread_info[user_id].til =\n        osThreadCreate(osThread(at_thread_user3), (void *)user_id);\n  }\n  if (user_id == THREAD_USER4) {\n    at_thread_info[user_id].mid = osMailCreate(osMailQ(at_mailbox_user4), NULL);\n    at_thread_info[user_id].til =\n        osThreadCreate(osThread(at_thread_user4), (void *)user_id);\n  }\n\n  if (at_thread_info[user_id].mid == NULL) {\n    AT_THREAD_TRACE(1, \"Failed to Create mailbox, user_id = %d.\", user_id);\n    return -1;\n  }\n  if (at_thread_info[user_id].til == NULL) {\n    AT_THREAD_TRACE(1, \"Failed to Create thread for user. user_id = %d\",\n                    user_id);\n    return -2;\n  }\n  at_thread_info[user_id].mail_count = 0;\n  at_thread_info[user_id].is_inited = true;\n  return 0;\n}\n\nbool at_thread_user_is_inited(enum THREAD_USER_ID user_id) {\n  return at_thread_info[user_id].is_inited;\n}\n\nint at_thread_user_enqueue_cmd(enum THREAD_USER_ID user_id, uint32_t cmd_id,\n                               uint32_t param0, uint32_t param1,\n                               uint32_t pfunc) {\n  AT_MESSAGE at_msg;\n  int32_t ret;\n\n  at_msg.id = cmd_id;\n  at_msg.param0 = param0;\n  at_msg.param1 = param1;\n  at_msg.ptr = pfunc;\n  ret = at_mailbox_user_put(user_id, &at_msg);\n  return ret;\n}\n"
  },
  {
    "path": "services/auto_test/at_thread_user.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AT_THREAD_USER_H__\n#define __AT_THREAD_USER_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum THREAD_USER_ID\n{\n    THREAD_USER0,\n    THREAD_USER1,\n    THREAD_USER2,\n    THREAD_USER3,\n    THREAD_USER4,\n    THREAD_USER_COUNT,\n};\n\ntypedef struct {\n\tuint32_t id;\n\tuint32_t ptr;\n\tuint32_t param0;\n\tuint32_t param1;\n} AT_USER_MESSAGE;\n\ntypedef enum\n{\n    RF_FREQUENCY_2402 = 0x31,//'1'\n    RF_FREQUENCY_2441,\n\tRF_FREQUENCY_2480,\n\tRF_FREQUENCY_2440,\n\tRF_CHANNEL_BLE_STOP, //'5'\n\tRF_FREQUENCY_2402_RX,//'6'\n\tRF_FREQUENCY_2480_RX,\n\tRF_FREQUENCY_2440_RX\n\n}RF_FREQUENCY_E;\ntypedef enum\n{\n    RF_CHANNEL_DH3,\n\tRF_CHANNEL_DH5,\n\tRF_CHANNEL_2DH5,\n\tRF_CHANNEL_3DH5\n\n}RF_CHANNEL_E;\n\ntypedef enum\n{\n\tRF_TX,\n\tRF_RX\n\n}RF_TXRX_E;\n\ntypedef enum\n{\n    MODEUNKNOW,\n    TWSMODEMASTER,\n    TWSMODESLAVE,\n    TWSMODEFREEMAN\n\n}GTK_FACTORY_TEST_TWS_MODE;\n\nvoid BleFrequencyTestStartRx(uint8_t index);\nvoid BleFrequencyTestStart(uint8_t index);\nvoid BleFrequencyTestStop();\nvoid BtFrequencyTestStart(uint8_t index);\nvoid BtFrequencyTestStop();\nbool BleNosignalTestConfigPara(uint8_t index);\nbool BtNosignalTestConfigPara(uint8_t channel,  uint8_t frequency, uint8_t tx_rx);\nbool StopBTRfTest(void);\n\n#define AT_USER_MESSAGE_ID_CMD    0\n\nbool at_thread_user_is_inited(enum THREAD_USER_ID user_id);\nint at_thread_user_init(enum THREAD_USER_ID user_id);\nint at_thread_user_enqueue_cmd(enum THREAD_USER_ID user_id,\n        uint32_t cmd_id,\n        uint32_t param0,\n        uint32_t param1,\n        uint32_t pfunc\n        );\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif // __AT_THREAD_USER_H__\n\n"
  },
  {
    "path": "services/auto_test/auto_test.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(_AUTO_TEST_)\n#include \"app_status_ind.h\"\n#include \"app_thread.h\"\n#include \"apps.h\"\n#include \"cmsis_os.h\"\n#include \"hal_aud.h\"\n#include \"hal_chipid.h\"\n#include \"hal_key.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord.h\"\n#include \"pmu.h\"\nextern \"C\" {\n#include \"besbt_cfg.h\"\n#ifndef ENHANCED_STACK\n#include \"avrcpi.h\"\n#include \"eventmgr.h\"\n#include \"me.h\"\n#include \"sec.h\"\n#include \"sys/mei.h\"\n#endif\n#include \"a2dp.h\"\n#include \"avctp.h\"\n#include \"avdtp.h\"\n#include \"avrcp.h\"\n}\n#include \"app_bt.h\"\n#include \"app_utils.h\"\n#include \"at_thread.h\"\n#include \"at_thread_user.h\"\n#include \"btapp.h\"\n#include \"hal_norflash.h\"\n#include \"norflash_api.h\"\n\n#include \"app_a2dp.h\"\n#include \"app_audio.h\"\n#include \"app_battery.h\"\n#include \"app_bt_stream.h\"\n#include \"app_hfp.h\"\n#include \"bt_drv_interface.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_sleep.h\"\n#include \"tgt_hardware.h\"\n// -------------------------------------------------\n// auto test command list.\n// AUTO_TEST                   AT_TEST                       Auto test ok.\n// BT_INIT                    AT_INIT                       BT Init ok.\n// POWER_ON                   POWER_ON                      Power on.\n// POWER_OFF                  SYS_POWER_OFF                 System shutdown.\n// REBOOT                     SYS_RESET                     System reset.\n//                                                          Power on.\n// PMU_SHUTDOWN               PMU_SHUTDOWN                  Pmu shutdown.\n//                                                          Power on.\n// CONNECT                    CONNECT                       Connect ok.\n//                                                          Page timeout\n// PAIRING                    PAIRING                       Paring ok.\n// CONNECT_TWS                CONNECT_TWS                   Connect tws ok.\n// CALL_SETUP                 CALL_SETUP:112                Call setup ok.\n// CALL_HANGUP                CALL_HANGUP                   Call hangup ok.\n// MUSIC_ON                   MUSIC_ON                      Music on ok.\n// MUSIC_SUSPEND              MUSIC_SUSPEND                 Music suspend ok.\n// SLEEP                      SLEEP_CHECK                   Sleep ok.\n// SLEEP_CLEAN                SLEEP_CLEAN                   Sleep clean ok.\n// WAKEUP                     WAKEUP                        Wakeup ok.\n// STANDBY                    STANDBY                       \n// SWITCH_FREQ                SWITCH_FREQ             Switch freq ok.\n// SIMULATE_KEY               SIMULATE_KEY=,   Simulate key ok.\n// NORFALSH                   NORFLASH                      Norflash ok.\n// NORFALSH_SUSPEND           NORFLASH_SUSPEND              Norflash suspend ok.\n// MEMORY                     MEMORY                        Memory ok.\n//---------------------------------------------------------\ntypedef enum {\n  AT_CMD_ID_TEST,\n  AT_CMD_ID_POWER_OFF,\n  AT_CMD_ID_REBOOT,\n  AT_CMD_ID_PMU_SHUTDOWN,\n  AT_CMD_ID_CONNECT,\n  AT_CMD_ID_DISCONNECT,\n  AT_CMD_ID_PAIRING,\n  AT_CMD_ID_CONNECT_TWS,\n  AT_CMD_ID_CALL_SETUP,\n  AT_CMD_ID_CALL_HANGUP,\n  AT_CMD_ID_MUSIC_ON,\n  AT_CMD_ID_MUSIC_SUSPEND,\n  AT_CMD_ID_SLEEP,\n  AT_CMD_ID_SLEEP_CLEAN,\n  AT_CMD_ID_WAKEUP,\n  AT_CMD_ID_SWITCH_FREQ,\n  AT_CMD_ID_POWER_ON,\n  AT_CMD_ID_BT_INIT,\n  AT_CMD_ID_SIMULATE_KEY,\n  AT_CMD_ID_NORFLASH,\n  AT_CMD_ID_NORFLASH_SUSPEND,\n  AT_CMD_ID_MEMORY,\n  AT_CMD_ID_GET_MAC,\n  AT_CMD_ID_GET_NAME,\n  AT_CMD_ID_SET_LOOPBACK,\n  AT_CMD_ID_SET_LED,\n  AT_CMD_ID_ENTER_SIGNAL,\n  AT_CMD_ID_ENTER_NO_SIGNAL,\n  AT_CMD_ID_NO_SIGNAL_BLE,\n  AT_CMD_ID_NO_SIGNAL_BT,\n  AT_CMD_ID_GET_BATTERY,\n  AT_CMD_ID_SET_VOLUME,\n  AT_CMD_ID_GET_FWVER,\n  AT_CMD_ID_GET_BOOTMODE,\n  AT_CMD_ID_COUNT,\n\n} AT_CMD_ID_ENUM_T;\n\n#define AT_CMD_TEST \"AUTO_TEST\"\n#define AT_CMD_POWER_OFF \"POWER_OFF\"\n#define AT_CMD_REBOOT \"SYS_RESET\"\n#define AT_CMD_PMU_SHUTDOWN \"PMU_SHUTDOWN\"\n#define AT_CMD_CONNECT \"CONNECT\"\n#define AT_CMD_DISCONNECT \"DISCONNECT\"\n#define AT_CMD_PAIRING \"PAIRING\"\n#define AT_CMD_CONNECT_TWS \"CONNECT_TWS\"\n#define AT_CMD_CALL_SETUP \"CALL_SETUP\"\n#define AT_CMD_CALL_HANGUP \"CALL_HANGUP\"\n#define AT_CMD_MUSIC_ON \"MUSIC_ON\"\n#define AT_CMD_MUSIC_SUSPEND \"MUSIC_SUSPEND\"\n#define AT_CMD_SLEEP \"SLEEP_ENTER\"\n#define AT_CMD_SLEEP_CLEAN \"SLEEP_CLEAN\"\n#define AT_CMD_WAKEUP \"WAKEUP\"\n#define AT_CMD_SWITCH_FREQ \"SWITCH_FREQ\"\n#define AT_CMD_POWER_ON \"POWER_ON\"\n#define AT_CMD_BT_INIT \"BT_INIT\"\n#define AT_CMD_SIMULATE_KEY \"SIMULATE_KEY\"\n#define AT_CMD_NORFLASH \"NORFLASH\"\n#define AT_CMD_NORFLASH_SUSPEND \"NORFLASH_SUSPEND\"\n#define AT_CMD_MEMORY \"MEMORY\"\n#define AT_CMD_GET_MAC \"GET_MAC\"\n#define AT_CMD_GET_NAME \"GET_NAME\"\n#define AT_CMD_SET_LOOPBACK \"SET_LOOPBACK\"\n#define AT_CMD_SET_LED \"SET_LED\"\n#define AT_CMD_ENTER_SIGNAL \"ENTER_SIGNAL\"\n#define AT_CMD_ENTER_NO_SIGNAL \"ENTER_NO_SIGNAL\"\n#define AT_CMD_NO_SIGNAL_BLE \"NO_SIGNAL_BLE\"\n#define AT_CMD_NO_SIGNAL_BT \"NO_SIGNAL_BT\"\n#define AT_CMD_GET_BATTERY \"GET_BATTERY\"\n#define AT_CMD_SET_VOLUME \"SET_VOLUME\"\n#define AT_CMD_GET_FWVER \"GET_FWVER\"\n#define AT_CMD_GET_BOOTMODE \"GET_BOOTMODE\"\n\n#define AT_CMD_RESP_TEST \"Auto test ok.\"\n#define AT_CMD_RESP_POWER_OFF \"System shutdown\"\n#define AT_CMD_RESP_REBOOT \"System reset.\"\n#define AT_CMD_RESP_PMU_SHUTDOWN \"Pmu shutdown.\"\n#define AT_CMD_RESP_CONNECT \"Connect ok.\"\n#define AT_CMD_RESP_DISCONNECT \"Disconnect ok.\"\n#define AT_CMD_RESP_PAIRING \"Pairing ok.\"\n#define AT_CMD_RESP_CONNECT_TWS \"Connect tws ok.\"\n#define AT_CMD_RESP_CALL_SETUP \"Call setup ok.\"\n#define AT_CMD_RESP_CALL_HANGUP \"Call hangup ok.\"\n#define AT_CMD_RESP_MUSIC_ON \"Music on ok.\"\n#define AT_CMD_RESP_MUSIC_SUSPEND \"Music suspend ok.\"\n#define AT_CMD_RESP_SLEEP \"Sleep ok.\"\n#define AT_CMD_RESP_SLEEP_CLEAN \"Sleep clean ok.\"\n#define AT_CMD_RESP_WAKEUP \"Wakeup ok.\"\n#define AT_CMD_RESP_SWITCH_FREQ \"Switch freq ok.\"\n#define AT_CMD_RESP_POWER_ON \"Power on.\"\n#define AT_CMD_RESP_BT_INIT \"BT Init ok.\"\n#define AT_CMD_RESP_SIMULATE_KEY \"Simulate key ok.\"\n#define AT_CMD_RESP_STANDBY \"\"\n#define AT_CMD_RESP_NORFLASH \"Norflash ok.\"\n#define AT_CMD_RESP_NORFLASH_SUSPEND \"Norflash suspend ok.\"\n#define AT_CMD_RESP_MEMORY \"Memory ok.\"\n#define AT_CMD_RESP_LED \"LED Display ok.\"\n#define AT_CMD_RESP_BATTERY \"Battery ok.\"\n#define AT_CMD_RESP_LOOPBACK \"LoopBack ok.\"\n#define AT_CMD_RESP_MAC \"Get MAC ok.\"\n#define AT_CMD_RESP_FWVER \"Get FWVER ok.\"\n#define AT_CMD_RESP_BOOTMODE \"Get Bootmode ok.\"\n#define AT_CMD_RESP_TIME_OUT \"Time out.\"\n#define AT_CMD_RESP_ERROR \"Error.\"\n\n#define CMD_OUT_TIME_MS (30 * 1000) // millisecond.\n\ntypedef void (*APP_BT_AUTO_TEST_T)(uint32_t, uint32_t);\ntypedef enum {\n  AT_STATUS_FREE,\n  AT_STATUS_BUSY,\n} AT_STATUS_T;\n\ntypedef struct {\n  AT_CMD_ID_ENUM_T cmd_id;\n  const char *cmd;\n  APP_BT_AUTO_TEST_T pFunc;\n} AT_CMD_FRAME_T;\n\ntypedef struct {\n  AT_CMD_ID_ENUM_T cmd_id;\n  const char *resp;\n  uint32_t count;\n} AT_CMD_RESP;\n\ntypedef struct {\n  AT_CMD_ID_ENUM_T cur_cmd_id;\n  AT_STATUS_T status;\n  uint32_t start_time;\n  uint32_t param;\n  uint32_t pfunc;\n} AT_STAUTS;\n\n#if 1\n#define AT_TRACE TRACE\n#else\n#define AT_TRACE(str, ...)\n#endif\nvoid at_test(uint32_t param0, uint32_t param1);\nvoid at_power_off(uint32_t param0, uint32_t param1);\nvoid at_reboot(uint32_t param0, uint32_t param1);\nvoid at_pmu_shutdown(uint32_t param0, uint32_t param1);\nvoid at_connet(uint32_t param0, uint32_t param1);\nvoid at_disconnet(uint32_t param0, uint32_t param1);\nvoid at_pairing(uint32_t param0, uint32_t param1);\nvoid at_connect_tws(uint32_t param0, uint32_t param1);\nvoid at_call_setup(uint32_t param0, uint32_t param1);\nvoid at_call_hangup(uint32_t param0, uint32_t param1);\nvoid at_music_on(uint32_t param0, uint32_t param1);\nvoid at_music_suspend(uint32_t param0, uint32_t param1);\nvoid at_sleep(uint32_t param0, uint32_t param1);\nvoid at_sleep_clean(uint32_t param0, uint32_t param1);\nvoid at_wakeup(uint32_t param0, uint32_t param1);\nvoid at_switch_freq(uint32_t param0, uint32_t param1);\nvoid at_power_on(uint32_t param0, uint32_t param1);\nvoid at_bt_init(uint32_t param0, uint32_t param1);\nvoid at_simulate_key(uint32_t param0, uint32_t param1);\nvoid at_norflash(uint32_t param0, uint32_t param1);\nvoid at_norflash_suspend(uint32_t param0, uint32_t param1);\nvoid at_memory(uint32_t param0, uint32_t param1);\nvoid at_get_mac(uint32_t param0, uint32_t param1);\nvoid at_get_devicename(uint32_t param0, uint32_t param1);\nvoid at_set_loopback(uint32_t param0, uint32_t param1);\nvoid at_set_led(uint32_t param0, uint32_t param1);\nvoid at_enter_signaling_mode(uint32_t param0, uint32_t param1);\nvoid at_enter_no_signaling_mode(uint32_t param0, uint32_t param1);\nvoid at_no_signaling_ble_test(uint32_t param0, uint32_t param1);\nvoid at_no_signaling_bt_test(uint32_t param0, uint32_t param1);\nvoid at_get_battery(uint32_t param0, uint32_t param1);\nvoid at_set_volume(uint32_t param0, uint32_t param1);\nvoid at_get_fwversion(uint32_t param0, uint32_t param1);\nvoid at_get_bootmode(uint32_t param0, uint32_t param1);\n\nextern \"C\" int system_shutdown(void);\nextern int system_reset(void);\nextern void bt_key_send(uint32_t code, uint16_t event);\nextern void system_get_fwversion(uint8_t *fw_rev_0, uint8_t *fw_rev_1,\n                                 uint8_t *fw_rev_2, uint8_t *fw_rev_3);\n\n#if defined(BT_USB_AUDIO_DUAL_MODE_TEST)\nextern \"C\" void test_btusb_switch(void);\nextern \"C\" void test_btusb_switch_to_bt(void);\nextern \"C\" void test_btusb_switch_to_usb(void);\n\n#endif\n\nstatic const AT_CMD_FRAME_T g_at_cmd_frame[] = {\n    {AT_CMD_ID_TEST, AT_CMD_TEST, at_test},\n    {AT_CMD_ID_POWER_OFF, AT_CMD_POWER_OFF, at_power_off},\n    {AT_CMD_ID_REBOOT, AT_CMD_REBOOT, at_reboot},\n    {AT_CMD_ID_PMU_SHUTDOWN, AT_CMD_PMU_SHUTDOWN, at_pmu_shutdown},\n    {AT_CMD_ID_CONNECT, AT_CMD_CONNECT, at_connet},\n    {AT_CMD_ID_DISCONNECT, AT_CMD_DISCONNECT, at_disconnet},\n    {AT_CMD_ID_PAIRING, AT_CMD_PAIRING, at_pairing},\n    {AT_CMD_ID_CONNECT_TWS, AT_CMD_CONNECT_TWS, at_connect_tws},\n    {AT_CMD_ID_CALL_SETUP, AT_CMD_CALL_SETUP, at_call_setup},\n    {AT_CMD_ID_CALL_HANGUP, AT_CMD_CALL_HANGUP, at_call_hangup},\n    {AT_CMD_ID_MUSIC_ON, AT_CMD_MUSIC_ON, at_music_on},\n    {AT_CMD_ID_MUSIC_SUSPEND, AT_CMD_MUSIC_SUSPEND, at_music_suspend},\n    {AT_CMD_ID_SLEEP, AT_CMD_SLEEP, at_sleep},\n    {AT_CMD_ID_SLEEP_CLEAN, AT_CMD_SLEEP_CLEAN, at_sleep_clean},\n    {AT_CMD_ID_WAKEUP, AT_CMD_WAKEUP, at_wakeup},\n    {AT_CMD_ID_SWITCH_FREQ, AT_CMD_SWITCH_FREQ, at_switch_freq},\n    {AT_CMD_ID_POWER_ON, AT_CMD_POWER_ON, at_power_on},\n    {AT_CMD_ID_BT_INIT, AT_CMD_BT_INIT, at_bt_init},\n    {AT_CMD_ID_SIMULATE_KEY, AT_CMD_SIMULATE_KEY, at_simulate_key},\n    {AT_CMD_ID_NORFLASH, AT_CMD_NORFLASH, at_norflash},\n    {AT_CMD_ID_NORFLASH_SUSPEND, AT_CMD_NORFLASH_SUSPEND, at_norflash_suspend},\n    {AT_CMD_ID_MEMORY, AT_CMD_MEMORY, at_memory},\n    {AT_CMD_ID_GET_MAC, AT_CMD_GET_MAC, at_get_mac},\n    {AT_CMD_ID_GET_NAME, AT_CMD_GET_NAME, at_get_devicename},\n    {AT_CMD_ID_SET_LOOPBACK, AT_CMD_SET_LOOPBACK, at_set_loopback},\n    {AT_CMD_ID_SET_LED, AT_CMD_SET_LED, at_set_led},\n    {AT_CMD_ID_ENTER_SIGNAL, AT_CMD_ENTER_SIGNAL, at_enter_signaling_mode},\n    {AT_CMD_ID_ENTER_NO_SIGNAL, AT_CMD_ENTER_NO_SIGNAL,\n     at_enter_no_signaling_mode},\n    {AT_CMD_ID_NO_SIGNAL_BLE, AT_CMD_NO_SIGNAL_BLE, at_no_signaling_ble_test},\n    {AT_CMD_ID_NO_SIGNAL_BT, AT_CMD_NO_SIGNAL_BT, at_no_signaling_bt_test},\n    {AT_CMD_ID_GET_BATTERY, AT_CMD_GET_BATTERY, at_get_battery},\n    {AT_CMD_ID_SET_VOLUME, AT_CMD_SET_VOLUME, at_set_volume},\n    {AT_CMD_ID_GET_FWVER, AT_CMD_GET_FWVER, at_get_fwversion},\n    {AT_CMD_ID_GET_BOOTMODE, AT_CMD_GET_BOOTMODE, at_get_bootmode},\n    {AT_CMD_ID_COUNT, (const char *)NULL, NULL},\n};\n\nstatic AT_CMD_RESP g_at_cmd_resp[] = {\n    {AT_CMD_ID_TEST, AT_CMD_RESP_TEST, 0},\n    {AT_CMD_ID_POWER_OFF, AT_CMD_RESP_POWER_OFF, 0},\n    {AT_CMD_ID_REBOOT, AT_CMD_RESP_REBOOT, 0},\n    {AT_CMD_ID_PMU_SHUTDOWN, AT_CMD_RESP_PMU_SHUTDOWN, 0},\n    {AT_CMD_ID_CONNECT, AT_CMD_RESP_CONNECT, 0},\n    {AT_CMD_ID_DISCONNECT, AT_CMD_RESP_DISCONNECT, 0},\n    {AT_CMD_ID_PAIRING, AT_CMD_RESP_PAIRING, 0},\n    {AT_CMD_ID_CONNECT_TWS, AT_CMD_RESP_CONNECT_TWS, 0},\n    {AT_CMD_ID_CALL_SETUP, AT_CMD_RESP_CALL_SETUP, 0},\n    {AT_CMD_ID_CALL_HANGUP, AT_CMD_RESP_CALL_HANGUP, 0},\n    {AT_CMD_ID_MUSIC_ON, AT_CMD_RESP_MUSIC_ON, 0},\n    {AT_CMD_ID_MUSIC_SUSPEND, AT_CMD_RESP_MUSIC_SUSPEND, 0},\n    {AT_CMD_ID_SLEEP, AT_CMD_RESP_SLEEP, 0},\n    {AT_CMD_ID_SLEEP_CLEAN, AT_CMD_RESP_SLEEP_CLEAN, 0},\n    {AT_CMD_ID_WAKEUP, AT_CMD_RESP_WAKEUP, 0},\n    {AT_CMD_ID_SWITCH_FREQ, AT_CMD_RESP_SWITCH_FREQ, 0},\n    {AT_CMD_ID_POWER_ON, AT_CMD_RESP_POWER_ON, 0},\n    {AT_CMD_ID_BT_INIT, AT_CMD_RESP_BT_INIT, 0},\n    {AT_CMD_ID_SIMULATE_KEY, AT_CMD_RESP_SIMULATE_KEY, 0},\n    {AT_CMD_ID_NORFLASH, AT_CMD_RESP_NORFLASH, 0},\n    {AT_CMD_ID_NORFLASH_SUSPEND, AT_CMD_RESP_NORFLASH_SUSPEND, 0},\n    {AT_CMD_ID_MEMORY, AT_CMD_RESP_MEMORY, 0},\n    {AT_CMD_ID_COUNT, (const char *)NULL, 0},\n\n};\n\nAT_STAUTS g_at_status = {AT_CMD_ID_COUNT, AT_STATUS_FREE, 0, 0, 0};\n\nvoid _at_trim(uint8_t *buff) {\n  uint8_t *p;\n  uint32_t len;\n  // int32_t i;\n\n  len = strlen((char *)buff);\n  p = buff + (len - 1);\n\n  while (1) {\n    if (*p == 0x20 || *p == 0x09 || *p == 0x0A || *p == 0x0D) {\n      *p = 0;\n      p--;\n    } else {\n      break;\n    }\n    if (p == buff) {\n      break;\n    }\n  }\n\n  p = buff;\n  while (1) {\n    if (*p == 0x20 || *p == 0x09) {\n      p++;\n    } else {\n      break;\n    }\n  }\n\n  while (*p) {\n    *buff = *p;\n    buff++;\n    p++;\n  }\n}\n\n/*\nstatic int _at_strtohex(uint8_t* hex, char* str, int len)\n{\n    int i = 0;\n    char* begin;\n    char* end;\n    //char* tmp;\n    char* hex_unit;\n\n    begin = str;\n    end = str;\n    for(i = 0; i < len; i++)\n    {\n        hex_unit = begin;\n        end = strstr(begin,\",\");\n        if(end)\n        {\n            *end = 0;\n            begin = end + 1;\n        }\n        else\n        {\n        }\n        hex[i] = (uint8_t)strtol(hex_unit,NULL,16);\n    }\n    if(i == len)\n        return 0;\n    else\n        return -1;\n}\n*/\nstatic char *_at_get_cmd_resp(AT_CMD_ID_ENUM_T cmd_id) {\n  uint32_t i;\n  uint32_t cmd_count = 0;\n  char *resp = NULL;\n\n  cmd_count = sizeof(g_at_cmd_resp) / sizeof(AT_CMD_RESP);\n\n  for (i = 0; i < cmd_count; i++) {\n    if (AT_CMD_ID_COUNT == g_at_cmd_resp[i].cmd_id) {\n      AT_TRACE(1, \"_debug: undefined at cmd resp, cmd_id = %d.\", cmd_id);\n      resp = NULL;\n      goto _func_end;\n    }\n    if (cmd_id == g_at_cmd_resp[i].cmd_id) {\n      if (g_at_cmd_resp[i].count > 0) {\n        resp = (char *)g_at_cmd_resp[i].resp;\n        g_at_cmd_resp[i].count = 0;\n        AT_TRACE(2, \"_debug:  ount > 0,cmd_id = %d,resp = %s.\", cmd_id, resp);\n      } else {\n        resp = NULL;\n      }\n      break;\n    }\n  }\n_func_end:\n  return resp;\n}\n\n/*\nstatic AT_STATUS_T _at_get_status(void)\n{\n    if(g_at_status.cur_cmd_id == AT_CMD_ID_COUNT)\n        return AT_STATUS_FREE;\n    return g_at_status.status;\n}\n*/\n\nstatic AT_CMD_ID_ENUM_T _at_get_cur_cmd_id(void) {\n  return g_at_status.cur_cmd_id;\n}\n\nstatic void _at_set_status(AT_CMD_ID_ENUM_T cmd_id, AT_STATUS_T status,\n                           uint32_t param, uint32_t pfuc) {\n  g_at_status.status = status;\n  if (status == AT_STATUS_BUSY) {\n    g_at_status.cur_cmd_id = cmd_id;\n    g_at_status.start_time = hal_sys_timer_get();\n  }\n  g_at_status.param = param;\n  g_at_status.pfunc = pfuc;\n}\n\nstatic void _at_resp(void) {\n  AT_CMD_ID_ENUM_T cur_cmd_id;\n  uint32_t wait_time;\n  char *resp;\n\n  cur_cmd_id = _at_get_cur_cmd_id();\n  if (cur_cmd_id == AT_CMD_ID_COUNT) {\n    TRACE_IMM(1, \"AUTO_TEST:%s\", AT_CMD_RESP_ERROR);\n    return;\n  }\n  resp = _at_get_cmd_resp(cur_cmd_id);\n  if (resp) {\n    // osDelay(64);\n    TRACE_IMM(1, \"AUTO_TEST: %s\", resp);\n    // osDelay(64);\n    _at_set_status(AT_CMD_ID_COUNT, AT_STATUS_FREE, 0, 0);\n  } else {\n    wait_time = TICKS_TO_MS(hal_sys_timer_get() - g_at_status.start_time);\n    if (wait_time < CMD_OUT_TIME_MS) {\n      // osDelay(4);\n      // app_bt_send_request(APP_BT_REQ_AUTO_TEST,\n      // (uint32_t)g_at_status.param,cur_cmd_id, g_at_status.pfunc);\n      AT_TRACE(1, \"_debug: _at_resp,auto_test wait : %d(ms)\", wait_time);\n    } else {\n      _at_set_status(AT_CMD_ID_COUNT, AT_STATUS_FREE, 0, 0);\n      AT_TRACE(2, \"AUTO_TEST:%s,wait time = %d(ms)\", AT_CMD_RESP_TIME_OUT,\n               wait_time);\n    }\n  }\n}\n\n#define AT_PARAM_LEN 256\nuint8_t at_param_buff[AT_PARAM_LEN];\nextern \"C\" int auto_test_prase(uint8_t *cmd) {\n  int ret = 0;\n  uint8_t i;\n  uint8_t *cmd_name = NULL;\n  uint8_t *cmd_param = NULL;\n  uint8_t *p;\n  AT_CMD_ID_ENUM_T cmd_id;\n  uint32_t param_len;\n\n  if (NULL == cmd) {\n    ret = -1;\n    goto _func_end;\n  }\n\n  AT_TRACE(1, \"_debug: cmd = %s\", cmd);\n  cmd_name = cmd;\n  p = (uint8_t *)strstr((char *)cmd, (char *)\"=\");\n  if (p) {\n    *p = 0;\n    cmd_param = (p + 1);\n    _at_trim(cmd_param);\n  } else {\n    cmd_param = NULL;\n  }\n  _at_trim(cmd_name);\n\n  for (i = 0; i < sizeof(g_at_cmd_frame) / sizeof(AT_CMD_FRAME_T); i++) {\n    if (AT_CMD_ID_COUNT == g_at_cmd_frame[i].cmd_id) {\n      AT_TRACE(1, \"_debug: undefined at cmd: %s.\", cmd);\n      ret = -2;\n      goto _func_end;\n    }\n    if (!strcmp((const char *)cmd, (const char *)g_at_cmd_frame[i].cmd)) {\n      if (NULL == g_at_cmd_frame[i].pFunc) {\n        ret = -3;\n        goto _func_end;\n      }\n\n      /*\n      if(AT_CMD_ID_REBOOT != g_at_cmd_frame[i].cmd_id)\n      {\n          if(_at_get_status() != AT_STATUS_FREE)\n          {\n              ret = -2;\n              AT_TRACE(3,\"_debug: auto_test is busy. cmd = %s,cmd_id =\n      %d,cur_cmd_id = %d\", g_at_cmd_frame[i].cmd_id,cmd,g_at_status.cur_cmd_id);\n              goto _func_end;\n          }\n      }\n      */\n      cmd_id = g_at_cmd_frame[i].cmd_id;\n      // AT_TRACE(2,\"_debug: %s,line= %d.\",__func__,__LINE__);\n      // memset(at_param_buff,0,sizeof(at_param_buff));\n      if (NULL != cmd_param) {\n        param_len = strlen((char *)cmd_param);\n        param_len = param_len < sizeof(at_param_buff)\n                        ? param_len\n                        : sizeof(at_param_buff) - 1;\n        if (param_len > 0) {\n          strncpy((char *)at_param_buff, (char *)cmd_param, param_len);\n        }\n      }\n      _at_set_status(cmd_id, AT_STATUS_BUSY, (uint32_t)cmd_param,\n                     (uint32_t)g_at_cmd_frame[i].pFunc);\n      at_enqueue_cmd((uint32_t)cmd_id, (uint32_t)at_param_buff,\n                     (uint32_t)g_at_cmd_frame[i].pFunc);\n      // g_at_cmd_frame[i].pFunc((uint32_t)cmd_param,cmd_id);\n\n      break;\n    }\n  }\n_func_end:\n  if (ret != 0) {\n    AT_TRACE(1, \"_debug: parse failed,ret = %d.\", ret);\n  }\n  return ret;\n}\n\nextern \"C\" int auto_test_send(char *resp) {\n  uint32_t i;\n  uint32_t cmd_count = 0;\n  int32_t ret = 0;\n\n  cmd_count = sizeof(g_at_cmd_resp) / sizeof(AT_CMD_RESP);\n  // AT_TRACE(1,\"_debug: auto_test_send : %s\",resp);\n  for (i = 0; i < cmd_count; i++) {\n    if (AT_CMD_ID_COUNT == g_at_cmd_resp[i].cmd_id) {\n      AT_TRACE(1, \"_debug: auto_test_send: undefined at cmd resp, resp = %s.\",\n               resp);\n      ret = -1;\n      goto _func_end;\n    }\n    if (!strncmp((const char *)resp, (const char *)g_at_cmd_resp[i].resp,\n                 strlen((char *)g_at_cmd_resp[i].resp))) {\n      if (g_at_cmd_resp[i].cmd_id == AT_CMD_ID_POWER_ON ||\n          // g_at_cmd_resp[i].cmd_id == AT_CMD_ID_POWER_OFF ||\n          // g_at_cmd_resp[i].cmd_id == AT_CMD_ID_REBOOT ||\n          g_at_cmd_resp[i].cmd_id == g_at_status.cur_cmd_id) {\n        TRACE_IMM(1, \"AUTO_TEST:%s\", resp);\n        _at_set_status(AT_CMD_ID_COUNT, AT_STATUS_FREE, 0, 0);\n      } else {\n        g_at_cmd_resp[i].count = 1;\n        AT_TRACE(2,\n                 \"_debug: auto_test_send: set count to 1, i = %d, resp = %s.\",\n                 i, resp);\n      }\n      break;\n    }\n  }\n_func_end:\n  if (ret != 0) {\n    AT_TRACE(1, \"_debug: auto_test_send: %s undefine !!!!!\", resp);\n  }\n  return ret;\n}\n\nvoid at_test(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am app_auto_test\");\n\n  AUTO_TEST_SEND(AT_CMD_RESP_TEST);\n}\n\nvoid at_power_off(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  AT_TRACE(0, \"_debug: I am at_power_off\");\n  pmu_at_skip_shutdown(false);\n  system_shutdown();\n}\n\nvoid at_reboot(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  AT_TRACE(0, \"_debug: I am at_reboot\");\n  // system_reset();\n  app_reset();\n}\n\nvoid at_pmu_shutdown(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_reboot\");\n  // system_reset();\n\n  AUTO_TEST_SEND(AT_CMD_RESP_PMU_SHUTDOWN);\n\n  // pmu_rtc_enable();\n  // pmu_rtc_set(5);\n  // pmu_rtc_set_alarm(10);\n  pmu_at_skip_shutdown(true);\n  pmu_shutdown();\n}\n\nvoid at_connet(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n  // AT_TRACE(0,\"_debug: I am at_connet\");\n  // app_tws_charger_box_opened();\n  _at_resp();\n}\n\nvoid at_disconnet(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_disconnet\");\n  _at_resp();\n}\n\nvoid at_pairing(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_pairing\");\n  _at_resp();\n}\n\nvoid at_connect_tws(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_connect_tws\");\n  _at_resp();\n}\n\nvoid at_call_setup(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_call_setup\");\n  _at_resp();\n}\n\nvoid at_call_hangup(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_call_hangup\");\n  _at_resp();\n}\n\nstatic void music_on_callback(void);\n#define MUSIC_ON_DELAY_MS 500\nosTimerDef(MUSIC_ON_TIMER, (void (*)(void const *))music_on_callback);\nstatic osTimerId music_on_timer = NULL;\nstatic bool music_on_flag = 1;\nstatic void music_on_callback(void) {\n  app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n}\n\nvoid at_music_on(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  AT_TRACE(0, \"_debug: I am at_music_on\");\n\n  app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n  if (music_on_flag) {\n    music_on_timer = osTimerCreate(osTimer(MUSIC_ON_TIMER), osTimerPeriodic, 0);\n    music_on_flag = 0;\n  }\n  osTimerStart(music_on_timer, MUSIC_ON_DELAY_MS);\n\n  _at_resp();\n}\n\nvoid at_music_suspend(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  AT_TRACE(0, \"_debug: I am at_music_suspend\");\n  osTimerStop(music_on_timer);\n  _at_resp();\n}\n\nvoid at_sleep(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  AT_TRACE(0, \"_debug: I am at_sleep\");\n\n  // hal_sleep_enter_sleep();\n  // app_bt_stop_sniff();\n\n  _at_resp();\n}\n\nvoid at_sleep_clean(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n  unsigned int i;\n\n  // AT_TRACE(0,\"_debug: I am at_sleep_clean\");\n\n  for (i = 0; i < sizeof(g_at_cmd_resp) / sizeof(AT_CMD_RESP); i++) {\n    if (AT_CMD_ID_SLEEP_CLEAN == g_at_cmd_resp[i].cmd_id) {\n      g_at_cmd_resp[i].count = 0;\n      break;\n    }\n  }\n  AUTO_TEST_SEND(AT_CMD_RESP_SLEEP_CLEAN);\n}\n\nvoid at_wakeup(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_wakeup\");\n  _at_resp();\n}\n\nvoid at_switch_freq(uint32_t param0, uint32_t param1) {\n  char *p = (char *)param0;\n  char *user_str;\n  char *freq_str;\n  uint32_t user = 0xffffffff;\n  uint32_t freq = 0xffffffff;\n  int i;\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_switch_freq\");\n  user_str = (char *)param0;\n  p = strstr(user_str, \",\");\n  if (p) {\n    *p = 0;\n    p++;\n  } else {\n    AT_TRACE(0, \"_debug: at_switch_freq: param error 0.\");\n    goto _func_end;\n  }\n  _at_trim((uint8_t *)user_str);\n  if (*user_str) {\n    user = atoi(user_str);\n  } else {\n    AT_TRACE(0, \"_debug: at_switch_freq: param error 1.\");\n    goto _func_end;\n  }\n\n  freq_str = p;\n  _at_trim((uint8_t *)freq_str);\n  if (*freq_str) {\n    freq = atoi(freq_str);\n  } else {\n    AT_TRACE(0, \"_debug: at_switch_freq: param error 2.\");\n    goto _func_end;\n  }\n  if (user >= APP_SYSFREQ_USER_QTY || freq >= APP_SYSFREQ_FREQ_QTY) {\n    AT_TRACE(0, \"_debug: at_switch_freq: param error 3.\");\n    goto _func_end;\n  }\n\n  // AT_TRACE(2,\"_debug: at_switch_freq: user = %d, freq = %d.\",user,freq);\n  app_sysfreq_req((APP_SYSFREQ_USER_T)user, (APP_SYSFREQ_FREQ_T)freq);\n\n  for (i = 0; i < 10000; i++) {\n  }\n  AUTO_TEST_SEND(\"Switch freq ok.\");\n_func_end:\n  return;\n}\n\nvoid at_power_on(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_power_on\");\n  AUTO_TEST_SEND(AT_CMD_RESP_POWER_ON);\n}\n\nvoid at_bt_init(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n\n  // AT_TRACE(0,\"_debug: I am at_bt_init\");\n  _at_resp();\n}\n\n#include \"app_key.h\"\ntypedef struct {\n  uint32_t key;\n  const char *key_str;\n} AT_KEY_MAP;\nAT_KEY_MAP key_code_map[] = {{(uint32_t)HAL_KEY_CODE_NONE, \"KEY_CODE_NONE\"},\n                             {(uint32_t)HAL_KEY_CODE_PWR, \"KEY_CODE_PWR\"},\n                             {(uint32_t)HAL_KEY_CODE_FN1, \"KEY_CODE_FN1\"},\n                             {(uint32_t)HAL_KEY_CODE_FN2, \"KEY_CODE_FN2\"},\n                             {(uint32_t)HAL_KEY_CODE_FN3, \"KEY_CODE_FN3\"},\n                             {(uint32_t)HAL_KEY_CODE_FN4, \"KEY_CODE_FN4\"},\n                             {(uint32_t)HAL_KEY_CODE_FN5, \"KEY_CODE_FN5\"},\n                             {(uint32_t)HAL_KEY_CODE_FN6, \"KEY_CODE_FN6\"},\n                             {(uint32_t)HAL_KEY_CODE_FN7, \"KEY_CODE_FN7\"},\n                             {(uint32_t)HAL_KEY_CODE_FN8, \"KEY_CODE_FN8\"},\n                             {(uint32_t)HAL_KEY_CODE_FN9, \"KEY_CODE_FN9\"},\n                             {(uint32_t)HAL_KEY_CODE_FN10, \"KEY_CODE_FN10\"},\n                             {(uint32_t)HAL_KEY_CODE_FN11, \"KEY_CODE_FN11\"},\n                             {(uint32_t)HAL_KEY_CODE_FN12, \"KEY_CODE_FN12\"},\n                             {(uint32_t)HAL_KEY_CODE_FN13, \"KEY_CODE_FN13\"},\n                             {(uint32_t)HAL_KEY_CODE_FN14, \"KEY_CODE_FN14\"},\n                             {(uint32_t)HAL_KEY_CODE_FN15, \"KEY_CODE_FN15\"}};\nAT_KEY_MAP key_event_map[] = {\n    {(uint32_t)HAL_KEY_EVENT_NONE, \"KEY_EVENT_NONE\"},\n    {(uint32_t)HAL_KEY_EVENT_DOWN, \"KEY_EVENT_DOWN\"},\n    {(uint32_t)HAL_KEY_EVENT_FIRST_DOWN, \"KEY_EVENT_FIRST_DOWN\"},\n    {(uint32_t)HAL_KEY_EVENT_CONTINUED_DOWN, \"KEY_EVENT_CONTINUED_DOWN\"},\n    {(uint32_t)HAL_KEY_EVENT_UP, \"KEY_EVENT_UP\"},\n    {(uint32_t)HAL_KEY_EVENT_LONGPRESS, \"KEY_EVENT_LONGPRESS\"},\n    {(uint32_t)HAL_KEY_EVENT_LONGLONGPRESS, \"KEY_EVENT_LONGLONGPRESS\"},\n    {(uint32_t)HAL_KEY_EVENT_CLICK, \"KEY_EVENT_CLICK\"},\n    {(uint32_t)HAL_KEY_EVENT_DOUBLECLICK, \"KEY_EVENT_DOUBLECLICK\"},\n    {(uint32_t)HAL_KEY_EVENT_TRIPLECLICK, \"KEY_EVENT_TRIPLECLICK\"},\n    {(uint32_t)HAL_KEY_EVENT_ULTRACLICK, \"KEY_EVENT_ULTRACLICK\"},\n    {(uint32_t)HAL_KEY_EVENT_RAMPAGECLICK, \"KEY_EVENT_RAMPAGECLICK\"},\n    {(uint32_t)HAL_KEY_EVENT_REPEAT, \"KEY_EVENT_REPEAT\"},\n    {(uint32_t)HAL_KEY_EVENT_GROUPKEY_DOWN, \"KEY_EVENT_GROUPKEY_DOWN\"},\n    {(uint32_t)HAL_KEY_EVENT_GROUPKEY_REPEAT, \"KEY_EVENT_GROUPKEY_REPEAT\"},\n    {(uint32_t)HAL_KEY_EVENT_INITDOWN, \"KEY_EVENT_INITDOWN\"},\n    {(uint32_t)HAL_KEY_EVENT_INITUP, \"KEY_EVENT_INITUP\"},\n    {(uint32_t)HAL_KEY_EVENT_INITLONGPRESS, \"KEY_EVENT_INITLONGPRESS\"},\n    {(uint32_t)HAL_KEY_EVENT_INITLONGLONGPRESS, \"KEY_EVENT_INITLONGLONGPRESS\"},\n    {(uint32_t)HAL_KEY_EVENT_INITFINISHED, \"KEY_EVENT_INITFINISHED\"}};\nvoid at_simulate_key(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  char *code_str;\n  char *event_str;\n  uint32_t key_code = 0;\n  uint16_t key_event = 0;\n  char *p;\n  uint32_t i;\n\n  cmd_id = cmd_id;\n  AT_TRACE(0, \"_debug: I am at_simulate_key\");\n  p = (char *)param0;\n  code_str = p;\n  p = strstr(p, \",\");\n  if (p) {\n    *p = 0;\n    p++;\n  } else {\n    goto _func_end;\n  }\n\n  event_str = p;\n  _at_trim((uint8_t *)code_str);\n  _at_trim((uint8_t *)event_str);\n  AT_TRACE(2, \"_debug: code_str = %s, event_str = %s.\", code_str, event_str);\n  for (i = 0; i < sizeof(key_code_map) / sizeof(AT_KEY_MAP); i++) {\n    if (strncmp(code_str, key_code_map[i].key_str, strlen(code_str)) == 0) {\n      key_code = key_code_map[i].key;\n      break;\n    }\n  }\n\n  if (i == sizeof(key_code_map) / sizeof(AT_KEY_MAP)) {\n    goto _func_end;\n  }\n\n  for (i = 0; i < sizeof(key_event_map) / sizeof(AT_KEY_MAP); i++) {\n    if (strncmp(event_str, key_event_map[i].key_str, strlen(event_str)) == 0) {\n      key_event = (key_event_map[i].key & 0xffff);\n      break;\n    }\n  }\n\n  if (i == sizeof(key_event_map) / sizeof(AT_KEY_MAP)) {\n    goto _func_end;\n  }\n  AT_TRACE(2, \"_debug: key_code = %d, key_event = %d.\", key_code, key_event);\n\n  if (key_code == HAL_KEY_CODE_FN15 && key_event == HAL_KEY_EVENT_CLICK) {\n#if defined(BT_USB_AUDIO_DUAL_MODE_TEST)\n    test_btusb_switch_to_bt();\n    // osDelay(5000);\n#endif\n  }\n  if (key_code == HAL_KEY_CODE_FN14 && key_event == HAL_KEY_EVENT_CLICK) {\n#if defined(BT_USB_AUDIO_DUAL_MODE_TEST)\n    test_btusb_switch_to_usb();\n#endif\n  }\n  AUTO_TEST_SEND(AT_CMD_RESP_SIMULATE_KEY);\n  // simul_key_event_process((uint32_t)key_code,(uint16_t)key_event);\n\n_func_end:\n  return;\n}\n\nenum AT_FLASH_REGION_ID {\n  FLASH_REGION_ID_CODE,\n  FLASH_REGION_ID_FREE,\n  FLASH_REGION_ID_CRASH_DUMP,\n  FLASH_REGION_ID_AUD,\n  FLASH_REGION_ID_USERDATA,\n  FLASH_REGION_ID_FACTORY,\n  FLASH_REGION_ID_NUMBER,\n};\n\ntypedef struct _flash_region_info {\n  enum AT_FLASH_REGION_ID id;\n  uint32_t start_addr;\n  uint32_t end_addr;\n} AT_FLASH_REGION_INFO;\n#define AT_ALIGN(x, a) (uint32_t)(((x + a - 1) / a) * a)\nextern uint32_t __flash_start;\nextern uint32_t __flash_end;\n\nextern uint32_t __crash_dump_start;\nextern uint32_t __crash_dump_end;\n\nextern uint32_t __custom_parameter_start;\nextern uint32_t __custom_parameter_end;\n\nextern uint32_t __aud_start;\nextern uint32_t __aud_end;\n\nextern uint32_t __userdata_start;\nextern uint32_t __userdata_end;\n\nextern uint32_t __factory_start;\nextern uint32_t __factory_end;\nextern uint32_t __free_flash;\n#define AT_FLASH_SECTOR_SIZE 0x1000\n#define AT_FLASH_BLOCK_SIZE 0x10000\nAT_FLASH_REGION_INFO region_info[] = {\n    {FLASH_REGION_ID_CODE,\n     FLASH_C_TO_NC(AT_ALIGN((uint32_t)(&__flash_start), AT_FLASH_SECTOR_SIZE)),\n     FLASH_C_TO_NC(AT_ALIGN((uint32_t)(&__flash_end), AT_FLASH_SECTOR_SIZE))},\n    {FLASH_REGION_ID_FREE,\n     FLASH_C_TO_NC(AT_ALIGN((uint32_t)(&__flash_end + AT_FLASH_SECTOR_SIZE),\n                            AT_FLASH_SECTOR_SIZE)),\n     FLASH_C_TO_NC(AT_ALIGN(\n         (uint32_t)(&__flash_end + AT_FLASH_SECTOR_SIZE +\n                    16 * AT_FLASH_SECTOR_SIZE),\n         AT_FLASH_SECTOR_SIZE))}, // AT_ALIGN((uint32_t)(&__crash_dump_start),AT_FLASH_SECTOR_SIZE)},\n    {FLASH_REGION_ID_CRASH_DUMP,\n     FLASH_C_TO_NC(AT_ALIGN(\n         (uint32_t)(&__flash_end + AT_FLASH_SECTOR_SIZE +\n                    16 * AT_FLASH_SECTOR_SIZE),\n         AT_FLASH_SECTOR_SIZE)), // AT_ALIGN((uint32_t)(&__crash_dump_start),AT_FLASH_SECTOR_SIZE),\n     FLASH_C_TO_NC(AT_ALIGN(\n         (uint32_t)(&__flash_end + AT_FLASH_SECTOR_SIZE +\n                    32 * AT_FLASH_SECTOR_SIZE),\n         AT_FLASH_SECTOR_SIZE))}, // AT_ALIGN((uint32_t)(&__crash_dump_end),AT_FLASH_SECTOR_SIZE)},\n    {FLASH_REGION_ID_AUD,\n     AT_ALIGN((uint32_t)(&__aud_start), AT_FLASH_SECTOR_SIZE),\n     AT_ALIGN((uint32_t)(&__aud_end), AT_FLASH_SECTOR_SIZE)},\n    {FLASH_REGION_ID_USERDATA,\n     AT_ALIGN((uint32_t)(&__userdata_start), AT_FLASH_SECTOR_SIZE),\n     AT_ALIGN((uint32_t)(&__userdata_end), AT_FLASH_SECTOR_SIZE)},\n    {FLASH_REGION_ID_FACTORY,\n     AT_ALIGN(\n         (uint32_t)(&__factory_start) + 20 * AT_FLASH_SECTOR_SIZE,\n         AT_FLASH_SECTOR_SIZE), // AT_ALIGN((uint32_t)(&__factory_start),AT_FLASH_SECTOR_SIZE),\n     AT_ALIGN(\n         (uint32_t)(&__flash_end) + 30 * AT_FLASH_SECTOR_SIZE,\n         AT_FLASH_SECTOR_SIZE)}, // AT_ALIGN((uint32_t)(&__factory_end),AT_FLASH_SECTOR_SIZE)},\n};\n\nuint8_t at_buff_r[AT_FLASH_SECTOR_SIZE];\nuint8_t at_buff_r1[AT_FLASH_SECTOR_SIZE];\nuint8_t at_buff_w[AT_FLASH_SECTOR_SIZE];\nuint8_t at_buff_b[AT_FLASH_SECTOR_SIZE];\n\nint32_t _at_norflash_test(uint32_t addr, uint32_t size, uint8_t is_restore) {\n  uint32_t start_addr;\n  uint32_t i, j;\n  uint8_t value = 0;\n  int32_t ret = 0;\n  enum HAL_NORFLASH_RET_T result = HAL_NORFLASH_OK;\n\n  for (i = 0; i < size / AT_FLASH_SECTOR_SIZE; i++) {\n    // erase checking.\n    start_addr = addr + i * AT_FLASH_SECTOR_SIZE;\n    if (is_restore != 0) {\n      result = hal_norflash_read(HAL_NORFLASH_ID_0, start_addr, at_buff_b,\n                                 AT_FLASH_SECTOR_SIZE);\n      if (result != HAL_NORFLASH_OK) {\n        ret = -2;\n        goto _func_end;\n      }\n    }\n    result =\n        hal_norflash_erase(HAL_NORFLASH_ID_0, start_addr, AT_FLASH_SECTOR_SIZE);\n    if (result != HAL_NORFLASH_OK) {\n      ret = -1;\n      goto _func_end;\n    }\n    result = hal_norflash_read(HAL_NORFLASH_ID_0, start_addr, at_buff_r,\n                               AT_FLASH_SECTOR_SIZE);\n    if (result != HAL_NORFLASH_OK) {\n      ret = -2;\n      goto _func_end;\n    }\n    for (j = 0; j < AT_FLASH_SECTOR_SIZE; j++) {\n      if (at_buff_r[j] != 0xff) {\n        ret = -3;\n        goto _func_end;\n      }\n    }\n\n    // write/read checking\n    for (j = 0; j < AT_FLASH_SECTOR_SIZE; j++) {\n      at_buff_w[j] = value++;\n    }\n    result = hal_norflash_write(HAL_NORFLASH_ID_0, start_addr, at_buff_w,\n                                AT_FLASH_SECTOR_SIZE);\n    if (result != HAL_NORFLASH_OK) {\n      ret = -4;\n      goto _func_end;\n    }\n\n    result = hal_norflash_read(HAL_NORFLASH_ID_0, start_addr, at_buff_r,\n                               AT_FLASH_SECTOR_SIZE);\n    if (result != HAL_NORFLASH_OK) {\n      ret = -5;\n      goto _func_end;\n    }\n    for (j = 0; j < AT_FLASH_SECTOR_SIZE; j++) {\n      if (at_buff_r[j] != at_buff_w[j]) {\n        ret = -6;\n        goto _func_end;\n      }\n    }\n    if (is_restore != 0) {\n      result = hal_norflash_erase(HAL_NORFLASH_ID_0, start_addr,\n                                  AT_FLASH_SECTOR_SIZE);\n      if (result != HAL_NORFLASH_OK) {\n        ret = -7;\n        break;\n      }\n      result = hal_norflash_write(HAL_NORFLASH_ID_0, start_addr, at_buff_b,\n                                  AT_FLASH_SECTOR_SIZE);\n      if (result != HAL_NORFLASH_OK) {\n        ret = -8;\n        break;\n      }\n      result = hal_norflash_read(HAL_NORFLASH_ID_0, start_addr, at_buff_r,\n                                 AT_FLASH_SECTOR_SIZE);\n      if (result != HAL_NORFLASH_OK) {\n        ret = -9;\n        goto _func_end;\n      }\n      for (j = 0; j < AT_FLASH_SECTOR_SIZE; j++) {\n        if (at_buff_r[j] != at_buff_b[j]) {\n          ret = -10;\n          goto _func_end;\n        }\n      }\n    }\n  }\n\n_func_end:\n\n  // AT_TRACE(1,\"_debug: flash checking end. ret = %d.\",ret);\n  return ret;\n}\n\nAT_FLASH_REGION_INFO *_at_norflash_get_region_info(enum AT_FLASH_REGION_ID id) {\n  uint32_t i;\n\n  for (i = 0; i < sizeof(region_info) / sizeof(AT_FLASH_REGION_INFO); i++) {\n    if (region_info[i].id == id) {\n      return ®ion_info[i];\n    }\n  }\n  return NULL;\n}\n\nvoid at_norflash(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  // uint32_t start_addr = 0;\n  // uint32_t end_addr = 0;\n  // uint32_t size = 0;\n  // uint8_t check_code = 1;\n  // uint8_t check_free = 1;\n  // uint8_t check_crash_dump = 1;\n  // uint8_t check_aud = 1;\n  // uint8_t check_userdata = 1;\n  // uint8_t check_factory = 1;\n  AT_FLASH_REGION_INFO *region_info;\n  int32_t result = 0;\n  uint8_t error_code = 0;\n  cmd_id = cmd_id;\n  uint32_t lock_pri;\n\n  int idex;\n  char *p;\n\n  p = (char *)param0;\n  idex = atoi(p);\n\n  error_code = error_code;\n  AT_TRACE(0, \"_debug:at_norflash begin.\");\n  switch (idex) {\n  case 1: {\n    AT_TRACE(0, \"_debug:at_norflash check code region.\");\n    region_info = _at_norflash_get_region_info(FLASH_REGION_ID_CODE);\n    AT_TRACE(4, \"%s: region_info, id = %d,start = 0x%x,end = 0x%x.\", __func__,\n             region_info->id, region_info->start_addr, region_info->end_addr);\n    lock_pri = int_lock();\n    result =\n        _at_norflash_test(region_info->start_addr,\n                          (region_info->end_addr - region_info->start_addr), 1);\n    int_unlock(lock_pri);\n    if (result != 0) {\n      error_code = 1;\n      goto _func_fail;\n    }\n    break;\n  }\n  case 2: {\n    AT_TRACE(0, \"_debug:at_norflash check free region.\");\n    region_info = _at_norflash_get_region_info(FLASH_REGION_ID_FREE);\n    AT_TRACE(4, \"%s: region_info, id = %d,start = 0x%x,end = 0x%x.\", __func__,\n             region_info->id, region_info->start_addr, region_info->end_addr);\n    lock_pri = int_lock();\n    result =\n        _at_norflash_test(region_info->start_addr,\n                          (region_info->end_addr - region_info->start_addr), 0);\n    int_unlock(lock_pri);\n    if (result != 0) {\n      error_code = 2;\n      goto _func_fail;\n    }\n    break;\n  }\n  case 3: {\n    AT_TRACE(0, \"_debug:at_norflash check crash_dump region.\");\n    region_info = _at_norflash_get_region_info(FLASH_REGION_ID_CRASH_DUMP);\n    AT_TRACE(4, \"%s: region_info, id = %d,start = 0x%x,end = 0x%x.\", __func__,\n             region_info->id, region_info->start_addr, region_info->end_addr);\n    lock_pri = int_lock();\n    result =\n        _at_norflash_test(region_info->start_addr,\n                          (region_info->end_addr - region_info->start_addr), 1);\n    int_unlock(lock_pri);\n    if (result != 0) {\n      error_code = 3;\n      goto _func_fail;\n    }\n    break;\n  }\n  case 4: {\n    AT_TRACE(0, \"_debug:at_norflash check aud region.\");\n    region_info = _at_norflash_get_region_info(FLASH_REGION_ID_AUD);\n    AT_TRACE(4, \"%s: region_info, id = %d,start = 0x%x,end = 0x%x.\", __func__,\n             region_info->id, region_info->start_addr, region_info->end_addr);\n    lock_pri = int_lock();\n    result =\n        _at_norflash_test(region_info->start_addr,\n                          (region_info->end_addr - region_info->start_addr), 1);\n    int_unlock(lock_pri);\n    if (result != 0) {\n      error_code = 4;\n      goto _func_fail;\n    }\n    break;\n  }\n  case 5: {\n    AT_TRACE(0, \"_debug:at_norflash check userdata region.\");\n    region_info = _at_norflash_get_region_info(FLASH_REGION_ID_USERDATA);\n    AT_TRACE(4, \"%s: region_info, id = %d,start = 0x%x,end = 0x%x.\", __func__,\n             region_info->id, region_info->start_addr, region_info->end_addr);\n    lock_pri = int_lock();\n    result =\n        _at_norflash_test(region_info->start_addr,\n                          (region_info->end_addr - region_info->start_addr), 1);\n    int_unlock(lock_pri);\n    if (result != 0) {\n      error_code = 5;\n      goto _func_fail;\n    }\n    break;\n  }\n  case 6: {\n    AT_TRACE(0, \"_debug:at_norflash check factory region.\");\n    region_info = _at_norflash_get_region_info(FLASH_REGION_ID_FACTORY);\n    AT_TRACE(4, \"%s: region_info, id = %d,start = 0x%x,end = 0x%x.\", __func__,\n             region_info->id, region_info->start_addr, region_info->end_addr);\n    lock_pri = int_lock();\n    result =\n        _at_norflash_test(region_info->start_addr,\n                          (region_info->end_addr - region_info->start_addr), 1);\n    int_unlock(lock_pri);\n    if (result != 0) {\n      error_code = 6;\n      goto _func_fail;\n    }\n    break;\n  }\n  default:\n    AT_TRACE(0, \"_debug:at_norflash idex default.\");\n    break;\n  }\n  // AT_TRACE(0,\"_debug: I am at_norflash\");\n  error_code = 0;\n  AUTO_TEST_SEND(AT_CMD_RESP_NORFLASH);\n_func_fail:\n  AT_TRACE(1, \"_debug:Flash testing fail.error_code = %d.\", error_code);\n}\n\n#if 0\nextern \"C\" int32_t at_norflash_life_test(uint32_t count)\n{\n    uint8_t check_free = 1;\n    uint8_t check_crash_dump = 0;\n    uint8_t check_aud = 0;\n    uint8_t check_userdata = 0;\n    uint8_t check_factory = 0;\n    AT_FLASH_REGION_INFO* region_info;\n    int32_t result = 0;\n    uint8_t error_code = 0;\n    uint32_t lock_pri;\n    uint32_t i;\n    static bool is_first = true;\n\n    error_code = error_code;\n    //AT_TRACE(0,\"at_norflash_life_test begin.\");\n    for(i = 0; i < count; i++)\n    {\n        if(check_free)\n        {\n            region_info = _at_norflash_get_region_info(FLASH_REGION_ID_FREE);\n            if(is_first)\n            {\n                TRACE(0,\"free region\");\n                TRACE(4,\"%s: region_info, id = %d,start_addr = 0x%x,end_addr = 0x%x.\",\n                          __func__,region_info->id,region_info->start_addr,region_info->end_addr);\n                is_first = false;\n            }\n            lock_pri = int_lock();\n            result = _at_norflash_test(region_info->start_addr,\n                                       (region_info->end_addr - region_info->start_addr),\n                                       0);\n            int_unlock(lock_pri);\n            if(result != 0)\n            {\n                error_code = 2;\n                goto _func_fail;\n            }\n        }\n        if(check_crash_dump)\n        {\n            TRACE(0,\"at_norflash_life_test check crash_dump region.\");\n            region_info = _at_norflash_get_region_info(FLASH_REGION_ID_CRASH_DUMP);\n            lock_pri = int_lock();\n            result = _at_norflash_test(region_info->start_addr,\n                                       (region_info->end_addr - region_info->start_addr),\n                                       1);\n            int_unlock(lock_pri);\n            if(result != 0)\n            {\n                error_code = 3;\n                goto _func_fail;\n            }\n        }\n        if(check_aud)\n        {\n            TRACE(0,\"at_norflash_life_test check aud region.\");\n            region_info = _at_norflash_get_region_info(FLASH_REGION_ID_AUD);\n            lock_pri = int_lock();\n            result = _at_norflash_test(region_info->start_addr,\n                                       (region_info->end_addr - region_info->start_addr),\n                                       1);\n            int_unlock(lock_pri);\n            if(result != 0)\n            {\n                error_code = 4;\n                goto _func_fail;\n            }\n        }\n        if(check_userdata)\n        {\n            TRACE(0,\"at_norflash_life_test check userdata region.\");\n            region_info = _at_norflash_get_region_info(FLASH_REGION_ID_USERDATA);\n            lock_pri = int_lock();\n            result = _at_norflash_test(region_info->start_addr,\n                                       (region_info->end_addr - region_info->start_addr),\n                                       1);\n            int_unlock(lock_pri);\n            if(result != 0)\n            {\n                error_code = 5;\n                goto _func_fail;\n            }\n        }\n        if(check_factory)\n        {\n            TRACE(0,\"at_norflash_life_test check factory region.\");\n            region_info = _at_norflash_get_region_info(FLASH_REGION_ID_FACTORY);\n            lock_pri = int_lock();\n            result = _at_norflash_test(region_info->start_addr,\n                                       (region_info->end_addr - region_info->start_addr),\n                                       1);\n            int_unlock(lock_pri);\n            if(result != 0)\n            {\n                error_code = 6;\n                goto _func_fail;\n            }\n        }\n    }\n    error_code = 0;\n    //TRACE(1,\"at_norflash_life_test testing success. erase_count = write_count = %d.\",count);\n    return 0;\n_func_fail:\n    TRACE(1,\"at_norflash_life_test testing fail.error_code = %d.\",error_code);\n    return 1;\n}\n\n\nvoid norflash_life_test(void)\n{\n    uint32_t i;\n    uint32_t step_count;\n    int32_t ret;\n\n    step_count = 10;\n    TRACE(1,\"%s: begin.\",__func__);\n\n    for(i = 0; i < E_W_COUNT/step_count; i++)\n    {\n        ret = at_norflash_life_test(step_count);\n        if(ret == 0)\n        {\n            TRACE(2,\"%s: e_w ok! e_w_count = %d.\",__func__,(i + 1)*step_count);\n        }\n        else\n        {\n            TRACE(2,\"%s: failed! e_w_count = %d.\",__func__,(i + 1)*step_count);\n            break;\n        }\n        osDelay(4);\n    }\n    TRACE(1,\"%s: done.\",__func__);\n\n}\n#endif\n\nenum NORFLASH_ASYNC_CMD {\n  NORFLASH_ASYNC_CMD_WRITE,\n  NORFLASH_ASYNC_CMD_ERASE,\n  NORFLASH_ASYNC_CMD_FLUSH,\n};\n\n// regin[0]: start = 0x3c000000, end = 0x3c0cf000. -- code\n\n// regin[1]: start = 0x3c0cf000, end = 0x3c3ed000. -- __crash_dump\n\n// regin[2]: start = 0x3c3ed000, end = 0x3c3fd000. -- __custom_parameter\n\n// regin[3]: start = 0x3c3fe000, end = 0x3c3fe000. -- __aud\n\n// regin[4]: start = 0x3c3fe000, end = 0x3c3ff000. -- __userdata\n\n// regin[5]: start = 0x3c3ff000, end = 0x3c400000. -- __factory\n\nenum NORFLASH_ASYNC_STATE {\n  NORFLASH_ASYNC_STATE_INIT,\n  NORFLASH_ASYNC_STATE_ERASE,\n  NORFLASH_ASYNC_STATE_WRITTING,\n  NORFLASH_ASYNC_STATE_WAIT,\n  NORFLASH_ASYNC_STATE_END,\n  NORFLASH_ASYNC_STATE_FAILED,\n};\n\ntypedef struct {\n  enum NORFLASH_ASYNC_STATE state;\n  AT_FLASH_REGION_INFO *region;\n  enum NORFLASH_API_MODULE_ID_T mod_id;\n  uint32_t buff_len;\n  uint32_t e_addr;\n  uint32_t w_offs;\n  uint32_t len_index;\n  uint32_t succ_count;\n  uint32_t fail_count;\n  uint32_t tried_count;\n} ASYNC_SCENE;\n\nuint32_t g_at_len[] = {1, 255, 256, 512, 1024, 2048};\nASYNC_SCENE at_async_scene[3] = {\n    {NORFLASH_ASYNC_STATE_INIT, ®ion_info[FLASH_REGION_ID_FREE],\n     NORFLASH_API_MODULE_ID_FREE, AT_FLASH_SECTOR_SIZE * 2, 0, 0, 0, 0, 0, 0},\n    {NORFLASH_ASYNC_STATE_INIT, ®ion_info[FLASH_REGION_ID_CRASH_DUMP],\n     NORFLASH_API_MODULE_ID_CRASH_DUMP, AT_FLASH_SECTOR_SIZE * 2, 0, 0, 0, 0, 0,\n     0},\n    {NORFLASH_ASYNC_STATE_INIT, ®ion_info[FLASH_REGION_ID_FACTORY],\n     NORFLASH_API_MODULE_ID_FACTORY, AT_FLASH_SECTOR_SIZE * 1, 0, 0, 0, 0, 0,\n     0}};\nbool g_at_test_break;\n// uint8_t w_buff[AT_FLASH_SECTOR_SIZE];\n// uint8_t r_buff[AT_FLASH_SECTOR_SIZE];\nvoid at_w_buff_set(uint8_t *buff, uint32_t len) {\n  uint32_t i;\n  uint8_t val;\n\n  val = 0;\n  for (i = 0; i < len; i++) {\n    buff[i] = val;\n    val++;\n  }\n}\n\nuint32_t at_get_scene_index(uint32_t addr) {\n  uint32_t i;\n\n  for (i = 0; i < 3; i++) {\n    if (addr >= at_async_scene[i].region->start_addr &&\n        addr < at_async_scene[i].region->end_addr) {\n      return i;\n    }\n  }\n  return i;\n}\nvoid at_user_func(uint32_t param0, uint32_t param1);\nvoid at_opera_result_notify(void *param) {\n  NORFLASH_API_OPERA_RESULT *opera_result;\n  enum NORFLASH_API_RET_T result;\n  uint32_t offs;\n  uint32_t index;\n  uint32_t i;\n  // enum THREAD_USER_ID user_id;\n  // uint32_t suspend = 1;\n\n  opera_result = (NORFLASH_API_OPERA_RESULT *)param;\n\n  AT_TRACE(6,\n           \"%s:type = %d, addr = 0x%x,len = 0x%x,remain_num = %d,result = %d.\",\n           __func__, opera_result->type, opera_result->addr, opera_result->len,\n           opera_result->remain_num, opera_result->result);\n  // check.\n  index = at_get_scene_index(opera_result->addr);\n  ASSERT(index < 3, \"%s:at_get_scene_index faile!,addr = 0x%x.\", __func__,\n         opera_result->addr);\n  offs = (opera_result->addr & 0xffffff) -\n         ((opera_result->addr & 0xffffff) / 4096) * 4096;\n\n  if (opera_result->remain_num == 0) {\n    result =\n        norflash_sync_read(at_async_scene[index].mod_id, opera_result->addr,\n                           at_buff_r, opera_result->len);\n    if (result != NORFLASH_API_OK) {\n      ASSERT(0, \"%s: hal_norflash_read failed, result = %d\", __func__, result);\n    }\n    if (opera_result->type == NORFLASH_API_WRITTING) {\n      if (memcmp(at_buff_r, at_buff_w + offs, opera_result->len) == 0) {\n        AT_TRACE(4,\n                 \"%s: writting read back check ok.addr = 0x%x,len = 0x%x, offs \"\n                 \"= 0x%x.\",\n                 __func__, opera_result->addr, opera_result->len, offs);\n        at_async_scene[index].succ_count++;\n      } else {\n        uint32_t remain_len;\n        AT_TRACE(4,\n                 \"%s: writting read back check failed.addr = 0x%x,len = \"\n                 \"0x%x,offs = 0x%x.\",\n                 __func__, opera_result->addr, opera_result->len, offs);\n        for (i = 0; i < opera_result->len / 32; i++) {\n          DUMP8(\"0x%02x, \", at_buff_r + i * 32, 32);\n\n          DUMP8(\"0x%02x, \", at_buff_w + offs + i * 32, 32);\n        }\n        remain_len = opera_result->len - (opera_result->len / 32) * 32;\n        if (remain_len > 0) {\n          DUMP8(\"0x%02x, \", at_buff_r + i * 32, remain_len);\n\n          DUMP8(\"0x%02x, \", at_buff_w + offs + i * 32, remain_len);\n        }\n        at_async_scene[index].fail_count++;\n      }\n    } else {\n      for (i = 0; i < AT_FLASH_SECTOR_SIZE; i++) {\n        if (at_buff_r[i] != 0xff) {\n          break;\n        }\n      }\n      if (i == AT_FLASH_SECTOR_SIZE) {\n        at_async_scene[index].succ_count++;\n      } else {\n        AT_TRACE(1, \"%s: erasing operation read back check failed.\", __func__);\n        at_async_scene[index].fail_count++;\n      }\n    }\n  }\n\n  // user_id = (enum THREAD_USER_ID)index;\n  // suspend = 1;\n  // at_thread_user_enqueue_cmd(user_id,0,user_id,suspend,(uint32_t)at_user_func);\n}\n\nvoid at_user_func(uint32_t param0, uint32_t param1) {\n  enum NORFLASH_API_RET_T result;\n  ASYNC_SCENE *pscane;\n  enum THREAD_USER_ID user_id;\n  uint32_t suspend = 1;\n\n  user_id = (enum THREAD_USER_ID)param0;\n  suspend = param1;\n  pscane = &at_async_scene[user_id];\n  pscane->state = NORFLASH_ASYNC_STATE_INIT;\n\n  suspend = suspend;\n  AT_TRACE(4, \"%s,%d:user_id = %d,suspend = %d.\", __func__, __LINE__, user_id,\n           suspend);\n  while (1) {\n    if (g_at_test_break || pscane->fail_count > 0) {\n      pscane->state = NORFLASH_ASYNC_STATE_END;\n      break;\n    }\n\n    if (pscane->state == NORFLASH_ASYNC_STATE_INIT) {\n      AT_TRACE(2, \"%s,%d,NORFLASH_ASYNC_STATE_INIT\", __func__, __LINE__);\n      pscane->e_addr = pscane->region->start_addr;\n      pscane->w_offs = 0;\n      pscane->len_index = 0;\n      pscane->succ_count = 0;\n      pscane->fail_count = 0;\n      pscane->tried_count = 0;\n      pscane->state = NORFLASH_ASYNC_STATE_ERASE;\n    } else if (pscane->state == NORFLASH_ASYNC_STATE_ERASE) {\n      if (pscane->e_addr >= pscane->region->end_addr) {\n        AT_TRACE(3,\n                 \"%s,%d: NORFLASH_ASYNC_STATE_ERASE, has arrived to \"\n                 \"end_addr.addr = 0x%x\",\n                 __func__, __LINE__, pscane->e_addr);\n        pscane->state = NORFLASH_ASYNC_STATE_WAIT;\n        continue;\n      }\n      result = norflash_api_erase(pscane->mod_id, pscane->e_addr,\n                                  AT_FLASH_SECTOR_SIZE, true);\n      if (result == NORFLASH_API_OK) {\n        AT_TRACE(3, \"%s,%d: NORFLASH_ASYNC_STATE_ERASE,erase ok!addr = 0x%x\",\n                 __func__, __LINE__, pscane->e_addr);\n        pscane->w_offs = 0;\n        pscane->len_index = 0;\n        pscane->state = NORFLASH_ASYNC_STATE_WRITTING;\n        pscane->tried_count = 0;\n      } else if (result == NORFLASH_API_BUFFER_FULL) {\n        if (pscane->tried_count == 0) {\n          AT_TRACE(3, \"%s,%d: NORFLASH_ASYNC_STATE_ERASE,too more!addr = 0x%x\",\n                   __func__, __LINE__, pscane->e_addr);\n        }\n        pscane->tried_count++;\n        norflash_api_flush();\n        // osDelay(100);\n      } else {\n        AT_TRACE(4,\n                 \"%s,%d: NORFLASH_ASYNC_STATE_ERASE,erase failed!addr = \"\n                 \"0x%x,result = %d.\",\n                 __func__, __LINE__, pscane->e_addr, result);\n      }\n    } else if (pscane->state == NORFLASH_ASYNC_STATE_WRITTING) {\n      if (pscane->len_index >= sizeof(g_at_len) / sizeof(g_at_len[0])) {\n        AT_TRACE(3,\n                 \"%s,%d:NORFLASH_ASYNC_STATE_WRITTING,has arrived to sector \"\n                 \"end. w_offs = 0x%x\",\n                 __func__, __LINE__, pscane->w_offs);\n        pscane->e_addr += AT_FLASH_SECTOR_SIZE;\n        pscane->state = NORFLASH_ASYNC_STATE_ERASE;\n        continue;\n      }\n\n      if (norflash_api_get_used_buffer_count(pscane->mod_id, NORFLASH_API_ALL) >\n          0) {\n        norflash_api_flush();\n        continue;\n      }\n\n      result = norflash_api_write(\n          pscane->mod_id, pscane->e_addr + pscane->w_offs,\n          at_buff_w + pscane->w_offs, g_at_len[pscane->len_index], true);\n      if (result == NORFLASH_API_OK) {\n        AT_TRACE(3,\n                 \"%s,%d NORFLASH_ASYNC_STATE_WRITTING,norflash_api_write \"\n                 \"ok!addr = 0x%x\",\n                 __func__, __LINE__, pscane->e_addr + pscane->w_offs);\n        pscane->w_offs += g_at_len[pscane->len_index];\n        pscane->len_index++;\n        pscane->tried_count = 0;\n      } else if (result == NORFLASH_API_BUFFER_FULL) {\n\n        if (pscane->tried_count == 0) {\n          AT_TRACE(3,\n                   \"%s,%d: NORFLASH_ASYNC_STATE_WRITTING, too more!addr = 0x%x\",\n                   __func__, __LINE__, pscane->e_addr + pscane->w_offs);\n        }\n        pscane->tried_count++;\n        norflash_api_flush();\n        // osDelay(100);\n      } else {\n        AT_TRACE(4,\n                 \"%s,%d: NORFLASH_ASYNC_STATE_WRITTING writting failed!addr = \"\n                 \"0x%x,result = %d.\",\n                 __func__, __LINE__, pscane->e_addr + pscane->w_offs, result);\n        goto _func_fail;\n      }\n    } else if (pscane->state == NORFLASH_ASYNC_STATE_WAIT) {\n      // AT_TRACE(2,\"%s,%d,NORFLASH_ASYNC_STATE_WAIT\",__func__,__LINE__);\n      if (norflash_api_buffer_is_free(pscane->mod_id)) {\n        AT_TRACE(2,\n                 \"%s,%d: NORFLASH_ASYNC_STATE_WAIT,norflash_api_buffer_is_free \"\n                 \"is true.\",\n                 __func__, __LINE__);\n        pscane->state = NORFLASH_ASYNC_STATE_END;\n        pscane->tried_count = 0;\n      } else {\n        if (pscane->tried_count == 0) {\n          AT_TRACE(\n              2,\n              \"%s,%d: NORFLASH_ASYNC_STATE_WAIT,norflash_api_buffer_is_free is \"\n              \"false \",\n              __func__, __LINE__);\n        }\n        pscane->tried_count++;\n        norflash_api_flush();\n        // osDelay(100);\n      }\n    } else if (pscane->state == NORFLASH_ASYNC_STATE_END) {\n      AT_TRACE(2, \"%s,%d,NORFLASH_ASYNC_STATE_END\", __func__, __LINE__);\n      break;\n    }\n  }\n  AT_TRACE(3, \"%s,%d,user_id = %d\", __func__, __LINE__, user_id);\n  return;\n_func_fail:\n  AT_TRACE(2, \"%s: norflash_api failed! state = %d.\", __func__, pscane->state);\n}\n\nvoid at_norflash_async_init(enum THREAD_USER_ID user_id) {\n  ASYNC_SCENE *pscene;\n  enum NORFLASH_API_RET_T result;\n  uint32_t sector_size = 0;\n  uint32_t block_size = 0;\n  uint32_t page_size = 0;\n\n  ASSERT(user_id < 3, \"%s:user_id == %d.\", __func__, user_id);\n  AT_TRACE(3, \"%s,%d: user_id = %d.\", __func__, __LINE__, user_id);\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, &block_size, §or_size,\n                        &page_size);\n  pscene = &at_async_scene[user_id];\n  result = norflash_api_register(\n      pscene->mod_id, HAL_NORFLASH_ID_0, pscene->region->start_addr,\n      pscene->region->end_addr - pscene->region->start_addr, block_size,\n      sector_size, page_size, pscene->buff_len, at_opera_result_notify);\n  ASSERT(result == NORFLASH_API_OK, \"%s:user_id == %d,result = %d.\", __func__,\n         user_id, (int)result);\n}\n\nvoid at_norflash_suspend(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  uint32_t i;\n  uint32_t start_time;\n  static bool is_fst = true;\n\n  param0 = param0;\n  cmd_id = cmd_id;\n  AT_TRACE(0, \"I am at_norflash_suspend\");\n  g_at_test_break = false;\n  for (i = 0; i < sizeof(region_info) / sizeof(AT_FLASH_REGION_INFO); i++) {\n    AT_TRACE(3, \"regin[%d]: start = 0x%x, end = 0x%x.\", region_info[i].id,\n             region_info[i].start_addr, region_info[i].end_addr);\n  }\n  if (is_fst) {\n    at_w_buff_set(at_buff_w, AT_FLASH_SECTOR_SIZE);\n\n    at_norflash_async_init(THREAD_USER0);\n    at_norflash_async_init(THREAD_USER1);\n    //  at_norflash_async_init(THREAD_USER2);\n    is_fst = false;\n  }\n  if (!at_thread_user_is_inited(THREAD_USER0)) {\n    at_thread_user_init(THREAD_USER0);\n  }\n\n  if (!at_thread_user_is_inited(THREAD_USER1)) {\n    at_thread_user_init(THREAD_USER1);\n  }\n\n  // if(!at_thread_user_is_inited(THREAD_USER2))\n  {\n    //     at_thread_user_init(THREAD_USER2);\n  }\n  // param0: user_id\n  // praram1: suspend\n  osDelay(100);\n  at_thread_user_enqueue_cmd(THREAD_USER0, 0, THREAD_USER0, 1,\n                             (uint32_t)at_user_func);\n  // osDelay(100);\n  at_thread_user_enqueue_cmd(THREAD_USER1, 0, THREAD_USER1, 1,\n                             (uint32_t)at_user_func);\n  // osDelay(100);\n  //  at_thread_user_enqueue_cmd(THREAD_USER2,0,THREAD_USER2,1,(uint32_t)at_user_func);\n  start_time = hal_sys_timer_get();\n  while (1) {\n    if (TICKS_TO_MS(hal_sys_timer_get() - start_time) >=\n        1000 * 60) //  timeout 60second\n    {\n      AT_TRACE(1, \"%s: wait out time!\");\n      break;\n    }\n    if (at_async_scene[0].state == NORFLASH_ASYNC_STATE_END &&\n        at_async_scene[1].state == NORFLASH_ASYNC_STATE_END) {\n      if (at_async_scene[0].fail_count == 0 &&\n          at_async_scene[1].fail_count == 0) {\n        AUTO_TEST_SEND(AT_CMD_RESP_NORFLASH_SUSPEND);\n        break;\n      } else {\n        break;\n      }\n    } else if (at_async_scene[0].fail_count > 0 ||\n               at_async_scene[1].fail_count > 0) {\n      g_at_test_break = true;\n    } else {\n      AT_TRACE(2, \"%s: is runnig.time = %d(ms).\", __func__,\n               TICKS_TO_MS(hal_sys_timer_get() - start_time));\n      osDelay(500);\n    }\n  }\n\n  //_func_fail:\n  //    AT_TRACE(1,\"_debug:Flash testing fail.error_code = %d.\",error_code);\n}\n\nint32_t _at_memory_test(uint8_t *buff, uint32_t size) {\n  uint8_t value;\n  uint32_t i;\n  int32_t ret = 0;\n\n  value = 0;\n  for (i = 0; i < size; i++) {\n    buff[i] = value++;\n  }\n  value = 0;\n  for (i = 0; i < size; i++) {\n    if (buff[i] != value++) {\n      ret = 2;\n      goto _func_end;\n    }\n  }\n_func_end:\n  return ret;\n}\n\nvoid at_memory(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n  uint8_t *buff;\n  uint8_t error_code = 1;\n  int32_t result;\n\n  error_code = error_code;\n  // AT_TRACE(0,\"_debug: I am at_memory\");\n  buff = (uint8_t *)at_buff_r;\n  result = _at_memory_test(buff, AT_FLASH_SECTOR_SIZE);\n  if (result != 0) {\n    error_code = 2;\n    goto _func_fail;\n  }\n\n  buff = (uint8_t *)at_buff_w;\n  result = _at_memory_test(buff, AT_FLASH_SECTOR_SIZE);\n  if (result != 0) {\n    error_code = 2;\n    goto _func_fail;\n  }\n\n  buff = (uint8_t *)at_buff_b;\n  result = _at_memory_test(buff, AT_FLASH_SECTOR_SIZE);\n  if (result != 0) {\n    error_code = 3;\n    goto _func_fail;\n  }\n  error_code = 0;\n  AUTO_TEST_SEND(AT_CMD_RESP_MEMORY);\n_func_fail:\n  AT_TRACE(1, \"_debug:Memory testing fail.error_code = %d.\", error_code);\n}\n\nvoid at_get_mac(uint32_t param0, uint32_t param1) {\n  unsigned char *btd_addr;\n\n  btd_addr = bt_addr;\n  if (NULL != btd_addr) {\n    AT_TRACE(6, \"GETMAC_TEST_OK:%x:%x:%x:%x:%x:%x\", bt_addr[0], bt_addr[1],\n             bt_addr[2], bt_addr[3], bt_addr[4], bt_addr[5]);\n    AUTO_TEST_SEND(AT_CMD_RESP_MAC);\n  } else {\n    AT_TRACE(0, \"GETMAC_TEST_NG!\");\n    AUTO_TEST_SEND(AT_CMD_RESP_ERROR);\n  }\n\n  return;\n}\n\nvoid at_get_devicename(uint32_t param0, uint32_t param1) {\n  const char *localname;\n\n  localname = BT_LOCAL_NAME;\n  if (NULL != localname) {\n    AT_TRACE(1, \"GETNAME_TEST_OK:%s\", localname);\n  } else {\n    AT_TRACE(0, \"GETNAME_TEST_NG!\");\n  }\n\n  return;\n}\n\nvoid at_set_loopback(uint32_t param0, uint32_t param1) {\n  int idex;\n  char *p;\n\n  p = (char *)param0;\n  idex = atoi(p);\n\n  AT_TRACE(1, \"[%s]\", __func__);\n\n  switch (idex) {\n  case 1:\n    app_audio_sendrequest(APP_FACTORYMODE_AUDIO_LOOP,\n                          (uint8_t)APP_BT_SETTING_OPEN, 0);\n    AT_TRACE(0, \"LOOPBACK_TEST_OPEN!\");\n    AUTO_TEST_SEND(AT_CMD_RESP_LOOPBACK);\n    break;\n  case 2:\n    app_audio_sendrequest(APP_FACTORYMODE_AUDIO_LOOP,\n                          (uint8_t)APP_BT_SETTING_CLOSE, 0);\n    AT_TRACE(0, \"LOOPBACK_TEST_CLOSED!\");\n    AUTO_TEST_SEND(AT_CMD_RESP_LOOPBACK);\n    break;\n  default:\n    AT_TRACE(1, \"LOOPBACK_TEST param error: %s!\", idex);\n    AUTO_TEST_SEND(AT_CMD_RESP_ERROR);\n  }\n\n  return;\n}\n\nvoid at_set_led(uint32_t param0, uint32_t param1) {\n  char *p;\n  p = (char *)param0;\n\n  switch (*p) {\n  case 0x31: //'1':\n    AT_TRACE(0, \"LED light 1\");\n    app_status_indication_set(APP_STATUS_INDICATION_CHARGING);\n    AUTO_TEST_SEND(AT_CMD_RESP_LED);\n    break;\n  case 0x32: //'2':\n    AT_TRACE(0, \"LED light 2\");\n    app_status_indication_set(APP_STATUS_INDICATION_FULLCHARGE);\n    AUTO_TEST_SEND(AT_CMD_RESP_LED);\n    break;\n  default:\n    AT_TRACE(0, \"LED light all\");\n    app_status_indication_set(APP_STATUS_INDICATION_TESTMODE);\n    AUTO_TEST_SEND(AT_CMD_RESP_LED);\n    break;\n  }\n\n  AT_TRACE(0, \"SETLED_TEST_OK!\");\n  return;\n}\n\nvoid at_enter_signaling_mode(uint32_t param0, uint32_t param1) {\n  AT_TRACE(1, \"%s\", __func__);\n  hal_sw_bootmode_set(HAL_SW_BOOTMODE_TEST_MODE |\n                      HAL_SW_BOOTMODE_TEST_SIGNALINGMODE);\n  app_reset();\n}\n\nvoid at_enter_no_signaling_mode(uint32_t param0, uint32_t param1) {\n  AT_TRACE(1, \"[%s]\", __func__);\n\n  hal_sw_bootmode_set(HAL_SW_BOOTMODE_TEST_MODE |\n                      HAL_SW_BOOTMODE_TEST_NOSIGNALINGMODE);\n  app_reset();\n}\n\nconst uint8_t hci_cmd_nonsig_ble_stop_pn9[] = {0x01, 0x1f, 0x20, 0x00};\nconst uint8_t hci_cmd_stop_bt_no_signaling_test_configuration[] = {\n    0x01, 0x87, 0xfc, 0x14, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};\n\nconst uint8_t hci_cmd_ble_no_signaling_test_configuration[3][7] = {\n    // 2402-----INDEX0 tx\n    {0x01, 0x1e, 0x20, 0x03, 0x00, 0x25, 0x03},\n    // 2440-----INDEX1\n    {0x01, 0x1e, 0x20, 0x03, 0x13, 0x25, 0x03},\n    // 2480-----INDEX2\n    {0x01, 0x1e, 0x20, 0x03, 0x27, 0x25, 0x03},\n};\nconst uint8_t hci_cmd_ble_rx_no_signaling_test_configuration[3][5] = {\n    // 2402-----INDEX0 rx\n    {0x01, 0x1d, 0x20, 0x01, 0x00},\n    // 2440-----INDEX1\n    {0x01, 0x1d, 0x20, 0x01, 0x13},\n    // 2480-----INDEX2\n    {0x01, 0x1d, 0x20, 0x01, 0x27},\n};\n\nconst uint8_t hci_cmd_bt_no_signaling_test_configuration[24][24] = {\n    // BR DH3, 2402, TX-----INDEX0\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0b, 0x04, 0xB7, 0x00},\n    // BR DH3, 2402, RX-----INDEX1\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0b, 0x04, 0xb7, 0x00},\n\n    // BR DH3, 2441, TX-----INDEX2\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x27, 0x27, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0b, 0x04, 0xB7, 0x00},\n    // BR DH3, 2441, RX-----INDEX3\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x27, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0b, 0x04, 0xb7, 0x00},\n\n    // BR DH3, 2480, TX-----INDEX4\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x4e, 0x4e, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0b, 0x04, 0xB7, 0x00},\n    // BR DH3, 2480, RX-----INDEX5\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x4e, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0b, 0x04, 0xb7, 0x00},\n\n    // BR DH5, 2402, TX-----INDEX6\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0f, 0x04, 0x53, 0x01},\n    // BR DH5, 2402, RX-----INDEX7\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0f, 0x04, 0x53, 0x01},\n\n    // BR DH5, 2441, TX-----INDEX8\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x27, 0x27, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0f, 0x04, 0x53, 0x01},\n    // BR DH5, 2441, RX-----INDEX9\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x27, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0f, 0x04, 0x53, 0x01},\n\n    // BR DH5, 2480, TX-----INDEX10\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x4e, 0x4e, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0f, 0x04, 0x53, 0x01},\n    // BR DH5, 2480, RX-----INDEX11\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x4e, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x0f, 0x04, 0x53, 0x01},\n\n    // BR 2DH5, 2402, TX----INDEX12\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0e, 0x04, 0xa7, 0x02},\n    // BR 2DH5, 2402, RX----INDEX13\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0e, 0x04, 0xa7, 0x02},\n\n    // BR 2DH5, 2441, TX----INDEX14\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x27, 0x27, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0e, 0x04, 0xa7, 0x02},\n    // BR 2DH5, 2441, RX----INDEX15\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x27, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0e, 0x04, 0xa7, 0x02},\n\n    // BR 2DH5, 2480, TX----INDEX16\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x4e, 0x4e, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0e, 0x04, 0xa7, 0x02},\n    // BR 2DH5, 2480, RX----INDEX17\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x4e, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0e, 0x04, 0xa7, 0x02},\n\n    // BR 3DH5, 2402, TX----INDEX18\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0f, 0x04, 0xfd, 0x03},\n    // BR 3DH5, 2402, RX----INDEX19\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0f, 0x04, 0xfd, 0x03},\n\n    // BR 3DH5, 2441, TX----INDEX20\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x27, 0x27, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0f, 0x04, 0xfd, 0x03},\n    // BR 3DH5, 2441, RX----INDEX21\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x27, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0f, 0x04, 0xfd, 0x03},\n\n    // BR 3DH5, 2480, TX----INDEX22\n    {0x01, 0x87, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x4e, 0x4e, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0f, 0x04, 0xfd, 0x03},\n    // BR 3DH5, 2480, RX----INDEX23\n    {0x01, 0x87, 0xfc, 0x14, 0x01, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x4e, 0x02,\n     0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x01, 0x0f, 0x04, 0xfd, 0x03},\n};\n\nstatic const uint8_t hci_cmd_nonsig_tx_dh1_pn9[] = {\n    0x01, 0x60, 0xfc, 0x14, 0x00, 0xe8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,\n    0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x01, 0x00, 0x04, 0x04, 0x1b, 0x00};\n\nvoid BleFrequencyTestStop() {\n  btdrv_SendData(hci_cmd_nonsig_ble_stop_pn9,\n                 sizeof(hci_cmd_nonsig_ble_stop_pn9));\n}\nvoid BtFrequencyTestStop() {\n  btdrv_SendData(hci_cmd_stop_bt_no_signaling_test_configuration,\n                 sizeof(hci_cmd_stop_bt_no_signaling_test_configuration));\n}\n\nvoid BleFrequencyTestStart(uint8_t index) {\n  TRACE(2, \"[%s] index is %d\", __func__, index);\n\n  btdrv_SendData(hci_cmd_ble_no_signaling_test_configuration[index],\n                 sizeof(hci_cmd_ble_no_signaling_test_configuration[0]));\n}\nvoid BleFrequencyTestStartRx(uint8_t index) {\n  TRACE(2, \"[%s] index is %d\", __func__, index);\n\n  btdrv_SendData(hci_cmd_ble_rx_no_signaling_test_configuration[index],\n                 sizeof(hci_cmd_ble_rx_no_signaling_test_configuration[0]));\n}\nvoid BtFrequencyTestStart(uint8_t index) {\n\n  TRACE(2, \"[%s] index is %d\", __func__, index);\n  if (index < sizeof(hci_cmd_bt_no_signaling_test_configuration) /\n                  sizeof(hci_cmd_bt_no_signaling_test_configuration[0])) {\n    btdrv_SendData(hci_cmd_bt_no_signaling_test_configuration[index],\n                   sizeof(hci_cmd_bt_no_signaling_test_configuration[0]));\n  } else {\n    btdrv_SendData(hci_cmd_nonsig_tx_dh1_pn9,\n                   sizeof(hci_cmd_nonsig_tx_dh1_pn9));\n  }\n}\n\nvoid at_no_signaling_ble_test(uint32_t param0, uint32_t param1) {\n  AT_TRACE(1, \"[%s]\", __func__);\n\n  char *p;\n  p = (char *)param0;\n\n  switch (*p) {\n  case RF_CHANNEL_BLE_STOP: {\n    BleFrequencyTestStop();\n    break;\n  }\n  case RF_FREQUENCY_2402: {\n    BleFrequencyTestStart(0);\n    break;\n  }\n  case RF_FREQUENCY_2440: {\n    BleFrequencyTestStart(1);\n    break;\n  }\n  case RF_FREQUENCY_2480: {\n    BleFrequencyTestStart(2);\n    break;\n  }\n  case RF_FREQUENCY_2402_RX: {\n    BleFrequencyTestStartRx(0);\n    break;\n  }\n  case RF_FREQUENCY_2440_RX: {\n    BleFrequencyTestStartRx(1);\n    break;\n  }\n  case RF_FREQUENCY_2480_RX: {\n    BleFrequencyTestStartRx(2);\n    break;\n  }\n  default:\n    break;\n  }\n\n  return;\n}\n\nvoid at_no_signaling_bt_test(uint32_t param0, uint32_t param1) {\n  AT_TRACE(1, \"[%s]\", __func__);\n\n  int idex;\n  char *p;\n\n  p = (char *)param0;\n  idex = atoi(p);\n  BtFrequencyTestStart(idex);\n\n  return;\n}\n\nvoid at_get_battery(uint32_t param0, uint32_t param1) {\n  AT_TRACE(1, \"[%s]\", __func__);\n\n  uint16_t batteryInfo = 0;\n  int getstatus = app_battery_get_info(&batteryInfo, NULL, NULL);\n  if (getstatus) {\n    AUTO_TEST_SEND(AT_CMD_RESP_ERROR);\n  } else {\n    AT_TRACE(1, \"battery voltage:%d mV\", batteryInfo);\n    AUTO_TEST_SEND(AT_CMD_RESP_BATTERY);\n  }\n  return;\n}\n\nvoid at_set_volume(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n  int idex;\n  char *p;\n\n  AT_TRACE(0, \"_debug: I at_set_volume\");\n\n  p = (char *)param0;\n  idex = atoi(p);\n  AT_TRACE(1, \"_debug: volume set: %d\", idex);\n\n  if (idex > TGT_VOLUME_LEVEL_15) {\n    idex = 17;\n  }\n  if (idex < TGT_VOLUME_LEVEL_MUTE) {\n    idex = 1;\n  }\n\n  // app_bt_set_volume(APP_BT_STREAM_HFP_PCM,idex);\n  app_bt_set_volume(APP_BT_STREAM_A2DP_SBC, idex);\n  // btapp_hfp_report_speak_gain();\n  btapp_a2dp_report_speak_gain();\n\n  _at_resp();\n  return;\n}\n\nvoid at_get_fwversion(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n  uint8_t fw_rev[4];\n\n  AT_TRACE(0, \"_debug: I at_get_fwversion\");\n\n  system_get_fwversion(&fw_rev[0], &fw_rev[1], &fw_rev[2], &fw_rev[3]);\n  AT_TRACE(4, \"_debug: FwVersion: %d.%d.%d.%d\", fw_rev[0], fw_rev[1], fw_rev[2],\n           fw_rev[3]);\n  AUTO_TEST_SEND(AT_CMD_RESP_FWVER);\n\n  _at_resp();\n  return;\n}\n\nvoid at_get_bootmode(uint32_t param0, uint32_t param1) {\n  AT_CMD_ID_ENUM_T cmd_id = (AT_CMD_ID_ENUM_T)param1;\n  cmd_id = cmd_id;\n  uint32_t bootmode;\n\n  AT_TRACE(0, \"_debug: I at_get_bootmode\");\n\n  bootmode = hal_sw_bootmode_get();\n  AT_TRACE(1, \"_debug: bootmode: 0x%x.\", bootmode);\n  AUTO_TEST_SEND(AT_CMD_RESP_BOOTMODE);\n\n  _at_resp();\n  return;\n}\n\nint32_t at_Init(void) {\n  int32_t ret;\n\n  AT_TRACE(0, \"at_Init.\");\n  ret = at_os_init();\n  return ret;\n}\n#endif // (_AUTO_TEST_)\n"
  },
  {
    "path": "services/ble_app/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\n\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_main/*.c))\nifneq ($(__BES_OTA_MODE__),1)\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_htp/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_datapath/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_hrps/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_hid/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_sec/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_batt/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_voice/app_$(VOICE_DATAPATH_TYPE)/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_ota/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_ancc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_amsc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_gfps/*.c))\nifneq ($(VOICE_DATAPATH_TYPE), )\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)app_voice/*.c))\nendif\nendif\n\nifeq ($(TEST_OVER_THE_AIR),1)\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)/app_tota/*.c))\nsubdir-ccflags-y += \\\n    -Iservices/tota/ \\\n    -Iservices/ble_profiles/tota/\\\n    -Iservices/ble_app/app_tota/\nendif\n\nobj-y := $(obj_c:.c=.o)\n\nsubdir-ccflags-y += \\\n    -Iservices/audio_process \\\n    -Iservices/fs/fat \\\n    -Iservices/fs/sd \\\n    -Iservices/fs/fat/ChaN \\\n    $(BT_IF_INCLUDES) \\\n    $(BT_PROFILES_INCLUDES) \\\n    -Iservices/overlay \\\n    -Iservices/nvrecord \\\n    -Iservices/resources \\\n    -Iservices/voicepath/ \\\n    -Iservices/voicepath/$(VOICE_DATAPATH_TYPE) \\\n    -Iplatform/drivers/uarthci \\\n    -Iplatform/drivers/ana \\\n    -Iplatform/drivers/bt \\\n    -Iutils/cqueue \\\n    -Iutils/retention_ram \\\n    -Iservices/audioflinger \\\n    -Iutils/lockcqueue \\\n    -Iutils/intersyshci \\\n    -Iutils/heap \\\n    -Iutils/crc16 \\\n    -Iapps/battery \\\n    -Iapps/key \\\n    -Iapps/main \\\n    -Iapps/common \\\n    -Iapps/audioplayers \\\n    -Iapps/factory \\\n    -Iservices/ble_app \\\n    -Iservices/ble_stack/ble_ip \\\n    -Iservices/ble_stack/hl/api \\\n    -Iservices/ble_stack/app/api/ \\\n    -Iservices/ble_stack/common/api/ \\\n    -Iservices/ble_stack/hl/inc/ \\\n    -Iservices/ble_stack/ke/api \\\n    -Iservices/bridge/ \\\n    -Iservices/ble_stack/hl/src/gap/ \\\n    -Iservices/ble_stack/hl/src/gap/gapc/ \\\n    -Iservices/ble_stack/hl/src/gap/gapm/ \\\n    -Iservices/ble_stack/hl/src/gap/smpc/ \\\n    -Iservices/ble_stack/ke/src/ \\\n    -Iservices/ble_stack/hl/src/gatt/attc/ \\\n    -Iservices/ble_stack/hl/src/gatt/attm/ \\\n    -Iservices/ble_stack/hl/src/gatt/atts/ \\\n    -Iservices/ble_stack/hl/src/gatt/gattc/ \\\n    -Iservices/ble_stack/hl/src/gatt/gattm/ \\\n    -Iservices/ble_stack/hl/src/gatt/ \\\n    -Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n    -Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n    -Iservices/ble_stack/hci/api/ \\\n    -Iservices/ble_stack/hci/src/ \\\n    -Iservices/ble_stack/app/src/ \\\n    -Iservices/ble_profiles/htp/htpt/api/ \\\n    -Iservices/ble_profiles/htp/htpt/src/ \\\n    -Iservices/ble_profiles/htp/ \\\n    -Iservices/ble_profiles/datapath/datapathps/api/ \\\n    -Iservices/ble_app/app_main/ \\\n    -Iservices/ble_app/app_htp/ \\\n    -Iservices/ble_app/app_datapath/ \\\n    -Iservices/ble_app/app_hrps/ \\\n    -Iservices/ble_profiles/hrp/hrps/api/ \\\n    -Iservices/ble_profiles/hrp/hrps/src \\\n    -Iservices/ble_profiles/hrp/ \\\n    -Iservices/ble_app/app_sec/ \\\n    -Iservices/ble_app/app_batt/ \\\n    -Iservices/ble_app/app_hid/ \\\n    -Iservices/ble_app/app_gfps/ \\\n    -Iservices/ble_profiles/gfps/gfps_provider/api/ \\\n    -Iservices/ble_profiles/gfps/api/ \\\n    -Iservices/ble_profiles/bas/bass/api/ \\\n    -Iservices/ble_profiles/hogp/hogpd/api/ \\\n    -Iservices/ble_profiles/hogp/ \\\n    -Iservices/multimedia/speech/inc \\\n    -Iservices/ble_app/app_voice \\\n    -Iservices/ble_profiles/voicepath/$(VOICE_DATAPATH_TYPE)/ \\\n    -Iservices/ble_app/app_voice/app_$(VOICE_DATAPATH_TYPE)/ \\\n    -Iservices/ble_profiles/ota \\\n    -Iservices/ble_app/app_ota \\\n    -Iservices/ble_profiles/anc/\\\n    -Iservices/ble_profiles/anc/ancc/\\\n    -Iservices/ble_app/app_ancc/ \\\n    -Iservices/ble_profiles/ams/\\\n    -Iservices/ble_profiles/ams/amsc/\\\n    -Iservices/ble_app/app_amsc/ \\\n    -Iservices/bt_app \\\n    -Iservices/voicepath/gsound/gsound_custom/inc \\\n    -Iservices/voicepath/gsound/gsound_custom/src \\\n    -Iservices/voicepath/gsound/gsound_target_api_read_only \\\n    -Iservices/ai_voice/manager \\\n    -Iservices/ai_voice/transport \\\n    -Iservices/multimedia/audio/codec/sbc/inc \\\n    -Iservices/multimedia/audio/codec/sbc/src/inc \\\n    -Iservices/app_tws/inc \\\n    -Iservices/ibrt_ui/inc  \\\n    -Iservices/ibrt_core/inc \\\n    -Iservices/app_ibrt/inc \\\n    -Iservices/bt_app/a2dp_codecs/include  \\\n    -Iservices/ble_profiles/tile \\\n    -Ithirdparty/tile \\\n    -Ithirdparty/tile/tile_target \\\n    -Ithirdparty/tile/tile_common/tile_assert \\\n    -Ithirdparty/tile/tile_common/tile_features \\\n    -Ithirdparty/tile/tile_common/tile_gatt_db \\\n    -Ithirdparty/tile/tile_common/tile_player \\\n    -Ithirdparty/tile/tile_common/tile_service \\\n    -Ithirdparty/tile/tile_common/tile_storage \\\n    -Iservices/voicepath/gsound/gsound_target\n\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_voice_over_ble.o += -D__AUDIO_RESAMPLE__\nendif\nifeq ($(SW_PLAYBACK_RESAMPLE),1)\nCFLAGS_voice_over_ble.o += -DSW_PLAYBACK_RESAMPLE\nendif\nifeq ($(SW_CAPTURE_RESAMPLE),1)\nCFLAGS_voice_over_ble.o += -DSW_CAPTURE_RESAMPLE\nendif\nifeq ($(OTA_ENABLE),1)\nifeq ($(IBRT),1)\nccflags-y += -Iservices/ibrt_ota/inc\nelse\nccflags-y += -Iservices/ota\nendif\nendif\n\n"
  },
  {
    "path": "services/ble_app/app_amsc/app_amsc.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_APP_PRESENT)\n#if (BLE_AMS_CLIENT)\n\n#include \"amsc_task.h\" // health thermometer functions\n#include \"app.h\"       // Application Definitions\n#include \"app_amsc.h\"  // Health Thermometer Application Definitions\n#include \"app_task.h\"  // application task definitions\n#include \"arch.h\"      // Platform Definitions\n#include \"co_bt.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n#include \"co_math.h\"\n#include \"ke_timer.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nvoid app_amsc_add_amsc(void) {\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, 0);\n\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n  req->prf_task_id = TASK_ID_AMSC;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\n/**\n ****************************************************************************************\n * @brief Initialize application and enable AMSC profile.\n *\n ****************************************************************************************\n */\nvoid app_amsc_enable(uint8_t conidx) {\n  // Allocate the message\n  struct amsc_enable_req *req = KE_MSG_ALLOC(\n      AMSC_ENABLE_REQ, KE_BUILD_ID(prf_get_task_from_id(TASK_ID_AMSC), conidx),\n      TASK_APP, amsc_enable_req);\n\n  // Fill in the parameter structure\n  req->conidx = conidx;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\n#endif // BLE_AMS_CLIENT\n#endif // BLE_APP_PRESENT\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_amsc/app_amsc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef APP_AMSC_H_\n#define APP_AMSC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n *\n * @brief AMSC Application entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#if BLE_AMS_CLIENT\n#include \"amsc.h\"\n\n#include \"app.h\"                     // Application Definitions\n#include \"app_task.h\"                // application task definitions\n#include \"co_bt.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"arch.h\"                    // Platform Definitions\n#include \"prf.h\"\n#include \"string.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n *\n * AMSC Application Functions\n *\n ****************************************************************************************\n */\n\nvoid app_amsc_add_amsc(void);\n\n/**\n ****************************************************************************************\n * @brief Inialize application and enable AMSC profile.\n *\n ****************************************************************************************\n */\nvoid app_amsc_enable(uint8_t conidx);\n\n#endif //BLE_AMS_CLIENT\n\n/// @} APP\n\n#endif // APP_AMSC_H_\n"
  },
  {
    "path": "services/ble_app/app_amsc/app_amsc_task.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup APPTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_PRESENT)\n\n#if (BLE_AMS_CLIENT)\n\n#include \"app_amsc.h\"\n#include \"app_amsc_task.h\"\n#include \"app_sec.h\"\n#include \"app_task.h\" // Application Task API\n#include \"ke_msg.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles AMS Eable reponse\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n\nint amsc_anc_enable_rsp_handler(ke_msg_id_t const msgid,\n                                struct amsc_enable_rsp const *param,\n                                ke_task_id_t const dest_id,\n                                ke_task_id_t const src_id) {\n\n  return (KE_MSG_CONSUMED);\n}\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_amsc_msg_handler_list[] = {\n    {AMSC_ENABLE_RSP, (ke_msg_func_t)amsc_anc_enable_rsp_handler},\n};\n\nconst struct ke_state_handler app_amsc_table_handler = {\n    &app_amsc_msg_handler_list[0],\n    (sizeof(app_amsc_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif // BLE_AMS_CLIENT\n\n#endif //(BLE_APP_PRESENT)\n\n/// @} APPTASK\n"
  },
  {
    "path": "services/ble_app/app_amsc/app_amsc_task.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#include \"rwip_config.h\"\n\n#ifndef APP_AMSC_TASK_H_\n#define APP_AMSC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n *\n * @brief \n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#if BLE_AMS_CLIENT\n\n#include \"amsc_task.h\"\n\n/// Table of message handlers\nextern const struct ke_state_handler app_amsc_table_handler;\n\n#endif //BLE_AMS_CLIENT\n\n/// @} APP\n\n#endif // APP_AMSC_TASK_H_\n"
  },
  {
    "path": "services/ble_app/app_ancc/app_ancc.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_APP_PRESENT)\n#if (BLE_ANC_CLIENT)\n\n#include \"ancc_task.h\" // health thermometer functions\n#include \"app.h\"       // Application Definitions\n#include \"app_ancc.h\"  // Health Thermometer Application Definitions\n#include \"app_task.h\"  // application task definitions\n#include \"arch.h\"      // Platform Definitions\n#include \"co_bt.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n#include \"co_math.h\"\n#include \"ke_timer.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nvoid app_ancc_add_ancc(void) {\n  BLE_APP_DBG(\"app_ancc_add_ancc\");\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, 0);\n\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_ANCC;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\n/**\n ****************************************************************************************\n * @brief Initialize application and enable ANCC profile.\n *\n ****************************************************************************************\n */\nvoid app_ancc_enable(uint8_t conidx) {\n  BLE_FUNC_ENTER();\n\n  // Allocate the message\n  struct ancc_enable_req *req = KE_MSG_ALLOC(\n      ANCC_ENABLE_REQ, KE_BUILD_ID(prf_get_task_from_id(TASK_ID_ANCC), conidx),\n      TASK_APP, ancc_enable_req);\n\n  // Fill in the parameter structure\n\n  req->conidx = conidx;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\n#endif // BLE_ANC_CLIENT\n#endif // BLE_APP_PRESENT\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_ancc/app_ancc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef APP_ANCC_H_\n#define APP_ANCC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n *\n * @brief ANCC Application entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#if BLE_ANC_CLIENT\n#include \"ancc.h\"\n\n#include \"app.h\"                     // Application Definitions\n#include \"app_task.h\"                // application task definitions\n#include \"co_bt.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"arch.h\"                    // Platform Definitions\n#include \"prf.h\"\n#include \"string.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n *\n * ANCC Application Functions\n *\n ****************************************************************************************\n */\n\nvoid app_ancc_add_ancc(void);\n\n/**\n ****************************************************************************************\n * @brief Inialize application and enable ANCC profile.\n *\n ****************************************************************************************\n */\nvoid app_ancc_enable(uint8_t conidx);\n\n#endif //BLE_ANC_CLIENT\n\n/// @} APP\n\n#endif // APP_ANCC_H_\n"
  },
  {
    "path": "services/ble_app/app_ancc/app_ancc_task.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup APPTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_PRESENT)\n\n#if (BLE_ANC_CLIENT)\n\n#include \"app_ancc.h\"\n#include \"app_ancc_task.h\"\n#include \"app_sec.h\"\n#include \"app_task.h\" // Application Task API\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles ANCS Enable response\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n\nint ancc_anc_enable_rsp_handler(ke_msg_id_t const msgid,\n                                struct ancc_enable_rsp const *param,\n                                ke_task_id_t const dest_id,\n                                ke_task_id_t const src_id) {\n\n  return (KE_MSG_CONSUMED);\n}\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_ancc_msg_handler_list[] = {\n    {ANCC_ENABLE_RSP, (ke_msg_func_t)ancc_anc_enable_rsp_handler},\n};\n\nconst struct ke_state_handler app_ancc_table_handler = {\n    &app_ancc_msg_handler_list[0],\n    (sizeof(app_ancc_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif // BLE_ANC_CLIENT\n\n#endif //(BLE_APP_PRESENT)\n\n/// @} APPTASK\n"
  },
  {
    "path": "services/ble_app/app_ancc/app_ancc_task.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#include \"rwip_config.h\"\n\n#ifndef APP_ANCC_TASK_H_\n#define APP_ANCC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n *\n * @brief \n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#if BLE_ANC_CLIENT\n\n#include \"ancc_task.h\"\n\n/// Table of message handlers\nextern const struct ke_state_handler app_ancc_table_handler;\n\n#endif //BLE_ANC_CLIENT\n\n/// @} APP\n\n#endif // APP_ANCC_TASK_H_\n"
  },
  {
    "path": "services/ble_app/app_batt/app_batt.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_BATT)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"app.h\"       // Application Definitions\n#include \"app_batt.h\"  // Battery Application Module Definitions\n#include \"app_task.h\"  // application task definitions\n#include \"arch.h\"      // Platform Definitions\n#include \"bass_task.h\" // health thermometer functions\n#include \"co_bt.h\"\n#include \"prf.h\"\n#include \"prf_types.h\" // Profile common types definition\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Battery Application Module Environment Structure\nstruct app_batt_env_tag app_batt_env;\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nvoid app_batt_init(void) {\n  // Reset the environment\n  memset(&app_batt_env, 0, sizeof(struct app_batt_env_tag));\n\n  // Initial battery level: 100\n  app_batt_env.batt_lvl = 100;\n}\n\nvoid app_batt_add_bas(void) {\n  struct bass_db_cfg *db_cfg;\n  // Allocate the BASS_CREATE_DB_REQ\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, sizeof(struct bass_db_cfg));\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_BASS;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Set parameters\n  db_cfg = (struct bass_db_cfg *)req->param;\n\n  // Add a BAS instance\n  db_cfg->bas_nb = 1;\n  // Sending of notifications is supported\n  db_cfg->features[0] = BAS_BATT_LVL_NTF_SUP;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nvoid app_batt_enable_prf(uint8_t conidx) {\n  app_batt_env.conidx = conidx;\n\n  // Allocate the message\n  struct bass_enable_req *req = KE_MSG_ALLOC(\n      BASS_ENABLE_REQ, KE_BUILD_ID(prf_get_task_from_id(TASK_ID_BASS), conidx),\n      TASK_APP, bass_enable_req);\n\n  // Fill in the parameter structure\n  req->conidx = conidx;\n\n  // NTF initial status - Disabled\n  req->ntf_cfg = PRF_CLI_STOP_NTFIND;\n  req->old_batt_lvl[0] = 50;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nvoid app_batt_send_lvl(uint8_t conidx, uint8_t batt_lvl) {\n  ASSERT_ERR(batt_lvl <= BAS_BATTERY_LVL_MAX);\n\n  // Allocate the message\n  struct bass_batt_level_upd_req *req =\n      KE_MSG_ALLOC(BASS_BATT_LEVEL_UPD_REQ,\n                   KE_BUILD_ID(prf_get_task_from_id(TASK_ID_BASS), conidx),\n                   TASK_APP, bass_batt_level_upd_req);\n\n  // Fill in the parameter structure\n  req->bas_instance = 0;\n  req->batt_level = batt_lvl;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nstatic int bass_batt_level_ntf_cfg_ind_handler(\n    ke_msg_id_t const msgid, struct bass_batt_level_ntf_cfg_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int batt_level_upd_handler(ke_msg_id_t const msgid,\n                                  struct bass_batt_level_upd_rsp const *param,\n                                  ke_task_id_t const dest_id,\n                                  ke_task_id_t const src_id) {\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int bass_enable_rsp_handler(ke_msg_id_t const msgid,\n                                   struct bass_enable_rsp const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int app_batt_msg_dflt_handler(ke_msg_id_t const msgid, void const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * LOCAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_batt_msg_handler_list[] = {\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_batt_msg_dflt_handler},\n    {BASS_BATT_LEVEL_NTF_CFG_IND,\n     (ke_msg_func_t)bass_batt_level_ntf_cfg_ind_handler},\n    {BASS_BATT_LEVEL_UPD_RSP, (ke_msg_func_t)batt_level_upd_handler},\n};\n\nconst struct ke_state_handler app_batt_table_handler = {\n    &app_batt_msg_handler_list[0],\n    (sizeof(app_batt_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif // BLE_APP_BATT\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_batt/app_batt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef APP_BATT_H_\n#define APP_BATT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @ingroup RICOW\n *\n * @brief Battery Application Module entry point\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW configuration\n\n#if (BLE_APP_BATT)\n\n#include           // Standard Integer Definition\n#include \"ke_task.h\"         // Kernel Task Definition\n\n/*\n * STRUCTURES DEFINITION\n ****************************************************************************************\n */\n\n/// Battery Application Module Environment Structure\nstruct app_batt_env_tag\n{\n    /// Connection handle\n    uint8_t conidx;\n    /// Current Battery Level\n    uint8_t batt_lvl;\n};\n\n/*\n * GLOBAL VARIABLES DECLARATIONS\n ****************************************************************************************\n */\n\n/// Battery Application environment\nextern struct app_batt_env_tag app_batt_env;\n\n/// Table of message handlers\nextern const struct ke_state_handler app_batt_table_handler;\n\n/*\n * FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n *\n * Health Thermometer Application Functions\n *\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialize Battery Application Module\n ****************************************************************************************\n */\nvoid app_batt_init(void);\n\n/**\n ****************************************************************************************\n * @brief Add a Battery Service instance in the DB\n ****************************************************************************************\n */\nvoid app_batt_add_bas(void);\n\n/**\n ****************************************************************************************\n * @brief Enable the Battery Service\n ****************************************************************************************\n */\nvoid app_batt_enable_prf(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Send a Battery level value\n ****************************************************************************************\n */\nvoid app_batt_send_lvl(uint8_t conidx, uint8_t batt_lvl);\n\n#endif //(BLE_APP_BATT)\n\n/// @} APP\n\n#endif // APP_BATT_H_\n"
  },
  {
    "path": "services/ble_app/app_ble_key.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_key.h\"\n#include \"hal_trace.h\"\n#include \n#include \n#include \n\n#define TEST_KEY_UP HAL_KEY_CODE_FN3\n#define TEST_KEY_DOWN HAL_KEY_CODE_FN4\n\n#define TEST_KEY_UP_VALUE 0x12\n#define TEST_KEY_DOWN_VALUE 0x34\n\nextern void register_ble_key_handle_cb(void (*cb)(APP_KEY_STATUS));\n\nextern \"C\" {\nextern void app_ble_key_notify(uint8_t len, uint8_t *value);\n}\n\nvoid app_ble_key_handle(APP_KEY_STATUS ble_key);\n\nuint32_t app_ble_key_init() { register_ble_key_handle_cb(app_ble_key_handle); }\n\nvoid ble_key_handle_up_key(enum APP_KEY_EVENT_T event) {\n  uint8_t value = TEST_KEY_UP_VALUE;\n  switch (event) {\n  case APP_KEY_EVENT_UP:\n    app_ble_key_notify(sizeof(value), &value);\n    break;\n  case APP_KEY_EVENT_CLICK:\n    // app_ble_key_notify(sizeof(value), &value);\n    break;\n  case APP_KEY_EVENT_DOUBLECLICK:\n    break;\n  default:\n    TRACE(1, \"unregister up key event=%x\", event);\n  }\n}\n\nvoid ble_key_handle_down_key(enum APP_KEY_EVENT_T event) {\n  uint8_t value = TEST_KEY_DOWN_VALUE;\n  switch (event) {\n  case APP_KEY_EVENT_UP:\n    app_ble_key_notify(sizeof(value), &value);\n    break;\n  case APP_KEY_EVENT_CLICK:\n    // app_ble_key_notify(sizeof(value), &value);\n    break;\n  case APP_KEY_EVENT_DOUBLECLICK:\n    break;\n  default:\n    TRACE(1, \"unregister up key event=%x\", event);\n  }\n}\n\nvoid app_ble_key_handle(APP_KEY_STATUS ble_key) {\n  if (ble_key.code != 0xff) {\n    TRACE(2, \"app_ble_key_handle code:%x event:%x\", ble_key.code,\n          ble_key.event);\n    switch (ble_key.code) {\n    case TEST_KEY_UP:\n      ble_key_handle_up_key((enum APP_KEY_EVENT_T)ble_key.event);\n      break;\n    case TEST_KEY_DOWN:\n      ble_key_handle_down_key((enum APP_KEY_EVENT_T)ble_key.event);\n      break;\n    default:\n      TRACE(0, \"app_ble_key_handle  undefined key\");\n      break;\n    }\n  }\n}\n"
  },
  {
    "path": "services/ble_app/app_ble_uart.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n//#include \"mbed.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \n#include \n#include \n\n#define APP_BLE_UART_BUFF_SIZE 50 // 16\n\nenum HAL_UART_ID_T app_ble_uart_id = HAL_UART_ID_0;\n\nextern \"C\" {\ntypedef void (*GATT_UART_HANDLER_T)(uint8_t *buf, uint32_t len);\nextern void gatt_uart_register_write_request_cb(GATT_UART_HANDLER_T handler);\nextern int gatt_uart_write(uint8_t *buffer, uint32_t length);\nextern int gatt_loop_write(uint8_t *buffer, uint32_t length);\n}\n\nstatic uint32_t app_ble_debug_cnt = 0;\n\nvoid app_ble_send_data(uint8_t *buffer, uint32_t length) {\n  TRACE(1, \"[%s]\", __func__);\n  gatt_uart_write(buffer, length);\n  //    gatt_loop_write(buffer, length);\n}\n\ntypedef struct {\n  volatile bool rx_done;\n  volatile bool tx_done;\n  uint8_t rx_data[APP_BLE_UART_BUFF_SIZE];\n  uint32_t rx_len;\n} app_ble_uart_t;\n\napp_ble_uart_t app_ble_uart;\n\nstatic void uart_rx(uint32_t xfer_size, int dma_error,\n                    union HAL_UART_IRQ_T status) {\n  app_ble_debug_cnt = 4;\n  if (dma_error) {\n    //        TRACE(1,\"uart_rx dma error: xfer_size=%d\", xfer_size);\n    app_ble_debug_cnt = 0xfe;\n    app_ble_uart.rx_len = 0;\n  } else if (status.BE || status.FE || status.OE || status.PE) {\n    //        TRACE(2,\"uart_rx uart error: xfer_size=%d, status=0x%08x\",\n    //        xfer_size, status.reg);\n    app_ble_debug_cnt = 0xfd;\n    app_ble_uart.rx_len = 0;\n  } else {\n    app_ble_debug_cnt = 0xfc;\n    app_ble_uart.rx_len = xfer_size;\n    //        hal_uart_dma_recv(app_ble_uart_id, app_ble_uart.rx_data,\n    //        app_ble_uart.rx_len - 5, NULL, NULL);\n    //        gatt_uart_write(app_ble_uart.rx_data, app_ble_uart.rx_len - 5);\n\n    //        hal_uart_dma_recv(app_ble_uart_id, app_ble_uart.rx_data, 5, NULL,\n    //        NULL); gatt_uart_write(app_ble_uart.rx_data, 5);\n\n    hal_uart_dma_recv(app_ble_uart_id, app_ble_uart.rx_data,\n                      sizeof(app_ble_uart.rx_data), NULL, NULL);\n    //        //hal_uart_dma_send(app_ble_uart_id, app_ble_uart.rx_data,\n    //        app_ble_uart.rx_len, NULL, NULL);\n    gatt_uart_write(app_ble_uart.rx_data, app_ble_uart.rx_len);\n  }\n\n  app_ble_uart.rx_done = true;\n}\n\nstatic void uart_tx(uint32_t xfer_size, int dma_error) {\n  if (dma_error) {\n    //        TRACE(1,\"uart_tx dma error: xfer_size=%d\", xfer_size);\n    app_ble_debug_cnt = 0xfb;\n  }\n  app_ble_uart.tx_done = true;\n}\n\nvoid app_ble_uart_write_request_cb(uint8_t *buf, uint32_t len) {\n  // send data over uart.\n  hal_uart_dma_send(app_ble_uart_id, buf, len, NULL, NULL);\n  // DUMP8(\"%x \", buf, len);\n}\n\nuint32_t app_ble_uart_open() {\n#if 1\n  int ret;\n  union HAL_UART_IRQ_T mask;\n\n  struct HAL_UART_CFG_T uart_cfg;\n\n  uart_cfg.parity = HAL_UART_PARITY_NONE, uart_cfg.stop = HAL_UART_STOP_BITS_1,\n  uart_cfg.data = HAL_UART_DATA_BITS_8,\n  uart_cfg.flow = HAL_UART_FLOW_CONTROL_NONE,\n  uart_cfg.tx_level = HAL_UART_FIFO_LEVEL_1_2,\n  uart_cfg.rx_level = HAL_UART_FIFO_LEVEL_1_4, uart_cfg.baud = 115200,\n  uart_cfg.dma_rx = true, uart_cfg.dma_tx = true,\n  uart_cfg.dma_rx_stop_on_err = false;\n\n  app_ble_debug_cnt = 1;\n\n  ret = hal_uart_open(app_ble_uart_id, &uart_cfg);\n  if (ret) {\n    app_ble_debug_cnt = 0xff;\n    //        TRACE(0,\"Failed to open uart\");\n    return 1;\n  }\n\n  app_ble_debug_cnt = 2;\n  hal_uart_irq_set_dma_handler(app_ble_uart_id, uart_rx, uart_tx);\n  //    hal_uart_dma_recv(app_ble_uart_id, app_ble_uart.rx_data,\n  //    sizeof(app_ble_uart.rx_data), NULL, NULL);\n  mask.reg = 0;\n  mask.BE = 1;\n  mask.FE = 1;\n  mask.OE = 1;\n  mask.PE = 1;\n  mask.RT = 1;\n  hal_uart_irq_set_mask(app_ble_uart_id, mask);\n  app_ble_debug_cnt = 3;\n\n  app_ble_uart.rx_done = false;\n  app_ble_uart.tx_done = false;\n#endif\n  gatt_uart_register_write_request_cb(app_ble_uart_write_request_cb);\n  return 0;\n}\n"
  },
  {
    "path": "services/ble_app/app_ble_uart.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BLE_UART_H__\n#define __APP_BLE_UART_H__\n\nuint32_t app_ble_uart_open();\n\n\n#endif\n"
  },
  {
    "path": "services/ble_app/app_datapath/app_ble_cmd_handler.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ble_cmd_handler.h\"\n#include \"app_ble_custom_cmd.h\"\n#include \"apps.h\"\n#include \"bluetooth.h\"\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"rwapp_config.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n\n#ifdef BTIF_BLE_APP_DATAPATH_SERVER\n\n#define BLE_CUSTOM_CMD_WAITING_RSP_TIMEOUT_COUNT 8\n\n#define BLE_RAW_DATA_XFER_BUF_SIZE 80\n/**\n * @brief waiting response timeout supervision data structure\n *\n */\ntypedef struct {\n  uint16_t entryIndex;    /**< The command waiting for the response */\n  uint16_t msTillTimeout; /**< run-time timeout left milliseconds */\n} BLE_CUSTOM_CMD_WAITING_RSP_SUPERVISOR_T;\n\n/**\n * @brief Custom command handling environment\n *\n */\ntypedef struct {\n  uint8_t isInRawDataXferStage; /**< true if the received data is raw data,\n                                                                false if the\n                                   received data is in the format of\n                                   BLE_CUSTOM_CMD_PAYLOAD_T*/\n  uint16_t lengthOfRawDataXferToReceive;\n  uint16_t lengthOfReceivedRawDataXfer;\n  uint8_t *ptrRawXferDstBuf;\n  BLE_RawDataReceived_Handler_t rawDataHandler;\n  BLE_CUSTOM_CMD_WAITING_RSP_SUPERVISOR_T\n  waitingRspTimeoutInstance[BLE_CUSTOM_CMD_WAITING_RSP_TIMEOUT_COUNT];\n  uint32_t lastSysTicks;\n  uint8_t timeoutSupervisorCount;\n  osTimerId supervisor_timer_id;\n  osMutexId mutex;\n\n} BLE_CUSTOM_CMD_ENV_T;\n\nstatic uint8_t rawDataXferBuf[BLE_RAW_DATA_XFER_BUF_SIZE];\nstatic BLE_CUSTOM_CMD_ENV_T ble_custom_cmd_env;\n\nosMutexDef(app_ble_cmd_mutex);\n\nstatic void ble_custom_cmd_rsp_supervision_timer_cb(void const *n);\nosTimerDef(APP_CUSTOM_CMD_RSP_SUPERVISION_TIMER,\n           ble_custom_cmd_rsp_supervision_timer_cb);\n\nstatic void BLE_remove_waiting_rsp_timeout_supervision(uint16_t entryIndex);\n\nextern void app_datapath_server_send_data_via_notification(uint8_t *ptrData,\n                                                           uint32_t length);\nextern void app_datapath_server_send_data_via_indication(uint8_t *ptrData,\n                                                         uint32_t length);\nextern void app_datapath_server_send_data_via_write_command(uint8_t *ptrData,\n                                                            uint32_t length);\nextern void app_datapath_server_send_data_via_write_request(uint8_t *ptrData,\n                                                            uint32_t length);\n\n/**\n * @brief Callback function of the waiting response supervisor timer.\n *\n */\nstatic void ble_custom_cmd_rsp_supervision_timer_cb(void const *n) {\n  uint32_t entryIndex =\n      ble_custom_cmd_env.waitingRspTimeoutInstance[0].entryIndex;\n\n  BLE_remove_waiting_rsp_timeout_supervision(entryIndex);\n\n  // it means time-out happens before the response is received from the peer\n  // device, trigger the response handler\n  CUSTOM_COMMAND_PTR_FROM_ENTRY_INDEX(entryIndex)\n      ->cmdRspHandler(TIMEOUT_WAITING_RESPONSE, NULL, 0);\n}\n\nvoid BLE_get_response_handler(uint32_t funcCode, uint8_t *ptrParam,\n                              uint32_t paramLen) {\n  // parameter length check\n  if (paramLen > sizeof(BLE_CUSTOM_CMD_RSP_T)) {\n    return;\n  }\n\n  if (0 == ble_custom_cmd_env.timeoutSupervisorCount) {\n    return;\n  }\n\n  BLE_CUSTOM_CMD_RSP_T *rsp = (BLE_CUSTOM_CMD_RSP_T *)ptrParam;\n\n  BLE_CUSTOM_CMD_INSTANCE_T *ptCmdInstance =\n      BLE_custom_command_get_entry_pointer_from_cmd_code(rsp->cmdCodeToRsp);\n  if (NULL == ptCmdInstance) {\n    return;\n  }\n\n  // remove the function code from the time-out supervision chain\n  BLE_remove_waiting_rsp_timeout_supervision(rsp->cmdCodeToRsp);\n\n  // call the response handler\n  if (ptCmdInstance->cmdRspHandler) {\n    ptCmdInstance->cmdRspHandler(rsp->cmdRetStatus, rsp->rspData,\n                                 rsp->rspDataLen);\n  }\n}\n\nvoid BLE_control_raw_data_xfer(bool isStartXfer) {\n  ble_custom_cmd_env.isInRawDataXferStage = isStartXfer;\n\n  if (true == isStartXfer) {\n    ble_custom_cmd_env.lengthOfReceivedRawDataXfer = 0;\n    // default configuration, can be customized by BLE_config_raw_data_xfer\n    ble_custom_cmd_env.lengthOfRawDataXferToReceive = sizeof(rawDataXferBuf);\n    ble_custom_cmd_env.ptrRawXferDstBuf = (uint8_t *)&rawDataXferBuf;\n    ble_custom_cmd_env.rawDataHandler = NULL;\n  }\n}\n\nvoid BLE_set_raw_data_xfer_received_callback(\n    BLE_RawDataReceived_Handler_t callback) {\n  ble_custom_cmd_env.rawDataHandler = callback;\n}\n\nvoid BLE_raw_data_xfer_control_handler(uint32_t funcCode, uint8_t *ptrParam,\n                                       uint32_t paramLen) {\n  bool isStartXfer = false;\n\n  if (OP_START_RAW_DATA_XFER == funcCode) {\n    isStartXfer = true;\n  }\n\n  BLE_control_raw_data_xfer(isStartXfer);\n\n  BLE_send_response_to_command(funcCode, NO_ERROR, NULL, 0,\n                               TRANSMISSION_VIA_NOTIFICATION);\n}\n\nvoid BLE_start_raw_data_xfer_control_rsp_handler(\n    BLE_CUSTOM_CMD_RET_STATUS_E retStatus, uint8_t *ptrParam,\n    uint32_t paramLen) {\n  if (NO_ERROR == retStatus) {\n    /**< now the sending data api won't wrap BLE_CUSTOM_CMD_PAYLOAD_T but will\n     * directly send the raw data */\n    ble_custom_cmd_env.isInRawDataXferStage = true;\n  }\n}\n\nvoid BLE_stop_raw_data_xfer_control_rsp_handler(\n    BLE_CUSTOM_CMD_RET_STATUS_E retStatus, uint8_t *ptrParam,\n    uint32_t paramLen) {\n  if (NO_ERROR == retStatus) {\n    ble_custom_cmd_env.isInRawDataXferStage = false;\n  }\n}\n\n/**\n * @brief Refresh the waiting response supervisor list\n *\n */\nstatic void ble_custom_cmd_refresh_supervisor_env(void) {\n  // do nothing if no supervisor was added\n  if (ble_custom_cmd_env.timeoutSupervisorCount > 0) {\n    uint32_t currentTicks = GET_CURRENT_TICKS();\n    uint32_t passedTicks;\n    if (currentTicks >= ble_custom_cmd_env.lastSysTicks) {\n      passedTicks = (currentTicks - ble_custom_cmd_env.lastSysTicks);\n    } else {\n      passedTicks =\n          (hal_sys_timer_get_max() - ble_custom_cmd_env.lastSysTicks + 1) +\n          currentTicks;\n    }\n\n    uint32_t deltaMs = TICKS_TO_MS(passedTicks);\n\n    BLE_CUSTOM_CMD_WAITING_RSP_SUPERVISOR_T *pRspSupervisor =\n        &(ble_custom_cmd_env.waitingRspTimeoutInstance[0]);\n    for (uint32_t index = 0; index < ble_custom_cmd_env.timeoutSupervisorCount;\n         index++) {\n      ASSERT(pRspSupervisor[index].msTillTimeout > deltaMs,\n             \"the waiting command response supervisor timer is missing!!!, \\\n\t\t\t\t%d ms passed but the ms to trigger is %d\",\n             deltaMs, pRspSupervisor[index].msTillTimeout);\n      pRspSupervisor[index].msTillTimeout -= deltaMs;\n    }\n  }\n\n  ble_custom_cmd_env.lastSysTicks = GET_CURRENT_TICKS();\n}\n\n/**\n * @brief Remove the time-out supervision of waiting response\n *\n * @param entryIndex \tEntry index of the command table\n *\n */\nstatic void BLE_remove_waiting_rsp_timeout_supervision(uint16_t entryIndex) {\n  ASSERT(ble_custom_cmd_env.timeoutSupervisorCount > 0,\n         \"%s The BLE custom command time-out supervisor is already empty!!!\",\n         __FUNCTION__);\n\n  osMutexWait(ble_custom_cmd_env.mutex, osWaitForever);\n\n  uint32_t index;\n  for (index = 0; index < ble_custom_cmd_env.timeoutSupervisorCount; index++) {\n    if (ble_custom_cmd_env.waitingRspTimeoutInstance[index].entryIndex ==\n        entryIndex) {\n      memcpy(&(ble_custom_cmd_env.waitingRspTimeoutInstance[index]),\n             &(ble_custom_cmd_env.waitingRspTimeoutInstance[index + 1]),\n             (ble_custom_cmd_env.timeoutSupervisorCount - index - 1) *\n                 sizeof(BLE_CUSTOM_CMD_WAITING_RSP_SUPERVISOR_T));\n      break;\n    }\n  }\n\n  // cannot find it, directly return\n  if (index == ble_custom_cmd_env.timeoutSupervisorCount) {\n    goto exit;\n  }\n\n  ble_custom_cmd_env.timeoutSupervisorCount--;\n\n  if (ble_custom_cmd_env.timeoutSupervisorCount > 0) {\n    // refresh supervisor environment firstly\n    ble_custom_cmd_refresh_supervisor_env();\n\n    // start timer, the first entry is the most close one\n    osTimerStart(ble_custom_cmd_env.supervisor_timer_id,\n                 ble_custom_cmd_env.waitingRspTimeoutInstance[0].msTillTimeout);\n  } else {\n    // no supervisor, directly stop the timer\n    osTimerStop(ble_custom_cmd_env.supervisor_timer_id);\n  }\n\nexit:\n  osMutexRelease(ble_custom_cmd_env.mutex);\n}\n\n/**\n * @brief Add the time-out supervision of waiting response\n *\n * @param entryIndex \tIndex of the command entry\n *\n */\nstatic void BLE_add_waiting_rsp_timeout_supervision(uint16_t entryIndex) {\n  ASSERT(ble_custom_cmd_env.timeoutSupervisorCount <\n             BLE_CUSTOM_CMD_WAITING_RSP_TIMEOUT_COUNT,\n         \"%s The BLE custom command time-out supervisor is full!!!\",\n         __FUNCTION__);\n\n  osMutexWait(ble_custom_cmd_env.mutex, osWaitForever);\n\n  // refresh supervisor environment firstly\n  ble_custom_cmd_refresh_supervisor_env();\n\n  BLE_CUSTOM_CMD_INSTANCE_T *pInstance =\n      CUSTOM_COMMAND_PTR_FROM_ENTRY_INDEX(entryIndex);\n\n  BLE_CUSTOM_CMD_WAITING_RSP_SUPERVISOR_T\n  waitingRspTimeoutInstance[BLE_CUSTOM_CMD_WAITING_RSP_TIMEOUT_COUNT];\n\n  uint32_t index = 0, insertedIndex = 0;\n  for (index = 0; index < ble_custom_cmd_env.timeoutSupervisorCount; index++) {\n    uint32_t msTillTimeout =\n        ble_custom_cmd_env.waitingRspTimeoutInstance[index].msTillTimeout;\n\n    // in the order of low to high\n    if ((ble_custom_cmd_env.waitingRspTimeoutInstance[index].entryIndex !=\n         entryIndex) &&\n        (pInstance->timeoutWaitingRspInMs >= msTillTimeout)) {\n      waitingRspTimeoutInstance[insertedIndex++] =\n          ble_custom_cmd_env.waitingRspTimeoutInstance[index];\n    } else if (pInstance->timeoutWaitingRspInMs < msTillTimeout) {\n      waitingRspTimeoutInstance[insertedIndex].entryIndex = entryIndex;\n      waitingRspTimeoutInstance[insertedIndex].msTillTimeout =\n          pInstance->timeoutWaitingRspInMs;\n\n      insertedIndex++;\n    }\n  }\n\n  // biggest one? then put it at the end of the list\n  if (ble_custom_cmd_env.timeoutSupervisorCount == index) {\n    waitingRspTimeoutInstance[insertedIndex].entryIndex = entryIndex;\n    waitingRspTimeoutInstance[insertedIndex].msTillTimeout =\n        pInstance->timeoutWaitingRspInMs;\n\n    insertedIndex++;\n  }\n\n  // copy to the global variable\n  memcpy((uint8_t *)&(ble_custom_cmd_env.waitingRspTimeoutInstance),\n         (uint8_t *)&waitingRspTimeoutInstance,\n         insertedIndex * sizeof(BLE_CUSTOM_CMD_WAITING_RSP_SUPERVISOR_T));\n\n  ble_custom_cmd_env.timeoutSupervisorCount = insertedIndex;\n\n  // start timer, the first entry is the most close one\n  osTimerStart(ble_custom_cmd_env.supervisor_timer_id,\n               ble_custom_cmd_env.waitingRspTimeoutInstance[0].msTillTimeout);\n\n  osMutexRelease(ble_custom_cmd_env.mutex);\n}\n\n/**\n * @brief Return the pointer of the received raw data\n *\n * @return uint8_t*\tPointer of the raw data buffer\n */\nuint8_t *BLE_custom_command_raw_data_buffer_pointer(void) {\n  return ble_custom_cmd_env.ptrRawXferDstBuf;\n}\n\n/**\n * @brief Return the size of the received raw data\n *\n * @return uint16_t\tPointer of the raw data buffer\n */\nuint16_t BLE_custom_command_received_raw_data_size(void) {\n  return ble_custom_cmd_env.lengthOfReceivedRawDataXfer;\n}\n\n/**\n * @brief Receive the data from the peer device and parse them\n *\n * @param ptrData \t\tPointer of the received data\n * @param dataLength\tLength of the received data\n *\n * @return BLE_CUSTOM_CMD_RET_STATUS_E\n */\nBLE_CUSTOM_CMD_RET_STATUS_E\nBLE_custom_command_receive_data(uint8_t *ptrData, uint32_t dataLength) {\n  TRACE(1, \"Receive length %d data: \", dataLength);\n  DUMP8(\"0x%02x \", ptrData, dataLength);\n  BLE_CUSTOM_CMD_PAYLOAD_T *pPayload = (BLE_CUSTOM_CMD_PAYLOAD_T *)ptrData;\n\n  if ((OP_START_RAW_DATA_XFER == pPayload->cmdCode) ||\n      (OP_STOP_RAW_DATA_XFER == pPayload->cmdCode) ||\n      (!(ble_custom_cmd_env.isInRawDataXferStage))) {\n    // check command code\n    if (pPayload->cmdCode >= OP_COMMAND_COUNT) {\n      return INVALID_CMD_CODE;\n    }\n\n    // check parameter length\n    if (pPayload->paramLen > sizeof(pPayload->param)) {\n      return PARAMETER_LENGTH_OUT_OF_RANGE;\n    }\n\n    BLE_CUSTOM_CMD_INSTANCE_T *pInstance =\n        BLE_custom_command_get_entry_pointer_from_cmd_code(pPayload->cmdCode);\n\n    // execute the command handler\n    if (!pInstance)\n      pInstance->cmdHandler(pPayload->cmdCode, pPayload->param,\n                            pPayload->paramLen);\n  } else {\n    // the payload of the raw data xfer is 2 bytes cmd code + raw data\n    if (dataLength < sizeof(pPayload->cmdCode)) {\n      return PARAMETER_LENGTH_TOO_SHORT;\n    }\n\n    dataLength -= sizeof(pPayload->cmdCode);\n    ptrData += sizeof(pPayload->cmdCode);\n\n    if (NULL == ble_custom_cmd_env.rawDataHandler) {\n      // default handler\n\n      // save the received raw data into raw data buffer\n      uint32_t bytesToSave;\n      if ((dataLength + ble_custom_cmd_env.lengthOfReceivedRawDataXfer) >\n          ble_custom_cmd_env.lengthOfRawDataXferToReceive) {\n        bytesToSave = ble_custom_cmd_env.lengthOfRawDataXferToReceive -\n                      ble_custom_cmd_env.lengthOfReceivedRawDataXfer;\n      } else {\n        bytesToSave = dataLength;\n      }\n      memcpy(\n          (uint8_t *)&ble_custom_cmd_env\n              .ptrRawXferDstBuf[ble_custom_cmd_env.lengthOfReceivedRawDataXfer],\n          ptrData, bytesToSave);\n\n      ble_custom_cmd_env.lengthOfReceivedRawDataXfer += bytesToSave;\n    } else {\n      // custom handler that is set by BLE_set_raw_data_xfer_received_callback\n      ble_custom_cmd_env.rawDataHandler(ptrData, dataLength);\n    }\n  }\n\n  return NO_ERROR;\n}\n\nstatic void BLE_send_out_data(BLE_CUSTOM_CMD_TRANSMISSION_PATH_E path,\n                              BLE_CUSTOM_CMD_PAYLOAD_T *ptPayLoad) {\n  switch (path) {\n  case TRANSMISSION_VIA_NOTIFICATION:\n    app_datapath_server_send_data_via_notification(\n        (uint8_t *)ptPayLoad,\n        (uint32_t)(&(((BLE_CUSTOM_CMD_PAYLOAD_T *)0)->param)) +\n            ptPayLoad->paramLen);\n    break;\n  case TRANSMISSION_VIA_INDICATION:\n    app_datapath_server_send_data_via_indication(\n        (uint8_t *)ptPayLoad,\n        (uint32_t)(&(((BLE_CUSTOM_CMD_PAYLOAD_T *)0)->param)) +\n            ptPayLoad->paramLen);\n    break;\n  case TRANSMISSION_VIA_WRITE_CMD:\n    app_datapath_server_send_data_via_write_command(\n        (uint8_t *)ptPayLoad,\n        (uint32_t)(&(((BLE_CUSTOM_CMD_PAYLOAD_T *)0)->param)) +\n            ptPayLoad->paramLen);\n    break;\n  case TRANSMISSION_VIA_WRITE_REQ:\n    app_datapath_server_send_data_via_write_request(\n        (uint8_t *)ptPayLoad,\n        (uint32_t)(&(((BLE_CUSTOM_CMD_PAYLOAD_T *)0)->param)) +\n            ptPayLoad->paramLen);\n    break;\n  default:\n    break;\n  }\n}\n\n/**\n * @brief Send response to the command request\n *\n * @param responsedCmdCode \tCommand code of the responsed command request\n * @param returnStatus\t\tHandling result\n * @param rspData \t\t\tPointer of the response data\n * @param rspDataLen\t\tLength of the response data\n * @param path\t\t\t\tPath of the data transmission\n *\n * @return BLE_CUSTOM_CMD_RET_STATUS_E\n */\nBLE_CUSTOM_CMD_RET_STATUS_E\nBLE_send_response_to_command(uint32_t responsedCmdCode,\n                             BLE_CUSTOM_CMD_RET_STATUS_E returnStatus,\n                             uint8_t *rspData, uint32_t rspDataLen,\n                             BLE_CUSTOM_CMD_TRANSMISSION_PATH_E path) {\n  // check responsedCmdCode's validity\n  if (responsedCmdCode >= OP_COMMAND_COUNT) {\n    return INVALID_CMD_CODE;\n  }\n\n  BLE_CUSTOM_CMD_PAYLOAD_T payload;\n\n  BLE_CUSTOM_CMD_RSP_T *pResponse = (BLE_CUSTOM_CMD_RSP_T *)&(payload.param);\n\n  // check parameter length\n  if (rspDataLen > sizeof(pResponse->rspData)) {\n    return PARAMETER_LENGTH_OUT_OF_RANGE;\n  }\n\n  pResponse->cmdCodeToRsp = responsedCmdCode;\n  pResponse->cmdRetStatus = returnStatus;\n  pResponse->rspDataLen = rspDataLen;\n  memcpy(pResponse->rspData, rspData, rspDataLen);\n\n  payload.paramLen = 3 * sizeof(uint16_t) + rspDataLen;\n\n  payload.cmdCode = OP_RESPONSE_TO_CMD;\n\n  BLE_send_out_data(path, &payload);\n\n  return NO_ERROR;\n}\n\n/**\n * @brief Send the custom command to the peer device\n *\n * @param cmdCode \tCommand code\n * @param ptrParam \tPointer of the output parameter\n * @param paramLen\tLength of the output parameter\n * @param path\t\tPath of the data transmission\n *\n * @return BLE_CUSTOM_CMD_RET_STATUS_E\n */\nBLE_CUSTOM_CMD_RET_STATUS_E\nBLE_send_custom_command(uint32_t cmdCode, uint8_t *ptrParam, uint32_t paramLen,\n                        BLE_CUSTOM_CMD_TRANSMISSION_PATH_E path) {\n  // check cmdCode's validity\n  if (cmdCode >= OP_COMMAND_COUNT) {\n    return INVALID_CMD_CODE;\n  }\n\n  BLE_CUSTOM_CMD_PAYLOAD_T payload;\n\n  // check parameter length\n  if (paramLen > sizeof(payload.param)) {\n    return PARAMETER_LENGTH_OUT_OF_RANGE;\n  }\n\n  uint16_t entryIndex =\n      BLE_custom_command_get_entry_index_from_cmd_code(cmdCode);\n  BLE_CUSTOM_CMD_INSTANCE_T *pInstance =\n      CUSTOM_COMMAND_PTR_FROM_ENTRY_INDEX(entryIndex);\n\n  // wrap the command payload\n  payload.cmdCode = cmdCode;\n  payload.paramLen = paramLen;\n  memcpy(payload.param, ptrParam, paramLen);\n\n  // send out the data\n  BLE_send_out_data(path, &payload);\n\n  // insert into time-out supervison\n  if (pInstance->isNeedResponse) {\n    BLE_add_waiting_rsp_timeout_supervision(cmdCode);\n  }\n\n  return NO_ERROR;\n}\n\nBLE_CUSTOM_CMD_INSTANCE_T *\nBLE_custom_command_get_entry_pointer_from_cmd_code(uint16_t cmdCode) {\n  for (uint32_t index = 0; index < ((uint32_t)__custom_handler_table_end -\n                                    (uint32_t)__custom_handler_table_start) /\n                                       sizeof(BLE_CUSTOM_CMD_INSTANCE_T);\n       index++) {\n    if (CUSTOM_COMMAND_PTR_FROM_ENTRY_INDEX(index)->cmdCode == cmdCode) {\n      return CUSTOM_COMMAND_PTR_FROM_ENTRY_INDEX(index);\n    }\n  }\n\n  return NULL;\n}\n\nuint16_t BLE_custom_command_get_entry_index_from_cmd_code(uint16_t cmdCode) {\n  for (uint32_t index = 0;\n       index < (__custom_handler_table_end - __custom_handler_table_start) /\n                   sizeof(BLE_CUSTOM_CMD_INSTANCE_T);\n       index++) {\n    if (CUSTOM_COMMAND_PTR_FROM_ENTRY_INDEX(index)->cmdCode == cmdCode) {\n      return index;\n    }\n  }\n\n  return INVALID_CUSTOM_ENTRY_INDEX;\n}\n\n/**\n * @brief Initialize the BLE custom command framework\n *\n */\nvoid BLE_custom_command_init(void) {\n  memset((uint8_t *)&ble_custom_cmd_env, 0, sizeof(ble_custom_cmd_env));\n\n  ble_custom_cmd_env.supervisor_timer_id = osTimerCreate(\n      osTimer(APP_CUSTOM_CMD_RSP_SUPERVISION_TIMER), osTimerOnce, NULL);\n\n  ble_custom_cmd_env.mutex = osMutexCreate((osMutex(app_ble_cmd_mutex)));\n}\n#endif\n"
  },
  {
    "path": "services/ble_app/app_datapath/app_ble_cmd_handler.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BLE_CMD_HANDLER_H__\n#define __APP_BLE_CMD_HANDLER_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_timer.h\"\n\n#define GET_CURRENT_TICKS()\t\t\thal_sys_timer_get()\n\n#define GET_CURRENT_MS()\t\t\tTICKS_TO_MS(GET_CURRENT_TICKS())\n\nextern uint32_t __custom_handler_table_start[];\nextern uint32_t __custom_handler_table_end[];\n\n#define CUSTOM_COMMAND_TO_ADD(cmdCode, cmdHandler, isNeedResponse, timeoutWaitingRspInMs, cmdRspHandler)\t\\\n\tstatic const BLE_CUSTOM_CMD_INSTANCE_T cmdCode##_entry __attribute__((used, section(\".custom_handler_table\"))) = \t\\\n\t\t{(cmdCode), (cmdHandler), (isNeedResponse), (timeoutWaitingRspInMs), (cmdRspHandler)};\n\n#define CUSTOM_COMMAND_PTR_FROM_ENTRY_INDEX(index)\t\\\n\t((BLE_CUSTOM_CMD_INSTANCE_T *)((uint32_t)__custom_handler_table_start + (index)*sizeof(BLE_CUSTOM_CMD_INSTANCE_T)))\n\n#define INVALID_CUSTOM_ENTRY_INDEX\t\t0xFFFF\n\n/**\n * @brief The BLE custom command handling return status\n *\n */\ntypedef enum\n{\n\tNO_ERROR = 0,\n\tINVALID_CMD_CODE,\n\tPARAMETER_LENGTH_OUT_OF_RANGE,\n\tPARAMETER_LENGTH_TOO_SHORT,\n\tHANDLING_FAILED,\t\n\tTIMEOUT_WAITING_RESPONSE,\n\t// TO ADD: new return status\n} BLE_CUSTOM_CMD_RET_STATUS_E;\n\n/**\n * @brief Type of the BLE data transmission path\n *\n */\ntypedef enum\n{\n\tTRANSMISSION_VIA_NOTIFICATION = 0,\n\tTRANSMISSION_VIA_INDICATION,\n\tTRANSMISSION_VIA_WRITE_CMD,\n\tTRANSMISSION_VIA_WRITE_REQ,\n} BLE_CUSTOM_CMD_TRANSMISSION_PATH_E;\n\n/**\n * @brief Format of the custom command handler function, called when the command is received\n *\n * @param cmdCode\tCustom command code, from BLE_CUSTOM_CMD_CODE_E\n * @param ptrParam \tPointer of the received parameter\n * @param paramLen \tLength of the recevied parameter\n * \n */\ntypedef void (*BLE_CustomCmdHandler_t)(uint32_t cmdCode, uint8_t* ptrParam, uint32_t paramLen);\n\n/**\n * @brief Format of the custom command response handler function, \n *\tcalled when the response to formerly sent command is received\n *\n * @param retStatus\tHandling return status of the command\n * @param ptrParam \tPointer of the received parameter\n * @param paramLen \tLength of the recevied parameter\n * \n */\ntypedef void (*BLE_CustomCmd_Response_Handler_t)(BLE_CUSTOM_CMD_RET_STATUS_E retStatus, uint8_t* ptrParam, uint32_t paramLen);\n\n/**\n * @brief Format of the raw data xfer received handler function\n *\n * @param ptrData\tPointer of the received raw data\n * @param dataLen \tLength of the received raw data\n * \n */\ntypedef void (*BLE_RawDataReceived_Handler_t)(uint8_t* ptrData, uint32_t dataLen);\n\n\n/**\n * @brief Custom command definition data structure\n *\n */\ntypedef struct\n{\n\tuint16_t\t\t\t\tcmdCode;\n    BLE_CustomCmdHandler_t \tcmdHandler;  \t\t\t/**< command handler function */\n    uint8_t \t\t\t\tisNeedResponse;     \t/**< true if needs the response from the peer device */\n\tuint16_t\t\t\t\ttimeoutWaitingRspInMs;\t/**< time-out of waiting for response in milli-seconds */\n\tBLE_CustomCmd_Response_Handler_t\tcmdRspHandler;\t/**< command response handler function */\n} BLE_CUSTOM_CMD_INSTANCE_T;\n\n/**< maximum payload size of one BLE custom command */\n#define BLE_CUSTOM_CMD_MAXIMUM_PAYLOAD_SIZE\t\t20\t// assure that one BLE packet can include all the data \n\n/**\n * @brief BLE custom command playload\n *\n */\ntypedef struct\n{\n    uint16_t \tcmdCode;    \t/**< command code, from BLE_CUSTOM_CMD_CODE_E */\n\tuint16_t \tparamLen;\t\t/**< length of the following parameter */\n    uint8_t \tparam[BLE_CUSTOM_CMD_MAXIMUM_PAYLOAD_SIZE - 2*sizeof(uint16_t)];\n} BLE_CUSTOM_CMD_PAYLOAD_T;\n\n/**\n * @brief Command response parameter structure\n *\n */\ntypedef struct\n{\n    uint16_t \tcmdCodeToRsp;  \t/**< tell which command code to response */\n    uint16_t \tcmdRetStatus;   /**< handling result of the command, from BLE_CUSTOM_CMD_RET_STATUS_E */\n\tuint16_t \trspDataLen;\t\t/**< length of the response data */\n    uint8_t \trspData[BLE_CUSTOM_CMD_MAXIMUM_PAYLOAD_SIZE - 5*sizeof(uint16_t)];\n} BLE_CUSTOM_CMD_RSP_T;\n\nvoid \t\t\t\t\t\tBLE_get_response_handler(uint32_t funcCode, uint8_t* ptrParam, uint32_t paramLen);\nvoid \t\t\t\t\t\tBLE_raw_data_xfer_control_handler(uint32_t funcCode, uint8_t* ptrParam, uint32_t paramLen);\nvoid \t\t\t\t\t\tBLE_control_raw_data_xfer(bool isStartXfer);\nvoid \t\t\t\t\t\tBLE_set_raw_data_xfer_received_callback(BLE_RawDataReceived_Handler_t callback);\nvoid \t\t\t\t\t\tBLE_start_raw_data_xfer_control_rsp_handler(BLE_CUSTOM_CMD_RET_STATUS_E retStatus, uint8_t* ptrParam, uint32_t paramLen);\nvoid \t\t\t\t\t\tBLE_stop_raw_data_xfer_control_rsp_handler(BLE_CUSTOM_CMD_RET_STATUS_E retStatus, uint8_t* ptrParam, uint32_t paramLen);\nuint8_t* \t\t\t\t\tBLE_custom_command_raw_data_buffer_pointer(void);\nuint16_t \t\t\t\t\tBLE_custom_command_received_raw_data_size(void);\nBLE_CUSTOM_CMD_RET_STATUS_E BLE_send_response_to_command(uint32_t responsedCmdCode, BLE_CUSTOM_CMD_RET_STATUS_E returnStatus, \n\t\t\t\t\t\t\t\tuint8_t* rspData, uint32_t rspDataLen, BLE_CUSTOM_CMD_TRANSMISSION_PATH_E path);\nBLE_CUSTOM_CMD_RET_STATUS_E BLE_send_custom_command(uint32_t cmdCode, uint8_t* ptrParam, uint32_t paramLen, BLE_CUSTOM_CMD_TRANSMISSION_PATH_E path);\nBLE_CUSTOM_CMD_RET_STATUS_E BLE_custom_command_receive_data(uint8_t* ptrData, uint32_t dataLength);\nvoid \t\t\t\t\t\tBLE_custom_command_init(void);\nBLE_CUSTOM_CMD_INSTANCE_T* \tBLE_custom_command_get_entry_pointer_from_cmd_code(uint16_t cmdCode);\nuint16_t \t\t\t\t\tBLE_custom_command_get_entry_index_from_cmd_code(uint16_t cmdCode);\n\n\n\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif // #ifndef __APP_BLE_CMD_HANDLER_H__\n\n"
  },
  {
    "path": "services/ble_app/app_datapath/app_ble_custom_cmd.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"apps.h\"\n#include \"cmsis_os.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"rwapp_config.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n\n#include \"app_ble_cmd_handler.h\"\n#include \"app_ble_custom_cmd.h\"\n#include \"retention_ram.h\"\n\n#if (BTIF_BLE_APP_DATAPATH_SERVER)\n\nextern void app_datapath_server_send_data_via_notification(uint8_t *ptrData,\n                                                           uint32_t length);\n\nvoid BLE_dummy_handler(uint32_t funcCode, uint8_t *ptrParam,\n                       uint32_t paramLen) {}\n\nvoid BLE_test_no_response_print_handler(uint32_t funcCode, uint8_t *ptrParam,\n                                        uint32_t paramLen) {\n  TRACE(1, \"%s Get OP_TEST_NO_RESPONSE_PRINT command!!!\", __FUNCTION__);\n}\n\nvoid BLE_test_with_response_print_handler(uint32_t funcCode, uint8_t *ptrParam,\n                                          uint32_t paramLen) {\n  TRACE(1, \"%s Get OP_TEST_WITH_RESPONSE_PRINT command!!!\", __FUNCTION__);\n\n  uint32_t currentTicks = GET_CURRENT_TICKS();\n  BLE_send_response_to_command(funcCode, NO_ERROR, (uint8_t *)¤tTicks,\n                               sizeof(currentTicks),\n                               TRANSMISSION_VIA_NOTIFICATION);\n}\n\nvoid BLE_test_with_response_print_rsp_handler(\n    BLE_CUSTOM_CMD_RET_STATUS_E retStatus, uint8_t *ptrParam,\n    uint32_t paramLen) {\n  if (NO_ERROR == retStatus) {\n    TRACE(1, \"%s Get the response of OP_TEST_WITH_RESPONSE_PRINT command!!!\",\n          __FUNCTION__);\n  } else if (TIMEOUT_WAITING_RESPONSE == retStatus) {\n    TRACE(1,\n          \"%s Timeout happens, doesn't get the response of \"\n          \"OP_TEST_WITH_RESPONSE_PRINT command!!!\",\n          __FUNCTION__);\n  }\n}\n\nstatic void app_otaMode_enter(void) {\n  TRACE(1, \"%s\", __func__);\n  hal_norflash_disable_protection(HAL_NORFLASH_ID_0);\n  hal_sw_bootmode_set(HAL_SW_BOOTMODE_ENTER_HIDE_BOOT);\n  /*hal_cmu_reset_set(HAL_CMU_MOD_P_GLOBAL);*/\n}\n\nvoid BLE_enter_OTA_mode_handler(uint32_t funcCode, uint8_t *ptrParam,\n                                uint32_t paramLen) {\n  fillBleBdAddrForOta(ptrParam);\n  app_otaMode_enter();\n}\n\n#ifdef __SW_IIR_EQ_PROCESS__\nint audio_config_eq_iir_via_config_structure(uint8_t *buf, uint32_t len);\nvoid BLE_iir_eq_handler(uint32_t funcCode, uint8_t *ptrParam,\n                        uint32_t paramLen) {\n\n  audio_config_eq_iir_via_config_structure(\n      BLE_custom_command_raw_data_buffer_pointer(),\n      BLE_custom_command_received_raw_data_size());\n}\n\n#endif\n\nextern uint8_t bt_addr[6];\nvoid BLE_get_bt_address_handler(uint32_t funcCode, uint8_t *ptrParam,\n                                uint32_t paramLen) {\n  app_datapath_server_send_data_via_notification((uint8_t *)&bt_addr,\n                                                 sizeof(bt_addr));\n}\n\nCUSTOM_COMMAND_TO_ADD(OP_RESPONSE_TO_CMD, BLE_get_response_handler, false, 0,\n                      NULL);\nCUSTOM_COMMAND_TO_ADD(OP_START_RAW_DATA_XFER, BLE_raw_data_xfer_control_handler,\n                      true, 2000, BLE_start_raw_data_xfer_control_rsp_handler);\nCUSTOM_COMMAND_TO_ADD(OP_STOP_RAW_DATA_XFER, BLE_raw_data_xfer_control_handler,\n                      true, 2000, BLE_stop_raw_data_xfer_control_rsp_handler);\nCUSTOM_COMMAND_TO_ADD(OP_TEST_NO_RESPONSE_PRINT,\n                      BLE_test_no_response_print_handler, false, 0, NULL);\nCUSTOM_COMMAND_TO_ADD(OP_TEST_WITH_RESPONSE_PRINT,\n                      BLE_test_with_response_print_handler, true, 5000,\n                      BLE_test_with_response_print_rsp_handler);\nCUSTOM_COMMAND_TO_ADD(OP_ENTER_OTA_MODE, BLE_enter_OTA_mode_handler, false, 0,\n                      NULL);\n#ifdef __SW_IIR_EQ_PROCESS__\nCUSTOM_COMMAND_TO_ADD(OP_SW_IIR_EQ, BLE_iir_eq_handler, false, 0, NULL);\n#endif\nCUSTOM_COMMAND_TO_ADD(OP_GET_BT_ADDRESS, BLE_get_bt_address_handler, false, 0,\n                      NULL);\n\n#if 0\n/** \\brief  Instances list of BLE custom command handler, should be in the order of the\n *\t\t\tcommand code definition in BLE_CUSTOM_CMD_CODE_E\n */\nBLE_CUSTOM_CMD_INSTANCE_T     customCommandArray[] =\n{\n\t// { command handler,  wait for response or not,  time out of waiting response in ms,  callback when the response is received }\n\t// non-touchable instances\n\t{ BLE_get_response_handler,  \t\t\tfalse,  0,  \tNULL \t\t\t\t\t\t\t\t\t\t},\n\t{ BLE_raw_data_xfer_control_handler,  \ttrue,  \t2000,  \tBLE_start_raw_data_xfer_control_rsp_handler },\n\t{ BLE_raw_data_xfer_control_handler,  \ttrue,  \t2000,  \tBLE_stop_raw_data_xfer_control_rsp_handler \t},\n\n\t// TO ADD: the new custom command instance\n\t{ BLE_test_no_response_print_handler, \tfalse,\t0,\t\tNULL \t\t\t\t\t\t\t\t\t\t},\n\t{ BLE_test_with_response_print_handler,\ttrue,\t5000, \tBLE_test_with_response_print_rsp_handler \t},\n\n\t{ BLE_enter_OTA_mode_handler,\t\t\tfalse,\t0, \t\tNULL \t},\n\n#ifdef __SW_IIR_EQ_PROCESS__\n\t{ BLE_iir_eq_handler,\t\t\t\t\tfalse,\t0, \t\tNULL\t},\n#else\n\t{ BLE_dummy_handler,\t\t\t\t\tfalse,\t0, \t\tNULL\t},\n#endif\n\n\t{ BLE_get_bt_address_handler,\t\t\tfalse,\t0,\t\tNULL\t},\n};\n#endif\n#endif\n"
  },
  {
    "path": "services/ble_app/app_datapath/app_ble_custom_cmd.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BLE_CUSTOM_CMD_H__\n#define __APP_BLE_CUSTOM_CMD_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\t\n/**\n * @brief The custom command code\n *\n */\ntypedef enum\n{\n\t/* 0 */ OP_RESPONSE_TO_CMD = 0,\t/**< the payload is: OP_RESPONSE_TO_CMD + paramLen + BLE_CUSTOM_CMD_RSP_T */\n\t/* 1 */ OP_START_RAW_DATA_XFER,\t/**< raw data means no BLE_CUSTOM_CMD_PAYLOAD_T.cmdCode but just the data\n\t\t\t\t\t\t\t\tstarting raw data xfer is done via:\n\t\t\t\t\t\t\t\t\t1. send OP_START_RAW_DATA_XFER to target peer device \n\t\t\t\t\t\t\t\t\t2. get OP_RESPONSE_TO_CMD from the target device\n\t\t\t\t\t\t\t\t\t3. send raw data\n\t\t\t\t\t\t\t*/\n\t/* 2 */ OP_STOP_RAW_DATA_XFER,\t/**< raw data means no BLE_CUSTOM_CMD_PAYLOAD_T.cmdCode but just the data\n\t\t\t\t\t\t\t\tstopping raw data xfer is done via:\n\t\t\t\t\t\t\t\t\t1. send OP_STOP_RAW_DATA_XFER to target peer device \n\t\t\t\t\t\t\t\t\t2. get OP_RESPONSE_TO_CMD from the target device\n\t\t\t\t\t\t\t\t\t3. stop sending raw data\n\t\t\t\t\t\t\t*/\n\t/* 3 */ OP_TEST_NO_RESPONSE_PRINT,\n\n\t/* 4 */ OP_TEST_WITH_RESPONSE_PRINT,\n\n\t/* 5 */ OP_ENTER_OTA_MODE,\n\t// TO ADD: new custom command code\n\n\t/* 6 */ OP_SW_IIR_EQ,\t\t\n\n\t/* 7 */ OP_GET_BT_ADDRESS,\n\n\t/* 8 */ OP_COMMAND_COUNT,\n\t\t\n} BLE_CUSTOM_CMD_CODE_E;\n\n\n#ifdef __cplusplus\n\t}\n#endif\n\n\n#endif // #ifndef __APP_BLE_CUSTOM_CMD_H__\n\n"
  },
  {
    "path": "services/ble_app/app_datapath/app_datapath_server.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n#include \"app_ble_cmd_handler.h\"\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_DATAPATH_SERVER)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"app.h\"                 // Application Definitions\n#include \"app_datapath_server.h\" // Data Path Application Definitions\n#include \"app_task.h\"            // application task definitions\n#include \"arch.h\"                // Platform Definitions\n#include \"co_bt.h\"\n#include \"datapathps_task.h\"\n#include \"prf.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"string.h\"\n#ifdef IBRT\n#include \"app_ibrt_ui.h\"\n#endif\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// health thermometer application environment structure\nstruct app_datapath_server_env_tag app_datapath_server_env = {\n    BLE_INVALID_CONNECTION_INDEX, false};\n\nstatic app_datapath_server_tx_done_t tx_done_callback = NULL;\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\nvoid app_datapath_server_mtu_exchanged_handler(uint8_t conidx, uint16_t mtu) {}\n\nvoid app_datapath_server_connected_evt_handler(uint8_t conidx) {\n  TRACE(0, \"app datapath server connected.\");\n  app_datapath_server_env.connectionIndex = conidx;\n#ifdef IBRT\n  if (app_ibrt_ui_get_snoop_via_ble_enable()) {\n    app_ibrt_ui_set_master_notify_flag(TRUE);\n  }\n#endif\n}\n\nvoid app_datapath_server_disconnected_evt_handler(uint8_t conidx) {\n  if (conidx == app_datapath_server_env.connectionIndex) {\n    TRACE(0, \"app datapath server dis-connected.\");\n    app_datapath_server_env.connectionIndex = BLE_INVALID_CONNECTION_INDEX;\n    app_datapath_server_env.isNotificationEnabled = false;\n\n    tx_done_callback = NULL;\n  }\n}\n\nvoid app_datapath_server_init(void) {\n  // Reset the environment\n  app_datapath_server_env.connectionIndex = BLE_INVALID_CONNECTION_INDEX;\n  app_datapath_server_env.isNotificationEnabled = false;\n}\n\nvoid app_datapath_add_datapathps(void) {\n  BLE_APP_DBG(\"app_datapath_add_datapathps\");\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, 0);\n\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n  req->prf_task_id = TASK_ID_DATAPATHPS;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nvoid app_datapath_server_send_data_via_notification(uint8_t *ptrData,\n                                                    uint32_t length) {\n  struct ble_datapath_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(DATAPATHPS_SEND_DATA_VIA_NOTIFICATION,\n                       prf_get_task_from_id(TASK_ID_DATAPATHPS), TASK_APP,\n                       ble_datapath_send_data_req_t, length);\n  req->connecionIndex = app_datapath_server_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n}\n\nvoid app_datapath_server_send_data_via_indication(uint8_t *ptrData,\n                                                  uint32_t length) {\n  struct ble_datapath_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(DATAPATHPS_SEND_DATA_VIA_INDICATION,\n                       prf_get_task_from_id(TASK_ID_DATAPATHPS), TASK_APP,\n                       ble_datapath_send_data_req_t, length);\n  req->connecionIndex = app_datapath_server_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n}\n\nvoid app_datapath_server_send_data_via_write_command(uint8_t *ptrData,\n                                                     uint32_t length) {\n  struct ble_datapath_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(DATAPATHPS_SEND_DATA_VIA_WRITE_COMMAND,\n                       prf_get_task_from_id(TASK_ID_DATAPATHPS), TASK_APP,\n                       ble_datapath_send_data_req_t, length);\n  req->connecionIndex = app_datapath_server_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n  ke_msg_send(req);\n}\n\nvoid app_datapath_server_send_data_via_write_request(uint8_t *ptrData,\n                                                     uint32_t length) {\n  struct ble_datapath_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(DATAPATHPS_SEND_DATA_VIA_WRITE_REQUEST,\n                       prf_get_task_from_id(TASK_ID_DATAPATHPS), TASK_APP,\n                       ble_datapath_send_data_req_t, length);\n  req->connecionIndex = app_datapath_server_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n  ke_msg_send(req);\n}\n\nvoid app_datapath_server_control_notification(uint8_t conidx, bool isEnable) {\n  struct ble_datapath_control_notification_t *req = KE_MSG_ALLOC(\n      DATAPATHPS_CONTROL_NOTIFICATION, prf_get_task_from_id(TASK_ID_DATAPATHPS),\n      TASK_APP, ble_datapath_control_notification_t);\n  req->isEnable = isEnable;\n  req->connecionIndex = conidx;\n  ke_msg_send(req);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles health thermometer timer\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int app_datapath_server_msg_handler(ke_msg_id_t const msgid,\n                                           void const *param,\n                                           ke_task_id_t const dest_id,\n                                           ke_task_id_t const src_id) {\n  // Do nothing\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_datapath_server_tx_ccc_changed_handler(\n    ke_msg_id_t const msgid, struct ble_datapath_tx_notif_config_t *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  app_datapath_server_env.isNotificationEnabled = param->isNotificationEnabled;\n\n  if (app_datapath_server_env.isNotificationEnabled) {\n    // the app datapath server is connected when receiving the first enable CCC\n    // request\n    if (BLE_INVALID_CONNECTION_INDEX ==\n        app_datapath_server_env.connectionIndex) {\n      uint8_t conidx = KE_IDX_GET(src_id);\n      app_datapath_server_connected_evt_handler(conidx);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_datapath_server_tx_data_sent_handler(\n    ke_msg_id_t const msgid, struct ble_datapath_tx_sent_ind_t *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  if (NULL != tx_done_callback) {\n    tx_done_callback();\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nextern void appm_restart_advertising(void);\nstatic int app_datapath_server_rx_data_received_handler(\n    ke_msg_id_t const msgid, struct ble_datapath_rx_data_ind_t *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  // loop back the received data\n  // app_datapath_server_send_data(param->data, param->length);\n\n  TRACE(2, \"%s length %d\", __func__, param->length);\n  // DUMP8(\"%02x \", (param->data+i), len);\n\n#ifndef __INTERCONNECTION__\n  BLE_custom_command_receive_data(param->data, param->length);\n#endif\n\n#ifdef IBRT\n  if (app_ibrt_ui_get_snoop_via_ble_enable()) {\n    app_ibrt_ui_snoop_info_handler(param->data, param->length);\n  }\n#endif\n  return (KE_MSG_CONSUMED);\n}\n\nvoid app_datapath_server_register_tx_done(\n    app_datapath_server_tx_done_t callback) {\n  tx_done_callback = callback;\n}\n\n/*\n * LOCAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_datapath_server_msg_handler_list[] = {\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_datapath_server_msg_handler},\n\n    {DATAPATHPS_TX_CCC_CHANGED,\n     (ke_msg_func_t)app_datapath_server_tx_ccc_changed_handler},\n    {DATAPATHPS_TX_DATA_SENT,\n     (ke_msg_func_t)app_datapath_server_tx_data_sent_handler},\n    {DATAPATHPS_RX_DATA_RECEIVED,\n     (ke_msg_func_t)app_datapath_server_rx_data_received_handler},\n    {DATAPATHPS_NOTIFICATION_RECEIVED,\n     (ke_msg_func_t)app_datapath_server_rx_data_received_handler},\n};\n\nconst struct ke_state_handler app_datapath_server_table_handler = {\n    &app_datapath_server_msg_handler_list[0],\n    (sizeof(app_datapath_server_msg_handler_list) /\n     sizeof(struct ke_msg_handler))};\n\n#endif // BLE_APP_DATAPATH_SERVER\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_datapath/app_datapath_server.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef APP_DATAPATH_SERVER_H_\n#define APP_DATAPATH_SERVER_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @ingroup RICOW\n *\n * @brief DataPath Server Application entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW configuration\n\n#if (BLE_APP_DATAPATH_SERVER)\n\n#include           // Standard Integer Definition\n#include \"ke_task.h\"\n\n#define BLE_INVALID_CONNECTION_INDEX    0xFF\n\n#define HIGH_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS        20\n#define HIGH_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS        30\n#define HIGH_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS  2000\n#define HIGH_SPEED_BLE_CONNECTION_SLAVELATENCY              0\n\n\n\n#define LOW_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS         400\n#define LOW_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS         500\n#define LOW_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS   2000\n#define LOW_SPEED_BLE_CONNECTION_SLAVELATENCY               0\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\nextern struct app_env_tag app_env;\n\n/// health thermometer application environment structure\nstruct app_datapath_server_env_tag\n{\n    uint8_t connectionIndex;\n    uint8_t isNotificationEnabled;\n};\n\ntypedef void(*app_datapath_server_tx_done_t)(void);\n\ntypedef void(*app_datapath_server_activity_stopped_t)(void);\n\n/*\n * GLOBAL VARIABLES DECLARATIONS\n ****************************************************************************************\n */\n\n/// Health Thermomter Application environment\nextern struct app_datapath_server_env_tag app_datapath_server_env;\n\n/// Table of message handlers\nextern const struct ke_state_handler app_datapath_server_table_handler;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*\n * FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialize DataPath Server Application\n ****************************************************************************************\n */\nvoid app_datapath_server_init(void);\n\n/**\n ****************************************************************************************\n * @brief Add a DataPath Server instance in the DB\n ****************************************************************************************\n */\nvoid app_datapath_add_datapathps(void);\n\nvoid app_datapath_server_connected_evt_handler(uint8_t conidx);\n\nvoid app_datapath_server_disconnected_evt_handler(uint8_t conidx);\n\nvoid app_datapath_server_send_data_via_notification(uint8_t* ptrData, uint32_t length);\n\nvoid app_datapath_server_send_data_via_indication(uint8_t* ptrData, uint32_t length);\n\nvoid app_datapath_server_send_data_via_write_command(uint8_t* ptrData, uint32_t length);\n\nvoid app_datapath_server_send_data_via_write_request(uint8_t* ptrData, uint32_t length);\n\nvoid app_datapath_server_register_tx_done(app_datapath_server_tx_done_t callback);\n\nvoid app_datapath_server_control_notification(uint8_t conidx,bool isEnable);\n\nvoid app_datapath_server_mtu_exchanged_handler(uint8_t conidx, uint16_t mtu);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif //(BLE_APP_DATAPATH_SERVER)\n\n/// @} APP\n\n#endif // APP_DATAPATH_SERVER_H_\n"
  },
  {
    "path": "services/ble_app/app_dis/app_dis.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_DIS)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"app.h\"       // Application Manager Definitions\n#include \"app_dis.h\"   // Device Information Service Application Definitions\n#include \"diss_task.h\" // Device Information Profile Functions\n#include \"gapm_task.h\" // GAP Manager Task API\n#include \"prf_types.h\" // Profile Common Types Definitions\n#include \n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nstatic int diss_value_req_ind_handler(ke_msg_id_t const msgid,\n                                      struct diss_value_req_ind const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Initialize length\n  uint8_t len = 0;\n  // Pointer to the data\n  uint8_t *data = NULL;\n\n  // Check requested value\n  switch (param->value) {\n  case DIS_MANUFACTURER_NAME_CHAR: {\n    // Set information\n    len = APP_DIS_MANUFACTURER_NAME_LEN;\n    data = (uint8_t *)APP_DIS_MANUFACTURER_NAME;\n  } break;\n\n  case DIS_MODEL_NB_STR_CHAR: {\n    // Set information\n    len = APP_DIS_MODEL_NB_STR_LEN;\n    data = (uint8_t *)APP_DIS_MODEL_NB_STR;\n  } break;\n\n  case DIS_SYSTEM_ID_CHAR: {\n    // Set information\n    len = APP_DIS_SYSTEM_ID_LEN;\n    data = (uint8_t *)APP_DIS_SYSTEM_ID;\n  } break;\n\n  case DIS_PNP_ID_CHAR: {\n    // Set information\n    len = APP_DIS_PNP_ID_LEN;\n    data = (uint8_t *)APP_DIS_PNP_ID;\n  } break;\n\n  case DIS_SERIAL_NB_STR_CHAR: {\n    // Set information\n    len = APP_DIS_SERIAL_NB_STR_LEN;\n    data = (uint8_t *)APP_DIS_SERIAL_NB_STR;\n  } break;\n\n  case DIS_HARD_REV_STR_CHAR: {\n    // Set information\n    len = APP_DIS_HARD_REV_STR_LEN;\n    data = (uint8_t *)APP_DIS_HARD_REV_STR;\n  } break;\n\n  case DIS_FIRM_REV_STR_CHAR: {\n    // Set information\n    len = APP_DIS_FIRM_REV_STR_LEN;\n    data = (uint8_t *)APP_DIS_FIRM_REV_STR;\n  } break;\n\n  case DIS_SW_REV_STR_CHAR: {\n    // Set information\n    len = APP_DIS_SW_REV_STR_LEN;\n    data = (uint8_t *)APP_DIS_SW_REV_STR;\n  } break;\n\n  case DIS_IEEE_CHAR: {\n    // Set information\n    len = APP_DIS_IEEE_LEN;\n    data = (uint8_t *)APP_DIS_IEEE;\n  } break;\n\n  default:\n    ASSERT_ERR(0);\n    break;\n  }\n\n  // Allocate confirmation to send the value\n  struct diss_value_cfm *cfm_value =\n      KE_MSG_ALLOC_DYN(DISS_VALUE_CFM, src_id, dest_id, diss_value_cfm, len);\n\n  // Set parameters\n  cfm_value->value = param->value;\n  cfm_value->length = len;\n  if (len) {\n    // Copy data\n    memcpy(&cfm_value->data[0], data, len);\n  }\n  // Send message\n  ke_msg_send(cfm_value);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nvoid app_dis_init(void) {\n  // Nothing to do\n}\n\nvoid app_dis_add_dis(void) {\n  struct diss_db_cfg *db_cfg;\n  // Allocate the DISS_CREATE_DB_REQ\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, sizeof(struct diss_db_cfg));\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_DISS;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Set parameters\n  db_cfg = (struct diss_db_cfg *)req->param;\n  db_cfg->features = APP_DIS_FEATURES;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_dis_msg_handler_list[] = {\n    {DISS_VALUE_REQ_IND, (ke_msg_func_t)diss_value_req_ind_handler},\n};\n\nconst struct ke_state_handler app_dis_table_handler = {\n    &app_dis_msg_handler_list[0],\n    (sizeof(app_dis_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif // BLE_APP_DIS\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_dis/app_dis.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef APP_DIS_H_\n#define APP_DIS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n *\n * @brief Device Information Application Module Entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW Configuration\n\n#if (BLE_APP_DIS)\n\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Manufacturer Name Value\n#define APP_DIS_MANUFACTURER_NAME       (\"RivieraWaves SAS\")\n#define APP_DIS_MANUFACTURER_NAME_LEN   (16)\n\n/// Model Number String Value\n#define APP_DIS_MODEL_NB_STR            (\"RW-BLE-1.0\")\n#define APP_DIS_MODEL_NB_STR_LEN        (10)\n\n/// Serial Number\n#define APP_DIS_SERIAL_NB_STR           (\"1.0.0.0-LE\")\n#define APP_DIS_SERIAL_NB_STR_LEN       (10)\n\n/// Firmware Revision\n#define APP_DIS_FIRM_REV_STR            (\"6.1.2\")\n#define APP_DIS_FIRM_REV_STR_LEN        (5)\n\n/// System ID Value - LSB -> MSB\n#define APP_DIS_SYSTEM_ID               (\"\\x12\\x34\\x56\\xFF\\xFE\\x9A\\xBC\\xDE\")\n#define APP_DIS_SYSTEM_ID_LEN           (8)\n\n/// Hardware Revision String\n#define APP_DIS_HARD_REV_STR           (\"1.0.0\")\n#define APP_DIS_HARD_REV_STR_LEN       (5)\n\n/// Software Revision String\n#define APP_DIS_SW_REV_STR              (\"6.3.0\")\n#define APP_DIS_SW_REV_STR_LEN          (5)\n\n/// IEEE\n#define APP_DIS_IEEE                    (\"\\xFF\\xEE\\xDD\\xCC\\xBB\\xAA\")\n#define APP_DIS_IEEE_LEN                (6)\n\n/**\n * PNP ID Value - LSB -> MSB\n *      Vendor ID Source : 0x02 (USB Implementer’s Forum assigned Vendor ID value)\n *      Vendor ID : 0x045E      (Microsoft Corp)\n *      Product ID : 0x0040\n *      Product Version : 0x0300\n */\n#define APP_DIS_PNP_ID               (\"\\x02\\x5E\\x04\\x40\\x00\\x00\\x03\")\n#define APP_DIS_PNP_ID_LEN           (7)\n\n#if (BLE_APP_HID)\n#define APP_DIS_FEATURES             (DIS_MANUFACTURER_NAME_CHAR_SUP |\\\n                                      DIS_MODEL_NB_STR_CHAR_SUP      |\\\n                                      DIS_SYSTEM_ID_CHAR_SUP         |\\\n                                      DIS_PNP_ID_CHAR_SUP)\n#else\n#define APP_DIS_FEATURES             (DIS_ALL_FEAT_SUP)\n#endif //(BLE_APP_HID)\n\n\n/*\n * GLOBAL VARIABLES DECLARATION\n ****************************************************************************************\n */\n\n/// Table of message handlers\nextern const struct ke_state_handler app_dis_table_handler;\n\n/*\n * GLOBAL FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialize Device Information Service Application\n ****************************************************************************************\n */\nvoid app_dis_init(void);\n\n/**\n ****************************************************************************************\n * @brief Add a Device Information Service instance in the DB\n ****************************************************************************************\n */\nvoid app_dis_add_dis(void);\n\n/**\n ****************************************************************************************\n * @brief Enable the Device Information Service\n ****************************************************************************************\n */\nvoid app_dis_enable_prf(uint16_t conhdl);\n\n#endif //BLE_APP_DIS\n\n/// @} APP\n\n#endif //APP_DIS_H_\n"
  },
  {
    "path": "services/ble_app/app_gfps/app_gfps.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_GFPS)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"app.h\" // Application Manager Definitions\n#include \"app_ble_mode_switch.h\"\n#include \"app_bt.h\"\n#include \"app_gfps.h\" // Device Information Service Application Definitions\n#include \"apps.h\"\n#include \"bt_if.h\"\n#include \"cmsis_os.h\"\n#include \"gap.h\"\n#include \"gapm.h\"\n#include \"gapm_task.h\" // GAP Manager Task API\n#include \"gfps_crypto.h\"\n#include \"gfps_provider.h\"\n#include \"gfps_provider_errors.h\"\n#include \"gfps_provider_task.h\" // Device Information Profile Functions\n#include \"me_api.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_fp_account_key.h\"\n#include \"prf_types.h\" // Profile Common Types Definitions\n#include \n\n#ifdef IBRT\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_if.h\"\n#endif\n\n/************************private macro defination***************************/\n#define USE_BLE_ADDR_AS_SALT 0\n#define USE_RANDOM_NUM_AS_SALT 1\n#define GFPS_ACCOUNTKEY_SALT_TYPE USE_BLE_ADDR_AS_SALT\n\n#define FP_SERVICE_LEN 0x06\n#define FP_SERVICE_UUID 0x2CFE\n#define FP_DEVICE_MODEL_ID 0x2B677D\n\n#define GFPS_INITIAL_ADV_RAND_SALT 0xFF\n\n#define BLE_FASTPAIR_NORMAL_ADVERTISING_INTERVAL (160)\n#define BLE_FASTPAIR_FAST_ADVERTISING_INTERVAL (48)\n\n/************************private type defination****************************/\n\n/************************extern function declearation***********************/\nextern void AES128_ECB_decrypt(uint8_t *input, const uint8_t *key,\n                               uint8_t *output);\n\n/**********************private function declearation************************/\n/*---------------------------------------------------------------------------\n *            gfps_ble_data_fill_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    BLE advertisement and scan response data fill handler for Google fast pair\n *\n * Parameters:\n *    param - pointer of BLE parameter to be configure\n *\n * Return:\n *    void\n */\nstatic void gfps_ble_data_fill_handler(void *param);\n\n/************************private variable defination************************/\nstruct app_gfps_env_tag app_gfps_env;\n\nstatic char app_gfps_power_uuid[APP_GFPS_ADV_POWER_UUID_LEN] =\n    APP_GFPS_ADV_POWER_UUID;\n\n/****************************function defination****************************/\nstatic void app_gfps_init_env(void) {\n  memset((uint8_t *)&app_gfps_env, 0, sizeof(struct app_gfps_env_tag));\n  app_gfps_env.connectionIndex = BLE_INVALID_CONNECTION_INDEX;\n  app_gfps_env.batteryDataType = HIDE_UI_INDICATION;\n  app_gfps_env.advRandSalt = GFPS_INITIAL_ADV_RAND_SALT;\n  app_ble_register_data_fill_handle(\n      USER_GFPS, (BLE_DATA_FILL_FUNC_T)gfps_ble_data_fill_handler, false);\n}\n\nstatic void big_little_switch(const uint8_t *in, uint8_t *out, uint8_t len) {\n  if (len < 1)\n    return;\n  for (int i = 0; i < len; i++) {\n    out[i] = in[len - i - 1];\n  }\n  return;\n}\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\nextern uint8_t bt_addr[6];\n\nvoid app_gfps_connected_evt_handler(uint8_t conidx) {\n  app_gfps_env.connectionIndex = conidx;\n  TRACE(0, \"local LE addr: \");\n\n  bd_addr_t *pBdAddr = gapm_get_connected_bdaddr(conidx);\n  big_little_switch(pBdAddr->addr, &app_gfps_env.local_le_addr.addr[0], 6);\n  DUMP8(\"0x%02x \", pBdAddr->addr, 6);\n#if !defined(IBRT)\n  big_little_switch((&bt_addr[0]), &app_gfps_env.local_bt_addr.addr[0], 6);\n  TRACE(0, \"local bt addr: \");\n  DUMP8(\"0x%02x \", &bt_addr[0], 6);\n#else\n  big_little_switch(app_tws_ibrt_get_bt_ctrl_ctx()->local_addr.address,\n                    &app_gfps_env.local_bt_addr.addr[0], 6);\n  TRACE(0, \"local bt addr: \");\n  DUMP8(\"0x%02x \", app_tws_ibrt_get_bt_ctrl_ctx()->local_addr.address, 6);\n#endif\n}\n\nvoid app_gfps_disconnected_evt_handler(uint8_t conidx) {\n  if (conidx == app_gfps_env.connectionIndex) {\n    // recover classic bt iocap\n    if (app_gfps_env.bt_set_iocap != NULL) {\n      app_gfps_env.bt_set_iocap(app_gfps_env.bt_iocap);\n    }\n    if (app_gfps_env.bt_set_authrequirements != NULL) {\n      app_gfps_env.bt_set_authrequirements(app_gfps_env.bt_authrequirements);\n    }\n\n    app_gfps_env.isKeyBasedPairingNotificationEnabled = false;\n    app_gfps_env.isPassKeyNotificationEnabled = false;\n    app_gfps_env.isPendingForWritingNameReq = false;\n    app_gfps_env.connectionIndex = BLE_INVALID_CONNECTION_INDEX;\n  }\n}\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nstatic int gfpsp_value_req_ind_handler(ke_msg_id_t const msgid,\n                                       struct gfpsp_value_req_ind const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  // Initialize length\n  uint8_t len = 0;\n  // Pointer to the data\n  uint8_t *data = NULL;\n  TRACE(1, \"val %d\", param->value);\n  // Check requested value\n  switch (param->value) {\n  case GFPSP_MANUFACTURER_NAME_CHAR:\n  case GFPSP_MODEL_NB_STR_CHAR:\n  case GFPSP_SYSTEM_ID_CHAR:\n  case GFPSP_PNP_ID_CHAR:\n  case GFPSP_SERIAL_NB_STR_CHAR:\n  case GFPSP_HARD_REV_STR_CHAR:\n  case GFPSP_FIRM_REV_STR_CHAR:\n  case GFPSP_SW_REV_STR_CHAR:\n  case GFPSP_IEEE_CHAR: {\n    // Set information\n    len = APP_GFPS_IEEE_LEN;\n    data = (uint8_t *)APP_GFPS_IEEE;\n  } break;\n\n  default:\n    ASSERT_ERR(0);\n    break;\n  }\n\n  // Allocate confirmation to send the value\n  struct gfpsp_value_cfm *cfm_value =\n      KE_MSG_ALLOC_DYN(GFPSP_VALUE_CFM, src_id, dest_id, gfpsp_value_cfm, len);\n\n  // Set parameters\n  cfm_value->value = param->value;\n  cfm_value->length = len;\n  if (len) {\n    // Copy data\n    memcpy(&cfm_value->data[0], data, len);\n  }\n  // Send message\n  ke_msg_send(cfm_value);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n// MSB->LSB\nconst uint8_t bes_demo_Public_anti_spoofing_key[64] = {\n    0x3E, 0x08, 0x3B, 0x0A, 0x5C, 0x04, 0x78, 0x84, 0xBE, 0x41, 0xBE,\n    0x7E, 0x52, 0xD1, 0x0C, 0x68, 0x64, 0x6C, 0x4D, 0xB6, 0xD9, 0x20,\n    0x95, 0xA7, 0x32, 0xE9, 0x42, 0x40, 0xAC, 0x02, 0x54, 0x48, 0x99,\n    0x49, 0xDA, 0xE1, 0x0D, 0x9C, 0xF5, 0xEB, 0x29, 0x35, 0x7F, 0xB1,\n    0x70, 0x55, 0xCB, 0x8C, 0x8F, 0xBF, 0xEB, 0x17, 0x15, 0x3F, 0xA0,\n    0xAA, 0xA5, 0xA2, 0xC4, 0x3C, 0x1B, 0x48, 0x60, 0xDA};\n\n// MSB->LSB\nconst uint8_t bes_demo_private_anti_spoofing_key[32] = {\n    0xCD, 0xF8, 0xAA, 0xC0, 0xDF, 0x4C, 0x93, 0x63, 0x2F, 0x48, 0x20,\n    0xA6, 0xD8, 0xAB, 0x22, 0xF3, 0x3A, 0x94, 0xBF, 0x8E, 0x4C, 0x90,\n    0x25, 0xB3, 0x44, 0xD2, 0x2E, 0xDE, 0x0F, 0xB7, 0x22, 0x1F};\n\nextern void fast_pair_enter_pairing_mode_handler(void);\n\nvoid app_gfps_init(void) {\n  nv_record_fp_account_key_init();\n  app_gfps_init_env();\n  app_gfps_env.enter_pairing_mode = NULL;\n  app_gfps_env.bt_set_iocap = NULL;\n  app_gfps_env.bt_set_authrequirements = NULL;\n  gfps_crypto_init();\n\n  app_bt_get_fast_pair_info();\n#ifndef IS_USE_CUSTOM_FP_INFO\n  gfps_crypto_set_p256_key(bes_demo_Public_anti_spoofing_key,\n                           bes_demo_private_anti_spoofing_key);\n#else\n  gfps_crypto_set_p256_key(app_bt_get_fast_pair_public_key(),\n                           app_bt_get_fast_pair_private_key());\n#endif\n  app_gfps_set_bt_access_mode(fast_pair_enter_pairing_mode_handler);\n  app_gfps_set_io_cap((gfps_bt_io_cap_set)btif_sec_set_io_capabilities);\n\n  app_gfps_set_authrequirements(\n      (gfps_bt_io_authrequirements_set)btif_sec_set_authrequirements);\n\n  app_gfps_enable_battery_info(true);\n}\n\nvoid app_gfps_set_bt_access_mode(gfps_enter_pairing_mode cb) {\n  app_gfps_env.enter_pairing_mode = cb;\n}\n\nvoid app_gfps_set_io_cap(gfps_bt_io_cap_set cb) {\n  app_gfps_env.bt_set_iocap = cb;\n}\n\nvoid app_gfps_set_authrequirements(gfps_bt_io_authrequirements_set cb) {\n  app_gfps_env.bt_set_authrequirements = cb;\n}\n\nvoid app_gfps_set_battery_info_acquire_handler(\n    gfps_get_battery_info_handler cb) {\n  app_gfps_env.get_battery_info_handler = cb;\n}\n\nvoid app_gfps_add_gfps(void) {\n  struct gfpsp_db_cfg *db_cfg;\n  // Allocate the DISS_CREATE_DB_REQ\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, sizeof(struct gfpsp_db_cfg));\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_GFPSP;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Set parameters\n  db_cfg = (struct gfpsp_db_cfg *)req->param;\n  db_cfg->features = APP_GFPS_FEATURES;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nvoid app_gfps_send_keybase_pairing_via_notification(uint8_t *ptrData,\n                                                    uint32_t length) {\n  struct gfpsp_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(GFPSP_KEY_BASED_PAIRING_WRITE_NOTIFY,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_GFPSP),\n                                   app_gfps_env.connectionIndex),\n                       TASK_APP, gfpsp_send_data_req_t, length);\n\n  req->connecionIndex = app_gfps_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n}\n\nint app_gfps_send_passkey_via_notification(uint8_t *ptrData, uint32_t length) {\n  struct gfpsp_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(GFPSP_KEY_PASS_KEY_WRITE_NOTIFY,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_GFPSP),\n                                   app_gfps_env.connectionIndex),\n                       TASK_APP, gfpsp_send_data_req_t, length);\n\n  req->connecionIndex = app_gfps_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic void app_gfps_send_naming_packet_via_notification(uint8_t *ptrData,\n                                                         uint32_t length) {\n  struct gfpsp_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(GFPSP_NAME_NOTIFY,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_GFPSP),\n                                   app_gfps_env.connectionIndex),\n                       TASK_APP, gfpsp_send_data_req_t, length);\n\n  req->connecionIndex = app_gfps_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n}\n\nvoid app_gfps_handling_on_mobile_link_disconnection(\n    btif_remote_device_t *pRemDev) {\n  bool isDisconnectedWithMobile = false;\n#ifdef IBRT\n\n  ibrt_link_type_e link_type = app_tws_ibrt_get_remote_link_type(pRemDev);\n  if (MOBILE_LINK == link_type) {\n    isDisconnectedWithMobile = true;\n  }\n#else\n  isDisconnectedWithMobile = true;\n#endif\n\n  if (isDisconnectedWithMobile) {\n    if (app_gfps_is_last_response_pending()) {\n      app_gfps_enter_connectable_mode_req_handler(app_gfps_get_last_response());\n    }\n  }\n}\n\nvoid app_gfps_enter_connectable_mode_req_handler(uint8_t *response) {\n  TRACE(2, \"%s isLastResponsePending:%d\", __func__,\n        app_gfps_env.isLastResponsePending);\n  TRACE(0, \"response data:\");\n  DUMP8(\"%02x \", response, GFPSP_ENCRYPTED_RSP_LEN);\n\n#ifdef __BT_ONE_BRING_TWO__\n  app_gfps_send_keybase_pairing_via_notification(response,\n                                                 GFPSP_ENCRYPTED_RSP_LEN);\n#else\n\n#ifndef IBRT\n  if (btif_me_get_activeCons() > 0)\n#else\n  if (app_tws_ibrt_mobile_link_connected())\n#endif\n  {\n    memcpy(app_gfps_env.pendingLastResponse, response, GFPSP_ENCRYPTED_RSP_LEN);\n    app_gfps_env.isLastResponsePending = true;\n#ifndef IBRT\n    app_disconnect_all_bt_connections();\n#else\n    app_tws_ibrt_disconnect_mobile();\n#endif\n  } else {\n    app_gfps_env.isLastResponsePending = false;\n    app_gfps_send_keybase_pairing_via_notification(response,\n                                                   GFPSP_ENCRYPTED_RSP_LEN);\n    TRACE(0, \"wait for pair req maybe classic or ble\");\n    app_gfps_env.isWaitingForFpToConnect = true;\n    if (app_gfps_env.enter_pairing_mode != NULL) {\n      app_gfps_env.enter_pairing_mode();\n    }\n\n    if (app_gfps_env.bt_set_iocap != NULL) {\n      TRACE(0, \"SET IOC\");\n      app_gfps_env.bt_iocap = app_gfps_env.bt_set_iocap(1); // IO_display_yesno\n    }\n\n    if (app_gfps_env.bt_set_authrequirements != NULL) {\n      TRACE(0, \"SET authrequirements\");\n      app_gfps_env.bt_authrequirements = app_gfps_env.bt_set_authrequirements(\n          1); // Man in the Middle protection req\n    }\n  }\n#endif\n}\n\nuint8_t *app_gfps_get_last_response(void) {\n  return app_gfps_env.pendingLastResponse;\n}\n\nbool app_gfps_is_last_response_pending(void) {\n  return app_gfps_env.isLastResponsePending;\n}\n\nstatic uint8_t\napp_gfps_handle_decrypted_keybase_pairing_request(gfpsp_req_resp *raw_req,\n                                                  uint8_t *out_key) {\n  gfpsp_encrypted_resp en_rsp;\n  gfpsp_raw_resp raw_rsp;\n  memcpy(app_gfps_env.keybase_pair_key, out_key, 16);\n  memcpy(&app_gfps_env.seeker_bt_addr.addr[0],\n         &raw_req->rx_tx.key_based_pairing_req.seeker_addr[0], 6);\n  if (raw_req->rx_tx.key_based_pairing_req.flags_discoverability ==\n      RAW_REQ_FLAGS_DISCOVERABILITY_BIT0_EN) {\n    TRACE(0, \"TODO discoverable 10S\");\n    // TODO start a timer keep discoverable 10S...\n    // TODO make sure there is no ble ADV with the MODEL ID data\n  }\n  raw_rsp.message_type = KEY_BASED_PAIRING_RSP; // Key-based Pairing Response\n  memcpy(raw_rsp.provider_addr, app_gfps_env.local_bt_addr.addr, 6);\n\n  TRACE(0, \"raw_rsp.provider_addr:\");\n  DUMP8(\"%02x \", raw_rsp.provider_addr, 6);\n\n  for (uint8_t index = 0; index < 9; index++) {\n    raw_rsp.salt[index] = (uint8_t)rand();\n  }\n\n  gfps_crypto_encrypt((const uint8_t *)(&raw_rsp.message_type), sizeof(raw_rsp),\n                      app_gfps_env.keybase_pair_key, en_rsp.uint128_array);\n\n  TRACE(1, \"message type is 0x%x\", raw_req->rx_tx.raw_req.message_type);\n  TRACE(4, \"bit 0: %d, bit 1: %d, bit 2: %d, bit 3: %d\",\n        raw_req->rx_tx.key_based_pairing_req.flags_discoverability,\n        raw_req->rx_tx.key_based_pairing_req.flags_bonding_addr,\n        raw_req->rx_tx.key_based_pairing_req.flags_get_existing_name,\n        raw_req->rx_tx.key_based_pairing_req\n            .flags_retroactively_write_account_key);\n\n  bool isReturnName =\n      raw_req->rx_tx.key_based_pairing_req.flags_get_existing_name;\n\n  if (raw_req->rx_tx.key_based_pairing_req.flags_bonding_addr ==\n      RAW_REQ_FLAGS_INTBONDING_SEEKERADDR_BIT1_EN) {\n    TRACE(0, \"try connect to remote BR/EDR addr\");\n    // TODO:\n    app_gfps_send_keybase_pairing_via_notification(\n        (uint8_t *)en_rsp.uint128_array, sizeof(en_rsp));\n  } else if (raw_req->rx_tx.key_based_pairing_req\n                 .flags_retroactively_write_account_key) {\n    // check whether the seeker's bd address is the same as already connected\n    // mobile\n    uint8_t swapedBtAddr[6];\n    big_little_switch(app_gfps_env.seeker_bt_addr.addr, swapedBtAddr,\n                      sizeof(swapedBtAddr));\n\n    uint8_t isMatchMobileAddr = false;\n    for (uint32_t devId = 0; devId < btif_me_get_activeCons(); devId++) {\n      uint8_t connectedAddr[6];\n      app_bt_get_device_bdaddr(devId, connectedAddr);\n      if (!memcmp(connectedAddr, swapedBtAddr, 6)) {\n        isMatchMobileAddr = true;\n        break;\n      }\n    }\n\n    if (isMatchMobileAddr) {\n      app_gfps_send_keybase_pairing_via_notification(\n          (uint8_t *)en_rsp.uint128_array, sizeof(en_rsp));\n    } else {\n      // reject the write request\n      return ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n  } else if (raw_req->rx_tx.key_based_pairing_req.flags_bonding_addr ==\n             RAW_REQ_FLAGS_INTBONDING_SEEKERADDR_BIT1_DIS) {\n    app_gfps_enter_connectable_mode_req_handler(\n        (uint8_t *)en_rsp.uint128_array);\n  } else {\n    app_gfps_send_keybase_pairing_via_notification(\n        (uint8_t *)en_rsp.uint128_array, sizeof(en_rsp));\n  }\n\n  if (isReturnName) {\n    app_gfps_env.isPendingForWritingNameReq = true;\n    TRACE(0, \"get existing name.\");\n    uint8_t response[16 + FP_MAX_NAME_LEN];\n    uint8_t *ptrRawName;\n    uint32_t rawNameLen;\n    ptrRawName = nv_record_fp_get_name_ptr(&rawNameLen);\n\n    gfps_encrypt_name(app_gfps_env.keybase_pair_key, ptrRawName, rawNameLen,\n                      &response[16], response, &response[8]);\n\n    app_gfps_send_naming_packet_via_notification(response, 16 + rawNameLen);\n  } else {\n    TRACE(0, \"Unusable bit.\");\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\nstatic void app_gfps_update_local_bt_name(void) {\n  uint8_t *ptrRawName;\n  uint32_t rawNameLen;\n  // name has been updated to fp nv record\n  ptrRawName = nv_record_fp_get_name_ptr(&rawNameLen);\n  if (rawNameLen > 0) {\n    bt_set_local_dev_name((const unsigned char *)(ptrRawName),\n                          strlen((char *)(ptrRawName)) + 1);\n    btif_update_bt_name((const unsigned char *)(ptrRawName),\n                        strlen((char *)(ptrRawName)) + 1);\n  }\n}\n\nstatic bool app_gfps_decrypt_keybase_pairing_request(uint8_t *pairing_req,\n                                                     uint8_t *output) {\n  uint8_t keyCount = nv_record_fp_account_key_count();\n  if (0 == keyCount) {\n    return false;\n  }\n\n  gfpsp_req_resp raw_req;\n  uint8_t accountKey[FP_ACCOUNT_KEY_SIZE];\n  for (uint8_t keyIndex = 0; keyIndex < keyCount; keyIndex++) {\n    nv_record_fp_account_key_get_by_index(keyIndex, accountKey);\n\n    AES128_ECB_decrypt(pairing_req, (const uint8_t *)accountKey,\n                       (uint8_t *)&raw_req);\n    TRACE(0, \"Decrypted keybase pairing req result:\");\n    DUMP8(\"0x%02x \", (uint8_t *)&raw_req, 16);\n\n    if ((memcmp(raw_req.rx_tx.key_based_pairing_req.provider_addr,\n                app_gfps_env.local_bt_addr.addr, 6) == 0) ||\n        (memcmp(raw_req.rx_tx.key_based_pairing_req.provider_addr,\n                app_gfps_env.local_le_addr.addr, 6) == 0)) {\n      memcpy(output, accountKey, FP_ACCOUNT_KEY_SIZE);\n      TRACE(1, \"fp message type 0x%02x.\", raw_req.rx_tx.raw_req.message_type);\n      if (KEY_BASED_PAIRING_REQ == raw_req.rx_tx.raw_req.message_type) {\n        app_gfps_handle_decrypted_keybase_pairing_request(&raw_req, accountKey);\n        return true;\n      } else if (ACTION_REQUEST == raw_req.rx_tx.raw_req.message_type) {\n        memcpy(app_gfps_env.keybase_pair_key, accountKey, 16);\n        memcpy(&app_gfps_env.seeker_bt_addr.addr[0],\n               &(raw_req.rx_tx.key_based_pairing_req.seeker_addr[0]), 6);\n        gfpsp_encrypted_resp en_rsp;\n        gfpsp_raw_resp raw_rsp;\n\n        raw_rsp.message_type =\n            KEY_BASED_PAIRING_RSP; // Key-based Pairing Response\n        memcpy(raw_rsp.provider_addr, app_gfps_env.local_bt_addr.addr, 6);\n\n        TRACE(0, \"raw_rsp.provider_addr:\");\n        DUMP8(\"%02x \", raw_rsp.provider_addr, 6);\n\n        for (uint8_t index = 0; index < 9; index++) {\n          raw_rsp.salt[index] = (uint8_t)rand();\n        }\n\n        gfps_crypto_encrypt((const uint8_t *)(&raw_rsp.message_type),\n                            sizeof(raw_rsp), app_gfps_env.keybase_pair_key,\n                            en_rsp.uint128_array);\n\n        app_gfps_send_keybase_pairing_via_notification(\n            (uint8_t *)en_rsp.uint128_array, sizeof(en_rsp));\n\n        if (raw_req.rx_tx.action_req.isDeviceAction) {\n          // TODO: device action via BLE\n        } else if (raw_req.rx_tx.action_req.isFollowedByAdditionalDataCh) {\n          // write name request will be received\n          TRACE(0, \"FP write name request will be received.\");\n          app_gfps_env.isPendingForWritingNameReq = true;\n        }\n        return true;\n      }\n    }\n  }\n\n  return false;\n}\n\nint app_gfps_write_key_based_pairing_ind_hander(\n    ke_msg_id_t const msgid, struct gfpsp_write_ind_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  gfpsp_Key_based_Pairing_req en_req;\n  gfpsp_req_resp *ptr_raw_req;\n\n  en_req.en_req = (gfpsp_encrypted_req_uint128 *)&(param->data[0]);\n  en_req.pub_key = (gfpsp_64B_public_key *)&(param->data[16]);\n  uint8_t out_key[16] = {0};\n  uint8_t decryptdata[16] = {0};\n  uint8_t write_rsp_status = GAP_ERR_NO_ERROR;\n\n  TRACE(3, \"length = %d value = 0x%x  0x%x\", param->length, param->data[0],\n        param->data[1]);\n  DUMP8(\"%02x \", param->data, 80);\n\n  if (param->length == GFPSP_KEY_BASED_PAIRING_REQ_LEN_WITH_PUBLIC_KEY) {\n    memset(app_gfps_env.keybase_pair_key, 0, 6);\n    uint32_t gfps_state = gfps_crypto_get_secret_decrypt(\n        (const uint8_t *)en_req.en_req, (const uint8_t *)en_req.pub_key,\n        out_key, decryptdata);\n    if (gfps_state == GFPS_SUCCESS) {\n      memcpy(app_gfps_env.aesKeyFromECDH, out_key, 16);\n      app_gfps_env.isInitialPairing = true;\n      ptr_raw_req = (gfpsp_req_resp *)decryptdata;\n      TRACE(0, \"raw req provider's addr:\");\n      DUMP8(\"%02x \", ptr_raw_req->rx_tx.key_based_pairing_req.provider_addr, 6);\n      TRACE(0, \"raw req seeker's addr:\");\n      DUMP8(\"%02x \", ptr_raw_req->rx_tx.key_based_pairing_req.seeker_addr, 6);\n      TRACE(1, \"fp message type 0x%02x.\",\n            ptr_raw_req->rx_tx.raw_req.message_type);\n      if ((KEY_BASED_PAIRING_REQ == ptr_raw_req->rx_tx.raw_req.message_type) &&\n          ((memcmp(ptr_raw_req->rx_tx.key_based_pairing_req.provider_addr,\n                   app_gfps_env.local_bt_addr.addr, 6) == 0) ||\n           (memcmp(ptr_raw_req->rx_tx.key_based_pairing_req.provider_addr,\n                   app_gfps_env.local_le_addr.addr, 6) == 0))) {\n        write_rsp_status = app_gfps_handle_decrypted_keybase_pairing_request(\n            ptr_raw_req, out_key);\n      } else {\n        TRACE(0, \"decrypt false..ingore\");\n      }\n\n    } else {\n      TRACE(1, \"error = %x\", gfps_state);\n    }\n\n  } else if (param->length ==\n             GFPSP_KEY_BASED_PAIRING_REQ_LEN_WITHOUT_PUBLIC_KEY) {\n\n    app_gfps_env.isInitialPairing = false;\n    bool isDecryptedSuccessful = app_gfps_decrypt_keybase_pairing_request(\n        (uint8_t *)en_req.en_req, out_key);\n    TRACE(1, \"Decrypt keybase pairing req without public key result: %d\",\n          isDecryptedSuccessful);\n  } else {\n    TRACE(0, \"who you are??\");\n  }\n\n  struct gfpsp_send_write_rsp_t *response = KE_MSG_ALLOC(\n      GFPSP_SEND_WRITE_RESPONSE, src_id, dest_id, gfpsp_send_write_rsp_t);\n  *response = param->pendingWriteRsp;\n  response->status = write_rsp_status;\n  ke_msg_send(response);\n\n  return (KE_MSG_CONSUMED);\n}\n\nint app_gfps_write_passkey_ind_hander(ke_msg_id_t const msgid,\n                                      struct gfpsp_write_ind_t const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  gfpsp_raw_pass_key_resp raw_rsp;\n  gfpsp_encrypted_resp en_rsp;\n  uint8_t decryptdata[16] = {0};\n  TRACE(1, \"length = %d value = 0x\", param->length);\n  DUMP8(\"%02X, \", param->data, 16);\n  gfps_crypto_decrypt(param->data, 16, app_gfps_env.keybase_pair_key,\n                      decryptdata);\n  TRACE(0, \"decrypt data =0x\");\n  TRACE(0, \"===============================\");\n  DUMP8(\"%02X\", decryptdata, 16);\n  TRACE(0, \"===============================\");\n\n  TRACE(0, \"pass key = 1-3 bytes\");\n\n  raw_rsp.message_type = 0x03; // Provider's passkey\n  raw_rsp.passkey[0] = decryptdata[1];\n  raw_rsp.passkey[1] = decryptdata[2];\n  raw_rsp.passkey[2] = decryptdata[3];\n  raw_rsp.reserved[0] = 0x38; // my magic num  temp test\n  raw_rsp.reserved[1] = 0x30;\n  raw_rsp.reserved[2] = 0x23;\n  raw_rsp.reserved[3] = 0x30;\n  raw_rsp.reserved[4] = 0x06;\n  raw_rsp.reserved[5] = 0x10;\n  raw_rsp.reserved[6] = 0x05;\n  raw_rsp.reserved[7] = 0x13;\n  raw_rsp.reserved[8] = 0x06;\n  raw_rsp.reserved[9] = 0x12;\n  raw_rsp.reserved[10] = 0x12;\n  raw_rsp.reserved[11] = 0x01;\n  gfps_crypto_encrypt((const uint8_t *)(&raw_rsp.message_type), sizeof(raw_rsp),\n                      app_gfps_env.keybase_pair_key, en_rsp.uint128_array);\n  app_gfps_send_passkey_via_notification((uint8_t *)en_rsp.uint128_array,\n                                         sizeof(en_rsp));\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_gfps_write_name_ind_hander(ke_msg_id_t const msgid,\n                                          struct gfpsp_write_ind_t const *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  bool isSuccessful = false;\n\n  if (!app_gfps_env.isPendingForWritingNameReq) {\n    TRACE(0, \"Pre fp write name request is not received.\");\n  } else {\n    uint8_t rawName[FP_MAX_NAME_LEN];\n\n    struct gfpsp_write_ind_t *pWriteInd = (struct gfpsp_write_ind_t *)param;\n    if (app_gfps_env.isInitialPairing) {\n      isSuccessful = gfps_decrypt_name(\n          app_gfps_env.aesKeyFromECDH, pWriteInd->data, &(pWriteInd->data[8]),\n          &(pWriteInd->data[16]), rawName, pWriteInd->length - 16);\n    } else {\n      isSuccessful = gfps_decrypt_name(\n          app_gfps_env.keybase_pair_key, pWriteInd->data, &(pWriteInd->data[8]),\n          &(pWriteInd->data[16]), rawName, pWriteInd->length - 16);\n    }\n\n    TRACE(1, \"write name successful flag %d\", isSuccessful);\n\n    if (isSuccessful) {\n      nv_record_fp_update_name(rawName, pWriteInd->length - 16);\n      TRACE(1, \"Rename BT name: [%s]\", rawName);\n      app_gfps_update_local_bt_name();\n#ifdef IBRT\n      app_tws_send_fastpair_info_to_slave();\n#endif\n    }\n\n    app_gfps_env.isPendingForWritingNameReq = false;\n  }\n\n  struct gfpsp_send_write_rsp_t *response = KE_MSG_ALLOC(\n      GFPSP_SEND_WRITE_RESPONSE, src_id, dest_id, gfpsp_send_write_rsp_t);\n  *response = param->pendingWriteRsp;\n  if (isSuccessful) {\n    response->status = ATT_ERR_NO_ERROR;\n  } else {\n    response->status = ATT_ERR_WRITE_NOT_PERMITTED;\n  }\n  ke_msg_send(response);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_gfps_write_accountkey_ind_hander(\n    ke_msg_id_t const msgid, struct gfpsp_write_ind_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  NV_FP_ACCOUNT_KEY_ENTRY_T accountkey;\n\n  TRACE(1, \"length = %d value = 0x\", param->length);\n  DUMP8(\"%02X, \", param->data, FP_ACCOUNT_KEY_SIZE);\n  gfps_crypto_decrypt(param->data, FP_ACCOUNT_KEY_SIZE,\n                      app_gfps_env.keybase_pair_key, accountkey.key);\n  TRACE(0, \"decrypt account key:\");\n  // TRACE(0,\"===============================\");\n  DUMP8(\"%02X\", accountkey.key, FP_ACCOUNT_KEY_SIZE);\n  // TRACE(0,\"===============================\");\n\n  nv_record_fp_account_key_add(&accountkey);\n\n#ifdef IBRT\n  app_tws_send_fastpair_info_to_slave();\n#endif\n\n  // update the BLE ADV as account key has been added\n  if (!app_is_in_fastpairing_mode()) {\n    // restart the BLE adv if it's retro-active pairing\n    app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\nvoid app_gfps_set_battery_datatype(GFPS_BATTERY_DATA_TYPE_E batteryDataType) {\n  if (app_gfps_env.batteryDataType != batteryDataType) {\n    app_gfps_env.batteryDataType = batteryDataType;\n    app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n  }\n}\n\nGFPS_BATTERY_DATA_TYPE_E app_gfps_get_battery_datatype(void) {\n  return app_gfps_env.batteryDataType;\n}\n\nvoid app_gfps_enable_battery_info(bool isEnable) {\n  app_gfps_env.isBatteryInfoIncluded = isEnable;\n  app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n}\n\nvoid app_gfps_get_battery_levels(uint8_t *pCount, uint8_t *pBatteryLevel) {\n  *pCount = 0;\n  if (app_gfps_env.get_battery_info_handler) {\n    app_gfps_env.get_battery_info_handler(pCount, pBatteryLevel);\n  }\n}\n\nvoid app_gfps_update_random_salt(void) {\n  app_gfps_env.advRandSalt = (uint8_t)rand();\n}\n\nuint8_t app_gfps_generate_accountkey_data(uint8_t *outputData) {\n  uint8_t keyCount = nv_record_fp_account_key_count();\n  if (0 == keyCount) {\n    outputData[0] = 0;\n    outputData[1] = 0;\n    return 2;\n  }\n\n  uint8_t accountKeyData[32];\n  accountKeyData[0] = 0;\n\n  uint8_t accountKeyDataLen = 2;\n  uint8_t hash256Result[32];\n\n  uint8_t sizeOfFilter = (((uint8_t)((float)1.2 * keyCount)) + 3);\n  uint8_t FArray[2 * FP_ACCOUNT_KEY_RECORD_NUM + 3];\n  memset(FArray, 0, sizeof(FArray));\n\n#if GFPS_ACCOUNTKEY_SALT_TYPE == USE_BLE_ADDR_AS_SALT\n  uint8_t VArray[FP_ACCOUNT_KEY_SIZE + 6 + 4];\n#else\n  uint8_t VArray[FP_ACCOUNT_KEY_SIZE + 1 + 4];\n  uint8_t randomSalt;\n  if (GFPS_INITIAL_ADV_RAND_SALT != app_gfps_env.advRandSalt) {\n    randomSalt = app_gfps_env.advRandSalt;\n  } else {\n    randomSalt = (uint8_t)rand();\n  }\n#endif\n\n  uint8_t index;\n\n  uint8_t batteryFollowingData[1 + GFPS_BATTERY_VALUE_MAX_COUNT];\n  uint8_t batteryFollowingDataLen = 0;\n\n  for (uint8_t keyIndex = 0; keyIndex < keyCount; keyIndex++) {\n    uint8_t offsetOfVArray;\n\n    nv_record_fp_account_key_get_by_index(keyIndex, VArray);\n\n#if GFPS_ACCOUNTKEY_SALT_TYPE == USE_BLE_ADDR_AS_SALT\n    uint8_t *currentBleAddr = appm_get_current_ble_addr();\n    for (index = 0; index < 6; index++) {\n      VArray[FP_ACCOUNT_KEY_SIZE + index] = currentBleAddr[5 - index];\n    }\n    offsetOfVArray = FP_ACCOUNT_KEY_SIZE + 6;\n#else\n    VArray[FP_ACCOUNT_KEY_SIZE] = randomSalt;\n    offsetOfVArray = FP_ACCOUNT_KEY_SIZE + 1;\n#endif\n\n    if (app_gfps_env.isBatteryInfoIncluded) {\n      uint8_t batteryLevelCount = 0;\n      uint8_t batteryLevel[GFPS_BATTERY_VALUE_MAX_COUNT];\n      app_gfps_get_battery_levels(&batteryLevelCount, batteryLevel);\n\n      uint8_t startOffsetOfBatteryInfo = offsetOfVArray;\n\n      VArray[offsetOfVArray++] =\n          app_gfps_env.batteryDataType | (batteryLevelCount << 4);\n      for (index = 0; index < batteryLevelCount; index++) {\n        VArray[offsetOfVArray++] = batteryLevel[index];\n      }\n\n      batteryFollowingDataLen = offsetOfVArray - startOffsetOfBatteryInfo;\n      memcpy(batteryFollowingData, &VArray[startOffsetOfBatteryInfo],\n             batteryFollowingDataLen);\n    }\n\n    TRACE(0, \"To hash256 on:\");\n    DUMP8(\"%02x \", VArray, offsetOfVArray);\n\n    gfps_SHA256_hash(VArray, offsetOfVArray, hash256Result);\n\n    // K = Xi % (s * 8)\n    // F[K/8] = F[K/8] | (1 << (K % 8))\n    uint32_t pX[8];\n    for (index = 0; index < 8; index++) {\n      pX[index] = (((uint32_t)(hash256Result[index * 4])) << 24) |\n                  (((uint32_t)(hash256Result[index * 4 + 1])) << 16) |\n                  (((uint32_t)(hash256Result[index * 4 + 2])) << 8) |\n                  (((uint32_t)(hash256Result[index * 4 + 3])) << 0);\n    }\n\n    for (index = 0; index < 8; index++) {\n      uint32_t K = pX[index] % (sizeOfFilter * 8);\n      FArray[K / 8] = FArray[K / 8] | (1 << (K % 8));\n    }\n  }\n\n  memcpy(&accountKeyData[2], FArray, sizeOfFilter);\n\n  accountKeyDataLen += sizeOfFilter;\n\n  accountKeyData[1] = (sizeOfFilter << 4);\n\n#if GFPS_ACCOUNTKEY_SALT_TYPE == USE_RANDOM_NUM_AS_SALT\n  accountKeyData[2 + sizeOfFilter] = 0x11;\n  accountKeyData[2 + sizeOfFilter + 1] = randomSalt;\n\n  accountKeyDataLen += 2;\n#endif\n\n  TRACE(1, \"Generated accountkey data len:%d\", accountKeyDataLen);\n  DUMP8(\"%02x \", accountKeyData, accountKeyDataLen);\n\n  memcpy(outputData, accountKeyData, accountKeyDataLen);\n\n  memcpy(outputData + accountKeyDataLen, batteryFollowingData,\n         batteryFollowingDataLen);\n\n  return (accountKeyDataLen + batteryFollowingDataLen);\n}\n\nstatic void gfpsp_update_connection_state(uint8_t conidx) {\n  if (BLE_INVALID_CONNECTION_INDEX == app_gfps_env.connectionIndex) {\n    app_gfps_connected_evt_handler(conidx);\n  }\n}\n\nstatic int app_gfpsp_key_based_pairing_ntf_handler(\n    ke_msg_id_t const msgid, struct app_gfps_key_based_notif_config_t *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  app_gfps_env.isKeyBasedPairingNotificationEnabled =\n      param->isNotificationEnabled;\n  if (app_gfps_env.isKeyBasedPairingNotificationEnabled) {\n    uint8_t conidx = KE_IDX_GET(src_id);\n    gfpsp_update_connection_state(conidx);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_gfpsp_pass_key_ntf_handler(\n    ke_msg_id_t const msgid, struct app_gfps_pass_key_notif_config_t *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  app_gfps_env.isPassKeyNotificationEnabled = param->isNotificationEnabled;\n  if (app_gfps_env.isPassKeyNotificationEnabled) {\n    uint8_t conidx = KE_IDX_GET(src_id);\n    gfpsp_update_connection_state(conidx);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_gfps_msg_handler_list[] = {\n    {GFPSP_VALUE_REQ_IND, (ke_msg_func_t)gfpsp_value_req_ind_handler},\n    {GFPSP_KEY_BASED_PAIRING_WRITE_IND,\n     (ke_msg_func_t)app_gfps_write_key_based_pairing_ind_hander},\n    {GFPSP_KEY_PASS_KEY_WRITE_IND,\n     (ke_msg_func_t)app_gfps_write_passkey_ind_hander},\n    {GFPSP_KEY_ACCOUNT_KEY_WRITE_IND,\n     (ke_msg_func_t)app_gfps_write_accountkey_ind_hander},\n    {GFPSP_KEY_BASED_PAIRING_NTF_CFG,\n     (ke_msg_func_t)app_gfpsp_key_based_pairing_ntf_handler},\n    {GFPSP_KEY_PASS_KEY_NTF_CFG, (ke_msg_func_t)app_gfpsp_pass_key_ntf_handler},\n    {GFPSP_NAME_WRITE_IND, (ke_msg_func_t)app_gfps_write_name_ind_hander},\n\n};\n\nconst struct ke_state_handler app_gfps_table_handler = {\n    &app_gfps_msg_handler_list[0],\n    (sizeof(app_gfps_msg_handler_list) / sizeof(struct ke_msg_handler)),\n};\n\nstatic uint8_t is_in_fastpairing_mode = false;\n\nbool app_is_in_fastpairing_mode(void) { return is_in_fastpairing_mode; }\n\nvoid app_set_in_fastpairing_mode_flag(bool isEnabled) {\n  is_in_fastpairing_mode = isEnabled;\n  TRACE(1, \"[FP]mode is set to %d\", is_in_fastpairing_mode);\n}\n\nvoid app_exit_fastpairing_mode(void) {\n\n  if (app_is_in_fastpairing_mode()) {\n    TRACE(0, \"[FP]exit fast pair mode\");\n    app_stop_10_second_timer(APP_FASTPAIR_LASTING_TIMER_ID);\n\n    app_set_in_fastpairing_mode_flag(false);\n\n    // reset ble adv\n    app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n  }\n}\n\nvoid app_fast_pairing_timeout_timehandler(void) { app_exit_fastpairing_mode(); }\n\nvoid app_enter_fastpairing_mode(void) {\n  TRACE(0, \"[FP] enter fast pair mode\");\n  app_set_in_fastpairing_mode_flag(true);\n\n  app_ble_start_connectable_adv(BLE_FAST_ADVERTISING_INTERVAL);\n  app_start_10_second_timer(APP_FASTPAIR_LASTING_TIMER_ID);\n}\n\n/*---------------------------------------------------------------------------\n *            gfps_ble_data_fill_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    BLE advertisement and scan response data fill handler for Google fast pair\n *\n * Parameters:\n *    param - pointer of BLE parameter to be configure\n *\n * Return:\n *    void\n */\nstatic void gfps_ble_data_fill_handler(void *param) {\n  TRACE(1, \"[%s]+++\", __func__);\n  ASSERT(param, \"invalid param\");\n\n  bool adv_enable = false;\n  BLE_ADV_PARAM_T *advInfo = (BLE_ADV_PARAM_T *)param;\n  TRACE(2, \"adv data offset:%d, scan response data offset:%d\",\n        advInfo->advDataLen, advInfo->scanRspDataLen);\n\n#ifdef IBRT\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  TRACE(1, \"current role:%s\", app_tws_ibrt_role2str(p_ibrt_ctrl->current_role));\n\n  if (IBRT_SLAVE != p_ibrt_ctrl->current_role && p_ibrt_ctrl->init_done)\n#endif\n  {\n    TRACE(0, \"GFPS data will add in adv data\");\n\n    adv_enable = true;\n    if (app_is_in_fastpairing_mode()) {\n      TRACE(0, \"fast pair mode\");\n      advInfo->advInterval = BLE_FASTPAIR_FAST_ADVERTISING_INTERVAL;\n\n      advInfo->advData[advInfo->advDataLen++] = FP_SERVICE_LEN;\n      advInfo->advData[advInfo->advDataLen++] = BLE_ADV_SVC_FLAG;\n      advInfo->advData[advInfo->advDataLen++] = (FP_SERVICE_UUID >> 8) & 0xFF;\n      advInfo->advData[advInfo->advDataLen++] = (FP_SERVICE_UUID >> 0) & 0xFF;\n      uint32_t modelId;\n#ifndef IS_USE_CUSTOM_FP_INFO\n      modelId = FP_DEVICE_MODEL_ID;\n#else\n      modelId = app_bt_get_model_id();\n#endif\n      advInfo->advData[advInfo->advDataLen++] = (modelId >> 16) & 0xFF;\n      advInfo->advData[advInfo->advDataLen++] = (modelId >> 8) & 0xFF;\n      advInfo->advData[advInfo->advDataLen++] = (modelId >> 0) & 0xFF;\n\n#ifndef IS_USE_CUSTOM_FP_INFO\n      memcpy(&advInfo->advData[advInfo->advDataLen], APP_GFPS_ADV_POWER_UUID,\n             APP_GFPS_ADV_POWER_UUID_LEN);\n#else\n      memcpy(&advInfo->advData[advInfo->advDataLen], app_gfps_power_uuid,\n             APP_GFPS_ADV_POWER_UUID_LEN);\n#endif\n      advInfo->advDataLen += APP_GFPS_ADV_POWER_UUID_LEN;\n    } else {\n      TRACE(0, \"not in fast pair mode\");\n      advInfo->advInterval = BLE_FASTPAIR_NORMAL_ADVERTISING_INTERVAL;\n\n#if BLE_APP_GFPS_VER == FAST_PAIR_REV_2_0\n      uint8_t serviceData[32];\n\n      // service UUID part\n      serviceData[0] = 0x03; // original length of service length\n      serviceData[1] = BLE_ADV_SVC_FLAG;\n      serviceData[2] = (FP_SERVICE_UUID >> 8) & 0xFF;\n      ;\n      serviceData[3] = (FP_SERVICE_UUID >> 0) & 0xFF;\n\n      // account key part\n      uint8_t dataLen = app_gfps_generate_accountkey_data(&serviceData[4]);\n      serviceData[0] += dataLen;\n      memcpy(&advInfo->advData[advInfo->advDataLen], serviceData,\n             serviceData[0] + 1);\n      advInfo->advDataLen += (serviceData[0] + 1);\n\n      // power part\n      memcpy(&advInfo->advData[advInfo->advDataLen], APP_GFPS_ADV_POWER_UUID,\n             APP_GFPS_ADV_POWER_UUID_LEN);\n      advInfo->advDataLen += APP_GFPS_ADV_POWER_UUID_LEN;\n#endif\n    }\n  }\n\n  app_ble_data_fill_enable(USER_GFPS, adv_enable);\n  TRACE(1, \"[%s]---\", __func__);\n}\n\nvoid gfps_info_prepare_handler(uint8_t *buf, uint16_t *length) {\n  *length = sizeof(NV_FP_ACCOUNT_KEY_RECORD_T);\n\n  NV_FP_ACCOUNT_KEY_RECORD_T *info = nv_record_get_fp_data_structure_info();\n  memcpy(buf, info, *length);\n}\n\nvoid gfps_info_received_handler(uint8_t *buf, uint16_t length) {\n  NV_FP_ACCOUNT_KEY_RECORD_T *pInfo = (NV_FP_ACCOUNT_KEY_RECORD_T *)buf;\n  nv_record_fp_update_all((uint8_t *)pInfo);\n}\n\nvoid app_gfps_tws_sync_init(void) {\n#ifdef IBRT\n  // TODO: freddie move to isolated ota file\n  TWS_SYNC_USER_T userGfps = {\n      gfps_info_prepare_handler, gfps_info_received_handler, NULL, NULL, NULL,\n  };\n\n  app_tws_if_register_sync_user(TWS_SYNC_USER_GFPS_INFO, &userGfps);\n#endif\n}\nstatic FastPairInfo g_fast_pair_info;\nuint32_t app_bt_get_model_id(void) { return g_fast_pair_info.model_id; }\n\nextern uint32_t Get_ModelId();\nvoid app_bt_get_fast_pair_info(void) {\n  g_fast_pair_info.model_id = Get_ModelId();\n  switch (g_fast_pair_info.model_id) {\n  // default model id(bes moddel id)\n  case FP_DEVICE_MODEL_ID: {\n    memcpy(g_fast_pair_info.public_anti_spoofing_key,\n           bes_demo_Public_anti_spoofing_key,\n           sizeof(bes_demo_Public_anti_spoofing_key));\n    memcpy(g_fast_pair_info.private_anti_spoofing_key,\n           bes_demo_private_anti_spoofing_key,\n           sizeof(bes_demo_private_anti_spoofing_key));\n  } break;\n\n    // customer add customer model id here;\n\n  default: {\n    g_fast_pair_info.model_id = FP_DEVICE_MODEL_ID;\n    memcpy(g_fast_pair_info.public_anti_spoofing_key,\n           bes_demo_Public_anti_spoofing_key,\n           sizeof(bes_demo_Public_anti_spoofing_key));\n    memcpy(g_fast_pair_info.private_anti_spoofing_key,\n           bes_demo_private_anti_spoofing_key,\n           sizeof(bes_demo_private_anti_spoofing_key));\n  }\n  }\n}\n\nvoid app_bt_set_fast_pair_info(FastPairInfo fast_pair_info) {\n  memcpy(&g_fast_pair_info, &fast_pair_info, sizeof(fast_pair_info));\n}\n\nvoid app_gfps_set_tx_power_in_adv(char rssi) {\n  app_gfps_power_uuid[APP_GFPS_ADV_POWER_UUID_LEN - 1] = rssi;\n}\n\nvoid app_bt_set_fast_pair_tx_power(int8_t tx_power) {\n  app_gfps_set_tx_power_in_adv(tx_power);\n}\n\nconst uint8_t *app_bt_get_fast_pair_public_key(void) {\n  return g_fast_pair_info.public_anti_spoofing_key;\n}\n\nconst uint8_t *app_bt_get_fast_pair_private_key(void) {\n  return g_fast_pair_info.private_anti_spoofing_key;\n}\n\n#endif // BLE_APP_GFPS\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_gfps/app_gfps.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef APP_GFPS_H_\n#define APP_GFPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n *\n * @brief Device Information Application Module Entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW Configuration\n\n#if (BLE_APP_GFPS)\n\n#include \n#ifndef BLE_BD_ADDR_T\n///BD Address structure\ntypedef struct\n{\n    ///6-byte array address value\n    uint8_t  addr[6];\n} bd_addr_t;\n#endif\n/*\n * DEFINES\n ****************************************************************************************\n */\n// enable IS_USE_CUSTOM_FP_INFO if wanna use custom fastpair tx power, model id and anti-proof key\n#define IS_USE_CUSTOM_FP_INFOx\n\n/// Manufacturer Name Value\n#define APP_GFPS_MANUFACTURER_NAME       (\"RivieraWaves SAS\")\n#define APP_GFPS_MANUFACTURER_NAME_LEN   (16)\n\n/// Model Number String Value\n#define APP_GFPS_MODEL_NB_STR            (\"RW-BLE-1.0\")\n#define APP_GFPS_MODEL_NB_STR_LEN        (10)\n\n/// Serial Number\n#define APP_GFPS_SERIAL_NB_STR           (\"1.0.0.0-LE\")\n#define APP_GFPS_SERIAL_NB_STR_LEN       (10)\n\n/// Firmware Revision\n#define APP_GFPS_FIRM_REV_STR            (\"6.1.2\")\n#define APP_GFPS_FIRM_REV_STR_LEN        (5)\n\n/// System ID Value - LSB -> MSB\n#define APP_GFPS_SYSTEM_ID               (\"\\x12\\x34\\x56\\xFF\\xFE\\x9A\\xBC\\xDE\")\n#define APP_GFPS_SYSTEM_ID_LEN           (8)\n\n/// Hardware Revision String\n#define APP_GFPS_HARD_REV_STR           (\"1.0.0\")\n#define APP_GFPS_HARD_REV_STR_LEN       (5)\n\n/// Software Revision String\n#define APP_GFPS_SW_REV_STR              (\"6.3.0\")\n#define APP_GFPS_SW_REV_STR_LEN          (5)\n\n/// IEEE\n#define APP_GFPS_IEEE                    (\"\\xFF\\xEE\\xDD\\xCC\\xBB\\xAA\")\n#define APP_GFPS_IEEE_LEN                (6)\n\n/**\n * PNP ID Value - LSB -> MSB\n *      Vendor ID Source : 0x02 (USB Implementer’s Forum assigned Vendor ID value)\n *      Vendor ID : 0x045E      (Microsoft Corp)\n *      Product ID : 0x0040\n *      Product Version : 0x0300\n */\n#define APP_GFPS_PNP_ID               (\"\\x02\\x5E\\x04\\x40\\x00\\x00\\x03\")\n#define APP_GFPS_PNP_ID_LEN           (7)\n\n#define APP_GFPS_ADV_POWER_UUID             \"\\x02\\x0a\\xf5\"\n#define APP_GFPS_ADV_POWER_UUID_LEN         (3)\n#define APP_GFPS_ADV_APPEARANCE_UUID        \"\\x03\\x19\\xda\\x96\"\n#define APP_GFPS_ADV_APPEARANCE_UUID_LEN    (4)\n#define APP_GFPS_ADV_MANU_SPE_UUID_TEST     \"\\x07\\xFF\\xe0\\x00\\x01\\x5B\\x32\\x01\"\n#define APP_GFPS_ADV_MANU_SPE_UUID_LEN      (8)\n\n#if (BLE_APP_HID)\n#define APP_GFPS_FEATURES             (GFPSP_MANUFACTURER_NAME_CHAR_SUP |\\\n                                      GFPSP_MODEL_NB_STR_CHAR_SUP      |\\\n                                      GFPSP_SYSTEM_ID_CHAR_SUP         |\\\n                                      GFPSP_PNP_ID_CHAR_SUP)\n#else\n#define APP_GFPS_FEATURES             (GFPSP_ALL_FEAT_SUP)\n#endif //(BLE_APP_HID)\ntypedef void (*gfps_enter_pairing_mode)(void);\ntypedef uint8_t (*gfps_bt_io_cap_set)(uint8_t mode);\ntypedef uint8_t (*gfps_bt_io_authrequirements_set)(uint8_t authrequirements);\n\ntypedef void (*gfps_get_battery_info_handler)(uint8_t* batteryValueCount,\n    uint8_t* batteryValue);\n\ntypedef enum\n{\n    HIDE_SUBSEQUENT_INDICATION = 2,\n    SHOW_UI_INDICATION = 3,\n    HIDE_UI_INDICATION = 4\n} GFPS_BATTERY_DATA_TYPE_E;\n\ntypedef enum\n{\n    BATTERY_NOT_CHARGING = 0,\n    BATTERY_CHARGING = 1,    \n} GFPS_BATTERY_STATUS_E;\n\n#define GFPS_BATTERY_VALUE_MAX_COUNT    3\n\nstruct app_gfps_env_tag\n{\n    uint8_t connectionIndex;\n    uint8_t isKeyBasedPairingNotificationEnabled;\n    uint8_t isPassKeyNotificationEnabled;\n    uint8_t isInitialPairing;\n    bd_addr_t seeker_bt_addr;\n    bd_addr_t local_le_addr;\n    bd_addr_t local_bt_addr;\n    uint8_t keybase_pair_key[16];\n    uint8_t aesKeyFromECDH[16];\n    gfps_enter_pairing_mode enter_pairing_mode;\n    gfps_bt_io_cap_set     bt_set_iocap;\n    gfps_bt_io_authrequirements_set bt_set_authrequirements;\n    uint8_t bt_iocap;\n    uint8_t bt_authrequirements;\n    uint8_t pendingLastResponse[16];\n    uint8_t isLastResponsePending;\n    uint8_t isWaitingForFpToConnect;\n    uint8_t isPendingForWritingNameReq;\t\n    uint8_t isBatteryInfoIncluded;\n    gfps_get_battery_info_handler get_battery_info_handler;  \n    GFPS_BATTERY_DATA_TYPE_E batteryDataType;\n    uint8_t advRandSalt;\n    uint8_t isInFastPairing;\n};\n\ntypedef struct {\n  uint32_t model_id;\n  uint8_t public_anti_spoofing_key[64];\n  uint8_t private_anti_spoofing_key[32];\n} FastPairInfo;\n\n/*\n * GLOBAL VARIABLES DECLARATION\n ****************************************************************************************\n */\n\n/// Table of message handlers\nextern const struct ke_state_handler app_gfps_table_handler;\n\n/*\n * GLOBAL FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/**\n ****************************************************************************************\n * @brief Initialize Device Information Service Application\n ****************************************************************************************\n */\nvoid app_gfps_init(void);\n\n/**\n ****************************************************************************************\n * @brief Add a Device Information Service instance in the DB\n ****************************************************************************************\n */\nvoid app_gfps_add_gfps(void);\n\n/**\n ****************************************************************************************\n * @brief Enable the Device Information Service\n ****************************************************************************************\n */\nvoid app_gfps_enable_prf(uint16_t conhdl);\n\nvoid app_gfps_connected_evt_handler(uint8_t conidx);\nvoid app_gfps_disconnected_evt_handler(uint8_t conidx);\n\nvoid app_gfps_set_bt_access_mode(gfps_enter_pairing_mode cb);\nvoid app_gfps_set_io_cap(gfps_bt_io_cap_set cb);\nvoid app_gfps_set_authrequirements(gfps_bt_io_authrequirements_set cb);\n\nvoid app_gfps_generate_accountkey_filter(uint8_t* accountKeyFilter, uint8_t* filterSize);\n\nuint8_t app_gfps_generate_accountkey_data(uint8_t* outputData);\n\nvoid app_gfps_set_battery_info_acquire_handler(gfps_get_battery_info_handler cb);\nvoid app_gfps_set_battery_datatype(GFPS_BATTERY_DATA_TYPE_E batteryDataType);\nGFPS_BATTERY_DATA_TYPE_E app_gfps_get_battery_datatype(void);\n\nvoid app_enter_fastpairing_mode(void);\n\nvoid app_exit_fastpairing_mode(void);\n\nbool app_is_in_fastpairing_mode(void);\n\nvoid app_set_in_fastpairing_mode_flag(bool isEnabled);\n\nuint8_t* app_gfps_get_last_response(void);\n\nvoid app_gfps_enter_connectable_mode_req_handler(uint8_t* response);\n\nbool app_gfps_is_last_response_pending(void);\n\nvoid app_gfps_enable_battery_info(bool isEnable);\n\nvoid app_fast_pair_timeout_handler(void);\n\nbool app_is_mobile_connected_via_fastpair(void);\n\nvoid app_gfps_get_battery_levels(uint8_t* pCount, uint8_t* pBatteryLevel);\n\nvoid app_gfps_update_random_salt(void);\n\nvoid app_gfps_tws_sync_init(void);\n\nvoid app_bt_set_fast_pair_info(FastPairInfo fast_pair_info);\n\nuint32_t app_bt_get_model_id(void);\n\nconst uint8_t* app_bt_get_fast_pair_public_key(void);\n\nconst uint8_t* app_bt_get_fast_pair_private_key(void);\n\nvoid app_bt_get_fast_pair_info(void);\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif //BLE_APP_GFPS\n\n/// @} APP\n\n#endif //APP_GFPS_H_\n"
  },
  {
    "path": "services/ble_app/app_hid/app_hid.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#include \n#include \n\n#if (BLE_APP_HID)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"app.h\"        // Application Definitions\n#include \"app_hid.h\"    // HID Application Module Definitions\n#include \"app_sec.h\"    // Application Security Module API\n#include \"app_task.h\"   // Application task definitions\n#include \"arch.h\"       // Platform Definitions\n#include \"hogpd_task.h\" // HID Over GATT Profile Device Role Functions\n#include \"ke_timer.h\"   // kernel timer\n#include \"prf.h\"\n#include \"prf_types.h\" // Profile common types Definition\n\n#if (NVDS_SUPPORT)\n#include \"nvds.h\" // NVDS Definitions\n#endif            //(NVDS_SUPPORT)\n\n#if (DISPLAY_SUPPORT)\n#include \"app_display.h\" // Application Display Module\n#endif                   //(DISPLAY_SUPPORT)\n\n#include \"co_utils.h\" // Common functions\n\n#if (KE_PROFILING)\n#include \"ke_mem.h\"\n#endif //(KE_PROFILING)\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Length of the HID Mouse Report\n#define APP_HID_MOUSE_REPORT_LEN (6)\n/// Length of the Report Descriptor for an HID Mouse\n#define APP_HID_MOUSE_REPORT_MAP_LEN (sizeof(app_hid_mouse_report_map))\n\n/// Duration before connection update procedure if no report received (mouse is\n/// silent) - 20s\n#define APP_HID_SILENCE_DURATION_1 (2000)\n/// Duration before disconnection if no report is received after connection\n/// update - 60s\n#define APP_HID_SILENCE_DURATION_2 (6000)\n\n/// Number of reports that can be sent\n#define APP_HID_NB_SEND_REPORT (10)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// States of the Application HID Module\nenum app_hid_states {\n  /// Module is disabled (Service not added in DB)\n  APP_HID_DISABLED,\n  /// Module is idle (Service added but profile not enabled)\n  APP_HID_IDLE,\n  /// Module is enabled (Device is connected and the profile is enabled)\n  APP_HID_ENABLED,\n  /// The application can send reports\n  APP_HID_READY,\n  /// Waiting for a report\n  APP_HID_WAIT_REP,\n\n  APP_HID_STATE_MAX,\n};\n\n/*\n * LOCAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// HID Application Module Environment Structure\nstatic struct app_hid_env_tag app_hid_env;\n\n/// HID Mouse Report Descriptor\nstatic const uint8_t app_hid_mouse_report_map[] = {\n    /**\n     *  --------------------------------------------------------------------------\n     *  Bit      |   7   |   6   |   5   |   4   |   3   |   2   |   1   |   0 |\n     *  --------------------------------------------------------------------------\n     *  Byte 0   |               Not Used                | Middle| Right | Left\n     * |\n     *  --------------------------------------------------------------------------\n     *  Byte 1   |                     X Axis Relative Movement |\n     *  --------------------------------------------------------------------------\n     *  Byte 2   |                     Y Axis Relative Movement |\n     *  --------------------------------------------------------------------------\n     *  Byte 3   |                     Wheel Relative Movement |\n     *  --------------------------------------------------------------------------\n     */\n\n    0x05,\n    0x01,       /// USAGE PAGE (Generic Desktop)\n    0x09, 0x02, /// USAGE (Mouse)\n    0xA1, 0x01, /// COLLECTION (Application)\n    0x85, 0x01, /// REPORT ID (1) - MANDATORY\n    0x09, 0x01, ///     USAGE (Pointer)\n    0xA1, 0x00, ///     COLLECTION (Physical)\n\n    /**\n     * ----------------------------------------------------------------------------\n     * BUTTONS\n     * ----------------------------------------------------------------------------\n     */\n    0x05, 0x09, ///         USAGE PAGE (Buttons)\n    0x19, 0x01, ///         USAGE MINIMUM (1)\n    0x29, 0x08, ///         USAGE MAXIMUM (8)\n    0x15, 0x00, ///         LOGICAL MINIMUM (0)\n    0x25, 0x01, ///         LOGICAL MAXIMUM (1)\n    0x75, 0x01, ///         REPORT SIZE (1)\n    0x95, 0x08, ///         REPORT COUNT (8)\n    0x81, 0x02, ///         INPUT (Data, Variable, Absolute)\n\n    /**\n     * ----------------------------------------------------------------------------\n     * MOVEMENT DATA\n     * ----------------------------------------------------------------------------\n     */\n    0x05, 0x01,       ///         USAGE PAGE (Generic Desktop)\n    0x16, 0x08, 0xFF, ///       LOGICAL MINIMUM (-255)\n    0x26, 0xFF, 0x00, ///       LOGICAL MAXIMUM (255)\n    0x75, 0x10,       ///         REPORT SIZE (16)\n    0x95, 0x02,       ///         REPORT COUNT (2)\n    0x09, 0x30,       ///         USAGE (X)\n    0x09, 0x31,       ///         USAGE (Y)\n    0x81, 0x06,       ///         INPUT (Data, Variable, Relative)\n\n    0x15, 0x81, ///         LOGICAL MINIMUM (-127)\n    0x25, 0x7F, ///         LOGICAL MAXIMUM (127)\n    0x75, 0x08, ///         REPORT SIZE (8)\n    0x95, 0x01, ///         REPORT COUNT (1)\n    0x09, 0x38, ///         USAGE (Wheel)\n    0x81, 0x06, ///         INPUT (Data, Variable, Relative)\n\n    0xC0, ///     END COLLECTION (Physical)\n    0xC0  /// END COLLECTION (Application)\n};\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nvoid app_hid_init(void) {\n#if (NVDS_SUPPORT)\n  // Length of the mouse timeout value\n  uint8_t length = NVDS_LEN_MOUSE_TIMEOUT;\n#endif\n\n  // Reset the environment\n  memset(&app_hid_env, 0, sizeof(app_hid_env));\n\n  app_hid_env.nb_report = APP_HID_NB_SEND_REPORT;\n\n  /*\n   * Get the timeout value from the NVDS - This value is used each time a report\n   * is received from the PS2 driver, store it in the environment.\n   */\n#if (NVDS_SUPPORT)\n  if (nvds_get(NVDS_TAG_MOUSE_TIMEOUT, &length,\n               (uint8_t *)&app_hid_env.timeout) != NVDS_OK)\n#endif\n  {\n    app_hid_env.timeout = APP_HID_SILENCE_DURATION_1;\n  }\n}\n\n/*\n ****************************************************************************************\n * @brief Function called when get GAP manager command complete events.\n *\n ****************************************************************************************\n */\nvoid app_hid_start_mouse(void) {\n/*-----------------------------------------------------------------------------------\n * CONFIGURE THE MOUSE\n *----------------------------------------------------------------------------------*/\n#if (PS2_SUPPORT)\n  // Default mouse rate (200 report/s)\n  uint8_t rate = 200;\n\n#if (NVDS_SUPPORT)\n  uint8_t length = NVDS_LEN_MOUSE_SAMPLE_RATE;\n\n  // Get sample rate from NVDS\n  if (nvds_get(NVDS_TAG_MOUSE_SAMPLE_RATE, &length, &rate) == NVDS_OK) {\n    // Check if value is among supported set\n    if ((rate != 10) && (rate != 20) && (rate != 40) && (rate != 60) &&\n        (rate != 80) && (rate != 100) && (rate != 200)) {\n      // Default value\n      rate = 200;\n    }\n  }\n#endif //(NVDS_SUPPORT)\n\n  // Start PS2_mouse\n  ps2_mouse_start(rate, &app_hid_send_mouse_report);\n#endif //(PS2_SUPPORT)\n}\n\nvoid app_hid_add_hids(void) {\n  struct hogpd_db_cfg *db_cfg;\n  // Prepare the HOGPD_CREATE_DB_REQ message\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, sizeof(struct hogpd_db_cfg));\n\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_HOGPD;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Set parameters\n  db_cfg = (struct hogpd_db_cfg *)req->param;\n\n  // Only one HIDS instance is useful\n  db_cfg->hids_nb = 1;\n\n  // The device is a mouse\n  db_cfg->cfg[0].svc_features = HOGPD_CFG_MOUSE;\n\n  // Only one Report Characteristic is requested\n  db_cfg->cfg[0].report_nb = 1;\n  /// db_cfg->cfg[0].report_id    = 1;\n  db_cfg->cfg[0].report_id[0] = 1;\n\n  // The report is an input report\n  db_cfg->cfg[0].report_char_cfg[0] = HOGPD_CFG_REPORT_IN;\n\n  // HID Information\n  db_cfg->cfg[0].hid_info.bcdHID = 0x0111; // HID Version 1.11\n  db_cfg->cfg[0].hid_info.bCountryCode = 0x00;\n  db_cfg->cfg[0].hid_info.flags =\n      HIDS_REMOTE_WAKE_CAPABLE | HIDS_NORM_CONNECTABLE;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\n/*\n ****************************************************************************************\n * @brief Function called when get connection complete event from the GAP\n *\n ****************************************************************************************\n */\nvoid app_hid_enable_prf(uint8_t conidx) {\n  // Requested connection parameters\n  struct gapc_conn_param conn_param;\n\n  uint16_t ntf_cfg;\n\n  // Store the connection handle\n  app_hid_env.conidx = conidx;\n\n  // Allocate the message\n  struct hogpd_enable_req *req =\n      KE_MSG_ALLOC(HOGPD_ENABLE_REQ,\n                   KE_BUILD_ID(prf_get_task_from_id(TASK_ID_HOGPD), conidx),\n                   TASK_APP, hogpd_enable_req);\n\n  // Fill in the parameter structure\n  req->conidx = conidx;\n  // Notifications are disabled\n  ntf_cfg = 0;\n\n  // Go to Enabled state\n  app_hid_env.state = APP_HID_ENABLED;\n\n#if (NVDS_SUPPORT)\n  // If first connection with the peer device\n  if (app_sec_get_bond_status()) {\n    // Length of the value read in NVDS\n    uint8_t length = NVDS_LEN_MOUSE_NTF_CFG;\n    // Notification configuration\n\n    if (nvds_get(NVDS_TAG_MOUSE_NTF_CFG, &length, (uint8_t *)&ntf_cfg) !=\n        NVDS_OK) {\n      // If we are bonded this information should be present in the NVDS\n      ASSERT_ERR(0);\n    }\n\n    // CCC enable notification\n    if ((ntf_cfg & HOGPD_CFG_REPORT_NTF_EN) != 0) {\n      // The device is ready to send reports to the peer device\n      app_hid_env.state = APP_HID_READY;\n      app_hid_env.nb_report = APP_HID_NB_SEND_REPORT;\n\n      // Restart the mouse timeout timer if needed\n      if (app_hid_env.timeout != 0) {\n        ke_timer_set(APP_HID_MOUSE_TIMEOUT_TIMER, TASK_APP,\n                     (uint16_t)(app_hid_env.timeout));\n        app_hid_env.timer_enabled = true;\n      }\n    }\n  }\n#endif //(NVDS_SUPPORT)\n\n  req->ntf_cfg[conidx] = ntf_cfg;\n\n  /*\n   * Requested connection interval: 10ms\n   * Latency: 25\n   * Supervision Timeout: 2s\n   */\n  conn_param.intv_min = 8;\n  conn_param.intv_max = 8;\n  conn_param.latency = 25;\n  conn_param.time_out = 200;\n\n  appm_update_param(conidx, &conn_param);\n\n  // Send the message\n  ke_msg_send(req);\n}\n\n/*\n ****************************************************************************************\n * @brief Function called from PS2 driver\n *\n ****************************************************************************************\n */\nvoid app_hid_send_mouse_report(struct ps2_mouse_msg report) {\n\n  //    app_display_update_hid_value_screen(report.b, report.x, report.y,\n  //    report.w);\n\n  switch (app_hid_env.state) {\n  case (APP_HID_READY): {\n    // Check if the report can be sent\n    if (app_hid_env.nb_report) {\n      // Buffer used to create the Report\n      uint8_t report_buff[APP_HID_MOUSE_REPORT_LEN];\n      // X, Y and wheel relative movements\n      int16_t x;\n      int16_t y;\n\n#if (DISPLAY_SUPPORT)\n// Display all the received information on the LCD screen\n// app_display_update_hid_value_screen(report.b, report.x, report.y, report.w);\n#endif //(DISPLAY_SUPPORT)\n\n      // Clean the report buffer\n      memset(&report_buff[0], 0, APP_HID_MOUSE_REPORT_LEN);\n\n      // Set the button states\n      report_buff[0] = (report.b & 0x07);\n\n      // If X value is negative\n      if (report.b & 0x10) {\n        report.x = ~report.x;\n        report.x += 1;\n        x = (int16_t)report.x;\n        x *= (-1);\n      } else {\n        x = (int16_t)report.x;\n      }\n\n      // If Y value is negative\n      if (report.b & 0x20) {\n        report.y = ~report.y;\n        report.y += 1;\n        y = (int16_t)report.y;\n      } else {\n        y = (int16_t)report.y;\n        y *= (-1);\n      }\n\n      // Set the X and Y movement value in the report\n      co_write16p(&report_buff[1], x);\n      co_write16p(&report_buff[3], y);\n      report_buff[5] = (signed char)(-1) * report.w;\n\n      // Allocate the HOGPD_REPORT_UPD_REQ message\n      struct hogpd_report_upd_req *req = KE_MSG_ALLOC_DYN(\n          HOGPD_REPORT_UPD_REQ, prf_get_task_from_id(TASK_ID_HOGPD), TASK_APP,\n          hogpd_report_upd_req, APP_HID_MOUSE_REPORT_LEN);\n\n      req->conidx = app_hid_env.conidx;\n      // now fill report\n      req->report.hid_idx = app_hid_env.conidx;\n      req->report.type = HOGPD_REPORT; // HOGPD_BOOT_MOUSE_INPUT_REPORT;//\n      req->report.idx = 0;             // 0 for boot reports and report map\n      req->report.length = APP_HID_MOUSE_REPORT_LEN;\n      memcpy(&req->report.value[0], &report_buff[0], APP_HID_MOUSE_REPORT_LEN);\n\n      ke_msg_send(req);\n\n      app_hid_env.nb_report--;\n\n      // Restart the mouse timeout timer if needed\n      if (app_hid_env.timeout != 0) {\n        ke_timer_set(APP_HID_MOUSE_TIMEOUT_TIMER, TASK_APP,\n                     (uint16_t)(app_hid_env.timeout));\n        app_hid_env.timer_enabled = true;\n      }\n    }\n  } break;\n\n  case (APP_HID_WAIT_REP): {\n    // Requested connection parameters\n    struct gapc_conn_param conn_param;\n\n    /*\n     * Requested connection interval: 10ms\n     * Latency: 25\n     * Supervision Timeout: 2s\n     */\n    conn_param.intv_min = 8;\n    conn_param.intv_max = 8;\n    conn_param.latency = 25;\n    conn_param.time_out = 200;\n\n    appm_update_param(app_hid_env.conidx, &conn_param);\n\n    // Restart the mouse timeout timer if needed\n    if (app_hid_env.timeout != 0) {\n      ke_timer_set(APP_HID_MOUSE_TIMEOUT_TIMER, TASK_APP,\n                   (uint16_t)(app_hid_env.timeout));\n      app_hid_env.timer_enabled = true;\n    }\n\n    // Go back to the ready state\n    app_hid_env.state = APP_HID_READY;\n  } break;\n\n  case (APP_HID_IDLE): {\n    // Try to restart advertising if needed\n  } break;\n\n  // DISABLE and ENABLED states\n  default: {\n    // Drop the message\n  } break;\n  }\n\n#if (KE_PROFILING)\n  //    app_display_hdl_env_size(0xFFFF, ke_get_mem_usage(KE_MEM_ENV));\n  //    app_display_hdl_db_size(0xFFFF, ke_get_mem_usage(KE_MEM_ATT_DB));\n  //    app_display_hdl_msg_size((uint16_t)ke_get_max_mem_usage(),\n  //    ke_get_mem_usage(KE_MEM_KE_MSG));\n#endif //(KE_PROFILING)\n}\n\n/*\n * MESSAGE HANDLERS\n ****************************************************************************************\n */\n\nstatic int hogpd_ctnl_pt_ind_handler(ke_msg_id_t const msgid,\n                                     struct hogpd_ctnl_pt_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n\n  if (param->conidx == app_hid_env.conidx) {\n    // make use of param->hid_ctnl_pt\n    struct hogpd_report_cfm *req = KE_MSG_ALLOC_DYN(\n        HOGPD_REPORT_CFM, prf_get_task_from_id(TASK_ID_HOGPD), /* src_id */\n        TASK_APP, hogpd_report_cfm, 0);\n\n    req->conidx = param->conidx; /// app_hid_env.conidx; ///???\n    /// Operation requested (read/write @see enum hogpd_op)\n    req->operation = HOGPD_OP_REPORT_WRITE;\n    /// Status of the request\n    req->status = GAP_ERR_NO_ERROR; ///???\n    /// Report Info\n    // req->report;\n    /// HIDS Instance\n    req->report.hid_idx = app_hid_env.conidx; ///???\n    /// type of report (@see enum hogpd_report_type)\n    req->report.type = -1; // outside\n    /// Report Length (uint8_t)\n    req->report.length = 0;\n    /// Report Instance - 0 for boot reports and report map\n    req->report.idx = 0;\n    /// Report data\n\n    // Send the message\n    ke_msg_send(req);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int hogpd_ntf_cfg_ind_handler(ke_msg_id_t const msgid,\n                                     struct hogpd_ntf_cfg_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  if (app_hid_env.conidx == param->conidx) {\n    if ((param->ntf_cfg[param->conidx] & HOGPD_CFG_REPORT_NTF_EN) != 0) {\n      // The device is ready to send reports to the peer device\n      app_hid_env.state = APP_HID_READY;\n    } else {\n      // Come back to the Enabled state\n      if (app_hid_env.state == APP_HID_READY) {\n        app_hid_env.state = APP_HID_ENABLED;\n      }\n    }\n\n#if (NVDS_SUPPORT)\n    // Store the notification configuration in the database\n    if (nvds_put(NVDS_TAG_MOUSE_NTF_CFG, NVDS_LEN_MOUSE_NTF_CFG,\n                 (uint8_t *)¶m->ntf_cfg[param->conidx]) != NVDS_OK) {\n      // Should not happen\n      ASSERT_ERR(0);\n    }\n#endif\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int hogpd_report_req_ind_handler(\n    ke_msg_id_t const msgid, struct hogpd_report_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  if ((param->operation == HOGPD_OP_REPORT_READ) &&\n      (param->report.type == HOGPD_REPORT_MAP)) {\n    struct hogpd_report_cfm *req = KE_MSG_ALLOC_DYN(\n        HOGPD_REPORT_CFM,\n        src_id,  /// prf_get_task_from_id(TASK_ID_HOGPD),/* src_id */\n        dest_id, /// TASK_APP,\n        hogpd_report_cfm, APP_HID_MOUSE_REPORT_MAP_LEN);\n\n    req->conidx = app_hid_env.conidx; ///???\n    /// Operation requested (read/write @see enum hogpd_op)\n    req->operation = HOGPD_OP_REPORT_READ;\n    /// Status of the request\n    req->status = GAP_ERR_NO_ERROR; ///???\n    /// Report Info\n    // req->report;\n    /// HIDS Instance\n    req->report.hid_idx =\n        param->report.hid_idx; ///   ???///app_hid_env.conidx; ///???\n    /// type of report (@see enum hogpd_report_type)\n    req->report.type = HOGPD_REPORT_MAP;\n    /// Report Length (uint8_t)\n    req->report.length = APP_HID_MOUSE_REPORT_MAP_LEN;\n    /// Report Instance - 0 for boot reports and report map\n    req->report.idx = 0;\n    /// Report data\n    memcpy(&req->report.value[0], &app_hid_mouse_report_map[0],\n           APP_HID_MOUSE_REPORT_MAP_LEN);\n\n    // Send the message\n    ke_msg_send(req);\n  } else {\n    if (param->report.type ==\n        HOGPD_BOOT_MOUSE_INPUT_REPORT) { // request of boot mouse report\n      struct hogpd_report_cfm *req = KE_MSG_ALLOC_DYN(\n          HOGPD_REPORT_CFM, prf_get_task_from_id(TASK_ID_HOGPD), /* src_id */\n          TASK_APP, hogpd_report_cfm, 0 /*param->report.length*/);\n\n      req->conidx = param->conidx; /// app_hid_env.conidx; ///???\n      /// Operation requested (read/write @see enum hogpd_op)\n      req->operation = HOGPD_OP_REPORT_READ;\n      /// Status of the request\n      req->status = GAP_ERR_NO_ERROR; ///???\n      /// HIDS Instance\n      req->report.hid_idx = app_hid_env.conidx; ///???\n      /// type of report (@see enum hogpd_report_type)\n      req->report.type = param->report.type; //-1;//outside\n      /// Report Length (uint8_t)\n      req->report.length = 0; // param->report.length;\n      /// Report Instance - 0 for boot reports and report map\n      req->report.idx = param->report.idx; // 0;\n      /// Report data\n\n      // Send the message\n      ke_msg_send(req);\n    } else if (param->report.type == HOGPD_REPORT) { // request of mouse report\n      struct hogpd_report_cfm *req = KE_MSG_ALLOC_DYN(\n          HOGPD_REPORT_CFM, prf_get_task_from_id(TASK_ID_HOGPD), /* src_id */\n          TASK_APP, hogpd_report_cfm, 8 /*param->report.length*/);\n\n      req->conidx = param->conidx; /// app_hid_env.conidx; ///???\n      /// Operation requested (read/write @see enum hogpd_op)\n      req->operation = HOGPD_OP_REPORT_READ;\n      /// Status of the request\n      req->status = GAP_ERR_NO_ERROR; ///???\n      /// Report Info\n      // req->report;\n      /// HIDS Instance\n      req->report.hid_idx = app_hid_env.conidx; ///???\n      /// type of report (@see enum hogpd_report_type)\n      req->report.type = param->report.type; //-1;//outside\n      /// Report Length (uint8_t)\n      req->report.length = 8; // param->report.length;\n      /// Report Instance - 0 for boot reports and report map\n      req->report.idx = param->report.idx; // 0;\n      /// Report data\n      memset(&req->report.value[0], 0, 8);          //???\n      req->report.value[0] = param->report.hid_idx; /// HIDS Instance\n      req->report.value[1] =\n          param->report.type; /// type of report (@see enum hogpd_report_type)\n      req->report.value[2] = param->report.length; /// Report Length (uint8_t)\n      req->report.value[3] =\n          param->report\n              .idx; /// Report Instance - 0 for boot reports and report map\n\n      // Send the message\n      ke_msg_send(req);\n    } else {\n      struct hogpd_report_cfm *req = KE_MSG_ALLOC_DYN(\n          HOGPD_REPORT_CFM, prf_get_task_from_id(TASK_ID_HOGPD), /* src_id */\n          TASK_APP, hogpd_report_cfm, 8 /*param->report.length*/);\n\n      req->conidx = param->conidx; /// app_hid_env.conidx; ///???\n      /// Operation requested (read/write @see enum hogpd_op)\n      req->operation = HOGPD_OP_REPORT_READ;\n      /// Status of the request\n      req->status = GAP_ERR_NO_ERROR; ///???\n      /// Report Info\n      // req->report;\n      /// HIDS Instance\n      req->report.hid_idx = app_hid_env.conidx; ///???\n      /// type of report (@see enum hogpd_report_type)\n      req->report.type = param->report.type; //-1;//outside\n      /// Report Length (uint8_t)\n      req->report.length = 8; // param->report.length;\n      /// Report Instance - 0 for boot reports and report map\n      req->report.idx = param->report.idx; // 0;\n      /// Report data\n      memset(&req->report.value[0], 0, 8);          //???\n      req->report.value[0] = param->report.hid_idx; /// HIDS Instance\n      req->report.value[1] =\n          param->report.type; /// type of report (@see enum hogpd_report_type)\n      req->report.value[2] = param->report.length; /// Report Length (uint8_t)\n      req->report.value[3] =\n          param->report\n              .idx; /// Report Instance - 0 for boot reports and report map\n\n      // Send the message\n      ke_msg_send(req);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int hogpd_proto_mode_req_ind_handler(\n    ke_msg_id_t const msgid, struct hogpd_proto_mode_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  if ((param->conidx == app_hid_env.conidx) &&\n      (param->operation == HOGPD_OP_PROT_UPDATE)) {\n\n    // make use of param->proto_mode\n    struct hogpd_proto_mode_cfm *req = KE_MSG_ALLOC_DYN(\n        HOGPD_PROTO_MODE_CFM, prf_get_task_from_id(TASK_ID_HOGPD), /* src_id */\n        TASK_APP, hogpd_proto_mode_cfm, 0);\n    /// Connection Index\n    req->conidx = app_hid_env.conidx;\n    /// Status of the request\n    req->status = GAP_ERR_NO_ERROR;\n    /// HIDS Instance\n    req->hid_idx = app_hid_env.conidx;\n    /// New Protocol Mode Characteristic Value\n    req->proto_mode = param->proto_mode;\n\n    // Send the message\n    ke_msg_send(req);\n  } else {\n    struct hogpd_proto_mode_cfm *req = KE_MSG_ALLOC_DYN(\n        HOGPD_PROTO_MODE_CFM, prf_get_task_from_id(TASK_ID_HOGPD), /* src_id */\n        TASK_APP, hogpd_proto_mode_cfm, 0);\n    /// Status of the request\n    req->status = ATT_ERR_APP_ERROR;\n\n    /// Connection Index\n    req->conidx = app_hid_env.conidx;\n    /// HIDS Instance\n    req->hid_idx = app_hid_env.conidx;\n    /// New Protocol Mode Characteristic Value\n    req->proto_mode = param->proto_mode;\n\n    // Send the message\n    ke_msg_send(req);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int hogpd_report_upd_handler(ke_msg_id_t const msgid,\n                                    struct hogpd_report_upd_rsp const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  if (app_hid_env.conidx == param->conidx) {\n    if (GAP_ERR_NO_ERROR == param->status) {\n      if (app_hid_env.nb_report < APP_HID_NB_SEND_REPORT) {\n        app_hid_env.nb_report++;\n      }\n    } else {\n      // we get this message if error occur while sending report\n      // most likely - disconnect\n      // Go back to the ready state\n      app_hid_env.state = APP_HID_IDLE;\n      // change mode\n      // restart adv\n      // Try to restart advertising if needed\n      // report was not success - need to restart???\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int hogpd_enable_rsp_handler(ke_msg_id_t const msgid,\n                                    struct hogpd_enable_rsp const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Function called when the APP_HID_MOUSE_TIMEOUT_TIMER expires.\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int app_hid_mouse_timeout_timer_handler(ke_msg_id_t const msgid,\n                                               void const *param,\n                                               ke_task_id_t const dest_id,\n                                               ke_task_id_t const src_id) {\n  app_hid_env.timer_enabled = false;\n\n  if (app_hid_env.state == APP_HID_READY) {\n    // Requested connection parameters\n    struct gapc_conn_param conn_param;\n    // Length\n#if (NVDS_SUPPORT)\n    uint8_t length = NVDS_LEN_MOUSE_TIMEOUT;\n#endif\n    // Timer value\n    uint16_t timer_val;\n\n    /*\n     * Request an update of the connection parameters\n     * Requested connection interval: 10ms\n     * Latency: 200\n     * Supervision Timeout: 5s\n     */\n    conn_param.intv_min = 8;\n    conn_param.intv_max = 8;\n    conn_param.latency = 200;\n    conn_param.time_out = 500;\n\n    appm_update_param(app_hid_env.conidx, &conn_param);\n\n    // Go to the Wait for Report state\n    app_hid_env.state = APP_HID_WAIT_REP;\n\n#if (NVDS_SUPPORT)\n    // Get the timer value from the NVDS\n    if (nvds_get(NVDS_TAG_MOUSE_ENERGY_SAFE, &length, (uint8_t *)&timer_val) !=\n        NVDS_OK)\n#endif\n    {\n      timer_val = APP_HID_SILENCE_DURATION_2;\n    }\n\n    // Relaunch the timer\n    ke_timer_set(APP_HID_MOUSE_TIMEOUT_TIMER, TASK_APP, timer_val);\n    app_hid_env.timer_enabled = true;\n  } else if (app_hid_env.state == APP_HID_WAIT_REP) {\n    // Disconnect the link with the device\n    appm_disconnect(app_hid_env.conidx);\n\n    // Go back to the ready state\n    app_hid_env.state = APP_HID_IDLE;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int app_hid_msg_dflt_handler(ke_msg_id_t const msgid, void const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Set the value of the Report Map Characteristic in the database\n ****************************************************************************************\n */\nvoid app_hid_set_report_map(void);\n\n/*\n * LOCAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_hid_msg_handler_list[] = {\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_hid_msg_dflt_handler},\n\n    {HOGPD_ENABLE_RSP, (ke_msg_func_t)hogpd_enable_rsp_handler},\n    ///  notification configuration changed\n    {HOGPD_NTF_CFG_IND, (ke_msg_func_t)hogpd_ntf_cfg_ind_handler},\n    {HOGPD_REPORT_REQ_IND, (ke_msg_func_t)hogpd_report_req_ind_handler},\n    {HOGPD_PROTO_MODE_REQ_IND, (ke_msg_func_t)hogpd_proto_mode_req_ind_handler},\n\n    {HOGPD_CTNL_PT_IND, (ke_msg_func_t)hogpd_ctnl_pt_ind_handler},\n\n    {HOGPD_REPORT_UPD_RSP, (ke_msg_func_t)hogpd_report_upd_handler},\n    {APP_HID_MOUSE_TIMEOUT_TIMER,\n     (ke_msg_func_t)app_hid_mouse_timeout_timer_handler},\n};\n\nconst struct ke_state_handler app_hid_table_handler = {\n    &app_hid_msg_handler_list[0],\n    (sizeof(app_hid_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif //(BLE_APP_HID)\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_hid/app_hid.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef APP_HID_H_\n#define APP_HID_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @ingroup RICOW\n *\n * @brief HID Application Module entry point\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW configuration\n\n#if (BLE_APP_HID)\n\n#include           // Standard Integer Definition\n#include \"ke_task.h\"         // Kernel Task Definition\n\n#if (PS2_SUPPORT)\n#include \"ps2.h\"             // PS2 Mouse Driver\n#endif //(PS2_SUPPORT)\n\n/*\n * STRUCTURES DEFINITION\n ****************************************************************************************\n */\n\n/// HID Application Module Environment Structure\nstruct app_hid_env_tag\n{\n    /// Connection handle\n    uint8_t conidx;\n    /// Mouse timeout value\n    uint16_t timeout;\n    /// Internal state of the module\n    uint8_t state;\n    /// Timer enabled\n    bool timer_enabled;\n    /// Number of report that can be sent\n    uint8_t nb_report;\n};\n\nstruct ps2_mouse_msg\n{\n    int16_t x;\n    int16_t y;\n    int16_t b;\n    int16_t w;\n};\n\n/*\n * GLOBAL VARIABLES DECLARATIONS\n ****************************************************************************************\n */\n\n/// Table of message handlers\nextern const struct ke_state_handler app_hid_table_handler;\n\n/*\n * GLOBAL FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n *\n * Health Thermometer Application Functions\n *\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialize HID Application Module\n ****************************************************************************************\n */\nvoid app_hid_init(void);\n\n/**\n ****************************************************************************************\n * @brief Initialize the PS2 mouse driver so that it can be used by the application\n ****************************************************************************************\n */\nvoid app_hid_start_mouse(void);\n\n/**\n ****************************************************************************************\n * @brief Add a HID Service instance in the DB\n ****************************************************************************************\n */\nvoid app_hid_add_hids(void);\n\n/**\n ****************************************************************************************\n * @brief Enable the HID Over GATT Profile device role\n *\n * @param[in]:  conhdl - Connection handle for the connection\n ****************************************************************************************\n */\nvoid app_hid_enable_prf(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Send a mouse report to the peer device\n *\n * @param[in]:  report - Mouse report sent by the PS2 driver\n ****************************************************************************************\n */\nvoid app_hid_send_mouse_report(struct ps2_mouse_msg report);\n\n#endif //(BLE_APP_HID)\n\n/// @} APP\n\n#endif // APP_HID_H_\n"
  },
  {
    "path": "services/ble_app/app_hrps/app_hrps.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_HR)\n#include \"app_hrps.h\"\n#include \"hrps.h\"\n#include \"hrps_task.h\"\n\n#include \"app.h\"      // Application Definitions\n#include \"app_task.h\" // application task definitions\n#include \"arch.h\"     // Platform Definitions\n#include \"co_bt.h\"\n#include \"prf.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"string.h\"\n\nstruct app_hrps_env_tag app_hrps_env;\n\nvoid app_hrps_init(void) {\n  // Reset the environment\n  memset(&app_hrps_env, 0x00, sizeof(app_hrps_env));\n\n  app_hrps_env.connectionIndex = INVALID_CONNECTION_INDEX;\n  app_hrps_env.isNotificationEnabled = false;\n}\n\nvoid app_hrps_connected_evt_handler(uint8_t conidx) {\n  app_hrps_env.connectionIndex = conidx;\n}\n\nvoid app_hrps_disconnected_evt_handler(void) {\n  app_hrps_env.connectionIndex = INVALID_CONNECTION_INDEX;\n  app_hrps_env.isNotificationEnabled = false;\n}\n\nvoid app_hrps_send_measument_via_notification(void) {\n  if (app_hrps_env.isNotificationEnabled) {\n    struct hrps_meas_send_req *req =\n        KE_MSG_ALLOC(HRPS_MEAS_SEND_REQ, prf_get_task_from_id(TASK_ID_HRPS),\n                     TASK_APP, hrps_meas_send_req);\n\n    memcpy(req, &app_hrps_env.meas, sizeof(struct hrps_meas_send_req));\n\n    ke_msg_send(req);\n  }\n}\n\nvoid app_hrps_add_profile(void) {\n  TRACE(0, \"app_hrps_add_profile\");\n  struct hrps_db_cfg *db_cfg;\n\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, sizeof(struct hrps_db_cfg));\n\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_HRPS;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  db_cfg = (struct hrps_db_cfg *)req->param;\n\n  db_cfg->features = HRPS_BODY_SENSOR_LOC_CHAR_SUP | HRPS_ENGY_EXP_FEAT_SUP |\n                     HRPS_HR_MEAS_NTF_CFG;\n\n  db_cfg->body_sensor_loc = 0;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nstatic int app_hrps_msg_handler(ke_msg_id_t const msgid, void const *param,\n                                ke_task_id_t const dest_id,\n                                ke_task_id_t const src_id) {\n  // Do nothing\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_hrps_measurement_ccc_changed_handler(\n    ke_msg_id_t const msgid, struct hrps_cfg_indntf_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  TRACE(2, \"%s cfg: %d\", __func__, param->cfg_val);\n\n  app_hrps_env.isNotificationEnabled = param->cfg_val;\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_hrps_measurement_sent_handler(ke_msg_id_t const msgid,\n                                             void const *param,\n                                             ke_task_id_t const dest_id,\n                                             ke_task_id_t const src_id) {\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_hrps_ctrl_point_received_handler(\n    ke_msg_id_t const msgid, struct hrps_energy_exp_reset_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  TRACE(1, \"%s\", __func__);\n\n  app_hrps_send_measument_via_notification();\n  return (KE_MSG_CONSUMED);\n}\n/// Default State handlers definition\nconst struct ke_msg_handler hrps_msg_handler_list[] = {\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_hrps_msg_handler},\n\n    {HRPS_CFG_INDNTF_IND,\n     (ke_msg_func_t)app_hrps_measurement_ccc_changed_handler},\n    {HRP_MEASUREMENT_DATA_SENT,\n     (ke_msg_func_t)app_hrps_measurement_sent_handler},\n    {HRPS_ENERGY_EXP_RESET_IND,\n     (ke_msg_func_t)app_hrps_ctrl_point_received_handler},\n\n};\n\nconst struct ke_state_handler app_hrps_table_handler = {\n    &hrps_msg_handler_list[0],\n    (sizeof(hrps_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif\n"
  },
  {
    "path": "services/ble_app/app_hrps/app_hrps.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_HRP_H\n#define __APP_HRP_H\n\n#if (BLE_APP_HR)\n\n#include \"hrps.h\"\n#include \"hrps_task.h\"\n\n#include \"app.h\"                     // Application Definitions\n#include \"app_task.h\"                // application task definitions\n#include \"co_bt.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"arch.h\"                    // Platform Definitions\n#include \"prf.h\"\n#include \"string.h\"\n\n#define INVALID_CONNECTION_INDEX\t0xFF\n\nvoid app_hrps_add_profile(void);\n\nextern const struct ke_state_handler app_hrps_table_handler;\n\nvoid app_hrps_init(void);\n\nvoid app_hrps_connected_evt_handler(uint8_t conidx);\n\nvoid app_hrps_disconnected_evt_handler(void);\n\n/// Messages for HRP Server Profile \nenum hrp_msg_id\n{\n\tHRP_MEASUREMENT_CCC_CHANGED = TASK_FIRST_MSG(TASK_ID_HRPS),\n\n    HRP_MEASUREMENT_DATA_SENT,\n\n    HRP_CTRL_POINT_RECEIVED,\n\t\n};\n\nstruct ble_hrp_measurement_notif_config_t\n{\n\tbool \t\tisNotificationEnabled;\n};\n\nstruct app_hrps_env_tag\n{\n    uint8_t connectionIndex;\n\tuint8_t\tisNotificationEnabled;\n    struct hrps_meas_send_req meas;\n};\n\n\n#endif\n\n#endif\n"
  },
  {
    "path": "services/ble_app/app_htp/app_ht.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_HT)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"app.h\"      // Application Definitions\n#include \"app_ht.h\"   // Health Thermometer Application Definitions\n#include \"app_task.h\" // application task definitions\n#include \"arch.h\"     // Platform Definitions\n#include \"co_bt.h\"\n#include \"htpt_task.h\" // health thermometer functions\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n#include \"co_math.h\"\n#include \"ke_timer.h\"\n\n#if (DISPLAY_SUPPORT)\n#include \"app_display.h\"\n#include \"display.h\"\n#endif // DISPLAY_SUPPORT\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Initial Temperature Value : 37c\n#define APP_HT_TEMP_VALUE_INIT (3700)\n/// Temperature Step\n#define APP_HT_TEMP_STEP_INIT (10)\n/// Measurement Interval Value Min\n#define APP_HT_MEAS_INTV_MIN (1)\n/// Measurement Interval Value Max\n#define APP_HT_MEAS_INTV_MAX (30)\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// health thermometer application environment structure\nstruct app_ht_env_tag app_ht_env;\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nstatic void app_ht_temp_send(void) {\n  // Temperature Value\n  int32_t value = (int32_t)(app_ht_env.temp_value);\n\n  // The value is a float value, set the exponent\n  value |= 0xFE000000;\n\n  // Allocate the HTPT_TEMP_SEND_REQ message\n  struct htpt_temp_send_req *req =\n      KE_MSG_ALLOC(HTPT_TEMP_SEND_REQ, prf_get_task_from_id(TASK_ID_HTPT),\n                   TASK_APP, htpt_temp_send_req);\n\n  // Stable => Temperature Measurement Char.\n  req->stable_meas = 0x01;\n\n  // Temperature Measurement Value\n  req->temp_meas.temp = value;\n  //    req->temp_meas.time_stamp = 0;\n  req->temp_meas.flags = HTP_FLAG_CELSIUS | HTP_FLAG_TYPE;\n  req->temp_meas.type = app_ht_env.temp_meas_type;\n\n  ke_msg_send(req);\n}\n\nstatic void app_ht_update_type_string(uint8_t temp_type) {\n  switch (temp_type) {\n  case 0:\n    strcpy(app_ht_env.temp_type_string, \"NONE\");\n    break;\n  case 1:\n    strcpy(app_ht_env.temp_type_string, \"ARMPIT\");\n    break;\n  case 2:\n    strcpy(app_ht_env.temp_type_string, \"BODY\");\n    break;\n  case 3:\n    strcpy(app_ht_env.temp_type_string, \"EAR\");\n    break;\n  case 4:\n    strcpy(app_ht_env.temp_type_string, \"FINGER\");\n    break;\n  case 5:\n    strcpy(app_ht_env.temp_type_string, \"GASTRO-INT\");\n    break;\n  case 6:\n    strcpy(app_ht_env.temp_type_string, \"MOUTH\");\n    break;\n  case 7:\n    strcpy(app_ht_env.temp_type_string, \"RECTUM\");\n    break;\n  case 8:\n    strcpy(app_ht_env.temp_type_string, \"TOE\");\n    break;\n  case 9:\n    strcpy(app_ht_env.temp_type_string, \"TYMPANUM\");\n    break;\n  default:\n    strcpy(app_ht_env.temp_type_string, \"UNKNOWN\");\n    break;\n  }\n}\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nvoid app_ht_init(void) {\n  // Reset the environment\n  memset(&app_ht_env, 0, sizeof(app_ht_env));\n\n  // Initial measurement interval : 0s\n  app_ht_env.htpt_meas_intv = 5;\n  // Initial temperature value : 37.00 C\n  app_ht_env.temp_value = APP_HT_TEMP_VALUE_INIT;\n  // Initial temperature step : 0.20 C\n  app_ht_env.temp_step = APP_HT_TEMP_STEP_INIT;\n  // Initial temperature type : ARMPIT\n  app_ht_env.temp_meas_type = 1;\n\n  // TODO: Add a state for the module\n}\n\nvoid app_stop_timer(void) {\n  // Stop the timer used for the measurement interval if enabled\n  if (app_ht_env.timer_enable) {\n    ke_timer_clear(APP_HT_MEAS_INTV_TIMER, TASK_APP);\n    app_ht_env.timer_enable = false;\n  }\n}\n\nvoid app_ht_add_hts(void) {\n  struct htpt_db_cfg *db_cfg;\n  // Allocate the HTPT_CREATE_DB_REQ\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, sizeof(struct htpt_db_cfg));\n\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_HTPT;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Set parameters\n  db_cfg = (struct htpt_db_cfg *)req->param;\n  // All features are supported\n  db_cfg->features = HTPT_ALL_FEAT_SUP;\n\n  // Measurement Interval range\n  db_cfg->valid_range_min = APP_HT_MEAS_INTV_MIN;\n  db_cfg->valid_range_max = APP_HT_MEAS_INTV_MAX;\n\n  // Measurement\n  db_cfg->temp_type = app_ht_env.temp_meas_type;\n  db_cfg->meas_intv = app_ht_env.htpt_meas_intv;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nvoid app_ht_enable_prf(uint8_t conidx) {\n  // Allocate the message\n  struct htpt_enable_req *req =\n      KE_MSG_ALLOC(HTPT_ENABLE_REQ, prf_get_task_from_id(TASK_ID_HTPT),\n                   TASK_APP, htpt_enable_req);\n\n  // Fill in the parameter structure\n  req->conidx = conidx;\n  // NTF/IND initial status - Disabled\n  req->ntf_ind_cfg = PRF_CLI_STOP_NTFIND;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\n/**\n ****************************************************************************************\n * Health Thermometer Application Functions\n ****************************************************************************************\n */\n\nvoid app_ht_temp_inc(void) {\n  app_ht_env.temp_value += app_ht_env.temp_step;\n\n#if (DISPLAY_SUPPORT)\n  app_display_update_temp_val_screen(app_ht_env.temp_value);\n#endif // DISPLAY_SUPPORT\n\n  app_ht_temp_send();\n}\n\nvoid app_ht_temp_dec(void) {\n  app_ht_env.temp_value -= app_ht_env.temp_step;\n\n#if (DISPLAY_SUPPORT)\n  app_display_update_temp_val_screen(app_ht_env.temp_value);\n#endif // DISPLAY_SUPPORT\n\n  app_ht_temp_send();\n}\n\nvoid app_ht_temp_type_inc(void) {\n  app_ht_env.temp_meas_type =\n      (uint8_t)(((int)app_ht_env.temp_meas_type + 1) % 10);\n\n#if (DISPLAY_SUPPORT)\n  app_ht_update_type_string(app_ht_env.temp_meas_type);\n  app_display_update_temp_type_screen(app_ht_env.temp_type_string);\n#endif // DISPLAY_SUPPORT\n}\n\nvoid app_ht_temp_type_dec(void) {\n  if (((int)app_ht_env.temp_meas_type - 1) < 0) {\n    app_ht_env.temp_meas_type = 0x09;\n  } else {\n    app_ht_env.temp_meas_type = app_ht_env.temp_meas_type - 1;\n  }\n\n#if DISPLAY_SUPPORT\n  app_ht_update_type_string(app_ht_env.temp_meas_type);\n  app_display_update_temp_type_screen(app_ht_env.temp_type_string);\n#endif // DISPLAY_SUPPORT\n}\n\n/****************************************************************************************\n * MESSAGE HANDLERS\n ****************************************************************************************/\n\n/**\n ****************************************************************************************\n * @brief Handles measurement interval start indication from the Health\n *Thermometer profile. Start or stop a timer following the value of the param\n *intv.\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int htpt_meas_intv_chg_req_ind_handler(\n    ke_msg_id_t const msgid, struct htpt_meas_intv_chg_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Store the received Measurement Interval value\n  app_ht_env.htpt_meas_intv = param->intv;\n\n  // Check the new Measurement Interval Value\n  if (app_ht_env.htpt_meas_intv != 0) {\n    // Check if a Timer already exists\n    if (!app_ht_env.timer_enable) {\n      // Set a Timer\n      ke_timer_set(APP_HT_MEAS_INTV_TIMER, TASK_APP,\n                   app_ht_env.htpt_meas_intv * 100);\n      app_ht_env.timer_enable = true;\n    } else {\n      // Clear the previous timer\n      ke_timer_clear(APP_HT_MEAS_INTV_TIMER, TASK_APP);\n      // Create a new timer with the received measurement interval\n      ke_timer_set(APP_HT_MEAS_INTV_TIMER, TASK_APP,\n                   app_ht_env.htpt_meas_intv * 100);\n    }\n  } else {\n    // Check if a Timer exists\n    if (app_ht_env.timer_enable) {\n      // Measurement Interval is 0, clear the timer\n      ke_timer_clear(APP_HT_MEAS_INTV_TIMER, TASK_APP);\n      app_ht_env.timer_enable = false;\n    }\n  }\n\n  // Allocate the message\n  struct htpt_meas_intv_chg_cfm *cfm =\n      KE_MSG_ALLOC(HTPT_MEAS_INTV_CHG_CFM, prf_get_task_from_id(TASK_ID_HTPT),\n                   TASK_APP, htpt_meas_intv_chg_cfm);\n\n  // Set data\n  cfm->conidx = KE_IDX_GET(dest_id);\n  cfm->status = 0;\n\n  // Send the message\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int htpt_temp_send_rsp_handler(ke_msg_id_t const msgid,\n                                      struct htpt_temp_send_rsp const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Do nothing\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int htpt_cfg_indntf_ind_handler(ke_msg_id_t const msgid,\n                                       struct htpt_cfg_indntf_ind const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  // Do nothing\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles health thermometer timer\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int app_ht_meas_intv_timer_handler(ke_msg_id_t const msgid,\n                                          void const *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Random generation of a temperature value\n  uint32_t rand_temp_step;\n  // Sign used to know if the temperature will be increased or decreased\n  int8_t sign;\n\n  // Generate temperature step\n  rand_temp_step = (uint32_t)(co_rand_word() % 20);\n  // Increase or decrease the temperature value\n  sign = (int8_t)(rand_temp_step & 0x00000001);\n\n  if (!sign) {\n    sign = -1;\n  }\n\n  app_ht_env.temp_value += sign * rand_temp_step;\n\n  // Send the new temperature\n  app_ht_temp_send();\n\n#if (DISPLAY_SUPPORT)\n  app_display_update_temp_val_screen(app_ht_env.temp_value);\n#endif // DISPLAY_SUPPORT\n\n  // Reset the Timer (Measurement Interval is not 0 if we are here)\n  ke_timer_set(APP_HT_MEAS_INTV_TIMER, TASK_APP,\n               app_ht_env.htpt_meas_intv * 100);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles health thermometer timer\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int app_ht_msg_handler(ke_msg_id_t const msgid, void const *param,\n                              ke_task_id_t const dest_id,\n                              ke_task_id_t const src_id) {\n  // Do nothing\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * LOCAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_ht_msg_handler_list[] = {\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_ht_msg_handler},\n\n    //  {HTPT_ENABLE_RSP,               (ke_msg_func_t)htpt_enable_rsp_handler},\n    {HTPT_TEMP_SEND_RSP, (ke_msg_func_t)htpt_temp_send_rsp_handler},\n    {HTPT_MEAS_INTV_CHG_REQ_IND,\n     (ke_msg_func_t)htpt_meas_intv_chg_req_ind_handler},\n    {HTPT_CFG_INDNTF_IND, (ke_msg_func_t)htpt_cfg_indntf_ind_handler},\n\n    {APP_HT_MEAS_INTV_TIMER, (ke_msg_func_t)app_ht_meas_intv_timer_handler},\n};\n\nconst struct ke_state_handler app_ht_table_handler = {\n    &app_ht_msg_handler_list[0],\n    (sizeof(app_ht_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif // BLE_APP_HT\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_htp/app_ht.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef APP_HT_H_\n#define APP_HT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @ingroup RICOW\n *\n * @brief Health Thermometer Application entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW configuration\n\n#if (BLE_APP_HT)\n\n#include           // Standard Integer Definition\n#include \"ke_task.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\nextern struct app_env_tag app_env;\n\n/// health thermometer application environment structure\nstruct app_ht_env_tag\n{\n    /// Measurement interval\n    uint16_t htpt_meas_intv;\n\n    /// Temperature value\n    uint32_t temp_value;\n    /// Temperature step\n    uint32_t temp_step;\n    /// Temperature type\n    uint8_t temp_meas_type;\n    /// Temperature type string\n    char temp_type_string[16];\n\n    /// Measurement interval timer enable\n    bool timer_enable;\n};\n\n/*\n * GLOBAL VARIABLES DECLARATIONS\n ****************************************************************************************\n */\n\n/// Health Thermomter Application environment\nextern struct app_ht_env_tag app_ht_env;\n\n/// Table of message handlers\nextern const struct ke_state_handler app_ht_table_handler;\n\n/*\n * FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n *\n * Health Thermometer Application Functions\n *\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialize Health Thermometer Application\n ****************************************************************************************\n */\nvoid app_ht_init(void);\n\n/**\n ****************************************************************************************\n * @brief Add a Health Thermometer instance in the DB\n ****************************************************************************************\n */\nvoid app_ht_add_hts(void);\n\n/**\n ****************************************************************************************\n * @brief Stop the interval measurement timer if used\n ****************************************************************************************\n */\nvoid app_stop_timer (void);\n\n/**\n ****************************************************************************************\n * @brief Enable the health thermometer profile\n ****************************************************************************************\n */\nvoid app_ht_enable_prf(uint8_t);\n\n/**\n ****************************************************************************************\n * @brief Increase temp_value by temp_step\n ****************************************************************************************\n */\nvoid app_ht_temp_inc(void);\n\n/**\n ****************************************************************************************\n * @brief Decrease temp_value by temp_step\n ****************************************************************************************\n */\nvoid app_ht_temp_dec(void);\n\n/**\n ****************************************************************************************\n * @brief Decrease temp_type by 1\n ****************************************************************************************\n */\nvoid app_ht_temp_type_dec(void);\n\n/**\n ****************************************************************************************\n * @brief Increase temp_type by 1\n ****************************************************************************************\n */\nvoid app_ht_temp_type_inc(void);\n\n#endif //(BLE_APP_HT)\n\n/// @} APP\n\n#endif // APP_HT_H_\n"
  },
  {
    "path": "services/ble_app/app_main/app.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n#if (BLE_APP_PRESENT)\n#include \n\n#include \"app.h\"       // Application Definition\n#include \"app_task.h\"  // Application task Definition\n#include \"gap.h\"       // GAP Definition\n#include \"gapc_task.h\" // GAP Controller Task API\n#include \"gapm.h\"\n#include \"gapm_task.h\" // GAP Manager Task API\n#include \"tgt_hardware.h\"\n\n#include \"gattc_task.h\"\n\n#include \"co_bt.h\"   // Common BT Definition\n#include \"co_math.h\" // Common Maths Definition\n#include \"l2cc.h\"\n#include \"l2cc_pdu.h\"\n\n#include \"nvrecord_ble.h\"\n#include \"prf.h\"\n\n#include \"nvrecord_env.h\"\n#ifndef _BLE_NVDS_\n#include \"tgt_hardware.h\"\n#endif\n#ifdef __AI_VOICE__\n#include \"app_ai_ble.h\" // AI Voice Application Definitions\n#endif                  //(__AI_VOICE__)\n\n#if (BLE_APP_SEC)\n#include \"app_sec.h\" // Application security Definition\n#endif               // (BLE_APP_SEC)\n\n#if (BLE_APP_DATAPATH_SERVER)\n#include \"app_datapath_server.h\" // Data Path Server Application Definitions\n#endif                           //(BLE_APP_DATAPATH_SERVER)\n\n#if (BLE_APP_DIS)\n#include \"app_dis.h\" // Device Information Service Application Definitions\n#endif               //(BLE_APP_DIS)\n\n#if (BLE_APP_BATT)\n#include \"app_batt.h\" // Battery Application Definitions\n#endif                //(BLE_APP_DIS)\n\n#if (BLE_APP_HID)\n#include \"app_hid.h\" // HID Application Definitions\n#endif               //(BLE_APP_HID)\n\n#if (BLE_APP_VOICEPATH)\n#include \"app_voicepath_ble.h\" // Voice Path Application Definitions\n#endif                         //(BLE_APP_VOICEPATH)\n\n#if (BLE_APP_OTA)\n#include \"app_ota.h\" // OTA Application Definitions\n#endif               //(BLE_APP_OTA)\n\n#if (BLE_APP_TOTA)\n#include \"app_tota_ble.h\" // OTA Application Definitions\n#endif                    //(BLE_APP_TOTA)\n\n#if (BLE_APP_ANCC)\n#include \"app_ancc.h\" // ANCC Application Definitions\n#endif                //(BLE_APP_ANCC)\n\n#if (BLE_APP_AMS)\n#include \"app_amsc.h\" // AMS Module Definition\n#endif                // (BLE_APP_AMS)\n\n#if (BLE_APP_GFPS)\n#include \"app_gfps.h\" // Google Fast Pair Service Definitions\n#endif\n#if (DISPLAY_SUPPORT)\n#include \"app_display.h\" // Application Display Definition\n#endif                   //(DISPLAY_SUPPORT)\n\n#ifdef BLE_APP_AM0\n#include \"am0_app.h\" // Audio Mode 0 Application\n#endif               // defined(BLE_APP_AM0)\n\n#if (NVDS_SUPPORT)\n#include \"nvds.h\" // NVDS Definitions\n#endif            //(NVDS_SUPPORT)\n\n#include \"app_ble_mode_switch.h\"\n#include \"app_bt.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"ble_app_dbg.h\"\n#include \"cmsis_os.h\"\n#include \"crc16.h\"\n#include \"ke_timer.h\"\n#include \"nvrecord.h\"\n\n#ifdef BISTO_ENABLED\n#include \"gsound_service.h\"\n#endif\n\n#if defined(__INTERCONNECTION__)\n#include \"app_battery.h\"\n#include \"app_bt.h\"\n#endif\n\n#if (BLE_APP_TILE)\n#include \"tile_service.h\"\n#include \"tile_target_ble.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_tws_ibrt.h\"\n#endif\n\n#ifdef __GATT_OVER_BR_EDR__\n#include \"btgatt_api.h\"\n#endif\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Default Device Name if no value can be found in NVDS\n#define APP_DFLT_DEVICE_NAME (\"BES_BLE\")\n#define APP_DFLT_DEVICE_NAME_LEN (sizeof(APP_DFLT_DEVICE_NAME))\n\n#if (BLE_APP_HID)\n// HID Mouse\n#define DEVICE_NAME \"Hid Mouse\"\n#else\n#define DEVICE_NAME \"RW DEVICE\"\n#endif\n\n#define DEVICE_NAME_SIZE sizeof(DEVICE_NAME)\n\n/**\n * UUID List part of ADV Data\n * --------------------------------------------------------------------------------------\n * x03 - Length\n * x03 - Complete list of 16-bit UUIDs available\n * x09\\x18 - Health Thermometer Service UUID\n *   or\n * x12\\x18 - HID Service UUID\n * --------------------------------------------------------------------------------------\n */\n\n#if (BLE_APP_HT)\n#define APP_HT_ADV_DATA_UUID \"\\x03\\x03\\x09\\x18\"\n#define APP_HT_ADV_DATA_UUID_LEN (4)\n#endif //(BLE_APP_HT)\n\n#if (BLE_APP_HID)\n#define APP_HID_ADV_DATA_UUID \"\\x03\\x03\\x12\\x18\"\n#define APP_HID_ADV_DATA_UUID_LEN (4)\n#endif //(BLE_APP_HID)\n\n#if (BLE_APP_DATAPATH_SERVER)\n/*\n * x11 - Length\n * x07 - Complete list of 16-bit UUIDs available\n * .... the 128 bit UUIDs\n */\n#define APP_DATAPATH_SERVER_ADV_DATA_UUID                                      \\\n  \"\\x11\\x07\\x9e\\x34\\x9B\\x5F\\x80\\x00\\x00\\x80\\x00\\x10\\x00\\x00\\x00\\x01\\x00\\x01\"\n#define APP_DATAPATH_SERVER_ADV_DATA_UUID_LEN (18)\n#endif //(BLE_APP_HT)\n\n/**\n * Appearance part of ADV Data\n * --------------------------------------------------------------------------------------\n * x03 - Length\n * x19 - Appearance\n * x03\\x00 - Generic Thermometer\n *   or\n * xC2\\x04 - HID Mouse\n * --------------------------------------------------------------------------------------\n */\n\n#if (BLE_APP_HT)\n#define APP_HT_ADV_DATA_APPEARANCE \"\\x03\\x19\\x00\\x03\"\n#endif //(BLE_APP_HT)\n\n#if (BLE_APP_HID)\n#define APP_HID_ADV_DATA_APPEARANCE \"\\x03\\x19\\xC2\\x03\"\n#endif //(BLE_APP_HID)\n\n#define APP_ADV_DATA_APPEARANCE_LEN (4)\n\n/**\n * Advertising Parameters\n */\n#if (BLE_APP_HID)\n/// Default Advertising duration - 30s (in multiple of 10ms)\n#define APP_DFLT_ADV_DURATION (3000)\n#endif //(BLE_APP_HID)\n/// Advertising channel map - 37, 38, 39\n#define APP_ADV_CHMAP (0x07)\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\ntypedef void (*appm_add_svc_func_t)(void);\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// List of service to add in the database\nenum appm_svc_list {\n#if (BLE_APP_HT)\n  APPM_SVC_HTS,\n#endif //(BLE_APP_HT)\n#if (BLE_APP_DIS)\n  APPM_SVC_DIS,\n#endif //(BLE_APP_DIS)\n#if (BLE_APP_BATT)\n  APPM_SVC_BATT,\n#endif //(BLE_APP_BATT)\n#if (BLE_APP_HID)\n  APPM_SVC_HIDS,\n#endif //(BLE_APP_HID)\n#ifdef BLE_APP_AM0\n  APPM_SVC_AM0_HAS,\n#endif // defined(BLE_APP_AM0)\n#if (BLE_APP_HR)\n  APPM_SVC_HRP,\n#endif\n#if (BLE_APP_DATAPATH_SERVER)\n  APPM_SVC_DATAPATH_SERVER,\n#endif //(BLE_APP_DATAPATH_SERVER)\n#if (BLE_APP_VOICEPATH)\n  APPM_SVC_VOICEPATH,\n#ifdef BISTO_ENABLED\n  APPM_SVC_BMS,\n#endif\n#endif //(BLE_APP_VOICEPATH)\n#if (ANCS_PROXY_ENABLE)\n  APPM_SVC_ANCSP,\n  APPM_SVC_AMSP,\n#endif\n#if (BLE_APP_ANCC)\n  APPM_SVC_ANCC,\n#endif //(BLE_APP_ANCC)\n#if (BLE_APP_AMS)\n  APPM_SVC_AMSC,\n#endif //(BLE_APP_AMS)\n#if (BLE_APP_OTA)\n  APPM_SVC_OTA,\n#endif //(BLE_APP_OTA)\n#if (BLE_APP_GFPS)\n  APPM_SVC_GFPS,\n#endif //(BLE_APP_GFPS)\n#if (BLE_AI_VOICE)\n  APPM_AI_SMARTVOICE,\n#endif //(BLE_AI_VOICE)\n#if (BLE_APP_TOTA)\n  APPM_SVC_TOTA,\n#endif //(BLE_APP_TOTA)\n\n#if (BLE_APP_TILE)\n  APPM_SVC_TILE,\n#endif //(BLE_APP_TILE)\n\n  APPM_SVC_LIST_STOP,\n};\n\n/*\n * LOCAL VARIABLES DEFINITIONS\n ****************************************************************************************\n */\n// gattc_msg_handler_tab\n// #define KE_MSG_HANDLER_TAB(task)   __STATIC const struct ke_msg_handler\n// task##_msg_handler_tab[] =\n/// Application Task Descriptor\n\n// static const struct ke_task_desc TASK_DESC_APP = {&appm_default_handler,\n//                                                  appm_state, APPM_STATE_MAX,\n//                                                  APP_IDX_MAX};\nextern const struct ke_task_desc TASK_DESC_APP;\n\n/// List of functions used to create the database\nstatic const appm_add_svc_func_t appm_add_svc_func_list[APPM_SVC_LIST_STOP] = {\n#if (BLE_APP_HT)\n    (appm_add_svc_func_t)app_ht_add_hts,\n#endif //(BLE_APP_HT)\n#if (BLE_APP_DIS)\n    (appm_add_svc_func_t)app_dis_add_dis,\n#endif //(BLE_APP_DIS)\n#if (BLE_APP_BATT)\n    (appm_add_svc_func_t)app_batt_add_bas,\n#endif //(BLE_APP_BATT)\n#if (BLE_APP_HID)\n    (appm_add_svc_func_t)app_hid_add_hids,\n#endif //(BLE_APP_HID)\n#ifdef BLE_APP_AM0\n    (appm_add_svc_func_t)am0_app_add_has,\n#endif // defined(BLE_APP_AM0)\n#if (BLE_APP_HR)\n    (appm_add_svc_func_t)app_hrps_add_profile,\n#endif\n#if (BLE_APP_DATAPATH_SERVER)\n    (appm_add_svc_func_t)app_datapath_add_datapathps,\n#endif //(BLE_APP_DATAPATH_SERVER)\n#if (BLE_APP_VOICEPATH)\n    (appm_add_svc_func_t)app_ble_voicepath_add_svc,\n#ifdef BISTO_ENABLED\n    (appm_add_svc_func_t)app_ble_bms_add_svc,\n#endif\n#endif //(BLE_APP_VOICEPATH)\n#if (ANCS_PROXY_ENABLE)\n    (appm_add_svc_func_t)app_ble_ancsp_add_svc,\n    (appm_add_svc_func_t)app_ble_amsp_add_svc,\n#endif\n#if (BLE_APP_ANCC)\n    (appm_add_svc_func_t)app_ancc_add_ancc,\n#endif\n#if (BLE_APP_AMS)\n    (appm_add_svc_func_t)app_amsc_add_amsc,\n#endif\n#if (BLE_APP_OTA)\n    (appm_add_svc_func_t)app_ota_add_ota,\n#endif //(BLE_APP_OTA)\n#if (BLE_APP_GFPS)\n    (appm_add_svc_func_t)app_gfps_add_gfps,\n#endif\n#if (BLE_APP_AI_VOICE)\n    (appm_add_svc_func_t)app_ai_add_ai,\n#endif //(BLE_APP_AI_VOICE)\n#if (BLE_APP_TOTA)\n    (appm_add_svc_func_t)app_tota_add_tota,\n#endif //(BLE_APP_TOTA)\n#if (BLE_APP_TILE)\n    (appm_add_svc_func_t)app_ble_tile_add_svc,\n#endif\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Application Environment Structure\nstruct app_env_tag app_env;\n\nstatic APP_BLE_NEGOTIATED_CONN_PARAM_T\n    negotiatedBleConnParam[BLE_CONNECTION_MAX];\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\nvoid appm_refresh_ble_irk(void) {\n  nv_record_blerec_get_local_irk(app_env.loc_irk);\n  LOG_I(\"local irk:\");\n  DUMP8(\"0x%02x \", app_env.loc_irk, 16);\n  gapm_update_irk(app_env.loc_irk);\n}\n\nuint8_t *appm_get_current_ble_irk(void) { return app_env.loc_irk; }\n\nvoid appm_init() {\n  BLE_APP_FUNC_ENTER();\n\n  // Reset the application manager environment\n  memset(&app_env, 0, sizeof(app_env));\n\n  // Create APP task\n  ke_task_create(TASK_APP, &TASK_DESC_APP);\n\n  // Initialize Task state\n  ke_state_set(TASK_APP, APPM_INIT);\n\n  // Load the device name from NVDS\n\n  // Get the Device Name to add in the Advertising Data (Default one or NVDS\n  // one)\n#ifdef _BLE_NVDS_\n  const char *ble_name_in_nv = nvrec_dev_get_ble_name();\n#else\n  const char *ble_name_in_nv = BLE_DEFAULT_NAME;\n#endif\n  uint32_t nameLen = strlen(ble_name_in_nv) + 1;\n  if (nameLen > APP_DEVICE_NAME_MAX_LEN) {\n    nameLen = APP_DEVICE_NAME_MAX_LEN;\n  }\n  // Get default Device Name (No name if not enough space)\n  memcpy(app_env.dev_name, ble_name_in_nv, nameLen);\n  app_env.dev_name[nameLen - 1] = '\\0';\n  app_env.dev_name_len = nameLen;\n  LOG_I(\"device ble name:%s\", app_env.dev_name);\n#ifdef _BLE_NVDS_\n  nv_record_blerec_init();\n\n  nv_record_blerec_get_local_irk(app_env.loc_irk);\n#else\n  uint8_t counter;\n\n  // avoid ble irk collision low probability\n  uint32_t generatedSeed = hal_sys_timer_get();\n  for (uint8_t index = 0; index < sizeof(bt_addr); index++) {\n    generatedSeed ^=\n        (((uint32_t)(bt_addr[index])) << (hal_sys_timer_get() & 0xF));\n  }\n  srand(generatedSeed);\n\n  // generate a new IRK\n  for (counter = 0; counter < KEY_LEN; counter++) {\n    app_env.loc_irk[counter] = (uint8_t)co_rand_word();\n  }\n#endif\n\n  /*------------------------------------------------------\n   * INITIALIZE ALL MODULES\n   *------------------------------------------------------*/\n\n  // load device information:\n\n#if (DISPLAY_SUPPORT)\n  app_display_init();\n#endif //(DISPLAY_SUPPORT)\n\n#if (BLE_APP_SEC)\n  // Security Module\n  app_sec_init();\n#endif // (BLE_APP_SEC)\n\n#if (BLE_APP_HT)\n  // Health Thermometer Module\n  app_ht_init();\n#endif //(BLE_APP_HT)\n\n#if (BLE_APP_DIS)\n  // Device Information Module\n  app_dis_init();\n#endif //(BLE_APP_DIS)\n\n#if (BLE_APP_HID)\n  // HID Module\n  app_hid_init();\n#endif //(BLE_APP_HID)\n\n#if (BLE_APP_BATT)\n  // Battery Module\n  app_batt_init();\n#endif //(BLE_APP_BATT)\n\n#ifdef BLE_APP_AM0\n  // Audio Mode 0 Module\n  am0_app_init();\n#endif // defined(BLE_APP_AM0)\n\n#if (BLE_APP_VOICEPATH)\n  // Voice Path Module\n  app_ble_voicepath_init();\n#endif //(BLE_APP_VOICEPATH)\n\n#if (BLE_APP_TILE)\n  app_ble_tile_init();\n#endif\n\n#if (BLE_APP_DATAPATH_SERVER)\n  // Data Path Server Module\n  app_datapath_server_init();\n#endif //(BLE_APP_DATAPATH_SERVER)\n#if (BLE_APP_AI_VOICE)\n  // AI Voice Module\n  app_ai_init();\n#endif //(BLE_APP_AI_VOICE)\n\n#if (BLE_APP_OTA)\n  // OTA Module\n  app_ota_init();\n#endif //(BLE_APP_OTA)\n\n#if (BLE_APP_TOTA)\n  // TOTA Module\n  app_tota_ble_init();\n#endif //(BLE_APP_TOTA)\n\n#if (BLE_APP_GFPS)\n  //\n  app_gfps_init();\n#endif\n\n#if (BLE_APP_TILE)\n  app_tile_init();\n#endif\n\n  BLE_APP_FUNC_LEAVE();\n}\n\nbool appm_add_svc(void) {\n  // Indicate if more services need to be added in the database\n  bool more_svc = false;\n\n  // Check if another should be added in the database\n  if (app_env.next_svc != APPM_SVC_LIST_STOP) {\n    ASSERT_INFO(appm_add_svc_func_list[app_env.next_svc] != NULL,\n                app_env.next_svc, 1);\n\n    BLE_APP_DBG(\"appm_add_svc adds service\");\n\n    // Call the function used to add the required service\n    appm_add_svc_func_list[app_env.next_svc]();\n\n    // Select following service to add\n    app_env.next_svc++;\n    more_svc = true;\n  } else {\n    BLE_APP_DBG(\"appm_add_svc doesn't execute, next svc is %d\",\n                app_env.next_svc);\n  }\n\n  return more_svc;\n}\n\nuint16_t appm_get_conhdl_from_conidx(uint8_t conidx) {\n  return app_env.context[conidx].conhdl;\n}\n\nvoid appm_disconnect(uint8_t conidx) {\n  if (BLE_DISCONNECTED != app_env.context[conidx].connectStatus) {\n    struct gapc_disconnect_cmd *cmd =\n        KE_MSG_ALLOC(GAPC_DISCONNECT_CMD, KE_BUILD_ID(TASK_GAPC, conidx),\n                     TASK_APP, gapc_disconnect_cmd);\n\n    cmd->operation = GAPC_DISCONNECT;\n    cmd->reason = CO_ERROR_REMOTE_USER_TERM_CON;\n\n    // Send the message\n    ke_msg_send(cmd);\n  }\n}\n\n// TODO: freddie modify this part\n#if (BLE_APP_GFPS)\n#define UPDATE_BLE_ADV_DATA_RIGHT_BEFORE_STARTING_ADV_ENABLED 1\n#else\n#define UPDATE_BLE_ADV_DATA_RIGHT_BEFORE_STARTING_ADV_ENABLED 0\n#endif\n\nvoid gapm_update_ble_adv_data_right_before_started(uint8_t *pAdvData,\n                                                   uint8_t *advDataLen,\n                                                   uint8_t *pScanRspData,\n                                                   uint8_t *scanRspDataLen,\n                                                   void *adv_cmd) {\n  // for the user case that the BLE adv data or scan rsp data need to be\n  // generated from the run-time BLE address. Just enable macro\n  // UPDATE_BLE_ADV_DATA_RIGHT_BEFORE_STARTING_ADV_ENABLED, and call\n  // appm_get_current_ble_addr to get the run-time used BLE address For fastpair\n  // GFPS_ACCOUNTKEY_SALT_TYPE==USE_BLE_ADDR_AS_SALT case, this macro must be\n  // enabled\n\n  // #if UPDATE_BLE_ADV_DATA_RIGHT_BEFORE_STARTING_ADV_ENABLED\n  //     appm_fill_ble_adv_scan_rsp_data(pAdvData, advDataLen, pScanRspData,\n  //     scanRspDataLen, adv_cmd);\n  // #endif\n  // TODO: freddie implement this API\n}\n\n/**\n ****************************************************************************************\n * Advertising Functions\n ****************************************************************************************\n */\nvoid appm_start_advertising(void *param) {\n  BLE_APP_FUNC_ENTER();\n\n  LOG_I(\"%s state: %d\", __func__, ke_state_get(TASK_APP));\n\n  // Prepare the GAPM_START_ADVERTISE_CMD message\n  struct gapm_start_advertise_cmd *cmd = KE_MSG_ALLOC(\n      GAPM_START_ADVERTISE_CMD, TASK_GAPM, TASK_APP, gapm_start_advertise_cmd);\n\n  BLE_ADV_PARAM_T *advParam = (BLE_ADV_PARAM_T *)param;\n\n#ifdef BLE_USE_RPA\n  cmd->op.addr_src = GAPM_GEN_RSLV_ADDR;\n  cmd->op.randomAddrRenewIntervalInSecond = (uint16_t)(60 * 15);\n#else\n  cmd->op.addr_src = GAPM_STATIC_ADDR;\n\n  // To use non-resolvable address\n  // cmd->op.addr_src    = GAPM_GEN_NON_RSLV_ADDR;\n  // cmd->op.randomAddrRenewIntervalInSecond = (uint16_t)(60*15);\n#endif\n\n  cmd->channel_map = APP_ADV_CHMAP;\n  cmd->intv_min = advParam->advInterval * 8 / 5;\n  cmd->intv_max = advParam->advInterval * 8 / 5;\n  cmd->op.code = advParam->advType;\n  cmd->info.host.mode = GAP_GEN_DISCOVERABLE;\n\n  cmd->isIncludedFlags = advParam->withFlag;\n  cmd->info.host.flags = GAP_LE_GEN_DISCOVERABLE_FLG | GAP_BR_EDR_NOT_SUPPORTED;\n\n  cmd->info.host.adv_data_len = advParam->advDataLen;\n  memcpy(cmd->info.host.adv_data, advParam->advData,\n         cmd->info.host.adv_data_len);\n  cmd->info.host.scan_rsp_data_len = advParam->scanRspDataLen;\n  memcpy(cmd->info.host.scan_rsp_data, advParam->scanRspData,\n         cmd->info.host.scan_rsp_data_len);\n\n  if (advParam->withFlag) {\n    ASSERT(cmd->info.host.adv_data_len <= BLE_ADV_DATA_WITH_FLAG_LEN,\n           \"adv data exceed\");\n  } else {\n    ASSERT(cmd->info.host.adv_data_len <= BLE_ADV_DATA_WITHOUT_FLAG_LEN,\n           \"adv data exceed\");\n  }\n  ASSERT(cmd->info.host.scan_rsp_data_len <= SCAN_RSP_DATA_LEN,\n         \"scan rsp data exceed\");\n  LOG_I(\"[ADDR_TYPE]:%d\", cmd->op.addr_src);\n  if (GAPM_GEN_RSLV_ADDR == cmd->op.addr_src) {\n    LOG_I(\"[IRK]:\");\n    DUMP8(\"0x%02x \", appm_get_current_ble_irk(), KEY_LEN);\n  } else if (GAPM_STATIC_ADDR == cmd->op.addr_src) {\n    LOG_I(\"[ADDR]:\");\n    DUMP8(\"0x%02x \", bt_get_ble_local_address(), 6);\n  }\n\n  LOG_I(\"[ADV_TYPE]:%d\", cmd->op.code);\n  LOG_I(\"[ADV_INTERVAL]:%d\", cmd->intv_min);\n\n  // Send the message\n  ke_msg_send(cmd);\n\n  // Set the state of the task to APPM_ADVERTISING\n  ke_state_set(TASK_APP, APPM_ADVERTISING);\n\n  BLE_APP_FUNC_LEAVE();\n}\n\nvoid appm_stop_advertising(void) {\n\n#if (BLE_APP_HID)\n  // Stop the advertising timer if needed\n  if (ke_timer_active(APP_ADV_TIMEOUT_TIMER, TASK_APP)) {\n    ke_timer_clear(APP_ADV_TIMEOUT_TIMER, TASK_APP);\n  }\n#endif //(BLE_APP_HID)\n\n  // Go in ready state\n  ke_state_set(TASK_APP, APPM_READY);\n\n  // Prepare the GAPM_CANCEL_CMD message\n  struct gapm_cancel_cmd *cmd =\n      KE_MSG_ALLOC(GAPM_CANCEL_CMD, TASK_GAPM, TASK_APP, gapm_cancel_cmd);\n\n  cmd->operation = GAPM_CANCEL;\n\n  // Send the message\n  ke_msg_send(cmd);\n\n#if (DISPLAY_SUPPORT)\n  // Update advertising state screen\n  app_display_set_adv(false);\n#endif //(DISPLAY_SUPPORT)\n}\nvoid appm_start_scanning(uint16_t intervalInMs, uint16_t windowInMs,\n                         uint32_t filtPolicy) {\n  struct gapm_start_scan_cmd *cmd = KE_MSG_ALLOC(GAPM_START_SCAN_CMD, TASK_GAPM,\n                                                 TASK_APP, gapm_start_scan_cmd);\n\n  cmd->op.code = GAPM_SCAN_PASSIVE;\n  cmd->op.addr_src = GAPM_STATIC_ADDR;\n\n  cmd->interval = intervalInMs * 1000 / 625;\n  cmd->window = windowInMs * 1000 / 625;\n  cmd->mode = GAP_OBSERVER_MODE; // GAP_GEN_DISCOVERY;\n  cmd->filt_policy = filtPolicy;\n  cmd->filter_duplic = SCAN_FILT_DUPLIC_DIS;\n\n  ke_state_set(TASK_APP, APPM_SCANNING);\n\n  ke_msg_send(cmd);\n}\n\nvoid appm_stop_scanning(void) {\n  // if (ke_state_get(TASK_APP) == APPM_SCANNING)\n  {\n    // Go in ready state\n    ke_state_set(TASK_APP, APPM_READY);\n\n    // Prepare the GAPM_CANCEL_CMD message\n    struct gapm_cancel_cmd *cmd =\n        KE_MSG_ALLOC(GAPM_CANCEL_CMD, TASK_GAPM, TASK_APP, gapm_cancel_cmd);\n\n    cmd->operation = GAPM_CANCEL;\n\n    // Send the message\n    ke_msg_send(cmd);\n  }\n}\n\nvoid appm_add_dev_into_whitelist(struct gap_bdaddr *ptBdAddr) {\n  struct gapm_white_list_mgt_cmd *cmd =\n      KE_MSG_ALLOC_DYN(GAPM_WHITE_LIST_MGT_CMD, TASK_GAPM, TASK_APP,\n                       gapm_white_list_mgt_cmd, sizeof(struct gap_bdaddr));\n  cmd->operation = GAPM_ADD_DEV_IN_WLIST;\n  cmd->nb = 1;\n\n  memcpy(cmd->devices, ptBdAddr, sizeof(struct gap_bdaddr));\n\n  ke_msg_send(cmd);\n}\n\nstruct gap_bdaddr BLE_BdAddr; //{{0x14, 0x71, 0xda, 0x7d, 0x1a, 0x00}, 0};\nvoid pts_ble_addr_init(void) {\n  uint8_t addr[6] = {0x14, 0x71, 0xda, 0x7d, 0x1a, 0x00};\n  memcpy(BLE_BdAddr.addr.addr, addr, 6);\n  BLE_BdAddr.addr_type = 0;\n}\n\nvoid appm_start_connecting(struct gap_bdaddr *ptBdAddr) {\n  struct gapm_start_connection_cmd *cmd =\n      KE_MSG_ALLOC_DYN(GAPM_START_CONNECTION_CMD, TASK_GAPM, TASK_APP,\n                       gapm_start_connection_cmd, sizeof(struct gap_bdaddr));\n  cmd->ce_len_max = 4;\n  cmd->ce_len_min = 0;\n  cmd->con_intv_max = 6; // in the unit of 1.25ms\n  cmd->con_intv_min = 6; // in the unit of 1.25ms\n  cmd->con_latency = 0;\n  cmd->superv_to = 1000; // in the unit of 10ms\n  cmd->op.code = GAPM_CONNECTION_DIRECT;\n  cmd->op.addr_src = GAPM_STATIC_ADDR;\n  cmd->nb_peers = 1;\n  cmd->scan_interval = ((60) * 1000 / 625);\n  cmd->scan_window = ((30) * 1000 / 625);\n\n  memcpy(cmd->peers, ptBdAddr, sizeof(struct gap_bdaddr));\n\n  ke_state_set(TASK_APP, APPM_CONNECTING);\n\n  ke_msg_send(cmd);\n}\n\nvoid appm_stop_connecting(void) {\n  // Go in ready state\n  ke_state_set(TASK_APP, APPM_READY);\n\n  // Prepare the GAPM_CANCEL_CMD message\n  struct gapm_cancel_cmd *cmd =\n      KE_MSG_ALLOC(GAPM_CANCEL_CMD, TASK_GAPM, TASK_APP, gapm_cancel_cmd);\n\n  cmd->operation = GAPM_CANCEL;\n\n  // Send the message\n  ke_msg_send(cmd);\n}\n\nvoid appm_update_param(uint8_t conidx, struct gapc_conn_param *conn_param) {\n  // Prepare the GAPC_PARAM_UPDATE_CMD message\n  struct gapc_param_update_cmd *cmd =\n      KE_MSG_ALLOC(GAPC_PARAM_UPDATE_CMD, KE_BUILD_ID(TASK_GAPC, conidx),\n                   TASK_APP, gapc_param_update_cmd);\n\n  cmd->operation = GAPC_UPDATE_PARAMS;\n  cmd->intv_min = conn_param->intv_min;\n  cmd->intv_max = conn_param->intv_max;\n  cmd->latency = conn_param->latency;\n  cmd->time_out = conn_param->time_out;\n\n  // not used by a slave device\n  cmd->ce_len_min = 0xFFFF;\n  cmd->ce_len_max = 0xFFFF;\n\n  // Send the message\n  ke_msg_send(cmd);\n}\n\nvoid l2cap_update_param(uint8_t conidx, uint32_t min_interval_in_ms,\n                        uint32_t max_interval_in_ms,\n                        uint32_t supervision_timeout_in_ms,\n                        uint8_t slaveLantency) {\n  struct l2cc_update_param_req *req =\n      L2CC_SIG_PDU_ALLOC(conidx, L2C_CODE_CONN_PARAM_UPD_REQ,\n                         KE_BUILD_ID(TASK_GAPC, conidx), l2cc_update_param_req);\n\n  // generate packet identifier\n  uint8_t pkt_id = co_rand_word() & 0xFF;\n  if (pkt_id == 0) {\n    pkt_id = 1;\n  }\n\n  /* fill up the parameters */\n  req->intv_max = (uint16_t)(max_interval_in_ms / 1.25);\n  req->intv_min = (uint16_t)(min_interval_in_ms / 1.25);\n  req->latency = slaveLantency;\n  req->timeout = supervision_timeout_in_ms / 10;\n  req->pkt_id = pkt_id;\n  LOG_I(\"%s val: 0x%x 0x%x 0x%x 0x%x 0x%x\", __func__, req->intv_max,\n        req->intv_min, req->latency, req->timeout, req->pkt_id);\n  l2cc_pdu_send(req);\n}\n\nuint8_t appm_get_dev_name(uint8_t *name) {\n  // copy name to provided pointer\n  memcpy(name, app_env.dev_name, app_env.dev_name_len);\n  // return name length\n  return app_env.dev_name_len;\n}\n\nvoid appm_exchange_mtu(uint8_t conidx) {\n  struct gattc_exc_mtu_cmd *cmd =\n      KE_MSG_ALLOC(GATTC_EXC_MTU_CMD, KE_BUILD_ID(TASK_GATTC, conidx), TASK_APP,\n                   gattc_exc_mtu_cmd);\n\n  cmd->operation = GATTC_MTU_EXCH;\n  cmd->seq_num = 0;\n\n  ke_msg_send(cmd);\n}\n\nvoid appm_check_and_resolve_ble_address(uint8_t conidx) {\n  APP_BLE_CONN_CONTEXT_T *pContext = &(app_env.context[conidx]);\n\n#ifdef __GATT_OVER_BR_EDR__\n  if (conidx == btif_btgatt_get_connection_index()) {\n    pContext->isGotSolvedBdAddr = true;\n    pContext->isBdAddrResolvingInProgress = false;\n    btif_btgatt_get_device_address(pContext->solvedBdAddr);\n  }\n#endif\n\n  // solved already, return\n  if (pContext->isGotSolvedBdAddr) {\n    LOG_I(\"Already get solved bd addr.\");\n    return;\n  }\n  // not solved yet and the solving is in progress, return and wait\n  else if (app_is_resolving_ble_bd_addr()) {\n    LOG_I(\"Random bd addr solving on going.\");\n    return;\n  }\n\n  if (BLE_RANDOM_ADDR == pContext->peerAddrType) {\n    memset(pContext->solvedBdAddr, 0, BD_ADDR_LEN);\n    bool isSuccessful =\n        appm_resolve_random_ble_addr_from_nv(conidx, pContext->bdAddr);\n    LOG_I(\"%s isSuccessful %d\", __func__, isSuccessful);\n    if (isSuccessful) {\n      pContext->isBdAddrResolvingInProgress = true;\n    } else {\n      pContext->isGotSolvedBdAddr = true;\n      pContext->isBdAddrResolvingInProgress = false;\n    }\n  } else {\n    pContext->isGotSolvedBdAddr = true;\n    pContext->isBdAddrResolvingInProgress = false;\n    memcpy(pContext->solvedBdAddr, pContext->bdAddr, BD_ADDR_LEN);\n  }\n}\n\nbool appm_resolve_random_ble_addr_from_nv(uint8_t conidx, uint8_t *randomAddr) {\n#ifdef _BLE_NVDS_\n  struct gapm_resolv_addr_cmd *cmd = KE_MSG_ALLOC_DYN(\n      GAPM_RESOLV_ADDR_CMD, KE_BUILD_ID(TASK_GAPM, conidx), TASK_APP,\n      gapm_resolv_addr_cmd, BLE_RECORD_NUM * GAP_KEY_LEN);\n\n  uint8_t irkeyNum = nv_record_ble_fill_irk((uint8_t *)(cmd->irk));\n  if (0 == irkeyNum) {\n    LOG_I(\"No history irk, cannot solve bd addr.\");\n    KE_MSG_FREE(cmd);\n    return false;\n  }\n\n  LOG_I(\"Start random bd addr solving.\");\n\n  cmd->operation = GAPM_RESOLV_ADDR;\n  cmd->nb_key = irkeyNum;\n  memcpy(cmd->addr.addr, randomAddr, GAP_BD_ADDR_LEN);\n  ke_msg_send(cmd);\n  return true;\n#else\n  return false;\n#endif\n}\n\nvoid appm_resolve_random_ble_addr_with_sepcific_irk(uint8_t conidx,\n                                                    uint8_t *randomAddr,\n                                                    uint8_t *pIrk) {\n  struct gapm_resolv_addr_cmd *cmd =\n      KE_MSG_ALLOC_DYN(GAPM_RESOLV_ADDR_CMD, KE_BUILD_ID(TASK_GAPM, conidx),\n                       TASK_APP, gapm_resolv_addr_cmd, GAP_KEY_LEN);\n  cmd->operation = GAPM_RESOLV_ADDR;\n  cmd->nb_key = 1;\n  memcpy(cmd->addr.addr, randomAddr, GAP_BD_ADDR_LEN);\n  memcpy(cmd->irk, pIrk, GAP_KEY_LEN);\n  ke_msg_send(cmd);\n}\n\nvoid appm_random_ble_addr_solved(bool isSolvedSuccessfully,\n                                 uint8_t *irkUsedForSolving) {\n  APP_BLE_CONN_CONTEXT_T *pContext;\n  uint32_t conidx;\n  for (conidx = 0; conidx < BLE_CONNECTION_MAX; conidx++) {\n    pContext = &(app_env.context[conidx]);\n    if (pContext->isBdAddrResolvingInProgress) {\n      break;\n    }\n  }\n\n  if (conidx < BLE_CONNECTION_MAX) {\n    pContext->isBdAddrResolvingInProgress = false;\n    pContext->isGotSolvedBdAddr = true;\n\n    LOG_I(\"%s conidx %d isSolvedSuccessfully %d\", __func__, conidx,\n          isSolvedSuccessfully);\n    if (isSolvedSuccessfully) {\n#ifdef _BLE_NVDS_\n      bool isSuccessful = nv_record_blerec_get_bd_addr_from_irk(\n          app_env.context[conidx].solvedBdAddr, irkUsedForSolving);\n      if (isSuccessful) {\n        LOG_I(\"[CONNECT]Connected random address's original addr is:\");\n        DUMP8(\"%02x \", app_env.context[conidx].solvedBdAddr, GAP_BD_ADDR_LEN);\n      } else\n#endif\n      {\n        LOG_I(\"[CONNECT]Resolving of the connected BLE random addr failed.\");\n      }\n    } else {\n      LOG_I(\"[CONNECT]random resolving failed.\");\n    }\n  }\n\n#if defined(CFG_VOICEPATH)\n  ke_task_msg_retrieve(prf_get_task_from_id(TASK_ID_VOICEPATH));\n#endif\n  ke_task_msg_retrieve(TASK_GAPC);\n  ke_task_msg_retrieve(TASK_APP);\n\n  app_ble_start_connectable_adv(BLE_ADVERTISING_INTERVAL);\n}\n\nuint8_t app_ble_connection_count(void) { return app_env.conn_cnt; }\n\nbool app_is_arrive_at_max_ble_connections(void) {\n  LOG_I(\"connection count %d\", app_env.conn_cnt);\n\n#if defined(GFPS_ENABLED) && (BLE_APP_GFPS_VER == FAST_PAIR_REV_2_0)\n  return (app_env.conn_cnt >= BLE_CONNECTION_MAX);\n#else\n  return (app_env.conn_cnt >= 1);\n#endif\n}\n\nbool app_is_resolving_ble_bd_addr(void) {\n  for (uint32_t index = 0; index < BLE_CONNECTION_MAX; index++) {\n    if (app_env.context[index].isBdAddrResolvingInProgress) {\n      return true;\n    }\n  }\n\n  return false;\n}\n\nvoid app_trigger_ble_service_discovery(uint8_t conidx, uint16_t shl,\n                                       uint16_t ehl) {\n  struct gattc_send_svc_changed_cmd *cmd =\n      KE_MSG_ALLOC(GATTC_SEND_SVC_CHANGED_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                   TASK_APP, gattc_send_svc_changed_cmd);\n  cmd->operation = GATTC_SVC_CHANGED;\n  cmd->svc_shdl = shl;\n  cmd->svc_ehdl = ehl;\n  ke_msg_send(cmd);\n}\n\nvoid appm_update_adv_data(uint8_t *pAdvData, uint32_t advDataLen,\n                          uint8_t *pScanRspData, uint32_t scanRspDataLen) {\n  LOG_I(\"%s\", __func__);\n  ASSERT(advDataLen <= BLE_DATA_LEN, \"adv data exceed\");\n  ASSERT(scanRspDataLen <= SCAN_RSP_DATA_LEN, \"scan rsp data exceed\");\n\n  struct gapm_update_advertise_data_cmd *cmd =\n      KE_MSG_ALLOC(GAPM_UPDATE_ADVERTISE_DATA_CMD, TASK_GAPM, TASK_APP,\n                   gapm_update_advertise_data_cmd);\n  cmd->operation = GAPM_UPDATE_ADVERTISE_DATA;\n  memcpy(cmd->adv_data, pAdvData, advDataLen);\n  cmd->adv_data_len = advDataLen;\n\n  memcpy(cmd->scan_rsp_data, pScanRspData, scanRspDataLen);\n  cmd->scan_rsp_data_len = scanRspDataLen;\n\n  ke_msg_send(cmd);\n}\n\n__attribute__((weak)) void\napp_ble_connected_evt_handler(uint8_t conidx, const uint8_t *pPeerBdAddress) {}\n\n__attribute__((weak)) void app_ble_disconnected_evt_handler(uint8_t conidx) {}\n\n__attribute__((weak)) void app_advertising_stopped(void) {}\n\n__attribute__((weak)) void app_advertising_started(void) {}\n\n__attribute__((weak)) void app_connecting_started(void) {}\n\n__attribute__((weak)) void app_scanning_stopped(void) {}\n\n__attribute__((weak)) void app_connecting_stopped(void) {}\n\n__attribute__((weak)) void app_scanning_started(void) {}\n\n__attribute__((weak)) void app_ble_system_ready(void) {}\n\n__attribute__((weak)) void\napp_adv_reported_scanned(struct gapm_adv_report_ind *ptInd) {}\n\nuint8_t *appm_get_current_ble_addr(void) {\n#ifdef BLE_USE_RPA\n  return (uint8_t *)gapm_get_bdaddr();\n#else\n  return ble_addr;\n#endif\n}\n\n#define IS_WORKAROUND_SAME_BT_BLE_ADDR_FOR_RPA_CASEx\nuint8_t *appm_get_local_identity_ble_addr(void) {\n#if defined(BLE_USE_RPA) && defined(IS_WORKAROUND_SAME_BT_BLE_ADDR_FOR_RPA_CASE)\n  return (uint8_t *)gapm_get_bdaddr();\n#else\n  return ble_addr;\n#endif\n}\n\n// bit mask of the existing conn param modes\nstatic uint32_t existingBleConnParamModes[BLE_CONNECTION_MAX] = {0};\n\nstatic BLE_CONN_PARAM_CONFIG_T ble_conn_param_config[] = {\n    // default value: for the case of BLE just connected and the BT idle state\n    {BLE_CONN_PARAM_MODE_DEFAULT, BLE_CONN_PARAM_PRIORITY_NORMAL, 24},\n\n    {BLE_CONN_PARAM_MODE_AI_STREAM_ON, BLE_CONN_PARAM_PRIORITY_ABOVE_NORMAL1,\n     24},\n\n    //{BLE_CONN_PARAM_MODE_A2DP_ON, BLE_CONN_PARAM_PRIORITY_ABOVE_NORMAL0, 36},\n\n    {BLE_CONN_PARAM_MODE_HFP_ON, BLE_CONN_PARAM_PRIORITY_ABOVE_NORMAL2, 36},\n\n    {BLE_CONN_PARAM_MODE_OTA, BLE_CONN_PARAM_PRIORITY_HIGH, 12},\n\n    {BLE_CONN_PARAM_MODE_OTA_SLOWER, BLE_CONN_PARAM_PRIORITY_HIGH, 20},\n\n    {BLE_CONN_PARAM_MODE_SNOOP_EXCHANGE, BLE_CONN_PARAM_PRIORITY_HIGH, 8},\n\n    // TODO: add mode cases if needed\n};\n\nvoid app_ble_reset_conn_param_mode(uint8_t conidx) {\n  uint32_t lock = int_lock_global();\n  existingBleConnParamModes[conidx] = 0;\n  int_unlock_global(lock);\n}\n\nvoid app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_E mode, bool isEnable) {\n  for (uint8_t index = 0; index < BLE_CONNECTION_MAX; index++) {\n    if (BLE_CONNECTED == app_env.context[index].connectStatus) {\n      app_ble_update_conn_param_mode_of_specific_connection(index, mode,\n                                                            isEnable);\n    }\n  }\n}\n\nbool app_ble_is_parameter_mode_enabled(uint8_t conidx,\n                                       BLE_CONN_PARAM_MODE_E mode) {\n  bool isEnabled = false;\n  uint32_t lock = int_lock_global();\n  isEnabled = existingBleConnParamModes[conidx] & (1 << mode);\n  int_unlock_global(lock);\n\n  return isEnabled;\n}\n\nvoid app_ble_parameter_mode_clear(uint8_t conidx, BLE_CONN_PARAM_MODE_E mode) {\n  uint32_t lock = int_lock_global();\n  existingBleConnParamModes[conidx] &= (~(1 << mode));\n  int_unlock_global(lock);\n}\n\nvoid app_ble_update_conn_param_mode_of_specific_connection(\n    uint8_t conidx, BLE_CONN_PARAM_MODE_E mode, bool isEnable) {\n  ASSERT(mode < BLE_CONN_PARAM_MODE_NUM, \"Wrong ble conn param mode %d!\", mode);\n\n  uint32_t lock = int_lock_global();\n\n  // locate the conn param mode\n  BLE_CONN_PARAM_CONFIG_T *pConfig = NULL;\n  uint8_t index;\n\n  for (index = 0;\n       index < sizeof(ble_conn_param_config) / sizeof(BLE_CONN_PARAM_CONFIG_T);\n       index++) {\n    if (mode == ble_conn_param_config[index].ble_conn_param_mode) {\n      pConfig = &ble_conn_param_config[index];\n      break;\n    }\n  }\n\n  if (NULL == pConfig) {\n    int_unlock_global(lock);\n    LOG_W(\"conn param mode %d not defined!\", mode);\n    return;\n  }\n\n  if (isEnable) {\n    if (0 == existingBleConnParamModes[conidx]) {\n      // no other params existing, just configure this one\n      existingBleConnParamModes[conidx] = 1 << mode;\n    } else {\n      // already existing, directly return\n      if (existingBleConnParamModes[conidx] & (1 << mode)) {\n        int_unlock_global(lock);\n        return;\n      } else {\n        // update the bit-mask\n        existingBleConnParamModes[conidx] |= (1 << mode);\n\n        // not existing yet, need to go throuth the existing params to see\n        // whether we need to update the param\n        for (index = 0; index < sizeof(ble_conn_param_config) /\n                                    sizeof(BLE_CONN_PARAM_CONFIG_T);\n             index++) {\n          if (((uint32_t)1\n               << (uint8_t)ble_conn_param_config[index].ble_conn_param_mode) &\n              existingBleConnParamModes[conidx]) {\n            if (ble_conn_param_config[index].priority > pConfig->priority) {\n              // one of the exiting param has higher priority than this one,\n              // so do nothing but update the bit-mask\n              int_unlock_global(lock);\n              return;\n            }\n          }\n        }\n\n        // no higher priority conn param existing, so we need to apply this one\n      }\n    }\n  } else {\n    if (0 == existingBleConnParamModes[conidx]) {\n      // no other params existing, just return\n      int_unlock_global(lock);\n      return;\n    } else {\n      // doesn't exist, directly return\n      if (!(existingBleConnParamModes[conidx] & (1 << mode))) {\n        int_unlock_global(lock);\n        return;\n      } else {\n        // update the bit-mask\n        existingBleConnParamModes[conidx] &= (~(1 << mode));\n\n        if (0 == existingBleConnParamModes[conidx]) {\n          int_unlock_global(lock);\n          return;\n        }\n\n        pConfig = NULL;\n\n        // existing, need to apply for the highest priority conn param\n        for (index = 0; index < sizeof(ble_conn_param_config) /\n                                    sizeof(BLE_CONN_PARAM_CONFIG_T);\n             index++) {\n          if (((uint32_t)1\n               << (uint8_t)ble_conn_param_config[index].ble_conn_param_mode) &\n              existingBleConnParamModes[conidx]) {\n            if (NULL != pConfig) {\n              if (ble_conn_param_config[index].priority > pConfig->priority) {\n                pConfig = &ble_conn_param_config[index];\n              }\n            } else {\n              pConfig = &ble_conn_param_config[index];\n            }\n          }\n        }\n      }\n    }\n  }\n\n  int_unlock_global(lock);\n\n  // if we can arrive here, it means we have got one config to apply\n  ASSERT(NULL != pConfig, \"It's strange that config pointer is still NULL.\");\n\n  APP_BLE_CONN_CONTEXT_T *pContext = &(app_env.context[conidx]);\n\n  if (pContext->connInterval != pConfig->conn_param_interval) {\n    l2cap_update_param(conidx, pConfig->conn_param_interval * 10 / 8,\n                       pConfig->conn_param_interval * 10 / 8,\n                       BLE_CONN_PARAM_SUPERVISE_TIMEOUT_MS,\n                       BLE_CONN_PARAM_SLAVE_LATENCY_CNT);\n\n    LOG_I(\"try to update conn interval to %d\", pConfig->conn_param_interval);\n  }\n\n  LOG_I(\"conn param mode of conidx %d switched to:0x%x\", conidx,\n        existingBleConnParamModes[conidx]);\n}\n\nvoid app_ble_save_negotiated_conn_param(\n    uint8_t conidx, APP_BLE_NEGOTIATED_CONN_PARAM_T *pConnParam) {\n  if (conidx < BLE_CONNECTION_MAX) {\n    negotiatedBleConnParam[conidx] = *pConnParam;\n  }\n}\n\nbool app_ble_get_connection_interval(\n    uint8_t conidx, APP_BLE_NEGOTIATED_CONN_PARAM_T *pConnParam) {\n  if ((conidx < BLE_CONNECTION_MAX) &&\n      (BLE_CONNECTED == app_env.context[conidx].connectStatus)) {\n    *pConnParam = negotiatedBleConnParam[conidx];\n    return true;\n  } else {\n    return false;\n  }\n}\n\n#if GFPS_ENABLED\nuint8_t delay_update_conidx = BLE_INVALID_CONNECTION_INDEX;\n#define FP_DELAY_UPDATE_BLE_CONN_PARAM_TIMER_VALUE (10000)\nosTimerId fp_update_ble_param_timer = NULL;\nstatic void fp_update_ble_connect_param_timer_handler(void const *param);\nosTimerDef(FP_UPDATE_BLE_CONNECT_PARAM_TIMER,\n           (void (*)(void const *))fp_update_ble_connect_param_timer_handler);\nextern uint8_t is_sco_mode(void);\nstatic void fp_update_ble_connect_param_timer_handler(void const *param) {\n  LOG_I(\"fp_update_ble_connect_param_timer_handler\");\n  for (uint8_t index = 0; index < BLE_CONNECTION_MAX; index++) {\n    if ((BLE_CONNECTED == app_env.context[index].connectStatus) &&\n        (index == delay_update_conidx)) {\n      LOG_I(\"update connection interval of conidx %d\", delay_update_conidx);\n\n      if (is_sco_mode()) {\n        app_ble_update_conn_param_mode_of_specific_connection(\n            delay_update_conidx, BLE_CONN_PARAM_MODE_HFP_ON, true);\n      } else {\n        app_ble_update_conn_param_mode_of_specific_connection(\n            delay_update_conidx, BLE_CONN_PARAM_MODE_DEFAULT, true);\n      }\n      break;\n    }\n  }\n  delay_update_conidx = BLE_INVALID_CONNECTION_INDEX;\n}\n\nvoid fp_update_ble_connect_param_start(uint8_t ble_conidx) {\n  if (fp_update_ble_param_timer == NULL) {\n    fp_update_ble_param_timer = osTimerCreate(\n        osTimer(FP_UPDATE_BLE_CONNECT_PARAM_TIMER), osTimerOnce, NULL);\n    return;\n  }\n\n  delay_update_conidx = ble_conidx;\n  if (fp_update_ble_param_timer)\n    osTimerStart(fp_update_ble_param_timer,\n                 FP_DELAY_UPDATE_BLE_CONN_PARAM_TIMER_VALUE);\n}\n\nvoid fp_update_ble_connect_param_stop(uint8_t ble_conidx) {\n  if (delay_update_conidx == ble_conidx) {\n    if (fp_update_ble_param_timer)\n      osTimerStop(fp_update_ble_param_timer);\n    delay_update_conidx = BLE_INVALID_CONNECTION_INDEX;\n  }\n}\n#endif\n\n#endif //(BLE_APP_PRESENT)\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_main/app.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef APP_H_\n#define APP_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @ingroup RICOW\n *\n * @brief Application entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW configuration\n\n#ifdef  BLE_APP_PRESENT\n\n#include           // Standard Integer Definition\n#include            // Common BT Definitions\n#include \"arch.h\"            // Platform Definitions\n#include \"gapc.h\"            // GAPC Definitions\n#include \"gapm_task.h\"\n#if (NVDS_SUPPORT)\n#include \"nvds.h\"\n#endif // (NVDS_SUPPORT)\n\n#if defined(CFG_APP_SEC)\n#if defined(CFG_SEC_CON)\n#define BLE_AUTHENTICATION_LEVEL        GAP_AUTH_REQ_SEC_CON_BOND\n#else\n#define BLE_AUTHENTICATION_LEVEL        GAP_AUTH_REQ_MITM_BOND\n#endif\n#else\n#define BLE_AUTHENTICATION_LEVEL        GAP_AUTH_REQ_NO_MITM_NO_BOND\n#endif\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Maximal length of the Device Name value\n#define APP_DEVICE_NAME_MAX_LEN      (24)\n\n// Advertising mode\n#define APP_FAST_ADV_MODE   (1)\n#define APP_SLOW_ADV_MODE   (2)\n#define APP_STOP_ADV_MODE   (3)\n#define APP_MAX_TX_OCTETS   251\n#define APP_MAX_TX_TIME     2120\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\ntypedef enum\n{\n    BLE_CONN_PARAM_MODE_DEFAULT = 0,\n    BLE_CONN_PARAM_MODE_AI_STREAM_ON,\n    BLE_CONN_PARAM_MODE_A2DP_ON,\n    BLE_CONN_PARAM_MODE_HFP_ON,\n    BLE_CONN_PARAM_MODE_OTA,\n    BLE_CONN_PARAM_MODE_OTA_SLOWER,\n    BLE_CONN_PARAM_MODE_SNOOP_EXCHANGE,\n    BLE_CONN_PARAM_MODE_NUM,\n} BLE_CONN_PARAM_MODE_E;\n\ntypedef enum\n{\n    BLE_CONN_PARAM_PRIORITY_NORMAL = 0,\n    BLE_CONN_PARAM_PRIORITY_ABOVE_NORMAL0,\n    BLE_CONN_PARAM_PRIORITY_ABOVE_NORMAL1,\n    BLE_CONN_PARAM_PRIORITY_ABOVE_NORMAL2,\n    BLE_CONN_PARAM_PRIORITY_HIGH,\n} BLE_CONN_PARAM_PRIORITY_E;\n\nenum BLE_CONNECT_STATE {\n    BLE_DISCONNECTED  = 0,\n    BLE_DISCONNECTING = 1,\n    BLE_CONNECTED     = 2,\n};\n\ntypedef struct\n{\n    uint8_t     ble_conn_param_mode;\n    uint8_t     priority;\n    uint16_t    conn_param_interval;    // in the unit of 1.25ms\n} BLE_CONN_PARAM_CONFIG_T;\n\n#define BLE_CONN_PARAM_SLAVE_LATENCY_CNT        0\n#define BLE_CONN_PARAM_SUPERVISE_TIMEOUT_MS     6000\n\n/// Application environment structure\ntypedef struct {\n    /// Connection handle\n    uint16_t conhdl;\n    uint8_t connectStatus;\n    uint8_t isFeatureExchanged;\n    /// Bonding status\n    uint8_t bonded;\n    uint8_t peerAddrType;\n    uint8_t isBdAddrResolvingInProgress;\n    uint8_t isGotSolvedBdAddr;\n    uint8_t bdAddr[BD_ADDR_LEN];\n    uint8_t solvedBdAddr[BD_ADDR_LEN];\n    uint16_t connInterval;\n\n} APP_BLE_CONN_CONTEXT_T;\n\n/// Application environment structure\nstruct app_env_tag\n{\n    uint8_t conn_cnt;\n    /// Last initialized profile\n    uint8_t next_svc;\n\n    /// Device Name length\n    uint8_t dev_name_len;\n    /// Device Name\n    uint8_t dev_name[APP_DEVICE_NAME_MAX_LEN];\n\n    /// Local device IRK\n    uint8_t loc_irk[KEY_LEN];\n\n    APP_BLE_CONN_CONTEXT_T context[BLE_CONNECTION_MAX];\n};\n\n// TODO: \ntypedef struct\n{\n   uint8_t role                         :2;\n   uint8_t earSide                      :1;\n   uint8_t isConnectedWithMobile        :1;\n   uint8_t isConnectedWithTWS           :1;\n   uint8_t reserved                     :3;\n}__attribute__((__packed__)) BLE_ADV_CURRENT_STATE_T;\n\ntypedef struct\n{\n    ///Connection interval value\n    uint16_t            con_interval;\n    ///Connection latency value\n    uint16_t            con_latency;\n    ///Supervision timeout\n    uint16_t            sup_to;\n} APP_BLE_NEGOTIATED_CONN_PARAM_T;\n\n// max adv data length is 31, and 3 byte is used for adv type flag(0x01)\n#define ADV_DATA_MAX_LEN                            (28)\n\n/*\n * GLOBAL VARIABLE DECLARATION\n ****************************************************************************************\n */\n\n/// Application environment\nextern struct app_env_tag app_env;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialize the BLE demo application.\n ****************************************************************************************\n */\nvoid appm_init(void);\n\n/**\n ****************************************************************************************\n * @brief Add a required service in the database\n ****************************************************************************************\n */\nbool appm_add_svc(void);\n\n/**\n ****************************************************************************************\n * @brief Put the device in general discoverable and connectable mode\n ****************************************************************************************\n */\nvoid appm_start_advertising(void *param);\n\n/**\n ****************************************************************************************\n * @brief Put the device in non discoverable and non connectable mode\n ****************************************************************************************\n */\nvoid appm_stop_advertising(void);\n\n/**\n ****************************************************************************************\n * @brief Send to request to update the connection parameters\n ****************************************************************************************\n */\nvoid appm_update_param(uint8_t conidx, struct gapc_conn_param *conn_param);\n\n/**\n ****************************************************************************************\n * @brief Send a disconnection request\n ****************************************************************************************\n */\nvoid appm_disconnect(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Retrieve device name\n *\n * @param[out] device name\n *\n * @return name length\n ****************************************************************************************\n */\nuint8_t appm_get_dev_name(uint8_t* name);\n\n/**\n ****************************************************************************************\n * @brief Return if the device is currently bonded\n ****************************************************************************************\n */\nbool app_sec_get_bond_status(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_connected_evt_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    callback function of BLE connected event\n *\n * Parameters:\n *    conidx - connection index\n *    pPeerBdAddress - connected BLE device address\n *\n * Return:\n *    void\n */\nvoid app_ble_connected_evt_handler(uint8_t conidx, const uint8_t* pPeerBdAddress);\n\n/*---------------------------------------------------------------------------\n *            app_ble_disconnected_evt_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    ble disconnect event received callback\n *\n * Parameters:\n *    conidx - connection index\n *\n * Return:\n *    void\n */\nvoid app_ble_disconnected_evt_handler(uint8_t conidx);\n\nvoid l2cap_update_param(uint8_t  conidx,\n                        uint32_t min_interval_in_ms,\n                        uint32_t max_interval_in_ms,\n                        uint32_t supervision_timeout_in_ms,\n                        uint8_t  slaveLantency);\n\nvoid appm_start_connecting(struct gap_bdaddr* ptBdAddr);\n\nvoid appm_stop_connecting(void);\n\nvoid appm_start_scanning(uint16_t intervalInMs, uint16_t windowInMs, uint32_t filtPolicy);\n\nvoid appm_stop_scanning(void);\n\nvoid appm_create_advertising(void);\n\nvoid appm_create_connecting(void);\n\nvoid app_advertising_stopped(void);\n\nvoid app_advertising_starting_failed(void);\n\nvoid app_adv_data_updated(void);\n\nvoid app_scanning_stopped(void);\n\nvoid app_scanning_starting_failed(void);\n\nvoid app_connecting_stopped(void);\n\nvoid app_connecting_failed(void);\n\nvoid appm_exchange_mtu(uint8_t conidx);\n\nvoid app_ble_system_ready(void);\n\nvoid app_adv_reported_scanned(struct gapm_adv_report_ind* ptInd);\n\nvoid appm_set_private_bd_addr(uint8_t* bdAddr);\n\nvoid appm_add_dev_into_whitelist(struct gap_bdaddr* ptBdAddr);\n\nvoid app_scanning_started(void);\n\nvoid app_advertising_started(void);\n\nvoid app_connecting_stopped(void);\n\nvoid app_connecting_started(void);\n\nbool appm_resolve_random_ble_addr_from_nv(uint8_t conidx, uint8_t* randomAddr);\n\nvoid appm_resolve_random_ble_addr_with_sepcific_irk(uint8_t conidx, uint8_t* randomAddr, uint8_t* pIrk);\n\nvoid appm_random_ble_addr_solved(bool isSolvedSuccessfully, uint8_t* irkUsedForSolving);\n\nuint8_t app_ble_connection_count(void);\n\nbool app_is_arrive_at_max_ble_connections(void);\n\nbool app_is_resolving_ble_bd_addr(void);\n\nvoid app_enter_fastpairing_mode(void);\n\nbool app_is_in_fastpairing_mode(void);\n\nvoid app_set_in_fastpairing_mode_flag(bool isEnabled);\n\nuint16_t appm_get_conhdl_from_conidx(uint8_t conidx);\n\nvoid appm_check_and_resolve_ble_address(uint8_t conidx);\n\nuint8_t* appm_get_current_ble_addr(void);\n\nvoid app_trigger_ble_service_discovery(uint8_t conidx, uint16_t shl, uint16_t ehl);\n\nuint8_t* appm_get_local_identity_ble_addr(void);\n\nvoid app_exchange_remote_feature(uint8_t conidx);\n\nvoid app_ble_update_conn_param_mode_of_specific_connection(uint8_t conidx, BLE_CONN_PARAM_MODE_E mode, bool isEnable);\n\nvoid app_ble_reset_conn_param_mode_of_specifc_connection(uint8_t conidx);\n\nvoid app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_E mode, bool isEnable);\n\nvoid app_ble_reset_conn_param_mode(uint8_t conidx);\n\nvoid appm_refresh_ble_irk(void);\n\nvoid app_ble_save_negotiated_conn_param(uint8_t conidx, APP_BLE_NEGOTIATED_CONN_PARAM_T* pConnParam);\n\nbool app_ble_get_connection_interval(uint8_t conidx,  APP_BLE_NEGOTIATED_CONN_PARAM_T* pConnParam);\n\nvoid appm_update_adv_data(uint8_t* pAdvData, uint32_t advDataLen,\n    uint8_t* pScanRspData, uint32_t scanRspDataLen);\n\nbool gattc_check_if_notification_processing_is_busy(uint8_t conidx);\n\n#ifdef GFPS_ENABLED\nvoid fp_update_ble_connect_param_start(uint8_t ble_conidx);\nvoid fp_update_ble_connect_param_stop(uint8_t ble_conidx);\n#endif\n\nbool app_ble_is_parameter_mode_enabled(uint8_t conidx, BLE_CONN_PARAM_MODE_E mode);\n\nvoid app_ble_parameter_mode_clear(uint8_t conidx, BLE_CONN_PARAM_MODE_E mode);\n\n#ifdef __cplusplus\n}\n#endif\n\n/// @} APP\n\n#endif //(BLE_APP_PRESENT)\n\n#endif // APP_H_\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_core.c",
    "content": "/***************************************************************************\n *\n *Copyright 2015-2019 BES.\n *All rights reserved. All unpublished rights reserved.\n *\n *No part of this work may be used or reproduced in any form or by any\n *means, or stored in a database or retrieval system, without prior written\n *permission of BES.\n *\n *Use of this work is governed by a license granted by BES.\n *This work contains confidential and proprietary information of\n *BES. which is protected by copyright, trade secret,\n *trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*****************************header include********************************/\n#include \"app_a2dp.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"ble_app_dbg.h\"\n#include \"cmsis_os.h\"\n#include \"co_math.h\" // Common Maths Definition\n#include \"stdbool.h\"\n#include \"string.h\"\n\n#include \"app.h\"\n#include \"app_ble_core.h\"\n#include \"app_ble_mode_switch.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_hfp.h\"\n#include \"app_sec.h\"\n#include \"apps.h\"\n#include \"hal_timer.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_ble.h\"\n#include \"rwprf_config.h\"\n#ifdef IBRT\n#include \"app_ibrt_ui.h\"\n#include \"app_tws_if.h\"\n#endif\n\nextern uint8_t is_sco_mode(void);\n\nstatic APP_BLE_CORE_GLOBAL_HANDLER_FUNC g_ble_core_global_handler_ind = NULL;\nstatic APP_BLE_CORE_GLOBAL_CALLBACK_HANDLER_FUNC\n    g_ble_core_global_callback_handler_ind = NULL;\n\nvoid app_ble_core_register_global_handler_ind(\n    APP_BLE_CORE_GLOBAL_HANDLER_FUNC handler) {\n  g_ble_core_global_handler_ind = handler;\n}\n\nvoid app_ble_core_register_global_callback_handle_ind(\n    APP_BLE_CORE_GLOBAL_CALLBACK_HANDLER_FUNC handler) {\n  g_ble_core_global_callback_handler_ind = handler;\n}\n\nstatic void ble_connect_event_handler(ble_evnet_t *event, void *output) {\n#ifdef TWS_SYSTEM_ENABLED\n  app_tws_if_ble_connected_handler();\n#endif\n#ifdef IBRT\n  bd_addr_t *box_ble_addr = (bd_addr_t *)app_ibrt_ui_get_box_ble_addr();\n  if (app_ibrt_ui_get_snoop_via_ble_enable()) {\n    if (!memcmp(box_ble_addr, event->p.connect_handled.peer_bdaddr,\n                BTIF_BD_ADDR_SIZE)) {\n      app_ibrt_ui_set_ble_connect_index(event->p.connect_handled.conidx);\n      app_ibrt_ui_set_box_connect_state(IBRT_BOX_CONNECT_MASTER, FALSE);\n    }\n  }\n#endif\n}\n\nstatic void ble_disconnect_event_handler(ble_evnet_t *event, void *output) {\n#ifdef IBRT\n  if (app_ibrt_ui_get_snoop_via_ble_enable()) {\n    app_ibrt_ui_set_master_notify_flag(false);\n    app_ibrt_ui_clear_box_connect_state(IBRT_BOX_CONNECT_MASTER, FALSE);\n  }\n#endif\n}\n\nstatic void ble_conn_param_update_req_event_handler(ble_evnet_t *event,\n                                                    void *output) {\n  if (a2dp_is_music_ongoing() || is_sco_mode()) {\n    *(bool *)output = false;\n  }\n}\n\nstatic void ble_set_random_bd_addr_event_handler(ble_evnet_t *event,\n                                                 void *output) {\n  // Indicate that a new random BD address set in lower layers\n}\n\nstatic const ble_event_handler_t ble_event_handler_tab[] = {\n    {BLE_CONNECT_EVENT, ble_connect_event_handler},\n    {BLE_DISCONNECT_EVENT, ble_disconnect_event_handler},\n    {BLE_CONN_PARAM_UPDATE_REQ_EVENT, ble_conn_param_update_req_event_handler},\n    {BLE_SET_RANDOM_BD_ADDR_EVENT, ble_set_random_bd_addr_event_handler},\n};\n\n// handle the event that from ble lower layers\nvoid app_ble_core_global_handle(ble_evnet_t *event, void *output) {\n  uint8_t evt_type = event->evt_type;\n  uint16_t index = 0;\n  const ble_event_handler_t *p_ble_event_hand = NULL;\n\n  for (index = 0; index < BLE_EVENT_NUM_MAX; index++) {\n    p_ble_event_hand = &ble_event_handler_tab[index];\n    if (p_ble_event_hand->evt_type == evt_type) {\n      p_ble_event_hand->func(event, output);\n      break;\n    }\n  }\n\n  if (g_ble_core_global_handler_ind) {\n    g_ble_core_global_handler_ind(event, output);\n  }\n}\n\nstatic void ble_callback_roleswitch_start_handler(ble_callback_evnet_t *event,\n                                                  void *output) {\n  LOG_I(\"%s\", __func__);\n  // disable adv after role switch start\n  app_ble_force_switch_adv(BLE_SWITCH_USER_RS, false);\n}\n\nstatic void\nble_callback_roleswitch_complete_handler(ble_callback_evnet_t *event,\n                                         void *output) {\n#if defined(IBRT)\n  // enable adv after role switch complete\n  uint8_t newRole = event->p.rs_complete_handled.newRole;\n  LOG_I(\"%s newRole %d\", __func__, newRole);\n  app_ble_force_switch_adv(BLE_SWITCH_USER_RS, true);\n  if (newRole == IBRT_SLAVE) {\n    app_ble_disconnect_all();\n  }\n#endif\n}\n\nstatic void ble_callback_role_update_handler(ble_callback_evnet_t *event,\n                                             void *output) {\n#if defined(IBRT)\n  uint8_t newRole = event->p.role_update_handled.newRole;\n  LOG_I(\"%s newRole %d\", __func__, newRole);\n  app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n  if (newRole == IBRT_SLAVE) {\n    app_ble_disconnect_all();\n  }\n#endif\n}\n\nstatic void ble_callback_ibrt_event_entry_handler(ble_callback_evnet_t *event,\n                                                  void *output) {\n#if defined(IBRT)\n  uint8_t ibrt_evt_type = event->p.ibrt_event_entry_handled.event;\n  LOG_I(\"%s evt_type %d\", __func__, ibrt_evt_type);\n  if (IBRT_OPEN_BOX_EVENT == ibrt_evt_type) {\n    app_ble_force_switch_adv(BLE_SWITCH_USER_BOX, true);\n  } else if (IBRT_FETCH_OUT_EVENT == ibrt_evt_type) {\n    app_ble_force_switch_adv(BLE_SWITCH_USER_BOX, true);\n  } else if (IBRT_CLOSE_BOX_EVENT == ibrt_evt_type) {\n    app_ble_force_switch_adv(BLE_SWITCH_USER_BOX, false);\n  }\n#endif\n}\n\nstatic const ble_callback_event_handler_t ble_callback_event_handler_tab[] = {\n    {BLE_CALLBACK_RS_START, ble_callback_roleswitch_start_handler},\n    {BLE_CALLBACK_RS_COMPLETE, ble_callback_roleswitch_complete_handler},\n    {BLE_CALLBACK_ROLE_UPDATE, ble_callback_role_update_handler},\n    {BLE_CALLBACK_IBRT_EVENT_ENTRY, ble_callback_ibrt_event_entry_handler},\n};\n\n// handle the event that from other module\nvoid app_ble_core_global_callback_event(ble_callback_evnet_t *event,\n                                        void *output) {\n  uint8_t evt_type = event->evt_type;\n  uint16_t index = 0;\n  const ble_callback_event_handler_t *p_ble_callback_event_hand = NULL;\n\n  for (index = 0; index < BLE_EVENT_NUM_MAX; index++) {\n    p_ble_callback_event_hand = &ble_callback_event_handler_tab[index];\n    if (p_ble_callback_event_hand->evt_type == evt_type) {\n      p_ble_callback_event_hand->func(event, output);\n      break;\n    }\n  }\n\n  if (g_ble_core_global_callback_handler_ind) {\n    g_ble_core_global_callback_handler_ind(event, output);\n  }\n}\n\nstatic void app_ble_stub_user_data_fill_handler(void *param) {\n  LOG_I(\"%s\", __func__);\n  bool adv_enable = false;\n\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (!p_ibrt_ctrl->init_done) {\n    LOG_I(\"%s ibrt don't init\", __func__);\n  } else if (p_ibrt_ctrl->current_role != IBRT_MASTER) {\n    LOG_I(\"%s role %d isn't MASTER\", __func__, p_ibrt_ctrl->current_role);\n  } else\n#endif\n      if (app_ble_get_user_register() & ~(1 << USER_STUB)) {\n    LOG_I(\"%s have other user register 0x%x\", __func__,\n          app_ble_get_user_register());\n  } else {\n    adv_enable = true;\n  }\n\n  app_ble_data_fill_enable(USER_STUB, adv_enable);\n}\n\nvoid app_ble_stub_user_init(void) {\n  LOG_I(\"%s\", __func__);\n  app_ble_register_data_fill_handle(\n      USER_STUB, (BLE_DATA_FILL_FUNC_T)app_ble_stub_user_data_fill_handler,\n      false);\n}\n\n#ifdef TWS_SYSTEM_ENABLED\nstatic void ble_sync_info_prepare_handler(uint8_t *buf, uint16_t *length) {\n  *length = sizeof(NV_RECORD_PAIRED_BLE_DEV_INFO_T);\n\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T *pBleInfo = nv_record_blerec_get_ptr();\n\n  memcpy(buf, pBleInfo, *length);\n}\n\nstatic void ble_sync_info_received_handler(uint8_t *buf, uint16_t length) {\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T *pReceivedBleInfo =\n      (NV_RECORD_PAIRED_BLE_DEV_INFO_T *)buf;\n\n  // basic info\n  nv_record_extension_update_tws_ble_info(pReceivedBleInfo);\n\n  // pair info\n  for (uint32_t index = 0; index < pReceivedBleInfo->saved_list_num; index++) {\n    nv_record_blerec_add(&pReceivedBleInfo->ble_nv[index]);\n  }\n\n#ifdef CFG_APP_SEC\n  app_sec_init();\n#endif\n}\n\nstatic void ble_sync_info_rsp_received_handler(uint8_t *buf, uint16_t length) {\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T *pReceivedBleInfo =\n      (NV_RECORD_PAIRED_BLE_DEV_INFO_T *)buf;\n\n  nv_record_extension_update_tws_ble_info(pReceivedBleInfo);\n  for (uint32_t index = 0; index < pReceivedBleInfo->saved_list_num; index++) {\n    nv_record_blerec_add(&pReceivedBleInfo->ble_nv[index]);\n  }\n}\n\nvoid app_ble_mode_tws_sync_init(void) {\n  TWS_SYNC_USER_T userBle = {\n      ble_sync_info_prepare_handler,\n      ble_sync_info_received_handler,\n      ble_sync_info_prepare_handler,\n      ble_sync_info_rsp_received_handler,\n      NULL,\n  };\n\n  app_tws_if_register_sync_user(TWS_SYNC_USER_BLE_INFO, &userBle);\n}\n\nvoid app_ble_sync_ble_info(void) {\n  app_tws_if_sync_info(TWS_SYNC_USER_BLE_INFO);\n}\n#endif\n\nvoid ble_adv_data_parse(uint8_t *bleBdAddr, int8_t rssi, unsigned char *adv_buf,\n                        unsigned char len) {\n#ifdef IBRT\n  bd_addr_t *box_ble_addr = (bd_addr_t *)app_ibrt_ui_get_box_ble_addr();\n  LOG_I(\"%s\", __func__);\n  // DUMP8(\"%02x \", (uint8_t *)box_ble_addr, BTIF_BD_ADDR_SIZE);\n  DUMP8(\"%02x \", bleBdAddr, BTIF_BD_ADDR_SIZE);\n\n  if (app_ibrt_ui_get_snoop_via_ble_enable()) {\n    if (!memcmp(box_ble_addr, bleBdAddr, BTIF_BD_ADDR_SIZE) &&\n        app_ibrt_ui_is_slave_scaning()) {\n      app_ibrt_ui_set_slave_scaning(FALSE);\n      app_scanning_stopped();\n      app_ble_start_connect((uint8_t *)box_ble_addr);\n    }\n  }\n#endif\n}\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_core.h",
    "content": "/***************************************************************************\n*\n*Copyright 2015-2019 BES.\n*All rights reserved. All unpublished rights reserved.\n*\n*No part of this work may be used or reproduced in any form or by any\n*means, or stored in a database or retrieval system, without prior written\n*permission of BES.\n*\n*Use of this work is governed by a license granted by BES.\n*This work contains confidential and proprietary information of\n*BES. which is protected by copyright, trade secret,\n*trademark and other intellectual property rights.\n*\n****************************************************************************/\n\n#ifndef __APP_BLE_CORE_H__\n#define __APP_BLE_CORE_H__\n\n/*****************************header include********************************/\n\n/******************************macro defination*****************************/\n\n/******************************type defination******************************/\n/**\n * @brief The event type of the ble\n *\n */\ntypedef enum{\n    BLE_CONNECT_EVENT       = 0,\n    BLE_DISCONNECT_EVENT,\n    BLE_CONN_PARAM_UPDATE_REQ_EVENT,\n    BLE_SET_RANDOM_BD_ADDR_EVENT,\n\n    BLE_EVENT_NUM_MAX,\n} ble_evnet_type_e;\n\n/**\n * @brief The event type of other module\n *\n */\ntypedef enum{\n    BLE_CALLBACK_RS_START = 0,\n    BLE_CALLBACK_RS_COMPLETE,\n    BLE_CALLBACK_ROLE_UPDATE,\n    BLE_CALLBACK_IBRT_EVENT_ENTRY,\n\n    BLE_CALLBACK_EVENT_NUM_MAX,\n} ble_callback_evnet_type_e;\n\ntypedef struct {\n    ble_evnet_type_e evt_type;\n    union {\n        struct {\n            uint8_t conidx;\n            const uint8_t *peer_bdaddr;\n        } connect_handled;\n        struct {\n            uint8_t conidx;\n        } disconnect_handled;\n        struct {\n            /// Connection interval minimum\n            uint16_t intv_min;\n            /// Connection interval maximum\n            uint16_t intv_max;\n            /// Latency\n            uint16_t latency;\n            /// Supervision timeout\n            uint16_t time_out;\n        } conn_param_update_req_handled;\n        struct {\n            uint8_t *new_bdaddr;\n        } set_random_bd_addr_handled;\n    } p;\n} ble_evnet_t;\n\ntypedef struct {\n    ble_callback_evnet_type_e evt_type;\n    union {\n        struct {\n            uint8_t newRole;\n        } rs_complete_handled;\n        struct {\n            uint8_t newRole;\n        } role_update_handled;\n        struct {\n            uint8_t event;\n        } ibrt_event_entry_handled;\n    } p;\n} ble_callback_evnet_t;\n\ntypedef void (*APP_BLE_CORE_GLOBAL_HANDLER_FUNC)(ble_evnet_t *, void *);\ntypedef void (*APP_BLE_CORE_GLOBAL_CALLBACK_HANDLER_FUNC)(ble_callback_evnet_t *, void *);\n\n\n// Element of a message handler table.\ntypedef struct {\n    // evt_type of the ble event\n    ble_evnet_type_e evt_type;\n    // Pointer to the handler function for the ble event above.\n    APP_BLE_CORE_GLOBAL_HANDLER_FUNC func;\n} ble_event_handler_t;\n\n// Element of a message handler table.\ntypedef struct {\n    // evt_type of the ble callback event\n    ble_callback_evnet_type_e evt_type;\n    // Pointer to the handler function for the ble callback event above.\n    APP_BLE_CORE_GLOBAL_CALLBACK_HANDLER_FUNC func;\n} ble_callback_event_handler_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*---------------------------------------------------------------------------\n *            app_ble_core_register_global_handler_ind\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to register custom handler function\n *\n * Parameters:\n *    handler -- custom handler function\n *\n * Return:\n *    void\n */\nvoid app_ble_core_register_global_handler_ind(APP_BLE_CORE_GLOBAL_HANDLER_FUNC handler);\n\n/*---------------------------------------------------------------------------\n *            app_ble_core_register_global_callback_handle_ind\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to register custom callback handler function\n *\n * Parameters:\n *    handler -- custom callback handler function\n *\n * Return:\n *    void\n */\nvoid app_ble_core_register_global_callback_handle_ind(APP_BLE_CORE_GLOBAL_CALLBACK_HANDLER_FUNC handler);\n\n/*---------------------------------------------------------------------------\n *            app_ble_core_global_handle\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for ble core to handle event\n *\n * Parameters:\n *    *event -- the event ble core need to handle\n *\n * Return:\n *    uint32_t\n */\nvoid app_ble_core_global_handle(ble_evnet_t *event, void *output);\n\n/*---------------------------------------------------------------------------\n *            app_ble_core_global_callback_event\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for ble core to handle callback event\n *\n * Parameters:\n *    *event -- the event ble core need to handle\n *\n * Return:\n *    void\n */\nvoid app_ble_core_global_callback_event(ble_callback_evnet_t *event, void *output);\n\n/*---------------------------------------------------------------------------\n *            app_ble_stub_user_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    None\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ble_stub_user_init(void);\n\n/****************************function declearation**************************/\n/*---------------------------------------------------------------------------\n *            app_ble_sync_ble_info\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for tws sync ble info\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ble_sync_ble_info(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_mode_tws_sync_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    tws related environment initialization for ble module\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ble_mode_tws_sync_init(void);\n\n/****************************function declearation**************************/\n/*---------------------------------------------------------------------------\n *            ble_adv_data_parse\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    for ble core to parse adv data\n *\n * Parameters:\n *    bleBdAddr -- ble address\n *    rssi      -- ble rssi\n *    adv_buf   -- adv data\n *    len       -- adv data length\n *\n * Return:\n *    void\n */\nvoid ble_adv_data_parse(uint8_t *bleBdAddr,\n                               int8_t rssi,\n                               unsigned char *adv_buf,\n                               unsigned char len);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __APP_BLE_CORE_H__ */\n\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_customif.c",
    "content": "/***************************************************************************\n *\n *Copyright 2015-2019 BES.\n *All rights reserved. All unpublished rights reserved.\n *\n *No part of this work may be used or reproduced in any form or by any\n *means, or stored in a database or retrieval system, without prior written\n *permission of BES.\n *\n *Use of this work is governed by a license granted by BES.\n *This work contains confidential and proprietary information of\n *BES. which is protected by copyright, trade secret,\n *trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*****************************header include********************************/\n#include \"app.h\"\n#include \"app_ble_include.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_hfp.h\"\n#include \"app_sec.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"ble_app_dbg.h\"\n#include \"cmsis_os.h\"\n#include \"co_math.h\" // Common Maths Definition\n#include \"hal_timer.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_ble.h\"\n#include \"rwprf_config.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n#ifdef IBRT\n#include \"app_ibrt_ui.h\"\n#include \"app_tws_if.h\"\n#endif\n\nstatic void app_ble_customif_connect_event_handler(ble_evnet_t *event,\n                                                   void *output) {}\n\nstatic void app_ble_customif_disconnect_event_handler(ble_evnet_t *event,\n                                                      void *output) {}\n\nstatic void\napp_ble_customif_conn_param_update_req_event_handler(ble_evnet_t *event,\n                                                     void *output) {}\n\nstatic void\napp_ble_customif_set_random_bd_addr_event_handler(ble_evnet_t *event,\n                                                  void *output) {\n  // Indicate that a new random BD address set in lower layers\n}\n\nstatic const ble_event_handler_t app_ble_customif_event_handler_tab[] = {\n    {BLE_CONNECT_EVENT, app_ble_customif_connect_event_handler},\n    {BLE_DISCONNECT_EVENT, app_ble_customif_disconnect_event_handler},\n    {BLE_CONN_PARAM_UPDATE_REQ_EVENT,\n     app_ble_customif_conn_param_update_req_event_handler},\n    {BLE_SET_RANDOM_BD_ADDR_EVENT,\n     app_ble_customif_set_random_bd_addr_event_handler},\n};\n\n// handle the event that from ble lower layers\nvoid app_ble_customif_global_handler_ind(ble_evnet_t *event, void *output) {\n  uint8_t evt_type = event->evt_type;\n  uint16_t index = 0;\n  const ble_event_handler_t *p_ble_event_hand = NULL;\n\n  for (index = 0; index < BLE_EVENT_NUM_MAX; index++) {\n    p_ble_event_hand = &app_ble_customif_event_handler_tab[index];\n    if (p_ble_event_hand->evt_type == evt_type) {\n      p_ble_event_hand->func(event, output);\n      break;\n    }\n  }\n}\n\nstatic void\napp_ble_customif_callback_roleswitch_start_handler(ble_callback_evnet_t *event,\n                                                   void *output) {}\n\nstatic void app_ble_customif_callback_roleswitch_complete_handler(\n    ble_callback_evnet_t *event, void *output) {}\n\nstatic void\napp_ble_customif_callback_role_update_handler(ble_callback_evnet_t *event,\n                                              void *output) {}\n\nstatic void\napp_ble_customif_callback_ibrt_event_entry_handler(ble_callback_evnet_t *event,\n                                                   void *output) {}\n\nstatic const ble_callback_event_handler_t\n    app_ble_customif_callback_event_handler_tab[] = {\n        {BLE_CALLBACK_RS_START,\n         app_ble_customif_callback_roleswitch_start_handler},\n        {BLE_CALLBACK_RS_COMPLETE,\n         app_ble_customif_callback_roleswitch_complete_handler},\n        {BLE_CALLBACK_ROLE_UPDATE,\n         app_ble_customif_callback_role_update_handler},\n        {BLE_CALLBACK_IBRT_EVENT_ENTRY,\n         app_ble_customif_callback_ibrt_event_entry_handler},\n};\n\n// handle the event that from other module\nvoid app_ble_customif_global_callback_handler_ind(ble_callback_evnet_t *event,\n                                                  void *output) {\n  uint8_t evt_type = event->evt_type;\n  uint16_t index = 0;\n  const ble_callback_event_handler_t *p_ble_callback_event_hand = NULL;\n\n  for (index = 0; index < BLE_EVENT_NUM_MAX; index++) {\n    p_ble_callback_event_hand =\n        &app_ble_customif_callback_event_handler_tab[index];\n    if (p_ble_callback_event_hand->evt_type == evt_type) {\n      p_ble_callback_event_hand->func(event, output);\n      break;\n    }\n  }\n}\n\nvoid app_ble_customif_init(void) {\n  LOG_I(\"%s\", __func__);\n  app_ble_core_register_global_handler_ind(app_ble_customif_global_handler_ind);\n  app_ble_core_register_global_callback_handle_ind(\n      app_ble_customif_global_callback_handler_ind);\n}\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_customif.h",
    "content": "/***************************************************************************\n*\n*Copyright 2015-2019 BES.\n*All rights reserved. All unpublished rights reserved.\n*\n*No part of this work may be used or reproduced in any form or by any\n*means, or stored in a database or retrieval system, without prior written\n*permission of BES.\n*\n*Use of this work is governed by a license granted by BES.\n*This work contains confidential and proprietary information of\n*BES. which is protected by copyright, trade secret,\n*trademark and other intellectual property rights.\n*\n****************************************************************************/\n\n#ifndef __APP_BLE_CUSTOMIF_H__\n#define __APP_BLE_CUSTOMIF_H__\n\n/*****************************header include********************************/\n\n/******************************macro defination*****************************/\n\n/******************************type defination******************************/\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\n/*---------------------------------------------------------------------------\n *            app_ble_customif_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    None\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ble_customif_init(void);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __APP_BLE_CUSTOMIF_H__ */\n\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_include.h",
    "content": "/***************************************************************************\n*\n*Copyright 2015-2019 BES.\n*All rights reserved. All unpublished rights reserved.\n*\n*No part of this work may be used or reproduced in any form or by any\n*means, or stored in a database or retrieval system, without prior written\n*permission of BES.\n*\n*Use of this work is governed by a license granted by BES.\n*This work contains confidential and proprietary information of\n*BES. which is protected by copyright, trade secret,\n*trademark and other intellectual property rights.\n*\n****************************************************************************/\n\n#ifndef __APP_BLE_INCLUDE_H__\n#define __APP_BLE_INCLUDE_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*****************************header include********************************/\n#include \"app_ble_core.h\"\n#include \"app_ble_mode_switch.h\"\n#include \"app_ble_customif.h\"\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __APP_BLE_INCLUDE_H__ */\n\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_mode_switch.c",
    "content": "/***************************************************************************\n *\n *Copyright 2015-2019 BES.\n *All rights reserved. All unpublished rights reserved.\n *\n *No part of this work may be used or reproduced in any form or by any\n *means, or stored in a database or retrieval system, without prior written\n *permission of BES.\n *\n *Use of this work is governed by a license granted by BES.\n *This work contains confidential and proprietary information of\n *BES. which is protected by copyright, trade secret,\n *trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*****************************header include********************************/\n#include \"app.h\"\n#include \"app_ble_include.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_hfp.h\"\n#include \"app_sec.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"ble_app_dbg.h\"\n#include \"cmsis_os.h\"\n#include \"co_math.h\" // Common Maths Definition\n#include \"hal_timer.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_ble.h\"\n#include \"rwprf_config.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n\n/************************private macro defination***************************/\n#define DEBUG_BLE_STATE_MACHINE true\n\n#if DEBUG_BLE_STATE_MACHINE\n#define SET_BLE_STATE(newState)                                                \\\n  do {                                                                         \\\n    LOG_I(\"[STATE]%s->%s at line %d\", ble_state2str(bleModeEnv.state),         \\\n          ble_state2str(newState), __LINE__);                                  \\\n    bleModeEnv.state = (newState);                                             \\\n  } while (0);\n\n#define SET_BLE_OP(newOp)                                                      \\\n  do {                                                                         \\\n    LOG_I(\"[OP]%s->%s at line %d\", ble_op2str(bleModeEnv.op),                  \\\n          ble_op2str(newOp), __LINE__);                                        \\\n    bleModeEnv.op = (newOp);                                                   \\\n  } while (0);\n#else\n#define SET_BLE_STATE(newState)                                                \\\n  do {                                                                         \\\n    bleModeEnv.state = (newState);                                             \\\n  } while (0);\n\n#define SET_BLE_OP(newOp)                                                      \\\n  do {                                                                         \\\n    bleModeEnv.op = (newOp);                                                   \\\n  } while (0);\n#endif\n\nextern void bt_drv_reg_op_set_rand_seed(uint32_t seed);\n\n/************************private type defination****************************/\n\n/************************extern function declearation***********************/\nextern uint8_t bt_addr[6];\n\n/**********************private function declearation************************/\n/*---------------------------------------------------------------------------\n *            ble_state2str\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    get the string of the ble state\n *\n * Parameters:\n *    state - state to get string\n *\n * Return:\n *    the string of the BLE state\n */\nstatic char *ble_state2str(uint8_t state);\n\n/*---------------------------------------------------------------------------\n *            ble_op2str\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    get the string of the ble operation\n *\n * Parameters:\n *    op - operation to get string\n *\n * Return:\n *    the string of the BLE operation\n */\nstatic char *ble_op2str(uint8_t op);\n\n/*---------------------------------------------------------------------------\n *            ble_adv_user2str\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    get the string of the ble_adv_user\n *\n * Parameters:\n *    op - operation to get string\n *\n * Return:\n *    the string of the ble_adv_user\n */\nstatic char *ble_adv_user2str(enum BLE_ADV_USER_E user);\n\n/*---------------------------------------------------------------------------\n *            ble_adv_config_param\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    configure BLE adv related parameter in @advParam for further use\n *\n * Parameters:\n *    advType - advertisment mode, see @ for more info\n *    advInterval - advertisement interval in MS\n *\n * Return:\n *    void\n */\nstatic void ble_adv_config_param(uint8_t advType, uint16_t advInterval);\n\n/*---------------------------------------------------------------------------\n *            ble_adv_is_allowed\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    check if BLE advertisment is allowed or not\n *\n * Parameters:\n *    void\n *\n * Return:\n *    true - if advertisement is allowed\n *    flase -  if adverstisement is not allowed\n */\nstatic bool ble_adv_is_allowed(void);\n\n/*---------------------------------------------------------------------------\n *            ble_start_adv\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    start BLE advertisement\n *\n * Parameters:\n *    param - see @BLE_ADV_PARAM_T to get more info\n *\n * Return:\n *    void\n */\nstatic void ble_start_adv(void *param);\n\n/*---------------------------------------------------------------------------\n *            ble_start_adv_failed_cb\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    callback function of start BLE advertisement failed\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nstatic void ble_start_adv_failed_cb(void);\n\n/*---------------------------------------------------------------------------\n *            ble_start_scan\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    start BLE scan api\n *\n * Parameters:\n *    param - see @BLE_SCAN_PARAM_T to get more info\n *\n * Return:\n *    void\n */\nstatic void ble_start_scan(void *param);\n\n/*---------------------------------------------------------------------------\n *            ble_start_connect\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    start BLE connection\n *\n * Parameters:\n *    bleBdAddr - address of BLE device to connect\n *\n * Return:\n *    void\n */\nstatic void ble_start_connect(uint8_t *bleBdAddr);\n\n/*---------------------------------------------------------------------------\n *            ble_stop_all_activities\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    stop all BLE pending operations, stop ongoing adv and scan\n *    NOTE: will not disconnect BLE connections\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nstatic void ble_stop_all_activities(void);\n\n/*---------------------------------------------------------------------------\n *            ble_execute_pending_op\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    execute pended BLE op\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nstatic void ble_execute_pending_op(void);\n\n/*---------------------------------------------------------------------------\n *            ble_switch_activities\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    switch BLE activities after last state complete\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nstatic void ble_switch_activities(void);\n\n/************************private variable defination************************/\nstatic BLE_MODE_ENV_T bleModeEnv;\nstatic BLE_ADV_PARAM_T advParam;\nstatic BLE_SCAN_PARAM_T scanParam;\n\n/****************************function defination****************************/\n// common used function\n#ifdef USE_LOG_I_ID\nstatic inline char *ble_state2str(uint8_t state) {\n  return (char *)(uint32_t)state;\n}\nstatic inline char *ble_op2str(uint8_t op) { return (char *)(uint32_t)op; }\nstatic inline char *ble_adv_user2str(enum BLE_ADV_USER_E user) {\n  return (char *)(uint32_t)user;\n}\n\n#else\nstatic char *ble_state2str(uint8_t state) {\n  char *str = NULL;\n\n#define CASES(state)                                                           \\\n  case state:                                                                  \\\n    str = \"[\" #state \"]\";                                                      \\\n    break\n\n  switch (state) {\n    CASES(STATE_IDLE);\n    CASES(ADVERTISING);\n    CASES(STARTING_ADV);\n    CASES(STOPPING_ADV);\n    CASES(SCANNING);\n    CASES(STARTING_SCAN);\n    CASES(STOPPING_SCAN);\n    CASES(CONNECTING);\n    CASES(STARTING_CONNECT);\n    CASES(STOPPING_CONNECT);\n\n  default:\n    str = \"[INVALID]\";\n    break;\n  }\n\n  return str;\n}\n\nstatic char *ble_op2str(uint8_t op) {\n  char *str = NULL;\n\n#define CASEO(op)                                                              \\\n  case op:                                                                     \\\n    str = \"[\" #op \"]\";                                                         \\\n    break\n\n  switch (op) {\n    CASEO(OP_IDLE);\n    CASEO(START_ADV);\n    CASEO(START_SCAN);\n    CASEO(START_CONNECT);\n    CASEO(STOP_ADV);\n    CASEO(STOP_SCAN);\n    CASEO(STOP_CONNECT);\n\n  default:\n    str = \"[INVALID]\";\n    break;\n  }\n\n  return str;\n}\n\nstatic char *ble_adv_user2str(enum BLE_ADV_USER_E user) {\n#define CASE_S(s)                                                              \\\n  case s:                                                                      \\\n    return \"[\" #s \"]\";\n#define CASE_D()                                                               \\\n  default:                                                                     \\\n    return \"[INVALID]\";\n\n  switch (user) {\n    CASE_S(USER_STUB)\n    CASE_S(USER_GFPS)\n    CASE_S(USER_GSOUND)\n    CASE_S(USER_AI)\n    CASE_S(USER_INTERCONNECTION)\n    CASE_S(USER_TILE)\n    CASE_S(USER_OTA)\n    CASE_D()\n  }\n}\n#endif\n\nvoid app_ble_mode_init(void) {\n  LOG_I(\"%s\", __func__);\n\n  memset(&bleModeEnv, 0, sizeof(bleModeEnv));\n  SET_BLE_STATE(STATE_IDLE);\n  SET_BLE_OP(OP_IDLE);\n\n  bleModeEnv.bleEnv = &app_env;\n}\n\n// ble advertisement used functions\nstatic void ble_adv_config_param(uint8_t advType, uint16_t advInterval) {\n  uint8_t avail_space;\n  memset(&advParam, 0, sizeof(advParam));\n\n  advParam.advType = advType;\n  advParam.advInterval = advInterval;\n  advParam.withFlag = true;\n\n  // connectable adv is not allowed if max connection reaches\n  if (app_is_arrive_at_max_ble_connections() &&\n      (GAPM_ADV_UNDIRECT == advType)) {\n    LOG_W(\"will change adv type to none-connectable because max ble connection \"\n          \"reaches\");\n    advParam.advType = GAPM_ADV_NON_CONN;\n  }\n\n  for (uint8_t user = 0; user < BLE_ADV_USER_NUM; user++) {\n    if (bleModeEnv.bleDataFillFunc[user]) {\n      bleModeEnv.bleDataFillFunc[user]((void *)&advParam);\n\n      // check if the adv/scan_rsp data length is legal\n      if (advParam.withFlag) {\n        ASSERT(BLE_ADV_DATA_WITH_FLAG_LEN >= advParam.advDataLen,\n               \"[BLE][ADV]adv data exceed\");\n      } else {\n        ASSERT(BLE_ADV_DATA_WITHOUT_FLAG_LEN >= advParam.advDataLen,\n               \"[BLE][ADV]adv data exceed\");\n      }\n      ASSERT(SCAN_RSP_DATA_LEN >= advParam.scanRspDataLen,\n             \"[BLE][ADV]scan response data exceed\");\n    }\n  }\n\n  if (advParam.withFlag) {\n    avail_space = BLE_ADV_DATA_WITH_FLAG_LEN - advParam.advDataLen -\n                  BLE_ADV_DATA_STRUCT_HEADER_LEN;\n  } else {\n    avail_space = BLE_ADV_DATA_WITHOUT_FLAG_LEN - advParam.advDataLen -\n                  BLE_ADV_DATA_STRUCT_HEADER_LEN;\n  }\n\n  // Check if data can be added to the adv Data\n  if (avail_space > 2) {\n    avail_space = co_min(avail_space, bleModeEnv.bleEnv->dev_name_len);\n    advParam.advData[advParam.advDataLen++] = avail_space + 1;\n    // Fill Device Name Flag\n    advParam.advData[advParam.advDataLen++] =\n        (avail_space == bleModeEnv.bleEnv->dev_name_len) ? '\\x08' : '\\x09';\n    // Copy device name\n    memcpy(&advParam.advData[advParam.advDataLen], bleModeEnv.bleEnv->dev_name,\n           avail_space);\n    // Update adv Data Length\n    advParam.advDataLen += avail_space;\n  }\n}\n\nstatic bool ble_adv_is_allowed(void) {\n  bool allowed_adv = true;\n  if (!app_is_stack_ready()) {\n    LOG_I(\"reason: stack not ready\");\n    allowed_adv = false;\n  }\n\n  if (app_is_power_off_in_progress()) {\n    LOG_I(\"reason: in power off mode\");\n    allowed_adv = false;\n  }\n\n  if (bleModeEnv.advSwitch) {\n    LOG_I(\"adv switched off:%d\", bleModeEnv.advSwitch);\n    allowed_adv = false;\n  }\n\n  if (btapp_hfp_is_sco_active()) {\n    LOG_I(\"SCO ongoing\");\n    allowed_adv = false;\n  }\n\n  if (false == allowed_adv) {\n    app_ble_stop_activities();\n  }\n\n  return allowed_adv;\n}\n\nstatic void ble_start_adv(void *param) {\n  switch (bleModeEnv.state) {\n  case ADVERTISING:\n    SET_BLE_STATE(STOPPING_ADV);\n    SET_BLE_OP(START_ADV);\n    appm_stop_advertising();\n    break;\n\n  case SCANNING:\n    SET_BLE_STATE(STOPPING_SCAN);\n    SET_BLE_OP(START_ADV);\n    appm_stop_scanning();\n    break;\n\n  case CONNECTING:\n    SET_BLE_STATE(STOPPING_CONNECT);\n    SET_BLE_OP(START_ADV);\n    appm_stop_connecting();\n    break;\n\n  case STARTING_ADV:\n  case STARTING_SCAN:\n  case STARTING_CONNECT:\n  case STOPPING_ADV:\n  case STOPPING_SCAN:\n  case STOPPING_CONNECT:\n    SET_BLE_OP(START_ADV);\n    break;\n\n  case STATE_IDLE:\n    if (!ble_adv_is_allowed()) {\n      LOG_I(\"[ADV] not allowed.\");\n      if (START_ADV == bleModeEnv.op) {\n        SET_BLE_OP(OP_IDLE);\n      }\n      break;\n    }\n\n    memcpy(&bleModeEnv.advInfo, param, sizeof(bleModeEnv.advInfo));\n    appm_start_advertising(&bleModeEnv.advInfo);\n\n    SET_BLE_STATE(STARTING_ADV);\n    break;\n\n  default:\n    break;\n  }\n}\n\nstatic void ble_start_adv_failed_cb(void) {\n  if (STARTING_ADV == bleModeEnv.state) {\n    SET_BLE_STATE(STATE_IDLE);\n  }\n\n  // start pending op(start adv again)\n}\n\nstatic void ble_start_scan(void *param) {\n  switch (bleModeEnv.state) {\n  case ADVERTISING:\n    SET_BLE_STATE(STOPPING_ADV);\n    SET_BLE_OP(START_SCAN);\n    appm_stop_advertising();\n    break;\n\n  case SCANNING:\n    SET_BLE_STATE(STOPPING_SCAN);\n    SET_BLE_OP(START_SCAN);\n    appm_stop_scanning();\n    break;\n\n  case CONNECTING:\n    SET_BLE_STATE(STOPPING_CONNECT);\n    SET_BLE_OP(START_SCAN);\n    appm_stop_connecting();\n    break;\n\n  case STARTING_ADV:\n  case STARTING_SCAN:\n  case STARTING_CONNECT:\n  case STOPPING_ADV:\n  case STOPPING_SCAN:\n  case STOPPING_CONNECT:\n    SET_BLE_OP(START_SCAN);\n    break;\n\n  case STATE_IDLE:\n\n    SET_BLE_STATE(STARTING_SCAN);\n    memcpy(&bleModeEnv.scanInfo, param, sizeof(BLE_SCAN_PARAM_T));\n    appm_start_scanning(bleModeEnv.scanInfo.scanInterval,\n                        bleModeEnv.scanInfo.scanWindow,\n                        bleModeEnv.scanInfo.scanType);\n    break;\n\n  default:\n    break;\n  }\n}\n\nstatic void ble_start_connect(uint8_t *bleBdAddr) {\n  SET_BLE_OP(START_CONNECT);\n\n  if ((CONNECTING != bleModeEnv.state) &&\n      (STARTING_CONNECT != bleModeEnv.state)) {\n    switch (bleModeEnv.state) {\n    case ADVERTISING:\n      SET_BLE_STATE(STOPPING_ADV);\n      appm_stop_advertising();\n      break;\n\n    case SCANNING:\n      SET_BLE_STATE(STOPPING_SCAN);\n      appm_stop_scanning();\n      break;\n\n    case STATE_IDLE:\n      SET_BLE_STATE(STARTING_CONNECT);\n      struct gap_bdaddr bdAddr;\n      memcpy(bdAddr.addr.addr, bleBdAddr, BTIF_BD_ADDR_SIZE);\n      bdAddr.addr_type = 0;\n      LOG_I(\"Master paired with mobile dev is scanned, connect it via BLE.\");\n      appm_start_connecting(&bdAddr);\n      break;\n\n    default:\n      break;\n    }\n  }\n}\n\nstatic void ble_stop_all_activities(void) {\n  switch (bleModeEnv.state) {\n  case ADVERTISING:\n    SET_BLE_OP(OP_IDLE);\n    SET_BLE_STATE(STOPPING_ADV);\n    appm_stop_advertising();\n    break;\n\n  case SCANNING:\n    SET_BLE_OP(OP_IDLE);\n    SET_BLE_STATE(STOPPING_SCAN);\n    appm_stop_scanning();\n    break;\n\n  case CONNECTING:\n    SET_BLE_OP(OP_IDLE);\n    SET_BLE_STATE(STOPPING_CONNECT);\n    appm_stop_connecting();\n    break;\n\n  case STARTING_ADV:\n    SET_BLE_OP(STOP_ADV);\n    break;\n\n  case STARTING_SCAN:\n    SET_BLE_OP(STOP_SCAN);\n    break;\n\n  case STARTING_CONNECT:\n    SET_BLE_OP(STOP_CONNECT);\n    break;\n\n  case STOPPING_ADV:\n  case STOPPING_SCAN:\n  case STOPPING_CONNECT:\n    SET_BLE_OP(OP_IDLE);\n    break;\n\n  default:\n    break;\n  }\n}\n\nstatic void ble_execute_pending_op(void) {\n  LOG_I(\"%s\", __func__);\n  uint8_t op = bleModeEnv.op;\n  SET_BLE_OP(OP_IDLE);\n\n  switch (op) {\n  case START_ADV:\n    ble_start_adv(&advParam);\n    break;\n\n  case START_SCAN:\n    ble_start_scan(&scanParam);\n    break;\n\n  case START_CONNECT:\n    ble_start_connect(bleModeEnv.bleAddrToConnect);\n    break;\n\n  case STOP_ADV:\n  case STOP_SCAN:\n  case STOP_CONNECT:\n    ble_stop_all_activities();\n    break;\n\n  default:\n    break;\n  }\n}\n\nstatic void ble_switch_activities(void) {\n  switch (bleModeEnv.state) {\n  case STARTING_ADV:\n    SET_BLE_STATE(ADVERTISING);\n    break;\n\n  case STARTING_SCAN:\n    SET_BLE_STATE(SCANNING);\n    break;\n\n  case STARTING_CONNECT:\n    SET_BLE_STATE(CONNECTING);\n    break;\n\n  case STOPPING_ADV:\n    SET_BLE_STATE(STATE_IDLE);\n    break;\n\n  case STOPPING_SCAN:\n    SET_BLE_STATE(STATE_IDLE);\n    break;\n\n  case STOPPING_CONNECT:\n    SET_BLE_STATE(STATE_IDLE);\n    break;\n\n  default:\n    break;\n  }\n\n  ble_execute_pending_op();\n}\n\n// BLE advertisement event callbacks\nvoid app_advertising_started(void) {\n  app_bt_start_custom_function_in_bt_thread(0, 0,\n                                            (uint32_t)ble_switch_activities);\n}\n\nvoid app_advertising_starting_failed(void) {\n  memset(&bleModeEnv.advInfo, 0, sizeof(bleModeEnv.advInfo));\n  app_bt_start_custom_function_in_bt_thread(0, 0,\n                                            (uint32_t)ble_start_adv_failed_cb);\n}\n\nvoid app_advertising_stopped(void) {\n  memset(&bleModeEnv.advInfo, 0, sizeof(bleModeEnv.advInfo));\n  app_bt_start_custom_function_in_bt_thread(0, 0,\n                                            (uint32_t)ble_switch_activities);\n}\n\n// BLE adv data updated event callback\nvoid app_adv_data_updated(void) {\n  app_bt_start_custom_function_in_bt_thread(0, 0,\n                                            (uint32_t)ble_switch_activities);\n}\n\n// BLE scan event callbacks\nvoid app_scanning_started(void) {\n  app_bt_start_custom_function_in_bt_thread(0, 0,\n                                            (uint32_t)ble_switch_activities);\n}\n\nvoid app_scanning_stopped(void) {\n  app_bt_start_custom_function_in_bt_thread(0, 0,\n                                            (uint32_t)ble_switch_activities);\n}\n\n// BLE connect event callbacks\nvoid app_connecting_started(void) {\n  app_bt_start_custom_function_in_bt_thread(0, 0,\n                                            (uint32_t)ble_switch_activities);\n}\n\nvoid app_connecting_stopped(void) {\n  app_bt_start_custom_function_in_bt_thread(0, 0,\n                                            (uint32_t)ble_switch_activities);\n}\n\n/**\n * @brief : callback function of BLE connect failed\n *\n */\nstatic void app_ble_connecting_failed_handler(void) {\n  if ((CONNECTING == bleModeEnv.state) ||\n      (STOPPING_CONNECT == bleModeEnv.state) ||\n      (STARTING_CONNECT == bleModeEnv.state)) {\n    SET_BLE_STATE(STATE_IDLE);\n  }\n}\n\nvoid app_connecting_failed(void) {\n  app_bt_start_custom_function_in_bt_thread(\n      0, 0, (uint32_t)app_ble_connecting_failed_handler);\n}\nvoid app_ble_connected_evt_handler(uint8_t conidx,\n                                   const uint8_t *pPeerBdAddress) {\n  ble_evnet_t event;\n\n  if ((ADVERTISING == bleModeEnv.state) || (STARTING_ADV == bleModeEnv.state) ||\n      (CONNECTING == bleModeEnv.state)) {\n    SET_BLE_STATE(STATE_IDLE);\n  }\n\n  if (START_CONNECT == bleModeEnv.op) {\n    SET_BLE_OP(OP_IDLE);\n  }\n\n  event.evt_type = BLE_CONNECT_EVENT;\n  event.p.connect_handled.conidx = conidx;\n  event.p.connect_handled.peer_bdaddr = pPeerBdAddress;\n  app_ble_core_global_handle(&event, NULL);\n\n  app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n  app_stop_fast_connectable_ble_adv_timer();\n}\n\nvoid app_ble_disconnected_evt_handler(uint8_t conidx) {\n  ble_evnet_t event;\n\n  event.evt_type = BLE_DISCONNECT_EVENT;\n  event.p.disconnect_handled.conidx = conidx;\n  app_ble_core_global_handle(&event, NULL);\n\n  app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n}\n\n// BLE APIs for external use\nvoid app_ble_data_fill_enable(enum BLE_ADV_USER_E user, bool enable) {\n  LOG_I(\"%s user %d%s enable %d\", __func__, user, ble_adv_user2str(user),\n        enable);\n\n  ASSERT(user < BLE_ADV_USER_NUM, \"%s user %d\", __func__, user);\n  if (enable) {\n    bleModeEnv.adv_user_enable |= (1 << user);\n  } else {\n    bleModeEnv.adv_user_enable &= ~(1 << user);\n  }\n}\n\nbool app_ble_get_data_fill_enable(enum BLE_ADV_USER_E user) {\n  bool enable = bleModeEnv.adv_user_enable & (1 << user);\n  LOG_I(\"%s user %d enable %d\", __func__, user, enable);\n  return enable;\n}\n\n/**\n * @brief : callback function of BLE scan starting failed\n *\n */\nstatic void app_ble_scanning_starting_failed_handler(void) {\n  if (STARTING_SCAN == bleModeEnv.state) {\n    SET_BLE_STATE(STATE_IDLE);\n  }\n}\n\nvoid app_scanning_starting_failed(void) {\n  app_bt_start_custom_function_in_bt_thread(\n      0, 0, (uint32_t)app_ble_scanning_starting_failed_handler);\n}\n\n// BLE APIs for external use\nvoid app_ble_register_data_fill_handle(enum BLE_ADV_USER_E user,\n                                       BLE_DATA_FILL_FUNC_T func, bool enable) {\n  bool needUpdateAdv = false;\n\n  if (BLE_ADV_USER_NUM <= user) {\n    LOG_W(\"invalid user\");\n  } else {\n    if (func != bleModeEnv.bleDataFillFunc[user] && NULL != func) {\n      needUpdateAdv = true;\n      bleModeEnv.bleDataFillFunc[user] = func;\n    }\n  }\n\n  bleModeEnv.adv_user_register |= (1 << user);\n  if (needUpdateAdv) {\n    app_ble_data_fill_enable(user, enable);\n  }\n}\n\nvoid app_ble_system_ready(void) {\n  uint32_t generatedSeed = hal_sys_timer_get();\n\n  for (uint8_t index = 0; index < sizeof(bt_addr); index++) {\n    generatedSeed ^=\n        (((uint32_t)(bt_addr[index])) << (hal_sys_timer_get() & 0xF));\n  }\n\n  bt_drv_reg_op_set_rand_seed(generatedSeed);\n\n#if defined(ENHANCED_STACK)\n  app_notify_stack_ready(STACK_READY_BLE);\n#else\n  app_notify_stack_ready(STACK_READY_BLE | STACK_READY_BT);\n#endif\n}\n\nstatic void ble_adv_refreshing(void *param) {\n  BLE_ADV_PARAM_T *pAdvParam = (BLE_ADV_PARAM_T *)param;\n  // four conditions that we just need to update the ble adv data instead of\n  // restarting ble adv\n  // 1. BLE advertising is on\n  // 2. No on-going BLE operation\n  // 3. BLE adv type is the same\n  // 4. BLE adv interval is the same\n  if ((ADVERTISING == bleModeEnv.state) && (OP_IDLE == bleModeEnv.op) &&\n      bleModeEnv.advInfo.advType == pAdvParam->advType &&\n      bleModeEnv.advInfo.advInterval == pAdvParam->advInterval) {\n    memcpy(&bleModeEnv.advInfo, param, sizeof(bleModeEnv.advInfo));\n    SET_BLE_STATE(STARTING_ADV);\n    appm_update_adv_data(pAdvParam->advData, pAdvParam->advDataLen,\n                         pAdvParam->scanRspData, pAdvParam->scanRspDataLen);\n  } else {\n    // otherwise, restart ble adv\n    ble_start_adv(param);\n  }\n}\n\nstatic bool app_ble_start_adv(uint8_t advType, uint16_t advInterval) {\n  uint32_t adv_user_enable = bleModeEnv.adv_user_enable;\n  LOG_I(\"[ADV]type:%d, interval:%d ca:%p\", advType, advInterval,\n        __builtin_return_address(0));\n\n  if (!ble_adv_is_allowed()) {\n    LOG_I(\"[ADV] not allowed.\");\n    return false;\n  }\n\n  ble_adv_config_param(advType, advInterval);\n\n  LOG_I(\"%s old_user_enable 0x%x new 0x%x\", __func__, adv_user_enable,\n        bleModeEnv.adv_user_enable);\n  if (!bleModeEnv.adv_user_enable) {\n    LOG_I(\"no adv user enable\");\n    LOG_I(\"[ADV] not allowed.\");\n    app_ble_stop_activities();\n    return false;\n  }\n\n  // param of adv request is exactly same as current adv\n  if (ADVERTISING == bleModeEnv.state &&\n      !memcmp(&bleModeEnv.advInfo, &advParam, sizeof(advParam))) {\n    LOG_I(\"reason: adv param not changed\");\n    LOG_I(\"[ADV] not allowed.\");\n    return false;\n  }\n\n  LOG_I(\"[ADV_LEN] %d [DATA]:\", advParam.advDataLen);\n  DUMP8(\"%02x \", advParam.advData, advParam.advDataLen);\n  LOG_I(\"[SCAN_RSP_LEN] %d [DATA]:\", advParam.scanRspDataLen);\n  DUMP8(\"%02x \", advParam.scanRspData, advParam.scanRspDataLen);\n\n  ble_adv_refreshing(&advParam);\n\n  return true;\n}\n\nvoid app_ble_start_connectable_adv(uint16_t advInterval) {\n  LOG_D(\"%s\", __func__);\n  app_bt_start_custom_function_in_bt_thread((uint32_t)GAPM_ADV_UNDIRECT,\n                                            (uint32_t)advInterval,\n                                            (uint32_t)app_ble_start_adv);\n}\n\nvoid app_ble_refresh_adv_state(uint16_t advInterval) {\n  LOG_D(\"%s\", __func__);\n  app_bt_start_custom_function_in_bt_thread((uint32_t)GAPM_ADV_UNDIRECT,\n                                            (uint32_t)advInterval,\n                                            (uint32_t)app_ble_start_adv);\n}\n\nvoid app_ble_start_scan(enum BLE_SCAN_FILTER_POLICY scanFilterPolicy,\n                        uint16_t scanWindow, uint16_t scanInterval) {\n  scanParam.scanWindow = scanWindow;\n  scanParam.scanInterval = scanInterval;\n  scanParam.scanType = scanFilterPolicy; // BLE_SCAN_ALLOW_ADV_WLST\n\n  app_bt_start_custom_function_in_bt_thread((uint32_t)(&scanParam), 0,\n                                            (uint32_t)ble_start_scan);\n}\n\nvoid app_ble_start_connect(uint8_t *bdAddrToConnect) {\n  memcpy(bleModeEnv.bleAddrToConnect, bdAddrToConnect, BTIF_BD_ADDR_SIZE);\n  app_bt_start_custom_function_in_bt_thread(\n      (uint32_t)bleModeEnv.bleAddrToConnect, 0, (uint32_t)ble_start_connect);\n}\n\nbool app_ble_is_connection_on(uint8_t index) {\n  return (BLE_CONNECTED == bleModeEnv.bleEnv->context[index].connectStatus);\n}\n\nbool app_ble_is_any_connection_exist(void) {\n  bool ret = false;\n  for (uint8_t i = 0; i < BLE_CONNECTION_MAX; i++) {\n    if (app_ble_is_connection_on(i)) {\n      ret = true;\n    }\n  }\n\n  return ret;\n}\n\nvoid app_ble_start_disconnect(uint8_t conIdx) {\n  if (BLE_CONNECTED == bleModeEnv.bleEnv->context[conIdx].connectStatus) {\n    LOG_I(\"will disconnect connection:%d\", conIdx);\n    bleModeEnv.bleEnv->context[conIdx].connectStatus = BLE_DISCONNECTING;\n    app_bt_start_custom_function_in_bt_thread((uint32_t)conIdx, 0,\n                                              (uint32_t)appm_disconnect);\n  } else {\n    LOG_I(\"will not execute disconnect since state is:%d\",\n          bleModeEnv.bleEnv->context[conIdx].connectStatus);\n  }\n}\n\nvoid app_ble_disconnect_all(void) {\n  for (uint8_t i = 0; i < BLE_CONNECTION_MAX; i++) {\n    app_ble_start_disconnect(i);\n  }\n}\n\nvoid app_ble_stop_activities(void) {\n  LOG_I(\"%s %p\", __func__, __builtin_return_address(0));\n\n  app_stop_fast_connectable_ble_adv_timer();\n  if (bleModeEnv.state != OP_IDLE) {\n    app_bt_start_custom_function_in_bt_thread(\n        0, 0, (uint32_t)ble_stop_all_activities);\n  }\n}\n\nvoid app_ble_force_switch_adv(uint8_t user, bool onOff) {\n  ASSERT(user < BLE_SWITCH_USER_NUM, \"ble switch user exceed\");\n\n  if (onOff) {\n    bleModeEnv.advSwitch &= ~(1 << user);\n    app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n  } else if ((bleModeEnv.advSwitch & (1 << user)) == 0) {\n    bleModeEnv.advSwitch |= (1 << user);\n    app_ble_stop_activities();\n\n    // disconnect all of the BLE connections if box is closed\n    if (BLE_SWITCH_USER_BOX == user) {\n      app_ble_disconnect_all();\n    }\n  }\n\n  LOG_I(\"%s user %d onoff %d switch 0x%x\", __func__, user, onOff,\n        bleModeEnv.advSwitch);\n}\n\nbool app_ble_is_in_advertising_state(void) {\n  return (ADVERTISING == bleModeEnv.state) ||\n         (STARTING_ADV == bleModeEnv.state) ||\n         (STOPPING_ADV == bleModeEnv.state);\n}\n\nstatic uint32_t POSSIBLY_UNUSED ble_get_manufacture_data_ptr(\n    uint8_t *advData, uint32_t dataLength, uint8_t *manufactureData) {\n  uint8_t followingDataLengthOfSection;\n  uint8_t rawContentDataLengthOfSection;\n  uint8_t flag;\n  while (dataLength > 0) {\n    followingDataLengthOfSection = *advData++;\n    dataLength--;\n    if (dataLength < followingDataLengthOfSection) {\n      return 0; // wrong adv data format\n    }\n\n    if (followingDataLengthOfSection > 0) {\n      flag = *advData++;\n      dataLength--;\n\n      rawContentDataLengthOfSection = followingDataLengthOfSection - 1;\n      if (BLE_ADV_MANU_FLAG == flag) {\n        uint32_t lengthToCopy;\n        if (dataLength < rawContentDataLengthOfSection) {\n          lengthToCopy = dataLength;\n        } else {\n          lengthToCopy = rawContentDataLengthOfSection;\n        }\n\n        memcpy(manufactureData, advData - 2, lengthToCopy + 2);\n        return lengthToCopy + 2;\n      } else {\n        advData += rawContentDataLengthOfSection;\n        dataLength -= rawContentDataLengthOfSection;\n      }\n    }\n  }\n\n  return 0;\n}\n\n// received adv data\nvoid app_adv_reported_scanned(struct gapm_adv_report_ind *ptInd) {\n  /*\n  LOG_I(\"Scanned RSSI %d BD addr:\", (int8_t)ptInd->report.rssi);\n  DUMP8(\"0x%02x \", ptInd->report.adv_addr.addr, BTIF_BD_ADDR_SIZE);\n  LOG_I(\"Scanned adv data:\");\n  DUMP8(\"0x%02x \", ptInd->report.data, ptInd->report.data_len);\n  */\n\n  ble_adv_data_parse(ptInd->report.adv_addr.addr, (int8_t)ptInd->report.rssi,\n                     ptInd->report.data, (unsigned char)ptInd->report.data_len);\n}\n\nvoid app_ibrt_ui_disconnect_ble(void) { app_ble_disconnect_all(); }\n\nuint32_t app_ble_get_user_register(void) {\n  return bleModeEnv.adv_user_register;\n}\n\nenum BLE_STATE_E app_ble_get_current_state(void) { return bleModeEnv.state; }\n\nenum BLE_OP_E app_ble_get_current_operation(void) { return bleModeEnv.op; }\n\nvoid app_ble_get_runtime_adv_param(uint8_t *pAdvType,\n                                   uint16_t *pAdvIntervalMs) {\n  *pAdvType = advParam.advType;\n  *pAdvIntervalMs = advParam.advInterval;\n}\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_mode_switch.h",
    "content": "/***************************************************************************\n*\n*Copyright 2015-2019 BES.\n*All rights reserved. All unpublished rights reserved.\n*\n*No part of this work may be used or reproduced in any form or by any\n*means, or stored in a database or retrieval system, without prior written\n*permission of BES.\n*\n*Use of this work is governed by a license granted by BES.\n*This work contains confidential and proprietary information of\n*BES. which is protected by copyright, trade secret,\n*trademark and other intellectual property rights.\n*\n****************************************************************************/\n\n#ifndef __APP_BLE_MODE_SWITCH_H__\n#define __APP_BLE_MODE_SWITCH_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*****************************header include********************************/\n#include \"bluetooth.h\"\n#include \"co_bt_defines.h\"\n\n/******************************macro defination*****************************/\n#define BLE_ADV_DATA_STRUCT_HEADER_LEN (2)\n\n#ifndef BLE_CONNECTION_MAX\n#define BLE_CONNECTION_MAX (1)\n#endif\n\n// the default interval is 160ms, note that for Bisto user case, to\n// let GVA iOS version pop-out notification smoothly, the maximum interval should be this value\n#define BLE_ADVERTISING_INTERVAL (160)\n#define BLE_FAST_ADVERTISING_INTERVAL (48)\n\n#define BLE_ADV_SVC_FLAG  0x16\n#define BLE_ADV_MANU_FLAG 0xFF\n\n// Maximal length of the Device Name value\n#define APP_DEVICE_NAME_MAX_LEN      (24)\n\n/******************************type defination******************************/\n/**\n * @brief The state type of the ble\n *\n */\nenum BLE_STATE_E {\n    STATE_IDLE       = 0,\n    ADVERTISING      = 1,\n    STARTING_ADV     = 2,\n    STOPPING_ADV     = 3,\n    SCANNING         = 4,\n    STARTING_SCAN    = 5,\n    STOPPING_SCAN    = 6,\n    CONNECTING       = 7,\n    STARTING_CONNECT = 8,\n    STOPPING_CONNECT = 9,\n};\n\n/**\n * @brief The operation type of the ble\n *\n */\nenum BLE_OP_E {\n    OP_IDLE       = 0,\n    START_ADV     = 1,\n    START_SCAN    = 2,\n    START_CONNECT = 3,\n    STOP_ADV      = 4,\n    STOP_SCAN     = 5,\n    STOP_CONNECT  = 6,\n};\n\nenum BLE_ADV_USER_E {\n    USER_STUB            = 0,\n    USER_GFPS            = 1,\n    USER_GSOUND          = 2,\n    USER_AI              = 3,\n    USER_INTERCONNECTION = 4,\n    USER_TILE            = 5,\n    USER_OTA             = 6,\n    BLE_ADV_USER_NUM,\n};\n\nenum BLE_ADV_SWITCH_USER_E {\n    BLE_SWITCH_USER_RS          = 0, // used for role switch\n    BLE_SWITCH_USER_BOX         = 1, // used for box open/close\n    BLE_SWITCH_USER_AI          = 2, // used for ai\n    BLE_SWITCH_USER_BT_CONNECT  = 3, // used for bt connect\n    BLE_SWITCH_USER_SCO         = 4, // used for sco\n    BLE_SWITCH_USER_IBRT        = 5, // used for ibrt\n\n    BLE_SWITCH_USER_NUM,\n};\n\n//Scan filter policy\nenum BLE_SCAN_FILTER_POLICY {\n    ///Allow advertising packets from anyone\n    BLE_SCAN_ALLOW_ADV_ALL            = 0x00,\n    ///Allow advertising packets from White List devices only\n    BLE_SCAN_ALLOW_ADV_WLST,\n    ///Allow advertising packets from anyone and Direct adv using RPA in InitA\n    BLE_SCAN_ALLOW_ADV_ALL_AND_INIT_RPA,\n    ///Allow advertising packets from White List devices only and Direct adv using RPA in InitA\n    BLE_SCAN_ALLOW_ADV_WLST_AND_INIT_RPA,\n};\n\ntypedef struct {\n    bool withFlag;\n    uint8_t advType;\n    uint16_t advInterval;\n    uint8_t advDataLen;\n    uint8_t advData[BLE_DATA_LEN];\n    uint8_t scanRspDataLen;\n    uint8_t scanRspData[BLE_DATA_LEN];\n} BLE_ADV_PARAM_T;\n\ntypedef void (*BLE_DATA_FILL_FUNC_T)(void *advParam);\n\ntypedef struct {\n    uint8_t scanType;\n    uint16_t scanWindow;\n    uint16_t scanInterval;\n} BLE_SCAN_PARAM_T;\n\ntypedef struct {\n    uint32_t advSwitch;\n    uint8_t state;\n    uint8_t op;\n    uint8_t bleAddrToConnect[BTIF_BD_ADDR_SIZE];\n    uint32_t adv_user_register; //one bit represent one user\n    uint32_t adv_user_enable;   //one bit represent one user\n\n    BLE_DATA_FILL_FUNC_T bleDataFillFunc[BLE_ADV_USER_NUM];\n\n    // param used for BLE adv\n    BLE_ADV_PARAM_T advInfo;\n\n    // prarm used for BLE scan\n    BLE_SCAN_PARAM_T scanInfo;\n\n    // pointer of @see app_env\n    struct app_env_tag *bleEnv;\n} __attribute__((__packed__)) BLE_MODE_ENV_T;\n\n\n/*---------------------------------------------------------------------------\n *            app_ble_mode_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    init the bleModeEnv\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ble_mode_init(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_register_data_fill_handler\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    register a BLE advertisement and scan response data fill handler for a\n *    specific user(see @BLE_ADV_USER_E), so that the adv/scan response data\n *    could present in BLE adv/scan response data\n *\n * Parameters:\n *    user - see the defination in BLE_ADV_USER_E\n *    func - adv/scan response data fill handler for specific user\n *\n * Return:\n *    void\n */\nvoid app_ble_register_data_fill_handle(enum BLE_ADV_USER_E user, BLE_DATA_FILL_FUNC_T func, bool enable);\n\n/*---------------------------------------------------------------------------\n *            app_ble_data_fill_enable\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    enable/disable specific user to fill the adv/scan response data\n *\n * Parameters:\n *    user : user to enable/disable fill data\n *    enable : true - enable user\n *             false - disable user\n *\n * Return:\n *    void\n */\nvoid app_ble_data_fill_enable(enum BLE_ADV_USER_E user, bool enable);\n\n/*---------------------------------------------------------------------------\n *            app_ble_get_data_fill_enable\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    get if specific user is enabled to fill adv/scan response data\n *\n * Parameters:\n *    user : user\n *\n * Return:\n *    true - user is enabled to fill data\n *    false - user is disabled to fill data\n */\nbool app_ble_get_data_fill_enable(enum BLE_ADV_USER_E user);\n\n/*---------------------------------------------------------------------------\n *            app_ble_start_connectable_adv\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    start connetable BLE advertise\n *\n * Parameters:\n *    advertisement interval in ms\n *\n * Return:\n *    None\n */\nvoid app_ble_start_connectable_adv(uint16_t advInterval);\n\n/*---------------------------------------------------------------------------\n *            app_ble_refresh_adv_state\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    refresh adv state\n *\n * Parameters:\n *    advertisement interval in ms\n *\n * Return:\n *    None\n */\nvoid app_ble_refresh_adv_state(uint16_t advInterval);\n\n/*---------------------------------------------------------------------------\n *            app_ble_force_switch_adv\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    enable/disable all BLE adv request for specific UI user\n *\n * Parameters:\n *    user : UI user\n *    onOff : true - enable BLE adv for specific UI user\n *            false -  disable BLE adv for specific UI user\n *\n * Return:\n *    void\n */\nvoid app_ble_force_switch_adv(uint8_t user, bool onOff);\n\n/*---------------------------------------------------------------------------\n *            app_ble_start_scan\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    start BLE scan\n *\n * Parameters:\n *    scanFilterPolicy : Scan filter policy\n *    scanWindow : BLE scan window size(in ms)\n *    scanWnInterval : BLE scan window interval(in ms)\n *\n * Return:\n *    void\n */\nvoid app_ble_start_scan(enum BLE_SCAN_FILTER_POLICY scanFilterPolicy, uint16_t scanWindow, uint16_t scanWnterval);\n\n/*---------------------------------------------------------------------------\n *            app_ble_start_connect\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    start connect BLE with the given address\n *\n * Parameters:\n *    bdAddrToConnect : BLE address to connnect\n *\n * Return:\n *    void\n */\nvoid app_ble_start_connect(uint8_t *bdAddrToConnect);\n\n/*---------------------------------------------------------------------------\n *            app_ble_is_connection_on\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    is a specific BLE connection exist\n *\n * Parameters:\n *    index: Index of the BLE connection to check\n *\n * Return:\n *    true - BLE connection exists\n *    false - BLE connection doesn't exist\n */\nbool app_ble_is_connection_on(uint8_t index);\n\n/*---------------------------------------------------------------------------\n *            app_ble_is_any_connection_exist\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    is there any BLE connection exist\n *\n * Parameters:\n *    void\n *\n * Return:\n *    true - at least one BLE connection exist\n *    false - no BLE connection exists\n */\nbool app_ble_is_any_connection_exist();\n\n/*---------------------------------------------------------------------------\n *            app_ble_start_disconnect\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    disconnect the BLE connection with given connection index\n *\n * Parameters:\n *    conIdx: connection index to disconnect\n *\n * Return:\n *    void\n */\nvoid app_ble_start_disconnect(uint8_t conIdx);\n\n/*---------------------------------------------------------------------------\n *            app_ble_disconnect_all\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    disconnect all BLE connections\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ble_disconnect_all(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_stop_activities\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    stop all BLE activities\n *    NOTE: will not disconnect the existed connections\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_ble_stop_activities(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_is_in_advertising_state\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    is BLE in advertising progress\n *\n * Parameters:\n *    void\n *\n * Return:\n *    true - BLE adv is in progress\n *    false - BLE adv is not in progress\n */\nbool app_ble_is_in_advertising_state(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_get_user_register\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get adv user register\n *\n * Parameters:\n *    void\n *\n * Return:\n *    uint32_t -- adv user register\n */\nuint32_t app_ble_get_user_register(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_get_current_state\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get current ble state\n *\n * Parameters:\n *    void\n *\n * Return:\n *    enum BLE_STATE_E -- ble state\n */\nenum BLE_STATE_E app_ble_get_current_state(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_get_current_operation\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get current ble operation\n *\n * Parameters:\n *    void\n *\n * Return:\n *    enum BLE_OP_E -- ble operation\n */\nenum BLE_OP_E app_ble_get_current_operation(void);\n\n/*---------------------------------------------------------------------------\n *            app_ble_get_runtime_adv_param\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    to get current ble advertising parameters\n *\n * Parameters:\n *    pAdvType: Output pointer of adv type\n *    pAdvIntervalMs: Output pointer of adv internal in ms\n *\n * Return:\n *    void\n */\nvoid app_ble_get_runtime_adv_param(uint8_t* pAdvType, uint16_t* pAdvIntervalMs);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __APP_BLE_MODE_SWITCH_H__ */\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_rx_handler.c",
    "content": "#include \"app_ble_rx_handler.h\"\n#include \"app_bt_func.h\"\n#include \"ble_app_dbg.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom_ble.h\"\n#include \"gsound_service.h\"\n#endif\n\n#define BLE_RX_EVENT_MAX_MAILBOX 16\n#define BLE_RX_BUF_SIZE (2048)\n\nstatic uint8_t app_ble_rx_buf[BLE_RX_BUF_SIZE];\nstatic CQueue app_ble_rx_cqueue;\n\n#define VOICEPATH_COMMON_OTA_BUFF_SIZE 4096\n\nuint8_t *app_voicepath_get_common_ota_databuf(void) {\n  static uint8_t voicepath_common_ota_buf[VOICEPATH_COMMON_OTA_BUFF_SIZE];\n  return voicepath_common_ota_buf;\n}\n\n#ifdef BES_OTA_BASIC\nextern void ota_bes_handle_received_data(uint8_t *otaBuf, bool isViaBle,\n                                         uint16_t dataLenth);\n\n#if defined(IBRT)\n#ifdef IBRT_OTA\nextern void ota_ibrt_handle_received_data(uint8_t *otaBuf, bool isViaBle,\n                                          uint16_t len);\n#endif\n#endif\n\n#endif\n\n#if (BLE_APP_TOTA)\nextern void app_tota_handle_received_data(uint8_t *buffer, uint16_t maxBytes);\n#endif\n\nstatic osThreadId app_ble_rx_thread = NULL;\nstatic bool ble_rx_thread_init_done = false;\n\nextern void gsound_send_control_rx_cfm(uint8_t conidx);\nextern uint8_t app_ota_get_conidx(void);\nextern void app_ota_send_rx_cfm(uint8_t conidx);\n\nstatic void app_ble_rx_handler_thread(const void *arg);\nosThreadDef(app_ble_rx_handler_thread, osPriorityNormal, 1, 2048, \"ble_rx\");\n\nosMailQDef(ble_rx_event_mailbox, BLE_RX_EVENT_MAX_MAILBOX, BLE_RX_EVENT_T);\nstatic osMailQId app_ble_rx_event_mailbox = NULL;\nstatic int32_t app_ble_rx_event_mailbox_init(void) {\n  app_ble_rx_event_mailbox = osMailCreate(osMailQ(ble_rx_event_mailbox), NULL);\n  if (app_ble_rx_event_mailbox == NULL) {\n    LOG_I(\"Failed to Create app_ble_rx_event_mailbox\");\n    return -1;\n  }\n  return 0;\n}\n\nstatic void update_init_state(bool state) { ble_rx_thread_init_done = state; }\n\nstatic bool get_init_state(void) { return ble_rx_thread_init_done; }\n\nstatic void app_ble_rx_mailbox_free(BLE_RX_EVENT_T *rx_event) {\n  osStatus status;\n\n  status = osMailFree(app_ble_rx_event_mailbox, rx_event);\n  ASSERT(osOK == status, \"Free ble rx event mailbox failed!\");\n}\n\nvoid app_ble_rx_handler_init(void) {\n  if (!get_init_state()) {\n    InitCQueue(&app_ble_rx_cqueue, BLE_RX_BUF_SIZE,\n               (CQItemType *)app_ble_rx_buf);\n    app_ble_rx_event_mailbox_init();\n\n    app_ble_rx_thread =\n        osThreadCreate(osThread(app_ble_rx_handler_thread), NULL);\n    update_init_state(true);\n  } else {\n    LOG_I(\"rx already initialized\");\n  }\n}\n\nvoid app_ble_push_rx_data(uint8_t flag, uint8_t conidx, uint8_t *ptr,\n                          uint16_t len) {\n  uint32_t lock = int_lock();\n  int32_t ret = EnCQueue(&app_ble_rx_cqueue, ptr, len);\n  int_unlock(lock);\n  ASSERT(CQ_OK == ret, \"BLE rx buffer overflow! %d,%d\",\n         AvailableOfCQueue(&app_ble_rx_cqueue), len);\n\n  BLE_RX_EVENT_T *event =\n      (BLE_RX_EVENT_T *)osMailAlloc(app_ble_rx_event_mailbox, 0);\n  event->flag = flag;\n  event->conidx = conidx;\n  event->ptr = ptr;\n  event->len = len;\n\n  osMailPut(app_ble_rx_event_mailbox, event);\n}\n\nstatic int32_t app_ble_rx_mailbox_get(BLE_RX_EVENT_T **rx_event) {\n  osEvent evt;\n  evt = osMailGet(app_ble_rx_event_mailbox, osWaitForever);\n  if (evt.status == osEventMail) {\n    *rx_event = (BLE_RX_EVENT_T *)evt.value.p;\n    LOG_I(\"flag %d ptr %p len %d\", (*rx_event)->flag, (*rx_event)->ptr,\n          (*rx_event)->len);\n    return 0;\n  }\n  return -1;\n}\n\nextern int app_ibrt_if_tws_sniff_block(uint32_t block_next_sec);\nstatic void app_ble_rx_handler_thread(void const *argument) {\n  while (true) {\n    BLE_RX_EVENT_T *rx_event = NULL;\n    if (!app_ble_rx_mailbox_get(&rx_event)) {\n      uint8_t tmpData[512];\n      uint32_t lock = int_lock();\n      DeCQueue(&app_ble_rx_cqueue, tmpData, rx_event->len);\n      int_unlock(lock);\n      switch (rx_event->flag) {\n#ifdef BISTO_ENABLED\n      case BLE_RX_DATA_GSOUND_CONTROL:\n#ifdef IBRT\n        app_ibrt_if_tws_sniff_block(5);\n#endif\n        LOG_I(\"gsound processes %d control data.\", rx_event->len);\n        app_gsound_rx_control_data_handler(rx_event->ptr, rx_event->len);\n        break;\n#endif\n#if (BLE_APP_OTA)\n      case BLE_RX_DATA_SELF_OTA:\n#if defined(IBRT)\n#ifdef IBRT_OTA\n        ota_ibrt_handle_received_data(tmpData, true, rx_event->len);\n        app_ota_send_rx_cfm(app_ota_get_conidx());\n#endif\n#else\n        ota_bes_handle_received_data(tmpData, true, rx_event->len);\n#endif\n        break;\n#endif\n#if (BLE_APP_TOTA)\n      case BLE_RX_DATA_SELF_TOTA:\n        app_tota_handle_received_data(tmpData, rx_event->len);\n        break;\n#endif\n      default:\n        break;\n      }\n      app_ble_rx_mailbox_free(rx_event);\n    }\n  }\n}\n"
  },
  {
    "path": "services/ble_app/app_main/app_ble_rx_handler.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BLE_RX_HANDLER_H__\n#define __APP_BLE_RX_HANDLER_H__\n\n#include \"rwapp_config.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif  // #ifdef __cplusplus\n\nenum ble_rx_data_handler_num {\n    BLE_RX_DATA_GSOUND_CONTROL = 0,\n#if (BLE_APP_OTA)\n    BLE_RX_DATA_SELF_OTA,\n#endif\n#if (BLE_APP_TOTA)\n    BLE_RX_DATA_SELF_TOTA,\n#endif\n};\n\ntypedef struct {\n    uint8_t  flag;\n    uint8_t  conidx;\n    uint16_t len;\n    uint8_t *ptr;\n} BLE_RX_EVENT_T;\n\nvoid app_ble_rx_handler_init(void);\n\nvoid app_ble_push_rx_data(uint8_t flag, uint8_t conidx, uint8_t *ptr, uint16_t len);\n\nuint8_t *app_voicepath_get_common_ota_databuf(void);\n\n#ifdef __cplusplus\n}\n#endif  // #ifdef __cplusplus\n\n#endif  // #ifndef __APP_BLE_RX_HANDLER_H__\n"
  },
  {
    "path": "services/ble_app/app_main/app_task.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APPTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_PRESENT)\n\n#include \"../l2cm/l2cm_int.h\"\n#include \"app.h\" // Application Manager Definition\n#include \"app_ble_include.h\"\n#include \"app_task.h\"  // Application Manager Task API\n#include \"arch.h\"      // Platform Definitions\n#include \"gapc_task.h\" // GAP Controller Task API\n#include \"gapm_task.h\" // GAP Manager Task API\n#include \"gattc_task.h\"\n#include \"ke_timer.h\" // Kernel timer\n#include \n\n#include \"co_utils.h\"\n#if (BLE_APP_SEC)\n#include \"app_sec.h\" // Security Module Definition\n#endif               //(BLE_APP_SEC)\n\n#if (BLE_APP_HT)\n#include \"app_ht.h\" // Health Thermometer Module Definition\n#include \"htpt_task.h\"\n#endif //(BLE_APP_HT)\n\n#if (BLE_APP_DIS)\n#include \"app_dis.h\" // Device Information Module Definition\n#include \"diss_task.h\"\n#endif //(BLE_APP_DIS)\n\n#if (BLE_APP_BATT)\n#include \"app_batt.h\" // Battery Module Definition\n#include \"bass_task.h\"\n#endif //(BLE_APP_BATT)\n\n#if (BLE_APP_HID)\n#include \"app_hid.h\" // HID Module Definition\n#include \"hogpd_task.h\"\n#endif //(BLE_APP_HID)\n\n#if (BLE_APP_HR)\n#include \"app_hrps.h\"\n#endif\n\n#if (BLE_APP_VOICEPATH)\n#include \"app_voicepath_ble.h\" // Voice Path Module Definition\n#endif                         // (BLE_APP_VOICEPATH)\n\n#if (BLE_APP_DATAPATH_SERVER)\n#include \"app_datapath_server.h\" // Data Path Server Module Definition\n#include \"datapathps_task.h\"\n#endif // (BLE_APP_DATAPATH_SERVER)\n\n#if (BLE_APP_AI_VOICE)\n#include \"app_ai_ble.h\" // ama Voice Module Definition\n#endif                  // (BLE_APP_AI_VOICE)\n\n#if (BLE_APP_OTA)\n#include \"app_ota.h\" // OTA Module Definition\n#include \"ota_task.h\"\n#endif // (BLE_APP_OTA)\n\n#if (BLE_APP_TOTA)\n#include \"app_tota_ble.h\" // TOTA Module Definition\n#include \"tota_task.h\"\n#endif // (BLE_APP_TOTA)\n\n#if (BLE_APP_ANCC)\n#include \"ancc_task.h\"\n#include \"app_ancc.h\" // ANC Module Definition\n#include \"app_ancc_task.h\"\n#endif // (BLE_APP_ANCC)\n\n#if (BLE_APP_AMS)\n#include \"amsc_task.h\"\n#include \"app_amsc.h\" // AMS Module Definition\n#include \"app_amsc_task.h\"\n#endif // (BLE_APP_AMS)\n#if (BLE_APP_GFPS)\n#include \"app_gfps.h\" // google fast pair service provider\n#include \"gfps_provider_task.h\"\n#endif // (BLE_APP_GFPS)\n#ifdef BLE_APP_AM0\n#include \"am0_app.h\" // Audio Mode 0 Application\n#endif               // defined(BLE_APP_AM0)\n\n#if (DISPLAY_SUPPORT)\n#include \"app_display.h\" // Application Display Definition\n#endif                   //(DISPLAY_SUPPORT)\n\n#include \"app_fp_rfcomm.h\"\n#include \"ble_app_dbg.h\"\n#include \"bt_drv_interface.h\"\n#include \"nvrecord_ble.h\"\n\n#if (BLE_APP_TILE)\n#include \"tile_gatt_server.h\"\n#include \"tile_target_ble.h\"\n#endif\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n#define APP_CONN_PARAM_INTERVEL_MIN (20)\n\nuint8_t ble_stack_ready = 0;\n\nextern bool app_factorymode_get(void);\n\nstatic uint8_t appm_get_handler(const struct ke_state_handler *handler_list,\n                                ke_msg_id_t msgid, void *param,\n                                ke_task_id_t src_id) {\n  // Counter\n  uint8_t counter;\n\n  // Get the message handler function by parsing the message table\n  for (counter = handler_list->msg_cnt; 0 < counter; counter--) {\n    struct ke_msg_handler handler =\n        (struct ke_msg_handler)(*(handler_list->msg_table + counter - 1));\n\n    if ((handler.id == msgid) || (handler.id == KE_MSG_DEFAULT_HANDLER)) {\n      // If handler is NULL, message should not have been received in this state\n      ASSERT_ERR(handler.func);\n\n      return (uint8_t)(handler.func(msgid, param, TASK_APP, src_id));\n    }\n  }\n\n  // If we are here no handler has been found, drop the message\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * MESSAGE HANDLERS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int app_adv_timeout_handler(ke_msg_id_t const msgid, void const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n#if (BLE_APP_HID)\n#else\n  // Stop advertising\n  appm_stop_advertising();\n#endif\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles ready indication from the GAP. - Reset the stack\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gapm_device_ready_ind_handler(ke_msg_id_t const msgid,\n                                         void const *param,\n                                         ke_task_id_t const dest_id,\n                                         ke_task_id_t const src_id) {\n  if (ble_stack_ready) {\n    return KE_MSG_CONSUMED;\n  }\n\n#ifdef __FACTORY_MODE_SUPPORT__\n  if (app_factorymode_get()) {\n    return (KE_MSG_CONSUMED);\n  }\n#endif\n\n  BLE_APP_FUNC_ENTER();\n\n  // Application has not been initialized\n  ASSERT_ERR(ke_state_get(dest_id) == APPM_INIT);\n\n  ble_stack_ready = 1;\n\n  // Reset the stack\n  struct gapm_reset_cmd *cmd =\n      KE_MSG_ALLOC(GAPM_RESET_CMD, TASK_GAPM, TASK_APP, gapm_reset_cmd);\n\n  cmd->operation = GAPM_RESET;\n\n  ke_msg_send(cmd);\n\n  BLE_APP_FUNC_LEAVE();\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles GAP manager command complete events.\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gapm_cmp_evt_handler(ke_msg_id_t const msgid,\n                                struct gapm_cmp_evt const *param,\n                                ke_task_id_t const dest_id,\n                                ke_task_id_t const src_id) {\n  BLE_APP_FUNC_ENTER();\n  BLE_APP_DBG(\"param->operation: %d status is %d app_env.next_svc is %d\",\n              param->operation, param->status, app_env.next_svc);\n\n  switch (param->operation) {\n  // Reset completed\n  case (GAPM_RESET): {\n    if (param->status == GAP_ERR_NO_ERROR) {\n#if (BLE_APP_HID)\n      app_hid_start_mouse();\n#endif //(BLE_APP_HID)\n\n      // Set Device configuration\n      struct gapm_set_dev_config_cmd *cmd =\n          KE_MSG_ALLOC(GAPM_SET_DEV_CONFIG_CMD, TASK_GAPM, TASK_APP,\n                       gapm_set_dev_config_cmd);\n      // Set the operation\n      cmd->operation = GAPM_SET_DEV_CONFIG;\n      // Set the device role - Peripheral\n      cmd->role = GAP_ROLE_ALL;\n      // Set Data length parameters\n      cmd->sugg_max_tx_octets = APP_MAX_TX_OCTETS;\n      cmd->sugg_max_tx_time = APP_MAX_TX_TIME;\n      cmd->pairing_mode = GAPM_PAIRING_LEGACY;\n#ifdef CFG_SEC_CON\n      cmd->pairing_mode |= GAPM_PAIRING_SEC_CON;\n#endif\n      cmd->max_mtu = 512;\n      cmd->att_cfg = 0;\n      cmd->att_cfg |= GAPM_MASK_ATT_SVC_CHG_EN;\n#if (BLE_APP_HID)\n      // Enable Slave Preferred Connection Parameters present\n      cmd->att_cfg |= GAPM_MASK_ATT_SLV_PREF_CON_PAR_EN;\n#endif //(BLE_APP_HID)\n\n#ifdef BLE_APP_AM0\n      cmd->addr_type = GAPM_CFG_ADDR_HOST_PRIVACY;\n      cmd->audio_cfg = GAPM_MASK_AUDIO_AM0_SUP;\n#endif // BLE_APP_AM0\n\n      // load IRK\n      memcpy(cmd->irk.key, app_env.loc_irk, KEY_LEN);\n\n      // Send message\n      ke_msg_send(cmd);\n    } else {\n      ASSERT_ERR(0);\n    }\n  } break;\n  case (GAPM_PROFILE_TASK_ADD): {\n    // ASSERT_INFO(param->status == GAP_ERR_NO_ERROR, param->operation,\n    // param->status); Add the next requested service\n    if (!appm_add_svc()) {\n      // Go to the ready state\n      ke_state_set(TASK_APP, APPM_READY);\n\n      // No more service to add\n      app_ble_system_ready();\n    }\n  } break;\n  // Device Configuration updated\n  case (GAPM_SET_DEV_CONFIG): {\n    ASSERT_INFO(param->status == GAP_ERR_NO_ERROR, param->operation,\n                param->status);\n\n    // Go to the create db state\n    ke_state_set(TASK_APP, APPM_CREATE_DB);\n\n    // Add the first required service in the database\n    // and wait for the PROFILE_ADDED_IND\n    appm_add_svc();\n  } break;\n\n  case (GAPM_ADV_NON_CONN):\n  case (GAPM_ADV_UNDIRECT):\n#if !(BLE_APP_HID)\n  case (GAPM_ADV_DIRECT):\n#endif // !(BLE_APP_HID)\n  case (GAPM_ADV_DIRECT_LDC): {\n    LOG_I(\"adv evt cmp status 0x%x\", param->status);\n    ASSERT(GAP_ERR_ADV_DATA_INVALID != param->status,\n           \"The BLE adv data or scan rsp data is invalid! Better check their \"\n           \"length.\");\n\n    if (GAP_ERR_CANCELED == param->status) {\n      app_advertising_stopped();\n    } else if (GAP_ERR_NO_ERROR == param->status) {\n      if (ke_state_get(TASK_APP) == APPM_ADVERTISING) {\n        app_advertising_started();\n      } else {\n        app_advertising_stopped();\n      }\n    } else {\n      app_advertising_starting_failed();\n    }\n\n    break;\n  }\n  case GAPM_UPDATE_ADVERTISE_DATA: {\n    app_adv_data_updated();\n    break;\n  }\n  case GAPM_SCAN_ACTIVE:\n  case GAPM_SCAN_PASSIVE: {\n    LOG_I(\"scan evt cmp status %d\", param->status);\n    if (GAP_ERR_CANCELED == param->status) {\n      app_scanning_stopped();\n    } else if (GAP_ERR_NO_ERROR == param->status) {\n      app_scanning_started();\n    } else {\n      app_scanning_starting_failed();\n    }\n  } break;\n  case GAPM_CONNECTION_DIRECT:\n  case GAPM_CONNECTION_AUTO:\n  case GAPM_CONNECTION_SELECTIVE:\n  case GAPM_CONNECTION_NAME_REQUEST:\n  case GAPM_CONNECTION_GENERAL: {\n    BLE_GAP_DBG(\"connecting cmp status %d\", param->status);\n    if (GAP_ERR_CANCELED == param->status) {\n      app_connecting_stopped();\n    } else if (GAP_ERR_NO_ERROR == param->status) {\n      app_connecting_started();\n    } else {\n      app_connecting_failed();\n    }\n  } break;\n\n#if (BLE_APP_HID)\n  case (GAPM_ADV_DIRECT): {\n    if (param->status == GAP_ERR_TIMEOUT) {\n      ke_state_set(TASK_APP, APPM_READY);\n    }\n  } break;\n#endif //(BLE_APP_HID)\n  case GAPM_RESOLV_ADDR: {\n    LOG_I(\"Resolve result %d\", param->status);\n    if (GAP_ERR_NOT_FOUND == param->status) {\n      appm_random_ble_addr_solved(false, NULL);\n    }\n    break;\n  }\n  default: {\n    // Drop the message\n  } break;\n  }\n\n  BLE_APP_FUNC_LEAVE();\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int gapc_get_dev_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gapc_get_dev_info_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  switch (param->req) {\n  case GAPC_DEV_NAME: {\n    struct gapc_get_dev_info_cfm *cfm =\n        KE_MSG_ALLOC_DYN(GAPC_GET_DEV_INFO_CFM, src_id, dest_id,\n                         gapc_get_dev_info_cfm, APP_DEVICE_NAME_MAX_LEN);\n    cfm->req = param->req;\n    cfm->info.name.length = appm_get_dev_name(cfm->info.name.value);\n\n    // Send message\n    ke_msg_send(cfm);\n  } break;\n\n  case GAPC_DEV_APPEARANCE: {\n    // Allocate message\n    struct gapc_get_dev_info_cfm *cfm = KE_MSG_ALLOC(\n        GAPC_GET_DEV_INFO_CFM, src_id, dest_id, gapc_get_dev_info_cfm);\n    cfm->req = param->req;\n// Set the device appearance\n#if (BLE_APP_HT)\n    // Generic Thermometer - TODO: Use a flag\n    cfm->info.appearance = 728;\n#elif (BLE_APP_HID)\n    // HID Mouse\n    cfm->info.appearance = 962;\n#else\n    // No appearance\n    cfm->info.appearance = 0;\n#endif\n\n    // Send message\n    ke_msg_send(cfm);\n  } break;\n\n  case GAPC_DEV_SLV_PREF_PARAMS: {\n    // Allocate message\n    struct gapc_get_dev_info_cfm *cfm = KE_MSG_ALLOC(\n        GAPC_GET_DEV_INFO_CFM, src_id, dest_id, gapc_get_dev_info_cfm);\n    cfm->req = param->req;\n    // Slave preferred Connection interval Min\n    cfm->info.slv_params.con_intv_min = 8;\n    // Slave preferred Connection interval Max\n    cfm->info.slv_params.con_intv_max = 10;\n    // Slave preferred Connection latency\n    cfm->info.slv_params.slave_latency = 0;\n    // Slave preferred Link supervision timeout\n    cfm->info.slv_params.conn_timeout = 200; // 2s (500*10ms)\n\n    // Send message\n    ke_msg_send(cfm);\n  } break;\n\n  default: /* Do Nothing */\n    break;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n/**\n ****************************************************************************************\n * @brief Handles GAPC_SET_DEV_INFO_REQ_IND message.\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gapc_set_dev_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gapc_set_dev_info_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Set Device configuration\n  struct gapc_set_dev_info_cfm *cfm = KE_MSG_ALLOC(\n      GAPC_SET_DEV_INFO_CFM, src_id, dest_id, gapc_set_dev_info_cfm);\n  // Reject to change parameters\n  cfm->status = GAP_ERR_REJECTED;\n  cfm->req = param->req;\n  // Send message\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic void POSSIBLY_UNUSED gapc_refresh_remote_dev_feature(uint8_t conidx) {\n  // Send a GAPC_GET_INFO_CMD in order to read the device name characteristic\n  // value\n  struct gapc_get_info_cmd *p_cmd =\n      KE_MSG_ALLOC(GAPC_GET_INFO_CMD, KE_BUILD_ID(TASK_GAPC, conidx), TASK_GAPM,\n                   gapc_get_info_cmd);\n\n  // request peer device name.\n  p_cmd->operation = GAPC_GET_PEER_FEATURES;\n\n  // send command\n  ke_msg_send(p_cmd);\n}\n\nstatic void POSSIBLY_UNUSED gpac_exchange_data_packet_length(uint8_t conidx) {\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P)\n  return;\n#endif\n\n  struct gapc_set_le_pkt_size_cmd *set_le_pakt_size_req =\n      KE_MSG_ALLOC(GAPC_SET_LE_PKT_SIZE_CMD, KE_BUILD_ID(TASK_GAPC, conidx),\n                   TASK_APP, gapc_set_le_pkt_size_cmd);\n\n  set_le_pakt_size_req->operation = GAPC_SET_LE_PKT_SIZE;\n  set_le_pakt_size_req->tx_octets = APP_MAX_TX_OCTETS;\n  set_le_pakt_size_req->tx_time = APP_MAX_TX_TIME;\n  // Send message\n  ke_msg_send(set_le_pakt_size_req);\n}\n\nstatic int gapc_peer_features_ind_handler(ke_msg_id_t const msgid,\n                                          struct gapc_peer_features_ind *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  LOG_I(\"Peer dev feature is:\");\n  DUMP8(\"0x%02x \", param->features, GAP_LE_FEATS_LEN);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  if (param->features[0] & GAPC_EXT_DATA_LEN_MASK) {\n    gpac_exchange_data_packet_length(conidx);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\nvoid app_exchange_remote_feature(uint8_t conidx) {\n  APP_BLE_CONN_CONTEXT_T *pContext = &(app_env.context[conidx]);\n\n  LOG_I(\"connectStatus:%d, isFeatureExchanged:%d, isGotSolvedBdAddr:%d\",\n        pContext->connectStatus, pContext->isFeatureExchanged,\n        pContext->isGotSolvedBdAddr);\n\n  if ((BLE_CONNECTED == pContext->connectStatus) &&\n      !pContext->isFeatureExchanged) {\n    if (pContext->isGotSolvedBdAddr) {\n      gapc_refresh_remote_dev_feature(conidx);\n      pContext->isFeatureExchanged = true;\n    }\n  }\n}\n\n/**\n ****************************************************************************************\n * @brief Handles connection complete event from the GAP. Enable all required\n *profiles\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gapc_connection_req_ind_handler(\n    ke_msg_id_t const msgid, struct gapc_connection_req_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  APP_BLE_CONN_CONTEXT_T *pContext = &(app_env.context[conidx]);\n\n  pContext->connectStatus = BLE_CONNECTED;\n\n  APP_BLE_NEGOTIATED_CONN_PARAM_T connParam;\n  connParam.con_interval = param->con_interval;\n  connParam.sup_to = param->sup_to;\n  connParam.con_latency = param->con_latency;\n  app_ble_save_negotiated_conn_param(conidx, &connParam);\n\n  ke_state_set(dest_id, APPM_CONNECTED);\n\n  app_env.conn_cnt++;\n\n  if (app_is_resolving_ble_bd_addr()) {\n    LOG_I(\"A ongoing ble addr solving is in progress, refuse the new \"\n          \"connection.\");\n    appm_disconnect(conidx);\n    return KE_MSG_CONSUMED;\n  }\n\n  LOG_I(\"[CONNECT]device info:\");\n  LOG_I(\"peer addr:\");\n  DUMP8(\"%02x \", param->peer_addr.addr, 6);\n  LOG_I(\"peer addr type:%d\", param->peer_addr_type);\n  LOG_I(\"connection index:%d, isGotSolvedBdAddr:%d\", conidx,\n        pContext->isGotSolvedBdAddr);\n  LOG_I(\"conn interval:%d, timeout:%d\", param->con_interval, param->sup_to);\n\n  BLE_APP_FUNC_ENTER();\n\n  // Check if the received Connection Handle was valid\n  if (conidx != GAP_INVALID_CONIDX) {\n    pContext->peerAddrType = param->peer_addr_type;\n    memcpy(pContext->bdAddr, param->peer_addr.addr, BD_ADDR_LEN);\n\n    // Retrieve the connection info from the parameters\n    pContext->conhdl = param->conhdl;\n\n    if (BLE_RANDOM_ADDR == pContext->peerAddrType) {\n      pContext->isGotSolvedBdAddr = false;\n    } else {\n      pContext->isGotSolvedBdAddr = true;\n    }\n\n    // Clear the advertising timeout timer\n    if (ke_timer_active(APP_ADV_TIMEOUT_TIMER, TASK_APP)) {\n      ke_timer_clear(APP_ADV_TIMEOUT_TIMER, TASK_APP);\n    }\n\n#if (BLE_APP_SEC)\n    app_sec_reset_env_on_connection();\n#endif\n\n    // Send connection confirmation\n    struct gapc_connection_cfm *cfm =\n        KE_MSG_ALLOC(GAPC_CONNECTION_CFM, KE_BUILD_ID(TASK_GAPC, conidx),\n                     TASK_APP, gapc_connection_cfm);\n\n#if (BLE_APP_SEC)\n    cfm->auth = app_sec_get_bond_status() ? BLE_AUTHENTICATION_LEVEL\n                                          : GAP_AUTH_REQ_NO_MITM_NO_BOND;\n#else  // !(BLE_APP_SEC)\n    cfm->auth = GAP_AUTH_REQ_NO_MITM_NO_BOND;\n#endif // (BLE_APP_SEC)\n    // Send the message\n    ke_msg_send(cfm);\n\n    // We are now in connected State\n    ke_state_set(dest_id, APPM_CONNECTED);\n    app_exchange_remote_feature(conidx);\n\n    app_ble_connected_evt_handler(conidx, param->peer_addr.addr);\n  }\n\n#if (BLE_APP_TILE)\n  app_tile_connected_evt_handler(conidx, param);\n#endif\n\n  app_env.context[conidx].connInterval = param->con_interval;\n\n  app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_DEFAULT, true);\n  BLE_APP_FUNC_LEAVE();\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles GAP controller command complete events.\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gapc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                struct gapc_cmp_evt const *param,\n                                ke_task_id_t const dest_id,\n                                ke_task_id_t const src_id) {\n  switch (param->operation) {\n  case (GAPC_UPDATE_PARAMS): {\n    if (param->status != GAP_ERR_NO_ERROR) {\n      //                appm_disconnect();\n    }\n  } break;\n\n  default: {\n  } break;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles disconnection complete event from the GAP.\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GAP).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gapc_disconnect_ind_handler(ke_msg_id_t const msgid,\n                                       struct gapc_disconnect_ind const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  LOG_I(\"[DISCONNECT] device info:\");\n  uint8_t conidx = KE_IDX_GET(src_id);\n  LOG_I(\"connection index:%d, reason:0x%x\", conidx, param->reason);\n\n  app_env.context[conidx].isBdAddrResolvingInProgress = false;\n  app_env.context[conidx].isGotSolvedBdAddr = false;\n\n  app_env.context[conidx].connectStatus = BLE_DISCONNECTED;\n  app_env.context[conidx].isFeatureExchanged = false;\n  app_env.context[conidx].connInterval = 0;\n  l2cm_buffer_reset(conidx);\n\n  // Go to the ready state\n  ke_state_set(TASK_APP, APPM_READY);\n\n  app_env.conn_cnt--;\n\n#if (BLE_VOICEPATH)\n  app_voicepath_disconnected_evt_handler(conidx);\n#endif\n\n#if (BLE_DATAPATH_SERVER)\n  app_datapath_server_disconnected_evt_handler(conidx);\n#endif\n\n#if (BLE_OTA)\n  app_ota_disconnected_evt_handler(conidx);\n#endif\n\n#if (BLE_APP_TOTA)\n  app_tota_disconnected_evt_handler(conidx);\n#endif\n\n#if (BLE_APP_GFPS)\n  app_gfps_disconnected_evt_handler(conidx);\n#endif\n\n#if (BLE_AI_VOICE)\n  app_ai_disconnected_evt_handler(conidx);\n#endif\n\n#if (BLE_APP_TILE)\n  app_tile_disconnected_evt_handler(conidx);\n#endif\n\n  app_ble_disconnected_evt_handler(conidx);\n\n  app_ble_reset_conn_param_mode(conidx);\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int gapm_profile_added_ind_handler(ke_msg_id_t const msgid,\n                                          struct gapm_profile_added_ind *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  LOG_I(\"prf_task_id %d is added.\", param->prf_task_id);\n\n  return KE_MSG_CONSUMED;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of all messages sent from the lower layers to the\n *application\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int appm_msg_handler(ke_msg_id_t const msgid, void *param,\n                            ke_task_id_t const dest_id,\n                            ke_task_id_t const src_id) {\n  // Retrieve identifier of the task from received message\n  ke_task_id_t src_task_id = MSG_T(msgid);\n  // Message policy\n  uint8_t msg_pol = KE_MSG_CONSUMED;\n\n  switch (src_task_id) {\n  case (TASK_ID_GAPC): {\n#if (BLE_APP_SEC)\n    if ((msgid >= GAPC_BOND_CMD) && (msgid <= GAPC_SECURITY_IND)) {\n      // Call the Security Module\n      msg_pol = appm_get_handler(&app_sec_table_handler, msgid, param, src_id);\n    }\n#endif //(BLE_APP_SEC)\n       // else drop the message\n  } break;\n\n  case (TASK_ID_GATTC): {\n    // Service Changed - Drop\n  } break;\n\n#if (BLE_APP_HT)\n  case (TASK_ID_HTPT): {\n    // Call the Health Thermometer Module\n    msg_pol = appm_get_handler(&app_ht_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_HT)\n\n#if (BLE_APP_DIS)\n  case (TASK_ID_DISS): {\n    // Call the Device Information Module\n    msg_pol = appm_get_handler(&app_dis_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_DIS)\n\n#if (BLE_APP_HID)\n  case (TASK_ID_HOGPD): {\n    // Call the HID Module\n    msg_pol = appm_get_handler(&app_hid_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_HID)\n\n#if (BLE_APP_BATT)\n  case (TASK_ID_BASS): {\n    // Call the Battery Module\n    msg_pol = appm_get_handler(&app_batt_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_BATT)\n\n#if defined(BLE_APP_AM0)\n  case (TASK_ID_AM0): {\n    // Call the Audio Mode 0 Module\n    msg_pol = appm_get_handler(&am0_app_table_handler, msgid, param, src_id);\n  } break;\n  case (TASK_ID_AM0_HAS): {\n    // Call the Audio Mode 0 Module\n    msg_pol =\n        appm_get_handler(&am0_app_has_table_handler, msgid, param, src_id);\n  } break;\n#endif // defined(BLE_APP_AM0)\n\n#if (BLE_APP_HR)\n  case (TASK_ID_HRPS): {\n    // Call the HRPS Module\n    msg_pol = appm_get_handler(&app_hrps_table_handler, msgid, param, src_id);\n  } break;\n#endif\n\n#if (BLE_APP_VOICEPATH)\n  case (TASK_ID_VOICEPATH): {\n    // Call the Voice Path Module\n    msg_pol = appm_get_handler(app_voicepath_ble_get_msg_handler_table(), msgid,\n                               param, src_id);\n  } break;\n#endif //(BLE_APP_VOICEPATH)\n\n#if (BLE_APP_DATAPATH_SERVER)\n  case (TASK_ID_DATAPATHPS): {\n    // Call the Data Path Module\n    msg_pol = appm_get_handler(&app_datapath_server_table_handler, msgid, param,\n                               src_id);\n  } break;\n#endif //(BLE_APP_DATAPATH_SERVER)\n#if (BLE_APP_TILE)\n  case (TASK_ID_TILE): {\n    // Call the TILE Module\n    msg_pol = appm_get_handler(&app_tile_table_handler, msgid, param, src_id);\n  } break;\n#endif\n\n#if (BLE_APP_AI_VOICE)\n  case (TASK_ID_AI): {\n    // Call the AI Voice\n    msg_pol = appm_get_handler(app_ai_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_AI_VOICE)\n\n#if (BLE_APP_OTA)\n  case (TASK_ID_OTA): {\n    // Call the OTA\n    msg_pol = appm_get_handler(&app_ota_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_OTA)\n\n#if (BLE_APP_TOTA)\n  case (TASK_ID_TOTA): {\n    // Call the TOTA\n    msg_pol = appm_get_handler(&app_tota_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_TOTA)\n\n#if (BLE_APP_ANCC)\n  case (TASK_ID_ANCC): {\n    // Call the ANCC\n    msg_pol = appm_get_handler(&app_ancc_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_ANCC)\n\n#if (BLE_APP_AMS)\n  case (TASK_ID_AMSC): {\n    // Call the AMS\n    msg_pol = appm_get_handler(&app_amsc_table_handler, msgid, param, src_id);\n  } break;\n#endif //(BLE_APP_AMS)\n#if (BLE_APP_GFPS)\n  case (TASK_ID_GFPSP): {\n    msg_pol = appm_get_handler(&app_gfps_table_handler, msgid, param, src_id);\n  } break;\n#endif\n\n  default: {\n#if (BLE_APP_HT)\n    if (msgid == APP_HT_MEAS_INTV_TIMER) {\n      msg_pol = appm_get_handler(&app_ht_table_handler, msgid, param, src_id);\n    }\n#endif //(BLE_APP_HT)\n\n#if (BLE_APP_HID)\n    if (msgid == APP_HID_MOUSE_TIMEOUT_TIMER) {\n      msg_pol = appm_get_handler(&app_hid_table_handler, msgid, param, src_id);\n    }\n#endif //(BLE_APP_HID)\n  } break;\n  }\n\n  return (msg_pol);\n}\n\nstatic int gapm_adv_report_ind_handler(ke_msg_id_t const msgid,\n                                       struct gapm_adv_report_ind *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  app_adv_reported_scanned(param);\n  return KE_MSG_CONSUMED;\n}\n\nstatic int gapm_addr_solved_ind_handler(ke_msg_id_t const msgid,\n                                        struct gapm_addr_solved_ind *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  /// Indicate that resolvable random address has been solved\n  appm_random_ble_addr_solved(true, param->irk.key);\n  return KE_MSG_CONSUMED;\n}\n\n__STATIC int gattc_mtu_changed_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_mtu_changed_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  LOG_I(\"MTU has been negotiated as %d conidx %d\", param->mtu, conidx);\n\n#if (BLE_APP_DATAPATH_SERVER)\n  app_datapath_server_mtu_exchanged_handler(conidx, param->mtu);\n#endif\n\n#if (BLE_VOICEPATH)\n  app_voicepath_mtu_exchanged_handler(conidx, param->mtu);\n#endif\n\n#if (BLE_OTA)\n  app_ota_mtu_exchanged_handler(conidx, param->mtu);\n#endif\n\n#if (BLE_APP_TOTA)\n  app_tota_mtu_exchanged_handler(conidx, param->mtu);\n#endif\n\n#if (BLE_AI_VOICE)\n  app_ai_mtu_exchanged_handler(conidx, param->mtu);\n#endif\n\n  return (KE_MSG_CONSUMED);\n}\n\n#define APP_CONN_PARAM_INTERVEL_MAX (30)\n__STATIC int gapc_conn_param_update_req_ind_handler(\n    ke_msg_id_t const msgid, struct gapc_param_update_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  bool accept = true;\n  ble_evnet_t event;\n\n  LOG_I(\"Receive the conn param update request: min %d max %d latency %d \"\n        \"timeout %d\",\n        param->intv_min, param->intv_max, param->latency, param->time_out);\n\n  struct gapc_param_update_cfm *cfm = KE_MSG_ALLOC(\n      GAPC_PARAM_UPDATE_CFM, src_id, dest_id, gapc_param_update_cfm);\n\n  event.evt_type = BLE_CONN_PARAM_UPDATE_REQ_EVENT;\n  event.p.conn_param_update_req_handled.intv_min = param->intv_min;\n  event.p.conn_param_update_req_handled.intv_max = param->intv_max;\n  event.p.conn_param_update_req_handled.latency = param->latency;\n  event.p.conn_param_update_req_handled.time_out = param->time_out;\n\n  app_ble_core_global_handle(&event, &accept);\n  LOG_I(\"%s ret %d \", __func__, accept);\n\n  cfm->accept = accept;\n\n#ifdef GFPS_ENABLED\n  // if fastpair doesn't have the requirement of finishing\n  // pairing in a really short period, just comment out this\n  // code block to avoid audio glitch if this event happens during music\n  // playback and interval is smaller than 15ms\n  if (param->intv_min < (uint16_t)(15 / 1.25)) {\n    LOG_I(\"accept\");\n    cfm->accept = true;\n    fp_update_ble_connect_param_start(KE_IDX_GET(src_id));\n  } else {\n    fp_update_ble_connect_param_stop(KE_IDX_GET(src_id));\n  }\n#endif\n\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int gapc_conn_param_updated_handler(ke_msg_id_t const msgid,\n                                           struct gapc_param_updated_ind *param,\n                                           ke_task_id_t const dest_id,\n                                           ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n  LOG_I(\"Conidx %d conn parameter is updated as interval %d timeout %d\", conidx,\n        param->con_interval, param->sup_to);\n\n  APP_BLE_NEGOTIATED_CONN_PARAM_T connParam;\n  connParam.con_interval = param->con_interval;\n  connParam.sup_to = param->sup_to;\n  connParam.con_latency = param->con_latency;\n  app_ble_save_negotiated_conn_param(conidx, &connParam);\n\n#if (BLE_VOICEPATH)\n  app_voicepath_ble_conn_parameter_updated(conidx, param->con_interval,\n                                           param->con_latency);\n#endif\n#if BLE_APP_TILE\n  app_tile_ble_conn_parameter_updated(conidx, param);\n#endif\n\n  app_env.context[conidx].connInterval = param->con_interval;\n\n  if (param->con_interval >= 32) {\n    if (app_ble_is_parameter_mode_enabled(conidx, BLE_CONN_PARAM_MODE_OTA)) {\n      app_ble_parameter_mode_clear(conidx, BLE_CONN_PARAM_MODE_OTA);\n      app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_OTA_SLOWER, true);\n    } else if (app_ble_is_parameter_mode_enabled(\n                   conidx, BLE_CONN_PARAM_MODE_AI_STREAM_ON)) {\n      app_ble_parameter_mode_clear(conidx, BLE_CONN_PARAM_MODE_AI_STREAM_ON);\n      app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_AI_STREAM_ON, true);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int gapm_dev_addr_ind_handler(ke_msg_id_t const msgid,\n                                     struct gapm_dev_bdaddr_ind *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  ble_evnet_t event;\n\n  // Indicate that a new random BD address set in lower layers\n  LOG_I(\"New dev addr:\");\n  DUMP8(\"%02x \", param->addr.addr.addr, 6);\n\n#ifdef GFPS_ENABLED\n  app_fp_msg_send_updated_ble_addr();\n  app_gfps_update_random_salt();\n#endif\n\n  event.evt_type = BLE_SET_RANDOM_BD_ADDR_EVENT;\n  event.p.set_random_bd_addr_handled.new_bdaddr = param->addr.addr.addr;\n  app_ble_core_global_handle(&event, NULL);\n\n  return KE_MSG_CONSUMED;\n}\n\n/*\n * GLOBAL VARIABLES DEFINITION\n ****************************************************************************************\n */\n/* Default State handlers definition. */\nKE_MSG_HANDLER_TAB(appm){\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)appm_msg_handler},\n\n    {APP_ADV_TIMEOUT_TIMER, (ke_msg_func_t)app_adv_timeout_handler},\n\n    {GAPM_DEVICE_READY_IND, (ke_msg_func_t)gapm_device_ready_ind_handler},\n    {GAPM_CMP_EVT, (ke_msg_func_t)gapm_cmp_evt_handler},\n    {GAPC_GET_DEV_INFO_REQ_IND,\n     (ke_msg_func_t)gapc_get_dev_info_req_ind_handler},\n    {GAPC_SET_DEV_INFO_REQ_IND,\n     (ke_msg_func_t)gapc_set_dev_info_req_ind_handler},\n    {GAPC_CONNECTION_REQ_IND, (ke_msg_func_t)gapc_connection_req_ind_handler},\n    {GAPC_CMP_EVT, (ke_msg_func_t)gapc_cmp_evt_handler},\n    {GAPC_DISCONNECT_IND, (ke_msg_func_t)gapc_disconnect_ind_handler},\n    {GAPM_PROFILE_ADDED_IND, (ke_msg_func_t)gapm_profile_added_ind_handler},\n    {GATTC_MTU_CHANGED_IND, (ke_msg_func_t)gattc_mtu_changed_ind_handler},\n    {GAPC_PARAM_UPDATE_REQ_IND,\n     (ke_msg_func_t)gapc_conn_param_update_req_ind_handler},\n    {GAPC_PARAM_UPDATED_IND, (ke_msg_func_t)gapc_conn_param_updated_handler},\n    {GAPM_ADV_REPORT_IND, (ke_msg_func_t)gapm_adv_report_ind_handler},\n    {GAPC_PEER_FEATURES_IND, (ke_msg_func_t)gapc_peer_features_ind_handler},\n    {GAPM_ADDR_SOLVED_IND, (ke_msg_func_t)gapm_addr_solved_ind_handler},\n    {GAPM_DEV_BDADDR_IND, (ke_msg_func_t)gapm_dev_addr_ind_handler},\n};\n\n/* Defines the place holder for the states of all the task instances. */\nke_state_t appm_state[APP_IDX_MAX];\n\nconst struct ke_task_desc TASK_DESC_APP = {appm_msg_handler_tab, appm_state,\n                                           APP_IDX_MAX,\n                                           ARRAY_LEN(appm_msg_handler_tab)};\n\n#endif //(BLE_APP_PRESENT)\n\n/// @} APPTASK\n"
  },
  {
    "path": "services/ble_app/app_main/app_task.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef APP_TASK_H_\n#define APP_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APPTASK Task\n * @ingroup APP\n * @brief Routes ALL messages to/from APP block.\n *\n * The APPTASK is the block responsible for bridging the final application with the\n * RWBLE software host stack. It communicates with the different modules of the BLE host,\n * i.e. @ref SMP, @ref GAP and @ref GATT.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"             // SW configuration\n\n#if (BLE_APP_PRESENT)\n\n#include          // Standard Integer\n#include \"rwip_task.h\"      // Task definitions\n#include \"ke_task.h\"        // Kernel Task\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Number of APP Task Instances\n#define APP_IDX_MAX                 (BLE_CONNECTION_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// States of APP task\nenum appm_state\n{\n    /// Initialization state\n    APPM_INIT,\n    /// Database create state\n    APPM_CREATE_DB,\n    /// Ready State\n    APPM_READY,\n    /// Advertising state\n    APPM_ADVERTISING,\n    /// Scanning state\n    APPM_SCANNING,\n    /// connecting state\n    APPM_CONNECTING,\n    /// Connected state\n    APPM_CONNECTED,\n\n    /// Number of defined states.\n    APPM_STATE_MAX\n};\n\n\n/// APP Task messages\nenum appm_msg\n{\n    APPM_DUMMY_MSG = TASK_FIRST_MSG(TASK_ID_APP),\n\n    /// Timer used to automatically stop advertising\n    APP_ADV_TIMEOUT_TIMER,\n\n    #if (BLE_APP_HT)\n    /// Timer used to refresh the temperature measurement value\n    APP_HT_MEAS_INTV_TIMER,\n    #endif //(BLE_APP_HT)\n\n    #if (BLE_APP_HID)\n    /// Timer used to disconnect the moue if no activity is detecter\n    APP_HID_MOUSE_TIMEOUT_TIMER,\n    #endif //(BLE_APP_HID)\n};\n\n\n\n/// @} APPTASK\n\n#endif //(BLE_APP_PRESENT)\n\n#endif // APP_TASK_H_\n"
  },
  {
    "path": "services/ble_app/app_ota/app_ota.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_OTA)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"app.h\"      // Application Definitions\n#include \"app_ota.h\"  // OTA Application Definitions\n#include \"app_task.h\" // application task definitions\n#include \"arch.h\"     // Platform Definitions\n#include \"co_bt.h\"\n#include \"ota_bes.h\"\n#include \"ota_control.h\"\n#include \"ota_task.h\"\n#include \"prf.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"string.h\"\n\n#include \"app_ble_mode_switch.h\"\n#include \"app_ble_rx_handler.h\"\n#if defined(IBRT)\n#include \"app_tws_ibrt.h\"\n#endif\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\nstruct app_ota_env_tag app_ota_env;\n\nstatic app_ota_tx_done_t ota_data_tx_done_callback = NULL;\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\nvoid app_ota_connected_evt_handler(uint8_t conidx) {\n  app_ota_env.connectionIndex = conidx;\n  app_ota_connected(APP_OTA_CONNECTED);\n  ota_control_set_datapath_type(DATA_PATH_BLE);\n  ota_control_register_transmitter(app_ota_send_notification);\n  l2cap_update_param(conidx, 10, 15, 20000, 0);\n}\n\nvoid app_ota_disconnected_evt_handler(uint8_t conidx) {\n  if (conidx == app_ota_env.connectionIndex) {\n    app_ota_env.connectionIndex = BLE_INVALID_CONNECTION_INDEX;\n    app_ota_env.isNotificationEnabled = false;\n    app_ota_env.mtu[conidx] = 0;\n    app_ota_disconnected(APP_OTA_DISCONNECTED);\n  }\n}\n\nstatic void app_ota_ble_data_fill_handler(void *param) {\n  // normally we won't allow OTA owned adv when there is already\n  // an existing BLE connection. For special requirement, you can\n  // disable this limitation\n  if (app_ble_connection_count() > 0) {\n    app_ble_data_fill_enable(USER_OTA, false);\n    return;\n  }\n\n  bool adv_enable = false;\n\n#if defined(IBRT)\n  if (app_tws_ibrt_get_bt_ctrl_ctx()->init_done) {\n    if (app_tws_ibrt_role_get_callback(NULL) != IBRT_MASTER) {\n      TRACE(2, \"%s role %d isn't MASTER\", __func__,\n            app_tws_ibrt_role_get_callback(NULL));\n    } else if (!app_tws_ibrt_mobile_link_connected()) {\n      TRACE(1, \"%s don't connect mobile\", __func__);\n    } else {\n      adv_enable = true;\n    }\n  }\n#else\n  adv_enable = true;\n#endif\n\n  app_ble_data_fill_enable(USER_OTA, adv_enable);\n}\n\nvoid app_ota_init(void) {\n  // Reset the environment\n  app_ota_env.connectionIndex = BLE_INVALID_CONNECTION_INDEX;\n  app_ota_env.isNotificationEnabled = false;\n  memset((uint8_t *)&(app_ota_env.mtu), 0, sizeof(app_ota_env.mtu));\n\n  app_ble_register_data_fill_handle(\n      USER_OTA, (BLE_DATA_FILL_FUNC_T)app_ota_ble_data_fill_handler, false);\n}\n\nvoid app_ota_add_ota(void) {\n  BLE_APP_DBG(\"app_ota_add_ota\");\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, 0);\n\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_OTA;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nvoid app_ota_send_notification(uint8_t *ptrData, uint32_t length) {\n  TRACE(0, \"Send ota rsp:\");\n  DUMP8(\"%02x \", ptrData, length);\n\n  struct ble_ota_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(OTA_SEND_NOTIFICATION,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_OTA),\n                                   app_ota_env.connectionIndex),\n                       TASK_APP, ble_ota_send_data_req_t, length);\n  req->connecionIndex = app_ota_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n}\n\nvoid app_ota_send_indication(uint8_t *ptrData, uint32_t length) {\n  struct ble_ota_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(OTA_SEND_INDICATION,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_OTA),\n                                   app_ota_env.connectionIndex),\n                       TASK_APP, ble_ota_send_data_req_t, length);\n  req->connecionIndex = app_ota_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n}\n\nstatic int app_ota_msg_handler(ke_msg_id_t const msgid, void const *param,\n                               ke_task_id_t const dest_id,\n                               ke_task_id_t const src_id) {\n  // Do nothing\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_ota_ccc_changed_handler(ke_msg_id_t const msgid,\n                                       struct ble_ota_tx_notif_config_t *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  TRACE(1, \"ota data ccc changed to %d\", param->isNotificationEnabled);\n  app_ota_env.isNotificationEnabled = param->isNotificationEnabled;\n\n  if (app_ota_env.isNotificationEnabled) {\n    if (BLE_INVALID_CONNECTION_INDEX == app_ota_env.connectionIndex) {\n      uint8_t conidx = KE_IDX_GET(src_id);\n      app_ota_connected_evt_handler(conidx);\n\n      if (app_ota_env.mtu[conidx]) {\n        ota_control_update_MTU(app_ota_env.mtu[conidx]);\n      }\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_ota_tx_data_sent_handler(ke_msg_id_t const msgid,\n                                        struct ble_ota_tx_sent_ind_t *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  if (NULL != ota_data_tx_done_callback) {\n    ota_data_tx_done_callback();\n  }\n\n  // ota_data_transmission_done_callback();\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_ota_data_received_handler(ke_msg_id_t const msgid,\n                                         struct ble_ota_rx_data_ind_t *param,\n                                         ke_task_id_t const dest_id,\n                                         ke_task_id_t const src_id) {\n  app_ble_push_rx_data(BLE_RX_DATA_SELF_OTA, app_ota_env.connectionIndex,\n                       param->data, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\nvoid app_ota_register_tx_done(app_ota_tx_done_t callback) {\n  ota_data_tx_done_callback = callback;\n}\n\nvoid app_ota_mtu_exchanged_handler(uint8_t conidx, uint16_t MTU) {\n  if (conidx == app_ota_env.connectionIndex) {\n    ota_control_update_MTU(MTU);\n  } else {\n    app_ota_env.mtu[conidx] = MTU;\n  }\n}\n\nuint8_t app_ota_get_conidx(void) { return app_ota_env.connectionIndex; }\n/*\n * LOCAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_ota_msg_handler_list[] = {\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_ota_msg_handler},\n\n    {OTA_CCC_CHANGED, (ke_msg_func_t)app_ota_ccc_changed_handler},\n    {OTA_TX_DATA_SENT, (ke_msg_func_t)app_ota_tx_data_sent_handler},\n    {OTA_DATA_RECEIVED, (ke_msg_func_t)app_ota_data_received_handler},\n};\n\nconst struct ke_state_handler app_ota_table_handler = {\n    &app_ota_msg_handler_list[0],\n    (sizeof(app_ota_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif // BLE_APP_OTA\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_ota/app_ota.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef APP_OTA_H_\n#define APP_OTA_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @ingroup RICOW\n *\n * @brief OTA Application entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW configuration\n\n#if (BLE_APP_OTA)\n\n#include           // Standard Integer Definition\n#include \"ke_task.h\"\n#include \"app_ble_mode_switch.h\"\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define OTA_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS\t\t25\n#define OTA_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS\t\t30\n#define OTA_HIGH_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS\t5000\n\n#define OTA_LOW_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS\t\t\t400\n#define OTA_LOW_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS\t\t\t500\n#define OTA_LOW_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS\t5000\n\n\nextern struct app_env_tag app_env;\n\n/// health thermometer application environment structure\nstruct app_ota_env_tag\n{\n    uint8_t connectionIndex;\n\tuint8_t\tisNotificationEnabled;\n\tuint16_t mtu[BLE_CONNECTION_MAX];\n};\n\ntypedef void(*app_ota_tx_done_t)(void);\n\n/*\n * GLOBAL VARIABLES DECLARATIONS\n ****************************************************************************************\n */\n\n/// Health Thermomter Application environment\nextern struct app_ota_env_tag app_ota_env;\n\n/// Table of message handlers\nextern const struct ke_state_handler app_ota_table_handler;\n\n/*\n * FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialize DataPath Server Application\n ****************************************************************************************\n */\nvoid app_ota_init(void);\n\nvoid app_ota_add_ota(void);\n\nvoid app_ota_connected_evt_handler(uint8_t conidx);\n\nvoid app_ota_disconnected_evt_handler(uint8_t conidx);\n\nvoid app_ota_send_notification(uint8_t* ptrData, uint32_t length);\n\nvoid app_ota_send_indication(uint8_t* ptrData, uint32_t length);\n\nvoid app_ota_register_tx_done(app_ota_tx_done_t callback);\n\nvoid app_ota_mtu_exchanged_handler(uint8_t conidx, uint16_t MTU);\n\nuint8_t app_ota_get_conidx(void);\n\n#ifdef __cplusplus\n\t}\n#endif\n\n\n#endif //(BLE_APP_OTA)\n\n/// @} APP\n\n#endif // APP_OTA_H_\n"
  },
  {
    "path": "services/ble_app/app_sec/app_sec.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_APP_SEC)\n\n#include \"co_math.h\"\n#include \"gap.h\"       // GAP Definition\n#include \"gapc.h\"      // GAPC Definition\n#include \"gapc_task.h\" // GAP Controller Task API Definition\n#include \"prf_types.h\"\n#include \n\n#include \"app.h\" // Application API Definition\n#include \"app_ble_include.h\"\n#include \"app_sec.h\"  // Application Security API Definition\n#include \"app_task.h\" // Application Manager API Definition\n\n#if (DISPLAY_SUPPORT)\n#include \"app_display.h\" // Display Application Definitions\n#endif                   //(DISPLAY_SUPPORT)\n\n#if (NVDS_SUPPORT)\n#include \"nvds.h\" // NVDS API Definitions\n#endif            //(NVDS_SUPPORT)\n\n#ifdef BLE_APP_AM0\n#include \"am0_app.h\"\n#endif // BLE_APP_AM0\n\n#if (BLE_APP_ANCC)\n#include \"app_ancc.h\" // ANC Module Definition\n#endif                // (BLE_APP_ANCC)\n\n#if (BLE_APP_AMS)\n#include \"app_amsc.h\" // AMS Module Definition\n#endif                // (BLE_APP_AMS)\n\n#include \"app_gfps.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_extension.h\"\n#include \"tgt_hardware.h\"\n\n#ifdef _BLE_NVDS_\n#define BLE_KEY_PRINT\nBleDeviceinfo ble_save_info;\n#endif\n\n#ifdef TWS_SYSTEM_ENABLED\n#include \"app_tws_if.h\"\n#endif\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Application Security Environment Structure\nstruct app_sec_env_tag app_sec_env;\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nvoid app_sec_init(void) {\n#ifdef _BLE_NVDS_\n  if (nv_record_ble_record_Once_a_device_has_been_bonded()) {\n    app_sec_env.bonded = true;\n  } else {\n    app_sec_env.bonded = false;\n  }\n\n  TRACE(2, \"[%s] once bonded:%d\", __func__, app_sec_env.bonded);\n#endif\n}\n\nbool app_sec_get_bond_status(void) { return app_sec_env.bonded; }\n\nvoid app_sec_send_security_req(uint8_t conidx, enum gap_auth authority) {\n  // Send security request\n  struct gapc_security_cmd *cmd =\n      KE_MSG_ALLOC(GAPC_SECURITY_CMD, KE_BUILD_ID(TASK_GAPC, conidx), TASK_APP,\n                   gapc_security_cmd);\n\n  cmd->operation = GAPC_SECURITY_REQ;\n\n  cmd->auth = authority;\n\n  // Send the message\n  ke_msg_send(cmd);\n}\n\n/*\n * MESSAGE HANDLERS\n ****************************************************************************************\n */\n\nstatic int gapc_bond_req_ind_handler(ke_msg_id_t const msgid,\n                                     struct gapc_bond_req_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  TRACE(1, \"Get bond req %d\", param->request);\n\n  // Prepare the GAPC_BOND_CFM message\n  struct gapc_bond_cfm *cfm =\n      KE_MSG_ALLOC(GAPC_BOND_CFM, src_id, TASK_APP, gapc_bond_cfm);\n\n  switch (param->request) {\n  case (GAPC_PAIRING_REQ): {\n    cfm->request = GAPC_PAIRING_RSP;\n\n    cfm->accept = true;\n\n    cfm->data.pairing_feat.auth = BLE_AUTHENTICATION_LEVEL;\n\n#if (BLE_APP_GFPS)\n    cfm->data.pairing_feat.iocap = GAP_IO_CAP_DISPLAY_YES_NO;\n#else\n    cfm->data.pairing_feat.iocap = GAP_IO_CAP_NO_INPUT_NO_OUTPUT;\n#endif\n\n    cfm->data.pairing_feat.key_size = 16;\n    cfm->data.pairing_feat.oob = GAP_OOB_AUTH_DATA_NOT_PRESENT;\n#if (BLE_APP_GFPS)\n    cfm->data.pairing_feat.sec_req = GAP_SEC1_SEC_CON_PAIR_ENC;\n#else\n    cfm->data.pairing_feat.sec_req = GAP_SEC1_NOAUTH_PAIR_ENC;\n#endif\n\n    cfm->data.pairing_feat.ikey_dist =\n        GAP_KDIST_ENCKEY | GAP_KDIST_IDKEY | GAP_KDIST_LINKKEY;\n    cfm->data.pairing_feat.rkey_dist =\n        GAP_KDIST_ENCKEY | GAP_KDIST_IDKEY | GAP_KDIST_LINKKEY;\n  } break;\n\n  case (GAPC_LTK_EXCH): {\n    // Counter\n    uint8_t counter;\n\n    cfm->accept = true;\n    cfm->request = GAPC_LTK_EXCH;\n\n    // Generate all the values\n    cfm->data.ltk.ediv = (uint16_t)co_rand_word();\n\n    for (counter = 0; counter < RAND_NB_LEN; counter++) {\n      cfm->data.ltk.randnb.nb[counter] = (uint8_t)co_rand_word();\n    }\n\n    for (counter = 0; counter < GAP_KEY_LEN; counter++) {\n      cfm->data.ltk.ltk.key[counter] = (uint8_t)co_rand_word();\n    }\n\n#ifdef _BLE_NVDS_\n#ifdef BLE_KEY_PRINT\n    TRACE(0, \"<==============>LTK IS:\");\n    DUMP8(\"%02x \", (uint8_t *)&cfm->data.ltk, 16);\n    TRACE(1, \"<==============>EDIV IS: %04x:\", cfm->data.ltk.ediv);\n    TRACE(0, \"<==============>RANDOM IS:\");\n    DUMP8(\"%02x \", (uint8_t *)&cfm->data.ltk.randnb.nb, 8);\n#endif\n    ble_save_info.EDIV = cfm->data.ltk.ediv;\n    memcpy(&ble_save_info.RANDOM, (uint8_t *)&cfm->data.ltk.randnb.nb, 8);\n    memcpy(&ble_save_info.LTK, (uint8_t *)&cfm->data.ltk, 16);\n\n    ble_save_info.bonded = false;\n#endif\n  } break;\n\n  case (GAPC_IRK_EXCH): {\n    cfm->accept = true;\n    cfm->request = GAPC_IRK_EXCH;\n\n    // Load IRK\n    memcpy(cfm->data.irk.irk.key, app_env.loc_irk, KEY_LEN);\n    // load identity ble address\n    memcpy(cfm->data.irk.addr.addr.addr, ble_addr, BLE_ADDR_SIZE);\n    cfm->data.irk.addr.addr_type = ADDR_PUBLIC;\n  } break;\n  case (GAPC_TK_EXCH): {\n    // Generate a PIN Code- (Between 100000 and 999999)\n    uint32_t pin_code = (100000 + (co_rand_word() % 900000));\n\n    cfm->accept = true;\n    cfm->request = GAPC_TK_EXCH;\n\n    // Set the TK value\n    memset(cfm->data.tk.key, 0, KEY_LEN);\n\n    cfm->data.tk.key[0] = (uint8_t)((pin_code & 0x000000FF) >> 0);\n    cfm->data.tk.key[1] = (uint8_t)((pin_code & 0x0000FF00) >> 8);\n    cfm->data.tk.key[2] = (uint8_t)((pin_code & 0x00FF0000) >> 16);\n    cfm->data.tk.key[3] = (uint8_t)((pin_code & 0xFF000000) >> 24);\n  } break;\n  case GAPC_NC_EXCH:\n    cfm->accept = true;\n    cfm->request = GAPC_NC_EXCH;\n    break;\n  default: {\n    ASSERT_ERR(0);\n  } break;\n  }\n\n  // Send the message\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\nvoid app_sec_reset_env_on_connection(void) {\n#ifdef _BLE_NVDS_\n  memset(&ble_save_info, 0, sizeof(BleDeviceinfo));\n#endif\n}\n\nstatic int gapc_bond_ind_handler(ke_msg_id_t const msgid,\n                                 struct gapc_bond_ind const *param,\n                                 ke_task_id_t const dest_id,\n                                 ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n  switch (param->info) {\n  case (GAPC_PAIRING_SUCCEED): {\n    TRACE(0, \"GAPC_PAIRING_SUCCEED\");\n    // Update the bonding status in the environment\n    app_sec_env.bonded = true;\n#ifdef _BLE_NVDS_\n    ble_save_info.bonded = true;\n\n    if (!nv_record_blerec_add(&ble_save_info)) {\n#ifdef TWS_SYSTEM_ENABLED\n      app_ble_sync_ble_info();\n      TRACE(0, \"BLE NVDS SETUP SUCCESS!!!,the key is the newest\");\n#endif\n    }\n#endif\n    break;\n  }\n  case (GAPC_REPEATED_ATTEMPT): {\n    appm_disconnect(conidx);\n    break;\n  }\n  case (GAPC_IRK_EXCH): {\n    TRACE(0, \"Peer device IRK is:\");\n#ifdef _BLE_NVDS_\n    DUMP8(\"%02x \", param->data.irk.irk.key, BLE_IRK_SIZE);\n    DUMP8(\"%02x \", (uint8_t *)&(param->data.irk.addr), BLE_ADDR_SIZE + 1);\n    app_env.context[conidx].isBdAddrResolvingInProgress = false;\n    app_env.context[conidx].isGotSolvedBdAddr = true;\n    memcpy(app_env.context[conidx].solvedBdAddr, param->data.irk.addr.addr.addr,\n           BLE_ADDR_SIZE);\n    memcpy(ble_save_info.IRK, param->data.irk.irk.key, BLE_IRK_SIZE);\n    memcpy(ble_save_info.peer_bleAddr, param->data.irk.addr.addr.addr,\n           BLE_ADDR_SIZE);\n#endif\n    app_exchange_remote_feature(conidx);\n    break;\n  }\n  case (GAPC_PAIRING_FAILED): {\n    TRACE(1, \"GAPC_PAIRING_FAILED!!! Error code 0x%x\", param->data.reason);\n#ifdef _BLE_NVDS_\n    nv_record_ble_delete_entry(app_env.context[conidx].solvedBdAddr);\n    app_sec_env.bonded = false;\n#endif\n    break;\n  }\n  case GAPC_LTK_EXCH: {\n#ifdef _BLE_NVDS_\n    TRACE(1, \"isLocal %d\", param->data.ltk.isLocal);\n    TRACE(0, \"Peer device LTK is:\");\n\n    DUMP8(\"%02x \", param->data.ltk.ltk.key, BLE_LTK_SIZE);\n    TRACE(1, \"EDIV %04x \", param->data.ltk.ediv);\n    TRACE(0, \"Peer device random number is:\");\n    DUMP8(\"%02x \", param->data.ltk.randnb.nb, BLE_ENC_RANDOM_SIZE);\n\n    if (param->data.ltk.isLocal) {\n      ble_save_info.EDIV = param->data.ltk.ediv;\n      memcpy(&ble_save_info.RANDOM, (uint8_t *)¶m->data.ltk.randnb.nb,\n             BLE_ENC_RANDOM_SIZE);\n      memcpy(&ble_save_info.LTK, (uint8_t *)¶m->data.ltk, BLE_LTK_SIZE);\n    }\n#endif\n    break;\n  }\n  default: {\n    ASSERT_ERR(0);\n    break;\n  }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int gapc_encrypt_req_ind_handler(\n    ke_msg_id_t const msgid, struct gapc_encrypt_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  TRACE(1, \"%s, master ask for LTK TO encrypt!!!!\", __FUNCTION__);\n\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  appm_check_and_resolve_ble_address(conidx);\n\n  if (!app_env.context[conidx].isGotSolvedBdAddr) {\n    return (KE_MSG_SAVED);\n  }\n\n  TRACE(0, \"Random ble address solved. Can rsp enc req.\");\n\n  // Prepare the GAPC_ENCRYPT_CFM message\n  struct gapc_encrypt_cfm *cfm =\n      KE_MSG_ALLOC(GAPC_ENCRYPT_CFM, src_id, TASK_APP, gapc_encrypt_cfm);\n\n  cfm->found = false;\n\n#ifdef _BLE_NVDS_\n\n  struct gapc_ltk ltk;\n\n  bool ret;\n  ret = nv_record_ble_record_find_ltk_through_static_bd_addr(\n      app_env.context[conidx].solvedBdAddr, ltk.ltk.key);\n  if (ret) {\n    TRACE(0, \"FIND LTK SUCCESSED!!!\");\n#ifdef BLE_KEY_PRINT\n    DUMP8(\"%02x \", (uint8_t *)ltk.ltk.key, 16);\n#endif\n    cfm->found = true;\n    cfm->key_size = 16;\n    memcpy(&cfm->ltk, ltk.ltk.key, sizeof(struct gap_sec_key));\n\n  } else {\n    TRACE(0, \"FIND LTK failed!!!\");\n  }\n#endif\n\n  TRACE(2, \"%s app_sec_env.bonded %d\", __FUNCTION__, app_sec_env.bonded);\n\n  // Send the message\n  ke_msg_send(cfm);\n\n  // encryption has been completed, we can start exchanging remote features now\n  app_exchange_remote_feature(conidx);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int gapc_encrypt_ind_handler(ke_msg_id_t const msgid,\n                                    struct gapc_encrypt_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  TRACE(2, \"%s param->auth %d\", __FUNCTION__, param->auth);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_sec_msg_dflt_handler(ke_msg_id_t const msgid, void *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * LOCAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_sec_msg_handler_list[] = {\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_sec_msg_dflt_handler},\n\n    {GAPC_BOND_REQ_IND, (ke_msg_func_t)gapc_bond_req_ind_handler},\n    {GAPC_BOND_IND, (ke_msg_func_t)gapc_bond_ind_handler},\n\n    {GAPC_ENCRYPT_REQ_IND, (ke_msg_func_t)gapc_encrypt_req_ind_handler},\n    {GAPC_ENCRYPT_IND, (ke_msg_func_t)gapc_encrypt_ind_handler},\n};\n\nconst struct ke_state_handler app_sec_table_handler = {\n    &app_sec_msg_handler_list[0],\n    (sizeof(app_sec_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif //(BLE_APP_SEC)\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_sec/app_sec.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/**\n ****************************************************************************************\n * @addtogroup APP_SEC\n * @{\n ****************************************************************************************\n */\n\n#ifndef APP_SEC_H_\n#define APP_SEC_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_APP_SEC)\n\n#include           // Standard Integer Definition\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * STRUCTURES DEFINITIONS\n ****************************************************************************************\n */\n\nstruct app_sec_env_tag\n{\n    // Bond status\n    bool bonded;\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/// Application Security Environment\nextern struct app_sec_env_tag app_sec_env;\n\n/// Table of message handlers\nextern const struct ke_state_handler app_sec_table_handler;\n\n/*\n * GLOBAL FUNCTIONS DECLARATIONS\n ****************************************************************************************\n */\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/**\n ****************************************************************************************\n * @brief Initialize the Application Security Module\n ****************************************************************************************\n */\nvoid app_sec_init(void);\n\n\n#if (NVDS_SUPPORT)\n/**\n ****************************************************************************************\n * @brief Remove all bond data stored in NVDS\n ****************************************************************************************\n */\nvoid app_sec_remove_bond(void);\n#endif //(NVDS_SUPPORT)\n\n/**\n ****************************************************************************************\n * @brief Send a security request to the peer device. This function is used to require the\n * central to start the encryption with a LTK that would have shared during a previous\n * bond procedure.\n *\n * @param[in]   - conidx: Connection Index\n ****************************************************************************************\n */\nvoid app_sec_send_security_req(uint8_t conidx, enum gap_auth authority);\n\nvoid app_sec_reset_env_on_connection(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif //(BLE_APP_SEC)\n\n#endif // APP_SEC_H_\n\n/// @} APP_SEC\n"
  },
  {
    "path": "services/ble_app/app_tota/app_tota_ble.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @{\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\" // SW configuration\n\n#if (BLE_APP_TOTA)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"app.h\" // Application Definitions\n#include \"app_ble_rx_handler.h\"\n#include \"app_task.h\" // application task definitions\n#include \"app_tota.h\"\n#include \"app_tota_ble.h\" // TOTA Application Definitions\n#include \"app_tota_cmd_handler.h\"\n#include \"app_tota_data_handler.h\"\n#include \"arch.h\" // Platform Definitions\n#include \"co_bt.h\"\n#include \"prf.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"string.h\"\n#include \"tota_task.h\"\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\nstruct app_tota_env_tag app_tota_env;\n\nstatic app_tota_tx_done_t tota_data_tx_done_callback = NULL;\n\n/*\n * GLOBAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\nvoid app_tota_connected_evt_handler(uint8_t conidx) {\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  app_tota_env.connectionIndex = conidx;\n  app_tota_update_datapath(APP_TOTA_VIA_NOTIFICATION);\n  // tota_register_transmitter(app_tota_send_notification);\n}\n\nvoid app_tota_disconnected_evt_handler(uint8_t conidx) {\n  TOTA_LOG_DBG(3, \"[%s], condix = %d Index = %d\", __func__, conidx,\n               app_tota_env.connectionIndex);\n  if (conidx == app_tota_env.connectionIndex) {\n    app_tota_env.connectionIndex = BLE_INVALID_CONNECTION_INDEX;\n    app_tota_env.isNotificationEnabled = false;\n    app_tota_env.mtu[conidx] = 0;\n    app_tota_update_datapath(APP_TOTA_PATH_IDLE);\n    // tota_disconnection_handler();\n  }\n}\n\nvoid app_tota_ble_init(void) {\n  app_tota_env.connectionIndex = BLE_INVALID_CONNECTION_INDEX;\n  app_tota_env.isNotificationEnabled = false;\n  memset((uint8_t *)&(app_tota_env.mtu), 0, sizeof(app_tota_env.mtu));\n}\n\nvoid app_tota_add_tota(void) {\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, 0);\n\n  // Fill message\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n\n  req->prf_task_id = TASK_ID_TOTA;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  // Send the message\n  ke_msg_send(req);\n}\n\nvoid app_tota_send_notification(uint8_t *ptrData, uint32_t length) {\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n\n  struct ble_tota_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(TOTA_SEND_NOTIFICATION,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_TOTA),\n                                   app_tota_env.connectionIndex),\n                       TASK_APP, ble_tota_send_data_req_t, length);\n  req->connecionIndex = app_tota_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n}\n\nvoid app_tota_send_indication(uint8_t *ptrData, uint32_t length) {\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  struct ble_tota_send_data_req_t *req =\n      KE_MSG_ALLOC_DYN(TOTA_SEND_INDICATION,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_TOTA),\n                                   app_tota_env.connectionIndex),\n                       TASK_APP, ble_tota_send_data_req_t, length);\n  req->connecionIndex = app_tota_env.connectionIndex;\n  req->length = length;\n  memcpy(req->value, ptrData, length);\n\n  ke_msg_send(req);\n}\n\nstatic int app_tota_msg_handler(ke_msg_id_t const msgid, void const *param,\n                                ke_task_id_t const dest_id,\n                                ke_task_id_t const src_id) {\n  // Do nothing\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  return (KE_MSG_CONSUMED);\n}\n\nvoid tota_update_MTU(uint16_t mtu) {\n  // remove the 3 bytes of overhead\n  app_tota_env.mtu[app_tota_env.connectionIndex] = mtu;\n  TRACE(1, \"updated data packet size is %d\",\n        app_tota_env.mtu[app_tota_env.connectionIndex]);\n}\n\nstatic int app_tota_ccc_changed_handler(\n    ke_msg_id_t const msgid, struct ble_tota_tx_notif_config_t *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  TOTA_LOG_DBG(1, \"tota data ccc changed to %d\", param->isNotificationEnabled);\n  app_tota_env.isNotificationEnabled = param->isNotificationEnabled;\n\n  if (app_tota_env.isNotificationEnabled) {\n    if (BLE_INVALID_CONNECTION_INDEX == app_tota_env.connectionIndex) {\n      uint8_t conidx = KE_IDX_GET(src_id);\n      app_tota_connected_evt_handler(conidx);\n\n      if (app_tota_env.mtu[conidx]) {\n        // tota_update_MTU(app_tota_env.mtu[conidx]);\n      }\n    }\n  } else {\n    app_tota_update_datapath(APP_TOTA_VIA_INDICATION);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_tota_tx_data_sent_handler(ke_msg_id_t const msgid,\n                                         struct ble_tota_tx_sent_ind_t *param,\n                                         ke_task_id_t const dest_id,\n                                         ke_task_id_t const src_id) {\n  if (NULL != tota_data_tx_done_callback) {\n    tota_data_tx_done_callback();\n  }\n\n  // tota_data_transmission_done_callback();\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic int app_tota_data_received_handler(ke_msg_id_t const msgid,\n                                          struct ble_tota_rx_data_ind_t *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  app_ble_push_rx_data(BLE_RX_DATA_SELF_TOTA, app_tota_env.connectionIndex,\n                       param->data, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\nvoid app_tota_register_tx_done(app_tota_tx_done_t callback) {\n  tota_data_tx_done_callback = callback;\n}\n\nvoid app_tota_mtu_exchanged_handler(uint8_t conidx, uint16_t MTU) {\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  if (conidx == app_tota_env.connectionIndex) {\n    tota_update_MTU(MTU);\n  } else {\n    app_tota_env.mtu[conidx] = MTU;\n  }\n}\n\n/*\n * LOCAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nconst struct ke_msg_handler app_tota_msg_handler_list[] = {\n    // Note: first message is latest message checked by kernel so default is put\n    // on top.\n    {KE_MSG_DEFAULT_HANDLER, (ke_msg_func_t)app_tota_msg_handler},\n\n    {TOTA_CCC_CHANGED, (ke_msg_func_t)app_tota_ccc_changed_handler},\n    {TOTA_TX_DATA_SENT, (ke_msg_func_t)app_tota_tx_data_sent_handler},\n    {TOTA_DATA_RECEIVED, (ke_msg_func_t)app_tota_data_received_handler},\n};\n\nconst struct ke_state_handler app_tota_table_handler = {\n    &app_tota_msg_handler_list[0],\n    (sizeof(app_tota_msg_handler_list) / sizeof(struct ke_msg_handler))};\n\n#endif // BLE_APP_TOTA\n\n/// @} APP\n"
  },
  {
    "path": "services/ble_app/app_tota/app_tota_ble.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef APP_TOTA_H_\n#define APP_TOTA_H_\n\n/**\n ****************************************************************************************\n * @addtogroup APP\n * @ingroup RICOW\n *\n * @brief TOTA Application entry point.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // SW configuration\n\n#if (BLE_APP_TOTA)\n\n#include           // Standard Integer Definition\n#include \"ke_task.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define TOTA_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS\t\t25\n#define TOTA_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS\t\t30\n#define TOTA_HIGH_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS\t5000\n\n#define TOTA_LOW_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS\t\t\t400\n#define TOTA_LOW_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS\t\t\t500\n#define TOTA_LOW_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS\t5000\n\n\nextern struct app_env_tag app_env;\n\n/// health thermometer application environment structure\nstruct app_tota_env_tag\n{\n    uint8_t connectionIndex;\n\tuint8_t\tisNotificationEnabled;\n\tuint16_t mtu[BLE_CONNECTION_MAX];\n};\n\ntypedef void(*app_tota_tx_done_t)(void);\n\n/*\n * GLOBAL VARIABLES DECLARATIONS\n ****************************************************************************************\n */\n\n/// Health Thermomter Application environment\nextern struct app_tota_env_tag app_tota_env;\n\n/// Table of message handlers\nextern const struct ke_state_handler app_tota_table_handler;\n\n/*\n * FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialize DataPath Server Application\n ****************************************************************************************\n */\nvoid app_tota_ble_init(void);\n\nvoid app_tota_add_tota(void);\n\nvoid app_tota_connected_evt_handler(uint8_t conidx);\n\nvoid app_tota_disconnected_evt_handler(uint8_t conidx);\n\nvoid app_tota_send_notification(uint8_t* ptrData, uint32_t length);\n\nvoid app_tota_send_indication(uint8_t* ptrData, uint32_t length);\n\nvoid app_tota_register_tx_done(app_tota_tx_done_t callback);\n\nvoid app_tota_mtu_exchanged_handler(uint8_t conidx, uint16_t MTU);\n\n#ifdef __cplusplus\n\t}\n#endif\n\n\n#endif //(BLE_APP_TOTA)\n\n/// @} APP\n\n#endif // APP_TOTA_H_"
  },
  {
    "path": "services/ble_app/app_vob/voice_over_ble.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if __VOICE_OVER_BLE_ENABLED__\n\n#include \"voice_over_ble.h\"\n#include \"Pcm8k_Cvsd.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"app_ble_cmd_handler.h\"\n#include \"app_ble_custom_cmd.h\"\n#include \"app_datapath_server.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_os.h\"\n#include \"hal_iomux.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n\n/**\n * @brief The states of the VOB state machine\n *\n */\ntypedef enum {\n  VOB_STATE_IDLE = 0,\n  VOB_STATE_ADVERTISING,\n  VOB_STATE_STOPPING_ADV,\n  VOB_STATE_ADV_STOPPED,\n  VOB_STATE_CONNECTING,\n  VOB_STATE_STOPPING_CONNECTING,\n  VOB_STATE_CONNECTED,\n  VOB_STATE_DISCONNECTED,\n  VOB_STATE_VOICE_STREAM,\n} VOB_STATE_E;\n\n/**\n * @brief Buffer management of the VOB\n *\n */\ntypedef struct {\n  /**< for SRC: the encoder will encode the PCM data into the audio data and\n     fill them into encodedDataBuf for DST: the received encoded data will be\n     pushed into encodedDataBuf pending for decoding and playing */\n  uint32_t encodedDataIndexToFill;\n\n  /**< for SRC: the BLE will fetch data at this index from the encodedDataBuf\n     and send them for DST: the player will fetch data at this index from the\n     encodedDataBuf, decode them and play */\n  uint32_t encodedDataIndexToFetch;\n\n  uint32_t encodedDataLength;\n\n  uint8_t isCachingDone;\n\n} VOB_DATA_BUF_MANAGEMENT_T;\n\n/**\n * @brief Format of the audio encoder function\n *\n * @param pcmDataPtr\t\tPointer of the input PCM data to be encoded\n * @param pcmDataLen\t\tLength of the input PCM data to be encoded\n * @param encodedDataPtr\tPointer of the output encoded data\n * @param encodedDataLen\tLength of the output encoded data\n *\n */\ntypedef void (*PCM_Encoder_Handler_t)(uint8_t *pcmDataPtr, uint32_t pcmDataLen,\n                                      encodedDataPtr, encodedDataLen);\n\n/**< configure the voice settings   */\n#define VOB_VOICE_BIT_NUMBER (AUD_BITS_16)\n#define VOB_VOICE_SAMPLE_RATE (AUD_SAMPRATE_8000)\n#define VOB_VOICE_VOLUME (10)\n\n/**< signal of the VOB application thread */\n#define VOB_SIGNAL_GET_RESPONSE 0x80\n\n/**< signal of the BLE thread */\n#define BLE_SIGNAL_VOB_GET_ENCODED_AUDIO_DATA 0x01\n#define BLE_SIGNAL_VOB_DATA_SENT_OUT 0x02\n#define BLE_SIGNAL_VOB_RECEIVED_DATA 0x04\n#define BLE_SIGNAL_VOB_CONNECTED 0x08\n#define BLE_SIGNAL_VOB_DISCONNECTED 0x10\n\n/**< for SRC, the buffer is used to save the collected PCM data via the MIC\n     for DST, the buffer is used to save the decoded PCM data pending for\n   playing back*/\n#define VOB_VOICE_PCM_DATA_CHUNK_SIZE (2048)\n#define VOB_VOICE_PCM_DATA_CHUNK_COUNT (8)\n#define VOB_VOICE_PCM_DATA_STORAGE_BUF_SIZE                                    \\\n  (VOB_VOICE_PCM_DATA_CHUNK_SIZE * VOB_VOICE_PCM_DATA_CHUNK_SIZE)\n\n#define VOB_ENCODED_DATA_CACHE_SIZE (2048)\n\n/**< for SRC, the buffer is used to save the encoded audio data,\n     for DST, the buffer is used to save the received encoded audio data via the\n   BLE*/\n#define VOB_ENCODED_DATA_STORAGE_BUF_SIZE (2048 * 2)\n\n/**< timeout in ms of waiting for the response */\n#define VOB_WAITING_RESPONSE_TIMEOUT_IN_MS (5000)\n\n/**< connection parameter */\n#define VOB_CONNECTION_INTERVAL_IN_MS 5\n#define VOB_CONNECTION_SUPERVISION_TIMEOUT_IN_MS 5000\n\n/**< depends on the compression ratio of the codec algrithm */\n/**< now the cvsd is used, so the ratio is 50% */\n#define VOB_PCM_SIZE_TO_AUDIO_SIZE(size) ((size) / 2)\n#define VOB_AUDIO_SIZE_TO_PCM_SIZE(size) ((size)*2)\n\nstatic osThreadId ble_app_tid;\nstatic void ble_app_thread(void const *argument);\nosThreadDef(ble_app_thread, osPriorityNormal, 1, 512, \"ble_app\");\n\n/**< connecting supervisor timer, if timeout happened, the connecting try will\n * be stopped */\n#define VOB_CONNECTING_TIMEOUT_IN_MS (10 * 1000)\nstatic void connecting_supervisor_timer_cb(void const *n);\nosTimerDef(APP_VOB_CONNECTING_SUPERVISOR_TIMER, connecting_supervisor_timer_cb);\nstatic osTimerId vob_connecting_supervisor_timer;\n\n/**< state machine of the VOB */\nstatic VOB_STATE_E vob_state;\n\nstatic VOB_ROLE_E vob_role;\n\n/**< SRC mic stream environment */\nAUDIO_STREAM_ENV_T src_mic_stream_env;\n\n/**< DST speaker stream environment */\nAUDIO_STREAM_ENV_T dst_speaker_stream_env;\n\nVOB_DATA_BUF_MANAGEMENT_T vob_data_management;\n\n/**< mutex of the voice over ble data buffer environment */\nosMutexId vob_env_mutex_id;\nosMutexDef(vob_env_mutex);\n\n#define STREAM_A2DP_SPEAKER 0\n\n#define STREAM_A2DP_PCM_DATA_BUF_SIZE 1024\n#define STREAM_A2DP_ENCODED_DATA_BUF_SIZE 1024\nstatic const VOB_FUNCTIONALITY_CONFIG_T vob_func_config[] = {\n    {STREAM_A2DP_PCM_DATA_BUF_SIZE, STREAM_A2DP_ENCODED_DATA_BUF_SIZE\n\n    },\n};\n\nstatic VOB_DATA_BUF_MANAGEMENT_T stream_a2dp_data_management;\n\n#define STREAM_DATA_PROCESSING_UNIT_IN_BYTES 1024\n\nstruct gap_bdaddr DST_BLE_BdAddr = {{0x11, 0x22, 0x33, 0x44, 0x55, 0x66}, 0};\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n\n#define RESAMPLE_ITER_LEN (128 * 2 * 2)\n\nstatic struct APP_RESAMPLE_T *ble_resample;\n\nstatic int ble_resample_iter(uint8_t *buf, uint32_t len) {\n  uint32_t acquiredPCMDataLength = decode_sbc_frame(buf, len);\n\n  if (acquiredPCMDataLength < len) {\n    TRACE(0, \"Start encoded data caching again.\");\n    stream_a2dp_data_management.isCachingDone = false;\n    return 1;\n  }\n  return 0;\n}\n\n#endif\n\nuint32_t a2dp_audio_prepare_pcm_data(uint8_t *buf, uint32_t len) {\n  if (stream_a2dp_data_management.isCachingDone) {\n    // the caching stage has been done, decode the encoded data and feed the PCM\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n    if (allow_resample) {\n      app_playback_resample_run(ble_resample, buf, len);\n    } else\n#endif\n    {\n      uint32_t acquiredPCMDataLength = decode_sbc_frame(buf, len);\n      // the queued encoded data does't meet the PCM data requirement,\n      // need to cache again\n      if (acquiredPCMDataLength < len) {\n        TRACE(2,\n              \"Need %d PCM data, but the queue encoded data can only provide \"\n              \"%d bytes\",\n              len, acquiredPCMDataLength);\n\n        memset(buf + acquiredPCMDataLength, 0, len - acquiredPCMDataLength);\n\n        TRACE(0, \"Start encoded data caching again.\");\n        stream_a2dp_data_management.isCachingDone = false;\n      }\n    }\n  } else {\n    memset(buf, 0, len);\n  }\n\n  return len;\n}\n\nstatic uint32_t stream_a2dp_speaker_more_pcm_data(uint8_t *buf, uint32_t len) {\n#ifdef BT_XTAL_SYNC\n#ifndef __TWS__\n  bt_xtal_sync(BT_XTAL_SYNC_MODE_MUSIC);\n#endif // #ifndef __TWS__\n#endif // #ifdef BT_XTAL_SYNC\n\n#ifdef __TWS__\n  tws_audout_pcm_more_data(buf, len);\n#else // __TWS__\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n  app_playback_resample_run(ble_resample, buf, len);\n#else\n  a2dp_audio_more_data(buf, len);\n#endif\n\n  app_ring_merge_more_data(buf, len);\n\n#ifdef __AUDIO_OUTPUT_MONO_MODE__\n  merge_stereo_to_mono_16bits((int16_t *)buf, (int16_t *)buf, len / 2);\n#endif // #ifdef __AUDIO_OUTPUT_MONO_MODE__\n\n#endif // #ifdef __TWS__\n\n#if defined(__SW_IIR_EQ_PROCESS__) || defined(__HW_FIR_EQ_PROCESS__) ||        \\\n    defined(__AUDIO_DRC__)\n  // app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_104M);\n\n  audio_process_run(buf, len);\n\n  // app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_52M);\n#endif // #if defined(__SW_IIR_EQ_PROCESS__) || defined(__HW_FIR_EQ_PROCESS__)\n       // || defined(__AUDIO_DRC__)\n\n  return len;\n}\n\nint encoded_data_received(unsigned char *buf, unsigned int len) {\n  int32_t ret, size;\n  LOCK_APP_AUDIO_QUEUE();\n\n  // push the encoded data into the queue\n  ret = APP_AUDIO_EnCQueueByForce(&sbc_queue, buf, len);\n  size = APP_AUDIO_LengthOfCQueue(&sbc_queue);\n  UNLOCK_APP_AUDIO_QUEUE();\n\n  // the queue is full, overwrite the oldest data\n  if (CQ_ERR == ret) {\n    TRACE(0, \"Encoded data cache is overflow.\");\n  }\n\n  if ((!(stream_a2dp_data_management.isCachingDone)) &&\n      (size >= stream_a2dp_data_management.initialCachedEncodedDataSize)) {\n    // the cached encoded data is ready, time to start decoding and feeding to\n    // the codec\n    stream_a2dp_data_management.isCachingDone = true;\n  }\n\n  return 0;\n}\n\n/**\n * @brief Start the A2DP speaker output stream\n *\n */\nvoid kick_off_a2dp_speaker_stream(void) {\n  // clean up the data management structure\n  memset((uint8_t *)&stream_a2dp_data_management, 0,\n         sizeof(stream_a2dp_data_management));\n\n  // prepare the buffer\n  app_audio_mempool_init();\n\n  app_audio_mempool_get_buff(\n      &(stream_a2dp_data_management.pcmDataBuf),\n      vob_func_config[STREAM_A2DP_SPEAKER].pcmDataBufSize);\n  app_audio_mempool_get_buff(\n      &(stream_a2dp_data_management.encodedDataBuf),\n      vob_func_config[STREAM_A2DP_SPEAKER].encodedDataBufSize);\n\n  // acuqire the sufficient system clock\n  app_sysfreq_req(APP_SYSFREQ_VOICE_OVER_BLE, APP_SYSFREQ_52M);\n\n  // create the audio flinger stream\n  struct AF_STREAM_CONFIG_T stream_cfg;\n\n  stream_cfg.bits = stream_a2dp_data_management.pcmBitNumber;\n  stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n  stream_cfg.sample_rate = stream_a2dp_data_management.pcmSampleRate;\n  stream_cfg.vol = VOB_VOICE_VOLUME;\n\n  stream_cfg.device = AUD_STREAM_USE_OPTIMIZED_STREAM;\n\n  stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n  stream_cfg.handler = vob_func_config[STREAM_A2DP_SPEAKER].dataCallback;\n\n  stream_cfg.data_ptr =\n      BT_AUDIO_CACHE_2_UNCACHE(vob_data_management.pcmDataBufSize);\n\n  stream_cfg.data_size = STREAM_DATA_PROCESSING_UNIT_IN_BYTES;\n  stream_cfg.data_chunk_count = 2;\n\n  af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n  af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n}\n\nstatic osThreadId vob_ThreadId;\n\n/**< The negotiated MTU size between SRC and DST */\nstatic uint16_t negotiatedMTUSize;\n\n/**\n * @brief API to send data via BLE\n *\n * @param ptrBuf Pointer of the data to send\n * @param length Length of the data in bytes\n *\n * @return ture if the data is successfully sent out.\n */\nbool ble_send_data(uint8_t *ptrBuf, uint32_t length) {\n  app_datapath_server_send_data(ptrBuf, length);\n  return true;\n}\n\n/**\n * @brief API to receive data via BLE\n *\n * @param ptrBuf Pointer of the data to send\n * @param length Length of the data in bytes\n *\n * @return ture if the data is successfully sent out.\n */\nbool ble_receive_data(uint8_t *ptrBuf, uint32_t length) {}\n\n/**\n * @brief Stop the MIC voice input stream\n *\n */\nvoid vob_stop_mic_input_stream(void) {\n  af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n  af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n\n  // release the acquired system clock\n  app_sysfreq_req(APP_SYSFREQ_VOICE_OVER_BLE, APP_SYSFREQ_32K);\n}\n\n/**\n * @brief Stop the speaker output stream\n *\n */\nvoid vob_stop_speaker_output_stream(void) {\n  af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n  af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n  // release the acquired system clock\n  app_sysfreq_req(APP_SYSFREQ_VOICE_OVER_BLE, APP_SYSFREQ_32K);\n}\n\n/**\n * @brief Stop the voice stream\n *\n */\nstatic void vob_stop_voice_stream(void) {\n  if (VOB_ROLE_SRC == vob_role) {\n    // stop the MIC voice input stream\n    vob_stop_mic_input_stream();\n  } else {\n    // stop the speaker output stream\n    vob_stop_speaker_output_stream();\n  }\n\n  VOB_CMD_RSP_T cmd;\n\n  // send start voice stream command to the DST\n  cmd.magicCode = VOB_MAGICCODE_OF_CMD_RSP;\n  cmd.cmdRspCode = VOB_CMD_STOP_VOICE_STREAM;\n\n  bool ret =\n      ble_send_data((uint8_t *)&cmd, &(((VOB_CMD_RSP_T *)0)->lengthOfParm))\n          ASSERT_SIMPLIFIED(ret);\n\n  // waiting until it recieves the response from the other side or timeout\n  // happens\n  osEvent event =\n      osSignalWait(VOB_SIGNAL_GET_RESPONSE, VOB_WAITING_RESPONSE_TIMEOUT_IN_MS);\n  if (osEventSignal != event.status) {\n    TRACE(0, \"Time-out happens when waiting the response of stopping voice \"\n             \"stream from DST.\");\n  }\n\n  // reset the state anyway\n  vob_state = VOB_STATE_CONNECTED;\n}\n\n/**\n * @brief Handler when receiving the stop the voice stream command\n *\n */\nstatic void vob_receiving_stop_voice_stream_handler(void) {\n  if (VOB_ROLE_SRC == vob_role) {\n    // stop the MIC voice input stream\n    vob_stop_mic_input_stream();\n  } else {\n    // stop the speaker output stream\n    vob_stop_speaker_output_stream();\n  }\n\n  VOB_CMD_RSP_T cmd;\n\n  // send start voice stream command to the DST\n\n  cmd.magicCode = VOB_MAGICCODE_OF_CMD_RSP;\n  cmd.cmdRspCode = VOB_RSP_READY_TO_STOP_VOICE_STREAM;\n\n  bool ret =\n      ble_send_data((uint8_t *)&cmd, &(((VOB_CMD_RSP_T *)0)->lengthOfParm))\n          ASSERT_SIMPLIFIED(ret);\n\n  // reset the state anyway\n  vob_state = VOB_STATE_CONNECTED;\n}\n\n/**\n * @brief Start advertising\n *\n */\nstatic void vob_start_advertising(void) {\n  // start advertising\n  appm_start_advertising();\n\n  vob_state = VOB_STATE_ADVERTISING;\n}\n\n/**\n * @brief Process the recevied audio data from BLE, encode them and feed them to\n * the speaker\n *\n * @param ptrBuf \tPointer of the PCM data buffer to feed.\n * @param length\tLength of the asked PCM data.\n *\n * @return uint32_t 0 means no error happens\n */\nstatic uint32_t vob_need_more_voice_data(uint8_t *ptrBuf, uint32_t length) {\n  if (vob_data_management.isCachingDone) {\n    // caching has been done, can decoded the received encoded data to PCM and\n    // feed them to the buffer\n    uint32_t remainingPCMBytesToFeed = length;\n    uint32_t pcmBytesToDecode;\n    do {\n      pcmBytesToDecode =\n          (remainingPCMBytesToFeed >\n           (2 * MAXNUMOFSAMPLES * src_mic_stream_env.bitNumber / AUD_BITS_8))\n              ? (2 * MAXNUMOFSAMPLES * src_mic_stream_env.bitNumber /\n                 AUD_BITS_8)\n              : remainingPCMBytesToFeed;\n\n      // cvsd's compression ratio is 50%\n      if ((VOB_PCM_SIZE_TO_AUDIO_SIZE(pcmBytesToDecode) +\n           vob_data_management.encodedDataIndexToFetch) >\n          src_mic_stream_env.encodedDataBufSize) {\n        pcmBytesToDecode = VOB_AUDIO_SIZE_TO_PCM_SIZE(\n            src_mic_stream_env.encodedDataBufSize -\n            vob_data_management.encodedDataIndexToFetch);\n      }\n\n      // decode to generate the PCM data\n      CvsdToPcm8k(vob_data_management.encodedDataBuf +\n                      vob_data_management.encodedDataIndexToFetch,\n                  (short *)ptrBuf, pcmBytesToDecode / sizeof(short));\n\n      // update the index\n      ptrBuf += pcmBytesToDecode;\n      remainingPCMBytesToFeed -= pcmBytesToDecode;\n\n      vob_data_management.encodedDataIndexToFetch +=\n          VOB_PCM_SIZE_TO_AUDIO_SIZE(pcmBytesToDecode);\n\n      if (src_mic_stream_env.encodedDataBufSize ==\n          vob_data_management.encodedDataIndexToFetch) {\n        vob_data_management.encodedDataIndexToFetch = 0;\n      }\n\n    } while (remainingPCMBytesToFeed > 0);\n\n    osMutexWait(vob_env_mutex_id, osWaitForever);\n\n    // update the bytes to decode and feed to codec\n    vob_data_management.encodedDataLength -= VOB_PCM_SIZE_TO_AUDIO_SIZE(length);\n\n    osMutexRelease(vob_env_mutex_id);\n  } else {\n    // caching is not done yet, just fill all ZERO\n    memset(ptrBuf, 0, length);\n  }\n\n  return len;\n}\n\n/**\n * @brief Start the speaker output stream\n *\n */\nvoid vob_kick_off_speaker_output_stream(void) {\n  // prepare the memory buffer\n  app_audio_mempool_init();\n  // PCM data buffer\n  app_audio_mempool_get_buff(&(dst_speaker_stream_env.pcmDataBuf),\n                             src_mic_stream_env.pcmDataChunkCount *\n                                 dst_speaker_stream_env.pcmDataChunkSize);\n\n  // encoded data buffer\n  app_audio_mempool_get_buff(&(dst_speaker_stream_env.encodedDataBuf),\n                             dst_speaker_stream_env.encodedDataBufSize);\n\n  // encoded data queue\n  APP_AUDIO_InitCQueue(&(dst_speaker_stream_env.queue),\n                       dst_speaker_stream_env.encodedDataBufSize,\n                       dst_speaker_stream_env.encodedDataBuf);\n\n  // acuqire the sufficient system clock\n  app_sysfreq_req(APP_SYSFREQ_VOICE_OVER_BLE, APP_SYSFREQ_26M);\n\n  // create the audio flinger stream\n  struct AF_STREAM_CONFIG_T stream_cfg;\n\n  stream_cfg.bits = dst_speaker_stream_env.bitNumber;\n  stream_cfg.sample_rate = dst_speaker_stream_env.sampleRate;\n  stream_cfg.channel_num = dst_speaker_stream_env.channelCount;\n  stream_cfg.vol = VOB_VOICE_VOLUME;\n\n  stream_cfg.device = AUD_STREAM_USE_OPTIMIZED_STREAM;\n\n  stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n  stream_cfg.handler = dst_speaker_stream_env.morePcmHandler;\n\n  stream_cfg.data_ptr =\n      BT_AUDIO_CACHE_2_UNCACHE(dst_speaker_stream_env.pcmDataBuf);\n  stream_cfg.data_size = dst_speaker_stream_env.pcmDataChunkSize;\n\n  af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n  af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n}\n\n/**\n * @brief Send the encoded audio data to DST via BLE\n *\n */\nstatic void vob_send_encoded_audio_data(void) {\n  uint32_t dataBytesToSend = 0;\n  uint32_t offsetInEncodedDatabuf = vob_data_management.indexToFetch;\n\n  osMutexWait(vob_env_mutex_id, osWaitForever);\n\n  if (vob_data_management.encodedDataLength > 0) {\n    if (vob_data_management.encodedDataLength > negotiatedMTUSize) {\n      dataBytesToSend = negotiatedMTUSize;\n    } else {\n      dataBytesToSend = vob_data_management.encodedDataLength;\n    }\n\n    if ((vob_data_management.indexToFetch + dataBytesToSend) >\n        src_mic_stream_env.encodedDataBufSize) {\n      dataBytesToSend = src_mic_stream_env.encodedDataBufSize -\n                        vob_data_management.indexToFetch;\n    }\n\n    // update the index\n    vob_data_management.encodedDataLength += dataBytesToSend;\n    if (src_mic_stream_env.encodedDataBufSize ==\n        (vob_data_management.indexToFetch + dataBytesToSend)) {\n      vob_data_management.indexToFetch = 0;\n    } else {\n      vob_data_management.indexToFetch += dataBytesToSend;\n    }\n  }\n\n  osMutexRelease(vob_env_mutex_id);\n\n  if (dataBytesToSend > 0) {\n    // send out the data via the BLE\n    ble_send_data((vob_data_management.encodedDataBuf + offsetInEncodedDatabuf),\n                  dataBytesToSend);\n  }\n}\n\n/**\n * @brief Hanlder of the BLE data sent out event\n *\n */\nvoid vob_data_sent_out_handler(void) { vob_send_encoded_audio_data(); }\n\n/**\n * @brief Hanlder of the response to start VOB voice stream command, called on\n * the SRC side\n *\n */\nvoid vob_start_voice_stream_rsp_handler(BLE_CUSTOM_CMD_RET_STATUS_E retStatus,\n                                        uint8_t *ptrParam, uint32_t paramLen) {\n\n  if (NO_ERROR == retStatus) {\n                TRACE(0,\"voice stream is successfully started!\"\n\n\t\t// kick off the voice input stream from MIC\n        vob_kick_off_mic_input_stream();\n\n        // update the state\n        vob_state = VOB_STATE_VOICE_STREAM;\n  } else {\n                TRACE(0,\"starting voice stream failed!\"\n  }\n}\n\nvoid vob_audio_data_reiceived_handler(uint8_t *ptrBuf, uint32_t length) {\n  // only for DST, receive the encoded audio data\n  if (VOB_ROLE_DST == vob_role) {\n    // push into the encoded data buffer\n    ASSERT((vob_data_management.encodedDataLength + length) <=\n               dst_speaker_stream_env.encodedDataBufSize,\n           \"The left voice over ble buffer space is not suitable for the \"\n           \"coming audio data.\");\n\n    uint32_t bytesToTheEnd = dst_speaker_stream_env.encodedDataBufSize -\n                             vob_data_management.encodedDataIndexToFill;\n    if (length > bytesToTheEnd) {\n      memcpy((dst_speaker_stream_env.encodedDataBuf +\n              vob_data_management.encodedDataIndexToFill),\n             ptrBuf, length);\n    } else {\n      memcpy((dst_speaker_stream_env.encodedDataBuf +\n              vob_data_management.encodedDataIndexToFill),\n             ptrBuf, bytesToTheEnd);\n      memcpy(dst_speaker_stream_env.encodedDataBuf, ptrBuf + bytesToTheEnd,\n             length - bytesToTheEnd);\n    }\n\n    osMutexWait(vob_env_mutex_id, osWaitForever);\n\n    // update the bytes to transmit via BLE\n    vob_data_management.encodedDataLength += length;\n\n    osMutexRelease(vob_env_mutex_id);\n\n    if ((!vob_data_management.isCachingDone) &&\n        (vob_data_management.encodedDataLength >=\n         src_mic_stream_env.cachedEncodedDataSize)) {\n      vob_data_management.isCachingDone = true;\n    }\n  }\n}\n\n/**\n * @brief Hanlder of the start VOB voice stream command, called on the DST side\n *\n */\nvoid vob_start_voice_stream_cmd_handler(uint32_t funcCode, uint8_t *ptrParam,\n                                        uint32_t paramLen) {\n  BLE_CUSTOM_CMD_RET_STATUS_E retStatus = NO_ERROR;\n\n  if (VOB_STATE_CONNECTED == vob_state) {\n    // update the state\n    vob_state = VOB_STATE_VOICE_STREAM;\n\n    // start raw data xfer\n    BLE_control_raw_data_xfer(true);\n\n    // configure raw data handler\n    BLE_set_raw_data_xfer_received_callback(vob_audio_data_reiceived_handler);\n\n    // kick off the speaker stream\n    vob_kick_off_speaker_output_stream();\n  } else {\n    retStatus = HANDLING_FAILED;\n  }\n\n  BLE_send_response_to_command(funcCode, retStatus, NULL,\n                               TRANSMISSION_VIA_WRITE_CMD);\n}\n\n/**\n * @brief Hanlder of the response to stop VOB voice stream command, called on\n * the SRC side\n *\n */\nvoid vob_stop_voice_stream_rsp_handler(BLE_CUSTOM_CMD_RET_STATUS_E retStatus,\n                                       uint8_t *ptrParam, uint32_t paramLen) {\n  // stop the MIC voice input stream\n  vob_stop_mic_input_stream();\n\n  vob_state = VOB_STATE_CONNECTED;\n}\n\n/**\n * @brief Hanlder of the stop VOB voice stream command, called on the DST side\n *\n */\nvoid vob_stop_voice_stream_cmd_handler(uint32_t funcCode, uint8_t *ptrParam,\n                                       uint32_t paramLen) {\n  BLE_CUSTOM_CMD_RET_STATUS_E retStatus = NO_ERROR;\n\n  if (VOB_STATE_VOICE_STREAM == vob_state) {\n    // update the state\n    vob_state = VOB_STATE_CONNECTED;\n\n    // stop raw data xfer\n    BLE_control_raw_data_xfer(false);\n\n    // stop the speaker output stream\n    vob_stop_speaker_output_stream();\n  } else {\n    retStatus = HANDLING_FAILED;\n  }\n\n  BLE_send_response_to_command(funcCode, retStatus, NULL,\n                               TRANSMISSION_VIA_WRITE_CMD);\n}\n\nstatic void vob_encoded_data_sent_done(void) {\n  if ((VOB_STATE_VOICE_STREAM == vob_state) &&\n      (vob_data_management.encodedDataLength > 0)) {\n    // inform the ble application thread to continue sending the encoded data if\n    // any in the buffer\n    osSignalSet(ble_app_tid, BLE_SIGNAL_VOB_DATA_SENT_OUT);\n  }\n}\n\n/**\n * @brief Hanlder of the BLE connected event\n *\n */\nvoid vob_connected_evt_handler(void) {\n  if (VOB_ROLE_SRC == vob_role) {\n    l2cap_update_param(VOB_CONNECTION_INTERVAL_IN_MS,\n                       VOB_CONNECTION_INTERVAL_IN_MS,\n                       VOB_CONNECTION_SUPERVISION_TIMEOUT_IN_MS);\n\n    vob_data_management.encodedDataIndexToFetch = 0;\n    vob_data_management.encodedDataIndexToFill = 0;\n    vob_data_management.encodedDataLength = 0;\n\n    // register the BLE tx done callback function\n    app_datapath_server_register_tx_done(vob_encoded_data_sent_done);\n\n    // delete the timer\n    osTimerDelete(vob_connecting_supervisor_timer);\n  }\n\n  vob_data_management.isCachingDone = false;\n\n  // play the connected sound\n  app_voice_report(APP_STATUS_INDICATION_CONNECTED, 0);\n\n  // update the state\n  vob_state = VOB_STATE_CONNECTED;\n}\n\n/**\n * @brief Hanlder of the BLE disconnected event\n *\n */\nvoid vob_disconnected_evt_handler(void) {\n  ASSERT_SIMPLIFIED((VOB_STATE_VOICE_STREAM == vob_state) ||\n                    (VOB_STATE_CONNECTED == vob_state));\n\n  vob_state = VOB_STATE_DISCONNECTED;\n\n  // stop raw data xfer\n  BLE_control_raw_data_xfer(false);\n\n  // play the disconnected sound\n  app_voice_report(APP_STATUS_INDICATION_DISCONNECTED, 0);\n\n  // stop the voice stream if it's in progress\n  if (VOB_STATE_VOICE_STREAM == vob_state) {\n    if (VOB_ROLE_SRC == vob_role) {\n      vob_stop_mic_input_stream();\n    } else {\n      vob_stop_speaker_output_stream();\n    }\n  }\n\n  if (VOB_ROLE_SRC == vob_role) {\n    // try to re-connect\n    vob_start_connecting();\n  } else {\n    // re-start advertising\n    vob_start_advertising();\n  }\n}\n\n/**\n * @brief BLE application thread handler\n *\n * @param argument \tParameter imported during the thread creation.\n *\n */\nstatic void ble_app_thread(void const *argument) {\n  while (1) {\n    osEvent evt;\n    // wait any signal\n    evt = osSignalWait(0x0, osWaitForever);\n\n    // get role from signal value\n    if (evt.status == osEventSignal) {\n      if (evt.value.signals & BLE_SIGNAL_VOB_GET_ENCODED_AUDIO_DATA) {\n        vob_send_encoded_audio_data();\n        break;\n      } else if (evt.value.signals & BLE_SIGNAL_VOB_DATA_SENT_OUT) {\n        vob_data_sent_out_handler();\n        break;\n      } else if (evt.value.signals & BLE_SIGNAL_VOB_RECEIVED_DATA) {\n        vob_data_reiceived_handler();\n        break;\n      } else if (evt.value.signals & BLE_SIGNAL_VOB_CONNECTED) {\n        vob_connected_evt_handler();\n        break;\n      } else if (evt.value.signals & BLE_SIGNAL_VOB_DISCONNECTED) {\n        vob_disconnected_evt_handler();\n        break;\n      }\n    }\n  }\n}\n\n/**\n * @brief The role of the voice over BLE\n *\n * @return 0 if successful, -1 if failed\n *\n */\nint ble_app_init(void) {\n  ble_app_tid = osThreadCreate(osThread(ble_app_thread), NULL);\n  if (ble_app_tid == NULL) {\n    TRACE(0, \"Failed to Create ble_app_thread\\n\");\n    return 0;\n  }\n  return 0;\n}\n\n/**\n * @brief Call back function of the connecting supervisor timer\n *\n * @param n Parameter imported during the timer creation osTimerCreate.\n *\n */\nstatic void connecting_supervisor_timer_cb(void const *n) {\n  if (VOB_STATE_CONNECTING == vob_state) {\n    // time-out happens at the time of connecting.\n    // it means the slave is not present or cannot be connected, so just stop\n    // connecting\n    appm_stop_connecting();\n\n    vob_state = VOB_STATE_STOPPING_CONNECTING;\n  }\n\n  osTimerDelete(vob_connecting_supervisor_timer);\n}\n\n/**\n * @brief Start connecting to DST\n *          this can happen for two cases:\n *          1. Key press to start connecting\n *          2. Re-connecting when disconnection happened\n *\n */\nvoid vob_start_connecting(void) {\n  // play the connecting sound\n  app_voice_report(APP_STATUS_INDICATION_CONNECTING, 0);\n\n  // start connecting\n  appm_start_connecting(&DST_BLE_BdAddr);\n\n  // create and start a timer to supervise the connecting procedure\n  vob_connecting_supervisor_timer = osTimerCreate(\n      osTimer(APP_VOB_CONNECTING_SUPERVISOR_TIMER), osTimerOnce, NULL);\n\n  osTimerStart(vob_connecting_supervisor_timer, VOB_CONNECTING_TIMEOUT_IN_MS);\n\n  vob_state = VOB_STATE_CONNECTING;\n}\n\n/**\n * @brief Process the collected PCM data from MIC\n *\n * @param ptrBuf \tPointer of the PCM data buffer to access.\n * @param length\tLength of the PCM data in the buffer in bytes.\n *\n * @return uint32_t 0 means no error happens\n */\nstatic uint32_t vob_voice_data_come(uint8_t *ptrBuf, uint32_t length) {\n  // encode the voice PCM data into cvsd\n  uint32_t remainingBytesToEncode = length;\n  uint32_t pcmBytesToEncode;\n  do {\n    pcmBytesToEncode =\n        (remainingBytesToEncode >\n         (MAXNUMOFSAMPLES * src_mic_stream_env.bitNumber / AUD_BITS_8))\n            ? (MAXNUMOFSAMPLES * src_mic_stream_env.bitNumber / AUD_BITS_8)\n            : remainingBytesToEncode;\n\n    // cvsd's compression ratio is 50%\n    if ((VOB_PCM_SIZE_TO_AUDIO_SIZE(pcmBytesToEncode) +\n         vob_data_management.encodedDataIndexToFill) >\n        src_mic_stream_env.encodedDataBufSize) {\n      pcmBytesToEncode = VOB_AUDIO_SIZE_TO_PCM_SIZE(\n          src_mic_stream_env.encodedDataBufSize -\n          vob_data_management.encodedDataIndexToFill);\n    }\n\n    // encode the PCM data\n    Pcm8kToCvsd((short *)ptrBuf,\n                vob_data_management.encodedDataBuf +\n                    vob_data_management.encodedDataIndexToFill,\n                pcmBytesToEncode / sizeof(short));\n\n    // update the index\n    ptrBuf += pcmBytesToEncode;\n    remainingBytesToEncode -= pcmBytesToEncode;\n\n    vob_data_management.encodedDataIndexToFill +=\n        VOB_PCM_SIZE_TO_AUDIO_SIZE(pcmBytesToEncode);\n\n    if (src_mic_stream_env.encodedDataBufSize ==\n        vob_data_management.encodedDataIndexToFill) {\n      vob_data_management.encodedDataIndexToFill = 0;\n    }\n\n  } while (remainingBytesToEncode > 0);\n\n  osMutexWait(vob_env_mutex_id, osWaitForever);\n\n  // update the bytes to transmit via BLE\n  vob_data_management.encodedDataLength += VOB_PCM_SIZE_TO_AUDIO_SIZE(length);\n\n  osMutexRelease(vob_env_mutex_id);\n\n  if ((!vob_data_management.isCachingDone) &&\n      (vob_data_management.encodedDataLength >=\n       src_mic_stream_env.cachedEncodedDataSize)) {\n    vob_data_management.isCachingDone = true;\n\n    // inform the ble application thread to send out the encoded data\n    osSignalSet(ble_app_tid, BLE_SIGNAL_VOB_GET_ENCODED_AUDIO_DATA)\n  }\n  return 0;\n}\n\n/**\n * @brief Init the MIC and Speaker audio streams\n *\n */\nstatic void vob_init_audio_streams(void) {\n  src_mic_stream_env.bitNumber = VOB_VOICE_BIT_NUMBER;\n  src_mic_stream_env.sampleRate = VOB_VOICE_SAMPLE_RATE;\n  src_mic_stream_env.channelCount = AUD_CHANNEL_NUM_1;\n  src_mic_stream_env.morePcmHandler = vob_voice_data_come;\n  src_mic_stream_env.pcmDataChunkCount = VOB_VOICE_PCM_DATA_CHUNK_COUNT;\n  src_mic_stream_env.pcmDataChunkSize = VOB_VOICE_PCM_DATA_CHUNK_SIZE;\n  src_mic_stream_env.cachedEncodedDataSize = VOB_ENCODED_DATA_CACHE_SIZE;\n  src_mic_stream_env.encodedDataBufSize = VOB_ENCODED_DATA_STORAGE_BUF_SIZE;\n\n  dst_speaker_stream_env.bitNumber = VOB_VOICE_BIT_NUMBER;\n  dst_speaker_stream_env.sampleRate = VOB_VOICE_SAMPLE_RATE;\n  dst_speaker_stream_env.channelCount = AUD_CHANNEL_NUM_2;\n  dst_speaker_stream_env.morePcmHandler = vob_need_more_voice_data;\n  dst_speaker_stream_env.pcmDataChunkCount = VOB_VOICE_PCM_DATA_CHUNK_COUNT;\n  dst_speaker_stream_env.pcmDataChunkSize = VOB_VOICE_PCM_DATA_CHUNK_SIZE;\n  dst_speaker_stream_env.cachedEncodedDataSize = VOB_ENCODED_DATA_CACHE_SIZE;\n  dst_speaker_stream_env.encodedDataBufSize = VOB_ENCODED_DATA_STORAGE_BUF_SIZE;\n}\n\n/**\n * @brief Start the voice input stream from the MIC\n *\n */\nvoid vob_kick_off_mic_input_stream(void) {\n  // prepare the memory buffer\n  app_audio_mempool_init();\n  // PCM data buffer\n  app_audio_mempool_get_buff(&(src_mic_stream_env.pcmDataBuf),\n                             src_mic_stream_env.pcmDataChunkCount *\n                                 src_mic_stream_env.pcmDataChunkSize);\n\n  // encoded data buffer\n  app_audio_mempool_get_buff(&(src_mic_stream_env.encodedDataBuf),\n                             src_mic_stream_env.encodedDataBufSize);\n\n  // encoded data queue\n  APP_AUDIO_InitCQueue(&(src_mic_stream_env.queue),\n                       src_mic_stream_env.encodedDataBufSize,\n                       src_mic_stream_env.encodedDataBuf);\n\n  // acuqire the sufficient system clock\n  app_sysfreq_req(APP_SYSFREQ_VOICE_OVER_BLE, APP_SYSFREQ_26M);\n\n  // create the audio flinger stream\n  struct AF_STREAM_CONFIG_T stream_cfg;\n\n  stream_cfg.bits = src_mic_stream_env.bitNumber;\n  stream_cfg.sample_rate = src_mic_stream_env.sampleRate;\n  stream_cfg.channel_num = src_mic_stream_env.channelCount;\n  stream_cfg.vol = VOB_VOICE_VOLUME;\n\n  stream_cfg.device = AUD_STREAM_USE_OPTIMIZED_STREAM;\n\n  stream_cfg.io_path = AUD_INPUT_PATH_MAINMIC;\n  stream_cfg.handler = src_mic_stream_env.morePcmHandler;\n\n  stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(src_mic_stream_env.pcmDataBuf);\n  stream_cfg.data_size = src_mic_stream_env.pcmDataChunkSize;\n\n  af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n  af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n}\n\n/**\n * @brief Start the voice stream, this can only be triggered by SRC\n *\n */\nstatic void vob_start_voice_stream(void) {\n  BLE_send_custom_command(OP_VOB_CMD_START_VOICE_STREAM, NULL, 0);\n}\n\n/**\n * @brief Callback function called when the BLE activity(adv/connecting/scanning\n * is stopped)\n *\n */\nstatic void vob_ble_activity_stopped(void) {\n  if (VOB_STATE_STOPPING_ADV == vob_state) {\n    vob_state = VOB_STATE_ADV_STOPPED;\n\n    // should switch to connecting state\n    vob_switch_state_handler();\n  } else if (VOB_STATE_STOPPING_CONNECTING == vob_state) {\n    // start advertising\n    vob_start_advertising();\n  }\n}\n\n/**\n * @brief The handler of switching VOB state\n *\n */\nvoid vob_switch_state_handler(void) {\n  switch (vob_state) {\n  case VOB_STATE_ADV_STOPPED: {\n    if (VOB_ROLE_SRC == vob_role) {\n      // start connecting\n      vob_start_connecting();\n    }\n    break;\n  }\n  case VOB_STATE_CONNECTED: {\n    // start voice stream\n    vob_start_voice_stream();\n    break;\n  }\n  case VOB_STATE_VOICE_STREAM: {\n    // stop voice stream\n    vob_stop_voice_stream();\n    break;\n  }\n  }\n}\n\n/**\n * @brief Process the message sent to the VOB application thread\n *\n */\nstatic int voice_over_ble_handler(APP_MESSAGE_BODY *msg_body) {\n  switch (msg_body->message_id) {\n  case VOB_START_AS_SRC:\n    // change role\n    vob_role = VOB_ROLE_SRC;\n    // stop advertising, and start connecting when adv is stopped\n    appm_stop_advertising();\n    // change state\n    vob_state = VOB_STATE_STOPPING_ADV;\n    break;\n  case VOB_SWITCH_STATE:\n    vob_switch_state_handler();\n    break;\n  default:\n    break;\n  }\n  return 0;\n}\n\n/**\n * @brief Notify VOB that it should switch to the next state:\n *        VOB_IDLE -> VOB_CONNECTED -> VOB_VOICE_STREAM -> VOB_CONNECTED\n *\n * @param ptrParam \tPointer of the parameter\n * @param paramLen  Length of the parameter in bytes\n *\n */\nvoid notify_vob(VOB_MESSAGE_ID_E message, uint8_t *ptrParam,\n                uint32_t paramLen) {\n  APP_MESSAGE_BLOCK msg;\n\n  msg.mod_id = APP_MODUAL_VOB;\n\n  msg.msg_body.message_id = message;\n\n  /**< reserved for future usage */\n  // ASSERT(paramLen <= 8, \"The parameter length %d exceeds the maximum\n  // supported length 8!\", paramLen); memcpy((uint8_t\n  // *)&(msg.msg_body.message_Param0), ptrParam, paramLen);\n\n  app_mailbox_put(&msg);\n}\n\n/**\n * @brief Initialize the voice over BLE system\n *\n */\nvoid voice_over_ble_init(void) {\n  // create the mutext\n  vob_env_mutex_id = osMutexCreate((osMutex(vob_env_mutex)));\n\n  // initialize the audio streams\n  vob_init_audio_streams();\n\n  // initialize the state machine\n  vob_state = VOB_STATE_IDLE;\n\n  // thread id used for os signal communication between VOB thread and BLE\n  // thread\n  vob_ThreadId = osThreadGetId();\n\n  // add the voice over ble handler into the application thread\n  app_set_threadhandle(APP_MODUAL_VOB, voice_over_ble_handler);\n\n  // initialize the cvsd library\n  Pcm8k_CvsdInit();\n\n  // default role is DST\n  vob_role = VOB_ROLE_DST;\n\n  // register the BLE adv and connecting activity stopped callback function\n  app_datapath_server_register_activity_stopped_cb(vob_ble_activity_stopped);\n\n  // start advertising if DST\n  vob_start_advertising();\n}\n\n#endif // #if __VOICE_OVER_BLE_ENABLED__\n"
  },
  {
    "path": "services/ble_app/app_voice/app_voicepath_ble.c",
    "content": "/***************************************************************************\n *\n *Copyright 2015-2019 BES.\n *All rights reserved. All unpublished rights reserved.\n *\n *No part of this work may be used or reproduced in any form or by any\n *means, or stored in a database or retrieval system, without prior written\n *permission of BES.\n *\n *Use of this work is governed by a license granted by BES.\n *This work contains confidential and proprietary information of\n *BES. which is protected by copyright, trade secret,\n *trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*****************************header include********************************/\n#include \"app_voicepath_ble.h\"\n#include \"att.h\"\n#include \"cmsis_os.h\"\n#include \"gapm_task.h\"\n#include \"ke_msg.h\"\n#include \"rwip_config.h\"\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom_ble.h\"\n#include \"gsound_gatt_server.h\"\n#endif\n\n/************************private macro defination***************************/\n\n/************************private type defination****************************/\n\n/**********************private function declearation************************/\n\n/************************private variable defination************************/\n\n/****************************function defination****************************/\nvoid app_ble_voicepath_init(void) { app_gsound_ble_init(); }\n\nconst struct ke_state_handler *app_voicepath_ble_get_msg_handler_table(void) {\n  return gsound_ble_get_msg_handler_table();\n}\n\nvoid app_ble_voicepath_add_svc(void) { return app_gsound_ble_add_svc(); }\n\nconst struct prf_task_cbs *voicepath_prf_itf_get(void) {\n  return gsound_prf_itf_get();\n}\n\nvoid app_ble_bms_add_svc(void) {\n\n  // Register the BMS service\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, 0);\n\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, SEC_CON) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, SEC_CON);\n#endif\n  req->prf_task_id = TASK_ID_BMS;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  ke_msg_send(req);\n}\n\n#if (ANCS_PROXY_ENABLE)\nvoid app_ble_ancsp_add_svc(void) {\n  TRACE(0, \"Registering ANCS Proxy GATT Service\");\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, 0);\n\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, SEC_CON) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, SEC_CON);\n#endif\n  req->prf_task_id = TASK_ID_ANCSP;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  ke_msg_send(req);\n}\n\nvoid app_ble_amsp_add_svc(void) {\n  TRACE(0, \"Registering AMS Proxy GATT Service\");\n  struct gapm_profile_task_add_cmd *req =\n      KE_MSG_ALLOC_DYN(GAPM_PROFILE_TASK_ADD_CMD, TASK_GAPM, TASK_APP,\n                       gapm_profile_task_add_cmd, 0);\n\n  req->operation = GAPM_PROFILE_TASK_ADD;\n#if BLE_CONNECTION_MAX > 1\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE) | PERM(SVC_MI, ENABLE);\n#else\n  req->sec_lvl = PERM(SVC_AUTH, ENABLE);\n#endif\n  req->prf_task_id = TASK_ID_AMSP;\n  req->app_task = TASK_APP;\n  req->start_hdl = 0;\n\n  ke_msg_send(req);\n}\n#endif\n\nvoid app_voicepath_mtu_exchanged_handler(uint8_t conidx, uint16_t MTU) {\n  app_gsound_ble_mtu_exchanged_handler(conidx, MTU);\n}\n\nvoid app_voicepath_disconnected_evt_handler(uint8_t conidx) {\n  if (app_gsound_ble_get_connection_index() == conidx) {\n    app_gsound_ble_disconnected_evt_handler(conidx);\n  } else {\n    TRACE(2, \"disconnect idx:%d, gsound idx:%d\", conidx,\n          app_gsound_ble_get_connection_index());\n  }\n}\n\nvoid app_voicepath_ble_conn_parameter_updated(uint8_t conidx,\n                                              uint16_t connInterval,\n                                              uint16_t connSlavelatency) {\n  gsound_ble_conn_parameter_updated(conidx, connInterval, connSlavelatency);\n}"
  },
  {
    "path": "services/ble_app/app_voice/app_voicepath_ble.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_VOICEPATH_BLE_H__\n#define __APP_VOICEPATH_BLE_H__\n\n#include \"ke_task.h\"\n\nvoid app_ble_voicepath_init(void);\n\nconst struct ke_state_handler *app_voicepath_ble_get_msg_handler_table(void);\n\nvoid app_ble_voicepath_add_svc(void);\n\nvoid app_ble_bms_add_svc(void);\n\n#if (ANCS_PROXY_ENABLE)\nvoid app_ble_ancsp_add_svc(void);\n\nvoid app_ble_amsp_add_svc(void);\n#endif\n\nvoid app_voicepath_disconnected_evt_handler(uint8_t conidx);\n\nvoid app_voicepath_mtu_exchanged_handler(uint8_t conidx, uint16_t MTU);\n\nvoid app_voicepath_ble_conn_parameter_updated(uint8_t conidx,\n                                              uint16_t connInterval, \n                                              uint16_t connSlavelatency);\n\n#endif\n"
  },
  {
    "path": "services/ble_app/ble_app_dbg.h",
    "content": "/**\n * @file ble_app_dbg.h\n * @author BES AI team\n * @version 0.1\n * @date 2020-05-05\n * \n * @copyright Copyright (c) 2015-2020 BES Technic.\n * All rights reserved. All unpublished rights reserved.\n * \n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n * \n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n */\n\n\n#ifndef __BLE_APP_DBG_H__\n#define __BLE_APP_DBG_H__\n\n#ifdef __cplusplus\nextern \"C\"{\n#endif\n\n/*****************************header include********************************/\n\n/******************************macro defination*****************************/\n#define LOG_V(str, ...) LOG_VERBOSE(LOG_MOD(BLEAPP), str, ##__VA_ARGS__)\n#define LOG_D(str, ...) LOG_DEBUG(LOG_MOD(BLEAPP), str, ##__VA_ARGS__)\n#define LOG_I(str, ...) LOG_INFO(LOG_MOD(BLEAPP), str, ##__VA_ARGS__)\n#define LOG_W(str, ...) LOG_WARN(LOG_MOD(BLEAPP), str, ##__VA_ARGS__)\n#define LOG_E(str, ...) LOG_ERROR(LOG_MOD(BLEAPP), str, ##__VA_ARGS__)\n\n/******************************type defination******************************/\n\n/****************************function declearation**************************/\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __BLE_APP_DBG_H__ */"
  },
  {
    "path": "services/ble_profiles/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)datapath/datapathps/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hrp/hrps/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hogp/hogpbh/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hogp/hogpd/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hogp/hogrh/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)bas/bass/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)prf/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)voicepath/$(VOICE_DATAPATH_TYPE)/*.c))\nifeq ($(TILE_DATAPATH_ENABLED),1)\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)/tile/*.c))\nendif\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)ota/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)anc/ancc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)ams/amsc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)gfps/gfps_provider/src/*.c))\n#obj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)gfps/gfps_crypto/*.c))\n\nifeq ($(TEST_OVER_THE_AIR),1)\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)tota/*.c))\nsubdir-ccflags-y +=-Iservices/tota\nendif\nobj-y := $(obj_c:.c=.o)\nifeq ($(GFPS_ENABLE),1)\nobj-y += gfps/\nendif\nsubdir-ccflags-y += \\\n\t-Iservices/audio_process \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/fs/fat/ChaN \\\n\t$(BT_IF_INCLUDES) \\\n\t$(BT_PROFILES_INCLUDES) \\\n\t-Iservices/overlay \\\n\t-Iservices/nvrecord \\\n\t-Iservices/resources \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/drivers/bt \\\n\t-Iutils/cqueue \\\n\t-Iutils/retention_ram \\\n\t-Iservices/audioflinger \\\n\t-Iutils/lockcqueue \\\n\t-Iutils/intersyshci \\\n\t-Iapps/key \\\n\t-Iapps/main \\\n\t-Iapps/common \\\n\t-Iapps/audioplayers \\\n\t-Iapps/factory \\\n\t-Iservices/ble_app \\\n\t-Iservices/ble_stack/ble_ip \\\n\t-Iservices/ble_stack/hl/api \\\n\t-Iservices/ble_stack/app/api/  \\\n\t-Iservices/ble_stack/common/api/ \\\n\t-Iservices/ble_stack/ke/api \\\n\t-Iservices/bridge/ \\\n\t-Iservices/ble_stack/hl/inc/ \\\n\t-Iservices/ble_stack/hl/src/gap/ \\\n\t-Iservices/ble_stack/hl/src/gap/gapc/ \\\n\t-Iservices/ble_stack/hl/src/gap/gapm/ \\\n\t-Iservices/ble_stack/hl/src/gap/smpc/ \\\n\t-Iservices/ble_stack/ke/src/ \\\n\t-Iservices/ble_stack/hl/src/gatt/attc/ \\\n\t-Iservices/ble_stack/hl/src/gatt/attm/ \\\n\t-Iservices/ble_stack/hl/src/gatt/atts/ \\\n\t-Iservices/ble_stack/hl/src/gatt/gattc/ \\\n\t-Iservices/ble_stack/hl/src/gatt/gattm/ \\\n\t-Iservices/ble_stack/hl/src/gatt/ \\\n\t-Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n\t-Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n\t-Iservices/ble_stack/hci/api/ \\\n\t-Iservices/ble_stack/hci/src/ \\\n\t-Iservices/ble_stack/app/src/  \\\n\t-Iservices/ble_stack/profiles/htp/htpt/api/ \\\n\t-Iservices/ble_stack/profiles/htp/htpt/src/ \\\n\t-Iservices/ble_stack/profiles/htp/ \\\n\t-Iservices/ble_profiles/datapath/datapathps/api/ \\\n\t-Iservices/ble_app/app_main/ \\\n\t-Iservices/ble_app/app_voice \\\n\t-Iservices/ble_app/app_htp/ \\\n\t-Iservices/ble_app/app_datapath/ \\\n\t-Iservices/ble_profiles/hrp/hrps/src/ \\\n\t-Iservices/ble_profiles/hrp/hrps/api \\\n\t-Iservices/ble_profiles/hrp/ \\\n\t-Iservices/ble_app/app_hrps/ \\\n\t-Iservices/ble_app/app_amsc/ \\\n\t-Iservices/ble_app/app_ancc/ \\\n\t-Iservices/ble_profiles/hogp/ \\\n\t-Iservices/ble_profiles/hogp/hogpd/api/ \\\n\t-Iservices/ble_profiles/bas/bass/src/ \\\n\t-Iservices/ble_profiles/bas/bass/api/ \\\n\t-Iservices/ble_profiles/anc/ \\\n\t-Iservices/ble_profiles/anc/ancc/ \\\n\t-Iservices/ble_profiles/ams/ \\\n\t-Iservices/ble_profiles/ams/amsc/ \\\n\t-Iservices/ble_profiles/voicepath/gsound \\\n\t-Iservices/voicepath/$(VOICE_DATAPATH_TYPE)/ \\\n\t-Iservices/voicepath/gsound/gsound_target/ \\\n\t-Iservices/voicepath/gsound/gsound_custom/inc \\\n\t-Iservices/voicepath/gsound/gsound_target_api_read_only \\\n\t-Iservices/ble_profiles/gfps/gfps_provider/src/ \\\n\t-Iservices/ble_profiles/gfps/gfps_provider/api/ \\\n\t-Iservices/ble_profiles/gfps/gfps_crypto/ \\\n\t-Iservices/ble_profiles/gfps/api/ \\\n\t-Iservices/ai_voice/manager \\\n    -Iservices/app_ai/inc \\\n\t-Iservices/ble_profiles/tile \\\n\t-Ithirdparty/tile/tile_target/ \\\n\t-Ithirdparty/tile/tile_common/tile_assert \\\n\t-Ithirdparty/tile/tile_common/tile_features \\\n\t-Ithirdparty/tile/tile_common/tile_gatt_db \\\n\t-Ithirdparty/tile/tile_common/tile_player \\\n\t-Ithirdparty/tile/tile_common/tile_service \\\n\t-Ithirdparty/tile/tile_common/tile_storage \\\n\t-Iservices/bt_app\n\t\nifeq ($(OTA_ENABLE),1)\nifeq ($(IBRT),1)\nccflags-y += -Iservices/ibrt_ota/inc\nelse\nccflags-y += -Iservices/ota\nendif\nendif\n\n"
  },
  {
    "path": "services/ble_profiles/ams/ams_common.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef _AMS_COMMON_H_\n#define _AMS_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup AMS Profile\n * @ingroup AMS\n * @brief AMS Profile\n *****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#if (BLE_AMS_CLIENT || BLE_ANC_SERVER)\n\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Error Codes\n// The MR has not properly set up the AMS\n#define AMS_INVALID_STATE             (0xA0)\n// The command was improperly formatted\n#define AMS_INVALID_CMD               (0xA1)\n// The corresponding attribute is empty\n#define AMS_ABSENT_ATTRIBUTE          (0xA2)\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Remote Command Characteristic Value Structure\nstruct ams_remote_cmd\n{\n    /// Remote command\n    uint8_t remote_command_id;\n};\n\n/// Entity Update Characteristic Value Structure\nstruct ams_entity_update\n{\n    /// Remote command\n    uint8_t entity_id;\n    uint8_t attribute_id;\n    uint8_t entity_update_flags;\n    uint8_t value;\n};\n\n#endif //(BLE_AMS_CLIENT || BLE_AMS_SERVER)\n\n/// @} ams_common\n\n#endif //(_AMS_COMMON_H_)\n"
  },
  {
    "path": "services/ble_profiles/ams/amsc/amsc.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup AMSC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_AMS_CLIENT)\n#include \"ams_common.h\"\n#include \"amsc.h\"\n#include \"amsc_task.h\"\n#include \"ke_mem.h\"\n#include \"ke_timer.h\"\n\n/**\n ****************************************************************************************\n * @brief Initialization of the AMSC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t amsc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  BLE_FUNC_ENTER();\n\n  struct amsc_env_tag *amsc_env = (struct amsc_env_tag *)ke_malloc(\n      sizeof(struct amsc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate AMSC required environment variable\n  env->env = (prf_env_t *)amsc_env;\n\n  amsc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  amsc_env->prf_env.prf_task =\n      env->task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                             : PERM(PRF_MI, DISABLE));\n\n  // initialize environment variable\n  env->id = TASK_ID_AMSC;\n  amsc_task_init(&(env->desc));\n\n  for (idx = 0; idx < AMSC_IDX_MAX; idx++) {\n    amsc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), AMSC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void amsc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct amsc_env_tag *amsc_env = (struct amsc_env_tag *)env->env;\n\n  BLE_FUNC_ENTER();\n\n  // clean-up environment variable allocated for task instance\n  if (amsc_env->env[conidx] != NULL) {\n    ke_timer_clear(AMSC_TIMEOUT_TIMER_IND,\n                   prf_src_task_get(&amsc_env->prf_env, conidx));\n    ke_free(amsc_env->env[conidx]);\n    amsc_env->env[conidx] = NULL;\n  }\n\n  /* Put AMS Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), AMSC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the AMSC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void amsc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct amsc_env_tag *amsc_env = (struct amsc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < AMSC_IDX_MAX; idx++) {\n    amsc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(amsc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void amsc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put AMS Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), AMSC_IDLE);\n}\n\n/// AMSC Task interface required by profile manager\nconst struct prf_task_cbs amsc_itf = {\n    amsc_init,\n    amsc_destroy,\n    amsc_create,\n    amsc_cleanup,\n};\n\nconst struct prf_task_cbs *amsc_prf_itf_get(void) { return &amsc_itf; }\n\nvoid amsc_enable_rsp_send(struct amsc_env_tag *amsc_env, uint8_t conidx,\n                          uint8_t status) {\n  BLE_FUNC_ENTER();\n\n  // ASSERT(status == GAP_ERR_NO_ERROR, \"%s error %d\", __func__, status);\n  if (status == GAP_ERR_NO_ERROR) {\n    // Register AMSC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(amsc_env->prf_env), conidx,\n                             &(amsc_env->env[conidx]->ams.svc));\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(amsc_env->prf_env), conidx), AMSC_IDLE);\n  }\n}\n\n#endif //(BLE_AMS_CLIENT)\n\n/// @} AMSC\n"
  },
  {
    "path": "services/ble_profiles/ams/amsc/amsc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef _AMSC_H_\n#define _AMSC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup AMSC.\n * @ingroup AMS\n * @brief AMS - Client Role.\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"ams_common.h\"\n\n#if (BLE_AMS_CLIENT)\n\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"prf_utils_128.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of AMSC task instances\n#define AMSC_IDX_MAX        (BLE_CONNECTION_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the amsc task\nenum amsc_states\n{\n    /// Idle state\n    AMSC_FREE,\n    /// Connected state\n    AMSC_IDLE,\n    /// Discovery\n    AMSC_DISCOVERING,\n    /// Number of defined states.\n    AMSC_STATE_MAX\n};\n\n/// AMS Characteristics\nenum amsc_chars\n{\n    /// Remote Command\n    AMSC_REMOTE_COMMAND_CHAR = 0,\n    /// Entity Update\n    AMSC_ENTITY_UPDATE_CHAR,\n    /// Entity Attribute\n    AMSC_ENTITY_ATTRIBUTE_CHAR,\n    /// Number of defined states.\n    AMSC_CHAR_MAX,\n};\n\n/// AMS Characteristic Descriptors\nenum amsc_descs\n{\n    /// Remote Command - Client Characteristic Configuration\n    AMSC_DESC_REMOTE_CMD_CL_CFG,\n    /// Entity Update - Client Characteristic Configuration\n    AMSC_DESC_ENTITY_UPDATE_CL_CFG,\n\n    AMSC_DESC_MAX,\n\n    AMSC_DESC_MASK = 0x10,\n};\n\n/// Pointer to the connection clean-up function\n#define AMSC_CLEANUP_FNCT        (amsc_cleanup)\n\n#define AMSC_INVALID_STATE\t\t0xA0\n#define AMSC_INVALID_COMMAND\t0xA1\n#define AMSC_ABSENT_ATTRIBUTE\t0xA2\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Apple Media Service\n */\nstruct amsc_ams_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - Remote Command\n    ///  - Entity Update\n    ///  - Entity Attribute\n    struct prf_char_inf chars[AMSC_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - Remote Command Client Char Cfg\n    ///  - Entity Update Client Char Cfg\n    struct prf_char_desc_inf descs[AMSC_DESC_MAX];\n};\n\nstruct amsc_cnx_env\n{\n    /// Current Operation\n    void *operation;\n\n    /// Provide an indication about the last operation\n    uint16_t last_req;\n    /// Last characteristic code discovered\n    uint8_t last_char_code;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n\n    /// AMS Characteristics\n    struct amsc_ams_content ams;    \n};\n\n/// AMS Client environment variable\nstruct amsc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n\n    // TODO(jkessinger): Verify this will work).\n    uint16_t last_write_handle[AMSC_IDX_MAX];\n\n    /// Environment variable pointer for each connections\n    struct amsc_cnx_env* env[AMSC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[AMSC_IDX_MAX];\n\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve AMS client profile interface\n *\n * @return AMS client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* amsc_prf_itf_get(void);\nvoid amsc_enable_rsp_send(struct amsc_env_tag *amsc_env, uint8_t conidx, uint8_t status);\nvoid amsc_task_init(struct ke_task_desc *task_desc);\n\n#endif //(BLE_AMS_CLIENT)\n\n/// @} AMSC\n\n#endif //(_AMSC_H_)\n"
  },
  {
    "path": "services/ble_profiles/ams/amsc/amsc_task.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup AMSCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_AMS_CLIENT)\n\n#include \"ams_common.h\"\n#include \"ams_gatt_server.h\"\n#include \"amsc.h\"\n#include \"amsc_task.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n#include \"prf_utils_128.h\"\n\n#include \"compiler.h\"\n#include \"ke_timer.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\nstatic uint16_t amsc_last_read_handle = BTIF_INVALID_HCI_HANDLE;\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// AMSC UUID\nconst struct att_uuid_128 amsc_ams_svc = {{0xdc, 0xf8, 0x55, 0xad, 0x02, 0xc5,\n                                           0xf4, 0x8e, 0x3a, 0x43, 0x36, 0x0f,\n                                           0x2b, 0x50, 0xd3, 0x89}};\n\n/// State machine used to retrieve AMS characteristics information\nconst struct prf_char_def_128 amsc_ams_char[AMSC_CHAR_MAX] = {\n    /// Remote Command\n    [AMSC_REMOTE_COMMAND_CHAR] = {{0xc2, 0x51, 0xca, 0xf7, 0x56, 0x0e, 0xdf,\n                                   0xb8, 0x8a, 0x4a, 0xb1, 0x57, 0xd8, 0x81,\n                                   0x3c, 0x9b},\n                                  ATT_MANDATORY,\n                                  ATT_CHAR_PROP_WR | ATT_CHAR_PROP_NTF},\n\n    /// Entity Update\n    [AMSC_ENTITY_UPDATE_CHAR] = {{0x02, 0xc1, 0x96, 0xba, 0x92, 0xbb, 0x0c,\n                                  0x9a, 0x1f, 0x41, 0x8d, 0x80, 0xce, 0xab,\n                                  0x7c, 0x2f},\n                                 ATT_OPTIONAL,\n                                 ATT_CHAR_PROP_WR | ATT_CHAR_PROP_NTF},\n\n    /// Entity Attribute\n    [AMSC_ENTITY_ATTRIBUTE_CHAR] = {{0xd7, 0xd5, 0xbb, 0x70, 0xa8, 0xa3, 0xab,\n                                     0xa6, 0xd8, 0x46, 0xab, 0x23, 0x8c, 0xf3,\n                                     0xb2, 0xc6},\n                                    ATT_OPTIONAL,\n                                    ATT_CHAR_PROP_WR | ATT_CHAR_PROP_RD},\n};\n\n/// State machine used to retrieve AMS characteristic descriptor information\nconst struct prf_char_desc_def amsc_ams_char_desc[AMSC_DESC_MAX] = {\n    /// Remote Command Char. - Client Characteristic Configuration\n    [AMSC_DESC_REMOTE_CMD_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                     AMSC_REMOTE_COMMAND_CHAR},\n    /// Entity Update Char. - Client Characteristic Configuration\n    [AMSC_DESC_ENTITY_UPDATE_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                        AMSC_ENTITY_UPDATE_CHAR},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref AMSC_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int amsc_enable_req_handler(ke_msg_id_t const msgid,\n                                   struct amsc_enable_req *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  struct amsc_env_tag *amsc_env = PRF_ENV_GET(AMSC, amsc);\n  // Get connection index\n  uint8_t conidx = param->conidx;\n  uint8_t state = ke_state_get(dest_id);\n  TRACE(3, \"AMSC %s Entry. state=%d, conidx=%d\", __func__, state, conidx);\n\n  TRACE(3, \"AMSC %s amsc_env->env[%d] = 0x%8.8x\", __func__, conidx,\n        (uint32_t)amsc_env->env[conidx]);\n  if ((state == AMSC_IDLE) && (amsc_env->env[conidx] == NULL)) {\n    TRACE(1, \"AMSC %s passed state check\", __func__);\n    // allocate environment variable for task instance\n    amsc_env->env[conidx] = (struct amsc_cnx_env *)ke_malloc(\n        sizeof(struct amsc_cnx_env), KE_MEM_ATT_DB);\n    ASSERT(amsc_env->env[conidx], \"%s alloc error\", __func__);\n    memset(amsc_env->env[conidx], 0, sizeof(struct amsc_cnx_env));\n\n    amsc_env->env[conidx]->last_char_code = AMSC_ENABLE_OP_CODE;\n\n    // Start discovering\n    // Discover AMS service by 128-bit UUID\n    prf_disc_svc_send_128(&(amsc_env->prf_env), conidx,\n                          (uint8_t *)&amsc_ams_svc.uuid);\n\n    // Go to DISCOVERING state\n    ke_state_set(dest_id, AMSC_DISCOVERING);\n\n    // Configure the environment for a discovery procedure\n    amsc_env->env[conidx]->last_req = ATT_DECL_PRIMARY_SERVICE;\n  }\n\n  else if (state != AMSC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    amsc_enable_rsp_send(amsc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref AMSC_READ_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int amsc_read_cmd_handler(ke_msg_id_t const msgid,\n                                 struct gattc_read_cmd *param,\n                                 ke_task_id_t const dest_id,\n                                 ke_task_id_t const src_id) {\n  TRACE(5, \"AMSC %s Entry. hdl=0x%4.4x, op=%d, len=%d, off=%d\", __func__,\n        param->req.simple.handle, param->operation, param->req.simple.length,\n        param->req.simple.offset);\n\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // Get the address of the environment\n  struct amsc_env_tag *amsc_env = PRF_ENV_GET(AMSC, amsc);\n\n  if (amsc_env != NULL) {\n    amsc_last_read_handle = param->req.simple.handle;\n    // Send the read request\n    prf_read_char_send(\n        &(amsc_env->prf_env), conidx, amsc_env->env[conidx]->ams.svc.shdl,\n        amsc_env->env[conidx]->ams.svc.ehdl, param->req.simple.handle);\n  } else {\n    //        amsc_send_no_conn_cmp_evt(dest_id, src_id, param->handle,\n    //        AMSC_WRITE_CL_CFG_OP_CODE);\n    ASSERT(0, \"%s implement me\", __func__);\n  }\n\n  return KE_MSG_CONSUMED;\n}\n\nstatic int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                  struct gattc_read_ind const *param,\n                                  ke_task_id_t const dest_id,\n                                  ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct amsc_env_tag *amsc_env = PRF_ENV_GET(AMSC, amsc);\n  TRACE(3, \"AMSC %s param->handle=%x param->length=%d\", __func__, param->handle,\n        param->length);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  if (amsc_env != NULL) {\n    amsc_last_read_handle = BTIF_INVALID_HCI_HANDLE;\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM, KE_BUILD_ID(prf_get_task_from_id(TASK_ID_AMSP), conidx),\n        dest_id, gattc_read_cfm, param->length);\n    cfm->status = 0; // read_ind has no status???\n    cfm->handle = param->handle;\n    cfm->length = param->length;\n    memcpy(cfm->value, param->value, param->length);\n    ke_msg_send(cfm);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref AMSC_WRITE_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int amsc_write_cmd_handler(ke_msg_id_t const msgid,\n                                  struct gattc_write_cmd *param,\n                                  ke_task_id_t const dest_id,\n                                  ke_task_id_t const src_id) {\n  TRACE(4, \"AMSC %s Entry. hdl=0x%4.4x, op=%d, len=%d\", __func__, param->handle,\n        param->operation, param->length);\n\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // Get the address of the environment\n  struct amsc_env_tag *amsc_env = PRF_ENV_GET(AMSC, amsc);\n\n  if (amsc_env != NULL) {\n    amsc_env->last_write_handle[conidx] = param->handle;\n    // TODO(jkessinger): Use ke_msg_forward.\n    struct gattc_write_cmd *wr_char =\n        KE_MSG_ALLOC_DYN(GATTC_WRITE_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         dest_id, gattc_write_cmd, param->length);\n    memcpy(wr_char, param, sizeof(struct gattc_write_cmd) + param->length);\n    // Send the message\n    ke_msg_send(wr_char);\n  } else {\n    //        amsc_send_no_conn_cmp_evt(dest_id, src_id, param->handle,\n    //        AMSC_WRITE_CL_CFG_OP_CODE);\n    ASSERT(0, \"%s implement me\", __func__);\n  }\n\n  return KE_MSG_CONSUMED;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  TRACE(4, \"AMSC %s Entry. end_hdl=0x%4.4x, start_hdl=0x%4.4x, att.att_type=%d\",\n        __func__, ind->end_hdl, ind->start_hdl, ind->info[0].att.att_type);\n  TRACE(3,\n        \"AMSC att_char.prop=%d, att_char.handle=0x%4.4x, att_char.att_type=%d\",\n        ind->info[0].att_char.prop, ind->info[0].att_char.handle,\n        ind->info[0].att_char.att_type);\n  TRACE(4,\n        \"AMSC inc_svc.att_type=%d, inc_svc.end_hdl=0x%4.4x, \"\n        \"inc_svc.start_hdl=0x%4.4x, state=%d\",\n        ind->info[0].att_type, ind->info[0].inc_svc.att_type,\n        ind->info[0].inc_svc.start_hdl, state);\n\n  if (state == AMSC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(src_id);\n\n    struct amsc_env_tag *amsc_env = PRF_ENV_GET(AMSC, amsc);\n\n    ASSERT_INFO(amsc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(amsc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (amsc_env->env[conidx]->nb_svc == 0) {\n      TRACE(0, \"AMSC retrieving characteristics and descriptors.\");\n      // Retrieve AMS characteristics and descriptors\n      prf_extract_svc_info_128(ind, AMSC_CHAR_MAX, &amsc_ams_char[0],\n                               &amsc_env->env[conidx]->ams.chars[0],\n                               AMSC_DESC_MAX, &amsc_ams_char_desc[0],\n                               &amsc_env->env[conidx]->ams.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      amsc_env->env[conidx]->ams.svc.shdl = ind->start_hdl;\n      amsc_env->env[conidx]->ams.svc.ehdl = ind->end_hdl;\n    }\n\n    amsc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int amsc_gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                      struct gattc_cmp_evt const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct amsc_env_tag *amsc_env = PRF_ENV_GET(AMSC, amsc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  TRACE(5, \"AMSC %s entry. op=%d, seq=%d, status=%d, conidx=%d\", __func__,\n        param->operation, param->seq_num, param->status, conidx);\n  // Status\n  uint8_t status;\n\n  if (amsc_env->env[conidx] != NULL) {\n    uint8_t state = ke_state_get(dest_id);\n\n    TRACE(2, \"AMSC %s state=%d\", __func__, state);\n    if (state == AMSC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (amsc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity_128(\n              AMSC_CHAR_MAX, amsc_env->env[conidx]->ams.chars, amsc_ams_char);\n        }\n        // too much services\n        else if (amsc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              AMSC_DESC_MAX, amsc_env->env[conidx]->ams.descs,\n              amsc_ams_char_desc, amsc_env->env[conidx]->ams.chars);\n        }\n      }\n\n      amsc_enable_rsp_send(amsc_env, conidx, status);\n#if (ANCS_PROXY_ENABLE)\n      TRACE(4, \"AMSC %s rmtChar=0x%4.4x, rmtVal=0x%4.4x, rmtCfg=0x%4.4x\",\n            __func__,\n            amsc_env->env[conidx]->ams.chars[AMSC_REMOTE_COMMAND_CHAR].char_hdl,\n            amsc_env->env[conidx]->ams.chars[AMSC_REMOTE_COMMAND_CHAR].val_hdl,\n            amsc_env->env[conidx]\n                ->ams.descs[AMSC_DESC_REMOTE_CMD_CL_CFG]\n                .desc_hdl);\n      TRACE(4, \"AMSC %s EnUpChar=0x%4.4x EnUpVal=0x%4.4x, EnUpCfg=0x%4.4x\",\n            __func__,\n            amsc_env->env[conidx]->ams.chars[AMSC_ENTITY_UPDATE_CHAR].char_hdl,\n            amsc_env->env[conidx]->ams.chars[AMSC_ENTITY_UPDATE_CHAR].val_hdl,\n            amsc_env->env[conidx]\n                ->ams.descs[AMSC_DESC_ENTITY_UPDATE_CL_CFG]\n                .desc_hdl);\n      TRACE(\n          3, \"AMSC %s EnAtrChar=0x%4.4x, EnAtrVal=0x%4.4x\", __func__,\n          amsc_env->env[conidx]->ams.chars[AMSC_ENTITY_ATTRIBUTE_CHAR].char_hdl,\n          amsc_env->env[conidx]->ams.chars[AMSC_ENTITY_ATTRIBUTE_CHAR].val_hdl);\n      ams_proxy_set_ready_flag(\n          conidx,\n          amsc_env->env[conidx]->ams.chars[AMSC_REMOTE_COMMAND_CHAR].char_hdl,\n          amsc_env->env[conidx]->ams.chars[AMSC_REMOTE_COMMAND_CHAR].val_hdl,\n          amsc_env->env[conidx]\n              ->ams.descs[AMSC_DESC_REMOTE_CMD_CL_CFG]\n              .desc_hdl,\n          amsc_env->env[conidx]->ams.chars[AMSC_ENTITY_UPDATE_CHAR].char_hdl,\n          amsc_env->env[conidx]->ams.chars[AMSC_ENTITY_UPDATE_CHAR].val_hdl,\n          amsc_env->env[conidx]\n              ->ams.descs[AMSC_DESC_ENTITY_UPDATE_CL_CFG]\n              .desc_hdl,\n          amsc_env->env[conidx]->ams.chars[AMSC_ENTITY_ATTRIBUTE_CHAR].char_hdl,\n          amsc_env->env[conidx]->ams.chars[AMSC_ENTITY_ATTRIBUTE_CHAR].val_hdl);\n      ke_state_set(dest_id, AMSC_IDLE);\n#endif\n    } else {\n      switch (param->operation) {\n      case GATTC_READ: {\n        TRACE(3, \"AMSC %s read complete status=%d amsc_last_read_handle %d\",\n              __func__, param->status, amsc_last_read_handle);\n        if ((0 != param->status) &&\n            (BTIF_INVALID_HCI_HANDLE != amsc_last_read_handle)) {\n          struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n              GATTC_READ_CFM,\n              KE_BUILD_ID(prf_get_task_from_id(TASK_ID_AMSP), conidx), dest_id,\n              gattc_read_cfm, 0);\n          cfm->status = 0;\n          cfm->handle = amsc_last_read_handle;\n          cfm->length = 0;\n          ke_msg_send(cfm);\n        }\n        amsc_last_read_handle = BTIF_INVALID_HCI_HANDLE;\n        break;\n      }\n      case GATTC_WRITE: {\n        struct gattc_write_cfm *cfm = KE_MSG_ALLOC(\n            GATTC_WRITE_CFM,\n            KE_BUILD_ID(prf_get_task_from_id(TASK_ID_AMSP), conidx), dest_id,\n            gattc_write_cfm);\n        cfm->handle = amsc_env->last_write_handle[conidx];\n        amsc_env->last_write_handle[conidx] = ATT_INVALID_HANDLE;\n        cfm->status = param->status;\n        ke_msg_send(cfm);\n        break;\n      }\n      case GATTC_WRITE_NO_RESPONSE:\n        // There's currently no need to notify the proxy task that this\n        // completed.\n        break;\n      case GATTC_NOTIFY:\n      case GATTC_INDICATE:\n        // Nothing to do. Notify sent.\n      case GATTC_REGISTER:\n      case GATTC_UNREGISTER:\n      case GATTC_SDP_DISC_SVC:\n        // Do nothing\n        break;\n\n      default:\n        ASSERT_ERR(0);\n        break;\n      }\n    }\n  }\n  // else ignore the message\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                   struct gattc_event_ind const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  BLE_FUNC_ENTER();\n  TRACE(5, \"AMSC %s Entry. handle=0x%x, len=%d, type=%d, val[0]=0x%x\", __func__,\n        param->handle, param->length, param->type, param->value[0]);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  struct gattc_send_evt_cmd *cmd;\n  cmd =\n      KE_MSG_ALLOC_DYN(AMS_PROXY_IND_EVT,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_AMSP), conidx),\n                       dest_id, gattc_send_evt_cmd, param->length);\n  cmd->handle = param->handle;\n  cmd->operation = GATTC_NOTIFY;\n  cmd->seq_num = 0;\n  cmd->length = param->length;\n  memcpy(cmd->value, param->value, param->length);\n  ke_msg_send(cmd);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(amsc){\n    {AMSC_ENABLE_REQ, (ke_msg_func_t)amsc_enable_req_handler},\n    {AMSC_READ_CMD, (ke_msg_func_t)amsc_read_cmd_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {AMSC_WRITE_CMD, (ke_msg_func_t)amsc_write_cmd_handler},\n\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)amsc_gattc_cmp_evt_handler},\n};\n\nvoid amsc_task_init(struct ke_task_desc *task_desc) {\n  TRACE(1, \"AMSC %s Entry.\", __func__);\n  // Get the address of the environment\n  struct amsc_env_tag *amsc_env = PRF_ENV_GET(AMSC, amsc);\n\n  task_desc->msg_handler_tab = amsc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(amsc_msg_handler_tab);\n  task_desc->state = amsc_env->state;\n  task_desc->idx_max = AMSC_IDX_MAX;\n}\n\n#endif //(BLE_AMS_CLIENT)\n\n/// @} AMSCTASK\n"
  },
  {
    "path": "services/ble_profiles/ams/amsc/amsc_task.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef _AMSC_TASK_H_\n#define _AMSC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup AMSCTASK AMS Client Task\n * @ingroup AMSC\n * @brief AMS Client Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#if (BLE_AMS_CLIENT)\n\n#include \"ke_task.h\"\n#include \"gattm_task.h\"\n#include \"amsc.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"prf_utils_128.h\"\n\n/// Message IDs\nenum\n{\n    /// Enable the AMS Client task - at connection\n    AMSC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_AMSC),\n\n    /// Enable the AMS Client task - at connection\n    AMSC_ENABLE_RSP,\n\n    /// Read the value of a Client Characteristic Configuration Descriptor in the peer device database\n    AMSC_READ_CMD,\n    \n    /// Write the value of a Client Characteristic Configuration Descriptor in the peer device database\n    AMSC_WRITE_CMD,\n\n    /// Procedure Timeout Timer\n    AMSC_TIMEOUT_TIMER_IND,\n};\n\n/// Operation Codes\nenum\n{\n    /// Reserved operation code\n    AMSC_RESERVED_OP_CODE  = 0x00,\n\n    /// Discovery Procedure\n    AMSC_ENABLE_OP_CODE,\n};\n\n/*\n * API MESSAGE STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the @ref AMSC_ENABLE_REQ message\nstruct amsc_enable_req\n{\n    /// Connection handle\n    uint16_t conhdl;\n\tuint8_t conidx;\n};\n\n\n/// Parameters of the @ref AMSC_ENABLE_RSP message\nstruct amsc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values AMS\n    struct amsc_ams_content ams;\n};\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n//extern const struct ke_state_handler amsc_state_handler[AMSC_STATE_MAX];\n//extern const struct ke_state_handler amsc_default_handler;\n//extern ke_state_t amsc_state[AMSC_IDX_MAX];\n\n#endif //(BLE_ANC_CLIENT)\n\n/// @} AMSCTASK\n\n#endif //(_AMSC_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/anc/anc_common.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef _ANC_COMMON_H_\n#define _ANC_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ANCS Profile\n * @ingroup ANCS\n * @brief ANCS Profile\n *****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#if (BLE_ANC_CLIENT || BLE_ANC_SERVER)\n\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Error Codes\n// Command not recognized by the NP - Protocol\n#define ANC_CMD_UNKNOWN               (0xA0)\n// Command improperly formatted - Proprietary\n#define ANC_CMD_INVALID               (0xA1)\n// One of the parameters does not refer to an existing object on the NP - Proprietary\n#define ANC_PARAM_INVALID             (0xA2)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Category ID Values\nenum\n{\n    /// Other\n    CAT_ID_OTHER             = 0,\n    /// Incoming Call\n    CAT_ID_CALL              = 1,\n    /// Missed Call\n    CAT_ID_MISSED_CALL       = 2,\n    /// Voice Mail\n    CAT_ID_VOICE_MAIL        = 3,\n    /// Social network\n    CAT_ID_SOCIAL            = 4,\n    /// Schedule\n    CAT_ID_SCHEDULE          = 5,\n    /// Email\n    CAT_ID_EMAIL             = 6,\n    /// News Feed\n    CAT_ID_NEWS              = 7,\n    /// Health and Fitness\n    CAT_ID_HEALTH_FITNESS    = 8,\n    /// Business and Finance\n    CAT_ID_BUSINESS_FINANCE  = 9,\n    /// Location\n    CAT_ID_LOCATION          = 10,\n    /// Entertainment\n    CAT_ID_ENTERTAINMENT     = 11,\n\n    CAT_ID_NB,\n\n    /// All supported categories\n    CAT_ID_ALL_SUPPORTED_CAT = 255,\n};\n\n/// Event ID Values\nenum\n{\n    /// Notification Added\n    EVT_ID_NTF_ADDED        = 0,\n    /// Notification Modified\n    EVT_ID_NTF_MODIFIED     = 1,\n    /// Notification Removed\n    EVT_ID_NTF_REMOVED      = 2,\n\n    EVT_ID_NB,\n\n    EVT_ID_ALL_SUPPORTED_EVT = 255,\n};\n\n/// Event Flags\nenum\n{\n    /// Silent\n    EVT_FLAG_SILENT                 = (1 << 0),\n    /// Important\n    EVT_FLAG_IMPORTANT              = (1 << 1),\n\n    EVT_FLAG_NB,\n\n    EVT_FLAG_ALL_SUPPORTED_EVT_FLAG = (1 << 7),\n};\n\n/// Command ID Values\nenum\n{\n    /// Get Notification Attributes\n    CMD_ID_GET_NTF_ATTS      = 0,\n    /// Get App Attributes\n    CMD_ID_GET_APP_ATTS      = 1,\n\n\n    CMD_ID_NB,\n\n    /// All supported commands\n    CMD_ID_ALL_SUPPORTED_CMD = 255,\n};\n\n/// Notification Attribute ID Values\nenum\n{\n    /// App Identifier\n    NTF_ATT_ID_APP_ID        = 0,\n    /// Title (Needs to be followed by a 2-bytes max length parameter)\n    NTF_ATT_ID_TITLE         = 1,\n    /// Subtitle (Needs to be followed by a 2-bytes max length parameter)\n    NTF_ATT_ID_SUBTITLE      = 2,\n    /// Message (Needs to be followed by a 2-bytes max length parameter)\n    NTF_ATT_ID_MSG           = 3,\n    /// Message Size\n    NTF_ATT_ID_MSG_SIZE      = 4,\n    /// Date\n    NTF_ATT_ID_DATE          = 5,\n\n\n    NTF_ATT_ID_NB,\n\n    /// All supported Notification Attributes\n    NTF_ATT_ID_ALL_SUPPORTED_NTF_ATT = 255,\n};\n\n/// Notification Attribute Bit Mask Flags\nenum ancc_ntf_attr_present\n{\n    /// App Identifier present\n    NTF_ATT_ID_APP_ID_PRESENT        = 0x01,\n    /// Title present\n    NTF_ATT_ID_TITLE_PRESENT         = 0x02,\n    /// Subtitle present\n    NTF_ATT_ID_SUBTITLE_PRESENT      = 0x04,\n    /// Message present\n    NTF_ATT_ID_MSG_PRESENT           = 0x08,\n    /// Message Size present\n    NTF_ATT_ID_MSG_SIZE_PRESENT      = 0x10,\n    /// Date present\n    NTF_ATT_ID_DATE_PRESENT          = 0x20,\n};\n\n\n/// App Attribute ID Values\nenum\n{\n    /// Display Name present\n    APP_ATT_ID_DISPLAY_NAME  = 0,\n    \n    APP_ADD_ID_NB,\n\n    /// All supported App Attributes\n    APP_ATT_ID_ALL_SUPPORTED_APP_ATT = 255,\n};\n\n// App Attribute Bit Mask Flags\nenum\n{\n    /// App Identifier\n    APP_ATT_ID_DISPLAY_NAME_PRESENT  = 0x01,\n    \n};\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Notification Source Characteristic Value Structure\nstruct anc_ntf_src\n{\n    /// Event ID\n    uint8_t event_id;\n\n    /// Event Flags\n    uint8_t event_flags;\n\n    /// Category ID\n    uint8_t cat_id;\n\n    /// Category Count: Number of active notifications in the given category\n    uint8_t cat_cnt;\n\n    /// Notification UID\n    uint32_t ntf_uid;\n};\n\n#endif //(BLE_ANC_CLIENT || BLE_ANC_SERVER)\n\n/// @} anc_common\n\n#endif //(_ANC_COMMON_H_)\n"
  },
  {
    "path": "services/ble_profiles/anc/ancc/ancc.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup ANCC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_ANC_CLIENT)\n#include \"anc_common.h\"\n#include \"ancc.h\"\n#include \"ancc_task.h\"\n#include \"ke_mem.h\"\n#include \"ke_timer.h\"\n\n/**\n ****************************************************************************************\n * @brief Initialization of the ANCC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t ancc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  BLE_FUNC_ENTER();\n\n  struct ancc_env_tag *ancc_env = (struct ancc_env_tag *)ke_malloc(\n      sizeof(struct ancc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate ANCC required environment variable\n  env->env = (prf_env_t *)ancc_env;\n\n  ancc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  ancc_env->prf_env.prf_task =\n      env->task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                             : PERM(PRF_MI, DISABLE));\n\n  // initialize environment variable\n  env->id = TASK_ID_ANCC;\n  ancc_task_init(&(env->desc));\n\n  for (idx = 0; idx < ANCC_IDX_MAX; idx++) {\n    ancc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), ANCC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void ancc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct ancc_env_tag *ancc_env = (struct ancc_env_tag *)env->env;\n\n  BLE_FUNC_ENTER();\n\n  // clean-up environment variable allocated for task instance\n  if (ancc_env->env[conidx] != NULL) {\n    ke_timer_clear(ANCC_TIMEOUT_TIMER_IND,\n                   prf_src_task_get(&ancc_env->prf_env, conidx));\n    ke_free(ancc_env->env[conidx]);\n    ancc_env->env[conidx] = NULL;\n  }\n\n  /* Put ANC Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), ANCC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the ANCC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void ancc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct ancc_env_tag *ancc_env = (struct ancc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < ANCC_IDX_MAX; idx++) {\n    ancc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(ancc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void ancc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put ANC Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), ANCC_IDLE);\n}\n\n/// ANCC Task interface required by profile manager\nconst struct prf_task_cbs ancc_itf = {\n    ancc_init,\n    ancc_destroy,\n    ancc_create,\n    ancc_cleanup,\n};\n\nconst struct prf_task_cbs *ancc_prf_itf_get(void) { return &ancc_itf; }\n\nvoid ancc_enable_rsp_send(struct ancc_env_tag *ancc_env, uint8_t conidx,\n                          uint8_t status) {\n  BLE_FUNC_ENTER();\n\n  // ASSERT(status == GAP_ERR_NO_ERROR, \"%s error %d\", __func__, status);\n  if (status == GAP_ERR_NO_ERROR) {\n    // Register ANCC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(ancc_env->prf_env), conidx,\n                             &(ancc_env->env[conidx]->anc.svc));\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(ancc_env->prf_env), conidx), ANCC_IDLE);\n  }\n}\n\n#endif //(BLE_ANC_CLIENT)\n\n/// @} ANCC\n"
  },
  {
    "path": "services/ble_profiles/anc/ancc/ancc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef _ANCC_H_\n#define _ANCC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ANCC.\n * @ingroup ANC\n * @brief ANCS - Client Role.\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"anc_common.h\"\n\n#if (BLE_ANC_CLIENT)\n\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"prf_utils_128.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of ANCC task instances\n#define ANCC_IDX_MAX        (BLE_CONNECTION_MAX)\n\n/// Possible states of the ancc task\nenum ancc_states\n{\n    /// Idle state\n    ANCC_FREE,\n    /// Connected state\n    ANCC_IDLE,\n    /// Discovery\n    ANCC_DISCOVERING,\n\n    /// Number of defined states.\n    ANCC_STATE_MAX\n};\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// ANCS Characteristics\nenum ancc_anc_chars\n{\n    /// Notification Source\n    ANCC_CHAR_NTF_SRC,\n    /// Control Point\n    ANCC_CHAR_CTRL_PT,\n    /// Data Source\n    ANCC_CHAR_DATA_SRC,\n\n    ANCC_CHAR_MAX,\n};\n\n/// ANCS Characteristic Descriptors\nenum ancc_anc_descs\n{\n    /// Notification Source - Client Characteristic Configuration\n    ANCC_DESC_NTF_SRC_CL_CFG,\n    /// Data Source - Client Characteristic Configuration\n    ANCC_DESC_DATA_SRC_CL_CFG,\n\n    ANCC_DESC_MAX,\n\n    ANCC_DESC_MASK = 0x10,\n};\n\n/// Pointer to the connection clean-up function\n#define ANCC_CLEANUP_FNCT        (ancc_cleanup)\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Alert Notification Service\n */\nstruct ancc_anc_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - Notification Source\n    ///  - Control Point\n    ///  - Data Source\n    struct prf_char_inf chars[ANCC_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - Notification Source Client Char Cfg\n    ///  - Data Source Client Char Cfg\n    struct prf_char_desc_inf descs[ANCC_DESC_MAX];\n};\n\nstruct ancc_cnx_env\n{\n    /// Current Operation\n    void *operation;\n\n    /// Provide an indication about the last operation\n    uint16_t last_req;\n    /// Last characteristic code discovered\n    uint8_t last_char_code;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n\n    /// ANCS Characteristics\n    struct ancc_anc_content anc;\n};\n\n/// ANCS Client environment variable\nstruct ancc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n\n    // TODO(jkessinger): Is this safe? Reliable? WTF?\n    uint16_t last_write_handle[ANCC_IDX_MAX];\n    /// Environment variable pointer for each connections\n    struct ancc_cnx_env* env[ANCC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[ANCC_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve ANCS client profile interface\n *\n * @return ANCS client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* ancc_prf_itf_get(void);\nvoid ancc_enable_rsp_send(struct ancc_env_tag *ancc_env, uint8_t conidx, uint8_t status);\nvoid ancc_task_init(struct ke_task_desc *task_desc);\n\n#endif //(BLE_ANC_CLIENT)\n\n/// @} ANCC\n\n#endif //(_ANCC_H_)\n"
  },
  {
    "path": "services/ble_profiles/anc/ancc/ancc_task.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup ANCCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_ANC_CLIENT)\n\n#include \"anc_common.h\"\n#include \"ancc.h\"\n#include \"ancc_task.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n#include \"prf_utils_128.h\"\n\n#include \"compiler.h\"\n#include \"ke_timer.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n#if (ANCS_PROXY_ENABLE)\n#include \"ancs_gatt_server.h\"\n#endif\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// ANCS UUID\nconst struct att_uuid_128 ancc_anc_svc = {{0xD0, 0x00, 0x2D, 0x12, 0x1E, 0x4B,\n                                           0x0F, 0xA4, 0x99, 0x4E, 0xCE, 0xB5,\n                                           0x31, 0xF4, 0x05, 0x79}};\n\n/// State machine used to retrieve ANCS characteristics information\nconst struct prf_char_def_128 ancc_anc_char[ANCC_CHAR_MAX] = {\n    /// Notification Source\n    [ANCC_CHAR_NTF_SRC] = {{0xBD, 0x1D, 0xA2, 0x99, 0xE6, 0x25, 0x58, 0x8C,\n                            0xD9, 0x42, 0x01, 0x63, 0x0D, 0x12, 0xBF, 0x9F},\n                           ATT_MANDATORY,\n                           ATT_CHAR_PROP_NTF},\n\n    /// Control Point\n    [ANCC_CHAR_CTRL_PT] = {{0xD9, 0xD9, 0xAA, 0xFD, 0xBD, 0x9B, 0x21, 0x98,\n                            0xA8, 0x49, 0xE1, 0x45, 0xF3, 0xD8, 0xD1, 0x69},\n                           ATT_OPTIONAL,\n                           ATT_CHAR_PROP_WR},\n\n    /// Data Source\n    [ANCC_CHAR_DATA_SRC] = {{0xFB, 0x7B, 0x7C, 0xCE, 0x6A, 0xB3, 0x44, 0xBE,\n                             0xB5, 0x4B, 0xD6, 0x24, 0xE9, 0xC6, 0xEA, 0x22},\n                            ATT_OPTIONAL,\n                            ATT_CHAR_PROP_NTF},\n\n};\n\n/// State machine used to retrieve ANCS characteristic descriptor information\nconst struct prf_char_desc_def ancc_anc_char_desc[ANCC_DESC_MAX] = {\n    /// Notification Source Char. - Client Characteristic Configuration\n    [ANCC_DESC_NTF_SRC_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                  ANCC_CHAR_NTF_SRC},\n    /// Data Source Char. - Client Characteristic Configuration\n    [ANCC_DESC_DATA_SRC_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                   ANCC_CHAR_DATA_SRC},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref ANCC_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int ancc_enable_req_handler(ke_msg_id_t const msgid,\n                                   struct ancc_enable_req *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  struct ancc_env_tag *ancc_env = PRF_ENV_GET(ANCC, ancc);\n  // Get connection index\n  uint8_t conidx = param->conidx;\n  uint8_t state = ke_state_get(dest_id);\n  TRACE(3, \"ANCSC %s Entry. state=%d, conidx=%d\", __func__, state, conidx);\n\n  if ((state == ANCC_IDLE) && (ancc_env->env[conidx] == NULL)) {\n    TRACE(1, \"ANCSC %s passed state check\", __func__);\n    // allocate environment variable for task instance\n    ancc_env->env[conidx] = (struct ancc_cnx_env *)ke_malloc(\n        sizeof(struct ancc_cnx_env), KE_MEM_ATT_DB);\n    ASSERT(ancc_env->env[conidx], \"%s alloc error\", __func__);\n    memset(ancc_env->env[conidx], 0, sizeof(struct ancc_cnx_env));\n\n    ancc_env->env[conidx]->last_char_code = ANCC_ENABLE_OP_CODE;\n\n    // Start discovering\n    // Discover ANCS service by 128-bit UUID\n    prf_disc_svc_send_128(&(ancc_env->prf_env), conidx,\n                          (uint8_t *)&ancc_anc_svc.uuid);\n\n    // Go to DISCOVERING state\n    ke_state_set(dest_id, ANCC_DISCOVERING);\n\n    // Configure the environment for a discovery procedure\n    ancc_env->env[conidx]->last_req = ATT_DECL_PRIMARY_SERVICE;\n  }\n\n  else if (state != ANCC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    ancc_enable_rsp_send(ancc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref ANCC_READ_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int ancc_read_cmd_handler(ke_msg_id_t const msgid,\n                                 struct gattc_read_cmd *param,\n                                 ke_task_id_t const dest_id,\n                                 ke_task_id_t const src_id) {\n\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  TRACE(6, \"ANCSC %s Entry. conidex %d hdl=0x%4.4x, op=%d, len=%d, off=%d\",\n        __func__, conidx, param->req.simple.handle, param->operation,\n        param->req.simple.length, param->req.simple.offset);\n\n  // Get the address of the environment\n  struct ancc_env_tag *ancc_env = PRF_ENV_GET(ANCC, ancc);\n\n  if (ancc_env != NULL) {\n    // Send the read request\n    prf_read_char_send(\n        &(ancc_env->prf_env), conidx, ancc_env->env[conidx]->anc.svc.shdl,\n        ancc_env->env[conidx]->anc.svc.ehdl, param->req.simple.handle);\n  } else {\n    //        amsc_send_no_conn_cmp_evt(dest_id, src_id, param->handle,\n    //        ANCC_WRITE_CL_CFG_OP_CODE);\n    ASSERT(0, \"%s implement me\", __func__);\n  }\n\n  return KE_MSG_CONSUMED;\n}\n\nstatic int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                  struct gattc_read_ind const *param,\n                                  ke_task_id_t const dest_id,\n                                  ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct amsc_env_tag *amsc_env = PRF_ENV_GET(ANCC, amsc);\n  TRACE(3, \"ANCSC %s param->handle=0x%x param->length=%d\", __func__,\n        param->handle, param->length);\n\n  if (amsc_env != NULL) {\n    uint8_t conidx = KE_IDX_GET(src_id);\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM,\n        KE_BUILD_ID(prf_get_task_from_id(TASK_ID_ANCSP), conidx), dest_id,\n        gattc_read_cfm, param->length);\n    cfm->status = 0; // read_ind has no status???\n    cfm->handle = param->handle;\n    cfm->length = param->length;\n    memcpy(cfm->value, param->value, param->length);\n    ke_msg_send(cfm);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref ANCC_WRITE_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int ancc_write_cmd_handler(ke_msg_id_t const msgid,\n                                  struct gattc_write_cmd *param,\n                                  ke_task_id_t const dest_id,\n                                  ke_task_id_t const src_id) {\n  TRACE(4, \"ANCSC %s Entry. hdl=0x%4.4x, op=%d, len=%d\", __func__,\n        param->handle, param->operation, param->length);\n\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // Get the address of the environment\n  struct ancc_env_tag *ancc_env = PRF_ENV_GET(ANCC, ancc);\n\n  if (ancc_env != NULL) {\n    ancc_env->last_write_handle[conidx] = param->handle;\n    // TODO(jkessinger): Use ke_msg_forward.\n    struct gattc_write_cmd *wr_char =\n        KE_MSG_ALLOC_DYN(GATTC_WRITE_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         dest_id, gattc_write_cmd, param->length);\n    memcpy(wr_char, param, sizeof(struct gattc_write_cmd) + param->length);\n    // Send the message\n    ke_msg_send(wr_char);\n  } else {\n    //        ancc_send_no_conn_cmp_evt(dest_id, src_id, param->handle,\n    //        ANCC_WRITE_CL_CFG_OP_CODE);\n    ASSERT(0, \"%s implement me\", __func__);\n  }\n\n  return KE_MSG_CONSUMED;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  TRACE(4,\n        \"ANCSC %s Entry. end_hdl=0x%4.4x, start_hdl=0x%4.4x, att.att_type=%d\",\n        __func__, ind->end_hdl, ind->start_hdl, ind->info[0].att.att_type);\n  TRACE(3,\n        \"ANCSC att_char.prop=%d, att_char.handle=0x%4.4x, att_char.att_type=%d\",\n        ind->info[0].att_char.prop, ind->info[0].att_char.handle,\n        ind->info[0].att_char.att_type);\n  TRACE(4,\n        \"ANCSC inc_svc.att_type=%d, inc_svc.end_hdl=0x%4.4x, \"\n        \"inc_svc.start_hdl=0x%4.4x, state=%d\",\n        ind->info[0].att_type, ind->info[0].inc_svc.att_type,\n        ind->info[0].inc_svc.start_hdl, state);\n\n  if (state == ANCC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(src_id);\n\n    struct ancc_env_tag *ancc_env = PRF_ENV_GET(ANCC, ancc);\n\n    ASSERT_INFO(ancc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(ancc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (ancc_env->env[conidx]->nb_svc == 0) {\n      TRACE(0, \"ANCSC retrieving characteristics and descriptors.\");\n      // Retrieve ANC characteristics and descriptors\n      prf_extract_svc_info_128(ind, ANCC_CHAR_MAX, &ancc_anc_char[0],\n                               &ancc_env->env[conidx]->anc.chars[0],\n                               ANCC_DESC_MAX, &ancc_anc_char_desc[0],\n                               &ancc_env->env[conidx]->anc.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      ancc_env->env[conidx]->anc.svc.shdl = ind->start_hdl;\n      ancc_env->env[conidx]->anc.svc.ehdl = ind->end_hdl;\n    }\n\n    ancc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                 struct gattc_cmp_evt const *param,\n                                 ke_task_id_t const dest_id,\n                                 ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct ancc_env_tag *ancc_env = PRF_ENV_GET(ANCC, ancc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  TRACE(5, \"ANCSC %s entry. op=%d, seq=%d, status=%d, conidx=%d\", __func__,\n        param->operation, param->seq_num, param->status, conidx);\n  // Status\n  uint8_t status;\n\n  if (ancc_env->env[conidx] != NULL) {\n    uint8_t state = ke_state_get(dest_id);\n\n    TRACE(2, \"ANCSC %s state=%d\", __func__, state);\n    if (state == ANCC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (ancc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity_128(\n              ANCC_CHAR_MAX, ancc_env->env[conidx]->anc.chars, ancc_anc_char);\n        }\n        // too much services\n        else if (ancc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              ANCC_DESC_MAX, ancc_env->env[conidx]->anc.descs,\n              ancc_anc_char_desc, ancc_env->env[conidx]->anc.chars);\n        }\n      }\n\n      ancc_enable_rsp_send(ancc_env, conidx, status);\n#if (ANCS_PROXY_ENABLE)\n      TRACE(\n          4, \"ANCSC %s NSChar=0x%4.4x, NSVal=0x%4.4x, NSCfg=0x%4.4x\", __func__,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_NTF_SRC].char_hdl,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_NTF_SRC].val_hdl,\n          ancc_env->env[conidx]->anc.descs[ANCC_DESC_NTF_SRC_CL_CFG].desc_hdl);\n      TRACE(\n          4, \"ANCSC %s DSChar=0x%4.4x DSVal=0x%4.4x, DSCfg=0x%4.4x\", __func__,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_DATA_SRC].char_hdl,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_DATA_SRC].val_hdl,\n          ancc_env->env[conidx]->anc.descs[ANCC_DESC_DATA_SRC_CL_CFG].desc_hdl);\n      TRACE(3, \"ANCSC %s CPChar=0x%4.4x, CPVal=0x%4.4x\", __func__,\n            ancc_env->env[conidx]->anc.chars[ANCC_CHAR_CTRL_PT].char_hdl,\n            ancc_env->env[conidx]->anc.chars[ANCC_CHAR_CTRL_PT].val_hdl);\n      ancs_proxy_set_ready_flag(\n          conidx, ancc_env->env[conidx]->anc.chars[ANCC_CHAR_NTF_SRC].char_hdl,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_NTF_SRC].val_hdl,\n          ancc_env->env[conidx]->anc.descs[ANCC_DESC_NTF_SRC_CL_CFG].desc_hdl,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_DATA_SRC].char_hdl,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_DATA_SRC].val_hdl,\n          ancc_env->env[conidx]->anc.descs[ANCC_DESC_DATA_SRC_CL_CFG].desc_hdl,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_CTRL_PT].char_hdl,\n          ancc_env->env[conidx]->anc.chars[ANCC_CHAR_CTRL_PT].val_hdl);\n      ke_state_set(dest_id, ANCC_IDLE);\n#endif\n    } else {\n      switch (param->operation) {\n      case GATTC_READ: {\n        TRACE(2, \"ANCSC %s read complete status=%d\", __func__, param->status);\n        break;\n      }\n      case GATTC_WRITE: {\n        struct gattc_write_cfm *cfm = KE_MSG_ALLOC(\n            GATTC_WRITE_CFM,\n            KE_BUILD_ID(prf_get_task_from_id(TASK_ID_ANCSP), conidx), dest_id,\n            gattc_write_cfm);\n        cfm->handle = ancc_env->last_write_handle[conidx];\n        ancc_env->last_write_handle[conidx] = ATT_INVALID_HANDLE;\n        cfm->status = param->status;\n        ke_msg_send(cfm);\n        break;\n      }\n      case GATTC_WRITE_NO_RESPONSE:\n        // There's currently no need to notify the proxy task that this\n        // completed.\n        break;\n      case GATTC_NOTIFY:\n      case GATTC_INDICATE:\n        // Nothing to do. Notification sent.\n      case GATTC_REGISTER:\n      case GATTC_UNREGISTER:\n      case GATTC_SDP_DISC_SVC:\n        // Do nothing\n        break;\n\n      default:\n        ASSERT_ERR(0);\n        break;\n      }\n    }\n  }\n  // else ignore the message\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                   struct gattc_event_ind const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  BLE_FUNC_ENTER();\n  TRACE(5, \"ANCSC %s Entry. handle=0x%x, len=%d, type=%d, val[0]=0x%x\",\n        __func__, param->handle, param->length, param->type, param->value[0]);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  struct gattc_send_evt_cmd *cmd;\n  cmd =\n      KE_MSG_ALLOC_DYN(ANCS_PROXY_IND_EVT,\n                       KE_BUILD_ID(prf_get_task_from_id(TASK_ID_ANCSP), conidx),\n                       dest_id, gattc_send_evt_cmd, param->length);\n  cmd->handle = param->handle;\n  cmd->operation = GATTC_NOTIFY;\n  cmd->seq_num = 0;\n  cmd->length = param->length;\n  memcpy(cmd->value, param->value, param->length);\n  ke_msg_send(cmd);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(ancc){\n    {ANCC_ENABLE_REQ, (ke_msg_func_t)ancc_enable_req_handler},\n    {ANCC_WRITE_CMD, (ke_msg_func_t)ancc_write_cmd_handler},\n    {ANCC_READ_CMD, (ke_msg_func_t)ancc_read_cmd_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid ancc_task_init(struct ke_task_desc *task_desc) {\n  TRACE(1, \"ANCSC %s Entry.\", __func__);\n  // Get the address of the environment\n  struct ancc_env_tag *ancc_env = PRF_ENV_GET(ANCC, ancc);\n\n  task_desc->msg_handler_tab = ancc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(ancc_msg_handler_tab);\n  task_desc->state = ancc_env->state;\n  task_desc->idx_max = ANCC_IDX_MAX;\n}\n\n#endif //(BLE_ANC_CLIENT)\n\n/// @} ANCCTASK\n"
  },
  {
    "path": "services/ble_profiles/anc/ancc/ancc_task.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef _ANCC_TASK_H_\n#define _ANCC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ANCCTASK ANCS Client Task\n * @ingroup ANCC\n * @brief ANCS Client Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"anc_common.h\"\n\n#if (BLE_ANC_CLIENT)\n\n#include \"ke_task.h\"\n#include \"gattm_task.h\"\n#include \"ancc.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"prf_utils_128.h\"\n\n/// Message IDs\nenum\n{\n    /// Enable the ANCS Client task - at connection\n    ANCC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_ANCC),\n\n    /// Enable the ANCS Client task - at connection\n    ANCC_ENABLE_RSP,\n\n    /// Disable Indication\n    ANCC_DISABLE_IND,\n\n    /// Read the value of a Client Characteristic Configuration Descriptor in the peer device database\n    ANCC_READ_CMD,\n    \n    /// Write the value of a Client Characteristic Configuration Descriptor in the peer device database\n    ANCC_WRITE_CMD,\n\n    /// Procedure Timeout Timer\n    ANCC_TIMEOUT_TIMER_IND,\n};\n\n/// Operation Codes\nenum\n{\n    /// Reserved operation code\n    ANCC_RESERVED_OP_CODE  = 0x00,\n\n    /// Discovery Procedure\n    ANCC_ENABLE_OP_CODE,\n};\n\n/*\n * API MESSAGE STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the @ref ANCC_ENABLE_REQ message\nstruct ancc_enable_req\n{\n\tuint8_t conidx;\n};\n\n\n/// Parameters of the @ref ANCC_ENABLE_RSP message\nstruct ancc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values ANC\n    struct ancc_anc_content anc;\n};\n\n/// Parameters of the @ref ANCC_DISABLE_IND message\nstruct ancc_disable_ind\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// Operation Code\n    uint8_t status;\n};\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n//extern const struct ke_state_handler ancc_state_handler[ANCC_STATE_MAX];\n//extern const struct ke_state_handler ancc_default_handler;\n//extern ke_state_t ancc_state[ANCC_IDX_MAX];\n\n#endif //(BLE_ANC_CLIENT)\n\n/// @} ANCCTASK\n\n#endif //(_ANCC_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/anp/anp_common.h",
    "content": "#ifndef _ANP_COMMON_H_\n#define _ANP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ANP Alert Notification Profile\n * @ingroup ANP\n * @brief Alert Notification Profile\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Error Code\n// Command Not Supported - Protocol\n#define ANP_CMD_NOT_SUPPORTED               (0xA0)\n// Category Not Supported - Proprietary\n#define ANP_CAT_NOT_SUPPORTED               (0xA1)\n\n/// Alert Category ID Bit Mask 0 Masks\n#define ANP_CAT_ID_SPL_ALERT_SUP            (0x01)\n#define ANP_CAT_ID_EMAIL_SUP                (0x02)\n#define ANP_CAT_ID_NEWS_SUP                 (0x04)\n#define ANP_CAT_ID_CALL_SUP                 (0x08)\n#define ANP_CAT_ID_MISSED_CALL_SUP          (0x10)\n#define ANP_CAT_ID_SMS_MMS_SUP              (0x20)\n#define ANP_CAT_ID_VOICE_MAIL_SUP           (0x40)\n#define ANP_CAT_ID_SCHEDULE_SUP             (0x80)\n\n/// Alert Category ID Bit Mask 1 Masks\n#define ANP_CAT_ID_HIGH_PRTY_ALERT          (0x01)\n#define ANP_CAT_ID_INST_MSG                 (0x02)\n/// Alert Category ID 1 Mask\n#define ANP_CAT_ID_1_MASK                   (ANP_CAT_ID_HIGH_PRTY_ALERT | ANP_CAT_ID_INST_MSG)\n\n/// New Alert Characteristic Value - Text String Information Max Length\n#define ANS_NEW_ALERT_STRING_INFO_MAX_LEN   (18)\n/// New Alert Characteristic Value Max Length\n#define ANS_NEW_ALERT_MAX_LEN (ANS_NEW_ALERT_STRING_INFO_MAX_LEN + 2)\n/// Bonded data configured\n#define ANPS_FLAG_CFG_PERFORMED_OK          (0x10)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Category ID Field Keys\nenum\n{\n    /// Simple Alert\n    CAT_ID_SPL_ALERT                    = 0,\n    /// Email\n    CAT_ID_EMAIL,\n    /// News Feed\n    CAT_ID_NEWS,\n    /// Incoming Call\n    CAT_ID_CALL,\n    /// Missed Call\n    CAT_ID_MISSED_CALL,\n    /// SMS/MMS\n    CAT_ID_SMS_MMS,\n    /// Voice Mail\n    CAT_ID_VOICE_MAIL,\n    /// Schedule\n    CAT_ID_SCHEDULE,\n    /// High Priority Alert\n    CAT_ID_HIGH_PRTY_ALERT,\n    /// Instant Message\n    CAT_ID_INST_MSG,\n\n    CAT_ID_NB,\n\n    /// All supported category\n    CAT_ID_ALL_SUPPORTED_CAT            = 255,\n};\n\n/// Command ID Field Keys\nenum\n{\n    /// Enable New Incoming Alert Notification\n    CMD_ID_EN_NEW_IN_ALERT_NTF          = 0,\n    /// Enable Unread Category Status Notification\n    CMD_ID_EN_UNREAD_CAT_STATUS_NTF,\n    /// Disable New Incoming Alert Notification\n    CMD_ID_DIS_NEW_IN_ALERT_NTF,\n    /// Disable Unread Category Status Notification\n    CMD_ID_DIS_UNREAD_CAT_STATUS_NTF,\n    /// Notify New Incoming Alert immediately\n    CMD_ID_NTF_NEW_IN_ALERT_IMM,\n    /// Notify Unread Category Status immediately\n    CMD_ID_NTF_UNREAD_CAT_STATUS_IMM,\n\n    CMD_ID_NB,\n};\n\n/// Characteristic Codes\nenum\n{\n    /// Supported New Alert Category Characteristic\n    ANS_SUPP_NEW_ALERT_CAT_CHAR,\n    /// New Alert Characteristic\n    ANS_NEW_ALERT_CHAR,\n    /// Supported Unread Alert Category Characteristic\n    ANS_SUPP_UNREAD_ALERT_CAT_CHAR,\n    /// Unread Alert Status Characteristic\n    ANS_UNREAD_ALERT_STATUS_CHAR,\n    /// Alert Notification Control Point Characteristic\n    ANS_ALERT_NTF_CTNL_PT_CHAR,\n\n    ANS_CHAR_MAX,\n};\n\n/// Alert codes\nenum anp_alert_codes\n{\n    /// New Alert\n    ANP_NEW_ALERT      = 0,\n    ANP_UNREAD_ALERT,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Alert Category ID Bit Mask Structure\nstruct anp_cat_id_bit_mask\n{\n    /// Category ID Bit Mask 0\n    uint8_t cat_id_mask_0;\n    /// Category ID Bit Mask 1\n    uint8_t cat_id_mask_1;\n};\n\n/// New Alert Characteristic Value Structure\nstruct anp_new_alert\n{\n    /// Information String Length\n    uint8_t info_str_len;\n\n    /// Category ID\n    uint8_t cat_id;\n    /// Number of alerts\n    uint8_t nb_new_alert;\n    /// Text String Information\n    uint8_t str_info[1];\n};\n\n/// Unread Alert Characteristic Value Structure\nstruct anp_unread_alert\n{\n    /// Category ID\n    uint8_t cat_id;\n    /// Number of alert\n    uint8_t nb_unread_alert;\n};\n\n/// Alert Notification Control Point Characteristic Value Structure\nstruct anp_ctnl_pt\n{\n    /// Command ID\n    uint8_t cmd_id;\n    /// Category ID\n    uint8_t cat_id;\n};\n\n/// @} anp_common\n\n#endif //(_ANP_COMMON_H_)\n"
  },
  {
    "path": "services/ble_profiles/anp/anpc/api/anpc_task.h",
    "content": "#ifndef _ANPC_TASK_H_\n#define _ANPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ANPCTASK Alert Notification Profile Client Task\n * @ingroup ANPC\n * @brief Alert Notification Profile Client Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n#include \"anp_common.h\"\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Message IDs\nenum anpc_msg_ids\n{\n    /// Enable the Alert Notification Profile Client task - at connection\n    ANPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_ANPC),\n    /// Enable the Alert Notification Profile Client task - at connection\n    ANPC_ENABLE_RSP,\n\n    /// Read the value of an attribute in the peer device database\n    ANPC_READ_CMD,\n    /// Write the value of an attribute in the peer device database\n    ANPC_WRITE_CMD,\n\n    /// Indicate that an attribute value has been received either upon notification or read response\n    ANPC_VALUE_IND,\n\n    /// Complete Event Information\n    ANPC_CMP_EVT,\n};\n\n/// Operation Codes\nenum anpc_op_codes\n{\n    /// Reserved operation code\n    ANPC_RESERVED_OP_CODE  = 0x00,\n\n    /**\n     * EXTERNAL OPERATION CODES\n     */\n\n    /// Discovery Procedure\n    ANPC_ENABLE_OP_CODE,\n    /// Read attribute value Procedure\n    ANPC_READ_OP_CODE,\n    /// Write attribute value Procedure\n    ANPC_WRITE_OP_CODE,\n\n    /**\n     * INTERNAL OPERATION CODES\n     */\n\n    /// Discovery Procedure - Read Supported New Alert Category\n    ANPC_ENABLE_RD_NEW_ALERT_OP_CODE,\n    /// Discovery Procedure - Read Supported Unread Alert Category\n    ANPC_ENABLE_RD_UNREAD_ALERT_OP_CODE,\n    /// Discovery Procedure - Enable New Alert Categories for Notifications\n    ANPC_ENABLE_WR_NEW_ALERT_OP_CODE,\n    /// Discovery Procedure - Ask to be notified immediately for New Alert Values\n    ANPC_ENABLE_WR_NTF_NEW_ALERT_OP_CODE,\n    /// Discovery Procedure - Enable Unread Alert Categories for Notifications\n    ANPC_ENABLE_WR_UNREAD_ALERT_OP_CODE,\n    /// Discovery Procedure - Ask to be notified immediately for Unread Alert Values\n    ANPC_ENABLE_WR_NTF_UNREAD_ALERT_OP_CODE,\n};\n\n/// Alert Notification Service Characteristics\nenum anpc_ans_chars\n{\n    /// Supported New Alert Category\n    ANPC_CHAR_SUP_NEW_ALERT_CAT,\n    /// New Alert\n    ANPC_CHAR_NEW_ALERT,\n    /// Supported Unread Alert Category\n    ANPC_CHAR_SUP_UNREAD_ALERT_CAT,\n    /// Unread Alert Status\n    ANPC_CHAR_UNREAD_ALERT_STATUS,\n    /// Alert Notification Control Point\n    ANPC_CHAR_ALERT_NTF_CTNL_PT,\n\n    ANPC_CHAR_MAX,\n};\n\n/// Alert Notification Service Characteristic Descriptors\nenum anpc_ans_descs\n{\n    /// New Alert Char. - Client Characteristic Configuration\n    ANPC_DESC_NEW_ALERT_CL_CFG,\n    /// Unread Alert Status Char. - Client Characteristic Configuration\n    ANPC_DESC_UNREAD_ALERT_STATUS_CL_CFG,\n\n    ANPC_DESC_MAX,\n\n    ANPC_DESC_MASK = 0x10,\n};\n\n/*\n * API MESSAGE STRUCTURES\n ****************************************************************************************\n */\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Alert Notification Service\n */\nstruct anpc_ans_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - Supported New Alert Category\n    ///  - New Alert\n    ///  - Supported Unread Alert Category\n    ///  - Unread Alert Status\n    ///  - Alert Notification Control Point\n    struct prf_char_inf chars[ANPC_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - New Alert Client Cfg\n    ///  - Unread Alert Status Client Cfg\n    struct prf_char_desc_inf descs[ANPC_DESC_MAX];\n};\n\n/// Parameters of the @ref ANPC_ENABLE_REQ message\nstruct anpc_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n\n    /// New Alert Category to Enable for Notifications\n    struct anp_cat_id_bit_mask new_alert_enable;\n    /// Unread Alert Category to Enable for Notifications\n    struct anp_cat_id_bit_mask unread_alert_enable;\n\n    /// Existing handle values ANS\n    struct anpc_ans_content ans;\n};\n\n/// Parameters of the @ref ANPC_ENABLE_RSP message\nstruct anpc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values ANS\n    struct anpc_ans_content ans;\n};\n\n/// Parameters of the @ref ANPC_READ_CMD message\nstruct anpc_read_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Read code\n    uint8_t read_code;\n};\n\n/// Parameters of the @ref ANPC_WRITE_CMD message\nstruct anpc_write_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Write code\n    uint8_t write_code;\n    /// Value\n    union anpc_write_value_tag\n    {\n        /// Alert Notification Control Point\n        struct anp_ctnl_pt ctnl_pt;\n        /// New Alert Notification Configuration\n        uint16_t new_alert_ntf_cfg;\n        /// Unread Alert Status Notification Configuration\n        uint16_t unread_alert_status_ntf_cfg;\n    } value;\n};\n\n/// Parameters of the @ref ANPC_VALUE_IND message\nstruct anpc_value_ind\n{\n    /// Attribute Code\n    uint8_t att_code;\n    /// Value\n    union anpc_value_tag\n    {\n        /// List of supported categories\n        struct anp_cat_id_bit_mask supp_cat;\n        /// New Alert\n        struct anp_new_alert new_alert;\n        /// Unread Alert\n        struct anp_unread_alert unread_alert;\n        /// Client Characteristic Configuration Descriptor Value\n        uint16_t ntf_cfg;\n    } value;\n};\n\n/// Parameters of the @ref ANPC_CMP_EVT message\nstruct anpc_cmp_evt\n{\n    /// Operation code\n    uint8_t operation;\n    /// Status\n    uint8_t status;\n};\n\n/// @} ANPCTASK\n\n#endif //(_ANPC_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/anp/anpc/src/anpc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup ANPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_AN_CLIENT)\n\n#include \"anp_common.h\"\n#include \"anpc.h\"\n#include \"anpc_task.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the ANPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t anpc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct anpc_env_tag *anpc_env = (struct anpc_env_tag *)ke_malloc(\n      sizeof(struct anpc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate ANPC required environment variable\n  env->env = (prf_env_t *)anpc_env;\n\n  anpc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  anpc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_ANPC;\n  anpc_task_init(&(env->desc));\n\n  for (idx = 0; idx < ANPC_IDX_MAX; idx++) {\n    anpc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), ANPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void anpc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct anpc_env_tag *anpc_env = (struct anpc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (anpc_env->env[conidx] != NULL) {\n    ke_free(anpc_env->env[conidx]);\n    anpc_env->env[conidx] = NULL;\n  }\n\n  /* Put ANP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), ANPC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the ANPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void anpc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct anpc_env_tag *anpc_env = (struct anpc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < ANPC_IDX_MAX; idx++) {\n    anpc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(anpc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void anpc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put ANP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), ANPC_IDLE);\n}\n\n/// ANPC Task interface required by profile manager\nconst struct prf_task_cbs anpc_itf = {\n    anpc_init,\n    anpc_destroy,\n    anpc_create,\n    anpc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *anpc_prf_itf_get(void) { return &anpc_itf; }\n\nvoid anpc_enable_rsp_send(struct anpc_env_tag *anpc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Send to APP the details of the discovered attributes on ANPS\n  struct anpc_enable_rsp *rsp = KE_MSG_ALLOC(\n      ANPC_ENABLE_RSP, prf_dst_task_get(&(anpc_env->prf_env), conidx),\n      prf_src_task_get(&(anpc_env->prf_env), conidx), anpc_enable_rsp);\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->ans = anpc_env->env[conidx]->ans;\n    // Register ANPC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(anpc_env->prf_env), conidx,\n                             &(anpc_env->env[conidx]->ans.svc));\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(anpc_env->prf_env), conidx), ANPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nbool anpc_found_next_alert_cat(struct anpc_env_tag *idx_env, uint8_t conidx,\n                               struct anp_cat_id_bit_mask cat_id) {\n  // Next Category Found ?\n  bool found = false;\n\n  if (idx_env->env[conidx]->last_uuid_req < CAT_ID_HIGH_PRTY_ALERT) {\n    // Look in the first part of the categories\n    while ((idx_env->env[conidx]->last_uuid_req < CAT_ID_HIGH_PRTY_ALERT) &&\n           (!found)) {\n      if (((cat_id.cat_id_mask_0 >> idx_env->env[conidx]->last_uuid_req) & 1) ==\n          1) {\n        found = true;\n      }\n\n      idx_env->env[conidx]->last_uuid_req++;\n    }\n  }\n\n  if (idx_env->env[conidx]->last_uuid_req >= CAT_ID_HIGH_PRTY_ALERT) {\n    // Look in the first part of the categories\n    while ((idx_env->env[conidx]->last_uuid_req < CAT_ID_NB) && (!found)) {\n      if (((cat_id.cat_id_mask_1 >>\n            (idx_env->env[conidx]->last_uuid_req - CAT_ID_HIGH_PRTY_ALERT)) &\n           1) == 1) {\n        found = true;\n      }\n\n      idx_env->env[conidx]->last_uuid_req++;\n    }\n  }\n\n  return found;\n}\n\nvoid anpc_write_alert_ntf_ctnl_pt(struct anpc_env_tag *idx_env, uint8_t conidx,\n                                  uint8_t cmd_id, uint8_t cat_id) {\n  struct anp_ctnl_pt ctnl_pt = {cmd_id, cat_id};\n\n  // Send the write request\n  prf_gatt_write(\n      &(idx_env->prf_env), conidx,\n      idx_env->env[conidx]->ans.chars[ANPC_CHAR_ALERT_NTF_CTNL_PT].val_hdl,\n      (uint8_t *)&ctnl_pt, sizeof(struct anp_ctnl_pt), GATTC_WRITE);\n}\n\nvoid anpc_send_cmp_evt(struct anpc_env_tag *anpc_env, uint8_t conidx,\n                       uint8_t operation, uint8_t status) {\n  if (anpc_env->env[conidx] != NULL) {\n    // Free the stored operation if needed\n    if (anpc_env->env[conidx]->operation != NULL) {\n      ke_msg_free(ke_param2msg(anpc_env->env[conidx]->operation));\n      anpc_env->env[conidx]->operation = NULL;\n    }\n  }\n\n  // Go back to the CONNECTED state if the state is busy\n  if (ke_state_get(prf_src_task_get(&(anpc_env->prf_env), conidx)) ==\n      ANPC_BUSY) {\n    ke_state_set(prf_src_task_get(&anpc_env->prf_env, conidx), ANPC_IDLE);\n  }\n\n  // Send the message\n  struct anpc_cmp_evt *evt = KE_MSG_ALLOC(\n      ANPC_CMP_EVT, prf_dst_task_get(&(anpc_env->prf_env), conidx),\n      prf_src_task_get(&(anpc_env->prf_env), conidx), anpc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\n#endif //(BLE_AN_CLIENT)\n\n/// @} ANPC\n"
  },
  {
    "path": "services/ble_profiles/anp/anpc/src/anpc.h",
    "content": "#ifndef _ANPC_H_\n#define _ANPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ANPC Alert Notification Profile Client\n * @ingroup ANP\n * @brief Phone Alert Notification Profile Client\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_AN_CLIENT)\n#include \"anp_common.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"anpc_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of Alert Notification Client task instances\n#define ANPC_IDX_MAX        (BLE_CONNECTION_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the ANPC task\nenum anpc_states\n{\n    /// Free state\n    ANPC_FREE,\n    /// Idle state\n    ANPC_IDLE,\n    /// Connected state\n    ANPC_DISCOVERING,\n    /// Busy state\n    ANPC_BUSY,\n\n    /// Number of defined states.\n    ANPC_STATE_MAX\n};\n\n/// Codes for reading/writing a ANS characteristic with one single request\nenum anpc_rd_wr_ntf_codes\n{\n    /// Read ANS Supported New Alert Category\n    ANPC_RD_SUP_NEW_ALERT_CAT           = ANPC_CHAR_SUP_NEW_ALERT_CAT,\n    /// NTF New Alert\n    ANPC_NTF_NEW_ALERT                  = ANPC_CHAR_NEW_ALERT,\n    /// Read ANS Supported Unread Alert Category\n    ANPC_RD_SUP_UNREAD_ALERT_CAT        = ANPC_CHAR_SUP_UNREAD_ALERT_CAT,\n    /// NTF Unread Alert Categories\n    ANPC_NTF_UNREAD_ALERT               = ANPC_CHAR_UNREAD_ALERT_STATUS,\n    /// Write ANS Alert Notification Control Point\n    ANPC_WR_ALERT_NTF_CTNL_PT           = ANPC_CHAR_ALERT_NTF_CTNL_PT,\n\n    /// Read/Write ANS New Alert Client Characteristic Configuration Descriptor\n    ANPC_RD_WR_NEW_ALERT_CFG            = (ANPC_DESC_NEW_ALERT_CL_CFG | ANPC_DESC_MASK),\n    /// Read ANS Unread Alert Status Client Characteristic Configuration Descriptor\n    ANPC_RD_WR_UNREAD_ALERT_STATUS_CFG  = (ANPC_DESC_UNREAD_ALERT_STATUS_CL_CFG | ANPC_DESC_MASK),\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n\n/// Command Message Basic Structure\nstruct anpc_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n\n    /// MORE DATA\n};\n\nstruct anpc_cnx_env\n{\n    /// Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// Last characteristic code used in a read or a write request\n    uint16_t last_char_code;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// Current operation code\n    void *operation;\n    /// Phone Alert Status Service Characteristics\n    struct anpc_ans_content ans;\n};\n\n/// Alert Notification Profile Client environment variable\nstruct anpc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct anpc_cnx_env* env[ANPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[ANPC_IDX_MAX];\n};\n\n/*\n * GLOBAL FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Send Alert Notification ATT DB discovery results to ANPC host.\n * @param[in] paspc_env environment variable\n * @param[in] conidx Connection index\n * @param[in] status Satus\n ****************************************************************************************\n */\nvoid anpc_enable_rsp_send(struct anpc_env_tag *anpc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Initialization of the ANPC module.\n * This function performs all the initializations of the ANPC module.\n ****************************************************************************************\n */\nbool anpc_found_next_alert_cat(struct anpc_env_tag *idx_env, uint8_t conidx,\n        struct anp_cat_id_bit_mask cat_id);\n\n/**\n ****************************************************************************************\n * @brief Initialization of the ANPC module.\n * This function performs all the initializations of the ANPC module.\n ****************************************************************************************\n */\nvoid anpc_write_alert_ntf_ctnl_pt(struct anpc_env_tag *idx_env, uint8_t conidx,\n        uint8_t cmd_id, uint8_t cat_id);\n\n/**\n ****************************************************************************************\n * @brief Send a ANPC_CMP_EVT message to the task which enabled the profile\n ****************************************************************************************\n */\nvoid anpc_send_cmp_evt(struct anpc_env_tag *anpc_env, uint8_t conidx, uint8_t operation, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Retrieve ANP client profile interface\n * @return ANP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* anpc_prf_itf_get(void);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid anpc_task_init(struct ke_task_desc *task_desc);\n\n#endif //(BLE_AN_CLIENT)\n\n/// @} ANPC\n\n#endif //(_ANPC_H_)\n"
  },
  {
    "path": "services/ble_profiles/anp/anpc/src/anpc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup ANPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_AN_CLIENT)\n#include \"anp_common.h\"\n\n#include \"anpc.h\"\n#include \"anpc_task.h\"\n#include \"gap.h\"\n#include \"gattm_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Alert Notification service characteristics\n/// information\nconst struct prf_char_def anpc_ans_char[ANPC_CHAR_MAX] = {\n    /// Supported New Alert Category\n    [ANPC_CHAR_SUP_NEW_ALERT_CAT] = {ATT_CHAR_SUP_NEW_ALERT_CAT, ATT_MANDATORY,\n                                     ATT_CHAR_PROP_RD},\n    /// New Alert\n    [ANPC_CHAR_NEW_ALERT] = {ATT_CHAR_NEW_ALERT, ATT_MANDATORY,\n                             ATT_CHAR_PROP_NTF},\n    /// Supported Unread Alert Category\n    [ANPC_CHAR_SUP_UNREAD_ALERT_CAT] = {ATT_CHAR_SUP_UNREAD_ALERT_CAT,\n                                        ATT_MANDATORY, ATT_CHAR_PROP_RD},\n    /// Unread Alert Status\n    [ANPC_CHAR_UNREAD_ALERT_STATUS] = {ATT_CHAR_UNREAD_ALERT_STATUS,\n                                       ATT_MANDATORY, ATT_CHAR_PROP_NTF},\n    /// Alert Notification Control Point\n    [ANPC_CHAR_ALERT_NTF_CTNL_PT] = {ATT_CHAR_ALERT_NTF_CTNL_PT, ATT_MANDATORY,\n                                     ATT_CHAR_PROP_WR},\n};\n\n/// State machine used to retrieve Phone Alert Status service characteristic\n/// descriptor information\nconst struct prf_char_desc_def anpc_ans_char_desc[ANPC_DESC_MAX] = {\n    /// New Alert Char. - Client Characteristic Configuration\n    [ANPC_DESC_NEW_ALERT_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                    ANPC_CHAR_NEW_ALERT},\n    /// Unread Alert Status Char. - Client Characteristic Configuration\n    [ANPC_DESC_UNREAD_ALERT_STATUS_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                              ATT_MANDATORY,\n                                              ANPC_CHAR_UNREAD_ALERT_STATUS},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref ANPC_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int anpc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct anpc_enable_req *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Phone Alert Status Profile Client Role Task Environment\n  struct anpc_env_tag *anpc_env = PRF_ENV_GET(ANPC, anpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t state = ke_state_get(dest_id);\n\n  if ((state == ANPC_IDLE) && (anpc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    anpc_env->env[conidx] = (struct anpc_cnx_env *)ke_malloc(\n        sizeof(struct anpc_cnx_env), KE_MEM_ATT_DB);\n    memset(anpc_env->env[conidx], 0, sizeof(struct anpc_cnx_env));\n\n    anpc_env->env[conidx]->last_char_code = ANPC_ENABLE_OP_CODE;\n\n    // Start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      prf_disc_svc_send(&(anpc_env->prf_env), conidx, ATT_SVC_ALERT_NTF);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, ANPC_DISCOVERING);\n\n      // Configure the environment for a discovery procedure\n      anpc_env->env[conidx]->last_uuid_req = ATT_SVC_ALERT_NTF;\n    }\n    // Bond information is provided\n    else {\n      // Keep the provided database content\n      memcpy(&anpc_env->env[conidx]->ans, ¶m->ans,\n             sizeof(struct anpc_ans_content));\n\n      // send APP confirmation that can start normal connection to TH\n      anpc_enable_rsp_send(anpc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  }\n\n  else if (state != ANPC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    anpc_enable_rsp_send(anpc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref ANPC_READ_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int anpc_read_cmd_handler(ke_msg_id_t const msgid,\n                                   struct anpc_read_cmd *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct anpc_env_tag *anpc_env = PRF_ENV_GET(ANPC, anpc);\n\n  if (anpc_env->env[conidx] != NULL) {\n    // Attribute Handle\n    uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n    // Status\n    uint8_t status = GAP_ERR_NO_ERROR;\n\n    // Check the provided connection handle\n    do {\n      // Check the current state\n      if (ke_state_get(dest_id) == ANPC_BUSY) {\n        // Keep the request for later, status is GAP_ERR_NO_ERROR\n        msg_status = KE_MSG_SAVED;\n        break;\n      }\n\n      switch (param->read_code) {\n      // Read Supported New Alert\n      case (ANPC_RD_SUP_NEW_ALERT_CAT): {\n        handle = anpc_env->env[conidx]\n                     ->ans.chars[ANPC_CHAR_SUP_NEW_ALERT_CAT]\n                     .val_hdl;\n      } break;\n\n      // Read Supported Unread Alert\n      case (ANPC_RD_SUP_UNREAD_ALERT_CAT): {\n        handle = anpc_env->env[conidx]\n                     ->ans.chars[ANPC_CHAR_SUP_UNREAD_ALERT_CAT]\n                     .val_hdl;\n      } break;\n\n      // Read New Alert Characteristic Client Char. Cfg. Descriptor Value\n      case (ANPC_RD_WR_NEW_ALERT_CFG): {\n        handle = anpc_env->env[conidx]\n                     ->ans.descs[ANPC_DESC_NEW_ALERT_CL_CFG]\n                     .desc_hdl;\n      } break;\n\n      // Read Unread Alert Characteristic Client Char. Cfg. Descriptor Value\n      case (ANPC_RD_WR_UNREAD_ALERT_STATUS_CFG): {\n        handle = anpc_env->env[conidx]\n                     ->ans.descs[ANPC_DESC_UNREAD_ALERT_STATUS_CL_CFG]\n                     .desc_hdl;\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      // Check if handle is viable\n      if ((handle != ATT_INVALID_SEARCH_HANDLE) &&\n          (status == GAP_ERR_NO_ERROR)) {\n        // Force the operation value\n        param->operation = ANPC_READ_OP_CODE;\n\n        // Store the command structure\n        anpc_env->env[conidx]->operation = param;\n        msg_status = KE_MSG_NO_FREE;\n\n        // Send the read request\n        prf_read_char_send(&(anpc_env->prf_env), conidx,\n                           anpc_env->env[conidx]->ans.svc.shdl,\n                           anpc_env->env[conidx]->ans.svc.ehdl, handle);\n\n        // Go to the Busy state\n        ke_state_set(dest_id, ANPC_BUSY);\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      anpc_send_cmp_evt(anpc_env, conidx, ANPC_READ_OP_CODE, status);\n    }\n  } else {\n    // No connection exists\n    anpc_send_cmp_evt(anpc_env, conidx, ANPC_READ_OP_CODE,\n                      PRF_ERR_REQ_DISALLOWED);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref ANPC_WRITE_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int anpc_write_cmd_handler(ke_msg_id_t const msgid,\n                                    struct anpc_write_cmd *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // Get the address of the environment\n  struct anpc_env_tag *anpc_env = PRF_ENV_GET(ANPC, anpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (anpc_env->env[conidx] != NULL) {\n    do {\n      // Check the current state\n      if (ke_state_get(dest_id) != ANPC_IDLE) {\n        msg_status = KE_MSG_SAVED;\n        break;\n      }\n      // Attribute handle\n      uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n      // Length\n      uint8_t length;\n\n      switch (param->write_code) {\n      // Write Alert Notification Control Point Characteristic Value\n      case (ANPC_WR_ALERT_NTF_CTNL_PT): {\n        // Check the Category ID and the Command ID\n        if ((param->value.ctnl_pt.cmd_id < CMD_ID_NB) &&\n            ((param->value.ctnl_pt.cat_id < CAT_ID_NB) ||\n             (param->value.ctnl_pt.cat_id == CAT_ID_ALL_SUPPORTED_CAT))) {\n          handle = anpc_env->env[conidx]\n                       ->ans.chars[ANPC_CHAR_ALERT_NTF_CTNL_PT]\n                       .val_hdl;\n          length = sizeof(struct anp_ctnl_pt);\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      // Write New Alert Characteristic Client Char. Cfg. Descriptor Value\n      case (ANPC_RD_WR_NEW_ALERT_CFG): {\n        if (param->value.new_alert_ntf_cfg <= PRF_CLI_START_NTF) {\n          handle = anpc_env->env[conidx]\n                       ->ans.descs[ANPC_DESC_NEW_ALERT_CL_CFG]\n                       .desc_hdl;\n          length = sizeof(uint16_t);\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      // Write Unread Alert Status Characteristic Client Char. Cfg. Descriptor\n      // Value\n      case (ANPC_RD_WR_UNREAD_ALERT_STATUS_CFG): {\n        if (param->value.unread_alert_status_ntf_cfg <= PRF_CLI_START_NTF) {\n          handle = anpc_env->env[conidx]\n                       ->ans.descs[ANPC_DESC_UNREAD_ALERT_STATUS_CL_CFG]\n                       .desc_hdl;\n          length = sizeof(uint16_t);\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Check if handle is viable\n        if (handle != ATT_INVALID_SEARCH_HANDLE) {\n          // Send the write request\n          prf_gatt_write(&(anpc_env->prf_env), conidx, handle,\n                         (uint8_t *)¶m->value, length, GATTC_WRITE);\n\n          // Force the operation value\n          param->operation = ANPC_WRITE_OP_CODE;\n          // Store the command structure\n          anpc_env->env[conidx]->operation = param;\n\n          msg_status = KE_MSG_NO_FREE;\n\n          // Go to the Busy state\n          ke_state_set(dest_id, ANPC_BUSY);\n        } else {\n          status = PRF_ERR_INEXISTENT_HDL;\n        }\n      }\n    } while (0);\n  } else {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    anpc_send_cmp_evt(anpc_env, conidx, ANPC_WRITE_OP_CODE, status);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct anpc_env_tag *anpc_env = PRF_ENV_GET(ANPC, anpc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Status\n  uint8_t status;\n\n  if (anpc_env->env[conidx] != NULL) {\n    uint8_t state = ke_state_get(dest_id);\n\n    if (state == ANPC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (anpc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity(\n              ANPC_CHAR_MAX, anpc_env->env[conidx]->ans.chars, anpc_ans_char);\n        }\n        // too much services\n        else if (anpc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              ANPC_DESC_MAX, anpc_env->env[conidx]->ans.descs,\n              anpc_ans_char_desc, anpc_env->env[conidx]->ans.chars);\n        }\n      }\n\n      anpc_enable_rsp_send(anpc_env, conidx, status);\n    }\n\n    else if (state == ANPC_BUSY) {\n      switch (param->operation) {\n      case GATTC_READ: {\n        switch (\n            ((struct anpc_cmd *)anpc_env->env[conidx]->operation)->operation) {\n        // Read Supported New Alert Category Characteristic value\n        case (ANPC_ENABLE_RD_NEW_ALERT_OP_CODE): {\n          if (param->status == GAP_ERR_NO_ERROR) {\n            // Force the operation value\n            ((struct anpc_cmd *)anpc_env->env[conidx]->operation)->operation =\n                ANPC_ENABLE_RD_UNREAD_ALERT_OP_CODE;\n            // Check Supported Unread Alert Category\n            prf_read_char_send(&(anpc_env->prf_env), conidx,\n                               anpc_env->env[conidx]->ans.svc.shdl,\n                               anpc_env->env[conidx]->ans.svc.ehdl,\n                               anpc_env->env[conidx]\n                                   ->ans.chars[ANPC_CHAR_SUP_UNREAD_ALERT_CAT]\n                                   .val_hdl);\n          } else {\n            anpc_send_cmp_evt(anpc_env, conidx, ANPC_ENABLE_OP_CODE,\n                              param->status);\n          }\n        } break;\n\n        case (ANPC_ENABLE_RD_UNREAD_ALERT_OP_CODE): {\n          if (param->status == GAP_ERR_NO_ERROR) {\n            // If peer device was unknown, stop the procedure\n            if (((struct anpc_enable_req *)anpc_env->env[conidx]->operation)\n                    ->con_type == PRF_CON_DISCOVERY) {\n              anpc_send_cmp_evt(anpc_env, conidx, ANPC_ENABLE_OP_CODE,\n                                GAP_ERR_NO_ERROR);\n            }\n            // If peer device was already known (bonded), start Recovery from\n            // Connection Loss procedure\n            else {\n              // Reset the environment\n              anpc_env->env[conidx]->last_uuid_req = CAT_ID_SPL_ALERT;\n\n              if (anpc_found_next_alert_cat(\n                      anpc_env, conidx,\n                      ((struct anpc_enable_req *)anpc_env->env[conidx]\n                           ->operation)\n                          ->new_alert_enable)) {\n                // Force the operation value\n                ((struct anpc_cmd *)anpc_env->env[conidx]->operation)\n                    ->operation = ANPC_ENABLE_WR_NEW_ALERT_OP_CODE;\n                // Enable sending of notifications for the found category ID\n                anpc_write_alert_ntf_ctnl_pt(\n                    anpc_env, conidx, CMD_ID_EN_NEW_IN_ALERT_NTF,\n                    anpc_env->env[conidx]->last_uuid_req - 1);\n              } else {\n                // Reset the environment\n                anpc_env->env[conidx]->last_uuid_req = CAT_ID_SPL_ALERT;\n\n                if (anpc_found_next_alert_cat(\n                        anpc_env, conidx,\n                        ((struct anpc_enable_req *)anpc_env->env[conidx]\n                             ->operation)\n                            ->unread_alert_enable)) {\n                  // Force the operation value\n                  ((struct anpc_cmd *)anpc_env->env[conidx]->operation)\n                      ->operation = ANPC_ENABLE_WR_UNREAD_ALERT_OP_CODE;\n                  // Enable sending of notifications for the found category ID\n                  anpc_write_alert_ntf_ctnl_pt(\n                      anpc_env, conidx, CMD_ID_EN_UNREAD_CAT_STATUS_NTF,\n                      anpc_env->env[conidx]->last_uuid_req - 1);\n                } else {\n                  anpc_send_cmp_evt(anpc_env, conidx, ANPC_ENABLE_OP_CODE,\n                                    GAP_ERR_NO_ERROR);\n                }\n              }\n            }\n          } else {\n            anpc_send_cmp_evt(anpc_env, conidx, ANPC_ENABLE_OP_CODE,\n                              param->status);\n          }\n        } break;\n\n        case (ANPC_READ_OP_CODE): {\n          // Inform the requester that the read procedure is over\n          anpc_send_cmp_evt(anpc_env, conidx, ANPC_READ_OP_CODE, param->status);\n        } break;\n\n        default: {\n          ASSERT_ERR(0);\n        }\n        }\n      } break;\n\n      case GATTC_WRITE:\n      case GATTC_WRITE_NO_RESPONSE: {\n        // Retrieve the operation currently performed\n        uint8_t operation =\n            ((struct anpc_cmd *)anpc_env->env[conidx]->operation)->operation;\n\n        switch (operation) {\n        case (ANPC_WRITE_OP_CODE): {\n          uint8_t wr_code =\n              ((struct anpc_write_cmd *)anpc_env->env[conidx]->operation)\n                  ->write_code;\n\n          if ((wr_code == ANPC_RD_WR_NEW_ALERT_CFG) ||\n              (wr_code == ANPC_RD_WR_UNREAD_ALERT_STATUS_CFG) ||\n              (wr_code == ANPC_WR_ALERT_NTF_CTNL_PT)) {\n            anpc_send_cmp_evt(anpc_env, conidx, ANPC_WRITE_OP_CODE,\n                              param->status);\n          } else {\n            ASSERT_ERR(0);\n          }\n        } break;\n\n        case (ANPC_ENABLE_WR_NEW_ALERT_OP_CODE): {\n          // Look for the next category to enable\n          if (anpc_found_next_alert_cat(\n                  anpc_env, conidx,\n                  ((struct anpc_enable_req *)anpc_env->env[conidx]->operation)\n                      ->new_alert_enable)) {\n            // Enable sending of notifications for the found category ID\n            anpc_write_alert_ntf_ctnl_pt(\n                anpc_env, conidx, CMD_ID_EN_NEW_IN_ALERT_NTF,\n                anpc_env->env[conidx]->last_uuid_req - 1);\n          } else {\n            // Force the operation value\n            ((struct anpc_cmd *)anpc_env->env[conidx]->operation)->operation =\n                ANPC_ENABLE_WR_NTF_NEW_ALERT_OP_CODE;\n            // Send a \"Notify New Alert Immediately\" command with the Category\n            // ID field set to 0xFF\n            anpc_write_alert_ntf_ctnl_pt(anpc_env, conidx,\n                                         CMD_ID_NTF_NEW_IN_ALERT_IMM,\n                                         CAT_ID_ALL_SUPPORTED_CAT);\n          }\n        } break;\n\n        case (ANPC_ENABLE_WR_NTF_NEW_ALERT_OP_CODE): {\n          // Reset the environment\n          anpc_env->env[conidx]->last_uuid_req = CAT_ID_SPL_ALERT;\n\n          if (anpc_found_next_alert_cat(\n                  anpc_env, conidx,\n                  ((struct anpc_enable_req *)anpc_env->env[conidx]->operation)\n                      ->unread_alert_enable)) {\n            // Force the operation value\n            ((struct anpc_cmd *)anpc_env->env[conidx]->operation)->operation =\n                ANPC_ENABLE_WR_UNREAD_ALERT_OP_CODE;\n            // Enable sending of notifications for the found category ID\n            anpc_write_alert_ntf_ctnl_pt(\n                anpc_env, conidx, CMD_ID_EN_UNREAD_CAT_STATUS_NTF,\n                anpc_env->env[conidx]->last_uuid_req - 1);\n          } else {\n            anpc_send_cmp_evt(anpc_env, conidx, ANPC_ENABLE_OP_CODE,\n                              GAP_ERR_NO_ERROR);\n          }\n        } break;\n\n        case (ANPC_ENABLE_WR_UNREAD_ALERT_OP_CODE): {\n          // Look for the next category to enable\n          if (anpc_found_next_alert_cat(\n                  anpc_env, conidx,\n                  ((struct anpc_enable_req *)anpc_env->env[conidx]->operation)\n                      ->unread_alert_enable)) {\n            // Enable sending of notifications for the found category ID\n            anpc_write_alert_ntf_ctnl_pt(\n                anpc_env, conidx, CMD_ID_EN_UNREAD_CAT_STATUS_NTF,\n                anpc_env->env[conidx]->last_uuid_req - 1);\n          } else {\n            // Force the operation value\n            ((struct anpc_cmd *)anpc_env->env[conidx]->operation)->operation =\n                ANPC_ENABLE_WR_NTF_UNREAD_ALERT_OP_CODE;\n            // Send a \"Notify New Alert Immediately\" command with the Category\n            // ID field set to 0xFF\n            anpc_write_alert_ntf_ctnl_pt(anpc_env, conidx,\n                                         CMD_ID_NTF_UNREAD_CAT_STATUS_IMM,\n                                         CAT_ID_ALL_SUPPORTED_CAT);\n          }\n        } break;\n\n        case (ANPC_ENABLE_WR_NTF_UNREAD_ALERT_OP_CODE): {\n          // The discovery procedure is over\n          anpc_send_cmp_evt(anpc_env, conidx, ANPC_ENABLE_OP_CODE,\n                            param->status);\n        } break;\n\n        default: {\n          ASSERT_ERR(0);\n        } break;\n        }\n      } break;\n\n      case GATTC_REGISTER:\n      case GATTC_UNREGISTER: {\n        // Do nothing\n      } break;\n\n      default: {\n        ASSERT_ERR(0);\n      } break;\n      }\n    }\n  }\n  // else ignore the message\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == ANPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct anpc_env_tag *anpc_env = PRF_ENV_GET(ANPC, anpc);\n\n    ASSERT_INFO(anpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(anpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (anpc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve ANS characteristics and descriptors\n      prf_extract_svc_info(ind, ANPC_CHAR_MAX, &anpc_ans_char[0],\n                           &anpc_env->env[conidx]->ans.chars[0], ANPC_DESC_MAX,\n                           &anpc_ans_char_desc[0],\n                           &anpc_env->env[conidx]->ans.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      anpc_env->env[conidx]->ans.svc.shdl = ind->start_hdl;\n      anpc_env->env[conidx]->ans.svc.ehdl = ind->end_hdl;\n    }\n\n    anpc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct anpc_env_tag *anpc_env = PRF_ENV_GET(ANPC, anpc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (anpc_env->env[conidx] != NULL) {\n    ASSERT_ERR(ke_state_get(dest_id) == ANPC_BUSY);\n\n    // Prepare the indication to send to the application\n    struct anpc_value_ind *ind = KE_MSG_ALLOC(\n        ANPC_VALUE_IND, prf_dst_task_get(&(anpc_env->prf_env), conidx), dest_id,\n        anpc_value_ind);\n\n    switch (((struct anpc_cmd *)anpc_env->env[conidx]->operation)->operation) {\n    // Read Supported New Alert Category Characteristic value\n    case (ANPC_ENABLE_RD_NEW_ALERT_OP_CODE): {\n      ind->att_code = ANPC_RD_SUP_NEW_ALERT_CAT;\n      ind->value.supp_cat.cat_id_mask_0 = param->value[0];\n      // If cat_id_mask_1 not present, shall be considered as 0\n      ind->value.supp_cat.cat_id_mask_1 =\n          (param->length > 1) ? param->value[1] : 0x00;\n    } break;\n\n    case (ANPC_ENABLE_RD_UNREAD_ALERT_OP_CODE): {\n      ind->att_code = ANPC_RD_SUP_UNREAD_ALERT_CAT;\n      ind->value.supp_cat.cat_id_mask_0 = param->value[0];\n      // If cat_id_mask_1 not present, shall be considered as 0\n      ind->value.supp_cat.cat_id_mask_1 =\n          (param->length > 1) ? param->value[1] : 0;\n    } break;\n\n    case (ANPC_READ_OP_CODE): {\n      ind->att_code =\n          ((struct anpc_read_cmd *)anpc_env->env[conidx]->operation)->read_code;\n      ind->value.ntf_cfg = co_read16(¶m->value[0]);\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    // Send the indication\n    ke_msg_send(ind);\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct anpc_env_tag *anpc_env = PRF_ENV_GET(ANPC, anpc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (anpc_env->env[conidx] != NULL) {\n    // Check the category ID\n    if (param->value[0] < CAT_ID_NB) {\n      // New Alert Characteristic Value\n      if (param->handle ==\n          anpc_env->env[conidx]->ans.chars[ANPC_CHAR_NEW_ALERT].val_hdl) {\n        // Text String information Length\n        uint8_t length = param->length - 2;\n\n        if (length > ANS_NEW_ALERT_STRING_INFO_MAX_LEN) {\n          length = ANS_NEW_ALERT_STRING_INFO_MAX_LEN;\n        }\n\n        // Send an indication to the application\n        struct anpc_value_ind *new_alert_ind = KE_MSG_ALLOC_DYN(\n            ANPC_VALUE_IND, prf_dst_task_get(&anpc_env->prf_env, conidx),\n            prf_src_task_get(&anpc_env->prf_env, conidx), anpc_value_ind,\n            length);\n\n        new_alert_ind->att_code = ANPC_NTF_NEW_ALERT;\n\n        // Fulfill the characteristic value\n        new_alert_ind->value.new_alert.cat_id = param->value[0];\n        new_alert_ind->value.new_alert.nb_new_alert = param->value[1];\n        new_alert_ind->value.new_alert.info_str_len = length;\n        memcpy(&new_alert_ind->value.new_alert.str_info[0], ¶m->value[2],\n               length);\n\n        // Send the message\n        ke_msg_send(new_alert_ind);\n      }\n      // Unread Alert Status Characteristic Value\n      else if (param->handle == anpc_env->env[conidx]\n                                    ->ans.chars[ANPC_CHAR_UNREAD_ALERT_STATUS]\n                                    .val_hdl) {\n        // Send an indication to the application\n        struct anpc_value_ind *unrd_alert_ind = KE_MSG_ALLOC(\n            ANPC_VALUE_IND, prf_dst_task_get(&anpc_env->prf_env, conidx),\n            prf_src_task_get(&anpc_env->prf_env, conidx), anpc_value_ind);\n\n        unrd_alert_ind->att_code = ANPC_NTF_UNREAD_ALERT;\n\n        // Fulfill the characteristic value\n        unrd_alert_ind->value.unread_alert.cat_id = param->value[0];\n        unrd_alert_ind->value.unread_alert.nb_unread_alert = param->value[1];\n\n        // Send the message\n        ke_msg_send(unrd_alert_ind);\n      } else {\n        ASSERT_ERR(0);\n      }\n    }\n    // else ignore the message\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(anpc){\n    {ANPC_ENABLE_REQ, (ke_msg_func_t)anpc_enable_req_handler},\n    {ANPC_READ_CMD, (ke_msg_func_t)anpc_read_cmd_handler},\n    {ANPC_WRITE_CMD, (ke_msg_func_t)anpc_write_cmd_handler},\n\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid anpc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct anpc_env_tag *anpc_env = PRF_ENV_GET(ANPC, anpc);\n\n  task_desc->msg_handler_tab = anpc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(anpc_msg_handler_tab);\n  task_desc->state = anpc_env->state;\n  task_desc->idx_max = ANPC_IDX_MAX;\n}\n\n#endif //(BLE_AN_CLIENT)\n\n/// @} ANPCTASK\n"
  },
  {
    "path": "services/ble_profiles/anp/anps/api/anps_task.h",
    "content": "#ifndef ANPS_TASK_H_\n#define ANPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ANPSTASK Task\n * @ingroup ANPS\n * @brief Alert Notification Profile Server Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"rwip_task.h\" // Task definitions\n#include \"anp_common.h\"\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Messages for Alert Notification Profile Server\nenum anps_msg_ids\n{\n    /// Start the Alert Notification Profile Server Role\n    ANPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_ANPS),\n    /// Start the Alert Notification Profile Server Role\n    ANPS_ENABLE_RSP,\n\n    /// Update the value of a characteristic\n    ANPS_NTF_ALERT_CMD,\n    /// The peer device requests to be notified about new alert values\n    ANPS_NTF_IMMEDIATE_REQ_IND,\n    /// Indicate that the notification configuration has been modified by the peer device\n    ANPS_NTF_STATUS_UPDATE_IND,\n\n    /// Complete Event Information\n    ANPS_CMP_EVT,\n};\n\n/// Operation Codes\nenum anps_op_codes\n{\n    ANPS_RESERVED_OP_CODE              = 0x00,\n\n    /// Update New Alert Char. value\n    ANPS_UPD_NEW_ALERT_OP_CODE,\n    /// Update Unread Alert Status Char. value\n    ANPS_UPD_UNREAD_ALERT_STATUS_OP_CODE,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the @ref ANPS_CREATE_DB_REQ message\nstruct anps_db_cfg\n{\n    /// Supported New Alert Category Characteristic Value - Shall not be 0\n    struct anp_cat_id_bit_mask supp_new_alert_cat;\n    /// Supported Unread Alert Category Characteristic Value - Can be 0\n    struct anp_cat_id_bit_mask supp_unread_alert_cat;\n};\n\n/// Parameters of the @ref ANPS_ENABLE_REQ message\nstruct anps_enable_req\n{\n    /// New Alert Characteristic - Saved Client Characteristic Configuration Descriptor Value\n    uint16_t new_alert_ntf_cfg;\n    /// Unread Alert Status Characteristic - Saved Client Characteristic Configuration Descriptor Value\n    uint16_t unread_alert_status_ntf_cfg;\n};\n\n/// Parameters of the @ref ANPS_ENABLE_RSP message\nstruct anps_enable_rsp\n{\n    /// status\n    uint8_t status;\n};\n\n///Parameters of the @ref ANPS_NTF_ALERT_CMD message\nstruct anps_ntf_alert_cmd\n{\n    /// Operation Code (ANPS_UPD_NEW_ALERT_OP_CODE or ANPS_UPD_UNREAD_ALERT_STATUS_OP_CODE)\n    uint8_t operation;\n    /// New Alert Characteristic Value or Unread Alert Status Characteristic Value\n    union anps_value_tag\n    {\n        /// New Alert\n        struct anp_new_alert new_alert;\n        /// Unread Alert Status\n        struct anp_unread_alert unread_alert_status;\n    } value;\n};\n\n///Parameters of the @ref ANPS_NTF_IMMEDIATE_REQ_IND message\nstruct anps_ntf_immediate_req_ind\n{\n    /// Alert type (New Alert or Unread Alert Status)\n    uint8_t alert_type;\n    /// Status for each category\n    struct anp_cat_id_bit_mask cat_ntf_cfg;\n};\n\n///Parameters of the @ref ANPS_NTF_STATUS_UPDATE_IND message\nstruct anps_ntf_status_update_ind\n{\n    /// Alert type (New Alert or Unread Alert Status)\n    uint8_t alert_type;\n    /// Client Characteristic Configuration Descriptor Status\n    uint16_t ntf_ccc_cfg;\n    /// Status for each category\n    struct anp_cat_id_bit_mask cat_ntf_cfg;\n};\n\n///Parameters of the @ref ANPS_CMP_EVT message\nstruct anps_cmp_evt\n{\n    /// Operation\n    uint8_t operation;\n    /// Status\n    uint8_t status;\n};\n\n/// @} ANPSTASK\n\n#endif //(ANPS_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/anp/anps/src/anps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup ANPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_AN_SERVER)\n\n#include \"anp_common.h\"\n#include \"anps.h\"\n#include \"anps_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * ANS DATABASE\n ****************************************************************************************\n */\n\n/// Full ANS Database Description - Used to add attributes into the database\nconst struct attm_desc anps_att_db[ANS_IDX_NB] = {\n    /// Alert Notification Service Declaration\n    [ANS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    /// Supported New Alert Category Characteristic Declaration\n    [ANS_IDX_SUPP_NEW_ALERT_CAT_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                         PERM(RD, ENABLE), 0, 0},\n    /// Supported New Alert Category Characteristic Value\n    [ANS_IDX_SUPP_NEW_ALERT_CAT_VAL] = {ATT_CHAR_SUP_NEW_ALERT_CAT,\n                                        PERM(RD, ENABLE), PERM(RI, ENABLE),\n                                        sizeof(struct anp_cat_id_bit_mask)},\n\n    /// New Alert Characteristic Declaration\n    [ANS_IDX_NEW_ALERT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    /// New Alert Characteristic Value\n    [ANS_IDX_NEW_ALERT_VAL] = {ATT_CHAR_NEW_ALERT, PERM(NTF, ENABLE),\n                               PERM(RI, ENABLE), ANS_NEW_ALERT_MAX_LEN},\n    /// New Alert Characteristic - Client Char. Configuration Descriptor\n    [ANS_IDX_NEW_ALERT_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                               PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                               0},\n\n    /// Supported Unread Alert Category Characteristic Declaration\n    [ANS_IDX_SUPP_UNREAD_ALERT_CAT_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                            PERM(RD, ENABLE), 0, 0},\n    /// Supported New Alert Category Characteristic Value\n    [ANS_IDX_SUPP_UNREAD_ALERT_CAT_VAL] = {ATT_CHAR_SUP_UNREAD_ALERT_CAT,\n                                           PERM(RD, ENABLE), PERM(RI, ENABLE),\n                                           sizeof(struct anp_cat_id_bit_mask)},\n\n    /// Unread Alert Status Characteristic Declaration\n    [ANS_IDX_UNREAD_ALERT_STATUS_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                          PERM(RD, ENABLE), 0, 0},\n    /// Unread Alert Status Characteristic Value\n    [ANS_IDX_UNREAD_ALERT_STATUS_VAL] = {ATT_CHAR_UNREAD_ALERT_STATUS,\n                                         PERM(NTF, ENABLE), PERM(RI, ENABLE),\n                                         sizeof(struct anp_unread_alert)},\n    /// Unread Alert Status Characteristic - Client Char. Configuration\n    /// Descriptor\n    [ANS_IDX_UNREAD_ALERT_STATUS_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                         PERM(RD, ENABLE) |\n                                             PERM(WRITE_REQ, ENABLE),\n                                         0, 0},\n\n    /// Alert Notification Control Point Characteristic Declaration\n    [ANS_IDX_ALERT_NTF_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                        PERM(RD, ENABLE), 0, 0},\n    /// Alert Notification Control Point Characteristic Value\n    [ANS_IDX_ALERT_NTF_CTNL_PT_VAL] = {ATT_CHAR_ALERT_NTF_CTNL_PT,\n                                       PERM(WRITE_REQ, ENABLE),\n                                       PERM(RI, ENABLE), 2 * sizeof(uint8_t)},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the ANPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t anps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct anps_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n  // Service content flag\n  uint32_t cfg_flag = ANPS_DB_CONFIG_MASK;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  // Add service in the database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_ALERT_NTF, (uint8_t *)&cfg_flag, ANS_IDX_NB, NULL,\n      env->task, &anps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, ENABLE));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate ANPS required environment variable\n    struct anps_env_tag *anps_env = (struct anps_env_tag *)ke_malloc(\n        sizeof(struct anps_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize ANPS environment\n    env->env = (prf_env_t *)anps_env;\n    anps_env->shdl = *start_hdl;\n\n    memcpy(&anps_env->supp_new_alert_cat, ¶ms->supp_new_alert_cat,\n           sizeof(struct anp_cat_id_bit_mask));\n    memcpy(&anps_env->supp_unread_alert_cat, ¶ms->supp_unread_alert_cat,\n           sizeof(struct anp_cat_id_bit_mask));\n\n    anps_env->operation = ANPS_RESERVED_OP_CODE;\n\n    anps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Multi Instantiated task\n    anps_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_ANPS;\n    anps_task_init(&(env->desc));\n\n    for (uint8_t idx = 0; idx < BLE_CONNECTION_MAX; idx++) {\n      anps_env->env[idx] = NULL;\n      /* Put ANS in disabled state */\n      ke_state_set(KE_BUILD_ID(env->task, idx), ANPS_FREE);\n    }\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the ANPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void anps_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct anps_env_tag *anps_env = (struct anps_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < BLE_CONNECTION_MAX; idx++) {\n    if (anps_env->env[idx] != NULL) {\n      ke_free(anps_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(anps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void anps_create(struct prf_task_env *env, uint8_t conidx) {\n  struct anps_env_tag *anps_env = (struct anps_env_tag *)env->env;\n  anps_env->env[conidx] = (struct anps_cnx_env *)ke_malloc(\n      sizeof(struct anps_cnx_env), KE_MEM_ATT_DB);\n\n  memset(anps_env->env[conidx], 0, sizeof(struct anps_cnx_env));\n  /* Put ANS in idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), ANPS_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void anps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct anps_env_tag *anps_env = (struct anps_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (anps_env->env[conidx] != NULL) {\n    ke_free(anps_env->env[conidx]);\n    anps_env->env[conidx] = NULL;\n  }\n\n  /* Put ANS in disabled state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), ANPS_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// ANPS Task interface required by profile manager\nconst struct prf_task_cbs anps_itf = {\n    (prf_init_fnct)anps_init,\n    anps_destroy,\n    anps_create,\n    anps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *anps_prf_itf_get(void) { return &anps_itf; }\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nvoid anps_send_cmp_evt(ke_task_id_t src_id, ke_task_id_t dest_id,\n                       uint8_t operation, uint8_t status) {\n  // Come back to the Connected state if the state was busy.\n  if (ke_state_get(src_id) == ANPS_BUSY) {\n    ke_state_set(src_id, ANPS_IDLE);\n  }\n\n  // Send the message to the application\n  struct anps_cmp_evt *evt =\n      KE_MSG_ALLOC(ANPS_CMP_EVT, dest_id, src_id, anps_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\nvoid anps_send_ntf_status_update_ind(uint8_t conidx,\n                                     struct anps_env_tag *idx_env,\n                                     uint8_t alert_type) {\n  // Send the message to the application\n  struct anps_ntf_status_update_ind *ind = KE_MSG_ALLOC(\n      ANPS_NTF_STATUS_UPDATE_IND, prf_dst_task_get(&idx_env->prf_env, conidx),\n      prf_src_task_get(&idx_env->prf_env, conidx), anps_ntf_status_update_ind);\n\n  ind->alert_type = alert_type;\n  ind->ntf_ccc_cfg = ANPS_IS_ALERT_ENABLED(conidx, idx_env, alert_type)\n                         ? PRF_CLI_START_NTF\n                         : PRF_CLI_STOP_NTFIND;\n\n  if (alert_type == ANP_NEW_ALERT) {\n    ind->cat_ntf_cfg.cat_id_mask_0 =\n        (uint8_t)(idx_env->env[conidx]->ntf_new_alert_cfg & 0x00FF);\n    ind->cat_ntf_cfg.cat_id_mask_1 =\n        (uint8_t)((idx_env->env[conidx]->ntf_new_alert_cfg & 0xFF00) >> 8);\n  } else {\n    ind->cat_ntf_cfg.cat_id_mask_0 =\n        (uint8_t)(idx_env->env[conidx]->ntf_unread_alert_cfg & 0x00FF);\n    ind->cat_ntf_cfg.cat_id_mask_1 =\n        (uint8_t)(idx_env->env[conidx]->ntf_unread_alert_cfg >> 8);\n  }\n\n  ke_msg_send(ind);\n}\n\nvoid anps_send_ntf_immediate_req_ind(uint8_t conidx,\n                                     struct anps_env_tag *idx_env,\n                                     uint8_t alert_type, uint8_t category_id) {\n  uint16_t req_cat;\n\n  // Send the message to the application\n  struct anps_ntf_immediate_req_ind *ind = KE_MSG_ALLOC(\n      ANPS_NTF_IMMEDIATE_REQ_IND, prf_dst_task_get(&idx_env->prf_env, conidx),\n      prf_src_task_get(&idx_env->prf_env, conidx), anps_ntf_immediate_req_ind);\n\n  ind->alert_type = alert_type;\n\n  if (alert_type == ANP_NEW_ALERT) {\n    if (category_id == CAT_ID_ALL_SUPPORTED_CAT) {\n      // All category that are supported and enabled shall be notified\n      req_cat = idx_env->env[conidx]->ntf_new_alert_cfg;\n    } else {\n      req_cat = (1 << category_id);\n    }\n  } else // Unread alert\n  {\n    if (category_id == CAT_ID_ALL_SUPPORTED_CAT) {\n      // All category that are supported and enabled shall be notified\n      req_cat = idx_env->env[conidx]->ntf_unread_alert_cfg;\n    } else {\n      req_cat = (1 << category_id);\n    }\n  }\n\n  ind->cat_ntf_cfg.cat_id_mask_0 = (uint8_t)(req_cat & 0x00FF);\n  ind->cat_ntf_cfg.cat_id_mask_1 = (uint8_t)((req_cat & 0xFF00) >> 8);\n\n  ke_msg_send(ind);\n}\n\n#endif //(BLE_AN_SERVER)\n\n/// @} ANPS\n"
  },
  {
    "path": "services/ble_profiles/anp/anps/src/anps.h",
    "content": "#ifndef ANPS_H_\n#define ANPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ANPS Alert Notification Profile Server\n * @ingroup ANP\n * @brief Alert Notification Profile Server\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"anp_common.h\"\n\n#if (BLE_AN_SERVER)\n\n#include \"prf_types.h\"\n#include \"prf.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximal number of Alert Notification Server task instances\n#define ANPS_IDX_MAX        (BLE_CONNECTION_MAX)\n/// Database Configuration Flag\n#define ANPS_DB_CONFIG_MASK         (0x1FFF)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the ANPS task\nenum anps_states\n{\n    /// Not connected state\n    ANPS_FREE,\n    /// Idle state\n    ANPS_IDLE,\n    /// Busy state\n    ANPS_BUSY,\n\n    /// Number of defined states.\n    ANPS_STATE_MAX\n};\n/// Alert Notification Service Attributes\nenum anps_ans_att_list\n{\n    ANS_IDX_SVC,\n\n    ANS_IDX_SUPP_NEW_ALERT_CAT_CHAR,\n    ANS_IDX_SUPP_NEW_ALERT_CAT_VAL,\n\n    ANS_IDX_NEW_ALERT_CHAR,\n    ANS_IDX_NEW_ALERT_VAL,\n    ANS_IDX_NEW_ALERT_CFG,\n\n    ANS_IDX_SUPP_UNREAD_ALERT_CAT_CHAR,\n    ANS_IDX_SUPP_UNREAD_ALERT_CAT_VAL,\n\n    ANS_IDX_UNREAD_ALERT_STATUS_CHAR,\n    ANS_IDX_UNREAD_ALERT_STATUS_VAL,\n    ANS_IDX_UNREAD_ALERT_STATUS_CFG,\n\n    ANS_IDX_ALERT_NTF_CTNL_PT_CHAR,\n    ANS_IDX_ALERT_NTF_CTNL_PT_VAL,\n\n    ANS_IDX_NB,\n};\n\n\n/*\n * MACROS\n * **************************************************************************************\n */\n\n#define ANPS_IS_NEW_ALERT_CATEGORY_SUPPORTED(category_id) \\\n        (((anps_env->supp_new_alert_cat >> category_id) & 1) == 1)\n\n#define ANPS_IS_UNREAD_ALERT_CATEGORY_SUPPORTED(category_id) \\\n        (((anps_env->supp_unread_alert_cat >> category_id) & 1) == 1)\n\n#define ANPS_IS_ALERT_ENABLED(conidx, idx_env, alert_type) \\\n        (((idx_env->env[conidx]->ntf_cfg >> alert_type) & 1) == 1)\n\n#define ANPS_IS_NEW_ALERT_CATEGORY_ENABLED(conidx, category_id, idx_env) \\\n        (((idx_env->env[conidx]->ntf_new_alert_cfg >> category_id) & 1) == 1)\n\n#define ANPS_IS_UNREAD_ALERT_CATEGORY_ENABLED(conidx, category_id, idx_env) \\\n        (((idx_env->env[conidx]->ntf_unread_alert_cfg >> category_id) & 1) == 1)\n\n#define ANPS_ENABLE_ALERT(conidx, idx_env, alert_type) \\\n        (idx_env->env[conidx]->ntf_cfg |= (1 << alert_type))\n\n#define ANPS_DISABLE_ALERT(conidx, idx_env, alert_type) \\\n        (idx_env->env[conidx]->ntf_cfg &= ~(1 << alert_type))\n\n#define ANPS_ENABLE_NEW_ALERT_CATEGORY(conidx, category_id, idx_env) \\\n        (idx_env->env[conidx]->ntf_new_alert_cfg |= (1 << category_id))\n\n#define ANPS_ENABLE_UNREAD_ALERT_CATEGORY(conidx, category_id, idx_env) \\\n        (idx_env->env[conidx]->ntf_unread_alert_cfg |= (1 << category_id))\n\n#define ANPS_DISABLE_NEW_ALERT_CATEGORY(conidx, category_id, idx_env) \\\n        (idx_env->env[conidx]->ntf_new_alert_cfg &= ~(1 << category_id))\n\n#define ANPS_DISABLE_UNREAD_ALERT_CATEGORY(conidx, category_id, idx_env) \\\n        (idx_env->env[conidx]->ntf_unread_alert_cfg &= ~(1 << category_id))\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Alert Notification Profile Server Connection Dependent Environment Variable\nstruct anps_cnx_env\n{\n    /**\n     * Client Characteristic Configuration Status\n     *   Bit 0 : New Alert Characteristic\n     *   Bit 1 : Unread Alert Status Characteristic\n     */\n    uint8_t ntf_cfg;\n\n    /**\n     * Category Notification Configuration\n     *   Bit 0 : Simple Alert\n     *   Bit 1 : Email\n     *   Bit 2 : News\n     *   Bit 3 : Call\n     *   Bit 4 : Missed Call\n     *   Bit 5 : SMS/MMS\n     *   Bit 6 : Voice Mail\n     *   Bit 7 : Schedule\n     *   Bit 8 : High Prioritized Alert\n     *   Bit 9 : Instance Message\n     */\n    uint16_t ntf_new_alert_cfg;\n    uint16_t ntf_unread_alert_cfg;\n};\n\n/// Alert Notification Profile Server. Environment variable\nstruct anps_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// ANS Start Handle\n    uint16_t shdl;\n    /// Environment variable pointer for each connection\n    struct anps_cnx_env* env[BLE_CONNECTION_MAX];\n\n    /// Current Operation Code\n    uint8_t operation;\n    /// Supported New Alert Category Characteristic Value\n    uint16_t supp_new_alert_cat;\n    /// Supported Unread Alert Category Characteristic Value\n    uint16_t supp_unread_alert_cat;\n\n    /// State of different task instances\n    ke_state_t state[ANPS_IDX_MAX];\n\n};\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve ANP service profile interface\n *\n * @return ANP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* anps_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Initialization of the ANPS module.\n * This function performs all the initializations of the ANPS module.\n ****************************************************************************************\n */\n//void anps_init(void);\n\n/**\n ****************************************************************************************\n * @brief Send an ANPS_NTF_STATUS_UPDATE_IND message to a requester.\n *\n * @param[in] src_id        Source ID of the message (instance of TASK_ANPS)\n * @param[in] dest_id       Destination ID of the message\n * @param[in] operation     Code of the completed operation\n * @param[in] status        Status of the request\n ****************************************************************************************\n */\nvoid anps_send_ntf_status_update_ind(uint8_t conidx, struct anps_env_tag *idx_env, uint8_t alert_type);\n\n/**\n ****************************************************************************************\n * @brief Send an ANPS_NTF_IMMEDIATE_REQ_IND message to a requester.\n *\n * @param[in] src_id        Source ID of the message (instance of TASK_ANPS)\n * @param[in] dest_id       Destination ID of the message\n * @param[in] operation     Code of the completed operation\n * @param[in] status        Status of the request\n ****************************************************************************************\n */\nvoid anps_send_ntf_immediate_req_ind(uint8_t conidx, struct anps_env_tag *idx_env, uint8_t alert_type,\n                                     uint8_t category_id);\n\n/**\n ****************************************************************************************\n * @brief Send an ANPS_CMP_EVT message to a requester.\n *\n * @param[in] src_id        Source ID of the message (instance of TASK_ANPS)\n * @param[in] dest_id       Destination ID of the message\n * @param[in] operation     Code of the completed operation\n * @param[in] status        Status of the request\n ****************************************************************************************\n */\nvoid anps_send_cmp_evt(ke_task_id_t src_id, ke_task_id_t dest_id, uint8_t operation, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid anps_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //(BLE_AN_SERVER)\n\n/// @} ANPS\n\n#endif //(ANPS_H_)\n"
  },
  {
    "path": "services/ble_profiles/anp/anps/src/anps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup ANPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_AN_SERVER)\n\n#include \"anps.h\"\n#include \"anps_task.h\"\n#include \"gapm.h\"\n#include \"gattc_task.h\"\n\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref ANPS_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int anps_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct anps_enable_req *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Alert Notification Profile Server Role Task Index Environment\n  struct anps_env_tag *anps_env = PRF_ENV_GET(ANPS, anps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == ANPS_IDLE) {\n    if (anps_env->env[conidx] != NULL) {\n      // Bonded data was not used before\n      if (!ANPS_IS_ALERT_ENABLED(conidx, anps_env,\n                                 ANPS_FLAG_CFG_PERFORMED_OK)) {\n        status = GAP_ERR_NO_ERROR;\n        // Update the state in the environment\n        if (param->new_alert_ntf_cfg != PRF_CLI_STOP_NTFIND) {\n          // Force to PRF_CLI_START_NTF\n          param->new_alert_ntf_cfg = PRF_CLI_START_NTF;\n\n          ANPS_ENABLE_ALERT(conidx, anps_env, ANP_NEW_ALERT);\n        }\n\n        if (param->unread_alert_status_ntf_cfg != PRF_CLI_STOP_NTFIND) {\n          // Force to PRF_CLI_START_NTF\n          param->unread_alert_status_ntf_cfg = PRF_CLI_START_NTF;\n\n          ANPS_ENABLE_ALERT(conidx, anps_env, ANP_UNREAD_ALERT);\n        }\n      }\n      // Enable Bonded Data\n      ANPS_ENABLE_ALERT(conidx, anps_env, ANPS_FLAG_CFG_PERFORMED_OK);\n    }\n  }\n\n  // send completed information to APP task that contains error status\n  struct anps_enable_rsp *cmp_evt =\n      KE_MSG_ALLOC(ANPS_ENABLE_RSP, src_id, dest_id, anps_enable_rsp);\n  cmp_evt->status = status;\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref ANPS_NTF_ALERT_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int anps_ntf_alert_cmd_handler(ke_msg_id_t const msgid,\n                                        struct anps_ntf_alert_cmd const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = PRF_ERR_INVALID_PARAM;\n  // Message Status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Task environment\n  struct anps_env_tag *anps_env = PRF_ENV_GET(ANPS, anps);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == ANPS_IDLE) {\n    // Category ID\n    uint8_t cat_id;\n    // Is the category supported ?\n    bool cat_supported;\n    // Handle\n    uint16_t handle = ATT_ERR_INVALID_HANDLE;\n\n    ASSERT_ERR(anps_env != NULL);\n    ASSERT_ERR(anps_env->env[conidx] != NULL);\n\n    do {\n      // Check the operation code, get the category ID.\n      if (param->operation == ANPS_UPD_NEW_ALERT_OP_CODE) {\n        // Check the length of the string info value\n        if (param->value.new_alert.info_str_len >\n            ANS_NEW_ALERT_STRING_INFO_MAX_LEN) {\n          status = PRF_ERR_INVALID_PARAM;\n          break;\n        }\n\n        // Get the category ID\n        cat_id = param->value.new_alert.cat_id;\n        // Check if the category is supported\n        cat_supported = ANPS_IS_NEW_ALERT_CATEGORY_SUPPORTED(cat_id);\n      } else if (param->operation == ANPS_UPD_UNREAD_ALERT_STATUS_OP_CODE) {\n        // Get the category ID\n        cat_id = param->value.unread_alert_status.cat_id;\n        // Check if the category is supported\n        cat_supported = ANPS_IS_UNREAD_ALERT_CATEGORY_SUPPORTED(cat_id);\n      } else {\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      // Check the category ID\n      if ((cat_id >= CAT_ID_NB) || (!cat_supported)) {\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      if (param->operation == ANPS_UPD_NEW_ALERT_OP_CODE) {\n        // Check if sending of notification is enabled for the provided category\n        if (ANPS_IS_NEW_ALERT_CATEGORY_ENABLED(conidx, cat_id, anps_env) &&\n            ANPS_IS_ALERT_ENABLED(conidx, anps_env, ANP_NEW_ALERT)) {\n          handle = anps_env->shdl + ANS_IDX_NEW_ALERT_VAL;\n\n          // Allocate the GATT notification message\n          struct gattc_send_evt_cmd *ntf = KE_MSG_ALLOC_DYN(\n              GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n              gattc_send_evt_cmd, 2 + param->value.new_alert.info_str_len);\n\n          // Fill in the parameter structure\n          ntf->operation = GATTC_NOTIFY;\n          ntf->handle = handle;\n          // pack measured value in database\n          ntf->length = 2 + param->value.new_alert.info_str_len;\n          // Fill data\n          memcpy(&ntf->value, ¶m->value.new_alert.cat_id, ntf->length);\n\n          // The notification can be sent, send the notification\n          status = GAP_ERR_NO_ERROR;\n          ke_msg_send(ntf);\n        } else {\n          status = PRF_ERR_NTF_DISABLED;\n          break;\n        }\n      } else {\n        if (ANPS_IS_UNREAD_ALERT_CATEGORY_ENABLED(conidx, cat_id, anps_env) &&\n            ANPS_IS_ALERT_ENABLED(conidx, anps_env, ANP_UNREAD_ALERT)) {\n          handle = anps_env->shdl + ANS_IDX_UNREAD_ALERT_STATUS_VAL;\n\n          // Allocate the GATT notification message\n          struct gattc_send_evt_cmd *ntf = KE_MSG_ALLOC_DYN(\n              GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n              gattc_send_evt_cmd, sizeof(struct anp_unread_alert));\n\n          // Fill in the parameter structure\n          ntf->operation = GATTC_NOTIFY;\n          ntf->handle = handle;\n          // pack measured value in database\n          ntf->length = sizeof(struct anp_unread_alert);\n          // Fill data\n          memcpy(&ntf->value, ¶m->value.unread_alert_status, ntf->length);\n\n          // The notification can be sent, send the notification\n          status = GAP_ERR_NO_ERROR;\n          ke_msg_send(ntf);\n        } else {\n          status = PRF_ERR_NTF_DISABLED;\n          break;\n        }\n      }\n\n      // Configure the environment\n      anps_env->operation = param->operation;\n      // Go to Busy state\n      ke_state_set(dest_id, ANPS_BUSY);\n    } while (0);\n  } else if (state == ANPS_BUSY) {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n  // no connection\n  else {\n    status = GAP_ERR_DISCONNECTED;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // Send the message to the application\n    anps_send_cmp_evt(dest_id, src_id, param->operation, status);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT message meaning that a notification or an\n *indication has been correctly sent to peer device (but not confirmed by peer\n *device).\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct anps_env_tag *anps_env = PRF_ENV_GET(ANPS, anps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  if (anps_env != NULL) {\n    // Send a complete event status to the application\n    anps_send_cmp_evt(prf_src_task_get(&anps_env->prf_env, conidx),\n                      prf_dst_task_get(&anps_env->prf_env, conidx),\n                      anps_env->operation, param->status);\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == ANPS_IDLE) {\n    // Get the address of the environment\n    struct anps_env_tag *anps_env = PRF_ENV_GET(ANPS, anps);\n    uint8_t conidx = KE_IDX_GET(src_id);\n    uint8_t att_idx = param->handle - anps_env->shdl;\n\n    uint8_t value[2];\n    uint8_t value_size = 0;\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    switch (att_idx) {\n    case ANS_IDX_SUPP_NEW_ALERT_CAT_VAL: {\n      // Fill data\n      value_size = sizeof(uint16_t);\n      co_write16p(value, anps_env->supp_new_alert_cat);\n    } break;\n\n    case ANS_IDX_NEW_ALERT_CFG: {\n      // Fill data\n      value_size = sizeof(uint16_t);\n      co_write16p(value,\n                  ANPS_IS_ALERT_ENABLED(conidx, anps_env, ANP_NEW_ALERT));\n    } break;\n\n    case ANS_IDX_SUPP_UNREAD_ALERT_CAT_VAL: {\n      // Fill data\n      value_size = sizeof(uint16_t);\n      co_write16p(value, anps_env->supp_unread_alert_cat);\n    } break;\n\n    case ANS_IDX_UNREAD_ALERT_STATUS_CFG: {\n      // Fill data\n      value_size = sizeof(uint16_t);\n      co_write16p(value,\n                  ANPS_IS_ALERT_ENABLED(conidx, anps_env, ANP_UNREAD_ALERT));\n    } break;\n\n    default: {\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, value_size);\n    cfm->length = value_size;\n    memcpy(cfm->value, value, value_size);\n    cfm->handle = param->handle;\n    cfm->status = status;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_WRITE_REQ_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get the conidx\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Get the address of the environment\n  struct anps_env_tag *anps_env = PRF_ENV_GET(ANPS, anps);\n\n  // Check if the connection exists\n  if (anps_env != NULL) {\n    /*\n     * ---------------------------------------------------------------------------------------------\n     * New Alert Client Characteristic Configuration Descriptor Value - Write\n     * ---------------------------------------------------------------------------------------------\n     * Unread Status Alert Client Characteristic Configuration Descriptor Value\n     * - Write\n     * ---------------------------------------------------------------------------------------------\n     */\n    if ((param->handle == (anps_env->shdl + ANS_IDX_NEW_ALERT_CFG)) ||\n        (param->handle == (anps_env->shdl + ANS_IDX_UNREAD_ALERT_STATUS_CFG))) {\n      // Received configuration value\n      uint16_t ntf_cfg = co_read16p(¶m->value[0]);\n\n      if (ntf_cfg <= PRF_CLI_START_NTF) {\n        // Alert type\n        uint8_t alert_type =\n            (param->handle == (anps_env->shdl + ANS_IDX_NEW_ALERT_CFG))\n                ? ANP_NEW_ALERT\n                : ANP_UNREAD_ALERT;\n\n        // Update the status in the environment\n        if (ntf_cfg == PRF_CLI_START_NTF) {\n          ANPS_ENABLE_ALERT(conidx, anps_env, alert_type);\n        } else {\n          ANPS_DISABLE_ALERT(conidx, anps_env, alert_type);\n        }\n\n        // Inform the HL that the notification configuration status has been\n        // written\n        anps_send_ntf_status_update_ind(conidx, anps_env, alert_type);\n        // Enable bond Data\n        ANPS_ENABLE_ALERT(conidx, anps_env, ANPS_FLAG_CFG_PERFORMED_OK);\n      } else {\n        status = PRF_APP_ERROR;\n      }\n    }\n    /*\n     * ---------------------------------------------------------------------------------------------\n     * Alert Notification Control Point Characteristic Value - Write\n     * ---------------------------------------------------------------------------------------------\n     */\n    else if (param->handle ==\n             (anps_env->shdl + ANS_IDX_ALERT_NTF_CTNL_PT_VAL)) {\n      do {\n        // Check the command ID value\n        if (param->value[0] >= CMD_ID_NB) {\n          status = ANP_CMD_NOT_SUPPORTED;\n          break;\n        }\n\n        // Check the category ID value\n        if ((param->value[1] >= CAT_ID_NB) &&\n            (param->value[1] != CAT_ID_ALL_SUPPORTED_CAT)) {\n          status = ANP_CAT_NOT_SUPPORTED;\n          break;\n        }\n\n        if (param->value[1] < CAT_ID_NB) {\n          // New Alert\n          if ((param->value[0] % 2) == 0) {\n            // Check if the category is supported\n            if (!ANPS_IS_NEW_ALERT_CATEGORY_SUPPORTED(param->value[1])) {\n              status = ANP_CAT_NOT_SUPPORTED;\n              break;\n            }\n          }\n          // Unread Alert Status\n          else {\n            // Check if the category is supported\n            if (!ANPS_IS_UNREAD_ALERT_CATEGORY_SUPPORTED(param->value[1])) {\n              status = ANP_CAT_NOT_SUPPORTED;\n              break;\n            }\n          }\n        }\n\n        // React according to the received command id value\n        switch (param->value[0]) {\n        // Enable New Alert Notification\n        case (CMD_ID_EN_NEW_IN_ALERT_NTF): {\n          if (param->value[1] != CAT_ID_ALL_SUPPORTED_CAT) {\n            // Enable sending of new alert notification for the specified\n            // category\n            ANPS_ENABLE_NEW_ALERT_CATEGORY(conidx, param->value[1], anps_env);\n          } else {\n            // Enable sending of new alert notification for all supported\n            // category\n            anps_env->env[conidx]->ntf_new_alert_cfg |=\n                anps_env->supp_new_alert_cat;\n          }\n\n          anps_send_ntf_status_update_ind(conidx, anps_env, ANP_NEW_ALERT);\n        } break;\n\n        // Enable Unread Alert Status Notification\n        case (CMD_ID_EN_UNREAD_CAT_STATUS_NTF): {\n          if (param->value[1] != CAT_ID_ALL_SUPPORTED_CAT) {\n            // Enable sending of unread alert notification for the specified\n            // category\n            ANPS_ENABLE_UNREAD_ALERT_CATEGORY(conidx, param->value[1],\n                                              anps_env);\n          } else {\n            // Enable sending of unread alert notification for all supported\n            // category\n            anps_env->env[conidx]->ntf_unread_alert_cfg |=\n                anps_env->supp_unread_alert_cat;\n          }\n\n          anps_send_ntf_status_update_ind(conidx, anps_env, ANP_UNREAD_ALERT);\n        } break;\n\n        // Disable New Alert Notification\n        case (CMD_ID_DIS_NEW_IN_ALERT_NTF): {\n          if (param->value[1] != CAT_ID_ALL_SUPPORTED_CAT) {\n            // Disable sending of new alert notification for the specified\n            // category\n            ANPS_DISABLE_NEW_ALERT_CATEGORY(conidx, param->value[1], anps_env);\n          } else {\n            // Disable sending of new alert notification for all supported\n            // category\n            anps_env->env[conidx]->ntf_new_alert_cfg &=\n                ~anps_env->supp_new_alert_cat;\n          }\n\n          anps_send_ntf_status_update_ind(conidx, anps_env, ANP_NEW_ALERT);\n        } break;\n\n        // Disable Unread Alert Status Notification\n        case (CMD_ID_DIS_UNREAD_CAT_STATUS_NTF): {\n          if (param->value[1] != CAT_ID_ALL_SUPPORTED_CAT) {\n            // Disable sending of unread alert notification for the specified\n            // category\n            ANPS_DISABLE_UNREAD_ALERT_CATEGORY(conidx, param->value[1],\n                                               anps_env);\n          } else {\n            // Enable sending of unread alert notification for all supported\n            // category\n            anps_env->env[conidx]->ntf_unread_alert_cfg &=\n                ~anps_env->supp_unread_alert_cat;\n          }\n\n          anps_send_ntf_status_update_ind(conidx, anps_env, ANP_UNREAD_ALERT);\n        } break;\n\n        // Notify New Alert immediately\n        case (CMD_ID_NTF_NEW_IN_ALERT_IMM): {\n          // Check if sending of notification is enabled\n          if (ANPS_IS_ALERT_ENABLED(conidx, anps_env, ANP_NEW_ALERT)) {\n            if (param->value[1] == CAT_ID_ALL_SUPPORTED_CAT) {\n              // Check if at least one category can be notified\n              if (anps_env->env[conidx]->ntf_new_alert_cfg != 0) {\n                anps_send_ntf_immediate_req_ind(conidx, anps_env, ANP_NEW_ALERT,\n                                                CAT_ID_ALL_SUPPORTED_CAT);\n              }\n            } else {\n              // Check if sending of notifications has been enabled for the\n              // specified category.\n              if (ANPS_IS_NEW_ALERT_CATEGORY_ENABLED(conidx, param->value[1],\n                                                     anps_env)) {\n                anps_send_ntf_immediate_req_ind(conidx, anps_env, ANP_NEW_ALERT,\n                                                param->value[1]);\n              }\n            }\n          }\n        } break;\n\n        // Notify Unread Alert Status immediately\n        case (CMD_ID_NTF_UNREAD_CAT_STATUS_IMM): {\n          if (ANPS_IS_ALERT_ENABLED(conidx, anps_env, ANP_UNREAD_ALERT)) {\n            // Check if sending of notification is enabled\n            if (ANPS_IS_ALERT_ENABLED(conidx, anps_env, ANP_UNREAD_ALERT)) {\n              if (param->value[1] == CAT_ID_ALL_SUPPORTED_CAT) {\n                // Check if at least one category can be notified\n                if (anps_env->env[conidx]->ntf_unread_alert_cfg != 0) {\n                  anps_send_ntf_immediate_req_ind(conidx, anps_env,\n                                                  ANP_UNREAD_ALERT,\n                                                  CAT_ID_ALL_SUPPORTED_CAT);\n                }\n              } else {\n                // Check if sending of notifications has been enabled for the\n                // specified category.\n                if (ANPS_IS_UNREAD_ALERT_CATEGORY_ENABLED(\n                        conidx, param->value[1], anps_env)) {\n                  anps_send_ntf_immediate_req_ind(\n                      conidx, anps_env, ANP_UNREAD_ALERT, param->value[1]);\n                }\n              }\n            }\n          }\n        } break;\n\n        default: {\n          ASSERT_ERR(0);\n        } break;\n        }\n      } while (0);\n    } else {\n      ASSERT_ERR(0);\n    }\n    // Send the write response to the peer device\n    struct gattc_write_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n    cfm->handle = param->handle;\n    cfm->status = status;\n    ke_msg_send(cfm);\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(anps){\n    {ANPS_ENABLE_REQ, (ke_msg_func_t)anps_enable_req_handler},\n    {ANPS_NTF_ALERT_CMD, (ke_msg_func_t)anps_ntf_alert_cmd_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid anps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct anps_env_tag *anps_env = PRF_ENV_GET(ANPS, anps);\n\n  task_desc->msg_handler_tab = anps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(anps_msg_handler_tab);\n  task_desc->state = anps_env->state;\n  task_desc->idx_max = ANPS_IDX_MAX;\n}\n\n#endif //(BLE_AN_SERVER)\n\n/// @} ANPSTASK\n"
  },
  {
    "path": "services/ble_profiles/bas/basc/api/basc_task.h",
    "content": "#ifndef _BASC_TASK_H_\n#define _BASC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup BASCTASK Battery Service Client Task\n * @ingroup BASC\n * @brief Battery Service Client Task\n *\n * The BASCTASK is responsible for handling the messages coming in and out of the\n * @ref BASC block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n///Maximum number of Battery Service instances we can handle\n#define BASC_NB_BAS_INSTANCES_MAX         (2)\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\nenum basc_msg_id\n{\n    /// Start the Battery Service Client Role - at connection\n    BASC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_BASC),\n    ///Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    BASC_ENABLE_RSP,\n\n    /// Read Characteristic Value Request\n    BASC_READ_INFO_REQ,\n    /// Read Characteristic Value Request\n    BASC_READ_INFO_RSP,\n\n    /// Write Battery Level Notification Configuration Value request\n    BASC_BATT_LEVEL_NTF_CFG_REQ,\n    /// Write Battery Level Notification Configuration Value response\n    BASC_BATT_LEVEL_NTF_CFG_RSP,\n\n    /// Indicate to APP that the Battery Level value has been received\n    BASC_BATT_LEVEL_IND,\n};\n\n/// Peer battery info that can be read\nenum basc_info\n{\n    /// Battery Level value\n    BASC_BATT_LVL_VAL,\n    /// Battery Level Client Characteristic Configuration\n    BASC_NTF_CFG,\n    /// Battery Level Characteristic Presentation Format\n    BASC_BATT_LVL_PRES_FORMAT,\n\n    BASC_INFO_MAX,\n};\n\n\n/// Battery Service Characteristics\nenum bass_char_type\n{\n    /// Battery Level\n    BAS_CHAR_BATT_LEVEL,\n\n    BAS_CHAR_MAX,\n};\n\n/// Battery Service Descriptors\nenum bass_desc_type\n{\n    /// Battery Level Characteristic Presentation Format\n    BAS_DESC_BATT_LEVEL_PRES_FORMAT,\n    /// Battery Level Client Characteristic Configuration\n    BAS_DESC_BATT_LEVEL_CFG,\n\n    BAS_DESC_MAX,\n};\n\n/*\n * APIs Structure\n ****************************************************************************************\n */\n\n///Structure containing the characteristics handles, value handles and descriptors\nstruct bas_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// Characteristic Info:\n    /// - Battery Level\n    struct prf_char_inf chars[BAS_CHAR_MAX];\n\n    /// Descriptor handles:\n    /// - Battery Level Client Characteristic Configuration\n    /// - Battery Level Characteristic Presentation Format\n    struct prf_char_desc_inf descs[BAS_DESC_MAX];\n};\n\n\n/// Parameters of the @ref BASC_ENABLE_REQ message\nstruct basc_enable_req\n{\n    ///Connection type\n    uint8_t con_type;\n\n    /// Number of BAS instances that have previously been found\n    uint8_t bas_nb;\n    /// Existing handle values bas\n    struct bas_content bas[BASC_NB_BAS_INSTANCES_MAX];\n};\n\n/// Parameters of the @ref BASC_ENABLE_RSP message\nstruct basc_enable_rsp\n{\n    /// Status\n    uint8_t status;\n    /// Number of BAS that have been found\n    uint8_t bas_nb;\n    ///Existing handle values bas\n    struct bas_content bas[BASC_NB_BAS_INSTANCES_MAX];\n};\n\n\n///Parameters of the @ref BASC_READ_INFO_REQ message\nstruct basc_read_info_req\n{\n    ///Characteristic info @see enum basc_info\n    uint8_t info;\n    ///Battery Service Instance - From 0 to BASC_NB_BAS_INSTANCES_MAX-1\n    uint8_t bas_nb;\n};\n\n///Parameters of the @ref  BASC_READ_INFO_RSP message\nstruct basc_read_info_rsp\n{\n    /// status of the request\n    uint8_t status;\n    ///Characteristic info @see enum basc_info\n    uint8_t info;\n    ///Battery Service Instance - From 0 to BASC_NB_BAS_INSTANCES_MAX-1\n    uint8_t bas_nb;\n\n    /// Information data\n    union basc_data\n    {\n        /// Battery Level - if info = BASC_BATT_LVL_VAL\n        uint8_t batt_level;\n        ///Notification Configuration Value - if info = BASC_NTF_CFG\n        uint16_t ntf_cfg;\n        ///Characteristic Presentation Format - if info = BASC_BATT_LVL_PRES_FORMAT\n        struct prf_char_pres_fmt char_pres_format;\n    } data;\n};\n\n///Parameters of the @ref BASC_BATT_LEVEL_NTF_CFG_REQ message\nstruct basc_batt_level_ntf_cfg_req\n{\n    ///Notification Configuration\n    uint16_t ntf_cfg;\n    ///Battery Service Instance - From 0 to BASC_NB_BAS_INSTANCES_MAX-1\n    uint8_t bas_nb;\n};\n\n///Parameters of the @ref BASC_BATT_LEVEL_NTF_CFG_RSP message\nstruct basc_batt_level_ntf_cfg_rsp\n{\n    ///Status\n    uint8_t status;\n    ///Battery Service Instance - From 0 to BASC_NB_BAS_INSTANCES_MAX-1\n    uint8_t bas_nb;\n};\n\n///Parameters of the @ref BASC_BATT_LEVEL_IND message\nstruct basc_batt_level_ind\n{\n    ///Battery Level\n    uint8_t batt_level;\n    ///Battery Service Instance - From 0 to BASC_NB_BAS_INSTANCES_MAX-1\n    uint8_t bas_nb;\n};\n\n\n/// @} BASCTASK\n\n#endif /* _BASC_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/bas/basc/src/basc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup BASC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_BATT_CLIENT)\n\n#include \"basc.h\"\n#include \"basc_task.h\"\n#include \"co_math.h\"\n#include \"gap.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialization of the BASC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t basc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct basc_env_tag *basc_env = (struct basc_env_tag *)ke_malloc(\n      sizeof(struct basc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate BASC required environment variable\n  env->env = (prf_env_t *)basc_env;\n\n  basc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  basc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_BASC;\n  basc_task_init(&(env->desc));\n\n  for (idx = 0; idx < BASC_IDX_MAX; idx++) {\n    basc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), BASC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the BASC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void basc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct basc_env_tag *basc_env = (struct basc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < BASC_IDX_MAX; idx++) {\n    if (basc_env->env[idx] != NULL) {\n      if (basc_env->env[idx]->operation != NULL) {\n        ke_free(basc_env->env[idx]->operation);\n      }\n      ke_free(basc_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(basc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void basc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put BAS Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), BASC_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void basc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct basc_env_tag *basc_env = (struct basc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (basc_env->env[conidx] != NULL) {\n    if (basc_env->env[conidx]->operation != NULL) {\n      ke_free(basc_env->env[conidx]->operation);\n    }\n    ke_free(basc_env->env[conidx]);\n    basc_env->env[conidx] = NULL;\n  }\n\n  /* Put BAS Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), BASC_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// BASC Task interface required by profile manager\nconst struct prf_task_cbs basc_itf = {\n    basc_init,\n    basc_destroy,\n    basc_create,\n    basc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *basc_prf_itf_get(void) { return &basc_itf; }\n\nvoid basc_enable_rsp_send(struct basc_env_tag *basc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Counter\n  uint8_t svc_inst;\n\n  // Send APP the details of the discovered attributes on BASC\n  struct basc_enable_rsp *rsp = KE_MSG_ALLOC(\n      BASC_ENABLE_RSP, prf_dst_task_get(&(basc_env->prf_env), conidx),\n      prf_src_task_get(&(basc_env->prf_env), conidx), basc_enable_rsp);\n  rsp->status = status;\n  rsp->bas_nb = 0;\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->bas_nb = basc_env->env[conidx]->bas_nb;\n\n    for (svc_inst = 0; svc_inst < co_min(basc_env->env[conidx]->bas_nb,\n                                         BASC_NB_BAS_INSTANCES_MAX);\n         svc_inst++) {\n      rsp->bas[svc_inst] = basc_env->env[conidx]->bas[svc_inst];\n\n      // Register BASC task in gatt for indication/notifications\n      prf_register_atthdl2gatt(&(basc_env->prf_env), conidx,\n                               &basc_env->env[conidx]->bas[svc_inst].svc);\n    }\n  }\n\n  ke_msg_send(rsp);\n}\n\n#endif /* (BLE_BATT_CLIENT) */\n\n/// @} BASC\n"
  },
  {
    "path": "services/ble_profiles/bas/basc/src/basc.h",
    "content": "#ifndef _BASC_H_\n#define _BASC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup BASC Battery Service Client\n * @ingroup BAS\n * @brief Battery Service Client\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_BATT_CLIENT)\n\n#include \n#include \n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"basc_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of Battery Client task instances\n#define BASC_IDX_MAX     (BLE_CONNECTION_MAX)\n\n/// Possible states of the BAPC task\nenum basc_state\n{\n    /// Disconnected state\n    BASC_FREE,\n    /// IDLE state\n    BASC_IDLE,\n    /// Busy State\n    BASC_BUSY,\n\n    /// Number of defined states.\n    BASC_STATE_MAX\n};\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Environment variable for each Connections\nstruct basc_cnx_env\n{\n    /// on-going operation\n    struct ke_msg * operation;\n    ///BAS characteristics\n    struct bas_content bas[BASC_NB_BAS_INSTANCES_MAX];\n\n    ///Number of BAS instances found\n    uint8_t bas_nb;\n};\n\n/// Battery 'Profile' Client environment variable\nstruct basc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct basc_cnx_env* env[BASC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[BASC_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve BAS client profile interface\n *\n * @return BAS client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* basc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send BAS ATT DB discovery results to BASC host.\n ****************************************************************************************\n */\nvoid basc_enable_rsp_send(struct basc_env_tag *basc_env, uint8_t conidx, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid basc_task_init(struct ke_task_desc *task_desc);\n\n#endif /* (BLE_BATT_CLIENT) */\n\n/// @} BASC\n\n#endif /* _BASC_H_ */\n"
  },
  {
    "path": "services/ble_profiles/bas/basc/src/basc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup BASCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_BATT_CLIENT)\n\n#include \"basc.h\"\n#include \"basc_task.h\"\n#include \"co_math.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Battery Service characteristics information\nconst struct prf_char_def basc_bas_char[BAS_CHAR_MAX] = {\n    /// Battery Level\n    [BAS_CHAR_BATT_LEVEL] = {ATT_CHAR_BATTERY_LEVEL, ATT_MANDATORY,\n                             ATT_CHAR_PROP_RD},\n};\n\n/// State machine used to retrieve Battery Service characteristic description\n/// information\nconst struct prf_char_desc_def basc_bas_char_desc[BAS_DESC_MAX] = {\n    /// Battery Level Characteristic Presentation Format\n    [BAS_DESC_BATT_LEVEL_PRES_FORMAT] = {ATT_DESC_CHAR_PRES_FORMAT,\n                                         ATT_OPTIONAL, BAS_CHAR_BATT_LEVEL},\n    /// Battery Level Client Config\n    [BAS_DESC_BATT_LEVEL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                 BAS_CHAR_BATT_LEVEL},\n\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BASC_ENABLE_REQ message.\n * The handler enables the Battery Service Client Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int basc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct basc_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  int msg_status = KE_MSG_CONSUMED;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Battery service Client Role Task Environment\n  struct basc_env_tag *basc_env = PRF_ENV_GET(BASC, basc);\n\n  ASSERT_INFO(basc_env != NULL, dest_id, src_id);\n  if ((state == BASC_IDLE) && (basc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    basc_env->env[conidx] = (struct basc_cnx_env *)ke_malloc(\n        sizeof(struct basc_cnx_env), KE_MEM_ATT_DB);\n    memset(basc_env->env[conidx], 0, sizeof(struct basc_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering BAS on peer\n      prf_disc_svc_send(&(basc_env->prf_env), conidx, ATT_SVC_BATTERY_SERVICE);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, BASC_BUSY);\n      basc_env->env[conidx]->operation = ke_param2msg(param);\n      msg_status = KE_MSG_NO_FREE;\n    }\n    // normal connection, get saved att details\n    else {\n      basc_env->env[conidx]->bas_nb = param->bas_nb;\n      memcpy(&(basc_env->env[conidx]->bas[0]), &(param->bas[0]),\n             sizeof(struct bas_content) * BASC_NB_BAS_INSTANCES_MAX);\n\n      // send APP confirmation that can start normal connection to TH\n      basc_enable_rsp_send(basc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  } else if (state != BASC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    basc_enable_rsp_send(basc_env, conidx, status);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == BASC_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct basc_env_tag *basc_env = PRF_ENV_GET(BASC, basc);\n\n    ASSERT_INFO(basc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(basc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (basc_env->env[conidx]->bas_nb < BASC_NB_BAS_INSTANCES_MAX) {\n      // Retrieve DIS characteristics\n      prf_extract_svc_info(\n          ind, BAS_CHAR_MAX, &basc_bas_char[0],\n          &(basc_env->env[conidx]->bas[basc_env->env[conidx]->bas_nb].chars[0]),\n          BAS_DESC_MAX, &basc_bas_char_desc[0],\n          &(basc_env->env[conidx]\n                ->bas[basc_env->env[conidx]->bas_nb]\n                .descs[0]));\n\n      // Even if we get multiple responses we only store 1 range\n      basc_env->env[conidx]->bas[basc_env->env[conidx]->bas_nb].svc.shdl =\n          ind->start_hdl;\n      basc_env->env[conidx]->bas[basc_env->env[conidx]->bas_nb].svc.ehdl =\n          ind->end_hdl;\n    }\n\n    basc_env->env[conidx]->bas_nb++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BASC_READ_INFO_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int basc_read_info_req_handler(ke_msg_id_t const msgid,\n                                        struct basc_read_info_req const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == BASC_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct basc_env_tag *basc_env = PRF_ENV_GET(BASC, basc);\n    ASSERT_INFO(basc_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (basc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    }\n    // check parameter range\n    else if (param->bas_nb > basc_env->env[conidx]->bas_nb) {\n      status = PRF_ERR_INVALID_PARAM;\n    } else {\n      uint16_t handle = ATT_INVALID_HANDLE;\n      status = PRF_ERR_INEXISTENT_HDL;\n\n      // check requested info\n      switch (param->info) {\n      /// Battery Level value\n      case BASC_BATT_LVL_VAL: {\n        handle = basc_env->env[conidx]\n                     ->bas[param->bas_nb]\n                     .chars[BAS_CHAR_BATT_LEVEL]\n                     .val_hdl;\n      } break;\n      /// Battery Level Client Characteristic Configuration\n      case BASC_NTF_CFG: {\n        handle = basc_env->env[conidx]\n                     ->bas[param->bas_nb]\n                     .descs[BAS_DESC_BATT_LEVEL_CFG]\n                     .desc_hdl;\n      } break;\n      /// Battery Level Characteristic Presentation Format\n      case BASC_BATT_LVL_PRES_FORMAT: {\n        handle = basc_env->env[conidx]\n                     ->bas[param->bas_nb]\n                     .descs[BAS_DESC_BATT_LEVEL_PRES_FORMAT]\n                     .desc_hdl;\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      if (handle != ATT_INVALID_HANDLE) {\n        status = GAP_ERR_NO_ERROR;\n        // read information\n        prf_read_char_send(&(basc_env->prf_env), conidx,\n                           basc_env->env[conidx]->bas[param->bas_nb].svc.shdl,\n                           basc_env->env[conidx]->bas[param->bas_nb].svc.ehdl,\n                           handle);\n\n        // store context of request and go into busy state\n        basc_env->env[conidx]->operation = ke_param2msg(param);\n        ke_state_set(dest_id, BASC_BUSY);\n        msg_status = KE_MSG_NO_FREE;\n      }\n    }\n  }\n  // process message later\n  else if (state == BASC_BUSY) {\n    status = GAP_ERR_NO_ERROR;\n    msg_status = KE_MSG_SAVED;\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct basc_read_info_rsp *rsp =\n        KE_MSG_ALLOC(BASC_READ_INFO_RSP, src_id, dest_id, basc_read_info_rsp);\n    // set error status\n    rsp->status = status;\n    rsp->info = param->info;\n    rsp->bas_nb = param->bas_nb;\n\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BASC_BATT_LEVEL_NTF_CFG_REQ message.\n * It allows configuration of the peer ntf/stop characteristic for Battery Level\n *Characteristic. Will return an error code if that cfg char does not exist.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int basc_batt_level_ntf_cfg_req_handler(\n    ke_msg_id_t const msgid, struct basc_batt_level_ntf_cfg_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == BASC_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct basc_env_tag *basc_env = PRF_ENV_GET(BASC, basc);\n    ASSERT_INFO(basc_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (basc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    }\n    // check parameter range\n    else if ((param->bas_nb > basc_env->env[conidx]->bas_nb) ||\n             (param->ntf_cfg > PRF_CLI_START_NTF)) {\n      status = PRF_ERR_INVALID_PARAM;\n    } else {\n      uint16_t handle = basc_env->env[conidx]\n                            ->bas[param->bas_nb]\n                            .descs[BAS_DESC_BATT_LEVEL_CFG]\n                            .desc_hdl;\n      status = PRF_ERR_INEXISTENT_HDL;\n\n      if (handle == ATT_INVALID_HDL) {\n        status = PRF_ERR_INEXISTENT_HDL;\n      } else {\n        status = GAP_ERR_NO_ERROR;\n        // Send GATT Write Request\n        prf_gatt_write_ntf_ind(&basc_env->prf_env, conidx, handle,\n                               param->ntf_cfg);\n        // store context of request and go into busy state\n        basc_env->env[conidx]->operation = ke_param2msg(param);\n        ke_state_set(dest_id, BASC_BUSY);\n        msg_status = KE_MSG_NO_FREE;\n      }\n    }\n  }\n  // process message later\n  else if (state == BASC_BUSY) {\n    status = GAP_ERR_NO_ERROR;\n    msg_status = KE_MSG_SAVED;\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct basc_batt_level_ntf_cfg_rsp *rsp =\n        KE_MSG_ALLOC(BASC_BATT_LEVEL_NTF_CFG_RSP, src_id, dest_id,\n                     basc_batt_level_ntf_cfg_rsp);\n    // set error status\n    rsp->status = status;\n    rsp->bas_nb = param->bas_nb;\n\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct basc_env_tag *basc_env = PRF_ENV_GET(BASC, basc);\n\n  // sanity check\n  if ((state == BASC_BUSY) && (basc_env->env[conidx] != NULL) &&\n      (basc_env->env[conidx]->operation != NULL)) {\n    switch (basc_env->env[conidx]->operation->id) {\n    case BASC_ENABLE_REQ: {\n      uint8_t status = param->status;\n\n      if (param->status == ATT_ERR_NO_ERROR) {\n        // check characteristic validity\n        if (basc_env->env[conidx]->bas_nb > 0) {\n          uint8_t i;\n          for (i = 0; (i < co_min(basc_env->env[conidx]->bas_nb,\n                                  BASC_NB_BAS_INSTANCES_MAX)) &&\n                      (status == GAP_ERR_NO_ERROR);\n               i++) {\n            status = prf_check_svc_char_validity(\n                BAS_CHAR_MAX, basc_env->env[conidx]->bas[i].chars,\n                basc_bas_char);\n\n            // check descriptor validity\n            if (status == GAP_ERR_NO_ERROR) {\n              struct prf_char_desc_def bas_desc[BAS_DESC_MAX];\n              memcpy(bas_desc, basc_bas_char_desc, sizeof(basc_bas_char_desc));\n\n              if (basc_env->env[conidx]->bas_nb > 1) {\n                bas_desc[BAS_DESC_BATT_LEVEL_PRES_FORMAT].req_flag =\n                    ATT_MANDATORY;\n              }\n              if ((basc_env->env[conidx]\n                       ->bas[i]\n                       .chars[BAS_CHAR_BATT_LEVEL]\n                       .prop &\n                   ATT_CHAR_PROP_NTF) == ATT_CHAR_PROP_NTF) {\n                bas_desc[BAS_DESC_BATT_LEVEL_CFG].req_flag = ATT_MANDATORY;\n              }\n\n              status = prf_check_svc_char_desc_validity(\n                  BAS_DESC_MAX, basc_env->env[conidx]->bas[i].descs, bas_desc,\n                  basc_env->env[conidx]->bas[i].chars);\n            }\n          }\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n      }\n      basc_enable_rsp_send(basc_env, conidx, status);\n    } break;\n    case BASC_READ_INFO_REQ: {\n      struct basc_read_info_req *req =\n          (struct basc_read_info_req *)ke_msg2param(\n              basc_env->env[conidx]->operation);\n\n      struct basc_read_info_rsp *rsp = KE_MSG_ALLOC(\n          BASC_READ_INFO_RSP, prf_dst_task_get(&(basc_env->prf_env), conidx),\n          dest_id, basc_read_info_rsp);\n      // set error status\n      rsp->status = param->status;\n      rsp->bas_nb = req->bas_nb;\n      rsp->info = req->info;\n\n      ke_msg_send(rsp);\n\n    } break;\n    case BASC_BATT_LEVEL_NTF_CFG_REQ: {\n      struct basc_batt_level_ntf_cfg_req *req =\n          (struct basc_batt_level_ntf_cfg_req *)ke_msg2param(\n              basc_env->env[conidx]->operation);\n\n      struct basc_batt_level_ntf_cfg_rsp *rsp =\n          KE_MSG_ALLOC(BASC_BATT_LEVEL_NTF_CFG_RSP,\n                       prf_dst_task_get(&(basc_env->prf_env), conidx), dest_id,\n                       basc_batt_level_ntf_cfg_rsp);\n      // set error status\n      rsp->status = param->status;\n      rsp->bas_nb = req->bas_nb;\n\n      ke_msg_send(rsp);\n    } break;\n    default: {\n      // Not Expected at all\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    // operation is over - go back to idle state\n    ke_free(basc_env->env[conidx]->operation);\n    basc_env->env[conidx]->operation = NULL;\n    ke_state_set(dest_id, BASC_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == BASC_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct basc_env_tag *basc_env = PRF_ENV_GET(BASC, basc);\n    struct basc_read_info_req *req = (struct basc_read_info_req *)ke_msg2param(\n        basc_env->env[conidx]->operation);\n\n    ASSERT_INFO(basc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(basc_env->env[conidx] != NULL, dest_id, src_id);\n\n    struct basc_read_info_rsp *rsp = KE_MSG_ALLOC(\n        BASC_READ_INFO_RSP, prf_dst_task_get(&(basc_env->prf_env), conidx),\n        dest_id, basc_read_info_rsp);\n    // set error status\n    rsp->status = GAP_ERR_NO_ERROR;\n    rsp->bas_nb = req->bas_nb;\n    rsp->info = req->info;\n\n    switch (req->info) {\n    /// Battery Level value\n    case BASC_BATT_LVL_VAL: {\n      rsp->data.batt_level = param->value[0];\n    } break;\n    /// Battery Level Client Characteristic Configuration\n    case BASC_NTF_CFG: {\n      rsp->data.ntf_cfg = co_read16p(¶m->value[0]);\n\n    } break;\n    /// Battery Level Characteristic Presentation Format\n    case BASC_BATT_LVL_PRES_FORMAT: {\n      prf_unpack_char_pres_fmt(¶m->value[0], &rsp->data.char_pres_format);\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    // send response\n    ke_msg_send(rsp);\n\n    // operation is over - go back to idle state\n    ke_free(basc_env->env[conidx]->operation);\n    basc_env->env[conidx]->operation = NULL;\n    ke_state_set(dest_id, BASC_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state != BASC_FREE) {\n\n    // BAS Instance\n    uint8_t bas_nb;\n    uint8_t conidx = KE_IDX_GET(src_id);\n    // Get the address of the environment\n    struct basc_env_tag *basc_env = PRF_ENV_GET(BASC, basc);\n\n    // Battery Level - BAS instance is unknown.\n    for (bas_nb = 0; (bas_nb < basc_env->env[conidx]->bas_nb); bas_nb++) {\n      if (param->handle == basc_env->env[conidx]\n                               ->bas[bas_nb]\n                               .chars[BAS_CHAR_BATT_LEVEL]\n                               .val_hdl) {\n        struct basc_batt_level_ind *ind = KE_MSG_ALLOC(\n            BASC_BATT_LEVEL_IND, prf_dst_task_get(&(basc_env->prf_env), conidx),\n            dest_id, basc_batt_level_ind);\n\n        ind->batt_level = param->value[0];\n        ind->bas_nb = bas_nb;\n\n        // Send Battery Level value to APP\n        ke_msg_send(ind);\n        break;\n      }\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(basc){\n    {BASC_ENABLE_REQ, (ke_msg_func_t)basc_enable_req_handler},\n    {BASC_READ_INFO_REQ, (ke_msg_func_t)basc_read_info_req_handler},\n    {BASC_BATT_LEVEL_NTF_CFG_REQ,\n     (ke_msg_func_t)basc_batt_level_ntf_cfg_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid basc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct basc_env_tag *basc_env = PRF_ENV_GET(BASC, basc);\n\n  task_desc->msg_handler_tab = basc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(basc_msg_handler_tab);\n  task_desc->state = basc_env->state;\n  task_desc->idx_max = BASC_IDX_MAX;\n}\n\n#endif /* (BLE_BATT_CLIENT) */\n\n/// @} BASCTASK\n"
  },
  {
    "path": "services/ble_profiles/bas/bass/api/bass_task.h",
    "content": "#ifndef _BASS_TASK_H_\n#define _BASS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup BAPSTASK Task\n * @ingroup BAPS\n * @brief Battery 'Profile' Task.\n *\n * The BAPS_TASK is responsible for handling the messages coming in and out of the\n * @ref BAPS block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"prf_types.h\"\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n#define BAS_BATTERY_LVL_MAX               (100)\n\n\n///Maximal number of BAS that can be added in the DB\n#define BASS_NB_BAS_INSTANCES_MAX         (2)\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Messages for Battery Server\nenum bass_msg_id\n{\n    /// Start the Battery Server - at connection used to restore bond data\n    BASS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_BASS),\n    /// Confirmation of the Battery Server start\n    BASS_ENABLE_RSP,\n    /// Battery Level Value Update Request\n    BASS_BATT_LEVEL_UPD_REQ,\n    /// Inform APP if Battery Level value has been notified or not\n    BASS_BATT_LEVEL_UPD_RSP,\n    /// Inform APP that Battery Level Notification Configuration has been changed - use to update bond data\n    BASS_BATT_LEVEL_NTF_CFG_IND,\n};\n\n/// Features Flag Masks\nenum bass_features\n{\n    /// Battery Level Characteristic doesn't support notifications\n    BAS_BATT_LVL_NTF_NOT_SUP,\n    /// Battery Level Characteristic support notifications\n    BAS_BATT_LVL_NTF_SUP,\n};\n\n\n/*\n * APIs Structures\n ****************************************************************************************\n */\n\n/// Parameters for the database creation\nstruct bass_db_cfg\n{\n    /// Number of BAS to add\n    uint8_t bas_nb;\n    /// Features of each BAS instance\n    uint8_t features[BASS_NB_BAS_INSTANCES_MAX];\n    /// Battery Level Characteristic Presentation Format - Should not change during connection\n    struct prf_char_pres_fmt batt_level_pres_format[BASS_NB_BAS_INSTANCES_MAX];\n};\n\n/// Parameters of the @ref BASS_ENABLE_REQ message\nstruct bass_enable_req\n{\n    /// connection index\n    uint8_t  conidx;\n    /// Notification Configuration\n    uint8_t  ntf_cfg;\n    /// Old Battery Level used to decide if notification should be triggered\n    uint8_t  old_batt_lvl[BASS_NB_BAS_INSTANCES_MAX];\n};\n\n/// Parameters of the @ref BASS_ENABLE_RSP message\nstruct bass_enable_rsp\n{\n    /// connection index\n    uint8_t conidx;\n    ///status\n    uint8_t status;\n};\n\n///Parameters of the @ref BASS_BATT_LEVEL_UPD_REQ message\nstruct bass_batt_level_upd_req\n{\n    /// BAS instance\n    uint8_t bas_instance;\n    /// Battery Level\n    uint8_t batt_level;\n};\n\n///Parameters of the @ref BAPS_BATT_LEVEL_UPD_RSP message\nstruct bass_batt_level_upd_rsp\n{\n    ///status\n    uint8_t status;\n};\n\n///Parameters of the @ref BASS_BATT_LEVEL_NTF_CFG_IND message\nstruct bass_batt_level_ntf_cfg_ind\n{\n    /// connection index\n    uint8_t  conidx;\n    ///Notification Configuration\n    uint8_t  ntf_cfg;\n};\n\n/// @} BASSTASK\n\n#endif /* _BASS_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/bas/bass/src/bass.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup BASS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_BATT_SERVER)\n#include \"bass.h\"\n#include \"bass_task.h\"\n#include \"prf.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * BAS ATTRIBUTES DEFINITION\n ****************************************************************************************\n */\n\n/// Full BAS Database Description - Used to add attributes into the database\nconst struct attm_desc bas_att_db[BAS_IDX_NB] = {\n    // Battery Service Declaration\n    [BAS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Battery Level Characteristic Declaration\n    [BAS_IDX_BATT_LVL_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // Battery Level Characteristic Value\n    [BAS_IDX_BATT_LVL_VAL] = {ATT_CHAR_BATTERY_LEVEL, PERM(RD, ENABLE),\n                              PERM(RI, ENABLE), 0},\n    // Battery Level Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [BAS_IDX_BATT_LVL_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                  PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                  0},\n    // Battery Level Characteristic - Characteristic Presentation Format\n    // Descriptor\n    [BAS_IDX_BATT_LVL_PRES_FMT] = {ATT_DESC_CHAR_PRES_FORMAT, PERM(RD, ENABLE),\n                                   PERM(RI, ENABLE), 0},\n};\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the BASS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t bass_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct bass_db_cfg *params) {\n  uint16_t shdl[BASS_NB_BAS_INSTANCES_MAX];\n  struct bass_env_tag *bass_env = NULL;\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Counter\n  uint8_t i;\n\n  // Check number of BAS instances\n  if ((params->bas_nb > 0) && (params->bas_nb <= BASS_NB_BAS_INSTANCES_MAX)) {\n    //-------------------- allocate memory required for the profile\n    //---------------------\n    bass_env = (struct bass_env_tag *)ke_malloc(sizeof(struct bass_env_tag),\n                                                KE_MEM_ATT_DB);\n    memset(bass_env, 0, sizeof(struct bass_env_tag));\n\n    // Save number of BAS\n    bass_env->svc_nb = params->bas_nb;\n\n    for (i = 0; ((i < params->bas_nb) && (status == GAP_ERR_NO_ERROR)); i++) {\n      // Service content flag\n      uint8_t cfg_flag = BAS_CFG_FLAG_MANDATORY_MASK;\n\n      // Save database configuration\n      bass_env->features |= (params->features[i]) << i;\n      bass_env->batt_level_pres_format[i] = params->batt_level_pres_format[i];\n\n      // Check if notifications are supported\n      if (params->features[i] == BAS_BATT_LVL_NTF_SUP) {\n        cfg_flag |= BAS_CFG_FLAG_NTF_SUP_MASK;\n      }\n\n      // Check if multiple instances\n      if (bass_env->svc_nb > 1) {\n        cfg_flag |= BAS_CFG_FLAG_MTP_BAS_MASK;\n      }\n\n      shdl[i] = *start_hdl;\n\n      // Create BAS in the DB\n      //------------------ create the attribute database for the profile\n      //-------------------\n      status = attm_svc_create_db(\n          &(shdl[i]), ATT_SVC_BATTERY_SERVICE, (uint8_t *)&cfg_flag, BAS_IDX_NB,\n          NULL, env->task, bas_att_db,\n          (sec_lvl &\n           (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)));\n\n      // Set optional permissions\n      if (status == GAP_ERR_NO_ERROR) {\n        // update start handle for next service - only useful if multiple\n        // service, else not used. 4 characteristics + optional notification\n        // characteristic.\n        *start_hdl = shdl[i] + BAS_IDX_NB -\n                     ((params->features[i] == BAS_BATT_LVL_NTF_SUP) ? 0 : 1);\n\n        // Set optional permissions\n        if (params->features[i] == BAS_BATT_LVL_NTF_SUP) {\n          // Battery Level characteristic value permissions\n          uint16_t perm = PERM(RD, ENABLE) | PERM(NTF, ENABLE);\n\n          attm_att_set_permission(shdl[i] + BAS_IDX_BATT_LVL_VAL, perm, 0);\n        }\n      }\n\n      // Reset configuration flag\n      cfg_flag = BAS_CFG_FLAG_MANDATORY_MASK;\n    }\n  } else {\n    status = PRF_ERR_INVALID_PARAM;\n  }\n\n  //-------------------- Update profile task information  ---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n\n    // allocate BASS required environment variable\n    env->env = (prf_env_t *)bass_env;\n    *start_hdl = shdl[0];\n    bass_env->start_hdl = *start_hdl;\n    bass_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    bass_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_BASS;\n    bass_task_init(&(env->desc));\n\n    // service is ready, go into an Idle state\n    ke_state_set(env->task, BASS_IDLE);\n  } else if (bass_env != NULL) {\n    ke_free(bass_env);\n  }\n\n  return (status);\n}\n/**\n ****************************************************************************************\n * @brief Destruction of the BASS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void bass_destroy(struct prf_task_env *env) {\n  struct bass_env_tag *bass_env = (struct bass_env_tag *)env->env;\n\n  // clear on-going operation\n  if (bass_env->operation != NULL) {\n    ke_free(bass_env->operation);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(bass_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void bass_create(struct prf_task_env *env, uint8_t conidx) {\n  struct bass_env_tag *bass_env = (struct bass_env_tag *)env->env;\n  ASSERT_ERR(conidx < BLE_CONNECTION_MAX);\n\n  // force notification config to zero when peer device is connected\n  bass_env->ntf_cfg[conidx] = 0;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void bass_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct bass_env_tag *bass_env = (struct bass_env_tag *)env->env;\n\n  ASSERT_ERR(conidx < BLE_CONNECTION_MAX);\n  // force notification config to zero when peer device is disconnected\n  bass_env->ntf_cfg[conidx] = 0;\n}\n\n/**\n ****************************************************************************************\n * @brief  Trigger battery level notification\n *\n * @param bass_env profile environment\n * @param conidx   peer destination connection index\n * @param svc_idx  Service index\n ****************************************************************************************\n */\nstatic void bass_notify_batt_lvl(struct bass_env_tag *bass_env, uint8_t conidx,\n                                 uint8_t svc_idx) {\n  // Allocate the GATT notification message\n  struct gattc_send_evt_cmd *batt_lvl =\n      KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(&(bass_env->prf_env), 0),\n                       gattc_send_evt_cmd, sizeof(uint8_t));\n\n  // Fill in the parameter structure\n  batt_lvl->operation = GATTC_NOTIFY;\n  batt_lvl->handle = bass_get_att_handle(svc_idx, BAS_IDX_BATT_LVL_VAL);\n  // pack measured value in database\n  batt_lvl->length = sizeof(uint8_t);\n  batt_lvl->value[0] = bass_env->batt_lvl[svc_idx];\n\n  // send notification to peer device\n  ke_msg_send(batt_lvl);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// BASS Task interface required by profile manager\nconst struct prf_task_cbs bass_itf = {\n    (prf_init_fnct)bass_init,\n    bass_destroy,\n    bass_create,\n    bass_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *bass_prf_itf_get(void) { return &bass_itf; }\n\nuint16_t bass_get_att_handle(uint8_t svc_idx, uint8_t att_idx) {\n  struct bass_env_tag *bass_env = PRF_ENV_GET(BASS, bass);\n  uint16_t handle = ATT_INVALID_HDL;\n  uint8_t i = 0;\n\n  if (svc_idx < bass_env->svc_nb) {\n    handle = bass_env->start_hdl;\n\n    for (i = 0; i < svc_idx; i++) {\n      // update start handle for next service - only useful if multiple service,\n      // else not used. 4 characteristics + optional notification\n      // characteristic.\n      handle +=\n          BAS_IDX_NB -\n          ((((bass_env->features >> i) & 0x01) == BAS_BATT_LVL_NTF_SUP) ? 0\n                                                                        : 1);\n    }\n\n    // increment index according to expected index\n    if (att_idx < BAS_IDX_BATT_LVL_NTF_CFG) {\n      handle += att_idx;\n    }\n    // Battery notification\n    else if ((att_idx == BAS_IDX_BATT_LVL_NTF_CFG) &&\n             (((bass_env->features >> i) & 0x01) == BAS_BATT_LVL_NTF_SUP)) {\n      handle += BAS_IDX_BATT_LVL_NTF_CFG;\n    }\n    // Battery Level format\n    else if ((att_idx == BAS_IDX_BATT_LVL_PRES_FMT) && (bass_env->svc_nb > 1)) {\n      handle +=\n          BAS_IDX_BATT_LVL_PRES_FMT -\n          ((((bass_env->features >> i) & 0x01) == BAS_BATT_LVL_NTF_SUP) ? 0\n                                                                        : 1);\n    } else {\n      handle = ATT_INVALID_HDL;\n    }\n  }\n\n  return handle;\n}\n\nuint8_t bass_get_att_idx(uint16_t handle, uint8_t *svc_idx, uint8_t *att_idx) {\n  struct bass_env_tag *bass_env = PRF_ENV_GET(BASS, bass);\n  uint16_t hdl_cursor = bass_env->start_hdl;\n  uint8_t status = PRF_APP_ERROR;\n\n  // Browse list of services\n  // handle must be greater than current index\n  for (*svc_idx = 0; (*svc_idx < bass_env->svc_nb) && (handle >= hdl_cursor);\n       (*svc_idx)++) {\n    // check if it's a mandatory index\n    if (handle <= (hdl_cursor + BAS_IDX_BATT_LVL_VAL)) {\n      *att_idx = handle - hdl_cursor;\n      status = GAP_ERR_NO_ERROR;\n      break;\n    }\n\n    hdl_cursor += BAS_IDX_BATT_LVL_VAL;\n\n    // check if it's a notify index\n    if (((bass_env->features >> *svc_idx) & 0x01) == BAS_BATT_LVL_NTF_SUP) {\n      hdl_cursor++;\n      if (handle == hdl_cursor) {\n        *att_idx = BAS_IDX_BATT_LVL_NTF_CFG;\n        status = GAP_ERR_NO_ERROR;\n        break;\n      }\n    }\n\n    // check if it's battery level format\n    if (bass_env->svc_nb > 1) {\n      hdl_cursor++;\n      if (handle == hdl_cursor) {\n        *att_idx = BAS_IDX_BATT_LVL_PRES_FMT;\n        status = GAP_ERR_NO_ERROR;\n        break;\n      }\n    }\n\n    hdl_cursor++;\n  }\n\n  return (status);\n}\n\nvoid bass_exe_operation(void) {\n  struct bass_env_tag *bass_env = PRF_ENV_GET(BASS, bass);\n  ASSERT_ERR(bass_env->operation != NULL);\n  bool finished = true;\n  uint8_t conidx = GAP_INVALID_CONIDX;\n\n  // Restoring connection information requested\n  if (bass_env->operation->id == BASS_ENABLE_REQ) {\n    struct bass_enable_req *enable =\n        (struct bass_enable_req *)ke_msg2param(bass_env->operation);\n    conidx = enable->conidx;\n    // loop on all services to check if notification should be triggered\n    while (bass_env->cursor < BASS_NB_BAS_INSTANCES_MAX) {\n      if (((bass_env->ntf_cfg[enable->conidx] & (1 << bass_env->cursor)) !=\n           0) &&\n          (enable->old_batt_lvl[bass_env->cursor] !=\n           bass_env->batt_lvl[bass_env->cursor])) {\n        // trigger notification\n        bass_notify_batt_lvl(bass_env, enable->conidx, bass_env->cursor);\n\n        finished = false;\n        bass_env->cursor++;\n        break;\n      }\n      bass_env->cursor++;\n    }\n  }\n  // Battery level updated\n  else if (bass_env->operation->id == BASS_BATT_LEVEL_UPD_REQ) {\n    struct bass_batt_level_upd_req *update =\n        (struct bass_batt_level_upd_req *)ke_msg2param(bass_env->operation);\n\n    // loop on all connection\n    while (bass_env->cursor < BLE_CONNECTION_MAX) {\n      if ((bass_env->ntf_cfg[bass_env->cursor] & (1 << update->bas_instance)) !=\n          0) {\n        // trigger notification\n        bass_notify_batt_lvl(bass_env, bass_env->cursor, update->bas_instance);\n        finished = false;\n        bass_env->cursor++;\n        break;\n      }\n      bass_env->cursor++;\n    }\n\n  }\n  // default, should not happen\n  else {\n    ASSERT_ERR(0);\n  }\n\n  // check if operation is finished\n  if (finished) {\n    // trigger response message\n    if (bass_env->operation->id == BASS_ENABLE_REQ) {\n      struct bass_enable_rsp *rsp =\n          KE_MSG_ALLOC(BASS_ENABLE_RSP, bass_env->operation->src_id,\n                       bass_env->operation->dest_id, bass_enable_rsp);\n\n      rsp->conidx = conidx;\n      rsp->status = GAP_ERR_NO_ERROR;\n      ke_msg_send(rsp);\n    } else if (bass_env->operation->id == BASS_BATT_LEVEL_UPD_REQ) {\n      struct bass_batt_level_upd_rsp *rsp =\n          KE_MSG_ALLOC(BASS_BATT_LEVEL_UPD_RSP, bass_env->operation->src_id,\n                       bass_env->operation->dest_id, bass_batt_level_upd_rsp);\n\n      rsp->status = GAP_ERR_NO_ERROR;\n      ke_msg_send(rsp);\n    }\n\n    // free operation\n    ke_free(bass_env->operation);\n    bass_env->operation = NULL;\n    // go back to idle state\n    ke_state_set(prf_src_task_get(&(bass_env->prf_env), 0), BASS_IDLE);\n  }\n}\n\n#endif // (BLE_BATT_SERVER)\n\n/// @} BASS\n"
  },
  {
    "path": "services/ble_profiles/bas/bass/src/bass.h",
    "content": "#ifndef _BASS_H_\n#define _BASS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup BAPS Battery 'Profile' Server\n * @ingroup BAP\n * @brief Battery 'Profile' Server\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_BATT_SERVER)\n\n#include \"bass_task.h\"\n#include \"prf_types.h\"\n#include \"prf.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of Battery Server task instances\n#define BASS_IDX_MAX     0x01\n\n#define BAS_CFG_FLAG_MANDATORY_MASK       (0x07)\n#define BAS_CFG_FLAG_NTF_SUP_MASK         (0x08)\n#define BAS_CFG_FLAG_MTP_BAS_MASK         (0x10)\n\n#define BASS_FLAG_NTF_CFG_BIT             (0x02)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the BASS task\nenum bass_state\n{\n    /// Idle state\n    BASS_IDLE,\n    /// busy state\n    BASS_BUSY,\n    /// Number of defined states.\n    BASS_STATE_MAX\n};\n\n/// Battery Service Attributes Indexes\nenum\n{\n    BAS_IDX_SVC,\n\n    BAS_IDX_BATT_LVL_CHAR,\n    BAS_IDX_BATT_LVL_VAL,\n    BAS_IDX_BATT_LVL_NTF_CFG,\n    BAS_IDX_BATT_LVL_PRES_FMT,\n\n    BAS_IDX_NB,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Battery 'Profile' Server environment variable\nstruct bass_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Battery Level Characteristic Presentation Format - Should not change during connection\n    struct prf_char_pres_fmt batt_level_pres_format[BASS_NB_BAS_INSTANCES_MAX];\n    /// On-going operation\n    struct ke_msg * operation;\n    /// BAS Services Start Handle\n    uint16_t start_hdl;\n    /// Level of the battery\n    uint8_t batt_lvl[BASS_NB_BAS_INSTANCES_MAX];\n    /// BASS task state\n    ke_state_t state[BASS_IDX_MAX];\n    /// Notification configuration of peer devices.\n    uint8_t ntf_cfg[BLE_CONNECTION_MAX];\n    /// Database features\n    uint8_t features;\n    /// Number of BAS\n    uint8_t svc_nb;\n    /// Cursor on connection used to notify peer devices when battery level changes\n    uint8_t cursor;\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve BAS service profile interface\n *\n * @return BAS service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* bass_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Retrieve Attribute handle from service and attribute index\n *\n * @param[in] svc_idx BAS Service index\n * @param[in] att_idx Attribute index\n *\n * @return BAS attribute handle or INVALID HANDLE if nothing found\n ****************************************************************************************\n */\nuint16_t bass_get_att_handle(uint8_t svc_idx, uint8_t att_idx);\n\n/**\n ****************************************************************************************\n * @brief Retrieve Service and attribute index form attribute handle\n *\n * @param[out] handle  Attribute handle\n * @param[out] svc_idx BAS Service index\n * @param[out] att_idx Attribute index\n *\n * @return Success if attribute and service index found, else Application error\n ****************************************************************************************\n */\nuint8_t bass_get_att_idx(uint16_t handle, uint8_t *svc_idx, uint8_t *att_idx);\n\n/**\n ****************************************************************************************\n * @brief  This function fully manage notification of battery level to peer(s) device(s)\n *         according to on-going operation requested by application:\n *            - Modification of Battery Level\n *            - Indicate to a known device that battery level has change\n ****************************************************************************************\n */\nvoid bass_exe_operation(void);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid bass_task_init(struct ke_task_desc *task_desc);\n\n\n#endif /* #if (BLE_BATT_SERVER) */\n\n/// @} BASS\n\n#endif /* _BASS_H_ */\n"
  },
  {
    "path": "services/ble_profiles/bas/bass/src/bass_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup BASSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_BATT_SERVER)\n\n#include \"gap.h\"\n#include \"gattc_task.h\"\n\n#include \"bass.h\"\n#include \"bass_task.h\"\n\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BAPS_ENABLE_REQ message.\n * The handler enables the Battery 'Profile' Server Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int bass_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct bass_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_SAVED;\n  uint8_t state = ke_state_get(dest_id);\n\n  // check state of the task\n  if (state == BASS_IDLE) {\n    struct bass_env_tag *bass_env = PRF_ENV_GET(BASS, bass);\n\n    // Check provided values\n    if ((param->conidx > BLE_CONNECTION_MAX) ||\n        (gapc_get_conhdl(param->conidx) == GAP_INVALID_CONHDL)) {\n      // an error occurs, trigg it.\n      struct bass_enable_rsp *rsp =\n          KE_MSG_ALLOC(BASS_ENABLE_RSP, src_id, dest_id, bass_enable_rsp);\n      rsp->conidx = param->conidx;\n      rsp->status = (param->conidx > BLE_CONNECTION_MAX)\n                        ? GAP_ERR_INVALID_PARAM\n                        : PRF_ERR_REQ_DISALLOWED;\n      ke_msg_send(rsp);\n\n      msg_status = KE_MSG_CONSUMED;\n    } else {\n      // put task in a busy state\n      msg_status = KE_MSG_NO_FREE;\n      ke_state_set(dest_id, BASS_BUSY);\n      bass_env->ntf_cfg[param->conidx] = param->ntf_cfg;\n      bass_env->operation = ke_param2msg(param);\n      bass_env->cursor = 0;\n\n      // trigger notification\n      bass_exe_operation();\n    }\n  }\n\n  return msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BAPS_BATT_LEVEL_SEND_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int bass_batt_level_upd_req_handler(\n    ke_msg_id_t const msgid, struct bass_batt_level_upd_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_SAVED;\n  uint8_t state = ke_state_get(dest_id);\n\n  // check state of the task\n  if (state == BASS_IDLE) {\n    struct bass_env_tag *bass_env = PRF_ENV_GET(BASS, bass);\n\n    // Check provided values\n    if ((param->bas_instance < bass_env->svc_nb) &&\n        (param->batt_level <= BAS_BATTERY_LVL_MAX)) {\n      // update the battery level value\n      bass_env->batt_lvl[param->bas_instance] = param->batt_level;\n\n      // put task in a busy state\n      msg_status = KE_MSG_NO_FREE;\n      ke_state_set(dest_id, BASS_BUSY);\n      bass_env->operation = ke_param2msg(param);\n      bass_env->cursor = 0;\n\n      // trigger notification\n      bass_exe_operation();\n    } else {\n      // an error occurs, trigg it.\n      struct bass_batt_level_upd_rsp *rsp = KE_MSG_ALLOC(\n          BASS_BATT_LEVEL_UPD_RSP, src_id, dest_id, bass_batt_level_upd_rsp);\n\n      rsp->status = PRF_ERR_INVALID_PARAM;\n      ke_msg_send(rsp);\n      msg_status = KE_MSG_CONSUMED;\n    }\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_att_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_att_info_req_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  struct gattc_att_info_cfm *cfm;\n  uint8_t svc_idx = 0, att_idx = 0;\n  // retrieve handle information\n  uint8_t status = bass_get_att_idx(param->handle, &svc_idx, &att_idx);\n\n  // Send write response\n  cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n  cfm->handle = param->handle;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // check if it's a client configuration char\n    if (att_idx == BAS_IDX_BATT_LVL_NTF_CFG) {\n      // CCC attribute length = 2\n      cfm->length = 2;\n    }\n    // not expected request\n    else {\n      cfm->length = 0;\n      status = ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n  }\n\n  cfm->status = status;\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_WRITE_REQ_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  struct gattc_write_cfm *cfm;\n  uint8_t svc_idx = 0, att_idx = 0;\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // retrieve handle information\n  uint8_t status = bass_get_att_idx(param->handle, &svc_idx, &att_idx);\n\n  // If the attribute has been found, status is GAP_ERR_NO_ERROR\n  if (status == GAP_ERR_NO_ERROR) {\n    struct bass_env_tag *bass_env = PRF_ENV_GET(BASS, bass);\n    // Extract value before check\n    uint16_t ntf_cfg = co_read16p(¶m->value[0]);\n\n    // Only update configuration if value for stop or notification enable\n    if ((att_idx == BAS_IDX_BATT_LVL_NTF_CFG) &&\n        ((ntf_cfg == PRF_CLI_STOP_NTFIND) || (ntf_cfg == PRF_CLI_START_NTF))) {\n\n      // Conserve information in environment\n      if (ntf_cfg == PRF_CLI_START_NTF) {\n        // Ntf cfg bit set to 1\n        bass_env->ntf_cfg[conidx] |= (BAS_BATT_LVL_NTF_SUP << svc_idx);\n      } else {\n        // Ntf cfg bit set to 0\n        bass_env->ntf_cfg[conidx] &= ~(BAS_BATT_LVL_NTF_SUP << svc_idx);\n      }\n\n      // Inform APP of configuration change\n      struct bass_batt_level_ntf_cfg_ind *ind =\n          KE_MSG_ALLOC(BASS_BATT_LEVEL_NTF_CFG_IND,\n                       prf_dst_task_get(&(bass_env->prf_env), conidx), dest_id,\n                       bass_batt_level_ntf_cfg_ind);\n      ind->conidx = conidx;\n      ind->ntf_cfg = bass_env->ntf_cfg[conidx];\n\n      ke_msg_send(ind);\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  }\n\n  // Send write response\n  cfm = KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n  cfm->handle = param->handle;\n  cfm->status = status;\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_REQ_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  struct gattc_read_cfm *cfm;\n  uint8_t svc_idx = 0, att_idx = 0;\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // retrieve handle information\n  uint8_t status = bass_get_att_idx(param->handle, &svc_idx, &att_idx);\n  uint16_t length = 0;\n  struct bass_env_tag *bass_env = PRF_ENV_GET(BASS, bass);\n\n  // If the attribute has been found, status is GAP_ERR_NO_ERROR\n  if (status == GAP_ERR_NO_ERROR) {\n    // read notification information\n    if (att_idx == BAS_IDX_BATT_LVL_VAL) {\n      length = sizeof(uint8_t);\n    }\n    // read notification information\n    else if (att_idx == BAS_IDX_BATT_LVL_NTF_CFG) {\n      length = sizeof(uint16_t);\n    } else if (att_idx == BAS_IDX_BATT_LVL_PRES_FMT) {\n      length = PRF_CHAR_PRES_FMT_SIZE;\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  }\n\n  // Send write response\n  cfm =\n      KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, length);\n  cfm->handle = param->handle;\n  cfm->status = status;\n  cfm->length = length;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // read notification information\n    if (att_idx == BAS_IDX_BATT_LVL_VAL) {\n      cfm->value[0] = bass_env->batt_lvl[svc_idx];\n    }\n    // retrieve notification config\n    else if (att_idx == BAS_IDX_BATT_LVL_NTF_CFG) {\n      uint16_t ntf_cfg =\n          (bass_env->ntf_cfg[conidx] >> svc_idx & BAS_BATT_LVL_NTF_SUP)\n              ? PRF_CLI_START_NTF\n              : PRF_CLI_STOP_NTFIND;\n      co_write16p(cfm->value, ntf_cfg);\n    }\n    // retrieve battery level format\n    else if (att_idx == BAS_IDX_BATT_LVL_PRES_FMT) {\n      prf_pack_char_pres_fmt(cfm->value,\n                             &(bass_env->batt_level_pres_format[svc_idx]));\n    } else {\n      /* Not Possible */\n    }\n  }\n\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY message meaning that\n *Measurement notification has been correctly sent to peer device (but not\n *confirmed by peer device).\n * *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  if (param->operation == GATTC_NOTIFY) {\n    // continue operation execution\n    bass_exe_operation();\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(bass){\n    {BASS_ENABLE_REQ, (ke_msg_func_t)bass_enable_req_handler},\n    {BASS_BATT_LEVEL_UPD_REQ, (ke_msg_func_t)bass_batt_level_upd_req_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid bass_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct bass_env_tag *bass_env = PRF_ENV_GET(BASS, bass);\n\n  task_desc->msg_handler_tab = bass_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(bass_msg_handler_tab);\n  task_desc->state = bass_env->state;\n  task_desc->idx_max = BASS_IDX_MAX;\n}\n\n#endif /* #if (BLE_BATT_SERVER) */\n\n/// @} BASSTASK\n"
  },
  {
    "path": "services/ble_profiles/blp/blp_common.h",
    "content": "#ifndef _BLP_COMMON_H_\n#define _BLP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup BLP Blood Pressure Profile\n * @ingroup PROFILE\n * @brief Blood Pressure Profile\n *\n * The BLP module is the responsible block for implementing the Blood Pressure Profile\n * functionalities in the BLE Host.\n *\n * The Blood Pressure Profile defines the functionality required in a device that allows\n * the user (Collector device) to configure and recover blood pressure measurements from\n * a blood pressure device.\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"prf_types.h\"\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///BLPC codes for the 2 possible client configuration characteristic descriptors determination in BPS\nenum\n{\n    ///Blood Pressure Measurement\n    BPS_BP_MEAS_CODE = 0x01,\n    ///Intermediate Cuff Pressure Measurement\n    BPS_INTERM_CP_CODE,\n};\n\n/// Blood Pressure Measurement Flags field bit values\nenum\n{\n    /// pressure in millimetre of mercury\n    BPS_FLAG_MMHG                  = 0x00,\n    /// Pressure in pascal\n    BPS_FLAG_KPA                   = 0x01,\n    /// Time Stamp present\n    BPS_FLAG_TIME_STAMP_PRESENT    = 0x02,\n    /// Pulse Rate present\n    BPS_FLAG_PULSE_RATE_PRESENT    = 0x04,\n    /// User ID present\n    BPS_FLAG_USER_ID_PRESENT       = 0x08,\n    /// Measurement Status present\n    BPS_FLAG_MEAS_STATUS_PRESENT   = 0x10,\n};\n\n/// Blood Pressure Measurement Status Flags field bit values\nenum\n{\n    /// Body Movement Detection Flag\n    /// No body movement\n    BPS_STATE_NO_BODY_MVMT_DETECTED       = 0x0000,\n    /// Body movement during measurement\n    BPS_STATE_BODY_MVMT_DETECTED          = 0x0001,\n\n    /// Cuff Fit Detection Flag\n    /// Cuff fits properly\n    BPS_STATE_CUFF_FITS_PROPERLY          = 0x0000,\n    /// Cuff too loose\n    BPS_STATE_CUFF_TOO_LOOSE              = 0x0002,\n\n    /// Irregular Pulse Detection Flag\n    /// No irregular pulse detected\n    BPS_STATE_NO_IRREGULAR_PULSE_DETECTED = 0x0000,\n    /// Irregular pulse detected\n    BPS_STATE_IRREGULAR_PULSE_DETECTED    = 0x0004,\n\n    /// Pulse Rate Range Detection Flags\n    /// Pulse rate is within the range\n    BPS_STATE_PR_IN_RANGE                 = 0x0000,\n    /// Pulse rate exceeds upper limit\n    BPS_STATE_PR_IN_TOO_HIGH              = 0x0008,\n    /// Pulse rate is less than lower limit\n    BPS_STATE_PR_IN_TOO_LOW               = 0x0010,\n\n    /// Measurement Position Detection Flag\n    /// Proper measurement position\n    BPS_STATE_MEAS_POS_OK                 = 0x0000,\n    /// Improper measurement position\n    BPS_STATE_MEAS_POS_KO                 = 0x0020,\n};\n\n/// Blood Pressure Feature Flags field bit values\nenum\n{\n    ///Body Movement Detection Support bit\n    ///Body Movement Detection feature not supported\n    BPS_F_BODY_MVMT_DETECT_NOT_SUPPORTED         = 0x0000,\n    ///Body Movement Detection feature supported\n    BPS_F_BODY_MVMT_DETECT_SUPPORTED             = 0x0001,\n\n    ///Cuff Fit Detection Support bit\n    ///Cuff Fit Detection feature not supported\n    BPS_F_CUFF_FIT_DETECT_NOT_SUPPORTED          = 0x0000,\n    ///Cuff Fit Detection feature supported\n    BPS_F_CUFF_FIT_DETECT_SUPPORTED              = 0x0002,\n\n    ///Irregular Pulse Detection Support bit\n    ///Irregular Pulse Detection feature not supported\n    BPS_F_IRREGULAR_PULSE_DETECT_NOT_SUPPORTED   = 0x0000,\n    ///Irregular Pulse Detection feature supported\n    BPS_F_IRREGULAR_PULSE_DETECT_SUPPORTED       = 0x0004,\n\n    ///Pulse Rate Range Detection Support bit\n    ///Pulse Rate Range Detection feature not supported\n    BPS_F_PULSE_RATE_RANGE_DETECT_NOT_SUPPORTED  = 0x0000,\n    ///Pulse Rate Range Detection feature supported\n    BPS_F_PULSE_RATE_RANGE_DETECT_SUPPORTED      = 0x0008,\n\n    ///Measurement Position Detection Support bit\n    ///Measurement Position Detection feature not supported\n    BPS_F_MEAS_POS_DETECT_NOT_SUPPORTED          = 0x0000,\n    ///Measurement Position Detection feature supported\n    BPS_F_MEAS_POS_DETECT_SUPPORTED              = 0x0010,\n\n    ///Multiple Bond Support bit\n    ///Multiple Bonds not supported\n    BPS_F_MULTIPLE_BONDS_NOT_SUPPORTED           = 0x0000,\n    ///Multiple Bonds supported\n    BPS_F_MULTIPLE_BONDS_SUPPORTED               = 0x0020,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Blood Pressure measurement structure\nstruct bps_bp_meas\n{\n    /// Flag\n    uint8_t  flags;\n    /// User ID\n    uint8_t  user_id;\n    /// Systolic (mmHg/kPa)\n    prf_sfloat systolic;\n    /// Diastolic (mmHg/kPa)\n    prf_sfloat diastolic;\n    /// Mean Arterial Pressure (mmHg/kPa)\n    prf_sfloat mean_arterial_pressure;\n    /// Pulse Rate\n    prf_sfloat pulse_rate;\n    /// Measurement Status\n    uint16_t meas_status;\n    /// Time stamp\n    struct prf_date_time  time_stamp;\n};\n\n/// @} blp_common\n\n#endif /* _BLP_COMMON_H_ */\n"
  },
  {
    "path": "services/ble_profiles/blp/blpc/api/blpc_task.h",
    "content": "#ifndef _BLPC_TASK_H_\n#define _BLPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup BLPCTASK Blood Pressure Profile Collector Task\n * @ingroup BLPC\n * @brief Blood Pressure Profile Collector Task\n *\n * The BLPCTASK is responsible for handling the messages coming in and out of the\n * @ref BLPC monitor block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n#include \"blp_common.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\nenum\n{\n    /// Start the blood pressure profile - at connection\n    BLPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_BLPC),\n    ///Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    BLPC_ENABLE_RSP,\n\n    /// Generic message to read a BPS or DIS characteristic value\n    BLPC_RD_CHAR_REQ,\n    ///Generic message for read responses for APP\n    BLPC_RD_CHAR_RSP,\n\n    ///Generic message for configuring the 2 characteristics that can be handled\n    BLPC_CFG_INDNTF_REQ,\n    ///Generic message for write characteristic response status to APP\n    BLPC_CFG_INDNTF_RSP,\n\n    /// Blood pressure value send to APP\n    BLPC_BP_MEAS_IND,\n};\n\n/// Characteristics\nenum\n{\n    /// Blood Pressure Measurement\n    BLPC_CHAR_BP_MEAS,\n    /// Intermediate Cuff pressure\n    BLPC_CHAR_CP_MEAS,\n    /// Blood Pressure Feature\n    BLPC_CHAR_BP_FEATURE,\n\n    BLPC_CHAR_MAX,\n};\n\n/// Characteristic descriptors\nenum\n{\n    /// Blood Pressure Measurement client config\n    BLPC_DESC_BP_MEAS_CLI_CFG,\n    /// Intermediate Cuff pressure client config\n    BLPC_DESC_IC_MEAS_CLI_CFG,\n    BLPC_DESC_MAX,\n    BLPC_DESC_MASK = 0x10,\n};\n\n///Structure containing the characteristics handles, value handles and descriptors\nstruct bps_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// characteristic info:\n    ///  - Blood Pressure Measurement\n    ///  - Intermediate Cuff pressure\n    ///  - Blood Pressure Feature\n    struct prf_char_inf chars[BLPC_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - Blood Pressure Measurement client cfg\n    ///  - Intermediate Cuff pressure client cfg\n    struct prf_char_desc_inf descs[BLPC_DESC_MAX];\n};\n\n\n/// Parameters of the @ref BLPC_ENABLE_REQ message\nstruct blpc_enable_req\n{\n    ///Connection type\n    uint8_t con_type;\n    ///Existing handle values bps\n    struct bps_content bps;\n};\n\n/// Parameters of the @ref BLPC_ENABLE_RSP message\nstruct blpc_enable_rsp\n{\n    ///status\n    uint8_t status;\n    ///Existing handle values bps\n    struct bps_content bps;\n};\n\n\n///Parameters of the @ref BLPC_RD_CHAR_REQ message\nstruct blpc_rd_char_req\n{\n    ///Characteristic value code\n    uint8_t  char_code;\n};\n\n///Parameters of the @ref BLPC_RD_CHAR_RSP message\nstruct blpc_rd_char_rsp\n{\n    /// Attribute data information\n    struct prf_att_info info;\n};\n\n///Parameters of the @ref BLPC_CFG_INDNTF_REQ message\nstruct blpc_cfg_indntf_req\n{\n    ///Own code for differentiating between blood pressure and\n    ///intermediate cuff pressure measurements\n    uint8_t char_code;\n    ///Stop/notify/indicate value to configure into the peer characteristic\n    uint16_t cfg_val;\n};\n\n///Parameters of the @ref BLPC_CFG_INDNTF_RSP message\nstruct blpc_cfg_indntf_rsp\n{\n    ///Status\n    uint8_t  status;\n};\n\n///Parameters of the @ref BLPC_BP_MEAS_IND message\nstruct blpc_bp_meas_ind\n{\n    /// Flag indicating if it is a intermediary cuff pressure measurement (0) or\n    /// stable blood pressure measurement (1).\n    uint16_t flag_interm_cp;\n    ///Blood Pressure measurement\n    struct bps_bp_meas meas_val;\n};\n\n/// @} BLPCTASK\n\n#endif /* _BLPC_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/blp/blpc/src/blpc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup BLPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_BP_COLLECTOR)\n#include \"blpc.h\"\n#include \"blpc_task.h\"\n#include \"gap.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the BLPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t blpc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct blpc_env_tag *blpc_env = (struct blpc_env_tag *)ke_malloc(\n      sizeof(struct blpc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate BLPC required environment variable\n  env->env = (prf_env_t *)blpc_env;\n\n  blpc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  blpc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_BLPC;\n  blpc_task_init(&(env->desc));\n\n  for (idx = 0; idx < BLPC_IDX_MAX; idx++) {\n    blpc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), BLPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void blpc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct blpc_env_tag *blpc_env = (struct blpc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (blpc_env->env[conidx] != NULL) {\n    ke_free(blpc_env->env[conidx]);\n    blpc_env->env[conidx] = NULL;\n  }\n\n  /* Put BLP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), BLPC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the BLPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void blpc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct blpc_env_tag *blpc_env = (struct blpc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < BLPC_IDX_MAX; idx++) {\n    blpc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(blpc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void blpc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put BLP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), BLPC_IDLE);\n}\n\n/// BLPC Task interface required by profile manager\nconst struct prf_task_cbs blpc_itf = {\n    blpc_init,\n    blpc_destroy,\n    blpc_create,\n    blpc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *blpc_prf_itf_get(void) { return &blpc_itf; }\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nvoid blpc_enable_rsp_send(struct blpc_env_tag *blpc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Send to APP the details of the discovered attributes on BLPS\n  struct blpc_enable_rsp *rsp = KE_MSG_ALLOC(\n      BLPC_ENABLE_RSP, prf_dst_task_get(&(blpc_env->prf_env), conidx),\n      prf_src_task_get(&(blpc_env->prf_env), conidx), blpc_enable_rsp);\n\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->bps = blpc_env->env[conidx]->bps;\n\n    prf_register_atthdl2gatt(&(blpc_env->prf_env), conidx,\n                             &(blpc_env->env[conidx]->bps.svc));\n\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(blpc_env->prf_env), conidx), BLPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nvoid blpc_unpack_meas_value(struct bps_bp_meas *pmeas_val, uint8_t *packed_bp) {\n  uint8_t cursor;\n\n  // blood pressure measurement flags\n  pmeas_val->flags = packed_bp[0];\n\n  // Blood Pressure Measurement Compound Value - Systolic\n  pmeas_val->systolic = co_read16p(&(packed_bp[1]));\n\n  // Blood Pressure Measurement Compound Value - Diastolic (mmHg)\n  pmeas_val->diastolic = co_read16p(&(packed_bp[3]));\n\n  //  Blood Pressure Measurement Compound Value - Mean Arterial Pressure (mmHg)\n  pmeas_val->mean_arterial_pressure = co_read16p(&(packed_bp[5]));\n\n  cursor = 7;\n\n  // time flag set\n  if ((pmeas_val->flags & BPS_FLAG_TIME_STAMP_PRESENT) ==\n      BPS_FLAG_TIME_STAMP_PRESENT) {\n    cursor +=\n        prf_unpack_date_time(packed_bp + cursor, &(pmeas_val->time_stamp));\n  }\n\n  // pulse rate flag set\n  if ((pmeas_val->flags & BPS_FLAG_PULSE_RATE_PRESENT) ==\n      BPS_FLAG_PULSE_RATE_PRESENT) {\n    pmeas_val->pulse_rate = co_read16p(&(packed_bp[cursor + 0]));\n    cursor += 2;\n  }\n\n  // User ID flag set\n  if ((pmeas_val->flags & BPS_FLAG_USER_ID_PRESENT) ==\n      BPS_FLAG_USER_ID_PRESENT) {\n    pmeas_val->user_id = packed_bp[cursor + 0];\n    cursor += 1;\n  }\n\n  // measurement status flag set\n  if ((pmeas_val->flags & BPS_FLAG_MEAS_STATUS_PRESENT) ==\n      BPS_FLAG_MEAS_STATUS_PRESENT) {\n    pmeas_val->meas_status = co_read16p(&(packed_bp[cursor + 0]));\n    cursor += 2;\n  }\n}\n\n#endif /* (BLE_BP_COLLECTOR) */\n\n/// @} BLPC\n"
  },
  {
    "path": "services/ble_profiles/blp/blpc/src/blpc.h",
    "content": "#ifndef _BLPC_H_\n#define _BLPC_H_\n\n\n/**\n ****************************************************************************************\n * @addtogroup BLPC Blood Pressure Profile Collector\n * @ingroup BLP\n * @brief Blood Pressure Profile Collector\n *\n * The BLPC is responsible for providing Blood Pressure Profile Collector functionalities\n * to upper layer module or application. The device using this profile takes the role\n * of Blood Pressure Profile Collector.\n *\n * Blood Pressure Profile Collector. (BLPC): A BLPC (e.g. PC, phone, etc)\n * is the term used by this profile to describe a device that can interpret blood pressure\n * measurement in a way suitable to the user application.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_BP_COLLECTOR)\n\n#include \"blpc_task.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of Blood Pressure Collector task instances\n#define BLPC_IDX_MAX    (BLE_CONNECTION_MAX)\n\n/// Possible states of the BLPC task\nenum\n{\n    /// Free state\n    BLPC_FREE,\n    /// IDLE state\n    BLPC_IDLE,\n    /// Discovering Blood Pressure SVC and CHars\n    BLPC_DISCOVERING,\n    /// Busy state\n    BLPC_BUSY,\n\n    /// Number of defined states.\n    BLPC_STATE_MAX\n};\n\n/// Internal codes for reading a BPS or DIS characteristic with one single request\nenum\n{\n    ///Read BPS Blood pressure Measurement\n    BLPC_RD_BPS_BP_MEAS          = BLPC_CHAR_BP_MEAS,\n    ///Read BPS Intermdiate Cuff Pressure\n    BLPC_RD_BPS_CP_MEAS          = BLPC_CHAR_CP_MEAS,\n    ///Read BPS Blood pressure Features\n    BLPC_RD_BPS_FEATURE          = BLPC_CHAR_BP_FEATURE,\n\n    ///Read BPS Blood pressure Measurement Client Cfg. Desc\n    BLPC_RD_BPS_BP_MEAS_CFG      = (BLPC_DESC_MASK | BLPC_DESC_BP_MEAS_CLI_CFG),\n    ///Read BPS Intermdiate Cuff Pressure Client Cfg. Desc\n    BLPC_RD_BPS_CP_MEAS_CFG      = (BLPC_DESC_MASK | BLPC_DESC_IC_MEAS_CLI_CFG),\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\nstruct blpc_cnx_env\n{\n    /// Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// Last characteristic code used in a read or a write request\n    uint16_t last_char_code;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// Current operation code\n    uint8_t operation;\n    ///HTS characteristics\n    struct bps_content bps;\n};\n\n/// Blood Pressure Profile Collector environment variable\nstruct blpc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct blpc_cnx_env* env[BLPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[BLPC_IDX_MAX];\n};\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve BLP client profile interface\n * @return BLP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* blpc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Blood Pressure ATT DB discovery results to BLPC host.\n ****************************************************************************************\n */\nvoid blpc_enable_rsp_send(struct blpc_env_tag *blpc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Unpack Blood pressure measurement data into a comprehensive structure.\n *\n * @param[out] pmeas_val  Pointer to Blood pressure measurement structure destination\n * @param[in] packed_bp   Pointer of the packed data of Blood Pressure Measurement\n *                        information\n ****************************************************************************************\n */\nvoid blpc_unpack_meas_value(struct bps_bp_meas* pmeas_val, uint8_t* packed_bp);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid blpc_task_init(struct ke_task_desc *task_desc);\n\n\n#endif /* (BLE_BP_COLLECTOR) */\n\n/// @} BLPC\n\n#endif /* _BLPC_H_ */\n"
  },
  {
    "path": "services/ble_profiles/blp/blpc/src/blpc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup BLPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_BP_COLLECTOR)\n#include \"att.h\"\n#include \"blpc.h\"\n#include \"blpc_task.h\"\n#include \"co_utils.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"ke_mem.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve blood pressure service characteristics\n/// information\nconst struct prf_char_def blpc_bps_char[BLPC_CHAR_MAX] = {\n    /// Blood Pressure Measurement\n    [BLPC_CHAR_BP_MEAS] = {ATT_CHAR_BLOOD_PRESSURE_MEAS, ATT_MANDATORY,\n                           ATT_CHAR_PROP_IND},\n    /// Intermediate Cuff pressure\n    [BLPC_CHAR_CP_MEAS] = {ATT_CHAR_INTERMEDIATE_CUFF_PRESSURE, ATT_OPTIONAL,\n                           ATT_CHAR_PROP_NTF},\n    /// Blood Pressure Feature\n    [BLPC_CHAR_BP_FEATURE] = {ATT_CHAR_BLOOD_PRESSURE_FEATURE, ATT_MANDATORY,\n                              ATT_CHAR_PROP_RD},\n};\n\n/// State machine used to retrieve blood pressure service characteristic\n/// description information\nconst struct prf_char_desc_def blpc_bps_char_desc[BLPC_DESC_MAX] = {\n    /// Blood Pressure Measurement client config\n    [BLPC_DESC_BP_MEAS_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                   BLPC_CHAR_BP_MEAS},\n    /// Intermediate Cuff pressure client config\n    [BLPC_DESC_IC_MEAS_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                   BLPC_CHAR_CP_MEAS},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == BLPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct blpc_env_tag *blpc_env = PRF_ENV_GET(BLPC, blpc);\n\n    ASSERT_INFO(blpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(blpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (blpc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve BLS characteristics and descriptors\n      prf_extract_svc_info(ind, BLPC_CHAR_MAX, &blpc_bps_char[0],\n                           &blpc_env->env[conidx]->bps.chars[0], BLPC_DESC_MAX,\n                           &blpc_bps_char_desc[0],\n                           &blpc_env->env[conidx]->bps.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      blpc_env->env[conidx]->bps.svc.shdl = ind->start_hdl;\n      blpc_env->env[conidx]->bps.svc.ehdl = ind->end_hdl;\n    }\n\n    blpc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BLPC_ENABLE_REQ message.\n * The handler enables the Blood Pressure Profile Collector Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int blpc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct blpc_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get state\n  uint8_t state = ke_state_get(dest_id);\n\n  // Blood pressure Client Role Task Environment\n  struct blpc_env_tag *blpc_env = PRF_ENV_GET(BLPC, blpc);\n\n  ASSERT_INFO(blpc_env != NULL, dest_id, src_id);\n  if ((state == BLPC_IDLE) && (blpc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    blpc_env->env[conidx] = (struct blpc_cnx_env *)ke_malloc(\n        sizeof(struct blpc_cnx_env), KE_MEM_ATT_DB);\n    memset(blpc_env->env[conidx], 0, sizeof(struct blpc_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering BPS on peer\n      prf_disc_svc_send(&(blpc_env->prf_env), conidx, ATT_SVC_BLOOD_PRESSURE);\n\n      blpc_env->env[conidx]->last_uuid_req = ATT_SVC_BLOOD_PRESSURE;\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, BLPC_DISCOVERING);\n    }\n    // normal connection, get saved att details\n    else {\n      blpc_env->env[conidx]->bps = param->bps;\n\n      // send APP confirmation that can start normal connection to TH\n      blpc_enable_rsp_send(blpc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  }\n\n  else if (state != BLPC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    blpc_enable_rsp_send(blpc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n\n  // Get the address of the environment\n  struct blpc_env_tag *blpc_env = PRF_ENV_GET(BLPC, blpc);\n  // Status\n  uint8_t status;\n\n  if (blpc_env != NULL) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    uint8_t state = ke_state_get(dest_id);\n\n    if (state == BLPC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (blpc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity(\n              BLPC_CHAR_MAX, blpc_env->env[conidx]->bps.chars, blpc_bps_char);\n        }\n        // too much services\n        else if (blpc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              BLPC_DESC_MAX, blpc_env->env[conidx]->bps.descs,\n              blpc_bps_char_desc, blpc_env->env[conidx]->bps.chars);\n        }\n      }\n\n      blpc_enable_rsp_send(blpc_env, conidx, status);\n    }\n\n    else if (BLPC_BUSY) {\n      switch (param->operation) {\n\n      case GATTC_WRITE:\n      case GATTC_WRITE_NO_RESPONSE: {\n        struct blpc_cfg_indntf_rsp *wr_cfm = KE_MSG_ALLOC(\n            BLPC_CFG_INDNTF_RSP, prf_dst_task_get(&(blpc_env->prf_env), conidx),\n            prf_src_task_get(&(blpc_env->prf_env), conidx),\n            blpc_cfg_indntf_rsp);\n        // it will be a GATT status code\n        wr_cfm->status = param->status;\n        // send the message\n        ke_msg_send(wr_cfm);\n      } break;\n\n      case GATTC_READ: {\n        if (param->status != GAP_ERR_NO_ERROR) {\n          prf_client_att_info_rsp((prf_env_t *)blpc_env->env[conidx], conidx,\n                                  BLPC_RD_CHAR_RSP, param->status, NULL);\n        }\n      } break;\n\n      default:\n        break;\n      }\n\n      ke_state_set(prf_src_task_get(&blpc_env->prf_env, conidx), BLPC_IDLE);\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BLPC_RD_CHAR_REQ message.\n * Check if the handle exists in profile(already discovered) and send request,\n *otherwise error to APP.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int blpc_rd_char_req_handler(ke_msg_id_t const msgid,\n                                      struct blpc_rd_char_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  // Get the address of the environment\n  struct blpc_env_tag *blpc_env = PRF_ENV_GET(BLPC, blpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if ((state == BLPC_IDLE) && (blpc_env->env[conidx] != NULL)) {\n    uint16_t search_hdl = ATT_INVALID_SEARCH_HANDLE;\n\n    if ((param->char_code & BLPC_DESC_MASK) == BLPC_DESC_MASK) {\n      search_hdl = blpc_env->env[conidx]\n                       ->bps.descs[param->char_code & ~BLPC_DESC_MASK]\n                       .desc_hdl;\n    } else {\n      search_hdl = blpc_env->env[conidx]->bps.chars[param->char_code].val_hdl;\n    }\n\n    // check if handle is viable\n    if (search_hdl != ATT_INVALID_SEARCH_HANDLE) {\n      prf_read_char_send(&(blpc_env->prf_env), conidx,\n                         blpc_env->env[conidx]->bps.svc.shdl,\n                         blpc_env->env[conidx]->bps.svc.ehdl, search_hdl);\n\n      status = GAP_ERR_NO_ERROR;\n    } else {\n      status = PRF_ERR_INEXISTENT_HDL;\n    }\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    prf_client_att_info_rsp((prf_env_t *)blpc_env->env[conidx], conidx,\n                            BLPC_RD_CHAR_RSP, status, NULL);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct blpc_env_tag *blpc_env = PRF_ENV_GET(BLPC, blpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  prf_client_att_info_rsp(&blpc_env->prf_env, conidx, BLPC_RD_CHAR_RSP,\n                          GAP_ERR_NO_ERROR, param);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BLPC_CFG_INDNTF_REQ message.\n * It allows configuration of the peer ind/ntf/stop characteristic for a\n *specified characteristic. Will return an error code if that cfg char does not\n *exist.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int blpc_cfg_indntf_req_handler(\n    ke_msg_id_t const msgid, struct blpc_cfg_indntf_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint16_t cfg_hdl = ATT_INVALID_SEARCH_HANDLE;\n  // Get the address of the environment\n  struct blpc_env_tag *blpc_env = PRF_ENV_GET(BLPC, blpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if ((blpc_env->env[conidx] != NULL) && (ke_state_get(dest_id) == BLPC_IDLE)) {\n    status = PRF_ERR_INVALID_PARAM;\n    // get handle of the configuration characteristic to set and check if value\n    // matches property\n    switch (param->char_code) {\n    case BLPC_CHAR_BP_MEAS: // can only IND\n    {\n      if ((param->cfg_val == PRF_CLI_STOP_NTFIND) ||\n          (param->cfg_val == PRF_CLI_START_IND)) {\n        cfg_hdl = blpc_env->env[conidx]\n                      ->bps.descs[BLPC_DESC_BP_MEAS_CLI_CFG]\n                      .desc_hdl;\n      }\n    } break;\n\n    case BLPC_CHAR_CP_MEAS: // can only NTF\n    {\n      if ((param->cfg_val == PRF_CLI_STOP_NTFIND) ||\n          (param->cfg_val == PRF_CLI_START_NTF)) {\n        cfg_hdl = blpc_env->env[conidx]\n                      ->bps.descs[BLPC_DESC_IC_MEAS_CLI_CFG]\n                      .desc_hdl;\n      }\n\n    } break;\n\n    default: {\n      status = PRF_ERR_INEXISTENT_HDL;\n    } break;\n    }\n\n    // check if the handle value exists\n    if (cfg_hdl != ATT_INVALID_SEARCH_HANDLE) {\n      // Send GATT Write Request\n      prf_gatt_write_ntf_ind(&blpc_env->prf_env, conidx, cfg_hdl,\n                             param->cfg_val);\n      // Set status\n      status = GAP_ERR_NO_ERROR;\n    }\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    struct blpc_cfg_indntf_rsp *rsp =\n        KE_MSG_ALLOC(BLPC_CFG_INDNTF_RSP, src_id, dest_id, blpc_cfg_indntf_rsp);\n\n    // It will be an PRF status code\n    rsp->status = status;\n\n    // Send the message\n    ke_msg_send(rsp);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct blpc_env_tag *blpc_env = PRF_ENV_GET(BLPC, blpc);\n\n  if (blpc_env->env[conidx] != NULL) {\n    switch (param->type) {\n    case GATTC_INDICATE: {\n      // confirm that indication has been correctly received\n      struct gattc_event_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n      cfm->handle = param->handle;\n      ke_msg_send(cfm);\n    }\n      /* no break */\n\n    case GATTC_NOTIFY: {\n      if ((param->handle ==\n           blpc_env->env[conidx]->bps.chars[BLPC_CHAR_CP_MEAS].val_hdl) ||\n          ((param->handle ==\n            blpc_env->env[conidx]->bps.chars[BLPC_CHAR_BP_MEAS].val_hdl))) {\n        // build a BLPC_BP_MEAD_IND message with stable blood pressure value\n        // code.\n        struct blpc_bp_meas_ind *ind = KE_MSG_ALLOC(\n            BLPC_BP_MEAS_IND, prf_dst_task_get(&(blpc_env->prf_env), conidx),\n            prf_src_task_get(&(blpc_env->prf_env), conidx), blpc_bp_meas_ind);\n\n        // Intermediate cuff pressure value\n        ind->flag_interm_cp = ((param->type == GATTC_NOTIFY) ? 0x01 : 0x00);\n\n        // unpack blood pressure measurement.\n        blpc_unpack_meas_value(&(ind->meas_val), (uint8_t *)param->value);\n\n        ke_msg_send(ind);\n      }\n    } break;\n\n    default:\n      break;\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(blpc){\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {BLPC_ENABLE_REQ, (ke_msg_func_t)blpc_enable_req_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {BLPC_RD_CHAR_REQ, (ke_msg_func_t)blpc_rd_char_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_EVENT_REQ_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {BLPC_CFG_INDNTF_REQ, (ke_msg_func_t)blpc_cfg_indntf_req_handler},\n};\n\nvoid blpc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct blpc_env_tag *blpc_env = PRF_ENV_GET(BLPC, blpc);\n\n  task_desc->msg_handler_tab = blpc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(blpc_msg_handler_tab);\n  task_desc->state = blpc_env->state;\n  task_desc->idx_max = BLPC_IDX_MAX;\n}\n\n#endif /* (BLE_BP_COLLECTOR) */\n/// @} BLPCTASK\n"
  },
  {
    "path": "services/ble_profiles/blp/blps/api/blps_task.h",
    "content": "#ifndef _BLPS_TASK_H_\n#define _BLPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup BLPSTASK Task\n * @ingroup BLPS\n * @brief Blood Pressure Profile Task.\n *\n * The BLPSTASK is responsible for handling the messages coming in and out of the\n * @ref BLPS collector block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n#include \"blp_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\nenum\n{\n    /// measurement sent by profile\n    BLPS_BP_MEAS_SEND,\n    /// peer device confirm reception\n    BLPS_CENTRAL_IND_CFM,\n};\n\n/// Messages for Blood Pressure Profile Sensor\nenum\n{\n    ///Start the Blood Pressure Profile Sensor - at connection\n    BLPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_BLPS),\n    /// Start the Blood Pressure Profile Sensor - at connection\n    BLPS_ENABLE_RSP,\n\n    ///Send blood pressure measurement value from APP\n    BLPS_MEAS_SEND_REQ,\n    ///Send blood pressure measurement value confirm to APP so stable values can be erased\n    BLPS_MEAS_SEND_RSP,\n\n    ///Inform APP of new configuration value\n    BLPS_CFG_INDNTF_IND,\n};\n\n/// Parameters of the @ref BLPS_ENABLE_REQ message\nstruct blps_enable_req\n{\n    ///Connection index\n    uint8_t conidx;\n\n    /// Blood Pressure indication configuration\n    uint16_t bp_meas_ind_en;\n    /// Intermediate Cuff Pressure Notification configuration\n    uint16_t interm_cp_ntf_en;\n};\n\n/// Parameters of the @ref BLPS_ENABLE_RSP message\nstruct blps_enable_rsp\n{\n    ///Connection index\n    uint8_t conidx;\n    ///Status\n    uint8_t status;\n};\n\n///Parameters of the @ref BLPS_CFG_INDNTF_IND message\nstruct blps_cfg_indntf_ind\n{\n    ///Connection index\n    uint8_t conidx;\n    ///Own code for differentiating between Blood Pressure Measurement, and Intermediate\n    /// Cuff Pressure Measurement characteristics\n    uint8_t char_code;\n    ///Stop/notify/indicate value to configure into the peer characteristic\n    uint16_t cfg_val;\n};\n\n/////Parameters of the @ref BLPS_MEAS_SEND_REQ message\nstruct blps_meas_send_req\n{\n    ///Connection index\n    uint8_t conidx;\n    /// Flag indicating if it is a intermediary cuff pressure measurement (0) or\n    /// stable blood pressure measurement (1).\n    uint8_t flag_interm_cp;\n    ///Blood Pressure measurement\n    struct bps_bp_meas meas_val;\n};\n\n///Parameters of the @ref BLPS_MEAS_SEND_RSP message\nstruct blps_meas_send_rsp\n{\n    ///Connection index\n    uint8_t conidx;\n    ///Status\n    uint8_t status;\n};\n\n///Parameters of the @ref BLPS_CREATE_DB_REQ message\nstruct blps_db_cfg\n{\n    /// Supported features\n    uint16_t features;\n    /// Profile Configuration\n    uint8_t prfl_cfg;\n};\n\n/// @} BLPSTASK\n\n#endif /* _BLPS_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/blp/blps/src/blps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup BLPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_BP_SENSOR)\n#include \"blps.h\"\n#include \"blps_task.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * BLPS PROFILE ATTRIBUTES\n ****************************************************************************************\n */\n\n/// Full BLPS Database Description - Used to add attributes into the database\nconst struct attm_desc blps_att_db[BPS_IDX_NB] = {\n    // Blood Pressure Service Declaration\n    [BPS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Blood Pressure Measurement Characteristic Declaration\n    [BPS_IDX_BP_MEAS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // Blood Pressure Measurement Characteristic Value\n    [BPS_IDX_BP_MEAS_VAL] = {ATT_CHAR_BLOOD_PRESSURE_MEAS, PERM(IND, ENABLE),\n                             PERM(RI, ENABLE), BLPS_BP_MEAS_MAX_LEN},\n    // Blood Pressure Measurement Characteristic - Client Characteristic\n    // Configuration Descriptor\n    [BPS_IDX_BP_MEAS_IND_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                 PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                 0},\n\n    // Blood Pressure Feature Characteristic Declaration\n    [BPS_IDX_BP_FEATURE_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                 0},\n    // Blood Pressure Feature Characteristic Value\n    [BPS_IDX_BP_FEATURE_VAL] = {ATT_CHAR_BLOOD_PRESSURE_FEATURE,\n                                PERM(RD, ENABLE), PERM(RI, ENABLE),\n                                sizeof(uint16_t)},\n\n    // Intermediate Cuff Pressure Characteristic Declaration\n    [BPS_IDX_INTM_CUFF_PRESS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                      0, 0},\n    // Intermediate Cuff Pressure Characteristic Value\n    [BPS_IDX_INTM_CUFF_PRESS_VAL] = {ATT_CHAR_INTERMEDIATE_CUFF_PRESSURE,\n                                     PERM(NTF, ENABLE), PERM(RI, ENABLE),\n                                     BLPS_BP_MEAS_MAX_LEN},\n    // Intermediate Cuff Pressure Characteristic - Client Characteristic\n    // Configuration Descriptor\n    [BPS_IDX_INTM_CUFF_PRESS_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                         PERM(RD, ENABLE) |\n                                             PERM(WRITE_REQ, ENABLE),\n                                         0, 0},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the BLPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t blps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct blps_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n  // Service content flag\n  uint32_t cfg_flag = BLPS_MANDATORY_MASK;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  // Set Configuration Flag Value\n  if (params->prfl_cfg & BLPS_INTM_CUFF_PRESS_SUP) {\n    cfg_flag |= BLPS_INTM_CUFF_PRESS_MASK;\n  }\n\n  // Add service in the database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_BLOOD_PRESSURE, (uint8_t *)&cfg_flag, BPS_IDX_NB, NULL,\n      env->task, &blps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate BLPS required environment variable\n    struct blps_env_tag *blps_env = (struct blps_env_tag *)ke_malloc(\n        sizeof(struct blps_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize BLPS environment\n    env->env = (prf_env_t *)blps_env;\n    blps_env->shdl = *start_hdl;\n    blps_env->features = params->features;\n    blps_env->prfl_cfg = params->prfl_cfg;\n\n    blps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Multi Instantiated task\n    blps_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_BLPS;\n    blps_task_init(&(env->desc));\n\n    memset(blps_env->prfl_ntf_ind_cfg, 0, BLE_CONNECTION_MAX);\n\n    /* Put BLS in disabled state */\n    ke_state_set(env->task, BLPS_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the BLPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void blps_destroy(struct prf_task_env *env) {\n  struct blps_env_tag *blps_env = (struct blps_env_tag *)env->env;\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(blps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void blps_create(struct prf_task_env *env, uint8_t conidx) {\n  struct blps_env_tag *blps_env = (struct blps_env_tag *)env->env;\n  blps_env->prfl_ntf_ind_cfg[conidx] = 0;\n\n  /* Put BLS in idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), BLPS_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void blps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct blps_env_tag *blps_env = (struct blps_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  blps_env->prfl_ntf_ind_cfg[conidx] = 0;\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// BLPS Task interface required by profile manager\nconst struct prf_task_cbs blps_itf = {\n    (prf_init_fnct)blps_init,\n    blps_destroy,\n    blps_create,\n    blps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *blps_prf_itf_get(void) { return &blps_itf; }\n\nuint8_t blps_pack_meas_value(uint8_t *packed_bp,\n                             const struct bps_bp_meas *pmeas_val) {\n  uint8_t cursor;\n\n  *(packed_bp) = pmeas_val->flags;\n\n  // Blood Pressure Measurement Compound Value - Systolic\n  co_write16p(packed_bp + 1, pmeas_val->systolic);\n\n  // Blood Pressure Measurement Compound Value - Diastolic (mmHg)\n  co_write16p(packed_bp + 3, pmeas_val->diastolic);\n\n  //  Blood Pressure Measurement Compound Value - Mean Arterial Pressure (mmHg)\n  co_write16p(packed_bp + 5, pmeas_val->mean_arterial_pressure);\n\n  cursor = 7;\n\n  // time flag set\n  if ((pmeas_val->flags & BPS_FLAG_TIME_STAMP_PRESENT) ==\n      BPS_FLAG_TIME_STAMP_PRESENT) {\n    cursor += prf_pack_date_time(packed_bp + cursor, &(pmeas_val->time_stamp));\n  }\n\n  // Pulse rate flag set\n  if ((pmeas_val->flags & BPS_FLAG_PULSE_RATE_PRESENT) ==\n      BPS_FLAG_PULSE_RATE_PRESENT) {\n    co_write16p(packed_bp + cursor, pmeas_val->pulse_rate);\n    cursor += 2;\n  }\n\n  // User ID flag set\n  if ((pmeas_val->flags & BPS_FLAG_USER_ID_PRESENT) ==\n      BPS_FLAG_USER_ID_PRESENT) {\n    *(packed_bp + cursor) = pmeas_val->user_id;\n    cursor += 1;\n  }\n\n  // Measurement status flag set\n  if ((pmeas_val->flags & BPS_FLAG_MEAS_STATUS_PRESENT) ==\n      BPS_FLAG_MEAS_STATUS_PRESENT) {\n    co_write16p(packed_bp + cursor, pmeas_val->meas_status);\n    cursor += 2;\n  }\n\n  // clear unused packet data\n  if (cursor < BLPS_BP_MEAS_MAX_LEN) {\n    memset(packed_bp + cursor, 0, BLPS_BP_MEAS_MAX_LEN - cursor);\n  }\n\n  return cursor;\n}\n\nvoid blps_meas_send_rsp_send(uint8_t conidx, uint8_t status) {\n  // Get the address of the environment\n  struct blps_env_tag *blps_env = PRF_ENV_GET(BLPS, blps);\n\n  struct blps_meas_send_rsp *rsp = KE_MSG_ALLOC(\n      BLPS_MEAS_SEND_RSP, prf_dst_task_get(&blps_env->prf_env, conidx),\n      prf_src_task_get(&blps_env->prf_env, conidx), blps_meas_send_rsp);\n\n  rsp->conidx = conidx;\n  rsp->status = status;\n\n  ke_msg_send(rsp);\n}\n\n#endif /* BLE_BP_SENSOR */\n\n/// @} BLPS\n"
  },
  {
    "path": "services/ble_profiles/blp/blps/src/blps.h",
    "content": "#ifndef _BLPS_H_\n#define _BLPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup BLPS Blood Pressure Profile Sensor\n * @ingroup BLP\n * @brief Blood Pressure Profile Sensor\n *\n * Blood pressure sensor (BPS) profile provides functionalities to upper layer module\n * application. The device using this profile takes the role of Blood pressure sensor.\n *\n * The interface of this role to the Application is:\n *  - Enable the profile role (from APP)\n *  - Disable the profile role (from APP)\n *  - Notify peer device during Blood Pressure measurement (from APP)\n *  - Indicate measurements performed to peer device (from APP)\n *\n * Profile didn't manages multiple users configuration and storage of offline measurements.\n * This must be handled by application.\n *\n * Blood Pressure Profile Sensor. (BLPS): A BLPS (e.g. PC, phone, etc)\n * is the term used by this profile to describe a device that can perform blood pressure\n * measurement and notify about on-going measurement and indicate final result to a peer\n * BLE device.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"blp_common.h\"\n\n#if (BLE_BP_SENSOR)\n\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"blps_task.h\"\n#include \"attm.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n///Maximum number of Blood Pressure task instances\n#define BLPS_IDX_MAX     0x01\n\n/// Maximum notification length\n#define BLPS_BP_MEAS_MAX_LEN            (19)\n\n///BPS Configuration Flag Masks\n#define BLPS_MANDATORY_MASK              (0x003F)\n#define BLPS_INTM_CUFF_PRESS_MASK        (0x01C0)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/// Possible states of the BLPS task\nenum\n{\n    /// Idle state\n    BLPS_IDLE,\n    /// Busy state\n    BLPS_BUSY,\n\n    /// Number of defined states.\n    BLPS_STATE_MAX\n};\n\n\n#define BLPS_IS_SUPPORTED(mask) \\\n    (((blps_env->prfl_cfg & mask) == mask))\n\n#define BLPS_IS_ENABLED(mask, conidx) \\\n    (((blps_env->prfl_ntf_ind_cfg[conidx] & mask) == mask))\n\n///Attributes State Machine\nenum\n{\n    BPS_IDX_SVC,\n\n    BPS_IDX_BP_MEAS_CHAR,\n    BPS_IDX_BP_MEAS_VAL,\n    BPS_IDX_BP_MEAS_IND_CFG,\n\n    BPS_IDX_BP_FEATURE_CHAR,\n    BPS_IDX_BP_FEATURE_VAL,\n\n    BPS_IDX_INTM_CUFF_PRESS_CHAR,\n    BPS_IDX_INTM_CUFF_PRESS_VAL,\n    BPS_IDX_INTM_CUFF_PRESS_NTF_CFG,\n\n    BPS_IDX_NB,\n};\n\n///Characteristic Codes\nenum\n{\n    BPS_BP_MEAS_CHAR,\n    BPS_INTM_CUFF_MEAS_CHAR,\n    BPS_BP_FEATURE_CHAR,\n};\n\n///Database Configuration Bit Field Flags\nenum\n{\n    /// support of Intermediate Cuff Pressure\n    BLPS_INTM_CUFF_PRESS_SUP        = 0x01,\n};\n\n/// Indication/notification configuration (put in feature flag to optimize memory usage)\nenum\n{\n    /// Bit used to know if blood pressure measurement indication is enabled\n    BLPS_BP_MEAS_IND_CFG            = 0x02,\n    /// Bit used to know if cuff pressure measurement notification is enabled\n    BLPS_INTM_CUFF_PRESS_NTF_CFG    = 0x04,\n    /// indication/notification config mask\n    BLPS_NTFIND_MASK                = 0x06,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Blood Pressure Profile Sensor environment variable per connection\nstruct blps_cnx_env\n{\n    /// Profile Notify/Indication Flags\n    uint8_t prfl_ntf_ind_cfg;\n};\n\n/// Blood Pressure Profile Sensor environment variable\nstruct blps_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Blood Pressure Service Start Handle\n    uint16_t shdl;\n    /// Feature Configuration Flags\n    uint16_t features;\n    /// Profile configuration flags\n    uint8_t prfl_cfg;\n    /// Event (notification/indication) config\n    uint8_t evt_cfg;\n    /// Environment variable pointer for each connections\n    uint8_t prfl_ntf_ind_cfg[BLE_CONNECTION_MAX];\n    /// State of different task instances\n    ke_state_t state[BLPS_IDX_MAX];\n};\n\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve BLP service profile interface\n *\n * @return BLP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* blps_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Pack Blood Pressure measurement value\n *\n * @param p_meas_val Blood Pressure measurement value\n *\n * @return size of packed value\n ****************************************************************************************\n */\nuint8_t blps_pack_meas_value(uint8_t *packed_bp, const struct bps_bp_meas* pmeas_val);\n\n/**\n ****************************************************************************************\n * @brief Send a BLPS_MEAS_SEND_RSP to the application\n ****************************************************************************************\n */\nvoid blps_meas_send_rsp_send(uint8_t conidx, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid blps_task_init(struct ke_task_desc *task_desc);\n\n\n#endif /* #if (BLE_BP_SENSOR) */\n\n/// @} BLPS\n\n#endif /* _BLPS_H_ */\n"
  },
  {
    "path": "services/ble_profiles/blp/blps/src/blps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup BLPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_BP_SENSOR)\n#include \"co_utils.h\"\n\n#include \"blps.h\"\n#include \"blps_task.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BLPS_ENABLE_REQ message.\n * The handler enables the Blood Pressure Sensor Profile and initialize readable\n *values.\n * @param[in] msgid Id of the message received (probably unused).off\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int blps_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct blps_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct blps_env_tag *blps_env = PRF_ENV_GET(BLPS, blps);\n\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (gapc_get_conhdl(param->conidx) == GAP_INVALID_CONHDL) {\n    status = PRF_ERR_DISCONNECTED;\n  } else if (ke_state_get(dest_id) == BLPS_IDLE) {\n    if (param->interm_cp_ntf_en == PRF_CLI_START_NTF) {\n      // Enable Bonded Data\n      blps_env->prfl_ntf_ind_cfg[param->conidx] |= BLPS_INTM_CUFF_PRESS_NTF_CFG;\n    }\n\n    if (param->bp_meas_ind_en == PRF_CLI_START_IND) {\n      // Enable Bonded Data\n      blps_env->prfl_ntf_ind_cfg[param->conidx] |= BLPS_BP_MEAS_IND_CFG;\n    }\n\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  // send completed information to APP task that contains error status\n  struct blps_enable_rsp *cmp_evt =\n      KE_MSG_ALLOC(BLPS_ENABLE_RSP, src_id, dest_id, blps_enable_rsp);\n  cmp_evt->status = status;\n  cmp_evt->conidx = param->conidx;\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == BLPS_IDLE) {\n    // Get the address of the environment\n    struct blps_env_tag *blps_env = PRF_ENV_GET(BLPS, blps);\n    uint8_t conidx = KE_IDX_GET(src_id);\n    uint8_t att_idx = param->handle - blps_env->shdl;\n\n    uint16_t value = 0;\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    switch (att_idx) {\n    case BPS_IDX_BP_FEATURE_VAL: {\n      value = blps_env->features;\n    } break;\n\n    case BPS_IDX_BP_MEAS_IND_CFG: {\n      value = (blps_env->prfl_ntf_ind_cfg[conidx] & BLPS_BP_MEAS_IND_CFG)\n                  ? PRF_CLI_START_IND\n                  : PRF_CLI_STOP_NTFIND;\n    } break;\n    case BPS_IDX_INTM_CUFF_PRESS_NTF_CFG: {\n      // Characteristic is profile specific\n      if (BLPS_IS_SUPPORTED(BLPS_INTM_CUFF_PRESS_SUP)) {\n        // Fill data\n        value =\n            (blps_env->prfl_ntf_ind_cfg[conidx] & BLPS_INTM_CUFF_PRESS_NTF_CFG)\n                ? PRF_CLI_START_NTF\n                : PRF_CLI_STOP_NTFIND;\n      } else {\n        status = ATT_ERR_ATTRIBUTE_NOT_FOUND;\n      }\n    } break;\n\n    default: {\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, sizeof(uint16_t));\n    cfm->length = sizeof(uint16_t);\n    memcpy(cfm->value, &value, sizeof(uint16_t));\n    cfm->handle = param->handle;\n    cfm->status = status;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref BLPS_MEAS_SEND_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int blps_meas_send_req_handler(ke_msg_id_t const msgid,\n                                        struct blps_meas_send_req const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  if (gapc_get_conhdl(param->conidx) == GAP_INVALID_CONHDL) {\n    status = PRF_ERR_DISCONNECTED;\n  } else if (ke_state_get(dest_id) == BLPS_IDLE) {\n    // Get the address of the environment\n    struct blps_env_tag *blps_env = PRF_ENV_GET(BLPS, blps);\n\n    // Intermediary blood pressure, must be notified if enabled\n    if (param->flag_interm_cp) {\n      // Check if supported\n      if (BLPS_IS_SUPPORTED(BLPS_INTM_CUFF_PRESS_SUP)) {\n        if (!BLPS_IS_ENABLED(BLPS_INTM_CUFF_PRESS_NTF_CFG, param->conidx)) {\n          status = PRF_ERR_NTF_DISABLED;\n        }\n      } else {\n        status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n      }\n    }\n\n    // Stable Blood Pressure Measurement, must be indicated if enabled\n    else if (!BLPS_IS_ENABLED(BLPS_BP_MEAS_IND_CFG, param->conidx)) {\n      status = PRF_ERR_IND_DISABLED;\n    }\n\n    // Check if message can be sent\n    if (status == GAP_ERR_NO_ERROR) {\n      // Allocate the GATT notification message\n      struct gattc_send_evt_cmd *meas_val = KE_MSG_ALLOC_DYN(\n          GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, param->conidx), dest_id,\n          gattc_send_evt_cmd, BLPS_BP_MEAS_MAX_LEN);\n\n      // Fill event type and handle which trigger event\n      if (param->flag_interm_cp) {\n        meas_val->operation = GATTC_NOTIFY;\n        meas_val->handle = blps_env->shdl + BPS_IDX_INTM_CUFF_PRESS_VAL;\n      } else {\n        // Fill in the parameter structure\n        meas_val->operation = GATTC_INDICATE;\n        meas_val->handle = blps_env->shdl + BPS_IDX_BP_MEAS_VAL;\n      }\n\n      // Pack the BP Measurement value\n      meas_val->length =\n          blps_pack_meas_value(meas_val->value, ¶m->meas_val);\n\n      // Send the event\n      ke_msg_send(meas_val);\n      // Go to busy state\n      ke_state_set(dest_id, BLPS_BUSY);\n    }\n  } else {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // Send error message to application\n    blps_meas_send_rsp_send(param->conidx, status);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GL2C_CODE_ATT_WR_CMD_IND message.\n * The handler compares the new values with current ones and notifies them if\n *they changed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct blps_env_tag *blps_env = PRF_ENV_GET(BLPS, blps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  uint16_t value = 0x0000;\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t char_code = 0;\n\n  // Extract value before check\n  memcpy(&value, &(param->value), sizeof(uint16_t));\n\n  // BP Measurement Char. - Client Char. Configuration\n  if (param->handle == (blps_env->shdl + BPS_IDX_BP_MEAS_IND_CFG)) {\n    if ((value == PRF_CLI_STOP_NTFIND) || (value == PRF_CLI_START_IND)) {\n      char_code = BPS_BP_MEAS_CHAR;\n\n      if (value == PRF_CLI_STOP_NTFIND) {\n        blps_env->prfl_ntf_ind_cfg[conidx] &= ~BLPS_BP_MEAS_IND_CFG;\n      } else // PRF_CLI_START_IND\n      {\n        blps_env->prfl_ntf_ind_cfg[conidx] |= BLPS_BP_MEAS_IND_CFG;\n      }\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  } else if (param->handle ==\n             (blps_env->shdl + BPS_IDX_INTM_CUFF_PRESS_NTF_CFG)) {\n    if ((value == PRF_CLI_STOP_NTFIND) || (value == PRF_CLI_START_NTF)) {\n      char_code = BPS_INTM_CUFF_MEAS_CHAR;\n\n      if (value == PRF_CLI_STOP_NTFIND) {\n        blps_env->prfl_ntf_ind_cfg[conidx] &= ~BLPS_INTM_CUFF_PRESS_NTF_CFG;\n      } else // PRF_CLI_START_NTF\n      {\n        blps_env->prfl_ntf_ind_cfg[conidx] |= BLPS_INTM_CUFF_PRESS_NTF_CFG;\n      }\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  }\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // Inform APP of configuration change\n    struct blps_cfg_indntf_ind *ind = KE_MSG_ALLOC(\n        BLPS_CFG_INDNTF_IND, prf_dst_task_get(&blps_env->prf_env, conidx),\n        prf_src_task_get(&blps_env->prf_env, conidx), blps_cfg_indntf_ind);\n\n    ind->conidx = conidx;\n    ind->char_code = char_code;\n    memcpy(&ind->cfg_val, &value, sizeof(uint16_t));\n\n    ke_msg_send(ind);\n  }\n\n  // Send write response\n  struct gattc_write_cfm *cfm =\n      KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n  cfm->handle = param->handle;\n  cfm->status = status;\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY and GATT_INDICATE message\n *meaning that Measurement notification/indication has been correctly sent to\n *peer device\n *\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  switch (param->operation) {\n  case GATTC_NOTIFY:\n  case GATTC_INDICATE: {\n    // Send confirmation\n    blps_meas_send_rsp_send(conidx, param->status);\n    // Go to idle state\n    ke_state_set(dest_id, BLPS_IDLE);\n  } break;\n\n  default:\n    break;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(blps){\n    {BLPS_ENABLE_REQ, (ke_msg_func_t)blps_enable_req_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {BLPS_MEAS_SEND_REQ, (ke_msg_func_t)blps_meas_send_req_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n};\n\nvoid blps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct blps_env_tag *blps_env = PRF_ENV_GET(BLPS, blps);\n\n  task_desc->msg_handler_tab = blps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(blps_msg_handler_tab);\n  task_desc->state = blps_env->state;\n  task_desc->idx_max = BLPS_IDX_MAX;\n}\n\n#endif /* #if (BLE_BP_SENSOR) */\n\n/// @} BLPSTASK\n"
  },
  {
    "path": "services/ble_profiles/cpp/cpp_common.h",
    "content": "#ifndef _CPP_COMMON_H_\n#define _CPP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CPP Cycling Power Profile\n * @ingroup PROFILE\n * @brief Cycling Power Profile\n *\n * The Cycling Power Profile is used to enable a collector device in order to obtain\n * data from a Cycling Power Sensor (CP Sensor) that exposes the Cycling Power Service\n * in sports and fitness applications.\n *\n * This file contains all definitions that are common for the server and the client parts\n * of the profile.\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"prf_types.h\"\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Procedure Already in Progress Error Code\n#define CPP_ERROR_PROC_IN_PROGRESS        (0x80)\n\n/// CP Measurement Notification Value Max Length\n#define CPP_CP_MEAS_NTF_MAX_LEN           (35)\n/// CP Measurement Value Min Length\n#define CPP_CP_MEAS_NTF_MIN_LEN           (4)\n\n/// ADV Header size\n#define CPP_CP_ADV_HEADER_LEN             (3)\n/// ADV Length size\n#define CPP_CP_ADV_LENGTH_LEN             (1)\n\n/// CP Measurement Advertisement Value Max Length\n#define CPP_CP_MEAS_ADV_MAX_LEN           (CPP_CP_MEAS_NTF_MAX_LEN + CPP_CP_ADV_HEADER_LEN)\n/// CP Measurement Value Min Length\n#define CPP_CP_MEAS_ADV_MIN_LEN           (CPP_CP_MEAS_NTF_MIN_LEN + CPP_CP_ADV_HEADER_LEN)\n\n/// CP Vector Value Max Length\n#define CPP_CP_VECTOR_MAX_LEN             (19)\n/// CP Vector Value Min Length\n#define CPP_CP_VECTOR_MIN_LEN             (1)\n\n/// CP Control Point Value Max Length\n#define CPP_CP_CNTL_PT_REQ_MAX_LEN        (9)\n/// CP Control Point Value Min Length\n#define CPP_CP_CNTL_PT_REQ_MIN_LEN        (1)\n\n/// CP Control Point Value Max Length\n#define CPP_CP_CNTL_PT_RSP_MAX_LEN        (20)\n/// CP Control Point Value Min Length\n#define CPP_CP_CNTL_PT_RSP_MIN_LEN        (3)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// CPP Service Characteristics\nenum cpp_cpps_char\n{\n    /// CPP Measurement\n    CPP_CPS_MEAS_CHAR,\n    /// CPP Feature\n    CPP_CPS_FEAT_CHAR,\n    /// Sensor Location\n    CPP_CPS_SENSOR_LOC_CHAR,\n    ///Cycling Power Vector\n    CPP_CPS_VECTOR_CHAR,\n    /// CP Control Point\n    CPP_CPS_CTNL_PT_CHAR,\n\n    CPP_CPS_CHAR_MAX,\n};\n\n/// CPP Measurement Flags\nenum cpp_meas_flags\n{\n    /// Pedal Power Balance Present\n    CPP_MEAS_PEDAL_POWER_BALANCE_PRESENT         = 0x0001,\n    /// Pedal Power Balance Reference\n    CPP_MEAS_PEDAL_POWER_BALANCE_REFERENCE       = 0x0002,\n    /// Accumulated Torque Present\n    CPP_MEAS_ACCUM_TORQUE_PRESENT                = 0x0004,\n    /// Accumulated Torque Source\n    CPP_MEAS_ACCUM_TORQUE_SOURCE                 = 0x0008,\n    /// Wheel Revolution Data Present\n    CPP_MEAS_WHEEL_REV_DATA_PRESENT              = 0x0010,\n    /// Crank Revolution Data Present\n    CPP_MEAS_CRANK_REV_DATA_PRESENT              = 0x0020,\n    /// Extreme Force Magnitudes Present\n    CPP_MEAS_EXTREME_FORCE_MAGNITUDES_PRESENT    = 0x0040,\n    /// Extreme Torque Magnitudes Present\n    CPP_MEAS_EXTREME_TORQUE_MAGNITUDES_PRESENT   = 0x0080,\n    /// Extreme Angles Present\n    CPP_MEAS_EXTREME_ANGLES_PRESENT              = 0x0100,\n    /// Top Dead Spot Angle Present\n    CPP_MEAS_TOP_DEAD_SPOT_ANGLE_PRESENT         = 0x0200,\n    /// Bottom Dead Spot Angle Present\n    CPP_MEAS_BOTTOM_DEAD_SPOT_ANGLE_PRESENT      = 0x0400,\n    /// Accumulated Energy Present\n    CPP_MEAS_ACCUM_ENERGY_PRESENT                = 0x0800,\n    /// Offset Compensation Indicator\n    CPP_MEAS_OFFSET_COMPENSATION_INDICATOR       = 0x1000,\n\n    /// All Supported\n    CPP_MEAS_ALL_SUPP                            = 0x1FFF,\n};\n\n/// CPP Feature Flags\nenum cpp_feat_flags\n{\n    /// Pedal Power Balance Supported\n    CPP_FEAT_PEDAL_POWER_BALANCE_SUPP           = 0x00000001,\n    /// Accumulated Torque Supported\n    CPP_FEAT_ACCUM_TORQUE_SUPP                  = 0x00000002,\n    /// Wheel Revolution Data Supported\n    CPP_FEAT_WHEEL_REV_DATA_SUPP                = 0x00000004,\n    /// Crank Revolution Data Supported\n    CPP_FEAT_CRANK_REV_DATA_SUPP                = 0x00000008,\n    /// Extreme Magnitudes Supported\n    CPP_FEAT_EXTREME_MAGNITUDES_SUPP            = 0x00000010,\n    /// Extreme Angles Supported\n    CPP_FEAT_EXTREME_ANGLES_SUPP                = 0x00000020,\n    /// Top and Bottom Dead Spot Angles Supported\n    CPP_FEAT_TOPBOT_DEAD_SPOT_ANGLES_SUPP       = 0x00000040,\n    /// Accumulated Energy Supported\n    CPP_FEAT_ACCUM_ENERGY_SUPP                  = 0x00000080,\n    /// Offset Compensation Indicator Supported\n    CPP_FEAT_OFFSET_COMP_IND_SUPP               = 0x00000100,\n    /// Offset Compensation Supported\n    CPP_FEAT_OFFSET_COMP_SUPP                   = 0x00000200,\n    /// CP Measurement CH Content Masking Supported\n    CPP_FEAT_CP_MEAS_CH_CONTENT_MASKING_SUPP    = 0x00000400,\n    /// Multiple Sensor Locations Supported\n    CPP_FEAT_MULT_SENSOR_LOC_SUPP               = 0x00000800,\n    /// Crank Length Adjustment Supported\n    CPP_FEAT_CRANK_LENGTH_ADJ_SUPP              = 0x00001000,\n    /// Chain Length Adjustment Supported\n    CPP_FEAT_CHAIN_LENGTH_ADJ_SUPP              = 0x00002000,\n    /// Chain Weight Adjustment Supported\n    CPP_FEAT_CHAIN_WEIGHT_ADJ_SUPP              = 0x00004000,\n    /// Span Length Adjustment Supported\n    CPP_FEAT_SPAN_LENGTH_ADJ_SUPP               = 0x00008000,\n    /// Sensor Measurement Context\n    CPP_FEAT_SENSOR_MEAS_CONTEXT                = 0x00010000,\n    /// Instantaneous Measurement Direction Supported\n    CPP_FEAT_INSTANT_MEAS_DIRECTION_SUPP        = 0x00020000,\n    /// Factory Calibration Date Supported\n    CPP_FEAT_FACTORY_CALIBRATION_DATE_SUPP      = 0x00040000,\n\n    /// All supported\n    CPP_FEAT_ALL_SUPP                            = 0x0007FFFF,\n};\n\n/// CPP Sensor Locations Keys\nenum cpp_sensor_loc\n{\n    /// Other (0)\n    CPP_LOC_OTHER          = 0,\n    /// Top of shoe (1)\n    CPP_LOC_TOP_SHOE,\n    /// In shoe (2)\n    CPP_LOC_IN_SHOE,\n    /// Hip (3)\n    CPP_LOC_HIP,\n    /// Front Wheel (4)\n    CPP_LOC_FRONT_WHEEL,\n    /// Left Crank (5)\n    CPP_LOC_LEFT_CRANK,\n    /// Right Crank (6)\n    CPP_LOC_RIGHT_CRANK,\n    /// Left Pedal (7)\n    CPP_LOC_LEFT_PEDAL,\n    /// Right Pedal (8)\n    CPP_LOC_RIGHT_PEDAL,\n    /// Front Hub (9)\n    CPP_LOC_FRONT_HUB,\n    /// Rear Dropout (10)\n    CPP_LOC_REAR_DROPOUT,\n    /// Chainstay (11)\n    CPP_LOC_CHAINSTAY,\n    /// Rear Wheel (12)\n    CPP_LOC_REAR_WHEEL,\n    /// Rear Hub (13)\n    CPP_LOC_REAR_HUB,\n    /// Chest (14)\n    CPP_LOC_CHEST,\n\n    CPP_LOC_MAX,\n};\n\n/// CPP Vector Flags\nenum cpp_vector_flags\n{\n    /// Crank Revolution Data Present\n    CPP_VECTOR_CRANK_REV_DATA_PRESENT                = 0x01,\n    /// First Crank Measurement Angle Present\n    CPP_VECTOR_FIRST_CRANK_MEAS_ANGLE_PRESENT        = 0x02,\n    /// Instantaneous Force Magnitude Array Present\n    CPP_VECTOR_INST_FORCE_MAGNITUDE_ARRAY_PRESENT    = 0x04,\n    /// Instantaneous Torque Magnitude Array Present\n    CPP_VECTOR_INST_TORQUE_MAGNITUDE_ARRAY_PRESENT   = 0x08,\n    /// Instantaneous Measurement Direction LSB\n    CPP_VECTOR_INST_MEAS_DIRECTION_LSB                 = 0x10,\n    /// Instantaneous Measurement Direction MSB\n    CPP_VECTOR_INST_MEAS_DIRECTION_MSB                 = 0x20,\n\n    ///All suported\n    CPP_VECTOR_ALL_SUPP                                 = 0x3F,\n};\n\n/// CPP Control Point Code Keys\nenum cpp_ctnl_pt_code\n{\n    /// Reserved value\n    CPP_CTNL_PT_RESERVED        = 0,\n\n    /// Set Cumulative Value\n    CPP_CTNL_PT_SET_CUMUL_VAL,\n    /// Update Sensor Location\n    CPP_CTNL_PT_UPD_SENSOR_LOC,\n    /// Request Supported Sensor Locations\n    CPP_CTNL_PT_REQ_SUPP_SENSOR_LOC,\n    /// Set Crank Length\n    CPP_CTNL_PT_SET_CRANK_LENGTH,\n    /// Request Crank Length\n    CPP_CTNL_PT_REQ_CRANK_LENGTH,\n    /// Set Chain Length\n    CPP_CTNL_PT_SET_CHAIN_LENGTH,\n    /// Request Chain Length\n    CPP_CTNL_PT_REQ_CHAIN_LENGTH,\n    /// Set Chain Weight\n    CPP_CTNL_PT_SET_CHAIN_WEIGHT,\n    /// Request Chain Weight\n    CPP_CTNL_PT_REQ_CHAIN_WEIGHT,\n    /// Set Span Length\n    CPP_CTNL_PT_SET_SPAN_LENGTH,\n    /// Request Span Length\n    CPP_CTNL_PT_REQ_SPAN_LENGTH,\n    /// Start Offset Compensation\n    CPP_CTNL_PT_START_OFFSET_COMP,\n    /// Mask CP Measurement Characteristic Content\n    CPP_CTNL_MASK_CP_MEAS_CH_CONTENT,\n    /// Request Sampling Rate\n    CPP_CTNL_REQ_SAMPLING_RATE,\n    /// Request Factory Calibration Date\n    CPP_CTNL_REQ_FACTORY_CALIBRATION_DATE,\n\n    /// Response Code\n    CPP_CTNL_PT_RSP_CODE             = 32,\n};\n\n/// CPP Control Point Response Value\nenum cpp_ctnl_pt_resp_val\n{\n    /// Reserved value\n    CPP_CTNL_PT_RESP_RESERVED      = 0,\n\n    /// Success\n    CPP_CTNL_PT_RESP_SUCCESS,\n    /// Operation Code Not Supported\n    CPP_CTNL_PT_RESP_NOT_SUPP,\n    /// Invalid Parameter\n    CPP_CTNL_PT_RESP_INV_PARAM,\n    /// Operation Failed\n    CPP_CTNL_PT_RESP_FAILED,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// CP Measurement\nstruct cpp_cp_meas\n{\n    /// Flags\n    uint16_t flags;\n    /// Instantaneous Power\n    int16_t inst_power;\n    /// Pedal Power Balance\n    uint8_t pedal_power_balance;\n    /// Accumulated torque\n    uint16_t accum_torque;\n    /// Cumulative Wheel Revolutions\n    int16_t cumul_wheel_rev;\n    /// Last Wheel Event Time\n    uint16_t last_wheel_evt_time;\n    /// Cumulative Crank Revolution\n    uint16_t cumul_crank_rev;\n    /// Last Crank Event Time\n    uint16_t last_crank_evt_time;\n    /// Maximum Force Magnitude\n    int16_t max_force_magnitude;\n    /// Minimum Force Magnitude\n    int16_t min_force_magnitude;\n    /// Maximum Torque Magnitude\n    int16_t max_torque_magnitude;\n    /// Minimum Torque Magnitude\n    int16_t min_torque_magnitude;\n    /// Maximum Angle (12 bits)\n    uint16_t max_angle;\n    /// Minimum Angle (12bits)\n    uint16_t min_angle;\n    /// Top Dead Spot Angle\n    uint16_t top_dead_spot_angle;\n    /// Bottom Dead Spot Angle\n    uint16_t bot_dead_spot_angle;\n    ///Accumulated energy\n    uint16_t accum_energy;\n\n};\n\n/// CP Measurement\nstruct cpp_cp_meas_ind\n{\n    /// Flags\n    uint16_t flags;\n    /// Instantaneous Power\n    int16_t inst_power;\n    /// Pedal Power Balance\n    uint8_t pedal_power_balance;\n    /// Accumulated torque\n    uint16_t accum_torque;\n    /// Cumulative Wheel Revolutions\n    uint32_t cumul_wheel_rev;\n    /// Last Wheel Event Time\n    uint16_t last_wheel_evt_time;\n    /// Cumulative Crank Revolution\n    uint16_t cumul_crank_rev;\n    /// Last Crank Event Time\n    uint16_t last_crank_evt_time;\n    /// Maximum Force Magnitude\n    int16_t max_force_magnitude;\n    /// Minimum Force Magnitude\n    int16_t min_force_magnitude;\n    /// Maximum Torque Magnitude\n    int16_t max_torque_magnitude;\n    /// Minimum Torque Magnitude\n    int16_t min_torque_magnitude;\n    /// Maximum Angle (12 bits)\n    uint16_t max_angle;\n    /// Minimum Angle (12bits)\n    uint16_t min_angle;\n    /// Top Dead Spot Angle\n    uint16_t top_dead_spot_angle;\n    /// Bottom Dead Spot Angle\n    uint16_t bot_dead_spot_angle;\n    ///Accumulated energy\n    uint16_t accum_energy;\n\n};\n\n\n///CP Vector\nstruct cpp_cp_vector\n{\n    /// Flags\n    uint8_t flags;\n    /// Force-Torque Magnitude Array Length\n    uint8_t nb;\n    /// Cumulative Crank Revolutions\n    uint16_t cumul_crank_rev;\n    /// Last Crank Event Time\n    uint16_t last_crank_evt_time;\n    /// First Crank Measurement Angle\n    uint16_t first_crank_meas_angle;\n    ///Mutually excluded Force and Torque Magnitude Arrays\n    int16_t  force_torque_magnitude[__ARRAY_EMPTY];\n};\n\n/// CP Control Point Request\nstruct cpp_ctnl_pt_req\n{\n    /// Operation Code\n    uint8_t op_code;\n    /// Value\n    union cpp_ctnl_pt_req_val\n    {\n        /// Cumulative Value\n        uint32_t cumul_val;\n        /// Sensor Location\n        uint8_t sensor_loc;\n        /// Crank Length\n        uint16_t crank_length;\n        /// Chain Length\n        uint16_t chain_length;\n        /// Chain Weight\n        uint16_t chain_weight;\n        /// Span Length\n        uint16_t span_length;\n        /// Mask Content\n        uint16_t mask_content;\n    } value;\n};\n\n/// CP Control Point Response\nstruct cpp_ctnl_pt_rsp\n{\n    /// Requested Operation Code\n    uint8_t req_op_code;\n    /// Response Value\n    uint8_t resp_value;\n\n    ///Value\n    union cpp_ctnl_pt_rsp_val\n    {\n        /// List of supported locations\n        uint32_t supp_loc;\n        /// Crank Length\n        uint16_t crank_length;\n        /// Chain Length\n        uint16_t chain_length;\n        /// Chain Weight\n        uint16_t chain_weight;\n        /// Span Length\n        uint16_t span_length;\n        /// Start Offset Compensation\n        int16_t offset_comp;\n        /// Sampling Rate Procedure\n        uint8_t sampling_rate;\n        /// Calibration date\n        struct prf_date_time factory_calibration;\n    } value;\n};\n\n/// @} cpp_common\n\n#endif //(_CPP_COMMON_H_)\n"
  },
  {
    "path": "services/ble_profiles/cpp/cppc/api/cppc_task.h",
    "content": "#ifndef _CPPC_TASK_H_\n#define _CPPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CPPCTASK Cycling Power Profile Collector Task\n * @ingroup CPPC\n * @brief Cycling Power Profile Collector Task\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"cpp_common.h\"\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Cycling Power Service Characteristic Descriptors\nenum cppc_cps_descs\n{\n    /// CP Measurement Char. - Client Characteristic Configuration\n    CPPC_DESC_CP_MEAS_CL_CFG,\n    /// CP Measurement Char. - Server Characteristic Configuration\n    CPPC_DESC_CP_MEAS_SV_CFG,\n    /// CP Vector Char. - Client Characteristic Configuration\n    CPPC_DESC_VECTOR_CL_CFG,\n    /// Control Point Char. - Client Characteristic Configuration\n    CPPC_DESC_CTNL_PT_CL_CFG,\n\n    CPPC_DESC_MAX,\n\n    CPPC_DESC_MASK = 0x10,\n};\n\n/// Message IDs\nenum cppc_msg_ids\n{\n    /// Enable the Cycling Power Profile Collector task - at connection\n    CPPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_CPPC),\n    /// Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    CPPC_ENABLE_RSP,\n\n    /// Read the value of an attribute in the peer device database\n    CPPC_READ_CMD,\n\n    /// Configure sending of notification or indication\n    CPPC_CFG_NTFIND_CMD,\n\n    /// Configure the SC Control Point value\n    CPPC_CTNL_PT_CFG_REQ,\n    /// Indicate that an control point response has been triggered by peer device\n    CPPC_CTNL_PT_RSP,\n\n    /// Indicate that an attribute value has been received either upon notification or read response\n    CPPC_VALUE_IND,\n\n    /// Complete Event Information\n    CPPC_CMP_EVT,\n\n    /// Procedure Timeout Timer\n    CPPC_TIMEOUT_TIMER_IND,\n};\n\n/// Operation Codes\nenum cppc_op_code\n{\n    /// Reserved operation code\n    CPPC_RESERVED_OP_CODE  = 0x00,\n\n    /// Discovery Procedure\n    CPPC_ENABLE_OP_CODE,\n    /// Read attribute value Procedure\n    CPPC_READ_OP_CODE,\n\n    /// Wait for the Write Response after having written a Client Char. Cfg. Descriptor.\n    CPPC_CFG_NTF_IND_OP_CODE,\n\n    /// Wait for the Write Response after having written the Control Point Char.\n    CPPC_CTNL_PT_CFG_WR_OP_CODE,\n    /// Wait for the Indication Response after having written the Control Point Char.\n    CPPC_CTNL_PT_CFG_IND_OP_CODE,\n};\n\n/*\n * API MESSAGE STRUCTURES\n ****************************************************************************************\n */\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Cycling Power Service\n */\nstruct cppc_cps_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - CP Measurement\n    ///  - CP Feature\n    ///  - Sensor Location\n    ///  - Vector\n    ///  - SC Control Point\n    struct prf_char_inf chars[CPP_CPS_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - CP Measurement Client Cfg\n    ///  - Vector Client Cfg\n    ///  - Control Point Client Cfg\n    struct prf_char_desc_inf descs[CPPC_DESC_MAX];\n};\n\n/// Parameters of the @ref CPPC_ENABLE_REQ message\nstruct cppc_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n    /// Existing handle values CPS\n    struct cppc_cps_content cps;\n};\n\n/// Parameters of the @ref CPPC_ENABLE_RSP message\nstruct cppc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values CPS\n    struct cppc_cps_content cps;\n};\n\n/// Parameters of the @ref CPPC_READ_CMD message\nstruct cpps_read_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Read code\n    uint8_t read_code;\n};\n\n/// Parameters of the @ref CPPC_CFG_NTFIND_CMD message\nstruct cppc_cfg_ntfind_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Descriptor code\n    uint8_t desc_code;\n    /// Ntf/Ind Configuration\n    uint16_t ntfind_cfg;\n};\n\n/// Parameters of the @ref CPPC_CTNL_PT_CFG_REQ message\nstruct cppc_ctnl_pt_cfg_req\n{\n    /// Operation Code\n    uint8_t operation;\n    /// SC Control Point Request\n    struct cpp_ctnl_pt_req ctnl_pt;\n};\n\n/// Parameters of the @ref CPPC_VALUE_IND message\nstruct cppc_value_ind\n{\n    /// Attribute Code\n    uint8_t att_code;\n    /// Value\n    union cppc_value_tag\n    {\n        /// CP Feature\n        uint32_t sensor_feat;\n        /// CP Measurement\n        struct cpp_cp_meas cp_meas;\n        /// Sensor Vector\n        struct cpp_cp_vector cp_vector;\n        /// Client Characteristic Configuration Descriptor Value\n        uint16_t ntf_cfg;\n        /// Sensor Location\n        uint8_t sensor_loc;\n    } value;\n};\n\n\n/// Parameters of the @ref CPPC_VALUE_IND message\nstruct cppc_value_meas_ind\n{\n    /// Attribute Code\n    uint8_t att_code;\n    /// Value\n    union cppc_value_tag2\n    {\n        /// CP Feature\n        uint32_t sensor_feat;\n        /// CP Measurement\n        struct cpp_cp_meas_ind cp_meas;\n        /// Sensor Vector\n        struct cpp_cp_vector cp_vector;\n        /// Client Characteristic Configuration Descriptor Value\n        uint16_t ntf_cfg;\n        /// Sensor Location\n        uint8_t sensor_loc;\n    } value;\n};\n\n\n\n\n/// Parameters of the @ref CPPC_CTNL_PT_RSP message\nstruct cppc_ctnl_pt_rsp\n{\n    /// SC Control Point Response\n    struct cpp_ctnl_pt_rsp rsp;\n};\n\n/// Parameters of the @ref CPPC_CMP_EVT message\nstruct cppc_cmp_evt\n{\n    /// Operation code\n    uint8_t operation;\n    /// Status\n    uint8_t status;\n};\n\n/// @} CPPCTASK\n\n#endif //(_CPPC_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/cpp/cppc/src/cppc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup CPPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_CP_COLLECTOR)\n\n#include \"cpp_common.h\"\n#include \"cppc.h\"\n#include \"cppc_task.h\"\n#include \"ke_timer.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * GLOBAL VARIABLES DECLARATION\n ****************************************************************************************\n */\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the CPPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t cppc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct cppc_env_tag *cppc_env = (struct cppc_env_tag *)ke_malloc(\n      sizeof(struct cppc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate CPPC required environment variable\n  env->env = (prf_env_t *)cppc_env;\n\n  cppc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  cppc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_CPPC;\n  cppc_task_init(&(env->desc));\n\n  for (idx = 0; idx < CPPC_IDX_MAX; idx++) {\n    cppc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), CPPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void cppc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct cppc_env_tag *cppc_env = (struct cppc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (cppc_env->env[conidx] != NULL) {\n    if (cppc_env->env[conidx]->operation != NULL) {\n      ke_free(ke_param2msg(cppc_env->env[conidx]->operation));\n    }\n    ke_timer_clear(CPPC_TIMEOUT_TIMER_IND,\n                   prf_src_task_get(&cppc_env->prf_env, conidx));\n    ke_free(cppc_env->env[conidx]);\n    cppc_env->env[conidx] = NULL;\n  }\n\n  /* Put CPP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), CPPC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the CPPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void cppc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct cppc_env_tag *cppc_env = (struct cppc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < CPPC_IDX_MAX; idx++) {\n    cppc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(cppc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void cppc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put CPP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), CPPC_IDLE);\n}\n\n/// CPPC Task interface required by profile manager\nconst struct prf_task_cbs cppc_itf = {\n    cppc_init,\n    cppc_destroy,\n    cppc_create,\n    cppc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *cppc_prf_itf_get(void) { return &cppc_itf; }\n\nvoid cppc_enable_rsp_send(struct cppc_env_tag *cppc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Send to APP the details of the discovered attributes on CPPS\n  struct cppc_enable_rsp *rsp = KE_MSG_ALLOC(\n      CPPC_ENABLE_RSP, prf_dst_task_get(&(cppc_env->prf_env), conidx),\n      prf_src_task_get(&(cppc_env->prf_env), conidx), cppc_enable_rsp);\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->cps = cppc_env->env[conidx]->cps;\n    // Register CPPC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(cppc_env->prf_env), conidx,\n                             &(cppc_env->env[conidx]->cps.svc));\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(cppc_env->prf_env), conidx), CPPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nvoid cppc_send_no_conn_cmp_evt(uint8_t src_id, uint8_t dest_id,\n                               uint8_t operation) {\n  // Send the message\n  struct cppc_cmp_evt *evt =\n      KE_MSG_ALLOC(CPPC_CMP_EVT, dest_id, src_id, cppc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = PRF_ERR_REQ_DISALLOWED;\n\n  ke_msg_send(evt);\n}\n\nvoid cppc_send_cmp_evt(struct cppc_env_tag *cppc_env, uint8_t conidx,\n                       uint8_t operation, uint8_t status) {\n  // Free the stored operation if needed\n  if (cppc_env->env[conidx]->operation != NULL) {\n    ke_msg_free(ke_param2msg(cppc_env->env[conidx]->operation));\n    cppc_env->env[conidx]->operation = NULL;\n  }\n\n  // Go back to the IDLE state if the state is busy\n  if (ke_state_get(prf_src_task_get(&(cppc_env->prf_env), conidx)) ==\n      CPPC_BUSY) {\n    ke_state_set(prf_src_task_get(&cppc_env->prf_env, conidx), CPPC_IDLE);\n  }\n\n  // Send the message\n  struct cppc_cmp_evt *evt = KE_MSG_ALLOC(\n      CPPC_CMP_EVT, prf_dst_task_get(&(cppc_env->prf_env), conidx),\n      prf_src_task_get(&(cppc_env->prf_env), conidx), cppc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nuint16_t cppc_get_read_handle_req(struct cppc_env_tag *cppc_env, uint8_t conidx,\n                                  struct cpps_read_cmd *param) {\n  // Attribute Handle\n  uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n\n  switch (param->read_code) {\n  // Read CP Feature\n  case (CPPC_RD_CP_FEAT): {\n    handle = cppc_env->env[conidx]->cps.chars[CPP_CPS_FEAT_CHAR].val_hdl;\n  } break;\n\n  // Read Sensor Location\n  case (CPPC_RD_SENSOR_LOC): {\n    handle = cppc_env->env[conidx]->cps.chars[CPP_CPS_SENSOR_LOC_CHAR].val_hdl;\n  } break;\n\n  // Read CP Measurement Characteristic Client Char. Cfg. Descriptor Value\n  case (CPPC_RD_WR_CP_MEAS_CL_CFG): {\n    handle =\n        cppc_env->env[conidx]->cps.descs[CPPC_DESC_CP_MEAS_CL_CFG].desc_hdl;\n  } break;\n\n  // Read CP Measurement Characteristic Server Char. Cfg. Descriptor Value\n  case (CPPC_RD_WR_CP_MEAS_SV_CFG): {\n    handle =\n        cppc_env->env[conidx]->cps.descs[CPPC_DESC_CP_MEAS_SV_CFG].desc_hdl;\n  } break;\n\n  // Read CP Vector Characteristic Server Char. Cfg. Descriptor Value\n  case (CPPC_RD_WR_VECTOR_CFG): {\n    handle = cppc_env->env[conidx]->cps.descs[CPPC_DESC_VECTOR_CL_CFG].desc_hdl;\n  } break;\n\n  // Read Unread Alert Characteristic Client Char. Cfg. Descriptor Value\n  case (CPPC_RD_WR_CTNL_PT_CFG): {\n    handle =\n        cppc_env->env[conidx]->cps.descs[CPPC_DESC_CTNL_PT_CL_CFG].desc_hdl;\n  } break;\n\n  default: {\n    handle = ATT_INVALID_SEARCH_HANDLE;\n  } break;\n  }\n\n  return handle;\n}\n\nuint8_t cppc_get_write_desc_handle_req(uint8_t conidx,\n                                       struct cppc_cfg_ntfind_cmd *param,\n                                       struct cppc_env_tag *cppc_env,\n                                       uint16_t *handle) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  switch (param->desc_code) {\n  // Write CP Measurement Characteristic Client Char. Cfg. Descriptor Value\n  case (CPPC_RD_WR_CP_MEAS_CL_CFG): {\n    if (param->ntfind_cfg <= PRF_CLI_START_NTF) {\n      *handle =\n          cppc_env->env[conidx]->cps.descs[CPPC_DESC_CP_MEAS_CL_CFG].desc_hdl;\n\n      // The descriptor is mandatory\n      ASSERT_ERR(*handle != ATT_INVALID_SEARCH_HANDLE);\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } break;\n\n  // Write CP Measurement Characteristic Server Char. Cfg. Descriptor Value\n  case (CPPC_RD_WR_CP_MEAS_SV_CFG): {\n    if (param->ntfind_cfg <= PRF_SRV_START_BCST) {\n      *handle =\n          cppc_env->env[conidx]->cps.descs[CPPC_DESC_CP_MEAS_SV_CFG].desc_hdl;\n\n      if (*handle == ATT_INVALID_SEARCH_HANDLE) {\n        // The descriptor has not been found.\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } break;\n\n  // Write CP Vector Characteristic Client Char. Cfg. Descriptor Value\n  case (CPPC_RD_WR_VECTOR_CFG): {\n    if (param->ntfind_cfg <= PRF_CLI_START_NTF) {\n      *handle =\n          cppc_env->env[conidx]->cps.descs[CPPC_DESC_VECTOR_CL_CFG].desc_hdl;\n\n      if (*handle == ATT_INVALID_SEARCH_HANDLE) {\n        // The descriptor has not been found.\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } break;\n\n  // Write SC Control Point Characteristic Client Char. Cfg. Descriptor Value\n  case (CPPC_RD_WR_CTNL_PT_CFG): {\n    if ((param->ntfind_cfg == PRF_CLI_STOP_NTFIND) ||\n        (param->ntfind_cfg == PRF_CLI_START_IND)) {\n      *handle =\n          cppc_env->env[conidx]->cps.descs[CPPC_DESC_CTNL_PT_CL_CFG].desc_hdl;\n\n      if (*handle == ATT_INVALID_SEARCH_HANDLE) {\n        // The descriptor has not been found.\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } break;\n\n  default: {\n    status = PRF_ERR_INVALID_PARAM;\n  } break;\n  }\n\n  return (status);\n}\n\nuint8_t cppc_unpack_meas_ind(uint8_t conidx,\n                             struct gattc_event_ind const *param,\n                             struct cppc_env_tag *cppc_env) {\n  // CP Measurement value has been received\n  struct cppc_value_meas_ind *ind = KE_MSG_ALLOC(\n      CPPC_VALUE_IND, prf_dst_task_get(&(cppc_env->prf_env), conidx),\n      prf_src_task_get(&(cppc_env->prf_env), conidx), cppc_value_meas_ind);\n\n  // Offset\n  uint8_t offset = CPP_CP_MEAS_NTF_MIN_LEN;\n\n  // Attribute code\n  ind->att_code = CPPC_NTF_CP_MEAS;\n\n  // Flags\n  ind->value.cp_meas.flags = co_read16p(¶m->value[0]);\n  // Instant power\n  ind->value.cp_meas.inst_power = co_read16p(¶m->value[2]);\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_PEDAL_POWER_BALANCE_PRESENT) {\n    // Unpack Pedal Power Balance info\n    ind->value.cp_meas.pedal_power_balance = param->value[offset];\n    offset++;\n  }\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_ACCUM_TORQUE_PRESENT) {\n    // Unpack Accumulated Torque info\n    ind->value.cp_meas.accum_torque = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_WHEEL_REV_DATA_PRESENT) {\n    // Unpack Wheel Revolution Data (Cumulative Wheel & Last Wheel Event Time)\n    ind->value.cp_meas.cumul_wheel_rev = co_read32p(¶m->value[offset]);\n    offset += 4;\n    ind->value.cp_meas.last_wheel_evt_time = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_CRANK_REV_DATA_PRESENT) {\n    // Unpack Crank Revolution Data (Cumulative Crank & Last Crank Event Time)\n    ind->value.cp_meas.cumul_crank_rev = co_read16p(¶m->value[offset]);\n    offset += 2;\n    ind->value.cp_meas.last_crank_evt_time = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_EXTREME_FORCE_MAGNITUDES_PRESENT) {\n    // Unpack Extreme Force Magnitudes (Maximum Force Magnitude & Minimum Force\n    // Magnitude)\n    ind->value.cp_meas.max_force_magnitude = co_read16p(¶m->value[offset]);\n    offset += 2;\n    ind->value.cp_meas.min_force_magnitude = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  else if (ind->value.cp_meas.flags &\n           CPP_MEAS_EXTREME_TORQUE_MAGNITUDES_PRESENT) {\n    // Unpack Extreme Force Magnitudes (Maximum Force Magnitude & Minimum Force\n    // Magnitude)\n    ind->value.cp_meas.max_torque_magnitude = co_read16p(¶m->value[offset]);\n    offset += 2;\n    ind->value.cp_meas.min_torque_magnitude = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_EXTREME_ANGLES_PRESENT) {\n    // Unpack Extreme Angles (Maximum Angle & Minimum Angle)\n    uint32_t angle = co_read24p(¶m->value[offset]);\n    offset += 3;\n\n    // Force to 12 bits\n    ind->value.cp_meas.max_angle = (angle & (0x0FFF));\n    ind->value.cp_meas.min_angle = ((angle >> 12) & 0x0FFF);\n  }\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_TOP_DEAD_SPOT_ANGLE_PRESENT) {\n    // Unpack Top Dead Spot Angle\n    ind->value.cp_meas.top_dead_spot_angle = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_BOTTOM_DEAD_SPOT_ANGLE_PRESENT) {\n    // Unpack Bottom Dead Spot Angle\n    ind->value.cp_meas.bot_dead_spot_angle = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (ind->value.cp_meas.flags & CPP_MEAS_ACCUM_ENERGY_PRESENT) {\n    // Unpack Accumulated Energy\n    ind->value.cp_meas.accum_energy = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  // Send the message\n  ke_msg_send(ind);\n\n  return offset;\n}\n\nuint8_t cppc_unpack_vector_ind(uint8_t conidx,\n                               struct gattc_event_ind const *param,\n                               struct cppc_env_tag *cppc_env) {\n  // CP Measurement value has been received\n  struct cppc_value_ind *ind = KE_MSG_ALLOC_DYN(\n      CPPC_VALUE_IND, prf_dst_task_get(&cppc_env->prf_env, conidx),\n      prf_src_task_get(&cppc_env->prf_env, conidx), cppc_value_ind,\n      param->length);\n\n  // Offset\n  uint8_t offset = CPP_CP_VECTOR_MIN_LEN;\n\n  // Attribute code\n  ind->att_code = CPPC_NTF_CP_VECTOR;\n\n  // Flags\n  ind->value.cp_vector.flags = param->value[0];\n\n  if (ind->value.cp_vector.flags & CPP_VECTOR_CRANK_REV_DATA_PRESENT) {\n    // Unpack Crank Revolution Data\n    ind->value.cp_vector.cumul_crank_rev = co_read16p(¶m->value[offset]);\n    offset += 2;\n    // Unpack Last Crank Evt time\n    ind->value.cp_vector.last_crank_evt_time =\n        co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (ind->value.cp_vector.flags & CPP_VECTOR_FIRST_CRANK_MEAS_ANGLE_PRESENT) {\n    // Unpack First Crank Measurement Angle\n    ind->value.cp_vector.first_crank_meas_angle =\n        co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (!(ind->value.cp_vector.flags &\n        CPP_VECTOR_INST_FORCE_MAGNITUDE_ARRAY_PRESENT) !=\n      !(ind->value.cp_vector.flags &\n        CPP_VECTOR_INST_TORQUE_MAGNITUDE_ARRAY_PRESENT)) {\n    // Unpack Force or Torque magnitude (mutually excluded)\n    ind->value.cp_vector.nb = (param->length - offset) / 2;\n    if (ind->value.cp_vector.nb) {\n      for (int i = 0; i < ind->value.cp_vector.nb; i++) {\n        // Handle the array buffer to extract parameters\n        ind->value.cp_vector.force_torque_magnitude[i] =\n            co_read16p(¶m->value[offset]);\n        offset += 2;\n      }\n    }\n  }\n\n  //    if ((ind->value.cp_vector.flags & CPP_VECTOR_INST_MEAS_DIRECTION_LSB) ||\n  //            (ind->value.cp_vector.flags &\n  //            CPP_VECTOR_INST_MEAS_DIRECTION_MSB))\n  //    {\n  //\n  //    }\n\n  // Send the message\n  ke_msg_send(ind);\n\n  return offset;\n}\n\nuint8_t cppc_pack_ctnl_pt_req(struct cppc_ctnl_pt_cfg_req *param, uint8_t *req,\n                              uint8_t *status) {\n  // Request Length\n  uint8_t req_len = CPP_CP_CNTL_PT_REQ_MIN_LEN;\n\n  // Set the operation code\n  req[0] = param->ctnl_pt.op_code;\n\n  // Fulfill the message according to the operation code\n  switch (param->ctnl_pt.op_code) {\n  case (CPP_CTNL_PT_SET_CUMUL_VAL): {\n    // Set the cumulative value\n    co_write32p(&req[req_len], param->ctnl_pt.value.cumul_val);\n    // Update length\n    req_len += 4;\n  } break;\n\n  case (CPP_CTNL_PT_UPD_SENSOR_LOC): {\n    // Set the sensor location\n    req[req_len] = param->ctnl_pt.value.sensor_loc;\n    // Update length\n    req_len++;\n  } break;\n\n  case (CPP_CTNL_PT_SET_CRANK_LENGTH): {\n    // Set the crank length\n    co_write16p(&req[req_len], param->ctnl_pt.value.crank_length);\n    // Update length\n    req_len += 2;\n  } break;\n\n  case (CPP_CTNL_PT_SET_CHAIN_LENGTH): {\n    // Set the chain length\n    co_write16p(&req[req_len], param->ctnl_pt.value.chain_length);\n    // Update length\n    req_len += 2;\n  } break;\n\n  case (CPP_CTNL_PT_SET_CHAIN_WEIGHT): {\n    // Set the chain weight\n    co_write16p(&req[req_len], param->ctnl_pt.value.chain_weight);\n    // Update length\n    req_len += 2;\n  } break;\n\n  case (CPP_CTNL_PT_SET_SPAN_LENGTH): {\n    // Set the span length\n    co_write16p(&req[req_len], param->ctnl_pt.value.span_length);\n    // Update length\n    req_len += 2;\n  } break;\n\n  case (CPP_CTNL_MASK_CP_MEAS_CH_CONTENT): {\n    // Set the Content Mask\n    co_write16p(&req[req_len], param->ctnl_pt.value.mask_content);\n    // Update length\n    req_len += 2;\n  } break;\n\n  case (CPP_CTNL_PT_REQ_SUPP_SENSOR_LOC):\n  case (CPP_CTNL_PT_REQ_CRANK_LENGTH):\n  case (CPP_CTNL_PT_REQ_CHAIN_LENGTH):\n  case (CPP_CTNL_PT_REQ_CHAIN_WEIGHT):\n  case (CPP_CTNL_PT_REQ_SPAN_LENGTH):\n  case (CPP_CTNL_PT_START_OFFSET_COMP):\n  case (CPP_CTNL_REQ_SAMPLING_RATE):\n  case (CPP_CTNL_REQ_FACTORY_CALIBRATION_DATE): {\n    // Nothing more to do\n  } break;\n\n  default: {\n    *status = PRF_ERR_INVALID_PARAM;\n  } break;\n  }\n\n  return req_len;\n}\n\nuint8_t cppc_unpack_ctln_pt_ind(uint8_t conidx,\n                                struct gattc_event_ind const *param,\n                                struct cppc_env_tag *cppc_env) {\n  // Offset\n  uint8_t offset = CPP_CP_CNTL_PT_RSP_MIN_LEN;\n\n  // Control Point value has been received\n  struct cppc_ctnl_pt_rsp *ind = KE_MSG_ALLOC(\n      CPPC_CTNL_PT_RSP, prf_dst_task_get(&cppc_env->prf_env, conidx),\n      prf_src_task_get(&cppc_env->prf_env, conidx), cppc_ctnl_pt_rsp);\n\n  // Requested operation code\n  ind->rsp.req_op_code = param->value[1];\n  // Response value\n  ind->rsp.resp_value = param->value[2];\n\n  if ((ind->rsp.resp_value == CPP_CTNL_PT_RESP_SUCCESS) &&\n      (param->length >= 3)) {\n    switch (ind->rsp.req_op_code) {\n    case (CPP_CTNL_PT_REQ_SUPP_SENSOR_LOC): {\n      // Get the number of supported locations that have been received\n      uint8_t nb_supp_loc = (param->length - 3);\n      // Location\n      uint8_t loc;\n\n      for (uint8_t counter = 0; counter < nb_supp_loc; counter++) {\n        loc = param->value[counter + CPP_CP_CNTL_PT_RSP_MIN_LEN];\n        // Check if valid\n        if (loc < CPP_LOC_MAX) {\n          ind->rsp.value.supp_loc |= (1 << loc);\n        }\n        offset++;\n      }\n    } break;\n\n    case (CPP_CTNL_PT_REQ_CRANK_LENGTH): {\n      ind->rsp.value.crank_length = co_read16p(¶m->value[offset]);\n      offset += 2;\n    } break;\n\n    case (CPP_CTNL_PT_REQ_CHAIN_LENGTH): {\n      ind->rsp.value.chain_length = co_read16p(¶m->value[offset]);\n      offset += 2;\n    } break;\n\n    case (CPP_CTNL_PT_REQ_CHAIN_WEIGHT): {\n      ind->rsp.value.chain_weight = co_read16p(¶m->value[offset]);\n      offset += 2;\n    } break;\n\n    case (CPP_CTNL_PT_REQ_SPAN_LENGTH): {\n      ind->rsp.value.span_length = co_read16p(¶m->value[offset]);\n      offset += 2;\n    } break;\n\n    case (CPP_CTNL_PT_START_OFFSET_COMP): {\n      ind->rsp.value.offset_comp = co_read16p(¶m->value[offset]);\n      offset += 2;\n    } break;\n\n    case (CPP_CTNL_REQ_SAMPLING_RATE): {\n      ind->rsp.value.sampling_rate = param->value[offset];\n      offset++;\n    } break;\n\n    case (CPP_CTNL_REQ_FACTORY_CALIBRATION_DATE): {\n      offset += prf_unpack_date_time((uint8_t *)&(param->value[offset]),\n                                     &(ind->rsp.value.factory_calibration));\n    } break;\n\n    case (CPP_CTNL_PT_SET_CUMUL_VAL):\n    case (CPP_CTNL_PT_UPD_SENSOR_LOC):\n    case (CPP_CTNL_PT_SET_CRANK_LENGTH):\n    case (CPP_CTNL_PT_SET_CHAIN_LENGTH):\n    case (CPP_CTNL_PT_SET_CHAIN_WEIGHT):\n    case (CPP_CTNL_PT_SET_SPAN_LENGTH):\n    case (CPP_CTNL_MASK_CP_MEAS_CH_CONTENT): {\n      // No parameters\n    } break;\n\n    default: {\n\n    } break;\n    }\n  }\n\n  // Send the message\n  ke_msg_send(ind);\n\n  return offset;\n}\n#endif //(BLE_CP_COLLECTOR)\n\n/// @} CPP\n"
  },
  {
    "path": "services/ble_profiles/cpp/cppc/src/cppc.h",
    "content": "#ifndef _CPPC_H_\n#define _CPPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CPPC Cycling Power Profile Collector\n * @ingroup CPP\n * @brief Cycling Power Profile Collector\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"cpp_common.h\"\n\n#if (BLE_CP_COLLECTOR)\n\n#include \"cppc_task.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Maximum number of Cycling Power Collector task instances\n#define CPPC_IDX_MAX    (BLE_CONNECTION_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the CPPC task\nenum cppc_states\n{\n    /// Idle state\n    CPPC_FREE,\n    /// Connected state\n    CPPC_IDLE,\n    /// Busy state\n    CPPC_DISCOVERING,\n    /// Busy state\n    CPPC_BUSY,\n\n    /// Number of defined states.\n    CPPC_STATE_MAX\n};\n\n/// Internal codes for reading/writing a CPS characteristic with one single request\nenum cppc_code\n{\n    /// Notified CP Measurement\n    CPPC_NTF_CP_MEAS          = CPP_CPS_MEAS_CHAR,\n    /// Read CP Feature\n    CPPC_RD_CP_FEAT           = CPP_CPS_FEAT_CHAR,\n    /// Read Sensor Location\n    CPPC_RD_SENSOR_LOC        = CPP_CPS_SENSOR_LOC_CHAR,\n    /// Notified Vector\n    CPPC_NTF_CP_VECTOR           = CPP_CPS_VECTOR_CHAR,\n    /// Indicated SC Control Point\n    CPPC_IND_CTNL_PT       = CPP_CPS_CTNL_PT_CHAR,\n\n    /// Read/Write CP Measurement Client Char. Configuration Descriptor\n    CPPC_RD_WR_CP_MEAS_CL_CFG    = (CPPC_DESC_CP_MEAS_CL_CFG   | CPPC_DESC_MASK),\n    /// Read/Write CP Measurement Server Char. Configuration Descriptor\n    CPPC_RD_WR_CP_MEAS_SV_CFG    = (CPPC_DESC_CP_MEAS_SV_CFG   | CPPC_DESC_MASK),\n\n    /// Read/Write Vector Client Char. Configuration Descriptor\n    CPPC_RD_WR_VECTOR_CFG    = (CPPC_DESC_VECTOR_CL_CFG   | CPPC_DESC_MASK),\n    /// Read SC Control Point Client Char. Configuration Descriptor\n    CPPC_RD_WR_CTNL_PT_CFG  = (CPPC_DESC_CTNL_PT_CL_CFG | CPPC_DESC_MASK),\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\nstruct cppc_cnx_env\n{\n    /// Current Operation\n    void *operation;\n    ///Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// Cycling Power Service Characteristics\n    struct cppc_cps_content cps;\n};\n\n/// Cycling Power Profile Collector environment variable\nstruct cppc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct cppc_cnx_env* env[CPPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[CPPC_IDX_MAX];\n};\n\n/// Command Message Basic Structure\nstruct cppc_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n\n    /// MORE DATA\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * GLOBAL FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve CPP client profile interface\n * @return CPP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* cppc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Cycling Power ATT DB discovery results to CPPC host.\n * @param[in] cppc_env environment variable\n * @param[in] conidx Connection index\n * @param[in] status Satus\n ****************************************************************************************\n */\nvoid cppc_enable_rsp_send(struct cppc_env_tag *cppc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send a CPPC_CMP_EVT message when no connection exists (no environment)\n * @param[in] src_id Source task\n * @param[in] dest_id Destination task\n * @param[in] operation Operation\n ****************************************************************************************\n */\nvoid cppc_send_no_conn_cmp_evt(uint8_t src_id, uint8_t dest_id, uint8_t operation);\n\n/**\n ****************************************************************************************\n * @brief Send a CPPC_CMP_EVT message to the task which enabled the profile\n * @param[in] cppc_env environment variable\n * @param[in] conidx Connection index\n * @param[in] operation Operation\n * @param[in] status Satus\n ****************************************************************************************\n */\nvoid cppc_send_cmp_evt(struct cppc_env_tag *cppc_env, uint8_t conidx, uint8_t operation, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Gets correct read handle according to the request\n * @param[in] cppc_env environment variable\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @return handle\n ****************************************************************************************\n */\nuint16_t cppc_get_read_handle_req (struct cppc_env_tag *cppc_env, uint8_t conidx, struct cpps_read_cmd *param);\n\n/**\n ****************************************************************************************\n * @brief Gets correct write handle according to the request\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] cppc_env environment variable\n * @param[out] handle handle\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t cppc_get_write_desc_handle_req (uint8_t conidx, struct cppc_cfg_ntfind_cmd *param, struct cppc_env_tag *cppc_env, uint16_t *handle);\n\n/**\n ****************************************************************************************\n * @brief Unpacks measurement data and sends the indication\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] cppc_env environment variable\n * @return length\n ****************************************************************************************\n */\nuint8_t cppc_unpack_meas_ind (uint8_t conidx, struct gattc_event_ind const *param, struct cppc_env_tag *cppc_env);\n\n/**\n ****************************************************************************************\n * @brief Unpacks Vector data and sends the indication\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] cppc_env environment variable\n * @return length\n ****************************************************************************************\n */\nuint8_t cppc_unpack_vector_ind (uint8_t conidx, struct gattc_event_ind const *param, struct cppc_env_tag *cppc_env);\n\n/**\n ****************************************************************************************\n * @brief Packs Control Point data\n * @param[in] param Pointer to the parameters of the message.\n * @param[out] req packed message\n * @param[out] status status of the operation\n * @return length\n ****************************************************************************************\n */\nuint8_t cppc_pack_ctnl_pt_req (struct cppc_ctnl_pt_cfg_req *param, uint8_t *req, uint8_t *status);\n\n/**\n ****************************************************************************************\n * @brief Unpacks Control Point data and sends the indication\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] cppc_env environment variable\n * @return length\n ****************************************************************************************\n */\nuint8_t cppc_unpack_ctln_pt_ind (uint8_t conidx, struct gattc_event_ind const *param,struct cppc_env_tag *cppc_env);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid cppc_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //(BLE_CP_COLLECTOR)\n\n/// @} CPPC\n\n#endif //(_CPPC_H_)\n"
  },
  {
    "path": "services/ble_profiles/cpp/cppc/src/cppc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup CPPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_CP_COLLECTOR)\n#include \"cpp_common.h\"\n#include \"cppc.h\"\n#include \"cppc_task.h\"\n\n#include \"gap.h\"\n#include \"gattc_task.h\"\n\n#include \"ke_mem.h\"\n#include \"ke_timer.h\"\n\n#include \"co_utils.h\"\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Cycling Power service characteristics\n/// information\nconst struct prf_char_def cppc_cps_char[CPP_CPS_CHAR_MAX] = {\n    /// CP Measurement\n    [CPP_CPS_MEAS_CHAR] = {ATT_CHAR_CP_MEAS, ATT_MANDATORY, ATT_CHAR_PROP_NTF},\n    /// CP Feature\n    [CPP_CPS_FEAT_CHAR] = {ATT_CHAR_CP_FEAT, ATT_MANDATORY, ATT_CHAR_PROP_RD},\n    /// Sensor Location\n    [CPP_CPS_SENSOR_LOC_CHAR] = {ATT_CHAR_SENSOR_LOC, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_RD},\n    /// Vector\n    [CPP_CPS_VECTOR_CHAR] = {ATT_CHAR_CP_VECTOR, ATT_OPTIONAL,\n                             ATT_CHAR_PROP_NTF},\n    /// SC Control Point\n    [CPP_CPS_CTNL_PT_CHAR] = {ATT_CHAR_CP_CNTL_PT, ATT_OPTIONAL,\n                              ATT_CHAR_PROP_WR | ATT_CHAR_PROP_IND},\n};\n\n/// State machine used to retrieve Cycling Power service characteristic\n/// descriptor information\nconst struct prf_char_desc_def cppc_cps_char_desc[CPPC_DESC_MAX] = {\n    /// CP Measurement Char. - Client Characteristic Configuration\n    [CPPC_DESC_CP_MEAS_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                  CPP_CPS_MEAS_CHAR},\n\n    /// CP Measurement Char. - Server Characteristic Configuration\n    [CPPC_DESC_CP_MEAS_SV_CFG] = {ATT_DESC_SERVER_CHAR_CFG, ATT_OPTIONAL,\n                                  CPP_CPS_MEAS_CHAR},\n\n    /// CP Vector Char. - Client Characteristic Configuration\n    [CPPC_DESC_VECTOR_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                 CPP_CPS_VECTOR_CHAR},\n\n    /// Control Point Char. - Client Characteristic Configuration\n    [CPPC_DESC_CTNL_PT_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                  CPP_CPS_CTNL_PT_CHAR},\n};\n\n/*\n * HANDLER FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPC_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cppc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct cppc_enable_req *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  uint8_t state = ke_state_get(dest_id);\n  // Cycling Power Profile Collector Role Task Environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n\n  ASSERT_INFO(cppc_env != NULL, dest_id, src_id);\n  if ((state == CPPC_IDLE) && (cppc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    cppc_env->env[conidx] = (struct cppc_cnx_env *)ke_malloc(\n        sizeof(struct cppc_cnx_env), KE_MEM_ATT_DB);\n    memset(cppc_env->env[conidx], 0, sizeof(struct cppc_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering CPS on peer\n      prf_disc_svc_send(&(cppc_env->prf_env), conidx, ATT_SVC_CYCLING_POWER);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, CPPC_DISCOVERING);\n    }\n    // normal connection, get saved att details\n    else {\n      cppc_env->env[conidx]->cps = param->cps;\n\n      // send APP confirmation that can start normal connection to TH\n      cppc_enable_rsp_send(cppc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  }\n\n  else if (state != CPPC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    cppc_enable_rsp_send(cppc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPC_READ_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cppc_read_req_handler(ke_msg_id_t const msgid,\n                                   struct cpps_read_cmd *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (state == CPPC_IDLE) {\n    ASSERT_INFO(cppc_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (cppc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else {\n      // Get the handler\n      uint16_t hdl = cppc_get_read_handle_req(cppc_env, conidx, param);\n\n      // Check if handle is viable\n      if (hdl != ATT_INVALID_SEARCH_HANDLE) {\n        // Force the operation value\n        param->operation = CPPC_READ_OP_CODE;\n\n        // Store the command structure\n        cppc_env->env[conidx]->operation = param;\n        msg_status = KE_MSG_NO_FREE;\n\n        // Send the read request\n        prf_read_char_send(&(cppc_env->prf_env), conidx,\n                           cppc_env->env[conidx]->cps.svc.shdl,\n                           cppc_env->env[conidx]->cps.svc.ehdl, hdl);\n\n        // Go to the Busy state\n        ke_state_set(dest_id, CPPC_BUSY);\n\n        status = ATT_ERR_NO_ERROR;\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    }\n  } else if (state == CPPC_FREE) {\n    status = GAP_ERR_DISCONNECTED;\n  } else {\n    // Another procedure is pending, keep the command for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // Send the complete event message to the task id stored in the environment\n    cppc_send_cmp_evt(cppc_env, conidx, CPPC_READ_OP_CODE, status);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPC_CFG_NTFIND_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cppc_cfg_ntfind_cmd_handler(ke_msg_id_t const msgid,\n                                         struct cppc_cfg_ntfind_cmd *param,\n                                         ke_task_id_t const dest_id,\n                                         ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n\n  uint8_t state = ke_state_get(dest_id);\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  if (cppc_env != NULL) {\n    // Status\n    uint8_t status = PRF_ERR_REQ_DISALLOWED;\n    // Handle\n    uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n    // Get connection index\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    do {\n      if (state != CPPC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_SAVED;\n        break;\n      }\n\n      ASSERT_ERR(cppc_env->env[conidx] != NULL);\n\n      // Get handle\n      status = cppc_get_write_desc_handle_req(conidx, param, cppc_env, &handle);\n    } while (0);\n\n    if ((status == GAP_ERR_NO_ERROR) && (handle != ATT_INVALID_SEARCH_HANDLE)) {\n      // Set the operation code\n      param->operation = CPPC_CFG_NTF_IND_OP_CODE;\n\n      // Store the command structure\n      cppc_env->env[conidx]->operation = param;\n      msg_status = KE_MSG_NO_FREE;\n\n      // Go to the Busy state\n      ke_state_set(dest_id, CPPC_BUSY);\n\n      // Send GATT Write Request\n      prf_gatt_write_ntf_ind(&cppc_env->prf_env, conidx, handle,\n                             param->ntfind_cfg);\n    }\n  } else {\n    cppc_send_no_conn_cmp_evt(dest_id, src_id, CPPC_CFG_NTF_IND_OP_CODE);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPC_CTNL_PT_CFG_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cppc_ctnl_pt_cfg_req_handler(ke_msg_id_t const msgid,\n                                          struct cppc_ctnl_pt_cfg_req *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (cppc_env != NULL) {\n    // Status\n    uint8_t status = GAP_ERR_NO_ERROR;\n\n    do {\n      // State is Connected or Busy\n      ASSERT_ERR(ke_state_get(dest_id) > CPPC_FREE);\n      // Check the provided connection handle\n      if (cppc_env->env[conidx] == NULL) {\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      if (ke_state_get(dest_id) != CPPC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_SAVED;\n        // Status is GAP_ERR_NO_ERROR, no message will be sent to the\n        // application\n        break;\n      }\n\n      // Check if the characteristic has been found\n      if (cppc_env->env[conidx]->cps.descs[CPPC_DESC_CTNL_PT_CL_CFG].desc_hdl !=\n          ATT_INVALID_SEARCH_HANDLE) {\n        // Request array declaration\n        uint8_t req[CPP_CP_CNTL_PT_REQ_MAX_LEN];\n        // Pack request\n        uint8_t nb = cppc_pack_ctnl_pt_req(param, req, &status);\n\n        if (status == GAP_ERR_NO_ERROR) {\n          // Set the operation code\n          param->operation = CPPC_CTNL_PT_CFG_WR_OP_CODE;\n\n          // Store the command structure\n          cppc_env->env[conidx]->operation = param;\n          // Store the command information\n          msg_status = KE_MSG_NO_FREE;\n\n          // Go to the Busy state\n          ke_state_set(dest_id, CPPC_BUSY);\n\n          // Send the write request\n          prf_gatt_write(\n              &(cppc_env->prf_env), conidx,\n              cppc_env->env[conidx]->cps.chars[CPP_CPS_CTNL_PT_CHAR].val_hdl,\n              (uint8_t *)&req[0], nb, GATTC_WRITE);\n        }\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      // Send a complete event status to the application\n      cppc_send_cmp_evt(cppc_env, conidx, CPPC_CTNL_PT_CFG_WR_OP_CODE, status);\n    }\n  } else {\n    // No connection\n    cppc_send_no_conn_cmp_evt(dest_id, src_id, CPPC_CTNL_PT_CFG_WR_OP_CODE);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPC_TIMEOUT_TIMER_IND message. This\n *message is received when the peer device doesn't send a SC Control Point\n *indication within 30s after reception of the write response.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cppc_timeout_timer_ind_handler(ke_msg_id_t const msgid,\n                                            void const *param,\n                                            ke_task_id_t const dest_id,\n                                            ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (cppc_env != NULL) {\n    ASSERT_ERR(cppc_env->env[conidx]->operation != NULL);\n    ASSERT_ERR(\n        ((struct cppc_cmd *)cppc_env->env[conidx]->operation)->operation ==\n        CPPC_CTNL_PT_CFG_IND_OP_CODE);\n\n    // Send the complete event message\n    cppc_send_cmp_evt(cppc_env, conidx, CPPC_CTNL_PT_CFG_WR_OP_CODE,\n                      PRF_ERR_PROC_TIMEOUT);\n  }\n  // else drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == CPPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n\n    ASSERT_INFO(cppc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(cppc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (cppc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve CPS characteristics and descriptors\n      prf_extract_svc_info(ind, CPP_CPS_CHAR_MAX, &cppc_cps_char[0],\n                           &cppc_env->env[conidx]->cps.chars[0], CPPC_DESC_MAX,\n                           &cppc_cps_char_desc[0],\n                           &cppc_env->env[conidx]->cps.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      cppc_env->env[conidx]->cps.svc.shdl = ind->start_hdl;\n      cppc_env->env[conidx]->cps.svc.ehdl = ind->end_hdl;\n    }\n\n    cppc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n  // Status\n  uint8_t status;\n\n  if (cppc_env != NULL) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    uint8_t state = ke_state_get(dest_id);\n\n    if (state == CPPC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (cppc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity(CPP_CPS_CHAR_MAX,\n                                               cppc_env->env[conidx]->cps.chars,\n                                               cppc_cps_char);\n        }\n        // too much services\n        else if (cppc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              CPPC_DESC_MAX, cppc_env->env[conidx]->cps.descs,\n              cppc_cps_char_desc, cppc_env->env[conidx]->cps.chars);\n        }\n      }\n\n      cppc_enable_rsp_send(cppc_env, conidx, status);\n    }\n\n    else if (state == CPPC_BUSY) {\n      switch (param->operation) {\n      case GATTC_READ: {\n        // Send the complete event status\n        cppc_send_cmp_evt(cppc_env, conidx, CPPC_READ_OP_CODE, param->status);\n      } break;\n\n      case GATTC_WRITE:\n      case GATTC_WRITE_NO_RESPONSE: {\n        uint8_t operation =\n            ((struct cppc_cmd *)cppc_env->env[conidx]->operation)->operation;\n\n        if (operation == CPPC_CFG_NTF_IND_OP_CODE) {\n          // Send the complete event status\n          cppc_send_cmp_evt(cppc_env, conidx, operation, param->status);\n        }\n\n        else if (operation == CPPC_CTNL_PT_CFG_WR_OP_CODE) {\n          if (param->status == GAP_ERR_NO_ERROR) {\n            // Start Timeout Procedure\n            ke_timer_set(CPPC_TIMEOUT_TIMER_IND, dest_id, ATT_TRANS_RTX);\n\n            // Wait for the response indication\n            ((struct cppc_cmd *)cppc_env->env[conidx]->operation)->operation =\n                CPPC_CTNL_PT_CFG_IND_OP_CODE;\n          } else {\n            // Send the complete event status\n            cppc_send_cmp_evt(cppc_env, conidx, operation, param->status);\n          }\n        }\n      } break;\n\n      case GATTC_REGISTER:\n      case GATTC_UNREGISTER: {\n        // Do nothing\n      } break;\n\n      default: {\n        ASSERT_ERR(0);\n      } break;\n      }\n    }\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  // Get the address of the environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n\n  if (state == CPPC_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    ASSERT_INFO(cppc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(cppc_env->env[conidx] != NULL, dest_id, src_id);\n\n    // Send the read value to the HL\n    struct cppc_value_ind *ind = KE_MSG_ALLOC(\n        CPPC_VALUE_IND, prf_dst_task_get(&(cppc_env->prf_env), conidx), dest_id,\n        cppc_value_ind);\n\n    switch (\n        ((struct cpps_read_cmd *)cppc_env->env[conidx]->operation)->read_code) {\n    // Read CP Feature Characteristic value\n    case (CPPC_RD_CP_FEAT): {\n      ind->value.sensor_feat = co_read32p(¶m->value[0]);\n\n      // Mask the reserved bits\n      //                ind->value.sensor_feat &= CPP_FEAT_ALL_SUPP;\n    } break;\n\n    // Read Sensor Location Characteristic value\n    case (CPPC_RD_SENSOR_LOC): {\n      ind->value.sensor_loc = param->value[0];\n    } break;\n\n    // Read Client Characteristic Configuration Descriptor value\n    case (CPPC_RD_WR_CP_MEAS_CL_CFG):\n    case (CPPC_RD_WR_CP_MEAS_SV_CFG):\n    case (CPPC_RD_WR_VECTOR_CFG):\n    case (CPPC_RD_WR_CTNL_PT_CFG): {\n      co_write16p(&ind->value.ntf_cfg, param->value[0]);\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    ind->att_code =\n        ((struct cpps_read_cmd *)cppc_env->env[conidx]->operation)->read_code;\n\n    // Send the message to the application\n    ke_msg_send(ind);\n  }\n  // else drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n\n  if (cppc_env != NULL) {\n    switch (param->type) {\n    case (GATTC_NOTIFY): {\n\n      if (param->handle ==\n          cppc_env->env[conidx]->cps.chars[CPP_CPS_MEAS_CHAR].val_hdl) {\n        // Unpack measurement\n        cppc_unpack_meas_ind(conidx, param, cppc_env);\n      } else if (param->handle == cppc_env->env[conidx]\n                                      ->cps.chars[CPP_CPS_VECTOR_CHAR]\n                                      .val_hdl) {\n        // Unpack vector\n        cppc_unpack_vector_ind(conidx, param, cppc_env);\n      } else {\n        ASSERT_ERR(0);\n      }\n    } break;\n\n    case (GATTC_INDICATE): {\n      // confirm that indication has been correctly received\n      struct gattc_event_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n      cfm->handle = param->handle;\n      ke_msg_send(cfm);\n\n      // Check if we were waiting for the indication\n      if (cppc_env->env[conidx]->operation != NULL) {\n        if (((struct cppc_cmd *)cppc_env->env[conidx]->operation)->operation ==\n            CPPC_CTNL_PT_CFG_IND_OP_CODE) {\n          // Stop the procedure timeout timer\n          ke_timer_clear(CPPC_TIMEOUT_TIMER_IND, dest_id);\n\n          // Unpack control point\n          cppc_unpack_ctln_pt_ind(conidx, param, cppc_env);\n\n          // Send the complete event message\n          cppc_send_cmp_evt(cppc_env, conidx, CPPC_CTNL_PT_CFG_WR_OP_CODE,\n                            GAP_ERR_NO_ERROR);\n        }\n        // else drop the message\n      }\n      // else drop the message\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(cppc){\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {CPPC_READ_CMD, (ke_msg_func_t)cppc_read_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {CPPC_CFG_NTFIND_CMD, (ke_msg_func_t)cppc_cfg_ntfind_cmd_handler},\n    {CPPC_CTNL_PT_CFG_REQ, (ke_msg_func_t)cppc_ctnl_pt_cfg_req_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_EVENT_REQ_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {CPPC_TIMEOUT_TIMER_IND, (ke_msg_func_t)cppc_timeout_timer_ind_handler},\n    {CPPC_ENABLE_REQ, (ke_msg_func_t)cppc_enable_req_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid cppc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct cppc_env_tag *cppc_env = PRF_ENV_GET(CPPC, cppc);\n\n  task_desc->msg_handler_tab = cppc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(cppc_msg_handler_tab);\n  task_desc->state = cppc_env->state;\n  task_desc->idx_max = CPPC_IDX_MAX;\n}\n\n#endif //(BLE_CP_COLLECTOR)\n\n/// @} CPPCTASK\n"
  },
  {
    "path": "services/ble_profiles/cpp/cpps/api/cpps_task.h",
    "content": "#ifndef _CPPS_TASK_H_\n#define _CPPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CPPSTASK Task\n * @ingroup CPPS\n * @brief Cycling Power Profile Task.\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"cpp_common.h\"\n\n\n#include \n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Messages for Cycling Power Profile Sensor\nenum cpps_msg_id\n{\n    /// Start the Cycling Power Profile Server profile\n    CPPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_CPPS),\n    /// Confirm profile\n    CPPS_ENABLE_RSP,\n\n    /// Gets packed data for advertising\n    CPPS_GET_ADV_DATA_REQ,\n    /// Response with packed data for advertising\n    CPPS_GET_ADV_DATA_RSP,\n\n    /// Send a CP Measurement to the peer device (Notification)\n    CPPS_NTF_CP_MEAS_REQ,\n    /// CP Measurement response\n    CPPS_NTF_CP_MEAS_RSP,\n\n    /// Send a CP Vector to the peer device (Notification)\n    CPPS_NTF_CP_VECTOR_REQ,\n    /// CP Vector response\n    CPPS_NTF_CP_VECTOR_RSP,\n\n    /// Send a complete event status to the application\n    CPPS_CMP_EVT,\n\n    /// Indicate that an attribute value has been written\n    CPPS_CFG_NTFIND_IND,\n\n    /// Request to change vector client configuration\n    CPPS_VECTOR_CFG_REQ_IND,\n    /// Confirmation to change vector client configuration\n    CPPS_VECTOR_CFG_CFM,\n\n    /// Indicate that Control Point characteristic value has been written\n    CPPS_CTNL_PT_REQ_IND,\n    /// Application response after receiving a CPPS_CTNL_PT_REQ_IND message\n    CPPS_CTNL_PT_CFM,\n};\n\n/// Operation Code used in the profile state machine\nenum cpps_op_code\n{\n    /// Reserved Operation Code\n    CPPS_RESERVED_OP_CODE          = 0x00,\n\n    /// Enable Profile Operation Code\n    CPPS_ENABLE_REQ_OP_CODE,\n\n    /// Send CP Measurement Operation Code\n    CPPS_NTF_MEAS_OP_CODE,\n\n    /// Send Vector Operation Code\n    CPPS_NTF_VECTOR_OP_CODE,\n\n    /**\n     * Control Point Operation\n     */\n    /// Set Cumulative Value\n    CPPS_CTNL_PT_SET_CUMUL_VAL_OP_CODE,\n    /// Update Sensor Location\n    CPPS_CTNL_PT_UPD_SENSOR_LOC_OP_CODE,\n    /// Request Supported Sensor Locations\n    CPPS_CTNL_PT_REQ_SUPP_SENSOR_LOC_OP_CODE,\n    /// Set Crank Length\n    CPPS_CTNL_PT_SET_CRANK_LENGTH_OP_CODE,\n    /// Request Crank Length\n    CPPS_CTNL_PT_REQ_CRANK_LENGTH_OP_CODE,\n    /// Set Chain Length\n    CPPS_CTNL_PT_SET_CHAIN_LENGTH_OP_CODE,\n    /// Request Chain Length\n    CPPS_CTNL_PT_REQ_CHAIN_LENGTH_OP_CODE,\n    /// Set Chain Weight\n    CPPS_CTNL_PT_SET_CHAIN_WEIGHT_OP_CODE,\n    /// Request Chain Weight\n    CPPS_CTNL_PT_REQ_CHAIN_WEIGHT_OP_CODE,\n    /// Set Span Length\n    CPPS_CTNL_PT_SET_SPAN_LENGTH_OP_CODE,\n    /// Request Span Length\n    CPPS_CTNL_PT_REQ_SPAN_LENGTH_OP_CODE,\n    /// Start Offset Compensation\n    CPPS_CTNL_PT_START_OFFSET_COMP_OP_CODE,\n    /// Mask CP Measurement Characteristic Content\n    CPPS_CTNL_MASK_CP_MEAS_CH_CONTENT_OP_CODE,\n    /// Request Sampling Rate\n    CPPS_CTNL_REQ_SAMPLING_RATE_OP_CODE,\n    /// Request Factory Calibration Date\n    CPPS_CTNL_REQ_FACTORY_CALIBRATION_DATE_OP_CODE,\n\n    /// Error Indication Sent Operation Code\n    CPPS_CTNL_ERR_IND_OP_CODE,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the @ref CPPS_CREATE_DB_REQ message\nstruct cpps_db_cfg\n{\n    /**\n     * CP Feature Value - Not supposed to be modified during the lifetime of the device\n     * This bit field is set in order to decide which features are supported:\n     *   Supported features (specification) ---------------- Bits 0 to 18\n     */\n    uint32_t cp_feature;\n    /// Initial count for wheel revolutions\n    uint32_t wheel_rev;\n    /**\n     * Profile characteristic configuration:\n     *   Enable broadcaster mode in Measurement Characteristic --- Bit 0\n     *   Enable Control Point Characteristic (*) ----------------- Bit 1\n     *\n     * (*) Note this characteristic is mandatory if server supports:\n     *     - Wheel Revolution Data\n     *     - Multiple Sensor Locations\n     *     - Configurable Settings\n     *     - Offset Compensation\n     *     - Server allows to be requested for parameters (CPP_CTNL_PT_REQ... codes)\n     */\n    uint8_t prfl_config;\n    /**\n     * Indicate the sensor location.\n     */\n    uint8_t sensor_loc;\n};\n\n/// Parameters of the @ref CPPS_ENABLE_REQ message\nstruct cpps_enable_req\n{\n    /// Connection index\n    uint8_t conidx;\n    /**\n     * Profile characteristic configuration:\n     *   Measurement Characteristic notification config --- Bit 0\n     *   Measurement Characteristic broadcast config ------ Bit 1\n     *   Vector Characteristic notification config -------- Bit 2\n     *   Control Point Characteristic indication config --- Bit 3\n     */\n    uint16_t prfl_ntf_ind_cfg;\n};\n\n/// Parameters of the @ref CPPS_ENABLE_RSP message\nstruct cpps_enable_rsp\n{\n    /// Connection index\n    uint8_t conidx;\n    /// status\n    uint8_t status;\n};\n\n/// Parameters of the @ref CPPS_GET_ADV_DATA_REQ message\nstruct  cpps_get_adv_data_req\n{\n    ///Parameters\n    struct cpp_cp_meas parameters;\n};\n\n/// Parameters of the @ref CPPS_GET_ADV_DATA_RSP message\nstruct  cpps_get_adv_data_rsp\n{\n    uint8_t status;\n    /// Data length\n    uint8_t data_len;\n    /// Data to advertise\n    uint8_t  adv_data[__ARRAY_EMPTY];\n};\n\n/// Parameters of the @ref CPPS_NTF_CP_MEAS_REQ message\nstruct  cpps_ntf_cp_meas_req\n{\n    ///Parameters\n    struct cpp_cp_meas parameters;\n};\n\n/// Parameters of the @ref CPPS_NTF_CP_MEAS_RSP message\nstruct  cpps_ntf_cp_meas_rsp\n{\n    /// Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref CPPS_NTF_CP_VECTOR_REQ message\nstruct  cpps_ntf_cp_vector_req\n{\n    ///Parameters\n    struct cpp_cp_vector parameters;\n};\n\n/// Parameters of the @ref CPPS_NTF_CP_VECTOR_RSP message\nstruct  cpps_ntf_cp_vector_rsp\n{\n    /// Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref CPPS_CTNL_PT_REQ_IND message\nstruct cpps_ctnl_pt_req_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t op_code;\n    /// Value\n    union cpps_ctnl_pt_req_ind_value\n    {\n        /// Cumulative Value\n        uint32_t cumul_val;\n        /// Sensor Location\n        uint8_t sensor_loc;\n        /// Crank Length\n        uint16_t crank_length;\n        /// Chain Length\n        uint16_t chain_length;\n        /// Chain Weight\n        uint16_t chain_weight;\n        /// Span Length\n        uint16_t span_length;\n        /// Mask Content\n        uint16_t mask_content;\n    } value;\n};\n\n/// Parameters of the @ref CPPS_CTNL_PT_CFM message\nstruct cpps_ctnl_pt_cfm\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t op_code;\n    /// Status\n    uint8_t status;\n    /// Value\n    union cpps_sc_ctnl_pt_cfm_value\n    {\n        /// Supported sensor locations (up to 17)\n        uint32_t supp_sensor_loc;\n        /// New Cumulative Wheel revolution Value\n        uint32_t cumul_wheel_rev;\n        /// Crank Length\n        uint16_t crank_length;\n        /// Chain Length\n        uint16_t chain_length;\n        /// Chain Weight\n        uint16_t chain_weight;\n        /// Span Length\n        uint16_t span_length;\n        /// Offset compensation\n        int16_t offset_comp;\n        /// Mask Measurement content\n        uint16_t mask_meas_content;\n        ///Sampling rate\n        uint8_t sampling_rate;\n        /// New Sensor Location\n        uint8_t sensor_loc;\n        /// Calibration date\n        struct prf_date_time factory_calibration;\n\n    } value;\n};\n\n/// Parameters of the @ref CPPS_CFG_NTFIND_IND message\nstruct cpps_cfg_ntfind_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Characteristic Code (CP Measurement or Control Point)\n    uint8_t char_code;\n    /// Char. Client Characteristic Configuration\n    uint16_t ntf_cfg;\n};\n\n/// Parameters of the @ref CPPS_VECTOR_CFG_REQ_IND message\nstruct cpps_vector_cfg_req_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Characteristic Code\n    uint8_t char_code;\n    /// Char. Client Characteristic Configuration\n    uint16_t ntf_cfg;\n};\n\n/// Parameters of the @ref CPPS_VECTOR_CFG_CFM message\nstruct cpps_vector_cfg_cfm\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Status\n    uint8_t status;\n    /// Char. Client Characteristic Configuration\n    uint16_t ntf_cfg;\n};\n\n/// Parameters of the @ref CPPS_CMP_EVT message\nstruct cpps_cmp_evt\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t operation;\n    /// Operation Status\n    uint8_t status;\n};\n\n/// @} CPPSTASK\n\n#endif //(_CPPS_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/cpp/cpps/src/cpps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup CPPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_CP_SENSOR)\n#include \"co_math.h\"\n#include \"cpp_common.h\"\n#include \"cpps.h\"\n#include \"cpps_task.h\"\n#include \"gap.h\"\n#include \"gattc.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Full CPPS Database Description - Used to add attributes into the database\nstatic const struct attm_desc cpps_att_db[CPS_IDX_NB] = {\n    // Cycling Power Service Declaration\n    [CPS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // CP Measurement Characteristic Declaration\n    [CPS_IDX_CP_MEAS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // CP Measurement Characteristic Value\n    [CPS_IDX_CP_MEAS_VAL] = {ATT_CHAR_CP_MEAS, PERM(NTF, ENABLE),\n                             PERM(RI, ENABLE), CPP_CP_MEAS_NTF_MAX_LEN},\n    // CP Measurement Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [CPS_IDX_CP_MEAS_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                 PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                 0},\n    // CP Measurement Characteristic - Server Characteristic Configuration\n    // Descriptor\n    [CPS_IDX_CP_MEAS_BCST_CFG] = {ATT_DESC_SERVER_CHAR_CFG,\n                                  PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                  0},\n\n    // CP Feature Characteristic Declaration\n    [CPS_IDX_CP_FEAT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // CP Feature Characteristic Value\n    [CPS_IDX_CP_FEAT_VAL] = {ATT_CHAR_CP_FEAT, PERM(RD, ENABLE),\n                             PERM(RI, ENABLE), sizeof(uint32_t)},\n\n    // Sensor Location Characteristic Declaration\n    [CPS_IDX_SENSOR_LOC_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                 0},\n    // Sensor Location Characteristic Value\n    [CPS_IDX_SENSOR_LOC_VAL] = {ATT_CHAR_SENSOR_LOC, PERM(RD, ENABLE),\n                                PERM(RI, ENABLE), sizeof(uint8_t)},\n\n    // CP Vector Characteristic Declaration\n    [CPS_IDX_VECTOR_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // CP Vector Characteristic Value\n    [CPS_IDX_VECTOR_VAL] = {ATT_CHAR_CP_VECTOR, PERM(NTF, ENABLE),\n                            PERM(RI, ENABLE), CPP_CP_VECTOR_MAX_LEN},\n    // CP Vector Characteristic - Client Characteristic Configuration Descriptor\n    [CPS_IDX_VECTOR_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                0},\n\n    // CP Control Point Characteristic Declaration\n    [CPS_IDX_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // CP Control Point Characteristic Value - The response has the maximal\n    // length\n    [CPS_IDX_CTNL_PT_VAL] = {ATT_CHAR_CP_CNTL_PT,\n                             PERM(IND, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                             PERM(RI, ENABLE), CPP_CP_CNTL_PT_RSP_MAX_LEN},\n    // CP Control Point Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [CPS_IDX_CTNL_PT_IND_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                 PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                 0},\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the CPPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t cpps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct cpps_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n  // Service content flag\n  uint32_t cfg_flag = CPPS_MANDATORY_MASK;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  /*\n   * Check if Broadcaster role shall be added.\n   */\n  if (CPPS_IS_FEATURE_SUPPORTED(params->prfl_config,\n                                CPPS_BROADCASTER_SUPP_FLAG)) {\n    // Add configuration to the database\n    cfg_flag |= CPPS_MEAS_BCST_MASK;\n  }\n  /*\n   * Check if the CP Vector characteristic shall be added.\n   * Mandatory if at least one Vector procedure is supported, otherwise\n   * excluded.\n   */\n  if ((CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_CRANK_REV_DATA_SUPP)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_EXTREME_ANGLES_SUPP)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_INSTANT_MEAS_DIRECTION_SUPP))) {\n    cfg_flag |= CPPS_VECTOR_MASK;\n  }\n  /*\n   * Check if the Control Point characteristic shall be added\n   * Mandatory if server supports:\n   *     - Wheel Revolution Data\n   *     - Multiple Sensor Locations\n   *     - Configurable Settings (CPP_CTNL_PT_SET codes)\n   *     - Offset Compensation\n   *     - Server allows to be requested for parameters (CPP_CTNL_PT_REQ codes)\n   */\n  if ((CPPS_IS_FEATURE_SUPPORTED(params->prfl_config,\n                                 CPPS_CTNL_PT_CHAR_SUPP_FLAG)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_WHEEL_REV_DATA_SUPP)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_MULT_SENSOR_LOC_SUPP)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_CRANK_LENGTH_ADJ_SUPP)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_CHAIN_LENGTH_ADJ_SUPP)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_CHAIN_WEIGHT_ADJ_SUPP)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_SPAN_LENGTH_ADJ_SUPP)) ||\n      (CPPS_IS_FEATURE_SUPPORTED(params->cp_feature,\n                                 CPP_FEAT_OFFSET_COMP_SUPP))) {\n    cfg_flag |= CPPS_CTNL_PT_MASK;\n  }\n\n  // Add service in the database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_CYCLING_POWER, (uint8_t *)&cfg_flag, CPS_IDX_NB, NULL,\n      env->task, &cpps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate CPPS required environment variable\n    struct cpps_env_tag *cpps_env = (struct cpps_env_tag *)ke_malloc(\n        sizeof(struct cpps_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize CPPS environment\n    env->env = (prf_env_t *)cpps_env;\n    cpps_env->shdl = *start_hdl;\n    cpps_env->prfl_cfg = cfg_flag;\n    cpps_env->features = params->cp_feature;\n    cpps_env->sensor_loc = params->sensor_loc;\n    cpps_env->cumul_wheel_rev = params->wheel_rev;\n    cpps_env->operation = CPPS_RESERVED_OP_CODE;\n\n    cpps_env->op_data = NULL;\n    memset(cpps_env->env, 0, sizeof(cpps_env->env));\n\n    cpps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Mono Instantiated task\n    cpps_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_CPPS;\n    cpps_task_init(&(env->desc));\n\n    /*\n     * Check if the Broadcaster role shall be added.\n     */\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_MEAS_BCST_MASK)) {\n      // Optional Permissions\n      uint16_t perm = PERM(NTF, ENABLE) | PERM(BROADCAST, ENABLE);\n      // Add configuration to the database\n      attm_att_set_permission(CPPS_HANDLE(CPS_IDX_CP_MEAS_VAL), perm, 0);\n    }\n\n    /* Put CPS in Idle state */\n    ke_state_set(env->task, CPPS_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the CPPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void cpps_destroy(struct prf_task_env *env) {\n  struct cpps_env_tag *cpps_env = (struct cpps_env_tag *)env->env;\n\n  if (cpps_env->op_data != NULL) {\n    ke_free(cpps_env->op_data->cmd);\n    if (cpps_env->op_data->ntf_pending) {\n      ke_free(cpps_env->op_data->ntf_pending);\n    }\n    ke_free(cpps_env->op_data);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(cpps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void cpps_create(struct prf_task_env *env, uint8_t conidx) {\n  struct cpps_env_tag *cpps_env = (struct cpps_env_tag *)env->env;\n\n  memset(&(cpps_env->env[conidx]), 0, sizeof(struct cpps_cnx_env));\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void cpps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct cpps_env_tag *cpps_env = (struct cpps_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  memset(&(cpps_env->env[conidx]), 0, sizeof(struct cpps_cnx_env));\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// CPPS Task interface required by profile manager\nconst struct prf_task_cbs cpps_itf = {\n    (prf_init_fnct)cpps_init,\n    cpps_destroy,\n    cpps_create,\n    cpps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *cpps_prf_itf_get(void) { return &cpps_itf; }\n\nuint8_t cpps_pack_meas_ntf(struct cpp_cp_meas *param, uint8_t *pckd_meas) {\n  // Packed Measurement length\n  uint8_t pckd_meas_len = CPP_CP_MEAS_NTF_MIN_LEN;\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  // Check provided flags\n  if (CPPS_IS_PRESENT(param->flags, CPP_MEAS_PEDAL_POWER_BALANCE_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_PEDAL_POWER_BALANCE_SUPP)) {\n      // Pack Pedal Power Balance info\n      pckd_meas[pckd_meas_len] = param->pedal_power_balance;\n      pckd_meas_len++;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_PEDAL_POWER_BALANCE_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags, CPP_MEAS_ACCUM_TORQUE_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_ACCUM_TORQUE_SUPP)) {\n      // Pack Accumulated Torque info\n      co_write16p(&pckd_meas[pckd_meas_len], param->accum_torque);\n      pckd_meas_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_ACCUM_TORQUE_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags, CPP_MEAS_WHEEL_REV_DATA_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_WHEEL_REV_DATA_SUPP)) {\n      // Pack Wheel Revolution Data (Cumulative Wheel & Last Wheel Event Time)\n      co_write32p(&pckd_meas[pckd_meas_len], cpps_env->cumul_wheel_rev);\n      pckd_meas_len += 4;\n      co_write16p(&pckd_meas[pckd_meas_len], param->last_wheel_evt_time);\n      pckd_meas_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_WHEEL_REV_DATA_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags, CPP_MEAS_CRANK_REV_DATA_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_CRANK_REV_DATA_SUPP)) {\n      // Pack Crank Revolution Data (Cumulative Crank & Last Crank Event Time)\n      co_write16p(&pckd_meas[pckd_meas_len], param->cumul_crank_rev);\n      pckd_meas_len += 2;\n      co_write16p(&pckd_meas[pckd_meas_len], param->last_crank_evt_time);\n      pckd_meas_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_CRANK_REV_DATA_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags,\n                      CPP_MEAS_EXTREME_FORCE_MAGNITUDES_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_EXTREME_MAGNITUDES_SUPP) &&\n        CPPS_IS_CLEAR(cpps_env->features, CPP_FEAT_SENSOR_MEAS_CONTEXT)) {\n      // Pack Extreme Force Magnitudes (Maximum Force Magnitude & Minimum Force\n      // Magnitude)\n      co_write16p(&pckd_meas[pckd_meas_len], param->max_force_magnitude);\n      pckd_meas_len += 2;\n      co_write16p(&pckd_meas[pckd_meas_len], param->min_force_magnitude);\n      pckd_meas_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_EXTREME_FORCE_MAGNITUDES_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags,\n                      CPP_MEAS_EXTREME_TORQUE_MAGNITUDES_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_EXTREME_MAGNITUDES_SUPP) &&\n        CPPS_IS_SET(cpps_env->features, CPP_FEAT_SENSOR_MEAS_CONTEXT)) {\n      // Pack Extreme Force Magnitudes (Maximum Force Magnitude & Minimum Force\n      // Magnitude)\n      co_write16p(&pckd_meas[pckd_meas_len], param->max_torque_magnitude);\n      pckd_meas_len += 2;\n      co_write16p(&pckd_meas[pckd_meas_len], param->min_torque_magnitude);\n      pckd_meas_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_EXTREME_TORQUE_MAGNITUDES_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags, CPP_MEAS_EXTREME_ANGLES_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_EXTREME_ANGLES_SUPP)) {\n      // Pack Extreme Angles (Maximum Angle & Minimum Angle)\n      // Force to 12 bits\n      param->max_angle &= 0x0FFF;\n      param->min_angle &= 0x0FFF;\n      uint32_t angle = (uint32_t)(param->max_angle | (param->min_angle << 12));\n      co_write24p(&pckd_meas[pckd_meas_len], angle);\n      pckd_meas_len += 3;\n\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_EXTREME_ANGLES_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags, CPP_MEAS_TOP_DEAD_SPOT_ANGLE_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_TOPBOT_DEAD_SPOT_ANGLES_SUPP)) {\n      // Pack Top Dead Spot Angle\n      co_write16p(&pckd_meas[pckd_meas_len], param->top_dead_spot_angle);\n      pckd_meas_len += 2;\n    } else {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_TOP_DEAD_SPOT_ANGLE_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags, CPP_MEAS_BOTTOM_DEAD_SPOT_ANGLE_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_TOPBOT_DEAD_SPOT_ANGLES_SUPP)) {\n      // Pack Bottom Dead Spot Angle\n      co_write16p(&pckd_meas[pckd_meas_len], param->bot_dead_spot_angle);\n      pckd_meas_len += 2;\n    } else {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_BOTTOM_DEAD_SPOT_ANGLE_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags, CPP_MEAS_ACCUM_ENERGY_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_ACCUM_ENERGY_SUPP)) {\n      // Pack Accumulated Energy\n      co_write16p(&pckd_meas[pckd_meas_len], param->accum_energy);\n      pckd_meas_len += 2;\n    } else {\n      // Force to not supported\n      param->flags &= ~CPP_MEAS_ACCUM_ENERGY_PRESENT;\n    }\n  }\n\n  // Allow to use reserved flags according to PTS Test\n  // param->flags &= CPP_MEAS_ALL_SUPP;\n  // Flags value\n  co_write16p(&pckd_meas[0], param->flags);\n  // Instant Power (Mandatory)\n  co_write16p(&pckd_meas[2], param->inst_power);\n\n  return pckd_meas_len;\n}\n\nuint8_t cpps_split_meas_ntf(uint8_t conidx,\n                            struct gattc_send_evt_cmd *meas_ntf1) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n  // Extract flags info\n  uint16_t flags = co_read16p(&meas_ntf1->value[0]);\n  // Allocate the GATT notification message\n  struct gattc_send_evt_cmd *meas_ntf2 =\n      KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(&cpps_env->prf_env, conidx),\n                       gattc_send_evt_cmd, CPP_CP_MEAS_NTF_MAX_LEN);\n\n  // Fill in the parameter structure\n  meas_ntf2->operation = GATTC_NOTIFY;\n  meas_ntf2->handle = CPPS_HANDLE(CPS_IDX_CP_MEAS_VAL);\n  meas_ntf2->length = CPP_CP_MEAS_NTF_MIN_LEN;\n\n  // Copy status flags\n  co_write16p(&meas_ntf2->value[0],\n              (flags & (CPP_MEAS_PEDAL_POWER_BALANCE_REFERENCE |\n                        CPP_MEAS_ACCUM_TORQUE_SOURCE |\n                        CPP_MEAS_OFFSET_COMPENSATION_INDICATOR)));\n  // Copy Instantaneous power\n  memcpy(&meas_ntf2->value[2], &meas_ntf1->value[2], 2);\n\n  // Current position\n  uint8_t len = 0;\n\n  for (uint16_t feat = CPP_MEAS_PEDAL_POWER_BALANCE_PRESENT;\n       feat <= CPP_MEAS_OFFSET_COMPENSATION_INDICATOR; feat <<= 1) {\n    // First message fits within the MTU\n    if (meas_ntf1->length <= gattc_get_mtu(conidx) - 3) {\n      // Stop splitting\n      break;\n    }\n\n    if (CPPS_IS_PRESENT(flags, feat)) {\n      switch (feat) {\n      case CPP_MEAS_PEDAL_POWER_BALANCE_PRESENT:\n        // Copy uint8\n        meas_ntf2->value[meas_ntf2->length] =\n            meas_ntf1->value[CPP_CP_MEAS_NTF_MIN_LEN];\n        len = 1;\n        break;\n\n      case CPP_MEAS_ACCUM_TORQUE_PRESENT:\n      case CPP_MEAS_TOP_DEAD_SPOT_ANGLE_PRESENT:\n      case CPP_MEAS_ACCUM_ENERGY_PRESENT:\n      case CPP_MEAS_BOTTOM_DEAD_SPOT_ANGLE_PRESENT:\n        // Copy uint16\n        memcpy(&meas_ntf2->value[meas_ntf2->length],\n               &meas_ntf1->value[CPP_CP_MEAS_NTF_MIN_LEN], 2);\n        len = 2;\n        break;\n\n      case CPP_MEAS_EXTREME_ANGLES_PRESENT:\n        // Copy uint24\n        memcpy(&meas_ntf2->value[meas_ntf2->length],\n               &meas_ntf1->value[CPP_CP_MEAS_NTF_MIN_LEN], 3);\n        len = 3;\n        break;\n\n      case CPP_MEAS_CRANK_REV_DATA_PRESENT:\n      case CPP_MEAS_EXTREME_FORCE_MAGNITUDES_PRESENT:\n      case CPP_MEAS_EXTREME_TORQUE_MAGNITUDES_PRESENT:\n        // Copy uint16 + uint16\n        memcpy(&meas_ntf2->value[meas_ntf2->length],\n               &meas_ntf1->value[CPP_CP_MEAS_NTF_MIN_LEN], 4);\n        len = 4;\n        break;\n\n      case CPP_MEAS_WHEEL_REV_DATA_PRESENT:\n        // Copy uint32 + uint16\n        memcpy(&meas_ntf2->value[meas_ntf2->length],\n               &meas_ntf1->value[CPP_CP_MEAS_NTF_MIN_LEN], 6);\n        len = 6;\n        break;\n\n      default:\n        len = 0;\n        break;\n      }\n\n      if (len) {\n        // Update values\n        meas_ntf2->length += len;\n        // Remove field and flags from the first ntf\n        meas_ntf1->length -= len;\n        memcpy(&meas_ntf1->value[CPP_CP_MEAS_NTF_MIN_LEN],\n               &meas_ntf1->value[CPP_CP_MEAS_NTF_MIN_LEN + len],\n               meas_ntf1->length);\n        // Update flags\n        meas_ntf1->value[0] &= ~feat;\n        meas_ntf2->value[0] |= feat;\n      }\n    }\n  }\n\n  // store the pending notification to send\n  cpps_env->op_data->ntf_pending = meas_ntf2;\n\n  return meas_ntf2->length;\n}\n\nuint8_t\ncpps_update_characteristic_config(uint8_t conidx, uint8_t prfl_config,\n                                  struct gattc_write_req_ind const *param) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get the value\n  uint16_t ntf_cfg = co_read16p(¶m->value[0]);\n\n  switch (prfl_config) {\n  case CPP_PRF_CFG_FLAG_CTNL_PT_IND:\n    // Check CCC configuration\n    if ((ntf_cfg == PRF_CLI_STOP_NTFIND) || (ntf_cfg == PRF_CLI_START_IND)) {\n      // Save the new configuration in the environment\n      (ntf_cfg == PRF_CLI_STOP_NTFIND)\n          ? CPPS_DISABLE_NTF_IND_BCST(conidx, prfl_config)\n          : CPPS_ENABLE_NTF_IND_BCST(conidx, prfl_config);\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n    break;\n\n  case CPP_PRF_CFG_FLAG_VECTOR_NTF:\n    // Do not save until confirmation\n    break;\n\n  case CPP_PRF_CFG_FLAG_SP_MEAS_NTF:\n    // Check CCC configuration\n    if ((ntf_cfg == PRF_SRV_STOP_BCST) || (ntf_cfg == PRF_SRV_START_BCST)) {\n      // Save the new configuration in the environment\n      cpps_env->broadcast_enabled =\n          (ntf_cfg == PRF_SRV_STOP_BCST) ? false : true;\n\n      // Update value for every connection (useful for bond data)\n      for (uint8_t i = 0; i < BLE_CONNECTION_MAX; i++) {\n        // Save the new configuration in the environment\n        (ntf_cfg == PRF_SRV_STOP_BCST)\n            ? CPPS_DISABLE_NTF_IND_BCST(conidx, prfl_config)\n            : CPPS_ENABLE_NTF_IND_BCST(conidx, prfl_config);\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n    break;\n\n  case CPP_PRF_CFG_FLAG_CP_MEAS_NTF:\n\n    // Check CCC configuration\n    if ((ntf_cfg == PRF_CLI_STOP_NTFIND) || (ntf_cfg == PRF_CLI_START_NTF)) {\n      // Save the new configuration in the environment\n      (ntf_cfg == PRF_CLI_STOP_NTFIND)\n          ? CPPS_DISABLE_NTF_IND_BCST(conidx, prfl_config)\n          : CPPS_ENABLE_NTF_IND_BCST(conidx, prfl_config);\n    } else {\n      status = PRF_APP_ERROR;\n    }\n    break;\n\n  default:\n    status = ATT_ERR_INVALID_HANDLE;\n    break;\n  }\n\n  if (status == GAP_ERR_NO_ERROR) {\n    if (prfl_config == CPP_PRF_CFG_FLAG_VECTOR_NTF) {\n      // Allocate message to inform application\n      struct cpps_vector_cfg_req_ind *ind = KE_MSG_ALLOC(\n          CPPS_VECTOR_CFG_REQ_IND, prf_dst_task_get(&cpps_env->prf_env, conidx),\n          prf_src_task_get(&cpps_env->prf_env, conidx),\n          cpps_vector_cfg_req_ind);\n      // Inform APP of configuration change\n      ind->char_code = prfl_config;\n      ind->ntf_cfg = ntf_cfg;\n      ind->conidx = conidx;\n      ke_msg_send(ind);\n    } else {\n      // Allocate message to inform application\n      struct cpps_cfg_ntfind_ind *ind = KE_MSG_ALLOC(\n          CPPS_CFG_NTFIND_IND, prf_dst_task_get(&cpps_env->prf_env, conidx),\n          prf_src_task_get(&cpps_env->prf_env, conidx), cpps_cfg_ntfind_ind);\n      // Inform APP of configuration change\n      ind->char_code = prfl_config;\n      ind->ntf_cfg = ntf_cfg;\n      ind->conidx = conidx;\n      ke_msg_send(ind);\n    }\n    // Enable Bonded Data\n    CPPS_ENABLE_NTF_IND_BCST(conidx, CPP_PRF_CFG_PERFORMED_OK);\n  }\n  return (status);\n}\n\nuint8_t cpps_pack_vector_ntf(struct cpp_cp_vector *param,\n                             uint8_t *pckd_vector) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n  // Packed Measurement length\n  uint8_t pckd_vector_len = CPP_CP_VECTOR_MIN_LEN;\n\n  // Check provided flags\n  if (CPPS_IS_PRESENT(param->flags, CPP_VECTOR_CRANK_REV_DATA_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_CRANK_REV_DATA_SUPP)) {\n      // Pack Crank Revolution Data (Cumulative Crank & Last Crank Event Time)\n      co_write16p(&pckd_vector[pckd_vector_len], param->cumul_crank_rev);\n      pckd_vector_len += 2;\n      co_write16p(&pckd_vector[pckd_vector_len], param->last_crank_evt_time);\n      pckd_vector_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_VECTOR_CRANK_REV_DATA_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags,\n                      CPP_VECTOR_FIRST_CRANK_MEAS_ANGLE_PRESENT)) {\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_EXTREME_ANGLES_SUPP)) {\n      // Pack First Crank Measurement Angle\n      co_write16p(&pckd_vector[pckd_vector_len], param->first_crank_meas_angle);\n      pckd_vector_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_VECTOR_FIRST_CRANK_MEAS_ANGLE_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags,\n                      CPP_VECTOR_INST_FORCE_MAGNITUDE_ARRAY_PRESENT)) {\n    if (CPPS_IS_CLEAR(cpps_env->features, CPP_FEAT_SENSOR_MEAS_CONTEXT)) {\n      // Pack Instantaneous Force Magnitude Array\n      if ((param->nb > CPP_CP_VECTOR_MIN_LEN) &&\n          (param->nb <= CPP_CP_VECTOR_MAX_LEN - pckd_vector_len)) {\n        for (int j = 0; j < param->nb; j++) {\n          co_write16p(&pckd_vector[pckd_vector_len],\n                      param->force_torque_magnitude[j]);\n          pckd_vector_len += 2;\n        }\n      } else {\n        return 0;\n      }\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_VECTOR_INST_FORCE_MAGNITUDE_ARRAY_PRESENT;\n    }\n  }\n\n  if (CPPS_IS_PRESENT(param->flags,\n                      CPP_VECTOR_INST_TORQUE_MAGNITUDE_ARRAY_PRESENT)) {\n    if (CPPS_IS_SET(cpps_env->features, CPP_FEAT_SENSOR_MEAS_CONTEXT)) {\n      // Pack Instantaneous Torque Magnitude Array\n      if ((param->nb > CPP_CP_VECTOR_MIN_LEN) &&\n          (param->nb <= CPP_CP_VECTOR_MAX_LEN - pckd_vector_len)) {\n        for (int j = 0; j < param->nb; j++) {\n          co_write16p(&pckd_vector[pckd_vector_len],\n                      param->force_torque_magnitude[j]);\n          pckd_vector_len += 2;\n        }\n      } else {\n        return 0;\n      }\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~CPP_VECTOR_INST_TORQUE_MAGNITUDE_ARRAY_PRESENT;\n    }\n  }\n\n  // Allow to use reserved flags\n  // param->flags &= CPP_VECTOR_ALL_SUPP;\n  // Flags value\n  pckd_vector[0] = param->flags;\n\n  return pckd_vector_len;\n}\n\nvoid cpps_send_rsp_ind(uint8_t conidx, uint8_t req_op_code, uint8_t status) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  // Allocate the GATT notification message\n  struct gattc_send_evt_cmd *ctl_pt_rsp =\n      KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(&cpps_env->prf_env, conidx),\n                       gattc_send_evt_cmd, CPP_CP_CNTL_PT_RSP_MIN_LEN);\n\n  // Fill in the parameter structure\n  ctl_pt_rsp->operation = GATTC_INDICATE;\n  ctl_pt_rsp->handle = CPPS_HANDLE(CPS_IDX_CTNL_PT_VAL);\n  // Pack Control Point confirmation\n  ctl_pt_rsp->length = CPP_CP_CNTL_PT_RSP_MIN_LEN;\n  // Response Code\n  ctl_pt_rsp->value[0] = CPP_CTNL_PT_RSP_CODE;\n  // Request Operation Code\n  ctl_pt_rsp->value[1] = req_op_code;\n  // Response value\n  ctl_pt_rsp->value[2] = status;\n\n  // Send the event\n  ke_msg_send(ctl_pt_rsp);\n}\n\nuint8_t cpps_unpack_ctnl_point_ind(uint8_t conidx,\n                                   struct gattc_write_req_ind const *param) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  // Indication Status\n  uint8_t ind_status = CPP_CTNL_PT_RESP_NOT_SUPP;\n\n  // Allocate a request indication message for the application\n  struct cpps_ctnl_pt_req_ind *req_ind = KE_MSG_ALLOC(\n      CPPS_CTNL_PT_REQ_IND, prf_dst_task_get(&cpps_env->prf_env, conidx),\n      prf_src_task_get(&cpps_env->prf_env, conidx), cpps_ctnl_pt_req_ind);\n  // Operation Code\n  req_ind->op_code = param->value[0];\n  req_ind->conidx = conidx;\n\n  // Operation Code\n  switch (req_ind->op_code) {\n  case (CPP_CTNL_PT_SET_CUMUL_VAL): {\n    // Check if the Wheel Revolution Data feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_WHEEL_REV_DATA_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = CPP_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 5) {\n        // The request can be handled\n        ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        cpps_env->operation = CPPS_CTNL_PT_SET_CUMUL_VAL_OP_CODE;\n        // Cumulative value\n        req_ind->value.cumul_val = co_read32p(¶m->value[1]);\n      }\n    }\n  } break;\n\n  case (CPP_CTNL_PT_UPD_SENSOR_LOC): {\n    // Check if the Multiple Sensor Location feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_MULT_SENSOR_LOC_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = CPP_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 2) {\n        // Check the sensor location value\n        if (param->value[1] < CPP_LOC_MAX) {\n          // The request can be handled\n          ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n          // Update the environment\n          cpps_env->operation = CPPS_CTNL_PT_UPD_SENSOR_LOC_OP_CODE;\n          // Sensor Location\n          req_ind->value.sensor_loc = param->value[1];\n        }\n      }\n    }\n  } break;\n\n  case (CPP_CTNL_PT_REQ_SUPP_SENSOR_LOC): {\n    // Check if the Multiple Sensor Location feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_MULT_SENSOR_LOC_SUPP)) {\n      // The request can be handled\n      ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n      // Update the environment\n      cpps_env->operation = CPPS_CTNL_PT_REQ_SUPP_SENSOR_LOC_OP_CODE;\n    }\n  } break;\n\n  case (CPP_CTNL_PT_SET_CRANK_LENGTH): {\n    // Check if the Crank Length Adjustment feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_CRANK_LENGTH_ADJ_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = CPP_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 3) {\n        // The request can be handled\n        ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        cpps_env->operation = CPPS_CTNL_PT_SET_CRANK_LENGTH_OP_CODE;\n        // Crank Length\n        req_ind->value.crank_length = co_read16p(¶m->value[1]);\n      }\n    }\n\n  } break;\n\n  case (CPP_CTNL_PT_REQ_CRANK_LENGTH): {\n    // Optional even if feature not supported\n    ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n    // Update the environment\n    cpps_env->operation = CPPS_CTNL_PT_REQ_CRANK_LENGTH_OP_CODE;\n  } break;\n\n  case (CPP_CTNL_PT_SET_CHAIN_LENGTH): {\n    // Check if the Chain Length Adjustment feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_CHAIN_LENGTH_ADJ_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = CPP_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 3) {\n        // The request can be handled\n        ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        cpps_env->operation = CPPS_CTNL_PT_SET_CHAIN_LENGTH_OP_CODE;\n        // Chain Length\n        req_ind->value.crank_length = co_read16p(¶m->value[1]);\n      }\n    }\n\n  } break;\n\n  case (CPP_CTNL_PT_REQ_CHAIN_LENGTH): {\n    // Optional even if feature not supported\n    ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n    // Update the environment\n    cpps_env->operation = CPPS_CTNL_PT_REQ_CHAIN_LENGTH_OP_CODE;\n  } break;\n\n  case (CPP_CTNL_PT_SET_CHAIN_WEIGHT): {\n    // Check if the Chain Weight Adjustment feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_CHAIN_WEIGHT_ADJ_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = CPP_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 3) {\n        // The request can be handled\n        ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        cpps_env->operation = CPPS_CTNL_PT_SET_CHAIN_WEIGHT_OP_CODE;\n        // Chain Weight\n        req_ind->value.chain_weight = co_read16p(¶m->value[1]);\n      }\n    }\n\n  } break;\n\n  case (CPP_CTNL_PT_REQ_CHAIN_WEIGHT): {\n    // Optional even if feature not supported\n    ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n    // Update the environment\n    cpps_env->operation = CPPS_CTNL_PT_REQ_CHAIN_WEIGHT_OP_CODE;\n  } break;\n\n  case (CPP_CTNL_PT_SET_SPAN_LENGTH): {\n    // Check if the Span Length Adjustment feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_SPAN_LENGTH_ADJ_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = CPP_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 3) {\n        // The request can be handled\n        ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        cpps_env->operation = CPPS_CTNL_PT_SET_SPAN_LENGTH_OP_CODE;\n        // Span Length\n        req_ind->value.span_length = co_read16p(¶m->value[1]);\n      }\n    }\n\n  } break;\n\n  case (CPP_CTNL_PT_REQ_SPAN_LENGTH): {\n    // Optional even if feature not supported\n    ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n    // Update the environment\n    cpps_env->operation = CPPS_CTNL_PT_REQ_SPAN_LENGTH_OP_CODE;\n  } break;\n\n  case (CPP_CTNL_PT_START_OFFSET_COMP): {\n    // Check if the Offset Compensation feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_OFFSET_COMP_SUPP)) {\n      // The request can be handled\n      ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n      // Update the environment\n      cpps_env->operation = CPPS_CTNL_PT_START_OFFSET_COMP_OP_CODE;\n    }\n  } break;\n\n  case (CPP_CTNL_MASK_CP_MEAS_CH_CONTENT): {\n    // Check if the CP Masking feature is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                  CPP_FEAT_CP_MEAS_CH_CONTENT_MASKING_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = CPP_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 3) {\n        // The request can be handled\n        ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        cpps_env->operation = CPPS_CTNL_MASK_CP_MEAS_CH_CONTENT_OP_CODE;\n        // Mask content\n        req_ind->value.mask_content = co_read16p(¶m->value[1]);\n      }\n    }\n  } break;\n\n  case (CPP_CTNL_REQ_SAMPLING_RATE): {\n    // Optional even if feature not supported\n    ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n    // Update the environment\n    cpps_env->operation = CPPS_CTNL_REQ_SAMPLING_RATE_OP_CODE;\n  } break;\n\n  case (CPP_CTNL_REQ_FACTORY_CALIBRATION_DATE): {\n    // Optional even if feature not supported\n    ind_status = CPP_CTNL_PT_RESP_SUCCESS;\n    // Update the environment\n    cpps_env->operation = CPPS_CTNL_REQ_FACTORY_CALIBRATION_DATE_OP_CODE;\n  } break;\n\n  default: {\n    // Operation Code is invalid, status is already CPP_CTNL_PT_RESP_NOT_SUPP\n  } break;\n  }\n\n  // If no error raised, inform the application about the request\n  if (ind_status == CPP_CTNL_PT_RESP_SUCCESS) {\n    // Send the request indication to the application\n    ke_msg_send(req_ind);\n    // Go to the Busy status\n    ke_state_set(prf_src_task_get(&cpps_env->prf_env, conidx), CPPS_BUSY);\n  } else {\n    // Free the allocated message\n    ke_msg_free(ke_param2msg(req_ind));\n  }\n\n  return ind_status;\n}\n\nuint8_t cpps_pack_ctnl_point_cfm(uint8_t conidx, struct cpps_ctnl_pt_cfm *param,\n                                 uint8_t *rsp) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n  // Response Length (At least 3)\n  uint8_t rsp_len = CPP_CP_CNTL_PT_RSP_MIN_LEN;\n\n  // Set the Response Code\n  rsp[0] = CPP_CTNL_PT_RSP_CODE;\n  // Set the Response Value\n  rsp[2] = (param->status > CPP_CTNL_PT_RESP_FAILED) ? CPP_CTNL_PT_RESP_FAILED\n                                                     : param->status;\n\n  switch (cpps_env->operation) {\n  case (CPPS_CTNL_PT_SET_CUMUL_VAL_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_SET_CUMUL_VAL;\n\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Save in the environment\n      cpps_env->cumul_wheel_rev = param->value.cumul_wheel_rev;\n    }\n  } break;\n\n  case (CPPS_CTNL_PT_UPD_SENSOR_LOC_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_UPD_SENSOR_LOC;\n\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Store the new value in the environment\n      cpps_env->sensor_loc = param->value.sensor_loc;\n    }\n  } break;\n\n  case (CPPS_CTNL_PT_REQ_SUPP_SENSOR_LOC_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_REQ_SUPP_SENSOR_LOC;\n\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Set the list of supported location\n      for (uint8_t counter = 0; counter < CPP_LOC_MAX; counter++) {\n        if ((param->value.supp_sensor_loc >> counter) & 0x0001) {\n          rsp[rsp_len] = counter;\n          rsp_len++;\n        }\n      }\n    }\n  } break;\n\n  case (CPPS_CTNL_PT_SET_CRANK_LENGTH_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_SET_CRANK_LENGTH;\n  } break;\n\n  case (CPPS_CTNL_PT_REQ_CRANK_LENGTH_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_REQ_CRANK_LENGTH;\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Set the response parameter\n      co_write16p(&rsp[rsp_len], param->value.crank_length);\n      rsp_len += 2;\n    }\n  } break;\n\n  case (CPPS_CTNL_PT_SET_CHAIN_LENGTH_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_SET_CHAIN_LENGTH;\n  } break;\n\n  case (CPPS_CTNL_PT_REQ_CHAIN_LENGTH_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_REQ_CHAIN_LENGTH;\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Set the response parameter\n      co_write16p(&rsp[rsp_len], param->value.chain_length);\n      rsp_len += 2;\n    }\n  } break;\n\n  case (CPPS_CTNL_PT_SET_CHAIN_WEIGHT_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_SET_CHAIN_WEIGHT;\n  } break;\n\n  case (CPPS_CTNL_PT_REQ_CHAIN_WEIGHT_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_REQ_CHAIN_WEIGHT;\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Set the response parameter\n      co_write16p(&rsp[rsp_len], param->value.chain_weight);\n      rsp_len += 2;\n    }\n  } break;\n\n  case (CPPS_CTNL_PT_SET_SPAN_LENGTH_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_SET_SPAN_LENGTH;\n  } break;\n\n  case (CPPS_CTNL_PT_REQ_SPAN_LENGTH_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_REQ_SPAN_LENGTH;\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Set the response parameter\n      co_write16p(&rsp[rsp_len], param->value.span_length);\n      rsp_len += 2;\n    }\n  } break;\n\n  case (CPPS_CTNL_PT_START_OFFSET_COMP_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_PT_START_OFFSET_COMP;\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Set the response parameter\n      co_write16p(&rsp[rsp_len], param->value.offset_comp);\n      rsp_len += 2;\n    }\n  } break;\n\n  case (CPPS_CTNL_MASK_CP_MEAS_CH_CONTENT_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_MASK_CP_MEAS_CH_CONTENT;\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      uint16_t cpp_mask_cp_meas_flags[] = {\n          CPP_MEAS_PEDAL_POWER_BALANCE_PRESENT,\n          CPP_MEAS_ACCUM_TORQUE_PRESENT,\n          CPP_MEAS_WHEEL_REV_DATA_PRESENT,\n          CPP_MEAS_CRANK_REV_DATA_PRESENT,\n          CPP_MEAS_EXTREME_FORCE_MAGNITUDES_PRESENT |\n              CPP_MEAS_EXTREME_TORQUE_MAGNITUDES_PRESENT,\n          CPP_MEAS_EXTREME_ANGLES_PRESENT,\n          CPP_MEAS_TOP_DEAD_SPOT_ANGLE_PRESENT,\n          CPP_MEAS_BOTTOM_DEAD_SPOT_ANGLE_PRESENT,\n          CPP_MEAS_ACCUM_ENERGY_PRESENT,\n      };\n\n      uint16_t mask = 0;\n      for (uint8_t count = 0; count < 9; count++) {\n        if ((param->value.mask_meas_content >> count) & 0x0001) {\n          mask |= cpp_mask_cp_meas_flags[count];\n        }\n      }\n      cpps_env->env[conidx].mask_meas_content = mask;\n    }\n  } break;\n\n  case (CPPS_CTNL_REQ_SAMPLING_RATE_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_REQ_SAMPLING_RATE;\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Set the response parameter\n      rsp[rsp_len] = param->value.sampling_rate;\n      rsp_len++;\n    }\n  } break;\n\n  case (CPPS_CTNL_REQ_FACTORY_CALIBRATION_DATE_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = CPP_CTNL_REQ_FACTORY_CALIBRATION_DATE;\n    if (param->status == CPP_CTNL_PT_RESP_SUCCESS) {\n      // Set the response parameter\n      rsp_len += prf_pack_date_time(&rsp[rsp_len],\n                                    &(param->value.factory_calibration));\n    }\n  } break;\n\n  default: {\n    rsp[2] = CPP_CTNL_PT_RESP_NOT_SUPP;\n  } break;\n  }\n\n  return rsp_len;\n}\n\nint cpps_update_cfg_char_value(uint8_t conidx, uint8_t con_type, uint8_t handle,\n                               uint16_t ntf_cfg, uint16_t cfg_flag) {\n  uint8_t status = ATT_ERR_NO_ERROR;\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  if (con_type != PRF_CON_DISCOVERY) {\n    // Save the new configuration in the environment\n    ((ntf_cfg & cfg_flag) == 0) ? CPPS_DISABLE_NTF_IND_BCST(conidx, cfg_flag)\n                                : CPPS_ENABLE_NTF_IND_BCST(conidx, cfg_flag);\n  }\n\n  return (status);\n}\n\nvoid cpps_send_cmp_evt(uint8_t conidx, uint8_t src_id, uint8_t dest_id,\n                       uint8_t operation, uint8_t status) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n  // Go back to the IDLE if the state is busy\n  if (ke_state_get(src_id) == CPPS_BUSY) {\n    ke_state_set(src_id, CPPS_IDLE);\n  }\n\n  // Set the operation code\n  cpps_env->operation = CPPS_RESERVED_OP_CODE;\n\n  // Send the message\n  struct cpps_cmp_evt *evt =\n      KE_MSG_ALLOC(CPPS_CMP_EVT, dest_id, src_id, cpps_cmp_evt);\n\n  evt->conidx = conidx;\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\nvoid cpps_exe_operation(void) {\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  ASSERT_ERR(cpps_env->op_data != NULL);\n\n  bool finished = true;\n\n  while ((cpps_env->op_data->cursor < BLE_CONNECTION_MAX) && finished) {\n    uint8_t conidx = cpps_env->op_data->cursor;\n\n    switch (cpps_env->operation) {\n    case CPPS_NTF_MEAS_OP_CODE: {\n      // notification is pending, send it first\n      if (cpps_env->op_data->ntf_pending != NULL) {\n        ke_msg_send(cpps_env->op_data->ntf_pending);\n        cpps_env->op_data->ntf_pending = NULL;\n        finished = false;\n      }\n      // Check if sending of notifications has been enabled\n      else if (CPPS_IS_NTF_IND_BCST_ENABLED(conidx,\n                                            CPP_PRF_CFG_FLAG_CP_MEAS_NTF)) {\n        struct cpps_ntf_cp_meas_req *meas_cmd =\n            (struct cpps_ntf_cp_meas_req *)ke_msg2param(cpps_env->op_data->cmd);\n        // Save flags value\n        uint16_t flags = meas_cmd->parameters.flags;\n\n        // Mask unwanted fields if supported\n        if (CPPS_IS_FEATURE_SUPPORTED(\n                cpps_env->features, CPP_FEAT_CP_MEAS_CH_CONTENT_MASKING_SUPP)) {\n          meas_cmd->parameters.flags &=\n              ~cpps_env->env[conidx].mask_meas_content;\n        }\n\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *meas_val = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n            prf_src_task_get(&(cpps_env->prf_env), conidx), gattc_send_evt_cmd,\n            CPP_CP_MEAS_NTF_MAX_LEN);\n\n        // Fill in the parameter structure\n        meas_val->operation = GATTC_NOTIFY;\n        meas_val->handle = CPPS_HANDLE(CPS_IDX_CP_MEAS_VAL);\n        // pack measured value in database\n        meas_val->length =\n            cpps_pack_meas_ntf(&meas_cmd->parameters, meas_val->value);\n\n        if (meas_val->length > gattc_get_mtu(conidx) - 3) {\n          // Split (if necessary)\n          cpps_split_meas_ntf(conidx, meas_val);\n        }\n\n        // Restore flags value\n        meas_cmd->parameters.flags = flags;\n\n        // Send the event\n        ke_msg_send(meas_val);\n\n        finished = false;\n      }\n      // update cursor only if all notification has been sent\n      if (cpps_env->op_data->ntf_pending == NULL) {\n        cpps_env->op_data->cursor++;\n      }\n    } break;\n\n    case CPPS_NTF_VECTOR_OP_CODE: {\n      struct cpps_ntf_cp_vector_req *vector_cmd =\n          (struct cpps_ntf_cp_vector_req *)ke_msg2param(cpps_env->op_data->cmd);\n\n      // Check if sending of notifications has been enabled\n      if (CPPS_IS_NTF_IND_BCST_ENABLED(conidx, CPP_PRF_CFG_FLAG_VECTOR_NTF)) {\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *vector_val = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n            prf_src_task_get(&(cpps_env->prf_env), conidx), gattc_send_evt_cmd,\n            CPP_CP_VECTOR_MAX_LEN);\n\n        // Fill in the parameter structure\n        vector_val->operation = GATTC_NOTIFY;\n        vector_val->handle = CPPS_HANDLE(CPS_IDX_VECTOR_VAL);\n        // pack measured value in database\n        vector_val->length =\n            cpps_pack_vector_ntf(&vector_cmd->parameters, vector_val->value);\n\n        // Send the event\n        ke_msg_send(vector_val);\n\n        finished = false;\n      }\n\n      cpps_env->op_data->cursor++;\n    } break;\n\n    default:\n      ASSERT_ERR(0);\n      break;\n    }\n  }\n\n  // check if operation is finished\n  if (finished) {\n    if (cpps_env->operation == CPPS_NTF_MEAS_OP_CODE) {\n      // send response to requester\n      struct cpps_ntf_cp_meas_rsp *rsp =\n          KE_MSG_ALLOC(CPPS_NTF_CP_MEAS_RSP, cpps_env->op_data->cmd->src_id,\n                       cpps_env->op_data->cmd->dest_id, cpps_ntf_cp_meas_rsp);\n\n      rsp->status = GAP_ERR_NO_ERROR;\n      ke_msg_send(rsp);\n    } else if (cpps_env->operation == CPPS_NTF_VECTOR_OP_CODE) {\n      // send response to requester\n      struct cpps_ntf_cp_vector_rsp *rsp =\n          KE_MSG_ALLOC(CPPS_NTF_CP_VECTOR_RSP, cpps_env->op_data->cmd->src_id,\n                       cpps_env->op_data->cmd->dest_id, cpps_ntf_cp_vector_rsp);\n\n      rsp->status = GAP_ERR_NO_ERROR;\n      ke_msg_send(rsp);\n    }\n\n    // free operation data\n    ke_msg_free(cpps_env->op_data->cmd);\n    ke_free(cpps_env->op_data);\n    cpps_env->op_data = NULL;\n    // Set the operation code\n    cpps_env->operation = CPPS_RESERVED_OP_CODE;\n    // go back to idle state\n    ke_state_set(prf_src_task_get(&(cpps_env->prf_env), 0), CPPS_IDLE);\n  }\n}\n\n#endif //(BLE_CP_SENSOR)\n\n/// @} CPPS\n"
  },
  {
    "path": "services/ble_profiles/cpp/cpps/src/cpps.h",
    "content": "#ifndef _CPPS_H_\n#define _CPPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CPPS Cycling Power Profile Sensor\n * @ingroup CPP\n * @brief Cycling Power Profile Sensor\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"cpp_common.h\"\n\n#if (BLE_CP_SENSOR)\n\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"cpps_task.h\"\n#include \"attm.h\"\n#include \"co_math.h\"\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Maximum number of Cycling Power Profile Sensor role task instances\n#define CPPS_IDX_MAX        1\n\n/********************************************\n ******* CPPS Configuration Flag Masks ******\n ********************************************/\n\n/// Mandatory Attributes (CP Measurement + CP Feature + CP Sensor Location)\n#define CPPS_MANDATORY_MASK           (0x01EF)\n/// Broadcast Attribute\n#define CPPS_MEAS_BCST_MASK           (0x0010)\n/// Vector Attributes\n#define CPPS_VECTOR_MASK              (0x0E00)\n/// Control Point Attributes\n#define CPPS_CTNL_PT_MASK             (0x7000)\n\n/// Broadcast supported flag\n#define CPPS_BROADCASTER_SUPP_FLAG    (0x01)\n/// Control Point supported flag\n#define CPPS_CTNL_PT_CHAR_SUPP_FLAG    (0x02)\n\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n#define CPPS_IS_FEATURE_SUPPORTED(features, flag) ((features & flag) == flag)\n\n#define CPPS_IS_PRESENT(features, flag)           ((features & flag) == flag)\n\n#define CPPS_IS_SET(features, flag)               (features & flag)\n\n#define CPPS_IS_CLEAR(features, flag)             ((features & flag) == 0)\n\n#define CPPS_ENABLE_NTF_IND_BCST(idx, ccc_flag)              (cpps_env->env[idx].prfl_ntf_ind_cfg |= ccc_flag)\n\n#define CPPS_DISABLE_NTF_IND_BCST(idx, ccc_flag)             (cpps_env->env[idx].prfl_ntf_ind_cfg &= ~ccc_flag)\n\n#define CPPS_IS_NTF_IND_BCST_ENABLED(idx, ccc_flag)          ((cpps_env->env[idx].prfl_ntf_ind_cfg & ccc_flag) == ccc_flag)\n\n// MACRO TO CALCULATE HANDLE    shdl + idx - BCST - VECTOR\n// BCST is 1 if the broadcast mode is supported otherwise 0\n// VECTOR is 3 if the Vector characteristic is supported otherwise 0\n#define CPPS_HANDLE(idx) \\\n    (cpps_env->shdl + (idx) - \\\n        ((!(CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_MEAS_BCST_MASK)) && \\\n                ((idx) > CPS_IDX_CP_MEAS_BCST_CFG))? (1) : (0)) - \\\n        ((!(CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_VECTOR_MASK)) && \\\n                ((idx) > CPS_IDX_VECTOR_CHAR))? (3) : (0)))\n\n// Get database attribute index\n #define CPPS_IDX(hdl) \\\n    ((hdl - cpps_env->shdl) + \\\n        ((!(CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_MEAS_BCST_MASK)) && \\\n                ((hdl - cpps_env->shdl) > CPS_IDX_CP_MEAS_BCST_CFG)) ? (1) : (0)) + \\\n        ((!(CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_VECTOR_MASK)) && \\\n                ((hdl - cpps_env->shdl) > CPS_IDX_VECTOR_CHAR)) ? (3) : (0)))\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the CPPS task\nenum cpps_state\n{\n    /// Idle state\n    CPPS_IDLE,\n    /// Busy state\n    CPPS_BUSY,\n\n    /// Number of defined states.\n    CPPS_STATE_MAX\n};\n/// Cycling Power Service - Attribute List\nenum cpps_cps_att_list\n{\n    /// Cycling Power Service\n    CPS_IDX_SVC,\n    /// CP Measurement\n    CPS_IDX_CP_MEAS_CHAR,\n    CPS_IDX_CP_MEAS_VAL,\n    CPS_IDX_CP_MEAS_NTF_CFG,\n    CPS_IDX_CP_MEAS_BCST_CFG,\n    /// CP Feature\n    CPS_IDX_CP_FEAT_CHAR,\n    CPS_IDX_CP_FEAT_VAL,\n    /// Sensor Location\n    CPS_IDX_SENSOR_LOC_CHAR,\n    CPS_IDX_SENSOR_LOC_VAL,\n    /// CP Vector\n    CPS_IDX_VECTOR_CHAR,\n    CPS_IDX_VECTOR_VAL,\n    CPS_IDX_VECTOR_NTF_CFG,\n    /// CP Control Point\n    CPS_IDX_CTNL_PT_CHAR,\n    CPS_IDX_CTNL_PT_VAL,\n    CPS_IDX_CTNL_PT_IND_CFG,\n\n    /// Number of attributes\n    CPS_IDX_NB,\n};\n\n\n/// Profile Configuration Additional Flags ()\nenum cpps_prf_cfg_flag\n{\n    /// CP Measurement - Client Char. Cfg\n    CPP_PRF_CFG_FLAG_CP_MEAS_NTF  = 0x01,\n\n    /// CP Measurement - Server Char. Cfg\n    CPP_PRF_CFG_FLAG_SP_MEAS_NTF  = 0x02,\n\n    /// CP Vector - Client Characteristic configuration\n    CPP_PRF_CFG_FLAG_VECTOR_NTF   = 0x04,\n\n    /// Control Point - Client Characteristic configuration\n    CPP_PRF_CFG_FLAG_CTNL_PT_IND  = 0x08,\n\n    /// Bonded data used\n    CPP_PRF_CFG_PERFORMED_OK      = 0x80,\n};\n\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// ongoing operation information\nstruct cpps_op\n{\n    /// On-going operation command\n    struct ke_msg * cmd;\n    /// notification pending\n    struct gattc_send_evt_cmd* ntf_pending;\n\n    /// Cursor on connection\n    uint8_t cursor;\n};\n\n/// Cycling Power Profile Sensor environment variable per connection\nstruct cpps_cnx_env\n{\n    /// Measurement content mask\n    uint16_t mask_meas_content;\n    /// Profile Notify/Indication Flags\n    uint8_t prfl_ntf_ind_cfg;\n};\n\n/// Cycling Power Profile Sensor environment variable\nstruct cpps_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct cpps_cnx_env env[BLE_CONNECTION_MAX];\n    /// On-going operation\n    struct cpps_op * op_data;\n\n    /// Feature Configuration Flags\n    uint32_t features;\n\n    /// Instantaneous Power\n    uint32_t inst_power;\n    /// Cumulative Value\n    uint32_t cumul_wheel_rev;\n\n    /// Cycling Speed and Cadence Service Start Handle\n    uint16_t shdl;\n    /// Profile Configuration Flags\n    uint16_t prfl_cfg;\n    /// Operation\n    uint8_t operation;\n\n    /// Sensor Location\n    uint8_t sensor_loc;\n\n    /// State of different task instances\n    ke_state_t state[CPPS_IDX_MAX];\n\n    /// Broadcast advertisements are active\n    bool broadcast_enabled;\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Retrieve CPP service profile interface\n *\n * @return CPP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* cpps_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Packs measurement notifications\n * @param[in] param Pointer to the parameters of the message.\n * @param[out] pckd_meas pointer to packed message\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t cpps_pack_meas_ntf(struct cpp_cp_meas *param, uint8_t *pckd_meas);\n\n/**\n ****************************************************************************************\n * @brief Splits notifications in order to be sent with default MTU\n * @param[in] conidx connection index\n * @param[out] meas_val message to split\n * @return length of the second notification\n ****************************************************************************************\n */\nuint8_t cpps_split_meas_ntf(uint8_t conidx, struct gattc_send_evt_cmd *meas_val);\n\n/**\n ****************************************************************************************\n * @brief updates the environment with the descriptor configuration and sends indication\n * @param[in] conidx connection index\n * @param[in] prfl_config profile descriptor code\n * @param[in] param pointer to the message parameters\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t cpps_update_characteristic_config(uint8_t conidx, uint8_t prfl_config, struct gattc_write_req_ind const *param);\n\n/**\n ****************************************************************************************\n * @brief Packs vector notifications\n * @param[in] param Pointer to the parameters of the message.\n * @param[out] pckd_vector pointer to packed message\n * @return length\n ****************************************************************************************\n */\nuint8_t cpps_pack_vector_ntf(struct cpp_cp_vector *param, uint8_t *pckd_vector);\n\n/**\n ****************************************************************************************\n * @brief Unpack control point and sends indication\n * @param[in] conidx connection index\n * @param[in] param pointer to message\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t cpps_unpack_ctnl_point_ind (uint8_t conidx, struct gattc_write_req_ind const *param);\n\n/**\n ****************************************************************************************\n * @brief Packs control point\n * @param[in] conidx connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[out] rsp pointer to message\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t cpps_pack_ctnl_point_cfm (uint8_t conidx, struct cpps_ctnl_pt_cfm *param, uint8_t *rsp);\n\n/**\n ****************************************************************************************\n * @brief Update database in non discovery modes\n * @param[in] conidx connection index\n * @param[in] con_type Connection type\n * @param[in] handle handle\n * @param[in] ntf_cfg provided flag\n * @param[in] cfg_flag requested flag\n * @return status of the operation\n ****************************************************************************************\n */\nint cpps_update_cfg_char_value (uint8_t conidx, uint8_t con_type, uint8_t handle, uint16_t ntf_cfg, uint16_t cfg_flag);\n\n/**\n ****************************************************************************************\n * @brief Send a CPPS_CMP_EVT message to the application.\n * @param[in] conidx connection index\n * @param[in] src_id Source task\n * @param[in] dest_id Destination task\n * @param[in] operation Operation completed\n * @param[in] status status of the operation\n ****************************************************************************************\n */\nvoid cpps_send_cmp_evt(uint8_t conidx, uint8_t src_id, uint8_t dest_id, uint8_t operation, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send a control point response to the peer\n * @param[in] conidx connection index\n * @param[in] req_op_code operation code\n * @param[in] status status of the operation\n ****************************************************************************************\n */\nvoid cpps_send_rsp_ind(uint8_t conidx, uint8_t req_op_code, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief  This function fully manages notification of measurement and vector\n ****************************************************************************************\n */\nvoid cpps_exe_operation(void);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid cpps_task_init(struct ke_task_desc *task_desc);\n\n#endif //(BLE_CP_SENSOR)\n\n/// @} CPPS\n\n#endif //(_CPPS_H_)\n"
  },
  {
    "path": "services/ble_profiles/cpp/cpps/src/cpps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup CPPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_CP_SENSOR)\n#include \"cpp_common.h\"\n\n#include \"co_math.h\"\n#include \"cpps.h\"\n#include \"cpps_task.h\"\n#include \"gapc.h\"\n#include \"gattc.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n *  CYCLING POWER SERVICE ATTRIBUTES\n ****************************************************************************************\n */\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPS_ENABLE_REQ message.\n * @param[in] msgid Id of the message received\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n\nstatic int cpps_enable_req_handler(ke_msg_id_t const msgid,\n                                   struct cpps_enable_req *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == CPPS_IDLE) {\n    // Bonded data was not used before\n    if (!CPPS_IS_PRESENT(cpps_env->env[param->conidx].prfl_ntf_ind_cfg,\n                         CPP_PRF_CFG_PERFORMED_OK)) {\n      status = GAP_ERR_NO_ERROR;\n      // Save configuration and set flag\n      cpps_env->env[param->conidx].prfl_ntf_ind_cfg = param->prfl_ntf_ind_cfg;\n      // Enable Bonded Data\n      CPPS_ENABLE_NTF_IND_BCST(param->conidx, CPP_PRF_CFG_PERFORMED_OK);\n    }\n  }\n\n  // send completed information to APP task that contains error status\n  struct cpps_enable_rsp *cmp_evt =\n      KE_MSG_ALLOC(CPPS_ENABLE_RSP, src_id, dest_id, cpps_enable_rsp);\n  cmp_evt->status = status;\n  cmp_evt->conidx = param->conidx;\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPS_GET_ADV_DATA_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int cpps_get_adv_data_req_handler(ke_msg_id_t const msgid,\n                                         struct cpps_get_adv_data_req *param,\n                                         ke_task_id_t const dest_id,\n                                         ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // State shall not be Connected or Busy\n  if (ke_state_get(dest_id) == CPPS_IDLE) {\n    // Get the address of the environment\n    struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n    // Allocate the message\n    struct cpps_get_adv_data_rsp *rsp =\n        KE_MSG_ALLOC_DYN(CPPS_GET_ADV_DATA_RSP, src_id, dest_id,\n                         cpps_get_adv_data_rsp, CPP_CP_MEAS_ADV_MAX_LEN);\n    // Set status\n    rsp->status = GAP_ERR_COMMAND_DISALLOWED;\n    // Set length\n    rsp->data_len = 0;\n\n    // Check Broadcast is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_MEAS_BCST_MASK)) {\n      // Check if broadcast has been enabled\n      if (cpps_env->broadcast_enabled) {\n        // Pack Cp Measurement\n        rsp->adv_data[0] =\n            cpps_pack_meas_ntf(¶m->parameters, &rsp->adv_data[4]) +\n            CPP_CP_ADV_HEADER_LEN;\n        // Pack Service Data AD type\n        rsp->adv_data[1] = GAP_AD_TYPE_SERVICE_16_BIT_DATA;\n        // Pack UUID of CPS\n        co_write16p(&rsp->adv_data[2], ATT_SVC_CYCLING_POWER);\n\n        // Set data length\n        rsp->data_len = rsp->adv_data[0] + CPP_CP_ADV_LENGTH_LEN;\n        // Set status\n        rsp->status = GAP_ERR_NO_ERROR;\n      }\n    }\n\n    // Send message\n    ke_msg_send(rsp);\n  } else {\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (msg_status);\n}\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPS_NTF_CP_MEAS_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int cpps_ntf_cp_meas_req_handler(ke_msg_id_t const msgid,\n                                        struct cpps_ntf_cp_meas_req *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_NO_FREE;\n\n  // State shall not be Connected or Busy\n  if (ke_state_get(dest_id) == CPPS_IDLE) {\n    // Get the address of the environment\n    struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n    // Configure the environment\n    cpps_env->operation = CPPS_NTF_MEAS_OP_CODE;\n    // allocate operation data\n    cpps_env->op_data =\n        (struct cpps_op *)ke_malloc(sizeof(struct cpps_op), KE_MEM_KE_MSG);\n    cpps_env->op_data->cmd = ke_param2msg(param);\n    cpps_env->op_data->cursor = 0;\n    cpps_env->op_data->ntf_pending = NULL;\n\n    // Go to busy state\n    ke_state_set(dest_id, CPPS_BUSY);\n\n    // Should be updated just once\n    if (CPPS_IS_PRESENT(param->parameters.flags,\n                        CPP_MEAS_WHEEL_REV_DATA_PRESENT)) {\n      if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->features,\n                                    CPP_FEAT_WHEEL_REV_DATA_SUPP)) {\n        // Update the cumulative wheel revolutions value stored in the\n        // environment The value shall not decrement below zero\n        if (param->parameters.cumul_wheel_rev < 0) {\n          cpps_env->cumul_wheel_rev =\n              (co_abs(param->parameters.cumul_wheel_rev) >\n               cpps_env->cumul_wheel_rev)\n                  ? 0\n                  : cpps_env->cumul_wheel_rev +\n                        param->parameters.cumul_wheel_rev;\n        } else {\n          cpps_env->cumul_wheel_rev += param->parameters.cumul_wheel_rev;\n        }\n      }\n    }\n\n    // start operation execution\n    cpps_exe_operation();\n  } else {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPS_NTF_CP_VECTOR_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int cpps_ntf_cp_vector_req_handler(ke_msg_id_t const msgid,\n                                          struct cpps_ntf_cp_vector_req *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // State shall be Connected or Busy\n  if (ke_state_get(dest_id) == CPPS_IDLE) {\n    // Get the address of the environment\n    struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n    // Check Vector characteristic is supported\n    if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_VECTOR_MASK)) {\n      // Configure the environment\n      cpps_env->operation = CPPS_NTF_VECTOR_OP_CODE;\n      // allocate operation data\n      cpps_env->op_data =\n          (struct cpps_op *)ke_malloc(sizeof(struct cpps_op), KE_MEM_KE_MSG);\n      cpps_env->op_data->cmd = ke_param2msg(param);\n      cpps_env->op_data->cursor = 0;\n      cpps_env->op_data->ntf_pending = NULL;\n      // Go to busy state\n      ke_state_set(dest_id, CPPS_BUSY);\n      // start operation execution\n      cpps_exe_operation();\n\n      msg_status = KE_MSG_NO_FREE;\n    } else {\n      // send response to requester\n      struct cpps_ntf_cp_vector_rsp *rsp = KE_MSG_ALLOC(\n          CPPS_NTF_CP_VECTOR_RSP, src_id, dest_id, cpps_ntf_cp_vector_rsp);\n\n      rsp->status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n      ke_msg_send(rsp);\n    }\n  } else {\n    // Keep the message for later\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_WRITE_REQ_IND message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_write_req_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_write_req_ind const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Control Point Status\n  uint8_t ctl_pt_status = CPP_CTNL_PT_RESP_SUCCESS;\n\n  if (cpps_env != NULL) {\n    // CP Measurement Characteristic, Client Characteristic Configuration\n    // Descriptor\n    if (param->handle == (CPPS_HANDLE(CPS_IDX_CP_MEAS_NTF_CFG))) {\n      // Update value\n      status = cpps_update_characteristic_config(\n          conidx, CPP_PRF_CFG_FLAG_CP_MEAS_NTF, param);\n    }\n    // CP Measurement Characteristic, Server Characteristic Configuration\n    // Descriptor\n    else if (param->handle == (CPPS_HANDLE(CPS_IDX_CP_MEAS_BCST_CFG))) {\n      if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_MEAS_BCST_MASK)) {\n        // Save value\n        status = cpps_update_characteristic_config(\n            conidx, CPP_PRF_CFG_FLAG_SP_MEAS_NTF, param);\n      } else {\n        status = ATT_ERR_ATTRIBUTE_NOT_FOUND;\n      }\n    }\n    // CP Vector Characteristic, Client Characteristic Configuration Descriptor\n    else if (param->handle == (CPPS_HANDLE(CPS_IDX_VECTOR_NTF_CFG))) {\n      if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_VECTOR_MASK)) {\n        // Update value\n        status = cpps_update_characteristic_config(\n            conidx, CPP_PRF_CFG_FLAG_VECTOR_NTF, param);\n      } else {\n        status = ATT_ERR_ATTRIBUTE_NOT_FOUND;\n      }\n    }\n    // CP Control Point Characteristic\n    else {\n      if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_CTNL_PT_MASK)) {\n        // CP Control Point, Client Characteristic Configuration Descriptor\n        if (param->handle == (CPPS_HANDLE(CPS_IDX_CTNL_PT_IND_CFG))) {\n          // Update value\n          status = cpps_update_characteristic_config(\n              conidx, CPP_PRF_CFG_FLAG_CTNL_PT_IND, param);\n        }\n        // CP Control Point Characteristic\n        else if (param->handle == (CPPS_HANDLE(CPS_IDX_CTNL_PT_VAL))) {\n          do {\n            // Check if sending of indications has been enabled\n            if (!CPPS_IS_NTF_IND_BCST_ENABLED(conidx,\n                                              CPP_PRF_CFG_FLAG_CTNL_PT_IND)) {\n              // CPP improperly configured\n              status = PRF_CCCD_IMPR_CONFIGURED;\n              break;\n            }\n\n            if (cpps_env->operation >= CPPS_CTNL_PT_SET_CUMUL_VAL_OP_CODE) {\n              // A procedure is already in progress\n              status = CPP_ERROR_PROC_IN_PROGRESS;\n              break;\n            }\n\n            if (cpps_env->operation == CPPS_NTF_MEAS_OP_CODE) {\n              // Keep the message until the end of the current procedure\n              msg_status = KE_MSG_NO_FREE;\n              break;\n            }\n            // Unpack Control Point parameters\n            ctl_pt_status = cpps_unpack_ctnl_point_ind(conidx, param);\n\n          } while (0);\n        } else {\n          ASSERT_ERR(0);\n        }\n      } else {\n        status = ATT_ERR_ATTRIBUTE_NOT_FOUND;\n      }\n    }\n\n    // Vector confirmation is sent by calling cpps_vector_cfg_cfm_handler\n    if (param->handle != (CPPS_HANDLE(CPS_IDX_VECTOR_NTF_CFG))) {\n      // Send write response\n      struct gattc_write_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n      cfm->handle = param->handle;\n      cfm->status = status;\n      ke_msg_send(cfm);\n\n      // Check if control point failed\n      if ((param->handle == (CPPS_HANDLE(CPS_IDX_CTNL_PT_VAL))) &&\n          (ctl_pt_status != CPP_CTNL_PT_RESP_SUCCESS)) {\n        // Send response to peer\n        cpps_send_rsp_ind(conidx, param->value[0], ctl_pt_status);\n      }\n    }\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_att_info_req_ind_handler(ke_msg_id_t const msgid,\n                                          struct gattc_att_info_req_ind *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == CPPS_IDLE) {\n    // Get the address of the environment\n    struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n    uint8_t att_idx = CPPS_IDX(param->handle);\n    struct gattc_att_info_cfm *cfm;\n\n    // Send write response\n    cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n    cfm->handle = param->handle;\n\n    // check if it's a client configuration char\n    if ((att_idx == CPS_IDX_CP_MEAS_NTF_CFG) ||\n        (att_idx == CPS_IDX_CP_MEAS_BCST_CFG) ||\n        (att_idx == CPS_IDX_VECTOR_NTF_CFG) ||\n        (att_idx == CPS_IDX_CTNL_PT_IND_CFG)) {\n      // CCC attribute length = 2\n      cfm->length = 2;\n      cfm->status = GAP_ERR_NO_ERROR;\n    }\n\n    else if (att_idx == CPS_IDX_CTNL_PT_VAL) {\n      // force length to zero to reject any write starting from something != 0\n      cfm->length = 0;\n      cfm->status = GAP_ERR_NO_ERROR;\n    }\n    // not expected request\n    else {\n      cfm->length = 0;\n      cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                      struct gattc_read_req_ind const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == CPPS_IDLE) {\n    // Get the address of the environment\n    struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n    uint8_t conidx = KE_IDX_GET(src_id);\n    uint8_t att_idx = CPPS_IDX(param->handle);\n\n    uint8_t value[4];\n    uint8_t value_size = 0;\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    switch (att_idx) {\n    case CPS_IDX_CP_MEAS_NTF_CFG: {\n      value_size = sizeof(uint16_t);\n      co_write16p(value, (cpps_env->env[conidx].prfl_ntf_ind_cfg &\n                          CPP_PRF_CFG_FLAG_CP_MEAS_NTF)\n                             ? PRF_CLI_START_NTF\n                             : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    case CPS_IDX_CP_MEAS_BCST_CFG: {\n      // Broadcast feature is profile specific\n      if (CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_MEAS_BCST_MASK)) {\n        // Fill data\n        value_size = sizeof(uint16_t);\n        // Broadcast status is also masked per connection (useful for bonding\n        // data)\n        co_write16p(value, (cpps_env->env[conidx].prfl_ntf_ind_cfg &\n                            CPP_PRF_CFG_FLAG_SP_MEAS_NTF)\n                               ? PRF_SRV_START_BCST\n                               : PRF_SRV_STOP_BCST);\n      } else {\n        status = ATT_ERR_ATTRIBUTE_NOT_FOUND;\n      }\n    } break;\n\n    case CPS_IDX_VECTOR_NTF_CFG: {\n      // Fill data\n      value_size = sizeof(uint16_t);\n      co_write16p(value, (cpps_env->env[conidx].prfl_ntf_ind_cfg &\n                          CPP_PRF_CFG_FLAG_VECTOR_NTF)\n                             ? PRF_CLI_START_NTF\n                             : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    case CPS_IDX_CTNL_PT_IND_CFG: {\n      // Fill data\n      value_size = sizeof(uint16_t);\n      co_write16p(value, (cpps_env->env[conidx].prfl_ntf_ind_cfg &\n                          CPP_PRF_CFG_FLAG_CTNL_PT_IND)\n                             ? PRF_CLI_START_IND\n                             : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    case CPS_IDX_CP_FEAT_VAL: {\n      // Fill data\n      value_size = sizeof(uint32_t);\n      co_write32p(value, cpps_env->features);\n    } break;\n\n    case CPS_IDX_SENSOR_LOC_VAL: {\n      // Fill data\n      value_size = sizeof(uint8_t);\n      value[0] = cpps_env->sensor_loc;\n    } break;\n\n    default: {\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, value_size);\n    cfm->length = value_size;\n    memcpy(cfm->value, value, value_size);\n    cfm->handle = param->handle;\n    cfm->status = status;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPS_VECTOR_CFG_CFM message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int cpps_vector_cfg_cfm_handler(ke_msg_id_t const msgid,\n                                       struct cpps_vector_cfg_cfm *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n  // Status\n  uint8_t status = PRF_APP_ERROR;\n\n  if (ke_state_get(dest_id) == CPPS_IDLE) {\n    if (param->status == GAP_ERR_NO_ERROR) {\n      if ((param->ntf_cfg == PRF_CLI_STOP_NTFIND) ||\n          (param->ntf_cfg == PRF_CLI_START_NTF)) {\n        // Save the new configuration in the environment\n        (param->ntf_cfg == PRF_CLI_STOP_NTFIND)\n            ? CPPS_DISABLE_NTF_IND_BCST(param->conidx,\n                                        CPP_PRF_CFG_FLAG_VECTOR_NTF)\n            : CPPS_ENABLE_NTF_IND_BCST(param->conidx,\n                                       CPP_PRF_CFG_FLAG_VECTOR_NTF);\n\n        status = GAP_ERR_NO_ERROR;\n      }\n    }\n\n    // Send write response\n    struct gattc_write_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_WRITE_CFM, KE_BUILD_ID(TASK_GATTC, param->conidx),\n                     dest_id, gattc_write_cfm);\n    cfm->handle = CPPS_HANDLE(CPS_IDX_VECTOR_NTF_CFG);\n    cfm->status = status;\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CPPS_CTNL_PT_CFM message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int cpps_ctnl_pt_cfm_handler(ke_msg_id_t const msgid,\n                                    struct cpps_ctnl_pt_cfm *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  if (ke_state_get(dest_id) == CPPS_BUSY) {\n    do {\n      // Check the current operation\n      if (cpps_env->operation < CPPS_CTNL_PT_SET_CUMUL_VAL_OP_CODE) {\n        // The confirmation has been sent without request indication, ignore\n        break;\n      }\n\n      // The CP Control Point Characteristic must be supported if we are here\n      if (!CPPS_IS_FEATURE_SUPPORTED(cpps_env->prfl_cfg, CPPS_CTNL_PT_MASK)) {\n        status = PRF_ERR_REQ_DISALLOWED;\n        break;\n      }\n\n      // Check if sending of indications has been enabled\n      if (!CPPS_IS_NTF_IND_BCST_ENABLED(param->conidx,\n                                        CPP_PRF_CFG_FLAG_CTNL_PT_IND)) {\n        // CPP improperly configured\n        status = PRF_CCCD_IMPR_CONFIGURED;\n        break;\n      }\n\n      // Allocate the GATT notification message\n      struct gattc_send_evt_cmd *ctl_pt_rsp = KE_MSG_ALLOC_DYN(\n          GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, param->conidx), dest_id,\n          gattc_send_evt_cmd, CPP_CP_CNTL_PT_RSP_MAX_LEN);\n\n      // Fill in the parameter structure\n      ctl_pt_rsp->operation = GATTC_INDICATE;\n      ctl_pt_rsp->handle = CPPS_HANDLE(CPS_IDX_CTNL_PT_VAL);\n      // Pack Control Point confirmation\n      ctl_pt_rsp->length =\n          cpps_pack_ctnl_point_cfm(param->conidx, param, ctl_pt_rsp->value);\n\n      // Send the event\n      ke_msg_send(ctl_pt_rsp);\n\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      // Inform the application that a procedure has been completed\n      cpps_send_cmp_evt(param->conidx,\n                        prf_src_task_get(&cpps_env->prf_env, param->conidx),\n                        prf_dst_task_get(&cpps_env->prf_env, param->conidx),\n                        cpps_env->operation, status);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATT_NOTIFY_CMP_EVT message meaning that a notification\n *or an indication has been correctly sent to peer device (but not confirmed by\n *peer device).\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                 struct gattc_cmp_evt const *param,\n                                 ke_task_id_t const dest_id,\n                                 ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  // Check if a connection exists\n  if (ke_state_get(dest_id) == CPPS_BUSY) {\n    switch (param->operation) {\n    case (GATTC_NOTIFY): {\n      // On-going operation execution\n      cpps_exe_operation();\n    } break;\n\n    case (GATTC_INDICATE): {\n      ASSERT_INFO(cpps_env->operation >= CPPS_CTNL_PT_SET_CUMUL_VAL_OP_CODE, 0,\n                  0);\n\n      // Inform the application that a procedure has been completed\n      cpps_send_cmp_evt(conidx, prf_src_task_get(&cpps_env->prf_env, conidx),\n                        prf_dst_task_get(&cpps_env->prf_env, conidx),\n                        cpps_env->operation, param->status);\n      // else ignore the message\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(cpps){\n    {CPPS_ENABLE_REQ, (ke_msg_func_t)cpps_enable_req_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {CPPS_GET_ADV_DATA_REQ, (ke_msg_func_t)cpps_get_adv_data_req_handler},\n    {CPPS_NTF_CP_MEAS_REQ, (ke_msg_func_t)cpps_ntf_cp_meas_req_handler},\n    {CPPS_NTF_CP_VECTOR_REQ, (ke_msg_func_t)cpps_ntf_cp_vector_req_handler},\n    {CPPS_CTNL_PT_CFM, (ke_msg_func_t)cpps_ctnl_pt_cfm_handler},\n    {CPPS_VECTOR_CFG_CFM, (ke_msg_func_t)cpps_vector_cfg_cfm_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid cpps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct cpps_env_tag *cpps_env = PRF_ENV_GET(CPPS, cpps);\n\n  task_desc->msg_handler_tab = cpps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(cpps_msg_handler_tab);\n  task_desc->state = cpps_env->state;\n  task_desc->idx_max = CPPS_IDX_MAX;\n}\n\n#endif //(BLE_CSC_SENSOR)\n\n/// @} CPPSTASK\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscp_common.h",
    "content": "#ifndef _CSCP_COMMON_H_\n#define _CSCP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CSCP Cycling Speed and Cadence Profile\n * @ingroup PROFILE\n * @brief Cycling Speed and Cadence Profile\n *\n * The Cycling Speed and Cadence profile enables a Collector device to connect and\n * interact with a Cycling Speed and Cadence Sensor for use in sports and fitness\n * applications.\n *\n * This file contains all definitions that are common for the server and the client parts\n * of the profile.\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Procedure Already in Progress Error Code\n#define CSCP_ERROR_PROC_IN_PROGRESS         (0x80)\n/// Client Characteristic Configuration descriptor improperly configured Error Code\n#define CSCP_ERROR_CCC_INVALID_PARAM        (0x81)\n\n/// CSC Measurement Value Min Length\n#define CSCP_CSC_MEAS_MIN_LEN               (1)\n/// CSC Measurement Value Max Length\n#define CSCP_CSC_MEAS_MAX_LEN               (11)\n/// SC Control Point Request Value Min Length\n#define CSCP_SC_CNTL_PT_REQ_MIN_LEN         (1)\n/// SC Control Point Request Value Max Length\n#define CSCP_SC_CNTL_PT_REQ_MAX_LEN         (5)\n/// SC Control Point Response Value Min Length\n#define CSCP_SC_CNTL_PT_RSP_MIN_LEN         (3)\n/// SC Control Point Response Value Max Length\n#define CSCP_SC_CNTL_PT_RSP_MAX_LEN         (CSCP_SC_CNTL_PT_RSP_MIN_LEN + CSCP_LOC_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Cycling Speed and Cadence Service Characteristics\nenum cscp_cscs_char\n{\n    /// CSC Measurement\n    CSCP_CSCS_CSC_MEAS_CHAR,\n    /// CSC Feature\n    CSCP_CSCS_CSC_FEAT_CHAR,\n    /// Sensor Location\n    CSCP_CSCS_SENSOR_LOC_CHAR,\n    /// SC Control Point\n    CSCP_CSCS_SC_CTNL_PT_CHAR,\n\n    CSCP_CSCS_CHAR_MAX,\n};\n\n/// CSC Measurement Flags\nenum cscp_meas_flags\n{\n    /// Wheel Revolution Data Present\n    CSCP_MEAS_WHEEL_REV_DATA_PRESENT    = 0x01,\n    /// Crank Revolution Data Present\n    CSCP_MEAS_CRANK_REV_DATA_PRESENT    = 0x02,\n\n    /// All present\n    CSCP_MEAS_ALL_PRESENT               = 0x03,\n};\n\n/// CSC Feature Flags\nenum cscp_feat_flags\n{\n    /// Wheel Revolution Data Supported\n    CSCP_FEAT_WHEEL_REV_DATA_SUPP       = 0x0001,\n    /// Crank Revolution Data Supported\n    CSCP_FEAT_CRANK_REV_DATA_SUPP       = 0x0002,\n    /// Multiple Sensor Location Supported\n    CSCP_FEAT_MULT_SENSOR_LOC_SUPP      = 0x0004,\n\n    /// All supported\n    CSCP_FEAT_ALL_SUPP                  = 0x0007,\n};\n\n/// Sensor Locations Keys\nenum cscp_sensor_loc\n{\n    /// Other (0)\n    CSCP_LOC_OTHER          = 0,\n    /// Front Wheel (4)\n    CSCP_LOC_FRONT_WHEEL    = 4,\n    /// Left Crank (5)\n    CSCP_LOC_LEFT_CRANK,\n    /// Right Crank (6)\n    CSCP_LOC_RIGHT_CRANK,\n    /// Left Pedal (7)\n    CSCP_LOC_LEFT_PEDAL,\n    /// Right Pedal (8)\n    CSCP_LOC_RIGHT_PEDAL,\n    /// Rear Dropout (9)\n    CSCP_LOC_REAR_DROPOUT,\n    /// Chainstay (10)\n    CSCP_LOC_CHAINSTAY,\n    /// Front Hub (11)\n    CSCP_LOC_FRONT_HUB,\n    /// Rear Wheel (12)\n    CSCP_LOC_REAR_WHEEL,\n    /// Rear Hub (13)\n    CSCP_LOC_REAR_HUB,\n\n    CSCP_LOC_MAX,\n};\n\n/// Control Point Operation Code Keys\nenum cscp_sc_ctnl_pt_op_code\n{\n    /// Reserved value\n    CSCP_CTNL_PT_OP_RESERVED        = 0,\n\n    /// Set Cumulative Value\n    CSCP_CTNL_PT_OP_SET_CUMUL_VAL,\n    /// Start Sensor Calibration\n    CSCP_CTNL_PT_OP_START_CALIB,\n    /// Update Sensor Location\n    CSCP_CTNL_PT_OP_UPD_LOC,\n    /// Request Supported Sensor Locations\n    CSCP_CTNL_PT_OP_REQ_SUPP_LOC,\n\n    /// Response Code\n    CSCP_CTNL_PT_RSP_CODE           = 16,\n};\n\n/// Control Point Response Value\nenum cscp_ctnl_pt_resp_val\n{\n    /// Reserved value\n    CSCP_CTNL_PT_RESP_RESERVED      = 0,\n\n    /// Success\n    CSCP_CTNL_PT_RESP_SUCCESS,\n    /// Operation Code Not Supported\n    CSCP_CTNL_PT_RESP_NOT_SUPP,\n    /// Invalid Parameter\n    CSCP_CTNL_PT_RESP_INV_PARAM,\n    /// Operation Failed\n    CSCP_CTNL_PT_RESP_FAILED,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// CSC Measurement\nstruct cscp_csc_meas\n{\n    /// Flags\n    uint8_t flags;\n    /// Cumulative Crank Revolution\n    uint16_t cumul_crank_rev;\n    /// Last Crank Event Time\n    uint16_t last_crank_evt_time;\n    /// Last Wheel Event Time\n    uint16_t last_wheel_evt_time;\n    /// Cumulative Wheel Revolution\n    uint32_t cumul_wheel_rev;\n};\n\n/// SC Control Point Request\nstruct cscp_sc_ctnl_pt_req\n{\n    /// Operation Code\n    uint8_t op_code;\n    /// Value\n    union cscp_sc_ctnl_pt_req_val\n    {\n        /// Sensor Location\n        uint8_t sensor_loc;\n        /// Cumulative value\n        uint32_t cumul_val;\n    } value;\n};\n\n/// SC Control Point Response\nstruct cscp_sc_ctnl_pt_rsp\n{\n    /// Requested Operation Code\n    uint8_t req_op_code;\n    /// Response Value\n    uint8_t resp_value;\n    /// List of supported locations\n    uint16_t supp_loc;\n};\n\n\n/// @} cscp_common\n\n#endif //(_CSCP_COMMON_H_)\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscpc/api/cscpc_task.h",
    "content": "#ifndef _CSCPC_TASK_H_\n#define _CSCPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CSCPCTASK Cycling Speed and Cadence Profile Collector Task\n * @ingroup CSCPC\n * @brief Cycling Speed and Cadence Profile Collector Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"cscp_common.h\"\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Message IDs\nenum cscpc_msg_ids\n{\n    /// Enable the Cycling Speed and Cadence Profile Collector task - at connection\n    CSCPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_CSCPC),\n    /// Enable the Cycling Speed and Cadence Profile Collector task - at connection\n    CSCPC_ENABLE_RSP,\n\n    /// Read the value of an attribute in the peer device database\n    CSCPC_READ_CMD,\n\n    /// Configure sending of notification or indication\n    CSCPC_CFG_NTFIND_CMD,\n\n    /// Configure the SC Control Point value\n    CSCPC_CTNL_PT_CFG_REQ,\n    /// SC Control Point value response\n    CSCPC_CTNL_PT_RSP,\n\n    /// Indicate that an attribute value has been received either upon notification or read response\n    CSCPC_VALUE_IND,\n\n    /// Complete Event Information\n    CSCPC_CMP_EVT,\n\n    /// Procedure Timeout Timer\n    CSCPC_TIMEOUT_TIMER_IND,\n};\n\n/// Operation Codes\nenum cscpc_op_codes\n{\n    /// Reserved operation code\n    CSCPC_RESERVED_OP_CODE  = 0x00,\n\n    /// Read attribute value Procedure\n    CSCPC_READ_OP_CODE,\n\n    /// Wait for the Write Response after having written a Client Char. Cfg. Descriptor.\n    CSCPC_CFG_NTF_IND_OP_CODE,\n    /// Wait for the Write Response after having written the SC Control Point Char.\n    CSCPC_CTNL_PT_CFG_WR_OP_CODE,\n    /// Wait for the Indication Response after having written the SC Control Point Char.\n    CSCPC_CTNL_PT_CFG_IND_OP_CODE,\n};\n\n/*\n * API MESSAGE STRUCTURES\n ****************************************************************************************\n */\n\n/// Cycling Speed and Cadence Service Characteristic Descriptors\nenum cscpc_cscs_descs\n{\n    /// CSC Measurement Char. - Client Characteristic Configuration\n    CSCPC_DESC_CSC_MEAS_CL_CFG,\n    /// SC Control Point Char. - Client Characteristic Configuration\n    CSCPC_DESC_SC_CTNL_PT_CL_CFG,\n\n    CSCPC_DESC_MAX,\n\n    CSCPC_DESC_MASK = 0x10,\n};\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Cycling Speed and Cadence Service\n */\nstruct cscpc_cscs_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - CSC Measurement\n    ///  - CSC Feature\n    ///  - Sensor Location\n    ///  - SC Control Point\n    struct prf_char_inf chars[CSCP_CSCS_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - CSC Measurement Client Cfg\n    ///  - SC Control Point Client Cfg\n    struct prf_char_desc_inf descs[CSCPC_DESC_MAX];\n};\n\n/// Parameters of the @ref CSCPC_ENABLE_REQ message\nstruct cscpc_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n    /// Existing handle values CSCS\n    struct cscpc_cscs_content cscs;\n};\n\n/// Parameters of the @ref CSCPC_ENABLE_RSP message\nstruct cscpc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values CPS\n    struct cscpc_cscs_content cscs;\n};\n\n/// Parameters of the @ref CSCPC_READ_CMD message\nstruct cscpc_read_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Read code\n    uint8_t read_code;\n};\n\n/// Parameters of the @ref CSCPC_CFG_NTFIND_CMD message\nstruct cscpc_cfg_ntfind_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Descriptor code\n    uint8_t desc_code;\n    /// Ntf/Ind Configuration\n    uint16_t ntfind_cfg;\n};\n\n/// Parameters of the @ref CSCPC_CTNL_PT_CFG_REQ message\nstruct cscpc_ctnl_pt_cfg_req\n{\n    /// Operation Code\n    uint8_t operation;\n    /// SC Control Point Request\n    struct cscp_sc_ctnl_pt_req sc_ctnl_pt;\n};\n\n/// Parameters of the @ref CSCPC_CTNL_PT_RSP message\nstruct cscpc_ctnl_pt_rsp\n{\n    /// SC Control Point Response\n    struct cscp_sc_ctnl_pt_rsp ctnl_pt_rsp;\n};\n\n\n/// Parameters of the @ref CSCPC_VALUE_IND message\nstruct cscpc_value_ind\n{\n    /// Attribute Code\n    uint8_t att_code;\n    /// Value\n    union cscpc_value_tag\n    {\n        /// CSC Measurement\n        struct cscp_csc_meas csc_meas;\n        /// CSC Feature\n        uint16_t sensor_feat;\n        /// Sensor Location\n        uint8_t sensor_loc;\n        /// Client Characteristic Configuration Descriptor Value\n        uint16_t ntf_cfg;\n    } value;\n};\n\n/// Parameters of the @ref CSCPC_CMP_EVT message\nstruct cscpc_cmp_evt\n{\n    /// Operation code\n    uint8_t operation;\n    /// Status\n    uint8_t status;\n};\n\n/// @} CSCPCTASK\n\n#endif //(_CSCPC_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscpc/src/cscpc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup CSCPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_CSC_COLLECTOR)\n#include \"cscp_common.h\"\n\n#include \"cscpc.h\"\n#include \"cscpc_task.h\"\n#include \"ke_timer.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * GLOBAL VARIABLES DECLARATION\n ****************************************************************************************\n */\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the CSCPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t cscpc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct cscpc_env_tag *cscpc_env = (struct cscpc_env_tag *)ke_malloc(\n      sizeof(struct cscpc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate CSCPC required environment variable\n  env->env = (prf_env_t *)cscpc_env;\n\n  cscpc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  cscpc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_CSCPC;\n  cscpc_task_init(&(env->desc));\n\n  for (idx = 0; idx < CSCPC_IDX_MAX; idx++) {\n    cscpc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), CSCPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void cscpc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct cscpc_env_tag *cscpc_env = (struct cscpc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (cscpc_env->env[conidx] != NULL) {\n    if (cscpc_env->env[conidx]->operation != NULL) {\n      ke_free(ke_param2msg(cscpc_env->env[conidx]->operation));\n    }\n    ke_timer_clear(CSCPC_TIMEOUT_TIMER_IND,\n                   prf_src_task_get(&cscpc_env->prf_env, conidx));\n\n    ke_free(cscpc_env->env[conidx]);\n    cscpc_env->env[conidx] = NULL;\n  }\n\n  /* Put CSCP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), CSCPC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the CSCPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void cscpc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct cscpc_env_tag *cscpc_env = (struct cscpc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < CSCPC_IDX_MAX; idx++) {\n    cscpc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(cscpc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void cscpc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put CSCP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), CSCPC_IDLE);\n}\n\n/// CSCPC Task interface required by profile manager\nconst struct prf_task_cbs cscpc_itf = {\n    cscpc_init,\n    cscpc_destroy,\n    cscpc_create,\n    cscpc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *cscpc_prf_itf_get(void) { return &cscpc_itf; }\n\nvoid cscpc_enable_rsp_send(struct cscpc_env_tag *cscpc_env, uint8_t conidx,\n                           uint8_t status) {\n  // Send to APP the details of the discovered attributes on CSCPS\n  struct cscpc_enable_rsp *rsp = KE_MSG_ALLOC(\n      CSCPC_ENABLE_RSP, prf_dst_task_get(&(cscpc_env->prf_env), conidx),\n      prf_src_task_get(&(cscpc_env->prf_env), conidx), cscpc_enable_rsp);\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->cscs = cscpc_env->env[conidx]->cscs;\n    // Register CSCPC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(cscpc_env->prf_env), conidx,\n                             &(cscpc_env->env[conidx]->cscs.svc));\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(cscpc_env->prf_env), conidx), CSCPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nvoid cscpc_send_no_conn_cmp_evt(uint8_t src_id, uint8_t dest_id,\n                                uint8_t operation) {\n  // Send the message\n  struct cscpc_cmp_evt *evt =\n      KE_MSG_ALLOC(CSCPC_CMP_EVT, dest_id, src_id, cscpc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = PRF_ERR_REQ_DISALLOWED;\n\n  ke_msg_send(evt);\n}\n\nvoid cscpc_send_cmp_evt(struct cscpc_env_tag *cscpc_env, uint8_t conidx,\n                        uint8_t operation, uint8_t status) {\n  // Free the stored operation if needed\n  if (cscpc_env->env[conidx]->operation != NULL) {\n    ke_msg_free(ke_param2msg(cscpc_env->env[conidx]->operation));\n    cscpc_env->env[conidx]->operation = NULL;\n  }\n\n  // Go back to the CONNECTED state if the state is busy\n  if (ke_state_get(prf_src_task_get(&(cscpc_env->prf_env), conidx)) ==\n      CSCPC_BUSY) {\n    ke_state_set(prf_src_task_get(&(cscpc_env->prf_env), conidx), CSCPC_IDLE);\n  }\n\n  // Send the message\n  struct cscpc_cmp_evt *evt = KE_MSG_ALLOC(\n      CSCPC_CMP_EVT, prf_dst_task_get(&(cscpc_env->prf_env), conidx),\n      prf_src_task_get(&(cscpc_env->prf_env), conidx), cscpc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\n#endif //(BLE_CSC_COLLECTOR)\n\n/// @} CSCP\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscpc/src/cscpc.h",
    "content": "#ifndef _CSCPC_H_\n#define _CSCPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CSCPC Cycling Speed and Cadence Profile Collector\n * @ingroup CSCP\n * @brief Cycling Speed and Cadence Profile Collector\n * @{\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of Cycling Speed and Cadence Collector task instances\n#define CSCPC_IDX_MAX        (BLE_CONNECTION_MAX)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_CSC_COLLECTOR)\n\n#include \"cscpc_task.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the CSCPC task\nenum cscpc_states\n{\n    /// Idle state\n    CSCPC_FREE,\n    /// Connected state\n    CSCPC_IDLE,\n    /// Discovery\n    CSCPC_DISCOVERING,\n    /// Busy state\n    CSCPC_BUSY,\n\n    /// Number of defined states.\n    CSCPC_STATE_MAX\n};\n\n\n/// Internal codes for reading/writing a CSCS characteristic with one single request\nenum cscpc_codes\n{\n    /// Notified CSC Measurement\n    CSCPC_NTF_CSC_MEAS          = CSCP_CSCS_CSC_MEAS_CHAR,\n    /// Read CSC Feature\n    CSCPC_RD_CSC_FEAT           = CSCP_CSCS_CSC_FEAT_CHAR,\n    /// Read Sensor Location\n    CSCPC_RD_SENSOR_LOC         = CSCP_CSCS_SENSOR_LOC_CHAR,\n    /// Indicated SC Control Point\n    CSCPC_IND_SC_CTNL_PT        = CSCP_CSCS_SC_CTNL_PT_CHAR,\n\n    /// Read/Write CSC Measurement Client Char. Configuration Descriptor\n    CSCPC_RD_WR_CSC_MEAS_CFG    = (CSCPC_DESC_CSC_MEAS_CL_CFG   | CSCPC_DESC_MASK),\n    /// Read SC Control Point Client Char. Configuration Descriptor\n    CSCPC_RD_WR_SC_CTNL_PT_CFG  = (CSCPC_DESC_SC_CTNL_PT_CL_CFG | CSCPC_DESC_MASK),\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n\nstruct cscpc_cnx_env\n{\n    /// Current Operation\n    void *operation;\n    ///Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// Cycling Speed and Cadence Service Characteristics\n    struct cscpc_cscs_content cscs;\n};\n\n\n/// Cycling Speed and Cadence Profile Collector environment variable\nstruct cscpc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct cscpc_cnx_env* env[CSCPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[CSCPC_IDX_MAX];\n};\n\n/// Command Message Basic Structure\nstruct cscpc_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n\n    /// MORE DATA\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * GLOBAL FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve CSCP client profile interface\n *\n * @return CSCP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* cscpc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Cycling Power ATT DB discovery results to CSCPC host.\n ****************************************************************************************\n */\nvoid cscpc_enable_rsp_send(struct cscpc_env_tag *cscpc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send a CSCPC_CMP_EVT message when no connection exists (no environment)\n ****************************************************************************************\n */\nvoid cscpc_send_no_conn_cmp_evt(uint8_t src_id, uint8_t dest_id, uint8_t operation);\n\n/**\n ****************************************************************************************\n * @brief Send a CSCPC_CMP_EVT message to the task which enabled the profile\n ****************************************************************************************\n */\nvoid cscpc_send_cmp_evt(struct cscpc_env_tag *cscpc_env, uint8_t conidx, uint8_t operation, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid cscpc_task_init(struct ke_task_desc *task_desc);\n\n#endif //(BLE_CSC_COLLECTOR)\n\n/// @} CSCPC\n\n#endif //(_CSCPC_H_)\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscpc/src/cscpc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup CSCPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_CSC_COLLECTOR)\n#include \"cscp_common.h\"\n#include \"cscpc.h\"\n#include \"cscpc_task.h\"\n\n#include \"gap.h\"\n#include \"gattc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n#include \"ke_timer.h\"\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Cycling Speed and Cadence service\n/// characteristics information\nconst struct prf_char_def cscpc_cscs_char[CSCP_CSCS_CHAR_MAX] = {\n    /// CSC Measurement\n    [CSCP_CSCS_CSC_MEAS_CHAR] = {ATT_CHAR_CSC_MEAS, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_NTF},\n    /// CSC Feature\n    [CSCP_CSCS_CSC_FEAT_CHAR] = {ATT_CHAR_CSC_FEAT, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_RD},\n    /// Sensor Location\n    [CSCP_CSCS_SENSOR_LOC_CHAR] = {ATT_CHAR_SENSOR_LOC, ATT_OPTIONAL,\n                                   ATT_CHAR_PROP_RD},\n    /// SC Control Point\n    [CSCP_CSCS_SC_CTNL_PT_CHAR] = {ATT_CHAR_SC_CNTL_PT, ATT_OPTIONAL,\n                                   ATT_CHAR_PROP_WR | ATT_CHAR_PROP_IND},\n};\n\n/// State machine used to retrieve Cycling Speed and Cadence service\n/// characteristic descriptor information\nconst struct prf_char_desc_def cscpc_cscs_char_desc[CSCPC_DESC_MAX] = {\n    /// CSC Measurement Char. - Client Characteristic Configuration\n    [CSCPC_DESC_CSC_MEAS_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                    CSCP_CSCS_CSC_MEAS_CHAR},\n\n    /// SC Control Point Char. - Client Characteristic Configuration\n    [CSCPC_DESC_SC_CTNL_PT_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                      CSCP_CSCS_SC_CTNL_PT_CHAR},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == CSCPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n\n    ASSERT_INFO(cscpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(cscpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (cscpc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve CSCS characteristics and descriptors\n      prf_extract_svc_info(ind, CSCP_CSCS_CHAR_MAX, &cscpc_cscs_char[0],\n                           &cscpc_env->env[conidx]->cscs.chars[0],\n                           CSCPC_DESC_MAX, &cscpc_cscs_char_desc[0],\n                           &cscpc_env->env[conidx]->cscs.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      cscpc_env->env[conidx]->cscs.svc.shdl = ind->start_hdl;\n      cscpc_env->env[conidx]->cscs.svc.ehdl = ind->end_hdl;\n    }\n\n    cscpc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CSCPC_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cscpc_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct cscpc_enable_req *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  uint8_t state = ke_state_get(dest_id);\n  // Cycling Speed and Cadence Profile Collector Role Task Environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n\n  ASSERT_INFO(cscpc_env != NULL, dest_id, src_id);\n  if ((state == CSCPC_IDLE) && (cscpc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    cscpc_env->env[conidx] = (struct cscpc_cnx_env *)ke_malloc(\n        sizeof(struct cscpc_cnx_env), KE_MEM_ATT_DB);\n    memset(cscpc_env->env[conidx], 0, sizeof(struct cscpc_cnx_env));\n\n    // Start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      prf_disc_svc_send(&(cscpc_env->prf_env), conidx,\n                        ATT_SVC_CYCLING_SPEED_CADENCE);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, CSCPC_DISCOVERING);\n    }\n    // Bond information are provided\n    else {\n      cscpc_env->env[conidx]->cscs = param->cscs;\n\n      // send APP confirmation that can start normal connection to TH\n      cscpc_enable_rsp_send(cscpc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  } else if (state != CSCPC_FREE) {\n    // The message will be forwarded towards the good task instance\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // The request is disallowed (profile already enabled for this connection,\n    // or not enough memory, ...)\n    cscpc_enable_rsp_send(cscpc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CSCPC_READ_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cscpc_read_cmd_handler(ke_msg_id_t const msgid,\n                                    struct cscpc_read_cmd *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (state == CSCPC_IDLE) {\n    ASSERT_INFO(cscpc_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (cscpc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else {\n      // Attribute Handle\n      uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n\n      switch (param->read_code) {\n      // Read CSC Feature\n      case (CSCPC_RD_CSC_FEAT): {\n        handle =\n            cscpc_env->env[conidx]->cscs.chars[CSCP_CSCS_CSC_FEAT_CHAR].val_hdl;\n      } break;\n\n      // Read Sensor Location\n      case (CSCPC_RD_SENSOR_LOC): {\n        handle = cscpc_env->env[conidx]\n                     ->cscs.chars[CSCP_CSCS_SENSOR_LOC_CHAR]\n                     .val_hdl;\n      } break;\n\n      // Read CSC Measurement Characteristic Client Char. Cfg. Descriptor Value\n      case (CSCPC_RD_WR_CSC_MEAS_CFG): {\n        handle = cscpc_env->env[conidx]\n                     ->cscs.descs[CSCPC_DESC_CSC_MEAS_CL_CFG]\n                     .desc_hdl;\n      } break;\n\n      // Read Unread Alert Characteristic Client Char. Cfg. Descriptor Value\n      case (CSCPC_RD_WR_SC_CTNL_PT_CFG): {\n        handle = cscpc_env->env[conidx]\n                     ->cscs.descs[CSCPC_DESC_SC_CTNL_PT_CL_CFG]\n                     .desc_hdl;\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      // Check if handle is viable\n      if (handle != ATT_INVALID_SEARCH_HANDLE) {\n        // Force the operation value\n        param->operation = CSCPC_READ_OP_CODE;\n\n        // Store the command structure\n        cscpc_env->env[conidx]->operation = param;\n        msg_status = KE_MSG_NO_FREE;\n\n        // Send the read request\n        prf_read_char_send(&(cscpc_env->prf_env), conidx,\n                           cscpc_env->env[conidx]->cscs.svc.shdl,\n                           cscpc_env->env[conidx]->cscs.svc.ehdl, handle);\n\n        // Go to the Busy state\n        ke_state_set(dest_id, CSCPC_BUSY);\n\n        status = ATT_ERR_NO_ERROR;\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    }\n  }\n\n  else if (state == CSCPC_FREE) {\n    status = GAP_ERR_DISCONNECTED;\n  } else {\n    // Another procedure is pending, keep the command for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // Send the complete event message to the task id stored in the environment\n    cscpc_send_cmp_evt(cscpc_env, conidx, CSCPC_READ_OP_CODE, status);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CSCPC_CFG_NTFIND_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cscpc_cfg_ntfind_cmd_handler(ke_msg_id_t const msgid,\n                                          struct cscpc_cfg_ntfind_cmd *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n\n  uint8_t state = ke_state_get(dest_id);\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  if (cscpc_env != NULL) {\n    // Status\n    uint8_t status = PRF_ERR_REQ_DISALLOWED;\n    // Handle\n    uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n    // Get connection index\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    do {\n      if (state != CSCPC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_SAVED;\n        // Status is GAP_ERR_NO_ERROR, no message will be sent to the\n        // application\n        break;\n      }\n\n      // state = CSCPC_CONNECTED\n      ASSERT_ERR(cscpc_env->env[conidx] != NULL);\n\n      switch (param->desc_code) {\n      // Write CSC Measurement Characteristic Client Char. Cfg. Descriptor Value\n      case (CSCPC_RD_WR_CSC_MEAS_CFG): {\n        if (param->ntfind_cfg <= PRF_CLI_START_NTF) {\n          handle = cscpc_env->env[conidx]\n                       ->cscs.descs[CSCPC_DESC_CSC_MEAS_CL_CFG]\n                       .desc_hdl;\n          // The descriptor is mandatory\n          ASSERT_ERR(handle != ATT_INVALID_SEARCH_HANDLE);\n          status = GAP_ERR_NO_ERROR;\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      // Write SC Control Point Characteristic Client Char. Cfg. Descriptor\n      // Value\n      case (CSCPC_RD_WR_SC_CTNL_PT_CFG): {\n        if ((param->ntfind_cfg == PRF_CLI_STOP_NTFIND) ||\n            (param->ntfind_cfg == PRF_CLI_START_IND)) {\n          handle = cscpc_env->env[conidx]\n                       ->cscs.descs[CSCPC_DESC_SC_CTNL_PT_CL_CFG]\n                       .desc_hdl;\n\n          status = GAP_ERR_NO_ERROR;\n          if (handle == ATT_INVALID_SEARCH_HANDLE) {\n            // The descriptor has not been found.\n            status = PRF_ERR_INEXISTENT_HDL;\n          }\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n    } while (0);\n\n    if ((status == GAP_ERR_NO_ERROR) && (handle != ATT_INVALID_SEARCH_HANDLE)) {\n      // Set the operation code\n      param->operation = CSCPC_CFG_NTF_IND_OP_CODE;\n\n      // Store the command structure\n      cscpc_env->env[conidx]->operation = param;\n      msg_status = KE_MSG_NO_FREE;\n\n      // Go to the Busy state\n      ke_state_set(dest_id, CSCPC_BUSY);\n\n      // Send GATT Write Request\n      prf_gatt_write_ntf_ind(&cscpc_env->prf_env, conidx, handle,\n                             param->ntfind_cfg);\n    }\n  } else {\n    cscpc_send_no_conn_cmp_evt(dest_id, src_id, CSCPC_CFG_NTF_IND_OP_CODE);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CSCPC_CFG_NTFIND_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cscpc_ctnl_pt_cfg_req_handler(ke_msg_id_t const msgid,\n                                           struct cscpc_ctnl_pt_cfg_req *param,\n                                           ke_task_id_t const dest_id,\n                                           ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (cscpc_env != NULL) {\n    // Status\n    uint8_t status = GAP_ERR_NO_ERROR;\n\n    do {\n      // State is Connected or Busy\n      ASSERT_ERR(ke_state_get(dest_id) > CSCPC_FREE);\n\n      // Check the provided connection handle\n      if (cscpc_env->env[conidx] == NULL) {\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      if (ke_state_get(dest_id) != CSCPC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_NO_FREE;\n        // Status is GAP_ERR_NO_ERROR, no message will be sent to the\n        // application\n        break;\n      }\n\n      // Check if the characteristic has been found\n      if (cscpc_env->env[conidx]\n              ->cscs.descs[CSCPC_DESC_SC_CTNL_PT_CL_CFG]\n              .desc_hdl != ATT_INVALID_SEARCH_HANDLE) {\n        // Packed request\n        uint8_t req[CSCP_SC_CNTL_PT_REQ_MAX_LEN];\n        // Request Length\n        uint8_t req_len = CSCP_SC_CNTL_PT_REQ_MIN_LEN;\n\n        // Set the operation code\n        req[0] = param->sc_ctnl_pt.op_code;\n\n        // Fulfill the message according to the operation code\n        switch (param->sc_ctnl_pt.op_code) {\n        case (CSCP_CTNL_PT_OP_SET_CUMUL_VAL): {\n          // Set the cumulative value\n          co_write32p(&req[req_len], param->sc_ctnl_pt.value.cumul_val);\n          // Update length\n          req_len += 4;\n        } break;\n\n        case (CSCP_CTNL_PT_OP_UPD_LOC): {\n          // Set the sensor location\n          req[req_len] = param->sc_ctnl_pt.value.sensor_loc;\n          // Update length\n          req_len++;\n        } break;\n\n        case (CSCP_CTNL_PT_OP_RESERVED):\n        case (CSCP_CTNL_PT_OP_START_CALIB):\n        case (CSCP_CTNL_PT_OP_REQ_SUPP_LOC): {\n          // Nothing more to do\n        } break;\n\n        default: {\n          status = PRF_ERR_INVALID_PARAM;\n        } break;\n        }\n\n        if (status == GAP_ERR_NO_ERROR) {\n          // Set the operation code\n          param->operation = CSCPC_CTNL_PT_CFG_WR_OP_CODE;\n\n          // Store the command structure\n          cscpc_env->env[conidx]->operation = param;\n          // Store the command information\n          msg_status = KE_MSG_NO_FREE;\n\n          // Go to the Busy state\n          ke_state_set(dest_id, CSCPC_BUSY);\n\n          // Send the write request\n          prf_gatt_write(&(cscpc_env->prf_env), conidx,\n                         cscpc_env->env[conidx]\n                             ->cscs.chars[CSCP_CSCS_SC_CTNL_PT_CHAR]\n                             .val_hdl,\n                         (uint8_t *)&req[0], req_len, GATTC_WRITE);\n        }\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      // Send a complete event status to the application\n      cscpc_send_cmp_evt(cscpc_env, conidx, CSCPC_CTNL_PT_CFG_WR_OP_CODE,\n                         status);\n    }\n  } else {\n    // No connection\n    cscpc_send_no_conn_cmp_evt(dest_id, src_id, CSCPC_CTNL_PT_CFG_WR_OP_CODE);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CSCPC_TIMEOUT_TIMER_IND message. This\n *message is received when the peer device doesn't send a SC Control Point\n *indication within 30s after reception of the write response.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cscpc_timeout_timer_ind_handler(ke_msg_id_t const msgid,\n                                             void const *param,\n                                             ke_task_id_t const dest_id,\n                                             ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (cscpc_env != NULL) {\n    ASSERT_ERR(cscpc_env->env[conidx]->operation != NULL);\n    ASSERT_ERR(\n        ((struct cscpc_cmd *)cscpc_env->env[conidx]->operation)->operation ==\n        CSCPC_CTNL_PT_CFG_IND_OP_CODE);\n\n    // Send the complete event message\n    cscpc_send_cmp_evt(cscpc_env, conidx, CSCPC_CTNL_PT_CFG_WR_OP_CODE,\n                       PRF_ERR_PROC_TIMEOUT);\n  }\n  // else drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n  // Status\n  uint8_t status;\n\n  if (cscpc_env != NULL) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    uint8_t state = ke_state_get(dest_id);\n\n    if (state == CSCPC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (cscpc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity(\n              CSCP_CSCS_CHAR_MAX, cscpc_env->env[conidx]->cscs.chars,\n              cscpc_cscs_char);\n        }\n        // too much services\n        else if (cscpc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              CSCPC_DESC_MAX, cscpc_env->env[conidx]->cscs.descs,\n              cscpc_cscs_char_desc, cscpc_env->env[conidx]->cscs.chars);\n        }\n      }\n\n      cscpc_enable_rsp_send(cscpc_env, conidx, status);\n    }\n\n    else if (state == CSCPC_BUSY) {\n      switch (param->operation) {\n      case GATTC_READ: {\n        // Send the complete event status\n        cscpc_send_cmp_evt(cscpc_env, conidx, CSCPC_READ_OP_CODE,\n                           param->status);\n      } break;\n\n      case GATTC_WRITE:\n      case GATTC_WRITE_NO_RESPONSE: {\n        uint8_t operation =\n            ((struct cscpc_cmd *)cscpc_env->env[conidx]->operation)->operation;\n\n        if (operation == CSCPC_CFG_NTF_IND_OP_CODE) {\n          // Send the complete event status\n          cscpc_send_cmp_evt(cscpc_env, conidx, operation, param->status);\n        }\n\n        else if (operation == CSCPC_CTNL_PT_CFG_WR_OP_CODE) {\n          if (param->status == GAP_ERR_NO_ERROR) {\n            // Start Timeout Procedure\n            ke_timer_set(CSCPC_TIMEOUT_TIMER_IND, dest_id, ATT_TRANS_RTX);\n\n            // Wait for the response indication\n            ((struct cscpc_cmd *)cscpc_env->env[conidx]->operation)->operation =\n                CSCPC_CTNL_PT_CFG_IND_OP_CODE;\n          } else {\n            // Send the complete event status\n            cscpc_send_cmp_evt(cscpc_env, conidx, operation, param->status);\n          }\n        }\n      } break;\n\n      case GATTC_REGISTER:\n      case GATTC_UNREGISTER: {\n        // Do nothing\n      } break;\n\n      default: {\n        ASSERT_ERR(0);\n      } break;\n      }\n    }\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n\n  if (ke_state_get(dest_id) == CSCPC_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    ASSERT_INFO(cscpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(cscpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    // Send the read value to the HL\n    struct cscpc_value_ind *ind = KE_MSG_ALLOC(\n        CSCPC_VALUE_IND, prf_dst_task_get(&(cscpc_env->prf_env), conidx),\n        dest_id, cscpc_value_ind);\n\n    switch (((struct cscpc_read_cmd *)cscpc_env->env[conidx]->operation)\n                ->read_code) {\n    // Read CSC Feature Characteristic value\n    case (CSCPC_RD_CSC_FEAT): {\n      ind->value.sensor_feat = co_read16p(param->value);\n\n      // Mask the reserved bits\n      //                ind->value.sensor_feat &= CSCP_FEAT_ALL_SUPP;\n    } break;\n\n    // Read Sensor Location Characteristic value\n    case (CSCPC_RD_SENSOR_LOC): {\n      ind->value.sensor_loc = param->value[0];\n    } break;\n\n    // Read Client Characteristic Configuration Descriptor value\n    case (CSCPC_RD_WR_CSC_MEAS_CFG):\n    case (CSCPC_RD_WR_SC_CTNL_PT_CFG): {\n      co_write16p(&ind->value.ntf_cfg, param->value[0]);\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    ind->att_code =\n        ((struct cscpc_read_cmd *)cscpc_env->env[conidx]->operation)->read_code;\n\n    // Send the message to the application\n    ke_msg_send(ind);\n  }\n  // else drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n\n  if (cscpc_env != NULL) {\n    switch (param->type) {\n    case (GATTC_NOTIFY): {\n      // Offset\n      uint8_t offset = CSCP_CSC_MEAS_MIN_LEN;\n\n      // CSC Measurement value has been received\n      struct cscpc_value_ind *ind = KE_MSG_ALLOC(\n          CSCPC_VALUE_IND, prf_dst_task_get(&(cscpc_env->prf_env), conidx),\n          prf_src_task_get(&(cscpc_env->prf_env), conidx), cscpc_value_ind);\n      // Attribute code\n      ind->att_code = CSCPC_NTF_CSC_MEAS;\n\n      /*----------------------------------------------------\n       * Unpack Measurement --------------------------------\n       *----------------------------------------------------*/\n\n      // Flags\n      ind->value.csc_meas.flags = param->value[0];\n\n      // Cumulative Wheel Revolutions\n      // Last Wheel Event Time\n      if (param->value[0] & CSCP_MEAS_WHEEL_REV_DATA_PRESENT) {\n        // Cumulative Wheel Revolutions\n        ind->value.csc_meas.cumul_wheel_rev = co_read32p(¶m->value[offset]);\n        offset += 4;\n\n        // Last Wheel Event Time\n        ind->value.csc_meas.last_wheel_evt_time =\n            co_read16p(¶m->value[offset]);\n        offset += 2;\n      }\n\n      // Cumulative Crank Revolutions\n      // Last Crank Event Time\n      if (param->value[0] & CSCP_MEAS_CRANK_REV_DATA_PRESENT) {\n        // Cumulative Crank Revolutions\n        ind->value.csc_meas.cumul_crank_rev = co_read16p(¶m->value[offset]);\n        offset += 2;\n\n        // Last Crank Event Time\n        ind->value.csc_meas.last_crank_evt_time =\n            co_read16p(¶m->value[offset]);\n      }\n\n      ke_msg_send(ind);\n    } break;\n\n    case (GATTC_INDICATE): {\n      // confirm that indication has been correctly received\n      struct gattc_event_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n      cfm->handle = param->handle;\n      ke_msg_send(cfm);\n\n      // Check if we were waiting for the indication\n      if (cscpc_env->env[conidx]->operation != NULL) {\n        if (((struct cscpc_cmd *)cscpc_env->env[conidx]->operation)\n                ->operation == CSCPC_CTNL_PT_CFG_IND_OP_CODE) {\n          // Stop the procedure timeout timer\n          ke_timer_clear(CSCPC_TIMEOUT_TIMER_IND, dest_id);\n\n          // CSC Measurement value has been received\n          struct cscpc_ctnl_pt_rsp *ind =\n              KE_MSG_ALLOC(CSCPC_CTNL_PT_RSP,\n                           prf_dst_task_get(&(cscpc_env->prf_env), conidx),\n                           prf_src_task_get(&(cscpc_env->prf_env), conidx),\n                           cscpc_ctnl_pt_rsp);\n\n          // Requested operation code\n          ind->ctnl_pt_rsp.req_op_code = param->value[1];\n          // Response value\n          ind->ctnl_pt_rsp.resp_value = param->value[2];\n\n          // Get the list of supported sensor locations if needed\n          if ((ind->ctnl_pt_rsp.req_op_code == CSCP_CTNL_PT_OP_REQ_SUPP_LOC) &&\n              (ind->ctnl_pt_rsp.resp_value == CSCP_CTNL_PT_RESP_SUCCESS) &&\n              (param->length > 3)) {\n            // Get the number of supported locations that have been received\n            uint8_t nb_supp_loc = (param->length - 3);\n            // Counter\n            uint8_t counter;\n            // Location\n            uint8_t loc;\n\n            for (counter = 0; counter < nb_supp_loc; counter++) {\n              loc = param->value[counter + 3];\n\n              // Check if valid\n              if (loc < CSCP_LOC_MAX) {\n                ind->ctnl_pt_rsp.supp_loc |= (1 << loc);\n              }\n            }\n          }\n\n          // Send the message\n          ke_msg_send(ind);\n\n          // Send the complete event message\n          cscpc_send_cmp_evt(cscpc_env, conidx, CSCPC_CTNL_PT_CFG_WR_OP_CODE,\n                             GAP_ERR_NO_ERROR);\n        }\n        // else drop the message\n      }\n      // else drop the message\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(cscpc){\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {CSCPC_ENABLE_REQ, (ke_msg_func_t)cscpc_enable_req_handler},\n    {CSCPC_READ_CMD, (ke_msg_func_t)cscpc_read_cmd_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {CSCPC_CFG_NTFIND_CMD, (ke_msg_func_t)cscpc_cfg_ntfind_cmd_handler},\n    {CSCPC_CTNL_PT_CFG_REQ, (ke_msg_func_t)cscpc_ctnl_pt_cfg_req_handler},\n    {CSCPC_TIMEOUT_TIMER_IND, (ke_msg_func_t)cscpc_timeout_timer_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_EVENT_REQ_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid cscpc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct cscpc_env_tag *cscpc_env = PRF_ENV_GET(CSCPC, cscpc);\n\n  task_desc->msg_handler_tab = cscpc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(cscpc_msg_handler_tab);\n  task_desc->state = cscpc_env->state;\n  task_desc->idx_max = CSCPC_IDX_MAX;\n}\n\n#endif //(BLE_CSC_COLLECTOR)\n\n/// @} CSCPCTASK\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscps/api/cscps_task.h",
    "content": "#ifndef _CSCPS_TASK_H_\n#define _CSCPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CSCPSTASK Task\n * @ingroup CSCPS\n * @brief Cycling Speed and Cadence Profile Task.\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"cscp_common.h\"\n#include \n#include \"rwip_task.h\" // Task definitions\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Messages for Cycling Speed and Cadence Profile Sensor\nenum cscps_msg_id\n{\n    /// Enable the CSCP Sensor task for a connection\n    CSCPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_CSCPS),\n    /// Enable the CSCP Sensor task for a connection\n    CSCPS_ENABLE_RSP,\n\n    /// Send a CSC Measurement to the peer device (Notification)\n    CSCPS_NTF_CSC_MEAS_REQ,\n    /// Inform that CSC Measurement sent to peer devices.\n    CSCPS_NTF_CSC_MEAS_RSP,\n\n    /// Indicate that the SC Control Point characteristic value has been written\n    CSCPS_SC_CTNL_PT_REQ_IND,\n    /// Application response after receiving a CSCPS_SC_CTNL_PT_REQ_IND message\n    CSCPS_SC_CTNL_PT_CFM,\n\n    /// Indicate a new NTF/IND configuration to the application\n    CSCPS_CFG_NTFIND_IND,\n\n    /// Send a complete event status to the application\n    CSCPS_CMP_EVT,\n};\n\n/// Operation Code used in the profile state machine\nenum cscps_op_code\n{\n    /// Reserved Operation Code\n    CSCPS_RESERVED_OP_CODE          = 0x00,\n\n    /// Send CSC Measurement Operation Code\n    CSCPS_SEND_CSC_MEAS_OP_CODE,\n\n    /**\n     * SC Control Point Operation\n     */\n\n    /// Set Cumulative Value Operation Code\n    CSCPS_CTNL_PT_CUMUL_VAL_OP_CODE,\n    /// Update Sensor Location Operation Code\n    CSCPS_CTNL_PT_UPD_LOC_OP_CODE,\n    /// Request Supported Sensor Locations Operation Code\n    CSCPS_CTNL_PT_SUPP_LOC_OP_CODE,\n    /// Error Indication Sent Operation Code\n    CSCPS_CTNL_ERR_IND_OP_CODE,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the initialization function\nstruct cscps_db_cfg\n{\n    /**\n     * CSC Feature Value - Not supposed to be modified during the lifetime of the device\n     * This value is used to decide if the SC Control Point Characteristic is part of the\n     * Cycling Speed and Cadence service.\n     */\n    uint16_t csc_feature;\n    /**\n     * Indicate if the Sensor Location characteristic is supported. Note that if the Multiple\n     * Sensor Location feature is set has supported in the csc_feature parameter, the\n     * characteristic will be added (mandatory).\n     */\n    uint8_t sensor_loc_supp;\n    /// Sensor location\n    uint8_t sensor_loc;\n    /// Wheel revolution\n    uint32_t wheel_rev;\n};\n\n/// Parameters of the @ref CSCPS_ENABLE_REQ message\nstruct cscps_enable_req\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Stored CSC Measurement Char. Client Characteristic Configuration\n    uint16_t csc_meas_ntf_cfg;\n    /// Stored SC Control Point Char. Client Characteristic Configuration\n    uint16_t sc_ctnl_pt_ntf_cfg;\n};\n\n/// Parameters of the @ref CSCPS_ENABLE_RSP message\nstruct cscps_enable_rsp\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref CSCPS_NTF_CSC_MEAS_REQ message\nstruct cscps_ntf_csc_meas_req\n{\n    /// Flags\n    uint8_t flags;\n    /// Cumulative Crank Revolution\n    uint16_t cumul_crank_rev;\n    /// Last Crank Event Time\n    uint16_t last_crank_evt_time;\n    /// Last Wheel Event Time\n    uint16_t last_wheel_evt_time;\n    /// Wheel Revolution since the last wheel event time\n    int16_t wheel_rev;\n};\n\n/// Parameters of the @ref CSCPS_NTF_CSC_MEAS_RSP message\nstruct cscps_ntf_csc_meas_rsp\n{\n    /// Operation Status\n    uint8_t  status;\n    /// Cummul Wheel revolution value\n    uint32_t tot_wheel_rev;\n};\n\n\n/// Parameters of the @ref CSCPS_SC_CTNL_PT_REQ_IND message\nstruct cscps_sc_ctnl_pt_req_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t op_code;\n    /// Value\n    union cscps_sc_ctnl_pt_req_ind_value\n    {\n        /// Cumulative value\n        uint32_t cumul_value;\n        /// Sensor Location\n        uint8_t sensor_loc;\n    } value;\n};\n\n/// Parameters of the @ref CSCPS_SC_CTNL_PT_CFM message\nstruct cscps_sc_ctnl_pt_cfm\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t op_code;\n    /// Status\n    uint8_t status;\n    /// Value\n    union cscps_sc_ctnl_pt_cfm_value\n    {\n        /// Sensor Location\n        uint8_t sensor_loc;\n        /// Supported sensor locations\n        uint16_t supp_sensor_loc;\n        /// New Cumulative Wheel revolution Value\n        uint32_t cumul_wheel_rev;\n    } value;\n};\n\n/// Parameters of the @ref CSCPS_CFG_NTFIND_IND message\nstruct cscps_cfg_ntfind_ind\n{\n    /// Connection handle\n    uint8_t conidx;\n    /// Characteristic Code (CSC Measurement or SC Control Point)\n    uint8_t char_code;\n    /// Char. Client Characteristic Configuration\n    uint16_t ntf_cfg;\n};\n\n/// Parameters of the @ref CSCPS_CMP_EVT message\nstruct cscps_cmp_evt\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t operation;\n    /// Operation Status\n    uint8_t status;\n};\n\n/// @} CSCPSTASK\n\n#endif //(_CSCPS_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscps/src/cscps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup CSCPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_CSC_SENSOR)\n#include \"cscp_common.h\"\n\n#include \"cscps.h\"\n#include \"cscps_task.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Full CSCPS Database Description - Used to add attributes into the database\nstatic const struct attm_desc cscps_att_db[CSCS_IDX_NB] = {\n    // Cycling Speed and Cadence Service Declaration\n    [CSCS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // CSC Measurement Characteristic Declaration\n    [CSCS_IDX_CSC_MEAS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // CSC Measurement Characteristic Value\n    [CSCS_IDX_CSC_MEAS_VAL] = {ATT_CHAR_CSC_MEAS, PERM(NTF, ENABLE),\n                               PERM(RI, ENABLE), CSCP_CSC_MEAS_MAX_LEN},\n    // CSC Measurement Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [CSCS_IDX_CSC_MEAS_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   0, 0},\n\n    // CSC Feature Characteristic Declaration\n    [CSCS_IDX_CSC_FEAT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // CSC Feature Characteristic Value\n    [CSCS_IDX_CSC_FEAT_VAL] = {ATT_CHAR_CSC_FEAT, PERM(RD, ENABLE),\n                               PERM(RI, ENABLE), sizeof(uint16_t)},\n\n    // Sensor Location Characteristic Declaration\n    [CSCS_IDX_SENSOR_LOC_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                  0},\n    // Sensor Location Characteristic Value\n    [CSCS_IDX_SENSOR_LOC_VAL] = {ATT_CHAR_SENSOR_LOC, PERM(RD, ENABLE),\n                                 PERM(RI, ENABLE), sizeof(uint8_t)},\n\n    // SC Control Point Characteristic Declaration\n    [CSCS_IDX_SC_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                  CSCS_IDX_SC_CTNL_PT_VAL, 0},\n    // SC Control Point Characteristic Value - The response has the maximal\n    // length\n    [CSCS_IDX_SC_CTNL_PT_VAL] = {ATT_CHAR_SC_CNTL_PT,\n                                 PERM(IND, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                 PERM(RI, ENABLE), CSCP_SC_CNTL_PT_RSP_MAX_LEN},\n    // SC Control Point Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [CSCS_IDX_SC_CTNL_PT_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                     PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                     0, 0},\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the CSCPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t cscps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl,\n                          struct cscps_db_cfg *param) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n  // Service content flag\n  uint32_t cfg_flag = CSCPS_MANDATORY_MASK;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  /*\n   * Check if the Sensor Location characteristic shall be added.\n   * Mandatory if the Multiple Sensor Location feature is supported, otherwise\n   * optional.\n   */\n  if ((param->sensor_loc_supp == CSCPS_SENSOR_LOC_SUPP) ||\n      (CSCPS_IS_FEATURE_SUPPORTED(param->csc_feature,\n                                  CSCP_FEAT_MULT_SENSOR_LOC_SUPP))) {\n    cfg_flag |= CSCPS_SENSOR_LOC_MASK;\n  }\n\n  /*\n   * Check if the SC Control Point characteristic shall be added\n   * Mandatory if at least one SC Control Point procedure is supported,\n   * otherwise excluded.\n   */\n  if (CSCPS_IS_FEATURE_SUPPORTED(param->csc_feature,\n                                 CSCP_FEAT_WHEEL_REV_DATA_SUPP) ||\n      CSCPS_IS_FEATURE_SUPPORTED(param->csc_feature,\n                                 CSCP_FEAT_MULT_SENSOR_LOC_SUPP)) {\n    cfg_flag |= CSCPS_SC_CTNL_PT_MASK;\n  }\n\n  // Add service in the database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_CYCLING_SPEED_CADENCE, (uint8_t *)&cfg_flag,\n      CSCS_IDX_NB, NULL, env->task, &cscps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  // Check if an error has occured\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate CSCPS required environment variable\n    struct cscps_env_tag *cscps_env = (struct cscps_env_tag *)ke_malloc(\n        sizeof(struct cscps_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize CSCPS environment\n\n    env->env = (prf_env_t *)cscps_env;\n    cscps_env->shdl = *start_hdl;\n    cscps_env->prfl_cfg = cfg_flag;\n    cscps_env->features = param->csc_feature;\n    cscps_env->operation = CSCPS_RESERVED_OP_CODE;\n\n    if (CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg,\n                                   CSCPS_SENSOR_LOC_MASK)) {\n      cscps_env->sensor_loc = (param->sensor_loc >= CSCP_LOC_MAX)\n                                  ? CSCP_LOC_OTHER\n                                  : param->sensor_loc;\n    }\n\n    cscps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Mono Instantiated task\n    cscps_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_CSCPS;\n    cscps_task_init(&(env->desc));\n\n    // Store the provided cumulative wheel revolution value\n    cscps_env->tot_wheel_rev = param->wheel_rev;\n    cscps_env->ntf = NULL;\n\n    memset(cscps_env->prfl_ntf_ind_cfg, 0, BLE_CONNECTION_MAX);\n\n    // If we are here, database has been fulfilled with success, go to idle\n    // state\n    ke_state_set(env->task, CSCPS_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the CSCPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void cscps_destroy(struct prf_task_env *env) {\n  struct cscps_env_tag *cscps_env = (struct cscps_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  if (cscps_env->ntf != NULL) {\n    ke_free(cscps_env->ntf);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(cscps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void cscps_create(struct prf_task_env *env, uint8_t conidx) {\n  struct cscps_env_tag *cscps_env = (struct cscps_env_tag *)env->env;\n  cscps_env->prfl_ntf_ind_cfg[conidx] = 0;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void cscps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct cscps_env_tag *cscps_env = (struct cscps_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  cscps_env->prfl_ntf_ind_cfg[conidx] = 0;\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// CSCPS Task interface required by profile manager\nconst struct prf_task_cbs cscps_itf = {\n    (prf_init_fnct)cscps_init,\n    cscps_destroy,\n    cscps_create,\n    cscps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *cscps_prf_itf_get(void) { return &cscps_itf; }\n\nvoid cscps_send_cmp_evt(uint8_t conidx, uint8_t src_id, uint8_t dest_id,\n                        uint8_t operation, uint8_t status) {\n  // Get the address of the environment\n  struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n\n  // Go back to the Connected state if the state is busy\n  if (ke_state_get(src_id) == CSCPS_BUSY) {\n    ke_state_set(src_id, CSCPS_IDLE);\n  }\n\n  // Set the operation code\n  cscps_env->operation = CSCPS_RESERVED_OP_CODE;\n\n  // Send the message\n  struct cscps_cmp_evt *evt =\n      KE_MSG_ALLOC(CSCPS_CMP_EVT, dest_id, src_id, cscps_cmp_evt);\n\n  evt->conidx = conidx;\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\nvoid cscps_exe_operation(void) {\n  struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n\n  ASSERT_ERR(cscps_env->ntf != NULL);\n\n  bool finished = true;\n\n  while (cscps_env->ntf->cursor < BLE_CONNECTION_MAX) {\n    // Check if notifications are enabled\n    if (CSCPS_IS_NTFIND_ENABLED(cscps_env->ntf->cursor,\n                                CSCP_PRF_CFG_FLAG_CSC_MEAS_NTF)) {\n      // Allocate the GATT notification message\n      struct gattc_send_evt_cmd *meas_val = KE_MSG_ALLOC_DYN(\n          GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, cscps_env->ntf->cursor),\n          prf_src_task_get(&(cscps_env->prf_env), 0), gattc_send_evt_cmd,\n          cscps_env->ntf->length);\n\n      // Fill in the parameter structure\n      meas_val->operation = GATTC_NOTIFY;\n      meas_val->handle = CSCPS_HANDLE(CSCS_IDX_CSC_MEAS_VAL);\n      meas_val->length = cscps_env->ntf->length;\n      memcpy(meas_val->value, cscps_env->ntf->value, cscps_env->ntf->length);\n\n      // Send the event\n      ke_msg_send(meas_val);\n\n      finished = false;\n      cscps_env->ntf->cursor++;\n      break;\n    }\n\n    cscps_env->ntf->cursor++;\n  }\n\n  // check if operation is finished\n  if (finished) {\n    // Inform the application that a procedure has been completed\n    struct cscps_ntf_csc_meas_rsp *rsp = KE_MSG_ALLOC(\n        CSCPS_NTF_CSC_MEAS_RSP, prf_dst_task_get(&(cscps_env->prf_env), 0),\n        prf_src_task_get(&(cscps_env->prf_env), 0), cscps_ntf_csc_meas_rsp);\n\n    rsp->status = GAP_ERR_NO_ERROR;\n    rsp->tot_wheel_rev = cscps_env->tot_wheel_rev;\n    ke_msg_send(rsp);\n\n    // free operation\n    ke_free(cscps_env->ntf);\n    cscps_env->ntf = NULL;\n    cscps_env->operation = CSCPS_RESERVED_OP_CODE;\n\n    ke_state_set(prf_src_task_get(&(cscps_env->prf_env), 0), CSCPS_IDLE);\n  }\n}\n\nvoid cscps_send_rsp_ind(uint8_t conidx, uint8_t req_op_code, uint8_t status) {\n  // Get the address of the environment\n  struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n\n  // Allocate the GATT notification message\n  struct gattc_send_evt_cmd *ctl_pt_rsp =\n      KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(&cscps_env->prf_env, conidx),\n                       gattc_send_evt_cmd, CSCP_SC_CNTL_PT_RSP_MIN_LEN);\n\n  // Fill in the parameter structure\n  ctl_pt_rsp->operation = GATTC_INDICATE;\n  ctl_pt_rsp->handle = CSCPS_HANDLE(CSCS_IDX_SC_CTNL_PT_VAL);\n  // Pack Control Point confirmation\n  ctl_pt_rsp->length = CSCP_SC_CNTL_PT_RSP_MIN_LEN;\n  // Response Code\n  ctl_pt_rsp->value[0] = CSCP_CTNL_PT_RSP_CODE;\n  // Request Operation Code\n  ctl_pt_rsp->value[1] = req_op_code;\n  // Response value\n  ctl_pt_rsp->value[2] = status;\n\n  // Send the event\n  ke_msg_send(ctl_pt_rsp);\n}\n\n#endif //(BLE_CSC_SENSOR)\n\n/// @} CSCPS\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscps/src/cscps.h",
    "content": "#ifndef _CSCPS_H_\n#define _CSCPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CSCPS Cycling Speed and Cadence Profile Sensor\n * @ingroup CSCP\n * @brief Cycling Speed and Cadence Profile Sensor\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_CSC_SENSOR)\n#include \"cscp_common.h\"\n\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"cscps_task.h\"\n#include \"attm.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of Cycling Speed and Cadence Profile Sensor role task instances\n#define CSCPS_IDX_MAX        (1)\n\n/********************************************\n ******* CSCPS Configuration Flag Masks ******\n ********************************************/\n\n/// Mandatory Attributes (CSC Measurement + CSC Feature)\n#define CSCPS_MANDATORY_MASK               (0x003F)\n/// Sensor Location Attributes\n#define CSCPS_SENSOR_LOC_MASK              (0x00C0)\n/// SC Control Point Attributes\n#define CSCPS_SC_CTNL_PT_MASK              (0x0700)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n#define CSCPS_IS_FEATURE_SUPPORTED(features, flag) ((features & flag) == flag)\n\n#define CSCPS_IS_PRESENT(features, flag)           ((features & flag) == flag)\n\n#define CSCPS_ENABLE_NTFIND(conidx, ccc_flag)      (cscps_env->prfl_ntf_ind_cfg[conidx] |= ccc_flag)\n\n#define CSCPS_DISABLE_NTFIND(conidx, ccc_flag)     (cscps_env->prfl_ntf_ind_cfg[conidx] &= ~ccc_flag)\n\n#define CSCPS_IS_NTFIND_ENABLED(conidx, ccc_flag)  ((cscps_env->prfl_ntf_ind_cfg[conidx] & ccc_flag) == ccc_flag)\n\n#define CSCPS_HANDLE(idx) \\\n    (cscps_env->shdl + (idx) - \\\n        ((!(CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg, CSCPS_SENSOR_LOC_MASK)) && \\\n                ((idx) > CSCS_IDX_SENSOR_LOC_CHAR))? (1) : (0)))\n\n// Get database attribute index\n #define CSCPS_IDX(hdl) \\\n    ((hdl - cscps_env->shdl) + \\\n        ((!(CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg, CSCPS_SENSOR_LOC_MASK)) && \\\n                ((hdl - cscps_env->shdl) > CSCS_IDX_SENSOR_LOC_CHAR)) ? (1) : (0)))\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the CSCPS task\nenum cscps_state\n{\n    /// Idle state\n    CSCPS_IDLE,\n    /// Busy state\n    CSCPS_BUSY,\n\n    /// Number of defined states.\n    CSCPS_STATE_MAX\n};\n\n/// Cycling Speed and Cadence Service - Attribute List\nenum cscps_cscs_att_list\n{\n    /// Cycling Speed and Cadence Service\n    CSCS_IDX_SVC,\n    /// CSC Measurement\n    CSCS_IDX_CSC_MEAS_CHAR,\n    CSCS_IDX_CSC_MEAS_VAL,\n    CSCS_IDX_CSC_MEAS_NTF_CFG,\n    /// CSC Feature\n    CSCS_IDX_CSC_FEAT_CHAR,\n    CSCS_IDX_CSC_FEAT_VAL,\n    /// Sensor Location\n    CSCS_IDX_SENSOR_LOC_CHAR,\n    CSCS_IDX_SENSOR_LOC_VAL,\n    /// SC Control Point\n    CSCS_IDX_SC_CTNL_PT_CHAR,\n    CSCS_IDX_SC_CTNL_PT_VAL,\n    CSCS_IDX_SC_CTNL_PT_NTF_CFG,\n\n    /// Number of attributes\n    CSCS_IDX_NB,\n};\n\n/// Profile Configuration Additional Flags ()\nenum cscps_prf_cfg_flag\n{\n    /// CSC Measurement - Client Char. Cfg\n    CSCP_PRF_CFG_FLAG_CSC_MEAS_NTF    = (CSCP_FEAT_MULT_SENSOR_LOC_SUPP << 1),\n    /// SC Control Point - Client Char. Cfg\n    CSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND  = (CSCP_PRF_CFG_FLAG_CSC_MEAS_NTF << 1),\n\n    /// Bonded data used\n    CSCP_PRF_CFG_PERFORMED_OK         = 0x80\n};\n\n/// Sensor Location Supported Flag\nenum cscps_sensor_loc_supp\n{\n    /// Sensor Location Char. is not supported\n    CSCPS_SENSOR_LOC_NOT_SUPP,\n    /// Sensor Location Char. is supported\n    CSCPS_SENSOR_LOC_SUPP,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// ongoing notification information\nstruct cscps_ntf\n{\n     /// Cursor on connection\n     uint8_t cursor;\n     /// Packed notification/indication data size\n     uint8_t length;\n     /// Packed notification/indication data\n     uint8_t value[CSCP_CSC_MEAS_MAX_LEN];\n};\n\n/// Cycling Speed and Cadence Profile Sensor environment variable\nstruct cscps_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Notification data\n    struct cscps_ntf* ntf;\n    /// Wheel revolution\n    uint32_t tot_wheel_rev;\n\n    /// Cycling Speed and Cadence Service Start Handle\n    uint16_t shdl;\n    /// Features configuration\n    uint16_t features;\n    /// profile configuration\n    uint16_t prfl_cfg;\n\n    /// Operation\n    uint8_t operation;\n    /// Sensor location\n    uint8_t sensor_loc;\n\n    /// Environment variable pointer for each connections\n    uint8_t prfl_ntf_ind_cfg[BLE_CONNECTION_MAX];\n\n    /// State of different task instances\n    ke_state_t state[CSCPS_IDX_MAX];\n};\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve CSCP service profile interface\n *\n * @return CSCP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* cscps_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send a CSCPS_CMP_EVT message to the application.\n ****************************************************************************************\n */\nvoid cscps_send_cmp_evt(uint8_t conidx, uint8_t src_id, uint8_t dest_id,\n                        uint8_t operation, uint8_t status);\n\n\n/**\n ****************************************************************************************\n * @brief  This function fully manage event to trigg to peer(s) device(s) according\n *         to on-going operation requested by application\n ****************************************************************************************\n */\nvoid cscps_exe_operation(void);\n\n/**\n ****************************************************************************************\n * @brief  This function sends control point indication error\n ****************************************************************************************\n */\nvoid cscps_send_rsp_ind(uint8_t conidx, uint8_t req_op_code, uint8_t status);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid cscps_task_init(struct ke_task_desc *task_desc);\n\n#endif //(BLE_CSC_SENSOR)\n\n/// @} CSCPS\n\n#endif //(_CSCPS_H_)\n"
  },
  {
    "path": "services/ble_profiles/cscp/cscps/src/cscps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup CSCPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_CSC_SENSOR)\n\n#include \"co_math.h\"\n#include \"cscps.h\"\n#include \"cscps_task.h\"\n#include \"gapc.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CSCPS_ENABLE_REQ message.\n * @param[in] msgid Id of the message received\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cscps_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct cscps_enable_req *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == CSCPS_IDLE) {\n    status = GAP_ERR_NO_ERROR;\n\n    if (!CSCPS_IS_PRESENT(cscps_env->prfl_ntf_ind_cfg[param->conidx],\n                          CSCP_PRF_CFG_PERFORMED_OK)) {\n      // Check the provided value\n      if (param->csc_meas_ntf_cfg == PRF_CLI_START_NTF) {\n        // Store the status\n        CSCPS_ENABLE_NTFIND(param->conidx, CSCP_PRF_CFG_FLAG_CSC_MEAS_NTF);\n      }\n\n      if (CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg,\n                                     CSCPS_SC_CTNL_PT_MASK)) {\n        // Check the provided value\n        if (param->sc_ctnl_pt_ntf_cfg == PRF_CLI_START_IND) {\n          // Store the status\n          CSCPS_ENABLE_NTFIND(param->conidx, CSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND);\n        }\n      }\n      // Enable Bonded Data\n      CSCPS_ENABLE_NTFIND(param->conidx, CSCP_PRF_CFG_PERFORMED_OK);\n    }\n  }\n\n  // send completed information to APP task that contains error status\n  struct cscps_enable_rsp *cmp_evt =\n      KE_MSG_ALLOC(CSCPS_ENABLE_RSP, src_id, dest_id, cscps_enable_rsp);\n  cmp_evt->status = status;\n  cmp_evt->conidx = param->conidx;\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == CSCPS_IDLE) {\n    // Get the address of the environment\n    struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n    uint8_t conidx = KE_IDX_GET(src_id);\n    uint8_t att_idx = CSCPS_IDX(param->handle);\n\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = NULL;\n\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    switch (att_idx) {\n    case CSCS_IDX_CSC_MEAS_NTF_CFG: {\n      // Fill data\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint16_t));\n      cfm->length = sizeof(uint16_t);\n      co_write16p(cfm->value, (cscps_env->prfl_ntf_ind_cfg[conidx] &\n                               CSCP_PRF_CFG_FLAG_CSC_MEAS_NTF)\n                                  ? PRF_CLI_START_NTF\n                                  : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    case CSCS_IDX_CSC_FEAT_VAL: {\n      // Fill data\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint16_t));\n      cfm->length = sizeof(uint16_t);\n      co_write16p(cfm->value, cscps_env->features);\n    } break;\n\n    case CSCS_IDX_SENSOR_LOC_VAL: {\n      // Fill data\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint8_t));\n      cfm->length = sizeof(uint8_t);\n      cfm->value[0] = cscps_env->sensor_loc;\n    } break;\n\n    case CSCS_IDX_SC_CTNL_PT_NTF_CFG: {\n      // Fill data\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint16_t));\n      cfm->length = sizeof(uint16_t);\n      co_write16p(cfm->value, (cscps_env->prfl_ntf_ind_cfg[conidx] &\n                               CSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND)\n                                  ? PRF_CLI_START_IND\n                                  : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    default: {\n      cfm = KE_MSG_ALLOC(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm);\n      cfm->length = 0;\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n\n    cfm->handle = param->handle;\n    cfm->status = status;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_att_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_att_info_req_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == CSCPS_IDLE) {\n    // Get the address of the environment\n    struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n    uint8_t att_idx = CSCPS_IDX(param->handle);\n    struct gattc_att_info_cfm *cfm;\n\n    // Send write response\n    cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n    cfm->handle = param->handle;\n\n    // check if it's a client configuration char\n    if ((att_idx == CSCS_IDX_CSC_MEAS_NTF_CFG) ||\n        (att_idx == CSCS_IDX_SC_CTNL_PT_NTF_CFG)) {\n      // CCC attribute length = 2\n      cfm->length = 2;\n      cfm->status = GAP_ERR_NO_ERROR;\n    } else if (att_idx == CSCS_IDX_SC_CTNL_PT_VAL) {\n      // force length to zero to reject any write starting from something != 0\n      cfm->length = 0;\n      cfm->status = GAP_ERR_NO_ERROR;\n    }\n    // not expected request\n    else {\n      cfm->length = 0;\n      cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CSCPS_NTF_CSC_MEAS_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cscps_ntf_csc_meas_req_handler(\n    ke_msg_id_t const msgid, struct cscps_ntf_csc_meas_req *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // State shall be Connected or Busy\n  if (ke_state_get(dest_id) == CSCPS_IDLE) {\n    // Get the address of the environment\n    struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n\n    // allocate and prepare data to notify\n    cscps_env->ntf =\n        (struct cscps_ntf *)ke_malloc(sizeof(struct cscps_ntf), KE_MEM_KE_MSG);\n\n    // pack measured value in database\n    cscps_env->ntf->length = CSCP_CSC_MEAS_MIN_LEN;\n\n    // Check the provided flags value\n    if (!CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg,\n                                    CSCP_FEAT_WHEEL_REV_DATA_SUPP) &&\n        CSCPS_IS_PRESENT(param->flags, CSCP_MEAS_WHEEL_REV_DATA_PRESENT)) {\n      // Force Wheel Revolution Data to No (Not supported)\n      param->flags &= ~CSCP_MEAS_WHEEL_REV_DATA_PRESENT;\n    }\n\n    if (!CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg,\n                                    CSCP_FEAT_CRANK_REV_DATA_SUPP) &&\n        CSCPS_IS_PRESENT(param->flags, CSCP_MEAS_CRANK_REV_DATA_PRESENT)) {\n      // Force Crank Revolution Data Present to No (Not supported)\n      param->flags &= ~CSCP_MEAS_CRANK_REV_DATA_PRESENT;\n    }\n\n    // Force the unused bits of the flag value to 0\n    cscps_env->ntf->value[0] = param->flags & CSCP_MEAS_ALL_PRESENT;\n\n    // Cumulative Wheel Resolutions\n    // Last Wheel Event Time\n    if (CSCPS_IS_PRESENT(param->flags, CSCP_MEAS_WHEEL_REV_DATA_PRESENT)) {\n      // Update the cumulative wheel revolutions value stored in the environment\n      if (param->wheel_rev < 0) {\n        // The value shall not decrement below zero\n        if (co_abs(param->wheel_rev) > cscps_env->tot_wheel_rev) {\n          cscps_env->tot_wheel_rev = 0;\n        } else {\n          cscps_env->tot_wheel_rev += param->wheel_rev;\n        }\n      } else {\n        cscps_env->tot_wheel_rev += param->wheel_rev;\n      }\n\n      // Cumulative Wheel Resolutions\n      co_write32p(&cscps_env->ntf->value[cscps_env->ntf->length],\n                  cscps_env->tot_wheel_rev);\n      cscps_env->ntf->length += 4;\n\n      // Last Wheel Event Time\n      co_write16p(&cscps_env->ntf->value[cscps_env->ntf->length],\n                  param->last_wheel_evt_time);\n      cscps_env->ntf->length += 2;\n    }\n\n    // Cumulative Crank Revolutions\n    // Last Crank Event Time\n    if (CSCPS_IS_PRESENT(param->flags, CSCP_MEAS_CRANK_REV_DATA_PRESENT)) {\n      // Cumulative Crank Revolutions\n      co_write32p(&cscps_env->ntf->value[cscps_env->ntf->length],\n                  param->cumul_crank_rev);\n      cscps_env->ntf->length += 2;\n\n      // Last Crank Event Time\n      co_write16p(&cscps_env->ntf->value[cscps_env->ntf->length],\n                  param->last_crank_evt_time);\n      cscps_env->ntf->length += 2;\n    }\n\n    // Configure the environment\n    cscps_env->operation = CSCPS_SEND_CSC_MEAS_OP_CODE;\n    cscps_env->ntf->cursor = 0;\n\n    // Go to busy state\n    ke_state_set(dest_id, CSCPS_BUSY);\n\n    // start operation execution\n    cscps_exe_operation();\n  } else {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref CSCPS_SC_CTNL_PT_CFM message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int cscps_sc_ctnl_pt_cfm_handler(ke_msg_id_t const msgid,\n                                          struct cscps_sc_ctnl_pt_cfm *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == CSCPS_BUSY) {\n    do { // check if op code valid\n      if ((param->op_code < CSCPS_CTNL_PT_CUMUL_VAL_OP_CODE) ||\n          (param->op_code > CSCPS_CTNL_ERR_IND_OP_CODE)) {\n        // Wrong op code\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      // Check the current operation\n      if ((cscps_env->operation < CSCPS_CTNL_PT_CUMUL_VAL_OP_CODE) ||\n          (param->op_code != cscps_env->operation)) {\n        // The confirmation has been sent without request indication, ignore\n        status = PRF_ERR_REQ_DISALLOWED;\n        break;\n      }\n\n      // The CP Control Point Characteristic must be supported if we are here\n      if (CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg,\n                                     CSCPS_SC_CTNL_PT_MASK)) {\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *ctl_pt_rsp = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, param->conidx), dest_id,\n            gattc_send_evt_cmd, CSCP_SC_CNTL_PT_RSP_MAX_LEN);\n\n        // Fill in the parameter structure\n        ctl_pt_rsp->operation = GATTC_INDICATE;\n        ctl_pt_rsp->handle = CSCPS_HANDLE(CSCS_IDX_SC_CTNL_PT_VAL);\n        // Pack Control Point confirmation\n        ctl_pt_rsp->length = CSCP_SC_CNTL_PT_RSP_MIN_LEN;\n\n        // Set the operation code (Response Code)\n        ctl_pt_rsp->value[0] = CSCP_CTNL_PT_RSP_CODE;\n        // Set the response value\n        ctl_pt_rsp->value[2] = (param->status > CSCP_CTNL_PT_RESP_FAILED)\n                                   ? CSCP_CTNL_PT_RESP_FAILED\n                                   : param->status;\n\n        switch (cscps_env->operation) {\n        // Set cumulative value\n        case (CSCPS_CTNL_PT_CUMUL_VAL_OP_CODE): {\n          // Set the request operation code\n          ctl_pt_rsp->value[1] = CSCP_CTNL_PT_OP_SET_CUMUL_VAL;\n\n          // Store the new value in the environment\n          cscps_env->tot_wheel_rev = param->value.cumul_wheel_rev;\n          status = GAP_ERR_NO_ERROR;\n        } break;\n\n        // Update Sensor Location\n        case (CSCPS_CTNL_PT_UPD_LOC_OP_CODE): {\n          // Set the request operation code\n          ctl_pt_rsp->value[1] = CSCP_CTNL_PT_OP_UPD_LOC;\n\n          if (param->status == CSCP_CTNL_PT_RESP_SUCCESS) {\n            // The CP Control Point Characteristic must be supported if we are\n            // here\n            if (CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg,\n                                           CSCPS_SENSOR_LOC_MASK)) {\n              cscps_env->sensor_loc = param->value.sensor_loc;\n              status = GAP_ERR_NO_ERROR;\n            }\n          }\n        } break;\n\n        case (CSCPS_CTNL_PT_SUPP_LOC_OP_CODE): {\n          // Set the request operation code\n          ctl_pt_rsp->value[1] = CSCP_CTNL_PT_OP_REQ_SUPP_LOC;\n\n          if (param->status == CSCP_CTNL_PT_RESP_SUCCESS) {\n            // Counter\n            uint8_t counter;\n\n            // Set the list of supported location\n            for (counter = 0; counter < CSCP_LOC_MAX; counter++) {\n              if (((param->value.supp_sensor_loc >> counter) & 0x0001) ==\n                  0x0001) {\n                ctl_pt_rsp->value[ctl_pt_rsp->length] = counter;\n                ctl_pt_rsp->length++;\n              }\n            }\n            status = GAP_ERR_NO_ERROR;\n          }\n        } break;\n\n        default: {\n          ASSERT_ERR(0);\n        } break;\n        }\n\n        // Send the event\n        ke_msg_send(ctl_pt_rsp);\n      }\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      // Inform the application that a procedure has been completed\n      cscps_send_cmp_evt(conidx, prf_src_task_get(&cscps_env->prf_env, conidx),\n                         prf_dst_task_get(&cscps_env->prf_env, conidx),\n                         cscps_env->operation, param->status);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_WRITE_REQ_IND message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // Check the connection handle\n  if (cscps_env != NULL) {\n    // CSC Measurement Characteristic, Client Characteristic Configuration\n    // Descriptor\n    if (param->handle == (CSCPS_HANDLE(CSCS_IDX_CSC_MEAS_NTF_CFG))) {\n      uint16_t ntf_cfg;\n      // Status\n      uint8_t status = PRF_ERR_INVALID_PARAM;\n\n      // Get the value\n      co_write16p(&ntf_cfg, param->value[0]);\n\n      // Check if the value is correct\n      if (ntf_cfg <= PRF_CLI_START_NTF) {\n        status = GAP_ERR_NO_ERROR;\n\n        // Save the new configuration in the environment\n        if (ntf_cfg == PRF_CLI_STOP_NTFIND) {\n          CSCPS_DISABLE_NTFIND(conidx, CSCP_PRF_CFG_FLAG_CSC_MEAS_NTF);\n        } else // ntf_cfg == PRF_CLI_START_NTF\n        {\n          CSCPS_ENABLE_NTFIND(conidx, CSCP_PRF_CFG_FLAG_CSC_MEAS_NTF);\n        }\n\n        // Inform the HL about the new configuration\n        struct cscps_cfg_ntfind_ind *ind = KE_MSG_ALLOC(\n            CSCPS_CFG_NTFIND_IND, prf_dst_task_get(&cscps_env->prf_env, conidx),\n            prf_src_task_get(&cscps_env->prf_env, conidx),\n            cscps_cfg_ntfind_ind);\n\n        ind->char_code = CSCP_CSCS_CSC_MEAS_CHAR;\n        ind->ntf_cfg = ntf_cfg;\n\n        ke_msg_send(ind);\n\n        // Enable Bonded Data\n        CSCPS_ENABLE_NTFIND(conidx, CSCP_PRF_CFG_PERFORMED_OK);\n      }\n      // else status is PRF_ERR_INVALID_PARAM\n\n      // Send the write response to the peer device\n      struct gattc_write_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n      cfm->handle = param->handle;\n      cfm->status = status;\n      ke_msg_send(cfm);\n    } else // Should be the SC Control Point Characteristic\n    {\n      if (CSCPS_IS_FEATURE_SUPPORTED(cscps_env->prfl_cfg,\n                                     CSCPS_SC_CTNL_PT_MASK)) {\n        // SC Control Point, Client Characteristic Configuration Descriptor\n        if (param->handle == (CSCPS_HANDLE(CSCS_IDX_SC_CTNL_PT_NTF_CFG))) {\n          uint16_t ntf_cfg;\n          // Status\n          uint8_t status = PRF_ERR_INVALID_PARAM;\n\n          // Get the value\n          co_write16p(&ntf_cfg, param->value[0]);\n\n          // Check if the value is correct\n          if ((ntf_cfg == PRF_CLI_STOP_NTFIND) ||\n              (ntf_cfg == PRF_CLI_START_IND)) {\n            status = GAP_ERR_NO_ERROR;\n\n            // Save the new configuration in the environment\n            if (ntf_cfg == PRF_CLI_STOP_NTFIND) {\n              CSCPS_DISABLE_NTFIND(conidx, CSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND);\n            } else // ntf_cfg == PRF_CLI_START_IND\n            {\n              CSCPS_ENABLE_NTFIND(conidx, CSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND);\n            }\n\n            // Inform the HL about the new configuration\n            struct cscps_cfg_ntfind_ind *ind =\n                KE_MSG_ALLOC(CSCPS_CFG_NTFIND_IND,\n                             prf_dst_task_get(&cscps_env->prf_env, conidx),\n                             prf_src_task_get(&cscps_env->prf_env, conidx),\n                             cscps_cfg_ntfind_ind);\n\n            ind->char_code = CSCP_CSCS_SC_CTNL_PT_CHAR;\n            ind->ntf_cfg = ntf_cfg;\n\n            ke_msg_send(ind);\n\n            // Enable Bonded Data\n            CSCPS_ENABLE_NTFIND(conidx, CSCP_PRF_CFG_PERFORMED_OK);\n          }\n          // else status is PRF_ERR_INVALID_PARAM\n\n          // Send the write response to the peer device\n          struct gattc_write_cfm *cfm =\n              KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n          cfm->handle = param->handle;\n          cfm->status = status;\n          ke_msg_send(cfm);\n        }\n        // SC Control Point Characteristic\n        else if (param->handle == (CSCPS_HANDLE(CSCS_IDX_SC_CTNL_PT_VAL))) {\n          // Write Response Status\n          uint8_t wr_status = ATT_ERR_NO_ERROR;\n          // Indication Status\n          uint8_t ind_status = CSCP_CTNL_PT_RESP_NOT_SUPP;\n\n          do {\n            // Check if sending of indications has been enabled\n            if (!CSCPS_IS_NTFIND_ENABLED(conidx,\n                                         CSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND)) {\n              // CCC improperly configured\n              wr_status = CSCP_ERROR_CCC_INVALID_PARAM;\n              ind_status = CSCP_CTNL_PT_RESP_FAILED;\n              break;\n            }\n\n            if (cscps_env->operation >= CSCPS_CTNL_PT_CUMUL_VAL_OP_CODE) {\n              // A procedure is already in progress\n              wr_status = CSCP_ERROR_PROC_IN_PROGRESS;\n              ind_status = CSCP_CTNL_PT_RESP_FAILED;\n              break;\n            }\n\n            if (cscps_env->operation == CSCPS_SEND_CSC_MEAS_OP_CODE) {\n              // Keep the message until the end of the current procedure\n              msg_status = KE_MSG_NO_FREE;\n              break;\n            }\n\n            // Allocate a request indication message for the application\n            struct cscps_sc_ctnl_pt_req_ind *req_ind =\n                KE_MSG_ALLOC(CSCPS_SC_CTNL_PT_REQ_IND,\n                             prf_dst_task_get(&cscps_env->prf_env, conidx),\n                             prf_src_task_get(&cscps_env->prf_env, conidx),\n                             cscps_sc_ctnl_pt_req_ind);\n\n            // Operation Code\n            req_ind->op_code = param->value[0];\n            // Connection index\n            req_ind->conidx = conidx;\n\n            // Operation Code\n            switch (param->value[0]) {\n            // Set Cumulative value\n            case (CSCP_CTNL_PT_OP_SET_CUMUL_VAL): {\n              // Check if the Wheel Revolution Data feature is supported\n              if (CSCPS_IS_FEATURE_SUPPORTED(cscps_env->features,\n                                             CSCP_FEAT_WHEEL_REV_DATA_SUPP)) {\n                // The request can be handled\n                ind_status = CSCP_CTNL_PT_RESP_SUCCESS;\n                cscps_env->operation = CSCPS_CTNL_PT_CUMUL_VAL_OP_CODE;\n\n                // Cumulative value\n                req_ind->value.cumul_value = co_read32p(¶m->value[1]);\n              }\n            } break;\n\n            // Update sensor location\n            case (CSCP_CTNL_PT_OP_UPD_LOC): {\n              // Check if the Multiple Sensor Location feature is supported\n              if (CSCPS_IS_FEATURE_SUPPORTED(cscps_env->features,\n                                             CSCP_FEAT_MULT_SENSOR_LOC_SUPP)) {\n                // Check the sensor location value\n                if (param->value[1] < CSCP_LOC_MAX) {\n                  // The request can be handled\n                  ind_status = CSCP_CTNL_PT_RESP_SUCCESS;\n\n                  cscps_env->operation = CSCPS_CTNL_PT_UPD_LOC_OP_CODE;\n\n                  // Sensor Location\n                  req_ind->value.sensor_loc = param->value[1];\n                } else {\n                  // The request can be handled\n                  ind_status = CSCP_CTNL_PT_RESP_INV_PARAM;\n                }\n              }\n            } break;\n\n            // Request supported sensor locations\n            case (CSCP_CTNL_PT_OP_REQ_SUPP_LOC): {\n              // Check if the Multiple Sensor Location feature is supported\n              if (CSCPS_IS_FEATURE_SUPPORTED(cscps_env->features,\n                                             CSCP_FEAT_MULT_SENSOR_LOC_SUPP)) {\n                // The request can be handled\n                ind_status = CSCP_CTNL_PT_RESP_SUCCESS;\n\n                cscps_env->operation = CSCPS_CTNL_PT_SUPP_LOC_OP_CODE;\n              }\n\n            } break;\n\n            default: {\n              // Operation Code is invalid, status is already\n              // CSCP_CTNL_PT_RESP_NOT_SUPP\n            } break;\n            }\n\n            // If no error raised, inform the application about the request\n            if (ind_status == CSCP_CTNL_PT_RESP_SUCCESS) {\n              // Send the request indication to the application\n              ke_msg_send(req_ind);\n              // Go to the Busy status\n              ke_state_set(dest_id, CSCPS_BUSY);\n              // Align error code\n              wr_status = GAP_ERR_NO_ERROR;\n            } else {\n              // Free the allocated message\n              ke_msg_free(ke_param2msg(req_ind));\n            }\n          } while (0);\n\n          // Send the write response to the peer device\n          struct gattc_write_cfm *cfm =\n              KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n          cfm->handle = param->handle;\n          cfm->status = wr_status;\n          ke_msg_send(cfm);\n\n          // If error raised in control point, inform the peer\n          if ((ind_status != CSCP_CTNL_PT_RESP_SUCCESS) &&\n              (param->handle == (CSCPS_HANDLE(CSCS_IDX_SC_CTNL_PT_VAL)))) {\n            cscps_send_rsp_ind(conidx, param->value[0], ind_status);\n          }\n        }\n      } else {\n        ASSERT_ERR(0);\n      }\n    }\n  }\n  // else drop the message\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATT_NOTIFY_CMP_EVT message meaning that a notification\n *or an indication has been correctly sent to peer device (but not confirmed by\n *peer device).\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Get the address of the environment\n  struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n\n  // Check if a connection exists\n  if (ke_state_get(dest_id) == CSCPS_BUSY) {\n    switch (param->operation) {\n    case (GATTC_NOTIFY): {\n      ASSERT_ERR(cscps_env->operation == CSCPS_SEND_CSC_MEAS_OP_CODE);\n      // continuer operation execution\n      cscps_exe_operation();\n    } break;\n\n    case (GATTC_INDICATE): {\n      ASSERT_ERR(cscps_env->operation >= CSCPS_CTNL_PT_CUMUL_VAL_OP_CODE);\n\n      // Inform the application that a procedure has been completed\n      cscps_send_cmp_evt(conidx, prf_src_task_get(&cscps_env->prf_env, conidx),\n                         prf_dst_task_get(&cscps_env->prf_env, conidx),\n                         cscps_env->operation, param->status);\n      // else ignore the message\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(cscps){\n    {CSCPS_ENABLE_REQ, (ke_msg_func_t)cscps_enable_req_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {CSCPS_NTF_CSC_MEAS_REQ, (ke_msg_func_t)cscps_ntf_csc_meas_req_handler},\n    {CSCPS_SC_CTNL_PT_CFM, (ke_msg_func_t)cscps_sc_ctnl_pt_cfm_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid cscps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct cscps_env_tag *cscps_env = PRF_ENV_GET(CSCPS, cscps);\n\n  task_desc->msg_handler_tab = cscps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(cscps_msg_handler_tab);\n  task_desc->state = cscps_env->state;\n  task_desc->idx_max = CSCPS_IDX_MAX;\n}\n\n#endif //(BLE_CSC_SENSOR)\n\n/// @} CSCPSTASK\n"
  },
  {
    "path": "services/ble_profiles/datapath/datapathps/api/datapathps_task.h",
    "content": "#ifndef _DATAPATHPS_TASK_H_\n#define _DATAPATHPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup DATAPATHPSTASK Task\n * @ingroup DATAPATHPS\n * @brief Heart Rate Profile Task.\n *\n * The DATAPATHPSTASK is responsible for handling the messages coming in and out of the\n * @ref DATAPATHPS collector block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Messages for Data Path Server Profile \nenum datapathps_msg_id\n{\n\tDATAPATHPS_TX_CCC_CHANGED = TASK_FIRST_MSG(TASK_ID_DATAPATHPS),\n\n\tDATAPATHPS_TX_DATA_SENT,\n\t\n\tDATAPATHPS_RX_DATA_RECEIVED,\n\n\tDATAPATHPS_NOTIFICATION_RECEIVED,\n\n\tDATAPATHPS_SEND_DATA_VIA_NOTIFICATION,\n\n\tDATAPATHPS_SEND_DATA_VIA_INDICATION,\n\n\tDATAPATHPS_SEND_DATA_VIA_WRITE_COMMAND,\n\n\tDATAPATHPS_SEND_DATA_VIA_WRITE_REQUEST,\n\n\tDATAPATHPS_CONTROL_NOTIFICATION,\n\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\nstruct ble_datapath_tx_notif_config_t\n{\n\tbool \t\tisNotificationEnabled;\n};\n\nstruct ble_datapath_rx_data_ind_t\n{\n\tuint16_t\tlength;\n\tuint8_t\t\tdata[0];\n};\n\nstruct ble_datapath_tx_sent_ind_t\n{\n\tuint8_t \tstatus;\n};\n\nstruct ble_datapath_send_data_req_t\n{\n\tuint8_t \tconnecionIndex;\n\tuint32_t \tlength;\n\tuint8_t  \tvalue[__ARRAY_EMPTY];\n};\n\nstruct ble_datapath_control_notification_t\n{\n\tbool \t\tisEnable;\n    uint8_t     connecionIndex;\n};\n\n/// @} DATAPATHPSTASK\n\n#endif /* _DATAPATHPS_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/datapath/datapathps/src/datapathps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup DPPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_DATAPATH_SERVER)\n#include \"attm.h\"\n#include \"datapathps.h\"\n#include \"datapathps_task.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * DATAPATH SRVER PROFILE ATTRIBUTES\n ****************************************************************************************\n */\n\n#define USE_128BIT_UUID 1\n\n#if USE_128BIT_UUID\n\n#define datapath_service_uuid_128_content                                      \\\n  {                                                                            \\\n    0x12, 0x34, 0x56, 0x78, 0x90, 0x00, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00,    \\\n        0x00, 0x01, 0x00, 0x01                                                 \\\n  }\n#define datapath_tx_char_val_uuid_128_content                                  \\\n  {                                                                            \\\n    0x12, 0x34, 0x56, 0x78, 0x91, 0x00, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00,    \\\n        0x00, 0x02, 0x00, 0x02                                                 \\\n  }\n#define datapath_rx_char_val_uuid_128_content                                  \\\n  {                                                                            \\\n    0x12, 0x34, 0x56, 0x78, 0x92, 0x00, 0x00, 0x80, 0x00, 0x10, 0x00, 0x00,    \\\n        0x00, 0x03, 0x00, 0x03                                                 \\\n  }\n\n#define ATT_DECL_PRIMARY_SERVICE_UUID                                          \\\n  { 0x00, 0x28 }\n#define ATT_DECL_CHARACTERISTIC_UUID                                           \\\n  { 0x03, 0x28 }\n#define ATT_DESC_CLIENT_CHAR_CFG_UUID                                          \\\n  { 0x02, 0x29 }\n#define ATT_DESC_CHAR_USER_DESCRIPTION_UUID                                    \\\n  { 0x01, 0x29 }\n\nstatic const uint8_t DATAPATH_SERVICE_UUID_128[ATT_UUID_128_LEN] =\n    datapath_service_uuid_128_content;\n\n/// Full DATAPATH SERVER Database Description - Used to add attributes into the\n/// database\nconst struct attm_desc_128 datapathps_att_db[DATAPATHPS_IDX_NB] = {\n    // Service Declaration\n    [DATAPATHPS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE_UUID, PERM(RD, ENABLE), 0,\n                            0},\n\n    // TX Characteristic Declaration\n    [DATAPATHPS_IDX_TX_CHAR] = {ATT_DECL_CHARACTERISTIC_UUID, PERM(RD, ENABLE),\n                                0, 0},\n    // TX Characteristic Value\n    [DATAPATHPS_IDX_TX_VAL] = {datapath_tx_char_val_uuid_128_content,\n                               PERM(NTF, ENABLE) | PERM(RD, ENABLE),\n                               PERM(RI, ENABLE) |\n                                   PERM_VAL(UUID_LEN, PERM_UUID_128),\n                               DATAPATHPS_MAX_LEN},\n    // TX Characteristic - Client Characteristic Configuration Descriptor\n    [DATAPATHPS_IDX_TX_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG_UUID,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   0, 0},\n    // TX Characteristic - Characteristic User Description Descriptor\n    [DATAPATHPS_IDX_TX_DESC] = {ATT_DESC_CHAR_USER_DESCRIPTION_UUID,\n                                PERM(RD, ENABLE), PERM(RI, ENABLE), 32},\n\n    // RX Characteristic Declaration\n    [DATAPATHPS_IDX_RX_CHAR] = {ATT_DECL_CHARACTERISTIC_UUID, PERM(RD, ENABLE),\n                                0, 0},\n    // RX Characteristic Value\n    [DATAPATHPS_IDX_RX_VAL] = {datapath_rx_char_val_uuid_128_content,\n                               PERM(WRITE_REQ, ENABLE) |\n                                   PERM(WRITE_COMMAND, ENABLE),\n                               PERM(RI, ENABLE) |\n                                   PERM_VAL(UUID_LEN, PERM_UUID_128),\n                               DATAPATHPS_MAX_LEN},\n    // RX Characteristic - Characteristic User Description Descriptor\n    [DATAPATHPS_IDX_RX_DESC] = {ATT_DESC_CHAR_USER_DESCRIPTION_UUID,\n                                PERM(RD, ENABLE), PERM(RI, ENABLE), 32},\n};\n#else\n\n#define DATAPATHPS_SERVICE_UUID_16BIT 0xFEF8\n#define DATAPATHPS_TX_CHAR_VAL_UUID_16BIT 0xFEF9\n#define DATAPATHPS_RX_CHAR_VAL_UUID_16BIT 0xFEFA\n\nconst struct attm_desc datapathps_att_db[DATAPATHPS_IDX_NB] = {\n    // Service Declaration\n    [DATAPATHPS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // TX Characteristic Declaration\n    [DATAPATHPS_IDX_TX_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // TX Characteristic Value\n    [DATAPATHPS_IDX_TX_VAL] = {DATAPATHPS_TX_CHAR_VAL_UUID_16BIT,\n                               PERM(NTF, ENABLE), PERM(RI, ENABLE),\n                               DATAPATHPS_MAX_LEN},\n    // TX Characteristic - Client Characteristic Configuration Descriptor\n    [DATAPATHPS_IDX_TX_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   0, 0},\n    // TX Characteristic - Characteristic User Description Descriptor\n    [DATAPATHPS_IDX_TX_DESC] = {ATT_DESC_CHAR_USER_DESCRIPTION,\n                                PERM(RD, ENABLE), PERM(RI, ENABLE), 32},\n\n    // RX Characteristic Declaration\n    [DATAPATHPS_IDX_RX_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // RX Characteristic Value\n    [DATAPATHPS_IDX_RX_VAL] = {DATAPATHPS_RX_CHAR_VAL_UUID_16BIT,\n                               PERM(WRITE_REQ, ENABLE) |\n                                   PERM(WRITE_COMMAND, ENABLE),\n                               PERM(RI, ENABLE), DATAPATHPS_MAX_LEN},\n    // RX Characteristic - Characteristic User Description Descriptor\n    [DATAPATHPS_IDX_RX_DESC] = {ATT_DESC_CHAR_USER_DESCRIPTION,\n                                PERM(RD, ENABLE), PERM(RI, ENABLE), 32},\n};\n\n#endif\n/**\n ****************************************************************************************\n * @brief Initialization of the DATAPATHPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t datapathps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                               uint16_t app_task, uint8_t sec_lvl,\n                               void *params) {\n  uint8_t status;\n\n  // Add Service Into Database\n#if USE_128BIT_UUID\n\n  status = attm_svc_create_db_128(\n      start_hdl, DATAPATH_SERVICE_UUID_128, NULL, DATAPATHPS_IDX_NB, NULL,\n      env->task, &datapathps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE) | PERM_VAL(SVC_UUID_LEN, PERM_UUID_128));\n#else\n  status = attm_svc_create_db(\n      start_hdl, DATAPATHPS_SERVICE_UUID_16BIT, NULL, DATAPATHPS_IDX_NB, NULL,\n      env->task, &datapathps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n#endif\n\n  BLE_GATT_DBG(\"attm_svc_create_db_128 returns %d start handle is %d\", status,\n               *start_hdl);\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate DATAPATHPS required environment variable\n    struct datapathps_env_tag *datapathps_env =\n        (struct datapathps_env_tag *)ke_malloc(\n            sizeof(struct datapathps_env_tag), KE_MEM_ATT_DB);\n\n    memset((uint8_t *)datapathps_env, 0, sizeof(struct datapathps_env_tag));\n    // Initialize DATAPATHPS environment\n    env->env = (prf_env_t *)datapathps_env;\n    datapathps_env->shdl = *start_hdl;\n\n    datapathps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Mono Instantiated task\n    datapathps_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_DATAPATHPS;\n    datapathps_task_init(&(env->desc));\n\n    /* Put HRS in Idle state */\n    ke_state_set(env->task, DATAPATHPS_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the DATAPATHPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void datapathps_destroy(struct prf_task_env *env) {\n  struct datapathps_env_tag *datapathps_env =\n      (struct datapathps_env_tag *)env->env;\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(datapathps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void datapathps_create(struct prf_task_env *env, uint8_t conidx) {\n  struct datapathps_env_tag *datapathps_env =\n      (struct datapathps_env_tag *)env->env;\n  struct prf_svc datapathps_svc = {datapathps_env->shdl,\n                                   datapathps_env->shdl + DATAPATHPS_IDX_NB};\n  prf_register_atthdl2gatt(env->env, conidx, &datapathps_svc);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void datapathps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                               uint8_t reason) {\n  /* Nothing to do */\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// DATAPATHPS Task interface required by profile manager\nconst struct prf_task_cbs datapathps_itf = {\n    (prf_init_fnct)datapathps_init,\n    datapathps_destroy,\n    datapathps_create,\n    datapathps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *datapathps_prf_itf_get(void) {\n  return &datapathps_itf;\n}\n\n#endif /* BLE_DATAPATH_SERVER */\n\n/// @} DATAPATHPS\n"
  },
  {
    "path": "services/ble_profiles/datapath/datapathps/src/datapathps.h",
    "content": "#ifndef _DATAPATHPS_H_\n#define _DATAPATHPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup DATAPATHPS Datapath Profile Server\n * @ingroup DATAPATHP\n * @brief Datapath Profile Server\n *\n * Datapath Profile Server provides functionalities to upper layer module\n * application. The device using this profile takes the role of Datapath Server.\n *\n * The interface of this role to the Application is:\n *  - Enable the profile role (from APP)\n *  - Disable the profile role (from APP)\n *  - Send data to peer device via notifications  (from APP)\n *  - Receive data from peer device via write no response (from APP)\n *\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_DATAPATH_SERVER)\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"datapathps_task.h\"\n#include \"attm.h\"\n#include \"prf_utils.h\"\n\n\n#define BLE_MAXIMUM_CHARACTERISTIC_DESCRIPTION\t32\n\nstatic const char custom_tx_desc[] = \"Data Path TX Data\";\nstatic const char custom_rx_desc[] = \"Data Path RX Data\";\n\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n#define DATAPATHPS_MAX_LEN            (509)\t// consider the extended data length\n\n#define DATAPATHPS_MANDATORY_MASK             (0x0F)\n#define DATAPATHPS_BODY_SENSOR_LOC_MASK       (0x30)\n#define DATAPATHPS_HR_CTNL_PT_MASK            (0xC0)\n\n#define HRP_PRF_CFG_PERFORMED_OK        (0x80)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n#define DATAPATHPS_IS_SUPPORTED(features, mask) ((features & mask) == mask)\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Possible states of the DATAPATHPS task\nenum\n{\n    /// Idle state\n    DATAPATHPS_IDLE,\n    /// Connected state\n    DATAPATHPS_BUSY,\n\n    /// Number of defined states.\n    DATAPATHPS_STATE_MAX,\n};\n\n///Attributes State Machine\nenum\n{\n    DATAPATHPS_IDX_SVC,\n\n    DATAPATHPS_IDX_TX_CHAR,\n    DATAPATHPS_IDX_TX_VAL,\n    DATAPATHPS_IDX_TX_NTF_CFG,\n    DATAPATHPS_IDX_TX_DESC,\n\n    DATAPATHPS_IDX_RX_CHAR,\n    DATAPATHPS_IDX_RX_VAL,\n\n    DATAPATHPS_IDX_RX_DESC,\n\n    DATAPATHPS_IDX_NB,\n};\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Datapath Profile Server environment variable\nstruct datapathps_env_tag\n{\n    /// profile environment\n    prf_env_t \tprf_env;\n    /// Service Start Handle\n    uint16_t    shdl;\n    /// flag to mark whether notification is enabled\n    uint8_t     isNotificationEnabled[BLE_CONNECTION_MAX];\n    /// State of different task instances\n    ke_state_t  state;\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve HRP service profile interface\n *\n * @return HRP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* datapathps_prf_itf_get(void);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid datapathps_task_init(struct ke_task_desc *task_desc);\n\n\n\n#endif /* #if (BLE_DATAPATH_SERVER) */\n\n/// @} DATAPATHPS\n\n#endif /* _DATAPATHPS_H_ */\n\n"
  },
  {
    "path": "services/ble_profiles/datapath/datapathps/src/datapathps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup DATAPATHPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_DATAPATH_SERVER)\n#include \"attm.h\"\n#include \"datapathps.h\"\n#include \"datapathps_task.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\nstatic int gapc_disconnect_ind_handler(ke_msg_id_t const msgid,\n                                       struct gapc_disconnect_ind const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  datapathps_env->isNotificationEnabled[conidx] = false;\n  return KE_MSG_CONSUMED;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GL2C_CODE_ATT_WR_CMD_IND message.\n * The handler compares the new values with current ones and notifies them if\n *they changed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  BLE_GATT_DBG(\n      \"gattc_write_req_ind_handler datapathps_env 0x%x write handle %d shdl %d\",\n      datapathps_env, param->handle, datapathps_env->shdl);\n\n  if (datapathps_env != NULL) {\n    // TX ccc\n    if (param->handle == (datapathps_env->shdl + DATAPATHPS_IDX_TX_NTF_CFG)) {\n      uint16_t value = 0x0000;\n\n      // Extract value before check\n      memcpy(&value, &(param->value), sizeof(uint16_t));\n\n      if (value == PRF_CLI_STOP_NTFIND) {\n        datapathps_env->isNotificationEnabled[conidx] = false;\n      } else if (value == PRF_CLI_START_NTF) {\n        datapathps_env->isNotificationEnabled[conidx] = true;\n      } else {\n        status = PRF_APP_ERROR;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Inform APP of TX ccc change\n        struct ble_datapath_tx_notif_config_t *ind =\n            KE_MSG_ALLOC(DATAPATHPS_TX_CCC_CHANGED,\n                         prf_dst_task_get(&datapathps_env->prf_env, conidx),\n                         prf_src_task_get(&datapathps_env->prf_env, conidx),\n                         ble_datapath_tx_notif_config_t);\n\n        ind->isNotificationEnabled =\n            datapathps_env->isNotificationEnabled[conidx];\n\n        ke_msg_send(ind);\n      }\n    }\n    // RX data\n    else if (param->handle == (datapathps_env->shdl + DATAPATHPS_IDX_RX_VAL)) {\n      // inform APP of data\n      struct ble_datapath_rx_data_ind_t *ind =\n          KE_MSG_ALLOC_DYN(DATAPATHPS_RX_DATA_RECEIVED,\n                           prf_dst_task_get(&datapathps_env->prf_env, conidx),\n                           prf_src_task_get(&datapathps_env->prf_env, conidx),\n                           ble_datapath_rx_data_ind_t, param->length);\n\n      ind->length = param->length;\n      memcpy((uint8_t *)(ind->data), &(param->value), param->length);\n\n      ke_msg_send(ind);\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  }\n\n  // Send write response\n  struct gattc_write_cfm *cfm =\n      KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n  cfm->handle = param->handle;\n  cfm->status = status;\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY message meaning that\n *Measurement notification has been correctly sent to peer device (but not\n *confirmed by peer device).\n * *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // notification has been sent out\n  if ((GATTC_NOTIFY == param->operation) ||\n      (GATTC_WRITE_NO_RESPONSE == param->operation)) {\n\n    struct ble_datapath_tx_sent_ind_t *ind =\n        KE_MSG_ALLOC(DATAPATHPS_TX_DATA_SENT,\n                     prf_dst_task_get(&datapathps_env->prf_env, conidx),\n                     prf_src_task_get(&datapathps_env->prf_env, conidx),\n                     ble_datapath_tx_sent_ind_t);\n\n    ind->status = param->status;\n\n    ke_msg_send(ind);\n  }\n\n  ke_state_set(dest_id, DATAPATHPS_IDLE);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n\n  struct gattc_read_cfm *cfm =\n      KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                       BLE_MAXIMUM_CHARACTERISTIC_DESCRIPTION);\n\n  uint8_t conidx = KE_IDX_GET(src_id);\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  BLE_GATT_DBG(\"gattc_read_req_ind_handler read handle %d shdl %d\",\n               param->handle, datapathps_env->shdl);\n\n  if (param->handle == (datapathps_env->shdl + DATAPATHPS_IDX_TX_DESC)) {\n    cfm->length = sizeof(custom_tx_desc);\n    memcpy(cfm->value, custom_tx_desc, cfm->length);\n  } else if (param->handle == (datapathps_env->shdl + DATAPATHPS_IDX_RX_DESC)) {\n    cfm->length = sizeof(custom_rx_desc);\n    memcpy(cfm->value, custom_rx_desc, cfm->length);\n  } else if (param->handle ==\n             (datapathps_env->shdl + DATAPATHPS_IDX_TX_NTF_CFG)) {\n    uint16_t notify_ccc;\n    if (datapathps_env->isNotificationEnabled[conidx]) {\n      notify_ccc = 1;\n    } else {\n      notify_ccc = 0;\n    }\n    cfm->length = sizeof(notify_ccc);\n    memcpy(cfm->value, (uint8_t *)¬ify_ccc, cfm->length);\n  }\n\n  else {\n    cfm->length = 0;\n    status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n  }\n\n  cfm->handle = param->handle;\n\n  cfm->status = status;\n\n  ke_msg_send(cfm);\n\n  ke_state_set(dest_id, DATAPATHPS_IDLE);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic void send_notifiction(uint8_t conidx, const uint8_t *ptrData,\n                             uint32_t length) {\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n\n  if (datapathps_env->isNotificationEnabled[conidx]) {\n    // Allocate the GATT notification message\n    struct gattc_send_evt_cmd *report_ntf =\n        KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         prf_src_task_get(&datapathps_env->prf_env, conidx),\n                         gattc_send_evt_cmd, length);\n\n    // Fill in the parameter structure\n    report_ntf->operation = GATTC_NOTIFY;\n    report_ntf->handle = datapathps_env->shdl + DATAPATHPS_IDX_TX_VAL;\n    // pack measured value in database\n    report_ntf->length = length;\n    memcpy(report_ntf->value, ptrData, length);\n    // send notification to peer device\n    ke_msg_send(report_ntf);\n  }\n}\n\n__STATIC int send_data_via_notification_handler(\n    ke_msg_id_t const msgid, struct ble_datapath_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_notifiction(param->connecionIndex, param->value, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\nstatic void send_indication(uint8_t conidx, const uint8_t *ptrData,\n                            uint32_t length) {\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n\n  if (datapathps_env->isNotificationEnabled[conidx]) {\n    // Allocate the GATT notification message\n    struct gattc_send_evt_cmd *report_ntf =\n        KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         prf_src_task_get(&datapathps_env->prf_env, conidx),\n                         gattc_send_evt_cmd, length);\n\n    // Fill in the parameter structure\n    report_ntf->operation = GATTC_INDICATE;\n    report_ntf->handle = datapathps_env->shdl + DATAPATHPS_IDX_TX_VAL;\n    // pack measured value in database\n    report_ntf->length = length;\n    memcpy(report_ntf->value, ptrData, length);\n    // send notification to peer device\n    ke_msg_send(report_ntf);\n  }\n}\n\n__STATIC int send_data_via_indication_handler(\n    ke_msg_id_t const msgid, struct ble_datapath_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_indication(param->connecionIndex, param->value, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int send_data_via_write_command_handler(\n    ke_msg_id_t const msgid, struct ble_datapath_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n\n  prf_gatt_write(&(datapathps_env->prf_env), KE_IDX_GET(dest_id),\n                 datapathps_env->shdl + DATAPATHPS_IDX_RX_VAL,\n                 (uint8_t *)¶m->value, param->length,\n                 GATTC_WRITE_NO_RESPONSE);\n\n  ke_state_set(dest_id, DATAPATHPS_BUSY);\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int send_data_via_write_request_handler(\n    ke_msg_id_t const msgid, struct ble_datapath_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n\n  prf_gatt_write(&(datapathps_env->prf_env), KE_IDX_GET(dest_id),\n                 datapathps_env->shdl + DATAPATHPS_IDX_RX_VAL,\n                 (uint8_t *)¶m->value, param->length, GATTC_WRITE);\n\n  ke_state_set(dest_id, DATAPATHPS_BUSY);\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n\n  switch (param->type) {\n  case GATTC_INDICATE: {\n    // confirm that indication has been correctly received\n    struct gattc_event_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n    cfm->handle = param->handle;\n    ke_msg_send(cfm);\n  }\n    /* no break */\n\n  case GATTC_NOTIFY: {\n    if (param->handle == datapathps_env->shdl + DATAPATHPS_IDX_TX_VAL) {\n      // inform APP of data\n      struct ble_datapath_rx_data_ind_t *ind =\n          KE_MSG_ALLOC_DYN(DATAPATHPS_NOTIFICATION_RECEIVED,\n                           prf_dst_task_get(&datapathps_env->prf_env, conidx),\n                           prf_src_task_get(&datapathps_env->prf_env, conidx),\n                           ble_datapath_rx_data_ind_t, param->length);\n\n      ind->length = param->length;\n      memcpy((uint8_t *)(ind->data), &(param->value), param->length);\n\n      ke_msg_send(ind);\n    }\n  } break;\n\n  default:\n    break;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int control_notification_handler(\n    ke_msg_id_t const msgid,\n    struct ble_datapath_control_notification_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n  uint16_t ccc_write_val = 0;\n  if (param->isEnable) {\n    ccc_write_val = 1;\n  }\n\n  prf_gatt_write(&(datapathps_env->prf_env), param->connecionIndex,\n                 datapathps_env->shdl + DATAPATHPS_IDX_TX_NTF_CFG,\n                 (uint8_t *)&ccc_write_val, sizeof(ccc_write_val), GATTC_WRITE);\n\n  ke_state_set(dest_id, DATAPATHPS_BUSY);\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_att_info_req_ind_handler(ke_msg_id_t const msgid,\n                                          struct gattc_att_info_req_ind *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct gattc_att_info_cfm *cfm;\n\n  // Send write response\n  cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n  cfm->handle = param->handle;\n\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n  // check if it's a client configuration char\n  if (param->handle == datapathps_env->shdl + DATAPATHPS_IDX_TX_NTF_CFG) {\n    // CCC attribute length = 2\n    cfm->length = 2;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle == datapathps_env->shdl + DATAPATHPS_IDX_RX_VAL) {\n    // force length to zero to reject any write starting from something != 0\n    cfm->length = 0;\n    cfm->status = GAP_ERR_NO_ERROR;\n  }\n  // not expected request\n  else {\n    cfm->length = 0;\n    cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n  }\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/* Default State handlers definition. */\nKE_MSG_HANDLER_TAB(datapathps){\n    {GAPC_DISCONNECT_IND, (ke_msg_func_t)gapc_disconnect_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {DATAPATHPS_SEND_DATA_VIA_NOTIFICATION,\n     (ke_msg_func_t)send_data_via_notification_handler},\n    {DATAPATHPS_SEND_DATA_VIA_INDICATION,\n     (ke_msg_func_t)send_data_via_indication_handler},\n    {DATAPATHPS_SEND_DATA_VIA_WRITE_COMMAND,\n     (ke_msg_func_t)send_data_via_write_command_handler},\n    {DATAPATHPS_SEND_DATA_VIA_WRITE_REQUEST,\n     (ke_msg_func_t)send_data_via_write_request_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {DATAPATHPS_CONTROL_NOTIFICATION,\n     (ke_msg_func_t)control_notification_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n\n};\n\nvoid datapathps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct datapathps_env_tag *datapathps_env =\n      PRF_ENV_GET(DATAPATHPS, datapathps);\n\n  task_desc->msg_handler_tab = datapathps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(datapathps_msg_handler_tab);\n  task_desc->state = &(datapathps_env->state);\n  task_desc->idx_max = BLE_CONNECTION_MAX;\n}\n\n#endif /* #if (BLE_DATAPATH_SERVER) */\n\n/// @} DATAPATHPSTASK\n"
  },
  {
    "path": "services/ble_profiles/dis/disc/api/disc_task.h",
    "content": "#ifndef DISC_TASK_H_\n#define DISC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup DISCTASK Device Information Service Client Task\n * @ingroup DISC\n * @brief Device Information Service Client Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\nenum\n{\n    /// Start the find me locator profile - at connection\n    DISC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_DISC),\n    /// Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    DISC_ENABLE_RSP,\n\n    /// Generic message to read a DIS characteristic value\n    DISC_RD_CHAR_REQ,\n    /// Generic message for read responses for APP\n    DISC_RD_CHAR_RSP,\n};\n\nenum\n{\n    DISC_MANUFACTURER_NAME_CHAR,\n    DISC_MODEL_NB_STR_CHAR,\n    DISC_SERIAL_NB_STR_CHAR,\n    DISC_HARD_REV_STR_CHAR,\n    DISC_FIRM_REV_STR_CHAR,\n    DISC_SW_REV_STR_CHAR,\n    DISC_SYSTEM_ID_CHAR,\n    DISC_IEEE_CHAR,\n    DISC_PNP_ID_CHAR,\n\n    DISC_CHAR_MAX,\n};\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Device Information Service\n */\nstruct disc_dis_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    struct prf_char_inf chars[DISC_CHAR_MAX];\n};\n\n/// Parameters of the @ref DISC_ENABLE_REQ message\nstruct disc_enable_req\n{\n    ///Connection type\n    uint8_t con_type;\n\n    /// Existing handle values dis\n    struct disc_dis_content dis;\n};\n\n/// Parameters of the @ref DISC_ENABLE_RSP message\nstruct disc_enable_rsp\n{\n    ///status\n    uint8_t status;\n\n    /// DIS handle values and characteristic properties\n    struct disc_dis_content dis;\n};\n\n///Parameters of the @ref DISC_RD_CHAR_REQ message\nstruct disc_rd_char_req\n{\n    ///Characteristic value code\n    uint8_t char_code;\n};\n\n///Parameters of the @ref DISC_RD_CHAR_RSP message\nstruct disc_rd_char_rsp\n{\n    /// Attribute data information\n    struct prf_att_info info;\n};\n\n\n\n/// @} DISCTASK\n\n#endif // DISC_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/dis/disc/src/disc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup DISC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_DIS_CLIENT)\n#include \"disc.h\"\n#include \"disc_task.h\"\n#include \"gap.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialization of the DISC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t disc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct disc_env_tag *disc_env = (struct disc_env_tag *)ke_malloc(\n      sizeof(struct disc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate DISC required environment variable\n  env->env = (prf_env_t *)disc_env;\n\n  disc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  disc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_DISC;\n  disc_task_init(&(env->desc));\n\n  for (idx = 0; idx < DISC_IDX_MAX; idx++) {\n    disc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), DISC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the DISC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void disc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct disc_env_tag *disc_env = (struct disc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < DISC_IDX_MAX; idx++) {\n    if (disc_env->env[idx] != NULL) {\n      ke_free(disc_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(disc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void disc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put DIS Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), DISC_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void disc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct disc_env_tag *disc_env = (struct disc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (disc_env->env[conidx] != NULL) {\n    ke_free(disc_env->env[conidx]);\n    disc_env->env[conidx] = NULL;\n  }\n\n  /* Put DIS Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), DISC_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// DISC Task interface required by profile manager\nconst struct prf_task_cbs disc_itf = {\n    disc_init,\n    disc_destroy,\n    disc_create,\n    disc_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *disc_prf_itf_get(void) { return &disc_itf; }\n\nvoid disc_enable_rsp_send(struct disc_env_tag *disc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Send APP the details of the discovered attributes on DISC\n  struct disc_enable_rsp *rsp = KE_MSG_ALLOC(\n      DISC_ENABLE_RSP, prf_dst_task_get(&(disc_env->prf_env), conidx),\n      prf_src_task_get(&(disc_env->prf_env), conidx), disc_enable_rsp);\n\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->dis = disc_env->env[conidx]->dis;\n\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(disc_env->prf_env), conidx), DISC_IDLE);\n  } else {\n    // clean-up environment variable allocated for task instance\n    ke_free(disc_env->env[conidx]);\n    disc_env->env[conidx] = NULL;\n  }\n\n  ke_msg_send(rsp);\n}\n\n#endif // BLE_DIS_CLIENT\n\n/// @} DISC\n"
  },
  {
    "path": "services/ble_profiles/dis/disc/src/disc.h",
    "content": "#ifndef DISC_H_\n#define DISC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup DIS Device Information Service\n * @ingroup PROFILE\n * @brief Device Information Service\n *****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @addtogroup DISC Device Information Service Client\n * @ingroup DIS\n * @brief Device Information Service Client\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_DIS_CLIENT)\n#include \n#include \n#include \"ke_task.h\"\n#include \"prf_utils.h\"\n#include \"disc_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of Device Information Service Client task instances\n#define DISC_IDX_MAX    (BLE_CONNECTION_MAX)\n\n/// Possible states of the DISC task\nenum\n{\n    /// Not Connected State\n    DISC_FREE,\n    /// Idle state\n    DISC_IDLE,\n    /// Discovering State\n    DISC_DISCOVERING,\n    /// Busy State\n    DISC_BUSY,\n\n    ///Number of defined states.\n    DISC_STATE_MAX\n};\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Environment variable for each Connections\nstruct disc_cnx_env\n{\n    ///Current Time Service Characteristics\n    struct disc_dis_content dis;\n    /// Last char. code requested to read.\n    uint8_t  last_char_code;\n    /// counter used to check service uniqueness\n    uint8_t  nb_svc;\n};\n\n/// Device Information Service Client environment variable\nstruct disc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct disc_cnx_env* env[DISC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[DISC_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve DIS client profile interface\n *\n * @return DIS client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* disc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Thermometer ATT DB discovery results to HTPC host.\n ****************************************************************************************\n */\nvoid disc_enable_rsp_send(struct disc_env_tag *disc_env, uint8_t conidx, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid disc_task_init(struct ke_task_desc *task_desc);\n\n#endif //BLE_DIS_CLIENT\n\n/// @} DISC\n\n#endif // DISC_H_\n"
  },
  {
    "path": "services/ble_profiles/dis/disc/src/disc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup DISCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_DIS_CLIENT)\n#include \"co_utils.h\"\n#include \"disc.h\"\n#include \"disc_task.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n\n#include \"ke_mem.h\"\n\n/// State machine used to retrieve Device Information Service characteristics\n/// information\nconst struct prf_char_def disc_dis_char[DISC_CHAR_MAX] = {\n    /// Manufacturer Name\n    [DISC_MANUFACTURER_NAME_CHAR] = {ATT_CHAR_MANUF_NAME, ATT_OPTIONAL,\n                                     ATT_CHAR_PROP_RD},\n    /// Model Number String\n    [DISC_MODEL_NB_STR_CHAR] = {ATT_CHAR_MODEL_NB, ATT_OPTIONAL,\n                                ATT_CHAR_PROP_RD},\n    /// Serial Number String\n    [DISC_SERIAL_NB_STR_CHAR] = {ATT_CHAR_SERIAL_NB, ATT_OPTIONAL,\n                                 ATT_CHAR_PROP_RD},\n    /// Hardware Revision String\n    [DISC_HARD_REV_STR_CHAR] = {ATT_CHAR_HW_REV, ATT_OPTIONAL,\n                                ATT_CHAR_PROP_RD},\n    /// Firmware Revision String\n    [DISC_FIRM_REV_STR_CHAR] = {ATT_CHAR_FW_REV, ATT_OPTIONAL,\n                                ATT_CHAR_PROP_RD},\n    /// TSoftware Revision String\n    [DISC_SW_REV_STR_CHAR] = {ATT_CHAR_SW_REV, ATT_OPTIONAL, ATT_CHAR_PROP_RD},\n    /// System ID\n    [DISC_SYSTEM_ID_CHAR] = {ATT_CHAR_SYS_ID, ATT_OPTIONAL, ATT_CHAR_PROP_RD},\n    /// IEEE\n    [DISC_IEEE_CHAR] = {ATT_CHAR_IEEE_CERTIF, ATT_OPTIONAL, ATT_CHAR_PROP_RD},\n    /// PnP ID\n    [DISC_PNP_ID_CHAR] = {ATT_CHAR_PNP_ID, ATT_OPTIONAL, ATT_CHAR_PROP_RD},\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref DISC_ENABLE_REQ message.\n * The handler enables the Device Information Service Client Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int disc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct disc_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Device Information Service Client Role Task Environment\n  struct disc_env_tag *disc_env = PRF_ENV_GET(DISC, disc);\n\n  ASSERT_INFO(disc_env != NULL, dest_id, src_id);\n  if ((state == DISC_IDLE) && (disc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    disc_env->env[conidx] = (struct disc_cnx_env *)ke_malloc(\n        sizeof(struct disc_cnx_env), KE_MEM_ATT_DB);\n    memset(disc_env->env[conidx], 0, sizeof(struct disc_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering HTS on peer\n      prf_disc_svc_send(&(disc_env->prf_env), conidx, ATT_SVC_DEVICE_INFO);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, DISC_DISCOVERING);\n    }\n    // normal connection, get saved att details\n    else {\n      disc_env->env[conidx]->dis = param->dis;\n\n      // send APP confirmation that can start normal connection to TH\n      disc_enable_rsp_send(disc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  } else if (state != DISC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    disc_enable_rsp_send(disc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == DISC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct disc_env_tag *disc_env = PRF_ENV_GET(DISC, disc);\n\n    ASSERT_INFO(disc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(disc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (disc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve DIS characteristics\n      prf_extract_svc_info(ind, DISC_CHAR_MAX, &disc_dis_char[0],\n                           &(disc_env->env[conidx]->dis.chars[0]), 0, NULL,\n                           NULL);\n\n      // Even if we get multiple responses we only store 1 range\n      disc_env->env[conidx]->dis.svc.shdl = ind->start_hdl;\n      disc_env->env[conidx]->dis.svc.ehdl = ind->end_hdl;\n    }\n\n    disc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  // Get the address of the environment\n  struct disc_env_tag *disc_env = PRF_ENV_GET(DISC, disc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (state == DISC_DISCOVERING) {\n    uint8_t status = param->status;\n\n    if (param->status == ATT_ERR_NO_ERROR) {\n      if (disc_env->env[conidx]->nb_svc == 1) {\n        status = prf_check_svc_char_validity(\n            DISC_CHAR_MAX, disc_env->env[conidx]->dis.chars, disc_dis_char);\n      }\n      // too much services\n      else if (disc_env->env[conidx]->nb_svc > 1) {\n        status = PRF_ERR_MULTIPLE_SVC;\n      }\n      // no services found\n      else {\n        status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n      }\n    }\n\n    disc_enable_rsp_send(disc_env, conidx, status);\n  } else if (state == DISC_BUSY) {\n    // an error occurs while performing read request\n    if ((param->operation == GATTC_READ) &&\n        (param->status != GAP_ERR_NO_ERROR)) {\n      prf_client_att_info_rsp(&(disc_env->prf_env), conidx, DISC_RD_CHAR_RSP,\n                              param->status, NULL);\n    }\n\n    ke_state_set(dest_id, DISC_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HTPC_RD_DATETIME_REQ message.\n * Check if the handle exists in profile(already discovered) and send request,\n *otherwise error to APP.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int disc_rd_char_req_handler(ke_msg_id_t const msgid,\n                                      struct disc_rd_char_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Device Information Service Client Role Task Environment\n  struct disc_env_tag *disc_env = PRF_ENV_GET(DISC, disc);\n\n  ASSERT_INFO(disc_env != NULL, dest_id, src_id);\n  if ((state == DISC_IDLE) && (disc_env->env[conidx] != NULL)) {\n    uint16_t search_hdl = ATT_INVALID_HDL;\n\n    // retrieve search handle\n    if (param->char_code < DISC_CHAR_MAX) {\n      search_hdl = disc_env->env[conidx]->dis.chars[param->char_code].val_hdl;\n    }\n\n    // Check if handle is viable\n    if (search_hdl != ATT_INVALID_HDL) {\n      // perform read request\n      disc_env->env[conidx]->last_char_code = param->char_code;\n      prf_read_char_send(&(disc_env->prf_env), conidx,\n                         disc_env->env[conidx]->dis.svc.shdl,\n                         disc_env->env[conidx]->dis.svc.ehdl, search_hdl);\n\n      // enter in a busy state\n      ke_state_set(dest_id, DISC_BUSY);\n    } else {\n      // invalid handle requested\n      status = PRF_ERR_INEXISTENT_HDL;\n    }\n  } else if (state != DISC_FREE) {\n    // request cannot be performed\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send error response if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    prf_client_att_info_rsp(&(disc_env->prf_env), conidx, DISC_RD_CHAR_RSP,\n                            status, NULL);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == DISC_BUSY) {\n    // Get the address of the environment\n    struct disc_env_tag *disc_env = PRF_ENV_GET(DISC, disc);\n\n    ASSERT_INFO(disc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(disc_env->env[KE_IDX_GET(dest_id)] != NULL, dest_id, src_id);\n    prf_client_att_info_rsp(&(disc_env->prf_env), KE_IDX_GET(dest_id),\n                            DISC_RD_CHAR_RSP, GAP_ERR_NO_ERROR, param);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(disc){\n    {DISC_RD_CHAR_REQ, (ke_msg_func_t)disc_rd_char_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {DISC_ENABLE_REQ, (ke_msg_func_t)disc_enable_req_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid disc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct disc_env_tag *disc_env = PRF_ENV_GET(DISC, disc);\n\n  task_desc->msg_handler_tab = disc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(disc_msg_handler_tab);\n  task_desc->state = disc_env->state;\n  task_desc->idx_max = DISC_IDX_MAX;\n}\n\n#endif // BLE_DIS_CLIENT\n\n/// @} DISCTASK\n"
  },
  {
    "path": "services/ble_profiles/dis/diss/api/diss_task.h",
    "content": "#ifndef DISS_TASK_H_\n#define DISS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup DISSTASK Task\n * @ingroup DISS\n * @brief Device Information Service Server Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n\n/// Messages for Device Information Service Server\nenum\n{\n    ///Set the value of an attribute - Request\n    DISS_SET_VALUE_REQ = TASK_FIRST_MSG(TASK_ID_DISS),\n    ///Set the value of an attribute - Response\n    DISS_SET_VALUE_RSP,\n    \n    /// Peer device request to get profile attribute value\n    DISS_VALUE_REQ_IND,\n    /// Peer device confirm value of requested attribute\n    DISS_VALUE_CFM,\n};\n\n///Attribute Table Indexes\nenum diss_info\n{\n    /// Manufacturer Name\n    DIS_MANUFACTURER_NAME_CHAR,\n    /// Model Number\n    DIS_MODEL_NB_STR_CHAR,\n    /// Serial Number\n    DIS_SERIAL_NB_STR_CHAR,\n    /// HW Revision Number\n    DIS_HARD_REV_STR_CHAR,\n    /// FW Revision Number\n    DIS_FIRM_REV_STR_CHAR,\n    /// SW Revision Number\n    DIS_SW_REV_STR_CHAR,\n    /// System Identifier Name\n    DIS_SYSTEM_ID_CHAR,\n    /// IEEE Certificate\n    DIS_IEEE_CHAR,\n    /// Plug and Play Identifier\n    DIS_PNP_ID_CHAR,\n\n    DIS_CHAR_MAX,\n};\n\n///Database Configuration Flags\nenum diss_features\n{\n    ///Indicate if Manufacturer Name String Char. is supported\n    DIS_MANUFACTURER_NAME_CHAR_SUP       = 0x0001,\n    ///Indicate if Model Number String Char. is supported\n    DIS_MODEL_NB_STR_CHAR_SUP            = 0x0002,\n    ///Indicate if Serial Number String Char. is supported\n    DIS_SERIAL_NB_STR_CHAR_SUP           = 0x0004,\n    ///Indicate if Hardware Revision String Char. supports indications\n    DIS_HARD_REV_STR_CHAR_SUP            = 0x0008,\n    ///Indicate if Firmware Revision String Char. is writable\n    DIS_FIRM_REV_STR_CHAR_SUP            = 0x0010,\n    ///Indicate if Software Revision String Char. is writable\n    DIS_SW_REV_STR_CHAR_SUP              = 0x0020,\n    ///Indicate if System ID Char. is writable\n    DIS_SYSTEM_ID_CHAR_SUP               = 0x0040,\n    ///Indicate if IEEE Char. is writable\n    DIS_IEEE_CHAR_SUP                    = 0x0080,\n    ///Indicate if PnP ID Char. is writable\n    DIS_PNP_ID_CHAR_SUP                  = 0x0100,\n\n    ///All features are supported\n    DIS_ALL_FEAT_SUP                     = 0x01FF,\n};\n/*\n * API MESSAGES STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters for the database creation\nstruct diss_db_cfg\n{\n    /// Database configuration @see enum diss_features\n    uint16_t features;\n};\n\n\n///Set the value of an attribute - Request\nstruct diss_set_value_req\n{\n    /// Value to Set\n    uint8_t value;\n    /// Value length\n    uint8_t length;\n    /// Value data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n///Set the value of an attribute - Response\nstruct diss_set_value_rsp\n{\n    /// Value Set\n    uint8_t value;\n    /// status of the request\n    uint8_t status;\n};\n\n/// Peer device request to get profile attribute value\nstruct diss_value_req_ind\n{\n    /// Requested value\n    uint8_t value;\n};\n\n/// Peer device  value of requested attribute\nstruct diss_value_cfm\n{\n    /// Requested value\n    uint8_t value;\n    /// Value length\n    uint8_t length;\n    /// Value data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n/// @} DISSTASK\n#endif // DISS_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/dis/diss/src/diss.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup DISS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_DIS_SERVER)\n#include \"attm.h\"\n#include \"diss.h\"\n#include \"diss_task.h\"\n#include \"prf.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/// Maximal length for Characteristic values - 128 bytes\n#define DIS_VAL_MAX_LEN (128)\n/// System ID string length\n#define DIS_SYS_ID_LEN (0x08)\n/// IEEE Certif length (min 6 bytes)\n#define DIS_IEEE_CERTIF_MIN_LEN (0x06)\n/// PnP ID length\n#define DIS_PNP_ID_LEN (0x07)\n\n/*\n * DIS ATTRIBUTES\n ****************************************************************************************\n */\n\n/// Full DIS Database Description - Used to add attributes into the database\nconst struct attm_desc diss_att_db[DIS_IDX_NB] = {\n    // Device Information Service Declaration\n    [DIS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Manufacturer Name Characteristic Declaration\n    [DIS_IDX_MANUFACTURER_NAME_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                        PERM(RD, ENABLE), 0, 0},\n    // Manufacturer Name Characteristic Value\n    [DIS_IDX_MANUFACTURER_NAME_VAL] = {ATT_CHAR_MANUF_NAME, PERM(RD, ENABLE),\n                                       PERM(RI, ENABLE), DIS_VAL_MAX_LEN},\n\n    // Model Number String Characteristic Declaration\n    [DIS_IDX_MODEL_NB_STR_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                   0},\n    // Model Number String Characteristic Value\n    [DIS_IDX_MODEL_NB_STR_VAL] = {ATT_CHAR_MODEL_NB, PERM(RD, ENABLE),\n                                  PERM(RI, ENABLE), DIS_VAL_MAX_LEN},\n\n    // Serial Number String Characteristic Declaration\n    [DIS_IDX_SERIAL_NB_STR_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                    0, 0},\n    // Serial Number String Characteristic Value\n    [DIS_IDX_SERIAL_NB_STR_VAL] = {ATT_CHAR_SERIAL_NB, PERM(RD, ENABLE),\n                                   PERM(RI, ENABLE), DIS_VAL_MAX_LEN},\n\n    // Hardware Revision String Characteristic Declaration\n    [DIS_IDX_HARD_REV_STR_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                   0},\n    // Hardware Revision String Characteristic Value\n    [DIS_IDX_HARD_REV_STR_VAL] = {ATT_CHAR_HW_REV, PERM(RD, ENABLE),\n                                  PERM(RI, ENABLE), DIS_VAL_MAX_LEN},\n\n    // Firmware Revision String Characteristic Declaration\n    [DIS_IDX_FIRM_REV_STR_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                   0},\n    // Firmware Revision String Characteristic Value\n    [DIS_IDX_FIRM_REV_STR_VAL] = {ATT_CHAR_FW_REV, PERM(RD, ENABLE),\n                                  PERM(RI, ENABLE), DIS_VAL_MAX_LEN},\n\n    // Software Revision String Characteristic Declaration\n    [DIS_IDX_SW_REV_STR_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                 0},\n    // Software Revision String Characteristic Value\n    [DIS_IDX_SW_REV_STR_VAL] = {ATT_CHAR_SW_REV, PERM(RD, ENABLE),\n                                PERM(RI, ENABLE), DIS_VAL_MAX_LEN},\n\n    // System ID Characteristic Declaration\n    [DIS_IDX_SYSTEM_ID_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // System ID Characteristic Value\n    [DIS_IDX_SYSTEM_ID_VAL] = {ATT_CHAR_SYS_ID, PERM(RD, ENABLE),\n                               PERM(RI, ENABLE), DIS_SYS_ID_LEN},\n\n    // IEEE 11073-20601 Regulatory Certification Data List Characteristic\n    // Declaration\n    [DIS_IDX_IEEE_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // IEEE 11073-20601 Regulatory Certification Data List Characteristic Value\n    [DIS_IDX_IEEE_VAL] = {ATT_CHAR_IEEE_CERTIF, PERM(RD, ENABLE),\n                          PERM(RI, ENABLE), DIS_SYS_ID_LEN},\n\n    // PnP ID Characteristic Declaration\n    [DIS_IDX_PNP_ID_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // PnP ID Characteristic Value\n    [DIS_IDX_PNP_ID_VAL] = {ATT_CHAR_PNP_ID, PERM(RD, ENABLE), PERM(RI, ENABLE),\n                            DIS_PNP_ID_LEN},\n};\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the DISS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t diss_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct diss_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n\n  // Service content flag\n  uint32_t cfg_flag;\n  // DB Creation Statis\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  // Compute Attribute Table and save it in environment\n  cfg_flag = diss_compute_cfg_flag(params->features);\n\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_DEVICE_INFO, (uint8_t *)&cfg_flag, DIS_IDX_NB, NULL,\n      env->task, &diss_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    struct diss_env_tag *diss_env = (struct diss_env_tag *)ke_malloc(\n        sizeof(struct diss_env_tag), KE_MEM_ATT_DB);\n\n    // allocate DISS required environment variable\n    env->env = (prf_env_t *)diss_env;\n    diss_env->start_hdl = *start_hdl;\n    diss_env->features = params->features;\n    diss_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    diss_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_DISS;\n    diss_task_init(&(env->desc));\n    co_list_init(&(diss_env->values));\n\n    // service is ready, go into an Idle state\n    ke_state_set(env->task, DISS_IDLE);\n  }\n\n  return (status);\n}\n/**\n ****************************************************************************************\n * @brief Destruction of the DISS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void diss_destroy(struct prf_task_env *env) {\n  struct diss_env_tag *diss_env = (struct diss_env_tag *)env->env;\n\n  // remove all values present in list\n  while (!co_list_is_empty(&(diss_env->values))) {\n    struct co_list_hdr *hdr = co_list_pop_front(&(diss_env->values));\n    ke_free(hdr);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(diss_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void diss_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Nothing to do */\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void diss_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  /* Nothing to do */\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// DISS Task interface required by profile manager\nconst struct prf_task_cbs diss_itf = {\n    (prf_init_fnct)diss_init,\n    diss_destroy,\n    diss_create,\n    diss_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *diss_prf_itf_get(void) { return &diss_itf; }\n\nuint32_t diss_compute_cfg_flag(uint16_t features) {\n  // Service Declaration\n  uint32_t cfg_flag = 1;\n\n  for (uint8_t i = 0; i < DIS_CHAR_MAX; i++) {\n    if (((features >> i) & 1) == 1) {\n      cfg_flag |= (3 << (i * 2 + 1));\n    }\n  }\n\n  return cfg_flag;\n}\n\nuint8_t diss_handle_to_value(struct diss_env_tag *env, uint16_t handle) {\n  uint8_t value = DIS_CHAR_MAX;\n\n  // handle cursor, start from first characteristic of service handle\n  uint16_t cur_hdl = env->start_hdl + 1;\n\n  for (uint8_t i = 0; i < DIS_CHAR_MAX; i++) {\n    if (((env->features >> i) & 1) == 1) {\n      // check if value handle correspond to requested handle\n      if ((cur_hdl + 1) == handle) {\n        value = i;\n        break;\n      }\n      cur_hdl += 2;\n    }\n  }\n\n  return value;\n}\n\nuint16_t diss_value_to_handle(struct diss_env_tag *env, uint8_t value) {\n  uint16_t handle = env->start_hdl + 1;\n  int8_t i;\n\n  for (i = 0; i < DIS_CHAR_MAX; i++) {\n    if (((env->features >> i) & 1) == 1) {\n      // requested value\n      if (value == i) {\n        handle += 1;\n        break;\n      }\n      handle += 2;\n    }\n  }\n\n  // check if handle found\n  return ((i == DIS_CHAR_MAX) ? ATT_INVALID_HDL : handle);\n}\n\nuint8_t diss_check_val_len(uint8_t char_code, uint8_t val_len) {\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  // Check if length is upper than the general maximal length\n  if (val_len > DIS_VAL_MAX_LEN) {\n    status = PRF_ERR_UNEXPECTED_LEN;\n  } else {\n    // Check if length matches particular requirements\n    switch (char_code) {\n    case DIS_SYSTEM_ID_CHAR:\n      if (val_len != DIS_SYS_ID_LEN) {\n        status = PRF_ERR_UNEXPECTED_LEN;\n      }\n      break;\n    case DIS_IEEE_CHAR:\n      if (val_len < DIS_IEEE_CERTIF_MIN_LEN) {\n        status = PRF_ERR_UNEXPECTED_LEN;\n      }\n      break;\n    case DIS_PNP_ID_CHAR:\n      if (val_len != DIS_PNP_ID_LEN) {\n        status = PRF_ERR_UNEXPECTED_LEN;\n      }\n      break;\n    default:\n      break;\n    }\n  }\n\n  return (status);\n}\n\n#endif // BLE_DIS_SERVER\n\n/// @} DISS\n"
  },
  {
    "path": "services/ble_profiles/dis/diss/src/diss.h",
    "content": "#ifndef DISS_H_\n#define DISS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup DISS Device Information Service Server\n * @ingroup DIS\n * @brief Device Information Service Server\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_DIS_SERVER)\n#include \"prf_types.h\"\n#include \"prf.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n#define DISS_IDX_MAX        (1)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the DISS task\nenum\n{\n    /// Idle state\n    DISS_IDLE,\n    /// Busy state\n    DISS_BUSY,\n    /// Number of defined states.\n    DISS_STATE_MAX\n};\n\n/// DISS Attributes database handle list\nenum diss_att_db_handles\n{\n    DIS_IDX_SVC,\n\n    DIS_IDX_MANUFACTURER_NAME_CHAR,\n    DIS_IDX_MANUFACTURER_NAME_VAL,\n\n    DIS_IDX_MODEL_NB_STR_CHAR,\n    DIS_IDX_MODEL_NB_STR_VAL,\n\n    DIS_IDX_SERIAL_NB_STR_CHAR,\n    DIS_IDX_SERIAL_NB_STR_VAL,\n\n    DIS_IDX_HARD_REV_STR_CHAR,\n    DIS_IDX_HARD_REV_STR_VAL,\n\n    DIS_IDX_FIRM_REV_STR_CHAR,\n    DIS_IDX_FIRM_REV_STR_VAL,\n\n    DIS_IDX_SW_REV_STR_CHAR,\n    DIS_IDX_SW_REV_STR_VAL,\n\n    DIS_IDX_SYSTEM_ID_CHAR,\n    DIS_IDX_SYSTEM_ID_VAL,\n\n    DIS_IDX_IEEE_CHAR,\n    DIS_IDX_IEEE_VAL,\n\n    DIS_IDX_PNP_ID_CHAR,\n    DIS_IDX_PNP_ID_VAL,\n\n    DIS_IDX_NB,\n};\n\n/// Value element\nstruct diss_val_elmt\n{\n    /// list element header\n    struct co_list_hdr hdr;\n    /// value identifier\n    uint8_t value;\n    /// value length\n    uint8_t length;\n    /// value data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n///Device Information Service Server Environment Variable\nstruct diss_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// List of values set by application\n    struct co_list values;\n    /// Service Attribute Start Handle\n    uint16_t start_hdl;\n    /// Services features\n    uint16_t features;\n    /// Last requested value\n    uint8_t  req_val;\n    /// Last connection index which request value\n    uint8_t  req_conidx;\n\n    /// DISS task state\n    ke_state_t state[DISS_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve DIS service profile interface\n *\n * @return DIS service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* diss_prf_itf_get(void);\n\n\n/**\n ****************************************************************************************\n * @brief Check if an attribute shall be added or not in the database\n *\n * @param features DIS features\n *\n * @return Feature config flag\n ****************************************************************************************\n */\nuint32_t diss_compute_cfg_flag(uint16_t features);\n\n/**\n ****************************************************************************************\n * @brief Check if the provided value length matches characteristic requirements\n * @param char_code Characteristic Code\n * @param val_len   Length of the Characteristic value\n *\n * @return status if value length is ok or not\n ****************************************************************************************\n */\nuint8_t diss_check_val_len(uint8_t char_code, uint8_t val_len);\n\n/**\n ****************************************************************************************\n * @brief Retrieve handle attribute from value\n *\n * @param[in] env   Service environment variable\n * @param[in] value Value to search\n *\n * @return Handle attribute from value\n ****************************************************************************************\n */\nuint16_t diss_value_to_handle(struct diss_env_tag* env, uint8_t value);\n\n/**\n ****************************************************************************************\n * @brief Retrieve value from attribute handle\n *\n * @param[in] env    Service environment variable\n * @param[in] handle Attribute handle to search\n *\n * @return  Value from attribute handle\n ****************************************************************************************\n */\nuint8_t diss_handle_to_value(struct diss_env_tag* env, uint16_t handle);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid diss_task_init(struct ke_task_desc *task_desc);\n\n#endif //BLE_DIS_SERVER\n\n/// @} DISS\n\n#endif // DISS_H_\n"
  },
  {
    "path": "services/ble_profiles/dis/diss/src/diss_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup DISSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_DIS_SERVER)\n#include \"co_utils.h\"\n#include \"diss.h\"\n#include \"diss_task.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref DISS_SET_VALUE_REQ message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int diss_set_value_req_handler(ke_msg_id_t const msgid,\n                                        struct diss_set_value_req const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Request status\n  uint8_t status;\n  // Characteristic Declaration attribute handle\n  uint16_t handle;\n\n  struct diss_env_tag *diss_env = PRF_ENV_GET(DISS, diss);\n  struct diss_set_value_rsp *rsp;\n  // Check Characteristic Code\n  if (param->value < DIS_CHAR_MAX) {\n    // Get Characteristic Declaration attribute handle\n    handle = diss_value_to_handle(diss_env, param->value);\n\n    // Check if the Characteristic exists in the database\n    if (handle != ATT_INVALID_HDL) {\n      // Check the value length\n      status = diss_check_val_len(param->value, param->length);\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Check value in already present in service\n        struct diss_val_elmt *val =\n            (struct diss_val_elmt *)co_list_pick(&(diss_env->values));\n        // loop until value found\n        while (val != NULL) {\n          // if value already present, remove old one\n          if (val->value == param->value) {\n            co_list_extract(&(diss_env->values), &(val->hdr));\n            ke_free(val);\n            break;\n          }\n          val = (struct diss_val_elmt *)val->hdr.next;\n        }\n\n        // allocate value data\n        val = (struct diss_val_elmt *)ke_malloc(\n            sizeof(struct diss_val_elmt) + param->length, KE_MEM_ATT_DB);\n        val->value = param->value;\n        val->length = param->length;\n        memcpy(val->data, param->data, param->length);\n        // insert value into the list\n        co_list_push_back(&(diss_env->values), &(val->hdr));\n      }\n    } else {\n      status = PRF_ERR_INEXISTENT_HDL;\n    }\n  } else {\n    status = PRF_ERR_INVALID_PARAM;\n  }\n\n  // send response to application\n  rsp = KE_MSG_ALLOC(DISS_SET_VALUE_RSP, src_id, dest_id, diss_set_value_rsp);\n  rsp->value = param->value;\n  rsp->status = status;\n  ke_msg_send(rsp);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  ke_state_t state = ke_state_get(dest_id);\n\n  if (state == DISS_IDLE) {\n    struct diss_env_tag *diss_env = PRF_ENV_GET(DISS, diss);\n    // retrieve value attribute\n    uint8_t value = diss_handle_to_value(diss_env, param->handle);\n\n    // Check Characteristic Code\n    if (value < DIS_CHAR_MAX) {\n      // Check value in already present in service\n      struct diss_val_elmt *val =\n          (struct diss_val_elmt *)co_list_pick(&(diss_env->values));\n      // loop until value found\n      while (val != NULL) {\n        // value is present in service\n        if (val->value == value) {\n          break;\n        }\n        val = (struct diss_val_elmt *)val->hdr.next;\n      }\n\n      if (val != NULL) {\n        // Send value to peer device.\n        struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n            GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, val->length);\n        cfm->handle = param->handle;\n        cfm->status = ATT_ERR_NO_ERROR;\n        cfm->length = val->length;\n        memcpy(cfm->value, val->data, val->length);\n        ke_msg_send(cfm);\n      } else {\n        // request value to application\n        diss_env->req_val = value;\n        diss_env->req_conidx = KE_IDX_GET(src_id);\n\n        struct diss_value_req_ind *req_ind = KE_MSG_ALLOC(\n            DISS_VALUE_REQ_IND,\n            prf_dst_task_get(&(diss_env->prf_env), KE_IDX_GET(src_id)), dest_id,\n            diss_value_req_ind);\n        req_ind->value = value;\n        ke_msg_send(req_ind);\n\n        // Put Service in a busy state\n        ke_state_set(dest_id, DISS_BUSY);\n      }\n    } else {\n      // application error, value cannot be retrieved\n      struct gattc_read_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm);\n      cfm->handle = param->handle;\n      cfm->status = ATT_ERR_APP_ERROR;\n      ke_msg_send(cfm);\n    }\n  }\n  // postpone request if profile is in a busy state - required for multipoint\n  else if (state == DISS_BUSY) {\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the value confirmation from application\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int diss_value_cfm_handler(ke_msg_id_t const msgid,\n                                    struct diss_value_cfm const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  ke_state_t state = ke_state_get(dest_id);\n\n  if (state == DISS_BUSY) {\n    struct diss_env_tag *diss_env = PRF_ENV_GET(DISS, diss);\n    // retrieve value attribute\n    uint16_t handle = diss_value_to_handle(diss_env, diss_env->req_val);\n\n    // chack if application provide correct value\n    if (diss_env->req_val == param->value) {\n      // Send value to peer device.\n      struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n          GATTC_READ_CFM, KE_BUILD_ID(TASK_GATTC, diss_env->req_conidx),\n          dest_id, gattc_read_cfm, param->length);\n      cfm->handle = handle;\n      cfm->status = ATT_ERR_NO_ERROR;\n      cfm->length = param->length;\n      memcpy(cfm->value, param->data, param->length);\n      ke_msg_send(cfm);\n    } else {\n      // application error, value provided by application is not the expected\n      // one\n      struct gattc_read_cfm *cfm = KE_MSG_ALLOC(\n          GATTC_READ_CFM, KE_BUILD_ID(TASK_GATTC, diss_env->req_conidx),\n          dest_id, gattc_read_cfm);\n      cfm->handle = handle;\n      cfm->status = ATT_ERR_APP_ERROR;\n      ke_msg_send(cfm);\n    }\n\n    // return to idle state\n    ke_state_set(dest_id, DISS_IDLE);\n  }\n  // else ignore request if not in busy state\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(diss){\n    {DISS_SET_VALUE_REQ, (ke_msg_func_t)diss_set_value_req_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {DISS_VALUE_CFM, (ke_msg_func_t)diss_value_cfm_handler},\n};\n\nvoid diss_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct diss_env_tag *diss_env = PRF_ENV_GET(DISS, diss);\n\n  task_desc->msg_handler_tab = diss_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(diss_msg_handler_tab);\n  task_desc->state = diss_env->state;\n  task_desc->idx_max = DISS_IDX_MAX;\n}\n\n#endif // BLE_DIS_SERVER\n\n/// @} DISSTASK\n"
  },
  {
    "path": "services/ble_profiles/find/find_common.h",
    "content": "#ifndef _FIND_COMMON_H_\n#define _FIND_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup FIND Find Profile\n * @ingroup PROFILE\n * @brief Find Profile\n *\n * The FIND module is the responsible block for implementing the Find Profile\n * functionalities in the BLE Host.\n *\n * The Find Profile defines the functionality required in a device that allows\n * the user (Collector device) to configure and recover Find measurements from\n * a Find device.\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"prf_types.h\"\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Find measurement packet max length\n#define FIND_MEAS_MAX_LEN                (17)\n/// Find measurement context packet max length\n#define FIND_MEAS_CTX_MAX_LEN            (17)\n/// Record Access Control Point packet max length\n#define FIND_REC_ACCESS_CTRL_MAX_LEN     (21)\n\n\n/// Find Service Error Code\nenum find_error_code\n{\n    /// RACP Procedure already in progress\n    FIND_ERR_PROC_ALREADY_IN_PROGRESS  = (0x80),\n    /// Client Characteristic Configuration Descriptor Improperly Configured\n    FIND_ERR_IMPROPER_CLI_CHAR_CFG     = (0x81),\n};\n\n/// Record access control point operation filter\nstruct find_filter\n{\n    /// function operator\n    uint8_t operator;\n\n    /// filter type\n    uint8_t filter_type;\n\n    /// filter union\n    union\n    {\n        /// Sequence number filtering (filter_type = FIND_FILTER_SEQ_NUMBER)\n        struct\n        {\n            /// Min sequence number\n            uint16_t min;\n            /// Max sequence number\n            uint16_t max;\n        }seq_num;\n\n        /// User facing time filtering (filter_type = FIND_FILTER_USER_FACING_TIME)\n        struct\n        {\n            /// Min base time\n            struct prf_date_time facetime_min;\n\n            /// Max base time\n            struct prf_date_time facetime_max;\n        } time;\n    } val;\n};\n\n/// Record access control point request\nstruct find_racp_req\n{\n    /// operation code\n    uint8_t op_code;\n\n    /// operation filter\n    struct find_filter filter;\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n\n/// @} find_common\n\n#endif /* _FIND_COMMON_H_ */\n"
  },
  {
    "path": "services/ble_profiles/find/findl/api/findl_task.h",
    "content": "#ifndef FINDL_TASK_H_\n#define FINDL_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup FINDLTASK Find Me Locator Task\n * @ingroup FINDL\n * @brief Find Me Locator Task\n *\n * The FINDLTASK is responsible for handling the API messages coming from the application\n * or internal tasks.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n#include \"find_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n///Find Me Locator API messages\nenum findl_msg_id\n{\n    /// Start the find me locator profile - at connection\n    FINDL_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_FINDL),\n    /// Enable confirm message, containing IAS attribute details if discovery connection type\n    FINDL_ENABLE_RSP,\n\n    /// Alert level set request\n    FINDL_SET_ALERT_REQ,\n    /// Alert level set response\n    FINDL_SET_ALERT_RSP,\n};\n\n/// Alert levels\nenum\n{\n    /// No alert\n    FINDL_ALERT_NONE    = 0x00,\n    /// Mild alert\n    FINDL_ALERT_MILD,\n    /// High alert\n    FINDL_ALERT_HIGH\n};\n\n\n/// Immediate Alert service details container\nstruct ias_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    /// - Alert Level\n    struct prf_char_inf alert_lvl_char;\n};\n\n/// Parameters of the @ref FINDL_ENABLE_REQ message\nstruct findl_enable_req\n{\n    ///Connection type\n    uint8_t con_type;\n    ///Discovered IAS details if any\n    struct ias_content ias;\n};\n\n/// Parameters of the @ref FINDL_ENABLE_RSP message\nstruct findl_enable_rsp\n{\n    ///Status\n    uint8_t status;\n    ///Discovered IAS details if any\n    struct ias_content ias;\n};\n\n/// Parameters of the @ref FINDL_SET_ALERT_REQ message\nstruct findl_set_alert_req\n{\n    /// Alert level\n    uint8_t  alert_lvl;\n};\n\n///Parameters of the @ref FINDL_SET_ALERT_RSP message\nstruct findl_set_alert_rsp\n{\n    /// Status\n    uint8_t  status;\n};\n\n/// @} FINDLTASK\n\n#endif // FINDL_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/find/findl/src/findl.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup FINDL\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_FINDME_LOCATOR)\n#include \"findl.h\"\n#include \"findl_task.h\"\n#include \"gap.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialization of the FINDL module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t findl_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct findl_env_tag *findl_env = (struct findl_env_tag *)ke_malloc(\n      sizeof(struct findl_env_tag), KE_MEM_ATT_DB);\n\n  // allocate FINDL required environment variable\n  env->env = (prf_env_t *)findl_env;\n\n  findl_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  findl_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_FINDL;\n  findl_task_init(&(env->desc));\n\n  for (idx = 0; idx < FINDL_IDX_MAX; idx++) {\n    findl_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), FINDL_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the FINDL module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void findl_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct findl_env_tag *findl_env = (struct findl_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < FINDL_IDX_MAX; idx++) {\n    if (findl_env->env[idx] != NULL) {\n      ke_free(findl_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(findl_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void findl_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put FINDL in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), FINDL_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void findl_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct findl_env_tag *findl_env = (struct findl_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (findl_env->env[conidx] != NULL) {\n    ke_free(findl_env->env[conidx]);\n    findl_env->env[conidx] = NULL;\n  }\n\n  /* Put FINDL in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), FINDL_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// FINDL Task interface required by profile manager\nconst struct prf_task_cbs findl_itf = {\n    (prf_init_fnct)findl_init,\n    findl_destroy,\n    findl_create,\n    findl_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *findl_prf_itf_get(void) { return &findl_itf; }\n\nvoid findl_enable_rsp_send(struct findl_env_tag *findl_env, uint8_t conidx,\n                           uint8_t status) {\n  // send response to app\n  struct findl_enable_rsp *cfm = KE_MSG_ALLOC(\n      FINDL_ENABLE_RSP, prf_dst_task_get(&(findl_env->prf_env), conidx),\n      prf_src_task_get(&(findl_env->prf_env), conidx), findl_enable_rsp);\n\n  cfm->ias = findl_env->env[conidx]->ias;\n  cfm->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // Go to idle state\n    ke_state_set(prf_src_task_get(&(findl_env->prf_env), conidx), FINDL_IDLE);\n  } else {\n    // clean-up environment variable allocated for task instance\n    ke_free(findl_env->env[conidx]);\n    findl_env->env[conidx] = NULL;\n  }\n\n  ke_msg_send(cfm);\n}\n\n#endif // BLE_FINDME_LOCATOR\n\n/// @} FINDL\n"
  },
  {
    "path": "services/ble_profiles/find/findl/src/findl.h",
    "content": "#ifndef FINDL_H_\n#define FINDL_H_\n\n/**\n ****************************************************************************************\n * @addtogroup FIND Find Me Profile\n * @ingroup PROFILE\n * @brief Find Me Profile\n *\n * The FIND module is the responsible block for implementing the Find Me profile\n * functionalities in the BLE Host.\n *\n * The Find Me Profile defines the functionality required in a device that allows the user\n * to find a peer device by setting its alarm level.\n *****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @addtogroup FINDL Find Me Locator\n * @ingroup FIND\n * @brief Find Me Profile Locator\n *\n * The FINDL is responsible for providing Find Me profile Locator functionalities to\n * upper layer module or application. The device using this profile takes the role\n * of find me locator.\n *\n * Find Me Locator (LOC): A LOC (e.g. PC, phone, etc)\n * is the term used by this profile to describe a device that can set an alarm level value\n * in the peer Find Me target Device (TG), causing the TG to start a sound or flashing light\n * or other type of signal allowing it to be located.\n *\n * The interface of this role to the Application is:\n *  - Enable the profile role (from APP)\n *  - Disable the profile role (from APP)\n *  - Discover Immediate Alert Service range(from APP) and Send result (to APP)\n *  - Discover Alert Level Characteristic in the IAS range(from APP) and Send Result (to APP)\n *  - Set alert level in Target (from APP)\n *  - Error indications (to APP)\n *\n *  The application should remember the discovered IAS range and Alert Level Char. handles\n *  for the next connection to a known peer (that may also advertise it supports Find Me Profile.)\n *  This allows the setting of the alert level to be faster.\n *\n *  The enable/disable of the profile and devices disconnection is handled in the application,\n *  depending on its User Input.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_FINDME_LOCATOR)\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"findl_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of Find me Locator task instances\n#define FINDL_IDX_MAX    (BLE_CONNECTION_MAX)\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Possible states of the FINDL task\nenum findl_state\n{\n    /// Not Connected State\n    FINDL_FREE,\n    /// Idle state\n    FINDL_IDLE,\n    /// Discovering state\n    FINDL_DISCOVERING,\n    /// Busy State\n    FINDL_BUSY,\n\n    /// Number of defined states.\n    FINDL_STATE_MAX\n};\nenum\n{\n    FINDL_ALERT_LVL_CHAR,\n\n    FINDL_IAS_CHAR_MAX,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Environment variable for each Connections\nstruct findl_cnx_env\n{\n    /// Found IAS details\n    struct ias_content ias;\n    /// Last char. code requested to read.\n    uint8_t  last_char_code;\n    /// counter used to check service uniqueness\n    uint8_t  nb_svc;\n};\n\n/// Find me Locator environment variable\nstruct findl_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct findl_cnx_env* env[FINDL_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[FINDL_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve IAS service profile interface\n *\n * @return IAS service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* findl_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Enable Confirm message to the application.\n * @param status  Status to send.\n ****************************************************************************************\n */\nvoid findl_enable_rsp_send(struct findl_env_tag *findl_env, uint8_t conidx, uint8_t status);\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid findl_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //BLE_FINDME_LOCATOR\n\n/// @} FINDL\n#endif // FINDL_H_\n"
  },
  {
    "path": "services/ble_profiles/find/findl/src/findl_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup FINDLTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_FINDME_LOCATOR)\n#include \"co_utils.h\"\n#include \"findl.h\"\n#include \"findl_task.h\"\n#include \"gap.h\"\n#include \"gapc.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n#include \n\n#include \"ke_mem.h\"\n\n/// table used to retrieve immediate alert service characteristics information\nconst struct prf_char_def findl_ias_char[FINDL_IAS_CHAR_MAX] = {\n    [FINDL_ALERT_LVL_CHAR] = {ATT_CHAR_ALERT_LEVEL, ATT_MANDATORY,\n                              ATT_CHAR_PROP_WR_NO_RESP},\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref FINDL_ENABLE_REQ message.\n * The handler enables the Find Me profile - Locator Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int findl_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct findl_enable_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Find me Locator Role Task Environment\n  struct findl_env_tag *findl_env = PRF_ENV_GET(FINDL, findl);\n\n  ASSERT_INFO(findl_env != NULL, dest_id, src_id);\n  if ((state == FINDL_IDLE) && (findl_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    findl_env->env[conidx] = (struct findl_cnx_env *)ke_malloc(\n        sizeof(struct findl_cnx_env), KE_MEM_ATT_DB);\n    memset(findl_env->env[conidx], 0, sizeof(struct findl_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering IAS on peer\n      prf_disc_svc_send(&(findl_env->prf_env), conidx, ATT_SVC_IMMEDIATE_ALERT);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, FINDL_DISCOVERING);\n    }\n    // normal connection, get saved att details\n    else {\n      findl_env->env[conidx]->ias = param->ias;\n\n      // send APP confirmation that can start normal connection to TH\n      findl_enable_rsp_send(findl_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  } else if (state != FINDL_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    findl_enable_rsp_send(findl_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == FINDL_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct findl_env_tag *findl_env = PRF_ENV_GET(FINDL, findl);\n\n    ASSERT_INFO(findl_env != NULL, dest_id, src_id);\n    ASSERT_INFO(findl_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (findl_env->env[conidx]->nb_svc == 0) {\n      // Retrieve IAS characteristic\n      prf_extract_svc_info(ind, FINDL_IAS_CHAR_MAX, &findl_ias_char[0],\n                           &(findl_env->env[conidx]->ias.alert_lvl_char), 0,\n                           NULL, NULL);\n\n      // Even if we get multiple responses we only store 1 range\n      findl_env->env[conidx]->ias.svc.shdl = ind->start_hdl;\n      findl_env->env[conidx]->ias.svc.ehdl = ind->end_hdl;\n    }\n\n    findl_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref FINDL_SET_ALERT_REQ message.\n * The handler disables the Find Me profile - Target Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int findl_set_alert_req_handler(\n    ke_msg_id_t const msgid, struct findl_set_alert_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get the address of the environment\n  struct findl_env_tag *findl_env = PRF_ENV_GET(FINDL, findl);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t state = ke_state_get(dest_id);\n  int msg_status = KE_MSG_CONSUMED;\n\n  if (state == FINDL_IDLE) {\n    // check if discovery performed\n    if (findl_env->env[conidx] == NULL) {\n      status = PRF_ERR_REQ_DISALLOWED;\n    }\n    // Check we're sending a correct value\n    else if ((param->alert_lvl == FINDL_ALERT_NONE) ||\n             (param->alert_lvl == FINDL_ALERT_MILD) ||\n             (param->alert_lvl == FINDL_ALERT_HIGH)) {\n      if (findl_env->env[conidx]->ias.alert_lvl_char.char_hdl != 0x0000) {\n        // Send GATT Write Request\n        prf_gatt_write(&findl_env->prf_env, conidx,\n                       findl_env->env[conidx]->ias.alert_lvl_char.val_hdl,\n                       (uint8_t *)¶m->alert_lvl, sizeof(uint8_t),\n                       GATTC_WRITE_NO_RESPONSE);\n        // wait for end of write request\n        ke_state_set(dest_id, FINDL_BUSY);\n      } else {\n        // cannot set alert level because have no char handle for it\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      // wrong level - not one of the possible 3\n      status = PRF_ERR_INVALID_PARAM;\n    }\n\n    struct findl_set_alert_rsp *rsp =\n        KE_MSG_ALLOC(FINDL_SET_ALERT_RSP, src_id, dest_id, findl_set_alert_rsp);\n    // set error status\n    rsp->status = status;\n\n    ke_msg_send(rsp);\n  } else if (state != FINDL_FREE) {\n    msg_status = KE_MSG_SAVED;\n    ;\n  }\n  // else nothing to do - ignore message\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  // Get the address of the environment\n  struct findl_env_tag *findl_env = PRF_ENV_GET(FINDL, findl);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (state == FINDL_DISCOVERING) {\n    uint8_t status = param->status;\n\n    if (param->status == ATT_ERR_NO_ERROR) {\n      if (findl_env->env[conidx]->nb_svc == 1) {\n        status = prf_check_svc_char_validity(\n            FINDL_IAS_CHAR_MAX, &(findl_env->env[conidx]->ias.alert_lvl_char),\n            findl_ias_char);\n      }\n      // too much services\n      else if (findl_env->env[conidx]->nb_svc > 1) {\n        status = PRF_ERR_MULTIPLE_SVC;\n      }\n      // no services found\n      else {\n        status = PRF_ERR_INVALID_PARAM;\n      }\n    }\n\n    findl_enable_rsp_send(findl_env, conidx, status);\n  } else if (state == FINDL_BUSY) {\n    ke_state_set(dest_id, FINDL_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(findl){\n    {FINDL_ENABLE_REQ, (ke_msg_func_t)findl_enable_req_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {FINDL_SET_ALERT_REQ, (ke_msg_func_t)findl_set_alert_req_handler},\n};\n\nvoid findl_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct findl_env_tag *findl_env = PRF_ENV_GET(FINDL, findl);\n\n  task_desc->msg_handler_tab = findl_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(findl_msg_handler_tab);\n  task_desc->state = findl_env->state;\n  task_desc->idx_max = FINDL_IDX_MAX;\n}\n\n#endif // BLE_FINDME_LOCATOR\n\n/// @} FINDLTASK\n"
  },
  {
    "path": "services/ble_profiles/find/findt/api/findt_task.h",
    "content": "#ifndef FINDT_TASK_H_\n#define FINDT_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup FINDTTASK Find Me Target Task\n * @ingroup FINDT\n * @brief Find Me Target Task\n *\n * The FINDTTASK is responsible for handling the APi messages from the application or\n * internal tasks.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n#include \"find_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/// Messages for Find Me Target\nenum findt_msg_id\n{\n    /// Alert indication\n    FINDT_ALERT_IND = TASK_FIRST_MSG(TASK_ID_FINDT),\n};\n\n\n/// Parameters of the @ref FINDT_ALERT_IND message\nstruct findt_alert_ind\n{\n    /// Alert level\n    uint8_t alert_lvl;\n    /// Connection index\n    uint8_t conidx;\n};\n\n\n/*\n * API MESSAGES STRUCTURES\n ****************************************************************************************\n */\n/// Parameters for the database creation\nstruct findt_db_cfg\n{\n    /// Database configuration\n    uint8_t dummy;\n};\n\n\n/// @} FINDTTASK\n#endif // FINDT_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/find/findt/src/findt.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup FINDT\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_FINDME_TARGET)\n#include \"findt.h\"\n#include \"findt_task.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * FINDT PROFILE ATTRIBUTES\n ****************************************************************************************\n */\n/// Full IAS Database Description - Used to add attributes into the database\nconst struct attm_desc findt_att_db[FINDT_IAS_IDX_NB] = {\n    // Immediate Alert Service Declaration\n    [FINDT_IAS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n    // Alert Level Characteristic Declaration\n    [FINDT_IAS_IDX_ALERT_LVL_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                      0, 0},\n    // Alert Level Characteristic Value\n    [FINDT_IAS_IDX_ALERT_LVL_VAL] = {ATT_CHAR_ALERT_LEVEL,\n                                     PERM(WRITE_COMMAND, ENABLE),\n                                     PERM(RI, ENABLE), sizeof(uint8_t)},\n};\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the FINDT module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t findt_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl,\n                          struct findt_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n\n  // Service content flag\n  uint32_t cfg_flag = FINDT_MANDATORY_MASK;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_IMMEDIATE_ALERT, (uint8_t *)&cfg_flag,\n      FINDT_IAS_IDX_NB, NULL, env->task, &findt_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    struct findt_env_tag *findt_env = (struct findt_env_tag *)ke_malloc(\n        sizeof(struct findt_env_tag), KE_MEM_ATT_DB);\n\n    // allocate FINDT required environment variable\n    env->env = (prf_env_t *)findt_env;\n    findt_env->shdl = *start_hdl;\n    findt_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    findt_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_FINDT;\n    findt_task_init(&(env->desc));\n\n    // service is ready, go into an Idle state\n    ke_state_set(env->task, FINDT_IDLE);\n  }\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the FINDT module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void findt_destroy(struct prf_task_env *env) {\n  struct findt_env_tag *findt_env = (struct findt_env_tag *)env->env;\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(findt_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void findt_create(struct prf_task_env *env, uint8_t conidx) {\n  /* nothing to do */\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void findt_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  /* nothing to do */\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// FINDT Task interface required by profile manager\nconst struct prf_task_cbs findt_itf = {\n    (prf_init_fnct)findt_init,\n    findt_destroy,\n    findt_create,\n    findt_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *findt_prf_itf_get(void) { return &findt_itf; }\n\n#endif // BLE_FINDME_TARGET\n\n/// @} FINDT\n"
  },
  {
    "path": "services/ble_profiles/find/findt/src/findt.h",
    "content": "#ifndef FINDT_H_\n#define FINDT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup FINDT Find Me Target\n * @ingroup FIND\n * @brief Find Me Profile Target.\n *\n * In the Find Me BLE Profile, the device that is in Target role will act as GATT server.\n *\n * The Target will react to alert levels written by the Locator in the Alert Level\n * Characteristic of the Immediate Alert Service(IAS) present in the ATT DB of the device.\n *\n * The interface of this role to the Application is:\n *  - Enable the profile role (from APP)\n *  - Disable the profile role (from APP)\n *  - Indicate that the alert level has been written by the Locator. (to APP)\n *\n * There shall be only one IAS instance on the device. There shall be only one\n * Alert Level Characteristic in the IAS. The characteristic properties shall be\n * Write No Response only.\n *\n *  The enable/disable of the profile and devices disconnection is handled in the application,\n *  depending on its User Input.\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#include \"find_common.h\"\n#if (BLE_FINDME_TARGET)\n#include \n#include \n#include \"gap.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of instances of the Find Me Target task\n#define FINDT_IDX_MAX     0x01\n\n#define FINDT_MANDATORY_MASK        (0x07)\n\n/// Possible states of the FINDT task\nenum findt_state\n{\n    /// Idle state\n    FINDT_IDLE,\n\n    /// Number of defined states.\n    FINDT_STATE_MAX\n};\n\n/// Find Me Target environment variable\nstruct findt_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    ///IAS Start Handle\n    uint16_t shdl;\n    /// State of different task instances\n    ke_state_t state[FINDT_IDX_MAX];\n};\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/// Get database attribute handle\n#define FINDT_HANDLE(idx) \\\n    (findt_env->start_hdl + (idx) )\n\n/// Get database attribute index\n#define FINDT_IDX(hdl) \\\n    ( (hdl) - findt_env->shdl )\n\n\n/*\n * ENUMS\n ****************************************************************************************\n */\n\n///FINDT Attributes database handle list\nenum findt_att_db_handles\n{\n    FINDT_IAS_IDX_SVC,\n\n    FINDT_IAS_IDX_ALERT_LVL_CHAR,\n    FINDT_IAS_IDX_ALERT_LVL_VAL,\n\n    FINDT_IAS_IDX_NB,\n};\n\n/// Alert levels\nenum\n{\n    /// No alert\n    FINDT_ALERT_NONE    = 0x00,\n    /// Mild alert\n    FINDT_ALERT_MILD,\n    /// High alert\n    FINDT_ALERT_HIGH\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve IAS service profile interface\n *\n * @return IAS service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* findt_prf_itf_get(void);\n\n\n/*\n * GLOBAL VARIABLES DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid findt_task_init(struct ke_task_desc *task_desc);\n#endif //BLE_FINDME_TARGET\n\n/// @} FINDT\n\n#endif // FINDT_H_\n"
  },
  {
    "path": "services/ble_profiles/find/findt/src/findt_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup FINDTTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_FINDME_TARGET)\n#include \"attm.h\"\n#include \"co_utils.h\"\n#include \"findt.h\"\n#include \"findt_task.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref  GATTC_WRITE_REQ_IND message.\n * The message is redirected from TASK_SVC because at profile enable, the ATT\n *handle is register for TASK_FINDT. In the handler, an ATT Write Response/Error\n *Response should be sent for ATT protocol, but Alert Level Characteristic only\n *supports WNR so no response PDU is needed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint8_t alert_lvl = 0x0000;\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Allocate write confirmation message.\n  struct gattc_write_cfm *cfm =\n      KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n\n  // Get the address of the environment\n  struct findt_env_tag *findt_env = PRF_ENV_GET(FINDT, findt);\n  uint8_t att_idx = FINDT_IDX(param->handle);\n\n  // Fill in the parameter structure\n  cfm->handle = param->handle;\n  cfm->status = PRF_APP_ERROR;\n\n  // Check if Alert Level is valid\n  if ((att_idx == FINDT_IAS_IDX_ALERT_LVL_VAL) &&\n      (param->value[0] <= FINDT_ALERT_HIGH)) {\n    alert_lvl = param->value[0];\n    cfm->status = GAP_ERR_NO_ERROR;\n\n    // Allocate the alert value change indication\n    struct findt_alert_ind *ind = KE_MSG_ALLOC(\n        FINDT_ALERT_IND, prf_dst_task_get(&(findt_env->prf_env), conidx),\n        dest_id, findt_alert_ind);\n    // Fill in the parameter structure\n    ind->alert_lvl = alert_lvl;\n    ind->conidx = conidx;\n\n    // Send the message\n    ke_msg_send(ind);\n  }\n\n  // Send the message\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(findt){\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n};\n\nvoid findt_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct findt_env_tag *findt_env = PRF_ENV_GET(FINDT, findt);\n\n  task_desc->msg_handler_tab = findt_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(findt_msg_handler_tab);\n  task_desc->state = findt_env->state;\n  task_desc->idx_max = FINDT_IDX_MAX;\n}\n\n#endif // BLE_FINDME_TARGET\n\n/// @} FINDTTASK\n"
  },
  {
    "path": "services/ble_profiles/gfps/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)gfps_crypto/*.c))\n\n#CRYPTO_LIB_NAME := libgfps_crypto\n#$(CRYPTO_LIB_NAME)-y := $(obj_c:.c=.o)\n\nlibgfps_crypto-y := $(obj_c:.c=.o)\nobj-y := libgfps_crypto.a\nsubdir-ccflags-y += \\\n\t-Igfps_crypto/ \\\n\t-Iutils/encrypt \\\n\t-Iapi/\n\n\n\n"
  },
  {
    "path": "services/ble_profiles/gfps/api/gfps_crypto.h",
    "content": "#ifndef _GFPS_PROVIDER_CRYPTO_H_\n#define _GFPS_PROVIDER_CRYPTO_H_\n#include \"prf_utils.h\"\n\nvoid gfps_crypto_init(void);\n\nuint32_t gfps_crypto_get_secret_decrypt(const uint8_t* in_encryptdata ,const uint8_t *in_public_key,uint8_t * out_key,uint8_t *out_decryptdata );\nuint32_t gfps_crypto_encrypt(const uint8_t *in_data,uint8_t len,const uint8_t *AESkey,uint8_t *out_encrypt);\nuint32_t gfps_crypto_decrypt(const uint8_t *in_data,uint8_t len,const uint8_t *AESkey,uint8_t *out_encrypt);\nuint32_t gfps_crypto_gen_DHKey(const uint8_t *in_PubKey,const uint8_t *in_PrivateKey,uint8_t *out_DHKey);\n\nuint32_t gfps_crypto_make_P256_key(uint8_t * out_public_key,uint8_t * out_private_key);\nuint32_t gfps_crypto_set_p256_key(const uint8_t* in_public_key,const uint8_t* in_private_key);\nuint32_t gfps_SHA256_hash(const void* in_data, int len, void* out_data);\nvoid gfps_encrypt_name(uint8_t* aesKey, uint8_t* inputRawName, uint32_t inputLen, \n    uint8_t* outputEncryptedName, uint8_t* hmacFirst8Bytes, uint8_t* nonce);\nbool gfps_decrypt_name(uint8_t* aesKey, uint8_t* hmacFirst8Bytes, \n    uint8_t* nonce, uint8_t* encryptedName, uint8_t* rawName, uint32_t nameLen);\n\n#endif\n\n"
  },
  {
    "path": "services/ble_profiles/gfps/gfps_provider/api/gfps_provider.h",
    "content": "#ifndef GFPSP_H_\n#define GFPSP_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GFPSP google fast pair s\n * @ingroup DIS\n * @brief Device Information Service Server\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_GFPS_PROVIDER)\n#include \"prf_types.h\"\n#include \"prf.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n#define RAW_REQ_FLAGS_DISCOVERABILITY_BIT0_EN           (1)\n#define RAW_REQ_FLAGS_DISCOVERABILITY_BIT0_DIS          (0)\n#define RAW_REQ_FLAGS_INTBONDING_SEEKERADDR_BIT1_EN     (1)\n#define RAW_REQ_FLAGS_INTBONDING_SEEKERADDR_BIT1_DIS    (0)\n\n#define GFPSP_KEY_BASED_PAIRING_REQ_LEN_WITH_PUBLIC_KEY     (80)\n#define GFPSP_KEY_BASED_PAIRING_REQ_LEN_WITHOUT_PUBLIC_KEY  (16)\n\n#define GFPSP_IDX_MAX        (BLE_CONNECTION_MAX)\n\n#define GFPSP_ENCRYPTED_RSP_LEN     16\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the GFPSP task\nenum\n{\n    /// Idle state\n    GFPSP_IDLE,\n    /// Busy state\n    GFPSP_BUSY,\n    /// Number of defined states.\n    GFPSP_STATE_MAX\n};\n\n/// GFPSP Attributes database handle list \nenum gfpsp_att_db_handles\n{\n    GFPSP_IDX_SVC,\n\n    GFPSP_IDX_KEY_BASED_PAIRING_CHAR,\n    GFPSP_IDX_KEY_BASED_PAIRING_VAL,\n    GFPSP_IDX_KEY_BASED_PAIRING_NTF_CFG,\n    \n    GFPSP_IDX_PASSKEY_CHAR,\n    GFPSP_IDX_PASSKEY_VAL,\n    GFPSP_IDX_PASSKEY_NTF_CFG,\n    \n    GFPSP_IDX_ACCOUNT_KEY_CHAR,\n    GFPSP_IDX_ACCOUNT_KEY_VAL,\n    GFPSP_IDX_ACCOUNT_KEY_CFG,\n\n    GFPSP_IDX_NAME_CHAR,\n    GFPSP_IDX_NAME_VAL,\n    GFPSP_IDX_NAME_CFG,\n    \n    GFPSP_IDX_NB,\n};\n\n/// Value element\nstruct gfpsp_val_elmt\n{\n    /// list element header\n    struct co_list_hdr hdr;\n    /// value identifier\n    uint8_t value;\n    /// value length\n    uint8_t length;\n    /// value data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n///Device Information Service Server Environment Variable\nstruct gfpsp_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// List of values set by application\n    struct co_list values;\n    /// Service Attribute Start Handle\n    uint16_t start_hdl;\n    /// Services features\n    uint16_t features;\n    /// Last requested value\n    uint8_t  req_val;\n    /// Last connection index which request value\n    uint8_t  req_conidx;\n\n    /// GFPSP task state\n    ke_state_t state[GFPSP_IDX_MAX];\n};\n\ntypedef struct _gfpsp_encrypted_req_uint128{\n    uint8_t uint128_array[16];\n}gfpsp_encrypted_req_uint128;\n\ntypedef struct _gfpsp_64B_public_key_{\n    uint8_t public_key_64B[64];\n}gfpsp_64B_public_key;\n\ntypedef enum\n{\n    KEY_BASED_PAIRING_REQ = 0x00,\n    KEY_BASED_PAIRING_RSP = 0x01,\n    ACTION_REQUEST        = 0x10,\n} GFPS_MESSAGE_TYPE_E;   \n\ntypedef struct {\n    uint8_t message_type;\n    uint8_t reserved[15];\n} gfpsp_raw_req_t;\n\ntypedef struct {\n    uint8_t message_type;   // KEY_BASED_PAIRING_REQ\n    uint8_t flags_reserved          :   4;    \n    uint8_t flags_retroactively_write_account_key   :   1;\n    uint8_t flags_get_existing_name :   1;    \n    uint8_t flags_bonding_addr      :   1;    \n    uint8_t flags_discoverability   :   1; \n\n    uint8_t provider_addr[6];\n    uint8_t seeker_addr[6];\n    uint8_t reserved[2];\n} gfpsp_key_based_pairing_req_t;\n\ntypedef struct {\n    uint8_t message_type;   // ACTION_REQUEST\n    uint8_t flags_reserved          :   6;    \n    uint8_t isFollowedByAdditionalDataCh   :   1; \n    uint8_t isDeviceAction          :   1;       \n\n    uint8_t provider_addr[6];   \n    uint8_t messageGroup;           // Mandatory if Flags Bit 1 is set.\n    uint8_t messageCode;            // Mandatory if Flags Bit 1 is set.\n    uint8_t additionalDataLen;      // Mandatory if Flags Bit 1 is set. Less than 6\n    uint8_t additionalData[6];      // Mandatory if Flags Bit 1 is set.\n} gfpsp_action_req_t;\n\ntypedef struct {\n    uint8_t message_type; // KEY_BASED_PAIRING_RSP\n    uint8_t provider_addr[6];\n    uint8_t salt[9];\n}gfpsp_raw_resp;\n\ntypedef struct _gfpsp_raw_passkey_resp{\n    uint8_t message_type;\n    uint8_t passkey[3];\n    uint8_t reserved[12];\n}gfpsp_raw_pass_key_resp;\n\ntypedef struct _gfpsp_encrypted_resp{\n    uint8_t uint128_array[GFPSP_ENCRYPTED_RSP_LEN];\n}gfpsp_encrypted_resp;\n\ntypedef struct _gfpsp_req_resp{\n    union{\n        gfpsp_raw_req_t                 raw_req;\n        gfpsp_encrypted_req_uint128     en_req;\n        gfpsp_key_based_pairing_req_t   key_based_pairing_req;     \n        gfpsp_action_req_t              action_req;\n        gfpsp_raw_resp                  key_based_pairing_rsp;\n        gfpsp_encrypted_resp            en_rsp;\n    }rx_tx;\n}gfpsp_req_resp;\n\n\ntypedef struct _gfpsp_Key_based_Pairing_req{\n    gfpsp_encrypted_req_uint128 * en_req;\n    gfpsp_64B_public_key        * pub_key;\n}gfpsp_Key_based_Pairing_req;\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve DIS service profile interface\n *\n * @return DIS service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* gfpsp_prf_itf_get(void);\n\n\n/**\n ****************************************************************************************\n * @brief Check if an attribute shall be added or not in the database\n *\n * @param features DIS features\n *\n * @return Feature config flag\n ****************************************************************************************\n */\nuint32_t gfpsp_compute_cfg_flag(uint16_t features);\n\n/**\n ****************************************************************************************\n * @brief Check if the provided value length matches characteristic requirements\n * @param char_code Characteristic Code\n * @param val_len   Length of the Characteristic value\n *\n * @return status if value length is ok or not\n ****************************************************************************************\n */\nuint8_t gfpsp_check_val_len(uint8_t char_code, uint8_t val_len);\n\n/**\n ****************************************************************************************\n * @brief Retrieve handle attribute from value\n *\n * @param[in] env   Service environment variable\n * @param[in] value Value to search\n *\n * @return Handle attribute from value\n ****************************************************************************************\n */\nuint16_t gfpsp_value_to_handle(struct gfpsp_env_tag* env, uint8_t value);\n\n/**\n ****************************************************************************************\n * @brief Retrieve value from attribute handle\n *\n * @param[in] env    Service environment variable\n * @param[in] handle Attribute handle to search\n *\n * @return  Value from attribute handle\n ****************************************************************************************\n */\nuint8_t gfpsp_handle_to_value(struct gfpsp_env_tag* env, uint16_t handle);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid gfpsp_task_init(struct ke_task_desc *task_desc);\n\nuint32_t gfpsp_crypto_gen_DHKey(const uint8_t *in_PubKey,const uint8_t *in_PrivateKey,uint8_t *out_DHKey);\nuint32_t gfpsp_crypto_make_P256_key(uint8_t * out_public_key,uint8_t * out_private_key);\n\n#endif //BLE_GFPSP_SERVER\n\n/// @} GFPSP\n\n#endif // GFPSP_H_\n"
  },
  {
    "path": "services/ble_profiles/gfps/gfps_provider/api/gfps_provider_errors.h",
    "content": "#ifndef _GFPS_PROVIDER_ERRORS_H_\n#define _GFPS_PROVIDER_ERRORS_H_\n\nenum{\nGFPS_SUCCESS,\nGFPS_ERROR_EXEC_FAIL,\nGFPS_ERROR_NULL,\nGFPS_ERROR_INVALID_PARAM,\nGFPS_ERROR_DATA_SIZE    \n};\n#define Gfps_CheckParm(code, exp) if (!(exp)) return (code)\n\n#endif\n"
  },
  {
    "path": "services/ble_profiles/gfps/gfps_provider/api/gfps_provider_task.h",
    "content": "#ifndef GFPSP_TASK_H_\n#define GFPSP_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GFPSPTASK Task\n * @ingroup GFPSP\n * @brief Device Information Service Server Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n\n/// Messages for Device Information Service Server\nenum\n{\n    //port msg use to reference ..\n    ///Set the value of an attribute - Request\n    GFPSP_SET_VALUE_REQ = TASK_FIRST_MSG(TASK_ID_GFPSP),\n    ///Set the value of an attribute - Response\n    GFPSP_SET_VALUE_RSP,    \n    /// Peer device request to get profile attribute value\n    GFPSP_VALUE_REQ_IND,\n    /// Peer device confirm value of requested attribute\n    GFPSP_VALUE_CFM,\n    \n    GFPSP_KEY_BASED_PAIRING_NTF_CFG,    \n    GFPSP_KEY_BASED_PAIRING_WRITE_IND,\n    GFPSP_KEY_BASED_PAIRING_WRITE_NOTIFY,\n\n    GFPSP_KEY_PASS_KEY_NTF_CFG,\n    GFPSP_KEY_PASS_KEY_WRITE_IND,\n    GFPSP_KEY_PASS_KEY_WRITE_NOTIFY,\n\n    GFPSP_KEY_ACCOUNT_KEY_WRITE_IND,\n    GFPSP_NAME_WRITE_IND,\n    GFPSP_NAME_NOTIFY,\n\n    GFPSP_SEND_WRITE_RESPONSE,\n    \n};\n\n///Attribute Table Indexes\nenum gfpsp_info\n{\n    /// Manufacturer Name\n    GFPSP_MANUFACTURER_NAME_CHAR,\n    /// Model Number\n    GFPSP_MODEL_NB_STR_CHAR,\n    /// Serial Number\n    GFPSP_SERIAL_NB_STR_CHAR,\n    /// HW Revision Number\n    GFPSP_HARD_REV_STR_CHAR,\n    /// FW Revision Number\n    GFPSP_FIRM_REV_STR_CHAR,\n    /// SW Revision Number\n    GFPSP_SW_REV_STR_CHAR,\n    /// System Identifier Name\n    GFPSP_SYSTEM_ID_CHAR,\n    /// IEEE Certificate\n    GFPSP_IEEE_CHAR,\n    /// Plug and Play Identifier\n    GFPSP_PNP_ID_CHAR,\n\n    GFPSP_CHAR_MAX,\n};\n\n///Database Configuration Flags\nenum gfpsp_features\n{\n    ///Indicate if Manufacturer Name String Char. is supported\n    GFPSP_MANUFACTURER_NAME_CHAR_SUP       = 0x0001,\n    ///Indicate if Model Number String Char. is supported\n    GFPSP_MODEL_NB_STR_CHAR_SUP            = 0x0002,\n    ///Indicate if Serial Number String Char. is supported\n    GFPSP_SERIAL_NB_STR_CHAR_SUP           = 0x0004,\n    ///Indicate if Hardware Revision String Char. supports indications\n    GFPSP_HARD_REV_STR_CHAR_SUP            = 0x0008,\n    ///Indicate if Firmware Revision String Char. is writable\n    GFPSP_FIRM_REV_STR_CHAR_SUP            = 0x0010,\n    ///Indicate if Software Revision String Char. is writable\n    GFPSP_SW_REV_STR_CHAR_SUP              = 0x0020,\n    ///Indicate if System ID Char. is writable\n    GFPSP_SYSTEM_ID_CHAR_SUP               = 0x0040,\n    ///Indicate if IEEE Char. is writable\n    GFPSP_IEEE_CHAR_SUP                    = 0x0080,\n    ///Indicate if PnP ID Char. is writable\n    GFPSP_PNP_ID_CHAR_SUP                  = 0x0100,\n\n    ///All features are supported\n    GFPSP_ALL_FEAT_SUP                     = 0x01FF,\n};\n/*\n * API MESSAGES STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters for the database creation\nstruct gfpsp_db_cfg\n{\n    /// Database configuration @see enum gfpsp_features\n    uint16_t features;\n};\n\n\n///Set the value of an attribute - Request\nstruct gfpsp_set_value_req\n{\n    /// Value to Set\n    uint8_t value;\n    /// Value length\n    uint8_t length;\n    /// Value data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n///Set the value of an attribute - Response\nstruct gfpsp_set_value_rsp\n{\n    /// Value Set\n    uint8_t value;\n    /// status of the request\n    uint8_t status;\n};\n\n/// Peer device request to get profile attribute value\nstruct gfpsp_value_req_ind\n{\n    /// Requested value\n    uint8_t value;\n};\n\n/// Peer device  value of requested attribute\nstruct gfpsp_value_cfm\n{\n    /// Requested value\n    uint8_t value;\n    /// Value length\n    uint8_t length;\n    /// Value data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\nstruct gfpsp_send_write_rsp_t\n{\n    uint16_t src_task_id;\n    uint16_t dst_task_id;\n    uint16_t handle;\n    uint16_t status;\n};\n\nstruct gfpsp_write_ind_t\n{\n    struct gfpsp_send_write_rsp_t pendingWriteRsp;\n    uint16_t    length;\n    uint8_t     data[0];\n};\nstruct gfpsp_send_data_req_t\n{\n    uint8_t     connecionIndex;\n    uint32_t    length;\n    uint8_t     value[__ARRAY_EMPTY];\n};\n\nstruct app_gfps_key_based_notif_config_t\n{\n    bool    isNotificationEnabled;\n};\n\nstruct app_gfps_pass_key_notif_config_t\n{\n    bool    isNotificationEnabled;\n};\n\n/// @} GFPSPTASK\n#endif // GFPSP_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/gfps/gfps_provider/src/gfps_provider.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup GFPSP\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_GFPS_PROVIDER)\n#include \"attm.h\"\n#include \"gfps_crypto.h\"\n#include \"gfps_provider.h\"\n#include \"gfps_provider_task.h\"\n#include \"prf.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n#include \"nvrecord_fp_account_key.h\"\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/// Maximal length for Characteristic values - 128 bytes\n#define GFPSP_VAL_MAX_LEN (128)\n/// System ID string length\n#define GFPSP_SYS_ID_LEN (0x08)\n/// IEEE Certif length (min 6 bytes)\n#define GFPSP_IEEE_CERTIF_MIN_LEN (0x06)\n/// PnP ID length\n#define GFPSP_PNP_ID_LEN (0x07)\n\n#define GFPS_USE_128BIT_UUIDx\n\n#ifdef GFPS_USE_128BIT_UUID\n\nstatic const uint8_t ATT_SVC_GOOGLE_FAST_PAIR_PROVIDER[ATT_UUID_16_LEN] = {\n    0x2C, 0xFE};\n\n/*------------------- UNITS ---------------------*/\n\n/*---------------- DECLARATIONS -----------------*/\n#define ATT_DECL_PRIMARY_SERVICE_UUID                                          \\\n  { 0x00, 0x28 }\n#define ATT_DECL_CHARACTERISTIC_UUID                                           \\\n  { 0x03, 0x28 }\n#define ATT_DESC_CLIENT_CHAR_CFG_UUID                                          \\\n  { 0x02, 0x29 }\n\n/*----------------- DESCRIPTORS -----------------*/\n/*--------------- CHARACTERISTICS ---------------*/\n#define ATT_CHAR_KEY_BASED_PAIRING                                             \\\n  {                                                                            \\\n    0xEA, 0x0B, 0x10, 0x32, 0xDE, 0x01, 0xB0, 0x8E, 0x14, 0x48, 0x66, 0x83,    \\\n        0x34, 0x12, 0x2C, 0xFE                                                 \\\n  }\n#define ATT_CHAR_PASSKEY                                                       \\\n  {                                                                            \\\n    0xEA, 0x0B, 0x10, 0x32, 0xDE, 0x01, 0xB0, 0x8E, 0x14, 0x48, 0x66, 0x83,    \\\n        0x35, 0x12, 0x2C, 0xFE                                                 \\\n  }\n#define ATT_CHAR_ACCOUNTKEY                                                    \\\n  {                                                                            \\\n    0xEA, 0x0B, 0x10, 0x32, 0xDE, 0x01, 0xB0, 0x8E, 0x14, 0x48, 0x66, 0x83,    \\\n        0x36, 0x12, 0x2C, 0xFE                                                 \\\n  }\n#define ATT_CHAR_NAME                                                          \\\n  {                                                                            \\\n    0xEA, 0x0B, 0x10, 0x32, 0xDE, 0x01, 0xB0, 0x8E, 0x14, 0x48, 0x66, 0x83,    \\\n        0x37, 0x12, 0x2C, 0xFE                                                 \\\n  }\n\n/*\n * DIS ATTRIBUTES\n ****************************************************************************************\n */\n\nconst struct attm_desc_128 gfpsp_att_db[GFPSP_IDX_NB] = {\n    // Google fast pair service provider Declaration\n    [GFPSP_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE_UUID, PERM(RD, ENABLE), 0, 0},\n\n    [GFPSP_IDX_KEY_BASED_PAIRING_CHAR] = {ATT_DECL_CHARACTERISTIC_UUID,\n                                          PERM(RD, ENABLE), 0, 0},\n    [GFPSP_IDX_KEY_BASED_PAIRING_VAL] = {ATT_CHAR_KEY_BASED_PAIRING,\n                                         PERM(NTF, ENABLE) |\n                                             PERM(WRITE_REQ, ENABLE),\n                                         PERM(RI, ENABLE) |\n                                             PERM_VAL(UUID_LEN, PERM_UUID_128),\n                                         GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_KEY_BASED_PAIRING_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG_UUID,\n                                             PERM(RD, ENABLE) |\n                                                 PERM(WRITE_REQ, ENABLE),\n                                             PERM(RI, ENABLE),\n                                             sizeof(uint16_t)},\n\n    [GFPSP_IDX_PASSKEY_CHAR] = {ATT_DECL_CHARACTERISTIC_UUID, PERM(RD, ENABLE),\n                                0, 0},\n    [GFPSP_IDX_PASSKEY_VAL] = {ATT_CHAR_PASSKEY,\n                               PERM(NTF, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                               PERM(RI, ENABLE) |\n                                   PERM_VAL(UUID_LEN, PERM_UUID_128),\n                               GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_PASSKEY_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG_UUID,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   PERM(RI, ENABLE), sizeof(uint16_t)},\n\n    [GFPSP_IDX_ACCOUNT_KEY_CHAR] = {ATT_DECL_CHARACTERISTIC_UUID,\n                                    PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                    0, GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_ACCOUNT_KEY_VAL] = {ATT_CHAR_ACCOUNTKEY,\n                                   PERM(NTF, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   PERM(RI, ENABLE) |\n                                       PERM_VAL(UUID_LEN, PERM_UUID_128),\n                                   GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_ACCOUNT_KEY_CFG] = {ATT_DESC_CLIENT_CHAR_CFG_UUID,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   PERM(RI, ENABLE), GFPSP_VAL_MAX_LEN},\n\n    [GFPSP_IDX_NAME_CHAR] = {ATT_DECL_CHARACTERISTIC_UUID,\n                             PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                             GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_NAME_VAL] = {ATT_CHAR_NAME,\n                            PERM(NTF, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                            PERM(RI, ENABLE) |\n                                PERM_VAL(UUID_LEN, PERM_UUID_128),\n                            GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_NAME_CFG] = {ATT_DESC_CLIENT_CHAR_CFG_UUID,\n                            PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                            PERM(RI, ENABLE), GFPSP_VAL_MAX_LEN},\n\n};\n#else\nenum {\n\n  /*----------------- SERVICES ---------------------*/\n  ///\n  ATT_SVC_GOOGLE_FAST_PAIR_PROVIDER = ATT_UUID_16(0xFE2C),\n  /*------------------- UNITS ---------------------*/\n\n  /*---------------- DECLARATIONS -----------------*/\n  /*----------------- DESCRIPTORS -----------------*/\n  /*--------------- CHARACTERISTICS ---------------*/\n  ATT_CHAR_KEY_BASED_PAIRING = ATT_UUID_16(0x1234),\n  ATT_CHAR_PASSKEY = ATT_UUID_16(0x1235),\n  ATT_CHAR_ACCOUNTKEY = ATT_UUID_16(0x1236),\n  ATT_CHAR_NAME = ATT_UUID_16(0x1237),\n};\n/*\n * DIS ATTRIBUTES\n ****************************************************************************************\n */\n\nconst struct attm_desc gfpsp_att_db[GFPSP_IDX_NB] = {\n    // Google fast pair service provider Declaration\n    [GFPSP_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    [GFPSP_IDX_KEY_BASED_PAIRING_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                          PERM(RD, ENABLE), 0, 0},\n    [GFPSP_IDX_KEY_BASED_PAIRING_VAL] = {ATT_CHAR_KEY_BASED_PAIRING,\n                                         PERM(NTF, ENABLE) |\n                                             PERM(WRITE_REQ, ENABLE),\n                                         PERM(RI, ENABLE), GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_KEY_BASED_PAIRING_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                             PERM(RD, ENABLE) |\n                                                 PERM(WRITE_REQ, ENABLE),\n                                             PERM(RI, ENABLE),\n                                             sizeof(uint16_t)},\n\n    [GFPSP_IDX_PASSKEY_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    [GFPSP_IDX_PASSKEY_VAL] = {ATT_CHAR_PASSKEY,\n                               PERM(NTF, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                               PERM(RI, ENABLE), GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_PASSKEY_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   PERM(RI, ENABLE), sizeof(uint16_t)},\n\n    [GFPSP_IDX_ACCOUNT_KEY_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                    PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                    0, GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_ACCOUNT_KEY_VAL] = {ATT_CHAR_ACCOUNTKEY,\n                                   PERM(NTF, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   PERM(RI, ENABLE), GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_ACCOUNT_KEY_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   PERM(RI, ENABLE), GFPSP_VAL_MAX_LEN},\n\n    [GFPSP_IDX_NAME_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                             PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                             GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_NAME_VAL] = {ATT_CHAR_NAME,\n                            PERM(NTF, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                            PERM(RI, ENABLE), GFPSP_VAL_MAX_LEN},\n    [GFPSP_IDX_NAME_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                            PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                            PERM(RI, ENABLE), GFPSP_VAL_MAX_LEN},\n\n};\n#endif\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the GFPSP module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t gfpsp_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl,\n                          struct gfpsp_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n\n  // Service content flag\n  uint32_t cfg_flag;\n  // DB Creation Statis\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  // Compute Attribute Table and save it in environment\n  cfg_flag = gfpsp_compute_cfg_flag(params->features);\n\n#ifdef GFPS_USE_128BIT_UUID\n  status = attm_svc_create_db_128(\n      start_hdl, ATT_SVC_GOOGLE_FAST_PAIR_PROVIDER, (uint8_t *)&cfg_flag,\n      GFPSP_IDX_NB, NULL, env->task, &gfpsp_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)));\n#else\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_GOOGLE_FAST_PAIR_PROVIDER, (uint8_t *)&cfg_flag,\n      GFPSP_IDX_NB, NULL, env->task, &gfpsp_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)));\n#endif\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    struct gfpsp_env_tag *gfpsp_env = (struct gfpsp_env_tag *)ke_malloc(\n        sizeof(struct gfpsp_env_tag), KE_MEM_ATT_DB);\n\n    // allocate GFPSP required environment variable\n    env->env = (prf_env_t *)gfpsp_env;\n    gfpsp_env->start_hdl = *start_hdl;\n    gfpsp_env->features = params->features;\n    gfpsp_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    gfpsp_env->prf_env.prf_task =\n        env->task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                               : PERM(PRF_MI, DISABLE));\n\n    // initialize environment variable\n    env->id = TASK_ID_GFPSP;\n    gfpsp_task_init(&(env->desc));\n    co_list_init(&(gfpsp_env->values));\n\n    // service is ready, go into an Idle state\n    ke_state_set(env->task, GFPSP_IDLE);\n  }\n\n  return (status);\n}\n/**\n ****************************************************************************************\n * @brief Destruction of the GFPSP module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void gfpsp_destroy(struct prf_task_env *env) {\n  struct gfpsp_env_tag *gfpsp_env = (struct gfpsp_env_tag *)env->env;\n\n  // remove all values present in list\n  while (!co_list_is_empty(&(gfpsp_env->values))) {\n    struct co_list_hdr *hdr = co_list_pop_front(&(gfpsp_env->values));\n    ke_free(hdr);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(gfpsp_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void gfpsp_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Nothing to do */\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void gfpsp_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  /* Nothing to do */\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// GFPSP Task interface required by profile manager\nconst struct prf_task_cbs gfpsp_itf = {\n    (prf_init_fnct)gfpsp_init,\n    gfpsp_destroy,\n    gfpsp_create,\n    gfpsp_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *gfpsp_prf_itf_get(void) { return &gfpsp_itf; }\n\nuint32_t gfpsp_compute_cfg_flag(uint16_t features) {\n  // Service Declaration\n  uint32_t cfg_flag = 1;\n\n  for (uint8_t i = 0; i < GFPSP_CHAR_MAX; i++) {\n    if (((features >> i) & 1) == 1) {\n      cfg_flag |= (3 << (i * 2 + 1));\n    }\n  }\n\n  return cfg_flag;\n}\n\nuint8_t gfpsp_handle_to_value(struct gfpsp_env_tag *env, uint16_t handle) {\n  uint8_t value = GFPSP_CHAR_MAX;\n\n  // handle cursor, start from first characteristic of service handle\n  uint16_t cur_hdl = env->start_hdl + 1;\n\n  for (uint8_t i = 0; i < GFPSP_CHAR_MAX; i++) {\n    if (((env->features >> i) & 1) == 1) {\n      // check if value handle correspond to requested handle\n      if ((cur_hdl + 1) == handle) {\n        value = i;\n        break;\n      }\n      cur_hdl += 2;\n    }\n  }\n\n  return value;\n}\n\nuint16_t gfpsp_value_to_handle(struct gfpsp_env_tag *env, uint8_t value) {\n  uint16_t handle = env->start_hdl + 1;\n  int8_t i;\n\n  for (i = 0; i < GFPSP_CHAR_MAX; i++) {\n    if (((env->features >> i) & 1) == 1) {\n      // requested value\n      if (value == i) {\n        handle += 1;\n        break;\n      }\n      handle += 2;\n    }\n  }\n\n  // check if handle found\n  return ((i == GFPSP_CHAR_MAX) ? ATT_INVALID_HDL : handle);\n}\n\nuint8_t gfpsp_check_val_len(uint8_t char_code, uint8_t val_len) {\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  // Check if length is upper than the general maximal length\n  if (val_len > GFPSP_VAL_MAX_LEN) {\n    status = PRF_ERR_UNEXPECTED_LEN;\n  } else {\n    // Check if length matches particular requirements\n    switch (char_code) {\n    case GFPSP_SYSTEM_ID_CHAR:\n      if (val_len != GFPSP_SYS_ID_LEN) {\n        status = PRF_ERR_UNEXPECTED_LEN;\n      }\n      break;\n    case GFPSP_IEEE_CHAR:\n      if (val_len < GFPSP_IEEE_CERTIF_MIN_LEN) {\n        status = PRF_ERR_UNEXPECTED_LEN;\n      }\n      break;\n    case GFPSP_PNP_ID_CHAR:\n      if (val_len != GFPSP_PNP_ID_LEN) {\n        status = PRF_ERR_UNEXPECTED_LEN;\n      }\n      break;\n    default:\n      break;\n    }\n  }\n\n  return (status);\n}\n\nuint32_t gfpsp_crypto_gen_DHKey(const uint8_t *in_PubKey,\n                                const uint8_t *in_PrivateKey,\n                                uint8_t *out_DHKey) {\n  return gfps_crypto_gen_DHKey(in_PubKey, in_PrivateKey, out_DHKey);\n}\n\nuint32_t gfpsp_crypto_make_P256_key(uint8_t *out_public_key,\n                                    uint8_t *out_private_key) {\n  return gfps_crypto_make_P256_key(out_public_key, out_private_key);\n}\n\n#else\n\nuint32_t gfpsp_crypto_gen_DHKey(const uint8_t *in_PubKey,\n                                const uint8_t *in_PrivateKey,\n                                uint8_t *out_DHKey) {\n  return 1;\n}\n\nuint32_t gfpsp_crypto_make_P256_key(uint8_t *out_public_key,\n                                    uint8_t *out_private_key) {\n  return 1;\n}\n\n#endif // BLE_GFPSP_SERVER\n\n/// @} GFPSP\n"
  },
  {
    "path": "services/ble_profiles/gfps/gfps_provider/src/gfps_provider_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup GFPS STASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_GFPS_PROVIDER)\n#include \n\n#include \"co_utils.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"gfps_provider.h\"\n//#include \"crypto.h\"\n#include \"gfps_provider_task.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\nstatic void send_notifiction(uint8_t conidx, uint8_t contentType,\n                             const uint8_t *ptrData, uint32_t length) {\n  struct gfpsp_env_tag *gfpsp_env = PRF_ENV_GET(GFPSP, gfpsp);\n\n  // Allocate the GATT notification message\n  struct gattc_send_evt_cmd *report_ntf =\n      KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(&gfpsp_env->prf_env, conidx),\n                       gattc_send_evt_cmd, length);\n\n  // Fill in the parameter structure\n  report_ntf->operation = GATTC_NOTIFY;\n  report_ntf->handle =\n      gfpsp_env->start_hdl +\n      contentType; // GFPSP_IDX_KEY_BASED_PAIRING_VAL;//handle_offset;\n  // pack measured value in database\n  report_ntf->length = length;\n  memcpy(report_ntf->value, ptrData, length);\n  // send notification to peer device\n  ke_msg_send(report_ntf);\n}\n\n__STATIC int send_data_via_notification_handler(\n    ke_msg_id_t const msgid, struct gfpsp_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_notifiction(param->connecionIndex, GFPSP_IDX_KEY_BASED_PAIRING_VAL,\n                   param->value, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int send_passkey_data_via_notification_handler(\n    ke_msg_id_t const msgid, struct gfpsp_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_notifiction(param->connecionIndex, GFPSP_IDX_PASSKEY_VAL, param->value,\n                   param->length);\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int send_name_via_notification_handler(\n    ke_msg_id_t const msgid, struct gfpsp_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_notifiction(param->connecionIndex, GFPSP_IDX_NAME_VAL, param->value,\n                   param->length);\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of write request message.\n * The handler will analyse what has been set and decide alert level\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nuint8_t Encrypted_req[80] = {\n    0xb9, 0x7b, 0x2c, 0x4b, 0x84, 0x59, 0x3e, 0x69, 0xf9, 0xc5, 0x1c, 0x6f,\n    0xf9, 0xba, 0x7e, 0xc0, 0x27, 0xa6, 0x13, 0x55, 0x26, 0x84, 0xbc, 0xa2,\n    0xd8, 0x95, 0xd6, 0xf8, 0xdd, 0x5e, 0xb5, 0x91, 0xfe, 0xf7, 0x31, 0x1c,\n    0x19, 0x3e, 0x38, 0x8e, 0x5f, 0x3a, 0xe6, 0x6b, 0x68, 0x46, 0xc4, 0x14,\n    0x1c, 0x03, 0xcb, 0xc3, 0x18, 0x06, 0x6b, 0x52, 0xd9, 0x5c, 0xa0, 0xa2,\n    0xb5, 0x80, 0xd9, 0x90, 0x4b, 0xed, 0x46, 0x23, 0x22, 0x9b, 0x42, 0xe7,\n    0xc2, 0xde, 0x2e, 0x2a, 0xba, 0x7c, 0xac, 0x2b};\n\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct gfpsp_env_tag *gfpsp_env = PRF_ENV_GET(GFPSP, gfpsp);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  if (GFPSP_IDX_KEY_BASED_PAIRING_VAL !=\n          (param->handle - gfpsp_env->start_hdl) &&\n      (GFPSP_IDX_NAME_VAL != (param->handle - gfpsp_env->start_hdl))) {\n    // Send write response\n    struct gattc_write_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n    cfm->handle = param->handle;\n    cfm->status = status;\n    ke_msg_send(cfm);\n  }\n\n  if (gfpsp_env != NULL) {\n    switch (param->handle - gfpsp_env->start_hdl) {\n    case GFPSP_IDX_KEY_BASED_PAIRING_VAL: {\n      // inform APP of data\n      struct gfpsp_write_ind_t *ind =\n          KE_MSG_ALLOC_DYN(GFPSP_KEY_BASED_PAIRING_WRITE_IND,\n                           prf_dst_task_get(&gfpsp_env->prf_env, conidx),\n                           prf_src_task_get(&gfpsp_env->prf_env, conidx),\n                           gfpsp_write_ind_t, param->length);\n      ind->length = param->length;\n      ind->pendingWriteRsp.dst_task_id = src_id;\n      ind->pendingWriteRsp.src_task_id = dest_id;\n      ind->pendingWriteRsp.handle = param->handle;\n      memcpy((uint8_t *)(ind->data), &(param->value), param->length);\n\n      ke_msg_send(ind);\n      break;\n    }\n    case GFPSP_IDX_KEY_BASED_PAIRING_NTF_CFG: {\n      uint16_t value = 0x0000;\n      memcpy(&value, &(param->value), sizeof(uint16_t));\n      struct app_gfps_key_based_notif_config_t *ind =\n          KE_MSG_ALLOC(GFPSP_KEY_BASED_PAIRING_NTF_CFG,\n                       prf_dst_task_get(&gfpsp_env->prf_env, conidx),\n                       prf_src_task_get(&gfpsp_env->prf_env, conidx),\n                       app_gfps_key_based_notif_config_t);\n\n      ind->isNotificationEnabled = value;\n      ke_msg_send(ind);\n      break;\n    }\n    case GFPSP_IDX_PASSKEY_NTF_CFG: {\n      uint16_t value = 0x0000;\n      memcpy(&value, &(param->value), sizeof(uint16_t));\n      struct app_gfps_pass_key_notif_config_t *ind =\n          KE_MSG_ALLOC(GFPSP_KEY_PASS_KEY_NTF_CFG,\n                       prf_dst_task_get(&gfpsp_env->prf_env, conidx),\n                       prf_src_task_get(&gfpsp_env->prf_env, conidx),\n                       app_gfps_pass_key_notif_config_t);\n\n      ind->isNotificationEnabled = value;\n      ke_msg_send(ind);\n      break;\n    }\n    case GFPSP_IDX_PASSKEY_VAL: {\n      // inform APP of data\n      struct gfpsp_write_ind_t *ind =\n          KE_MSG_ALLOC_DYN(GFPSP_KEY_PASS_KEY_WRITE_IND,\n                           prf_dst_task_get(&gfpsp_env->prf_env, conidx),\n                           prf_src_task_get(&gfpsp_env->prf_env, conidx),\n                           gfpsp_write_ind_t, param->length);\n      ind->length = param->length;\n      memcpy((uint8_t *)(ind->data), &(param->value), param->length);\n\n      ke_msg_send(ind);\n      break;\n    }\n    case GFPSP_IDX_ACCOUNT_KEY_VAL: {\n      TRACE(0, \"Get account key:\");\n      DUMP8(\"%02x \", param->value, param->length);\n      struct gfpsp_write_ind_t *ind =\n          KE_MSG_ALLOC_DYN(GFPSP_KEY_ACCOUNT_KEY_WRITE_IND,\n                           prf_dst_task_get(&gfpsp_env->prf_env, conidx),\n                           prf_src_task_get(&gfpsp_env->prf_env, conidx),\n                           gfpsp_write_ind_t, param->length);\n      ind->length = param->length;\n      memcpy((uint8_t *)(ind->data), &(param->value), param->length);\n\n      ke_msg_send(ind);\n      break;\n    }\n    case GFPSP_IDX_NAME_VAL: {\n      TRACE(0, \"Get updated name:\");\n      DUMP8(\"%02x \", param->value, param->length);\n\n      struct gfpsp_write_ind_t *ind = KE_MSG_ALLOC_DYN(\n          GFPSP_NAME_WRITE_IND, prf_dst_task_get(&gfpsp_env->prf_env, conidx),\n          prf_src_task_get(&gfpsp_env->prf_env, conidx), gfpsp_write_ind_t,\n          param->length);\n      ind->length = param->length;\n      ind->pendingWriteRsp.dst_task_id = src_id;\n      ind->pendingWriteRsp.src_task_id = dest_id;\n      ind->pendingWriteRsp.handle = param->handle;\n      memcpy((uint8_t *)(ind->data), &(param->value), param->length);\n\n      ke_msg_send(ind);\n      break;\n    }\n    default: {\n      break;\n    }\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int gfpsp_send_write_rsp_handler(\n    ke_msg_id_t const msgid, struct gfpsp_send_write_rsp_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Send write response\n  struct gattc_write_cfm *cfm = KE_MSG_ALLOC(\n      GATTC_WRITE_CFM, param->dst_task_id, param->src_task_id, gattc_write_cfm);\n  cfm->handle = param->handle;\n  cfm->status = param->status;\n  ke_msg_send(cfm);\n\n  return KE_MSG_CONSUMED;\n}\n\nstatic int gattc_att_info_req_ind_handler(ke_msg_id_t const msgid,\n                                          struct gattc_att_info_req_ind *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct gattc_att_info_cfm *cfm;\n\n  // Send write response\n  cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n  cfm->handle = param->handle;\n\n  struct gfpsp_env_tag *gfpsp_env = PRF_ENV_GET(GFPSP, gfpsp);\n\n  TRACE(1, \"gattc_att_info_req_ind_handler, is %d\",\n        param->handle - gfpsp_env->start_hdl);\n\n  if (param->handle ==\n      (gfpsp_env->start_hdl + GFPSP_KEY_BASED_PAIRING_NTF_CFG)) {\n    // CCC attribute length = 2\n    cfm->length = 2;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle ==\n             (gfpsp_env->start_hdl + GFPSP_KEY_PASS_KEY_NTF_CFG)) {\n    // CCC attribute length = 2\n    cfm->length = 2;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle ==\n             (gfpsp_env->start_hdl + GFPSP_IDX_ACCOUNT_KEY_CFG)) {\n    // CCC attribute length = 2\n    cfm->length = 2;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle == (gfpsp_env->start_hdl + GFPSP_IDX_NAME_CFG)) {\n    // CCC attribute length = 2\n    cfm->length = 2;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle ==\n             (gfpsp_env->start_hdl + GFPSP_IDX_KEY_BASED_PAIRING_VAL)) {\n    // force length to zero to reject any write starting from something != 0\n    cfm->length = 0;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle == (gfpsp_env->start_hdl + GFPSP_IDX_PASSKEY_VAL)) {\n    // force length to zero to reject any write starting from something != 0\n    cfm->length = 0;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle ==\n             (gfpsp_env->start_hdl + GFPSP_IDX_ACCOUNT_KEY_VAL)) {\n    // force length to zero to reject any write starting from something != 0\n    cfm->length = 0;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle == (gfpsp_env->start_hdl + GFPSP_IDX_NAME_VAL)) {\n    // force length to zero to reject any write starting from something != 0\n    cfm->length = 0;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else {\n    cfm->length = 0;\n    cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n  }\n\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n//\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(gfpsp){\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GFPSP_KEY_BASED_PAIRING_WRITE_NOTIFY,\n     (ke_msg_func_t)send_data_via_notification_handler},\n    {GFPSP_KEY_PASS_KEY_WRITE_NOTIFY,\n     (ke_msg_func_t)send_passkey_data_via_notification_handler},\n    {GFPSP_NAME_NOTIFY, (ke_msg_func_t)send_name_via_notification_handler},\n    {GFPSP_SEND_WRITE_RESPONSE, (ke_msg_func_t)gfpsp_send_write_rsp_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n};\n\nvoid gfpsp_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct gfpsp_env_tag *gfpsp_env = PRF_ENV_GET(GFPSP, gfpsp);\n\n  task_desc->msg_handler_tab = gfpsp_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(gfpsp_msg_handler_tab);\n  task_desc->state = gfpsp_env->state;\n  task_desc->idx_max = GFPSP_IDX_MAX;\n}\n\n#endif // BLE_GFPS_SERVER\n\n/// @} DISSTASK\n"
  },
  {
    "path": "services/ble_profiles/glp/glp_common.h",
    "content": "#ifndef _GLP_COMMON_H_\n#define _GLP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GLP Glucose Profile\n * @ingroup PROFILE\n * @brief Glucose Profile\n *\n * The GLP module is the responsible block for implementing the Glucose Profile\n * functionalities in the BLE Host.\n *\n * The Glucose Profile defines the functionality required in a device that allows\n * the user (Collector device) to configure and recover Glucose measurements from\n * a Glucose device.\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"prf_types.h\"\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Glucose measurement packet max length\n#define GLP_MEAS_MAX_LEN                (17)\n/// Glucose measurement context packet max length\n#define GLP_MEAS_CTX_MAX_LEN            (17)\n/// Record Access Control Point packet max length\n#define GLP_REC_ACCESS_CTRL_MAX_LEN     (21)\n\n\n/// Glucose Service Error Code\nenum glp_error_code\n{\n    /// RACP Procedure already in progress\n    GLP_ERR_PROC_ALREADY_IN_PROGRESS  = (0x80),\n    /// Client Characteristic Configuration Descriptor Improperly Configured\n    GLP_ERR_IMPROPER_CLI_CHAR_CFG     = (0x81),\n};\n\n/// Glucose Measurement Flags field bit values\nenum glp_meas_flag\n{\n    /// Time Offset Present Bit\n    /// Time Offset Present\n    GLP_MEAS_TIME_OFF_PRES = (1 << 0),\n    /// Time Offset Not Present\n    GLP_MEAS_TIME_OFF_NOT_PRES = (0 << 0),\n\n    /// Glucose Concentration, Type and Sample Location Present Bit\n    /// Glucose Concentration, Type and Sample Location Present\n    GLP_MEAS_GL_CTR_TYPE_AND_SPL_LOC_PRES = (1 << 1),\n    /// Glucose Concentration, Type and Sample Location Not Present\n    GLP_MEAS_GL_CTR_TYPE_AND_SPL_LOC_NOT_PRES = (0 << 1),\n\n    /// Glucose Concentration Units (kg/L, mol/L)\n    GLP_MEAS_GL_CTR_UNITS_KG_L = (0 << 2),\n    GLP_MEAS_GL_CTR_UNITS_MOL_L = (1 << 2),\n\n    /// Sensor Status Annunciation Present Bit\n    /// Sensor Status Annunciation Present\n    GLP_MEAS_SENS_STAT_ANNUN_PRES = (1 << 3),\n    /// Sensor Status Annunciation Not Present\n    GLP_MEAS_SENS_STAT_ANNUN_NOT_PRES = (0 << 3),\n\n    /// Context Information Follow Bit\n    /// Context Information Follows\n    GLP_MEAS_CTX_INF_FOLW = (1 << 4),\n    /// Context Information Not Follows\n    GLP_MEAS_CTX_INF_NOT_FOLW = (0 << 4),\n};\n\n/// Glucose Measurement Context Flags field bit values\nenum glp_meas_ctx_flag\n{\n    /// Carbohydrate ID And Carbohydrate Present Bit\n    /// Carbohydrate ID And Carbohydrate Present\n    GLP_CTX_CRBH_ID_AND_CRBH_PRES = (1 << 0),\n    /// Carbohydrate ID And Carbohydrate Not Present\n    GLP_CTX_CRBH_ID_AND_CRBH_NOT_PRES = (0 << 0),\n\n    /// Meal Present Bit\n    /// Meal Present\n    GLP_CTX_MEAL_PRES = (1 << 1),\n    /// Meal Not Present\n    GLP_CTX_MEAL_NOT_PRES = (0 << 1),\n\n    /// Tester-Health Present Bit\n    /// Tester-Health Present\n    GLP_CTX_TESTER_HEALTH_PRES = (1 << 2),\n    /// Tester-Health Not Present\n    GLP_CTX_TESTER_HEALTH_NOT_PRES = (0 << 2),\n\n    /// Exercise Duration And Exercise Intensity Present Bit\n    /// Exercise Duration And Exercise Intensity Present\n    GLP_CTX_EXE_DUR_AND_EXE_INTENS_PRES = (1 << 3),\n    /// Exercise Duration And Exercise Intensity Not Present\n    GLP_CTX_EXE_DUR_AND_EXE_INTENS_NOT_PRES = (0 << 3),\n\n    /// Medication ID And Medication Present Bit\n    /// Medication ID And Medication Present\n    GLP_CTX_MEDIC_ID_AND_MEDIC_PRES = (1 << 4),\n    /// Medication ID And Medication Not Present\n    GLP_CTX_MEDIC_ID_AND_MEDIC_NOT_PRES = (0 << 4),\n\n    /// Medication Value Units (kilograms, liters)\n    GLP_CTX_MEDIC_VAL_UNITS_KG = (0 << 5),\n    GLP_CTX_MEDIC_VAL_UNITS_L = (1 << 5),\n\n    /// HbA1c Present Bit\n    /// HbA1c Present\n    GLP_CTX_HBA1C_PRES = (1 << 6),\n    /// HbA1c Not Present\n    GLP_CTX_HBA1C_NOT_PRES = (0 << 6),\n\n    /// Extended Flags Present Bit\n    /// Extended Flags Present\n    GLP_CTX_EXTD_F_PRES = (1 << 7),\n    /// Extended Flags Not Present\n    GLP_CTX_EXTD_F_NOT_PRES = (0 << 7),\n};\n\n/// Glucose Service Feature Flags field bit values\nenum glp_srv_feature_flag\n{\n    /// Low Battery Detection During Measurement Support Bit\n    /// Low Battery Detection During Measurement Supported\n    GLP_FET_LOW_BAT_DET_DUR_MEAS_SUPP = (1 << 0),\n    /// Low Battery Detection During Measurement Not Supported\n    GLP_FET_LOW_BAT_DET_DUR_MEAS_NOT_SUPP = (0 << 0),\n\n    /// Sensor Malfunction Detection Support Bit\n    /// Sensor Malfunction Detection Supported\n    GLP_FET_SENS_MFNC_DET_SUPP = (1 << 1),\n    /// Sensor Malfunction Detection Not Supported\n    GLP_FET_SENS_MFNC_DET_NOT_SUPP = (0 << 1),\n\n    /// Sensor Sample Size Support Bit\n    /// Sensor Sample Size Supported\n    GLP_FET_SENS_SPL_SIZE_SUPP = (1 << 2),\n    /// Sensor Sample Size Not Supported\n    GLP_FET_SENS_SPL_SIZE_NOT_SUPP = (0 << 2),\n\n    /// Sensor Strip Insertion Error Detection Support Bit\n    /// Sensor Strip Insertion Error Detection Supported\n    GLP_FET_SENS_STRIP_INSERT_ERR_DET_SUPP = (1 << 3),\n    /// Sensor Strip Insertion Error Detection Not Supported\n    GLP_FET_SENS_STRIP_INSERT_ERR_DET_NOT_SUPP = (0 << 3),\n\n    /// Sensor Strip Type Error Detection Support Bit\n    /// Sensor Strip Type Error Detection Supported\n    GLP_FET_SENS_STRIP_TYPE_ERR_DET_SUPP = (1 << 4),\n    /// Sensor Strip Type Error Detection Not Supported\n    GLP_FET_SENS_STRIP_TYPE_ERR_DET_NOT_SUPP = (0 << 4),\n\n    /// Sensor Result High-Low Detection Support Bit\n    /// Sensor Result High-Low Detection Supported\n    GLP_FET_SENS_RES_HIGH_LOW_DET_SUPP = (1 << 5),\n    /// Sensor Result High-Low Detection Not Supported\n    GLP_FET_SENS_RES_HIGH_LOW_DET_NOT_SUPP = (0 << 5),\n\n    /// Sensor Temperature High-Low Detection Support Bit\n    /// Sensor Temperature High-Low Detection Supported\n    GLP_FET_SENS_TEMP_HIGH_LOW_DET_SUPP = (1 << 6),\n    /// Sensor Temperature High-Low Detection Not Supported\n    GLP_FET_SENS_TEMP_HIGH_LOW_DET_NOT_SUPP = (0 << 6),\n\n    /// Sensor Read Interrupt Detection Support Bit\n    /// Sensor Read Interrupt Detection Supported\n    GLP_FET_SENS_RD_INT_DET_SUPP = (1 << 7),\n    /// Sensor Read Interrupt Detection Not Supported\n    GLP_FET_SENS_RD_INT_DET_NOT_SUPP = (0 << 7),\n\n    /// General Device Fault Support Bit\n    /// General Device Fault Supported\n    GLP_FET_GEN_DEV_FLT_SUPP = (1 << 8),\n    /// General Device Fault Not Supported\n    GLP_FET_GEN_DEV_FLT_NOT_SUPP = (0 << 8),\n\n    /// Time Fault Support Bit\n    /// Time Fault Supported\n    GLP_FET_TIME_FLT_SUPP = (1 << 9),\n    /// Time Fault Not Supported\n    GLP_FET_TIME_FLT_NOT_SUPP = (0 << 9),\n\n    /// Multiple Bond Support Bit\n    /// Multiple Bond Supported\n    GLP_FET_MUL_BOND_SUPP = (1 << 10),\n    /// Multiple Bond Not Supported\n    GLP_FET_MUL_BOND_NOT_SUPP = (0 << 10),\n};\n\n\n/// Glucose measurement type\nenum glp_meas_type\n{\n    /// Capillary Whole blood\n    GLP_TYPE_CAPILLARY_WHOLE_BLOOD = (1),\n\n    /// Capillary Plasma\n    GLP_TYPE_CAPILLARY_PLASMA = (2),\n\n    /// Venous Whole blood\n    GLP_TYPE_VENOUS_WHOLE_BLOOD = (3),\n\n    /// Venous Plasma\n    GLP_TYPE_VENOUS_PLASMA = (4),\n\n    /// Arterial Whole blood\n    GLP_TYPE_ARTERIAL_WHOLE_BLOOD = (5),\n\n    /// Arterial Plasma\n    GLP_TYPE_ARTERIAL_PLASMA = (6),\n\n    /// Undetermined Whole blood\n    GLP_TYPE_UNDETERMINED_WHOLE_BLOOD = (7),\n\n    /// Undetermined Plasma\n    GLP_TYPE_UNDETERMINED_PLASMA = (8),\n\n    /// Interstitial Fluid (ISF)\n    GLP_TYPE_INTERSTITIAL_FLUID = (9),\n\n    /// Control Solution\n    GLP_TYPE_CTRL_SOLUTION = (10),\n};\n\n\n/// Glucose measurement Sample Location\nenum glp_meas_loc\n{\n    /// Finger\n    GLP_LOC_FINGER = (1),\n\n    /// Alternate Site Test (AST)\n    GLP_LOC_ALT_SITE_TEST = (2),\n\n    /// Earlobe\n    GLP_LOC_EARLOBE = (3),\n\n    /// Control solution\n    GLP_LOC_CTRL_SOLUTION = (4),\n\n    /// Sample Location value not available\n    GLP_LOC_SPL_LOC_VAL_NOT_AVA = (15),\n};\n\n/// Glucose measurement Sensor Status Annunciation\nenum glp_meas_state\n{\n   /// Device battery low at time of measurement\n   GLP_MEAS_STATE_DEV_BAT_LOW = (1 << 0),\n\n   /// Sensor malfunction or faulting at time of measurement\n   GLP_MEAS_STATE_SENS_MFNC_OR_FLTING = (1 << 1),\n\n   /// Sample size for blood or control solution insufficient at time of measurement\n   GLP_MEAS_STATE_SPL_SIZE_INSUFF = (1 << 2),\n\n   /// Strip insertion error\n   GLP_MEAS_STATE_STRIP_INSERT_ERR = (1 << 3),\n\n   /// Strip type incorrect for device\n   GLP_MEAS_STATE_STRIP_TYPE_INCOR_FOR_DEV = (1 << 4),\n\n   /// Sensor result higher than the device can process\n   GLP_MEAS_STATE_SENS_RES_HIGHER = (1 << 5),\n\n   /// Sensor result lower than the device can process\n   GLP_MEAS_STATE_SENS_RES_LOWER = (1 << 6),\n\n   /// Sensor temperature too high for valid test/result at time of measurement\n   GLP_MEAS_STATE_SENS_TEMP_TOO_HIGH = (1 << 7),\n\n   /// Sensor temperature too low for valid test/result at time of measurement\n   GLP_MEAS_STATE_SENS_TEMP_TOO_LOW = (1 << 8),\n\n   /// Sensor read interrupted because strip was pulled too soon at time of measurement\n   GLP_MEAS_STATE_SENS_RD_INTED = (1 << 9),\n\n   /// General device fault has occurred in the sensor\n   GLP_MEAS_STATE_GEN_DEV_FLT = (1 << 10),\n\n   /// Time fault has occurred in the sensor and time may be inaccurate\n   GLP_MEAS_STATE_TIME_FLT = (1 << 11),\n};\n\n\n/// Glucose measurement context Carbohydrate ID\nenum glp_meas_ctx_carbo\n{\n    /// Breakfast\n    GLP_CID_BREAKFAST = (1),\n\n    /// Lunch\n    GLP_CID_LUNCH = (2),\n\n    /// Dinner\n    GLP_CID_DINNER = (3),\n\n    /// Snack\n    GLP_CID_SNACK = (4),\n\n    /// Drink\n    GLP_CID_DRINK = (5),\n\n    /// Supper\n    GLP_CID_SUPPER = (6),\n\n    /// Brunch\n    GLP_CID_BRUNCH = (7),\n};\n\n/// Glucose measurement context Meal\nenum glp_meas_ctx_meal\n{\n    /// Preprandial (before meal)\n    GLP_MEAL_PREPRANDIAL = (1),\n\n    /// Postprandial (after meal)\n    GLP_MEAL_POSTPRANDIAL = (2),\n\n    /// Fasting\n    GLP_MEAL_FASTING = (3),\n\n    /// Casual (snacks, drinks, etc.)\n    GLP_MEAL_CASUAL = (4),\n\n    /// Bedtime\n    GLP_MEAL_BEDTIME = (5),\n};\n\n/// Glucose measurement context tester type\nenum glp_meas_ctx_tester_type\n{\n    /// Self\n    GLP_TESTER_SELF = (1),\n\n    /// Health Care Professional\n    GLP_TESTER_HEALTH_CARE_PROFESSIONAL = (2),\n\n    /// Lab test\n    GLP_TESTER_LAB_TEST = (3),\n\n    /// Tester value not available\n    GLP_TESTER_TESTER_VAL_NOT_AVA = (15),\n};\n\n/// Glucose measurement context personal health feeling\nenum glp_meas_ctx_feeling\n{\n    /// Minor health issues\n    GLP_HEALTH_MINOR_HEALTH_ISSUES = (1),\n\n    /// Major health issues\n    GLP_HEALTH_MAJOR_HEALTH_ISSUES = (2),\n\n    /// During menses\n    GLP_HEALTH_DUR_MENSES = (3),\n\n    /// Under stress\n    GLP_HEALTH_UNDER_STRESS = (4),\n\n    /// No health issues\n    GLP_HEALTH_NO_HEALTH_ISSUES = (5),\n\n    /// Health value not available\n    GLP_HEALTH_HEALTH_VAL_NOT_AVA = (15),\n};\n\n/// Glucose measurement context medication identification\nenum glp_meas_ctx_med_id\n{\n    /// Rapid acting insulin\n    GLP_MEDID_RAPID_ACTING_INSULIN = (1),\n\n    /// Short acting insulin\n    GLP_MEDID_SHORT_ACTING_INSULIN = (2),\n\n    /// Intermediate acting insulin\n    GLP_MEDID_INTER_ACTING_INSULIN = (3),\n\n    /// Long acting insulin\n    GLP_MEDID_LONG_ACTING_INSULIN = (4),\n\n    /// Pre-mixed insulin\n    GLP_MEDID_PRE_MIXED_INSULIN = (5),\n};\n\n\n/// Glucose access control OP Code\nenum glp_racp_op_code\n{\n    /// Report stored records (Operator: Value from Operator Table)\n    GLP_REQ_REP_STRD_RECS = (1),\n\n    /// Delete stored records (Operator: Value from Operator Table)\n    GLP_REQ_DEL_STRD_RECS = (2),\n\n    /// Abort operation (Operator: Null 'value of 0x00 from Operator Table')\n    GLP_REQ_ABORT_OP = (3),\n\n    /// Report number of stored records (Operator: Value from Operator Table)\n    GLP_REQ_REP_NUM_OF_STRD_RECS = (4),\n\n    /// Number of stored records response (Operator: Null 'value of 0x00 from Operator Table')\n    GLP_REQ_NUM_OF_STRD_RECS_RSP = (5),\n\n    /// Response Code (Operator: Null 'value of 0x00 from Operator Table')\n    GLP_REQ_RSP_CODE = (6),\n};\n\n/// Glucose access control Operator\nenum glp_racp_operator\n{\n    /// All records\n    GLP_OP_ALL_RECS = (1),\n\n    /// Less than or equal to\n    GLP_OP_LT_OR_EQ = (2),\n\n    /// Greater than or equal to\n    GLP_OP_GT_OR_EQ = (3),\n\n    /// Within range of (inclusive)\n    GLP_OP_WITHIN_RANGE_OF = (4),\n\n    /// First record(i.e. oldest record)\n    GLP_OP_FIRST_REC = (5),\n\n    /// Last record (i.e. most recent record)\n    GLP_OP_LAST_REC = (6),\n};\n\n/// Glucose access control response code\nenum glp_racp_status\n{\n    /// Success\n    GLP_RSP_SUCCESS = (1),\n\n    /// Op Code not supported\n    GLP_RSP_OP_CODE_NOT_SUP = (2),\n\n    /// Invalid Operator\n    GLP_RSP_INVALID_OPERATOR = (3),\n\n    /// Operator not supported\n    GLP_RSP_OPERATOR_NOT_SUP = (4),\n\n    /// Invalid Operand\n    GLP_RSP_INVALID_OPERAND = (5),\n\n    /// No records found\n    GLP_RSP_NO_RECS_FOUND = (6),\n\n    /// Abort unsuccessful\n    GLP_RSP_ABORT_UNSUCCESSFUL = (7),\n\n    /// Procedure not completed\n    GLP_RSP_PROCEDURE_NOT_COMPLETED = (8),\n\n    /// Operand not supported\n    GLP_RSP_OPERAND_NOT_SUP = (9),\n};\n\n\n/// record access control filter type\nenum glp_racp_filter\n{\n    /// Filter using Sequence number\n    GLP_FILTER_SEQ_NUMBER = (1),\n    /// Filter using Facing time\n    GLP_FILTER_USER_FACING_TIME = (2),\n};\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n\n\n\n/// Glucose measurement\nstruct glp_meas\n{\n    /// Base Time\n    struct prf_date_time base_time;\n    /// Time Offset\n    int16_t time_offset;\n    /// Glucose Concentration - units of kg/L or mol/L\n    prf_sfloat concentration;\n    ///Sensor Status Annunciation\n    uint16_t status;\n    /// Type\n    uint8_t type;\n    /// Sample Location\n    uint8_t location;\n    /// Flags\n    uint8_t flags;\n};\n\n/// Glucose measurement context\nstruct glp_meas_ctx\n{\n    /// Carbohydrate - units of kilograms\n    prf_sfloat carbo_val;\n    /// Exercise Duration\n    uint16_t exercise_dur;\n    /// Medication value (units of kilograms or liters)\n    prf_sfloat med_val;\n    /// HbA1c value\n    prf_sfloat hba1c_val;\n\n    /// Carbohydrate ID\n    uint8_t carbo_id;\n    /// Meal\n    uint8_t meal;\n    /// Tester\n    uint8_t tester;\n    /// Health\n    uint8_t health;\n    /// Exercise Intensity\n    uint8_t exercise_intens;\n    /// Medication ID\n    uint8_t med_id;\n\n    /// Flag\n    uint8_t flags;\n    /// Extended Flags\n    uint8_t ext_flags;\n};\n\n\n/// Record access control point operation filter\nstruct glp_filter\n{\n    /// function operator\n    uint8_t operator;\n\n    /// filter type\n    uint8_t filter_type;\n\n    /// filter union\n    union\n    {\n        /// Sequence number filtering (filter_type = GLP_FILTER_SEQ_NUMBER)\n        struct\n        {\n            /// Min sequence number\n            uint16_t min;\n            /// Max sequence number\n            uint16_t max;\n        }seq_num;\n\n        /// User facing time filtering (filter_type = GLP_FILTER_USER_FACING_TIME)\n        struct\n        {\n            /// Min base time\n            struct prf_date_time facetime_min;\n\n            /// Max base time\n            struct prf_date_time facetime_max;\n        } time;\n    } val;\n};\n\n\n\n/// Record access control point request\nstruct glp_racp_req\n{\n    /// operation code\n    uint8_t op_code;\n\n    /// operation filter\n    struct glp_filter filter;\n};\n\n\n\n/// Record access control point response\nstruct glp_racp_rsp\n{\n    /// operation code\n    uint8_t op_code;\n\n    /// operator (ignored, always set to null)\n    uint8_t operator;\n\n    /// response operand\n    union\n    {\n        /// Number of record (if op_code = GLP_REQ_NUM_OF_STRD_RECS_RSP)\n        uint16_t num_of_record;\n\n        /// Command Status (if op_code = GLP_REQ_RSP_CODE)\n        struct\n        {\n            /// Request Op Code\n            uint8_t op_code_req;\n            /// Response Code status\n            uint8_t status;\n        } rsp;\n    } operand;\n};\n\n\n\n/// @} glp_common\n\n#endif /* _GLP_COMMON_H_ */\n"
  },
  {
    "path": "services/ble_profiles/glp/glpc/api/glpc_task.h",
    "content": "#ifndef _GLPC_TASK_H_\n#define _GLPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GLPCTASK Glucose Profile Collector Task\n * @ingroup GLPC\n * @brief Glucose Profile Collector Task\n *\n * The GLPCTASK is responsible for handling the messages coming in and out of the\n * @ref GLPC monitor block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n#include \"glp_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\nenum glpc_msg_id\n{\n    /// Start the Glucose Profile - at connection\n    GLPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_GLPC),\n    /// Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    GLPC_ENABLE_RSP,\n\n    /// Register to Glucose sensor notifications - request\n    GLPC_REGISTER_REQ,\n    /// Register to Glucose sensor notifications - confirmation\n    GLPC_REGISTER_RSP,\n\n    /// Read Glucose sensor features - request\n    GLPC_READ_FEATURES_REQ,\n    /// Read Glucose sensor features - response\n    GLPC_READ_FEATURES_RSP,\n\n    /// Record Access Control Point - Request\n    GLPC_RACP_REQ,\n    /// Record Access Control Point - Resp\n    GLPC_RACP_RSP,\n\n    /// Glucose measurement value received\n    GLPC_MEAS_IND,\n\n    /// Glucose measurement context received\n    GLPC_MEAS_CTX_IND,\n\n\n    /// Glucose Record Access Control Point Request Timeout\n    GLPC_RACP_REQ_TIMEOUT,\n};\n\n/// Characteristics\nenum\n{\n    /// Glucose Measurement\n    GLPC_CHAR_MEAS,\n    /// Glucose Measurement Context\n    GLPC_CHAR_MEAS_CTX,\n    /// Glucose Sensor Feature\n    GLPC_CHAR_FEATURE,\n    /// Record Access control point\n    GLPC_CHAR_RACP,\n\n    GLPC_CHAR_MAX,\n};\n\n\n/// Characteristic descriptors\nenum\n{\n    /// Glucose Measurement client config\n    GLPC_DESC_MEAS_CLI_CFG,\n    /// Glucose Measurement context client config\n    GLPC_DESC_MEAS_CTX_CLI_CFG,\n    /// Record Access control point client config\n    GLPC_DESC_RACP_CLI_CFG,\n\n    GLPC_DESC_MAX,\n};\n\n///Structure containing the characteristics handles, value handles and descriptors\nstruct gls_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// characteristic info:\n    ///  - Glucose Measurement\n    ///  - Glucose Measurement Context\n    ///  - Glucose Feature\n    ///  - Record Access Control Point\n    struct prf_char_inf chars[GLPC_CHAR_MAX];\n\n    /// Descriptor handles:info:\n    ///  - Glucose Measurement client cfg\n    ///  - Glucose Measurement Context client cfg\n    ///  - Record Access Control Point client cfg\n    struct prf_char_desc_inf descs[GLPC_DESC_MAX];\n};\n\n\n/// Parameters of the @ref GLPC_ENABLE_REQ message\nstruct glpc_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n    /// Existing handle values gls\n    struct gls_content gls;\n};\n\n/// Parameters of the @ref GLPC_ENABLE_RSP message\nstruct glpc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values gls\n    struct gls_content gls;\n};\n\n/// Parameters of the @ref GLPC_REGISTER_REQ message\nstruct glpc_register_req\n{\n    /// Register or not Glucose measurement context notifications\n    bool meas_ctx_en;\n};\n/// Parameters of the @ref GLPC_REGISTER_RSP message\nstruct glpc_register_rsp\n{\n    /// Status\n    uint8_t  status;\n};\n\n/// Parameters of the @ref GLPC_READ_FEATURES_RSP message\nstruct glpc_read_features_rsp\n{\n    /// Glucose sensor features\n    uint16_t features;\n    /// Status\n    uint8_t  status;\n};\n\n/// Parameters of the @ref GLPC_RACP_REQ message\nstruct glpc_racp_req\n{\n    /// Record Access Control Point Request\n    struct glp_racp_req racp_req;\n};\n/// Parameters of the @ref GLPC_RACP_RSP message\nstruct glpc_racp_rsp\n{\n    ///record access control response\n    struct glp_racp_rsp racp_rsp;\n    /// Status\n    uint8_t  status;\n};\n\n/// Parameters of the @ref GLPC_MEAS_IND message\nstruct glpc_meas_ind\n{\n    /// Sequence Number\n    uint16_t seq_num;\n    /// Glucose measurement\n    struct glp_meas meas_val;\n};\n\n/// Parameters of the @ref GLPC_MEAS_CTX_IND message\nstruct glpc_meas_ctx_ind\n{\n    /// Sequence Number\n    uint16_t seq_num;\n    /// Glucose measurement\n    struct glp_meas_ctx ctx;\n};\n\n/// @} GLPCTASK\n\n#endif /* _GLPC_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/glp/glpc/src/glpc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup GLPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_GL_COLLECTOR)\n#include \"gap.h\"\n#include \"glpc.h\"\n#include \"glpc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialization of the GLPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t glpc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct glpc_env_tag *glpc_env = (struct glpc_env_tag *)ke_malloc(\n      sizeof(struct glpc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate GLPC required environment variable\n  env->env = (prf_env_t *)glpc_env;\n\n  glpc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  glpc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_GLPC;\n  glpc_task_init(&(env->desc));\n\n  for (idx = 0; idx < GLPC_IDX_MAX; idx++) {\n    glpc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), GLPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the GLPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void glpc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct glpc_env_tag *glpc_env = (struct glpc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < GLPC_IDX_MAX; idx++) {\n    if (glpc_env->env[idx] != NULL) {\n      ke_free(glpc_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(glpc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void glpc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put GLP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), GLPC_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void glpc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct glpc_env_tag *glpc_env = (struct glpc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (glpc_env->env[conidx] != NULL) {\n    ke_free(glpc_env->env[conidx]);\n    glpc_env->env[conidx] = NULL;\n  }\n\n  /* Put GLP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), GLPC_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// GLPC Task interface required by profile manager\nconst struct prf_task_cbs glpc_itf = {\n    glpc_init,\n    glpc_destroy,\n    glpc_create,\n    glpc_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *glpc_prf_itf_get(void) { return &glpc_itf; }\n\nvoid glpc_enable_rsp_send(struct glpc_env_tag *glpc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Send to APP the details of the discovered attributes on GLPS\n  struct glpc_enable_rsp *rsp = KE_MSG_ALLOC(\n      GLPC_ENABLE_RSP, prf_dst_task_get(&(glpc_env->prf_env), conidx),\n      prf_src_task_get(&(glpc_env->prf_env), conidx), glpc_enable_rsp);\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->gls = glpc_env->env[conidx]->gls;\n    // Register GLPC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(glpc_env->prf_env), conidx,\n                             &(glpc_env->env[conidx]->gls.svc));\n    // Go to IDLE state\n    ke_state_set(prf_src_task_get(&(glpc_env->prf_env), conidx), GLPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nuint8_t glpc_unpack_meas_value(uint8_t *packed_meas, struct glp_meas *meas_val,\n                               uint16_t *seq_num) {\n  uint8_t cursor = 0;\n\n  // Flags\n  meas_val->flags = packed_meas[cursor];\n  cursor += 1;\n\n  // Sequence Number\n  *seq_num = co_read16p(packed_meas + cursor);\n  cursor += 2;\n\n  // Base Time\n  cursor += prf_unpack_date_time(packed_meas + cursor, &(meas_val->base_time));\n\n  // Time Offset\n  if ((meas_val->flags & GLP_MEAS_TIME_OFF_PRES) != 0) {\n    meas_val->time_offset = co_read16p(packed_meas + cursor);\n    cursor += 2;\n  }\n\n  // Glucose Concentration, type and location\n  if ((meas_val->flags & GLP_MEAS_GL_CTR_TYPE_AND_SPL_LOC_PRES) != 0) {\n    meas_val->concentration = co_read16p(packed_meas + cursor);\n    cursor += 2;\n\n    /* type and location are 2 nibble values */\n    meas_val->location = packed_meas[cursor] >> 4;\n    meas_val->type = packed_meas[cursor] & 0xF;\n\n    cursor += 1;\n  }\n\n  // Sensor Status Annunciation\n  if ((meas_val->flags & GLP_MEAS_SENS_STAT_ANNUN_PRES) != 0) {\n    meas_val->status = co_read16p(packed_meas + cursor);\n    cursor += 2;\n  }\n\n  return cursor;\n}\n\nuint8_t glpc_unpack_meas_ctx_value(uint8_t *packed_meas_ctx,\n                                   struct glp_meas_ctx *meas_ctx_val,\n                                   uint16_t *seq_num) {\n  uint8_t cursor = 0;\n  // Flags\n  meas_ctx_val->flags = packed_meas_ctx[cursor];\n  cursor += 1;\n\n  // Sequence Number\n  *seq_num = co_read16p(packed_meas_ctx + cursor);\n  cursor += 2;\n\n  // Extended Flags\n  if ((meas_ctx_val->flags & GLP_CTX_EXTD_F_PRES) != 0) {\n    meas_ctx_val->ext_flags = packed_meas_ctx[cursor];\n    cursor += 1;\n  }\n\n  // Carbohydrate ID And Carbohydrate Present\n  if ((meas_ctx_val->flags & GLP_CTX_CRBH_ID_AND_CRBH_PRES) != 0) {\n    // Carbohydrate ID\n    meas_ctx_val->carbo_id = packed_meas_ctx[cursor];\n    cursor += 1;\n    // Carbohydrate Present\n    meas_ctx_val->carbo_val = co_read16p(packed_meas_ctx + cursor);\n    cursor += 2;\n  }\n\n  // Meal Present\n  if ((meas_ctx_val->flags & GLP_CTX_MEAL_PRES) != 0) {\n    meas_ctx_val->meal = packed_meas_ctx[cursor];\n    cursor += 1;\n  }\n\n  // Tester-Health Present\n  if ((meas_ctx_val->flags & GLP_CTX_TESTER_HEALTH_PRES) != 0) {\n    // Tester and Health are 2 nibble values\n    meas_ctx_val->health = packed_meas_ctx[cursor] >> 4;\n    meas_ctx_val->tester = packed_meas_ctx[cursor] & 0xF;\n    cursor += 1;\n  }\n\n  // Exercise Duration & Exercise Intensity Present\n  if ((meas_ctx_val->flags & GLP_CTX_EXE_DUR_AND_EXE_INTENS_PRES) != 0) {\n    // Exercise Duration\n    meas_ctx_val->exercise_dur = co_read16p(packed_meas_ctx + cursor);\n    cursor += 2;\n\n    // Exercise Intensity\n    meas_ctx_val->exercise_intens = packed_meas_ctx[cursor];\n    cursor += 1;\n  }\n\n  // Medication ID And Medication Present\n  if ((meas_ctx_val->flags & GLP_CTX_MEDIC_ID_AND_MEDIC_PRES) != 0) {\n    // Medication ID\n    meas_ctx_val->med_id = packed_meas_ctx[cursor];\n    cursor += 1;\n\n    // Medication Present\n    meas_ctx_val->med_val = co_read16p(packed_meas_ctx + cursor);\n    cursor += 2;\n  }\n\n  // HbA1c Present\n  if ((meas_ctx_val->flags & GLP_CTX_HBA1C_PRES) != 0) {\n    // HbA1c\n    meas_ctx_val->hba1c_val = co_read16p(packed_meas_ctx + cursor);\n    cursor += 2;\n  }\n\n  return cursor;\n}\n\nuint8_t glpc_pack_racp_req(uint8_t *packed_val,\n                           const struct glp_racp_req *racp_req) {\n  uint8_t cursor = 0;\n\n  // command op code\n  packed_val[cursor] = racp_req->op_code;\n  cursor++;\n\n  // operator of the function\n  packed_val[cursor] = racp_req->filter.operator;\n  cursor++;\n\n  // Abort operation don't require any other parameter\n  if (racp_req->op_code == GLP_REQ_ABORT_OP) {\n    return cursor;\n  }\n\n  // check if request requires operand (filter)\n  if ((racp_req->filter.operator>= GLP_OP_LT_OR_EQ) &&\n      (racp_req->filter.operator<= GLP_OP_WITHIN_RANGE_OF)) {\n\n    // command filter type\n    packed_val[cursor] = racp_req->filter.filter_type;\n    cursor++;\n\n    // filter uses sequence number\n    if (racp_req->filter.filter_type == GLP_FILTER_SEQ_NUMBER) {\n      // minimum value\n      if ((racp_req->filter.operator== GLP_OP_GT_OR_EQ) ||\n          (racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF)) {\n        // minimum value\n        co_write16p(packed_val + cursor, racp_req->filter.val.seq_num.min);\n        cursor += 2;\n      }\n\n      // maximum value\n      if ((racp_req->filter.operator== GLP_OP_LT_OR_EQ) ||\n          (racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF)) {\n        // maximum value\n        co_write16p(packed_val + cursor, racp_req->filter.val.seq_num.max);\n        cursor += 2;\n      }\n    }\n    // filter uses user facing time\n    else {\n      // retrieve minimum value\n      if ((racp_req->filter.operator== GLP_OP_GT_OR_EQ) ||\n          (racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF)) {\n        // retrieve minimum facing time\n        cursor += prf_pack_date_time((packed_val + cursor),\n                                     &(racp_req->filter.val.time.facetime_min));\n      }\n\n      // retrieve maximum value\n      if ((racp_req->filter.operator== GLP_OP_LT_OR_EQ) ||\n          (racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF)) {\n        // retrieve maximum facing time\n        cursor += prf_pack_date_time((packed_val + cursor),\n                                     &(racp_req->filter.val.time.facetime_max));\n      }\n    }\n  }\n\n  return cursor;\n}\n\nuint8_t glpc_unpack_racp_rsp(uint8_t *packed_val,\n                             struct glp_racp_rsp *racp_rsp) {\n  uint8_t cursor = 0;\n\n  // response op code\n  racp_rsp->op_code = packed_val[cursor];\n  cursor++;\n\n  // operator (null)\n  cursor++;\n\n  // number of records\n  if (racp_rsp->op_code == GLP_REQ_NUM_OF_STRD_RECS_RSP) {\n    racp_rsp->operand.num_of_record = co_read16p(packed_val + cursor);\n    cursor += 2;\n  } else {\n    // requested opcode\n    racp_rsp->operand.rsp.op_code_req = packed_val[cursor];\n    cursor++;\n    // command status\n    racp_rsp->operand.rsp.status = packed_val[cursor];\n    cursor++;\n  }\n\n  return cursor;\n}\n\nuint8_t glpc_validate_request(struct glpc_env_tag *glpc_env, uint8_t conidx,\n                              uint8_t char_code) {\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // check if feature val characteristic exists\n  if (glpc_env->env[conidx]->gls.chars[char_code].val_hdl ==\n      ATT_INVALID_HANDLE) {\n    status = PRF_ERR_INEXISTENT_HDL;\n  }\n\n  return (status);\n}\n\n#endif /* (BLE_GL_COLLECTOR) */\n\n/// @} GLPC\n"
  },
  {
    "path": "services/ble_profiles/glp/glpc/src/glpc.h",
    "content": "#ifndef _GLPC_H_\n#define _GLPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GLPC Glucose Profile Collector\n * @ingroup GLP\n * @brief Glucose Profile Collector\n *\n * The GLPC is responsible for providing Glucose Profile Collector functionalities\n * to upper layer module or application. The device using this profile takes the role\n * of Glucose Profile Collector.\n *\n * Glucose Profile Collector. (GLPC): A GLPC (e.g. PC, phone, etc)\n * is the term used by this profile to describe a device that can interpret Glucose\n * measurement in a way suitable to the user application.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_GL_COLLECTOR)\n#include \"glp_common.h\"\n#include \"ke_task.h\"\n#include \"prf.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"glpc_task.h\"\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Maximum number of Glucose Collector task instances\n#define GLPC_IDX_MAX    (BLE_CONNECTION_MAX)\n\n\n/// 30 seconds record access control point timer\n#define GLPC_RACP_TIMEOUT                  0x0BB8\n\n/// Possible states of the GLPC task\nenum glpc_state\n{\n    /// Not Connected state\n    GLPC_FREE,\n    /// IDLE state\n    GLPC_IDLE,\n    /// Discovering Glucose SVC and Chars\n    GLPC_DISCOVERING,\n\n    /// Number of defined states.\n    GLPC_STATE_MAX\n};\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Glucose Profile Collector environment variable per connection\nstruct glpc_cnx_env\n{\n    ///Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// used to store if measurement context\n    uint8_t meas_ctx_en;\n    ///HTS characteristics\n    struct gls_content gls;\n};\n\n/// Glucose Profile Collector environment variable\nstruct glpc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct glpc_cnx_env* env[GLPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[GLPC_IDX_MAX];\n};\n\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve GLP client profile interface\n *\n * @return GLP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* glpc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Glucose ATT DB discovery results to GLPC host.\n ****************************************************************************************\n */\nvoid glpc_enable_rsp_send(struct glpc_env_tag *glpc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Unpack Glucose measurement value\n *\n * @param[in] packed_meas Glucose measurement value packed\n * @param[out] meas_val Glucose measurement value\n * @param[out] seq_num Glucose measurement sequence number\n *\n * @return size of packed value\n ****************************************************************************************\n */\nuint8_t glpc_unpack_meas_value(uint8_t *packed_meas, struct glp_meas* meas_val,\n                              uint16_t* seq_num);\n\n\n/**\n ****************************************************************************************\n * @brief Unpack Glucose measurement context value\n *\n * @param[in] packed_meas Glucose measurement context value packed\n * @param[out] meas_val Glucose measurement context value\n * @param[out] seq_num Glucose measurement sequence number\n *\n * @return size of packed value\n ****************************************************************************************\n */\nuint8_t glpc_unpack_meas_ctx_value(uint8_t *packed_meas_ctx,\n                                 struct glp_meas_ctx* meas_ctx_val,\n                                 uint16_t* seq_num);\n\n\n\n/**\n ****************************************************************************************\n * @brief Pack Record Access Control request\n *\n * @param[out] packed_val Record Access Control Point value packed\n * @param[in] racp_req Record Access Control Request value\n *\n * @return size of packed data\n ****************************************************************************************\n */\nuint8_t glpc_pack_racp_req(uint8_t *packed_val,\n                               const struct glp_racp_req* racp_req);\n\n\n/**\n ****************************************************************************************\n * @brief Unpack Record Access Control response\n *\n * @param[in] packed_val Record Access Control Point value packed\n * @param[out] racp_rsp Record Access Control Response value\n *\n * @return size of packed data\n ****************************************************************************************\n */\nuint8_t glpc_unpack_racp_rsp(uint8_t *packed_val,\n                                      struct glp_racp_rsp* racp_rsp);\n\n\n/**\n ****************************************************************************************\n * @brief Check if collector request is possible or not\n *\n * @param[in] conidx Connection Index.\n * @param[in] atthdl Attribute handle.\n *\n * @return GAP_ERR_NO_ERROR if request can be performed, error code else.\n ****************************************************************************************\n */\nuint8_t glpc_validate_request(struct glpc_env_tag *glpc_env, uint8_t conidx, uint8_t char_code);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid glpc_task_init(struct ke_task_desc *task_desc);\n\n#endif /* (BLE_GL_COLLECTOR) */\n\n/// @} GLPC\n\n#endif /* _GLPC_H_ */\n"
  },
  {
    "path": "services/ble_profiles/glp/glpc/src/glpc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup GLPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_GL_COLLECTOR)\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"glpc.h\"\n#include \"glpc_task.h\"\n#include \"ke_timer.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Glucose service characteristics information\nconst struct prf_char_def glpc_gls_char[GLPC_CHAR_MAX] = {\n\n    /// Glucose Measurement\n    [GLPC_CHAR_MEAS] = {ATT_CHAR_GLUCOSE_MEAS, ATT_MANDATORY,\n                        ATT_CHAR_PROP_NTF},\n    /// Glucose Measurement Context\n    [GLPC_CHAR_MEAS_CTX] = {ATT_CHAR_GLUCOSE_MEAS_CTX, ATT_OPTIONAL,\n                            ATT_CHAR_PROP_NTF},\n    /// Glucose Feature\n    [GLPC_CHAR_FEATURE] = {ATT_CHAR_GLUCOSE_FEATURE, ATT_MANDATORY,\n                           ATT_CHAR_PROP_RD},\n    /// Record Access control point\n    [GLPC_CHAR_RACP] = {ATT_CHAR_REC_ACCESS_CTRL_PT, ATT_MANDATORY,\n                        ATT_CHAR_PROP_WR | ATT_CHAR_PROP_IND},\n};\n\n/// State machine used to retrieve Glucose service characteristic description\n/// information\nconst struct prf_char_desc_def glpc_gls_char_desc[GLPC_DESC_MAX] = {\n    /// Glucose Measurement client config\n    [GLPC_DESC_MEAS_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                GLPC_CHAR_MEAS},\n\n    /// Glucose Measurement context client config\n    [GLPC_DESC_MEAS_CTX_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                    GLPC_CHAR_MEAS_CTX},\n\n    /// Record Access control point client config\n    [GLPC_DESC_RACP_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                GLPC_CHAR_RACP},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GLPC_ENABLE_REQ message.\n * The handler enables the Glucose Profile Collector Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int glpc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct glpc_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Glucose Profile Client Role Task Environment\n  struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n  ASSERT_INFO(glpc_env != NULL, dest_id, src_id);\n  if ((state == GLPC_IDLE) && (glpc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    glpc_env->env[conidx] = (struct glpc_cnx_env *)ke_malloc(\n        sizeof(struct glpc_cnx_env), KE_MEM_ATT_DB);\n    memset(glpc_env->env[conidx], 0, sizeof(struct glpc_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering GLS on peer\n      prf_disc_svc_send(&(glpc_env->prf_env), conidx, ATT_SVC_GLUCOSE);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, GLPC_DISCOVERING);\n    }\n    // normal connection, get saved att details\n    else {\n      glpc_env->env[conidx]->gls = param->gls;\n\n      // send APP confirmation that can start normal connection to TH\n      glpc_enable_rsp_send(glpc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  }\n\n  else if (state != GLPC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    glpc_enable_rsp_send(glpc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == GLPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n    ASSERT_INFO(glpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(glpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (glpc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve GLS characteristics and descriptors\n      prf_extract_svc_info(ind, GLPC_CHAR_MAX, &glpc_gls_char[0],\n                           &glpc_env->env[conidx]->gls.chars[0], GLPC_DESC_MAX,\n                           &glpc_gls_char_desc[0],\n                           &glpc_env->env[conidx]->gls.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      glpc_env->env[conidx]->gls.svc.shdl = ind->start_hdl;\n      glpc_env->env[conidx]->gls.svc.ehdl = ind->end_hdl;\n    }\n\n    glpc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status;\n  // Get the address of the environment\n  struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (state == GLPC_DISCOVERING) {\n    status = param->status;\n\n    if (param->status == ATT_ERR_NO_ERROR) {\n      // check characteristic validity\n      if (glpc_env->env[conidx]->nb_svc == 1) {\n        status = prf_check_svc_char_validity(\n            GLPC_CHAR_MAX, glpc_env->env[conidx]->gls.chars, glpc_gls_char);\n      }\n      // too much services\n      else if (glpc_env->env[conidx]->nb_svc > 1) {\n        status = PRF_ERR_MULTIPLE_SVC;\n      }\n      // no services found\n      else {\n        status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n      }\n\n      // check descriptor validity\n      if (status == GAP_ERR_NO_ERROR) {\n        status = prf_check_svc_char_desc_validity(\n            GLPC_DESC_MAX, glpc_env->env[conidx]->gls.descs, glpc_gls_char_desc,\n            glpc_env->env[conidx]->gls.chars);\n      }\n    }\n\n    glpc_enable_rsp_send(glpc_env, conidx, status);\n\n  } else if (state == GLPC_IDLE) {\n    switch (param->operation) {\n    case GATTC_WRITE:\n    case GATTC_WRITE_NO_RESPONSE: {\n      // RACP write done.\n      if (glpc_env->env[conidx]->last_uuid_req == ATT_CHAR_REC_ACCESS_CTRL_PT) {\n        // an error occurs while writing RACP command\n        if (param->status != GAP_ERR_NO_ERROR) {\n          struct glpc_racp_rsp *rsp = KE_MSG_ALLOC(\n              GLPC_RACP_RSP, prf_dst_task_get(&(glpc_env->prf_env), conidx),\n              dest_id, glpc_racp_rsp);\n\n          // set error status\n          rsp->status = param->status;\n\n          // stop timer.\n          ke_timer_clear(GLPC_RACP_REQ_TIMEOUT, dest_id);\n\n          ke_msg_send(rsp);\n          glpc_env->env[conidx]->last_uuid_req = 0;\n        }\n      } else {\n        bool finished = false;\n\n        // Restore if measurement context notification should be register in\n        // from unused variable\n        bool meas_ctx_en = glpc_env->env[conidx]->meas_ctx_en;\n\n        // Registration succeed\n        if (param->status == GAP_ERR_NO_ERROR) {\n          // Glucose measurement  notification registration done\n          if (glpc_env->env[conidx]->last_uuid_req == GLPC_DESC_MEAS_CLI_CFG) {\n            // register to RACP indications\n            prf_gatt_write_ntf_ind(&(glpc_env->prf_env), conidx,\n                                   glpc_env->env[conidx]\n                                       ->gls.descs[GLPC_DESC_RACP_CLI_CFG]\n                                       .desc_hdl,\n                                   PRF_CLI_START_IND);\n            glpc_env->env[conidx]->last_uuid_req = GLPC_DESC_RACP_CLI_CFG;\n          }\n          // Record access control point indication registration done\n          // Register to Glucose Measurement Context notifications if requested.\n          else if ((glpc_env->env[conidx]->last_uuid_req ==\n                    GLPC_DESC_RACP_CLI_CFG) &&\n                   meas_ctx_en) {\n            // register to Glucose Measurement Context notifications\n            prf_gatt_write_ntf_ind(&(glpc_env->prf_env), conidx,\n                                   glpc_env->env[conidx]\n                                       ->gls.descs[GLPC_DESC_MEAS_CTX_CLI_CFG]\n                                       .desc_hdl,\n                                   PRF_CLI_START_NTF);\n            glpc_env->env[conidx]->last_uuid_req = GLPC_DESC_MEAS_CTX_CLI_CFG;\n          }\n          // All registration done\n          else {\n            // indication/notification registration finished\n            finished = true;\n          }\n        }\n\n        // send status if registration done or if an error occurs.\n        if ((param->status != GAP_ERR_NO_ERROR) || (finished)) {\n          struct glpc_register_rsp *cfm = KE_MSG_ALLOC(\n              GLPC_REGISTER_RSP, prf_dst_task_get(&(glpc_env->prf_env), conidx),\n              dest_id, glpc_register_rsp);\n          // set error status\n          cfm->status = param->status;\n\n          ke_msg_send(cfm);\n        }\n      }\n    } break;\n\n    case GATTC_READ: {\n      if (param->status != GAP_ERR_NO_ERROR) {\n        struct glpc_read_features_rsp *rsp =\n            KE_MSG_ALLOC(GLPC_READ_FEATURES_RSP,\n                         prf_dst_task_get(&(glpc_env->prf_env), conidx),\n                         dest_id, glpc_read_features_rsp);\n\n        // set error status\n        rsp->status = param->status;\n\n        ke_msg_send(rsp);\n      }\n    } break;\n    default:\n      break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GLPC_READ_FEATURES_REQ message.\n * Send by application task, it's used to retrieve Glucose Sensor features.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int glpc_read_features_req_handler(ke_msg_id_t const msgid,\n                                            void const *param,\n                                            ke_task_id_t const dest_id,\n                                            ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == GLPC_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n    ASSERT_INFO(glpc_env != NULL, dest_id, src_id);\n\n    // environment variable not ready\n    if (glpc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else {\n      status = glpc_validate_request(glpc_env, conidx, GLPC_CHAR_FEATURE);\n\n      // request can be performed\n      if (status == GAP_ERR_NO_ERROR) {\n        // read glucose sensor featur\n        prf_read_char_send(\n            &(glpc_env->prf_env), conidx, glpc_env->env[conidx]->gls.svc.shdl,\n            glpc_env->env[conidx]->gls.svc.ehdl,\n            glpc_env->env[conidx]->gls.chars[GLPC_CHAR_FEATURE].val_hdl);\n      }\n    }\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct glpc_read_features_rsp *rsp = KE_MSG_ALLOC(\n        GLPC_READ_FEATURES_RSP, src_id, dest_id, glpc_read_features_rsp);\n    // set error status\n    rsp->status = status;\n\n    ke_msg_send(rsp);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == GLPC_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n    ASSERT_INFO(glpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(glpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    struct glpc_read_features_rsp *rsp = KE_MSG_ALLOC(\n        GLPC_READ_FEATURES_RSP, prf_dst_task_get(&(glpc_env->prf_env), conidx),\n        dest_id, glpc_read_features_rsp);\n    // set error status\n    rsp->status = ATT_ERR_NO_ERROR;\n    // unpack feature information\n    rsp->features = co_read16p(param->value);\n\n    ke_msg_send(rsp);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GLPC_REGISTER_REQ message.\n * When receiving this request, Glucose collector register to measurement\n *notifications and RACP indications.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int glpc_register_req_handler(ke_msg_id_t const msgid,\n                                       struct glpc_register_req const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == GLPC_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n    ASSERT_INFO(glpc_env != NULL, dest_id, src_id);\n\n    // environment variable not ready\n    if (glpc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    }\n    // check if client characteristics are present\n    else if ((glpc_env->env[conidx]\n                  ->gls.descs[GLPC_DESC_MEAS_CLI_CFG]\n                  .desc_hdl == ATT_INVALID_HANDLE) ||\n             (glpc_env->env[conidx]\n                  ->gls.descs[GLPC_DESC_RACP_CLI_CFG]\n                  .desc_hdl == ATT_INVALID_HANDLE) ||\n             ((param->meas_ctx_en) &&\n              (glpc_env->env[conidx]\n                   ->gls.descs[GLPC_DESC_MEAS_CTX_CLI_CFG]\n                   .desc_hdl == ATT_INVALID_HANDLE))) {\n      status = PRF_ERR_INEXISTENT_HDL;\n    }\n    // request can be performed\n    else {\n      // register to notification\n      prf_gatt_write_ntf_ind(\n          &(glpc_env->prf_env), conidx,\n          glpc_env->env[conidx]->gls.descs[GLPC_DESC_MEAS_CLI_CFG].desc_hdl,\n          PRF_CLI_START_NTF);\n      glpc_env->env[conidx]->last_uuid_req = GLPC_DESC_MEAS_CLI_CFG;\n\n      // save if measurement context notification should be register in an\n      // unused variable\n      glpc_env->env[conidx]->meas_ctx_en = param->meas_ctx_en;\n\n      status = GAP_ERR_NO_ERROR;\n    }\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct glpc_register_rsp *cfm =\n        KE_MSG_ALLOC(GLPC_REGISTER_RSP, src_id, dest_id, glpc_register_rsp);\n    // set error status\n    cfm->status = status;\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GLPC_RACP_REQ message.\n * When receiving this request, Glucose collector send a RACP command to Glucose\n *sensor.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int glpc_racp_req_handler(ke_msg_id_t const msgid,\n                                   struct glpc_racp_req const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == GLPC_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n    ASSERT_INFO(glpc_env != NULL, dest_id, src_id);\n\n    // environment variable not ready\n    if (glpc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else {\n      status = glpc_validate_request(glpc_env, conidx, GLPC_CHAR_RACP);\n\n      // request can be performed\n      if (status == GAP_ERR_NO_ERROR) {\n        // send command request\n        uint8_t value[GLP_REC_ACCESS_CTRL_MAX_LEN];\n        uint16_t length;\n\n        // pack Record Access Control Point request\n        length = glpc_pack_racp_req((uint8_t *)&(value[0]), &(param->racp_req));\n\n        // write Record Access Control Point request\n        prf_gatt_write(&(glpc_env->prf_env), conidx,\n                       glpc_env->env[conidx]->gls.chars[GLPC_CHAR_RACP].val_hdl,\n                       &(value[0]), length, GATTC_WRITE);\n\n        glpc_env->env[conidx]->last_uuid_req = ATT_CHAR_REC_ACCESS_CTRL_PT;\n\n        // start the timer; will destroy the link if it expires\n        ke_timer_set(GLPC_RACP_REQ_TIMEOUT, dest_id, GLPC_RACP_TIMEOUT);\n      }\n    }\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct glpc_racp_rsp *rsp =\n        KE_MSG_ALLOC(GLPC_RACP_RSP, src_id, dest_id, glpc_racp_rsp);\n    // set error status\n    rsp->status = status;\n    ke_msg_send(rsp);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state != GLPC_FREE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n    ASSERT_INFO(glpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(glpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    switch (param->type) {\n    case GATTC_INDICATE: {\n      // confirm that indication has been correctly received\n      struct gattc_event_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n      cfm->handle = param->handle;\n      ke_msg_send(cfm);\n\n      // check if it's a RACP indication\n      if (glpc_env->env[conidx]->gls.chars[GLPC_CHAR_RACP].val_hdl ==\n          param->handle) {\n        struct glpc_racp_rsp *rsp = KE_MSG_ALLOC(\n            GLPC_RACP_RSP, prf_dst_task_get(&(glpc_env->prf_env), conidx),\n            dest_id, glpc_racp_rsp);\n\n        // set error status\n        rsp->status = GAP_ERR_NO_ERROR;\n\n        // stop timer.\n        ke_timer_clear(GLPC_RACP_REQ_TIMEOUT, dest_id);\n\n        // unpack RACP response indication.\n        glpc_unpack_racp_rsp((uint8_t *)param->value, &(rsp->racp_rsp));\n        ke_msg_send(rsp);\n      }\n    } break;\n    case GATTC_NOTIFY: {\n      // check if it's a Glucose measurement notification\n      if (glpc_env->env[conidx]->gls.chars[GLPC_CHAR_MEAS].val_hdl ==\n          param->handle) {\n\n        // build a GLPC_MEAS_IND message with glucose measurement value\n        struct glpc_meas_ind *ind = KE_MSG_ALLOC(\n            GLPC_MEAS_IND, prf_dst_task_get(&(glpc_env->prf_env), conidx),\n            dest_id, glpc_meas_ind);\n\n        // unpack Glucose measurement.\n        glpc_unpack_meas_value((uint8_t *)param->value, &(ind->meas_val),\n                               &(ind->seq_num));\n\n        if (glpc_env->env[conidx]->last_uuid_req ==\n            ATT_CHAR_REC_ACCESS_CTRL_PT) {\n          // restart the timer; will destroy the link if it expires\n          ke_timer_set(GLPC_RACP_REQ_TIMEOUT, dest_id, GLPC_RACP_TIMEOUT);\n        }\n\n        ke_msg_send(ind);\n      }\n      // check if it's a Glucose measurement context notification\n      else if (glpc_env->env[conidx]->gls.chars[GLPC_CHAR_MEAS_CTX].val_hdl ==\n               param->handle) {\n        // build a GLPC_MEAS_CTX_IND message with glucose measurement context\n        // value\n        struct glpc_meas_ctx_ind *ind = KE_MSG_ALLOC(\n            GLPC_MEAS_CTX_IND, prf_dst_task_get(&(glpc_env->prf_env), conidx),\n            dest_id, glpc_meas_ctx_ind);\n\n        // unpack Glucose measurement context.\n        glpc_unpack_meas_ctx_value((uint8_t *)param->value, &(ind->ctx),\n                                   &(ind->seq_num));\n\n        if (glpc_env->env[conidx]->last_uuid_req ==\n            ATT_CHAR_REC_ACCESS_CTRL_PT) {\n          // restart the timer; will destroy the link if it expires\n          ke_timer_set(GLPC_RACP_REQ_TIMEOUT, dest_id, GLPC_RACP_TIMEOUT);\n        }\n\n        ke_msg_send(ind);\n      }\n    } break;\n    default:\n      break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief RACP request not executed by peer device or is freezed.\n * It can be a connection problem, disconnect the link.\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance (TASK_GATTC).\n * @param[in] src_id    ID of the sending task instance.\n *\n * @return If the message was consumed or not.\n *\n ****************************************************************************************\n */\n__STATIC int glpc_racp_req_timeout_handler(ke_msg_id_t const msgid,\n                                           void const *param,\n                                           ke_task_id_t const dest_id,\n                                           ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state != GLPC_FREE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n    ASSERT_INFO(glpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(glpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    // inform that racp execution is into a timeout state\n    struct glpc_racp_rsp *rsp = KE_MSG_ALLOC(\n        GLPC_RACP_RSP, prf_dst_task_get(&(glpc_env->prf_env), conidx), dest_id,\n        glpc_racp_rsp);\n    // set error status\n    rsp->status = PRF_ERR_PROC_TIMEOUT;\n\n    ke_msg_send(rsp);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(glpc){\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {GLPC_READ_FEATURES_REQ, (ke_msg_func_t)glpc_read_features_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GLPC_REGISTER_REQ, (ke_msg_func_t)glpc_register_req_handler},\n    {GLPC_RACP_REQ, (ke_msg_func_t)glpc_racp_req_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_EVENT_REQ_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GLPC_RACP_REQ_TIMEOUT, (ke_msg_func_t)glpc_racp_req_timeout_handler},\n    {GLPC_ENABLE_REQ, (ke_msg_func_t)glpc_enable_req_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid glpc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct glpc_env_tag *glpc_env = PRF_ENV_GET(GLPC, glpc);\n\n  task_desc->msg_handler_tab = glpc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(glpc_msg_handler_tab);\n  task_desc->state = glpc_env->state;\n  task_desc->idx_max = GLPC_IDX_MAX;\n}\n\n#endif /* (BLE_GL_COLLECTOR) */\n/// @} GLPCTASK\n"
  },
  {
    "path": "services/ble_profiles/glp/glps/api/glps.h",
    "content": "#ifndef _GLPS_H_\n#define _GLPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GLPS Glucose Profile Sensor\n * @ingroup GLP\n * @brief Glucose Profile Sensor\n *\n * Glucose sensor (GLS) profile provides functionalities to upper layer module\n * application. The device using this profile takes the role of Glucose sensor.\n *\n * The interface of this role to the Application is:\n *  - Enable the profile role (from APP)\n *  - Disable the profile role (from APP)\n *  - Notify peer device during Glucose measurement (from APP)\n *  - Indicate measurements performed to peer device (from APP)\n *\n * Profile didn't manages multiple users configuration and storage of offline measurements.\n * This must be handled by application.\n *\n * Glucose Profile Sensor. (GLPS): A GLPS (e.g. PC, phone, etc)\n * is the term used by this profile to describe a device that can perform Glucose\n * measurement and notify about on-going measurement and indicate final result to a peer\n * BLE device.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_GL_SENSOR)\n\n#include \"glp_common.h\"\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"attm.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n///Maximum number of Glucose task instances\n#define GLPS_IDX_MAX     BLE_CONNECTION_MAX\n\n\n///GLS Configuration Flag Masks\n#define GLPS_MANDATORY_MASK                (0x1F8F)\n#define GLPS_MEAS_CTX_PRES_MASK            (0x0070)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/// check if flag enable\n#define GLPS_IS(IDX, FLAG) ((glps_env->env[IDX]->flags & (1<< (GLPS_##FLAG))) == (1<< (GLPS_##FLAG)))\n\n/// Set flag enable\n#define GLPS_SET(IDX, FLAG) (glps_env->env[IDX]->flags |= (1<< (GLPS_##FLAG)))\n\n/// Set flag disable\n#define GLPS_CLEAR(IDX, FLAG) (glps_env->env[IDX]->flags &= ~(1<< (GLPS_##FLAG)))\n\n\n/// Get database attribute handle\n#define GLPS_HANDLE(idx) \\\n    (glps_env->start_hdl + (idx) - \\\n        ((!(glps_env->meas_ctx_supported) && ((idx) > GLS_IDX_MEAS_CTX_NTF_CFG))? (3) : (0)))\n\n/// Get database attribute index\n#define GLPS_IDX(hdl) \\\n    (((((hdl) - glps_env->start_hdl) > GLS_IDX_MEAS_CTX_NTF_CFG) && !(glps_env->meas_ctx_supported)) ?\\\n        ((hdl) - glps_env->start_hdl + 3) : ((hdl) - glps_env->start_hdl))\n\n/// Get event Indication/notification configuration bit\n#define GLPS_IND_NTF_EVT(idx) (1 << ((idx - 1) / 3))\n/*\n * ENUMS\n ****************************************************************************************\n */\n\n/// Possible states of the GLPS task\nenum glps_state\n{\n    /// Not Connected state\n    GLPS_FREE,\n    /// Idle state\n    GLPS_IDLE,\n\n    /// Number of defined states.\n    GLPS_STATE_MAX\n};\n\n///Attributes State Machine\nenum\n{\n    /// Glucose Service\n    GLS_IDX_SVC,\n    /// Glucose Measurement\n    GLS_IDX_MEAS_CHAR,\n    GLS_IDX_MEAS_VAL,\n    GLS_IDX_MEAS_NTF_CFG,\n    /// Glucose Measurement Context\n    GLS_IDX_MEAS_CTX_CHAR,\n    GLS_IDX_MEAS_CTX_VAL,\n    GLS_IDX_MEAS_CTX_NTF_CFG,\n    ///Glucose Feature\n    GLS_IDX_FEATURE_CHAR,\n    GLS_IDX_FEATURE_VAL,\n    ///Record Access Control Point\n    GLS_IDX_REC_ACCESS_CTRL_CHAR,\n    GLS_IDX_REC_ACCESS_CTRL_VAL,\n    GLS_IDX_REC_ACCESS_CTRL_IND_CFG,\n\n    GLS_IDX_NB,\n};\n\n///Characteristic Codes\nenum\n{\n    /// Glucose Measurement\n    GLS_MEAS_CHAR,\n    /// Glucose Measurement Context\n    GLS_MEAS_CTX_CHAR,\n    /// Glucose Feature\n    GLS_FEATURE_CHAR,\n    /// Record Access Control Point\n    GLS_REC_ACCESS_CTRL_CHAR,\n};\n\n///Database Configuration Bit Field Flags\nenum\n{\n    /// support of Glucose Measurement Context\n    GLPS_MEAS_CTX_SUP        = 0x01,\n};\n\n/// Indication/notification configuration (put in feature flag to optimize memory usage)\nenum\n{\n    /// Bit used to know if Glucose measurement notification is enabled\n    GLPS_MEAS_NTF_CFG      = GLPS_IND_NTF_EVT(GLS_IDX_MEAS_NTF_CFG),\n    /// Bit used to know if Glucose measurement context notification is enabled\n    GLPS_MEAS_CTX_NTF_CFG  = GLPS_IND_NTF_EVT(GLS_IDX_MEAS_CTX_NTF_CFG),\n    /// Bit used to know if Glucose measurement context indication is enabled\n    GLPS_RACP_IND_CFG      = GLPS_IND_NTF_EVT(GLS_IDX_REC_ACCESS_CTRL_IND_CFG),\n};\n\n/// Type of request completed\nenum\n{\n    /// Glucose measurement notification sent completed\n    GLPS_SEND_MEAS_REQ_NTF_CMP,\n    /// Record Access Control Point Response Indication\n    GLPS_SEND_RACP_RSP_IND_CMP\n};\n\n/// Glucose service processing flags\nenum\n{\n    /// Use To know if bond data are present\n    GLPS_BOND_DATA_PRESENT,\n    /// Flag used to know if there is an on-going record access control point request\n    GLPS_RACP_ON_GOING,\n    /// Service id sending a measurement\n    GLPS_SENDING_MEAS,\n    /// Measurement sent\n    GLPS_MEAS_SENT,\n    /// Measurement context sent\n    GLPS_MEAS_CTX_SENT,\n    /// RACP Response sent by application\n    GLPS_RACP_RSP_SENT_BY_APP,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Glucose Profile Sensor environment variable per connection\nstruct glps_cnx_env\n{\n    /// Glucose service processing flags\n    uint8_t flags;\n    /// Event (notification/indication) configuration\n    uint8_t evt_cfg;\n};\n\n/// Glucose Profile Sensor environment variable\nstruct glps_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct glps_cnx_env* env[GLPS_IDX_MAX];\n    /// Glucose Service Start Handle\n    uint16_t start_hdl;\n    /// Glucose Feature\n    uint16_t features;\n    /// Measurement context supported\n    uint8_t meas_ctx_supported;\n    /// State of different task instances\n    ke_state_t state[GLPS_IDX_MAX];\n};\n\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve GLP service profile interface\n *\n * @return GLP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* glps_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Pack Glucose measurement value\n *\n * @param[out] packed_meas Glucose measurement value packed\n * @param[in] meas_val Glucose measurement value\n * @param[in] seq_num Glucose measurement sequence number\n *\n * @return size of packed value\n ****************************************************************************************\n */\nuint8_t glps_pack_meas_value(uint8_t *packed_meas, const struct glp_meas* meas_val,\n                             uint16_t seq_num);\n\n\n/**\n ****************************************************************************************\n * @brief Pack Glucose measurement context value\n *\n * @param[out] packed_meas Glucose measurement context value packed\n * @param[in] meas_val Glucose measurement context value\n * @param[in] seq_num Glucose measurement sequence number\n *\n * @return size of packed value\n ****************************************************************************************\n */\nuint8_t glps_pack_meas_ctx_value(uint8_t *packed_meas_ctx,\n                                 const struct glp_meas_ctx* meas_ctx_val,\n                                 uint16_t seq_num);\n\n\n\n/**\n ****************************************************************************************\n * @brief Unpack Record Access Control request\n *\n * @param[in] packed_val Record Access Control Point value packed\n * @param[out] racp_req Record Access Control Request value\n *\n * @return status of unpacking\n ****************************************************************************************\n */\nuint8_t glps_unpack_racp_req(uint8_t *packed_val, uint16_t length,\n                             struct glp_racp_req* racp_req);\n\n\n/**\n ****************************************************************************************\n * @brief Pack Record Access Control response\n *\n * @param[out] packed_val Record Access Control Point value packed\n * @param[in] racp_rsp Record Access Control Response value\n *\n * @return size of packed data\n ****************************************************************************************\n */\nuint8_t glps_pack_racp_rsp(uint8_t *packed_val,\n                           struct glp_racp_rsp* racp_rsp);\n\n/**\n ****************************************************************************************\n * @brief Send Record Access Control Response Indication\n *\n * @param[in] racp_rsp Record Access Control Response value\n * @param[in] racp_ind_src Application that requests to send RACP response indication.\n *\n * @return PRF_ERR_IND_DISABLED if indication disabled by peer device, GAP_ERR_NO_ERROR else.\n ****************************************************************************************\n */\nuint8_t glps_send_racp_rsp(struct glp_racp_rsp * racp_rsp,\n                           ke_task_id_t racp_ind_src);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid glps_task_init(struct ke_task_desc *task_desc);\n\n#endif /* #if (BLE_GL_SENSOR) */\n\n/// @} GLPS\n\n#endif /* _GLPS_H_ */\n"
  },
  {
    "path": "services/ble_profiles/glp/glps/api/glps_task.h",
    "content": "#ifndef _GLPS_TASK_H_\n#define _GLPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GLPSTASK Task\n * @ingroup GLPS\n * @brief Glucose Profile Task.\n *\n * The GLPSTASK is responsible for handling the messages coming in and out of the\n * @ref GLPS collector block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n#include \"glp_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Messages for Glucose Profile Sensor\nenum glps_msg_id\n{\n    /// Start the Glucose Profile Sensor - at connection\n    GLPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_GLPS),\n    /// Confirm that Glucose Profile Sensor is started.\n    GLPS_ENABLE_RSP,\n\n    ///Inform APP of new configuration value\n    GLPS_CFG_INDNTF_IND,\n\n    /// Record Access Control Point Request\n    GLPS_RACP_REQ_RCV_IND,\n\n    /// Record Access Control Point Resp\n    GLPS_SEND_RACP_RSP_CMD,\n\n    /// Send Glucose measurement with context information\n    GLPS_SEND_MEAS_WITH_CTX_CMD,\n    /// Send Glucose measurement without context information\n    GLPS_SEND_MEAS_WITHOUT_CTX_CMD,\n\n    ///Inform that requested action has been performed\n    GLPS_CMP_EVT,\n};\n\n///Parameters of the Glucose service database\nstruct glps_db_cfg\n{\n    /// Glucose Feature\n    uint16_t features;\n    /// Measurement context supported\n    uint8_t meas_ctx_supported;\n};\n\n\n/// Parameters of the @ref GLPS_ENABLE_REQ message\nstruct glps_enable_req\n{\n    /// Glucose indication/notification configuration\n    uint16_t evt_cfg;\n};\n\n///Parameters of the @ref GLPS_ENABLE_RSP message\nstruct glps_enable_rsp\n{\n    ///Status\n    uint8_t status;\n};\n\n///Parameters of the @ref GLPS_CFG_INDNTF_IND message\nstruct glps_cfg_indntf_ind\n{\n    /// Glucose indication/notification configuration\n    uint8_t evt_cfg;\n};\n\n///Parameters of the @ref GLPS_SEND_MEAS_WITH_CTX_CMD message\nstruct glps_send_meas_with_ctx_cmd\n{\n    /// Sequence Number\n    uint16_t seq_num;\n    /// Glucose measurement\n    struct glp_meas meas;\n    /// Glucose measurement context\n    struct glp_meas_ctx ctx;\n};\n\n\n///Parameters of the @ref GLPS_SEND_MEAS_WITHOUT_CTX_CMD message\nstruct glps_send_meas_without_ctx_cmd\n{\n    /// Sequence Number\n    uint16_t seq_num;\n    /// Glucose measurement\n    struct glp_meas meas;\n};\n\n\n///Parameters of the @ref GLPS_RACP_REQ_RCV_IND message\nstruct glps_racp_req_rcv_ind\n{\n    ///RACP Request\n    struct glp_racp_req racp_req;\n};\n\n///Parameters of the @ref GLPS_SEND_RACP_RSP_CMD message\nstruct glps_send_racp_rsp_cmd\n{\n    ///Number of records.\n    uint16_t num_of_record;\n    /// operation code\n    uint8_t op_code;\n    ///Command status\n    uint8_t status;\n};\n\n///Parameters of the @ref GLPS_CMP_EVT message\nstruct glps_cmp_evt\n{\n    /// completed request\n    uint8_t request;\n    ///Command status\n    uint8_t status;\n};\n\n\n/// @} GLPSTASK\n\n#endif /* _GLPS_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/glp/glps/src/glps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup GLPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_GL_SENSOR)\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"glps.h\"\n#include \"glps_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Full GLPS Database Description - Used to add attributes into the database\nstatic const struct attm_desc glps_att_db[GLS_IDX_NB] = {\n    // Glucose Service Declaration\n    [GLS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Glucose Measurement Characteristic Declaration\n    [GLS_IDX_MEAS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // Glucose Measurement Characteristic Value\n    [GLS_IDX_MEAS_VAL] = {ATT_CHAR_GLUCOSE_MEAS, PERM(NTF, ENABLE),\n                          PERM(RI, ENABLE), 0},\n    // Glucose Measurement Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [GLS_IDX_MEAS_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                              PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0, 0},\n\n    // Glucose Measurement Context Characteristic Declaration\n    [GLS_IDX_MEAS_CTX_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // Glucose Measurement Context Characteristic Value\n    [GLS_IDX_MEAS_CTX_VAL] = {ATT_CHAR_GLUCOSE_MEAS_CTX, PERM(NTF, ENABLE),\n                              PERM(RI, ENABLE), 0},\n    // Glucose Measurement Context Characteristic - Client Characteristic\n    // Configuration Descriptor\n    [GLS_IDX_MEAS_CTX_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                  PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                  0},\n\n    // Glucose Features Characteristic Declaration\n    [GLS_IDX_FEATURE_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // Glucose Features Characteristic Value\n    [GLS_IDX_FEATURE_VAL] = {ATT_CHAR_GLUCOSE_FEATURE, PERM(RD, ENABLE),\n                             PERM(RI, ENABLE) | sizeof(uint16_t), 0},\n\n    // Record Access Control Point characteristic Declaration\n    [GLS_IDX_REC_ACCESS_CTRL_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                      0, 0},\n    // Record Access Control Point characteristic Value\n    [GLS_IDX_REC_ACCESS_CTRL_VAL] = {ATT_CHAR_REC_ACCESS_CTRL_PT,\n                                     PERM(IND, ENABLE) | PERM(WP, UNAUTH) |\n                                         PERM(WRITE_REQ, ENABLE),\n                                     PERM(RI, ENABLE),\n                                     GLP_REC_ACCESS_CTRL_MAX_LEN},\n    // Record Access Control Point characteristic - Client Characteristic\n    // Configuration Descriptor\n    [GLS_IDX_REC_ACCESS_CTRL_IND_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                         PERM(RD, ENABLE) |\n                                             PERM(WRITE_REQ, ENABLE),\n                                         0, 0},\n};\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n#define GLPS_FILTER_USER_FACING_TIME_SIZE (7)\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialization of the GLPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t glps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct glps_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n  uint8_t idx;\n  // Service content flag\n  uint32_t cfg_flag = GLPS_MANDATORY_MASK;\n  // DB Creation Statis\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  // Set Configuration Flag Value\n  if (params->meas_ctx_supported) {\n    cfg_flag |= GLPS_MEAS_CTX_PRES_MASK;\n  }\n\n  // Create Glucose Database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_GLUCOSE, (uint8_t *)&cfg_flag, GLS_IDX_NB, NULL,\n      env->task, &glps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, ENABLE));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate GLPS required environment variable\n    struct glps_env_tag *glps_env = (struct glps_env_tag *)ke_malloc(\n        sizeof(struct glps_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize GLPS environment\n    env->env = (prf_env_t *)glps_env;\n    glps_env->start_hdl = *start_hdl;\n    glps_env->meas_ctx_supported = params->meas_ctx_supported;\n    glps_env->features = params->features;\n    glps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    glps_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_GLPS;\n    glps_task_init(&(env->desc));\n\n    for (idx = 0; idx < GLPS_IDX_MAX; idx++) {\n      glps_env->env[idx] = NULL;\n      // service is ready, go into an Idle state\n      ke_state_set(KE_BUILD_ID(env->task, idx), GLPS_FREE);\n    }\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the GLPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void glps_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct glps_env_tag *glps_env = (struct glps_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < GLPS_IDX_MAX; idx++) {\n    if (glps_env->env[idx] != NULL) {\n      ke_free(glps_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(glps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void glps_create(struct prf_task_env *env, uint8_t conidx) {\n  struct glps_env_tag *glps_env = (struct glps_env_tag *)env->env;\n  glps_env->env[conidx] = (struct glps_cnx_env *)ke_malloc(\n      sizeof(struct glps_cnx_env), KE_MEM_ATT_DB);\n\n  memset(glps_env->env[conidx], 0, sizeof(struct glps_cnx_env));\n\n  /* Put GLS in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), GLPS_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void glps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct glps_env_tag *glps_env = (struct glps_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (glps_env->env[conidx] != NULL) {\n    ke_free(glps_env->env[conidx]);\n    glps_env->env[conidx] = NULL;\n  }\n\n  /* Put GLS in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), GLPS_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// GLPS Task interface required by profile manager\nconst struct prf_task_cbs glps_itf = {\n    (prf_init_fnct)glps_init,\n    glps_destroy,\n    glps_create,\n    glps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *glps_prf_itf_get(void) { return &glps_itf; }\n\nuint8_t glps_pack_meas_value(uint8_t *packed_meas,\n                             const struct glp_meas *meas_val,\n                             uint16_t seq_num) {\n  uint8_t cursor = 0;\n\n  // Flags\n  packed_meas[cursor] = meas_val->flags;\n  cursor += 1;\n\n  // Sequence Number\n  co_write16p(packed_meas + cursor, seq_num);\n  cursor += 2;\n\n  // Base Time\n  cursor += prf_pack_date_time(packed_meas + cursor, &(meas_val->base_time));\n\n  // Time Offset\n  if ((meas_val->flags & GLP_MEAS_TIME_OFF_PRES) != 0) {\n    co_write16p(packed_meas + cursor, meas_val->time_offset);\n    cursor += 2;\n  }\n\n  // Glucose Concentration, type and location\n  if ((meas_val->flags & GLP_MEAS_GL_CTR_TYPE_AND_SPL_LOC_PRES) != 0) {\n    co_write16p(packed_meas + cursor, meas_val->concentration);\n    cursor += 2;\n\n    /* type and location are 2 nibble values */\n    packed_meas[cursor] = (meas_val->location << 4) | (meas_val->type);\n    cursor += 1;\n  }\n\n  // Sensor Status Annunciation\n  if ((meas_val->flags & GLP_MEAS_SENS_STAT_ANNUN_PRES) != 0) {\n    co_write16p(packed_meas + cursor, meas_val->status);\n    cursor += 2;\n  }\n\n  return cursor;\n}\n\nuint8_t glps_pack_meas_ctx_value(uint8_t *packed_meas_ctx,\n                                 const struct glp_meas_ctx *meas_ctx_val,\n                                 uint16_t seq_num) {\n  uint8_t cursor = 0;\n  // Flags\n  packed_meas_ctx[cursor] = meas_ctx_val->flags;\n  cursor += 1;\n\n  // Sequence Number\n  co_write16p(packed_meas_ctx + cursor, seq_num);\n  cursor += 2;\n\n  // Extended Flags\n  if ((meas_ctx_val->flags & GLP_CTX_EXTD_F_PRES) != 0) {\n    packed_meas_ctx[cursor] = meas_ctx_val->ext_flags;\n    cursor += 1;\n  }\n\n  // Carbohydrate ID And Carbohydrate Present\n  if ((meas_ctx_val->flags & GLP_CTX_CRBH_ID_AND_CRBH_PRES) != 0) {\n    // Carbohydrate ID\n    packed_meas_ctx[cursor] = meas_ctx_val->carbo_id;\n    cursor += 1;\n    // Carbohydrate Present\n    co_write16p(packed_meas_ctx + cursor, meas_ctx_val->carbo_val);\n    cursor += 2;\n  }\n\n  // Meal Present\n  if ((meas_ctx_val->flags & GLP_CTX_MEAL_PRES) != 0) {\n    packed_meas_ctx[cursor] = meas_ctx_val->meal;\n    cursor += 1;\n  }\n\n  // Tester-Health Present\n  if ((meas_ctx_val->flags & GLP_CTX_TESTER_HEALTH_PRES) != 0) {\n    // Tester and Health are 2 nibble values\n    packed_meas_ctx[cursor] =\n        (meas_ctx_val->health << 4) | (meas_ctx_val->tester);\n    cursor += 1;\n  }\n\n  // Exercise Duration & Exercise Intensity Present\n  if ((meas_ctx_val->flags & GLP_CTX_EXE_DUR_AND_EXE_INTENS_PRES) != 0) {\n    // Exercise Duration\n    co_write16p(packed_meas_ctx + cursor, meas_ctx_val->exercise_dur);\n    cursor += 2;\n\n    // Exercise Intensity\n    packed_meas_ctx[cursor] = meas_ctx_val->exercise_intens;\n    cursor += 1;\n  }\n\n  // Medication ID And Medication Present\n  if ((meas_ctx_val->flags & GLP_CTX_MEDIC_ID_AND_MEDIC_PRES) != 0) {\n    // Medication ID\n    packed_meas_ctx[cursor] = meas_ctx_val->med_id;\n    cursor += 1;\n\n    // Medication Present\n    co_write16p(packed_meas_ctx + cursor, meas_ctx_val->med_val);\n    cursor += 2;\n  }\n\n  // HbA1c Present\n  if ((meas_ctx_val->flags & GLP_CTX_HBA1C_PRES) != 0) {\n    // HbA1c\n    co_write16p(packed_meas_ctx + cursor, meas_ctx_val->hba1c_val);\n    cursor += 2;\n  }\n\n  return cursor;\n}\n\nuint8_t glps_unpack_racp_req(uint8_t *packed_val, uint16_t length,\n                             struct glp_racp_req *racp_req) {\n  uint8_t cursor = 0;\n\n  // verify that enough data present to load operation filter\n  if (length < 2) {\n    return PRF_APP_ERROR;\n  }\n\n  // retrieve command op code\n  racp_req->op_code = packed_val[cursor];\n  cursor++;\n\n  // clear filter structure\n  memset(&(racp_req->filter), 0, sizeof(struct glp_filter));\n\n  // retrieve operator of the function\n  racp_req->filter.operator= packed_val[cursor];\n  cursor++;\n\n  // check if opcode is supported\n  if ((racp_req->op_code < GLP_REQ_REP_STRD_RECS) ||\n      (racp_req->op_code > GLP_REQ_REP_NUM_OF_STRD_RECS)) {\n    return GLP_RSP_OP_CODE_NOT_SUP;\n  }\n\n  // Abort operation don't require any other parameter\n  if (racp_req->op_code == GLP_REQ_ABORT_OP) {\n    return GAP_ERR_NO_ERROR;\n  }\n\n  // check if operator is valid\n  if (racp_req->filter.operatorfilter.operator> GLP_OP_LAST_REC) {\n    return GLP_RSP_OPERATOR_NOT_SUP;\n  }\n\n  // check if request requires operand (filter)\n  if ((racp_req->filter.operator>= GLP_OP_LT_OR_EQ) &&\n      (racp_req->filter.operator<= GLP_OP_WITHIN_RANGE_OF)) {\n    // verify that enough data present to load operand filter\n    if (length < cursor) {\n      return GLP_RSP_INVALID_OPERAND;\n    }\n\n    // retrieve command filter type\n    racp_req->filter.filter_type = packed_val[cursor];\n    cursor++;\n\n    // filter uses sequence number\n    if (racp_req->filter.filter_type == GLP_FILTER_SEQ_NUMBER) {\n      // retrieve minimum value\n      if ((racp_req->filter.operator== GLP_OP_GT_OR_EQ) ||\n          (racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF)) {\n        // check sufficient data available\n        if ((length - cursor) < 2) {\n          return GLP_RSP_INVALID_OPERAND;\n        }\n\n        // retrieve minimum value\n        racp_req->filter.val.seq_num.min = co_read16p(packed_val + cursor);\n        cursor += 2;\n      }\n\n      // retrieve maximum value\n      if ((racp_req->filter.operator== GLP_OP_LT_OR_EQ) ||\n          (racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF)) {\n        if ((length - cursor) < 2) {\n          return GLP_RSP_INVALID_OPERAND;\n        }\n\n        // retrieve maximum value\n        racp_req->filter.val.seq_num.max = co_read16p(packed_val + cursor);\n        cursor += 2;\n      }\n\n      // check that range value is valid\n      if ((racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF) &&\n          (racp_req->filter.val.seq_num.min >\n           racp_req->filter.val.seq_num.max)) {\n        return GLP_RSP_INVALID_OPERAND;\n      }\n    }\n    // filter uses user facing time\n    else if (racp_req->filter.filter_type == GLP_FILTER_USER_FACING_TIME) {\n      // retrieve minimum value\n      if ((racp_req->filter.operator== GLP_OP_GT_OR_EQ) ||\n          (racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF)) {\n        // check sufficient data available\n        if ((length - cursor) < GLPS_FILTER_USER_FACING_TIME_SIZE) {\n          return GLP_RSP_INVALID_OPERAND;\n        }\n\n        // retrieve minimum facing time\n        cursor += prf_unpack_date_time(\n            (packed_val + cursor), &(racp_req->filter.val.time.facetime_min));\n        cursor += 2;\n      }\n\n      // retrieve maximum value\n      if ((racp_req->filter.operator== GLP_OP_LT_OR_EQ) ||\n          (racp_req->filter.operator== GLP_OP_WITHIN_RANGE_OF)) {\n        if ((length - cursor) < GLPS_FILTER_USER_FACING_TIME_SIZE) {\n          return GLP_RSP_INVALID_OPERAND;\n        }\n\n        // retrieve maximum facing time\n        cursor += prf_unpack_date_time(\n            (packed_val + cursor), &(racp_req->filter.val.time.facetime_max));\n      }\n    } else {\n      return GLP_RSP_OPERAND_NOT_SUP;\n    }\n  } else if ((length - cursor) != 0) {\n    return GLP_RSP_INVALID_OPERAND;\n  }\n\n  // Check that operand is valid\n  return GAP_ERR_NO_ERROR;\n}\n\nuint8_t glps_pack_racp_rsp(uint8_t *packed_val, struct glp_racp_rsp *racp_rsp) {\n  uint8_t cursor = 0;\n\n  // set response op code\n  packed_val[cursor] = racp_rsp->op_code;\n  cursor++;\n\n  // set operator (null)\n  packed_val[cursor] = 0;\n  cursor++;\n\n  // number of record\n  if (racp_rsp->op_code == GLP_REQ_NUM_OF_STRD_RECS_RSP) {\n    co_write16(packed_val + cursor, racp_rsp->operand.num_of_record);\n    cursor += 2;\n  } else {\n    // requested opcode\n    packed_val[cursor] = racp_rsp->operand.rsp.op_code_req;\n    ;\n    cursor++;\n    // command status\n    packed_val[cursor] = racp_rsp->operand.rsp.status;\n    cursor++;\n  }\n\n  return cursor;\n}\n\n#endif /* BLE_GL_SENSOR */\n\n/// @} GLPS\n"
  },
  {
    "path": "services/ble_profiles/glp/glps/src/glps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup GLPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_GL_SENSOR)\n\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"glps.h\"\n#include \"glps_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n *  GLUCOSE PROFILE ATTRIBUTES\n ****************************************************************************************\n */\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GLPS_ENABLE_REQ message.\n * The handler enables the Glucose Sensor Profile and initialize readable\n *values.\n * @param[in] msgid Id of the message received (probably unused).off\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int glps_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct glps_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n  struct glps_enable_rsp *cmp_evt;\n\n  if (state == GLPS_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct glps_env_tag *glps_env = PRF_ENV_GET(GLPS, glps);\n    if (!GLPS_IS(conidx, BOND_DATA_PRESENT)) {\n      GLPS_SET(conidx, BOND_DATA_PRESENT);\n      status = GAP_ERR_NO_ERROR;\n      glps_env->env[conidx]->evt_cfg = param->evt_cfg;\n    }\n  }\n\n  // send completed information to APP task that contains error status\n  cmp_evt = KE_MSG_ALLOC(GLPS_ENABLE_RSP, src_id, dest_id, glps_enable_rsp);\n  cmp_evt->status = status;\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GLPS_MEAS_SEND_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int glps_meas_send_req_handler(\n    ke_msg_id_t const msgid, struct glps_send_meas_with_ctx_cmd const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == GLPS_IDLE) {\n    // Get the address of the environment\n    struct glps_env_tag *glps_env = PRF_ENV_GET(GLPS, glps);\n\n    // Cannot send another measurement in parallel\n    if (!GLPS_IS(conidx, SENDING_MEAS)) {\n      // inform that device is sending a measurement\n      GLPS_SET(conidx, SENDING_MEAS);\n\n      // check if context is supported\n      if ((msgid == GLPS_SEND_MEAS_WITH_CTX_CMD) &&\n          !(glps_env->meas_ctx_supported)) {\n        // Context not supported\n        status = (PRF_ERR_FEATURE_NOT_SUPPORTED);\n      }\n      // check if notifications enabled\n      else if (((glps_env->env[conidx]->evt_cfg & GLPS_MEAS_NTF_CFG) == 0) ||\n               (((glps_env->env[conidx]->evt_cfg & GLPS_MEAS_CTX_NTF_CFG) ==\n                 0) &&\n                (msgid == GLPS_SEND_MEAS_WITH_CTX_CMD))) {\n        // Not allowed to send measurement if Notifications not enabled.\n        status = (PRF_ERR_NTF_DISABLED);\n      } else {\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *meas_val = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n            gattc_send_evt_cmd, GLP_MEAS_MAX_LEN);\n\n        // Fill in the parameter structure\n        meas_val->operation = GATTC_NOTIFY;\n        meas_val->handle = GLPS_HANDLE(GLS_IDX_MEAS_VAL);\n        // pack measured value in database\n        meas_val->length = glps_pack_meas_value(meas_val->value, &(param->meas),\n                                                param->seq_num);\n\n        // Measurement value notification not yet sent\n        GLPS_CLEAR(conidx, MEAS_SENT);\n\n        // Send the event\n        ke_msg_send(meas_val);\n\n        if (msgid == GLPS_SEND_MEAS_WITH_CTX_CMD) {\n          // Allocate the GATT notification message\n          struct gattc_send_evt_cmd *meas_ctx_val = KE_MSG_ALLOC_DYN(\n              GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n              gattc_send_evt_cmd, GLP_MEAS_CTX_MAX_LEN);\n\n          // Fill in the parameter structure\n          meas_ctx_val->operation = GATTC_NOTIFY;\n          meas_ctx_val->handle = GLPS_HANDLE(GLS_IDX_MEAS_CTX_VAL);\n          // pack measured value in database\n          meas_ctx_val->length = glps_pack_meas_ctx_value(\n              meas_ctx_val->value, &(param->ctx), param->seq_num);\n\n          // 2 notification complete messages expected\n          GLPS_SET(conidx, MEAS_CTX_SENT);\n\n          // Send the event\n          ke_msg_send(meas_ctx_val);\n        } else {\n          // 1 notification complete messages expected\n          GLPS_CLEAR(conidx, MEAS_CTX_SENT);\n        }\n\n        status = (GAP_ERR_NO_ERROR);\n      }\n    }\n  }\n\n  // send command complete if an error occurs\n  if (status != GAP_ERR_NO_ERROR) {\n    // send completed information to APP task that contains error status\n    struct glps_cmp_evt *cmp_evt =\n        KE_MSG_ALLOC(GLPS_CMP_EVT, src_id, dest_id, glps_cmp_evt);\n\n    cmp_evt->request = GLPS_SEND_MEAS_REQ_NTF_CMP;\n    cmp_evt->status = status;\n\n    ke_msg_send(cmp_evt);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GLPS_SEND_RACP_RSP_CMD message.\n * Send when a RACP requests is finished\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int glps_send_racp_rsp_cmd_handler(\n    ke_msg_id_t const msgid, struct glps_send_racp_rsp_cmd const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == GLPS_IDLE) {\n    // Get the address of the environment\n    struct glps_env_tag *glps_env = PRF_ENV_GET(GLPS, glps);\n\n    // check if op code valid\n    if ((param->op_code < GLP_REQ_REP_STRD_RECS) ||\n        (param->op_code > GLP_REQ_REP_NUM_OF_STRD_RECS)) {\n      // Wrong op code\n      status = PRF_ERR_INVALID_PARAM;\n    }\n    // check if RACP on going\n    else if ((param->op_code != GLP_REQ_ABORT_OP) &&\n             !(GLPS_IS(conidx, RACP_ON_GOING))) {\n      // Cannot send response since no RACP on going\n      status = PRF_ERR_REQ_DISALLOWED;\n    }\n    // Indication not enabled on peer device\n    else if ((glps_env->env[conidx]->evt_cfg & GLPS_RACP_IND_CFG) == 0) {\n      status = PRF_ERR_IND_DISABLED;\n      // There is no more RACP on going\n      GLPS_CLEAR(conidx, RACP_ON_GOING);\n    } else {\n      struct glp_racp_rsp racp_rsp;\n      // Allocate the GATT indication message\n      struct gattc_send_evt_cmd *racp_rsp_val = KE_MSG_ALLOC_DYN(\n          GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n          gattc_send_evt_cmd, GLP_REC_ACCESS_CTRL_MAX_LEN);\n\n      // Fill in the parameter structure\n      racp_rsp_val->operation = GATTC_INDICATE;\n      racp_rsp_val->handle = GLPS_HANDLE(GLS_IDX_REC_ACCESS_CTRL_VAL);\n\n      // Number of stored record calculation succeed.\n      if ((param->op_code == GLP_REQ_REP_NUM_OF_STRD_RECS) &&\n          (param->status == GLP_RSP_SUCCESS)) {\n        racp_rsp.op_code = GLP_REQ_NUM_OF_STRD_RECS_RSP;\n        racp_rsp.operand.num_of_record = param->num_of_record;\n      }\n      // Send back status information\n      else {\n        racp_rsp.op_code = GLP_REQ_RSP_CODE;\n        racp_rsp.operand.rsp.op_code_req = param->op_code;\n        racp_rsp.operand.rsp.status = param->status;\n      }\n\n      // pack measured value in database\n      racp_rsp_val->length = glps_pack_racp_rsp(racp_rsp_val->value, &racp_rsp);\n\n      // There is no more RACP on going\n      GLPS_CLEAR(conidx, RACP_ON_GOING);\n      status = GAP_ERR_NO_ERROR;\n\n      // Store that response sent by application\n      GLPS_SET(conidx, RACP_RSP_SENT_BY_APP);\n\n      // send RACP Response indication\n      ke_msg_send(racp_rsp_val);\n    }\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // send completed information about request failed\n    struct glps_cmp_evt *cmp_evt =\n        KE_MSG_ALLOC(GLPS_CMP_EVT, src_id, dest_id, glps_cmp_evt);\n    cmp_evt->request = GLPS_SEND_RACP_RSP_IND_CMP;\n    cmp_evt->status = status;\n    ke_msg_send(cmp_evt);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_att_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_att_info_req_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == GLPS_IDLE) {\n    struct glps_env_tag *glps_env = PRF_ENV_GET(GLPS, glps);\n    uint8_t att_idx = GLPS_IDX(param->handle);\n    struct gattc_att_info_cfm *cfm;\n\n    // Send write response\n    cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n    cfm->handle = param->handle;\n\n    // check if it's a client configuration char\n    if ((att_idx == GLS_IDX_MEAS_NTF_CFG) ||\n        (att_idx == GLS_IDX_MEAS_CTX_NTF_CFG) ||\n        (att_idx == GLS_IDX_REC_ACCESS_CTRL_IND_CFG)) {\n      // CCC attribute length = 2\n      cfm->length = 2;\n      cfm->status = GAP_ERR_NO_ERROR;\n    } else if (att_idx == GLS_IDX_REC_ACCESS_CTRL_VAL) {\n      // force length to zero to reject any write starting from something != 0\n      cfm->length = 0;\n      cfm->status = GAP_ERR_NO_ERROR;\n    }\n    // not expected request\n    else {\n      cfm->length = 0;\n      cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATT_CODE_ATT_WR_CMD_IND message.\n * The handler compares the new values with current ones and notifies them if\n *they changed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(ke_msg_id_t const msgid,\n                                         struct gattc_write_req_ind *param,\n                                         ke_task_id_t const dest_id,\n                                         ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  struct glp_racp_rsp racp_rsp;\n  racp_rsp.op_code = 0;\n\n  if (state == GLPS_IDLE) {\n    uint8_t status = GAP_ERR_NO_ERROR;\n    struct gattc_write_cfm *cfm;\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct glps_env_tag *glps_env = PRF_ENV_GET(GLPS, glps);\n    uint8_t att_idx = GLPS_IDX(param->handle);\n\n    if (param->offset != 0) {\n      status = ATT_ERR_UNLIKELY_ERR;\n    }\n    // check if it's a client configuration char\n    else if ((att_idx == GLS_IDX_MEAS_NTF_CFG) ||\n             (att_idx == GLS_IDX_MEAS_CTX_NTF_CFG) ||\n             (att_idx == GLS_IDX_REC_ACCESS_CTRL_IND_CFG)) {\n      uint16_t cli_cfg;\n      uint8_t evt_mask = GLPS_IND_NTF_EVT(att_idx);\n\n      // get client configuration\n      cli_cfg = co_read16(&(param->value));\n\n      // stop indication/notification\n      if (cli_cfg == PRF_CLI_STOP_NTFIND) {\n        glps_env->env[conidx]->evt_cfg &= ~evt_mask;\n      }\n      // start indication/notification (check that char value accept it)\n      else if (((att_idx == GLS_IDX_REC_ACCESS_CTRL_IND_CFG) &&\n                (cli_cfg == PRF_CLI_START_IND)) ||\n               ((att_idx != GLS_IDX_REC_ACCESS_CTRL_IND_CFG) &&\n                (cli_cfg == PRF_CLI_START_NTF))) {\n        glps_env->env[conidx]->evt_cfg |= evt_mask;\n      }\n      // improper value\n      else {\n        status = GLP_ERR_IMPROPER_CLI_CHAR_CFG;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Inform APP of configuration change\n        struct glps_cfg_indntf_ind *ind = KE_MSG_ALLOC(\n            GLPS_CFG_INDNTF_IND, prf_dst_task_get(&(glps_env->prf_env), conidx),\n            dest_id, glps_cfg_indntf_ind);\n        ind->evt_cfg = glps_env->env[conidx]->evt_cfg;\n        ke_msg_send(ind);\n      }\n    }\n\n    else if (att_idx == GLS_IDX_REC_ACCESS_CTRL_VAL) {\n      if ((glps_env->env[conidx]->evt_cfg & GLPS_RACP_IND_CFG) == 0) {\n        // do nothing since indication not enabled for this characteristic\n        status = GLP_ERR_IMPROPER_CLI_CHAR_CFG;\n      }\n      // If a request is on going\n      else if (GLPS_IS(conidx, RACP_ON_GOING)) {\n        // if it's an abort command, execute it.\n        if ((param->offset == 0) && (param->value[0] == GLP_REQ_ABORT_OP)) {\n          // forward abort operation to application\n          struct glps_racp_req_rcv_ind *req =\n              KE_MSG_ALLOC(GLPS_RACP_REQ_RCV_IND,\n                           prf_dst_task_get(&(glps_env->prf_env), conidx),\n                           dest_id, glps_racp_req_rcv_ind);\n          req->racp_req.op_code = GLP_REQ_ABORT_OP;\n          req->racp_req.filter.operator= 0;\n          ke_msg_send(req);\n        } else {\n          // do nothing since a procedure already in progress\n          status = GLP_ERR_PROC_ALREADY_IN_PROGRESS;\n        }\n      } else {\n        struct glp_racp_req racp_req;\n        // unpack record access control point value\n        uint8_t reqstatus =\n            glps_unpack_racp_req(param->value, param->length, &racp_req);\n\n        // check unpacked status\n        switch (reqstatus) {\n        case PRF_APP_ERROR: {\n          /* Request failed */\n          status = ATT_ERR_UNLIKELY_ERR;\n        } break;\n        case GAP_ERR_NO_ERROR: {\n          // check wich request shall be send to api task\n          switch (racp_req.op_code) {\n          case GLP_REQ_REP_STRD_RECS:\n          case GLP_REQ_DEL_STRD_RECS:\n          case GLP_REQ_REP_NUM_OF_STRD_RECS: {\n            // forward request operation to application\n            struct glps_racp_req_rcv_ind *req =\n                KE_MSG_ALLOC(GLPS_RACP_REQ_RCV_IND,\n                             prf_dst_task_get(&(glps_env->prf_env), conidx),\n                             dest_id, glps_racp_req_rcv_ind);\n            req->racp_req = racp_req;\n            // RACP on going.\n            GLPS_SET(conidx, RACP_ON_GOING);\n            ke_msg_send(req);\n          } break;\n          case GLP_REQ_ABORT_OP: {\n            // nothing to abort, send an error message.\n            racp_rsp.op_code = GLP_REQ_RSP_CODE;\n            racp_rsp.operand.rsp.op_code_req = racp_req.op_code;\n            racp_rsp.operand.rsp.status = GLP_RSP_ABORT_UNSUCCESSFUL;\n          } break;\n          default: {\n            // nothing to do since it's handled during unpack\n          } break;\n          }\n        } break;\n        default: {\n          /* There is an error in record access control request, inform peer\n           * device that request is incorrect. */\n          racp_rsp.op_code = GLP_REQ_RSP_CODE;\n          racp_rsp.operand.rsp.op_code_req = racp_req.op_code;\n          racp_rsp.operand.rsp.status = reqstatus;\n        } break;\n        }\n      }\n    }\n    // not expected request\n    else {\n      status = ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n\n    // Send write response\n    cfm = KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n    cfm->handle = param->handle;\n    cfm->status = status;\n    ke_msg_send(cfm);\n\n    /* The racp response has to be sent - after write confirm */\n    if (racp_rsp.op_code != 0) {\n      // Allocate the GATT indication message\n      struct gattc_send_evt_cmd *racp_rsp_val = KE_MSG_ALLOC_DYN(\n          GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n          gattc_send_evt_cmd, GLP_REC_ACCESS_CTRL_MAX_LEN);\n\n      racp_rsp_val->operation = GATTC_INDICATE;\n      racp_rsp_val->handle = param->handle;\n      // pack measured value in database\n      racp_rsp_val->length = glps_pack_racp_rsp(racp_rsp_val->value, &racp_rsp);\n\n      // Store that response internally sent by profile\n      GLPS_CLEAR(conidx, RACP_RSP_SENT_BY_APP);\n\n      // send RACP Response indication\n      ke_msg_send(racp_rsp_val);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  ke_state_t state = ke_state_get(dest_id);\n\n  if (state == GLPS_IDLE) {\n    // Send value to peer device.\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, sizeof(uint16_t));\n    cfm->handle = param->handle;\n    cfm->status = ATT_ERR_NO_ERROR;\n    cfm->length = sizeof(uint16_t);\n\n    // Get the address of the environment\n    struct glps_env_tag *glps_env = PRF_ENV_GET(GLPS, glps);\n    uint8_t att_idx = GLPS_IDX(param->handle);\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    switch (att_idx) {\n    case GLS_IDX_MEAS_NTF_CFG: {\n      co_write16p(cfm->value,\n                  (glps_env->env[conidx]->evt_cfg & GLPS_MEAS_NTF_CFG)\n                      ? PRF_CLI_START_NTF\n                      : PRF_CLI_STOP_NTFIND);\n    } break;\n    case GLS_IDX_MEAS_CTX_NTF_CFG: {\n      co_write16p(cfm->value,\n                  (glps_env->env[conidx]->evt_cfg & GLPS_MEAS_CTX_NTF_CFG)\n                      ? PRF_CLI_START_NTF\n                      : PRF_CLI_STOP_NTFIND);\n    } break;\n    case GLS_IDX_REC_ACCESS_CTRL_IND_CFG: {\n      co_write16p(cfm->value,\n                  (glps_env->env[conidx]->evt_cfg & GLPS_RACP_IND_CFG)\n                      ? PRF_CLI_START_IND\n                      : PRF_CLI_STOP_NTFIND);\n    } break;\n    case GLS_IDX_FEATURE_VAL: {\n      co_write16p(cfm->value, glps_env->features);\n    } break;\n    default: {\n      cfm->status = ATT_ERR_INSUFF_AUTHOR;\n    } break;\n    }\n\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY and GATT_INDICATE message\n *meaning that Measurement notification/indication has been correctly sent to\n *peer device\n *\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == GLPS_IDLE) {\n    // Get the address of the environment\n    struct glps_env_tag *glps_env = PRF_ENV_GET(GLPS, glps);\n\n    switch (param->operation) {\n    case GATTC_NOTIFY: {\n      /* send message indication if an error occurs,\n       * or if all notification complete event has been received\n       */\n      if ((param->status != GAP_ERR_NO_ERROR) ||\n          (!(GLPS_IS(conidx, MEAS_CTX_SENT))) ||\n          (GLPS_IS(conidx, MEAS_CTX_SENT) && (GLPS_IS(conidx, MEAS_SENT)))) {\n        GLPS_CLEAR(conidx, SENDING_MEAS);\n\n        // send completed information to APP task\n        struct glps_cmp_evt *cmp_evt = KE_MSG_ALLOC(\n            GLPS_CMP_EVT, prf_dst_task_get(&(glps_env->prf_env), conidx),\n            dest_id, glps_cmp_evt);\n\n        cmp_evt->request = GLPS_SEND_MEAS_REQ_NTF_CMP;\n        cmp_evt->status = param->status;\n\n        ke_msg_send(cmp_evt);\n      } else {\n        // Measurement value notification sent\n        GLPS_SET(conidx, MEAS_SENT);\n      }\n    } break;\n    case GATTC_INDICATE: {\n      // verify if indication should be conveyed to application task\n      if (GLPS_IS(conidx, RACP_RSP_SENT_BY_APP)) {\n        // send completed information to APP task\n        struct glps_cmp_evt *cmp_evt = KE_MSG_ALLOC(\n            GLPS_CMP_EVT, prf_dst_task_get(&(glps_env->prf_env), conidx),\n            dest_id, glps_cmp_evt);\n\n        cmp_evt->request = GLPS_SEND_RACP_RSP_IND_CMP;\n        cmp_evt->status = param->status;\n\n        ke_msg_send(cmp_evt);\n      }\n\n      GLPS_CLEAR(conidx, RACP_RSP_SENT_BY_APP);\n    } break;\n\n    default:\n      break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(glps){\n    {GLPS_ENABLE_REQ, (ke_msg_func_t)glps_enable_req_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GLPS_SEND_MEAS_WITH_CTX_CMD, (ke_msg_func_t)glps_meas_send_req_handler},\n    {GLPS_SEND_MEAS_WITHOUT_CTX_CMD, (ke_msg_func_t)glps_meas_send_req_handler},\n    {GLPS_SEND_RACP_RSP_CMD, (ke_msg_func_t)glps_send_racp_rsp_cmd_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid glps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct glps_env_tag *glps_env = PRF_ENV_GET(GLPS, glps);\n\n  task_desc->msg_handler_tab = glps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(glps_msg_handler_tab);\n  task_desc->state = glps_env->state;\n  task_desc->idx_max = GLPS_IDX_MAX;\n}\n\n#endif /* #if (BLE_GL_SENSOR) */\n\n/// @} GLPSTASK\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogp_common.h",
    "content": "#ifndef _HOGP_COMMON_H_\n#define _HOGP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HOGP HID Over GATT Profile\n * @ingroup PROFILE\n * @brief HID Over GATT Profile\n *\n * The HOGP module is the responsible block for implementing the HID Over GATT Profile\n * functionalities in the BLE Host.\n *\n * The HID Over GATT Profile defines the functionality required to allow HID reports and\n * HID data to be exchanged between a HID Device and a HID Host\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"prf_types.h\"\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// HID Information bit values\nenum hogp_info_bit\n{\n    /// Device capable of providing wake-up signal to a HID host\n    HIDS_REMOTE_WAKE_CAPABLE           = 0x01,\n    /// Normally connectable support bit\n    HIDS_NORM_CONNECTABLE              = 0x02,\n};\n\n/// HID Control Point Characteristic value keys\nenum hogp_ctnl_pt\n{\n    /// Suspend\n    HOGP_CTNL_PT_SUSPEND            = 0x00,\n    /// Exit suspend\n    HOGP_CTNL_PT_EXIT_SUSPEND,\n};\n\n/// Protocol Mode Char. value Keys\nenum hogp_boot_prot_mode\n{\n    /// Boot Protocol Mode\n    HOGP_BOOT_PROTOCOL_MODE         = 0x00,\n    /// Report Protocol Mode\n    HOGP_REPORT_PROTOCOL_MODE,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Report Reference structure\nstruct hids_report_ref\n{\n    ///Report ID\n    uint8_t report_id;\n    ///Report Type\n    uint8_t report_type;\n};\n\n/// HID Information structure\nstruct hids_hid_info\n{\n    /// bcdHID\n    uint16_t bcdHID;\n    /// bCountryCode\n    uint8_t  bCountryCode;\n    /// Flags\n    uint8_t  flags;\n};\n\n\n\n/// @} hogp_common\n\n#endif /* _HOGP_COMMON_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogpbh/api/hogpbh_task.h",
    "content": "#ifndef _HOGPBH_TASK_H_\n#define _HOGPBH_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HOGPBHTASK HID Over GATT Profile Boot Host Task\n * @ingroup HOGPBH\n * @brief HID Over GATT Profile Boot Host Task\n *\n * The HOGPBHTASK is responsible for handling the messages coming in and out of the\n * @ref HOGPBH monitor block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n#include \"hogp_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximal number of hids instances that can be handled\n#define HOGPBH_NB_HIDS_INST_MAX              (2)\n\n/// Maximal Length of Boot Report Char. Value\n#define HOGPBH_BOOT_REPORT_MAX_LEN           (8)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\nenum hogpbh_msg_id\n{\n    /// Start the HID Over GATT profile - at connection\n    HOGPBH_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_HOGPBH),\n    ///Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    HOGPBH_ENABLE_RSP,\n\n    /// Read Characteristic Value Request\n    HOGPBH_READ_INFO_REQ,\n    /// Read Characteristic Value Request\n    HOGPBH_READ_INFO_RSP,\n\n    /// Write/Configure peer device attribute Request\n    HOGPBH_WRITE_REQ,\n    /// Write/Configure peer device attribute Response\n    HOGPBH_WRITE_RSP,\n\n    /// Boot Report value send to APP (after Read Request or Notification)\n    HOGPBH_BOOT_REPORT_IND,\n};\n\n\n/// Characteristics\nenum hogpbh_chars\n{\n    /// Protocol Mode\n    HOGPBH_CHAR_PROTO_MODE,\n    /// Boot Keyboard Input Report\n    HOGPBH_CHAR_BOOT_KB_IN_REPORT,\n    /// Boot Keyboard Output Report\n    HOGPBH_CHAR_BOOT_KB_OUT_REPORT,\n    /// Boot Mouse Input Report\n    HOGPBH_CHAR_BOOT_MOUSE_IN_REPORT,\n\n    HOGPBH_CHAR_MAX,\n};\n\n\n/// Characteristic descriptors\nenum hogpbh_descs\n{\n    /// Boot Keyboard Input Report Client Config\n    HOGPBH_DESC_BOOT_KB_IN_REPORT_CFG,\n    /// Boot Mouse Input Report Client Config\n    HOGPBH_DESC_BOOT_MOUSE_IN_REPORT_CFG,\n\n    HOGPBH_DESC_MAX,\n};\n\n\n/// Peer HID service info that can be read/write\nenum hogpbh_info\n{\n    /// Protocol Mode\n    HOGPBH_PROTO_MODE,\n    /// Boot Keyboard Input Report\n    HOGPBH_BOOT_KB_IN_REPORT,\n    /// Boot Keyboard Output Report\n    HOGPBH_BOOT_KB_OUT_REPORT,\n    /// Boot Mouse Input Report\n    HOGPBH_BOOT_MOUSE_IN_REPORT,\n\n    /// Boot Keyboard Input Report Client Config\n    HOGPBH_BOOT_KB_IN_NTF_CFG,\n    /// Boot Mouse Input Report Client Config\n    HOGPBH_BOOT_MOUSE_IN_NTF_CFG,\n\n    HOGPBH_INFO_MAX,\n};\n\n/*\n * APIs Structure\n ****************************************************************************************\n */\n\n///Structure containing the characteristics handles, value handles and descriptors\nstruct hogpbh_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// characteristic info:\n    ///  - Protocol Mode\n    ///  - Boot Keyboard Input Report\n    ///  - Boot Keyboard Output Report\n    ///  - Boot Mouse Input Report\n    struct prf_char_inf chars[HOGPBH_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - Boot Keyboard Input Client Cfg\n    ///  - Boot Mouse Input Client Cfg\n    struct prf_char_desc_inf descs[HOGPBH_DESC_MAX];\n};\n\n/// Parameters of the @ref HOGPBH_ENABLE_REQ message\nstruct hogpbh_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n    /// Number of HIDS instances\n    uint8_t hids_nb;\n    /// Existing handle values hids\n    struct hogpbh_content hids[HOGPBH_NB_HIDS_INST_MAX];\n};\n\n/// Parameters of the @ref HOGPBH_ENABLE_RSP message\nstruct hogpbh_enable_rsp\n{\n    ///status\n    uint8_t status;\n    /// Number of HIDS instances\n    uint8_t hids_nb;\n    /// Existing handle values hids\n    struct hogpbh_content hids[HOGPBH_NB_HIDS_INST_MAX];\n};\n\n/// HID boot report info\nstruct hogpbh_boot_report\n{\n    /// Report Length\n    uint8_t length;\n    /// Boot Report value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n\n/// Information data\nunion hogpbh_data\n{\n    /// Protocol Mode\n    ///  - info = HOGPBH_PROTO_MODE\n    uint8_t proto_mode;\n    ///Notification Configuration Value\n    ///  - info = HOGPBH_BOOT_KB_IN_NTF_CFG\n    ///  - info = HOGPBH_BOOT_MOUSE_IN_NTF_CFG\n    uint16_t ntf_cfg;\n\n    /// Boot report information\n    ///  - info = HOGPBH_BOOT_KB_IN_REPORT\n    ///  - info = HOGPBH_BOOT_KB_OUT_REPORT\n    ///  - info = HOGPBH_BOOT_MOUSE_IN_REPORT\n    struct hogpbh_boot_report report;\n};\n\n\n\n///Parameters of the @ref HOGPBH_READ_INFO_REQ message\nstruct hogpbh_read_info_req\n{\n    ///Characteristic info @see enum hogpbh_info\n    uint8_t info;\n    /// HID Service Instance - From 0 to HOGPBH_NB_HIDS_INST_MAX-1\n    uint8_t hid_idx;\n};\n\n///Parameters of the @ref HOGPBH_READ_INFO_RSP message\nstruct hogpbh_read_info_rsp\n{\n    /// status of the request\n    uint8_t status;\n    ///Characteristic info @see enum hogpbh_info\n    uint8_t info;\n    /// HID Service Instance - From 0 to HOGPBH_NB_HIDS_INST_MAX-1\n    uint8_t hid_idx;\n    /// Information data\n    union hogpbh_data data;\n};\n\n\n///Parameters of the @ref HOGPBH_WRITE_REQ message\nstruct hogpbh_write_req\n{\n    ///Characteristic info @see enum hogpbh_info\n    uint8_t info;\n    /// HID Service Instance - From 0 to HOGPBH_NB_HIDS_INST_MAX-1\n    uint8_t hid_idx;\n    /// Write type ( Write without Response True or Write Request)\n    /// - only valid for HOGPBH_BOOT_KB_OUT_REPORT\n    bool    wr_cmd;\n    /// Information data\n    union hogpbh_data data;\n};\n\n\n///Parameters of the @ref HOGPBH_WRITE_RSP message\nstruct hogpbh_write_rsp\n{\n    /// status of the request\n    uint8_t status;\n    ///Characteristic info @see enum hogpbh_info\n    uint8_t info;\n    /// HID Service Instance - From 0 to HOGPBH_NB_HIDS_INST_MAX-1\n    uint8_t hid_idx;\n};\n\n\n///Parameters of the @ref HOGPBH_BOOT_REPORT_IND message\nstruct hogpbh_boot_report_ind\n{\n    ///Characteristic info @see enum hogpbh_info\n    uint8_t info;\n    /// HIDS Instance\n    uint8_t hid_idx;\n    /// Report data\n    struct hogpbh_boot_report report;\n};\n\n/// @} HOGPBHTASK\n\n#endif /* _HOGPBH_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogpbh/src/hogpbh.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HOGPBH\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_HID_BOOT_HOST)\n\n#include \"co_math.h\"\n#include \"gap.h\"\n#include \"hogpbh.h\"\n#include \"hogpbh_task.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the HOGPBH module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of datahide (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t hogpbh_init(struct prf_task_env *env, uint16_t *start_hdl,\n                           uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct hogpbh_env_tag *hogpbh_env = (struct hogpbh_env_tag *)ke_malloc(\n      sizeof(struct hogpbh_env_tag), KE_MEM_ATT_DB);\n\n  // allocate HOGPBH required environment variable\n  env->env = (prf_env_t *)hogpbh_env;\n\n  hogpbh_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  hogpbh_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_HOGPBH;\n  hogpbh_task_init(&(env->desc));\n\n  for (idx = 0; idx < HOGPBH_IDX_MAX; idx++) {\n    hogpbh_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), HOGPBH_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the HOGPBH module - due to a reset for instance.\n * This function clean-up allocated memory (attribute datahide is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void hogpbh_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct hogpbh_env_tag *hogpbh_env = (struct hogpbh_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < HOGPBH_IDX_MAX; idx++) {\n    if (hogpbh_env->env[idx] != NULL) {\n      if (hogpbh_env->env[idx]->operation != NULL) {\n        ke_free(hogpbh_env->env[idx]->operation);\n      }\n      ke_free(hogpbh_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(hogpbh_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void hogpbh_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put HID Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), HOGPBH_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void hogpbh_cleanup(struct prf_task_env *env, uint8_t conidx,\n                           uint8_t reason) {\n  struct hogpbh_env_tag *hogpbh_env = (struct hogpbh_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (hogpbh_env->env[conidx] != NULL) {\n    if (hogpbh_env->env[conidx]->operation != NULL) {\n      ke_free(hogpbh_env->env[conidx]->operation);\n    }\n    ke_free(hogpbh_env->env[conidx]);\n    hogpbh_env->env[conidx] = NULL;\n  }\n\n  /* Put HID Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), HOGPBH_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// HOGPBH Task interface required by profile manager\nconst struct prf_task_cbs hogpbh_itf = {\n    hogpbh_init,\n    hogpbh_destroy,\n    hogpbh_create,\n    hogpbh_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *hogpbh_prf_itf_get(void) { return &hogpbh_itf; }\n\nvoid hogpbh_enable_rsp_send(struct hogpbh_env_tag *hogpbh_env, uint8_t conidx,\n                            uint8_t status) {\n  // Counter\n  uint8_t svc_inst;\n\n  // Send APP the details of the discovered attributes on HOGPBH\n  struct hogpbh_enable_rsp *rsp = KE_MSG_ALLOC(\n      HOGPBH_ENABLE_RSP, prf_dst_task_get(&(hogpbh_env->prf_env), conidx),\n      prf_src_task_get(&(hogpbh_env->prf_env), conidx), hogpbh_enable_rsp);\n  rsp->status = status;\n  rsp->hids_nb = 0;\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->hids_nb = hogpbh_env->env[conidx]->hids_nb;\n\n    for (svc_inst = 0; svc_inst < co_min(hogpbh_env->env[conidx]->hids_nb,\n                                         HOGPBH_NB_HIDS_INST_MAX);\n         svc_inst++) {\n      rsp->hids[svc_inst] = hogpbh_env->env[conidx]->hids[svc_inst];\n\n      // Register HOGPBH task in gatt for indication/notifications\n      prf_register_atthdl2gatt(&(hogpbh_env->prf_env), conidx,\n                               &hogpbh_env->env[conidx]->hids[svc_inst].svc);\n    }\n  }\n\n  ke_msg_send(rsp);\n}\n\n#endif /* (BLE_HID_BOOT_HOST) */\n\n/// @} HOGPBH\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogpbh/src/hogpbh.h",
    "content": "#ifndef _HOGPBH_H_\n#define _HOGPBH_H_\n\n\n/**\n ****************************************************************************************\n * @addtogroup HOGPBH HID Over GATT Profile Client\n * @ingroup HOGP\n * @brief HID Over GATT Profile Client\n * @{\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#if (BLE_HID_BOOT_HOST)\n\n#include \"hogp_common.h\"\n#include \"ke_task.h\"\n#include \"hogpbh_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"prf.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n///Maximum number of HID Over GATT Boot Device task instances\n#define HOGPBH_IDX_MAX    (BLE_CONNECTION_MAX)\n\n/*\n * MACROS\n ****************************************************************************************\n*/\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Possible states of the HOGPBH task\nenum hogpbh_state\n{\n    /// Disconnected state\n    HOGPBH_FREE,\n    /// IDLE state\n    HOGPBH_IDLE,\n    /// Busy State\n    HOGPBH_BUSY,\n    /// Number of defined states.\n    HOGPBH_STATE_MAX\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Environment variable for each Connections\nstruct hogpbh_cnx_env\n{\n    /// on-going operation\n    struct ke_msg * operation;\n    ///HIDS characteristics\n    struct hogpbh_content hids[HOGPBH_NB_HIDS_INST_MAX];\n    ///Number of HIDS instances found\n    uint8_t hids_nb;\n};\n\n/// HID Over Gatt Profile Boot Host environment variable\nstruct hogpbh_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct hogpbh_cnx_env* env[HOGPBH_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[HOGPBH_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * GLOBAL FUNCTIONS DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve HID boot host profile interface\n *\n * @return HID boot host profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* hogpbh_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send HID ATT DB discovery results to HOGPBH host.\n ****************************************************************************************\n */\nvoid hogpbh_enable_rsp_send(struct hogpbh_env_tag *hogpbh_env, uint8_t conidx, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid hogpbh_task_init(struct ke_task_desc *task_desc);\n\n\n\n#endif /* (BLE_HID_BOOT_HOST) */\n\n/// @} HOGPBH\n\n#endif /* _HOGPBH_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogpbh/src/hogpbh_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HOGPBHTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_HID_BOOT_HOST)\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"hogp_common.h\"\n#include \"hogpbh.h\"\n#include \"hogpbh_task.h\"\n\n#include \"co_math.h\"\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL VARIABLES DEFINITION\n ****************************************************************************************\n */\n\n/// State machine used to retrieve HID Service characteristics information\nconst struct prf_char_def hogpbh_hids_char[HOGPBH_CHAR_MAX] = {\n    /// Protocol Mode\n    [HOGPBH_CHAR_PROTO_MODE] = {ATT_CHAR_PROTOCOL_MODE, ATT_MANDATORY,\n                                ATT_CHAR_PROP_RD | ATT_CHAR_PROP_WR_NO_RESP},\n    /// Boot Keyboard Input Report\n    [HOGPBH_CHAR_BOOT_KB_IN_REPORT] = {ATT_CHAR_BOOT_KB_IN_REPORT, ATT_OPTIONAL,\n                                       ATT_CHAR_PROP_RD | ATT_CHAR_PROP_NTF},\n    /// Boot Keyboard Output Report\n    [HOGPBH_CHAR_BOOT_KB_OUT_REPORT] = {ATT_CHAR_BOOT_KB_OUT_REPORT,\n                                        ATT_OPTIONAL,\n                                        ATT_CHAR_PROP_RD | ATT_CHAR_PROP_WR},\n    /// Boot Keyboard Output Report\n    [HOGPBH_CHAR_BOOT_MOUSE_IN_REPORT] = {ATT_CHAR_BOOT_MOUSE_IN_REPORT,\n                                          ATT_OPTIONAL,\n                                          ATT_CHAR_PROP_RD | ATT_CHAR_PROP_NTF},\n};\n\n/// State machine used to retrieve HID Service characteristic description\n/// information\nconst struct prf_char_desc_def hogpbh_hids_char_desc[HOGPBH_DESC_MAX] = {\n    /// Boot Keyboard Input Report Client Config\n    [HOGPBH_DESC_BOOT_KB_IN_REPORT_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                           ATT_OPTIONAL,\n                                           HOGPBH_CHAR_BOOT_KB_IN_REPORT},\n    /// Boot Mouse Input Report Client Config\n    [HOGPBH_DESC_BOOT_MOUSE_IN_REPORT_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                              ATT_OPTIONAL,\n                                              HOGPBH_CHAR_BOOT_MOUSE_IN_REPORT},\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPBH_ENABLE_REQ message.\n * The handler enables the HID Over GATT Profile Boot Host Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogpbh_enable_req_handler(ke_msg_id_t const msgid,\n                                       struct hogpbh_enable_req const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  int msg_status = KE_MSG_CONSUMED;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Battery service Client Role Task Environment\n  struct hogpbh_env_tag *hogpbh_env = PRF_ENV_GET(HOGPBH, hogpbh);\n\n  ASSERT_INFO(hogpbh_env != NULL, dest_id, src_id);\n  if ((state == HOGPBH_IDLE) && (hogpbh_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    hogpbh_env->env[conidx] = (struct hogpbh_cnx_env *)ke_malloc(\n        sizeof(struct hogpbh_cnx_env), KE_MEM_ATT_DB);\n    memset(hogpbh_env->env[conidx], 0, sizeof(struct hogpbh_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering HID on peer\n      prf_disc_svc_send(&(hogpbh_env->prf_env), conidx, ATT_SVC_HID);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, HOGPBH_BUSY);\n      hogpbh_env->env[conidx]->operation = ke_param2msg(param);\n      msg_status = KE_MSG_NO_FREE;\n    }\n    // normal connection, get saved att details\n    else {\n      hogpbh_env->env[conidx]->hids_nb = param->hids_nb;\n      memcpy(&(hogpbh_env->env[conidx]->hids[0]), &(param->hids[0]),\n             sizeof(struct hogpbh_content) * HOGPBH_NB_HIDS_INST_MAX);\n\n      // send APP confirmation that can start normal connection to TH\n      hogpbh_enable_rsp_send(hogpbh_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  } else if (state != HOGPBH_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    hogpbh_enable_rsp_send(hogpbh_env, conidx, status);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == HOGPBH_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct hogpbh_env_tag *hogpbh_env = PRF_ENV_GET(HOGPBH, hogpbh);\n\n    ASSERT_INFO(hogpbh_env != NULL, dest_id, src_id);\n    ASSERT_INFO(hogpbh_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (hogpbh_env->env[conidx]->hids_nb < HOGPBH_NB_HIDS_INST_MAX) {\n      // Retrieve HID characteristics\n      prf_extract_svc_info(ind, HOGPBH_CHAR_MAX, &hogpbh_hids_char[0],\n                           &(hogpbh_env->env[conidx]\n                                 ->hids[hogpbh_env->env[conidx]->hids_nb]\n                                 .chars[0]),\n                           HOGPBH_DESC_MAX, &hogpbh_hids_char_desc[0],\n                           &(hogpbh_env->env[conidx]\n                                 ->hids[hogpbh_env->env[conidx]->hids_nb]\n                                 .descs[0]));\n\n      // Store service range\n      hogpbh_env->env[conidx]->hids[hogpbh_env->env[conidx]->hids_nb].svc.shdl =\n          ind->start_hdl;\n      hogpbh_env->env[conidx]->hids[hogpbh_env->env[conidx]->hids_nb].svc.ehdl =\n          ind->end_hdl;\n    }\n\n    hogpbh_env->env[conidx]->hids_nb++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPBH_READ_INFO_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogpbh_read_info_req_handler(\n    ke_msg_id_t const msgid, struct hogpbh_read_info_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == HOGPBH_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct hogpbh_env_tag *hogpbh_env = PRF_ENV_GET(HOGPBH, hogpbh);\n    ASSERT_INFO(hogpbh_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (hogpbh_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    }\n    // check parameter range\n    else if (param->hid_idx > hogpbh_env->env[conidx]->hids_nb) {\n      status = PRF_ERR_INVALID_PARAM;\n    } else {\n      uint16_t handle = ATT_INVALID_HANDLE;\n      status = PRF_ERR_INEXISTENT_HDL;\n\n      // check requested info\n      switch (param->info) {\n      /// Protocol Mode\n      case HOGPBH_PROTO_MODE: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPBH_CHAR_PROTO_MODE]\n                     .val_hdl;\n      } break;\n      /// Boot Keyboard Input Report\n      case HOGPBH_BOOT_KB_IN_REPORT: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPBH_CHAR_BOOT_KB_IN_REPORT]\n                     .val_hdl;\n      } break;\n      /// Boot Keyboard Output Report\n      case HOGPBH_BOOT_KB_OUT_REPORT: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPBH_CHAR_BOOT_KB_OUT_REPORT]\n                     .val_hdl;\n      } break;\n      /// Boot Mouse Input Report\n      case HOGPBH_BOOT_MOUSE_IN_REPORT: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPBH_CHAR_BOOT_MOUSE_IN_REPORT]\n                     .val_hdl;\n      } break;\n      /// Boot Keyboard Input Report Client Config\n      case HOGPBH_BOOT_KB_IN_NTF_CFG: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .descs[HOGPBH_DESC_BOOT_KB_IN_REPORT_CFG]\n                     .desc_hdl;\n      } break;\n      /// Boot Mouse Input Report Client Config\n      case HOGPBH_BOOT_MOUSE_IN_NTF_CFG: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .descs[HOGPBH_DESC_BOOT_MOUSE_IN_REPORT_CFG]\n                     .desc_hdl;\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      if (handle != ATT_INVALID_HANDLE) {\n        status = GAP_ERR_NO_ERROR;\n        // read information\n        prf_read_char_send(\n            &(hogpbh_env->prf_env), conidx,\n            hogpbh_env->env[conidx]->hids[param->hid_idx].svc.shdl,\n            hogpbh_env->env[conidx]->hids[param->hid_idx].svc.ehdl, handle);\n\n        // store context of request and go into busy state\n        hogpbh_env->env[conidx]->operation = ke_param2msg(param);\n        ke_state_set(dest_id, HOGPBH_BUSY);\n        msg_status = KE_MSG_NO_FREE;\n      }\n    }\n  }\n  // process message later\n  else if (state == HOGPBH_BUSY) {\n    status = GAP_ERR_NO_ERROR;\n    msg_status = KE_MSG_SAVED;\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct hogpbh_read_info_rsp *rsp = KE_MSG_ALLOC(\n        HOGPBH_READ_INFO_RSP, src_id, dest_id, hogpbh_read_info_rsp);\n    // set error status\n    rsp->status = status;\n    rsp->info = param->info;\n    rsp->hid_idx = param->hid_idx;\n\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPBH_WRITE_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogpbh_write_req_handler(ke_msg_id_t const msgid,\n                                      struct hogpbh_write_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == HOGPBH_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct hogpbh_env_tag *hogpbh_env = PRF_ENV_GET(HOGPBH, hogpbh);\n    ASSERT_INFO(hogpbh_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (hogpbh_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    }\n    // check parameter range\n    else if ((param->hid_idx > hogpbh_env->env[conidx]->hids_nb) ||\n             (param->info > HOGPBH_INFO_MAX) ||\n             ((param->info >= HOGPBH_BOOT_KB_IN_NTF_CFG) &&\n              (param->data.ntf_cfg > PRF_CLI_START_NTF))) {\n      status = PRF_ERR_INVALID_PARAM;\n    } else {\n      uint16_t handle = ATT_INVALID_HANDLE;\n      status = PRF_ERR_INEXISTENT_HDL;\n\n      // check requested info\n      switch (param->info) {\n      // Protocol Mode\n      case HOGPBH_PROTO_MODE: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPBH_CHAR_PROTO_MODE]\n                     .val_hdl;\n        prf_gatt_write(&hogpbh_env->prf_env, conidx, handle,\n                       (uint8_t *)¶m->data.proto_mode, 1,\n                       GATTC_WRITE_NO_RESPONSE);\n      } break;\n      // Boot Keyboard Input Report\n      case HOGPBH_BOOT_KB_IN_REPORT: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPBH_CHAR_BOOT_KB_IN_REPORT]\n                     .val_hdl;\n        prf_gatt_write(&hogpbh_env->prf_env, conidx, handle,\n                       (uint8_t *)param->data.report.value,\n                       param->data.report.length, GATTC_WRITE);\n      } break;\n      // Boot Keyboard Output Report\n      case HOGPBH_BOOT_KB_OUT_REPORT: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPBH_CHAR_BOOT_KB_OUT_REPORT]\n                     .val_hdl;\n        prf_gatt_write(&hogpbh_env->prf_env, conidx, handle,\n                       (uint8_t *)param->data.report.value,\n                       param->data.report.length,\n                       param->wr_cmd ? GATTC_WRITE_NO_RESPONSE : GATTC_WRITE);\n      } break;\n      // Boot Mouse Input Report\n      case HOGPBH_BOOT_MOUSE_IN_REPORT: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPBH_CHAR_BOOT_MOUSE_IN_REPORT]\n                     .val_hdl;\n        prf_gatt_write(&hogpbh_env->prf_env, conidx, handle,\n                       (uint8_t *)param->data.report.value,\n                       param->data.report.length, GATTC_WRITE);\n      } break;\n      // Boot Keyboard Input Report Client Config\n      case HOGPBH_BOOT_KB_IN_NTF_CFG: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .descs[HOGPBH_DESC_BOOT_KB_IN_REPORT_CFG]\n                     .desc_hdl;\n        prf_gatt_write_ntf_ind(&hogpbh_env->prf_env, conidx, handle,\n                               param->data.ntf_cfg);\n      } break;\n      // Boot Mouse Input Report Client Config\n      case HOGPBH_BOOT_MOUSE_IN_NTF_CFG: {\n        handle = hogpbh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .descs[HOGPBH_DESC_BOOT_MOUSE_IN_REPORT_CFG]\n                     .desc_hdl;\n        prf_gatt_write_ntf_ind(&hogpbh_env->prf_env, conidx, handle,\n                               param->data.ntf_cfg);\n      } break;\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      if (handle != ATT_INVALID_HANDLE) {\n        status = GAP_ERR_NO_ERROR;\n\n        // store context of request and go into busy state\n        hogpbh_env->env[conidx]->operation = ke_param2msg(param);\n        ke_state_set(dest_id, HOGPBH_BUSY);\n        msg_status = KE_MSG_NO_FREE;\n      }\n    }\n  }\n  // process message later\n  else if (state == HOGPBH_BUSY) {\n    status = GAP_ERR_NO_ERROR;\n    msg_status = KE_MSG_SAVED;\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct hogpbh_write_rsp *rsp =\n        KE_MSG_ALLOC(HOGPBH_WRITE_RSP, src_id, dest_id, hogpbh_write_rsp);\n    // set error status\n    rsp->status = status;\n    rsp->info = param->info;\n    rsp->hid_idx = param->hid_idx;\n\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct hogpbh_env_tag *hogpbh_env = PRF_ENV_GET(HOGPBH, hogpbh);\n\n  // sanity check\n  if ((state == HOGPBH_BUSY) && (hogpbh_env->env[conidx] != NULL) &&\n      (hogpbh_env->env[conidx]->operation != NULL)) {\n    switch (hogpbh_env->env[conidx]->operation->id) {\n    case HOGPBH_ENABLE_REQ: {\n      uint8_t status = param->status;\n\n      if (param->status == ATT_ERR_NO_ERROR) {\n        // check characteristic validity\n        if (hogpbh_env->env[conidx]->hids_nb > 0) {\n          uint8_t i;\n          for (i = 0; (i < co_min(hogpbh_env->env[conidx]->hids_nb,\n                                  HOGPBH_NB_HIDS_INST_MAX)) &&\n                      (status == GAP_ERR_NO_ERROR);\n               i++) {\n            status = prf_check_svc_char_validity(\n                HOGPBH_CHAR_MAX, hogpbh_env->env[conidx]->hids[i].chars,\n                hogpbh_hids_char);\n\n            // check descriptor validity\n            if (status == GAP_ERR_NO_ERROR) {\n              status = prf_check_svc_char_desc_validity(\n                  HOGPBH_DESC_MAX, hogpbh_env->env[conidx]->hids[i].descs,\n                  hogpbh_hids_char_desc,\n                  hogpbh_env->env[conidx]->hids[i].chars);\n            }\n          }\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n      }\n      hogpbh_enable_rsp_send(hogpbh_env, conidx, status);\n    } break;\n    case HOGPBH_READ_INFO_REQ: {\n      struct hogpbh_read_info_req *req =\n          (struct hogpbh_read_info_req *)ke_msg2param(\n              hogpbh_env->env[conidx]->operation);\n\n      struct hogpbh_read_info_rsp *rsp =\n          KE_MSG_ALLOC(HOGPBH_READ_INFO_RSP,\n                       prf_dst_task_get(&(hogpbh_env->prf_env), conidx),\n                       dest_id, hogpbh_read_info_rsp);\n      // set error status\n      rsp->status = param->status;\n      rsp->hid_idx = req->hid_idx;\n      rsp->info = req->info;\n\n      ke_msg_send(rsp);\n\n    } break;\n    case HOGPBH_WRITE_REQ: {\n      struct hogpbh_write_req *req = (struct hogpbh_write_req *)ke_msg2param(\n          hogpbh_env->env[conidx]->operation);\n\n      struct hogpbh_write_rsp *rsp = KE_MSG_ALLOC(\n          HOGPBH_WRITE_RSP, prf_dst_task_get(&(hogpbh_env->prf_env), conidx),\n          dest_id, hogpbh_write_rsp);\n      // set error status\n      rsp->status = param->status;\n      rsp->hid_idx = req->hid_idx;\n      rsp->info = req->info;\n\n      ke_msg_send(rsp);\n    } break;\n    default: {\n      // Not Expected at all\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    // operation is over - go back to idle state\n    ke_free(hogpbh_env->env[conidx]->operation);\n    hogpbh_env->env[conidx]->operation = NULL;\n    ke_state_set(dest_id, HOGPBH_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == HOGPBH_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct hogpbh_env_tag *hogpbh_env = PRF_ENV_GET(HOGPBH, hogpbh);\n    struct hogpbh_read_info_req *req =\n        (struct hogpbh_read_info_req *)ke_msg2param(\n            hogpbh_env->env[conidx]->operation);\n\n    ASSERT_INFO(hogpbh_env != NULL, dest_id, src_id);\n    ASSERT_INFO(hogpbh_env->env[conidx] != NULL, dest_id, src_id);\n\n    struct hogpbh_read_info_rsp *rsp = KE_MSG_ALLOC_DYN(\n        HOGPBH_READ_INFO_RSP, prf_dst_task_get(&(hogpbh_env->prf_env), conidx),\n        dest_id, hogpbh_read_info_rsp, param->length);\n\n    // set error status\n    rsp->status = GAP_ERR_NO_ERROR;\n    rsp->hid_idx = req->hid_idx;\n    rsp->info = req->info;\n\n    switch (req->info) {\n    /// Protocol Mode\n    case HOGPBH_PROTO_MODE: {\n      rsp->data.proto_mode = param->value[0];\n    } break;\n    /// Boot Keyboard Input Report\n    case HOGPBH_BOOT_KB_IN_REPORT:\n    /// Boot Keyboard Output Report\n    case HOGPBH_BOOT_KB_OUT_REPORT:\n    /// Boot Mouse Input Report\n    case HOGPBH_BOOT_MOUSE_IN_REPORT: {\n      rsp->data.report.length = param->length;\n      memcpy(rsp->data.report.value, param->value, param->length);\n    } break;\n    /// Boot Keyboard Input Report Client Config\n    case HOGPBH_BOOT_KB_IN_NTF_CFG:\n    /// Boot Mouse Input Report Client Config\n    case HOGPBH_BOOT_MOUSE_IN_NTF_CFG: {\n      rsp->data.ntf_cfg = co_read16p(param->value);\n    } break;\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    // send response\n    ke_msg_send(rsp);\n\n    // operation is over - go back to idle state\n    ke_free(hogpbh_env->env[conidx]->operation);\n    hogpbh_env->env[conidx]->operation = NULL;\n    ke_state_set(dest_id, HOGPBH_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state != HOGPBH_FREE) {\n    // HID Instance\n    uint8_t hid_nb;\n    uint8_t att_info = HOGPBH_INFO_MAX;\n    uint8_t conidx = KE_IDX_GET(src_id);\n    // Get the address of the environment\n    struct hogpbh_env_tag *hogpbh_env = PRF_ENV_GET(HOGPBH, hogpbh);\n\n    // BOOT Report - HID instance is unknown.\n    for (hid_nb = 0; (hid_nb < hogpbh_env->env[conidx]->hids_nb); hid_nb++) {\n      if (param->handle == hogpbh_env->env[conidx]\n                               ->hids[hid_nb]\n                               .chars[HOGPBH_CHAR_BOOT_KB_IN_REPORT]\n                               .val_hdl) {\n        att_info = HOGPBH_BOOT_KB_IN_REPORT;\n        break;\n      } else if (param->handle == hogpbh_env->env[conidx]\n                                      ->hids[hid_nb]\n                                      .chars[HOGPBH_CHAR_BOOT_MOUSE_IN_REPORT]\n                                      .val_hdl) {\n        att_info = HOGPBH_BOOT_MOUSE_IN_REPORT;\n        break;\n      }\n    }\n\n    // check if indication can be handled\n    if (att_info != HOGPBH_INFO_MAX) {\n      // send boot report indication\n      struct hogpbh_boot_report_ind *ind =\n          KE_MSG_ALLOC_DYN(HOGPBH_BOOT_REPORT_IND,\n                           prf_dst_task_get(&(hogpbh_env->prf_env), conidx),\n                           dest_id, hogpbh_boot_report_ind, param->length);\n\n      ind->hid_idx = hid_nb;\n      ind->info = att_info;\n      ind->report.length = param->length;\n      memcpy(ind->report.value, param->value, param->length);\n\n      ke_msg_send(ind);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(hogpbh){\n    {HOGPBH_ENABLE_REQ, (ke_msg_func_t)hogpbh_enable_req_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n\n    {HOGPBH_READ_INFO_REQ, (ke_msg_func_t)hogpbh_read_info_req_handler},\n    {HOGPBH_WRITE_REQ, (ke_msg_func_t)hogpbh_write_req_handler},\n\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid hogpbh_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct hogpbh_env_tag *hogpbh_env = PRF_ENV_GET(HOGPBH, hogpbh);\n\n  task_desc->msg_handler_tab = hogpbh_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(hogpbh_msg_handler_tab);\n  task_desc->state = hogpbh_env->state;\n  task_desc->idx_max = HOGPBH_IDX_MAX;\n}\n\n#endif /* (BLE_HOG_BOOT_HOST) */\n/// @} HOGPBHTASK\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogpd/api/hogpd_task.h",
    "content": "#ifndef _HOGPD_TASK_H_\n#define _HOGPD_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HOGPDTASK Task\n * @ingroup HOGPD\n * @brief HID Over GATT Profile Task.\n *\n * The HOGPD_TASK is responsible for handling the messages coming in and out of the\n * @ref HOGPD block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \n#include \"rwip_task.h\" // Task definitions\n#include \"hogp_common.h\"\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximal number of HIDS that can be added in the DB\n#define HOGPD_NB_HIDS_INST_MAX              (2)\n/// Maximal number of Report Char. that can be added in the DB for one HIDS - Up to 11\n#define HOGPD_NB_REPORT_INST_MAX            (5)\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Messages for HID Over GATT Profile Device Role\nenum hogpd_msg_id\n{\n    /// Restore bond data the HID Over GATT Profile Device Role Task\n    HOGPD_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_HOGPD),\n    /// Response of enabled request\n    HOGPD_ENABLE_RSP,\n\n    /// Request sending of a report to the host - notification\n    HOGPD_REPORT_UPD_REQ,\n    /// Response sending of a report to the host\n    HOGPD_REPORT_UPD_RSP,\n\n\n    /// Request from peer device to Read or update a report value\n    HOGPD_REPORT_REQ_IND,\n    /// Confirmation for peer device for Reading or Updating a report value\n    HOGPD_REPORT_CFM,\n\n    /// Inform Device APP that Protocol Mode Characteristic Value has been written on Device\n    HOGPD_PROTO_MODE_REQ_IND,\n    /// Confirm if the new protocol mode value\n    HOGPD_PROTO_MODE_CFM,\n\n    /// Inform Device APP that a Client Characteristic Configuration has been modified\n    HOGPD_NTF_CFG_IND,\n    /// Inform APP that HID Control Point Characteristic Value has been written on Device\n    HOGPD_CTNL_PT_IND,\n};\n\n/// Report Char. Configuration Flag Values\nenum hogpd_report_cfg\n{\n    /// Input Report\n    HOGPD_CFG_REPORT_IN     = 0x01,\n    /// Output Report\n    HOGPD_CFG_REPORT_OUT    = 0x02,\n    //HOGPD_CFG_REPORT_FEAT can be used as a mask to check Report type\n    /// Feature Report\n    HOGPD_CFG_REPORT_FEAT   = 0x03,\n    /// Input report with Write capabilities\n    HOGPD_CFG_REPORT_WR     = 0x10,\n};\n\n/// Features Flag Values\nenum hogpd_cfg\n{\n    /// Keyboard Device\n    HOGPD_CFG_KEYBOARD      = 0x01,\n    /// Mouse Device\n    HOGPD_CFG_MOUSE         = 0x02,\n    /// Protocol Mode present\n    HOGPD_CFG_PROTO_MODE    = 0x04,\n    /// Extended Reference Present\n    HOGPD_CFG_MAP_EXT_REF   = 0x08,\n    /// Boot Keyboard Report write capability\n    HOGPD_CFG_BOOT_KB_WR    = 0x10,\n    /// Boot Mouse Report write capability\n    HOGPD_CFG_BOOT_MOUSE_WR = 0x20,\n\n    /// Valid Feature mask\n    HOGPD_CFG_MASK          = 0x3F,\n\n    /// Report Notification Enabled (to be shift for each report index)\n    HOGPD_CFG_REPORT_NTF_EN = 0x40,\n};\n\n/// Type of reports\nenum hogpd_report_type\n{\n    /// The Report characteristic is used to exchange data between a HID Device and a HID Host.\n    HOGPD_REPORT,\n    /// The Report Map characteristic\n    HOGPD_REPORT_MAP,\n    /// Boot Keyboard Input Report\n    HOGPD_BOOT_KEYBOARD_INPUT_REPORT,\n    /// Boot Keyboard Output Report\n    HOGPD_BOOT_KEYBOARD_OUTPUT_REPORT,\n    /// Boot Mouse Input Report\n    HOGPD_BOOT_MOUSE_INPUT_REPORT,\n};\n\n/// type of operation requested by peer device\nenum hogpd_op\n{\n    /// No operation\n    HOGPD_OP_NO,\n    /// Read report value\n    HOGPD_OP_REPORT_READ,\n    /// Modify/Set report value\n    HOGPD_OP_REPORT_WRITE,\n    /// Modify Protocol mode\n    HOGPD_OP_PROT_UPDATE,\n};\n\n/*\n * APIs Structures\n ****************************************************************************************\n */\n/// External Report Reference\nstruct hogpd_ext_ref\n{\n    /// External Report Reference - Included Service\n    uint16_t inc_svc_hdl;\n    /// External Report Reference - Characteristic UUID\n    uint16_t rep_ref_uuid;\n};\n\n/// Database Creation Service Instance Configuration structure\nstruct hogpd_hids_cfg\n{\n    /// Service Features (@see enum hogpd_cfg)\n    uint8_t svc_features;\n    /// Number of Report Char. instances to add in the database\n    uint8_t report_nb;\n    /// Report Char. Configuration (@see enum hogpd_report_cfg)\n    uint8_t report_char_cfg[HOGPD_NB_REPORT_INST_MAX];\n    /// Report id number\n    uint8_t report_id[HOGPD_NB_REPORT_INST_MAX];\n    /// HID Information Char. Values\n    struct hids_hid_info hid_info;\n    /// External Report Reference\n    struct hogpd_ext_ref ext_ref;\n\n};\n\n/// Parameters of the @ref HOGPD_CREATE_DB_REQ message\nstruct hogpd_db_cfg\n{\n    /// Number of HIDS to add\n    uint8_t hids_nb;\n    /// Initial configuration for each HIDS instance\n    struct hogpd_hids_cfg cfg[HOGPD_NB_HIDS_INST_MAX];\n};\n\n/// Parameters of the @ref HOGPD_ENABLE_REQ message\nstruct hogpd_enable_req\n{\n    ///Connection index\n    uint8_t conidx;\n    /// Notification Configurations\n    uint16_t ntf_cfg[HOGPD_NB_HIDS_INST_MAX];\n};\n\n/// Parameters of the @ref HOGPD_ENABLE_RSP message\nstruct hogpd_enable_rsp\n{\n    ///Connection index\n    uint8_t conidx;\n    /// status of the request\n    uint8_t status;\n};\n\n///Parameters of the @ref HOGPD_NTF_CFG_IND message\nstruct hogpd_ntf_cfg_ind\n{\n    /// Connection Index\n    uint8_t conidx;\n    /// Notification Configurations\n    uint16_t ntf_cfg[HOGPD_NB_HIDS_INST_MAX];\n};\n\n\n/// Inform Device APP that Protocol Mode Characteristic Value has been written on Device\nstruct hogpd_proto_mode_req_ind\n{\n    /// Connection Index\n    uint8_t conidx;\n    /// Operation requested (update protocol mode @see hogpd_op)\n    uint8_t operation;\n    /// HIDS Instance\n    uint8_t hid_idx;\n    /// New Protocol Mode Characteristic Value\n    uint8_t proto_mode;\n};\n\n/// Confirm if the new protocol mode value\nstruct hogpd_proto_mode_cfm\n{\n    /// Connection Index\n    uint8_t conidx;\n    /// Status of the request\n    uint8_t status;\n    /// HIDS Instance\n    uint8_t hid_idx;\n    /// New Protocol Mode Characteristic Value\n    uint8_t proto_mode;\n};\n\n/// HID Report Info\nstruct hogpd_report_info\n{\n    /// HIDS Instance\n    uint8_t  hid_idx;\n    /// type of report (@see enum hogpd_report_type)\n    uint8_t  type;\n    /// Report Length (uint8_t)\n    uint16_t length;\n    /// Report Instance - 0 for boot reports and report map\n    uint8_t  idx;\n    /// Report data\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n\n/// Request sending of a report to the host - notification\nstruct hogpd_report_upd_req\n{\n    /// Connection Index\n    uint8_t conidx;\n    /// Report Info\n    struct hogpd_report_info report;\n};\n\n/// Response sending of a report to the host\nstruct hogpd_report_upd_rsp\n{\n    /// Connection Index\n    uint8_t conidx;\n    /// Status of the request\n    uint8_t status;\n};\n\n/// Request from peer device to Read or update a report value\nstruct hogpd_report_req_ind\n{\n    /// Connection Index\n    uint8_t conidx;\n    /// Operation requested (read/write @see hogpd_op)\n    uint8_t operation;\n    /// Report Info\n    struct hogpd_report_info report;\n};\n\n/// Confirmation for peer device for Reading or Updating a report value\nstruct hogpd_report_cfm\n{\n    /// Connection Index\n    uint8_t conidx;\n    /// Operation requested (read/write @see enum hogpd_op)\n    uint8_t operation;\n    /// Status of the request\n    uint8_t status;\n    /// Report Info\n    struct hogpd_report_info report;\n};\n\n\n///Parameters of the @ref HOGPD_CTNL_PT_IND message\nstruct hogpd_ctnl_pt_ind\n{\n    /// Connection Index\n    uint8_t conidx;\n    /// HIDS Instance\n    uint8_t hid_idx;\n    /// New HID Control Point Characteristic Value\n    uint8_t hid_ctnl_pt;\n};\n\n\n\n/// @} HOGPDTASK\n\n#endif /* _HOGPD_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogpd/src/hogpd.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HOGPD\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HID_DEVICE)\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"hogpd.h\"\n#include \"hogpd_task.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n#define HIDS_CFG_FLAG_MANDATORY_MASK ((uint32_t)0x000FD)\n#define HIDS_MANDATORY_ATT_NB (7)\n#define HIDS_CFG_FLAG_MAP_EXT_MASK ((uint32_t)0x00102)\n#define HIDS_MAP_EXT_ATT_NB (2)\n#define HIDS_CFG_FLAG_PROTO_MODE_MASK ((uint32_t)0x00600)\n#define HIDS_PROTO_MODE_ATT_NB (2)\n#define HIDS_CFG_FLAG_KEYBOARD_MASK ((uint32_t)0x0F800)\n#define HIDS_KEYBOARD_ATT_NB (5)\n#define HIDS_CFG_FLAG_MOUSE_MASK ((uint32_t)0x70000)\n#define HIDS_MOUSE_ATT_NB (3)\n\n#define HIDS_CFG_REPORT_MANDATORY_MASK ((uint32_t)0x7)\n#define HIDS_REPORT_MANDATORY_ATT_NB (3)\n#define HIDS_CFG_REPORT_IN_MASK ((uint32_t)0x8)\n#define HIDS_REPORT_IN_ATT_NB (1)\n// number of attribute index for a report\n#define HIDS_REPORT_NB_IDX (4)\n\n/*\n * HIDS ATTRIBUTES DEFINITION\n ****************************************************************************************\n */\n\n/// Full HIDS Database Description - Used to add attributes into the database\nconst struct attm_desc hids_att_db[HOGPD_IDX_NB] = {\n    // HID Service Declaration\n    [HOGPD_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // HID Service Declaration\n    [HOGPD_IDX_INCL_SVC] = {ATT_DECL_INCLUDE, PERM(RD, ENABLE), 0, 0},\n\n    // HID Information Characteristic Declaration\n    [HOGPD_IDX_HID_INFO_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                 0},\n    // HID Information Characteristic Value\n    [HOGPD_IDX_HID_INFO_VAL] = {ATT_CHAR_HID_INFO, PERM(RD, ENABLE), 0,\n                                sizeof(struct hids_hid_info)},\n\n    // HID Control Point Characteristic Declaration\n    [HOGPD_IDX_HID_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                    0, 0},\n    // HID Control Point Characteristic Value\n    [HOGPD_IDX_HID_CTNL_PT_VAL] = {ATT_CHAR_HID_CTNL_PT,\n                                   PERM(WRITE_COMMAND, ENABLE),\n                                   PERM(RI, ENABLE), sizeof(uint8_t)},\n\n    // Report Map Characteristic Declaration\n    [HOGPD_IDX_REPORT_MAP_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                   0},\n    // Report Map Characteristic Value\n    [HOGPD_IDX_REPORT_MAP_VAL] = {ATT_CHAR_REPORT_MAP, PERM(RD, ENABLE),\n                                  PERM(RI, ENABLE), HOGPD_REPORT_MAP_MAX_LEN},\n    // Report Map Characteristic - External Report Reference Descriptor\n    [HOGPD_IDX_REPORT_MAP_EXT_REP_REF] = {ATT_DESC_EXT_REPORT_REF,\n                                          PERM(RD, ENABLE), 0,\n                                          sizeof(uint16_t)},\n\n    // Protocol Mode Characteristic Declaration\n    [HOGPD_IDX_PROTO_MODE_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                   0},\n    // Protocol Mode Characteristic Value\n    [HOGPD_IDX_PROTO_MODE_VAL] = {ATT_CHAR_PROTOCOL_MODE,\n                                  (PERM(RD, ENABLE) |\n                                   PERM(WRITE_COMMAND, ENABLE)),\n                                  PERM(RI, ENABLE), sizeof(uint8_t)},\n\n    // Boot Keyboard Input Report Characteristic Declaration\n    [HOGPD_IDX_BOOT_KB_IN_REPORT_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                          PERM(RD, ENABLE), 0, 0},\n    // Boot Keyboard Input Report Characteristic Value\n    [HOGPD_IDX_BOOT_KB_IN_REPORT_VAL] = {ATT_CHAR_BOOT_KB_IN_REPORT,\n                                         (PERM(RD, ENABLE) | PERM(NTF, ENABLE)),\n                                         PERM(RI, ENABLE),\n                                         HOGPD_BOOT_REPORT_MAX_LEN},\n    // Boot Keyboard Input Report Characteristic - Client Characteristic\n    // Configuration Descriptor\n    [HOGPD_IDX_BOOT_KB_IN_REPORT_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                             PERM(RD, ENABLE) |\n                                                 PERM(WRITE_REQ, ENABLE),\n                                             0, 0},\n\n    // Boot Keyboard Output Report Characteristic Declaration\n    [HOGPD_IDX_BOOT_KB_OUT_REPORT_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                           PERM(RD, ENABLE), 0, 0},\n    // Boot Keyboard Output Report Characteristic Value\n    [HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL] = {ATT_CHAR_BOOT_KB_OUT_REPORT,\n                                          (PERM(RD, ENABLE) |\n                                           PERM(WRITE_REQ, ENABLE) |\n                                           PERM(WRITE_COMMAND, ENABLE)),\n                                          PERM(RI, ENABLE),\n                                          HOGPD_BOOT_REPORT_MAX_LEN},\n\n    // Boot Mouse Input Report Characteristic Declaration\n    [HOGPD_IDX_BOOT_MOUSE_IN_REPORT_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                             PERM(RD, ENABLE), 0, 0},\n    // Boot Mouse Input Report Characteristic Value\n    [HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL] =\n        {\n            ATT_CHAR_BOOT_MOUSE_IN_REPORT,\n            (PERM(RD, ENABLE) | PERM(NTF, ENABLE)),\n            PERM(RI, ENABLE),\n            HOGPD_BOOT_REPORT_MAX_LEN,\n        },\n    // Boot Mouse Input Report Characteristic - Client Characteristic\n    // Configuration Descriptor\n    [HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                                PERM(RD, ENABLE) |\n                                                    PERM(WRITE_REQ, ENABLE) |\n                                                    PERM(WRITE_COMMAND, ENABLE),\n                                                0, 0},\n\n    // Report Characteristic Declaration\n    [HOGPD_IDX_REPORT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // Report Characteristic Value\n    [HOGPD_IDX_REPORT_VAL] = {ATT_CHAR_REPORT, PERM(RD, ENABLE),\n                              PERM(RI, ENABLE), HOGPD_REPORT_MAX_LEN},\n    // Report Characteristic - Report Reference Descriptor\n    [HOGPD_IDX_REPORT_REP_REF] = {ATT_DESC_REPORT_REF, PERM(RD, ENABLE), 0,\n                                  sizeof(struct hids_report_ref)},\n    // Report Characteristic - Client Characteristic Configuration Descriptor\n    [HOGPD_IDX_REPORT_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                  PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE) |\n                                      PERM(WRITE_COMMAND, ENABLE),\n                                  0, 0},\n};\n\n/**\n ****************************************************************************************\n * @brief Initialization of the HOGPD module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t hogpd_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl,\n                          struct hogpd_db_cfg *params) {\n  struct hogpd_env_tag *hogpd_env = NULL;\n  // Service content flag - Without Report Characteristics\n  uint32_t cfg_flag[HOGPD_NB_HIDS_INST_MAX][(HOGPD_ATT_MAX / 32) + 1];\n  // Start handle used to allocate service.\n  uint16_t shdl;\n\n  // Total number of attributes\n  uint8_t tot_nb_att = 0;\n\n  // array of service description used to allocate the service\n  struct attm_desc *hids_db[HOGPD_NB_HIDS_INST_MAX];\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Service Instance Counter, Counter\n  uint8_t svc_idx, report_idx;\n  // Report Char. Report Ref value\n  struct hids_report_ref report_ref;\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  hogpd_env = (struct hogpd_env_tag *)ke_malloc(sizeof(struct hogpd_env_tag),\n                                                KE_MEM_ATT_DB);\n\n  // ensure that everything is initialized\n  memset(hids_db, 0, sizeof(hids_db));\n  memset(cfg_flag, 0, sizeof(cfg_flag));\n  memset(hogpd_env, 0, sizeof(struct hogpd_env_tag));\n\n  // Check number of HID instances\n  if ((params->hids_nb == 0) || (params->hids_nb > HOGPD_NB_HIDS_INST_MAX)) {\n    // Invalid number of service instances\n    status = PRF_ERR_INVALID_PARAM;\n  }\n\n  // For each required HIDS instance\n  for (svc_idx = 0;\n       ((svc_idx < params->hids_nb) && (status == GAP_ERR_NO_ERROR));\n       svc_idx++) {\n    // Check number of Report Char. instances\n    if (params->cfg[svc_idx].report_nb > HOGPD_NB_REPORT_INST_MAX) {\n      // Too many Report Char. Instances\n      status = PRF_ERR_INVALID_PARAM;\n      break;\n    }\n\n    // retrieve features\n    hogpd_env->svcs[svc_idx].features =\n        params->cfg[svc_idx].svc_features & HOGPD_CFG_MASK;\n    hogpd_env->svcs[svc_idx].nb_report = params->cfg[svc_idx].report_nb;\n\n    hids_db[svc_idx] = (struct attm_desc *)ke_malloc(\n        HOGPD_ATT_MAX * sizeof(struct attm_desc), KE_MEM_NON_RETENTION);\n\n    cfg_flag[svc_idx][0] = HIDS_CFG_FLAG_MANDATORY_MASK;\n    hogpd_env->svcs[svc_idx].nb_att += HIDS_MANDATORY_ATT_NB;\n\n    // copy default definition of the HID attribute database\n    memcpy(hids_db[svc_idx], hids_att_db,\n           sizeof(struct attm_desc) * HOGPD_ATT_UNIQ_NB);\n\n    //--------------------------------------------------------------------\n    // Compute cfg_flag[i] without Report Characteristics\n    //--------------------------------------------------------------------\n    if ((params->cfg[svc_idx].svc_features & HOGPD_CFG_MAP_EXT_REF) ==\n        HOGPD_CFG_MAP_EXT_REF) {\n      cfg_flag[svc_idx][0] |= HIDS_CFG_FLAG_MAP_EXT_MASK;\n      hogpd_env->svcs[svc_idx].nb_att += HIDS_MAP_EXT_ATT_NB;\n      // store reference handle in database\n      hids_db[svc_idx][HOGPD_IDX_INCL_SVC].max_size =\n          params->cfg[svc_idx].ext_ref.inc_svc_hdl;\n    }\n\n    if ((params->cfg[svc_idx].svc_features & HOGPD_CFG_PROTO_MODE) ==\n        HOGPD_CFG_PROTO_MODE) {\n      cfg_flag[svc_idx][0] |= HIDS_CFG_FLAG_PROTO_MODE_MASK;\n      hogpd_env->svcs[svc_idx].nb_att += HIDS_PROTO_MODE_ATT_NB;\n    }\n\n    if ((params->cfg[svc_idx].svc_features & HOGPD_CFG_KEYBOARD) ==\n        HOGPD_CFG_KEYBOARD) {\n      cfg_flag[svc_idx][0] |= HIDS_CFG_FLAG_KEYBOARD_MASK;\n      hogpd_env->svcs[svc_idx].nb_att += HIDS_KEYBOARD_ATT_NB;\n\n      if ((params->cfg[svc_idx].svc_features & HOGPD_CFG_BOOT_KB_WR) ==\n          HOGPD_CFG_BOOT_KB_WR) {\n        // Adds write permissions on report\n        hids_db[svc_idx][HOGPD_IDX_BOOT_KB_IN_REPORT_VAL].perm |=\n            (PERM(WRITE_REQ, ENABLE));\n      }\n    }\n\n    if ((params->cfg[svc_idx].svc_features & HOGPD_CFG_MOUSE) ==\n        HOGPD_CFG_MOUSE) {\n      cfg_flag[svc_idx][0] |= HIDS_CFG_FLAG_MOUSE_MASK;\n      hogpd_env->svcs[svc_idx].nb_att += HIDS_MOUSE_ATT_NB;\n\n      if ((params->cfg[svc_idx].svc_features & HOGPD_CFG_BOOT_MOUSE_WR) ==\n          HOGPD_CFG_BOOT_MOUSE_WR) {\n        // Adds write permissions on report\n        hids_db[svc_idx][HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL].perm |=\n            (PERM(WRITE_REQ, ENABLE));\n      }\n    }\n\n    // set report handle offset\n    hogpd_env->svcs[svc_idx].report_hdl_offset =\n        hogpd_env->svcs[svc_idx].nb_att;\n\n    //--------------------------------------------------------------------\n    // Update cfg_flag_rep[i] with Report Characteristics\n    //--------------------------------------------------------------------\n    for (report_idx = 0; report_idx < params->cfg[svc_idx].report_nb;\n         report_idx++) {\n      uint16_t perm = 0;\n      uint16_t report_offset = HIDS_REPORT_NB_IDX * report_idx;\n\n      // update config for current report\n      cfg_flag[svc_idx][(HOGPD_IDX_REPORT_CHAR + report_offset) / 32] |=\n          (1 << ((HOGPD_IDX_REPORT_CHAR + report_offset) % 32));\n      cfg_flag[svc_idx][(HOGPD_IDX_REPORT_VAL + report_offset) / 32] |=\n          (1 << ((HOGPD_IDX_REPORT_VAL + report_offset) % 32));\n      cfg_flag[svc_idx][(HOGPD_IDX_REPORT_REP_REF + report_offset) / 32] |=\n          (1 << ((HOGPD_IDX_REPORT_REP_REF + report_offset) % 32));\n      hogpd_env->svcs[svc_idx].nb_att += HIDS_REPORT_MANDATORY_ATT_NB;\n\n      // copy default definition of the HID report database\n      memcpy(&(hids_db[svc_idx][HOGPD_IDX_REPORT_CHAR + report_offset]),\n             &(hids_att_db[HOGPD_IDX_REPORT_CHAR]),\n             sizeof(struct attm_desc) * HIDS_REPORT_NB_IDX);\n\n      // according to the report type, update value property\n      switch (params->cfg[svc_idx].report_char_cfg[report_idx] &\n              HOGPD_CFG_REPORT_FEAT) {\n      // Input Report\n      case HOGPD_CFG_REPORT_IN: {\n        // add notification permission on report\n        perm = PERM(RD, ENABLE) | PERM(NTF, ENABLE);\n        // Report Char. supports NTF => Client Characteristic Configuration\n        // Descriptor\n        cfg_flag[svc_idx][(HOGPD_IDX_REPORT_NTF_CFG + report_offset) / 32] |=\n            (1 << ((HOGPD_IDX_REPORT_NTF_CFG + report_offset) % 32));\n        hogpd_env->svcs[svc_idx].nb_att += HIDS_REPORT_IN_ATT_NB;\n\n        // update feature flag\n        hogpd_env->svcs[svc_idx].features |=\n            (HOGPD_CFG_REPORT_NTF_EN << report_idx);\n\n        // check if attribute value could be written\n        if ((params->cfg[svc_idx].report_char_cfg[report_idx] &\n             HOGPD_CFG_REPORT_WR) == HOGPD_CFG_REPORT_WR) {\n          perm |= PERM(WRITE_REQ, ENABLE);\n        }\n      } break;\n\n      // Output Report\n      case HOGPD_CFG_REPORT_OUT: {\n        perm = PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE) |\n               PERM(WRITE_COMMAND, ENABLE);\n      } break;\n\n      // Feature Report\n      case HOGPD_CFG_REPORT_FEAT: {\n        perm = PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE);\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      hids_db[svc_idx][HOGPD_IDX_REPORT_VAL + (HIDS_REPORT_NB_IDX * report_idx)]\n          .perm = perm;\n    }\n\n    // increment total number of attributes to allocate.\n    tot_nb_att += hogpd_env->svcs[svc_idx].nb_att;\n  }\n\n  // Check that attribute list can be allocated.\n  if (status == ATT_ERR_NO_ERROR) {\n    status = attm_reserve_handle_range(start_hdl, tot_nb_att);\n  }\n\n  // used start handle calculated when handle range reservation has been\n  // performed\n  shdl = *start_hdl;\n  hogpd_env->start_hdl = *start_hdl;\n  hogpd_env->hids_nb = params->hids_nb;\n  // Initialize the Report ID\n  report_ref.report_id = 0;\n\n  // allocate services\n  for (svc_idx = 0;\n       ((svc_idx < params->hids_nb) && (status == GAP_ERR_NO_ERROR));\n       svc_idx++) {\n    uint16_t handle;\n    status = attm_svc_create_db(\n        &shdl, ATT_SVC_HID, (uint8_t *)&(cfg_flag[svc_idx][0]), HOGPD_ATT_MAX,\n        NULL, env->task, hids_db[svc_idx],\n        (sec_lvl &\n         (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)));\n    // update start handle for next service\n    shdl += hogpd_env->svcs[svc_idx].nb_att;\n\n    // Set HID Information Char. Value\n    if (status == GAP_ERR_NO_ERROR) {\n      handle =\n          hogpd_get_att_handle(hogpd_env, svc_idx, HOGPD_IDX_HID_INFO_VAL, 0);\n      ASSERT_ERR(handle != ATT_INVALID_HDL);\n      status = attm_att_set_value(handle, sizeof(struct hids_hid_info), 0,\n                                  (uint8_t *)¶ms->cfg[svc_idx].hid_info);\n    }\n\n    // Set Report Map Char. External Report Ref value\n    if ((status == GAP_ERR_NO_ERROR) &&\n        ((params->cfg[svc_idx].svc_features & HOGPD_CFG_MAP_EXT_REF) ==\n         HOGPD_CFG_MAP_EXT_REF)) {\n      handle = hogpd_get_att_handle(hogpd_env, svc_idx,\n                                    HOGPD_IDX_REPORT_MAP_EXT_REP_REF, 0);\n      ASSERT_ERR(handle != ATT_INVALID_HDL);\n      status = attm_att_set_value(\n          handle, sizeof(uint16_t), 0,\n          (uint8_t *)¶ms->cfg[svc_idx].ext_ref.rep_ref_uuid);\n    }\n\n    // Set Report External Ref value\n    for (report_idx = 0; (status == GAP_ERR_NO_ERROR) &&\n                         (report_idx < params->cfg[svc_idx].report_nb);\n         report_idx++) {\n      // Save the Report ID\n      report_ref.report_id = params->cfg[svc_idx].report_id[report_idx];\n      // Set Report Type\n      report_ref.report_type =\n          (params->cfg[svc_idx].report_char_cfg[report_idx] &\n           HOGPD_CFG_REPORT_FEAT);\n\n      handle = hogpd_get_att_handle(hogpd_env, svc_idx,\n                                    HOGPD_IDX_REPORT_REP_REF, report_idx);\n      ASSERT_ERR(handle != ATT_INVALID_HDL);\n      // Set value in the database\n      status = attm_att_set_value(handle, sizeof(struct hids_report_ref), 0,\n                                  (uint8_t *)&report_ref);\n    }\n\n    // by default in Report protocol mode.\n    hogpd_env->svcs[svc_idx].proto_mode = HOGP_REPORT_PROTOCOL_MODE;\n  }\n\n  //-------------------- Update profile task information  ---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // allocate HOGPD required environment variable\n    env->env = (prf_env_t *)hogpd_env;\n    hogpd_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    hogpd_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n    // initialize environment variable\n    env->id = TASK_ID_HOGPD;\n    hogpd_task_init(&(env->desc));\n\n    // service is ready, go into an Idle state\n    ke_state_set(env->task, HOGPD_IDLE);\n  } else if (hogpd_env != NULL) {\n    ke_free(hogpd_env);\n  }\n\n  // ensure that temporary allocated databases description is correctly free\n  for (svc_idx = 0; svc_idx < HOGPD_NB_HIDS_INST_MAX; svc_idx++) {\n    if (hids_db[svc_idx] != NULL) {\n      ke_free(hids_db[svc_idx]);\n    }\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the HOGPD module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void hogpd_destroy(struct prf_task_env *env) {\n  struct hogpd_env_tag *hogpd_env = (struct hogpd_env_tag *)env->env;\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(hogpd_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void hogpd_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Nothing to do */\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void hogpd_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct hogpd_env_tag *hogpd_env = (struct hogpd_env_tag *)env->env;\n  uint8_t svc_idx;\n  ASSERT_ERR(conidx < BLE_CONNECTION_MAX);\n\n  // Reset the notification configuration to ensure that no notification will be\n  // sent on a disconnected link\n  for (svc_idx = 0; svc_idx < hogpd_env->hids_nb; svc_idx++) {\n    hogpd_env->svcs[svc_idx].ntf_cfg[conidx] = 0;\n  }\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// HOGPD Task interface required by profile manager\nconst struct prf_task_cbs hogpd_itf = {\n    (prf_init_fnct)hogpd_init,\n    hogpd_destroy,\n    hogpd_create,\n    hogpd_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *hogpd_prf_itf_get(void) { return &hogpd_itf; }\n\nuint16_t hogpd_get_att_handle(struct hogpd_env_tag *hogpd_env, uint8_t svc_idx,\n                              uint8_t att_idx, uint8_t report_idx) {\n  uint16_t handle = ATT_INVALID_HDL;\n  uint8_t i = 0;\n\n  // Sanity check\n  if ((svc_idx < hogpd_env->hids_nb) && (att_idx < HOGPD_IDX_NB) &&\n      ((att_idx < HOGPD_ATT_UNIQ_NB) ||\n       (report_idx < hogpd_env->svcs[svc_idx].nb_report))) {\n    handle = hogpd_env->start_hdl;\n\n    for (i = 0; i < svc_idx; i++) {\n      // update start handle for next service - only useful if multiple service,\n      // else not used.\n      handle += hogpd_env->svcs[i].nb_att;\n    }\n\n    // increment index according to expected index\n    if (att_idx < HOGPD_ATT_UNIQ_NB) {\n      handle += att_idx;\n\n      // check if Keyboard feature active\n      if ((hogpd_env->svcs[svc_idx].features & HOGPD_CFG_KEYBOARD) == 0) {\n        if (att_idx > HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL) {\n          handle -= HIDS_KEYBOARD_ATT_NB;\n        }\n        // Error Case\n        else if ((att_idx >= HOGPD_IDX_BOOT_KB_IN_REPORT_CHAR) &&\n                 (att_idx <= HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL)) {\n          handle = ATT_INVALID_HANDLE;\n        }\n      }\n\n      // check if Mouse feature active\n      if ((hogpd_env->svcs[svc_idx].features & HOGPD_CFG_MOUSE) == 0) {\n        if (att_idx > HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG) {\n          handle -= HIDS_MOUSE_ATT_NB;\n        }\n        // Error Case\n        else if ((att_idx >= HOGPD_IDX_BOOT_MOUSE_IN_REPORT_CHAR) &&\n                 (att_idx <= HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG)) {\n          handle = ATT_INVALID_HANDLE;\n        }\n      }\n\n      // check if Protocol Mode feature active\n      if ((hogpd_env->svcs[svc_idx].features & HOGPD_CFG_PROTO_MODE) == 0) {\n        if (att_idx > HOGPD_IDX_PROTO_MODE_VAL) {\n          handle -= HIDS_PROTO_MODE_ATT_NB;\n        }\n        // Error Case\n        else if ((att_idx >= HOGPD_IDX_PROTO_MODE_CHAR) &&\n                 (att_idx <= HOGPD_IDX_PROTO_MODE_VAL)) {\n          handle = ATT_INVALID_HANDLE;\n        }\n      }\n\n      // check if Ext Ref feature active\n      if ((hogpd_env->svcs[svc_idx].features & HOGPD_CFG_MAP_EXT_REF) == 0) {\n        if (att_idx > HOGPD_IDX_REPORT_MAP_EXT_REP_REF) {\n          handle -= HIDS_MAP_EXT_ATT_NB;\n        } else if (att_idx > HOGPD_IDX_INCL_SVC) {\n          handle -= 1;\n        }\n        // Error Case\n        else if ((att_idx == HOGPD_IDX_INCL_SVC) ||\n                 (att_idx == HOGPD_IDX_REPORT_MAP_EXT_REP_REF)) {\n          handle = ATT_INVALID_HANDLE;\n        }\n      }\n    } else {\n      handle += hogpd_env->svcs[svc_idx].report_hdl_offset;\n\n      // increment attribute handle with other reports\n      for (i = 0; i < report_idx; i++) {\n        handle += HIDS_REPORT_MANDATORY_ATT_NB;\n        // check if it's a Report input\n        if ((hogpd_env->svcs[svc_idx].features &\n             (HOGPD_CFG_REPORT_NTF_EN << i)) != 0) {\n          handle += HIDS_REPORT_IN_ATT_NB;\n        }\n      }\n\n      // Error check\n      if ((att_idx == HOGPD_IDX_REPORT_NTF_CFG) &&\n          ((hogpd_env->svcs[svc_idx].features &\n            (HOGPD_CFG_REPORT_NTF_EN << report_idx)) != 0)) {\n        handle = ATT_INVALID_HANDLE;\n      } else {\n        // update handle cursor\n        handle += att_idx - HOGPD_ATT_UNIQ_NB;\n      }\n    }\n  }\n\n  return handle;\n}\n\nuint8_t hogpd_get_att_idx(struct hogpd_env_tag *hogpd_env, uint16_t handle,\n                          uint8_t *svc_idx, uint8_t *att_idx,\n                          uint8_t *report_idx) {\n  uint16_t hdl_cursor = hogpd_env->start_hdl;\n  uint8_t status = PRF_APP_ERROR;\n\n  // invalid index\n  *att_idx = HOGPD_IDX_NB;\n\n  // Browse list of services\n  // handle must be greater than current index\n  for (*svc_idx = 0; (*svc_idx < hogpd_env->hids_nb) && (handle >= hdl_cursor);\n       (*svc_idx)++) {\n    // check if handle is on current service\n    if (handle >= (hdl_cursor + hogpd_env->svcs[*svc_idx].nb_att)) {\n      hdl_cursor += hogpd_env->svcs[*svc_idx].nb_att;\n      continue;\n    }\n\n    // if we are here, we are sure that handle is valid\n    status = GAP_ERR_NO_ERROR;\n    *report_idx = 0;\n\n    // check if handle is in reports or not\n    if (handle < (hdl_cursor + hogpd_env->svcs[*svc_idx].report_hdl_offset)) {\n      if (handle == hdl_cursor) {\n        *att_idx = HOGPD_IDX_SVC;\n        break;\n      }\n\n      // check if Ext Ref feature active\n      if ((hogpd_env->svcs[*svc_idx].features & HOGPD_CFG_MAP_EXT_REF) != 0) {\n        hdl_cursor += 1;\n        if (handle == hdl_cursor) {\n          *att_idx = HOGPD_IDX_INCL_SVC;\n          break;\n        }\n      }\n\n      // check if handle is in mandatory range\n      hdl_cursor += HIDS_MANDATORY_ATT_NB;\n      if (handle <= hdl_cursor) {\n        *att_idx = HOGPD_IDX_REPORT_MAP_VAL - (hdl_cursor - handle - 1);\n        break;\n      }\n\n      // check if Ext Ref feature active\n      if ((hogpd_env->svcs[*svc_idx].features & HOGPD_CFG_MAP_EXT_REF) != 0) {\n        hdl_cursor += 1;\n        if (handle == hdl_cursor) {\n          *att_idx = HOGPD_IDX_REPORT_MAP_EXT_REP_REF;\n          break;\n        }\n      }\n\n      // check if Protocol Mode feature active\n      if ((hogpd_env->svcs[*svc_idx].features & HOGPD_CFG_PROTO_MODE) != 0) {\n        hdl_cursor += HIDS_PROTO_MODE_ATT_NB;\n        if (handle <= hdl_cursor) {\n          *att_idx = HOGPD_IDX_PROTO_MODE_VAL - (hdl_cursor - handle - 1);\n          break;\n        }\n      }\n\n      // check if Keyboard feature active\n      if ((hogpd_env->svcs[*svc_idx].features & HOGPD_CFG_KEYBOARD) != 0) {\n        hdl_cursor += HIDS_KEYBOARD_ATT_NB;\n        if (handle <= hdl_cursor) {\n          *att_idx =\n              HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL - (hdl_cursor - handle - 1);\n          break;\n        }\n      }\n\n      // check if Mouse feature active\n      if ((hogpd_env->svcs[*svc_idx].features & HOGPD_CFG_MOUSE) != 0) {\n        hdl_cursor += HIDS_MOUSE_ATT_NB;\n        if (handle <= hdl_cursor) {\n          *att_idx = HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG -\n                     (hdl_cursor - handle - 1);\n          break;\n        }\n      }\n\n      // not expected\n      ASSERT_ERR(0);\n    } else {\n      // add handle offset\n      hdl_cursor += hogpd_env->svcs[*svc_idx].report_hdl_offset;\n\n      for (*report_idx = 0; (*report_idx < hogpd_env->svcs[*svc_idx].nb_report);\n           (*report_idx)++) {\n        hdl_cursor += HIDS_REPORT_MANDATORY_ATT_NB;\n        if (handle <= hdl_cursor) {\n          *att_idx = HOGPD_IDX_REPORT_REP_REF - (hdl_cursor - handle - 1);\n          break;\n        }\n\n        if ((hogpd_env->svcs[*svc_idx].features &\n             (HOGPD_CFG_REPORT_NTF_EN << *report_idx)) != 0) {\n          hdl_cursor += HIDS_REPORT_IN_ATT_NB;\n          if (handle == hdl_cursor) {\n            *att_idx = HOGPD_IDX_REPORT_NTF_CFG;\n            break;\n          }\n        }\n      }\n\n      // not expected\n      ASSERT_ERR(*att_idx != HOGPD_IDX_NB);\n    }\n    // loop not expected here\n    break;\n  }\n\n  return (status);\n}\n\nuint8_t hogpd_ntf_send(uint8_t conidx, const struct hogpd_report_info *report) {\n  struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint16_t handle = ATT_INVALID_HANDLE;\n  uint8_t att_idx = HOGPD_IDX_NB;\n  uint16_t max_report_len = 0;\n  uint16_t feature_mask = 0;\n  uint8_t exp_prot_mode = 0;\n\n  // According to the report type retrieve:\n  // - Attribute index\n  // - Attribute max length\n  // - Feature to use\n  // - Expected protocol mode\n  switch (report->type) {\n  // An Input Report\n  case HOGPD_REPORT: {\n    att_idx = HOGPD_IDX_REPORT_VAL;\n    max_report_len = HOGPD_REPORT_MAX_LEN;\n    feature_mask = HOGPD_CFG_REPORT_NTF_EN << report->idx;\n    exp_prot_mode = HOGP_REPORT_PROTOCOL_MODE;\n  } break;\n  // Boot Keyboard input report\n  case HOGPD_BOOT_KEYBOARD_INPUT_REPORT: {\n    att_idx = HOGPD_IDX_BOOT_KB_IN_REPORT_VAL;\n    max_report_len = HOGPD_BOOT_REPORT_MAX_LEN;\n    feature_mask = HOGPD_CFG_KEYBOARD;\n    exp_prot_mode = HOGP_BOOT_PROTOCOL_MODE;\n  } break;\n  // Boot Mouse input report\n  case HOGPD_BOOT_MOUSE_INPUT_REPORT: {\n    att_idx = HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL;\n    max_report_len = HOGPD_BOOT_REPORT_MAX_LEN;\n    feature_mask = HOGPD_CFG_MOUSE;\n    exp_prot_mode = HOGP_BOOT_PROTOCOL_MODE;\n  } break;\n\n  default: /* Nothing to do */\n    break;\n  }\n\n  handle =\n      hogpd_get_att_handle(hogpd_env, report->hid_idx, att_idx, report->idx);\n\n  // check if attribute is found\n  if (handle == ATT_INVALID_HANDLE) {\n    // check if it's an unsupported feature\n    if ((feature_mask != 0) && (report->hid_idx < hogpd_env->hids_nb) &&\n        (report->idx < hogpd_env->svcs[report->hid_idx].nb_report) &&\n        ((hogpd_env->svcs[report->hid_idx].features & feature_mask) == 0)) {\n      status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n    }\n    // or an invalid param\n    else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  }\n  // check if length is valid\n  else if (report->length > max_report_len) {\n    status = PRF_ERR_UNEXPECTED_LEN;\n  }\n  // check if notification is enabled\n  else if ((hogpd_env->svcs[report->hid_idx].ntf_cfg[conidx] & feature_mask) ==\n           0) {\n    status = PRF_ERR_NTF_DISABLED;\n  }\n  // check if protocol mode is valid\n  else if ((hogpd_env->svcs[report->hid_idx].proto_mode != exp_prot_mode) &&\n           ((hogpd_env->svcs[report->hid_idx].features &\n             HOGPD_CFG_PROTO_MODE) != 0)) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // Allocate the GATT notification message\n    struct gattc_send_evt_cmd *report_ntf =\n        KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         prf_src_task_get(&(hogpd_env->prf_env), conidx),\n                         gattc_send_evt_cmd, report->length);\n\n    // Fill in the parameter structure\n    report_ntf->operation = GATTC_NOTIFY;\n    report_ntf->handle = handle;\n    // pack measured value in database\n    report_ntf->length = report->length;\n    memcpy(report_ntf->value, report->value, report->length);\n    // send notification to peer device\n    ke_msg_send(report_ntf);\n  }\n\n  return (status);\n}\n\nuint8_t hogpd_ntf_cfg_ind_send(uint8_t conidx, uint8_t svc_idx, uint8_t att_idx,\n                               uint8_t report_idx, uint16_t ntf_cfg) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint16_t mask = 0;\n\n  struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n\n  // set notification config update mask\n  switch (att_idx) {\n  // An Input Report\n  case HOGPD_IDX_REPORT_NTF_CFG: {\n    mask = HOGPD_CFG_REPORT_NTF_EN << report_idx;\n  } break;\n  // Boot Keyboard input report\n  case HOGPD_IDX_BOOT_KB_IN_REPORT_NTF_CFG: {\n    mask = HOGPD_CFG_KEYBOARD;\n  } break;\n  // Boot Mouse input report\n  case HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG: {\n    mask = HOGPD_CFG_MOUSE;\n  } break;\n\n  default: {\n    ASSERT_ERR(0);\n  } break;\n  }\n\n  // Stop notification\n  if (ntf_cfg == PRF_CLI_STOP_NTFIND) {\n    hogpd_env->svcs[svc_idx].ntf_cfg[conidx] &= ~mask;\n  }\n  // Start notification\n  else if (ntf_cfg == PRF_CLI_START_NTF) {\n    hogpd_env->svcs[svc_idx].ntf_cfg[conidx] |= mask;\n  }\n  // Provided value is incorrect\n  else {\n    status = PRF_APP_ERROR;\n  }\n\n  // inform application about updated notification configuration\n  if (status == GAP_ERR_NO_ERROR) {\n    // Allocate the GATT notification message\n    struct hogpd_ntf_cfg_ind *ntf_cfg_ind = KE_MSG_ALLOC(\n        HOGPD_NTF_CFG_IND, prf_dst_task_get(&(hogpd_env->prf_env), conidx),\n        prf_src_task_get(&(hogpd_env->prf_env), conidx), hogpd_ntf_cfg_ind);\n\n    // Fill in the parameter structure\n    ntf_cfg_ind->conidx = conidx;\n\n    for (svc_idx = 0; svc_idx < HOGPD_NB_HIDS_INST_MAX; svc_idx++) {\n      ntf_cfg_ind->ntf_cfg[svc_idx] = hogpd_env->svcs[svc_idx].ntf_cfg[conidx];\n    }\n\n    // send indication to application\n    ke_msg_send(ntf_cfg_ind);\n  }\n\n  return (status);\n}\n\n#endif /* BLE_HID_DEVICE */\n\n/// @} HOGPD\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogpd/src/hogpd.h",
    "content": "#ifndef _HOGPD_H_\n#define _HOGPD_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HOGPD HID Over GATT Profile Device Role\n * @ingroup HOGP\n * @brief HID Over GATT Profile Device Role\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HID_DEVICE)\n#include \"hogp_common.h\"\n#include \"hogpd_task.h\"\n\n#include \"prf.h\"\n#include \"prf_types.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n///Maximum number of HID Over GATT Device task instances\n#define HOGPD_IDX_MAX                   (0x01)\n\n/// Maximal length of Report Char. Value\n#define HOGPD_REPORT_MAX_LEN                (45)\n/// Maximal length of Report Map Char. Value\n#define HOGPD_REPORT_MAP_MAX_LEN            (512)\n\n/// Length of Boot Report Char. Value Maximal Length\n#define HOGPD_BOOT_REPORT_MAX_LEN           (8)\n\n/// Boot KB Input Report Notification Configuration Bit Mask\n#define HOGPD_BOOT_KB_IN_NTF_CFG_MASK       (0x40)\n/// Boot KB Input Report Notification Configuration Bit Mask\n#define HOGPD_BOOT_MOUSE_IN_NTF_CFG_MASK    (0x80)\n/// Boot Report Notification Configuration Bit Mask\n#define HOGPD_REPORT_NTF_CFG_MASK           (0x20)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the HOGPD task\nenum hogpd_state\n{\n    /// Idle state\n    HOGPD_IDLE,\n    /// Request from application on-going\n    HOGPD_REQ_BUSY  = (1 << 0),\n    /// OPeration requested by peer device on-going\n    HOGPD_OP_BUSY   = (1 << 1),\n    /// Number of defined states.\n    HOGPD_STATE_MAX\n};\n\n/// HID Service Attributes Indexes\nenum\n{\n    HOGPD_IDX_SVC,\n\n    // Included Service\n    HOGPD_IDX_INCL_SVC,\n\n    // HID Information\n    HOGPD_IDX_HID_INFO_CHAR,\n    HOGPD_IDX_HID_INFO_VAL,\n\n    // HID Control Point\n    HOGPD_IDX_HID_CTNL_PT_CHAR,\n    HOGPD_IDX_HID_CTNL_PT_VAL,\n\n    // Report Map\n    HOGPD_IDX_REPORT_MAP_CHAR,\n    HOGPD_IDX_REPORT_MAP_VAL,\n    HOGPD_IDX_REPORT_MAP_EXT_REP_REF,\n\n    // Protocol Mode\n    HOGPD_IDX_PROTO_MODE_CHAR,\n    HOGPD_IDX_PROTO_MODE_VAL,\n\n    // Boot Keyboard Input Report\n    HOGPD_IDX_BOOT_KB_IN_REPORT_CHAR,\n    HOGPD_IDX_BOOT_KB_IN_REPORT_VAL,\n    HOGPD_IDX_BOOT_KB_IN_REPORT_NTF_CFG,\n\n    // Boot Keyboard Output Report\n    HOGPD_IDX_BOOT_KB_OUT_REPORT_CHAR,\n    HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL,\n\n    // Boot Mouse Input Report\n    HOGPD_IDX_BOOT_MOUSE_IN_REPORT_CHAR,\n    HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL,\n    HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG,\n\n    /// number of attributes that are uniq in the service\n    HOGPD_ATT_UNIQ_NB,\n\n    // Report\n    HOGPD_IDX_REPORT_CHAR = HOGPD_ATT_UNIQ_NB,\n    HOGPD_IDX_REPORT_VAL,\n    HOGPD_IDX_REPORT_REP_REF,\n    HOGPD_IDX_REPORT_NTF_CFG,\n\n    HOGPD_IDX_NB,\n\n    // maximum number of attribute that can be present in the HID service\n    HOGPD_ATT_MAX = HOGPD_ATT_UNIQ_NB + (4* (HOGPD_NB_REPORT_INST_MAX)),\n};\n\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// HIDS service cfg\nstruct hogpd_svc_cfg\n{\n    /// Service Features (@see enum hogpd_cfg)\n    uint16_t features;\n    /// Notification configuration\n    uint16_t ntf_cfg[BLE_CONNECTION_MAX];\n    /// Number of attribute present in service\n    uint8_t  nb_att;\n    /// Number of Report Char. instances to add in the database\n    uint8_t  nb_report;\n    /// Handle offset where report are available - to enhance handle search\n    uint8_t  report_hdl_offset;\n    /// Current Protocol Mode\n    uint8_t  proto_mode;\n};\n\n/// HIDS on-going operation\nstruct hogpd_operation\n{\n    /// Connection index impacted\n    uint8_t  conidx;\n    /// Operation type (@see enum hogpd_op)\n    uint8_t  operation;\n    /// Handle impacted by operation\n    uint16_t handle;\n};\n\n/// HID Over GATT Profile HID Device Role Environment variable\nstruct hogpd_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Supported Features\n    struct hogpd_svc_cfg svcs[HOGPD_NB_HIDS_INST_MAX];\n    /// HIDS Start Handles\n    uint16_t start_hdl;\n    /// On-going operation (requested by peer device)\n    struct hogpd_operation op;\n    /// HID Over GATT task state\n    ke_state_t state[HOGPD_IDX_MAX];\n    /// Number of HIDS added in the database\n    uint8_t hids_nb;\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve HID service profile interface\n *\n * @return HID service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* hogpd_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Retrieve Attribute handle from service and attribute index\n *\n * @param[in] hogpd_env  HID Service environment\n * @param[in] svc_idx    HID Service index\n * @param[in] att_idx    Attribute index\n * @param[in] report_idx Report index\n *\n * @return HID attribute handle or INVALID HANDLE if nothing found\n ****************************************************************************************\n */\nuint16_t hogpd_get_att_handle(struct hogpd_env_tag* hogpd_env, uint8_t svc_idx, uint8_t att_idx, uint8_t report_idx);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve Service and attribute index form attribute handle\n *\n * @param[out] handle     Attribute handle\n * @param[out] svc_idx    HID Service index\n * @param[out] att_idx    Attribute index\n * @param[out] report_idx Report Index\n *\n * @return Success if attribute and service index found, else Application error\n ****************************************************************************************\n */\nuint8_t hogpd_get_att_idx(struct hogpd_env_tag* hogpd_env, uint16_t handle, uint8_t *svc_idx, uint8_t *att_idx, uint8_t *report_idx);\n\n\n/**\n ****************************************************************************************\n * @brief Check if a report value can be notified to the peer central.\n *\n * @param[in] conidx Connection Index\n * @param[in] report Report information to notify\n *\n * @return Status Code to know if request succeed or not.\n ****************************************************************************************\n */\nuint8_t hogpd_ntf_send(uint8_t conidx, const struct hogpd_report_info* report);\n\n/**\n ****************************************************************************************\n * @brief Send a HOGPD_NTF_CFG_IND message to the application\n *\n * @param[in] conidx Connection Index\n * @param[in] svc_idx    HID Service index\n * @param[in] att_idx    Attribute index\n * @param[in] report_idx Report Index\n * @param[in] ntf_cfg       Client Characteristic Configuration Descriptor value\n *\n * @return Status Code to know if notification update succeed or not\n ****************************************************************************************\n */\nuint8_t hogpd_ntf_cfg_ind_send(uint8_t conidx, uint8_t svc_idx, uint8_t att_idx, uint8_t report_idx, uint16_t ntf_cfg);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid hogpd_task_init(struct ke_task_desc *task_desc);\n\n#endif /* #if (BLE_HID_DEVICE) */\n\n/// @} HOGPD\n\n#endif /* _HOGPD_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogpd/src/hogpd_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HOGPDTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_HID_DEVICE)\n#include \"gap.h\"\n#include \"gattc_task.h\"\n\n// HID Over GATT Profile Device Role Functions\n#include \"hogpd.h\"\n#include \"hogpd_task.h\"\n\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPD_ENABLE_REQ message.\n * The handler enables the HID Over GATT Profile Device Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogpd_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct hogpd_enable_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Counter for HIDS instance\n  uint8_t svc_idx;\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n\n  ASSERT_ERR(hogpd_env != NULL);\n\n  // Check provided values and check if connection exists\n  if ((param->conidx > BLE_CONNECTION_MAX) ||\n      (gapc_get_conhdl(param->conidx) == GAP_INVALID_CONHDL)) {\n    // an error occurs, trigg it.\n    status = (param->conidx > BLE_CONNECTION_MAX) ? GAP_ERR_INVALID_PARAM\n                                                  : PRF_ERR_REQ_DISALLOWED;\n  } else {\n    for (svc_idx = 0; svc_idx < hogpd_env->hids_nb; svc_idx++) {\n      // Retrieve notification configuration\n      hogpd_env->svcs[svc_idx].ntf_cfg[param->conidx] = param->ntf_cfg[svc_idx];\n    }\n  }\n\n  // Send back response\n  struct hogpd_enable_rsp *rsp =\n      KE_MSG_ALLOC(HOGPD_ENABLE_RSP, src_id, dest_id, hogpd_enable_rsp);\n  rsp->conidx = param->conidx;\n  rsp->status = status;\n  ke_msg_send(rsp);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPD_REPORT_UPD_REQ message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogpd_report_upd_req_handler(\n    ke_msg_id_t const msgid, struct hogpd_report_upd_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n\n  // check that task is in idle state\n  if ((state & HOGPD_REQ_BUSY) == HOGPD_IDLE) {\n    // Status\n    uint8_t status = PRF_ERR_INVALID_PARAM;\n    // Check provided values and check if connection exists\n    if ((param->conidx > BLE_CONNECTION_MAX) ||\n        (gapc_get_conhdl(param->conidx) == GAP_INVALID_CONHDL)) {\n      status = (param->conidx > BLE_CONNECTION_MAX) ? GAP_ERR_INVALID_PARAM\n                                                    : PRF_ERR_REQ_DISALLOWED;\n    } else {\n      status = hogpd_ntf_send(param->conidx, &(param->report));\n    }\n\n    // an error occurs inform application\n    if (status != GAP_ERR_NO_ERROR) {\n      // send report update response\n      struct hogpd_report_upd_rsp *rsp = KE_MSG_ALLOC(\n          HOGPD_REPORT_UPD_RSP, src_id, dest_id, hogpd_report_upd_rsp);\n      rsp->conidx = param->conidx;\n      rsp->status = status;\n      ke_msg_send(rsp);\n    }\n    // go in a busy state\n    else {\n      ke_state_set(dest_id, state | HOGPD_REQ_BUSY);\n    }\n  }\n  // else process it later\n  else {\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPD_REPORT_CFM message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogpd_report_cfm_handler(ke_msg_id_t const msgid,\n                                      struct hogpd_report_cfm const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n\n  uint8_t state = ke_state_get(dest_id);\n\n  // check that an operation is ongoing\n  if ((state & HOGPD_OP_BUSY) == HOGPD_OP_BUSY) {\n    uint16_t handle = ATT_INVALID_HANDLE;\n    uint8_t status = PRF_APP_ERROR;\n    struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n\n    // check received status\n    if (param->status != GAP_ERR_NO_ERROR) {\n      status = param->status;\n    }\n    // perform operation sanity check\n    else if ((param->operation == hogpd_env->op.operation) &&\n             (param->conidx == hogpd_env->op.conidx)) {\n      // retrieve attribute index.\n      uint8_t att_idx = 0;\n      switch (param->report.type) {\n      case HOGPD_REPORT: {\n        att_idx = HOGPD_IDX_REPORT_VAL;\n      } break;\n      case HOGPD_REPORT_MAP: {\n        att_idx = HOGPD_IDX_REPORT_MAP_VAL;\n      } break;\n      case HOGPD_BOOT_KEYBOARD_INPUT_REPORT: {\n        att_idx = HOGPD_IDX_BOOT_KB_IN_REPORT_VAL;\n      } break;\n      case HOGPD_BOOT_KEYBOARD_OUTPUT_REPORT: {\n        att_idx = HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL;\n      } break;\n      case HOGPD_BOOT_MOUSE_INPUT_REPORT: {\n        att_idx = HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL;\n      } break;\n      default: /* Nothing to do */\n        break;\n      }\n\n      // retrieve handle\n      handle = hogpd_get_att_handle(hogpd_env, param->report.hid_idx, att_idx,\n                                    param->report.idx);\n\n      // check if answer correspond to expected one\n      if (handle == hogpd_env->op.handle) {\n        status = GAP_ERR_NO_ERROR;\n      }\n    }\n\n    // read operation\n    if (hogpd_env->op.operation == HOGPD_OP_REPORT_READ) {\n      uint16_t length = (status == GAP_ERR_NO_ERROR) ? param->report.length : 0;\n      // Send read response\n      struct gattc_read_cfm *rd_cfm = KE_MSG_ALLOC_DYN(\n          GATTC_READ_CFM, KE_BUILD_ID(TASK_GATTC, hogpd_env->op.conidx),\n          dest_id, gattc_read_cfm, length);\n      rd_cfm->handle = hogpd_env->op.handle;\n      rd_cfm->status = status;\n      rd_cfm->length = length;\n\n      if (status == GAP_ERR_NO_ERROR) {\n        memcpy(rd_cfm->value, param->report.value, length);\n      }\n\n      ke_msg_send(rd_cfm);\n    }\n    // write operation\n    else {\n      // Send write response\n      struct gattc_write_cfm *wr_cfm = KE_MSG_ALLOC(\n          GATTC_WRITE_CFM, KE_BUILD_ID(TASK_GATTC, hogpd_env->op.conidx),\n          dest_id, gattc_write_cfm);\n      wr_cfm->handle = hogpd_env->op.handle;\n      wr_cfm->status = status;\n      ke_msg_send(wr_cfm);\n    }\n\n    // cleanup environment\n    hogpd_env->op.operation = HOGPD_OP_NO;\n    hogpd_env->op.handle = ATT_INVALID_HDL;\n    hogpd_env->op.conidx = 0xFF;\n\n    // go back in idle state\n    ke_state_set(dest_id, state & ~HOGPD_OP_BUSY);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPD_PROTO_MODE_CFM message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogpd_proto_mode_cfm_handler(\n    ke_msg_id_t const msgid, struct hogpd_proto_mode_cfm const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  uint8_t state = ke_state_get(dest_id);\n\n  // check that an operation is ongoing\n  if ((state & HOGPD_OP_BUSY) == HOGPD_OP_BUSY) {\n    uint16_t handle = ATT_INVALID_HANDLE;\n    uint8_t status = PRF_APP_ERROR;\n    struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n\n    // check received status\n    if (param->status != GAP_ERR_NO_ERROR) {\n      status = param->status;\n    }\n    // perform operation sanity check\n    else if ((hogpd_env->op.operation == HOGPD_OP_PROT_UPDATE) &&\n             (param->conidx == hogpd_env->op.conidx)) {\n      // retrieve handle\n      handle = hogpd_get_att_handle(hogpd_env, param->hid_idx,\n                                    HOGPD_IDX_PROTO_MODE_VAL, 0);\n\n      // check if answer correspond to expected one\n      if (handle == hogpd_env->op.handle) {\n        status = GAP_ERR_NO_ERROR;\n        hogpd_env->svcs[param->hid_idx].proto_mode = param->proto_mode;\n      }\n    }\n\n    // read operation/something failed\n    if (hogpd_env->op.operation == HOGPD_OP_REPORT_READ) {\n      // Send read response\n      struct gattc_read_cfm *rd_cfm = KE_MSG_ALLOC(\n          GATTC_READ_CFM, KE_BUILD_ID(TASK_GATTC, hogpd_env->op.conidx),\n          dest_id, gattc_read_cfm);\n      rd_cfm->handle = hogpd_env->op.handle;\n      rd_cfm->status = status;\n      ke_msg_send(rd_cfm);\n    }\n    // write operation\n    else {\n      // Send write response\n      struct gattc_write_cfm *wr_cfm = KE_MSG_ALLOC(\n          GATTC_WRITE_CFM, KE_BUILD_ID(TASK_GATTC, hogpd_env->op.conidx),\n          dest_id, gattc_write_cfm);\n      wr_cfm->handle = hogpd_env->op.handle;\n      wr_cfm->status = status;\n      ke_msg_send(wr_cfm);\n    }\n\n    // cleanup environment\n    hogpd_env->op.operation = HOGPD_OP_NO;\n    hogpd_env->op.handle = ATT_INVALID_HDL;\n    hogpd_env->op.conidx = 0xFF;\n\n    // go back in idle state\n    ke_state_set(dest_id, state & ~HOGPD_OP_BUSY);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_ATT_INFO_REQ_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_att_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_att_info_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint8_t hid_idx, att_idx, report_idx;\n  struct gattc_att_info_cfm *cfm;\n  struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n  // retrieve attribute requested\n  uint8_t status = hogpd_get_att_idx(hogpd_env, param->handle, &hid_idx,\n                                     &att_idx, &report_idx);\n\n  // Send write response\n  cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n  cfm->handle = param->handle;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // check which attribute is requested by peer device\n    switch (att_idx) {\n    case HOGPD_IDX_BOOT_KB_IN_REPORT_VAL:\n    case HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL:\n    case HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL:\n    case HOGPD_IDX_REPORT_VAL: {\n      cfm->length = 0;\n    } break;\n\n    // Notification configuration\n    case HOGPD_IDX_BOOT_KB_IN_REPORT_NTF_CFG:\n    case HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG:\n    case HOGPD_IDX_REPORT_NTF_CFG: {\n      cfm->length = 2;\n    } break;\n\n    default: {\n      cfm->length = 0;\n      status = ATT_ERR_WRITE_NOT_PERMITTED;\n    } break;\n    }\n  }\n\n  cfm->status = status;\n\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_WRITE_REQ_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n\n  // check that task is in idle state\n  if ((state & HOGPD_OP_BUSY) == HOGPD_IDLE) {\n    uint8_t hid_idx, att_idx, report_idx;\n\n    // used to know if gatt_write confirmation should be sent immediately\n    uint8_t conidx = KE_IDX_GET(src_id);\n\n    struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n    // retrieve attribute requested\n    uint8_t status = hogpd_get_att_idx(hogpd_env, param->handle, &hid_idx,\n                                       &att_idx, &report_idx);\n\n    // prepare operation info\n    hogpd_env->op.conidx = conidx;\n    hogpd_env->op.operation = HOGPD_OP_NO;\n    hogpd_env->op.handle = param->handle;\n\n    if (status == GAP_ERR_NO_ERROR) {\n\n      // check which attribute is requested by peer device\n      switch (att_idx) {\n      // Control point value updated\n      case HOGPD_IDX_HID_CTNL_PT_VAL: {\n        // send control point indication\n        struct hogpd_ctnl_pt_ind *cp_ind = KE_MSG_ALLOC(\n            HOGPD_CTNL_PT_IND, prf_dst_task_get(&(hogpd_env->prf_env), conidx),\n            dest_id, hogpd_ctnl_pt_ind);\n        cp_ind->conidx = conidx;\n        cp_ind->hid_idx = hid_idx;\n        cp_ind->hid_ctnl_pt = param->value[0];\n        ke_msg_send(cp_ind);\n      } break;\n\n      // Modification of protocol mode requested\n      case HOGPD_IDX_PROTO_MODE_VAL: {\n        // send control point indication\n        struct hogpd_proto_mode_req_ind *prot_ind =\n            KE_MSG_ALLOC(HOGPD_PROTO_MODE_REQ_IND,\n                         prf_dst_task_get(&(hogpd_env->prf_env), conidx),\n                         dest_id, hogpd_proto_mode_req_ind);\n        prot_ind->conidx = conidx;\n        prot_ind->operation = HOGPD_OP_PROT_UPDATE;\n        prot_ind->hid_idx = hid_idx;\n        prot_ind->proto_mode = param->value[0];\n        ke_msg_send(prot_ind);\n\n        hogpd_env->op.operation = HOGPD_OP_PROT_UPDATE;\n      } break;\n\n      // Modification of report value requested\n      case HOGPD_IDX_BOOT_KB_IN_REPORT_VAL:\n      case HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL:\n      case HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL:\n      case HOGPD_IDX_REPORT_VAL: {\n        // send report indication\n        struct hogpd_report_req_ind *report_ind =\n            KE_MSG_ALLOC_DYN(HOGPD_REPORT_REQ_IND,\n                             prf_dst_task_get(&(hogpd_env->prf_env), conidx),\n                             dest_id, hogpd_report_req_ind, param->length);\n\n        report_ind->conidx = conidx;\n        report_ind->operation = HOGPD_OP_REPORT_WRITE;\n        report_ind->report.length = param->length;\n        report_ind->report.hid_idx = hid_idx;\n        report_ind->report.idx = report_idx;\n\n        memcpy(report_ind->report.value, param->value, param->length);\n\n        // retrieve report type\n        switch (att_idx) {\n        // An Input Report\n        case HOGPD_IDX_BOOT_KB_IN_REPORT_VAL: {\n          report_ind->report.type = HOGPD_BOOT_KEYBOARD_INPUT_REPORT;\n        } break;\n        // Boot Keyboard input report\n        case HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL: {\n          report_ind->report.type = HOGPD_BOOT_KEYBOARD_OUTPUT_REPORT;\n        } break;\n        // Boot Mouse input report\n        case HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL: {\n          report_ind->report.type = HOGPD_BOOT_MOUSE_INPUT_REPORT;\n        } break;\n        // Normal report\n        case HOGPD_IDX_REPORT_VAL: {\n          report_ind->report.type = HOGPD_REPORT;\n        } break;\n\n        default: {\n          ASSERT_ERR(0);\n        } break;\n        }\n\n        ke_msg_send(report_ind);\n\n        hogpd_env->op.operation = HOGPD_OP_REPORT_WRITE;\n      } break;\n\n      // Notification configuration update\n      case HOGPD_IDX_BOOT_KB_IN_REPORT_NTF_CFG:\n      case HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG:\n      case HOGPD_IDX_REPORT_NTF_CFG: {\n        uint16_t ntf_cfg = co_read16p(param->value);\n        status = hogpd_ntf_cfg_ind_send(conidx, hid_idx, att_idx, report_idx,\n                                        ntf_cfg);\n      } break;\n\n      default: {\n        status = PRF_APP_ERROR;\n      } break;\n      }\n    }\n\n    // check if peer operation is over\n    if (hogpd_env->op.operation == HOGPD_OP_NO) {\n      // Send write response\n      struct gattc_write_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n      cfm->handle = param->handle;\n      cfm->status = status;\n      ke_msg_send(cfm);\n    } else {\n      // go into operation busy state\n      ke_state_set(dest_id, state | HOGPD_OP_BUSY);\n    }\n  }\n  // else process it later\n  else {\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_REQ_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n\n  // check that task is in idle state\n  if ((state & HOGPD_OP_BUSY) == HOGPD_IDLE) {\n    uint8_t hid_idx, att_idx, report_idx;\n    bool finished = true;\n    uint8_t report_type = 0;\n    uint16_t value = 0;\n    uint16_t length = 0;\n\n    struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n\n    // used to know if gatt_write confirmation should be sent immediately\n    uint8_t conidx = KE_IDX_GET(src_id);\n\n    // retrieve attribute requested\n    uint8_t status = hogpd_get_att_idx(hogpd_env, param->handle, &hid_idx,\n                                       &att_idx, &report_idx);\n\n    if (status == GAP_ERR_NO_ERROR) {\n      // check which attribute is requested by peer device\n      switch (att_idx) {\n      //  ------------ READ report value requested\n      case HOGPD_IDX_BOOT_KB_IN_REPORT_VAL: {\n        report_type = HOGPD_BOOT_KEYBOARD_INPUT_REPORT;\n        finished = false;\n      } break;\n      case HOGPD_IDX_BOOT_KB_OUT_REPORT_VAL: {\n        report_type = HOGPD_BOOT_KEYBOARD_OUTPUT_REPORT;\n        finished = false;\n      } break;\n      case HOGPD_IDX_BOOT_MOUSE_IN_REPORT_VAL: {\n        report_type = HOGPD_BOOT_MOUSE_INPUT_REPORT;\n        finished = false;\n      } break;\n      case HOGPD_IDX_REPORT_VAL: {\n        report_type = HOGPD_REPORT;\n        finished = false;\n      } break;\n      case HOGPD_IDX_REPORT_MAP_VAL: {\n        report_type = HOGPD_REPORT_MAP;\n        finished = false;\n      } break;\n\n      //  ------------ READ active protocol mode\n      case HOGPD_IDX_PROTO_MODE_VAL: {\n        value = hogpd_env->svcs[hid_idx].proto_mode;\n        length = sizeof(uint8_t);\n      } break;\n\n      //  ------------ READ Notification configuration\n      case HOGPD_IDX_BOOT_KB_IN_REPORT_NTF_CFG: {\n        value = ((hogpd_env->svcs[hid_idx].ntf_cfg[conidx] &\n                  HOGPD_CFG_KEYBOARD) != 0)\n                    ? PRF_CLI_START_NTF\n                    : PRF_CLI_STOP_NTFIND;\n\n        length = sizeof(uint16_t);\n      } break;\n      case HOGPD_IDX_BOOT_MOUSE_IN_REPORT_NTF_CFG: {\n        value =\n            ((hogpd_env->svcs[hid_idx].ntf_cfg[conidx] & HOGPD_CFG_MOUSE) != 0)\n                ? PRF_CLI_START_NTF\n                : PRF_CLI_STOP_NTFIND;\n        length = sizeof(uint16_t);\n      } break;\n      case HOGPD_IDX_REPORT_NTF_CFG: {\n        value = ((hogpd_env->svcs[hid_idx].ntf_cfg[conidx] &\n                  (HOGPD_CFG_REPORT_NTF_EN << report_idx)) != 0)\n                    ? PRF_CLI_START_NTF\n                    : PRF_CLI_STOP_NTFIND;\n        length = sizeof(uint16_t);\n      } break;\n\n      default: {\n        status = PRF_APP_ERROR;\n      } break;\n      }\n    }\n\n    // check if peer operation is over\n    if (finished) {\n      // Send write response\n      struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n          GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, length);\n      cfm->handle = param->handle;\n      cfm->status = status;\n      cfm->length = length;\n      memcpy(cfm->value, &value, length);\n      ke_msg_send(cfm);\n    } else {\n      // send report indication\n      struct hogpd_report_req_ind *report_ind = KE_MSG_ALLOC(\n          HOGPD_REPORT_REQ_IND, prf_dst_task_get(&(hogpd_env->prf_env), conidx),\n          dest_id, hogpd_report_req_ind);\n\n      report_ind->conidx = conidx;\n      report_ind->operation = HOGPD_OP_REPORT_READ;\n      report_ind->report.length = 0;\n      report_ind->report.hid_idx = hid_idx;\n      report_ind->report.type = report_type;\n      report_ind->report.idx = report_idx;\n\n      ke_msg_send(report_ind);\n\n      hogpd_env->op.conidx = conidx;\n      hogpd_env->op.operation = HOGPD_OP_REPORT_READ;\n      hogpd_env->op.handle = param->handle;\n\n      // go into operation busy state\n      ke_state_set(dest_id, state | HOGPD_OP_BUSY);\n    }\n  }\n  // else process it later\n  else {\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATT_NOTIFY_CMP_EVT message meaning that Report\n *notification has been correctly sent to peer device (but not confirmed by peer\n *device).\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  if (param->operation == GATTC_NOTIFY) {\n    uint8_t conidx = KE_IDX_GET(src_id);\n    struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n\n    // send report update response\n    struct hogpd_report_upd_rsp *rsp = KE_MSG_ALLOC(\n        HOGPD_REPORT_UPD_RSP, prf_dst_task_get(&(hogpd_env->prf_env), conidx),\n        dest_id, hogpd_report_upd_rsp);\n    rsp->conidx = conidx;\n    rsp->status = param->status;\n    ke_msg_send(rsp);\n\n    // go back in to idle mode\n    ke_state_set(dest_id, ke_state_get(dest_id) & ~HOGPD_REQ_BUSY);\n  } // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(hogpd){\n    {HOGPD_ENABLE_REQ, (ke_msg_func_t)hogpd_enable_req_handler},\n    {HOGPD_REPORT_UPD_REQ, (ke_msg_func_t)hogpd_report_upd_req_handler},\n    {HOGPD_REPORT_CFM, (ke_msg_func_t)hogpd_report_cfm_handler},\n    {HOGPD_PROTO_MODE_CFM, (ke_msg_func_t)hogpd_proto_mode_cfm_handler},\n\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid hogpd_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct hogpd_env_tag *hogpd_env = PRF_ENV_GET(HOGPD, hogpd);\n\n  task_desc->msg_handler_tab = hogpd_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(hogpd_msg_handler_tab);\n  task_desc->state = hogpd_env->state;\n  task_desc->idx_max = HOGPD_IDX_MAX;\n}\n\n#endif /* #if (BLE_HID_DEVICE) */\n\n/// @} HOGPDTASK\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogprh/api/hogprh_task.h",
    "content": "#ifndef _HOGPRH_TASK_H_\n#define _HOGPRH_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HOGPRHTASK HID Over GATT Profile Report Host Task\n * @ingroup HOGPRH\n * @brief HID Over GATT Profile Report Host Task\n *\n * The HOGPRHTASK is responsible for handling the messages coming in and out of the\n * @ref HOGPRH monitor block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n#include \"hogp_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/// Maximal number of hids instances that can be handled\n#define HOGPRH_NB_HIDS_INST_MAX              (2)\n/// Maximal number of Report Char. that can be added in the DB for one HIDS - Up to 11\n#define HOGPRH_NB_REPORT_INST_MAX            (5)\n\n/// Maximal length of Report Map Char. Value\n#define HOGPRH_REPORT_MAP_MAX_LEN            (512)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\nenum hogprh_msg_id\n{\n    /// Start the HID Over GATT profile - at connection\n    HOGPRH_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_HOGPRH),\n    ///Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    HOGPRH_ENABLE_RSP,\n\n    /// Read Characteristic Value Request\n    HOGPRH_READ_INFO_REQ,\n    /// Read Characteristic Value Request\n    HOGPRH_READ_INFO_RSP,\n\n    /// Write/Configure peer device attribute Request\n    HOGPRH_WRITE_REQ,\n    /// Write/Configure peer device attribute Response\n    HOGPRH_WRITE_RSP,\n\n    /// Report value send to APP (after Notification)\n    HOGPRH_REPORT_IND,\n};\n\n\n/// Characteristics\nenum hogprh_chars\n{\n    /// Report Map\n    HOGPRH_CHAR_REPORT_MAP,\n    /// HID Information\n    HOGPRH_CHAR_HID_INFO,\n    /// HID Control Point\n    HOGPRH_CHAR_HID_CTNL_PT,\n    /// Protocol Mode\n    HOGPRH_CHAR_PROTOCOL_MODE,\n    /// Report\n    HOGPRH_CHAR_REPORT,\n\n    HOGPRH_CHAR_MAX = HOGPRH_CHAR_REPORT + HOGPRH_NB_REPORT_INST_MAX,\n};\n\n\n/// Characteristic descriptors\nenum hogprh_descs\n{\n    /// Report Map Char. External Report Reference Descriptor\n    HOGPRH_DESC_REPORT_MAP_EXT_REP_REF,\n    /// Report Char. Report Reference\n    HOGPRH_DESC_REPORT_REF,\n    /// Report Client Config\n    HOGPRH_DESC_REPORT_CFG = HOGPRH_DESC_REPORT_REF + HOGPRH_NB_REPORT_INST_MAX,\n\n    HOGPRH_DESC_MAX = HOGPRH_DESC_REPORT_CFG + HOGPRH_NB_REPORT_INST_MAX,\n};\n\n/// Peer HID service info that can be read/write\nenum hogprh_info\n{\n    /// Protocol Mode\n    HOGPRH_PROTO_MODE,\n    /// Report Map\n    HOGPRH_REPORT_MAP,\n    /// Report Map Char. External Report Reference Descriptor\n    HOGPRH_REPORT_MAP_EXT_REP_REF,\n\n    /// HID Information\n    HOGPRH_HID_INFO,\n    /// HID Control Point\n    HOGPRH_HID_CTNL_PT,\n    /// Report\n    HOGPRH_REPORT,\n    /// Report Char. Report Reference\n    HOGPRH_REPORT_REF,\n    /// Report Notification config\n    HOGPRH_REPORT_NTF_CFG,\n\n    HOGPRH_INFO_MAX,\n};\n\n/*\n * APIs Structure\n ****************************************************************************************\n */\n\n\n///Structure containing the characteristics handles, value handles and descriptors\nstruct hogprh_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Included service info\n    struct prf_incl_svc incl_svc;\n\n    /// Characteristic info:\n    struct prf_char_inf chars[HOGPRH_CHAR_MAX];\n\n    /// Descriptor handles:\n    struct prf_char_desc_inf descs[HOGPRH_DESC_MAX];\n\n    /// Number of Report Char. that have been found\n    uint8_t report_nb;\n};\n\n\n/// Parameters of the @ref HOGPRH_ENABLE_REQ message\nstruct hogprh_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n\n    /// Number of HIDS instances\n    uint8_t hids_nb;\n    /// Existing handle values hids\n    struct hogprh_content hids[HOGPRH_NB_HIDS_INST_MAX];\n};\n\n/// Parameters of the @ref HOGPRH_ENABLE_RSP message\nstruct hogprh_enable_rsp\n{\n    ///status\n    uint8_t status;\n\n    /// Number of HIDS instances\n    uint8_t hids_nb;\n    /// Existing handle values hids\n    struct hogprh_content hids[HOGPRH_NB_HIDS_INST_MAX];\n};\n\n\n/// HID report info\nstruct hogprh_report\n{\n    /// Report Length\n    uint8_t length;\n    /// Report value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// HID report Reference\nstruct hogprh_report_ref\n{\n    /// Report ID\n    uint8_t id;\n    /// Report Type\n    uint8_t type;\n};\n\n/// HID report MAP info\nstruct hogprh_report_map\n{\n    /// Report MAP Length\n    uint16_t length;\n    /// Report MAP value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// HID report MAP reference\nstruct hogprh_report_map_ref\n{\n    /// Reference UUID length\n    uint8_t uuid_len;\n    /// Reference UUID Value\n    uint8_t uuid[__ARRAY_EMPTY];\n};\n\n/// Information data\nunion hogprh_data\n{\n    /// Protocol Mode\n    ///  - info = HOGPRH_PROTO_MODE\n    uint8_t proto_mode;\n\n    /// HID Information value\n    ///  - info = HOGPRH_HID_INFO\n    struct hids_hid_info hid_info;\n\n    /// HID Control Point value to write\n    ///  - info = HOGPRH_HID_CTNL_PT\n    uint8_t hid_ctnl_pt;\n\n    /// Report information\n    ///  - info = HOGPRH_REPORT\n    struct hogprh_report report;\n\n    ///Notification Configuration Value\n    ///  - info = HOGPRH_REPORT_NTF_CFG\n    uint16_t report_cfg;\n\n    /// HID report Reference\n    ///  - info = HOGPRH_REPORT_REF\n    struct hogprh_report_ref report_ref;\n\n    /// HID report MAP info\n    ///  - info = HOGPRH_REPORT_MAP\n    struct hogprh_report_map report_map;\n\n    /// HID report MAP reference\n    ///  - info = HOGPRH_REPORT_MAP_EXT_REP_REF\n    struct hogprh_report_map_ref report_map_ref;\n};\n\n\n\n///Parameters of the @ref HOGPRH_READ_INFO_REQ message\nstruct hogprh_read_info_req\n{\n    ///Characteristic info @see enum hogprh_info\n    uint8_t info;\n    /// HID Service Instance - From 0 to HOGPRH_NB_HIDS_INST_MAX-1\n    uint8_t hid_idx;\n    /// HID Report Index: only relevant for:\n    ///  - info = HOGPRH_REPORT\n    ///  - info = HOGPRH_REPORT_REF\n    ///  - info = HOGPRH_REPORT_NTF_CFG\n    uint8_t report_idx;\n};\n\n///Parameters of the @ref HOGPRH_READ_INFO_RSP message\nstruct hogprh_read_info_rsp\n{\n    /// status of the request\n    uint8_t status;\n    ///Characteristic info @see enum hogprh_info\n    uint8_t info;\n    /// HID Service Instance - From 0 to HOGPRH_NB_HIDS_INST_MAX-1\n    uint8_t hid_idx;\n    /// HID Report Index: only relevant for:\n    ///  - info = HOGPRH_REPORT\n    ///  - info = HOGPRH_REPORT_REF\n    ///  - info = HOGPRH_REPORT_NTF_CFG\n    uint8_t report_idx;\n    /// Information data\n    union hogprh_data data;\n};\n\n\n///Parameters of the @ref HOGPRH_WRITE_REQ message\nstruct hogprh_write_req\n{\n    ///Characteristic info @see enum hogprh_info\n    uint8_t info;\n    /// HID Service Instance - From 0 to HOGPRH_NB_HIDS_INST_MAX-1\n    uint8_t hid_idx;\n    /// HID Report Index: only relevant for:\n    ///  - info = HOGPRH_REPORT\n    ///  - info = HOGPRH_REPORT_NTF_CFG\n    uint8_t report_idx;\n    /// Write type ( Write without Response True or Write Request)\n    /// - only valid for HOGPRH_REPORT\n    bool    wr_cmd;\n    /// Information data\n    union hogprh_data data;\n};\n\n\n///Parameters of the @ref HOGPRH_WRITE_RSP message\nstruct hogprh_write_rsp\n{\n    /// status of the request\n    uint8_t status;\n    ///Characteristic info @see enum hogprh_info\n    uint8_t info;\n    /// HID Service Instance - From 0 to HOGPRH_NB_HIDS_INST_MAX-1\n    uint8_t hid_idx;\n    /// HID Report Index: only relevant for:\n    ///  - info = HOGPRH_REPORT\n    ///  - info = HOGPRH_REPORT_REF\n    ///  - info = HOGPRH_REPORT_NTF_CFG\n    uint8_t report_idx;\n};\n\n\n///Parameters of the @ref HOGPRH_BOOT_REPORT_IND message\nstruct hogprh_report_ind\n{\n    /// HIDS Instance\n    uint8_t hid_idx;\n    /// HID Report Index\n    uint8_t report_idx;\n    /// Report data\n    struct hogprh_report report;\n};\n\n/// @} HOGPRHTASK\n\n#endif /* _HOGPRH_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogprh/src/hogprh.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HOGPRH\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_HID_REPORT_HOST)\n\n#include \"co_math.h\"\n#include \"gap.h\"\n#include \"hogprh.h\"\n#include \"hogprh_task.h\"\n\n#include \"ke_mem.h\"\n\n/**\n ****************************************************************************************\n * @brief Initialization of the HOGPRH module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of datahide (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t hogprh_init(struct prf_task_env *env, uint16_t *start_hdl,\n                           uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct hogprh_env_tag *hogprh_env = (struct hogprh_env_tag *)ke_malloc(\n      sizeof(struct hogprh_env_tag), KE_MEM_ATT_DB);\n\n  // allocate HOGPRH required environment variable\n  env->env = (prf_env_t *)hogprh_env;\n\n  hogprh_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  hogprh_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_HOGPRH;\n  hogprh_task_init(&(env->desc));\n\n  for (idx = 0; idx < HOGPRH_IDX_MAX; idx++) {\n    hogprh_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), HOGPRH_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the HOGPRH module - due to a reset for instance.\n * This function clean-up allocated memory (attribute datahide is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void hogprh_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct hogprh_env_tag *hogprh_env = (struct hogprh_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < HOGPRH_IDX_MAX; idx++) {\n    if (hogprh_env->env[idx] != NULL) {\n      if (hogprh_env->env[idx]->operation != NULL) {\n        ke_free(hogprh_env->env[idx]->operation);\n      }\n      ke_free(hogprh_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(hogprh_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void hogprh_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put HID Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), HOGPRH_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void hogprh_cleanup(struct prf_task_env *env, uint8_t conidx,\n                           uint8_t reason) {\n  struct hogprh_env_tag *hogprh_env = (struct hogprh_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (hogprh_env->env[conidx] != NULL) {\n    if (hogprh_env->env[conidx]->operation != NULL) {\n      ke_free(hogprh_env->env[conidx]->operation);\n    }\n    ke_free(hogprh_env->env[conidx]);\n    hogprh_env->env[conidx] = NULL;\n  }\n\n  /* Put HID Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), HOGPRH_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// HOGPRH Task interface required by profile manager\nconst struct prf_task_cbs hogprh_itf = {\n    hogprh_init,\n    hogprh_destroy,\n    hogprh_create,\n    hogprh_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *hogprh_prf_itf_get(void) { return &hogprh_itf; }\n\nvoid hogprh_enable_rsp_send(struct hogprh_env_tag *hogprh_env, uint8_t conidx,\n                            uint8_t status) {\n  // Counter\n  uint8_t svc_inst;\n\n  // Send APP the details of the discovered attributes on HOGPRH\n  struct hogprh_enable_rsp *rsp = KE_MSG_ALLOC(\n      HOGPRH_ENABLE_RSP, prf_dst_task_get(&(hogprh_env->prf_env), conidx),\n      prf_src_task_get(&(hogprh_env->prf_env), conidx), hogprh_enable_rsp);\n  rsp->status = status;\n  rsp->hids_nb = 0;\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->hids_nb = hogprh_env->env[conidx]->hids_nb;\n\n    for (svc_inst = 0; svc_inst < co_min(hogprh_env->env[conidx]->hids_nb,\n                                         HOGPRH_NB_HIDS_INST_MAX);\n         svc_inst++) {\n      rsp->hids[svc_inst] = hogprh_env->env[conidx]->hids[svc_inst];\n\n      // Register HOGPRH task in gatt for indication/notifications\n      prf_register_atthdl2gatt(&(hogprh_env->prf_env), conidx,\n                               &hogprh_env->env[conidx]->hids[svc_inst].svc);\n    }\n  }\n\n  ke_msg_send(rsp);\n}\n\n#endif /* (BLE_HID_REPORT_HOST) */\n\n/// @} HOGPRH\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogprh/src/hogprh.h",
    "content": "#ifndef _HOGPRH_H_\n#define _HOGPRH_H_\n\n\n/**\n ****************************************************************************************\n * @addtogroup HOGPRH HID Over GATT Profile Report Host\n * @ingroup HOGP\n * @brief HID Over GATT Profile Report Host\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_HID_REPORT_HOST)\n\n#include \"hogp_common.h\"\n#include \"ke_task.h\"\n#include \"hogprh_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"prf.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of HID Over GATT Report Host task instances\n#define HOGPRH_IDX_MAX    (BLE_CONNECTION_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the HOGPRH task\nenum hogprh_state\n{\n    /// Disconnected state\n    HOGPRH_FREE,\n    /// IDLE state\n    HOGPRH_IDLE,\n    /// Busy State\n    HOGPRH_BUSY,\n    /// Number of defined states.\n    HOGPRH_STATE_MAX\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Environment variable for each Connections\nstruct hogprh_cnx_env\n{\n    /// on-going operation\n    struct ke_msg * operation;\n    ///HIDS characteristics\n    struct hogprh_content hids[HOGPRH_NB_HIDS_INST_MAX];\n    ///Number of HIDS instances found\n    uint8_t hids_nb;\n};\n\n/// HID Over Gatt Profile Boot Host environment variable\nstruct hogprh_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct hogprh_cnx_env* env[HOGPRH_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[HOGPRH_IDX_MAX];\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * GLOBAL FUNCTIONS DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve HID report host profile interface\n *\n * @return HID report host profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* hogprh_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send HID ATT DB discovery results to HOGPRH host.\n ****************************************************************************************\n */\nvoid hogprh_enable_rsp_send(struct hogprh_env_tag *hogprh_env, uint8_t conidx, uint8_t status);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid hogprh_task_init(struct ke_task_desc *task_desc);\n\n\n\n#endif /* (BLE_HID_REPORT_HOST) */\n\n/// @} HOGPRH\n\n#endif /* _HOGPRH_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hogp/hogprh/src/hogprh_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HOGPRHTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_HID_REPORT_HOST)\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc.h\"\n#include \"gattc_task.h\"\n#include \"hogp_common.h\"\n#include \"hogprh.h\"\n#include \"hogprh_task.h\"\n\n#include \"co_math.h\"\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL VARIABLES DEFINITION\n ****************************************************************************************\n */\n\n/// State machine used to retrieve HID Service characteristics information\nconst struct prf_char_def hogprh_hids_char[HOGPRH_CHAR_REPORT + 1] = {\n    /// Report Map\n    [HOGPRH_CHAR_REPORT_MAP] = {ATT_CHAR_REPORT_MAP, ATT_MANDATORY,\n                                ATT_CHAR_PROP_RD},\n    /// HID Information\n    [HOGPRH_CHAR_HID_INFO] = {ATT_CHAR_HID_INFO, ATT_MANDATORY,\n                              ATT_CHAR_PROP_RD},\n    /// HID Control Point\n    [HOGPRH_CHAR_HID_CTNL_PT] = {ATT_CHAR_HID_CTNL_PT, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_WR_NO_RESP},\n    /// Protocol Mode\n    [HOGPRH_CHAR_PROTOCOL_MODE] = {ATT_CHAR_PROTOCOL_MODE, ATT_OPTIONAL,\n                                   (ATT_CHAR_PROP_RD |\n                                    ATT_CHAR_PROP_WR_NO_RESP)},\n    /// Report\n    [HOGPRH_CHAR_REPORT] = {ATT_CHAR_REPORT, ATT_MANDATORY, ATT_CHAR_PROP_RD},\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPRH_ENABLE_REQ message.\n * The handler enables the HID Over GATT Profile Boot Host Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogprh_enable_req_handler(ke_msg_id_t const msgid,\n                                       struct hogprh_enable_req const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  int msg_status = KE_MSG_CONSUMED;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Battery service Client Role Task Environment\n  struct hogprh_env_tag *hogprh_env = PRF_ENV_GET(HOGPRH, hogprh);\n\n  ASSERT_INFO(hogprh_env != NULL, dest_id, src_id);\n  if ((state == HOGPRH_IDLE) && (hogprh_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    hogprh_env->env[conidx] = (struct hogprh_cnx_env *)ke_malloc(\n        sizeof(struct hogprh_cnx_env), KE_MEM_ATT_DB);\n    memset(hogprh_env->env[conidx], 0, sizeof(struct hogprh_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering HID on peer\n      prf_disc_svc_send(&(hogprh_env->prf_env), conidx, ATT_SVC_HID);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, HOGPRH_BUSY);\n      hogprh_env->env[conidx]->operation = ke_param2msg(param);\n      msg_status = KE_MSG_NO_FREE;\n    }\n    // normal connection, get saved att details\n    else {\n      hogprh_env->env[conidx]->hids_nb = param->hids_nb;\n      memcpy(&(hogprh_env->env[conidx]->hids[0]), &(param->hids[0]),\n             sizeof(struct hogprh_content) * HOGPRH_NB_HIDS_INST_MAX);\n\n      // send APP confirmation that can start normal connection to TH\n      hogprh_enable_rsp_send(hogprh_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  } else if (state != HOGPRH_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    hogprh_enable_rsp_send(hogprh_env, conidx, status);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == HOGPRH_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct hogprh_env_tag *hogprh_env = PRF_ENV_GET(HOGPRH, hogprh);\n\n    ASSERT_INFO(hogprh_env != NULL, dest_id, src_id);\n    ASSERT_INFO(hogprh_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (hogprh_env->env[conidx]->hids_nb < HOGPRH_NB_HIDS_INST_MAX) {\n      uint8_t i;\n      struct prf_char_def hids_char[HOGPRH_CHAR_MAX];\n      struct prf_char_desc_def hids_char_desc[HOGPRH_DESC_MAX];\n      uint8_t hid_idx = hogprh_env->env[conidx]->hids_nb;\n      uint8_t fnd_att;\n\n      // 1. Create characteristic reference\n      memcpy(hids_char, hogprh_hids_char,\n             sizeof(struct prf_char_def) * HOGPRH_CHAR_REPORT);\n      for (i = HOGPRH_CHAR_REPORT; i < HOGPRH_CHAR_MAX; i++) {\n        hids_char[i] = hogprh_hids_char[HOGPRH_CHAR_REPORT];\n      }\n\n      // 2. create descriptor reference\n      // Report Map Char. External Report Reference Descriptor\n      hids_char_desc[HOGPRH_DESC_REPORT_MAP_EXT_REP_REF].char_code =\n          HOGPRH_CHAR_REPORT_MAP;\n      hids_char_desc[HOGPRH_DESC_REPORT_MAP_EXT_REP_REF].req_flag =\n          ATT_OPTIONAL;\n      hids_char_desc[HOGPRH_DESC_REPORT_MAP_EXT_REP_REF].uuid =\n          ATT_DESC_EXT_REPORT_REF;\n\n      for (i = 0; i < HOGPRH_NB_REPORT_INST_MAX; i++) {\n        // Report Char. Report Reference\n        hids_char_desc[HOGPRH_DESC_REPORT_REF + i].char_code =\n            HOGPRH_CHAR_REPORT + i;\n        hids_char_desc[HOGPRH_DESC_REPORT_REF + i].req_flag = ATT_OPTIONAL;\n        hids_char_desc[HOGPRH_DESC_REPORT_REF + i].uuid = ATT_DESC_REPORT_REF;\n        // Report Client Config\n        hids_char_desc[HOGPRH_DESC_REPORT_CFG + i].char_code =\n            HOGPRH_CHAR_REPORT + i;\n        hids_char_desc[HOGPRH_DESC_REPORT_CFG + i].req_flag = ATT_OPTIONAL;\n        hids_char_desc[HOGPRH_DESC_REPORT_CFG + i].uuid =\n            ATT_DESC_CLIENT_CHAR_CFG;\n      }\n\n      // 3. Retrieve HID characteristics\n      prf_extract_svc_info(ind, HOGPRH_CHAR_MAX, &hids_char[0],\n                           &(hogprh_env->env[conidx]->hids[hid_idx].chars[0]),\n                           HOGPRH_DESC_MAX, &hids_char_desc[0],\n                           &(hogprh_env->env[conidx]->hids[hid_idx].descs[0]));\n\n      // 4. Store service range\n      hogprh_env->env[conidx]->hids[hid_idx].svc.shdl = ind->start_hdl;\n      hogprh_env->env[conidx]->hids[hid_idx].svc.ehdl = ind->end_hdl;\n\n      // 5. Search for an included service\n      for (fnd_att = 0; fnd_att < (ind->end_hdl - ind->start_hdl); fnd_att++) {\n        if (ind->info[fnd_att].att_type == GATTC_SDP_INC_SVC) {\n          hogprh_env->env[conidx]->hids[hid_idx].incl_svc.handle =\n              ind->start_hdl + fnd_att + 1;\n          hogprh_env->env[conidx]->hids[hid_idx].incl_svc.start_hdl =\n              ind->info[fnd_att].inc_svc.start_hdl;\n          hogprh_env->env[conidx]->hids[hid_idx].incl_svc.end_hdl =\n              ind->info[fnd_att].inc_svc.end_hdl;\n          hogprh_env->env[conidx]->hids[hid_idx].incl_svc.uuid_len =\n              ind->info[fnd_att].inc_svc.uuid_len;\n          memcpy(hogprh_env->env[conidx]->hids[hid_idx].incl_svc.uuid,\n                 ind->info[fnd_att].inc_svc.uuid,\n                 ind->info[fnd_att].inc_svc.uuid_len);\n        }\n        if ((ind->info[fnd_att].att_type == GATTC_SDP_ATT_VAL) &&\n            (attm_uuid16_comp((uint8_t *)ind->info[fnd_att].att.uuid,\n                              ind->info[fnd_att].att.uuid_len,\n                              ATT_CHAR_REPORT))) {\n          hogprh_env->env[conidx]->hids[hid_idx].report_nb++;\n        }\n      }\n\n      hogprh_env->env[conidx]->hids_nb++;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPRH_READ_INFO_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogprh_read_info_req_handler(\n    ke_msg_id_t const msgid, struct hogprh_read_info_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == HOGPRH_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct hogprh_env_tag *hogprh_env = PRF_ENV_GET(HOGPRH, hogprh);\n    ASSERT_INFO(hogprh_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (hogprh_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    }\n    // check parameter range\n    else if ((param->hid_idx > hogprh_env->env[conidx]->hids_nb) ||\n             (param->report_idx >= HOGPRH_NB_REPORT_INST_MAX)) {\n      status = PRF_ERR_INVALID_PARAM;\n    } else {\n      uint16_t handle = ATT_INVALID_HANDLE;\n      status = PRF_ERR_INEXISTENT_HDL;\n\n      // check requested info\n      switch (param->info) {\n      /// Protocol Mode\n      case HOGPRH_PROTO_MODE: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPRH_CHAR_PROTOCOL_MODE]\n                     .val_hdl;\n      } break;\n      /// Report Map\n      case HOGPRH_REPORT_MAP: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPRH_CHAR_REPORT_MAP]\n                     .val_hdl;\n      } break;\n      /// Report Map Char. External Report Reference Descriptor\n      case HOGPRH_REPORT_MAP_EXT_REP_REF: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .descs[HOGPRH_DESC_REPORT_MAP_EXT_REP_REF]\n                     .desc_hdl;\n      } break;\n      /// HID Information\n      case HOGPRH_HID_INFO: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPRH_CHAR_HID_INFO]\n                     .val_hdl;\n      } break;\n      /// Report\n      case HOGPRH_REPORT: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPRH_CHAR_REPORT + param->report_idx]\n                     .val_hdl;\n      } break;\n      /// Report Char. Report Reference\n      case HOGPRH_REPORT_REF: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .descs[HOGPRH_DESC_REPORT_REF + param->report_idx]\n                     .desc_hdl;\n      } break;\n      /// Report Notification config\n      case HOGPRH_REPORT_NTF_CFG: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .descs[HOGPRH_DESC_REPORT_CFG + param->report_idx]\n                     .desc_hdl;\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      if (handle != ATT_INVALID_HANDLE) {\n        status = GAP_ERR_NO_ERROR;\n        // read information\n        prf_read_char_send(\n            &(hogprh_env->prf_env), conidx,\n            hogprh_env->env[conidx]->hids[param->hid_idx].svc.shdl,\n            hogprh_env->env[conidx]->hids[param->hid_idx].svc.ehdl, handle);\n\n        // store context of request and go into busy state\n        hogprh_env->env[conidx]->operation = ke_param2msg(param);\n        ke_state_set(dest_id, HOGPRH_BUSY);\n        msg_status = KE_MSG_NO_FREE;\n      }\n    }\n  }\n  // process message later\n  else if (state == HOGPRH_BUSY) {\n    status = GAP_ERR_NO_ERROR;\n    msg_status = KE_MSG_SAVED;\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct hogprh_read_info_rsp *rsp = KE_MSG_ALLOC(\n        HOGPRH_READ_INFO_RSP, src_id, dest_id, hogprh_read_info_rsp);\n    // set error status\n    rsp->status = status;\n    rsp->info = param->info;\n    rsp->hid_idx = param->hid_idx;\n\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HOGPRH_WRITE_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hogprh_write_req_handler(ke_msg_id_t const msgid,\n                                      struct hogprh_write_req *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (state == HOGPRH_IDLE) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct hogprh_env_tag *hogprh_env = PRF_ENV_GET(HOGPRH, hogprh);\n    ASSERT_INFO(hogprh_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (hogprh_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    }\n    // check parameter range\n    else if ((param->hid_idx > hogprh_env->env[conidx]->hids_nb) ||\n             (param->report_idx >= HOGPRH_NB_REPORT_INST_MAX) ||\n             (param->info > HOGPRH_INFO_MAX) ||\n             ((param->info == HOGPRH_REPORT_NTF_CFG) &&\n              (param->data.report_cfg > PRF_CLI_START_NTF))) {\n      status = PRF_ERR_INVALID_PARAM;\n    } else {\n      uint16_t handle = ATT_INVALID_HANDLE;\n      status = PRF_ERR_INEXISTENT_HDL;\n\n      // check requested info\n      switch (param->info) {\n      // Protocol Mode\n      case HOGPRH_PROTO_MODE: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPRH_CHAR_PROTOCOL_MODE]\n                     .val_hdl;\n        prf_gatt_write(&hogprh_env->prf_env, conidx, handle,\n                       (uint8_t *)¶m->data.proto_mode, 1,\n                       GATTC_WRITE_NO_RESPONSE);\n      } break;\n      // HID Control Point\n      case HOGPRH_HID_CTNL_PT: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPRH_CHAR_HID_CTNL_PT]\n                     .val_hdl;\n        prf_gatt_write(&hogprh_env->prf_env, conidx, handle,\n                       (uint8_t *)¶m->data.hid_ctnl_pt, 1,\n                       GATTC_WRITE_NO_RESPONSE);\n      } break;\n      // Report Char. Report Reference\n      case HOGPRH_REPORT: {\n        // Get MTU to select between GATT_WRITE_LONG_CHAR and GATT_WRITE_CHAR\n        if (param->data.report.length > (gattc_get_mtu(conidx) - 3)) {\n          param->wr_cmd = false;\n        }\n\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .chars[HOGPRH_CHAR_REPORT + param->report_idx]\n                     .val_hdl;\n        prf_gatt_write(&hogprh_env->prf_env, conidx, handle,\n                       (uint8_t *)param->data.report.value,\n                       param->data.report.length,\n                       (param->wr_cmd ? GATTC_WRITE_NO_RESPONSE : GATTC_WRITE));\n      } break;\n      // Report Notification config\n      case HOGPRH_REPORT_NTF_CFG: {\n        handle = hogprh_env->env[conidx]\n                     ->hids[param->hid_idx]\n                     .descs[HOGPRH_DESC_REPORT_CFG + param->report_idx]\n                     .desc_hdl;\n        prf_gatt_write_ntf_ind(&hogprh_env->prf_env, conidx, handle,\n                               param->data.report_cfg);\n      } break;\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      if (handle != ATT_INVALID_HANDLE) {\n        status = GAP_ERR_NO_ERROR;\n\n        // store context of request and go into busy state\n        hogprh_env->env[conidx]->operation = ke_param2msg(param);\n        ke_state_set(dest_id, HOGPRH_BUSY);\n        msg_status = KE_MSG_NO_FREE;\n      }\n    }\n  }\n  // process message later\n  else if (state == HOGPRH_BUSY) {\n    status = GAP_ERR_NO_ERROR;\n    msg_status = KE_MSG_SAVED;\n  }\n\n  // request cannot be performed\n  if (status != GAP_ERR_NO_ERROR) {\n    struct hogprh_write_rsp *rsp =\n        KE_MSG_ALLOC(HOGPRH_WRITE_RSP, src_id, dest_id, hogprh_write_rsp);\n    // set error status\n    rsp->status = status;\n    rsp->info = param->info;\n    rsp->hid_idx = param->hid_idx;\n\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct hogprh_env_tag *hogprh_env = PRF_ENV_GET(HOGPRH, hogprh);\n\n  // sanity check\n  if ((state == HOGPRH_BUSY) && (hogprh_env->env[conidx] != NULL) &&\n      (hogprh_env->env[conidx]->operation != NULL)) {\n    switch (hogprh_env->env[conidx]->operation->id) {\n    case HOGPRH_ENABLE_REQ: {\n      uint8_t status = param->status;\n\n      if (param->status == ATT_ERR_NO_ERROR) {\n        // check characteristic validity\n        if (hogprh_env->env[conidx]->hids_nb > 0) {\n          uint8_t report_idx;\n          uint8_t hid_idx;\n          for (hid_idx = 0; (hid_idx < co_min(hogprh_env->env[conidx]->hids_nb,\n                                              HOGPRH_NB_HIDS_INST_MAX)) &&\n                            (status == GAP_ERR_NO_ERROR);\n               hid_idx++) {\n\n            struct prf_char_def hids_char[HOGPRH_CHAR_MAX];\n            struct prf_char_desc_def hids_char_desc[HOGPRH_DESC_MAX];\n\n            // 1. Create characteristic reference\n            memcpy(hids_char, hogprh_hids_char,\n                   sizeof(struct prf_char_def) * HOGPRH_CHAR_REPORT);\n            for (report_idx = HOGPRH_CHAR_REPORT; report_idx < HOGPRH_CHAR_MAX;\n                 report_idx++) {\n              hids_char[report_idx] = hogprh_hids_char[HOGPRH_CHAR_REPORT];\n              hids_char[report_idx].req_flag = ATT_OPTIONAL;\n            }\n\n            // 2. create descriptor reference\n            // Report Map Char. External Report Reference Descriptor\n            hids_char_desc[HOGPRH_DESC_REPORT_MAP_EXT_REP_REF].char_code =\n                HOGPRH_CHAR_REPORT_MAP;\n            hids_char_desc[HOGPRH_DESC_REPORT_MAP_EXT_REP_REF].req_flag =\n                ATT_OPTIONAL;\n            hids_char_desc[HOGPRH_DESC_REPORT_MAP_EXT_REP_REF].uuid =\n                ATT_DESC_EXT_REPORT_REF;\n\n            for (report_idx = 0; report_idx < HOGPRH_NB_REPORT_INST_MAX;\n                 report_idx++) {\n              // Report Char. Report Reference\n              hids_char_desc[HOGPRH_DESC_REPORT_REF + report_idx].char_code =\n                  HOGPRH_CHAR_REPORT + report_idx;\n              hids_char_desc[HOGPRH_DESC_REPORT_REF + report_idx].req_flag =\n                  ATT_OPTIONAL;\n              hids_char_desc[HOGPRH_DESC_REPORT_REF + report_idx].uuid =\n                  ATT_DESC_REPORT_REF;\n              // Report Client Config\n              hids_char_desc[HOGPRH_DESC_REPORT_CFG + report_idx].char_code =\n                  HOGPRH_CHAR_REPORT + report_idx;\n              hids_char_desc[HOGPRH_DESC_REPORT_CFG + report_idx].req_flag =\n                  ATT_OPTIONAL;\n              hids_char_desc[HOGPRH_DESC_REPORT_CFG + report_idx].uuid =\n                  ATT_DESC_CLIENT_CHAR_CFG;\n            }\n\n            // 3. Check Characteristic validity\n            status = prf_check_svc_char_validity(\n                HOGPRH_CHAR_MAX, hogprh_env->env[conidx]->hids[hid_idx].chars,\n                hids_char);\n\n            // 4. check descriptor validity\n            if (status == GAP_ERR_NO_ERROR) {\n              status = prf_check_svc_char_desc_validity(\n                  HOGPRH_DESC_MAX, hogprh_env->env[conidx]->hids[hid_idx].descs,\n                  hids_char_desc, hogprh_env->env[conidx]->hids[hid_idx].chars);\n            }\n          }\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n      }\n      hogprh_enable_rsp_send(hogprh_env, conidx, status);\n    } break;\n    case HOGPRH_READ_INFO_REQ: {\n      // do not send anything if it's a local request\n      if (hogprh_env->env[conidx]->operation->src_id != dest_id) {\n        struct hogprh_read_info_req *req =\n            (struct hogprh_read_info_req *)ke_msg2param(\n                hogprh_env->env[conidx]->operation);\n        struct hogprh_read_info_rsp *rsp =\n            KE_MSG_ALLOC(HOGPRH_READ_INFO_RSP,\n                         prf_dst_task_get(&(hogprh_env->prf_env), conidx),\n                         dest_id, hogprh_read_info_rsp);\n        // set error status\n        rsp->status = param->status;\n        rsp->hid_idx = req->hid_idx;\n        rsp->info = req->info;\n        rsp->report_idx = req->report_idx;\n\n        ke_msg_send(rsp);\n      }\n\n    } break;\n    case HOGPRH_WRITE_REQ: {\n      struct hogprh_write_req *req = (struct hogprh_write_req *)ke_msg2param(\n          hogprh_env->env[conidx]->operation);\n\n      struct hogprh_write_rsp *rsp = KE_MSG_ALLOC(\n          HOGPRH_WRITE_RSP, prf_dst_task_get(&(hogprh_env->prf_env), conidx),\n          dest_id, hogprh_write_rsp);\n      // set error status\n      rsp->status = param->status;\n      rsp->hid_idx = req->hid_idx;\n      rsp->info = req->info;\n      rsp->report_idx = req->report_idx;\n\n      ke_msg_send(rsp);\n    } break;\n    default: {\n      // Not Expected at all\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    // operation is over - go back to idle state\n    ke_free(hogprh_env->env[conidx]->operation);\n    hogprh_env->env[conidx]->operation = NULL;\n    ke_state_set(dest_id, HOGPRH_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == HOGPRH_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct hogprh_env_tag *hogprh_env = PRF_ENV_GET(HOGPRH, hogprh);\n    struct hogprh_read_info_req *req =\n        (struct hogprh_read_info_req *)ke_msg2param(\n            hogprh_env->env[conidx]->operation);\n\n    ASSERT_INFO(hogprh_env != NULL, dest_id, src_id);\n    ASSERT_INFO(hogprh_env->env[conidx] != NULL, dest_id, src_id);\n\n    // check if read is requested locally due to a received notification or b\n    if (hogprh_env->env[conidx]->operation->src_id == dest_id) {\n      // send report indication\n      struct hogprh_report_ind *ind = KE_MSG_ALLOC_DYN(\n          HOGPRH_REPORT_IND, prf_dst_task_get(&(hogprh_env->prf_env), conidx),\n          dest_id, hogprh_report_ind, param->length);\n\n      ind->hid_idx = req->hid_idx;\n      ind->report_idx = req->report_idx;\n      ind->report.length = param->length;\n      memcpy(ind->report.value, param->value, param->length);\n\n      ke_msg_send(ind);\n    }\n    // or by the HID Client application\n    else {\n      struct hogprh_read_info_rsp *rsp =\n          KE_MSG_ALLOC_DYN(HOGPRH_READ_INFO_RSP,\n                           prf_dst_task_get(&(hogprh_env->prf_env), conidx),\n                           dest_id, hogprh_read_info_rsp, param->length);\n\n      // set error status\n      rsp->status = GAP_ERR_NO_ERROR;\n      rsp->hid_idx = req->hid_idx;\n      rsp->info = req->info;\n      rsp->report_idx = req->report_idx;\n\n      switch (req->info) {\n      /// Protocol Mode\n      case HOGPRH_PROTO_MODE: {\n        rsp->data.proto_mode = param->value[0];\n      } break;\n      /// Report Map\n      case HOGPRH_REPORT_MAP: {\n        rsp->data.report_map.length = param->length;\n        memcpy(rsp->data.report_map.value, param->value, param->length);\n      } break;\n      /// Report Map Char. External Report Reference Descriptor\n      case HOGPRH_REPORT_MAP_EXT_REP_REF: {\n        rsp->data.report_map_ref.uuid_len = param->length;\n        memcpy(rsp->data.report_map_ref.uuid, param->value,\n               co_min(param->length, ATT_UUID_128_LEN));\n      } break;\n      /// HID Information\n      case HOGPRH_HID_INFO: {\n        rsp->data.hid_info.bcdHID = co_read16p(param->value);\n        rsp->data.hid_info.bCountryCode = param->value[2];\n        rsp->data.hid_info.flags = param->value[3];\n      } break;\n      /// Report\n      case HOGPRH_REPORT: {\n        rsp->data.report.length = param->length;\n        memcpy(rsp->data.report.value, param->value, param->length);\n      } break;\n      /// Report Char. Report Reference\n      case HOGPRH_REPORT_REF: {\n        rsp->data.report_ref.id = param->value[0];\n        rsp->data.report_ref.type = param->value[1];\n      } break;\n      /// Report Notification config\n      case HOGPRH_REPORT_NTF_CFG: {\n        rsp->data.report_cfg = co_read16p(param->value);\n      } break;\n      default: {\n        ASSERT_ERR(0);\n      } break;\n      }\n\n      // send response\n      ke_msg_send(rsp);\n    }\n\n    // operation is over - go back to idle state\n    ke_free(hogprh_env->env[conidx]->operation);\n    hogprh_env->env[conidx]->operation = NULL;\n    ke_state_set(dest_id, HOGPRH_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state != HOGPRH_FREE) {\n    // HID Instance\n    uint8_t hid_nb;\n    uint8_t report_idx;\n    uint8_t conidx = KE_IDX_GET(src_id);\n    bool finished = false;\n    // Get the address of the environment\n    struct hogprh_env_tag *hogprh_env = PRF_ENV_GET(HOGPRH, hogprh);\n\n    // BOOT Report - HID instance is unknown.\n    for (hid_nb = 0; (hid_nb < hogprh_env->env[conidx]->hids_nb) && !finished;\n         hid_nb++) {\n      for (report_idx = 0;\n           (report_idx < HOGPRH_NB_REPORT_INST_MAX) && !finished;\n           report_idx++) {\n        if (param->handle == hogprh_env->env[conidx]\n                                 ->hids[hid_nb]\n                                 .chars[HOGPRH_CHAR_REPORT + report_idx]\n                                 .val_hdl) {\n\n          // Check if size of the data is lower than [ATT_MTU-3]\n          if (param->length < (gattc_get_mtu(conidx) - 3)) {\n            // send report indication\n            struct hogprh_report_ind *ind = KE_MSG_ALLOC_DYN(\n                HOGPRH_REPORT_IND,\n                prf_dst_task_get(&(hogprh_env->prf_env), conidx), dest_id,\n                hogprh_report_ind, param->length);\n\n            ind->hid_idx = hid_nb;\n            ind->report_idx = report_idx;\n            ind->report.length = param->length;\n            memcpy(ind->report.value, param->value, param->length);\n\n            ke_msg_send(ind);\n          } else {\n            // data is maybe incomplete so perform an attribute read\n            struct hogprh_read_info_req *req = KE_MSG_ALLOC(\n                HOGPRH_READ_INFO_REQ, dest_id, dest_id, hogprh_read_info_req);\n\n            req->info = HOGPRH_REPORT;\n            req->hid_idx = hid_nb;\n            req->report_idx = report_idx;\n\n            ke_msg_send(req);\n          }\n\n          finished = true;\n        }\n      }\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(hogprh){\n    {HOGPRH_ENABLE_REQ, (ke_msg_func_t)hogprh_enable_req_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n\n    {HOGPRH_READ_INFO_REQ, (ke_msg_func_t)hogprh_read_info_req_handler},\n    {HOGPRH_WRITE_REQ, (ke_msg_func_t)hogprh_write_req_handler},\n\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid hogprh_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct hogprh_env_tag *hogprh_env = PRF_ENV_GET(HOGPRH, hogprh);\n\n  task_desc->msg_handler_tab = hogprh_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(hogprh_msg_handler_tab);\n  task_desc->state = hogprh_env->state;\n  task_desc->idx_max = HOGPRH_IDX_MAX;\n}\n\n#endif /* (BLE_HID_REPORT_HOST) */\n\n/// @} HOGPRHTASK\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrp_common.h",
    "content": "#ifndef _HRP_COMMON_H_\n#define _HRP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HRP Heart Rate Profile\n * @ingroup PROFILE\n * @brief Heart Rate Profile\n *\n * The HRP module is the responsible block for implementing the Heart Rate Profile\n * functionalities in the BLE Host.\n *\n * The Heart Rate Profile defines the functionality required in a device that allows\n * the user (Collector device) to configure and recover Heart Rate measurements from\n * a Heart Rate device.\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"prf_types.h\"\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// maximum number of RR-Interval supported\n#define HRS_MAX_RR_INTERVAL  (4)\n\n/// Heart Rate Control Point Not Supported error code\n#define HRS_ERR_HR_CNTL_POINT_NOT_SUPPORTED   (0x80)\n\n///HRS codes for the 2 possible client configuration characteristic descriptors determination\nenum\n{\n    /// Heart Rate Measurement\n    HRS_HR_MEAS_CODE = 0x01,\n    /// Energy Expended - Heart Rate Control Point\n    HRS_HR_CNTL_POINT_CODE,\n};\n\n\n/// Heart Rate Measurement Flags field bit values\nenum\n{\n    /// Heart Rate Value Format bit\n    /// Heart Rate Value Format is set to UINT8. Units: beats per minute (bpm)\n    HRS_FLAG_HR_8BITS_VALUE                = 0x00,\n    /// Heart Rate Value Format is set to UINT16. Units: beats per minute (bpm)\n    HRS_FLAG_HR_16BITS_VALUE               = 0x01,\n\n    /// Sensor Contact Status bits\n    /// Sensor Contact feature is not supported in the current connection\n    HRS_FLAG_SENSOR_CCT_FET_NOT_SUPPORTED  = 0x00,\n    /// Sensor Contact feature supported in the current connection\n    HRS_FLAG_SENSOR_CCT_FET_SUPPORTED      = 0x04,\n    /// Contact is not detected\n    HRS_FLAG_SENSOR_CCT_NOT_DETECTED       = 0x00,\n    /// Contact is detected\n    HRS_FLAG_SENSOR_CCT_DETECTED           = 0x02,\n\n    /// Energy Expended Status bit\n    /// Energy Expended field is not present\n    HRS_FLAG_ENERGY_EXPENDED_NOT_PRESENT   = 0x00,\n    /// Energy Expended field is present. Units: kilo Joules\n    HRS_FLAG_ENERGY_EXPENDED_PRESENT       = 0x08,\n\n    /// RR-Interval bit\n    /// RR-Interval values are not present.\n    HRS_FLAG_RR_INTERVAL_NOT_PRESENT       = 0x00,\n    /// One or more RR-Interval values are present. Units: 1/1024 seconds\n    HRS_FLAG_RR_INTERVAL_PRESENT           = 0x10,\n};\n\n/// Heart Rate Feature Flags field bit values\nenum\n{\n    /// Body Sensor Location support bit\n    /// Body Sensor Location feature Not Supported\n    HRS_F_BODY_SENSOR_LOCATION_NOT_SUPPORTED     = 0x00,\n    /// Body Sensor Location feature Supported\n    HRS_F_BODY_SENSOR_LOCATION_SUPPORTED         = 0x01,\n\n    /// Energy Expended support bit\n    /// Energy Expended feature Not Supported\n    HRS_F_ENERGY_EXPENDED_NOT_SUPPORTED          = 0x00,\n    /// Energy Expended feature Supported\n    HRS_F_ENERGY_EXPENDED_SUPPORTED              = 0x02,\n};\n\n/// Body Sensor Location\nenum\n{\n    HRS_LOC_OTHER,\n    HRS_LOC_CHEST,\n    HRS_LOC_WRIST,\n    HRS_LOC_FINGER,\n    HRS_LOC_HAND,\n    HRS_LOC_EAR_LOBE,\n    HRS_LOC_FOOT,\n    HRS_LOC_MAX,\n};\n\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Heart Rate measurement structure\nstruct hrs_hr_meas\n{\n    /// Flag\n    uint8_t flags;\n    /// Heart Rate Measurement Value\n    uint16_t heart_rate;\n    /// Energy Expended\n    uint16_t energy_expended;\n    /// RR-Interval numbers (max 4)\n    uint8_t nb_rr_interval;\n    /// RR-Intervals\n    uint16_t rr_intervals[HRS_MAX_RR_INTERVAL];\n};\n\n\n/// @} hrp_common\n\n#endif /* _HRP_COMMON_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrpc/api/hrpc_task.h",
    "content": "#ifndef _HRPC_TASK_H_\n#define _HRPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HRPCTASK Heart Rate Profile Collector Task\n * @ingroup HRPC\n * @brief Heart Rate Profile Collector Task\n *\n * The HRPCTASK is responsible for handling the messages coming in and out of the\n * @ref HRPC monitor block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"hrp_common.h\"\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Characteristics\nenum\n{\n    /// Heart Rate Measurement\n    HRPC_CHAR_HR_MEAS,\n    /// Body Sensor Location\n    HRPC_CHAR_BODY_SENSOR_LOCATION,\n    /// Heart Rate Control Point\n    HRPC_CHAR_HR_CNTL_POINT,\n\n    HRPC_CHAR_MAX,\n};\n\n\n/// Characteristic descriptors\nenum\n{\n    /// Heart Rate Measurement client config\n    HRPC_DESC_HR_MEAS_CLI_CFG,\n    HRPC_DESC_MAX,\n    HRPC_DESC_MASK = 0x10,\n};\n\nenum\n{\n    /// Start the Heart Rate profile - at connection\n    HRPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_HRPC),\n    ///Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    HRPC_ENABLE_RSP,\n\n    /// Generic message to read a HRS or DIS characteristic value\n    HRPC_RD_CHAR_REQ,\n    ///Generic message for read responses for APP\n    HRPC_RD_CHAR_RSP,\n\n    ///Generic message for configuring the 2 characteristics that can be handled\n    HRPC_CFG_INDNTF_REQ,\n    ///Update IND/NTF config response\n    HRPC_CFG_INDNTF_RSP,\n\n    ///APP request for control point write (to reset Energy Expanded)\n    HRPC_WR_CNTL_POINT_REQ,\n    ///Write Control Point response\n    HRPC_WR_CNTL_POINT_RSP,\n\n    /// Heart Rate value send to APP\n    HRPC_HR_MEAS_IND,\n};\n\n///Structure containing the characteristics handles, value handles and descriptors\nstruct hrs_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// characteristic info:\n    ///  - Heart Rate Measurement\n    ///  - Body Sensor Location\n    ///  - Heart Rate Control Point\n    struct prf_char_inf chars[HRPC_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - Heart Rate Measurement client cfg\n    struct prf_char_desc_inf descs[HRPC_DESC_MAX];\n};\n\n/// Parameters of the @ref HRPC_ENABLE_REQ message\nstruct hrpc_enable_req\n{\n    ///Connection type\n    uint8_t con_type;\n    ///Existing handle values hrs\n    struct hrs_content hrs;\n};\n\n/// Parameters of the @ref HRPC_ENABLE_RSP message\nstruct hrpc_enable_rsp\n{\n    ///status\n    uint8_t status;\n    ///Existing handle values hrs\n    struct hrs_content hrs;\n};\n\n///Parameters of the @ref HRPC_CFG_INDNTF_REQ message\nstruct hrpc_cfg_indntf_req\n{\n    ///Stop/notify/indicate value to configure into the peer characteristic\n    uint16_t cfg_val;\n};\n\n\n///Parameters of the @ref HRPC_CFG_INDNTF_RSP message\nstruct hrpc_cfg_indntf_rsp\n{\n    ///Status\n    uint8_t  status;\n};\n\n///Parameters of the @ref HRPC_RD_CHAR_REQ message\nstruct hrpc_rd_char_req\n{\n    ///Characteristic value code\n    uint8_t  char_code;\n};\n\n///Parameters of the @ref HRPC_RD_CHAR_RSP message\nstruct hrpc_rd_char_rsp\n{\n    /// Attribute data information\n    struct prf_att_info info;\n};\n\n///Parameters of the @ref HRPC_WR_CNTL_POINT_REQ message\nstruct hrpc_wr_cntl_point_req\n{\n    ///value\n    uint8_t val;\n};\n\n///Parameters of the @ref HRPC_WR_CNTL_POINT_RSP message\nstruct hrpc_wr_cntl_point_rsp\n{\n    ///Status\n    uint8_t  status;\n};\n\n///Parameters of the @ref HRPC_HR_MEAS_IND message\nstruct hrpc_hr_meas_ind\n{\n    ///Heart Rate measurement\n    struct hrs_hr_meas meas_val;\n};\n\n/// @} HRPCTASK\n\n#endif /* _HRPC_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrpc/src/hrpc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HRPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HR_COLLECTOR)\n\n#include \"hrp_common.h\"\n#include \"hrpc.h\"\n#include \"hrpc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the HRPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t hrpc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct hrpc_env_tag *hrpc_env = (struct hrpc_env_tag *)ke_malloc(\n      sizeof(struct hrpc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate HRPC required environment variable\n  env->env = (prf_env_t *)hrpc_env;\n\n  hrpc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  hrpc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_HRPC;\n  hrpc_task_init(&(env->desc));\n\n  for (idx = 0; idx < HRPC_IDX_MAX; idx++) {\n    hrpc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), HRPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void hrpc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct hrpc_env_tag *hrpc_env = (struct hrpc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (hrpc_env->env[conidx] != NULL) {\n    ke_free(hrpc_env->env[conidx]);\n    hrpc_env->env[conidx] = NULL;\n  }\n\n  /* Put HRP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), HRPC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the HRPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void hrpc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct hrpc_env_tag *hrpc_env = (struct hrpc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < HRPC_IDX_MAX; idx++) {\n    hrpc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(hrpc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void hrpc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put HRP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), HRPC_IDLE);\n}\n\n/// HRPC Task interface required by profile manager\nconst struct prf_task_cbs hrpc_itf = {\n    hrpc_init,\n    hrpc_destroy,\n    hrpc_create,\n    hrpc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *hrpc_prf_itf_get(void) { return &hrpc_itf; }\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nvoid hrpc_enable_rsp_send(struct hrpc_env_tag *hrpc_env, uint8_t conidx,\n                          uint8_t status) {\n  // send APP the details of the discovered attributes on HTPT\n  struct hrpc_enable_rsp *rsp = KE_MSG_ALLOC(\n      HRPC_ENABLE_RSP, prf_dst_task_get(&(hrpc_env->prf_env), conidx),\n      prf_src_task_get(&(hrpc_env->prf_env), conidx), hrpc_enable_rsp);\n\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->hrs = hrpc_env->env[conidx]->hrs;\n    // register HRPC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&hrpc_env->prf_env, conidx,\n                             &hrpc_env->env[conidx]->hrs.svc);\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(hrpc_env->prf_env), conidx), HRPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nvoid hrpc_unpack_meas_value(struct hrs_hr_meas *pmeas_val, uint8_t *packed_hr,\n                            uint8_t size) {\n  int8_t cursor = 0;\n  int8_t i = 0;\n\n  // Heart Rate measurement flags\n  pmeas_val->flags = packed_hr[0];\n  cursor += 1;\n\n  if ((pmeas_val->flags & HRS_FLAG_HR_16BITS_VALUE) ==\n      HRS_FLAG_HR_16BITS_VALUE) {\n    // Heart Rate Measurement Value 16 bits\n    pmeas_val->heart_rate = co_read16p(&packed_hr[cursor]);\n    cursor += 2;\n  } else {\n    // Heart Rate Measurement Value 8 bits\n    pmeas_val->heart_rate = (uint16_t)packed_hr[cursor];\n    cursor += 1;\n  }\n\n  if ((pmeas_val->flags & HRS_FLAG_ENERGY_EXPENDED_PRESENT) ==\n      HRS_FLAG_ENERGY_EXPENDED_PRESENT) {\n    // Energy Expended present\n    pmeas_val->energy_expended = co_read16p(&packed_hr[cursor]);\n    cursor += 2;\n  }\n\n  // retrieve number of rr intervals\n  pmeas_val->nb_rr_interval =\n      ((size - cursor) > 0 ? ((size - cursor) / 2) : (0));\n\n  for (i = 0; (i < (pmeas_val->nb_rr_interval)) && (i < (HRS_MAX_RR_INTERVAL));\n       i++) {\n    // RR-Intervals\n    pmeas_val->rr_intervals[i] = co_read16p(&packed_hr[cursor]);\n    cursor += 2;\n  }\n}\n\nvoid hrpc_error_ind_send(struct hrpc_env_tag *hrpc_env, uint8_t conidx,\n                         uint8_t status) {}\n\n#endif /* (BLE_HR_COLLECTOR) */\n\n/// @} HRPC\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrpc/src/hrpc.h",
    "content": "#ifndef _HRPC_H_\n#define _HRPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HRPC Heart Rate Profile Collector\n * @ingroup HRP\n * @brief Heart Rate Profile Collector\n *\n * The HRPC is responsible for providing Heart Rate Profile Collector functionalities\n * to upper layer module or application. The device using this profile takes the role\n * of Heart Rate Profile Collector.\n *\n * Heart Rate Profile Collector. (HRPC): A HRPC (e.g. PC, phone, etc)\n * is the term used by this profile to describe a device that can interpret Heart Rate\n * measurement in a way suitable to the user application.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_HR_COLLECTOR)\n\n#include \"hrp_common.h\"\n#include \"hrpc_task.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of Heart Rate Collector task instances\n#define HRPC_IDX_MAX    (BLE_CONNECTION_MAX)\n\n/// Possible states of the HRPC task\nenum\n{\n    /// Free state\n    HRPC_FREE,\n    /// Idle state\n    HRPC_IDLE,\n    /// Discovering Heart Rate SVC and Chars\n    HRPC_DISCOVERING,\n    /// Busy state\n    HRPC_BUSY,\n\n    /// Number of defined states.\n    HRPC_STATE_MAX\n};\n\n/// Internal codes for reading a HRS or DIS characteristic with one single request\nenum\n{\n    ///Read HRS Heart Rate Measurement\n    HRPC_RD_HRS_HR_MEAS          = HRPC_CHAR_HR_MEAS,\n    ///Body Sensor Location\n    HRPC_RD_HRS_BODY_SENSOR_LOC  = HRPC_CHAR_BODY_SENSOR_LOCATION,\n    ///Heart Rate Control Point\n    HRPC_RD_HRS_CNTL_POINT       = HRPC_CHAR_HR_CNTL_POINT,\n\n    ///Read HRS Heart Rate Measurement Client Cfg. Desc\n    HRPC_RD_HRS_HR_MEAS_CFG      = (HRPC_DESC_MASK | HRPC_DESC_HR_MEAS_CLI_CFG),\n};\n\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\nstruct hrpc_cnx_env\n{\n    /// Current operation code\n    void *operation;\n    /// Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// Last characteristic code used in a read or a write request\n    uint16_t last_char_code;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n    ///HTS characteristics\n    struct hrs_content hrs;\n};\n\n/// Heart Rate Profile Collector environment variable\nstruct hrpc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connection\n    struct hrpc_cnx_env* env[HRPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[HRPC_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve HRP client profile interface\n * @return HRP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* hrpc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Heart Rate ATT DB discovery results to HRPC host.\n ****************************************************************************************\n */\nvoid hrpc_enable_rsp_send(struct hrpc_env_tag *hrpc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Unpack Heart Rate measurement data into a comprehensive structure.\n *\n * @param[out] pmeas_val  Pointer to Heart Rate measurement structure destination\n * @param[in]  packed_hr  Pointer of the packed data of Heart Rate Measurement\n *                        information\n * @param[in]  size       Packet data size\n ****************************************************************************************\n */\nvoid hrpc_unpack_meas_value(struct hrs_hr_meas* pmeas_val, uint8_t* packed_hr, uint8_t size);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid hrpc_task_init(struct ke_task_desc *task_desc);\n\n\n#endif /* (BLE_HR_COLLECTOR) */\n\n/// @} HRPC\n\n#endif /* _HRPC_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrpc/src/hrpc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HRPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"hrp_common.h\"\n#include \"rwip_config.h\"\n\n#if (BLE_HR_COLLECTOR)\n#include \"attm.h\"\n#include \"co_utils.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"hrpc.h\"\n#include \"hrpc_task.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve heart rate service characteristics\n/// information\nconst struct prf_char_def hrpc_hrs_char[HRPC_CHAR_MAX] = {\n    /// Heart Rate Measurement\n    [HRPC_CHAR_HR_MEAS] = {ATT_CHAR_HEART_RATE_MEAS, ATT_MANDATORY,\n                           ATT_CHAR_PROP_NTF},\n    /// Body Sensor Location\n    [HRPC_CHAR_BODY_SENSOR_LOCATION] = {ATT_CHAR_BODY_SENSOR_LOCATION,\n                                        ATT_OPTIONAL, ATT_CHAR_PROP_RD},\n    /// Heart Rate Control Point\n    [HRPC_CHAR_HR_CNTL_POINT] = {ATT_CHAR_HEART_RATE_CNTL_POINT, ATT_OPTIONAL,\n                                 ATT_CHAR_PROP_WR},\n};\n\n/// State machine used to retrieve heart rate service characteristic description\n/// information\nconst struct prf_char_desc_def hrpc_hrs_char_desc[HRPC_DESC_MAX] = {\n    /// Heart Rate Measurement client config\n    [HRPC_DESC_HR_MEAS_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                   HRPC_CHAR_HR_MEAS},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == HRPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n\n    ASSERT_INFO(hrpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(hrpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (hrpc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve HRS characteristics and descriptors\n      prf_extract_svc_info(ind, HRPC_CHAR_MAX, &hrpc_hrs_char[0],\n                           &hrpc_env->env[conidx]->hrs.chars[0], HRPC_DESC_MAX,\n                           &hrpc_hrs_char_desc[0],\n                           &hrpc_env->env[conidx]->hrs.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      hrpc_env->env[conidx]->hrs.svc.shdl = ind->start_hdl;\n      hrpc_env->env[conidx]->hrs.svc.ehdl = ind->end_hdl;\n    }\n\n    hrpc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HRPC_ENABLE_REQ message.\n * The handler enables the Heart Rate Profile Collector Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hrpc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct hrpc_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  uint8_t state = ke_state_get(dest_id);\n  // Heart Rate Profile Client Role Task Environment\n  struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n  ;\n\n  ASSERT_INFO(hrpc_env != NULL, dest_id, src_id);\n  // Config connection, start discovering\n  if ((state == HRPC_IDLE) && (hrpc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    hrpc_env->env[conidx] = (struct hrpc_cnx_env *)ke_malloc(\n        sizeof(struct hrpc_cnx_env), KE_MEM_ATT_DB);\n    memset(hrpc_env->env[conidx], 0, sizeof(struct hrpc_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering HRS on peer\n      prf_disc_svc_send(&(hrpc_env->prf_env), conidx, ATT_SVC_HEART_RATE);\n\n      hrpc_env->env[conidx]->last_uuid_req = ATT_SVC_HEART_RATE;\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, HRPC_DISCOVERING);\n    }\n    // normal connection, get saved att details\n    else {\n      hrpc_env->env[conidx]->hrs = param->hrs;\n      // send APP confirmation that can start normal connection to TH\n      hrpc_enable_rsp_send(hrpc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    hrpc_enable_rsp_send(hrpc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n  // Status\n  uint8_t status;\n\n  if (hrpc_env != NULL) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    uint8_t state = ke_state_get(dest_id);\n\n    if (state == HRPC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (hrpc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity(\n              HRPC_CHAR_MAX, hrpc_env->env[conidx]->hrs.chars, hrpc_hrs_char);\n        }\n        // too much services\n        else if (hrpc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              HRPC_DESC_MAX, hrpc_env->env[conidx]->hrs.descs,\n              hrpc_hrs_char_desc, hrpc_env->env[conidx]->hrs.chars);\n        }\n      }\n\n      hrpc_enable_rsp_send(hrpc_env, conidx, status);\n    }\n\n    else if (state == HRPC_BUSY) {\n      switch (param->operation) {\n      case GATTC_WRITE:\n      case GATTC_WRITE_NO_RESPONSE: {\n        uint16_t rsp_msg_id = HRPC_CFG_INDNTF_RSP;\n        if (hrpc_env->env[conidx]->last_char_code !=\n            HRPC_DESC_HR_MEAS_CLI_CFG) {\n          rsp_msg_id = HRPC_WR_CNTL_POINT_RSP;\n        }\n\n        struct hrpc_cfg_indntf_rsp *rsp = KE_MSG_ALLOC(\n            rsp_msg_id, prf_dst_task_get(&(hrpc_env->prf_env), conidx), dest_id,\n            hrpc_cfg_indntf_rsp);\n        rsp->status = param->status;\n        // Send the message\n        ke_msg_send(rsp);\n      } break;\n\n      case GATTC_READ: {\n        if (param->status != GAP_ERR_NO_ERROR) {\n          // an error occurs while reading peer device attribute\n          prf_client_att_info_rsp((prf_env_t *)hrpc_env->env[conidx], conidx,\n                                  HRPC_RD_CHAR_RSP, param->status, NULL);\n        }\n      } break;\n\n      default:\n        break;\n      }\n\n      ke_state_set(prf_src_task_get(&hrpc_env->prf_env, conidx), HRPC_IDLE);\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HRPC_RD_DATETIME_REQ message.\n * Check if the handle exists in profile(already discovered) and send request,\n *otherwise error to APP.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hrpc_rd_char_req_handler(ke_msg_id_t const msgid,\n                                      struct hrpc_rd_char_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (state == HRPC_IDLE) {\n    ASSERT_INFO(hrpc_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (hrpc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else {\n      uint16_t search_hdl = ATT_INVALID_SEARCH_HANDLE;\n\n      if (((param->char_code & HRPC_DESC_MASK) == HRPC_DESC_MASK) &&\n          ((param->char_code & ~HRPC_DESC_MASK) < HRPC_DESC_MAX)) {\n        search_hdl = hrpc_env->env[conidx]\n                         ->hrs.descs[param->char_code & ~HRPC_DESC_MASK]\n                         .desc_hdl;\n      } else if (param->char_code < HRPC_CHAR_MAX) {\n        search_hdl = hrpc_env->env[conidx]->hrs.chars[param->char_code].val_hdl;\n      }\n\n      // check if handle is viable\n      if (search_hdl != ATT_INVALID_SEARCH_HANDLE) {\n        // Store the command\n        hrpc_env->env[conidx]->last_char_code = param->char_code;\n        // Send the read request\n        prf_read_char_send(&(hrpc_env->prf_env), conidx,\n                           hrpc_env->env[conidx]->hrs.svc.shdl,\n                           hrpc_env->env[conidx]->hrs.svc.ehdl, search_hdl);\n\n        // Go to the Busy state\n        ke_state_set(dest_id, HRPC_BUSY);\n\n        status = ATT_ERR_NO_ERROR;\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    }\n  } else if (state == HRPC_FREE) {\n    status = GAP_ERR_DISCONNECTED;\n  } else {\n    // Another procedure is pending, keep the command for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    prf_client_att_info_rsp(&hrpc_env->prf_env, conidx, HRPC_RD_CHAR_RSP,\n                            status, NULL);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  prf_client_att_info_rsp(&hrpc_env->prf_env, conidx, HRPC_RD_CHAR_RSP,\n                          GAP_ERR_NO_ERROR, param);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HRPC_CFG_INDNTF_REQ message.\n * It allows configuration of the peer ind/ntf/stop characteristic for a\n *specified characteristic. Will return an error code if that cfg char does not\n *exist.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hrpc_cfg_indntf_req_handler(\n    ke_msg_id_t const msgid, struct hrpc_cfg_indntf_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == HRPC_IDLE) {\n    if (hrpc_env->env[conidx] != NULL) {\n\n      // Status\n      status = PRF_ERR_INVALID_PARAM;\n      // Check if parameter is OK\n      if ((param->cfg_val == PRF_CLI_STOP_NTFIND) ||\n          (param->cfg_val == PRF_CLI_START_NTF)) {\n        // Status\n        status = PRF_ERR_INEXISTENT_HDL;\n        // Get handle of the client configuration\n        uint16_t cfg_hdl = hrpc_env->env[conidx]\n                               ->hrs.descs[HRPC_DESC_HR_MEAS_CLI_CFG]\n                               .desc_hdl;\n        // check if the handle value exists\n        if (cfg_hdl != ATT_INVALID_SEARCH_HANDLE) {\n          hrpc_env->env[conidx]->last_char_code = HRPC_DESC_HR_MEAS_CLI_CFG;\n\n          status = GAP_ERR_NO_ERROR;\n          // Go to the Busy state\n          ke_state_set(dest_id, HRPC_BUSY);\n          // Send GATT Write Request\n          prf_gatt_write_ntf_ind(&hrpc_env->prf_env, conidx, cfg_hdl,\n                                 param->cfg_val);\n        }\n      }\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  } else if (state == HRPC_FREE) {\n    status = GAP_ERR_DISCONNECTED;\n  } else {\n    // Another procedure is pending, keep the command for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    struct hrpc_cfg_indntf_rsp *rsp =\n        KE_MSG_ALLOC(HRPC_CFG_INDNTF_RSP, src_id, dest_id, hrpc_cfg_indntf_rsp);\n    rsp->status = status;\n    // Send the message\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n****************************************************************************************\n* @brief Handles reception of the @ref HRPC_WR_CNTL_POINT_REQ message.\n* Check if the handle exists in profile(already discovered) and send request,\n*otherwise error to APP.\n* @param[in] msgid Id of the message received (probably unused).\n* @param[in] param Pointer to the parameters of the message.\n* @param[in] dest_id ID of the receiving task instance (probably unused).\n* @param[in] src_id ID of the sending task instance.\n* @return If the message was consumed or not.\n****************************************************************************************\n*/\n__STATIC int hrpc_wr_cntl_point_req_handler(\n    ke_msg_id_t const msgid, struct hrpc_wr_cntl_point_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == HRPC_IDLE) {\n    // this is mandatory readable if it is included in the peer's DB\n    if (hrpc_env->env[conidx] != NULL) {\n      // this is mandatory readable if it is included in the peer's DB\n      if (hrpc_env->env[conidx]->hrs.chars[HRPC_CHAR_HR_CNTL_POINT].char_hdl !=\n          ATT_INVALID_SEARCH_HANDLE) {\n        if ((hrpc_env->env[conidx]->hrs.chars[HRPC_CHAR_HR_CNTL_POINT].prop &\n             ATT_CHAR_PROP_WR) == ATT_CHAR_PROP_WR) {\n          hrpc_env->env[conidx]->last_char_code = HRPC_CHAR_HR_CNTL_POINT;\n\n          // Send GATT Write Request\n          prf_gatt_write(\n              &hrpc_env->prf_env, conidx,\n              hrpc_env->env[conidx]->hrs.chars[HRPC_CHAR_HR_CNTL_POINT].val_hdl,\n              (uint8_t *)¶m->val, sizeof(uint8_t), GATTC_WRITE);\n          // Go to the Busy state\n          ke_state_set(dest_id, HRPC_BUSY);\n        }\n        // write not allowed, so no point in continuing\n        else {\n          status = PRF_ERR_NOT_WRITABLE;\n        }\n      }\n      // send app error indication for inexistent handle for this characteristic\n      else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  } else if (state == HRPC_FREE) {\n    status = GAP_ERR_DISCONNECTED;\n  } else {\n    // Another procedure is pending, keep the command for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    struct hrpc_wr_cntl_point_rsp *rsp = KE_MSG_ALLOC(\n        HRPC_WR_CNTL_POINT_RSP, src_id, dest_id, hrpc_wr_cntl_point_rsp);\n    rsp->status = status;\n    // Send the message\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n\n  if (hrpc_env != NULL) {\n    if ((param->handle ==\n         hrpc_env->env[conidx]->hrs.chars[HRPC_CHAR_HR_MEAS].val_hdl) &&\n        (param->type == GATTC_NOTIFY)) {\n      // build a HRPC_HR_MEAS_IND message with stable heart rate value code.\n      struct hrpc_hr_meas_ind *ind = KE_MSG_ALLOC(\n          HRPC_HR_MEAS_IND, prf_dst_task_get(&(hrpc_env->prf_env), conidx),\n          prf_src_task_get(&(hrpc_env->prf_env), conidx), hrpc_hr_meas_ind);\n\n      // unpack heart rate measurement.\n      hrpc_unpack_meas_value(&(ind->meas_val), (uint8_t *)param->value,\n                             param->length);\n\n      ke_msg_send(ind);\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(hrpc){\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {HRPC_ENABLE_REQ, (ke_msg_func_t)hrpc_enable_req_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {HRPC_CFG_INDNTF_REQ, (ke_msg_func_t)hrpc_cfg_indntf_req_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {HRPC_RD_CHAR_REQ, (ke_msg_func_t)hrpc_rd_char_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {HRPC_WR_CNTL_POINT_REQ, (ke_msg_func_t)hrpc_wr_cntl_point_req_handler},\n};\n\nvoid hrpc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct hrpc_env_tag *hrpc_env = PRF_ENV_GET(HRPC, hrpc);\n\n  task_desc->msg_handler_tab = hrpc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(hrpc_msg_handler_tab);\n  task_desc->state = hrpc_env->state;\n  task_desc->idx_max = HRPC_IDX_MAX;\n}\n\n#endif /* (BLE_HR_COLLECTOR) */\n/// @} HRPCTASK\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrps/api/hrps_task.h",
    "content": "#ifndef _HRPS_TASK_H_\n#define _HRPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HRPSTASK Task\n * @ingroup HRPS\n * @brief Heart Rate Profile Task.\n *\n * The HRPSTASK is responsible for handling the messages coming in and out of the\n * @ref HRPS collector block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Messages for Heart Rate Profile Sensor\nenum\n{\n    ///Start the Heart Rate Profile Sensor - at connection\n    HRPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_HRPS),\n\n    /// Disable confirmation with configuration to save after profile disabled\n    HRPS_ENABLE_RSP,\n\n    ///Send Heart Rate measurement value from APP\n    HRPS_MEAS_SEND_REQ,\n    ///Send Heart Rate measurement value confirm to APP so stable values can be erased\n    ///if correctly sent.\n    HRPS_MEAS_SEND_RSP,\n\n    ///Inform APP of new configuration value\n    HRPS_CFG_INDNTF_IND,\n    ///Inform APP that Energy Expanded must be reset value\n    HRPS_ENERGY_EXP_RESET_IND,\n};\n\n///Parameters of the @ref HRPS_CREATE_DB_REQ message\nstruct hrps_db_cfg\n{\n    ///Database configuration\n    uint8_t features;\n    ///Body Sensor Location\n    uint8_t body_sensor_loc;\n};\n\n/// Parameters of the @ref HRPS_ENABLE_REQ message\nstruct hrps_enable_req\n{\n    ///Connection index\n    uint8_t conidx;\n    /// Heart Rate Notification configuration\n    uint16_t hr_meas_ntf;\n};\n\n/// Parameters of the @ref HRPS_ENABLE_RSP message\nstruct hrps_enable_rsp\n{\n    /// Connection index\n    uint8_t conidx;\n    /// status\n    uint8_t status;\n};\n\n///Parameters of the @ref HRPS_CFG_INDNTF_IND message\nstruct hrps_cfg_indntf_ind\n{\n    ///Connection idx\n    uint8_t conidx;\n    ///Stop/notify/indicate value to configure into the peer characteristic\n    uint16_t cfg_val;\n};\n\n/////Parameters of the @ref HRPS_MEAS_SEND_REQ message\nstruct hrps_meas_send_req\n{\n    ///Heart Rate measurement\n    struct hrs_hr_meas meas_val;\n};\n\n///Parameters of the @ref HRPS_MEAS_SEND_RSP message\nstruct hrps_meas_send_rsp\n{\n    ///Status\n    uint8_t status;\n};\n\n///Parameters of the @ref HRPS_ENERGY_EXP_RESET_IND message\nstruct hrps_energy_exp_reset_ind\n{\n    ///Connection handle\n    uint8_t conidx;\n};\n\n\n/// @} HRPSTASK\n\n#endif /* _HRPS_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrps/src/hrps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HRPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HR_SENSOR)\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"hrps.h\"\n#include \"hrps_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * HTPT PROFILE ATTRIBUTES\n ****************************************************************************************\n */\n\n/// Full HRS Database Description - Used to add attributes into the database\nconst struct attm_desc hrps_att_db[HRS_IDX_NB] = {\n    // Heart Rate Service Declaration\n    [HRS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Heart Rate Measurement Characteristic Declaration\n    [HRS_IDX_HR_MEAS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // Heart Rate Measurement Characteristic Value\n    [HRS_IDX_HR_MEAS_VAL] = {ATT_CHAR_HEART_RATE_MEAS, PERM(NTF, ENABLE),\n                             PERM(RI, ENABLE), HRPS_HT_MEAS_MAX_LEN},\n    // Heart Rate Measurement Characteristic - Client Characteristic\n    // Configuration Descriptor\n    [HRS_IDX_HR_MEAS_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                 PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                 0},\n\n    // Body Sensor Location Characteristic Declaration\n    [HRS_IDX_BODY_SENSOR_LOC_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                      0, 0},\n    // Body Sensor Location Characteristic Value\n    [HRS_IDX_BODY_SENSOR_LOC_VAL] = {ATT_CHAR_BODY_SENSOR_LOCATION,\n                                     PERM(RD, ENABLE), PERM(RI, ENABLE),\n                                     sizeof(uint8_t)},\n\n    // Heart Rate Control Point Characteristic Declaration\n    [HRS_IDX_HR_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                 0},\n    // Heart Rate Control Point Characteristic Value\n    [HRS_IDX_HR_CTNL_PT_VAL] = {ATT_CHAR_HEART_RATE_CNTL_POINT,\n                                PERM(WRITE_REQ, ENABLE), PERM(RI, ENABLE),\n                                sizeof(uint8_t)},\n};\n\n/**\n ****************************************************************************************\n * @brief Initialization of the HRPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t hrps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct hrps_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //------------------- Service Configuration Flag\n  uint8_t cfg_flag = HRPS_MANDATORY_MASK;\n  // Database Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  // Set Configuration Flag Value\n  if (HRPS_IS_SUPPORTED(params->features, HRPS_BODY_SENSOR_LOC_CHAR_SUP)) {\n    cfg_flag |= HRPS_BODY_SENSOR_LOC_MASK;\n  }\n  if (HRPS_IS_SUPPORTED(params->features, HRPS_ENGY_EXP_FEAT_SUP)) {\n    cfg_flag |= HRPS_HR_CTNL_PT_MASK;\n  }\n\n  // Add Service Into Database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_HEART_RATE, (uint8_t *)&cfg_flag, HRS_IDX_NB, NULL,\n      env->task, &hrps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate HRPS required environment variable\n    struct hrps_env_tag *hrps_env = (struct hrps_env_tag *)ke_malloc(\n        sizeof(struct hrps_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize HRPS environment\n    env->env = (prf_env_t *)hrps_env;\n    hrps_env->shdl = *start_hdl;\n    hrps_env->features = params->features;\n    hrps_env->sensor_location = params->body_sensor_loc;\n    hrps_env->operation = NULL;\n\n    hrps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Mono Instantiated task\n    hrps_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_HRPS;\n    hrps_task_init(&(env->desc));\n\n    /* Put HRS in Idle state */\n    ke_state_set(env->task, HRPS_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the HRPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void hrps_destroy(struct prf_task_env *env) {\n  struct hrps_env_tag *hrps_env = (struct hrps_env_tag *)env->env;\n\n  // free profile environment variables\n  if (hrps_env->operation != NULL) {\n    ke_free(hrps_env->operation);\n  }\n  env->env = NULL;\n  ke_free(hrps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void hrps_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Nothing to do */\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void hrps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  /* Nothing to do */\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// HRPS Task interface required by profile manager\nconst struct prf_task_cbs hrps_itf = {\n    (prf_init_fnct)hrps_init,\n    hrps_destroy,\n    hrps_create,\n    hrps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *hrps_prf_itf_get(void) { return &hrps_itf; }\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nvoid hrps_meas_send_rsp_send(uint8_t status) {\n  // Get the address of the environment\n  struct hrps_env_tag *hrps_env = PRF_ENV_GET(HRPS, hrps);\n\n  // Send CFM to APP that value has been sent or not\n  struct hrps_meas_send_rsp *cfm =\n      KE_MSG_ALLOC(HRPS_MEAS_SEND_RSP, prf_dst_task_get(&hrps_env->prf_env, 0),\n                   prf_src_task_get(&hrps_env->prf_env, 0), hrps_meas_send_rsp);\n\n  cfm->status = status;\n\n  ke_msg_send(cfm);\n}\n\nuint8_t hrps_pack_meas_value(uint8_t *packed_hr,\n                             const struct hrs_hr_meas *pmeas_val) {\n  uint8_t cursor = 0;\n  uint8_t i = 0;\n\n  // Heart Rate measurement flags\n  *(packed_hr) = pmeas_val->flags;\n\n  if ((pmeas_val->flags & HRS_FLAG_HR_16BITS_VALUE) ==\n      HRS_FLAG_HR_16BITS_VALUE) {\n    // Heart Rate Measurement Value 16 bits\n    co_write16p(packed_hr + 1, pmeas_val->heart_rate);\n    cursor += 3;\n  } else {\n    // Heart Rate Measurement Value 8 bits\n    *(packed_hr + 1) = pmeas_val->heart_rate;\n    cursor += 2;\n  }\n\n  if ((pmeas_val->flags & HRS_FLAG_ENERGY_EXPENDED_PRESENT) ==\n      HRS_FLAG_ENERGY_EXPENDED_PRESENT) {\n    // Energy Expended present\n    co_write16p(packed_hr + cursor, pmeas_val->energy_expended);\n    cursor += 2;\n  }\n\n  if ((pmeas_val->flags & HRS_FLAG_RR_INTERVAL_PRESENT) ==\n      HRS_FLAG_RR_INTERVAL_PRESENT) {\n    for (i = 0;\n         (i < (pmeas_val->nb_rr_interval)) && (i < (HRS_MAX_RR_INTERVAL));\n         i++) {\n      // RR-Intervals\n      co_write16p(packed_hr + cursor, pmeas_val->rr_intervals[i]);\n      cursor += 2;\n    }\n  }\n\n  // Clear unused packet data\n  if (cursor < HRPS_HT_MEAS_MAX_LEN) {\n    memset(packed_hr + cursor, 0, HRPS_HT_MEAS_MAX_LEN - cursor);\n  }\n\n  return cursor;\n}\n\nvoid hrps_exe_operation(void) {\n  struct hrps_env_tag *hrps_env = PRF_ENV_GET(HRPS, hrps);\n\n  ASSERT_ERR(hrps_env->operation != NULL);\n\n  bool finished = true;\n\n  while (hrps_env->operation->cursor < BLE_CONNECTION_MAX) {\n    // Check if notifications are enabled\n    if ((hrps_env->hr_meas_ntf[hrps_env->operation->cursor] &\n         ~HRP_PRF_CFG_PERFORMED_OK) == PRF_CLI_START_NTF) {\n      // Allocate the GATT notification message\n      struct gattc_send_evt_cmd *meas_val =\n          KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD,\n                           KE_BUILD_ID(TASK_GATTC, hrps_env->operation->cursor),\n                           prf_src_task_get(&(hrps_env->prf_env), 0),\n                           gattc_send_evt_cmd, hrps_env->operation->length);\n\n      // Fill in the parameter structure\n      meas_val->operation = GATTC_NOTIFY;\n      meas_val->handle = hrps_env->shdl + HRS_IDX_HR_MEAS_VAL;\n      meas_val->length = hrps_env->operation->length;\n      memcpy(meas_val->value, hrps_env->operation->data,\n             hrps_env->operation->length);\n\n      // Send the event\n      ke_msg_send(meas_val);\n\n      finished = false;\n      hrps_env->operation->cursor++;\n      break;\n    }\n\n    hrps_env->operation->cursor++;\n  }\n\n  // check if operation is finished\n  if (finished) {\n    // Send confirmation\n    hrps_meas_send_rsp_send(GAP_ERR_NO_ERROR);\n\n    // free operation\n    ke_free(hrps_env->operation);\n    hrps_env->operation = NULL;\n    // go back to idle state\n    ke_state_set(prf_src_task_get(&(hrps_env->prf_env), 0), HRPS_IDLE);\n  }\n}\n\n#endif /* BLE_HR_SENSOR */\n\n/// @} HRPS\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrps/src/hrps.h",
    "content": "#ifndef _HRPS_H_\n#define _HRPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HRPS Heart Rate Profile Sensor\n * @ingroup HRP\n * @brief Heart Rate Profile Sensor\n *\n * Heart Rate sensor (HRS) profile provides functionalities to upper layer module\n * application. The device using this profile takes the role of Heart Rate sensor.\n *\n * The interface of this role to the Application is:\n *  - Enable the profile role (from APP)\n *  - Disable the profile role (from APP)\n *  - Notify peer device during Heart Rate measurement (from APP)\n *  - Indicate measurements performed to peer device (from APP)\n *\n * Profile didn't manages multiple users configuration and storage of offline measurements.\n * This must be handled by application.\n *\n * Heart Rate Profile Sensor. (HRPS): A HRPS (e.g. PC, phone, etc)\n * is the term used by this profile to describe a device that can perform Heart Rate\n * measurement and notify about on-going measurement and indicate final result to a peer\n * BLE device.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_HR_SENSOR)\n#include \"hrp_common.h\"\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"hrps_task.h\"\n#include \"attm.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n///Maximum number of Heart Rate task instances\n#define HRPS_IDX_MAX     0x01\n\n#define HRPS_HT_MEAS_MAX_LEN            (5 + (2 * HRS_MAX_RR_INTERVAL))\n\n#define HRPS_MANDATORY_MASK             (0x0F)\n#define HRPS_BODY_SENSOR_LOC_MASK       (0x30)\n#define HRPS_HR_CTNL_PT_MASK            (0xC0)\n\n#define HRP_PRF_CFG_PERFORMED_OK        (0x80)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n#define HRPS_IS_SUPPORTED(features, mask) ((features & mask) == mask)\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Possible states of the HRPS task\nenum\n{\n    /// Idle state\n    HRPS_IDLE,\n    /// Connected state\n    HRPS_BUSY,\n\n    /// Number of defined states.\n    HRPS_STATE_MAX,\n};\n\n///Attributes State Machine\nenum\n{\n    HRS_IDX_SVC,\n\n    HRS_IDX_HR_MEAS_CHAR,\n    HRS_IDX_HR_MEAS_VAL,\n    HRS_IDX_HR_MEAS_NTF_CFG,\n\n    HRS_IDX_BODY_SENSOR_LOC_CHAR,\n    HRS_IDX_BODY_SENSOR_LOC_VAL,\n\n    HRS_IDX_HR_CTNL_PT_CHAR,\n    HRS_IDX_HR_CTNL_PT_VAL,\n\n    HRS_IDX_NB,\n};\n\nenum\n{\n    HRPS_HR_MEAS_CHAR,\n    HRPS_BODY_SENSOR_LOC_CHAR,\n    HRPS_HR_CTNL_PT_CHAR,\n\n    HRPS_CHAR_MAX,\n};\n\nenum\n{\n    /// Body Sensor Location Feature Supported\n    HRPS_BODY_SENSOR_LOC_CHAR_SUP       = 0x01,\n    /// Energy Expanded Feature Supported\n    HRPS_ENGY_EXP_FEAT_SUP              = 0x02,\n\n    HRPS_HR_MEAS_NTF_CFG                = 0x04,\n};\n\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n\n/// ongoing operation information\nstruct hrps_op\n{\n     /// Cursor on connection\n     uint8_t cursor;\n     /// Packed notification/indication data size\n     uint8_t length;\n     /// Packed notification/indication data\n     uint8_t data[HRPS_HT_MEAS_MAX_LEN];\n};\n\n/// Heart Rate Profile Sensor environment variable\nstruct hrps_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Operation pointer used to generate notifications\n    struct hrps_op* operation;\n    ///Service Start Handle\n    uint16_t shdl;\n    ///Database configuration\n    uint8_t features;\n    /// Sensor location\n    uint8_t sensor_location;\n    /// Measurement notification config\n    uint16_t hr_meas_ntf[BLE_CONNECTION_MAX];\n\n    /// State of different task instances\n    ke_state_t state[HRPS_IDX_MAX];\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve HRP service profile interface\n *\n * @return HRP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* hrps_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send a HRPS_MEAS_SEND_RSP message to the application.\n *\n * @param[in] status Confirmation Status\n ****************************************************************************************\n */\nvoid hrps_meas_send_rsp_send(uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Pack Heart Rate measurement value\n *\n * @param[in] p_meas_val Heart Rate measurement value\n ****************************************************************************************\n */\nuint8_t hrps_pack_meas_value(uint8_t *packed_hr, const struct hrs_hr_meas* pmeas_val);\n\n\n\n/**\n ****************************************************************************************\n * @brief  This function fully manage notification of Heart Rate Measurement\n *         to peer(s) device(s) according to on-going operation requested by application\n ****************************************************************************************\n */\nvoid hrps_exe_operation(void);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid hrps_task_init(struct ke_task_desc *task_desc);\n\n#endif /* #if (BLE_HR_SENSOR) */\n\n/// @} HRPS\n\n#endif /* _HRPS_H_ */\n"
  },
  {
    "path": "services/ble_profiles/hrp/hrps/src/hrps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HRPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HR_SENSOR)\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"hrps.h\"\n#include \"hrps_task.h\"\n\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HRPS_ENABLE_REQ message.\n * The handler enables the Heart Rate Sensor Profile.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hrps_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct hrps_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct hrps_env_tag *hrps_env = PRF_ENV_GET(HRPS, hrps);\n\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == HRPS_IDLE) {\n    if ((param->conidx < BLE_CONNECTION_MAX) &&\n        (param->hr_meas_ntf <= PRF_CLI_START_NTF)) {\n      // Bonded data was not used before\n      if (!HRPS_IS_SUPPORTED(hrps_env->hr_meas_ntf[param->conidx],\n                             HRP_PRF_CFG_PERFORMED_OK)) {\n        // Save notification config\n        hrps_env->hr_meas_ntf[param->conidx] = param->hr_meas_ntf;\n        // Enable Bonded Data\n        hrps_env->hr_meas_ntf[param->conidx] |= HRP_PRF_CFG_PERFORMED_OK;\n        status = GAP_ERR_NO_ERROR;\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  }\n\n  // send completed information to APP task that contains error status\n  struct hrps_enable_rsp *cmp_evt =\n      KE_MSG_ALLOC(HRPS_ENABLE_RSP, src_id, dest_id, hrps_enable_rsp);\n  cmp_evt->status = status;\n  cmp_evt->conidx = param->conidx;\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HRPS_MEAS_SEND_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int hrps_meas_send_req_handler(ke_msg_id_t const msgid,\n                                        struct hrps_meas_send_req const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // State shall not be Connected or Busy\n  if (ke_state_get(dest_id) == HRPS_IDLE) {\n    if (param->meas_val.nb_rr_interval <= HRS_MAX_RR_INTERVAL) {\n\n      // Get the address of the environment\n      struct hrps_env_tag *hrps_env = PRF_ENV_GET(HRPS, hrps);\n\n      // allocate and prepare data to notify\n      hrps_env->operation =\n          (struct hrps_op *)ke_malloc(sizeof(struct hrps_op), KE_MEM_KE_MSG);\n      hrps_env->operation->length =\n          hrps_pack_meas_value(hrps_env->operation->data, ¶m->meas_val);\n      hrps_env->operation->cursor = 0;\n\n      // start operation execution\n      hrps_exe_operation();\n\n      // Go to busy state\n      ke_state_set(dest_id, HRPS_BUSY);\n    } else {\n      // Send confirmation\n      hrps_meas_send_rsp_send(PRF_ERR_INVALID_PARAM);\n    }\n  } else {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GL2C_CODE_ATT_WR_CMD_IND message.\n * The handler compares the new values with current ones and notifies them if\n *they changed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct hrps_env_tag *hrps_env = PRF_ENV_GET(HRPS, hrps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  uint16_t value = 0x0000;\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  if (hrps_env != NULL) {\n    // BP Measurement Char. - Client Char. Configuration\n    if (param->handle == (hrps_env->shdl + HRS_IDX_HR_MEAS_NTF_CFG)) {\n      // Extract value before check\n      memcpy(&value, &(param->value), sizeof(uint16_t));\n\n      if ((value == PRF_CLI_STOP_NTFIND) || (value == PRF_CLI_START_NTF)) {\n        hrps_env->hr_meas_ntf[conidx] = value | HRP_PRF_CFG_PERFORMED_OK;\n      } else {\n        status = PRF_APP_ERROR;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Inform APP of configuration change\n        struct hrps_cfg_indntf_ind *ind = KE_MSG_ALLOC(\n            HRPS_CFG_INDNTF_IND, prf_dst_task_get(&hrps_env->prf_env, conidx),\n            prf_src_task_get(&hrps_env->prf_env, conidx), hrps_cfg_indntf_ind);\n\n        ind->conidx = conidx;\n        ind->cfg_val = value;\n\n        ke_msg_send(ind);\n      }\n    }\n    // HR Control Point Char. Value\n    else {\n      if (HRPS_IS_SUPPORTED(hrps_env->features, HRPS_ENGY_EXP_FEAT_SUP)) {\n        // Extract value\n        memcpy(&value, &(param->value), sizeof(uint8_t));\n\n        if (value == 0x1) {\n          // inform APP of configuration change\n          struct hrps_energy_exp_reset_ind *ind =\n              KE_MSG_ALLOC(HRPS_ENERGY_EXP_RESET_IND,\n                           prf_dst_task_get(&hrps_env->prf_env, conidx),\n                           prf_src_task_get(&hrps_env->prf_env, conidx),\n                           hrps_energy_exp_reset_ind);\n\n          ind->conidx = conidx;\n          ke_msg_send(ind);\n        } else {\n          status = HRS_ERR_HR_CNTL_POINT_NOT_SUPPORTED;\n        }\n      } else {\n        // Allowed to send Application Error if value inconvenient\n        status = HRS_ERR_HR_CNTL_POINT_NOT_SUPPORTED;\n      }\n    }\n  }\n\n  // Send write response\n  struct gattc_write_cfm *cfm =\n      KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n  cfm->handle = param->handle;\n  cfm->status = status;\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY message meaning that\n *Measurement notification has been correctly sent to peer device (but not\n *confirmed by peer device).\n * *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  if ((ke_state_get(dest_id) == HRPS_BUSY) &&\n      (param->operation == GATTC_NOTIFY)) {\n    // continue operation execution\n    hrps_exe_operation();\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == HRPS_IDLE) {\n    // Get the address of the environment\n    struct hrps_env_tag *hrps_env = PRF_ENV_GET(HRPS, hrps);\n    uint8_t conidx = KE_IDX_GET(src_id);\n    uint8_t att_idx = param->handle - hrps_env->shdl;\n\n    uint8_t value[4];\n    uint8_t value_size = 0;\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    switch (att_idx) {\n    case HRS_IDX_HR_MEAS_NTF_CFG: {\n      value_size = sizeof(uint16_t);\n      co_write16p(value,\n                  hrps_env->hr_meas_ntf[conidx] & ~HRP_PRF_CFG_PERFORMED_OK);\n    } break;\n\n    case HRS_IDX_BODY_SENSOR_LOC_VAL: {\n      // Broadcast feature is profile specific\n      if (HRPS_IS_SUPPORTED(hrps_env->features,\n                            HRPS_BODY_SENSOR_LOC_CHAR_SUP)) {\n        // Fill data\n        value_size = sizeof(uint8_t);\n        value[0] = hrps_env->sensor_location;\n      } else {\n        status = ATT_ERR_ATTRIBUTE_NOT_FOUND;\n      }\n    } break;\n\n    default: {\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, value_size);\n    cfm->length = value_size;\n    memcpy(cfm->value, value, value_size);\n    cfm->handle = param->handle;\n    cfm->status = status;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/* Default State handlers definition. */\nKE_MSG_HANDLER_TAB(hrps){\n    {HRPS_ENABLE_REQ, (ke_msg_func_t)hrps_enable_req_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {HRPS_MEAS_SEND_REQ, (ke_msg_func_t)hrps_meas_send_req_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n};\n\nvoid hrps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct hrps_env_tag *hrps_env = PRF_ENV_GET(HRPS, hrps);\n\n  task_desc->msg_handler_tab = hrps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(hrps_msg_handler_tab);\n  task_desc->state = hrps_env->state;\n  task_desc->idx_max = HRPS_IDX_MAX;\n}\n\n#endif /* #if (BLE_HR_SENSOR) */\n\n/// @} HRPSTASK\n"
  },
  {
    "path": "services/ble_profiles/htp/htp_common.h",
    "content": "#ifndef _HTP_COMMON_H_\n#define _HTP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HTP Health Thermometer Profile\n * @ingroup PROFILE\n * @brief Health Thermometer Profile\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"prf_types.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Out of range error code.\n#define HTP_OUT_OF_RANGE_ERR_CODE        (0x80)\n\n///Temperature Measurement Flags field bit values\nenum htp_temp_flag\n{\n    /// Temperature Units Flag - Celsius\n    HTP_FLAG_CELSIUS              = 0x00,\n    /// Temperature Units Flag - Fahrenheit\n    HTP_FLAG_FAHRENHEIT,\n    /// Time Stamp Flag\n    HTP_FLAG_TIME,\n    /// Temperature Type Flag\n    HTP_FLAG_TYPE                 = 0x04,\n};\n\n/// Temperature Type Description\nenum htp_temp_type\n{\n    /// Armpit\n    HTP_TYPE_ARMPIT                   = 0x01,\n    /// Body (general)\n    HTP_TYPE_BODY                     = 0x02,\n    /// Ear (usually ear lobe)\n    HTP_TYPE_EAR                      = 0x03,\n    /// Finger\n    HTP_TYPE_FINGER                   = 0x04,\n    /// Gastro-intestinal Tract\n    HTP_TYPE_GASTRO_INTESTINAL_TRACT  = 0x05,\n    /// Mouth\n    HTP_TYPE_MOUTH                    = 0x06,\n    /// Rectum\n    HTP_TYPE_RECTUM                   = 0x07,\n    /// Toe\n    HTP_TYPE_TOE                      = 0x08,\n    /// Tympanum (ear drum)\n    HTP_TYPE_TYMPANUM                 = 0x09,\n};\n\n/// Temprature type: intermdiary/stable\nenum htp_temp_info\n{\n    /// intermediate temperature measurement\n    HTP_TEMP_INTERM         = (0x00),\n    /// stable temperature measurement\n    HTP_TEMP_STABLE         = (0x01),\n};\n        /*\n * STRUCTURES\n ****************************************************************************************\n */\n\n///Temperature Measurement Value Structure\nstruct htp_temp_meas\n{\n    /// Temperature value\n    uint32_t temp;\n    /// Time stamp\n    struct prf_date_time time_stamp;\n    /// Flag (@see enum htp_temp_flag)\n    uint8_t  flags;\n    /// Type (@see enum htp_temp_type)\n    uint8_t  type;\n};\n\n\n/// @} htp_common\n\n#endif /* _HTP_COMMON_H_ */\n"
  },
  {
    "path": "services/ble_profiles/htp/htpc/api/htpc_task.h",
    "content": "#ifndef HTPC_TASK_H_\n#define HTPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HTPCTASK Health Thermometer Profile Collector Task\n * @ingroup HTPC\n * @brief Health Thermometer Profile Collector Task\n *\n * The HTPCTASK is responsible for handling the messages coming in and out of the\n * @ref HTPC monitor block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"htp_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n///  Message id\nenum htpc_msg_id\n{\n    /// Start the Health Thermometer Collector profile - at connection\n    HTPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_HTPC),\n    /// Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    HTPC_ENABLE_RSP,\n\n\n    /// Write Health Thermometer Notification Configuration Value request\n    HTPC_HEALTH_TEMP_NTF_CFG_REQ,\n    /// Write Health Thermometer Notification Configuration Value response\n    HTPC_HEALTH_TEMP_NTF_CFG_RSP,\n\n    ///APP request for measurement interval write\n    HTPC_WR_MEAS_INTV_REQ,\n    ///APP request for measurement interval write\n    HTPC_WR_MEAS_INTV_RSP,\n\n    /// Temperature value received from peer sensor\n    HTPC_TEMP_IND,\n    /// Measurement interval update indication received from peer sensor\n    HTPC_MEAS_INTV_IND,\n\n    /// Generic message to read a HTP characteristic value\n    HTPC_RD_CHAR_REQ,\n    /// Read HTP characteristic value response\n    HTPC_RD_CHAR_RSP,\n};\n\n\n\n/// Health Thermometer Service Characteristics - Char. Code\nenum htpc_chars\n{\n    /// Temperature Measurement\n    HTPC_CHAR_HTS_TEMP_MEAS = 0x0,\n    /// Temperature Type\n    HTPC_CHAR_HTS_TEMP_TYPE,\n    /// Intermediate Temperature\n    HTPC_CHAR_HTS_INTM_TEMP,\n    /// Measurement Interval\n    HTPC_CHAR_HTS_MEAS_INTV,\n\n    HTPC_CHAR_HTS_MAX,\n};\n\n/// Health Thermometer Service Characteristic Descriptors\nenum htpc_descs\n{\n    /// Temp. Meas. Client Config\n    HTPC_DESC_HTS_TEMP_MEAS_CLI_CFG,\n    /// Intm. Meas. Client Config\n    HTPC_DESC_HTS_INTM_MEAS_CLI_CFG,\n    /// Meas. Intv. Client Config\n    HTPC_DESC_HTS_MEAS_INTV_CLI_CFG,\n    /// Meas. Intv. Valid Range,\n    HTPC_DESC_HTS_MEAS_INTV_VAL_RGE,\n\n    HTPC_DESC_HTS_MAX,\n};\n\n/// Internal codes for reading a HTS characteristic with one single request\nenum htpc_rd_char\n{\n    ///Read HTS Temp. Type\n    HTPC_RD_TEMP_TYPE           = 0,\n    ///Read HTS Measurement Interval\n    HTPC_RD_MEAS_INTV,\n\n    ///Read HTS Temperature Measurement Client Cfg. Desc\n    HTPC_RD_TEMP_MEAS_CLI_CFG,\n    ///Read HTS Intermediate Temperature Client Cfg. Desc\n    HTPC_RD_INTM_TEMP_CLI_CFG,\n    ///Read HTS Measurement Interval Client Cfg. Desc\n    HTPC_RD_MEAS_INTV_CLI_CFG,\n    ///Read HTS Measurement Interval Client Cfg. Desc\n    HTPC_RD_MEAS_INTV_VAL_RGE,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Health Thermometer Service\n */\nstruct htpc_hts_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    struct prf_char_inf chars[HTPC_CHAR_HTS_MAX];\n\n    /// Descriptor handles:\n    struct prf_char_desc_inf descs[HTPC_DESC_HTS_MAX];\n};\n\n/// Parameters of the @ref HTPC_ENABLE_REQ message\nstruct htpc_enable_req\n{\n    ///Connection type\n    uint8_t con_type;\n\n    ///Existing handle values hts\n    struct htpc_hts_content hts;\n};\n\n/// Parameters of the @ref HTPC_ENABLE_RSP message\nstruct htpc_enable_rsp\n{\n    ///status\n    uint8_t status;\n    /// HTS handle values and characteristic properties\n    struct htpc_hts_content hts;\n};\n\n///Parameters of the @ref HTPC_HEALTH_TEMP_NTF_CFG_REQ message\nstruct htpc_health_temp_ntf_cfg_req\n{\n    ///Stop/notify/indicate value to configure into the peer characteristic\n    uint16_t cfg_val;\n    ///Own code for differentiating between Temperature Measurement, Intermediate Temperature and Measurement Interval chars\n    uint8_t char_code;\n};\n\n///Parameters of the @ref HTPC_HEALTH_TEMP_NTF_CFG_RSP message\nstruct htpc_health_temp_ntf_cfg_rsp\n{\n    ///status\n    uint8_t status;\n};\n\n///Parameters of the @ref HTPC_WR_MEAS_INTV_REQ message\nstruct htpc_wr_meas_intv_req\n{\n    ///Interval value\n    uint16_t intv;\n};\n\n///Parameters of the @ref HTPC_WR_MEAS_INTV_RSP message\nstruct htpc_wr_meas_intv_rsp\n{\n    ///status\n    uint8_t status;\n};\n\n///Parameters of the @ref HTPC_TEMP_IND message\nstruct htpc_temp_ind\n{\n    /// Temperature Measurement Structure\n    struct htp_temp_meas temp_meas;\n    /// Stable or intermediary type of temperature\n    bool stable_meas;\n};\n\n///Parameters of @ref HTPC_MEAS_INTV_IND message\nstruct htpc_meas_intv_ind\n{\n    ///Interval\n    uint16_t intv;\n};\n\n///Parameters of the @ref HTPC_RD_CHAR_REQ message\nstruct htpc_rd_char_req\n{\n    ///Characteristic value code (@see enum htpc_rd_char)\n    uint8_t char_code;\n};\n\n///Parameters of the @ref HTPC_RD_CHAR_RSP message\nstruct htpc_rd_char_rsp\n{\n    /// Attribute data information\n    struct prf_att_info info;\n};\n\n\n\n/// @} HTPCTASK\n\n#endif // HTPC_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/htp/htpc/src/htpc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HTPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HT_COLLECTOR)\n#include \"gap.h\"\n#include \"htpc.h\"\n#include \"htpc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the HTPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t htpc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct htpc_env_tag *htpc_env = (struct htpc_env_tag *)ke_malloc(\n      sizeof(struct htpc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate HTPC required environment variable\n  env->env = (prf_env_t *)htpc_env;\n\n  htpc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  htpc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_HTPC;\n  htpc_task_init(&(env->desc));\n\n  for (idx = 0; idx < HTPC_IDX_MAX; idx++) {\n    htpc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), HTPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the HTPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void htpc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct htpc_env_tag *htpc_env = (struct htpc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < HTPC_IDX_MAX; idx++) {\n    if (htpc_env->env[idx] != NULL) {\n      if (htpc_env->env[idx]->operation != NULL) {\n        ke_msg_free(htpc_env->env[idx]->operation);\n      }\n\n      ke_free(htpc_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(htpc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void htpc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put HTP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), HTPC_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void htpc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct htpc_env_tag *htpc_env = (struct htpc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (htpc_env->env[conidx] != NULL) {\n    if (htpc_env->env[conidx]->operation != NULL) {\n      ke_msg_free(htpc_env->env[conidx]->operation);\n    }\n\n    ke_free(htpc_env->env[conidx]);\n    htpc_env->env[conidx] = NULL;\n  }\n\n  /* Put HTP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), HTPC_FREE);\n}\n\nvoid htpc_unpack_temp(struct htpc_env_tag *htpc_env, uint8_t *packed_temp,\n                      uint8_t length, uint8_t flag_stable_meas,\n                      uint8_t conidx) {\n  // Cursor used to read parameter in the packed temperature value\n  uint8_t cursor = 0;\n\n  // Checked the length of the received value\n  if (length >= HTPC_PACKED_TEMP_MIN_LEN) {\n    // Prepare the message to send to the application\n    struct htpc_temp_ind *ind = KE_MSG_ALLOC(\n        HTPC_TEMP_IND, prf_dst_task_get(&htpc_env->prf_env, conidx),\n        prf_src_task_get(&htpc_env->prf_env, conidx), htpc_temp_ind);\n\n    // Unpack Temp Measurement\n    ind->temp_meas.flags = *(packed_temp + cursor);\n    cursor += 1;\n\n    ind->temp_meas.temp = co_read32p(packed_temp + cursor);\n    cursor += 4;\n\n    // Time Flag Set\n    if ((ind->temp_meas.flags & HTP_FLAG_TIME) == HTP_FLAG_TIME) {\n      cursor += prf_unpack_date_time(packed_temp + cursor,\n                                     &(ind->temp_meas.time_stamp));\n    }\n\n    // Type Flag set\n    if ((ind->temp_meas.flags & HTP_FLAG_TYPE) == HTP_FLAG_TYPE) {\n      ind->temp_meas.type = *(packed_temp + cursor);\n    }\n\n    // Stable or intermediary type of temperature\n    ind->stable_meas = flag_stable_meas;\n\n    // Send request to ATT\n    ke_msg_send(ind);\n  }\n}\n#if 0\nuint8_t htpc_get_next_desc_char_code(struct htpc_env_tag *htpc_env,\n                                     const struct prf_char_desc_def *desc_def)\n{\n    // Counter\n    uint8_t i;\n    uint8_t next_char_code;\n\n    for (i=0; i htpc_env->last_char_code)\n        {\n            //If Char. has been found and number of attributes is upper than 2\n            if ((htpc_env->hts.chars[next_char_code].char_hdl != 0)\n                    & (htpc_env->hts.chars[next_char_code].char_ehdl_off > 2))\n            {\n                return next_char_code;\n            }\n        }\n    }\n\n    return i;\n}\n#endif\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// HTPC Task interface required by profile manager\nconst struct prf_task_cbs htpc_itf = {\n    (prf_init_fnct)htpc_init,\n    htpc_destroy,\n    htpc_create,\n    htpc_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *htpc_prf_itf_get(void) { return &htpc_itf; }\n\nvoid htpc_enable_rsp_send(struct htpc_env_tag *htpc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Inform the APP about the status of the enabling of the Health Thermometer\n  // Profile Collector role 5awk\n  struct htpc_enable_rsp *cfm = KE_MSG_ALLOC(\n      HTPC_ENABLE_RSP, prf_dst_task_get(&(htpc_env->prf_env), conidx),\n      prf_src_task_get(&(htpc_env->prf_env), conidx), htpc_enable_rsp);\n\n  // Status\n  cfm->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    cfm->hts = htpc_env->env[conidx]->hts;\n    // Go to IDLE state\n    ke_state_set(prf_src_task_get(&(htpc_env->prf_env), conidx), HTPC_IDLE);\n\n    // Register profile handle to catch gatt indications\n    prf_register_atthdl2gatt(&(htpc_env->prf_env), conidx,\n                             &htpc_env->env[conidx]->hts.svc);\n  } else {\n    if (htpc_env->env[conidx] != NULL) {\n      // clean-up environment variable allocated for task instance\n      if (htpc_env->env[conidx]->operation != NULL) {\n        ke_free(htpc_env->env[conidx]->operation);\n      }\n      ke_free(htpc_env->env[conidx]);\n      htpc_env->env[conidx] = NULL;\n    }\n  }\n\n  // Send the confirmation to the application\n  ke_msg_send(cfm);\n}\n\n#endif // BLE_HT_COLLECTOR\n/// @} HTPC\n"
  },
  {
    "path": "services/ble_profiles/htp/htpc/src/htpc.h",
    "content": "#ifndef HTPC_H_\n#define HTPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HTP Health Thermometer Profile\n * @ingroup PROFILE\n * @brief Health Thermometer Profile\n *\n * The HTP module is the responsible block for implementing the Health Thermometer Profile\n * functionalities in the BLE Host.\n *\n * The Health Thermometer Profile defines the functionality required in a device that allows\n * the user (Collector device) to configure and recover temperature measurements from a Thermometer device.\n *****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @addtogroup HTPC Health Thermometer Profile Collector\n * @ingroup HTP\n * @brief Health Thermometer Profile Collector\n *\n * The HTPC is responsible for providing Health Thermometer Profile Collector functionalities to\n * upper layer module or application. The device using this profile takes the role\n * of Health Thermometer Profile Collector.\n *\n * Health Thermometer Profile Collector (HTPC): A HTPC (e.g. PC, phone, etc)\n * is the term used by this profile to describe a device that can set temperature\n * indication/notification intervals in a HTP Thermometer, interpreting them in a way\n * suitable to the user application.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_HT_COLLECTOR || BLE_HT_THERMOM)\n#include \"ke_task.h\"\n#include \"prf_utils.h\"\n#include \"htpc_task.h\"\n#include \"htp_common.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n#define HTPC_PACKED_TEMP_MIN_LEN        (5)\n#define HTPC_PACKED_TEMP_MAX_LEN        (13)\n\n/// Maximum number of task instances\n#define HTPC_IDX_MAX                    (BLE_CONNECTION_MAX)\n\n\n/// Possible states of the HTPC task\nenum htpc_state\n{\n    ///Free state\n    HTPC_FREE,\n    ///Idle state\n    HTPC_IDLE,\n    ///Busy state\n    HTPC_BUSY,\n\n    ///Number of defined states.\n    HTPC_STATE_MAX\n};\n/*\n * MACROS\n ****************************************************************************************\n */\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Health Temperature Collector environment variable per connection\nstruct htpc_cnx_env\n{\n    /// Last service for which something was discovered\n    uint8_t last_svc_req;\n    /// counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// used to store if measurement context\n    uint8_t meas_ctx_en;\n\n    struct ke_msg * operation;\n\n    struct htpc_hts_content hts;\n};\n\n/// Health Thermometer Profile Client environment variable\nstruct htpc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct htpc_cnx_env* env[HTPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[HTPC_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve HTS service profile interface\n *\n * @return HTS service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* htpc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Thermometer ATT DB discovery results to HTPC host.\n ****************************************************************************************\n */\nvoid htpc_enable_rsp_send(struct htpc_env_tag *htpc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Unpack the received temperature measurement value\n ****************************************************************************************\n */\nvoid htpc_unpack_temp(struct htpc_env_tag *htpc_env, uint8_t *packed_temp,\n                      uint8_t length, uint8_t flag_stable_meas, uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Look for the next characteristic for which descriptors have to be discovered.\n * @return Char code of this characteristic\n ****************************************************************************************\n */\nuint8_t htpc_get_next_desc_char_code(struct htpc_env_tag *htpc_env,\n                                     const struct prf_char_desc_def *desc_def);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid htpc_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //BLE_HT_COLLECTOR\n/// @} HTPC\n#endif // HTPC_H_\n"
  },
  {
    "path": "services/ble_profiles/htp/htpc/src/htpc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HTPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HT_COLLECTOR)\n#include \"attm.h\"\n#include \"co_utils.h\"\n#include \"gap.h\"\n#include \"gapc.h\"\n#include \"gapc_task.h\"\n#include \"htpc.h\"\n#include \"htpc_task.h\"\n\n#include \"ke_mem.h\"\n\n/// State machine used to retrieve Health Thermometer service characteristics\n/// information\nconst struct prf_char_def htpc_hts_char[HTPC_CHAR_HTS_MAX] = {\n    /// Temperature Measurement\n    [HTPC_CHAR_HTS_TEMP_MEAS] = {ATT_CHAR_TEMPERATURE_MEAS, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_IND},\n    /// Temperature Type\n    [HTPC_CHAR_HTS_TEMP_TYPE] = {ATT_CHAR_TEMPERATURE_TYPE, ATT_OPTIONAL,\n                                 ATT_CHAR_PROP_RD},\n    /// Intermediate Temperature\n    [HTPC_CHAR_HTS_INTM_TEMP] = {ATT_CHAR_INTERMED_TEMPERATURE, ATT_OPTIONAL,\n                                 ATT_CHAR_PROP_NTF},\n    /// Measurement Interval\n    [HTPC_CHAR_HTS_MEAS_INTV] = {ATT_CHAR_MEAS_INTERVAL, ATT_OPTIONAL,\n                                 ATT_CHAR_PROP_RD},\n};\n\n/// State machine used to retrieve Health Thermometer service characteristics\n/// description information\nconst struct prf_char_desc_def htpc_hts_char_desc[HTPC_DESC_HTS_MAX] = {\n    /// Temperature Measurement Client Config\n    [HTPC_DESC_HTS_TEMP_MEAS_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                         ATT_MANDATORY,\n                                         HTPC_CHAR_HTS_TEMP_MEAS},\n    /// Intermediate Temperature Client Config\n    [HTPC_DESC_HTS_INTM_MEAS_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                         HTPC_CHAR_HTS_INTM_TEMP},\n    /// Measurement Interval Client Config\n    [HTPC_DESC_HTS_MEAS_INTV_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                         HTPC_CHAR_HTS_MEAS_INTV},\n    /// Measurement Interval valid range\n    [HTPC_DESC_HTS_MEAS_INTV_VAL_RGE] = {ATT_DESC_VALID_RANGE, ATT_OPTIONAL,\n                                         HTPC_CHAR_HTS_MEAS_INTV},\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HTPC_ENABLE_REQ message.\n * The handler enables the Health Thermometer Profile Collector Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int htpc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct htpc_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Health Thermometer Profile Collector Role Task Environment\n  struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n\n  if ((state == HTPC_IDLE) && (htpc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    htpc_env->env[conidx] = (struct htpc_cnx_env *)ke_malloc(\n        sizeof(struct htpc_cnx_env), KE_MEM_ATT_DB);\n    memset(htpc_env->env[conidx], 0, sizeof(struct htpc_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering HTS on peer\n      prf_disc_svc_send(&(htpc_env->prf_env), conidx, ATT_SVC_HEALTH_THERMOM);\n\n      // store context of request and go into busy state\n      htpc_env->env[conidx]->operation = ke_param2msg(param);\n      msg_status = KE_MSG_NO_FREE;\n      ke_state_set(dest_id, HTPC_BUSY);\n    }\n    // normal connection, get saved att details\n    else {\n      htpc_env->env[conidx]->hts = param->hts;\n\n      // send APP confirmation that can start normal connection to TH\n      htpc_enable_rsp_send(htpc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  } else {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    htpc_enable_rsp_send(htpc_env, conidx, status);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == HTPC_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    // Get the address of the environment\n    struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n\n    ASSERT_INFO(htpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(htpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (htpc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve IAS characteristic\n      prf_extract_svc_info(ind, HTPC_CHAR_HTS_MAX, &htpc_hts_char[0],\n                           htpc_env->env[conidx]->hts.chars, HTPC_DESC_HTS_MAX,\n                           &htpc_hts_char_desc[0],\n                           &(htpc_env->env[conidx]->hts.descs[0]));\n\n      // Even if we get multiple responses we only store 1 range\n      htpc_env->env[conidx]->hts.svc.shdl = ind->start_hdl;\n      htpc_env->env[conidx]->hts.svc.ehdl = ind->end_hdl;\n    }\n    htpc_env->env[conidx]->nb_svc++;\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HTPC_WR_MEAS_INTV_REQ message.\n * Check if the handle exists in profile(already discovered) and send request,\n *otherwise error to APP.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int htpc_wr_meas_intv_req_handler(\n    ke_msg_id_t const msgid, struct htpc_wr_meas_intv_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // Device Information Service Client Role Task Environment\n  struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n\n  ASSERT_INFO(htpc_env != NULL, dest_id, src_id);\n  if ((state == HTPC_IDLE) && (htpc_env->env[conidx] != NULL)) {\n    uint16_t val_hdl = ATT_INVALID_HANDLE;\n\n    if ((htpc_env->env[conidx]->hts.chars[HTPC_CHAR_HTS_MEAS_INTV].prop &\n         ATT_CHAR_PROP_WR) != ATT_CHAR_PROP_WR) {\n      status = PRF_ERR_NOT_WRITABLE;\n    } else {\n      val_hdl =\n          htpc_env->env[conidx]->hts.chars[HTPC_CHAR_HTS_MEAS_INTV].val_hdl;\n\n      if (val_hdl != ATT_INVALID_HANDLE) {\n        // Send GATT Write Request\n        prf_gatt_write(&(htpc_env->prf_env), conidx, val_hdl,\n                       (uint8_t *)¶m->intv, sizeof(uint16_t), GATTC_WRITE);\n\n        // store context of request and go into busy state\n        htpc_env->env[conidx]->operation = ke_param2msg(param);\n        msg_status = KE_MSG_NO_FREE;\n        ke_state_set(dest_id, HTPC_BUSY);\n      } else {\n        // invalid handle requested\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    }\n  } else if (state != HTPC_FREE) {\n    // request cannot be performed\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send error response if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    struct htpc_wr_meas_intv_rsp *rsp = KE_MSG_ALLOC(\n        HTPC_WR_MEAS_INTV_RSP, src_id, dest_id, htpc_wr_meas_intv_rsp);\n    rsp->status = status;\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HTPC_HEALTH_TEMP_NTF_CFG_REQ message.\n * It allows configuration of the peer ind/ntf/stop characteristic for a\n *specified characteristic. Will return an error code if that cfg char does not\n *exist.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int htpc_health_temp_ntf_cfg_req_handler(\n    ke_msg_id_t const msgid, struct htpc_health_temp_ntf_cfg_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Client Characteristic Configuration Descriptor Handle\n  uint16_t cfg_hdl = 0x0000;\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  int msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  switch (param->char_code) {\n  case HTPC_CHAR_HTS_TEMP_MEAS: // can only IND\n    cfg_hdl = htpc_env->env[conidx]\n                  ->hts.descs[HTPC_DESC_HTS_TEMP_MEAS_CLI_CFG]\n                  .desc_hdl;\n    if (!((param->cfg_val == PRF_CLI_STOP_NTFIND) ||\n          (param->cfg_val == PRF_CLI_START_IND))) {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n    break;\n\n  case HTPC_CHAR_HTS_MEAS_INTV: // can only IND\n    cfg_hdl = htpc_env->env[conidx]\n                  ->hts.descs[HTPC_DESC_HTS_MEAS_INTV_CLI_CFG]\n                  .desc_hdl;\n    if (!((param->cfg_val == PRF_CLI_STOP_NTFIND) ||\n          (param->cfg_val == PRF_CLI_START_IND))) {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n    break;\n\n  case HTPC_CHAR_HTS_INTM_TEMP: // can only NTF\n    cfg_hdl = htpc_env->env[conidx]\n                  ->hts.descs[HTPC_DESC_HTS_INTM_MEAS_CLI_CFG]\n                  .desc_hdl;\n    if (!((param->cfg_val == PRF_CLI_STOP_NTFIND) ||\n          (param->cfg_val == PRF_CLI_START_NTF))) {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n    break;\n\n  default:\n    // Let app know that one of the request params is incorrect\n    status = PRF_ERR_INVALID_PARAM;\n    break;\n  }\n\n  // Check if the handle value exists\n  if ((cfg_hdl == ATT_INVALID_HANDLE)) {\n    status = PRF_ERR_INEXISTENT_HDL;\n  }\n\n  // no error detected\n  if (status == GAP_ERR_NO_ERROR) {\n    // Send GATT Write Request\n    prf_gatt_write_ntf_ind(&htpc_env->prf_env, conidx, cfg_hdl, param->cfg_val);\n    // store context of request and go into busy state\n    htpc_env->env[conidx]->operation = ke_param2msg(param);\n    ke_state_set(dest_id, HTPC_BUSY);\n    msg_status = KE_MSG_NO_FREE;\n  }\n  // an error occurs send back response message\n  else {\n    struct htpc_health_temp_ntf_cfg_rsp *rsp =\n        KE_MSG_ALLOC(HTPC_HEALTH_TEMP_NTF_CFG_RSP, src_id, dest_id,\n                     htpc_health_temp_ntf_cfg_rsp);\n    rsp->status = status;\n    ke_msg_send(rsp);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HTPC_RD_REQ message.\n * Check if the handle exists in profile(already discovered) and send request,\n *otherwise error to APP.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int htpc_rd_char_req_handler(ke_msg_id_t const msgid,\n                                      struct htpc_rd_char_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Device Information Service Client Role Task Environment\n  struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n\n  ASSERT_INFO(htpc_env != NULL, dest_id, src_id);\n  if ((state == HTPC_IDLE) && (htpc_env->env[conidx] != NULL)) {\n    uint16_t search_hdl = ATT_INVALID_HDL;\n\n    switch (param->char_code) {\n    /// Read HTS Temp. Type\n    case HTPC_RD_TEMP_TYPE: {\n      search_hdl =\n          htpc_env->env[conidx]->hts.chars[HTPC_CHAR_HTS_TEMP_TYPE].val_hdl;\n    } break;\n    /// Read HTS Measurement Interval\n    case HTPC_RD_MEAS_INTV: {\n      search_hdl =\n          htpc_env->env[conidx]->hts.chars[HTPC_CHAR_HTS_MEAS_INTV].val_hdl;\n    } break;\n\n    /// Read HTS Temperature Measurement Client Cfg. Desc\n    case HTPC_RD_TEMP_MEAS_CLI_CFG: {\n      search_hdl = htpc_env->env[conidx]\n                       ->hts.descs[HTPC_DESC_HTS_TEMP_MEAS_CLI_CFG]\n                       .desc_hdl;\n    } break;\n    /// Read HTS Intermediate Temperature Client Cfg. Desc\n    case HTPC_RD_INTM_TEMP_CLI_CFG: {\n      search_hdl = htpc_env->env[conidx]\n                       ->hts.descs[HTPC_DESC_HTS_INTM_MEAS_CLI_CFG]\n                       .desc_hdl;\n    } break;\n    /// Read HTS Measurement Interval Client Cfg. Desc\n    case HTPC_RD_MEAS_INTV_CLI_CFG: {\n      search_hdl = htpc_env->env[conidx]\n                       ->hts.descs[HTPC_DESC_HTS_MEAS_INTV_CLI_CFG]\n                       .desc_hdl;\n    } break;\n    /// Read HTS Measurement Interval Client Cfg. Desc\n    case HTPC_RD_MEAS_INTV_VAL_RGE: {\n      search_hdl = htpc_env->env[conidx]\n                       ->hts.descs[HTPC_DESC_HTS_MEAS_INTV_VAL_RGE]\n                       .desc_hdl;\n    } break;\n    default: {\n      status = GAP_ERR_INVALID_PARAM;\n    } break;\n    }\n\n    // Check if handle is viable\n    if (search_hdl != ATT_INVALID_HDL) {\n      // perform read request\n      // htpc_env->env[conidx]->last_char_code = param->char_code;\n      prf_read_char_send(&(htpc_env->prf_env), conidx,\n                         htpc_env->env[conidx]->hts.svc.shdl,\n                         htpc_env->env[conidx]->hts.svc.ehdl, search_hdl);\n\n      // store context of request and go into busy state\n      htpc_env->env[conidx]->operation = ke_param2msg(param);\n      msg_status = KE_MSG_NO_FREE;\n      ke_state_set(dest_id, HTPC_BUSY);\n    } else if (status == GAP_ERR_NO_ERROR) {\n      // invalid handle requested\n      status = PRF_ERR_INEXISTENT_HDL;\n    }\n  } else if (state != HTPC_FREE) {\n    // request cannot be performed\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send error response if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    prf_client_att_info_rsp(&(htpc_env->prf_env), conidx, HTPC_RD_CHAR_RSP,\n                            status, NULL);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // send attribute information\n  prf_client_att_info_rsp(&(htpc_env->prf_env), conidx, HTPC_RD_CHAR_RSP,\n                          GAP_ERR_NO_ERROR, param);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // Get the address of the environment\n  struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n\n  if (state == HTPC_BUSY) {\n    switch (htpc_env->env[conidx]->operation->id) {\n    case HTPC_ENABLE_REQ: {\n      uint8_t status;\n      if (htpc_env->env[conidx]->nb_svc == 1) {\n        status = prf_check_svc_char_validity(\n            HTPC_CHAR_HTS_MAX, htpc_env->env[conidx]->hts.chars, htpc_hts_char);\n\n        htpc_env->env[conidx]->nb_svc = 0;\n      }\n      // Too many services found only one such service should exist\n      else if (htpc_env->env[conidx]->nb_svc > 1) {\n        status = PRF_ERR_MULTIPLE_SVC;\n      } else {\n        status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n      }\n\n      htpc_enable_rsp_send(htpc_env, conidx, status);\n    } break;\n\n    case HTPC_HEALTH_TEMP_NTF_CFG_REQ: {\n      // send response of the notification configuration request\n      struct htpc_health_temp_ntf_cfg_rsp *rsp =\n          KE_MSG_ALLOC(HTPC_HEALTH_TEMP_NTF_CFG_RSP,\n                       prf_dst_task_get(&(htpc_env->prf_env), conidx), dest_id,\n                       htpc_health_temp_ntf_cfg_rsp);\n      // set error status\n      rsp->status = param->status;\n      ke_msg_send(rsp);\n    } break;\n\n    case HTPC_RD_CHAR_REQ: {\n      if (param->status != GAP_ERR_NO_ERROR) {\n        // send attribute information\n        prf_client_att_info_rsp(&(htpc_env->prf_env), conidx, HTPC_RD_CHAR_RSP,\n                                param->status, NULL);\n      }\n    } break;\n\n    case HTPC_WR_MEAS_INTV_REQ: {\n      struct htpc_wr_meas_intv_rsp *rsp = KE_MSG_ALLOC(\n          HTPC_WR_MEAS_INTV_RSP, prf_dst_task_get(&(htpc_env->prf_env), conidx),\n          dest_id, htpc_wr_meas_intv_rsp);\n      rsp->status = param->status;\n      ke_msg_send(rsp);\n    } break;\n\n    default:\n      break;\n    }\n\n    // free operation\n    if ((htpc_env->env[conidx] != NULL) &&\n        (htpc_env->env[conidx]->operation != NULL)) {\n      ke_free(htpc_env->env[conidx]->operation);\n      htpc_env->env[conidx]->operation = NULL;\n    }\n    // set state to IDLE\n    ke_state_set(dest_id, HTPC_IDLE);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // Temperature Measurement Char.\n  if (param->handle ==\n      htpc_env->env[conidx]->hts.chars[HTPC_CHAR_HTS_TEMP_MEAS].val_hdl) {\n    // confirm that indication has been correctly received\n    struct gattc_event_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n    cfm->handle = param->handle;\n    ke_msg_send(cfm);\n\n    htpc_unpack_temp(\n        htpc_env, (uint8_t *)&(param->value), param->length,\n        ((param->type == GATTC_NOTIFY) ? HTP_TEMP_INTERM : HTP_TEMP_STABLE),\n        conidx);\n  }\n  // Intermediate Temperature Measurement Char.\n  else if (param->handle ==\n           htpc_env->env[conidx]->hts.chars[HTPC_CHAR_HTS_INTM_TEMP].val_hdl) {\n    htpc_unpack_temp(\n        htpc_env, (uint8_t *)&(param->value), param->length,\n        ((param->type == GATTC_NOTIFY) ? HTP_TEMP_INTERM : HTP_TEMP_STABLE),\n        conidx);\n  }\n  // Measurement Interval Char.\n  else if (param->handle ==\n           htpc_env->env[conidx]->hts.chars[HTPC_CHAR_HTS_MEAS_INTV].val_hdl) {\n    // confirm that indication has been correctly received\n    struct gattc_event_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n    cfm->handle = param->handle;\n    ke_msg_send(cfm);\n\n    struct htpc_meas_intv_ind *ind = KE_MSG_ALLOC(\n        HTPC_MEAS_INTV_IND, prf_dst_task_get(&htpc_env->prf_env, conidx),\n        prf_src_task_get(&htpc_env->prf_env, conidx), htpc_meas_intv_ind);\n\n    memcpy(&ind->intv, ¶m->value[0], sizeof(uint16_t));\n\n    ke_msg_send(ind);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/* Default State handlers definition. */\nKE_MSG_HANDLER_TAB(htpc){\n    {HTPC_ENABLE_REQ, (ke_msg_func_t)htpc_enable_req_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {HTPC_HEALTH_TEMP_NTF_CFG_REQ,\n     (ke_msg_func_t)htpc_health_temp_ntf_cfg_req_handler},\n    {HTPC_WR_MEAS_INTV_REQ, (ke_msg_func_t)htpc_wr_meas_intv_req_handler},\n    {HTPC_RD_CHAR_REQ, (ke_msg_func_t)htpc_rd_char_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_EVENT_REQ_IND, (ke_msg_func_t)gattc_event_ind_handler},\n};\n\nvoid htpc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct htpc_env_tag *htpc_env = PRF_ENV_GET(HTPC, htpc);\n\n  task_desc->msg_handler_tab = htpc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(htpc_msg_handler_tab);\n  task_desc->state = htpc_env->state;\n  task_desc->idx_max = HTPC_IDX_MAX;\n}\n\n#endif // BLE_HT_COLLECTOR\n\n/// @} HTPCTASK\n"
  },
  {
    "path": "services/ble_profiles/htp/htpt/api/htpt_task.h",
    "content": "#ifndef HTPT_TASK_H_\n#define HTPT_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HTPTTASK Task\n * @ingroup HTPT\n * @brief Health Thermometer Profile Thermometer Task\n *\n * The HTPTTASK is responsible for handling the messages coming in and out of the\n * @ref HTPT reporter block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"htp_common.h\"\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Messages for Health Thermometer Profile Thermometer\nenum htpt_msg_id\n{\n    /// Start the Health Thermometer Profile Thermometer profile - at connection\n    HTPT_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_HTPT),\n    /// Enable confirmation\n    HTPT_ENABLE_RSP,\n\n    /// Send temperature value from APP\n    HTPT_TEMP_SEND_REQ,\n    /// Send temperature response\n    HTPT_TEMP_SEND_RSP,\n\n    /// Indicate Measurement Interval\n    HTPT_MEAS_INTV_UPD_REQ,\n    /// Send Measurement Interval response\n    HTPT_MEAS_INTV_UPD_RSP,\n\n    /// Inform APP of new measurement interval value requested by a peer device\n    HTPT_MEAS_INTV_CHG_REQ_IND,\n    /// APP Confirm message of new measurement interval value requested by a peer device\n    /// If accepted, it triggers indication on measurement interval attribute\n    HTPT_MEAS_INTV_CHG_CFM,\n\n    /// Inform APP that Indication Configuration has been changed - use to update bond data\n    HTPT_CFG_INDNTF_IND,\n};\n\n\n/// Database Feature Configuration Flags\nenum htpt_features\n{\n    /// Indicate if Temperature Type Char. is supported\n    HTPT_TEMP_TYPE_CHAR_SUP        = 0x01,\n    /// Indicate if Intermediate Temperature Char. is supported\n    HTPT_INTERM_TEMP_CHAR_SUP      = 0x02,\n    /// Indicate if Measurement Interval Char. is supported\n    HTPT_MEAS_INTV_CHAR_SUP        = 0x04,\n    /// Indicate if Measurement Interval Char. supports indications\n    HTPT_MEAS_INTV_IND_SUP         = 0x08,\n    /// Indicate if Measurement Interval Char. is writable\n    HTPT_MEAS_INTV_WR_SUP          = 0x10,\n\n    /// All Features supported\n    HTPT_ALL_FEAT_SUP              = 0x1F,\n};\n\n\n/// Notification and indication configuration\nenum htpt_ntf_ind_cfg\n{\n    /// Stable measurement interval indication enabled\n    HTPT_CFG_STABLE_MEAS_IND    = (1 << 0),\n    /// Intermediate measurement notification enabled\n    HTPT_CFG_INTERM_MEAS_NTF    = (1 << 1),\n    /// Measurement interval indication\n    HTPT_CFG_MEAS_INTV_IND      = (1 << 2),\n};\n\n\n/*\n * API MESSAGES STRUCTURES\n ****************************************************************************************\n */\n/// Parameters of the Health thermometer service database\nstruct htpt_db_cfg\n{\n    /// Health thermometer Feature (@see enum htpt_features)\n    uint8_t features;\n    /// Temperature Type Value\n    uint8_t temp_type;\n\n    /// Measurement Interval Valid Range - Minimal Value\n    uint16_t valid_range_min;\n    /// Measurement Interval Valid Range - Maximal Value\n    uint16_t valid_range_max;\n    /// Measurement interval (latest known interval range)\n    uint16_t meas_intv;\n};\n\n/// Parameters of the @ref HTPT_ENABLE_REQ message\nstruct htpt_enable_req\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Notification configuration (Bond Data to restore: @see enum htpt_ntf_ind_cfg)\n    uint8_t  ntf_ind_cfg;\n};\n\n/// Parameters of the @ref HTPT_ENABLE_RSP message\nstruct htpt_enable_rsp\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Status of enable request\n    uint8_t status;\n};\n\n/// Parameters of the @ref HTPT_TEMP_SEND_REQ message\nstruct htpt_temp_send_req\n{\n    /// Temperature Measurement\n    struct htp_temp_meas temp_meas;\n    /// Stable or intermediary type of temperature (True stable meas, else false)\n    bool stable_meas;\n};\n\n/// Parameters of the @ref HTPT_TEMP_SEND_RSP message\nstruct htpt_temp_send_rsp\n{\n    /// Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref HTPT_MEAS_INTV_UPD_REQ message\nstruct htpt_meas_intv_upd_req\n{\n    /// Measurement Interval value\n    uint16_t meas_intv;\n};\n\n/// Parameters of the @ref HTPT_MEAS_INTV_UPD_RSP message\nstruct htpt_meas_intv_upd_rsp\n{\n    /// status\n    uint8_t status;\n};\n\n\n/// Parameters of the @ref HTPT_MEAS_INTV_CHG_REQ_IND message\nstruct htpt_meas_intv_chg_req_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// new measurement interval\n    uint16_t intv;\n};\n\n/// Parameters of the @ref HTPT_MEAS_INTV_CHG_CFM message\nstruct htpt_meas_intv_chg_cfm\n{\n    /// Connection index\n    uint8_t conidx;\n    /// status of the request\n    uint8_t status;\n};\n\n/// Parameters of the @ref HTPT_CFG_INDNTF_IND message\nstruct htpt_cfg_indntf_ind\n{\n    /// connection index\n    uint8_t  conidx;\n    /// Notification Configuration (@see enum htpt_ntf_ind_cfg)\n    uint8_t  ntf_ind_cfg;\n};\n\n\n/// @} HTPTTASK\n#endif // HTPT_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/htp/htpt/src/htpt.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HTPT\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HT_THERMOM)\n#include \"attm.h\"\n#include \"co_utils.h\"\n#include \"htpt.h\"\n#include \"htpt_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * HTPT PROFILE ATTRIBUTES\n ****************************************************************************************\n */\n/// Full HTS Database Description - Used to add attributes into the database\nconst struct attm_desc htpt_att_db[HTS_IDX_NB] = {\n    // Health Thermometer Service Declaration\n    [HTS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Temperature Measurement Characteristic Declaration\n    [HTS_IDX_TEMP_MEAS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // Temperature Measurement Characteristic Value\n    [HTS_IDX_TEMP_MEAS_VAL] = {ATT_CHAR_TEMPERATURE_MEAS, PERM(IND, ENABLE),\n                               PERM(RI, ENABLE), 0},\n    // Temperature Measurement Characteristic - Client Characteristic\n    // Configuration Descriptor\n    [HTS_IDX_TEMP_MEAS_IND_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   0, 0},\n\n    // Temperature Type Characteristic Declaration\n    [HTS_IDX_TEMP_TYPE_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // Temperature Type Characteristic Value\n    [HTS_IDX_TEMP_TYPE_VAL] = {ATT_CHAR_TEMPERATURE_TYPE, PERM(RD, ENABLE),\n                               PERM(RI, ENABLE), 0},\n\n    // Intermediate Measurement Characteristic Declaration\n    [HTS_IDX_INTERM_TEMP_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                  0},\n    // Intermediate Measurement Characteristic Value\n    [HTS_IDX_INTERM_TEMP_VAL] = {ATT_CHAR_INTERMED_TEMPERATURE,\n                                 PERM(NTF, ENABLE), PERM(RI, ENABLE), 0},\n    // Intermediate Measurement Characteristic - Client Characteristic\n    // Configuration Descriptor\n    [HTS_IDX_INTERM_TEMP_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                 PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                 0},\n\n    // Measurement Interval Characteristic Declaration\n    [HTS_IDX_MEAS_INTV_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // Measurement Interval Characteristic Value\n    [HTS_IDX_MEAS_INTV_VAL] = {ATT_CHAR_MEAS_INTERVAL, PERM(RD, ENABLE),\n                               PERM(RI, ENABLE), HTPT_MEAS_INTV_MAX_LEN},\n    // Measurement Interval Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [HTS_IDX_MEAS_INTV_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                               PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                               0},\n    // Measurement Interval Characteristic - Valid Range Descriptor\n    [HTS_IDX_MEAS_INTV_VAL_RANGE] = {ATT_DESC_VALID_RANGE, PERM(RD, ENABLE),\n                                     PERM(RI, ENABLE), 0},\n};\n\nstatic uint16_t htpt_compute_att_table(uint16_t features);\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nstatic uint8_t htpt_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct htpt_db_cfg *params) {\n  // Service content flag\n  uint16_t cfg_flag;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  BLE_PRF_HP_FUNC_ENTER();\n\n  cfg_flag = htpt_compute_att_table(params->features);\n\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_HEALTH_THERMOM, (uint8_t *)&cfg_flag, HTS_IDX_NB, NULL,\n      env->task, &htpt_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  if (status == ATT_ERR_NO_ERROR) {\n    //-------------------- allocate memory required for the profile\n    //---------------------\n    struct htpt_env_tag *htpt_env = (struct htpt_env_tag *)ke_malloc(\n        sizeof(struct htpt_env_tag), KE_MEM_ATT_DB);\n\n    // allocate PROXR required environment variable\n    env->env = (prf_env_t *)htpt_env;\n\n    htpt_env->shdl = *start_hdl;\n    htpt_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    htpt_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_HTPT;\n    htpt_task_init(&(env->desc));\n\n    // Save features on the environment\n    htpt_env->features = params->features;\n    htpt_env->meas_intv = params->meas_intv;\n    htpt_env->meas_intv_min = params->valid_range_min;\n    htpt_env->meas_intv_max = params->valid_range_max;\n    htpt_env->temp_type = params->temp_type;\n    htpt_env->operation = NULL;\n    memset(htpt_env->ntf_ind_cfg, 0, sizeof(htpt_env->ntf_ind_cfg));\n\n    // Update measurement interval permissions\n    if (HTPT_IS_FEATURE_SUPPORTED(params->features, HTPT_MEAS_INTV_CHAR_SUP)) {\n      uint16_t perm = PERM(RD, ENABLE);\n\n      // Check if Measurement Interval Char. supports indications\n      if (HTPT_IS_FEATURE_SUPPORTED(params->features, HTPT_MEAS_INTV_IND_SUP)) {\n        perm |= PERM(IND, ENABLE);\n      }\n\n      // Check if Measurement Interval Char. is writable\n      if (HTPT_IS_FEATURE_SUPPORTED(params->features, HTPT_MEAS_INTV_WR_SUP)) {\n        perm |= PERM(WP, UNAUTH) | PERM(WRITE_REQ, ENABLE);\n      }\n\n      attm_att_set_permission(HTPT_HANDLE(HTS_IDX_MEAS_INTV_VAL), perm, 0);\n    }\n\n    // service is ready, go into an Idle state\n    ke_state_set(env->task, HTPT_IDLE);\n  }\n\n  BLE_PRF_HP_FUNC_LEAVE();\n\n  return (status);\n}\n\nstatic void htpt_destroy(struct prf_task_env *env) {\n  struct htpt_env_tag *htpt_env = (struct htpt_env_tag *)env->env;\n\n  BLE_PRF_HP_FUNC_ENTER();\n\n  // free profile environment variables\n  if (htpt_env->operation != NULL) {\n    ke_free(htpt_env->operation);\n  }\n\n  env->env = NULL;\n  ke_free(htpt_env);\n\n  BLE_PRF_HP_FUNC_LEAVE();\n}\n\nstatic void htpt_create(struct prf_task_env *env, uint8_t conidx) {\n  BLE_PRF_HP_FUNC_ENTER();\n\n  /* Clear configuration for this connection */\n  struct htpt_env_tag *htpt_env = (struct htpt_env_tag *)env->env;\n  htpt_env->ntf_ind_cfg[conidx] = 0;\n\n  BLE_PRF_HP_FUNC_LEAVE();\n}\n\nstatic void htpt_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  BLE_PRF_HP_FUNC_ENTER();\n\n  /* Clear configuration for this connection */\n  struct htpt_env_tag *htpt_env = (struct htpt_env_tag *)env->env;\n  htpt_env->ntf_ind_cfg[conidx] = 0;\n\n  BLE_PRF_HP_FUNC_LEAVE();\n}\n\n/**\n ****************************************************************************************\n * @brief Compute a flag allowing to know attributes to add into the database\n *\n * @return a 16-bit flag whose each bit matches an attribute. If the bit is set\n *to 1, the attribute will be added into the database.\n ****************************************************************************************\n */\nstatic uint16_t htpt_compute_att_table(uint16_t features) {\n  BLE_PRF_HP_FUNC_ENTER();\n\n  // Temperature Measurement Characteristic is mandatory\n  uint16_t att_table = HTPT_TEMP_MEAS_MASK;\n\n  // Check if Temperature Type Char. is supported\n  if (HTPT_IS_FEATURE_SUPPORTED(features, HTPT_TEMP_TYPE_CHAR_SUP)) {\n    att_table |= HTPT_TEMP_TYPE_MASK;\n  }\n\n  // Check if Intermediate Temperature Char. is supported\n  if (HTPT_IS_FEATURE_SUPPORTED(features, HTPT_INTERM_TEMP_CHAR_SUP)) {\n    att_table |= HTPT_INTM_TEMP_MASK;\n  }\n\n  // Check if Measurement Interval Char. is supported\n  if (HTPT_IS_FEATURE_SUPPORTED(features, HTPT_MEAS_INTV_CHAR_SUP)) {\n    att_table |= HTPT_MEAS_INTV_MASK;\n\n    // Check if Measurement Interval Char. supports indications\n    if (HTPT_IS_FEATURE_SUPPORTED(features, HTPT_MEAS_INTV_IND_SUP)) {\n      att_table |= HTPT_MEAS_INTV_CCC_MASK;\n    }\n\n    // Check if Measurement Interval Char. is writable\n    if (HTPT_IS_FEATURE_SUPPORTED(features, HTPT_MEAS_INTV_WR_SUP)) {\n      att_table |= HTPT_MEAS_INTV_VALID_RGE_MASK;\n    }\n  }\n\n  BLE_PRF_HP_FUNC_LEAVE();\n\n  return att_table;\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// HTPT Task interface required by profile manager\nconst struct prf_task_cbs htpt_itf = {\n    (prf_init_fnct)htpt_init,\n    htpt_destroy,\n    htpt_create,\n    htpt_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nuint8_t htpt_get_valid_rge_offset(uint16_t features) {\n  uint8_t offset = 0;\n\n  if (HTPT_IS_FEATURE_SUPPORTED(features, HTPT_MEAS_INTV_WR_SUP)) {\n    offset += 1;\n\n    if (HTPT_IS_FEATURE_SUPPORTED(features, HTPT_MEAS_INTV_IND_SUP)) {\n      offset += 1;\n    }\n  }\n\n  return offset;\n}\n\nuint8_t htpt_pack_temp_value(uint8_t *packed_temp,\n                             struct htp_temp_meas temp_meas) {\n  uint8_t cursor = 0;\n\n  *(packed_temp + cursor) = temp_meas.flags;\n  cursor += 1;\n\n  co_write32p(packed_temp + cursor, temp_meas.temp);\n  cursor += 4;\n\n  // Time Flag Set\n  if ((temp_meas.flags & HTP_FLAG_TIME) == HTP_FLAG_TIME) {\n    cursor += prf_pack_date_time(packed_temp + cursor, &(temp_meas.time_stamp));\n  }\n\n  // Type flag set\n  if ((temp_meas.flags & HTP_FLAG_TYPE) == HTP_FLAG_TYPE) {\n    *(packed_temp + cursor) = temp_meas.type;\n    cursor += 1;\n  }\n\n  // Clear unused packet data\n  if (cursor < HTPT_TEMP_MEAS_MAX_LEN) {\n    memset(packed_temp + cursor, 0, (HTPT_TEMP_MEAS_MAX_LEN - cursor));\n  }\n\n  return cursor;\n}\n\nvoid htpt_exe_operation(void) {\n  BLE_PRF_HP_FUNC_ENTER();\n\n  struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n\n  ASSERT_ERR(htpt_env->operation != NULL);\n\n  bool finished = true;\n\n  while (htpt_env->operation->cursor < BLE_CONNECTION_MAX) {\n    // check if this type of event is enabled\n    if (((htpt_env->ntf_ind_cfg[htpt_env->operation->cursor] &\n          htpt_env->operation->op) != 0)\n        // and event not filtered on current connection\n        && (htpt_env->operation->conidx != htpt_env->operation->cursor)) {\n      // trigger the event\n      struct gattc_send_evt_cmd *evt =\n          KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD,\n                           KE_BUILD_ID(TASK_GATTC, htpt_env->operation->cursor),\n                           prf_src_task_get(&htpt_env->prf_env, 0),\n                           gattc_send_evt_cmd, htpt_env->operation->length);\n\n      evt->operation = (htpt_env->operation->op != HTPT_CFG_INTERM_MEAS_NTF)\n                           ? GATTC_INDICATE\n                           : GATTC_NOTIFY;\n      evt->length = htpt_env->operation->length;\n      evt->handle = htpt_env->operation->handle;\n      memcpy(evt->value, htpt_env->operation->data, evt->length);\n\n      ke_msg_send(evt);\n\n      finished = false;\n      htpt_env->operation->cursor++;\n      break;\n    }\n    htpt_env->operation->cursor++;\n  }\n\n  // check if operation is finished\n  if (finished) {\n    // do not send response if operation has been locally requested\n    if (htpt_env->operation->dest_id !=\n        prf_src_task_get(&htpt_env->prf_env, 0)) {\n      // send response to requester\n      struct htpt_meas_intv_upd_rsp *rsp = KE_MSG_ALLOC(\n          ((htpt_env->operation->op == HTPT_CFG_MEAS_INTV_IND)\n               ? HTPT_MEAS_INTV_UPD_RSP\n               : HTPT_TEMP_SEND_RSP),\n          htpt_env->operation->dest_id, prf_src_task_get(&htpt_env->prf_env, 0),\n          htpt_meas_intv_upd_rsp);\n      rsp->status = GAP_ERR_NO_ERROR;\n      ke_msg_send(rsp);\n    }\n\n    // free operation\n    ke_free(htpt_env->operation);\n    htpt_env->operation = NULL;\n    // go back to idle state\n    ke_state_set(prf_src_task_get(&(htpt_env->prf_env), 0), HTPT_IDLE);\n  }\n\n  BLE_PRF_HP_FUNC_LEAVE();\n}\n\nuint8_t htpt_update_ntf_ind_cfg(uint8_t conidx, uint8_t cfg, uint16_t valid_val,\n                                uint16_t value) {\n  struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  BLE_PRF_HP_FUNC_ENTER();\n\n  if ((value != valid_val) && (value != PRF_CLI_STOP_NTFIND)) {\n    status = PRF_APP_ERROR;\n\n  } else if (value == valid_val) {\n    htpt_env->ntf_ind_cfg[conidx] |= cfg;\n  } else {\n    htpt_env->ntf_ind_cfg[conidx] &= ~cfg;\n  }\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // inform application that notification/indication configuration has changed\n    struct htpt_cfg_indntf_ind *ind = KE_MSG_ALLOC(\n        HTPT_CFG_INDNTF_IND, prf_dst_task_get(&htpt_env->prf_env, conidx),\n        prf_src_task_get(&htpt_env->prf_env, conidx), htpt_cfg_indntf_ind);\n    ind->conidx = conidx;\n    ind->ntf_ind_cfg = htpt_env->ntf_ind_cfg[conidx];\n    ke_msg_send(ind);\n  }\n\n  BLE_PRF_HP_FUNC_LEAVE();\n\n  return (status);\n}\n\nconst struct prf_task_cbs *htpt_prf_itf_get(void) { return &htpt_itf; }\n\nuint16_t htpt_att_hdl_get(struct htpt_env_tag *htpt_env, uint8_t att_idx) {\n  uint16_t handle = htpt_env->shdl;\n\n  do {\n    // Mandatory attribute handle\n    if (att_idx > HTS_IDX_TEMP_MEAS_IND_CFG) {\n      handle += HTPT_TEMP_MEAS_ATT_NB;\n    } else {\n      handle += att_idx;\n      break;\n    }\n\n    // Temperature Type\n    if ((HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                   HTPT_TEMP_TYPE_CHAR_SUP)) &&\n        (att_idx > HTS_IDX_TEMP_TYPE_VAL)) {\n      handle += HTPT_TEMP_TYPE_ATT_NB;\n    } else if (!HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                          HTPT_TEMP_TYPE_CHAR_SUP)) {\n      handle = ATT_INVALID_HANDLE;\n      break;\n    } else {\n      handle += att_idx - HTS_IDX_TEMP_TYPE_CHAR;\n      break;\n    }\n\n    // Intermediate Temperature Measurement\n    if ((HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                   HTPT_INTERM_TEMP_CHAR_SUP)) &&\n        (att_idx > HTS_IDX_INTERM_TEMP_CFG)) {\n      handle += HTPT_INTERM_MEAS_ATT_NB;\n    } else if (!HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                          HTPT_INTERM_TEMP_CHAR_SUP)) {\n      handle = ATT_INVALID_HANDLE;\n      break;\n    } else {\n      handle += att_idx - HTS_IDX_INTERM_TEMP_CHAR;\n      break;\n    }\n\n    // Measurement Interval\n    if (!HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                   HTPT_MEAS_INTV_CHAR_SUP) ||\n        (att_idx >= HTS_IDX_NB)) {\n      handle = ATT_INVALID_HANDLE;\n      break;\n    }\n\n    if (att_idx <= HTS_IDX_MEAS_INTV_VAL) {\n      handle += att_idx - HTS_IDX_MEAS_INTV_CHAR;\n      break;\n    } else {\n      handle += HTPT_MEAS_INTV_ATT_NB;\n    }\n\n    // Measurement Interval Indication\n    if (att_idx == HTS_IDX_MEAS_INTV_CFG) {\n      if (!HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                     HTPT_MEAS_INTV_IND_SUP)) {\n        handle = ATT_INVALID_HANDLE;\n        break;\n      }\n    }\n    // Measurement Interval Write permission\n    else if (HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                       HTPT_MEAS_INTV_WR_SUP)) {\n      handle += HTPT_MEAS_INTV_CCC_ATT_NB;\n\n      if (!HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                     HTPT_MEAS_INTV_WR_SUP)) {\n        handle = ATT_INVALID_HANDLE;\n        break;\n      }\n    }\n  } while (0);\n\n  return handle;\n}\n\nuint8_t htpt_att_idx_get(struct htpt_env_tag *htpt_env, uint16_t handle) {\n  uint16_t handle_ref = htpt_env->shdl;\n  uint8_t att_idx = ATT_INVALID_IDX;\n\n  do {\n    // not valid hande\n    if (handle < handle_ref) {\n      break;\n    }\n\n    // Mandatory attribute handle\n    handle_ref += HTPT_TEMP_MEAS_ATT_NB;\n\n    if (handle < handle_ref) {\n      att_idx = HTS_IDX_TEMP_TYPE_CHAR - (handle_ref - handle);\n      break;\n    }\n\n    // Temperature Type\n    if (HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                  HTPT_TEMP_TYPE_CHAR_SUP)) {\n      handle_ref += HTPT_TEMP_TYPE_ATT_NB;\n\n      if (handle < handle_ref) {\n        att_idx = HTS_IDX_INTERM_TEMP_CHAR - (handle_ref - handle);\n        break;\n      }\n    }\n\n    // Intermediate Temperature Measurement\n    if (HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                  HTPT_INTERM_TEMP_CHAR_SUP)) {\n      handle_ref += HTPT_INTERM_MEAS_ATT_NB;\n\n      if (handle < handle_ref) {\n        att_idx = HTS_IDX_MEAS_INTV_CHAR - (handle_ref - handle);\n        break;\n      }\n    }\n\n    // Measurement Interval\n    if (HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                  HTPT_MEAS_INTV_CHAR_SUP)) {\n      handle_ref += HTPT_MEAS_INTV_ATT_NB;\n\n      if (handle < handle_ref) {\n        att_idx = HTS_IDX_MEAS_INTV_CFG - (handle_ref - handle);\n        break;\n      }\n\n      if (HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                    HTPT_MEAS_INTV_IND_SUP)) {\n        if (handle == handle_ref) {\n          att_idx = HTS_IDX_MEAS_INTV_CFG;\n          break;\n        }\n\n        handle_ref += HTPT_MEAS_INTV_CCC_ATT_NB;\n      }\n\n      if (HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                    HTPT_MEAS_INTV_WR_SUP)) {\n        if (handle == handle_ref) {\n          att_idx = HTS_IDX_MEAS_INTV_VAL_RANGE;\n          break;\n        }\n      }\n    }\n  } while (0);\n\n  return att_idx;\n}\n\n#endif // BLE_HT_THERMOM\n\n/// @} HTPT\n"
  },
  {
    "path": "services/ble_profiles/htp/htpt/src/htpt.h",
    "content": "#ifndef HTPT_H_\n#define HTPT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HTPT Health Thermometer Profile Thermometer\n * @ingroup HTP\n * @brief Health Thermometer Profile Thermometer\n *\n * An actual thermometer device does not exist on current platform, so measurement values\n * that would come from a driver are replaced by simple counters sent at certain intervals\n * following by the profile attributes configuration.\n * When a measurement interval\n * has been set to a non-zero value in a configuration connection, once reconnected,\n * TH will send regular measurement INDs if Temp Meas Char Cfg is set to indicate and\n * using the Meas Intv Value. The INDs will continue until meas interval is set to 0\n * or connection gets disconnected by C. Measurements should be stored even so, until\n * profile is disabled.(?)\n *\n * If the measurement interval has been set to 0, then if Intermediate Temp is set to be\n * notified and Temp Meas to be indicated, then a timer of fixed length simulates\n * sending several NTF before and indication of a \"stable\" value. This fake behavior\n * should be replaced once a real driver exists. If Intermediary Temp cannot be notified,\n * just send the indication, if neither can be sent (the configuration connection should\n * never leave this like this) then disconnect.\n *\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_HT_THERMOM)\n#include \n#include \n#include \"htp_common.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n#include \"gap.h\"\n\n/*\n * MACROS\n ****************************************************************************************\n */\n#define HTPT_IS_FEATURE_SUPPORTED(feat, bit_mask) (((feat & bit_mask) == bit_mask))\n\n#define HTPT_HANDLE(idx) (htpt_att_hdl_get(htpt_env, (idx)))\n\n#define HTPT_IDX(hdl)    (htpt_att_idx_get(htpt_env, (hdl)))\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n///Maximum number of Health thermometer task instances\n#define HTPT_IDX_MAX    (1)\n\n\n///Valid range for measurement interval values (s)\n#define HTPT_MEAS_INTV_DFLT_MIN           (0x0001)\n#define HTPT_MEAS_INTV_DFLT_MAX           (0x000A)\n\n#define HTPT_TEMP_MEAS_MAX_LEN            (13)\n#define HTPT_TEMP_TYPE_MAX_LEN            (1)\n#define HTPT_MEAS_INTV_MAX_LEN            (2)\n#define HTPT_MEAS_INTV_RANGE_MAX_LEN      (4)\n#define HTPT_IND_NTF_CFG_MAX_LEN          (2)\n\n#define HTPT_TEMP_MEAS_MASK               (0x000F)\n#define HTPT_TEMP_TYPE_MASK               (0x0030)\n#define HTPT_INTM_TEMP_MASK               (0x01C0)\n#define HTPT_MEAS_INTV_MASK               (0x0600)\n#define HTPT_MEAS_INTV_CCC_MASK           (0x0800)\n#define HTPT_MEAS_INTV_VALID_RGE_MASK     (0x1000)\n\n#define HTPT_TEMP_MEAS_ATT_NB             (4)\n#define HTPT_TEMP_TYPE_ATT_NB             (2)\n#define HTPT_INTERM_MEAS_ATT_NB           (3)\n#define HTPT_MEAS_INTV_ATT_NB             (2)\n#define HTPT_MEAS_INTV_CCC_ATT_NB         (1)\n#define HTPT_MEAS_INTV_RNG_ATT_NB         (1)\n\n\n/// Possible states of the HTPT task\nenum htpt_state\n{\n    /// Idle state\n    HTPT_IDLE,\n    /// Busy state\n    HTPT_BUSY,\n\n    /// Number of defined states.\n    HTPT_STATE_MAX\n};\n\n///Attributes database elements\nenum hts_att_db_list\n{\n    HTS_IDX_SVC,\n\n    HTS_IDX_TEMP_MEAS_CHAR,\n    HTS_IDX_TEMP_MEAS_VAL,\n    HTS_IDX_TEMP_MEAS_IND_CFG,\n\n    HTS_IDX_TEMP_TYPE_CHAR,\n    HTS_IDX_TEMP_TYPE_VAL,\n\n    HTS_IDX_INTERM_TEMP_CHAR,\n    HTS_IDX_INTERM_TEMP_VAL,\n    HTS_IDX_INTERM_TEMP_CFG,\n\n    HTS_IDX_MEAS_INTV_CHAR,\n    HTS_IDX_MEAS_INTV_VAL,\n    HTS_IDX_MEAS_INTV_CFG,\n    HTS_IDX_MEAS_INTV_VAL_RANGE,\n\n    HTS_IDX_NB,\n};\n\n\n/// ongoing operation information\nstruct htpt_op\n{\n     /// Operation\n     uint8_t op;\n     /// Cursor on connection\n     uint8_t cursor;\n     /// Handle of the attribute to indicate/notify\n     uint16_t handle;\n     /// Task that request the operation that should receive completed message response\n     uint16_t dest_id;\n     /// Packed notification/indication data size\n     uint8_t length;\n     /// used to know on which device interval update has been requested, and to prevent\n     /// indication to be triggered on this connection index\n     uint8_t conidx;\n     /// Packed notification/indication data\n     uint8_t data[__ARRAY_EMPTY];\n};\n\n\n///Health Thermometer Profile Thermometer Environment Variable\nstruct htpt_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// On-going operation\n    struct htpt_op * operation;\n    /// Service Start Handle\n    uint16_t shdl;\n    /// Database configuration\n    uint16_t features;\n\n    /// Current Measure interval\n    uint16_t meas_intv;\n    /// measurement interval range min\n    uint16_t meas_intv_min;\n    /// measurement interval range max\n    uint16_t meas_intv_max;\n    /// Temperature Type Value\n    uint8_t temp_type;\n\n    /// Notification and indication configuration of peer devices.\n    uint8_t ntf_ind_cfg[BLE_CONNECTION_MAX];\n    /// State of different task instances\n    ke_state_t state[HTPT_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Compute the offset of the valid range descriptor.\n * The Measurement Interval characteristic has two optional descriptors. In the database,\n * the Client Characteristic Configuration descriptor will always be placed just after the\n * characteristic value. Thus, this function checks if the CCC descriptor has been added.\n * @return     0 if Measurement Interval Char. is not writable (no Valid Range descriptor)\n *             1 if Measurement Interval Char. doesn't support indications (no CCC descriptor)\n *             2 otherwise\n ****************************************************************************************\n */\nuint8_t htpt_get_valid_rge_offset(uint16_t features);\n\n/**\n ****************************************************************************************\n * @brief Retrieve HTS service profile interface\n *\n * @return HTS service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* htpt_prf_itf_get(void);\n\n\n/**\n ****************************************************************************************\n * @brief Pack temperature value from several components\n *\n * @return size of packed value\n ****************************************************************************************\n */\nuint8_t htpt_pack_temp_value(uint8_t *packed_temp, struct htp_temp_meas temp_meas);\n\n\n/**\n ****************************************************************************************\n * @brief  This function fully manage notification and indication of health thermometer\n *         to peer(s) device(s) according to on-going operation requested by application:\n *            - Modification of Intermediate Temperature\n *            - Indicate to a known device that Temperature Measured has change\n *            - Indicate to a known device that Measure Interval has change\n ****************************************************************************************\n */\nvoid htpt_exe_operation(void);\n\n\n\n/**\n ****************************************************************************************\n * @brief Update Notification, Indication configuration\n *\n * @param[in] conidx    Connection index\n * @param[in] cfg       Indication configuration flag\n * @param[in] valid_val Valid value if NTF/IND enable\n * @param[in] value     Value set by peer device.\n *\n * @return status of configuration update\n ****************************************************************************************\n */\nuint8_t htpt_update_ntf_ind_cfg(uint8_t conidx, uint8_t cfg, uint16_t valid_val, uint16_t value);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve attribute handle from attribute index\n *\n * @param[in] htpt_env   Environment variable\n * @param[in] att_idx    Attribute Index\n *\n * @return attribute Handle\n ****************************************************************************************\n */\nuint16_t htpt_att_hdl_get(struct htpt_env_tag* htpt_env, uint8_t att_idx);\n\n/**\n ****************************************************************************************\n * @brief Retrieve attribute index from attribute handle\n *\n * @param[in] htpt_env   Environment variable\n * @param[in] handle     Attribute Handle\n *\n * @return attribute Index\n ****************************************************************************************\n */\nuint8_t htpt_att_idx_get(struct htpt_env_tag* htpt_env, uint16_t handle);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid htpt_task_init(struct ke_task_desc *task_desc);\n\n\n\n#endif //BLE_HT_THERMOM\n\n/// @} HTPT\n\n#endif // HTPT_H_\n"
  },
  {
    "path": "services/ble_profiles/htp/htpt/src/htpt_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup HTPTTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_HT_THERMOM)\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"htpt.h\"\n#include \"htpt_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HTPT_ENABLE_REQ message.\n * The handler enables the Health Thermometer Profile Thermometer Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int htpt_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct htpt_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  // check state of the task\n  if (gapc_get_conhdl(param->conidx) != GAP_INVALID_CONHDL) {\n    // restore Bond Data\n    struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n    htpt_env->ntf_ind_cfg[param->conidx] = param->ntf_ind_cfg;\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  // send response\n  struct htpt_enable_rsp *rsp =\n      KE_MSG_ALLOC(HTPT_ENABLE_RSP, src_id, dest_id, htpt_enable_rsp);\n  rsp->conidx = param->conidx;\n  rsp->status = status;\n  ke_msg_send(rsp);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HTPT_TEMP_SEND_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int htpt_temp_send_req_handler(ke_msg_id_t const msgid,\n                                        struct htpt_temp_send_req const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Status\n  int msg_status = KE_MSG_SAVED;\n  uint8_t state = ke_state_get(dest_id);\n\n  // check state of the task\n  if (state == HTPT_IDLE) {\n    // Get the address of the environment\n    struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n\n    // for intermediate measurement, feature must be enabled\n    if (!(param->stable_meas) &&\n        (!HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                    HTPT_INTERM_TEMP_CHAR_SUP))) {\n      struct htpt_temp_send_rsp *rsp =\n          KE_MSG_ALLOC(HTPT_TEMP_SEND_RSP, src_id, dest_id, htpt_temp_send_rsp);\n      rsp->status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n      ke_msg_send(rsp);\n    } else {\n      // allocate operation to execute\n      htpt_env->operation = (struct htpt_op *)ke_malloc(\n          sizeof(struct htpt_op) + HTPT_TEMP_MEAS_MAX_LEN, KE_MEM_ATT_DB);\n\n      // Initialize operation parameters\n      htpt_env->operation->cursor = 0;\n      htpt_env->operation->dest_id = src_id;\n      htpt_env->operation->conidx = GAP_INVALID_CONIDX;\n\n      // Stable measurement indication or intermediate measurement notification\n      if (param->stable_meas) {\n        htpt_env->operation->op = HTPT_CFG_STABLE_MEAS_IND;\n        htpt_env->operation->handle = HTPT_HANDLE(HTS_IDX_TEMP_MEAS_VAL);\n      } else {\n        htpt_env->operation->op = HTPT_CFG_INTERM_MEAS_NTF;\n        htpt_env->operation->handle = HTPT_HANDLE(HTS_IDX_INTERM_TEMP_VAL);\n      }\n\n      // Pack the temperature measurement value\n      htpt_env->operation->length = htpt_pack_temp_value(\n          &(htpt_env->operation->data[0]), param->temp_meas);\n\n      // put task in a busy state\n      ke_state_set(dest_id, HTPT_BUSY);\n\n      // execute operation\n      htpt_exe_operation();\n    }\n\n    msg_status = KE_MSG_CONSUMED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Request to update Measurement Interval Value\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int htpt_meas_intv_upd_req_handler(\n    ke_msg_id_t const msgid, struct htpt_meas_intv_upd_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_SAVED;\n  uint8_t state = ke_state_get(dest_id);\n\n  // check state of the task\n  if (state == HTPT_IDLE) {\n    // Get the address of the environment\n    struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n\n    // update measurement interval\n    htpt_env->meas_intv = param->meas_intv;\n\n    // Check if Measurement Interval indication is supported\n    if (!HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                   HTPT_MEAS_INTV_CHAR_SUP)) {\n      struct htpt_meas_intv_upd_rsp *rsp = KE_MSG_ALLOC(\n          HTPT_MEAS_INTV_UPD_RSP, src_id, dest_id, htpt_meas_intv_upd_rsp);\n      rsp->status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n      ke_msg_send(rsp);\n    } else {\n      // update internal measurement interval value\n      htpt_env->meas_intv = param->meas_intv;\n\n      // no indication to trigger\n      if (!HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                     HTPT_MEAS_INTV_IND_SUP)) {\n        struct htpt_meas_intv_upd_rsp *rsp = KE_MSG_ALLOC(\n            HTPT_MEAS_INTV_UPD_RSP, src_id, dest_id, htpt_meas_intv_upd_rsp);\n        rsp->status = GAP_ERR_NO_ERROR;\n        ke_msg_send(rsp);\n      }\n      // trigger measurement update indication\n      else {\n        // allocate operation to execute\n        htpt_env->operation = (struct htpt_op *)ke_malloc(\n            sizeof(struct htpt_op) + HTPT_MEAS_INTV_MAX_LEN, KE_MEM_ATT_DB);\n\n        // Initialize operation parameters\n        htpt_env->operation->op = HTPT_CFG_MEAS_INTV_IND;\n        htpt_env->operation->handle = HTPT_HANDLE(HTS_IDX_MEAS_INTV_VAL);\n        htpt_env->operation->dest_id = src_id;\n        htpt_env->operation->cursor = 0;\n        htpt_env->operation->conidx = GAP_INVALID_CONIDX;\n\n        // Pack the interval value\n        htpt_env->operation->length = HTPT_MEAS_INTV_MAX_LEN;\n        co_write16p(htpt_env->operation->data, param->meas_intv);\n\n        // put task in a busy state\n        ke_state_set(dest_id, HTPT_BUSY);\n\n        // execute operation\n        htpt_exe_operation();\n      }\n    }\n\n    msg_status = KE_MSG_CONSUMED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_att_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_att_info_req_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n  uint8_t att_idx = HTPT_IDX(param->handle);\n  struct gattc_att_info_cfm *cfm;\n\n  // Send write response\n  cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n  cfm->handle = param->handle;\n\n  switch (att_idx) {\n  case HTS_IDX_MEAS_INTV_VAL: {\n    // force length to zero to reject any write starting from something != 0\n    cfm->length = 0;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } break;\n\n  case HTS_IDX_TEMP_MEAS_IND_CFG:\n  case HTS_IDX_INTERM_TEMP_CFG:\n  case HTS_IDX_MEAS_INTV_CFG: {\n    cfm->length = HTPT_IND_NTF_CFG_MAX_LEN;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } break;\n\n  default: {\n    cfm->status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n  } break;\n  }\n\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GL2C_CODE_ATT_WR_CMD_IND message.\n * The handler compares the new values with current ones and notifies them if\n *they changed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  uint8_t status = ATT_ERR_NO_ERROR;\n  int msg_status = KE_MSG_CONSUMED;\n\n  // to check if confirmation message should be send\n  bool send_cfm = true;\n\n  // retrieve handle information\n  uint8_t att_idx = HTPT_IDX(param->handle);\n\n  if (param->length != HTPT_MEAS_INTV_MAX_LEN) {\n    status = PRF_ERR_UNEXPECTED_LEN;\n  } else {\n    switch (att_idx) {\n    case HTS_IDX_MEAS_INTV_VAL: {\n      uint16_t meas_intv = co_read16p(param->value);\n\n      // check measurement length validity\n      if (((meas_intv >= htpt_env->meas_intv_min) &&\n           (meas_intv <= htpt_env->meas_intv_max))\n          // notification can be disabled anyway\n          || (meas_intv == 0)) {\n        uint8_t state = ke_state_get(dest_id);\n        send_cfm = false;\n\n        // check state of the task to know if it can be proceed immediately\n        if (state == HTPT_IDLE) {\n          // inform application that update of measurement interval is requested\n          // by peer device.\n          struct htpt_meas_intv_chg_req_ind *req_ind =\n              KE_MSG_ALLOC(HTPT_MEAS_INTV_CHG_REQ_IND,\n                           prf_dst_task_get(&htpt_env->prf_env, conidx),\n                           dest_id, htpt_meas_intv_chg_req_ind);\n          req_ind->conidx = conidx;\n          req_ind->intv = meas_intv;\n          ke_msg_send(req_ind);\n\n          // allocate operation to execute\n          htpt_env->operation = (struct htpt_op *)ke_malloc(\n              sizeof(struct htpt_op) + HTPT_MEAS_INTV_MAX_LEN, KE_MEM_ATT_DB);\n\n          // Initialize operation parameters\n          htpt_env->operation->op = HTPT_CFG_MEAS_INTV_IND;\n          htpt_env->operation->handle = HTPT_HANDLE(HTS_IDX_MEAS_INTV_VAL);\n          htpt_env->operation->dest_id = dest_id;\n          htpt_env->operation->conidx = conidx;\n          // to be sure that no notification will be triggered\n          htpt_env->operation->cursor = 0xFF;\n\n          // Pack the interval value\n          htpt_env->operation->length = HTPT_MEAS_INTV_MAX_LEN;\n          co_write16p(htpt_env->operation->data, meas_intv);\n\n          // put task in a busy state\n          ke_state_set(dest_id, HTPT_BUSY);\n        } else {\n          msg_status = KE_MSG_SAVED;\n        }\n      } else {\n        // value not in expected range\n        status = HTP_OUT_OF_RANGE_ERR_CODE;\n      }\n    } break;\n\n    case HTS_IDX_TEMP_MEAS_IND_CFG: {\n      status =\n          htpt_update_ntf_ind_cfg(conidx, HTPT_CFG_STABLE_MEAS_IND,\n                                  PRF_CLI_START_IND, co_read16p(param->value));\n    } break;\n\n    case HTS_IDX_INTERM_TEMP_CFG: {\n      status =\n          htpt_update_ntf_ind_cfg(conidx, HTPT_CFG_INTERM_MEAS_NTF,\n                                  PRF_CLI_START_NTF, co_read16p(param->value));\n    } break;\n\n    case HTS_IDX_MEAS_INTV_CFG: {\n      status =\n          htpt_update_ntf_ind_cfg(conidx, HTPT_CFG_MEAS_INTV_IND,\n                                  PRF_CLI_START_IND, co_read16p(param->value));\n    } break;\n\n    default: {\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n  }\n\n  if (send_cfm) {\n    // Send write response\n    struct gattc_write_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n    cfm->handle = param->handle;\n    cfm->status = status;\n    ke_msg_send(cfm);\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_REQ_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_write_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  uint8_t value[HTPT_MEAS_INTV_RANGE_MAX_LEN];\n  uint8_t value_size = 0;\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  // retrieve handle information\n  uint8_t att_idx = HTPT_IDX(param->handle);\n\n  switch (att_idx) {\n  case HTS_IDX_MEAS_INTV_VAL: {\n    value_size = HTPT_MEAS_INTV_MAX_LEN;\n    co_write16p(&(value[0]), htpt_env->meas_intv);\n  } break;\n\n  case HTS_IDX_MEAS_INTV_VAL_RANGE: {\n    value_size = HTPT_MEAS_INTV_RANGE_MAX_LEN;\n    co_write16p(&(value[0]), htpt_env->meas_intv_min);\n    co_write16p(&(value[2]), htpt_env->meas_intv_max);\n  } break;\n\n  case HTS_IDX_TEMP_MEAS_IND_CFG: {\n    value_size = HTPT_IND_NTF_CFG_MAX_LEN;\n    co_write16p(\n        value, ((htpt_env->ntf_ind_cfg[conidx] & HTPT_CFG_STABLE_MEAS_IND) != 0)\n                   ? PRF_CLI_START_IND\n                   : PRF_CLI_STOP_NTFIND);\n  } break;\n\n  case HTS_IDX_INTERM_TEMP_CFG: {\n    value_size = HTPT_IND_NTF_CFG_MAX_LEN;\n    co_write16p(\n        value, ((htpt_env->ntf_ind_cfg[conidx] & HTPT_CFG_INTERM_MEAS_NTF) != 0)\n                   ? PRF_CLI_START_NTF\n                   : PRF_CLI_STOP_NTFIND);\n  } break;\n\n  case HTS_IDX_MEAS_INTV_CFG: {\n    value_size = HTPT_IND_NTF_CFG_MAX_LEN;\n    co_write16p(value,\n                ((htpt_env->ntf_ind_cfg[conidx] & HTPT_CFG_MEAS_INTV_IND) != 0)\n                    ? PRF_CLI_START_IND\n                    : PRF_CLI_STOP_NTFIND);\n  } break;\n\n  case HTS_IDX_TEMP_TYPE_VAL: {\n    value_size = HTPT_TEMP_TYPE_MAX_LEN;\n    value[0] = htpt_env->temp_type;\n  } break;\n\n  default: {\n    status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n  } break;\n  }\n\n  // Send data to peer device\n  struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id,\n                                                gattc_read_cfm, value_size);\n  cfm->length = value_size;\n  memcpy(cfm->value, value, value_size);\n  cfm->handle = param->handle;\n  cfm->status = status;\n\n  // Send value to peer device.\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref HTPT_MEAS_INTV_UPD_CFM message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int htpt_meas_intv_chg_cfm_handler(\n    ke_msg_id_t const msgid, struct htpt_meas_intv_chg_cfm const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n\n  uint8_t state = ke_state_get(dest_id);\n\n  // check state of the task\n  if (state == HTPT_BUSY) {\n    // retrieve connection index from operation\n    uint8_t conidx = htpt_env->operation->conidx;\n\n    // Send write response\n    struct gattc_write_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_WRITE_CFM, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n                     gattc_write_cfm);\n    cfm->handle = HTPT_HANDLE(HTS_IDX_MEAS_INTV_VAL);\n    cfm->status = (param->conidx == conidx) ? param->status : PRF_APP_ERROR;\n    ke_msg_send(cfm);\n\n    // check if no error occurs\n    if (cfm->status == GAP_ERR_NO_ERROR) {\n      // update the current measurement interval\n      htpt_env->meas_intv = co_read16p(htpt_env->operation->data);\n\n      // check if an indication of new measurement interval should be triggered\n      if (HTPT_IS_FEATURE_SUPPORTED(htpt_env->features,\n                                    HTPT_MEAS_INTV_IND_SUP)) {\n        // set back cursor to zero in order to send indication\n        htpt_env->operation->cursor = 0;\n      }\n    }\n\n    // send indication or terminate operation\n    htpt_exe_operation();\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY and GATT_INDICATE message\n *meaning that Measurement notification/indication has been correctly sent to\n *peer device\n *\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // continue operation execution\n  htpt_exe_operation();\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(htpt){\n    {HTPT_ENABLE_REQ, (ke_msg_func_t)htpt_enable_req_handler},\n\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n\n    {HTPT_TEMP_SEND_REQ, (ke_msg_func_t)htpt_temp_send_req_handler},\n    {HTPT_MEAS_INTV_UPD_REQ, (ke_msg_func_t)htpt_meas_intv_upd_req_handler},\n    {HTPT_MEAS_INTV_CHG_CFM, (ke_msg_func_t)htpt_meas_intv_chg_cfm_handler},\n};\n\nvoid htpt_task_init(struct ke_task_desc *task_desc) {\n  BLE_PRF_HP_FUNC_ENTER();\n\n  // Get the address of the environment\n  struct htpt_env_tag *htpt_env = PRF_ENV_GET(HTPT, htpt);\n\n  task_desc->msg_handler_tab = htpt_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(htpt_msg_handler_tab);\n  task_desc->state = htpt_env->state;\n  task_desc->idx_max = HTPT_IDX_MAX;\n\n  BLE_PRF_HP_FUNC_LEAVE();\n}\n\n#endif // BLE_HT_THERMOM\n\n/// @} HTPTTASK\n"
  },
  {
    "path": "services/ble_profiles/lan/lan_common.h",
    "content": "#ifndef _LANP_COMMON_H_\n#define _LANP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup LANP Location and Navigation Profile\n * @ingroup PROFILE\n * @brief Location and Navigation Profile\n *\n * The Location and Navigation Profile is used to enable a collector device in order to obtain\n * data from a Location and Navigation Sensor (LAN Sensor) that exposes the Location and Navigation Service.\n *\n * This file contains all definitions that are common for the server and the client parts\n * of the profile.\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"prf_types.h\"\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Inappropriate Connection Parameters Error Code\n#define LAN_ERROR_INAPP_CONNECT_PARAMS  (0x80)\n/// Procedure Already in Progress Error Code\n#define LAN_ERROR_PROC_IN_PROGRESS      (0x80)\n\n\n#define LANP_LAN_LSPEED_MAX_PAIR_SIZE           (8)\n\n/// LAN Location and Speed Value Max Length\n#define LANP_LAN_LOC_SPEED_MAX_LEN              (28)\n/// LAN Location and Speed Value Min Length\n#define LANP_LAN_LOC_SPEED_MIN_LEN              (2)\n\n/// LAN Position Quality Value Max Length\n#define LANP_LAN_POSQ_MAX_LEN                   (16)\n/// LAN Position Quality Value Min Length\n#define LANP_LAN_POSQ_MIN_LEN                   (2)\n\n/// LAN Control Point Value Request Max Length\n#define LANP_LAN_LN_CNTL_PT_REQ_MAX_LEN         (5)\n/// LAN Control Point Value Request Min Length\n#define LANP_LAN_LN_CNTL_PT_REQ_MIN_LEN         (1)\n\n/// LAN Control Point data Max Length (from 2 to max route name)\n#define LANP_LAN_LN_CNTL_DATA_MAX_LEN           (128)\n/// LAN Control Point Value Response Max Length\n#define LANP_LAN_LN_CNTL_PT_RSP_MAX_LEN         (3 + LANP_LAN_LN_CNTL_DATA_MAX_LEN)\n/// LAN Control Point Value Response Min Length\n#define LANP_LAN_LN_CNTL_PT_RSP_MIN_LEN         (3)\n\n/// LAN Navigation Value Max Length\n#define LANP_LAN_NAVIGATION_MAX_LEN             (21)\n/// LAN Navigation Value Min Length\n#define LANP_LAN_NAVIGATION_MIN_LEN             (6)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// LANP Service Characteristics\nenum lanp_lans_char\n{\n    /// LN Feature\n    LANP_LANS_LN_FEAT_CHAR,\n    /// Location and speed\n    LANP_LANS_LOC_SPEED_CHAR,\n    /// Position quality\n    LANP_LANS_POS_Q_CHAR,\n    /// LN Control Point\n    LANP_LANS_LN_CTNL_PT_CHAR,\n    /// Navigation\n    LANP_LANS_NAVIG_CHAR,\n\n    LANP_LANS_CHAR_MAX\n};\n\n/// LANP Feature Flags\nenum lanp_feat_flags\n{\n    /// Instantaneous Speed Supported\n    LANP_FEAT_INSTANTANEOUS_SPEED_SUPP              = 0x00000001,\n    /// Total Distance Supported\n    LANP_FEAT_TOTAL_DISTANCE_SUPP                   = 0x00000002,\n    /// Location Supported\n    LANP_FEAT_LOCATION_SUPP                         = 0x00000004,\n    /// Elevation Supported\n    LANP_FEAT_ELEVATION_SUPP                        = 0x00000008,\n    /// Heading Supported\n    LANP_FEAT_HEADING_SUPP                          = 0x00000010,\n    /// Rolling Time Supported\n    LANP_FEAT_ROLLING_TIME_SUPP                     = 0x00000020,\n    /// UTC Time Supported\n    LANP_FEAT_UTC_TIME_SUPP                         = 0x00000040,\n    /// Remaining Distance Supported\n    LANP_FEAT_REMAINING_DISTANCE_SUPP               = 0x00000080,\n    /// Remaining Vertical Distance Supported\n    LANP_FEAT_REMAINING_VERTICAL_DISTANCE_SUPP      = 0x00000100,\n    /// Estimated Time of Arrival Supported\n    LANP_FEAT_ESTIMATED_TIME_OF_ARRIVAL_SUPP        = 0x00000200,\n    /// Number of Beacons in Solution Supported\n    LANP_FEAT_NUMBER_OF_BEACONS_IN_SOLUTION_SUPP    = 0x00000400,\n    /// Number of Beacons in View Supported\n    LANP_FEAT_NUMBER_OF_BEACONS_IN_VIEW_SUPP        = 0x00000800,\n    /// Time to First Fix Supported\n    LANP_FEAT_TIME_TO_FIRST_FIX_SUPP                = 0x00001000,\n    /// Estimated Horizontal Position Error Supported\n    LANP_FEAT_ESTIMATED_HOR_POSITION_ERROR_SUPP     = 0x00002000,\n    /// Estimated Vertical Position Error Supported\n    LANP_FEAT_ESTIMATED_VER_POSITION_ERROR_SUPP     = 0x00004000,\n    /// Horizontal Dilution of Precision Supported\n    LANP_FEAT_HOR_DILUTION_OF_PRECISION_SUPP        = 0x00008000,\n    /// Vertical Dilution of Precision Supported\n    LANP_FEAT_VER_DILUTION_OF_PRECISION_SUPP        = 0x00010000,\n    /// Location and Speed Characteristic Content Masking Supported\n    LANP_FEAT_LSPEED_CHAR_CT_MASKING_SUPP           = 0x00020000,\n    /// Fix Rate Setting Supported\n    LANP_FEAT_FIX_RATE_SETTING_SUPP                 = 0x00040000,\n    /// Elevation Setting Supported\n    LANP_FEAT_ELEVATION_SETTING_SUPP                = 0x00080000,\n    /// Position Status Supported\n    LANP_FEAT_POSITION_STATUS_SUPP                  = 0x00100000,\n\n    /// All Supported\n    LANP_FEAT_ALL_SUPP                              = 0x001FFFFF\n};\n\n/// LANP Location and speed Flags\nenum lanp_lspeed_flags\n{\n    /// Instantaneous Speed Present\n    LANP_LSPEED_INST_SPEED_PRESENT          = 0x0001,\n    /// Total Distance Present\n    LANP_LSPEED_TOTAL_DISTANCE_PRESENT      = 0x0002,\n    /// Location Present\n    LANP_LSPEED_LOCATION_PRESENT            = 0x0004,\n    /// Elevation Present\n    LANP_LSPEED_ELEVATION_PRESENT           = 0x0008,\n    /// Heading Present\n    LANP_LSPEED_HEADING_PRESENT             = 0x0010,\n    /// Rolling Time Present\n    LANP_LSPEED_ROLLING_TIME_PRESENT        = 0x0020,\n    /// UTC Time Present\n    LANP_LSPEED_UTC_TIME_PRESENT            = 0x0040,\n    /// Position Status LSB\n    LANP_LSPEED_POSITION_STATUS_LSB         = 0x0080,\n    /// Position Status MSB\n    LANP_LSPEED_POSITION_STATUS_MSB         = 0x0100,\n    /// Speed and Distance format\n    LANP_LSPEED_SPEED_AND_DISTANCE_FORMAT   = 0x0200,\n    /// Elevation Source LSB\n    LANP_LSPEED_ELEVATION_SOURCE_LSB        = 0x0400,\n    /// Elevation Source MSB\n    LANP_LSPEED_ELEVATION_SOURCE_MSB        = 0x0800,\n    /// Heading Source\n    LANP_LSPEED_HEADING_SOURCE              = 0x1000,\n\n    /// All Present\n    LANP_LSPEED_ALL_PRESENT                 = 0x1FFF\n};\n\n/// LANP Position quality Flags\nenum lanp_posq_flags\n{\n    /// Number of Beacons in Solution Present\n    LANP_POSQ_NUMBER_OF_BEACONS_IN_SOLUTION_PRESENT   = 0x0001,\n    /// Number of Beacons in View Present\n    LANP_POSQ_NUMBER_OF_BEACONS_IN_VIEW_PRESENT       = 0x0002,\n    /// Time to First Fix Present\n    LANP_POSQ_TIME_TO_FIRST_FIX_PRESENT               = 0x0004,\n    /// EHPE Present\n    LANP_POSQ_EHPE_PRESENT                            = 0x0008,\n    /// EVPE Present\n    LANP_POSQ_EVPE_PRESENT                            = 0x0010,\n    /// HDOP Present\n    LANP_POSQ_HDOP_PRESENT                            = 0x0020,\n    /// VDOP Present\n    LANP_POSQ_VDOP_PRESENT                            = 0x0040,\n    /// Position Status LSB\n    LANP_POSQ_POSITION_STATUS_LSB                     = 0x0080,\n    /// Position Status MSB\n    LANP_POSQ_POSITION_STATUS_MSB                     = 0x0100,\n\n    /// All Present\n    LANP_POSQ_ALL_PRESENT                             = 0x01FF\n};\n\n/// LANP Control Point Keys\nenum lanp_ln_ctnl_pt_code\n{\n    /// Reserved value\n    LANP_LN_CTNL_PT_RESERVED               = 0,\n\n    /// Set Cumulative Value\n    LANP_LN_CTNL_PT_SET_CUMUL_VALUE,\n    /// Mask Location and Speed Characteristic Content\n    LANP_LN_CTNL_PT_MASK_LSPEED_CHAR_CT,\n    /// Navigation Control\n    LANP_LN_CTNL_PT_NAVIGATION_CONTROL,\n    /// Request Number of Routes\n    LANP_LN_CTNL_PT_REQ_NUMBER_OF_ROUTES,\n    /// Request Name of Route\n    LANP_LN_CTNL_PT_REQ_NAME_OF_ROUTE,\n    /// Select Route\n    LANP_LN_CTNL_PT_SELECT_ROUTE,\n    /// Set Fix Rate\n    LANP_LN_CTNL_PT_SET_FIX_RATE,\n    /// Set Elevation\n    LANP_LN_CTNL_PT_SET_ELEVATION,\n    /// Response Code\n    LANP_LN_CTNL_PT_RESPONSE_CODE          = 32\n};\n\n/// LANP Control Point Response Value\nenum lanp_ctnl_pt_resp_val\n{\n    /// Reserved value\n    LANP_LN_CTNL_PT_RESP_RESERVED      = 0,\n\n    /// Success\n    LANP_LN_CTNL_PT_RESP_SUCCESS,\n    /// Operation Code Not Supported\n    LANP_LN_CTNL_PT_RESP_NOT_SUPP,\n    /// Invalid Parameter\n    LANP_LN_CTNL_PT_RESP_INV_PARAM,\n    /// Operation Failed\n    LANP_LN_CTNL_PT_RESP_FAILED,\n};\n\n/// LANP Navigation Control parameter\nenum lanp_navi_control\n{\n    /// Stop Navigation\n    LANP_LN_CTNL_STOP_NAVI      = 0x00,\n    /// Start Navigation\n    LANP_LN_CTNL_START_NAVI     = 0x01,\n    /// Pause Navigation\n    LANP_LN_CTNL_PAUSE_NAVI     = 0x02,\n    /// Resume Navigation\n    LANP_LN_CTNL_RESUME_NAVI    = 0x03,\n    /// Skip waypoint on route\n    LANP_LN_CTNL_SKIP_WPT       = 0x04,\n    /// Start Navigation from the nearest waypoint\n    LANP_LN_CTNL_START_NST_WPT  = 0x05,\n};\n\n/// LANP Navigation flags\nenum lanp_navi_flags\n{\n    /// Remaining Distance Present\n    LANP_NAVI_REMAINING_DIS_PRESENT             = 0x0001,\n    /// Remaining Vertical Distance Present\n    LANP_NAVI_REMAINING_VER_DIS_PRESENT         = 0x0002,\n    /// Estimated Time of Arrival Present\n    LANP_NAVI_ESTIMATED_TIME_OF_ARRIVAL_PRESENT = 0x0004,\n    /// Position Status lsb\n    LANP_NAVI_POSITION_STATUS_LSB               = 0x0008,\n    /// Position Status msb\n    LANP_NAVI_POSITION_STATUS_MSB               = 0x0010,\n    /// Heading Source\n    LANP_NAVI_HEADING_SOURCE                    = 0x0020,\n    /// Navigation Indicator Type\n    LANP_NAVI_NAVIGATION_INDICATOR_TYPE         = 0x0040,\n    /// Waypoint Reached\n    LANP_NAVI_WAYPOINT_REACHED                  = 0x0080,\n    /// Destination Reached\n    LANP_NAVI_DESTINATION_REACHED               = 0x0100,\n    /// ALl present\n    LANP_NAVI_ALL_PRESENT                       = 0x01FF\n\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Location and Speed\nstruct lanp_loc_speed\n{\n    /// Flags\n    uint16_t flags;\n    /// Instantaneous Speed\n    uint16_t inst_speed;\n    /// Total distance\n    uint32_t total_dist;\n    /// Location - Latitude\n    int32_t latitude;\n    /// Location - Longitude\n    int32_t longitude;\n    /// Elevation\n    int32_t elevation;\n    /// Heading\n    uint16_t heading;\n    /// Rolling time\n    uint8_t rolling_time;\n    /// UTC Time\n    struct prf_date_time date_time;\n};\n\n/// LAN Position quality\nstruct lanp_posq\n{\n    /// Flags\n    uint16_t flags;\n    /// Time to First Fix\n    uint16_t time_first_fix;\n    /// EHPE\n    uint32_t ehpe;\n    /// EVPE\n    uint32_t evpe;\n    /// Number of Beacons in Solution\n    uint8_t n_beacons_solution;\n    /// Number of Beacons in view\n    uint8_t n_beacons_view;\n    /// HDOP\n    uint8_t hdop;\n    /// VDOP\n    uint8_t vdop;\n};\n\n/// LN Control Point Request\nstruct lan_ln_ctnl_pt_req\n{\n    /// Operation code\n    uint8_t op_code;\n\n    /// Value\n    union lanp_ln_ctnl_pt_req_val\n    {\n        /// Cumulative Value (24 bits)\n        uint32_t cumul_val;\n        /// Mask Content\n        uint16_t mask_content;\n        /// Navigation Control\n        uint8_t control_value;\n        /// Route number\n        uint16_t route_number;\n        /// Fix rate\n        uint8_t fix_rate;\n        /// Elevation\n        int32_t elevation;\n    } value;\n};\n\n/// LAN Control Point Response\nstruct lanp_ln_ctnl_pt_rsp\n{\n    /// Operation code\n    uint8_t req_op_code;\n    /// Response Value\n    uint8_t resp_value;\n\n    /// Value\n    union lanp_ctnl_pt_rsp_val\n    {\n        /// Number of routes\n        uint16_t number_of_routes;\n\n        struct lanp_route_name\n        {\n            uint8_t length;\n            /// Name of Route UTF-8\n            uint8_t name[__ARRAY_EMPTY];\n        } route;\n    } value;\n};\n\n/// LAN Navigation\nstruct lanp_navigation\n{\n    /// Flags\n    uint16_t flags;\n    /// Bearing\n    uint16_t bearing;\n    /// Heading\n    uint16_t heading;\n    /// Remaining Distance (24 bits)\n    uint32_t remaining_distance;\n    /// Remaining Vertical Distance (24 bits)\n    uint32_t remaining_ver_distance;\n    /// Estimated Time of Arrival\n    struct prf_date_time estimated_arrival_time;\n};\n\n\n/// @} lanp_common\n\n#endif //(_LANP_COMMON_H_)\n"
  },
  {
    "path": "services/ble_profiles/lan/lanc/api/lanc_task.h",
    "content": "#ifndef _LANC_TASK_H_\n#define _LANC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup LANCTASK Location and Navigation Profile Collector Task\n * @ingroup LANC\n * @brief Location and Navigation Profile Collector Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"lan_common.h\"\n#include \"rwip_task.h\" // Task definitions\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Location and Navigation Service Characteristic Descriptors\nenum lanc_lns_descs\n{\n    /// Location and Speed Char. - Client Characteristic Configuration\n    LANC_DESC_LOC_SPEED_CL_CFG,\n    /// LN Control Point Char. - Client Characteristic Configuration\n    LANC_DESC_LN_CTNL_PT_CL_CFG,\n    /// Navigation Char. - Client Characteristic Configuration\n    LANC_DESC_NAVIGATION_CL_CFG,\n\n    LANC_DESC_MAX,\n\n    LANC_DESC_MASK = 0x10,\n};\n\n/// Message IDs\nenum lanc_msg_ids\n{\n    /// Enable the Location and Navigation Profile Collector task - at connection\n    LANC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_LANC),\n    /// Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    LANC_ENABLE_RSP,\n\n    /// Read the value of an attribute in the peer device database\n    LANC_READ_CMD,\n    /// Configure sending of notification or indication\n    LANC_CFG_NTFIND_CMD,\n\n    /// Configure the SC Control Point value\n    LANC_LN_CTNL_PT_CFG_REQ,\n    /// Indicate that an control point response has been triggered by peer device\n    LANC_LN_CTNL_PT_RSP,\n\n    /// Indicate that an attribute value has been received either upon notification or read response\n    LANC_VALUE_IND,\n\n    /// Complete Event Information\n    LANC_CMP_EVT,\n\n    /// Procedure Timeout Timer\n    LANC_TIMEOUT_TIMER_IND,\n};\n\n/// Operation Codes\nenum lanc_op_code\n{\n    /// Reserved operation code\n    LANC_RESERVED_OP_CODE  = 0x00,\n\n    /// Discovery Procedure\n    LANC_ENABLE_OP_CODE,\n    /// Read attribute value Procedure\n    LANC_READ_OP_CODE,\n\n    /// Wait for the Write Response after having written a Client Char. Cfg. Descriptor.\n    LANC_CFG_NTF_IND_OP_CODE,\n\n    /// Wait for the Write Response after having written the Control Point Char.\n    LANC_LN_CTNL_PT_CFG_WR_OP_CODE,\n    /// Wait for the Indication Response after having written the Control Point Char.\n    LANC_LN_CTNL_PT_CFG_IND_OP_CODE,\n};\n\n/*\n * API MESSAGE STRUCTURES\n ****************************************************************************************\n */\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Location and Navigation Service\n */\nstruct lanc_lns_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - LN Feature\n    ///  - Location and Speed\n    ///  - Position quality\n    ///  - LN Control Point\n    ///  - Navigation\n    struct prf_char_inf chars[LANP_LANS_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - Location and Speed Client Cfg\n    ///  - Control Point Client Cfg\n    ///  - Navigation Client Cfg\n    struct prf_char_desc_inf descs[LANC_DESC_MAX];\n};\n\n/// Parameters of the @ref LANC_ENABLE_REQ message\nstruct lanc_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n    /// Existing handle values LNS\n    struct lanc_lns_content lans;\n};\n\n/// Parameters of the @ref LANC_ENABLE_RSP message\nstruct lanc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values LNS\n    struct lanc_lns_content lns;\n};\n\n/// Parameters of the @ref LANC_READ_CMD message\nstruct lanc_read_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Read code\n    uint8_t read_code;\n};\n\n/// Parameters of the @ref LANC_VALUE_IND message\nstruct lanc_value_ind\n{\n    /// Attribute Code\n    uint8_t att_code;\n    /// Value\n    union lanc_value_tag\n    {\n        /// LN Feature\n        uint32_t LN_feat;\n        /// Location and Speed\n        struct lanp_loc_speed loc_speed;\n        /// LAN Position quality\n        struct lanp_posq pos_q;\n        /// Navigation\n        struct lanp_navigation navigation;\n        /// Client Characteristic Configuration Descriptor Value\n        uint16_t ntf_cfg;\n    } value;\n};\n\n/// Parameters of the @ref LANC_CFG_NTFIND_CMD message\nstruct lanc_cfg_ntfind_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Descriptor code\n    uint8_t desc_code;\n    /// Ntf/Ind Configuration\n    uint16_t ntfind_cfg;\n};\n\n/// Parameters of the @ref LANC_LN_CTNL_PT_CFG_REQ message\nstruct lanc_ln_ctnl_pt_cfg_req\n{\n    /// Operation Code\n    uint8_t operation;\n    /// SC Control Point Request\n    struct lan_ln_ctnl_pt_req ln_ctnl_pt;\n};\n\n/// Parameters of the @ref LANC_LN_CTNL_PT_RSP message\nstruct lanc_ln_ctnl_pt_rsp\n{\n    /// SC Control Point Response\n    struct lanp_ln_ctnl_pt_rsp rsp;\n};\n\n/// Parameters of the @ref LANC_CMP_EVT message\nstruct lanc_cmp_evt\n{\n    /// Operation code\n    uint8_t operation;\n    /// Status\n    uint8_t status;\n};\n\n\n\n/// @} LANCTASK\n\n#endif //(_LANC_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/lan/lanc/src/lanc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup LANC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_LN_COLLECTOR)\n#include \"lan_common.h\"\n\n#include \"lanc.h\"\n#include \"lanc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n#include \"ke_timer.h\"\n\n/*\n * GLOBAL VARIABLES DECLARATION\n ****************************************************************************************\n */\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the LANC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\n\nstatic uint8_t lanc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct lanc_env_tag *lanc_env = (struct lanc_env_tag *)ke_malloc(\n      sizeof(struct lanc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate LANC required environment variable\n  env->env = (prf_env_t *)lanc_env;\n\n  lanc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  lanc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_LANC;\n  lanc_task_init(&(env->desc));\n\n  for (idx = 0; idx < LANC_IDX_MAX; idx++) {\n    lanc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), LANC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void lanc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct lanc_env_tag *lanc_env = (struct lanc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (lanc_env->env[conidx] != NULL) {\n    if (lanc_env->env[conidx]->operation != NULL) {\n      ke_free(ke_param2msg(lanc_env->env[conidx]->operation));\n    }\n    ke_timer_clear(LANC_TIMEOUT_TIMER_IND,\n                   prf_src_task_get(&lanc_env->prf_env, conidx));\n\n    ke_free(lanc_env->env[conidx]);\n    lanc_env->env[conidx] = NULL;\n  }\n\n  /* Put LAN Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), LANC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the LANC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void lanc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct lanc_env_tag *lanc_env = (struct lanc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < LANC_IDX_MAX; idx++) {\n    lanc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(lanc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void lanc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put LAN Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), LANC_IDLE);\n}\n\n/// LANC Task interface required by profile manager\nconst struct prf_task_cbs lanc_itf = {\n    lanc_init,\n    lanc_destroy,\n    lanc_create,\n    lanc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *lanc_prf_itf_get(void) { return &lanc_itf; }\n\nvoid lanc_enable_rsp_send(struct lanc_env_tag *lanc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Send to APP the details of the discovered attributes on LANS\n  struct lanc_enable_rsp *rsp = KE_MSG_ALLOC(\n      LANC_ENABLE_RSP, prf_dst_task_get(&(lanc_env->prf_env), conidx),\n      prf_src_task_get(&(lanc_env->prf_env), conidx), lanc_enable_rsp);\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->lns = lanc_env->env[conidx]->lans;\n    // Register LANC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(lanc_env->prf_env), conidx,\n                             &(lanc_env->env[conidx]->lans.svc));\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(lanc_env->prf_env), conidx), LANC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nvoid lanc_send_no_conn_cmp_evt(uint8_t src_id, uint8_t dest_id,\n                               uint8_t operation) {\n  // Send the message\n  struct lanc_cmp_evt *evt =\n      KE_MSG_ALLOC(LANC_CMP_EVT, dest_id, src_id, lanc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = PRF_ERR_REQ_DISALLOWED;\n\n  ke_msg_send(evt);\n}\n\nvoid lanc_send_cmp_evt(struct lanc_env_tag *lanc_env, uint8_t conidx,\n                       uint8_t operation, uint8_t status) {\n  // Free the stored operation if needed\n  if (lanc_env->env[conidx]->operation != NULL) {\n    ke_msg_free(ke_param2msg(lanc_env->env[conidx]->operation));\n    lanc_env->env[conidx]->operation = NULL;\n  }\n\n  // Go back to the CONNECTED state if the state is busy\n  if (ke_state_get(prf_src_task_get(&(lanc_env->prf_env), conidx)) ==\n      LANC_BUSY) {\n    ke_state_set(prf_src_task_get(&(lanc_env->prf_env), conidx), LANC_IDLE);\n  }\n\n  // Send the message\n  struct lanc_cmp_evt *evt = KE_MSG_ALLOC(\n      LANC_CMP_EVT, prf_dst_task_get(&(lanc_env->prf_env), conidx),\n      prf_src_task_get(&(lanc_env->prf_env), conidx), lanc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\nuint16_t lanc_get_read_handle_req(struct lanc_env_tag *lanc_env, uint8_t conidx,\n                                  struct lanc_read_cmd *param) {\n  // Attribute Handle\n  uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n\n  switch (param->read_code) {\n  // Read LN Feature\n  case (LANC_RD_LN_FEAT): {\n    handle = lanc_env->env[conidx]->lans.chars[LANP_LANS_LN_FEAT_CHAR].val_hdl;\n  } break;\n\n  // Read Position Quality\n  case (LANC_RD_POS_Q): {\n    handle = lanc_env->env[conidx]->lans.chars[LANP_LANS_POS_Q_CHAR].val_hdl;\n  } break;\n\n  // Read Location and Speed Characteristic Client Char. Cfg. Descriptor Value\n  case (LANC_RD_WR_LOC_SPEED_CL_CFG): {\n    handle =\n        lanc_env->env[conidx]->lans.descs[LANC_DESC_LOC_SPEED_CL_CFG].desc_hdl;\n  } break;\n\n  // Read Unread Alert Characteristic Client Char. Cfg. Descriptor Value\n  case (LANC_RD_WR_LN_CTNL_PT_CFG): {\n    handle =\n        lanc_env->env[conidx]->lans.descs[LANC_DESC_LN_CTNL_PT_CL_CFG].desc_hdl;\n  } break;\n\n  // Read Navigation Characteristic Server Char. Cfg. Descriptor Value\n  case (LANC_RD_WR_NAVIGATION_CFG): {\n    handle =\n        lanc_env->env[conidx]->lans.descs[LANC_DESC_NAVIGATION_CL_CFG].desc_hdl;\n  } break;\n\n  default: {\n    handle = ATT_INVALID_SEARCH_HANDLE;\n  } break;\n  }\n\n  return handle;\n}\n\nuint8_t lanc_get_write_desc_handle_req(uint8_t conidx,\n                                       struct lanc_cfg_ntfind_cmd *param,\n                                       struct lanc_env_tag *lanc_env,\n                                       uint16_t *handle) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  switch (param->desc_code) {\n  // Write Location and speed Characteristic Client Char. Cfg. Descriptor Value\n  case (LANC_RD_WR_LOC_SPEED_CL_CFG): {\n    if (param->ntfind_cfg <= PRF_CLI_START_NTF) {\n      *handle = lanc_env->env[conidx]\n                    ->lans.descs[LANC_DESC_LOC_SPEED_CL_CFG]\n                    .desc_hdl;\n\n      // The descriptor is mandatory\n      ASSERT_ERR(*handle != ATT_INVALID_SEARCH_HANDLE);\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } break;\n\n  // Write LN Control Point Characteristic Client Char. Cfg. Descriptor Value\n  case (LANC_RD_WR_LN_CTNL_PT_CFG): {\n    if ((param->ntfind_cfg == PRF_CLI_STOP_NTFIND) ||\n        (param->ntfind_cfg == PRF_CLI_START_IND)) {\n      *handle = lanc_env->env[conidx]\n                    ->lans.descs[LANC_DESC_LN_CTNL_PT_CL_CFG]\n                    .desc_hdl;\n\n      if (*handle == ATT_INVALID_SEARCH_HANDLE) {\n        // The descriptor has not been found.\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } break;\n\n  // Write Navigation Characteristic Client Char. Cfg. Descriptor Value\n  case (LANC_RD_WR_NAVIGATION_CFG): {\n    if (param->ntfind_cfg <= PRF_CLI_START_NTF) {\n      *handle = lanc_env->env[conidx]\n                    ->lans.descs[LANC_DESC_NAVIGATION_CL_CFG]\n                    .desc_hdl;\n\n      if (*handle == ATT_INVALID_SEARCH_HANDLE) {\n        // The descriptor has not been found.\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } break;\n\n  default: {\n    status = PRF_ERR_INVALID_PARAM;\n  } break;\n  }\n\n  return (status);\n}\n\nuint8_t lanc_unpack_loc_speed_ind(uint8_t conidx,\n                                  struct gattc_event_ind const *param,\n                                  struct lanc_env_tag *lanc_env) {\n  // Offset\n  uint8_t offset = LANP_LAN_LOC_SPEED_MIN_LEN;\n\n  // LN Measurement value has been received\n  struct lanc_value_ind *ind = KE_MSG_ALLOC(\n      LANC_VALUE_IND, prf_dst_task_get(&(lanc_env->prf_env), conidx),\n      prf_src_task_get(&(lanc_env->prf_env), conidx), lanc_value_ind);\n\n  // Attribute code\n  ind->att_code = LANC_NTF_LOC_SPEED;\n\n  if ((param->length >= LANP_LAN_LOC_SPEED_MIN_LEN) &&\n      (param->length <= LANP_LAN_LOC_SPEED_MAX_LEN)) {\n    // Flags\n    ind->value.loc_speed.flags = co_read16p(¶m->value[0]);\n\n    if (ind->value.loc_speed.flags & LANP_LSPEED_INST_SPEED_PRESENT) {\n      // Unpack instantaneous speed\n      ind->value.loc_speed.inst_speed = co_read16p(¶m->value[offset]);\n      offset += 2;\n    }\n\n    if (ind->value.loc_speed.flags & LANP_LSPEED_TOTAL_DISTANCE_PRESENT) {\n      // Unpack Total distance (24 bits)\n      ind->value.loc_speed.total_dist = co_read24p(¶m->value[offset]);\n      offset += 3;\n    }\n\n    if (ind->value.loc_speed.flags & LANP_LSPEED_LOCATION_PRESENT) {\n      // Unpack Location\n      ind->value.loc_speed.latitude = co_read32p(¶m->value[offset]);\n      offset += 4;\n      ind->value.loc_speed.longitude = co_read32p(¶m->value[offset]);\n      offset += 4;\n    }\n\n    if (ind->value.loc_speed.flags & LANP_LSPEED_ELEVATION_PRESENT) {\n      // Unpack Elevation (24 bits)\n      ind->value.loc_speed.elevation = co_read24p(¶m->value[offset]);\n      offset += 3;\n    }\n\n    if (ind->value.loc_speed.flags & LANP_LSPEED_HEADING_PRESENT) {\n      // Unpack heading\n      ind->value.loc_speed.heading = co_read16p(¶m->value[offset]);\n      offset += 2;\n    }\n\n    if (ind->value.loc_speed.flags & LANP_LSPEED_ROLLING_TIME_PRESENT) {\n      // Unpack rolling time\n      ind->value.loc_speed.rolling_time = param->value[offset];\n      offset++;\n    }\n\n    if (ind->value.loc_speed.flags & LANP_LSPEED_UTC_TIME_PRESENT) {\n      // Unpack UTC time\n      offset += prf_unpack_date_time((uint8_t *)&(param->value[offset]),\n                                     &(ind->value.loc_speed.date_time));\n    }\n  }\n\n  // Send the message\n  ke_msg_send(ind);\n\n  return offset;\n}\n\nuint8_t lanc_unpack_navigation_ind(uint8_t conidx,\n                                   struct gattc_event_ind const *param,\n                                   struct lanc_env_tag *lanc_env) {\n  // Offset\n  uint8_t offset = LANP_LAN_NAVIGATION_MIN_LEN;\n\n  // LN Measurement value has been received\n  struct lanc_value_ind *ind = KE_MSG_ALLOC(\n      LANC_VALUE_IND, prf_dst_task_get(&(lanc_env->prf_env), conidx),\n      prf_src_task_get(&(lanc_env->prf_env), conidx), lanc_value_ind);\n\n  // Attribute code\n  ind->att_code = LANC_NTF_NAVIGATION;\n\n  if ((param->length >= LANP_LAN_NAVIGATION_MIN_LEN) &&\n      (param->length <= LANP_LAN_NAVIGATION_MAX_LEN)) {\n    // Flags\n    ind->value.navigation.flags = co_read16p(¶m->value[0]);\n    // Bearing\n    ind->value.navigation.bearing = co_read16p(¶m->value[2]);\n    // Heading\n    ind->value.navigation.heading = co_read16p(¶m->value[4]);\n\n    if (ind->value.navigation.flags & LANP_NAVI_REMAINING_DIS_PRESENT) {\n      // Unpack remaining distance (24 bits)\n      ind->value.navigation.remaining_distance =\n          co_read24p(¶m->value[offset]);\n      offset += 3;\n    }\n\n    if (ind->value.navigation.flags & LANP_NAVI_REMAINING_VER_DIS_PRESENT) {\n      // Unpack remaining vertical distance (24 bits)\n      ind->value.navigation.remaining_ver_distance =\n          co_read24p(¶m->value[offset]);\n      offset += 3;\n    }\n\n    if (ind->value.navigation.flags &\n        LANP_NAVI_ESTIMATED_TIME_OF_ARRIVAL_PRESENT) {\n      // Unpack time\n      offset +=\n          prf_unpack_date_time((uint8_t *)&(param->value[offset]),\n                               &(ind->value.navigation.estimated_arrival_time));\n    }\n  }\n\n  // Send the message\n  ke_msg_send(ind);\n\n  return offset;\n}\n\nuint8_t lanc_unpack_pos_q_ind(struct gattc_read_ind const *param,\n                              struct lanc_value_ind *ind) {\n  /*----------------------------------------------------\n   * Unpack Position Quality ---------------------------\n   *----------------------------------------------------*/\n  // Offset\n  uint8_t offset = LANP_LAN_POSQ_MIN_LEN;\n\n  // Flags\n  ind->value.pos_q.flags = co_read16p(¶m->value[0]);\n\n  if (ind->value.pos_q.flags &\n      LANP_POSQ_NUMBER_OF_BEACONS_IN_SOLUTION_PRESENT) {\n    // Unpack beacons in solution\n    ind->value.pos_q.n_beacons_solution = param->value[offset];\n    offset++;\n  }\n\n  if (ind->value.pos_q.flags & LANP_POSQ_NUMBER_OF_BEACONS_IN_VIEW_PRESENT) {\n    // Unpack beacons in view\n    ind->value.pos_q.n_beacons_view = param->value[offset];\n    offset++;\n  }\n\n  if (ind->value.pos_q.flags & LANP_POSQ_TIME_TO_FIRST_FIX_PRESENT) {\n    // Unpack time first fix\n    ind->value.pos_q.time_first_fix = co_read16p(¶m->value[offset]);\n    offset += 2;\n  }\n\n  if (ind->value.pos_q.flags & LANP_POSQ_EHPE_PRESENT) {\n    // Unpack ehpe\n    ind->value.pos_q.ehpe = co_read32p(¶m->value[offset]);\n    offset += 4;\n  }\n\n  if (ind->value.pos_q.flags & LANP_POSQ_EVPE_PRESENT) {\n    // Unpack evpe\n    ind->value.pos_q.evpe = co_read32p(¶m->value[offset]);\n    offset += 4;\n  }\n\n  if (ind->value.pos_q.flags & LANP_POSQ_HDOP_PRESENT) {\n    // Unpack hdop\n    ind->value.pos_q.hdop = param->value[offset];\n    offset++;\n  }\n\n  if (ind->value.pos_q.flags & LANP_POSQ_VDOP_PRESENT) {\n    // Unpack vdop\n    ind->value.pos_q.vdop = param->value[offset];\n    offset++;\n  }\n\n  return offset;\n}\n\nuint8_t lanc_pack_ln_ctnl_pt_req(struct lanc_ln_ctnl_pt_cfg_req *param,\n                                 uint8_t *req, uint8_t *status) {\n  // Request Length\n  uint8_t req_len = LANP_LAN_LN_CNTL_PT_REQ_MIN_LEN;\n\n  // Set the operation code\n  req[0] = param->ln_ctnl_pt.op_code;\n\n  // Fulfill the message according to the operation code\n  switch (param->ln_ctnl_pt.op_code) {\n  case (LANP_LN_CTNL_PT_SET_CUMUL_VALUE): {\n    // Set the cumulative value (24 bits)\n    co_write24p(&req[req_len], param->ln_ctnl_pt.value.cumul_val);\n    // Update length\n    req_len += 3;\n  } break;\n\n  case (LANP_LN_CTNL_PT_MASK_LSPEED_CHAR_CT): {\n    // Set mask content\n    co_write16p(&req[req_len], param->ln_ctnl_pt.value.mask_content);\n    // Update length\n    req_len += 2;\n  } break;\n\n  case (LANP_LN_CTNL_PT_NAVIGATION_CONTROL): {\n    // Set control value\n    req[req_len] = param->ln_ctnl_pt.value.control_value;\n    // Update length\n    req_len++;\n  } break;\n\n  case (LANP_LN_CTNL_PT_REQ_NAME_OF_ROUTE):\n  case (LANP_LN_CTNL_PT_SELECT_ROUTE): {\n    // Set route number\n    co_write16p(&req[req_len], param->ln_ctnl_pt.value.route_number);\n    // Update length\n    req_len += 2;\n  } break;\n\n  case (LANP_LN_CTNL_PT_SET_FIX_RATE): {\n    // Set the fix rate\n    req[req_len] = param->ln_ctnl_pt.value.fix_rate;\n    // Update length\n    req_len++;\n  } break;\n\n  case (LANP_LN_CTNL_PT_SET_ELEVATION): {\n    // Set elevation (24 bits)\n    co_write24p(&req[req_len], param->ln_ctnl_pt.value.elevation);\n    // Update length\n    req_len += 3;\n  } break;\n\n  case (LANP_LN_CTNL_PT_REQ_NUMBER_OF_ROUTES): {\n    // Nothing more to do\n  } break;\n\n  default: {\n    *status = PRF_ERR_INVALID_PARAM;\n  } break;\n  }\n\n  return req_len;\n}\n\nuint8_t lanc_unpack_ln_ctln_pt_ind(struct gattc_event_ind const *param,\n                                   ke_task_id_t src, ke_task_id_t dest) {\n  // Offset\n  uint8_t offset = LANP_LAN_LN_CNTL_PT_RSP_MIN_LEN;\n\n  // Control Point value has been received\n  struct lanc_ln_ctnl_pt_rsp *ind = KE_MSG_ALLOC_DYN(\n      LANC_LN_CTNL_PT_RSP, dest, src, lanc_ln_ctnl_pt_rsp, param->length);\n  // Requested operation code\n  ind->rsp.req_op_code = param->value[1];\n  // Response value\n  ind->rsp.resp_value = param->value[2];\n\n  if ((ind->rsp.resp_value == LANP_LN_CTNL_PT_RESP_SUCCESS) &&\n      (param->length >= 3)) {\n    switch (ind->rsp.req_op_code) {\n    case (LANP_LN_CTNL_PT_REQ_NUMBER_OF_ROUTES): {\n      ind->rsp.value.number_of_routes = co_read16p(¶m->value[offset]);\n      offset += 2;\n\n    } break;\n\n    case (LANP_LN_CTNL_PT_REQ_NAME_OF_ROUTE): {\n      // Get the length of the route\n      ind->rsp.value.route.length = (param->length - 3);\n      for (int i = 0; i < ind->rsp.value.route.length; i++) {\n        ind->rsp.value.route.name[i] = param->value[i + 3];\n        offset++;\n      }\n    } break;\n\n    case (LANP_LN_CTNL_PT_SET_CUMUL_VALUE):\n    case (LANP_LN_CTNL_PT_MASK_LSPEED_CHAR_CT):\n    case (LANP_LN_CTNL_PT_NAVIGATION_CONTROL):\n    case (LANP_LN_CTNL_PT_SELECT_ROUTE):\n    case (LANP_LN_CTNL_PT_SET_FIX_RATE):\n    case (LANP_LN_CTNL_PT_SET_ELEVATION): {\n      // No parameters\n    } break;\n\n    default: {\n\n    } break;\n    }\n  }\n\n  // Send the message\n  ke_msg_send(ind);\n\n  return offset;\n}\n#endif //(BLE_LN_COLLECTOR)\n\n/// @} LAN\n"
  },
  {
    "path": "services/ble_profiles/lan/lanc/src/lanc.h",
    "content": "#ifndef _LANC_H_\n#define _LANC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup LANC Location and Navigation Profile Collector\n * @ingroup LAN\n * @brief Location and Navigation Profile Collector\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_LN_COLLECTOR)\n\n#include \"lan_common.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"lanc_task.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of Location and Navigation Collector task instances\n#define LANC_IDX_MAX        (BLE_CONNECTION_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n/// Possible states of the LANC task\nenum lanc_states\n{\n    /// Idle state\n    LANC_FREE,\n    /// Connected state\n    LANC_IDLE,\n    /// SDP state\n    LANC_DISCOVERING,\n    /// Busy state\n    LANC_BUSY,\n\n    /// Number of defined states.\n    LANC_STATE_MAX\n};\n\n\n/// Internal codes for reading/writing a LNS characteristic with one single request\nenum lanc_code\n{\n    /// Read LN Feature\n    LANC_RD_LN_FEAT           = LANP_LANS_LN_FEAT_CHAR,\n    /// Notified Location and Speed\n    LANC_NTF_LOC_SPEED        = LANP_LANS_LOC_SPEED_CHAR,\n    /// Read Position quality\n    LANC_RD_POS_Q             = LANP_LANS_POS_Q_CHAR,\n    /// Indicated LN Control Point\n    LANC_IND_LN_CTNL_PT       = LANP_LANS_LN_CTNL_PT_CHAR,\n    /// Notified Navigation\n    LANC_NTF_NAVIGATION       = LANP_LANS_NAVIG_CHAR,\n\n    /// Read/Write Location and Speed Client Char. Configuration Descriptor\n    LANC_RD_WR_LOC_SPEED_CL_CFG = (LANC_DESC_LOC_SPEED_CL_CFG | LANC_DESC_MASK),\n\n    /// Read LN Control Point Client Char. Configuration Descriptor\n    LANC_RD_WR_LN_CTNL_PT_CFG   = (LANC_DESC_LN_CTNL_PT_CL_CFG | LANC_DESC_MASK),\n\n    /// Read/Write Vector Client Char. Configuration Descriptor\n    LANC_RD_WR_NAVIGATION_CFG   = (LANC_DESC_NAVIGATION_CL_CFG   | LANC_DESC_MASK),\n\n};\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\nstruct lanc_cnx_env\n{\n    ///Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// Location and Navigation Service Characteristics\n    struct lanc_lns_content lans;\n    /// Current Operation\n    void *operation;\n};\n\n/// Location and Navigation Profile Collector environment variable\nstruct lanc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct lanc_cnx_env* env[LANC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[LANC_IDX_MAX];\n};\n\n/// Command Message Basic Structure\nstruct lanc_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n\n    /// MORE DATA\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * GLOBAL FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve LAN client profile interface\n *\n * @return LAN client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* lanc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Location and Navigation ATT DB discovery results to LANC host.\n * @param[in] lanc_env environment variable\n * @param[in] conidx Connection index\n * @param[in] status Status\n * @return handle\n ****************************************************************************************\n */\nvoid lanc_enable_rsp_send(struct lanc_env_tag *lanc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send a LANC_CMP_EVT message when no connection exists (no environment)\n * @param[in] src_id Source task\n * @param[in] dest_id Destination task\n * @param[in] operation Operation\n ****************************************************************************************\n */\nvoid lanc_send_no_conn_cmp_evt(uint8_t src_id, uint8_t dest_id, uint8_t operation);\n\n/**\n ****************************************************************************************\n * @brief Send a LANC_CMP_EVT message to the task which enabled the profile\n * @param[in] lanc_env environment variable\n * @param[in] conidx Connection index\n * @param[in] operation Operation\n * @param[in] status Status\n * @return handle\n ****************************************************************************************\n */\nvoid lanc_send_cmp_evt(struct lanc_env_tag *lanc_env, uint8_t conidx, uint8_t operation, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Gets correct read handle according to the request\n * @param[in] lanc_env environment variable\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @return handle\n ****************************************************************************************\n */\nuint16_t lanc_get_read_handle_req (struct lanc_env_tag *lanc_env, uint8_t conidx, struct lanc_read_cmd *param);\n\n/**\n ****************************************************************************************\n * @brief Gets correct write handle according to the request\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] lanc_env environment variable\n * @param[out] handle handle\n * @return handle\n ****************************************************************************************\n */\nuint8_t lanc_get_write_desc_handle_req (uint8_t conidx, struct lanc_cfg_ntfind_cmd *param, struct lanc_env_tag *lanc_env, uint16_t *handle);\n\n/**\n ****************************************************************************************\n * @brief Unpacks location and speed data and sends the indication\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] lanc_env environment variable\n * @return length\n ****************************************************************************************\n */\nuint8_t lanc_unpack_loc_speed_ind (uint8_t conidx, struct gattc_event_ind const *param, struct lanc_env_tag *lanc_env);\n\n/**\n ****************************************************************************************\n * @brief Unpacks Navigation and sends the indication\n * @param[in] conidx Connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] lanc_env environment variable\n * @return length\n ****************************************************************************************\n */\nuint8_t lanc_unpack_navigation_ind (uint8_t conidx, struct gattc_event_ind const *param, struct lanc_env_tag *lanc_env);\n\n/**\n ****************************************************************************************\n * @brief Unpacks position quality\n * @param[in] param Pointer to the parameters of the message\n * @param[out] ind Pointer to the value indication\n * @return length\n ****************************************************************************************\n */\nuint8_t lanc_unpack_pos_q_ind (struct gattc_read_ind const *param, struct lanc_value_ind *ind);\n\n/**\n ****************************************************************************************\n * @brief Packs Control Point data\n * @param[in] param Pointer to the parameters of the message.\n * @param[out] req packed message\n * @param[out] status status of the operation\n * @return length\n ****************************************************************************************\n */\nuint8_t lanc_pack_ln_ctnl_pt_req (struct lanc_ln_ctnl_pt_cfg_req *param, uint8_t *req, uint8_t *status);\n\n/**\n ****************************************************************************************\n * @brief Unpacks Control Point data and sends the indication\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] src Source task\n * @param[in] dest Destination task\n * @return length\n ****************************************************************************************\n */\nuint8_t lanc_unpack_ln_ctln_pt_ind (struct gattc_event_ind const *param, ke_task_id_t src, ke_task_id_t dest);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid lanc_task_init(struct ke_task_desc *task_desc);\n#endif //(BLE_LN_COLLECTOR)\n\n/// @} LANC\n\n#endif //(_LANC_H_)\n"
  },
  {
    "path": "services/ble_profiles/lan/lanc/src/lanc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup LANCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_LN_COLLECTOR)\n#include \"lan_common.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"ke_timer.h\"\n#include \"lanc.h\"\n#include \"lanc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Location and Navigation service\n/// characteristics information\nconst struct prf_char_def lanc_lns_char[LANP_LANS_CHAR_MAX] = {\n    /// LN Feature\n    [LANP_LANS_LN_FEAT_CHAR] = {ATT_CHAR_LN_FEAT, ATT_MANDATORY,\n                                ATT_CHAR_PROP_RD},\n    /// LN Measurement\n    [LANP_LANS_LOC_SPEED_CHAR] = {ATT_CHAR_LOC_SPEED, ATT_MANDATORY,\n                                  ATT_CHAR_PROP_NTF},\n    /// Position Quality\n    [LANP_LANS_POS_Q_CHAR] = {ATT_CHAR_POS_QUALITY, ATT_OPTIONAL,\n                              ATT_CHAR_PROP_RD},\n    /// SC Control Point\n    [LANP_LANS_LN_CTNL_PT_CHAR] = {ATT_CHAR_LN_CNTL_PT, ATT_OPTIONAL,\n                                   ATT_CHAR_PROP_WR | ATT_CHAR_PROP_IND},\n    /// Navigation\n    [LANP_LANS_NAVIG_CHAR] = {ATT_CHAR_NAVIGATION, ATT_OPTIONAL,\n                              ATT_CHAR_PROP_NTF},\n};\n\n/// State machine used to retrieve Location and Navigation service\n/// characteristic descriptor information\nconst struct prf_char_desc_def lanc_lns_char_desc[LANC_DESC_MAX] = {\n    /// Location and Speed Char. - Client Characteristic Configuration\n    [LANC_DESC_LOC_SPEED_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                    LANP_LANS_LOC_SPEED_CHAR},\n\n    /// Control Point Char. - Client Characteristic Configuration\n    [LANC_DESC_LN_CTNL_PT_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                     LANP_LANS_LN_CTNL_PT_CHAR},\n\n    /// Navigation Char. - Client Characteristic Configuration\n    [LANC_DESC_NAVIGATION_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                     LANP_LANS_NAVIG_CHAR},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == LANC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n\n    ASSERT_INFO(lanc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(lanc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (lanc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve CPS characteristics and descriptors\n      prf_extract_svc_info(ind, LANP_LANS_CHAR_MAX, &lanc_lns_char[0],\n                           &lanc_env->env[conidx]->lans.chars[0], LANC_DESC_MAX,\n                           &lanc_lns_char_desc[0],\n                           &lanc_env->env[conidx]->lans.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      lanc_env->env[conidx]->lans.svc.shdl = ind->start_hdl;\n      lanc_env->env[conidx]->lans.svc.ehdl = ind->end_hdl;\n    }\n\n    lanc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANC_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lanc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct lanc_enable_req *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  uint8_t state = ke_state_get(dest_id);\n  // Location and Navigation Profile Collector Role Task Environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n\n  ASSERT_INFO(lanc_env != NULL, dest_id, src_id);\n  if ((state == LANC_IDLE) && (lanc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    lanc_env->env[conidx] = (struct lanc_cnx_env *)ke_malloc(\n        sizeof(struct lanc_cnx_env), KE_MEM_ATT_DB);\n    memset(lanc_env->env[conidx], 0, sizeof(struct lanc_cnx_env));\n\n    // Config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering CPS on peer\n      prf_disc_svc_send(&(lanc_env->prf_env), conidx,\n                        ATT_SVC_LOCATION_AND_NAVIGATION);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, LANC_DISCOVERING);\n    }\n    // normal connection, get saved att details\n    else {\n      lanc_env->env[conidx]->lans = param->lans;\n\n      // send APP confirmation that can start normal connection to TH\n      lanc_enable_rsp_send(lanc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  }\n\n  else if (state != LANC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    lanc_enable_rsp_send(lanc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANC_READ_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lanc_read_cmd_handler(ke_msg_id_t const msgid,\n                                   struct lanc_read_cmd *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (state == LANC_IDLE) {\n    ASSERT_INFO(lanc_env != NULL, dest_id, src_id);\n    // environment variable not ready\n    if (lanc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else {\n      // Get the handler\n      uint16_t hdl = lanc_get_read_handle_req(lanc_env, conidx, param);\n\n      // Check if handle is viable\n      if (hdl != ATT_INVALID_SEARCH_HANDLE) {\n        // Force the operation value\n        param->operation = LANC_READ_OP_CODE;\n\n        // Store the command structure\n        lanc_env->env[conidx]->operation = param;\n        msg_status = KE_MSG_NO_FREE;\n\n        // Send the read request\n        prf_read_char_send(&(lanc_env->prf_env), conidx,\n                           lanc_env->env[conidx]->lans.svc.shdl,\n                           lanc_env->env[conidx]->lans.svc.ehdl, hdl);\n\n        // Go to the Busy state\n        ke_state_set(dest_id, LANC_BUSY);\n\n        status = ATT_ERR_NO_ERROR;\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    }\n  } else if (state == LANC_FREE) {\n    status = GAP_ERR_DISCONNECTED;\n  } else {\n    // Another procedure is pending, keep the command for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // Send the complete event message to the task id stored in the environment\n    lanc_send_cmp_evt(lanc_env, conidx, LANC_READ_OP_CODE, status);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANC_CFG_NTFIND_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lanc_cfg_ntfind_cmd_handler(ke_msg_id_t const msgid,\n                                         struct lanc_cfg_ntfind_cmd *param,\n                                         ke_task_id_t const dest_id,\n                                         ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n\n  uint8_t state = ke_state_get(dest_id);\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  if (lanc_env != NULL) {\n    // Status\n    uint8_t status = PRF_ERR_REQ_DISALLOWED;\n    // Handle\n    uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n    // Get connection index\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    do {\n      if (state != LANC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_SAVED;\n        break;\n      }\n\n      ASSERT_ERR(lanc_env->env[conidx] != NULL);\n\n      // Get handle\n      status = lanc_get_write_desc_handle_req(conidx, param, lanc_env, &handle);\n    } while (0);\n\n    if ((status == GAP_ERR_NO_ERROR) && (handle != ATT_INVALID_SEARCH_HANDLE)) {\n      // Set the operation code\n      param->operation = LANC_CFG_NTF_IND_OP_CODE;\n\n      // Store the command structure\n      lanc_env->env[conidx]->operation = param;\n      msg_status = KE_MSG_NO_FREE;\n\n      // Go to the Busy state\n      ke_state_set(dest_id, LANC_BUSY);\n\n      // Send GATT Write Request\n      prf_gatt_write_ntf_ind(&lanc_env->prf_env, conidx, handle,\n                             param->ntfind_cfg);\n    }\n  } else {\n    lanc_send_no_conn_cmp_evt(dest_id, src_id, LANC_CFG_NTF_IND_OP_CODE);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANC_LN_CTNL_PT_CFG_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lanc_ln_ctnl_pt_cfg_req_handler(\n    ke_msg_id_t const msgid, struct lanc_ln_ctnl_pt_cfg_req *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (lanc_env != NULL) {\n    // Status\n    uint8_t status = GAP_ERR_NO_ERROR;\n\n    do {\n      // State is Connected or Busy\n      ASSERT_ERR(ke_state_get(dest_id) > LANC_FREE);\n\n      // Check the provided connection handle\n      if (lanc_env->env[conidx] == NULL) {\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      if (ke_state_get(dest_id) != LANC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_SAVED;\n        // Status is PRF_ERR_OK, no message will be sent to the application\n        break;\n      }\n\n      // Check if the characteristic has been found\n      if (lanc_env->env[conidx]\n              ->lans.descs[LANC_DESC_LN_CTNL_PT_CL_CFG]\n              .desc_hdl != ATT_INVALID_SEARCH_HANDLE) {\n        // Request array declaration\n        uint8_t req[LANP_LAN_LN_CNTL_PT_REQ_MAX_LEN];\n        // Pack request\n        uint8_t nb = lanc_pack_ln_ctnl_pt_req(param, req, &status);\n\n        if (status == GAP_ERR_NO_ERROR) {\n          // Set the operation code\n          param->operation = LANC_LN_CTNL_PT_CFG_WR_OP_CODE;\n\n          // Store the command structure\n          lanc_env->env[conidx]->operation = param;\n          // Store the command information\n          msg_status = KE_MSG_NO_FREE;\n\n          // Go to the Busy state\n          ke_state_set(dest_id, LANC_BUSY);\n\n          // Send the write request\n          prf_gatt_write(&(lanc_env->prf_env), conidx,\n                         lanc_env->env[conidx]\n                             ->lans.chars[LANP_LANS_LN_CTNL_PT_CHAR]\n                             .val_hdl,\n                         (uint8_t *)&req[0], nb, GATTC_WRITE);\n        }\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      // Send a complete event status to the application\n      lanc_send_cmp_evt(lanc_env, conidx, LANC_LN_CTNL_PT_CFG_WR_OP_CODE,\n                        status);\n    }\n  } else {\n    // No connection\n    lanc_send_no_conn_cmp_evt(dest_id, src_id, LANC_LN_CTNL_PT_CFG_WR_OP_CODE);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANC_TIMEOUT_TIMER_IND message. This\n *message is received when the peer device doesn't send a SC Control Point\n *indication within 30s after reception of the write response.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lanc_timeout_timer_ind_handler(ke_msg_id_t const msgid,\n                                            void const *param,\n                                            ke_task_id_t const dest_id,\n                                            ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (lanc_env != NULL) {\n    ASSERT_ERR(lanc_env->env[conidx]->operation != NULL);\n    ASSERT_ERR(\n        ((struct lanc_cmd *)lanc_env->env[conidx]->operation)->operation ==\n        LANC_LN_CTNL_PT_CFG_IND_OP_CODE);\n\n    // Send the complete event message\n    lanc_send_cmp_evt(lanc_env, conidx, LANC_LN_CTNL_PT_CFG_WR_OP_CODE,\n                      PRF_ERR_PROC_TIMEOUT);\n  }\n  // else drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n  // Status\n  uint8_t status;\n\n  if (lanc_env != NULL) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    uint8_t state = ke_state_get(dest_id);\n\n    if (state == LANC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (lanc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity(\n              LANP_LANS_CHAR_MAX, lanc_env->env[conidx]->lans.chars,\n              lanc_lns_char);\n        }\n        // too much services\n        else if (lanc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              LANC_DESC_MAX, lanc_env->env[conidx]->lans.descs,\n              lanc_lns_char_desc, lanc_env->env[conidx]->lans.chars);\n        }\n      }\n\n      lanc_enable_rsp_send(lanc_env, conidx, status);\n    }\n\n    else if (state == LANC_BUSY) {\n      switch (param->operation) {\n      case GATTC_READ: {\n        // Send the complete event status\n        lanc_send_cmp_evt(lanc_env, conidx, LANC_READ_OP_CODE, param->status);\n      } break;\n\n      case GATTC_WRITE:\n      case GATTC_WRITE_NO_RESPONSE: {\n        uint8_t operation =\n            ((struct lanc_cmd *)lanc_env->env[conidx]->operation)->operation;\n\n        if (operation == LANC_CFG_NTF_IND_OP_CODE) {\n          // Send the complete event status\n          lanc_send_cmp_evt(lanc_env, conidx, operation, param->status);\n        }\n\n        else if (operation == LANC_LN_CTNL_PT_CFG_WR_OP_CODE) {\n          if (param->status == GAP_ERR_NO_ERROR) {\n            // Start Timeout Procedure\n            ke_timer_set(LANC_TIMEOUT_TIMER_IND, dest_id, ATT_TRANS_RTX);\n\n            // Wait for the response indication\n            ((struct lanc_cmd *)lanc_env->env[conidx]->operation)->operation =\n                LANC_LN_CTNL_PT_CFG_IND_OP_CODE;\n          } else {\n            // Send the complete event status\n            lanc_send_cmp_evt(lanc_env, conidx, operation, param->status);\n          }\n        }\n      } break;\n\n      case GATTC_REGISTER:\n      case GATTC_UNREGISTER: {\n        // Do nothing\n      } break;\n\n      default: {\n        ASSERT_ERR(0);\n      } break;\n      }\n    }\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  // Get the address of the environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n\n  if (state == LANC_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    ASSERT_INFO(lanc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(lanc_env->env[conidx] != NULL, dest_id, src_id);\n\n    // Send the read value to the HL\n    struct lanc_value_ind *ind = KE_MSG_ALLOC(\n        LANC_VALUE_IND, prf_dst_task_get(&(lanc_env->prf_env), conidx), dest_id,\n        lanc_value_ind);\n\n    switch (\n        ((struct lanc_read_cmd *)lanc_env->env[conidx]->operation)->read_code) {\n    // Read LN Feature Characteristic value\n    case (LANC_RD_LN_FEAT): {\n      ind->value.LN_feat = co_read32p(¶m->value[0]);\n\n      // Mask the reserved bits\n      //                ind->value.LN_feat &= LANP_FEAT_ALL_SUPP;\n    } break;\n\n    // Read Position Quality\n    case (LANC_RD_POS_Q): {\n      // Read position quality\n      lanc_unpack_pos_q_ind(param, ind);\n\n    } break;\n\n    // Read Client Characteristic Configuration Descriptor value\n    case (LANC_RD_WR_LOC_SPEED_CL_CFG):\n    case (LANC_RD_WR_LN_CTNL_PT_CFG):\n    case (LANC_RD_WR_NAVIGATION_CFG): {\n      ind->value.ntf_cfg = co_read16p(¶m->value[0]);\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    ind->att_code =\n        ((struct lanc_read_cmd *)lanc_env->env[conidx]->operation)->read_code;\n\n    // Send the message to the application\n    ke_msg_send(ind);\n  }\n  // else drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n\n  if (lanc_env != NULL) {\n    switch (param->type) {\n    case (GATTC_NOTIFY): {\n      if (param->handle ==\n          lanc_env->env[conidx]->lans.chars[LANP_LANS_LOC_SPEED_CHAR].val_hdl) {\n        // Unpack location and speed\n        lanc_unpack_loc_speed_ind(conidx, param, lanc_env);\n      } else if (param->handle == lanc_env->env[conidx]\n                                      ->lans.chars[LANP_LANS_NAVIG_CHAR]\n                                      .val_hdl) {\n        // Unpack navigation\n        lanc_unpack_navigation_ind(conidx, param, lanc_env);\n      } else {\n        ASSERT_ERR(0);\n      }\n    } break;\n\n    case (GATTC_INDICATE): {\n      // confirm that indication has been correctly received\n      struct gattc_event_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n      cfm->handle = param->handle;\n      ke_msg_send(cfm);\n\n      // Check if we were waiting for the indication\n      if (lanc_env->env[conidx]->operation != NULL) {\n        if (((struct lanc_cmd *)lanc_env->env[conidx]->operation)->operation ==\n            LANC_LN_CTNL_PT_CFG_IND_OP_CODE) {\n          // Stop the procedure timeout timer\n          ke_timer_clear(LANC_TIMEOUT_TIMER_IND, dest_id);\n\n          // Unpack control point\n          lanc_unpack_ln_ctln_pt_ind(\n              param, prf_src_task_get(&(lanc_env->prf_env), conidx),\n              prf_dst_task_get(&(lanc_env->prf_env), conidx));\n\n          // Send the complete event message\n          lanc_send_cmp_evt(lanc_env, conidx, LANC_LN_CTNL_PT_CFG_WR_OP_CODE,\n                            GAP_ERR_NO_ERROR);\n        }\n        // else drop the message\n      }\n      // else drop the message\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(lanc){\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {LANC_ENABLE_REQ, (ke_msg_func_t)lanc_enable_req_handler},\n    {LANC_READ_CMD, (ke_msg_func_t)lanc_read_cmd_handler},\n    {LANC_CFG_NTFIND_CMD, (ke_msg_func_t)lanc_cfg_ntfind_cmd_handler},\n    {LANC_LN_CTNL_PT_CFG_REQ, (ke_msg_func_t)lanc_ln_ctnl_pt_cfg_req_handler},\n    {LANC_TIMEOUT_TIMER_IND, (ke_msg_func_t)lanc_timeout_timer_ind_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_EVENT_REQ_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid lanc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct lanc_env_tag *lanc_env = PRF_ENV_GET(LANC, lanc);\n\n  task_desc->msg_handler_tab = lanc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(lanc_msg_handler_tab);\n  task_desc->state = lanc_env->state;\n  task_desc->idx_max = LANC_IDX_MAX;\n}\n\n#endif //(BLE_LN_COLLECTOR)\n\n/// @} LANCTASK\n"
  },
  {
    "path": "services/ble_profiles/lan/lans/api/lans_task.h",
    "content": "#ifndef _LANS_TASK_H_\n#define _LANS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup LANSTASK Task\n * @ingroup LANS\n * @brief Location and Navigation Profile Task.\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"lan_common.h\"\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Messages for Location and Navigation Profile Sensor\nenum lans_msg_id\n{\n    /// Start the Location and Navigation Profile Server profile\n    LANS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_LANS),\n    /// Confirm profile\n    LANS_ENABLE_RSP,\n\n    /// Update Position Quality\n    LANS_UPD_POS_Q_REQ,\n    /// Update Position Quality\n    LANS_UPD_POS_Q_RSP,\n\n    /// Send a Location and Speed to the peer device (Notification)\n    LANS_NTF_LOC_SPEED_REQ,\n    /// Response of Send a Location and Speed request\n    LANS_NTF_LOC_SPEED_RSP,\n\n    /// Send a LN Vector to the peer device (Notification)\n    LANS_NTF_NAVIGATION_REQ,\n    /// Response of Send LN Vector request\n    LANS_NTF_NAVIGATION_RSP,\n\n    /// Send a complete event status to the application\n    LANS_CMP_EVT,\n\n    /// Indicate that an attribute value has been written\n    LANS_CFG_NTFIND_IND,\n\n    /// Indicate that Control Point characteristic value has been written\n    LANS_LN_CTNL_PT_REQ_IND,\n    /// Application response after receiving a LANS_CTNL_PT_REQ_IND message\n    LANS_LN_CTNL_PT_CFM,\n};\n\n/// Operation Code used in the profile state machine\nenum lans_op_code\n{\n    /// Reserved Operation Code\n    LANS_RESERVED_OP_CODE          = 0x00,\n\n    /// Enable Profile Operation Code\n    LANS_ENABLE_REQ_OP_CODE,\n\n    /// Send Location and Speed Operation Code\n    LANS_NTF_LOC_SPEED_OP_CODE,\n\n    /// Update Position quality\n    LANS_UPD_POS_Q_OP_CODE,\n\n    /// Send Navigation Operation Code\n    LANS_NTF_NAVIGATION_OP_CODE,\n\n    /**\n     * Control Point Operation\n     */\n    /// Set Cumulative Value\n    LANS_SET_CUMUL_VALUE_OP_CODE,\n    /// Mask Location and Speed Characteristic Content\n    LANS_MASK_LSPEED_CHAR_CT_OP_CODE,\n    /// Navigation Control\n    LANS_NAVIGATION_CONTROL_OP_CODE,\n    /// Request Number of Routes\n    LANS_REQ_NUMBER_OF_ROUTES_OP_CODE,\n    /// Request Name of Route\n    LANS_REQ_NAME_OF_ROUTE_OP_CODE,\n    /// Select Route\n    LANS_SELECT_ROUTE_OP_CODE,\n    /// Set Fix Rate\n    LANS_SET_FIX_RATE_OP_CODE,\n    /// Set Elevation\n    LANS_SET_ELEVATION_OP_CODE,\n\n    /// Error Indication Sent Operation Code\n    LANS_LN_CTNL_ERR_IND_OP_CODE,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the @ref LANS_CREATE_DB_REQ message\nstruct lans_db_cfg\n{\n    /**\n     * LN Feature Value - Not supposed to be modified during the lifetime of the device\n     * This bit field is set in order to decide which features are supported:\n     */\n    uint32_t ln_feature;\n\n    /**\n     * Bit 0 - Enable LN Control Point\n     * Bit 1 - Enable Navigation Feature\n     */\n    uint8_t prfl_config;\n};\n\n/// Parameters of the @ref LANS_ENABLE_REQ message\nstruct lans_enable_req\n{\n    /// Connection index\n    uint8_t conidx;\n    /**\n     * Profile characteristic configuration:\n     *   Location and speed Characteristic NTF config -- Bit 0\n     *   LN Control Point Characteristic IND config ---- Bit 1\n     *   Navigation Characteristic NTF config ---------- Bit 2\n     */\n    uint16_t prfl_ntf_ind_cfg;\n};\n\n/// Parameters of the @ref LANS_ENABLE_RSP message\nstruct lans_enable_rsp\n{\n    /// Connection index\n    uint8_t conidx;\n    /// status\n    uint8_t status;\n};\n\n/// Parameters of the @ref LANS_CMP_EVT message\nstruct lans_cmp_evt\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t operation;\n    /// Operation Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref LANS_CFG_NTFIND_IND message\nstruct lans_cfg_ntfind_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Characteristic Code (Location and speed, Control Point or navigation)\n    uint8_t char_code;\n    /// Char. Client Characteristic Configuration\n    uint16_t ntf_cfg;\n};\n\n/// Parameters of the @ref LANS_NTF_LOC_SPEED_REQ message\nstruct  lans_ntf_loc_speed_req\n{\n    ///Parameters\n    struct lanp_loc_speed parameters;\n};\n\n/// Parameters of the @ref LANS_NTF_LOC_SPEED_RSP message\nstruct  lans_ntf_loc_speed_rsp\n{\n    /// Operation Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref LANS_NTF_NAVIGATION_REQ message\nstruct  lans_ntf_navigation_req\n{\n    ///Parameters\n    struct lanp_navigation parameters;\n};\n\n/// Parameters of the @ref LANS_NTF_NAVIGATION_RSP message\nstruct  lans_ntf_navigation_rsp\n{\n    /// Operation Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref LANS_UPD_POS_Q_REQ message\nstruct  lans_upd_pos_q_req\n{\n    ///Parameters\n    struct lanp_posq parameters;\n};\n\n/// Parameters of the @ref LANS_UPD_POS_Q_RSP message\nstruct  lans_upd_pos_q_rsp\n{\n    /// Operation Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref LANS_LN_CTNL_PT_REQ_IND message\nstruct lans_ln_ctnl_pt_req_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t op_code;\n    /// Value\n    union lans_ln_ctnl_pt_req_ind_value\n    {\n        /// Cumulative Value (24 bits)\n        uint32_t cumul_val;\n        /// Mask Content\n        uint16_t mask_content;\n        /// Navigation Control\n        uint8_t control_value;\n        /// Route number\n        uint16_t route_number;\n        /// Fix rate\n        uint8_t fix_rate;\n        /// Elevation\n        int32_t elevation;\n    } value;\n};\n\n/// Parameters of the @ref LANS_CTNL_PT_CFM message\nstruct lans_ln_ctnl_pt_cfm\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t op_code;\n    /// Status\n    uint8_t status;\n    /// Value\n    union lans_ln_ctnl_pt_cfm_value\n    {\n        /// Number of routes\n        uint16_t number_of_routes;\n        /// Mask content\n        uint16_t mask_lspeed_content;\n        struct lan_route_name\n        {\n            uint8_t length;\n            /// Name of Route UTF-8\n            uint8_t name[__ARRAY_EMPTY];\n        } route;\n    } value;\n};\n\n/// @} LANSTASK\n\n#endif //(_LANS_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/lan/lans/src/lans.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup LANS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_LN_SENSOR)\n#include \"lan_common.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc.h\"\n#include \"gattc_task.h\"\n#include \"lans.h\"\n#include \"lans_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n *  CYCLING POWER SERVICE ATTRIBUTES\n ****************************************************************************************\n */\n\n/// Full LANS Database Description - Used to add attributes into the database\nstatic const struct attm_desc lans_att_db[LNS_IDX_NB] = {\n    // Location and Navigation Service Declaration\n    [LNS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // LN Feature Characteristic Declaration\n    [LNS_IDX_LN_FEAT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // LN Feature Characteristic Value\n    [LNS_IDX_LN_FEAT_VAL] = {ATT_CHAR_LN_FEAT, PERM(RD, ENABLE),\n                             PERM(RI, ENABLE), sizeof(uint32_t)},\n\n    // Location and Speed Characteristic Declaration\n    [LNS_IDX_LOC_SPEED_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // Location and Speed Characteristic Value\n    [LNS_IDX_LOC_SPEED_VAL] = {ATT_CHAR_LOC_SPEED, PERM(NTF, ENABLE),\n                               PERM(RI, ENABLE), LANP_LAN_LOC_SPEED_MAX_LEN},\n    // Location and Speed Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [LNS_IDX_LOC_SPEED_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   0, 0},\n\n    // Position Quality Characteristic Declaration\n    [LNS_IDX_POS_Q_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0, 0},\n    // Position Quality Characteristic Value\n    [LNS_IDX_POS_Q_VAL] = {ATT_CHAR_POS_QUALITY, PERM(RD, ENABLE),\n                           PERM(RI, ENABLE), LANP_LAN_POSQ_MAX_LEN},\n\n    // LN Control Point Characteristic Declaration\n    [LNS_IDX_LN_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                 0},\n    // LN Control Point Characteristic Value - The response has the maximal\n    // length\n    [LNS_IDX_LN_CTNL_PT_VAL] = {ATT_CHAR_LN_CNTL_PT,\n                                PERM(IND, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                PERM(RI, ENABLE),\n                                LANP_LAN_LN_CNTL_PT_RSP_MAX_LEN},\n    // LN Control Point Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [LNS_IDX_LN_CTNL_PT_IND_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                    PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                    0, 0},\n\n    // Navigation Characteristic Declaration\n    [LNS_IDX_NAVIGATION_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                 0},\n    // Navigation Characteristic Value\n    [LNS_IDX_NAVIGATION_VAL] = {ATT_CHAR_NAVIGATION, PERM(NTF, ENABLE),\n                                PERM(RI, ENABLE), LANP_LAN_NAVIGATION_MAX_LEN},\n    // Navigation Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [LNS_IDX_NAVIGATION_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                    PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                    0, 0},\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the LANS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t lans_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct lans_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n  // Service Configuration Flag\n  uint16_t cfg_flag = LANS_MANDATORY_MASK;\n  // Database Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  /*\n   * Check if Position Quality shall be added.\n   */\n  if ((LANS_IS_FEATURE_SUPPORTED(\n          params->ln_feature, LANP_FEAT_NUMBER_OF_BEACONS_IN_SOLUTION_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_NUMBER_OF_BEACONS_IN_VIEW_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_TIME_TO_FIRST_FIX_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(\n          params->ln_feature, LANP_FEAT_ESTIMATED_HOR_POSITION_ERROR_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(\n          params->ln_feature, LANP_FEAT_ESTIMATED_VER_POSITION_ERROR_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_HOR_DILUTION_OF_PRECISION_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_VER_DILUTION_OF_PRECISION_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_POSITION_STATUS_SUPP))) {\n    // Add configuration to the database\n    cfg_flag |= LANS_POS_Q_MASK;\n  }\n\n  /*\n   * Check if the Navigation characteristic shall be added.\n   */\n  if ((LANS_IS_FEATURE_SUPPORTED(params->prfl_config,\n                                 LANS_NAVIGATION_SUPP_FLAG)) ||\n      (LANS_IS_FEATURE_SUPPORTED(\n          params->ln_feature, LANP_FEAT_NUMBER_OF_BEACONS_IN_SOLUTION_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_REMAINING_DISTANCE_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_REMAINING_VERTICAL_DISTANCE_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_ESTIMATED_TIME_OF_ARRIVAL_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_POSITION_STATUS_SUPP))) {\n    cfg_flag |= LANS_NAVI_MASK;\n  }\n  /*\n   * Check if the LN Control Point characteristic shall be added\n   */\n  if ((LANS_IS_FEATURE_SUPPORTED(cfg_flag, LANS_NAVI_MASK)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->prfl_config,\n                                 LANS_CTNL_PT_CHAR_SUPP_FLAG)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_TOTAL_DISTANCE_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_LSPEED_CHAR_CT_MASKING_SUPP)) ||\n      (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                 LANP_FEAT_FIX_RATE_SETTING_SUPP)) ||\n      ((LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                  LANP_FEAT_ELEVATION_SUPP)) &&\n       (LANS_IS_FEATURE_SUPPORTED(params->ln_feature,\n                                  LANP_FEAT_ELEVATION_SETTING_SUPP)))) {\n    cfg_flag |= LANS_LN_CTNL_PT_MASK;\n  }\n\n  // Add service in the database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_LOCATION_AND_NAVIGATION, (uint8_t *)&cfg_flag,\n      LNS_IDX_NB, NULL, env->task, &lans_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate LANS required environment variable\n    struct lans_env_tag *lans_env = (struct lans_env_tag *)ke_malloc(\n        sizeof(struct lans_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize LANS environment\n    env->env = (prf_env_t *)lans_env;\n    lans_env->shdl = *start_hdl;\n    lans_env->prfl_cfg = cfg_flag;\n    lans_env->features = params->ln_feature;\n    lans_env->operation = LANS_RESERVED_OP_CODE;\n    lans_env->posq = (LANS_IS_FEATURE_SUPPORTED(cfg_flag, LANS_POS_Q_MASK))\n                         ? (struct lanp_posq *)ke_malloc(\n                               sizeof(struct lanp_posq), KE_MEM_ATT_DB)\n                         : NULL;\n\n    lans_env->op_data = NULL;\n    memset(lans_env->env, 0, sizeof(lans_env->env));\n\n    lans_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Mono Instantiated task\n    lans_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_LANS;\n    lans_task_init(&(env->desc));\n\n    /* Put CPS in Idle state */\n    ke_state_set(env->task, LANS_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the LANS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void lans_destroy(struct prf_task_env *env) {\n  struct lans_env_tag *lans_env = (struct lans_env_tag *)env->env;\n\n  // free profile environment variables\n  env->env = NULL;\n\n  if (lans_env->posq != NULL) {\n    ke_free(lans_env->posq);\n  }\n\n  if (lans_env->op_data != NULL) {\n    ke_free(lans_env->op_data->cmd);\n    if (lans_env->op_data->ntf_pending) {\n      ke_free(lans_env->op_data->ntf_pending);\n    }\n    ke_free(lans_env->op_data);\n  }\n\n  ke_free(lans_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void lans_create(struct prf_task_env *env, uint8_t conidx) {\n  struct lans_env_tag *lans_env = (struct lans_env_tag *)env->env;\n\n  memset(&(lans_env->env[conidx]), 0, sizeof(struct lans_cnx_env));\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void lans_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct lans_env_tag *lans_env = (struct lans_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  memset(&(lans_env->env[conidx]), 0, sizeof(struct lans_cnx_env));\n}\n\n/// LANS Task interface required by profile manager\nconst struct prf_task_cbs lans_itf = {\n    (prf_init_fnct)lans_init,\n    lans_destroy,\n    lans_create,\n    lans_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *lans_prf_itf_get(void) { return &lans_itf; }\n\nvoid lans_send_cmp_evt(uint8_t conidx, uint8_t src_id, uint8_t dest_id,\n                       uint8_t operation, uint8_t status) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n  // Go back to the Connected state if the state is busy\n  if (ke_state_get(src_id) == LANS_BUSY) {\n    ke_state_set(src_id, LANS_IDLE);\n  }\n\n  // Set the operation code\n  lans_env->operation = LANS_RESERVED_OP_CODE;\n\n  // Send the message\n  struct lans_cmp_evt *evt =\n      KE_MSG_ALLOC(LANS_CMP_EVT, dest_id, src_id, lans_cmp_evt);\n\n  evt->conidx = conidx;\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\nuint8_t lans_pack_loc_speed_ntf(struct lanp_loc_speed *param,\n                                uint8_t *pckd_loc_speed) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  // Packed Measurement length\n  uint8_t pckd_loc_speed_len = LANP_LAN_LOC_SPEED_MIN_LEN;\n\n  // Check provided flags\n  if (LANS_IS_PRESENT(param->flags, LANP_LSPEED_INST_SPEED_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_INSTANTANEOUS_SPEED_SUPP)) {\n      // Pack instantaneous speed\n      co_write16p(&pckd_loc_speed[pckd_loc_speed_len], param->inst_speed);\n      pckd_loc_speed_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_LSPEED_INST_SPEED_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param->flags, LANP_LSPEED_TOTAL_DISTANCE_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_TOTAL_DISTANCE_SUPP)) {\n      // Pack total distance (24bits)\n      co_write24p(&pckd_loc_speed[pckd_loc_speed_len], param->total_dist);\n      pckd_loc_speed_len += 3;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_LSPEED_TOTAL_DISTANCE_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param->flags, LANP_LSPEED_LOCATION_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_LOCATION_SUPP)) {\n      // Pack Location\n      co_write32p(&pckd_loc_speed[pckd_loc_speed_len], param->latitude);\n      pckd_loc_speed_len += 4;\n      co_write32p(&pckd_loc_speed[pckd_loc_speed_len], param->longitude);\n      pckd_loc_speed_len += 4;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_LSPEED_LOCATION_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param->flags, LANP_LSPEED_ELEVATION_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_ELEVATION_SUPP)) {\n      // Pack elevation (24 bits)\n      co_write24p(&pckd_loc_speed[pckd_loc_speed_len], param->elevation);\n      pckd_loc_speed_len += 3;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_LSPEED_ELEVATION_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param->flags, LANP_LSPEED_HEADING_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features, LANP_FEAT_HEADING_SUPP)) {\n      // Pack Extreme Force Magnitudes (Maximum Force Magnitude & Minimum Force\n      // Magnitude)\n      co_write16p(&pckd_loc_speed[pckd_loc_speed_len], param->heading);\n      pckd_loc_speed_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_LSPEED_HEADING_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param->flags, LANP_LSPEED_ROLLING_TIME_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_ROLLING_TIME_SUPP)) {\n      // Pack rolling time\n      pckd_loc_speed[pckd_loc_speed_len] = param->rolling_time;\n      pckd_loc_speed_len++;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_LSPEED_ROLLING_TIME_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param->flags, LANP_LSPEED_UTC_TIME_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_UTC_TIME_SUPP)) {\n      // Pack UTC time\n      pckd_loc_speed_len += prf_pack_date_time(\n          &pckd_loc_speed[pckd_loc_speed_len], &(param->date_time));\n\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_LSPEED_UTC_TIME_PRESENT;\n    }\n  }\n\n  // Force the unused bits of the flag value to 0\n  //    param->flags &= LANP_LSPEED_ALL_PRESENT;\n  // Flags value\n  co_write16p(&pckd_loc_speed[0], param->flags);\n\n  return pckd_loc_speed_len;\n}\n\nuint8_t lans_split_loc_speed_ntf(uint8_t conidx,\n                                 struct gattc_send_evt_cmd *loc_speed_ntf1) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  // Extract flags info\n  uint16_t flags = co_read16p(&loc_speed_ntf1->value[0]);\n  // Allocate the GATT notification message\n  struct gattc_send_evt_cmd *loc_speed_ntf2 =\n      KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(&(lans_env->prf_env), conidx),\n                       gattc_send_evt_cmd, LANP_LAN_LOC_SPEED_MAX_LEN);\n\n  // Fill in the parameter structure\n  loc_speed_ntf2->operation = GATTC_NOTIFY;\n  loc_speed_ntf2->handle = LANS_HANDLE(LNS_IDX_LOC_SPEED_VAL);\n  loc_speed_ntf2->length = LANP_LAN_LOC_SPEED_MIN_LEN;\n\n  // Copy status flags\n  co_write16p(\n      &loc_speed_ntf2->value[0],\n      (flags &\n       (LANP_LSPEED_POSITION_STATUS_LSB | LANP_LSPEED_POSITION_STATUS_MSB |\n        LANP_LSPEED_SPEED_AND_DISTANCE_FORMAT |\n        LANP_LSPEED_ELEVATION_SOURCE_LSB | LANP_LSPEED_ELEVATION_SOURCE_MSB |\n        LANP_LSPEED_HEADING_SOURCE)));\n  // Current position\n  uint8_t len = 0;\n\n  for (uint16_t feat = LANP_LSPEED_INST_SPEED_PRESENT;\n       feat <= LANP_LSPEED_POSITION_STATUS_LSB; feat <<= 1) {\n    // First message fits within the MTU\n    if (loc_speed_ntf1->length <= gattc_get_mtu(conidx) - 3) {\n      // Stop splitting\n      break;\n    }\n\n    if (LANS_IS_PRESENT(flags, feat)) {\n      switch (feat) {\n      case LANP_LSPEED_ROLLING_TIME_PRESENT:\n        // Copy uint8\n        loc_speed_ntf2->value[loc_speed_ntf2->length] =\n            loc_speed_ntf1->value[LANP_LAN_LOC_SPEED_MIN_LEN];\n        len = 1;\n        break;\n\n      case LANP_LSPEED_INST_SPEED_PRESENT:\n      case LANP_LSPEED_HEADING_PRESENT:\n        // Copy uint16\n        memcpy(&loc_speed_ntf2->value[loc_speed_ntf2->length],\n               &loc_speed_ntf1->value[LANP_LAN_LOC_SPEED_MIN_LEN], 2);\n        len = 2;\n        break;\n\n      case LANP_LSPEED_TOTAL_DISTANCE_PRESENT:\n      case LANP_LSPEED_ELEVATION_PRESENT:\n        // Copy uint24\n        memcpy(&loc_speed_ntf2->value[loc_speed_ntf2->length],\n               &loc_speed_ntf1->value[LANP_LAN_LOC_SPEED_MIN_LEN], 3);\n        len = 3;\n        break;\n\n      case LANP_LSPEED_LOCATION_PRESENT:\n        // Copy latitude and longitude\n        memcpy(&loc_speed_ntf2->value[loc_speed_ntf2->length],\n               &loc_speed_ntf1->value[LANP_LAN_LOC_SPEED_MIN_LEN], 8);\n        len = 8;\n        break;\n\n      case LANP_LSPEED_UTC_TIME_PRESENT:\n        // Copy time\n        memcpy(&loc_speed_ntf2->value[loc_speed_ntf2->length],\n               &loc_speed_ntf1->value[LANP_LAN_LOC_SPEED_MIN_LEN], 7);\n        len = 7;\n        break;\n\n      default:\n        len = 0;\n        break;\n      }\n\n      if (len) {\n        // Update values\n        loc_speed_ntf2->length += len;\n        // Remove field and flags from the first ntf\n        loc_speed_ntf1->length -= len;\n        memcpy(&loc_speed_ntf1->value[LANP_LAN_LOC_SPEED_MIN_LEN],\n               &loc_speed_ntf1->value[LANP_LAN_LOC_SPEED_MIN_LEN + len],\n               loc_speed_ntf1->length);\n        // Update flags\n        loc_speed_ntf1->value[0] &= ~feat;\n        loc_speed_ntf2->value[0] |= feat;\n      }\n    }\n  }\n\n  // store the pending notification to send\n  lans_env->op_data->ntf_pending = loc_speed_ntf2;\n\n  return loc_speed_ntf2->length;\n}\n\nuint8_t\nlans_update_characteristic_config(uint8_t conidx, uint8_t prfl_config,\n                                  struct gattc_write_req_ind const *param) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get the value\n  uint16_t ntf_cfg = co_read16p(¶m->value[0]);\n\n  // Check if the value is correct\n  if (prfl_config == LANS_PRF_CFG_FLAG_LN_CTNL_PT_IND) {\n    if ((ntf_cfg == PRF_CLI_STOP_NTFIND) || (ntf_cfg == PRF_CLI_START_IND)) {\n      // Save the new configuration in the environment\n      (ntf_cfg == PRF_CLI_STOP_NTFIND)\n          ? LANS_DISABLE_NTF_IND(conidx, prfl_config)\n          : LANS_ENABLE_NTF_IND(conidx, prfl_config);\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } else {\n    if ((ntf_cfg == PRF_CLI_STOP_NTFIND) || (ntf_cfg == PRF_CLI_START_NTF)) {\n      // Save the new configuration in the environment\n      (ntf_cfg == PRF_CLI_STOP_NTFIND)\n          ? LANS_DISABLE_NTF_IND(conidx, prfl_config)\n          : LANS_ENABLE_NTF_IND(conidx, prfl_config);\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  }\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // Allocate message to inform application\n    struct lans_cfg_ntfind_ind *ind = KE_MSG_ALLOC(\n        LANS_CFG_NTFIND_IND, prf_dst_task_get(&(lans_env->prf_env), conidx),\n        prf_src_task_get(&(lans_env->prf_env), conidx), lans_cfg_ntfind_ind);\n    // Inform APP of configuration change\n    ind->char_code = prfl_config;\n    ind->ntf_cfg = ntf_cfg;\n    ind->conidx = conidx;\n    ke_msg_send(ind);\n\n    // Enable Bonded Data\n    LANS_ENABLE_NTF_IND(conidx, LANS_PRF_CFG_PERFORMED_OK);\n  }\n\n  return (status);\n}\n\nuint8_t lans_pack_navigation_ntf(struct lanp_navigation *param,\n                                 uint8_t *pckd_navigation) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  // Packed Measurement length\n  uint8_t pckd_navigation_len = LANP_LAN_NAVIGATION_MIN_LEN;\n\n  // Check provided flags\n  if (LANS_IS_PRESENT(param->flags, LANP_NAVI_REMAINING_DIS_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_REMAINING_DISTANCE_SUPP)) {\n      // Pack distance (24bits)\n      co_write24p(&pckd_navigation[pckd_navigation_len],\n                  param->remaining_distance);\n      pckd_navigation_len += 3;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_NAVI_REMAINING_DIS_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param->flags, LANP_NAVI_REMAINING_VER_DIS_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_REMAINING_VERTICAL_DISTANCE_SUPP)) {\n      // Pack vertical distance (24bits)\n      co_write24p(&pckd_navigation[pckd_navigation_len],\n                  param->remaining_ver_distance);\n      pckd_navigation_len += 3;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_NAVI_REMAINING_VER_DIS_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param->flags,\n                      LANP_NAVI_ESTIMATED_TIME_OF_ARRIVAL_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_ESTIMATED_TIME_OF_ARRIVAL_SUPP)) {\n      // Pack time\n      pckd_navigation_len +=\n          prf_pack_date_time(&pckd_navigation[pckd_navigation_len],\n                             &(param->estimated_arrival_time));\n\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param->flags &= ~LANP_NAVI_ESTIMATED_TIME_OF_ARRIVAL_PRESENT;\n    }\n  }\n\n  // Force the unused bits of the flag value to 0\n  //    param->flags &= LANP_NAVI_ALL_PRESENT;\n  // Flags value\n  co_write16p(&pckd_navigation[0], param->flags);\n  // Bearing value\n  co_write16p(&pckd_navigation[2], param->bearing);\n  // heading value\n  co_write16p(&pckd_navigation[4], param->heading);\n\n  return pckd_navigation_len;\n}\n\nvoid lans_upd_posq(struct lanp_posq param) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n  // Check provided flags\n  if (LANS_IS_PRESENT(param.flags,\n                      LANP_POSQ_NUMBER_OF_BEACONS_IN_SOLUTION_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(\n            lans_env->features, LANP_FEAT_NUMBER_OF_BEACONS_IN_SOLUTION_SUPP)) {\n      // Pack beacons in solution\n      lans_env->posq->n_beacons_solution = param.n_beacons_solution;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param.flags &= ~LANP_POSQ_NUMBER_OF_BEACONS_IN_SOLUTION_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param.flags,\n                      LANP_POSQ_NUMBER_OF_BEACONS_IN_VIEW_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_NUMBER_OF_BEACONS_IN_VIEW_SUPP)) {\n      // Pack beacons in view\n      lans_env->posq->n_beacons_view = param.n_beacons_view;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param.flags &= ~LANP_POSQ_NUMBER_OF_BEACONS_IN_VIEW_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param.flags, LANP_POSQ_TIME_TO_FIRST_FIX_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_TIME_TO_FIRST_FIX_SUPP)) {\n      // Pack time to fix\n      lans_env->posq->time_first_fix = param.time_first_fix;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param.flags &= ~LANP_POSQ_TIME_TO_FIRST_FIX_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param.flags, LANP_POSQ_EHPE_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(\n            lans_env->features, LANP_FEAT_ESTIMATED_HOR_POSITION_ERROR_SUPP)) {\n      // Pack ehpe\n      lans_env->posq->ehpe = param.ehpe;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param.flags &= ~LANP_POSQ_EHPE_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param.flags, LANP_POSQ_EVPE_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(\n            lans_env->features, LANP_FEAT_ESTIMATED_VER_POSITION_ERROR_SUPP)) {\n      // Pack evpe\n      lans_env->posq->evpe = param.evpe;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param.flags &= ~LANP_POSQ_EVPE_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param.flags, LANP_POSQ_HDOP_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_HOR_DILUTION_OF_PRECISION_SUPP)) {\n      // Pack hdop\n      lans_env->posq->hdop = param.hdop;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param.flags &= ~LANP_POSQ_HDOP_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(param.flags, LANP_POSQ_VDOP_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_VER_DILUTION_OF_PRECISION_SUPP)) {\n      // Pack vdop\n      lans_env->posq->vdop = param.vdop;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      param.flags &= ~LANP_POSQ_VDOP_PRESENT;\n    }\n  }\n\n  // Force the unused bits of the flag value to 0\n  //    param.flags &= LANP_POSQ_ALL_PRESENT;\n  // Flags value\n  lans_env->posq->flags = param.flags;\n}\n\nuint8_t lans_pack_posq(uint8_t *pckd_posq) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n  // Packed length\n  uint8_t pckd_posq_len = LANP_LAN_POSQ_MIN_LEN;\n\n  // Check provided flags\n  if (LANS_IS_PRESENT(lans_env->posq->flags,\n                      LANP_POSQ_NUMBER_OF_BEACONS_IN_SOLUTION_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(\n            lans_env->features, LANP_FEAT_NUMBER_OF_BEACONS_IN_SOLUTION_SUPP)) {\n      // Pack beacons in solution\n      pckd_posq[pckd_posq_len] = lans_env->posq->n_beacons_solution;\n      pckd_posq_len++;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      lans_env->posq->flags &= ~LANP_POSQ_NUMBER_OF_BEACONS_IN_SOLUTION_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(lans_env->posq->flags,\n                      LANP_POSQ_NUMBER_OF_BEACONS_IN_VIEW_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_NUMBER_OF_BEACONS_IN_VIEW_SUPP)) {\n      // Pack beacons in view\n      pckd_posq[pckd_posq_len] = lans_env->posq->n_beacons_view;\n      pckd_posq_len++;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      lans_env->posq->flags &= ~LANP_POSQ_NUMBER_OF_BEACONS_IN_VIEW_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(lans_env->posq->flags,\n                      LANP_POSQ_TIME_TO_FIRST_FIX_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_TIME_TO_FIRST_FIX_SUPP)) {\n      // Pack time to fix\n      co_write16p(&pckd_posq[pckd_posq_len], lans_env->posq->time_first_fix);\n      pckd_posq_len += 2;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      lans_env->posq->flags &= ~LANP_POSQ_TIME_TO_FIRST_FIX_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(lans_env->posq->flags, LANP_POSQ_EHPE_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(\n            lans_env->features, LANP_FEAT_ESTIMATED_HOR_POSITION_ERROR_SUPP)) {\n      // Pack ehpe\n      co_write32p(&pckd_posq[pckd_posq_len], lans_env->posq->ehpe);\n      pckd_posq_len += 4;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      lans_env->posq->flags &= ~LANP_POSQ_EHPE_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(lans_env->posq->flags, LANP_POSQ_EVPE_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(\n            lans_env->features, LANP_FEAT_ESTIMATED_VER_POSITION_ERROR_SUPP)) {\n      // Pack ehpe\n      co_write32p(&pckd_posq[pckd_posq_len], lans_env->posq->evpe);\n      pckd_posq_len += 4;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      lans_env->posq->flags &= ~LANP_POSQ_EVPE_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(lans_env->posq->flags, LANP_POSQ_HDOP_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_HOR_DILUTION_OF_PRECISION_SUPP)) {\n      // Pack ehpe\n      pckd_posq[pckd_posq_len] = lans_env->posq->hdop;\n      pckd_posq_len++;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      lans_env->posq->flags &= ~LANP_POSQ_HDOP_PRESENT;\n    }\n  }\n\n  if (LANS_IS_PRESENT(lans_env->posq->flags, LANP_POSQ_VDOP_PRESENT)) {\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_VER_DILUTION_OF_PRECISION_SUPP)) {\n      // Pack ehpe\n      pckd_posq[pckd_posq_len] = lans_env->posq->vdop;\n      pckd_posq_len++;\n    } else // Not supported by the profile\n    {\n      // Force to not supported\n      lans_env->posq->flags &= ~LANP_POSQ_VDOP_PRESENT;\n    }\n  }\n\n  // Force the unused bits of the flag value to 0\n  //    lans_env->posq->flags &= LANP_POSQ_ALL_PRESENT;\n  // Flags value\n  co_write16p(&pckd_posq[0], lans_env->posq->flags);\n\n  return pckd_posq_len;\n}\n\nuint8_t lans_pack_ln_ctnl_point_cfm(uint8_t conidx,\n                                    struct lans_ln_ctnl_pt_cfm *param,\n                                    uint8_t *rsp) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  // Response Length (At least 3)\n  uint8_t rsp_len = LANP_LAN_LN_CNTL_PT_RSP_MIN_LEN;\n\n  // Set the Response Code\n  rsp[0] = LANP_LN_CTNL_PT_RESPONSE_CODE;\n  // Set the Response Value\n  rsp[2] = (param->status > LANP_LN_CTNL_PT_RESP_FAILED)\n               ? LANP_LN_CTNL_PT_RESP_FAILED\n               : param->status;\n\n  switch (lans_env->operation) {\n  case (LANS_SET_CUMUL_VALUE_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = LANP_LN_CTNL_PT_SET_CUMUL_VALUE;\n  } break;\n\n  case (LANS_MASK_LSPEED_CHAR_CT_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = LANP_LN_CTNL_PT_MASK_LSPEED_CHAR_CT;\n    if (param->status == LANP_LN_CTNL_PT_RESP_SUCCESS) {\n      lans_env->env[conidx].mask_lspeed_content =\n          param->value.mask_lspeed_content & 0x007F;\n    }\n  } break;\n\n  case (LANS_NAVIGATION_CONTROL_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = LANP_LN_CTNL_PT_NAVIGATION_CONTROL;\n    if (param->status == LANP_LN_CTNL_PT_RESP_SUCCESS) {\n      switch (LANS_GET_NAV_MODE(conidx)) {\n      // Disable notifications\n      case LANP_LN_CTNL_STOP_NAVI:\n      case LANP_LN_CTNL_PAUSE_NAVI:\n        LANS_SET_NAV_EN(conidx, false);\n        break;\n\n      // Enable notifications\n      case LANP_LN_CTNL_START_NAVI:\n      case LANP_LN_CTNL_RESUME_NAVI:\n      case LANP_LN_CTNL_START_NST_WPT:\n        LANS_SET_NAV_EN(conidx, true);\n        break;\n\n      // Do nothing\n      case LANP_LN_CTNL_SKIP_WPT:\n      default:\n        break;\n      }\n    }\n  } break;\n\n  case (LANS_REQ_NUMBER_OF_ROUTES_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = LANP_LN_CTNL_PT_REQ_NUMBER_OF_ROUTES;\n    if (param->status == LANP_LN_CTNL_PT_RESP_SUCCESS) {\n      co_write16p(&rsp[rsp_len], param->value.number_of_routes);\n      rsp_len += 2;\n    }\n  } break;\n\n  case (LANS_REQ_NAME_OF_ROUTE_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = LANP_LN_CTNL_PT_REQ_NAME_OF_ROUTE;\n    if (param->status == LANP_LN_CTNL_PT_RESP_SUCCESS) {\n      // pack name of route\n      for (int i = 0; i < param->value.route.length; i++) {\n        rsp[i + 3] = param->value.route.name[i];\n        rsp_len++;\n      }\n    }\n  } break;\n\n  case (LANS_SELECT_ROUTE_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = LANP_LN_CTNL_PT_SELECT_ROUTE;\n  } break;\n\n  case (LANS_SET_FIX_RATE_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = LANP_LN_CTNL_PT_SET_FIX_RATE;\n  } break;\n\n  case (LANS_SET_ELEVATION_OP_CODE): {\n    // Set the request operation code\n    rsp[1] = LANP_LN_CTNL_PT_SET_ELEVATION;\n  } break;\n\n  default: {\n    param->status = LANP_LN_CTNL_PT_RESP_NOT_SUPP;\n  } break;\n  }\n\n  return rsp_len;\n}\n\nuint8_t lans_unpack_ln_ctnl_point_ind(uint8_t conidx,\n                                      struct gattc_write_req_ind const *param) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n  // Indication Status\n  uint8_t ind_status = LANP_LN_CTNL_PT_RESP_NOT_SUPP;\n\n  // Allocate a request indication message for the application\n  struct lans_ln_ctnl_pt_req_ind *req_ind = KE_MSG_ALLOC(\n      LANS_LN_CTNL_PT_REQ_IND, prf_dst_task_get(&(lans_env->prf_env), conidx),\n      prf_src_task_get(&(lans_env->prf_env), conidx), lans_ln_ctnl_pt_req_ind);\n  // Operation Code\n  req_ind->op_code = param->value[0];\n  req_ind->conidx = conidx;\n\n  // Operation Code\n  switch (req_ind->op_code) {\n  case (LANP_LN_CTNL_PT_SET_CUMUL_VALUE): {\n    // Check if total distance feature is supported\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_TOTAL_DISTANCE_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = LANP_LN_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 4) {\n        // The request can be handled\n        ind_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        lans_env->operation = LANS_SET_CUMUL_VALUE_OP_CODE;\n        // Cumulative value\n        req_ind->value.cumul_val = co_read24p(¶m->value[1]);\n      }\n    }\n  } break;\n\n  case (LANP_LN_CTNL_PT_MASK_LSPEED_CHAR_CT): {\n    // Check if the LN Masking feature is supported\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_LSPEED_CHAR_CT_MASKING_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = LANP_LN_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 3) {\n        // The request can be handled\n        ind_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        lans_env->operation = LANS_MASK_LSPEED_CHAR_CT_OP_CODE;\n        // Mask content\n        req_ind->value.mask_content = co_read16p(¶m->value[1]);\n      }\n    }\n  } break;\n\n  case (LANP_LN_CTNL_PT_NAVIGATION_CONTROL): {\n    // Check if navigation feature is supported\n    if ((LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_NAVI_MASK)) &&\n        (LANS_IS_NTF_IND_ENABLED(conidx, LANS_PRF_CFG_FLAG_NAVIGATION_NTF))) {\n      // Provided parameter in not within the defined range\n      ind_status = LANP_LN_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 2) {\n        if (param->value[1] <= 0x05) {\n          // The request can be handled\n          ind_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n          // Update the environment\n          lans_env->operation = LANS_NAVIGATION_CONTROL_OP_CODE;\n          // Control value\n          req_ind->value.control_value = param->value[1];\n          // Store value in the environment\n          LANS_SET_NAV_MODE(conidx, req_ind->value.control_value);\n        }\n      }\n    }\n  } break;\n\n  case (LANP_LN_CTNL_PT_REQ_NUMBER_OF_ROUTES): {\n    // Check if navigation feature is supported\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_NAVI_MASK)) {\n      // The request can be handled\n      ind_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n      // Update the environment\n      lans_env->operation = LANS_REQ_NUMBER_OF_ROUTES_OP_CODE;\n    }\n  } break;\n\n  case (LANP_LN_CTNL_PT_REQ_NAME_OF_ROUTE): {\n    // Check if navigation feature is supported\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_NAVI_MASK)) {\n      // Provided parameter in not within the defined range\n      ind_status = LANP_LN_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 3) {\n        // The request can be handled\n        ind_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        lans_env->operation = LANS_REQ_NAME_OF_ROUTE_OP_CODE;\n        // Route number\n        req_ind->value.route_number = co_read16p(¶m->value[1]);\n      }\n    }\n  } break;\n\n  case (LANP_LN_CTNL_PT_SELECT_ROUTE): {\n    // Check if navigation feature is supported\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_NAVI_MASK)) {\n      // Provided parameter in not within the defined range\n      ind_status = LANP_LN_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 3) {\n        // The request can be handled\n        ind_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        lans_env->operation = LANS_SELECT_ROUTE_OP_CODE;\n        // route number\n        req_ind->value.route_number = co_read16p(¶m->value[1]);\n      }\n    }\n  } break;\n\n  case (LANP_LN_CTNL_PT_SET_FIX_RATE): {\n    // Check if the LN Masking feature is supported\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_FIX_RATE_SETTING_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = LANP_LN_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 2) {\n        // The request can be handled\n        ind_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        lans_env->operation = LANS_SET_FIX_RATE_OP_CODE;\n        // fix rate\n        req_ind->value.fix_rate = param->value[1];\n      }\n    }\n  } break;\n\n  case (LANP_LN_CTNL_PT_SET_ELEVATION): {\n    // Check if the Chain Weight Adjustment feature is supported\n    if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                  LANP_FEAT_ELEVATION_SETTING_SUPP)) {\n      // Provided parameter in not within the defined range\n      ind_status = LANP_LN_CTNL_PT_RESP_INV_PARAM;\n\n      if (param->length == 4) {\n        // The request can be handled\n        ind_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n        // Update the environment\n        lans_env->operation = LANS_SET_ELEVATION_OP_CODE;\n        // elevation\n        req_ind->value.elevation = co_read24p(¶m->value[1]);\n      }\n    }\n  } break;\n\n  default: {\n    // Operation Code is invalid, status is already LAN_CTNL_PT_RESP_NOT_SUPP\n  } break;\n  }\n\n  // If no error raised, inform the application about the request\n  if (ind_status == LANP_LN_CTNL_PT_RESP_SUCCESS) {\n    // Send the request indication to the application\n    ke_msg_send(req_ind);\n    // Go to the Busy status\n    ke_state_set(prf_src_task_get(&(lans_env->prf_env), conidx), LANS_BUSY);\n  } else {\n    // Free the allocated message\n    ke_msg_free(ke_param2msg(req_ind));\n  }\n\n  return ind_status;\n}\n\nvoid lans_exe_operation(void) {\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n  ASSERT_ERR(lans_env->op_data != NULL);\n\n  bool finished = true;\n\n  while ((lans_env->op_data->cursor < BLE_CONNECTION_MAX) && finished) {\n    uint8_t conidx = lans_env->op_data->cursor;\n\n    switch (lans_env->operation) {\n    case LANS_NTF_LOC_SPEED_OP_CODE: {\n      // notification is pending, send it first\n      if (lans_env->op_data->ntf_pending != NULL) {\n        ke_msg_send(lans_env->op_data->ntf_pending);\n        lans_env->op_data->ntf_pending = NULL;\n        finished = false;\n      }\n      // Check if sending of notifications has been enabled\n      else if (LANS_IS_NTF_IND_ENABLED(conidx,\n                                       LANS_PRF_CFG_FLAG_LOC_SPEED_NTF)) {\n        struct lans_ntf_loc_speed_req *speed_cmd =\n            (struct lans_ntf_loc_speed_req *)ke_msg2param(\n                lans_env->op_data->cmd);\n\n        // Save flags value\n        uint16_t flags = speed_cmd->parameters.flags;\n\n        // Mask unwanted fields if supported\n        if (LANS_IS_FEATURE_SUPPORTED(lans_env->features,\n                                      LANP_FEAT_LSPEED_CHAR_CT_MASKING_SUPP)) {\n          speed_cmd->parameters.flags &=\n              ~lans_env->env[conidx].mask_lspeed_content;\n        }\n\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *meas_val = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n            prf_src_task_get(&(lans_env->prf_env), conidx), gattc_send_evt_cmd,\n            LANP_LAN_LOC_SPEED_MAX_LEN);\n\n        // Fill in the parameter structure\n        meas_val->operation = GATTC_NOTIFY;\n        meas_val->handle = LANS_HANDLE(LNS_IDX_LOC_SPEED_VAL);\n        // pack measured value in database\n        meas_val->length =\n            lans_pack_loc_speed_ntf(&speed_cmd->parameters, meas_val->value);\n\n        if (meas_val->length > gattc_get_mtu(conidx) - 3) {\n          // Split (if necessary)\n          lans_split_loc_speed_ntf(conidx, meas_val);\n        }\n\n        // Restore flags value\n        speed_cmd->parameters.flags = flags;\n\n        // Send the event\n        ke_msg_send(meas_val);\n\n        finished = false;\n      }\n\n      // update cursor only if all notification has been sent\n      if (lans_env->op_data->ntf_pending == NULL) {\n        lans_env->op_data->cursor++;\n      }\n    } break;\n\n    case LANS_NTF_NAVIGATION_OP_CODE: {\n      struct lans_ntf_navigation_req *nav_cmd =\n          (struct lans_ntf_navigation_req *)ke_msg2param(\n              lans_env->op_data->cmd);\n\n      // Check if sending of notifications has been enabled\n      if (LANS_IS_NTF_IND_ENABLED(conidx, LANS_PRF_CFG_FLAG_NAVIGATION_NTF)\n          // and if navigation is enabled\n          && LANS_IS_NAV_EN(conidx)) {\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *meas_val = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n            prf_src_task_get(&(lans_env->prf_env), conidx), gattc_send_evt_cmd,\n            LANP_LAN_NAVIGATION_MAX_LEN);\n\n        // Fill in the parameter structure\n        meas_val->operation = GATTC_NOTIFY;\n        meas_val->handle = LANS_HANDLE(LNS_IDX_NAVIGATION_VAL);\n        // pack measured value in database\n        meas_val->length =\n            lans_pack_navigation_ntf(&nav_cmd->parameters, meas_val->value);\n\n        // Send the event\n        ke_msg_send(meas_val);\n\n        finished = false;\n      }\n\n      lans_env->op_data->cursor++;\n    } break;\n    default:\n      ASSERT_ERR(0);\n      break;\n    }\n  }\n\n  // check if operation is finished\n  if (finished) {\n    // send response to requester\n    struct lans_ntf_navigation_rsp *rsp =\n        KE_MSG_ALLOC(((lans_env->operation == LANS_NTF_NAVIGATION_OP_CODE)\n                          ? LANS_NTF_NAVIGATION_RSP\n                          : LANS_NTF_LOC_SPEED_RSP),\n                     lans_env->op_data->cmd->src_id,\n                     lans_env->op_data->cmd->dest_id, lans_ntf_navigation_rsp);\n    rsp->status = GAP_ERR_NO_ERROR;\n    ke_msg_send(rsp);\n\n    // free operation data\n    ke_msg_free(lans_env->op_data->cmd);\n    ke_free(lans_env->op_data);\n    lans_env->op_data = NULL;\n    // Set the operation code\n    lans_env->operation = LANS_RESERVED_OP_CODE;\n    // go back to idle state\n    ke_state_set(prf_src_task_get(&(lans_env->prf_env), 0), LANS_IDLE);\n  }\n}\n\nvoid lans_send_rsp_ind(uint8_t conidx, uint8_t req_op_code, uint8_t status) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n  // Allocate the GATT notification message\n  struct gattc_send_evt_cmd *ctl_pt_rsp =\n      KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(&lans_env->prf_env, conidx),\n                       gattc_send_evt_cmd, LANP_LAN_LN_CNTL_PT_RSP_MIN_LEN);\n\n  // Fill in the parameter structure\n  ctl_pt_rsp->operation = GATTC_INDICATE;\n  ctl_pt_rsp->handle = LANS_HANDLE(LNS_IDX_LN_CTNL_PT_VAL);\n  // Pack Control Point confirmation\n  ctl_pt_rsp->length = LANP_LAN_LN_CNTL_PT_RSP_MIN_LEN;\n  // Response Code\n  ctl_pt_rsp->value[0] = LANP_LN_CTNL_PT_RESPONSE_CODE;\n  // Request Operation Code\n  ctl_pt_rsp->value[1] = req_op_code;\n  // Response value\n  ctl_pt_rsp->value[2] = status;\n\n  // Send the event\n  ke_msg_send(ctl_pt_rsp);\n}\n\n#endif //(BLE_LN_SENSOR)\n\n/// @} LANS\n"
  },
  {
    "path": "services/ble_profiles/lan/lans/src/lans.h",
    "content": "#ifndef _LANS_H_\n#define _LANS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup LANS Location and Navigation Profile Sensor\n * @ingroup LAN\n * @brief Location and Navigation Profile Sensor\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_LN_SENSOR)\n#include \"lan_common.h\"\n#include \"lans_task.h\"\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"attm.h\"\n#include \"co_math.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Maximum number of Location and Navigation Profile Sensor role task instances\n#define LANS_IDX_MAX        (1)\n\n/********************************************\n ******* LANS Configuration Flag Masks ******\n ********************************************/\n\n/// Mandatory Attributes (LN Feature + Location and Speed)\n#define LANS_MANDATORY_MASK           (0x003F)\n/// Position quality Attribute\n#define LANS_POS_Q_MASK               (0x00C0)\n/// Control Point Attributes\n#define LANS_LN_CTNL_PT_MASK          (0x0700)\n/// Navigation Attributes\n#define LANS_NAVI_MASK                (0x3800)\n\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n#define LANS_IS_FEATURE_SUPPORTED(features, flag)  ((features & flag) == flag)\n\n#define LANS_IS_PRESENT(features, flag)            ((features & flag) == flag)\n\n#define LANS_IS_SET(features, flag)                (features & flag)\n\n#define LANS_IS_CLEAR(features, flag)              ((features & flag) == 0)\n\n#define LANS_ENABLE_NTF_IND(idx, ccc_flag)         (lans_env->env[idx].prfl_ntf_ind_cfg |= ccc_flag)\n\n#define LANS_DISABLE_NTF_IND(idx, ccc_flag)        (lans_env->env[idx].prfl_ntf_ind_cfg &= ~ccc_flag)\n\n#define LANS_IS_NTF_IND_ENABLED(idx, ccc_flag)     ((lans_env->env[idx].prfl_ntf_ind_cfg & ccc_flag) == ccc_flag)\n\n// Management of Navigation status\n#define LANS_IS_NAV_EN(idx)           ((lans_env->env[idx].nav_ctrl & 0x80) != 0)\n#define LANS_SET_NAV_EN(idx, enable)  \\\n     (lans_env->env[idx].nav_ctrl = ((lans_env->env[idx].nav_ctrl & 0x7F) | (enable << 7)))\n\n// Management of Navigation mode\n#define LANS_GET_NAV_MODE(idx)           (lans_env->env[idx].nav_ctrl & 0x7F)\n#define LANS_SET_NAV_MODE(idx, mode)  \\\n     (lans_env->env[idx].nav_ctrl = ((lans_env->env[idx].nav_ctrl & 0x8F) | (mode & 0x7F)))\n\n\n// MACRO TO CALCULATE HANDLE    shdl + idx - POSQ - CNTL PT\n// POSQ is 2 if the Position quality is supported otherwise 0\n// CNTL PT is 3 if the CP characteristic is supported otherwise 0\n#define LANS_HANDLE(idx) \\\n    (lans_env->shdl + (idx) - \\\n        ((!(LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_POS_Q_MASK)) && \\\n                ((idx) > LNS_IDX_POS_Q_CHAR))? (2) : (0)) - \\\n        ((!(LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_LN_CTNL_PT_MASK)) && \\\n                ((idx) > LNS_IDX_LN_CTNL_PT_CHAR))? (3) : (0)))\n\n// Get database attribute index\n #define LANS_IDX(hdl) \\\n    ((hdl - lans_env->shdl) + \\\n        ((!(LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_POS_Q_MASK)) && \\\n                ((hdl - lans_env->shdl) > LNS_IDX_POS_Q_CHAR)) ? (2) : (0)) + \\\n        ((!(LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_LN_CTNL_PT_MASK)) && \\\n                ((hdl - lans_env->shdl) > LNS_IDX_LN_CTNL_PT_CHAR)) ? (3) : (0)))\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the LANS task\nenum lans_state\n{\n    /// Idle state\n    LANS_IDLE,\n    /// Busy state\n    LANS_BUSY,\n\n    /// Number of defined states.\n    LANS_STATE_MAX\n};\n\n/// Location and Navigation Service - Attribute List\nenum lans_cps_att_list\n{\n    /// Location and Navigation Service\n    LNS_IDX_SVC,\n    /// LN Feature\n    LNS_IDX_LN_FEAT_CHAR,\n    LNS_IDX_LN_FEAT_VAL,\n    /// Location and Speed\n    LNS_IDX_LOC_SPEED_CHAR,\n    LNS_IDX_LOC_SPEED_VAL,\n    LNS_IDX_LOC_SPEED_NTF_CFG,\n    /// Position Quality\n    LNS_IDX_POS_Q_CHAR,\n    LNS_IDX_POS_Q_VAL,\n    /// LN Control Point\n    LNS_IDX_LN_CTNL_PT_CHAR,\n    LNS_IDX_LN_CTNL_PT_VAL,\n    LNS_IDX_LN_CTNL_PT_IND_CFG,\n    /// Navigation\n    LNS_IDX_NAVIGATION_CHAR,\n    LNS_IDX_NAVIGATION_VAL,\n    LNS_IDX_NAVIGATION_NTF_CFG,\n\n    /// Number of attributes\n    LNS_IDX_NB,\n};\n\n/// Profile Configuration\nenum lans_prf_cfg_flag\n{\n    /// Nothing supported\n    LANS_NOTHING_SUPP_FLAG  = (0x00),\n    /// Control Point supported flag\n    LANS_CTNL_PT_CHAR_SUPP_FLAG  = (0x01),\n    /// Broadcast supported flag\n    LANS_NAVIGATION_SUPP_FLAG    = (0x02),\n};\n\n\n/// Profile Configuration NTF/IND Flags ()\nenum lans_prf_cfg_ntfind_flag\n{\n    /// Location and Speed - Client Char. Cfg\n    LANS_PRF_CFG_FLAG_LOC_SPEED_NTF   = 0x01,\n\n    /// Control Point - Client Characteristic configuration\n    LANS_PRF_CFG_FLAG_LN_CTNL_PT_IND  = 0x02,\n\n    /// Navigation - Client Characteristic configuration\n    LANS_PRF_CFG_FLAG_NAVIGATION_NTF  = 0x04,\n\n    /// Bonded Data configured\n    LANS_PRF_CFG_PERFORMED_OK         = 0x80\n};\n\n\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n/// ongoing operation information\nstruct lans_op\n{\n    /// On-going operation command\n    struct ke_msg * cmd;\n    /// notification pending\n    struct gattc_send_evt_cmd* ntf_pending;\n\n    /// Cursor on connection\n    uint8_t cursor;\n};\n\n/// Location and Navigation environment variable per connection\nstruct lans_cnx_env\n{\n    /// Location an speed content mask\n    uint16_t mask_lspeed_content;\n    /// Profile Notify/Indication Flags\n    uint8_t prfl_ntf_ind_cfg;\n    /// LN Navigation Control parameter\n    uint8_t nav_ctrl;\n};\n\n\n/// Location and Navigation Profile Sensor environment variable\nstruct lans_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n\n    /// Environment variable pointer for each connections\n    struct lans_cnx_env env[BLE_CONNECTION_MAX];\n    /// Position quality\n    struct lanp_posq *posq;\n    /// On-going operation\n    struct lans_op * op_data;\n\n    /// Feature Configuration Flags\n    uint32_t features;\n\n    /// Location and Navigation Service Start Handle\n    uint16_t shdl;\n    /// Profile Configuration Flags\n    uint16_t prfl_cfg;\n    /// Operation\n    uint8_t operation;\n\n    /// State of different task instances\n    ke_state_t state[LANS_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Retrieve LAN service profile interface\n *\n * @return LAN service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* lans_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send a LANS_CMP_EVT message to the application.\n * @param[in] conidx connection index\n * @param[in] src_id Source task\n * @param[in] dest_id Destination task\n * @param[in] operation Operation completed\n * @param[in] status status of the operation\n ****************************************************************************************\n */\nvoid lans_send_cmp_evt(uint8_t conidx, uint8_t src_id, uint8_t dest_id, uint8_t operation, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Packs location and speed notifications\n * @param[in] param Pointer to the parameters of the message.\n * @param[out] pckd_loc_speed pointer to packed message\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t lans_pack_loc_speed_ntf(struct lanp_loc_speed *param, uint8_t *pckd_loc_speed);\n\n/**\n ****************************************************************************************\n * @brief Packs navigation notifications\n * @param[in] param Pointer to the parameters of the message.\n * @param[out] pckd_navigation pointer to packed message\n * @return length\n ****************************************************************************************\n */\nuint8_t lans_pack_navigation_ntf(struct lanp_navigation *param, uint8_t *pckd_navigation);\n\n/**\n ****************************************************************************************\n * @brief Splits notifications in order to be sent with default MTU\n * @param[in] conidx connection index\n * @param[in/out] loc_speed_ntf1 first notification\n * @return length\n ****************************************************************************************\n */\nuint8_t lans_split_loc_speed_ntf(uint8_t conidx, struct gattc_send_evt_cmd *loc_speed_ntf1);\n\n/**\n ****************************************************************************************\n * @brief updates the environment with the descriptor configuration and sends indication\n * @param[in] conidx connection index\n * @param[in] prfl_config requested value\n * @param[in] param pointer to the message parameters\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t lans_update_characteristic_config(uint8_t conidx, uint8_t prfl_config, struct gattc_write_req_ind const *param);\n\n/**\n ****************************************************************************************\n * @brief Packs position quality\n * @param[in] param Pointer to the parameters of the message.\n ****************************************************************************************\n */\nvoid lans_upd_posq(struct lanp_posq param);\n\n/**\n ****************************************************************************************\n * @brief Packs position quality\n * @param[out] pckd_posq pointer to packed message\n * @return length\n ****************************************************************************************\n */\nuint8_t lans_pack_posq(uint8_t *pckd_posq);\n\n/**\n ****************************************************************************************\n * @brief Packs control point\n * @param[in] conidx connection index\n * @param[in] param Pointer to the parameters of the message.\n * @param[out] rsp pointer to message\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t lans_pack_ln_ctnl_point_cfm (uint8_t conidx, struct lans_ln_ctnl_pt_cfm *param, uint8_t *rsp);\n\n/**\n ****************************************************************************************\n * @brief Unpack control point and sends indication\n * @param[in] conidx connection index\n * @param[in] param pointer to message\n * @return status of the operation\n ****************************************************************************************\n */\nuint8_t lans_unpack_ln_ctnl_point_ind (uint8_t conidx, struct gattc_write_req_ind const *param);\n\n/**\n ****************************************************************************************\n * @brief  This function fully manage notification of navigation and speed information\n ****************************************************************************************\n */\nvoid lans_exe_operation(void);\n\n/**\n ****************************************************************************************\n * @brief Send a control point response to the peer\n * @param[in] conidx connection index\n * @param[in] req_op_code operation code\n * @param[in] status status of the operation\n ****************************************************************************************\n */\nvoid lans_send_rsp_ind(uint8_t conidx, uint8_t req_op_code, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid lans_task_init(struct ke_task_desc *task_desc);\n\n#endif //(BLE_LN_SENSOR)\n\n/// @} LANS\n\n#endif //(_LANS_H_)\n"
  },
  {
    "path": "services/ble_profiles/lan/lans/src/lans_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup LANSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_LN_SENSOR)\n#include \"lan_common.h\"\n\n#include \"attm.h\"\n#include \"gapc.h\"\n#include \"gattc.h\"\n#include \"gattc_task.h\"\n#include \"lans.h\"\n#include \"lans_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_math.h\"\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANS_ENABLE_REQ message.\n * @param[in] msgid Id of the message received\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n\n__STATIC int lans_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct lans_enable_req *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == LANS_IDLE) {\n    // Bonded data was not used before\n    if (!LANS_IS_PRESENT(lans_env->env[param->conidx].prfl_ntf_ind_cfg,\n                         LANS_PRF_CFG_PERFORMED_OK)) {\n      status = GAP_ERR_NO_ERROR;\n      lans_env->env[param->conidx].prfl_ntf_ind_cfg = param->prfl_ntf_ind_cfg;\n    }\n    // Enable Bonded Data\n    LANS_ENABLE_NTF_IND(param->conidx, LANS_PRF_CFG_PERFORMED_OK);\n  }\n\n  // send completed information to APP task that contains error status\n  struct lans_enable_rsp *cmp_evt =\n      KE_MSG_ALLOC(LANS_ENABLE_RSP, src_id, dest_id, lans_enable_rsp);\n  cmp_evt->status = status;\n  cmp_evt->conidx = param->conidx;\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == LANS_IDLE) {\n    // Pointer to the response message\n    struct gattc_read_cfm *cfm = NULL;\n\n    // Get the address of the environment\n    struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n    uint8_t conidx = KE_IDX_GET(src_id);\n    uint8_t att_idx = LANS_IDX(param->handle);\n\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    switch (att_idx) {\n    case LNS_IDX_LN_FEAT_VAL: {\n      // Allocate structure\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint32_t));\n      cfm->length = sizeof(uint32_t);\n      // Fill data\n      co_write32p(cfm->value, lans_env->features);\n    } break;\n\n    case LNS_IDX_POS_Q_VAL: {\n      // Check if Position Quality Char. has been added in the database\n      if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_POS_Q_MASK)) {\n        // Allocate structure\n        cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                               sizeof(struct lanp_posq));\n        // Fill data\n        cfm->length = lans_pack_posq(cfm->value);\n      } else {\n        status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n      }\n\n    } break;\n\n    case LNS_IDX_LOC_SPEED_NTF_CFG: {\n      // allocate structure\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint16_t));\n      cfm->length = sizeof(uint16_t);\n      // Fill data\n      co_write16p(cfm->value, (lans_env->env[conidx].prfl_ntf_ind_cfg &\n                               LANS_PRF_CFG_FLAG_LOC_SPEED_NTF)\n                                  ? PRF_CLI_START_NTF\n                                  : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    case LNS_IDX_NAVIGATION_NTF_CFG: {\n      // Check if Navigation Char. has been added in the database\n      if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_NAVI_MASK)) {\n        // allocate structure\n        cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                               sizeof(uint16_t));\n        cfm->length = sizeof(uint16_t);\n        co_write16p(cfm->value, (lans_env->env[conidx].prfl_ntf_ind_cfg &\n                                 LANS_PRF_CFG_FLAG_NAVIGATION_NTF)\n                                    ? PRF_CLI_START_NTF\n                                    : PRF_CLI_STOP_NTFIND);\n      } else {\n        status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n      }\n    } break;\n\n    case LNS_IDX_LN_CTNL_PT_IND_CFG: {\n      // Check if LN control point has been added in the database\n      if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_LN_CTNL_PT_MASK)) {\n        // allocate structure\n        cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                               sizeof(uint16_t));\n        cfm->length = sizeof(uint16_t);\n        // Fill data\n        co_write16p(cfm->value, (lans_env->env[conidx].prfl_ntf_ind_cfg &\n                                 LANS_PRF_CFG_FLAG_LN_CTNL_PT_IND)\n                                    ? PRF_CLI_START_IND\n                                    : PRF_CLI_STOP_NTFIND);\n      } else {\n        status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n      }\n    } break;\n\n    default: {\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n\n    if (status != ATT_ERR_NO_ERROR) {\n      cfm = KE_MSG_ALLOC(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm);\n      cfm->length = 0;\n    }\n\n    cfm->handle = param->handle;\n    cfm->status = status;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_att_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_att_info_req_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == LANS_IDLE) {\n    // Get the address of the environment\n    struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n    uint8_t att_idx = LANS_IDX(param->handle);\n    struct gattc_att_info_cfm *cfm;\n\n    // Send write response\n    cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n    cfm->handle = param->handle;\n\n    // check if it's a client configuration char\n    if ((att_idx == LNS_IDX_LOC_SPEED_NTF_CFG) ||\n        (att_idx == LNS_IDX_NAVIGATION_NTF_CFG) ||\n        (att_idx == LNS_IDX_LN_CTNL_PT_IND_CFG)) {\n      // CCC attribute length = 2\n      cfm->length = 2;\n      cfm->status = GAP_ERR_NO_ERROR;\n    } else if (att_idx == LNS_IDX_LN_CTNL_PT_VAL) {\n      // force length to zero to reject any write starting from something != 0\n      cfm->length = 0;\n      cfm->status = GAP_ERR_NO_ERROR;\n    }\n    // not expected request\n    else {\n      cfm->length = 0;\n      cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANS_NTF_LN_MEAS_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lans_ntf_loc_speed_req_handler(\n    ke_msg_id_t const msgid, struct lans_ntf_loc_speed_req *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_NO_FREE;\n\n  // State shall be Connected or Busy\n  if (ke_state_get(dest_id) == LANS_IDLE) {\n    // Get the address of the environment\n    struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n    // Configure the environment\n    lans_env->operation = LANS_NTF_LOC_SPEED_OP_CODE;\n    // allocate operation data\n    lans_env->op_data =\n        (struct lans_op *)ke_malloc(sizeof(struct lans_op), KE_MEM_KE_MSG);\n    lans_env->op_data->cmd = ke_param2msg(param);\n    lans_env->op_data->cursor = 0;\n    lans_env->op_data->ntf_pending = NULL;\n\n    // Go to busy state\n    ke_state_set(dest_id, LANS_BUSY);\n\n    // start operation execution\n    lans_exe_operation();\n  } else {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANS_UPD_POS_Q_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lans_upd_pos_q_req_handler(ke_msg_id_t const msgid,\n                                        struct lans_upd_pos_q_req *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  // Allocate response message\n  struct lans_upd_pos_q_rsp *rsp =\n      KE_MSG_ALLOC(LANS_UPD_POS_Q_RSP, src_id, dest_id, lans_upd_pos_q_rsp);\n  rsp->status = PRF_ERR_FEATURE_NOT_SUPPORTED;\n\n  // Check if Position Quality Char. has been added in the database\n  if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_POS_Q_MASK)) {\n    if (lans_env->posq != NULL) {\n      // Update position quality\n      lans_upd_posq(param->parameters);\n      // Set status value\n      rsp->status = GAP_ERR_NO_ERROR;\n    } else {\n      // Set status value\n      rsp->status = PRF_APP_ERROR;\n    }\n  }\n\n  // Send response to the application\n  ke_msg_send(rsp);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANS_NTF_NAVIGATION_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lans_ntf_navigation_req_handler(\n    ke_msg_id_t const msgid, struct lans_ntf_navigation_req *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_NO_FREE;\n\n  // State shall be Connected or Busy\n  if (ke_state_get(dest_id) == LANS_IDLE) {\n    // Get the address of the environment\n    struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n    // Configure the environment\n    lans_env->operation = LANS_NTF_NAVIGATION_OP_CODE;\n    // allocate operation data\n    lans_env->op_data =\n        (struct lans_op *)ke_malloc(sizeof(struct lans_op), KE_MEM_KE_MSG);\n    lans_env->op_data->cmd = ke_param2msg(param);\n    lans_env->op_data->cursor = 0;\n    lans_env->op_data->ntf_pending = NULL;\n\n    // Go to busy state\n    ke_state_set(dest_id, LANS_BUSY);\n\n    // start operation execution\n    lans_exe_operation();\n  } else {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref LANS_LN_CTNL_PT_CFM message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int lans_ln_ctnl_pt_cfm_handler(ke_msg_id_t const msgid,\n                                         struct lans_ln_ctnl_pt_cfm *param,\n                                         ke_task_id_t const dest_id,\n                                         ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  if (ke_state_get(dest_id) == LANS_BUSY) {\n    do {\n      // Check the current operation\n      if (lans_env->operation < LANS_SET_CUMUL_VALUE_OP_CODE) {\n        // The confirmation has been sent without request indication, ignore\n        break;\n      }\n\n      // The LN Control Point Characteristic must be supported if we are here\n      if (!LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg,\n                                     LANS_LN_CTNL_PT_MASK)) {\n        status = PRF_ERR_REQ_DISALLOWED;\n        break;\n      }\n\n      // Check if sending of indications has been enabled\n      if (!LANS_IS_NTF_IND_ENABLED(param->conidx,\n                                   LANS_PRF_CFG_FLAG_LN_CTNL_PT_IND)) {\n        // CCC improperly configured\n        status = PRF_CCCD_IMPR_CONFIGURED;\n        break;\n      }\n\n      // Allocate the GATT notification message\n      struct gattc_send_evt_cmd *ctl_pt_rsp = KE_MSG_ALLOC_DYN(\n          GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, param->conidx), dest_id,\n          gattc_send_evt_cmd, LANP_LAN_LN_CNTL_PT_RSP_MAX_LEN);\n\n      // Fill in the parameter structure\n      ctl_pt_rsp->operation = GATTC_INDICATE;\n      ctl_pt_rsp->handle = LANS_HANDLE(LNS_IDX_LN_CTNL_PT_VAL);\n      // Pack Control Point confirmation\n      ctl_pt_rsp->length =\n          lans_pack_ln_ctnl_point_cfm(param->conidx, param, ctl_pt_rsp->value);\n\n      // Send the event\n      ke_msg_send(ctl_pt_rsp);\n\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      // Inform the application that a procedure has been completed\n      lans_send_cmp_evt(param->conidx,\n                        prf_src_task_get(&lans_env->prf_env, param->conidx),\n                        prf_dst_task_get(&lans_env->prf_env, param->conidx),\n                        lans_env->operation, status);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_WRITE_REQ_IND message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Control Point Status\n  uint8_t ctl_pt_status = LANP_LN_CTNL_PT_RESP_SUCCESS;\n\n  if (lans_env != NULL) {\n    // Location and speed Characteristic, Client Characteristic Configuration\n    // Descriptor\n    if (param->handle == (LANS_HANDLE(LNS_IDX_LOC_SPEED_NTF_CFG))) {\n      // Update value\n      status = lans_update_characteristic_config(\n          conidx, LANS_PRF_CFG_FLAG_LOC_SPEED_NTF, param);\n    }\n\n    // Navigation Characteristic, Client Characteristic Configuration Descriptor\n    else if (param->handle == (LANS_HANDLE(LNS_IDX_NAVIGATION_NTF_CFG))) {\n      if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_NAVI_MASK)) {\n        // Update value\n        status = lans_update_characteristic_config(\n            conidx, LANS_PRF_CFG_FLAG_NAVIGATION_NTF, param);\n      } else {\n        status = ATT_ERR_ATTRIBUTE_NOT_FOUND;\n      }\n    }\n    // LN Control Point Characteristic\n    else {\n      if (LANS_IS_FEATURE_SUPPORTED(lans_env->prfl_cfg, LANS_LN_CTNL_PT_MASK)) {\n        // LN Control Point, Client Characteristic Configuration Descriptor\n        if (param->handle == (LANS_HANDLE(LNS_IDX_LN_CTNL_PT_IND_CFG))) {\n          // Update value\n          status = lans_update_characteristic_config(\n              conidx, LANS_PRF_CFG_FLAG_LN_CTNL_PT_IND, param);\n        }\n        // LN Control Point Characteristic\n        else if (param->handle == (LANS_HANDLE(LNS_IDX_LN_CTNL_PT_VAL))) {\n          do {\n            // Check if sending of indications has been enabled\n            if (!LANS_IS_NTF_IND_ENABLED(conidx,\n                                         LANS_PRF_CFG_FLAG_LN_CTNL_PT_IND)) {\n              // CCC improperly configured\n              status = PRF_CCCD_IMPR_CONFIGURED;\n              break;\n            }\n\n            if (lans_env->operation >= LANS_SET_CUMUL_VALUE_OP_CODE) {\n              // A procedure is already in progress\n              status = LAN_ERROR_PROC_IN_PROGRESS;\n              break;\n            }\n\n            if (lans_env->operation == LANS_NTF_LOC_SPEED_OP_CODE) {\n              // Keep the message until the end of the current procedure\n              msg_status = KE_MSG_SAVED;\n              break;\n            }\n\n            // Unpack Control Point parameters\n            ctl_pt_status = lans_unpack_ln_ctnl_point_ind(conidx, param);\n\n          } while (0);\n        } else {\n          ASSERT_ERR(0);\n        }\n      } else {\n        status = ATT_ERR_ATTRIBUTE_NOT_FOUND;\n      }\n    }\n  }\n\n  // Send write response\n  struct gattc_write_cfm *cfm =\n      KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n  cfm->handle = param->handle;\n  cfm->status = status;\n  ke_msg_send(cfm);\n\n  // Check if control point failed\n  if ((param->handle == (LANS_HANDLE(LNS_IDX_LN_CTNL_PT_VAL))) &&\n      (ctl_pt_status != LANP_LN_CTNL_PT_RESP_SUCCESS)) {\n    // Send response to peer\n    lans_send_rsp_ind(conidx, param->value[0], ctl_pt_status);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATT_NOTIFY_CMP_EVT message meaning that a notification\n *or an indication has been correctly sent to peer device (but not confirmed by\n *peer device).\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n  // Check if a connection exists\n  if (ke_state_get(dest_id) == LANS_BUSY) {\n    switch (param->operation) {\n    case (GATTC_NOTIFY): {\n      lans_exe_operation();\n      // else ignore the message\n    } break;\n\n    case (GATTC_INDICATE): {\n      ASSERT_ERR(lans_env->operation >= LANS_SET_CUMUL_VALUE_OP_CODE);\n\n      // Inform the application that a procedure has been completed\n      lans_send_cmp_evt(conidx, prf_src_task_get(&(lans_env->prf_env), conidx),\n                        prf_dst_task_get(&(lans_env->prf_env), conidx),\n                        lans_env->operation, param->status);\n      // else ignore the message\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(lans){\n    {LANS_ENABLE_REQ, (ke_msg_func_t)lans_enable_req_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {LANS_NTF_LOC_SPEED_REQ, (ke_msg_func_t)lans_ntf_loc_speed_req_handler},\n    {LANS_UPD_POS_Q_REQ, (ke_msg_func_t)lans_upd_pos_q_req_handler},\n    {LANS_NTF_NAVIGATION_REQ, (ke_msg_func_t)lans_ntf_navigation_req_handler},\n    {LANS_LN_CTNL_PT_CFM, (ke_msg_func_t)lans_ln_ctnl_pt_cfm_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid lans_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct lans_env_tag *lans_env = PRF_ENV_GET(LANS, lans);\n\n  task_desc->msg_handler_tab = lans_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(lans_msg_handler_tab);\n  task_desc->state = lans_env->state;\n  task_desc->idx_max = LANS_IDX_MAX;\n}\n\n#endif //(BLE_LN_SENSOR)\n\n/// @} LANSTASK\n"
  },
  {
    "path": "services/ble_profiles/ota/ota.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_OTA)\n#include \"attm.h\"\n#include \"co_utils.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"ke_mem.h\"\n#include \"ota.h\"\n#include \"ota_bes.h\"\n#include \"ota_task.h\"\n#include \"prf_utils.h\"\n#ifdef __GATT_OVER_BR_EDR__\n#include \"app_btgatt.h\"\n#endif\n\n/*\n * OTA CMD PROFILE ATTRIBUTES\n ****************************************************************************************\n */\n\nstatic const uint8_t OTA_SERVICE_UUID_128[ATT_UUID_128_LEN] = BES_OTA_UUID_128;\n\n#define RD_PERM PERM(RD, ENABLE)\n#define VAL_PERM PERM(WRITE_REQ, ENABLE) | PERM(NTF, ENABLE)\n#define NTF_CFG_PERM PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE)\n\n/// Full OTA SERVER Database Description - Used to add attributes into the\n/// database\nconst struct attm_desc_128 ota_att_db[OTA_IDX_NB] = {\n    // OTA Service Declaration\n    [OTA_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE_UUID, RD_PERM, 0, 0},\n    // OTA Characteristic Declaration\n    [OTA_IDX_CHAR] = {ATT_DECL_CHARACTERISTIC_UUID, RD_PERM, 0, 0},\n    // OTA service\n    [OTA_IDX_VAL] = {ota_val_char_val_uuid_128_content, VAL_PERM,\n                     PERM(RI, ENABLE) | PERM_VAL(UUID_LEN, PERM_UUID_128),\n                     OTA_MAX_LEN},\n    // OTA Characteristic\n    [OTA_IDX_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG_UUID, NTF_CFG_PERM, 0, 0},\n\n};\n\n/**\n ****************************************************************************************\n * @brief Initialization of the OTA module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t ota_init(struct prf_task_env *env, uint16_t *start_hdl,\n                        uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t status;\n\n  // Add Service Into Database\n  status = attm_svc_create_db_128(\n      start_hdl, OTA_SERVICE_UUID_128, NULL, OTA_IDX_NB, NULL, env->task,\n      &ota_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE) | PERM_VAL(SVC_UUID_LEN, PERM_UUID_128));\n\n  BLE_GATT_DBG(\"attm_svc_create_db_128 returns %d start handle is %d\", status,\n               *start_hdl);\n\n#ifdef __GATT_OVER_BR_EDR__\n  app_btgatt_addsdp(ATT_SERVICE_UUID, *start_hdl, *start_hdl + OTA_IDX_NB - 1);\n#endif\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate OTA required environment variable\n    struct ota_env_tag *ota_env = (struct ota_env_tag *)ke_malloc(\n        sizeof(struct ota_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize OTA environment\n    env->env = (prf_env_t *)ota_env;\n    ota_env->shdl = *start_hdl;\n\n    ota_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Mono Instantiated task\n    ota_env->prf_env.prf_task =\n        env->task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                               : PERM(PRF_MI, DISABLE));\n\n    // initialize environment variable\n    env->id = TASK_ID_OTA;\n    ota_task_init(&(env->desc));\n\n    /* Put HRS in Idle state */\n    ke_state_set(env->task, OTA_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the OTA module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void ota_destroy(struct prf_task_env *env) {\n  struct ota_env_tag *ota_env = (struct ota_env_tag *)env->env;\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(ota_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void ota_create(struct prf_task_env *env, uint8_t conidx) {\n  struct ota_env_tag *ota_env = (struct ota_env_tag *)env->env;\n  struct prf_svc ota_ota_svc = {ota_env->shdl, ota_env->shdl + OTA_IDX_NB};\n  prf_register_atthdl2gatt(env->env, conidx, &ota_ota_svc);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void ota_cleanup(struct prf_task_env *env, uint8_t conidx,\n                        uint8_t reason) {\n  /* Nothing to do */\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// OTA Task interface required by profile manager\nconst struct prf_task_cbs ota_itf = {\n    (prf_init_fnct)ota_init,\n    ota_destroy,\n    ota_create,\n    ota_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *ota_prf_itf_get(void) { return &ota_itf; }\n\n#endif /* BLE_OTA */\n\n/// @} OTA\n"
  },
  {
    "path": "services/ble_profiles/ota/ota.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef _OTA_H_\n#define _OTA_H_\n\n/**\n ****************************************************************************************\n * @addtogroup OTA Datapath Profile Server\n * @ingroup OTAP\n * @brief Datapath Profile Server\n *\n * Datapath Profile Server provides functionalities to upper layer module\n * application. The device using this profile takes the role of Datapath Server.\n *\n * The interface of this role to the Application is:\n *  - Enable the profile role (from APP)\n *  - Disable the profile role (from APP)\n *  - Send data to peer device via notifications  (from APP)\n *  - Receive data from peer device via write no response (from APP)\n *\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_OTA)\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"ota_task.h\"\n#include \"attm.h\"\n#include \"prf_utils.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n#define OTA_MAX_LEN            \t\t\t(509)\t\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Possible states of the OTA task\nenum\n{\n    /// Idle state\n    OTA_IDLE,\n    /// Connected state\n    OTA_BUSY,\n\n    /// Number of defined states.\n    OTA_STATE_MAX,\n};\n\n///Attributes State Machine\nenum\n{\n    OTA_IDX_SVC,\n\n    OTA_IDX_CHAR,\n    OTA_IDX_VAL,\n    OTA_IDX_NTF_CFG,\n\n    OTA_IDX_NB,\n};\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Datapath Profile Server environment variable\nstruct ota_env_tag\n{\n    /// profile environment\n    prf_env_t \tprf_env;\n\tuint8_t\t\tisNotificationEnabled[BLE_CONNECTION_MAX];\n    /// Service Start Handle\n    uint16_t \tshdl;\n    /// State of different task instances\n    ke_state_t \tstate;\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve HRP service profile interface\n *\n * @return HRP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* ota_prf_itf_get(void);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid ota_task_init(struct ke_task_desc *task_desc);\n\n\n\n#endif /* #if (BLE_OTA) */\n\n/// @} OTA\n\n#endif /* _OTA_H_ */\n\n"
  },
  {
    "path": "services/ble_profiles/ota/ota_task.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup OTATASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_OTA)\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"ota.h\"\n#include \"ota_task.h\"\n\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\nstatic int gapc_disconnect_ind_handler(ke_msg_id_t const msgid,\n                                       struct gapc_disconnect_ind const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n  ota_env->isNotificationEnabled[conidx] = false;\n  return KE_MSG_CONSUMED;\n}\n\nvoid app_ota_send_rx_cfm(uint8_t conidx) {\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n\n  struct gattc_write_cfm *cfm = KE_MSG_ALLOC(\n      GATTC_WRITE_CFM, KE_BUILD_ID(TASK_GATTC, conidx),\n      prf_src_task_get(&ota_env->prf_env, conidx), gattc_write_cfm);\n  cfm->handle = ota_env->shdl + OTA_IDX_VAL;\n  cfm->status = GAP_ERR_NO_ERROR;\n  ke_msg_send(cfm);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GL2C_CODE_ATT_WR_CMD_IND message.\n * The handler compares the new values with current ones and notifies them if\n *they changed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  BLE_GATT_DBG(\n      \"gattc_write_req_ind_handler ota_env 0x%x write handle %d shdl %d\",\n      ota_env, param->handle, ota_env->shdl);\n\n#if 0 // reply write-response so fast which results in rx queue oveflow\n      // Send write response\n    struct gattc_write_cfm *cfm = KE_MSG_ALLOC(\n            GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n    cfm->handle = param->handle;\n    cfm->status = status;\n    ke_msg_send(cfm);\n#endif\n\n  if (ota_env != NULL) {\n    if (param->handle == (ota_env->shdl + OTA_IDX_NTF_CFG)) {\n      uint16_t value = 0x0000;\n      struct gattc_write_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n      cfm->handle = param->handle;\n      cfm->status = status;\n      ke_msg_send(cfm);\n\n      // Extract value before check\n      memcpy(&value, &(param->value), sizeof(uint16_t));\n\n      if (value == PRF_CLI_STOP_NTFIND) {\n        ota_env->isNotificationEnabled[conidx] = false;\n      } else if (value == PRF_CLI_START_NTF) {\n        ota_env->isNotificationEnabled[conidx] = true;\n      } else {\n        status = PRF_APP_ERROR;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Inform APP of TX ccc change\n        struct ble_ota_tx_notif_config_t *ind = KE_MSG_ALLOC(\n            OTA_CCC_CHANGED, prf_dst_task_get(&ota_env->prf_env, conidx),\n            prf_src_task_get(&ota_env->prf_env, conidx),\n            ble_ota_tx_notif_config_t);\n\n        ind->isNotificationEnabled = ota_env->isNotificationEnabled[conidx];\n\n        ke_msg_send(ind);\n      }\n    } else if (param->handle == (ota_env->shdl + OTA_IDX_VAL)) {\n      TRACE(1, \"[OTA] ble cmd  %x\", param->value[0]);\n      // inform APP of data\n      struct ble_ota_rx_data_ind_t *ind = KE_MSG_ALLOC_DYN(\n          OTA_DATA_RECEIVED, prf_dst_task_get(&ota_env->prf_env, conidx),\n          prf_src_task_get(&ota_env->prf_env, conidx), ble_ota_rx_data_ind_t,\n          sizeof(struct ble_ota_rx_data_ind_t) + param->length);\n\n      ind->length = param->length;\n      memcpy((uint8_t *)(ind->data), &(param->value), param->length);\n\n      ke_msg_send(ind);\n\n      return KE_MSG_CONSUMED;\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY message meaning that\n *Measurement notification has been correctly sent to peer device (but not\n *confirmed by peer device).\n * *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // notification or write request has been sent out\n  if ((GATTC_NOTIFY == param->operation) ||\n      (GATTC_INDICATE == param->operation)) {\n\n    struct ble_ota_tx_sent_ind_t *ind = KE_MSG_ALLOC(\n        OTA_TX_DATA_SENT, prf_dst_task_get(&ota_env->prf_env, conidx),\n        prf_src_task_get(&ota_env->prf_env, conidx), ble_ota_tx_sent_ind_t);\n\n    ind->status = param->status;\n\n    ke_msg_send(ind);\n  }\n\n  ke_state_set(dest_id, OTA_IDLE);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n\n  struct gattc_read_cfm *cfm;\n\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  BLE_GATT_DBG(\"gattc_read_req_ind_handler read handle %d shdl %d\",\n               param->handle, ota_env->shdl);\n\n  if (param->handle == (ota_env->shdl + OTA_IDX_NTF_CFG)) {\n    uint16_t notify_ccc;\n    cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                           sizeof(notify_ccc));\n\n    if (ota_env->isNotificationEnabled[conidx]) {\n      notify_ccc = 1;\n    } else {\n      notify_ccc = 0;\n    }\n    cfm->length = sizeof(notify_ccc);\n    memcpy(cfm->value, (uint8_t *)¬ify_ccc, cfm->length);\n  } else {\n    cfm = KE_MSG_ALLOC(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm);\n    cfm->length = 0;\n    status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n  }\n\n  cfm->handle = param->handle;\n\n  cfm->status = status;\n\n  ke_msg_send(cfm);\n\n  ke_state_set(dest_id, OTA_IDLE);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic void send_notifiction(uint8_t conidx, const uint8_t *ptrData,\n                             uint32_t length) {\n  uint16_t handle_offset = 0xFFFF;\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n\n  if (ota_env->isNotificationEnabled[conidx]) {\n    handle_offset = OTA_IDX_VAL;\n  }\n\n  TRACE(1, \"Send ota notificationto handle offset %d:\", handle_offset);\n  DUMP8(\"%02x \", ptrData, length);\n\n  if (0xFFFF != handle_offset) {\n    // Allocate the GATT notification message\n    struct gattc_send_evt_cmd *report_ntf =\n        KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         prf_src_task_get(&ota_env->prf_env, conidx),\n                         gattc_send_evt_cmd, length);\n\n    // Fill in the parameter structure\n    report_ntf->operation = GATTC_NOTIFY;\n    report_ntf->handle = ota_env->shdl + handle_offset;\n    // pack measured value in database\n    report_ntf->length = length;\n    memcpy(report_ntf->value, ptrData, length);\n    // send notification to peer device\n    ke_msg_send(report_ntf);\n  }\n}\n\nstatic void send_indication(uint8_t conidx, const uint8_t *ptrData,\n                            uint32_t length) {\n  uint16_t handle_offset = 0xFFFF;\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n\n  if (ota_env->isNotificationEnabled[conidx]) {\n    handle_offset = OTA_IDX_VAL;\n  }\n\n  if (0xFFFF != handle_offset) {\n    // Allocate the GATT notification message\n    struct gattc_send_evt_cmd *report_ntf =\n        KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         prf_src_task_get(&ota_env->prf_env, conidx),\n                         gattc_send_evt_cmd, length);\n\n    // Fill in the parameter structure\n    report_ntf->operation = GATTC_INDICATE;\n    report_ntf->handle = ota_env->shdl + handle_offset;\n    // pack measured value in database\n    report_ntf->length = length;\n    memcpy(report_ntf->value, ptrData, length);\n    // send notification to peer device\n    ke_msg_send(report_ntf);\n  }\n}\n\n__STATIC int send_notification_handler(\n    ke_msg_id_t const msgid, struct ble_ota_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_notifiction(param->connecionIndex, param->value, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int\nsend_indication_handler(ke_msg_id_t const msgid,\n                        struct ble_ota_send_data_req_t const *param,\n                        ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_indication(param->connecionIndex, param->value, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_att_info_req_ind_handler(ke_msg_id_t const msgid,\n                                          struct gattc_att_info_req_ind *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct gattc_att_info_cfm *cfm;\n\n  // Send write response\n  cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n  cfm->handle = param->handle;\n\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n\n  if (param->handle == (ota_env->shdl + OTA_IDX_NTF_CFG)) {\n    // CCC attribute length = 2\n    cfm->length = 2;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle == (ota_env->shdl + OTA_IDX_VAL)) {\n    // force length to zero to reject any write starting from something != 0\n    cfm->length = 0;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else {\n    cfm->length = 0;\n    cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n  }\n\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/* Default State handlers definition. */\nKE_MSG_HANDLER_TAB(ota){\n    {GAPC_DISCONNECT_IND, (ke_msg_func_t)gapc_disconnect_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {OTA_SEND_NOTIFICATION, (ke_msg_func_t)send_notification_handler},\n    {OTA_SEND_INDICATION, (ke_msg_func_t)send_indication_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n};\n\nvoid ota_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct ota_env_tag *ota_env = PRF_ENV_GET(OTA, ota);\n\n  task_desc->msg_handler_tab = ota_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(ota_msg_handler_tab);\n  task_desc->state = &(ota_env->state);\n  task_desc->idx_max = BLE_CONNECTION_MAX;\n}\n\n#endif /* #if (BLE_OTA) */\n\n/// @} OTATASK\n"
  },
  {
    "path": "services/ble_profiles/ota/ota_task.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n\n#ifndef _OTA_TASK_H_\n#define _OTA_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup OTATASK Task\n * @ingroup OTA\n * @brief OTA Profile Task.\n *\n * The OTATASK is responsible for handling the messages coming in and out of the\n * @ref OTA collector block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n#define OTA_CONTENT_TYPE_COMMAND\t\t0 \n#define OTA_CONTENT_TYPE_DATA\t\t1\n\n/// Messages for OTA Profile \nenum ota_msg_id\n{\n\tOTA_CCC_CHANGED = TASK_FIRST_MSG(TASK_ID_OTA),\n\n\tOTA_TX_DATA_SENT,\n\t\n\tOTA_DATA_RECEIVED,\n\n\tOTA_SEND_NOTIFICATION,\n\n\tOTA_SEND_INDICATION,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\nstruct ble_ota_tx_notif_config_t\n{\n\tbool \t\tisNotificationEnabled;\n};\n\nstruct ble_ota_rx_data_ind_t\n{\n\tuint16_t\tlength;\n\tuint8_t\t\tdata[0];\n};\n\nstruct ble_ota_tx_sent_ind_t\n{\n\tuint8_t \tstatus;\n};\n\nstruct ble_ota_send_data_req_t\n{\n\tuint8_t \tconnecionIndex;\n\tuint32_t \tlength;\n\tuint8_t  \tvalue[__ARRAY_EMPTY];\n};\n\n\n/// @} OTATASK\n\n#endif /* _OTA_TASK_H_ */\n\n"
  },
  {
    "path": "services/ble_profiles/pasp/pasp_common.h",
    "content": "#ifndef _PASP_COMMON_H_\n#define _PASP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PASP Phone Alert Status Profile\n * @ingroup PROFILE\n * @brief Phone Alert Status Profile\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Alert Status Flags\n#define PASP_RINGER_ACTIVE              (0x01)\n#define PASP_VIBRATE_ACTIVE             (0x02)\n#define PASP_DISP_ALERT_STATUS_ACTIVE   (0x04)\n#define PASP_ALERT_STATUS_VAL_MAX       (0x07)\n\n/// Ringer Settings Keys\n#define PASP_RINGER_SILENT              (0)\n#define PASP_RINGER_NORMAL              (1)\n\n/// Ringer Control Point Keys\n#define PASP_SILENT_MODE                (1)\n#define PASP_MUTE_ONCE                  (2)\n#define PASP_CANCEL_SILENT_MODE         (3)\n\n\n/// @} pasp_common\n\n#endif //(_HTP_COMMON_H_)\n"
  },
  {
    "path": "services/ble_profiles/pasp/paspc/api/paspc_task.h",
    "content": "#ifndef _PASPC_TASK_H_\n#define _PASPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PASPCTASK Phone Alert Status Profile Client Task\n * @ingroup PASPC\n * @brief Phone Alert Status Profile Client Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"pasp_common.h\"\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Message IDs\nenum paspc_msg_ids\n{\n    /// Enable the Phone Alert Status Profile Client task - at connection\n    PASPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_PASPC),\n    /// Enable the Phone Alert Status Profile Client task - at connection\n    PASPC_ENABLE_RSP,\n\n    /// Read the value of an attribute in the peer device database\n    PASPC_READ_CMD,\n    /// Write the value of an attribute in the peer device database\n    PASPC_WRITE_CMD,\n\n    /// Indicate that an attribute value has been received either upon notification or read response\n    PASPC_VALUE_IND,\n\n    /// Complete Event Information\n    PASPC_CMP_EVT,\n};\n\n/// Operation Codes\nenum paspc_op_codes\n{\n    /// Reserved operation code\n    PASPC_RESERVED_OP_CODE  = 0x00,\n\n    /// Discovery Procedure\n    PASPC_ENABLE_OP_CODE,\n    /// Read attribute value Procedure\n    PASPC_READ_OP_CODE,\n    /// Write attribute value Procedure\n    PASPC_WRITE_OP_CODE,\n};\n\n/*\n * API MESSAGE STRUCTURES\n ****************************************************************************************\n */\n\n/// Phone Alert Status Service Characteristics\nenum\n{\n    /// Alert Status\n    PASPC_CHAR_ALERT_STATUS,\n    /// Ringer Setting\n    PASPC_CHAR_RINGER_SETTING,\n    /// Ringer Control Point\n    PASPC_CHAR_RINGER_CTNL_PT,\n\n    PASPC_CHAR_MAX,\n};\n\n/// Phone Alert Status Service Characteristic Descriptors\nenum\n{\n    /// Alert Status Char. - Client Characteristic Configuration\n    PASPC_DESC_ALERT_STATUS_CL_CFG,\n    /// Ringer Setting Char. - Client Characteristic Configuration\n    PASPC_DESC_RINGER_SETTING_CL_CFG,\n\n    PASPC_DESC_MAX,\n\n    PASPC_DESC_MASK = 0x10,\n};\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Phone Alert Status Service\n */\nstruct paspc_pass_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - Alert Status\n    ///  - Ringer Setting\n    ///  - Ringer Control Point\n    struct prf_char_inf chars[PASPC_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - Alert Status Client Cfg\n    ///  - Ringer Setting Client Cfg\n    struct prf_char_desc_inf descs[PASPC_DESC_MAX];\n};\n\n\n/// Parameters of the @ref PASPC_ENABLE_REQ message\nstruct paspc_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n    /// Existing handle values PASS\n    struct paspc_pass_content pass;\n};\n\n/// Parameters of the @ref PASPC_ENABLE_RSP message\nstruct paspc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values PASS\n    struct paspc_pass_content pass;\n};\n\n/// Parameters of the @ref PASPC_READ_CMD message\nstruct paspc_read_cmd\n{\n    /// Read code\n    uint8_t read_code;\n};\n\n/// Parameters of the @ref PASPC_WRITE_CMD message\nstruct paspc_write_cmd\n{\n    /// Write code\n    uint8_t write_code;\n    /// Value\n    union write_value_tag\n    {\n        /// Ringer Control Point characteristic value\n        uint8_t ringer_ctnl_pt;\n        /// Alert Status characteristic client characteristic configuration value\n        uint16_t alert_status_ntf_cfg;\n        /// Ringer Setting characteristic client characteristic configuration value\n        uint16_t ringer_setting_ntf_cfg;\n    } value;\n};\n\n/// Parameters of the @ref PASPC_VALUE_IND message\nstruct paspc_value_ind\n{\n    /// Attribute Code\n    uint8_t att_code;\n    /// Value\n    union value_tag\n    {\n        /// Alert Status characteristic value\n        uint8_t alert_status;\n        /// Ringer Setting characteristic value\n        uint8_t ringer_setting;\n        /// Alert Status characteristic client characteristic configuration value\n        uint16_t alert_status_ntf_cfg;\n        /// Ringer Setting characteristic client characteristic configuration value\n        uint16_t ringer_setting_ntf_cfg;\n    } value;\n};\n\n/// Parameters of the @ref PASPC_CMP_EVT message\nstruct paspc_cmp_evt\n{\n    /// Operation code\n    uint8_t operation;\n    /// Status\n    uint8_t status;\n};\n\n\n/// @} PASPCTASK\n\n#endif //(_PASPC_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/pasp/paspc/src/paspc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PASPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_PAS_CLIENT)\n#include \"pasp_common.h\"\n\n#include \"paspc.h\"\n#include \"paspc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the PASPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t paspc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct paspc_env_tag *paspc_env = (struct paspc_env_tag *)ke_malloc(\n      sizeof(struct paspc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate PASPC required environment variable\n  env->env = (prf_env_t *)paspc_env;\n\n  paspc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  paspc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_PASPC;\n  paspc_task_init(&(env->desc));\n\n  for (idx = 0; idx < PASPC_IDX_MAX; idx++) {\n    paspc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), PASPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void paspc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct paspc_env_tag *paspc_env = (struct paspc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (paspc_env->env[conidx] != NULL) {\n    ke_free(paspc_env->env[conidx]);\n    paspc_env->env[conidx] = NULL;\n  }\n\n  /* Put PASP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), PASPC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the PASPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void paspc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct paspc_env_tag *paspc_env = (struct paspc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < PASPC_IDX_MAX; idx++) {\n    paspc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(paspc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void paspc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put PASP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), PASPC_IDLE);\n}\n\n/// PASPC Task interface required by profile manager\nconst struct prf_task_cbs paspc_itf = {\n    paspc_init,\n    paspc_destroy,\n    paspc_create,\n    paspc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *paspc_prf_itf_get(void) { return &paspc_itf; }\n\nvoid paspc_enable_rsp_send(struct paspc_env_tag *paspc_env, uint8_t conidx,\n                           uint8_t status) {\n  // Send to APP the details of the discovered attributes on PASPS\n  struct paspc_enable_rsp *rsp = KE_MSG_ALLOC(\n      PASPC_ENABLE_RSP, prf_dst_task_get(&(paspc_env->prf_env), conidx),\n      prf_src_task_get(&(paspc_env->prf_env), conidx), paspc_enable_rsp);\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->pass = paspc_env->env[conidx]->pass;\n    // Register PASPC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(paspc_env->prf_env), conidx,\n                             &(paspc_env->env[conidx]->pass.svc));\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(paspc_env->prf_env), conidx), PASPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nvoid paspc_send_cmp_evt(struct paspc_env_tag *paspc_env, uint8_t conidx,\n                        uint8_t operation, uint8_t status) {\n  // Go back to the CONNECTED state if the state is busy\n  if (ke_state_get(prf_src_task_get(&(paspc_env->prf_env), conidx)) ==\n      PASPC_BUSY) {\n    ke_state_set(prf_src_task_get(&paspc_env->prf_env, conidx), PASPC_IDLE);\n  }\n\n  // Send the message\n  struct paspc_cmp_evt *evt = KE_MSG_ALLOC(\n      PASPC_CMP_EVT, prf_dst_task_get(&(paspc_env->prf_env), conidx),\n      prf_src_task_get(&(paspc_env->prf_env), conidx), paspc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\n#endif //(BLE_PAS_CLIENT)\n\n/// @} PASPC\n"
  },
  {
    "path": "services/ble_profiles/pasp/paspc/src/paspc.h",
    "content": "#ifndef _PASPC_H_\n#define _PASPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PASPC Phone Alert Status Profile Client\n * @ingroup PASP\n * @brief Phone Alert Status Profile Client\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_PAS_CLIENT)\n#include \"pasp_common.h\"\n#include \"paspc_task.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of Phone Alert Status Client task instances\n#define PASPC_IDX_MAX        (BLE_CONNECTION_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the PASPC task\nenum paspc_states\n{\n    /// Idle state\n    PASPC_FREE,\n    /// Connected state\n    PASPC_IDLE,\n    /// Busy state\n    PASPC_DISCOVERING,\n    /// Busy state\n    PASPC_BUSY,\n\n    /// Number of defined states.\n    PASPC_STATE_MAX\n};\n\n\n/// Internal codes for reading/writing a PAS characteristic with one single request\nenum\n{\n    /// Read PAS Alert Status\n    PASPC_RD_ALERT_STATUS              = PASPC_CHAR_ALERT_STATUS,\n    /// Read PAS Ringer Setting\n    PASPC_RD_RINGER_SETTING            = PASPC_CHAR_RINGER_SETTING,\n    /// Write PAS Ringer Control Point\n    PASPC_WR_RINGER_CTNL_PT            = PASPC_CHAR_RINGER_CTNL_PT,\n\n    /// Read/Write PAS Alert Status Client Characteristic Configuration Descriptor\n    PASPC_RD_WR_ALERT_STATUS_CFG       = (PASPC_DESC_ALERT_STATUS_CL_CFG | PASPC_DESC_MASK),\n    /// Read PAS Ringer Setting Client Characteristic Configuration Descriptor\n    PASPC_RD_WR_RINGER_SETTING_CFG     = (PASPC_DESC_RINGER_SETTING_CL_CFG | PASPC_DESC_MASK),\n};\n\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n\nstruct paspc_cnx_env\n{\n    /// Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// Last characteristic code used in a read or a write request\n    uint16_t last_char_code;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// Current operation code\n    uint8_t operation;\n    /// Phone Alert Status Service Characteristics\n    struct paspc_pass_content pass;\n};\n\n/// Phone Alert Status Profile Client environment variable\nstruct paspc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct paspc_cnx_env* env[PASPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[PASPC_IDX_MAX];\n};\n\n/*\n * GLOBAL FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve PASP client profile interface\n * @return PASP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* paspc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Phone Alert Status ATT DB discovery results to PASPC host.\n * @param[in] paspc_env environment variable\n * @param[in] conidx Connection index\n * @param[in] status Satus\n ****************************************************************************************\n */\nvoid paspc_enable_rsp_send(struct paspc_env_tag *paspc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send a PASPC_CMP_EVT message to the task which enabled the profile\n ****************************************************************************************\n */\nvoid paspc_send_cmp_evt(struct paspc_env_tag *paspc_env, uint8_t conidx,\n                        uint8_t operation, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid paspc_task_init(struct ke_task_desc *task_desc);\n\n#endif //(BLE_PAS_CLIENT)\n\n/// @} PASPC\n\n#endif //(_PASPC_H_)\n"
  },
  {
    "path": "services/ble_profiles/pasp/paspc/src/paspc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PASPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_PAS_CLIENT)\n#include \"pasp_common.h\"\n#include \"paspc.h\"\n#include \"paspc_task.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Phone Alert Status service characteristics\n/// information\nconst struct prf_char_def paspc_pass_char[PASPC_CHAR_MAX] = {\n    /// Alert Status\n    [PASPC_CHAR_ALERT_STATUS] = {ATT_CHAR_ALERT_STATUS, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_RD | ATT_CHAR_PROP_NTF},\n    /// Ringer Setting\n    [PASPC_CHAR_RINGER_SETTING] = {ATT_CHAR_RINGER_SETTING, ATT_MANDATORY,\n                                   ATT_CHAR_PROP_RD | ATT_CHAR_PROP_NTF},\n    /// Ringer Control Point\n    [PASPC_CHAR_RINGER_CTNL_PT] = {ATT_CHAR_RINGER_CNTL_POINT, ATT_MANDATORY,\n                                   ATT_CHAR_PROP_WR_NO_RESP},\n};\n\n/// State machine used to retrieve Phone Alert Status service characteristic\n/// descriptor information\nconst struct prf_char_desc_def paspc_pass_char_desc[PASPC_DESC_MAX] = {\n    /// Alert Status Client Characteristic Configuration\n    [PASPC_DESC_ALERT_STATUS_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                        PASPC_CHAR_ALERT_STATUS},\n    /// Ringer Setting Client Characteristic Configuration\n    [PASPC_DESC_RINGER_SETTING_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                          ATT_MANDATORY,\n                                          PASPC_CHAR_RINGER_SETTING},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref PASPC_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int paspc_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct paspc_enable_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Phone Alert Status Profile Client Role Task Environment\n  struct paspc_env_tag *paspc_env = PRF_ENV_GET(PASPC, paspc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t state = ke_state_get(dest_id);\n\n  if ((state == PASPC_IDLE) && (paspc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    paspc_env->env[conidx] = (struct paspc_cnx_env *)ke_malloc(\n        sizeof(struct paspc_cnx_env), KE_MEM_ATT_DB);\n    memset(paspc_env->env[conidx], 0, sizeof(struct paspc_cnx_env));\n\n    paspc_env->env[conidx]->operation = PASPC_ENABLE_OP_CODE;\n\n    // Start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      prf_disc_svc_send(&(paspc_env->prf_env), conidx,\n                        ATT_SVC_PHONE_ALERT_STATUS);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, PASPC_DISCOVERING);\n\n      // Configure the environment for a discovery procedure\n      paspc_env->env[conidx]->last_uuid_req = ATT_SVC_PHONE_ALERT_STATUS;\n    }\n    // Bond information is provided\n    else {\n      // Keep the provided database content\n      memcpy(&paspc_env->env[conidx]->pass, ¶m->pass,\n             sizeof(struct paspc_pass_content));\n\n      // send APP confirmation that can start normal connection to TH\n      paspc_enable_rsp_send(paspc_env, conidx, GAP_ERR_NO_ERROR);\n\n      /* --------------------------------------------------------------------------------\n       * After connection establishment, once the discovery procedure is\n       * successful, the client shall read the Alert Status\n       *  --------------------------------------------------------------------------------\n       */\n      // Configure the environment for a read procedure\n      paspc_env->env[conidx]->last_char_code = PASPC_RD_ALERT_STATUS;\n\n      // Send the read request\n      prf_read_char_send(\n          &(paspc_env->prf_env), conidx, paspc_env->env[conidx]->pass.svc.shdl,\n          paspc_env->env[conidx]->pass.svc.ehdl,\n          paspc_env->env[conidx]->pass.chars[PASPC_CHAR_ALERT_STATUS].val_hdl);\n\n      // Go to BUSY state\n      ke_state_set(dest_id, PASPC_BUSY);\n    }\n  } else if (state != PASPC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    paspc_enable_rsp_send(paspc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref PASPC_READ_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int paspc_read_cmd_handler(ke_msg_id_t const msgid,\n                                    struct paspc_read_cmd const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct paspc_env_tag *paspc_idx_env = PRF_ENV_GET(PASPC, paspc);\n\n  if (paspc_idx_env != NULL) {\n    // Attribute Handle\n    uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n    // Status\n    uint8_t status = GAP_ERR_NO_ERROR;\n\n    // Check the provided connection handle\n    do {\n      // Check the current state\n      if (ke_state_get(dest_id) == PASPC_BUSY) {\n        // Keep the request for later, state is GAP_ERR_NO_ERROR\n        msg_status = KE_MSG_SAVED;\n        break;\n      }\n\n      switch (param->read_code) {\n      // Read Alert Status Characteristic Value\n      case (PASPC_RD_ALERT_STATUS): {\n        handle = paspc_idx_env->env[conidx]\n                     ->pass.chars[PASPC_CHAR_ALERT_STATUS]\n                     .val_hdl;\n      } break;\n\n      // Read Ringer Setting Characteristic Value\n      case (PASPC_RD_RINGER_SETTING): {\n        handle = paspc_idx_env->env[conidx]\n                     ->pass.chars[PASPC_CHAR_RINGER_SETTING]\n                     .val_hdl;\n      } break;\n\n      // Read Alert Status Characteristic Client Char. Cfg. Descriptor Value\n      case (PASPC_RD_WR_ALERT_STATUS_CFG): {\n        handle = paspc_idx_env->env[conidx]\n                     ->pass.descs[PASPC_DESC_ALERT_STATUS_CL_CFG]\n                     .desc_hdl;\n      } break;\n\n      // Read Ringer Setting Characteristic Client Char. Cfg. Descriptor Value\n      case (PASPC_RD_WR_RINGER_SETTING_CFG): {\n        handle = paspc_idx_env->env[conidx]\n                     ->pass.descs[PASPC_DESC_RINGER_SETTING_CL_CFG]\n                     .desc_hdl;\n      } break;\n\n      default: {\n        // Handle is ATT_INVALID_SEARCH_HANDLE\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Check if handle is viable\n        if (handle != ATT_INVALID_SEARCH_HANDLE) {\n          // Configure the environment for a read operation\n          paspc_idx_env->env[conidx]->operation = PASPC_READ_OP_CODE;\n          paspc_idx_env->env[conidx]->last_char_code = param->read_code;\n\n          // Send the read request\n          prf_read_char_send(&(paspc_idx_env->prf_env), conidx,\n                             paspc_idx_env->env[conidx]->pass.svc.shdl,\n                             paspc_idx_env->env[conidx]->pass.svc.ehdl, handle);\n\n          // Go to the Busy state\n          ke_state_set(dest_id, PASPC_BUSY);\n        } else {\n          status = PRF_ERR_INEXISTENT_HDL;\n        }\n      }\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      paspc_send_cmp_evt(paspc_idx_env, conidx, PASPC_READ_OP_CODE, status);\n    }\n  } else {\n    // No connection exists\n    paspc_send_cmp_evt(paspc_idx_env, conidx, PASPC_READ_OP_CODE,\n                       PRF_ERR_REQ_DISALLOWED);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref PASPC_WRITE_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int paspc_write_cmd_handler(ke_msg_id_t const msgid,\n                                     struct paspc_write_cmd const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // Get the address of the environment\n  struct paspc_env_tag *paspc_idx_env = PRF_ENV_GET(PASPC, paspc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (paspc_idx_env != NULL) {\n    do {\n      // Check the current state\n      if (ke_state_get(dest_id) != PASPC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_SAVED;\n        break;\n      }\n\n      // Attribute handle\n      uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n      // Write type\n      uint8_t wr_type;\n      // Length\n      uint8_t length;\n\n      switch (param->write_code) {\n      // Write Ringer Control Point Characteristic Value\n      case (PASPC_WR_RINGER_CTNL_PT): {\n        if ((param->value.ringer_ctnl_pt >= PASP_SILENT_MODE) &&\n            (param->value.ringer_ctnl_pt <= PASP_CANCEL_SILENT_MODE)) {\n          handle = paspc_idx_env->env[conidx]\n                       ->pass.chars[PASPC_CHAR_RINGER_CTNL_PT]\n                       .val_hdl;\n          length = sizeof(uint8_t);\n          wr_type = GATTC_WRITE_NO_RESPONSE;\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      // Write Alert Status Characteristic Client Char. Cfg. Descriptor Value\n      case (PASPC_RD_WR_ALERT_STATUS_CFG): {\n        if (param->value.alert_status_ntf_cfg <= PRF_CLI_START_NTF) {\n          handle = paspc_idx_env->env[conidx]\n                       ->pass.descs[PASPC_DESC_ALERT_STATUS_CL_CFG]\n                       .desc_hdl;\n          length = sizeof(uint16_t);\n          wr_type = GATTC_WRITE;\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      // Write Ringer Setting Characteristic Client Char. Cfg. Descriptor Value\n      case (PASPC_RD_WR_RINGER_SETTING_CFG): {\n        if (param->value.ringer_setting_ntf_cfg <= PRF_CLI_START_NTF) {\n          handle = paspc_idx_env->env[conidx]\n                       ->pass.descs[PASPC_DESC_RINGER_SETTING_CL_CFG]\n                       .desc_hdl;\n          length = sizeof(uint16_t);\n          wr_type = GATTC_WRITE;\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Check if handle is viable\n        if (handle != ATT_INVALID_SEARCH_HANDLE) {\n          // Send the write request\n          prf_gatt_write(&(paspc_idx_env->prf_env), conidx, handle,\n                         (uint8_t *)¶m->value, length, wr_type);\n\n          // Configure the environment for a write operation\n          paspc_idx_env->env[conidx]->operation = PASPC_WRITE_OP_CODE;\n          paspc_idx_env->env[conidx]->last_char_code = param->write_code;\n\n          // Go to the Busy state\n          ke_state_set(dest_id, PASPC_BUSY);\n        } else {\n          status = PRF_ERR_INEXISTENT_HDL;\n        }\n      }\n    } while (0);\n  } else {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    paspc_send_cmp_evt(paspc_idx_env, conidx, PASPC_WRITE_OP_CODE, status);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == PASPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct paspc_env_tag *paspc_env = PRF_ENV_GET(PASPC, paspc);\n\n    ASSERT_INFO(paspc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(paspc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (paspc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve PASS characteristics and descriptors\n      prf_extract_svc_info(ind, PASPC_CHAR_MAX, &paspc_pass_char[0],\n                           &paspc_env->env[conidx]->pass.chars[0],\n                           PASPC_DESC_MAX, &paspc_pass_char_desc[0],\n                           &paspc_env->env[conidx]->pass.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      paspc_env->env[conidx]->pass.svc.shdl = ind->start_hdl;\n      paspc_env->env[conidx]->pass.svc.ehdl = ind->end_hdl;\n    }\n\n    paspc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct paspc_env_tag *paspc_env = PRF_ENV_GET(PASPC, paspc);\n  // Status\n  uint8_t status;\n\n  if (paspc_env != NULL) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    uint8_t state = ke_state_get(dest_id);\n\n    if (state == PASPC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (paspc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity(\n              PASPC_CHAR_MAX, paspc_env->env[conidx]->pass.chars,\n              paspc_pass_char);\n        }\n        // too much services\n        else if (paspc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              PASPC_DESC_MAX, paspc_env->env[conidx]->pass.descs,\n              paspc_pass_char_desc, paspc_env->env[conidx]->pass.chars);\n        }\n      }\n\n      paspc_enable_rsp_send(paspc_env, conidx, status);\n    }\n\n    else if (state == PASPC_BUSY) {\n      switch (param->operation) {\n      case GATTC_READ: {\n        // Send the complete event status\n        paspc_send_cmp_evt(paspc_env, conidx, PASPC_READ_OP_CODE,\n                           param->status);\n      } break;\n\n      case GATTC_WRITE:\n      case GATTC_WRITE_NO_RESPONSE: {\n        if (paspc_env->env[conidx]->operation == PASPC_WRITE_OP_CODE) {\n          // Send the complete event status\n          paspc_send_cmp_evt(paspc_env, conidx, PASPC_WRITE_OP_CODE,\n                             param->status);\n        }\n      } break;\n\n      case GATTC_REGISTER:\n      case GATTC_UNREGISTER: {\n        // Do nothing\n      } break;\n\n      default: {\n        ASSERT_ERR(0);\n      } break;\n      }\n    }\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct paspc_env_tag *paspc_env = PRF_ENV_GET(PASPC, paspc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (paspc_env != NULL) {\n    ASSERT_ERR(ke_state_get(dest_id) == PASPC_BUSY);\n\n    // Prepare the indication message for the HL\n    struct paspc_value_ind *ind = KE_MSG_ALLOC(\n        PASPC_VALUE_IND, prf_dst_task_get(&(paspc_env->prf_env), conidx),\n        dest_id, paspc_value_ind);\n\n    switch (paspc_env->env[conidx]->last_char_code) {\n    // Read Alert Status Characteristic Value\n    case (PASPC_RD_ALERT_STATUS): {\n      ind->value.alert_status = param->value[0];\n    } break;\n\n    // Read Ringer Setting Characteristic Value\n    case (PASPC_RD_RINGER_SETTING): {\n      ind->value.ringer_setting = param->value[0];\n    } break;\n\n    // Read Alert Status Characteristic Client Char. Cfg. Descriptor Value\n    case (PASPC_RD_WR_ALERT_STATUS_CFG): {\n      ind->value.alert_status_ntf_cfg = co_read16p(¶m->value[0]);\n    } break;\n\n    // Read Ringer Setting Characteristic Client Char. Cfg. Descriptor Value\n    case (PASPC_RD_WR_RINGER_SETTING_CFG): {\n      ind->value.ringer_setting_ntf_cfg = co_read16p(¶m->value[0]);\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    ind->att_code = paspc_env->env[conidx]->last_char_code;\n\n    // Send the message\n    ke_msg_send(ind);\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct paspc_env_tag *paspc_env = PRF_ENV_GET(PASPC, paspc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (paspc_env != NULL) {\n    ASSERT_ERR(\n        (param->handle ==\n         paspc_env->env[conidx]->pass.chars[PASPC_CHAR_ALERT_STATUS].val_hdl) ||\n        (param->handle == paspc_env->env[conidx]\n                              ->pass.chars[PASPC_CHAR_RINGER_SETTING]\n                              .val_hdl));\n\n    // Prepare the indication message for the HL\n    struct paspc_value_ind *ind = KE_MSG_ALLOC(\n        PASPC_VALUE_IND, prf_dst_task_get(&paspc_env->prf_env, conidx),\n        prf_src_task_get(&paspc_env->prf_env, conidx), paspc_value_ind);\n\n    // Alert Status Characteristic Value\n    if (param->handle ==\n        paspc_env->env[conidx]->pass.chars[PASPC_CHAR_ALERT_STATUS].val_hdl) {\n      ind->value.alert_status = param->value[0];\n      ind->att_code = PASPC_RD_ALERT_STATUS;\n    }\n    // Ringer Setting Characteristic Value\n    else {\n      ind->value.ringer_setting = param->value[0];\n      ind->att_code = PASPC_RD_RINGER_SETTING;\n    }\n\n    // Send the message\n    ke_msg_send(ind);\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(paspc){\n    {PASPC_ENABLE_REQ, (ke_msg_func_t)paspc_enable_req_handler},\n    {PASPC_READ_CMD, (ke_msg_func_t)paspc_read_cmd_handler},\n    {PASPC_WRITE_CMD, (ke_msg_func_t)paspc_write_cmd_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid paspc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct paspc_env_tag *paspc_env = PRF_ENV_GET(PASPC, paspc);\n\n  task_desc->msg_handler_tab = paspc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(paspc_msg_handler_tab);\n  task_desc->state = paspc_env->state;\n  task_desc->idx_max = PASPC_IDX_MAX;\n}\n\n#endif //(BLE_PAS_CLIENT)\n\n/// @} PASPCTASK\n"
  },
  {
    "path": "services/ble_profiles/pasp/pasps/api/pasps_task.h",
    "content": "#ifndef PASPS_TASK_H_\n#define PASPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PASPSTASK Task\n * @ingroup PASPS\n * @brief Phone Alert Status Profile Server Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"pasp_common.h\"\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Messages for Phone Alert Status Profile Server\nenum pasps_msg_ids\n{\n    /// Set Bonded Data\n    PASPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_PASPS),\n    /// Bonded data confirmation\n    PASPS_ENABLE_RSP,\n\n    /// Update the value of a characteristic\n    PASPS_UPDATE_CHAR_VAL_CMD,\n    /// Indicate that an attribute value has been written\n    PASPS_WRITTEN_CHAR_VAL_IND,\n\n    /// Complete Event Information\n    PASPS_CMP_EVT,\n};\n\n/// Operation Codes\nenum pasps_op_codes\n{\n    PASPS_RESERVED_OP_CODE              = 0x00,\n\n    /// Enable Procedure\n    PASPS_ENABLE_OP_CODE,\n    /// Update Alert Status Char. value\n    PASPS_UPD_ALERT_STATUS_OP_CODE,\n    /// Update Ringer Setting Char. value\n    PASPS_UPD_RINGER_SETTING_OP_CODE,\n};\n\n/*\n * API MESSAGES STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the @ref PASPS_CREATE_DB_REQ message\nstruct pasps_db_cfg\n{\n    /// Alert Status Char. Value\n    uint8_t alert_status;\n    /// Ringer Settings Char. Value\n    uint8_t ringer_setting;\n};\n\n/// Parameters of the @ref PASPS_ENABLE_REQ message\nstruct pasps_enable_req\n{\n    /// Alert Status Characteristic Notification Configuration\n    uint16_t alert_status_ntf_cfg;\n    /// Ringer Setting Characteristic Notification Configuration\n    uint16_t ringer_setting_ntf_cfg;\n};\n\n/// Parameters of the @ref PASPS_ENABLE_RSP message\nstruct pasps_enable_rsp\n{\n    /// status\n    uint8_t status;\n};\n\n///Parameters of the @ref PASPS_UPDATE_CHAR_VAL_CMD message\nstruct pasps_update_char_val_cmd\n{\n    /// Operation Code (PASPS_UPD_ALERT_STATUS_OP_CODE or PASPS_UPD_RINGER_SETTING_OP_CODE)\n    uint8_t operation;\n    /// Alert Status Characteristic Value or Ringer Setting Characteristic Value\n    uint8_t value;\n};\n\n///Parameters of the @ref PASPS_WRITTEN_CHAR_VAL_IND message\nstruct pasps_written_char_val_ind\n{\n    /// Attribute Code\n    uint8_t att_code;\n    /// Written value\n    union written_value_tag\n    {\n        /// Ringer Control Point Char. Value\n        uint8_t ringer_ctnl_pt;\n        /// Alert Status Notification Configuration\n        uint16_t alert_status_ntf_cfg;\n        /// Ringer Setting Notification Configuration\n        uint16_t ringer_setting_ntf_cfg;\n    } value;\n};\n\n///Parameters of the @ref PASPS_CMP_EVT message\nstruct pasps_cmp_evt\n{\n    /// Operation\n    uint8_t operation;\n    /// Status\n    uint8_t status;\n};\n\n/// @} PASPSTASK\n\n#endif // PASPS_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/pasp/pasps/src/pasps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PASPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_PAS_SERVER)\n#include \"pasp_common.h\"\n\n#include \"pasps.h\"\n#include \"pasps_task.h\"\n#include \"prf_utils.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * PHONE ALERT STATUS SERVICE ATTRIBUTES\n ****************************************************************************************\n */\n\n/// Full PAS Database Description - Used to add attributes into the database\nconst struct attm_desc pasps_att_db[PASS_IDX_NB] = {\n    // Phone Alert Status Service Declaration\n    [PASS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Alert Status Characteristic Declaration\n    [PASS_IDX_ALERT_STATUS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                    0, 0},\n    // Alert Status Characteristic Value\n    [PASS_IDX_ALERT_STATUS_VAL] = {ATT_CHAR_ALERT_STATUS,\n                                   PERM(RD, ENABLE) | PERM(NTF, ENABLE),\n                                   PERM(RI, ENABLE), sizeof(uint8_t)},\n    // Alert Status Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [PASS_IDX_ALERT_STATUS_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   0, 0},\n\n    // Ringer Setting Characteristic Declaration\n    [PASS_IDX_RINGER_SETTING_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                      0, 0},\n    // Ringer Settings Characteristic Value\n    [PASS_IDX_RINGER_SETTING_VAL] = {ATT_CHAR_RINGER_SETTING,\n                                     PERM(RD, ENABLE) | PERM(NTF, ENABLE),\n                                     PERM(RI, ENABLE), sizeof(uint8_t)},\n    // Ringer Settings Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [PASS_IDX_RINGER_SETTING_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                     PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                     0, 0},\n\n    // Ringer Control Point Characteristic Declaration\n    [PASS_IDX_RINGER_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                      0, 0},\n    // Ringer Control Point Characteristic Value\n    [PASS_IDX_RINGER_CTNL_PT_VAL] = {ATT_CHAR_RINGER_CNTL_POINT,\n                                     PERM(WRITE_COMMAND, ENABLE),\n                                     PERM(RI, ENABLE), sizeof(uint8_t)},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the PASPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t pasps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl,\n                          struct pasps_db_cfg *params) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n  // Service content flag\n  uint32_t cfg_flag = PASPS_DB_CFG_FLAG;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  // Add service in the database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_PHONE_ALERT_STATUS, (uint8_t *)&cfg_flag, PASS_IDX_NB,\n      NULL, env->task, &pasps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, ENABLE));\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate PASPS required environment variable\n    struct pasps_env_tag *pasps_env = (struct pasps_env_tag *)ke_malloc(\n        sizeof(struct pasps_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize PASPS environment\n    env->env = (prf_env_t *)pasps_env;\n    pasps_env->shdl = *start_hdl;\n\n    pasps_env->alert_status = params->alert_status;\n    pasps_env->ringer_setting = params->ringer_setting;\n\n    pasps_env->operation = PASPS_RESERVED_OP_CODE;\n\n    pasps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Multi Instantiated task\n    pasps_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_PASPS;\n    pasps_task_init(&(env->desc));\n\n    for (uint8_t idx = 0; idx < BLE_CONNECTION_MAX; idx++) {\n      pasps_env->env[idx] = NULL;\n      /* Put PASS in disabled state */\n      ke_state_set(KE_BUILD_ID(env->task, idx), PASPS_FREE);\n    }\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the PASPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void pasps_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct pasps_env_tag *pasps_env = (struct pasps_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < BLE_CONNECTION_MAX; idx++) {\n    if (pasps_env->env[idx] != NULL) {\n      ke_free(pasps_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(pasps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void pasps_create(struct prf_task_env *env, uint8_t conidx) {\n  struct pasps_env_tag *pasps_env = (struct pasps_env_tag *)env->env;\n  pasps_env->env[conidx] = (struct pasps_cnx_env *)ke_malloc(\n      sizeof(struct pasps_cnx_env), KE_MEM_ATT_DB);\n\n  memset(pasps_env->env[conidx], 0, sizeof(struct pasps_cnx_env));\n\n  pasps_env->env[conidx]->ringer_state = pasps_env->ringer_setting;\n  /* Put PASS in idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), PASPS_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void pasps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct pasps_env_tag *pasps_env = (struct pasps_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (pasps_env->env[conidx] != NULL) {\n    ke_free(pasps_env->env[conidx]);\n    pasps_env->env[conidx] = NULL;\n  }\n\n  /* Put PASS in disabled state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), PASPS_FREE);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// PASPS Task interface required by profile manager\nconst struct prf_task_cbs pasps_itf = {\n    (prf_init_fnct)pasps_init,\n    pasps_destroy,\n    pasps_create,\n    pasps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *pasps_prf_itf_get(void) { return &pasps_itf; }\n\n///*\n// * FUNCTION DEFINITIONS\n// ****************************************************************************************\n// */\n\nvoid pasps_send_cmp_evt(ke_task_id_t src_id, ke_task_id_t dest_id,\n                        uint8_t operation, uint8_t status) {\n  // Come back to the Connected state if the state was busy.\n  if (ke_state_get(src_id) == PASPS_BUSY) {\n    ke_state_set(src_id, PASPS_IDLE);\n  }\n\n  // Send the message to the application\n  struct pasps_cmp_evt *evt =\n      KE_MSG_ALLOC(PASPS_CMP_EVT, dest_id, src_id, pasps_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\n#endif //(BLE_PASP_SERVER)\n\n/// @} PASPS\n"
  },
  {
    "path": "services/ble_profiles/pasp/pasps/src/pasps.h",
    "content": "#ifndef PASPS_H_\n#define PASPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PASPS Phone Alert Status Profile Server\n * @ingroup PASP\n * @brief Phone Alert Status Profile Server\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_PAS_SERVER)\n#include \"pasp_common.h\"\n\n#include \n#include \n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"attm.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Number of parallel instances of the task\n#define PASPS_IDX_MAX           (BLE_CONNECTION_MAX)\n/// Database Configuration Flag\n#define PASPS_DB_CFG_FLAG       (0x01FF)\n\n/// Notification States Flags\n#define PASPS_FLAG_ALERT_STATUS_CFG         (0x01)\n#define PASPS_FLAG_RINGER_SETTING_CFG       (0x02)\n/// CP Discovery or Bonded data used\n#define PASPS_FLAG_CFG_PERFORMED_OK         (0x80)\n\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n#define PASPS_IS_NTF_ENABLED(conidx, idx_env, flag) ((idx_env->env[conidx]->ntf_state & flag) == flag)\n\n#define PASPS_ENABLE_NTF(conidx, idx_env, flag)     (idx_env->env[conidx]->ntf_state |= flag)\n\n#define PASPS_DISABLE_NTF(conidx, idx_env, flag)    (idx_env->env[conidx]->ntf_state &= ~flag)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the PASPS task\nenum pasps_states\n{\n    /// Not connected state\n    PASPS_FREE,\n    /// Idle state\n    PASPS_IDLE,\n    /// Busy state\n    PASPS_BUSY,\n\n    /// Number of defined states.\n    PASPS_STATE_MAX\n};\n\n/// Attributes State Machine\nenum pasps_pass_att_list\n{\n    PASS_IDX_SVC,\n\n    PASS_IDX_ALERT_STATUS_CHAR,\n    PASS_IDX_ALERT_STATUS_VAL,\n    PASS_IDX_ALERT_STATUS_CFG,\n\n    PASS_IDX_RINGER_SETTING_CHAR,\n    PASS_IDX_RINGER_SETTING_VAL,\n    PASS_IDX_RINGER_SETTING_CFG,\n\n    PASS_IDX_RINGER_CTNL_PT_CHAR,\n    PASS_IDX_RINGER_CTNL_PT_VAL,\n\n    PASS_IDX_NB,\n};\n\n/// Attribute Codes\nenum pasps_att_code\n{\n    /// Alert Status Characteristic\n    PASPS_ALERT_STATUS_CHAR_VAL,\n    /// Ringer Setting Characteristic\n    PASPS_RINGER_SETTING_CHAR_VAL,\n    /// Ringer Control Point Characteristic\n    PASPS_RINGER_CTNL_PT_CHAR_VAL,\n\n    /// Alert Status Characteristic - Notification Configuration\n    PASPS_ALERT_STATUS_NTF_CFG,\n    /// Ringer Setting Characteristic - Notification Configuration\n    PASPS_RINGER_SETTING_NTF_CFG,\n};\n\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Phone Alert Status Profile Server Connection Dependent Environment Variable\nstruct pasps_cnx_env\n{\n    /// Ringer State\n    uint8_t ringer_state;\n\n    /**\n     * Ringer State + Notification State\n     *     Bit 0: Alert Status notification configuration\n     *     Bit 1: Ringer setting notification configuration\n     */\n    uint8_t ntf_state;\n};\n\n/// Phone Alert Status Profile Server Environment Variable\nstruct pasps_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Phone Alert Status Service Start Handle\n    uint16_t shdl;\n    /// Environment variable pointer for each connections\n    struct pasps_cnx_env* env[BLE_CONNECTION_MAX];\n\n    /// Current Operation Code\n    uint8_t operation;\n    /// Alert Status Char. Value\n    uint8_t alert_status;\n    /// Ringer Settings Char. Value\n    uint8_t ringer_setting;\n\n    /// State of different task instances\n    ke_state_t state[PASPS_IDX_MAX];\n};\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve PASP service profile interface\n *\n * @return PASP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* pasps_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send a PASPS_CMP_EVT message to a requester.\n *\n * @param[in] src_id        Source ID of the message (instance of TASK_PASPS)\n * @param[in] dest_id       Destination ID of the message\n * @param[in] operation     Code of the completed operation\n * @param[in] status        Status of the request\n ****************************************************************************************\n */\nvoid pasps_send_cmp_evt(ke_task_id_t src_id, ke_task_id_t dest_id,\n                        uint8_t operation, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid pasps_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //(BLE_PAS_SERVER)\n\n/// @} PASPS\n\n#endif // PASPS_H_\n"
  },
  {
    "path": "services/ble_profiles/pasp/pasps/src/pasps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PASPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_PAS_SERVER)\n#include \"pasp_common.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"pasps.h\"\n#include \"pasps_task.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref PASPS_ENABLE_REQ message.\n * @param[in] msgid Id of the message received\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int pasps_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct pasps_enable_req *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct pasps_env_tag *pasps_env = PRF_ENV_GET(PASPS, pasps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == PASPS_IDLE) {\n    // Bonded data was not used before\n    if (!(pasps_env->env[conidx]->ntf_state & PASPS_FLAG_CFG_PERFORMED_OK)) {\n      status = GAP_ERR_NO_ERROR;\n      if (param->alert_status_ntf_cfg != PRF_CLI_STOP_NTFIND) {\n        // Force to PRF_CLI_START_NTF\n        param->alert_status_ntf_cfg = PRF_CLI_START_NTF;\n\n        PASPS_ENABLE_NTF(conidx, pasps_env, PASPS_FLAG_ALERT_STATUS_CFG);\n      }\n\n      if (param->ringer_setting_ntf_cfg != PRF_CLI_STOP_NTFIND) {\n        // Force to PRF_CLI_START_NTF\n        param->ringer_setting_ntf_cfg = PRF_CLI_START_NTF;\n\n        PASPS_ENABLE_NTF(conidx, pasps_env, PASPS_FLAG_RINGER_SETTING_CFG);\n      }\n    }\n    // Enable Bonded Data\n    PASPS_ENABLE_NTF(conidx, pasps_env, PASPS_FLAG_CFG_PERFORMED_OK);\n  }\n\n  // send completed information to APP task that contains error status\n  struct pasps_enable_rsp *cmp_evt =\n      KE_MSG_ALLOC(PASPS_ENABLE_RSP, src_id, dest_id, pasps_enable_rsp);\n  cmp_evt->status = status;\n\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref PASPS_UPDATE_CHAR_VAL_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int pasps_update_char_val_cmd_handler(\n    ke_msg_id_t const msgid, struct pasps_update_char_val_cmd *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = PRF_ERR_INVALID_PARAM;\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == PASPS_IDLE) {\n    // Get the address of the environment\n    struct pasps_env_tag *pasps_env = PRF_ENV_GET(PASPS, pasps);\n    // Handle\n    uint16_t handle = ATT_ERR_INVALID_HANDLE;\n    // Notification status flag\n    uint8_t flag = 0;\n\n    ASSERT_ERR(pasps_env != NULL);\n    ASSERT_ERR(pasps_env->env[conidx] != NULL);\n\n    // Check the connection handle\n    switch (param->operation) {\n    // Alert Status Characteristic\n    case (PASPS_UPD_ALERT_STATUS_OP_CODE): {\n      // Check the provided value\n      if (param->value <= PASP_ALERT_STATUS_VAL_MAX) {\n        // Set the handle value\n        handle = pasps_env->shdl + PASS_IDX_ALERT_STATUS_VAL;\n        // Set the flag\n        flag = PASPS_FLAG_ALERT_STATUS_CFG;\n        // Update the ringer state value\n        pasps_env->alert_status = param->value;\n\n        status = GAP_ERR_NO_ERROR;\n      }\n      // else status is PRF_ERR_INVALID_PARAM\n    } break;\n\n    // Ringer Setting Characteristic\n    case (PASPS_UPD_RINGER_SETTING_OP_CODE): {\n      // Check the provided value\n      if (param->value <= PASP_RINGER_NORMAL) {\n        // Set the handle value\n        handle = pasps_env->shdl + PASS_IDX_RINGER_SETTING_VAL;\n        // Set the flag\n        flag = PASPS_FLAG_RINGER_SETTING_CFG;\n        // Update the ringer state value\n        pasps_env->ringer_setting = param->value;\n\n        status = GAP_ERR_NO_ERROR;\n      }\n      // else status is PRF_ERR_INVALID_PARAM\n    } break;\n\n    default: {\n      // Nothing more to do, status is PRF_ERR_INVALID_PARAM\n    } break;\n    }\n\n    if (status == GAP_ERR_NO_ERROR) {\n      // Check if sending of notifications is enabled for this connection\n      if (PASPS_IS_NTF_ENABLED(conidx, pasps_env, flag)) {\n        // Configure the environment for the operation\n        pasps_env->operation = param->operation;\n        // Go to the Busy state\n        ke_state_set(dest_id, PASPS_BUSY);\n\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *ntf = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n            gattc_send_evt_cmd, sizeof(uint8_t));\n\n        // Fill in the parameter structure\n        ntf->operation = GATTC_NOTIFY;\n        ntf->handle = handle;\n        // pack measured value in database\n        ntf->length = sizeof(uint8_t);\n        // Fill data\n        ntf->value[0] = param->value;\n\n        // The notification can be sent, send the notification\n        ke_msg_send(ntf);\n      } else {\n        status = PRF_ERR_NTF_DISABLED;\n      }\n    }\n  } else if (state == PASPS_BUSY) {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n  // no connection\n  else {\n    status = GAP_ERR_DISCONNECTED;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // Send the message to the application\n    struct pasps_cmp_evt *evt =\n        KE_MSG_ALLOC(PASPS_CMP_EVT, src_id, dest_id, pasps_cmp_evt);\n\n    evt->operation = param->operation;\n    evt->status = status;\n\n    ke_msg_send(evt);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_att_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_att_info_req_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == PASPS_IDLE) {\n    // Get the address of the environment\n    struct pasps_env_tag *pasps_env = PRF_ENV_GET(PASPS, pasps);\n    uint8_t att_idx = param->handle - pasps_env->shdl;\n    struct gattc_att_info_cfm *cfm;\n\n    // Send write response\n    cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n    cfm->handle = param->handle;\n\n    // check if it's a client configuration char\n    if ((att_idx == PASS_IDX_ALERT_STATUS_CFG) ||\n        (att_idx == PASS_IDX_RINGER_SETTING_CFG)) {\n      // CCC attribute length = 2\n      cfm->length = 2;\n      cfm->status = GAP_ERR_NO_ERROR;\n    } else if (att_idx == PASS_IDX_RINGER_CTNL_PT_VAL) {\n      // attribute length = 1\n      cfm->length = 1;\n      cfm->status = GAP_ERR_NO_ERROR;\n    }\n    // not expected request\n    else {\n      cfm->length = 0;\n      cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == PASPS_IDLE) {\n    // Get the address of the environment\n    struct pasps_env_tag *pasps_env = PRF_ENV_GET(PASPS, pasps);\n    uint8_t conidx = KE_IDX_GET(src_id);\n    uint8_t att_idx = param->handle - pasps_env->shdl;\n\n    uint8_t value[2];\n    uint8_t value_size = 0;\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    switch (att_idx) {\n    case PASS_IDX_ALERT_STATUS_VAL: {\n      // Fill data\n      value_size = sizeof(uint8_t);\n      value[0] = pasps_env->alert_status;\n    } break;\n\n    case PASS_IDX_RINGER_SETTING_VAL: {\n      // Fill data\n      value_size = sizeof(uint8_t);\n      value[0] = pasps_env->ringer_setting;\n    } break;\n\n    case PASS_IDX_ALERT_STATUS_CFG: {\n      // Fill data\n      value_size = sizeof(uint16_t);\n      co_write16p(value, (pasps_env->env[conidx]->ntf_state &\n                          PASPS_FLAG_ALERT_STATUS_CFG)\n                             ? PRF_CLI_START_NTF\n                             : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    case PASS_IDX_RINGER_SETTING_CFG: {\n      // Fill data\n      value_size = sizeof(uint16_t);\n      co_write16p(value, (pasps_env->env[conidx]->ntf_state &\n                          PASPS_FLAG_RINGER_SETTING_CFG)\n                             ? PRF_CLI_START_NTF\n                             : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    default: {\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, value_size);\n    cfm->length = value_size;\n    memcpy(cfm->value, value, value_size);\n    cfm->handle = param->handle;\n    cfm->status = status;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_WRITE_REQ_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get the conidx\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Get the address of the environment\n  struct pasps_env_tag *pasps_env = PRF_ENV_GET(PASPS, pasps);\n\n  // Check if the connection exists\n  if (pasps_env->env[conidx] != NULL) {\n    /*\n     * ---------------------------------------------------------------------------------------------\n     * Alert Status Client Characteristic Configuration Descriptor Value - Write\n     * ---------------------------------------------------------------------------------------------\n     * Ringer Setting Client Characteristic Configuration Descriptor Value -\n     * Write\n     * ---------------------------------------------------------------------------------------------\n     */\n    if ((param->handle == (pasps_env->shdl + PASS_IDX_ALERT_STATUS_CFG)) ||\n        (param->handle == (pasps_env->shdl + PASS_IDX_RINGER_SETTING_CFG))) {\n      // Received configuration value\n      uint16_t ntf_cfg = co_read16p(¶m->value[0]);\n\n      if ((ntf_cfg == PRF_CLI_STOP_NTFIND) || (ntf_cfg == PRF_CLI_START_NTF)) {\n        struct pasps_written_char_val_ind *ind =\n            KE_MSG_ALLOC(PASPS_WRITTEN_CHAR_VAL_IND,\n                         prf_dst_task_get(&pasps_env->prf_env, conidx),\n                         prf_src_task_get(&pasps_env->prf_env, conidx),\n                         pasps_written_char_val_ind);\n\n        if (param->handle == pasps_env->shdl + PASS_IDX_ALERT_STATUS_CFG) {\n          ind->value.alert_status_ntf_cfg = ntf_cfg;\n          ind->att_code = PASPS_ALERT_STATUS_NTF_CFG;\n\n          if (ntf_cfg == PRF_CLI_STOP_NTFIND) {\n            PASPS_DISABLE_NTF(conidx, pasps_env, PASPS_FLAG_ALERT_STATUS_CFG);\n          } else {\n            PASPS_ENABLE_NTF(conidx, pasps_env, PASPS_FLAG_ALERT_STATUS_CFG);\n          }\n        } else {\n          ind->value.ringer_setting_ntf_cfg = ntf_cfg;\n          ind->att_code = PASPS_RINGER_SETTING_NTF_CFG;\n\n          if (ntf_cfg == PRF_CLI_STOP_NTFIND) {\n            PASPS_DISABLE_NTF(conidx, pasps_env, PASPS_FLAG_RINGER_SETTING_CFG);\n          } else {\n            PASPS_ENABLE_NTF(conidx, pasps_env, PASPS_FLAG_RINGER_SETTING_CFG);\n          }\n        }\n\n        ke_msg_send(ind);\n\n        // Enable Bonded Data\n        PASPS_ENABLE_NTF(conidx, pasps_env, PASPS_FLAG_CFG_PERFORMED_OK);\n      } else {\n        status = PRF_APP_ERROR;\n      }\n    }\n    /*\n     * ---------------------------------------------------------------------------------------------\n     * Ringer Control Point Characteristic Value - Write Without Response\n     * ---------------------------------------------------------------------------------------------\n     */\n    else if (param->handle == (pasps_env->shdl + PASS_IDX_RINGER_CTNL_PT_VAL)) {\n      // Inform the HL ?\n      bool inform_hl = false;\n\n      // Check the received value\n      switch (param->value[0]) {\n      case (PASP_SILENT_MODE): {\n        // Ignore if ringer is already silent\n        if (pasps_env->env[conidx]->ringer_state == PASP_RINGER_NORMAL) {\n          inform_hl = true;\n        }\n      } break;\n\n      case (PASP_CANCEL_SILENT_MODE): {\n        // Ignore if ringer is not silent\n        if (pasps_env->env[conidx]->ringer_state == PASP_RINGER_SILENT) {\n          inform_hl = true;\n        }\n      } break;\n\n      case (PASP_MUTE_ONCE): {\n        inform_hl = true;\n      } break;\n\n      // No need to respond with an error (Write Without Response)\n      default:\n        break;\n      }\n\n      if (inform_hl) {\n        struct pasps_written_char_val_ind *ind =\n            KE_MSG_ALLOC(PASPS_WRITTEN_CHAR_VAL_IND,\n                         prf_dst_task_get(&pasps_env->prf_env, conidx),\n                         prf_src_task_get(&pasps_env->prf_env, conidx),\n                         pasps_written_char_val_ind);\n\n        ind->att_code = PASPS_RINGER_CTNL_PT_CHAR_VAL;\n        ind->value.ringer_ctnl_pt = param->value[0];\n\n        ke_msg_send(ind);\n      }\n    }\n    // Send the write response to the peer device\n    struct gattc_write_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n    cfm->handle = param->handle;\n    cfm->status = status;\n    ke_msg_send(cfm);\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT message meaning that a notification or an\n *indication has been correctly sent to peer device (but not confirmed by peer\n *device).\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct pasps_env_tag *pasps_env = PRF_ENV_GET(PASPS, pasps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  if (pasps_env != NULL) {\n    // Send a complete event status to the application\n    pasps_send_cmp_evt(prf_src_task_get(&pasps_env->prf_env, conidx),\n                       prf_dst_task_get(&pasps_env->prf_env, conidx),\n                       pasps_env->operation, param->status);\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(pasps){\n    {PASPS_ENABLE_REQ, (ke_msg_func_t)pasps_enable_req_handler},\n    {PASPS_UPDATE_CHAR_VAL_CMD,\n     (ke_msg_func_t)pasps_update_char_val_cmd_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid pasps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct pasps_env_tag *pasps_env = PRF_ENV_GET(PASPS, pasps);\n\n  task_desc->msg_handler_tab = pasps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(pasps_msg_handler_tab);\n  task_desc->state = pasps_env->state;\n  task_desc->idx_max = PASPS_IDX_MAX;\n}\n\n#endif //(BLE_PASS_SERVER)\n\n/// @} PASPSTASK\n"
  },
  {
    "path": "services/ble_profiles/prf/prf.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PRF\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_PROFILES)\n#include \"att.h\"\n#include \"prf.h\"\n\n#if (BLE_HT_THERMOM)\nextern const struct prf_task_cbs *htpt_prf_itf_get(void);\n#endif // (BLE_HT_THERMOM)\n\n#if (BLE_HT_COLLECTOR)\nextern const struct prf_task_cbs *htpc_prf_itf_get(void);\n#endif // (BLE_HT_COLLECTOR)\n\n#if (BLE_DIS_SERVER)\nextern const struct prf_task_cbs *diss_prf_itf_get(void);\n#endif // (BLE_HT_THERMOM)\n\n#if (BLE_DIS_CLIENT)\nextern const struct prf_task_cbs *disc_prf_itf_get(void);\n#endif // (BLE_DIS_CLIENT)\n\n#if (BLE_BP_SENSOR)\nextern const struct prf_task_cbs *blps_prf_itf_get(void);\n#endif // (BLE_BP_SENSOR)\n\n#if (BLE_BP_COLLECTOR)\nextern const struct prf_task_cbs *blpc_prf_itf_get(void);\n#endif // (BLE_BP_COLLECTOR)\n\n#if (BLE_TIP_SERVER)\nextern const struct prf_task_cbs *tips_prf_itf_get(void);\n#endif // (BLE_TIP_SERVER)\n\n#if (BLE_TIP_CLIENT)\nextern const struct prf_task_cbs *tipc_prf_itf_get(void);\n#endif // (BLE_TIP_CLIENT)\n\n#if (BLE_HR_SENSOR)\nextern const struct prf_task_cbs *hrps_prf_itf_get(void);\n#endif // (BLE_HR_SENSOR)\n\n#if (BLE_HR_COLLECTOR)\nextern const struct prf_task_cbs *hrpc_prf_itf_get(void);\n#endif // (BLE_HR_COLLECTOR)\n\n#if (BLE_FINDME_LOCATOR)\nextern const struct prf_task_cbs *findl_prf_itf_get(void);\n#endif // (BLE_FINDME_LOCATOR)\n\n#if (BLE_FINDME_TARGET)\nextern const struct prf_task_cbs *findt_prf_itf_get(void);\n#endif // (BLE_FINDME_TARGET)\n\n#if (BLE_PROX_MONITOR)\nextern const struct prf_task_cbs *proxm_prf_itf_get(void);\n#endif // (BLE_PROX_MONITOR)\n\n#if (BLE_PROX_REPORTER)\nextern const struct prf_task_cbs *proxr_prf_itf_get(void);\n#endif // (BLE_PROX_REPORTER)\n\n#if (BLE_SP_CLIENT)\nextern const struct prf_task_cbs *scppc_prf_itf_get(void);\n#endif // (BLE_SP_CLENT)\n\n#if (BLE_SP_SERVER)\nextern const struct prf_task_cbs *scpps_prf_itf_get(void);\n#endif // (BLE_SP_SERVER)\n\n#if (BLE_BATT_CLIENT)\nextern const struct prf_task_cbs *basc_prf_itf_get(void);\n#endif // (BLE_BATT_CLIENT)\n\n#if (BLE_BATT_SERVER)\nextern const struct prf_task_cbs *bass_prf_itf_get(void);\n#endif // (BLE_BATT_SERVER)\n\n#if (BLE_HID_DEVICE)\nextern const struct prf_task_cbs *hogpd_prf_itf_get(void);\n#endif // (BLE_HID_DEVICE)\n\n#if (BLE_HID_BOOT_HOST)\nextern const struct prf_task_cbs *hogpbh_prf_itf_get(void);\n#endif // (BLE_HID_BOOT_HOST)\n\n#if (BLE_HID_REPORT_HOST)\nextern const struct prf_task_cbs *hogprh_prf_itf_get(void);\n#endif // (BLE_HID_REPORT_HOST)\n\n#if (BLE_GL_COLLECTOR)\nextern const struct prf_task_cbs *glpc_prf_itf_get(void);\n#endif // (BLE_GL_COLLECTOR)\n\n#if (BLE_GL_SENSOR)\nextern const struct prf_task_cbs *glps_prf_itf_get(void);\n#endif // (BLE_GL_SENSOR)\n\n#if (BLE_RSC_COLLECTOR)\nextern const struct prf_task_cbs *rscpc_prf_itf_get(void);\n#endif // (BLE_RSC_COLLECTOR)\n\n#if (BLE_RSC_SENSOR)\nextern const struct prf_task_cbs *rscps_prf_itf_get(void);\n#endif // (BLE_RSC_COLLECTOR)\n\n#if (BLE_CSC_COLLECTOR)\nextern const struct prf_task_cbs *cscpc_prf_itf_get(void);\n#endif // (BLE_CSC_COLLECTOR)\n\n#if (BLE_CSC_SENSOR)\nextern const struct prf_task_cbs *cscps_prf_itf_get(void);\n#endif // (BLE_CSC_COLLECTOR)\n\n#if (BLE_AN_CLIENT)\nextern const struct prf_task_cbs *anpc_prf_itf_get(void);\n#endif // (BLE_AN_CLIENT)\n\n#if (BLE_AN_SERVER)\nextern const struct prf_task_cbs *anps_prf_itf_get(void);\n#endif // (BLE_AN_SERVER)\n\n#if (BLE_PAS_CLIENT)\nextern const struct prf_task_cbs *paspc_prf_itf_get(void);\n#endif // (BLE_PAS_CLIENT)\n\n#if (BLE_PAS_SERVER)\nextern const struct prf_task_cbs *pasps_prf_itf_get(void);\n#endif // (BLE_PAS_SERVER)\n\n#if (BLE_CP_COLLECTOR)\nextern const struct prf_task_cbs *cppc_prf_itf_get(void);\n#endif //(BLE_CP_COLLECTOR)\n\n#if (BLE_CP_SENSOR)\nextern const struct prf_task_cbs *cpps_prf_itf_get(void);\n#endif //(BLE_CP_SENSOR)\n\n#if (BLE_LN_COLLECTOR)\nextern const struct prf_task_cbs *lanc_prf_itf_get(void);\n#endif //(BLE_CP_COLLECTOR)\n\n#if (BLE_LN_SENSOR)\nextern const struct prf_task_cbs *lans_prf_itf_get(void);\n#endif //(BLE_CP_SENSOR)\n\n#if (BLE_IPS_SERVER)\nextern const struct prf_task_cbs *ipss_prf_itf_get(void);\n#endif //(BLE_IPS_SERVER)\n\n#if (BLE_IPS_CLIENT)\nextern const struct prf_task_cbs *ipsc_prf_itf_get(void);\n#endif //(BLE_IPS_CLIENT)\n\n#if (BLE_ENV_SERVER)\nextern const struct prf_task_cbs *envs_prf_itf_get(void);\n#endif //(BLE_ENV_SERVER)\n\n#if (BLE_ENV_CLIENT)\nextern const struct prf_task_cbs *envc_prf_itf_get(void);\n#endif //(BLE_ENV_CLIENT\n\n#if (BLE_WSC_SERVER)\nextern const struct prf_task_cbs *wscs_prf_itf_get(void);\n#endif //(BLE_WSC_SERVER)\n\n#if (BLE_WSC_CLIENT)\nextern const struct prf_task_cbs *wscc_prf_itf_get(void);\n#endif //(BLE_WSC_CLIENT\n\n#if (BLE_BCS_SERVER)\nextern const struct prf_task_cbs *bcss_prf_itf_get(void);\n#endif //(BLE_BCS_SERVER)\n\n#if (BLE_BCS_CLIENT)\nextern const struct prf_task_cbs *bcsc_prf_itf_get(void);\n#endif //(BLE_BCS_CLIENT)\n\n#ifdef BLE_AM0_HEARING_AID_SERV\nextern const struct prf_task_cbs *am0_has_prf_itf_get(void);\n#endif // BLE_AM0_HEARING_AID_SERV\n\n#if (BLE_UDS_SERVER)\nextern const struct prf_task_cbs *udss_prf_itf_get(void);\n#endif //(BLE_UDS_SERVER)\n\n#if (BLE_UDS_CLIENT)\nextern const struct prf_task_cbs *udsc_prf_itf_get(void);\n#endif //(BLE_UDS_CLIENT)\n\n#if (BLE_VOICEPATH)\nextern const struct prf_task_cbs *voicepath_prf_itf_get(void);\n#endif //(BLE_VOICEPATH)\n\n#if (BLE_DATAPATH_SERVER)\nextern const struct prf_task_cbs *datapathps_prf_itf_get(void);\n#endif //(BLE_DATAPATH_SERVER)\n\n#if (BLE_OTA)\nextern const struct prf_task_cbs *ota_prf_itf_get(void);\n#endif //(BLE_OTA)\n\n#if (BLE_TOTA)\nextern const struct prf_task_cbs *tota_prf_itf_get(void);\n#endif //(BLE_TOTA)\n\n#if (BLE_BMS)\nextern const struct prf_task_cbs *bms_prf_itf_get(void);\n#endif //(BLE_BMS)\n\n#if (BLE_ANC_CLIENT)\nextern const struct prf_task_cbs *ancc_prf_itf_get(void);\n#endif //(BLE_ANC_CLIENT)\n\n#if (BLE_AMS_CLIENT)\nextern const struct prf_task_cbs *amsc_prf_itf_get(void);\n#endif //(BLE_AMS_CLIENT)\n\n#if (BLE_GFPS_PROVIDER)\nextern const struct prf_task_cbs *gfpsp_prf_itf_get(void);\n#endif //(BLE_GFPS_PROVIDER)\n\n#ifdef BLE_AI_VOICE\nextern const struct prf_task_cbs *ai_prf_itf_get(void);\n#endif\n\n#if (ANCS_PROXY_ENABLE)\nextern const struct prf_task_cbs *ancs_proxy_prf_itf_get(void);\nextern const struct prf_task_cbs *ams_proxy_prf_itf_get(void);\n#endif\n\n#if (BLE_TILE)\nextern const struct prf_task_cbs *tile_prf_itf_get(void);\n#endif //(BLE_TILE)\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\nstruct prf_env_tag prf_env;\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve profile interface\n ****************************************************************************************\n */\nstatic const struct prf_task_cbs *prf_itf_get(uint16_t task_id) {\n  const struct prf_task_cbs *prf_cbs = NULL;\n\n  BLE_DBG(\">>>>>> prf_itf_get task_id:  %d task_id %d<<<<<<\\n\",\n          KE_TYPE_GET(task_id), task_id);\n  switch (KE_TYPE_GET(task_id)) {\n#if (BLE_HT_THERMOM)\n  case TASK_ID_HTPT:\n    prf_cbs = htpt_prf_itf_get();\n    break;\n#endif // (BLE_HT_THERMOM)\n\n#if (BLE_HT_COLLECTOR)\n  case TASK_ID_HTPC:\n    prf_cbs = htpc_prf_itf_get();\n    break;\n#endif // (BLE_HT_COLLECTOR)\n\n#if (BLE_DIS_SERVER)\n  case TASK_ID_DISS:\n    prf_cbs = diss_prf_itf_get();\n    break;\n#endif // (BLE_DIS_SERVER)\n\n#if (BLE_DIS_CLIENT)\n  case TASK_ID_DISC:\n    prf_cbs = disc_prf_itf_get();\n    break;\n#endif // (BLE_DIS_CLIENT)\n\n#if (BLE_BP_SENSOR)\n  case TASK_ID_BLPS:\n    prf_cbs = blps_prf_itf_get();\n    break;\n#endif // (BLE_BP_SENSOR)\n\n#if (BLE_BP_COLLECTOR)\n  case TASK_ID_BLPC:\n    prf_cbs = blpc_prf_itf_get();\n    break;\n#endif // (BLE_BP_COLLECTOR)\n\n#if (BLE_TIP_SERVER)\n  case TASK_ID_TIPS:\n    prf_cbs = tips_prf_itf_get();\n    break;\n#endif // (BLE_TIP_SERVER)\n\n#if (BLE_TIP_CLIENT)\n  case TASK_ID_TIPC:\n    prf_cbs = tipc_prf_itf_get();\n    break;\n#endif // (BLE_TIP_CLIENT)\n\n#if (BLE_HR_SENSOR)\n  case TASK_ID_HRPS:\n    prf_cbs = hrps_prf_itf_get();\n    break;\n#endif // (BLE_HR_SENSOR)\n\n#if (BLE_HR_COLLECTOR)\n  case TASK_ID_HRPC:\n    prf_cbs = hrpc_prf_itf_get();\n    break;\n#endif // (BLE_HR_COLLECTOR)\n\n#if (BLE_FINDME_LOCATOR)\n  case TASK_ID_FINDL:\n    prf_cbs = findl_prf_itf_get();\n    break;\n#endif // (BLE_FINDME_LOCATOR)\n\n#if (BLE_FINDME_TARGET)\n  case TASK_ID_FINDT:\n    prf_cbs = findt_prf_itf_get();\n    break;\n#endif // (BLE_FINDME_TARGET)\n\n#if (BLE_PROX_MONITOR)\n  case TASK_ID_PROXM:\n    prf_cbs = proxm_prf_itf_get();\n    break;\n#endif // (BLE_PROX_MONITOR)\n\n#if (BLE_PROX_REPORTER)\n  case TASK_ID_PROXR:\n    prf_cbs = proxr_prf_itf_get();\n    break;\n#endif // (BLE_PROX_REPORTER)\n\n#if (BLE_SP_SERVER)\n  case TASK_ID_SCPPS:\n    prf_cbs = scpps_prf_itf_get();\n    break;\n#endif // (BLE_SP_SERVER)\n\n#if (BLE_SP_CLIENT)\n  case TASK_ID_SCPPC:\n    prf_cbs = scppc_prf_itf_get();\n    break;\n#endif // (BLE_SP_CLIENT)\n\n#if (BLE_BATT_SERVER)\n  case TASK_ID_BASS:\n    prf_cbs = bass_prf_itf_get();\n    break;\n#endif // (BLE_BATT_SERVER)\n\n#if (BLE_BATT_CLIENT)\n  case TASK_ID_BASC:\n    prf_cbs = basc_prf_itf_get();\n    break;\n#endif // (BLE_BATT_CLIENT)\n\n#if (BLE_HID_DEVICE)\n  case TASK_ID_HOGPD:\n    prf_cbs = hogpd_prf_itf_get();\n    break;\n#endif // (BLE_HID_DEVICE)\n\n#if (BLE_HID_BOOT_HOST)\n  case TASK_ID_HOGPBH:\n    prf_cbs = hogpbh_prf_itf_get();\n    break;\n#endif // (BLE_HID_BOOT_HOST)\n\n#if (BLE_HID_REPORT_HOST)\n  case TASK_ID_HOGPRH:\n    prf_cbs = hogprh_prf_itf_get();\n    break;\n#endif // (BLE_HID_REPORT_HOST)\n\n#if (BLE_GL_COLLECTOR)\n  case TASK_ID_GLPC:\n    prf_cbs = glpc_prf_itf_get();\n    break;\n#endif // (BLE_GL_COLLECTOR)\n\n#if (BLE_GL_SENSOR)\n  case TASK_ID_GLPS:\n    prf_cbs = glps_prf_itf_get();\n    break;\n#endif // (BLE_GL_SENSOR)\n\n#if (BLE_RSC_COLLECTOR)\n  case TASK_ID_RSCPC:\n    prf_cbs = rscpc_prf_itf_get();\n    break;\n#endif // (BLE_RSC_COLLECTOR)\n\n#if (BLE_RSC_SENSOR)\n  case TASK_ID_RSCPS:\n    prf_cbs = rscps_prf_itf_get();\n    break;\n#endif // (BLE_RSC_SENSOR)\n\n#if (BLE_CSC_COLLECTOR)\n  case TASK_ID_CSCPC:\n    prf_cbs = cscpc_prf_itf_get();\n    break;\n#endif // (BLE_CSC_COLLECTOR)\n\n#if (BLE_CSC_SENSOR)\n  case TASK_ID_CSCPS:\n    prf_cbs = cscps_prf_itf_get();\n    break;\n#endif // (BLE_CSC_SENSOR)\n\n#if (BLE_CP_COLLECTOR)\n  case TASK_ID_CPPC:\n    prf_cbs = cppc_prf_itf_get();\n    break;\n#endif // (BLE_CP_COLLECTOR)\n\n#if (BLE_CP_SENSOR)\n  case TASK_ID_CPPS:\n    prf_cbs = cpps_prf_itf_get();\n    break;\n#endif // (BLE_CP_SENSOR)\n\n#if (BLE_LN_COLLECTOR)\n  case TASK_ID_LANC:\n    prf_cbs = lanc_prf_itf_get();\n    break;\n#endif // (BLE_LN_COLLECTOR)\n\n#if (BLE_LN_SENSOR)\n  case TASK_ID_LANS:\n    prf_cbs = lans_prf_itf_get();\n    break;\n#endif // (BLE_LN_SENSOR)\n\n#if (BLE_AN_CLIENT)\n  case TASK_ID_ANPC:\n    prf_cbs = anpc_prf_itf_get();\n    break;\n#endif // (BLE_AN_CLIENT)\n\n#if (BLE_AN_SERVER)\n  case TASK_ID_ANPS:\n    prf_cbs = anps_prf_itf_get();\n    break;\n#endif // (BLE_AN_SERVER)\n\n#if (BLE_PAS_CLIENT)\n  case TASK_ID_PASPC:\n    prf_cbs = paspc_prf_itf_get();\n    break;\n#endif // (BLE_PAS_CLIENT)\n\n#if (BLE_PAS_SERVER)\n  case TASK_ID_PASPS:\n    prf_cbs = pasps_prf_itf_get();\n    break;\n#endif // (BLE_PAS_SERVER)\n\n#ifdef BLE_AM0_HEARING_AID_SERV\n  case TASK_ID_AM0_HAS:\n    prf_cbs = am0_has_prf_itf_get();\n    break;\n#endif // defined(BLE_AM0_HEARING_AID_SERV)\n\n#if (BLE_IPS_SERVER)\n  case TASK_ID_IPSS:\n    prf_cbs = ipss_prf_itf_get();\n    break;\n#endif //(BLE_IPS_SERVER)\n\n#if (BLE_IPS_CLIENT)\n  case TASK_ID_IPSC:\n    prf_cbs = ipsc_prf_itf_get();\n    break;\n#endif //(BLE_IPS_CLIENT)\n\n#if (BLE_ENV_SERVER)\n  case TASK_ID_ENVS:\n    prf_cbs = envs_prf_itf_get();\n    break;\n#endif //(BLE_ENV_SERVER)\n\n#if (BLE_ENV_CLIENT)\n  case TASK_ID_ENVC:\n    prf_cbs = envc_prf_itf_get();\n    break;\n#endif //(BLE_ENV_CLIENT\n\n#if (BLE_WSC_SERVER)\n  case TASK_ID_WSCS:\n    prf_cbs = wscs_prf_itf_get();\n    break;\n#endif //(BLE_WSC_SERVER)\n\n#if (BLE_WSC_CLIENT)\n  case TASK_ID_WSCC:\n    prf_cbs = wscc_prf_itf_get();\n    break;\n#endif //(BLE_WSC_CLIENT\n\n#if (BLE_BCS_SERVER)\n  case TASK_ID_BCSS:\n    prf_cbs = bcss_prf_itf_get();\n    break;\n#endif //(BLE_BCS_SERVER)\n\n#if (BLE_BCS_CLIENT)\n  case TASK_ID_BCSC:\n    prf_cbs = bcsc_prf_itf_get();\n    break;\n#endif //(BLE_BCS_CLIENT)\n\n#if (BLE_UDS_SERVER)\n  case TASK_ID_UDSS:\n    prf_cbs = udss_prf_itf_get();\n    break;\n#endif //(BLE_UDS_SERVER)\n\n#if (BLE_UDS_CLIENT)\n  case TASK_ID_UDSC:\n    prf_cbs = udsc_prf_itf_get();\n    break;\n#endif //(BLE_UDS_CLIENT)\n\n#if (BLE_VOICEPATH)\n  case TASK_ID_VOICEPATH:\n    prf_cbs = voicepath_prf_itf_get();\n    break;\n#endif //(TASK_ID_VOICEPATH)\n\n#if (BLE_OTA)\n  case TASK_ID_OTA:\n    prf_cbs = ota_prf_itf_get();\n    break;\n#endif //(BLE_OTA)\n\n#if (BLE_TOTA)\n  case TASK_ID_TOTA:\n    prf_cbs = tota_prf_itf_get();\n    break;\n#endif //(BLE_TOTA)\n\n#if (BLE_BMS)\n  case TASK_ID_BMS:\n    prf_cbs = bms_prf_itf_get();\n    break;\n#endif //(BLE_BMS)\n\n#if (BLE_ANC_CLIENT)\n  case TASK_ID_ANCC:\n    prf_cbs = ancc_prf_itf_get();\n    break;\n#endif //(BLE_ANC_CLIENT)\n\n#if (BLE_AMS_CLIENT)\n  case TASK_ID_AMSC:\n    prf_cbs = amsc_prf_itf_get();\n    break;\n#endif //(BLE_AMS_CLIENT)\n\n#if (BLE_TILE)\n  case TASK_ID_TILE:\n    prf_cbs = tile_prf_itf_get();\n    break;\n#endif //(TASK_ID_TILE)\n\n#if (ANCS_PROXY_ENABLE)\n  case TASK_ID_ANCSP:\n    prf_cbs = ancs_proxy_prf_itf_get();\n    break;\n  case TASK_ID_AMSP:\n    prf_cbs = ams_proxy_prf_itf_get();\n    break;\n#endif //(ANCS_PROXY_ENABLE)\n\n#if (BLE_GFPS_PROVIDER)\n  case TASK_ID_GFPSP:\n    prf_cbs = gfpsp_prf_itf_get();\n    break;\n#endif //(BLE_GFPS_PROVIDER)\n\n#if (BLE_AI_VOICE)\n  case TASK_ID_AI:\n    prf_cbs = ai_prf_itf_get();\n    break;\n#endif //(BLE_AMA)\n\n#if (BLE_DATAPATH_SERVER)\n  case TASK_ID_DATAPATHPS:\n    prf_cbs = datapathps_prf_itf_get();\n    break;\n#endif //(BLE_DATAPATH_SERVER)\n\n  default: /* Nothing to do */\n    break;\n  }\n\n  return prf_cbs;\n}\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\nvoid prf_init(bool reset) {\n  uint8_t i;\n\n  BLE_FUNC_ENTER();\n\n  BLE_DBG(\">>>>>> prf_create reset %d<<<<<<\\n\", reset);\n  if (!reset) {\n    // FW boot profile initialization\n    for (i = 0; i < BLE_NB_PROFILES; i++) {\n      prf_env.prf[i].env = NULL;\n      prf_env.prf[i].task = TASK_GAPC + i + 1;\n      prf_env.prf[i].id = TASK_ID_INVALID;\n\n      // Initialize Task Descriptor\n      prf_env.prf[i].desc.msg_handler_tab = NULL;\n      prf_env.prf[i].desc.state = NULL;\n      prf_env.prf[i].desc.idx_max = 0;\n      prf_env.prf[i].desc.msg_cnt = 0;\n\n      ke_task_create(prf_env.prf[i].task, &(prf_env.prf[i].desc));\n      BLE_DBG(\"prf_init prf_env.prf[%d].task: %d\\n\", i, prf_env.prf[i].task);\n    }\n  } else {\n    // FW boot profile destruction\n    for (i = 0; i < BLE_NB_PROFILES; i++) {\n      // Get Profile API\n      const struct prf_task_cbs *cbs = prf_itf_get(prf_env.prf[i].id);\n      if (cbs != NULL) {\n        // request to destroy profile\n        cbs->destroy(&(prf_env.prf[i]));\n      }\n      // unregister profile\n      prf_env.prf[i].id = TASK_ID_INVALID;\n      prf_env.prf[i].desc.msg_handler_tab = NULL;\n      prf_env.prf[i].desc.state = NULL;\n      prf_env.prf[i].desc.idx_max = 0;\n      prf_env.prf[i].desc.msg_cnt = 0;\n\n      // Request kernel to flush task messages\n      ke_task_msg_flush(KE_TYPE_GET(prf_env.prf[i].task));\n    }\n  }\n\n  BLE_FUNC_LEAVE();\n}\n\nuint8_t prf_add_profile(struct gapm_profile_task_add_cmd *params,\n                        ke_task_id_t *prf_task) {\n  uint8_t i;\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  BLE_DBG(\">>>>>> prf_add_profile <<<<<<\\n\");\n\n  // retrieve profile callback\n  const struct prf_task_cbs *cbs = prf_itf_get(params->prf_task_id);\n  if (cbs == NULL) {\n    // profile API not available\n    status = GAP_ERR_INVALID_PARAM;\n  }\n\n  // check if profile not already present in task list\n  if (status == GAP_ERR_NO_ERROR) {\n    for (i = 0; i < BLE_NB_PROFILES; i++) {\n      if (prf_env.prf[i].id == params->prf_task_id) {\n        status = GAP_ERR_NOT_SUPPORTED;\n        break;\n      }\n    }\n  }\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // find first available task\n    for (i = 0; i < BLE_NB_PROFILES; i++) {\n      // available task found\n      if (prf_env.prf[i].id == TASK_ID_INVALID) {\n        // initialize profile\n        status = cbs->init(&(prf_env.prf[i]), &(params->start_hdl),\n                           params->app_task, params->sec_lvl, params->param);\n\n        // initialization succeed\n        if (status == GAP_ERR_NO_ERROR) {\n          // register profile\n          prf_env.prf[i].id = params->prf_task_id;\n          *prf_task = prf_env.prf[i].task;\n        }\n        break;\n      }\n    }\n\n    if (i == BLE_NB_PROFILES) {\n      status = GAP_ERR_INSUFF_RESOURCES;\n    }\n  }\n\n  return (status);\n}\n\nvoid prf_create(uint8_t conidx) {\n  uint8_t i;\n  /* simple connection creation handler, nothing to do. */\n\n  BLE_DBG(\">>>>>> prf_create <<<<<<\\n\");\n  // execute create function of each profiles\n  for (i = 0; i < BLE_NB_PROFILES; i++) {\n    // Get Profile API\n    const struct prf_task_cbs *cbs = prf_itf_get(prf_env.prf[i].id);\n    if (cbs != NULL) {\n      // call create callback\n      cbs->create(&(prf_env.prf[i]), conidx);\n    }\n  }\n}\n\nvoid prf_cleanup(uint8_t conidx, uint8_t reason) {\n  uint8_t i;\n  /* simple connection creation handler, nothing to do. */\n\n  BLE_DBG(\">>>>>> prf_cleanup <<<<<<\\n\");\n  // execute create function of each profiles\n  for (i = 0; i < BLE_NB_PROFILES; i++) {\n    // Get Profile API\n    const struct prf_task_cbs *cbs = prf_itf_get(prf_env.prf[i].id);\n    if (cbs != NULL) {\n      // call cleanup callback\n      cbs->cleanup(&(prf_env.prf[i]), conidx, reason);\n    }\n  }\n}\n\nprf_env_t *prf_env_get(uint16_t prf_id) {\n  prf_env_t *env = NULL;\n  uint8_t i;\n  // find if profile present in profile tasks\n  BLE_DBG(\"%s prf_id %d\", __func__, prf_id);\n  for (i = 0; i < BLE_NB_PROFILES; i++) {\n    // check if profile identifier is known\n    if (prf_env.prf[i].id == prf_id) {\n      env = prf_env.prf[i].env;\n      break;\n    }\n  }\n\n  return env;\n}\n\nke_task_id_t prf_src_task_get(prf_env_t *env, uint8_t conidx) {\n  ke_task_id_t task = PERM_GET(env->prf_task, PRF_TASK);\n\n  BLE_DBG(\"%s conidx %d\", __func__, conidx);\n  if (PERM_GET(env->prf_task, PRF_MI)) {\n    task = KE_BUILD_ID(task, conidx);\n  }\n\n  return task;\n}\n\nke_task_id_t prf_dst_task_get(prf_env_t *env, uint8_t conidx) {\n  ke_task_id_t task = PERM_GET(env->app_task, PRF_TASK);\n\n  BLE_DBG(\"%s app_task %d conidx %d\", __func__, env->app_task, conidx);\n  if (PERM_GET(env->app_task, PRF_MI)) {\n    task = KE_BUILD_ID(task, conidx);\n  }\n\n  return task;\n}\n\nke_task_id_t prf_get_id_from_task(ke_msg_id_t task) {\n  ke_task_id_t id = TASK_ID_INVALID;\n  uint8_t idx = KE_IDX_GET(task);\n  uint8_t i;\n  task = KE_TYPE_GET(task);\n\n  BLE_DBG(\"%s task %d\", __func__, task);\n  // find if profile present in profile tasks\n  for (i = 0; i < BLE_NB_PROFILES; i++) {\n    // check if profile identifier is known\n    if (prf_env.prf[i].task == task) {\n      id = prf_env.prf[i].id;\n      break;\n    }\n  }\n\n  return KE_BUILD_ID(id, idx);\n}\n\nke_task_id_t prf_get_task_from_id(ke_msg_id_t id) {\n  ke_task_id_t task = TASK_NONE;\n  uint8_t idx = KE_IDX_GET(id);\n  uint8_t i;\n  id = KE_TYPE_GET(id);\n\n  BLE_DBG(\"%s id %d\", __func__, id);\n  // find if profile present in profile tasks\n  for (i = 0; i < BLE_NB_PROFILES; i++) {\n    // check if profile identifier is known\n    if (prf_env.prf[i].id == id) {\n      task = prf_env.prf[i].task;\n      break;\n    }\n  }\n\n  return KE_BUILD_ID(task, idx);\n}\n\n#endif // (BLE_PROFILES)\n\n/// @} PRF\n"
  },
  {
    "path": "services/ble_profiles/prf/prf_utils.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PRF_UTILS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_PROFILES)\n#if (BLE_SERVER_PRF || BLE_CLIENT_PRF)\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gapc.h\"\n#include \"gattc_task.h\"\n#include \"ke_task.h\"\n#include \"prf_utils.h\"\n#include \n#include \n\n#include \"co_error.h\"\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n#endif /* (BLE_SERVER_PRF || BLE_CLIENT_PRF) */\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n#if (BLE_BATT_SERVER)\nvoid prf_pack_char_pres_fmt(uint8_t *packed_val,\n                            const struct prf_char_pres_fmt *char_pres_fmt) {\n  *packed_val = char_pres_fmt->format;\n  *(packed_val + 1) = char_pres_fmt->exponent;\n  co_write16p(packed_val + 2, char_pres_fmt->unit);\n  *(packed_val + 4) = char_pres_fmt->name_space;\n  co_write16p(packed_val + 5, char_pres_fmt->description);\n}\n#endif // (BLE_BATT_SERVER)\n\n#if (BLE_BATT_CLIENT)\nvoid prf_unpack_char_pres_fmt(const uint8_t *packed_val,\n                              struct prf_char_pres_fmt *char_pres_fmt) {\n\n  char_pres_fmt->format = *packed_val;\n  char_pres_fmt->exponent = *(packed_val + 1);\n  char_pres_fmt->unit = co_read16p(packed_val + 2);\n  char_pres_fmt->name_space = *(packed_val + 4);\n  char_pres_fmt->description = co_read16p(packed_val + 5);\n}\n#endif // (BLE_BATT_CLIENT)\n\n#if (BLE_CLIENT_PRF)\nvoid prf_read_char_send(prf_env_t *prf_env, uint8_t conidx, uint16_t shdl,\n                        uint16_t ehdl, uint16_t valhdl) {\n  struct gattc_read_cmd *req =\n      KE_MSG_ALLOC(GATTC_READ_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                   prf_src_task_get(prf_env, conidx), gattc_read_cmd);\n  // request type\n  req->operation = GATTC_READ;\n  req->nb = 1;\n  req->req.simple.offset = 0;\n  req->req.simple.length = 0;\n  req->req.simple.handle = valhdl;\n\n  // send request to GATT\n  ke_msg_send(req);\n}\n\nvoid prf_register_atthdl2gatt(prf_env_t *prf_env, uint8_t conidx,\n                              struct prf_svc *svc) {\n  if (svc->shdl != ATT_INVALID_HANDLE) {\n    // register profile task in gatt for indication/notifications\n    struct gattc_reg_to_peer_evt_cmd *reg = KE_MSG_ALLOC(\n        GATTC_REG_TO_PEER_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n        prf_src_task_get(prf_env, conidx), gattc_reg_to_peer_evt_cmd);\n\n    reg->operation = GATTC_REGISTER;\n    reg->start_hdl = svc->shdl;\n    reg->end_hdl = svc->ehdl;\n\n    ke_msg_send(reg);\n  }\n}\n\nvoid prf_unregister_atthdl2gatt(prf_env_t *prf_env, uint8_t conidx,\n                                struct prf_svc *svc) {\n  if (svc->shdl != ATT_INVALID_HANDLE) {\n    // un register profile task in gatt for indication/notifications\n    struct gattc_reg_to_peer_evt_cmd *reg = KE_MSG_ALLOC(\n        GATTC_REG_TO_PEER_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n        prf_src_task_get(prf_env, conidx), gattc_reg_to_peer_evt_cmd);\n\n    reg->operation = GATTC_UNREGISTER;\n    reg->start_hdl = svc->shdl;\n    reg->end_hdl = svc->ehdl;\n\n    ke_msg_send(reg);\n  }\n}\n\nvoid prf_disc_svc_send(prf_env_t *prf_env, uint8_t conidx, uint16_t uuid) {\n  // send GATT discover primary services by UUID request\n  struct gattc_sdp_svc_disc_cmd *svc_req =\n      KE_MSG_ALLOC_DYN(GATTC_SDP_SVC_DISC_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(prf_env, conidx),\n                       gattc_sdp_svc_disc_cmd, ATT_UUID_16_LEN);\n\n  // gatt request type: by UUID\n  svc_req->operation = GATTC_SDP_DISC_SVC;\n  // start handle;\n  svc_req->start_hdl = ATT_1ST_REQ_START_HDL;\n  // end handle\n  svc_req->end_hdl = ATT_1ST_REQ_END_HDL;\n\n  // UUID search\n  svc_req->uuid_len = ATT_UUID_16_LEN;\n\n  // set the first two bytes to the value array, LSB to MSB:Health Thermometer\n  // Service UUID first\n  co_write16p(&(svc_req->uuid[0]), uuid);\n\n  // send the message to GATT, which will send back the response when it gets it\n  ke_msg_send(svc_req);\n}\n\nvoid prf_gatt_write(prf_env_t *prf_env, uint8_t conidx, uint16_t handle,\n                    uint8_t *value, uint16_t length, uint8_t operation) {\n  if (handle != ATT_INVALID_HANDLE) {\n    struct gattc_write_cmd *wr_char = KE_MSG_ALLOC_DYN(\n        GATTC_WRITE_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n        prf_src_task_get(prf_env, conidx), gattc_write_cmd, length);\n\n    // Offset\n    wr_char->offset = 0x0000;\n    // cursor always 0\n    wr_char->cursor = 0x0000;\n    // Write Type\n    wr_char->operation = operation;\n    // Characteristic Value attribute handle\n    wr_char->handle = handle;\n    // Value Length\n    wr_char->length = length;\n    // Auto Execute\n    wr_char->auto_execute = true;\n    // Value\n    memcpy(&wr_char->value[0], value, length);\n\n    // Send the message\n    ke_msg_send(wr_char);\n  }\n}\n\nvoid prf_gatt_write_ntf_ind(prf_env_t *prf_env, uint8_t conidx, uint16_t handle,\n                            uint16_t ntf_ind_cfg) {\n  uint8_t value[2];\n\n  // put value in air format\n  co_write16p((&value[0]), ntf_ind_cfg);\n  // write value over GATT\n  prf_gatt_write(prf_env, conidx, handle, value, 2, GATTC_WRITE);\n}\n\nuint8_t prf_check_svc_char_validity(uint8_t nb_chars,\n                                    const struct prf_char_inf *chars,\n                                    const struct prf_char_def *chars_req) {\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t i;\n\n  for (i = 0; ((i < nb_chars) && (status == GAP_ERR_NO_ERROR)); i++) {\n    if (chars[i].char_hdl == ATT_INVALID_HANDLE) {\n      // If Characteristic is not present, check requirements\n      if (chars_req[i].req_flag == ATT_MANDATORY) {\n        status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n      }\n    } else {\n      // If Characteristic is present, check properties\n      if ((chars[i].prop & chars_req[i].prop_mand) != chars_req[i].prop_mand) {\n        status = PRF_ERR_STOP_DISC_WRONG_CHAR_PROP;\n      }\n    }\n  }\n\n  return (status);\n}\n\nuint8_t\nprf_check_svc_char_desc_validity(uint8_t descs_size,\n                                 const struct prf_char_desc_inf *descs,\n                                 const struct prf_char_desc_def *descs_req,\n                                 const struct prf_char_inf *chars) {\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t i;\n\n  for (i = 0; ((i < descs_size) && (status == GAP_ERR_NO_ERROR)); i++) {\n    if (descs[i].desc_hdl == ATT_INVALID_HANDLE) {\n      // If Descriptor is missing, check if it is mandatory\n      if (descs_req[i].req_flag == ATT_MANDATORY) {\n        // Check if Char is present\n        if (chars[descs_req[i].char_code].char_hdl != ATT_INVALID_HANDLE) {\n          // Char. is present and descriptor not, error\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n      }\n    }\n  }\n\n  return (status);\n}\n\nvoid prf_extract_svc_info(const struct gattc_sdp_svc_ind *param,\n                          uint8_t nb_chars,\n                          const struct prf_char_def *chars_req,\n                          struct prf_char_inf *chars, uint8_t nb_descs,\n                          const struct prf_char_desc_def *descs_req,\n                          struct prf_char_desc_inf *descs) {\n  // Counters\n  uint8_t svc_char;\n  uint8_t svc_desc;\n  uint8_t fnd_att;\n\n  for (fnd_att = 0; fnd_att < (param->end_hdl - param->start_hdl); fnd_att++) {\n    if (param->info[fnd_att].att_type == GATTC_SDP_ATT_CHAR) {\n      uint16_t char_hdl = param->start_hdl + 1 + fnd_att;\n      uint16_t val_hdl = param->info[fnd_att].att_char.handle;\n      uint8_t val_prop = param->info[fnd_att].att_char.prop;\n      uint8_t char_idx = fnd_att;\n\n      // check that value handle is in a valid range\n      if ((val_hdl <= param->end_hdl) &&\n          (val_hdl > (param->start_hdl + fnd_att))) {\n        // retrieve value index\n        uint8_t val_idx = (val_hdl - param->start_hdl - 1);\n\n        // Look over requested characteristics\n        for (svc_char = 0; svc_char < nb_chars; svc_char++) {\n          // check if attribute is valid\n          if ((chars[svc_char].char_hdl == ATT_INVALID_HDL) &&\n              attm_uuid16_comp((uint8_t *)param->info[val_idx].att.uuid,\n                               param->info[val_idx].att.uuid_len,\n                               chars_req[svc_char].uuid)) {\n            // Save properties and handles\n            chars[svc_char].char_hdl = char_hdl;\n            chars[svc_char].val_hdl = val_hdl;\n            chars[svc_char].prop = val_prop;\n\n            // find end of characteristic handle and discover descriptors\n            do {\n              fnd_att++;\n\n              // found a descriptor\n              if (param->info[fnd_att].att_type == GATTC_SDP_ATT_DESC) {\n                // Retrieve characteristic descriptor handle using UUID\n                for (svc_desc = 0; svc_desc < nb_descs; svc_desc++) {\n                  // check if it's expected descriptor\n                  if ((descs[svc_desc].desc_hdl == ATT_INVALID_HANDLE) &&\n                      (descs_req[svc_desc].char_code == svc_char) &&\n                      (attm_uuid16_comp(\n                          (uint8_t *)param->info[fnd_att].att.uuid,\n                          param->info[fnd_att].att.uuid_len,\n                          descs_req[svc_desc].uuid))) {\n                    descs[svc_desc].desc_hdl = param->start_hdl + 1 + fnd_att;\n                    // search for next descriptor\n                    break;\n                  }\n                }\n              }\n            } while (((param->start_hdl + 1 + fnd_att) <= param->end_hdl) &&\n                     (param->info[fnd_att].att_type != GATTC_SDP_ATT_CHAR) &&\n                     (param->info[fnd_att].att_type != GATTC_SDP_INC_SVC));\n\n            // return to previous valid value\n            fnd_att--;\n            // previous handle was end of the characteristic\n            chars[svc_char].char_ehdl_off = fnd_att - char_idx;\n\n            // search next characteristic\n            break;\n          }\n        }\n      }\n    }\n  }\n}\n\n#endif //(BLE_CLIENT_PRF)\n\n#if (BLE_CLIENT_PRF || BLE_TIP_SERVER || BLE_AN_SERVER || BLE_PAS_SERVER)\n\nvoid prf_client_att_info_rsp(prf_env_t *prf_env, uint8_t conidx,\n                             uint16_t msg_id, uint8_t status,\n                             struct gattc_read_ind const *read_ind) {\n  // retrieve value length\n  uint16_t length = 0;\n  if (status == GAP_ERR_NO_ERROR) {\n    length = read_ind->length;\n  }\n\n  // prepare response\n  struct prf_att_info *rsp =\n      KE_MSG_ALLOC_DYN(msg_id, prf_dst_task_get(prf_env, conidx),\n                       prf_src_task_get(prf_env, conidx), prf_att_info, length);\n\n  rsp->status = status;\n  rsp->handle = ATT_INVALID_HDL;\n  rsp->length = length;\n\n  // set value array\n  if (read_ind != NULL) {\n    rsp->handle = read_ind->handle;\n    memcpy(&(rsp->value[0]), &(read_ind->value[0]), length);\n  }\n\n  ke_msg_send(rsp);\n}\n#endif //(BLE_CLIENT_PRF || BLE_TIP_SERVER || BLE_AN_SERVER || BLE_PAS_SERVER)\n\n#if ((BLE_SERVER_PRF || BLE_CLIENT_PRF))\n\nuint8_t prf_pack_date_time(uint8_t *packed_date,\n                           const struct prf_date_time *date_time) {\n  co_write16p(packed_date, date_time->year);\n  *(packed_date + 2) = date_time->month;\n  *(packed_date + 3) = date_time->day;\n  *(packed_date + 4) = date_time->hour;\n  *(packed_date + 5) = date_time->min;\n  *(packed_date + 6) = date_time->sec;\n\n  return 7;\n}\nuint8_t prf_unpack_date_time(uint8_t *packed_date,\n                             struct prf_date_time *date_time) {\n  date_time->year = co_read16p(&(packed_date[0]));\n  date_time->month = packed_date[2];\n  date_time->day = packed_date[3];\n  date_time->hour = packed_date[4];\n  date_time->min = packed_date[5];\n  date_time->sec = packed_date[6];\n\n  return 7;\n}\n\n#endif /* ((BLE_SERVER_PRF || BLE_CLIENT_PRF)) */\n#endif // (BLE_PROFILES)\n/// @} PRF_UTILS\n"
  },
  {
    "path": "services/ble_profiles/prf/prf_utils_128.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PRF_UTILS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_CLIENT_PRF)\n#include \"attm.h\"\n#include \"co_error.h\"\n#include \"gap.h\"\n#include \"gapc.h\"\n#include \"gattc_task.h\"\n#include \"ke_mem.h\"\n#include \"ke_task.h\"\n#include \"prf_utils_128.h\"\n#include \n#include \n#endif //(BLE_CLIENT_PRF)\n\n#if (BLE_CLIENT_PRF)\n\nvoid prf_disc_svc_send_128(prf_env_t *prf_env, uint8_t conidx,\n                           uint8_t *uuid_128) {\n  // send GATT discover primary services by UUID request: find by type request\n  struct gattc_disc_cmd *svc_req = KE_MSG_ALLOC_DYN(\n      GATTC_SDP_SVC_DISC_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n      prf_src_task_get(prf_env, conidx), gattc_disc_cmd, ATT_UUID_128_LEN);\n\n  // gatt request type: by UUID\n  svc_req->operation = GATTC_SDP_DISC_SVC;\n  // start handle;\n  svc_req->start_hdl = ATT_1ST_REQ_START_HDL;\n  // end handle\n  svc_req->end_hdl = ATT_1ST_REQ_END_HDL;\n\n  // UUID search\n  svc_req->uuid_len = ATT_UUID_128_LEN;\n\n  // set 128 bit UUID for searching\n  memcpy(&svc_req->uuid[0], uuid_128, (sizeof(uint8_t) * ATT_UUID_128_LEN));\n\n  // send the message to GATT, which will send back the response when it gets it\n  ke_msg_send(svc_req);\n}\n\nuint8_t\nprf_check_svc_char_validity_128(uint8_t nb_chars,\n                                const struct prf_char_inf *chars,\n                                const struct prf_char_def_128 *chars_req) {\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t i;\n\n  for (i = 0; ((i < nb_chars) && (status == GAP_ERR_NO_ERROR)); i++) {\n    if (chars[i].char_hdl == ATT_INVALID_HANDLE) {\n      // If Characteristic is not present, check requirements\n      if (chars_req[i].req_flag == ATT_MANDATORY) {\n        status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n      }\n    } else {\n      // If Characteristic is present, check properties\n      if ((chars[i].prop & chars_req[i].prop_mand) != chars_req[i].prop_mand) {\n        status = PRF_ERR_STOP_DISC_WRONG_CHAR_PROP;\n      }\n    }\n  }\n\n  return status;\n}\n\nvoid prf_extract_svc_info_128(const struct gattc_sdp_svc_ind *param,\n                              uint8_t nb_chars,\n                              const struct prf_char_def_128 *chars_req,\n                              struct prf_char_inf *chars, uint8_t nb_descs,\n                              const struct prf_char_desc_def *descs_req,\n                              struct prf_char_desc_inf *descs) {\n  // Counters\n  uint8_t svc_char;\n  uint8_t svc_desc;\n  uint8_t fnd_att;\n\n  for (fnd_att = 0; fnd_att < (param->end_hdl - param->start_hdl); fnd_att++) {\n    if (param->info[fnd_att].att_type == GATTC_SDP_ATT_CHAR) {\n      uint16_t char_hdl = param->start_hdl + 1 + fnd_att;\n      uint16_t val_hdl = param->info[fnd_att].att_char.handle;\n      uint8_t val_prop = param->info[fnd_att].att_char.prop;\n      uint8_t char_idx = fnd_att;\n\n      // check that value handle is in a valid range\n      if ((val_hdl <= param->end_hdl) &&\n          (val_hdl > (param->start_hdl + fnd_att))) {\n        // retrieve value index\n        uint8_t val_idx = (val_hdl - param->start_hdl - 1);\n\n        // Look over requested characteristics\n        for (svc_char = 0; svc_char < nb_chars; svc_char++) {\n          // check if attribute is valid\n          if ((chars[svc_char].char_hdl == ATT_INVALID_HDL) &&\n              attm_uuid_comp(\n                  (uint8_t *)param->info[val_idx].att.uuid, ATT_UUID_128_LEN,\n                  (uint8_t *)chars_req[svc_char].uuid, ATT_UUID_128_LEN)) {\n            // Save properties and handles\n            chars[svc_char].char_hdl = char_hdl;\n            chars[svc_char].val_hdl = val_hdl;\n            chars[svc_char].prop = val_prop;\n\n            // find end of characteristic handle and discover descriptors\n            do {\n              fnd_att++;\n\n              // found a descriptor\n              if (param->info[fnd_att].att_type == GATTC_SDP_ATT_DESC) {\n                // Retrieve characteristic descriptor handle using UUID\n                for (svc_desc = 0; svc_desc < nb_descs; svc_desc++) {\n                  // check if it's expected descriptor\n                  if ((descs[svc_desc].desc_hdl == ATT_INVALID_HANDLE) &&\n                      (descs_req[svc_desc].char_code == svc_char) &&\n                      (attm_uuid16_comp(\n                          (uint8_t *)param->info[fnd_att].att.uuid,\n                          param->info[fnd_att].att.uuid_len,\n                          descs_req[svc_desc].uuid))) {\n                    descs[svc_desc].desc_hdl = param->start_hdl + 1 + fnd_att;\n                    // search for next descriptor\n                    break;\n                  }\n                }\n              }\n            } while (((param->start_hdl + 1 + fnd_att) <= param->end_hdl) &&\n                     (param->info[fnd_att].att_type != GATTC_SDP_ATT_CHAR) &&\n                     (param->info[fnd_att].att_type != GATTC_SDP_INC_SVC));\n\n            // return to previous valid value\n            fnd_att--;\n            // previous handle was end of the characteristic\n            chars[svc_char].char_ehdl_off = fnd_att - char_idx;\n\n            // search next characteristic\n            break;\n          }\n        }\n      }\n    }\n  }\n}\n\n#endif /*(BLE_SAMPLE128_CLIENT) */\n\n/// @} PRF_UTILS\n"
  },
  {
    "path": "services/ble_profiles/prox/proxm/api/proxm_task.h",
    "content": "#ifndef PROXM_TASK_H_\n#define PROXM_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PROXMTASK Proximity Monitor Task\n * @ingroup PROXM\n * @brief Proximity Monitor Task\n *\n * The Proximity Monitor Task is responsible for handling the API messages received from\n * either the Application or internal tasks.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n#include \"prf_types.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Max number of characteristics for all services\n#define PROXM_CHAR_NB_MAX   1\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n///Proximity Monitor API messages\nenum\n{\n    ///Proximity Monitor role enable request from application.\n    PROXM_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_PROXM),\n    /// Proximity Monitor role enable confirmation to application.\n    PROXM_ENABLE_RSP,\n\n    /// Read LLS Alert or TX Power Level - request\n    PROXM_RD_REQ,\n    /// Read LLS Alert or TX Power Level - response\n    PROXM_RD_RSP,\n\n    ///Set Alert level\n    PROXM_WR_ALERT_LVL_REQ,\n    ///Set Alert level response\n    PROXM_WR_ALERT_LVL_RSP,\n};\n\nenum\n{\n    PROXM_LK_LOSS_SVC,\n    PROXM_IAS_SVC,\n    PROXM_TX_POWER_SVC,\n\n    PROXM_SVC_NB\n};\n\n/*\n * API Messages Structures\n ****************************************************************************************\n */\n\n/// Service information\nstruct svc_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    /// - Alert Level for IAS and LLS\n    /// - TX Power Level for TXPS\n    struct prf_char_inf characts[PROXM_CHAR_NB_MAX];\n};\n\n/// Proximity monitor enable command structure\nstruct proxm_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n\n    /// Reporter LLS details kept in APP\n    struct svc_content lls;\n    /// Reporter IAS details kept in APP\n    struct svc_content ias;\n    /// Reporter TPS details kept in APP\n    struct svc_content txps;\n};\n\n/// Proximity monitor enable confirm structure\nstruct proxm_enable_rsp\n{\n    /// Status\n    uint8_t status;\n\n    /// Reporter LLS details to keep in APP\n    struct svc_content lls;\n    /// Reporter IAS details to keep in APP\n    struct svc_content ias;\n    /// Reporter TPS details to keep in APP\n    struct svc_content txps;\n};\n\n\n///Parameters of the @ref PROXM_WR_ALERT_LVL_REQ message\nstruct proxm_wr_alert_lvl_req\n{\n    /// 0=LLS or 1=IAS, code for the service in which the alert level should be written\n    uint8_t  svc_code;\n    /// Alert level\n    uint8_t  lvl;\n};\n\n///Parameters of the @ref PROXM_WR_ALERT_LVL_RSP message\nstruct proxm_wr_alert_lvl_rsp\n{\n    /// Write characteristic response status code, may be GATT code or ATT error code.\n    uint8_t  status;\n};\n\n///Parameters of the @ref PROXM_RD_REQ message\nstruct proxm_rd_req\n{\n    /// 0=LLS or 1=TXPS, code for the service in which the alert level should be read\n    uint8_t  svc_code;\n};\n\n/// Parameters of the @ref PROXM_RD_RSP message\nstruct proxm_rd_rsp\n{\n    /// 0=LLS or 1=TXPS, code for the service in which the alert level should be read\n    uint8_t  svc_code;\n    /// Status\n    uint8_t  status;\n    /// Value\n    uint8_t value;\n};\n\n\n\n/// @} PROXMTASK\n\n#endif // PROXM_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/prox/proxm/src/proxm.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PROXM\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_PROX_MONITOR)\n\n#include \"gap.h\"\n#include \"prf_utils.h\"\n#include \"proxm.h\"\n#include \"proxm_task.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialization of the PROXM module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t proxm_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct proxm_env_tag *proxm_env = (struct proxm_env_tag *)ke_malloc(\n      sizeof(struct proxm_env_tag), KE_MEM_ATT_DB);\n\n  // allocate PROXM required environment variable\n  env->env = (prf_env_t *)proxm_env;\n\n  proxm_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  proxm_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_PROXM;\n  proxm_task_init(&(env->desc));\n\n  for (idx = 0; idx < PROXM_IDX_MAX; idx++) {\n    proxm_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), PROXM_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the PROXM module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void proxm_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct proxm_env_tag *proxm_env = (struct proxm_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < PROXM_IDX_MAX; idx++) {\n    if (proxm_env->env[idx] != NULL) {\n      ke_free(proxm_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(proxm_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void proxm_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put PROX Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), PROXM_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void proxm_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct proxm_env_tag *proxm_env = (struct proxm_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (proxm_env->env[conidx] != NULL) {\n    ke_free(proxm_env->env[conidx]);\n    proxm_env->env[conidx] = NULL;\n  }\n\n  /* Put PROX Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), PROXM_FREE);\n}\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// PROXM Task interface required by profile manager\nconst struct prf_task_cbs proxm_itf = {\n    (prf_init_fnct)proxm_init,\n    proxm_destroy,\n    proxm_create,\n    proxm_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *proxm_prf_itf_get(void) { return &proxm_itf; }\n\nvoid proxm_enable_rsp_send(struct proxm_env_tag *proxm_env, uint8_t conidx,\n                           uint8_t status) {\n  // format response to app\n  struct proxm_enable_rsp *cfm = KE_MSG_ALLOC(\n      PROXM_ENABLE_RSP, prf_dst_task_get(&(proxm_env->prf_env), conidx),\n      prf_src_task_get(&(proxm_env->prf_env), conidx), proxm_enable_rsp);\n\n  cfm->lls = proxm_env->env[conidx]->prox[PROXM_LK_LOSS_SVC];\n  cfm->ias = proxm_env->env[conidx]->prox[PROXM_IAS_SVC];\n  cfm->txps = proxm_env->env[conidx]->prox[PROXM_TX_POWER_SVC];\n  cfm->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    // Go to IDLE state\n    ke_state_set(prf_src_task_get(&(proxm_env->prf_env), conidx), PROXM_IDLE);\n  } else {\n    // clean-up environment variable allocated for task instance\n    ke_free(proxm_env->env[conidx]);\n    proxm_env->env[conidx] = NULL;\n  }\n\n  ke_msg_send(cfm);\n}\n\nuint8_t proxm_validate_request(struct proxm_env_tag *proxm_env, uint8_t conidx,\n                               uint8_t char_code) {\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // check if feature val characteristic exists\n  if (proxm_env->env[conidx]->prox[char_code].characts[0].val_hdl ==\n      ATT_INVALID_HANDLE) {\n    status = PRF_ERR_INEXISTENT_HDL;\n  }\n\n  return (status);\n}\n\n#endif // BLE_PROX_MONITOR\n\n/// @} PROXM\n"
  },
  {
    "path": "services/ble_profiles/prox/proxm/src/proxm.h",
    "content": "#ifndef PROXM_H_\n#define PROXM_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PROX Proximity Profile\n * @ingroup PROFILE\n * @brief Proximity Profile\n *\n * The PROX module is the responsible block for implementing the proximity profile\n * functionalities in the BLE Host.\n *\n * The Proximity Profile defines the functionality required in a device that can\n * alert the user when the user's personal device moves further away or closer together\n * to another communicating device.\n *****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @addtogroup PROXM Proximity Monitor\n * @ingroup PROX\n * @brief Proximity Profile Monitor\n *\n * The PROXM is responsible for providing proximity profile monitor functionalities to\n * upper layer module or application. The device using this profile takes the role\n * of a proximity monitor role.\n *\n * Proximity Monitor (PM): A PM (e.g. PC, phone, electronic door entry system, etc)\n * is the term used by this profile to describe a device that monitors the distance\n * between itself and the connected PR device. The profile on the PM device constantly\n * monitors the path loss between itself and the communicating Proximity Reporter\n * device. The profile provides indications to an application which can cause an alert\n * to the user.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_PROX_MONITOR)\n\n#include \"proxm_task.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of Proximity Monitor task instances\n#define PROXM_IDX_MAX    (BLE_CONNECTION_MAX)\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n/// Possible states of the PROXM task\nenum proxm_state\n{\n    /// FREE state\n    PROXM_FREE,\n    /// IDLE state\n    PROXM_IDLE,\n    /// Busy state\n    PROXM_BUSY,\n    ///Discovering\n    PROXM_DISCOVERING,\n\n    /// Number of defined states.\n    PROXM_STATE_MAX\n};\n\n\n/// Characteristics Link loss\nenum\n{\n    PROXM_LK_LOSS_CHAR,\n\n    PROXM_LK_LOSS_CHAR_MAX,\n};\n\n/// Characteristics IAS\nenum\n{\n    PROXM_IAS_CHAR,\n\n    PROXM_IAS_CHAR_MAX,\n};\n\n/// Characteristics Tx power\nenum\n{\n    PROXM_TX_POWER_CHAR,\n\n    PROXM_TX_POWER_CHAR_MAX,\n};\n\n/// Max characteristic number on services\nenum\n{\n    PROXM_SVCS_CHAR_NB = 1\n};\n\n///Link Loss or Immediate Alert code for setting alert through one message\nenum\n{\n    ///Code for LLS Alert Level Char.\n    PROXM_SET_LK_LOSS_ALERT = 0x00,\n    ///Code for IAS Alert Level Char.\n    PROXM_SET_IMMDT_ALERT,\n};\n\n/// Read Characteristic Code\nenum\n{\n    /// Read Link Loss Service Alert Level Characteristic Value\n    PROXM_RD_LL_ALERT_LVL = 0x00,\n    /// Read TX Power Service TX Power Level Characteristic Value\n    PROXM_RD_TX_POWER_LVL,\n};\n\n///Alert Level Values\nenum\n{\n    PROXM_ALERT_NONE    = 0x00,\n    PROXM_ALERT_MILD,\n    PROXM_ALERT_HIGH,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n\n/// Proximity Monitor environment variable per connection\nstruct proxm_cnx_env\n{\n    /// Last service for which something was discovered\n    uint8_t last_svc_req;\n    /// counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// used to store if measurement context\n    uint8_t meas_ctx_en;\n\n    struct svc_content prox[PROXM_SVC_NB];\n};\n\n/// Proximity monitor environment variable\nstruct proxm_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct proxm_cnx_env* env[PROXM_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[PROXM_IDX_MAX];\n};\n\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve Proximity service profile interface\n *\n * @return Proximity service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* proxm_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send enable confirmation to application.\n * @param status Status of the enable: either OK or error encountered while discovery.\n ****************************************************************************************\n */\nvoid proxm_enable_rsp_send(struct proxm_env_tag *proxm_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Check if collector request is possible or not\n *\n * @param[in] proxm_env Client environment.\n * @param[in] conidx    Connection Index.\n * @param[in] char_code Characteristic number.\n *\n * @return GAP_ERR_NO_ERROR if request can be performed, error code else.\n ****************************************************************************************\n */\nuint8_t proxm_validate_request(struct proxm_env_tag *proxm_env, uint8_t conidx, uint8_t char_code);\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid proxm_task_init(struct ke_task_desc *task_desc);\n\n#endif //BLE_PROX_MONITOR\n\n/// @} PROXM\n\n#endif // PROXM_H_\n"
  },
  {
    "path": "services/ble_profiles/prox/proxm/src/proxm_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PROXMTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_PROX_MONITOR)\n#include \"co_utils.h\"\n\n#include \"gap.h\"\n#include \"gapc.h\"\n#include \"gattc_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n#include \"proxm.h\"\n#include \"proxm_task.h\"\n\n#include \"ke_mem.h\"\n\n///// State machine used to retrieve services characteristics information\n\nconst struct prf_char_def proxm_svc_char[PROXM_SVC_NB][PROXM_SVCS_CHAR_NB] = {\n    [PROXM_LK_LOSS_SVC] = {{ATT_CHAR_ALERT_LEVEL, ATT_MANDATORY,\n                            ATT_CHAR_PROP_RD | ATT_CHAR_PROP_WR}},\n\n    [PROXM_IAS_SVC] = {{ATT_CHAR_ALERT_LEVEL, ATT_MANDATORY,\n                        ATT_CHAR_PROP_WR_NO_RESP}},\n\n    [PROXM_TX_POWER_SVC] = {\n        {ATT_CHAR_TX_POWER_LEVEL, ATT_MANDATORY, ATT_CHAR_PROP_RD}}};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Enable the Proximity Monitor role, used after connection.\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int proxm_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct proxm_enable_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Proximity Monitor Environment\n  struct proxm_env_tag *proxm_env = PRF_ENV_GET(PROXM, proxm);\n\n  ASSERT_INFO(proxm_env != NULL, dest_id, src_id);\n  if ((state == PROXM_IDLE) && (proxm_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    proxm_env->env[conidx] = (struct proxm_cnx_env *)ke_malloc(\n        sizeof(struct proxm_cnx_env), KE_MEM_ATT_DB);\n    memset(proxm_env->env[conidx], 0, sizeof(struct proxm_cnx_env));\n\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      proxm_env->env[conidx]->last_svc_req = PROXM_LK_LOSS_SVC;\n      prf_disc_svc_send(&(proxm_env->prf_env), conidx, ATT_SVC_LINK_LOSS);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, PROXM_DISCOVERING);\n    } else {\n      proxm_env->env[conidx]->prox[PROXM_LK_LOSS_SVC] = param->lls;\n      proxm_env->env[conidx]->prox[PROXM_IAS_SVC] = param->ias;\n      proxm_env->env[conidx]->prox[PROXM_TX_POWER_SVC] = param->txps;\n\n      // send APP confirmation that can start normal connection to TH\n      proxm_enable_rsp_send(proxm_env, conidx, GAP_ERR_NO_ERROR);\n    }\n\n  } else if (state != PROXM_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    proxm_enable_rsp_send(proxm_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref PROXM_RD_REQ message.\n * Request to read the LLS alert level.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int proxm_rd_req_handler(ke_msg_id_t const msgid,\n                                  struct proxm_rd_req const *param,\n                                  ke_task_id_t const dest_id,\n                                  ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t current_svc = PROXM_SVC_NB;\n\n  if (state == PROXM_IDLE) {\n    struct proxm_env_tag *proxm_env = PRF_ENV_GET(PROXM, proxm);\n\n    ASSERT_INFO(proxm_env != NULL, dest_id, src_id);\n\n    // environment variable not ready\n    if (proxm_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else {\n      // Get the request type and handle value for this type of write\n      switch (param->svc_code) {\n      case PROXM_RD_LL_ALERT_LVL:\n        current_svc = PROXM_LK_LOSS_SVC;\n        status = proxm_validate_request(proxm_env, conidx, PROXM_LK_LOSS_SVC);\n        break;\n      case PROXM_RD_TX_POWER_LVL:\n        current_svc = PROXM_TX_POWER_SVC;\n        status = proxm_validate_request(proxm_env, conidx, PROXM_TX_POWER_SVC);\n        break;\n      default:\n        current_svc = PROXM_SVC_NB;\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        prf_read_char_send(\n            &(proxm_env->prf_env), conidx,\n            proxm_env->env[conidx]->prox[current_svc].characts[0].char_hdl,\n            proxm_env->env[conidx]->prox[current_svc].characts[0].char_ehdl_off,\n            proxm_env->env[conidx]->prox[current_svc].characts[0].val_hdl);\n        // wait for end of read request\n        proxm_env->env[conidx]->last_svc_req = param->svc_code;\n\n        ke_state_set(dest_id, PROXM_BUSY);\n      }\n    }\n\n    // request cannot be performed\n    if (status != GAP_ERR_NO_ERROR) {\n      struct proxm_rd_rsp *rsp =\n          KE_MSG_ALLOC(PROXM_RD_RSP, src_id, dest_id, proxm_rd_rsp);\n      rsp->svc_code = param->svc_code;\n      // set error status\n      rsp->status = status;\n      ke_msg_send(rsp);\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref PROXM_WR_ALERT_LVL_REQ message.\n * Request to write either the LLS or IAS alert levels.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int proxm_wr_alert_lvl_req_handler(\n    ke_msg_id_t const msgid, struct proxm_wr_alert_lvl_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t operation = 0x00;\n  uint16_t val_hdl = 0x0000;\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  struct proxm_env_tag *proxm_env = PRF_ENV_GET(PROXM, proxm);\n\n  if (state == PROXM_IDLE) {\n    ASSERT_INFO(proxm_env != NULL, dest_id, src_id);\n\n    // environment variable not ready\n    if (proxm_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else {\n      // Alert level only has 3 values, other not useful\n      if (param->lvl <= PROXM_ALERT_HIGH) {\n        // Get the request type and handle value for this type of write\n        switch (param->svc_code) {\n        case PROXM_SET_LK_LOSS_ALERT:\n          operation = GATTC_WRITE;\n          val_hdl = proxm_env->env[conidx]\n                        ->prox[PROXM_LK_LOSS_SVC]\n                        .characts[0]\n                        .val_hdl;\n          break;\n        case PROXM_SET_IMMDT_ALERT:\n          operation = GATTC_WRITE_NO_RESPONSE;\n          val_hdl =\n              proxm_env->env[conidx]->prox[PROXM_IAS_SVC].characts[0].val_hdl;\n          break;\n        default:\n          status = PRF_ERR_INVALID_PARAM;\n          break;\n        }\n\n        if (status == GAP_ERR_NO_ERROR) {\n          // Send GATT Write Request\n          prf_gatt_write(&(proxm_env->prf_env), conidx, val_hdl,\n                         (uint8_t *)¶m->lvl, sizeof(uint8_t), operation);\n          // wait for end of write request\n          ke_state_set(dest_id, PROXM_BUSY);\n        }\n      } else {\n        // wrong level - not one of the possible 3\n        status = PRF_ERR_INVALID_PARAM;\n      }\n    }\n    // An error occurs, send the response with error status\n    if (status != GAP_ERR_NO_ERROR) {\n      struct proxm_wr_alert_lvl_rsp *rsp = KE_MSG_ALLOC(\n          PROXM_WR_ALERT_LVL_RSP, src_id, dest_id, proxm_wr_alert_lvl_rsp);\n      // set error status\n      rsp->status = status;\n\n      ke_msg_send(rsp);\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == PROXM_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    uint16_t current_svc = PROXM_SVC_NB;\n    const struct prf_char_def *current_char_def;\n\n    struct proxm_env_tag *proxm_env = PRF_ENV_GET(PROXM, proxm);\n\n    ASSERT_INFO(proxm_env != NULL, dest_id, src_id);\n    ASSERT_INFO(proxm_env->env[conidx] != NULL, dest_id, src_id);\n\n    // check if a valid service is found\n    if (attm_uuid16_comp((unsigned char *)ind->uuid, ind->uuid_len,\n                         ATT_SVC_LINK_LOSS)) {\n      current_svc = PROXM_LK_LOSS_SVC;\n      current_char_def = &proxm_svc_char[PROXM_LK_LOSS_SVC][PROXM_LK_LOSS_CHAR];\n    } else if (attm_uuid16_comp((unsigned char *)ind->uuid, ind->uuid_len,\n                                ATT_SVC_IMMEDIATE_ALERT)) {\n      current_svc = PROXM_IAS_SVC;\n      current_char_def = &proxm_svc_char[PROXM_IAS_SVC][PROXM_IAS_CHAR];\n    } else if (attm_uuid16_comp((unsigned char *)ind->uuid, ind->uuid_len,\n                                ATT_SVC_TX_POWER)) {\n      current_svc = PROXM_TX_POWER_SVC;\n      current_char_def =\n          &proxm_svc_char[PROXM_TX_POWER_SVC][PROXM_TX_POWER_CHAR];\n    }\n\n    // if a valid service found, put it into environment variable\n    if (current_svc != PROXM_SVC_NB) {\n      prf_extract_svc_info(ind, PROXM_CHAR_NB_MAX, current_char_def,\n                           proxm_env->env[conidx]->prox[current_svc].characts,\n                           0, NULL, NULL);\n\n      proxm_env->env[conidx]->prox[current_svc].svc.shdl = ind->start_hdl;\n      proxm_env->env[conidx]->prox[current_svc].svc.ehdl = ind->end_hdl;\n\n      proxm_env->env[conidx]->nb_svc++;\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  // Get the address of the environment\n  struct proxm_env_tag *proxm_env = PRF_ENV_GET(PROXM, proxm);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint16_t current_att_svc = ATT_INVALID_UUID;\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  if (state == PROXM_DISCOVERING) {\n    status = prf_check_svc_char_validity(\n        PROXM_SVCS_CHAR_NB,\n        proxm_env->env[conidx]\n            ->prox[proxm_env->env[conidx]->last_svc_req]\n            .characts,\n        proxm_svc_char[proxm_env->env[conidx]->last_svc_req]);\n\n    // Too many services found only one such service should exist\n    if (proxm_env->env[conidx]->nb_svc > 1) {\n      status = PRF_ERR_MULTIPLE_SVC;\n    }\n    // if an error append, send confirmation with error status and stop\n    // discovering\n    if (status != GAP_ERR_NO_ERROR) {\n      proxm_enable_rsp_send(proxm_env, conidx, status);\n    }\n    // if a valid service found, discover and then send confirmation message\n    else {\n      proxm_env->env[conidx]->nb_svc = 0;\n      proxm_env->env[conidx]->last_svc_req += 1;\n\n      if ((proxm_env->env[conidx]->last_svc_req) < PROXM_SVC_NB) {\n        switch (proxm_env->env[conidx]->last_svc_req) {\n        case PROXM_LK_LOSS_SVC:\n          current_att_svc = ATT_SVC_LINK_LOSS;\n          break;\n        case PROXM_IAS_SVC:\n          current_att_svc = ATT_SVC_IMMEDIATE_ALERT;\n          break;\n        case PROXM_TX_POWER_SVC:\n          current_att_svc = ATT_SVC_TX_POWER;\n          break;\n        default:\n          break;\n        }\n\n        prf_disc_svc_send(&(proxm_env->prf_env), conidx, current_att_svc);\n      } else {\n        proxm_enable_rsp_send(proxm_env, conidx, GAP_ERR_NO_ERROR);\n      }\n    }\n  } else if (state == PROXM_BUSY) {\n    switch (param->operation) {\n    case GATTC_WRITE:\n    case GATTC_WRITE_NO_RESPONSE: {\n      struct proxm_wr_alert_lvl_rsp *rsp =\n          KE_MSG_ALLOC(PROXM_WR_ALERT_LVL_RSP,\n                       prf_dst_task_get(&(proxm_env->prf_env), conidx),\n                       prf_src_task_get(&(proxm_env->prf_env), conidx),\n                       proxm_wr_alert_lvl_rsp);\n      // set error status\n      rsp->status = param->status;\n      ke_msg_send(rsp);\n\n      ke_state_set(dest_id, PROXM_IDLE);\n    } break;\n\n    case GATTC_READ: {\n      if (param->status != GAP_ERR_NO_ERROR) {\n        struct proxm_rd_rsp *rsp = KE_MSG_ALLOC(\n            PROXM_RD_RSP, prf_dst_task_get(&(proxm_env->prf_env), conidx),\n            prf_src_task_get(&(proxm_env->prf_env), conidx), proxm_rd_rsp);\n        // set error status\n        rsp->status = param->status;\n        rsp->svc_code = proxm_env->env[conidx]->last_svc_req;\n        ke_msg_send(rsp);\n      }\n      ke_state_set(dest_id, PROXM_IDLE);\n    } break;\n    default:\n      break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == PROXM_BUSY) {\n    struct proxm_env_tag *proxm_env = PRF_ENV_GET(PROXM, proxm);\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    ASSERT_INFO(proxm_env != NULL, dest_id, src_id);\n    ASSERT_INFO(proxm_env->env[conidx] != NULL, dest_id, src_id);\n\n    struct proxm_rd_rsp *rsp = KE_MSG_ALLOC(\n        PROXM_RD_RSP, prf_dst_task_get(&(proxm_env->prf_env), conidx), dest_id,\n        proxm_rd_rsp);\n    rsp->status = GAP_ERR_NO_ERROR;\n    rsp->svc_code = proxm_env->env[conidx]->last_svc_req;\n    rsp->value = param->value[0];\n    ke_msg_send(rsp);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(proxm){\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {PROXM_ENABLE_REQ, (ke_msg_func_t)proxm_enable_req_handler},\n    {PROXM_WR_ALERT_LVL_REQ, (ke_msg_func_t)proxm_wr_alert_lvl_req_handler},\n    {PROXM_RD_REQ, (ke_msg_func_t)proxm_rd_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid proxm_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct proxm_env_tag *proxm_env = PRF_ENV_GET(PROXM, proxm);\n\n  task_desc->msg_handler_tab = proxm_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(proxm_msg_handler_tab);\n  task_desc->state = proxm_env->state;\n  task_desc->idx_max = PROXM_IDX_MAX;\n}\n\n#endif // BLE_PROX_MONITOR\n\n/// @} PROXMTASK\n"
  },
  {
    "path": "services/ble_profiles/prox/proxr/api/proxr_task.h",
    "content": "#ifndef PROXR_TASK_H_\n#define PROXR_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PROXRTASK Proximity Reporter Task\n * @ingroup PROXR\n * @brief Proximity Reporter Task\n *\n * The PROXRTASK is responsible for handling the APi messages from the Application or internal\n * tasks.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Proximity reporter feature bit field\nenum proxr_feature\n{\n    /// immediate alert and TX Power services are not present\n    PROXR_IAS_TXPS_NOT_SUP = 0,\n    /// immediate alert and TX Power services are present\n    PROXR_IAS_TXPS_SUP,\n};\n\n/// Messages for Proximity Reporter\nenum proxr_msg_id\n{\n    /// LLS/IAS Alert Level Indication\n    PROXR_ALERT_IND = TASK_FIRST_MSG(TASK_ID_PROXR),\n};\n\n///Characteristics Code for Write Indications\nenum\n{\n    PROXR_ERR_CHAR,\n    PROXR_LLS_CHAR,\n    PROXR_IAS_CHAR,\n};\n\n\n/*\n * API MESSAGES STRUCTURES\n ****************************************************************************************\n */\n///Parameters of the Proximity service database\nstruct proxr_db_cfg\n{\n    /// Proximity Feature (@see enum proxm_feature)\n    uint16_t features;\n};\n\n\n/// Parameters of the @ref PROXR_ALERT_IND message\nstruct proxr_alert_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Alert level\n    uint8_t alert_lvl;\n    /// Char Code - Indicate if LLS or IAS\n    uint8_t char_code;\n};\n\n\n/// @} PROXRTASK\n\n#endif // PROXR_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/prox/proxr/src/proxr.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PROXR\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_PROX_REPORTER)\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"proxr.h\"\n#include \"proxr_task.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * PROXIMITY PROFILE ATTRIBUTES DEFINITION\n ****************************************************************************************\n */\n\n/// Full LLS Database Description - Used to add attributes into the database\nconst struct attm_desc proxr_lls_att_db[LLS_IDX_NB] = {\n    // Link Loss Service Declaration\n    [LLS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n    // Alert Level Characteristic Declaration\n    [LLS_IDX_ALERT_LVL_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // Alert Level Characteristic Value\n    [LLS_IDX_ALERT_LVL_VAL] = {ATT_CHAR_ALERT_LEVEL,\n                               PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                               PERM(RI, ENABLE), sizeof(uint8_t)},\n};\n\n/// Full IAS Database Description - Used to add attributes into the database\nconst struct attm_desc proxr_ias_att_db[IAS_IDX_NB] = {\n    // Immediate Alert Service Declaration\n    [IAS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n    // Alert Level Characteristic Declaration\n    [IAS_IDX_ALERT_LVL_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // Alert Level Characteristic Value\n    [IAS_IDX_ALERT_LVL_VAL] = {ATT_CHAR_ALERT_LEVEL,\n                               PERM(WRITE_COMMAND, ENABLE), PERM(RI, ENABLE),\n                               sizeof(uint8_t)},\n};\n\n/// Full TXPS Database Description - Used to add attributes into the database\nconst struct attm_desc proxr_txps_att_db[TXPS_IDX_NB] = {\n    // TX Power Service Declaration\n    [TXPS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n    // TX Power Level Characteristic Declaration\n    [TXPS_IDX_TX_POWER_LVL_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                    0, 0},\n    // TX Power Level Characteristic Value\n    [TXPS_IDX_TX_POWER_LVL_VAL] = {ATT_CHAR_TX_POWER_LEVEL, PERM(RD, ENABLE),\n                                   PERM(RI, ENABLE), sizeof(uint8_t)},\n};\n/*\n * LOCAL FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nstatic uint8_t proxr_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl,\n                          struct proxr_db_cfg *params) {\n  // Service content flag\n  uint32_t cfg_flag = PROXR_LLS_MANDATORY_MASK;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  struct proxr_env_tag *proxr_env = (struct proxr_env_tag *)ke_malloc(\n      sizeof(struct proxr_env_tag), KE_MEM_ATT_DB);\n\n  // allocate PROXR required environment variable\n  env->env = (prf_env_t *)proxr_env;\n\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_LINK_LOSS, (uint8_t *)&cfg_flag, LLS_IDX_NB, NULL,\n      env->task, &proxr_lls_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  proxr_env->lls_start_hdl = *start_hdl;\n  *start_hdl += LLS_IDX_NB;\n\n  if ((status == ATT_ERR_NO_ERROR) &&\n      (params->features == PROXR_IAS_TXPS_SUP)) {\n    cfg_flag = PROXR_IAS_MANDATORY_MASK;\n    status = attm_svc_create_db(\n        start_hdl, ATT_SVC_IMMEDIATE_ALERT, (uint8_t *)&cfg_flag, IAS_IDX_NB,\n        NULL, env->task, &proxr_ias_att_db[0],\n        (sec_lvl &\n         (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n            PERM(SVC_MI, DISABLE));\n\n    proxr_env->ias_start_hdl = *start_hdl;\n    *start_hdl += IAS_IDX_NB;\n\n    if (status == ATT_ERR_NO_ERROR) {\n      cfg_flag = PROXR_TXP_MANDATORY_MASK;\n      status = attm_svc_create_db(\n          start_hdl, ATT_SVC_TX_POWER, (uint8_t *)&cfg_flag, TXPS_IDX_NB, NULL,\n          env->task, &proxr_txps_att_db[0],\n          (sec_lvl &\n           (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n              PERM(SVC_MI, DISABLE));\n\n      proxr_env->txp_start_hdl = *start_hdl;\n\n      if (status == ATT_ERR_NO_ERROR) {\n        // set start handle to first allocated service value\n        *start_hdl = proxr_env->ias_start_hdl;\n\n        proxr_env->features = params->features;\n        proxr_env->prf_env.app_task =\n            app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                                  : PERM(PRF_MI, DISABLE));\n        proxr_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n        // initialize environment variable\n        env->id = TASK_ID_PROXR;\n        proxr_task_init(&(env->desc));\n\n        // service is ready, go into an Idle state\n        ke_state_set(env->task, PROXR_IDLE);\n      }\n    }\n  }\n  return (status);\n}\n\nstatic void proxr_destroy(struct prf_task_env *env) {\n  struct proxr_env_tag *proxr_env = (struct proxr_env_tag *)env->env;\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(proxr_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void proxr_create(struct prf_task_env *env, uint8_t conidx) {\n  struct proxr_env_tag *proxr_env = (struct proxr_env_tag *)env->env;\n\n  proxr_env->lls_alert_lvl[conidx] = PROXR_ALERT_NONE;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void proxr_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct proxr_env_tag *proxr_env = (struct proxr_env_tag *)env->env;\n\n  if ((proxr_env->features == PROXR_IAS_TXPS_SUP) &&\n      (reason != LL_ERR_REMOTE_USER_TERM_CON)) {\n    if (proxr_env->lls_alert_lvl[conidx] > PROXR_ALERT_NONE) {\n\n      // Allocate the alert value change indication\n      struct proxr_alert_ind *ind = KE_MSG_ALLOC(\n          PROXR_ALERT_IND, prf_dst_task_get(&(proxr_env->prf_env), conidx),\n          prf_src_task_get(&(proxr_env->prf_env), conidx), proxr_alert_ind);\n\n      // Fill in the parameter structure\n      ind->alert_lvl = proxr_env->lls_alert_lvl[conidx];\n      ind->char_code = PROXR_LLS_CHAR;\n      ind->conidx = conidx;\n\n      // Send the message\n      ke_msg_send(ind);\n    }\n  }\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// PROXR Task interface required by profile manager\nconst struct prf_task_cbs proxr_itf = {\n    (prf_init_fnct)proxr_init,\n    proxr_destroy,\n    proxr_create,\n    proxr_cleanup,\n};\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *proxr_prf_itf_get(void) { return &proxr_itf; }\n\n#endif // BLE_PROX_REPORTER\n\n/// @} PROXR\n"
  },
  {
    "path": "services/ble_profiles/prox/proxr/src/proxr.h",
    "content": "#ifndef PROXR_H_\n#define PROXR_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PROXR Proximity Reporter\n * @ingroup PROX\n * @brief Proximity Profile Reporter.\n *\n * The PROXR is responsible for providing proximity reporter functionalities to\n * upper layer module or application. The device using this profile takes the role\n * of a proximity reporter role.\n *\n * Proximity Reporter (PR): A PR (e.g. a watch, key fob, etc) is the term used by\n * this profile to describe a personal device that a user carries with them and that\n * has low power requirement (i.e. it is operating with a button cell), allowing another\n * device to monitor their connection. The device may have a simple user alert\n * functionality, for example a blinking LED or audible output.\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_PROX_REPORTER)\n\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of Proximity task instances\n#define PROXR_IDX_MAX    (1)\n\n#define PROXR_IAS_MANDATORY_MASK        (0x07)\n#define PROXR_LLS_MANDATORY_MASK        (0x07)\n#define PROXR_TXP_MANDATORY_MASK        (0x07)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the PROXR task\nenum\n{\n    /// Idle state\n    PROXR_IDLE,\n    /// Proximity reporter in a busy state\n    PROXR_BUSY,\n\n    /// Number of defined states.\n    PROXR_STATE_MAX\n};\n\n/// LLS Handles offsets\nenum\n{\n    LLS_IDX_SVC,\n\n    LLS_IDX_ALERT_LVL_CHAR,\n    LLS_IDX_ALERT_LVL_VAL,\n\n    LLS_IDX_NB,\n};\n\n/// IAS Handles offsets\nenum\n{\n    IAS_IDX_SVC,\n\n    IAS_IDX_ALERT_LVL_CHAR,\n    IAS_IDX_ALERT_LVL_VAL,\n\n    IAS_IDX_NB,\n};\n\n/// TXPS Handles offsets\nenum\n{\n    TXPS_IDX_SVC,\n\n    TXPS_IDX_TX_POWER_LVL_CHAR,\n    TXPS_IDX_TX_POWER_LVL_VAL,\n\n    TXPS_IDX_NB,\n};\n\n\n///Alert Level Values\nenum\n{\n    PROXR_ALERT_NONE,\n    PROXR_ALERT_MILD,\n    PROXR_ALERT_HIGH,\n};\n\n\n/// Proximity service processing flags\nenum\n{\n    /// Use To know if bond data are present\n    PROXR_BOND_DATA_PRESENT,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Proximity reporter environment variable\nstruct proxr_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// IAS Start Handle\n    uint16_t ias_start_hdl;\n    /// LLS Start Handle\n    uint16_t lls_start_hdl;\n    /// TXP Start Handle\n    uint16_t txp_start_hdl;\n    /// Proximity Feature\n    uint16_t features;\n    /// Connection index backup, needed due to GAP request for TX power read\n    uint8_t conidx_saved;\n    /// State of different task instances\n    ke_state_t state[PROXR_IDX_MAX];\n    /// LLS alert level\n    uint8_t lls_alert_lvl[PROXR_IDX_MAX];\n};\n\n/*\n * PROXIMITY PROFILE ATTRIBUTES DECLARATION\n ****************************************************************************************\n */\n\n/*\n *  PROXIMITY PROFILE ATTRIBUTES VALUES DECLARATION\n ****************************************************************************************\n */\n\n/// Link Loss Service\nextern const att_svc_desc_t proxr_lls_svc;\n/// Link Loss Service - Alert Level Characteristic\nextern const struct att_char_desc proxr_lls_alert_lvl_char;\n\n/// Immediate Alert Service\nextern const att_svc_desc_t proxr_ias_svc;\n/// Immediate Alert Service - Alert Level Characteristic\nextern const struct att_char_desc proxr_ias_alert_lvl_char;\n\n/// TX Power Service\nextern const att_svc_desc_t proxr_txps_svc;\n/// TX Power Service -TX Power Level Characteristic\nextern const struct att_char_desc proxr_txps_tx_power_lvl_char;\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve Proximity service profile interface\n *\n * @return Proximity service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* proxr_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Disable role.\n ****************************************************************************************\n */\nvoid proxr_disable(uint16_t conhdl); \n\n/*\n * GLOBAL VARIABLES DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid proxr_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //BLE_PROX_REPORTER\n\n/// @} PROXR\n\n#endif // PROXR_H_\n"
  },
  {
    "path": "services/ble_profiles/prox/proxr/src/proxr_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup PROXRTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_PROX_REPORTER)\n#include \"co_utils.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n#include \"proxr.h\"\n#include \"proxr_task.h\"\n\n/*\n * FUNCTION DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of write request message.\n * The handler will analyse what has been set and decide alert level\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n\n  int msg_status = KE_MSG_CONSUMED;\n\n  if (ke_state_get(dest_id) == PROXR_IDLE) {\n    uint8_t alert_lvl = 0x0000;\n    uint8_t conidx = KE_IDX_GET(src_id);\n    // Allocate write confirmation message.\n    struct gattc_write_cfm *cfm =\n        KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n\n    // Get the address of the environment\n    struct proxr_env_tag *proxr_env = PRF_ENV_GET(PROXR, proxr);\n\n    // Fill in the parameter structure\n    cfm->handle = param->handle;\n    cfm->status = PRF_APP_ERROR;\n\n    if (param->value[0] <= PROXR_ALERT_HIGH) {\n      alert_lvl = param->value[0];\n      // Store alert level on the environment\n      if (param->handle == (proxr_env->lls_start_hdl + LLS_IDX_ALERT_LVL_VAL)) {\n        proxr_env->lls_alert_lvl[conidx] = alert_lvl;\n        cfm->status = GAP_ERR_NO_ERROR;\n      } else if (param->handle ==\n                 (proxr_env->ias_start_hdl + IAS_IDX_ALERT_LVL_VAL)) {\n        // Allocate the alert value change indication\n        struct proxr_alert_ind *ind = KE_MSG_ALLOC(\n            PROXR_ALERT_IND, prf_dst_task_get(&(proxr_env->prf_env), conidx),\n            dest_id, proxr_alert_ind);\n        // Fill in the parameter structure\n        ind->alert_lvl = alert_lvl;\n        ind->char_code = PROXR_IAS_CHAR;\n        ind->conidx = conidx;\n\n        // Send the message\n        ke_msg_send(ind);\n\n        cfm->status = GAP_ERR_NO_ERROR;\n      } else {\n        cfm->status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n      }\n    }\n\n    // Send the message\n    ke_msg_send(cfm);\n  } else if (ke_state_get(dest_id) == PROXR_BUSY) {\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (msg_status);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  int msg_status = KE_MSG_CONSUMED;\n\n  if (ke_state_get(dest_id) == PROXR_IDLE) {\n    // Get the address of the environment\n    struct proxr_env_tag *proxr_env = PRF_ENV_GET(PROXR, proxr);\n    uint8_t conidx = KE_IDX_GET(src_id);\n\n    uint8_t value = PROXR_ALERT_NONE;\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    if (param->handle == (proxr_env->lls_start_hdl + LLS_IDX_ALERT_LVL_VAL)) {\n      value = proxr_env->lls_alert_lvl[conidx];\n    } else if (param->handle ==\n               (proxr_env->txp_start_hdl + TXPS_IDX_TX_POWER_LVL_VAL)) {\n      // send a request to read TX power level on GAPM\n      struct gapm_get_dev_info_cmd *cmd = KE_MSG_ALLOC(\n          GAPM_GET_DEV_INFO_CMD, TASK_GAPM, dest_id, gapm_get_dev_info_cmd);\n      cmd->operation = GAPM_GET_DEV_ADV_TX_POWER;\n      ke_msg_send(cmd);\n\n      // save the connection index\n      proxr_env->conidx_saved = conidx;\n\n      // need to wait for GAPM response, go into busy state\n      ke_state_set(dest_id, PROXR_BUSY);\n\n      status = PRF_APP_ERROR;\n    } else {\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    }\n\n    // Don't send the confirmation if gap read request has been initiated.\n    if (status != PRF_APP_ERROR) {\n      // Send data to peer device\n      struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n          GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, sizeof(uint8_t));\n      cfm->length = sizeof(uint8_t);\n      cfm->value[0] = value;\n      cfm->handle = param->handle;\n      cfm->status = status;\n\n      // Send value to peer device.\n      ke_msg_send(cfm);\n    }\n  } else if (ke_state_get(dest_id) == PROXR_BUSY) {\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GAPM_DEV_ADV_TX_POWER_IND message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gapm_dev_adv_tx_power_ind_handler(\n    ke_msg_id_t const msgid, struct gapm_dev_adv_tx_power_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct proxr_env_tag *proxr_env = PRF_ENV_GET(PROXR, proxr);\n\n  if (ke_state_get(dest_id) == PROXR_BUSY) {\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n        GATTC_READ_CFM, KE_BUILD_ID(TASK_GATTC, proxr_env->conidx_saved),\n        dest_id, gattc_read_cfm, sizeof(uint8_t));\n    cfm->length = sizeof(uint8_t);\n    cfm->value[0] = param->power_lvl;\n    cfm->handle = proxr_env->txp_start_hdl + TXPS_IDX_TX_POWER_LVL_VAL;\n    cfm->status = GAP_ERR_NO_ERROR;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n\n    ke_state_set(dest_id, PROXR_IDLE);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GAPM_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gapm_cmp_evt_handler(ke_msg_id_t const msgid,\n                                  struct gapm_cmp_evt const *param,\n                                  ke_task_id_t const dest_id,\n                                  ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct proxr_env_tag *proxr_env = PRF_ENV_GET(PROXR, proxr);\n\n  if ((ke_state_get(dest_id) == PROXR_BUSY) &&\n      (param->status != GAP_ERR_NO_ERROR)) {\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = KE_MSG_ALLOC(\n        GATTC_READ_CFM, KE_BUILD_ID(TASK_GATTC, proxr_env->conidx_saved),\n        dest_id, gattc_read_cfm);\n    cfm->length = sizeof(uint8_t);\n    cfm->handle = proxr_env->txp_start_hdl + TXPS_IDX_TX_POWER_LVL_VAL;\n    cfm->status = PRF_APP_ERROR;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n\n    ke_state_set(dest_id, PROXR_IDLE);\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(proxr){\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GAPM_DEV_ADV_TX_POWER_IND,\n     (ke_msg_func_t)gapm_dev_adv_tx_power_ind_handler},\n    {GAPM_CMP_EVT, (ke_msg_func_t)gapm_cmp_evt_handler},\n};\n\nvoid proxr_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct proxr_env_tag *proxr_env = PRF_ENV_GET(PROXR, proxr);\n\n  task_desc->msg_handler_tab = proxr_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(proxr_msg_handler_tab);\n  task_desc->state = proxr_env->state;\n  task_desc->idx_max = PROXR_IDX_MAX;\n}\n\n#endif // BLE_PROX_REPORTER\n\n/// @} PROXRTASK\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscp_common.h",
    "content": "#ifndef _RSCP_COMMON_H_\n#define _RSCP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup RSCP Running Speed and Cadence Profile\n * @ingroup PROFILE\n * @brief Running Speed and Cadence Profile\n *\n * The Running Speed and Cadence profile enables a Collector device to connect and\n * interact with a Running Speed and Cadence Sensor for use in sports and fitness\n * applications.\n *\n * This file contains all definitions that are common for the server and the client parts\n * of the profile.\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"prf_types.h\"\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Procedure Already in Progress Error Code\n#define RSCP_ERROR_PROC_IN_PROGRESS         (0x80)\n/// Client Characteristic Configuration descriptor improperly configured Error Code\n#define RSCP_ERROR_CCC_INVALID_PARAM        (0x81)\n\n/// RSC Measurement Value Min Length\n#define RSCP_RSC_MEAS_MIN_LEN               (4)\n/// RSC Measurement Value Max Length\n#define RSCP_RSC_MEAS_MAX_LEN               (10)\n/// SC Control Point Request Value Min Length\n#define RSCP_SC_CNTL_PT_REQ_MIN_LEN         (1)\n/// SC Control Point Request Value Max Length\n#define RSCP_SC_CNTL_PT_REQ_MAX_LEN         (5)\n/// SC Control Point Response Value Min Length\n#define RSCP_SC_CNTL_PT_RSP_MIN_LEN         (3)\n/// SC Control Point Response Value Max Length\n#define RSCP_SC_CNTL_PT_RSP_MAX_LEN         (RSCP_SC_CNTL_PT_RSP_MIN_LEN + RSCP_LOC_MAX)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Running Speed and Cadence Service Characteristics\nenum rscp_rscs_char\n{\n    /// RSC Measurement\n    RSCP_RSCS_RSC_MEAS_CHAR,\n    /// RSC Feature\n    RSCP_RSCS_RSC_FEAT_CHAR,\n    /// Sensor Location\n    RSCP_RSCS_SENSOR_LOC_CHAR,\n    /// SC Control Point\n    RSCP_RSCS_SC_CTNL_PT_CHAR,\n\n    /// Maximum Characteristic\n    RSCP_RSCS_CHAR_MAX,\n};\n\n/// RSC Measurement Flags\nenum rscp_meas_flags\n{\n    /// Instantaneous Stride Length Present\n    RSCP_MEAS_INST_STRIDE_LEN_PRESENT   = 0x01,\n    /// Total Distance Present\n    RSCP_MEAS_TOTAL_DST_MEAS_PRESENT    = 0x02,\n    /// Walking or Running\n    RSCP_MEAS_WALK_RUN_STATUS           = 0x04,\n\n    /// All present\n    RSCP_MEAS_ALL_PRESENT               = 0x07,\n};\n\n/// RSC Feature Flags\nenum rscp_feat_flags\n{\n    /// Instantaneous Stride Length Measurement Supported\n    RSCP_FEAT_INST_STRIDE_LEN_SUPP      = 0x0001,\n    /// Total Distance Measurement Supported\n    RSCP_FEAT_TOTAL_DST_MEAS_SUPP       = 0x0002,\n    /// Walking or Running Status Supported\n    RSCP_FEAT_WALK_RUN_STATUS_SUPP      = 0x0004,\n    /// Calibration Procedure Supported\n    RSCP_FEAT_CALIB_PROC_SUPP           = 0x0008,\n    /// Multiple Sensor Locations Supported\n    RSCP_FEAT_MULT_SENSOR_LOC_SUPP      = 0x0010,\n\n    /// All supported\n    RSCP_FEAT_ALL_SUPP                  = 0x001F,\n};\n\n/// Sensor Locations Keys\nenum rscp_sensor_loc\n{\n    /// Other (0)\n    RSCP_LOC_OTHER          = 0,\n    /// Top of shoe (1)\n    RSCP_LOC_TOP_SHOE,\n    /// In shoe (2)\n    RSCP_LOC_IN_SHOE,\n    /// Hip (3)\n    RSCP_LOC_HIP,\n    /// Chest (14)\n    RSCP_LOC_CHEST          = 14,\n\n    /// Maximum Sensor Location\n    RSCP_LOC_MAX,\n};\n\n/// Control Point Operation Code Keys\nenum rscp_sc_ctnl_pt_op_code\n{\n    /// Reserved value\n    RSCP_CTNL_PT_OP_RESERVED        = 0,\n\n    /// Set Cumulative Value\n    RSCP_CTNL_PT_OP_SET_CUMUL_VAL,\n    /// Start Sensor Calibration\n    RSCP_CTNL_PT_OP_START_CALIB,\n    /// Update Sensor Location\n    RSCP_CTNL_PT_OP_UPD_LOC,\n    /// Request Supported Sensor Locations\n    RSCP_CTNL_PT_OP_REQ_SUPP_LOC,\n\n    /// Response Code\n    RSCP_CTNL_PT_RSP_CODE           = 16,\n};\n\n/// Control Point Response Value\nenum rscp_sc_ctnl_pt_resp_val\n{\n    /// Reserved value\n    RSCP_CTNL_PT_RESP_RESERVED      = 0,\n\n    /// Success\n    RSCP_CTNL_PT_RESP_SUCCESS,\n    /// Operation Code Not Supported\n    RSCP_CTNL_PT_RESP_NOT_SUPP,\n    /// Invalid Parameter\n    RSCP_CTNL_PT_RESP_INV_PARAM,\n    /// Operation Failed\n    RSCP_CTNL_PT_RESP_FAILED,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// RSC Measurement\nstruct rscp_rsc_meas\n{\n    /// Flags\n    uint8_t flags;\n    /// Instantaneous Cadence\n    uint8_t inst_cad;\n    /// Instantaneous Speed\n    uint16_t inst_speed;\n    /// Instantaneous Stride Length\n    uint16_t inst_stride_len;\n    /// Total Distance\n    uint32_t total_dist;\n};\n\n/// SC Control Point Request\nstruct rscp_sc_ctnl_pt_req\n{\n    /// Operation Code\n    uint8_t op_code;\n    /// Value\n    union rscp_sc_ctnl_pt_req_val\n    {\n        /// Sensor Location\n        uint8_t sensor_loc;\n        /// Cumulative value\n        uint32_t cumul_val;\n    } value;\n};\n\n/// SC Control Point Response\nstruct rscp_sc_ctnl_pt_rsp\n{\n    /// Requested Operation Code\n    uint8_t req_op_code;\n    /// Response Value\n    uint8_t resp_value;\n    /// List of supported locations\n    uint16_t supp_loc;\n};\n\n\n/// @} rscp_common\n\n#endif //(_RSCP_COMMON_H_)\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscpc/api/rscpc_task.h",
    "content": "#ifndef _RSCPC_TASK_H_\n#define _RSCPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup RSCPCTASK Running Speed and Cadence Profile Collector Task\n * @ingroup RSCPC\n * @brief Running Speed and Cadence Profile Collector Task\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rscp_common.h\"\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Message IDs\nenum rscpc_msg_ids\n{\n    /// Enable the Running Speed and Cadence Profile Collector task - at connection\n    RSCPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_RSCPC),\n    /// Enable the Running Speed and Cadence Profile Collector task - at connection\n    RSCPC_ENABLE_RSP,\n\n    /// Read the value of an attribute in the peer device database\n    RSCPC_READ_CMD,\n    /// Configure sending of notification or indication\n    RSCPC_CFG_NTFIND_CMD,\n\n    /// Configure the SC Control Point value\n    RSCPC_CTNL_PT_CFG_REQ,\n    /// SC Control Point value response\n    RSCPC_CTNL_PT_CFG_RSP,\n\n    /// Indicate that an attribute value has been received either upon notification or read response\n    RSCPC_VALUE_IND,\n\n    /// Complete Event Information\n    RSCPC_CMP_EVT,\n\n    /// Procedure Timeout Timer\n    RSCPC_TIMEOUT_TIMER_IND,\n};\n\n/// Operation Codes\nenum rscpc_op_codes\n{\n    /// Reserved operation code\n    RSCPC_RESERVED_OP_CODE  = 0x00,\n\n    /// Discovery Procedure\n    RSCPC_ENABLE_OP_CODE,\n    /// Read attribute value Procedure\n    RSCPC_READ_OP_CODE,\n\n    /// Wait for the Write Response after having written a Client Char. Cfg. Descriptor.\n    RSCPC_CFG_NTF_IND_OP_CODE,\n    /// Wait for the Write Response after having written the SC Control Point Char.\n    RSCPC_CTNL_PT_CFG_WR_OP_CODE,\n    /// Wait for the Indication Response after having written the SC Control Point Char.\n    RSCPC_CTNL_PT_CFG_IND_OP_CODE,\n};\n\n/*\n * API MESSAGE STRUCTURES\n ****************************************************************************************\n */\n\n/// Running Speed and Cadence Service Characteristic Descriptors\nenum rscpc_rscs_descs\n{\n    /// RSC Measurement Char. - Client Characteristic Configuration\n    RSCPC_DESC_RSC_MEAS_CL_CFG,\n    /// SC Control Point Char. - Client Characteristic Configuration\n    RSCPC_DESC_SC_CTNL_PT_CL_CFG,\n\n    RSCPC_DESC_MAX,\n\n    RSCPC_DESC_MASK = 0x10,\n};\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Running Speed and Cadence Service\n */\nstruct rscpc_rscs_content\n{\n    /// Service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - RSC Measurement\n    ///  - RSC Feature\n    ///  - Sensor Location\n    ///  - SC Control Point\n    struct prf_char_inf chars[RSCP_RSCS_CHAR_MAX];\n\n    /// Descriptor handles:\n    ///  - RSC Measurement Client Cfg\n    ///  - SC Control Point Client Cfg\n    struct prf_char_desc_inf descs[RSCPC_DESC_MAX];\n};\n\n/// Parameters of the @ref RSCPC_ENABLE_REQ message\nstruct rscpc_enable_req\n{\n    /// Connection type\n    uint8_t con_type;\n    /// Existing handle values RSCS\n    struct rscpc_rscs_content rscs;\n};\n\n/// Parameters of the @ref RSCPC_ENABLE_RSP message\nstruct rscpc_enable_rsp\n{\n    /// status\n    uint8_t status;\n    /// Existing handle values RSCS\n    struct rscpc_rscs_content rscs;\n};\n\n/// Parameters of the @ref RSCPC_READ_CMD message\nstruct rscpc_read_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Read code\n    uint8_t read_code;\n};\n\n/// Parameters of the @ref RSCPC_VALUE_IND message\nstruct rscpc_value_ind\n{\n    /// Attribute Code\n    uint8_t att_code;\n    /// Value\n    union rscpc_value_tag\n    {\n        /// RSC Measurement\n        struct rscp_rsc_meas rsc_meas;\n        /// RSC Feature\n        uint16_t sensor_feat;\n        /// Sensor Location\n        uint8_t sensor_loc;\n        /// Client Characteristic Configuration Descriptor Value\n        uint16_t ntf_cfg;\n    } value;\n};\n\n/// Parameters of the @ref RSCPC_CFG_NTFIND_CMD message\nstruct rscpc_cfg_ntfind_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n    /// Descriptor code\n    uint8_t desc_code;\n    /// Ntf/Ind Configuration\n    uint16_t ntfind_cfg;\n};\n\n/// Parameters of the @ref RSCPC_CTNL_PT_CFG_REQ message\nstruct rscpc_ctnl_pt_cfg_req\n{\n    /// Operation Code\n    uint8_t operation;\n    /// SC Control Point Request\n    struct rscp_sc_ctnl_pt_req sc_ctnl_pt;\n};\n\n/// Parameters of the @ref RSCPC_CTNL_PT_CFG_RSP message\nstruct rscpc_ctnl_pt_cfg_rsp\n{\n    /// SC Control Point Response\n    struct rscp_sc_ctnl_pt_rsp ctnl_pt_rsp;\n};\n\n/// Parameters of the @ref RSCPC_CMP_EVT message\nstruct rscpc_cmp_evt\n{\n    /// Operation code\n    uint8_t operation;\n    /// Status\n    uint8_t status;\n};\n\n/// @} RSCPCTASK\n\n#endif //(_RSCPC_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscpc/src/rscpc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup RSCPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_RSC_COLLECTOR)\n#include \"rscp_common.h\"\n\n#include \"ke_mem.h\"\n#include \"ke_timer.h\"\n#include \"rscpc.h\"\n#include \"rscpc_task.h\"\n\n/*\n * GLOBAL VARIABLES DECLARATION\n ****************************************************************************************\n */\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the RSCPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t rscpc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct rscpc_env_tag *rscpc_env = (struct rscpc_env_tag *)ke_malloc(\n      sizeof(struct rscpc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate RSCPC required environment variable\n  env->env = (prf_env_t *)rscpc_env;\n\n  rscpc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  rscpc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_RSCPC;\n  rscpc_task_init(&(env->desc));\n\n  for (idx = 0; idx < RSCPC_IDX_MAX; idx++) {\n    rscpc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), RSCPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void rscpc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct rscpc_env_tag *rscpc_env = (struct rscpc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (rscpc_env->env[conidx] != NULL) {\n    if (rscpc_env->env[conidx]->operation != NULL) {\n      ke_free(ke_param2msg(rscpc_env->env[conidx]->operation));\n    }\n    ke_timer_clear(RSCPC_TIMEOUT_TIMER_IND,\n                   prf_src_task_get(&rscpc_env->prf_env, conidx));\n    ke_free(rscpc_env->env[conidx]);\n    rscpc_env->env[conidx] = NULL;\n  }\n\n  /* Put RSCP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), RSCPC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the RSCPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void rscpc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct rscpc_env_tag *rscpc_env = (struct rscpc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < RSCPC_IDX_MAX; idx++) {\n    rscpc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(rscpc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void rscpc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put RSCP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), RSCPC_IDLE);\n}\n\n/// RSCPC Task interface required by profile manager\nconst struct prf_task_cbs rscpc_itf = {\n    rscpc_init,\n    rscpc_destroy,\n    rscpc_create,\n    rscpc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *rscpc_prf_itf_get(void) { return &rscpc_itf; }\n\nvoid rscpc_enable_rsp_send(struct rscpc_env_tag *rscpc_env, uint8_t conidx,\n                           uint8_t status) {\n  // Send to APP the details of the discovered attributes on RSCPS\n  struct rscpc_enable_rsp *rsp = KE_MSG_ALLOC(\n      RSCPC_ENABLE_RSP, prf_dst_task_get(&(rscpc_env->prf_env), conidx),\n      prf_src_task_get(&(rscpc_env->prf_env), conidx), rscpc_enable_rsp);\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->rscs = rscpc_env->env[conidx]->rscs;\n    // Register RSCPC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&(rscpc_env->prf_env), conidx,\n                             &(rscpc_env->env[conidx]->rscs.svc));\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&(rscpc_env->prf_env), conidx), RSCPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nvoid rscps_send_no_conn_cmp_evt(uint8_t src_id, uint8_t dest_id,\n                                uint8_t operation) {\n  // Send the message\n  struct rscpc_cmp_evt *evt =\n      KE_MSG_ALLOC(RSCPC_CMP_EVT, dest_id, src_id, rscpc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = PRF_ERR_REQ_DISALLOWED;\n\n  ke_msg_send(evt);\n}\n\nvoid rscpc_send_cmp_evt(struct rscpc_env_tag *rscpc_env, uint8_t conidx,\n                        uint8_t operation, uint8_t status) {\n  // Free the stored operation if needed\n  if (rscpc_env->env[conidx]->operation != NULL) {\n    ke_msg_free(ke_param2msg(rscpc_env->env[conidx]->operation));\n    rscpc_env->env[conidx]->operation = NULL;\n  }\n\n  // Go back to the CONNECTED state if the state is busy\n  if (ke_state_get(prf_src_task_get(&(rscpc_env->prf_env), conidx)) ==\n      RSCPC_BUSY) {\n    ke_state_set(prf_src_task_get(&(rscpc_env->prf_env), conidx), RSCPC_IDLE);\n  }\n\n  // Send the message\n  struct rscpc_cmp_evt *evt = KE_MSG_ALLOC(\n      RSCPC_CMP_EVT, prf_dst_task_get(&(rscpc_env->prf_env), conidx),\n      prf_src_task_get(&(rscpc_env->prf_env), conidx), rscpc_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\n#endif //(BLE_RSC_COLLECTOR)\n\n/// @} RSCP\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscpc/src/rscpc.h",
    "content": "#ifndef _RSCPC_H_\n#define _RSCPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup RSCPC Running Speed and Cadence Profile Collector\n * @ingroup RSCP\n * @brief Running Speed and Cadence Profile Collector\n * @{\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of Running Speed and Cadence Collector task instances\n#define RSCPC_IDX_MAX        (BLE_CONNECTION_MAX)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_RSC_COLLECTOR)\n#include \"rscpc_task.h\"\n\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the RSCPC task\nenum rscpc_states\n{\n    /// Idle state\n    RSCPC_FREE,\n    /// Connected state\n    RSCPC_IDLE,\n    /// Discovery\n    RSCPC_DISCOVERING,\n    /// Busy state\n    RSCPC_BUSY,\n\n    /// Number of defined states.\n    RSCPC_STATE_MAX\n};\n\n\n/// Internal codes for reading/writing a RSCS characteristic with one single request\nenum rscpc_codes\n{\n    /// Notified RSC Measurement\n    RSCPC_NTF_RSC_MEAS          = RSCP_RSCS_RSC_MEAS_CHAR,\n    /// Read RSC Feature\n    RSCPC_RD_RSC_FEAT           = RSCP_RSCS_RSC_FEAT_CHAR,\n    /// Read Sensor Location\n    RSCPC_RD_SENSOR_LOC         = RSCP_RSCS_SENSOR_LOC_CHAR,\n    /// Indicated SC Control Point\n    RSCPC_IND_SC_CTNL_PT        = RSCP_RSCS_SC_CTNL_PT_CHAR,\n\n    /// Read/Write RSC Measurement Client Char. Configuration Descriptor\n    RSCPC_RD_WR_RSC_MEAS_CFG    = (RSCPC_DESC_RSC_MEAS_CL_CFG   | RSCPC_DESC_MASK),\n    /// Read SC Control Point Client Char. Configuration Descriptor\n    RSCPC_RD_WR_SC_CTNL_PT_CFG  = (RSCPC_DESC_SC_CTNL_PT_CL_CFG | RSCPC_DESC_MASK),\n};\n\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\nstruct rscpc_cnx_env\n{\n    /// Current Operation\n    void *operation;\n    ///Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n    /// Running Speed and Cadence Service Characteristics\n    struct rscpc_rscs_content rscs;\n};\n\n/// Running Speed and Cadence Profile Collector environment variable\nstruct rscpc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct rscpc_cnx_env* env[RSCPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[RSCPC_IDX_MAX];\n};\n\n/// Command Message Basic Structure\nstruct rscpc_cmd\n{\n    /// Operation Code\n    uint8_t operation;\n\n    /// MORE DATA\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * GLOBAL FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve CSCP client profile interface\n *\n * @return CSCP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* rscpc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Running Speed and Cadence ATT DB discovery results to RSCPC host.\n ****************************************************************************************\n */\nvoid rscpc_enable_rsp_send(struct rscpc_env_tag *cscpc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send a RSCPC_CMP_EVT message when no connection exists (no environment)\n ****************************************************************************************\n */\nvoid rscps_send_no_conn_cmp_evt(uint8_t src_id, uint8_t dest_id, uint8_t operation);\n\n/**\n ****************************************************************************************\n * @brief Send a RSCPC_CMP_EVT message to the task which enabled the profile\n ****************************************************************************************\n */\nvoid rscpc_send_cmp_evt(struct rscpc_env_tag *rscpc_env, uint8_t conidx, uint8_t operation, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid rscpc_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //(BLE_RSC_COLLECTOR)\n\n/// @} RSCPC\n\n#endif //(_RSCPC_H_)\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscpc/src/rscpc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup RSCPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_RSC_COLLECTOR)\n#include \"rscp_common.h\"\n#include \"rscpc.h\"\n#include \"rscpc_task.h\"\n\n#include \"attm.h\"\n#include \"compiler.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"ke_timer.h\"\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Running Speed and Cadence service\n/// characteristics information\nconst struct prf_char_def rscpc_rscs_char[RSCP_RSCS_CHAR_MAX] = {\n    /// RSC Measurement\n    [RSCP_RSCS_RSC_MEAS_CHAR] = {ATT_CHAR_RSC_MEAS, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_NTF},\n    /// RSC Feature\n    [RSCP_RSCS_RSC_FEAT_CHAR] = {ATT_CHAR_RSC_FEAT, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_RD},\n    /// Sensor Location\n    [RSCP_RSCS_SENSOR_LOC_CHAR] = {ATT_CHAR_SENSOR_LOC, ATT_OPTIONAL,\n                                   ATT_CHAR_PROP_RD},\n    /// SC Control Point\n    [RSCP_RSCS_SC_CTNL_PT_CHAR] = {ATT_CHAR_SC_CNTL_PT, ATT_OPTIONAL,\n                                   ATT_CHAR_PROP_WR | ATT_CHAR_PROP_IND},\n};\n\n/// State machine used to retrieve Running Speed and Cadence service\n/// characteristic descriptor information\nconst struct prf_char_desc_def rscpc_rscs_char_desc[RSCPC_DESC_MAX] = {\n    /// RSC Measurement Char. - Client Characteristic Configuration\n    [RSCPC_DESC_RSC_MEAS_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_MANDATORY,\n                                    RSCP_RSCS_RSC_MEAS_CHAR},\n    /// SC Control Point Char. - Client Characteristic Configuration\n    [RSCPC_DESC_SC_CTNL_PT_CL_CFG] = {ATT_DESC_CLIENT_CHAR_CFG, ATT_OPTIONAL,\n                                      RSCP_RSCS_SC_CTNL_PT_CHAR},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == RSCPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n\n    ASSERT_INFO(rscpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(rscpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (rscpc_env->env[conidx]->nb_svc == 0) {\n      // Retrieve RSCS characteristics and descriptors\n      prf_extract_svc_info(ind, RSCP_RSCS_CHAR_MAX, &rscpc_rscs_char[0],\n                           &rscpc_env->env[conidx]->rscs.chars[0],\n                           RSCPC_DESC_MAX, &rscpc_rscs_char_desc[0],\n                           &rscpc_env->env[conidx]->rscs.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      rscpc_env->env[conidx]->rscs.svc.shdl = ind->start_hdl;\n      rscpc_env->env[conidx]->rscs.svc.ehdl = ind->end_hdl;\n    }\n\n    rscpc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref RSCPC_ENABLE_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int rscpc_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct rscpc_enable_req *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  uint8_t state = ke_state_get(dest_id);\n  // Running Speed and Cadence Profile Collector Role Task Environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n\n  ASSERT_INFO(rscpc_env != NULL, dest_id, src_id);\n  if ((state == RSCPC_IDLE) && (rscpc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    rscpc_env->env[conidx] = (struct rscpc_cnx_env *)ke_malloc(\n        sizeof(struct rscpc_cnx_env), KE_MEM_ATT_DB);\n    memset(rscpc_env->env[conidx], 0, sizeof(struct rscpc_cnx_env));\n\n    // Start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      prf_disc_svc_send(&(rscpc_env->prf_env), conidx,\n                        ATT_SVC_RUNNING_SPEED_CADENCE);\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, RSCPC_DISCOVERING);\n    }\n    // Bond information is provided\n    else {\n      rscpc_env->env[conidx]->rscs = param->rscs;\n\n      // send APP confirmation that can start normal connection to TH\n      rscpc_enable_rsp_send(rscpc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  } else if (state != RSCPC_FREE) {\n    // The message will be forwarded towards the good task instance\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // The request is disallowed (profile already enabled for this connection,\n    // or not enough memory, ...)\n    rscpc_enable_rsp_send(rscpc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref RSCPC_READ_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int rscpc_read_cmd_handler(ke_msg_id_t const msgid,\n                                    struct rscpc_read_cmd *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (state == RSCPC_IDLE) {\n    // State is Connected or Busy\n    ASSERT_INFO(rscpc_env != NULL, dest_id, src_id);\n\n    // Check the current state\n    if (rscpc_env->env[conidx] == NULL) {\n      status = PRF_APP_ERROR;\n    } else // State is RSCPC_CONNECTED\n    {\n      // Attribute Handle\n      uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n\n      switch (param->read_code) {\n      // Read RSC Feature\n      case (RSCPC_RD_RSC_FEAT): {\n        handle =\n            rscpc_env->env[conidx]->rscs.chars[RSCP_RSCS_RSC_FEAT_CHAR].val_hdl;\n      } break;\n\n      // Read Sensor Location\n      case (RSCPC_RD_SENSOR_LOC): {\n        handle = rscpc_env->env[conidx]\n                     ->rscs.chars[RSCP_RSCS_SENSOR_LOC_CHAR]\n                     .val_hdl;\n      } break;\n\n      // Read RSC Measurement Characteristic Client Char. Cfg. Descriptor Value\n      case (RSCPC_RD_WR_RSC_MEAS_CFG): {\n        handle = rscpc_env->env[conidx]\n                     ->rscs.descs[RSCPC_DESC_RSC_MEAS_CL_CFG]\n                     .desc_hdl;\n      } break;\n\n      // Read Unread Alert Characteristic Client Char. Cfg. Descriptor Value\n      case (RSCPC_RD_WR_SC_CTNL_PT_CFG): {\n        handle = rscpc_env->env[conidx]\n                     ->rscs.descs[RSCPC_DESC_SC_CTNL_PT_CL_CFG]\n                     .desc_hdl;\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n\n      // Check if handle is viable\n      if (handle != ATT_INVALID_SEARCH_HANDLE) {\n        // Force the operation value\n        param->operation = RSCPC_READ_OP_CODE;\n\n        // Store the command structure\n        rscpc_env->env[conidx]->operation = (void *)param;\n        msg_status = KE_MSG_NO_FREE;\n\n        // Send the read request\n        prf_read_char_send(&(rscpc_env->prf_env), conidx,\n                           rscpc_env->env[conidx]->rscs.svc.shdl,\n                           rscpc_env->env[conidx]->rscs.svc.ehdl, handle);\n\n        // Go to the Busy state\n        ke_state_set(dest_id, RSCPC_BUSY);\n\n        status = ATT_ERR_NO_ERROR;\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    }\n  } else if (state == RSCPC_FREE) {\n    status = GAP_ERR_DISCONNECTED;\n  } else {\n    // Another procedure is pending, keep the command for later\n    msg_status = KE_MSG_SAVED;\n    status = GAP_ERR_NO_ERROR;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // Send the complete event message to the task id stored in the environment\n    rscpc_send_cmp_evt(rscpc_env, conidx, RSCPC_READ_OP_CODE, status);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref RSCPC_CFG_NTFIND_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int rscpc_cfg_ntfind_cmd_handler(ke_msg_id_t const msgid,\n                                          struct rscpc_cfg_ntfind_cmd *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  if (rscpc_env != NULL) {\n    // Status\n    uint8_t status = PRF_ERR_REQ_DISALLOWED;\n    // Handle\n    uint16_t handle = ATT_INVALID_SEARCH_HANDLE;\n    // Get connection index\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    do {\n      if (ke_state_get(dest_id) != RSCPC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_SAVED;\n        // Status is GAP_ERR_NO_ERROR, no message will be sent to the\n        // application\n        break;\n      }\n\n      ASSERT_ERR(rscpc_env->env[conidx] != NULL);\n\n      switch (param->desc_code) {\n      // Write RSC Measurement Characteristic Client Char. Cfg. Descriptor Value\n      case (RSCPC_RD_WR_RSC_MEAS_CFG): {\n        if (param->ntfind_cfg <= PRF_CLI_START_NTF) {\n          handle = rscpc_env->env[conidx]\n                       ->rscs.descs[RSCPC_DESC_RSC_MEAS_CL_CFG]\n                       .desc_hdl;\n\n          status = GAP_ERR_NO_ERROR;\n          // The characteristic is mandatory and the descriptor is mandatory\n          ASSERT_ERR(handle != ATT_INVALID_SEARCH_HANDLE);\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      // Write SC Control Point Characteristic Client Char. Cfg. Descriptor\n      // Value\n      case (RSCPC_RD_WR_SC_CTNL_PT_CFG): {\n        if ((param->ntfind_cfg == PRF_CLI_STOP_NTFIND) ||\n            (param->ntfind_cfg == PRF_CLI_START_IND)) {\n          handle = rscpc_env->env[conidx]\n                       ->rscs.descs[RSCPC_DESC_SC_CTNL_PT_CL_CFG]\n                       .desc_hdl;\n\n          status = GAP_ERR_NO_ERROR;\n          if (handle == ATT_INVALID_SEARCH_HANDLE) {\n            // The descriptor has not been found.\n            status = PRF_ERR_INEXISTENT_HDL;\n          }\n        } else {\n          status = PRF_ERR_INVALID_PARAM;\n        }\n      } break;\n\n      default: {\n        status = PRF_ERR_INVALID_PARAM;\n      } break;\n      }\n    } while (0);\n\n    if ((status == GAP_ERR_NO_ERROR) && (handle != ATT_INVALID_SEARCH_HANDLE)) {\n      // Set the operation code\n      param->operation = RSCPC_CFG_NTF_IND_OP_CODE;\n\n      // Store the command structure\n      rscpc_env->env[conidx]->operation = param;\n      msg_status = KE_MSG_NO_FREE;\n\n      // Go to the Busy state\n      ke_state_set(dest_id, RSCPC_BUSY);\n\n      // Send GATT Write Request\n      prf_gatt_write_ntf_ind(&rscpc_env->prf_env, conidx, handle,\n                             param->ntfind_cfg);\n    }\n  } else {\n    // No connection\n    rscps_send_no_conn_cmp_evt(dest_id, src_id, RSCPC_CFG_NTF_IND_OP_CODE);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref RSCPC_CFG_NTFIND_CMD message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int rscpc_ctnl_pt_cfg_req_handler(ke_msg_id_t const msgid,\n                                           struct rscpc_ctnl_pt_cfg_req *param,\n                                           ke_task_id_t const dest_id,\n                                           ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n  // Get the address of the environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (rscpc_env != NULL) {\n    // Status\n    uint8_t status = GAP_ERR_NO_ERROR;\n\n    do {\n      // State is Connected or Busy\n      ASSERT_ERR(ke_state_get(dest_id) > RSCPC_FREE);\n\n      // Check the provided connection handle\n      if (rscpc_env->env[conidx] == NULL) {\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      if (ke_state_get(dest_id) != RSCPC_IDLE) {\n        // Another procedure is pending, keep the command for later\n        msg_status = KE_MSG_SAVED;\n        // Status is GAP_ERR_NO_ERROR, no message will be sent to the\n        // application\n        break;\n      }\n\n      // Check if the characteristic has been found\n      if (rscpc_env->env[conidx]\n              ->rscs.descs[RSCPC_DESC_SC_CTNL_PT_CL_CFG]\n              .desc_hdl != ATT_INVALID_SEARCH_HANDLE) {\n        // Packed request\n        uint8_t req[RSCP_SC_CNTL_PT_REQ_MAX_LEN];\n        // Request Length\n        uint8_t req_len = RSCP_SC_CNTL_PT_REQ_MIN_LEN;\n\n        // Set the operation code\n        req[0] = param->sc_ctnl_pt.op_code;\n\n        // Fulfill the message according to the operation code\n        switch (param->sc_ctnl_pt.op_code) {\n        case (RSCP_CTNL_PT_OP_RESERVED): {\n          // Do nothing, used to generate an \"Operation Code not supported\"\n          // error.\n        } break;\n\n        case (RSCP_CTNL_PT_OP_SET_CUMUL_VAL): {\n          // Set the cumulative value\n          co_write32p(&req[req_len], param->sc_ctnl_pt.value.cumul_val);\n          // Update length\n          req_len += 4;\n        } break;\n\n        case (RSCP_CTNL_PT_OP_UPD_LOC): {\n          // Set the sensor location\n          req[req_len] = param->sc_ctnl_pt.value.sensor_loc;\n          // Update length\n          req_len++;\n        } break;\n\n        case (RSCP_CTNL_PT_OP_START_CALIB):\n        case (RSCP_CTNL_PT_OP_REQ_SUPP_LOC): {\n          // Nothing more to do\n        } break;\n\n        default: {\n          status = PRF_ERR_INVALID_PARAM;\n        } break;\n        }\n\n        if (status == GAP_ERR_NO_ERROR) {\n          // Set the operation code\n          param->operation = RSCPC_CTNL_PT_CFG_WR_OP_CODE;\n\n          // Store the command structure\n          rscpc_env->env[conidx]->operation = param;\n          // Store the command information\n          msg_status = KE_MSG_NO_FREE;\n\n          // Go to the Busy state\n          ke_state_set(dest_id, RSCPC_BUSY);\n\n          // Send the write request\n          prf_gatt_write(&(rscpc_env->prf_env), conidx,\n                         rscpc_env->env[conidx]\n                             ->rscs.chars[RSCP_RSCS_SC_CTNL_PT_CHAR]\n                             .val_hdl,\n                         (uint8_t *)&req[0], req_len, GATTC_WRITE);\n        }\n      } else {\n        // The SC Control Point Characteristic has not been found\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      // Send a complete event status to the application\n      rscpc_send_cmp_evt(rscpc_env, conidx, RSCPC_CTNL_PT_CFG_WR_OP_CODE,\n                         status);\n    }\n  } else {\n    // No connection\n    rscps_send_no_conn_cmp_evt(dest_id, src_id, RSCPC_CTNL_PT_CFG_WR_OP_CODE);\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref RSCPC_TIMEOUT_TIMER_IND message. This\n *message is received when the peer device doesn't send a SC Control Point\n *indication within 30s after reception of the write response.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int rscpc_timeout_timer_ind_handler(ke_msg_id_t const msgid,\n                                             void const *param,\n                                             ke_task_id_t const dest_id,\n                                             ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if ((rscpc_env != NULL) && (rscpc_env->env[conidx] != NULL)) {\n    ASSERT_ERR(rscpc_env->env[conidx]->operation != NULL);\n    ASSERT_ERR(\n        ((struct rscpc_cmd *)rscpc_env->env[conidx]->operation)->operation ==\n        RSCPC_CTNL_PT_CFG_IND_OP_CODE);\n\n    // Send the complete event message\n    rscpc_send_cmp_evt(rscpc_env, conidx, RSCPC_CTNL_PT_CFG_WR_OP_CODE,\n                       PRF_ERR_PROC_TIMEOUT);\n  }\n  // else drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n  // Status\n  uint8_t status;\n\n  if (rscpc_env != NULL) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n    uint8_t state = ke_state_get(dest_id);\n\n    if (state == RSCPC_DISCOVERING) {\n      status = param->status;\n\n      if ((status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n          (status == ATT_ERR_NO_ERROR)) {\n        // Discovery\n        // check characteristic validity\n        if (rscpc_env->env[conidx]->nb_svc == 1) {\n          status = prf_check_svc_char_validity(\n              RSCP_RSCS_CHAR_MAX, rscpc_env->env[conidx]->rscs.chars,\n              rscpc_rscs_char);\n        }\n        // too much services\n        else if (rscpc_env->env[conidx]->nb_svc > 1) {\n          status = PRF_ERR_MULTIPLE_SVC;\n        }\n        // no services found\n        else {\n          status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n        }\n\n        // check descriptor validity\n        if (status == GAP_ERR_NO_ERROR) {\n          status = prf_check_svc_char_desc_validity(\n              RSCPC_DESC_MAX, rscpc_env->env[conidx]->rscs.descs,\n              rscpc_rscs_char_desc, rscpc_env->env[conidx]->rscs.chars);\n        }\n      }\n\n      rscpc_enable_rsp_send(rscpc_env, conidx, status);\n    }\n\n    else if (state == RSCPC_BUSY) {\n      switch (param->operation) {\n      case GATTC_READ: {\n        // Send the complete event status\n        rscpc_send_cmp_evt(rscpc_env, conidx, RSCPC_READ_OP_CODE,\n                           param->status);\n      } break;\n\n      case GATTC_WRITE:\n      case GATTC_WRITE_NO_RESPONSE: {\n        uint8_t operation =\n            ((struct rscpc_cmd *)rscpc_env->env[conidx]->operation)->operation;\n\n        if (operation == RSCPC_CFG_NTF_IND_OP_CODE) {\n          // Send the complete event status\n          rscpc_send_cmp_evt(rscpc_env, conidx, operation, param->status);\n        }\n\n        else if (operation == RSCPC_CTNL_PT_CFG_WR_OP_CODE) {\n          if (param->status == GAP_ERR_NO_ERROR) {\n            // Start Timeout Procedure\n            ke_timer_set(RSCPC_TIMEOUT_TIMER_IND, dest_id, ATT_TRANS_RTX);\n\n            // Wait for the response indication\n            ((struct rscpc_cmd *)rscpc_env->env[conidx]->operation)->operation =\n                RSCPC_CTNL_PT_CFG_IND_OP_CODE;\n          } else {\n            // Send the complete event status\n            rscpc_send_cmp_evt(rscpc_env, conidx, operation, param->status);\n          }\n        }\n      } break;\n\n      case GATTC_REGISTER:\n      case GATTC_UNREGISTER: {\n        // Do nothing\n      } break;\n\n      default: {\n        ASSERT_ERR(0);\n      } break;\n      }\n    }\n  }\n  // else ignore the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n\n  if (ke_state_get(dest_id) == RSCPC_BUSY) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    ASSERT_INFO(rscpc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(rscpc_env->env[conidx] != NULL, dest_id, src_id);\n\n    // Send the read value to the HL\n    struct rscpc_value_ind *ind = KE_MSG_ALLOC(\n        RSCPC_VALUE_IND, prf_dst_task_get(&(rscpc_env->prf_env), conidx),\n        dest_id, rscpc_value_ind);\n\n    switch (((struct rscpc_read_cmd *)rscpc_env->env[conidx]->operation)\n                ->read_code) {\n    // Read RSC Feature Characteristic value\n    case (RSCPC_RD_RSC_FEAT): {\n      ind->value.sensor_feat = co_read16p(param->value);\n\n      // Mask the unused bits\n      //                ind->value.sensor_feat &= RSCP_FEAT_ALL_SUPP;\n    } break;\n\n    // Read Sensor Location Characteristic value\n    case (RSCPC_RD_SENSOR_LOC): {\n      ind->value.sensor_loc = param->value[0];\n    } break;\n\n    // Read Client Characteristic Configuration Descriptor value\n    case (RSCPC_RD_WR_RSC_MEAS_CFG):\n    case (RSCPC_RD_WR_SC_CTNL_PT_CFG): {\n      co_write16p(&ind->value.ntf_cfg, param->value[0]);\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n\n    ind->att_code =\n        ((struct rscpc_read_cmd *)rscpc_env->env[conidx]->operation)->read_code;\n\n    // Send the message to the application\n    ke_msg_send(ind);\n  }\n  // else drop the message\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get the address of the environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n\n  if (rscpc_env != NULL) {\n    switch (param->type) {\n    case (GATTC_NOTIFY): {\n      // Offset\n      uint8_t offset = RSCP_RSC_MEAS_MIN_LEN;\n\n      // RSC Measurement value has been received\n      struct rscpc_value_ind *ind = KE_MSG_ALLOC(\n          RSCPC_VALUE_IND, prf_dst_task_get(&(rscpc_env->prf_env), conidx),\n          prf_src_task_get(&(rscpc_env->prf_env), conidx), rscpc_value_ind);\n\n      // Attribute code\n      ind->att_code = RSCPC_NTF_RSC_MEAS;\n\n      /*----------------------------------------------------\n       * Unpack Measurement --------------------------------\n       *----------------------------------------------------*/\n\n      // Flags\n      ind->value.rsc_meas.flags = param->value[0];\n      // Instantaneous Speed\n      ind->value.rsc_meas.inst_speed = co_read16p((uint16_t *)¶m->value[1]);\n      // Instantaneous Cadence\n      ind->value.rsc_meas.inst_cad = param->value[3];\n\n      // Instantaneous Stride Length\n      if (param->value[0] & RSCP_MEAS_INST_STRIDE_LEN_PRESENT) {\n        ind->value.rsc_meas.inst_stride_len = co_read16p(¶m->value[offset]);\n        offset += 2;\n      }\n\n      // Total Distance\n      if (param->value[0] & RSCP_MEAS_TOTAL_DST_MEAS_PRESENT) {\n        ind->value.rsc_meas.total_dist = co_read32p(¶m->value[offset]);\n      }\n\n      ke_msg_send(ind);\n    } break;\n\n    case (GATTC_INDICATE): {\n      // confirm that indication has been correctly received\n      struct gattc_event_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_EVENT_CFM, src_id, dest_id, gattc_event_cfm);\n      cfm->handle = param->handle;\n      ke_msg_send(cfm);\n\n      // Check if we were waiting for the indication\n      if (rscpc_env->env[conidx]->operation != NULL) {\n        if (((struct rscpc_cmd *)rscpc_env->env[conidx]->operation)\n                ->operation == RSCPC_CTNL_PT_CFG_IND_OP_CODE) {\n          // Stop the procedure timeout timer\n          ke_timer_clear(RSCPC_TIMEOUT_TIMER_IND, dest_id);\n\n          // RSC Measurement value has been received\n          struct rscpc_ctnl_pt_cfg_rsp *ind =\n              KE_MSG_ALLOC(RSCPC_CTNL_PT_CFG_RSP,\n                           prf_dst_task_get(&(rscpc_env->prf_env), conidx),\n                           prf_src_task_get(&(rscpc_env->prf_env), conidx),\n                           rscpc_ctnl_pt_cfg_rsp);\n\n          // Requested operation code\n          ind->ctnl_pt_rsp.req_op_code = param->value[1];\n          // Response value\n          ind->ctnl_pt_rsp.resp_value = param->value[2];\n\n          // Get the list of supported sensor locations if needed\n          if ((ind->ctnl_pt_rsp.req_op_code == RSCP_CTNL_PT_OP_REQ_SUPP_LOC) &&\n              (ind->ctnl_pt_rsp.resp_value == RSCP_CTNL_PT_RESP_SUCCESS) &&\n              (param->length > 3)) {\n            // Get the number of supported locations that have been received\n            uint8_t nb_supp_loc = (param->length - 3);\n            // Counter\n            uint8_t counter;\n            // Location\n            uint8_t loc;\n\n            for (counter = 0; counter < nb_supp_loc; counter++) {\n              loc = param->value[counter + 3];\n\n              // Check if valid\n              if (loc < RSCP_LOC_MAX) {\n                ind->ctnl_pt_rsp.supp_loc |= (1 << loc);\n              }\n            }\n          }\n\n          // Send the message\n          ke_msg_send(ind);\n\n          // Send the complete event message\n          rscpc_send_cmp_evt(rscpc_env, conidx, RSCPC_CTNL_PT_CFG_WR_OP_CODE,\n                             GAP_ERR_NO_ERROR);\n        }\n        // else drop the message\n      }\n      // else drop the message\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(rscpc){\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {RSCPC_ENABLE_REQ, (ke_msg_func_t)rscpc_enable_req_handler},\n    {RSCPC_READ_CMD, (ke_msg_func_t)rscpc_read_cmd_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {RSCPC_CFG_NTFIND_CMD, (ke_msg_func_t)rscpc_cfg_ntfind_cmd_handler},\n    {RSCPC_CTNL_PT_CFG_REQ, (ke_msg_func_t)rscpc_ctnl_pt_cfg_req_handler},\n    {RSCPC_TIMEOUT_TIMER_IND, (ke_msg_func_t)rscpc_timeout_timer_ind_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_EVENT_REQ_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid rscpc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct rscpc_env_tag *rscpc_env = PRF_ENV_GET(RSCPC, rscpc);\n\n  task_desc->msg_handler_tab = rscpc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(rscpc_msg_handler_tab);\n  task_desc->state = rscpc_env->state;\n  task_desc->idx_max = RSCPC_IDX_MAX;\n}\n\n#endif //(BLE_RSC_COLLECTOR)\n\n/// @} RSCPCTASK\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscps/api/rscps_task.h",
    "content": "#ifndef _RSCPS_TASK_H_\n#define _RSCPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup RSCPSTASK Task\n * @ingroup RSCPS\n * @brief Running Speed and Cadence Profile Task.\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rscp_common.h\"\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Messages for Running Speed and Cadence Profile Sensor\nenum rscps_msg_id\n{\n    /// Enable the RSCP Sensor task for a connection\n    RSCPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_RSCPS),\n    /// Enable the RSCP Sensor task for a connection\n    RSCPS_ENABLE_RSP,\n\n    /// Send a RSC Measurement to the peer device (Notification)\n    RSCPS_NTF_RSC_MEAS_REQ,\n    /// Response of RSC Measurement send request\n    RSCPS_NTF_RSC_MEAS_RSP,\n\n    /// Indicate that the SC Control Point characteristic value has been written\n    RSCPS_SC_CTNL_PT_REQ_IND,\n    /// Application response after receiving a RSCPS_SC_CTNL_PT_REQ_IND message\n    RSCPS_SC_CTNL_PT_CFM,\n\n    /// Indicate a new NTF/IND configuration to the application\n    RSCPS_CFG_NTFIND_IND,\n\n    /// Send a complete event status to the application\n    RSCPS_CMP_EVT,\n};\n\n/// Operation Code used in the profile state machine\nenum rscps_op_code\n{\n    /// Reserved Operation Code\n    RSCPS_RESERVED_OP_CODE          = 0x00,\n\n    /// Enable Profile Operation Code\n    RSCPS_ENABLE_OP_CODE,\n    /// Send RSC Measurement Operation Code\n    RSCPS_SEND_RSC_MEAS_OP_CODE,\n\n    /**\n     * SC Control Point Operation\n     */\n\n    /// Set Cumulative Value Operation Code\n    RSCPS_CTNL_PT_CUMUL_VAL_OP_CODE,\n    /// Start Sensor Calibration Operation Code\n    RSCPS_CTNL_PT_START_CAL_OP_CODE,\n    /// Update Sensor Location Operation Code\n    RSCPS_CTNL_PT_UPD_LOC_OP_CODE,\n    /// Request Supported Sensor Locations Operation Code\n    RSCPS_CTNL_PT_SUPP_LOC_OP_CODE,\n    /// Error Indication Sent Operation Code\n    RSCPS_CTNL_ERR_IND_OP_CODE,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the initialization function\nstruct rscps_db_cfg\n{\n    /**\n     * RSC Feature Value - Not supposed to be modified during the lifetime of the device\n     * This value is used to decide if the SC Control Point Characteristic is part of the\n     * Running Speed and Cadence service.\n     */\n    uint16_t rsc_feature;\n    /**\n     * Indicate if the Sensor Location characteristic is supported. Note that if the Multiple\n     * Sensor Location feature is set has supported in the rsc_feature parameter, the\n     * characteristic will be added (mandatory).\n     */\n    uint8_t sensor_loc_supp;\n    /// Sensor location\n    uint8_t sensor_loc;\n};\n\n/// Parameters of the @ref RSCPS_ENABLE_REQ message\nstruct rscps_enable_req\n{\n    /// Connection handle\n    uint16_t conidx;\n    /// Stored RSC Measurement Char. Client Characteristic Configuration\n    uint16_t rsc_meas_ntf_cfg;\n    /// Stored SC Control Point Char. Client Characteristic Configuration\n    uint16_t sc_ctnl_pt_ntf_cfg;\n};\n\n/// Parameters of the @ref RSCPS_ENABLE_RSP message\nstruct rscps_enable_rsp\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Status\n    uint8_t status;\n};\n\n/// Parameters of the @ref RSCPS_NTF_RSC_MEAS_REQ message\nstruct rscps_ntf_rsc_meas_req\n{\n    /// Flags\n    uint8_t flags;\n    /// Instantaneous Cadence\n    uint8_t inst_cad;\n    /// Instantaneous Speed\n    uint16_t inst_speed;\n    /// Instantaneous Stride Length\n    uint16_t inst_stride_len;\n    /// Total Distance\n    uint32_t total_dist;\n};\n\n/// Parameters of the @ref RSCPS_NTF_RSC_MEAS_RSP message\nstruct rscps_ntf_rsc_meas_rsp\n{\n    /// status of the request\n    uint8_t status;\n};\n\n/// Parameters of the @ref RSCPS_SC_CTNL_PT_REQ_IND message\nstruct rscps_sc_ctnl_pt_req_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t op_code;\n    /// Value\n    union rscps_sc_ctnl_pt_req_ind_value\n    {\n        /// Cumulative value\n        uint32_t cumul_value;\n        /// Sensor Location\n        uint8_t sensor_loc;\n    } value;\n};\n\n/// Parameters of the @ref RSCPS_SC_CTNL_PT_CFM message\nstruct rscps_sc_ctnl_pt_cfm\n{\n    /// Connection handle\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t op_code;\n    /// Status\n    uint8_t status;\n    /// Value\n    union rscps_sc_ctnl_pt_cfm_value\n    {\n        /// Sensor Location\n        uint8_t sensor_loc;\n        /// Supported sensor locations\n        uint16_t supp_sensor_loc;\n    } value;\n};\n\n/// Parameters of the @ref RSCPS_CFG_NTFIND_IND message\nstruct rscps_cfg_ntfind_ind\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Characteristic Code (RSC Measurement or SC Control Point)\n    uint8_t char_code;\n    /// Char. Client Characteristic Configuration\n    uint16_t ntf_cfg;\n};\n\n/// Parameters of the @ref RSCPS_CMP_EVT message\nstruct rscps_cmp_evt\n{\n    /// Connection index\n    uint8_t conidx;\n    /// Operation Code\n    uint8_t operation;\n    /// Operation Status\n    uint8_t status;\n};\n\n/// @} RSCPSTASK\n\n#endif //(_RSCPS_TASK_H_)\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscps/src/rscps.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup RSCPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_RSC_SENSOR)\n#include \"rscp_common.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n#include \"rscps.h\"\n#include \"rscps_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Full RSCPS Database Description - Used to add attributes into the database\nstatic const struct attm_desc rscps_att_db[RSCS_IDX_NB] = {\n    // Running Speed and Cadence Service Declaration\n    [RSCS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // RSC Measurement Characteristic Declaration\n    [RSCS_IDX_RSC_MEAS_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // RSC Measurement Characteristic Value\n    [RSCS_IDX_RSC_MEAS_VAL] = {ATT_CHAR_RSC_MEAS, PERM(NTF, ENABLE),\n                               PERM(RI, ENABLE), RSCP_RSC_MEAS_MAX_LEN},\n    // RSC Measurement Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [RSCS_IDX_RSC_MEAS_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                   PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                   0, 0},\n\n    // RSC Feature Characteristic Declaration\n    [RSCS_IDX_RSC_FEAT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // RSC Feature Characteristic Value\n    [RSCS_IDX_RSC_FEAT_VAL] = {ATT_CHAR_RSC_FEAT, PERM(RD, ENABLE),\n                               PERM(RI, ENABLE), sizeof(uint16_t)},\n\n    // Sensor Location Characteristic Declaration\n    [RSCS_IDX_SENSOR_LOC_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                  0},\n    // Sensor Location Characteristic Value\n    [RSCS_IDX_SENSOR_LOC_VAL] = {ATT_CHAR_SENSOR_LOC, PERM(RD, ENABLE),\n                                 PERM(RI, ENABLE), sizeof(uint8_t)},\n\n    // SC Control Point Characteristic Declaration\n    [RSCS_IDX_SC_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                  0},\n    // SC Control Point Characteristic Value - The response has the maximal\n    // length\n    [RSCS_IDX_SC_CTNL_PT_VAL] = {ATT_CHAR_SC_CNTL_PT,\n                                 PERM(IND, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                 PERM(RI, ENABLE), RSCP_SC_CNTL_PT_RSP_MAX_LEN},\n    // SC Control Point Characteristic - Client Characteristic Configuration\n    // Descriptor\n    [RSCS_IDX_SC_CTNL_PT_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                     PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE),\n                                     0, 0},\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the RSCPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t rscps_init(struct prf_task_env *env, uint16_t *start_hdl,\n                          uint16_t app_task, uint8_t sec_lvl,\n                          struct rscps_db_cfg *param) {\n  //------------------ create the attribute database for the profile\n  //-------------------\n  // Service content flag\n  uint32_t cfg_flag = RSCPS_MANDATORY_MASK;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n\n  /*\n   * Check if the Sensor Location characteristic shall be added.\n   * Mandatory if the Multiple Sensor Location feature is supported, otherwise\n   * optional.\n   */\n  if ((param->sensor_loc_supp == RSCPS_SENSOR_LOC_SUPP) ||\n      (RSCPS_IS_FEATURE_SUPPORTED(param->rsc_feature,\n                                  RSCP_FEAT_MULT_SENSOR_LOC_SUPP))) {\n    cfg_flag |= RSCPS_SENSOR_LOC_MASK;\n  }\n\n  /*\n   * Check if the SC Control Point characteristic shall be added\n   * Mandatory if at least one SC Control Point procedure is supported,\n   * otherwise excluded.\n   */\n  if (RSCPS_IS_FEATURE_SUPPORTED(param->rsc_feature,\n                                 RSCP_FEAT_CALIB_PROC_SUPP) ||\n      RSCPS_IS_FEATURE_SUPPORTED(param->rsc_feature,\n                                 RSCP_FEAT_MULT_SENSOR_LOC_SUPP) ||\n      RSCPS_IS_FEATURE_SUPPORTED(param->rsc_feature,\n                                 RSCP_FEAT_TOTAL_DST_MEAS_SUPP)) {\n    cfg_flag |= RSCPS_SC_CTNL_PT_MASK;\n  }\n\n  // Add service in the database\n  status = attm_svc_create_db(\n      start_hdl, ATT_SVC_RUNNING_SPEED_CADENCE, (uint8_t *)&cfg_flag,\n      RSCS_IDX_NB, NULL, env->task, &rscps_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE));\n\n  // Check if an error has occured\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate RSCPS required environment variable\n    struct rscps_env_tag *rscps_env = (struct rscps_env_tag *)ke_malloc(\n        sizeof(struct rscps_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize RSCPS environment\n\n    env->env = (prf_env_t *)rscps_env;\n    rscps_env->shdl = *start_hdl;\n    rscps_env->prf_cfg = cfg_flag;\n    rscps_env->features = param->rsc_feature;\n    rscps_env->operation = RSCPS_RESERVED_OP_CODE;\n\n    if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg, RSCPS_SENSOR_LOC_MASK)) {\n      rscps_env->sensor_loc = (param->sensor_loc >= RSCP_LOC_MAX)\n                                  ? RSCP_LOC_OTHER\n                                  : param->sensor_loc;\n    }\n\n    rscps_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Mono Instantiated task\n    rscps_env->prf_env.prf_task = env->task | PERM(PRF_MI, DISABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_RSCPS;\n    rscps_task_init(&(env->desc));\n\n    rscps_env->ntf = NULL;\n    memset(rscps_env->prfl_ntf_ind_cfg, 0, BLE_CONNECTION_MAX);\n\n    // If we are here, database has been fulfilled with success, go to idle\n    // state\n    ke_state_set(env->task, RSCPS_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the RSCPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void rscps_destroy(struct prf_task_env *env) {\n  struct rscps_env_tag *rscps_env = (struct rscps_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  if (rscps_env->ntf != NULL) {\n    ke_free(rscps_env->ntf);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(rscps_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void rscps_create(struct prf_task_env *env, uint8_t conidx) {\n  struct rscps_env_tag *rscps_env = (struct rscps_env_tag *)env->env;\n  rscps_env->prfl_ntf_ind_cfg[conidx] = 0;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void rscps_cleanup(struct prf_task_env *env, uint8_t conidx,\n                          uint8_t reason) {\n  struct rscps_env_tag *rscps_env = (struct rscps_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  rscps_env->prfl_ntf_ind_cfg[conidx] = 0;\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// RSCPS Task interface required by profile manager\nconst struct prf_task_cbs rscps_itf = {\n    (prf_init_fnct)rscps_init,\n    rscps_destroy,\n    rscps_create,\n    rscps_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *rscps_prf_itf_get(void) { return &rscps_itf; }\n\nvoid rscps_send_cmp_evt(uint8_t conidx, uint8_t src_id, uint8_t dest_id,\n                        uint8_t operation, uint8_t status) {\n  // Get the address of the environment\n  struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n\n  // Go back to the Connected state if the state is busy\n  if (ke_state_get(src_id) == RSCPS_BUSY) {\n    ke_state_set(src_id, RSCPS_IDLE);\n  }\n\n  // Set the operation code\n  rscps_env->operation = RSCPS_RESERVED_OP_CODE;\n\n  // Send the message\n  struct rscps_cmp_evt *evt =\n      KE_MSG_ALLOC(RSCPS_CMP_EVT, dest_id, src_id, rscps_cmp_evt);\n\n  evt->operation = operation;\n  evt->status = status;\n\n  ke_msg_send(evt);\n}\n\nvoid rscps_exe_operation(void) {\n  struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n\n  ASSERT_ERR(rscps_env->ntf != NULL);\n\n  bool finished = true;\n\n  while (rscps_env->ntf->cursor < BLE_CONNECTION_MAX) {\n    // Check if notifications are enabled\n    if (RSCPS_IS_NTFIND_ENABLED(rscps_env->ntf->cursor,\n                                RSCP_PRF_CFG_FLAG_RSC_MEAS_NTF)) {\n      // Allocate the GATT notification message\n      struct gattc_send_evt_cmd *meas_val = KE_MSG_ALLOC_DYN(\n          GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, rscps_env->ntf->cursor),\n          prf_src_task_get(&(rscps_env->prf_env), 0), gattc_send_evt_cmd,\n          rscps_env->ntf->length);\n\n      // Fill in the parameter structure\n      meas_val->operation = GATTC_NOTIFY;\n      meas_val->handle = RSCPS_HANDLE(RSCS_IDX_RSC_MEAS_VAL);\n      meas_val->length = rscps_env->ntf->length;\n      memcpy(meas_val->value, rscps_env->ntf->value, rscps_env->ntf->length);\n\n      // Send the event\n      ke_msg_send(meas_val);\n\n      finished = false;\n      rscps_env->ntf->cursor++;\n      break;\n    }\n\n    rscps_env->ntf->cursor++;\n  }\n\n  // check if operation is finished\n  if (finished) {\n    // Inform the application that a procedure has been completed\n    struct rscps_ntf_rsc_meas_rsp *rsp = KE_MSG_ALLOC(\n        RSCPS_NTF_RSC_MEAS_RSP, prf_dst_task_get(&(rscps_env->prf_env), 0),\n        prf_src_task_get(&(rscps_env->prf_env), 0), rscps_ntf_rsc_meas_rsp);\n\n    rsp->status = GAP_ERR_NO_ERROR;\n    ke_msg_send(rsp);\n\n    // free operation\n    ke_free(rscps_env->ntf);\n    rscps_env->ntf = NULL;\n    rscps_env->operation = RSCPS_RESERVED_OP_CODE;\n\n    ke_state_set(prf_src_task_get(&(rscps_env->prf_env), 0), RSCPS_IDLE);\n  }\n}\n\nvoid rscps_send_rsp_ind(uint8_t conidx, uint8_t req_op_code, uint8_t status) {\n  // Get the address of the environment\n  struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n\n  // Allocate the GATT notification message\n  struct gattc_send_evt_cmd *ctl_pt_rsp =\n      KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                       prf_src_task_get(&rscps_env->prf_env, conidx),\n                       gattc_send_evt_cmd, RSCP_SC_CNTL_PT_RSP_MIN_LEN);\n\n  // Fill in the parameter structure\n  ctl_pt_rsp->operation = GATTC_INDICATE;\n  ctl_pt_rsp->handle = RSCPS_HANDLE(RSCS_IDX_SC_CTNL_PT_VAL);\n  // Pack Control Point confirmation\n  ctl_pt_rsp->length = RSCP_SC_CNTL_PT_RSP_MIN_LEN;\n  // Response Code\n  ctl_pt_rsp->value[0] = RSCP_CTNL_PT_RSP_CODE;\n  // Request Operation Code\n  ctl_pt_rsp->value[1] = req_op_code;\n  // Response value\n  ctl_pt_rsp->value[2] = status;\n\n  // Send the event\n  ke_msg_send(ctl_pt_rsp);\n}\n\n#endif //(BLE_RSC_SENSOR)\n\n/// @} RSCPS\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscps/src/rscps.h",
    "content": "#ifndef _RSCPS_H_\n#define _RSCPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup RSCPS Running Speed and Cadence Profile Sensor\n * @ingroup RSCP\n * @brief Running Speed and Cadence Profile Sensor\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_RSC_SENSOR)\n#include \"rscp_common.h\"\n\n#include \"prf_types.h\"\n#include \"prf.h\"\n#include \"rscps_task.h\"\n#include \"attm.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of Running Speed and Cadence Profile Sensor role task instances\n#define RSCPS_IDX_MAX        (1)\n\n/********************************************\n ******* RSCS Configuration Flag Masks ******\n ********************************************/\n\n/// Mandatory Attributes (RSC Measurement + RSC Feature)\n#define RSCPS_MANDATORY_MASK               (0x003F)\n/// Sensor Location Attributes\n#define RSCPS_SENSOR_LOC_MASK              (0x00C0)\n/// SC Control Point Attributes\n#define RSCPS_SC_CTNL_PT_MASK              (0x0700)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n#define RSCPS_IS_FEATURE_SUPPORTED(features, flag) ((features & flag) == flag)\n\n#define RSCPS_IS_PRESENT(features, flag)           ((features & flag) == flag)\n\n#define RSCPS_ENABLE_NTFIND(conidx, ccc_flag)              (rscps_env->prfl_ntf_ind_cfg[conidx] |= ccc_flag)\n\n#define RSCPS_DISABLE_NTFIND(conidx, ccc_flag)             (rscps_env->prfl_ntf_ind_cfg[conidx] &= ~ccc_flag)\n\n#define RSCPS_IS_NTFIND_ENABLED(conidx, ccc_flag)          ((rscps_env->prfl_ntf_ind_cfg[conidx] & ccc_flag) == ccc_flag)\n\n#define RSCPS_HANDLE(idx) \\\n    (rscps_env->shdl + (idx) - \\\n        ((!(RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg, RSCPS_SENSOR_LOC_MASK)) && \\\n                ((idx) > RSCS_IDX_SENSOR_LOC_CHAR))? (1) : (0)))\n\n// Get database attribute index\n #define RSCPS_IDX(hdl) \\\n    ((hdl - rscps_env->shdl) + \\\n        ((!(RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg, RSCPS_SENSOR_LOC_MASK)) && \\\n                ((hdl - rscps_env->shdl) > RSCS_IDX_SENSOR_LOC_CHAR)) ? (1) : (0)))\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// Possible states of the RSCPS task\nenum rscps_state\n{\n    /// Idle state\n    RSCPS_IDLE,\n    /// Busy state\n    RSCPS_BUSY,\n\n    /// Number of defined states.\n    RSCPS_STATE_MAX\n};\n\n/// Running Speed and Cadence Service - Attribute List\nenum rscps_rscs_att_list\n{\n    /// Running Speed and Cadence Service\n    RSCS_IDX_SVC,\n    /// RSC Measurement\n    RSCS_IDX_RSC_MEAS_CHAR,\n    RSCS_IDX_RSC_MEAS_VAL,\n    RSCS_IDX_RSC_MEAS_NTF_CFG,\n    /// RSC Feature\n    RSCS_IDX_RSC_FEAT_CHAR,\n    RSCS_IDX_RSC_FEAT_VAL,\n    /// Sensor Location\n    RSCS_IDX_SENSOR_LOC_CHAR,\n    RSCS_IDX_SENSOR_LOC_VAL,\n    /// SC Control Point\n    RSCS_IDX_SC_CTNL_PT_CHAR,\n    RSCS_IDX_SC_CTNL_PT_VAL,\n    RSCS_IDX_SC_CTNL_PT_NTF_CFG,\n\n    /// Number of attributes\n    RSCS_IDX_NB,\n};\n\n/// Profile Configuration Additional Flags ()\nenum rscps_prf_cfg_flag\n{\n    /// RSC Measurement - Client Char. Cfg\n    RSCP_PRF_CFG_FLAG_RSC_MEAS_NTF    = (RSCP_FEAT_MULT_SENSOR_LOC_SUPP << 1),\n    /// SC Control Point - Client Char. Cfg\n    RSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND  = (RSCP_PRF_CFG_FLAG_RSC_MEAS_NTF << 1),\n\n    /// Bonded data configured\n    RSCP_PRF_CFG_PERFORMED_OK         = 0x80\n};\n\n/// Sensor Location Supported Flag\nenum rscps_sensor_loc_supp\n{\n    /// Sensor Location Char. is not supported\n    RSCPS_SENSOR_LOC_NOT_SUPP,\n    /// Sensor Location Char. is supported\n    RSCPS_SENSOR_LOC_SUPP,\n};\n\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// ongoing notification information\nstruct rscps_ntf\n{\n     /// Cursor on connection\n     uint8_t cursor;\n     /// Packed notification/indication data size\n     uint8_t length;\n     /// Packed notification/indication data\n     uint8_t value[RSCP_RSC_MEAS_MAX_LEN];\n};\n\n/// Running Power Profile Sensor environment variable per connection\nstruct rscps_cnx_env\n{\n    /// Profile Notify/Indication Flags\n    uint8_t prfl_ntf_ind_cfg;\n};\n\n/// Running Speed and Cadence Profile Sensor environment variable\nstruct rscps_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Notification data\n    struct rscps_ntf* ntf;\n    /// Cycling Speed and Cadence Service Start Handle\n    uint16_t shdl;\n\n    /// Features configuration\n    uint16_t features;\n    /// profile configuration\n    uint16_t prf_cfg;\n\n    /// Operation\n    uint8_t operation;\n    /// Sensor location\n    uint8_t sensor_loc;\n\n    /// State of different task instances\n    ke_state_t state[RSCPS_IDX_MAX];\n    /// Profile Notify/Indication Flags\n    uint8_t prfl_ntf_ind_cfg[BLE_CONNECTION_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve RSCP service profile interface\n *\n * @return RSCP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* rscps_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send a RSCPS_CMP_EVT message to the application.\n ****************************************************************************************\n */\nvoid rscps_send_cmp_evt(uint8_t conidx, uint8_t src_id, uint8_t dest_id, uint8_t operation, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief  This function fully manage event to trigg to peer(s) device(s) according\n *         to on-going operation requested by application\n ****************************************************************************************\n */\nvoid rscps_exe_operation(void);\n\n/**\n ****************************************************************************************\n * @brief  This function sends control point indication error\n ****************************************************************************************\n */\nvoid rscps_send_rsp_ind(uint8_t conidx, uint8_t req_op_code, uint8_t status);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid rscps_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //(BLE_RSC_SENSOR)\n\n/// @} RSCPS\n\n#endif //(_RSCPS_H_)\n"
  },
  {
    "path": "services/ble_profiles/rscp/rscps/src/rscps_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup RSCPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_RSC_SENSOR)\n#include \"rscp_common.h\"\n\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"prf_utils.h\"\n#include \"rscps.h\"\n#include \"rscps_task.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref RSCPS_ENABLE_REQ message.\n * @param[in] msgid Id of the message received\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int rscps_enable_req_handler(ke_msg_id_t const msgid,\n                                      struct rscps_enable_req *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == RSCPS_IDLE) {\n    status = GAP_ERR_NO_ERROR;\n\n    if (!RSCPS_IS_PRESENT(rscps_env->prfl_ntf_ind_cfg[param->conidx],\n                          RSCP_PRF_CFG_PERFORMED_OK)) {\n      // Check the provided value\n      if (param->rsc_meas_ntf_cfg == PRF_CLI_START_NTF) {\n        // Store the status\n        RSCPS_ENABLE_NTFIND(param->conidx, RSCP_PRF_CFG_FLAG_RSC_MEAS_NTF);\n      }\n\n      if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg,\n                                     RSCPS_SC_CTNL_PT_MASK)) {\n        // Check the provided value\n        if (param->sc_ctnl_pt_ntf_cfg == PRF_CLI_START_IND) {\n          // Store the status\n          RSCPS_ENABLE_NTFIND(param->conidx, RSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND);\n        }\n      }\n      // Enable Bonded Data\n      RSCPS_ENABLE_NTFIND(param->conidx, RSCP_PRF_CFG_PERFORMED_OK);\n    }\n  }\n\n  // send completed information to APP task that contains error status\n  struct rscps_enable_rsp *cmp_evt =\n      KE_MSG_ALLOC(RSCPS_ENABLE_RSP, src_id, dest_id, rscps_enable_rsp);\n  cmp_evt->status = status;\n  cmp_evt->conidx = param->conidx;\n  ke_msg_send(cmp_evt);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == RSCPS_IDLE) {\n    // Get the address of the environment\n    struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n    uint8_t conidx = KE_IDX_GET(src_id);\n    uint8_t att_idx = RSCPS_IDX(param->handle);\n\n    // Send data to peer device\n    struct gattc_read_cfm *cfm = NULL;\n\n    uint8_t status = ATT_ERR_NO_ERROR;\n\n    switch (att_idx) {\n    case RSCS_IDX_RSC_MEAS_NTF_CFG: {\n      // Fill data\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint16_t));\n      cfm->length = sizeof(uint16_t);\n      co_write16p(cfm->value, (rscps_env->prfl_ntf_ind_cfg[conidx] &\n                               RSCP_PRF_CFG_FLAG_RSC_MEAS_NTF)\n                                  ? PRF_CLI_START_NTF\n                                  : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    case RSCS_IDX_RSC_FEAT_VAL: {\n      // Fill data\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint16_t));\n      cfm->length = sizeof(uint16_t);\n      co_write16p(cfm->value, rscps_env->features);\n    } break;\n\n    case RSCS_IDX_SENSOR_LOC_VAL: {\n      // Fill data\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint8_t));\n      cfm->length = sizeof(uint8_t);\n      cfm->value[0] = rscps_env->sensor_loc;\n    } break;\n\n    case RSCS_IDX_SC_CTNL_PT_NTF_CFG: {\n      // Fill data\n      cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                             sizeof(uint16_t));\n      cfm->length = sizeof(uint16_t);\n      co_write16p(cfm->value, (rscps_env->prfl_ntf_ind_cfg[conidx] &\n                               RSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND)\n                                  ? PRF_CLI_START_IND\n                                  : PRF_CLI_STOP_NTFIND);\n    } break;\n\n    default: {\n      cfm = KE_MSG_ALLOC(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm);\n      cfm->length = 0;\n      status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n    } break;\n    }\n\n    cfm->handle = param->handle;\n    cfm->status = status;\n\n    // Send value to peer device.\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_att_info_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_att_info_req_ind *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  if (ke_state_get(dest_id) == RSCPS_IDLE) {\n    // Get the address of the environment\n    struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n    uint8_t att_idx = RSCPS_IDX(param->handle);\n    struct gattc_att_info_cfm *cfm;\n\n    // Send write response\n    cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n    cfm->handle = param->handle;\n\n    // check if it's a client configuration char\n    if ((att_idx == RSCS_IDX_RSC_MEAS_NTF_CFG) ||\n        (att_idx == RSCS_IDX_SC_CTNL_PT_NTF_CFG)) {\n      // CCC attribute length = 2\n      cfm->length = 2;\n      cfm->status = GAP_ERR_NO_ERROR;\n    } else if (att_idx == RSCS_IDX_SC_CTNL_PT_VAL) {\n      // force length to zero to reject any write starting from something != 0\n      cfm->length = 0;\n      cfm->status = GAP_ERR_NO_ERROR;\n    }\n    // not expected request\n    else {\n      cfm->length = 0;\n      cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n    }\n    ke_msg_send(cfm);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref RSCPS_NTF_RSC_MEAS_REQ message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int rscps_ntf_rsc_meas_req_handler(\n    ke_msg_id_t const msgid, struct rscps_ntf_rsc_meas_req *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // State shall be Connected or Busy\n  if (ke_state_get(dest_id) == RSCPS_IDLE) {\n    // Get the address of the environment\n    struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n    // allocate and prepare data to notify\n    rscps_env->ntf =\n        (struct rscps_ntf *)ke_malloc(sizeof(struct rscps_ntf), KE_MEM_KE_MSG);\n\n    // Fill in the parameter structure\n    rscps_env->ntf->length = RSCP_RSC_MEAS_MIN_LEN;\n\n    // Check the provided flags value\n    if (!RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg,\n                                    RSCP_FEAT_INST_STRIDE_LEN_SUPP) &&\n        RSCPS_IS_PRESENT(param->flags, RSCP_MEAS_INST_STRIDE_LEN_PRESENT)) {\n      // Force Measurement Instantaneous Stride Length Present to No (Not\n      // supported)\n      param->flags &= ~RSCP_MEAS_INST_STRIDE_LEN_PRESENT;\n    }\n\n    if (!RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg,\n                                    RSCP_FEAT_TOTAL_DST_MEAS_SUPP) &&\n        RSCPS_IS_PRESENT(param->flags, RSCP_MEAS_TOTAL_DST_MEAS_PRESENT)) {\n      // Force Total Distance Measurement Present to No (Not supported)\n      param->flags &= ~RSCP_MEAS_TOTAL_DST_MEAS_PRESENT;\n    }\n\n    // Force the unused bits of the flag value to 0\n    rscps_env->ntf->value[0] = param->flags & RSCP_MEAS_ALL_PRESENT;\n\n    // Instantaneous Speed\n    co_write16p(&rscps_env->ntf->value[1], param->inst_speed);\n    // Instantaneous Cadence\n    rscps_env->ntf->value[3] = param->inst_cad;\n\n    // Instantaneous Stride Length\n    if (RSCPS_IS_PRESENT(param->flags, RSCP_MEAS_INST_STRIDE_LEN_PRESENT)) {\n      co_write16p(&rscps_env->ntf->value[rscps_env->ntf->length],\n                  param->inst_stride_len);\n      rscps_env->ntf->length += 2;\n    }\n\n    // Total Distance\n    if (RSCPS_IS_PRESENT(param->flags, RSCP_MEAS_TOTAL_DST_MEAS_PRESENT)) {\n      co_write32p(&rscps_env->ntf->value[rscps_env->ntf->length],\n                  param->total_dist);\n      rscps_env->ntf->length += 4;\n    }\n\n    // Configure the environment\n    rscps_env->operation = RSCPS_SEND_RSC_MEAS_OP_CODE;\n    rscps_env->ntf->cursor = 0;\n\n    // Go to busy state\n    ke_state_set(dest_id, RSCPS_BUSY);\n\n    // start operation execution\n    rscps_exe_operation();\n  } else {\n    // Save it for later\n    msg_status = KE_MSG_SAVED;\n  }\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref RSCPS_SC_CTNL_PT_CFM message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int rscps_sc_ctnl_pt_cfm_handler(ke_msg_id_t const msgid,\n                                          struct rscps_sc_ctnl_pt_cfm *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if (ke_state_get(dest_id) == RSCPS_BUSY) {\n    do {\n      // check if op code valid\n      if ((param->op_code < RSCPS_CTNL_PT_CUMUL_VAL_OP_CODE) ||\n          (param->op_code > RSCPS_CTNL_ERR_IND_OP_CODE)) {\n        // Wrong op code\n        status = PRF_ERR_INVALID_PARAM;\n        break;\n      }\n\n      // Check the current operation\n      if ((rscps_env->operation < RSCPS_CTNL_PT_CUMUL_VAL_OP_CODE) ||\n          (param->op_code != rscps_env->operation)) {\n        // The confirmation has been sent without request indication, ignore\n        status = PRF_ERR_REQ_DISALLOWED;\n        break;\n      }\n\n      // The SC Control Point Characteristic must be supported if we are here\n      if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg,\n                                     RSCPS_SC_CTNL_PT_MASK)) {\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *ctl_pt_rsp = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, param->conidx), dest_id,\n            gattc_send_evt_cmd, RSCP_SC_CNTL_PT_RSP_MAX_LEN);\n\n        // Fill in the parameter structure\n        ctl_pt_rsp->operation = GATTC_INDICATE;\n        ctl_pt_rsp->handle = RSCPS_HANDLE(RSCS_IDX_SC_CTNL_PT_VAL);\n        // Pack Control Point confirmation\n        ctl_pt_rsp->length = RSCP_SC_CNTL_PT_RSP_MIN_LEN;\n\n        // Set the operation code (Response Code)\n        ctl_pt_rsp->value[0] = RSCP_CTNL_PT_RSP_CODE;\n        // Set the response value\n        ctl_pt_rsp->value[2] = (param->status > RSCP_CTNL_PT_RESP_FAILED)\n                                   ? RSCP_CTNL_PT_RESP_FAILED\n                                   : param->status;\n\n        switch (rscps_env->operation) {\n        // Set cumulative value\n        case (RSCPS_CTNL_PT_CUMUL_VAL_OP_CODE): {\n          // Set the request operation code\n          ctl_pt_rsp->value[1] = RSCP_CTNL_PT_OP_SET_CUMUL_VAL;\n          status = GAP_ERR_NO_ERROR;\n        } break;\n\n        // Start Sensor Calibration\n        case (RSCPS_CTNL_PT_START_CAL_OP_CODE): {\n          // Set the request operation code\n          ctl_pt_rsp->value[1] = RSCP_CTNL_PT_OP_START_CALIB;\n          status = GAP_ERR_NO_ERROR;\n        } break;\n\n        // Update Sensor Location\n        case (RSCPS_CTNL_PT_UPD_LOC_OP_CODE): {\n          // Set the request operation code\n          ctl_pt_rsp->value[1] = RSCP_CTNL_PT_OP_UPD_LOC;\n\n          if (param->status == RSCP_CTNL_PT_RESP_SUCCESS) {\n            // The Sensor Location Characteristic is supported if we are here\n            if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg,\n                                           RSCPS_SENSOR_LOC_MASK)) {\n              // If operation is successful, update the value in the database\n              rscps_env->sensor_loc = param->value.sensor_loc;\n              status = GAP_ERR_NO_ERROR;\n            }\n          }\n        } break;\n\n        case (RSCPS_CTNL_PT_SUPP_LOC_OP_CODE): {\n          // Set the request operation code\n          ctl_pt_rsp->value[1] = RSCP_CTNL_PT_OP_REQ_SUPP_LOC;\n\n          if (param->status == RSCP_CTNL_PT_RESP_SUCCESS) {\n            // Counter\n            uint8_t counter;\n\n            // Set the list of supported location\n            for (counter = 0; counter < RSCP_LOC_MAX; counter++) {\n              if (((param->value.supp_sensor_loc >> counter) & 0x0001) ==\n                  0x0001) {\n                ctl_pt_rsp->value[ctl_pt_rsp->length] = counter;\n                ctl_pt_rsp->length++;\n              }\n            }\n            status = GAP_ERR_NO_ERROR;\n          }\n        } break;\n\n        default: {\n          ASSERT_ERR(0);\n        } break;\n        }\n\n        // Send the event\n        ke_msg_send(ctl_pt_rsp);\n      }\n    } while (0);\n\n    if (status != GAP_ERR_NO_ERROR) {\n      // Inform the application that a procedure has been completed\n      rscps_send_cmp_evt(conidx, prf_src_task_get(&rscps_env->prf_env, conidx),\n                         prf_dst_task_get(&rscps_env->prf_env, conidx),\n                         rscps_env->operation, param->status);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_WRITE_REQ_IND message.\n * @param[in] msgid Id of the message received.\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance.\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Message status\n  uint8_t msg_status = KE_MSG_CONSUMED;\n\n  // Check if a connection exists\n  if (rscps_env != NULL) {\n    // RSC Measurement Characteristic, Client Characteristic Configuration\n    // Descriptor\n    if (param->handle == (RSCPS_HANDLE(RSCS_IDX_RSC_MEAS_NTF_CFG))) {\n      uint16_t ntf_cfg;\n      // Status\n      uint8_t status = PRF_ERR_INVALID_PARAM;\n\n      // Get the value\n      co_write16p(&ntf_cfg, param->value[0]);\n\n      // Check if the value is correct\n      if (ntf_cfg <= PRF_CLI_START_NTF) {\n        status = GAP_ERR_NO_ERROR;\n\n        // Save the new configuration in the environment\n        if (ntf_cfg == PRF_CLI_STOP_NTFIND) {\n          RSCPS_DISABLE_NTFIND(conidx, RSCP_PRF_CFG_FLAG_RSC_MEAS_NTF);\n        } else // ntf_cfg == PRF_CLI_START_NTF\n        {\n          RSCPS_ENABLE_NTFIND(conidx, RSCP_PRF_CFG_FLAG_RSC_MEAS_NTF);\n        }\n\n        // Inform the HL about the new configuration\n        struct rscps_cfg_ntfind_ind *ind = KE_MSG_ALLOC(\n            RSCPS_CFG_NTFIND_IND, prf_dst_task_get(&rscps_env->prf_env, conidx),\n            prf_src_task_get(&rscps_env->prf_env, conidx),\n            rscps_cfg_ntfind_ind);\n\n        ind->char_code = RSCP_RSCS_RSC_MEAS_CHAR;\n        ind->ntf_cfg = ntf_cfg;\n\n        ke_msg_send(ind);\n\n        // Enable Bonded Data\n        RSCPS_ENABLE_NTFIND(conidx, RSCP_PRF_CFG_PERFORMED_OK);\n      }\n      // else status is RSCP_ERROR_CCC_INVALID_PARAM\n\n      // Send the write response to the peer device\n      struct gattc_write_cfm *cfm =\n          KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n      cfm->handle = param->handle;\n      cfm->status = status;\n      ke_msg_send(cfm);\n    } else // Should be the SC Control Point Characteristic\n    {\n      if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->prf_cfg,\n                                     RSCPS_SC_CTNL_PT_MASK)) {\n        // SC Control Point, Client Characteristic Configuration Descriptor\n        if (param->handle == (RSCPS_HANDLE(RSCS_IDX_SC_CTNL_PT_NTF_CFG))) {\n          uint16_t ntf_cfg;\n          // Status\n          uint8_t status = PRF_ERR_INVALID_PARAM;\n\n          // Get the value\n          co_write16p(&ntf_cfg, param->value[0]);\n\n          // Check if the value is correct\n          if ((ntf_cfg == PRF_CLI_STOP_NTFIND) ||\n              (ntf_cfg == PRF_CLI_START_IND)) {\n            status = GAP_ERR_NO_ERROR;\n\n            // Save the new configuration in the environment\n            if (ntf_cfg == PRF_CLI_STOP_NTFIND) {\n              RSCPS_DISABLE_NTFIND(conidx, RSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND);\n            } else // ntf_cfg == PRF_CLI_START_IND\n            {\n              RSCPS_ENABLE_NTFIND(conidx, RSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND);\n            }\n\n            // Inform the HL about the new configuration\n            struct rscps_cfg_ntfind_ind *ind =\n                KE_MSG_ALLOC(RSCPS_CFG_NTFIND_IND,\n                             prf_dst_task_get(&rscps_env->prf_env, conidx),\n                             prf_src_task_get(&rscps_env->prf_env, conidx),\n                             rscps_cfg_ntfind_ind);\n\n            ind->char_code = RSCP_RSCS_SC_CTNL_PT_CHAR;\n            ind->ntf_cfg = ntf_cfg;\n\n            ke_msg_send(ind);\n\n            // Enable Bonded Data\n            RSCPS_ENABLE_NTFIND(conidx, RSCP_PRF_CFG_PERFORMED_OK);\n          }\n          // else status is RSCP_ERROR_CCC_INVALID_PARAM\n\n          // Send the write response to the peer device\n          struct gattc_write_cfm *cfm =\n              KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n          cfm->handle = param->handle;\n          cfm->status = status;\n          ke_msg_send(cfm);\n        }\n        // SC Control Point Characteristic\n        else if (param->handle == (RSCPS_HANDLE(RSCS_IDX_SC_CTNL_PT_VAL))) {\n          // Write Response Status\n          uint8_t wr_status = ATT_ERR_NO_ERROR;\n          // Indication Status\n          uint8_t ind_status = RSCP_CTNL_PT_RESP_NOT_SUPP;\n\n          do {\n            // Check if sending of indications has been enabled\n            if (!RSCPS_IS_NTFIND_ENABLED(conidx,\n                                         RSCP_PRF_CFG_FLAG_SC_CTNL_PT_IND)) {\n              // CCC improperly configured\n              wr_status = RSCP_ERROR_CCC_INVALID_PARAM;\n              ind_status = RSCP_CTNL_PT_RESP_FAILED;\n              break;\n            }\n\n            if ((rscps_env->operation >= RSCPS_CTNL_PT_CUMUL_VAL_OP_CODE) &&\n                (rscps_env->operation <= RSCPS_CTNL_ERR_IND_OP_CODE)) {\n              // A procedure is already in progress\n              wr_status = RSCP_ERROR_PROC_IN_PROGRESS;\n              ind_status = RSCP_CTNL_PT_RESP_FAILED;\n              break;\n            }\n\n            if (rscps_env->operation == RSCPS_SEND_RSC_MEAS_OP_CODE) {\n              // Keep the message until the end of the current procedure\n              msg_status = KE_MSG_SAVED;\n              break;\n            }\n\n            // Allocate a request indication message for the application\n            struct rscps_sc_ctnl_pt_req_ind *req_ind =\n                KE_MSG_ALLOC(RSCPS_SC_CTNL_PT_REQ_IND,\n                             prf_dst_task_get(&rscps_env->prf_env, conidx),\n                             prf_src_task_get(&rscps_env->prf_env, conidx),\n                             rscps_sc_ctnl_pt_req_ind);\n\n            // Operation Code\n            req_ind->op_code = param->value[0];\n            // Connection index\n            req_ind->conidx = conidx;\n\n            // Operation Code\n            switch (param->value[0]) {\n            // Set Cumulative value\n            case (RSCP_CTNL_PT_OP_SET_CUMUL_VAL): {\n              // Check if the Total Distance Measurement feature is supported\n              if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->features,\n                                             RSCP_FEAT_TOTAL_DST_MEAS_SUPP)) {\n                // The request can be handled\n                ind_status = RSCP_CTNL_PT_RESP_SUCCESS;\n                rscps_env->operation = RSCPS_CTNL_PT_CUMUL_VAL_OP_CODE;\n\n                // Cumulative value\n                req_ind->value.cumul_value = co_read32p(¶m->value[1]);\n              }\n            } break;\n\n            // Start Sensor calibration\n            case (RSCP_CTNL_PT_OP_START_CALIB): {\n              // Check if the Calibration Procedure feature is supported\n              if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->features,\n                                             RSCP_FEAT_CALIB_PROC_SUPP)) {\n                // The request can be handled\n                ind_status = RSCP_CTNL_PT_RESP_SUCCESS;\n\n                rscps_env->operation = RSCPS_CTNL_PT_START_CAL_OP_CODE;\n              }\n            } break;\n\n            // Update sensor location\n            case (RSCP_CTNL_PT_OP_UPD_LOC): {\n              // Check if the Multiple Sensor Location feature is supported\n              if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->features,\n                                             RSCP_FEAT_MULT_SENSOR_LOC_SUPP)) {\n                // Check the sensor location value\n                if (param->value[1] < RSCP_LOC_MAX) {\n                  // The request can be handled\n                  ind_status = RSCP_CTNL_PT_RESP_SUCCESS;\n\n                  rscps_env->operation = RSCPS_CTNL_PT_UPD_LOC_OP_CODE;\n\n                  // Sensor Location\n                  req_ind->value.sensor_loc = param->value[1];\n                } else {\n                  // Provided parameter in not within the defined range\n                  ind_status = RSCP_CTNL_PT_RESP_INV_PARAM;\n                }\n              }\n            } break;\n\n            // Request supported sensor locations\n            case (RSCP_CTNL_PT_OP_REQ_SUPP_LOC): {\n              // Check if the Multiple Sensor Location feature is supported\n              if (RSCPS_IS_FEATURE_SUPPORTED(rscps_env->features,\n                                             RSCP_FEAT_MULT_SENSOR_LOC_SUPP)) {\n                // The request can be handled\n                ind_status = RSCP_CTNL_PT_RESP_SUCCESS;\n\n                rscps_env->operation = RSCPS_CTNL_PT_SUPP_LOC_OP_CODE;\n              }\n            } break;\n\n            default: {\n              // Operation Code is invalid, status is already\n              // RSCP_CTNL_PT_RESP_NOT_SUPP\n            } break;\n            }\n\n            // If no error raised, inform the application about the request\n            if (ind_status == RSCP_CTNL_PT_RESP_SUCCESS) {\n              // Send the request indication to the application\n              ke_msg_send(req_ind);\n              // Go to the Busy status\n              ke_state_set(dest_id, RSCPS_BUSY);\n              // Align error code\n              wr_status = GAP_ERR_NO_ERROR;\n            } else {\n              // Free the allocated message\n              ke_msg_free(ke_param2msg(req_ind));\n            }\n          } while (0);\n\n          // Send the write response to the peer device\n          struct gattc_write_cfm *cfm =\n              KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n          cfm->handle = param->handle;\n          cfm->status = wr_status;\n          ke_msg_send(cfm);\n\n          // If error raised in control point, inform the peer\n          if ((ind_status != RSCP_CTNL_PT_RESP_SUCCESS) &&\n              (param->handle == (RSCPS_HANDLE(RSCS_IDX_SC_CTNL_PT_VAL)))) {\n            rscps_send_rsp_ind(conidx, param->value[0], ind_status);\n          }\n        } else {\n          ASSERT_ERR(0);\n        }\n      }\n    }\n  }\n  // else drop the message\n\n  return (int)msg_status;\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATT_NOTIFY_CMP_EVT message meaning that a notification\n *or an indication has been correctly sent to peer device (but not confirmed by\n *peer device).\n *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t conidx = KE_IDX_GET(src_id);\n  // Get the address of the environment\n  struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n\n  // Check if a connection exists\n  if (ke_state_get(dest_id) == RSCPS_BUSY) {\n    switch (param->operation) {\n    case (GATTC_NOTIFY): {\n      ASSERT_ERR(rscps_env->operation == RSCPS_SEND_RSC_MEAS_OP_CODE);\n      // continuer operation execution\n      rscps_exe_operation();\n    } break;\n\n    case (GATTC_INDICATE): {\n      ASSERT_ERR((rscps_env->operation >= RSCPS_CTNL_PT_CUMUL_VAL_OP_CODE) ||\n                 (rscps_env->operation != RSCPS_CTNL_ERR_IND_OP_CODE));\n\n      // Inform the application that a procedure has been completed\n      rscps_send_cmp_evt(conidx, prf_src_task_get(&rscps_env->prf_env, conidx),\n                         prf_dst_task_get(&rscps_env->prf_env, conidx),\n                         rscps_env->operation, param->status);\n    } break;\n\n    default: {\n      ASSERT_ERR(0);\n    } break;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Specifies the default message handlers\nKE_MSG_HANDLER_TAB(rscps){\n    {RSCPS_ENABLE_REQ, (ke_msg_func_t)rscps_enable_req_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n    {RSCPS_NTF_RSC_MEAS_REQ, (ke_msg_func_t)rscps_ntf_rsc_meas_req_handler},\n    {RSCPS_SC_CTNL_PT_CFM, (ke_msg_func_t)rscps_sc_ctnl_pt_cfm_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid rscps_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct rscps_env_tag *rscps_env = PRF_ENV_GET(RSCPS, rscps);\n\n  task_desc->msg_handler_tab = rscps_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(rscps_msg_handler_tab);\n  task_desc->state = rscps_env->state;\n  task_desc->idx_max = RSCPS_IDX_MAX;\n}\n\n#endif //(BLE_RSC_SENSOR)\n\n/// @} RSCPSTASK\n"
  },
  {
    "path": "services/ble_profiles/tip/tip_common.h",
    "content": "#ifndef _TIP_COMMON_H_\n#define _TIP_COMMON_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TIP Time Profile\n * @ingroup PROFILE\n * @brief Time Profile\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"prf_types.h\"\n#include \n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n///Adjust Reason Flags field bit values\nenum\n{\n    TIPS_FLAG_MAN_TIME_UPDATE = 0x01,\n    TIPS_FLAG_EXT_TIME_UPDATE = 0x02,\n    TIPS_FLAG_CHG_TIME_ZONE = 0x04,\n    TIPS_FLAG_DST_CHANGE = 0x08,\n};\n\n///Time Update Control Point Key values\nenum\n{\n    TIPS_TIME_UPD_CTNL_PT_GET = 0x01,\n    TIPS_TIME_UPD_CTNL_PT_CANCEL,\n};\n\n///Time Update State Current State Key Values\nenum\n{\n    TIPS_TIME_UPD_STATE_IDLE = 0x00,\n    TIPS_TIME_UPD_STATE_PENDING,\n};\n\n///Time Update State Result Key Values\nenum\n{\n    TIPS_TIME_UPD_RESULT_SUCCESS = 0x00,\n    TIPS_TIME_UPD_RESULT_CANCELED,\n    TIPS_TIME_UPD_RESULT_NO_CONN,\n    TIPS_TIME_UPD_RESULT_ERROR_RSP,\n    TIPS_TIME_UPD_RESULT_TIMEOUT,\n    TIPS_TIME_UPD_NOT_ATTEMPTED,\n};\n\n///Time Profile Supported Features bit flags\nenum\n{\n    ///NDCS bit\n    ///NDCS supported\n    TIPS_NDCS_SUPPORTED            = 0x01,\n\n    ///RTUS bit\n    ///RTUS supported\n    TIPS_RTUS_SUPPORTED            = 0x02,\n};\n\nenum\n{\n    TIP_RD_RSP        = 0x00,\n    TIP_NTF            = 0x01,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/**\n * Each of the following structure is related to a characteristic.\n */\n\n/*\n * Current Time Service\n */\n\n///Current Time Characteristic Structure\nstruct tip_curr_time\n{\n    /// Date time\n    struct prf_date_time date_time;\n    /// Day of the week\n    uint8_t day_of_week;\n    /// 1/256th of a second\n    uint8_t fraction_256;\n    /// Adjust reason\n    uint8_t adjust_reason;\n};\n\n/**\n *\n * Time Zone Characteristic - UUID:0x2A0E\n * Min value : -48 (UTC-12:00), Max value : 56 (UTC+14:00)\n * -128 : Time zone offset is not known\n */\ntypedef int8_t tip_time_zone;\n\n/**\n * DST Offset Characteristic - UUID:0x2A2D\n * Min value : 0, Max value : 8\n * 255 = DST is not known\n */\ntypedef uint8_t tip_dst_offset;\n\n///Local Time Info Characteristic Structure - UUID:0x2A0F\nstruct tip_loc_time_info\n{\n    tip_time_zone time_zone;\n    tip_dst_offset dst_offset;\n};\n\n/**\n * Time Source Characteristic - UUID:0x2A13\n * Min value : 0, Max value : 6\n * 0 = Unknown\n * 1 = Network Time Protocol\n * 2 = GPS\n * 3 = Radio Time Signal\n * 4 = Manual\n * 5 = Atomic Clock\n * 6 = Cellular Network\n */\ntypedef uint8_t tip_time_source;\n\n/**\n * Time Accuracy Characteristic - UUID:0x2A12\n * Accuracy (drift) of time information in steps of 1/8 of a second (125ms) compared\n * to a reference time source. Valid range from 0 to 253 (0s to 31.5s). A value of\n * 254 means Accuracy is out of range (> 31.5s). A value of 255 means Accuracy is\n * unknown.\n */\ntypedef uint8_t tip_time_accuracy;\n\n///Reference Time Info Characteristic Structure - UUID:0x2A14\nstruct tip_ref_time_info\n{\n    tip_time_source time_source;\n    tip_time_accuracy time_accuracy;\n    /**\n     * Days since last update about Reference Source\n     * Min value : 0, Max value : 254\n     * 255 = 255 or more days\n     */\n    uint8_t days_update;\n    /**\n     * Hours since update about Reference Source\n     * Min value : 0, Mac value : 23\n     * 255 = 255 or more days (If Days Since Update = 255, then Hours Since Update shall\n     * also be set to 255)\n     */\n    uint8_t hours_update;\n};\n\n/*\n * Next DST Change Service\n */\n///Time With DST Characteristic Structure - UUID:0x2A11\nstruct tip_time_with_dst\n{\n    ///Date and Time of the Next DST Change\n    struct prf_date_time date_time;\n    ///DST Offset that will be in effect after this change\n    tip_dst_offset dst_offset;\n};\n\n/*\n * Reference Time Update Service\n */\n/**\n * Time Update Control Point Characteristic - UUID:0x2A16\n * The Time Update Control Point Characteristic enables a client to issue a command\n * request to update the time in the time server.\n * 0x01 = Get Reference Update = Forces the state machine to Update Pending and\n * starts the time update procedure\n * 0x02 = Cancel Reference Update = Forces the state machine to idle and stops the\n * attempt to receive a time update.\n */\ntypedef uint8_t tip_time_upd_contr_pt;\n\n///Time Update State Characteristic Structure - UUID:0x2A17\nstruct tip_time_upd_state\n{\n    /**\n     * The Time Update Status Characteristic exposes the status of the time update\n     * process and the result of the last update in the server.\n     */\n\n    /**\n     * Current State\n     * Min value : 0, Max value = 1\n     * 0 = Idle\n     * 1 = Update Pending\n     */\n    uint8_t current_state;\n    /**\n     * Result\n     * Min value : 0, Max Value : 5\n     * 0 = Successful\n     * 1 = Canceled\n     * 2 = No Connection To Reference\n     * 3 = Reference responded with an error\n     * 4 = Timeout\n     * 5 = Update not attempted after reset\n     */\n    uint8_t result;\n};\n\n\n/// @} tip_common\n\n#endif /* _TIP_COMMON_H_ */\n"
  },
  {
    "path": "services/ble_profiles/tip/tipc/api/tipc_task.h",
    "content": "#ifndef _TIPC_TASK_H_\n#define _TIPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TIPCTASK Time Profile Client Task\n * @ingroup TIPC\n * @brief Time Profile Client Task\n *\n * The TIPCTASK is responsible for handling the messages coming in and out of the\n * @ref TIPC monitor block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"tip_common.h\"\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\nenum\n{\n    /// Start the time profile - at connection\n    TIPC_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_TIPC),\n    ///Confirm that cfg connection has finished with discovery results, or that normal cnx started\n    TIPC_ENABLE_RSP,\n\n    /// Generic message to read a CTS, NDCS or RTUS characteristic value\n    TIPC_RD_CHAR_REQ,\n    /// Received read value\n    TIPC_RD_CHAR_RSP,\n\n    ///Generic message for configuring the Current Time Characteristic on the Server\n    TIPC_CT_NTF_CFG_REQ,\n    ///Current Time Characteristic configuration response\n    TIPC_CT_NTF_CFG_RSP,\n\n    /// Generic message for writing the Time Update Control Point Characteristic Value on a peer device\n    TIPC_WR_TIME_UPD_CTNL_PT_REQ,\n    ///Generic message for writing characteristic response status to APP\n    TIPC_WR_TIME_UPD_CTNL_PT_RSP,\n\n    /// Received Current Time value (Notification)\n    TIPC_CT_IND,\n};\n\n\n\n/// Current Time Service Characteristics\nenum\n{\n    /// Current Time\n    TIPC_CHAR_CTS_CURR_TIME,\n    /// Local Time Info\n    TIPC_CHAR_CTS_LOCAL_TIME_INFO,\n    /// Reference Time Info\n    TIPC_CHAR_CTS_REF_TIME_INFO,\n\n    TIPC_CHAR_CTS_MAX,\n};\n\n/// Next DST Change Service Characteristics\nenum\n{\n    /// Time With DST\n    TIPC_CHAR_NDCS_TIME_WITH_DST,\n\n    TIPC_CHAR_NDCS_MAX,\n    TIPC_CHAR_NDCS_MASK = 0x10,\n};\n\n/// Reference Time Update Service Characteristics\nenum\n{\n    /// Time Update Control Point\n    TIPC_CHAR_RTUS_TIME_UPD_CTNL_PT,\n    /// Time Update State\n    TIPC_CHAR_RTUS_TIME_UPD_STATE,\n\n    TIPC_CHAR_RTUS_MAX,\n    TIPC_CHAR_RTUS_MASK = 0x20,\n};\n\n/// Current Time Service Characteristic Descriptors\nenum\n{\n    /// Current Time client config\n    TIPC_DESC_CTS_CURR_TIME_CLI_CFG,\n\n    TIPC_DESC_CTS_MAX,\n    TIPC_DESC_CTS_MASK = 0x30,\n};\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Current Time Service\n */\nstruct tipc_cts_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// Characteristic info:\n    ///  - Current Time\n    ///  - Local Time Info\n    ///  - Reference Time Info\n    struct prf_char_inf chars[TIPC_CHAR_CTS_MAX];\n\n    /// Descriptor handles:\n    ///  - Current Time client cfg\n    struct prf_char_desc_inf descs[TIPC_DESC_CTS_MAX];\n};\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Next DST Change Service\n */\nstruct tipc_ndcs_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// characteristic info:\n    ///  - Time With DST\n    struct prf_char_inf chars[TIPC_CHAR_NDCS_MAX];\n};\n\n/**\n * Structure containing the characteristics handles, value handles and descriptors for\n * the Reference Time Update Service\n */\nstruct tipc_rtus_content\n{\n    /// service info\n    struct prf_svc svc;\n\n    /// characteristic info:\n    ///  - Time Update Control Point\n    ///  - Time Update State\n    struct prf_char_inf chars[TIPC_CHAR_RTUS_MAX];\n};\n\n\n/// Parameters of the @ref TIPC_ENABLE_REQ message\nstruct tipc_enable_req\n{\n    ///Connection type\n    uint8_t con_type;\n\n    ///Existing handle values cts\n    struct tipc_cts_content cts;\n    ///Existing handle values ndcs\n    struct tipc_ndcs_content ndcs;\n    ///Existing handle values rtus\n    struct tipc_rtus_content rtus;\n};\n\n/// Parameters of the @ref TIPC_ENABLE_RSP message\nstruct tipc_enable_rsp\n{\n    ///status\n    uint8_t status;\n\n    ///Existing handle values cts\n    struct tipc_cts_content cts;\n    ///Existing handle values ndcs\n    struct tipc_ndcs_content ndcs;\n    ///Existing handle values rtus\n    struct tipc_rtus_content rtus;\n};\n\n///Parameters of the @ref TIPC_CT_NTF_CFG_REQ message\nstruct tipc_ct_ntf_cfg_req\n{\n    ///Stop/notify/indicate value to configure into the peer characteristic\n    uint16_t cfg_val;\n};\n\n///Parameters of the @ref TIPC_CT_NTF_CFG_RSP message\nstruct tipc_ct_ntf_cfg_rsp\n{\n    ///Status\n    uint8_t status;\n};\n\n///Parameters of the @ref TIPC_RD_CHAR_REQ message\nstruct tipc_rd_char_req\n{\n    ///Characteristic value code\n    uint8_t  char_code;\n};\n\n///Parameters of the @ref TIPC_RD_CHAR_RSP message\nstruct tipc_rd_char_rsp\n{\n    /// Operation code\n    uint8_t op_code;\n    /// Status\n    uint8_t status;\n\n    union tipc_rd_value_tag\n    {\n        ///Notification Configuration\n        uint16_t ntf_cfg;\n        ///Current Time\n        struct tip_curr_time curr_time;\n        ///Local Time Information\n        struct tip_loc_time_info loc_time_info;\n        ///Reference Time Information\n        struct tip_ref_time_info ref_time_info;\n        ///Time With DST\n        struct tip_time_with_dst time_with_dst;\n        ///Time Update State\n        struct tip_time_upd_state time_upd_state;\n    } value;\n};\n\n///Parameters of the @ref TIPC_WR_TIME_UPD_CTNL_PT_REQ message\nstruct tipc_wr_time_udp_ctnl_pt_req\n{\n    ///Value\n    uint8_t value;\n};\n\n///Parameters of the @ref TIPC_WR_TIME_UPD_CTNL_PT_RSP message\nstruct tipc_wr_time_upd_ctnl_pt_rsp\n{\n    ///Status\n    uint8_t  status;\n};\n\n///Parameters of the @ref TIPC_CT_IND message\nstruct tipc_ct_ind\n{\n    ///Current Time Value\n    struct tip_curr_time ct_val;\n};\n\n\n/// @} TIPCTASK\n\n#endif /* _TIPC_TASK_H_ */\n"
  },
  {
    "path": "services/ble_profiles/tip/tipc/src/tipc.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup TIPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_TIP_CLIENT)\n#include \"gap.h\"\n#include \"prf.h\"\n#include \"tipc.h\"\n#include \"tipc_task.h\"\n\n#include \"ke_mem.h\"\n\n/**\n ****************************************************************************************\n * @brief Initialization of the TIPC module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t tipc_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t idx;\n  //-------------------- allocate memory required for the profile\n  //---------------------\n\n  struct tipc_env_tag *tipc_env = (struct tipc_env_tag *)ke_malloc(\n      sizeof(struct tipc_env_tag), KE_MEM_ATT_DB);\n\n  // allocate TIPC required environment variable\n  env->env = (prf_env_t *)tipc_env;\n\n  tipc_env->prf_env.app_task =\n      app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                            : PERM(PRF_MI, DISABLE));\n  tipc_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n  // initialize environment variable\n  env->id = TASK_ID_TIPC;\n  tipc_task_init(&(env->desc));\n\n  for (idx = 0; idx < TIPC_IDX_MAX; idx++) {\n    tipc_env->env[idx] = NULL;\n    // service is ready, go into an Idle state\n    ke_state_set(KE_BUILD_ID(env->task, idx), TIPC_FREE);\n  }\n\n  return GAP_ERR_NO_ERROR;\n}\n\n/**\n ****************************************************************************************\n * @brief Clean-up connection dedicated environment parameters\n * This function performs cleanup of ongoing operations\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void tipc_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct tipc_env_tag *tipc_env = (struct tipc_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (tipc_env->env[conidx] != NULL) {\n    ke_free(tipc_env->env[conidx]);\n    tipc_env->env[conidx] = NULL;\n  }\n\n  /* Put TIP Client in Free state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), TIPC_FREE);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the TIPC module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void tipc_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct tipc_env_tag *tipc_env = (struct tipc_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < TIPC_IDX_MAX; idx++) {\n    tipc_cleanup(env, idx, 0);\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(tipc_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void tipc_create(struct prf_task_env *env, uint8_t conidx) {\n  /* Put TIP Client in Idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), TIPC_IDLE);\n}\n\n/// TIPC Task interface required by profile manager\nconst struct prf_task_cbs tipc_itf = {\n    tipc_init,\n    tipc_destroy,\n    tipc_create,\n    tipc_cleanup,\n};\n\n/*\n * GLOBAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *tipc_prf_itf_get(void) { return &tipc_itf; }\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nvoid tipc_enable_rsp_send(struct tipc_env_tag *tipc_env, uint8_t conidx,\n                          uint8_t status) {\n  // Send to APP the details of the discovered attributes on TIPS\n  struct tipc_enable_rsp *rsp = KE_MSG_ALLOC(\n      TIPC_ENABLE_RSP, prf_dst_task_get(&(tipc_env->prf_env), conidx),\n      prf_src_task_get(&(tipc_env->prf_env), conidx), tipc_enable_rsp);\n\n  rsp->status = status;\n\n  if (status == GAP_ERR_NO_ERROR) {\n    rsp->cts = tipc_env->env[conidx]->cts;\n    rsp->ndcs = tipc_env->env[conidx]->ndcs;\n    rsp->rtus = tipc_env->env[conidx]->rtus;\n\n    // register TIPC task in gatt for indication/notifications\n    prf_register_atthdl2gatt(&tipc_env->prf_env, conidx,\n                             &tipc_env->env[conidx]->cts.svc);\n\n    // Go to connected state\n    ke_state_set(prf_src_task_get(&tipc_env->prf_env, conidx), TIPC_IDLE);\n  }\n\n  ke_msg_send(rsp);\n}\n\nvoid tipc_unpack_curr_time_value(struct tip_curr_time *p_curr_time_val,\n                                 uint8_t *packed_ct) {\n  // Date-Time\n  prf_unpack_date_time(packed_ct, &(p_curr_time_val->date_time));\n\n  // Day of Week\n  p_curr_time_val->day_of_week = packed_ct[7];\n\n  // Fraction 256\n  p_curr_time_val->fraction_256 = packed_ct[8];\n\n  // Adjust Reason\n  p_curr_time_val->adjust_reason = packed_ct[9];\n}\n\nvoid tipc_unpack_time_dst_value(struct tip_time_with_dst *p_time_dst_val,\n                                uint8_t *packed_tdst) {\n  // Date-Time\n  prf_unpack_date_time(packed_tdst, &(p_time_dst_val->date_time));\n\n  // DST Offset\n  p_time_dst_val->dst_offset = packed_tdst[7];\n}\n\n#endif /* (BLE_TIP_CLIENT) */\n\n/// @} TIPC\n"
  },
  {
    "path": "services/ble_profiles/tip/tipc/src/tipc.h",
    "content": "#ifndef _TIPC_H_\n#define _TIPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TIPC Time Profile Client\n * @ingroup TIP\n * @brief Time Profile Client\n *\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_TIP_CLIENT)\n#include \"tipc_task.h\"\n#include \"ke_task.h\"\n#include \"prf_types.h\"\n#include \"prf_utils.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Maximum number of Time Client task instances\n#define TIPC_IDX_MAX    (BLE_CONNECTION_MAX)\n\n/// Possible states of the TIPC task\nenum\n{\n    /// Free state\n    TIPC_FREE,\n    /// IDLE state\n    TIPC_IDLE,\n    /// Discovering Blood Pressure SVC and CHars\n    TIPC_DISCOVERING,\n    /// Busy state\n    TIPC_BUSY,\n\n    /// Number of defined states.\n    TIPC_STATE_MAX\n};\n\n/// Internal codes for reading a CTS or NDCS or RTUS characteristic with one single request\nenum\n{\n    ///Read CTS Current Time\n    TIPC_RD_CTS_CURR_TIME           = TIPC_CHAR_CTS_CURR_TIME,\n    ///Read CTS Local Time Info\n    TIPC_RD_CTS_LOCAL_TIME_INFO     = TIPC_CHAR_CTS_LOCAL_TIME_INFO,\n    ///Read CTS Reference Time Info\n    TIPC_RD_CTS_REF_TIME_INFO       = TIPC_CHAR_CTS_REF_TIME_INFO,\n\n    ///Read CTS Current Time Client Cfg. Desc\n    TIPC_RD_CTS_CURR_TIME_CLI_CFG   = (TIPC_DESC_CTS_MASK | TIPC_DESC_CTS_CURR_TIME_CLI_CFG),\n\n    ///Read NDCS Time With DST\n    TIPC_RD_NDCS_TIME_WITH_DST      = (TIPC_CHAR_NDCS_MASK | TIPC_CHAR_NDCS_TIME_WITH_DST),\n\n    ///Read RTUS Time Update State\n    TIPC_RD_RTUS_TIME_UPD_STATE     = (TIPC_CHAR_RTUS_MASK | TIPC_CHAR_RTUS_TIME_UPD_STATE),\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\nstruct tipc_cnx_env\n{\n    /// Last requested UUID(to keep track of the two services and char)\n    uint16_t last_uuid_req;\n    ///Last service for which something was discovered\n    uint16_t last_svc_req;\n    /// Last characteristic code used in a read or a write request\n    uint16_t last_char_code;\n    /// Counter used to check service uniqueness\n    uint8_t nb_svc;\n\n    ///Current Time Service Characteristics\n    struct tipc_cts_content cts;\n    ///Next DST Change Characteristics\n    struct tipc_ndcs_content ndcs;\n    ///Reference Time Update Characteristics\n    struct tipc_rtus_content rtus;\n};\n\n\n/// Time Profile Client environment variable\nstruct tipc_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n    /// Environment variable pointer for each connections\n    struct tipc_cnx_env* env[TIPC_IDX_MAX];\n    /// State of different task instances\n    ke_state_t state[TIPC_IDX_MAX];\n};\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve TIP client profile interface\n * @return TIP client profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* tipc_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Send Time ATT DB discovery results to TIPC host.\n ****************************************************************************************\n */\nvoid tipc_enable_rsp_send(struct tipc_env_tag *tipc_env, uint8_t conidx, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send error indication from profile to Host, with proprietary status codes.\n * @param status Status code of error.\n ****************************************************************************************\n */\n\nvoid tipc_unpack_curr_time_value(struct tip_curr_time* p_curr_time_val, uint8_t* packed_ct);\n//\nvoid tipc_unpack_time_dst_value(struct tip_time_with_dst* p_time_dst_val, uint8_t* packed_tdst);\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid tipc_task_init(struct ke_task_desc *task_desc);\n\n#endif /* (BLE_TIP_CLIENT) */\n\n/// @} TIPC\n\n#endif /* _TIPC_H_ */\n"
  },
  {
    "path": "services/ble_profiles/tip/tipc/src/tipc_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup TIPCTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_TIP_CLIENT)\n#include \"attm.h\"\n#include \"co_utils.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"tipc.h\"\n#include \"tipc_task.h\"\n\n#include \"ke_mem.h\"\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// State machine used to retrieve Current Time service characteristics\n/// information\nconst struct prf_char_def tipc_cts_char[TIPC_CHAR_CTS_MAX] = {\n    /// Current Time\n    [TIPC_CHAR_CTS_CURR_TIME] = {ATT_CHAR_CT_TIME, ATT_MANDATORY,\n                                 ATT_CHAR_PROP_RD | ATT_CHAR_PROP_NTF},\n    /// Local Time Info\n    [TIPC_CHAR_CTS_LOCAL_TIME_INFO] = {ATT_CHAR_LOCAL_TIME_INFO, ATT_OPTIONAL,\n                                       ATT_CHAR_PROP_RD},\n    /// Reference Time Info\n    [TIPC_CHAR_CTS_REF_TIME_INFO] = {ATT_CHAR_REFERENCE_TIME_INFO, ATT_OPTIONAL,\n                                     ATT_CHAR_PROP_RD},\n};\n\n/// State machine used to retrieve Current Time service characteristic\n/// description information\nconst struct prf_char_desc_def tipc_cts_char_desc[TIPC_DESC_CTS_MAX] = {\n    /// Current Time client config\n    [TIPC_DESC_CTS_CURR_TIME_CLI_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                         ATT_MANDATORY,\n                                         TIPC_CHAR_CTS_CURR_TIME},\n};\n\n/// State machine used to retrieve Next DST Change service characteristics\n/// information\nconst struct prf_char_def tipc_ndcs_char[TIPC_CHAR_NDCS_MAX] = {\n    /// Current Time\n    [TIPC_CHAR_NDCS_TIME_WITH_DST] = {ATT_CHAR_TIME_WITH_DST, ATT_MANDATORY,\n                                      ATT_CHAR_PROP_RD},\n};\n\n/// State machine used to retrieve Reference Time Update service characteristics\n/// information\nconst struct prf_char_def tipc_rtus_char[TIPC_CHAR_RTUS_MAX] = {\n    /// Time Update Control Point\n    [TIPC_CHAR_RTUS_TIME_UPD_CTNL_PT] = {ATT_CHAR_TIME_UPDATE_CNTL_POINT,\n                                         ATT_MANDATORY,\n                                         ATT_CHAR_PROP_WR_NO_RESP},\n    /// Time Update State\n    [TIPC_CHAR_RTUS_TIME_UPD_STATE] = {ATT_CHAR_TIME_UPDATE_STATE,\n                                       ATT_MANDATORY, ATT_CHAR_PROP_RD},\n};\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_SDP_SVC_IND_HANDLER message.\n * The handler stores the found service details for service discovery.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_sdp_svc_ind_handler(ke_msg_id_t const msgid,\n                                       struct gattc_sdp_svc_ind const *ind,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n\n  if (state == TIPC_DISCOVERING) {\n    uint8_t conidx = KE_IDX_GET(dest_id);\n\n    struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n\n    ASSERT_INFO(tipc_env != NULL, dest_id, src_id);\n    ASSERT_INFO(tipc_env->env[conidx] != NULL, dest_id, src_id);\n\n    if (attm_uuid16_comp((unsigned char *)ind->uuid, ind->uuid_len,\n                         ATT_SVC_CURRENT_TIME)) {\n      // Retrieve TIS characteristics and descriptors\n      prf_extract_svc_info(ind, TIPC_CHAR_CTS_MAX, &tipc_cts_char[0],\n                           &tipc_env->env[conidx]->cts.chars[0],\n                           TIPC_DESC_CTS_MAX, &tipc_cts_char_desc[0],\n                           &tipc_env->env[conidx]->cts.descs[0]);\n\n      // Even if we get multiple responses we only store 1 range\n      tipc_env->env[conidx]->cts.svc.shdl = ind->start_hdl;\n      tipc_env->env[conidx]->cts.svc.ehdl = ind->end_hdl;\n    }\n\n    if (attm_uuid16_comp((unsigned char *)ind->uuid, ind->uuid_len,\n                         ATT_SVC_NEXT_DST_CHANGE)) {\n      // Retrieve NDCS characteristics and descriptors\n      prf_extract_svc_info(ind, TIPC_CHAR_NDCS_MAX, &tipc_ndcs_char[0],\n                           &tipc_env->env[conidx]->ndcs.chars[0], 0, NULL,\n                           NULL);\n\n      // Even if we get multiple responses we only store 1 range\n      tipc_env->env[conidx]->ndcs.svc.shdl = ind->start_hdl;\n      tipc_env->env[conidx]->ndcs.svc.ehdl = ind->end_hdl;\n    }\n\n    if (attm_uuid16_comp((unsigned char *)ind->uuid, ind->uuid_len,\n                         ATT_SVC_REF_TIME_UPDATE)) {\n      // Retrieve RTUS characteristics and descriptors\n      prf_extract_svc_info(ind, TIPC_CHAR_RTUS_MAX, &tipc_rtus_char[0],\n                           &tipc_env->env[conidx]->rtus.chars[0], 0, NULL,\n                           NULL);\n\n      // Even if we get multiple responses we only store 1 range\n      tipc_env->env[conidx]->rtus.svc.shdl = ind->start_hdl;\n      tipc_env->env[conidx]->rtus.svc.ehdl = ind->end_hdl;\n    }\n\n    // Increment number of services\n    tipc_env->env[conidx]->nb_svc++;\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref TIPC_ENABLE_REQ message.\n * The handler enables the Time Profile Client Role.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int tipc_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct tipc_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Get state\n  uint8_t state = ke_state_get(dest_id);\n\n  // Time Service Client Role Task Environment\n  struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n\n  ASSERT_INFO(tipc_env != NULL, dest_id, src_id);\n  if ((state == TIPC_IDLE) && (tipc_env->env[conidx] == NULL)) {\n    // allocate environment variable for task instance\n    tipc_env->env[conidx] = (struct tipc_cnx_env *)ke_malloc(\n        sizeof(struct tipc_cnx_env), KE_MEM_ATT_DB);\n    memset(tipc_env->env[conidx], 0, sizeof(struct tipc_cnx_env));\n\n    // config connection, start discovering\n    if (param->con_type == PRF_CON_DISCOVERY) {\n      // start discovering CTS on peer\n      prf_disc_svc_send(&(tipc_env->prf_env), conidx, ATT_SVC_CURRENT_TIME);\n\n      tipc_env->env[conidx]->last_uuid_req = ATT_SVC_CURRENT_TIME;\n      tipc_env->env[conidx]->last_svc_req = ATT_SVC_CURRENT_TIME;\n\n      // Go to DISCOVERING state\n      ke_state_set(dest_id, TIPC_DISCOVERING);\n    }\n    // normal connection, get saved att details\n    else {\n      tipc_env->env[conidx]->cts = param->cts;\n      tipc_env->env[conidx]->ndcs = param->ndcs;\n      tipc_env->env[conidx]->rtus = param->rtus;\n\n      // send APP confirmation that can start normal connection\n      tipc_enable_rsp_send(tipc_env, conidx, GAP_ERR_NO_ERROR);\n    }\n  }\n\n  else if (state != TIPC_FREE) {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // send an error if request fails\n  if (status != GAP_ERR_NO_ERROR) {\n    tipc_enable_rsp_send(tipc_env, conidx, status);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref TIPC_RD_CHAR_REQ message.\n * Check if the handle exists in profile(already discovered) and send request,\n *otherwise error to APP.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int tipc_rd_char_req_handler(ke_msg_id_t const msgid,\n                                      struct tipc_rd_char_req const *param,\n                                      ke_task_id_t const dest_id,\n                                      ke_task_id_t const src_id) {\n\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  // Get the address of the environment\n  struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if ((state == TIPC_IDLE) && (tipc_env->env[conidx] != NULL)) {\n    // Service\n    struct prf_svc *svc = NULL;\n    // Attribute Handle\n    uint16_t search_hdl = ATT_INVALID_SEARCH_HANDLE;\n\n    // Next DST Change Service Characteristic\n    if (((param->char_code & TIPC_CHAR_NDCS_MASK) == TIPC_CHAR_NDCS_MASK) &&\n        ((param->char_code & ~TIPC_CHAR_NDCS_MASK) < TIPC_CHAR_NDCS_MAX)) {\n      svc = &tipc_env->env[conidx]->ndcs.svc;\n      search_hdl = tipc_env->env[conidx]\n                       ->ndcs.chars[param->char_code & ~TIPC_CHAR_NDCS_MASK]\n                       .val_hdl;\n    }\n    // Reference Time Update Service Characteristic\n    else if (((param->char_code & TIPC_CHAR_RTUS_MASK) ==\n              TIPC_CHAR_RTUS_MASK) &&\n             ((param->char_code & ~TIPC_CHAR_RTUS_MASK) < TIPC_CHAR_RTUS_MAX)) {\n      svc = &tipc_env->env[conidx]->rtus.svc;\n      search_hdl = tipc_env->env[conidx]\n                       ->rtus.chars[param->char_code & ~TIPC_CHAR_RTUS_MASK]\n                       .val_hdl;\n    } else {\n      svc = &tipc_env->env[conidx]->cts.svc;\n\n      // Current Time Characteristic Descriptor\n      if (((param->char_code & TIPC_DESC_CTS_MASK) == TIPC_DESC_CTS_MASK) &&\n          ((param->char_code & ~TIPC_DESC_CTS_MASK) < TIPC_DESC_CTS_MAX)) {\n        search_hdl = tipc_env->env[conidx]\n                         ->cts.descs[param->char_code & ~TIPC_DESC_CTS_MASK]\n                         .desc_hdl;\n      }\n      // Current Time Service Characteristic\n      else if (param->char_code < TIPC_CHAR_CTS_MAX) {\n        search_hdl = tipc_env->env[conidx]->cts.chars[param->char_code].val_hdl;\n      }\n    }\n\n    // Check if handle is viable\n    if ((search_hdl != ATT_INVALID_SEARCH_HANDLE) && (svc != NULL)) {\n      // Save char code\n      tipc_env->env[conidx]->last_char_code = param->char_code;\n      // Send read request\n      prf_read_char_send(&(tipc_env->prf_env), conidx, svc->shdl, svc->ehdl,\n                         search_hdl);\n    } else {\n      status = PRF_ERR_INEXISTENT_HDL;\n    }\n  } else {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // send app error indication\n    struct tipc_rd_char_rsp *ind = KE_MSG_ALLOC(\n        TIPC_RD_CHAR_RSP, prf_dst_task_get(&(tipc_env->prf_env), conidx),\n        prf_src_task_get(&(tipc_env->prf_env), conidx), tipc_rd_char_rsp);\n\n    // It will be an TIPC status code\n    ind->status = status;\n    ind->op_code = param->char_code;\n\n    // send the message\n    ke_msg_send(ind);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref TIPC_CT_NTF_CFG_REQ message.\n * It allows configuration of the peer ind/ntf/stop characteristic for a\n *specified characteristic. Will return an error code if that cfg char does not\n *exist.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int tipc_ct_ntf_cfg_req_handler(\n    ke_msg_id_t const msgid, struct tipc_ct_ntf_cfg_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint16_t cfg_hdl = ATT_INVALID_SEARCH_HANDLE;\n  // Get the address of the environment\n  struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n  // Get connection index\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  // Status\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if ((tipc_env->env[conidx] != NULL) && (ke_state_get(dest_id) == TIPC_IDLE)) {\n    // Only NTF\n    if ((param->cfg_val == PRF_CLI_STOP_NTFIND) ||\n        (param->cfg_val == PRF_CLI_START_NTF)) {\n      cfg_hdl = tipc_env->env[conidx]\n                    ->cts.descs[TIPC_DESC_CTS_CURR_TIME_CLI_CFG]\n                    .desc_hdl;\n\n      // check if the handle value exists\n      if (cfg_hdl != ATT_INVALID_SEARCH_HANDLE) {\n        // Send GATT Write Request\n        prf_gatt_write_ntf_ind(&tipc_env->prf_env, conidx, cfg_hdl,\n                               param->cfg_val);\n        status = GAP_ERR_NO_ERROR;\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    struct tipc_ct_ntf_cfg_rsp *ind = KE_MSG_ALLOC(\n        TIPC_CT_NTF_CFG_RSP, prf_dst_task_get(&(tipc_env->prf_env), conidx),\n        prf_src_task_get(&(tipc_env->prf_env), conidx), tipc_ct_ntf_cfg_rsp);\n\n    // It will be an TIPC status code\n    ind->status = status;\n    // send the message\n    ke_msg_send(ind);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref TIPC_WR_TIME_UPD_CTNL_PT_REQ message.\n * Check if the handle exists in profile(already discovered) and send request,\n *otherwise error to APP.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int tipc_wr_time_upd_ctnl_pt_req_handler(\n    ke_msg_id_t const msgid, struct tipc_wr_time_udp_ctnl_pt_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if ((ke_state_get(dest_id) == TIPC_IDLE) && (tipc_env->env[conidx] != NULL)) {\n    // Check provided parameters\n    if ((param->value == TIPS_TIME_UPD_CTNL_PT_GET) ||\n        (param->value == TIPS_TIME_UPD_CTNL_PT_CANCEL)) {\n      if (tipc_env->env[conidx]\n              ->cts.chars[TIPC_CHAR_RTUS_TIME_UPD_CTNL_PT]\n              .char_hdl != ATT_INVALID_SEARCH_HANDLE) {\n        // Send GATT Write Request\n        prf_gatt_write(&tipc_env->prf_env, conidx,\n                       tipc_env->env[conidx]\n                           ->rtus.chars[TIPC_CHAR_RTUS_TIME_UPD_CTNL_PT]\n                           .val_hdl,\n                       (uint8_t *)¶m->value, sizeof(uint8_t),\n                       GATTC_WRITE_NO_RESPONSE);\n\n        status = GAP_ERR_NO_ERROR;\n      } else {\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // send app error indication\n    struct tipc_wr_time_upd_ctnl_pt_rsp *ind =\n        KE_MSG_ALLOC(TIPC_WR_TIME_UPD_CTNL_PT_RSP,\n                     prf_dst_task_get(&(tipc_env->prf_env), conidx),\n                     prf_src_task_get(&(tipc_env->prf_env), conidx),\n                     tipc_wr_time_upd_ctnl_pt_rsp);\n\n    // It will be an TIPC status code\n    ind->status = status;\n\n    // send the message\n    ke_msg_send(ind);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_CMP_EVT message.\n * This generic event is received for different requests, so need to keep track.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  uint8_t state = ke_state_get(dest_id);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n  uint8_t status = PRF_ERR_STOP_DISC_CHAR_MISSING;\n  bool finished = false;\n\n  // Get the address of the environment\n  struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n\n  if ((state == TIPC_DISCOVERING) && (tipc_env->env[conidx] != NULL)) {\n    if ((param->status == ATT_ERR_ATTRIBUTE_NOT_FOUND) ||\n        (param->status == ATT_ERR_NO_ERROR)) {\n      // check characteristic validity\n      if (tipc_env->env[conidx]->nb_svc <= 1) {\n        switch (tipc_env->env[conidx]->last_svc_req) {\n        case ATT_SVC_CURRENT_TIME: {\n          // Check service (mandatory)\n          status = prf_check_svc_char_validity(TIPC_CHAR_CTS_MAX,\n                                               tipc_env->env[conidx]->cts.chars,\n                                               tipc_cts_char);\n\n          // Check Descriptors (mandatory)\n          if (status == GAP_ERR_NO_ERROR) {\n            status = prf_check_svc_char_desc_validity(\n                TIPC_DESC_CTS_MAX, tipc_env->env[conidx]->cts.descs,\n                tipc_cts_char_desc, tipc_env->env[conidx]->cts.chars);\n            // Prepare to discovery next service\n            tipc_env->env[conidx]->last_svc_req = ATT_SVC_NEXT_DST_CHANGE;\n          }\n        } break;\n\n        case ATT_SVC_NEXT_DST_CHANGE: {\n          // Check service (if found)\n          if (tipc_env->env[conidx]->nb_svc) {\n            status = prf_check_svc_char_validity(\n                TIPC_CHAR_NDCS_MAX, tipc_env->env[conidx]->ndcs.chars,\n                tipc_ndcs_char);\n          } else {\n            status = GAP_ERR_NO_ERROR;\n          }\n          // Prepare to discovery next service\n          tipc_env->env[conidx]->last_svc_req = ATT_SVC_REF_TIME_UPDATE;\n        } break;\n\n        case ATT_SVC_REF_TIME_UPDATE: {\n          // Check service (if found)\n          if (tipc_env->env[conidx]->nb_svc) {\n            status = prf_check_svc_char_validity(\n                TIPC_CHAR_RTUS_MAX, tipc_env->env[conidx]->rtus.chars,\n                tipc_rtus_char);\n          } else {\n            status = GAP_ERR_NO_ERROR;\n          }\n\n          if (status == GAP_ERR_NO_ERROR) {\n            // send app the details about the discovered TIPS DB to save\n            tipc_enable_rsp_send(tipc_env, conidx, GAP_ERR_NO_ERROR);\n            // Discovery is finished\n            finished = true;\n          }\n        } break;\n\n        default:\n          break;\n        }\n      }\n      // too many services\n      else {\n        status = PRF_ERR_MULTIPLE_SVC;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // reset number of services\n        tipc_env->env[conidx]->nb_svc = 0;\n\n        if (!finished) {\n          // start discovering following service on peer\n          prf_disc_svc_send(&(tipc_env->prf_env), conidx,\n                            tipc_env->env[conidx]->last_svc_req);\n        }\n      } else {\n        // stop discovery procedure\n        tipc_enable_rsp_send(tipc_env, conidx, status);\n      }\n    }\n  } else if (state == TIPC_IDLE) {\n    switch (param->operation) {\n    case GATTC_WRITE: {\n      struct tipc_ct_ntf_cfg_rsp *wr_cfm = KE_MSG_ALLOC(\n          TIPC_CT_NTF_CFG_RSP, prf_dst_task_get(&(tipc_env->prf_env), conidx),\n          prf_src_task_get(&(tipc_env->prf_env), conidx), tipc_ct_ntf_cfg_rsp);\n\n      // it will be a GATT status code\n      wr_cfm->status = param->status;\n      // send the message\n      ke_msg_send(wr_cfm);\n    } break;\n\n    case GATTC_WRITE_NO_RESPONSE: {\n      struct tipc_wr_time_upd_ctnl_pt_rsp *wr_cfm =\n          KE_MSG_ALLOC(TIPC_WR_TIME_UPD_CTNL_PT_RSP,\n                       prf_dst_task_get(&(tipc_env->prf_env), conidx),\n                       prf_src_task_get(&(tipc_env->prf_env), conidx),\n                       tipc_wr_time_upd_ctnl_pt_rsp);\n\n      // it will be a GATT status code\n      wr_cfm->status = param->status;\n      // send the message\n      ke_msg_send(wr_cfm);\n    } break;\n\n    case GATTC_READ: {\n      // an error occurs while reading peer attribute, inform app\n      if (param->status != GAP_ERR_NO_ERROR) {\n        struct tipc_rd_char_rsp *rd_cfm = KE_MSG_ALLOC(\n            TIPC_RD_CHAR_RSP, prf_dst_task_get(&(tipc_env->prf_env), conidx),\n            prf_src_task_get(&(tipc_env->prf_env), conidx), tipc_rd_char_rsp);\n\n        // it will be a GATT status code\n        rd_cfm->status = param->status;\n        rd_cfm->op_code = tipc_env->env[conidx]->last_char_code;\n        // send the message\n        ke_msg_send(rd_cfm);\n      }\n    } break;\n\n    default:\n      break;\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_READ_IND message.\n * Generic event received after every simple read command sent to peer server.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_ind_handler(ke_msg_id_t const msgid,\n                                    struct gattc_read_ind const *param,\n                                    ke_task_id_t const dest_id,\n                                    ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // Build the message\n  struct tipc_rd_char_rsp *ind = KE_MSG_ALLOC(\n      TIPC_RD_CHAR_RSP, prf_dst_task_get(&(tipc_env->prf_env), conidx), dest_id,\n      tipc_rd_char_rsp);\n\n  // Current Time Characteristic\n  if (tipc_env->env[conidx]->last_char_code == TIPC_RD_CTS_CURR_TIME) {\n    ind->op_code = TIPC_RD_CTS_CURR_TIME;\n    // Unpack Current Time Value.\n    tipc_unpack_curr_time_value(&(ind->value.curr_time),\n                                (uint8_t *)param->value);\n  }\n  // Local Time Information Characteristic\n  else if (tipc_env->env[conidx]->last_char_code ==\n           TIPC_RD_CTS_LOCAL_TIME_INFO) {\n    ind->op_code = TIPC_RD_CTS_LOCAL_TIME_INFO;\n    // Local Time Information Value\n    ind->value.loc_time_info.time_zone = param->value[0];\n    ind->value.loc_time_info.dst_offset = param->value[1];\n  }\n  // Reference Time Information Characteristic\n  else if (tipc_env->env[conidx]->last_char_code == TIPC_RD_CTS_REF_TIME_INFO) {\n    ind->op_code = TIPC_RD_CTS_REF_TIME_INFO;\n    // Reference Time Information Value\n    ind->value.ref_time_info.time_source = param->value[0];\n    ind->value.ref_time_info.time_accuracy = param->value[1];\n    ind->value.ref_time_info.days_update = param->value[2];\n    ind->value.ref_time_info.hours_update = param->value[3];\n  }\n  // Time with DST Characteristic\n  else if (tipc_env->env[conidx]->last_char_code ==\n           TIPC_RD_NDCS_TIME_WITH_DST) {\n    ind->op_code = TIPC_RD_NDCS_TIME_WITH_DST;\n    // Time with DST Value\n    tipc_unpack_time_dst_value(&ind->value.time_with_dst,\n                               (uint8_t *)param->value);\n  }\n  // Time Update State Characteristic\n  else if (tipc_env->env[conidx]->last_char_code ==\n           TIPC_RD_RTUS_TIME_UPD_STATE) {\n    ind->op_code = TIPC_RD_RTUS_TIME_UPD_STATE;\n    // Reference Time Information Value\n    ind->value.time_upd_state.current_state = param->value[0];\n    ind->value.time_upd_state.result = param->value[1];\n  }\n  // Current Time Characteristic - Client Characteristic Configuration\n  // Descriptor\n  else if (tipc_env->env[conidx]->last_char_code ==\n           TIPC_RD_CTS_CURR_TIME_CLI_CFG) {\n    ind->op_code = TIPC_RD_CTS_CURR_TIME_CLI_CFG;\n    // Notification Configuration\n    memcpy(&ind->value.ntf_cfg, ¶m->value[0], sizeof(uint16_t));\n  }\n\n  ke_msg_send(ind);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GATTC_EVENT_IND message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_event_ind_handler(ke_msg_id_t const msgid,\n                                     struct gattc_event_ind const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  if (tipc_env->env[conidx] != NULL) {\n    if (param->handle ==\n        tipc_env->env[conidx]->cts.chars[TIPC_CHAR_CTS_CURR_TIME].val_hdl) {\n      // Build a TIPC_CT_IND message\n      struct tipc_ct_ind *ind = KE_MSG_ALLOC(\n          TIPC_CT_IND, prf_dst_task_get(&(tipc_env->prf_env), conidx),\n          prf_src_task_get(&(tipc_env->prf_env), conidx), tipc_ct_ind);\n\n      // Unpack Current Time Value.\n      tipc_unpack_curr_time_value(&(ind->ct_val), (uint8_t *)param->value);\n\n      ke_msg_send(ind);\n    }\n  }\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(tipc){\n    {TIPC_ENABLE_REQ, (ke_msg_func_t)tipc_enable_req_handler},\n    {GATTC_SDP_SVC_IND, (ke_msg_func_t)gattc_sdp_svc_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {TIPC_CT_NTF_CFG_REQ, (ke_msg_func_t)tipc_ct_ntf_cfg_req_handler},\n    {GATTC_EVENT_IND, (ke_msg_func_t)gattc_event_ind_handler},\n    {TIPC_RD_CHAR_REQ, (ke_msg_func_t)tipc_rd_char_req_handler},\n    {GATTC_READ_IND, (ke_msg_func_t)gattc_read_ind_handler},\n    {TIPC_WR_TIME_UPD_CTNL_PT_REQ,\n     (ke_msg_func_t)tipc_wr_time_upd_ctnl_pt_req_handler},\n};\n\nvoid tipc_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct tipc_env_tag *tipc_env = PRF_ENV_GET(TIPC, tipc);\n\n  task_desc->msg_handler_tab = tipc_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(tipc_msg_handler_tab);\n  task_desc->state = tipc_env->state;\n  task_desc->idx_max = TIPC_IDX_MAX;\n}\n\n#endif /* (BLE_TIP_CLIENT) */\n/// @} TIPCTASK\n"
  },
  {
    "path": "services/ble_profiles/tip/tips/api/tips_task.h",
    "content": "#ifndef TIPS_TASK_H_\n#define TIPS_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TIPSTASK Task\n * @ingroup TIPS\n * @brief Time Profile Server Task\n *\n * The TIPSTASK is responsible for handling the messages coming in and out of the\n * @ref TIPS reporter block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"tip_common.h\"\n#include \"rwip_task.h\" // Task definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/// Messages for Time Profile Server\nenum\n{\n    ///Start the Time Profile Server Role - at connection\n    TIPS_ENABLE_REQ = TASK_FIRST_MSG(TASK_ID_TIPS),\n    ///Inform the application about the task creation result\n    TIPS_ENABLE_RSP,\n\n    ///Update Current Time Request from APP\n    TIPS_UPD_CURR_TIME_REQ,\n    ///Update Current Time Response to APP\n    TIPS_UPD_CURR_TIME_RSP,\n\n    ///Inform APP about a requested read\n    TIPS_RD_REQ_IND,\n    ///Read request Response\n    TIPS_RD_CFM,\n\n    ///Inform APP about modification of Current Time Characteristic Client. Charact. Cfg\n    TIPS_CURRENT_TIME_CCC_IND,\n    ///Inform APP about modification of Time Update Control Point Characteristic Value\n    TIPS_TIME_UPD_CTNL_PT_IND,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Parameters of the @ref TIPS_ENABLE_REQ message\nstruct tips_enable_req\n{\n    ///Current Time notification configuration\n    uint16_t current_time_ntf_en;\n};\n\n/// Parameters of the @ref TIPS_ENABLE_RSP message\nstruct tips_enable_rsp\n{\n    ///Status\n    uint8_t status;\n};\n\n///Parameters of the @ref TIPS_UPD_CURR_TIME_REQ message\nstruct tips_upd_curr_time_req\n{\n    ///Current Time\n    struct tip_curr_time current_time;\n    /**\n     * Indicate if the new Current Time value can be sent if the current_time_ntf_en parameter is\n     * set to 1.\n     * (0 - Disable; 1- Enable)\n     *\n     * If the time of the Current Time Server is changed because of reference time update (adjust reason)\n     * then no notifications shall be sent to the Current Time Service Client within the 15 minutes from\n     * the last notification, unless one of both of the two statements below are true :\n     *         - The new time information differs by more than 1min from the Current Time Server\n     *         time previous to the update\n     *         - The update was caused by the client (interacting with another service)\n     */\n    uint8_t enable_ntf_send;\n};\n\n///Parameters of the @ref TIPS_UPD_CURR_TIME_RSP message\nstruct tips_upd_curr_time_rsp\n{\n    /// Status of the operation\n    uint8_t status;\n};\n\n///Parameters of the @ref TIPS_RD_REQ_IND message\nstruct tips_rd_req_ind\n{\n    /// Characteristic code\n    uint8_t char_code;\n};\n\n///Parameters of the @ref TIPS_RD_CFM message\nstruct tips_rd_cfm\n{\n    uint8_t op_code;\n\n    union tips_rd_value_tag\n    {\n        ///Current Time\n        struct tip_curr_time curr_time;\n        ///Local Time Information\n        struct tip_loc_time_info loc_time_info;\n        ///Reference Time Information\n        struct tip_ref_time_info ref_time_info;\n        ///Time With DST\n        struct tip_time_with_dst time_with_dst;\n        ///Time Update State\n        struct tip_time_upd_state time_upd_state;\n    } value;\n};\n\n///Parameters of the @ref TIPS_CURRENT_TIME_CCC_IND message\nstruct tips_current_time_ccc_ind\n{\n    ///Configuration Value\n    uint16_t cfg_val;\n};\n\n///Parameters of the @ref TIPS_TIME_UPD_CTNL_PT_IND message\nstruct tips_time_upd_ctnl_pt_ind\n{\n    ///Time Update Control Point Value\n    tip_time_upd_contr_pt value;\n};\n\n///Parameters of the @ref TIPS_CREATE_DB_REQ message\nstruct tips_db_cfg\n{\n    ///Database configuration\n    uint8_t features;\n};\n\n/// @} TIPSTASK\n#endif // TIPS_TASK_H_\n"
  },
  {
    "path": "services/ble_profiles/tip/tips/src/tips.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup TIPS\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_TIP_SERVER)\n#include \"attm.h\"\n#include \"prf_utils.h\"\n#include \"tips.h\"\n#include \"tips_task.h\"\n\n#include \"ke_mem.h\"\n\n/*\n * CTS, NDCS, RTUS ATTRIBUTES\n ****************************************************************************************\n */\n/// Full CTS Database Description - Used to add attributes into the database\nconst struct attm_desc cts_att_db[CTS_IDX_NB] = {\n    // Current Time Service Declaration\n    [CTS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Current Time Characteristic Declaration\n    [CTS_IDX_CURRENT_TIME_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                   0},\n    // Current Time Characteristic Value\n    [CTS_IDX_CURRENT_TIME_VAL] = {ATT_CHAR_CT_TIME,\n                                  PERM(RD, ENABLE) | PERM(NTF, ENABLE),\n                                  PERM(RI, ENABLE), CTS_CURRENT_TIME_VAL_LEN},\n    // Current Time Characteristic - Client Char. Configuration Descriptor\n    [CTS_IDX_CURRENT_TIME_CFG] = {ATT_DESC_CLIENT_CHAR_CFG,\n                                  PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0,\n                                  0},\n\n    // Local Time Information Characteristic Declaration\n    [CTS_IDX_LOCAL_TIME_INFO_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                      0, 0},\n    // Local Time Information Characteristic Value\n    [CTS_IDX_LOCAL_TIME_INFO_VAL] = {ATT_CHAR_LOCAL_TIME_INFO, PERM(RD, ENABLE),\n                                     PERM(RI, ENABLE),\n                                     sizeof(struct tip_loc_time_info)},\n\n    // Reference Time Information Characteristic Declaration\n    [CTS_IDX_REF_TIME_INFO_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                    0, 0},\n    // Reference Time Info Characteristic Value\n    [CTS_IDX_REF_TIME_INFO_VAL] = {ATT_CHAR_REFERENCE_TIME_INFO,\n                                   PERM(RD, ENABLE), PERM(RI, ENABLE),\n                                   sizeof(struct tip_ref_time_info)},\n};\n\n/// Full NDCS Database Description - Used to add attributes into the database\nconst struct attm_desc ndcs_att_db[NDCS_IDX_NB] = {\n    // Next DST Change Service Declaration\n    [NDCS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Time with DST Characteristic Declaration\n    [NDCS_IDX_TIME_DST_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE), 0,\n                                0},\n    // Time With DST Characteristic Value\n    [NDCS_IDX_TIME_DST_VAL] = {ATT_CHAR_TIME_WITH_DST, PERM(RD, ENABLE),\n                               PERM(RI, ENABLE), NDCS_TIME_DST_VAL_LEN},\n};\n\n/// Full RTUS Database Description - Used to add attributes into the database\nconst struct attm_desc rtus_att_db[RTUS_IDX_NB] = {\n    // Reference Time Information Service Declaration\n    [RTUS_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE, PERM(RD, ENABLE), 0, 0},\n\n    // Time Update Control Point Characteristic Declaration\n    [RTUS_IDX_TIME_UPD_CTNL_PT_CHAR] = {ATT_DECL_CHARACTERISTIC,\n                                        PERM(RD, ENABLE), 0, 0},\n    // Time Update Control Point Characteristic Value\n    [RTUS_IDX_TIME_UPD_CTNL_PT_VAL] = {ATT_CHAR_TIME_UPDATE_CNTL_POINT,\n                                       PERM(WRITE_COMMAND, ENABLE),\n                                       PERM(RI, ENABLE),\n                                       sizeof(tip_time_upd_contr_pt)},\n\n    // Time Update State Characteristic Declaration\n    [RTUS_IDX_TIME_UPD_STATE_CHAR] = {ATT_DECL_CHARACTERISTIC, PERM(RD, ENABLE),\n                                      0, 0},\n    // Time Update State Characteristic Value\n    [RTUS_IDX_TIME_UPD_STATE_VAL] = {ATT_CHAR_TIME_UPDATE_STATE,\n                                     PERM(RD, ENABLE), PERM(RI, ENABLE),\n                                     sizeof(struct tip_time_upd_state)},\n};\n\n/**\n ****************************************************************************************\n * @brief Initialization of the TIPS module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t tips_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl,\n                         struct tips_db_cfg *params) {\n  // Service content flag\n  uint32_t cfg_flag = TIPS_CTS_CURRENT_TIME_MASK;\n  // DB Creation Status\n  uint8_t status = ATT_ERR_NO_ERROR;\n  // Total number of attributes\n  uint8_t tot_nb_att = CTS_IDX_NB;\n\n  // Allocate TIPS required environment variable\n  struct tips_env_tag *tips_env = (struct tips_env_tag *)ke_malloc(\n      sizeof(struct tips_env_tag), KE_MEM_ATT_DB);\n\n  env->env = (prf_env_t *)tips_env;\n\n  //------------------ create the attribute database for the profile\n  //-------------------\n\n  // Check supported attributes\n  if (params->features & TIPS_NDCS_SUP) {\n    tot_nb_att += NDCS_IDX_NB;\n  }\n\n  if (params->features & TIPS_NDCS_SUP) {\n    tot_nb_att += RTUS_IDX_NB;\n  }\n\n  // Check that attribute list can be allocated.\n  status = attm_reserve_handle_range(start_hdl, tot_nb_att);\n\n  if (status == ATT_ERR_NO_ERROR) {\n    // Set Configuration Flag Value\n    if (params->features & TIPS_CTS_LOC_TIME_INFO_SUP) {\n      cfg_flag |= TIPS_CTS_LOC_TIME_INFO_MASK;\n    }\n\n    if (params->features & TIPS_CTS_REF_TIME_INFO_SUP) {\n      cfg_flag |= TIPS_CTS_REF_TIME_INFO_MASK;\n    }\n\n    /*---------------------------------------------------*\n     * Current Time Service Creation\n     *---------------------------------------------------*/\n    status = attm_svc_create_db(\n        start_hdl, ATT_SVC_CURRENT_TIME, (uint8_t *)&cfg_flag, CTS_IDX_NB,\n        &tips_env->cts_att_tbl[0], env->task, &cts_att_db[0],\n        (sec_lvl &\n         (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n            PERM(SVC_MI, ENABLE));\n\n    // Update index\n    tips_env->cts_shdl = *start_hdl;\n    *start_hdl += CTS_IDX_NB;\n\n    // All attributes are mandatory for NDCS and RTUS\n    cfg_flag = 0xFF;\n\n    if ((status == ATT_ERR_NO_ERROR) && ((params->features & TIPS_NDCS_SUP))) {\n      /*---------------------------------------------------*\n       * Next DST Change Service Creation\n       *---------------------------------------------------*/\n      status = attm_svc_create_db(\n          start_hdl, ATT_SVC_NEXT_DST_CHANGE, (uint8_t *)&cfg_flag, NDCS_IDX_NB,\n          &tips_env->ndcs_att_tbl[0], env->task, &ndcs_att_db[0],\n          (sec_lvl &\n           (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n              PERM(SVC_MI, ENABLE));\n\n      // Update index\n      tips_env->ndcs_shdl = *start_hdl;\n      *start_hdl += NDCS_IDX_NB;\n    }\n\n    /*---------------------------------------------------*\n     * Reference Time Update Service Creation\n     *---------------------------------------------------*/\n    if ((status == ATT_ERR_NO_ERROR) && ((params->features & TIPS_RTUS_SUP))) {\n      status = attm_svc_create_db(\n          start_hdl, ATT_SVC_REF_TIME_UPDATE, (uint8_t *)&cfg_flag, RTUS_IDX_NB,\n          &tips_env->rtus_att_tbl[0], env->task, &rtus_att_db[0],\n          (sec_lvl &\n           (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n              PERM(SVC_MI, ENABLE));\n\n      // Update index\n      tips_env->rtus_shdl = *start_hdl;\n      *start_hdl += RTUS_IDX_NB;\n    }\n\n    // Initialize TIPS environment\n    tips_env->features = params->features;\n\n    tips_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Multi Instantiated task\n    tips_env->prf_env.prf_task = env->task | PERM(PRF_MI, ENABLE);\n\n    // initialize environment variable\n    env->id = TASK_ID_TIPS;\n    tips_task_init(&(env->desc));\n\n    for (uint8_t idx = 0; idx < BLE_CONNECTION_MAX; idx++) {\n      tips_env->env[idx] = NULL;\n    }\n\n    /* Put TIS in disabled state */\n    ke_state_set(env->task, TIPS_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the TIPS module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void tips_destroy(struct prf_task_env *env) {\n  uint8_t idx;\n  struct tips_env_tag *tips_env = (struct tips_env_tag *)env->env;\n\n  // cleanup environment variable for each task instances\n  for (idx = 0; idx < BLE_CONNECTION_MAX; idx++) {\n    if (tips_env->env[idx] != NULL) {\n      ke_free(tips_env->env[idx]);\n    }\n  }\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(tips_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void tips_create(struct prf_task_env *env, uint8_t conidx) {\n  struct tips_env_tag *tips_env = (struct tips_env_tag *)env->env;\n  tips_env->env[conidx] = (struct tips_cnx_env *)ke_malloc(\n      sizeof(struct tips_cnx_env), KE_MEM_ATT_DB);\n\n  memset(tips_env->env[conidx], 0, sizeof(struct tips_cnx_env));\n\n  /* Put TIS in idle state */\n  ke_state_set(KE_BUILD_ID(env->task, conidx), TIPS_IDLE);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void tips_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  struct tips_env_tag *tips_env = (struct tips_env_tag *)env->env;\n\n  // clean-up environment variable allocated for task instance\n  if (tips_env->env[conidx] != NULL) {\n    ke_free(tips_env->env[conidx]);\n    tips_env->env[conidx] = NULL;\n  }\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// TIPS Task interface required by profile manager\nconst struct prf_task_cbs tips_itf = {\n    (prf_init_fnct)tips_init,\n    tips_destroy,\n    tips_create,\n    tips_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *tips_prf_itf_get(void) { return &tips_itf; }\n\nuint8_t tips_pack_curr_time_value(uint8_t *p_pckd_time,\n                                  const struct tip_curr_time *p_curr_time_val) {\n  // Date-Time\n  prf_pack_date_time(p_pckd_time, &(p_curr_time_val->date_time));\n\n  // Day of Week\n  *(p_pckd_time + 7) = p_curr_time_val->day_of_week;\n\n  // Fraction 256\n  *(p_pckd_time + 8) = p_curr_time_val->fraction_256;\n\n  // Adjust Reason\n  *(p_pckd_time + 9) = p_curr_time_val->adjust_reason;\n\n  return 10;\n}\n\nuint8_t\ntips_pack_time_dst_value(uint8_t *p_pckd_time_dst,\n                         const struct tip_time_with_dst *p_time_dst_val) {\n  // Date-Time\n  prf_pack_date_time(p_pckd_time_dst, &(p_time_dst_val->date_time));\n\n  // DST Offset\n  *(p_pckd_time_dst + 7) = p_time_dst_val->dst_offset;\n\n  return 8;\n}\n\n#endif // BLE_TIP_SERVER\n\n/// @} TIPS\n"
  },
  {
    "path": "services/ble_profiles/tip/tips/src/tips.h",
    "content": "#ifndef TIPS_H_\n#define TIPS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TIPS Time Profile Server\n * @ingroup TIP\n * @brief Time Profile Server\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_TIP_SERVER)\n#include \n#include \n\n#include \"tip_common.h\"\n#include \"prf_types.h\"\n#include \"gap.h\"\n#include \"prf.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n//Maximum number of Time Server task instances\n#define TIPS_IDX_MAX     (BLE_CONNECTION_MAX)\n\n//CTS Configuration Flag Masks\n#define TIPS_CTS_CURRENT_TIME_MASK        (0x0F)\n#define TIPS_CTS_LOC_TIME_INFO_MASK        (0x30)\n#define TIPS_CTS_REF_TIME_INFO_MASK        (0xC0)\n\n//Packed Values Length\n#define CTS_CURRENT_TIME_VAL_LEN        (10)\n#define NDCS_TIME_DST_VAL_LEN            (8)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n#define TIPS_IS_SUPPORTED(mask) (((tips_env->features & mask) == mask))\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n/// Possible states of the TIPS task\nenum\n{\n    /// idle state\n    TIPS_IDLE,\n    /// connected state\n    TIPS_BUSY,\n\n    /// Number of defined states.\n    TIPS_STATE_MAX\n};\n\n///Database Configuration - Bit Field Flags\nenum\n{\n    TIPS_CTS_CURR_TIME_SUP       = 0x00,\n    TIPS_CTS_LOC_TIME_INFO_SUP   = 0x01,\n    TIPS_CTS_REF_TIME_INFO_SUP   = 0x02,\n    TIPS_NDCS_SUP                = 0x04,\n    TIPS_RTUS_SUP                = 0x08,\n\n    TIPS_CTS_CURRENT_TIME_CFG    = 0x10,\n};\n\nenum\n{\n    CTS_IDX_SVC,\n\n    CTS_IDX_CURRENT_TIME_CHAR,\n    CTS_IDX_CURRENT_TIME_VAL,\n    CTS_IDX_CURRENT_TIME_CFG,\n\n    CTS_IDX_LOCAL_TIME_INFO_CHAR,\n    CTS_IDX_LOCAL_TIME_INFO_VAL,\n\n    CTS_IDX_REF_TIME_INFO_CHAR,\n    CTS_IDX_REF_TIME_INFO_VAL,\n\n    CTS_IDX_NB,\n};\n\nenum\n{\n    NDCS_IDX_SVC,\n    NDCS_IDX_TIME_DST_CHAR,\n    NDCS_IDX_TIME_DST_VAL,\n\n    NDCS_IDX_NB,\n};\n\nenum\n{\n    RTUS_IDX_SVC,\n    RTUS_IDX_TIME_UPD_CTNL_PT_CHAR,\n    RTUS_IDX_TIME_UPD_CTNL_PT_VAL,\n    RTUS_IDX_TIME_UPD_STATE_CHAR,\n    RTUS_IDX_TIME_UPD_STATE_VAL,\n\n    RTUS_IDX_NB,\n};\n\nenum\n{\n    CTS_CURRENT_TIME_CHAR,\n    CTS_LOCAL_TIME_INFO_CHAR,\n    CTS_REF_TIME_INFO_CHAR,\n\n    CTS_CHAR_MAX,\n};\n\nenum\n{\n    NDCS_TIME_DST_CHAR,\n\n    NDCS_CHAR_MAX,\n};\n\nenum\n{\n    RTUS_TIME_UPD_CTNL_PT_CHAR,\n    RTUS_TIME_UPD_STATE_CHAR,\n\n    RTUS_CHAR_MAX,\n};\n\nenum\n{\n    TIPS_CTS_CURRENT_TIME,\n    TIPS_CTS_LOCAL_TIME_INFO,\n    TIPS_CTS_REF_TIME_INFO,\n    TIPS_NDCS_TIME_DST,\n    TIPS_RTUS_TIME_UPD_STATE_VAL,\n    TIPS_CTS_CURRENT_TIME_CLI\n};\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n/// Time Profile Server Instance Environment variable\nstruct tips_cnx_env\n{\n    /// NTF State\n    uint8_t ntf_state;\n    /// Saved read handle\n    uint16_t handle;\n};\n\n\n/// Time Profile Server. Environment variable\nstruct tips_env_tag\n{\n    /// profile environment\n    prf_env_t prf_env;\n\n    /// CTS Start Handle\n    uint16_t cts_shdl;\n    /// NDCS Start Handle\n    uint16_t ndcs_shdl;\n    /// RTUS Start Handle\n    uint16_t rtus_shdl;\n\n    /// CTS Attribute Table\n    uint8_t cts_att_tbl[CTS_CHAR_MAX];\n    /// NDCS Attribute Table\n    uint8_t ndcs_att_tbl[NDCS_CHAR_MAX];\n    /// NDCS Attribute Table\n    uint8_t rtus_att_tbl[RTUS_CHAR_MAX];\n\n    /// Environment variable pointer for each connections\n    struct tips_cnx_env* env[BLE_CONNECTION_MAX];\n\n    /// Database configuration\n    uint8_t features;\n    /// Time update state for the Ctl Pt\n    uint8_t time_upd_state;\n\n    /// State of different task instances\n    ke_state_t state[TIPS_IDX_MAX];\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve TIP service profile interface\n *\n * @return BLP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* tips_prf_itf_get(void);\n\n/**\n ****************************************************************************************\n * @brief Pack Current Time value\n *\n * @param p_curr_time_val Current Time value\n ****************************************************************************************\n */\nuint8_t tips_pack_curr_time_value(uint8_t *p_pckd_time,\n        const struct tip_curr_time* p_curr_time_val);\n\n/**\n ****************************************************************************************\n * @brief Pack Time With DST value\n *\n * @param p_time_dst_val Time With DST value\n ****************************************************************************************\n */\nuint8_t tips_pack_time_dst_value(uint8_t *p_pckd_time_dst,\n                              const struct tip_time_with_dst* p_time_dst_val);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid tips_task_init(struct ke_task_desc *task_desc);\n\n\n#endif //BLE_TIP_SERVER\n\n/// @} TIPS\n\n#endif // TIPS_H_\n"
  },
  {
    "path": "services/ble_profiles/tip/tips/src/tips_task.c",
    "content": "/**\n ****************************************************************************************\n * @addtogroup TIPSTASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_TIP_SERVER)\n#include \"attm.h\"\n#include \"co_utils.h\"\n#include \"gap.h\"\n#include \"gattc_task.h\"\n#include \"tips.h\"\n#include \"tips_task.h\"\n\n#include \"prf_utils.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref TIPS_ENABLE_REQ message.\n * The handler enables the Time Server Profile.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int tips_enable_req_handler(ke_msg_id_t const msgid,\n                                     struct tips_enable_req const *param,\n                                     ke_task_id_t const dest_id,\n                                     ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct tips_env_tag *tips_env = PRF_ENV_GET(TIPS, tips);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  if (gapc_get_conhdl(conidx) == GAP_INVALID_CONHDL) {\n    status = PRF_ERR_DISCONNECTED;\n  } else if (ke_state_get(dest_id) == TIPS_IDLE) {\n    if (param->current_time_ntf_en == PRF_CLI_START_NTF) {\n      // Enable Bonded Data\n      tips_env->env[conidx]->ntf_state |= TIPS_CTS_CURRENT_TIME_CFG;\n    }\n  } else {\n    status = PRF_ERR_REQ_DISALLOWED;\n  }\n\n  // Send to APP the details of the discovered attributes on TIPS\n  struct tips_enable_rsp *rsp =\n      KE_MSG_ALLOC(TIPS_ENABLE_RSP, src_id, dest_id, tips_enable_rsp);\n\n  rsp->status = status;\n  ke_msg_send(rsp);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref TIPS_UPD_CURR_TIME_REQ message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int tips_upd_curr_time_req_handler(\n    ke_msg_id_t const msgid, struct tips_upd_curr_time_req const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Status\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  // Get the address of the environment\n  struct tips_env_tag *tips_env = PRF_ENV_GET(TIPS, tips);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  if ((tips_env->env[conidx] != NULL) && (ke_state_get(dest_id) == TIPS_IDLE)) {\n\n    // Check if Notifications are enabled\n    if ((tips_env->env[conidx]->ntf_state & TIPS_CTS_CURRENT_TIME_CFG) ==\n        TIPS_CTS_CURRENT_TIME_CFG) {\n      // Check if notification can be sent\n      if ((param->current_time.adjust_reason & TIPS_FLAG_EXT_TIME_UPDATE) ==\n          TIPS_FLAG_EXT_TIME_UPDATE) {\n        if (param->enable_ntf_send == 0) {\n          status = PRF_ERR_REQ_DISALLOWED;\n        }\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Allocate the GATT notification message\n        struct gattc_send_evt_cmd *meas_val = KE_MSG_ALLOC_DYN(\n            GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx), dest_id,\n            gattc_send_evt_cmd, CTS_CURRENT_TIME_VAL_LEN);\n\n        // Fill in the parameter structure\n        meas_val->operation = GATTC_NOTIFY;\n        meas_val->handle = tips_env->cts_shdl + CTS_IDX_CURRENT_TIME_VAL;\n        // Pack the Current Time value\n        meas_val->length =\n            tips_pack_curr_time_value(meas_val->value, ¶m->current_time);\n\n        // Go to idle state\n        ke_state_set(dest_id, TIPS_BUSY);\n        // Send the event\n        ke_msg_send(meas_val);\n      }\n    } else {\n      status = PRF_ERR_NTF_DISABLED;\n    }\n  } else {\n    status = GAP_ERR_INVALID_PARAM;\n  }\n\n  if (status != GAP_ERR_NO_ERROR) {\n    // Inform APP\n    struct tips_upd_curr_time_rsp *ind = KE_MSG_ALLOC(\n        TIPS_UPD_CURR_TIME_RSP, prf_dst_task_get(&(tips_env->prf_env), conidx),\n        prf_src_task_get(&(tips_env->prf_env), conidx), tips_upd_curr_time_rsp);\n\n    ind->status = status;\n\n    // send the message\n    ke_msg_send(ind);\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct tips_env_tag *tips_env = PRF_ENV_GET(TIPS, tips);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  uint8_t status = PRF_ERR_REQ_DISALLOWED;\n\n  if ((ke_state_get(dest_id) == TIPS_IDLE) && (tips_env->env[conidx] != NULL)) {\n    // CTS : Current Time client configuration\n    if (param->handle == tips_env->cts_shdl + CTS_IDX_CURRENT_TIME_CFG) {\n      uint16_t value =\n          (tips_env->env[conidx]->ntf_state & TIPS_CTS_CURRENT_TIME_CFG)\n              ? PRF_CLI_START_NTF\n              : PRF_CLI_STOP_NTFIND;\n      status = ATT_ERR_NO_ERROR;\n\n      // Send data to peer device\n      struct gattc_read_cfm *cfm = KE_MSG_ALLOC_DYN(\n          GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm, sizeof(uint16_t));\n\n      cfm->length = sizeof(uint16_t);\n      memcpy(cfm->value, &value, sizeof(uint16_t));\n      cfm->handle = param->handle;\n      cfm->status = status;\n\n      // Send value to peer device.\n      ke_msg_send(cfm);\n    } else {\n      // Inform APP about read request\n      struct tips_rd_req_ind *ind = KE_MSG_ALLOC(\n          TIPS_RD_REQ_IND, prf_dst_task_get(&(tips_env->prf_env), conidx),\n          prf_src_task_get(&(tips_env->prf_env), conidx), tips_rd_req_ind);\n\n      // Current Time Service\n      if (param->handle < tips_env->cts_shdl + CTS_IDX_NB) {\n        // Current Time Char value\n        if (param->handle == tips_env->cts_shdl + CTS_IDX_CURRENT_TIME_VAL) {\n          ind->char_code = TIPS_CTS_CURRENT_TIME;\n          status = ATT_ERR_NO_ERROR;\n        }\n        // Local Time Info Char value\n        else if ((param->handle ==\n                  tips_env->cts_shdl + CTS_IDX_LOCAL_TIME_INFO_VAL) &&\n                 (TIPS_IS_SUPPORTED(TIPS_CTS_LOC_TIME_INFO_SUP))) {\n          ind->char_code = TIPS_CTS_LOCAL_TIME_INFO;\n          status = ATT_ERR_NO_ERROR;\n        }\n        // Reference Time Info Char value\n        else if ((param->handle ==\n                  tips_env->cts_shdl + CTS_IDX_REF_TIME_INFO_VAL) &&\n                 (TIPS_IS_SUPPORTED(TIPS_CTS_REF_TIME_INFO_SUP))) {\n          ind->char_code = TIPS_CTS_REF_TIME_INFO;\n          status = ATT_ERR_NO_ERROR;\n        }\n      }\n      // Time with DST Char value\n      else if ((param->handle == tips_env->ndcs_shdl + NDCS_IDX_TIME_DST_VAL) &&\n               (TIPS_IS_SUPPORTED(TIPS_NDCS_SUP))) {\n        ind->char_code = TIPS_NDCS_TIME_DST;\n        status = ATT_ERR_NO_ERROR;\n      }\n      // Time Update State\n      else if ((param->handle ==\n                tips_env->rtus_shdl + RTUS_IDX_TIME_UPD_STATE_VAL) &&\n               (TIPS_IS_SUPPORTED(TIPS_RTUS_SUP))) {\n        ind->char_code = TIPS_RTUS_TIME_UPD_STATE_VAL;\n        status = ATT_ERR_NO_ERROR;\n      } else {\n        // Set error code\n        status = PRF_ERR_INEXISTENT_HDL;\n      }\n\n      if (status == ATT_ERR_NO_ERROR) {\n        // Save handle\n        tips_env->env[conidx]->handle = param->handle;\n        // Send message to the APP\n        ke_msg_send(ind);\n        // Go to busy state\n        ke_state_set(dest_id, TIPS_BUSY);\n      } else {\n        // Free message\n        ke_msg_free(ke_param2msg(ind));\n        // Send data to peer device\n        struct gattc_read_cfm *cfm =\n            KE_MSG_ALLOC(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm);\n\n        cfm->handle = param->handle;\n        cfm->status = status;\n\n        // Send to peer device.\n        ke_msg_send(cfm);\n      }\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref TIPS_RD_CFM message.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int tips_rd_cfm_handler(ke_msg_id_t const msgid,\n                                 struct tips_rd_cfm const *param,\n                                 ke_task_id_t const dest_id,\n                                 ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct tips_env_tag *tips_env = PRF_ENV_GET(TIPS, tips);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  if ((ke_state_get(dest_id) == TIPS_BUSY) && (tips_env->env[conidx] != NULL)) {\n    if (tips_env->env[conidx]->handle != ATT_INVALID_HANDLE) {\n      // Send data to peer device\n      struct gattc_read_cfm *cfm =\n          KE_MSG_ALLOC_DYN(GATTC_READ_CFM, KE_BUILD_ID(TASK_GATTC, conidx),\n                           dest_id, gattc_read_cfm, sizeof(struct tips_rd_cfm));\n\n      switch (param->op_code) {\n      case TIPS_CTS_CURRENT_TIME: {\n        // Pack Current Time\n        cfm->length =\n            tips_pack_curr_time_value(cfm->value, ¶m->value.curr_time);\n      } break;\n\n      case TIPS_CTS_LOCAL_TIME_INFO: {\n        // Pack Local Time\n        cfm->length = sizeof(struct tip_loc_time_info);\n        memcpy(cfm->value, ¶m->value, cfm->length);\n      } break;\n\n      case TIPS_CTS_REF_TIME_INFO: {\n        // Pack Reference Time\n        cfm->length = sizeof(struct tip_ref_time_info);\n        memcpy(cfm->value, ¶m->value, cfm->length);\n      } break;\n\n      case TIPS_NDCS_TIME_DST: {\n        // Pack Time with DST\n        cfm->length =\n            tips_pack_time_dst_value(cfm->value, ¶m->value.time_with_dst);\n      } break;\n\n      case TIPS_RTUS_TIME_UPD_STATE_VAL: {\n        // Pack Time Update State\n        cfm->length = sizeof(struct tip_time_upd_state);\n        memcpy(cfm->value, ¶m->value, cfm->length);\n      } break;\n      default: {\n        // Return Application error to peer\n        cfm->length = 0;\n        status = PRF_APP_ERROR;\n      } break;\n      }\n\n      // Set parameters\n      cfm->handle = tips_env->env[conidx]->handle;\n      cfm->status = status;\n      // Send value to peer device.\n      ke_msg_send(cfm);\n      // Go to idle state\n      ke_state_set(dest_id, TIPS_IDLE);\n      // Reset environment variable\n      tips_env->env[conidx]->handle = ATT_INVALID_HANDLE;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY message meaning that\n *Measurement notification has been correctly sent to peer device (but not\n *confirmed by peer device).\n * *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct tips_env_tag *tips_env = PRF_ENV_GET(TIPS, tips);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  if (tips_env->env[conidx] != NULL) {\n    if (param->operation == GATTC_NOTIFY) {\n      // Inform APP\n      struct tips_upd_curr_time_rsp *ind =\n          KE_MSG_ALLOC(TIPS_UPD_CURR_TIME_RSP,\n                       prf_dst_task_get(&(tips_env->prf_env), conidx),\n                       prf_src_task_get(&(tips_env->prf_env), conidx),\n                       tips_upd_curr_time_rsp);\n\n      ind->status = param->status;\n\n      // send the message\n      ke_msg_send(ind);\n      // Go to idle state\n      ke_state_set(dest_id, TIPS_IDLE);\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GL2C_CODE_ATT_WR_CMD_IND message.\n * The handler compares the new values with current ones and notifies them if\n *they changed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  uint16_t cfg_value = 0x0000;\n  //    uint8_t time_upd_ctnl_pt     = 0x00;\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  // Get the address of the environment\n  struct tips_env_tag *tips_env = PRF_ENV_GET(TIPS, tips);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  // CTS : Current Time Char. - Notification Configuration\n  if (param->handle == tips_env->cts_shdl + CTS_IDX_CURRENT_TIME_CFG) {\n    // Extract value before check\n    memcpy(&cfg_value, ¶m->value[0], sizeof(uint16_t));\n\n    // only update configuration if value for stop or notification enable\n    if ((cfg_value == PRF_CLI_STOP_NTFIND) ||\n        (cfg_value == PRF_CLI_START_NTF)) {\n      if (cfg_value == PRF_CLI_STOP_NTFIND) {\n        tips_env->env[conidx]->ntf_state &= ~TIPS_CTS_CURRENT_TIME_CFG;\n      } else // PRF_CLI_START_NTF\n      {\n        tips_env->env[conidx]->ntf_state |= TIPS_CTS_CURRENT_TIME_CFG;\n      }\n\n      // Inform APP of configuration change\n      struct tips_current_time_ccc_ind *msg =\n          KE_MSG_ALLOC(TIPS_CURRENT_TIME_CCC_IND,\n                       prf_dst_task_get(&tips_env->prf_env, conidx),\n                       prf_src_task_get(&tips_env->prf_env, conidx),\n                       tips_current_time_ccc_ind);\n\n      msg->cfg_val = cfg_value;\n\n      ke_msg_send(msg);\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  }\n  // RTUS : Time Update Control Point Char. - Val\n  else if (param->handle ==\n           tips_env->rtus_shdl + RTUS_IDX_TIME_UPD_CTNL_PT_VAL) {\n    // Check if value to write is in allowed range\n    if ((param->value[0] == TIPS_TIME_UPD_CTNL_PT_GET) ||\n        (param->value[0] == TIPS_TIME_UPD_CTNL_PT_CANCEL)) {\n      // Update value\n      tips_env->time_upd_state = param->value[0];\n\n      // Send APP the indication with the new value\n      struct tips_time_upd_ctnl_pt_ind *msg =\n          KE_MSG_ALLOC(TIPS_TIME_UPD_CTNL_PT_IND,\n                       prf_dst_task_get(&tips_env->prf_env, conidx),\n                       prf_src_task_get(&tips_env->prf_env, conidx),\n                       tips_time_upd_ctnl_pt_ind);\n\n      // Time Update Control Point Characteristic Value\n      msg->value = tips_env->time_upd_state;\n      // Send message\n      ke_msg_send(msg);\n    } else {\n      status = PRF_ERR_INVALID_PARAM;\n    }\n  } else {\n    status = PRF_ERR_NOT_WRITABLE;\n  }\n\n  // Send write response\n  struct gattc_write_cfm *cfm =\n      KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n  cfm->handle = param->handle;\n  cfm->status = status;\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Default State handlers definition\nKE_MSG_HANDLER_TAB(tips){\n    {TIPS_ENABLE_REQ, (ke_msg_func_t)tips_enable_req_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {TIPS_UPD_CURR_TIME_REQ, (ke_msg_func_t)tips_upd_curr_time_req_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {TIPS_RD_CFM, (ke_msg_func_t)tips_rd_cfm_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n};\n\nvoid tips_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct tips_env_tag *tips_env = PRF_ENV_GET(TIPS, tips);\n\n  task_desc->msg_handler_tab = tips_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(tips_msg_handler_tab);\n  task_desc->state = tips_env->state;\n  task_desc->idx_max = TIPS_IDX_MAX;\n}\n\n#endif // BLE_TIP_SERVER\n\n/// @} TIPSTASK\n"
  },
  {
    "path": "services/ble_profiles/tota/tota_ble.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_TOTA)\n#include \"attm.h\"\n#include \"co_utils.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"ke_mem.h\"\n#include \"prf_utils.h\"\n#include \"tota_ble.h\"\n#include \"tota_task.h\"\n\n/*\n * TOTA CMD PROFILE ATTRIBUTES\n ****************************************************************************************\n */\n#define tota_service_uuid_128_content                                          \\\n  {                                                                            \\\n    0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86,    \\\n        0x86, 0x86, 0x86, 0x86                                                 \\\n  }\n#define tota_val_char_val_uuid_128_content                                     \\\n  {                                                                            \\\n    0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97,    \\\n        0x97, 0x97, 0x97, 0x97                                                 \\\n  }\n\n#define ATT_DECL_PRIMARY_SERVICE_UUID                                          \\\n  { 0x00, 0x28 }\n#define ATT_DECL_CHARACTERISTIC_UUID                                           \\\n  { 0x03, 0x28 }\n#define ATT_DESC_CLIENT_CHAR_CFG_UUID                                          \\\n  { 0x02, 0x29 }\n\nstatic const uint8_t TOTA_SERVICE_UUID_128[ATT_UUID_128_LEN] =\n    tota_service_uuid_128_content;\n\n/// Full OTA SERVER Database Description - Used to add attributes into the\n/// database\nconst struct attm_desc_128 tota_att_db[TOTA_IDX_NB] = {\n    // TOTA Service Declaration\n    [TOTA_IDX_SVC] = {ATT_DECL_PRIMARY_SERVICE_UUID, PERM(RD, ENABLE), 0, 0},\n    // TOTA Characteristic Declaration\n    [TOTA_IDX_CHAR] = {ATT_DECL_CHARACTERISTIC_UUID, PERM(RD, ENABLE), 0, 0},\n    // TOTA service\n    [TOTA_IDX_VAL] = {tota_val_char_val_uuid_128_content,\n                      PERM(WRITE_REQ, ENABLE) | PERM(NTF, ENABLE),\n                      PERM(RI, ENABLE) | PERM_VAL(UUID_LEN, PERM_UUID_128),\n                      TOTA_MAX_LEN},\n    // TOTA Characteristic\n    [TOTA_IDX_NTF_CFG] = {ATT_DESC_CLIENT_CHAR_CFG_UUID,\n                          PERM(RD, ENABLE) | PERM(WRITE_REQ, ENABLE), 0, 0},\n\n};\n\n/**\n ****************************************************************************************\n * @brief Initialization of the TOTA module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated),\n *only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum\n *attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or\n *service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\nstatic uint8_t tota_init(struct prf_task_env *env, uint16_t *start_hdl,\n                         uint16_t app_task, uint8_t sec_lvl, void *params) {\n  uint8_t status;\n  // Add Service Into Database\n  status = attm_svc_create_db_128(\n      start_hdl, TOTA_SERVICE_UUID_128, NULL, TOTA_IDX_NB, NULL, env->task,\n      &tota_att_db[0],\n      (sec_lvl & (PERM_MASK_SVC_DIS | PERM_MASK_SVC_AUTH | PERM_MASK_SVC_EKS)) |\n          PERM(SVC_MI, DISABLE) | PERM_VAL(SVC_UUID_LEN, PERM_UUID_128));\n\n  BLE_GATT_DBG(\"attm_svc_create_db_128 returns %d start handle is %d\", status,\n               *start_hdl);\n\n  //-------------------- allocate memory required for the profile\n  //---------------------\n  if (status == ATT_ERR_NO_ERROR) {\n    // Allocate TOTA required environment variable\n    struct tota_env_tag *tota_env = (struct tota_env_tag *)ke_malloc(\n        sizeof(struct tota_env_tag), KE_MEM_ATT_DB);\n\n    // Initialize TOTA environment\n    env->env = (prf_env_t *)tota_env;\n    tota_env->shdl = *start_hdl;\n\n    tota_env->prf_env.app_task =\n        app_task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                              : PERM(PRF_MI, DISABLE));\n    // Mono Instantiated task\n    tota_env->prf_env.prf_task =\n        env->task | (PERM_GET(sec_lvl, SVC_MI) ? PERM(PRF_MI, ENABLE)\n                                               : PERM(PRF_MI, DISABLE));\n\n    // initialize environment variable\n    env->id = TASK_ID_TOTA;\n    tota_task_init(&(env->desc));\n\n    /* Put HRS in Idle state */\n    ke_state_set(env->task, TOTA_IDLE);\n  }\n\n  return (status);\n}\n\n/**\n ****************************************************************************************\n * @brief Destruction of the TOTA module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by\n *another procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\nstatic void tota_destroy(struct prf_task_env *env) {\n  struct tota_env_tag *tota_env = (struct tota_env_tag *)env->env;\n\n  // free profile environment variables\n  env->env = NULL;\n  ke_free(tota_env);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\nstatic void tota_create(struct prf_task_env *env, uint8_t conidx) {\n  struct tota_env_tag *tota_env = (struct tota_env_tag *)env->env;\n  struct prf_svc tota_tota_svc = {tota_env->shdl, tota_env->shdl + TOTA_IDX_NB};\n  prf_register_atthdl2gatt(env->env, conidx, &tota_tota_svc);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\nstatic void tota_cleanup(struct prf_task_env *env, uint8_t conidx,\n                         uint8_t reason) {\n  /* Nothing to do */\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/// TOTA Task interface required by profile manager\nconst struct prf_task_cbs tota_itf = {\n    (prf_init_fnct)tota_init,\n    tota_destroy,\n    tota_create,\n    tota_cleanup,\n};\n\n/*\n * EXPORTED FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\n\nconst struct prf_task_cbs *tota_prf_itf_get(void) { return &tota_itf; }\n\n#endif /* BLE_TOTA */\n"
  },
  {
    "path": "services/ble_profiles/tota/tota_ble.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef _TOTA_H_\n#define _TOTA_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TOTA Datapath Profile Server\n * @ingroup TOTAP\n * @brief Datapath Profile Server\n *\n * Datapath Profile Server provides functionalities to upper layer module\n * application. The device using this profile takes the role of Datapath Server.\n *\n * The interface of this role to the Application is:\n *  - Enable the profile role (from APP)\n *  - Disable the profile role (from APP)\n *  - Send data to peer device via notifications  (from APP)\n *  - Receive data from peer device via write no response (from APP)\n *\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_TOTA)\n#include \"prf_types.h\"\n#include \"prf.h\"\n// #include \"tota_task.h\"\n#include \"attm.h\"\n#include \"prf_utils.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n#define TOTA_MAX_LEN            \t\t\t(509)\t\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Possible states of the TOTA task\nenum\n{\n    /// Idle state\n    TOTA_IDLE,\n    /// Connected state\n    TOTA_BUSY,\n\n    /// Number of defined states.\n    TOTA_STATE_MAX,\n};\n\n///Attributes State Machine\nenum\n{\n    TOTA_IDX_SVC,\n\n    TOTA_IDX_CHAR,\n    TOTA_IDX_VAL,\n    TOTA_IDX_NTF_CFG,\n\n    TOTA_IDX_NB,\n};\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Datapath Profile Server environment variable\nstruct tota_env_tag\n{\n    /// profile environment\n    prf_env_t \tprf_env;\n\tuint8_t\t\tisNotificationEnabled[BLE_CONNECTION_MAX];\n    /// Service Start Handle\n    uint16_t \tshdl;\n    /// State of different task instances\n    ke_state_t \tstate;\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve HRP service profile interface\n *\n * @return HRP service profile interface\n ****************************************************************************************\n */\nconst struct prf_task_cbs* tota_prf_itf_get(void);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * Initialize task handler\n *\n * @param task_desc Task descriptor to fill\n ****************************************************************************************\n */\nvoid tota_task_init(struct ke_task_desc *task_desc);\n\n\n\n#endif /* #if (BLE_TOTA) */\n\n/// @} TOTA\n\n#endif /* _TOTA_H_ */"
  },
  {
    "path": "services/ble_profiles/tota/tota_task.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/**\n ****************************************************************************************\n * @addtogroup TOTATASK\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_TOTA)\n#include \"attm.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"gattc_task.h\"\n#include \"tota_ble.h\"\n#include \"tota_task.h\"\n\n#include \"prf_utils.h\"\n\n#include \"co_utils.h\"\n#include \"ke_mem.h\"\n\n/*\n * LOCAL FUNCTIONS DEFINITIONS\n ****************************************************************************************\n */\nstatic int gapc_disconnect_ind_handler(ke_msg_id_t const msgid,\n                                       struct gapc_disconnect_ind const *param,\n                                       ke_task_id_t const dest_id,\n                                       ke_task_id_t const src_id) {\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  uint8_t conidx = KE_IDX_GET(src_id);\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n  tota_env->isNotificationEnabled[conidx] = false;\n  return KE_MSG_CONSUMED;\n}\n\nvoid app_tota_send_rx_cfm(uint8_t conidx) {\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n\n  struct gattc_write_cfm *cfm = KE_MSG_ALLOC(\n      GATTC_WRITE_CFM, KE_BUILD_ID(TASK_GATTC, conidx),\n      prf_src_task_get(&tota_env->prf_env, conidx), gattc_write_cfm);\n  cfm->handle = tota_env->shdl + TOTA_IDX_VAL;\n  cfm->status = ATT_ERR_NO_ERROR;\n  ke_msg_send(cfm);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the @ref GL2C_CODE_ATT_WR_CMD_IND message.\n * The handler compares the new values with current ones and notifies them if\n *they changed.\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_write_req_ind_handler(\n    ke_msg_id_t const msgid, struct gattc_write_req_ind const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  // Get the address of the environment\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  uint8_t status = GAP_ERR_NO_ERROR;\n\n  BLE_GATT_DBG(\n      \"gattc_write_req_ind_handler tota_env 0x%x write handle %d shdl %d\",\n      tota_env, param->handle, tota_env->shdl);\n\n  // Send write response\n  struct gattc_write_cfm *cfm =\n      KE_MSG_ALLOC(GATTC_WRITE_CFM, src_id, dest_id, gattc_write_cfm);\n  cfm->handle = param->handle;\n  cfm->status = status;\n  ke_msg_send(cfm);\n\n  if (tota_env != NULL) {\n    if (param->handle == (tota_env->shdl + TOTA_IDX_NTF_CFG)) {\n      uint16_t value = 0x0000;\n\n      // Extract value before check\n      memcpy(&value, &(param->value), sizeof(uint16_t));\n\n      if (value == PRF_CLI_STOP_NTFIND) {\n        tota_env->isNotificationEnabled[conidx] = false;\n      } else if (value == PRF_CLI_START_NTF) {\n        tota_env->isNotificationEnabled[conidx] = true;\n      } else {\n        status = PRF_APP_ERROR;\n      }\n\n      if (status == GAP_ERR_NO_ERROR) {\n        // Inform APP of TX ccc change\n        struct ble_tota_tx_notif_config_t *ind = KE_MSG_ALLOC(\n            TOTA_CCC_CHANGED, prf_dst_task_get(&tota_env->prf_env, conidx),\n            prf_src_task_get(&tota_env->prf_env, conidx),\n            ble_tota_tx_notif_config_t);\n\n        ind->isNotificationEnabled = tota_env->isNotificationEnabled[conidx];\n\n        ke_msg_send(ind);\n      }\n    } else if (param->handle == (tota_env->shdl + TOTA_IDX_VAL)) {\n      // inform APP of data\n      struct ble_tota_rx_data_ind_t *ind = KE_MSG_ALLOC_DYN(\n          TOTA_DATA_RECEIVED, prf_dst_task_get(&tota_env->prf_env, conidx),\n          prf_src_task_get(&tota_env->prf_env, conidx), ble_tota_rx_data_ind_t,\n          sizeof(struct ble_tota_rx_data_ind_t) + param->length);\n\n      ind->length = param->length;\n      memcpy((uint8_t *)(ind->data), &(param->value), param->length);\n\n      ke_msg_send(ind);\n\n      return KE_MSG_CONSUMED;\n    } else {\n      status = PRF_APP_ERROR;\n    }\n  }\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles @ref GATTC_CMP_EVT for GATTC_NOTIFY message meaning that\n *Measurement notification has been correctly sent to peer device (but not\n *confirmed by peer device).\n * *\n * @param[in] msgid     Id of the message received.\n * @param[in] param     Pointer to the parameters of the message.\n * @param[in] dest_id   ID of the receiving task instance\n * @param[in] src_id    ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_cmp_evt_handler(ke_msg_id_t const msgid,\n                                   struct gattc_cmp_evt const *param,\n                                   ke_task_id_t const dest_id,\n                                   ke_task_id_t const src_id) {\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  // Get the address of the environment\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n\n  uint8_t conidx = KE_IDX_GET(dest_id);\n\n  // notification or write request has been sent out\n  if ((GATTC_NOTIFY == param->operation) ||\n      (GATTC_INDICATE == param->operation)) {\n\n    struct ble_tota_tx_sent_ind_t *ind = KE_MSG_ALLOC(\n        TOTA_TX_DATA_SENT, prf_dst_task_get(&tota_env->prf_env, conidx),\n        prf_src_task_get(&tota_env->prf_env, conidx), ble_tota_tx_sent_ind_t);\n\n    ind->status = param->status;\n\n    ke_msg_send(ind);\n  }\n\n  ke_state_set(dest_id, TOTA_IDLE);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the read request from peer device\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\n__STATIC int gattc_read_req_ind_handler(ke_msg_id_t const msgid,\n                                        struct gattc_read_req_ind const *param,\n                                        ke_task_id_t const dest_id,\n                                        ke_task_id_t const src_id) {\n\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  // Get the address of the environment\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n\n  struct gattc_read_cfm *cfm;\n\n  uint8_t status = GAP_ERR_NO_ERROR;\n  uint8_t conidx = KE_IDX_GET(src_id);\n\n  BLE_GATT_DBG(\"gattc_read_req_ind_handler read handle %d shdl %d\",\n               param->handle, tota_env->shdl);\n\n  if (param->handle == (tota_env->shdl + TOTA_IDX_NTF_CFG)) {\n    uint16_t notify_ccc;\n    cfm = KE_MSG_ALLOC_DYN(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm,\n                           sizeof(notify_ccc));\n\n    if (tota_env->isNotificationEnabled[conidx]) {\n      notify_ccc = 1;\n    } else {\n      notify_ccc = 0;\n    }\n    cfm->length = sizeof(notify_ccc);\n    memcpy(cfm->value, (uint8_t *)¬ify_ccc, cfm->length);\n  } else {\n    cfm = KE_MSG_ALLOC(GATTC_READ_CFM, src_id, dest_id, gattc_read_cfm);\n    cfm->length = 0;\n    status = ATT_ERR_REQUEST_NOT_SUPPORTED;\n  }\n\n  cfm->handle = param->handle;\n\n  cfm->status = status;\n\n  ke_msg_send(cfm);\n\n  ke_state_set(dest_id, TOTA_IDLE);\n\n  return (KE_MSG_CONSUMED);\n}\n\nstatic void send_notifiction(uint8_t conidx, const uint8_t *ptrData,\n                             uint32_t length) {\n  uint16_t handle_offset = 0xFFFF;\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n\n  if (tota_env->isNotificationEnabled[conidx]) {\n    handle_offset = TOTA_IDX_VAL;\n  }\n\n  TRACE(1, \"Send tota notificationto handle offset %d:\", handle_offset);\n\n  if (0xFFFF != handle_offset) {\n    // Allocate the GATT notification message\n    struct gattc_send_evt_cmd *report_ntf =\n        KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         prf_src_task_get(&tota_env->prf_env, conidx),\n                         gattc_send_evt_cmd, length);\n\n    // Fill in the parameter structure\n    report_ntf->operation = GATTC_NOTIFY;\n    report_ntf->handle = tota_env->shdl + handle_offset;\n    // pack measured value in database\n    report_ntf->length = length;\n    memcpy(report_ntf->value, ptrData, length);\n    // send notification to peer device\n    ke_msg_send(report_ntf);\n  }\n}\n\nstatic void send_indication(uint8_t conidx, const uint8_t *ptrData,\n                            uint32_t length) {\n  uint16_t handle_offset = 0xFFFF;\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n  if (tota_env->isNotificationEnabled[conidx]) {\n    handle_offset = TOTA_IDX_VAL;\n  }\n\n  TRACE(1, \"Send tota indicationto handle offset %d:\", handle_offset);\n\n  if (0xFFFF != handle_offset) {\n    // Allocate the GATT notification message\n    struct gattc_send_evt_cmd *report_ntf =\n        KE_MSG_ALLOC_DYN(GATTC_SEND_EVT_CMD, KE_BUILD_ID(TASK_GATTC, conidx),\n                         prf_src_task_get(&tota_env->prf_env, conidx),\n                         gattc_send_evt_cmd, length);\n\n    // Fill in the parameter structure\n    report_ntf->operation = GATTC_INDICATE;\n    report_ntf->handle = tota_env->shdl + handle_offset;\n    // pack measured value in database\n    report_ntf->length = length;\n    memcpy(report_ntf->value, ptrData, length);\n    // send notification to peer device\n    ke_msg_send(report_ntf);\n  }\n}\n\n__STATIC int send_notification_handler(\n    ke_msg_id_t const msgid, struct ble_tota_send_data_req_t const *param,\n    ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_notifiction(param->connecionIndex, param->value, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\n__STATIC int\nsend_indication_handler(ke_msg_id_t const msgid,\n                        struct ble_tota_send_data_req_t const *param,\n                        ke_task_id_t const dest_id, ke_task_id_t const src_id) {\n  send_indication(param->connecionIndex, param->value, param->length);\n  return (KE_MSG_CONSUMED);\n}\n\n/**\n ****************************************************************************************\n * @brief Handles reception of the attribute info request message.\n *\n * @param[in] msgid Id of the message received (probably unused).\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id ID of the receiving task instance (probably unused).\n * @param[in] src_id ID of the sending task instance.\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nstatic int gattc_att_info_req_ind_handler(ke_msg_id_t const msgid,\n                                          struct gattc_att_info_req_ind *param,\n                                          ke_task_id_t const dest_id,\n                                          ke_task_id_t const src_id) {\n  TOTA_LOG_DBG(1, \"[%s]TOTA\", __func__);\n  // Get the address of the environment\n  struct gattc_att_info_cfm *cfm;\n\n  // Send write response\n  cfm = KE_MSG_ALLOC(GATTC_ATT_INFO_CFM, src_id, dest_id, gattc_att_info_cfm);\n  cfm->handle = param->handle;\n\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n\n  if (param->handle == (tota_env->shdl + TOTA_IDX_NTF_CFG)) {\n    // CCC attribute length = 2\n    cfm->length = 2;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else if (param->handle == (tota_env->shdl + TOTA_IDX_VAL)) {\n    // force length to zero to reject any write starting from something != 0\n    cfm->length = 0;\n    cfm->status = GAP_ERR_NO_ERROR;\n  } else {\n    cfm->length = 0;\n    cfm->status = ATT_ERR_WRITE_NOT_PERMITTED;\n  }\n\n  ke_msg_send(cfm);\n\n  return (KE_MSG_CONSUMED);\n}\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n\n/* Default State handlers definition. */\nKE_MSG_HANDLER_TAB(tota){\n    {GAPC_DISCONNECT_IND, (ke_msg_func_t)gapc_disconnect_ind_handler},\n    {GATTC_WRITE_REQ_IND, (ke_msg_func_t)gattc_write_req_ind_handler},\n    {GATTC_CMP_EVT, (ke_msg_func_t)gattc_cmp_evt_handler},\n    {GATTC_READ_REQ_IND, (ke_msg_func_t)gattc_read_req_ind_handler},\n    {TOTA_SEND_NOTIFICATION, (ke_msg_func_t)send_notification_handler},\n    {TOTA_SEND_INDICATION, (ke_msg_func_t)send_indication_handler},\n    {GATTC_ATT_INFO_REQ_IND, (ke_msg_func_t)gattc_att_info_req_ind_handler},\n};\n\nvoid tota_task_init(struct ke_task_desc *task_desc) {\n  // Get the address of the environment\n  struct tota_env_tag *tota_env = PRF_ENV_GET(TOTA, tota);\n\n  task_desc->msg_handler_tab = tota_msg_handler_tab;\n  task_desc->msg_cnt = ARRAY_LEN(tota_msg_handler_tab);\n  task_desc->state = &(tota_env->state);\n  task_desc->idx_max = BLE_CONNECTION_MAX;\n}\n\n#endif /* #if (BLE_TOTA) */\n\n/// @} TOTATASK\n"
  },
  {
    "path": "services/ble_profiles/tota/tota_task.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n\n#ifndef _TOTA_TASK_H_\n#define _TOTA_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TOTATASK Task\n * @ingroup TOTA\n * @brief TOTA Profile Task.\n *\n * The TOTATASK is responsible for handling the messages coming in and out of the\n * @ref TOTA collector block of the BLE Host.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n#include \"rwip_task.h\" // Task definitions\n#include \"app_tota_cmd_code.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n#define TOTA_CONTENT_TYPE_COMMAND\t\t0 \n#define TOTA_CONTENT_TYPE_DATA\t\t1\n\n/// Messages for TOTA Profile \nenum tota_msg_id\n{\n\tTOTA_CCC_CHANGED = TASK_FIRST_MSG(TASK_ID_TOTA),\n\n\tTOTA_TX_DATA_SENT,\n\t\n\tTOTA_DATA_RECEIVED,\n\n\tTOTA_SEND_NOTIFICATION,\n\n\tTOTA_SEND_INDICATION,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\nstruct ble_tota_tx_notif_config_t\n{\n\tbool \t\tisNotificationEnabled;\n};\n\nstruct ble_tota_rx_data_ind_t\n{\n\tuint16_t\tlength;\n\tuint8_t\t\tdata[0];\n};\n\nstruct ble_tota_tx_sent_ind_t\n{\n\tuint8_t \tstatus;\n};\n\nstruct ble_tota_send_data_req_t\n{\n\tuint8_t \tconnecionIndex;\n\tuint32_t \tlength;\n\tuint8_t  \tvalue[__ARRAY_EMPTY];\n};\n\n\n/// @} TOTATASK\n\n#endif /* _TOTA_TASK_H_ */\n\n"
  },
  {
    "path": "services/ble_stack/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)common/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/gap/gapc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/gap/gapm/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/gap/smpc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/gatt/attc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/gatt/attm/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/gatt/atts/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/gatt/gattc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/gatt/gattm/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/l2c/l2cc/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/l2c/l2cm/*.c))\n#obj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/prf/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hl/src/rwble_hl/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hci/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)ke/src/*.c))\n#obj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)dbg/src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)ble_ip/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)util/*.c))\n\nBTBLE_LIB_NAME := $(CHIP)_libble_stack\n\nifeq ($(HFP_1_6_ENABLE), 1)\nBTBLE_LIB_NAME := $(BTBLE_LIB_NAME)_sbc_enc\nendif\n\n$(BTBLE_LIB_NAME)-y := $(obj_c:.c=.o)\nobj-y := $(BTBLE_LIB_NAME).a\n\nsubdir-ccflags-y += \\\n\t-Iservices/bridge/ \\\n\t$(BT_IF_INCLUDES) \\\n\t$(BT_PROFILES_INCLUDES) \\\n\t-Iservices/ble_stack/common/api/ \\\n\t-Iservices/ble_stack/hl/inc/ \\\n\t-Iservices/ble_stack/hl/api/ \\\n\t-Iservices/ble_stack/hl/src/gap/ \\\n\t-Iservices/ble_stack/hl/src/gap/gapc/ \\\n\t-Iservices/ble_stack/hl/src/gap/gapm/ \\\n\t-Iservices/ble_stack/hl/src/gap/smpc/ \\\n\t-Iservices/ble_stack/ke/api/ \\\n\t-Iservices/ble_stack/ke/src/ \\\n\t-Iservices/ble_stack/hl/src/gatt/attc/ \\\n\t-Iservices/ble_stack/hl/src/gatt/attm/ \\\n\t-Iservices/ble_stack/hl/src/gatt/atts/ \\\n\t-Iservices/ble_stack/hl/src/gatt/gattc/ \\\n\t-Iservices/ble_stack/hl/src/gatt/gattm/ \\\n\t-Iservices/ble_stack/hl/src/gatt/ \\\n\t-Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n\t-Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n\t-Iservices/ble_stack/hci/api/ \\\n\t-Iservices/ble_stack/hci/src/ \\\n\t-Iservices/ble_app/app_main/\t\\\n\t-Iservices/ble_stack/ble_ip/  \\\n\t-Iservices/ble_app/app_datapath/\t\\\n\t-Iservices/ble_stack/app/api/  \\\n\t-Iservices/ble_stack/app/src/\nifeq ($(GATT_OVER_BR_EDR),1)\nccflags-y += -Iservices/bt_app\nendif"
  },
  {
    "path": "services/ble_stack/ble_ip/arch.h",
    "content": "#ifndef _ARCH_H_\n#define _ARCH_H_\n\n/**\n ****************************************************************************************\n * @defgroup REFIP\n * @brief Reference IP Platform\n *\n * This module contains reference platform components - REFIP.\n *\n *\n * @{\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @defgroup DRIVERS\n * @ingroup REFIP\n * @brief Reference IP Platform Drivers\n *\n * This module contains the necessary drivers to run the platform with the\n * RW BT SW protocol stack.\n *\n * This has the declaration of the platform architecture API.\n *\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include         // standard integer definition\n//#include \"compiler.h\"      // inline functions\n#include \"hal_trace.h\"\n\n/*\n * CPU WORD SIZE\n ****************************************************************************************\n */\n/// ARM is a 32-bit CPU\n#define CPU_WORD_SIZE   4\n\n/*\n * CPU Endianness\n ****************************************************************************************\n */\n/// ARM is little endian\n#define CPU_LE          1\n\n/*\n * DEBUG configuration\n ****************************************************************************************\n */\n#if defined(CFG_DBG)\n#define PLF_DEBUG          1\n#else //CFG_DBG\n#define PLF_DEBUG          0\n#endif //CFG_DBG\n\n\n/*\n * NVDS\n ****************************************************************************************\n */\n\n/// NVDS\n#ifdef CFG_NVDS\n#define PLF_NVDS             1\n#else // CFG_NVDS\n#define PLF_NVDS             0\n#endif // CFG_NVDS\n\n\n/*\n * UART\n ****************************************************************************************\n */\n\n/// UART\n#define PLF_UART             1\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Possible errors detected by FW\n#define    RESET_NO_ERROR         0x00000000\n#define    RESET_MEM_ALLOC_FAIL   0xF2F2F2F2\n\n/// Reset platform and stay in ROM\n#define    RESET_TO_ROM           0xA5A5A5A5\n/// Reset platform and reload FW\n#define    RESET_AND_LOAD_FW      0xC3C3C3C3\n\n/// Exchange memory size limit\n#define    EM_SIZE_LIMIT          0x8000\n/*\n * EXPORTED FUNCTION DECLARATION\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Compute size of SW stack used.\n *\n * This function is compute the maximum size stack used by SW.\n *\n * @return Size of stack used (in bytes)\n ****************************************************************************************\n */\nuint16_t get_stack_usage(void);\n\n/**\n ****************************************************************************************\n * @brief Re-boot FW.\n *\n * This function is used to re-boot the FW when error has been detected, it is the end of\n * the current FW execution.\n * After waiting transfers on UART to be finished, and storing the information that\n * FW has re-booted by itself in a non-loaded area, the FW restart by branching at FW\n * entry point.\n *\n * Note: when calling this function, the code after it will not be executed.\n *\n * @param[in] error      Error detected by FW\n ****************************************************************************************\n */\nvoid platform_reset(uint32_t error);\n\n#if PLF_DEBUG\n/**\n ****************************************************************************************\n * @brief Print the assertion error reason and loop forever.\n *\n * @param condition C string containing the condition.\n * @param file C string containing file where the assertion is located.\n * @param line Line number in the file where the assertion is located.\n ****************************************************************************************\n */\nvoid assert_err(const char *condition, const char * file, int line);\n\n/**\n ****************************************************************************************\n * @brief Print the assertion error reason and loop forever.\n * The parameter value that is causing the assertion will also be disclosed.\n *\n * @param param0 parameter value 0.\n * @param param1 parameter value 1.\n * @param file C string containing file where the assertion is located.\n * @param line Line number in the file where the assertion is located.\n ****************************************************************************************\n */\nvoid assert_param(int param0, int param1, const char * file, int line);\n\n/**\n ****************************************************************************************\n * @brief Print the assertion warning reason.\n *\n * @param param0 parameter value 0.\n * @param param1 parameter value 1.\n * @param file C string containing file where the assertion is located.\n * @param line Line number in the file where the assertion is located.\n ****************************************************************************************\n */\nvoid assert_warn(int param0, int param1, const char * file, int line);\n\n\n/**\n ****************************************************************************************\n * @brief Dump data value into FW.\n *\n * @param data start pointer of the data.\n * @param length data size to dump\n ****************************************************************************************\n */\nvoid dump_data(uint8_t* data, uint16_t length);\n#endif //PLF_DEBUG\n\n\n/*\n * ASSERTION CHECK\n ****************************************************************************************\n */\n#if 1\n/// Assertions showing a critical error that could require a full system reset\n#define ASSERT_ERR(cond)                             { if (!(cond)) { TRACE(2,\"line is %d file is %s\", __LINE__, __FILE__); } }\n\n/// Assertions showing a critical error that could require a full system reset\n#define ASSERT_INFO(cond, param0, param1)            { if (!(cond)) { TRACE(2,\"line is %d file is %s\", __LINE__, __FILE__); } }\n\n/// Assertions showing a non-critical problem that has to be fixed by the SW\n#define ASSERT_WARN(cond, param0, param1)            { if (!(cond)) { TRACE(2,\"line is %d file is %s\", __LINE__, __FILE__); } }\n\n#define DUMP_DATA(data, length) \\\n   // dump_data((uint8_t*)data, length)\n\n#else\n/// Assertions showing a critical error that could require a full system reset\n#define ASSERT_ERR(cond)\n\n/// Assertions showing a critical error that could require a full system reset\n#define ASSERT_INFO(cond, param0, param1)\n\n/// Assertions showing a non-critical problem that has to be fixed by the SW\n#define ASSERT_WARN(cond, param0, param1)\n\n/// DUMP data array present in the SW.\n#define DUMP_DATA(data, length)\n#endif //PLF_DEBUG\n\n/// @} DRIVERS\n#endif // _ARCH_H_\n"
  },
  {
    "path": "services/ble_stack/ble_ip/besble.h",
    "content": "#ifndef _BESBLE_H_\n#define _BESBLE_H_\n\nvoid bes_ble_init(void);\nvoid bes_ble_reset(void);\nvoid bes_ble_schedule(void);\n\n#endif\n"
  },
  {
    "path": "services/ble_stack/ble_ip/compiler.h",
    "content": "#ifndef _COMPILER_H_\n#define _COMPILER_H_\n\n#ifndef __INLINE\n#define __INLINE         inline\n#endif\n\n/// define the static keyword for this compiler\n#define __STATIC static\n\n/// define the BLE IRQ handler attribute for this compiler\n#define __BTIRQ\n\n/// define the BLE IRQ handler attribute for this compiler\n#define __BLEIRQ\n\n/// define size of an empty array (used to declare structure with an array size not defined)\n#define __ARRAY_EMPTY 1\n\n/// Function returns struct in registers (4 in rvds, var with gnuarm).\n/// With Gnuarm, feature depends on command line options and\n/// impacts ALL functions returning 2-words max structs\n/// (check -freg-struct-return and -mabi=xxx)\n#define __VIR\n\n/// function has no side effect and return depends only on arguments\n#define __PURE __attribute__((const))\n\n/// Align instantiated lvalue or struct member on 4 bytes\n#define __ALIGN4 __attribute__((aligned(4)))\n\n/// __MODULE__ comes from the RVDS compiler that supports it\n#define __MODULE__ __BASE_FILE__\n\n/// Pack a structure field\n#ifndef __PACKED\n#define __PACKED __attribute__ ((__packed__))\n#endif\n\n/// Put a variable in a memory maintained during deep sleep\n#define __LOWPOWER_SAVED\n\n#endif // _COMPILER_H_\n"
  },
  {
    "path": "services/ble_stack/ble_ip/rwapp_config.h",
    "content": "#ifndef _RWAPP_CONFIG_H_\n#define _RWAPP_CONFIG_H_\n\n/**\n ****************************************************************************************\n * @addtogroup app\n * @brief Application configuration definition\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/******************************************************************************************/\n/* -------------------------   BLE APPLICATION SETTINGS\n * -----------------------------*/\n/******************************************************************************************/\n#define CFG_APP_DATAPATH_SERVER\n\n#define FAST_PAIR_REV_1_0 0\n#define FAST_PAIR_REV_2_0 1\n#define BLE_APP_GFPS_VER FAST_PAIR_REV_2_0\n\n#ifdef GFPS_ENABLED\n#if BLE_APP_GFPS_VER == FAST_PAIR_REV_2_0\n#define CFG_APP_GFPS\n#ifndef CFG_APP_SEC\n#define CFG_APP_SEC\n#endif\n#else\n#undef CFG_APP_GFPS\n#endif\n#endif\n\n#if defined(BISTO_ENABLED)\n#ifndef CFG_APP_SEC\n#define CFG_APP_SEC\n#endif\n#endif\n\n#ifdef VOICE_DATAPATH\n#define CFG_APP_VOICEPATH\n#ifndef CFG_APP_SEC\n#define CFG_APP_SEC\n#endif\n#endif\n\n#ifdef TILE_DATAPATH\n#define CFG_APP_TILE\n#endif\n\n#ifdef BES_OTA_BASIC\n#define CFG_APP_OTA\n#endif\n\n#ifdef BLE_TOTA_ENABLED\n#define CFG_APP_TOTA\n#endif\n\n#ifdef __AI_VOICE__\n#ifndef CFG_APP_SEC\n#define CFG_APP_SEC\n#endif\n#ifndef CFG_SEC_CON\n#define CFG_SEC_CON\n#endif\n\n#define CFG_APP_AI_VOICE\n#endif\n\n#if defined(VOICE_DATAPATH) && defined(BISTO_ENABLED)\n#define ANCS_PROXY_ENABLE 1\n#else\n#define ANCS_PROXY_ENABLE 0\n#endif\n\n#if ANCS_PROXY_ENABLE\n#define CFG_APP_AMS\n#define CFG_APP_ANCC\n#endif\n\n/// Health Thermometer Application\n#if defined(CFG_APP_HT)\n#define BLE_APP_HT 1\n#else // defined(CFG_APP_HT)\n#define BLE_APP_HT 0\n#endif // defined(CFG_APP_HT)\n\n#if defined(CFG_APP_HR)\n#define BLE_APP_HR 1\n#else\n#define BLE_APP_HR 0\n#endif\n\n/// Data Path Server Application\n#if defined(CFG_APP_DATAPATH_SERVER)\n#define BLE_APP_DATAPATH_SERVER 1\n#else // defined(CFG_APP_DATAPATH_SERVER)\n#define BLE_APP_DATAPATH_SERVER 0\n#endif // defined(CFG_APP_DATAPATH_SERVER)\n\n/// HID Application\n#if defined(CFG_APP_HID)\n#define BLE_APP_HID 1\n#else // defined(CFG_APP_HID)\n#define BLE_APP_HID 0\n#endif // defined(CFG_APP_HID)\n\n/// DIS Application\n#if defined(CFG_APP_DIS)\n#define BLE_APP_DIS 1\n#else // defined(CFG_APP_DIS)\n#define BLE_APP_DIS 0\n#endif // defined(CFG_APP_DIS)\n\n/// Time Application\n#if defined(CFG_APP_TIME)\n#define BLE_APP_TIME 1\n#else // defined(CFG_APP_TIME)\n#define BLE_APP_TIME 0\n#endif // defined(CFG_APP_TIME)\n\n/// Battery Service Application\n#if (BLE_APP_HID)\n#define BLE_APP_BATT 1\n#else\n#define BLE_APP_BATT 0\n#endif // (BLE_APP_HID)\n\n/// Security Application\n#if (defined(CFG_APP_SEC) || BLE_APP_HID || defined(BLE_APP_AM0))\n#define BLE_APP_SEC 1\n#else // defined(CFG_APP_SEC)\n#define BLE_APP_SEC 0\n#endif // defined(CFG_APP_SEC)\n\n/// Voice Path Application\n#if defined(CFG_APP_VOICEPATH)\n#define BLE_APP_VOICEPATH 1\n#else // defined(CFG_APP_VOICEPATH)\n#define BLE_APP_VOICEPATH 0\n#endif // defined(CFG_APP_VOICEPATH)\n\n#if defined(CFG_APP_TILE)\n#define BLE_APP_TILE 1\n#else // defined(CFG_APP_TILE)\n#define BLE_APP_TILE 0\n#endif // defined(CFG_APP_TILE)\n\n/// OTA Application\n#if defined(CFG_APP_OTA)\n#define BLE_APP_OTA 1\n#else // defined(CFG_APP_OTA)\n#define BLE_APP_OTA 0\n#endif // defined(CFG_APP_OTA)\n\n#if defined(CFG_APP_TOTA)\n#define BLE_APP_TOTA 1\n#else // defined(CFG_APP_TOTA)\n#define BLE_APP_TOTA 0\n#endif // defined(CFG_APP_TOTA)\n\n/// ANCC Application\n#if defined(CFG_APP_ANCC)\n#define BLE_APP_ANCC 1\n#else // defined(CFG_APP_ANCC)\n#define BLE_APP_ANCC 0\n#endif // defined(CFG_APP_ANCC)\n\n/// AMS Application\n#if defined(CFG_APP_AMS)\n#define BLE_APP_AMS 1\n#else // defined(CFG_APP_AMS)\n#define BLE_APP_AMS 0\n#endif // defined(CFG_APP_AMS)\n/// GFPS Application\n#if defined(CFG_APP_GFPS)\n#define BLE_APP_GFPS 1\n#else // defined(CFG_APP_GFPS)\n#define BLE_APP_GFPS 0\n#endif // defined(CFG_APP_GFPS)\n\n/// AMA Voice Application\n#if defined(CFG_APP_AI_VOICE)\n#define BLE_APP_AI_VOICE 1\n#else // defined(CFG_APP_AMA)\n#define BLE_APP_AI_VOICE 0\n#endif // defined(CFG_APP_AMA)\n\n/// @} rwapp_config\n\n#endif /* _RWAPP_CONFIG_H_ */\n"
  },
  {
    "path": "services/ble_stack/ble_ip/rwble_hl.h",
    "content": "#ifndef RWBLE_HL_H_\n#define RWBLE_HL_H_\n\n#include \n\n/**\n ****************************************************************************************\n * @addtogroup ROOT\n * @brief Entry points of the BLE Host stack\n *\n * This module contains the primitives that allow an application accessing and running the\n * BLE protocol stack\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Initialize the BLE Host stack.\n ****************************************************************************************\n */\nvoid rwble_hl_init(void);\n\n/**\n ****************************************************************************************\n * @brief Initialize the host (reset requested)\n *\n ****************************************************************************************\n */\nvoid rwble_hl_reset(void);\n\n/// @} RWBLE_HL\n\n#endif // RWBLE_HL_H_\n"
  },
  {
    "path": "services/ble_stack/ble_ip/rwble_hl_config.h",
    "content": "#ifndef RWBLE_HL_CONFIG_H_\n#define RWBLE_HL_CONFIG_H_\n\n#include \"rwprf_config.h\"\n#include \"rwapp_config.h\"\n\n#define CFG_PRF\n#define CFG_NB_PRF (BLE_APP_OTA + BLE_APP_GFPS  + BLE_VOICEPATH + BLE_BMS + \\\n\tBLE_ANC_CLIENT + BLE_AMS_CLIENT + (ANCS_PROXY_ENABLE ? 2 : 0) + \\\n\tBLE_APP_DATAPATH_SERVER + BLE_AI_VOICE + BLE_APP_TOTA + BLE_APP_TILE)\n\t\n/**\n ****************************************************************************************\n * @addtogroup ROOT\n * @{\n * @name BLE stack configuration\n * @{\n ****************************************************************************************\n */\n\n#include \"rwble_hl_error.h\"\n\n/******************************************************************************************/\n/* -------------------------   BLE PARTITIONING      -------------------------------------*/\n/******************************************************************************************/\n\n\n/******************************************************************************************/\n/* --------------------------   INTERFACES        ----------------------------------------*/\n/******************************************************************************************/\n\n\n#if BLE_APP_PRESENT\n#define APP_MAIN_TASK       TASK_APP\n#else // BLE_APP_PRESENT\n#define APP_MAIN_TASK       TASK_AHI\n#endif // BLE_APP_PRESENT\n\n// Host Controller Interface (Host side)\n#define BLEHL_HCIH_ITF            HCIH_ITF\n\n/******************************************************************************************/\n/* --------------------------   COEX SETUP        ----------------------------------------*/\n/******************************************************************************************/\n\n///WLAN coex\n#define BLEHL_WLAN_COEX          RW_WLAN_COEX\n///WLAN test mode\n#define BLEHL_WLAN_COEX_TEST     RW_WLAN_COEX_TEST\n\n/******************************************************************************************/\n/* --------------------------   HOST MODULES      ----------------------------------------*/\n/******************************************************************************************/\n\n#define BLE_GAPM                    1\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n#define BLE_GAPC                    1\n#define BLE_GAPC_HEAP_ENV_SIZE      (sizeof(struct gapc_env_tag)  + KE_HEAP_MEM_RESERVED)\n#else //(BLE_CENTRAL || BLE_PERIPHERAL)\n#define BLE_GAPC                    0\n#define BLE_GAPC_HEAP_ENV_SIZE      0\n#endif //(BLE_CENTRAL || BLE_PERIPHERAL)\n\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n#define BLE_L2CM                    1\n#define BLE_L2CC                    1\n#define BLE_ATTM                    1\n#define BLE_GATTM                   1\n#define BLE_GATTC                   1\n#define BLE_GATTC_HEAP_ENV_SIZE     (sizeof(struct gattc_env_tag)  + KE_HEAP_MEM_RESERVED)\n#define BLE_L2CC_HEAP_ENV_SIZE      (sizeof(struct l2cc_env_tag)   + KE_HEAP_MEM_RESERVED)\n#else //(BLE_CENTRAL || BLE_PERIPHERAL)\n#define BLE_L2CM                    0\n#define BLE_L2CC                    0\n#define BLE_ATTC                    0\n#define BLE_ATTS                    0\n#define BLE_ATTM                    0\n#define BLE_GATTM                   0\n#define BLE_GATTC                   0\n#define BLE_GATTC_HEAP_ENV_SIZE     0\n#define BLE_L2CC_HEAP_ENV_SIZE      0\n#endif //(BLE_CENTRAL || BLE_PERIPHERAL)\n\n#define BLE_SMPM                    1\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n#define BLE_SMPC                    1\n#else //(BLE_CENTRAL || BLE_PERIPHERAL)\n#define BLE_SMPC                    0\n#endif //(BLE_CENTRAL || BLE_PERIPHERAL)\n\n\n/******************************************************************************************/\n/* --------------------------   ATT DB            ----------------------------------------*/\n/******************************************************************************************/\n\n//ATT DB,Testing and Qualification related flags\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n    /// Support of External DB Management\n    #if defined(CFG_EXT_DB)\n        #define BLE_EXT_ATT_DB         1\n    #else\n        #define BLE_EXT_ATT_DB         0\n    #endif // defined(CFG_EXT_DB)\n#else\n    #define BLE_EXT_ATT_DB         0\n#endif // (BLE_CENTRAL || BLE_PERIPHERAL)\n/******************************************************************************************/\n/* --------------------------   PROFILES          ----------------------------------------*/\n/******************************************************************************************/\n#ifdef CFG_PRF\n#define BLE_PROFILES      (1)\n/// Number of Profile tasks managed by GAP manager.\n#define BLE_NB_PROFILES   (CFG_NB_PRF)\n\n#include \"rwprf_config.h\"\n#else\n#define BLE_PROFILES      (0)\n#define BLE_NB_PROFILES   (0)\n#endif // CFG_PRF\n\n\n#ifndef   BLE_ATTS\n#if (BLE_CENTRAL || BLE_PERIPHERAL || defined(CFG_ATTS))\n#define BLE_ATTS                    1\n#else\n#define BLE_ATTS                    0\n#endif // (BLE_CENTRAL || BLE_PERIPHERAL || defined(CFG_ATTS))\n#endif // BLE_ATTS\n\n\n#ifndef   BLE_ATTC\n#if (BLE_CENTRAL || defined(CFG_ATTC))\n#define BLE_ATTC                    1\n#else\n#define BLE_ATTC                    0\n#endif // (BLE_CENTRAL || defined(CFG_ATTC))\n#endif // BLE_ATTC\n\n#ifndef   BLE_LECB\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n#define BLE_LECB                    1\n#else\n#define BLE_LECB                    0\n#endif // (BLE_CENTRAL || defined(CFG_ATTC))\n#endif // BLE_ATTC\n\n\n/// Attribute Server\n#if (BLE_ATTS)\n#define BLE_ATTS                    1\n#else\n#define BLE_ATTS                    0\n#endif //(BLE_ATTS)\n\n\n/// Size of the heap\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n    /// some heap must be reserved for attribute database\n    #if (BLE_ATTS || BLE_ATTC)\n        #define BLEHL_HEAP_DB_SIZE                 (1024)\n    #else\n        #define BLEHL_HEAP_DB_SIZE                 (0)\n    #endif /* (BLE_ATTS || BLE_ATTC) */\n\n#define BLEHL_HEAP_MSG_SIZE                    (2048 + 256 * BLE_CONNECTION_MAX)\n#else\n    #define BLEHL_HEAP_MSG_SIZE                    (256)\n    #define BLEHL_HEAP_DB_SIZE                     (0)\n#endif /* #if (BLE_CENTRAL || BLE_PERIPHERAL) */\n\n\n\n\n/// Number of BLE HL tasks\n#define BLEHL_TASK_SIZE       BLE_HOST_TASK_SIZE + BLE_PRF_TASK_SIZE\n\n/// Size of environment variable needed on BLE Host Stack for one link\n#define BLEHL_HEAP_ENV_SIZE ( BLE_GAPC_HEAP_ENV_SIZE       +  \\\n                              BLE_GATTC_HEAP_ENV_SIZE      +  \\\n                              BLE_L2CC_HEAP_ENV_SIZE)\n\n\n\n\n\n\n\n/*\n * DEFINES - Mandatory for BLE Host Layers\n ****************************************************************************************\n */\n/// Maximum time to remain advertising when in the Limited\n/// Discover able mode: TGAP(lim_adv_timeout)\n/// required value: 180s: (18000 for ke timer)\n#define GAP_TMR_LIM_ADV_TIMEOUT                             0x4650\n\n/// Minimum time to perform scanning when performing\n/// the General Discovery procedure: TGAP(gen_disc_scan_min)\n/// recommended value: 10.24s: (1024 for ke timer)\n#define GAP_TMR_GEN_DISC_SCAN                               0x0300\n\n/// Minimum time to perform scanning when performing the\n/// Limited Discovery procedure: TGAP(lim_disc_scan_min)\n/// recommended value: 10.24s: (1024 for ke timer)\n#define GAP_TMR_LIM_DISC_SCAN                               0x0300\n\n/// Minimum time interval between private address change\n/// TGAP(private_addr_int)\n/// recommended value: 15 minutes; 0x01F4 for PTS\n/// 0x3A98 is 150 seconds; 0xEA60 is 10 minutes\n#define GAP_TMR_PRIV_ADDR_INT                               0x3A98\n\n\n/// Timer used in connection parameter update procedure\n/// TGAP(conn_param_timeout)\n/// recommended value: 30 s: (3000 for ke timer)\n#define GAP_TMR_CONN_PARAM_TIMEOUT                          0x0BB8\n\n/// Timer used in LE credit based connection procedure\n/// TGAP(lecb_conn_timeout)\n/// recommended value: 30 s: (3000 for ke timer)\n#define GAP_TMR_LECB_CONN_TIMEOUT                           0x0BB8\n\n/// Timer used in LE credit based disconnection procedure\n/// TGAP(lecb_disconn_timeout)\n/// recommended value: 30 s: (3000 for ke timer)\n#define GAP_TMR_LECB_DISCONN_TIMEOUT                        0x0BB8\n\n/// Maximal authorized MTU value\n#define GAP_MAX_LE_MTU                                     (2048)\n\n/// Maximum GAP device name size\n#define GAP_MAX_NAME_SIZE                                  (0x20)\n\n\n\n\n/// Maximum Transmission Unit\n#define ATT_DEFAULT_MTU                                 (23)\n/// 30 seconds transaction timer\n#define ATT_TRANS_RTX                                   (0x0BB8)\n/// Acceptable encryption key size - strict access\n#define ATT_SEC_ENC_KEY_SIZE                            (0x10)\n\n\n/// Maximum attribute value length\n#define ATT_MAX_VALUE                                   (GAP_MAX_LE_MTU)\n\n\n/// @} BLE stack configuration\n/// @} ROOT\n\n#endif // RWBLE_HL_CONFIG_H_\n"
  },
  {
    "path": "services/ble_stack/ble_ip/rwip.h",
    "content": "#ifndef _RWIP_H_\n#define _RWIP_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ROOT\n * @brief Entry points of the RW IP stacks/modules\n *\n * This module contains the primitives that allow an application accessing and running the\n * RW IP protocol stacks / modules.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"          // stack configuration\n\n#include                // standard integer definitions\n#include               // standard boolean definitions\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Maximum value of a Bluetooth clock (in 312.5us half slots)\n#define RWIP_MAX_CLOCK_TIME              ((1L<<32) - 1)\n/// Maximum value of a 10ms Bluetooth clock\n#define RWIP_MAX_10MS_TIME               ((1L<<25) - 1)\n/// retrieve 10ms time according to clock time\n#define RWIP_CLOCK_TO_10MS_TIME(clock)   ((clock) >> 5)\n/// retrieve clock time according to 10ms time\n#define RWIP_10MS_TIME_TO_CLOCK(time)    ((time)  << 5)\n/// Invalid target time\n#define RWIP_INVALID_TARGET_TIME         (0xFFFFFFFFL)\n\n\n/// result of sleep state.\nenum rwip_sleep_state\n{\n    /// Some activity pending, can not enter in sleep state\n    RWIP_ACTIVE    = 0,\n    /// CPU can be put in sleep state\n    RWIP_CPU_SLEEP,\n    /// IP could enter in deep sleep\n    RWIP_DEEP_SLEEP,\n};\n\n\n/// Definition of the bits preventing the system from sleeping\nenum prevent_sleep\n{\n    /// Flag indicating that the wake up process is ongoing\n    RW_WAKE_UP_ONGOING                 = 0x0001,\n    /// Flag indicating that an TX transfer is ongoing on Transport Layer\n    RW_TL_TX_ONGOING                   = 0x0002,\n    /// Flag indicating that an RX transfer is ongoing on Transport Layer\n    RW_TL_RX_ONGOING                   = 0x0004,\n    /// Flag indicating HCI timeout is ongoing\n    RW_AHI_TIMEOUT                     = 0x0008,\n    /// Flag indicating that an encryption is ongoing\n    RW_CRYPT_ONGOING                   = 0x0010,\n    /// Flag indicating that controller shall not sleep due to not CSB LPO_Allowed\n    RW_CSB_NOT_LPO_ALLOWED             = 0x0040,\n    /// Flag indicating the MWS/WLAN Event Generator is in operation\n    RW_MWS_WLAN_EVENT_GENERATOR_ACTIVE = 0x0080,\n    /// Flag to indicate that platform does not support deep sleep\n    RW_PLF_DEEP_SLEEP_DISABLED         = 0x0100,\n};\n\n/// Parameters - Possible Returned Status\nenum PARAM_STATUS\n{\n    /// PARAM status OK\n    PARAM_OK,\n    /// generic PARAM status KO\n    PARAM_FAIL,\n    /// PARAM ID unrecognized\n    PARAM_ID_NOT_DEFINED,\n    /// No space for PARAM\n    PARAM_NO_SPACE_AVAILABLE,\n    /// Length violation\n    PARAM_LENGTH_OUT_OF_RANGE,\n    /// PARAM parameter locked\n    PARAM_PARAM_LOCKED,\n    /// PARAM corrupted\n    PARAM_CORRUPT\n};\n\n/**\n * External interface type types.\n */\nenum rwip_eif_types\n{\n    /// Host Controller Interface - Controller part\n    RWIP_EIF_HCIC,\n\n    /// Host Controller Interface - Host part\n    RWIP_EIF_HCIH,\n\n    /// Application Host interface\n    RWIP_EIF_AHI,\n};\n\n\n/// Enumeration of External Interface status codes\nenum rwip_eif_status\n{\n    /// EIF status OK\n    RWIP_EIF_STATUS_OK,\n    /// EIF status KO\n    RWIP_EIF_STATUS_ERROR,\n\n#if (BLE_EMB_PRESENT == 0)\n    /// External interface detached\n    RWIP_EIF_STATUS_DETACHED,\n    /// External interface attached\n    RWIP_EIF_STATUS_ATTACHED,\n#endif // (BLE_EMB_PRESENT == 0)\n};\n\n/// Enumeration of RF modulations\nenum rwip_rf_mod\n{\n    MOD_GFSK  = 0x01,\n    MOD_DQPSK = 0x02,\n    MOD_8DPSK = 0x03,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Time information\ntypedef struct\n{\n    /// Time in 312.5 us step.\n    uint32_t time;\n    /// number of half us before getting next tick\n    uint32_t next_tick;\n} rwip_time_t;\n\n\n\n/// API functions of the RF driver that are used by the BLE or BT software\nstruct rwip_rf_api\n{\n    /// Function called upon HCI reset command reception\n    void (*reset)(void);\n    /// Function called to enable/disable force AGC mechanism (true: en / false : dis)\n    void (*force_agc_enable)(bool);\n    /// Function called when TX power has to be decreased for a specific link id\n    bool (*txpwr_dec)(uint8_t);\n    /// Function called when TX power has to be increased for a specific link id\n    bool (*txpwr_inc)(uint8_t);\n    /// Function called when TX power has to be set to max for a specific link id\n    void (*txpwr_max_set)(uint8_t);\n    /// Function called to convert a TX power CS power field into the corresponding value in dBm\n    uint8_t (*txpwr_dbm_get)(uint8_t, uint8_t);\n    /// Function called to convert a power in dBm into a control structure tx power field\n    uint8_t (*txpwr_cs_get)(int8_t, bool);\n    /// Function called to convert the RSSI read from the control structure into a real RSSI\n    int8_t (*rssi_convert)(uint8_t);\n    /// Function used to read a RF register\n    uint32_t (*reg_rd)(uint16_t);\n    /// Function used to write a RF register\n    void (*reg_wr)(uint16_t, uint32_t);\n    /// Function called to put the RF in deep sleep mode\n    void (*sleep)(void);\n    /// Index of minimum TX power\n    uint8_t txpwr_min;\n    /// Index of maximum TX power\n    uint8_t txpwr_max;\n    /// RSSI high threshold ('real' signed value in dBm)\n    int8_t rssi_high_thr;\n    /// RSSI low threshold ('real' signed value in dBm)\n    int8_t rssi_low_thr;\n    /// interferer threshold ('real' signed value in dBm)\n    int8_t rssi_interf_thr;\n    /// RF wakeup delay (in slots)\n    uint8_t wakeup_delay;\n};\n\n/// API functions of the parameters that are used by the BLE or BT software\nstruct rwip_param_api\n{\n    /**\n     * Get a parameter value\n     * @param[in]      param_id     Parameter identifier\n     * @param[in/out]  lengthPtr    Pointer to the length of the parameter (input: contain max length, output contain the effective param length)\n     * @param[out]     buf          Pointer to the buffer be filled with the parameter value\n     * @return  status              0: success | >0 : error\n     */\n    uint8_t (*get) (uint8_t param_id, uint8_t * lengthPtr, uint8_t *buf);\n\n    /**\n     * Set a parameter value\n     * @param[in]      param_id     Parameter identifier\n     * @param[in/out]  length       Length of the parameter\n     * @param[out]     buf          Pointer to the buffer containing the parameter value\n     * @return  status              0: success | >0 : error\n     */\n    uint8_t (*set) (uint8_t param_id, uint8_t length, uint8_t *buf);\n\n    /**\n     * Delete a parameter\n     * @param[in]      param_id     Parameter identifier\n     * @return  status              0: success | >0 : error\n     */\n    uint8_t (*del) (uint8_t param_id);\n};\n\n/// Internal API for priority\nstruct rwip_prio\n{\n    ///value\n    uint8_t value;\n    ///Increment\n    uint8_t increment;\n};\n/**\n ****************************************************************************************\n * @brief Function called when packet transmission/reception is finished.\n\n * @param[in]  dummy  Dummy data pointer returned to callback when operation is over.\n * @param[in]  status Ok if action correctly performed, else reason status code.\n *****************************************************************************************\n */\ntypedef void (*rwip_eif_callback) (void*, uint8_t);\n\n/**\n * Transport layer communication interface.\n */\nstruct rwip_eif_api\n{\n    /**\n     *************************************************************************************\n     * @brief Starts a data reception.\n     *\n     * @param[out] bufptr      Pointer to the RX buffer\n     * @param[in]  size        Size of the expected reception\n     * @param[in]  callback    Pointer to the function called back when transfer finished\n     * @param[in]  dummy       Dummy data pointer returned to callback when reception is finished\n     *************************************************************************************\n     */\n    void (*read) (uint8_t *bufptr, uint32_t size, rwip_eif_callback callback, void* dummy);\n\n    /**\n     *************************************************************************************\n     * @brief Starts a data transmission.\n     *\n     * @param[in]  bufptr      Pointer to the TX buffer\n     * @param[in]  size        Size of the transmission\n     * @param[in]  callback    Pointer to the function called back when transfer finished\n     * @param[in]  dummy       Dummy data pointer returned to callback when transmission is finished\n     *************************************************************************************\n     */\n    void (*write)(uint8_t *bufptr, uint32_t size, rwip_eif_callback callback, void* dummy);\n\n    /**\n     *************************************************************************************\n     * @brief Enable Interface flow.\n     *************************************************************************************\n     */\n    void (*flow_on)(void);\n\n    /**\n     *************************************************************************************\n     * @brief Disable Interface flow.\n     *\n     * @return True if flow has been disabled, False else.\n     *************************************************************************************\n     */\n    bool (*flow_off)(void);\n};\n\n/*\n * VARIABLE DECLARATION\n*****************************************************************************************\n */\n\n/// API for RF driver\nextern struct rwip_rf_api rwip_rf;\n/// API for parameters\nextern struct rwip_param_api rwip_param;\n#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n/// API for dual mode priority\nextern const struct rwip_prio rwip_priority[RWIP_PRIO_IDX_MAX];\n#endif //#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n\n#if (BT_EMB_PRESENT || BLE_EMB_PRESENT)\n#if (RW_WLAN_COEX)\n/// API for COEX configuration\nextern const uint8_t rwip_coex_cfg[RWIP_COEX_CFG_MAX];\n#endif //(RW_WLAN_COEX)\n#endif //(BT_EMB_PRESENT || BLE_EMB_PRESENT)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/// Get Event status flag\n#if (BT_EMB_PRESENT || BLE_EMB_PRESENT)\n#if (RW_WLAN_COEX)\n#define RWIP_COEX_GET(coex_cfg_idx, bit_field) \\\n                (uint8_t)(((rwip_coex_cfg[RWIP_COEX_ ## coex_cfg_idx ##_IDX]) >> RWIP_ ## bit_field ## _POS ) & RWIP_COEX_BIT_MASK)\n#else //(RW_WLAN_COEX)\n#define RWIP_COEX_GET(coex_cfg_idx, bit_field) 0\n#endif //(RW_WLAN_COEX)\n#endif //(BT_EMB_PRESENT || BLE_EMB_PRESENT)\n\n/*\n * FUNCTION DECLARATION\n*****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initializes the RW BT SW.\n *\n ****************************************************************************************\n */\nvoid rwip_init(uint32_t error);\n\n/**\n ****************************************************************************************\n * @brief Reset the RW BT SW.\n *\n ****************************************************************************************\n */\nvoid rwip_reset(void);\n\n\n\n#if (BT_EMB_PRESENT)\n\n#if PCA_SUPPORT\n/**\n ****************************************************************************************\n * @brief Check if clock dragging limitation\n *\n * @return    true if clock dragging must be used\n ****************************************************************************************\n */\nbool rwip_pca_clock_dragging_only(void);\n#endif //PCA_SUPPORT\n#endif // (BT_EMB_PRESENT)\n\n#if (BT_EMB_PRESENT || BLE_EMB_PRESENT)\n#if (RW_MWS_COEX)\n/**\n ****************************************************************************************\n * @brief Enable/Disable the MWS coexistence interface.\n * \n * @param[in]   CoexSetting     Coexistence value\n *\n ****************************************************************************************\n */\n//void rwip_mwscoex_set(bool state);\n#endif //RW_MWS_COEX\n\n#if (RW_WLAN_COEX)\n/**\n ****************************************************************************************\n * @brief Enable/Disable the Wireless LAN coexistence interface.\n * \n * @param[in]   CoexSetting     Coexistence value\n *\n ****************************************************************************************\n */\n//void rwip_wlcoex_set(bool state);\n#endif //RW_WLAN_COEX\n#endif //(BT_EMB_PRESENT || BLE_EMB_PRESENT)\n\n/**\n ****************************************************************************************\n * @brief Function to implement in platform in order to retrieve expected external\n * interface such as UART for Host Control Interface.\n *\n * @param[in] type external interface type (@see rwip_eif_types)\n *\n * @return External interface api structure\n ****************************************************************************************\n */\nextern const struct rwip_eif_api* rwip_eif_get(uint8_t type);\n\n#if RW_DEBUG\n/**\n ****************************************************************************************\n * @brief Raises an assertion message to the control interface (if present)\n *\n * @param[in] file    File name\n * @param[in] line    Line number\n * @param[in] param0  Parameter 0 (custom value given by the assert instruction)\n * @param[in] param1  Parameter 1 (custom value given by the assert instruction)\n ****************************************************************************************\n */\nvoid rwip_assert_err(const char * file, int line, int param0, int param1);\n#endif //RW_DEBUG\n\n\n/* **************************************************************************************\n * Driver functions\n * **************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieved sampled current time in half slot and next tick time in half us.\n *\n * @note Shall be called within a critical section\n *\n * @return current time sampled (@see rwip_time_t)\n ****************************************************************************************\n */\nrwip_time_t rwip_time_get(void);\n\n\n/**\n ****************************************************************************************\n * @brief Set the a 10 ms target timer\n *\n * @note if target is RWIP_INVALID_TARGET_TIME, not timer are programmed\n *\n * @param[in] target       10ms Timer target value\n ****************************************************************************************\n */\nvoid rwip_timer_10ms_set(uint32_t target);\n\n/**\n ****************************************************************************************\n * @brief Set the a half slot target timer\n *\n * @note if target is RWIP_INVALID_TARGET_TIME, not timer are programmed\n *\n * @param[in] target      Half Slot Timer target value\n ****************************************************************************************\n */\nvoid rwip_timer_hs_set(uint32_t target);\n\n/**\n ****************************************************************************************\n * @brief Gives FW/HW versions of RW-BT stack.\n *\n ****************************************************************************************\n */\n//void rwip_version(uint8_t* fw_version, uint8_t* hw_version);\n\n/**\n ****************************************************************************************\n * @brief Start AES encryption\n *\n * The exchange memory must be filled before calling this function.\n * This function expect to be called from a BLE Module\n *\n * @param[in] key           AES Encryption key must be 16 bytes\n * @param[in] data_em_ptr   Exchange memory data pointer of data to encrypt\n ****************************************************************************************\n */\n//void rwip_aes_encrypt(uint8_t *key, uint16_t data_em_ptr);\n\n/**\n ****************************************************************************************\n * @brief Request a Software interrupt to be triggered\n ****************************************************************************************\n */\n//void rwip_sw_int_req(void);\n\n/**\n ****************************************************************************************\n * @brief Schedule all pending events.\n *\n ****************************************************************************************\n */\n//void rwip_schedule(void);\n\n/**\n ****************************************************************************************\n * @brief Invoke the sleep function.\n *\n * @return  sleep status (@see enum rwip_sleep_state)\n ****************************************************************************************\n */\n//uint8_t rwip_sleep(void);\n\n/**\n ****************************************************************************************\n * @brief Handle the common core interrupts.\n *\n * @param[in] current IRQ status\n ****************************************************************************************\n */\n//void rwip_isr(uint32_t irq_stat);\n\n/**\n ****************************************************************************************\n * @brief Set a bit in the prevent sleep bit field, in order to prevent the system from\n *        going to sleep\n *\n * @param[in] prv_slp_bit   Bit to be set in the prevent sleep bit field\n ****************************************************************************************\n */\n//void rwip_prevent_sleep_set(uint16_t prv_slp_bit);\n\n/**\n ****************************************************************************************\n * @brief Clears a bit in the prevent sleep bit field, in order to allow the system\n *        going to sleep\n *\n * @param[in] prv_slp_bit   Bit to be cleared in the prevent sleep bit field\n ****************************************************************************************\n */\n//void rwip_prevent_sleep_clear(uint16_t prv_slp_bit);\n\n///@} ROOT\n\n#endif // _RWIP_H_\n"
  },
  {
    "path": "services/ble_stack/ble_ip/rwip_config.h",
    "content": "#ifndef RWIP_CONFIG_H_\n#define RWIP_CONFIG_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ROOT\n * @{\n *\n *  Information about RW SW IP options and flags\n *\n *        BT_DUAL_MODE             BT/BLE Dual Mode\n *        BT_STD_MODE              BT Only\n *        BLE_STD_MODE             BLE Only\n *\n *        BT_EMB_PRESENT           BT controller exists\n *        BLE_EMB_PRESENT          BLE controller exists\n *        BLE_HOST_PRESENT         BLE host exists\n *\n * @name RW Stack Configuration\n * @{\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n#include \"besble_debug.h\"\n#include \"cmsis.h\"\n#include \"os_api.h\"\n#include \"rwapp_config.h\" // Audio Mode 0 configuration\n\n// #if (__IAG_BLE_INCLUDE__ == XA_ENABLED)\n\n#ifdef __IAG_BLE_INCLUDE__\n#define _BLE_NVDS_\n#define CFG_BLE\n#define CFG_HOST\n#define CFG_APP\n\n#if defined(BISTO_ENABLED)\n#ifndef CFG_APP_SEC\n#define CFG_APP_SEC\n#endif\n\n#define CFG_SEC_CON\n#endif\n#endif\n\n#define GLOBAL_INT_DISABLE()                                                   \\\n  do {                                                                         \\\n    uint32_t lock = int_lock();\n#define GLOBAL_INT_RESTORE()                                                   \\\n  int_unlock(lock);                                                            \\\n  }                                                                            \\\n  while (0)                                                                    \\\n    ;\n\n/******************************************************************************************/\n/* --------------------------   GENERAL SETUP\n * --------------------------------------*/\n/******************************************************************************************/\n\n/// Flag indicating if stack is compiled in dual or single mode\n#if defined(CFG_BT)\n#define BLE_STD_MODE 0\n#if defined(CFG_BLE)\n#define BT_DUAL_MODE 1\n#define BT_STD_MODE 0\n#else // CFG_BLE\n#define BT_DUAL_MODE 0\n#define BT_STD_MODE 1\n#endif // CFG_BLE\n#elif defined(CFG_BLE)\n#define BT_DUAL_MODE 0\n#define BT_STD_MODE 0\n#define BLE_STD_MODE 1\n#endif // CFG_BT\n\n/******************************************************************************************/\n/* -------------------------   STACK PARTITIONING\n * -----------------------------------*/\n/******************************************************************************************/\n\n#if (BT_DUAL_MODE)\n#define BT_EMB_PRESENT 1\n#define BLE_EMB_PRESENT 1\n#define HCI_PRESENT 1\n#define BLE_HOST_PRESENT 0\n#define BLE_APP_PRESENT 0\n#elif (BT_STD_MODE)\n#define BT_EMB_PRESENT 1\n#define BLE_EMB_PRESENT 0\n#define HCI_PRESENT 1\n#define BLE_HOST_PRESENT 0\n#define BLE_APP_PRESENT 0\n#elif (BLE_STD_MODE)\n#define BT_EMB_PRESENT 0\n#define HCI_PRESENT 1\n#if defined(CFG_EMB)\n#define BLE_EMB_PRESENT 1\n#else\n#define BLE_EMB_PRESENT 0\n#endif // CFG_EMB\n#if defined(CFG_HOST)\n#define BLE_HOST_PRESENT 1\n#else\n#define BLE_HOST_PRESENT 0\n#endif // CFG_HOST\n#if defined(CFG_APP)\n#define BLE_APP_PRESENT 1\n#else\n#define BLE_APP_PRESENT 0\n#endif // CFG_APP\n#endif // BT_DUAL_MODE / BT_STD_MODE / BLE_STD_MODE\n\n#define EA_PRESENT (BT_EMB_PRESENT || BLE_EMB_PRESENT)\n\n/******************************************************************************************/\n/* -------------------------   INTERFACES DEFINITIONS\n * -------------------------------*/\n/******************************************************************************************/\n#define CFG_AHITL\n#define CFG_HCITL\n\n/// Application Host Interface\n#if defined(CFG_AHITL)\n#define AHI_TL_SUPPORT 1\n#else // defined(CFG_AHITL)\n#define AHI_TL_SUPPORT 0\n#endif // defined(CFG_AHITL)\n\n/// Host Controller Interface Support (defines if HCI parser is present or not)\n#if defined(CFG_HCITL)\n#define HCI_TL_SUPPORT 1\n#else // defined(CFG_HCITL)\n#define HCI_TL_SUPPORT 0\n#endif // defined(CFG_HCITL)\n\n#if BLE_HOST_PRESENT\n#if BLE_EMB_PRESENT\n#define H4TL_SUPPORT (AHI_TL_SUPPORT)\n#else                  // !BLE_EMB_PRESENT\n#define H4TL_SUPPORT 0 //((AHI_TL_SUPPORT) + (HCI_TL_SUPPORT))\n#endif                 // BLE_EMB_PRESENT\n#else                  // !BLE_HOST_PRESENT\n#define H4TL_SUPPORT (HCI_TL_SUPPORT)\n#endif // BLE_HOST_PRESENT\n\n/// TCI LMP trace support\n#define TCI_LMP_ENABLED 0\n\n/******************************************************************************************/\n/* --------------------------   BLE COMMON DEFINITIONS\n * ------------------------------*/\n/******************************************************************************************/\n/// Kernel Heap memory sized reserved for allocate dynamically connection\n/// environment\n#define KE_HEAP_MEM_RESERVED (4)\n\n#define CFG_ALLROLES\n\n#if defined(CFG_BLE)\n/// Application role definitions\n#define BLE_BROADCASTER                                                        \\\n  (defined(CFG_BROADCASTER) || defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES))\n#define BLE_OBSERVER                                                           \\\n  (defined(CFG_OBSERVER) || defined(CFG_CENTRAL) || defined(CFG_ALLROLES))\n#define BLE_PERIPHERAL (defined(CFG_PERIPHERAL) || defined(CFG_ALLROLES))\n#define BLE_CENTRAL (defined(CFG_CENTRAL) || defined(CFG_ALLROLES))\n\n#if (!BLE_BROADCASTER) && (!BLE_OBSERVER) && (!BLE_PERIPHERAL) && (!BLE_CENTRAL)\n#error \"No application role defined\"\n#endif /* #if (!BLE_BROADCASTER) && (!BLE_OBSERVER) && (!BLE_PERIPHERAL) &&    \\\n          (!BLE_CENTRAL) */\n\n/// Maximum number of simultaneous BLE activities (scan, connection,\n/// advertising, initiating)\n#define BLE_ACTIVITY_MAX (BLE_CONNECTION_MAX)\n\n/// Maximum number of audio connections\n#if defined(CFG_AUDIO)\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n#define BLE_AUDIO (1)\n#define BLE_AUDIO_CONNECT_MAX (CFG_AUDIO_CON)\n#else\n#define BLE_AUDIO (0)\n#endif /*(BLE_CENTRAL || BLE_PERIPHERAL)*/\n#else\n#define BLE_AUDIO (0)\n#endif /*defined(CFG_AUDIO)*/\n\n/// Max advertising reports before sending the info to the host\n#define BLE_ADV_REPORTS_MAX 1\n\n/// Define Number of AUDIO TX/RX buffers per voice channel\n#if (BLE_AUDIO)\n#if defined(CFG_AUDIO_AOAHI)\n// 3 buffers per connection using audio over AHI TL\n#define BLE_NB_INPUT_BUFF_PER_VC (3)\n#define BLE_NB_OUTPUT_BUFF_PER_VC (3)\n#else // defined(CFG_AUDIO_AOAHI)\n// 2 buffers if a codec is available\n#define BLE_NB_INPUT_BUFF_PER_VC (2)\n#define BLE_NB_OUTPUT_BUFF_PER_VC (2)\n#endif // defined(CFG_AUDIO_AOAHI)\n// add one more buffer for fake reception and fake transmit\n#define BLE_TX_AUDIO_BUFFER_CNT                                                \\\n  ((BLE_AUDIO_CONNECT_MAX * BLE_NB_INPUT_BUFF_PER_VC) + 1)\n#define BLE_RX_AUDIO_BUFFER_CNT                                                \\\n  ((BLE_AUDIO_CONNECT_MAX * BLE_NB_OUTPUT_BUFF_PER_VC) + 1)\n#endif // (BLE_AUDIO)\n\n#define CFG_DEPRECATED_API\n/// Support of Legacy Air Operations\n#if defined(CFG_DEPRECATED_API)\n#define BLE_DEPRECATED_API (1)\n#else // defined(CFG_DEPRECATED_API)\n#define BLE_DEPRECATED_API (0)\n#endif // defined(CFG_DEPRECATED_API)\n#endif // defined(CFG_BLE)\n\n/******************************************************************************************/\n/* --------------------------   DISPLAY SETUP\n * -------------------------------------*/\n/******************************************************************************************/\n\n/// Display controller enable/disable\n#if defined(CFG_DISPLAY)\n#define DISPLAY_SUPPORT 1\n#else\n#define DISPLAY_SUPPORT 0\n#endif // CFG_DISPLAY\n\n/******************************************************************************************/\n/* --------------------------      RTC SETUP\n * -------------------------------------*/\n/******************************************************************************************/\n\n/// RTC enable/disable\n#if defined(CFG_RTC)\n#define RTC_SUPPORT 1\n#else\n#define RTC_SUPPORT 0\n#endif // CFG_DISPLAY\n\n/******************************************************************************************/\n/* --------------------------      PS2 SETUP\n * -------------------------------------*/\n/******************************************************************************************/\n\n/// PS2 enable/disable\n#if defined(CFG_PS2)\n#define PS2_SUPPORT 1\n#else\n#define PS2_SUPPORT 0\n#endif // CFG_PS2\n\n/******************************************************************************************/\n/* --------------------------      TRACER SETUP\n * -------------------------------------*/\n/******************************************************************************************/\n\n/// tracer enable/disable\n#if defined(CFG_TRC_EN)\n#define TRACER_PRESENT 1\n#include \"dbg_trc_config.h\"\n#else\n#define TRACER_PRESENT 0\n#endif // CFG_TRC_EN\n\n/******************************************************************************************/\n/* -------------------------   DEEP SLEEP SETUP\n * -------------------------------------*/\n/******************************************************************************************/\n\n/// Use 32K Hz Clock if set to 1 else 32,768k is used\n#define HZ32000 0\n\n/// Time to wake-up Radio Module (in us)\n#define SLEEP_RM_WAKEUP_DELAY 625\n/// Time for stabilization of the high frequency oscillator following a\n/// sleep-timer expiry (in us)\n#define SLEEP_OSC_NORMAL_WAKEUP_DELAY 5000\n/// Time for stabilization of the high frequency oscillator following an\n/// external wake-up request (in us)\n#define SLEEP_OSC_EXT_WAKEUP_DELAY 5000\n\n/******************************************************************************************/\n/* --------------------------   RADIO SETUP\n * ----------------------------------------*/\n/******************************************************************************************/\n\n/// Power control features\n#define RF_TXPWR 1\n/// Class of device\n#define RF_CLASS1 0\n\n/******************************************************************************************/\n/* -------------------------   SUPPORTED RADIO PHY\n * ------------------------------------*/\n/******************************************************************************************/\n\n#if defined(CFG_RF_ATLAS)\n#define BLE_PHY_1MBPS_SUPPORT 1\n#define BLE_PHY_2MBPS_SUPPORT 1\n#define BLE_PHY_CODED_SUPPORT 0\n#else\n#define BLE_PHY_1MBPS_SUPPORT 1\n#define BLE_PHY_2MBPS_SUPPORT 1\n#define BLE_PHY_CODED_SUPPORT 1\n#endif\n\n/******************************************************************************************/\n/* -------------------------   COEXISTENCE SETUP\n * ------------------------------------*/\n/******************************************************************************************/\n\n/// WLAN Coexistence\n#if defined(CFG_WLAN_COEX)\n#define RW_WLAN_COEX 1\n#define RW_WLAN_COEX_TEST (defined(CFG_WLAN_COEX_TEST))\n#else\n#define RW_WLAN_COEX 0\n#define RW_WLAN_COEX_TEST 0\n#endif // defined(CFG_WLAN_COEX)\n\n/// MWS Coexistence\n#if defined(CFG_MWS_COEX)\n#define RW_MWS_COEX 1\n#define RW_MWS_COEX_TEST (defined(CFG_MWS_COEX_TEST))\n#else\n#define RW_MWS_COEX 0\n#define RW_MWS_COEX_TEST 0\n#endif // defined(CFG_MWS_COEX)\n\n/******************************************************************************************/\n/* -------------------------   DM ARBITRATION SETUP\n * ---------------------------------*/\n/******************************************************************************************/\n\n#if BT_DUAL_MODE\n/**\n * Dual mode arbitration margin (in us)\n *\n * BREDRMARGIN/BLEMARGIN corresponding to a timing value that allows the RF to\n * power-down properly before any other activity. This is radio dependent.\n */\n#define DM_ARB_MARGIN 40\n#endif // BT_DUAL_MODE\n\n/******************************************************************************************/\n/* --------------------   SECURE CONNECTIONS SETUP\n * --------------------------------------*/\n/******************************************************************************************/\n#define SECURE_CONNECTIONS (1)\n#if defined(CFG_ECC_16_BITS_ALGO)\n#define ECC_MULT_ALGO_TYPE (16)\n#else // !defined(CFG_ECC_16_BITS_ALGO)\n#define ECC_MULT_ALGO_TYPE (32)\n#endif // defined(CFG_ECC_16_BITS_ALGO)\n#if defined(CFG_CRYPTO_UT)\n#define CRYPTO_UT (1)\n#else // defined(CFG_CRYPTO_UT)\n#define CRYPTO_UT (0)\n#endif // defined(CFG_CRYPTO_UT)\n\n/******************************************************************************************/\n/* --------------------------   DEBUG SETUP\n * ----------------------------------------*/\n/******************************************************************************************/\n\n/// Flag indicating if debug mode is activated or not\n#if defined(CFG_DBG)\n#define RW_DEBUG ((BLE_EMB_PRESENT) || (BT_EMB_PRESENT) || (BLE_HOST_PRESENT))\n#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n#define RW_SWDIAG 1\n#else\n#define RW_SWDIAG 0\n#endif\n#define KE_PROFILING 1\n#else\n#define RW_DEBUG 0\n#define RW_SWDIAG 0\n#define KE_PROFILING 0\n#endif /* CFG_DBG */\n\n/// Flag indicating if Read/Write memory commands are supported or not\n#if defined(CFG_DBG_MEM)\n#define RW_DEBUG_MEM 1\n#else // CFG_DBG_MEM\n#define RW_DEBUG_MEM 0\n#endif // CFG_DBG_MEM\n\n/// Flag indicating if Flash debug commands are supported or not\n#if defined(CFG_DBG_FLASH)\n#define RW_DEBUG_FLASH 1\n#else // CFG_DBG_FLASH\n#define RW_DEBUG_FLASH 0\n#endif // CFG_DBG_FLASH\n\n/// Flag indicating if CPU stack profiling commands are supported or not\n#if defined(CFG_DBG_STACK_PROF)\n#define RW_DEBUG_STACK_PROF 1\n#else\n#define RW_DEBUG_STACK_PROF 0\n#endif // defined (CFG_DBG_STACK_PROF)\n\n/// Modem back to back setup\n#define MODEM2MODEM 0\n/// Special clock testing\n#define CLK_WRAPPING 0\n\n/******************************************************************************************/\n/* --------------------------      NVDS SETUP\n * --------------------------------------*/\n/******************************************************************************************/\n\n/// Flag indicating if NVDS feature is supported or not\n#if defined(CFG_NVDS)\n#define NVDS_SUPPORT 1\n#else // CFG_DBG_NVDS\n#define NVDS_SUPPORT 0\n#endif // CFG_DBG_NVDS\n\n/******************************************************************************************/\n/* --------------------------      MISC SETUP\n * --------------------------------------*/\n/******************************************************************************************/\n/// Manufacturer: RivieraWaves SAS\n#define RW_COMP_ID 0x0060\n\n/// Bluetooth technologies version\n#define RW_BT40_VERSION (6)\n#define RW_BT41_VERSION (7)\n#define RW_BT42_VERSION (8)\n#define RW_BT50_VERSION (9)\n\n/******************************************************************************************/\n/* -------------------------   BT / BLE / BLE HL CONFIG\n * -------------------------------*/\n/******************************************************************************************/\n\n#if 0\n#if (BT_EMB_PRESENT)\n#include \"rwbt_config.h\" // bt stack configuration\n#endif                   // BT_EMB_PRESENT\n\n#if (BLE_EMB_PRESENT)\n#include \"rwble_config.h\" // ble stack configuration\n#endif                    // BLE_EMB_PRESENT\n#endif\n\n#if (BLE_HOST_PRESENT)\n#include \"rwble_hl_config.h\" // ble Host stack configuration\n#endif                       // BLE_HOST_PRESENT\n\n#if defined(CFG_AUDIO_AM0)\n#include \"rwam0_config.h\" // Audio Mode 0 configuration\n#endif                    // defined(CFG_AUDIO_AM0)\n\n#if defined(CFG_APP)\n// #include \"rwapp_config.h\"     // Audio Mode 0 configuration\n#endif // defined(CFG_APP)\n\n#define BLE_INVALID_CONNECTION_INDEX 0xFF\n\n#define SV_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS 80\n#define SV_HIGH_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS 400\n#define SV_HIGH_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS 20000\n\n#define SV_LOW_SPEED_BLE_CONNECTION_INTERVAL_MIN_IN_MS 400\n#define SV_LOW_SPEED_BLE_CONNECTION_INTERVAL_MAX_IN_MS 1000\n#define SV_LOW_SPEED_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS 20000\n\n/******************************************************************************************/\n/* -------------------------   KERNEL SETUP\n * -------------------------------------*/\n/******************************************************************************************/\n\n/// Event types definition\nenum KE_EVENT_TYPE {\n  KE_EVENT_KE_MESSAGE,\n  KE_EVENT_KE_TIMER,\n#if (TRACER_PRESENT)\n  KE_EVENT_TRC,\n#endif /*(TRACER_PRESENT)*/\n\n#if (AHI_TL_SUPPORT)\n  KE_EVENT_AHI_TX_DONE,\n#endif //(AHI_TL_SUPPORT)\n\n#if (BLE_HOST_PRESENT)\n#if (BLE_L2CC)\n  KE_EVENT_L2CAP_TX,\n#endif //(BLE_L2CC)\n#endif // (BLE_HOST_PRESENT)\n\n  KE_EVENT_MAX,\n};\n\n/// Tasks types definition\nenum KE_TASK_TYPE {\n#if (BLE_APP_PRESENT)\n  TASK_APP,\n#endif // (BLE_APP_PRESENT)\n\n#if (BLE_HOST_PRESENT)\n  TASK_L2CC,  // L2CAP Controller Task\n  TASK_GATTM, // Generic Attribute Profile Manager Task\n  TASK_GATTC, // Generic Attribute Profile Controller Task\n  TASK_GAPM,  // Generic Access Profile Manager, 4\n  TASK_GAPC,  // Generic Access Profile Controller\n\n  // allocate a certain number of profiles task\n  TASK_PRF_MAX = (TASK_GAPC + BLE_NB_PROFILES),\n\n#ifdef BLE_AUDIO_AM0_TASK\n  TASK_AM0, // BLE Audio Mode 0 Task\n#endif      // BLE_AUDIO_AM0_TASK\n#endif      // (BLE_HOST_PRESENT)\n\n#if (AHI_TL_SUPPORT)\n  TASK_AHI,\n#endif // (AHI_TL_SUPPORT)\n\n  /// Maximum number of tasks\n  TASK_MAX = 0xFE,\n\n  TASK_NONE = 0xFF,\n};\n\n/// Kernel memory heaps types.\nenum {\n  /// Memory allocated for environment variables\n  KE_MEM_ENV,\n#if (BLE_HOST_PRESENT)\n  /// Memory allocated for Attribute database\n  KE_MEM_ATT_DB,\n#endif // (BLE_HOST_PRESENT)\n  /// Memory allocated for kernel messages\n  KE_MEM_KE_MSG,\n  /// Non Retention memory block\n  KE_MEM_NON_RETENTION,\n  KE_MEM_BLOCK_MAX,\n};\n\n#if (BT_EMB_PRESENT)\n#define BT_HEAP_MSG_SIZE_ BT_HEAP_MSG_SIZE\n#define BT_HEAP_ENV_SIZE_ BT_HEAP_ENV_SIZE\n#else\n#define BT_HEAP_MSG_SIZE_ 0\n#define BT_HEAP_ENV_SIZE_ 0\n#endif // BT_EMB_PRESENT\n\n#if (BLE_EMB_PRESENT)\n#define BLE_HEAP_MSG_SIZE_ BLE_HEAP_MSG_SIZE\n#define BLE_HEAP_ENV_SIZE_ BLE_HEAP_ENV_SIZE\n#else\n#define BLE_HEAP_MSG_SIZE_ 0\n#define BLE_HEAP_ENV_SIZE_ 0\n#endif // BLE_EMB_PRESENT\n\n#if (BLE_HOST_PRESENT)\n#define BLEHL_HEAP_MSG_SIZE_ BLEHL_HEAP_MSG_SIZE\n#define BLEHL_HEAP_ENV_SIZE_ BLEHL_HEAP_ENV_SIZE\n#define BLEHL_HEAP_DB_SIZE_ BLEHL_HEAP_DB_SIZE\n#else\n#define BLEHL_HEAP_MSG_SIZE_ 0\n#define BLEHL_HEAP_ENV_SIZE_ 0\n#define BLEHL_HEAP_DB_SIZE_ 0\n#endif // BLE_HOST_PRESENT\n\n/// Kernel Message Heap\n#define RWIP_HEAP_MSG_SIZE                                                     \\\n  (BT_HEAP_MSG_SIZE_ + BLE_HEAP_MSG_SIZE_ + BLEHL_HEAP_MSG_SIZE_)\n\n/// Number of link in kernel environment\n#define KE_NB_LINK_IN_HEAP_ENV 4\n\n/// Size of Environment heap\n#define RWIP_HEAP_ENV_SIZE                                                     \\\n  (BT_HEAP_ENV_SIZE_ +                                                         \\\n   (BLE_HEAP_ENV_SIZE_ + BLEHL_HEAP_ENV_SIZE_) * KE_NB_LINK_IN_HEAP_ENV)\n\n/// Size of Attribute database heap\n#define RWIP_HEAP_DB_SIZE (BLEHL_HEAP_DB_SIZE)\n\n/// Size of non retention heap - 512 bytes per ble link plus 4096 bytes for data\n/// throughput should be sufficient and should be tuned\n#if (BLE_EMB_PRESENT || BLE_HOST_PRESENT)\n#define RWIP_HEAP_NON_RET_SIZE ((512 * BLE_CONNECTION_MAX) + 4096)\n#else\n#define RWIP_HEAP_NON_RET_SIZE (1024)\n#endif\n\n/// Minimum sleep time to enter in deep sleep (in half slot).\n#define RWIP_MINIMUM_SLEEP_TIME (1)\n\n/******************************************************************************************/\n/* -------------------------     CONFIGURABLE PARAMETERS\n * -----------------------------*/\n/******************************************************************************************/\n\n/// List of parameters identifiers\nenum PARAM_ID {\n  /// Definition of the tag associated to each parameters\n  /// Local Bd Address\n  PARAM_ID_BD_ADDRESS = 0x01,\n  /// Device Name\n  PARAM_ID_DEVICE_NAME = 0x02,\n  /// Radio Drift\n  PARAM_ID_LPCLK_DRIFT = 0x07,\n  /// Radio Jitter\n  PARAM_ID_LPCLK_JITTER = 0x08,\n  /// Radio Class\n  PARAM_ID_RADIO_CLASS = 0x09,\n  /// Bluejay specific Settings\n  PARAM_ID_BJ_TXCNTL1 = 0x0A,\n  /// External wake-up time\n  PARAM_ID_EXT_WAKEUP_TIME = 0x0D,\n  /// Oscillator wake-up time\n  PARAM_ID_OSC_WAKEUP_TIME = 0x0E,\n  /// Radio wake-up time\n  PARAM_ID_RM_WAKEUP_TIME = 0x0F,\n  /// UART baudrate\n  PARAM_ID_UART_BAUDRATE = 0x10,\n  /// Enable sleep mode\n  PARAM_ID_SLEEP_ENABLE = 0x11,\n  /// Enable External Wakeup\n  PARAM_ID_EXT_WAKEUP_ENABLE = 0x12,\n  /// SP Private Key 192\n  PARAM_ID_SP_PRIVATE_KEY_P192 = 0x13,\n  /// SP Public Key 192\n  PARAM_ID_SP_PUBLIC_KEY_P192 = 0x14,\n  /// Errata adopted check\n  PARAM_ID_ERRATA_ADOPTED = 0x15,\n  /// CQDDR Tags\n  PARAM_ID_BASIC_THRESHOLD = 0x16,\n  PARAM_ID_EDR_THRESHOLD = 0x17,\n  PARAM_ID_BASIC_ALGORITHM = 0x18,\n  PARAM_ID_EDR_ALGORITHM = 0x19,\n  PARAM_ID_BASIC_PACKET_LUT = 0x2A,\n  PARAM_ID_EDR_PACKET_LUT = 0x2B,\n  /// Synchronous links configuration\n  PARAM_ID_SYNC_CONFIG = 0x2C,\n  /// PCM Settings\n  PARAM_ID_PCM_SETTINGS = 0x2D,\n  /// Sleep algorithm duration\n  PARAM_ID_SLEEP_ALGO_DUR = 0x2E,\n\n  /// Diagport configuration\n  PARAM_ID_DIAG_BT_HW = 0x30,\n  PARAM_ID_DIAG_BLE_HW = 0x31,\n  PARAM_ID_DIAG_SW = 0x32,\n  PARAM_ID_DIAG_PLF = 0x34,\n\n  /// RSSI threshold tags\n  PARAM_ID_RSSI_HIGH_THR = 0x3A,\n  PARAM_ID_RSSI_LOW_THR = 0x3B,\n  PARAM_ID_RSSI_INTERF_THR = 0x3C,\n\n  /// BLE Channel Assessment tags\n  PARAM_ID_BLE_CA_TIMER_DUR = 0x40,\n  PARAM_ID_BLE_CRA_TIMER_CNT = 0x41,\n  PARAM_ID_BLE_CA_MIN_THR = 0x42,\n  PARAM_ID_BLE_CA_MAX_THR = 0x43,\n  PARAM_ID_BLE_CA_NOISE_THR = 0x44,\n\n  /// AFH algorithm tags\n  PARAM_ID_AFH_REASS_NBCH = 0x51,\n  PARAM_ID_AFH_WINLGTH = 0x52,\n  PARAM_ID_AFH_RSSIMIN = 0x53,\n  PARAM_ID_AFH_PERTHRESBAD = 0x54,\n  PARAM_ID_AFH_REASS_INT = 0x55,\n  PARAM_ID_AFH_NMIN = 0x56,\n  PARAM_ID_AFH_MAXADAPT = 0x57,\n  PARAM_ID_AFH_THSMIN = 0x58,\n\n  PARAM_ID_BT_LINK_KEY_FIRST = 0x60,\n  PARAM_ID_BT_LINK_KEY_LAST = 0x67,\n\n  PARAM_ID_BLE_LINK_KEY_FIRST = 0x70,\n  PARAM_ID_BLE_LINK_KEY_LAST = 0x7F,\n  /// SC Private Key (Low Energy)\n  PARAM_ID_LE_PRIVATE_KEY_P256 = 0x80,\n  /// SC Public Key (Low Energy)\n  PARAM_ID_LE_PUBLIC_KEY_P256 = 0x81,\n  /// SC Debug: Used Fixed Private Key from NVDS (Low Energy)\n  PARAM_ID_LE_DBG_FIXED_P256_KEY = 0x82,\n  /// SP Private Key (classic BT)\n  PARAM_ID_SP_PRIVATE_KEY_P256 = 0x83,\n  /// SP Public Key (classic BT)\n  PARAM_ID_SP_PUBLIC_KEY_P256 = 0x84,\n\n  /// Application specific\n  PARAM_ID_APP_SPECIFIC_FIRST = 0x90,\n  PARAM_ID_APP_SPECIFIC_LAST = 0xAF,\n};\n\n/// List of parameters lengths\nenum PARAM_LEN {\n  // Definition of length associated to each parameters\n  /// Local Bd Address\n  PARAM_LEN_BD_ADDRESS = 6,\n  /// Device Name\n  PARAM_LEN_DEVICE_NAME = 248,\n  /// Low power clock drift\n  PARAM_LEN_LPCLK_DRIFT = 2,\n  /// Low power clock jitter\n  PARAM_LEN_LPCLK_JITTER = 1,\n  /// Radio Class\n  PARAM_LEN_RADIO_CLASS = 1,\n  /// Bluejay specific Settings\n  PARAM_LEN_BJ_TXCNTL1 = 4,\n\n  /// External wake-up time\n  PARAM_LEN_EXT_WAKEUP_TIME = 2,\n  /// Oscillator wake-up time\n  PARAM_LEN_OSC_WAKEUP_TIME = 2,\n  /// Radio wake-up time\n  PARAM_LEN_RM_WAKEUP_TIME = 2,\n  /// UART baudrate\n  PARAM_LEN_UART_BAUDRATE = 4,\n  /// Enable sleep mode\n  PARAM_LEN_SLEEP_ENABLE = 1,\n  /// Enable External Wakeup\n  PARAM_LEN_EXT_WAKEUP_ENABLE = 1,\n  /// SP Private Key 192\n  PARAM_LEN_SP_PRIVATE_KEY_P192 = 24,\n  /// SP Public Key 192\n  PARAM_LEN_SP_PUBLIC_KEY_P192 = 48,\n  /// Errata adopted check\n  PARAM_LEN_ERRATA_ADOPTED = 1,\n  /// CQDDR Tags\n  PARAM_LEN_BASIC_THRESHOLD = 70,\n  PARAM_LEN_EDR_THRESHOLD = 70,\n  PARAM_LEN_BASIC_ALGORITHM = 21,\n  PARAM_LEN_EDR_ALGORITHM = 21,\n  PARAM_LEN_BASIC_PACKET_LUT = 16,\n  PARAM_LEN_EDR_PACKET_LUT = 16,\n  /// Synchronous links configuration\n  PARAM_LEN_SYNC_CONFIG = 2,\n  /// PCM Settings\n  PARAM_LEN_PCM_SETTINGS = 8,\n  /// Diagport configuration\n  PARAM_LEN_DIAG_BT_HW = 4,\n  PARAM_LEN_DIAG_BLE_HW = 4,\n  PARAM_LEN_DIAG_SW = 4,\n  PARAM_LEN_DIAG_PLF = 4,\n  /// RSSI thresholds\n  PARAM_LEN_RSSI_THR = 1,\n\n  PARAM_LEN_BLE_CA_TIMER_DUR = 2,\n  PARAM_LEN_BLE_CRA_TIMER_CNT = 1,\n  PARAM_LEN_BLE_CA_MIN_THR = 1,\n  PARAM_LEN_BLE_CA_MAX_THR = 1,\n  PARAM_LEN_BLE_CA_NOISE_THR = 1,\n\n  /// AFH algorithm tags\n  PARAM_LEN_AFH_REASS_NBCH = 1,\n  PARAM_LEN_AFH_WINLGTH = 1,\n  PARAM_LEN_AFH_RSSIMIN = 1,\n  PARAM_LEN_AFH_PERTHRESBAD = 1,\n  PARAM_LEN_AFH_REASS_INT = 1,\n  PARAM_LEN_AFH_NMIN = 1,\n  PARAM_LEN_AFH_MAXADAPT = 1,\n  PARAM_LEN_AFH_THSMIN = 1,\n  /// Link keys\n  PARAM_LEN_BT_LINK_KEY = 22,\n  PARAM_LEN_BLE_LINK_KEY = 48,\n\n  /// P256\n  PARAM_LEN_PRIVATE_KEY_P256 = 32,\n  PARAM_LEN_PUBLIC_KEY_P256 = 64,\n  PARAM_LEN_DBG_FIXED_P256_KEY = 1,\n};\n\n/******************************************************************************************/\n/* -------------------------        BT-BLE COEX\n * -----------------------------------*/\n/******************************************************************************************/\n\n/// To let the HW using the default values set in the registers\n#define RW_BLE_PTI_PRIO_AUTO 15\n\n#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n/// Enable and diable definition for the PTI\n/// Enable TX busy signal\n#define RWIP_PTI_TXEN 1\n/// Disable TX busy signal\n#define RWIP_PTI_TXDIS 0\n/// Tx busy position\n#define RWIP_TXBSY_POS 0\n\n/// Enable RX busy signal\n#define RWIP_PTI_RXEN 1\n/// Disable RX busy signal\n#define RWIP_PTI_RXDIS 0\n/// Rx busy position\n#define RWIP_RXBSY_POS 1\n\n/// Enable do not abort TX\n#define RWIP_PTI_DNABORTEN 1\n/// Disable do not abort TX\n#define RWIP_PTI_DNABORTDIS 0\n/// Do not abort busy position\n#define RWIP_DNABORT_POS 2\n\n/// Allows Tx operation in the current frame.\n#define RWIP_MWS_TXEN 0\n/// Prevent from any Tx operation in the current frame.\n#define RWIP_MWS_TXDIS 1\n/// MWS transmit disable position\n#define RWIP_MWSTXDSB_POS 3\n\n/// Allows Rx operation in the current frame.\n#define RWIP_MWS_RXEN 0\n/// Prevent from any Rx operation in the current frame.\n#define RWIP_MWS_RXDIS 1\n/// MWS transmit disable position\n#define RWIP_MWSRXDSB_POS 4\n\n/// Bit masking\n#define RWIP_COEX_BIT_MASK 1\n\n/// Coex configuration index\nenum rwip_coex_config_idx {\n#if (BT_EMB_PRESENT)\n  RWIP_COEX_MSSWITCH_IDX,\n  RWIP_COEX_SNIFFATT_IDX,\n  RWIP_COEX_PAGE_IDX,\n  RWIP_COEX_PSCAN_IDX,\n  RWIP_COEX_INQ_IDX,\n  RWIP_COEX_INQRES_IDX,\n  RWIP_COEX_SCORSVD_IDX,\n  RWIP_COEX_BCAST_IDX,\n  RWIP_COEX_CONNECT_IDX,\n#endif // #if (BT_EMB_PRESENT)\n#if (BLE_EMB_PRESENT)\n  RWIP_COEX_CON_IDX,\n  RWIP_COEX_CON_DATA_IDX,\n  RWIP_COEX_ADV_IDX,\n  RWIP_COEX_SCAN_IDX,\n  RWIP_COEX_INIT_IDX,\n#endif // #if (BLE_EMB_PRESENT)\n  /// Max configuration index\n  RWIP_COEX_CFG_MAX,\n};\n#endif //(BLE_EMB_PRESENT || BT_EMB_PRESENT)\n\n/******************************************************************************************/\n/* -------------------------     BT-BLE PRIORITIES\n * -----------------------------------*/\n/******************************************************************************************/\n#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n/// Priority index definition\nenum rwip_prio_idx {\n#if (BT_EMB_PRESENT)\n  /// ACL event default priority\n  RWIP_PRIO_ACL_DFT_IDX,\n  /// ACL event priority with activity\n  RWIP_PRIO_ACL_ACT_IDX,\n  /// ACL Role Switch event default priority\n  RWIP_PRIO_ACL_RSW_IDX,\n  /// ACL sniff event default priority\n  RWIP_PRIO_ACL_SNIFF_DFT_IDX,\n  /// ACL sniff transition event default priority\n  RWIP_PRIO_ACL_SNIFF_TRANS_IDX,\n#if MAX_NB_SYNC\n  /// SCO event default priority\n  RWIP_PRIO_SCO_DFT_IDX,\n#endif // MAX_NB_SYNC\n  /// Broadcast ACL event default priority\n  RWIP_PRIO_BCST_DFT_IDX,\n  /// Broadcast ACL event with LMP activity priority\n  RWIP_PRIO_BCST_ACT_IDX,\n  /// CSB RX event default priority\n  RWIP_PRIO_CSB_RX_DFT_IDX,\n  /// CSB TX event default priority\n  RWIP_PRIO_CSB_TX_DFT_IDX,\n  /// Inquiry event default priority\n  RWIP_PRIO_INQ_DFT_IDX,\n  /// Inquiry Scan event default priority\n  RWIP_PRIO_ISCAN_DFT_IDX,\n  /// Page event default priority\n  RWIP_PRIO_PAGE_DFT_IDX,\n  /// Page event default priority\n  RWIP_PRIO_PAGE_1ST_PKT_IDX,\n  /// Page first packet event default priority\n  RWIP_PRIO_PCA_DFT_IDX,\n  /// Page scan event default priority\n  RWIP_PRIO_PSCAN_DFT_IDX,\n  /// Page scan event priority increment when canceled\n  RWIP_PRIO_PSCAN_1ST_PKT_IDX,\n  /// Synchronization Scan event default priority\n  RWIP_PRIO_SSCAN_DFT_IDX,\n  /// Synchronization Train event default priority\n  RWIP_PRIO_STRAIN_DFT_IDX,\n#endif // #if (BT_EMB_PRESENT)\n#if (BLE_EMB_PRESENT)\n  /// Default priority for scanning events\n  RWIP_PRIO_SCAN_IDX,\n  /// Default priority for initiating events\n  RWIP_PRIO_INIT_IDX,\n  /// Default priority for master connect events\n  RWIP_PRIO_MCONNECT_IDX,\n  /// Default priority for slave connect events\n  RWIP_PRIO_SCONNECT_IDX,\n  /// Default priority for advertising events\n  RWIP_PRIO_ADV_IDX,\n  /// Default priority for advertising high duty cycle events\n  RWIP_PRIO_ADV_HDC_IDX,\n  /// Default priority for resolvable private addresses renewal event\n  RWIP_PRIO_RPA_RENEW_IDX,\n#endif // #if (BLE_EMB_PRESENT)\n  RWIP_PRIO_IDX_MAX\n};\n/// Default priority value definition\nenum rwip_prio_dft {\n#if (BT_EMB_PRESENT)\n  /// ACL event default priority\n  RWIP_PRIO_ACL_DFT = 5,\n  /// ACL event priority with activity\n  RWIP_PRIO_ACL_ACT = 10,\n  /// ACL Role Switch event default priority\n  RWIP_PRIO_ACL_RSW = 20,\n  /// ACL sniff event default priority\n  RWIP_PRIO_ACL_SNIFF_DFT = 15,\n  /// ACL sniff transition event default priority\n  RWIP_PRIO_ACL_SNIFF_TRANS = 10,\n#if MAX_NB_SYNC\n  /// SCO event default priority\n  RWIP_PRIO_SCO_DFT = 18,\n#endif // MAX_NB_SYNC\n  /// Broadcast ACL event default priority\n  RWIP_PRIO_BCST_DFT = 5,\n  /// Broadcast ACL event with LMP activity priority\n  RWIP_PRIO_BCST_ACT = 10,\n  /// CSB RX event default priority\n  RWIP_PRIO_CSB_RX_DFT = 10,\n  /// CSB TX event default priority\n  RWIP_PRIO_CSB_TX_DFT = 10,\n  /// Inquiry event default priority\n  RWIP_PRIO_INQ_DFT = 5,\n  /// Inquiry Scan event default priority\n  RWIP_PRIO_ISCAN_DFT = 5,\n  /// Page event default priority\n  RWIP_PRIO_PAGE_DFT = 8,\n  /// Page first packet event default priority\n  RWIP_PRIO_PAGE_1ST_PKT = 20,\n  /// PCA event default priority\n  RWIP_PRIO_PCA_DFT = 20,\n  /// Page scan event default priority\n  RWIP_PRIO_PSCAN_DFT = 8,\n  /// Page scan event priority increment when canceled\n  RWIP_PRIO_PSCAN_1ST_PKT = 20,\n  /// Synchronization Scan event default priority\n  RWIP_PRIO_SSCAN_DFT = 10,\n  /// Synchronization Train event default priority\n  RWIP_PRIO_STRAIN_DFT = 10,\n#endif // #if (BT_EMB_PRESENT)\n#if (BLE_EMB_PRESENT)\n  /// Default priority for scanning events\n  RWIP_PRIO_SCAN_DFT = 5,\n  /// Default priority for initiating events\n  RWIP_PRIO_INIT_DFT = 10,\n  /// Default priority for master connect events\n  RWIP_PRIO_MCONNECT_DFT = 15,\n  /// Default priority for slave connect events\n  RWIP_PRIO_SCONNECT_DFT = 15,\n  /// Default priority for advertising events\n  RWIP_PRIO_ADV_DFT = 5,\n  /// Default priority for advertising high duty cycle events\n  RWIP_PRIO_ADV_HDC_DFT = 10,\n  /// Default priority for resolvable private addresses renewal event\n  RWIP_PRIO_RPA_RENEW_DFT = 10,\n#endif // #if (BLE_EMB_PRESENT)\n  /// Max priority\n  RWIP_PRIO_MAX = 31,\n};\n/// Default increment value definition\nenum rwip_incr_dft {\n#if (BT_EMB_PRESENT)\n  /// ACL event default increment\n  RWIP_INCR_ACL_DFT = 1,\n  /// ACL event increment with activity\n  RWIP_INCR_ACL_ACT = 1,\n  /// ACL Role Switch event default increment\n  RWIP_INCR_ACL_RSW = 1,\n  /// ACL sniff event default increment\n  RWIP_INCR_ACL_SNIFF_DFT = 1,\n  /// ACL sniff transition event default increment\n  RWIP_INCR_ACL_SNIFF_TRANS = 1,\n#if MAX_NB_SYNC\n  /// SCO event default increment\n  RWIP_INCR_SCO_DFT = 1,\n#endif // MAX_NB_SYNC\n  /// Broadcast ACL event default increment\n  RWIP_INCR_BCST_DFT = 1,\n  /// Broadcast ACL event with LMP activity increment\n  RWIP_INCR_BCST_ACT = 1,\n  /// CSB RX event default increment\n  RWIP_INCR_CSB_RX_DFT = 1,\n  /// CSB TX event default increment\n  RWIP_INCR_CSB_TX_DFT = 1,\n  /// Inquiry event default increment\n  RWIP_INCR_INQ_DFT = 1,\n  /// Inquiry Scan event default increment\n  RWIP_INCR_ISCAN_DFT = 1,\n  /// Page event default increment\n  RWIP_INCR_PAGE_DFT = 1,\n  /// Page event default increment\n  RWIP_INCR_PAGE_1ST_PKT = 2,\n  /// Page first packet event default increment\n  RWIP_INCR_PCA_DFT = 1,\n  /// Page scan event default increment\n  RWIP_INCR_PSCAN_DFT = 1,\n  /// Page scan event increment increment when canceled\n  RWIP_INCR_PSCAN_1ST_PKT = 1,\n  /// Synchronization Scan event default increment\n  RWIP_INCR_SSCAN_DFT = 1,\n  /// Synchronization Train event default increment\n  RWIP_INCR_STRAIN_DFT = 1,\n#endif // #if (BT_EMB_PRESENT)\n#if (BLE_EMB_PRESENT)\n  /// Default increment for scanning events\n  RWIP_INCR_SCAN_DFT = 1,\n  /// Default increment for initiating events\n  RWIP_INCR_INIT_DFT = 1,\n  /// Default increment for master connect events\n  RWIP_INCR_MCONNECT_DFT = 1,\n  /// Default increment for slave connect events\n  RWIP_INCR_SCONNECT_DFT = 1,\n  /// Default increment for advertising events\n  RWIP_INCR_ADV_DFT = 1,\n  /// Default increment for advertising high duty cycle events\n  RWIP_INCR_ADV_HDC_PRIO_DFT = 1,\n  /// Default increment for resolvable private addresses renewal event\n  RWIP_INCR_RPA_RENEW_DFT = 1,\n#endif // #if (BLE_EMB_PRESENT)\n};\n#endif // #if (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n/// @} BT Stack Configuration\n/// @} ROOT\n\n#endif // RWIP_CONFIG_H_\n"
  },
  {
    "path": "services/ble_stack/ble_ip/rwip_task.h",
    "content": "#ifndef RWIP_TASK_H_\n#define RWIP_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ROOT\n * @{\n *\n *  Information about RW SW TASK\n *\n * @name RW TASK Configuration\n * @{\n ****************************************************************************************\n */\n\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/// Build the first message ID of a task. (in fact a ke_msg_id_t)\n#define TASK_FIRST_MSG(task) ((uint16_t)((task) << 8))\n\n/// Builds the task identifier from the type and the index of that task.\n#define TASK_BUILD(type, index) ((uint16_t)(((index) << 8)|(type)) )\n\n/// Retrieves task type from task id.\n#define TASK_TYPE_GET(ke_task_id) ((uint16_t) & 0xFF)\n\n/// Retrieves task index number from task id.\n#define TASK_IDX_GET(ke_task_id) (((uint16_t) >> 8) & 0xFF)\n\n\n/// Tasks types definition, this value shall be in [0-254] range\nenum TASK_API_ID\n{\n    // Link Layer Tasks\n    TASK_ID_LLM          = 0,\n    TASK_ID_LLC          = 1,\n    TASK_ID_LLD          = 2,\n    TASK_ID_DBG          = 3,\n\n    // BT Controller Tasks\n    TASK_ID_LM           = 4,\n    TASK_ID_LC           = 5,\n    TASK_ID_LB           = 6,\n    TASK_ID_LD           = 7,\n\n    TASK_ID_HCI          = 8,\n    TASK_ID_DISPLAY      = 9,\n\n    // -----------------------------------------------------------------------------------\n    // --------------------- BLE HL TASK API Identifiers ---------------------------------\n    // -----------------------------------------------------------------------------------\n\n    TASK_ID_L2CC         = 10,   // L2CAP Controller Task\n    TASK_ID_GATTM        = 11,   // Generic Attribute Profile Manager Task\n    TASK_ID_GATTC        = 12,   // Generic Attribute Profile Controller Task\n    TASK_ID_GAPM         = 13,   // Generic Access Profile Manager\n    TASK_ID_GAPC         = 14,   // Generic Access Profile Controller\n\n    TASK_ID_APP          = 15,   // Application API\n    TASK_ID_AHI          = 16,   // Application Host Interface\n\n    // -----------------------------------------------------------------------------------\n    // --------------------- BLE Profile TASK API Identifiers ----------------------------\n    // -----------------------------------------------------------------------------------\n    TASK_ID_DISS         = 20,   // Device Information Service Server Task\n    TASK_ID_DISC         = 21,   // Device Information Service Client Task\n\n    TASK_ID_PROXM        = 22,   // Proximity Monitor Task\n    TASK_ID_PROXR        = 23,   // Proximity Reporter Task\n\n    TASK_ID_FINDL        = 24,   // Find Me Locator Task\n    TASK_ID_FINDT        = 25,   // Find Me Target Task\n\n    TASK_ID_HTPC         = 26,   // Health Thermometer Collector Task\n    TASK_ID_HTPT         = 27,   // Health Thermometer Sensor Task\n\n    TASK_ID_BLPS         = 28,   // Blood Pressure Sensor Task\n    TASK_ID_BLPC         = 29,   // Blood Pressure Collector Task\n\n    TASK_ID_HRPS         = 30,   // Heart Rate Sensor Task\n    TASK_ID_HRPC         = 31,   // Heart Rate Collector Task\n\n    TASK_ID_TIPS         = 32,   // Time Server Task\n    TASK_ID_TIPC         = 33,   // Time Client Task\n\n    TASK_ID_SCPPS        = 34,   // Scan Parameter Profile Server Task\n    TASK_ID_SCPPC        = 35,   // Scan Parameter Profile Client Task\n\n    TASK_ID_BASS         = 36,   // Battery Service Server Task\n    TASK_ID_BASC         = 37,   // Battery Service Client Task\n\n    TASK_ID_HOGPD        = 38,   // HID Device Task\n    TASK_ID_HOGPBH       = 39,   // HID Boot Host Task\n    TASK_ID_HOGPRH       = 40,   // HID Report Host Task\n\n    TASK_ID_GLPS         = 41,   // Glucose Profile Sensor Task\n    TASK_ID_GLPC         = 42,   // Glucose Profile Collector Task\n\n    TASK_ID_RSCPS        = 43,   // Running Speed and Cadence Profile Server Task\n    TASK_ID_RSCPC        = 44,   // Running Speed and Cadence Profile Collector Task\n\n    TASK_ID_CSCPS        = 45,   // Cycling Speed and Cadence Profile Server Task\n    TASK_ID_CSCPC        = 46,   // Cycling Speed and Cadence Profile Client Task\n\n    TASK_ID_ANPS         = 47,   // Alert Notification Profile Server Task\n    TASK_ID_ANPC         = 48,   // Alert Notification Profile Client Task\n\n    TASK_ID_PASPS        = 49,   // Phone Alert Status Profile Server Task\n    TASK_ID_PASPC        = 50,   // Phone Alert Status Profile Client Task\n\n    TASK_ID_CPPS         = 51,   // Cycling Power Profile Server Task\n    TASK_ID_CPPC         = 52,   // Cycling Power Profile Client Task\n\n    TASK_ID_LANS         = 53,   // Location and Navigation Profile Server Task\n    TASK_ID_LANC         = 54,   // Location and Navigation Profile Client Task\n\n    TASK_ID_IPSS         = 55,   // Internet Protocol Support Profile Server Task\n    TASK_ID_IPSC         = 56,   // Internet Protocol Support Profile Client Task\n\n    TASK_ID_ENVS         = 57,   // Environmental Sensing Profile Server Task\n    TASK_ID_ENVC         = 58,   // Environmental Sensing Profile Client Task\n\n    TASK_ID_WSCS         = 59,   // Weight Scale Profile Server Task\n    TASK_ID_WSCC         = 60,   // Weight Scale Profile Client Task\n\n    TASK_ID_UDSS         = 61,   // User Data Service Server Task\n    TASK_ID_UDSC         = 62,   // User Data Service Client Task\n\n    TASK_ID_BCSS         = 63,   // Body Composition Server Task\n    TASK_ID_BCSC         = 64,   // Body Composition Client Task\n\n    TASK_ID_GFPSP        = 65,   //google fast pair service provider\n    TASK_ID_GFPSS        = 66,   // seeker \n\n    TASK_ID_VOICEPATH    = 67,   // Voice Path Task\n\n    TASK_ID_OTA          = 68,   // OTA Task\n\n    TASK_ID_ANCC         = 69,   // ANCS Client Task\n\n    TASK_ID_AMSC         = 70,   // AMS Client Task\n\n    TASK_ID_BMS          = 71,   // BMS Task\n\n    TASK_ID_ANCSP        = 72,   // ANCS Proxy Task\n\n    TASK_ID_AMSP         = 73,   // AMS Proxy Task\n\n    TASK_ID_DATAPATHPS   = 74,   // Datapath Server Task\n\n    TASK_ID_AI           = 75,   // ai Task\n\n    TASK_ID_TOTA         = 76,   // TOTA Task\n\n    TASK_ID_TILE         = 77,   // skull tile task\n\n    /* 240 -> 241 reserved for Audio Mode 0 */\n    TASK_ID_AM0          = 240,  // BLE Audio Mode 0 Task\n    TASK_ID_AM0_HAS      = 241,  // BLE Audio Mode 0 Hearing Aid Service Task\n\n    TASK_ID_INVALID      = 0xFF, // Invalid Task Identifier\n};\n\n/// @} BT Stack Configuration\n/// @} ROOT\n\n#endif //RWIP_CONFIG_H_\n"
  },
  {
    "path": "services/ble_stack/ble_ip/rwprf_config.h",
    "content": "#ifndef _RWPRF_CONFIG_H_\n#define _RWPRF_CONFIG_H_\n\n#include \"rwapp_config.h\"\n\n#ifdef GFPS_ENABLED\n#if BLE_APP_GFPS_VER==FAST_PAIR_REV_2_0\n#define CFG_PRF_GFPS_PROVIDER\n#endif\n#endif\n\n#ifdef VOICE_DATAPATH\n#define CFG_VOICEPATH\n#else\n#define CFG_PRF_DATAPATH_SERVER\n#endif\n\n#ifdef __AI_VOICE__\n#define CFG_AI_VOICE\n#endif\n\n#ifdef BES_OTA_BASIC\n#define CFG_OTA\n#endif\n\n#ifdef BLE_TOTA_ENABLED\n#define CFG_TOTA\n#endif\n\n#ifdef TILE_DATAPATH\n#define CFG_TILE\n#endif\n\n#if defined(VOICE_DATAPATH) && defined(BISTO_ENABLED)\n#define CFG_BMS\n#if ANCS_PROXY_ENABLE\n#define CFG_PRF_AMS\n#define CFG_PRF_ANCC\n#endif\n\n#endif\n\n/**\n ****************************************************************************************\n * @addtogroup PRF_CONFIG\n * @ingroup PROFILE\n * @brief Profile configuration\n *\n * @{\n ****************************************************************************************\n */\n\n//ATT DB,Testing and Qualification related flags\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n/// Proximity Profile Monitor Role\n#if defined(CFG_PRF_PXPM)\n#define BLE_PROX_MONITOR        1\n#else\n#define BLE_PROX_MONITOR        0\n#endif // defined(CFG_PRF_PXPM)\n\n/// Proximity Profile Reporter Role\n#if defined(CFG_PRF_PXPR)\n#define BLE_PROX_REPORTER       1\n#else\n#define BLE_PROX_REPORTER       0\n#endif // defined(CFG_PRF_PXPR)\n\n///Find Me Profile Locator role\n#if defined(CFG_PRF_FMPL)\n#define BLE_FINDME_LOCATOR      1\n#else\n#define BLE_FINDME_LOCATOR      0\n#endif // defined(CFG_PRF_FMPL)\n\n///Find Me Profile Target role\n#if defined(CFG_PRF_FMPT)\n#define BLE_FINDME_TARGET       1\n#else\n#define BLE_FINDME_TARGET       0\n#endif // defined(CFG_PRF_FMPT)\n\n///Health Thermometer Profile Collector Role\n#if defined(CFG_PRF_HTPC)\n#define BLE_HT_COLLECTOR        1\n#else\n#define BLE_HT_COLLECTOR        0\n#endif // defined(CFG_PRF_HTPC)\n\n///Health Thermometer Profile Thermometer Role\n#if defined(CFG_PRF_HTPT)\n#define BLE_HT_THERMOM          1\n#else\n#define BLE_HT_THERMOM          0\n#endif // defined(CFG_PRF_HTPT)\n\n///Device Information Service Client Role\n#if defined(CFG_PRF_DISC)\n#define BLE_DIS_CLIENT          1\n#else\n#define BLE_DIS_CLIENT          0\n#endif // defined(CFG_PRF_DISC)\n\n///Device Information Service Server Role\n#if defined(CFG_PRF_DISS)\n#define BLE_DIS_SERVER          1\n#else\n#define BLE_DIS_SERVER          0\n#endif // defined(CFG_PRF_DISS)\n\n///Blood Pressure Profile Collector Role\n#if defined(CFG_PRF_BLPC)\n#define BLE_BP_COLLECTOR        1\n#else\n#define BLE_BP_COLLECTOR        0\n#endif // defined(CFG_PRF_BLPC)\n\n///Blood Pressure Profile Sensor Role\n#if defined(CFG_PRF_BLPS)\n#define BLE_BP_SENSOR           1\n#else\n#define BLE_BP_SENSOR           0\n#endif // defined(CFG_PRF_BLPS)\n\n///Time Profile Client Role\n#if defined(CFG_PRF_TIPC)\n#define BLE_TIP_CLIENT          1\n#else\n#define BLE_TIP_CLIENT          0\n#endif // defined(CFG_PRF_TIPC)\n\n///Time Profile Server Role\n#if defined(CFG_PRF_TIPS)\n#define BLE_TIP_SERVER          1\n#else\n#define BLE_TIP_SERVER          0\n#endif // defined(CFG_PRF_TIPS)\n\n///Heart Rate Profile Collector Role\n#if defined(CFG_PRF_HRPC)\n#define BLE_HR_COLLECTOR        1\n#else\n#define BLE_HR_COLLECTOR        0\n#endif // defined(CFG_PRF_HRPC)\n\n///Heart Rate Profile Sensor Role\n#if defined(CFG_PRF_HRPS)\n#define BLE_HR_SENSOR           1\n#else\n#define BLE_HR_SENSOR           0\n#endif // defined(CFG_PRF_HRPS)\n\n///Scan Parameter Profile Client Role\n#if defined(CFG_PRF_SCPPC)\n#define BLE_SP_CLIENT           1\n#else\n#define BLE_SP_CLIENT           0\n#endif // defined(CFG_PRF_SCPPC)\n\n///Scan Parameter Profile Server Role\n#if defined(CFG_PRF_SCPPS)\n#define BLE_SP_SERVER           1\n#else\n#define BLE_SP_SERVER           0\n#endif // defined(CFG_PRF_SCPPS)\n\n///Battery Service Client Role\n#if defined(CFG_PRF_BASC)\n#define BLE_BATT_CLIENT         1\n#else\n#define BLE_BATT_CLIENT         0\n#endif // defined(CFG_PRF_BASC)\n\n///Battery Service Server Role\n#if defined(CFG_PRF_BASS)\n#define BLE_BATT_SERVER         1\n#else\n#define BLE_BATT_SERVER         0\n#endif // defined(CFG_PRF_BASS)\n\n///HID Device Role\n#if defined(CFG_PRF_HOGPD)\n#define BLE_HID_DEVICE          1\n#else\n#define BLE_HID_DEVICE          0\n#endif // defined(CFG_PRF_HOGPD)\n\n///HID Boot Host Role\n#if defined(CFG_PRF_HOGPBH)\n#define BLE_HID_BOOT_HOST       1\n#else\n#define BLE_HID_BOOT_HOST       0\n#endif // defined(CFG_PRF_HOGPBH)\n\n///HID Report Host Role\n#if defined(CFG_PRF_HOGPRH)\n#define BLE_HID_REPORT_HOST     1\n#else\n#define BLE_HID_REPORT_HOST     0\n#endif // defined(CFG_PRF_HOGPRH)\n\n/// Glucose Profile Collector Role\n#if defined(CFG_PRF_GLPC)\n#define BLE_GL_COLLECTOR        1\n#else\n#define BLE_GL_COLLECTOR        0\n#endif // defined(CFG_PRF_GLPC)\n\n/// Glucose Profile Sensor Role\n#if defined(CFG_PRF_GLPS)\n#define BLE_GL_SENSOR           1\n#else\n#define BLE_GL_SENSOR           0\n#endif // defined(CFG_PRF_GLPS)\n\n/// Running Speed and Cadence Profile Collector Role\n#if defined(CFG_PRF_RSCPC)\n#define BLE_RSC_COLLECTOR       1\n#else\n#define BLE_RSC_COLLECTOR       0\n#endif // defined(CFG_PRF_RSCPC)\n\n/// Running Speed and Cadence Profile Server Role\n#if defined(CFG_PRF_RSCPS)\n#define BLE_RSC_SENSOR          1\n#else\n#define BLE_RSC_SENSOR          0\n#endif // defined(CFG_PRF_RSCPS)\n\n/// Cycling Speed and Cadence Profile Collector Role\n#if defined(CFG_PRF_CSCPC)\n#define BLE_CSC_COLLECTOR       1\n#else\n#define BLE_CSC_COLLECTOR       0\n#endif // defined(CFG_PRF_CSCPC)\n\n/// Cycling Speed and Cadence Profile Server Role\n#if defined(CFG_PRF_CSCPS)\n#define BLE_CSC_SENSOR          1\n#else\n#define BLE_CSC_SENSOR          0\n#endif // defined(CFG_PRF_CSCPS)\n\n/// Cycling Power Profile Collector Role\n#if defined(CFG_PRF_CPPC)\n#define BLE_CP_COLLECTOR        1\n#else\n#define BLE_CP_COLLECTOR        0\n#endif // defined (CFG_PRF_CPPC)\n\n/// Cycling Power Profile Server Role\n#if defined(CFG_PRF_CPPS)\n#define BLE_CP_SENSOR            1\n#else\n#define BLE_CP_SENSOR            0\n#endif // defined (CFG_PRF_CPPS)\n\n/// Location and Navigation Profile Collector Role\n#if defined(CFG_PRF_LANC)\n#define BLE_LN_COLLECTOR        1\n#else\n#define BLE_LN_COLLECTOR        0\n#endif // defined (CFG_PRF_LANC)\n\n/// Location and Navigation Profile Server Role\n#if defined(CFG_PRF_LANS)\n#define BLE_LN_SENSOR            1\n#else\n#define BLE_LN_SENSOR            0\n#endif // defined (CFG_PRF_LANS)\n\n/// Alert Notification Profile Client Role\n#if defined(CFG_PRF_ANPC)\n#define BLE_AN_CLIENT           1\n#else\n#define BLE_AN_CLIENT           0\n#endif // defined(CFG_PRF_ANPC)\n\n/// Alert Notification Profile Server Role\n#if defined(CFG_PRF_ANPS)\n#define BLE_AN_SERVER           1\n#else\n#define BLE_AN_SERVER           0\n#endif // defined(CFG_PRF_ANPS)\n\n/// Phone Alert Status Profile Client Role\n#if defined(CFG_PRF_PASPC)\n#define BLE_PAS_CLIENT          1\n#else\n#define BLE_PAS_CLIENT          0\n#endif // defined(CFG_PRF_PASPC)\n\n/// Phone Alert Status Profile Server Role\n#if defined(CFG_PRF_PASPS)\n#define BLE_PAS_SERVER          1\n#else\n#define BLE_PAS_SERVER          0\n#endif // defined(CFG_PRF_PASPS)\n\n/// Internet Protocol Support Profile Server Role\n#if defined(CFG_PRF_IPSS)\n#define BLE_IPS_SERVER          1\n#else\n#define BLE_IPS_SERVER          0\n#endif // defined(CFG_PRF_IPSS)\n\n/// Internet Protocol Support Profile Client Role\n#if defined(CFG_PRF_IPSC)\n#define BLE_IPS_CLIENT          1\n#else\n#define BLE_IPS_CLIENT          0\n#endif // defined(CFG_PRF_IPSC)\n\n/// Environmental Sensing Profile Server Role\n#if defined(CFG_PRF_ENVS)\n#define BLE_ENV_SERVER          1\n#else\n#define BLE_ENV_SERVER          0\n#endif // defined(CFG_PRF_ENVS)\n\n/// Environmental Sensing Profile Client Role\n#if defined(CFG_PRF_ENVC)\n#define BLE_ENV_CLIENT          1\n#else\n#define BLE_ENV_CLIENT          0\n#endif // defined(CFG_PRF_ENVC)\n\n/// Weight Scale Profile Server Role\n#if defined(CFG_PRF_WSCS)\n#define BLE_WSC_SERVER          1\n#else\n#define BLE_WSC_SERVER          0\n#endif // defined(CFG_PRF_WSCS)\n\n/// Weight Scale Profile Client Role\n#if defined(CFG_PRF_WSCC)\n#define BLE_WSC_CLIENT          1\n#else\n#define BLE_WSC_CLIENT          0\n#endif // defined(CFG_PRF_WSCC)\n\n/// Body Composition Server Role\n#if defined(CFG_PRF_BCSS)\n#define BLE_BCS_SERVER          1\n#else\n#define BLE_BCS_SERVER          0\n#endif // defined(CFG_PRF_BCSS)\n\n/// Body Composition Client Role\n#if defined(CFG_PRF_BCSC)\n#define BLE_BCS_CLIENT          1\n#else\n#define BLE_BCS_CLIENT          0\n#endif // defined(CFG_PRF_BCSC)\n\n/// User Data Service Server Role\n#if defined(CFG_PRF_UDSS)\n#define BLE_UDS_SERVER          1\n#else\n#define BLE_UDS_SERVER          0\n#endif // defined(CFG_PRF_UDSS)\n\n/// User Data Service Client Role\n#if defined(CFG_PRF_UDSC)\n#define BLE_UDS_CLIENT          1\n#else\n#define BLE_UDS_CLIENT          0\n#endif // defined(CFG_PRF_UDSC)\n\n#if defined(CFG_VOICEPATH)\n#define BLE_VOICEPATH\t\t\t1\n#else\n#define BLE_VOICEPATH\t\t\t0\n#endif\t// defined(CFG_VOICEPATH)\n\n#if defined(CFG_TILE)\n#define BLE_TILE\t\t\t1\n#else\n#define BLE_TILE\t\t\t0\n#endif\t// \n\n#if defined(CFG_AI_VOICE)\n#define BLE_AI_VOICE\t\t\t1\n#else\n#define BLE_AI_VOICE\t\t\t0\n#endif\n\n/// Data Path Service Server Role\n#if defined(CFG_PRF_DATAPATH_SERVER)\n#define BLE_DATAPATH_SERVER     1\n#else\n#define BLE_DATAPATH_SERVER     0\n#endif // defined(CFG_PRF_DATAPATH_SERVER)\n\n#if defined(CFG_OTA)\n#define BLE_OTA\t\t\t1\n#else\n#define BLE_OTA\t\t\t0\n#endif\t// defined(CFG_OTA)\n\n#if defined(CFG_TOTA)\n#define BLE_TOTA\t\t\t1\n#else\n#define BLE_TOTA\t\t\t0\n#endif\t// defined(CFG_TOTA)\n\n#if defined(CFG_BMS)\n#define BLE_BMS     1\n#else\n#define BLE_BMS     0\n#endif  // defined(BLE_BMS)\n\n/// ANCS Profile Client Role\n#if defined(CFG_PRF_ANCC)\n#define BLE_ANC_CLIENT           1\n#else\n#define BLE_ANC_CLIENT           0\n#endif // defined(CFG_PRF_ANCC)\n\n/// AMS Profile Client Role\n#if defined(CFG_PRF_AMS)\n#define BLE_AMS_CLIENT           1\n#else\n#define BLE_AMS_CLIENT           0\n#endif // defined(CFG_PRF_AMS)\n#if defined(CFG_PRF_GFPS_PROVIDER)\n#define BLE_GFPS_PROVIDER       1\n#else \n#define BLE_GFPS_PROVIDER       0\n#endif\n\n/// BLE_CLIENT_PRF indicates if at least one client profile is present\n#if (BLE_PROX_MONITOR || BLE_FINDME_LOCATOR || BLE_HT_COLLECTOR || BLE_BP_COLLECTOR \\\n        || BLE_HR_COLLECTOR || BLE_DIS_CLIENT || BLE_TIP_CLIENT || BLE_SP_CLIENT \\\n        || BLE_BATT_CLIENT || BLE_GL_COLLECTOR || BLE_HID_BOOT_HOST || BLE_HID_REPORT_HOST \\\n        || BLE_RSC_COLLECTOR || BLE_CSC_COLLECTOR || BLE_CP_COLLECTOR || BLE_LN_COLLECTOR || BLE_AN_CLIENT \\\n        || BLE_PAS_CLIENT || BLE_IPS_CLIENT || BLE_ENV_CLIENT || BLE_WSC_CLIENT \\\n        || BLE_UDS_CLIENT || BLE_BCS_CLIENT || BLE_VOICEPATH || BLE_DATAPATH_SERVER || BLE_ANC_CLIENT || BLE_BMS || BLE_OTA||BLE_AI_VOICE || BLE_TOTA || BLE_TILE)\n#define BLE_CLIENT_PRF          1\n#else\n#define BLE_CLIENT_PRF          0\n#endif //(BLE_PROX_MONITOR || BLE_FINDME_LOCATOR ...)\n\n/// BLE_SERVER_PRF indicates if at least one server profile is present\n#if (BLE_PROX_REPORTER || BLE_FINDME_TARGET || BLE_HT_THERMOM || BLE_BP_SENSOR \\\n        || BLE_TIP_SERVER || BLE_HR_SENSOR || BLE_DIS_SERVER || BLE_SP_SERVER \\\n        || BLE_BATT_SERVER || BLE_HID_DEVICE || BLE_GL_SENSOR || BLE_RSC_SENSOR  \\\n        || BLE_CSC_SENSOR || BLE_CP_SENSOR || BLE_LN_SENSOR || BLE_AN_SERVER \\\n        || BLE_PAS_SERVER || BLE_IPS_SERVER || BLE_ENV_SERVER || BLE_WSC_SERVER \\\n        || BLE_UDS_SERVER || BLE_BCS_SERVER|| BLE_TOTA)\n#define BLE_SERVER_PRF          1\n#else\n#define BLE_SERVER_PRF          0\n#endif //(BLE_PROX_REPORTER || BLE_FINDME_TARGET ...)\n\n//Force ATT parts depending on profile roles or compile options\n/// Attribute Client\n#if (BLE_CLIENT_PRF)\n#define BLE_ATTC                    1\n#endif //(BLE_CLIENT_PRF)\n\n/// Attribute Server\n#if (BLE_SERVER_PRF)\n#define BLE_ATTS                    1\n#endif //(BLE_SERVER_PRF)\n\n\n#elif (BLE_OBSERVER || BLE_BROADCASTER)\n/// Proximity Profile Monitor Role\n#define BLE_PROX_MONITOR            0\n/// Proximity Profile Reporter Role\n#define BLE_PROX_REPORTER           0\n///Find Me Profile Locator role\n#define BLE_FINDME_LOCATOR          0\n///Find Me Profile Target role\n#define BLE_FINDME_TARGET           0\n///Health Thermometer Profile Collector Role\n#define BLE_HT_COLLECTOR            0\n///Health Thermometer Profile Thermometer Role\n#define BLE_HT_THERMOM              0\n///Blood Pressure Profile Collector Role\n#define BLE_BP_COLLECTOR            0\n///Blood Pressure Profile Sensor Role\n#define BLE_BP_SENSOR               0\n///Heart Rate Profile Collector Role\n#define BLE_HR_COLLECTOR            0\n///Heart Rate Profile Sensor Role\n#define BLE_HR_SENSOR               0\n///Time Profile Client Role\n#define BLE_TIP_CLIENT              0\n///Time Profile Server Role\n#define BLE_TIP_SERVER              0\n/// Device Information Service Client Role\n#define BLE_DIS_CLIENT              0\n/// Device Information Service Server Role\n#define BLE_DIS_SERVER              0\n/// Scan Parameter Profile Client Role\n#define BLE_SP_CLIENT               0\n/// Scan Parameter Profile Server Role\n#define BLE_SP_SERVER               0\n/// Battery Service Client Role\n#define BLE_BATT_CLIENT             0\n/// Battery Service Server Role\n#define BLE_BATT_SERVER             0\n/// HID Device Role\n#define BLE_HID_DEVICE              0\n/// HID Boot Host Role\n#define BLE_HID_BOOT_HOST           0\n/// HID Report Host Role\n#define BLE_HID_REPORT_HOST         0\n/// Glucose Profile Collector Role\n#define BLE_GL_COLLECTOR            0\n/// Glucose Profile Sensor Role\n#define BLE_GL_SENSOR               0\n/// Running Speed and Cadence Collector Role\n#define BLE_RSC_COLLECTOR           0\n/// Running Speed and Cadence Server Role\n#define BLE_RSC_SENSOR              0\n/// Cycling Speed and Cadence Collector Role\n#define BLE_CSC_COLLECTOR           0\n/// Cycling Speed and Cadence Server Role\n#define BLE_CSC_SENSOR              0\n/// Cycling Power Collector Role\n#define BLE_CP_COLLECTOR            0\n/// Cycling Power Server Role\n#define BLE_CP_SENSOR               0\n/// Location and Navigation Collector Role\n#define BLE_LN_COLLECTOR            0\n/// Location and Navigation Server Role\n#define BLE_LN_SENSOR               0\n/// Alert Notification Client Role\n#define BLE_AN_CLIENT               0\n/// Alert Notification Server Role\n#define BLE_AN_SERVER               0\n/// Phone Alert Status Client Role\n#define BLE_PAS_CLIENT              0\n/// Phone Alert Status Server Role\n#define BLE_PAS_SERVER              0\n/// Internet Protocol Support Profile Server Role\n#define BLE_IPS_SERVER              0\n/// Internet Protocol Support Profile Client Role\n#define BLE_IPS_CLIENT              0\n/// Environmental Sensing Profile Server Role\n#define BLE_ENV_SERVER              0\n/// Environmental Sensing Profile Client Role\n#define BLE_ENV_CLIENT              0\n/// Weight Scale Profile Server Role\n#define BLE_WSC_SERVER              0\n/// Weight Scale Profile Client Role\n#define BLE_WSC_CLIENT              0\n/// Body Composition Profile Client Role \n#define BLE_BCS_CLIENT          0\n/// Body Composition Profile Server Role\n#define BLE_BCS_SERVER          0\n/// User Data Service Server Role\n#define BLE_UDS_SERVER              0\n/// User Data Service Client Role\n#define BLE_UDS_CLIENT              0\n\n//Force ATT parts to 0\n/// External database management\n#define BLE_EXT_ATTS_DB             0\n/// Profile Server\n#define BLE_SERVER_PRF              0\n/// Profile Client\n#define BLE_CLIENT_PRF              0\n#endif //(BLE_OBSERVER || BLE_BROADCASTER)\n\n\n/// @} PRF_CONFIG\n\n#endif /* _RWPRF_CONFIG_H_ */\n"
  },
  {
    "path": "services/ble_stack/common/api/co_bt.h",
    "content": "#ifndef CO_BT_H_\n#define CO_BT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup COMMON Common SW Block\n * @ingroup ROOT\n * @brief The Common RW SW Block.\n *\n * The COMMON is the block with Bluetooth definitions and structures shared\n * to all the protocol stack blocks. This also contain software wide error code\n * definitions, mathematical functions, help functions, list and buffer definitions.\n *\n * @{\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @addtogroup CO_BT Common Bluetooth defines\n * @ingroup COMMON\n * @brief Common Bluetooth definitions and structures.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include        // standard boolean definitions\n#include         // standard definitions\n#include         // standard integer definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n#include \"co_bt_defines.h\" // Bluetooth defines\n#include \"co_lmp.h\"        // Bluetooth LMP definitions\n#include \"co_hci.h\"        // Bluetooth HCI definitions\n#include \"co_error.h\"      // Bluetooth error codes definitions\n\n/// @} CO_BT\n#endif // CO_BT_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_bt_defines.h",
    "content": "#ifndef CO_BT_DEFINES_H_\n#define CO_BT_DEFINES_H_\n\n\n/**\n ****************************************************************************************\n * @addtogroup CO_BT_DEFINES Common Bluetooth defines\n * @ingroup CO_BT\n * @brief Common Bluetooth definitions and structures.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/**\n * BD Address format (values in bytes)\n * |      3B        |  1B |    2B    |\n * |      LAP       | UAP |    NAP   |\n */\n#define BD_ADDR_LEN         6\n#define BD_ADDR_LAP_POS     0\n#define BD_ADDR_LAP_LEN     3\n#define BD_ADDR_UAP_POS     BD_ADDR_LAP_LEN\n#define BD_ADDR_UAP_LEN     1\n#define BD_ADDR_NAP_POS     BD_ADDR_UAP_LEN\n#define BD_ADDR_NAP_LEN     2\n\n///Length of fields in Bluetooth messages, in number of bytes\n#define EVT_MASK_LEN        8\n#define DEV_CLASS_LEN       3\n#define ACO_LEN             12\n#define SRES_LEN            0x04\n#define ACCESS_ADDR_LEN     0x04\n#define LE_PASSKEY_LEN      0x04\n#define BD_NAME_SIZE        0xF8 // Was 0x20 for BLE HL\n#define ADV_DATA_LEN        0x1F\n#define EXT_ADV_DATA_MAX_LEN    229 // HCI:7.7.65.13\n#define PER_ADV_DATA_MAX_LEN    248 // HCI:7.7.65.16\n#define BLE_DATA_LEN                    0x1F\n#define BLE_ADV_FLAG_PART_LEN           0x03\n#define BLE_ADV_DATA_WITHOUT_FLAG_LEN   (BLE_DATA_LEN)\n#define BLE_ADV_DATA_WITH_FLAG_LEN      (BLE_DATA_LEN - BLE_ADV_FLAG_PART_LEN)\n#define SCAN_RSP_DATA_LEN               (BLE_DATA_LEN)\n#define CONNECT_REQ_DATA_LEN    0x16\n#define LE_CHNL_MAP_LEN     0x05\n#define CHNL_MAP_LEN        0x0A\n#define KEY_LEN             0x10\n#define PIN_CODE_MIN_LEN    0x01\n#define PIN_CODE_MAX_LEN    0x10\n#define PRIV_KEY_192_LEN    24\n#define PUB_KEY_192_LEN     48\n#define PRIV_KEY_256_LEN    32\n#define PUB_KEY_256_LEN     64\n#define CFM_LEN             0x10\n#define ENC_DATA_LEN        0x10\n#define RAND_VAL_LEN        0x10\n#define RAND_NB_LEN         0x08\n#define LE_FEATS_LEN        0x08\n#define SUPP_CMDS_LEN       0x40\n#define FEATS_LEN           0x08\n#define NAME_VECT_SIZE      14\n#define LMP_FEATS_LEN       0x08\n#define LE_STATES_LEN       0x08\n#define WHITE_LIST_LEN      0x0A\n#define LE_FREQ_LEN         0x28\n#define LE_DATA_FREQ_LEN    0x25\n#define CRC_INIT_LEN        0x03\n#define SESS_KEY_DIV_LEN    0x08\n#define INIT_VECT_LEN       0x04\n#define MIC_LEN             0x04\n#define IV_LEN              0x08\n#define SK_DIV_LEN          0x10\n\n// Session Key Diversifier Master or slave\n#define SKD_M_OFFSET        0x00\n#define SKD_S_OFFSET        0x08\n// Initialization Vector Master or slave\n#define IV_M_OFFSET         0x00\n#define IV_S_OFFSET         0x04\n\n\n// BT 4.2 - Secure Connections\n#define PUBLIC_KEY_P256_LEN 0x20\n#define DHKEY_CHECK_LEN     0x10\n\n#define DH_KEY_LEN          0x20\n\n/// Maximum maskable event code\n#define EVT_MASK_CODE_MAX   EVT_MASK_LEN * 8\n\n/// Advertising and Data Channel Indices (chapter 6.B.1.4.1)\n#define DATA_CHANNEL_MIN    0\n#define DATA_CHANNEL_MAX    36\n#define DATA_CHANNEL_NB     37\n#define ADV_CHANNEL_37      37\n#define ADV_CHANNEL_38      38\n#define ADV_CHANNEL_39      39\n\n/// Minimum number of used channel in the map (chapter 6.B.4.5.8.1)\n#define DATA_CHANNEL_USED_NB_MIN    2\n\n/// Advertising interval (in 625us slot) (chapter 2.E.7.8.5)\n#define ADV_INTERVAL_MIN    0x0020 //(20 ms)\n#define ADV_INTERVAL_MAX    0x4000 //(10.24 sec)\n#define ADV_INTERVAL_DFT    0x0800 //(1.28 sec)\n\n/// Scanning interval (in 625us slot) (chapter 2.E.7.8.10)\n#define SCAN_INTERVAL_MIN   0x0004 //(2.5 ms)\n#define SCAN_INTERVAL_MAX   0x4000 //(10.24 sec)\n#define SCAN_INTERVAL_DFT   0x0010 //(10 ms)\n\n/// Scanning window (in 625us slot) (chapter 2.E.7.8.10)\n#define SCAN_WINDOW_MIN     0x0004 //(2.5 ms)\n#define SCAN_WINDOW_MAX     0x4000 //(10.24 sec)\n#define SCAN_WINDOW_DFT     0x0010 //(10 ms)\n\n/// Connection interval (N*1.250ms) (chapter 2.E.7.8.12)\n#define CON_INTERVAL_MIN    0x0006  //(7.5 msec)\n#define CON_INTERVAL_MAX    0x0C80  //(4 sec)\n/// Connection latency (N*cnx evt) (chapter 2.E.7.8.12)\n#define CON_LATENCY_MIN     0x0000\n#define CON_LATENCY_MAX     0x01F3  // (499)\n/// Supervision TO (N*10ms) (chapter 2.E.7.8.12)\n#define CON_SUP_TO_MIN      0x000A  //(100 msec)\n#define CON_SUP_TO_MAX      0x0C80  //(32 sec)\n\n/// Format of the Advertising packets\n#define ADV_ADDR_OFFSET     0\n#define ADV_ADDR_LEN        BD_ADDR_LEN\n#define ADV_DATA_OFFSET    (ADV_ADDR_OFFSET + ADV_ADDR_LEN)\n\n/// BLE supported features\n//byte 0\n#define BLE_ENC_FEAT                     0x01\n#define BLE_CON_PARAM_REQ_PROC_FEAT      0x02\n#define BLE_REJ_IND_EXT_FEAT             0x04\n#define BLE_SLAVE_INIT_EXCHG_FEAT        0x08\n#define BLE_PING_FEAT                    0x10\n#define BLE_LENGTH_EXT_FEAT              0x20\n#define BLE_LL_PRIVACY_FEAT              0x40\n#define BLE_EXT_SCAN_POLICY_FEAT         0x80\n\n//byte 1\n#define BLE_2M_PHY_FEAT                  0x01\n#define BLE_STABLE_MOD_IDX_TX_FEAT       0x02\n#define BLE_STABLE_MOD_IDX_RX_FEAT       0x04\n#define BLE_CODED_PHY_FEAT               0x08\n#define BLE_EXT_ADV_FEAT                 0x10\n#define BLE_PER_ADV_FEAT                 0x20\n#define BLE_CHAN_SEL_ALGO_2_FEAT         0x40\n#define BLEPWR_CLASS_1_FEAT              0x80\n\n//byte 2\n#define BLE_MIN_NUM_USED_CHAN_PROC          0x01\n\n// List of supported BLE Features\nenum ble_feature\n{\n    BLE_FEAT_ENC                       = (0),\n    BLE_FEAT_CON_PARAM_REQ_PROC        = (1),\n    BLE_FEAT_REJ_IND_EXT               = (2),\n    BLE_FEAT_SLAVE_INIT_EXCHG          = (3),\n    BLE_FEAT_PING                      = (4),\n    BLE_FEAT_LENGTH_EXT                = (5),\n    BLE_FEAT_LL_PRIVACY                = (6),\n    BLE_FEAT_EXT_SCAN_POLICY           = (7),\n    BLE_FEAT_2MBPS                     = (8),\n    BLE_FEAT_STABLE_MOD                = (9),\n};\n\n/// BLE supported states\n//byte 0\n#define BLE_NON_CON_ADV_STATE                       0x01\n#define BLE_DISC_ADV_STATE                          0x02\n#define BLE_CON_ADV_STATE                           0x04\n#define BLE_HDC_DIRECT_ADV_STATE                    0x08\n#define BLE_PASS_SCAN_STATE                         0x10\n#define BLE_ACTIV_SCAN_STATE                        0x20\n#define BLE_INIT_MASTER_STATE                       0x40\n#define BLE_CON_SLAVE_STATE                         0x80\n\n//byte 1\n#define BLE_NON_CON_ADV_PASS_SCAN_STATE             0x01\n#define BLE_DISC_ADV_PASS_SCAN_STATE                0x02\n#define BLE_CON_ADV_PASS_SCAN_STATE                 0x04\n#define BLE_HDC_DIRECT_ADV_PASS_SCAN_STATE          0x08\n#define BLE_NON_CON_ADV_ACTIV_SCAN_STATE            0x10\n#define BLE_DISC_ADV_ACTIV_SCAN_STATE               0x20\n#define BLE_CON_ADV_ACTIV_SCAN_STATE                0x40\n#define BLE_HDC_DIRECT_ADV_ACTIV_SCAN_STATE         0x80\n\n//byte 2\n#define BLE_NON_CON_ADV_INIT_STATE                  0x01\n#define BLE_DISC_ADV_INIT_STATE                     0x02\n#define BLE_NON_CON_ADV_MASTER_STATE                0x04\n#define BLE_DISC_ADV_MASTER_STATE                   0x08\n#define BLE_NON_CON_ADV_SLAVE_STATE                 0x10\n#define BLE_DISC_ADV_SLAVE_STATE                    0x20\n#define BLE_PASS_SCAN_INIT_STATE                    0x40\n#define BLE_ACTIV_SCAN_INIT_STATE                   0x80\n\n//byte 3\n#define BLE_PASS_SCAN_MASTER_STATE                  0x01\n#define BLE_ACTIV_SCAN_MASTER_STATE                 0x02\n#define BLE_PASS_SCAN_SLAVE_STATE                   0x04\n#define BLE_ACTIV_SCAN_SLAVE_STATE                  0x08\n#define BLE_INIT_MASTER_MASTER_STATE                0x10\n#define BLE_LDC_DIRECT_ADV_STATE                    0x20\n#define BLE_LDC_DIRECT_ADV_PASS_SCAN_STATE          0x40\n#define BLE_LDC_DIRECT_ADV_ACTIV_SCAN_STATE         0x80\n\n//byte 4\n#define BLE_CON_ADV_INIT_MASTER_SLAVE_STATE         0x01\n#define BLE_HDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE  0x02\n#define BLE_LDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE  0x04\n#define BLE_CON_ADV_MASTER_SLAVE_STATE              0x08\n#define BLE_HDC_DIRECT_ADV_MASTER_SLAVE_STATE       0x10\n#define BLE_LDC_DIRECT_ADV_MASTER_SLAVE_STATE       0x20\n#define BLE_CON_ADV_SLAVE_SLAVE_STATE               0x40\n#define BLE_HDC_DIRECT_ADV_SLAVE_SLAVE_STATE        0x80\n\n//byte 5\n#define BLE_LDC_DIRECT_ADV_SLAVE_SLAVE_STATE        0x01\n#define BLE_INIT_MASTER_SLAVE_STATE                 0x02\n\n/// BLE supported commands\n//byte0\n#define BLE_DISC_CMD                0x20\n//byte2\n#define BLE_RD_REM_VERS_CMD         0x80\n//byte5\n#define BLE_SET_EVT_MSK_CMD         0x40\n#define BLE_RESET_CMD               0x80\n//byte10\n#define BLE_RD_TX_PWR_CMD            0x04\n#define BLE_SET_CTRL_TO_HL_FCTRL_CMD 0x20\n#define BLE_HL_BUF_SIZE_CMD          0x40\n#define BLE_HL_NB_CMP_PKT_CMD        0x80\n//byte14\n#define BLE_RD_LOC_VERS_CMD         0x08\n#define BLE_RD_LOC_SUP_FEAT_CMD     0x20\n#define BLE_RD_BUF_SIZE_CMD         0x80\n//byte15\n#define BLE_RD_BD_ADDR_CMD          0x02\n#define BLE_RD_RSSI_CMD             0x20\n//byte22\n#define BLE_SET_EVT_MSK_PG2_CMD     0x04\n//byte25\n#define BLE_LE_SET_EVT_MSK_CMD      0x01\n#define BLE_LE_RD_BUF_SIZE_CMD      0x02\n#define BLE_LE_RD_LOC_SUP_FEAT_CMD  0x04\n#define BLE_LE_SET_RAND_ADDR_CMD    0x10\n#define BLE_LE_SET_ADV_PARAM_CMD    0x20\n#define BLE_LE_RD_ADV_TX_PWR_CMD    0x40\n#define BLE_LE_SET_ADV_DATA_CMD     0x80\n//byte26\n#define BLE_LE_SET_SC_RSP_DATA_CMD  0x01\n#define BLE_LE_SET_ADV_EN_CMD       0x02\n#define BLE_LE_SET_SC_PARAM_CMD     0x04\n#define BLE_LE_SET_SC_EN_CMD        0x08\n#define BLE_LE_CREAT_CNX_CMD        0x10\n#define BLE_LE_CREAT_CNX_CNL_CMD    0x20\n#define BLE_LE_RD_WL_SIZE_CMD       0x40\n#define BLE_LE_CLEAR_WL_CMD         0x80\n//byte27\n#define BLE_LE_ADD_DEV_WL_CMD       0x01\n#define BLE_LE_REM_DEV_WL_CMD       0x02\n#define BLE_LE_CNX_UPDATE_CMD       0x04\n#define BLE_LE_SET_HL_CH_CLASS_CMD  0x08\n#define BLE_LE_RD_CH_MAP_CMD        0x10\n#define BLE_LE_RD_REM_FEAT_CMD      0x20\n#define BLE_LE_ENCRYPT_CMD          0x40\n#define BLE_LE_RAND_CMD             0x80\n//byte28\n#define BLE_LE_START_ENC_CMD        0x01\n#define BLE_LE_LTK_REQ_RPLY_CMD     0x02\n#define BLE_LE_LTK_REQ_NEG_RPLY_CMD 0x04\n#define BLE_LE_RD_SUPP_STATES_CMD   0x08\n#define BLE_LE_RX_TEST_CMD          0x10\n#define BLE_LE_TX_TEST_CMD          0x20\n#define BLE_LE_STOP_TEST_CMD        0x40\n\n//byte32\n#define BLE_RD_AUTH_PAYL_TO_CMD     0x10\n#define BLE_WR_AUTH_PAYL_TO_CMD     0x20\n\n\n//byte33\n#define BLE_LE_REM_CON_PARA_REQ_RPLY_CMD        0x10\n#define BLE_LE_REM_CON_PARA_REQ_NEG_RPLY_CMD    0x20\n#define BLE_LE_SET_DATA_LEN_CMD                 0x40\n#define BLE_LE_RD_SUGGTED_DFT_DATA_LEN_CMD      0x80\n\n//byte34\n#define BLE_LE_WR_SUGGTED_DFT_DATA_LEN_CMD      0x01\n#define BLE_LE_RD_LOC_P256_PUB_KEY_CMD          0x02\n#define BLE_LE_GEN_DH_KEY_CMD                   0x04\n#define BLE_LE_ADD_DEV_TO_RESOLV_LIST_CMD       0x08\n#define BLE_LE_REM_DEV_FROM_RESOLV_LIST_CMD     0x10\n#define BLE_LE_CLEAR_RESOLV_LIST_CMD            0x20\n#define BLE_LE_RD_RESOLV_LIST_SIZE_CMD          0x40\n#define BLE_LE_RD_PEER_RESOLV_ADDR_CMD          0x80\n\n//byte35\n#define BLE_LE_RD_LOCAL_RESOLV_ADDR_CMD         0x01\n#define BLE_LE_SET_ADDR_RESOL_CMD               0x02\n#define BLE_LE_SET_RESOLV_PRIV_ADDR_TO_CMD      0x04\n#define BLE_LE_RD_MAX_DATA_LEN_CMD              0x08\n\n// Inquiry Length HCI:7.1.1\n#define INQ_LEN_MIN      0x01\n#define INQ_LEN_MAX      0x30\n\n// Inquiry Length HCI:7.1.3\n#define INQ_MIN_PER_LEN_MIN    0x0002\n#define INQ_MIN_PER_LEN_MAX    0xFFFE\n#define INQ_MAX_PER_LEN_MIN    0x0003\n#define INQ_MAX_PER_LEN_MAX    0xFFFF\n\n// IAC support\n#define NB_IAC_MIN     0x01\n#define NB_IAC_MAX     0x40\n\n\n/// Logical Transport Adresses  BB:4.2\n#define LT_ADDR_BCST            0x00\n#define LT_ADDR_MIN             0x01\n#define LT_ADDR_MAX             0x07\n\n/// Link type             HCI:7.7.3\n#define SCO_TYPE                0\n#define ACL_TYPE                1\n#define ESCO_TYPE               2\n#define UNKNOWN_TYPE            3       // Used in LM\n#define LE_TYPE                 4\n\n\n/// Allow Role Switch     HCI:4.6.8\n#define MASTER_ROLE             0\n#define SLAVE_ROLE              1\n#define UNKNOWN_ROLE            0xFF   //Used in LC to init the links role\n\n/// Link policy HCI:4.6.9 and HCI:4.6.10\n#define POLICY_SWITCH           0x0001\n#define POLICY_HOLD             0x0002\n#define POLICY_SNIFF            0x0004\n#define POLICY_PARK             0x0008\n\n/// Allow Role Switch     HCI:4.5.5\n#define ROLE_SWITCH_NOT_ALLOWED 0\n#define ROLE_SWITCH_ALLOWED     1\n\n/// AcceptConnection Role     HCI:4.5.8\n#define ACCEPT_SWITCH_TO_MASTER 0\n#define ACCEPT_REMAIN_SLAVE     1\n\n/// Packet Type Flags     HCI:7.1.14\n#define PACKET_TYPE_EDR_MSK         0x330E\n#define PACKET_TYPE_GFSK_MSK        0xCCF8\n#define PACKET_TYPE_NO_2_DH1_FLAG   0x0002\n#define PACKET_TYPE_NO_3_DH1_FLAG   0x0004\n#define PACKET_TYPE_DM1_FLAG        0x0008\n#define PACKET_TYPE_DH1_FLAG        0x0010\n#define PACKET_TYPE_HV1_FLAG        0x0020\n#define PACKET_TYPE_HV2_FLAG        0x0040\n#define PACKET_TYPE_HV3_FLAG        0x0080\n#define PACKET_TYPE_NO_2_DH3_FLAG   0x0100\n#define PACKET_TYPE_NO_3_DH3_FLAG   0x0200\n#define PACKET_TYPE_DM3_FLAG        0x0400\n#define PACKET_TYPE_DH3_FLAG        0x0800\n#define PACKET_TYPE_NO_2_DH5_FLAG   0x1000\n#define PACKET_TYPE_NO_3_DH5_FLAG   0x2000\n#define PACKET_TYPE_DM5_FLAG        0x4000\n#define PACKET_TYPE_DH5_FLAG        0x8000\n\n/// Synchronous Packet Types     HCI:7.1.14\n#define SYNC_PACKET_TYPE_HV1_FLAG       0x0001\n#define SYNC_PACKET_TYPE_HV2_FLAG       0x0002\n#define SYNC_PACKET_TYPE_HV3_FLAG       0x0004\n#define SYNC_PACKET_TYPE_EV3_FLAG       0x0008\n#define SYNC_PACKET_TYPE_EV4_FLAG       0x0010\n#define SYNC_PACKET_TYPE_EV5_FLAG       0x0020\n\n#define SYNC_PACKET_TYPE_NO_EV3_2_FLAG  0x0040\n#define SYNC_PACKET_TYPE_NO_EV3_3_FLAG  0x0080\n#define SYNC_PACKET_TYPE_NO_EV5_2_FLAG  0x0100\n#define SYNC_PACKET_TYPE_NO_EV5_3_FLAG  0x0200\n\n#define SYNC_PACKET_TYPE_EV3_2_FLAG     0x0040\n#define SYNC_PACKET_TYPE_EV3_3_FLAG     0x0080\n#define SYNC_PACKET_TYPE_EV5_2_FLAG     0x0100\n#define SYNC_PACKET_TYPE_EV5_3_FLAG     0x0200\n\n/// RWBT 1.2\n#define SYNC_EV3_PACKET_SIZE         30\n#define SYNC_EV4_PACKET_SIZE        120\n#define SYNC_EV5_PACKET_SIZE        180\n\n/// Packet Boundary Flag   HCI:5.4.2\n#define PBF_1ST_NF_HL_FRAG          0x00    // Non-flushable packets\n#define PBF_CONT_HL_FRAG            0x01\n#define PBF_1ST_HL_FRAG             0x02\n#define PBF_CMP_PDU                 0x03\n//#define PBF_MASK                    0x03\n\n/// Broadcast Flag   HCI:5.4.2\n#define BCF_P2P                     0x00\n#define BCF_ACTIVE_SLV_BCST         0x01\n#define BCF_PARK_SLV_BCST           0x02\n#define BCF_MASK                    0x03\n\n/// Synchronous Packet Status Flag   HCI:5.4.3\n#define CORRECTLY_RX_FLAG       0x00\n#define POSSIBLY_INVALID_FLAG   0x01\n#define NO_RX_DATA_FLAG         0x02\n#define PARTIALLY_LOST_FLAG     0x03\n\n/// Park mode defines LMP:3.17\n#define MACCESS_MSK             0x0F\n#define ACCSCHEM_MSK            0xF0\n\n/// Support 3 feature pages\n#define FEATURE_PAGE_MAX   3\n\n#define FEATURE_PAGE_0     0\n#define FEATURE_PAGE_1     1\n#define FEATURE_PAGE_2     2\n\n/// Feature mask definition LMP:3.3\n#define B0_3_SLOT_POS               0\n#define B0_3_SLOT_MSK               0x01\n#define B0_5_SLOT_POS               1\n#define B0_5_SLOT_MSK               0x02\n#define B0_ENC_POS                  2\n#define B0_ENC_MSK                  0x04\n#define B0_SLOT_OFF_POS             3\n#define B0_SLOT_OFF_MSK             0x08\n#define B0_TIMING_ACCU_POS          4\n#define B0_TIMING_ACCU_MSK          0x10\n#define B0_ROLE_SWITCH_POS          5\n#define B0_ROLE_SWITCH_MSK          0x20\n#define B0_HOLD_MODE_POS            6\n#define B0_HOLD_MODE_MSK            0x40\n#define B0_SNIFF_MODE_POS           7\n#define B0_SNIFF_MODE_MSK           0x80\n\n#define B1_PARK_POS                 0\n#define B1_PARK_MSK                 0x01\n#define B1_RSSI_POS                 1\n#define B1_RSSI_MSK                 0x02\n#define B1_CQDDR_POS                2\n#define B1_CQDDR_MSK                0x04\n#define B1_SCO_POS                  3\n#define B1_SCO_MSK                  0x08\n#define B1_HV2_POS                  4\n#define B1_HV2_MSK                  0x10\n#define B1_HV3_POS                  5\n#define B1_HV3_MSK                  0x20\n#define B1_MULAW_POS                6\n#define B1_MULAW_MSK                0x40\n#define B1_ALAW_POS                 7\n#define B1_ALAW_MSK                 0x80\n\n#define B2_CVSD_POS                 0\n#define B2_CVSD_MSK                 0x01\n#define B2_PAGING_PAR_NEGO_POS      1\n#define B2_PAGING_PAR_NEGO_MSK      0x02\n#define B2_PWR_CTRL_POS             2\n#define B2_PWR_CTRL_MSK             0x04\n#define B2_TRANSPARENT_SCO_POS      3\n#define B2_TRANSPARENT_SCO_MSK      0x08\n#define B2_FLOW_CTRL_LAG_POS        4\n#define B2_FLOW_CTRL_LAG_MSK        0x70\n#define B2_BCAST_ENC_POS            7\n#define B2_BCAST_ENC_MSK            0x80\n\n#define B3_EDR_2MBPS_ACL_POS        1\n#define B3_EDR_2MBPS_ACL_MSK        0x02\n#define B3_EDR_3MBPS_ACL_POS        2\n#define B3_EDR_3MBPS_ACL_MSK        0x04\n#define B3_ENH_INQSCAN_POS          3\n#define B3_ENH_INQSCAN_MSK          0x08\n#define B3_INT_INQSCAN_POS          4\n#define B3_INT_INQSCAN_MSK          0x10\n#define B3_INT_PAGESCAN_POS         5\n#define B3_INT_PAGESCAN_MSK         0x20\n#define B3_RSSI_INQ_RES_POS         6\n#define B3_RSSI_INQ_RES_MSK         0x40\n#define B3_ESCO_EV3_POS             7\n#define B3_ESCO_EV3_MSK             0x80\n\n#define B4_EV4_PKT_POS              0\n#define B4_EV4_PKT_MSK              0x01\n#define B4_EV5_PKT_POS              1\n#define B4_EV5_PKT_MSK              0x02\n#define B4_AFH_CAP_SLV_POS          3\n#define B4_AFH_CAP_SLV_MSK          0x08\n#define B4_AFH_CLASS_SLV_POS        4\n#define B4_AFH_CLASS_SLV_MSK        0x10\n#define B4_BR_EDR_NOT_SUPP_POS      5\n#define B4_BR_EDR_NOT_SUPP_MSK      0x20\n#define B4_LE_SUPP_POS              6\n#define B4_LE_SUPP_MSK              0x40\n#define B4_3_SLOT_EDR_ACL_POS       7\n#define B4_3_SLOT_EDR_ACL_MSK       0x80\n\n#define B5_5_SLOT_EDR_ACL_POS       0\n#define B5_5_SLOT_EDR_ACL_MSK       0x01\n#define B5_SSR_POS                  1\n#define B5_SSR_MSK                  0x02\n#define B5_PAUSE_ENC_POS            2\n#define B5_PAUSE_ENC_MSK            0x04\n#define B5_AFH_CAP_MST_POS          3\n#define B5_AFH_CAP_MST_MSK          0x08\n#define B5_AFH_CLASS_MST_POS        4\n#define B5_AFH_CLASS_MST_MSK        0x10\n#define B5_EDR_ESCO_2MBPS_POS       5\n#define B5_EDR_ESCO_2MBPS_MSK       0x20\n#define B5_EDR_ESCO_3MBPS_POS       6\n#define B5_EDR_ESCO_3MBPS_MSK       0x40\n#define B5_3_SLOT_EDR_ESCO_POS      7\n#define B5_3_SLOT_EDR_ESCO_MSK      0x80\n\n#define B6_EIR_POS                  0\n#define B6_EIR_MSK                  0x01\n#define B6_SIM_LE_BREDR_DEV_CAP_POS 1\n#define B6_SIM_LE_BREDR_DEV_CAP_MSK 0x02\n#define B6_SSP_POS                  3\n#define B6_SSP_MSK                  0x08\n#define B6_ENCAPS_PDU_POS           4\n#define B6_ENCAPS_PDU_MSK           0x10\n#define B6_ERR_DATA_REP_POS         5\n#define B6_ERR_DATA_REP_MSK         0x20\n#define B6_NONFLUSH_PBF_POS         6\n#define B6_NONFLUSH_PBF_MSK         0x40\n\n#define B7_LST_CHANGE_EVT_POS       0\n#define B7_LST_CHANGE_EVT_MSK       0x01\n#define B7_INQRES_TXPOW_POS         1\n#define B7_INQRES_TXPOW_MSK         0x02\n#define B7_ENH_PWR_CTRL_POS         2\n#define B7_ENH_PWR_CTRL_MSK         0x04\n#define B7_EXT_FEATS_POS            7\n#define B7_EXT_FEATS_MSK            0x80\n\n/// Extended feature mask definition page 1 LMP:3.3\n#define B0_HOST_SSP_POS             0\n#define B0_HOST_SSP_MSK             0x01\n#define B0_HOST_LE_POS              1\n#define B0_HOST_LE_MSK              0x02\n#define B0_HOST_LE_BR_EDR_POS       2\n#define B0_HOST_LE_BR_EDR_MSK       0x04\n#define B0_HOST_SECURE_CON_POS      3\n#define B0_HOST_SECURE_CON_MSK      0x08\n\n/// Extended feature mask definition page 2 LMP:3.3\n#define B0_CSB_MASTER_POS           0\n#define B0_CSB_MASTER_MSK           0x01\n#define B0_CSB_SLAVE_POS            1\n#define B0_CSB_SLAVE_MSK            0x02\n#define B0_SYNC_TRAIN_POS           2\n#define B0_SYNC_TRAIN_MSK           0x04\n#define B0_SYNC_SCAN_POS            3\n#define B0_SYNC_SCAN_MSK            0x08\n#define B0_INQ_RES_NOTIF_EVT_POS    4\n#define B0_INQ_RES_NOTIF_EVT_MSK    0x10\n#define B0_GEN_INTERL_SCAN_POS      5\n#define B0_GEN_INTERL_SCAN_MSK      0x20\n#define B0_COARSE_CLK_ADJ_POS       6\n#define B0_COARSE_CLK_ADJ_MSK       0x40\n\n#define B1_SEC_CON_CTRL_POS         0\n#define B1_SEC_CON_CTRL_MSK         0x01\n#define B1_PING_POS                 1\n#define B1_PING_MSK                 0x02\n#define B1_TRAIN_NUDGING_POS        3\n#define B1_TRAIN_NUDGING_MSK        0x08\n\n/// Features definitions\n#define FEAT_3_SLOT_BIT_POS           0\n#define FEAT_5_SLOT_BIT_POS           1\n#define FEAT_ENC_BIT_POS              2\n#define FEAT_SLOT_OFFSET_BIT_POS      3\n#define FEAT_TIMING_ACC_BIT_POS       4\n#define FEAT_SWITCH_BIT_POS           5\n#define FEAT_HOLD_BIT_POS             6\n#define FEAT_SNIFF_BIT_POS            7\n\n#define FEAT_PARK_BIT_POS             8\n#define FEAT_RSSI_BIT_POS             9\n#define FEAT_QUALITY_BIT_POS          10\n#define FEAT_SCO_BIT_POS              11\n#define FEAT_HV2_BIT_POS              12\n#define FEAT_HV3_BIT_POS              13\n#define FEAT_ULAW_BIT_POS             14\n#define FEAT_ALAW_BIT_POS             15\n\n#define FEAT_CVSD_BIT_POS             16\n#define FEAT_PAGING_BIT_POS           17\n#define FEAT_POWER_BIT_POS            18\n#define FEAT_TRANSP_SCO_BIT_POS       19\n#define FEAT_BCAST_ENCRYPT_BIT_POS    23\n\n#define FEAT_EDR_2MB_BIT_POS          25\n#define FEAT_EDR_3MB_BIT_POS          26\n#define FEAT_ENH_INQSCAN_BIT_POS      27\n#define FEAT_INT_INQSCAN_BIT_POS      28\n#define FEAT_INT_PAGESCAN_BIT_POS     29\n#define FEAT_RSSI_INQRES_BIT_POS      30\n#define FEAT_EV3_BIT_POS              31\n\n#define FEAT_EV4_BIT_POS              32\n#define FEAT_EV5_BIT_POS              33\n#define FEAT_AFH_CAPABLE_S_BIT_POS    35\n#define FEAT_AFH_CLASS_S_BIT_POS      36\n#define FEAT_BR_EDR_NO_SUPP_BIT_POS   37\n#define FEAT_LE_BIT_POS               38\n#define FEAT_3_SLOT_EDR_BIT_POS       39\n#define FEAT_5_SLOT_EDR_BIT_POS       40\n#define FEAT_SNIFF_SUBRAT_BIT_POS     41\n#define FEAT_PAUSE_ENCRYPT_BIT_POS    42\n#define FEAT_AFH_CAPABLE_M_BIT_POS    43\n#define FEAT_AFH_CLASS_M_BIT_POS      44\n#define FEAT_EDR_ESCO_2MB_BIT_POS     45\n#define FEAT_EDR_ESCO_3MB_BIT_POS     46\n#define FEAT_3_SLOT_EDR_ESCO_BIT_POS  47\n#define FEAT_EIR_BIT_POS              48\n#define FEAT_LE_BR_EDR_BIT_POS        49\n#define FEAT_SSP_BIT_POS              51\n#define FEAT_ENCAP_PDU_BIT_POS        52\n#define FEAT_ERRO_DATA_REP_BIT_POS    53\n#define FEAT_NFLUSH_PBF_BIT_POS       54\n#define FEAT_LSTO_CHG_EVT_BIT_POS     56\n#define FEAT_INQ_TXPWR_BIT_POS        57\n#define FEAT_EPC_BIT_POS              58\n#define FEAT_EXT_FEATS_BIT_POS        63\n#define FEAT_SSP_HOST_BIT_POS         64\n#define FEAT_LE_HOST_BIT_POS          65\n#define FEAT_LE_BR_EDR_HOST_BIT_POS   66\n#define FEAT_SEC_CON_HOST_BIT_POS     67\n\n#define FEAT_CSB_MASTER_BIT_POS        128\n#define FEAT_CSB_SLAVE_BIT_POS         129\n#define FEAT_SYNC_TRAIN_BIT_POS        130\n#define FEAT_SYNC_SCAN_BIT_POS         131\n#define FEAT_INQ_RES_NOTIF_EVT_BIT_POS 132\n#define FEAT_GEN_INTERL_SCAN_BIT_POS   133\n#define FEAT_COARSE_CLK_ADJ_BIT_POS    134\n#define FEAT_SEC_CON_CTRL_BIT_POS      136\n#define FEAT_PING_BIT_POS              137\n#define FEAT_TRAIN_NUDGING_BIT_POS     139\n\n/// Maximum number of feature bits per page (8 bytes x 8 bits)\n#define MAX_FEAT_BITS_PER_PAGE         64\n\n/// Poll interval defines LMP:5.2\n#define POLL_INTERVAL_MIN       0x0006\n#define POLL_INTERVAL_DFT       0x0028\n#define POLL_INTERVAL_MAX       0x1000\n\n/// Power Adjustment Request LMP:5.2\n#define PWR_ADJ_REQ_DEC_1_STEP  0x00\n#define PWR_ADJ_REQ_INC_1_STEP  0x01\n#define PWR_ADJ_REQ_INC_MAX     0x02\n\n/// Power Adjustment Response LMP:5.2\n#define PWR_ADJ_RES_GFSK_POS    0\n#define PWR_ADJ_RES_GFSK_MASK   0x03\n#define PWR_ADJ_RES_DQPSK_POS   2\n#define PWR_ADJ_RES_DQPSK_MASK  0x0C\n#define PWR_ADJ_RES_8DPSK_POS   4\n#define PWR_ADJ_RES_8DPSK_MASK  0x30\n\n#define PWR_ADJ_RES_NOT_SUPP    0x00\n#define PWR_ADJ_RES_CHG_1_STEP  0x01\n#define PWR_ADJ_RES_MAX         0x02\n#define PWR_ADJ_RES_MIN         0x03\n\n/// Nb of Broadcast retransmissions defines\n#define NB_BROADCAST_DFT        0x01\n\n/// Nb of Broadcast CLK_ADJ PDU   Baseband:4.1.14.1\n#define NB_BROADCAST_CLK_ADJ    0x06\n\n/// Min PCA clk_adj_instant (in slots) LMP:4.1.14.1\n#define PCA_INSTANT_MIN         12\n\n/// Piconet Clock Adjustment clk_adj_mode LMP:4.1.14.1\n#define CLK_ADJ_BEFORE_INSTANT   0\n#define CLK_ADJ_AFTER_INSTANT    1\n\n\n/// Different packet types BaseBand:6.7\n/* Packet and buffer sizes. These sizes do not include payload header (except for FHS\n * packet where there is no payload header) since payload header is written or read by\n * the RWBT in a different control structure part (TX/RXPHDR)                          */\n#define FHS_PACKET_SIZE         18\n#define DM1_PACKET_SIZE         17\n#define DH1_PACKET_SIZE         27\n#define DH1_2_PACKET_SIZE       54\n#define DH1_3_PACKET_SIZE       83\n#define DV_ACL_PACKET_SIZE      9\n#define DM3_PACKET_SIZE         121\n#define DH3_PACKET_SIZE         183\n#define DH3_2_PACKET_SIZE       367\n#define DH3_3_PACKET_SIZE       552\n#define DM5_PACKET_SIZE         224\n#define DH5_PACKET_SIZE         339\n#define DH5_2_PACKET_SIZE       679\n#define DH5_3_PACKET_SIZE       1021\n#define AUX1_PACKET_SIZE        29\n\n#define HV1_PACKET_SIZE         10\n#define HV2_PACKET_SIZE         20\n#define HV3_PACKET_SIZE         30\n#define EV3_PACKET_SIZE         30\n#define EV3_2_PACKET_SIZE       60\n#define EV3_3_PACKET_SIZE       90\n#define EV4_PACKET_SIZE        120\n#define EV5_PACKET_SIZE        180\n#define EV5_2_PACKET_SIZE      360\n#define EV5_3_PACKET_SIZE      540\n\n/// SCO Packet coding LMP:5.2\n#define SCO_PACKET_HV1          0x00\n#define SCO_PACKET_HV2          0x01\n#define SCO_PACKET_HV3          0x02\n\n/// eSCO Packet coding LMP:5.2\n#define ESCO_PACKET_NULL        0x00\n#define ESCO_PACKET_EV3         0x07\n#define ESCO_PACKET_EV4         0x0C\n#define ESCO_PACKET_EV5         0x0D\n#define ESCO_PACKET_EV3_2       0x26\n#define ESCO_PACKET_EV3_3       0x37\n#define ESCO_PACKET_EV5_2       0x2C\n#define ESCO_PACKET_EV5_3       0x3D\n\n/// Max number of HV packet BaseBand:4.4.2.1\n#define MAX_NB_HV1              1\n#define MAX_NB_HV2              2\n#define MAX_NB_HV3              3\n\n/// Tsco (ScoInterval) BaseBand:4.4.2.1\n#define TSCO_HV1                2\n#define TSCO_HV2                4\n#define TSCO_HV3                6\n\n/* Inquiry train repetition length , Baseband :Table 10.4\n *      - 256 repetitions if no SCO\n *      - 512 repetitions if 1 SCO\n *      - 768 repetitions if 2 SCO  */\n#define INQ_TRAIN_LENGTH_NO_SCO 256\n#define INQ_TRAIN_LENGTH_1_SCO  512\n#define INQ_TRAIN_LENGTH_2_SCO  768\n\n/* Counter for train length, Npage (N*16 slots) depends on the slave page scan mode and\n * the number of active SCO:\n *    | SR mode |  no SCO  |  one SCO  |  two SCO |\n *    |   R0    |   >=1    |    >=2    |    >=3   |\n *    |   R1    |   >=128  |    >=256  |    >=384 |\n *    |   R2    |   >=256  |    >=512  |    >=768 |   */\n#define PAGE_TRAIN_LENGTH_R0    1\n#define PAGE_TRAIN_LENGTH_R1    128\n#define PAGE_TRAIN_LENGTH_R2    256\n\n/// Synchronisation defines\n#define NORMAL_SYNC_POS     (64 + 4)                // End of Synchro word at bit 68 (64 + 4)\n#define SLOT_SIZE            625                    // A slot is 625 us\n#define HALF_SLOT_SIZE       625                    // A half slot is 312.5 us (in half us)\n\n/// Baseband timeout default value, Baseband timers: 1.1\n#define PAGE_RESP_TO_DEF        8\n#define INQ_RESP_TO_DEF         128\n#define NEW_CONNECTION_TO       32\n\n/// LMP Response Timeout (in sec)\n#define LMP_RSP_TO             30\n/// LLCP Response Timeout (in units of 10 ms)\n#define LLCP_RSP_TO            3000 // 30 secs\n\n/// Athenticated Payload Timeout (in units of 10 ms)\n#define AUTH_PAYL_TO_DFT       0x0BB8  // 30 secs\n#define AUTH_PAYL_TO_MIN       0x0001\n\n/// Voice mute pattern defines\n#define MU_LAW_MUTE             0xFF\n#define ALAW_CVSD_MUTE          0x55\n#define TRANSP_MUTE             0x00\n\n/// Air Mode  LMP:5.2\n#define MU_LAW_MODE             0\n#define A_LAW_MODE              1\n#define CVSD_MODE               2\n#define TRANS_MODE              3\n\n/// eSCO negotiation State LMP:5.2\n#define ESCO_NEGO_INIT              0\n#define ESCO_NEGO_LATEST_POSSIBLE   1\n#define ESCO_NEGO_SLOT_VIOLATION    2\n#define ESCO_NEGO_LAT_VIOLATION     3\n#define ESCO_NEGO_UNSUPPORTED       4\n\n#define SCO_BANDWIDTH               8000\n#define SYNC_BANDWIDTH_DONT_CARE    0xFFFFFFFF\n\n#define SYNC_MIN_LATENCY            0x0004\n#define SYNC_MAX_LATENCY_ESCO_S1    0x0007\n#define SYNC_MAX_LATENCY_ESCO_S2    0x0007\n#define SYNC_MAX_LATENCY_ESCO_S3    0x000A\n#define SYNC_DONT_CARE_LATENCY      0xFFFF\n\n#define SYNC_NO_RE_TX           0x00\n#define SYNC_RE_TX_POWER        0x01\n#define SYNC_RE_TX_QUALITY      0x02\n#define SYNC_RE_TX_DONT_CARE    0xFF\n\n/// Timing Control Flags  LMP:5.2\n#define TIM_CHANGE_FLAG         0x01\n#define INIT2_FLAG              0x02\n#define ACCESS_WIN_FLAG         0x04\n\n/// Packet Type Table defines    LMP:4.1.11\n#define PACKET_TABLE_1MBPS      0x00\n#define PACKET_TABLE_2_3MBPS    0x01\n\n/// Data Rate defines    LMP:5.2\n#define FEC_RATE_MSK            0x01\n#define USE_FEC_RATE            0x00\n#define NO_FEC_RATE             0x01\n#define PREF_PACK_MSK           0x06\n#define NO_PREF_PACK_SIZE       0x00\n#define USE_1_SLOT_PACKET       0x02\n#define USE_3_SLOT_PACKET       0x04\n#define USE_5_SLOT_PACKET       0x06\n#define PREF_EDR_MSK            0x18\n#define USE_DM1_ONLY            0x00\n#define USE_2_MBPS_RATE         0x08\n#define USE_3_MBPS_RATE         0x10\n#define PREF_PACK_EDR_MSK       0x60\n#define USE_1_SLOT_EDR_PKT      0x20\n#define USE_3_SLOT_EDR_PKT      0x40\n#define USE_5_SLOT_EDR_PKT      0x60\n\n/// EIR Data Size HCI:6.24\n#define EIR_DATA_SIZE         240\n\n/// Voice setting HCI:4.7.29 & 4.7.30\n#define INPUT_COD_LIN           0x0000\n#define INPUT_COD_MULAW         0x0100\n#define INPUT_COD_ALAW          0x0200\n#define INPUT_COD_MSK           0x0300\n#define INPUT_COD_OFF           8\n#define INPUT_DATA_1COMP        0x0000\n#define INPUT_DATA_2COMP        0x0040\n#define INPUT_DATA_SMAG         0x0080\n#define INPUT_DATA_UNSIGNED     0x00C0\n#define INPUT_DATAFORM_MSK      0x00C0\n#define INPUT_DATAFORM_OFF      6\n#define INPUT_SAMP_8BIT         0x0000\n#define INPUT_SAMP_16BIT        0x0020\n#define INPUT_SAMPSIZE_MSK      0x0020\n#define INPUT_SAMPSIZE_OFF      5\n#define LIN_PCM_BIT_POS_MSK     0x001C\n#define LIN_PCM_BIT_POS_OFF     2\n#define AIR_COD_CVSD            0x0000\n#define AIR_COD_MULAW           0x0001\n#define AIR_COD_ALAW            0x0002\n#define AIR_COD_TRANS           0x0003\n#define AIR_COD_MSK             0x0003\n#define AIR_COD_OFF             0\n\n/// ScanEnable HCI:6.1\n#define BOTH_SCAN_DISABLE       0\n#define INQUIRY_SCAN_ENABLE     1\n#define PAGE_SCAN_ENABLE        2\n#define BOTH_SCAN_ENABLE        3\n\n/// PageScanInterval HCI:6.8\n#define PAGE_SCAN_INTV_MIN  0x0012\n#define PAGE_SCAN_INTV_MAX  0x1000\n#define PAGE_SCAN_INTV_DFT  0x0800\n\n/// PageScanWindow HCI:6.9\n#define PAGE_SCAN_WIN_MIN    0x0011\n#define PAGE_SCAN_WIN_MAX    0x1000\n#define PAGE_SCAN_WIN_DFT    0x0012\n\n/// InquiryScanInterval HCI:6.2\n#define INQ_SCAN_INTV_MIN  0x0012\n#define INQ_SCAN_INTV_MAX  0x1000\n#define INQ_SCAN_INTV_DFT  0x1000\n\n/// InquiryScanWindow HCI:6.3\n#define INQ_SCAN_WIN_MIN    0x0011\n#define INQ_SCAN_WIN_MAX    0x1000\n#define INQ_SCAN_WIN_DFT    0x0012\n\n/// General/Unlimited Inquiry Access Code (GIAC)\n#define GIAC_LAP_0              0x33\n#define GIAC_LAP_1              0x8B\n#define GIAC_LAP_2              0x9E\n\n/// Limited Dedicated Inquiry Access Code (LIAC)\n#define LIAC_LAP_0              0x00\n#define LIAC_LAP_1              0x8B\n#define LIAC_LAP_2              0x9E\n\n/// Maximum Dedicated Inquiry Access Code (DIAC MAX)\n#define DIAC_MAX_LAP_0          0x3F\n#define DIAC_MAX_LAP_1          0x8B\n#define DIAC_MAX_LAP_2          0x9E\n\n/// PIN Type HCI:6.13\n#define VARIABLE_PIN            0\n#define FIXED_PIN               1\n\n/// ConnectionAcceptTimeout HCI:6.7\n#define CON_ACCEPT_TO_MIN  0x00A0\n#define CON_ACCEPT_TO_MAX  0xB540\n#define CON_ACCEPT_TO_DFT  0x1FA0\n\n/// PageTimeout HCI:6.6\n#define PAGE_TO_MIN        0x0016\n#define PAGE_TO_MAX        0xFFFF\n#define PAGE_TO_DFT        0x2000\n\n/// Clock offset valid flag in clock offset field HCI:7.1.5/7.1.19\n#define CLK_OFFSET_VALID_FLAG_POS    15\n#define CLK_OFFSET_VALID_FLAG_MSK    0x8000\n\n/// AuthenticationEnable HCI:4.7.24\n#define AUTH_DISABLED           0x00        // Default\n#define AUTH_ENABLED            0x01\n\n/// EncryptionMode HCI:4.7.26\n#define ENC_DISABLED            0x00        // Default\n#define ENC_PP_ENABLED          0x01\n#define ENC_PP_BC_ENABLED       0x02\n\n/// AutomaticFlushTimeout HCI:4.7.32\n#define AUTO_FLUSH_TIMEOUT_MAX  0x07FF\n#define AUTO_FLUSH_TIMEOUT_OFF  0x0000\n#define AUTO_FLUSH_TIMEOUT_DFT  AUTO_FLUSH_TIMEOUT_OFF      // Default (no automatic flush timeout)\n\n/// Link Supervision Time Out (in slots) HCI:6.21\n#define LSTO_OFF      0x0000\n#define LSTO_MIN      0x0001\n#define LSTO_DFT      0x7D00      // Default is 20 s\n#define LSTO_MAX      0xFFFF\n\n/// PageScanRepetitionMode HCI:4.5.5\n#define R0                      0x00\n#define R1                      0x01\n#define R2                      0x02\n#define PAGESCAN_REP_DEF        R1          // Default\n\n/// PageScanPeriodMode HCI:4.7.49\n#define P0                      0x00        // Default\n#define P1                      0x01\n#define P2                      0x02\n\n/// PageScanMode HCI:4.7.51\n#define MANDATORY_PAGE_SCAN_MODE 0x00       // Default\n\n#define OPT_PAGE_SCAN_MODE_1    0x01\n#define OPT_PAGE_SCAN_MODE_2    0x02\n#define OPT_PAGE_SCAN_MODE_3    0x03\n\n/// Encryption Enable HCI:4.5.17\n#define ENCRYPTION_OFF          0x00\n#define ENCRYPTION_ON           0x01\n\n/// Country Code HCI:4.8.4\n#define NORTH_AMERICA_EUROPE    0x00\n#define FRANCE                  0x01\n#define SPAIN                   0x02\n#define JAPAN                   0x03\n\n/// Loopback mode HCI:7.6.2\n#define NO_LOOPBACK             0x00        // Default\n#define LOCAL_LOOPBACK          0x01\n#define REMOTE_LOOPBACK         0x02\n\n/// Erroneous Data Reporting HCI:7.3.65\n#define ERR_DATA_REP_DIS        0x00        // Default\n#define ERR_DATA_REP_EN         0x01\n\n/// LM modes HCI:5.2.20\n#define LM_ACTIVE_MODE          0x00\n#define LM_HOLD_MODE            0x01\n#define LM_SNIFF_MODE           0x02\n#define LM_PARK_MODE            0x03\n\n/// Key Type HCI:5.2.24\n#define COMB_KEY                0\n//#define LOCAL_UNIT_KEY          1\n//#define REMOTE_UNIT_KEY         2\n#define DEBUG_COMB_KEY          3\n#define UNAUTH_COMB_KEY_192     4\n#define AUTH_COMB_KEY_192       5\n#define CHANGED_COMB_KEY        6\n#define UNAUTH_COMB_KEY_256     7\n#define AUTH_COMB_KEY_256       8\n\n/// Key Flag HCI:5.4.18\n#define SEMI_PERMANENT_KEY      0x00\n#define TEMPORARY_KEY           0x01\n\n/// QOS Service Type HCI:4.6.6\n#define QOS_NO_TRAFFIC          0x00\n#define QOS_BEST_EFFORT         0x01\n#define QOS_GUARANTEED          0x02\n#define QOS_NOTSPECIFIED        0xFF\n\n#define QOS_WILD_CARD           0xFFFFFFFF\n\n/// RSSI golden range\n#define RSSI_GOLDEN_RG        0x00\n\n/// Inquiry TX power level (in dBm) HCI:7.3.62\n#define INQ_TX_PWR_DBM_MIN    -70\n#define INQ_TX_PWR_DBM_DFT    0\n#define INQ_TX_PWR_DBM_MAX    +20\n\n/// Bluetooth Test Mode defines    Bluetooth Test Mode: Table 3.2\n\n#define PAUSE_MODE              0x00\n#define TXTEST0_MODE            0x01\n#define TXTEST1_MODE            0x02\n#define TXTEST10_MODE           0x03\n#define PRAND_MODE              0x04\n#define ACLLOOP_MODE            0x05\n#define SCOLOOP_MODE            0x06\n#define ACLNOWHIT_MODE          0x07\n#define SCONOWHIT_MODE          0x08\n#define TXTEST1100_MODE         0x09\n#define EXITTEST_MODE           0xFF\n\n#define HOPSINGLE               0x00\n#define HOPUSA                  0x01\n\n#define FIXTXPOW                0x00\n#define ADAPTTXPOW              0x01\n\n/// Packet type parameter bit field of LMP_test_control\n#define LMP_TEST_CTRL_PKT_TYPE_CODE_POS  0\n#define LMP_TEST_CTRL_PKT_TYPE_CODE_MSK  0x0F\n#define LMP_TEST_CTRL_PKT_TYPE_LINK_POS  4\n#define LMP_TEST_CTRL_PKT_TYPE_LINK_MSK  0xF0\n#define TEST_ACLSCO   0\n#define TEST_ESCO     1\n#define TEST_EDRACL   2\n#define TEST_EDRESCO  3\n\n/// LMP_encapsulated_header parameters LMP:5.3\n#define LMP_ENCAPS_P192_MAJ_TYPE      1\n#define LMP_ENCAPS_P192_MIN_TYPE      1\n#define LMP_ENCAPS_P192_PAYL_LEN      48\n#define LMP_ENCAPS_P192_PAYL_NB       3\n#define LMP_ENCAPS_P256_MAJ_TYPE      1\n#define LMP_ENCAPS_P256_MIN_TYPE      2\n#define LMP_ENCAPS_P256_PAYL_LEN      64\n#define LMP_ENCAPS_P256_PAYL_NB       4\n\n/// Number of bits in the passkey code used during Secure Simple Pairing\n#define SSP_PASSKEY_NB_BITS           20\n\n// Event Filter HCI 4.7.3\n\n/// Filter type\n#define CLEAR_ALL_FILTER_TYPE   0x00\n#define INQUIRY_FILTER_TYPE     0x01\n#define CONNECTION_FILTER_TYPE  0x02\n\n/// Filter size\n#define CLEAR_ALL_FILTER_SIZE   0\n\n/// Inquiry & Connection Setup Filter Condition Type\n#define ALL_FILTER_CONDITION_TYPE       0x00\n#define CLASS_FILTER_CONDITION_TYPE     0x01\n#define BD_ADDR_FILTER_CONDITION_TYPE   0x02\n\n/// Auto Accept Flag\n#define DO_NOT_AUTO_ACCEPT_CONNECTION   0x01\n#define ACCEPT_CONNECTION_SLAVE         0x02\n#define ACCEPT_CONNECTION_MASTER        0x03\n\n/// Event Mask HCI 4.7.1\n#define NO_EVENTS_SPECIFIED_FILTER                            0x00000000\n#define INQUIRY_COMPLETE_EVENT_FILTER                         0x00000001\n#define INQUIRY_RESULT_EVENT_FILTER                           0x00000002\n#define CONNECTION_COMPLETE_EVENT_FILTER                      0x00000004\n#define CONNECTION_REQUEST_EVENT_FILTER                       0x00000008\n#define DISCONNECTION_COMPLETE_EVENT_FILTER                   0x00000010\n#define AUTHENTICATION_COMPLETE_EVENT_FILTER                  0x00000020\n#define REMOTE_NAME_REQUEST_COMPLETE_EVENT_FILTER             0x00000040\n#define ENCRYPTION_CHANGE_EVENT_FILTER                        0x00000080\n#define CHANGE_CONNECTION_LINK_KEY_COMPLETE_EVENT_FILTER      0x00000100\n#define MASTER_LINK_KEY_COMPLETE_EVENT_FILTER                 0x00000200\n#define READ_REMOTE_SUPPORTED_FEATURES_COMPLETE_EVENT_FILTER  0x00000400\n#define READ_REMOTE_VERSION_INFORMATION_COMPLETE_EVENT_FILTER 0x00000800\n#define QOS_SETUP_COMPLETE_EVENT_FILTER                       0x00001000\n#define COMMAND_COMPLETE_EVENT_FILTER                         0x00002000   // Unchecked */\n#define COMMAND_STATUS_EVENT_FILTER                           0x00004000   // Unchecked */\n#define HARDWARE_ERROR_EVENT_FILTER                           0x00008000\n#define FLUSH_OCCURRED_EVENT_FILTER                           0x00010000\n#define ROLE_CHANGE_EVENT_FILTER                              0x00020000\n#define NUMBER_OF_COMPLETED_PACKETS_EVENT_FILTER              0x00040000   // Unchecked */\n#define MODE_CHANGE_EVENT_FILTER                              0x00080000\n#define RETURN_LINK_KEYS_EVENT_FILTER                         0x00100000\n#define PIN_CODE_REQUEST_EVENT_FILTER                         0x00200000\n#define LINK_KEY_REQUEST_EVENT_FILTER                         0x00400000\n#define LINK_KEY_NOTIFICATION_EVENT_FILTER                    0x00800000\n#define LOOPBACK_COMMAND_EVENT_FILTER                         0x01000000   // Not implemented */\n#define DATA_BUFFER_OVERFLOW_EVENT_FILTER                     0x02000000\n#define MAX_SLOTS_CHANGE_EVENT_FILTER                         0x04000000\n#define READ_CLOCK_OFFSET_COMPLETE_EVENT_FILTER               0x08000000\n#define CONNECTION_PACKET_TYPE_CHANGED_EVENT_FILTER           0x10000000\n#define QOS_VIOLATION_EVENT_FILTER                            0x20000000\n#define PAGE_SCAN_MODE_CHANGE_EVENT_FILTER                    0x40000000   // Deprecated */\n#define PAGE_SCAN_REPETITION_MODE_CHANGE_EVENT_FILTER         0x80000000\n\n#define FLOW_SPECIFICATION_COMPLETE_EVENT_FILTER                0x00000001\n#define INQUIRY_RESULT_WITH_RSSI_EVENT_FILTER                   0x00000002\n#define READ_REMOTE_EXTENDED_FEATURES_COMPLETE_EVENT_FILTER     0x00000004\n#define SYNCHRONOUS_CONNECTION_COMPLETE_EVENT_FILTER            0x00000800\n#define SYNCHRONOUS_CONNECTION_CHANGE_EVENT_FILTER              0x00001000\n#define SNIFF_SUBRATING_EVENT_FILTER                            0x00002000\n#define EXTENDED_INQUIRY_RESULT_EVENT_FILTER                    0x00004000\n#define ENCRYPTION_KEY_REFRESH_COMPLETE_EVENT_FILTER            0x00008000\n#define IO_CAPABILITY_REQUEST_EVENT_FILTER                      0x00010000\n#define IO_CAPABILITY_REQUEST_REPLY_EVENT_FILTER                0x00020000\n#define USER_CONFIRMATION_REQUEST_EVENT_FILTER                  0x00040000\n#define USER_PASSKEY_REQUEST_EVENT_FILTER                       0x00080000\n#define REMOTE_OOB_DATA_REQUEST_EVENT_FILTER                    0x00100000\n#define SIMPLE_PAIRING_COMPLETE_EVENT_FILTER                    0x00200000\n#define LINK_SUPERVISION_TIMEOUT_CHANGE_EVENT_FILTER            0x00800000\n#define ENHANCED_FLUSH_COMPLETE_EVENT_FILTER                    0x01000000\n#define USER_PASSKEY_NOTIFICATION_EVENT_FILTER                  0x04000000\n#define KEYPRESS_NOTIFICATION_EVENT_FILTER                      0x08000000\n#define REM_HOST_SUPPORTED_FEATURES_NOTIFICATION_EVENT_FILTER   0x10000000\n\n/// HostControllerToHostFlowControl (ACL) HCI 7.3.40\n#define FLOW_CONTROL_OFF                0x00\n#define FLOW_CONTROL_ACL                0x01\n#define FLOW_CONTROL_SCO                0x02\n#define FLOW_CONTROL_ACL_SCO            0x03\n\n/// SynchroinousFlowControlEnable (SCO) HCI 7.3.39\n#define SYNC_FLOW_CONTROL_OFF           0x00\n#define SYNC_FLOW_CONTROL_ON            0x01\n\n/// Tx Power HCI:4.7.37\n#define CURRENT_TX_POWER                0x00\n#define MAX_TX_POWER                    0x01\n\n/// Flow_direction HCI:7.2.13\n#define FLOW_DIR_OUT                0x00\n#define FLOW_DIR_IN                 0x01\n\n/// Drift and Jitter default value LMP 5.2\n#define DRIFT_BLE_DFT                   500\n#define DRIFT_BT_DFT                    250\n#define JITTER_DFT                      10\n#define DRIFT_BT_ACTIVE_MAX             20 // BB:2.2.5\n\n/// Read Stored Link Key HCI:4.7.8\n#define LINK_KEY_BD_ADDR                0x00\n#define LINK_KEY_ALL                    0x01\n\n/// Read/Write Hold Mode Activity HCI:4.7.35 and 4.7.36\n#define HOLD_MODE_ACTIV_DEFAULT                 0x00\n#define HOLD_MODE_ACTIV_SUSP_PAGE_SCAN          0x01\n#define HOLD_MODE_ACTIV_SUSP_INQUIRY_SCAN       0x02\n#define HOLD_MODE_ACTIV_SUSP_PERIODIC_INQ       0x04\n#define HOLD_MODE_ACTIV_NOT_MASK                0xF8\n\n/// AFH Mode\n#define AFH_DISABLED                  0x00\n#define AFH_ENABLED                   0x01\n\n/// AFH Reporting Mode\n#define AFH_REPORTING_DISABLED        0x00\n#define AFH_REPORTING_ENABLED         0x01\n\n/// AFH channel assessment Mode\n#define AFH_CH_ASS_DISABLED           0x00\n#define AFH_CH_ASS_ENABLED            0x01\n\n/// AFH MIn/Max interval, in BT slots (1s - 30s)\n#define AFH_REPORT_INTERVAL_MIN       0x0640\n#define AFH_REPORT_INTERVAL_MAX       0xBB80\n\n/// Channel classification values for frequency pairs\n#define AFH_CH_CLASS_UNKNOWN          0x0\n#define AFH_CH_CLASS_GOOD             0x1\n#define AFH_CH_CLASS_RESERVED         0x2\n#define AFH_CH_CLASS_BAD              0x3\n\n/// Maximum number of frequencies used in adapted channel hopping sequence\n#define AFH_NB_CHANNEL_MIN            20\n#define AFH_NB_CHANNEL_MAX            79\n\n/// Maximum number of frequencies used in synchronization train BB:2.6.4.8\n#define SYNC_TRAIN_CHANNEL_NB         3\n/// Indices of frequencies used in synchronization train\n#define SYNC_TRAIN_CHANNEL_0          0\n#define SYNC_TRAIN_CHANNEL_1          24\n#define SYNC_TRAIN_CHANNEL_2          78\n\n/// Maximum delay in synchronization train (in slots) BB:2.7.2\n#define SYNC_TRAIN_DELAY_MAX_DFT      16\n/// Maximum delay in synchronization train for Coarse clock adjustment (in slots) BB:2.7.2\n#define SYNC_TRAIN_DELAY_MAX_CLK_ADJ  4\n/// Synchronization train interval for Coarse clock adjustment (in slots) BB:2.7.2\n#define SYNC_TRAIN_INTV_CLK_ADJ       32\n\n/// Future CSB instant value offset for Coarse clock adjustment (in slots) BB: 8.11.2\n#define SYNC_TRAIN_CSB_INSTANT_OFFSET_CLK_ADJ  1600 \n\n/// Minimum value for synchronization train interval (in slots) HCI:7.3.90\n#define SYNC_TRAIN_INTV_MIN           0x20\n/// Minimum value for synchronization train timeout (in slots) HCI:7.3.90\n#define SYNC_TRAIN_TO_MIN             0x00000002\n/// Maximum value for synchronization train timeout (in slots) HCI:7.3.90\n#define SYNC_TRAIN_TO_MAX             0x07FFFFFE\n\n/// Default value for synchronization train interval (in slots) HCI:6.36\n#define SYNC_TRAIN_INTV_DEFAULT       0x80\n/// Default value for synchronization train timeout (in slots) HCI:6.37\n#define SYNC_TRAIN_TO_DEFAULT         0x0002EE00\n/// Default value for synchronization train service data HCI:6.39\n#define SYNC_TRAIN_SVC_DATA_DEFAULT   0x00\n\n/// Minimum value for synchronization scan timeout (in slots) HCI:7.1.52\n#define SYNC_SCAN_TO_MIN              0x22\n/// Minimum value for synchronization scan window (in slots) HCI:7.1.52\n#define SYNC_SCAN_WIN_MIN             0x22\n/// Minimum value for synchronization scan interval (in slots) HCI:7.1.52\n#define SYNC_SCAN_INTV_MIN            0x02\n\n/// Default value for synchronization scan timeout (in slots) BB: Apppendix B\n#define SYNC_SCAN_TO_DEFAULT          0x2000\n/// Recommended value for synchronization scan window (91.25ms) GAP: Appendix A\n#define SYNC_SCAN_WIN_DEFAULT         0x0092\n/// Recommended value for synchronization scan interval (320 ms) GAP: Appendix A\n#define SYNC_SCAN_INTV_DEFAULT        0x0200\n\n/// CSB receive enable HCI:7.1.50\n#define CSB_RX_MODE_DIS        0x00\n#define CSB_RX_MODE_EN         0x01\n\n///  CSB fragment HCI:7.2.88\n#define CSB_CONTINUATION_FRAGMENT     0\n#define CSB_STARTING_FRAGMENT         1\n#define CSB_ENDING_FRAGMENT           2\n#define CSB_NO_FRAGMENTATION          3\n\n/// CSB max fragment size HCI:7.2.88\n#define CSB_FRAGMENT_SIZE_MAX         0xFF\n\n/// MWS Channel_Enable\n#define MWS_CHANNEL_DISABLED             0x00\n#define MWS_CHANNEL_ENABLED              0x01\n\n/// MWS Channel_Type\n#define MWS_TDD_CHANNEL_TYPE             0x00\n#define MWS_FDD_CHANNEL_TYPE             0x01\n\n/// MWS Transport_Layer\n#define MWS_SIGNALING_ONLY               0x00\n#define MWS_WCI_1                        0x01\n#define MWS_WCI_2                        0x02\n#define MWS_TRANSPORT_TYPE_MAX           0x02\n\n/// MWS PATTERN Index\n#define MWS_PATTERN_INDEX_MAX            2\n\n/// MWS PATTERN IntervalType\n#define MWS_PATTERN_NO_TXRX              0\n#define MWS_PATTERN_TX_ALLOWED           1\n#define MWS_PATTERN_RX_ALLOWED           2\n#define MWS_PATTERN_TXRX_ALLOWED         3\n#define MWS_PATTERN_EXT_FRAME            4\n#define MWS_PATTERN_TYPE_MAX             4\n\n\n/// MWS Ext_Num_Periods\n#define MWS_EXT_NUM_PERIODS_MIN          0x01\n#define MWS_EXT_NUM_PERIODS_MAX          0x32\n\n/// MWS Period_Type\n#define MWS_PERIOD_TYPE_DOWNLINK         0x00\n#define MWS_PERIOD_TYPE_UPLINK           0x01\n#define MWS_PERIOD_TYPE_BIDIRECTIONAL    0x02\n#define MWS_PERIOD_TYPE_GUARD_PERIOD     0x03\n#define MWS_PERIOD_TYPE_RESERVED         0x04\n\n/// Simple pairing mode HCI:7.3.58/HCI:7.3.59\n#define SP_MODE_DIS        0x00\n#define SP_MODE_EN         0x01\n\n/// Inquiry Scan Type and Page Scan Type HCI:6.4/HCI:6.11\n#define STANDARD_SCAN           0x00\n#define INTERLACED_SCAN         0x01\n\n/// Default interlace offset used for frequency selection during interlaced inquiry/page scan  BB:8.3.1/8.4.1\n#define INTERLACE_OFFSET_DFT    16\n\n/// Inquiry Mode\n#define STANDARD_INQUIRY        0x00\n#define RSSI_INQUIRY            0x01\n#define EXTENDED_INQUIRY        0x02\n\n/// Maximum number of link keys Host can write via HCI Write Stored Link Key Command\n#define NB_LINK_KEY             0x0B\n\n/// LMP Version\n#define BT_LMP_V1_0             0\n#define BT_LMP_V1_1             1\n#define BT_LMP_V1_2             2\n#define BT_LMP_V2_0             3\n#define BT_LMP_V2_1             4\n#define BT_LMP_V3_0             5\n#define BT_LMP_V4_0             6\n#define BT_LMP_V4_1             7\n\n/// WhichClock parameter\n#define LOCAL_CLOCK             0\n#define PICONET_CLOCK           1\n\n/// Clock Accuracy parameter\n#define CLOCK_ACCURACY_UNKNOWN  0xFFFF\n\n#define SP_PASSKEY_STARTED          0x00\n#define SP_PASSKEY_DIGIT_ENTERED    0x01\n#define SP_PASSKEY_DIGIT_ERASED     0x02\n#define SP_PASSKEY_CLEARED          0x03\n#define SP_PASSKEY_COMPLETED        0x04\n\n/// Low Power Mode\n#define PARK_BEACON_MIN             0x000E\n\n/// RWBT Device can be slave of 2 master at max\n#define MAX_SLAVES_FOR_DIFFERENT_MASTERS    2\n// Flags for ld_util_get_nb_acl function\n/// Flag for master link\n#define MASTER_FLAG       0x01\n/// Flag for slave link\n#define SLAVE_FLAG        0x02\n\n\n/// BLE packet info in bytes\n#define  BLE_PKT_HDR_LEN       (2)\n#define  BLE_PKT_CRC_LEN       (3)\n#define  BLE_PKT_ACCESS_LEN    (4)\n\n/// IFS duration in us\n#define  BLE_IFS_DUR           (150)\n\n\n/// BLE event mask\nenum le_evt_mask\n{\n    LE_EVT_MASK_CON_CMP_EVT_BIT                     = 0,     //!< LE_EVT_MASK_CON_CMP_EVT_BIT\n    LE_EVT_MASK_CON_CMP_EVT_MSK                     = 0x0001,//!< LE_EVT_MASK_CON_CMP_EVT_MSK\n    LE_EVT_MASK_ADV_REP_EVT_BIT                     = 1,     //!< LE_EVT_MASK_ADV_REP_EVT_BIT\n    LE_EVT_MASK_ADV_REP_EVT_MSK                     = 0x0002,//!< LE_EVT_MASK_ADV_REP_EVT_MSK\n    LE_EVT_MASK_CON_UPD_EVT_BIT                     = 2,     //!< LE_EVT_MASK_CON_UPD_EVT_BIT\n    LE_EVT_MASK_CON_UPD_EVT_MSK                     = 0x0004,//!< LE_EVT_MASK_CON_UPD_EVT_MSK\n    LE_EVT_MASK_CON_RD_REM_FEAT_EVT_BIT             = 3,     //!< LE_EVT_MASK_CON_RD_REM_FEAT_EVT_BIT\n    LE_EVT_MASK_CON_RD_REM_FEAT_EVT_MSK             = 0x0008,//!< LE_EVT_MASK_CON_RD_REM_FEAT_EVT_MSK\n    LE_EVT_MASK_LG_TR_KEY_REQ_EVT_BIT               = 4,     //!< LE_EVT_MASK_LG_TR_KEY_REQ_EVT_BIT\n    LE_EVT_MASK_LG_TR_KEY_REQ_EVT_MSK               = 0x0010,//!< LE_EVT_MASK_LG_TR_KEY_REQ_EVT_MSK\n    LE_EVT_MASK_REM_CON_PARA_REQ_EVT_BIT            = 5,     //!< LE_EVT_MASK_REM_CON_PARA_REQ_EVT_BIT\n    LE_EVT_MASK_REM_CON_PARA_REQ_EVT_MSK            = 0x0020,//!< LE_EVT_MASK_REM_CON_PARA_REQ_EVT_MSK\n    LE_EVT_MASK_DATA_LEN_CHG_EVT_BIT                = 6,     //!< LE_EVT_MASK_DATA_LEN_CHG_EVT_BIT\n    LE_EVT_MASK_DATA_LEN_CHG_EVT_MSK                = 0x0040,//!< LE_EVT_MASK_DATA_LEN_CHG_EVT_MSK\n    LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_BIT     = 7,     //!< LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_BIT\n    LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_MSK     = 0x0080,//!< LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_MSK\n    LE_EVT_MASK_GEN_DHKEY_CMP_EVT_BIT               = 8,     //!< LE_EVT_MASK_GEN_DHKEY_CMP_EVT_BIT\n    LE_EVT_MASK_GEN_DHKEY_CMP_EVT_MSK               = 0x0100,//!< LE_EVT_MASK_GEN_DHKEY_CMP_EVT_MSK\n    LE_EVT_MASK_ENH_CON_CMP_EVT_BIT                 = 9,     //!< LE_EVT_MASK_ENH_CON_CMP_EVT_BIT\n    LE_EVT_MASK_ENH_CON_CMP_EVT_MSK                 = 0x0200,//!< LE_EVT_MASK_ENH_CON_CMP_EVT_MSK\n    LE_EVT_MASK_DIR_ADV_REP_EVT_BIT                 = 10,    //!< LE_EVT_MASK_DIR_ADV_REP_EVT_BIT\n    LE_EVT_MASK_DIR_ADV_REP_EVT_MSK                 = 0x0400,//!< LE_EVT_MASK_DIR_ADV_REP_EVT_MSK\n    LE_EVT_MASK_PHY_UPD_CMP_EVT_BIT                 = 11,    //!< LE_EVT_MASK_PHY_UPD_CMP_EVT_BIT\n    LE_EVT_MASK_PHY_UPD_CMP_EVT_MSK                 = 0x0800,//!< LE_EVT_MASK_PHY_UPD_CMP_EVT_MSK\n\n    LE_EVT_MASK_DFT                                 = 0x001F,//!< LE_EVT_MASK_DFT\n};\n\n/// Enhanced Synchronous Connection HCI:7.1.41 & 7.1.42\n#define    CODING_FORMAT_ULAW          0x00\n#define    CODING_FORMAT_ALAW          0x01\n#define    CODING_FORMAT_CVSD          0x02\n#define    CODING_FORMAT_TRANSP        0x03\n#define    CODING_FORMAT_LINPCM        0x04\n#define    CODING_FORMAT_MSBC          0x05\n#define    CODING_FORMAT_VENDSPEC      0xFF\n\n#define    PCM_FORMAT_NA               0x00\n#define    PCM_FORMAT_1SCOMP           0x01\n#define    PCM_FORMAT_2SCOMP           0x02\n#define    PCM_FORMAT_SIGNMAG          0x03\n#define    PCM_FORMAT_UNSIGNED         0x04\n\n#define    PCM_SAMPLE_SIZE_8BITS       8\n#define    PCM_SAMPLE_SIZE_16BITS      16\n\n#define    AUDIO_DATA_PATH_HCI               0\n#define    AUDIO_DATA_PATH_PCM               1\n\n/// Default maximum number of slots per packet\n#define MAX_SLOT_DFT   1\n\n/// Packet type code interpretation possibilities BB:6.5\n#define ID_NUL_TYPE     0x0\n#define POLL_TYPE       0x1\n#define FHS_TYPE        0x2\n#define DM1_TYPE        0x3\n#define DH1_TYPE        0x4\n#define DH1_2_TYPE      0x4\n#define DH1_3_TYPE      0x8\n#define HV1_TYPE        0x5\n#define HV2_TYPE        0x6\n#define EV3_2_TYPE      0x6\n#define HV3_TYPE        0x7\n#define EV3_TYPE        0x7\n#define EV3_3_TYPE      0x7\n#define DV_TYPE         0x8\n#define AUX1_TYPE       0x9\n#define DM3_TYPE        0xA\n#define DH3_TYPE        0xB\n#define DH3_2_TYPE      0xA\n#define DH3_3_TYPE      0xB\n#define EV4_TYPE        0xC\n#define EV5_2_TYPE      0xC\n#define EV5_TYPE        0xD\n#define EV5_3_TYPE      0xD\n#define DM5_TYPE        0xE\n#define DH5_TYPE        0xF\n#define DH5_2_TYPE      0xE\n#define DH5_3_TYPE      0xF\n\n/// Format of the FHS payload BB:6.5.1.4\n#define FHS_PAR_BITS_POS        0\n#define FHS_PAR_BITS_LEN        34\n#define FHS_PAR_BITS_END        (FHS_PAR_BITS_POS + FHS_PAR_BITS_LEN)\n#define FHS_LAP_POS             FHS_PAR_BITS_END\n#define FHS_LAP_LEN             24\n#define FHS_LAP_END             (FHS_LAP_POS + FHS_LAP_LEN)\n#define FHS_EIR_POS             FHS_LAP_END\n#define FHS_EIR_LEN             1\n#define FHS_EIR_END             (FHS_EIR_POS + FHS_EIR_LEN)\n#define FHS_UNDEF_POS           FHS_EIR_END\n#define FHS_UNDEF_LEN           1\n#define FHS_UNDEF_END           (FHS_UNDEF_POS + FHS_UNDEF_LEN)\n#define FHS_SR_POS              FHS_UNDEF_END\n#define FHS_SR_LEN              2\n#define FHS_SR_END              (FHS_SR_POS + FHS_SR_LEN)\n#define FHS_RSVD_POS            FHS_SR_END\n#define FHS_RSVD_LEN            2\n#define FHS_RSVD_END            (FHS_RSVD_POS + FHS_RSVD_LEN)\n#define FHS_UAP_POS             FHS_RSVD_END\n#define FHS_UAP_LEN             8\n#define FHS_UAP_END             (FHS_UAP_POS + FHS_UAP_LEN)\n#define FHS_NAP_POS             FHS_UAP_END\n#define FHS_NAP_LEN             16\n#define FHS_NAP_END             (FHS_NAP_POS + FHS_NAP_LEN)\n#define FHS_CLASS_OF_DEV_POS    FHS_NAP_END\n#define FHS_CLASS_OF_DEV_LEN    24\n#define FHS_CLASS_OF_DEV_END    (FHS_CLASS_OF_DEV_POS + FHS_CLASS_OF_DEV_LEN)\n#define FHS_LT_ADDR_POS         FHS_CLASS_OF_DEV_END\n#define FHS_LT_ADDR_LEN         3\n#define FHS_LT_ADDR_END         (FHS_LT_ADDR_POS + FHS_LT_ADDR_LEN)\n#define FHS_CLK_POS             FHS_LT_ADDR_END\n#define FHS_CLK_LEN             26\n#define FHS_CLK_END             (FHS_CLK_POS + FHS_CLK_LEN)\n#define FHS_PAGE_SCAN_MODE_POS  FHS_CLK_END\n#define FHS_PAGE_SCAN_MODE_LEN  3\n#define FHS_PAGE_SCAN_MODE_END  (FHS_PAGE_SCAN_MODE_POS + FHS_PAGE_SCAN_MODE_LEN)\n\n/// Format of the STP payload BB:8.11.2\n#define STP_CLK_POS             0\n#define STP_CLK_LEN             4\n#define STP_FUT_CSB_INST_POS    4\n#define STP_FUT_CSB_INST_LEN    4\n#define STP_AFH_CH_MAP_POS      8\n#define STP_AFH_CH_MAP_LEN      10\n#define STP_MST_BD_ADDR_POS     18\n#define STP_MST_BD_ADDR_LEN     6\n#define STP_CSB_INTV_POS        24\n#define STP_CSB_INTV_LEN        2\n#define STP_CSB_LT_ADDR_POS     26\n#define STP_CSB_LT_ADDR_LEN     1\n#define STP_SVC_DATA_POS        27\n#define STP_SVC_DATA_LEN        1\n#define STP_PACKET_SIZE         28\n\n/// CSB Receive status HCI:7.7.69\n#define CSB_RX_OK        0x00\n#define CSB_RX_KO        0x01\n\n\n/// HCI 7.8.18 LE Connection Update Command\n/// Connection interval min (N*1.250ms)\n#define LE_CNX_INTERVAL_MIN            6       //(0x06)\n/// Connection interval Max (N*1.250ms)\n#define LE_CNX_INTERVAL_MAX            3200    //(0xC80)\n/// Connection latency min (N*cnx evt)\n#define LE_CNX_LATENCY_MIN             0       //(0x00)\n/// Connection latency Max (N*cnx evt\n#define LE_CNX_LATENCY_MAX             500     //(0x1F4)\n/// Supervision TO min (N*10ms)\n#define LE_CNX_SUP_TO_MIN              10      //(0x0A)\n/// Supervision TO Max (N*10ms)\n#define LE_CNX_SUP_TO_MAX              3200    //(0xC80)\n/// Connection event length min (N*0.625ms)\n#define LE_CNX_CE_LGTH_MIN             0       //(0x00)\n/// Connection event length  Max (N*0.625ms)\n#define LE_CNX_CE_LGTH_MAX             65535   //(0xFFFF)'\n\n\n/// HCI 7.8.33 LE Set Data Length Command\n/// Preferred minimum number of payload octets\n#define LE_MIN_OCTETS    (27)\n/// Preferred minimum  number of microseconds\n#define LE_MIN_TIME     (328)\n/// Preferred maximum number of payload octets\n#define LE_MAX_OCTETS   (251)\n/// Preferred maximum number of microseconds\n#define LE_MAX_TIME    (2120)\n\n/// LE LL 2.1.2 Access Address\n#define LE_ADV_CH_ACC_ADDR_H        0x8E89\n#define LE_ADV_CH_ACC_ADDR_L        0xBED6\n\n/// Resolvable private address timeout (in seconds) HCI:7.8.45\n#define RPA_TO_MAX         0xA1B8 // approximately 11.5 hours\n#define RPA_TO_DFT         0x0384 // 900 seconds or 15 minutes\n#define RPA_TO_MIN         0x0001 // 1 second\n\n/// Scan/Init PHYs (bit fields, as defined in HCI:7.8.64, HCI:7.8.66).\n#define LE_1M_PHY_BIT_POS        0\n#define LE_1M_PHY_BIT_MSK        0x01\n#define LE_CODED_PHY_BIT_POS     2\n#define LE_CODED_PHY_BIT_MSK     0x04\n\n/// Max scanning PHYs which can be set HCI:7.8.64\n#define MAX_SCAN_PHYS     2\n\n/// Max initiatng PHYs which can be set HCI:7.8.66\n#define MAX_INIT_PHYS     2   \n\n/// Ext Scanning interval (in 625us slot) (chapter 2.E.7.8.64)\n#define EXT_SCAN_INTERVAL_MIN     0x0004 //(2.5 ms)\n#define EXT_SCAN_INTERVAL_MAX     0xFFFF //(40.96 sec)\n\n/// Ext Scanning window (in 625us slot) (chapter 2.E.7.8.64)\n#define EXT_SCAN_WINDOW_MIN     0x0004 //(2.5 ms)\n#define EXT_SCAN_WINDOW_MAX     0xFFFF //(40.96 sec)\n\n/// Advertiser PHY definitions for Ext Adv report Evts  HCI:7.7.65.13\n#define HCI_ADV_PHY_1M              1\n#define HCI_ADV_PHY_2M              2\n#define HCI_ADV_PHY_CODED           3\n\n/// Duration of 1MBPS PDU of specified payload length in microseconds (chapter 6.B.2.1)\n#define PDU_1MBPS_LEN_US(n_bytes) ((8 + (2 + n_bytes))*8) // (1 + 4 + (2 + payload_len) + 3)*8\n\n/// Duration of 2MBPS PDU of specified payload length in microseconds (chapter 6.B.2.1)\n#define PDU_2MBPS_LEN_US(n_bytes) ((9 + (2 + n_bytes))*4) // (2 + 4 + (2 + payload_len) + 3)*4\n\n/// Duration of 500KBPS PDU of specified payload length in microseconds (chapter 6.B.2.2)\n#define PDU_500KBPS_LEN_US(n_bytes) (430 + (2 + n_bytes)*16) // 80 + 256 + 16 + 24 + (2 + payload_len)*8*2 + 24*2 + 3*2\n\n/// Duration of 125KBPS PDU of specified payload length in microseconds (chapter 6.B.2.2)\n#define PDU_125KBPS_LEN_US(n_bytes) (592 + (2 + n_bytes)*64) // 80 + 256 + 16 + 24 + (2 + payload_len)*8*8 + 24*8 + 3*8\n\n/// Maximum length of BLE advertising channel PDU payloads ((chapter 6.B.2.3))\n#define PDU_ADV_PAYLOAD_LEN_MAX     255\n\n/// Ext Adv Report  - ADV SID - Define for no ADI filed in the PDU  HCI:7.7.65.13\n#define REP_ADV_NO_ADI              0xFF\n\n/// Ext Adv Report  - Tx Power & RSSI dBm - Define for information not available    HCI:7.7.65.13\n#define REP_ADV_DBM_UNKNOWN         127\n\n/// Periodic Advertising Report - Unused parameter - mandatory value HCI:7.7.65.15\n#define PER_ADV_REPORT_TRAIL_BYTE  0xFF\n\n/// Maximum advertising handle HCI:7.8.53\n#define ADV_HDL_MAX     0xEF\n\n/// Advertising_Tx_Power, Host has no preference HCI:7.8.53\n#define ADV_TX_PWR_NO_PREF     127\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n/// BLE 2MBPS HCI:7.8.x\nenum le_phys_preference\n{\n    /// The Host has no preference among the transmitter PHYs supported by the Controller\n    ALL_PHYS_TX_NO_PREF = (1 << 0),\n    /// The Host has no preference among the receiver PHYs supported by the Controller\n    ALL_PHYS_RX_NO_PREF = (1 << 1),\n};\n\nenum le_phy_value\n{\n    /// The Host prefers to use the LE 1M transmitter/receiver PHY (possibly among others)\n    PHY_1MBPS      = (1<<0),\n    /// The Host prefers to use the LE 2M transmitter/receiver PHY (possibly among others)\n    PHY_2MBPS      = (1<<1),\n    /// The Host prefers to use the LE Coded transmitter/receiver PHY (possibly among others)\n    PHY_LE_CODED   = (1<<2),\n    /// The Host prefers to use the LE Coded transmitter/receiver PHY (possibly among others)\n    PHY_ALL        = (PHY_1MBPS | PHY_2MBPS | PHY_LE_CODED),\n};\n\nenum le_phy_opt\n{\n    /// The Host has no preferred coding when transmitting on the LE Coded PHY\n    PHY_OPT_NO_LE_CODED_TX_PREF,\n    /// The Host prefers that S=2 coding be used when transmitting on the LE Coded PHY\n    PHY_OPT_S2_LE_CODED_TX_PREF,\n    /// The Host prefers that S=8 coding be used when transmitting on the LE Coded PHY\n    PHY_OPT_S8_LE_CODED_TX_PREF,\n};\n\n\nenum le_phy_mode\n{\n    PHYS_MOD_STANDARD ,\n    PHYS_MOD_STABLE   ,\n    PHYS_MOD_MAX,\n};\n\n///Transmit Power level types\nenum\n{\n    ///Current Power Level\n    TX_PW_LVL_CURRENT             = 0x00,\n    ///Maximum power level\n    TX_PW_LVL_MAX,\n};\n\n///Controller to Host flow control\nenum\n{\n    /// C-> H flow control off\n    FLOW_CTRL_OFF                 = 0x00,\n    ///C->H ACL flow control on only\n    FLOW_CTRL_ON_ACL_OFF_SYNC,\n    ///C->H Sync flow control on only\n    FLOW_CTRL_OFF_ACL_ON_SYNC,\n    ///C->H ACL and Sync  flow control on\n    FLOW_CTRL_ON_ACL_ON_SYNC,\n};\n\n///LE Supported Host enable\nenum\n{\n    ///Disable LE supported Host\n    LE_SUPP_HOST_DIS              = 0x00,\n    ///Enable LE Supported Host\n    LE_SUPP_HOST_EN,\n};\n\n///Simultaneous LE Host enable\nenum\n{\n    ///Disable LE simultaneous Host disable\n    SIMULT_LE_HOST_DIS            = 0x00,\n    ///Enable LE simultaneous Host disable\n    SIMULT_LE_HOST_EN,\n};\n\n///Advertising HCI Type\nenum\n{\n    ///Connectable Undirected advertising\n    ADV_CONN_UNDIR                = 0x00,\n    ///Connectable high duty cycle directed advertising\n    ADV_CONN_DIR,\n    ///Discoverable undirected advertising\n    ADV_DISC_UNDIR,\n    ///Non-connectable undirected advertising\n    ADV_NONCONN_UNDIR,\n    ///Connectable low duty cycle directed advertising\n    ADV_CONN_DIR_LDC,\n};\n\n///Advertising event properties values for legacy PDUs\nenum\n{\n    ///Connectable and scannable undirected\n    ADV_IND                   = 0x13,\n    ///Connectable directed (low duty cycle)\n    ADV_DIRECT_LO_IND         = 0x15,\n    ///Connectable directed (high duty cycle)\n    ADV_DIRECT_HI_IND         = 0x1D,\n    ///Connectable directed (received)\n    ADV_DIRECT_IND            = 0x15,\n    ///Scannable undirected\n    ADV_SCAN_IND              = 0x12,\n    ///Non-connectable and non-scannable undirected\n    ADV_NONCONN_IND           = 0x10,\n    ///Scan response to an ADV_IND\n    SCAN_RSP_TO_ADV_IND       = 0x1B,\n    ///Scan response to an ADV_SCAN_IND\n    SCAN_RSP_TO_ADV_SCAN_IND  = 0x1A,\n};\n\n///Advertising event properties masks\nenum\n{\n    ///Connectable advertising\n    ADV_CON                = 0x01,\n    ///Scannable advertising\n    ADV_SCAN               = 0x02,\n    ///Directed advertising\n    ADV_DIRECT             = 0x04,\n    ///High duty cycle directed connectable advertising\n    ADV_DIRECT_HI          = 0x08,\n    ///Use legacy advertising PDUs\n    ADV_LEGACY             = 0x10,\n    ///Omit advertiser's address from all PDUs (\"anonymous advertising\")\n    ADV_ANONYMOUS          = 0x20,\n    ///Include TxPower in the extended header of the advertising PDU\n    ADV_TX_PWR             = 0x40,\n};\n\n///Scanning HCI Type\nenum\n{\n    ///Scan request\n    SCAN_REQ,\n    ///Scan response\n    SCAN_RSP,\n};\n\n///BD address type\nenum\n{\n    ///Public BD address\n    ADDR_PUBLIC                   = 0x00,\n    ///Random BD Address\n    ADDR_RAND,\n    /// Controller generates Resolvable Private Address based on the\n    /// local IRK from resolving list. If resolving list contains no matching\n    /// entry, use public address.\n    ADDR_RPA_OR_PUBLIC,\n    /// Controller generates Resolvable Private Address based on the\n    /// local IRK from resolving list. If resolving list contains no matching\n    /// entry, use random address.\n    ADDR_RPA_OR_RAND,\n    /// mask used to determine Address type in the air\n    ADDR_MASK                     = 0x01,\n    /// mask used to determine if an address is an RPA\n    ADDR_RPA_MASK                 = 0x02,\n    /// Random device address (controller unable to resolve)\n    ADDR_RAND_UNRESOLVED          = 0xFE,\n    /// No address provided (anonymous advertisement)\n    ADDR_NONE                     = 0xFF,\n};\n\n///Privacy mode type\nenum\n{\n    ///Network privacy mode\n    PRIV_TYPE_NETWORK = 0x00,\n    ///Device privacy mode\n    PRIV_TYPE_DEVICE  = 0x01,\n};\n\n/// Random Address type (2 MSB of the LE BD Address)\nenum rnd_addr_type\n{\n    /// Static random address           - 11 (MSB->LSB)\n    RND_STATIC_ADDR     = 0xC0,\n    /// Private non resolvable address  - 00 (MSB->LSB)\n    RND_NON_RSLV_ADDR   = 0x00,\n    /// Private resolvable address      - 01 (MSB->LSB)\n    RND_RSLV_ADDR       = 0x40,\n};\n\n///Advertising channels enables\nenum adv_channel_map\n{\n    ///Byte value for advertising channel map for channel 37 enable\n    ADV_CHNL_37_EN                = 0x01,\n    ///Byte value for advertising channel map for channel 38 enable\n    ADV_CHNL_38_EN                = 0x02,\n    ///Byte value for advertising channel map for channel 39 enable\n    ADV_CHNL_39_EN                = 0x04,\n    ///Byte value for advertising channel map for channel 37, 38 and 39 enable\n    ADV_ALL_CHNLS_EN              = 0x07,\n};\n\n///Advertising filter policy\nenum adv_filter_policy\n{\n    ///Allow both scan and connection requests from anyone\n    ADV_ALLOW_SCAN_ANY_CON_ANY    = 0x00,\n    ///Allow both scan req from White List devices only and connection req from anyone\n    ADV_ALLOW_SCAN_WLST_CON_ANY,\n    ///Allow both scan req from anyone and connection req from White List devices only\n    ADV_ALLOW_SCAN_ANY_CON_WLST,\n    ///Allow scan and connection requests from White List devices only\n    ADV_ALLOW_SCAN_WLST_CON_WLST,\n};\n\n///Advertising enables\nenum\n{\n    ///Disable advertising\n    ADV_DIS                       = 0x00,\n    ///Enable advertising\n    ADV_EN,\n};\n\n///LE Scan type\nenum\n{\n    ///Passive scan\n    SCAN_PASSIVE                  = 0x00,\n    ///Active scan\n    SCAN_ACTIVE,\n};\n\n///Scan filter policy\nenum scan_filter_policy\n{\n    ///Allow advertising packets from anyone\n    SCAN_ALLOW_ADV_ALL            = 0x00,\n    ///Allow advertising packets from White List devices only\n    SCAN_ALLOW_ADV_WLST,\n    ///Allow advertising packets from anyone and Direct adv using RPA in InitA\n    SCAN_ALLOW_ADV_ALL_AND_INIT_RPA,\n    ///Allow advertising packets from White List devices only and Direct adv using RPA in InitA\n    SCAN_ALLOW_ADV_WLST_AND_INIT_RPA,\n};\n\n///Le Scan enables\nenum\n{\n    ///Disable scan\n    SCAN_DIS                      = 0x00,\n    ///Enable scan\n    SCAN_EN,\n};\n\n///Filter duplicates\nenum scan_dup_filter_policy\n{\n    ///Disable filtering of duplicate packets\n    SCAN_FILT_DUPLIC_DIS          = 0x00,\n    ///Enable filtering of duplicate packets\n    SCAN_FILT_DUPLIC_EN,\n    ///Enable filtering of duplicate packets per scan period\n    SCAN_FILT_DUPLIC_EN_PER_PERIOD,\n};\n\n///Initiator Filter policy\nenum\n{\n    ///Initiator will ignore White List\n    INIT_FILT_IGNORE_WLST         = 0x00,\n    ///Initiator will use White List\n    INIT_FILT_USE_WLST,\n};\n\n///Transmitter test Packet Payload Type\nenum\n{\n    ///Pseudo-random 9 TX test payload type\n    PAYL_PSEUDO_RAND_9            = 0x00,\n    ///11110000 TX test payload type\n    PAYL_11110000,\n    ///10101010 TX test payload type\n    PAYL_10101010,\n    ///Pseudo-random 15 TX test payload type\n    PAYL_PSEUDO_RAND_15,\n    ///All 1s TX test payload type\n    PAYL_ALL_1,\n    ///All 0s TX test payload type\n    PAYL_ALL_0,\n    ///00001111 TX test payload type\n    PAYL_00001111,\n    ///01010101 TX test payload type\n    PAYL_01010101,\n};\n\n/// Constant defining the role\nenum\n{\n    ///Master role\n    ROLE_MASTER,\n    ///Slave role\n    ROLE_SLAVE,\n};\n\n/// Constant clock accuracy\nenum\n{\n    ///Clock accuracy at 500PPM\n    SCA_500PPM,\n    ///Clock accuracy at 250PPM\n    SCA_250PPM,\n    ///Clock accuracy at 150PPM\n    SCA_150PPM,\n    ///Clock accuracy at 100PPM\n    SCA_100PPM,\n    ///Clock accuracy at 75PPM\n    SCA_75PPM,\n    ///Clock accuracy at 50PPM\n    SCA_50PPM,\n    ///Clock accuracy at 30PPM\n    SCA_30PPM,\n    ///Clock accuracy at 20PPM\n    SCA_20PPM\n};\n\n///Advertising pdu Type\nenum ble_adv_type\n{\n    /// Undirected advertising\n    BLE_ADV_IND                = 0x00,\n    /// Directed advertising\n    BLE_ADV_DIRECT_IND         = 0x01,\n    /// Non Connectable advertising\n    BLE_ADV_NONCONN_IND        = 0x02,\n    /// Scan Request on primary channel\n    BLE_SCAN_REQ               = 0x03,\n    /// Scan Response on secondary channel\n    BLE_AUX_SCAN_REQ           = 0x03,\n\n    /// Scan Response\n    BLE_SCAN_RSP               = 0x04,\n    /// Connect Request on primary channel\n    BLE_CONNECT_IND            = 0x05,\n    /// Connect Request on secondary channel\n    BLE_AUX_CONNECT_REQ        = 0x05,\n\n    /// Discoverable advertising\n    BLE_ADV_SCAN_IND           = 0x06,\n\n    /// Extended Advertising indication on primary channel\n    BLE_ADV_EXT_IND            = 0x07,\n\n    /// ADV data indication on secondary channel\n    BLE_AUX_ADV_IND            = 0x07,\n    /// Scan response data on secondary channel\n    BLE_AUX_SCAN_RSP           = 0x07,\n    /// Periodic Advertising packet on secondary channel\n    BLE_AUX_SYNC_IND           = 0x07,\n    /// Continuation of advertising data on secondary channel\n    BLE_AUX_CHAIN_IND          = 0x07,\n    /// Response of the AUX_CONNECT_REQ on secondary channel to confirm that connection is accepted\n    BLE_AUX_CONNECT_RSP        = 0x08,\n\n    /// Reserved\n    BLE_RESERVED_PDU_TYPES,\n};\n\n\n/// LE Advertising Report Event Type HCI:7.7.65.2\nenum\n{\n    /// Connectable undirected advertising\n    ADV_IND_EVT = 0x00,\n    /// Connectable directed advertising\n    ADV_DIRECT_IND_EVT,\n    /// Scannable undirected advertising\n    ADV_SCAN_IND_EVT,\n    /// Non connectable undirected advertising\n    ADV_NONCONN_IND_EVT,\n    /// Scan Response\n    SCAN_RSP_EVT,\n    /// Reserved\n    RESERVED_ADV_EVT_TYPES,\n};\n\n/// LE Extended Advertising Report Event Type Bit Mask HCI:7.765.13\n\n/// Connectable advertising event\n#define CON_ADV_EVT_MSK            0x01\n/// Scannable advertising event\n#define SCAN_ADV_EVT_MSK           0x02\n/// Directed advertising event\n#define DIR_ADV_EVT_MSK            0x04\n/// Scan Response\n#define SCAN_RSP_EVT_MSK           0x08\n/// Legacy advertising PDUs\n#define LGCY_ADV_EVT_MSK           0x10\n\n/// Connectable undirected advertising\n#define LGCY_ADV_IND_EVT                    0x13 //LGCY_ADV_EVT_MSK|SCAN_ADV_EVT_MSK|CON_ADV_EVT_MSK\n/// Connectable directed advertising\n#define LGCY_ADV_DIRECT_IND_EVT             0x15 //LGCY_ADV_EVT_MSK|DIR_ADV_EVT_MSK|CON_ADV_EVT_MSK\n/// Scannable undirected advertising\n#define LGCY_ADV_SCAN_IND_EVT               0x12 //LGCY_ADV_EVT_MSK|SCAN_ADV_EVT_MSK\n/// Non connectable undirected advertising\n#define LGCY_ADV_NONCONN_IND_EVT            0x10 //LGCY_ADV_EVT_MSK\n/// Scan Response to ADV_IND\n#define LGCY_SCAN_RSP_TO_ADV_IND_EVT        0x1B //LGCY_ADV_EVT_MSK|SCAN_RSP_EVT_MSK|SCAN_ADV_EVT_MSK|CON_ADV_EVT_MSK\n/// Scan Response to ADV_SCAN_IND\n#define LGCY_SCAN_RSP_TO_ADV_SCAN_IND_EVT   0x1A //LGCY_ADV_EVT_MSK|SCAN_RSP_EVT_MSK|SCAN_ADV_EVT_MSK\n\n/// Offset of data status field in event type value\n#define ADV_EVT_DATA_STATUS_OFFSET              5\n/// Mask for data status field in event type value\n#define ADV_EVT_DATA_STATUS_MASK                0x0003\n/// Data status of extended advertising event - Complete\n#define ADV_EVT_DATA_STATUS_COMPLETE            0\n/// Data status of extended advertising event - Incomplete, more data to come\n#define ADV_EVT_DATA_STATUS_INCOMPLETE          1\n/// Data status of extended advertising event - Incomplete, data truncated, no more to come\n#define ADV_EVT_DATA_STATUS_TRUNCATED           2\n/// Data status of extended advertising event - Reserved for future use\n#define ADV_EVT_DATA_STATUS_RESERVED            3\n\n/// LLID packet\nenum\n{\n    /// Reserved for future use\n    LLID_RFU,\n    /// Continue\n    LLID_CONTINUE,\n    /// Start\n    LLID_START,\n    /// Control\n    LLID_CNTL\n};\n\n/// Remote OOB Data present parameter value HCI:7.1.29\nenum\n{\n    REM_OOB_DATA_NO        = 0x00,\n    REM_OOB_DATA_P192      = 0x01,\n    REM_OOB_DATA_P256      = 0x02,\n    REM_OOB_DATA_P192_P256 = 0x03,\n};\n\n/// Encryption enabled parameter in HCI_Enc_Chg_Evt HCI:7.7.8\nenum\n{\n    ENC_OFF                  = 0x00,\n    ENC_BRDER_E0_LE_AESCCM   = 0x01,\n    ENC_BREDR_AESCC          = 0x02,\n};\n\n/// Combined duration of Preamble and Access Address depending on the PHY used (in us)\n#define BLE_PREAMBLE_ACCESS_ADDR_DUR_1MBPS      (5*8)\n#define BLE_PREAMBLE_ACCESS_ADDR_DUR_2MBPS      (6*4)\n#define BLE_PREAMBLE_ACCESS_ADDR_DUR_125KBPS    (80+256)\n#define BLE_PREAMBLE_ACCESS_ADDR_DUR_500KBPS    (80+256)\n\n/// size of the LEN & MODE info preceeding the extended header\n#define BLE_EXT_ADV_PRE_HEADER_LEN           (1)\n/// size of the FLAGS info at start of the extended header\n#define BLE_EXT_ADV_HEADER_FLAGS_LEN         (1)\n/// size of the extended header in bytes (pre-header + flags)\n#define BLE_EXT_ADV_HEADER_LEN               (2)\n/// Size of supplemental info in extended header\n#define BLE_EXT_SUP_INFO_LEN                 (1)\n/// Size of ADV Data Info in extended header\n#define BLE_EXT_ADI_LEN                      (2)\n/// Size of Aux Pointer info in extended header\n#define BLE_EXT_AUX_PTR_LEN                  (3)\n/// Size of Sync PTR info in extended header\n#define BLE_EXT_SYNC_LEN                    (18)\n/// Size of TX Power info in extended header\n#define BLE_EXT_TX_PWR_LEN                   (1)\n\n/// Extended Header Flags\nenum ble_ext_header_flags\n{\n    // AdvA\n    ADVA_BIT                = 0x01,\n    ADVA_POS                = 0,\n    // TargetA\n    TARGETA_BIT             = 0x02,\n    TARGETA_POS             = 1,\n    // SuppInfo\n    SUPPINFO_BIT            = 0x04,\n    SUPPINFO_POS            = 2,\n    // AdvDataInfo (ADI)\n    ADI_BIT                 = 0x08,\n    ADI_POS                 = 3,\n    // AuxPtr\n    AUXPTR_BIT              = 0x10,\n    AUXPTR_POS              = 4,\n    // SyncInfo\n    SYNCINFO_BIT            = 0x20,\n    SYNCINFO_POS            = 5,\n    // TxPower\n    TXPOWER_BIT             = 0x40,\n    TXPOWER_POS             = 6,\n};\n\n/// AUX pointer description\nenum ble_aux_ptr\n{\n    // Aux LL Channel\n    BLE_AUX_LL_CHANNEL_MASK = 0x0000003F,\n    BLE_AUX_LL_CHANNEL_LSB  = 0,\n    // Aux Clock Accuracy\n    BLE_AUX_CA_BIT          = 0x00000040,\n    BLE_AUX_CA_POS          = 6,\n    // Aux Offset Unit\n    BLE_AUX_OFFSET_UNIT_BIT = 0x00000080,\n    BLE_AUX_OFFSET_UNIT_POS = 7,\n    // Aux ADV offset\n    BLE_AUX_OFFSET_MASK     = 0x001FFF00,\n    BLE_AUX_OFFSET_LSB      = 8,\n    // Aux PHY\n    BLE_AUX_PHY_MASK        = 0x00E00000,\n    BLE_AUX_PHY_LSB         = 21,\n};\n\n/// AdvDataInfo (ADI) field description\nenum ble_adi\n{\n    // Advertising Data ID (DID)\n    BLE_ADI_DID_MASK        = 0x0FFF,\n    BLE_ADI_DID_LSB         = 0,\n    // Advertising Set ID (SID)\n    BLE_ADI_SID_MASK        = 0xF000,\n    BLE_ADI_SID_LSB         = 12,\n};\n\n/// Advertising mode\nenum ble_adv_mode\n{\n    /// Non connectable and non scannable mode\n    BLE_MODE_NON_CON_SCAN   = 0,\n    /// Connectable Mode (accept connection request)\n    BLE_MODE_CONNECTABLE    = 1,\n    /// Scannable Mode (accept scan request)\n    BLE_MODE_SCANNABLE      = 2,\n    /// Reserved Advertising mode\n    BLE_MODE_RESERVED       = 3,\n};\n\n/// Advertising data operation\nenum adv_data_op\n{\n    /// Intermediate fragment of fragmented extended advertising data\n    ADV_DATA_OP_INTERMEDIATE_FRAG   = 0,\n    /// First fragment of fragmented extended advertising data\n    ADV_DATA_OP_FIRST_FRAG          = 1,\n    /// Last fragment of fragmented extended advertising data\n    ADV_DATA_OP_LAST_FRAG           = 2,\n    /// Complete extended advertising data\n    ADV_DATA_OP_COMPLETE            = 3,\n    /// Unchanged data (just update the Advertising DID)\n    ADV_DATA_OP_UNCHANGED_DATA      = 4,\n};\n\n/// Advertising data fragment preference\nenum adv_data_frag_pref\n{\n    /// The Controller may fragment all Host advertising data\n    ADV_DATA_MAY_FRAG         = 0,\n    /// The Controller should not fragment nor minimize fragmentation of Host advertising data\n    ADV_DATA_SHOULD_NOT_FRAG  = 1,\n};\n\n/*\n * STRUCTURE DEFINITONS\n ****************************************************************************************\n */\n\n///BD name structure\nstruct bd_name\n{\n    ///length for name\n    uint8_t namelen;\n    ///array of bytes for name\n    uint8_t name[BD_NAME_SIZE];\n};\n\n///Structure device name\nstruct device_name\n{\n    ///array of bytes for name\n    uint8_t name[BD_NAME_SIZE];\n};\n\n///Structure name vector\nstruct name_vect\n{\n    uint8_t vect[NAME_VECT_SIZE];\n};\n\n/// lap structure\nstruct lap\n{\n    /// LAP\n    uint8_t A[BD_ADDR_LAP_LEN];\n};\n\n/// class structure\nstruct devclass\n{\n    /// class\n    uint8_t A[DEV_CLASS_LEN];\n};\n\n///Extended inquiry response structure\nstruct eir\n{\n    /// eir data\n    uint8_t data[EIR_DATA_SIZE];\n};\n\n///Event mask structure\nstruct evt_mask\n{\n    ///8-byte array for mask value\n    uint8_t mask[EVT_MASK_LEN];\n};\n\n///Host number of completed packets structure, for 1 connection handle\nstruct host_cmpl_pkts\n{\n    ///Connection handle\n    uint16_t  con_hdl;\n    ///Number of completed packets\n    uint16_t  nb_cmpl_pkts;\n};\n\n///BD Address structure\nstruct bd_addr\n{\n    ///6-byte array address value\n    uint8_t  addr[BD_ADDR_LEN];\n};\n\n///Access Address structure\nstruct access_addr\n{\n    ///4-byte array access address\n    uint8_t  addr[ACCESS_ADDR_LEN];\n};\n\n///Advertising data structure\nstruct adv_data\n{\n    ///Maximum length data bytes array\n    uint8_t        data[ADV_DATA_LEN];\n};\n\n///Scan response data structure\nstruct scan_rsp_data\n{\n    ///Maximum length data bytes array\n    uint8_t        data[SCAN_RSP_DATA_LEN];\n};\n\n///Channel map structure\nstruct chnl_map\n{\n    ///10-bytes channel map array\n    uint8_t map[CHNL_MAP_LEN];\n};\n\n///Channel map structure\nstruct le_chnl_map\n{\n    ///5-byte channel map array\n    uint8_t map[LE_CHNL_MAP_LEN];\n};\n\n///Long Term Key structure\nstruct ltk\n{\n    ///16-byte array for LTK value\n    uint8_t ltk[KEY_LEN];\n};\n\n///Identity Resolving Key structure\nstruct irk\n{\n    ///16-byte array for IRK value\n    uint8_t key[KEY_LEN];\n};\n\n/// Initialization vector (for AES-CCM encryption)\nstruct initialization_vector\n{\n    ///8-byte array\n    uint8_t vect[IV_LEN];\n};\n\n/// Bluetooth address with link key\nstruct bd_addr_plus_key\n{\n    /// BD Address\n    struct bd_addr  bd_addr;\n    /// Link Key\n    struct ltk link_key;\n};\n\n///Random number structure\nstruct rand_nb\n{\n    ///8-byte array for random number\n    uint8_t     nb[RAND_NB_LEN];\n};\n\n///Advertising report structure\nstruct adv_report\n{\n    ///Event type:\n    /// - ADV_CONN_UNDIR: Connectable Undirected advertising\n    /// - ADV_CONN_DIR: Connectable directed advertising\n    /// - ADV_DISC_UNDIR: Discoverable undirected advertising\n    /// - ADV_NONCONN_UNDIR: Non-connectable undirected advertising\n    uint8_t        evt_type;\n    ///Advertising address type: public/random\n    uint8_t        adv_addr_type;\n    ///Advertising address value\n    struct bd_addr adv_addr;\n    ///Data length in advertising packet\n    uint8_t        data_len;\n    ///Data of advertising packet\n    uint8_t        data[ADV_DATA_LEN];\n    ///RSSI value for advertising packet\n    uint8_t        rssi;\n};\n\n///Direct Advertising report structure\nstruct dir_adv_report\n{\n    ///Event type:\n    /// - ADV_CONN_DIR: Connectable directed advertising\n    uint8_t        evt_type;\n    ///Address type: public/random\n    uint8_t        addr_type;\n    ///Address value\n    struct bd_addr addr;\n    ///Direct address type: public/random\n    uint8_t        dir_addr_type;\n    ///Direct address value\n    struct bd_addr dir_addr;\n    ///RSSI value for advertising packet\n    uint8_t        rssi;\n};\n\n///Exteneded Advertising report structure\nstruct ext_adv_report\n{\n    ///Event type\n    uint16_t       evt_type;\n    ///Advertising address type: public/random\n    uint8_t        adv_addr_type;\n    ///Advertising address value\n    struct bd_addr adv_addr;\n    ///Primary PHY\n    uint8_t        phy;\n    ///Secondary PHY\n    uint8_t        phy2;\n    ///Advertising SID\n    uint8_t        adv_sid;\n    ///Tx Power\n    uint8_t        tx_power;\n    ///RSSI value for advertising packet\n    uint8_t        rssi;\n    ///Periodic Advertising interval (Time=N*1.25ms)\n    uint16_t       interval;\n    ///Direct address type\n    uint8_t        dir_addr_type;\n    ///Direct address value\n    struct bd_addr dir_addr;\n    ///Data length in advertising packet\n    uint8_t        data_len;\n    ///Data of advertising packet\n    uint8_t        data[EXT_ADV_DATA_MAX_LEN];\n};\n\n///Supported LE Features structure\nstruct le_features\n{\n    ///8-byte array for LE features\n    uint8_t feats[LE_FEATS_LEN];\n};\n\n///Simple pairing hash structure\nstruct hash\n{\n    ///16-byte array for LTK value\n    uint8_t C[KEY_LEN];\n};\n\n///Simple pairing randomizer structure\nstruct randomizer\n{\n    ///16-byte array for LTK value\n    uint8_t R[KEY_LEN];\n};\n\n///Pin code structure\nstruct pin_code\n{\n    ///16-byte array for PIN value\n    uint8_t pin[PIN_CODE_MAX_LEN];\n};\n\n///Sres structure\nstruct sres_nb\n{\n    ///8-byte array for random number\n    uint8_t  nb[SRES_LEN];\n};\n\n///aco structure\nstruct aco\n{\n    ///8-byte array for random number\n    uint8_t a[ACO_LEN];\n};\n\n///struct byte 16 to stay align with the sdl version\nstruct byte16\n{\n    uint8_t A[16];\n};\n\n///Controller number of completed packets structure\nstruct nb_cmpl_pk\n{\n    ///Connection handle\n    uint16_t con_hdl;\n    ///Controller number of data packets that have been completed since last time\n    uint16_t nb_hc_cmpl_pkts;\n};\n\n///Supported Features  structure\nstruct features\n{\n    ///8-byte array for features\n    uint8_t feats[FEATS_LEN];\n};\n\n///Supported commands structure\nstruct supp_cmds\n{\n    ///64-byte array for supported commands\n    uint8_t cmds[SUPP_CMDS_LEN];\n};\n\n///Supported LMP features structure\nstruct lmp_features\n{\n    ///8-byte array for LMp features\n    uint8_t feats[FEATS_LEN];\n};\n\n///Simple pairing IO capabilities\nstruct io_capability\n{\n    ///IO capability\n    uint8_t  io_cap;\n    /// Out Of Band Data present\n    bool  oob_data_present;\n    ///Authentication Requirement\n    uint8_t  aut_req;\n};\n\n///Public key\nstruct pub_key_192\n{\n    uint8_t p_key[PUB_KEY_192_LEN/2];\n};\n\n///Public key\nstruct pub_key_256\n{\n    uint8_t p_key[PUB_KEY_256_LEN/2];\n};\n\n///Simple pairing public keys 192\nstruct sp_pub_key_192\n{\n    ///Public key X\n    struct pub_key_192 X;\n    ///Public key Y\n    struct pub_key_192 Y;\n};\n\n///Simple pairing public keys 256\nstruct sp_pub_key_256\n{\n    ///Public key X\n    struct pub_key_256 X;\n    ///Public key Y\n    struct pub_key_256 Y;\n};\n\n///Supported LE states structure\nstruct le_states\n{\n    ///8-byte array for LE states\n    uint8_t  supp_states[LE_STATES_LEN];\n};\n\n///White List element structure\nstruct white_list\n{\n    ///BD address of device entry\n    struct bd_addr wl_bdaddr;\n    ///BD address type of device entry\n    uint8_t wl_bdaddr_type;\n};\n\n///CRC initial value structure\nstruct crc_init\n{\n    ///3-byte array CRC initial value\n    uint8_t crc[CRC_INIT_LEN];\n};\n\n///Session key diversifier master or slave structure\nstruct sess_k_div_x\n{\n    ///8-byte array for diversifier value\n    uint8_t skdiv[SESS_KEY_DIV_LEN];\n};\n\n///Session key diversifier structure\nstruct sess_k_div\n{\n    ///16-byte array for session key diversifier.\n    uint8_t skd[2*SESS_KEY_DIV_LEN];\n};\n\n///Initiator vector\nstruct init_vect\n{\n    ///4-byte array for vector\n    uint8_t iv[INIT_VECT_LEN];\n};\n\ntypedef struct t_public_key\n{\n    uint8_t x[PUBLIC_KEY_P256_LEN];\n    uint8_t y[PUBLIC_KEY_P256_LEN];\n\n} t_public_key;\n\n/// structure connection request\nstruct pdu_con_req\n{\n    /// access address\n    struct access_addr  aa;\n\n    /// CRC init\n    struct crc_init     crcinit;\n\n    /// window size\n    uint8_t             winsize;\n\n    /// window offset\n    uint16_t            winoffset;\n\n    /// interval\n    uint16_t            interval;\n\n    /// latency\n    uint16_t            latency;\n\n    /// timeout\n    uint16_t            timeout;\n\n    /// channel mapping\n    struct le_chnl_map  chm;\n\n    /// hopping\n    uint8_t             hop_sca;\n};\n\n/// Device specific link preferences\ntypedef struct\n{\n    // **** Data Length Management ****\n    /// Suggested value for the Controller's maximum transmitted number of payload octets\n    uint16_t   suggested_max_tx_octets;\n    /// Suggested value for the Controller's maximum packet transmission time (in us)\n    uint16_t   suggested_max_tx_time;\n\n    // ****    PHY  Management     ****\n    /// Default TX preferred PHY to use (@see enum le_phy_value)\n    uint8_t    tx_phys;\n    /// Default RX preferred PHY to use (@see enum le_phy_value)\n    uint8_t    rx_phys;\n} link_pref_t;\n\n\n/// @} CO_BT_DEFINES\n#endif // CO_BT_DEFINES_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_endian.h",
    "content": "#ifndef _CO_ENDIAN_H_\n#define _CO_ENDIAN_H_\n\n#include               // standard integer definitions\n#include \"rwip_config.h\"         // stack configuration\n#include \"arch.h\"                // architectural platform definition\n\n/**\n ****************************************************************************************\n * @defgroup CO_ENDIAN Endianness\n * @ingroup COMMON\n * @brief  Endianness conversion functions.\n *\n * This set of functions converts values between the local system\n * and a external one. It is inspired from the htonl-like functions\n * from the standard C library.\n *\n * Example:\n * @code\n *  struct eth_header   *header = get_header();  // get pointer on Eth II packet header\n *  uint16_t            eth_id;                  // will contain the type of the packet\n *  eth_id = co_ntohs(header->eth_id);           // retrieve the type with correct endianness\n * @endcode\n *\n * @{\n * ****************************************************************************************\n * */\n\n\n/**\n ****************************************************************************************\n * @brief Swap bytes of a 32 bits value.\n * The swap is done in every case. Should not be called directly.\n * @param[in] val32 The 32 bits value to swap.\n * @return The 32 bit swapped value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_bswap32(uint32_t val32)\n{\n    return (val32<<24) | ((val32<<8)&0xFF0000) | ((val32>>8)&0xFF00) | ((val32>>24)&0xFF);\n}\n\n/**\n ****************************************************************************************\n * @brief Swap bytes of a 16 bits value.\n * The swap is done in every case. Should not be called directly.\n * @param[in] val16 The 16 bit value to swap.\n * @return The 16 bit swapped value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint16_t co_bswap16(uint16_t val16)\n{\n    return ((val16<<8)&0xFF00) | ((val16>>8)&0xFF);\n}\n/// @} CO_ENDIAN\n\n\n\n\n/**\n * ****************************************************************************************\n * @defgroup CO_ENDIAN_NET Endianness (Network)\n * @ingroup CO_ENDIAN\n * @brief Endianness conversion functions for Network data\n *\n *  Converts values between the local system and big-endian network data\n *  (e.g. IP, Ethernet, but NOT WLAN).\n *\n *  The \\b host term in the descriptions of these functions refers\n *  to the local system, i.e. \\b application or \\b embedded system.\n *  Therefore, these functions will behave differently depending on which\n *  side they are used. The reason of this terminology is to keep the\n *  same name than the standard C function.\n *\n *  Behavior will depends on the endianness of the host:\n *  - little endian: swap bytes;\n *  - big endian: identity function.\n *\n *  @{\n * ****************************************************************************************\n *  */\n\n/**\n ****************************************************************************************\n * @brief Convert host to network long word.\n *\n * @param[in] hostlong    Long word value to convert.\n *\n * @return The converted long word.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_htonl(uint32_t hostlong)\n{\n    #if (!CPU_LE)\n        return hostlong;\n    #else\n        return co_bswap32(hostlong);\n    #endif // CPU_LE\n}\n\n/**\n ****************************************************************************************\n * @brief Convert host to network short word.\n *\n * @param[in] hostshort Short word value to convert.\n *\n * @return The converted short word.\n ****************************************************************************************\n */\n__STATIC __INLINE uint16_t co_htons(uint16_t hostshort)\n{\n    #if (!CPU_LE)\n        return hostshort;\n    #else\n        return co_bswap16(hostshort);\n    #endif // CPU_LE\n}\n\n/**\n ****************************************************************************************\n * @brief Convert network to host long word.\n *\n * @param[in] netlong Long word value to convert.\n *\n * @return The converted long word.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_ntohl(uint32_t netlong)\n{\n    return co_htonl(netlong);\n}\n\n/**\n ****************************************************************************************\n * @brief Convert network to host short word.\n *\n * @param[in] netshort Short word value to convert.\n *\n * @return The converted short word.\n ****************************************************************************************\n */\n__STATIC __INLINE uint16_t co_ntohs(uint16_t netshort)\n{\n    return co_htons(netshort);\n}\n/// @} CO_ENDIAN_NET\n\n/**\n * ****************************************************************************************\n * @defgroup CO_ENDIAN_BT Endianness (BT)\n *  @ingroup CO_ENDIAN\n *  @brief Endianness conversion functions for Bluetooth data (HCI and protocol)\n *\n *  Converts values between the local system and little-endian Bluetooth data.\n *\n *  The \\b host term in the descriptions of these functions refers\n *  to the local system (check \\ref CO_ENDIAN_NET \"this comment\").\n *\n *  Behavior will depends on the endianness of the host:\n *  - little endian: identity function;\n *  - big endian: swap bytes.\n *\n *  @addtogroup CO_ENDIAN_BT\n *  @{\n *  ****************************************************************************************\n *  */\n\n/**\n ****************************************************************************************\n * @brief Convert host to Bluetooth long word.\n *\n * @param[in] hostlong Long word value to convert.\n *\n * @return The converted long word.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_htobl(uint32_t hostlong)\n{\n    #if (CPU_LE)\n        return hostlong;\n    #else\n        return co_bswap32(hostlong);\n    #endif // CPU_LE\n}\n\n/**\n ****************************************************************************************\n * @brief Convert host to Bluetooth short word.\n *\n * @param[in] hostshort Short word value to convert.\n *\n * @return The converted short word.\n ****************************************************************************************\n */\n__STATIC __INLINE uint16_t co_htobs(uint16_t hostshort)\n{\n    #if (CPU_LE)\n        return hostshort;\n    #else\n        return co_bswap16(hostshort);\n    #endif // CPU_LE\n}\n\n\n/**\n ****************************************************************************************\n * @brief Convert Bluetooth to host long word.\n *\n * @param[in] btlong Long word value to convert.\n *\n * @return The converted long word.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_btohl(uint32_t btlong)\n{\n    return co_htobl(btlong);\n}\n\n\n/**\n ****************************************************************************************\n * @brief Convert Bluetooth to host short word.\n *\n * @param[in] btshort Short word value to convert.\n *\n * @return The converted short word.\n ****************************************************************************************\n */\n__STATIC __INLINE uint16_t co_btohs(uint16_t btshort)\n{\n    return co_htobs(btshort);\n}\n/// @} CO_ENDIAN\n\n#endif // _CO_ENDIAN_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_error.h",
    "content": "#ifndef CO_ERROR_H_\n#define CO_ERROR_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CO_ERROR Error Codes\n * @ingroup COMMON\n * @brief Defines error codes in messages.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\nenum co_error\n{\n/*****************************************************\n ***              ERROR CODES                      ***\n *****************************************************/\n\n    CO_ERROR_NO_ERROR                        = 0x00,\n    CO_ERROR_UNKNOWN_HCI_COMMAND             = 0x01,\n    CO_ERROR_UNKNOWN_CONNECTION_ID           = 0x02,\n    CO_ERROR_HARDWARE_FAILURE                = 0x03,\n    CO_ERROR_PAGE_TIMEOUT                    = 0x04,\n    CO_ERROR_AUTH_FAILURE                    = 0x05,\n    CO_ERROR_PIN_MISSING                     = 0x06,\n    CO_ERROR_MEMORY_CAPA_EXCEED              = 0x07,\n    CO_ERROR_CON_TIMEOUT                     = 0x08,\n    CO_ERROR_CON_LIMIT_EXCEED                = 0x09,\n    CO_ERROR_SYNC_CON_LIMIT_DEV_EXCEED       = 0x0A,\n    CO_ERROR_ACL_CON_EXISTS                  = 0x0B,\n    CO_ERROR_COMMAND_DISALLOWED              = 0x0C,\n    CO_ERROR_CONN_REJ_LIMITED_RESOURCES      = 0x0D,\n    CO_ERROR_CONN_REJ_SECURITY_REASONS       = 0x0E,\n    CO_ERROR_CONN_REJ_UNACCEPTABLE_BDADDR    = 0x0F,\n    CO_ERROR_CONN_ACCEPT_TIMEOUT_EXCEED      = 0x10,\n    CO_ERROR_UNSUPPORTED                     = 0x11,\n    CO_ERROR_INVALID_HCI_PARAM               = 0x12,\n    CO_ERROR_REMOTE_USER_TERM_CON            = 0x13,\n    CO_ERROR_REMOTE_DEV_TERM_LOW_RESOURCES   = 0x14,\n    CO_ERROR_REMOTE_DEV_POWER_OFF            = 0x15,\n    CO_ERROR_CON_TERM_BY_LOCAL_HOST          = 0x16,\n    CO_ERROR_REPEATED_ATTEMPTS               = 0x17,\n    CO_ERROR_PAIRING_NOT_ALLOWED             = 0x18,\n    CO_ERROR_UNKNOWN_LMP_PDU                 = 0x19,\n    CO_ERROR_UNSUPPORTED_REMOTE_FEATURE      = 0x1A,\n    CO_ERROR_SCO_OFFSET_REJECTED             = 0x1B,\n    CO_ERROR_SCO_INTERVAL_REJECTED           = 0x1C,\n    CO_ERROR_SCO_AIR_MODE_REJECTED           = 0x1D,\n    CO_ERROR_INVALID_LMP_PARAM               = 0x1E,\n    CO_ERROR_UNSPECIFIED_ERROR               = 0x1F,\n    CO_ERROR_UNSUPPORTED_LMP_PARAM_VALUE     = 0x20,\n    CO_ERROR_ROLE_CHANGE_NOT_ALLOWED         = 0x21,\n    CO_ERROR_LMP_RSP_TIMEOUT                 = 0x22,\n    CO_ERROR_LMP_COLLISION                   = 0x23,\n    CO_ERROR_LMP_PDU_NOT_ALLOWED             = 0x24,\n    CO_ERROR_ENC_MODE_NOT_ACCEPT             = 0x25,\n    CO_ERROR_LINK_KEY_CANT_CHANGE            = 0x26,\n    CO_ERROR_QOS_NOT_SUPPORTED               = 0x27,\n    CO_ERROR_INSTANT_PASSED                  = 0x28,\n    CO_ERROR_PAIRING_WITH_UNIT_KEY_NOT_SUP   = 0x29,\n    CO_ERROR_DIFF_TRANSACTION_COLLISION      = 0x2A,\n    CO_ERROR_QOS_UNACCEPTABLE_PARAM          = 0x2C,\n    CO_ERROR_QOS_REJECTED                    = 0x2D,\n    CO_ERROR_CHANNEL_CLASS_NOT_SUP           = 0x2E,\n    CO_ERROR_INSUFFICIENT_SECURITY           = 0x2F,\n    CO_ERROR_PARAM_OUT_OF_MAND_RANGE         = 0x30,\n    CO_ERROR_ROLE_SWITCH_PEND                = 0x32, /* LM_ROLE_SWITCH_PENDING               */\n    CO_ERROR_RESERVED_SLOT_VIOLATION         = 0x34, /* LM_RESERVED_SLOT_VIOLATION           */\n    CO_ERROR_ROLE_SWITCH_FAIL                = 0x35, /* LM_ROLE_SWITCH_FAILED                */\n    CO_ERROR_EIR_TOO_LARGE                   = 0x36, /* LM_EXTENDED_INQUIRY_RESPONSE_TOO_LARGE */\n    CO_ERROR_SP_NOT_SUPPORTED_HOST           = 0x37,\n    CO_ERROR_HOST_BUSY_PAIRING               = 0x38,\n    CO_ERROR_CONTROLLER_BUSY                 = 0x3A,\n    CO_ERROR_UNACCEPTABLE_CONN_PARAM         = 0x3B,\n    CO_ERROR_DIRECT_ADV_TO                   = 0x3C,\n    CO_ERROR_TERMINATED_MIC_FAILURE          = 0x3D,\n    CO_ERROR_CONN_FAILED_TO_BE_EST           = 0x3E,\n    CO_ERROR_CCA_REJ_USE_CLOCK_DRAG          = 0x40,\n    CO_ERROR_TYPE0_SUBMAP_NOT_DEFINED        = 0x41,\n    CO_ERROR_UNKNOWN_ADVERTISING_ID          = 0x42,\n    CO_ERROR_LIMIT_REACHED                   = 0x43,\n    CO_ERROR_OPERATION_CANCELED_BY_HOST      = 0x44,\n    CO_ERROR_UNDEFINED                       = 0xFF,\n\n\n/*****************************************************\n ***              HW ERROR CODES                   ***\n *****************************************************/\n\n    CO_ERROR_HW_UART_OUT_OF_SYNC            = 0x00,\n    CO_ERROR_HW_MEM_ALLOC_FAIL              = 0x01,\n};\n\n/// @} CO_ERROR\n\n#endif // CO_ERROR_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_hci.h",
    "content": "#ifndef CO_HCI_H_\n#define CO_HCI_H_\n\n/**\n ****************************************************************************************\n * @addtogroup COMMON Common SW Block\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include        // standard boolean definitions\n#include         // standard definitions\n#include         // standard integer definitions\n\n#include \"rwip_config.h\"   // IP configuration\n\n#include \"compiler.h\"      // compiler definitions\n#include \"hci_api.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/******************************************************************************************/\n/* -------------------------   H4TL DEFINITIONS Part IV.A    -----------------------------*/\n/******************************************************************************************/\n\n///HCI Transport Header length - change if different transport\n#define HCI_TRANSPORT_HDR_LEN                       0x01\n\n///UART header: command message type\n#define HCI_CMD_MSG_TYPE                            0x01\n\n///UART header: ACL data message type\n#define HCI_ACL_MSG_TYPE                            0x02\n\n///UART header: Synchronous data message type\n#define HCI_SYNC_MSG_TYPE                           0x03\n\n///UART header: event message type\n#define HCI_EVT_MSG_TYPE                            0x04\n\n///UART header: event message type\n#define HCI_TCI_MSG_TYPE                            0xFF\n\n/******************************************************************************************/\n/* -------------------------   HCI DEFINITIONS Part II.E     -----------------------------*/\n/******************************************************************************************/\n\n///HCI Command Opcode byte length\n#define HCI_CMD_OPCODE_LEN         (0x02)\n\n///HCI Event code byte length\n#define HCI_EVT_CODE_LEN           (0x01)\n\n///HCI Command/Event parameter length field byte length\n#define HCI_CMDEVT_PARLEN_LEN      (0x01)\n\n///HCI Command header length\n#define HCI_CMD_HDR_LEN            (HCI_CMD_OPCODE_LEN + HCI_CMDEVT_PARLEN_LEN)\n\n///HCI Event header length\n#define HCI_EVT_HDR_LEN            (HCI_EVT_CODE_LEN + HCI_CMDEVT_PARLEN_LEN)\n\n/// HCI ACL header: handle and flags decoding\nenum  hci_acl_hdr_fields\n{\n\n    /// bits[00:11]: Connection handle\n    HCI_ACL_HDR_HDL_LSB        = (0),\n    HCI_ACL_HDR_HDL_MASK       = (0x0FFF),\n    /// bits[12:13]: Packet boundary flag\n    HCI_ACL_HDR_PB_FLAG_LSB    = (12),\n    HCI_ACL_HDR_PB_FLAG_MASK   = (0x3000),\n    /// bits[14:15]: Broadcast flag\n    HCI_ACL_HDR_BC_FLAG_LSB    = (14),\n    HCI_ACL_HDR_BC_FLAG_MASK   = (0xC000),\n\n    /// Packet boundary and Broadcast flags\n    HCI_ACL_HDR_DATA_FLAG_LSB  = (12),\n    HCI_ACL_HDR_DATA_FLAG_MASK = (0xF000),\n};\n\n#define HCI_ACL_HDR_HDL_FLAGS_POS  (0)\n#define HCI_ACL_HDR_HDL_FLAGS_LEN  (2)\n/// HCI ACL header: data length field length\n#define HCI_ACL_HDR_DATA_LEN_POS   (HCI_ACL_HDR_HDL_FLAGS_LEN)\n#define HCI_ACL_HDR_DATA_LEN_LEN   (2)\n\n///HCI ACL data packet header length\n#define HCI_ACL_HDR_LEN            (HCI_ACL_HDR_HDL_FLAGS_LEN + HCI_ACL_HDR_DATA_LEN_LEN)\n\n/// HCI Synchronous header: handle and flags decoding\n#define HCI_SYNC_HDR_HDL_FLAGS_POS  (0)\n#define HCI_SYNC_HDR_HDL_FLAGS_LEN  (2)\n#define HCI_SYNC_HDR_HDL_POS        (0)\n#define HCI_SYNC_HDR_HDL_MASK       (0x0FFF)\n#define HCI_SYNC_HDR_PSF_FLAG_POS   (12)\n#define HCI_SYNC_HDR_PSF_FLAG_MASK  (0x3000)\n#define HCI_SYNC_HDR_RES_FLAG_POS   (14)\n#define HCI_SYNC_HDR_RES_FLAG_MASK  (0xC000)\n#define HCI_SYNC_HDR_DATA_FLAG_POS  (12)\n#define HCI_SYNC_HDR_DATA_FLAG_MASK (0xF000)\n\n/// HCI Synchronous header: data length field length\n#define HCI_SYNC_HDR_DATA_LEN_POS   (HCI_SYNC_HDR_HDL_FLAGS_LEN)\n#define HCI_SYNC_HDR_DATA_LEN_LEN   (1)\n#define HCI_SYNC_MAX_DATA_SIZE      (255)\n\n///HCI sync data packet header length\n#define HCI_SYNC_HDR_LEN           (HCI_SYNC_HDR_HDL_FLAGS_LEN + HCI_SYNC_HDR_DATA_LEN_LEN)\n\n///HCI Command Complete Event minimum parameter length: 1(nb_pk)+2(opcode)\n#define HCI_CCEVT_HDR_PARLEN       (0x03)\n\n///HCI Command Complete Event header length:1(code)+1(len)+1(pk)+2(opcode)\n#define HCI_CCEVT_HDR_LEN          (HCI_EVT_HDR_LEN + HCI_CCEVT_HDR_PARLEN)\n\n///HCI Basic Command Complete Event packet length\n#define HCI_CCEVT_BASIC_LEN        (HCI_CCEVT_HDR_LEN + 1)\n\n///HCI Command Status Event parameter length - constant\n#define HCI_CSEVT_PARLEN           (0x04)\n\n///HCI Command Status Event length:1(code)+1(len)+1(st)+1(pk)+2(opcode)\n#define HCI_CSEVT_LEN              (HCI_EVT_HDR_LEN + HCI_CSEVT_PARLEN)\n\n///HCI Reset Command parameter length\n#define HCI_RESET_CMD_PARLEN       0\n\n/// Default return parameter length for HCI Command Complete Event\n#define HCI_CCEVT_BASIC_RETPAR_LEN 1\n\n/// Max HCI commands param size\n#define HCI_MAX_CMD_PARAM_SIZE    255\n\n/// Macro to extract OCF from OPCODE\n#define HCI_OP2OCF(opcode)        ((opcode) & 0x03FF)\n\n/// Macro to extract OGF from OPCODE\n#define HCI_OP2OGF(opcode)        ((opcode) >> 10 & 0x003F)\n\n/// Macro to create OPCODE from OGF and OCF\n#define HCI_OPCODE(ocf, ogf)      (((ogf) << 10) | ocf)\n\n/// Maximum length of HCI advertising data fragments\n#define HCI_ADV_DATA_FRAG_MAX_LEN        252\n\n\n/**************************************************************************************\n **************                       HCI COMMANDS                     ****************\n **************************************************************************************/\n\n///HCI enumeration of possible Command OGF values.\nenum\n{\n    ///HCI Link Control Commands Group OGF code\n    LK_CNTL_OGF = 0x01,\n    ///HCI Link Policy Commands Group OGF code\n    LK_POL_OGF,\n    ///HCI Controller and Baseband Commands Group OGF code\n    CNTLR_BB_OGF,\n    ///HCI Information Parameters Commands Group OGF code\n    INFO_PAR_OGF,\n    ///HCI Status Commands Group OGF code\n    STAT_PAR_OGF,\n    ///HCI Test Commands Group OGF code\n    TEST_OGF,\n    ///HCI Low Energy Commands Group OGF code\n    LE_CNTLR_OGF=0x08,\n    ///HCI Vendor Specific Group OGF code\n    VS_OGF = 0x3F,\n    MAX_OGF\n};\n\n\n///Commands Opcodes: OGF(6b) | OCF(10b)\n/* Some Abbreviation used in names:\n *  - LK   = Link Key\n *  - RD   = Read\n *  - WR   = Write\n *  - REM  = Remote\n *  - STG  = Settings\n *  - CON  = Connection\n *  - CHG  = Change\n *  - DFT  = Default\n *  - PER  = Periodic\n */\n\n///HCI enumeration of possible Command OP Codes.\nenum hci_opcode\n{\n    HCI_NO_OPERATION_CMD_OPCODE               = 0x0000,\n\n    //Link Control Commands\n    HCI_INQ_CMD_OPCODE                        = 0x0401,\n    HCI_INQ_CANCEL_CMD_OPCODE                 = 0x0402,\n    HCI_PER_INQ_MODE_CMD_OPCODE               = 0x0403,\n    HCI_EXIT_PER_INQ_MODE_CMD_OPCODE          = 0x0404,\n    HCI_CREATE_CON_CMD_OPCODE                 = 0x0405,\n    HCI_DISCONNECT_CMD_OPCODE                 = 0x0406,\n    HCI_CREATE_CON_CANCEL_CMD_OPCODE          = 0x0408,\n    HCI_ACCEPT_CON_REQ_CMD_OPCODE             = 0x0409,\n    HCI_REJECT_CON_REQ_CMD_OPCODE             = 0x040A,\n    HCI_LK_REQ_REPLY_CMD_OPCODE               = 0x040B,\n    HCI_LK_REQ_NEG_REPLY_CMD_OPCODE           = 0x040C,\n    HCI_PIN_CODE_REQ_REPLY_CMD_OPCODE         = 0x040D,\n    HCI_PIN_CODE_REQ_NEG_REPLY_CMD_OPCODE     = 0x040E,\n    HCI_CHG_CON_PKT_TYPE_CMD_OPCODE           = 0x040F,\n    HCI_AUTH_REQ_CMD_OPCODE                   = 0x0411,\n    HCI_SET_CON_ENC_CMD_OPCODE                = 0x0413,\n    HCI_CHG_CON_LK_CMD_OPCODE                 = 0x0415,\n    HCI_MASTER_LK_CMD_OPCODE                  = 0x0417,\n    HCI_REM_NAME_REQ_CMD_OPCODE               = 0x0419,\n    HCI_REM_NAME_REQ_CANCEL_CMD_OPCODE        = 0x041A,\n    HCI_RD_REM_SUPP_FEATS_CMD_OPCODE          = 0x041B,\n    HCI_RD_REM_EXT_FEATS_CMD_OPCODE           = 0x041C,\n    HCI_RD_REM_VER_INFO_CMD_OPCODE            = 0x041D,\n    HCI_RD_CLK_OFF_CMD_OPCODE                 = 0x041F,\n    HCI_RD_LMP_HDL_CMD_OPCODE                 = 0x0420,\n    HCI_SETUP_SYNC_CON_CMD_OPCODE             = 0x0428,\n    HCI_ACCEPT_SYNC_CON_REQ_CMD_OPCODE        = 0x0429,\n    HCI_REJECT_SYNC_CON_REQ_CMD_OPCODE        = 0x042A,\n    HCI_IO_CAP_REQ_REPLY_CMD_OPCODE           = 0x042B,\n    HCI_USER_CFM_REQ_REPLY_CMD_OPCODE         = 0x042C,\n    HCI_USER_CFM_REQ_NEG_REPLY_CMD_OPCODE     = 0x042D,\n    HCI_USER_PASSKEY_REQ_REPLY_CMD_OPCODE     = 0x042E,\n    HCI_USER_PASSKEY_REQ_NEG_REPLY_CMD_OPCODE = 0x042F,\n    HCI_REM_OOB_DATA_REQ_REPLY_CMD_OPCODE     = 0x0430,\n    HCI_REM_OOB_DATA_REQ_NEG_REPLY_CMD_OPCODE = 0x0433,\n    HCI_IO_CAP_REQ_NEG_REPLY_CMD_OPCODE       = 0x0434,\n    HCI_ENH_SETUP_SYNC_CON_CMD_OPCODE         = 0x043D,\n    HCI_ENH_ACCEPT_SYNC_CON_CMD_OPCODE        = 0x043E,\n    HCI_TRUNC_PAGE_CMD_OPCODE                 = 0x043F,\n    HCI_TRUNC_PAGE_CAN_CMD_OPCODE             = 0x0440,\n    HCI_SET_CON_SLV_BCST_CMD_OPCODE           = 0x0441,\n    HCI_SET_CON_SLV_BCST_REC_CMD_OPCODE       = 0x0442,\n    HCI_START_SYNC_TRAIN_CMD_OPCODE           = 0x0443,\n    HCI_REC_SYNC_TRAIN_CMD_OPCODE             = 0x0444,\n    HCI_REM_OOB_EXT_DATA_REQ_REPLY_CMD_OPCODE = 0x0445,\n\n    //Link Policy Commands\n    HCI_HOLD_MODE_CMD_OPCODE                  = 0x0801,\n    HCI_SNIFF_MODE_CMD_OPCODE                 = 0x0803,\n    HCI_EXIT_SNIFF_MODE_CMD_OPCODE            = 0x0804,\n    HCI_PARK_STATE_CMD_OPCODE                 = 0x0805,\n    HCI_EXIT_PARK_STATE_CMD_OPCODE            = 0x0806,\n    HCI_QOS_SETUP_CMD_OPCODE                  = 0x0807,\n    HCI_ROLE_DISCOVERY_CMD_OPCODE             = 0x0809,\n    HCI_SWITCH_ROLE_CMD_OPCODE                = 0x080B,\n    HCI_RD_LINK_POL_STG_CMD_OPCODE            = 0x080C,\n    HCI_WR_LINK_POL_STG_CMD_OPCODE            = 0x080D,\n    HCI_RD_DFT_LINK_POL_STG_CMD_OPCODE        = 0x080E,\n    HCI_WR_DFT_LINK_POL_STG_CMD_OPCODE        = 0x080F,\n    HCI_FLOW_SPEC_CMD_OPCODE                  = 0x0810,\n    HCI_SNIFF_SUB_CMD_OPCODE                  = 0x0811,\n\n    //Controller and Baseband Commands\n    HCI_SET_EVT_MASK_CMD_OPCODE               = 0x0C01,\n    HCI_RESET_CMD_OPCODE                      = 0x0C03,\n    HCI_SET_EVT_FILTER_CMD_OPCODE             = 0x0C05,\n    HCI_FLUSH_CMD_OPCODE                      = 0x0C08,\n    HCI_RD_PIN_TYPE_CMD_OPCODE                = 0x0C09,\n    HCI_WR_PIN_TYPE_CMD_OPCODE                = 0x0C0A,\n    HCI_CREATE_NEW_UNIT_KEY_CMD_OPCODE        = 0x0C0B,\n    HCI_RD_STORED_LK_CMD_OPCODE               = 0x0C0D,\n    HCI_WR_STORED_LK_CMD_OPCODE               = 0x0C11,\n    HCI_DEL_STORED_LK_CMD_OPCODE              = 0x0C12,\n    HCI_WR_LOCAL_NAME_CMD_OPCODE              = 0x0C13,\n    HCI_RD_LOCAL_NAME_CMD_OPCODE              = 0x0C14,\n    HCI_RD_CON_ACCEPT_TO_CMD_OPCODE           = 0x0C15,\n    HCI_WR_CON_ACCEPT_TO_CMD_OPCODE           = 0x0C16,\n    HCI_RD_PAGE_TO_CMD_OPCODE                 = 0x0C17,\n    HCI_WR_PAGE_TO_CMD_OPCODE                 = 0x0C18,\n    HCI_RD_SCAN_EN_CMD_OPCODE                 = 0x0C19,\n    HCI_WR_SCAN_EN_CMD_OPCODE                 = 0x0C1A,\n    HCI_RD_PAGE_SCAN_ACT_CMD_OPCODE           = 0x0C1B,\n    HCI_WR_PAGE_SCAN_ACT_CMD_OPCODE           = 0x0C1C,\n    HCI_RD_INQ_SCAN_ACT_CMD_OPCODE            = 0x0C1D,\n    HCI_WR_INQ_SCAN_ACT_CMD_OPCODE            = 0x0C1E,\n    HCI_RD_AUTH_EN_CMD_OPCODE                 = 0x0C1F,\n    HCI_WR_AUTH_EN_CMD_OPCODE                 = 0x0C20,\n    HCI_RD_CLASS_OF_DEV_CMD_OPCODE            = 0x0C23,\n    HCI_WR_CLASS_OF_DEV_CMD_OPCODE            = 0x0C24,\n    HCI_RD_VOICE_STG_CMD_OPCODE               = 0x0C25,\n    HCI_WR_VOICE_STG_CMD_OPCODE               = 0x0C26,\n    HCI_RD_AUTO_FLUSH_TO_CMD_OPCODE           = 0x0C27,\n    HCI_WR_AUTO_FLUSH_TO_CMD_OPCODE           = 0x0C28,\n    HCI_RD_NB_BDCST_RETX_CMD_OPCODE           = 0x0C29,\n    HCI_WR_NB_BDCST_RETX_CMD_OPCODE           = 0x0C2A,\n    HCI_RD_HOLD_MODE_ACTIVITY_CMD_OPCODE      = 0x0C2B,\n    HCI_WR_HOLD_MODE_ACTIVITY_CMD_OPCODE      = 0x0C2C,\n    HCI_RD_TX_PWR_LVL_CMD_OPCODE              = 0x0C2D,\n    HCI_RD_SYNC_FLOW_CTRL_EN_CMD_OPCODE       = 0x0C2E,\n    HCI_WR_SYNC_FLOW_CTRL_EN_CMD_OPCODE       = 0x0C2F,\n    HCI_SET_CTRL_TO_HOST_FLOW_CTRL_CMD_OPCODE = 0x0C31,\n    HCI_HOST_BUF_SIZE_CMD_OPCODE              = 0x0C33,\n    HCI_HOST_NB_CMP_PKTS_CMD_OPCODE           = 0x0C35,\n    HCI_RD_LINK_SUPV_TO_CMD_OPCODE            = 0x0C36,\n    HCI_WR_LINK_SUPV_TO_CMD_OPCODE            = 0x0C37,\n    HCI_RD_NB_SUPP_IAC_CMD_OPCODE             = 0x0C38,\n    HCI_RD_CURR_IAC_LAP_CMD_OPCODE            = 0x0C39,\n    HCI_WR_CURR_IAC_LAP_CMD_OPCODE            = 0x0C3A,\n    HCI_SET_AFH_HOST_CH_CLASS_CMD_OPCODE      = 0x0C3F,\n    HCI_RD_INQ_SCAN_TYPE_CMD_OPCODE           = 0x0C42,\n    HCI_WR_INQ_SCAN_TYPE_CMD_OPCODE           = 0x0C43,\n    HCI_RD_INQ_MODE_CMD_OPCODE                = 0x0C44,\n    HCI_WR_INQ_MODE_CMD_OPCODE                = 0x0C45,\n    HCI_RD_PAGE_SCAN_TYPE_CMD_OPCODE          = 0x0C46,\n    HCI_WR_PAGE_SCAN_TYPE_CMD_OPCODE          = 0x0C47,\n    HCI_RD_AFH_CH_ASSESS_MODE_CMD_OPCODE      = 0x0C48,\n    HCI_WR_AFH_CH_ASSESS_MODE_CMD_OPCODE      = 0x0C49,\n    HCI_RD_EXT_INQ_RSP_CMD_OPCODE             = 0x0C51,\n    HCI_WR_EXT_INQ_RSP_CMD_OPCODE             = 0x0C52,\n    HCI_REFRESH_ENC_KEY_CMD_OPCODE            = 0x0C53,\n    HCI_RD_SP_MODE_CMD_OPCODE                 = 0x0C55,\n    HCI_WR_SP_MODE_CMD_OPCODE                 = 0x0C56,\n    HCI_RD_LOC_OOB_DATA_CMD_OPCODE            = 0x0C57,\n    HCI_RD_INQ_RSP_TX_PWR_LVL_CMD_OPCODE      = 0x0C58,\n    HCI_WR_INQ_TX_PWR_LVL_CMD_OPCODE          = 0x0C59,\n    HCI_RD_DFT_ERR_DATA_REP_CMD_OPCODE        = 0x0C5A,\n    HCI_WR_DFT_ERR_DATA_REP_CMD_OPCODE        = 0x0C5B,\n    HCI_ENH_FLUSH_CMD_OPCODE                  = 0x0C5F,\n    HCI_SEND_KEYPRESS_NOTIF_CMD_OPCODE        = 0x0C60,\n    HCI_SET_EVT_MASK_PAGE_2_CMD_OPCODE        = 0x0C63,\n    HCI_RD_FLOW_CNTL_MODE_CMD_OPCODE          = 0x0C66,\n    HCI_WR_FLOW_CNTL_MODE_CMD_OPCODE          = 0x0C67,\n    HCI_RD_ENH_TX_PWR_LVL_CMD_OPCODE          = 0x0C68,\n    HCI_RD_LE_HOST_SUPP_CMD_OPCODE            = 0x0C6C,\n    HCI_WR_LE_HOST_SUPP_CMD_OPCODE            = 0x0C6D,\n    HCI_SET_MWS_CHANNEL_PARAMS_CMD_OPCODE     = 0x0C6E,\n    HCI_SET_EXTERNAL_FRAME_CONFIG_CMD_OPCODE  = 0x0C6F,\n    HCI_SET_MWS_SIGNALING_CMD_OPCODE          = 0x0C70,\n    HCI_SET_MWS_TRANSPORT_LAYER_CMD_OPCODE    = 0x0C71,\n    HCI_SET_MWS_SCAN_FREQ_TABLE_CMD_OPCODE    = 0x0C72,\n    HCI_SET_MWS_PATTERN_CONFIG_CMD_OPCODE     = 0x0C73,\n    HCI_SET_RES_LT_ADDR_CMD_OPCODE            = 0x0C74,\n    HCI_DEL_RES_LT_ADDR_CMD_OPCODE            = 0x0C75,\n    HCI_SET_CON_SLV_BCST_DATA_CMD_OPCODE      = 0x0C76,\n    HCI_RD_SYNC_TRAIN_PARAM_CMD_OPCODE        = 0x0C77,\n    HCI_WR_SYNC_TRAIN_PARAM_CMD_OPCODE        = 0x0C78,\n    HCI_RD_SEC_CON_HOST_SUPP_CMD_OPCODE       = 0x0C79,\n    HCI_WR_SEC_CON_HOST_SUPP_CMD_OPCODE       = 0x0C7A,\n    HCI_RD_AUTH_PAYL_TO_CMD_OPCODE            = 0x0C7B,\n    HCI_WR_AUTH_PAYL_TO_CMD_OPCODE            = 0x0C7C,\n    HCI_RD_LOC_OOB_EXT_DATA_CMD_OPCODE        = 0x0C7D,\n    HCI_RD_EXT_PAGE_TO_CMD_OPCODE             = 0x0C7E,\n    HCI_WR_EXT_PAGE_TO_CMD_OPCODE             = 0x0C7F,\n    HCI_RD_EXT_INQ_LEN_CMD_OPCODE             = 0x0C80,\n    HCI_WR_EXT_INQ_LEN_CMD_OPCODE             = 0x0C81,\n\n    //Info Params\n    HCI_RD_LOCAL_VER_INFO_CMD_OPCODE          = 0x1001,\n    HCI_RD_LOCAL_SUPP_CMDS_CMD_OPCODE         = 0x1002,\n    HCI_RD_LOCAL_SUPP_FEATS_CMD_OPCODE        = 0x1003,\n    HCI_RD_LOCAL_EXT_FEATS_CMD_OPCODE         = 0x1004,\n    HCI_RD_BUFF_SIZE_CMD_OPCODE               = 0x1005,\n    HCI_RD_BD_ADDR_CMD_OPCODE                 = 0x1009,\n    HCI_RD_LOCAL_SUPP_CODECS_CMD_OPCODE       = 0x100B,\n\n    //Status Params\n    HCI_RD_FAIL_CONTACT_CNT_CMD_OPCODE        = 0x1401,\n    HCI_RST_FAIL_CONTACT_CNT_CMD_OPCODE       = 0x1402,\n    HCI_RD_LINK_QUAL_CMD_OPCODE               = 0x1403,\n    HCI_RD_RSSI_CMD_OPCODE                    = 0x1405,\n    HCI_RD_AFH_CH_MAP_CMD_OPCODE              = 0x1406,\n    HCI_RD_CLK_CMD_OPCODE                     = 0x1407,\n    HCI_RD_ENC_KEY_SIZE_CMD_OPCODE            = 0x1408,\n    HCI_GET_MWS_TRANSPORT_LAYER_CONFIG_CMD_OPCODE = 0x140C,\n\n    //Testing Commands\n    HCI_RD_LOOPBACK_MODE_CMD_OPCODE           = 0x1801,\n    HCI_WR_LOOPBACK_MODE_CMD_OPCODE           = 0x1802,\n    HCI_EN_DUT_MODE_CMD_OPCODE                = 0x1803,\n    HCI_WR_SP_DBG_MODE_CMD_OPCODE             = 0x1804,\n\n    /// LE Commands Opcodes\n    HCI_LE_SET_EVT_MASK_CMD_OPCODE                 = 0x2001,\n    HCI_LE_RD_BUFF_SIZE_CMD_OPCODE                 = 0x2002,\n    HCI_LE_RD_LOCAL_SUPP_FEATS_CMD_OPCODE          = 0x2003,\n    HCI_LE_SET_RAND_ADDR_CMD_OPCODE                = 0x2005,\n    HCI_LE_SET_ADV_PARAM_CMD_OPCODE                = 0x2006,\n    HCI_LE_RD_ADV_CHNL_TX_PW_CMD_OPCODE            = 0x2007,\n    HCI_LE_SET_ADV_DATA_CMD_OPCODE                 = 0x2008,\n    HCI_LE_SET_SCAN_RSP_DATA_CMD_OPCODE            = 0x2009,\n    HCI_LE_SET_ADV_EN_CMD_OPCODE                   = 0x200A,\n    HCI_LE_SET_SCAN_PARAM_CMD_OPCODE               = 0x200B,\n    HCI_LE_SET_SCAN_EN_CMD_OPCODE                  = 0x200C,\n    HCI_LE_CREATE_CON_CMD_OPCODE                   = 0x200D,\n    HCI_LE_CREATE_CON_CANCEL_CMD_OPCODE            = 0x200E,\n    HCI_LE_RD_WLST_SIZE_CMD_OPCODE                 = 0x200F,\n    HCI_LE_CLEAR_WLST_CMD_OPCODE                   = 0x2010,\n    HCI_LE_ADD_DEV_TO_WLST_CMD_OPCODE              = 0x2011,\n    HCI_LE_RMV_DEV_FROM_WLST_CMD_OPCODE            = 0x2012,\n    HCI_LE_CON_UPDATE_CMD_OPCODE                   = 0x2013,\n    HCI_LE_SET_HOST_CH_CLASS_CMD_OPCODE            = 0x2014,\n    HCI_LE_RD_CHNL_MAP_CMD_OPCODE                  = 0x2015,\n    HCI_LE_RD_REM_FEATS_CMD_OPCODE                 = 0x2016,\n    HCI_LE_ENC_CMD_OPCODE                          = 0x2017,\n    HCI_LE_RAND_CMD_OPCODE                         = 0x2018,\n    HCI_LE_START_ENC_CMD_OPCODE                    = 0x2019,\n    HCI_LE_LTK_REQ_REPLY_CMD_OPCODE                = 0x201A,\n    HCI_LE_LTK_REQ_NEG_REPLY_CMD_OPCODE            = 0x201B,\n    HCI_LE_RD_SUPP_STATES_CMD_OPCODE               = 0x201C,\n    HCI_LE_RX_TEST_CMD_OPCODE                      = 0x201D,\n    HCI_LE_TX_TEST_CMD_OPCODE                      = 0x201E,\n    HCI_LE_TEST_END_CMD_OPCODE                     = 0x201F,\n    HCI_LE_REM_CON_PARAM_REQ_REPLY_CMD_OPCODE      = 0x2020,\n    HCI_LE_REM_CON_PARAM_REQ_NEG_REPLY_CMD_OPCODE  = 0x2021,\n    HCI_LE_SET_DATA_LEN_CMD_OPCODE                 = 0x2022,\n    HCI_LE_RD_SUGGTED_DFT_DATA_LEN_CMD_OPCODE      = 0x2023,\n    HCI_LE_WR_SUGGTED_DFT_DATA_LEN_CMD_OPCODE      = 0x2024,\n    HCI_LE_RD_LOC_P256_PUB_KEY_CMD_OPCODE          = 0x2025,\n    HCI_LE_GEN_DHKEY_CMD_OPCODE                    = 0x2026,\n    HCI_LE_ADD_DEV_TO_RSLV_LIST_CMD_OPCODE         = 0x2027,\n    HCI_LE_RMV_DEV_FROM_RSLV_LIST_CMD_OPCODE       = 0x2028,\n    HCI_LE_CLEAR_RSLV_LIST_CMD_OPCODE              = 0x2029,\n    HCI_LE_RD_RSLV_LIST_SIZE_CMD_OPCODE            = 0x202A,\n    HCI_LE_RD_PEER_RSLV_ADDR_CMD_OPCODE            = 0x202B,\n    HCI_LE_RD_LOC_RSLV_ADDR_CMD_OPCODE             = 0x202C,\n    HCI_LE_SET_ADDR_RESOL_EN_CMD_OPCODE            = 0x202D,\n    HCI_LE_SET_RSLV_PRIV_ADDR_TO_CMD_OPCODE        = 0x202E,\n    HCI_LE_RD_MAX_DATA_LEN_CMD_OPCODE              = 0x202F,\n    HCI_LE_RD_PHY_CMD_OPCODE                       = 0x2030,\n    HCI_LE_SET_DFT_PHY_CMD_OPCODE                  = 0x2031,\n    HCI_LE_SET_PHY_CMD_OPCODE                      = 0x2032,\n    HCI_LE_ENH_RX_TEST_CMD_OPCODE                  = 0x2033,\n    HCI_LE_ENH_TX_TEST_CMD_OPCODE                  = 0x2034,\n    HCI_LE_SET_ADV_SET_RAND_ADDR_CMD_OPCODE        = 0x2035,\n    HCI_LE_SET_EXT_ADV_PARAM_CMD_OPCODE            = 0x2036,\n    HCI_LE_SET_EXT_ADV_DATA_CMD_OPCODE             = 0x2037,\n    HCI_LE_SET_EXT_SCAN_RSP_DATA_CMD_OPCODE        = 0x2038,\n    HCI_LE_SET_EXT_ADV_EN_CMD_OPCODE               = 0x2039,\n    HCI_LE_RD_MAX_ADV_DATA_LEN_CMD_OPCODE          = 0x203A,\n    HCI_LE_RD_NB_SUPP_ADV_SETS_CMD_OPCODE          = 0x203B,\n    HCI_LE_RMV_ADV_SET_CMD_OPCODE                  = 0x203C,\n    HCI_LE_CLEAR_ADV_SETS_CMD_OPCODE               = 0x203D,\n    HCI_LE_SET_PER_ADV_PARAM_CMD_OPCODE            = 0x203E,\n    HCI_LE_SET_PER_ADV_DATA_CMD_OPCODE             = 0x203F,\n    HCI_LE_SET_PER_ADV_EN_CMD_OPCODE               = 0x2040,\n    HCI_LE_SET_EXT_SCAN_PARAM_CMD_OPCODE           = 0x2041,\n    HCI_LE_SET_EXT_SCAN_EN_CMD_OPCODE              = 0x2042,\n    HCI_LE_EXT_CREATE_CON_CMD_OPCODE               = 0x2043,\n    HCI_LE_PER_ADV_CREATE_SYNC_CMD_OPCODE          = 0x2044,\n    HCI_LE_PER_ADV_CREATE_SYNC_CANCEL_CMD_OPCODE   = 0x2045,\n    HCI_LE_PER_ADV_TERM_SYNC_CMD_OPCODE            = 0x2046,\n    HCI_LE_ADD_DEV_TO_PER_ADV_LIST_CMD_OPCODE      = 0x2047,\n    HCI_LE_RMV_DEV_FROM_PER_ADV_LIST_CMD_OPCODE    = 0x2048,\n    HCI_LE_CLEAR_PER_ADV_LIST_CMD_OPCODE           = 0x2049,\n    HCI_LE_RD_PER_ADV_LIST_SIZE_CMD_OPCODE         = 0x204A,\n    HCI_LE_RD_TX_PWR_CMD_OPCODE                    = 0x204B,\n    HCI_LE_RD_RF_PATH_COMP_CMD_OPCODE              = 0x204C,\n    HCI_LE_WR_RF_PATH_COMP_CMD_OPCODE              = 0x204D,\n    HCI_LE_SET_PRIV_MODE_CMD_OPCODE                = 0x204E,\n    HCI_LE_SET_MIN_NUM_USED_CHAN_CMD_OPCODE        = 0x204F,\n\n    ///Debug commands - OGF = 0x3F (spec)\n    HCI_DBG_RD_MEM_CMD_OPCODE                   = 0xFC01,\n    HCI_DBG_WR_MEM_CMD_OPCODE                   = 0xFC02,\n    HCI_DBG_DEL_PAR_CMD_OPCODE                  = 0xFC03,\n    HCI_DBG_ID_FLASH_CMD_OPCODE                 = 0xFC05,\n    HCI_DBG_ER_FLASH_CMD_OPCODE                 = 0xFC06,\n    HCI_DBG_WR_FLASH_CMD_OPCODE                 = 0xFC07,\n    HCI_DBG_RD_FLASH_CMD_OPCODE                 = 0xFC08,\n    HCI_DBG_RD_PAR_CMD_OPCODE                   = 0xFC09,\n    HCI_DBG_WR_PAR_CMD_OPCODE                   = 0xFC0A,\n    HCI_DBG_WLAN_COEX_CMD_OPCODE                = 0xFC0B,\n    HCI_DBG_WLAN_COEXTST_SCEN_CMD_OPCODE        = 0xFC0D,\n    HCI_DBG_BT_SEND_LMP_CMD_OPCODE              = 0xFC0E,\n    HCI_DBG_RD_KE_STATS_CMD_OPCODE              = 0xFC10,\n    HCI_DBG_PLF_RESET_CMD_OPCODE                = 0xFC11,\n    HCI_DBG_RD_MEM_INFO_CMD_OPCODE              = 0xFC12,\n    HCI_DBG_HW_REG_RD_CMD_OPCODE                = 0xFC30,\n    HCI_DBG_HW_REG_WR_CMD_OPCODE                = 0xFC31,\n    HCI_DBG_SET_BD_ADDR_CMD_OPCODE              = 0xFC32,\n    HCI_DBG_SET_TYPE_PUB_CMD_OPCODE             = 0xFC33,\n    HCI_DBG_SET_TYPE_RAND_CMD_OPCODE            = 0xFC34,\n    HCI_DBG_SET_CRC_CMD_OPCODE                  = 0xFC35,\n    HCI_DBG_LLCP_DISCARD_CMD_OPCODE             = 0xFC36,\n    HCI_DBG_RESET_RX_CNT_CMD_OPCODE             = 0xFC37,\n    HCI_DBG_RESET_TX_CNT_CMD_OPCODE             = 0xFC38,\n    HCI_DBG_RF_REG_RD_CMD_OPCODE                = 0xFC39,\n    HCI_DBG_RF_REG_WR_CMD_OPCODE                = 0xFC3A,\n    HCI_DBG_SET_TX_PW_CMD_OPCODE                = 0xFC3B,\n    HCI_DBG_RF_SWITCH_CLK_CMD_OPCODE            = 0xFC3C,\n    HCI_DBG_RF_WR_DATA_TX_CMD_OPCODE            = 0xFC3D,\n    HCI_DBG_RF_RD_DATA_RX_CMD_OPCODE            = 0xFC3E,\n    HCI_DBG_RF_CNTL_TX_CMD_OPCODE               = 0xFC3F,\n    HCI_DBG_RF_SYNC_P_CNTL_CMD_OPCODE           = 0xFC40,\n    HCI_TESTER_SET_LE_PARAMS_CMD_OPCODE         = 0xFC40,\n    HCI_DBG_WR_DLE_DFT_VALUE_CMD_OPCODE         = 0xFC41,\n#if (BLE_EMB_PRESENT)\n#if (BLE_TESTER)\n    HCI_DBG_BLE_TST_LLCP_PT_EN_CMD_OPCODE       = 0xFC42,\n    HCI_DBG_BLE_TST_SEND_LLCP_CMD_OPCODE        = 0xFC43,\n#endif // (BLE_TESTER)\n#if (BLE_AUDIO)\n    HCI_DBG_AUDIO_CONFIGURE_CMD_OPCODE          = 0xFC50,\n    HCI_DBG_AUDIO_SET_MODE_CMD_OPCODE           = 0xFC51,\n    HCI_DBG_AUDIO_RESET_CMD_OPCODE              = 0xFC52,\n    HCI_DBG_AUDIO_SET_POINTER_CMD_OPCODE        = 0xFC53,\n    HCI_DBG_AUDIO_ALLOCATE_CMD_OPCODE           = 0xFC54,\n    HCI_DBG_AUDIO_GET_VX_CH_CMD_OPCODE          = 0xFC55,\n#endif\n#endif // (BLE_EMB_PRESENT)\n\n    #if (RW_DEBUG && BT_EMB_PRESENT)\n\tHCI_DBG_BT_DISCARD_LMP_EN_CMD_OPCODE      \t= 0xFC44,\n    #endif //RW_DEBUG && BT_EMB_PRESENT\n\n    HCI_DBG_MWS_COEX_CMD_OPCODE                 = 0xFC45,\n    HCI_DBG_MWS_COEXTST_SCEN_CMD_OPCODE         = 0xFC46,\n\n    #if CRYPTO_UT\n    HCI_DBG_TEST_CRYPTO_FUNC_CMD_OPCODE         = 0xFC60,\n    #endif //CRYPTO_UT\n};\n\n/**************************************************************************************\n **************                        HCI EVENTS                      ****************\n **************************************************************************************/\n\n///Event Codes\nenum hci_evt_code\n{\n    HCI_INQ_CMP_EVT_CODE                       = 0x01,\n    HCI_INQ_RES_EVT_CODE                       = 0x02,\n    HCI_CON_CMP_EVT_CODE                       = 0x03,\n    HCI_CON_REQ_EVT_CODE                       = 0x04,\n    HCI_DISC_CMP_EVT_CODE                      = 0x05,\n    HCI_AUTH_CMP_EVT_CODE                      = 0x06,\n    HCI_REM_NAME_REQ_CMP_EVT_CODE              = 0x07,\n    HCI_ENC_CHG_EVT_CODE                       = 0x08,\n    HCI_CHG_CON_LK_CMP_EVT_CODE                = 0x09,\n    HCI_MASTER_LK_CMP_EVT_CODE                 = 0x0A,\n    HCI_RD_REM_SUPP_FEATS_CMP_EVT_CODE         = 0x0B,\n    HCI_RD_REM_VER_INFO_CMP_EVT_CODE           = 0x0C,\n    HCI_QOS_SETUP_CMP_EVT_CODE                 = 0x0D,\n    HCI_CMD_CMP_EVT_CODE                       = 0x0E,\n    HCI_CMD_STATUS_EVT_CODE                    = 0x0F,\n    HCI_HW_ERR_EVT_CODE                        = 0x10,\n    HCI_FLUSH_OCCURRED_EVT_CODE                = 0x11,\n    HCI_ROLE_CHG_EVT_CODE                      = 0x12,\n    HCI_NB_CMP_PKTS_EVT_CODE                   = 0x13,\n    HCI_MODE_CHG_EVT_CODE                      = 0x14,\n    HCI_RETURN_LINK_KEYS_EVT_CODE              = 0x15,\n    HCI_PIN_CODE_REQ_EVT_CODE                  = 0x16,\n    HCI_LK_REQ_EVT_CODE                        = 0x17,\n    HCI_LK_NOTIF_EVT_CODE                      = 0x18,\n    HCI_DATA_BUF_OVFLW_EVT_CODE                = 0x1A,\n    HCI_MAX_SLOT_CHG_EVT_CODE                  = 0x1B,\n    HCI_RD_CLK_OFF_CMP_EVT_CODE                = 0x1C,\n    HCI_CON_PKT_TYPE_CHG_EVT_CODE              = 0x1D,\n    HCI_QOS_VIOL_EVT_CODE                      = 0x1E,\n    HCI_PAGE_SCAN_REPET_MODE_CHG_EVT_CODE      = 0x20,\n    HCI_FLOW_SPEC_CMP_EVT_CODE                 = 0x21,\n    HCI_INQ_RES_WITH_RSSI_EVT_CODE             = 0x22,\n    HCI_RD_REM_EXT_FEATS_CMP_EVT_CODE          = 0x23,\n    HCI_SYNC_CON_CMP_EVT_CODE                  = 0x2C,\n    HCI_SYNC_CON_CHG_EVT_CODE                  = 0x2D,\n    HCI_SNIFF_SUB_EVT_CODE                     = 0x2E,\n    HCI_EXT_INQ_RES_EVT_CODE                   = 0x2F,\n    HCI_ENC_KEY_REFRESH_CMP_EVT_CODE           = 0x30,\n    HCI_IO_CAP_REQ_EVT_CODE                    = 0x31,\n    HCI_IO_CAP_RSP_EVT_CODE                    = 0x32,\n    HCI_USER_CFM_REQ_EVT_CODE                  = 0x33,\n    HCI_USER_PASSKEY_REQ_EVT_CODE              = 0x34,\n    HCI_REM_OOB_DATA_REQ_EVT_CODE              = 0x35,\n    HCI_SP_CMP_EVT_CODE                        = 0x36,\n    HCI_LINK_SUPV_TO_CHG_EVT_CODE              = 0x38,\n    HCI_ENH_FLUSH_CMP_EVT_CODE                 = 0x39,\n    HCI_USER_PASSKEY_NOTIF_EVT_CODE            = 0x3B,\n    HCI_KEYPRESS_NOTIF_EVT_CODE                = 0x3C,\n    HCI_REM_HOST_SUPP_FEATS_NOTIF_EVT_CODE     = 0x3D,\n    HCI_LE_META_EVT_CODE                       = 0x3E,\n    HCI_MAX_EVT_MSK_PAGE_1_CODE                = 0x40,\n    HCI_SYNC_TRAIN_CMP_EVT_CODE                = 0x4F,\n    HCI_SYNC_TRAIN_REC_EVT_CODE                = 0x50,\n    HCI_CON_SLV_BCST_REC_EVT_CODE              = 0x51,\n    HCI_CON_SLV_BCST_TO_EVT_CODE               = 0x52,\n    HCI_TRUNC_PAGE_CMP_EVT_CODE                = 0x53,\n    HCI_SLV_PAGE_RSP_TO_EVT_CODE               = 0x54,\n    HCI_CON_SLV_BCST_CH_MAP_CHG_EVT_CODE       = 0x55,\n    HCI_AUTH_PAYL_TO_EXP_EVT_CODE              = 0x57,\n    HCI_MAX_EVT_MSK_PAGE_2_CODE                = 0x58,\n    HCI_DBG_META_EVT_CODE                      = 0xFF,\n\n    /// LE Events Subcodes\n    HCI_LE_CON_CMP_EVT_SUBCODE                 = 0x01,\n    HCI_LE_ADV_REPORT_EVT_SUBCODE              = 0x02,\n    HCI_LE_CON_UPDATE_CMP_EVT_SUBCODE          = 0x03,\n    HCI_LE_RD_REM_FEATS_CMP_EVT_SUBCODE        = 0x04,\n    HCI_LE_LTK_REQUEST_EVT_SUBCODE             = 0x05,\n    HCI_LE_REM_CON_PARAM_REQ_EVT_SUBCODE       = 0x06,\n    HCI_LE_DATA_LEN_CHG_EVT_SUBCODE            = 0x07,\n    HCI_LE_RD_LOC_P256_PUB_KEY_CMP_EVT_SUBCODE = 0x08,\n    HCI_LE_GEN_DHKEY_CMP_EVT_SUBCODE           = 0x09,\n    HCI_LE_ENH_CON_CMP_EVT_SUBCODE             = 0x0A,\n    HCI_LE_DIR_ADV_REP_EVT_SUBCODE             = 0x0B,\n    HCI_LE_PHY_UPD_CMP_EVT_SUBCODE             = 0x0C,\n    HCI_LE_EXT_ADV_REPORT_EVT_SUBCODE          = 0x0D,\n    HCI_LE_PERIODIC_ADV_SYNC_EST_EVT_SUBCODE   = 0x0E,\n    HCI_LE_PERIODIC_ADV_REPORT_EVT_SUBCODE     = 0x0F,\n    HCI_LE_PERIODIC_ADV_SYNC_LOST_EVT_SUBCODE  = 0x10,\n    HCI_LE_SCAN_TIMEOUT_EVT_SUBCODE            = 0x11,\n    HCI_LE_ADV_SET_TERMINATED_EVT_SUBCODE      = 0x12,\n    HCI_LE_SCAN_REQ_RCVD_EVT_SUBCODE           = 0x13,\n    HCI_LE_CH_SEL_ALGO_EVT_SUBCODE             = 0x14,\n\n    /// DBG Events Subcodes\n    #if (BLE_EMB_PRESENT && BLE_TESTER)\n    HCI_DBG_BLE_TST_LLCP_RECV_EVT_SUBCODE      = 0x01,\n    #endif // (BLE_EMB_PRESENT && BLE_TESTER)\n    #if (RW_DEBUG)\n    HCI_DBG_ASSERT_ERR_EVT_SUBCODE             = 0x02,\n    #endif //(RW_DEBUG)\n};\n\n/// Event mask page enum\nenum hci_evt_mask_page\n{\n    /// page 0\n    HCI_PAGE_0,\n    /// page 1\n    HCI_PAGE_1,\n    /// page 2\n    HCI_PAGE_2,\n    /// Default\n    HCI_PAGE_DFT,\n    /// LE event\n    HCI_PAGE_LE,\n};\n\n/// HCI ACL data RX  packet structure\nstruct hci_ble_acl_data_rx\n{\n    /// bits[00:11]: Connection handle\n    /// bits[12:13]: Packet boundary flag\n    /// bits[14:15]: Broadcast flag\n    uint16_t  conhdl_pb_bc_flag;\n    /// length of the data\n    uint16_t  length;\n    /// Memory Pointer address\n    uint32_t  buf_ptr;\n    /// Private buffer\n    void *hcibuffer;\n};\n\n/// HCI ACL data TX packet structure\nstruct hci_ble_acl_data_tx\n{\n    /// bits[00:11]: Connection handle\n    /// bits[12:13]: Packet boundary flag\n    /// bits[14:15]: Broadcast flag\n    uint16_t  conhdl_pb_bc_flag;\n    /// length of the data\n    uint16_t  length;\n    /// Memory Pointer address\n    uint32_t  buf_ptr;\n};\n\n#if (BT_EMB_PRESENT)\n/// HCI ACL data packet structure\nstruct hci_bt_acl_data_tx\n{\n    /// Buffer element\n    struct bt_em_acl_buf_elt* buf_elt;\n};\n\n/// HCI ACL data Rx packet structure\nstruct hci_bt_acl_data_rx\n{\n    /// EM buffer pointer\n    uint16_t buf_ptr;\n    /// Data length + Data Flags (PBF + BF)\n    uint16_t data_len_flags;\n};\n\n/// HCI Synchronous data packet structure\nstruct hci_bt_sync_data_tx\n{\n    /// Buffer element\n    struct bt_em_sync_buf_elt* buf_elt;\n};\n\n/// HCI Synchronous data Rx packet structure\nstruct hci_bt_sync_data_rx\n{\n    /// EM buffer pointer\n    uint16_t buf_ptr;\n    /// Data length\n    uint8_t data_len;\n    /// Packet status flag\n    uint8_t packet_status_flag;\n    /// Synchronous link identifier\n    uint8_t sync_link_id;\n};\n#endif // (BT_EMB_PRESENT)\n\n\n/*\n * HCI COMMANDS PARAMETERS (to classify)\n ****************************************************************************************\n */\n\n/// HCI basic command structure with connection handle\nstruct hci_basic_conhdl_cmd\n{\n    /// connection handle\n    uint16_t    conhdl;\n};\n\n/// HCI basic command structure with BD address\nstruct hci_basic_bd_addr_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n};\n\n/// HCI Accept connection request command structure\nstruct hci_accept_con_req_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Page Scan Repetition Mode\n    uint8_t         role;\n};\n\n/// HCI Accept synchronous connection request command structure\nstruct hci_accept_sync_con_req_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Transmit bandwidth\n    uint32_t    tx_bw;\n    ///Receive bandwidth\n    uint32_t    rx_bw;\n    ///Max latency\n    uint16_t    max_lat;\n    ///Voice settings\n    uint16_t    vx_set;\n    ///Retransmission effort\n    uint8_t      retx_eff;\n    ///Packet type\n    uint16_t     pkt_type  ;\n};\n\n/// HCI Enhanced Accept synchronous connection request command structure\nstruct hci_enh_accept_sync_con_cmd\n{\n\n    struct bd_addr    bd_addr;            // BD address\n    uint32_t          tx_bw;              // Transmit Bandwidth (in B/sec)\n    uint32_t          rx_bw;              // Receive Bandwidth (in B/sec)\n    uint8_t           tx_cod_fmt[5];      // Transmit Coding Format\n    uint8_t           rx_cod_fmt[5];      // Receive Coding Format\n    uint16_t          tx_cod_fr_sz;       // Transmit Codec Frame Size (in B)\n    uint16_t          rx_cod_fr_sz;       // Receive Codec Frame Size (in B)\n    uint32_t          in_bw;              // Input Bandwidth (in B/sec)\n    uint32_t          out_bw;             // Output Bandwidth (in B/sec)\n    uint8_t           in_cod_fmt[5];      // Input Coding Format\n    uint8_t           out_cod_fmt[5];     // Output Coding Format\n    uint16_t          in_cod_data_sz;     // Input Coded Data Size (in bits)\n    uint16_t          out_cod_data_sz;    // Output Coded Data Size (in bits)\n    uint8_t           in_data_fmt;        // Input PCM Data Format\n    uint8_t           out_data_fmt;       // Output PCM Data Format\n    uint8_t           in_msb_pos;         // Input PCM Sample Payload MSB Position (in bits)\n    uint8_t           out_msb_pos;        // Output PCM Sample Payload MSB Position (in bits)\n    uint8_t           in_data_path;       // Input Data Path\n    uint8_t           out_data_path;      // Output Data Path\n    uint8_t           in_tr_unit_sz;      // Input Transport Unit Size (in bits)\n    uint8_t           out_tr_unit_sz;     // Output Transport Unit Size (in bits)\n    uint16_t          max_lat;            // Max Latency (in ms)\n    uint16_t          packet_type;        // Packet Type\n    uint8_t           retx_eff;           // Retransmission Effort\n\n\n};\n\n/// HCI reject connection request command structure\nstruct hci_reject_con_req_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Reason\n    uint8_t         reason;\n};\n\n/// HCI reject synchronous connection request command structure\nstruct hci_reject_sync_con_req_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Reason\n    uint8_t         reason;\n};\n\n/// HCI link key request reply command structure\nstruct hci_lk_req_reply_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Key\n    struct ltk         key;\n};\n\n/// HCI link key request reply command structure\nstruct hci_pin_code_req_reply_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Pin code length\n    uint8_t     pin_len;\n    ///Key\n    struct pin_code pin;\n};\n\n/// HCI switch role command structure\nstruct hci_switch_role_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Read all flag\n    uint8_t role;\n};\n\n/// HCI flow specification command parameters structure\nstruct hci_flow_spec_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Flags\n    uint8_t flags;\n    ///Flow direction\n    uint8_t flow_dir;\n    ///Service type\n    uint8_t serv_type;\n    ///Token rate\n    uint32_t tk_rate;\n    ///Token buffer size\n    uint32_t tk_buf_sz;\n    ///Peak bandwidth\n    uint32_t pk_bw;\n    ///Access latency\n    uint32_t acc_lat;\n};\n\n/// HCI enhanced flush command parameters structure\nstruct hci_enh_flush_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Packet Type\n    uint8_t pkt_type;\n};\n\n/// HCI command complete event structure for the read auto flush TO command\nstruct hci_rd_auto_flush_to_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Flush timeout\n    uint16_t flush_to;\n};\n\n/// HCI write flush timeout command parameters structure\nstruct hci_wr_auto_flush_to_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Flush timeout\n    uint16_t flush_to;\n};\n\n/// HCI change connection packet type command parameters structure\nstruct hci_chg_con_pkt_type_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Packet type\n    uint16_t pkt_type;\n};\n\n/// HCI read link policy settings command parameters structure\nstruct hci_rd_link_pol_stg_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Link policy\n    uint16_t lnk_policy;\n};\n\n/// HCI read link policy settings command parameters structure\nstruct hci_wr_link_pol_stg_cmd\n{\n    ///Connection handle\n    uint16_t    conhdl;\n    ///Link policy\n    uint16_t lnk_policy;\n};\n\n/// HCI sniff mode request command parameters structure\nstruct hci_sniff_mode_cmd\n{\n    ///Connection handle\n    uint16_t    conhdl;\n    ///Sniff max interval\n    uint16_t    max_int;\n    ///Sniff min interval\n    uint16_t    min_int;\n    ///Sniff attempt\n    uint16_t    attempt;\n    ///Sniff timeout\n    uint16_t    timeout;\n};\n\n/// HCI sniff subrating mode request command parameters structure\nstruct hci_sniff_sub_cmd\n{\n    ///Connection handle\n    uint16_t    conhdl;\n    ///Sniff max latency\n    uint16_t    max_lat;\n    ///Minimun remote TO\n    uint16_t    min_rem_to;\n    ///Minimun local TO\n    uint16_t    min_loc_to;\n};\n\n/// HCI role discovery complete event parameters structure\nstruct hci_role_discovery_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Role\n    uint8_t role;\n\n};\n\n/// HCI read failed contact counter command parameters structure\nstruct hci_rd_fail_contact_cnt_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Fail contact counter\n    uint16_t fail_cnt;\n};\n\n/// HCI read link quality complete event parameters structure\nstruct hci_rd_link_qual_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Quality type\n    uint8_t quality;\n};\n\n/// HCI read afh channel map complete event parameters structure\nstruct hci_rd_afh_ch_map_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    /// AFH mode\n    uint8_t afh_mode;\n    /// AFH channel map\n    struct chnl_map afh_map;\n};\n\n/// HCI read lmp handle complete event parameters structure\nstruct hci_rd_lmp_hdl_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///lmp handle\n    uint8_t lmp_hdl;\n    ///rsvd\n    uint32_t rsvd;\n};\n\n/// HCI read remote extended features command parameters structure\nstruct hci_rd_rem_ext_feats_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///page number\n    uint8_t pg_nb;\n};\n\n/// HCI read encryption key size complete event parameters structure\nstruct hci_rd_enc_key_size_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Key size\n    uint8_t key_sz;\n};\n\n/// HCI read enhanced transmit power command parameters structure\nstruct hci_rd_enh_tx_pwr_lvl_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Type\n    uint8_t type;\n};\n\n/// HCI read enhanced transmit power complete event parameters structure\nstruct hci_rd_enh_tx_pwr_lvl_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Transmit power GFSK\n    uint8_t pw_gfsk;\n    ///Transmit power DQPSK\n    uint8_t pw_dqpsk;\n    ///Transmit power 8DPSK\n    uint8_t pw_8dpsk;\n};\n\n\n/*\n * HCI LINK CONTROL COMMANDS PARAMETERS\n ****************************************************************************************\n */\n\n/// Format of the message of the Group: LINK_CONTROL_COMMANDS\n/// HCI Inquiry command parameters structure\nstruct hci_inq_cmd\n{\n    ///Lap\n    struct lap  lap;\n    ///Inquiry Length\n    uint8_t     inq_len;\n    ///Number of response\n    uint8_t     nb_rsp;\n};\nstruct hci_per_inq_mode_cmd\n{\n    ///Maximum period length\n    uint16_t max_per_len;\n    ///Minimum period length\n    uint16_t min_per_len;\n    ///lap\n    struct lap lap;\n    ///Inquiry length\n    uint8_t inq_len;\n    ///Number of response\n    uint8_t nb_rsp;\n};\nstruct hci_create_con_cmd\n{\n    /// BdAddr\n    struct bd_addr  bd_addr;\n    /// Packet Type\n    uint16_t        pkt_type;\n    /// Page Scan Repetition Mode\n    uint8_t         page_scan_rep_mode;\n    /// Reserved\n    uint8_t         rsvd;\n    /**\n     * Clock Offset\n     *\n     * Bits 14-0 : Bits 16-2 of CLKNslave-CLK\n     * Bit 15 : Clock_Offset_Valid_Flag\n     *   Invalid Clock Offset = 0\n     *   Valid Clock Offset = 1\n     */\n    uint16_t        clk_off;\n    /// Allow Switch\n    uint8_t         switch_en;\n};\n\n/// HCI disconnect command structure\nstruct hci_disconnect_cmd\n{\n    /// connection handle\n    uint16_t    conhdl;\n    /// reason\n    uint8_t     reason;\n};\n\n/// HCI master link key command structure\nstruct hci_master_lk_cmd\n{\n    ///Key flag\n    uint8_t key_flag;\n};\n\n/// HCI authentication request command parameters structure\nstruct hci_set_con_enc_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Encryption mode\n    uint8_t enc_en;\n};\n\nstruct hci_rem_name_req_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Page Scan Repetition Mode\n    uint8_t         page_scan_rep_mode;\n    ///Reserved\n    uint8_t         rsvd;\n    /**\n     * Clock Offset\n     *\n     * Bits 14-0 : Bits 16-2 of CLKNslave-CLK\n     * Bit 15 : Clock_Offset_Valid_Flag\n     *   Invalid Clock Offset = 0\n     *   Valid Clock Offset = 1\n     */\n    uint16_t        clk_off;\n};\n\n/// HCI remote name request complete event structure\nstruct hci_rem_name_req_cmp_evt\n{\n    /// Status\n    uint8_t status;\n    /// BD Addr\n    struct bd_addr bd_addr;\n    /// Name\n    struct device_name name;\n};\n\n/// HCI setup synchronous connection command structure\nstruct hci_setup_sync_con_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Transmit bandwidth\n    uint32_t tx_bw;\n    ///Receive bandwidth\n    uint32_t rx_bw;\n    ///Max latency\n    uint16_t max_lat;\n    ///Voice setting\n    uint16_t vx_set;\n    ///Retransmission effort\n    uint8_t retx_eff;\n    ///Packet type\n    uint16_t pkt_type;\n};\n\n/// HCI setup synchronous connection command structure\nstruct hci_enh_setup_sync_con_cmd\n{\n    uint16_t      conhdl;               // Connection Handle\n    uint32_t      tx_bw;                // Transmit Bandwidth (in B/sec)\n    uint32_t      rx_bw;                // Receive Bandwidth (in B/sec)\n    uint8_t       tx_cod_fmt[5];        // Transmit Coding Format\n    uint8_t       rx_cod_fmt[5];        // Receive Coding Format\n    uint16_t      tx_cod_fr_sz;         // Transmit Codec Frame Size (in B)\n    uint16_t      rx_cod_fr_sz;         // Receive Codec Frame Size (in B)\n    uint32_t      in_bw;                // Input Bandwidth (in B/sec)\n    uint32_t      out_bw;               // Output Bandwidth (in B/sec)\n    uint8_t       in_cod_fmt[5];        // Input Coding Format\n    uint8_t       out_cod_fmt[5];       // Output Coding Format\n    uint16_t      in_cod_data_sz;       // Input Coded Data Size (in bits)\n    uint16_t      out_cod_data_sz;      // Output Coded Data Size (in bits)\n    uint8_t       in_data_fmt;          // Input PCM Data Format\n    uint8_t       out_data_fmt;         // Output PCM Data Format\n    uint8_t       in_msb_pos;           // Input PCM Sample Payload MSB Position (in bits)\n    uint8_t       out_msb_pos;          // Output PCM Sample Payload MSB Position (in bits)\n    uint8_t       in_data_path;         // Input Data Path\n    uint8_t       out_data_path;        // Output Data Path\n    uint8_t       in_tr_unit_sz;        // Input Transport Unit Size (in bits)\n    uint8_t       out_tr_unit_sz;       // Output Transport Unit Size (in bits)\n    uint16_t      max_lat;              // Max Latency (in ms)\n    uint16_t      packet_type;          // Packet Type\n    uint8_t       retx_eff;             // Retransmission Effort\n};\n\n/// HCI io capability request reply command structure\nstruct hci_io_cap_req_reply_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///IO capability\n    uint8_t io_capa;\n    ///OOB data present\n    uint8_t oob_data_pres;\n    ///Authentication requirements\n    uint8_t auth_req;\n\n};\n\n/// HCI io capability request negative reply command structure\nstruct hci_io_cap_req_neg_reply_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Reason\n    uint8_t reason;\n};\n\n/// HCI user pass key request reply command structure\nstruct hci_user_passkey_req_reply_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Numeric value\n    uint32_t num_val;\n};\n\n/// HCI remote oob data request reply command structure\nstruct hci_rem_oob_data_req_reply_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///hash part\n    struct hash oob_c;\n    ///random part\n    struct randomizer oob_r;\n};\n\n/// HCI send key press notification command structure\nstruct hci_send_keypress_notif_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Notification type\n    uint8_t notif_type;\n};\n\n/// HCI truncated page command structure\nstruct hci_trunc_page_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    /// Page Scan Repetition Mode\n    uint8_t         page_scan_rep_mode;\n    /**\n     * Clock Offset\n     *\n     * Bits 14-0 : Bits 16-2 of CLKNslave-CLK\n     * Bit 15 : Clock_Offset_Valid_Flag\n     *   Invalid Clock Offset = 0\n     *   Valid Clock Offset = 1\n     */\n    uint16_t        clk_off;\n};\n\n/// HCI truncated page cancel command structure\nstruct hci_trunc_page_can_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n};\n\n/// HCI set connectionless slave broadcast command structure\nstruct hci_set_con_slv_bcst_cmd\n{\n    /// Enable\n    uint8_t enable;\n    /// LT_ADDR\n    uint8_t lt_addr;\n    /// LPO_Allowed\n    uint8_t lpo_allowed;\n    /// Packet_Type\n    uint16_t packet_type;\n    /// Interval_Min (in slots)\n    uint16_t interval_min;\n    /// Interval_Max (in slots)\n    uint16_t interval_max;\n    /// CSB_supervisionTO (in slots)\n    uint16_t csb_supv_to;\n};\n\n/// HCI set connectionless slave broadcast command complete event structure\nstruct hci_set_con_slv_bcst_cmd_cmp_evt\n{\n    /// Status\n    uint8_t status;\n    /// LT_ADDR\n    uint8_t lt_addr;\n    /// Interval (in slots)\n    uint16_t interval;\n};\n\n/// HCI set connectionless slave broadcast receive command structure\nstruct hci_set_con_slv_bcst_rec_cmd\n{\n    /// Enable\n    uint8_t enable;\n    /// BD_ADDR\n    struct bd_addr  bd_addr;\n    /// LT_ADDR\n    uint8_t lt_addr;\n    /// Interval (in slots)\n    uint16_t interval;\n    /// Clock_Offset (28 bits) - (CLKNslave � CLK) modulo 2^28\n    uint32_t clock_offset;\n    /// Next_Connectionless_Slave_Broadcast_Clock (28 bits)\n    uint32_t next_csb_clock;\n    /// CSB_supervisionTO (in slots)\n    uint16_t csb_supv_to;\n    /// Remote_Timing_Accuracy (in ppm)\n    uint8_t remote_timing_accuracy;\n    /// Skip\n    uint8_t skip;\n    /// Packet_Type\n    uint16_t packet_type;\n    /// AFH_Channel_Map\n    struct chnl_map afh_ch_map;\n};\n\n/// HCI set connectionless slave broadcast receive command complete event structure\nstruct hci_set_con_slv_bcst_rec_cmd_cmp_evt\n{\n    /// Status\n    uint8_t status;\n    /// BD_ADDR\n    struct bd_addr  bd_addr;\n    /// LT_ADDR\n    uint8_t lt_addr;\n};\n\n/// HCI Receive Synchronization Train command structure\nstruct hci_rec_sync_train_cmd\n{\n    /// BD_ADDR\n    struct bd_addr  bd_addr;\n    /// Synchronization_scanTO (in slots)\n    uint16_t sync_scan_to;\n    /// Sync_Scan_Window (in slots)\n     uint16_t sync_scan_win;\n    /// Sync_Scan_Interval (in slots)\n     uint16_t sync_scan_int;\n};\n\n/// HCI remote oob extended data request reply command structure\nstruct hci_rem_oob_ext_data_req_reply_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///hash part\n    struct hash oob_c_192;\n    ///random part\n    struct randomizer oob_r_192;\n    ///hash part\n    struct hash oob_c_256;\n    ///random part\n    struct randomizer oob_r_256;\n};\n\n\nstruct hci_le_generate_dh_key_cmd\n{\n    uint8_t public_key[64];\n};\n/*\n * HCI LINK POLICY COMMANDS PARAMETERS\n ****************************************************************************************\n */\n\n/// HCI setup quality of service command structure\nstruct hci_qos_setup_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Flags\n    uint8_t flags;\n    ///Service type\n    uint8_t serv_type;\n    ///Token rate\n    uint32_t tok_rate;\n    ///Peak bandwidth\n    uint32_t pk_bw;\n    ///Latency\n    uint32_t lat;\n    ///Delay variation\n    uint32_t del_var;\n};\n\n/// HCI command complete event structure for read default link policy command structure\nstruct hci_rd_dft_link_pol_stg_cmd_cmp_evt\n{\n    ///Status of the command reception\n    uint8_t     status;\n    ///Link policy\n    uint16_t    link_pol_stg;\n};\n\nstruct hci_wr_dft_link_pol_stg_cmd\n{\n        ///Link policy\n        uint16_t    link_pol_stg;\n};\n\n/*\n * HCI CONTROL & BASEBAND COMMANDS PARAMETERS\n ****************************************************************************************\n */\n\n/// HCI set event mask command structure\nstruct hci_set_evt_mask_cmd\n{\n    ///Event Mask\n    struct evt_mask    event_mask;\n};\n\n/// HCI set event filter command structure\nstruct hci_set_evt_filter_cmd\n{\n    /// Filter type\n    uint8_t filter_type;\n\n    /// Filters\n    union hci_filter\n    {\n        uint8_t clear_all_filter_reserved;\n\n        /// Inquiry Result Filter\n        struct inq_res_filter\n        {\n            /// Filter Condition type\n            uint8_t cond_type;\n\n            /// Filter conditions\n            union hci_inq_filter_cond\n            {\n                /// Reserved value (Inquiry Result Filter - condition type 0x00 has no condition)\n                uint8_t cond_0_reserved;\n\n                /// Inquiry Result Filter Condition - condition type 0x01\n                struct inq_res_filter_cond_1\n                {\n                    /// Class_of_Device\n                    struct devclass class_of_dev;\n                    /// Class_of_Device_Mask\n                    struct devclass class_of_dev_msk;\n                } cond_1;\n\n                /// Inquiry Result Filter Condition - condition type 0x02\n                struct inq_res_filter_cond_2\n                {\n                    /// BD Address\n                    struct bd_addr bd_addr;\n                } cond_2;\n            } cond;\n        } inq_res;\n\n        /// Connection Setup Filter\n        struct con_set_filter\n        {\n            /// Filter Condition type\n            uint8_t cond_type;\n\n            /// Filter conditions\n            union hci_con_filter_cond\n            {\n                /// Connection Setup Filter Condition - condition type 0x00\n                struct con_set_filter_cond_0\n                {\n                    /// Auto_Accept_Flag\n                    uint8_t auto_accept;\n                } cond_0;\n\n                /// Connection Setup Filter Condition - condition type 0x01\n                struct con_set_filter_cond_1\n                {\n                    /// Class_of_Device\n                    struct devclass class_of_dev;\n                    /// Class_of_Device_Mask\n                    struct devclass class_of_dev_msk;\n                    /// Auto_Accept_Flag\n                    uint8_t auto_accept;\n                } cond_1;\n\n                /// Connection Setup Filter Condition - condition type 0x02\n                struct con_set_filter_cond_2\n                {\n                    /// BD Address\n                    struct bd_addr bd_addr;\n                    /// Auto_Accept_Flag\n                    uint8_t auto_accept;\n                } cond_2;\n            } cond;\n\n        } con_set;\n\n    } filter;\n};\n\n/// HCI command completed event structure for the flush command\nstruct hci_flush_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n};\n\n/// HCI command complete event structure for the Read pin type command\nstruct hci_rd_pin_type_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    ///PIN type\n    uint8_t   pin_type;\n};\n\nstruct hci_wr_pin_type_cmd\n{\n    ///PIN type\n    uint8_t pin_type;\n};\n\nstruct hci_rd_stored_lk_cmd\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Read all flag\n    uint8_t rd_all_flag;\n};\n\n/// HCI command complete event structure for read stored link key command\nstruct hci_rd_stored_lk_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Maximum number of key\n    uint16_t num_key_max;\n    ///Read number of key\n    uint16_t num_key_rd;\n};\n\n#if BT_EMB_PRESENT\nstruct hci_wr_stored_lk_cmd\n{\n        /// Number of key to write\n        uint8_t num_key_wr;\n\n        /// BD Address + Key table\n        struct bd_addr_plus_key link_keys[HCI_MAX_CMD_PARAM_SIZE / sizeof(struct bd_addr_plus_key)];\n};\n#endif //BT_EMB_PRESENT\n\n/// HCI command complete event structure for write stored link key command\nstruct hci_wr_stored_lk_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///number of key written\n    uint8_t    num_key_wr;\n};\n\nstruct hci_del_stored_lk_cmd\n{\n        ///BdAddr\n        struct bd_addr  bd_addr;\n        ///Delete all flag\n        uint8_t del_all_flag;\n};\n\n/// HCI command complete event structure for delete stored link key command\nstruct hci_del_stored_lk_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Read number of key\n    uint16_t num_key_del;\n};\n\nstruct hci_wr_local_name_cmd\n{\n        ///Name\n        struct device_name  name;\n};\n\n/// HCI command complete event structure for the read local name command\nstruct hci_rd_local_name_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    ///Name\n    uint8_t  name[BD_NAME_SIZE];\n};\n\n/// HCI command complete event structure for the Read connection accept to command\nstruct hci_rd_con_accept_to_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    /// Connection accept timeout (in slots)\n    uint16_t    con_acc_to;\n};\n\nstruct hci_wr_con_accept_to_cmd\n{\n    /// Connection accept timeout (in slots)\n    uint16_t    con_acc_to;\n};\n\n/// HCI command complete event structure for the Read page to command\nstruct hci_rd_page_to_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    /// Page timeout (in slots)\n    uint16_t    page_to;\n};\n\nstruct hci_wr_page_to_cmd\n{\n    /// Page timeout (in slots)\n    uint16_t    page_to;\n};\n\n/// HCI command complete event structure for the Read scan enable command\nstruct hci_rd_scan_en_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    ///Status of the scan enable\n    uint8_t     scan_en;\n};\n\nstruct hci_wr_scan_en_cmd\n{\n        ///Status of the scan enable\n        uint8_t scan_en;\n};\n\n/// HCI command complete event structure for the Read scan activity command\nstruct hci_rd_page_scan_act_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    /// Page scan interval (in slots)\n    uint16_t page_scan_intv;\n    /// Page scan window (in slots)\n    uint16_t page_scan_win;\n};\n\nstruct hci_wr_page_scan_act_cmd\n{\n    /// Page scan interval (in slots)\n    uint16_t page_scan_intv;\n    /// Page scan window (in slots)\n    uint16_t page_scan_win;\n};\n\n/// HCI command complete event structure for the Read inquiry scan activity command\nstruct hci_rd_inq_scan_act_cmd_cmp_evt\n{\n    /// Status of the command\n    uint8_t  status;\n    /// Inquiry scan interval (in slots)\n    uint16_t inq_scan_intv;\n    /// Inquiry scan window (in slots)\n    uint16_t inq_scan_win;\n};\n\nstruct hci_wr_inq_scan_act_cmd\n{\n    /// Inquiry scan interval (in slots)\n    uint16_t inq_scan_intv;\n    /// Inquiry scan window (in slots)\n    uint16_t inq_scan_win;\n};\n\n/// HCI command complete event structure for the Read authentication command\nstruct hci_rd_auth_en_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    ///Value of the authentication\n    uint8_t    auth_en;\n};\n\nstruct hci_wr_auth_en_cmd\n{\n        ///Value of the authentication\n        uint8_t auth_en;\n};\n\n/// HCI command complete event structure for the read class of device command\nstruct hci_rd_class_of_dev_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    ///Class of device\n    struct devclass class_of_dev;\n};\n\nstruct hci_wr_class_of_dev_cmd\n{\n        ///Class of device\n        struct devclass class_of_dev;\n};\n\n/// HCI read voice settings complete event\nstruct hci_rd_voice_stg_cmd_cmp_evt\n{\n    ///Status of the command reception\n    uint8_t     status;\n    /// Voice setting\n    uint16_t voice_stg;\n};\n\nstruct hci_wr_voice_stg_cmd\n{\n    /// voice setting\n    uint16_t voice_stg;\n};\n\n/// HCI command complete event structure for read number of broadcast retrans command\nstruct hci_rd_nb_bdcst_retx_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Read number of broadcast retransmission\n    uint8_t num_bcst_ret;\n};\n\nstruct hci_wr_nb_bdcst_retx_cmd\n{\n        ///Read number of broadcast retransmission\n        uint8_t num_bcst_ret;\n};\n\n/// HCI command complete event structure for the Read Synchronous Flow Control command\nstruct hci_rd_sync_flow_ctrl_en_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Synchronous flow control enable\n    uint8_t     sync_flow_ctrl_en;\n};\n\nstruct hci_wr_sync_flow_ctrl_en_cmd\n{\n    /// Synchronous Flow Control enable\n    uint8_t   sync_flow_ctrl_en;\n};\n\n///HCI set controller to host flow control command\nstruct hci_set_ctrl_to_host_flow_ctrl_cmd\n{\n    ///Flow control enable for controller\n    uint8_t flow_cntl;\n};\n\n///HCI host buffer size command\nstruct hci_host_buf_size_cmd\n{\n    ///Host ACL packet length\n    uint16_t    acl_pkt_len;\n    ///Host synchronous packet length\n    uint8_t     sync_pkt_len;\n    ///Host Total number of ACL packets allowed\n    uint16_t    nb_acl_pkts;\n    ///Host total number of synchronous packets allowed\n    uint16_t    nb_sync_pkts;\n};\n\n#if BT_EMB_PRESENT\n///HCI host number of completed packets command\nstruct hci_host_nb_cmp_pkts_cmd\n{\n        ///Number of handles for which the completed packets number is given\n        uint8_t     nb_of_hdl;\n        ///Array of connection handles\n        uint16_t    con_hdl[MAX_NB_ACTIVE_ACL];\n        ///Array of number of completed packets values for connection handles.\n        uint16_t    nb_comp_pkt[MAX_NB_ACTIVE_ACL];\n};\n#elif BLE_EMB_PRESENT || BLE_HOST_PRESENT\n///HCI host number of completed packets command\nstruct hci_host_nb_cmp_pkts_cmd\n{\n    ///Number of handles for which the completed packets number is given\n    uint8_t     nb_of_hdl;\n    ///Array of connection handles\n    uint16_t    con_hdl[BLE_CONNECTION_MAX+1];     // ensure that at least 1 element is present\n    ///Array of number of completed packets values for connection handles.\n    uint16_t    nb_comp_pkt[BLE_CONNECTION_MAX+1]; // ensure that at least 1 element is present\n};\n#endif //BLE_EMB_PRESENT || BLE_HOST_PRESENT\n\n/// HCI read link supervision timeout command parameters structure\nstruct hci_rd_link_supv_to_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Link supervision timeout\n    uint16_t lsto_val;\n};\n\n/// HCI write link supervision timeout command parameters structure\nstruct hci_wr_link_supv_to_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Link supervision timeout\n    uint16_t lsto_val;\n};\n\n/// HCI command complete event structure for the nb of supported IAC command\nstruct hci_rd_nb_supp_iac_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    ///nb_of iac\n    uint8_t  nb_iac;\n};\n\n/// HCI command complete event structure for read current IAC LAP command\nstruct hci_rd_curr_iac_lap_cmd_cmp_evt\n{\n    ///Status of the command\n    uint8_t     status;\n    ///nb of current iac\n    uint8_t  nb_curr_iac;\n    ///lap\n    struct lap iac_lap;\n};\n\n/// HCI write current IAC LAP command structure\nstruct hci_wr_curr_iac_lap_cmd\n{\n    /// Number of current iac laps\n    uint8_t  nb_curr_iac;\n    ///lap\n    struct lap iac_lap[(HCI_MAX_CMD_PARAM_SIZE / BD_ADDR_LAP_LEN) - 1];\n};\n\nstruct hci_set_afh_host_ch_class_cmd\n{\n    ///AFH channel map\n    struct chnl_map   afh_ch;\n};\n\n/// HCI command complete event structure for write inquiry scan type command structure\nstruct hci_rd_inq_scan_type_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    /// Inquiry scan type\n    uint8_t     inq_scan_type;\n};\n\nstruct hci_wr_inq_scan_type_cmd\n{\n    /// Inquiry scan type\n    uint8_t     inq_scan_type;\n};\n\n/// HCI command complete event structure for read inquiry mode command structure\nstruct hci_rd_inq_mode_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    /// Inquiry mode\n    uint8_t     inq_mode;\n};\n\nstruct hci_wr_inq_mode_cmd\n{\n    /// Inquiry mode\n    uint8_t     inq_mode;\n};\n\n/// HCI command complete event structure for write page scan type command structure\nstruct hci_rd_page_scan_type_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    /// Page scan type\n    uint8_t     page_scan_type;\n};\n\nstruct hci_wr_page_scan_type_cmd\n{\n    /// Page scan type\n    uint8_t     page_scan_type;\n};\n\n/// HCI command complete event structure for read assessment mode command structure\nstruct hci_rd_afh_ch_assess_mode_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///AFH channel assessment mode\n    uint8_t     afh_ch_ass_mode;\n};\n\nstruct hci_wr_afh_ch_assess_mode_cmd\n{\n    ///AFH channel assessment mode\n    uint8_t     afh_ch_ass_mode;\n};\n\n/// HCI command complete event structure for remote name request cancel command\nstruct hci_rd_ext_inq_rsp_cmd_cmp_evt\n{\n    ///status\n    uint8_t     status;\n    ///FEC required\n    uint8_t     fec_req;\n    ///Extended inquiry response\n    struct eir  eir;\n};\n\nstruct hci_wr_ext_inq_rsp_cmd\n{\n    ///FEC required\n    uint8_t     fec_req;\n    ///Extended inquiry response\n    struct eir  eir;\n};\n\n/// HCI command complete event structure for remote name request cancel command\nstruct hci_rd_sp_mode_cmd_cmp_evt\n{\n    ///status\n    uint8_t     status;\n    ///Simple pairing mode\n    uint8_t     sp_mode;\n};\n\nstruct hci_wr_sp_mode_cmd\n{\n    ///Simple pairing mode\n    uint8_t     sp_mode;\n};\n\n/// HCI command complete event structure for read oob data command\nstruct hci_rd_loc_oob_data_cmd_cmp_evt\n{\n    ///status\n    uint8_t     status;\n    ///hash part\n    struct hash oob_c;\n    ///random part\n    struct randomizer oob_r;\n};\n\n/// HCI command complete event structure for read inquiry response transmit power command\nstruct hci_rd_inq_rsp_tx_pwr_lvl_cmd_cmp_evt\n{\n    ///status\n    uint8_t status;\n    ///TX power\n    uint8_t tx_pwr;\n};\n\nstruct hci_wr_inq_tx_pwr_lvl_cmd\n{\n    ///TX power\n    int8_t tx_pwr;\n};\n\n/// HCI command complete event structure for read erroneous data reporting command\nstruct hci_rd_dft_err_data_rep_cmd_cmp_evt\n{\n    ///status\n    uint8_t     status;\n    ///Erroneous data reporting\n    uint8_t     err_data_rep;\n};\n\nstruct hci_wr_dft_err_data_rep_cmd\n{\n    ///Erroneous data reporting\n    uint8_t err_data_rep;\n};\n\n/// HCI read LE Host Supported complete event\nstruct  hci_rd_le_host_supp_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    ///LE_Supported_Host\n    uint8_t le_supported_host;\n    ///Simultaneous_LE_Host\n    uint8_t simultaneous_le_host;\n};\n\n/// HCI write LE Host Supported command\nstruct  hci_wr_le_host_supp_cmd\n{\n    ///LE_Supported_Host\n    uint8_t le_supported_host;\n    ///Simultaneous_LE_Host\n    uint8_t simultaneous_le_host;\n};\n\n/// HCI Set MWS Channel Parameters command\nstruct hci_set_mws_channel_params_cmd\n{\n    ///MWS_Channel_Enable\n    uint8_t mws_channel_enable;\n    ///MWS_RX_Center_Frequency\n    uint16_t mws_rx_center_frequency;\n    ///MWS_TX_Center_Frequency\n    uint16_t mws_tx_center_frequency;\n    ///MWS_RX_Channel_Bandwidth\n    uint16_t mws_rx_channel_bandwidth;\n    ///MWS_TX_Channel_Bandwidth\n    uint16_t mws_tx_channel_bandwidth;\n    ///MWS_Channel_Type\n    uint8_t mws_channel_type;\n};\n\n/// HCI Set External Frame Configuration command\nstruct hci_set_external_frame_config_cmd\n{\n    /// Ext_Frame_Duration\n    uint16_t ext_fr_duration;\n    /// Ext_Frame_Sync_Assert_Offset\n    int16_t ext_fr_sync_assert_offset;\n    /// Ext_Frame_Sync_Assert_Jitter\n    uint16_t ext_fr_sync_assert_jitter;\n    /// Ext_Frame_Num_Periods\n    uint8_t ext_fr_num_periods;\n    /// Period_Duration[i]\n    uint16_t period_duration[__ARRAY_EMPTY];\n    /// Period_Type[i]\n    //uint8_t period_type[__ARRAY_EMPTY];\n};\n\n/// HCI Set MWS Signaling command\nstruct hci_set_mws_signaling_cmd\n{\n    ///MWS_RX_Assert_Offset\n    int16_t mws_rx_assert_offset;\n    ///MWS_RX_Assert_Jitter\n    uint16_t mws_rx_assert_jitter;\n    ///MWS_RX_Deassert_Offset\n    int16_t mws_rx_deassert_offset;\n    ///MWS_RX_Deassert_Jitter\n    uint16_t mws_rx_deassert_jitter;\n    ///MWS_TX_Assert_Offset\n    int16_t mws_tx_assert_offset;\n    ///MWS_TX_Assert_Jitter\n    uint16_t mws_tx_assert_jitter;\n    ///MWS_TX_Deassert_Offset\n    int16_t mws_tx_deassert_offset;\n    ///MWS_TX_Deassert_Jitter\n    uint16_t mws_tx_deassert_jitter;\n    ///MWS_Pattern_Assert_Offset\n    int16_t mws_pattern_assert_offset;\n    ///MWS_Pattern_Assert_Jitter\n    uint16_t mws_pattern_assert_jitter;\n    ///MWS_Inactivity_Duration_Assert_Offset\n    int16_t mws_inactivity_duration_assert_offset;\n    ///MWS_Inactivity_Duration_Assert_Jitter\n    uint16_t mws_inactivity_duration_assert_jitter;\n    ///MWS_Scan_Frequency_Assert_Offset\n    int16_t mws_scan_frequency_assert_offset;\n    ///MWS_Scan_Frequency_Assert_Jitter\n    uint16_t mws_scan_frequency_assert_jitter;\n    ///MWS_Priority_Assert_Offset_Request\n    uint16_t mws_priority_assert_offset_request;\n};\n\n/// HCI Set MWS Signaling command complete event\nstruct hci_set_mws_signaling_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    ///Bluetooth_Rx_Priority_Assert_Offset\n    int16_t bt_rx_prio_assert_offset;\n    ///Bluetooth_Rx_Priority_Assert_Jitter\n    uint16_t bt_rx_prio_assert_jitter;\n    ///Bluetooth_Rx_Priority_Deassert_Offset\n    int16_t bt_rx_prio_deassert_offset;\n    ///Bluetooth_Rx_Priority_Deassert_Jitter\n    uint16_t bt_rx_prio_deassert_jitter;\n    ///802_Rx_Priority_Assert_Offset\n    int16_t _802_rx_prio_assert_offset;\n    ///802_Rx_Priority_Assert_Jitter\n    uint16_t _802_rx_prio_assert_jitter;\n    ///802_Rx_Priority_Deassert_Offset\n    int16_t _802_rx_prio_deasssert_offset;\n    ///802_Rx_Priority_Deassert_Jitter\n    uint16_t _802_rx_prio_deassert_jitter;\n    ///Bluetooth_Tx_On_Assert_Offset\n    int16_t bt_tx_on_assert_offset;\n    ///Bluetooth_Tx_On_Assert_Jitter\n    uint16_t bt_tx_on_assert_jitter;\n    ///Bluetooth_Tx_On_Deassert_Offset\n    int16_t bt_tx_on_deassert_offset;\n    ///Bluetooth_Tx_On_Deassert_Jitter\n    uint16_t bt_tx_on_deassert_jitter;\n    ///802_Tx_On_Assert_Offset\n    int16_t _802_tx_on_assert_offset;\n    ///802_Tx_On_Assert_Jitter\n    uint16_t _802_tx_on_assert_jitter;\n    ///802_Tx_On_Deassert_Offset\n    int16_t _802_tx_on_deassert_offset;\n    ///802_Tx_On_Deassert_Jitter\n    uint16_t _802_tx_on_deassert_jitter;\n};\n\n/// HCI Set MWS Transport Layer command\nstruct hci_set_mws_transport_layer_cmd\n{\n    ///Transport_Layer\n    uint8_t transport_layer;\n    ///To_MWS_Baud_Rate\n    uint32_t to_mws_baud_rate;\n    ///From_MWS_Baud_Rate\n    uint32_t from_mws_baud_rate;\n};\n\n/// HCI Set MWS Scan Frequency Table command\nstruct hci_set_mws_scan_freq_table_cmd\n{\n    ///Num_Scan_Frequencies\n    uint8_t num_scan_frequencies;\n    ///Scan_Frequency_Low[i]\n    uint16_t scan_frequency_low[1/*__ARRAY_EMPTY*/];\n    ///Scan_Frequency_High[i]\n    uint16_t scan_frequency_high[1/*__ARRAY_EMPTY*/];\n};\n\n/// HCI Set MWS Pattern Configuration command\nstruct hci_set_mws_pattern_config_cmd\n{\n    ///MWS_PATTERN_Index\n    uint8_t mws_pattern_index;\n    ///MWS_PATTERN_NumIntervals\n    uint8_t mws_pattern_num_intervals;\n    ///MWS_PATTERN_IntervalDuration[i]\n    uint16_t mws_pattern_interval_duration[1/*__ARRAY_EMPTY*/];\n    ///MWS_PATTERN_IntervalType[i]\n    uint8_t mws_pattern_interval_type[1/*__ARRAY_EMPTY*/];\n};\n\n/// Hci Get MWS Transport Layer Configuration command complete event\nstruct hci_get_mws_transport_layer_config_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    ///Num_Transports\n    uint8_t num_transports;\n    ///Transport_Layer[i]\n    uint8_t transport_layer[1/*__ARRAY_EMPTY*/];\n    ///Num_Baud_Rates[i]\n    uint8_t num_baud_rates[1/*__ARRAY_EMPTY*/];\n    ///To_MWS_Baud_Rate[k]\n    uint32_t to_mws_baud_rate[1/*__ARRAY_EMPTY*/];\n    ///From_MWS_Baud_Rate[k]\n    uint32_t from_mws_baud_rate[1/*__ARRAY_EMPTY*/];\n};\n\n/// HCI read Secure Connections Host Support complete event\nstruct  hci_rd_sec_con_host_supp_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    /// Secure Connections Host Support\n    uint8_t sec_con_host_supp;\n};\n\n/// HCI write Secure Connections Host Support command\nstruct  hci_wr_sec_con_host_supp_cmd\n{\n    /// Secure Connections Host Support\n    uint8_t sec_con_host_supp;\n};\n\n/// HCI Set Reserved LT_ADDR command\nstruct hci_set_res_lt_addr_cmd\n{\n    /// LT_ADDR\n    uint8_t lt_addr;\n};\n\n/// HCI Set Reserved LT_ADDR command complete event\nstruct hci_set_res_lt_addr_cmd_cmp_evt\n{\n    /// Status\n    uint8_t  status;\n    /// LT_ADDR\n    uint8_t lt_addr;\n};\n\n/// HCI Delete Reserved LT_ADDR command\nstruct hci_del_res_lt_addr_cmd\n{\n    /// LT_ADDR\n    uint8_t lt_addr;\n};\n\n/// HCI Delete Reserved LT_ADDR command complete event\nstruct hci_del_res_lt_addr_cmd_cmp_evt\n{\n    /// Status\n    uint8_t  status;\n    /// LT_ADDR\n    uint8_t lt_addr;\n};\n\n/// HCI Set Connectionless Slave Broadcast Data command\nstruct hci_set_con_slv_bcst_data_cmd\n{\n    /// LT_ADDR\n    uint8_t lt_addr;\n    /// Fragment\n    uint8_t fragment;\n    /// Data_Length (in bytes)\n    uint8_t data_length;\n    /// Data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n/// HCI Set Connectionless Slave Broadcast Data command complete event\nstruct hci_set_con_slv_bcst_data_cmd_cmp_evt\n{\n    /// Status\n    uint8_t  status;\n    /// LT_ADDR\n    uint8_t lt_addr;\n};\n\n/// HCI Read Synchronization Train Parameters command complete event\nstruct hci_rd_sync_train_param_cmd_cmp_evt\n{\n    /// Status\n    uint8_t  status;\n    /// Sync_Train_Interval (in slots)\n    uint16_t sync_train_int;\n    /// synchronization_trainTO (in slots)\n    uint32_t sync_train_to;\n    /// Service_Data\n    uint8_t service_data;\n};\n\n/// HCI Write Synchronization Train Parameters command\nstruct hci_wr_sync_train_param_cmd\n{\n    /// Interval_Min (in slots)\n    uint16_t int_min;\n    /// Interval_Max (in slots)\n    uint16_t int_max;\n    /// synchronization_trainTO (in slots)\n    uint32_t sync_train_to;\n    /// Service_Data\n    uint8_t service_data;\n};\n\n/// HCI Write Synchronization Train Parameters command complete event\nstruct hci_wr_sync_train_param_cmd_cmp_evt\n{\n    /// Status\n    uint8_t  status;\n    /// Sync_Train_Interval (in slots)\n    uint16_t sync_train_int;\n};\n\n// HCI Synchronization Train Complete event\nstruct hci_sync_train_cmp_evt\n{\n    /// Status\n    uint8_t  status;\n};\n\n/// HCI read authenticated payload timeout command\nstruct hci_rd_auth_payl_to_cmd\n{\n    ///Connection handle\n    uint16_t     conhdl;\n};\n\n/// HCI command complete event structure for the Read Authenticated Payload Timeout Command\nstruct hci_rd_auth_payl_to_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Connection handle\n    uint16_t     conhdl;\n    ///Authenticated payload timeout\n    uint16_t     auth_payl_to;\n};\n\n/// HCI command complete event structure for read oob extended data command\nstruct hci_rd_loc_oob_ext_data_cmd_cmp_evt\n{\n    ///status\n    uint8_t     status;\n    ///hash part\n    struct hash oob_c_192;\n    ///random part\n    struct randomizer oob_r_192;\n    ///hash part\n    struct hash oob_c_256;\n    ///random part\n    struct randomizer oob_r_256;\n};\n\n/// HCI read Extended Page Timeout CC event\nstruct hci_rd_ext_page_to_cmd_cmp_evt\n{\n    /// Status\n    uint8_t  status;\n    /**\n     * Extended Page Timeout measured in Number of Baseband slots. Interval Length = N * 0.625 msec (1 Baseband slot)\n     * Range for N: 0x0000 (default) - 0xFFFF\n     * Time Range: 0 - 40.9 Seconds\n     */\n    uint16_t ext_page_to;\n};\n\n/// HCI write Extended Page Timeout\nstruct hci_wr_ext_page_to_cmd\n{\n    /**\n     * Extended Page Timeout measured in Number of Baseband slots. Interval Length = N * 0.625 msec (1 Baseband slot)\n     * Range for N: 0x0000 (default) - 0xFFFF\n     * Time Range: 0 - 40.9 Seconds\n     */\n    uint16_t ext_page_to;\n};\n\n/// HCI read Extended Inquiry Length CC event\nstruct hci_rd_ext_inq_len_cmd_cmp_evt\n{\n    /// Status\n    uint8_t  status;\n    /// Extended Inquiry Length\n    uint16_t ext_inq_len;\n};\n\n/// HCI write Extended Inquiry Length\nstruct hci_wr_ext_inq_len_cmd\n{\n    /// Extended Inquiry Length\n    uint16_t ext_inq_len;\n};\n\n/*\n * HCI INFORMATIONAL PARAMETERS COMMANDS PARAMETERS\n ****************************************************************************************\n */\n\n///HCI command complete event structure for read local version information\nstruct hci_rd_local_ver_info_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///HCI version number\n    uint8_t     hci_ver;\n    ///HCI revision number\n    uint16_t    hci_rev;\n    ///LMP version\n    uint8_t     lmp_ver;\n    ///manufacturer name\n    uint16_t    manuf_name;\n    ///LMP Subversion\n    uint16_t    lmp_subver;\n};\n\n///HCI command complete event structure for read local supported commands\nstruct hci_rd_local_supp_cmds_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t             status;\n    ///Supported Commands structure\n    struct supp_cmds    local_cmds;\n};\n\n/// HCI command complete event structure for read local supported features command\nstruct hci_rd_local_supp_feats_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t         status;\n    ///Local  supported features\n    struct features feats;\n};\n\nstruct hci_rd_local_ext_feats_cmd\n{\n    ///Page number\n    uint8_t page_nb;\n};\n\n/// HCI command complete event structure for read local extended features command\nstruct hci_rd_local_ext_feats_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Page number\n    uint8_t     page_nb;\n    ///Maximum page number\n    uint8_t     page_nb_max;\n    ///Extended LMP features\n    struct features ext_feats;\n};\n\n///HCI command complete event structure for the Read Buffer Size Command\nstruct hci_rd_buff_size_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///ACL data packet length controller can receive from host\n    uint16_t     hc_data_pk_len;\n    ///Synchronous data packet length controller can receive from host\n    uint8_t      hc_sync_pk_len;\n    ///Total number of ACL data packets controller can receive from host\n    uint16_t     hc_tot_nb_data_pkts;\n    ///Total number of synchronous data packets controller can receive from host\n    uint16_t     hc_tot_nb_sync_pkts;\n};\n\n///HCI command complete event structure for read bd address\nstruct hci_rd_bd_addr_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t             status;\n    ///BD address\n    struct bd_addr      local_addr;\n};\n\n/// HCI command complete event structure for read local supported codecs\nstruct hci_rd_local_supp_codecs_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t               status;\n    uint8_t               nb_supp_codecs;\n    uint8_t               nb_supp_vendor_specific_codecs;\n\n//    ///Supported Codecs structure\n//    struct supp_codecs    local_codecs;\n};\n\n/*\n * HCI STATUS PARAMETERS COMMANDS PARAMETERS\n ****************************************************************************************\n */\n\n/// HCI command complete event structure for read rssi\nstruct hci_rd_rssi_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///RSSI value\n    uint8_t rssi;\n};\n\nstruct hci_rd_clk_cmd\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Which clock\n    uint8_t clk_type;\n};\n\n/// HCI read clock command structure\nstruct hci_rd_clk_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///clock\n    uint32_t clk;\n    ///Accuracy\n    uint16_t clk_acc;\n};\n\n\n/*\n * HCI TESTING COMMANDS PARAMETERS\n ****************************************************************************************\n */\n\n/// HCI command complete event structure for read loop back mode command\nstruct hci_rd_loopback_mode_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Local  supported features\n    uint8_t     lb_mode;\n};\n\nstruct hci_wr_loopback_mode_cmd\n{\n    ///Local  supported features\n    uint8_t     lb_mode;\n};\nstruct hci_wr_sp_dbg_mode_cmd\n{\n    ///Simple pairing mode\n    uint8_t     sp_mode;\n};\n\n\n/// * TCI Event subcodes\nenum tci_evt_subcode \n{\n     TCI_LMP_TX_EVENT    = 0x22,\n     TCI_LMP_RX_EVENT    = 0x23,\n     TCI_LC_TX_EVENT     = 0x24,\n     TCI_LC_RX_EVENT     = 0x25,\n     TCI_BB_TX_EVENT     = 0x26,\n     TCI_BB_RX_EVENT     = 0x27,\n     TCI_HW_ERROR_EVENT  = 0x28,\n     TCI_RADIO_EVENT     = 0x30,\n     TCI_INTERRUPT_EVENT = 0x40,\n};\n\n/// LMP direction\n#define TCI_LMP_DIR_TX\t0\n#define TCI_LMP_DIR_RX\t1\n\n/// HCI tci lmp exchange event structure\nstruct hci_tci_lmp_evt\n{\n    ///code\n    uint8_t  tci_code;\n    ///length\n    uint8_t  evt_len;\n    ///subcode\n    uint8_t  subcode;\n    ///evt direction\n    uint8_t  direction;\n    ///lmp evt body\n    uint8_t  body[17];\n};\n\n/*\n * HCI LE CONTROLLER COMMANDS PARAMETERS\n ****************************************************************************************\n */\n\n///HCI LE Set Event Mask Command parameters structure\nstruct hci_le_set_evt_mask_cmd\n{\n    ///LE Event Mask\n    struct evt_mask le_mask;\n};\n\n///HCI LE Set Random Address Command parameters structure\nstruct hci_le_set_rand_addr_cmd\n{\n    ///Random address to set\n    struct bd_addr rand_addr;\n};\n\n///HCI LE Set Advertising Parameters Command parameters structure\nstruct hci_le_set_adv_param_cmd\n{\n    ///Minimum interval for advertising\n    uint16_t       adv_intv_min;\n    ///Maximum interval for advertising\n    uint16_t       adv_intv_max;\n    ///Advertising type\n    uint8_t        adv_type;\n    ///Own address type:  public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3\n    uint8_t        own_addr_type;\n    ///Peer address type: public=0 / random=1\n    uint8_t        peer_addr_type;\n    ///Peer Bluetooth device address\n    struct bd_addr peer_addr;\n    ///Advertising channel map\n    uint8_t        adv_chnl_map;\n    ///Advertising filter policy\n    uint8_t        adv_filt_policy;\n};\n\n///HCI LE Set Advertising Data Command parameters structure\nstruct hci_le_set_adv_data_cmd\n{\n    ///Advertising data length\n    uint8_t         adv_data_len;\n    ///Advertising data - maximum 31 bytes\n    struct adv_data data;\n};\n\n///HCI LE Set Scan Response Data Command parameters structure\nstruct hci_le_set_scan_rsp_data_cmd\n{\n    ///Scan response data length\n    uint8_t              scan_rsp_data_len;\n    ///Scan response data - maximum 31 bytes\n    struct scan_rsp_data data;\n};\n\n///HCI LE Set Advertise Enable Command parameters structure\nstruct hci_le_set_adv_en_cmd\n{\n    ///Advertising enable - 0=disabled, 1=enabled\n    uint8_t        adv_en;\n};\n\n///HCI LE Set Scan Parameters Command parameters structure\nstruct hci_le_set_scan_param_cmd\n{\n    ///Scan type - 0=passive / 1=active\n    uint8_t        scan_type;\n    ///Scan interval\n    uint16_t       scan_intv;\n    ///Scan window size\n    uint16_t       scan_window;\n    ///Own address type - public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3\n    uint8_t        own_addr_type;\n    ///Scan filter policy\n    uint8_t        scan_filt_policy;\n};\n\n///HCI LE Set Scan Enable Command parameters structure\nstruct hci_le_set_scan_en_cmd\n{\n    ///Scan enable - 0=disabled, 1=enabled\n    uint8_t        scan_en;\n    ///Enable for duplicates filtering - 0 =disabled/ 1=enabled\n    uint8_t        filter_duplic_en;\n};\n\n///HCI LE Create Connection Command parameters structure\nstruct hci_le_create_con_cmd\n{\n    ///Scan interval (N * 0.625 ms)\n    uint16_t       scan_intv;\n    ///Scan window size (N * 0.625 ms)\n    uint16_t       scan_window;\n    ///Initiator filter policy\n    uint8_t        init_filt_policy;\n    ///Peer address type - public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3\n    uint8_t        peer_addr_type;\n    ///Peer BD address\n    struct bd_addr peer_addr;\n    ///Own address type - public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3\n    uint8_t        own_addr_type;\n    ///Minimum of connection interval (N * 1.25 ms)\n    uint16_t       con_intv_min;\n    ///Maximum of connection interval (N * 1.25 ms)\n    uint16_t       con_intv_max;\n    ///Connection latency\n    uint16_t       con_latency;\n    ///Link supervision timeout\n    uint16_t       superv_to;\n    ///Minimum CE length (N * 0.625 ms)\n    uint16_t       ce_len_min;\n    ///Maximum CE length (N * 0.625 ms)\n    uint16_t       ce_len_max;\n};\n\n///HCI LE Add Device to White List Command parameters structure\nstruct hci_le_add_dev_to_wlst_cmd\n{\n    ///Type of address of the device to be added to the White List - 0=public/1=random\n    uint8_t        dev_addr_type;\n    ///Address of device to be added to White List\n    struct bd_addr dev_addr;\n};\n\n///HCI LE Remove Device from White List Command parameters structure\nstruct hci_le_rmv_dev_from_wlst_cmd\n{\n    ///Type of address of the device to be removed from the White List - 0=public/1=random\n    uint8_t        dev_addr_type;\n    ///Address of device to be removed from White List\n    struct bd_addr dev_addr;\n};\n\n///HCI LE Set Extended Scan Paramaters Command parameters structure\nstruct hci_le_set_ext_scan_param_cmd\n{\n    ///Own address type public/random/rpa\n    uint8_t         own_addr_type;\n    ///Scanning filter policy\n    uint8_t         scan_filt_policy;\n    ///Indicates the PHY(s) on which the advertising packets should be received\n    uint8_t         scan_phys;\n    ///Paramaters for PHY(s)\n    struct scan_phy_param\n    {\n        ///Scaning Type: passive/active\n        uint8_t         scan_type;\n        ///Scan interval (slots)\n        uint16_t        scan_intv;\n        ///Scan window size (slots)\n        uint16_t        scan_window;\n    } phy[MAX_SCAN_PHYS];\n};\n\n///HCI LE Set Extended Scan Enable Command parameters structure\nstruct hci_le_set_ext_scan_en_cmd\n{\n    ///Scan enable - 0=disabled, 1=enabled\n    uint8_t             scan_en; \n    ///Filter duplicates - 0=disabled, 1=enabled, 2=enabled & reset each scan period\n    uint8_t             filter_duplic_en;\n    ///Scan duration (Time=N*10ms)\n    uint16_t            duration;\n    ///Scan period (Time=N*1.28sec)\n    uint16_t            period;\n};\n\n///HCI LE Extended Create Connection Command parameters strucuture\nstruct hci_le_ext_create_con_cmd\n{\n    ///Initiator filter policy\n    uint8_t         init_filter_policy;\n    ///Own address type public/random/rpa\n    uint8_t         own_addr_type;\n    ///Peer address type public/random/rpa\n    uint8_t         peer_addr_type;\n    ///Peer address\n    struct bd_addr  peer_addr;\n    ///Indicates the PHY(s) on which the advertising packets should be received\n    uint8_t         init_phys;\n    ///Paramaters for PHY(s)\n    struct init_phy_param\n    {\n        ///Scan interval (N * 0.625 ms)\n        uint16_t        scan_interval;\n        ///Scan window size (N * 0.625 ms)\n        uint16_t        scan_window;\n        ///Minimum of connection interval (N * 1.25 ms)\n        uint16_t       con_intv_min;\n        ///Maximum of connection interval (N * 1.25 ms)\n        uint16_t       con_intv_max;\n        ///Connection latency\n        uint16_t       con_latency;\n        ///Link supervision timeout\n        uint16_t       superv_to;\n        ///Minimum CE length (N * 0.625 ms)\n        uint16_t       ce_len_min;\n        ///Maximum CE length (N * 0.625 ms)\n        uint16_t       ce_len_max;\n    } phy[MAX_INIT_PHYS];\n};\n\n///HCI LE Periodic Advertising Create Sync Command parameters strucutre\nstruct hci_le_per_adv_create_sync_cmd\n{\n    ///Filter policy\n    uint8_t         filter_policy;\n    ///Advertising SID\n    uint8_t         adv_sid;\n    ///Advertising address type\n    uint8_t         adv_addr_type;\n    ///Advertiser address\n    struct bd_addr  adv_addr;\n    ///max Skip after receive\n    uint16_t        skip;\n    ///Sync timeout (Time=N*10ms)\n    uint16_t        sync_to;\n};\n\n///HCI LE Periodic Advertising Terminate Sync Command parameters structure\nstruct hci_le_per_adv_term_sync_cmd\n{\n    ///Sync handle\n    uint16_t        sync_handle;\n};\n\n///HCI LE Add Device to Periodic Advertiser List Command parameters structure\nstruct hci_le_add_dev_to_per_adv_list_cmd\n{\n     ///Advertiser address type\n    uint8_t         adv_addr_type;\n    ///Advertiser address\n    struct bd_addr  adv_addr;\n    ///Advertising SID\n    uint8_t         adv_sid;\n};\n\n///HCI LE Remove Device from Periodic Advertiser List Command parameters structure\nstruct hci_le_rmv_dev_from_per_adv_list_cmd\n{\n     ///Advertiser address type\n    uint8_t         adv_addr_type;\n    ///Advertiser address\n    struct bd_addr  adv_addr;\n    ///Advertising SID\n    uint8_t         adv_sid;\n};\n\n///HCI LE Set Privacy Mode Command parameters structure\nstruct hci_le_set_priv_mode_cmd\n{\n    ///Peer identity address type\n    uint8_t         peer_addr_type;\n    ///Peer identity address\n    struct bd_addr  peer_addr;\n    ///Privacy mode\n    uint8_t         priv_mode;\n};\n\n///HCI LE Set Host Channel Classification Command parameters structure\nstruct hci_le_set_host_ch_class_cmd\n{\n    ///Channel map\n    struct le_chnl_map chmap;\n};\n\n\n///HCI LE Receiver Test Command parameters structure\nstruct hci_le_rx_test_cmd\n{\n    ///RX frequency for Rx test\n    uint8_t        rx_freq;\n};\n\n///HCI LE Transmitter Test Command parameters structure\nstruct hci_le_tx_test_cmd\n{\n    ///TX frequency for Tx test\n    uint8_t        tx_freq;\n    ///TX test data length\n    uint8_t        test_data_len;\n    ///TX test payload type - see enum\n    uint8_t        pk_payload_type;\n};\n\n///HCI LE Encrypt Command parameters structure\nstruct hci_le_enc_cmd\n{\n    ///Long term key structure\n    struct ltk     key;\n    ///Pointer to buffer with plain data to encrypt - 16 bytes\n    uint8_t        plain_data[16];\n};\n\n/// HCI LE Connection Update Command parameters structure\nstruct hci_le_con_update_cmd\n{\n    ///Connection Handle\n    uint16_t       conhdl;\n    ///Minimum of connection interval (units of 1.25 ms)\n    uint16_t       con_intv_min;\n    ///Maximum of connection interval (units of 1.25 ms)\n    uint16_t       con_intv_max;\n    ///Connection latency (units of connection event)\n    uint16_t       con_latency;\n    ///Link supervision timeout (units of 10 ms)\n    uint16_t       superv_to;\n    ///Minimum of CE length (units of 0.625 ms)\n    uint16_t       ce_len_min;\n    ///Maximum of CE length (units of 0.625 ms)\n    uint16_t       ce_len_max;\n};\n\n/// HCI LE Start Encryption Command parameters structure\nstruct hci_le_start_enc_cmd\n{\n    ///Connection handle\n    uint16_t        conhdl;\n    ///Random number - 8B\n    struct rand_nb  nb;\n    ///Encryption Diversifier\n    uint16_t       enc_div;\n    ///Long term key\n    struct ltk     ltk;\n};\n\n/// HCI long term key request reply command parameters structure\nstruct hci_le_ltk_req_reply_cmd\n{\n    ///Connection handle\n    uint16_t        conhdl;\n    ///Long term key\n    struct ltk      ltk;\n};\n\n/// HCI long term key request negative reply command parameters structure\nstruct hci_le_ltk_req_neg_reply_cmd\n{\n    ///Connection handle\n    uint16_t        conhdl;\n};\n\n/// HCI LE remote connection parameter request reply command parameters structure\nstruct hci_le_rem_con_param_req_reply_cmd\n{\n    ///Connection handle\n    uint16_t        conhdl;\n    ///Interval_Min\n    uint16_t        interval_min;\n    ///Interval_Max\n    uint16_t        interval_max;\n    ///Latency\n    uint16_t        latency;\n    ///Timeout\n    uint16_t        timeout;\n    ///Minimum_CE_Length\n    uint16_t        min_ce_len;\n    ///Maximum_CE_Length\n    uint16_t        max_ce_len;\n};\n\n/// HCI LE remote connection parameter request negative reply command parameters structure\nstruct hci_le_rem_con_param_req_neg_reply_cmd\n{\n    ///Connection handle\n    uint16_t        conhdl;\n    ///Reason\n    uint8_t         reason;\n};\n\n\n/// HCI LE Set Data Length  Command parameters structure\nstruct hci_le_set_data_len_cmd\n{\n    ///Connection Handle\n    uint16_t       conhdl;\n    ///Preferred maximum number of payload octets that the local Controller should include\n    ///in a single Link Layer Data Channel PDU.\n    uint16_t       tx_octets;\n    ///Preferred maximum number of microseconds that the local Controller should use to transmit\n    ///a single Link Layer Data Channel PDU\n    uint16_t       tx_time;\n};\n\n/// HCI LE Read Suggested Default Data Length Command\nstruct hci_le_wr_suggted_dft_data_len_cmd\n{\n    ///Suggested value for the Controller's maximum transmitted number of payload octets to be used\n    uint16_t       suggted_max_tx_octets;\n    ///Suggested value for the Controller's maximum packet transmission time to be used\n    uint16_t       suggted_max_tx_time;\n};\n\n/// HCI LE Add Device to Resolving List Command\nstruct hci_le_add_dev_to_rslv_list_cmd\n{\n    /// Peer Identity Address Type\n    uint8_t             peer_id_addr_type;\n    /// Peer Identity Address\n    struct bd_addr      peer_id_addr;\n    /// Peer IRK\n    struct irk          peer_irk;\n    /// Local IRK\n    struct irk          local_irk;\n};\n\n/// HCI LE Remove Device From Resolving List Command\nstruct hci_le_rmv_dev_from_rslv_list_cmd\n{\n    /// Peer Identity Address Type\n    uint8_t             peer_id_addr_type;\n    /// Peer Identity Address\n    struct bd_addr      peer_id_addr;\n};\n\n/// HCI LE Read Peer Resolvable Address Command\nstruct hci_le_rd_peer_rslv_addr_cmd\n{\n    /// Peer Identity Address Type\n    uint8_t             peer_id_addr_type;\n    /// Peer Identity Address\n    struct bd_addr      peer_id_addr;\n};\n\n/// HCI LE Read Local Resolvable Address Command\nstruct hci_le_rd_loc_rslv_addr_cmd\n{\n    /// Peer Identity Address Type\n    uint8_t             peer_id_addr_type;\n    /// Peer Identity Address\n    struct bd_addr      peer_id_addr;\n};\n\n/// HCI LE Set Address Resolution Enable Command\nstruct hci_le_set_addr_resol_en_cmd\n{\n    /// Address Resolution Enable\n    uint8_t             enable;\n};\n\n/// HCI LE Set Resolvable Private Address Timeout Command\nstruct hci_le_set_rslv_priv_addr_to_cmd\n{\n    /// RPA Timeout\n    uint16_t            rpa_timeout;\n};\n\n/*\n * HCI EVENTS PARAMETERS\n ****************************************************************************************\n */\n\n/// HCI inquiry complete event structure\nstruct hci_inq_cmp_evt\n{\n    ///Status of the procedure\n    uint8_t status;\n};\n\n\n/// HCI Inquiry result event structure (with only 1 result)\nstruct hci_inq_res_evt\n{\n\n    ///Number of response\n    uint8_t     nb_rsp;\n    ///BdAddr\n    struct bd_addr bd_addr;\n    ///Page Scan Repetition Mode\n    uint8_t     page_scan_rep_mode;\n    ///Reserved\n    uint8_t     reserved1;\n    ///Reserved\n    uint8_t     reserved2;\n    ///class of device\n    struct devclass class_of_dev;\n    ///Clock Offset\n    uint16_t        clk_off;\n\n};\n\n/// HCI Inquiry result with rssi event structure (with only 1 result)\nstruct hci_inq_res_with_rssi_evt\n{\n    ///Number of response\n    uint8_t     nb_rsp;\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Page Scan Repetition Mode\n    uint8_t     page_scan_rep_mode;\n    ///Reserved\n    uint8_t     reserved1;\n    ///class of device\n    struct devclass class_of_dev;\n    ///Clock Offset\n    uint16_t     clk_off;\n    ///Rssi\n    uint8_t      rssi;\n\n};\n\n/// HCI Extended inquiry result indication structure (with only 1 result)\nstruct hci_ext_inq_res_evt\n{\n    ///Number of response\n    uint8_t     nb_rsp;\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Page Scan Repetition Mode\n    uint8_t     page_scan_rep_mode;\n    ///Reserved\n    uint8_t     reserved1;\n    ///class of device\n    struct devclass class_of_dev;\n    ///Clock Offset\n    uint16_t        clk_off;\n    ///RSSi\n    uint8_t         rssi;\n    ///Extended inquiry response data\n    struct eir      eir;\n};\n\n/// HCI disconnect complete event structure\nstruct hci_disc_cmp_evt\n{\n    ///Status of received command\n    uint8_t     status;\n    ///Connection Handle\n    uint16_t    conhdl;\n    ///Reason for disconnection\n    uint8_t     reason;\n};\n\n/// HCI basic command complete event structure\nstruct hci_basic_cmd_cmp_evt\n{\n    ///Status of the command reception\n    uint8_t status;\n};\n\n/// HCI basic command complete event structure with connection handle\nstruct hci_basic_conhdl_cmd_cmp_evt\n{\n    /// status\n    uint8_t     status;\n    /// connection handle\n    uint16_t    conhdl;\n};\n\n/// HCI basic command complete event structure with BD address\nstruct hci_basic_bd_addr_cmd_cmp_evt\n{\n    ///status\n   uint8_t         status;\n   ///BdAddr\n    struct bd_addr bd_addr;\n};\n\n/// HCI basic event structure with status and BD address\nstruct hci_basic_stat_bd_addr_evt\n{\n    ///status\n   uint8_t         status;\n   ///BdAddr\n    struct bd_addr bd_addr;\n};\n\n/// HCI basic event including a connection handle as parameter\nstruct hci_basic_conhdl_evt\n{\n    ///Connection handle\n    uint16_t     conhdl;\n};\n\n/// HCI complete event with status only.\nstruct hci_cmd_stat_event\n{\n    /// Status of the command reception\n    uint8_t status;\n};\n\n/// HCI number of packet complete event structure\nstruct hci_nb_cmp_pkts_evt\n{\n    /// number of handles\n    uint8_t     nb_of_hdl;\n    /// connection handle\n    uint16_t    conhdl[1];\n    /// number of completed packets\n    uint16_t    nb_comp_pkt[1];\n};\n\n/// HCI data buffer overflow event structure\nstruct hci_data_buf_ovflw_evt\n{\n    ///Link type\n    uint8_t link_type;\n};\n\n/// HCI Hardware Error Event parameters structure\nstruct hci_hw_err_evt\n{\n    /// HW error code\n    uint8_t hw_code;\n};\n\n/// HCI encryption change event structure\nstruct hci_enc_change_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Encryption enabled information\n    uint8_t     enc_stat;\n};\n\n/// HCI encryption key refresh complete event structure\nstruct hci_enc_key_ref_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n};\n\n/// HCI Authenticated Payload Timeout Expired Event structure\nstruct hci_auth_payl_to_exp_evt\n{\n    ///Connection handle\n    uint16_t     conhdl;\n};\n\n/// HCI command complete event structure for create connection\nstruct hci_con_cmp_evt\n{\n    /// Status\n    uint8_t             status;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///Bluetooth Device address\n    struct bd_addr      bd_addr;\n    ///Link type\n    uint8_t             link_type;\n    ///Encryption state\n    uint8_t             enc_en;\n};\n\n/// HCI command complete event structure for qos setup\nstruct hci_qos_setup_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Flags\n    uint8_t flags;\n    ///Service type\n    uint8_t serv_type;\n    ///Token rate\n    uint32_t tok_rate;\n    ///Peak bandwidth\n    uint32_t pk_bw;\n    ///Latency\n    uint32_t lat;\n    ///Delay variation\n    uint32_t del_var;\n};\n\n/// HCI flow specification complete event parameters structure\nstruct hci_flow_spec_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Flags\n    uint8_t flags;\n    ///Flow direction\n    uint8_t flow_dir;\n    ///Service type\n    uint8_t serv_type;\n    ///Token rate\n    uint32_t tk_rate;\n    ///Token buffer size\n    uint32_t tk_buf_sz;\n    ///Peak bandwidth\n    uint32_t pk_bw;\n    ///Access latency\n    uint32_t acc_lat;\n};\n\n/// HCI role change event parameters structure\nstruct hci_role_chg_evt\n{\n    ///Status\n    uint8_t status;\n    ///BD address\n    struct bd_addr bd_addr;\n    ///New role\n    uint8_t new_role;\n};\n\n/// HCI complete event structure for the read clock offset command\nstruct hci_rd_clk_off_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Clock offset\n    uint16_t clk_off_val;\n};\n\n/// HCI event structure for the flush occurred event\nstruct hci_flush_occurred_evt\n{\n    ///Connection handle\n    uint16_t conhdl;\n};\n\n/// HCI max slot change event structure\nstruct hci_max_slot_chg_evt\n{\n    ///Connection handle\n    uint16_t conhdl;\n    ///Max slot\n    uint8_t max_slot;\n};\n\n/// HCI sniff subrating event parameters structure\nstruct hci_sniff_sub_evt\n{\n    ///Status.\n    uint8_t     status;\n    ///Connection handle\n    uint16_t    conhdl;\n    ///Maximum transmit latency\n    uint16_t    max_lat_tx;\n    ///Maximum receive latency\n    uint16_t    max_lat_rx;\n    ///Minimum remote TO\n    uint16_t    min_rem_to;\n    ///Minimum local TO\n    uint16_t    min_loc_to;\n};\n\n/// HCI read remote extended features complete event parameters structure\nstruct hci_rd_rem_ext_feats_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///page number\n    uint8_t pg_nb;\n    ///page number max\n    uint8_t pg_nb_max;\n    ///ext LMP features\n    struct features ext_feats;\n};\n\n/// HCI read remote extended features complete event parameters structure\nstruct hci_rem_host_supp_feats_notif_evt\n{\n    ///BD address\n    struct bd_addr bd_addr;\n    ///ext lmp features\n    struct features ext_feats;\n};\n\n/// HCI command complete event structure for the read remote supported features command\nstruct hci_rd_rem_supp_feats_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Remote features\n    struct features rem_feats;\n};\n\n/// HCI command complete event structure for the read remote information version command\nstruct hci_rd_rem_ver_info_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///LMP version\n    uint8_t     vers;\n    ///Manufacturer name\n    uint16_t    compid;\n    ///LMP subversion\n    uint16_t    subvers;\n};\n\n/// HCI encryption change event structure\nstruct hci_enc_chg_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Encryption enabled information\n    uint8_t     enc_stat;\n};\n\n/// HCI mode change event structure\nstruct hci_mode_chg_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t    conhdl;\n    ///Current mode\n    uint8_t    cur_mode;\n    /// Interval\n    uint16_t    interv;\n};\n\n/// HCI simple pairing complete event structure\nstruct hci_sp_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Bluetooth Device address\n    struct bd_addr      bd_addr;\n};\n\n/// HCI Authentication complete event structure\nstruct hci_auth_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t    conhdl;\n};\n\n/// HCI change connection link key complete event structure\nstruct hci_chg_con_lk_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    ///Connection handle\n    uint16_t    conhdl;\n};\n\n/// HCI encryption key refresh complete event structure\nstruct hci_enc_key_refresh_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t    conhdl;\n};\n\n/// HCI master link key complete event structure\nstruct hci_master_lk_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t    conhdl;\n    ///Key flag\n    uint8_t key_flag;\n};\n/// HCI synchronous link connection complete event structure\nstruct hci_sync_con_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t    conhdl;\n    ///BD address\n    struct bd_addr bd_addr;\n    ///Link type\n    uint8_t lk_type;\n    ///Transmit interval\n    uint8_t tx_int;\n    ///Retransmission window\n    uint8_t ret_win;\n    ///rx packet length\n    uint16_t rx_pkt_len;\n    ///tx packet length\n    uint16_t tx_pkt_len;\n    ///Air mode\n    uint8_t air_mode;\n\n};\n\n/// HCI synchronous connection change event structure\nstruct hci_sync_con_chg_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Synchronous Connection handle\n    uint16_t    sync_conhdl;\n    ///Transmit interval\n    uint8_t tx_int;\n    ///Retransmission window\n    uint8_t ret_win;\n    ///rx packet length\n    uint16_t rx_pkt_len;\n    ///tx packet length\n    uint16_t tx_pkt_len;\n};\n\n/// HCI connection packet type change event structure\nstruct hci_con_pkt_type_chg_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Synchronous Connection handle\n    uint16_t    sync_conhdl;\n    ///Synchronous packet type\n    uint16_t    pkt_type;\n};\n\n/// HCI link supervision timeout change event structure\nstruct hci_link_supv_to_chg_evt\n{\n    ///Connection handle\n    uint16_t    conhdl;\n    ///Link supervision timeout\n    uint16_t    lsto_val;\n};\n\n/// HCI link key request event structure\nstruct hci_lk_req_evt\n{\n    ///BD address\n    struct bd_addr bd_addr;\n};\n\n/// HCI encryption key refresh event structure\nstruct hci_enc_key_refresh_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t    conhdl;\n};\n\n/// HCI connection request event structure\nstruct hci_con_req_evt\n{\n    ///BD address\n    struct bd_addr bd_addr;\n    ///Class of device\n    struct devclass classofdev;\n    ///link type\n    uint8_t lk_type;\n};\n\n/// HCI quality of service violation event structure\nstruct hci_qos_viol_evt\n{\n    ///Connection handle\n    uint16_t conhdl;\n};\n\n/// HCI io capability response event structure\nstruct hci_io_cap_rsp_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///IO capability\n    uint8_t io_capa;\n    ///OOB data present\n    uint8_t oob_data_pres;\n    ///Authentication requirements\n    uint8_t auth_req;\n\n};\n\n/// HCI IO capability response event structure\nstruct hci_io_cap_req_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n};\n\n/// HCI Return link keys event structure\nstruct hci_return_link_keys_evt\n{\n    ///Number of Keys\n    uint8_t num_keys;\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Key\n    struct ltk      key;\n};\n\n/// HCI pin code request event structure\nstruct hci_pin_code_req_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n};\n\n/// HCI user passkey request event structure\nstruct hci_user_passkey_req_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n};\n\n/// HCI user passkey notification event structure\nstruct hci_user_passkey_notif_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Passkey\n    uint32_t passkey;\n};\n\n/// HCI remote OOB data request event structure\nstruct hci_rem_oob_data_req_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n};\n\n/// HCI user confirmation request event structure\nstruct hci_user_cfm_req_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Passkey\n    uint32_t passkey;\n};\n\n/// HCI keypress notification event structure\nstruct hci_keypress_notif_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///type\n    uint8_t type;\n};\n\n/// HCI link key notification event structure\nstruct hci_lk_notif_evt\n{\n    ///BdAddr\n    struct bd_addr  bd_addr;\n    ///Key\n    struct ltk  key;\n    ///type\n    uint8_t key_type;\n};\n\n\n/*\n * HCI LE META EVENTS PARAMETERS\n ****************************************************************************************\n */\n\n\n// LE event structures\n\n/// HCI command complete event structure for the Read Local Supported Features\nstruct hci_le_rd_local_supp_feats_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t             status;\n    ///Local LE supported features\n    struct le_features  feats;\n};\n\n/// HCI command complete event structure for the Read Advertising Channel Tx Power Command\nstruct hci_rd_adv_chnl_tx_pw_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Advertising channel Tx power level\n    int8_t     adv_tx_pw_lvl;\n};\n\n///HCI command complete event structure for the Read White List Size Command\nstruct hci_le_rd_wlst_size_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///White List size\n    uint8_t     wlst_size;\n};\n\n///HCI command complete event structure for the Read Buffer Size Command\nstruct hci_le_rd_buff_size_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///ACL data packet length that can be sent from host to controller\n    uint16_t    hc_data_pk_len;\n    ///Total number of ACL data packets that can be sent from host to controller.\n    uint8_t     hc_tot_nb_data_pkts;\n};\n\n///HCI command complete event structure for LE Rand Command\nstruct hci_le_rand_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t             status;\n    ///Random number\n    struct rand_nb      nb;\n};\n\n///HCI command complete event structure for Read Supported States Command\nstruct hci_rd_supp_states_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t             status;\n    ///LE supported states response\n    struct le_states    states;\n};\n\n///HCI command complete event structure for Read Transmit Power Command\nstruct hci_rd_tx_pwr_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t             status;\n    /// Minimum transmit power\n    uint8_t             min_tx_pwr;\n    /// Maximum transmit power\n    uint8_t             max_tx_pwr;\n};\n\n///HCI command complete event structure for Test End\nstruct hci_test_end_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t             status;\n    ///Number of RX packets - null if TX test was the ended one\n    uint16_t            nb_packet_received;\n};\n\n///HCI LE Encrypt complete event structure\nstruct hci_le_enc_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t status;\n    ///Encrypted data to return to command source.\n    uint8_t encrypted_data[ENC_DATA_LEN];\n};\n\n#if BLE_EMB_PRESENT || BLE_HOST_PRESENT\n///HCI LE advertising report event structure\nstruct hci_le_adv_report_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Number of advertising reports in this event\n    uint8_t             nb_reports;\n    ///Advertising reports structures array\n    struct adv_report   adv_rep[BLE_ADV_REPORTS_MAX];\n};\n\n///HCI LE extended advertising report event structure\nstruct hci_le_ext_adv_report_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Number of advertising reports in this event\n    uint8_t             nb_reports;\n    ///Paramaters for each report\n    struct ext_adv_report adv_rep[BLE_ADV_REPORTS_MAX];\n};\n\n///HCI LE periodic advertising sync established event structure\nstruct hci_le_per_adv_sync_est_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    /// Status of the advertising sync\n    uint8_t             status;\n    /// Sync Handle to be used\n    uint16_t            sync_handle;\n    /// Advertising SID\n    uint8_t             adv_sid;\n    ///Advertising address type: public/random\n    uint8_t             adv_addr_type;\n    ///Advertising address value\n    struct bd_addr      adv_addr;\n    /// Advertiser PHY\n    uint8_t             phy;\n    /// Advertising interval (Time=N*1.25ms)\n    uint16_t            interval;\n    /// Advertiser clock accuracy\n    uint8_t             adv_ca;\n};\n\n///HCI LE periodic advertising report event structure\nstruct hci_le_per_adv_report_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    /// Sync Handle to be used\n    uint16_t            sync_handle;\n    /// Tx Power\n    uint8_t             tx_power;\n    /// RSSI\n    uint8_t             rssi;\n    /// Data Status\n    uint8_t             status;\n    ///Data length in advertising packet\n    uint8_t             data_len;\n    ///Data of advertising packet\n    uint8_t             data[PER_ADV_DATA_MAX_LEN];\n    ///Unused\n    uint8_t             unused;\n};\n\n///HCI LE periodic advertising sync lost event structure\nstruct hci_le_per_adv_sync_lost_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    /// Sync Handle to be used\n    uint16_t            sync_handle;\n};\n\n///HCI LE scan timeout event structure\nstruct hci_le_scan_timeout_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n};\n\n#endif //BLE_EMB_PRESENT || BLE_HOST_PRESENT\n\n/// HCI command complete event structure for Read Channel Map Command\nstruct hci_le_rd_chnl_map_cmd_cmp_evt\n{\n    ///Status of command reception\n    uint8_t            status;\n    ///Connection handle\n    uint16_t           conhdl;\n    ///Channel map\n    struct le_chnl_map ch_map;\n};\n\n/// HCI command complete event structure for Long Term Key Request Reply Command\nstruct hci_le_ltk_req_reply_cmd_cmp_evt\n{\n    ///Status of command reception\n    uint8_t        status;\n    ///Connection handle\n    uint16_t       conhdl;\n};\n\n/// HCI command complete event structure for Long Term Key Request Negative Reply Command\nstruct hci_le_ltk_req_neg_reply_cmd_cmp_evt\n{\n    ///Status of command reception\n    uint8_t        status;\n    ///Connection handle\n    uint16_t       conhdl;\n};\n\n/// HCI command complete event structure for LE Read Suggested Default Data Length Command\nstruct hci_le_rd_suggted_dft_data_len_cmd_cmp_evt\n{\n    ///Status of command reception\n    uint8_t        status;\n    ///Host's suggested value for the Controller's maximum transmitted number of payload octets\n    uint16_t       suggted_max_tx_octets;\n    ///Host's suggested value for the Controller's maximum packet transmission time\n    uint16_t       suggted_max_tx_time;\n};\n/// HCI command complete event structure for LE Read Maximum Data Length Command\nstruct hci_le_rd_max_data_len_cmd_cmp_evt\n{\n    ///Status of command reception\n    uint8_t        status;\n    ///Maximum number of payload octets that the local Controller supports for transmission\n    uint16_t       suppted_max_tx_octets;\n    ///Maximum time, in microseconds, that the local Controller supports for transmission\n    uint16_t       suppted_max_tx_time;\n    ///Maximum number of payload octets that the local Controller supports for reception\n    uint16_t       suppted_max_rx_octets;\n    ///Maximum time, in microseconds, that the local Controller supports for reception\n    uint16_t       suppted_max_rx_time;\n};\n\n/// HCI LE Read Peer Resolvable Address Command Complete Event\nstruct hci_le_rd_peer_rslv_addr_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    /// Peer Resolvable Address\n    struct bd_addr      peer_rslv_addr;\n};\n\n/// HCI LE Read Local Resolvable Address Command Complete Event\nstruct hci_le_rd_loc_rslv_addr_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    /// Local Resolvable Address\n    struct bd_addr      loc_rslv_addr;\n};\n\n/// HCI LE Read Resolving List Size Command Complete Event\nstruct hci_le_rd_rslv_list_size_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    /// Resolving List Size\n    uint8_t             size;\n};\n\n\n/// HCI write authenticated payload timeout command\nstruct hci_wr_auth_payl_to_cmd\n{\n    ///Connection handle\n    uint16_t     conhdl;\n    ///Authenticated payload timeout (N*10ms)\n    uint16_t     auth_payl_to;\n};\n\n/// HCI command complete event structure for the Write Authenticated Payload Timeout Command\nstruct hci_wr_auth_payl_to_cmd_cmp_evt\n{\n    /// Status of the command reception\n    uint8_t     status;\n    ///Connection handle\n    uint16_t     conhdl;\n};\n\n/// HCI command complete event structure for HCI LE Connection Update Command\nstruct hci_le_con_update_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Status of received command\n    uint8_t             status;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///Connection interval value\n    uint16_t            con_interval;\n    ///Connection latency value\n    uint16_t            con_latency;\n    ///Supervision timeout\n    uint16_t            sup_to;\n};\n\n/// HCI command complete event structure for create connection\nstruct hci_le_con_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Status of received command\n    uint8_t             status;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///Device role - 0=Master/ 1=Slave\n    uint8_t             role;\n    ///Peer address type - 0=public/1=random\n    uint8_t             peer_addr_type;\n    ///Peer address\n    struct bd_addr      peer_addr;\n    ///Connection interval\n    uint16_t            con_interval;\n    ///Connection latency\n    uint16_t            con_latency;\n    ///Link supervision timeout\n    uint16_t            sup_to;\n    ///Master clock accuracy\n    uint8_t             clk_accuracy;\n};\n\n/// HCI LE read remote used feature command parameters structure\nstruct hci_le_rd_rem_feats_cmd\n{\n    ///Connection handle\n    uint16_t            conhdl;\n};\n\n/// HCI command complete event structure for HCI LE read remote feature Command\nstruct hci_le_rd_rem_feats_cmd_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Status of received command\n    uint8_t             status;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///Le Features\n    struct le_features  le_feats;\n};\n\n/// HCI command structure for the read transmit power level command\nstruct hci_rd_tx_pwr_lvl_cmd\n{\n    ///Connection handle\n    uint16_t    conhdl;\n    ///Power Level type: current or maximum\n    uint8_t     type;\n};\n\n/// HCI command complete event structure for the read transmit power level command\nstruct hci_rd_tx_pwr_lvl_cmd_cmp_evt\n{\n    ///Status for command reception\n    uint8_t status;\n    ///Connection handle\n    uint16_t conhdl;\n    ///Value of TX power level\n    uint8_t     tx_pow_lvl;\n};\n\n/// HCI read remote information version command parameters structure\nstruct hci_rd_rem_ver_info_cmd\n{\n    ///Connection handle\n    uint16_t    conhdl;\n};\n\n/// HCI LE remote connection parameter request event\nstruct hci_le_rem_con_param_req_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///Interval_Min\n    uint16_t            interval_min;\n    ///Interval_Max\n    uint16_t            interval_max;\n    ///Latency\n    uint16_t            latency;\n    ///Timeout\n    uint16_t            timeout;\n};\n\n\n/// HCI command complete event structure for enhance create connection\nstruct hci_le_enh_con_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Status of received command\n    uint8_t             status;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///Device role - 0=Master/ 1=Slave\n    uint8_t             role;\n    ///Peer address type - 0=public/1=random\n    uint8_t             peer_addr_type;\n    ///Peer address\n    struct bd_addr      peer_addr;\n    ///Local Resolvable Private Address\n    struct bd_addr      loc_rslv_priv_addr;\n    ///Peer Resolvable Private Address\n    struct bd_addr      peer_rslv_priv_addr;\n    ///Connection interval\n    uint16_t            con_interval;\n    ///Connection latency\n    uint16_t            con_latency;\n    ///Link supervision timeout\n    uint16_t            sup_to;\n    ///Master clock accuracy\n    uint8_t             clk_accuracy;\n};\n\n\nstruct hci_generate_dhkey_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Status of received command\n    uint8_t             status;\n    /// The 32 byte Diffie Helman Key\n    uint8_t             dh_key[32];\n};\n\n\nstruct hci_rd_local_p256_public_key_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Status of received command\n    uint8_t             status;\n    /// The 32 byte Diffie Helman Key\n    uint8_t             public_key[64];\n\n};\n\n#if BLE_EMB_PRESENT || BLE_HOST_PRESENT\n/// HCI LE Direct Advertising Report Event\nstruct hci_le_dir_adv_rep_evt\n{\n    ///LE Subevent code\n    uint8_t                 subcode;\n    ///Number of reports\n    uint8_t                 nb_reports;\n    ///Direct Advertising reports structures array\n    struct dir_adv_report   adv_rep[BLE_ADV_REPORTS_MAX];\n};\n#endif //BLE_EMB_PRESENT || BLE_HOST_PRESENT\n\n/// HCI command complete event structure for HCI LE read remote used feature Command\nstruct hci_le_ltk_request_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///Random number\n    struct rand_nb      rand;\n    ///Encryption diversifier\n    uint16_t            ediv;\n};\n\n/// HCI LE META event LE Data Length Change Event\nstruct hci_le_data_len_chg_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///The maximum number of payload octets in TX\n    uint16_t            max_tx_octets;\n    ///The maximum time that the local Controller will take to TX\n    uint16_t            max_tx_time;\n    ///The maximum number of payload octets in RX\n    uint16_t            max_rx_octets;\n    ///The maximum time that the local Controller will take to RX\n    uint16_t            max_rx_time;\n};\n\n\n/// HCI Synchronization Train Received Event\nstruct hci_sync_train_rec_evt\n{\n    /// Status\n    uint8_t            status;\n    /// BD_ADDR\n    struct bd_addr     bd_addr;\n    /// Clock_Offset (28 bits) - (CLKNslave - CLK) modulo 2^28\n    uint32_t           clock_offset;\n    /// AFH_Channel_Map\n    struct chnl_map    afh_ch_map;\n    /// LT_ADDR\n    uint8_t            lt_addr;\n    /// Next_Broadcast_Instant (28 bits)\n    uint32_t next_bcst_instant;\n    /// Connectionless_Slave_Broadcast_Interval (in slots)\n    uint16_t csb_int;\n    /// Service_Data\n    uint8_t service_data;\n};\n\n/// HCI Connectionless Slave Broadcast Receive Event\nstruct hci_con_slv_bcst_rec_evt\n{\n    /// BD_ADDR\n    struct bd_addr     bd_addr;\n    /// LT_ADDR\n    uint8_t            lt_addr;\n    /// CLK (28 bits)\n    uint32_t           clk;\n    /// Offset (28 bits) - (CLKNslave - CLK) modulo 2^28\n    uint32_t           offset;\n    /// Receive Status\n    uint8_t            receive_status;\n    /// Fragment\n    uint8_t fragment;\n    /// Data_Length (in bytes)\n    uint8_t data_length;\n    /// Data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n/// HCI Connectionless Slave Broadcast Timeout Event\nstruct hci_con_slv_bcst_to_evt\n{\n    /// BD_ADDR\n    struct bd_addr     bd_addr;\n    /// LT_ADDR\n    uint8_t            lt_addr;\n};\n\n/// HCI Connectionless Slave Broadcast Channel Map Change Event\nstruct hci_con_slv_bcst_ch_map_chg_evt\n{\n    /// Channel_Map\n    struct chnl_map    ch_map;\n};\n\n\nstruct hci_le_generate_dhkey_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t      subcode;\n    uint8_t      status;\n    uint8_t      dh_key[32];\n};\n\nstruct hci_le_generate_p256_public_key_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t       subcode;\n    uint8_t       status;\n    t_public_key  public_key;\n};\n\n/*\n * HCI VENDOR SPECIFIC COMMANDS PARAMETERS\n ****************************************************************************************\n */\n\n/// Buffer structure\nstruct buffer_tag\n{\n    /// length of buffer\n    uint8_t length;\n    /// data of 128 bytes length\n    uint8_t data[128];\n};\n\n/// Common structure for Command Complete Event of HCI Debug Read Memory/Flash/Param complete event parameters - vendor specific\nstruct hci_dbg_basic_rd_data_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    ///buffer structure to return\n    struct buffer_tag buf;\n};\n\n///HCI Debug read memory variable command parameters - vendor specific\nstruct hci_dbg_rd_mem_cmd\n{\n    ///Start address to read\n    uint32_t start_addr;\n    ///Access size\n    uint8_t type;\n    ///Length to read\n    uint8_t length;\n};\n\n///HCI Debug write memory variable command parameters - vendor specific\nstruct hci_dbg_wr_mem_cmd\n{\n    ///Start address to read\n    uint32_t start_addr;\n    ///Access size\n    uint8_t type;\n    ///buffer structure to return\n    struct buffer_tag buf;\n};\n\n///HCI Debug delete parameter command parameters - vendor specific\nstruct hci_dbg_del_param_cmd\n{\n    ///Parameter tag\n    uint16_t param_tag;\n};\n\n///HCI Debug erase flash command parameters - vendor specific\nstruct hci_dbg_er_flash_cmd\n{\n    ///Flash type\n    uint8_t flashtype;\n    ///Start offset address\n    uint32_t startoffset;\n    ///Size to erase\n    uint32_t size;\n};\n\n///HCI Debug write flash command parameters - vendor specific\nstruct hci_dbg_wr_flash_cmd\n{\n    ///Flash type\n    uint8_t flashtype;\n    ///Start offset address\n    uint32_t startoffset;\n    ///buffer structure\n    struct buffer_tag buf;\n};\n\n///HCI Debug read flash command parameters - vendor specific\nstruct hci_dbg_rd_flash_cmd\n{\n    ///Flash type\n    uint8_t flashtype;\n    ///Start offset address\n    uint32_t startoffset;\n    ///Size to read\n    uint8_t size;\n};\n\n///HCI Debug read parameter command parameters - vendor specific\nstruct hci_dbg_rd_par_cmd\n{\n    ///Parameter tag\n    uint16_t param_tag;\n};\n\n///HCI Debug read parameters command parameters - vendor specific\nstruct hci_dbg_wr_par_cmd\n{\n    ///Parameter tag\n    uint16_t param_tag;\n    ///Structure buffer\n    struct buffer_tag buf;\n};\n\n#if CRYPTO_UT\nstruct hci_dbg_test_crypto_func_cmd\n{\n    /// Id of Function to be tested\n    uint8_t function;\n    /// Structure buffer\n    struct buffer_tag buf;\n};\n#endif //CRYPTO_UT\n\n///HCI Debug Read Kernel Statistics complete event parameters - vendor specific\nstruct hci_dbg_rd_ke_stats_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    ///Max message sent\n    uint8_t max_msg_sent;\n    ///Max message saved\n    uint8_t max_msg_saved;\n    ///Max timer used\n    uint8_t max_timer_used;\n    ///Max heap used\n    uint16_t max_heap_used;\n    ///Max stack used\n    uint16_t max_stack_used;\n};\n\n\n/// HCI Debug Read information about memory usage. - vendor specific\nstruct hci_dbg_rd_mem_info_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    /// memory size currently used into each heaps.\n    uint16_t mem_used[KE_MEM_BLOCK_MAX];\n    /// peak of memory usage measured\n    uint32_t max_mem_used;\n};\n\n///HCI Debug identify Flash command complete event parameters - vendor specific\nstruct hci_dbg_id_flash_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    ///Flash identity\n    uint8_t flash_id;\n};\n\n///HCI Debug RF Register read command\nstruct hci_dbg_rf_reg_rd_cmd\n{\n    /// register address\n    uint16_t addr;\n};\n\n///HCI Debug RF Register read command complete event\nstruct hci_dbg_rf_reg_rd_cmd_cmp_evt\n{\n    /// status\n    uint8_t status;\n    /// register address\n    uint16_t addr;\n    /// register value\n    uint32_t value;\n};\n\n///HCI Debug RF Register write command\nstruct hci_dbg_rf_reg_wr_cmd\n{\n    /// register address\n    uint16_t addr;\n    /// register value\n    uint32_t value;\n};\n\n///HCI Debug RF Register write command complete event\nstruct hci_dbg_rf_reg_wr_cmd_cmp_evt\n{\n    /// status\n    uint8_t status;\n    /// address\n    uint16_t addr;\n};\n\n///HCI Debug platform reset command parameters - vendor specific\nstruct hci_dbg_plf_reset_cmd\n{\n    /// reason\n    uint8_t reason;\n};\n\n#if (RW_DEBUG && BT_EMB_PRESENT)\n/// Discard LMP Packets\nstruct hci_dbg_bt_send_lmp_cmd\n{\n    /// Connection handle\n    uint16_t conhdl;\n    ///buffer structure to return\n    struct buffer_tag buf;\n};\n\n/// Discard LMP Packets\nstruct hci_dbg_bt_discard_lmp_en_cmd\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// Enable/Disable LMP discard (0: disable / 1: enable)\n    uint8_t enable;\n};\n#endif //(RW_DEBUG && BT_EMB_PRESENT)\n\n#if (RW_WLAN_COEX)\n///HCI Debug wlan coexistence command parameters - vendor specific\nstruct hci_dbg_wlan_coex_cmd\n{\n    /// State\n    uint8_t state;\n};\n#if (RW_WLAN_COEX_TEST)\n///HCI Debug wlan coexistence test scenario command parameters - vendor specific\nstruct hci_dbg_wlan_coextst_scen_cmd\n{\n    /// Scenario\n    uint32_t scenario;\n};\n#endif //RW_WLAN_COEX_TEST\n#endif //RW_WLAN_COEX\n\n#if (RW_MWS_COEX)\n///HCI Debug mws coexistence command parameters - vendor specific\nstruct hci_dbg_mws_coex_cmd\n{\n    /// State\n    uint8_t state;\n};\n#if (RW_MWS_COEX_TEST)\n///HCI Debug mws coexistence test scenario command parameters - vendor specific\nstruct hci_dbg_mws_coextst_scen_cmd\n{\n    /// Scenario\n    uint32_t scenario;\n};\n#endif //RW_MWS_COEX_TEST\n#endif //RW_MWS_COEX\n\n///HCI Debug HW Register Read command parameters - vendor specific\nstruct hci_dbg_hw_reg_rd_cmd\n{\n    /// register address\n    uint16_t reg_addr;\n};\n\n///HCI Debug HW Register write command parameters - vendor specific\nstruct hci_dbg_hw_reg_wr_cmd\n{\n    /// register address\n    uint16_t reg_addr;\n    /// extra parameter\n    uint16_t reserved;\n    /// register value\n    uint32_t reg_value;\n};\n\n///HCI Debug HW Register Read Complete event parameters - vendor specific\nstruct hci_dbg_hw_reg_rd_cmd_cmp_evt\n{\n    /// status\n    uint8_t  status;\n    /// register address\n    uint16_t reg_addr;\n    /// register value\n    uint32_t reg_value;\n};\n\n///HCI Debug HW Register Write Complete event parameters - vendor specific\nstruct hci_dbg_hw_reg_wr_cmd_cmp_evt\n{\n    /// status\n    uint8_t  status;\n    /// register address\n    uint16_t reg_addr;\n};\n\n///HCI Debug write DLE default value command parameters - vendor specific\nstruct hci_dbg_wr_dle_dft_value_cmd\n{\n    /// Max transmit packet size supported\n    uint16_t suppted_max_tx_octets;\n    /// Max transmit packet time supported\n    uint16_t suppted_max_tx_time;\n    /// Max receive packet size supported\n    uint16_t suppted_max_rx_octets;\n    /// Max receive packet time supported\n    uint16_t suppted_max_rx_time;\n\n};\n\n#if (BLE_EMB_PRESENT || BLE_HOST_PRESENT)\n///HCI Debug bd address write command parameters - vendor specific\nstruct hci_dbg_set_bd_addr_cmd\n{\n    ///bd address to set\n    struct bd_addr addr;\n};\n\n///HCI Debug crc write command parameters - vendor specific\nstruct hci_dbg_set_crc_cmd\n{\n    /// Handle pointing to the connection for which CRC has to be modified\n    uint16_t conhdl;\n    /// CRC to set\n    struct crc_init crc;\n};\n\n///HCI Debug LLC discard command parameters - vendor specific\nstruct hci_dbg_llcp_discard_cmd\n{\n    /// Handle pointing to the connection for which LLCP commands have to be discarded\n    uint16_t conhdl;\n    /// Flag indicating if the discarding has to be enabled or disabled\n    uint8_t enable;\n};\n\n///HCI Debug reset RX counter command parameters - vendor specific\nstruct hci_dbg_reset_rx_cnt_cmd\n{\n    /// Handle pointing to the connection for which the counter have to be reseted\n    uint16_t conhdl;\n};\n\n///HCI Debug reset TX counter command parameters - vendor specific\nstruct hci_dbg_reset_tx_cnt_cmd\n{\n    /// Handle pointing to the connection for which the counter have to be reseted\n    uint16_t conhdl;\n};\n\n///HCI Debug Set TX Power Level Command parameters\nstruct hci_dbg_set_tx_pw_cmd\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// Power level\n    uint8_t  pw_lvl;\n};\n\n///HCI Debug configure audio command parameters - vendor specific\n\nstruct hci_dbg_audio_configure_audio_cmd\n{\n    /// Voice channel to be updated\n    uint8_t     voice_channel;\n    /// Configure transmitter size in bytes\n    uint8_t     tx_size;\n    /// Configure receiver size in bytes\n    uint8_t     rx_size;\n    /// Configure transmitter rate\n    uint8_t     tx_rate;\n    /// Configure receiver rate\n    uint8_t     rx_rate;\n    /// Configure number of retransmission\n    uint8_t     nb_retx;\n    /// Audio link priority\n    uint8_t     priority;\n    /// Encryption mode\n    uint8_t     mode;\n    /// Channel and mute configuration (@see enum audio_cfg)\n    uint8_t     chan_mute_cfg;\n    /// Mute Pattern\n    uint8_t     mute_pattern;\n};\n\nstruct hci_dbg_audio_set_pointer_cmd\n{\n    /// Voice channel to be updated\n    uint8_t voice_channel;\n    /// Rx or Tx selection\n    uint8_t rx_tx_select;\n    /// Tog to be updated\n    uint8_t tog;\n    /// Exchange memory pointer\n    uint16_t    em_ptr;\n};\n///HCI Debug set audio mode command parameters - vendor specific\nstruct hci_audio_set_mode_cmd\n{\n    /// Voice channel to be updated\n    uint8_t voice_channel;\n    /// Mode\n    uint8_t   mode;\n};\n\n///HCI Debug set audio mode command parameters - vendor specific\nstruct hci_dbg_audio_reset_cmd\n{\n    /// Voice channel to be updated\n    uint8_t voice_channel;\n};\n\n///HCI Debug set audio mode command parameters - vendor specific\nstruct hci_dbg_audio_allocate_cmd\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// Audio mode\n    uint8_t mode;\n};\n\n///HCI Debug set audio mode command parameters - vendor specific\nstruct hci_dbg_audio_get_vx_ch_cmd\n{\n    /// Connection handle\n    uint16_t conhdl;\n};\n///HCI Tester set LE parameters\nstruct hci_tester_set_le_params_cmd\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// Tester features\n    uint8_t  tester_feats;\n    /// Preferred periodicity\n    uint8_t  pref_period;\n    /// Offset0\n    uint16_t  offset0;\n    /// Offset1\n    uint16_t  offset1;\n    /// Offset2\n    uint16_t  offset2;\n    /// Offset3\n    uint16_t  offset3;\n    /// Offset4\n    uint16_t  offset4;\n    /// Offset5\n    uint16_t  offset5;\n};\n\n/// HCI BLE Tester: enable LLCP pass through mechanism\nstruct hci_dbg_ble_tst_llcp_pt_en_cmd\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// Enable or not LLCP pass through mechanism\n    uint8_t  enable;\n};\n\n/// HCI BLE Tester: send an LLCP PDU\nstruct hci_dbg_ble_tst_send_llcp_cmd\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// length of LLCP PDU\n    uint8_t  length;\n    /// LLCP PDU data\n    uint8_t data[26];\n};\n\n\n/// HCI DBG Meta Event trigg when LLCP message received with LLCP pass through mechanism\nstruct hci_dbg_ble_tst_llcp_recv_evt\n{\n    ///DBG Subevent code\n    uint8_t             subcode;\n    ///Connection handle\n    uint16_t            conhdl;\n    /// length of LLCP message\n    uint8_t             length;\n    /// LLCP data\n    uint8_t             data[26];\n};\n\n#endif //BLE_EMB_PRESENT || BLE_HOST_PRESENT\n\n#if (RW_DEBUG)\n/// HCI DBG Meta Event indicating a SW assertion error\nstruct hci_dbg_assert_err_evt\n{\n    ///DBG Subevent code\n    uint8_t             subcode;\n    /// Line number\n    uint32_t line;\n    /// Param0\n    uint32_t param0;\n    /// Param1\n    uint32_t param1;\n    /// File name\n    uint8_t file[__ARRAY_EMPTY];\n};\n#endif //(RW_DEBUG)\n\n/// HCI LE Read PHY command\nstruct hci_le_rd_phy_cmd\n{\n    /// Connection Handle\n    uint16_t            conhdl;\n};\n\n/// HCI LE Set Default PHY Command\nstruct hci_le_set_dft_phy_cmd\n{\n    /// Preferred PHYS selection\n    uint8_t            all_phys;\n    /// Preferred PHYS for TX\n    uint8_t            tx_phys;\n    /// Preferred PHYS for RX\n    uint8_t            rx_phys;\n};\n\n/// HCI LE Set PHY Command\nstruct hci_le_set_phy_cmd\n{\n    /// Connection Handle\n    uint16_t           conhdl;\n    /// Preferred PHYS selection\n    uint8_t            all_phys;\n    /// Preferred PHYS for TX\n    uint8_t            tx_phys;\n    /// Preferred PHYS for RX\n    uint8_t            rx_phys;\n    /// PHY options\n    uint16_t           phy_opt;\n};\n\n/// HCI LE Set Extended Advertising Parameters Command Complete Event\nstruct hci_le_set_ext_adv_param_cmd_cmp_evt\n{\n    /// Status\n    uint8_t            status;\n    /// Selected Tx power\n    uint8_t            sel_tx_pwr;\n};\n\n/// HCI LE Enhanced Receiver Test Command\nstruct hci_le_enh_rx_test_cmd\n{\n    /// Reception channel value\n    uint8_t            channel;\n    /// Reception PHY rate\n    uint8_t            phys;\n    /// Modulation index\n    uint8_t            modulation_idx;\n};\n\n/// HCI LE Enhanced Transmitter Test Command\nstruct hci_le_enh_tx_test_cmd\n{\n    /// Transmit channel value\n    uint8_t            channel;\n    /// Length of the data to be transmitted in a packet\n    uint8_t            payload_length;\n    /// Type of the data contained in a packet\n    uint8_t            payload_type;\n    /// Transmit PHY rate\n    uint8_t            phys;\n};\n\n///HCI LE Set Advertising Set Random Address Command parameters structure\nstruct hci_le_set_adv_set_rand_addr_cmd\n{\n    /// Advertising handle\n    uint8_t adv_hdl;\n    /// Advertising random address\n    struct bd_addr rand_addr;\n};\n\n///HCI LE Set Extended Advertising Parameters Command parameters structure\nstruct hci_le_set_ext_adv_param_cmd\n{\n    /// Advertising handle\n    uint8_t adv_hdl;\n    /// Advertising event properties\n    uint16_t adv_evt_properties;\n    /// Primary advertising minimum interval\n    uint8_t prim_adv_intv_min[3];\n    /// Primary advertising maximum interval\n    uint8_t prim_adv_intv_max[3];\n    /// Primary advertising channel map\n    uint8_t prim_adv_chnl_map;\n    /// Own address type:  public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3\n    uint8_t own_addr_type;\n    /// Peer address type: public=0 / random=1\n    uint8_t peer_addr_type;\n    /// Peer Bluetooth device address\n    struct bd_addr peer_addr;\n    /// Advertising filter policy\n    uint8_t adv_filt_policy;\n    /// Advertising Tx power\n    int8_t adv_tx_pwr;\n    /// Primary advertising PHY\n    uint8_t prim_adv_phy;\n    /// Secondary advertising max skip\n    uint8_t sec_adv_max_skip;\n    /// Secondary advertising PHY\n    uint8_t sec_adv_phy;\n    /// Advertising SID\n    uint8_t adv_sid;\n    /// Scan request notification enable\n    uint8_t scan_req_notif_en;\n};\n\n///HCI LE Set Extended Advertising Data Command parameters structure\nstruct hci_le_set_ext_adv_data_cmd\n{\n    /// Advertising handle\n    uint8_t adv_hdl;\n    /**\n     *  Operation\n     *  0x00 Intermediate fragment of fragmented extended advertising data\n     *  0x01 First fragment of fragmented extended advertising data\n     *  0x02 Last fragment of fragmented extended advertising data\n     *  0x03 Complete extended advertising data\n     *  0x04 [ID7300_r06] Unchanged data (just update the Advertising DID)\n     *  All other values Reserved for future use\n     */\n    uint8_t operation;\n    /**\n     *  Fragment preference\n     *  0x00 The Controller may fragment all Host advertising data\n     *  0x01 The Controller should not fragment nor minimize fragmentation of Host advertising data\n     *  All other values Reserved for future use\n     */\n    uint8_t frag_pref;\n    /// Advertising Data Length (0-252 bytes)\n    uint8_t data_len;\n    /// Advertising data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n///HCI LE Set Extended Scan Response Data Command parameters structure\nstruct hci_le_set_ext_scan_rsp_data_cmd\n{\n    /// Advertising handle\n    uint8_t adv_hdl;\n    /**\n     *  Operation\n     *  0x00 Intermediate fragment of fragmented extended advertising data\n     *  0x01 First fragment of fragmented extended advertising data\n     *  0x02 Last fragment of fragmented extended advertising data\n     *  0x03 Complete extended advertising data\n     *  0x04 [ID7300_r06] Unchanged data (just update the Advertising DID)\n     *  All other values Reserved for future use\n     */\n    uint8_t operation;\n    /**\n     *  Fragment preference\n     *  0x00 The Controller may fragment all Host advertising data\n     *  0x01 The Controller should not fragment nor minimize fragmentation of Host advertising data\n     *  All other values Reserved for future use\n     */\n    uint8_t frag_pref;\n    /// Scan Response Data Length (0-252 bytes)\n    uint8_t data_len;\n    /// Advertising data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n///HCI LE Set Extended Advertising Enbale Command parameters structure\nstruct hci_le_set_ext_adv_en_cmd\n{\n    /// Enable\n    uint8_t enable;\n    /// Number of sets (1 - 0x3F)\n    uint8_t nb_sets;\n    /// Advertising handle\n    uint8_t adv_hdl[BLE_ACTIVITY_MAX];\n    /// Duration (N * 10 ms), 0x0000 No advertising duration. Advertising to continue until the Host disables it.\n    uint16_t duration[BLE_ACTIVITY_MAX];\n    /// Maximum number of extended advertising events\n    uint8_t max_ext_adv_evt[BLE_ACTIVITY_MAX];\n};\n\n///HCI LE Read Maximum Advertising Data Length Command complete event\nstruct hci_le_rd_max_adv_data_len_cmd_cmp_evt\n{\n    /// Status\n    uint8_t status;\n    /// Maximum advertising data length\n    uint16_t max_adv_data_len;\n};\n\n///HCI LE Remove Advertising Set Command parameters structure\nstruct hci_le_rem_adv_set_cmd\n{\n    /// Advertising handle\n    uint8_t adv_hdl;\n};\n\n///HCI LE Read Number of Supported Advertising Sets Command complete event\nstruct hci_le_rd_nb_supp_adv_sets_cmd_cmp_evt\n{\n    /// Status\n    uint8_t status;\n    /// Number of supported advertising sets\n    uint8_t nb_supp_adv_sets;\n};\n\n///HCI LE Set Periodic Advertising Parameters Command parameters structure\nstruct hci_le_set_per_adv_param_cmd\n{\n    /// Advertising handle\n    uint8_t adv_hdl;\n    /// Minimum advertising interval for periodic advertising\n    uint16_t adv_intv_min;\n    /// Maximum advertising interval for periodic advertising\n    uint16_t adv_intv_max;\n    /// Advertising properties\n    uint16_t adv_prop;\n};\n\n///HCI LE Set Periodic Advertising Data Command parameters structure\nstruct hci_le_set_per_adv_data_cmd\n{\n    /// Advertising handle\n    uint8_t adv_hdl;\n    /**\n     *  Operation\n     *  0x00 Intermediate fragment of fragmented periodic advertising data\n     *  0x01 First fragment of fragmented periodic advertising data\n     *  0x02 Last fragment of fragmented periodic advertising data\n     *  0x03 Complete periodic advertising data\n     *  All other values Reserved for future use\n     */\n    uint8_t operation;\n    /// Advertising Data Length (0-252 bytes)\n    uint8_t data_len;\n    /// Advertising data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n///HCI LE Set Periodic Advertising Enable Command parameters structure\nstruct hci_le_set_per_adv_en_cmd\n{\n    /// Enable\n    uint8_t enable;\n    /// Advertising handle\n    uint8_t adv_hdl;\n};\n\n///HCI LE Advertising Set Terminated event\nstruct hci_le_adv_set_term_evt\n{\n    /// LE Subevent code\n    uint8_t  subcode;\n    /// Status\n    uint8_t  status;\n    /// Advertising handle\n    uint8_t  adv_hdl;\n    /// Connection handle\n    uint16_t conhdl;\n    /// Num_Completed_Extended_Advertising_Events\n    uint8_t  nb_cmp_ext_adv_evt;\n};\n\n///HCI LE Scan Request Received event\nstruct hci_le_scan_req_rcvd_evt\n{\n    /// LE Subevent code\n    uint8_t  subcode;\n    /// Advertising handle\n    uint8_t  adv_hdl;\n    /// Scanner address type:  public=0 / random=1 / rpa_or_pub=2 / rpa_or_rnd=3\n    uint8_t scan_addr_type;\n    /// Scanner address\n    struct bd_addr scan_addr;\n};\n\n///HCI LE Read Periodic Advertiser List Size Command complete event\nstruct hci_le_rd_per_adv_list_size_cmd_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    /// Periodic Advertiser List Size\n    uint8_t size;\n};\n\n///HCI LE Channel Selection Algorithm event\nstruct hci_le_ch_sel_algo_evt\n{\n    /// LE Subevent code\n    uint8_t  subcode;\n    /// Connection handle\n    uint16_t  conhdl;\n    /// Channel selection algorithm\n    uint8_t ch_sel_algo;\n};\n\n/// HCI LE read PHY Command complete event\nstruct hci_le_rd_phy_cmd_cmp_evt\n{\n    ///Status of received command\n    uint8_t             status;\n    /// Connection Handle\n    uint16_t            conhdl;\n    /// Current configured PHY for TX\n    uint8_t             tx_phy;\n    /// Current configured PHY for RX\n    uint8_t             rx_phy;\n};\n\n/// HCI command complete event structure for HCI LE PHY Update Command\nstruct hci_le_phy_update_cmp_evt\n{\n    ///LE Subevent code\n    uint8_t             subcode;\n    ///Status of received command\n    uint8_t             status;\n    ///Connection handle\n    uint16_t            conhdl;\n    ///TX phy chosen\n    uint8_t             tx_phy;\n    ///RX phy chosen\n    uint8_t             rx_phy;\n};\n\n/// @} CO_BT\n#endif // CO_HCI_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_list.h",
    "content": "#ifndef _CO_LIST_H_\n#define _CO_LIST_H_\n\n/**\n *****************************************************************************************\n * @defgroup CO_LIST List management\n * @ingroup COMMON\n *\n * @brief  List management.\n *\n * This module contains the list structures and handling functions.\n * @{\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include          // standard definition\n#include         // boolean definition\n#include          // for NULL and size_t\n#include \"rwip_config.h\"    // stack configuration\n#include \"compiler.h\"       // for __INLINE\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n///list type\nenum\n{\n    POOL_LINKED_LIST    = 0x00,\n    RING_LINKED_LIST,\n    LINK_TYPE_END\n};\n\n/// structure of a list element header\nstruct co_list_hdr\n{\n    /// Pointer to next co_list_hdr\n    struct co_list_hdr *next;\n};\n\n/// structure of a list\nstruct co_list\n{\n    /// pointer to first element of the list\n    struct co_list_hdr *first;\n    /// pointer to the last element\n    struct co_list_hdr *last;\n\n    #if (KE_PROFILING)\n    /// number of element in the list\n    uint32_t cnt;\n    /// max number of element in the list\n    uint32_t maxcnt;\n    /// min number of element in the list\n    uint32_t mincnt;\n    #endif //KE_PROFILING\n};\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Initialize a list to defaults values.\n *\n * @param list           Pointer to the list structure.\n ****************************************************************************************\n */\nvoid co_list_init(struct co_list *list);\n\n/**\n ****************************************************************************************\n * @brief Initialize a pool to default values, and initialize the relative free list.\n *\n * @param list           Pointer to the list structure\n * @param pool           Pointer to the pool to be initialized\n * @param elmt_size      Size of one element of the pool\n * @param elmt_cnt       Nb of elements available in the pool\n * @param default_value  Pointer to the default value of each element (may be NULL)\n * @param list_type      Determine if the it is a ring list or not\n *\n ****************************************************************************************\n */\nvoid co_list_pool_init(struct co_list *list,\n                       void *pool,\n                       size_t elmt_size,\n                       uint32_t elmt_cnt,\n                       void *default_value,\n                       uint8_t list_type);\n\n/**\n ****************************************************************************************\n * @brief Add an element as last on the list.\n *\n * @param list           Pointer to the list structure\n * @param list_hdr       Pointer to the header to add at the end of the list\n *\n ****************************************************************************************\n */\nvoid co_list_push_back(struct co_list *list, struct co_list_hdr *list_hdr);\n\n/**\n ****************************************************************************************\n * @brief Append a sequence of elements at the end of a list.\n *\n * Note: the elements to append shall be linked together\n *\n * @param list           Pointer to the list structure\n * @param first_hdr      Pointer to the first element to append\n * @param last_hdr       Pointer to the last element to append\n ****************************************************************************************\n */\nvoid co_list_push_back_sublist(struct co_list *list, struct co_list_hdr *first_hdr, struct co_list_hdr *last_hdr);\n\n/**\n ****************************************************************************************\n * @brief Add an element as first on the list.\n *\n * @param list           Pointer to the list structure\n * @param list_hdr       Pointer to the header to add at the beginning of the list\n ****************************************************************************************\n */\nvoid co_list_push_front(struct co_list *list, struct co_list_hdr *list_hdr);\n\n/**\n ****************************************************************************************\n * @brief Extract the first element of the list.\n * @param list           Pointer to the list structure\n * @return The pointer to the element extracted, and NULL if the list is empty.\n ****************************************************************************************\n */\nstruct co_list_hdr *co_list_pop_front(struct co_list *list);\n\n/**\n ****************************************************************************************\n * @brief Search for a given element in the list, and extract it if found.\n *\n * @param list           Pointer to the list structure\n * @param list_hdr       Element to extract\n *\n * @return true if the element is found in the list, false otherwise\n ****************************************************************************************\n */\nbool co_list_extract(struct co_list *list, struct co_list_hdr *list_hdr);\n\n/**\n ****************************************************************************************\n * @brief Extract an element when the previous element is known\n *\n * Note: the element to remove shall follow immediately the reference within the list\n *\n * @param list           Pointer to the list structure\n * @param elt_ref_hdr    Pointer to the referenced element (NULL if element to extract is the first in the list)\n * @param elt_to_rem_hdr Pointer to the element to be extracted\n ****************************************************************************************\n */\nvoid co_list_extract_after(struct co_list *list, struct co_list_hdr *elt_ref_hdr, struct co_list_hdr *elt_to_rem_hdr);\n\n/**\n ****************************************************************************************\n * @brief Extract a sub-list when the previous element is known\n *\n * Note: the elements to remove shall be linked together and  follow immediately the reference element\n *\n * @param[in]  list           Pointer to the list structure\n * @param[in]  ref_hdr        Pointer to the referenced element (NULL if first element to extract is first in the list)\n * @param[in]  last_hdr       Pointer to the last element to extract ()\n ****************************************************************************************\n */\nvoid co_list_extract_sublist(struct co_list *list, struct co_list_hdr *ref_hdr, struct co_list_hdr *last_hdr);\n\n/**\n ****************************************************************************************\n * @brief Searched a given element in the list.\n *\n * @param list           Pointer to the list structure\n * @param list_hdr       Pointer to the searched element\n *\n * @return true if the element is found in the list, false otherwise\n ****************************************************************************************\n */\nbool co_list_find(struct co_list *list, struct co_list_hdr *list_hdr);\n\n/**\n ****************************************************************************************\n * @brief Merge two lists in a single one.\n *\n * This function appends the list pointed by list2 to the list pointed by list1. Once the\n * merge is done, it empties list2.\n *\n * @param list1    Pointer to the destination list\n * @param list2    Pointer to the list to append to list1\n ****************************************************************************************\n */\nvoid co_list_merge(struct co_list *list1, struct co_list *list2);\n\n/**\n ****************************************************************************************\n * @brief Insert a given element in the list before the referenced element.\n *\n * @param list           Pointer to the list structure\n * @param elt_ref_hdr    Pointer to the referenced element\n * @param elt_to_add_hdr Pointer to the element to be inserted\n *\n * @return true if the element is found in the list, false otherwise\n ****************************************************************************************\n */\nvoid co_list_insert_before(struct co_list *list,\n                        struct co_list_hdr *elt_ref_hdr, struct co_list_hdr *elt_to_add_hdr);\n\n/**\n ****************************************************************************************\n * @brief Insert a given element in the list after the referenced element.\n *\n * @param list           Pointer to the list structure\n * @param elt_ref_hdr    Pointer to the referenced element\n * @param elt_to_add_hdr Pointer to the element to be inserted\n *\n * @return true if the element is found in the list, false otherwise\n ****************************************************************************************\n */\nvoid co_list_insert_after(struct co_list *list,\n                        struct co_list_hdr *elt_ref_hdr, struct co_list_hdr *elt_to_add_hdr);\n\n\n/**\n ****************************************************************************************\n * @brief Count number of elements present in the list\n *\n * @param list           Pointer to the list structure\n *\n * @return Number of elements present in the list\n ****************************************************************************************\n */\nuint16_t co_list_size(struct co_list *list);\n\n/**\n ****************************************************************************************\n * @brief Test if the list is empty.\n * @param list           Pointer to the list structure.\n * @return true if the list is empty, false else otherwise.\n ****************************************************************************************\n */\n__STATIC __INLINE bool co_list_is_empty(const struct co_list *const list)\n{\n    bool listempty;\n    listempty = (list->first == NULL);\n    return (listempty);\n}\n\n/**\n ****************************************************************************************\n * @brief Pick the first element from the list without removing it.\n *\n * @param list           Pointer to the list structure.\n *\n * @return First element address. Returns NULL pointer if the list is empty.\n ****************************************************************************************\n */\n__STATIC __INLINE struct co_list_hdr *co_list_pick(const struct co_list *const list)\n{\n    return(list->first);\n}\n\n\n/**\n ****************************************************************************************\n * @brief Return following element of a list element.\n *\n * @param list_hdr     Pointer to the list element.\n *\n * @return The pointer to the next element.\n ****************************************************************************************\n */\n__STATIC __INLINE struct co_list_hdr *co_list_next(const struct co_list_hdr *const list_hdr)\n{\n    return(list_hdr->next);\n}\n\n/// @} CO_LIST\n#endif // _CO_LIST_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_llcp.h",
    "content": "#ifndef CO_LLCP_H_\n#define CO_LLCP_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CO_BT\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"co_bt.h\"\n/*\n * DEFINES\n ****************************************************************************************\n */\n#define LLCP_OPCODE_MASK      (0xFF)\n#define LLCP_OPCODE_POS       (0)\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n/// Control packet op_code\nenum co_llcp_op_code\n{\n    /// Connection update request\n    LLCP_CONNECTION_UPDATE_IND_OPCODE,\n    /// Channel map request\n    LLCP_CHANNEL_MAP_IND_OPCODE,\n    /// Termination indication\n    LLCP_TERMINATE_IND_OPCODE,\n    /// Encryption request\n    LLCP_ENC_REQ_OPCODE,\n    /// Encryption response\n    LLCP_ENC_RSP_OPCODE,\n    /// Start encryption request\n    LLCP_START_ENC_REQ_OPCODE,\n    /// Start encryption response\n    LLCP_START_ENC_RSP_OPCODE,\n    /// Unknown response\n    LLCP_UNKNOWN_RSP_OPCODE,\n    /// Feature request\n    LLCP_FEATURE_REQ_OPCODE,\n    /// Feature response\n    LLCP_FEATURE_RSP_OPCODE,\n    /// Pause encryption request\n    LLCP_PAUSE_ENC_REQ_OPCODE,\n    /// Pause encryption response\n    LLCP_PAUSE_ENC_RSP_OPCODE,\n    /// Version indication\n    LLCP_VERSION_IND_OPCODE,\n    /// Reject indication\n    LLCP_REJECT_IND_OPCODE,\n    /// Slave feature request\n    LLCP_SLAVE_FEATURE_REQ_OPCODE,\n    /// Connection parameters request\n    LLCP_CONNECTION_PARAM_REQ_OPCODE,\n    /// Connection parameters response\n    LLCP_CONNECTION_PARAM_RSP_OPCODE,\n    /// Reject indication extended\n    LLCP_REJECT_IND_EXT_OPCODE,\n    /// Ping request\n    LLCP_PING_REQ_OPCODE,\n    /// Ping response\n    LLCP_PING_RSP_OPCODE,\n    /// Ping request\n    LLCP_LENGTH_REQ_OPCODE,\n    /// Ping response\n    LLCP_LENGTH_RSP_OPCODE,\n    /// Phy request\n    LLCP_PHY_REQ_OPCODE,\n    /// Phy response\n    LLCP_PHY_RSP_OPCODE,\n    /// Phy update indication\n    LLCP_PHY_UPD_IND_OPCODE,\n    /// Min used channels indication\n    LLCP_MIN_USED_CHANNELS_IND_OPCODE,\n    /// Opcode length\n    LLCP_OPCODE_MAX_OPCODE,\n\n    #if (BLE_TESTER)\n    LLCP_OPCODE_DEBUG = 0xFF,\n    #endif // (BLE_TESTER)\n};\n\n/// LLCP PDU lengths (including op_code)\nenum co_llcp_length\n{\n   LLCP_CON_UPDATE_IND_LEN    = 12,\n   LLCP_CHANNEL_MAP_IND_LEN   = 8,\n   LLCP_TERM_IND_LEN          = 2,\n   LLCP_ENC_REQ_LEN           = 23,\n   LLCP_ENC_RSP_LEN           = 13,\n   LLCP_ST_ENC_REQ_LEN        = 1,\n   LLCP_ST_ENC_RSP_LEN        = 1,\n   LLCP_UNKN_RSP_LEN          = 2,\n   LLCP_FEAT_REQ_LEN          = 9,\n   LLCP_FEAT_RSP_LEN          = 9,\n   LLCP_PA_ENC_REQ_LEN        = 1,\n   LLCP_PA_ENC_RSP_LEN        = 1,\n   LLCP_VERS_IND_LEN          = 6,\n   LLCP_REJ_IND_LEN           = 2,\n   LLCP_SLAVE_FEATURE_REQ_LEN = 9,\n   LLCP_REJECT_IND_EXT_LEN    = 3,\n   LLCP_CON_PARAM_REQ_LEN     = 24,\n   LLCP_CON_PARAM_RSP_LEN     = 24,\n   LLCP_PING_REQ_LEN          = 1,\n   LLCP_PING_RSP_LEN          = 1,\n   LLCP_LENGTH_REQ_LEN        = 9,\n   LLCP_LENGTH_RSP_LEN        = 9,\n   LLCP_PHY_REQ_LEN           = 3,\n   LLCP_PHY_RSP_LEN           = 3,\n   LLCP_PHY_UPD_IND_LEN       = 5,\n   LLCP_MIN_USED_CH_IND_LEN   = 3,\n   LLCP_PDU_LENGTH_MAX        = 34\n};\n\n/// PDU lengths\nenum co_pdu_length\n{\n   PDU_SCAN_REQ_LEN          = 12,\n   PDU_CON_REQ_LEN           = 34,\n   PDU_CON_RSP_LEN           = 14,\n};\n\n/*\n * MESSAGES\n ****************************************************************************************\n */\n\n/// LLCP_CONNECTION_UPDATE_IND structure.\nstruct  llcp_con_update_ind\n{\n    /// op_code\n    uint8_t         op_code;\n    /// window size (units of 1.25 ms)\n    uint8_t         win_size;\n    /// window offset (units of 1.25 ms)\n    uint16_t        win_off;\n    /// interval (units of 1.25 ms)\n    uint16_t        interv;\n    /// connection latency (unit of connection event)\n    uint16_t        latency;\n    /// link supervision timeout (unit of 10 ms)\n    uint16_t        timeout;\n    /// instant (unit of connection event)\n    uint16_t        instant;\n};\n\n/// LLCP_CHANNEL_MAP_IND structure.\nstruct  llcp_channel_map_ind\n{\n    /// op_code\n    uint8_t            op_code;\n    /// channel mapping\n    struct le_chnl_map ch_map;\n    /// instant\n    uint16_t           instant;\n};\n\n/// LLCP_TERMINATE_IND structure.\nstruct  llcp_terminate_ind\n{\n    /// op_code\n    uint8_t         op_code;\n    /// termination code\n    uint8_t         err_code;\n};\n\n/// LLCP_ENC_REQ structure.\nstruct  llcp_enc_req\n{\n    /// op_code\n    uint8_t               op_code;\n    /// random value\n    struct rand_nb        rand;\n    /// ediv\n    uint16_t              ediv;\n    /// skdm\n    struct sess_k_div_x   skdm;\n    /// ivm\n    struct init_vect      ivm;\n};\n\n/// LLCP_ENC_RSP structure.\nstruct  llcp_enc_rsp\n{\n    /// op_code\n    uint8_t             op_code;\n    /// skds\n    struct sess_k_div_x   skds;\n    /// ivs\n    struct init_vect    ivs;\n};\n\n/// LLCP_START_ENC_REQ structure.\nstruct  llcp_start_enc_req\n{\n    /// op_code\n    uint8_t             op_code;\n};\n\n/// LLCP_START_ENC_RSP structure.\nstruct  llcp_start_enc_rsp\n{\n    /// op_code\n    uint8_t             op_code;\n};\n\n/// LLCP_UNKNOWN_RSP structure.\nstruct  llcp_unknown_rsp\n{\n    /// op_code\n    uint8_t         op_code;\n    /// unknown type\n    uint8_t         unk_type;\n};\n\n/// LLCP_FEATURE_REQ structure.\nstruct  llcp_feats_req\n{\n    /// op_code\n    uint8_t             op_code;\n    /// le features\n    struct le_features  feats;\n};\n\n\n/// LLCP_FEATURE_RSP structure.\nstruct  llcp_feats_rsp\n{\n    /// op_code\n    uint8_t             op_code;\n    /// le features\n    struct le_features  feats;\n};\n\n/// LLCP_PAUSE_ENC_REQ structure.\nstruct  llcp_pause_enc_req\n{\n    /// op_code\n    uint8_t             op_code;\n};\n\n/// LLCP_PAUSE_ENC_RSP structure.\nstruct  llcp_pause_enc_rsp\n{\n    /// op_code\n    uint8_t             op_code;\n};\n\n/// LLCP_VERS_IND structure\nstruct llcp_vers_ind\n{\n    /// op_code\n    uint8_t     op_code;\n    /// version\n    uint8_t     vers;\n    /// company id\n    uint16_t    compid;\n    /// sub version\n    uint16_t    subvers;\n};\n\n/// LLCP_REJECT_IND structure.\nstruct  llcp_reject_ind\n{\n    /// op_code\n    uint8_t         op_code;\n    /// reject reason\n    uint8_t         err_code;\n};\n\n/// LLCP_SLAVE_FEATURE_REQ structure.\nstruct  llcp_slave_feature_req\n{\n    /// op_code\n    uint8_t             op_code;\n    /// le features\n    struct le_features  feats;\n};\n\n/// LLCP_CONNECTION_PARAM_REQ structure.\nstruct  llcp_con_param_req\n{\n    /// op_code\n    uint8_t         op_code;\n    /// minimum value of connInterval (units of 1.25 ms)\n    uint16_t        interval_min;\n    /// maximum value of connInterval (units of 1.25 ms)\n    uint16_t        interval_max;\n    /// connSlaveLatency value (unit of connection event)\n    uint16_t        latency;\n    /// connSupervisionTimeout value (unit of 10 ms)\n    uint16_t        timeout;\n    /// preferred periodicity (units of 1.25 ms)\n    uint8_t         pref_period;\n    /// ReferenceConnEventCount (unit of connection event)\n    uint16_t        ref_con_event_count;\n    /// Offset0 (units of 1.25 ms)\n    uint16_t        offset0;\n    /// Offset1 (units of 1.25 ms)\n    uint16_t        offset1;\n    /// Offset2 (units of 1.25 ms)\n    uint16_t        offset2;\n    /// Offset3 (units of 1.25 ms)\n    uint16_t        offset3;\n    /// Offset4 (units of 1.25 ms)\n    uint16_t        offset4;\n    /// Offset5 (units of 1.25 ms)\n    uint16_t        offset5;\n};\n\n/// LLCP_CONNECTION_PARAM_RSP structure.\nstruct  llcp_con_param_rsp\n{\n    /// op_code\n    uint8_t          op_code;\n    /// minimum value of connInterval (units of 1.25 ms)\n    uint16_t        interval_min;\n    /// maximum value of connInterval (units of 1.25 ms)\n    uint16_t        interval_max;\n    /// connSlaveLatency value (unit of connection event)\n    uint16_t        latency;\n    /// connSupervisionTimeout value (unit of 10 ms)\n    uint16_t        timeout;\n    /// preferred periodicity (units of 1.25 ms)\n    uint8_t         pref_period;\n    /// ReferenceConnEventCount (unit of connection event)\n    uint16_t        ref_con_event_count;\n    /// Offset0 (units of 1.25 ms)\n    uint16_t        offset0;\n    /// Offset1 (units of 1.25 ms)\n    uint16_t        offset1;\n    /// Offset2 (units of 1.25 ms)\n    uint16_t        offset2;\n    /// Offset3 (units of 1.25 ms)\n    uint16_t        offset3;\n    /// Offset4 (units of 1.25 ms)\n    uint16_t        offset4;\n    /// Offset5 (units of 1.25 ms)\n    uint16_t        offset5;\n};\n\n/// LLCP_REJECT_IND structure.\nstruct  llcp_reject_ind_ext\n{\n    /// op_code\n    uint8_t         op_code;\n    /// rejected op_code\n    uint8_t         rej_op_code;\n    /// reject reason\n    uint8_t         err_code;\n};\n\n/// LLCP_PING_REQ structure.\nstruct  llcp_ping_req\n{\n    /// op_code\n    uint8_t         op_code;\n};\n\n/// LLCP_PING_RSP structure.\nstruct  llcp_ping_rsp\n{\n    /// op_code\n    uint8_t         op_code;\n};\n\n/// LLCP_LENGTH_REQ structure.\nstruct  llcp_length_req\n{\n    /// op_code\n    uint8_t     op_code;\n    /// The max size in reception (unit of byte)\n    uint16_t    max_rx_octets;\n    /// The max time in reception (unit of microsecond)\n    uint16_t    max_rx_time;\n    /// The max size in transmission (unit of byte)\n    uint16_t    max_tx_octets;\n    /// The max time in transmission (unit of microsecond)\n    uint16_t    max_tx_time;\n};\n\n/// LLCP_LENGTH_RSP structure.\nstruct  llcp_length_rsp\n{\n    /// op_code\n    uint8_t     op_code;\n    /// The max size in reception (unit of byte)\n    uint16_t    max_rx_octets;\n    /// The max time in reception (unit of microsecond)\n    uint16_t    max_rx_time;\n    /// The max size in transmission (unit of byte)\n    uint16_t    max_tx_octets;\n    /// The max time in transmission (unit of microsecond)\n    uint16_t    max_tx_time;\n};\n/// LLCP_PHY_REQ structure.\nstruct  llcp_phy_req\n{\n    /// op_code\n    uint8_t    op_code;\n    /// Tx phy selection\n    uint8_t    tx_phys;\n    /// Rx phy selection\n    uint8_t    rx_phys;\n};\n\n/// LLCP_PHY_RSP structure.\nstruct  llcp_phy_rsp\n{\n    /// op_code\n    uint8_t    op_code;\n    /// Tx phy selection\n    uint8_t    tx_phys;\n    /// Rx phy selection\n    uint8_t    rx_phys;\n};\n\n/// LLCP_PHY_UPD_IND structure.\nstruct  llcp_phy_upd_ind\n{\n    /// op_code\n    uint8_t    op_code;\n    /// master to slave phy selected\n    uint8_t    m_to_s_phy;\n    /// slave to master phy selected\n    uint8_t    s_to_m_phy;\n    /// Instant\n    uint16_t   instant;\n};\n\n/// LLCP_MIN_USED_CHANNELS_IND structure.\nstruct  llcp_min_used_ch_ind\n{\n    /// op_code\n    uint8_t    op_code;\n    /// PHY(s) for which the slave has a minimum number of used channels requirement\n    uint8_t    phys;\n    /// minimum number of channels to be used on the specified PHY\n    uint8_t    min_used_ch;\n};\n\n/// LLCP pdu format\nunion llcp_pdu\n{\n    /// op_code\n    uint8_t  op_code;\n\n    struct llcp_con_update_ind    con_update_ind;\n    struct llcp_channel_map_ind   channel_map_ind;\n    struct llcp_terminate_ind     terminate_ind;\n    struct llcp_enc_req           enc_req;\n    struct llcp_enc_rsp           enc_rsp;\n    struct llcp_start_enc_req     start_enc_req;\n    struct llcp_start_enc_rsp     start_enc_rsp;\n    struct llcp_unknown_rsp       unknown_rsp;\n    struct llcp_feats_req         feats_req;\n    struct llcp_feats_rsp         feats_rsp;\n    struct llcp_pause_enc_req     pause_enc_req;\n    struct llcp_pause_enc_rsp     pause_enc_rsp;\n    struct llcp_vers_ind          vers_ind;\n    struct llcp_reject_ind        reject_ind;\n    struct llcp_slave_feature_req slave_feature_req;\n    struct llcp_con_param_req     con_param_req;\n    struct llcp_con_param_rsp     con_param_rsp;\n    struct llcp_reject_ind_ext    reject_ind_ext;\n    struct llcp_ping_req          ping_req;\n    struct llcp_ping_rsp          ping_rsp;\n    struct llcp_length_req        length_req;\n    struct llcp_length_rsp        length_rsp;\n    struct llcp_phy_req           phy_req;\n    struct llcp_phy_rsp           phy_rsp;\n    struct llcp_phy_upd_ind       phy_upd_ind;\n};\n\n/// @} CO_BT\n#endif // CO_LLCP_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_lmp.h",
    "content": "#ifndef CO_LMP_H_\n#define CO_LMP_H_\n\n/**\n ****************************************************************************************\n * @addtogroup CO_BT\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"co_bt.h\"\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n//LMP Opcodes\n#define LMP_NAME_REQ_OPCODE                1\n#define LMP_NAME_RES_OPCODE                2\n#define LMP_ACCEPTED_OPCODE                3\n#define LMP_NOT_ACCEPTED_OPCODE            4\n#define LMP_CLK_OFF_REQ_OPCODE             5\n#define LMP_CLK_OFF_RES_OPCODE             6\n#define LMP_DETACH_OPCODE                  7\n#define LMP_INRAND_OPCODE                  8\n#define LMP_COMBKEY_OPCODE                 9\n#define LMP_UNITKEY_OPCODE                10\n#define LMP_AURAND_OPCODE                 11\n#define LMP_SRES_OPCODE                   12\n#define LMP_TEMPRAND_OPCODE               13\n#define LMP_TEMPKEY_OPCODE                14\n#define LMP_ENC_MODE_REQ_OPCODE           15\n#define LMP_ENC_KEY_SIZE_REQ_OPCODE       16\n#define LMP_START_ENC_REQ_OPCODE          17\n#define LMP_STOP_ENC_REQ_OPCODE           18\n#define LMP_SWITCH_REQ_OPCODE             19\n#define LMP_HOLD_OPCODE                   20\n#define LMP_HOLD_REQ_OPCODE               21\n#define LMP_SNIFF_REQ_OPCODE              23\n#define LMP_UNSNIFF_REQ_OPCODE            24\n#define LMP_PARK_REQ_OPCODE               25\n#define LMP_SET_BSWIN_OPCODE              27\n#define LMP_MODIF_BEACON_OPCODE           28\n#define LMP_UNPARK_BD_REQ_OPCODE          29\n#define LMP_UNPARK_PM_REQ_OPCODE          30\n#define LMP_INCR_PWR_REQ_OPCODE           31\n#define LMP_DECR_PWR_REQ_OPCODE           32\n#define LMP_MAX_PWR_OPCODE                33\n#define LMP_MIN_PWR_OPCODE                34\n#define LMP_AUTO_RATE_OPCODE              35\n#define LMP_PREF_RATE_OPCODE              36\n#define LMP_VER_REQ_OPCODE                37\n#define LMP_VER_RES_OPCODE                38\n#define LMP_FEATS_REQ_OPCODE              39\n#define LMP_FEATS_RES_OPCODE              40\n#define LMP_QOS_OPCODE                    41\n#define LMP_QOS_REQ_OPCODE                42\n#define LMP_SCO_LINK_REQ_OPCODE           43\n#define LMP_RMV_SCO_LINK_REQ_OPCODE       44\n#define LMP_MAX_SLOT_OPCODE               45\n#define LMP_MAX_SLOT_REQ_OPCODE           46\n#define LMP_TIMING_ACCU_REQ_OPCODE        47\n#define LMP_TIMING_ACCU_RES_OPCODE        48\n#define LMP_SETUP_CMP_OPCODE              49\n#define LMP_USE_SEMI_PERM_KEY_OPCODE      50\n#define LMP_HOST_CON_REQ_OPCODE           51\n#define LMP_SLOT_OFF_OPCODE               52\n#define LMP_PAGE_MODE_REQ_OPCODE          53\n#define LMP_PAGE_SCAN_MODE_REQ_OPCODE     54\n#define LMP_SUPV_TO_OPCODE                55\n#define LMP_TEST_ACTIVATE_OPCODE          56\n#define LMP_TEST_CTRL_OPCODE              57\n#define LMP_ENC_KEY_SIZE_MASK_REQ_OPCODE  58\n#define LMP_ENC_KEY_SIZE_MASK_RES_OPCODE  59\n#define LMP_SET_AFH_OPCODE                60\n#define LMP_ENCAPS_HDR_OPCODE             61\n#define LMP_ENCAPS_PAYL_OPCODE            62\n#define LMP_SP_CFM_OPCODE                 63\n#define LMP_SP_NB_OPCODE                  64\n#define LMP_DHKEY_CHK_OPCODE              65\n#define LMP_PAUSE_ENC_AES_REQ_OPCODE      66\n\n#define LMP_ESC1_OPCODE                   124\n#define LMP_ESC2_OPCODE                   125\n#define LMP_ESC3_OPCODE                   126\n#define LMP_ESC4_OPCODE                   127\n\n///LMP Escape 4 Extended Opcodes\n#define LMP_ACCEPTED_EXT_EXTOPCODE         1\n#define LMP_NOT_ACCEPTED_EXT_EXTOPCODE     2\n#define LMP_FEATS_REQ_EXT_EXTOPCODE        3\n#define LMP_FEATS_RES_EXT_EXTOPCODE        4\n#define LMP_CLK_ADJ_EXTOPCODE              5\n#define LMP_CLK_ADJ_ACK_EXTOPCODE          6\n#define LMP_CLK_ADJ_REQ_EXTOPCODE          7\n#define LMP_PKT_TYPE_TBL_REQ_EXTOPCODE    11\n#define LMP_ESCO_LINK_REQ_EXTOPCODE       12\n#define LMP_RMV_ESCO_LINK_REQ_EXTOPCODE   13\n#define LMP_CH_CLASS_REQ_EXTOPCODE        16\n#define LMP_CH_CLASS_EXTOPCODE            17\n#define LMP_SSR_REQ_EXTOPCODE             21\n#define LMP_SSR_RES_EXTOPCODE             22\n#define LMP_PAUSE_ENC_REQ_EXTOPCODE       23\n#define LMP_RESUME_ENC_REQ_EXTOPCODE      24\n#define LMP_IO_CAP_REQ_EXTOPCODE          25\n#define LMP_IO_CAP_RES_EXTOPCODE          26\n#define LMP_NUM_COMPARISON_FAIL_EXTOPCODE 27\n#define LMP_PASSKEY_FAIL_EXTOPCODE        28\n#define LMP_OOB_FAIL_EXTOPCODE            29\n#define LMP_KEYPRESS_NOTIF_EXTOPCODE      30\n#define LMP_PWR_CTRL_REQ_EXTOPCODE        31\n#define LMP_PWR_CTRL_RES_EXTOPCODE        32\n#define LMP_PING_REQ_EXTOPCODE            33\n#define LMP_PING_RES_EXTOPCODE            34\n\n/// PDU lengths (including opcode)\n#define LMP_NAME_REQ_LEN                    2\n#define LMP_NAME_RES_LEN                    17\n#define LMP_ACCEPTED_LEN                    2\n#define LMP_NOT_ACCEPTED_LEN                3\n#define LMP_CLK_OFF_REQ_LEN                 1\n#define LMP_CLK_OFF_RES_LEN                 3\n#define LMP_DETACH_LEN                      2\n#define LMP_INRAND_LEN                      17\n#define LMP_COMBKEY_LEN                     17\n#define LMP_UNITKEY_LEN                     17\n#define LMP_AURAND_LEN                      17\n#define LMP_SRES_LEN                        5\n#define LMP_TEMPRAND_LEN                    17\n#define LMP_TEMPKEY_LEN                     17\n#define LMP_ENC_MODE_REQ_LEN                2\n#define LMP_ENC_KEY_SIZE_REQ_LEN            2\n#define LMP_START_ENC_REQ_LEN               17\n#define LMP_STOP_ENC_REQ_LEN                1\n#define LMP_SWITCH_REQ_LEN                  5\n#define LMP_HOLD_LEN                        7\n#define LMP_HOLD_REQ_LEN                    7\n#define LMP_SNIFF_REQ_LEN                   10\n#define LMP_UNSNIFF_REQ_LEN                 1\n#define LMP_PARK_REQ_LEN                    17\n#define LMP_INCR_PWR_REQ_LEN                2\n#define LMP_DECR_PWR_REQ_LEN                2\n#define LMP_MAX_PWR_LEN                     1\n#define LMP_MIN_PWR_LEN                     1\n#define LMP_AUTO_RATE_LEN                   1\n#define LMP_PREF_RATE_LEN                   2\n#define LMP_VER_REQ_LEN                     6\n#define LMP_VER_RES_LEN                     6\n#define LMP_FEATS_REQ_LEN                   9\n#define LMP_FEATS_RES_LEN                   9\n#define LMP_QOS_LEN                         4\n#define LMP_QOS_REQ_LEN                     4\n#define LMP_SCO_LINK_REQ_LEN                7\n#define LMP_RMV_SCO_LINK_REQ_LEN            3\n#define LMP_MAX_SLOT_LEN                    2\n#define LMP_MAX_SLOT_REQ_LEN                2\n#define LMP_TIMING_ACCU_REQ_LEN             1\n#define LMP_TIMING_ACCU_RES_LEN             3\n#define LMP_SETUP_CMP_LEN                   1\n#define LMP_USE_SEMI_PERM_KEY_LEN           1\n#define LMP_HOST_CON_REQ_LEN                1\n#define LMP_SLOT_OFF_LEN                    9\n#define LMP_PAGE_MODE_REQ_LEN               3\n#define LMP_PAGE_SCAN_MODE_REQ_LEN          3\n#define LMP_SUPV_TO_LEN                     3\n#define LMP_TEST_ACTIVATE_LEN               1\n#define LMP_TEST_CTRL_LEN                   10\n#define LMP_ENC_KEY_SIZE_MASK_REQ_LEN       1\n#define LMP_ENC_KEY_SIZE_MASK_RES_LEN       3\n#define LMP_SET_AFH_LEN                     16\n#define LMP_ENCAPS_HDR_LEN                  4\n#define LMP_ENCAPS_PAYL_LEN                 17\n#define LMP_SP_CFM_LEN                      17\n#define LMP_SP_NB_LEN                       17\n#define LMP_DHKEY_CHK_LEN                   17\n#define LMP_PAUSE_ENC_AES_REQ_LEN           17\n\n/// LMP Escape 4 Extended PDU length (including opcode and ext opcode)\n#define LMP_ACCEPTED_EXT_LEN                4\n#define LMP_NOT_ACCEPTED_EXT_LEN            5\n#define LMP_FEATS_REQ_EXT_LEN               12\n#define LMP_FEATS_RES_EXT_LEN               12\n#define LMP_CLK_ADJ_LEN                     15\n#define LMP_CLK_ADJ_ACK_LEN                 3\n#define LMP_CLK_ADJ_REQ_LEN                 6\n#define LMP_PKT_TYPE_TBL_REQ_LEN            3\n#define LMP_ESCO_LINK_REQ_LEN               16\n#define LMP_RMV_ESCO_LINK_REQ_LEN           4\n#define LMP_CH_CLASS_REQ_LEN                7\n#define LMP_CH_CLASS_LEN                    12\n#define LMP_SSR_REQ_LEN                     9\n#define LMP_SSR_RES_LEN                     9\n#define LMP_PAUSE_ENC_REQ_LEN               2\n#define LMP_RESUME_ENC_REQ_LEN              2\n#define LMP_IO_CAP_REQ_LEN                  5\n#define LMP_IO_CAP_RES_LEN                  5\n#define LMP_NUM_COMPARISON_FAIL_LEN         2\n#define LMP_PASSKEY_FAIL_LEN                2\n#define LMP_OOB_FAIL_LEN                    2\n#define LMP_KEYPRESS_NOTIF_LEN              3\n#define LMP_PWR_CTRL_REQ_LEN                3\n#define LMP_PWR_CTRL_RES_LEN                3\n#define LMP_PING_REQ_LEN                    2\n#define LMP_PING_RES_LEN                    2\n\n/// Maximum LMP PDU size (including opcode and ext opcode)\n#define LMP_MAX_PDU_SIZE         DM1_PACKET_SIZE\n\n/// Position of transaction ID in 1st byte\n#define LMP_TR_ID_POS        0\n#define LMP_TR_ID_MASK       0x01\n/// Position of opcode in 1st byte\n#define LMP_OPCODE_POS       1\n#define LMP_OPCODE_MASK      0xFE\n\n#define LMP_OPCODE(opcode, tr_id) (((opcode << LMP_OPCODE_POS) & LMP_OPCODE_MASK) | ((tr_id << LMP_TR_ID_POS) & LMP_TR_ID_MASK))\n/*\n * MESSAGES\n ****************************************************************************************\n */\n\n///LMP_name_req PDU structure\nstruct lmp_name_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Offset\n    uint8_t  offset;\n};\n\n///LMP_name_res PDU structure\nstruct lmp_name_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Offset\n    uint8_t  offset;\n    ///Name Length\n    uint8_t  length;\n    ///Name Fragment\n    struct name_vect name_frag;\n};\n\n///LMP_accepted PDU structure\nstruct lmp_accepted\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Opcode of the original LMP\n    uint8_t  orig_opcode;\n};\n\n///LMP_not_accepted PDU structure\nstruct lmp_not_accepted\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Opcode of the original LMP\n    uint8_t  orig_opcode;\n    ///Reason for not accepting the PDU (error code)\n    uint8_t  reason;\n};\n\n///LMP_clkoffset_req PDU structure\nstruct lmp_clk_off_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_clkoffset_res PDU structure\nstruct lmp_clk_off_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Clock Offset value\n    uint16_t clk_offset ;\n};\n\n///LMP_detach PDU structure\nstruct lmp_detach\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Reason to detach\n    uint8_t  reason;\n};\n\n///LMP_in_rand PDU structure\nstruct lmp_inrand\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Random number\n    struct ltk random;\n};\n\n///LMP_comb_key PDU structure\nstruct lmp_combkey\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Random number\n    struct ltk random;\n};\n\n///LMP_unit_key PDU structure\nstruct lmp_unitkey\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Key\n    struct ltk key;\n};\n\n///LMP_au_rand PDU structure\nstruct lmp_aurand\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Random number\n    struct ltk random;\n};\n\n///LMP_sres PDU structure\nstruct lmp_sres\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Authentication Response\n    struct sres_nb Sres;\n};\n\n///LMP_temp_rand PDU structure\nstruct lmp_temprand\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Random number\n    struct ltk random;\n};\n\n///LMP_temp_key PDU structure\nstruct lmp_tempkey\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Key\n    struct ltk key;\n};\n\n///LMP_encryption_mode_req PDU structure\nstruct lmp_enc_mode_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Encryption Mode\n    uint8_t  enc_mode;\n};\n\n///LMP_encryption_key_size_req PDU structure\nstruct lmp_enc_key_size_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Key Size\n    uint8_t  key_size;\n};\n\n///LMP_start_encryption_req PDU structure\nstruct lmp_start_enc_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Random number\n    struct ltk random;\n};\n\n///LMP_stop_encryption_req PDU structure\nstruct lmp_stop_enc_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_switch_req PDU structure\nstruct lmp_switch_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Switch Instant\n    uint32_t switch_inst;\n};\n\n///LMP_sniff_req PDU structure\nstruct lmp_sniff_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Timing Control Flags\n    uint8_t  flags;\n    ///Dsniff\n    uint16_t d_sniff;\n    ///Tsniff\n    uint16_t t_sniff;\n    ///Sniff attempt\n    uint16_t sniff_attempt;\n    ///Sniff Timeout\n    uint16_t sniff_to;\n};\n\n///LMP_unsniff_req PDU structure\nstruct lmp_unsniff_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_incr_power_req PDU structure\nstruct lmp_incr_pwr_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///For future use\n    uint8_t  reserved;\n};\n\n///LMP_decr_power_req PDU structure\nstruct lmp_decr_pwr_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///For future use\n    uint8_t  reserved;\n};\n\n///LMP_max_power PDU structure\nstruct lmp_max_pwr\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_min_power PDU structure\nstruct lmp_min_pwr\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_auto_rate PDU structure\nstruct lmp_auto_rate\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_preferred_rate PDU structure\nstruct lmp_pref_rate\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Data Rate\n    uint8_t  rate;\n};\n\n///LMP_version_req PDU structure\nstruct lmp_ver_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Version number\n    uint8_t  ver;\n    ///Company ID\n    uint16_t co_id;\n    ///Subversion number\n    uint16_t subver;\n};\n\n///LMP_version_res PDU structure\nstruct lmp_ver_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Version number\n    uint8_t  ver;\n    ///Company ID\n    uint16_t co_id;\n    ///Subversion number\n    uint16_t subver;\n};\n\n///LMP_features_req PDU structure\nstruct lmp_feats_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Features\n    struct features feats;\n};\n\n///LMP_features_res PDU structure\nstruct lmp_feats_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Features\n    struct features feats;\n};\n\n///LMP_quality_of_service PDU structure\nstruct lmp_qos\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Poll interval\n    uint16_t poll_intv;\n    ///Nbc\n    uint8_t  nbc;\n};\n\n\n///LMP_quality_of_service_req PDU structure\nstruct lmp_qos_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Poll interval\n    uint16_t poll_intv;\n    ///Nbc\n    uint8_t  nbc;\n};\n\n///LMP_SCO_link_req PDU structure\nstruct lmp_sco_link_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///SCO handle\n    uint8_t  sco_hdl;\n    ///timing control flags\n    uint8_t  flags;\n    ///Dsco\n    uint8_t  d_sco;\n    ///Tsco\n    uint8_t  t_sco;\n    ///SCO packet\n    uint8_t  sco_pkt;\n    ///Air mode\n    uint8_t  air_mode;\n};\n\n///LMP_remove_SCO_link_req PDU structure\nstruct lmp_rmv_sco_link_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///SCO handle\n    uint8_t  sco_hdl;\n    ///Reason for its removal(error code)\n    uint8_t  reason;\n};\n\n///LMP_max_slot PDU structure\nstruct lmp_max_slot\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Max slots\n    uint8_t  max_slots;\n};\n\n\n///LMP_max_slot_req PDU structure\nstruct lmp_max_slot_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Max slots\n    uint8_t  max_slots;\n};\n\n///LMP_timing_accuracy_req PDU structure\nstruct lmp_timing_accu_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_timing_accuracy_res PDU structure\nstruct lmp_timing_accu_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Drift\n    uint8_t  drift;\n    ///Jitter\n    uint8_t  jitter;\n};\n\n///LMP_setup_complete PDU structure\nstruct lmp_setup_cmp\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_use_semi_permanent_key PDU structure\nstruct lmp_use_semi_perm_key\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_host_connection_req PDU structure\nstruct lmp_host_con_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_slot_offset PDU structure\nstruct lmp_slot_off\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Slot Offset\n    uint16_t       slot_off;\n    ///BD Address\n    struct bd_addr addr;\n};\n\n///LMP_page_mode_req PDU structure\nstruct lmp_page_mode_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Paging scheme\n    uint8_t  page_scheme;\n    ///Paging scheme settings\n    uint8_t  page_stg;\n};\n\n///LMP_page_scan_mode_req PDU structure\nstruct lmp_page_scan_mode_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Paging scheme\n    uint8_t  page_scheme;\n    ///Paging scheme settings\n    uint8_t  page_stg;\n};\n\n///LMP_supervision_timeout PDU structure\nstruct lmp_supv_to\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Supervision Timeout\n    uint16_t supv_to;\n};\n\n///LMP_test_activate PDU structure\nstruct lmp_test_activate\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_test_control PDU structure\nstruct lmp_test_ctrl\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Test Scenario\n    uint8_t  scenario;\n    ///Hopping Mode\n    uint8_t  hop;\n    ///Tx frequency\n    uint8_t  tx_freq;\n    ///Rx Frequency\n    uint8_t  rx_freq;\n    ///Power Control Mode\n    uint8_t  pwr_ctrl;\n    ///Poll period\n    uint8_t  poll_period;\n    ///Packet type\n    uint8_t  pkt_type;\n    ///length of test data\n    uint16_t data_len;\n};\n\n///LMP_encryption_key_size_mask_req PDU structure\nstruct lmp_enc_key_size_mask_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n};\n\n///LMP_encryption_key_size_mask_res PDU structure\nstruct lmp_enc_key_size_mask_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Encryption Key Size Mask\n    uint16_t mask;\n};\n\n///LMP_set_AFH PDU structure\nstruct lmp_set_afh\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///AFH Instant\n    uint32_t        instant;\n    ///AFH Mode\n    uint8_t         mode;\n    ///AFH channel map\n    struct chnl_map map;\n};\n\n///LMP_encapsulated_header PDU structure\nstruct lmp_encaps_hdr\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Encapsulated major type\n    uint8_t  maj_type;\n    ///Encapsulated minor type\n    uint8_t  min_type;\n    ///Encapsulated Payload Length\n    uint8_t  payl_len;\n};\n\n///LMP_encapsulated_payload PDU structure\nstruct lmp_encaps_payl\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Encapsulated data\n    struct byte16 data;\n};\n\n///LMP_Simple_Pairing_Confirm PDU structure\nstruct lmp_sp_cfm\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Commitment Value\n    struct byte16 commitment_val ;\n};\n\n///LMP_Simple_Pairing_Number PDU structure\nstruct lmp_sp_nb\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///nonce Value\n    struct byte16 nonce;\n};\n\n///LMP_DHkey_check PDU structure\nstruct lmp_dhkey_chk\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Confirmation Value\n    struct ltk cfm_val;\n};\n\n///LMP_pause_encryption_aes_req PDU structure\nstruct lmp_pause_enc_aes_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    /// Random Number\n    struct ltk rand;\n};\n\n/*\n * Extended PDUs parameter structures - Escape 4\n ****************************************************************************************/\n\n///LMP_accepted_ext PDU structure\nstruct lmp_accepted_ext\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Escape opcode of the original LMP\n    uint8_t  orig_esc_opcode;\n    ///Extended opcode of the original LMP\n    uint8_t  orig_ext_opcode;\n};\n\n///LMP_not_accepted_ext PDU structure\nstruct lmp_not_accepted_ext\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Escape opcode of the original LMP\n    uint8_t  orig_esc_opcode;\n    ///Extended opcode of the original LMP\n    uint8_t  orig_ext_opcode;\n    ///Reason\n    uint8_t  reason;\n};\n\n///LMP_features_req_ext PDU structure\nstruct lmp_feats_req_ext\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Features page\n    uint8_t        page;\n    ///Max supported page\n    uint8_t        max_page;\n    ///Extended features\n    struct features ext_feats;\n};\n\n///LMP_features_res_ext PDU structure\nstruct lmp_feats_res_ext\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Features page\n    uint8_t        page;\n    ///Max supported page\n    uint8_t        max_page;\n    ///Extended features\n    struct features ext_feats;\n};\n\n///LMP_clk_adj PDU structure\nstruct lmp_clk_adj\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Coarse clock adjustment Event ID\n    uint8_t  clk_adj_id;\n    ///Coarse clock adjustment instant\n    uint32_t clk_adj_instant;\n    ///Coarse clock adjustment intraslot alignment offset\n    int16_t clk_adj_us;\n    ///Coarse clock adjustment slot offset\n    uint8_t  clk_adj_slots;\n    ///Coarse clock adjustment mode (before/after instant)\n    uint8_t  clk_adj_mode;\n    ///Coarse clock adjustment PDU CLK instant\n    uint32_t clk_adj_clk;\n};\n\n///LMP_clk_adj_ack PDU structure\nstruct lmp_clk_adj_ack\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Coarse clock adjustment Event ID\n    uint8_t  clk_adj_id;\n};\n\n///LMP_clk_adj_req PDU structure\nstruct lmp_clk_adj_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Coarse clock adjustment intraslot alignment offset\n    int16_t clk_adj_us;\n    ///Coarse clock adjustment slot offset\n    uint8_t  clk_adj_slots;\n    ///Corase clock adjustment period\n    uint8_t  clk_adj_period;\n};\n\n///LMP_packet_type_table_req PDU structure\nstruct lmp_pkt_type_tbl_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Packet Type table\n    uint8_t  pkt_type_tbl;\n};\n\n///LMP_eSCO_link_req PDU structure\nstruct lmp_esco_link_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///eSCO handle\n    uint8_t  esco_hdl;\n    ///eSCo LT Address\n    uint8_t  esco_lt_addr;\n    ///timing control flags\n    uint8_t  flags;\n    ///Desco\n    uint8_t  d_esco;\n    ///t_esco\n    uint8_t  t_esco;\n    ///Wesco\n    uint8_t  w_esco;\n    ///eSCO packet type M2S\n    uint8_t  m2s_pkt_type;\n    ///eSCO packet type S2M\n    uint8_t  s2m_pkt_type;\n    ///Packet Length M2S\n    uint16_t m2s_pkt_len;\n    ///Packet Length S2m\n    uint16_t s2m_pkt_len;\n    ///Air Mode\n    uint8_t  air_mode;\n    ///Negotiation state\n    uint8_t  negt_st;\n};\n\n///LMP_remove_eSCO_link_req PDU structure\nstruct lmp_rmv_esco_link_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///eSCO handle\n    uint8_t  esco_hdl;\n    ///Reason\n    uint8_t  reason;\n};\n\n///LMP_channel_classification_req PDU structure\nstruct lmp_ch_class_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///AFH reporting mode\n    uint8_t  rep_mode;\n    ///AFH min interval\n    uint16_t min_intv;\n    ///AFH max interval\n    uint16_t max_intv;\n};\n\n///LMP_channel_classification PDU structure\nstruct lmp_ch_class\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///AFh channel classification\n    struct chnl_map ch_class;\n};\n\n///LMP_sniff_subrating_req PDU structure\nstruct lmp_ssr_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Maximum sniff sub-rate\n    uint8_t  max_subrate;\n    ///Minimum sniff mode timeout\n    uint16_t min_to;\n    ///Sniff sub-rating instant\n    uint32_t inst;\n};\n\n///LMP_sniff_subrating_res PDU structure\nstruct lmp_ssr_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Maximum sniff sub-rate\n    uint8_t  max_subrate;\n    ///Minimum sniff mode timeout\n    uint16_t min_to;\n    ///Sniff sub-rating instant\n    uint32_t inst;\n};\n\n///LMP_pause_encryption_req PDU structure\nstruct lmp_pause_enc_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n};\n\n///LMP_resume_encryption_req PDU structure\nstruct lmp_resume_enc_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n};\n\n///LMP_IO_capability_req PDU structure\nstruct lmp_io_cap_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///IO Capabilities\n    uint8_t  io_cap;\n    /// OOB Authentication data\n    uint8_t  oob_auth_data;\n    ///Authentication requirements\n    uint8_t  auth_req;\n};\n\n\n///LMP_IO_capability_res PDU structure\nstruct lmp_io_cap_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///IO Capabilities\n    uint8_t  io_cap;\n    /// OOB Authentication data\n    uint8_t  oob_auth_data;\n    ///Authentication requirements\n    uint8_t  auth_req;\n};\n\n///LMP_numeric_comparison_failed PDU structure\nstruct lmp_num_comparison_fail\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n};\n\n///LMP_passkey_failed PDU structure\nstruct lmp_passkey_fail\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n};\n\n///LMP_oob_failed PDU structure\nstruct lmp_oob_fail\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n};\n\n///LMP_keypress_notification PDU structure\nstruct lmp_keypress_notif\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Notification Type\n    uint8_t  type;\n};\n\n///LMP_power_control_req PDU structure\nstruct lmp_pwr_ctrl_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Power adjustment request\n    uint8_t pwr_adj;\n\n};\n\n///LMP_power_control_res PDU structure\nstruct lmp_pwr_ctrl_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n    ///Power adjustment response\n    uint8_t pwr_adj;\n};\n\n/// LMP_ping_req PDU structure\nstruct lmp_ping_req\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n};\n\n/// LMP_ping_res PDU structure\nstruct lmp_ping_res\n{\n    ///Opcode (including transaction ID)\n    uint8_t  opcode;\n    ///Extended opcode\n    uint8_t  ext_opcode;\n};\n\n/// Union of all the LMP message structures\nunion lmp_pdu_data\n{\n    struct lmp_name_req                name_req              ;\n    struct lmp_name_res                name_res              ;\n    struct lmp_accepted                accepted              ;\n    struct lmp_not_accepted            not_accepted          ;\n    struct lmp_clk_off_req             clk_off_req           ;\n    struct lmp_clk_off_res             clk_off_res           ;\n    struct lmp_detach                  detach                ;\n    struct lmp_inrand                  inrand                ;\n    struct lmp_combkey                 combkey               ;\n    struct lmp_unitkey                 unitkey               ;\n    struct lmp_aurand                  aurand                ;\n    struct lmp_sres                    sres                  ;\n    struct lmp_temprand                temprand              ;\n    struct lmp_tempkey                 tempkey               ;\n    struct lmp_enc_mode_req            enc_mode_req          ;\n    struct lmp_enc_key_size_req        enc_key_size_req      ;\n    struct lmp_start_enc_req           start_enc_req         ;\n    struct lmp_stop_enc_req            stop_enc_req          ;\n    struct lmp_switch_req              switch_req            ;\n    struct lmp_sniff_req               sniff_req             ;\n    struct lmp_unsniff_req             unsniff_req           ;\n    struct lmp_incr_pwr_req            incr_pwr_req          ;\n    struct lmp_decr_pwr_req            decr_pwr_req          ;\n    struct lmp_max_pwr                 max_pwr               ;\n    struct lmp_min_pwr                 min_pwr               ;\n    struct lmp_auto_rate               auto_rate             ;\n    struct lmp_pref_rate               pref_rate             ;\n    struct lmp_ver_req                 ver_req               ;\n    struct lmp_ver_res                 ver_res               ;\n    struct lmp_feats_req               feats_req             ;\n    struct lmp_feats_res               feats_res             ;\n    struct lmp_clk_adj                 clk_adj               ;\n    struct lmp_clk_adj_ack             clk_adj_ack           ;\n    struct lmp_clk_adj_req             clk_adj_req           ;\n    struct lmp_qos                     qos                   ;\n    struct lmp_qos_req                 qos_req               ;\n    struct lmp_sco_link_req            sco_link_req          ;\n    struct lmp_rmv_sco_link_req        rmv_sco_link_req      ;\n    struct lmp_max_slot                max_slot              ;\n    struct lmp_max_slot_req            max_slot_req          ;\n    struct lmp_timing_accu_req         timing_accu_req       ;\n    struct lmp_timing_accu_res         timing_accu_res       ;\n    struct lmp_setup_cmp               setup_cmp             ;\n    struct lmp_use_semi_perm_key       use_semi_perm_key     ;\n    struct lmp_host_con_req            host_con_req          ;\n    struct lmp_slot_off                slot_off              ;\n    struct lmp_page_mode_req           page_mode_req         ;\n    struct lmp_page_scan_mode_req      page_scan_mode_req    ;\n    struct lmp_supv_to                 supv_to               ;\n    struct lmp_test_activate           test_activate         ;\n    struct lmp_test_ctrl               test_ctrl             ;\n    struct lmp_enc_key_size_mask_req   enc_key_size_mask_req ;\n    struct lmp_enc_key_size_mask_res   enc_key_size_mask_res ;\n    struct lmp_set_afh                 set_afh               ;\n    struct lmp_encaps_hdr              encaps_hdr            ;\n    struct lmp_encaps_payl             encaps_payl           ;\n    struct lmp_sp_cfm                  sp_cfm                ;\n    struct lmp_sp_nb                   sp_nb                 ;\n    struct lmp_dhkey_chk               dhkey_chk             ;\n    struct lmp_accepted_ext            accepted_ext          ;\n    struct lmp_not_accepted_ext        not_accepted_ext      ;\n    struct lmp_feats_req_ext           feats_req_ext         ;\n    struct lmp_feats_res_ext           feats_res_ext         ;\n    struct lmp_pkt_type_tbl_req        pkt_type_tbl_req      ;\n    struct lmp_esco_link_req           esco_link_req         ;\n    struct lmp_rmv_esco_link_req       rmv_esco_link_req     ;\n    struct lmp_ch_class_req            ch_class_req          ;\n    struct lmp_ch_class                ch_class              ;\n    struct lmp_ssr_req                 ssr_req               ;\n    struct lmp_ssr_res                 ssr_res               ;\n    struct lmp_pause_enc_req           pause_enc_req         ;\n    struct lmp_resume_enc_req          resume_enc_req        ;\n    struct lmp_io_cap_req              io_cap_req            ;\n    struct lmp_io_cap_res              io_cap_res            ;\n    struct lmp_num_comparison_fail     num_comparison_fail   ;\n    struct lmp_passkey_fail            passkey_fail          ;\n    struct lmp_oob_fail                oob_fail              ;\n    struct lmp_keypress_notif          keypress_notif        ;\n    struct lmp_pwr_ctrl_req            pwr_ctrl_req          ;\n    struct lmp_pwr_ctrl_res            pwr_ctrl_res          ;\n    struct lmp_ping_req                ping_req              ;\n    struct lmp_ping_res                ping_res              ;\n};\n\n\n/// @} CO_BT\n#endif // CO_LMP_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_math.h",
    "content": "#ifndef _CO_MATH_H_\n#define _CO_MATH_H_\n\n/**\n *****************************************************************************************\n * @defgroup CO_MATH Math functions\n * @ingroup COMMON\n * @brief  Optimized math functions and other computations.\n *\n * @{\n *****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include         // standard integer definitions\n#include        // boolean definitions\n#include         // standard library\n#include \"compiler.h\"      // for __INLINE\n\nextern void srand (unsigned int seed);\nextern int rand (void);\n\n/*\n * MACROS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Return value with one bit set.\n *\n * @param[in] pos Position of the bit to set.\n *\n * @return Value with one bit set.  There is no return type since this is a macro and this\n * will be resolved by the compiler upon assignment to an l-value.\n ****************************************************************************************\n */\n#define CO_BIT(pos) (1UL<<(pos))\n\n/**\n ****************************************************************************************\n * @brief Align val on the multiple of 4 equal or nearest higher.\n * @param[in] val Value to align.\n * @return Value aligned.\n ****************************************************************************************\n */\n#define CO_ALIGN4_HI(val) (((val)+3)&~3)\n\n\n/**\n ****************************************************************************************\n * @brief Align val on the multiple of 4 equal or nearest lower.\n * @param[in] val Value to align.\n * @return Value aligned.\n ****************************************************************************************\n */\n#define CO_ALIGN4_LO(val) ((val)&~3)\n\n/**\n ****************************************************************************************\n * @brief Align val on the multiple of 2 equal or nearest higher.\n * @param[in] val Value to align.\n * @return Value aligned.\n ****************************************************************************************\n */\n#define CO_ALIGN2_HI(val) (((val)+1)&~1)\n\n\n/**\n ****************************************************************************************\n * @brief Align val on the multiple of 2 equal or nearest lower.\n * @param[in] val Value to align.\n * @return Value aligned.\n ****************************************************************************************\n */\n#define CO_ALIGN2_LO(val) ((val)&~1)\n\n\n/*\n * FUNCTION DEFINTIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Count leading zeros.\n * @param[in] val Value to count the number of leading zeros on.\n * @return Number of leading zeros when value is written as 32 bits.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_clz(uint32_t val)\n{\n    #if defined(__arm__)\n    return __builtin_clz(val);\n    #elif defined(__GNUC__)\n    if (val == 0)\n    {\n        return 32;\n    }\n    return __builtin_clz(val);\n    #else\n    uint32_t i;\n    for (i = 0; i < 32; i++)\n    {\n        if (val & CO_BIT(31 - i))\n            break;\n    }\n    return i;\n    #endif // defined(__arm__)\n}\n\n/**\n ****************************************************************************************\n * @brief Function to initialize the random seed.\n * @param[in] seed The seed number to use to generate the random sequence.\n ****************************************************************************************\n */\n__STATIC __INLINE void co_random_init(uint32_t seed)\n{\n    srand(seed);\n}\n\n/**\n ****************************************************************************************\n * @brief Function to get an 8 bit random number.\n * @return Random byte value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint8_t co_rand_byte(void)\n{\n    return (uint8_t)(rand() & 0xFF);\n}\n\n/**\n ****************************************************************************************\n * @brief Function to get an 16 bit random number.\n * @return Random half word value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint16_t co_rand_hword(void)\n{\n    return (uint16_t)(rand() & 0xFFFF);\n}\n\n/**\n ****************************************************************************************\n * @brief Function to get an 32 bit random number.\n * @return Random word value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_rand_word(void)\n{\n    return (uint32_t)rand();\n}\n\n/**\n ****************************************************************************************\n * @brief Function to return the smallest of 2 unsigned 32 bits words.\n * @return The smallest value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_min(uint32_t a, uint32_t b)\n{\n    return a < b ? a : b;\n}\n\n/**\n ****************************************************************************************\n * @brief Function to return the greatest of 2 unsigned 32 bits words.\n * @return The greatest value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_max(uint32_t a, uint32_t b)\n{\n    return a > b ? a : b;\n}\n\n/**\n ****************************************************************************************\n * @brief Function to return the absolute value of a signed integer.\n * @return The absolute value.\n ****************************************************************************************\n */\n__STATIC __INLINE int co_abs(int val)\n{\n    return val < 0 ? val*(-1) : val;\n}\n\n/// @} CO_MATH\n\n\n#endif // _CO_MATH_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_utils.h",
    "content": "#ifndef _CO_UTILS_H_\n#define _CO_UTILS_H_\n\n/**\n ****************************************************************************************\n * @defgroup CO_UTILS Utilities\n * @ingroup COMMON\n * @brief  Common utilities\n *\n * This module contains the common utilities functions and macros.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include        // standard definitions\n#include        // standard definitions\n#include \"co_bt.h\"        // common bt definitions\n#include \"rwip_config.h\"  // SW configuration\n#include \"compiler.h\"     // for inline functions\n\n\n/*\n * MACRO DEFINITIONS\n ****************************************************************************************\n */\n\n/// Number of '1' bits in a byte\n#define NB_ONE_BITS(byte)   (one_bits[byte & 0x0F] + one_bits[byte >> 4])\n\n/// Get the number of elements within an array, give also number of rows in a 2-D array\n#define ARRAY_LEN(array)   (sizeof((array))/sizeof((array)[0]))\n\n/// Get the number of columns within a 2-D array\n#define ARRAY_NB_COLUMNS(array)  (sizeof((array[0]))/sizeof((array)[0][0]))\n\n\n/// Macro for LMP message handler function declaration or definition\n#define LMP_MSG_HANDLER(msg_name)   __STATIC int lmp_##msg_name##_handler(struct lmp_##msg_name const *param,  \\\n                                                                                ke_task_id_t const dest_id)\n/// Macro for LMP message handler function declaration or definition\n#define LLCP_MSG_HANDLER(msg_name)   __STATIC int llcp_##msg_name##_handler(struct llcp_##msg_name const *param,  \\\n                                                                                ke_task_id_t const dest_id)\n\n/// Macro for HCI message handler function declaration or definition (for multi-instantiated tasks)\n#define HCI_CMD_HANDLER_C(cmd_name, param_struct)   __STATIC int hci_##cmd_name##_cmd_handler(param_struct const *param,  \\\n                                                                                ke_task_id_t const dest_id,  \\\n                                                                                uint16_t opcode)\n\n/// Macro for HCI message handler function declaration or definition (with parameters)\n#define HCI_CMD_HANDLER(cmd_name, param_struct)   __STATIC int hci_##cmd_name##_cmd_handler(param_struct const *param,  \\\n                                                                                uint16_t opcode)\n\n/// Macro for HCI message handler function declaration or definition (with parameters)\n#define HCI_CMD_HANDLER_TAB(task)   __STATIC const struct task##_hci_cmd_handler task##_hci_command_handler_tab[] =\n\n\n/// MACRO to build a subversion field from the Minor and Release fields\n#define CO_SUBVERSION_BUILD(minor, release)     (((minor) << 8) | (release))\n\n\n/// Macro to get a structure from one of its structure field\n//#define CONTAINER_OF(ptr, type, member)    ((type *)( (char *)ptr - offsetof(type,member) ))\n\n\n/*\n * ENUMERATIONS DEFINITIONS\n ****************************************************************************************\n */\n\n/// Status returned by generic packer-unpacker\nenum CO_UTIL_PACK_STATUS\n{\n    CO_UTIL_PACK_OK,\n    CO_UTIL_PACK_IN_BUF_OVFLW,\n    CO_UTIL_PACK_OUT_BUF_OVFLW,\n    CO_UTIL_PACK_WRONG_FORMAT,\n    CO_UTIL_PACK_ERROR,\n};\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * CONSTANT DECLARATIONS\n ****************************************************************************************\n */\n\n/// Number of '1' bits in values from 0 to 15, used to fasten bit counting\nextern const unsigned char one_bits[16];\n\n/// Conversion table Sleep Clock Accuracy to PPM\nextern const uint16_t co_sca2ppm[];\n\n/// NULL BD address\nextern const struct bd_addr co_null_bdaddr;\n\n/// Default BD address\nextern const struct bd_addr co_default_bdaddr;\n\n\n/*\n * OPERATIONS ON BT CLOCK\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Clocks addition with 2 operands\n *\n * @param[in]   clock_a   1st operand value (in BT slots)\n * @param[in]   clock_b   2nd operand value (in BT slots)\n * @return      result    operation result (in BT slots)\n ****************************************************************************************\n */\n#define CLK_ADD_2(clock_a, clock_b)     ((uint32_t)(((clock_a) + (clock_b)) & RWIP_MAX_CLOCK_TIME))\n\n/**\n ****************************************************************************************\n * @brief Clocks addition with 3 operands\n *\n * @param[in]   clock_a   1st operand value (in BT slots)\n * @param[in]   clock_b   2nd operand value (in BT slots)\n * @param[in]   clock_c   3rd operand value (in BT slots)\n * @return      result    operation result (in BT slots)\n ****************************************************************************************\n */\n#define CLK_ADD_3(clock_a, clock_b, clock_c)     ((uint32_t)(((clock_a) + (clock_b) + (clock_c)) & RWIP_MAX_CLOCK_TIME))\n\n/**\n ****************************************************************************************\n * @brief Clocks subtraction\n *\n * @param[in]   clock_a   1st operand value (in BT slots)\n * @param[in]   clock_b   2nd operand value (in BT slots)\n * @return      result    operation result (in BT slots)\n ****************************************************************************************\n */\n#define CLK_SUB(clock_a, clock_b)     ((uint32_t)(((clock_a) - (clock_b)) & RWIP_MAX_CLOCK_TIME))\n\n/**\n ****************************************************************************************\n * @brief Clocks time difference\n *\n * @param[in]   clock_a   1st operand value (in BT half-slots)\n * @param[in]   clock_b   2nd operand value (in BT half-slots)\n * @return      result    return the time difference from clock A to clock B\n *                           - result < 0  => clock_b is in the past\n *                           - result == 0 => clock_a is equal to clock_b\n *                           - result > 0  => clock_b is in the future\n ****************************************************************************************\n */\n#define CLK_DIFF(clock_a, clock_b)     ( (CLK_SUB((clock_b), (clock_a)) > ((RWIP_MAX_CLOCK_TIME+1) >> 1)) ?                      \\\n                          ((int32_t)((-CLK_SUB((clock_a), (clock_b))))) : ((int32_t)((CLK_SUB((clock_b), (clock_a))))) )\n\n\n\n/// macro to extract a field from a value containing several fields\n/// @param[in] __r bit field value\n/// @param[in] __f field name\n/// @return the value of the register masked and shifted\n#define GETF(__r, __f)                                                           \\\n    (( (__r) & (__f##_MASK) ) >> (__f##_LSB))\n\n/// macro to set a field value into a value  containing several fields.\n/// @param[in] __r bit field value\n/// @param[in] __f field name\n/// @param[in] __v value to put in field\n#define SETF(__r, __f, __v)                                                      \\\n    do {                                                                         \\\n        ASSERT_INFO( ( ( ( (__v) << (__f##_LSB) ) & ( ~(__f##_MASK) ) ) ) == 0 ,(__f##_MASK), (__v)); \\\n        __r = (((__r) & ~(__f##_MASK)) | (__v) << (__f##_LSB));                  \\\n    } while (0)\n\n\n\n/// macro to extract a bit field from a value containing several fields\n/// @param[in] __r bit field value\n/// @param[in] __b bit field name\n/// @return the value of the register masked and shifted\n#define GETB(__r, __b)                                                           \\\n    (( (__r) & (__b##_BIT) ) >> (__b##_POS))\n\n/// macro to set a bit field value into a value containing several fields.\n/// @param[in] __r bit field value\n/// @param[in] __b bit field name\n/// @param[in] __v value to put in field\n#define SETB(__r, __b, __v)                                                      \\\n    do {                                                                         \\\n        ASSERT_ERR( ( ( ( (__v) << (__b##_POS) ) & ( ~(__b##_BIT) ) ) ) == 0 ); \\\n        __r = (((__r) & ~(__b##_BIT)) | (__v) << (__b##_POS));                  \\\n    } while (0)\n\n#if (BLE_EMB_PRESENT)\n/**\n ******************************************************************************\n * @brief Compare 2 BLE instants (connection event counter)\n * @param[in]   instant_a   1st operand value (connection event counter)\n * @param[in]   instant_b   2nd operand value (connection event counter)\n * @return      result      True: B is greater or equal to A | False: B is smaller than A\n ******************************************************************************\n */\n#define CO_BLE_INSTANT_PASSED(instant_a, instant_b)    ((uint16_t)(instant_b - instant_a) < 32767)\n#endif //BLE_EMB_PRESENT\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Read an aligned 32 bit word.\n * @param[in] ptr32 The address of the first byte of the 32 bit word.\n * @return The 32 bit value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_read32(void const *ptr32)\n{\n    return *((uint32_t*)ptr32);\n}\n\n/**\n ****************************************************************************************\n * @brief Read an aligned 16 bits word.\n * @param[in] ptr16 The address of the first byte of the 16 bits word.\n * @return The 16 bits value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint16_t co_read16(void const *ptr16)\n{\n    return *((uint16_t*)ptr16);\n}\n\n/**\n ****************************************************************************************\n * @brief Write an aligned 32 bits word.\n * @param[in] ptr32 The address of the first byte of the 32 bits word.\n * @param[in] value The value to write.\n ****************************************************************************************\n */\n__STATIC __INLINE void co_write32(void const *ptr32, uint32_t value)\n{\n    *(uint32_t*)ptr32 = value;\n}\n\n/**\n ****************************************************************************************\n * @brief Write an aligned 16 bits word.\n * @param[in] ptr16 The address of the first byte of the 16 bits word.\n * @param[in] value The value to write.\n ****************************************************************************************\n */\n__STATIC __INLINE void co_write16(void const *ptr16, uint32_t value)\n{\n    *(uint16_t*)ptr16 = value;\n}\n\n/**\n ****************************************************************************************\n * @brief Write a 8 bits word.\n * @param[in] ptr8 The address of the first byte of the 8 bits word.\n * @param[in] value The value to write.\n ****************************************************************************************\n */\n__STATIC __INLINE void co_write8(void const *ptr8, uint32_t value)\n{\n    *(uint8_t*)ptr8 = value;\n}\n\n/**\n ****************************************************************************************\n * @brief Read a packed 16 bits word.\n * @param[in] ptr16 The address of the first byte of the 16 bits word.\n * @return The 16 bits value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint16_t co_read16p(void const *ptr16)\n{\n    uint16_t value = ((uint8_t *)ptr16)[0] | ((uint8_t *)ptr16)[1] << 8;\n    return value;\n}\n\n/**\n ****************************************************************************************\n * @brief Read a packed 24 bits word.\n * @param[in] ptr24 The address of the first byte of the 24 bits word.\n * @return The 24 bits value.\n ****************************************************************************************\n */\n \n__STATIC __INLINE uint32_t co_read24p(void const *ptr24)\n{\n    uint16_t addr_l, addr_h;\n    addr_l = co_read16p(ptr24);\n    addr_h = *((uint8_t *)ptr24 + 2) & 0x00FF;\n    return ((uint32_t)addr_l | (uint32_t)addr_h << 16);\n}\n\n/**\n ****************************************************************************************\n * @brief Write a packed 24 bits word.\n * @param[in] ptr24 The address of the first byte of the 24 bits word.\n * @param[in] value The value to write.\n ****************************************************************************************\n */\n \n__STATIC __INLINE void co_write24p(void const *ptr24, uint32_t value)\n{\n    uint8_t *ptr=(uint8_t*)ptr24;\n\n    *ptr++ = (uint8_t)(value&0xff);\n    *ptr++ = (uint8_t)((value&0xff00)>>8);\n    *ptr++ = (uint8_t)((value&0xff0000)>>16);\n}\n\n/**\n ****************************************************************************************\n * @brief Read a packed 32 bits word.\n * @param[in] ptr32 The address of the first byte of the 32 bits word.\n * @return The 32 bits value.\n ****************************************************************************************\n */\n__STATIC __INLINE uint32_t co_read32p(void const *ptr32)\n{\n    uint16_t addr_l, addr_h;\n    addr_l = co_read16p(ptr32);\n    addr_h = co_read16p((uint8_t *)ptr32 + 2);\n    return ((uint32_t)addr_l | (uint32_t)addr_h << 16);\n}\n/**\n ****************************************************************************************\n * @brief Write a packed 32 bits word.\n * @param[in] ptr32 The address of the first byte of the 32 bits word.\n * @param[in] value The value to write.\n ****************************************************************************************\n */\n__STATIC __INLINE void co_write32p(void const *ptr32, uint32_t value)\n{\n    uint8_t *ptr=(uint8_t*)ptr32;\n\n    *ptr++ = (uint8_t)(value&0xff);\n    *ptr++ = (uint8_t)((value&0xff00)>>8);\n    *ptr++ = (uint8_t)((value&0xff0000)>>16);\n    *ptr = (uint8_t)((value&0xff000000)>>24);\n}\n\n/**\n ****************************************************************************************\n * @brief Write a packed 16 bits word.\n * @param[in] ptr16 The address of the first byte of the 16 bits word.\n * @param[in] value The value to write.\n ****************************************************************************************\n */\n__STATIC __INLINE void co_write16p(void const *ptr16, uint16_t value)\n{\n    uint8_t *ptr=(uint8_t*)ptr16;\n\n    *ptr++ = value&0xff;\n    *ptr = (value&0xff00)>>8;\n}\n\n#if RW_DEBUG\n/**\n ****************************************************************************************\n * @brief Convert bytes to hexadecimal string\n *\n * @param[out] dest      Pointer to the destination string (must be 2x longer than input table)\n * @param[in]  src       Pointer to the bytes table\n * @param[in]  nb_bytes  Number of bytes to display in the string\n ****************************************************************************************\n */\nvoid co_bytes_to_string(char* dest, uint8_t* src, uint8_t nb_bytes);\n#endif //RW_DEBUG\n\n/**\n ****************************************************************************************\n * @brief Compares two Bluetooth device addresses\n *\n * This function checks if the two bd address are equal.\n *\n * @param[in] bd_address1        Pointer on the first bd address to be compared.\n * @param[in] bd_address2        Pointer on the second bd address to be compared.\n *\n * @return result of the comparison (true: equal | false: different).\n ****************************************************************************************\n */\nbool co_bdaddr_compare(struct bd_addr const *bd_address1, struct bd_addr const *bd_address2);\n\n#if (BLE_EMB_PRESENT)\n/**\n ******************************************************************************\n * @brief Count the number of good channels in a LE map\n * @param[in]  map  Channel Map (bit fields for the 40 BT RF channels)\n * @return  Number of good channels\n ******************************************************************************\n */\nuint8_t co_nb_good_le_channels(const struct le_chnl_map* map);\n#endif //BLE_EMB_PRESENT\n\n#if (BT_EMB_PRESENT)\n\n/**\n ******************************************************************************\n * @brief Convert an duration in baseband slot to a duration in number of ticks.\n * @param[in]  slot_cnt  Duration in number of baseband slot\n * @return  Duration (in number of ticks).\n ******************************************************************************\n */\nuint32_t co_slot_to_duration(uint16_t slot_cnt);\n\n/**\n ******************************************************************************\n * @brief Count the number of good channels in a map\n * @param[in]  map  Channel Map (bit fields for the 79 BT RF channels)\n * @return  Number of good channels\n ******************************************************************************\n */\nuint8_t co_nb_good_channels(const struct chnl_map* map);\n\n#endif //BT_EMB_PRESENT\n\n/**\n ****************************************************************************************\n * @brief Pack parameters from a C structure to a packed buffer\n *\n * This function packs parameters according to a specific format. It takes care of the\n * endianess, padding, required by the compiler.\n *\n * Format strings are the mechanism used to specify the expected layout when packing and unpacking data. They are built\n * up from Format Characters, which specify the type of data being packed/unpacked.\n *     - B  : byte - 8bits value\n *     - H  : word - 16bits value\n *     - L  : long - 32-bits value\n *     - XXB: table of several bytes, where XX is the byte number, in decimal\n *\n * Example:   \"BBLH12BL\" => 1 byte | 1 byte | 1 long | 1 short | 12-bytes table | 1 long\n *\n * Note: the function works in the same buffer\n *\n * @param[out]     out         Output Data Buffer\n * @param[in]      in          Input Data Buffer\n * @param[out]     out_len     Output size of packed data (in bytes)\n * @param[in]      in_len      Input buffer size (in bytes)\n * @param[in]      format      Parameters format\n *\n * @return  Status of the packing operation\n *****************************************************************************************\n */\nenum CO_UTIL_PACK_STATUS co_util_pack(uint8_t* out, uint8_t* in, uint16_t* out_len, uint16_t in_len, const char* format);\n\n/**\n ****************************************************************************************\n * @brief Unpack parameters from an unpacked buffer to a C structure\n *\n * This function unpacks parameters according to a specific format. It takes care of the\n * endianess, padding, required by the compiler.\n *\n * Format strings are the mechanism used to specify the expected layout when packing and unpacking data. They are built\n * up from Format Characters, which specify the type of data being packed/unpacked.\n *     - B  : byte - 8bits value\n *     - H  : word - 16bits value\n *     - L  : long - 32-bits value\n *     - XXB: table of several bytes, where XX is the byte number, in decimal\n *\n * Example:   \"BBLH12BL\" => 1 byte | 1 byte | 1 long | 1 short | 12-bytes table | 1 long\n *\n * Note: the output buffer provided must be large enough to contain the unpacked data.\n * Note2: if a NULL output buffer is provided, the function does not copy the unpacked parameters. It still parses the\n *  format string and input buffer to return the number of unpacked bytes. Can be used to compute the expected unpacked\n *  buffer size.\n *\n * @param[out]    out         Unpacked parameters buffer\n * @param[in]     in          Packed parameters buffer\n * @param[inout]  out_len     Input: buffer size / Output: size of unpacked data (in bytes)\n * @param[in]     in_len      Size of the packed data (in bytes)\n * @param[in]     format      Parameters format\n *\n * @return  Status of the unpacking operation\n *****************************************************************************************\n */\nenum CO_UTIL_PACK_STATUS co_util_unpack(uint8_t* out, uint8_t* in, uint16_t* out_len, uint16_t in_len, const char* format);\n\n/// @} CO_UTILS\n\n#endif // _CO_UTILS_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/co_version.h",
    "content": "#ifndef _CO_VERSION_H_\n#define _CO_VERSION_H_\n/**\n ****************************************************************************************\n * @defgroup CO_VERSION Version Defines\n * @ingroup COMMON\n *\n * @brief Bluetooth Controller Version definitions.\n *\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"        // SW configuration options\n\n/// RWBT SW Major Version\n#define RWBT_SW_VERSION_MAJOR                   (RW_BT50_VERSION)\n/// RWBT SW Minor Version\n#define RWBT_SW_VERSION_MINOR                   0\n/// RWBT SW Build Version\n#define RWBT_SW_VERSION_BUILD                   3\n\n/// RWBT SW Major Version\n#define RWBT_SW_VERSION_SUB_BUILD               0\n\n\n/// @} CO_VERSION\n\n\n#endif // _CO_VERSION_H_\n"
  },
  {
    "path": "services/ble_stack/common/api/lePhone_rw_ble_error.txt",
    "content": "[RX]:\n04 3e 13 01 00 00 00 01 01 7e dd 73 45 f9 4c 20 00 00 00 d0 07 01 \n[BLE_HCI]: Func: HciProcessEvent, Line: 82  event: 62\n[BLE]: Func: MeHandleEvents, Line: 2458\n\n[BLE]: bridge_hci_ble_event line: 294 ++++\n\n3e 13 01 00 00 00 01 01 7e dd 73 45 f9 4c 20 00 00 00 d0 07 01 \n[BLE]: Func: bridge_hci_ble_event, Line: 313 len: 15\n[BLE]: Func: bridge_hci_ble_event, Line: 317 len: 13, code: 3e\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 19\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: bridge_hci_ble_event line: 341 ----\n\n[BLE_GAPM]: Func: gapm_hci_handler, Line: 400  msgid: 2052\n[BLE]: gapm_setup_conn line: 2120 ++++\n\n[BLE]: gapm_con_create line: 575 ++++\n\n[BLE]: gapm_get_requester line: 497 ++++\n\n[BLE_GAPM]: Func: gapm_get_requester, Line: 505  msg->src_id: 0\n[BLE]: gapm_get_requester line: 508 ----\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 16\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: l2cc_create line: 106 ++++\n\n[BLE]: l2cc_create line: 140 ----\n\n[BLE]: htpt_create line: 176 ++++\n\n[BLE]: htpt_create line: 182 ----\n\n[BLE]: gapm_con_create line: 624 ----\n\n[BLE]: gapm_update_air_op_state line: 1968 ++++\n\n[BLE]: gapm_update_adv_op_state line: 631 ++++\n\n[BLE_GAPM]: Func: gapm_update_adv_op_state, Line: 633  state: 13\n[BLE]: gapm_update_adv_op_state line: 783 ----\n\n[BLE]: gapm_send_complete_evt line: 518 ++++\n\n[BLE_GAPM]: Func: gapm_send_complete_evt, Line: 519  cmp_evt->operation: 13, op_type: 1\n[BLE]: gapm_get_requester line: 497 ++++\n\n[BLE_GAPM]: Func: gapm_get_requester, Line: 505  msg->src_id: 0\n[BLE]: gapm_get_requester line: 508 ----\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 2\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: gapm_operation_cleanup line: 132 ++++\n\n[BLE]: gapm_update_state line: 831 ++++\n\n[BLE_GAPM]: Func: gapm_update_state, Line: 833 old_state 0, operation: 1, busy: 0\n\n[BLE]: gapm_update_state line: 849 ----\n\n[BLE]: gapm_operation_cleanup line: 173 ----\n\n[BLE]: gapm_send_complete_evt line: 544 ----\n\n[BLE]: gapm_setup_conn line: 2162 ----\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 44\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: gapm_cmp_evt_handler line: 222 ++++\n\n[BLE_APP]: Func: gapm_cmp_evt_handler, Line: 224 param->operation: 13\n[BLE]: gapm_cmp_evt_handler line: 331 ----\n\n[BLE]: gapm_con_enable line: 632 ++++\n\n[BLE]: gapm_con_enable line: 641 ----\n\n[RX]:\n02 00 20 0b 00 07 00 04 00 10 01 00 ff ff 00 28 \n[BLE]: bridge_hcif_recv_acl line: 376 ++++\n\n[BLE_HCI]: Func: hci_acl_rx_data_received, Line: 1783 conhdl: 0, idx: 0\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 8\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: bridge_hcif_recv_acl line: 382 ----\n\n[BLE]: hci_ble_acl_data_rx_handler line: 507 ++++\n\n[BLE_L2C]: Func: hci_ble_acl_data_rx_handler, Line: 542 pb_flag: 2\n[BLE]: l2cc_pdu_header_check line: 1069 ++++\n\n00 20 0b 00 07 \n[BLE_L2C]: Func: l2cc_pdu_header_check, Line: 1103 cid: 11\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 74\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: hci_ble_acl_data_rx_handler line: 671 ----\n\n[BLE]: l2cc_pdu_recv_ind_handler line: 1168 ++++\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 74\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: l2cc_pdu_recv_ind_handler line: 1236 ++++\n\n[BLE]: l2cc_pdu_send_cmd_handler line: 221 ++++\n\n[BLE]: l2cm_tx_status line: 132 ++++\n\n[BLE]: l2cm_tx_status line: 154 ----\n\n[BLE]: l2cc_pdu_send_cmd_handler line: 249 ----\n\n[BLE]: l2cm_l2cap_tx_handler line: 50 ++++\n\n[BLE]: l2cc_data_send line: 353 ++++\n\n[BLE_L2C]: Func: l2cc_data_send, Line: 354 conidx: 0, nb_buffer: 6\n[BLE_L2C]: Func: l2cc_data_send, Line: 390 L2CC_PDU_SEND_CMD: 2577, pkt->id: 2577\n[BLE_L2C]: Func: l2cc_pdu_pack, Line: 440 p_pdu->chan_id: 0005, code: 1\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 6\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 8\n[BLE]: hci_send_2_controller line: 938 ++++\n\n[BLE]: hci_tl_send line: 1201 ++++\n\n[BLE]: hci_tx_trigger line: 1181 ++++\n\n[BLE]: hci_tx_start line: 835 ++++\n\n[TX2]:\n02 00 00 0e 00 0a 00 05 00 01 00 06 00 02 00 0b 00 00 00 \n[BLE_HCI]: Func: bridge_hcif_send_acl, Line: 409 ****** bytes_sent: 0 , bytes_to_send: 18******\n[BLE]: hci_tx_trigger line: 1190 ----\n\n[BLE]: l2cm_tx_status line: 132 ++++\n\n[BLE]: l2cm_tx_status line: 154 ----\n\n[BLE]: l2cc_data_send line: 612 ----\n\n[BLE]: l2cm_l2cap_tx_handler line: 74 ----\n\n[RX]:\n04 13 05 01 00 00 01 00 \n[BLE_HCI]: Func: HciProcessEvent, Line: 82  event: 19\n[BLE]: Func: HciProcessEvent, Line: 92\n\n[BLE]: bridge_hci_ble_event line: 294 ++++\n\n13 05 01 00 00 01 00 \n[BLE]: Func: bridge_hci_ble_event, Line: 313 len: 07\n[BLE]: Func: bridge_hci_ble_event, Line: 317 len: 05, code: 13\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 6\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: bridge_hci_ble_event line: 341 ----\n\n[BLE]: hci_nb_cmp_pkts_evt_handler line: 454 ++++\n\n[BLE]: hci_nb_cmp_pkts_evt_handler line: 478 ----\n\n[TX]:\n01 35 0c 05 01 00 00 01 00 \n[RX]:\n04 3e 0a 03 00 00 00 06 00 00 00 d0 07 \n[BLE_HCI]: Func: HciProcessEvent, Line: 82  event: 62\n[BLE]: Func: MeHandleEvents, Line: 2458\n\n[BLE]: bridge_hci_ble_event line: 294 ++++\n\n3e 0a 03 00 00 00 06 00 00 00 d0 07 \n[BLE]: Func: bridge_hci_ble_event, Line: 313 len: 0c\n[BLE]: Func: bridge_hci_ble_event, Line: 317 len: 0a, code: 3e\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 10\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: bridge_hci_ble_event line: 341 ----\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 6\n[BLE]: ke_msg_send line: 72 ++++\n\n[RX]:\n02 00 20 0b 00 07 00 04 00 10 01 00 ff ff 00 28 \n[BLE]: bridge_hcif_recv_acl line: 376 ++++\n\n[BLE_HCI]: Func: hci_acl_rx_data_received, Line: 1783 conhdl: 0, idx: 0\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 8\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: bridge_hcif_recv_acl line: 382 ----\n\n[BLE]: hci_ble_acl_data_rx_handler line: 507 ++++\n\n[BLE_L2C]: Func: hci_ble_acl_data_rx_handler, Line: 542 pb_flag: 2\n[BLE]: l2cc_pdu_header_check line: 1069 ++++\n\n00 20 0b 00 07 \n[BLE_L2C]: Func: l2cc_pdu_header_check, Line: 1103 cid: 11\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 74\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: hci_ble_acl_data_rx_handler line: 671 ----\n\n[BLE]: l2cc_pdu_recv_ind_handler line: 1168 ++++\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 74\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: l2cc_pdu_recv_ind_handler line: 1236 ++++\n\n[BLE]: l2cc_pdu_send_cmd_handler line: 221 ++++\n\n[BLE]: l2cm_tx_status line: 132 ++++\n\n[BLE]: l2cm_tx_status line: 154 ----\n\n[BLE]: l2cc_pdu_send_cmd_handler line: 249 ----\n\n[BLE]: l2cm_l2cap_tx_handler line: 50 ++++\n\n[BLE]: l2cc_data_send line: 353 ++++\n\n[BLE_L2C]: Func: l2cc_data_send, Line: 354 conidx: 0, nb_buffer: 6\n[BLE_L2C]: Func: l2cc_data_send, Line: 390 L2CC_PDU_SEND_CMD: 2577, pkt->id: 2577\n[BLE_L2C]: Func: l2cc_pdu_pack, Line: 440 p_pdu->chan_id: 0005, code: 1\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 6\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 8\n[BLE]: hci_send_2_controller line: 938 ++++\n\n[BLE]: hci_tl_send line: 1201 ++++\n\n[BLE]: hci_tx_trigger line: 1181 ++++\n\n[BLE]: hci_tx_start line: 835 ++++\n\n[TX2]:\n02 00 00 0e 00 0a 00 05 00 01 00 06 00 02 00 0b 00 00 00 \n[BLE_HCI]: Func: bridge_hcif_send_acl, Line: 409 ****** bytes_sent: 0 , bytes_to_send: 18******\n[BLE]: hci_tx_trigger line: 1190 ----\n\n[BLE]: l2cm_tx_status line: 132 ++++\n\n[BLE]: l2cm_tx_status line: 154 ----\n\n[BLE]: l2cc_data_send line: 612 ----\n\n[BLE]: l2cm_l2cap_tx_handler line: 74 ----\n\n[RX]:\n04 13 05 01 00 00 01 00 \n[BLE_HCI]: Func: HciProcessEvent, Line: 82  event: 19\n[BLE]: Func: HciProcessEvent, Line: 92\n\n[BLE]: bridge_hci_ble_event line: 294 ++++\n\n13 05 01 00 00 01 00 \n[BLE]: Func: bridge_hci_ble_event, Line: 313 len: 07\n[BLE]: Func: bridge_hci_ble_event, Line: 317 len: 05, code: 13\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 6\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: bridge_hci_ble_event line: 341 ----\n\n[BLE]: hci_nb_cmp_pkts_evt_handler line: 454 ++++\n\n[BLE]: hci_nb_cmp_pkts_evt_handler line: 478 ----\n\n[TX]:\n01 35 0c 05 01 00 00 01 00 \n[RX]:\n02 00 20 0b 00 07 00 04 00 10 01 00 ff ff 00 28 \n[BLE]: bridge_hcif_recv_acl line: 376 ++++\n\n[BLE_HCI]: Func: hci_acl_rx_data_received, Line: 1783 conhdl: 0, idx: 0\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 8\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: bridge_hcif_recv_acl line: 382 ----\n\n[BLE]: hci_ble_acl_data_rx_handler line: 507 ++++\n\n[BLE_L2C]: Func: hci_ble_acl_data_rx_handler, Line: 542 pb_flag: 2\n[BLE]: l2cc_pdu_header_check line: 1069 ++++\n\n00 20 0b 00 07 \n[BLE_L2C]: Func: l2cc_pdu_header_check, Line: 1103 cid: 11\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 74\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: hci_ble_acl_data_rx_handler line: 671 ----\n\n[BLE]: l2cc_pdu_recv_ind_handler line: 1168 ++++\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 74\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: l2cc_pdu_recv_ind_handler line: 1236 ++++\n\n[BLE]: l2cc_pdu_send_cmd_handler line: 221 ++++\n\n[BLE]: l2cm_tx_status line: 132 ++++\n\n[BLE]: l2cm_tx_status line: 154 ----\n\n[BLE]: l2cc_pdu_send_cmd_handler line: 249 ----\n\n[BLE]: l2cm_l2cap_tx_handler line: 50 ++++\n\n[BLE]: l2cc_data_send line: 353 ++++\n\n[BLE_L2C]: Func: l2cc_data_send, Line: 354 conidx: 0, nb_buffer: 6\n[BLE_L2C]: Func: l2cc_data_send, Line: 390 L2CC_PDU_SEND_CMD: 2577, pkt->id: 2577\n[BLE_L2C]: Func: l2cc_pdu_pack, Line: 440 p_pdu->chan_id: 0005, code: 1\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 6\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 8\n[BLE]: hci_send_2_controller line: 938 ++++\n\n[BLE]: hci_tl_send line: 1201 ++++\n\n[BLE]: hci_tx_trigger line: 1181 ++++\n\n[BLE]: hci_tx_start line: 835 ++++\n\n[TX2]:\n02 00 00 0e 00 0a 00 05 00 01 00 06 00 02 00 0b 00 00 00 \n[BLE_HCI]: Func: bridge_hcif_send_acl, Line: 409 ****** bytes_sent: 0 , bytes_to_send: 18******\n[BLE]: hci_tx_trigger line: 1190 ----\n\n[BLE]: l2cm_tx_status line: 132 ++++\n\n[BLE]: l2cm_tx_status line: 154 ----\n\n[BLE]: l2cc_data_send line: 612 ----\n\n[BLE]: l2cm_l2cap_tx_handler line: 74 ----\n\n[RX]:\n04 13 05 01 00 00 01 00 \n[BLE_HCI]: Func: HciProcessEvent, Line: 82  event: 19\n[BLE]: Func: HciProcessEvent, Line: 92\n\n[BLE]: bridge_hci_ble_event line: 294 ++++\n\n13 05 01 00 00 01 00 \n[BLE]: Func: bridge_hci_ble_event, Line: 313 len: 07\n[BLE]: Func: bridge_hci_ble_event, Line: 317 len: 05, code: 13\n[BLE]: Func: ke_msg_alloc, Line: 61  param_len: 6\n[BLE]: ke_msg_send line: 72 ++++\n\n[BLE]: bridge_hci_ble_event line: 341 ----\n\n[BLE]: hci_nb_cmp_pkts_evt_handler line: 454 ++++\n\n[BLE]: hci_nb_cmp_pkts_evt_handler line: 478 ----\n\n[TX]:\n01 35 0c 05 01 00 00 01 00 \n"
  },
  {
    "path": "services/ble_stack/dbg/api/dbg.h",
    "content": "#ifndef DBG_H_\n#define DBG_H_\n\n/**\n****************************************************************************************\n* @addtogroup DBG\n* @ingroup CONTROLLER\n* @brief Debug\n*\n* @{\n****************************************************************************************\n*/\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"     // stack configuration\n\n#include \"dbg_swdiag.h\"        // sw profiling definitions\n\n#include \"dbg_trc.h\"           // debug tracer definition\n\n/*\n * FUNCTION DECLARATION\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the BT Debug task\n *\n * This function initializes the the DBG task\n *\n ****************************************************************************************\n */\nvoid dbg_init(bool reset);\n\n/**\n ****************************************************************************************\n * @brief Send back to host status of platform reset request.\n *\n * @param status Reset error code\n *\n ****************************************************************************************\n */\nvoid dbg_platform_reset_complete(uint32_t error);\n\n///@} DBG\n\n#endif // DBG_H_\n"
  },
  {
    "path": "services/ble_stack/dbg/api/dbg_mwsgen.h",
    "content": "#ifndef DBG_MWSGEN_H_\n#define DBG_MWSGEN_H_\n\n/**\n ****************************************************************************************\n * @addtogroup DBGMWSGEN\n * @ingroup DBG\n * @brief Debug SW - MWS/WLAN Generator.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (RW_WLAN_COEX_TEST) || (RW_MWS_COEX_TEST)\n\n#include \"reg_mwsgen.h\"       // MWS Event Generator register functions\n\n/*\n * CONSTANT DEFINITIONS\n ****************************************************************************************\n */\n\n#if (RW_WLAN_COEX)\n/// WLAN coexistence disabled\n#define DBG_COEX_WLAN_DISABLED    0\n/// WLAN coexistence enabled\n#define DBG_COEX_WLAN_ENABLED     1\n#endif\n\n#if (RW_MWS_COEX)\n/// MWS coexistence disabled\n#define DBG_COEX_MWS_DISABLED     0\n/// MWS coexistence enabled\n#define DBG_COEX_MWS_ENABLED      1\n#endif\n\n/*\n * VARIABLE DECLARATION\n ****************************************************************************************\n */\n#if (RW_WLAN_COEX_TEST)\nextern uint32_t dbg_coex_scenario;\n#endif // RW_WLAN_COEX_TEST\n\n#if (RW_MWS_COEX_TEST)\nextern uint32_t dbg_coex_scenario;\n#endif // RW_MWS_COEX_TEST\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n#if (RW_MWS_COEX_TEST)\n/**\n ****************************************************************************************\n * @brief Set the scenario for the unitary testing.\n *\n * @param[in] scenario    Scenario type\n *\n * @return none\n *\n ****************************************************************************************\n */\nuint8_t dbg_mwscoex_scen_set(uint32_t scenario);\n\n/**\n ****************************************************************************************\n * @brief Initialize and configure MWS event generator registers to be in MWS mode.\n ****************************************************************************************\n */\nvoid dbg_mwsgen_init(void);\n\n/**\n ****************************************************************************************\n * @brief Configure MWS generator\n *\n * @param[in]  period       Period of the mws signal (us)\n * @param[in]  duty_cycle   Duration of the high level (us)\n * @param[in]  tx_act       Duration of the tx activity (us)\n * @param[in]  rx_act       Duration of the rx activity (us)\n *\n ****************************************************************************************\n */\nvoid dbg_mwsgen_config(uint32_t period, uint32_t duty_cycle, uint32_t tx_act, uint32_t rx_act);\n\n/**\n ****************************************************************************************\n * @brief Configure the WLAN COEX mode for BT.\n *\n * @param[in]  txmode\n * @param[in]  rxmode\n * @param[in]  txmsk\n * @param[in]  rxmsk\n * @param[in]  txfmsk\n * @param[in]  rxfmsk\n * @param[in]  scanfmsk\n * @param[in]  knudge\n *\n ****************************************************************************************\n */\nvoid dbg_mws_config(uint8_t txmode, uint8_t rxmode, uint8_t txmsk, uint8_t rxmsk, uint8_t txfms, uint8_t rxfmsk, uint8_t scanfmsk, uint8_t knudge);\n\n/**\n ****************************************************************************************\n * @brief Start the MWS signal generator.\n *\n ****************************************************************************************\n */\nvoid dbg_mwsgen_start(void);\n\n/**\n ****************************************************************************************\n * @brief Stop the MWS signal generator.\n *\n ****************************************************************************************\n */\nvoid dbg_mwsgen_stop(void);\n#endif // RW_MWS_COEX_TEST\n\n#if (RW_WLAN_COEX_TEST)\n/**\n ****************************************************************************************\n * @brief Set the scenario for the unitary testing.\n *\n * @param[in] scenario    Scenario type\n *\n * @return none\n *\n ****************************************************************************************\n */\n\nuint8_t dbg_wlcoex_scen_set(uint32_t scenario);\n\n/**\n ****************************************************************************************\n * @brief Initialize and configure MWS event generator registers to be in WLAN mode.\n ****************************************************************************************\n */\nvoid dbg_wlangen_init(void);\n\n/**\n ****************************************************************************************\n * @brief Set the period and duty cycle for the wlrxbsy signal.\n *\n * @param[in]  period       Period of the wlrxbsy signal (us)\n * @param[in]  duty_cycle   Duration of the high level (us)\n * @param[in]  tx_act       Duration of the tx activity (us)\n * @param[in]  rx_act       Duration of the rx activity (us)\n *\n ****************************************************************************************\n */\nvoid dbg_wlangen_config(uint32_t period, uint32_t duty_cycle, uint32_t tx_act, uint32_t rx_act);\n\n/**\n ****************************************************************************************\n * @brief Configure the WLAN COEX mode for BT.\n *\n * @param[in]  txmode\n * @param[in]  rxmode\n * @param[in]  txmsk\n * @param[in]  rxmsk\n * @param[in]  txthr\n * @param[in]  rxthr\n * @param[in]  pduration\n * @param[in]  pdelay\n *\n ****************************************************************************************\n */\nvoid dbg_wlan_config(uint8_t txmode, uint8_t rxmode, uint8_t txmsk, uint8_t rxmsk, uint8_t txthr, uint8_t rxthr, uint8_t pduration, uint8_t pdelay);\n\n/**\n ****************************************************************************************\n * @brief Start the wlrxbs signal generator.\n *\n ****************************************************************************************\n */\nvoid dbg_wlangen_start(void);\n\n/**\n ****************************************************************************************\n * @brief Stop the wlrxbs signal generator.\n *\n ****************************************************************************************\n */\nvoid dbg_wlangen_stop(void);\n#endif // RW_WLAN_COEX_TEST\n\n#endif // (RW_WLAN_COEX_TEST) || (RW_MWS_COEX_TEST)\n\n/// @} DBGMWSGEN\n\n#endif // DBG_MWSGEN_H_\n"
  },
  {
    "path": "services/ble_stack/dbg/api/dbg_swdiag.h",
    "content": "#ifndef DBG_SWDIAG_H_\n#define DBG_SWDIAG_H_\n\n/**\n ****************************************************************************************\n * @addtogroup DBGSWDIAG Diag\n * @ingroup DBG\n * @brief Debug SW profiling module\n *\n * SW profiling is a debug feature that provides user a configurable way to analyze SW execution performance or\n * behavior, such as timings, state machines, bit field values and so on.\n * It manages the SW state representation over HW digital diagnostic signals (diagports), from the signals selection to\n * the toggling of real HW signals.\n * HW signals representing the SW execution could then be watched on a logic analyzer in parallel with HW internal\n * signals, that could be very useful for low level debugging.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"       // stack configuration\n\n#if (!RW_SWDIAG)\n\n/// Macro used to set a SW diag to specific value\n#define DBG_SWDIAG(bank , field , value)\n\n#else //RW_SWDIAG\n\n#if (BT_EMB_PRESENT) // TODO not fully agree with this\n#include \"reg_btcore.h\"          // bt core registers\n#elif (BLE_EMB_PRESENT)\n#include \"reg_blecore.h\"         // ble core registers\n#endif //BT_EMB_PRESENT / BLE_EMB_PRESENT\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Number of HW diagport banks\n#define DBG_SWDIAG_NB_HW_BANKS        4\n\n/// Undefined configuration\n#define DBG_SWDIAG_UNDEFINED        0xFF\n\n\n/*\n * MACROS\n ****************************************************************************************\n */\n#if (BT_EMB_PRESENT)\n#define SW_DIAG_SET     bt_swprofiling_set\n#define SW_DIAG_GET     bt_swprofiling_get\n#elif (BLE_EMB_PRESENT)\n#define SW_DIAG_SET     ble_swprofiling_set\n#define SW_DIAG_GET     ble_swprofiling_get\n#endif //BT_EMB_PRESENT / BLE_EMB_PRESENT\n\n/// Macro used to set a SW diag to specific value\n#define DBG_SWDIAG(bank , field , value)                                              \\\n    if(sw_to_hw[DBG_SWDIAG_##bank] != DBG_SWDIAG_UNDEFINED)                           \\\n    {                                                                                 \\\n        SW_DIAG_SET( ((SW_DIAG_GET()) & (~(DBG_SWDIAG_##bank##_##field##_MASK << (8 * sw_to_hw[DBG_SWDIAG_##bank])))) | ((((value << DBG_SWDIAG_##bank##_##field##_OFFSET) & DBG_SWDIAG_##bank##_##field##_MASK) << (8*sw_to_hw[DBG_SWDIAG_##bank])))  );      \\\n    }\n\n\n/*\n * SW DIAGS MAP\n ****************************************************************************************\n */\n\nenum dbg_swdiag\n{\n/**\n******************************************************************************************\n* @brief BANK 0 : BT_ISR\n******************************************************************************************\n*/\n    DBG_SWDIAG_BT_ISR                          = 0,\n\n    DBG_SWDIAG_BT_ISR_RX_OFFSET                = 0,\n    DBG_SWDIAG_BT_ISR_RX_MASK                  = 0x01,\n\n    DBG_SWDIAG_BT_ISR_FRAME_OFFSET             = 1,\n    DBG_SWDIAG_BT_ISR_FRAME_MASK               = 0x02,\n\n    DBG_SWDIAG_BT_ISR_SKET_OFFSET              = 3,\n    DBG_SWDIAG_BT_ISR_SKET_MASK                = 0x04,\n\n\n/**\n******************************************************************************************\n* @brief BANK 1 : SLEEP\n******************************************************************************************\n*/\n    DBG_SWDIAG_SLEEP                           = 1,\n\n    DBG_SWDIAG_SLEEP_SLEEP_OFFSET              = 0,\n    DBG_SWDIAG_SLEEP_SLEEP_MASK                = 0x01,\n\n    DBG_SWDIAG_SLEEP_FUNC_OFFSET               = 1,\n    DBG_SWDIAG_SLEEP_FUNC_MASK                 = 0x02,\n\n    DBG_SWDIAG_SLEEP_ALGO_OFFSET               = 4,\n    DBG_SWDIAG_SLEEP_ALGO_MASK                 = 0xF0,\n\n//    DBG_SWDIAG_SLEEP_PREVENT_OFFSET            = 4,\n//    DBG_SWDIAG_SLEEP_PREVENT_MASK              = 0xF0,\n\n\n/**\n******************************************************************************************\n* @brief BANK 2 : ISR\n******************************************************************************************\n*/\n    DBG_SWDIAG_ISR                             = 2,\n\n    DBG_SWDIAG_ISR_UART_OFFSET                 = 0,\n    DBG_SWDIAG_ISR_UART_MASK                   = 0x01,\n\n    DBG_SWDIAG_ISR_BT_OFFSET                   = 1,\n    DBG_SWDIAG_ISR_BT_MASK                     = 0x02,\n\n    DBG_SWDIAG_ISR_PS2_OFFSET                  = 1,\n    DBG_SWDIAG_ISR_PS2_MASK                    = 0x02,\n\n    DBG_SWDIAG_ISR_BLE_OFFSET                  = 2,\n    DBG_SWDIAG_ISR_BLE_MASK                    = 0x04,\n\n    DBG_SWDIAG_ISR_RESERVED_OFFSET              = 3,\n    DBG_SWDIAG_ISR_RESERVED_MASK                = 0x08,\n\n    DBG_SWDIAG_ISR_GPIO_OFFSET                 = 4,\n    DBG_SWDIAG_ISR_GPIO_MASK                   = 0x10,\n\n    DBG_SWDIAG_ISR_RTC0_OFFSET                 = 5,\n    DBG_SWDIAG_ISR_RTC0_MASK                   = 0x20,\n\n    DBG_SWDIAG_ISR_SPI_OFFSET                  = 6,\n    DBG_SWDIAG_ISR_SPI_MASK                    = 0x40,\n\n    DBG_SWDIAG_ISR_WFI_OFFSET                  = 7,\n    DBG_SWDIAG_ISR_WFI_MASK                    = 0x80,\n\n\n/**\n******************************************************************************************\n* @brief BANK 3 : BLEISR\n******************************************************************************************\n*/\n    DBG_SWDIAG_BLE_ISR                         = 3,\n\n    DBG_SWDIAG_BLE_ISR_RXINT_OFFSET            = 0,\n    DBG_SWDIAG_BLE_ISR_RXINT_MASK              = 0x01,\n\n    DBG_SWDIAG_BLE_ISR_TXINT_OFFSET            = 1,\n    DBG_SWDIAG_BLE_ISR_TXINT_MASK              = 0x02,\n\n    DBG_SWDIAG_BLE_ISR_EVENTINT_OFFSET         = 2,\n    DBG_SWDIAG_BLE_ISR_EVENTINT_MASK           = 0x04,\n\n    DBG_SWDIAG_BLE_ISR_EVENTAPFMINT_OFFSET     = 3,\n    DBG_SWDIAG_BLE_ISR_EVENTAPFMINT_MASK       = 0x08,\n\n    DBG_SWDIAG_BLE_ISR_ERRORINT_OFFSET         = 4,\n    DBG_SWDIAG_BLE_ISR_ERRORINT_MASK           = 0x10,\n\n    DBG_SWDIAG_BLE_ISR_AUDIO0INT_OFFSET        = 5,\n    DBG_SWDIAG_BLE_ISR_AUDIO0INT_MASK          = 0x20,\n\n    DBG_SWDIAG_BLE_ISR_AUDIO1INT_OFFSET        = 6,\n    DBG_SWDIAG_BLE_ISR_AUDIO1INT_MASK          = 0x40,\n\n    DBG_SWDIAG_BLE_ISR_AUDIO2INT_OFFSET        = 7,\n    DBG_SWDIAG_BLE_ISR_AUDIO2INT_MASK          = 0x80,\n\n\n\n/**\n******************************************************************************************\n* @brief BANK 4 : FLASH\n******************************************************************************************\n*/\n    DBG_SWDIAG_FLASH                           = 4,\n\n    DBG_SWDIAG_FLASH_STATE_OFFSET              = 0,\n    DBG_SWDIAG_FLASH_STATE_MASK                = 0x07,\n\n    DBG_SWDIAG_FLASH_SUBSTATE_OFFSET           = 3,\n    DBG_SWDIAG_FLASH_SUBSTATE_MASK             = 0x38,\n\n    DBG_SWDIAG_FLASH_MANAGE_OFFSET             = 6,\n    DBG_SWDIAG_FLASH_MANAGE_MASK               = 0x40,\n\n    DBG_SWDIAG_FLASH_CALLBACK_OFFSET           = 7,\n    DBG_SWDIAG_FLASH_CALLBACK_MASK             = 0x80,\n\n/**\n******************************************************************************************\n* @brief BANK 5 : Reserved\n******************************************************************************************\n*/\n\n\n\n/**\n******************************************************************************************\n* @brief BANK 6 : Event execution overview.\n******************************************************************************************\n*/\n    DBG_SWDIAG_EVT                         = 6,\n\n    DBG_SWDIAG_EVT_BLE_SCHEDULE_OFFSET     = 0,\n    DBG_SWDIAG_EVT_BLE_SCHEDULE_MASK       = 0x01,\n\n    DBG_SWDIAG_EVT_BLE_RX_OFFSET           = 1,\n    DBG_SWDIAG_EVT_BLE_RX_MASK             = 0x02,\n\n    DBG_SWDIAG_EVT_BLE_END_OFFSET          = 2,\n    DBG_SWDIAG_EVT_BLE_END_MASK            = 0x04,\n\n    DBG_SWDIAG_EVT_BLE_RESTART_OFFSET      = 3,\n    DBG_SWDIAG_EVT_BLE_RESTART_MASK        = 0x08,\n\n    DBG_SWDIAG_EVT_BLE_PROG_OFFSET         = 4,\n    DBG_SWDIAG_EVT_BLE_PROG_MASK           = 0x10,\n\n    DBG_SWDIAG_EVT_BLE_CRYPT_OFFSET        = 5,\n    DBG_SWDIAG_EVT_BLE_CRYPT_MASK          = 0x20,\n\n    DBG_SWDIAG_EVT_TIMER_OFFSET            = 6,\n    DBG_SWDIAG_EVT_TIMER_MASK              = 0x40,\n\n    DBG_SWDIAG_EVT_MESSAGE_OFFSET          = 7,\n    DBG_SWDIAG_EVT_MESSAGE_MASK            = 0x80,\n\n\n/**\n******************************************************************************************\n* @brief BANK 8 : AFH\n******************************************************************************************\n*/\n    DBG_SWDIAG_AFH                               = 8,\n\n    DBG_SWDIAG_AFH_TO_OFFSET                     = 0,\n    DBG_SWDIAG_AFH_TO_MASK                       = 0x01,\n\n    DBG_SWDIAG_AFH_LMP_TX_OFFSET                 = 1,\n    DBG_SWDIAG_AFH_LMP_TX_MASK                   = 0x02,\n\n    DBG_SWDIAG_AFH_CLASS_RX_OFFSET               = 2,\n    DBG_SWDIAG_AFH_CLASS_RX_MASK                 = 0x04,\n\n    DBG_SWDIAG_AFH_HOST_OFFSET                   = 3,\n    DBG_SWDIAG_AFH_HOST_MASK                     = 0x08,\n\n    DBG_SWDIAG_AFH_REPORT_TO_OFFSET              = 4,\n    DBG_SWDIAG_AFH_REPORT_TO_MASK                = 0x10,\n\n    DBG_SWDIAG_AFH_HSSI_OFFSET                   = 5,\n    DBG_SWDIAG_AFH_HSSI_MASK                     = 0x20,\n\n    DBG_SWDIAG_AFH_CFM_OFFSET                    = 6,\n    DBG_SWDIAG_AFH_CFM_MASK                      = 0x40,\n\n    DBG_SWDIAG_AFH_LMP_RX_OFFSET                 = 7,\n    DBG_SWDIAG_AFH_LMP_RX_MASK                   = 0x80,\n\n\n/**\n******************************************************************************************\n* @brief BANK 9 : SWITCH\n******************************************************************************************\n*/\n    DBG_SWDIAG_SWITCH                            = 9,\n\n    DBG_SWDIAG_SWITCH_LOOP_OFFSET                = 0,\n    DBG_SWDIAG_SWITCH_LOOP_MASK                  = 0x01,\n\n    DBG_SWDIAG_SWITCH_SM_OFFSET                  = 1,\n    DBG_SWDIAG_SWITCH_SM_MASK                    = 0x06,\n\n    DBG_SWDIAG_SWITCH_RSW_FAIL_OFFSET            = 3,\n    DBG_SWDIAG_SWITCH_RSW_FAIL_MASK              = 0x08,\n\n\n/**\n******************************************************************************************\n* @brief BANK 11 : VALUE8\n******************************************************************************************\n*/\n    DBG_SWDIAG_VALUE8                            = 11,\n\n    DBG_SWDIAG_VALUE8_VALUE_OFFSET               = 0,\n    DBG_SWDIAG_VALUE8_VALUE_MASK                 = 0xFF,\n\n/**\n******************************************************************************************\n* @brief BANK 12 : VALUE16\n******************************************************************************************\n*/\n    DBG_SWDIAG_VALUE16                           = 12,\n\n    DBG_SWDIAG_VALUE16_VALUE_OFFSET              = 0,\n    DBG_SWDIAG_VALUE16_VALUE_MASK                = 0xFF,\n\n\n/**\n******************************************************************************************\n* @brief BANK 13 : SNIFF\n******************************************************************************************\n*/\n    DBG_SWDIAG_SNIFF                             = 13,\n\n    DBG_SWDIAG_SNIFF_EVT_START_OFFSET            = 0,\n    DBG_SWDIAG_SNIFF_EVT_START_MASK              = 0x01,\n\n    DBG_SWDIAG_SNIFF_EVT_CANCELED_OFFSET         = 1,\n    DBG_SWDIAG_SNIFF_EVT_CANCELED_MASK           = 0x02,\n\n    DBG_SWDIAG_SNIFF_FRM_ISR_OFFSET              = 2,\n    DBG_SWDIAG_SNIFF_FRM_ISR_MASK                = 0x04,\n\n    DBG_SWDIAG_SNIFF_RX_ISR_OFFSET               = 3,\n    DBG_SWDIAG_SNIFF_RX_ISR_MASK                 = 0x08,\n\n    DBG_SWDIAG_SNIFF_SCHED_OFFSET                = 4,\n    DBG_SWDIAG_SNIFF_SCHED_MASK                  = 0x10,\n\n\n/**\n******************************************************************************************\n* @brief BANK 14 : SCO\n******************************************************************************************\n*/\n    DBG_SWDIAG_SCO                               = 14,\n\n    DBG_SWDIAG_SCO_EVT_START_OFFSET              = 0,\n    DBG_SWDIAG_SCO_EVT_START_MASK                = 0x01,\n\n    DBG_SWDIAG_SCO_EVT_STOP_OFFSET               = 1,\n    DBG_SWDIAG_SCO_EVT_STOP_MASK                 = 0x02,\n\n    DBG_SWDIAG_SCO_EVT_CANCELED_OFFSET           = 2,\n    DBG_SWDIAG_SCO_EVT_CANCELED_MASK             = 0x04,\n\n    DBG_SWDIAG_SCO_FRM_ISR_OFFSET                = 3,\n    DBG_SWDIAG_SCO_FRM_ISR_MASK                  = 0x08,\n\n    DBG_SWDIAG_SCO_RESCHED_OFFSET                = 4,\n    DBG_SWDIAG_SCO_RESCHED_MASK                  = 0x10,\n\n    DBG_SWDIAG_SCO_UPDATE_OFFSET                 = 5,\n    DBG_SWDIAG_SCO_UPDATE_MASK                   = 0x60,\n\n    DBG_SWDIAG_SCO_AUDIO_ISR_OFFSET              = 7,\n    DBG_SWDIAG_SCO_AUDIO_ISR_MASK                = 0x80,\n\n\n/**\n******************************************************************************************\n* @brief BANK 15 : CHNL_ASSESS (NB_CHNL)\n******************************************************************************************\n*/\n    DBG_SWDIAG_CHNL_ASSESS                       = 15,\n\n    DBG_SWDIAG_CHNL_ASSESS_NB_CHNL_OFFSET        = 0,\n    DBG_SWDIAG_CHNL_ASSESS_NB_CHNL_MASK          = 0x3F,\n\n    DBG_SWDIAG_CHNL_ASSESS_REM_CHNL_OFFSET       = 6,\n    DBG_SWDIAG_CHNL_ASSESS_REM_CHNL_MASK         = 0x40,\n\n    DBG_SWDIAG_CHNL_ASSESS_ADD_CHNL_OFFSET       = 7,\n    DBG_SWDIAG_CHNL_ASSESS_ADD_CHNL_MASK         = 0x80,\n\n/**\n******************************************************************************************\n* @brief BANK 16 : ASSESS_MECH\n******************************************************************************************\n*/\n    DBG_SWDIAG_ASSESS_MECH                       = 16,\n\n    DBG_SWDIAG_ASSESS_MECH_ATIMER_OFFSET         = 0,\n    DBG_SWDIAG_ASSESS_MECH_ATIMER_MASK           = 0x01,\n\n    DBG_SWDIAG_ASSESS_MECH_RTIMER_OFFSET         = 1,\n    DBG_SWDIAG_ASSESS_MECH_RTIMER_MASK           = 0x02,\n\n    DBG_SWDIAG_ASSESS_MECH_BAD_PKT_OFFSET        = 2,\n    DBG_SWDIAG_ASSESS_MECH_BAD_PKT_MASK          = 0x04,\n\n    DBG_SWDIAG_ASSESS_MECH_SYNC_ERR_OFFSET       = 3,\n    DBG_SWDIAG_ASSESS_MECH_SYNC_ERR_MASK         = 0x08,\n\n/**\n******************************************************************************************\n* @brief BANK 17 : PAGE\n******************************************************************************************\n*/\n    DBG_SWDIAG_PAGE                              = 17,\n\n    DBG_SWDIAG_PAGE_PSCAN_EVT_START_OFFSET       = 0,\n    DBG_SWDIAG_PAGE_PSCAN_EVT_START_MASK         = 0x01,\n\n    DBG_SWDIAG_PAGE_PSCAN_EVT_CANCELED_OFFSET    = 1,\n    DBG_SWDIAG_PAGE_PSCAN_EVT_CANCELED_MASK      = 0x02,\n\n    DBG_SWDIAG_PAGE_PSCAN_FRM_ISR_OFFSET         = 2,\n    DBG_SWDIAG_PAGE_PSCAN_FRM_ISR_MASK           = 0x04,\n\n    DBG_SWDIAG_PAGE_PSCAN_KE_EVT_OFFSET          = 3,\n    DBG_SWDIAG_PAGE_PSCAN_KE_EVT_MASK            = 0x08,\n\n    DBG_SWDIAG_PAGE_PAGE_EVT_START_OFFSET        = 4,\n    DBG_SWDIAG_PAGE_PAGE_EVT_START_MASK          = 0x10,\n\n    DBG_SWDIAG_PAGE_PAGE_EVT_CANCELED_OFFSET     = 5,\n    DBG_SWDIAG_PAGE_PAGE_EVT_CANCELED_MASK       = 0x20,\n\n    DBG_SWDIAG_PAGE_PAGE_FRM_ISR_OFFSET          = 6,\n    DBG_SWDIAG_PAGE_PAGE_FRM_ISR_MASK            = 0x40,\n\n    DBG_SWDIAG_PAGE_PAGE_STEP_OFFSET             = 7,\n    DBG_SWDIAG_PAGE_PAGE_STEP_MASK               = 0x80,\n\n/**\n******************************************************************************************\n* @brief BANK 18 : INQ\n******************************************************************************************\n*/\n    DBG_SWDIAG_INQ                               = 18,\n\n    DBG_SWDIAG_INQ_ISCAN_EVT_START_OFFSET        = 0,\n    DBG_SWDIAG_INQ_ISCAN_EVT_START_MASK          = 0x01,\n\n    DBG_SWDIAG_INQ_ISCAN_EVT_CANCELED_OFFSET     = 1,\n    DBG_SWDIAG_INQ_ISCAN_EVT_CANCELED_MASK       = 0x02,\n\n    DBG_SWDIAG_INQ_ISCAN_FRM_ISR_OFFSET          = 2,\n    DBG_SWDIAG_INQ_ISCAN_FRM_ISR_MASK            = 0x04,\n\n    DBG_SWDIAG_INQ_INQ_EVT_START_OFFSET          = 3,\n    DBG_SWDIAG_INQ_INQ_EVT_START_MASK            = 0x08,\n\n    DBG_SWDIAG_INQ_INQ_EVT_CANCELED_OFFSET       = 4,\n    DBG_SWDIAG_INQ_INQ_EVT_CANCELED_MASK         = 0x10,\n\n    DBG_SWDIAG_INQ_INQ_FRM_ISR_OFFSET            = 5,\n    DBG_SWDIAG_INQ_INQ_FRM_ISR_MASK              = 0x20,\n\n/**\n******************************************************************************************\n* @brief BANK 19 : ACL\n******************************************************************************************\n*/\n    DBG_SWDIAG_ACL                               = 19,\n\n    DBG_SWDIAG_ACL_EVT_START_OFFSET              = 0,\n    DBG_SWDIAG_ACL_EVT_START_MASK                = 0x01,\n\n    DBG_SWDIAG_ACL_EVT_STOP_OFFSET               = 1,\n    DBG_SWDIAG_ACL_EVT_STOP_MASK                 = 0x02,\n\n    DBG_SWDIAG_ACL_EVT_CANCELED_OFFSET           = 2,\n    DBG_SWDIAG_ACL_EVT_CANCELED_MASK             = 0x04,\n\n    DBG_SWDIAG_ACL_FRM_ISR_OFFSET                = 3,\n    DBG_SWDIAG_ACL_FRM_ISR_MASK                  = 0x08,\n\n    DBG_SWDIAG_ACL_CLK_ISR_OFFSET                = 4,\n    DBG_SWDIAG_ACL_CLK_ISR_MASK                  = 0x10,\n\n    DBG_SWDIAG_ACL_PROG_EN_OFFSET                = 5,\n    DBG_SWDIAG_ACL_PROG_EN_MASK                  = 0x20,\n\n    DBG_SWDIAG_ACL_SKET_ISR_OFFSET               = 6,\n    DBG_SWDIAG_ACL_SKET_ISR_MASK                 = 0x40,\n\n    DBG_SWDIAG_ACL_PARITY_OFFSET                 = 7,\n    DBG_SWDIAG_ACL_PARITY_MASK                   = 0x80,\n\n/**\n******************************************************************************************\n* @brief BANK 20 : RSW\n******************************************************************************************\n*/\n    DBG_SWDIAG_RSW                               = 20,\n\n    DBG_SWDIAG_RSW_EVT_START_OFFSET              = 0,\n    DBG_SWDIAG_RSW_EVT_START_MASK                = 0x01,\n\n    DBG_SWDIAG_RSW_EVT_CANCELED_OFFSET           = 1,\n    DBG_SWDIAG_RSW_EVT_CANCELED_MASK             = 0x02,\n\n    DBG_SWDIAG_RSW_FRM_ISR_OFFSET                = 2,\n    DBG_SWDIAG_RSW_FRM_ISR_MASK                  = 0x04,\n\n    DBG_SWDIAG_RSW_STEP_OFFSET                   = 3,\n    DBG_SWDIAG_RSW_STEP_MASK                     = 0x08,\n\n    DBG_SWDIAG_RSW_TX_SLOTOFF_OFFSET             = 4,\n    DBG_SWDIAG_RSW_TX_SLOTOFF_MASK               = 0x10,\n\n    DBG_SWDIAG_RSW_TX_PARITY_OFFSET              = 5,\n    DBG_SWDIAG_RSW_TX_PARITY_MASK                = 0x20,\n\n    DBG_SWDIAG_RSW_TDD_PARITY_OFFSET             = 6,\n    DBG_SWDIAG_RSW_TDD_PARITY_MASK               = 0x40,\n\n/**\n******************************************************************************************\n* @brief BANK 21 : TX\n******************************************************************************************\n*/\n    DBG_SWDIAG_TX                                = 21,\n\n    DBG_SWDIAG_TX_LMP_TX_OFFSET                  = 0,\n    DBG_SWDIAG_TX_LMP_TX_MASK                    = 0x01,\n\n    DBG_SWDIAG_TX_ACL_TX_OFFSET                  = 1,\n    DBG_SWDIAG_TX_ACL_TX_MASK                    = 0x02,\n\n    DBG_SWDIAG_TX_SW_IDX_OFFSET                  = 2,\n    DBG_SWDIAG_TX_SW_IDX_MASK                    = 0x04,\n\n    DBG_SWDIAG_TX_HW_IDX_OFFSET                  = 3,\n    DBG_SWDIAG_TX_HW_IDX_MASK                    = 0x08,\n\n    DBG_SWDIAG_TX_TX_CNT_OFFSET                  = 4,\n    DBG_SWDIAG_TX_TX_CNT_MASK                    = 0x30,\n\n/**\n******************************************************************************************\n* @brief BANK 22 : DATA\n******************************************************************************************\n*/\n    DBG_SWDIAG_DATA                              = 22,\n\n    DBG_SWDIAG_DATA_LMP_TX_OFFSET                = 0,\n    DBG_SWDIAG_DATA_LMP_TX_MASK                  = 0x01,\n\n    DBG_SWDIAG_DATA_ACL_TX_OFFSET                = 1,\n    DBG_SWDIAG_DATA_ACL_TX_MASK                  = 0x02,\n\n    DBG_SWDIAG_DATA_LMP_RX_OFFSET                = 2,\n    DBG_SWDIAG_DATA_LMP_RX_MASK                  = 0x04,\n\n    DBG_SWDIAG_DATA_ACL_RX_OFFSET                = 3,\n    DBG_SWDIAG_DATA_ACL_RX_MASK                  = 0x08,\n\n    DBG_SWDIAG_DATA_LMP_ACK_OFFSET               = 4,\n    DBG_SWDIAG_DATA_LMP_ACK_MASK                 = 0x10,\n\n    DBG_SWDIAG_DATA_ACL_ACK_OFFSET               = 5,\n    DBG_SWDIAG_DATA_ACL_ACK_MASK                 = 0x20,\n\n    /**\n    ******************************************************************************************\n    * @brief BANK 23 : ECDH\n    ******************************************************************************************\n    */\n    DBG_SWDIAG_ECDH                              = 23,\n\n    DBG_SWDIAG_ECDH_BUSY_OFFSET                  = 0,\n    DBG_SWDIAG_ECDH_BUSY_MASK                    = 0x01,\n\n    DBG_SWDIAG_ECDH_COMPUTE_OFFSET               = 1,\n    DBG_SWDIAG_ECDH_COMPUTE_MASK                 = 0x02,\n\n    DBG_SWDIAG_ECDH_MULT_OFFSET                  = 2,\n    DBG_SWDIAG_ECDH_MULT_MASK                    = 0x04,\n\n    DBG_SWDIAG_ECDH_END_OFFSET                   = 3,\n    DBG_SWDIAG_ECDH_END_MASK                     = 0x08,\n\n    DBG_SWDIAG_ECDH_INV_OFFSET                   = 4,\n    DBG_SWDIAG_ECDH_INV_MASK                     = 0x10,\n\n    /**\n     ******************************************************************************************\n     * @brief BANK 24 : PCA\n     ******************************************************************************************\n     */\n    DBG_SWDIAG_PCA                               = 24,\n\n    DBG_SWDIAG_PCA_FRAME_SYNC_INT_OFFSET         = 0,\n    DBG_SWDIAG_PCA_FRAME_SYNC_INT_MASK           = 0x01,\n\n    DBG_SWDIAG_PCA_MTOFF_LT_INT_OFFSET           = 1,\n    DBG_SWDIAG_PCA_MTOFF_LT_INT_MASK             = 0x02,\n\n    DBG_SWDIAG_PCA_SLOT_INT_OFFSET               = 2,\n    DBG_SWDIAG_PCA_SLOT_INT_MASK                 = 0x04,\n\n    DBG_SWDIAG_PCA_COARSE_CLK_ADJ_OFFSET         = 3,\n    DBG_SWDIAG_PCA_COARSE_CLK_ADJ_MASK           = 0x08,\n\n    DBG_SWDIAG_PCA_EVT_START_OFFSET              = 4,\n    DBG_SWDIAG_PCA_EVT_START_MASK                = 0x10,\n\n    DBG_SWDIAG_PCA_EVT_CANCELED_OFFSET           = 5,\n    DBG_SWDIAG_PCA_EVT_CANCELED_MASK             = 0x20,\n\n    DBG_SWDIAG_PCA_ALARM_INSTANT_OFFSET          = 6,\n    DBG_SWDIAG_PCA_ALARM_INSTANT_MASK            = 0x40,\n\n    DBG_SWDIAG_PCA_CLK_DRAG_OFFSET               = 7,\n    DBG_SWDIAG_PCA_CLK_DRAG_MASK                 = 0x80,\n\n    /**\n     ******************************************************************************************\n     * @brief BANK 25 : BCST\n     ******************************************************************************************\n     */\n    DBG_SWDIAG_BCST                              = 25,\n\n    DBG_SWDIAG_BCST_FRM_ISR_OFFSET               = 0,\n    DBG_SWDIAG_BCST_FRM_ISR_MASK                 = 0x01,\n\n    DBG_SWDIAG_BCST_EVT_START_OFFSET             = 1,\n    DBG_SWDIAG_BCST_EVT_START_MASK               = 0x02,\n\n    DBG_SWDIAG_BCST_SKET_ISR_OFFSET              = 2,\n    DBG_SWDIAG_BCST_SKET_ISR_MASK                = 0x04,\n\n    DBG_SWDIAG_BCST_EVT_CANCELED_OFFSET          = 3,\n    DBG_SWDIAG_BCST_EVT_CANCELED_MASK            = 0x08,\n\n    DBG_SWDIAG_BCST_ACL_TX_OFFSET                = 4,\n    DBG_SWDIAG_BCST_ACL_TX_MASK                  = 0x10,\n\n    DBG_SWDIAG_BCST_ACL_ACK_OFFSET               = 5,\n    DBG_SWDIAG_BCST_ACL_ACK_MASK                 = 0x20,\n\n    DBG_SWDIAG_BCST_LMP_TX_OFFSET                = 6,\n    DBG_SWDIAG_BCST_LMP_TX_MASK                  = 0x40,\n\n    DBG_SWDIAG_BCST_LMP_ACK_OFFSET               = 7,\n    DBG_SWDIAG_BCST_LMP_ACK_MASK                 = 0x80,\n\n\n\n    /**\n    ******************************************************************************************\n    * @brief IPISR - 2\n    ******************************************************************************************\n    */\n    DBG_SWDIAG_IP_ISR                          = 26,\n\n    DBG_SWDIAG_IP_ISR_CLKNINT_OFFSET           = 0,\n    DBG_SWDIAG_IP_ISR_CLKNINT_MASK             = 0x01,\n\n    DBG_SWDIAG_IP_ISR_FINETGTIMINT_OFFSET      = 1,\n    DBG_SWDIAG_IP_ISR_FINETGTIMINT_MASK        = 0x02,\n\n    DBG_SWDIAG_IP_ISR_GROSSTGTIMINT_OFFSET     = 2,\n    DBG_SWDIAG_IP_ISR_GROSSTGTIMINT_MASK       = 0x04,\n\n    DBG_SWDIAG_IP_ISR_SLPINT_OFFSET            = 3,\n    DBG_SWDIAG_IP_ISR_SLPINT_MASK              = 0x08,\n\n    DBG_SWDIAG_IP_ISR_CRYPTINT_OFFSET          = 4,\n    DBG_SWDIAG_IP_ISR_CRYPTINT_MASK            = 0x10,\n\n    DBG_SWDIAG_IP_ISR_SWINT_OFFSET             = 5,\n    DBG_SWDIAG_IP_ISR_SWINT_MASK               = 0x20,\n\n    /**\n    ******************************************************************************************\n    * @brief RSA Algorithm\n    ******************************************************************************************\n    */\n\n    DBG_SWDIAG_RSA                              = 27,\n\n    DBG_SWDIAG_RSA_BUSY_OFFSET                  = 0,\n    DBG_SWDIAG_RSA_BUSY_MASK                    = 0x01,\n\n    DBG_SWDIAG_RSA_COMPUTE_OFFSET               = 1,\n    DBG_SWDIAG_RSA_COMPUTE_MASK                 = 0x02,\n\n    /**\n     ******************************************************************************************\n     * @brief BANK 28 : SYNC SCAN\n     ******************************************************************************************\n     */\n    DBG_SWDIAG_SSCAN                              = 28,\n\n    DBG_SWDIAG_SSCAN_FRM_ISR_OFFSET               = 0,\n    DBG_SWDIAG_SSCAN_FRM_ISR_MASK                 = 0x01,\n\n    DBG_SWDIAG_SSCAN_EVT_START_OFFSET             = 1,\n    DBG_SWDIAG_SSCAN_EVT_START_MASK               = 0x02,\n\n    DBG_SWDIAG_SSCAN_START_OFFSET                 = 2,\n    DBG_SWDIAG_SSCAN_START_MASK                   = 0x04,\n\n    DBG_SWDIAG_SSCAN_EVT_CANCELED_OFFSET          = 3,\n    DBG_SWDIAG_SSCAN_EVT_CANCELED_MASK            = 0x08,\n\n    DBG_SWDIAG_SSCAN_FRM_CBK_OFFSET               = 4,\n    DBG_SWDIAG_SSCAN_FRM_CBK_MASK                 = 0x10,\n\n    DBG_SWDIAG_SSCAN_STP_RX_OFFSET                = 5,\n    DBG_SWDIAG_SSCAN_STP_RX_MASK                  = 0x20,\n\n    DBG_SWDIAG_SSCAN_STP_RX_OK_OFFSET             = 6,\n    DBG_SWDIAG_SSCAN_STP_RX_OK_MASK               = 0x40,\n\n    DBG_SWDIAG_SSCAN_TIMEOUT_OFFSET               = 7,\n    DBG_SWDIAG_SSCAN_TIMEOUT_MASK                 = 0x80,\n\n    /**\n     ******************************************************************************************\n     * @brief BANK 29 : LE SCAN\n     ******************************************************************************************\n     */\n    DBG_SWDIAG_LESCAN                              = 29,\n\n    DBG_SWDIAG_LESCAN_START_OFFSET                 = 0,\n    DBG_SWDIAG_LESCAN_START_MASK                   = 0x01,\n\n    DBG_SWDIAG_LESCAN_STOP_OFFSET                  = 1,\n    DBG_SWDIAG_LESCAN_STOP_MASK                    = 0x02,\n\n    DBG_SWDIAG_LESCAN_EVT_START_OFFSET             = 2,\n    DBG_SWDIAG_LESCAN_EVT_START_MASK               = 0x04,\n\n    DBG_SWDIAG_LESCAN_EVT_CANCELED_OFFSET          = 3,\n    DBG_SWDIAG_LESCAN_EVT_CANCELED_MASK            = 0x08,\n\n    DBG_SWDIAG_LESCAN_FRM_ISR_RX_OFFSET            = 4,\n    DBG_SWDIAG_LESCAN_FRM_ISR_RX_MASK              = 0x10,\n\n    DBG_SWDIAG_LESCAN_FRM_ISR_EOF_OFFSET           = 5,\n    DBG_SWDIAG_LESCAN_FRM_ISR_EOF_MASK             = 0x20,\n\n    DBG_SWDIAG_LESCAN_SCHED_OFFSET                 = 6,\n    DBG_SWDIAG_LESCAN_SCHED_MASK                   = 0x40,\n\n    DBG_SWDIAG_LESCAN_PKT_RX_OFFSET                = 7,\n    DBG_SWDIAG_LESCAN_PKT_RX_MASK                  = 0x80,\n\n    /**\n     ******************************************************************************************\n     * @brief BANK 30 : LLD FM\n     ******************************************************************************************\n     */\n    DBG_SWDIAG_LLDFM                              = 30,\n\n    DBG_SWDIAG_LLDFM_RX_ISR_OFFSET                = 0,\n    DBG_SWDIAG_LLDFM_RX_ISR_MASK                  = 0x01,\n\n    DBG_SWDIAG_LLDFM_END_ISR_OFFSET               = 1,\n    DBG_SWDIAG_LLDFM_END_ISR_MASK                 = 0x02,\n\n    DBG_SWDIAG_LLDFM_PROG_PUSH_OFFSET             = 2,\n    DBG_SWDIAG_LLDFM_PROG_PUSH_MASK               = 0x04,\n     \n    DBG_SWDIAG_LLDFM_INIT_OFFSET                  = 3,\n    DBG_SWDIAG_LLDFM_INIT_MASK                    = 0x08,\n    \n    DBG_SWDIAG_LLDFM_TX_ISR_OFFSET                = 4,\n    DBG_SWDIAG_LLDFM_TX_ISR_MASK                  = 0x10,\n\n    /**\n     ******************************************************************************************\n     * @brief BANK 31 : LE INITIATING\n     ******************************************************************************************\n     */\n    DBG_SWDIAG_LEINIT                             = 31,\n\n    DBG_SWDIAG_LEINIT_START_OFFSET                = 0,\n    DBG_SWDIAG_LEINIT_START_MASK                  = 0x01,\n\n    DBG_SWDIAG_LEINIT_STOP_OFFSET                 = 1,\n    DBG_SWDIAG_LEINIT_STOP_MASK                   = 0x02,\n\n    DBG_SWDIAG_LEINIT_EVT_START_OFFSET            = 2,\n    DBG_SWDIAG_LEINIT_EVT_START_MASK              = 0x04,\n\n    DBG_SWDIAG_LEINIT_EVT_CANCELED_OFFSET         = 3,\n    DBG_SWDIAG_LEINIT_EVT_CANCELED_MASK           = 0x08,\n\n    DBG_SWDIAG_LEINIT_FRM_CBK_OFFSET               = 4,\n    DBG_SWDIAG_LEINIT_FRM_CBK_MASK                 = 0x10,\n\n    DBG_SWDIAG_LEINIT_FRM_ISR_EOF_OFFSET          = 5,\n    DBG_SWDIAG_LEINIT_FRM_ISR_EOF_MASK            = 0x20,\n\n    DBG_SWDIAG_LEINIT_SCHED_OFFSET                = 6,\n    DBG_SWDIAG_LEINIT_SCHED_MASK                  = 0x40,\n\n    DBG_SWDIAG_LEINIT_PKT_RX_OFFSET               = 7,\n    DBG_SWDIAG_LEINIT_PKT_RX_MASK                 = 0x80,\n\n    /**\n     ******************************************************************************************\n     * @brief BANK 32 : LE ADVERTISING\n     ******************************************************************************************\n     */\n    DBG_SWDIAG_LEADV                              = 32,\n\n    DBG_SWDIAG_LEADV_START_OFFSET                 = 0,\n    DBG_SWDIAG_LEADV_START_MASK                   = 0x01,\n\n    DBG_SWDIAG_LEADV_STOP_OFFSET                  = 1,\n    DBG_SWDIAG_LEADV_STOP_MASK                    = 0x02,\n\n    DBG_SWDIAG_LEADV_EVT_START_OFFSET             = 2,\n    DBG_SWDIAG_LEADV_EVT_START_MASK               = 0x04,\n\n    DBG_SWDIAG_LEADV_EVT_CANCELED_OFFSET          = 3,\n    DBG_SWDIAG_LEADV_EVT_CANCELED_MASK            = 0x08,\n\n    DBG_SWDIAG_LEADV_RX_ISR_OFFSET                = 4,\n    DBG_SWDIAG_LEADV_RX_ISR_MASK                  = 0x10,\n\n    DBG_SWDIAG_LEADV_FRM_ISR_OFFSET               = 5,\n    DBG_SWDIAG_LEADV_FRM_ISR_MASK                 = 0x20,\n\n    DBG_SWDIAG_LEADV_SCHED_OFFSET                 = 6,\n    DBG_SWDIAG_LEADV_SCHED_MASK                   = 0x40,\n\n    DBG_SWDIAG_LEADV_PKT_RX_OFFSET                = 7,\n    DBG_SWDIAG_LEADV_PKT_RX_MASK                  = 0x80,\n\n    /**\n     ******************************************************************************************\n     * @brief BANK 33 : LE CONNECTION\n     ******************************************************************************************\n     */\n    DBG_SWDIAG_LECON                              = 33,\n\n    DBG_SWDIAG_LECON_START_OFFSET                 = 0,\n    DBG_SWDIAG_LECON_START_MASK                   = 0x01,\n\n    DBG_SWDIAG_LECON_STOP_OFFSET                  = 1,\n    DBG_SWDIAG_LECON_STOP_MASK                    = 0x02,\n\n    DBG_SWDIAG_LECON_EVT_START_OFFSET             = 2,\n    DBG_SWDIAG_LECON_EVT_START_MASK               = 0x04,\n\n    DBG_SWDIAG_LECON_EVT_CANCELED_OFFSET          = 3,\n    DBG_SWDIAG_LECON_EVT_CANCELED_MASK            = 0x08,\n\n    DBG_SWDIAG_LECON_RX_ISR_OFFSET                = 4,\n    DBG_SWDIAG_LECON_RX_ISR_MASK                  = 0x10,\n\n    DBG_SWDIAG_LECON_FRM_ISR_OFFSET               = 5,\n    DBG_SWDIAG_LECON_FRM_ISR_MASK                 = 0x20,\n\n    DBG_SWDIAG_LECON_SCHED_OFFSET                 = 6,\n    DBG_SWDIAG_LECON_SCHED_MASK                   = 0x40,\n\n    DBG_SWDIAG_LECON_TX_ISR_OFFSET                = 7,\n    DBG_SWDIAG_LECON_TX_ISR_MASK                  = 0x80,\n\n\t/**\n\t******************************************************************************************\n\t* @brief BANK 34 : LE DATA\n\t******************************************************************************************\n\t*/\n\tDBG_SWDIAG_LEDATA                             = 34,\n\n\tDBG_SWDIAG_LEDATA_LLCP_TX_OFFSET              = 0,\n\tDBG_SWDIAG_LEDATA_LLCP_TX_MASK                = 0x01,\n\n\tDBG_SWDIAG_LEDATA_ACL_TX_OFFSET               = 1,\n\tDBG_SWDIAG_LEDATA_ACL_TX_MASK                 = 0x02,\n\n\tDBG_SWDIAG_LEDATA_LLCP_RX_OFFSET              = 2,\n\tDBG_SWDIAG_LEDATA_LLCP_RX_MASK                = 0x04,\n\n\tDBG_SWDIAG_LEDATA_ACL_RX_OFFSET               = 3,\n\tDBG_SWDIAG_LEDATA_ACL_RX_MASK                 = 0x08,\n\n\tDBG_SWDIAG_LEDATA_LLCP_ACK_OFFSET             = 4,\n\tDBG_SWDIAG_LEDATA_LLCP_ACK_MASK               = 0x10,\n\n\tDBG_SWDIAG_LEDATA_ACL_ACK_OFFSET              = 5,\n\tDBG_SWDIAG_LEDATA_ACL_ACK_MASK                = 0x20,\n\n\t/**\n\t******************************************************************************************\n\t* @brief BANK 35 : LETX\n\t******************************************************************************************\n\t*/\n    DBG_SWDIAG_LETX                               = 35,\n\n    DBG_SWDIAG_LETX_LLCP_TX_OFFSET                = 0,\n    DBG_SWDIAG_LETX_LLCP_TX_MASK                  = 0x01,\n\n    DBG_SWDIAG_LETX_ACL_TX_OFFSET                 = 1,\n    DBG_SWDIAG_LETX_ACL_TX_MASK                   = 0x02,\n\n    DBG_SWDIAG_LETX_SW_IDX_OFFSET                 = 2,\n    DBG_SWDIAG_LETX_SW_IDX_MASK                   = 0x04,\n\n    DBG_SWDIAG_LETX_HW_IDX_OFFSET                 = 3,\n    DBG_SWDIAG_LETX_HW_IDX_MASK                   = 0x08,\n\n    DBG_SWDIAG_LETX_TX_CNT_OFFSET                 = 4,\n    DBG_SWDIAG_LETX_TX_CNT_MASK                   = 0x30,\n\n    /// Number of SW profiles - to increase when new bank are added\n    DBG_SWDIAG_NB_PROFILES                      = 36,\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATION\n ****************************************************************************************\n */\n\n/// Allocate HW banks to SW profiles\nextern uint8_t sw_to_hw[DBG_SWDIAG_NB_PROFILES];\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n******************************************************************************************\n* @brief Initialize SW profiling module\n******************************************************************************************\n*/\nvoid dbg_swdiag_init(void);\n\n/**\n******************************************************************************************\n* @brief Read the SW profiling configuration.\n*\n* @return SW profile configuration\n******************************************************************************************\n*/\nuint32_t dbg_swdiag_read(void);\n\n/**\n******************************************************************************************\n* @brief Write the SW profiling configuration.\n*\n* @param[in] profile  SW profiling configuration to apply\n******************************************************************************************\n*/\nvoid dbg_swdiag_write(uint32_t profile);\n\n#endif //RW_SWDIAG\n\n/// @} DBGSWDIAG\n\n#endif // DBG_SWDIAG_H_\n"
  },
  {
    "path": "services/ble_stack/dbg/api/dbg_trc.h",
    "content": "#ifndef DBG_TRC_H_\n#define DBG_TRC_H_\n\n/**\n****************************************************************************************\n* @addtogroup TRACER\n* @ingroup TRACER\n* @brief Tracer module sends traces to the PC through UART\n* @{\n****************************************************************************************\n*/\n\n#include \"rwip_config.h\"\n#if (TRACER_PRESENT)\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \n\n#if (TRC_KE_MSG || TRC_KE_TMR)\n#include \"ke_msg.h\"\n#endif /*(TRC_KE_MSG || TRC_KE_TMR)*/\n\n#if (TRC_EA)\n#include \"ea.h\"\n#endif /*(TRC_EA) */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n#define TRC_GRP_B(__t) (__t##_BIT)\n#define TRC_GRP_P(__t) (__t##_POS)\n\n#define TRC_MSG_TYPE 0x06\n\n#define TRC_OPCODE_LEN      (1)\n#define TRC_PDULEN_LEN      (2)\n#define TRC_MSG_HDR_LEN     (TRC_OPCODE_LEN + TRC_PDULEN_LEN)\n\n#define TRC_CFG_WORD_LEN    (4)\n\n/*\n * ENUMERATION DEFINITION\n ****************************************************************************************\n */\n/// Possible types of trace\nenum trace_types\n{\n    KE_MSG_SEND_QUEUE   = 0x00,\n    KE_MSG_HANDLED      = 0x01,\n    KE_TMR_SET          = 0x02,\n    KE_TMR_CLR          = 0x03,\n    KE_TMR_EXP          = 0x04,\n    KE_EVT_SET          = 0x05,\n    KE_EVT_HANDLED      = 0x06,\n    MEM_ALLOC           = 0x07,\n    MEM_FREE            = 0x08,\n    SLEEP_ENTER         = 0x09,\n    SLEEP_WAKEUP        = 0x0A,\n    ASSERT_WARNING      = 0x0B,\n    ASSERT_ERROR        = 0x0C,\n    ET_PROG             = 0x0D,\n    CONN_EVT_CNT        = 0x0E,\n    FRM_CMP_BT          = 0x0F,\n    FRM_CMP_BLE         = 0x10,\n    CS_BLE              = 0x11,\n    CS_BT               = 0x12,\n    RX_DESC             = 0x13,\n    LLCP_TX             = 0x14,\n    LLCP_RX             = 0x15,\n    LLCP_ACK            = 0x16,\n    LMP_TX              = 0x17,\n    LMP_RX              = 0x18,\n    LMP_ACK             = 0x19,\n    L2CAP_TX            = 0x1A,\n    L2CAP_RX            = 0x1B,\n    L2CAP_ACK           = 0x1C,\n    EA_REQ              = 0x1D,\n    EA_CANC             = 0x1E,\n    EA_REM              = 0x1F,\n    EA_START            = 0x20,\n    EA_SHIFT            = 0x21,\n    LC_ST               = 0x22,\n    LLC_ST              = 0x23,\n    HCI_CMD             = 0x24,\n    HCI_EVT             = 0x25,\n    CUSTOM              = 0x26,\n};\n\n/// Configuration word bit field\n///\n///     7       6       5       4       3       2       1       0\n/// +-------+-------+-------+-------+-------+-------+-------+-------+\n/// |CS_BLE | PROG  |SW_ASS | SLEEP |  MEM  |KE_EVT |KE_TMR |KE_MSG |\n/// +-------+-------+-------+-------+-------+-------+-------+-------+\n///\n///    15      14      13      12      11       10      9       8\n/// +-------+-------+-------+-------+-------+-------+-------+-------+\n/// | LC_ST |LLC_ST |  EA   | L2CAP |  LMP  | LLCP  |RX_DESC| CS_BT |\n/// +-------+-------+-------+-------+-------+-------+-------+-------+\n///\n///    23      22      21      20      19       18      17      16\n/// +-------+-------+-------+-------+-------+-------+-------+-------+\n/// |       |       |       |       |       |       |CUSTOM |  HCI  |\n/// +-------+-------+-------+-------+-------+-------+-------+-------+\n///\n///    31      30      29      28       27      26      25      24\n/// +-------+-------+-------+-------+-------+-------+-------+-------+\n/// |       |       |       |       |       |       |       |       |\n/// +-------+-------+-------+-------+-------+-------+-------+-------+\n///\nenum dbg_trc_cfg_fields\n{\n    /// Kernel message\n    TRC_KE_MSG_POS              = 0,\n    TRC_KE_MSG_BIT              = 0x00000001,\n\n    /// Kernel timer\n    TRC_KE_TMR_POS              = 1,\n    TRC_KE_TMR_BIT              = 0x00000002,\n\n    /// Kernel event\n    TRC_KE_EVT_POS              = 2,\n    TRC_KE_EVT_BIT              = 0x00000004,\n\n    /// Memory allocation and deallocation\n    TRC_MEM_POS                 = 3,\n    TRC_MEM_BIT                 = 0x00000008,\n\n    /// Sleep mode\n    TRC_SLEEP_POS               = 4,\n    TRC_SLEEP_BIT               = 0x00000010,\n\n    /// Software Assert\n    TRC_SW_ASS_POS              = 5,\n    TRC_SW_ASS_BIT              = 0x00000020,\n\n    /// Programming of the exchange table, updating of the event counter and handling of \"End of Event\" interrupt\n    TRC_PROG_POS                = 6,\n    TRC_PROG_BIT                = 0x00000040,\n\n    /// BLE Control structure\n    TRC_CS_BLE_POS              = 7,\n    TRC_CS_BLE_BIT              = 0x00000080,\n\n    /// BT Control structure\n    TRC_CS_BT_POS               = 8,\n    TRC_CS_BT_BIT               = 0x00000100,\n\n    /// Processing of RX descriptors at each LLD driver\n    TRC_RX_DESC_POS             = 9,\n    TRC_RX_DESC_BIT             = 0x00000200,\n\n    /// LLCP transmission, reception and acknowledgment\n    TRC_LLCP_POS                = 10,\n    TRC_LLCP_BIT                = 0x00000400,\n\n    /// LMP transmission, reception and acknowledgment\n    TRC_LMP_POS                 = 11,\n    TRC_LMP_BIT                 = 0x00000800,\n\n    /// L2CAP transmission, reception and acknowledgment\n    TRC_L2CAP_POS               = 12,\n    TRC_L2CAP_BIT               = 0x00001000,\n\n    /// Scheduling request, cancellation, shift and remove\n    TRC_EA_POS                  = 13,\n    TRC_EA_BIT                  = 0x00002000,\n\n    /// LLC state transition\n    TRC_LLC_STATE_TRANS_POS     = 14,\n    TRC_LLC_STATE_TRANS_BIT     = 0x00004000,\n\n    /// LC state transition\n    TRC_LC_STATE_TRANS_POS      = 15,\n    TRC_LC_STATE_TRANS_BIT      = 0x00008000,\n\n    /// HCI messages (in Full embedded mode)\n    TRC_HCI_POS                 = 16,\n    TRC_HCI_BIT                 = 0x00010000,\n\n    /// Custom trace\n    TRC_CUSTOM_POS              = 17,\n    TRC_CUSTOM_BIT              = 0x00020000,\n};\n\n/// Tracer packet types\nenum dbg_trc_pkt_types\n{\n    /// Trace message\n    TRACE       = 0x01,\n    /// Configuration message\n    TRACER_CFG  = 0x02,\n    /// Acknowledgment message\n    TRACER_ACK  = 0x03\n};\n\n#if (TRC_RX_DESC)\n/// LLD driver types\nenum driver_types\n{\n    LLD_SCAN    = 0x01,\n    LLD_INIT    = 0x02,\n    LLD_ADV     = 0x03,\n    LLD_CON     = 0x04\n};\n#endif /*(TRC_RX_DESC)*/\n\n#if (TRC_CUSTOM)\n/// Custom trace types\nenum custom_trace_types\n{\n    UINT8_T     =   0x01,\n    UINT16_T    =   0x02,\n    UINT32_T    =   0x03,\n    VOID        =   0x04\n};\n#endif /*(TRC_CUSTOM)*/\n#endif /*(TRACER_PRESENT)*/\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATION\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Request a new trace\n *\n * This function checks the current configuration of the tracer\n *\n ****************************************************************************************\n */\n#if (TRACER_PRESENT && TRC_KE_MSG)\n/**\n ****************************************************************************************\n * @brief Trace request API for kernel message pushed in the send queue\n *\n * This function is called when a kernel message is pushed in the send queue.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"kernel message\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   msg     Kernel message\n ****************************************************************************************\n */\nvoid dbg_trc_req_ke_msg_send(struct ke_msg const *msg);\n\n/// Macro used to send trace request API for kernel message send\n#define TRC_REQ_KE_MSG_SEND(msg) \\\n        dbg_trc_req_ke_msg_send(msg);\n        \n/**\n ****************************************************************************************\n * @brief Trace request API for kernel message handled\n *\n * This function is called when a task handles a message\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"kernel message\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   id          Kernel message id\n * @param[in]   dest_id     Destination kernel identifier\n * @param[in]   src_id      Source kernel identifier\n * @param[in]   msg_status  Status returned by the kernel message handler\n ****************************************************************************************\n */\nvoid dbg_trc_req_ke_msg_handled(ke_msg_id_t const id, ke_task_id_t const dest_id, ke_task_id_t const src_id, uint8_t const msg_status);\n\n/// Macro used to send trace request API for kernel message handled\n#define TRC_REQ_KE_MSG_HANDLED(id, dest_id, src_id, msg_status) \\\n        dbg_trc_req_ke_msg_handled(id, dest_id, src_id, msg_status);\n#else /*TRACER_PRESENT && TRC_KE_MSG*/\n#define TRC_REQ_KE_MSG_SEND(msg)\n#define TRC_REQ_KE_MSG_HANDLED(id, dest_id, src_id, msg_status)\n#endif /*TRACER_PRESENT && TRC_KE_MSG*/\n\n#if (TRACER_PRESENT && TRC_KE_TMR)\n/**\n ****************************************************************************************\n * @brief Trace request API for kernel timer\n *\n * This function is called when a kernel timer is set, cleared or expired.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"kernel timer\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   tmr_trc_type        Trace type for kernel timer (timer set, cleared and expired of @see enum trace_types)\n * @param[in]   target_time         Timer time value\n * @param[in]   task_id             Timer task identifier\n * @param[in]   msg_id              Timer message identifier\n ****************************************************************************************\n */\nvoid dbg_trc_req_ke_tmr(uint8_t const tmr_trc_type, uint32_t const target_time, ke_task_id_t const task_id, ke_msg_id_t const msg_id);\n\n/// Macro used to send trace request API for kernel timer set\n#define TRC_REQ_KE_TMR_SET(target_time, task_id, msg_id) \\\n        dbg_trc_req_ke_tmr(KE_TMR_SET, target_time, task_id, msg_id);\n\n/// Macro used to send trace request API for kernel timer cleared\n#define TRC_REQ_KE_TMR_CLR(target_time, task_id, msg_id) \\\n        dbg_trc_req_ke_tmr(KE_TMR_CLR,target_time, task_id, msg_id);\n\n/// Macro used to send trace request API for kernel timer expired\n#define TRC_REQ_KE_TMR_EXP(target_time, task_id, msg_id) \\\n        dbg_trc_req_ke_tmr(KE_TMR_EXP,target_time, task_id, msg_id);\n#else /*(TRACER_PRESENT && TRC_KE_TMR)*/\n#define TRC_REQ_KE_TMR_SET(target_time, task_id, msg_id)\n#define TRC_REQ_KE_TMR_CLR(target_time, task_id, msg_id)\n#define TRC_REQ_KE_TMR_EXP(target_time, task_id, msg_id)\n#endif /*(TRACER_PRESENT && TRC_KE_TMR)*/\n\n#if (TRACER_PRESENT && TRC_KE_EVT)\n/**\n ****************************************************************************************\n * @brief Trace request API for kernel event\n *\n * This function is called when a kernel event is set or handled.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"kernel event\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   evt_req_type        Trace type for kernel event (event set and handled of @see enum trace_types)\n * @param[in]   event_type          Type of event\n ****************************************************************************************\n */\nvoid dbg_trc_req_ke_evt(uint8_t const evt_trc_type, uint8_t const event_type);\n\n/// Macro used to send trace request API for kernel event set\n#define TRC_REQ_KE_EVT_SET(evt_type)                    \\\n        dbg_trc_req_ke_evt(KE_EVT_SET, evt_type);\n\n/// Macro used to send trace request API for kernel event handled\n#define TRC_REQ_KE_EVT_HANDLED(evt_type)                \\\n        dbg_trc_req_ke_evt(KE_EVT_HANDLED, evt_type);\n#else /*(TRACER_PRESENT && TRC_KE_EVT)*/\n#define TRC_REQ_KE_EVT_SET(evt_type)\n#define TRC_REQ_KE_EVT_HANDLED(evt_type)\n#endif /*(TRACER_PRESENT && TRC_KE_EVT)*/\n\n#if (TRACER_PRESENT && TRC_MEM)\n/**\n ****************************************************************************************\n * @brief Trace request API for memory management\n *\n * This function is called when the memory is allocated or freed.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"memory\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   mem_trc_type    Trace type for memory management (memory alloc and free of @see enum trace_types)\n * @param[in]   heap_id         Heap identifier\n * @param[in]   blk_address     Address of the used memory block\n * @param[in]   size            Size of the memory area that has been allocated or freed.\n ****************************************************************************************\n */\nvoid dbg_trc_req_mem(uint8_t const mem_trc_type, uint8_t const heap_id, void const *blk_address, uint32_t const size);\n\n/// Macro used to send trace request API for memory allocation\n#define TRC_REQ_MEM_ALLOC(heap_id, blk_address, size)   \\\n        dbg_trc_req_mem(MEM_ALLOC, heap_id, blk_address, size);\n\n/// Macro used to send trace request API for memory deallocation\n#define TRC_REQ_MEM_FREE(heap_id, blk_address, size)    \\\n        dbg_trc_req_mem(MEM_FREE, heap_id, blk_address, size);\n\n#else /*(TRACER_PRESENT && TRC_MEM)*/\n#define TRC_REQ_MEM_ALLOC(heap_id, blk_address, size)\n#define TRC_REQ_MEM_FREE(heap_id, blk_address, size)\n#endif/*(TRACER_PRESENT && TRC_MEM)*/\n\n#if (TRACER_PRESENT && TRC_SLEEP)\n/**\n ****************************************************************************************\n * @brief Trace request API for sleep mode\n *\n * This function is called when the IP enter in deep sleep and when it wakes up.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"sleep\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   sleep_trc_type  Trace type for sleep mode (sleep enter and wakeup of @see enum trace_types)\n ****************************************************************************************\n */\nvoid dbg_trc_req_deep_sleep(uint8_t const sleep_trc_type);\n\n/// Macro used to send trace request API when the IP enters in deep sleep\n#define TRC_REQ_SLEEP()                 \\\n        dbg_trc_req_deep_sleep(SLEEP_ENTER);\n\n/// Macro used to send trace request API when the IP wakes up from deep sleep\n#define TRC_REQ_WAKEUP()                \\\n        dbg_trc_req_deep_sleep(SLEEP_WAKEUP);\n\n#else /*(TRACER_PRESENT && TRC_SLEEP)*/\n#define TRC_REQ_SLEEP()\n#define TRC_REQ_WAKEUP()\n#endif /*(TRACER_PRESENT && TRC_SLEEP)*/\n\n#if (TRACER_PRESENT && TRC_SW_ASS)\n/**\n ****************************************************************************************\n * @brief Trace request API for software asserts\n *\n * This function is called when an assertion statement is evaluated as true.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"sw assertions\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   ass_trc_type    Trace type for assertions (assert warning and assert error of @see enum trace_types)\n * @param[in]   filename        Name of the file that triggered the assertion\n * @param[in]   code_line       Line of code where the assertion was triggered\n * @param[in]   param0          Parameter value 0\n * @param[in]   param1          Parameter value 1\n ****************************************************************************************\n */\nvoid dbg_trc_req_sw_ass(uint8_t const ass_trc_type,  char const *filename, uint16_t const code_line, uint32_t const param0, uint32_t const param1);\n\n/// Macro used to send trace request API when an assert warning is evaluated as true\n#define TRC_REQ_SW_ASS_WARN(filename, code_line, param0, param1)                     \\\n        dbg_trc_req_sw_ass(ASSERT_WARNING, filename, code_line, param0, param1);\n\n/// Macro used to send trace request API when an assert warning is evaluated as true\n#define TRC_REQ_SW_ASS_ERR(filename, code_line, param0, param1)                     \\\n        dbg_trc_req_sw_ass(ASSERT_ERROR, filename, code_line, param0, param1);\n\n#else /*(TRACER_PRESENT && TRC_SW_ASS)*/\n#define TRC_REQ_SW_ASS_WARN(filename, code_line, param0, param1)\n#define TRC_REQ_SW_ASS_ERR(filename, code_line, param0, param1)\n#endif /*(TRACER_PRESENT && TRC_SW_ASS)*/\n\n#if (TRACER_PRESENT && TRC_PROG)\n/**\n ****************************************************************************************\n * @brief Trace request API for exchange table programming\n *\n * This function is called when the exchange table is programmed.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"programming\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   elt_idx     Index of the programmed entry in the ET\n ****************************************************************************************\n */\nvoid dbg_trc_req_et_prog(uint8_t const elt_idx);\n\n#define TRC_REQ_ET_PROG(elt_idx) \\\n\t\tdbg_trc_req_et_prog(elt_idx);\n\n/**\n ****************************************************************************************\n * @brief Trace request API for connection event counter programming\n *\n * This function is called when the connection event counter is set.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"programming\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   conhdl       Connection handle\n * @param[in]   value        Value of connection event counter\n ****************************************************************************************\n */\nvoid dbg_trc_req_evt_cnt(uint16_t const conhdl, uint16_t const value);\n#define TRC_REQ_EVT_CNT(conhdl, value) \\\n\t\tdbg_trc_req_evt_cnt(conhdl, value);\n/**\n ****************************************************************************************\n * @brief Trace request API for frame completion\n *\n * This function is called when a frame is completed.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"programming\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   timestamp   Timestamp of the programmed frame (in BLE slots, based on local clock)\n * @param[in]   frm_id      Frame identifier\n * @param[in]   frm_cbk     Callback for handling interrupts related to the frame\n ****************************************************************************************\n */\nvoid dbg_trc_req_frm_cmp(uint32_t const timestamp, uint8_t const frm_id, uint32_t const frm_cbk);\n\n#define TRC_REQ_FRM_CMP(timestamp, frm_id, frm_cbk) \\\n\t\tdbg_trc_req_frm_cmp(timestamp, frm_id, frm_cbk);\n\n#else /*(TRACER_PRESENT && TRC_PROG)*/\n#define TRC_REQ_ET_PROG(elt_idx)\n#define TRC_REQ_EVT_CNT(conhdl, value)\n#define TRC_REQ_FRM_CMP(timestamp, frm_id, frm_cbk)\n#endif /*(TRACER_PRESENT && TRC_PROG)*/\n\n#if (TRACER_PRESENT && TRC_CS_BLE)\n/**\n ****************************************************************************************\n * @brief Trace request API for control structure programming in BLE\n *\n * This function is called when a control structure is modified.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"BLE control structure\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   cs_addr     Address of the control structure in the exchange memory\n ****************************************************************************************\n */\nvoid dbg_trc_req_cs_ble(uint16_t const cs_addr);\n\n#define TRC_REQ_CS_BLE(cs_addr) \\\n\t\tdbg_trc_req_cs_ble(cs_addr);\n\t\t\n#else /*(TRACER_PRESENT && TRC_CS_BLE)*/\n#define TRC_REQ_CS_BLE(cs_addr)\n#endif /*(TRACER_PRESENT && TRC_CS_BLE)*/\n\n#if (TRACER_PRESENT && TRC_CS_BT)\n/**\n ****************************************************************************************\n * @brief Trace request API for control structure programming in BT\n *\n * This function is called when a control structure is modified.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"BT control structure\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   cs_addr     Address of the control structure in the exchange memory\n ****************************************************************************************\n */\nvoid dbg_trc_req_cs_bt(uint16_t const cs_addr);\n\n#define TRC_REQ_CS_BT(cs_addr) \\\n\t\tdbg_trc_req_cs_bt(cs_addr);\n#else /*(TRACER_PRESENT && TRC_CS_BT)*/\n#define TRC_REQ_CS_BT(cs_addr)\n#endif /*(TRACER_PRESENT && TRC_CS_BT)*/\n\n#if (TRACER_PRESENT && TRC_RX_DESC)\n/**\n ****************************************************************************************\n * @brief Trace request API for processing of rx descriptors\n *\n * This function is called when a packet is received and a driver processes a rx descriptor.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"Rx descriptor\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   drv_type    LLD driver (@see enum driver_type)\n * @param[in]   act_id      Activity identifier\n * @param[in]   rx_desc_add Address of the rx descriptor in the exchange memory\n ****************************************************************************************\n */\nvoid dbg_trc_req_rx_desc(uint8_t const drv_type, uint8_t const act_id, uint16_t const rx_desc_add);\n\n#define TRC_REQ_RX_DESC(drv_type, act_id, rx_desc_add) \\\n\t\tdbg_trc_req_rx_desc(drv_type, act_id, rx_desc_add);\n\n#else /*(TRACER_PRESENT && TRC_RX_DESC)*/\n#define TRC_REQ_RX_DESC(drv_type, act_id, rx_desc_add)\n#endif /*(TRACER_PRESENT && TRC_RX_DESC) */\n\n#if (TRACER_PRESENT && TRC_LLCP)\n/**\n ****************************************************************************************\n * @brief Trace request API for llcp packets transmission, reception and acknowledgment\n *\n * This function is called when a llcp packet is transmitted, received or acknowledged.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"LLCP\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   llcp_trc_type   Trace type for llcp (llcp tx, llcp rx and llcp ack of @see enum trace_types)\n * @param[in]   conhdl        Connection handle\n * @param[in]   data_len        Data length (in bytes)\n * @param[in]   pdu_data        PDU Data\n ****************************************************************************************\n */\nvoid dbg_trc_req_llcp(uint8_t const llcp_trc_type, uint16_t const conhdl, uint8_t const data_len, uint8_t const *pdu_data);\n\n/// Macro used to send trace request API when an llcp packet is transmitted\n#define TRC_REQ_LLCP_TX(conhdl, data_len, pdu_data)               \\\n        dbg_trc_req_llcp(LLCP_TX, conhdl, data_len, pdu_data);\n\n/// Macro used to send trace request API when an llcp packet is received\n#define TRC_REQ_LLCP_RX(conhdl, data_len, pdu_data)               \\\n        dbg_trc_req_llcp(LLCP_RX, conhdl, data_len, pdu_data);\n\n/// Macro used to send trace request API when an llcp packet is acknowledged\n#define TRC_REQ_LLCP_ACK(conhdl, data_len, pdu_data)              \\\n        dbg_trc_req_llcp(LLCP_ACK, conhdl, data_len, pdu_data);\n#else /*(TRACER_PRESENT && TRC_LLCP)*/\n#define TRC_REQ_LLCP_TX(conhdl, data_len, pdu_data)\n#define TRC_REQ_LLCP_RX(conhdl, data_len, pdu_data)\n#define TRC_REQ_LLCP_ACK(conhdl, data_len, pdu_data)\n#endif /*(TRACER_PRESENT && TRC_LLCP) */\n\n#if (TRACER_PRESENT && TRC_LMP)\n/**\n ****************************************************************************************\n * @brief Trace request API for lmp packets transmission, reception and acknowledgment\n *\n * This function is called when a lmp packet is transmitted, received or acknowledged.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"LMP\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   llcp_trc_type   Trace type for lmp (lmp tx, lmp rx and lmp ack of @see enum trace_types)\n * @param[in]   conhdl        Connection handle\n * @param[in]   data_len        Data length (in bytes)\n * @param[in]   pdu_data        PDU Data\n ****************************************************************************************\n */\nvoid dbg_trc_req_lmp(uint8_t const lmp_trc_type, uint16_t const conhdl, uint8_t const data_len, uint8_t const *pdu_data);\n\n/// Macro used to send trace request API when an lmp packet is transmitted\n#define TRC_REQ_LMP_TX(conhdl, data_len, pdu_data)               \\\n        dbg_trc_req_lmp(LMP_TX, conhdl, data_len, pdu_data);\n\n/// Macro used to send trace request API when an lmp packet is received\n#define TRC_REQ_LMP_RX(conhdl, data_len, pdu_data)               \\\n        dbg_trc_req_lmp(LMP_RX, conhdl, data_len, pdu_data);\n\n/// Macro used to send trace request API when an lmp packet is acknowledged\n#define TRC_REQ_LMP_ACK(conhdl, data_len, pdu_data)              \\\n        dbg_trc_req_lmp(LMP_ACK, conhdl, data_len, pdu_data);\n\n#else /*(TRACER_PRESENT && TRC_LMP)*/\n#define TRC_REQ_LMP_TX(conhdl, data_len, pdu_data)\n#define TRC_REQ_LMP_RX(conhdl, data_len, pdu_data)\n#define TRC_REQ_LMP_ACK(conhdl, data_len, pdu_data)\n#endif /*(TRACER_PRESENT && TRC_LMP)*/\n\n#if (TRACER_PRESENT && TRC_L2CAP)\n/**\n ****************************************************************************************\n * @brief Trace request API for l2cap packets transmission and reception\n *\n * This function is called when a l2cap packet is transmitted or received.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"L2CAP\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   l2cap_trc_type  Trace type for l2cap (l2cap tx and l2cap rx of @see enum trace_types)\n * @param[in]   conhdl        Connection handle\n * @param[in]   data_len        Data length (in bytes)\n * @param[in]   buf_ptr         Memory pointer address\n ****************************************************************************************\n */\nvoid dbg_trc_req_l2cap(uint8_t const l2cap_trc_type, uint16_t const conhdl, uint16_t const data_len, uint32_t const buf_ptr);\n\n/// Macro used to send trace request API when an l2cap packet is transmitted\n#define TRC_REQ_L2CAP_TX(conhdl, tx_len, buf_ptr)               \\\n        dbg_trc_req_l2cap(L2CAP_TX, conhdl, tx_len, buf_ptr);\n\n/// Macro used to send trace request API when an l2cap packet is received\n#define TRC_REQ_L2CAP_RX(conhdl, tx_len, buf_ptr)               \\\n        dbg_trc_req_l2cap(L2CAP_RX, conhdl, tx_len, buf_ptr);\n\n/**\n ****************************************************************************************\n * @brief Trace request API for l2cap packet acknowledgment\n *\n * This function is called when l2cap packets are acknowledged.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"L2CAP\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   conhdl        Connection handle\n * @param[in]   num_ack_pkts    Number of acknowledged l2cap packets\n ****************************************************************************************\n */\nvoid dbg_trc_req_l2cap_ack(uint16_t const conhdl, uint16_t const num_ack_pkts);\n\n#define TRC_REQ_L2CAP_ACK(conhdl, num_ack_pkts)               \\\n        dbg_trc_req_l2cap_ack(conhdl, num_ack_pkts);\n\n#else /*(TRACER_PRESENT && TRC_L2CAP)*/\n#define TRC_REQ_L2CAP_TX(conhdl, tx_len, buf_ptr)\n#define TRC_REQ_L2CAP_RX(conhdl, tx_len, buf_ptr)\n#define TRC_REQ_L2CAP_ACK(conhdl, num_ack_pkts)\n#endif/*(TRACER_PRESENT && TRC_L2CAP) */\n\n#if (TRACER_PRESENT && TRC_EA)\n/**\n ****************************************************************************************\n * @brief Trace request API for cancellation, removal and starting of events\n *\n * This function is called when an event starts, is removed or is cancelled.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"EA\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   ea_trc_type     Trace type for event arbiter (cancel, remove and start of @see enum trace_types)\n * @param[in]   ea_elt          Pointer to the event arbiter element\n ****************************************************************************************\n */\nvoid dbg_trc_req_ea(uint8_t const ea_trc_type,const struct ea_elt_tag *ea_elt);\n\n/// Macro used to send trace request API when an event is cancelled\n#define TRC_REQ_EA_CANC(ea_elt)                 \\\n        dbg_trc_req_ea(EA_CANC, ea_elt);\n\n/// Macro used to send trace request API when an event is removed\n#define TRC_REQ_EA_REM(ea_elt)                  \\\n        dbg_trc_req_ea(EA_REM, ea_elt);\n\n/// Macro used to send trace request API when an event starts\n#define TRC_REQ_EA_START(ea_elt)                \\\n        dbg_trc_req_ea(EA_START, ea_elt);\n\n/**\n ****************************************************************************************\n * @brief Trace request API for shifting of events\n *\n * This function is called when an event is shifted.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"EA\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   ea_elt          Pointer to the event arbiter element\n ****************************************************************************************\n */\nvoid dbg_trc_req_ea_shift(const struct ea_elt_tag *ea_elt);\n\n#define TRC_REQ_EA_SHIFT(ea_elt)                \\\n\t\tdbg_trc_req_ea_shift(ea_elt);\n/**\n ****************************************************************************************\n * @brief Trace request API for pushing of event in the waiting queue\n *\n * This function is called when an event is pushed in the waiting queue.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"EA\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   ea_elt          Pointer to the event arbiter element\n ****************************************************************************************\n */\nvoid dbg_trc_req_ea_insert(uint32_t const target_time, uint8_t const status, const struct ea_elt_tag *ea_elt);\n\n#define TRC_REQ_EA_INSERT(target_time, status, ea_elt)\t\t\\\n\t\tdbg_trc_req_ea_insert(target_time, status, ea_elt);\n\n#else /*(TRACER_PRESENT && TRC_EA)*/\n#define TRC_REQ_EA_CANC(ea_elt)\n#define TRC_REQ_EA_REM(ea_elt)\n#define TRC_REQ_EA_START(ea_elt)\n#define TRC_REQ_EA_SHIFT(ea_elt)\n#define TRC_REQ_EA_INSERT(target_time, status, ea_elt)\n#endif /*(TRACER_PRESENT && TRC_EA)*/\n\n#if (TRACER_PRESENT && TRC_LC_STATE_TRANS)\n/**\n ****************************************************************************************\n * @brief Trace request API for lc procedure state transition\n *\n * This function is called when an lc procedure changes its state.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"LC state transition\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   conhdl        Connection handle\n * @param[in]   proc_type       LC procedure\n * @param[in]   prev_state      Previous procedure state\n * @param[in]   curr_state      Current procedure state\n ****************************************************************************************\n */\nvoid dbg_trc_req_lc_state_trans(uint16_t const conhdl, uint8_t const proc_type, uint8_t const prev_state, uint8_t const curr_state);\n\n#define TRC_REQ_LC_STATE_TRANS(conhdl, proc_type, prev_state, curr_state)\t\t\\\n\t\tdbg_trc_req_lc_state_trans(conhdl, proc_type, prev_state, curr_state);\n\n#else /*(TRACER_PRESENT && TRC_LC_STATE_TRANS)*/\n#define TRC_REQ_LC_STATE_TRANS(conhdl, proc_type, prev_state, curr_state)\n#endif /*(TRACER_PRESENT && TRC_LC_STATE_TRANS)*/\n\n#if (TRACER_PRESENT && TRC_LLC_STATE_TRANS)\n/**\n ****************************************************************************************\n * @brief Trace request API for llc procedure state transition\n *\n * This function is called when an llcp procedure changes its state.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"LLC state transition\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   conhdl        Connection handle\n * @param[in]   proc_type       LLC procedure\n * @param[in]   prev_state      Previous procedure state\n * @param[in]   curr_state      Current procedure state\n ****************************************************************************************\n */\nvoid dbg_trc_req_llc_state_trans(uint16_t const conhdl, uint8_t const proc_type, uint8_t const prev_state, uint8_t const curr_state);\n\n#define TRC_REQ_LLC_STATE_TRANS(conhdl, proc_type, prev_state, curr_state)\t\t\\\n\t\tdbg_trc_req_llc_state_trans(conhdl, proc_type, prev_state, curr_state);\n\n#else /*(TRACER_PRESENT && TRC_LLC_STATE_TRANS)*/\n#define TRC_REQ_LLC_STATE_TRANS(conhdl, proc_type, prev_state, curr_state)\n#endif /*(TRACER_PRESENT && TRC_LLC_STATE_TRANS)*/\n\n#if (TRACER_PRESENT && TRC_HCI)\n/**\n ****************************************************************************************\n * @brief Trace request API for HCI messages (in FE mode)\n *\n * This function is called when a HCI command is received or a HCI event is sent.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"HCI\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   hci_msg_type    Type of hci message (HCI command and event of @see enum trace_types)\n * @param[in]   opcode          HCI opcode\n * @param[in]   par_len         HCI parameter length\n * @param[in]   params          unpacked HCI parameters\n ****************************************************************************************\n */\nvoid dbg_trc_req_hci(uint8_t const hci_msg_type, uint16_t const opcode, uint16_t const par_len, uint32_t const *params);\n\n/// Macro used to send trace request API when an HCI command is received\n#define TRC_REQ_HCI_CMD(opcode, par_len, params)    \\\n    dbg_trc_req_hci(HCI_CMD, opcode, par_len, params);\n\n/// Macro used to send trace request API when an HCI event is sent\n#define TRC_REQ_HCI_EVT(opcode, par_len, params)    \\\n    dbg_trc_req_hci(HCI_EVT, opcode, par_len, params);\n    \n#else /*(TRACER_PRESENT && TRC_HCI)*/\n#define TRC_REQ_HCI_CMD(opcode, par_len, params)\n#define TRC_REQ_HCI_EVT(opcode, par_len, params)\n#endif /*(TRACER_PRESENT && TRC_HCI)*/\n\n#if (TRACER_PRESENT && TRC_CUSTOM)\n/**\n ****************************************************************************************\n * @brief Trace request API for custom traces\n *\n * This function is called to send a custom trace.\n *\n * It checks the current tracer configuration and writes the trace in memory if the trace\n * group \"custom\" (@see enum tracer_cfg_fields) is enabled.\n *\n * @param[in]   trc_id      Trace request identifier (progressive number that identifies the caller)\n * @param[in]   data_type   Type of data (@see enum custom_trace_type)\n * @param[in]   data        Pointer to the data to send\n ****************************************************************************************\n */\nvoid dbg_trc_req_custom(const uint8_t trc_id, const uint8_t data_type, void const *data);\n#define TRC_REQ_CUSTOM(trc_id, data_type, data)    \\\n        dbg_trc_req_custom(trc_id, data_type, data);\n#else /*(TRACER_PRESENT && TRC_CUSTOM)*/\n#define TRC_REQ_CUSTOM(trc_id, data_type, data)\n#endif /*(TRACER_PRESENT && TRC_CUSTOM)*/\n\n#if (TRACER_PRESENT)\n/**\n ****************************************************************************************\n * @brief Configuration received\n *\n * This function checks if the received configuration can be adopted and acknowledges it\n *\n ****************************************************************************************\n */\nvoid dbg_trc_cfg_received();\n\n/**\n ****************************************************************************************\n * @brief Get the reception buffer for configuration word\n *\n * @return  Buffer for payload reception of tracer configuration packets\n ****************************************************************************************\n */\nuint8_t* dbg_trc_pay_buff_get();\n#endif /*(TRACER_PRESENT)*/\n///@} TRACER\n#endif // DBG_TRC_H_\n"
  },
  {
    "path": "services/ble_stack/dbg/api/dbg_trc_config.h",
    "content": "#ifndef DBG_TRC_CONFIG_H_\n#define DBG_TRC_CONFIG_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TRACER\n * @{\n * @name Tracer module configuration\n * @{\n ****************************************************************************************\n */\n\n#if defined CFG_TRC_ALL\n#define TRC_KE_MSG             1\n#define TRC_KE_TMR             1\n#define TRC_KE_EVT             1\n#define TRC_MEM                1\n#define TRC_SLEEP              1\n#define TRC_SW_ASS             1\n#define TRC_PROG               1\n#define TRC_RX_DESC            1\n#define TRC_CUSTOM             1\n#define TRC_EA                 1\n\n#if (BLE_EMB_PRESENT)\n#define TRC_CS_BLE             1\n#define TRC_LLCP               1\n#define TRC_LLC_STATE_TRANS    1\n\n#if (BLE_HOST_PRESENT)\n#define TRC_HCI                1\n#define TRC_L2CAP              1\n#else\n#define TRC_HCI                0\n#define TRC_L2CAP              0\n#endif /*(BLE_HOST_PRESENT)*/\n\n#else\n#define TRC_CS_BLE             0\n#define TRC_LLCP               0\n#define TRC_LLC_STATE_TRANS    0\n#define TRC_HCI                0\n#define TRC_L2CAP              0\n#endif /*(BLE_EMB_PRESENT)*/\n\n#if (BT_EMB_PRESENT)\n#define TRC_CS_BT              1\n#define TRC_LMP                1\n#define TRC_LC_STATE_TRANS     1\n#else\n#define TRC_CS_BT              0\n#define TRC_LMP                0\n#define TRC_LC_STATE_TRANS     0\n#endif /*(BT_EMB_PRESENT)*/\n\n#else /*(CFG_TRC_ALL)*/\n\n#if defined CFG_TRC_KE_MSG\n#define TRC_KE_MSG             1\n#else\n#define TRC_KE_MSG             0\n#endif /*(CFG_TRC_KE_MSG)*/\n\n#if defined CFG_TRC_KE_TMR\n#define TRC_KE_TMR             1\n#else\n#define TRC_KE_TMR             0\n#endif /*CFG_TRC_KE_TMR*/\n\n#if defined CFG_TRC_KE_EVT\n#define TRC_KE_EVT             1\n#else\n#define TRC_KE_EVT             0\n#endif /*CFG_TRC_KE_EVT*/\n\n#if defined CFG_TRC_MEM\n#define TRC_MEM                1\n#else\n#define TRC_MEM                0\n#endif /*CFG_TRC_MEM*/\n\n#if defined CFG_TRC_SLEEP\n#define TRC_SLEEP              1\n#else\n#define TRC_SLEEP              0\n#endif /*CFG_TRC_SLEEP*/\n\n#if defined CFG_TRC_SW_ASS\n#define TRC_SW_ASS             1\n#else\n#define TRC_SW_ASS             0\n#endif /*CFG_TRC_SW_ASS*/\n\n#if defined CFG_TRC_PROG\n#define TRC_PROG               1\n#else\n#define TRC_PROG               0\n#endif /*CFG_TRC_PROG*/\n\n#if defined CFG_TRC_RX_DESC\n#define TRC_RX_DESC            1\n#else\n#define TRC_RX_DESC            0\n#endif /*CFG_TRC_RX_DESC*/\n\n#if defined CFG_TRC_CUSTOM\n#define TRC_CUSTOM             1\n#else\n#define TRC_CUSTOM             0\n#endif /*CFG_TRC_CUSTOM*/\n\n#if defined CFG_TRC_EA\n#define TRC_EA                 1\n#else\n#define TRC_EA                 0\n#endif /*CFG_TRC_EA*/\n\n#if (BLE_EMB_PRESENT)\n#if defined CFG_TRC_CS_BLE\n#define TRC_CS_BLE             1\n#else\n#define TRC_CS_BLE             0\n#endif /*(CFG_TRC_CS_BLE)*/\n\n#if defined CFG_TRC_LLCP\n#define TRC_LLCP               1\n#else\n#define TRC_LLCP               0\n#endif /*(CFG_TRC_LLCP)*/\n\n#if defined CFG_TRC_LLC_STATE_TRANS\n\n#define TRC_LLC_STATE_TRANS    1\n#else\n#define TRC_LLC_STATE_TRANS    0\n#endif /*(CFG_TRC_LLC_STATE_TRANS)*/\n\n#if (BLE_HOST_PRESENT)\n\n#if defined CFG_TRC_L2CAP\n#define TRC_L2CAP              1\n#else\n#define TRC_L2CAP              0\n#endif /*CFG_TRC_L2CAP*/\n\n#if defined CFG_TRC_HCI\n#define TRC_HCI                1\n#else\n#define TRC_HCI                0\n#endif /*CFG_TRC_HCI*/\n\n#else /*BLE_HOST_PRESENT*/\n\n#define TRC_L2CAP              0\n#define TRC_HCI                0\n#endif /*BLE_HOST_PRESENT*/\n\n#else /*BLE_EMB_PRESENT*/\n\n#define TRC_CS_BLE             0\n#define TRC_LLCP               0\n#define TRC_LLC_STATE_TRANS    0\n#define TRC_L2CAP              0\n#define TRC_HCI                0\n\n#endif /*BLE_EMB_PRESENT*/\n\n#if (BT_EMB_PRESENT)\n\n#if defined CFG_TRC_CS_BT\n#define TRC_CS_BT              1\n#else\n#define TRC_CS_BT              0\n#endif /*CFG_TRC_CS_BT*/\n\n#if defined CFG_TRC_LMP\n#define TRC_LMP                1\n#else\n#define TRC_LMP                0\n#endif /*CFG_TRC_LMP*/\n\n#if defined CFG_TRC_LC_STATE_TRANS\n#define TRC_LC_STATE_TRANS     1\n#else\n#define TRC_LC_STATE_TRANS     0\n#endif /*CFG_TRC_LC_STATE_TRANS*/\n\n#else /*BT_EMB_PRESENT*/\n\n#define TRC_CS_BT              0\n#define TRC_LMP                0\n#define TRC_LC_STATE_TRANS     0\n\n#endif /*BT_EMB_PRESENT*/\n\n#endif /* CFG_TRC_ALL */\n/// @} TRACER\n#endif /* DBG_TRC_CONFIG_H_ */\n"
  },
  {
    "path": "services/ble_stack/dbg/src/dbg_trc_int.h",
    "content": "#ifndef DBG_TRC_INT_H_\n#define DBG_TRC_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup TRACER\n * @{\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (TRACER_PRESENT)\n#include          // standard definitions\n#include         // boolean\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n///Channel index length\n#define CHANNEL_ID_LEN          1\n\n///lengths of trace packet fields\n#define SEQ_NUM_LEN             2\n#define TIMESTAMP_LEN           4\n#define TRC_CODE_LEN            1\n\n#define TRC_FIX_LEN             \\\n        CHANNEL_ID_LEN          +\\\n        TRC_MSG_HDR_LEN         +\\\n        SEQ_NUM_LEN             +\\\n        TIMESTAMP_LEN           +\\\n        TRC_CODE_LEN\n\n/**\n ****************************************************************************************\n * @brief Convenient wrapper to trc_mem_alloc()\n *\n * This macro calls trc_mem_alloc() passing as parameter the length of the trace packet\n *\n * @param[in] trace_pay        Trace payload length\n *\n * @return Pointer to trace code field(or NULL if the trace cannot be written)\n ****************************************************************************************\n */\n#define TRC_MEM_ALLOC(trace_pay) \\\n        dbg_trc_mem_alloc(TRC_FIX_LEN + trace_pay)\n\ntypedef uint8_t trc_id_t;\ntypedef uint8_t trc_opcode_t;\n\n/*\n * STRUCTURES DEFINITIONS\n ****************************************************************************************\n */\n///Tracer Environment context structure\nstruct dbg_trc_env_tag\n{\n    /// Current tracer configuration word\n    uint32_t curr_cw;\n\n    /// Compiled tracer configuration word\n    uint32_t compiled_cw;\n};\n\n/*\n * GLOBAL VARIABLE DEFINITIONS\n ****************************************************************************************\n */\n///Tracer environment context\nextern struct dbg_trc_env_tag dbg_trc_env;\n\n/*\n * TRANSPORT LAYER FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief   initialize tracer TL\n ****************************************************************************************\n */\nvoid dbg_trc_tl_init();\n\n/**\n ****************************************************************************************\n * @brief   trigger the transmission of tracer packets\n ****************************************************************************************\n */\nvoid dbg_trc_tx_trigger(void);\n\n/*\n * MEMORY FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief   Initialize tracer memory\n ****************************************************************************************\n */\nvoid dbg_trc_mem_init();\n\n/**\n ****************************************************************************************\n * @brief   Try to write a trace in memory.\n * @param[in]  trace_len    Trace packet length (expressed in bytes)\n *\n * @return  Pointer to trace code field(or NULL if the trace cannot be written)\n ****************************************************************************************\n */\nuint8_t *dbg_trc_mem_alloc(uint16_t const trace_len);\n\n/**\n ****************************************************************************************\n * @brief   Try to read a trace from the memory.\n *\n * @return Pointer to the total size of the trace (or NULL if the trace cannot be read)\n ****************************************************************************************\n */\nuint8_t *dbg_trc_mem_read();\n\n/**\n ****************************************************************************************\n * @brief   Deallocate a trace from the memory.\n *\n * This function marks the trace block pointed by the reading pointer as invalid and moves\n * it to the next trace block\n *\n ****************************************************************************************\n */\nvoid dbg_trc_mem_dealloc();\n\n/**\n ****************************************************************************************\n * @brief Initialization of the tracer\n *\n * This function initializes the tracer\n *\n ****************************************************************************************\n */\nvoid dbg_trc_init(bool reset);\n\n#endif /* TRACER_PRESENT */\n/// @} TRACER\n#endif /* DBG_TRC_INT_H_ */\n"
  },
  {
    "path": "services/ble_stack/hci/api/hci_ble.h",
    "content": "#ifndef HCI_H_\n#define HCI_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HCI Host Controller Interface\n * @ingroup ROOT\n * @brief HCI module handling communication between lower and higher layers in split\n * architecture.\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"       // SW configuration\n\n#if (HCI_PRESENT)\n\n#include           // standard definition\n#include           // standard integer\n#include \"co_bt.h\"           // BT standard definitions\n\n#include \"rwip_task.h\"       // Task definitions\n\n#include \"bridge.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n#if (BLE_EMB_PRESENT || BLE_HOST_PRESENT)\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n#define HCI_BLE_CON_SUPPORT   1\n#else // (BLE_CENTRAL || BLE_PERIPHERAL)\n#define HCI_BLE_CON_SUPPORT   0\n#endif // (BLE_CENTRAL || BLE_PERIPHERAL)\n#else //(BLE_EMB_PRESENT || BLE_HOST_PRESENT)\n#define HCI_BLE_CON_SUPPORT   0\n#endif //(BLE_EMB_PRESENT || BLE_HOST_PRESENT)\n\n/// Length of HCI Reset Message\n#define HCI_RESET_MSG_LEN     4\n\n/// HCI Reset Message use to resync.\n#define HCI_RESET_MSG_BUF    {HCI_CMD_MSG_TYPE, (HCI_RESET_CMD_OPCODE & 0xFF), ((HCI_RESET_CMD_OPCODE >> 8) & 0xFF), 0}\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Message API of the HCI task\nenum HCI_MSG\n{\n    HCI_MSG_ID_FIRST = TASK_FIRST_MSG(TASK_ID_HCI),\n\n    HCI_CMD_CMP_EVENT,\n    HCI_CMD_STAT_EVENT,\n    HCI_EVENT,\n    HCI_LE_EVENT,\n\n    HCI_COMMAND,\n\n    #if (HCI_BLE_CON_SUPPORT)\n    HCI_BLE_ACL_DATA_RX,\n    HCI_BLE_ACL_DATA_TX,\n    #endif // (HCI_BLE_CON_SUPPORT)\n\n    #if BT_EMB_PRESENT\n    HCI_BT_ACL_DATA_TX,\n    HCI_BT_ACL_DATA_RX,\n    #if VOICE_OVER_HCI\n    HCI_BT_SYNC_DATA_TX,\n    HCI_BT_SYNC_DATA_RX,\n    #endif //VOICE_OVER_HCI\n    #endif //BT_EMB_PRESENT\n\n    HCI_TCI_LMP,\n\n    HCI_DBG_EVT,\n\n    HCI_MSG_ID_LAST\n};\n\n/// Status of HCI command header processing\nenum HCI_CMD_HDR\n{\n    /// Header is correct\n    HCI_CMD_HDR_STATUS_OK,\n    /// Opcode is unknown\n    HCI_CMD_HDR_STATUS_UNKNOWN,\n    /// Header is not correct\n    HCI_CMD_HDR_STATUS_FAIL\n};\n\n\n\n///HCI Command header components structure\nstruct hci_cmd_hdr\n{\n    /// Opcode field\n    uint16_t opcode;\n    ///Parameter length - the number of bytes of the command parameters\n    uint8_t parlen;\n};\n\n///HCI ACL data packets header structure\nstruct hci_acl_hdr\n{\n    ///Connection handle & Data Flags\n    uint16_t hdl_flags;\n    ///Data length in number of bytes\n    uint16_t datalen;\n};\n\n#if (BT_EMB_PRESENT)\n#if (VOICE_OVER_HCI)\n///HCI synchronous data packets header structure\nstruct hci_sync_hdr\n{\n    /// Connection handle & Data Flags\n    uint16_t conhdl_flags;\n    /// Data total length in number of bytes\n    uint8_t data_total_len;\n};\n#endif // (VOICE_OVER_HCI)\n#endif // (BT_EMB_PRESENT)\n\n///HCI Event header components structure - contains all details possible in an event\nstruct hci_evt_hdr\n{\n    ///Event code\n    uint8_t  code;\n    ///Event parameters length\n    uint8_t  parlen;\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n****************************************************************************************\n* @brief Initialize HCI (including transport)\n*****************************************************************************************\n*/\nvoid hci_init(bool reset);\n\n#if (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n/**\n ****************************************************************************************\n * @brief Function called when an internal task needs to send a HCI message to Host\n *\n * This function decides whether the message is sent externally onto HCI Transport Layer\n * or redirected into an internal task of the other side of the HCI.\n *\n * The input message ID, length and parameters must be filled.\n * In case the message is an HCI command or event, the source ID must be filled with the\n * command opcode or event code.\n * In case the message concerns a particular BT or BLE link, the destination ID must be\n * filled with the associated link ID.\n *\n * @param[in]  param   Pointer to the parameters of the Kernel message carrying the HCI message\n *****************************************************************************************\n */\nvoid hci_send_2_host(void *param);\n#endif // (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n\n#if BLE_HOST_PRESENT\n/**\n ****************************************************************************************\n * @brief Function called when an internal task needs to send a HCI message to Controller\n *\n * This function decides whether the message is sent externally onto HCI Transport Layer\n * or redirected into an internal task of the other side of the HCI.\n *\n * The input message ID, length and parameters must be filled.\n * In case the message is an HCI command or event, the source ID must be filled with the\n * command opcode or event code.\n * In case the message concerns a particular BT or BLE link, the destination ID must be\n * filled with the associated link ID.\n *\n * @param[in]  param   Pointer to the parameters of the Kernel message carrying the HCI message\n *****************************************************************************************\n */\nvoid hci_send_2_controller(void *param);\n\n/**\n ****************************************************************************************\n * @brief function used to send a basic command, without parameters to the controller.\n *\n * @param[in] opcode Operation code of the command\n *****************************************************************************************\n */\nvoid hci_basic_cmd_send_2_controller(uint16_t opcode);\n#endif //BLE_HOST_PRESENT\n\n#if (BLE_EMB_PRESENT && HCI_BLE_CON_SUPPORT)\n/**\n ****************************************************************************************\n * @brief Register connection handle for a BLE connection\n *\n * @param[in]  link_id  BLE connection link ID\n *****************************************************************************************\n */\nvoid hci_ble_conhdl_register(uint8_t link_id);\n\n/**\n ****************************************************************************************\n * @brief Unregister a BLE connection\n *\n * @param[in]  link_id  BLE connection link ID\n *****************************************************************************************\n */\nvoid hci_ble_conhdl_unregister(uint8_t link_id);\n#endif //(BLE_EMB_PRESENT && !BLE_HOST_PRESENT && HCI_BLE_CON_SUPPORT)\n\n#if (BT_EMB_PRESENT)\n/**\n ****************************************************************************************\n * @brief Register BD address for a BT ACL connection\n *\n * @param[in]  link_id  BT ACL connection link ID\n * @param[in]  bd_addr  Pointer to the device BD address associated to the connection\n *****************************************************************************************\n */\nvoid hci_bt_acl_bdaddr_register(uint8_t link_id, struct bd_addr* bd_addr);\n/**\n ****************************************************************************************\n * @brief Register connection handle for a BT ACL connection\n *\n * @param[in]  link_id  BT ACL connection link ID\n *****************************************************************************************\n */\nvoid hci_bt_acl_conhdl_register(uint8_t link_id);\n\n/**\n ****************************************************************************************\n * @brief Unregister a BT ACL connection\n *\n * @param[in]  link_id  BT ACL connection link ID\n *****************************************************************************************\n */\nvoid hci_bt_acl_bdaddr_unregister(uint8_t link_id);\n\n#endif //(BT_EMB_PRESENT)\n\n/**\n ****************************************************************************************\n * @brief Set the event mask\n *\n * @param[in] evt_msk Pointer to the new event mask\n * @param[in] page indicate which event page should be changed\n *\n * @return The status of the event mask saving\n *****************************************************************************************\n */\nuint8_t hci_evt_mask_set(struct evt_mask const *evt_msk, uint8_t page);\n\n#if (BT_EMB_PRESENT)\n/**\n ****************************************************************************************\n * @brief Add an event filter according to the parameters of the HCI command\n *\n * Note: the consistency of the parameters according to the input has already been checked by HCI during the special\n * unpacking.\n *\n * @param[in] param      Pointer to the HCI parameter\n *\n * @return The status of the filter addition\n *****************************************************************************************\n */\nuint8_t hci_evt_filter_add(struct hci_set_evt_filter_cmd const *param);\n\n#if (MAX_NB_SYNC > 0)\n/**\n ****************************************************************************************\n * @brief Get voice setting (for SCO auto-accept via event filter)\n *\n * @return   Voice settings\n *****************************************************************************************\n */\nuint16_t hci_voice_settings_get(void);\n\n/**\n ****************************************************************************************\n * @brief Set voice setting (for SCO auto-accept via event filter)\n *\n * @param[in]   voice_settings    Voice settings\n *\n * @return   Status (0: Success | Others: failure)\n *****************************************************************************************\n */\nuint8_t hci_voice_settings_set(uint16_t voice_settings);\n#endif // (MAX_NB_SYNC > 0)\n#endif //(BT_EMB_PRESENT)\n\n#if (HCI_TL_SUPPORT)\n#if  (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n/**\n ****************************************************************************************\n * @brief Get the maximum parameter size for a specific command\n *\n * This function is used by TL to know the theoretical maximum parameters size for a\n * specific HCI command.\n * Note: if the command is not supported by HCI (unknown), the maximum possible value of\n * 255 bytes is returned.\n *\n * @param[in]  opcode  Opcode received\n *\n * @return     The command maximum parameters size / 255 if command is unknown\n *****************************************************************************************\n */\nuint8_t hci_cmd_get_max_param_size(uint16_t opcode);\n\n/**\n ****************************************************************************************\n * @brief Indicates that a HCI command has been received\n *\n * This function is used by TL to indicate the reception of a HCI command.\n *\n * @param[in]  opcode   Command Opcode\n * @param[in]  length   Parameters length\n * @param[in]  payload  Pointer to payload\n *****************************************************************************************\n */\nvoid hci_cmd_received(uint16_t opcode, uint8_t length, uint8_t *payload);\n\n/**\n ****************************************************************************************\n * @brief Allocates the reception buffer for ACL TX data\n *\n * @param[in]   hdl_flags Connection handle and data flags from HCI ACL packet header\n * @param[in]   len       Length to receive (from HCI ACL packet header)\n *\n * @return   Buffer for data reception (NULL if not possible to allocate one)\n *****************************************************************************************\n */\nuint8_t* hci_acl_tx_data_alloc(uint16_t hdl_flags, uint16_t len);\n\n/**\n ****************************************************************************************\n * @brief Indicates that a HCI ACL TX data packet has been received\n *\n * This function is used by TL to indicate the reception of a HCI ACL TX data.\n *\n * @param[in]   hdl_flags Connection handle and data flags from HCI ACL packet header\n * @param[out]  datalen   Data length\n * @param[in]   payload   Pointer to payload\n *****************************************************************************************\n */\nvoid hci_acl_tx_data_received(uint16_t hdl_flags, uint16_t datalen, uint8_t * payload);\n\n#if (BT_EMB_PRESENT)\n#if (VOICE_OVER_HCI)\n/**\n ****************************************************************************************\n * @brief Allocates the reception buffer for Sync TX data\n *\n * @param[in]   conhdl_flags    Connection handle and data flags from HCI Sync packet header\n * @param[in]   len             Length to receive (from HCI Sync packet header)\n *\n * @return   Buffer for data reception (NULL if not possible to allocate one)\n *****************************************************************************************\n */\nuint8_t* hci_sync_tx_data_alloc(uint16_t conhdl_flags, uint8_t len);\n\n/**\n ****************************************************************************************\n * @brief Indicates that a HCI Sync TX data packet has been received\n *\n * This function is used by TL to indicate the reception of a HCI Sync TX data.\n *\n * @param[in]   conhdl_flags    Connection handle and data flags from HCI Sync packet header\n * @param[in]   len             Length to receive (from HCI Sync packet header)\n * @param[in]   payload         Pointer to payload\n *****************************************************************************************\n */\nvoid hci_sync_tx_data_received(uint16_t conhdl_flags, uint8_t len, uint8_t * payload);\n#endif // (VOICE_OVER_HCI)\n#endif // (BT_EMB_PRESENT)\n#endif // (BLE_EMB_PRESENT || BT_EMB_PRESENT)\n\n#if ((BLE_HOST_PRESENT) && (!BLE_EMB_PRESENT))\n/**\n ****************************************************************************************\n * @brief Allocates the reception buffer for ACL RX data\n *\n * @param[in]   hdl_flags Connection handle and data flags from HCI ACL RX packet header\n * @param[in]   len       Length to receive (from HCI ACL packet header)\n *\n * @return   Buffer for data reception (NULL if not possible to allocate one)\n *****************************************************************************************\n */\nuint8_t* hci_acl_rx_data_alloc(uint16_t hdl_flags, uint16_t len);\n\n/**\n ****************************************************************************************\n * @brief Indicates that a HCI ACL RX data packet has been received\n *\n * This function is used by TL to indicate the reception of a HCI ACL RX data.\n *\n * @param[in]   hdl_flags Connection handle and data flags from HCI ACL packet header\n * @param[out]  datalen   Data length\n * @param[in]   payload   Pointer to payload\n *****************************************************************************************\n */\n//void hci_acl_rx_data_received(uint16_t hdl_flags, uint16_t datalen, uint8_t * payload);\nvoid hci_acl_rx_data_received_payload(uint16_t hdl_flags, uint16_t datalen, uint8_t *payload, uint8_t *priv);\nvoid hci_acl_rx_data_received(uint16_t hdl_flags, uint16_t datalen, BridgeBuffer *briBuffer);\n\n/**\n ****************************************************************************************\n * @brief Indicates that a HCI event has been received\n *\n * This function is used by TL to indicate the reception of a HCI event.\n *\n * @param[in]  code     Event code\n * @param[in]  length   Parameters length\n * @param[in]  payload  Pointer to payload\n *\n * @return status of receive operation\n *****************************************************************************************\n */\n//uint8_t hci_evt_received(uint8_t code, uint8_t length, uint8_t *payload);\nuint8_t hci_evt_received_payload(uint8_t code, uint8_t length, uint8_t *payload);\nuint8_t hci_evt_received(uint8_t code, uint8_t length, BridgeBuffer *briBuffer);\n\n/**\n ****************************************************************************************\n * @brief Check if passing command opcode is supported by ble stack\n *\n * This function is used to check if passing command opcode is supported by ble stack\n *\n * @param[in]  opcode Command Opcode\n *\n * @return 1 if supported or 0\n *****************************************************************************************\n */\nuint8_t hci_is_cmd_opcode_supported(uint16_t opcode);\n\n#endif // ((BLE_HOST_PRESENT) && (!BLE_EMB_PRESENT))\n\n#endif // HCI_TL_SUPPORT\n\n//common for both BLE & BT\n/**\n ****************************************************************************************\n * @brief  process HostBufferSize\n *\n * @param[in] acl_pkt_len     ACL packet length\n * @param[in] nb_acl_pkts     Number of ACL packets\n *\n * @return status\n *****************************************************************************************\n */\nuint8_t hci_fc_acl_buf_size_set(uint16_t acl_pkt_len, uint16_t nb_acl_pkts);\n/**\n ****************************************************************************************\n * @brief  process HostBufferSize\n *\n * @param[in] sync_pkt_len    SYNC packet length\n * @param[in] nb_sync_pkts    Number of SYNC packets\n *\n * @return status\n *****************************************************************************************\n */\nuint8_t hci_fc_sync_buf_size_set(uint8_t sync_pkt_len, uint16_t nb_sync_pkts);\n\n/**\n ****************************************************************************************\n * @brief set the state of the ACL flow control\n *\n * @param[in] flow_enable   boolean state of control\n *\n * @return status\n *****************************************************************************************\n */\nuint8_t hci_fc_acl_en(bool flow_enable);\n\n/**\n ****************************************************************************************\n * @brief set the state of the SYNC flow control\n *\n * @param[in] flow_enable   boolean state of control\n *****************************************************************************************\n */\nvoid hci_fc_sync_en(bool flow_enable);\n\n/**\n ****************************************************************************************\n * @brief update data packet counters according to HostNumberOfCompletePackets\n *\n * @param[in] acl_pkt_nb     accumulated number for ACL handles\n ***************************************************************************************a**\n */\nvoid hci_fc_host_nb_acl_pkts_complete(uint16_t acl_pkt_nb);\n\n/**\n ****************************************************************************************\n * @brief update data packet counters according to HostNumberOfCompletePackets\n *\n * @param[in] sync_pkt_nb    accumulated number for SCO handles\n ***************************************************************************************a**\n */\nvoid hci_fc_host_nb_sync_pkts_complete(uint16_t sync_pkt_nb);\n\n#endif //HCI_PRESENT\n\n/// @} HCI\n\n#endif // HCI_H_\n"
  },
  {
    "path": "services/ble_stack/hci/src/hci_int.h",
    "content": "#ifndef HCI_INT_H_\n#define HCI_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup HCI Host Controller Interface\n *@{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"       // SW configuration\n\n#if (HCI_PRESENT)\n\n#include           // standard definition\n#include           // standard integer\n#include \"co_bt.h\"           // BT standard definitions\n\n#include \"hci_ble.h\"\n#include \"ke_msg.h\"          // Kernel message definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Macro to get OCF of a known command\n#define OCF(cmd)        (HCI_OP2OCF(HCI_##cmd##_CMD_OPCODE))\n\n/// Unknown opcode identifier\n#define HCI_OPCODE_UNKNOWN                 0xFFFF\n\n/**\n * Destination field decoding\n *\n * bit |     7 6      | 5 4 | 3..0 |\n * def | Rsvd (pkupk) |  HL |  LL  |\n */\n#define HCI_CMD_DEST_LL_POS           0\n#define HCI_CMD_DEST_LL_MASK          0x0F\n#define HCI_CMD_DEST_HL_POS           4\n#define HCI_CMD_DEST_HL_MASK          0x30\n\n/**\n * Destination field decoding\n *\n * bit | 7..2 | 1 0 |\n * def | Rsvd |  HL |\n */\n#define HCI_EVT_DEST_HL_POS           0\n#define HCI_EVT_DEST_HL_MASK          0x03\n\n#if (HCI_TL_SUPPORT)\n\n/// Special Pack-Unpack settings for HCI commands (parameters and return parameters)\n/**\n * Special Pack-Unpack settings for HCI commands (parameters and return parameters)\n *\n * bit |    7    |  6  | 5..0 |\n * def | RET PAR | PAR | Rsvd |\n */\n#define HCI_CMD_DEST_SPEC_PAR_PK_POS        6\n#define HCI_CMD_DEST_SPEC_PAR_PK_MSK        0x40\n#define HCI_CMD_DEST_SPEC_RET_PAR_PK_POS    7\n#define HCI_CMD_DEST_SPEC_RET_PAR_PK_MSK    0x80\n#define PK_GEN_GEN   (0x00)\n#define PK_GEN_SPE   (HCI_CMD_DEST_SPEC_RET_PAR_PK_MSK)\n#define PK_SPE_GEN   (HCI_CMD_DEST_SPEC_PAR_PK_MSK)\n#define PK_SPE_SPE   (HCI_CMD_DEST_SPEC_RET_PAR_PK_MSK | HCI_CMD_DEST_SPEC_PAR_PK_MSK)\n\n/// Special Pack settings for HCI events\n#define PK_GEN           0x00\n#define PK_SPE           0x01\n\n/// Macro for building a command descriptor in split mode (with parameters packing/unpacking)\n#define CMD(opcode, dest_ll, dest_hl, pkupk, par_size_max, par_fmt, ret_fmt)  {HCI_##opcode##_CMD_OPCODE, (dest_ll< 0)\n    /**\n     * Voice settings used when SCO connection is auto-accepted\n     */\n    uint16_t voice_settings;\n    #endif //(MAX_NB_SYNC > 0)\n\n    /**\n     * Auto-reject flag, used to filter the complete event when a request has been auto-rejected\n     */\n    bool auto_reject;\n\n    #elif (BLE_HOST_PRESENT && !BLE_EMB_PRESENT && (BLE_CENTRAL || BLE_PERIPHERAL))\n    /// Link association table for BLE link-oriented messages routing\n    struct hci_ble_acl_con_tag ble_acl_con_tab[BLE_CONNECTION_MAX];\n\n    #endif //(BT_EMB_PRESENT)\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n#if BLE_HOST_PRESENT\nextern const uint8_t hl_task_type[];\n#endif //BLE_HOST_PRESENT\n\n///HCI environment context\nextern struct hci_env_tag hci_env;\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n****************************************************************************************\n* @brief Look for a command descriptor that could match with the specified opcode\n*\n* @param[in]  opcode   Command opcode\n*\n* @return     Pointer the command descriptor (NULL if not found)\n*****************************************************************************************\n*/\nconst struct hci_cmd_desc_tag* hci_look_for_cmd_desc(uint16_t opcode);\n\n/**\n****************************************************************************************\n* @brief Look for an event descriptor that could match with the specified event code\n*\n* @param[in]  code   event code\n*\n* @return     Pointer the event descriptor (NULL if not found)\n*****************************************************************************************\n*/\nconst struct hci_evt_desc_tag* hci_look_for_evt_desc(uint8_t code);\n\n\n/**\n****************************************************************************************\n* @brief Look for an event descriptor that could match with the specified DBG subcode\n*\n* @param[in]  subcode   DBG event subcode\n*\n* @return     Pointer the event descriptor (NULL if not found)\n*****************************************************************************************\n*/\nconst struct hci_evt_desc_tag* hci_look_for_dbg_evt_desc(uint8_t subcode);\n\n#if (BLE_EMB_PRESENT || BLE_HOST_PRESENT)\n/**\n****************************************************************************************\n* @brief Look for an event descriptor that could match with the specified LE subcode\n*\n* @param[in]  subcode   LE event subcode\n*\n* @return     Pointer the event descriptor (NULL if not found)\n*****************************************************************************************\n*/\nconst struct hci_evt_desc_tag* hci_look_for_le_evt_desc(uint8_t subcode);\n\n#endif //(BLE_EMB_PRESENT || BLE_HOST_PRESENT)\n\n#if (HCI_TL_SUPPORT)\n/**\n ****************************************************************************************\n * @brief Initialize HIC TL part\n *****************************************************************************************\n */\nvoid hci_tl_init(bool reset);\n\n/**\n ****************************************************************************************\n * @brief Send an HCI message over TL\n *\n * @param[in]   msg   Kernel message carrying the HCI message\n *****************************************************************************************\n */\nvoid hci_tl_send(struct ke_msg *msg);\n#endif //(HCI_TL_SUPPORT)\n\n/**\n ****************************************************************************************\n * @brief Initialize Flow Control Structure\n *\n *****************************************************************************************\n */\nvoid hci_fc_init(void);\n\n/**\n ****************************************************************************************\n * @brief count ACL packets sent to Host\n *\n *****************************************************************************************\n */\nvoid hci_fc_acl_packet_sent(void);\n\n/**\n ****************************************************************************************\n * @brief count SCO packets sent to Host\n *\n *****************************************************************************************\n */\nvoid hci_fc_sync_packet_sent(void);\n\n/**\n ****************************************************************************************\n * @brief Calculate number of ACL packets slots available on Host side\n *\n * @return number of packets available\n *****************************************************************************************\n */\nuint16_t hci_fc_check_host_available_nb_acl_packets(void);\n\n/**\n ****************************************************************************************\n * @brief Calculate number of SCO packets slots available on Host side\n *\n * @return number of packets available\n *****************************************************************************************\n */\nuint16_t hci_fc_check_host_available_nb_sync_packets(void);\n\n\n#endif //HCI_PRESENT\n\n/// @} HCI\n\n#endif // HCI_INT_H_\n"
  },
  {
    "path": "services/ble_stack/hl/api/att.h",
    "content": "#ifndef ATT_H_\n#define ATT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ATT Attribute Protocol\n * @ingroup HOST\n * @brief Attribute Protocol.\n *\n * The ATT block contains the procedures for discovering, reading, writing\n * and indicating attributes to peer device . It also defines a number of items\n * that caters to the security aspect of the block as access to some information\n * may require both authorization and an authenticated and encrypted physical\n * link before an attribute can be read or written\n *\n * @{\n *\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Macro used to convert CPU integer define to LSB first 16-bits UUID\n#define ATT_UUID_16(uuid)                          (uuid)\n\n/// Invalid attribute handle\n#define ATT_INVALID_HDL                            (0x0000)\n/// Invalid attribute idx (used for profiles)\n#define ATT_INVALID_IDX                            (0xff)\n\n#define ATT_1ST_REQ_START_HDL                      0x0001\n#define ATT_1ST_REQ_END_HDL                        0xFFFF\n\n/// Maximum possible attribute handle\n#define ATT_MAX_ATTR_HDL                           ATT_1ST_REQ_END_HDL\n\n/// Offset of value in signed PDU\n#define ATT_SIGNED_PDU_VAL_OFFSET               0x03\n\n/// Attribute Features\n#define ATT_SERVER_CONFIG                       0x0001\n#define ATT_SERVICE_DISC                        0x0002\n#define ATT_RELATIONSHIP_DISC                   0x0004\n#define ATT_CHAR_DISC                           0x0008\n#define ATT_CHAR_DESC_DISC                      0x0010\n#define ATT_RD_CHAR_VALUE                       0x0020\n#define ATT_WR_CHAR_VALUE                       0x0040\n#define ATT_NOTIF_CHAR_VALUE                    0x0080\n#define ATT_IND_CHAR_VALUE                      0x0100\n#define ATT_RD_CHAR_DESC                        0x0200\n#define ATT_WR_CHAR_DESC                        0x0400\n\n/// Length, number, offset defines\n#define ATT_SVC_VALUE_MAX_LEN                   0x0030\n#define ATT_CHAR_NAME_MAX_LEN                   0x0030\n#define ATT_UUID_16_LEN                         0x0002\n#define ATT_UUID_32_LEN                         0x0004\n#define ATT_UUID_128_LEN                        0x0010\n\n/// offset - l2cap header and ATT code\n#define ATT_PDU_DATA_OFFSET                     0x05\n\n/// Characteristic Properties Bit\n#define ATT_CHAR_PROP_BCAST                     0x01\n#define ATT_CHAR_PROP_RD                        0x02\n#define ATT_CHAR_PROP_WR_NO_RESP                0x04\n#define ATT_CHAR_PROP_WR                        0x08\n#define ATT_CHAR_PROP_NTF                       0x10\n#define ATT_CHAR_PROP_IND                       0x20\n#define ATT_CHAR_PROP_AUTH                      0x40\n#define ATT_CHAR_PROP_EXT_PROP                  0x80\n/// Invalid Attribute Handle\n#define ATT_INVALID_SEARCH_HANDLE               0x0000\n#define ATT_INVALID_HANDLE                      0x0000\n/// Read Information Request\n#define ATT_UUID_FILTER_0                       0x00\n#define ATT_UUID_FILTER_2                       0x02\n#define ATT_UUID_FILTER_16                      0x10\n/// Read Information Response\n#define ATT_FORMAT_LEN                          0x0001\n#define ATT_FORMAT_16BIT_UUID                   0x01\n#define ATT_FORMAT_128BIT_UUID                  0x02\n/// For No fix length PDU\n#define ATT_HANDLE_LEN                          0x0002\n#define ATT_EACHLEN_LEN                         0x0001\n#define ATT_PROP_LEN                            0x0001\n#define ATT_CODE_LEN                            0x0001\n#define ATT_CODE_AND_DATA_LEN                   0x0002\n#define ATT_CODE_AND_HANDLE_LEN                 0x0003\n#define ATT_CODE_AND_HANDLE_LEN_AND_OFFSET      0x0005\n#define ATT_SIGNATURE_LEN                       0x0C\n\n/// extended characteristics\n#define ATT_EXT_RELIABLE_WRITE                  0x0001\n#define ATT_EXT_WRITABLE_AUX                    0x0002\n#define ATT_EXT_RFU                             0xFFFC\n\n/// PDU size for error response\n#define ATT_ERROR_RESP_LEN                      0x05\n\n/// Offset of value in signed PDU\n#define ATT_SIGNED_PDU_VAL_OFFSET               0x03\n\n\n\n#define ATT_BT_UUID_128 {0xFB, 0x34, 0x9B, 0x5F, 0x80, 0x00, 0x00, 0x80, \\\n                          0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}\n\n\n\n/* Attribute Specification Defines */\n\n/// Common 16-bit Universal Unique Identifier\nenum {\n    ATT_INVALID_UUID                            = ATT_UUID_16(0x0000),\n    /*----------------- SERVICES ---------------------*/\n    /// Generic Access Profile\n    ATT_SVC_GENERIC_ACCESS                      = ATT_UUID_16(0x1800),\n    /// Attribute Profile\n    ATT_SVC_GENERIC_ATTRIBUTE                   = ATT_UUID_16(0x1801),\n    /// Immediate alert Service\n    ATT_SVC_IMMEDIATE_ALERT                     = ATT_UUID_16(0x1802),\n    /// Link Loss Service\n    ATT_SVC_LINK_LOSS                           = ATT_UUID_16(0x1803),\n    /// Tx Power Service\n    ATT_SVC_TX_POWER                            = ATT_UUID_16(0x1804),\n    /// Current Time Service Service\n    ATT_SVC_CURRENT_TIME                        = ATT_UUID_16(0x1805),\n    /// Reference Time Update Service\n    ATT_SVC_REF_TIME_UPDATE                     = ATT_UUID_16(0x1806),\n    /// Next DST Change Service\n    ATT_SVC_NEXT_DST_CHANGE                     = ATT_UUID_16(0x1807),\n    /// Glucose Service\n    ATT_SVC_GLUCOSE                             = ATT_UUID_16(0x1808),\n    /// Health Thermometer Service\n    ATT_SVC_HEALTH_THERMOM                      = ATT_UUID_16(0x1809),\n    /// Device Information Service\n    ATT_SVC_DEVICE_INFO                         = ATT_UUID_16(0x180A),\n    /// Heart Rate Service\n    ATT_SVC_HEART_RATE                          = ATT_UUID_16(0x180D),\n    /// Phone Alert Status Service\n    ATT_SVC_PHONE_ALERT_STATUS                  = ATT_UUID_16(0x180E),\n    /// Battery Service\n    ATT_SVC_BATTERY_SERVICE                     = ATT_UUID_16(0x180F),\n    /// Blood Pressure Service\n    ATT_SVC_BLOOD_PRESSURE                      = ATT_UUID_16(0x1810),\n    /// Alert Notification Service\n    ATT_SVC_ALERT_NTF                           = ATT_UUID_16(0x1811),\n    /// HID Service\n    ATT_SVC_HID                                 = ATT_UUID_16(0x1812),\n    /// Scan Parameters Service\n    ATT_SVC_SCAN_PARAMETERS                     = ATT_UUID_16(0x1813),\n    /// Running Speed and Cadence Service\n    ATT_SVC_RUNNING_SPEED_CADENCE               = ATT_UUID_16(0x1814),\n    /// Cycling Speed and Cadence Service\n    ATT_SVC_CYCLING_SPEED_CADENCE               = ATT_UUID_16(0x1816),\n    /// Cycling Power Service\n    ATT_SVC_CYCLING_POWER                       = ATT_UUID_16(0x1818),\n    /// Location and Navigation Service\n    ATT_SVC_LOCATION_AND_NAVIGATION             = ATT_UUID_16(0x1819),\n    /// Environmental Sensing Service\n    ATT_SVC_ENVIRONMENTAL_SENSING               = ATT_UUID_16(0x181A),\n    /// Body Composition Service\n    ATT_SVC_BODY_COMPOSITION                    = ATT_UUID_16(0x181B),\n    /// User Data Service\n    ATT_SVC_USER_DATA                           = ATT_UUID_16(0x181C),\n    /// Weight Scale Service\n    ATT_SVC_WEIGHT_SCALE                        = ATT_UUID_16(0x181D),\n    /// Bond Management Service\n    ATT_SVC_BOND_MANAGEMENT                     = ATT_UUID_16(0x181E),\n    /// Continuous Glucose Monitoring Service\n    ATT_SVC_CONTINUOUS_GLUCOSE_MONITORING       = ATT_UUID_16(0x181F),\n    /// Internet Protocol Support Service\n    ATT_SVC_IP_SUPPORT                          = ATT_UUID_16(0x1820),\n    /// Indoor Positioning Service\n    ATT_SVC_INDOOR_POSITIONING                  = ATT_UUID_16(0x1821),\n    /// Pulse Oximeter Service\n    ATT_SVC_PULSE_OXIMETER                      = ATT_UUID_16(0x1822),\n    /// HTTP Proxy Service\n    ATT_SVC_HTTP_PROXY                          = ATT_UUID_16(0x1823),\n    /// Transport Discovery Service\n    ATT_SVC_TRANSPORT_DISCOVERY                 = ATT_UUID_16(0x1824),\n    /// Object Transfer Service\n    ATT_SVC_OBJECT_TRANSFER                     = ATT_UUID_16(0x1825),\n\n    /*------------------- UNITS ---------------------*/\n    /// No defined unit\n    ATT_UNIT_UNITLESS                           = ATT_UUID_16(0x2700),\n    /// Length Unit - Metre\n    ATT_UNIT_METRE                              = ATT_UUID_16(0x2701),\n    ///Mass unit - Kilogram\n    ATT_UNIT_KG                                 = ATT_UUID_16(0x2702),\n    ///Time unit - second\n    ATT_UNIT_SECOND                             = ATT_UUID_16(0x2703),\n    ///Electric current unit - Ampere\n    ATT_UNIT_AMPERE                             = ATT_UUID_16(0x2704),\n    ///Thermodynamic Temperature unit - Kelvin\n    ATT_UNIT_KELVIN                             = ATT_UUID_16(0x2705),\n    /// Amount of substance unit - mole\n    ATT_UNIT_MOLE                               = ATT_UUID_16(0x2706),\n    ///Luminous intensity unit - candela\n    ATT_UNIT_CANDELA                            = ATT_UUID_16(0x2707),\n    ///Area unit - square metres\n    ATT_UNIT_SQ_METRE                           = ATT_UUID_16(0x2710),\n    ///Colume unit - cubic metres\n    ATT_UNIT_CUBIC_METRE                        = ATT_UUID_16(0x2710),\n    ///Velocity unit - metres per second\n    ATT_UNIT_METRE_PER_SECOND                   = ATT_UUID_16(0x2711),\n    ///Acceleration unit - metres per second squared\n    ATT_UNIT_METRES_PER_SEC_SQ                  = ATT_UUID_16(0x2712),\n    ///Wavenumber unit - reciprocal metre\n    ATT_UNIT_RECIPROCAL_METRE                   = ATT_UUID_16(0x2713),\n    ///Density unit - kilogram per cubic metre\n    ATT_UNIT_DENS_KG_PER_CUBIC_METRE            = ATT_UUID_16(0x2714),\n    ///Surface density unit - kilogram per square metre\n    ATT_UNIT_KG_PER_SQ_METRE                    = ATT_UUID_16(0x2715),\n    ///Specific volume unit - cubic metre per kilogram\n    ATT_UNIT_CUBIC_METRE_PER_KG                 = ATT_UUID_16(0x2716),\n    ///Current density unit - ampere per square metre\n    ATT_UNIT_AMPERE_PER_SQ_METRE                = ATT_UUID_16(0x2717),\n    ///Magnetic field strength unit - Ampere per metre\n    ATT_UNIT_AMPERE_PER_METRE                   = ATT_UUID_16(0x2718),\n    ///Amount concentration unit - mole per cubic metre\n    ATT_UNIT_MOLE_PER_CUBIC_METRE               = ATT_UUID_16(0x2719),\n    ///Mass Concentration unit - kilogram per cubic metre\n    ATT_UNIT_MASS_KG_PER_CUBIC_METRE            = ATT_UUID_16(0x271A),\n    ///Luminance unit - candela per square metre\n    ATT_UNIT_CANDELA_PER_SQ_METRE               = ATT_UUID_16(0x271B),\n    ///Refractive index unit\n    ATT_UNIT_REFRACTIVE_INDEX                   = ATT_UUID_16(0x271C),\n    ///Relative permeability unit\n    ATT_UNIT_RELATIVE_PERMEABILITY              = ATT_UUID_16(0x271D),\n    ///Plane angle unit - radian\n    ATT_UNIT_RADIAN                             = ATT_UUID_16(0x2720),\n    ///Solid angle unit - steradian\n    ATT_UNIT_STERADIAN                          = ATT_UUID_16(0x2721),\n    ///Frequency unit - Hertz\n    ATT_UNIT_HERTZ                              = ATT_UUID_16(0x2722),\n    ///Force unit - Newton\n    ATT_UNIT_NEWTON                             = ATT_UUID_16(0x2723),\n    ///Pressure unit - Pascal\n    ATT_UNIT_PASCAL                             = ATT_UUID_16(0x2724),\n    ///Energy unit - Joule\n    ATT_UNIT_JOULE                              = ATT_UUID_16(0x2725),\n    ///Power unit - Watt\n    ATT_UNIT_WATT                               = ATT_UUID_16(0x2726),\n    ///electric Charge unit - Coulomb\n    ATT_UNIT_COULOMB                            = ATT_UUID_16(0x2727),\n    ///Electric potential difference - Volt\n    ATT_UNIT_VOLT                               = ATT_UUID_16(0x2728),\n    ///Capacitance unit - Farad\n    ATT_UNIT_FARAD                              = ATT_UUID_16(0x2729),\n    ///electric resistance unit - Ohm\n    ATT_UNIT_OHM                                = ATT_UUID_16(0x272A),\n    ///Electric conductance - Siemens\n    ATT_UNIT_SIEMENS                            = ATT_UUID_16(0x272B),\n    ///Magnetic flux unit - Weber\n    ATT_UNIT_WEBER                              = ATT_UUID_16(0x272C),\n    ///Magnetic flux density unit - Tesla\n    ATT_UNIT_TESLA                              = ATT_UUID_16(0x272D),\n    ///Inductance unit - Henry\n    ATT_UNIT_HENRY                              = ATT_UUID_16(0x272E),\n    ///Temperature unit - degree Celsius\n    ATT_UNIT_CELSIUS                            = ATT_UUID_16(0x272F),\n    ///Luminous flux unit - lumen\n    ATT_UNIT_LUMEN                              = ATT_UUID_16(0x2730),\n    ///Illuminance unit - lux\n    ATT_UNIT_LUX                                = ATT_UUID_16(0x2731),\n    ///Activity referred to a radionuclide unit - becquerel\n    ATT_UNIT_BECQUEREL                          = ATT_UUID_16(0x2732),\n    ///Absorbed dose unit - Gray\n    ATT_UNIT_GRAY                               = ATT_UUID_16(0x2733),\n    ///Dose equivalent unit - Sievert\n    ATT_UNIT_SIEVERT                            = ATT_UUID_16(0x2734),\n    ///Catalytic activity unit - Katal\n    ATT_UNIT_KATAL                              = ATT_UUID_16(0x2735),\n    ///Synamic viscosity unit - Pascal second\n    ATT_UNIT_PASCAL_SECOND                      = ATT_UUID_16(0x2740),\n    ///Moment of force unit - Newton metre\n    ATT_UNIT_NEWTON_METRE                       = ATT_UUID_16(0x2741),\n    ///surface tension unit - Newton per metre\n    ATT_UNIT_NEWTON_PER_METRE                   = ATT_UUID_16(0x2742),\n    ///Angular velocity unit - radian per second\n    ATT_UNIT_RADIAN_PER_SECOND                  = ATT_UUID_16(0x2743),\n    ///Angular acceleration unit - radian per second squared\n    ATT_UNIT_RADIAN_PER_SECOND_SQ               = ATT_UUID_16(0x2744),\n    ///Heat flux density unit - Watt per square metre\n    ATT_UNIT_WATT_PER_SQ_METRE                  = ATT_UUID_16(0x2745),\n    ///HEat capacity unit - Joule per Kelvin\n    ATT_UNIT_JOULE_PER_KELVIN                   = ATT_UUID_16(0x2746),\n    ///Specific heat capacity unit - Joule per kilogram kelvin\n    ATT_UNIT_JOULE_PER_KG_KELVIN                = ATT_UUID_16(0x2747),\n    ///Specific Energy unit - Joule per kilogram\n    ATT_UNIT_JOULE_PER_KG                       = ATT_UUID_16(0x2748),\n    ///Thermal conductivity - Watt per metre Kelvin\n    ATT_UNIT_WATT_PER_METRE_KELVIN              = ATT_UUID_16(0x2749),\n    ///Energy Density unit - joule per cubic metre\n    ATT_UNIT_JOULE_PER_CUBIC_METRE              = ATT_UUID_16(0x274A),\n    ///Electric field strength unit - volt per metre\n    ATT_UNIT_VOLT_PER_METRE                     = ATT_UUID_16(0x274B),\n    ///Electric charge density unit - coulomb per cubic metre\n    ATT_UNIT_COULOMB_PER_CUBIC_METRE            = ATT_UUID_16(0x274C),\n    ///Surface charge density unit - coulomb per square metre\n    ATT_UNIT_SURF_COULOMB_PER_SQ_METRE          = ATT_UUID_16(0x274D),\n    ///Electric flux density unit - coulomb per square metre\n    ATT_UNIT_FLUX_COULOMB_PER_SQ_METRE          = ATT_UUID_16(0x274E),\n    ///Permittivity unit - farad per metre\n    ATT_UNIT_FARAD_PER_METRE                    = ATT_UUID_16(0x274F),\n    ///Permeability unit - henry per metre\n    ATT_UNIT_HENRY_PER_METRE                    = ATT_UUID_16(0x2750),\n    ///Molar energy unit - joule per mole\n    ATT_UNIT_JOULE_PER_MOLE                     = ATT_UUID_16(0x2751),\n    ///Molar entropy unit - joule per mole kelvin\n    ATT_UNIT_JOULE_PER_MOLE_KELVIN              = ATT_UUID_16(0x2752),\n    ///Exposure unit - coulomb per kilogram\n    ATT_UNIT_COULOMB_PER_KG                     = ATT_UUID_16(0x2753),\n    ///Absorbed dose rate unit - gray per second\n    ATT_UNIT_GRAY_PER_SECOND                    = ATT_UUID_16(0x2754),\n    ///Radiant intensity unit - watt per steradian\n    ATT_UNIT_WATT_PER_STERADIAN                 = ATT_UUID_16(0x2755),\n    ///Radiance unit - watt per square meter steradian\n    ATT_UNIT_WATT_PER_SQ_METRE_STERADIAN        = ATT_UUID_16(0x2756),\n    ///Catalytic activity concentration unit - katal per cubic metre\n    ATT_UNIT_KATAL_PER_CUBIC_METRE              = ATT_UUID_16(0x2757),\n    ///Time unit - minute\n    ATT_UNIT_MINUTE                             = ATT_UUID_16(0x2760),\n    ///Time unit - hour\n    ATT_UNIT_HOUR                               = ATT_UUID_16(0x2761),\n    ///Time unit - day\n    ATT_UNIT_DAY                                = ATT_UUID_16(0x2762),\n    ///Plane angle unit - degree\n    ATT_UNIT_ANGLE_DEGREE                       = ATT_UUID_16(0x2763),\n    ///Plane angle unit - minute\n    ATT_UNIT_ANGLE_MINUTE                       = ATT_UUID_16(0x2764),\n    ///Plane angle unit - second\n    ATT_UNIT_ANGLE_SECOND                       = ATT_UUID_16(0x2765),\n    ///Area unit - hectare\n    ATT_UNIT_HECTARE                            = ATT_UUID_16(0x2766),\n    ///Volume unit - litre\n    ATT_UNIT_LITRE                              = ATT_UUID_16(0x2767),\n    ///Mass unit - tonne\n    ATT_UNIT_TONNE                              = ATT_UUID_16(0x2768),\n    ///Pressure unit - bar\n    ATT_UNIT_BAR                                = ATT_UUID_16(0x2780),\n    ///Pressure unit - millimetre of mercury\n    ATT_UNIT_MM_MERCURY                         = ATT_UUID_16(0x2781),\n    ///Length unit - angstrom\n    ATT_UNIT_ANGSTROM                           = ATT_UUID_16(0x2782),\n    ///Length unit - nautical mile\n    ATT_UNIT_NAUTICAL_MILE                      = ATT_UUID_16(0x2783),\n    ///Area unit - barn\n    ATT_UNIT_BARN                               = ATT_UUID_16(0x2784),\n    ///Velocity unit - knot\n    ATT_UNIT_KNOT                               = ATT_UUID_16(0x2785),\n    ///Logarithmic radio quantity unit - neper\n    ATT_UNIT_NEPER                              = ATT_UUID_16(0x2786),\n    ///Logarithmic radio quantity unit - bel\n    ATT_UNIT_BEL                                = ATT_UUID_16(0x2787),\n    ///Length unit - yard\n    ATT_UNIT_YARD                               = ATT_UUID_16(0x27A0),\n    ///Length unit - parsec\n    ATT_UNIT_PARSEC                             = ATT_UUID_16(0x27A1),\n    ///length unit - inch\n    ATT_UNIT_INCH                               = ATT_UUID_16(0x27A2),\n    ///length unit - foot\n    ATT_UNIT_FOOT                               = ATT_UUID_16(0x27A3),\n    ///length unit - mile\n    ATT_UNIT_MILE                               = ATT_UUID_16(0x27A4),\n    ///pressure unit - pound-force per square inch\n    ATT_UNIT_POUND_FORCE_PER_SQ_INCH            = ATT_UUID_16(0x27A5),\n    ///velocity unit - kilometre per hour\n    ATT_UNIT_KM_PER_HOUR                        = ATT_UUID_16(0x27A6),\n    ///velocity unit - mile per hour\n    ATT_UNIT_MILE_PER_HOUR                      = ATT_UUID_16(0x27A7),\n    ///angular velocity unit - revolution per minute\n    ATT_UNIT_REVOLUTION_PER_MINUTE              = ATT_UUID_16(0x27A8),\n    ///energy unit - gram calorie\n    ATT_UNIT_GRAM_CALORIE                       = ATT_UUID_16(0x27A9),\n    ///energy unit - kilogram calorie\n    ATT_UNIT_KG_CALORIE                         = ATT_UUID_16(0x27AA),\n    /// energy unit - kilowatt hour\n    ATT_UNIT_KILOWATT_HOUR                      = ATT_UUID_16(0x27AB),\n    ///thermodynamic temperature unit - degree Fahrenheit\n    ATT_UNIT_FAHRENHEIT                         = ATT_UUID_16(0x27AC),\n    ///percentage\n    ATT_UNIT_PERCENTAGE                         = ATT_UUID_16(0x27AD),\n    ///per mille\n    ATT_UNIT_PER_MILLE                          = ATT_UUID_16(0x27AE),\n    ///period unit - beats per minute)\n    ATT_UNIT_BEATS_PER_MINUTE                   = ATT_UUID_16(0x27AF),\n    ///electric charge unit - ampere hours\n    ATT_UNIT_AMPERE_HOURS                       = ATT_UUID_16(0x27B0),\n    ///mass density unit - milligram per decilitre\n    ATT_UNIT_MILLIGRAM_PER_DECILITRE            = ATT_UUID_16(0x27B1),\n    ///mass density unit - millimole per litre\n    ATT_UNIT_MILLIMOLE_PER_LITRE                = ATT_UUID_16(0x27B2),\n    ///time unit - year\n    ATT_UNIT_YEAR                               = ATT_UUID_16(0x27B3),\n    ////time unit - month\n    ATT_UNIT_MONTH                              = ATT_UUID_16(0x27B4),\n\n\n    /*---------------- DECLARATIONS -----------------*/\n    /// Primary service Declaration\n    ATT_DECL_PRIMARY_SERVICE                     = ATT_UUID_16(0x2800),\n    /// Secondary service Declaration\n    ATT_DECL_SECONDARY_SERVICE                   = ATT_UUID_16(0x2801),\n    /// Include Declaration\n    ATT_DECL_INCLUDE                             = ATT_UUID_16(0x2802),\n    /// Characteristic Declaration\n    ATT_DECL_CHARACTERISTIC                      = ATT_UUID_16(0x2803),\n\n\n    /*----------------- DESCRIPTORS -----------------*/\n    /// Characteristic extended properties\n    ATT_DESC_CHAR_EXT_PROPERTIES                 = ATT_UUID_16(0x2900),\n    /// Characteristic user description\n    ATT_DESC_CHAR_USER_DESCRIPTION               = ATT_UUID_16(0x2901),\n    /// Client characteristic configuration\n    ATT_DESC_CLIENT_CHAR_CFG                     = ATT_UUID_16(0x2902),\n    /// Server characteristic configuration\n    ATT_DESC_SERVER_CHAR_CFG                     = ATT_UUID_16(0x2903),\n    /// Characteristic Presentation Format\n    ATT_DESC_CHAR_PRES_FORMAT                    = ATT_UUID_16(0x2904),\n    /// Characteristic Aggregate Format\n    ATT_DESC_CHAR_AGGREGATE_FORMAT               = ATT_UUID_16(0x2905),\n    /// Valid Range\n    ATT_DESC_VALID_RANGE                         = ATT_UUID_16(0x2906),\n    /// External Report Reference\n    ATT_DESC_EXT_REPORT_REF                      = ATT_UUID_16(0x2907),\n    /// Report Reference\n    ATT_DESC_REPORT_REF                          = ATT_UUID_16(0x2908),\n    /// Environmental Sensing Configuration\n    ATT_DESC_ES_CONFIGURATION                    = ATT_UUID_16(0x290B),\n    /// Environmental Sensing Measurement\n    ATT_DESC_ES_MEASUREMENT                      = ATT_UUID_16(0x290C),\n    /// Environmental Sensing Trigger Setting\n    ATT_DESC_ES_TRIGGER_SETTING                  = ATT_UUID_16(0x290D),\n\n\n    /*--------------- CHARACTERISTICS ---------------*/\n    /// Device name\n    ATT_CHAR_DEVICE_NAME                        = ATT_UUID_16(0x2A00),\n    /// Appearance\n    ATT_CHAR_APPEARANCE                         = ATT_UUID_16(0x2A01),\n    /// Privacy flag\n    ATT_CHAR_PRIVACY_FLAG                       = ATT_UUID_16(0x2A02),\n    /// Reconnection address\n    ATT_CHAR_RECONNECTION_ADDR                  = ATT_UUID_16(0x2A03),\n    /// Peripheral preferred connection parameters\n    ATT_CHAR_PERIPH_PREF_CON_PARAM              = ATT_UUID_16(0x2A04),\n    /// Service handles changed\n    ATT_CHAR_SERVICE_CHANGED                    = ATT_UUID_16(0x2A05),\n    /// Alert Level characteristic\n    ATT_CHAR_ALERT_LEVEL                        = ATT_UUID_16(0x2A06),\n    /// Tx Power Level\n    ATT_CHAR_TX_POWER_LEVEL                     = ATT_UUID_16(0x2A07),\n    /// Date Time\n    ATT_CHAR_DATE_TIME                          = ATT_UUID_16(0x2A08),\n    /// Day of Week\n    ATT_CHAR_DAY_WEEK                           = ATT_UUID_16(0x2A09),\n    /// Day Date Time\n    ATT_CHAR_DAY_DATE_TIME                      = ATT_UUID_16(0x2A0A),\n    /// Exact time 256\n    ATT_CHAR_EXACT_TIME_256                     = ATT_UUID_16(0x2A0C),\n    /// DST Offset\n    ATT_CHAR_DST_OFFSET                         = ATT_UUID_16(0x2A0D),\n    /// Time zone\n    ATT_CHAR_TIME_ZONE                          = ATT_UUID_16(0x2A0E),\n    /// Local time Information\n    ATT_CHAR_LOCAL_TIME_INFO                    = ATT_UUID_16(0x2A0F),\n    /// Time with DST\n    ATT_CHAR_TIME_WITH_DST                      = ATT_UUID_16(0x2A11),\n    /// Time Accuracy\n    ATT_CHAR_TIME_ACCURACY                      = ATT_UUID_16(0x2A12),\n    ///Time Source\n    ATT_CHAR_TIME_SOURCE                        = ATT_UUID_16(0x2A13),\n    /// Reference Time Information\n    ATT_CHAR_REFERENCE_TIME_INFO                = ATT_UUID_16(0x2A14),\n    /// Time Update Control Point\n    ATT_CHAR_TIME_UPDATE_CNTL_POINT             = ATT_UUID_16(0x2A16),\n    /// Time Update State\n    ATT_CHAR_TIME_UPDATE_STATE                  = ATT_UUID_16(0x2A17),\n    /// Glucose Measurement\n    ATT_CHAR_GLUCOSE_MEAS                       = ATT_UUID_16(0x2A18),\n    /// Battery Level\n    ATT_CHAR_BATTERY_LEVEL                      = ATT_UUID_16(0x2A19),\n    /// Temperature Measurement\n    ATT_CHAR_TEMPERATURE_MEAS                   = ATT_UUID_16(0x2A1C),\n    /// Temperature Type\n    ATT_CHAR_TEMPERATURE_TYPE                   = ATT_UUID_16(0x2A1D),\n    /// Intermediate Temperature\n    ATT_CHAR_INTERMED_TEMPERATURE               = ATT_UUID_16(0x2A1E),\n    /// Measurement Interval\n    ATT_CHAR_MEAS_INTERVAL                      = ATT_UUID_16(0x2A21),\n    /// Boot Keyboard Input Report\n    ATT_CHAR_BOOT_KB_IN_REPORT                  = ATT_UUID_16(0x2A22),\n    /// System ID\n    ATT_CHAR_SYS_ID                             = ATT_UUID_16(0x2A23),\n    /// Model Number String\n    ATT_CHAR_MODEL_NB                           = ATT_UUID_16(0x2A24),\n    /// Serial Number String\n    ATT_CHAR_SERIAL_NB                          = ATT_UUID_16(0x2A25),\n    /// Firmware Revision String\n    ATT_CHAR_FW_REV                             = ATT_UUID_16(0x2A26),\n    /// Hardware revision String\n    ATT_CHAR_HW_REV                             = ATT_UUID_16(0x2A27),\n    /// Software Revision String\n    ATT_CHAR_SW_REV                             = ATT_UUID_16(0x2A28),\n    /// Manufacturer Name String\n    ATT_CHAR_MANUF_NAME                         = ATT_UUID_16(0x2A29),\n    /// IEEE Regulatory Certification Data List\n    ATT_CHAR_IEEE_CERTIF                        = ATT_UUID_16(0x2A2A),\n    /// CT Time\n    ATT_CHAR_CT_TIME                            = ATT_UUID_16(0x2A2B),\n    /// Magnetic Declination\n    ATT_CHAR_MAGN_DECLINE                       = ATT_UUID_16(0x2A2C),\n    /// Scan Refresh\n    ATT_CHAR_SCAN_REFRESH                       = ATT_UUID_16(0x2A31),\n    /// Boot Keyboard Output Report\n    ATT_CHAR_BOOT_KB_OUT_REPORT                 = ATT_UUID_16(0x2A32),\n    /// Boot Mouse Input Report\n    ATT_CHAR_BOOT_MOUSE_IN_REPORT               = ATT_UUID_16(0x2A33),\n    /// Glucose Measurement Context\n    ATT_CHAR_GLUCOSE_MEAS_CTX                   = ATT_UUID_16(0x2A34),\n    /// Blood Pressure Measurement\n    ATT_CHAR_BLOOD_PRESSURE_MEAS                = ATT_UUID_16(0x2A35),\n    /// Intermediate Cuff Pressure\n    ATT_CHAR_INTERMEDIATE_CUFF_PRESSURE         = ATT_UUID_16(0x2A36),\n    /// Heart Rate Measurement\n    ATT_CHAR_HEART_RATE_MEAS                    = ATT_UUID_16(0x2A37),\n    /// Body Sensor Location\n    ATT_CHAR_BODY_SENSOR_LOCATION               = ATT_UUID_16(0x2A38),\n    /// Heart Rate Control Point\n    ATT_CHAR_HEART_RATE_CNTL_POINT              = ATT_UUID_16(0x2A39),\n    /// Alert Status\n    ATT_CHAR_ALERT_STATUS                       = ATT_UUID_16(0x2A3F),\n    /// Ringer Control Point\n    ATT_CHAR_RINGER_CNTL_POINT                  = ATT_UUID_16(0x2A40),\n    /// Ringer Setting\n    ATT_CHAR_RINGER_SETTING                     = ATT_UUID_16(0x2A41),\n    /// Alert Category ID Bit Mask\n    ATT_CHAR_ALERT_CAT_ID_BIT_MASK              = ATT_UUID_16(0x2A42),\n    /// Alert Category ID\n    ATT_CHAR_ALERT_CAT_ID                       = ATT_UUID_16(0x2A43),\n    /// Alert Notification Control Point\n    ATT_CHAR_ALERT_NTF_CTNL_PT                  = ATT_UUID_16(0x2A44),\n    /// Unread Alert Status\n    ATT_CHAR_UNREAD_ALERT_STATUS                = ATT_UUID_16(0x2A45),\n    /// New Alert\n    ATT_CHAR_NEW_ALERT                          = ATT_UUID_16(0x2A46),\n    /// Supported New Alert Category\n    ATT_CHAR_SUP_NEW_ALERT_CAT                  = ATT_UUID_16(0x2A47),\n    /// Supported Unread Alert Category\n    ATT_CHAR_SUP_UNREAD_ALERT_CAT               = ATT_UUID_16(0x2A48),\n    /// Blood Pressure Feature\n    ATT_CHAR_BLOOD_PRESSURE_FEATURE             = ATT_UUID_16(0x2A49),\n    /// HID Information\n    ATT_CHAR_HID_INFO                           = ATT_UUID_16(0x2A4A),\n    /// Report Map\n    ATT_CHAR_REPORT_MAP                         = ATT_UUID_16(0x2A4B),\n    /// HID Control Point\n    ATT_CHAR_HID_CTNL_PT                        = ATT_UUID_16(0x2A4C),\n    /// Report\n    ATT_CHAR_REPORT                             = ATT_UUID_16(0x2A4D),\n    /// Protocol Mode\n    ATT_CHAR_PROTOCOL_MODE                      = ATT_UUID_16(0x2A4E),\n    /// Scan Interval Window\n    ATT_CHAR_SCAN_INTV_WD                       = ATT_UUID_16(0x2A4F),\n    /// PnP ID\n    ATT_CHAR_PNP_ID                             = ATT_UUID_16(0x2A50),\n    /// Glucose Feature\n    ATT_CHAR_GLUCOSE_FEATURE                    = ATT_UUID_16(0x2A51),\n    /// Record access control point\n    ATT_CHAR_REC_ACCESS_CTRL_PT                 = ATT_UUID_16(0x2A52),\n    /// RSC Measurement\n    ATT_CHAR_RSC_MEAS                           = ATT_UUID_16(0x2A53),\n    /// RSC Feature\n    ATT_CHAR_RSC_FEAT                           = ATT_UUID_16(0x2A54),\n    /// SC Control Point\n    ATT_CHAR_SC_CNTL_PT                         = ATT_UUID_16(0x2A55),\n    /// CSC Measurement\n    ATT_CHAR_CSC_MEAS                           = ATT_UUID_16(0x2A5B),\n    /// CSC Feature\n    ATT_CHAR_CSC_FEAT                           = ATT_UUID_16(0x2A5C),\n    /// Sensor Location\n    ATT_CHAR_SENSOR_LOC                         = ATT_UUID_16(0x2A5D),\n    /// CP Measurement\n    ATT_CHAR_CP_MEAS                            = ATT_UUID_16(0x2A63),\n    /// CP Vector\n    ATT_CHAR_CP_VECTOR                          = ATT_UUID_16(0x2A64),\n    /// CP Feature\n    ATT_CHAR_CP_FEAT                            = ATT_UUID_16(0x2A65),\n    /// CP Control Point\n    ATT_CHAR_CP_CNTL_PT                         = ATT_UUID_16(0x2A66),\n    /// Location and Speed\n    ATT_CHAR_LOC_SPEED                          = ATT_UUID_16(0x2A67),\n    /// Navigation\n    ATT_CHAR_NAVIGATION                         = ATT_UUID_16(0x2A68),\n    /// Position Quality\n    ATT_CHAR_POS_QUALITY                        = ATT_UUID_16(0x2A69),\n    /// LN Feature\n    ATT_CHAR_LN_FEAT                            = ATT_UUID_16(0x2A6A),\n    /// LN Control Point\n    ATT_CHAR_LN_CNTL_PT                         = ATT_UUID_16(0x2A6B),\n    /// Elevation\n    ATT_CHAR_ELEVATION                          = ATT_UUID_16(0x2A6C),\n    /// Pressure\n    ATT_CHAR_PRESSURE                           = ATT_UUID_16(0x2A6D),\n    /// Temperature\n    ATT_CHAR_TEMPERATURE                        = ATT_UUID_16(0x2A6E),\n    /// Humidity\n    ATT_CHAR_HUMIDITY                           = ATT_UUID_16(0x2A6F),\n    /// True Wind Speed\n    ATT_CHAR_TRUE_WIND_SPEED                    = ATT_UUID_16(0x2A70),\n    /// True Wind Direction\n    ATT_CHAR_TRUE_WIND_DIR                      = ATT_UUID_16(0x2A71),\n    /// Apparent Wind Speed\n    ATT_CHAR_APRNT_WIND_SPEED                   = ATT_UUID_16(0x2A72),\n    /// Apparent Wind Direction\n    ATT_CHAR_APRNT_WIND_DIRECTION               = ATT_UUID_16(0x2A73),\n    /// Gust Factor\n    ATT_CHAR_GUST_FACTOR                        = ATT_UUID_16(0x2A74),\n    /// Pollen Concentration\n    ATT_CHAR_POLLEN_CONC                        = ATT_UUID_16(0x2A75),\n    /// UV Index\n    ATT_CHAR_UV_INDEX                           = ATT_UUID_16(0x2A76),\n    /// Irradiance\n    ATT_CHAR_IRRADIANCE                         = ATT_UUID_16(0x2A77),\n    /// Rainfall\n    ATT_CHAR_RAINFALL                           = ATT_UUID_16(0x2A78),\n    /// Wind Chill\n    ATT_CHAR_WIND_CHILL                         = ATT_UUID_16(0x2A79),\n    /// Heat Index\n    ATT_CHAR_HEAT_INDEX                         = ATT_UUID_16(0x2A7A),\n    /// Dew Point\n    ATT_CHAR_DEW_POINT                          = ATT_UUID_16(0x2A7B),\n    /// Descriptor Value Changed\n    ATT_CHAR_DESCRIPTOR_VALUE_CHANGED           = ATT_UUID_16(0x2A7D),\n    /// Aerobic Heart Rate Lower Limit\n    ATT_CHAR_AEROBIC_HEART_RATE_LOWER_LIMIT     = ATT_UUID_16(0x2A7E),\n    /// Aerobic Threshhold\n    ATT_CHAR_AEROBIC_THRESHHOLD                 = ATT_UUID_16(0x2A7F),\n    /// Age\n    ATT_CHAR_AGE                                = ATT_UUID_16(0x2A80),\n    /// Anaerobic Heart Rate Lower Limit\n    ATT_CHAR_ANAEROBIC_HEART_RATE_LOWER_LIMIT   = ATT_UUID_16(0x2A81),\n    /// Anaerobic Heart Rate Upper Limit\n    ATT_CHAR_ANAEROBIC_HEART_RATE_UPPER_LIMIT   = ATT_UUID_16(0x2A82),\n    /// Anaerobic Threshhold\n    ATT_CHAR_ANAEROBIC_THRESHHOLD               = ATT_UUID_16(0x2A83),\n    /// Aerobic Heart Rate Upper Limit\n    ATT_CHAR_AEROBIC_HEART_RATE_UPPER_LIMIT     = ATT_UUID_16(0x2A84),\n    /// Date Of Birth\n    ATT_CHAR_DATE_OF_BIRTH                      = ATT_UUID_16(0x2A85),\n    /// Date Of Threshold Assessment\n    ATT_CHAR_DATE_OF_THRESHOLD_ASSESSMENT       = ATT_UUID_16(0x2A86),\n    /// Email Address\n    ATT_CHAR_EMAIL_ADDRESS                      = ATT_UUID_16(0x2A87),\n    /// Fat Burn Heart Rate Lower Limit\n    ATT_CHAR_FAT_BURN_HEART_RATE_LOWER_LIMIT    = ATT_UUID_16(0x2A88),\n    /// Fat Burn Heart Rate Upper Limit\n    ATT_CHAR_FAT_BURN_HEART_RATE_UPPER_LIMIT    = ATT_UUID_16(0x2A89),\n    /// First Name\n    ATT_CHAR_FIRST_NAME                         = ATT_UUID_16(0x2A8A),\n    /// Five Zone Heart Rate Limits\n    ATT_CHAR_FIVE_ZONE_HEART_RATE_LIMITS        = ATT_UUID_16(0x2A8B),\n    /// Gender\n    ATT_CHAR_GENDER                             = ATT_UUID_16(0x2A8C),\n    /// Max Heart Rate\n    ATT_CHAR_MAX_HEART_RATE                     = ATT_UUID_16(0x2A8D),\n    /// Height\n    ATT_CHAR_HEIGHT                             = ATT_UUID_16(0x2A8E),\n    /// Hip Circumference\n    ATT_CHAR_HIP_CIRCUMFERENCE                  = ATT_UUID_16(0x2A8F),\n    /// Last Name \n    ATT_CHAR_LAST_NAME                          = ATT_UUID_16(0x2A90),\n    /// Maximum Recommended Heart Rate\n    ATT_CHAR_MAXIMUM_RECOMMENDED_HEART_RATE     = ATT_UUID_16(0x2A91),\n    /// Resting Heart Rate\n    ATT_CHAR_RESTING_HEART_RATE                 = ATT_UUID_16(0x2A92),\n    /// Sport Type For Aerobic And Anaerobic Thresholds\n    ATT_CHAR_SPORT_TYPE_FOR_AEROBIC_AND_ANAEROBIC_THRESHOLDS = ATT_UUID_16(0x2A93),\n    /// Three Zone Heart Rate Limits\n    ATT_CHAR_THREE_ZONE_HEART_RATE_LIMITS       = ATT_UUID_16(0x2A94),\n    /// Two Zone Heart Rate Limit\n    ATT_CHAR_TWO_ZONE_HEART_RATE_LIMIT          = ATT_UUID_16(0x2A95),\n    /// Vo2 Max\n    ATT_CHAR_VO2_MAX                            = ATT_UUID_16(0x2A96),\n    /// Waist Circumference\n    ATT_CHAR_WAIST_CIRCUMFERENCE                = ATT_UUID_16(0x2A97),\n    /// Weight\n    ATT_CHAR_WEIGHT                             = ATT_UUID_16(0x2A98),\n    /// Database Change Increment\n    ATT_CHAR_DATABASE_CHANGE_INCREMENT          = ATT_UUID_16(0x2A99),\n    /// User Index \n    ATT_CHAR_USER_INDEX                         = ATT_UUID_16(0x2A9A),\n    /// Body Composition Feature\n    ATT_CHAR_BODY_COMPOSITION_FEATURE           = ATT_UUID_16(0x2A9B),\n    /// Body Composition Measurement\n    ATT_CHAR_BODY_COMPOSITION_MEASUREMENT       = ATT_UUID_16(0x2A9C),\n    /// Weight Measurement\n    ATT_CHAR_WEIGHT_MEASUREMENT                 = ATT_UUID_16(0x2A9D),\n    /// Weight Scale Feature\n    ATT_CHAR_WEIGHT_SCALE_FEATURE               = ATT_UUID_16(0x2A9E),\n    /// User Control Point\n    ATT_CHAR_USER_CONTROL_POINT                 = ATT_UUID_16(0x2A9F),\n    /// Flux Density - 2D\n    ATT_CHAR_MAGN_FLUX_2D                       = ATT_UUID_16(0x2AA0),\n    /// Magnetic Flux Density - 3D\n    ATT_CHAR_MAGN_FLUX_3D                       = ATT_UUID_16(0x2AA1),\n    /// Language string\n    ATT_CHAR_LANGUAGE                           = ATT_UUID_16(0x2AA2),\n    /// Barometric Pressure Trend\n    ATT_CHAR_BAR_PRES_TREND                     = ATT_UUID_16(0x2AA3),\n    /// Central Address Resolution Support\n    ATT_CHAR_CTL_ADDR_RESOL_SUPP                = ATT_UUID_16(0x2AA6),\n};\n\n/// Format for Characteristic Presentation\nenum {\n    /// unsigned 1-bit: true or false\n    ATT_FORMAT_BOOL     = 0x01,\n    /// unsigned 2-bit integer\n    ATT_FORMAT_2BIT,\n    /// unsigned 4-bit integer\n    ATT_FORMAT_NIBBLE,\n    /// unsigned 8-bit integer\n    ATT_FORMAT_UINT8,\n    /// unsigned 12-bit integer\n    ATT_FORMAT_UINT12,\n    /// unsigned 16-bit integer\n    ATT_FORMAT_UINT16,\n    /// unsigned 24-bit integer\n    ATT_FORMAT_UINT24,\n    /// unsigned 32-bit integer\n    ATT_FORMAT_UINT32,\n    /// unsigned 48-bit integer\n    ATT_FORMAT_UINT48,\n    /// unsigned 64-bit integer\n    ATT_FORMAT_UINT64,\n    /// unsigned 128-bit integer\n    ATT_FORMAT_UINT128,\n    /// signed 8-bit integer\n    ATT_FORMAT_SINT8,\n    /// signed 12-bit integer\n    ATT_FORMAT_SINT12,\n    /// signed 16-bit integer\n    ATT_FORMAT_SINT16,\n    /// signed 24-bit integer\n    ATT_FORMAT_SINT24,\n    /// signed 32-bit integer\n    ATT_FORMAT_SINT32,\n    /// signed 48-bit integer\n    ATT_FORMAT_SINT48,\n    /// signed 64-bit integer\n    ATT_FORMAT_SINT64,\n    /// signed 128-bit integer\n    ATT_FORMAT_SINT128,\n    /// IEEE-754 32-bit floating point\n    ATT_FORMAT_FLOAT32,\n    /// IEEE-754 64-bit floating point\n    ATT_FORMAT_FLOAT64,\n    /// IEEE-11073 16-bit SFLOAT\n    ATT_FORMAT_SFLOAT,\n    /// IEEE-11073 32-bit FLOAT\n    ATT_FORMAT_FLOAT,\n    /// IEEE-20601 format\n    ATT_FORMAT_DUINT16,\n    /// UTF-8 string\n    ATT_FORMAT_UTF8S,\n    /// UTF-16 string\n    ATT_FORMAT_UTF16S,\n    /// Opaque structure\n    ATT_FORMAT_STRUCT,\n    /// Last format\n    ATT_FORMAT_LAST\n};\n\n\n/// Client Characteristic Configuration Codes\nenum att_ccc_val\n{\n    /// Stop notification/indication\n    ATT_CCC_STOP_NTFIND = 0x0000,\n    /// Start notification\n    ATT_CCC_START_NTF,\n    /// Start indication\n    ATT_CCC_START_IND\n};\n\n/*\n * Type Definition\n ****************************************************************************************\n */\n\n/// Attribute length type\ntypedef uint16_t att_size_t;\n\n\n/// UUID - 128-bit type\nstruct att_uuid_128\n{\n    /// 128-bit UUID\n    uint8_t uuid[ATT_UUID_128_LEN];\n};\n\n/// UUID - 32-bit type\nstruct att_uuid_32\n{\n    /// 32-bit UUID\n    uint8_t uuid[ATT_UUID_32_LEN];\n};\n\n\n\n/// Characteristic Value Descriptor\nstruct att_char_desc\n{\n    /// properties\n    uint8_t prop;\n    /// attribute handle\n    uint8_t attr_hdl[ATT_HANDLE_LEN];\n    /// attribute type\n    uint8_t attr_type[ATT_UUID_16_LEN];\n};\n\n/// Characteristic Value Descriptor\nstruct att_char128_desc\n{\n    /// properties\n    uint8_t prop;\n    /// attribute handle\n    uint8_t attr_hdl[ATT_HANDLE_LEN];\n    /// attribute type\n    uint8_t attr_type[ATT_UUID_128_LEN];\n};\n\n/// Service Value Descriptor - 16-bit\ntypedef uint16_t att_svc_desc_t;\n\n/// include service entry element\nstruct att_incl_desc\n{\n    /// start handle value of included service\n    uint16_t start_hdl;\n    /// end handle value of included service\n    uint16_t end_hdl;\n    /// attribute value UUID\n    uint16_t uuid;\n};\n\n/// include service entry element\nstruct att_incl128_desc\n{\n    /// start handle value of included service\n    uint16_t start_hdl;\n    /// end handle value of included service\n    uint16_t end_hdl;\n};\n\n\n// -------------------------- PDU HANDLER Definition  --------------------------\n\n/// used to know if PDU handler has been found\n#define ATT_PDU_HANDLER_NOT_FOUND       (0xff)\n\n/// Format of a pdu handler function\ntypedef int (*att_func_t)(uint8_t conidx, void *pdu);\n\n/// Element of a pdu handler table.\nstruct att_pdu_handler\n{\n    /// PDU identifier of the message\n    uint8_t pdu_id;\n    /// Pointer to the handler function for the pdu above.\n    att_func_t handler;\n};\n\n\n// --------------------------- Database permissions -----------------------------\n\n/// Macro used to retrieve access permission rights\n#define PERM_GET(perm, access)\\\n        (((perm) & (PERM_MASK_ ## access)) >> (PERM_POS_ ## access))\n\n/// Macro used to retrieve permission value from access and rights on attribute.\n#define PERM(access, right) \\\n    (((PERM_RIGHT_ ## right) << (PERM_POS_ ## access)) & (PERM_MASK_ ## access))\n\n/// Macro used know if permission is set or not.\n#define PERM_IS_SET(perm, access, right) \\\n    (((perm) & (((PERM_RIGHT_ ## right) << (PERM_POS_ ## access))) \\\n                & (PERM_MASK_ ## access)) == PERM(access, right))\n\n/// Macro used to create permission value\n#define PERM_VAL(access, perm) \\\n    ((((perm) << (PERM_POS_ ## access))) & (PERM_MASK_ ## access))\n\n\n\n/// Retrieve attribute security level from attribute right and service right\n#define ATT_GET_SEC_LVL(att_right, svc_right) \\\n    co_max(((att_right) & PERM_RIGHT_AUTH), ((svc_right) & PERM_RIGHT_AUTH));\n\n/// Retrieve UUID LEN from UUID Length Permission\n#define ATT_UUID_LEN(uuid_len_perm) ((uuid_len_perm == 0) ? ATT_UUID_16_LEN : \\\n        ((uuid_len_perm == 1) ? ATT_UUID_32_LEN  :                        \\\n        ((uuid_len_perm == 2) ? ATT_UUID_128_LEN : 0)))\n\n/// Initialization of attribute element\n#define ATT_ELEMT_INIT                                   {{NULL}, false}\n\n/**\n *   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0\n * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n * |EXT | WS | I  | N  | WR | WC | RD | B  |    NP   |    IP   |   WP    |    RP   |\n * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n *\n * Bit [0-1]  : Read Permission         (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)\n * Bit [2-3]  : Write Permission        (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)\n * Bit [4-5]  : Indication Permission   (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)\n * Bit [6-7]  : Notification Permission (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = SEC_CON)\n *\n * Bit [8]    : Broadcast permission        (only relevant for a characteristic value)\n * Bit [9]    : Read accepted\n * Bit [10]   : Write Command accepted\n * Bit [11]   : Write Request accepted\n * Bit [12]   : Notification accepted\n * Bit [13]   : Indication accepted\n * Bit [14]   : Write Signed accepted\n * Bit [15]   : Extended properties present (only relevant for a characteristic value)\n */\nenum attm_perm_mask\n{\n    /// retrieve all permission info\n    PERM_MASK_ALL            = 0x0000,\n    /// Read Permission Mask\n    PERM_MASK_RP             = 0x0003,\n    PERM_POS_RP              = 0,\n    /// Write Permission Mask\n    PERM_MASK_WP             = 0x000C,\n    PERM_POS_WP              = 2,\n    /// Indication Access Mask\n    PERM_MASK_IP            = 0x0030,\n    PERM_POS_IP             = 4,\n    /// Notification Access Mask\n    PERM_MASK_NP            = 0x00C0,\n    PERM_POS_NP             = 6,\n    /// Broadcast descriptor present\n    PERM_MASK_BROADCAST     = 0x0100,\n    PERM_POS_BROADCAST      = 8,\n    /// Read Access Mask\n    PERM_MASK_RD            = 0x0200,\n    PERM_POS_RD             = 9,\n    /// Write Command Enabled attribute Mask\n    PERM_MASK_WRITE_COMMAND = 0x0400,\n    PERM_POS_WRITE_COMMAND  = 10,\n    /// Write Request Enabled attribute Mask\n    PERM_MASK_WRITE_REQ     = 0x0800,\n    PERM_POS_WRITE_REQ      = 11,\n    /// Notification Access Mask\n    PERM_MASK_NTF           = 0x1000,\n    PERM_POS_NTF            = 12,\n    /// Indication Access Mask\n    PERM_MASK_IND           = 0x2000,\n    PERM_POS_IND            = 13,\n    /// Write Signed Enabled attribute Mask\n    PERM_MASK_WRITE_SIGNED  = 0x4000,\n    PERM_POS_WRITE_SIGNED   = 14,\n    /// Extended properties descriptor present\n    PERM_MASK_EXT           = 0x8000,\n    PERM_POS_EXT            = 15,\n\n    /// Properties\n    PERM_MASK_PROP          = 0xFF00,\n    PERM_POS_PROP           = 8,\n};\n\n/**\n * Value permission bit field\n *\n *   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0\n * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n * | RI |UUID_LEN |EKS |    MAX_LEN (RI = 1) / Value Offset  (RI = 0)              |\n * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n *\n * Bit [0-11] : Maximum Attribute Length or Value Offset pointer\n * Bit [12]   : Encryption key Size must be 16 bytes\n * Bit [14-13]: UUID Length             (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)\n * Bit [15]   : Trigger Read Indication (0 = Value present in Database, 1 = Value not present in Database)\n */\nenum attm_value_perm_mask\n{\n    /// Maximum Attribute Length\n    PERM_MASK_MAX_LEN     = 0x0FFF,\n    PERM_POS_MAX_LEN      = 0,\n    /// Attribute value Offset\n    PERM_MASK_VAL_OFFSET  = 0x0FFF,\n    PERM_POS_VAL_OFFSET   = 0,\n    /// Check Encryption key size Mask\n    PERM_MASK_EKS         = 0x1000,\n    PERM_POS_EKS          = 12,\n    /// UUID Length\n    PERM_MASK_UUID_LEN    = 0x6000,\n    PERM_POS_UUID_LEN     = 13,\n    /// Read trigger Indication\n    PERM_MASK_RI          = 0x8000,\n    PERM_POS_RI           = 15,\n};\n\n\n/**\n * Service permissions\n *\n *    7    6    5    4    3    2    1    0\n * +----+----+----+----+----+----+----+----+\n * |SEC |UUID_LEN |DIS |  AUTH   |EKS | MI |\n * +----+----+----+----+----+----+----+----+\n *\n * Bit [0]  : Task that manage service is multi-instantiated (Connection index is conveyed)\n * Bit [1]  : Encryption key Size must be 16 bytes\n * Bit [2-3]: Service Permission      (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = Secure Connect)\n * Bit [4]  : Disable the service\n * Bit [5-6]: UUID Length             (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)\n * Bit [7]  : Secondary Service       (0 = Primary Service, 1 = Secondary Service)\n */\nenum attm_svc_perm_mask\n{\n    /// Task that manage service is multi-instantiated\n    PERM_MASK_SVC_MI        = 0x01,\n    PERM_POS_SVC_MI         = 0,\n    /// Check Encryption key size for service Access\n    PERM_MASK_SVC_EKS       = 0x02,\n    PERM_POS_SVC_EKS        = 1,\n    /// Service Permission authentication\n    PERM_MASK_SVC_AUTH      = 0x0C,\n    PERM_POS_SVC_AUTH       = 2,\n    /// Disable the service\n    PERM_MASK_SVC_DIS       = 0x10,\n    PERM_POS_SVC_DIS        = 4,\n    /// Service UUID Length\n    PERM_MASK_SVC_UUID_LEN  = 0x60,\n    PERM_POS_SVC_UUID_LEN   = 5,\n    /// Service type Secondary\n    PERM_MASK_SVC_SECONDARY = 0x80,\n    PERM_POS_SVC_SECONDARY  = 7,\n};\n\n/// Attribute & Service access mode\nenum\n{\n    /// Disable access\n    PERM_RIGHT_DISABLE   = 0,\n    /// Enable access\n    PERM_RIGHT_ENABLE   = 1,\n};\n\n/// Attribute & Service access rights\nenum\n{\n    /// No Authentication\n    PERM_RIGHT_NO_AUTH  = 0,\n    /// Access Requires Unauthenticated link\n    PERM_RIGHT_UNAUTH   = 1,\n    /// Access Requires Authenticated link\n    PERM_RIGHT_AUTH     = 2,\n    /// Access Requires Secure Connection link\n    PERM_RIGHT_SEC_CON  = 3,\n};\n\n/// Attribute & Service UUID Length\nenum\n{\n    /// 16  bits UUID\n    PERM_UUID_16         = 0,\n    PERM_RIGHT_UUID_16         = 0,\n    /// 32  bits UUID\n    PERM_UUID_32         = 1,\n    PERM_RIGHT_UUID_32         = 1,\n    /// 128 bits UUID\n    PERM_UUID_128        = 2,\n    PERM_RIGHT_UUID_128        = 2,\n    /// Invalid\n    PERM_UUID_RFU        = 3,\n};\n\n/// execute flags\nenum\n{\n    /// Cancel All the Reliable Writes\n    ATT_CANCEL_ALL_PREPARED_WRITES = 0x00,\n    /// Write All the Reliable Writes\n    ATT_EXECUTE_ALL_PREPARED_WRITES\n};\n\n\n\n/// @} ATT\n#endif // ATT_H_\n"
  },
  {
    "path": "services/ble_stack/hl/api/gap.h",
    "content": "#ifndef GAP_H_\n#define GAP_H_\n/**\n ****************************************************************************************\n * @addtogroup HOST\n * @ingroup ROOT\n * @brief Bluetooth Low Energy Host\n *\n * The HOST layer of the stack contains the higher layer protocols (@ref ATT \"ATT\",\n * @ref SMP \"SMP\") and transport module (@ref L2C \"L2C\"). It also includes the Generic\n * Access Profile (@ref GAP \"GAP\"), used for scanning/connection operations.\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @addtogroup GAP Generic Access Profile\n * @ingroup HOST\n * @brief Generic Access Profile.\n *\n * The GAP module is responsible for providing an API to the application in order to\n * configure the device in the desired mode (discoverable, connectable, etc.) and perform\n * required actions (scanning, connection, pairing, etc.). To achieve this, the GAP\n * interfaces with both the @ref SMP \"SMP\", @ref L2C \"L2C\" and the @ref CONTROLLER \"CONTROLLER\"\n *\n * @{\n ****************************************************************************************\n */\n\n#include \n#include \"compiler.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// BD address length\n#define GAP_BD_ADDR_LEN       (6)\n/// LE Channel map length\n#define GAP_LE_CHNL_MAP_LEN   (0x05)\n/// LE Feature Flags Length\n#define GAP_LE_FEATS_LEN      (0x08)\n/// ADV Data and Scan Response length\n#define GAP_ADV_DATA_LEN      (0x1F)\n#define GAP_SCAN_RSP_DATA_LEN (0x1F)\n/// Random number length\n#define GAP_RAND_NB_LEN       (0x08)\n/// Key length\n#define GAP_KEY_LEN           (16)\n/// P256 Key Len\n#define GAP_P256_KEY_LEN      (0x20)\n\n\n///***** AD Type Flag - Bit set *******/\n/// Limited discovery flag - AD Flag\n#define GAP_LE_LIM_DISCOVERABLE_FLG             0x01\n/// General discovery flag - AD Flag\n#define GAP_LE_GEN_DISCOVERABLE_FLG             0x02\n/// Legacy BT not supported - AD Flag\n#define GAP_BR_EDR_NOT_SUPPORTED                0x04\n/// Dual mode for controller supported (BR/EDR/LE) - AD Flag\n#define GAP_SIMUL_BR_EDR_LE_CONTROLLER          0x08\n/// Dual mode for host supported (BR/EDR/LE) - AD Flag\n#define GAP_SIMUL_BR_EDR_LE_HOST                0x10\n\n/*********** GAP Miscellaneous Defines *************/\n/// Invalid connection index\n#define GAP_INVALID_CONIDX                      0xFF\n\n/// Invalid connection handle\n#define GAP_INVALID_CONHDL                      0xFFFF\n\n/// Connection interval min (N*1.250ms)\n#define GAP_CNX_INTERVAL_MIN            6       //(0x06)\n/// Connection interval Max (N*1.250ms)\n#define GAP_CNX_INTERVAL_MAX            3200    //(0xC80)\n/// Connection latency min (N*cnx evt)\n#define GAP_CNX_LATENCY_MIN             0       //(0x00)\n/// Connection latency Max (N*cnx evt\n#define GAP_CNX_LATENCY_MAX             499     //(0x1F3)\n/// Supervision TO min (N*10ms)\n#define GAP_CNX_SUP_TO_MIN              10      //(0x0A)\n/// Supervision TO Max (N*10ms)\n#define GAP_CNX_SUP_TO_MAX              3200    //(0xC80)\n\n\n\n/// Length of resolvable random address prand part\n#define GAP_ADDR_PRAND_LEN            (3)\n/// Length of resolvable random address hash part\n#define GAP_ADDR_HASH_LEN             (3)\n\n/*\n * DEFINES - Optional for BLE application usage\n ****************************************************************************************\n */\n\n/// Central idle timer\n/// TGAP(conn_pause_central)\n/// recommended value: 1 s: (100 for ke timer)\n#define GAP_TMR_CONN_PAUSE_CT                               0x0064\n\n/// Minimum time upon connection establishment before the peripheral\n/// starts a connection update procedure: TGAP(conn_pause_peripheral)\n/// recommended value: 5 s: (500 for ke timer)\n#define GAP_TMR_CONN_PAUSE_PH                               0x01F4\n\n/// Minimum time to perform scanning when user initiated\n/// TGAP(scan_fast_period)\n/// recommended value: 30.72 s: (3072 for ke timer)\n#define GAP_TMR_SCAN_FAST_PERIOD                            0x0C00\n\n/// Minimum time to perform advertising when user initiated\n/// TGAP(adv_fast_period)\n/// recommended value: 30 s: (3000 for ke timer)\n#define GAP_TMR_ADV_FAST_PERIOD                             0x0BB8\n\n/// Scan interval used during Link Layer Scanning State when\n/// performing the Limited Discovery procedure\n/// TGAP(lim_disc_scan_int)\n/// recommended value: 11.25ms; (18 decimal)\n#define GAP_LIM_DISC_SCAN_INT                               0x0012\n\n/// Scan interval in any discovery or connection establishment\n/// procedure when user initiated: TGAP(scan_fast_interval)\n/// recommended value: 30 to 60 ms; N * 0.625\n#define GAP_SCAN_FAST_INTV                                  0x0030\n\n/// Scan window in any discovery or connection establishment\n/// procedure when user initiated: TGAP(scan_fast_window)\n/// recommended value: 30 ms; N * 0.625\n#define GAP_SCAN_FAST_WIND                                  0x0030\n\n/// Scan interval in any discovery or connection establishment\n/// procedure when background scanning: TGAP(scan_slow_interval1)\n/// recommended value: 1.28 s : 0x00CD (205); N * 0.625\n#define GAP_SCAN_SLOW_INTV1                                 0x00CD\n\n/// Scan interval in any discovery or connection establishment\n/// procedure when background scanning: TGAP(scan_slow_interval2)\n/// recommended value: 2.56 s : 0x019A (410); N * 0.625\n#define GAP_SCAN_SLOW_INTV2                                 0x019A\n\n/// Scan window in any discovery or connection establishment\n/// procedure when background scanning: TGAP(scan_slow_window1)\n/// recommended value: 11.25 ms : 0x0012 (18); N * 0.625\n#define GAP_SCAN_SLOW_WIND1                                 0x0012\n\n/// Scan window in any discovery or connection establishment\n/// procedure when background scanning: TGAP(scan_slow_window2)\n/// recommended value: 22.5 ms : 0x0024 (36); N * 0.625\n#define GAP_SCAN_SLOW_WIND2                                 0x0024\n\n/// Minimum to maximum advertisement interval in any discoverable\n/// or connectable mode when user initiated: TGAP(adv_fast_interval1)\n/// recommended value: 30 to 60 ms; N * 0.625\n#define GAP_ADV_FAST_INTV1                                  0x0030\n\n/// Minimum to maximum advertisement interval in any discoverable\n/// or connectable mode when user initiated: TGAP(adv_fast_interval2)\n/// recommended value: 100 to 150 ms; N * 0.625\n#define GAP_ADV_FAST_INTV2                                  0x0064\n\n/// Minimum to maximum advertisement interval in any discoverable or\n/// connectable mode when background advertising: TGAP(adv_slow_interval)\n/// recommended value: 1 to 1.2 s : 0x00B0 (176); N * 0.625\n#define GAP_ADV_SLOW_INTV                                   0x00B0\n\n/// Minimum to maximum connection interval upon any connection\n/// establishment: TGAP(initial_conn_interval)\n/// recommended value: 30 to 50 ms ; N * 1.25 ms\n#define GAP_INIT_CONN_MIN_INTV                              0x0018\n#define GAP_INIT_CONN_MAX_INTV                              0x0028\n\n/// RW Defines\n#define GAP_INQ_SCAN_INTV                                   0x0012\n#define GAP_INQ_SCAN_WIND                                   0x0012\n\n/// Connection supervision timeout\n/// recommended value: 20s\n#define GAP_CONN_SUPERV_TIMEOUT                             0x07D0\n\n/// Minimum connection event\n/// default value: 0x0000\n#define GAP_CONN_MIN_CE                                     0x0000\n\n/// Maximum connection event\n/// default value: 0xFFFF\n#define GAP_CONN_MAX_CE                                     0xFFFF\n\n/// Connection latency\n/// default value: 0x0000\n#define GAP_CONN_LATENCY                                    0x0000\n\n/// GAP Device name Characteristic\n/// Default device name\n#define GAP_DEV_NAME                                        \"RIVIERAWAVES-BLE\"\n\n/// GAP Appearance or Icon Characteristic - 2 octets\n/// Current appearance value is 0x0000 (unknown appearance)\n/// Description:\n/// http://developer.bluetooth.org/gatt/characteristics/Pages/CharacteristicViewer.aspx?u=org.bluetooth.characteristic.gap.appearance.xml\n#define GAP_APPEARANCE                                      0x0000\n\n///GAP Peripheral Preferred Connection Parameter - 8 octets\n#define GAP_PPCP_CONN_INTV_MAX                              0x0064\n#define GAP_PPCP_CONN_INTV_MIN                              0x00C8\n#define GAP_PPCP_SLAVE_LATENCY                              0x0000\n#define GAP_PPCP_STO_MULT                                   0x07D0\n\n/*\n * Enumerations\n ****************************************************************************************\n */\n/// GAP Advertising Flags\nenum gap_ad_type\n{\n    /// Flag\n    GAP_AD_TYPE_FLAGS                      = 0x01,\n    /// Use of more than 16 bits UUID\n    GAP_AD_TYPE_MORE_16_BIT_UUID           = 0x02,\n    /// Complete list of 16 bit UUID\n    GAP_AD_TYPE_COMPLETE_LIST_16_BIT_UUID  = 0x03,\n    /// Use of more than 32 bit UUD\n    GAP_AD_TYPE_MORE_32_BIT_UUID           = 0x04,\n    /// Complete list of 32 bit UUID\n    GAP_AD_TYPE_COMPLETE_LIST_32_BIT_UUID  = 0x05,\n    /// Use of more than 128 bit UUID\n    GAP_AD_TYPE_MORE_128_BIT_UUID          = 0x06,\n    /// Complete list of 128 bit UUID\n    GAP_AD_TYPE_COMPLETE_LIST_128_BIT_UUID = 0x07,\n    /// Shortened device name\n    GAP_AD_TYPE_SHORTENED_NAME             = 0x08,\n    /// Complete device name\n    GAP_AD_TYPE_COMPLETE_NAME              = 0x09,\n    /// Transmit power\n    GAP_AD_TYPE_TRANSMIT_POWER             = 0x0A,\n    /// Class of device\n    GAP_AD_TYPE_CLASS_OF_DEVICE            = 0x0D,\n    /// Simple Pairing Hash C\n    GAP_AD_TYPE_SP_HASH_C                  = 0x0E,\n    /// Simple Pairing Randomizer\n    GAP_AD_TYPE_SP_RANDOMIZER_R            = 0x0F,\n    /// Temporary key value\n    GAP_AD_TYPE_TK_VALUE                   = 0x10,\n    /// Out of Band Flag\n    GAP_AD_TYPE_OOB_FLAGS                  = 0x11,\n    /// Slave connection interval range\n    GAP_AD_TYPE_SLAVE_CONN_INT_RANGE       = 0x12,\n    /// Require 16 bit service UUID\n    GAP_AD_TYPE_RQRD_16_BIT_SVC_UUID       = 0x14,\n    /// Require 32 bit service UUID\n    GAP_AD_TYPE_RQRD_32_BIT_SVC_UUID       = 0x1F,\n    /// Require 128 bit service UUID\n    GAP_AD_TYPE_RQRD_128_BIT_SVC_UUID      = 0x15,\n    /// Service data 16-bit UUID\n    GAP_AD_TYPE_SERVICE_16_BIT_DATA        = 0x16,\n    /// Service data 32-bit UUID\n    GAP_AD_TYPE_SERVICE_32_BIT_DATA        = 0x20,\n    /// Service data 128-bit UUID\n    GAP_AD_TYPE_SERVICE_128_BIT_DATA       = 0x21,\n    /// Public Target Address\n    GAP_AD_TYPE_PUB_TGT_ADDR               = 0x17,\n    /// Random Target Address\n    GAP_AD_TYPE_RAND_TGT_ADDR              = 0x18,\n    /// Appearance\n    GAP_AD_TYPE_APPEARANCE                 = 0x19,\n    /// Advertising Interval\n    GAP_AD_TYPE_ADV_INTV                   = 0x1A,\n    /// LE Bluetooth Device Address\n    GAP_AD_TYPE_LE_BT_ADDR                 = 0x1B,\n    /// LE Role\n    GAP_AD_TYPE_LE_ROLE                    = 0x1C,\n    /// Simple Pairing Hash C-256\n    GAP_AD_TYPE_SPAIR_HASH                 = 0x1D,\n    /// Simple Pairing Randomizer R-256\n    GAP_AD_TYPE_SPAIR_RAND                 = 0x1E,\n    /// 3D Information Data\n    GAP_AD_TYPE_3D_INFO                    = 0x3D,\n\n    /// Manufacturer specific data\n    GAP_AD_TYPE_MANU_SPECIFIC_DATA         = 0xFF,\n};\n\n\n/// Random Address type\nenum gap_rnd_addr_type\n{\n    /// Static random address           - 11 (MSB->LSB)\n    GAP_STATIC_ADDR     = 0xC0,\n    /// Private non resolvable address  - 01 (MSB->LSB)\n    GAP_NON_RSLV_ADDR   = 0x00,\n    /// Private resolvable address      - 01 (MSB->LSB)\n    GAP_RSLV_ADDR       = 0x40,\n};\n\n/// Boolean value set\nenum\n{\n    /// Disable\n    GAP_DISABLE = 0x00,\n    /// Enable\n    GAP_ENABLE\n};\n\n\n/// GAP Attribute database handles\n/// Generic Access Profile Service\nenum\n{\n    GAP_IDX_PRIM_SVC,\n    GAP_IDX_CHAR_DEVNAME,\n    GAP_IDX_DEVNAME,\n    GAP_IDX_CHAR_ICON,\n    GAP_IDX_ICON,\n    GAP_IDX_CHAR_SLAVE_PREF_PARAM,\n    GAP_IDX_SLAVE_PREF_PARAM,\n    GAP_IDX_CHAR_CNT_ADDR_RESOL,\n    GAP_IDX_CNT_ADDR_RESOL,\n    GAP_IDX_NUMBER\n};\n\n\n\n/****************** GAP Role **********************/\nenum gap_role\n{\n    /// No role set yet\n    GAP_ROLE_NONE        = 0x00,\n\n    /// Observer role\n    GAP_ROLE_OBSERVER    = 0x01,\n\n    /// Broadcaster role\n    GAP_ROLE_BROADCASTER = 0x02,\n\n    /// Master/Central role\n    GAP_ROLE_CENTRAL     = (0x04 | GAP_ROLE_OBSERVER),\n\n    /// Peripheral/Slave role\n    GAP_ROLE_PERIPHERAL  = (0x08 | GAP_ROLE_BROADCASTER),\n\n    /// Device has all role, both peripheral and central\n    GAP_ROLE_ALL         = (GAP_ROLE_CENTRAL | GAP_ROLE_PERIPHERAL),\n\n    /// Debug mode used to force LL configuration on BLE 4.0\n    GAP_ROLE_DBG_LE_4_0      = 0x80,\n};\n\n/// Advertising mode\nenum gap_adv_mode\n{\n    /// Mode in non-discoverable\n    GAP_NON_DISCOVERABLE,\n    /// Mode in general discoverable\n    GAP_GEN_DISCOVERABLE,\n    /// Mode in limited discoverable\n    GAP_LIM_DISCOVERABLE,\n    /// Broadcaster mode which is a non discoverable and non connectable mode.\n    GAP_BROADCASTER_MODE\n};\n\n/// Scan mode\nenum gap_scan_mode\n{\n    /// Mode in general discovery\n    GAP_GEN_DISCOVERY,\n    /// Mode in limited discovery\n    GAP_LIM_DISCOVERY,\n    /// Observer mode\n    GAP_OBSERVER_MODE,\n    /// Invalid mode\n    GAP_INVALID_MODE\n};\n\n\n\n/// IO Capability Values\nenum gap_io_cap\n{\n    /// Display Only\n    GAP_IO_CAP_DISPLAY_ONLY = 0x00,\n    /// Display Yes No\n    GAP_IO_CAP_DISPLAY_YES_NO,\n    /// Keyboard Only\n    GAP_IO_CAP_KB_ONLY,\n    /// No Input No Output\n    GAP_IO_CAP_NO_INPUT_NO_OUTPUT,\n    /// Keyboard Display\n    GAP_IO_CAP_KB_DISPLAY,\n    GAP_IO_CAP_LAST\n};\n\n/// TK Type\nenum gap_tk_type\n{\n    ///  TK get from out of band method\n    GAP_TK_OOB         = 0x00,\n    /// TK generated and shall be displayed by local device\n    GAP_TK_DISPLAY,\n    /// TK shall be entered by user using device keyboard\n    GAP_TK_KEY_ENTRY\n};\n\n/// OOB Data Present Flag Values\nenum gap_oob\n{\n    /// OOB Data not present\n    GAP_OOB_AUTH_DATA_NOT_PRESENT = 0x00,\n    /// OOB data present\n    GAP_OOB_AUTH_DATA_PRESENT,\n    GAP_OOB_AUTH_DATA_LAST\n};\n\n/// Authentication mask\nenum gap_auth_mask\n{\n    /// No Flag set\n    GAP_AUTH_NONE    = 0,\n    /// Bond authentication\n    GAP_AUTH_BOND    = (1 << 0),\n    /// Man In the middle protection\n    GAP_AUTH_MITM    = (1 << 2),\n    /// Secure Connection\n    GAP_AUTH_SEC_CON = (1 << 3),\n    /// Key Notification\n    GAP_AUTH_KEY_NOTIF = (1 << 4)\n};\n\n/// Security Link Level\nenum gap_lk_sec_lvl\n{\n    /// No authentication\n    GAP_LK_NO_AUTH             = 0,\n    /// Unauthenticated link\n    GAP_LK_UNAUTH,\n    /// Authenticated link\n    GAP_LK_AUTH,\n    /// Secure Connection link\n    GAP_LK_SEC_CON,\n};\n\n/// Authentication Requirements\nenum gap_auth\n{\n    /// No MITM No Bonding\n    GAP_AUTH_REQ_NO_MITM_NO_BOND  = (GAP_AUTH_NONE),\n    /// No MITM Bonding\n    GAP_AUTH_REQ_NO_MITM_BOND     = (GAP_AUTH_BOND),\n    /// MITM No Bonding\n    GAP_AUTH_REQ_MITM_NO_BOND     = (GAP_AUTH_MITM),\n    /// MITM and Bonding\n    GAP_AUTH_REQ_MITM_BOND        = (GAP_AUTH_MITM | GAP_AUTH_BOND),\n    /// SEC_CON and No Bonding\n    GAP_AUTH_REQ_SEC_CON_NO_BOND  = (GAP_AUTH_SEC_CON),\n    /// SEC_CON and Bonding\n    GAP_AUTH_REQ_SEC_CON_BOND     = (GAP_AUTH_SEC_CON | GAP_AUTH_BOND),\n\n    GAP_AUTH_REQ_LAST,\n\n    /// Mask of  authentication features without reserved flag\n    GAP_AUTH_REQ_MASK             = 0x1F,\n};\n\n/// Key Distribution Flags\nenum gap_kdist\n{\n    /// No Keys to distribute\n    GAP_KDIST_NONE = 0x00,\n    /// Encryption key in distribution\n    GAP_KDIST_ENCKEY = (1 << 0),\n    /// IRK (ID key)in distribution\n    GAP_KDIST_IDKEY  = (1 << 1),\n    /// CSRK(Signature key) in distribution\n    GAP_KDIST_SIGNKEY= (1 << 2),\n    /// LTK in distribution\n    GAP_KDIST_LINKKEY=   (1 << 3),\n\n    GAP_KDIST_LAST =   (1 << 4)\n};\n\n/// Security Defines\nenum gap_sec_req\n{\n    /// No security (no authentication and encryption)\n    GAP_NO_SEC = 0x00,\n    /// Unauthenticated pairing with encryption\n    GAP_SEC1_NOAUTH_PAIR_ENC,\n    /// Authenticated pairing with encryption\n    GAP_SEC1_AUTH_PAIR_ENC,\n    /// Unauthenticated pairing with data signing\n    GAP_SEC2_NOAUTH_DATA_SGN,\n    /// Authentication pairing with data signing\n    GAP_SEC2_AUTH_DATA_SGN,\n    /// Secure Connection pairing with encryption\n    GAP_SEC1_SEC_CON_PAIR_ENC,\n};\n\n/// Bit field use to select the preferred TX or RX LE PHY Rate. 0 means no preferences\nenum gap_rate\n{\n    /// No preferred rate\n    GAP_RATE_ANY               = 0x00,\n    /// LE PHY 1mb/s preferred rate for an active link\n    GAP_RATE_LE_1MBPS          = (1 << 0),\n    /// LE PHY 2mb/s preferred rate for an active link\n    GAP_RATE_LE_2MBPS          = (1 << 1),\n};\n\n/// API settings bit field values\nenum gap_api_settings\n{\n    /// Use deprecated API and do not use extended air operations\n    GAP_ADD_INFO_USE_DEPRECATED_API_BIT = (1 << 0),\n};\n\n/// Privacy configuration\nenum gap_priv_cfg\n{\n    /// Indicate if public or static private random address must be used by default\n    GAP_PRIV_CFG_PRIV_ADDR_BIT = (1 << 0),\n    /// Bit 1 is reserved\n    GAP_PRIV_CFG_RSVD          = (1 << 1),\n    /// Indicate if controller privacy is enabled\n    GAP_PRIV_CFG_CTNL_PRIV_BIT = (1 << 2),\n};\n\n/// Type of own address\nenum gap_own_addr_type\n{\n    /// Use address configured using GAPM_SET_DEV_CONFIG_CMD.\n    /// Can be either a public address or a random static address\n    GAP_OWN_ADDR_TYPE_DEFAULT = 0,\n    /// Use a non-resolvable private address\n    GAP_OWN_ADDR_TYPE_NRPA,\n    /// Use a resolvable private address\n    GAP_OWN_ADDR_TYPE_RPA,\n};\n\n/// Type of activities that can be created\nenum gap_actv_type\n{\n    /// Advertising activity\n    GAP_ACTV_TYPE_ADV = 0,\n    /// Scanning activity\n    GAP_ACTV_TYPE_SCAN,\n    /// Initiating activity\n    GAP_ACTV_TYPE_INIT,\n    /// Periodic synchronization activity\n    GAP_ACTV_TYPE_PERIOD_SYNC,\n};\n\n/// Type of advertising that can be created\nenum gap_adv_type\n{\n    /// Legacy advertising\n    GAP_ADV_TYPE_LEGACY = 0,\n    /// Extended advertising\n    GAP_ADV_TYPE_EXTENDED,\n    /// Periodic advertising\n    GAP_ADV_TYPE_PERIODIC,\n};\n\n/// Advertising report type\nenum gap_adv_report_type\n{\n    /// Extended advertising report\n    GAP_REPORT_TYPE_ADV_EXT = 0,\n    /// Legacy advertising report\n    GAP_REPORT_TYPE_ADV_LEG,\n    /// Extended scan response report\n    GAP_REPORT_TYPE_SCAN_RSP_EXT,\n    /// Legacy scan response report\n    GAP_REPORT_TYPE_SCAN_RSP_LEG,\n    /// Periodic advertising report\n    GAP_REPORT_TYPE_PER_ADV,\n};\n\n/// Advertising properties bit field bit value\nenum gap_adv_prop\n{\n    /// Indicate that advertising is connectable, reception of CONNECT_REQ or AUX_CONNECT_REQ\n    /// PDUs is accepted. Not applicable for periodic advertising.\n    GAP_ADV_PROP_CONNECTABLE_BIT     = (1 << 0),\n    /// Indicate that advertising is scannable, reception of SCAN_REQ or AUX_SCAN_REQ PDUs is\n    /// accepted\n    GAP_ADV_PROP_SCANNABLE_BIT       = (1 << 1),\n    /// Indicate that advertising targets a specific device. Only apply in following cases:\n    ///   - Legacy advertising: if connectable\n    ///   - Extended advertising: connectable or (non connectable and non discoverable)\n    GAP_ADV_PROP_DIRECTED_BIT        = (1 << 2),\n    /// Indicate that High Duty Cycle has to be used for advertising on primary channel\n    /// Apply only if created advertising is not an extended advertising\n    GAP_ADV_PROP_HDC_BIT             = (1 << 3),\n    /// Bit 4 is reserved\n    GAP_ADV_PROP_RESERVED_4_BIT      = (1 << 4),\n    /// Enable anonymous mode. Device address won't appear in send PDUs\n    /// Valid only if created advertising is an extended advertising\n    GAP_ADV_PROP_ANONYMOUS_BIT       = (1 << 5),\n    /// Include TX Power in the extended header of the advertising PDU.\n    /// Valid only if created advertising is not a legacy advertising\n    GAP_ADV_PROP_TX_PWR_BIT          = (1 << 6),\n    /// Include TX Power in the periodic advertising PDU.\n    /// Valid only if created advertising is a periodic advertising\n    GAP_ADV_PROP_PER_TX_PWR_BIT      = (1 << 7),\n    /// Indicate if application must be informed about received scan requests PDUs\n    GAP_ADV_PROP_SCAN_REQ_NTF_EN_BIT = (1 << 8),\n};\n\n/// PHY Type\nenum gap_phy_type\n{\n    /// LE 1M\n    GAP_PHY_TYPE_LE_1M = 0,\n    /// LE 2M\n    GAP_PHY_TYPE_LE_2M,\n    /// LE Coded\n    GAP_PHY_TYPE_LE_CODED,\n};\n\n/// Advertising discovery mode\nenum gap_adv_disc_mode\n{\n    /// Mode in non-discoverable\n    GAP_ADV_MODE_NON_DISC = 0,\n    /// Mode in general discoverable\n    GAP_ADV_MODE_GEN_DISC,\n    /// Mode in limited discoverable\n    GAP_ADV_MODE_LIM_DISC,\n};\n\n/// Scanning Types\nenum gap_scan_type\n{\n    /// General discovery\n    GAP_SCAN_TYPE_GEN_DISC = 0,\n    /// Limited discovery\n    GAP_SCAN_TYPE_LIM_DISC,\n    /// Observer\n    GAP_SCAN_TYPE_OBSERVER,\n    /// Selective observer\n    GAP_SCAN_TYPE_SEL_OBSERVER,\n    /// Connectable discovery\n    GAP_SCAN_TYPE_CONN_DISC,\n    /// Selective connectable discovery\n    GAP_SCAN_TYPE_SEL_CONN_DISC,\n};\n\n/// Scanning properties bit field bit value\nenum gap_scan_prop\n{\n    /// Scan advertisement on the LE 1M PHY\n    GAP_SCAN_PROP_PHY_1M_BIT       = (1 << 0),\n    /// Scan advertisement on the LE Coded PHY\n    GAP_SCAN_PROP_PHY_CODED_BIT    = (1 << 1),\n    /// Active scan on LE 1M PHY (Scan Request PDUs may be sent)\n    GAP_SCAN_PROP_ACTIVE_1M_BIT    = (1 << 2),\n    /// Active scan on LE Coded PHY (Scan Request PDUs may be sent)\n    GAP_SCAN_PROP_ACTIVE_CODED_BIT = (1 << 3),\n    /// Accept directed advertising packets if we use a RPA and target address cannot be solved by the\n    /// controller\n    GAP_SCAN_PROP_ACCEPT_RPA_BIT   = (1 << 4),\n    /// Filter truncated advertising or scan response reports\n    GAP_SCAN_PROP_FILT_TRUNC_BIT   = (1 << 5),\n};\n\n/// Initiating Types\nenum gap_init_type\n{\n    /// Direct connection establishment, establish a connection with an indicated device\n    GAPM_INIT_TYPE_DIRECT_CONN_EST = 0,\n    /// Automatic connection establishment, establish a connection with all devices whose address is\n    /// present in the white list\n    GAPM_INIT_TYPE_AUTO_CONN_EST,\n    /// Name discovery, Establish a connection with an indicated device in order to read content of its\n    /// Device Name characteristic. Connection is closed once this operation is stopped.\n    GAPM_INIT_TYPE_NAME_DISC,\n};\n\n/// Initiating Properties\nenum gap_init_prop\n{\n    /// Scan connectable advertisements on the LE 1M PHY. Connection parameters for the LE 1M PHY are provided\n    GAPM_INIT_PROP_1M_BIT       = (1 << 0),\n    /// Connection parameters for the LE 2M PHY are provided\n    GAPM_INIT_PROP_2M_BIT       = (1 << 1),\n    /// Scan connectable advertisements on the LE Coded PHY. Connection parameters for the LE Coded PHY are provided\n    GAPM_INIT_PROP_CODED_BIT    = (1 << 2),\n};\n\n/// Advertising report information\nenum gap_adv_report_info\n{\n    /// Report Type\n    GAP_REPORT_INFO_REPORT_TYPE         = 0x07,\n    /// Report is complete\n    GAP_REPORT_INFO_COMPLETE            = (1 << 3),\n    /// Connectable advertising\n    GAP_REPORT_INFO_CONN_ADV            = (1 << 4),\n    /// Scannable advertising\n    GAP_REPORT_INFO_SCAN_ADV            = (1 << 5),\n    /// Directed advertising\n    GAP_REPORT_INFO_DIR_ADV             = (1 << 6),\n};\n\n/// Filtering policy for duplicated packets\nenum gap_dup_filter_pol\n{\n    /// Disable filtering of duplicated packets\n    GAP_DUP_FILT_DIS = 0,\n    /// Enable filtering of duplicated packets\n    GAP_DUP_FILT_EN,\n    /// Enable filtering of duplicated packets, reset for each scan period\n    GAP_DUP_FILT_EN_PERIOD,\n};\n\n/*\n * Masks for advertising properties\n ****************************************************************************************\n */\n\n/// Advertising properties configurations for legacy advertising\nenum gap_leg_adv_prop\n{\n    /// Non connectable non scannable advertising\n    GAP_ADV_PROP_NON_CONN_NON_SCAN_MASK  = 0x0000,\n    /// Broadcast non scannable advertising - Discovery mode must be Non Discoverable\n    GAP_ADV_PROP_BROADCAST_NON_SCAN_MASK = GAP_ADV_PROP_NON_CONN_NON_SCAN_MASK,\n    /// Non connectable scannable advertising\n    GAP_ADV_PROP_NON_CONN_SCAN_MASK      = GAP_ADV_PROP_SCANNABLE_BIT,\n    /// Broadcast non scannable advertising - Discovery mode must be Non Discoverable\n    GAP_ADV_PROP_BROADCAST_SCAN_MASK     = GAP_ADV_PROP_NON_CONN_SCAN_MASK,\n    /// Undirected connectable advertising\n    GAP_ADV_PROP_UNDIR_CONN_MASK         = GAP_ADV_PROP_CONNECTABLE_BIT | GAP_ADV_PROP_SCANNABLE_BIT,\n    /// Directed connectable advertising\n    GAP_ADV_PROP_DIR_CONN_MASK           = GAP_ADV_PROP_DIRECTED_BIT | GAP_ADV_PROP_CONNECTABLE_BIT,\n    /// Directed connectable with Low Duty Cycle\n    GAP_ADV_PROP_DIR_CONN_LDC_MASK       = GAP_ADV_PROP_DIR_CONN_MASK,\n    /// Directed connectable with High Duty Cycle\n    GAP_ADV_PROP_DIR_CONN_HDC_MASK       = GAP_ADV_PROP_DIR_CONN_MASK | GAP_ADV_PROP_HDC_BIT,\n};\n\n/// Advertising properties configurations for extended advertising\nenum gap_ext_adv_prop\n{\n    /// Non connectable non scannable extended advertising\n    GAP_EXT_ADV_PROP_NON_CONN_NON_SCAN_MASK = 0x0000,\n    /// Non connectable scannable extended advertising\n    GAP_EXT_ADV_PROP_NON_CONN_SCAN_MASK     = GAP_ADV_PROP_SCANNABLE_BIT,\n    /// Undirected connectable extended advertising\n    GAP_EXT_ADV_PROP_UNDIR_CONN_MASK        = GAP_ADV_PROP_CONNECTABLE_BIT,\n    /// Directed connectable extended advertising\n    GAP_EXT_ADV_PROP_DIR_CONN_MASK          = GAP_ADV_PROP_CONNECTABLE_BIT | GAP_ADV_PROP_DIRECTED_BIT,\n};\n\n/*************** GAP Structures ********************/\n\n/// Device name\nstruct gap_dev_name\n{\n    /// name length\n    uint16_t length;\n    /// name value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// Slave preferred connection parameters\nstruct gap_slv_pref\n{\n    /// Connection interval minimum\n    uint16_t con_intv_min;\n    /// Connection interval maximum\n    uint16_t con_intv_max;\n    /// Slave latency\n    uint16_t slave_latency;\n    /// Connection supervision timeout multiplier\n    uint16_t conn_timeout;\n};\n\n///BD Address structure\n#define BLE_BD_ADDR_T\ntypedef struct\n{\n    ///6-byte array address value\n    uint8_t  addr[GAP_BD_ADDR_LEN];\n} bd_addr_t;\n\n///Channel map structure\ntypedef struct\n{\n    ///5-byte channel map array\n    uint8_t map[GAP_LE_CHNL_MAP_LEN];\n} le_chnl_map_t;\n\n\n///Random number structure\ntypedef struct\n{\n    ///8-byte array for random number\n    uint8_t     nb[GAP_RAND_NB_LEN];\n} rand_nb_t;\n\n///Advertising report structure\ntypedef struct\n{\n    ///Event type:\n    /// - ADV_CONN_UNDIR: Connectable Undirected advertising\n    /// - ADV_CONN_DIR: Connectable directed advertising\n    /// - ADV_DISC_UNDIR: Discoverable undirected advertising\n    /// - ADV_NONCONN_UNDIR: Non-connectable undirected advertising\n    uint8_t        evt_type;\n    ///Advertising address type: public/random\n    uint8_t        adv_addr_type;\n    ///Advertising address value\n    bd_addr_t      adv_addr;\n    ///Data length in advertising packet\n    uint8_t        data_len;\n    ///Data of advertising packet\n    uint8_t        data[GAP_ADV_DATA_LEN];\n    ///RSSI value for advertising packet\n    uint8_t        rssi;\n} adv_report_t;\n\n\n/// P256 Public key data format\ntypedef struct\n{\n    /// X Coordinate of the key\n    uint8_t x[GAP_P256_KEY_LEN];\n    /// X Coordinate of the key\n    uint8_t y[GAP_P256_KEY_LEN];\n} public_key_t;\n/// P256 private key data format\ntypedef struct\n{\n    ///MSB->LSB\n    uint8_t Secrt_key[GAP_P256_KEY_LEN];\n} private_key_t;\n\n\n\n/// Address information about a device address\nstruct gap_bdaddr\n{\n    /// BD Address of device\n    bd_addr_t addr;\n    /// Address type of the device 0=public/1=private random\n    uint8_t addr_type;\n};\n\n/// Resolving list device information\nstruct gap_ral_dev_info\n{\n    /// Address type of the device 0=public/1=private random\n    uint8_t addr_type;\n    /// BD Address of device\n    bd_addr_t addr;\n    /// Peer IRK\n    uint8_t peer_irk[GAP_KEY_LEN];\n    /// Local IRK\n    uint8_t local_irk[GAP_KEY_LEN];\n};\n\n/// Generic Security key structure\nstruct gap_sec_key\n{\n    /// Key value MSB -> LSB\n    uint8_t key[GAP_KEY_LEN];\n};\n\n/// Configuration for advertising on primary channel\nstruct gap_adv_prim_cfg\n{\n    /// Minimum advertising interval (in unit of 625us). Must be greater than 20ms\n    uint32_t adv_intv_min;\n    /// Maximum advertising interval (in unit of 625us). Must be greater than 20ms\n    uint32_t adv_intv_max;\n    /// Bit field indicating the channel mapping\n    uint8_t chnl_map;\n    /// Indicate on which PHY primary advertising has to be performed (@see enum gap_phy_type)\n    /// Note that LE 2M PHY is not allowed and that legacy advertising only support LE 1M PHY\n    uint8_t phy;\n};\n\n/// Configuration for advertising on secondary channel\nstruct gap_adv_second_cfg\n{\n    /// Maximum number of advertising events the controller can skip before sending the\n    /// AUX_ADV_IND packets. 0 means that AUX_ADV_IND PDUs shall be sent prior each\n    /// advertising events\n    uint8_t max_skip;\n    /// Indicate on which PHY secondary advertising has to be performed (@see enum gap_phy_type)\n    uint8_t phy;\n    /// Advertising SID\n    uint8_t adv_sid;\n};\n\n/// Configuration for periodic advertising\nstruct gap_adv_period_cfg\n{\n    /// Minimum advertising interval (in unit of 1.25ms). Must be greater than 20ms\n    uint16_t adv_intv_min;\n    /// Maximum advertising interval (in unit of 1.25ms). Must be greater than 20ms\n    uint16_t adv_intv_max;\n};\n\n/// Advertising parameters\nstruct gap_adv_param\n{\n    /// Advertising type (@see enum gap_adv_type)\n    uint8_t type;\n    /// Discovery mode (@see enum gap_adv_mode)\n    uint8_t disc_mode;\n    /// Bit field value provided advertising properties (@see enum gap_adv_prop for bit signification)\n    uint16_t prop;\n    /// Maximum power level at which the advertising packets have to be transmitted\n    /// (between -127 and 126 dBm)\n    int8_t max_tx_pwr;\n    /// Advertising filtering policy\n    uint8_t filter_pol;\n    /// Peer address configuration (only used in case of directed advertising)\n    struct gap_bdaddr peer_addr;\n    /// Configuration for primary advertising\n    struct gap_adv_prim_cfg prim_cfg;\n    /// Configuration for secondary advertising (valid only if advertising type is\n    /// GAPM_ADV_TYPE_EXTENDED or GAPM_ADV_TYPE_PERIODIC)\n    struct gap_adv_second_cfg second_cfg;\n    /// Configuration for periodic advertising (valid only if advertising type os\n    /// GAPM_ADV_TYPE_PERIODIC)\n    struct gap_adv_period_cfg period_cfg;\n};\n\n/// Additional advertising parameters\nstruct gap_adv_add_param\n{\n    /// Advertising duration (in unit of 10ms). 0 means that advertising continues\n    /// until the host disable it\n    uint16_t duration;\n    /// Maximum number of extended advertising events the controller shall attempt to send prior to\n    /// terminating the extending advertising\n    /// Valid only if extended advertising\n    uint8_t max_adv_evt;\n};\n\n/// Scan Window operation parameters\nstruct gap_scan_wd_op_param\n{\n    /// Scan interval\n    uint16_t scan_intv;\n    /// Scan window\n    uint16_t scan_wd;\n};\n\n/// Scanning parameters\nstruct gap_scan_param\n{\n    /// Type of scanning to be started (@see enum gap_scan_type)\n    uint8_t type;\n    /// Properties for the scan procedure (@see enum gap_scan_prop for bit signification)\n    uint8_t prop;\n    /// Duplicate packet filtering policy\n    uint8_t dup_filt_pol;\n    /// Reserved for future use\n    uint8_t rsvd;\n    /// Scan window opening parameters for LE 1M PHY\n    struct gap_scan_wd_op_param scan_param_1m;\n    /// Scan window opening parameters for LE Coded PHY\n    struct gap_scan_wd_op_param scan_param_coded;\n    /// Scan duration (in unit of 10ms). 0 means that the controller will scan continuously until\n    /// reception of a stop command from the application\n    uint16_t duration;\n    /// Scan period (in unit of 1.28s). Time interval betweem two consequent starts of a scan duration\n    /// by the controller. 0 means that the scan procedure is not periodic\n    uint16_t period;\n};\n\n/// Connection parameters\nstruct gap_conn_param\n{\n    /// Minimum value for the connection interval (in unit of 1.25ms). Shall be less than or equal to\n    /// conn_intv_max value. Allowed range is 7.5ms to 4s.\n    uint16_t conn_intv_min;\n    /// Maximum value for the connection interval (in unit of 1.25ms). Shall be greater than or equal to\n    /// conn_intv_min value. Allowed range is 7.5ms to 4s.\n    uint16_t conn_intv_max;\n    /// Slave latency. Number of events that can be missed by a connected slave device\n    uint16_t conn_latency;\n    /// Link supervision timeout (in unit of 10ms). Allowed range is 100ms to 32s\n    uint16_t supervision_to;\n    /// Recommended minimum duration of connection events (in unit of 625us)\n    uint16_t ce_len_min;\n    /// Recommended maximum duration of connection events (in unit of 625us)\n    uint16_t ce_len_max;\n};\n\n/// Initiating parameters\nstruct gap_init_param\n{\n    /// Initiating type (@see enum gap_init_type)\n    uint8_t type;\n    /// Properties for the initiating procedure (@see enum gap_init_prop for bit signification)\n    uint8_t prop;\n    /// Timeout for automatic connection establishment (in unit of 10ms). Cancel the procedure if not all\n    /// indicated devices have been connected when the timeout occurs. 0 means there is no timeout\n    uint16_t conn_to;\n    /// Scan window opening parameters for LE 1M PHY\n    struct gap_scan_wd_op_param scan_param_1m;\n    /// Scan window opening parameters for LE Coded PHY\n    struct gap_scan_wd_op_param scan_param_coded;\n    /// Connection parameters for LE 1M PHY\n    struct gap_conn_param conn_param_1m;\n    /// Connection parameters for LE 2M PHY\n    struct gap_conn_param conn_param_2m;\n    /// Connection parameters for LE Coded PHY\n    struct gap_conn_param conn_param_coded;\n    /// Address of peer device in case white list is not used for connection\n    struct gap_bdaddr peer_addr;\n};\n\n/// Periodic advertising information\nstruct gap_period_adv_addr_cfg\n{\n    /// Advertiser address information\n    struct gap_bdaddr addr;\n    /// Advertising SID\n    uint8_t adv_sid;\n};\n\n/// Periodic synchronization parameters\nstruct gap_period_sync_param\n{\n    /// Number of periodic advertising that can be skipped after a successful receive. Maximum authorized\n    /// value is 499\n    uint16_t skip;\n    /// Synchronization timeout for the periodic advertising (in unit of 10ms between 100ms and 163.84s)\n    uint16_t sync_to;\n    /// Indicate if Periodic Advertiser List has to be used to determine which advertiser to listen to, else\n    /// provided advertiser information are used\n    uint8_t use_pal;\n    /// Reserved for future used\n    uint8_t rsvd;\n    /// Address of advertiser with which synchronization has to be established (used only if use_pal is false)\n    struct gap_period_adv_addr_cfg adv_addr;\n};\n\n/// @} GAP\n#endif // GAP_H_\n"
  },
  {
    "path": "services/ble_stack/hl/api/gapc_task.h",
    "content": "#ifndef _GAPC_TASK_H_\n#define _GAPC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GAPC_TASK Generic Access Profile Controller Task\n * @ingroup GAPC\n * @brief Handles ALL messages to/from GAP Controller block.\n *\n * It handles messages from lower and higher layers related to an ongoing connection.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_task.h\" // Task definitions\n#include \"gap.h\"\n#include \n\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/// GAP Controller Task messages\nenum gapc_msg_id\n{\n    /* Default event */\n    /// Command Complete event\n    GAPC_CMP_EVT = TASK_FIRST_MSG(TASK_ID_GAPC),\n\n    /* Connection state information */\n    /// Indicate that a connection has been established\n    GAPC_CONNECTION_REQ_IND,\n    /// Set specific link data configuration.\n    GAPC_CONNECTION_CFM,\n\n    /// Indicate that a link has been disconnected\n    GAPC_DISCONNECT_IND,\n\n    /* Link management command */\n    /// Request disconnection of current link command.\n    GAPC_DISCONNECT_CMD,\n\n    /* Peer device info */\n    /// Retrieve information command\n    GAPC_GET_INFO_CMD,\n    /// Peer device attribute DB info such as Device Name, Appearance or Slave Preferred Parameters\n    GAPC_PEER_ATT_INFO_IND,\n    /// Indication of peer version info\n    GAPC_PEER_VERSION_IND,\n    /// Indication of peer features info\n    GAPC_PEER_FEATURES_IND,\n    /// Indication of ongoing connection RSSI\n    GAPC_CON_RSSI_IND,\n\n    /* Device Name Management */\n    /// Peer device request local device info such as name, appearance or slave preferred parameters\n    GAPC_GET_DEV_INFO_REQ_IND,\n    /// Send requested info to peer device\n    GAPC_GET_DEV_INFO_CFM,\n    /// Peer device request to modify local device info such as name or appearance\n    GAPC_SET_DEV_INFO_REQ_IND,\n    /// Local device accept or reject device info modification\n    GAPC_SET_DEV_INFO_CFM,\n\n    /* Connection parameters update */\n    /// Perform update of connection parameters command\n    GAPC_PARAM_UPDATE_CMD,\n    /// Request of updating connection parameters indication\n    GAPC_PARAM_UPDATE_REQ_IND,\n    /// Master confirm or not that parameters proposed by slave are accepted or not\n    GAPC_PARAM_UPDATE_CFM,\n    /// Connection parameters updated indication\n    GAPC_PARAM_UPDATED_IND,\n\n    /* Bonding procedure */\n    /// Start Bonding command procedure\n    GAPC_BOND_CMD,\n    /// Bonding requested by peer device indication message.\n    GAPC_BOND_REQ_IND,\n    /// Confirm requested bond information.\n    GAPC_BOND_CFM,\n    /// Bonding information indication message\n    GAPC_BOND_IND,\n\n    /* Encryption procedure */\n    /// Start Encryption command procedure\n    GAPC_ENCRYPT_CMD,\n    /// Encryption requested by peer device indication message.\n    GAPC_ENCRYPT_REQ_IND,\n    /// Confirm requested Encryption information.\n    GAPC_ENCRYPT_CFM,\n    /// Encryption information indication message\n    GAPC_ENCRYPT_IND,\n\n    /* Security request procedure */\n    /// Start Security Request command procedure\n    GAPC_SECURITY_CMD,\n    /// Security requested by peer device indication message\n    GAPC_SECURITY_IND,\n\n    /* Signature procedure */\n    /// Indicate the current sign counters to the application\n    GAPC_SIGN_COUNTER_IND,\n\n    /* Device information */\n    /// Indication of ongoing connection Channel Map\n    GAPC_CON_CHANNEL_MAP_IND,\n\n\n    /* Deprecated */\n    /// Deprecated messages\n    GAPC_DEPRECATED_0,\n    GAPC_DEPRECATED_1,\n    GAPC_DEPRECATED_2,\n    GAPC_DEPRECATED_3,\n    GAPC_DEPRECATED_4,\n    GAPC_DEPRECATED_5,\n    GAPC_DEPRECATED_6,\n    GAPC_DEPRECATED_7,\n    GAPC_DEPRECATED_8,\n    GAPC_DEPRECATED_9,\n\n    /* LE Ping */\n    /// Update LE Ping timeout value\n    GAPC_SET_LE_PING_TO_CMD,\n    /// LE Ping timeout indication\n    GAPC_LE_PING_TO_VAL_IND,\n    /// LE Ping timeout expires indication\n    GAPC_LE_PING_TO_IND,\n\n    /* LE Data Length extension*/\n    /// LE Set Data Length Command\n    GAPC_SET_LE_PKT_SIZE_CMD,\n    /// LE Set Data Length Indication\n    GAPC_LE_PKT_SIZE_IND,\n\n    /* Secure Connections */\n    /// Request to inform the remote device when keys have been entered or erased\n    GAPC_KEY_PRESS_NOTIFICATION_CMD,\n    /// Indication that a KeyPress has been performed on the peer device.\n    GAPC_KEY_PRESS_NOTIFICATION_IND,\n\n    /* LE PHY update */\n    /// Set the PHY configuration for current active link\n    GAPC_SET_PHY_CMD,\n    /// Active link PHY configuration. Triggered when configuration is read or during an update.\n    GAPC_LE_PHY_IND,\n\n    // ---------------------- INTERNAL API ------------------------\n    /* Internal messages for timer events, not part of API*/\n    /// Signature procedure\n    GAPC_SIGN_CMD,\n    /// Signature result\n    GAPC_SIGN_IND,\n\n    /// Parameter update procedure timeout indication\n    GAPC_PARAM_UPDATE_TO_IND,\n    /// Pairing procedure timeout indication\n    GAPC_SMP_TIMEOUT_TIMER_IND,\n    /// Pairing repeated attempts procedure timeout indication\n    GAPC_SMP_REP_ATTEMPTS_TIMER_IND,\n};\n\n\n\n\n/// request operation type - application interface\nenum gapc_operation\n{\n    /*                 Operation Flags                  */\n    /* No Operation (if nothing has been requested)     */\n    /* ************************************************ */\n    /// No operation\n    GAPC_NO_OP                                    = 0x00,\n\n    /* Connection management */\n    /// Disconnect link\n    GAPC_DISCONNECT,\n\n    /* Connection information */\n    /// Retrieve name of peer device.\n    GAPC_GET_PEER_NAME,\n    /// Retrieve peer device version info.\n    GAPC_GET_PEER_VERSION,\n    /// Retrieve peer device features.\n    GAPC_GET_PEER_FEATURES,\n    /// Get Peer device appearance\n    GAPC_GET_PEER_APPEARANCE,\n    /// Get Peer device Slaved Preferred Parameters\n    GAPC_GET_PEER_SLV_PREF_PARAMS,\n    /// Retrieve connection RSSI.\n    GAPC_GET_CON_RSSI,\n    /// Retrieve Connection Channel MAP.\n    GAPC_GET_CON_CHANNEL_MAP,\n\n    /* Connection parameters update */\n    /// Perform update of connection parameters.\n    GAPC_UPDATE_PARAMS,\n\n    /* Security procedures */\n    /// Start bonding procedure.\n    GAPC_BOND,\n    /// Start encryption procedure.\n    GAPC_ENCRYPT,\n    /// Start security request procedure\n    GAPC_SECURITY_REQ,\n\n    /* Deprecated */\n    /// Deprecated operation\n    GAPC_OP_DEPRECATED_0,\n    GAPC_OP_DEPRECATED_1,\n    GAPC_OP_DEPRECATED_2,\n    GAPC_OP_DEPRECATED_3,\n    GAPC_OP_DEPRECATED_4,\n\n    /* LE Ping*/\n    /// get timer timeout value\n    GAPC_GET_LE_PING_TO,\n    /// set timer timeout value\n    GAPC_SET_LE_PING_TO,\n\n    /* LE Data Length extension*/\n    /// LE Set Data Length\n    GAPC_SET_LE_PKT_SIZE,\n\n    /* Central Address resolution supported*/\n    GAPC_GET_ADDR_RESOL_SUPP,\n\n    /* Secure Connections */\n    /// Request to inform the remote device when keys have been entered or erased\n    GAPC_KEY_PRESS_NOTIFICATION,\n\n    /* LE PHY update */\n    /// Set the PHY configuration for current active link\n    GAPC_SET_PHY,\n    /// Retrieve PHY configuration of active link\n    GAPC_GET_PHY,\n\n    // ---------------------- INTERNAL API ------------------------\n    /* Packet signature */\n    /// sign an attribute packet\n    GAPC_SIGN_PACKET,\n    /// Verify signature or an attribute packet\n    GAPC_SIGN_CHECK,\n};\n\n/// Bond event type.\nenum gapc_bond\n{\n    /// Bond Pairing request\n    GAPC_PAIRING_REQ,\n    /// Respond to Pairing request\n    GAPC_PAIRING_RSP,\n\n    /// Pairing Finished information\n    GAPC_PAIRING_SUCCEED,\n    /// Pairing Failed information\n    GAPC_PAIRING_FAILED,\n\n    /// Used to retrieve pairing Temporary Key\n    GAPC_TK_EXCH,\n    /// Used for Identity Resolving Key exchange\n    GAPC_IRK_EXCH,\n    /// Used for Connection Signature Resolving Key exchange\n    GAPC_CSRK_EXCH,\n    /// Used for Long Term Key exchange\n    GAPC_LTK_EXCH,\n\n    /// Bond Pairing request issue, Repeated attempt\n    GAPC_REPEATED_ATTEMPT,\n\n    /// Out of Band - exchange of confirm and rand.\n    GAPC_OOB_EXCH,\n\n    /// Numeric Comparison - Exchange of Numeric Value -\n    GAPC_NC_EXCH\n};\n\n/// List of device info that should be provided by application\nenum gapc_dev_info\n{\n    /// Device Name\n    GAPC_DEV_NAME,\n    /// Device Appearance Icon\n    GAPC_DEV_APPEARANCE,\n    /// Device Slave preferred parameters\n    GAPC_DEV_SLV_PREF_PARAMS,\n    /// Device Central address resolution\n    GAPC_DEV_CTL_ADDR_RESOL,\n    /// maximum device info parameter\n    GAPC_DEV_INFO_MAX,\n};\n\n/// List of features available on a device\nenum gapc_features_list\n{\n    /// LE encryption\n    GAPC_ENCRYPT_FEAT_MASK              = (1 << 0),\n    /// Connection Parameters Request Procedure\n    GAPC_CONN_PARAM_REQ_FEAT_MASK       = (1 << 1),\n    /// Extended Reject Indication\n    GAPC_EXT_REJECT_IND_FEAT_MASK       = (1 << 2),\n    /// Slave-initiated Features Exchange\n    GAPC_SLAVE_FEAT_EXCH_FEAT_MASK      = (1 << 3),\n    /// LE ping\n    GAPC_LE_PING_FEAT_MASK              = (1 << 4),\n    /// data packet length extension\n    GAPC_EXT_DATA_LEN_MASK              = (1 << 5),\n    /// LL privacy\n    GAPC_LL_PRIVACY_MASK              \t= (1 << 6),\n    /// Extended Scanner Filter Policies\n    GAPC_EXT_SCANNER_FILTER_POLICIES_MASK = (1 << 7),\n    \n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Operation command structure in order to keep requested operation.\nstruct gapc_operation_cmd\n{\n    /// GAP request type\n    uint8_t operation;\n};\n\n\n/// Command complete event data structure\nstruct gapc_cmp_evt\n{\n    /// GAP request type\n    uint8_t operation;\n    /// Status of the request\n    uint8_t status;\n};\n\n/// Indicate that a connection has been established\nstruct gapc_connection_req_ind\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// Connection interval\n    uint16_t con_interval;\n    /// Connection latency\n    uint16_t con_latency;\n    /// Link supervision timeout\n    uint16_t sup_to;\n    /// Clock accuracy\n    uint8_t clk_accuracy;\n    /// Peer address type\n    uint8_t peer_addr_type;\n    /// Peer BT address\n    bd_addr_t peer_addr;\n};\n\n\n/// Set specific link data configuration.\nstruct gapc_connection_cfm\n{\n    /// Local CSRK value\n    struct gap_sec_key lcsrk;\n    /// Local signature counter value\n    uint32_t lsign_counter;\n\n    /// Remote CSRK value\n    struct gap_sec_key rcsrk;\n    /// Remote signature counter value\n    uint32_t rsign_counter;\n\n    /// Authentication (@see gap_auth)\n    uint8_t auth;\n    /// Service Changed Indication enabled\n    uint8_t svc_changed_ind_enable;\n    /// LTK exchanged during pairing.\n    bool ltk_present;\n};\n\n\n/// Request disconnection of current link command.\nstruct gapc_disconnect_cmd\n{\n    /// GAP request type:\n    /// - GAPC_DISCONNECT: Disconnect link.\n    uint8_t operation;\n\n    /// Reason of disconnection\n    uint8_t reason;\n};\n\n\n/// Indicate that a link has been disconnected\nstruct gapc_disconnect_ind\n{\n    /// Connection handle\n    uint16_t conhdl;\n    /// Reason of disconnection\n    uint8_t reason;\n};\n\n\n/// Retrieve information command\nstruct gapc_get_info_cmd\n{\n    /// GAP request type:\n    /// - GAPC_GET_PEER_NAME: Retrieve name of peer device.\n    /// - GAPC_GET_PEER_VERSION: Retrieve peer device version info.\n    /// - GAPC_GET_PEER_FEATURES: Retrieve peer device features.\n    /// - GAPC_GET_CON_RSSI: Retrieve connection RSSI.\n    /// - GAPC_GET_CON_CHANNEL_MAP: Retrieve Connection Channel MAP.\n    /// - GAPC_GET_PEER_APPEARANCE: Get Peer device appearance\n    /// - GAPC_GET_PEER_SLV_PREF_PARAMS: Get Peer device Slaved Preferred Parameters\n    /// - GAPC_GET_ADDR_RESOL_SUPP: Address Resolution Supported\n    /// - GAPC_GET_LE_PING_TIMEOUT: Retrieve LE Ping Timeout Value\n    uint8_t operation;\n};\n\n/// device information data\nunion gapc_dev_info_val\n{\n    /// Device name\n    struct gap_dev_name name;\n    /// Appearance Icon\n    uint16_t appearance;\n    /// Slave preferred parameters\n    struct gap_slv_pref slv_params;\n    /// Central address resolution\n    uint8_t cnt_addr_resol;\n};\n\n/// Peer device attribute DB info such as Device Name, Appearance or Slave Preferred Parameters\nstruct gapc_peer_att_info_ind\n{\n    /// Requested information\n    /// - GAPC_DEV_NAME: Device Name\n    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon\n    /// - GAPC_DEV_SLV_PREF_PARAMS: Device Slave preferred parameters\n    /// - GAPC_GET_ADDR_RESOL_SUPP: Address resolution supported\n    uint8_t  req;\n    /// Attribute handle\n    uint16_t handle;\n\n    /// device information data\n    union gapc_dev_info_val info;\n};\n\n/// Indication of peer version info\nstruct gapc_peer_version_ind\n{\n    /// Manufacturer name\n    uint16_t compid;\n    /// LMP subversion\n    uint16_t lmp_subvers;\n    /// LMP version\n    uint8_t  lmp_vers;\n};\n\n/// Indication of peer features info\nstruct gapc_peer_features_ind\n{\n    /// 8-byte array for LE features\n    uint8_t features[GAP_LE_FEATS_LEN];\n};\n\n/// Indication of ongoing connection RSSI\nstruct gapc_con_rssi_ind\n{\n    /// RSSI value\n    uint8_t rssi;\n};\n/// Indication of ongoing connection Channel Map\nstruct gapc_con_channel_map_ind\n{\n    /// channel map value\n    le_chnl_map_t ch_map;\n};\n\n/// Sign counter value changed due to packet signing or signature verification.\nstruct gapc_sign_counter_updated_ind\n{\n    /// New Local signature counter value\n    uint32_t lsign_counter;\n    /// New Remote signature counter value\n    uint32_t rsign_counter;\n};\n\n/// Indication of LE Ping\nstruct gapc_le_ping_to_val_ind\n{\n    ///Authenticated payload timeout\n    uint16_t timeout;\n};\n\n\n/// Peer device request local device info such as name, appearance or slave preferred parameters\nstruct gapc_get_dev_info_req_ind\n{\n    /// Requested information\n    /// - GAPC_DEV_NAME: Device Name\n    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon\n    /// - GAPC_DEV_SLV_PREF_PARAMS: Device Slave preferred parameters\n    uint8_t req;\n};\n\n\n\n/// Send requested info to peer device\nstruct gapc_get_dev_info_cfm\n{\n    /// Requested information\n    /// - GAPC_DEV_NAME: Device Name\n    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon\n    /// - GAPC_DEV_SLV_PREF_PARAMS: Device Slave preferred parameters\n    uint8_t req;\n\n    /// Peer device information data\n    union gapc_dev_info_val info;\n};\n\n/// Peer device request to modify local device info such as name or appearance\nstruct gapc_set_dev_info_req_ind\n{\n    /// Requested information\n    /// - GAPC_DEV_NAME: Device Name\n    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon\n    uint8_t req;\n\n    /// device information data\n    union gapc_set_dev_info\n    {\n        /// Device name\n        struct gap_dev_name name;\n        /// Appearance Icon\n        uint16_t appearance;\n    } info;\n};\n\n/// Local device accept or reject device info modification\nstruct gapc_set_dev_info_cfm\n{\n    /// Requested information\n    /// - GAPC_DEV_NAME: Device Name\n    /// - GAPC_DEV_APPEARANCE: Device Appearance Icon\n    uint8_t req;\n\n    /// Status code used to know if requested has been accepted or not\n    uint8_t status;\n};\n\n/// Connection Parameter used to update connection parameters\nstruct gapc_conn_param\n{\n    /// Connection interval minimum\n    uint16_t intv_min;\n    /// Connection interval maximum\n    uint16_t intv_max;\n    /// Latency\n    uint16_t latency;\n    /// Supervision timeout\n    uint16_t time_out;\n};\n\n/// Perform update of connection parameters command\nstruct gapc_param_update_cmd\n{\n    /// GAP request type:\n    /// - GAPC_UPDATE_PARAMS: Perform update of connection parameters.\n    uint8_t operation;\n    /// Internal parameter used to manage internally l2cap packet identifier for signaling\n    uint8_t pkt_id;\n    /// Connection interval minimum\n    uint16_t intv_min;\n    /// Connection interval maximum\n    uint16_t intv_max;\n    /// Latency\n    uint16_t latency;\n    /// Supervision timeout\n    uint16_t time_out;\n    /// Minimum Connection Event Duration\n    uint16_t ce_len_min;\n    /// Maximum Connection Event Duration\n    uint16_t ce_len_max;\n};\n\n/// Request of updating connection parameters indication\nstruct gapc_param_update_req_ind\n{\n    /// Connection interval minimum\n    uint16_t intv_min;\n    /// Connection interval maximum\n    uint16_t intv_max;\n    /// Latency\n    uint16_t latency;\n    /// Supervision timeout\n    uint16_t time_out;\n};\n\n/// Connection parameters updated indication\nstruct gapc_param_updated_ind\n{\n    ///Connection interval value\n    uint16_t            con_interval;\n    ///Connection latency value\n    uint16_t            con_latency;\n    ///Supervision timeout\n    uint16_t            sup_to;\n};\n\n/// Master confirm or not that parameters proposed by slave are accepted or not\nstruct gapc_param_update_cfm\n{\n    /// True to accept slave connection parameters, False else.\n    bool accept;\n    /// Minimum Connection Event Duration\n    uint16_t ce_len_min;\n    /// Maximum Connection Event Duration\n    uint16_t ce_len_max;\n};\n\n/// Pairing parameters\nstruct gapc_pairing\n{\n    /// IO capabilities (@see gap_io_cap)\n    uint8_t iocap;\n    /// OOB information (@see gap_oob)\n    uint8_t oob;\n    /// Authentication (@see gap_auth)\n    /// Note in BT 4.1 the Auth Field is extended to include 'Key Notification' and\n    /// and 'Secure Connections'.\n    uint8_t auth;\n    /// Encryption key size (7 to 16)\n    uint8_t key_size;\n    ///Initiator key distribution (@see gap_kdist)\n    uint8_t ikey_dist;\n    ///Responder key distribution (@see gap_kdist)\n    uint8_t rkey_dist;\n\n    /// Device security requirements (minimum security level). (@see gap_sec_req)\n    uint8_t sec_req;\n};\n\n/// Long Term Key information\nstruct gapc_ltk\n{\n    /// Long Term Key\n    struct gap_sec_key ltk;\n    /// Encryption Diversifier\n    uint16_t ediv;\n    /// Random Number\n    rand_nb_t randnb;\n    /// Encryption key size (7 to 16)\n    uint8_t key_size;\n\n    uint8_t isLocal;\n};\n/// Out of Band Information\nstruct gapc_oob\n{\n    /// Confirm Value\n    uint8_t conf[GAP_KEY_LEN];\n    /// Random Number\n    uint8_t rand[GAP_KEY_LEN];\n};\n\nstruct gapc_nc\n{\n    uint8_t value[4];\n};\n\n/// Identity Resolving Key information\nstruct gapc_irk\n{\n    /// Identity Resolving Key\n    struct gap_sec_key irk;\n    /// Device BD Identity Address\n    struct gap_bdaddr addr;\n};\n\n\n/// Start Bonding command procedure\nstruct gapc_bond_cmd\n{\n    /// GAP request type:\n    /// - GAPC_BOND:  Start bonding procedure.\n    uint8_t operation;\n    /// Pairing information\n    struct gapc_pairing pairing;\n};\n\n/// Bonding requested by peer device indication message.\nstruct gapc_bond_req_ind\n{\n    /// Bond request type (@see gapc_bond)\n    uint8_t request;\n\n    /// Bond procedure requested information data\n    union gapc_bond_req_data\n    {\n        /// Authentication level (@see gap_auth) (if request = GAPC_PAIRING_REQ)\n        uint8_t auth_req;\n        /// LTK Key Size (if request = GAPC_LTK_EXCH)\n        uint8_t key_size;\n        /// Device IO used to get TK: (if request = GAPC_TK_EXCH)\n        ///  - GAP_TK_OOB:       TK get from out of band method\n        ///  - GAP_TK_DISPLAY:   TK generated and shall be displayed by local device\n        ///  - GAP_TK_KEY_ENTRY: TK shall be entered by user using device keyboard\n        uint8_t tk_type;\n        \n        /// Addition OOB Data for the OOB Conf and Rand values\n        struct gapc_oob  oob_data;\n        /// Numeric Comparison Data\n        struct gapc_nc   nc_data;\n    } data;\n};\n\n/// Confirm requested bond information.\nstruct gapc_bond_cfm\n{\n    /// Bond request type (@see gapc_bond)\n    uint8_t request;\n    /// Request accepted\n    uint8_t accept;\n\n    /// Bond procedure information data\n    union gapc_bond_cfm_data\n    {\n        /// Pairing Features (request = GAPC_PAIRING_RSP)\n        struct gapc_pairing pairing_feat;\n        /// LTK (request = GAPC_LTK_EXCH)\n        struct gapc_ltk ltk;\n        /// CSRK (request = GAPC_CSRK_EXCH)\n        struct gap_sec_key csrk;\n        /// TK (request = GAPC_TK_EXCH)\n        struct gap_sec_key tk;\n        /// IRK (request = GAPC_IRK_EXCH)\n        struct gapc_irk irk;\n        /// OOB Confirm and Random from the peer (request = GAPC_OOB_EXCH)\n        struct gapc_oob oob;\n    } data;\n};\n\n/**\n *  Authentication information\n */\nstruct gapc_bond_auth\n{\n    /// Authentication information (@see gap_auth)\n    uint8_t info;\n\n    /// LTK exchanged during pairing.\n    bool ltk_present;\n};\n\n\n\n/// Bonding information indication message\nstruct gapc_bond_ind\n{\n    /// Bond information type (@see gapc_bond)\n    uint8_t info;\n\n    /// Bond procedure information data\n    union gapc_bond_data\n    {\n        /// Authentication information (@see gap_auth)\n        /// (if info = GAPC_PAIRING_SUCCEED)\n        struct gapc_bond_auth auth;\n        /// Pairing failed reason  (if info = GAPC_PAIRING_FAILED)\n        uint8_t reason;\n        /// Long Term Key information (if info = GAPC_LTK_EXCH)\n        struct gapc_ltk ltk;\n        /// Identity Resolving Key information (if info = GAPC_IRK_EXCH)\n        struct gapc_irk irk;\n        /// Connection Signature Resolving Key information (if info = GAPC_CSRK_EXCH)\n        struct gap_sec_key csrk;\n    } data;\n};\n\n/// Start Encryption command procedure\nstruct gapc_encrypt_cmd\n{\n    /// GAP request type:\n    /// - GAPC_ENCRYPT:  Start encryption procedure.\n    uint8_t operation;\n    /// Long Term Key information\n    struct gapc_ltk ltk;\n};\n\n/// Encryption requested by peer device indication message.\nstruct gapc_encrypt_req_ind\n{\n    /// Encryption Diversifier\n    uint16_t ediv;\n    /// Random Number\n    rand_nb_t rand_nb;\n};\n\n/// Confirm requested Encryption information.\nstruct gapc_encrypt_cfm\n{\n    /// Indicate if a LTK has been found for the peer device\n    uint8_t found;\n    /// Long Term Key\n    struct gap_sec_key ltk;\n    /// LTK Key Size\n    uint8_t key_size;\n};\n\n/// Encryption information indication message\nstruct gapc_encrypt_ind\n{\n    /// Authentication  level (@see gap_auth)\n    uint8_t auth;\n};\n\n/// Start Security Request command procedure\nstruct gapc_security_cmd\n{\n    /// GAP request type:\n    /// - GAPC_SECURITY_REQ: Start security request procedure\n    uint8_t operation;\n    /// Authentication level (@see gap_auth)\n    uint8_t auth;\n};\n/// Security requested by peer device indication message\nstruct gapc_security_ind\n{\n    /// Authentication level (@see gap_auth)\n    uint8_t auth;\n};\n\n/// Parameters of the @ref GAPC_SIGN_COUNTER_IND message\nstruct gapc_sign_counter_ind\n{\n    /// Local SignCounter value\n    uint32_t local_sign_counter;\n    /// Peer SignCounter value\n    uint32_t peer_sign_counter;\n};\n\n\n/// Parameters of the @ref GAPC_SET_LE_PING_TO_CMD message\nstruct gapc_set_le_ping_to_cmd\n{\n    /// GAP request type:\n    /// - GAPC_SET_LE_PING_TO : Set the LE Ping timeout value\n    uint8_t operation;\n    /// Authenticated payload timeout\n    uint16_t timeout;\n};\n\n/// Parameters of the @ref GAPC_SET_LE_PKT_SIZE_CMD message\nstruct gapc_set_le_pkt_size_cmd\n{\n    /// GAP request type:\n    /// - GAPC_SET_LE_PKT_SIZE : Set the LE Data length value\n    uint8_t operation;\n    ///Preferred maximum number of payload octets that the local Controller should include\n    ///in a single Link Layer Data Channel PDU.\n    uint16_t tx_octets;\n    ///Preferred maximum number of microseconds that the local Controller should use to transmit\n    ///a single Link Layer Data Channel PDU\n    uint16_t tx_time;\n};\n\n/// Parameters of the @ref GAPC_LE_PKT_SIZE_IND message\nstruct gapc_le_pkt_size_ind\n{\n    ///The maximum number of payload octets in TX\n    uint16_t max_tx_octets;\n    ///The maximum time that the local Controller will take to TX\n    uint16_t max_tx_time;\n    ///The maximum number of payload octets in RX\n    uint16_t max_rx_octets;\n    ///The maximum time that the local Controller will take to RX\n    uint16_t max_rx_time;\n};\n\n/// Parameters of the @ref GAPC_KEY_PRESS_NOTIFICATION_CMD message\nstruct gapc_key_press_notif_cmd\n{\n    /// GAP request type:\n    /// - GAPC_KEY_PRESS_NOTIFICATION_CMD : Inform the remote device when keys have been entered or erased\n    uint8_t operation;\n    /// notification type\n    uint8_t notification_type;\n};\n\n/// Parameters of the @ref GAPC_KEY_PRESS_NOTIFICATION_IND message\nstruct gapc_key_press_notif_ind\n{\n    /// notification type\n    uint8_t notification_type;\n};\n\n/// Set the PHY configuration for current active link\nstruct gapc_set_phy_cmd\n{\n    /// GAP request type:\n    /// - GAPC_SET_PHY : Set the PHY configuration for current active link\n    uint8_t operation;\n    /// Supported LE PHY rates for data transmission (@see enum gap_rate)\n    uint8_t tx_rates;\n    /// Supported LE PHY rates for data reception (@see enum gap_rate)\n    uint8_t rx_rates;\n};\n\n/// Active link PHY configuration. Triggered when configuration is read or during an update.\nstruct gapc_le_phy_ind\n{\n    /// LE PHY rate for data transmission (@see enum gap_rate)\n    uint8_t tx_rate;\n    /// LE PHY rate for data reception (@see enum gap_rate)\n    uint8_t rx_rate;\n};\n\n/// Parameters of the @ref GAPC_SIGN_CMD message\nstruct gapc_sign_cmd\n{\n    /// GAP request type:\n    /// - GAPC_SIGN_PACKET: Sign an attribute packet\n    /// - GAPC_SIGN_CHECK:  Verify signature or an attribute packet\n    uint8_t operation;\n    /// Data PDU length (Bytes)\n    uint16_t byte_len;\n    /// Data PDU + SignCounter if generation, Data PDU + SignCounter + MAC if verification\n    uint8_t msg[__ARRAY_EMPTY];\n};\n\n/// Parameters of the @ref GAPC_SIGN_IND message\nstruct gapc_sign_ind\n{\n    /// GAP request type:\n    /// - GAPC_SIGN_PACKET: Sign an attribute packet\n    /// - GAPC_SIGN_CHECK:  Verify signature or an attribute packet\n    uint8_t operation;\n    /// Data PDU length (Bytes)\n    uint16_t byte_len;\n    /// Data PDU + SignCounter + MAC\n    uint8_t signed_msg[__ARRAY_EMPTY];\n};\n\n\n/// @} GAPC_TASK\n\n#endif /* _GAPC_TASK_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/api/gapm_task.h",
    "content": "#ifndef _GAPM_TASK_H_\n#define _GAPM_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GAPM_TASK Generic Access Profile Manager Task\n * @ingroup GAPM\n * @brief  Handles ALL messages to/from GAP Manager block.\n *\n * It handles messages from lower and higher layers not related to an ongoing connection.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_task.h\" // Task definitions\n#include \"gap.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Offset for List Management Operation Codes\n#define GAPM_OP_OFFSET_LIST_MGMT  (0x90)\n/// Offset for Extended Air Operation Codes\n#define GAPM_OP_OFFSET_EXT_AIR    (0xA0)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/// GAP Manager Message Interface\nenum gapm_msg_id\n{\n    /* Default event */\n    /// Command Complete event\n    GAPM_CMP_EVT = TASK_FIRST_MSG(TASK_ID_GAPM),\n    /// Event triggered to inform that lower layers are ready\n    GAPM_DEVICE_READY_IND,\n\n    /* Default commands */\n    /// Reset link layer and the host command\n    GAPM_RESET_CMD,\n    /// Cancel ongoing operation - DEPRECATED\n    GAPM_CANCEL_CMD,\n\n    /* Device Configuration */\n    /// Set device configuration command\n    GAPM_SET_DEV_CONFIG_CMD,\n    /// Set device channel map\n    GAPM_SET_CHANNEL_MAP_CMD,\n\n    /* Local device information */\n    /// Get local device info command\n    GAPM_GET_DEV_INFO_CMD,\n    /// Local device version indication event\n    GAPM_DEV_VERSION_IND,\n    /// Local device BD Address indication event\n    GAPM_DEV_BDADDR_IND,\n    /// Advertising channel Tx power level\n    GAPM_DEV_ADV_TX_POWER_IND,\n    /// Indication containing information about memory usage.\n    GAPM_DBG_MEM_INFO_IND,\n\n    /* White List */\n    /// White List Management Command - DEPRECATED\n    GAPM_WHITE_LIST_MGT_CMD,\n    /// White List Size indication event - DEPRECATED\n    GAPM_WHITE_LIST_SIZE_IND,\n\n    /* Air Operations */\n    /// Set advertising mode Command - DEPRECATED\n    GAPM_START_ADVERTISE_CMD,\n    /// Update Advertising Data Command - On fly update when device is advertising - DEPRECATED, 41\n    GAPM_UPDATE_ADVERTISE_DATA_CMD,\n\n    /// Set Scan mode Command - DEPRECATED\n    GAPM_START_SCAN_CMD,\n    /// Advertising or scanning report information event - DEPRECATED\n    GAPM_ADV_REPORT_IND,\n\n    /// Set connection initialization Command - DEPRECATED\n    GAPM_START_CONNECTION_CMD,\n    /// Name of peer device indication\n    GAPM_PEER_NAME_IND,\n    /// Confirm connection to a specific device (Connection Operation in Selective mode) - DEPRECATED\n    GAPM_CONNECTION_CFM,\n\n    /* Security / Encryption Toolbox */\n    /// Resolve address command\n    GAPM_RESOLV_ADDR_CMD,\n    /// Indicate that resolvable random address has been solved\n    GAPM_ADDR_SOLVED_IND,\n    /// Generate a random address.\n    GAPM_GEN_RAND_ADDR_CMD,\n    /// Use the AES-128 block in the controller\n    GAPM_USE_ENC_BLOCK_CMD,\n    ///  AES-128 block result indication\n    GAPM_USE_ENC_BLOCK_IND,\n    /// Generate a 8-byte random number\n    GAPM_GEN_RAND_NB_CMD,\n    /// Random Number Indication\n    GAPM_GEN_RAND_NB_IND,\n\n    /* Profile Management */\n    /// Create new task for specific profile, 3355\n    GAPM_PROFILE_TASK_ADD_CMD,\n    /// Inform that profile task has been added.\n    GAPM_PROFILE_ADDED_IND,\n\n    /// Indicate that a message has been received on an unknown task\n    GAPM_UNKNOWN_TASK_IND,\n\n    /* Data Length Extension */\n    /// Suggested Default Data Length indication\n    GAPM_SUGG_DFLT_DATA_LEN_IND,\n    /// Maximum Data Length indication\n    GAPM_MAX_DATA_LEN_IND,\n\n    /* Resolving list for controller-based privacy*/\n    /// Resolving address list management - DEPRECATED\n    GAPM_RAL_MGT_CMD,\n    /// Resolving address list size indication - DEPRECATED\n    GAPM_RAL_SIZE_IND,\n    /// Resolving address list address indication\n    GAPM_RAL_ADDR_IND,\n\n    /* Set new IRK */\n    /// Modify current IRK\n    GAPM_SET_IRK_CMD,\n\n    /* LE Protocol/Service Multiplexer Management */\n    /// Register a LE Protocol/Service Multiplexer command\n    GAPM_LEPSM_REGISTER_CMD,\n    /// Unregister a LE Protocol/Service Multiplexer command\n    GAPM_LEPSM_UNREGISTER_CMD,\n\n    /* ************************************************ */\n    /* ------------ NEW COMMANDS FOR BLE 5 ------------ */\n    /* ************************************************ */\n\n    /* List Management Operations */\n    /// Get local or peer address\n    /// @see struct gapm_get_ral_addr_cmd\n    GAPM_GET_RAL_ADDR_CMD = TASK_FIRST_MSG(TASK_ID_GAPM) + GAPM_OP_OFFSET_LIST_MGMT,\n    /// Set content of either white list or resolving list or periodic advertiser list\n    /// @see struct gapm_list_set_wl_cmd\n    /// @see struct gapm_list_set_ral_cmd\n    /// @see struct gapm_list_set_pal_cmd\n    GAPM_LIST_SET_CMD,\n    /// Indicate size of list indicated in GAPM_GET_DEV_CONFIG_CMD message\n    /// @see struct gapm_list_size_ind\n    GAPM_LIST_SIZE_IND,\n\n    /* Extended Air Operations */\n    /// Create an advertising, a scanning, an initiating or a periodic synchronization activity\n    /// @see struct gapm_activity_create_cmd\n    /// @see struct gapm_activity_create_adv_cmd\n    GAPM_ACTIVITY_CREATE_CMD = TASK_FIRST_MSG(TASK_ID_GAPM) + GAPM_OP_OFFSET_EXT_AIR,\n    /// Start a previously created activity\n    /// @see struct gapm_activity_start_cmd\n    GAPM_ACTIVITY_START_CMD,\n    /// Stop either a given activity or all existing activities\n    /// @see struct gapm_activity_stop_cmd\n    GAPM_ACTIVITY_STOP_CMD,\n    /// Delete either a given activity or all existing activities\n    /// @see struct gapm_activity_delete_cmd\n    GAPM_ACTIVITY_DELETE_CMD,\n    /// Indicate that an activity has well been created\n    /// @see struct gapm_activity_create_ind\n    GAPM_ACTIVITY_CREATED_IND,\n    /// Indicate that an activity has been stopped and can be restarted\n    /// @see struct gapm_activity_stopped_ind\n    GAPM_ACTIVITY_STOPPED_IND,\n    /// Set either advertising data or scan response data or periodic advertising data\n    /// @see struct gapm_set_adv_data_cmd\n    GAPM_SET_ADV_DATA_CMD,\n    /// Indicate reception of an advertising report (periodic or not), a scan response report\n    /// @see struct gapm_ext_adv_report_ind\n    GAPM_EXT_ADV_REPORT_IND,\n    /// Indicate reception of a scan request\n    /// @see struct gapm_scan_request_ind\n    GAPM_SCAN_REQUEST_IND,\n    /// Indicate that synchronization has been successfully established with a periodic advertiser\n    /// @see struct gapm_sync_established_ind\n    GAPM_SYNC_ESTABLISHED_IND,\n    /// Indicate maximum advertising data length supported by controller\n    /// @see struct gapm_max_adv_data_len_ind\n    GAPM_MAX_ADV_DATA_LEN_IND,\n    /// Indicate number of available advertising sets\n    /// @see struct gapm_nb_adv_sets_ind\n    GAPM_NB_ADV_SETS_IND,\n\n    /* ************************************************ */\n    /* -------------- Internal usage only ------------- */\n    /* ************************************************ */\n    /// Message received to unknown task received\n    GAPM_UNKNOWN_TASK_MSG,\n\n    /* Secure Connections */\n    /// Request to provide DH Key\n    GAPM_GEN_DH_KEY_CMD,\n    /// if the controller do not supp DHK GEN we make it on host..\n    GAPM_GEN_DH_KEY_ON_HOST_CMD,\n    /// Indicates the DH Key computation is complete and available\n    GAPM_GEN_DH_KEY_IND,\n\n    /* Internal messages for timer events, not part of API*/\n    /// Limited discoverable timeout indication - DEPRECATED\n    GAPM_LIM_DISC_TO_IND,\n    /// Scan timeout indication - DEPRECATED\n    GAPM_SCAN_TO_IND,\n    /// Address renewal timeout indication\n    GAPM_ADDR_RENEW_TO_IND,\n    /// Automatic connection establishment timeout indication\n    GAPM_AUTO_CONN_TO_IND,\n    /// Renew random private addresses\n    /// @see struct gapm_actv_addr_renew_cmd\n    GAPM_ACTV_ADDR_RENEW_CMD,\n};\n\n\n/// GAP Manager operation type - application interface\nenum gapm_operation\n{\n    /* No Operation (if nothing has been requested)     */\n    /* ************************************************ */\n    /// No operation.\n    GAPM_NO_OP                                     = 0x00,\n\n    /* Default operations                               */\n    /* ************************************************ */\n    /// Reset BLE subsystem: LL and HL.\n    GAPM_RESET,\n    /// Cancel currently executed operation. - DEPRECATED\n    GAPM_CANCEL,\n\n    /* Configuration operations                         */\n    /* ************************************************ */\n    /// Set device configuration\n    GAPM_SET_DEV_CONFIG,\n    /// Set device channel map\n    GAPM_SET_CHANNEL_MAP,\n\n    /* Retrieve device information                      */\n    /* ************************************************ */\n    /// Get Local device version\n    GAPM_GET_DEV_VERSION,\n    /// Get Local device BD Address\n    GAPM_GET_DEV_BDADDR,\n    /// Get device advertising power level, 7\n    GAPM_GET_DEV_ADV_TX_POWER,\n\n    /* Operation on White list                          */\n    /* ************************************************ */\n    /// Get White List Size.\n    GAPM_GET_WLIST_SIZE,\n    /// Add devices in white list. - DEPRECATED\n    GAPM_ADD_DEV_IN_WLIST,\n    /// Remove devices form white list. - DEPRECATED\n    GAPM_RMV_DEV_FRM_WLIST,\n    /// Clear all devices from white list. - DEPRECATED\n    GAPM_CLEAR_WLIST,\n\n    /* Advertise mode operations                        */\n    /* ************************************************ */\n    /// Start non connectable advertising - DEPRECATED\n    GAPM_ADV_NON_CONN,\n    /// Start undirected connectable advertising - DEPRECATED 13\n    GAPM_ADV_UNDIRECT,\n    /// Start directed connectable advertising - DEPRECATED\n    GAPM_ADV_DIRECT,\n    /// Start directed connectable advertising using Low Duty Cycle - DEPRECATED\n    GAPM_ADV_DIRECT_LDC,\n    /// Update on the fly advertising data - DEPRECATED\n    GAPM_UPDATE_ADVERTISE_DATA,\n\n    /* Scan mode operations                             */\n    /* ************************************************ */\n    /// Start active scan operation - DEPRECATED\n    GAPM_SCAN_ACTIVE,\n    /// Start passive scan operation - DEPRECATED\n    GAPM_SCAN_PASSIVE,\n\n    /* Connection mode operations                       */\n    /* ************************************************ */\n    /// Direct connection operation - DEPRECATED\n    GAPM_CONNECTION_DIRECT,\n    /// Automatic connection operation - DEPRECATED\n    GAPM_CONNECTION_AUTO,\n    /// Selective connection operation - DEPRECATED\n    GAPM_CONNECTION_SELECTIVE,\n    /// Name Request operation (requires to start a direct connection) - DEPRECATED\n    GAPM_CONNECTION_NAME_REQUEST,\n\n    /* Security / Encryption Toolbox                    */\n    /* ************************************************ */\n    /// Resolve device address\n    GAPM_RESOLV_ADDR,\n    /// Generate a random address\n    GAPM_GEN_RAND_ADDR,\n    /// Use the controller's AES-128 block\n    GAPM_USE_ENC_BLOCK,\n    /// Generate a 8-byte random number\n    GAPM_GEN_RAND_NB,\n\n    /* Profile Management                               */\n    /* ************************************************ */\n    /// Create new task for specific profile , 27\n    GAPM_PROFILE_TASK_ADD,\n\n    /* DEBUG                                            */\n    /* ************************************************ */\n    /// Get memory usage\n    GAPM_DBG_GET_MEM_INFO,\n    /// Perform a platform reset\n    GAPM_PLF_RESET,\n\n    /* Data Length Extension                            */\n    /* ************************************************ */\n    /// Set Suggested Default LE Data Length\n    GAPM_SET_SUGGESTED_DFLT_LE_DATA_LEN,\n    /// Get Suggested Default LE Data Length\n    GAPM_GET_SUGGESTED_DFLT_LE_DATA_LEN,\n    /// Get Maximum LE Data Length\n    GAPM_GET_MAX_LE_DATA_LEN,\n\n    /* Operation on Resolving List                      */\n    /* ************************************************ */\n    /// Get resolving address list size\n    GAPM_GET_RAL_SIZE,\n    /// Get resolving local address\n    GAPM_GET_RAL_LOC_ADDR,\n    /// Get resolving peer address\n    GAPM_GET_RAL_PEER_ADDR,\n    /// Add device in resolving address list - DEPRECATED\n    GAPM_ADD_DEV_IN_RAL,\n    /// Remove device from resolving address list - DEPRECATED\n    GAPM_RMV_DEV_FRM_RAL,\n    /// Clear resolving address list - DEPRECATED\n    GAPM_CLEAR_RAL,\n\n    /* Connection mode operations - cont                */\n    /* ************************************************ */\n    /// General connection operation - DEPRECATED\n    GAPM_CONNECTION_GENERAL,\n\n    /* Change current IRK                               */\n    /* ************************************************ */\n    /// Set IRK\n    GAPM_SET_IRK,\n\n    /* LE Protocol/Service Multiplexer management       */\n    /* ************************************************ */\n    /// Register a LE Protocol/Service Multiplexer\n    GAPM_LEPSM_REG,\n    /// Unregister a LE Protocol/Service Multiplexer\n    GAPM_LEPSM_UNREG,\n\n    /* Secure Connection - Internal API                 */\n    /* ************************************************ */\n    /// Generate DH_Key\n    GAPM_GEN_DH_KEY,\n\n    /* List Management                                  */\n    /* ************************************************ */\n    /// Set content of white list\n    GAPM_SET_WLIST = GAPM_NO_OP + GAPM_OP_OFFSET_LIST_MGMT,\n    /// Set content of resolving list\n    GAPM_SET_RAL,\n    /// Set content of periodic advertiser list\n    GAPM_SET_PAL,\n    /// Get white list size\n    //GAPM_GET_WHITE_LIST_SIZE,\n    /// Get resolving list size\n    //GAPM_GET_RAL_SIZE,\n    /// Get periodic advertiser list size\n    GAPM_GET_PAL_SIZE = GAPM_SET_PAL + 3,\n\n    /* Extended Air Operations                          */\n    /* ************************************************ */\n    /// Create advertising activity\n    GAPM_CREATE_ADV_ACTIVITY = GAPM_NO_OP + GAPM_OP_OFFSET_EXT_AIR,\n    /// Create scanning activity\n    GAPM_CREATE_SCAN_ACTIVITY,\n    /// Create initiating activity\n    GAPM_CREATE_INIT_ACTIVITY,\n    /// Create periodic synchronization activity\n    GAPM_CREATE_PERIOD_SYNC_ACTIVITY,\n    /// Start an activity\n    GAPM_START_ACTIVITY,\n    /// Stop an activity\n    GAPM_STOP_ACTIVITY,\n    /// Stop all activities\n    GAPM_STOP_ALL_ACTIVITIES,\n    /// Delete an activity\n    GAPM_DELETE_ACTIVITY,\n    /// Delete all activities\n    GAPM_DELETE_ALL_ACTIVITIES,\n    /// Set advertising data\n    GAPM_SET_ADV_DATA,\n    /// Set scan response data\n    GAPM_SET_SCAN_RSP_DATA,\n    /// Set periodic advertising data\n    GAPM_SET_PERIOD_ADV_DATA,\n    /// Get number of available advertising sets\n    GAPM_GET_NB_ADV_SETS,\n    /// Get maximum advertising data length supported by the controller\n    GAPM_GET_MAX_LE_ADV_DATA_LEN,\n    /// INTERNAL OPERATION - Renew random addresses\n    GAPM_RENEW_ADDR,\n};\n\n/// Device Address type Configuration\nenum gapm_addr_type\n{\n    /// Device Address is a Public Static address\n    GAPM_CFG_ADDR_PUBLIC        = 0,\n    /// Device Address is a Private Static address\n    GAPM_CFG_ADDR_PRIVATE       = 1,\n    /// Device Address generated using host-based Privacy feature - DEPRECATED\n    GAPM_CFG_ADDR_HOST_PRIVACY  = 2,\n    /// Device Address generated using controller-based Privacy feature\n    GAPM_CFG_ADDR_CTNL_PRIVACY  = 4,\n};\n\n/// Own BD address source of the device\nenum gapm_own_addr\n{\n   /// Public or Private Static Address according to device address configuration\n   GAPM_STATIC_ADDR,\n   /// Generated resolvable private random address\n   GAPM_GEN_RSLV_ADDR,\n   /// Generated non-resolvable private random address\n   GAPM_GEN_NON_RSLV_ADDR,\n};\n\n/// Device Attribute write permission requirement\nenum gapm_write_att_perm\n{\n    /// Disable write access\n    GAPM_WRITE_DISABLE     = 0,\n    /// Enable write access - no authentication required\n    GAPM_WRITE_NO_AUTH     = 1,\n    /// Write access requires unauthenticated link\n    GAPM_WRITE_UNAUTH      = 2,\n    /// Write access requires authenticated link\n    GAPM_WRITE_AUTH        = 3,\n    /// Write access requires secure connected link\n    GAPM_WRITE_SEC_CON     = 4\n};\n\n/// Attribute database configuration\n///   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0\n/// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n/// | DBG |              RFU                | SC |PCP |   APP_PERM   |   NAME_PERM  |\n/// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n/// - Bit [0-2] : Device Name write permission requirements for peer device (@see gapm_write_att_perm)\n/// - Bit [3-5] : Device Appearance write permission requirements for peer device (@see gapm_write_att_perm)\n/// - Bit [6]   : Slave Preferred Connection Parameters present\n/// - Bit [7]   : Service change feature present in GATT attribute database.\n/// - Bit [8-14]: Reserved\n/// - Bit [15]  : Enable Debug Mode\nenum gapm_att_cfg_flag\n{\n    /// Device Name write permission requirements for peer device (@see gapm_write_att_perm)\n    GAPM_MASK_ATT_NAME_PERM           = 0x0007,\n    GAPM_POS_ATT_NAME_PERM            = 0x00,\n    /// Device Appearance write permission requirements for peer device (@see gapm_write_att_perm)\n    GAPM_MASK_ATT_APPEARENCE_PERM     = 0x0038,\n    GAPM_POS_ATT_APPEARENCE_PERM      = 0x03,\n    /// Slave Preferred Connection Parameters present in GAP attribute database.\n    GAPM_MASK_ATT_SLV_PREF_CON_PAR_EN = 0x0040,\n    GAPM_POS_ATT_SLV_PREF_CON_PAR_EN  = 0x06,\n    /// Service change feature present in GATT attribute database.\n    GAPM_MASK_ATT_SVC_CHG_EN          = 0x0080,\n    GAPM_POS_ATT_SVC_CHG_EN           = 0x07,\n    /// Service change feature present in GATT attribute database.\n    GAPM_MASK_ATT_DBG_MODE_EN         = 0x8000,\n    GAPM_POS_ATT_DBG_MODE_EN          = 0x0F,\n};\n\n/// Pairing mode authorized on the device\n///    7    6    5    4    3    2    1    0\n/// +----+----+----+----+----+----+----+----+\n/// |KGEN|          RFU           | SCP| LP |\n/// +----+----+----+----+----+----+----+----+\nenum gapm_pairing_mode\n{\n    /// No pairing authorized\n    GAPM_PAIRING_DISABLE  = 0,\n    /// Legacy pairing Authorized\n    GAPM_PAIRING_LEGACY   = (1 << 0),\n    /// Secure Connection pairing Authorized\n    GAPM_PAIRING_SEC_CON  = (1 << 1),\n\n\n    /// Force re-generation of P256 private and public keys\n    GAPM_PAIRING_FORCE_P256_KEY_GEN = (1<<7),\n};\n\n/// LE Audio Mode Configuration\n///   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0\n/// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n/// |                                 RFU                                      | AM0|\n/// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\nenum gapm_audio_cfg_flag\n{\n    /// LE Audio Mode 0 Supported\n    GAPM_MASK_AUDIO_AM0_SUP           = 0x0001,\n    GAPM_POS_AUDIO_AM0_SUP            = 0x00,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Operation command structure in order to keep requested operation.\nstruct gapm_operation_cmd\n{\n    /// GAP request type\n    uint8_t operation;\n};\n\n/// Command complete event data structure\nstruct gapm_cmp_evt\n{\n    /// GAP requested operation\n    uint8_t operation;\n    /// Status of the request\n    uint8_t status;\n};\n\n///  Reset link layer and the host command\nstruct gapm_reset_cmd\n{\n    /// GAPM requested operation:\n    /// - GAPM_RESET: Reset BLE subsystem: LL and HL.\n    uint8_t operation;\n};\n\n/// Set device configuration command\nstruct gapm_set_dev_config_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_SET_DEV_CONFIG: Set device configuration\n    uint8_t operation;\n    /// Device Role: Central, Peripheral, Observer, Broadcaster or All roles.\n    uint8_t role;\n\n    /// -------------- Privacy Config -----------------------\n    /// Duration before regenerate device address when privacy is enabled.\n    uint16_t renew_dur;\n    /// Provided own static private random address\n    bd_addr_t addr;\n    /// Device IRK used for resolvable random BD address generation (LSB first)\n    struct gap_sec_key irk;\n    /// Privacy configuration bit field (@see enum gap_priv_cfg for bit signification)\n    uint8_t privacy_cfg;\n\n    /// -------------- Security Config -----------------------\n\n    /// Pairing mode authorized (@see enum gapm_pairing_mode)\n    uint8_t pairing_mode;\n\n    /// -------------- ATT Database Config -----------------------\n\n    /// GAP service start handle\n    uint16_t gap_start_hdl;\n    /// GATT service start handle\n    uint16_t gatt_start_hdl;\n\n    /// Attribute database configuration\n    ///   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0\n    /// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n    /// | DBG |              RFU                | SC |PCP |   APP_PERM   |   NAME_PERM  |\n    /// +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n    /// - Bit [0-2] : Device Name write permission requirements for peer device (@see gapm_write_att_perm)\n    /// - Bit [3-5] : Device Appearance write permission requirements for peer device (@see gapm_write_att_perm)\n    /// - Bit [6]   : Slave Preferred Connection Parameters present\n    /// - Bit [7]   : Service change feature present in GATT attribute database.\n    /// - Bit [8-14]: Reserved\n    /// - Bit [15]  : Enable Debug Mode\n    uint16_t  att_cfg;\n\n    /// -------------- LE Data Length Extension -----------------------\n    ///Suggested value for the Controller's maximum transmitted number of payload octets to be used\n    uint16_t sugg_max_tx_octets;\n    ///Suggested value for the Controller's maximum packet transmission time to be used\n    uint16_t sugg_max_tx_time;\n\n    /// --------------- L2CAP Configuration ---------------------------\n    /// Maximal MTU acceptable for device\n    uint16_t max_mtu;\n    /// Maximal MPS Packet size acceptable for device\n    uint16_t max_mps;\n    /// Maximum number of LE Credit based connection that can be established\n    uint8_t  max_nb_lecb;\n\n    /// --------------------- Miscellaneous ---------------------------\n    /// API settings bit field (@see enum gap_api_settings for each bit meaning)\n    uint8_t api_settings;\n\n    /// --------------- LE Audio Mode Supported -----------------------\n    ///\n    /// LE Audio Mode Configuration (@see gapm_audio_cfg_flag)\n    uint16_t  audio_cfg;\n\n    /// ------------------ LE PHY Management  -------------------------\n    /// Preferred LE PHY rate for data transmission (@see enum gap_rate)\n    uint8_t tx_pref_rates;\n    /// Preferred LE PHY rate for data reception (@see enum gap_rate)\n    uint8_t rx_pref_rates;\n};\n\n/// Set new IRK\nstruct gapm_set_irk_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_SET_IRK: Set device configuration\n    uint8_t operation;\n    /// Device IRK used for resolvable random BD address generation (LSB first)\n    struct gap_sec_key irk;\n};\n\n/// Set device channel map\nstruct gapm_set_channel_map_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_SET_CHANNEL_MAP: Set device channel map.\n    uint8_t operation;\n    /// Channel map\n    le_chnl_map_t chmap;\n};\n\n/// Get local device info command\nstruct gapm_get_dev_info_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_GET_DEV_VERSION: Get Local device version\n    ///  - GAPM_GET_DEV_BDADDR: Get Local device BD Address\n    ///  - GAPM_GET_DEV_ADV_TX_POWER: Get device advertising power level\n    ///  - GAPM_DBG_GET_MEM_INFO: Get memory usage (debug only)\n    uint8_t operation;\n};\n\n/// Local device version indication event\nstruct gapm_dev_version_ind\n{\n    /// HCI version\n    uint8_t hci_ver;\n    /// LMP version\n    uint8_t lmp_ver;\n    /// Host version\n    uint8_t host_ver;\n    /// HCI revision\n    uint16_t hci_subver;\n    /// LMP subversion\n    uint16_t lmp_subver;\n    /// Host revision\n    uint16_t host_subver;\n    /// Manufacturer name\n    uint16_t manuf_name;\n};\n\n/// Local device BD Address indication event\nstruct gapm_dev_bdaddr_ind\n{\n    /// Local device address information\n    struct gap_bdaddr addr;\n};\n\n/// Advertising channel Tx power level indication event\nstruct gapm_dev_adv_tx_power_ind\n{\n    /// Advertising channel Tx power level\n    int8_t     power_lvl;\n};\n\n/// Cancel ongoing operation - DEPRECATED\nstruct gapm_cancel_cmd\n{\n    /// GAPM requested operation\n    /// - GAPM_CANCEL: Cancel running operation\n    uint8_t operation;\n};\n\n/// White List Management Command - DEPRECATED\nstruct gapm_white_list_mgt_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_GET_WLIST_SIZE: Get White List Size.\n    ///  - GAPM_ADD_DEV_IN_WLIST: Add devices in white list.\n    ///  - GAPM_RMV_DEV_FRM_WLIST: Remove devices form white list.\n    ///  - GAPM_CLEAR_WLIST: Clear all devices from white list.\n    uint8_t operation;\n    /// Number of device information present in command\n    uint8_t nb;\n    /// Device address information that can be used to add or remove element in device list.\n    struct gap_bdaddr devices[__ARRAY_EMPTY];\n};\n\n/// Resolving List Management Command - DEPRECATED\nstruct gapm_ral_mgt_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_GET_RAL_SIZE: Get Resolving List Size.\n    ///  - GAPM_GET_RAL_LOC_ADDR: Get Resolving Local Address.\n    ///  - GAPM_GET_RAL_PEER_ADDR: Get Resolving Peer Address.\n    ///  - GAPM_ADD_DEV_IN_RAL: Add devices in resolving list.\n    ///  - GAPM_RMV_DEV_FRM_RAL: Remove devices form resolving list.\n    ///  - GAPM_CLEAR_RAL: Clear all devices from resolving list.\n    uint8_t operation;\n    /// Number of device information present in command\n    uint8_t nb;\n    /// Device address information that can be used to add or remove element in device list.\n    struct gap_ral_dev_info devices[__ARRAY_EMPTY];\n};\n\n/// Resolving Address indication event\nstruct gapm_ral_addr_ind\n{\n    /// Peer or local read operation\n    uint8_t operation;\n    /// Resolving List address\n    struct gap_bdaddr addr;\n};\n\n/// Resolve Address command\nstruct gapm_resolv_addr_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_RESOLV_ADDR: Resolve device address\n    uint8_t operation;\n    /// Number of provided IRK (sahlle be > 0)\n    uint8_t nb_key;\n    /// Resolvable random address to solve\n    bd_addr_t addr;\n    /// Array of IRK used for address resolution (MSB -> LSB)\n    struct gap_sec_key irk[__ARRAY_EMPTY];\n};\n\n/// Indicate that resolvable random address has been solved\nstruct gapm_addr_solved_ind\n{\n    /// Resolvable random address solved\n    bd_addr_t addr;\n    /// IRK that correctly solved the random address\n    struct gap_sec_key irk;\n};\n\n/// Advertising data that contains information set by host. - DEPRECATED\nstruct gapm_adv_host\n{\n    /// Advertising mode :\n    /// - GAP_NON_DISCOVERABLE: Non discoverable mode\n    /// - GAP_GEN_DISCOVERABLE: General discoverable mode\n    /// - GAP_LIM_DISCOVERABLE: Limited discoverable mode\n    /// - GAP_BROADCASTER_MODE: Broadcaster mode\n    uint8_t              mode;\n\n    /// Advertising filter policy:\n    /// - ADV_ALLOW_SCAN_ANY_CON_ANY: Allow both scan and connection requests from anyone\n    /// - ADV_ALLOW_SCAN_WLST_CON_ANY: Allow both scan req from White List devices only and\n    ///   connection req from anyone\n    /// - ADV_ALLOW_SCAN_ANY_CON_WLST: Allow both scan req from anyone and connection req\n    ///   from White List devices only\n    /// - ADV_ALLOW_SCAN_WLST_CON_WLST: Allow scan and connection requests from White List\n    ///   devices only\n    uint8_t              adv_filt_policy;\n\n    /// Advertising data length - maximum 28 bytes, 3 bytes are reserved to set\n    /// Advertising AD type flags, shall not be set in advertising data\n    uint8_t              adv_data_len;\n    /// Advertising data\n    uint8_t              adv_data[GAP_ADV_DATA_LEN];\n    /// Scan response data length- maximum 31 bytes\n    uint8_t              scan_rsp_data_len;\n    /// Scan response data\n    uint8_t              scan_rsp_data[GAP_SCAN_RSP_DATA_LEN];\n    /// Peer address\n    struct gap_bdaddr peer_addr;\n\n\tuint8_t \t\t\tflags;\n};\n\n/// Air operation default parameters - DEPRECATED\nstruct gapm_air_operation\n{\n    /// Operation code.\n    uint8_t  code;\n\n    /**\n     * Own BD address source of the device:\n     * - GAPM_STATIC_ADDR: Public or Private Static Address according to device address configuration\n     * - GAPM_GEN_RSLV_ADDR: Generated resolvable private random address\n     * - GAPM_GEN_NON_RSLV_ADDR: Generated non-resolvable private random address\n     */\n    uint8_t addr_src;\n\n    /// Dummy data use to retrieve internal operation state (should be set to 0).\n    uint16_t state;\n\n\tuint16_t randomAddrRenewIntervalInSecond;\n};\n\n/// Set advertising mode Command - DEPRECATED\nstruct gapm_start_advertise_cmd\n{\n    /// GAPM requested operation:\n    /// - GAPM_ADV_NON_CONN: Start non connectable advertising\n    /// - GAPM_ADV_UNDIRECT: Start undirected connectable advertising\n    /// - GAPM_ADV_DIRECT: Start directed connectable advertising\n    /// - GAPM_ADV_DIRECT_LDC: Start directed connectable advertising using Low Duty Cycle\n    struct gapm_air_operation op;\n\n    /// Minimum interval for advertising\n    uint16_t             intv_min;\n    /// Maximum interval for advertising\n    uint16_t             intv_max;\n\n    ///Advertising channel map\n    uint8_t              channel_map;\n    //true:force reserve 3 byte for ourself;false:all 31 byte can use by customer,default open this flag,reserve 3byte\n    uint8_t             isIncludedFlags;\n\n    /// Advertising information\n    union gapm_adv_info\n    {\n        /// Host information advertising data (GAPM_ADV_NON_CONN and GAPM_ADV_UNDIRECT)\n        struct gapm_adv_host host;\n        ///  Direct address information (GAPM_ADV_DIRECT)\n        /// (used only if reconnection address isn't set or privacy disabled)\n        struct gap_bdaddr direct;\n    } info;\n};\n\n/// Update Advertising Data Command - On fly update when device is advertising - DEPRECATED\nstruct gapm_update_advertise_data_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_UPDATE_ADVERTISE_DATA: Update on the fly advertising data\n    uint8_t  operation;\n    /// Advertising data length - maximum 28 bytes, 3 bytes are reserved to set\n    /// Advertising AD type flags, shall not be set in advertising data\n    uint8_t              adv_data_len;\n    /// Advertising data\n    uint8_t              adv_data[GAP_ADV_DATA_LEN];\n    /// Scan response data length- maximum 31 bytes\n    uint8_t              scan_rsp_data_len;\n    /// Scan response data\n    uint8_t              scan_rsp_data[GAP_SCAN_RSP_DATA_LEN];\n};\n\n/// Set scan mode Command - DEPRECATED\nstruct gapm_start_scan_cmd\n{\n    /// GAPM requested operation:\n    /// - GAPM_SCAN_ACTIVE: Start active scan operation\n    /// - GAPM_SCAN_PASSIVE: Start passive scan operation\n    struct gapm_air_operation op;\n\n    /// Scan interval\n    uint16_t             interval;\n    /// Scan window size\n    uint16_t             window;\n\n    /// Scanning mode :\n    /// - GAP_GEN_DISCOVERY: General discovery mode\n    /// - GAP_LIM_DISCOVERY: Limited discovery mode\n    /// - GAP_OBSERVER_MODE: Observer mode\n    uint8_t              mode;\n\n    /// Scan filter policy:\n    /// - SCAN_ALLOW_ADV_ALL: Allow advertising packets from anyone\n    /// - SCAN_ALLOW_ADV_WLST: Allow advertising packets from White List devices only\n    uint8_t              filt_policy;\n    /// Scan duplicate filtering policy:\n    /// - SCAN_FILT_DUPLIC_DIS: Disable filtering of duplicate packets\n    /// - SCAN_FILT_DUPLIC_EN: Enable filtering of duplicate packets\n    uint8_t              filter_duplic;\n};\n\n/// Advertising or scanning report information event - DEPRECATED\nstruct gapm_adv_report_ind\n{\n    /// Advertising report structure\n    adv_report_t report;\n};\n\n/// Set connection initialization Command - DEPRECATED\nstruct gapm_start_connection_cmd\n{\n    /// GAPM requested operation:\n    /// - GAPM_CONNECTION_DIRECT: Direct connection operation\n    /// - GAPM_CONNECTION_AUTO: Automatic connection operation\n    /// - GAPM_CONNECTION_SELECTIVE: Selective connection operation\n    /// - GAPM_CONNECTION_NAME_REQUEST: Name Request operation (requires to start a direct\n    ///   connection)\n    /// - GAPM_CONNECTION_GENERAL: General connection operation\n    struct gapm_air_operation op;\n\n    /// Scan interval\n    uint16_t             scan_interval;\n    /// Scan window size\n    uint16_t             scan_window;\n\n    /// Minimum of connection interval\n    uint16_t             con_intv_min;\n    /// Maximum of connection interval\n    uint16_t             con_intv_max;\n    /// Connection latency\n    uint16_t             con_latency;\n    /// Link supervision timeout\n    uint16_t             superv_to;\n    /// Minimum CE length\n    uint16_t             ce_len_min;\n    /// Maximum CE length\n    uint16_t             ce_len_max;\n\n    /// Number of peer device information present in message.\n    ///  Shall be 1 for GAPM_CONNECTION_DIRECT or GAPM_CONNECTION_NAME_REQUEST operations\n    ///  Shall be greater than 0 for other operations\n    uint8_t              nb_peers;\n\n    /// Peer device information\n    struct gap_bdaddr   peers[__ARRAY_EMPTY];\n};\n\n/// Confirm connection to a specific device (Connection Operation in Selective mode) - DEPRECATED\nstruct gapm_connection_cfm\n{\n    /// peer device bd address\n    bd_addr_t addr;\n    /// peer device address type\n    uint8_t addr_type;\n\n    /// Minimum of connection interval\n    uint16_t             con_intv_min;\n    /// Maximum of connection interval\n    uint16_t             con_intv_max;\n    /// Connection latency\n    uint16_t             con_latency;\n    /// Link supervision timeout\n    uint16_t             superv_to;\n    /// Minimum CE length\n    uint16_t             ce_len_min;\n    /// Maximum CE length\n    uint16_t             ce_len_max;\n};\n\n/// Name of peer device indication\nstruct gapm_peer_name_ind\n{\n    /// peer device bd address\n    bd_addr_t addr;\n    /// peer device address type\n    uint8_t addr_type;\n    /// peer device name length\n    uint8_t name_len;\n    /// peer device name\n    uint8_t name[__ARRAY_EMPTY];\n};\n\n/// Generate a random address.\nstruct gapm_gen_rand_addr_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_GEN_RAND_ADDR: Generate a random address\n    uint8_t  operation;\n    /// Dummy parameter used to store the prand part of the address\n    uint8_t  prand[GAP_ADDR_PRAND_LEN];\n    /// Random address type @see gap_rnd_addr_type\n    ///  - GAP_STATIC_ADDR: Static random address\n    ///  - GAP_NON_RSLV_ADDR: Private non resolvable address\n    ///  - GAP_RSLV_ADDR: Private resolvable address\n    uint8_t rnd_type;\n};\n\n/// Parameters of the @ref GAPM_USE_ENC_BLOCK_CMD message\nstruct gapm_use_enc_block_cmd\n{\n    /// Command Operation Code (shall be GAPM_USE_ENC_BLOCK)\n    uint8_t operation;\n    /// Operand 1\n    uint8_t operand_1[GAP_KEY_LEN];\n    /// Operand 2\n    uint8_t operand_2[GAP_KEY_LEN];\n};\n\n/// Parameters of the @ref GAPM_USE_ENC_BLOCK_IND message\nstruct gapm_use_enc_block_ind\n{\n    /// Result (16 bytes)\n    uint8_t result[GAP_KEY_LEN];\n};\n\n/// Parameters of the @ref GAPM_GEN_DH_KEY_CMD message\nstruct gapm_gen_dh_key_cmd\n{\n    /// Command Operation Code (shall be GAPM_GEN_DH_KEY)\n    uint8_t operation;\n    /// X coordinate\n    uint8_t operand_1[GAP_P256_KEY_LEN];\n    /// Y coordinate\n    uint8_t operand_2[GAP_P256_KEY_LEN];\n};\n\n/// Parameters of the @ref GAPM_GEN_DH_KEY_IND message\nstruct gapm_gen_dh_key_ind\n{\n    /// Result (32 bytes)\n    uint8_t result[GAP_P256_KEY_LEN];\n};\n\n/// Parameters of the @ref GAPM_GEN_RAND_NB_CMD message\nstruct gapm_gen_rand_nb_cmd\n{\n    /// Command Operation Code (shall be GAPM_GEN_RAND_NB)\n    uint8_t operation;\n};\n\n/// Parameters of the @ref GAPM_GEN_RAND_NB_IND message\nstruct gapm_gen_rand_nb_ind\n{\n    /// Generation Random Number (8 bytes)\n    rand_nb_t randnb;\n};\n\n/// Create new task for specific profile\nstruct gapm_profile_task_add_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_PROFILE_TASK_ADD: Add new profile task\n    uint8_t  operation;\n    /// Security Level :\n    ///  7    6    5    4    3    2    1    0\n    /// +----+----+----+----+----+----+----+----+\n    /// |   Reserved   |DIS |  AUTH   |EKS | MI |\n    /// +----+----+----+----+----+----+----+----+\n    ///\n    /// - MI: 1 - Application task is a Multi-Instantiated task, 0 - Mono-Instantiated\n    /// Only applies for service - Ignored by collectors:\n    /// - EKS: Service needs a 16 bytes encryption key\n    /// - AUTH: 0 - Disable, 1 - Enable, 2 - Unauth, 3 - Auth\n    /// - DIS: Disable the service\n    uint8_t  sec_lvl;\n    /// Profile task identifier\n    uint16_t prf_task_id;\n    /// Application task number\n    uint16_t app_task;\n    /// Service start handle\n    /// Only applies for services - Ignored by collectors\n    /// 0: dynamically allocated in Attribute database\n    uint16_t start_hdl;\n    /// 32 bits value that contains value to initialize profile (database parameters, etc...)\n    uint32_t param[__ARRAY_EMPTY];\n};\n\n/// Inform that profile task has been added.\nstruct gapm_profile_added_ind\n{\n    /// Profile task identifier\n    uint16_t prf_task_id;\n    /// Profile task number allocated\n    uint16_t prf_task_nb;\n    /// Service start handle\n    /// Only applies for services - Ignored by collectors\n    uint16_t start_hdl;\n};\n\n/// Indicate that a message has been received on an unknown task\nstruct gapm_unknown_task_ind\n{\n    /// Message identifier\n    uint16_t msg_id;\n    /// Task identifier\n    uint16_t task_id;\n};\n\n/// Indicates suggested default data length\nstruct gapm_sugg_dflt_data_len_ind\n{\n    ///Host's suggested value for the Controller's maximum transmitted number of payload octets\n    uint16_t suggted_max_tx_octets;\n    ///Host's suggested value for the Controller's maximum packet transmission time\n    uint16_t suggted_max_tx_time;\n};\n\n/// Indicates maximum data length\nstruct gapm_max_data_len_ind\n{\n    ///Maximum number of payload octets that the local Controller supports for transmission\n    uint16_t suppted_max_tx_octets;\n    ///Maximum time, in microseconds, that the local Controller supports for transmission\n    uint16_t suppted_max_tx_time;\n    ///Maximum number of payload octets that the local Controller supports for reception\n    uint16_t suppted_max_rx_octets;\n    ///Maximum time, in microseconds, that the local Controller supports for reception\n    uint16_t suppted_max_rx_time;\n};\n\n/// Register a LE Protocol/Service Multiplexer command\nstruct gapm_lepsm_register_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_LEPSM_REG: Register a LE Protocol/Service Multiplexer\n    uint8_t  operation;\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n    /// Application task number\n    uint16_t app_task;\n    /// Security level\n    ///   7   6   5   4   3   2   1   0\n    /// +---+---+---+---+---+---+---+---+\n    /// |MI |      RFU      |EKS|SEC_LVL|\n    /// +---+---+---+---+---+---+---+---+\n    /// bit[0-1]: Security level requirement (0=NO_AUTH, 1=UNAUTH, 2=AUTH, 3=SEC_CON)\n    /// bit[2]  : Encryption Key Size length must have 16 bytes\n    /// bit[7]  : Does the application task is multi-instantiated or not\n    uint8_t sec_lvl;\n};\n\n/// Unregister a LE Protocol/Service Multiplexer command\nstruct gapm_lepsm_unregister_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_LEPSM_UNREG: Unregister a LE Protocol/Service Multiplexer\n    uint8_t  operation;\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n};\n\n/// Create an advertising, a scanning, an initiating, a periodic synchonization activity command (common)\nstruct gapm_activity_create_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_CREATE_ADV_ACTIVITY: Create advertising activity\n    ///  - GAPM_CREATE_SCAN_ACTIVITY: Create scanning activity\n    ///  - GAPM_CREATE_INIT_ACTIVITY: Create initiating activity\n    ///  - GAPM_CREATE_PERIOD_SYNC_ACTIVITY: Create periodic synchronization activity\n    uint8_t operation;\n    /// Own address type\n    uint8_t own_addr_type;\n};\n\n/// Create an advertising activity command\nstruct gapm_activity_create_adv_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_CREATE_ADV_ACTIVITY: Create advertising activity\n    uint8_t operation;\n    /// Own address type (@see gap_own_addr_type)\n    uint8_t own_addr_type;\n    /// Advertising parameters (optional, shall be present only if operation is GAPM_CREATE_ADV_ACTIVITY)\n    struct gap_adv_param adv_param;\n};\n\n/// Start a given activity command\nstruct gapm_activity_start_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_START_ACTIVITY: Start a given activity\n    uint8_t operation;\n    /// Activity identifier\n    uint8_t actv_idx;\n    /// Activity parameters\n    union\n    {\n        /// Additional advertising parameters (for advertising activity)\n        struct gap_adv_add_param adv_add_param;\n        /// Scan parameters (for scanning activity)\n        struct gap_scan_param scan_param;\n        /// Initiating parameters (for initiating activity)\n        struct gap_init_param init_param;\n        /// Periodic synchronization parameters (for periodic synchronization activity)\n        struct gap_period_sync_param period_sync_param;\n    } u_param;\n};\n\n/// Stop one or all activity(ies) command\nstruct gapm_activity_stop_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_STOP_ACTIVITY: Stop a given activity\n    ///  - GAPM_STOP_ALL_ACTIVITIES: Stop all existing activities\n    uint8_t operation;\n    /// Activity identifier - used only if operation is GAPM_STOP_ACTIVITY\n    uint8_t actv_idx;\n};\n\n/// Delete one or all activity(ies) command\nstruct gapm_activity_delete_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_DELETE_ACTIVITY: Delete a given activity\n    ///  - GAPM_DELETE_ALL_ACTIVITIES: Delete all existing activities\n    uint8_t operation;\n    /// Activity identifier - used only if operation is GAPM_STOP_ACTIVITY\n    uint8_t actv_idx;\n};\n\n/// Indicate creation of an activity\nstruct gapm_activity_created_ind\n{\n    /// Activity identifier\n    uint8_t actv_idx;\n    /// Activity type (@see enum gap_actv_type)\n    uint8_t actv_type;\n    /// Selected TX power for advertising activity\n    int8_t tx_pwr;\n};\n\n/// Indicate that an activity has been stopped\nstruct gapm_activity_stopped_ind\n{\n    /// Activity identifier\n    uint8_t actv_idx;\n    /// Activity type (@see enum gap_actv_type)\n    uint8_t actv_type;\n    /// Activity stop reason\n    uint8_t reason;\n    /// In case of periodic advertising, indicate if periodic advertising has been stoppped\n    uint8_t per_adv_stop;\n};\n\n/// Set advertising, scan response or periodic advertising data command\nstruct gapm_set_adv_data_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_SET_ADV_DATA: Set advertising data\n    ///  - GAPM_SET_SCAN_RSP_DATA: Set scan response data\n    ///  - GAPM_SET_PERIOD_ADV_DATA: Set periodic advertising data\n    uint8_t operation;\n    /// Activity identifier\n    uint8_t actv_idx;\n    /// Data length\n    uint16_t length;\n    /// Data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n/// Indicate reception of scan request\nstruct gapm_scan_request_ind\n{\n    /// Activity identifier\n    uint8_t actv_idx;\n    /// Transmitter device address\n    struct gap_bdaddr trans_addr;\n};\n\n/// Indicate reception of advertising, scan response or periodic advertising data\nstruct gapm_ext_adv_report_ind\n{\n    /// Activity identifier\n    uint8_t actv_idx;\n    /// Bit field providing information about the received report (@see enum gap_adv_report_info)\n    ///  - Bit 0-2: Report type (@see enum gap_adv_report_type)\n    ///  - Bit 3: Report is complete\n    ///  - Bit 4: Connectable advertising\n    ///  - Bit 5: Scannable advertising\n    ///  - Bit 6: Directed advertising\n    ///  - Bit 7: Reserved for future use\n    uint8_t info;\n    /// Transmitter device address\n    struct gap_bdaddr trans_addr;\n    /// Target address (in case of a directed advertising report)\n    struct gap_bdaddr target_addr;\n    /// TX power (in dBm)\n    int8_t tx_pwr;\n    /// RSSI (between -127 and +20 dBm)\n    int8_t rssi;\n    /// Primary PHY on which advertising report has been received\n    uint8_t phy_prim;\n    /// Secondary PHY on which advertising report has been received\n    uint8_t phy_second;\n    /// Advertising SID\n    /// Valid only for periodic advertising report\n    uint8_t adv_sid;\n    /// Periodic advertising interval (in unit of 1.25ms, min is 7.5ms)\n    /// Valid only for periodic advertising report\n    uint16_t period_adv_intv;\n    /// Report length\n    uint16_t length;\n    /// Report\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n/// Indicate that synchronization has been established with a periodic advertiser\nstruct gapm_sync_established_ind\n{\n    /// Activity identifier\n    uint8_t actv_idx;\n    /// PHY on which synchronization has been established (@see gap_phy_type)\n    uint8_t phy;\n    /// Periodic advertising interval (in unit of 1.25ms, min is 7.5ms)\n    uint16_t intv;\n    /// Advertising SID\n    uint8_t adv_sid;\n    /// Advertiser clock accuracy (@see enum gap_clock_accuracy)\n    uint8_t clk_acc;\n    /// Advertiser address\n    struct gap_bdaddr addr;\n};\n\n/// Read local or peer address\nstruct gapm_get_ral_addr_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_GET_RAL_LOC_ADDR: Set white list content\n    ///  - GAPM_GET_RAL_PEER_ADDR: Set resolving list content\n    uint8_t operation;\n    /// Peer device identity\n    struct gap_bdaddr peer_identity;\n};\n\n/// Set content of either white list or resolving list or periodic advertiser list command (common part)\nstruct gapm_list_set_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_SET_WHITE_LIST: Set white list content\n    ///  - GAPM_SET_RAL: Set resolving list content\n    ///  - GAPM_SET_PAL: Set periodic advertiser list content\n    uint8_t operation;\n    /// Number of entries to be added in the list. 0 means that list content has to be cleared\n    uint8_t size;\n};\n\n/// Set content of white list\nstruct gapm_list_set_wl_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_SET_WHITE_LIST: Set white list content\n    uint8_t operation;\n    /// Number of entries to be added in the list. 0 means that list content has to be cleared\n    uint8_t size;\n    /// List of entries to be added in the list\n    struct gap_bdaddr wl_info[__ARRAY_EMPTY];\n};\n\n/// Set content of resolving list command\nstruct gapm_list_set_ral_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_SET_RAL: Set resolving list content\n    uint8_t operation;\n    /// Number of entries to be added in the list. 0 means that list content has to be cleared\n    uint8_t size;\n    /// List of entries to be added in the list\n    struct gap_ral_dev_info ral_info[__ARRAY_EMPTY];\n};\n\n/// Set content of periodic advertiser list command\nstruct gapm_list_set_pal_cmd\n{\n    /// GAPM request operation:\n    ///  - GAPM_SET_PAL: Set periodic advertiser list content\n    uint8_t operation;\n    /// Number of entries to be added in the list. 0 means that list content has to be cleared\n    uint8_t size;\n    /// List of entries to be added in the list\n    struct gap_period_adv_addr_cfg pal_info[__ARRAY_EMPTY];\n};\n\n/// White List Size indication event - DEPRECATED\nstruct gapm_white_list_size_ind\n{\n    /// White list size\n    uint8_t size;\n};\n\n/// Resolving List Size indication event - DEPRECATED\nstruct gapm_ral_size_ind\n{\n    /// Resolving list size\n    uint8_t size;\n};\n\n/// List Size indication event\nstruct gapm_list_size_ind\n{\n    /// Operation code, indicate list for which size has been read\n    uint8_t operation;\n    /// List size\n    uint8_t size;\n};\n\n/// Maximum advertising data length indication event\nstruct gapm_max_adv_data_len_ind\n{\n    /// Maximum advertising data length supported by controller\n    uint16_t length;\n};\n\n/// Number of available advertising sets indication event\nstruct gapm_nb_adv_sets_ind\n{\n    /// Number of available advertising sets\n    uint8_t nb_adv_sets;\n};\n\n/// Request to renew all currently used random private addresses (non-resolvable or resolvable)\n/// For internal use only\nstruct gapm_actv_addr_renew_cmd\n{\n        /// GAPM request operation:\n        ///  - GAPM_RENEW_ADDR: Renew random private addresses\n    uint8_t operation;\n    /// Activity index, sued by GAPM state machine in order to remind for which activity\n    /// a new address has been generated\n    uint8_t actv_idx;\n};\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\nint hci_no_operation_cmd_cmp_evt_handler(uint16_t opcode, void const *param);\n\n/// @} GAPM_TASK\n\n#endif /* _GAPM_TASK_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/api/gattc_task.h",
    "content": "#ifndef GATTC_TASK_H_\n#define GATTC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GATTCTASK Task\n * @ingroup GATTC\n * @brief Handles ALL messages to/from GATT Controller block.\n *\n * The GATTCTASK is responsible for managing the messages coming from\n * the attribute layer and host-level layers for dedicated connection.\n * The task includes services and characteristic discovery, configuration exchanges\n * and attribute value access operations (reading, writing, notification and indication).\n *\n * Messages may originate from @ref ATTC \"ATTC\", @ref ATTS \"ATTS\", @ref GAP \"GAP\"\n * and Application.\n *\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"att.h\"\n#include \"rwip_task.h\" // Task definitions\n#include \"compiler.h\"\n#include \n/*\n * DEFINES\n ****************************************************************************************\n */\n #ifndef TILE_ID_LEN\n #define TILE_ID_LEN     8\n #endif\n\n/// GATT Task messages\nenum gattc_msg_id\n{\n    /* Default event */\n    /// Command Complete event\n    GATTC_CMP_EVT = TASK_FIRST_MSG(TASK_ID_GATTC),\n\n    /* ATTRIBUTE CLIENT */\n    /// Server configuration request\n    GATTC_EXC_MTU_CMD,\n    /// Indicate that the ATT MTU has been updated (negotiated)\n    GATTC_MTU_CHANGED_IND,\n\n    /*Discover All Services */\n    /*Discover Services by Service UUID*/\n    /*Find Included Services*/\n    /*Discover Characteristics by UUID*/\n    /*Discover All Characteristics of a Service*/\n    /*Discover All Characteristic Descriptors*/\n    /// Discovery command\n    GATTC_DISC_CMD,\n    /* GATT -> HL: Events to Upper layer */\n    /*Discover All Services*/\n    /// Discovery services indication\n    GATTC_DISC_SVC_IND,\n    /*Find Included Services*/\n    /// Discover included services indication\n    GATTC_DISC_SVC_INCL_IND,\n    /*Discover All Characteristics of a Service*/\n    /// Discover characteristic indication\n    GATTC_DISC_CHAR_IND,\n    /*Discover All Characteristic Descriptors*/\n    /// Discovery characteristic descriptor indication\n    GATTC_DISC_CHAR_DESC_IND,\n\n    /*Read Value*/\n    /*Read Using UUID*/\n    /*Read Long Value*/\n    /*Read Multiple Values*/\n    /// Read command\n    GATTC_READ_CMD,\n    /// Read response\n    GATTC_READ_IND,\n\n    /*Write without response*/\n    /*Write without response with Authentication*/\n    /*Write Characteristic Value*/\n    /*Signed Write Characteristic Value*/\n    /*Write Long Characteristic Value*/\n    /*Characteristic Value Reliable Write*/\n    /*Write Characteristic Descriptors*/\n    /*Write Long Characteristic Descriptors*/\n    /*Characteristic Value Reliable Write*/\n    /// Write command request\n    GATTC_WRITE_CMD,\n\n    /* Cancel / Execute pending write operations */\n    /// Execute write characteristic request\n    GATTC_EXECUTE_WRITE_CMD,\n\n    /* Reception of an indication or notification from peer device. */\n    /// peer device triggers an event (notification)\n    GATTC_EVENT_IND,\n    /// peer device triggers an event that requires a confirmation (indication)\n    GATTC_EVENT_REQ_IND,\n    /// Confirm reception of event (trigger a confirmation message)\n    GATTC_EVENT_CFM,\n\n    /// Registration to peer device events (Indication/Notification).\n    GATTC_REG_TO_PEER_EVT_CMD,\n\n    /* -------------------------- ATTRIBUTE SERVER ------------------------------- */\n    /*Notify Characteristic*/\n    /*Indicate Characteristic*/\n    /// send an event to peer device\n    GATTC_SEND_EVT_CMD,\n\n    /* Service Changed Characteristic Indication */\n    /**\n     * Send a Service Changed indication to a device\n     * (message structure is struct gattm_svc_changed_ind_req)\n     */\n    GATTC_SEND_SVC_CHANGED_CMD,\n    /**\n     * Inform the application when sending of Service Changed indications has been\n     * enabled or disabled\n     */\n    GATTC_SVC_CHANGED_CFG_IND,\n\n    /* Indicate that read operation is requested. */\n    /// Read command indicated to upper layers.\n    GATTC_READ_REQ_IND,\n    /// REad command confirmation from upper layers.\n    GATTC_READ_CFM,\n\n    /* Indicate that write operation is requested. */\n    /// Write command indicated to upper layers.\n    GATTC_WRITE_REQ_IND,\n    /// Write command confirmation from upper layers.\n    GATTC_WRITE_CFM,\n\n    /* Indicate that write operation is requested. */\n    /// Request Attribute info to upper layer - could be trigger during prepare write\n    GATTC_ATT_INFO_REQ_IND,\n    /// Attribute info from upper layer confirmation\n    GATTC_ATT_INFO_CFM,\n\n    /* ----------------------- SERVICE DISCOVERY PROCEDURE  --------------------------- */\n    /// Service Discovery command\n    GATTC_SDP_SVC_DISC_CMD,\n    /// Service Discovery indicate that a service has been found.\n    GATTC_SDP_SVC_IND,\n\n    /* -------------------------- TRANSACTION ERROR EVENT ----------------------------- */\n    /// Transaction Timeout Error Event no more transaction will be accepted\n    GATTC_TRANSACTION_TO_ERROR_IND,\n\n    /* ------------------------------- Internal API ----------------------------------- */\n    /// Client Response timeout indication\n    GATTC_CLIENT_RTX_IND,\n    /// Server indication confirmation timeout indication\n    GATTC_SERVER_RTX_IND,\n};\n\n\n/// request operation type - application interface\nenum gattc_operation\n{\n    /*              Attribute Client Flags              */\n    /* No Operation (if nothing has been requested)     */\n    /* ************************************************ */\n    /// No operation\n    GATTC_NO_OP                                    = 0x00,\n\n    /* Operation flags for MTU Exchange                 */\n    /* ************************************************ */\n    /// Perform MTU exchange\n    GATTC_MTU_EXCH,\n\n    /*      Operation flags for discovery operation     */\n    /* ************************************************ */\n    /// Discover all services\n    GATTC_DISC_ALL_SVC,\n    /// Discover services by UUID\n    GATTC_DISC_BY_UUID_SVC,\n    /// Discover included services\n    GATTC_DISC_INCLUDED_SVC,\n    /// Discover all characteristics\n    GATTC_DISC_ALL_CHAR,\n    /// Discover characteristic by UUID\n    GATTC_DISC_BY_UUID_CHAR,\n    /// Discover characteristic descriptor\n    GATTC_DISC_DESC_CHAR,\n\n    /* Operation flags for reading attributes           */\n    /* ************************************************ */\n    /// Read attribute\n    GATTC_READ,\n    /// Read long attribute\n    GATTC_READ_LONG,\n    /// Read attribute by UUID\n    GATTC_READ_BY_UUID,\n    /// Read multiple attribute\n    GATTC_READ_MULTIPLE,\n\n    /* Operation flags for writing/modifying attributes */\n    /* ************************************************ */\n    /// Write attribute\n    GATTC_WRITE,\n    /// Write no response\n    GATTC_WRITE_NO_RESPONSE,\n    /// Write signed\n    GATTC_WRITE_SIGNED,\n    /// Execute write\n    GATTC_EXEC_WRITE,\n\n    /* Operation flags for registering to peer device   */\n    /* events                                           */\n    /* ************************************************ */\n    /// Register to peer device events\n    GATTC_REGISTER,\n    /// Unregister from peer device events\n    GATTC_UNREGISTER,\n\n    /* Operation flags for sending events to peer device*/\n    /* ************************************************ */\n    /// Send an attribute notification\n    GATTC_NOTIFY,\n    /// Send an attribute indication\n    GATTC_INDICATE,\n    /// Send a service changed indication\n    GATTC_SVC_CHANGED,\n\n    /* Service Discovery Procedure                      */\n    /* ************************************************ */\n    /// Search specific service\n    GATTC_SDP_DISC_SVC,\n    /// Search for all services\n    GATTC_SDP_DISC_SVC_ALL,\n    /// Cancel Service Discovery Procedure\n    GATTC_SDP_DISC_CANCEL,\n};\n\n/// Service Discovery Attribute type\nenum gattc_sdp_att_type\n{\n    /// No Attribute Information\n    GATTC_SDP_NONE,\n    /// Included Service Information\n    GATTC_SDP_INC_SVC,\n    /// Characteristic Declaration\n    GATTC_SDP_ATT_CHAR,\n    /// Attribute Value\n    GATTC_SDP_ATT_VAL,\n    /// Attribute Descriptor\n    GATTC_SDP_ATT_DESC,\n};\n\n/// Command complete event data structure\nstruct gattc_op_cmd\n{\n    /// GATT request type\n    uint8_t operation;\n    /// operation sequence number\n    uint16_t seq_num;\n};\n\n/// Command complete event data structure\nstruct gattc_cmp_evt\n{\n    /// GATT request type\n    uint8_t operation;\n    /// Status of the request\n    uint8_t status;\n    /// operation sequence number - provided when operation is started\n    uint16_t seq_num;\n};\n\n\n/// Service Discovery Command Structure\nstruct gattc_exc_mtu_cmd\n{\n    /// GATT request type\n    uint8_t operation;\n    /// operation sequence number\n    uint16_t seq_num;\n};\n\n/// Indicate that the ATT MTU has been updated (negotiated)\nstruct gattc_mtu_changed_ind\n{\n    /// Exchanged MTU value\n    uint16_t mtu;\n    /// operation sequence number\n    uint16_t seq_num;\n};\n\n/// Service Discovery Command Structure\nstruct gattc_disc_cmd\n{\n    /// GATT request type\n    uint8_t  operation;\n    /// UUID length\n    uint8_t  uuid_len;\n    /// operation sequence number\n    uint16_t seq_num;\n    /// start handle range\n    uint16_t start_hdl;\n    /// start handle range\n    uint16_t end_hdl;\n    /// UUID\n    uint8_t  uuid[__ARRAY_EMPTY];\n};\n\n\n/// Discover Service indication Structure\nstruct gattc_disc_svc_ind\n{\n    /// start handle\n    uint16_t start_hdl;\n    /// end handle\n    uint16_t end_hdl;\n    /// UUID length\n    uint8_t  uuid_len;\n    /// service UUID\n    uint8_t  uuid[__ARRAY_EMPTY];\n};\n\n/// Discover Service indication Structure\nstruct gattc_disc_svc_incl_ind\n{\n    /// element handle\n    uint16_t attr_hdl;\n    /// start handle\n    uint16_t start_hdl;\n    /// end handle\n    uint16_t end_hdl;\n    /// UUID length\n    uint8_t uuid_len;\n    /// included service UUID\n    uint8_t uuid[__ARRAY_EMPTY];\n};\n\n/// Discovery All Characteristic indication Structure\nstruct gattc_disc_char_ind\n{\n    /// database element handle\n    uint16_t attr_hdl;\n    /// pointer attribute handle to UUID\n    uint16_t pointer_hdl;\n    /// properties\n    uint8_t prop;\n    /// UUID length\n    uint8_t uuid_len;\n    /// characteristic UUID\n    uint8_t uuid[__ARRAY_EMPTY];\n};\n\n/// Discovery Characteristic Descriptor indication Structure\nstruct gattc_disc_char_desc_ind\n{\n    /// database element handle\n    uint16_t attr_hdl;\n    /// UUID length\n    uint8_t uuid_len;\n    /// Descriptor UUID\n    uint8_t uuid[__ARRAY_EMPTY];\n};\n\n\n/// Simple Read (GATTC_READ or GATTC_READ_LONG)\nstruct gattc_read_simple\n{\n    /// attribute handle\n    uint16_t handle;\n    /// start offset in data payload\n    uint16_t offset;\n    /// Length of data to read (0 = read all)\n    uint16_t length;\n};\n\n/// Read by UUID: search UUID and read it's characteristic value (GATTC_READ_BY_UUID)\n/// Note: it doesn't perform an automatic read long.\nstruct gattc_read_by_uuid\n{\n    /// Start handle\n    uint16_t start_hdl;\n    /// End handle\n    uint16_t end_hdl;\n    /// Size of UUID\n    uint8_t uuid_len;\n    /// UUID value\n    uint8_t uuid[__ARRAY_EMPTY];\n};\n\n/// Read Multiple short characteristic (GATTC_READ_MULTIPLE)\nstruct gattc_read_multiple\n{\n    /// attribute handle\n    uint16_t handle;\n    /// Known Handle length (shall be != 0)\n    uint16_t len;\n};\n\n/// Read command (Simple, Long, Multiple, or by UUID)\nstruct gattc_read_cmd\n{\n    /// request type\n    uint8_t operation;\n    /// number of read (only used for multiple read)\n    uint8_t nb;\n    /// operation sequence number\n    uint16_t seq_num;\n\n    /// request union according to read type\n    union gattc_read_req\n    {\n        /// Simple Read (GATTC_READ or GATTC_READ_LONG)\n        struct gattc_read_simple simple;\n        /// Read by UUID (GATTC_READ_BY_UUID)\n        struct gattc_read_by_uuid by_uuid;\n        /// Read Multiple short characteristic (GATTC_READ_MULTIPLE)\n        struct gattc_read_multiple multiple[1];\n    } req;\n};\n\n/// Attribute value read indication\nstruct gattc_read_ind\n{\n    /// Attribute handle\n    uint16_t handle;\n    /// Read offset\n    uint16_t offset;\n    /// Read length\n    uint16_t length;\n    /// Handle value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// Write peer attribute value command\nstruct gattc_write_cmd\n{\n    /// Request type\n    uint8_t operation;\n    /// Perform automatic execution\n    /// (if false, an ATT Prepare Write will be used this shall be use for reliable write)\n    bool auto_execute;\n    /// operation sequence number\n    uint16_t seq_num;\n    /// Attribute handle\n    uint16_t handle;\n    /// Write offset\n    uint16_t offset;\n    /// Write length\n    uint16_t length;\n    /// Internal write cursor shall be initialized to 0\n    uint16_t cursor;\n    /// Value to write\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// Write peer attribute value command\nstruct gattc_execute_write_cmd\n{\n    /// Request type\n    uint8_t operation;\n\n    /// [True = perform/False cancel] pending write operations\n    bool execute;\n    /// operation sequence number\n    uint16_t seq_num;\n};\n/// peer device triggers an event (notification)\nstruct gattc_event_ind\n{\n    /// Event Type\n    uint8_t type;\n    /// Data length\n    uint16_t length;\n    /// Attribute handle\n    uint16_t handle;\n    /// Event Value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// peer device triggers an event that requires a confirmation (indication)\nstruct gattc_event_req_ind\n{\n    /// Event Type\n    uint8_t type;\n    /// Data length\n    uint16_t length;\n    /// Attribute handle\n    uint16_t handle;\n    /// Event Value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// Confirm reception of event (trigger a confirmation message)\nstruct gattc_event_cfm\n{\n    /// Attribute handle\n    uint16_t handle;\n};\n\n/// Register to peer device events command\nstruct gattc_reg_to_peer_evt_cmd\n{\n    /// Request type\n    uint8_t operation;\n    /// operation sequence number\n    uint16_t seq_num;\n    /// attribute start handle\n    uint16_t start_hdl;\n    /// attribute end handle\n    uint16_t end_hdl;\n};\n\n/// Send an event to peer device\nstruct gattc_send_evt_cmd\n{\n    /// Request type (notification / indication)\n    uint8_t operation;\n    /// operation sequence number\n    uint16_t seq_num;\n    /// characteristic handle\n    uint16_t handle;\n    /// length of packet to send\n    uint16_t length;\n    /// data value\n    uint8_t  value[__ARRAY_EMPTY];\n};\n\n/// Inform that attribute value is requested by lower layers.\nstruct gattc_read_req_ind\n{\n    /// Handle of the attribute that has to be read\n    uint16_t handle;\n};\n\n/// Confirm Read Request requested by GATT to profile\nstruct gattc_read_cfm\n{\n    /// Handle of the attribute read\n    uint16_t handle;\n    /// Data length read\n    uint16_t length;\n    /// Status of read command execution by upper layers\n    uint8_t status;\n    /// attribute data value\n    uint8_t  value[TILE_ID_LEN];\n};\n\n/// Inform that a modification of database has been requested by peer device.\nstruct gattc_write_req_ind\n{\n    /// Handle of the attribute that has to be written\n    uint16_t handle;\n    /// offset at which the data has to be written\n    uint16_t offset;\n    /// Data length to be written\n    uint16_t length;\n    /// Data to be written in attribute database\n    uint8_t  value[__ARRAY_EMPTY];\n};\n\n/// Confirm modification of database from upper layer when requested by peer device.\nstruct gattc_write_cfm\n{\n    /// Handle of the attribute written\n    uint16_t handle;\n    /// Status of write command execution by upper layers\n    uint8_t status;\n};\n\n/// Parameters for @ref GATTC_SEND_SVC_CHANGED_CMD message\nstruct gattc_send_svc_changed_cmd\n{\n    /// Request Type\n    uint8_t operation;\n    /// operation sequence number\n    uint16_t seq_num;\n    /// Start of Affected Attribute Handle Range\n    uint16_t svc_shdl;\n    /// End of Affected Attribute Handle Range\n    uint16_t svc_ehdl;\n};\n\n/// Parameters for @ref GATTC_SVC_CHANGED_CFG_IND and @ref GATTC_SVC_CHANGED_SET_CFG_REQ message\nstruct gattc_svc_changed_cfg\n{\n    /**\n     * Current value of the Client Characteristic Configuration descriptor for the Service\n     * Changed characteristic\n     */\n    uint16_t ind_cfg;\n};\n\n\n/// Request Attribute info to upper layer - could be trigger during prepare write\nstruct gattc_att_info_req_ind\n{\n    /// Handle of the attribute for which info are requested\n    uint16_t handle;\n};\n\n/// Attribute info from upper layer confirmation\nstruct gattc_att_info_cfm\n{\n    /// Handle of the attribute\n    uint16_t handle;\n    /// Current length of the attribute\n    uint16_t length;\n    /// use to know if it's possible to modify the attribute\n    /// can contains authorization or application error code.\n    uint8_t  status;\n};\n\n\n/// Service Discovery command\nstruct gattc_sdp_svc_disc_cmd\n{\n    /// GATT Request Type\n    /// - GATTC_SDP_DISC_SVC Search specific service\n    /// - GATTC_SDP_DISC_SVC_ALL Search for all services\n    /// - GATTC_SDP_DISC_CANCEL Cancel Service Discovery Procedure\n    uint8_t operation;\n    /// Service UUID Length\n    uint8_t  uuid_len;\n    /// operation sequence number\n    uint16_t seq_num;\n    /// Search start handle\n    uint16_t start_hdl;\n    /// Search end handle\n    uint16_t end_hdl;\n    /// Service UUID\n    uint8_t  uuid[ATT_UUID_128_LEN];\n};\n\n\n/// Information about included service\nstruct gattc_sdp_include_svc\n{\n    /// Attribute Type\n    /// - GATTC_SDP_INC_SVC: Included Service Information\n    uint8_t att_type;\n    /// Included service UUID Length\n    uint8_t uuid_len;\n    /// Included Service UUID\n    uint8_t  uuid[ATT_UUID_128_LEN];\n    /// Included service Start Handle\n    uint16_t start_hdl;\n    /// Included service End Handle\n    uint16_t end_hdl;\n};\n\n/// Information about attribute characteristic\nstruct gattc_sdp_att_char\n{\n    /// Attribute Type\n    /// - GATTC_SDP_ATT_CHAR: Characteristic Declaration\n    uint8_t att_type;\n    /// Value property\n    uint8_t prop;\n    /// Value Handle\n    uint16_t handle;\n};\n\n/// Information about attribute\nstruct gattc_sdp_att\n{\n    /// Attribute Type\n    /// - GATTC_SDP_ATT_VAL: Attribute Value\n    /// - GATTC_SDP_ATT_DESC: Attribute Descriptor\n    uint8_t  att_type;\n    /// Attribute UUID Length\n    uint8_t  uuid_len;\n    /// Attribute UUID\n    uint8_t  uuid[ATT_UUID_128_LEN];\n};\n\n/// Attribute information\nunion gattc_sdp_att_info\n{\n    /// Attribute Type\n    uint8_t att_type;\n    /// Information about attribute characteristic\n    struct gattc_sdp_att_char att_char;\n    /// Information about included service\n    struct gattc_sdp_include_svc inc_svc;\n    /// Information about attribute\n    struct gattc_sdp_att att;\n};\n\n\n/// Service Discovery indicate that a service has been found.\nstruct gattc_sdp_svc_ind\n{\n    /// Service UUID Length\n    uint8_t  uuid_len;\n    /// Service UUID\n    uint8_t  uuid[ATT_UUID_128_LEN];\n    /// Service start handle\n    uint16_t start_hdl;\n    /// Service end handle\n    uint16_t end_hdl;\n    /// attribute information present in the service\n    /// (length = end_hdl - start_hdl)\n    union gattc_sdp_att_info info[__ARRAY_EMPTY];\n};\n\n\n\n/// @} GATTCTASK\n#endif // GATTC_TASK_H_\n"
  },
  {
    "path": "services/ble_stack/hl/api/gattm_task.h",
    "content": "#ifndef GATTM_TASK_H_\n#define GATTM_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GATTMTASK Task\n * @ingroup GATTM\n * @brief Handles ALL GATT block operations not related to a connection.\n *\n * The GATTMTASK is responsible for managing internal attribute database and state of\n * GATT controller which manage GATT block operations related to a connection.\n *\n * Messages may originate from @ref ATTM \"ATTM\", @ref GAP \"GAP\" and Application.\n *\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_task.h\" // Task definitions\n#include \"att.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/// GATT Task messages\nenum gattm_msg_id\n{\n    /* Database Management */\n    /// Add service in database request\n    GATTM_ADD_SVC_REQ = TASK_FIRST_MSG(TASK_ID_GATTM),\n    /// Add service in database response\n    GATTM_ADD_SVC_RSP,\n\n    /* Service management */\n    /// Get permission settings of service request\n    GATTM_SVC_GET_PERMISSION_REQ,\n    /// Get permission settings of service response\n    GATTM_SVC_GET_PERMISSION_RSP,\n    /// Set permission settings of service request\n    GATTM_SVC_SET_PERMISSION_REQ,\n    /// Set permission settings of service response\n    GATTM_SVC_SET_PERMISSION_RSP,\n\n    /* Attribute Manipulation */\n    /// Get permission settings of attribute request\n    GATTM_ATT_GET_PERMISSION_REQ,\n    /// Get permission settings of attribute response\n    GATTM_ATT_GET_PERMISSION_RSP,\n    /// Set permission settings of attribute request\n    GATTM_ATT_SET_PERMISSION_REQ,\n    /// Set permission settings of attribute response\n    GATTM_ATT_SET_PERMISSION_RSP,\n\n    /// Get attribute value request\n    GATTM_ATT_GET_VALUE_REQ,\n    /// Get attribute value response\n    GATTM_ATT_GET_VALUE_RSP,\n    /// Set attribute value request\n    GATTM_ATT_SET_VALUE_REQ,\n    /// Set attribute value response\n    GATTM_ATT_SET_VALUE_RSP,\n\n    /* Debug messages */\n    /// DEBUG ONLY: Destroy Attribute database request\n    GATTM_DESTROY_DB_REQ,\n    /// DEBUG ONLY: Destroy Attribute database response\n    GATTM_DESTROY_DB_RSP,\n    /// DEBUG ONLY: Retrieve list of services request\n    GATTM_SVC_GET_LIST_REQ,\n    /// DEBUG ONLY: Retrieve list of services response\n    GATTM_SVC_GET_LIST_RSP,\n    /// DEBUG ONLY: Retrieve information of attribute request\n    GATTM_ATT_GET_INFO_REQ,\n    /// DEBUG ONLY: Retrieve information of attribute response\n    GATTM_ATT_GET_INFO_RSP,\n};\n\n\n/**\n * Attribute Description\n */\nstruct gattm_att_desc\n{\n    /** Attribute UUID (LSB First) */\n    uint8_t uuid[ATT_UUID_128_LEN];\n\n    /**\n     *  Attribute Permission (@see attm_perm_mask)\n     */\n    uint16_t perm;\n\n\n    /**\n     * Maximum length of the attribute\n     *\n     * Note:\n     * For Included Services and Characteristic Declarations, this field contains targeted\n     * handle.\n     *\n     * For Characteristic Extended Properties, this field contains 2 byte value\n     *\n     * Not used Client Characteristic Configuration and Server Characteristic Configuration,\n     * this field is not used.\n     */\n    uint16_t max_len;\n\n    /**\n     * Attribute Extended permissions\n     *\n     * Extended Value permission bit field\n     *\n     *   15   14   13   12   11   10    9    8    7    6    5    4    3    2    1    0\n     * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n     * | RI |UUID_LEN |EKS |                       Reserved                            |\n     * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n    *\n     * Bit [0-11] : Reserved\n     * Bit [12]   : Encryption key Size must be 16 bytes\n     * Bit [13-14]: UUID Length             (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)\n     * Bit [15]   : Trigger Read Indication (0 = Value present in Database, 1 = Value not present in Database)\n     */\n    uint16_t ext_perm;\n};\n\n/**\n * Service description\n */\nstruct gattm_svc_desc\n{\n    /// Attribute Start Handle (0 = dynamically allocated)\n    uint16_t start_hdl;\n    /// Task identifier that manages service\n    uint16_t task_id;\n\n    /**\n     *    7    6    5    4    3    2    1    0\n     * +----+----+----+----+----+----+----+----+\n     * |SEC |UUID_LEN |DIS |  AUTH   |EKS | MI |\n     * +----+----+----+----+----+----+----+----+\n     *\n     * Bit [0]  : Task that manage service is multi-instantiated (Connection index is conveyed)\n     * Bit [1]  : Encryption key Size must be 16 bytes\n     * Bit [2-3]: Service Permission      (0 = NO_AUTH, 1 = UNAUTH, 2 = AUTH, 3 = Secure Connect)\n     * Bit [4]  : Disable the service\n     * Bit [5-6]: UUID Length             (0 = 16 bits, 1 = 32 bits, 2 = 128 bits, 3 = RFU)\n     * Bit [7]  : Secondary Service       (0 = Primary Service, 1 = Secondary Service)\n     */\n    uint8_t perm;\n\n    /// Number of attributes\n    uint8_t nb_att;\n\n    /** Service  UUID */\n    uint8_t uuid[ATT_UUID_128_LEN];\n    /**\n     * List of attribute description present in service.\n     */\n    struct gattm_att_desc atts[__ARRAY_EMPTY];\n};\n\n\n/// Add service in database request\nstruct gattm_add_svc_req\n{\n    /// service description\n    struct gattm_svc_desc svc_desc;\n};\n\n/// Add service in database response\nstruct gattm_add_svc_rsp\n{\n    /// Start handle of allocated service in attribute database\n    uint16_t start_hdl;\n    /// Return status of service allocation in attribute database.\n    uint8_t status;\n};\n\n/* Service management */\n/// Get permission settings of service request\nstruct gattm_svc_get_permission_req\n{\n    /// Service start attribute handle\n    uint16_t start_hdl;\n};\n\n/// Get permission settings of service response\nstruct gattm_svc_get_permission_rsp\n{\n    /// Service start attribute handle\n    uint16_t start_hdl;\n    /// service permission\n    uint8_t perm;\n    /// Return status\n    uint8_t status;\n};\n\n/// Set permission settings of service request\nstruct gattm_svc_set_permission_req\n{\n    /// Service start attribute handle\n    uint16_t start_hdl;\n    /// service permission\n    uint8_t perm;\n};\n\n/// Set permission settings of service response\nstruct gattm_svc_set_permission_rsp\n{\n    /// Service start attribute handle\n    uint16_t start_hdl;\n    /// Return status\n    uint8_t status;\n};\n\n\n/* Attribute management */\n/// Get permission settings of attribute request\nstruct gattm_att_get_permission_req\n{\n    /// Handle of the attribute\n    uint16_t handle;\n};\n\n/// Get permission settings of attribute response\nstruct gattm_att_get_permission_rsp\n{\n    /// Handle of the attribute\n    uint16_t handle;\n    /// Attribute permission\n    uint16_t perm;\n    /// Extended Attribute permission\n    uint16_t ext_perm;\n    /// Return status\n    uint8_t status;\n};\n\n/// Set permission settings of attribute request\nstruct gattm_att_set_permission_req\n{\n    /// Handle of the attribute\n    uint16_t handle;\n    /// Attribute permission\n    uint16_t perm;\n    /// Extended Attribute permission\n    uint16_t ext_perm;\n};\n\n/// Set permission settings of attribute response\nstruct gattm_att_set_permission_rsp\n{\n    /// Handle of the attribute\n    uint16_t handle;\n    /// Return status\n    uint8_t status;\n};\n\n\n/// Get attribute value request\nstruct gattm_att_get_value_req\n{\n    /// Handle of the attribute\n    uint16_t handle;\n};\n\n/// Get attribute value response\nstruct gattm_att_get_value_rsp\n{\n    /// Handle of the attribute\n    uint16_t handle;\n    /// Attribute value length\n    uint16_t length;\n    /// Return status\n    uint8_t status;\n    /// Attribute value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// Set attribute value request\nstruct gattm_att_set_value_req\n{\n    /// Handle of the attribute\n    uint16_t handle;\n    /// Attribute value length\n    uint16_t length;\n    /// Attribute value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n/// Set attribute value response\nstruct gattm_att_set_value_rsp\n{\n    /// Handle of the attribute\n    uint16_t handle;\n    /// Return status\n    uint8_t status;\n};\n\n/// DEBUG ONLY: Destroy Attribute database request\nstruct gattm_destroy_db_req\n{\n    /// New Gap Start Handle\n    uint16_t gap_hdl;\n    /// New Gatt Start Handle\n    uint16_t gatt_hdl;\n};\n\n/// DEBUG ONLY: Destroy Attribute database Response\nstruct gattm_destroy_db_rsp\n{\n    /// Return status\n    uint8_t status;\n};\n\n\n/// Service information\nstruct gattm_svc_info\n{\n    /// Service start handle\n    uint16_t start_hdl;\n    /// Service end handle\n    uint16_t end_hdl;\n    /// Service task_id\n    uint16_t task_id;\n    /// Service permission\n    uint8_t perm;\n};\n\n/// DEBUG ONLY: Retrieve list of services response\nstruct gattm_svc_get_list_rsp\n{\n    /// Return status\n    uint8_t status;\n    /// Number of services\n    uint8_t nb_svc;\n    /// Array of information about services\n    struct gattm_svc_info svc[__ARRAY_EMPTY];\n};\n\n/// DEBUG ONLY: Retrieve information of attribute request\nstruct  gattm_att_get_info_req\n{\n    /// Attribute Handle\n    uint16_t handle;\n};\n\n/// DEBUG ONLY: Retrieve information of attribute response\nstruct  gattm_att_get_info_rsp\n{\n    /// Return status\n    uint8_t status;\n    /// UUID Length\n    uint8_t uuid_len;\n    /// Attribute Handle\n    uint16_t handle;\n    /// Attribute Permissions\n    uint16_t perm;\n    /// Extended Attribute permission\n    uint16_t ext_perm;\n    /// UUID value\n    uint8_t uuid[ATT_UUID_128_LEN];\n};\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/// @} GATTMTASK\n#endif // GATTM_TASK_H_\n"
  },
  {
    "path": "services/ble_stack/hl/api/l2cc_task.h",
    "content": "#ifndef L2CC_TASK_H_\n#define L2CC_TASK_H_\n\n/**\n ****************************************************************************************\n * @addtogroup L2CCTASK Task\n * @ingroup L2CC\n * @brief Handles ALL messages to/from L2CC block.\n *\n * The L2CC task is responsible for L2CAP attribute and security block handling.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_task.h\" // Task definitions\n#include \"compiler.h\"\n#include \n\n/*\n * MACRO DEFINITIONS\n ****************************************************************************************\n */\n\n/// Number of L2CC Deprecated messages\n#define L2CC_NB_DEPRECATED_MSG   (4)\n\n/*\n * STATES\n ****************************************************************************************\n */\n\n/*\n * MESSAGES\n ****************************************************************************************\n */\n\n/// Message API of the L2CC task\nenum l2cc_msg_id\n{\n    /// L2CAP Operation completed event\n    L2CC_CMP_EVT               = TASK_FIRST_MSG(TASK_ID_L2CC) + L2CC_NB_DEPRECATED_MSG,\n\n    /* ************* LE Credit Based API    ************* */\n    /// LE credit based connection request\n    L2CC_LECB_CONNECT_CMD,\n    /// LE credit based connection request indication\n    L2CC_LECB_CONNECT_REQ_IND,\n    /// LE credit based connection request confirmation\n    L2CC_LECB_CONNECT_CFM,\n    /// LE credit based connection indication\n    L2CC_LECB_CONNECT_IND,\n    /// LE credit based disconnect request\n    L2CC_LECB_DISCONNECT_CMD,\n    /// LE credit based disconnect indication\n    L2CC_LECB_DISCONNECT_IND,\n    /// LE credit based credit addition\n    L2CC_LECB_ADD_CMD,\n    /// LE credit based credit addition indication\n    L2CC_LECB_ADD_IND,\n\n    /// Send data over an LE Credit Based Connection\n    L2CC_LECB_SDU_SEND_CMD,\n    /// Inform that a data packet has been received from a LE Credit Based connection.\n    L2CC_LECB_SDU_RECV_IND,\n\n\n    /* ******************* Debug API    ******************* */\n    /// Send Debug PDU data\n    L2CC_DBG_PDU_SEND_CMD,\n    /// Debug PDU data received\n    L2CC_DBG_PDU_RECV_IND,\n\n\n    /* **************** PDU Internal API ****************** */\n    /// Send Legacy PDU data\n    L2CC_PDU_SEND_CMD,\n    /// Legacy PDU data received\n    L2CC_PDU_RECV_IND,\n\n    /// Timeout indication for a transaction on signaling channel\n    L2CC_SIGNALING_TRANS_TO_IND,\n};\n\n\n/// request operation type - application interface\nenum l2cc_operation\n{\n    /*                 Operation Flags                  */\n    /* No Operation (if nothing has been requested)     */\n    /* ************************************************ */\n    /// No operation\n    L2CC_NO_OP                                    = 0x00,\n\n    /* LE Credit Based                                  */\n    /* ************************************************ */\n    /// LE credit based connection request\n    L2CC_LECB_CONNECT,\n    /// LE credit based disconnection request\n    L2CC_LECB_DISCONNECT,\n    /// LE credit addition request\n    L2CC_LECB_CREDIT_ADD,\n    /// Send SDU\n    L2CC_LECB_SDU_SEND,\n\n    /* Debug PDU Transmission (internal)                */\n    /* ************************************************ */\n    /// Send a Debug PDU\n    L2CC_DBG_PDU_SEND,\n\n    /* PDU Transmission (internal)                      */\n    /* ************************************************ */\n    /// Send internal LE Legacy PDU\n    L2CC_PDU_SEND,\n};\n\n\n/// Default L2Cap SDU definition\nstruct l2cc_sdu\n{\n    /// Channel Identifier\n    uint16_t cid;\n    /// Number of credit used\n    uint16_t credit;\n    /// SDU Data length\n    uint16_t length;\n    /// data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n\n/// Operation completed event\nstruct l2cc_cmp_evt\n{\n    /// L2CC request type (@see enum l2cc_operation)\n    uint8_t operation;\n    /// Status of request.\n    uint8_t status;\n    /// Channel ID\n    uint16_t cid;\n    /// Number of peer credit used - only relevant for LECB\n    uint16_t credit;\n};\n\n/// LE credit based connection request\nstruct l2cc_lecb_connect_cmd\n{\n    /// L2CC request type:\n    /// - L2CC_LECB_CONNECT: LE credit connection\n    uint8_t operation;\n    /// parameter used for internal usage\n    uint8_t  pkt_id;\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n    /// Local Channel identifier (0: automatically allocate a free channel)\n    uint16_t local_cid;\n    /// Credit allocated for the LE Credit Based Connection\n    /// Shall be at least: floor(((SDU + 2) + (MPS - 1)) / MPS) + 1\n    /// To be sure that 1 SDU can be fully received without requesting credits to application\n    uint16_t local_credit;\n    /// Maximum SDU size - Shall not exceed device MTU\n    uint16_t local_mtu;\n    /// Maximum Packet size - Shall not exceed device MPS\n    uint16_t local_mps;\n};\n\n/// LE credit based connection request indication\nstruct l2cc_lecb_connect_req_ind\n{\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n    /// Peer Channel identifier\n    uint16_t peer_cid;\n    /// Maximum SDU size\n    uint16_t peer_mtu;\n    /// Maximum Packet size\n    uint16_t peer_mps;\n};\n\n/// LE credit based connection request confirmation\nstruct l2cc_lecb_connect_cfm\n{\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n    /// Peer Channel identifier\n    uint16_t peer_cid;\n    /// True to accept the incoming connection, False else\n    bool accept;\n    /// Local Channel identifier (0: automatically allocate a free channel)\n    uint16_t local_cid;\n    /// Credit allocated for the LE Credit Based Connection\n    /// Shall be at least: floor(((SDU + 2) + (MPS - 1)) / MPS) + 1\n    /// To be sure that 1 SDU can be fully received without requesting credits to application\n    uint16_t local_credit;\n    /// Maximum SDU size - Shall not exceed device MTU\n    uint16_t local_mtu;\n    /// Maximum Packet size - Shall not exceed device MPS\n    uint16_t local_mps;\n};\n\n/// LE credit based connection indication\nstruct l2cc_lecb_connect_ind\n{\n    /// Status\n    uint8_t  status;\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n    /// Local Channel identifier\n    uint16_t local_cid;\n    /// Peer Channel identifier\n    uint16_t peer_cid;\n    ///  Destination Credit for the LE Credit Based Connection\n    uint16_t peer_credit;\n    /// Maximum SDU size\n    uint16_t peer_mtu;\n    /// Maximum Packet size\n    uint16_t peer_mps;\n};\n\n/// LE credit based disconnect request\nstruct l2cc_lecb_disconnect_cmd\n{\n    /// L2CC request type:\n    /// - L2CC_LECB_DISCONNECT: LE credit disconnection\n    uint8_t  operation;\n    /// parameter used for internal usage\n    uint8_t  pkt_id;\n    /// Peer Channel identifier\n    uint16_t peer_cid;\n};\n\n/// LE credit based disconnect indication\nstruct l2cc_lecb_disconnect_ind\n{\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n    /// Local Channel identifier\n    uint16_t local_cid;\n    /// Peer Channel identifier\n    uint16_t peer_cid;\n    /// Reason\n    uint8_t reason;\n};\n\n/// LE credit based credit addition\nstruct l2cc_lecb_add_cmd\n{\n    /// L2CC request type:\n    /// - L2CC_LECB_CREDIT_ADD: LE credit addition\n    uint8_t  operation;\n    /// parameter used for internal usage\n    uint8_t  pkt_id;\n    /// Local Channel identifier\n    uint16_t local_cid;\n    /// Credit added locally for channel identifier\n    uint16_t credit;\n};\n\n///LE credit based credit addition indication\nstruct l2cc_lecb_add_ind\n{\n    /// Peer Channel identifier\n    uint16_t peer_cid;\n    /// Destination added credit (relative value)\n    uint16_t peer_added_credit;\n};\n\n/// Send data over an LE Credit Based Connection\nstruct l2cc_lecb_sdu_send_cmd\n{\n    /// L2CC request type (@see enum l2cc_operation):\n    /// - L2CC_LECB_SDU_SEND: Send a SDU\n    uint8_t operation;\n    /// offset value information - for internal use only\n    uint16_t offset;\n    /// SDU information\n    struct l2cc_sdu sdu;\n};\n\n/// Inform that a data packet has been received from a LE Credit Based connection.\nstruct l2cc_lecb_sdu_recv_ind\n{\n    /// Status information\n    uint8_t status;\n    /// offset value information\n    uint16_t offset;\n    /// SDU information\n    struct l2cc_sdu sdu;\n};\n\n\n/// @} L2CCTASK\n\n#endif // L2CC_TASK_H_\n"
  },
  {
    "path": "services/ble_stack/hl/api/prf_types.h",
    "content": "#ifndef _PRF_TYPES_H_\n#define _PRF_TYPES_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PRF_TYPES\n * @ingroup PROFILE\n * @brief Definitions of shared profiles types\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"att.h\"\n#include \"compiler.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Attribute is mandatory\n#define ATT_MANDATORY   (0xFF)\n/// Attribute is optional\n#define ATT_OPTIONAL    (0x00)\n\n/// Characteristic Presentation Format Descriptor Size\n#define PRF_CHAR_PRES_FMT_SIZE  (7)\n\n\n/// Possible values for setting client configuration characteristics\nenum prf_cli_conf\n{\n    /// Stop notification/indication\n    PRF_CLI_STOP_NTFIND = 0x0000,\n    /// Start notification\n    PRF_CLI_START_NTF,\n    /// Start indication\n    PRF_CLI_START_IND,\n};\n\n/// Possible values for setting server configuration characteristics\nenum prf_srv_conf\n{\n    /// Stop Broadcast\n    PRF_SRV_STOP_BCST = 0x0000,\n    /// Start Broadcast\n    PRF_SRV_START_BCST,\n};\n\n/// Connection type\nenum prf_con_type\n{\n    ///Discovery type connection\n    PRF_CON_DISCOVERY = 0x00,\n    /// Normal type connection\n    PRF_CON_NORMAL    = 0x01,\n};\n\nenum prf_svc_type\n{\n\tPRF_PRIMARY_SERVICE = 0x00,\n\tPRF_SECONDARY_SERVICE = 0x01\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/**\n * Characteristic Presentation Format Descriptor structure\n * Packed size is PRF_CHAR_PRES_FMT_SIZE\n */\n/// characteristic presentation information\nstruct prf_char_pres_fmt\n{\n    /// Unit (The Unit is a UUID)\n    uint16_t unit;\n    /// Description\n    uint16_t description;\n    /// Format\n    uint8_t format;\n    /// Exponent\n    uint8_t exponent;\n    /// Name space\n    uint8_t name_space;\n};\n\n/**\n * date and time structure\n * size = 7 bytes\n */\n/// Time profile information\nstruct prf_date_time\n{\n    /// year time element\n    uint16_t year;\n    /// month time element\n    uint8_t month;\n    /// day time element\n    uint8_t day;\n    /// hour time element\n    uint8_t hour;\n    /// minute time element\n    uint8_t min;\n    /// second time element\n    uint8_t sec;\n};\n\n/**\n *  SFLOAT: Short Floating Point Type\n *\n *        +----------+----------+---------+\n *        | Exponent | Mantissa |  Total  |\n * +------+----------+----------+---------+\n * | size |  4 bits  | 12 bits  | 16 bits |\n * +------+----------+----------+---------+\n */\ntypedef uint16_t prf_sfloat;\n\n\n\n/// Attribute information\nstruct prf_att_info\n{\n    /// Attribute Handle\n    uint16_t handle;\n    /// Attribute length\n    uint16_t length;\n    /// Status of request\n    uint8_t  status;\n    /// Attribute value\n    uint8_t value[__ARRAY_EMPTY];\n};\n\n\n\n\n/// service handles\nstruct prf_svc\n{\n    /// start handle\n    uint16_t shdl;\n    /// end handle\n    uint16_t ehdl;\n};\n\n/// service handles\nstruct prf_incl_svc\n{\n    /// attribute handle\n    uint16_t handle;\n    /// included service start handle\n    uint16_t start_hdl;\n    /// included service  end handle\n    uint16_t end_hdl;\n    /// UUID length\n    uint8_t uuid_len;\n    /// UUID\n    uint8_t uuid[ATT_UUID_128_LEN];\n};\n\n/// characteristic info\nstruct prf_char_inf\n{\n    /// Characteristic handle\n    uint16_t char_hdl;\n    /// Value handle\n    uint16_t val_hdl;\n    /// Characteristic properties\n    uint8_t prop;\n    /// End of characteristic offset\n    uint8_t char_ehdl_off;\n};\n\n/// characteristic description\nstruct prf_char_desc_inf\n{\n    /// Descriptor handle\n    uint16_t desc_hdl;\n};\n\n\n/// Characteristic definition\nstruct prf_char_def\n{\n    /// Characteristic UUID\n    uint16_t uuid;\n    /// Requirement Attribute Flag\n    uint8_t req_flag;\n    /// Mandatory Properties\n    uint8_t prop_mand;\n};\n\n/// Characteristic Descriptor definition\nstruct prf_char_desc_def\n{\n    /// Characteristic Descriptor uuid\n    uint16_t uuid;\n    /// requirement attribute flag\n    uint8_t req_flag;\n    /// Corresponding characteristic code\n    uint8_t char_code;\n};\n\n/// Message structure used to inform APP that a profile client role has been disabled\nstruct prf_client_disable_ind\n{\n    /// Status\n    uint8_t status;\n};\n\n\n\n/// Message structure used to inform APP that an error has occured in the profile server role task\nstruct prf_server_error_ind\n{\n    /// Message ID\n    uint16_t msg_id;\n    /// Status\n    uint8_t status;\n};\n\n\n/// @} PRF_TYPES\n\n#endif /* _PRF_TYPES_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/api/rwble_hl_error.h",
    "content": "#ifndef RWBLE_HL_ERROR_H_\n#define RWBLE_HL_ERROR_H_\n\n\n/**\n ****************************************************************************************\n * @addtogroup ROOT\n * @brief High layer error codes\n *\n * This module contains the primitives that allow an application accessing and running the\n * BLE protocol stack\n *\n * @{\n ****************************************************************************************\n */\n\n\n\n/// Error code from HCI TO HL Range - from 0x90 to 0xD0\n#define RW_ERR_HCI_TO_HL(err)     (((err) != 0) ? ((err) + 0x90) : (0))\n\n\n/// Error code from HL TO HCI Range - from 0x90 to 0xD0\n#define RW_ERR_HL_TO_HCI(err)     (((err) > 0x90) ? ((err) - 0x90) : (0))\n\n/**\n * List all HL error codes\n */\nenum hl_err\n{\n    /// No error\n    GAP_ERR_NO_ERROR                                                               = 0x00,\n\n    // ----------------------------------------------------------------------------------\n    // -------------------------  ATT Specific Error ------------------------------------\n    // ----------------------------------------------------------------------------------\n    /// No error\n    ATT_ERR_NO_ERROR                                                               = 0x00,\n    /// 0x01: Handle is invalid\n    ATT_ERR_INVALID_HANDLE                                                         = 0x01,\n    /// 0x02: Read permission disabled\n    ATT_ERR_READ_NOT_PERMITTED                                                     = 0x02,\n    /// 0x03: Write permission disabled\n    ATT_ERR_WRITE_NOT_PERMITTED                                                    = 0x03,\n    /// 0x04: Incorrect PDU\n    ATT_ERR_INVALID_PDU                                                            = 0x04,\n    /// 0x05: Authentication privilege not enough\n    ATT_ERR_INSUFF_AUTHEN                                                          = 0x05,\n    /// 0x06: Request not supported or not understood\n    ATT_ERR_REQUEST_NOT_SUPPORTED                                                  = 0x06,\n    /// 0x07: Incorrect offset value\n    ATT_ERR_INVALID_OFFSET                                                         = 0x07,\n    /// 0x08: Authorization privilege not enough\n    ATT_ERR_INSUFF_AUTHOR                                                          = 0x08,\n    /// 0x09: Capacity queue for reliable write reached\n    ATT_ERR_PREPARE_QUEUE_FULL                                                     = 0x09,\n    /// 0x0A: Attribute requested not existing\n    ATT_ERR_ATTRIBUTE_NOT_FOUND                                                    = 0x0A,\n    /// 0x0B: Attribute requested not long\n    ATT_ERR_ATTRIBUTE_NOT_LONG                                                     = 0x0B,\n    /// 0x0C: Encryption size not sufficient\n    ATT_ERR_INSUFF_ENC_KEY_SIZE                                                    = 0x0C,\n    /// 0x0D: Invalid length of the attribute value\n    ATT_ERR_INVALID_ATTRIBUTE_VAL_LEN                                              = 0x0D,\n    /// 0x0E: Operation not fit to condition\n    ATT_ERR_UNLIKELY_ERR                                                           = 0x0E,\n    /// 0x0F: Attribute requires encryption before operation\n    ATT_ERR_INSUFF_ENC                                                             = 0x0F,\n    /// 0x10: Attribute grouping not supported\n    ATT_ERR_UNSUPP_GRP_TYPE                                                        = 0x10,\n    /// 0x11: Resources not sufficient to complete the request\n    ATT_ERR_INSUFF_RESOURCE                                                        = 0x11,\n    /// 0x80: Application error (also used in PRF Errors)\n    ATT_ERR_APP_ERROR                                                              = 0x80,\n\n    // ----------------------------------------------------------------------------------\n    // -------------------------- L2C Specific Error ------------------------------------\n    // ----------------------------------------------------------------------------------\n    /// Message cannot be sent because connection lost. (disconnected)\n    L2C_ERR_CONNECTION_LOST                                                        = 0x30,\n    /// Invalid PDU length exceed MTU\n    L2C_ERR_INVALID_MTU_EXCEED                                                     = 0x31,\n    /// Invalid PDU length exceed MPS\n    L2C_ERR_INVALID_MPS_EXCEED                                                     = 0x32,\n    /// Invalid Channel ID\n    L2C_ERR_INVALID_CID                                                            = 0x33,\n    /// Invalid PDU\n    L2C_ERR_INVALID_PDU                                                            = 0x34,\n    /// Connection refused - no resources available\n    L2C_ERR_NO_RES_AVAIL                                                           = 0x35,\n    /// Connection refused - insufficient authentication\n    L2C_ERR_INSUFF_AUTHEN                                                          = 0x36,\n    /// Connection refused - insufficient authorization\n    L2C_ERR_INSUFF_AUTHOR                                                          = 0x37,\n    /// Connection refused - insufficient encryption key size\n    L2C_ERR_INSUFF_ENC_KEY_SIZE                                                    = 0x38,\n    /// Connection Refused - insufficient encryption\n    L2C_ERR_INSUFF_ENC                                                             = 0x39,\n    /// Connection refused - LE_PSM not supported\n    L2C_ERR_LEPSM_NOT_SUPP                                                         = 0x3A,\n    /// No more credit\n    L2C_ERR_INSUFF_CREDIT                                                          = 0x3B,\n    /// Command not understood by peer device\n    L2C_ERR_NOT_UNDERSTOOD                                                         = 0x3C,\n    /// Credit error, invalid number of credit received\n    L2C_ERR_CREDIT_ERROR                                                           = 0x3D,\n    /// Channel identifier already allocated\n    L2C_ERR_CID_ALREADY_ALLOC                                                      = 0x3E,\n\n\n    // ----------------------------------------------------------------------------------\n    // -------------------------- GAP Specific Error ------------------------------------\n    // ----------------------------------------------------------------------------------\n    /// Invalid parameters set\n    GAP_ERR_INVALID_PARAM                                                          = 0x40,\n    /// Problem with protocol exchange, get unexpected response\n    GAP_ERR_PROTOCOL_PROBLEM                                                       = 0x41,\n    /// Request not supported by software configuration\n    GAP_ERR_NOT_SUPPORTED                                                          = 0x42,\n    /// Request not allowed in current state.\n    GAP_ERR_COMMAND_DISALLOWED                                                     = 0x43,\n    /// Requested operation canceled.\n    GAP_ERR_CANCELED                                                               = 0x44,\n    /// Requested operation timeout.\n    GAP_ERR_TIMEOUT                                                                = 0x45,\n    /// Link connection lost during operation.\n    GAP_ERR_DISCONNECTED                                                           = 0x46,\n    /// Search algorithm finished, but no result found\n    GAP_ERR_NOT_FOUND                                                              = 0x47,\n    /// Request rejected by peer device\n    GAP_ERR_REJECTED                                                               = 0x48,\n    /// Problem with privacy configuration\n    GAP_ERR_PRIVACY_CFG_PB                                                         = 0x49,\n    /// Duplicate or invalid advertising data\n    GAP_ERR_ADV_DATA_INVALID                                                       = 0x4A,\n    /// Insufficient resources\n    GAP_ERR_INSUFF_RESOURCES                                                       = 0x4B,\n    /// Unexpected Error\n    GAP_ERR_UNEXPECTED                                                             = 0x4C,\n    /// Feature mismatch\n    GAP_ERR_MISMATCH                                                               = 0x4D,\n    /// Limit Reached\n    GAP_ERR_LIMIT_REACHED                                                          = 0x4E,\n\n    // ----------------------------------------------------------------------------------\n    // ------------------------- GATT Specific Error ------------------------------------\n    // ----------------------------------------------------------------------------------\n    /// Problem with ATTC protocol response\n    GATT_ERR_INVALID_ATT_LEN                                                       = 0x50,\n    /// Error in service search\n    GATT_ERR_INVALID_TYPE_IN_SVC_SEARCH                                            = 0x51,\n    /// Invalid write data\n    GATT_ERR_WRITE                                                                 = 0x52,\n    /// Signed write error\n    GATT_ERR_SIGNED_WRITE                                                          = 0x53,\n    /// No attribute client defined\n    GATT_ERR_ATTRIBUTE_CLIENT_MISSING                                              = 0x54,\n    /// No attribute server defined\n    GATT_ERR_ATTRIBUTE_SERVER_MISSING                                              = 0x55,\n    /// Permission set in service/attribute are invalid\n    GATT_ERR_INVALID_PERM                                                          = 0x56,\n\n    // ----------------------------------------------------------------------------------\n    // ------------------------- SMP Specific Error -------------------------------------\n    // ----------------------------------------------------------------------------------\n    // SMP Protocol Errors detected on local device\n    /// The user input of pass key failed, for example, the user canceled the operation.\n    SMP_ERROR_LOC_PASSKEY_ENTRY_FAILED                                             = 0x61,\n    /// The OOB Data is not available.\n    SMP_ERROR_LOC_OOB_NOT_AVAILABLE                                                = 0x62,\n    /// The pairing procedure cannot be performed as authentication requirements cannot be met\n    /// due to IO capabilities of one or both devices.\n    SMP_ERROR_LOC_AUTH_REQ                                                         = 0x63,\n    /// The confirm value does not match the calculated confirm value.\n    SMP_ERROR_LOC_CONF_VAL_FAILED                                                  = 0x64,\n    /// Pairing is not supported by the device.\n    SMP_ERROR_LOC_PAIRING_NOT_SUPP                                                 = 0x65,\n    /// The resultant encryption key size is insufficient for the security requirements of\n    /// this device.\n    SMP_ERROR_LOC_ENC_KEY_SIZE                                                     = 0x66,\n    /// The SMP command received is not supported on this device.\n    SMP_ERROR_LOC_CMD_NOT_SUPPORTED                                                = 0x67,\n    /// Pairing failed due to an unspecified reason.\n    SMP_ERROR_LOC_UNSPECIFIED_REASON                                               = 0x68,\n    /// Pairing or Authentication procedure is disallowed because too little time has elapsed\n    /// since last pairing request or security request.\n    SMP_ERROR_LOC_REPEATED_ATTEMPTS                                                = 0x69,\n    /// The command length is invalid or a parameter is outside of the specified range.\n    SMP_ERROR_LOC_INVALID_PARAM                                                    = 0x6A,\n    /// Indicates to the remote device that the DHKey Check value received doesn't\n    /// match the one calculated by the local device.\n    SMP_ERROR_LOC_DHKEY_CHECK_FAILED                                               = 0x6B,\n    /// Indicates that the confirm values in the numeric comparison protocol do not match.\n    SMP_ERROR_LOC_NUMERIC_COMPARISON_FAILED                                        = 0x6C,\n    /// Indicates that the pairing over the LE transport failed due to a Pairing Request sent\n    /// over the BR/EDR transport in process.\n    SMP_ERROR_LOC_BREDR_PAIRING_IN_PROGRESS                                        = 0x6D,\n    /// Indicates that the BR/EDR Link Key generated on the BR/EDR transport cannot be\n    /// used to derive and distribute keys for the LE transport.\n    SMP_ERROR_LOC_CROSS_TRANSPORT_KEY_GENERATION_NOT_ALLOWED                       = 0x6E,\n    // SMP Protocol Errors detected by remote device\n    /// The user input of passkey failed, for example, the user canceled the operation.\n    SMP_ERROR_REM_PASSKEY_ENTRY_FAILED                                             = 0x71,\n    /// The OOB Data is not available.\n    SMP_ERROR_REM_OOB_NOT_AVAILABLE                                                = 0x72,\n    /// The pairing procedure cannot be performed as authentication requirements cannot be\n    /// met due to IO capabilities of one or both devices.\n    SMP_ERROR_REM_AUTH_REQ                                                         = 0x73,\n    /// The confirm value does not match the calculated confirm value.\n    SMP_ERROR_REM_CONF_VAL_FAILED                                                  = 0x74,\n    /// Pairing is not supported by the device.\n    SMP_ERROR_REM_PAIRING_NOT_SUPP                                                 = 0x75,\n    /// The resultant encryption key size is insufficient for the security requirements of\n    /// this device.\n    SMP_ERROR_REM_ENC_KEY_SIZE                                                     = 0x76,\n    /// The SMP command received is not supported on this device.\n    SMP_ERROR_REM_CMD_NOT_SUPPORTED                                                = 0x77,\n    /// Pairing failed due to an unspecified reason.\n    SMP_ERROR_REM_UNSPECIFIED_REASON                                               = 0x78,\n    /// Pairing or Authentication procedure is disallowed because too little time has elapsed\n    /// since last pairing request or security request.\n    SMP_ERROR_REM_REPEATED_ATTEMPTS                                                = 0x79,\n    /// The command length is invalid or a parameter is outside of the specified range.\n    SMP_ERROR_REM_INVALID_PARAM                                                    = 0x7A,\n    /// Indicates to the remote device that the DHKey Check value received doesn't\n    /// match the one calculated by the local device.\n    SMP_ERROR_REM_DHKEY_CHECK_FAILED                                               = 0x7B,\n    /// Indicates that the confirm values in the numeric comparison protocol do not match.\n    SMP_ERROR_REM_NUMERIC_COMPARISON_FAILED                                        = 0x7C,\n    /// Indicates that the pairing over the LE transport failed due to a Pairing Request sent\n    /// over the BR/EDR transport in process.\n    SMP_ERROR_REM_BREDR_PAIRING_IN_PROGRESS                                        = 0x7D,\n    /// Indicates that the BR/EDR Link Key generated on the BR/EDR transport cannot be\n    /// used to derive and distribute keys for the LE transport.\n    SMP_ERROR_REM_CROSS_TRANSPORT_KEY_GENERATION_NOT_ALLOWED                       = 0x7E,\n    // SMP Errors triggered by local device\n    /// The provided resolvable address has not been resolved.\n    SMP_ERROR_ADDR_RESOLV_FAIL                                                     = 0xD0,\n    /// The Signature Verification Failed\n    SMP_ERROR_SIGN_VERIF_FAIL                                                      = 0xD1,\n    /// The encryption procedure failed because the slave device didn't find the LTK\n    /// needed to start an encryption session.\n    SMP_ERROR_ENC_KEY_MISSING                                                      = 0xD2,\n    /// The encryption procedure failed because the slave device doesn't support the\n    /// encryption feature.\n    SMP_ERROR_ENC_NOT_SUPPORTED                                                    = 0xD3,\n    /// A timeout has occurred during the start encryption session.\n    SMP_ERROR_ENC_TIMEOUT                                                          = 0xD4,\n\n    // ----------------------------------------------------------------------------------\n    //------------------------ Profiles specific error codes ----------------------------\n    // ----------------------------------------------------------------------------------\n    /// Application Error\n    PRF_APP_ERROR                                                                  = 0x80,\n    /// Invalid parameter in request\n    PRF_ERR_INVALID_PARAM                                                          = 0x81,\n    /// Inexistent handle for sending a read/write characteristic request\n    PRF_ERR_INEXISTENT_HDL                                                         = 0x82,\n    /// Discovery stopped due to missing attribute according to specification\n    PRF_ERR_STOP_DISC_CHAR_MISSING                                                 = 0x83,\n    /// Too many SVC instances found -> protocol violation\n    PRF_ERR_MULTIPLE_SVC                                                           = 0x84,\n    /// Discovery stopped due to found attribute with incorrect properties\n    PRF_ERR_STOP_DISC_WRONG_CHAR_PROP                                              = 0x85,\n    /// Too many Char. instances found-> protocol violation\n    PRF_ERR_MULTIPLE_CHAR                                                          = 0x86,\n    /// Attribute write not allowed\n    PRF_ERR_NOT_WRITABLE                                                           = 0x87,\n    /// Attribute read not allowed\n    PRF_ERR_NOT_READABLE                                                           = 0x88,\n    /// Request not allowed\n    PRF_ERR_REQ_DISALLOWED                                                         = 0x89,\n    /// Notification Not Enabled\n    PRF_ERR_NTF_DISABLED                                                           = 0x8A,\n    /// Indication Not Enabled\n    PRF_ERR_IND_DISABLED                                                           = 0x8B,\n    /// Feature not supported by profile\n    PRF_ERR_FEATURE_NOT_SUPPORTED                                                  = 0x8C,\n    /// Read value has an unexpected length\n    PRF_ERR_UNEXPECTED_LEN                                                         = 0x8D,\n    /// Disconnection occurs\n    PRF_ERR_DISCONNECTED                                                           = 0x8E,\n    /// Procedure Timeout\n    PRF_ERR_PROC_TIMEOUT                                                           = 0x8F,\n    /// Client characteristic configuration improperly configured\n    PRF_CCCD_IMPR_CONFIGURED                                                       = 0xFD,\n    /// Procedure already in progress\n    PRF_PROC_IN_PROGRESS                                                           = 0xFE,\n    /// Out of Range\n    PRF_OUT_OF_RANGE                                                               = 0xFF,\n\n    // ----------------------------------------------------------------------------------\n    //-------------------- LL Error codes conveyed to upper layer -----------------------\n    // ----------------------------------------------------------------------------------\n    /// Unknown HCI Command\n    LL_ERR_UNKNOWN_HCI_COMMAND                                                     = 0x91,\n    /// Unknown Connection Identifier\n    LL_ERR_UNKNOWN_CONNECTION_ID                                                   = 0x92,\n    /// Hardware Failure\n    LL_ERR_HARDWARE_FAILURE                                                        = 0x93,\n    /// BT Page Timeout\n    LL_ERR_PAGE_TIMEOUT                                                            = 0x94,\n    /// Authentication failure\n    LL_ERR_AUTH_FAILURE                                                            = 0x95,\n    /// Pin code missing\n    LL_ERR_PIN_MISSING                                                             = 0x96,\n    /// Memory capacity exceed\n    LL_ERR_MEMORY_CAPA_EXCEED                                                      = 0x97,\n    /// Connection Timeout\n    LL_ERR_CON_TIMEOUT                                                             = 0x98,\n    /// Connection limit Exceed\n    LL_ERR_CON_LIMIT_EXCEED                                                        = 0x99,\n    /// Synchronous Connection limit exceed\n    LL_ERR_SYNC_CON_LIMIT_DEV_EXCEED                                               = 0x9A,\n    /// ACL Connection exits\n    LL_ERR_ACL_CON_EXISTS                                                          = 0x9B,\n    /// Command Disallowed\n    LL_ERR_COMMAND_DISALLOWED                                                      = 0x9C,\n    /// Connection rejected due to limited resources\n    LL_ERR_CONN_REJ_LIMITED_RESOURCES                                              = 0x9D,\n    /// Connection rejected due to security reason\n    LL_ERR_CONN_REJ_SECURITY_REASONS                                               = 0x9E,\n    /// Connection rejected due to unacceptable BD Addr\n    LL_ERR_CONN_REJ_UNACCEPTABLE_BDADDR                                            = 0x9F,\n    /// Connection rejected due to Accept connection timeout\n    LL_ERR_CONN_ACCEPT_TIMEOUT_EXCEED                                              = 0xA0,\n    /// Not Supported\n    LL_ERR_UNSUPPORTED                                                             = 0xA1,\n    /// invalid parameters\n    LL_ERR_INVALID_HCI_PARAM                                                       = 0xA2,\n    /// Remote user terminate connection\n    LL_ERR_REMOTE_USER_TERM_CON                                                    = 0xA3,\n    /// Remote device terminate connection due to low resources\n    LL_ERR_REMOTE_DEV_TERM_LOW_RESOURCES                                           = 0xA4,\n    /// Remote device terminate connection due to power off\n    LL_ERR_REMOTE_DEV_POWER_OFF                                                    = 0xA5,\n    /// Connection terminated by local host\n    LL_ERR_CON_TERM_BY_LOCAL_HOST                                                  = 0xA6,\n    /// Repeated attempts\n    LL_ERR_REPEATED_ATTEMPTS                                                       = 0xA7,\n    /// Pairing not Allowed\n    LL_ERR_PAIRING_NOT_ALLOWED                                                     = 0xA8,\n    /// Unknown PDU Error\n    LL_ERR_UNKNOWN_LMP_PDU                                                         = 0xA9,\n    /// Unsupported remote feature\n    LL_ERR_UNSUPPORTED_REMOTE_FEATURE                                              = 0xAA,\n    /// Sco Offset rejected\n    LL_ERR_SCO_OFFSET_REJECTED                                                     = 0xAB,\n    /// SCO Interval Rejected\n    LL_ERR_SCO_INTERVAL_REJECTED                                                   = 0xAC,\n    /// SCO air mode Rejected\n    LL_ERR_SCO_AIR_MODE_REJECTED                                                   = 0xAD,\n    /// Invalid LMP parameters\n    LL_ERR_INVALID_LMP_PARAM                                                       = 0xAE,\n    /// Unspecified error\n    LL_ERR_UNSPECIFIED_ERROR                                                       = 0xAF,\n    /// Unsupported LMP Parameter value\n    LL_ERR_UNSUPPORTED_LMP_PARAM_VALUE                                             = 0xB0,\n    /// Role Change Not allowed\n    LL_ERR_ROLE_CHANGE_NOT_ALLOWED                                                 = 0xB1,\n    /// LMP Response timeout\n    LL_ERR_LMP_RSP_TIMEOUT                                                         = 0xB2,\n    /// LMP Collision\n    LL_ERR_LMP_COLLISION                                                           = 0xB3,\n    /// LMP Pdu not allowed\n    LL_ERR_LMP_PDU_NOT_ALLOWED                                                     = 0xB4,\n    /// Encryption mode not accepted\n    LL_ERR_ENC_MODE_NOT_ACCEPT                                                     = 0xB5,\n    /// Link Key Cannot be changed\n    LL_ERR_LINK_KEY_CANT_CHANGE                                                    = 0xB6,\n    /// Quality of Service not supported\n    LL_ERR_QOS_NOT_SUPPORTED                                                       = 0xB7,\n    /// Error, instant passed\n    LL_ERR_INSTANT_PASSED                                                          = 0xB8,\n    /// Pairing with unit key not supported\n    LL_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUP                                           = 0xB9,\n    /// Transaction collision\n    LL_ERR_DIFF_TRANSACTION_COLLISION                                              = 0xBA,\n    /// Unacceptable parameters\n    LL_ERR_QOS_UNACCEPTABLE_PARAM                                                  = 0xBC,\n    /// Quality of Service rejected\n    LL_ERR_QOS_REJECTED                                                            = 0xBD,\n    /// Channel class not supported\n    LL_ERR_CHANNEL_CLASS_NOT_SUP                                                   = 0xBE,\n    /// Insufficient security\n    LL_ERR_INSUFFICIENT_SECURITY                                                   = 0xBF,\n    /// Parameters out of mandatory range\n    LL_ERR_PARAM_OUT_OF_MAND_RANGE                                                 = 0xC0,\n    /// Role switch pending\n    LL_ERR_ROLE_SWITCH_PEND                                                        = 0xC2,\n    /// Reserved slot violation\n    LL_ERR_RESERVED_SLOT_VIOLATION                                                 = 0xC4,\n    /// Role Switch fail\n    LL_ERR_ROLE_SWITCH_FAIL                                                        = 0xC5,\n    /// Error, EIR too large\n    LL_ERR_EIR_TOO_LARGE                                                           = 0xC6,\n    /// Simple pairing not supported by host\n    LL_ERR_SP_NOT_SUPPORTED_HOST                                                   = 0xC7,\n    /// Host pairing is busy\n    LL_ERR_HOST_BUSY_PAIRING                                                       = 0xC8,\n    /// Controller is busy\n    LL_ERR_CONTROLLER_BUSY                                                         = 0xCA,\n    /// Unacceptable connection initialization\n    LL_ERR_UNACCEPTABLE_CONN_INT                                                   = 0xCB,\n    /// Direct Advertising Timeout\n    LL_ERR_DIRECT_ADV_TO                                                           = 0xCC,\n    /// Connection Terminated due to a MIC failure\n    LL_ERR_TERMINATED_MIC_FAILURE                                                  = 0xCD,\n    /// Connection failed to be established\n    LL_ERR_CONN_FAILED_TO_BE_EST                                                   = 0xCE,\n};\n\n/// @} RWBLE_HL_ERROR_H\n\n#endif // RWBLE_HL_ERROR_H_\n"
  },
  {
    "path": "services/ble_stack/hl/inc/attm.h",
    "content": "#ifndef ATTM_H_\n#define ATTM_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ATTM Attribute Manager\n * @ingroup ATT\n * @brief Attribute Manager\n *\n * The ATTM is the attribute manager of the Attribute Profile block and\n * is responsible for managing messages and providing generic attribute\n * functionalities to @ref ATTC \"ATTC\" and @ref ATTS \"ATTS\".\n *\n *\n * @{\n *\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#include \n#include \n\n#include \"co_error.h\"\n#include \"att.h\"\n#include \"ke_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// update attribute permission on specific handle\n#define ATTMDB_UPDATE_PERM(handle, access, right)\\\n    attm_att_update_perm(handle, (PERM_MASK_ ## access), PERM(access, right))\n\n#define ATTMDB_UPDATE_PERM_VAL(handle, access, val)\\\n    attm_att_update_perm(handle, (PERM_MASK_ ## access), ((val) << (PERM_POS_ ## access)))\n\n\n\n/*\n * DATA STRUCTURES\n ****************************************************************************************\n */\n\n/// Internal 16bits UUID service description\nstruct attm_desc\n{\n    /// 16 bits UUID LSB First\n    uint16_t uuid;\n    /// Attribute Permissions (@see enum attm_perm_mask)\n    uint16_t perm;\n    /// Attribute Extended Permissions (@see enum attm_value_perm_mask)\n    uint16_t ext_perm;\n    /// Attribute Max Size\n    /// note: for characteristic declaration contains handle offset\n    /// note: for included service, contains target service handle\n    uint16_t max_size;\n};\n\n\n/// Internal 128bits UUID service description\nstruct attm_desc_128\n{\n    /// 128 bits UUID LSB First\n    uint8_t uuid[ATT_UUID_128_LEN];\n    /// Attribute Permissions (@see enum attm_perm_mask)\n    uint16_t perm;\n    /// Attribute Extended Permissions (@see enum attm_value_perm_mask)\n    uint16_t ext_perm;\n    /// Attribute Max Size\n    /// note: for characteristic declaration contains handle offset\n    /// note: for included service, contains target service handle\n    uint16_t max_size;\n};\n\n\n\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Compare if two UUIDs matches\n *\n * @param[in]  uuid_a      UUID A value\n * @param[in]  uuid_a_len  UUID A length\n * @param[in]  uuid_b      UUID B value\n * @param[in]  uuid_b_len  UUID B length\n *\n * @return true if UUIDs matches, false otherwise\n ****************************************************************************************\n */\nbool attm_uuid_comp(uint8_t *uuid_a, uint8_t uuid_a_len,\n                      uint8_t *uuid_b, uint8_t uuid_b_len);\n\n\n/**\n ****************************************************************************************\n * @brief Check if two UUIDs matches (2nd UUID is a 16 bits UUID with LSB First)\n *\n * @param[in]  uuid_a      UUID A value\n * @param[in]  uuid_a_len  UUID A length\n * @param[in]  uuid_b      UUID B 16 bit value\n *\n * @return true if UUIDs matches, false otherwise\n ****************************************************************************************\n */\nbool attm_uuid16_comp(uint8_t *uuid_a, uint8_t uuid_a_len, uint16_t uuid_b);\n\n\n/**\n ****************************************************************************************\n * @brief Convert UUID value to 128 bit UUID\n *\n * @param[out] uuid128   converted 32-bit Bluetooth UUID to 128-bit UUID\n * @param[in]  uuid      UUID to convert to 128-bit UUID\n * @param[in]  uuid_len  UUID length\n *\n ****************************************************************************************\n */\nvoid attm_convert_to128(uint8_t *uuid128, uint8_t *uuid, uint8_t uuid_len);\n\n/**\n ****************************************************************************************\n * @brief Check if it's a Bluetooth 16-bits UUID for 128-bit input\n *\n * @param[in]  uuid      128-bit UUID\n *\n * @return true if uuid  is a Bluetooth 16-bit UUID, false else.\n ****************************************************************************************\n */\nbool attm_is_bt16_uuid(uint8_t *uuid);\n\n/**\n ****************************************************************************************\n * @brief Check if it's a Bluetooth 32 bits UUID for 128-bit input\n *\n * @param[in]  uuid      128-bit UUID\n *\n * @return true if uuid  is a Bluetooth 32-bits UUID, false else.\n ****************************************************************************************\n */\nbool attm_is_bt32_uuid(uint8_t *uuid);\n\n\n#if (BLE_ATTS)\n/**\n ****************************************************************************************\n * @brief Function use to ease service database creation.\n * Use @see attmdb_add_service function of attmdb module to create service database,\n * then use @see attmdb_add_attribute function of attmdb module to create attributes\n * according to database description array given in parameter.\n *\n * @note: database description array shall be const to reduce memory consumption (only ROM)\n * @note: It supports only 16 bits UUIDs\n *\n * @note: If shdl = 0, it return handle using first available handle (shdl is\n * modified); else it verifies if start handle given can be used to allocates handle range.\n *\n * @param[in|out] shdl          Service start handle.\n * @param[in]     uuid          Service UUID\n * @param[in|out] cfg_flag      Configuration Flag, each bit matches with an attribute of\n *                              att_db (Max: 32 attributes); if the bit is set to 1, the\n *                              attribute will be added in the service.\n * @param[in]     max_nb_att    Number of attributes in the service\n * @param[in|out] att_tbl       Array which will be fulfilled with the difference between\n *                              each characteristic handle and the service start handle.\n *                              This array is useful if several characteristics are optional\n *                              within the service, can be set to NULL if not needed.\n * @param[in]     dest_id       Task ID linked to the service. This task will be notified\n *                              each time the service content is modified by a peer device.\n * @param[in|out] att_db        Table containing all attributes information\n * @param[in]     svc_perm      Service permission (@see enum attm_svc_perm_mask)\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If database creation succeeds.\n *  - @ref ATT_ERR_INVALID_HANDLE: If start_hdl given in parameter + nb of attribute override\n *                            some existing services handles.\n *  - @ref ATT_ERR_INSUFF_RESOURCE: There is not enough memory to allocate service buffer.\n *                           or of new attribute cannot be added because all expected\n *                           attributes already added or buffer overflow detected during\n *                           allocation\n ****************************************************************************************\n */\nuint8_t attm_svc_create_db(uint16_t *shdl, uint16_t uuid, uint8_t *cfg_flag, uint8_t max_nb_att,\n                           uint8_t *att_tbl, ke_task_id_t const dest_id,\n                           const struct attm_desc *att_db, uint8_t svc_perm);\n\n\n\n/**\n ****************************************************************************************\n * @brief Function use to ease service database creation.\n * Use @see attmdb_add_service function of attmdb module to create service database,\n * then use @see attmdb_add_attribute function of attmdb module to create attributes\n * according to database description array given in parameter.\n *\n * @note: database description array shall be const to reduce memory consumption (only ROM)\n * @note: It supports 128, 32 and 16 bits UUIDs\n *\n * @note: If shdl = 0, it return handle using first available handle (shdl is\n * modified); else it verifies if start handle given can be used to allocates handle range.\n *\n * @param[in|out] shdl          Service start handle.\n * @param[in]     uuid          Service UUID\n * @param[in|out] cfg_flag      Configuration Flag, each bit matches with an attribute of\n *                              att_db (Max: 32 attributes); if the bit is set to 1, the\n *                              attribute will be added in the service.\n * @param[in]     max_nb_att    Number of attributes in the service\n * @param[in|out] att_tbl       Array which will be fulfilled with the difference between\n *                              each characteristic handle and the service start handle.\n *                              This array is useful if several characteristics are optional\n *                              within the service, can be set to NULL if not needed.\n * @param[in]     dest_id       Task ID linked to the service. This task will be notified\n *                              each time the service content is modified by a peer device.\n * @param[in|out] att_db        Table containing all attributes information\n * @param[in]     svc_perm      Service permission (@see enum attm_svc_perm_mask)\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If database creation succeeds.\n *  - @ref ATT_ERR_INVALID_HANDLE: If start_hdl given in parameter + nb of attribute override\n *                            some existing services handles.\n *  - @ref ATT_ERR_INSUFF_RESOURCE: There is not enough memory to allocate service buffer.\n *                           or of new attribute cannot be added because all expected\n *                           attributes already added or buffer overflow detected during\n *                           allocation\n ****************************************************************************************\n */\nuint8_t attm_svc_create_db_128(uint16_t *shdl, const uint8_t* uuid, uint8_t *cfg_flag, uint8_t max_nb_att,\n                               uint8_t *att_tbl, ke_task_id_t const dest_id,\n                               const struct attm_desc_128 *att_db, uint8_t svc_perm);\n\n/**\n ****************************************************************************************\n * @brief Function use to verify if several services can be allocated on a contiguous\n * handle range. If this command succeed, it means that service allocation will succeed.\n *\n * If start_hdl = 0, it return handle using first available handle (start_hdl is\n * modified); else it verifies if start handle given can be used to allocates handle range.\n *\n * @param[in|out] start_hdl     Service start handle.\n * @param[in]     nb_att        Number of handle to allocate (containing service handles)\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If service allocation succeeds.\n *  - @ref ATT_ERR_INVALID_HANDLE: If start_hdl given in parameter or UUIDs value invalid\n ****************************************************************************************\n */\nuint8_t attm_reserve_handle_range(uint16_t* start_hdl, uint8_t nb_att);\n\n\n\n/**\n ****************************************************************************************\n * @brief Update attribute value\n *\n * Updating attribute value do not trigger any notification or indication, this shall be\n * handled by GATT task.\n *\n * @param[in] handle Attribute handle.\n * @param[in] length Size of new attribute value\n * @param[in] offset Data offset of in the payload to set\n * @param[in] value  Attribute value payload\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If attribute value update succeeds\n *  - @ref ATT_ERR_INVALID_HANDLE: If handle doesn't exist in database\n *  - @ref ATT_ERR_REQUEST_NOT_SUPPORTED: If attribute data not present in database or\n *                                        cannot be modified\n *  - @ref ATT_ERR_INVALID_ATTRIBUTE_VAL_LEN: If new value length exceeds maximum attribute\n *                              value length.\n *\n ****************************************************************************************\n */\nuint8_t attm_att_set_value(uint16_t handle, att_size_t length, att_size_t offset, uint8_t* value);\n\n/**\n ****************************************************************************************\n * @brief Retrieve attribute value\n\n *\n * @param[in]  handle Attribute handle.\n * @param[out] length Size of attribute value\n * @param[out] value  Pointer to attribute value payload\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If request succeeds\n *  - @ref ATT_ERR_INVALID_HANDLE: If handle doesn't exist in database\n *  - @ref ATT_ERR_REQUEST_NOT_SUPPORTED: If attribute data not present in database\n ****************************************************************************************\n */\nuint8_t attm_get_value(uint16_t handle, att_size_t* length, uint8_t** value);\n\n\n/**\n ****************************************************************************************\n * @brief Update attribute permission\n *\n * @param[in] handle Attribute handle.\n *  - @ref ATT_ERR_REQUEST_NOT_SUPPORTED: If attribute data not present in database\n * @param[in] perm       New attribute permission\n * @param[in] ext_perm   New attribute extended permission\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If request succeeds\n *  - @ref ATT_ERR_INVALID_HANDLE: If handle doesn't exist in database\n *  - @ref ATT_ERR_REQUEST_NOT_SUPPORTED: If attribute permission is fixed\n ****************************************************************************************\n */\nuint8_t attm_att_set_permission(uint16_t handle, uint16_t perm, uint16_t ext_perm);\n\n\n/**\n ****************************************************************************************\n * @brief Reset some permissions bit in the Handle passed as parameter.\n *\n * @param[in] handle      Attribute handle.\n * @param[in] access_mask Access mask of permission to update\n * @param[in] perm        New value of the permission to update\n *\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If request succeeds\n *  - @ref ATT_ERR_INVALID_HANDLE: If handle doesn't exist in database\n *  - @ref ATT_ERR_REQUEST_NOT_SUPPORTED: If attribute permission is fixed\n ****************************************************************************************\n */\nuint8_t attm_att_update_perm(uint16_t handle, uint16_t access_mask, uint16_t perm);\n\n/**\n ****************************************************************************************\n * @brief Update attribute service permission\n *\n * @param[in] handle Attribute handle.\n * @param[in] perm   New attribute permission\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If request succeeds\n *  - @ref ATT_ERR_INVALID_HANDLE: If handle doesn't exist in database\n ****************************************************************************************\n */\nuint8_t attm_svc_set_permission(uint16_t handle, uint8_t perm);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve attribute service permission\n *\n * @param[in]  handle Attribute handle.\n * @param[out] perm   Permission value to return\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If request succeeds\n *  - @ref ATT_ERR_INVALID_HANDLE: If handle doesn't exist in database\n ****************************************************************************************\n */\nuint8_t attm_svc_get_permission(uint16_t handle, uint8_t* perm);\n\n\n/**\n ****************************************************************************************\n * @brief Clear database\n *\n * For debug purpose only, this function clear the database and unalloc all services\n * within database.\n *\n * This function shall be used only for qualification and tests in order to manually\n * change database without modifying software.\n ****************************************************************************************\n */\nvoid attmdb_destroy(void);\n\n/**\n ****************************************************************************************\n * @brief Initialize Attribute Database (clear it)\n *\n * @param[in] reset  true if it's requested by a reset; false if it's boot initialization\n ****************************************************************************************\n */\nvoid attm_init(bool reset);\n#endif // (BLE_ATTS)\n\n#endif // #if (BLE_CENTRAL || BLE_PERIPHERAL)\n/// @} ATTM\n#endif // ATTM_H_\n"
  },
  {
    "path": "services/ble_stack/hl/inc/gapc.h",
    "content": "#ifndef _GAPC_H_\n#define _GAPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GAPC Generic Access Profile Controller\n * @ingroup GAP\n * @brief  Generic Access Profile Controller.\n *\n * The GAP Controller module is responsible for providing an API to the application in\n * to perform GAP action related to a BLE connection (pairing, update parameters,\n * disconnect ...). GAP controller is multi-instantiated, one task instance per BLE\n * connection.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_GAPC)\n\n#include \"ke_task.h\"\n#include \"gap.h\"\n#include \"smpc.h\"\n\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/// Operation type\nenum gapc_op_type\n{\n    /// Operation used to manage Link (update params, get peer info)\n    GAPC_OP_LINK_INFO    = 0x00,\n\n    /// Operation used to manage SMP\n    GAPC_OP_SMP          = 0x01,\n\n    /// Operation used to manage connection update\n    GAPC_OP_LINK_UPD     = 0x02,\n\n    /// Max number of operations\n    GAPC_OP_MAX\n};\n\n/// Link security status. This status represents the authentication/authorization/bonding levels of the connection\nenum gapc_lk_sec_req\n{\n    /// Link is bonded\n    GAPC_LK_BONDED,\n    /// Link is Encrypted\n    GAPC_LK_ENCRYPTED,\n    /// Link LTK Exchanged during pairing\n    GAPC_LK_LTK_PRESENT,\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// GAP controller environment variable structure.\nstruct gapc_env_tag\n{\n    /// Request operation Kernel message\n    void* operation[GAPC_OP_MAX];\n    /// Task id requested disconnection\n    ke_task_id_t disc_requester;\n\n\n    /* Connection parameters to keep */\n\n    /// Security Management Protocol environment variables\n    struct smpc_env smpc;\n\n    /// connection handle\n    uint16_t conhdl;\n\n    /// Configuration fields (@see enum gapc_fields)\n    uint8_t fields;\n\n    // BD Address used for the link that should be kept\n    struct gap_bdaddr src[SMPC_INFO_MAX];\n\n    /// Relevant information of peer LE features 8-byte array\n    uint8_t features;\n};\n\n\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Retrieve connection index from connection handle.\n *\n * @param[in] conhdl Connection handle\n *\n * @return Return found connection index, GAP_INVALID_CONIDX if not found.\n ****************************************************************************************\n */\nuint8_t gapc_get_conidx(uint16_t conhdl);\n\n/**\n ****************************************************************************************\n * @brief Retrieve connection handle from connection index.\n *\n * @param[in] conidx Connection index\n *\n * @return Return found connection handle, GAP_INVALID_CONHDL if not found.\n ****************************************************************************************\n */\nuint16_t gapc_get_conhdl(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Retrieve connection role from connection index.\n *\n * @param[in] conidx Connection index\n *\n * @return Return found connection role\n ****************************************************************************************\n */\nuint8_t gapc_get_role(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Retrieve connection address information on current link.\n *\n * @param[in] conidx Connection index\n * @param[in] src    Connection information source\n *\n * @return Return found connection address\n ****************************************************************************************\n */\nstruct gap_bdaddr* gapc_get_bdaddr(uint8_t conidx, uint8_t src);\n\n\n/**\n ****************************************************************************************\n * @brief Check if current link support security requirements.\n *\n * @param[in] conidx  Connection index\n * @param[in] sec_req Link security requirement to test\n *\n * @return True if link requirement is supported, False else.\n ****************************************************************************************\n */\nbool gapc_is_sec_set(uint8_t conidx, uint8_t sec_req);\n\n/**\n ****************************************************************************************\n * @brief Retrieve Link Security level\n *\n * @param[in] conidx  Connection index\n *\n * @return Link Security level.\n ****************************************************************************************\n */\nuint8_t gapc_lk_sec_lvl_get(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Retrieve the encryption key size of the connection\n *\n * @param[in] conidx Connection index\n *\n * @return encryption key size (size is 7 - 16 byte range)\n *\n ****************************************************************************************\n */\nuint8_t gapc_enc_keysize_get(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Get Service Change Client Configuration\n *\n * @param[in] conidx Connection index\n *\n * @return Service Change Client Configuration\n ****************************************************************************************\n */\nbool gapc_svc_chg_ccc_get(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Set Service Change Client Configuration\n *\n * @param[in] conidx Connection index\n * @param[in] enable True if CCC is enabled, False else\n *\n ****************************************************************************************\n */\nvoid gapc_svc_chg_ccc_set(uint8_t conidx, bool enable);\n\n/**\n ****************************************************************************************\n * Retrieve if current connection index is used for a discovery purpose such as\n * Name discovery\n *\n * @param conidx Index of the specific connection\n *\n * @return true if connection has a discovery purpose, False else\n ****************************************************************************************\n */\nbool gapc_is_disc_connection(uint8_t conidx);\n\nbool gapc_get_remote_dev_feature(uint8_t conidx, uint8_t* ptrFeature);\n\n#ifdef __GATT_OVER_BR_EDR__\nuint8_t gapc_create_btgatt(uint16_t conhdl);\nvoid gapc_clean_btgatt(uint8_t conidx);\n#endif\n\n#endif // (BLE_GAPC)\n/// @} GAPC\n\n#endif /* _GAPC_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/inc/gapm.h",
    "content": "#ifndef _GAPM_H_\n#define _GAPM_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GAPM Generic Access Profile Manager\n * @ingroup GAP\n * @brief Generic Access Profile Manager.\n *\n * The GAP Manager module is responsible for providing an API to the application in order\n * to manage all non connected stuff such as configuring device to go in desired mode\n * (discoverable, connectable, etc.) and perform required actions (scanning, connection,\n * etc.). GAP Manager is also responsible of managing GAP Controller state according to\n * corresponding BLE connection states.\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#include \"ke_task.h\"\n#include \"gap.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// Bit checking\n#define GAPM_ISBITSET(flag, mask)                   (((flag)&(mask)) == mask)\n\n\n\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialize Generic Access Profile Manager Module.\n *\n * @param[in] reset  true if it's requested by a reset; false if it's boot initialization\n *\n ****************************************************************************************\n */\nvoid gapm_init(bool reset);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve Task Identifier from Task number\n * (automatically update index of task in returned task id)\n *\n * @param task Task number\n * @return Task Identifier\n ****************************************************************************************\n */\nke_task_id_t gapm_get_id_from_task(ke_msg_id_t task);\n\n/**\n ****************************************************************************************\n * @brief Retrieve Task Number from Task Identifier\n * (automatically update index of task in returned task id)\n *\n * @param id Task Identifier\n * @return Task Number\n ****************************************************************************************\n */\nke_task_id_t gapm_get_task_from_id(ke_msg_id_t id);\n\n\n\n#if (BLE_GAPC)\n/**\n ****************************************************************************************\n * @brief Created link connection parameters (from bond data) has been set, connection\n * ready to be used.\n *\n * @param[in] conidx     Connection Index\n *\n ****************************************************************************************\n */\nvoid gapm_con_enable(uint8_t conidx);\n\n\n/**\n ****************************************************************************************\n * @brief A link has been disconnected, clean-up host stack for this connection.\n *\n * @param[in] conidx     Connection Index\n * @param[in] conhdl     Connection Handle\n * @param[in] reason     Reason of the disconnection\n *\n ****************************************************************************************\n */\nvoid gapm_con_cleanup(uint8_t conidx, uint16_t conhdl, uint8_t reason);\n\n#endif // (BLE_GAPC)\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve device identity key.\n *\n * @return Device Identity Key\n ****************************************************************************************\n */\nstruct gap_sec_key* gapm_get_irk(void);\n\n\n/**\n ****************************************************************************************\n * @brief update the device identity key saved in @gapm_env.\n *\n * @return Device Identity Key to update\n ****************************************************************************************\n */\nvoid gapm_update_irk(uint8_t *irk);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve local public address.\n *\n * @return Return local public address\n ****************************************************************************************\n */\nbd_addr_t* gapm_get_bdaddr(void);\n\nbd_addr_t* gapm_get_connected_bdaddr(uint8_t conidx);\n\n#ifdef BLE_AUDIO_AM0_TASK\n/**\n ****************************************************************************************\n * @brief Return if LE Audio Mode 0 is supported or not\n *\n * @return True if supported, False else\n ****************************************************************************************\n */\nbool gapm_is_audio_am0_sup(void);\n#endif // BLE_AUDIO_AM0_TASK\n\n\n#if(BLE_EMB_PRESENT && HCI_TL_SUPPORT)\n/**\n ****************************************************************************************\n * @brief Retrieve if host is embedded or not\n *\n * @return True if embedded host is enabled, false else.\n ****************************************************************************************\n */\nbool gapm_is_embedded_host(void);\n\n/**\n ****************************************************************************************\n * @brief Set if host is embedded or not\n *\n * @param[in] enable True to enable embedded host, false else.\n ****************************************************************************************\n */\nvoid gapm_set_embedded_host(bool enable);\n#endif // (BLE_EMB_PRESENT && HCI_TL_SUPPORT)\n\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve the device address type (@see enum gapm_addr_type)\n *\n * @return address type\n ****************************************************************************************\n */\nuint8_t gapm_get_address_type(void);\n\n\n#if (BLE_ATTS)\n\n/**\n ****************************************************************************************\n * @brief Get if preferred connection parameters present in GAP ATT database\n *\n * @return True if referred connection parameters present in GAP ATT database, False else\n ****************************************************************************************\n */\nbool gapm_is_pref_con_param_pres(void);\n\n/**\n ****************************************************************************************\n * @brief retrieve gap attribute handle from attribute index.\n *\n * @param[in] att_idx Attribute index\n *\n * @return Attribute handle\n ****************************************************************************************\n */\nuint16_t gapm_get_att_handle(uint8_t att_idx);\n\n#endif // (BLE_ATTS)\n\n#if (SECURE_CONNECTIONS)\n/**\n ****************************************************************************************\n * @brief Returns the local Public Key\n *\n * @return pointer to the local Public Key\n ****************************************************************************************\n */\npublic_key_t* gapm_get_local_public_key(void);\nprivate_key_t * gapm_get_local_private_key(void);\n#endif // (SECURE_CONNECTIONS)\n\n/**\n ****************************************************************************************\n * @brief Retrieve if Legacy pairing is supported on local device\n *\n * @return True if legacy pairing is supported\n ****************************************************************************************\n */\nbool gapm_is_legacy_pairing_supp(void);\n\n\n/**\n ****************************************************************************************\n  * @brief Retrieve if Secure Connection pairing is supported on local device\n *\n * @return True if Secure Connection pairing is supported\n ****************************************************************************************\n */\nbool gapm_is_sec_con_pairing_supp(void);\n\n\n#if (BLE_LECB)\n/**\n ****************************************************************************************\n * @brief Check if LECB connection can be registered (established)\n *\n * @param[in]  le_psm        LE Protocol/Service Multiplexer\n * @param[in]  conidx        Connection index for app_task computation\n * @param[out] app_task      Destination application/profile task\n * @param[out] sec_lvl       Security level requirements\n *\n *\n * @return GAP_ERR_NOT_FOUND if LE_PSM not register, GAP_ERR_NO_ERROR else\n ****************************************************************************************\n */\nuint8_t gapm_le_psm_get_info(uint16_t le_psm, uint8_t conidx, ke_task_id_t *app_task, uint8_t *sec_lvl);\n\n\n/**\n ****************************************************************************************\n * @brief Check if LECB connection can be registered (established)\n *\n * @param[in] le_psm        LE Protocol/Service Multiplexer\n * @param[in] peer_con_init Info to know if connection is initiated by peer device\n *\n * @return L2C_ERR_NO_RES_AVAIL if all LECB link are established, GAP_ERR_NO_ERROR else\n ****************************************************************************************\n */\nuint8_t gapm_lecb_register(uint16_t le_psm, bool peer_con_init);\n\n\n/**\n ****************************************************************************************\n * @brief Unregister an existing LECB connection\n *\n * @param[in] le_psm        LE Protocol/Service Multiplexer\n * @param[in] peer_con_init Info to know if connection is initiated by peer device\n *\n * @return GAP_ERR_NO_ERROR\n ****************************************************************************************\n */\nuint8_t gapm_lecb_unregister(uint16_t le_psm, bool peer_con_init);\n\n#endif // (BLE_LECB)\n\n/**\n ****************************************************************************************\n * @brief Return the maximal MTU value\n *\n * @param[out] Maximal MTU value\n ****************************************************************************************\n */\nuint16_t gapm_get_max_mtu(void);\n\n/**\n ****************************************************************************************\n * @brief Return the maximal MPS value\n *\n * @param[out] Maximal MPS value\n ****************************************************************************************\n */\nuint16_t gapm_get_max_mps(void);\n\n\n\n/**\n ****************************************************************************************\n * @brief Check If Service changed feature is enabled or not\n *\n * @return true if enabled, false else.\n *\n ****************************************************************************************\n */\nbool gapm_svc_chg_en(void);\n\n#if (RW_DEBUG)\n/**\n ****************************************************************************************\n * @brief Check If Debug mode feature is enabled or not\n *\n * @return true if enabled, false else.\n *\n ****************************************************************************************\n */\nbool gapm_dbg_mode_en(void);\n\n/**\n ****************************************************************************************\n * @brief Force the GAP service start handle\n ****************************************************************************************\n */\nvoid gapm_set_svc_start_hdl(uint16_t start_hdl);\n#endif // (RW_DEBUG)\n\n/**\n ****************************************************************************************\n * Retrieve if current connection index is used for a discovery purpose such as\n * Name discovery\n *\n * @param conidx Index of the specific connection\n *\n * @return true if connection has a discovery purpose, False else\n ****************************************************************************************\n */\nbool gapm_is_disc_connection(uint8_t conidx);\n\n/// @} GAPM\n\n#endif /* _GAPM_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/inc/gattc.h",
    "content": "#ifndef GATTC_H_\n#define GATTC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GATTC Generic Attribute Profile Controller\n * @ingroup GATT\n * @brief Generic Attribute Profile Controller.\n *\n * This GATT module is responsible for providing an API for all attribute related operations\n * related to a BLE connection.\n * It is responsible for all the service framework activities using the Attribute protocol\n * for discovering services and for reading and writing characteristic values on a peer device.\n * To achieve this, the GATT interfaces with @ref ATTC \"ATTC\" and the @ref ATTS \"ATTS\".\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n/* kernel task */\n#include \"rwip_config.h\"\n#if (BLE_GATTC)\n\n#include \"co_list.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Operation type\nenum gattc_op_type\n{\n    #if (BLE_ATTS)\n    /// Operation used to Server Request operations\n    GATTC_OP_SERVER,\n    #endif // (BLE_ATTS)\n\n    #if (BLE_ATTC)\n    /// Operation used to Client Request operations\n    GATTC_OP_CLIENT,\n    /// Service Discovery Procedure operation\n    GATTC_OP_SDP,\n    #endif // (BLE_ATTC)\n\n    /// Max number of operations\n    GATTC_OP_MAX\n};\n\n/*\n * TYPES DEFINITIONS\n ****************************************************************************************\n */\n\n#if (BLE_ATTC)\n/// Attribute Client environment variable requirements\nstruct attc_env\n{\n    /// List of ATT message used to aggregate long value in a single buffer.\n    struct co_list rsp_list;\n    /// List that contains peer device event registration\n    struct co_list reg_evt;\n    /// List that contains data for service discovery\n    struct co_list sdp_data;\n};\n#endif // (BLE_ATTC)\n\n#if (BLE_ATTS)\n/// Attribute server environment variables\nstruct atts_env\n{\n    /// This is used to merge save all the prepare write request received ,\n    /// before receiving the execute or cancel or disconnection.\n    struct co_list             prep_wr_req_list;\n    /// This list is used to put any data in order to send a response to peer device\n    struct co_list             rsp;\n    /// This structure is used to store in cache latest attribute read value\n    struct gattc_read_cfm*     read_cache;\n    /// pointer to the PDU which is currently handled by ATTS\n    struct l2cc_pdu_recv_ind*  pdu;\n};\n#endif // (BLE_ATTS)\n\n/// GATT controller environment variable structure.\nstruct gattc_env_tag\n{\n    /// Request operation Kernel message\n    void* operation[GATTC_OP_MAX];\n\n    #if (BLE_ATTC)\n    struct attc_env client;\n    #endif // (BLE_ATTC)\n\n    #if (BLE_ATTS)\n    struct atts_env server;\n    #endif // (BLE_ATTS)\n\n    /// Current MTU Size\n    uint16_t mtu_size;\n\n    /// A transaction timeout occurs, reject next attribute commands\n    bool     trans_timeout;\n};\n/*\n * MACRO DEFINITIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Created link connection parameters (from bond data) has been set, connection\n * ready to be used.\n *\n * @param[in] conidx     Connection Index\n *\n ****************************************************************************************\n */\nvoid gattc_con_enable(uint8_t conidx);\n\n\n/**\n ****************************************************************************************\n * @brief Gets the negotiated MTU. This function gets the negotiated MTU.\n *\n * @param[in] idx   connection record index\n *\n * @return MTU negotiated\n *\n ****************************************************************************************\n */\nuint16_t gattc_get_mtu(uint8_t idx);\n\n/**\n ****************************************************************************************\n * @brief Sets the negotiated MTU This function stores the negotiated MTU.\n *\n * @param[in] idx   connection record index\n * @param[in] mtu   negotiated MTU\n *\n * @return status   indicates if the MTU setting operation is successful\n *\n ****************************************************************************************\n */\nvoid gattc_set_mtu(uint8_t idx, uint16_t mtu);\n\n\n\n#endif /* (BLE_GATTC) */\n\n/// @} GATTC\n#endif // GATTC_H_\n"
  },
  {
    "path": "services/ble_stack/hl/inc/gattm.h",
    "content": "#ifndef GATTM_H_\n#define GATTM_H_\n\n\n\n/**\n ****************************************************************************************\n * @addtogroup GATTM Generic Attribute Profile Manager\n * @ingroup GATT\n * @brief Generic Attribute Profile.\n *\n * The GATT manager module is responsible for providing an API for all action operations\n * not related to a connection. It's responsible to managing internal database.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n/* kernel task */\n#include \"rwip_config.h\"\n\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n#include \n#include \n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialization of the GATT manager module.\n * This function performs all the initialization steps of the GATT module.\n *\n * @param[in] reset  true if it's requested by a reset; false if it's boot initialization\n *\n ****************************************************************************************\n */\nvoid gattm_init(bool reset);\n\n\n/**\n ****************************************************************************************\n * @brief Initialize GATT attribute database\n *\n * @param[in] start_hdl  Service Start Handle\n * @param[in] svc_chg_en Service Change feature enabled\n *\n * @return status code of attribute database initialization\n * Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If database creation succeeds.\n *  - @ref ATT_ERR_INVALID_HANDLE: If start_hdl given in parameter + nb of attribute override\n *                            some existing services handles.\n *  - @ref ATT_ERR_INSUFF_RESOURCE: There is not enough memory to allocate service buffer.\n *                           or of new attribute cannot be added because all expected\n *                           attributes already add\n ****************************************************************************************\n */\nuint8_t gattm_init_attr(uint16_t start_hdl, bool svc_chg_en);\n\n/**\n ****************************************************************************************\n * @brief Initialize GATT resources for connection.\n *\n * @param[in] conidx connection record index\n * @param[in] role   device role after connection establishment\n *\n ****************************************************************************************\n */\nvoid gattm_create(uint8_t conidx);\n/**\n ****************************************************************************************\n * @brief Cleanup GATT resources for connection\n *\n * @param[in] conidx   connection record index\n *\n ****************************************************************************************\n */\nvoid gattm_cleanup(uint8_t conidx);\n\n#ifdef __GATT_OVER_BR_EDR__\nvoid gattm_enable(uint8_t conidx);\nvoid gattm_set_mtu(uint8_t idx, uint16_t mtu);\n#endif\n\n#if (BLE_ATTS)\n/**\n ****************************************************************************************\n * @brief Return the start handle of the GATT service in the database *\n ****************************************************************************************\n */\nuint16_t gattm_svc_get_start_hdl(void);\n#endif //(BLE_ATTS)\n#endif /* (BLE_CENTRAL || BLE_PERIPHERAL) */\n\n/// @} GATTM\n#endif // GATTM_H_\n"
  },
  {
    "path": "services/ble_stack/hl/inc/l2cc.h",
    "content": "#ifndef L2CC_H_\n#define L2CC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup L2CC L2CAP Controller\n * @ingroup L2C\n * @brief L2CAP block for data processing and per device connection\n *\n * The L2CC is responsible for all the data processing related\n * functions of the L2CAP block per device connection.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_L2CC)\n\n#include \"l2cc_task.h\"\n#include \"l2cc_pdu.h\"\n\n#include \n#include \n#include \"co_list.h\"\n#include \"ke_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Generic way to creates and allocate a Signaling PDU message that can be then\n *        sent to peer device\n *\n * @param[in] conidx        Connection Index\n * @param[in] code          PDU code\n * @param[in] src_id        Source task ID\n *\n * @return Pointer to the PDU payload\n ****************************************************************************************\n */\n#define L2CC_SIG_PDU_ALLOC(conidx, code, src_id, type) \\\n    ((struct type*) l2cc_pdu_alloc(conidx, L2C_CID_LE_SIGNALING, code, src_id, 0))\n\n/// from PDU, retrieve the send command\n#define L2CC_PDU_TO_CMD(_pdu) \\\n    ((struct l2cc_pdu_send_cmd*) (((uint8_t*)_pdu) - offsetof(struct l2cc_pdu_send_cmd, pdu.data.code)))\n\n/// from PDU, retrieve the receive indication\n#define L2CC_PDU_TO_IND(_pdu) \\\n    ((struct l2cc_pdu_recv_ind*) (((uint8_t*)_pdu) - offsetof(struct l2cc_pdu_recv_ind, pdu.data.code)))\n\n\n/**\n ****************************************************************************************\n * @brief Generic way to creates and allocate a SMP PDU message that can be then sent to\n *        peer device\n *\n * @param[in] conidx        Connection Index\n * @param[in] code          PDU code\n * @param[in] src_id        Source task ID\n *\n * @return Pointer to the PDU payload\n ****************************************************************************************\n */\n#define L2CC_SMP_PDU_ALLOC(conidx, code, src_id, type) \\\n    ((struct type*) l2cc_pdu_alloc(conidx, L2C_CID_SECURITY, code, src_id, 0))\n\n\n/**\n ****************************************************************************************\n * @brief Generic way to creates and allocate an ATT PDU message that can be then sent to\n *        peer device\n *\n * @param[in] conidx        Connection Index\n * @param[in] code          PDU code\n * @param[in] src_id        Source task ID\n *\n * @return Pointer to the PDU payload\n ****************************************************************************************\n */\n#define L2CC_ATT_PDU_ALLOC(conidx, code, src_id, type)\\\n    ((struct type*) l2cc_pdu_alloc(conidx, L2C_CID_ATTRIBUTE, code, src_id, 0))\n\n\n/**\n ****************************************************************************************\n * @brief Generic way to creates and allocate an ATT PDU message that can be then sent to\n *        peer device\n *\n * @param[in] conidx        Connection Index\n * @param[in] code          PDU code\n * @param[in] src_id        Source task ID\n * @param[in] length        Dynamic payload length to allocate\n *\n * @return Pointer to the PDU payload\n ****************************************************************************************\n */\n#define L2CC_ATT_PDU_ALLOC_DYN(conidx, code, src_id, type, length)\\\n    ((struct type*) l2cc_pdu_alloc(conidx, L2C_CID_ATTRIBUTE, code, src_id, length))\n\n/*\n * INTERNAL MESSAGES API TYPES\n ****************************************************************************************\n */\n\n\n\n/// Send Debug PDU data\nstruct l2cc_dbg_pdu_send_cmd\n{\n    /// L2CC request type (@see enum l2cc_operation):\n    /// - L2CC_DBG_PDU_SEND: Send a PDU\n    uint8_t operation;\n    /// offset value information\n    uint16_t offset;\n    /// PDU Data\n    struct l2cc_dbg_pdu pdu;\n};\n\n/// Debug PDU data received\nstruct l2cc_dbg_pdu_recv_ind\n{\n    /// Status information\n    uint8_t status;\n    /// offset value information\n    uint16_t offset;\n    /// PDU Data\n    struct l2cc_dbg_pdu pdu;\n};\n\n/// Send Legacy PDU data\nstruct l2cc_pdu_send_cmd\n{\n    /// L2CC request type (@see enum l2cc_operation):\n    /// - L2CC_PDU_SEND: Send internal LE Legacy PDU\n    uint8_t operation;\n    /// offset value information\n    uint16_t offset;\n    /// PDU Data\n    struct l2cc_pdu pdu;\n};\n\n\n/// Legacy PDU data received\nstruct l2cc_pdu_recv_ind\n{\n    /// Status information\n    uint8_t status;\n    /// offset value information\n    uint16_t offset;\n    /// PDU Data\n    struct l2cc_pdu pdu;\n};\n\n/// Operation type\nenum l2cc_op_type\n{\n    /// Operation used for signaling protocol message exchange\n    L2CC_OP_SIG      = 0x00,\n    /// Max number of operations\n    L2CC_OP_MAX,\n};\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n\n\n/// L2CAP environment structure\nstruct l2cc_env_tag\n{\n    /// Ongoing operation\n    void* operation[L2CC_OP_MAX];\n\n    /// Buffer in TX queue\n    struct co_list tx_queue;\n    /// Buffer currently receiving data\n    struct ke_msg* rx_buffer;\n    #if (BLE_LECB)\n    /// List of LE credit based connections\n    struct co_list lecb_list;\n    #endif // (BLE_LECB)\n\n    /// Length of PDU still expected\n    uint16_t rx_pdu_rem_len;\n\n};\n\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Generic way to creates and allocate a PDU message that can be then sent to peer\n *        device\n *\n * @note use L2CC_SIG_PDU_ALLOC, L2CC_SMP_PDU_ALLOC, L2CC_ATT_PDU_ALLOC\n *       or L2CC_ATT_PDU_ALLOC_DYN instead of direct function call\n *\n * @param[in] conidx        Connection Index\n * @param[in] cid           Channel Identifier\n * @param[in] code          PDU code\n * @param[in] src_id        Source task ID\n * @param[in] length        Dynamic payload length to allocate\n *\n * @return Generic pointer to the PDU payload\n ****************************************************************************************\n */\nvoid* l2cc_pdu_alloc(uint8_t conidx, uint16_t cid, uint8_t code, ke_task_id_t src_id, uint16_t length);\n\n/**\n ****************************************************************************************\n * @brief Generic way to send the PDU message\n *\n * @param[in] pdu           PDU message to send to peer device\n ****************************************************************************************\n */\nvoid l2cc_pdu_send(void* pdu);\n\n#ifdef __GATT_OVER_BR_EDR__\nvoid l2cc_data_rec_over_bt(uint8_t* ptrData, uint16_t dataLen);\n#endif\n\n#endif //(BLE_L2CC)\n\n/// @} L2CC\n\n#endif // L2CC_H_\n"
  },
  {
    "path": "services/ble_stack/hl/inc/l2cc_pdu.h",
    "content": "#ifndef _L2CC_PDU_H_\n#define _L2CC_PDU_H_\n\n/**\n ****************************************************************************************\n * @addtogroup L2CC_PDU L2Cap Controller PDU generator/extractor\n * @ingroup L2CC\n * @brief This module is in charge to pack or unpack L2CAP packets\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"co_bt.h\"\n#include \"gap.h\"\n#include \"att.h\"\n#include \"compiler.h\"\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Minimal authorized MTU value (defined by Bluetooth SIG)\n#define L2C_MIN_LE_MTUSIG                   (23)\n\n/// L2CAP mode supported for BLE - only mode accepted\n#define L2C_MODE_BASIC_L2CAP                (0x00)\n\n/// Packet partition\n#define L2C_CID_LEN                         (2)\n#define L2C_LENGTH_LEN                      (2)\n#define L2C_CODE_LEN                        (1)\n#define L2C_HEADER_LEN                      (L2C_CID_LEN + L2C_LENGTH_LEN)\n#define L2C_SDU_LEN                         (2)\n#define L2C_LECB_HEADER_LEN                 (L2C_HEADER_LEN + L2C_SDU_LEN)\n\n/// Maximum credit\n#define L2C_LECB_MAX_CREDIT     0xFFFF\n\n\n/* result for connection parameter update response */\n#define L2C_CONN_PARAM_ACCEPT               0x0000\n#define L2C_CONN_PARAM_REJECT               0x0001\n\n/* command reject reasons */\nenum l2cc_pdu_err\n{\n    L2C_CMD_NOT_UNDERSTOOD             = 0x0000,\n    L2C_MTU_SIG_EXCEEDED               = 0x0001,\n    L2C_INVALID_CID                    = 0x0002,\n};\n\n/// Check if channel ID is within the correct range\n#define L2C_IS_DYNAMIC_CID(cid) ((cid >= L2C_CID_DYN_MIN) && (cid <= L2C_CID_DYN_MAX))\n\n/// Check if LE PSM is within the correct range\n#define L2C_IS_VALID_LEPSM(lepsm) (lepsm != L2C_LEPSM_RESERVED)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/** L2CAP LE PSM limits */\nenum l2cc_lepsm_limits\n{\n    /// Reserved\n    L2C_LEPSM_RESERVED                   = 0x0000,\n    /// Fixed minimum range SIG assigned\n    L2C_LEPSM_FIXED_MIN                  = 0x0001,\n    /// Fixed maximum range SIG assigned\n    L2C_LEPSM_FIXED_MAX                  = 0x007F,\n    /// Dynamic minimum range SIG assigned\n    L2C_LEPSM_DYN_MIN                    = 0x0080,\n    /// Dynamic maximum range SIG assigned\n    L2C_LEPSM_DYN_MAX                    = 0x00FF,\n    /// Reserved minimum range SIG assigned\n    L2C_LEPSM_RSV_MIN                    = 0x0100,\n    /// Reserved maximum range SIG assigned\n    L2C_LEPSM_RSV_MAX                    = 0xFFFF,\n};\n\n/** L2CAP channels id */\nenum l2cc_cid\n{\n    /// Reserved channel id\n    L2C_CID_RESERVED                   = 0x0000,\n    /// Attribute channel id\n    L2C_CID_ATTRIBUTE                  = 0x0004,\n    /// Signaling channel id\n    L2C_CID_LE_SIGNALING               = 0x0005,\n    /// Security channel id\n    L2C_CID_SECURITY                   = 0x0006,\n    /// Dynamically allocated minimum range\n    L2C_CID_DYN_MIN                    = 0x0040,\n    /// Dynamically allocated maximum range\n    L2C_CID_DYN_MAX                    = 0x007F,\n};\n\n\n/// signaling codes\nenum l2cc_signal_code\n{\n    /// Reserved code\n    L2C_CODE_RESERVED                  = 0x00,\n    /// Reject request\n    L2C_CODE_REJECT                    = 0x01,\n    /// Connection request\n    L2C_CODE_CONNECTION_REQ            = 0x02,\n    /// Connection response\n    L2C_CODE_CONNECTION_RESP           = 0x03,\n    /// Configuration request\n    L2C_CODE_CONFIGURATION_REQ         = 0x04,\n    /// Configuration response\n    L2C_CODE_CONFIGURATION_RESP        = 0x05,\n    /// Disconnection request\n    L2C_CODE_DISCONNECTION_REQ         = 0x06,\n    /// Disconnection response\n    L2C_CODE_DISCONNECTION_RESP        = 0x07,\n    /// Echo request\n    L2C_CODE_ECHO_REQ                  = 0x08,\n    /// Echo response\n    L2C_CODE_ECHO_RESP                 = 0x09,\n    /// Information request\n    L2C_CODE_INFORMATION_REQ           = 0x0A,\n    /// Information response\n    L2C_CODE_INFORMATION_RESP          = 0x0B,\n    /// Create channel request\n    L2C_CODE_CREATE_CHANNEL_REQ        = 0x0C,\n    /// Create channel response\n    L2C_CODE_CREATE_CHANNEL_RESP       = 0x0D,\n    /// Move channel request\n    L2C_CODE_MOVE_CHANNEL_REQ          = 0x0E,\n    /// Move channel response\n    L2C_CODE_MOVE_CHANNEL_RESP         = 0x0F,\n    /// Move channel confirmation\n    L2C_CODE_MOVE_CHANNEL_CFM          = 0x10,\n    /// Move channel confirmation response\n    L2C_CODE_MOVE_CHANNEL_CFM_RESP     = 0x11,\n    /// Connection Parameter Update Request\n    L2C_CODE_CONN_PARAM_UPD_REQ        = 0x12,\n    /// Connection Parameter Update Response\n    L2C_CODE_CONN_PARAM_UPD_RESP       = 0x13,\n    /// LE Credit Based Connection request\n    L2C_CODE_LE_CB_CONN_REQ            = 0x14,\n    /// LE Credit Based Connection response\n    L2C_CODE_LE_CB_CONN_RESP           = 0x15,\n    /// LE Flow Control Credit\n    L2C_CODE_LE_FLOW_CONTROL_CREDIT    = 0x16,\n\n    /// max number of signaling codes\n    L2C_CODE_SIGNALING_MAX\n};\n\n\n/// security codes\nenum l2cc_security_code\n{\n    /// Pairing Request\n    L2C_CODE_PAIRING_REQUEST              = 0x01,\n    /// Pairing Response\n    L2C_CODE_PAIRING_RESPONSE             = 0x02,\n    /// Pairing Confirm\n    L2C_CODE_PAIRING_CONFIRM              = 0x03,\n    /// Pairing Random\n    L2C_CODE_PAIRING_RANDOM               = 0x04,\n    /// Pairing Failed\n    L2C_CODE_PAIRING_FAILED               = 0x05,\n    /// Encryption Information\n    L2C_CODE_ENCRYPTION_INFORMATION       = 0x06,\n    /// Master Identification\n    L2C_CODE_MASTER_IDENTIFICATION        = 0x07,\n    /// Identity Information\n    L2C_CODE_IDENTITY_INFORMATION         = 0x08,\n    /// Identity Address Information\n    L2C_CODE_IDENTITY_ADDRESS_INFORMATION = 0x09,\n    /// Signing Information\n    L2C_CODE_SIGNING_INFORMATION          = 0x0A,\n    /// Security Request\n    L2C_CODE_SECURITY_REQUEST             = 0x0B,\n    // Pairing Public Keys \n    L2C_CODE_PUBLIC_KEY                   = 0x0C,\n    // Pairing DHKey Check\n    L2C_CODE_DHKEY_CHECK                  = 0x0D,\n    // Pairing Keypress Notification\n    L2C_CODE_KEYPRESS_NOTIFICATION        = 0x0E,\n    /// max number of security codes\n    L2C_CODE_SECURITY_MAX\n};\n\n\n/// attribute protocol PDU codes\nenum l2cc_attribute_code\n{\n    /// Error response\n    L2C_CODE_ATT_ERR_RSP            = 0x01,\n    /// Exchange MTU Request\n    L2C_CODE_ATT_MTU_REQ            = 0x02,\n    /// Exchange MTU Response\n    L2C_CODE_ATT_MTU_RSP            = 0x03,\n    /// Find Information Request\n    L2C_CODE_ATT_FIND_INFO_REQ      = 0x04,\n    /// Find Information Response\n    L2C_CODE_ATT_FIND_INFO_RSP      = 0x05,\n    /// Find By Type Value Request\n    L2C_CODE_ATT_FIND_BY_TYPE_REQ   = 0x06,\n    /// Find By Type Value Response\n    L2C_CODE_ATT_FIND_BY_TYPE_RSP   = 0x07,\n    /// Read By Type Request\n    L2C_CODE_ATT_RD_BY_TYPE_REQ     = 0x08,\n    /// Read By Type Response\n    L2C_CODE_ATT_RD_BY_TYPE_RSP     = 0x09,\n    /// Read Request\n    L2C_CODE_ATT_RD_REQ             = 0x0A,\n    /// Read Response\n    L2C_CODE_ATT_RD_RSP             = 0x0B,\n    /// Read Blob Request\n    L2C_CODE_ATT_RD_BLOB_REQ        = 0x0C,\n    /// Read Blob Response\n    L2C_CODE_ATT_RD_BLOB_RSP        = 0x0D,\n    /// Read Multiple Request\n    L2C_CODE_ATT_RD_MULT_REQ        = 0x0E,\n    /// Read Multiple Response\n    L2C_CODE_ATT_RD_MULT_RSP        = 0x0F,\n    /// Read by Group Type Request\n    L2C_CODE_ATT_RD_BY_GRP_TYPE_REQ = 0x10,\n    /// Read By Group Type Response\n    L2C_CODE_ATT_RD_BY_GRP_TYPE_RSP = 0x11,\n    /// Write Request\n    L2C_CODE_ATT_WR_REQ             = 0x12,\n    /// Write Response\n    L2C_CODE_ATT_WR_RSP             = 0x13,\n    /// Write Command\n    L2C_CODE_ATT_WR_CMD_INFO        = 0x14,\n    L2C_CODE_ATT_WR_CMD             = 0x52,\n    /// Signed Write Command\n    L2C_CODE_ATT_SIGN_WR_CMD_INFO   = 0x15,\n    L2C_CODE_ATT_SIGN_WR_CMD        = 0xD2,\n    /// Prepare Write Request\n    L2C_CODE_ATT_PREP_WR_REQ        = 0x16,\n    /// Prepare Write Response\n    L2C_CODE_ATT_PREP_WR_RSP        = 0x17,\n    /// Execute Write Request\n    L2C_CODE_ATT_EXE_WR_REQ         = 0x18,\n    /// Execute Write Response\n    L2C_CODE_ATT_EXE_WR_RSP         = 0x19,\n    /// Handle Value Notification\n    L2C_CODE_ATT_HDL_VAL_NTF        = 0x1B,\n    /// Handle Value Indication\n    L2C_CODE_ATT_HDL_VAL_IND        = 0x1D,\n    /// Handle Value Confirmation\n    L2C_CODE_ATT_HDL_VAL_CFM        = 0x1E,\n\n    /// max number of security codes\n    L2C_CODE_ATT_MAX\n};\n\n/// LE Connection oriented PDU codes\nenum l2cc_le_connor_code\n{\n    /// Data frame\n    L2C_CODE_CON_DATA            = 0x01,\n\n    /// max number of connection oriented codes\n    L2C_CODE_CON_MAX\n};\n\n/// Result values for LE Credit Based Connection Response\nenum l2cc_cb_resp_value\n{\n    /// connection successful\n    L2C_CB_CON_SUCCESS          = 0x0000,\n    /// Reserved\n    L2C_CB_CON_RSV1,\n    /// Connection refused - LE_PSM not supported\n    L2C_CB_CON_LEPSM_NOT_SUPP,\n    /// Reserved\n    L2C_CB_CON_RSV2,\n    /// Connection refused - no resources available\n    L2C_CB_CON_NO_RES_AVAIL,\n    /// Connection refused - insufficient authentication\n    L2C_CB_CON_INS_AUTH,\n    /// Connection refused - insufficient authorization\n    L2C_CB_CON_INS_AUTHOR,\n    /// Connection refused - insufficient encryption key size\n    L2C_CB_CON_INS_EKS,\n    /// Connection Refused - insufficient encryption\n    L2C_CB_CON_INS_ENCRYPTION,\n\n    /* ESR 09 error codes */\n    /// Connection Refused - invalid Source CID\n    L2C_CB_CON_INVALID_SRC_CID,\n    /// Connection Refused - Source CID already allocated\n    L2C_CB_CON_SRC_CID_ALREADY_ALLOC,\n    /// Connection Refused - Unacceptable parameters\n    L2C_CB_CON_UNACCEPTABLE_PARAM\n};\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Disconnection Request\nstruct l2cc_disconnection_req\n{\n    /// Signaling code - 0x06\n    uint8_t  code;\n    /// Packet Identifier\n    uint8_t  pkt_id;\n    /// data length\n    uint16_t length;\n    /// Destination CID\n    uint16_t dcid;\n    /// Source CID\n    uint16_t scid;\n};\n\n/// Disconnection Response\nstruct l2cc_disconnection_rsp\n{\n    /// Signaling code - 0x07\n    uint8_t  code;\n    /// Packet Identifier\n    uint8_t  pkt_id;\n    /// data length\n    uint16_t length;\n    /// Destination CID\n    uint16_t dcid;\n    /// Source CID\n    uint16_t scid;\n};\n\n/// Connection Parameter Update Request\nstruct l2cc_update_param_req\n{\n    /// Signaling code - 0x12\n    uint8_t  code;\n    /// Packet Identifier\n    uint8_t  pkt_id;\n    /// data length\n    uint16_t length;\n    /// minimum value for the connection event interval\n    uint16_t intv_min;\n    /// maximum value for the connection event interval\n    uint16_t intv_max;\n    /// slave latency parameter\n    uint16_t latency;\n    /// connection timeout parameter\n    uint16_t timeout;\n};\n\n/// Connection Parameter Update Response\nstruct l2cc_update_param_rsp\n{\n    /// Signaling code - 0x13\n    uint8_t  code;\n    /// Packet Identifier\n    uint8_t  pkt_id;\n    /// data length\n    uint16_t length;\n    /// Result field indicates the response to the Connection Parameter Update Request\n    /// - 0x0000 Connection Parameters accepted\n    /// - 0x0001 Connection Parameters rejected\n    uint16_t response;\n};\n\n/// LE Credit based connection request\nstruct l2cc_lecb_req\n{\n    /// Signaling code - 0x14\n    uint8_t  code;\n    /// Packet Identifier\n    uint8_t  pkt_id;\n    /// data length\n    uint16_t length;\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n    /// Source CID\n    uint16_t scid;\n    /// Maximum Transmission Unit\n    uint16_t mtu;\n    /// Maximum PDU Size\n    uint16_t mps;\n    /// Initial credits\n    uint16_t initial_credits;\n};\n\n/// LE Credit based connection response\nstruct l2cc_lecb_rsp\n{\n    /// Signaling code - 0x15\n    uint8_t  code;\n    /// Packet Identifier\n    uint8_t  pkt_id;\n    /// data length\n    uint16_t length;\n    /// Destination CID\n    uint16_t dcid;\n    /// Maximum Transmission Unit\n    uint16_t mtu;\n    /// Maximum PDU Size\n    uint16_t mps;\n    /// Initial credits\n    uint16_t initial_credits;\n    /// Result\n    uint16_t result;\n};\n\n/// LE Flow Control Credit\nstruct l2cc_le_flow_ctl_credit\n{\n    /// Signaling code - 0x16\n    uint8_t  code;\n    /// Packet Identifier\n    uint8_t  pkt_id;\n    /// data length\n    uint16_t length;\n    /// CID\n    uint16_t cid;\n    /// Credits\n    uint16_t credits;\n};\n\n/// Command Reject\nstruct l2cc_reject\n{\n    /// Signaling code - 0x01\n    uint8_t  code;\n    /// Packet Identifier\n    uint8_t  pkt_id;\n    /// data length\n    uint16_t length;\n    /// The Reason field describes why the Request packet was rejected\n    /// - 0x0000 Command not understood\n    /// - 0x0001 Signaling MTU exceeded\n    /// - 0x0002 Invalid CID in request\n    uint16_t reason;\n    /// Optional parameters total length\n    uint16_t opt_len;\n    ///16-byte array for optional parameters\n    uint8_t opt[__ARRAY_EMPTY];\n};\n\n\n/// Pairing Request\nstruct l2cc_pairing_req\n{\n    /// security code - 0x01\n    uint8_t     code;\n    /// IO Capability\n    uint8_t     iocap;\n    /// OOB data flag\n    uint8_t     oob;\n    /// AuthReq\n    uint8_t     auth;\n    /// Maximum Encryption Key Size\n    uint8_t     key_size;\n    /// Initiator Key Distribution\n    uint8_t     ikey_dist;\n    /// Responder Key Distribution\n    uint8_t     rkey_dist;\n};\n/// Pairing Response\nstruct l2cc_pairing_rsp\n{\n    /// security code - 0x02\n    uint8_t     code;\n    /// IO Capability\n    uint8_t     iocap;\n    /// OOB data flag\n    uint8_t     oob;\n    /// AuthReq\n    uint8_t     auth;\n    /// Maximum Encryption Key Size\n    uint8_t     key_size;\n    /// Initiator Key Distribution\n    uint8_t     ikey_dist;\n    /// Responder Key Distribution\n    uint8_t     rkey_dist;\n};\n/// Pairing Confirm\nstruct l2cc_pairing_cfm\n{\n    /// security code - 0x03\n    uint8_t     code;\n    ///Confirm value\n    uint8_t     cfm_val[CFM_LEN];\n};\n/// Pairing Random\nstruct l2cc_pairing_random\n{\n    /// security code - 0x04\n    uint8_t     code;\n    ///Random value\n    uint8_t     random[RAND_VAL_LEN];\n};\n/// Pairing Failed\nstruct l2cc_pairing_failed\n{\n    /// security code - 0x05\n    uint8_t     code;\n    /// The Reason field indicates why the pairing failed\n    uint8_t     reason;\n};\n/// Encryption Information\nstruct l2cc_encryption_inf\n{\n    /// security code - 0x06\n    uint8_t     code;\n    ///16-byte array for LTK value\n    uint8_t     ltk[GAP_KEY_LEN];\n};\n/// Master Identification\nstruct l2cc_master_id\n{\n    /// security code - 0x07\n    uint8_t     code;\n    /// key diversifier\n    uint16_t    ediv;\n    ///8-byte array for random number\n    uint8_t     nb[GAP_RAND_NB_LEN];\n};\n/// Identity Information\nstruct l2cc_identity_inf\n{\n    /// security code - 0x08\n    uint8_t     code;\n    ///16-byte array for IRK value\n    uint8_t     irk[GAP_KEY_LEN];\n};\n/// Identity Address Information\nstruct l2cc_id_addr_inf\n{\n    /// security code - 0x09\n    uint8_t     code;\n    /// BD Address Type\n    uint8_t     addr_type;\n    /// BD Address\n    bd_addr_t addr;\n};\n/// Signing Information\nstruct l2cc_signing_inf\n{\n    /// security code - 0x0A\n    uint8_t     code;\n    ///16-byte array for CSRK value\n    uint8_t     csrk[GAP_KEY_LEN];\n};\n/// Security Request\nstruct l2cc_security_req\n{\n    /// security code - 0x0B\n    uint8_t     code;\n    /// AuthReq\n    uint8_t     auth;\n};\n\n/// Public Key (x,y)\nstruct l2cc_publc_key\n{\n    /// security code - 0x0C\n    uint8_t     code;\n    /// X and Y co-ordinates of the Public Key\n    uint8_t x[GAP_P256_KEY_LEN];\n    uint8_t y[GAP_P256_KEY_LEN];\n};\n\n/// DH Key Check\nstruct l2cc_dhkey_check\n{\n    /// security code - 0x0D\n    uint8_t  code;\n    uint8_t check[DHKEY_CHECK_LEN];\n};\n/// Keypress Notification - PassKey method only\nstruct l2cc_keypress_noticication\n{\n    /// security code - 0x0E\n    uint8_t  code;\n\n    uint8_t notification_type;\n};\n\n\n/* Attribute protocol PDUs */\n\n/// Error response\nstruct l2cc_att_err_rsp\n{\n    /// Error Response - 0x01\n    uint8_t     code;\n    /// The request that generated this error response\n    uint8_t     op_code;\n    /// The attribute handle that generated this error response\n    uint16_t    handle;\n    ///The reason why the request has generated an error response\n    uint8_t     reason;\n};\n\n/// Exchange MTU Request\nstruct l2cc_att_mtu_req\n{\n    /// Exchange MTU Request - 0x02\n    uint8_t     code;\n    /// Client Rx MTU size\n    uint16_t    mtu_size;\n};\n\n/// Exchange MTU Response\nstruct l2cc_att_mtu_rsp\n{\n    /// Exchange MTU Response - 0x03\n    uint8_t     code;\n    /// Server Rx MTU size\n    uint16_t    mtu_size;\n};\n\n/// Find Information Request\nstruct l2cc_att_find_info_req\n{\n    /// Find Information Request - 0x04\n    uint8_t     code;\n    /// First requested handle number\n    uint16_t    shdl;\n    /// Last requested handle number\n    uint16_t    ehdl;\n};\n\n/// Find Information Response\nstruct l2cc_att_find_info_rsp\n{\n    /// Find Information Response - 0x05\n    uint8_t     code;\n    /// The format of the information data.\n    uint8_t     format;\n    /// Data length\n    uint16_t    data_len;\n    ///The information data whose format is determined by the Format field\n    uint8_t     data[__ARRAY_EMPTY];\n};\n\n/// Find By Type Value Request\nstruct l2cc_att_find_by_type_req\n{\n    /// Find By Type Value Request - 0x06\n    uint8_t     code;\n    /// First requested handle number\n    uint16_t    shdl;\n    /// Last requested handle number\n    uint16_t    ehdl;\n    /// 2 octet UUID to find\n    uint16_t    type;\n    /// Attribute value length\n    uint16_t    val_len;\n    /// Attribute value to find\n    uint8_t     val[__ARRAY_EMPTY];\n};\n\n/// Find By Type Value Response\nstruct l2cc_att_find_by_type_rsp\n{\n    /// Find By Type Value Response - 0x07\n    uint8_t     code;\n    /// data length\n    uint16_t    data_len;\n    /// A list of 1 or more Handle Informations.\n    uint8_t     data[__ARRAY_EMPTY];\n};\n\n/// Read By Type Request\nstruct l2cc_att_rd_by_type_req\n{\n    /// Read By Type Request - 0x08\n    uint8_t     code;\n    /// Starting Handle\n    uint16_t    shdl;\n    /// Ending Handle\n    uint16_t    ehdl;\n    /// Attribute uuid length\n    uint16_t    uuid_len;\n    /// Attribute type uuid\n    uint8_t     uuid[__ARRAY_EMPTY];\n};\n\n/// Read By Type Response\nstruct l2cc_att_rd_by_type_rsp\n{\n    /// Read By Type Response - 0x09\n    uint8_t     code;\n    /// size of each attribute handle listed\n    uint8_t     each_len;\n    /// Attribute Data length\n    uint16_t    data_len;\n    /// A list of Attribute Data.\n    uint8_t     data[__ARRAY_EMPTY];\n};\n\n/// Read Request\nstruct l2cc_att_rd_req\n{\n    /// Read Request - 0x0A\n    uint8_t     code;\n    /// Attribute Handle\n    uint16_t    handle;\n};\n\n/// Read Response\nstruct l2cc_att_rd_rsp\n{\n    /// Read Response - 0x0B\n    uint8_t    code;\n    /// value length\n    uint16_t   value_len;\n    /// The value of the attribute with the handle given\n    uint8_t    value[__ARRAY_EMPTY];\n};\n\n/// Read Blob Request\nstruct l2cc_att_rd_blob_req\n{\n    /// Read Blob Request - 0x0C\n    uint8_t     code;\n    /// Attribute Handle\n    uint16_t    handle;\n    /// The offset of the first octet to be read\n    uint16_t    offset;\n};\n\n/// Read Blob Response\nstruct l2cc_att_rd_blob_rsp\n{\n    /// Read Blob Response - 0x0D\n    uint8_t    code;\n    /// value length\n    uint16_t   value_len;\n    /// Part of the value of the attribute with the handle given\n    uint8_t    value[__ARRAY_EMPTY];\n};\n\n/// Read Multiple Request\nstruct l2cc_att_rd_mult_req\n{\n    /// Read Multiple Request - 0x0E\n    uint8_t     code;\n    /// Number of handles\n    uint16_t    nb_handles;\n    /// A set of two or more attribute handles.\n    uint16_t    handles[__ARRAY_EMPTY];\n};\n\n/// Read Multiple Response\nstruct l2cc_att_rd_mult_rsp\n{\n    /// Read Multiple Response - 0x0F\n    uint8_t    code;\n    /// value length\n    uint16_t   value_len;\n    /// A set of two or more values.\n    uint8_t    value[__ARRAY_EMPTY];\n};\n\n/// Read by Group Type Request\nstruct l2cc_att_rd_by_grp_type_req\n{\n    /// Read by Group Type Request - 0x10\n    uint8_t     code;\n    /// First requested handle number\n    uint16_t    shdl;\n    /// Last requested handle number\n    uint16_t    ehdl;\n    /// Attribute uuid length\n    uint16_t    uuid_len;\n    /// Attribute type uuid (2 or 16 octet UUID)\n    uint8_t     uuid[__ARRAY_EMPTY];\n};\n\n/// Read By Group Type Response\nstruct l2cc_att_rd_by_grp_type_rsp\n{\n    /// Read By Group Type Response - 0x11\n    uint8_t     code;\n    /// size of each attribute handle listed\n    uint8_t     each_len;\n    /// Attribute Data length\n    uint16_t    data_len;\n    /// A list of Attribute Data.\n    uint8_t     data[__ARRAY_EMPTY];\n};\n\n/// Write Request\nstruct l2cc_att_wr_req\n{\n    /// Write Request - 0x12\n    uint8_t     code;\n    /// The handle of the attribute to be written\n    uint16_t    handle;\n    /// Value length\n    uint16_t    value_len;\n    /// The value to be written to the attribute\n    uint8_t     value[__ARRAY_EMPTY];\n};\n\n/// Write Response\nstruct l2cc_att_wr_rsp\n{\n    /// Write Response - 0x13\n    uint8_t     code;\n};\n\n/// Write Command\nstruct l2cc_att_wr_cmd\n{\n    /// Write Command - 0x52\n    uint8_t     code;\n    /// The handle of the attribute to be written\n    uint16_t    handle;\n    /// Value length\n    uint16_t    value_len;\n    /// The value to be written to the attribute\n    uint8_t     value[__ARRAY_EMPTY];\n};\n\n/// Signed Write Command\nstruct l2cc_att_sign_wr_cmd\n{\n    /// Write Command - 0xD2\n    uint8_t     code;\n    /// The handle of the attribute to be written\n    uint16_t    handle;\n    /// Attribute Data length\n    uint16_t    value_len;\n    /// The value to be written to the attribute\n    /// + 12 bytes of signatures:\n    /// Authentication signature for the Attribute Upload, Attribute Handle and Attribute\n    /// Value Parameters\n    uint8_t     value[__ARRAY_EMPTY];\n};\n\n/// Prepare Write Request\nstruct l2cc_att_prep_wr_req\n{\n    /// Prepare Write Request - 0x16\n    uint8_t     code;\n    /// The handle of the attribute to be written\n    uint16_t    handle;\n    /// The offset of the first octet to be written\n    uint16_t    offset;\n    /// Value length\n    uint16_t    value_len;\n    /// The value to be written to the attribute\n    uint8_t     value[__ARRAY_EMPTY];\n};\n\n/// Prepare Write Response\nstruct l2cc_att_prep_wr_rsp\n{\n    /// Prepare Write Response - 0x17\n    uint8_t     code;\n    /// The handle of the attribute to be written\n    uint16_t    handle;\n    /// The offset of the first octet to be written\n    uint16_t    offset;\n    /// Value length\n    uint16_t    value_len;\n    /// The value to be written to the attribute\n    uint8_t     value[__ARRAY_EMPTY];\n};\n\n/// Execute Write Request\nstruct l2cc_att_exe_wr_req\n{\n    /// Execute Write Request - 0x18\n    uint8_t     code;\n    /// 0x00 - Cancel all prepared writes\n    /// 0x01 - Immediately write all pending prepared values\n    uint8_t    flags;\n};\n\n/// Execute Write Response\nstruct l2cc_att_exe_wr_rsp\n{\n    /// Prepare Write Response - 0x19\n    uint8_t     code;\n};\n\n/// Handle Value Notification\nstruct l2cc_att_hdl_val_ntf\n{\n    /// Handle Value Notification - 0x1B\n    uint8_t     code;\n    /// The handle of the attribute to be written\n    uint16_t    handle;\n    /// Value length\n    uint16_t    value_len;\n    /// The current value of the attribute\n    uint8_t     value[__ARRAY_EMPTY];\n};\n\n/// Handle Value Indication\nstruct l2cc_att_hdl_val_ind\n{\n    /// Handle Value Indication - 0x1D\n    uint8_t     code;\n    /// The handle of the attribute to be written\n    uint16_t    handle;\n    /// Value length\n    uint16_t    value_len;\n    /// The current value of the attribute\n    uint8_t     value[__ARRAY_EMPTY];\n};\n\n/// Handle Value Confirmation\nstruct l2cc_att_hdl_val_cfm\n{\n    /// Handle Value Confirmation - 0x1E\n    uint8_t     code;\n};\n\n/* LE Credit Based PDUs */\n\n/// LE Generic send data request  (includes total SDU Length)\nstruct l2cc_lecb_send_data_req\n{\n    /// Code variable (RFU)\n    uint8_t code;\n    /// SDU data length\n    uint16_t sdu_data_len;\n    /// Data\n    uint8_t sdu_data[__ARRAY_EMPTY];\n};\n\n\nstruct l2cc_pdu_data_t\n{\n    /// L2Cap packet code.\n    uint8_t code;\n};\n\n/// Default L2Cap PDU definition\nstruct l2cc_pdu\n{\n    /// L2Cap Payload Length\n    uint16_t payld_len;\n    /// L2Cap Channel ID\n    uint16_t chan_id;\n\n    /// Data PDU definition\n    union l2cc_pdu_data\n    {\n        /// L2Cap packet code.\n        uint8_t code;\n\n        /* LE Credit Based packets */\n        /// LE send first frame\n        struct l2cc_lecb_send_data_req send_lecb_data_req;\n\n        /* Connection Signaling Packets  */\n        /// Command Reject\n        struct l2cc_reject           reject;\n        /// Connection Parameter Update Request\n        struct l2cc_update_param_req update_req;\n        /// Connection Parameter Update Response\n        struct l2cc_update_param_rsp update_rsp;\n        /// LE Credit based connection request\n        struct l2cc_lecb_req credit_con_req;\n        /// LE Credit based connection response\n        struct l2cc_lecb_rsp credit_con_rsp;\n        /// LE Flow Control Credit\n        struct l2cc_le_flow_ctl_credit flow_ctl_credit;\n        /// LE disconnection request\n        struct l2cc_disconnection_req disc_req;\n        /// LE disconnection response\n        struct l2cc_disconnection_rsp disc_rsp;\n\n        /* Security manager PDUs */\n        /// Pairing Request\n        struct l2cc_pairing_req      pairing_req;\n        /// Pairing Response\n        struct l2cc_pairing_rsp      pairing_rsp;\n        /// Pairing Confirm\n        struct l2cc_pairing_cfm      pairing_cfm;\n        /// Pairing Random\n        struct l2cc_pairing_random   pairing_random;\n        /// Pairing Failed\n        struct l2cc_pairing_failed   pairing_failed;\n        /// Encryption Information\n        struct l2cc_encryption_inf   encryption_inf;\n        /// Master Identification\n        struct l2cc_master_id        master_id;\n        /// Identity Information\n        struct l2cc_identity_inf     identity_inf;\n        /// Identity Address Information\n        struct l2cc_id_addr_inf      id_addr_inf;\n        /// Signing Information\n        struct l2cc_signing_inf      signing_inf;\n        /// Security Request\n        struct l2cc_security_req     security_req;\n        /// Public Keys\n        struct l2cc_publc_key              public_key;\n        /// Key Press Notification\n        struct l2cc_keypress_noticication  keypress_noticication;\n        /// DH Key Check\n        struct l2cc_dhkey_check               dhkey_check;\n        /* Attribute protocol PDUs */\n        /// Error response\n        struct l2cc_att_err_rsp             err_rsp;\n        /// Exchange MTU Request\n        struct l2cc_att_mtu_req             mtu_req;\n        /// Exchange MTU Response\n        struct l2cc_att_mtu_rsp             mtu_rsp;\n        /// Find Information Request\n        struct l2cc_att_find_info_req       find_info_req;\n        /// Find Information Response\n        struct l2cc_att_find_info_rsp       find_info_rsp;\n        /// Find By Type Value Request\n        struct l2cc_att_find_by_type_req    find_by_type_req;\n        /// Find By Type Value Response\n        struct l2cc_att_find_by_type_rsp    find_by_type_rsp;\n        /// Read By Type Request\n        struct l2cc_att_rd_by_type_req      rd_by_type_req;\n        /// Read By Type Response\n        struct l2cc_att_rd_by_type_rsp      rd_by_type_rsp;\n        /// Read Request\n        struct l2cc_att_rd_req              rd_req;\n        /// Read Response\n        struct l2cc_att_rd_rsp              rd_rsp;\n        /// Read Blob Request\n        struct l2cc_att_rd_blob_req         rd_blob_req;\n        /// Read Blob Response\n        struct l2cc_att_rd_blob_rsp         rd_blob_rsp;\n        /// Read Multiple Request\n        struct l2cc_att_rd_mult_req         rd_mult_req;\n        /// Read Multiple Response\n        struct l2cc_att_rd_mult_rsp         rd_mult_rsp;\n        /// Read by Group Type Request\n        struct l2cc_att_rd_by_grp_type_req  rd_by_grp_type_req;\n        /// Read By Group Type Response\n        struct l2cc_att_rd_by_grp_type_rsp  rd_by_grp_type_rsp;\n        /// Write Request\n        struct l2cc_att_wr_req              wr_req;\n        /// Write Response\n        struct l2cc_att_wr_rsp              wr_rsp;\n        /// Write Command\n        struct l2cc_att_wr_cmd              wr_cmd;\n        /// Signed Write Command\n        struct l2cc_att_sign_wr_cmd         sign_wr_cmd;\n        /// Prepare Write Request\n        struct l2cc_att_prep_wr_req         prep_wr_req;\n        /// Prepare Write Response\n        struct l2cc_att_prep_wr_rsp         prep_wr_rsp;\n        /// Execute Write Request\n        struct l2cc_att_exe_wr_req          exe_wr_req;\n        /// Execute Write Response\n        struct l2cc_att_exe_wr_rsp          exe_wr_rsp;\n        /// Handle Value Notification\n        struct l2cc_att_hdl_val_ntf         hdl_val_ntf;\n        /// Handle Value Indication\n        struct l2cc_att_hdl_val_ind         hdl_val_ind;\n        /// Handle Value Confirmation\n        struct l2cc_att_hdl_val_cfm         hdl_val_cfm;\n    } data;\n};\n\n/// Default L2Cap DBG pdu definition\nstruct l2cc_dbg_pdu\n{\n    /// Data length\n    uint16_t length;\n    /// data\n    uint8_t data[__ARRAY_EMPTY];\n};\n\n/// Default L2Cap SDU definition\nstruct l2cc_sdu;\n\n\n/// @} L2CC_PDU\n\n\n#endif /* _L2CC_PDU_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/inc/l2cm.h",
    "content": "#ifndef L2CM_H_\n#define L2CM_H_\n\n/**\n ****************************************************************************************\n * @addtogroup L2C Logical Link Control and Adaptation Protocol\n * @ingroup HOST\n * @brief Logical Link Control and Adaptation Protocol - BLE Host.\n *\n * The L2C module is responsible for L2CAP provides connection-oriented\n * and connection-less data services to upper layer protocols with protocol\n * multiplexing capability and segmentation and re-assembly operation.\n *\n * @{\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @addtogroup L2CM L2CAP Manager\n * @ingroup L2C\n * @brief L2CAP block for signaling and resource management functions\n *\n * The L2CM is an internal L2CAP block responsible for managing\n * the signaling messages and propagation of connection and disconnection\n * related L2CAP messages within the Host.\n *\n * @{\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_L2CM)\n#include \n#include \n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Create and Initialize the L2CAP manager task.\n *\n * @param[in] reset   true if it's requested by a reset; false if it's boot initialization\n *\n ****************************************************************************************\n */\nvoid l2cm_init(bool reset);\n\n\n\n/**\n ****************************************************************************************\n * @brief Allocates an L2CAP resource.\n *\n * @param[in] conidx           connection index\n *\n ****************************************************************************************\n */\nvoid l2cm_create(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief De-initializes the L2CAP resources for specified link.\n *\n * @param[in] conidx           connection index\n *\n ****************************************************************************************\n */\nvoid l2cm_cleanup(uint8_t conidx);\n\n\n/**\n ****************************************************************************************\n * @brief Sets link layer buffer size capacity\n *\n * @param[in] pkt_len           length of the packet\n * @param[in] nb_acl            number of acl\n *\n ****************************************************************************************\n */\nvoid l2cm_set_link_layer_buff_size(uint16_t pkt_len, uint16_t nb_acl);\n\n/**\n ****************************************************************************************\n * @brief Retrieve number of low layer buffer available\n *\n * @return Number of low layer buffer available\n ****************************************************************************************\n */\nuint16_t l2cm_get_nb_buffer_available(void);\n\n/// @} L2CM\n\n#endif //(BLE_L2CM)\n\n#endif // L2CM_H_\n"
  },
  {
    "path": "services/ble_stack/hl/inc/prf.h",
    "content": "#ifndef _PRF_H_\n#define _PRF_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PROFILE PROFILES\n * @ingroup ROOT\n * @brief Bluetooth Low Energy Host Profiles\n *\n * The PROFILE of the stack contains the profile layers (@ref PROX \"PROXIMITY\",\n * @ref HTP \"HTP\",@ref FIND \"FIND ME\" @ref BPS \"Blood Pressure\").\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @addtogroup PRF\n * @ingroup PROFILE\n * @brief Definitions of Profile management API\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_PROFILES)\n\n#include \"ke_task.h\"\n#include \"gapm_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/**\n * Profile task fields\n *\n *  15   14   13   12   11   10   9    8    7    6    5    4    3    2    1    0\n * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n * | MI |                               TASK Number                                |\n * +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+\n *\n * Bit [0-14] : Task number value\n * Bit [15]   : Task is multi-instantiated (Connection index is conveyed)\n */\nenum prf_perm_mask\n{\n    /// Task number value\n    PERM_MASK_PRF_TASK      = 0x7FFF,\n    PERM_POS_PRF_TASK       = 0,\n    /// Task is multi-instantiated\n    PERM_MASK_PRF_MI        = 0x8000,\n    PERM_POS_PRF_MI         = 15,\n};\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Profile Environment Data\ntypedef struct prf_env\n{\n    /// Application Task Number - if MSB bit set, Multi-Instantiated task\n    ke_task_id_t app_task;\n    /// Profile Task  Number    - if MSB bit set, Multi-Instantiated task\n    ke_task_id_t prf_task;\n} prf_env_t;\n\n\n\n/// Profile task environment variable definition to dynamically allocate a Task.\nstruct prf_task_env\n{\n    /// Profile Task description\n    struct ke_task_desc desc;\n    /// pointer to the allocated memory used by profile during runtime.\n    prf_env_t*          env;\n    /// Profile Task Number\n    ke_task_id_t        task;\n    /// Profile Task Identifier\n    ke_task_id_t        id;\n};\n\n/**\n ****************************************************************************************\n * @brief Initialization of the Profile module.\n * This function performs all the initializations of the Profile module.\n *  - Creation of database (if it's a service)\n *  - Allocation of profile required memory\n *  - Initialization of task descriptor to register application\n *      - Task State array\n *      - Number of tasks\n *      - Default task handler\n *\n * @param[out]    env        Collector or Service allocated environment data.\n * @param[in|out] start_hdl  Service start handle (0 - dynamically allocated), only applies for services.\n * @param[in]     app_task   Application task number.\n * @param[in]     sec_lvl    Security level (AUTH, EKS and MI field of @see enum attm_value_perm_mask)\n * @param[in]     param      Configuration parameters of profile collector or service (32 bits aligned)\n *\n * @return status code to know if profile initialization succeed or not.\n ****************************************************************************************\n */\ntypedef uint8_t (*prf_init_fnct)    (struct prf_task_env* env, uint16_t* start_hdl, uint16_t app_task, uint8_t sec_lvl,  void* params);\n\n/**\n ****************************************************************************************\n * @brief Destruction of the Profile module - due to a reset for instance.\n * This function clean-up allocated memory (attribute database is destroyed by another\n * procedure)\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n ****************************************************************************************\n */\ntypedef void    (*prf_destroy_fnct) (struct prf_task_env* env);\n\n/**\n ****************************************************************************************\n * @brief Handles Connection creation\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n ****************************************************************************************\n */\ntypedef void    (*prf_create_fnct)  (struct prf_task_env* env, uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Handles Disconnection\n *\n * @param[in|out]    env        Collector or Service allocated environment data.\n * @param[in]        conidx     Connection index\n * @param[in]        reason     Detach reason\n ****************************************************************************************\n */\ntypedef void    (*prf_cleanup_fnct) (struct prf_task_env* env, uint8_t conidx, uint8_t reason);\n\n/// Profile task callbacks.\nstruct prf_task_cbs\n{\n    /// Initialization callback\n    prf_init_fnct    init;\n    /// Destroy profile callback\n    prf_destroy_fnct destroy;\n    /// Connection callback\n    prf_create_fnct  create;\n    /// Disconnection callback\n    prf_cleanup_fnct cleanup;\n};\n\n\n/// Profile Manager environment structure\nstruct prf_env_tag\n{\n    /// Array of profile tasks that can be managed by Profile manager.\n    struct prf_task_env prf[BLE_NB_PROFILES];\n};\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\nextern struct prf_env_tag prf_env;\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Perform Profile initialization\n *\n * @param[in] reset        Reset requested or basic initialization\n ****************************************************************************************\n */\nvoid prf_init(bool reset);\n\n\n/**\n ****************************************************************************************\n * @brief Create Profile (collector or service) task creation and initialize it.\n *\n * @param[in|out] params   Collector or Service parameter used for profile task creation\n * @param[out]    prf_task Allocated Task number\n *\n * @return status of adding profile task\n ****************************************************************************************\n */\nuint8_t prf_add_profile(struct gapm_profile_task_add_cmd * params, ke_task_id_t *prf_task);\n\n\n/**\n ****************************************************************************************\n * @brief Link creation event, update profiles states.\n *\n * @param[in] conidx        connection index\n *\n ****************************************************************************************\n */\nvoid prf_create(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Link disconnection event, clean-up profiles.\n *\n * @param[in] conidx        connection index\n * @param[in] reason        detach reason\n *\n ****************************************************************************************\n */\nvoid prf_cleanup(uint8_t conidx, uint8_t reason);\n\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve environment variable allocated for a profile\n *\n * @param[in] prf_id        Profile Task Identifier\n *\n * @return Environment variable allocated for a profile\n ****************************************************************************************\n */\nprf_env_t* prf_env_get(uint16_t prf_id);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve source profile task number value\n *\n * @param[in] env     Profile Environment\n * @param[in] conidx  Connection index\n *\n * @return Source profile task number value\n ****************************************************************************************\n */\nke_task_id_t prf_src_task_get(prf_env_t* env, uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Retrieve destination application task number value\n *\n * @param[in] env     Profile Environment\n * @param[in] conidx  Connection index\n *\n * @return Destination application task number value\n ****************************************************************************************\n */\nke_task_id_t prf_dst_task_get(prf_env_t* env, uint8_t conidx);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve Task Identifier from Task number\n * (automatically update index of task in returned task id)\n *\n * @param task Task number\n * @return Task Identifier\n ****************************************************************************************\n */\nke_task_id_t prf_get_id_from_task(ke_msg_id_t task);\n\n/**\n ****************************************************************************************\n * @brief Retrieve Task Number from Task Identifier\n * (automatically update index of task in returned task id)\n *\n * @param id Task Identifier\n * @return Task Number\n ****************************************************************************************\n */\nke_task_id_t prf_get_task_from_id(ke_msg_id_t id);\n\n#endif // (BLE_PROFILES)\n\n/// @} PRF\n\n#endif /* _PRF_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/inc/prf_utils.h",
    "content": "#ifndef _PRF_UTILS_H_\n#define _PRF_UTILS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PRF_UTILS\n * @ingroup PROFILE\n *\n * @brief Definitions of shared profiles functions that can be used by several profiles\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n#if (BLE_SERVER_PRF || BLE_CLIENT_PRF)\n#include \"ke_msg.h\"\n#include \"prf_types.h\"\n#include \"gattc_task.h\"\n#include \"gapc.h\"\n#include \"gapc_task.h\"\n#include \"attm.h\"\n#include \"prf.h\"\n#endif /* (BLE_SERVER_PRF || BLE_CLIENT_PRF) */\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Macro used to called the prf_client_get_env function.\n *\n * @param prf_id    Profile Task ID   (In Upper case, ex: HTPC, DISC, ...)\n * @param type      Profile task type (In lower case, ex: htpc, disc, ...)\n ****************************************************************************************\n */\n#define PRF_ENV_GET(prf_id, type) \\\n        ((struct type ## _env_tag *)prf_env_get((TASK_ID_##prf_id)))\n\n\n\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n#if (BLE_BATT_SERVER)\n/**\n ****************************************************************************************\n * @brief Pack Characteristic Presentation Format descriptor value\n ****************************************************************************************\n */\nvoid prf_pack_char_pres_fmt(uint8_t *packed_val, const struct prf_char_pres_fmt* char_pres_fmt);\n#endif // (BLE_BATT_SERVER)\n\n#if (BLE_BATT_CLIENT)\n/**\n ****************************************************************************************\n * @brief Unpack Characteristic Presentation Format descriptor value\n ****************************************************************************************\n */\nvoid prf_unpack_char_pres_fmt(const uint8_t *packed_val, struct prf_char_pres_fmt* char_pres_fmt);\n#endif // (BLE_BATT_CLIENT)\n\n#if (BLE_CLIENT_PRF)\n/**\n ****************************************************************************************\n * @brief Request  peer device to read an attribute\n *\n * @param[in] prf_env Pointer to profile information\n *\n * @param conidx   Connection index\n * @param shdl     Search Start Handle\n * @param ehdl     Search End Handle\n *\n * @param valhdl   Value Handle\n *\n * @note: if attribute is invalid, nothing is registered\n ****************************************************************************************\n */\nvoid prf_read_char_send(prf_env_t *prf_env, uint8_t conidx,\n                        uint16_t shdl, uint16_t ehdl, uint16_t valhdl);\n\n\n/**\n ****************************************************************************************\n * @brief register attribute handle in GATT\n *\n * @param[in] prf_env Pointer to profile information\n *\n * @param conidx   Connection index\n * @param svc   Service to register\n *\n * @note: if attribute is invalid, nothing is registered\n ****************************************************************************************\n */\nvoid prf_register_atthdl2gatt(prf_env_t *prf_env, uint8_t conidx, struct prf_svc *svc);\n\n/**\n ****************************************************************************************\n * @brief Unregister attribute handle in GATT\n *\n * @param[in] prf_env Pointer to profile information\n *\n * @param conidx   Connection index\n * @param svc   Service to register\n *\n * @note: if attribute is invalid, nothing is registered\n ****************************************************************************************\n */\nvoid prf_unregister_atthdl2gatt(prf_env_t *prf_env, uint8_t conidx, struct prf_svc *svc);\n\n/**\n ****************************************************************************************\n * @brief Request service discovery on peer device.\n *\n * This request will be used to retrieve start and end handles of the service.\n *\n * @param[in] prf_env Pointer to profile information\n *\n * @param conidx   Connection index\n * @param uuid     Service UUID\n ****************************************************************************************\n */\nvoid prf_disc_svc_send(prf_env_t *prf_env,uint8_t conidx,  uint16_t uuid);\n\n\n/**\n ****************************************************************************************\n * @brief Write peer characteristic using GATT.\n *\n * It will request write modification of peer handle\n *\n * @param[in] prf_env Pointer to profile information\n * @param[in] conidx   Connection index\n * @param[in] handle Peer handle to modify\n * @param[in] value  New Peer handle value\n * @param[in] length Value length\n ****************************************************************************************\n */\nvoid prf_gatt_write(prf_env_t *prf_env, uint8_t conidx,\n                    uint16_t handle, uint8_t* value, uint16_t length, uint8_t operation);\n\n/**\n ****************************************************************************************\n * @brief Modify peer client configuration descriptor using GATT\n *\n * It will request write modification of peer client configuration descriptor handle\n *\n * @param[in] prf_env Pointer to profile information\n *\n * @param[in] conidx   Connection index\n * @param[in] handle Peer client configuration descriptor handle to modify\n *\n * @param[in] ntf_ind_cfg  Indication/Notification configuration\n ****************************************************************************************\n */\nvoid prf_gatt_write_ntf_ind(prf_env_t *prf_env, uint8_t conidx, uint16_t handle,\n        uint16_t ntf_ind_cfg);\n\n/**\n ****************************************************************************************\n * @brief Check service characteristic validity\n *\n * For each characteristic in service it verifies handles.\n *\n * If some handles are not present, it checks if they shall be present or they are optional.\n *\n * @param nb_chars   Number of Characteristics in the service\n * @param chars      Characteristics values (char handles, val handles, properties)\n * @param chars_req  Characteristics requirements.\n *\n * @return 0x1 if service is valid, 0x00 else.\n ****************************************************************************************\n */\nuint8_t prf_check_svc_char_validity(uint8_t nb_chars,\n                                    const struct prf_char_inf* chars,\n                                    const struct prf_char_def* chars_req);\n\n/**\n ****************************************************************************************\n * @brief Check service characteristic descriptors validity\n *\n * For each characteristic descriptors in service it verifies handles.\n *\n * If some handles are not present, according to characteristic properties it verify if\n * descriptor is optional or not.\n *\n * @param descs_size Number of Characteristic descriptors in the service\n * @param descs      Characteristic descriptors values (handles)\n * @param descs_req  Characteristics descriptors requirements.\n *\n * @return 0x1 if service is valid, 0x00 else.\n ****************************************************************************************\n */\nuint8_t prf_check_svc_char_desc_validity(uint8_t descs_size,\n                                        const struct prf_char_desc_inf* descs,\n                                        const struct prf_char_desc_def* descs_req,\n                                        const struct prf_char_inf* chars);\n\n/**\n ****************************************************************************************\n * @brief Extract information of the service according to the service description\n *\n * @param param            Service information\n * @param nb_chars         Length of provided arrays (chars and chars_req)\n * @param chars_req        Characteristics requirements\n * @param chars            Characteristics\n * @param nb_descs         Length of provided arrays (descs and descs_req)\n * @param descs_req        Descriptors requirements\n * @param descs            Descriptors\n ****************************************************************************************\n */\nvoid prf_extract_svc_info(const struct gattc_sdp_svc_ind* param,\n        uint8_t nb_chars, const struct prf_char_def* chars_req, struct prf_char_inf* chars,\n        uint8_t nb_descs, const struct prf_char_desc_def* descs_req, struct prf_char_desc_inf* descs);\n\n#endif //(BLE_CLIENT_PRF)\n\n\n#if (BLE_CLIENT_PRF || BLE_TIP_SERVER || BLE_AN_SERVER || BLE_PAS_SERVER)\n\n/**\n ****************************************************************************************\n * @brief The function is used to send information about peer attribute value\n *\n * @param[in] prf_env       Pointer to the profile environment variable\n * @param[in] conidx        Connection index\n * @param[in] msg_id        Profile message ID to trigger\n * @param[in] status        Response status code\n * @param[in] read_ind      GATT read message indication\n ****************************************************************************************\n */\nvoid prf_client_att_info_rsp(prf_env_t *prf_env, uint8_t conidx, uint16_t msg_id,\n                             uint8_t status, struct gattc_read_ind const* read_ind);\n\n#endif //(BLE_CLIENT_PRF || BLE_TIP_SERVER || BLE_AN_SERVER || BLE_PAS_SERVER)\n\n#if (BLE_SERVER_PRF || BLE_CLIENT_PRF)\n/**\n ****************************************************************************************\n * @brief Pack date time value\n *\n * @param[out] packed_date packed date time\n * @param[in] date_time structure date time\n *\n * @return size of packed value\n ****************************************************************************************\n */\nuint8_t prf_pack_date_time(uint8_t *packed_date, const struct prf_date_time* date_time);\n\n/**\n ****************************************************************************************\n * @brief Unpack date time value\n *\n * @param[in] packed_date packed date time\n * @param[out] date_time structure date time\n *\n * @return size of packed value\n ****************************************************************************************\n */\nuint8_t prf_unpack_date_time(uint8_t *packed_date, struct prf_date_time* date_time);\n\n#endif /* (BLE_SERVER_PRF || BLE_CLIENT_PRF) */\n\n/// @} prf_utils\n\n#endif /* _PRF_UTILS_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/inc/prf_utils_128.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n\n#ifndef _PRF_UTILS_128_H_\n#define _PRF_UTILS_128_H_\n\n/**\n ****************************************************************************************\n * @addtogroup PRF_UTILS\n * @ingroup PROFILE\n *\n * @brief Definitions of shared profiles functions that can be used by several profiles\n *\n * @{\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#if (BLE_CLIENT_PRF)\n#include \"ke_msg.h\"\n#include \"prf.h\"\n#include \"prf_types.h\"\n#include \"gattc_task.h\"\n#include \"gapc.h\"\n#include \"gapc_task.h\"\n#include \"attm_db.h\"\n#endif /* (BLE_CLIENT_PRF) */\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n \n\n#if (BLE_CLIENT_PRF)\n\n/// Characteristic definition\nstruct prf_char_def_128\n{\n    /// Characteristic UUID\n    uint8_t uuid[ATT_UUID_128_LEN];\n    /// Requirement Attribute Flag\n    uint8_t req_flag;\n    /// Mandatory Properties\n    uint8_t prop_mand;\n};\n\n/**\n ****************************************************************************************\n * @brief Request service discovery with 128-bit UUID on peer device.\n *\n * This request will be used to retrieve start and end handles of the service.\n *\n * @param con_info Pointer to connection information (connection handle, app task id,\n *                 profile task id)\n *\n * @param uuid_128 128-bit service UUID\n ****************************************************************************************\n */\nvoid prf_disc_svc_send_128(prf_env_t *prf_env, uint8_t conidx, uint8_t *uuid_128);\n\n/**\n ****************************************************************************************\n * @brief Check validity for service characteristic with 128-bit UUID\n *\n * For each characteristic in service it verifies handles.\n *\n * If some handles are not present, it checks if they shall be present or they are optional.\n *\n * @param nb_chars   Number of Characteristics in the service\n * @param chars      Characteristics values (char handles, val handles, properties)\n * @param chars_req  Characteristics requirements.\n *\n * @return 0x1 if service is valid, 0x00 else.\n ****************************************************************************************\n */\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\nuint8_t prf_check_svc_char_validity_128(uint8_t nb_chars,\n                                    const struct prf_char_inf* chars,\n                                    const struct prf_char_def_128* chars_req);\n\nvoid prf_extract_svc_info_128(const struct gattc_sdp_svc_ind* param,\n        uint8_t nb_chars, const struct prf_char_def_128* chars_req, struct prf_char_inf* chars,\n        uint8_t nb_descs, const struct prf_char_desc_def* descs_req, struct prf_char_desc_inf* descs);\n\n#endif //(BLE_CLIENT_PRF)\n\n\n/// @} prf_utils\n\n#endif /* _PRF_UTILS_128_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/inc/smpc.h",
    "content": "#ifndef SMPC_H_\n#define SMPC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup SMP Security Manager Protocol\n * @ingroup HOST\n * @brief Security Manager Protocol.\n *\n * The SMP is responsible for the over-all security policies of BLE.\n * It defines methods for pairing and key distribution, handles encryption,\n * data signing and privacy features such as random addressing generation and resolution.\n *\n * Pairing is performed to exchange pairing features and generate a short term\n * key for link encryption.\n * A transport specific key distribution is performed to\n * share the keys that can be used to encrypt the link in the future\n * reconnection process, signed data verification and random address\n * resolution.\n *\n * There exist 3 phases in the complete security procedure:\n * 1. Feature exchange (IO capabilities, OOB flags, Authentication Requirements, Key distributions)\n * 2. Short Term Key generation\n *    Generation method depends on exchanged features:\n *     - Just Works - use Temporary key = 0\n *     - PassKey Entry - use Temporary Key = 6-digit provided by user\n *     - Out of Band (OOB) - use Temporary Key = 16-octet key, available form OOB source\n * 3. Transport Specific Key Distribution (TKDP)(LTK+EDIV+RAND_NB, IRK+ADDR, CSRK)\n *---------------------------------------------------------------------\n * @addtogroup SMPC Security Manager Protocol Controller\n * @ingroup SMP\n * @brief Security Manager Protocol Controller.\n *\n * This block handles control of SM procedures for several possible existing connections,\n * for which the security procedure may be conducted simultaneously.\n *\n * It allows flow control for HCI access to encryption and random number generation, used\n * at different moments in the procedure.\n *\n * It handles PDU creation and sending through L2CAP, also their reception from L2CAP\n * and interpretation.\n *\n * Other small utilities such as maximum key size determination and TKDP organization are\n * implemented in SMPC.\n * @{\n *\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_SMPC)\n#include \"co_bt.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"ke_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// MAC length\n#define SMPC_SIGN_MAC_LEN                       (8)\n/// SignCounter length\n#define SMPC_SIGN_COUNTER_LEN                   (4)\n/// Signature length\n#define SMPC_SIGN_LEN                           (SMPC_SIGN_MAC_LEN + SMPC_SIGN_COUNTER_LEN)\n\n/**\n * Repeated Attempts Timer Configuration\n */\n/// Repeated Attempts Timer default value (x10ms)\n#define SMPC_REP_ATTEMPTS_TIMER_DEF_VAL         (200)      //2s\n/// Repeated Attempts Timer max value (x10ms)\n#define SMPC_REP_ATTEMPTS_TIMER_MAX_VAL         (3000)     //30s\n/// Repeated Attempts Timer multiplier\n#define SMPC_REP_ATTEMPTS_TIMER_MULT            (2)\n\n/**\n * Timeout Timer Configuration\n */\n#define SMPC_TIMEOUT_TIMER_DURATION             (3000)     //30s\n\n#define SMPC_PUBLIC_KEY_256_COORD_LEN            0x20\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n/// Information source.\nenum smpc_addr_src\n{\n    /// Local info.\n    SMPC_INFO_LOCAL,\n    /// Peer info.\n    SMPC_INFO_PEER,\n    /// Maximum info source.\n    SMPC_INFO_MAX\n};\n\n/*\n * STRUCTURES DEFINITION\n ****************************************************************************************\n */\n\n/// Master ID Information Structure\nstruct smpc_mst_id_info\n{\n    // Encryption Diversifier\n    uint16_t ediv;\n\n    // Random Number\n    uint8_t randnb[GAP_RAND_NB_LEN];\n};\n\n#if (SECURE_CONNECTIONS)\nstruct smp_aes_cmac\n{\n    uint8_t* M; // pointer to memory allocated by calling function\n    uint8_t  M_len;\n    uint8_t  M_last[16];\n    uint8_t  X[16];\n    uint8_t  Y[16];\n    uint8_t*  K; //[16];\n    uint8_t  K1[16];\n    uint8_t  K2[16];\n    uint8_t  next_block;\n    uint8_t  num_blocks;\n    uint8_t  state;  // Only 3 States - Idle, SubKey Generation, Block AES\n};\n\nstruct smp_f4\n{\n    uint8_t M[65];\n    uint8_t X[16]; // The Key\n};\n\nstruct smp_f5\n{\n    uint8_t M[53];\n    uint8_t* W;\n    uint8_t T[16];\n    uint8_t SALT[16];\n};\n\n\nstruct smp_f6 \n{\n    uint8_t W[16];\n    uint8_t M[65];\n};\n\nstruct smp_g2\n{\n    uint8_t X[16];\n    uint8_t M[80];\n};\n\nstruct gapc_public_key\n{\n    uint8_t x[GAP_P256_KEY_LEN];\n    uint8_t y[GAP_P256_KEY_LEN];\n};\n\n#endif // (SECURE_CONNECTIONS)\n/// Pairing Information\nstruct smpc_pair_info\n{\n    /// TK during Phase 2, LTK or IRK during Phase 3\n    struct gap_sec_key key;\n    /// Pairing request command\n    struct gapc_pairing pair_req_feat;\n    /// Pairing response feature\n    struct gapc_pairing pair_rsp_feat;\n    /// Random number value\n    uint8_t rand[RAND_VAL_LEN];\n    /// Remote random number value\n    uint8_t rem_rand[RAND_VAL_LEN];\n    /// Confirm value to check\n    uint8_t conf_value[GAP_KEY_LEN];\n    /// Pairing Method\n    uint8_t pair_method;\n    /// Authentication level\n    uint8_t auth;\n    /// check that LTK exchanged during pairing\n    bool ltk_exchanged;\n    /// Key to be exchanged (transmitted or to be received)\n    uint8_t keys_dist;\n\n\n    #if (SECURE_CONNECTIONS)\n    // AES_CMAC Info\n    struct smp_aes_cmac* aes_cmac;\n    // Structure for Secure Connections Crypto functions\n    struct smp_f4*  f4_info;\n    struct smp_f5*  f5_info;\n    struct smp_f6*  f6_info;\n    struct smp_g2*  g2_info;\n\n    bool dh_key_calculation_complete;\n\n    uint8_t MacKey[GAP_KEY_LEN];\n    uint8_t dh_key_check_peer[DHKEY_CHECK_LEN];\n    uint8_t dh_key_local[DH_KEY_LEN];\n\n    uint8_t dh_key_check_local[DHKEY_CHECK_LEN];\n    bool dh_key_check_received_from_peer;\n\n    public_key_t peer_public_key;\n\n    uint8_t passkey_bit_count;\n    uint32_t passkey;\n\n    // Required for OOB\n    uint8_t peer_r[GAP_KEY_LEN];\n    uint8_t local_r[GAP_KEY_LEN];\n    bool peer_rand_received;\n    bool peer_confirm_received;\n    #endif // (SECURE_CONNECTIONS)\n};\n\n/// Signing Information\nstruct smpc_sign_info\n{\n    /// Operation requester task id\n    ke_task_id_t requester;\n\n    /// Message offset\n    uint16_t msg_offset;\n    /// Number of block\n    uint8_t block_nb;\n    /// Cn-1 value -> Need to kept this value to retrieve it after L generation\n    uint8_t cn1[GAP_KEY_LEN];\n};\n\n/// SMPC environment structure\nstruct smpc_env\n{\n    /// SMPC temporary information\n    union smpc_info\n    {\n        /**\n         * Pairing Information - This structure is allocated at the beginning of a pairing\n         * or procedure. It is freed when a disconnection occurs or at the end of\n         * the pairing procedure. If not enough memory can be found, the procedure will fail\n         *  with an \"Unspecified Reason\" error\n         */\n        struct smpc_pair_info *pair;\n\n        /**\n         * Signature Procedure Information - This structure is allocated at the beginning of a\n         * signing procedure. It is freed when a disconnection occurs or at the end of\n         * the signing procedure. If not enough memory can be found, the procedure will fail\n         *  with an \"Unspecified Reason\" error.\n         */\n        struct smpc_sign_info *sign;\n    } info;\n\n    /// CSRK values (Local and remote)\n    struct gap_sec_key csrk[SMPC_INFO_MAX];\n\n    /// signature counter values (Local and remote)\n    uint32_t sign_counter[SMPC_INFO_MAX];\n\n    /// Repeated Attempt Timer value\n    uint16_t rep_att_timer_val;\n\n    /// Encryption key size\n    uint8_t key_size;\n\n    /**\n     * Contains the current state of the two timers needed in the SMPC task\n     *      Bit 0 - Is Timeout Timer running\n     *      Bit 1 - Is Repeated Attempt Timer running\n     *      Bit 2 - Has task reached a SMP Timeout\n     */\n    uint8_t timer_state;\n\n    /// State of the current procedure\n    uint8_t state;\n\n    #if (SECURE_CONNECTIONS)\n    bool secure_connections_enabled;\n    #endif // (SECURE_CONNECTIONS)\n};\n\n/*\n * GLOBAL VARIABLES DEFINITION\n ****************************************************************************************\n */\n\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n#endif //(BLE_SMPC)\n#endif //SMPC_H_\n\n/// @} SMPC\n"
  },
  {
    "path": "services/ble_stack/hl/src/gap/gapc/gapc_int.h",
    "content": "#ifndef _GAPC_INT_H_\n#define _GAPC_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GAPC_INT Generic Access Profile Controller Internals\n * @ingroup GAPC\n * @brief Handles ALL Internal GAPC API\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"gapc.h\"\n#include \"gapc_task.h\"\n\n#if (BLE_GAPC)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/// Set link configuration field\n#define GAPC_SET_FIELD(conidx, field, value)\\\n    (gapc_env[conidx]->fields) = ((gapc_env[conidx]->fields) & (~GAPC_##field##_MASK)) \\\n                                     | (((value) << GAPC_##field) & (GAPC_##field##_MASK))\n\n\n/// Get link configuration field\n#define GAPC_GET_FIELD(conidx, field)\\\n    (((gapc_env[conidx]->fields) & (GAPC_##field##_MASK)) >> GAPC_##field)\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// number of GAP Controller Process\n#define GAPC_IDX_MAX                                 BLE_CONNECTION_MAX\n\n\n\n\n/// states of GAP Controller task\nenum gapc_state_id\n{\n    /// Connection ready state\n    GAPC_READY,\n\n    /// Link Operation on-going\n    GAPC_LINK_INFO_BUSY     = (1 << GAPC_OP_LINK_INFO),\n    /// SMP Operation  on-going\n    GAPC_SMP_BUSY           = (1 << GAPC_OP_SMP),\n    /// Update Operation  on-going\n    GAPC_LINK_UPD_BUSY      = (1 << GAPC_OP_LINK_UPD),\n    /// SMP start encryption on-going\n    GAPC_ENCRYPT_BUSY       = (1 << GAPC_OP_MAX),\n\n    /// Disconnection  on-going\n    GAPC_DISC_BUSY          = 0x1F,\n    /// Free state\n    GAPC_FREE               = 0X3F,\n\n    /// Number of defined states.\n    GAPC_STATE_MAX\n};\n\n\n\n/// fields definitions.\n/// Configuration fields:\n///    7    6    5    4    3    2    1    0\n/// +----+----+----+----+----+----+----+----+\n/// |RFU |SVCH|ROLE|LTK |ENC |BOND| SEC_LVL |\n/// +----+----+----+----+----+----+----+----+\nenum gapc_fields\n{\n    /// Link Security Level\n    GAPC_SEC_LVL          = 0,\n    GAPC_SEC_LVL_MASK     = 0x03,\n    /// Link Bonded or not\n    GAPC_BONDED           = 2,\n    GAPC_BONDED_MASK      = 0x04,\n    /// Encrypted connection or not\n    GAPC_ENCRYPTED        = 3,\n    GAPC_ENCRYPTED_MASK   = 0x08,\n    /// Ltk present and exchanged during pairing\n    GAPC_LTK_PRESENT       = 4,\n    GAPC_LTK_PRESENT_MASK  = 0x10,\n    /// Local connection role\n    GAPC_ROLE             = 5,\n    GAPC_ROLE_MASK        = 0x20,\n    /// Service Changed CCC configuration\n    GAPC_SVC_CHG_CCC      = 6,\n    GAPC_SVC_CHG_CCC_MASK = 0x40,\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\nextern struct gapc_env_tag* gapc_env[GAPC_IDX_MAX];\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialize Generic Access Profile Controller Module.\n *\n * @param[in] reset  true if it's requested by a reset; false if it's boot initialization\n *\n ****************************************************************************************\n */\nvoid gapc_init(bool reset);\n\n\n/**\n ****************************************************************************************\n * @brief A connection has been created, initialize Controller task.\n *\n * This function find first available task index available for new connection.\n * It triggers also connection event to task that has requested the connection.\n *\n * @param[in] msgid      Message id for normal or enhanced privacy\n * @param[in] con_params Connection parameters from lower layers\n * @param[in] requester  Task that request the connection to send indication(s)\n * @param[in] laddr      Local BD Address\n * @param[in] laddr_type Local BD Address Type (PUBLIC or RAND)\n *\n * @return Connection index allocated to the new connection.\n ****************************************************************************************\n */\nuint8_t gapc_con_create(ke_msg_id_t const msgid, struct hci_le_enh_con_cmp_evt const *con_params,\n                        ke_task_id_t requester, bd_addr_t* laddr, uint8_t laddr_type);\n\n/**\n ****************************************************************************************\n * @brief A connection has been disconnected, uninitialized Controller task.\n *\n * unregister connection, and destroy environment variable allocated for current connection.\n *\n * @param[in] conidx  Connection index\n *\n * @return Connection index of the connection.\n ****************************************************************************************\n */\nuint8_t gapc_con_cleanup(uint8_t conidx);\n\n\n/**\n ****************************************************************************************\n * @brief Send Disconnection indication to specific task\n *\n * @param[in] conidx  Connection index\n * @param[in] reason  Disconnection reason\n * @param[in] conhdl  Connection handle\n * @param[in] dest_id Message destination ID\n *\n ****************************************************************************************\n */\nvoid gapc_send_disconect_ind(uint8_t conidx,  uint8_t reason, uint8_t conhdl,\n                              ke_task_id_t dest_id);\n\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve connection CSRK information on current link.\n *\n * @param[in] conidx Connection index\n * @param[in] src    Connection information source\n *\n * @return Return found connection CSRK\n ****************************************************************************************\n */\nstruct gap_sec_key* gapc_get_csrk(uint8_t conidx, uint8_t src);\n\n/**\n ****************************************************************************************\n * @brief Return the sign counter value for the specified connection index.\n *\n * @param[in] conidx Connection index\n * @param[in] src    Connection information source\n *\n * @return the requested signCounter value\n ****************************************************************************************\n */\nuint32_t gapc_get_sign_counter(uint8_t conidx, uint8_t src);\n\n/**\n * @brief Send a complete event of ongoing executed operation to requester.\n * It also clean-up variable used for ongoing operation.\n *\n * @param[in] conidx Connection index\n * @param[in] op_type       Operation type.\n * @param[in] status Status of completed operation\n */\nvoid gapc_send_complete_evt(uint8_t conidx, uint8_t op_type, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send operation completed message with status error code not related to a\n * running operation.\n *\n * @param[in] conidx    Connection index\n * @param[in] operation Operation code\n * @param[in] requester requester of operation\n * @param[in] status    Error status code\n ****************************************************************************************\n */\nvoid gapc_send_error_evt(uint8_t conidx, uint8_t operation, const ke_task_id_t requester, uint8_t status);\n\n\n/**\n ****************************************************************************************\n * @brief Get operation on going\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return operation code on going\n ****************************************************************************************\n */\nuint8_t gapc_get_operation(uint8_t conidx, uint8_t op_type);\n\n/**\n ****************************************************************************************\n * @brief Get operation pointer\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return operation pointer on going\n ****************************************************************************************\n */\nvoid* gapc_get_operation_ptr(uint8_t conidx, uint8_t op_type);\n\n\n/**\n ****************************************************************************************\n * @brief Set operation pointer\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n * @param[in] op            Operation pointer.\n *\n ****************************************************************************************\n */\nvoid gapc_set_operation_ptr(uint8_t conidx, uint8_t op_type, void* op);\n\n/**\n ****************************************************************************************\n * @brief Operation execution not finish, request kernel to reschedule it in order to\n * continue its execution\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return if operation has been rescheduled (not done if operation pointer is null)\n ****************************************************************************************\n */\nbool gapc_reschedule_operation(uint8_t conidx, uint8_t op_type);\n\n/**\n ****************************************************************************************\n * @brief Get requester of on going operation\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return task that requests to execute the operation\n ****************************************************************************************\n */\nke_task_id_t gapc_get_requester(uint8_t conidx, uint8_t op_type);\n\n\n\n\n/**\n ****************************************************************************************\n * @brief Set the encryption key size of the connection\n *\n * @param[in] conidx Connection index\n * @param[in] key_size encryption key size (size is 7 - 16 byte range)\n *\n ****************************************************************************************\n */\nvoid gapc_enc_keysize_set(uint8_t conidx, uint8_t key_size);\n\n\n/**\n ****************************************************************************************\n * @brief Update link status, current link is now encrypted\n *\n * @param[in] conidx Connection index\n *\n ****************************************************************************************\n */\nvoid gapc_link_encrypted(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Update link authentication level\n *\n * @param[in] conidx      Connection index\n * @param[in] auth        Link authentication level\n * @param[in] ltk_present Link paired and an LTK has been exchanged\n *\n ****************************************************************************************\n */\nvoid gapc_auth_set(uint8_t conidx, uint8_t auth, bool ltk_present);\n\n/**\n ****************************************************************************************\n * @brief Retrieve link authentication level\n *\n * @param[in] conidx Connection index\n * @return Link authentication level\n ****************************************************************************************\n */\nuint8_t gapc_auth_get(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Update task state\n *\n * @param[in] conidx Connection index\n * @param[in] state to update\n * @param[in] set state to busy (true) or idle (false)\n *\n ****************************************************************************************\n */\nvoid gapc_update_state(uint8_t conidx, ke_state_t state, bool busy);\n\n\n/**\n ****************************************************************************************\n * @brief Checks connection parameters values\n *\n * @param[in] intv_max          maximum interval\n * @param[in] intv_min          minimum interval\n * @param[in] latency           latency\n * @param[in] timeout           timeout value\n *\n * @return true if OK, false if not OK\n ****************************************************************************************\n */\nbool gapc_param_update_sanity(uint16_t intv_max, uint16_t intv_min, uint16_t latency, uint16_t timeout);\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\nint gapc_process_op(uint8_t conidx, uint8_t op_type, void* op_msg, enum gapc_operation* supp_ops);\n\n\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n#endif // (BLE_GAPC)\n/// @} GAPC_INT\n\n#endif /* _GAPC_INT_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/src/gap/gapc/gapc_sig.h",
    "content": "#ifndef _GAPC_SIG_H_\n#define _GAPC_SIG_H_\n\n\n/**\n ****************************************************************************************\n * @addtogroup GAPC_SIG Generic Access Profile Controller Signaling PDU Handler.\n * @ingroup GAPC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_GAPC)\n#include \"l2cc_pdu.h\"\n\n\n#if (BLE_CENTRAL)\n/**\n ****************************************************************************************\n * @brief Sends parameter response\n *\n * @param[in] conidx        connection index\n * @param[in] result        response result\n * @param[in] pkt_id        Packet identifier\n ****************************************************************************************\n */\nvoid gapc_sig_send_param_resp(uint8_t conidx, uint16_t result, uint8_t pkt_id);\n#endif // (BLE_CENTRAL)\n\n/**\n ****************************************************************************************\n *  @brief Handles reception of L2CAP signaling messages from peer device.\n *\n * @param[in] conidx        Connection Index\n * @param[in] pdu           PDU Received\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nint gapc_sig_pdu_recv_handler(uint8_t conidx, struct l2cc_pdu *pdu);\n\n#endif // (BLE_GAPC)\n\n#endif // _GAPC_SIG_H_\n\n/// @} GAPC_SIG\n"
  },
  {
    "path": "services/ble_stack/hl/src/gap/gapm/gapm_int.h",
    "content": "#ifndef _GAPM_INT_H_\n#define _GAPM_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GAPM_INT Generic Access Profile Manager Internal\n * @ingroup GAPM\n * @brief defines for internal GAPM usage\n *\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"gapm.h\"\n#include \"gapm_task.h\"\n#if (BLE_DEPRECATED_API)\n#include \"gapc.h\"\n#endif //(BLE_DEPRECATED_API)\n#include \"co_bt.h\"\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Maximum number of GAP Manager process\n#define GAPM_IDX_MAX                                 BLE_CONNECTION_MAX\n\n/// Scan filter size\n#define GAPM_SCAN_FILTER_SIZE   10\n\n/// check if current role is supported by configuration\n#define GAPM_IS_ROLE_SUPPORTED(role_type)\\\n    ((gapm_env.role & (role_type)) == (role_type))\n\n/// Number of supported activities in host\n#define GAPM_ACTV_NB            (BLE_ACTIVITY_MAX)\n/// Maximum number of advertising report that can be reassembled in parallel\n#define GAPM_REPORT_NB_MAX      (5)\n/// Invalid activity identifier\n#define GAPM_ACTV_INVALID_IDX   (0xFF)\n\n/*\n * INTERNAL API TYPES\n ****************************************************************************************\n */\n\n\n/// Retrieve information about memory usage\nstruct gapm_dbg_get_mem_info_cmd\n{\n    /// GAPM requested operation:\n    ///  - GAPM_DBG_GET_MEM_INFO: Get memory usage\n    uint8_t operation;\n};\n\n/// Indication containing information about memory usage.\nstruct gapm_dbg_mem_info_ind\n{\n    /// peak of memory usage measured\n    uint32_t max_mem_used;\n    /// memory size currently used into each heaps.\n    uint16_t mem_used[KE_MEM_BLOCK_MAX];\n};\n\n\n/// Operation type\nenum gapm_op_type\n{\n    /// Configuration operation\n    GAPM_OP_CFG         = 0x00,\n\n    /// Air mode operation (scanning, advertising, connection establishment)\n    /// Note: Restriction, only one air operation supported.\n    GAPM_OP_AIR         = 0x01,\n    #if (SECURE_CONNECTIONS)\n    /// GAP State for DH Key Generation\n    GAPM_OP_DHKEY       = 0x02,\n    #endif // (SECURE_CONNECTIONS)\n    /// Max number of operations\n    GAPM_OP_MAX\n};\n\n/// GAPM states\nenum gapm_state_id\n{\n    /// Idle state - no on going operation\n    GAPM_IDLE,\n\n    /// Busy state - Configuration operation on going\n    GAPM_CFG_BUSY       = 1 << GAPM_OP_CFG,\n    /// Busy state - Air operation on going\n    GAPM_AIR_BUSY       = 1 << GAPM_OP_AIR,\n    #if (SECURE_CONNECTIONS)\n    /// Busy state - DH Key Calculation operation on going\n    GAPM_DHKEY_BUSY     = 1 << GAPM_OP_DHKEY,\n    #endif //  (SECURE_CONNECTIONS)\n\n    /// Reset state - Reset operation on going\n    GAPM_DEVICE_SETUP   = 1 << GAPM_OP_MAX,\n\n    GAPM_STATE_MAX\n};\n\n/// Device configuration flags\n///    7    6    5    4    3    2    1    0\n/// +-----+----+----+----+----+----+----+----+\n/// | DBG | SC | CP | GA | RE |CTLP|HSTP|ADDR|\n/// +-----+----+----+----+----+----+----+----+\n/// - Bit [0-2]: Address Type @see enum gapm_cfg_flag\n///             Bit 0: 0 = Public address, 1 = Private address\n///             Bit 1: 0 = Host-based Privacy disabled, 1 = enabled - DEPRECATED\n///             Bit 2: 0 = Controller-based Privacy disabled, 1 = enabled\n///\n/// - Bit [3]  : Address to renew (only if privacy is enabled, 1 address to renew else 0)\n/// - Bit [4]  : Generated Address type (1 = Resolvable, 0 = Non Resolvable)\n/// - Bit [5]  : Preferred Connection parameters present in GAP DB\n/// - Bit [6]  : Service Change feature present\n/// - Bit [7]  : Enable Debug mode\n/// Configuration flag bit description\nenum gapm_cfg_flag_def\n{\n    /// Address Type\n    GAPM_MASK_ADDR_TYPE           = 0x07,\n    GAPM_POS_ADDR_TYPE            = 0x00,\n    /// Address to renew\n    GAPM_MASK_ADDR_RENEW          = 0x08,\n    GAPM_POS_ADDR_RENEW           = 0x03,\n    /// Generated Address type\n    GAPM_MASK_RESOLV_ADDR         = 0x10,\n    GAPM_POS_RESOLV_ADDR          = 0x04,\n    /// Preferred Connection parameters present in GAP DB\n    GAPM_MASK_PREF_CON_PAR_PRES   = 0x20,\n    GAPM_POS_PREF_CON_PAR_PRES    = 0x05,\n    /// Service Change feature present\n    GAPM_MASK_SVC_CHG_EN          = 0x40,\n    GAPM_POS_SVC_CHG_EN           = 0x06,\n\n#if (RW_DEBUG)\n    /// L2CAP Debug Mode used to force LE-frames\n    GAPM_MASK_DBG_MODE_EN         = 0x80,\n    GAPM_POS_DBG_MODE_EN          = 0x07,\n#endif // (RW_DEBUG)\n};\n\n\n/// Security level\n///   7   6   5   4   3   2   1   0\n/// +---+---+---+---+---+---+---+---+\n/// |MI |      RFU      |EKS|SEC_LVL|\n/// +---+---+---+---+---+---+---+---+\n/// bit[0-1]: Security level requirement (0=NO_AUTH, 1=UNAUTH, 2=AUTH, 3=SEC_CON)\n/// bit[2]  : Encryption Key Size length must have 16 bytes\n/// bit[7]  : Multi-instantiated task\nenum  gapm_le_psm_sec_mask\n{\n    /// bit[0-1]: Security level requirement (0=NO_AUTH, 1=UNAUTH, 2=AUTH, 3=SEC_CON)\n    /// bit[2]  : Encryption Key Size length must have 16 bytes\n    GAPM_LE_PSM_SEC_LVL_MASK  = 0x07,\n    /// bit[7]  : Multi-instantiated task\n    GAPM_LE_PSM_MI_TASK_MASK  = 0x80,\n};\n\n/// Activity states\nenum gapm_actv_state\n{\n    /// Activity is being created - next state is CREATED\n    GAPM_ACTV_CREATING = 0,\n    /// Activity has been successfully created\n    GAPM_ACTV_CREATED,\n    /// Activity is being started - next state is STARTED\n    GAPM_ACTV_STARTING,\n    /// Activity has been successfully started\n    GAPM_ACTV_STARTED,\n    /// Activity is being stopped - next state is CREATED\n    GAPM_ACTV_STOPPING,\n    /// Activity is being deleted - no next state\n    GAPM_ACTV_DELETING,\n};\n\n/// Activity information bit field values\nenum gapm_actv_info\n{\n    /// Scanning activity has been started\n    GAPM_ACTV_INFO_SCAN_STARTED_BIT         = (1 << 0),\n    /// Initiating activity has been started\n    GAPM_ACTV_INFO_INIT_STARTED_BIT         = (2 << 0),\n};\n\n/// Connection role\nenum gapm_conn_role\n{\n    /// Master\n    GAPM_ROLE_MASTER = 0,\n    /// Slave\n    GAPM_ROLE_SLAVE,\n};\n\n/*\n * MACROS\n ****************************************************************************************\n */\n/// Macro used to retrieve field\n#define GAPM_F_GET(data, field)\\\n        (((data) & (GAPM_MASK_ ## field)) >> (GAPM_POS_ ## field))\n\n/// Macro used to set field\n#define GAPM_F_SET(data, field, val)\\\n    (data) = (((data) & ~(GAPM_MASK_ ## field)) \\\n           | ((val << (GAPM_POS_ ## field)) & (GAPM_MASK_ ## field)))\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Information about registered LE_PSM\nstruct gapm_le_psm_info\n{\n    /// List header structure to put information within a list\n    struct co_list_hdr hdr;\n\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n\n    /// Registered task identifier\n    ke_task_id_t task_id;\n\n    /// Security level\n    ///   7   6   5   4   3   2   1   0\n    /// +---+---+---+---+---+---+---+---+\n    /// |MI |      RFU      |EKS|SEC_LVL|\n    /// +---+---+---+---+---+---+---+---+\n    /// bit[0-1]: Security level requirement (0=NO_AUTH, 1=UNAUTH, 2=AUTH, 3=SEC_CON)\n    /// bit[2]  : Encryption Key Size length must have 16 bytes\n    /// bit[7]  : Multi-instantiated task\n    uint8_t sec_lvl;\n\n    /// Number of established link\n    uint8_t nb_est_lk;\n};\n\n/// GAP Manager activity structure (common part for advertising, scanning,\n/// initiating and periodic synchronization activities)\nstruct gapm_actv_tag\n{\n    /// Identifier\n    uint8_t idx;\n    /// Type (@see enum gap_actv_type)\n    uint8_t type;\n    /// Subtype - meaning depends on activity type\n    ///  - Advertising activity: @see enum gap_adv_subtype\n    ///  - Scanning activity: @see enum gap_scan_subtype\n    ///  - Initiating activity: @see enum gap_init_subtype\n    ///  - Periodic Synchronization activity: @see enum gap_period_sync_subtype\n    uint8_t subtype;\n    /// State (@see enum gapm_actv_state)\n    uint8_t state;\n    /// Information bit field, meaning depends on activity type\n    ///   - Bit 0-6: meaning depends on activity type\n    ///   - Bit 7: Random Address must be renewed\n    uint8_t info;\n    /// Own address type\n    uint8_t own_addr_type;\n    /// Next expected HCI event opcode\n    uint16_t next_exp_opcode;\n    /// ID for . This task will receive GAPM_ACTIVITY_STOPPED_IND message that might not\n    /// be trigger by application\n    ke_task_id_t requester;\n    /// BD Address used by the activity (can be different if controller privacy is used and\n    /// application chose to use a resolvable private address)\n    bd_addr_t addr;\n};\n\nstruct gapm_report_elem\n{\n    /// List Header\n    struct co_list_hdr list_hdr;\n    /// Report fragment information\n    struct ext_adv_report report_frag;\n};\n\nstruct gapm_report_list\n{\n    // List of received reports (@see struct gapm_report_elem)\n    struct co_list report_list;\n    // Advertiser address\n    struct gap_bdaddr adv_addr;\n    // Received length\n    uint16_t length;\n};\n\n/// GAP Manager activity structure for advertising activity\nstruct gapm_actv_adv_tag\n{\n    /// Common activity parameters\n    struct gapm_actv_tag common;\n    /// Data offset for the set advertising data procedure\n    uint16_t data_offset;\n    /// Advertising mode (@see enum gap_adv_disc_mode)\n    uint8_t mode;\n    /// Stored status\n    uint8_t kept_status;\n    /// Selected TX power\n    uint8_t tx_pwr;\n};\n\n/// GAP Manager activity structure for scanning activity\nstruct gapm_actv_scan_tag\n{\n    /// Common activity parameters\n    struct gapm_actv_tag common;\n    /// Lists used to reassemble report fragment\n    struct gapm_report_list report_lists[GAPM_REPORT_NB_MAX];\n    /// Scan filtering Array\n    struct gap_bdaddr *p_scan_filter;\n};\n\n/// GAP Manager activity structure for initiating activity\nstruct gapm_actv_init_tag\n{\n    /// Common activity parameters\n    struct gapm_actv_tag common;\n    /// Initiating parameters\n    struct gap_init_param init_param;\n    /// Number of connection to be established for automatic connection\n    ///    -> Number of devices in the white list when GAPM_ACTIVITY_START_CMD is received\n    uint8_t nb_auto_conn;\n    /// Stored status\n    uint8_t kept_status;\n};\n\n/// GAP Manager activity structure for periodic synchronization activity\nstruct gapm_actv_per_sync_tag\n{\n    /// Common activity parameters\n    struct gapm_actv_tag common;\n};\n\n/// GAP Manager environment structure\nstruct gapm_env_tag\n{\n    /// Request operation Kernel message\n    void* operation[GAPM_OP_MAX];\n\n    /// Array of pointers to the allocated activities\n    /// TODO [LT] IMPROVEMENT - Could be dynamically allocated based on read number of sets supported by controller\n    struct gapm_actv_tag *actvs[GAPM_ACTV_NB];\n\n    #if (BLE_DEPRECATED_API)\n    #if (BLE_OBSERVER)\n    /// Scan filtering Array\n    struct gap_bdaddr* scan_filter;\n    #endif // (BLE_OBSERVER)\n    #endif //(BLE_DEPRECATED_API)\n\n    #if (BLE_LECB)\n    /// Registered list of LE Protocol/Service Multiplexer for LE Credit Based Connection\n    struct co_list reg_le_psm;\n    #endif // (BLE_LECB)\n\n    #if (BLE_ATTS)\n    /// GAP service start handle\n    uint16_t svc_start_hdl;\n    #endif // (BLE_ATTS)\n\n    #if (BLE_BROADCASTER)\n    uint16_t max_adv_data_len;\n    #endif //(BLE_BROADCASTER)\n\n    /// Duration before regenerate device address when privacy is enabled.\n    uint16_t renew_dur;\n    /// Device IRK used for resolvable random BD address generation (MSB -> LSB)\n    struct gap_sec_key irk;\n\n    /// Current device Address\n    bd_addr_t addr;\n\tbd_addr_t connectedAddr[6];\n    /// Device Role\n    uint8_t role;\n    /// Number of BLE connection\n    uint8_t connections;\n    /// Device configuration flags - (@see enum gapm_cfg_flag_def)\n    uint8_t cfg_flags;\n    /// Pairing mode authorized (see enum gapm_pairing_mode)\n    uint8_t pairing_mode;\n    /// Maximum device MTU size\n    uint16_t max_mtu;\n    /// Maximum device MPS size\n    uint16_t max_mps;\n    #if (SECURE_CONNECTIONS)\n    /// Local device Public Key\n    public_key_t public_key;\n    private_key_t private_key;\n    private_key_t host_DHKey;\n\n    #endif // (SECURE_CONNECTIONS)\n\n    #if(BLE_AUDIO)\n    /// Audio configuration flag (see gapm_audio_cfg_flag)\n    uint16_t audio_cfg;\n    #endif // (BLE_AUDIO)\n\n    #if(BLE_EMB_PRESENT && HCI_TL_SUPPORT)\n    /// In Full mode, by default the AHI API is used, but if an HCI Reset is received,\n    /// TL is switched to HCI and embedded host is disabled\n    bool embedded_host;\n    #endif // (BLE_EMB_PRESENT && HCI_TL_SUPPORT)\n\n    #if (BLE_LECB)\n    /// Maximum number of allowed LE Credit Based channels\n    uint8_t max_nb_lecb;\n    /// Current number of LE Credit Based channel connections established\n    uint8_t nb_lecb;\n    #endif // (BLE_LECB)\n\n    #if (BLE_DEPRECATED_API)\n    /// Indicate if deprecated API must be used\n    bool use_deprecated_api;\n    #endif //(BLE_DEPRECATED_API)\n\n    #if (BLE_BROADCASTER)\n    /// Number of advertising sets supported by controller\n    uint8_t max_adv_set;\n    /// Number of created advertising activities\n    uint8_t nb_adv_actv;\n    #endif //(BLE_BROADCASTER)\n    #if (BLE_OBSERVER)\n    /// Bit field making management of activity easier (@see enum gapm_actv_info)\n    uint8_t actv_info;\n    #endif //(BLE_OBSERVER)\n    /// Activity identifier currently used for air operation\n    uint8_t actv_idx;\n    /// Number of created activities\n    uint8_t created_actvs;\n    /// Number of started activities\n    uint8_t started_actvs;\n    #if (BLE_OBSERVER)\n    /// Number of devices in the white list\n    uint8_t nb_dev_wl;\n    #endif //(BLE_OBSERVER)\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n/// GAP Manager environment variable.\nextern struct gapm_env_tag gapm_env;\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Initialize GAP attribute database\n *\n * @param[in] start_hdl Service Start Handle\n * @param[in] feat      Attribute database features\n *\n * @return status code of attribute database initialization\n *  - @ref ATT_ERR_NO_ERROR: If database creation succeeds.\n *  - @ref ATT_ERR_INVALID_HANDLE: If start_hdl given in parameter + nb of attribute override\n *                            some existing services handles.\n *  - @ref ATT_ERR_INSUFF_RESOURCE: There is not enough memory to allocate service buffer.\n *                           or of new attribute cannot be added because all expected\n *                           attributes already add\n ****************************************************************************************\n */\nuint8_t gapm_init_attr(uint16_t start_hdl, uint32_t feat);\n\nvoid gapm_send_raw_complete_evt(uint8_t op_type, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send operation completed message according to operation type.\n * Perform also am operation clean-up\n *\n * @param[in] op_type Operation type\n * @param[in] status  Command status\n *****************************************************************************************\n */\nvoid gapm_send_complete_evt(uint8_t op_type, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send operation completed message with status error code not related to a\n * running operation.\n *\n * @param[in] operation Operation code\n * @param[in] requester requester of operation\n * @param[in] status    Error status code\n ****************************************************************************************\n */\nvoid gapm_send_error_evt(uint8_t operation, const ke_task_id_t requester, uint8_t status);\n\n\n/**\n ****************************************************************************************\n * @brief Get operation pointer\n *\n * @param[in] op_type       Operation type.\n *\n * @return operation pointer on going\n ****************************************************************************************\n */\nstatic __INLINE void* gapm_get_operation_ptr(uint8_t op_type)\n{\n    ASSERT_ERR(op_type < GAPM_OP_MAX);\n    // return operation pointer\n    return gapm_env.operation[op_type];\n}\n\n\n/**\n ****************************************************************************************\n * @brief Set operation pointer\n *\n * @param[in] op_type       Operation type.\n * @param[in] op            Operation pointer.\n *\n ****************************************************************************************\n */\nstatic __INLINE void gapm_set_operation_ptr(uint8_t op_type, void* op)\n{\n    ASSERT_ERR(op_type < GAPM_OP_MAX);\n    // update operation pointer\n    gapm_env.operation[op_type] = op;\n}\n\n\n/**\n ****************************************************************************************\n * @brief Check if current operation can be processed or not.\n * if it can be proceed, initialize an operation request.\n * If a command complete event with error code can be triggered.\n *\n * Function returns how the message should be handled by message handler.\n *\n * @param[in] op_type       Operation type.\n * @param[in] op_msg        Requested operation message (note op_msg cannot be null)\n * @param[in] supp_ops      Supported operations array.\n *                          Latest array value shall be GAPM_NO_OP.\n *\n * @return operation can be executed if message status equals KE_MSG_NO_FREE,\n * else nothing to do, just exit from the handler.\n ****************************************************************************************\n */\nint gapm_process_op(uint8_t op_type, void* op_msg, enum gapm_operation* supp_ops);\n\n/**\n ****************************************************************************************\n * @brief Get operation on going\n *\n * @param[in] op_type       Operation type.\n *\n * @return operation code on going\n ****************************************************************************************\n */\nuint8_t gapm_get_operation(uint8_t op_type);\n\n/**\n ****************************************************************************************\n * @brief Get requester of on going operation\n *\n * @param[in] op_type       Operation type.\n *\n * @return task that requests to execute the operation\n ****************************************************************************************\n */\nke_task_id_t gapm_get_requester(uint8_t op_type);\n\n\n\n\n#if (BLE_GAPC)\n/**\n ****************************************************************************************\n * @brief A connection has been created, initialize host stack to be ready for connection.\n *\n * @param[in] msgid      Message id\n * @param[in] operation  Air operation type\n * @param[in] con_params Connection parameters from lower layers\n *\n * @return Connection index allocated to the new connection.\n ****************************************************************************************\n */\nuint8_t gapm_con_create(ke_msg_id_t const msgid, uint8_t operation, struct hci_le_enh_con_cmp_evt const *con_params);\n\n#endif // (BLE_GAPC)\n\n\n/**\n ****************************************************************************************\n * @brief Set the maximal MTU value\n *\n * @param[in] mtu   Max MTU value (Minimum is 23)\n ****************************************************************************************\n */\nvoid gapm_set_max_mtu(uint16_t mtu);\n\n/**\n ****************************************************************************************\n * @brief Set the maximal MPS value\n *\n * @param[in] mps   Max MPS value (Minimum is 23)\n ****************************************************************************************\n */\nvoid gapm_set_max_mps(uint16_t mps);\n\n/**\n ****************************************************************************************\n * @brief Checks validity of the address type\n *\n * @param[in] addr_type   Address type\n ****************************************************************************************\n */\nuint8_t gapm_addr_check( uint8_t addr_type);\n\n#if (BLE_DEPRECATED_API)\n/**\n ****************************************************************************************\n * @brief\n ****************************************************************************************\n */\nuint8_t gapm_privacy_cfg_check(uint8_t privacy_cfg);\n#endif //(BLE_DEPRECATED_API)\n\n/**\n ****************************************************************************************\n * @brief Checks validity of the Data Length Suggested values\n *\n * @param[in] sugg_oct   Suggested octets\n * @param[in] sugg_time  Suggested time\n ****************************************************************************************\n */\nuint8_t gapm_dle_val_check(uint16_t sugg_oct, uint16_t sugg_time);\n\n\n\n/**\n ****************************************************************************************\n * @brief Update task state\n *\n * @param[in] operation that modify the state\n * @param[in] set state to busy (true) or idle (false)\n *\n ****************************************************************************************\n */\nvoid gapm_update_state(uint8_t operation, bool busy);\n\n\n\n#if (BLE_LECB)\n\n\n/**\n ****************************************************************************************\n * @brief Find Information about LE_PSM registered in GAPM\n *\n * @param[in] le_psm    LE Protocol/Service Multiplexer\n *\n * @return Null if not found or LE_PSM info structure\n ****************************************************************************************\n */\nstruct gapm_le_psm_info* gapm_le_psm_find(uint16_t le_psm);\n\n\n/**\n ****************************************************************************************\n * @brief Remove all registered LE_PSM\n ****************************************************************************************\n */\nvoid gapm_le_psm_cleanup(void);\n#endif // (BLE_LECB)\n\n#if (BLE_DEPRECATED_API)\n/**\n ****************************************************************************************\n * Continue address update for air operation\n *\n * @param[in] opcode HCI event operation code\n * @param[in] status HCI command status\n ****************************************************************************************\n */\nvoid gapm_air_addr_update_cont(uint16_t opcode, uint8_t status);\n\nint gapm_cmp_evt_leg_air_handler(ke_msg_id_t const msgid, struct gapm_cmp_evt const *cmp_evt,\n                                 ke_task_id_t const dest_id, ke_task_id_t const src_id);\nint gapm_addr_renew_to_ind_leg_air_handler(ke_msg_id_t const msgid, void const *param,\n                   ke_task_id_t const dest_id, ke_task_id_t const src_id);\nint hci_le_enh_con_cmp_evt_leg_air_handler(uint16_t opcode, struct hci_le_enh_con_cmp_evt const *event);\nint gapc_cmp_evt_leg_air_handler(ke_msg_id_t const msgid, struct gapc_cmp_evt const *cmp_evt,\n                    ke_task_id_t const dest_id, ke_task_id_t const src_id);\nint gapc_peer_att_info_ind_leg_air_handler(ke_msg_id_t const msgid, struct gapc_peer_att_info_ind const *p_event,\n                                           ke_task_id_t const dest_id, ke_task_id_t const src_id);\n#endif //(BLE_DEPRECATED_API)\n\nvoid gapm_actv_init(bool reset);\nstruct gapm_actv_tag *gapm_actv_alloc(uint8_t actv_idx, uint8_t size);\nbool gapm_actv_retrieve_cmd_cmp_evt(struct gapm_actv_tag **pp_actv, uint16_t opcode);\nuint8_t gapm_actv_get_hci_own_addr_type(uint8_t app_addr_type);\nvoid gapm_actv_created(struct gapm_actv_tag *p_actv, uint8_t error);\nvoid gapm_actv_started(struct gapm_actv_tag *p_actv, uint8_t error);\nvoid gapm_actv_stopped(struct gapm_actv_tag *p_actv, uint8_t status);\nvoid gapm_actv_deleted(struct gapm_actv_tag *p_actv);\nvoid gapm_actv_send_gen_rand_addr(struct gapm_actv_tag *p_actv);\nvoid gapm_actv_addr_gen_ind(uint8_t *p_prand, uint8_t *p_hash);\nvoid gapm_actv_addr_set_ind(void);\n\nvoid gapm_adv_send_hci_le_set_adv_set_rand_addr_cmd(struct gapm_actv_tag *p_actv);\nuint8_t gapm_adv_create(uint8_t actv_idx, struct gapm_activity_create_adv_cmd *p_param);\nuint8_t gapm_adv_start(struct gapm_actv_tag *p_actv, struct gapm_activity_start_cmd *p_param);\nvoid gapm_adv_stop(struct gapm_actv_tag *p_actv);\nvoid gapm_adv_delete(struct gapm_actv_tag *p_actv);\n\nvoid gapm_scan_actv_clean(struct gapm_actv_tag *p_actv);\nuint8_t gapm_scan_create(uint8_t actv_idx, struct gapm_activity_create_cmd *p_param);\nuint8_t gapm_scan_start(struct gapm_actv_tag *p_actv, struct gapm_activity_start_cmd *p_param);\nvoid gapm_scan_stop(struct gapm_actv_tag *p_actv);\nvoid gapm_scan_delete(struct gapm_actv_tag *p_actv);\nvoid gapm_scan_addr_set_ind(struct gapm_actv_tag *p_actv);\n\nuint8_t gapm_init_create(uint8_t actv_idx, struct gapm_activity_create_cmd *p_param);\nuint8_t gapm_init_start(struct gapm_actv_tag *p_actv, struct gapm_activity_start_cmd *p_param);\nvoid gapm_init_stop(struct gapm_actv_tag *p_actv);\nvoid gapm_init_delete(struct gapm_actv_tag *p_actv);\nbool gapm_init_connection_ind(uint8_t conidx);\nvoid gapm_init_addr_set_ind(struct gapm_actv_tag *p_actv);\n\nuint8_t gapm_per_sync_create(uint8_t actv_idx, struct gapm_activity_create_cmd *p_param);\nuint8_t gapm_per_sync_start(struct gapm_actv_tag *p_actv, struct gapm_activity_start_cmd *p_param);\nvoid gapm_per_sync_stop(struct gapm_actv_tag *p_actv);\nvoid gapm_per_sync_delete(struct gapm_actv_tag *p_actv);\n\n/**\n ****************************************************************************************\n * @brief Sends a basic HCI command (with no parameter)\n *\n * @param[in] opcode       Command opcode\n ****************************************************************************************\n */\nvoid hci_basic_cmd_send_2_controller(uint16_t opcode);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n/// @} GAPM_INT\n\n#endif /* _GAPM_INT_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/src/gap/smp_common.h",
    "content": "/**\n ****************************************************************************************\n * @addtogroup SMP_COMMON\n * @ingroup SMP\n * @{\n ****************************************************************************************\n */\n\n#ifndef SMP_COMMON_H_\n#define SMP_COMMON_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#include        // Standard Boolean Definitions\n#include         // Standard Integer Definitions\n\n#include \"co_utils.h\"\n#include \"co_bt.h\"         // Common Bluetooth Definitions\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Mask applied to a Pairing Failed error triggered by us.\n#define SMP_PAIR_FAIL_REASON_MASK           (0x60)\n/// Mask applied to a Pairing Failed error triggered by the peer device.\n#define SMP_PAIR_FAIL_REASON_REM_MASK       (0x70)\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n/// Mask a Pairing Failed reason value with the provided mask.\n#define SMP_GEN_PAIR_FAIL_REASON(mask, reason)  (mask | reason)\n/// Extract the mask from a masked Pairing Failed reason value.\n#define SMP_GET_PAIR_FAIL_MASK(reason)          (0xF0 & reason)\n/// Extract the Pairing Failed reason value from a masked Pairing Failed reason value.\n#define SMP_GET_PAIR_FAIL_REASON(reason)        (0x0F & reason)\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n/**\n * SMP Pairing Failed Reasons\n */\nenum smp_pair_fail_reason\n{\n\n    /**\n     * Passkey Entry Failed (0x01)\n     * The user input of passkey failed, for example, the user cancelled the operation.\n     */\n    SMP_ERROR_PASSKEY_ENTRY_FAILED      = 0x01,\n    /**\n     * OOB Not Available (0x02)\n     * The OOB Data is not available.\n     */\n    SMP_ERROR_OOB_NOT_AVAILABLE,\n    /**\n     * Authentication Requirements (0x03)\n     * The pairing procedure cannot be performed as authentication requirements cannot be\n     * met due to IO capabilities of one or both devices.\n     */\n    SMP_ERROR_AUTH_REQ,\n    /**\n     * Confirm Value Failed (0x04)\n     * The confirm value does not match the calculated confirm value.\n     */\n    SMP_ERROR_CONF_VAL_FAILED,\n    /**\n     * Pairing Not Supported (0x05)\n     * Pairing is not supported by the device.\n     */\n    SMP_ERROR_PAIRING_NOT_SUPP,\n    /**\n     * Encryption Key Size (0x06)\n     * The resultant encryption key size is insufficient for the security requirements of\n     * this device.\n     */\n    SMP_ERROR_ENC_KEY_SIZE,\n    /**\n     * Command Not Supported (0x07)\n     * The SMP command received is not supported on this device.\n     */\n    SMP_ERROR_CMD_NOT_SUPPORTED,\n    /**\n     * Unspecified Reason (0x08)\n     * Pairing failed due to an unspecified reason.\n     */\n    SMP_ERROR_UNSPECIFIED_REASON,\n    /**\n     * Repeated Attempts (0x09)\n     * Pairing or Authentication procedure is disallowed because too little time has elapsed\n     * since last pairing request or security request.\n     */\n    SMP_ERROR_REPEATED_ATTEMPTS,\n    /**\n     * Invalid Parameters (0x0A)\n     * The command length is invalid or a parameter is outside of the specified range.\n     */\n    SMP_ERROR_INVALID_PARAM,\n    /**\n     * DHKey Check Failed (0x0B)\n     * Indicates to the remote device that the DHKey Check value received doesn't\n     * match the one calculated by the local device.\n     */\n    SMP_ERROR_DHKEY_CHECK_FAILED,\n    /**\n     * Numeric Comparison Failed (0x0C)\n     * Indicates that the confirm values in the numeric comparison protocol do not match.\n     */\n    SMP_ERROR_NUMERIC_COMPARISON_FAILED,\n    /**\n     * BR/EDR pairing in progress (0x0D)\n     * Indicates that the pairing over the LE transport failed due to a Pairing Request sent\n     * over the BR/EDR transport in process.\n     */\n    SMP_ERROR_BREDR_PAIRING_IN_PROGRESS,\n    /**\n     * Cross-transport Key Derivation/Generation not allowed (0x0E)\n     *\n     * Indicates that the BR/EDR Link Key generated on the BR/EDR transport cannot be\n     * used to derive and distribute keys for the LE transport.\n     */\n    SMP_ERROR_CROSS_TRANSPORT_KEY_GENERATION_NOT_ALLOWED,\n};\n\n\n/*\n * STRUCTURES\n ****************************************************************************************\n */\n\n\n#endif // (SMP_COMMON_H_)\n\n/// @} SMP_COMMON\n"
  },
  {
    "path": "services/ble_stack/hl/src/gap/smpc/smpc_api.h",
    "content": "#ifndef SMPC_API_H_\n#define SMPC_API_H_\n\n/**\n ****************************************************************************************\n * @addtogroup SMPC_API Task\n * @ingroup SMPC\n * @brief Provides a SMP API for controller tasks.\n *\n * The SMPC api is responsible for all security protocol and secure connections handling.\n *\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n\n#include \"rwip_config.h\"\n#if (BLE_SMPC)\n#include \"../smp_common.h\"\n#include \"gap.h\"\n#include \"gapc_task.h\"\n#include \"l2cc_pdu.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/// check if flag is set\n#define SMPC_IS_FLAG_SET(conidx, flag)        ((gapc_env[conidx]->smpc.timer_state & flag) == flag)\n\n#define SMPC_TIMER_SET_FLAG(conidx, flag)     (gapc_env[conidx]->smpc.timer_state |= flag)\n\n#define SMPC_TIMER_UNSET_FLAG(conidx, flag)   (gapc_env[conidx]->smpc.timer_state &= ~flag)\n\n\n/**\n * Timer State Masks\n */\n/// Timeout Timer\n#define SMPC_TIMER_TIMEOUT_FLAG                 (0x01)\n/// Repeated Attempts Timer\n#define SMPC_TIMER_REP_ATT_FLAG                 (SMPC_TIMER_TIMEOUT_FLAG << 1)\n/// Blocked because of SMP Timeout\n#define SMPC_TIMER_TIMEOUT_BLOCKED_FLAG         (SMPC_TIMER_REP_ATT_FLAG << 1)\n\n\n/// SMPC Internal State Code\nenum smpc_state\n{\n    SMPC_STATE_RESERVED     = 0x00,\n\n    /********************************************************\n     * Pairing Procedure\n     ********************************************************/\n\n    /**------------------------------------**\n     * Pairing Features Exchange Phase      *\n     **------------------------------------**/\n    /// Is waiting for the pairing response\n    SMPC_PAIRING_RSP_WAIT,\n    /// Is waiting for the pairing features\n    SMPC_PAIRING_FEAT_WAIT,\n\n    /**------------------------------------**\n     * Legacy (Pre BT 4.2 ) Authentication and Encryption Phase  *\n     **------------------------------------**/\n\n    /// Is waiting for the TK\n    SMPC_PAIRING_TK_WAIT,\n    /// Is waiting for the TK, peer confirm value has been received\n    SMPC_PAIRING_TK_WAIT_CONF_RCV,\n    /// Calculate the Random Number, part 1\n    SMPC_PAIRING_GEN_RAND_P1,\n    /// Calculate the Random Number, part 2\n    SMPC_PAIRING_GEN_RAND_P2,\n    /// The first part of the device's confirm value is being generated\n    SMPC_PAIRING_CFM_P1,\n    /// The device's confirm value is being generated\n    SMPC_PAIRING_CFM_P2,\n    /// The first part of the peer device's confirm value is being generated\n    SMPC_PAIRING_REM_CFM_P1,\n    /// The peer device's confirm value is being generated\n    SMPC_PAIRING_REM_CFM_P2,\n    /// The device is waiting for the confirm value generated by the peer device\n    SMPC_PAIRING_WAIT_CONFIRM,\n    /// The device is waiting for the random value generated by the peer device\n    SMPC_PAIRING_WAIT_RAND,\n    /// The STK is being generated\n    SMPC_PAIRING_GEN_STK,\n\n    #if (SECURE_CONNECTIONS)\n    /**------------------------------------**\n     * Secure Connections (BT 4.2 ) Authentication and Encryption Phase  *\n     **------------------------------------**/\n     SMPC_PAIRING_SC_W4_PEER_PUBLIC_KEY,\n\n     // Just Works and Numeric Comparison\n     //---------------------------------\n\n     // In Just Works/Numeric Comparison - this state is used while\n     // we are waiting for the LL to generate a Rand.\n     SMPC_PAIRING_SC_W4_LOCAL_RAND_N_P1,\n     SMPC_PAIRING_SC_W4_LOCAL_RAND_N_P2,\n     // Used in Slave during F4 while waiting for AES_CMAC\n     SMPC_PAIRING_SC_W4_F4_COMMITMENT_DETERMINATION,\n\n     // Used in Master to Wait for Peer Commitment Cb\n     SMPC_PAIRING_SC_W4_PEER_COMMITMENT,\n\n     // Used in Master/Slave to Wait for Random Number From peer.\n     SMPC_PAIRING_SC_W4_PEER_RAND,\n\n     // Used in Slave to wait for Random Number Na from Master\n    // SMPC_PAIRING_SC_W4_PAIRING_Na,\n\n     // Used in Master during F4 calculation for Commitment Check\n     SMPC_PAIRING_SC_W4_F4_COMMITMENT_CHECK,\n\n     // Numeric Comparison\n     // States specific to Secure Commenctions - numeric comparison\n\n     // Used in both Master/Slave to wait for the AES-CMAC calculation does to calculated the\n     // PassCode for the user.\n\n     SMPC_PAIRING_SC_W4_G2_AES_CMAC,\n\n     // Wait for the user to enter Accept/Reject for the Numeric Value\n     SMPC_PAIRING_SC_W4_NC_ACCEPT,\n     // Used in both Master/Slave while waiting for the user Pass Code Confirmation.\n\n     SMPC_PAIRING_SC_W4_USER_PASSCODE_CONFIRMATION,\n\n     //-----------------------------\n     // Secure Connections - Passkey\n     //-----------------------------\n\n    // Used in both Master/Slave while the user is entering the PassKey\n    SMPC_PAIRING_SC_PASSKEY_W4_PASSKEY_RAND,\n\n    // Used in both Master/Slave while Random numbers Nai,Nbi are being generated.\n    SMPC_PAIRING_SC_PASSKEY_W4_LOCAL_RAND_N_P1,\n\n    // Used in both Master/Slave while Random numbers Nai,Nbi are being generated.\n    SMPC_PAIRING_SC_PASSKEY_W4_LOCAL_RAND_N_P2,\n\n    // Used in both Master/Slave while waiting for the commitment value Cai,Cbi from the peer\n    SMPC_PAIRING_SC_PASSKEY_W4_PEER_COMMITMENT,\n\n    // Used in both Master/Slave while using AES_CMAC during F4 calculation of the commitment\n    SMPC_PAIRING_SC_PASSKEY_W4_F4_COMMITMENT_DETERMINATION,\n\n    // Used in both Master/Slave while waiting for the random number Nai,Nbi from the peer\n    SMPC_PAIRING_SC_PASSKEY_W4_PEER_RAND,\n\n    // Used in both Master/Slave while using AES_CMAC during F4 calculation for the commitment check\n    SMPC_PAIRING_SC_PASSKEY_W4_F4_COMMITMENT_CHECK,\n\n\n    // OOB\n    SMPC_PAIRING_SC_OOB_W4_LOCAL_RAND_N_P1,\n\n    SMPC_PAIRING_SC_OOB_W4_LOCAL_RAND_N_P2,\n\n    SMPC_PAIRING_SC_OOB_W4_LOCAL_RAND_R_P1,\n\n    SMPC_PAIRING_SC_OOB_W4_LOCAL_RAND_R_P2,\n\n    SMPC_PAIRING_SC_OOB_W4_F4_COMMITMENT_DETERMINATION,\n\n    SMPC_PAIRING_SC_OOB_W4_F4_COMMITMENT_CHECK,\n\n    SMPC_PAIRING_SC_OOB_W4_PEER_RAND,\n\n    // Wait for OOB data (A,Ca,Ra OR B,Cb,Rb) to be recieved from Peer.\n    SMPC_PAIRING_SC_OOB_W4_OOB_DATA,\n\n    // Secure Connections Authentication Phase 2\n\n    // Wait for the AES_CMACsalt to generate T\n    SMPC_PAIRING_SC_W4_F5_P1,\n\n    // Wait for the AES_CMAC to generate MACKEY\n    SMPC_PAIRING_SC_W4_F5_P2,\n\n    // Wait for the AES_CMAC to generate LTK\n    SMPC_PAIRING_SC_W4_F5_P3,\n\n    // Wait for the AES_CMAC to complete the DHKEY check\n    SMPC_PAIRING_SC_W4_F6_DHKEY_CHECK,\n\n    // Wait for DHkey_Check from the peer\n    SMPC_PAIRING_SC_W4_PEER_DHKEY_CHECK,\n\n    SMPC_PAIRING_SC_W4_F6_DHKEY_VERIFICATION,\n\n    SMPC_PAIRING_SC_W4_DHKEY_KEY_COMPLETE,\n\n    SMPC_PAIRING_SC_W4_ENCRYPTION_START,\n\n    SMPC_PAIRING_SC_W4_ENCRYPTION_CHANGE,\n\n    #endif //  (SECURE_CONNECTIONS)\n    /**------------------------------------**\n     * Transport Keys Distribution Phase    *\n     **------------------------------------**/\n\n    /// Default pairing remote waiting state\n    SMPC_PAIRING_APP_WAIT,\n    /// Is waiting for the LTK from application\n    SMPC_PAIRING_APP_LTK_WAIT,\n    /// Is waiting for the Identity Resolving Key from application\n    SMPC_PAIRING_APP_IRK_WAIT,\n    /// Is waiting for the CSRK from application\n    SMPC_PAIRING_APP_CSRK_WAIT,\n\n\n    /// Default pairing remote waiting state\n    SMPC_PAIRING_REM_WAIT,\n    /// Is waiting for the remote LTK\n    SMPC_PAIRING_REM_LTK_WAIT,\n    /// Is waiting for the remote EDIV and Rand Value\n    SMPC_PAIRING_REM_MST_ID_WAIT,\n    /// Is waiting for the remote IRK\n    SMPC_PAIRING_REM_IRK_WAIT,\n    /// Is waiting for the remote BD Address\n    SMPC_PAIRING_REM_BD_ADDR_WAIT,\n    /// Is waiting for the remote CSRK\n    SMPC_PAIRING_REM_CSRK_WAIT,\n\n    /********************************************************\n     * Signing Procedure\n     ********************************************************/\n    /// Generation of L\n    SMPC_SIGN_L_GEN,\n    /// Generation of Ci\n    SMPC_SIGN_Ci_GEN,\n\n    /********************************************************\n     * Encryption Procedure (STK or LTK)\n     ********************************************************/\n    /// Is waiting the change encryption event with LTK\n    SMPC_START_ENC_LTK,\n    /// Is waiting the change encryption event with STK\n    SMPC_START_ENC_STK\n};\n\n/*\n * FUNCTION DEFINITION\n ****************************************************************************************\n */\n\n#if (BLE_CENTRAL)\n/**\n ****************************************************************************************\n * @brief Handles pairing request from GAP, start the pairing procedure\n *\n * @param[in] idx     Connection Index\n * @param[in] pairing Pairing Information\n *\n * @return Status of Pairing start\n ****************************************************************************************\n */\nuint8_t smpc_pairing_start(uint8_t idx, struct gapc_pairing  *pairing);\n#endif // (BLE_CENTRAL)\n\n\n/**\n ****************************************************************************************\n * @brief Handles TK exchange part of pairing\n *\n * @param[in] idx     Connection Index\n * @param[in] accept  True if pairing is accepted, False else\n * @param[in] tk      The TK transmitted by application\n *\n * @return status of pairing\n ****************************************************************************************\n */\nuint8_t smpc_pairing_tk_exch(uint8_t idx, bool accept,  struct gap_sec_key *tk);\n\n/**\n ****************************************************************************************\n * @brief Handles LTK exchange part of pairing\n *\n * @param[in] idx     Connection Index\n * @param[in] ltk     The LTK transmitted by application\n *\n * @return status of pairing\n ****************************************************************************************\n */\nuint8_t smpc_pairing_ltk_exch(uint8_t idx, struct gapc_ltk* ltk);\n\n\n/**\n ****************************************************************************************\n * @brief Handles IRK exchange part of pairing\n *\n * @param[in] idx      Connection Index\n * @param[in] irk      The IRK transmitted by application\n * @param[in] identity Device identity address\n *\n * @return status of pairing\n ****************************************************************************************\n */\nuint8_t smpc_pairing_irk_exch(uint8_t idx, struct gap_sec_key* irk, struct gap_bdaddr *identity);\n\n/**\n ****************************************************************************************\n * @brief Handles CSRK exchange part of pairing\n *\n * @param[in] idx     Connection Index\n * @param[in] csrk    The CSRK transmitted by application\n *\n * @return status of pairing\n ****************************************************************************************\n */\nuint8_t smpc_pairing_csrk_exch(uint8_t idx, struct gap_sec_key *csrk);\n\n#if (SECURE_CONNECTIONS)\n/**\n ****************************************************************************************\n * @brief Handles OOB exchange part of pairing\n *\n * @param[in] idx     Connection Index\n * @param[in] accept  Accept or Reject the OOB (reject if OOB reception not available on the device)\n * @param[in] csrk    The OOB Confirm and OOB Rand from the peer\n *\n * @return status of pairing\n ****************************************************************************************\n */\n\nuint8_t smpc_pairing_oob_exch(uint8_t idx, bool accept, struct gapc_oob *oob);\n\n/**\n ****************************************************************************************\n * @brief Handles Numeric Value Acceptance as part of pairing\n *\n * @param[in] idx     Connection Index\n * @param[in] accept  Accept or Reject the numeric comparison\n *\n * @return status of pairing\n ****************************************************************************************\n */\n\nuint8_t smpc_pairing_nc_exch(uint8_t idx,uint8_t accept );\n\n#endif //  (SECURE_CONNECTIONS)\n/**\n ****************************************************************************************\n * @brief Handles reception of pairing response information\n *\n * @param[in] idx     Connection Index\n * @param[in] accept  True if pairing is accepted, False else\n * @param[in] feat    Pairing response feature information\n *\n * @return status of pairing\n ****************************************************************************************\n */\nuint8_t smpc_pairing_rsp(uint8_t idx, bool accept, struct gapc_pairing *feat);\n\n\n#if (BLE_PERIPHERAL)\n\n/**\n ****************************************************************************************\n * @brief Handles reception of pairing request information\n *\n * @param[in] idx     Connection Index\n * @param[in] feat    Pairing request feature information\n ****************************************************************************************\n */\nvoid smpc_pairing_req_handler(uint8_t idx, struct gapc_pairing *feat);\n\n/**\n ****************************************************************************************\n * @brief Handles request to send a security request to peer device\n *\n * @param[in] idx     Connection Index\n * @param[in] auth    Requested Authentication Level\n *\n * @return status of the request\n ****************************************************************************************\n */\nuint8_t smpc_security_req_send(uint8_t idx, uint8_t auth);\n#endif // (BLE_PERIPHERAL)\n\n\n#if (BLE_CENTRAL)\n/**\n ****************************************************************************************\n * @brief Master requests to start encryption\n *\n * @param[in] idx     Connection Index\n * @param[in] ltk     LTK information\n *\n * @return status of the request\n ****************************************************************************************\n */\nuint8_t smpc_encrypt_start(uint8_t idx, struct gapc_ltk *ltk);\n#endif //(BLE_CENTRAL)\n\n\n#if (BLE_PERIPHERAL)\n\n/**\n ****************************************************************************************\n * @brief Handles reception of encryption request\n *\n * @param[in] idx     Connection Index\n * @param[in] ltk     LTK to search information\n ****************************************************************************************\n */\nvoid smpc_encrypt_start_handler(uint8_t idx, struct gapc_ltk *ltk);\n\n/**\n ****************************************************************************************\n * @brief Slave respond to peer device encryption request\n *\n * @param[in] idx      Connection Index\n * @param[in] accept   Accept or not to start encryption\n * @param[in] ltk      LTK information\n * @param[in] key_size Encryption key size\n ****************************************************************************************\n */\nvoid smpc_encrypt_cfm(uint8_t idx, bool accept, struct gap_sec_key *ltk, uint8_t key_size);\n#endif //(BLE_PERIPHERAL)\n\n\n/**\n ****************************************************************************************\n * @brief Request to sign an attribute packet or check signature\n *\n * @param[in] idx      Connection Index\n * @param[in] param    ATT packet information\n *\n * @return status of signature request\n ****************************************************************************************\n */\nuint8_t smpc_sign_command(uint8_t idx, struct gapc_sign_cmd *param);\n\n\n/**\n ****************************************************************************************\n * @brief Continue signature generation or check of an attribute packet after an AES.\n *\n * @param[in] idx      Connection Index\n * @param[in] aes_res  Result of AES calculation\n ****************************************************************************************\n */\nvoid smpc_sign_cont(uint8_t idx, uint8_t* aes_res);\n\n/**\n ****************************************************************************************\n * @brief Continue generation of rand number for confirm value.\n *\n * @param[in] idx      Connection Index\n * @param[in] randnb   Generated Random Number\n ****************************************************************************************\n */\nvoid smpc_confirm_gen_rand(uint8_t idx, rand_nb_t* randnb);\n\n/**\n ****************************************************************************************\n * @brief Continue Calculation of Confirm Value or STK after AES.\n *\n * @param[in] idx      Connection Index\n * @param[in] aes_res  Result of AES calculation\n ****************************************************************************************\n */\nvoid smpc_calc_confirm_cont(uint8_t idx, uint8_t* aes_res);\n\n/**\n ****************************************************************************************\n * @brief Send an KeyPress Notification Event to the Host\n *\n * @param[in] idx      Connection Index\n * @param[in] keypress KeyPress Type\n ****************************************************************************************\n */\nvoid smpc_key_press_notification_ind(uint8_t idx, uint8_t keypress);\n\n/**\n ****************************************************************************************\n * @brief Stop the timer used to detect a SMP Timeout\n *\n * @param[in] conidx        Connection Index\n ****************************************************************************************\n */\nvoid smpc_clear_timeout_timer(uint8_t conidx);\n\n\n/**\n ****************************************************************************************\n * @brief Handle reception of a SMP PDU sent by the peer device.\n *\n * @param[in] conidx        Connection Index\n * @param[in] pdu           Unpacked PDU\n ****************************************************************************************\n */\nvoid smpc_pdu_recv(uint8_t conidx, struct l2cc_pdu *pdu);\n\n/**\n ****************************************************************************************\n * @brief Send a SMP PDU to the peer device\n *\n * @param[in] conidx        Connection Index\n * @param[in] cmd_code      Code of the PDU to send\n * @param[in] value         Unpacked value\n ****************************************************************************************\n */\nvoid smpc_pdu_send(uint8_t conidx, uint8_t cmd_code, void *value);\n\n\n/**\n ****************************************************************************************\n * @brief Inform the HL that the pairing procedure currently in progress is over.\n *\n * @param[in] conidx          Connection Index\n * @param[in] role            Current role of the device\n * @param[in] status          Status\n * @param[in] start_ra_timer  Indicate if the repeated attempts timer shall be started in\n *                            the case of a pairing failed.\n ****************************************************************************************\n */\nvoid smpc_pairing_end(uint8_t conidx, uint8_t role, uint8_t status, bool start_ra_timer);\n\n\n/**\n ****************************************************************************************\n * @brief Handle reception of a DH Key from HCI\n *\n * @param[in] conidx        Connection Index\n * @param[in] status        Indicates if HCI request Succeeded or Failed\n * @param[in] dh_key        Diffie Helman Key - 32 Bytes\n ****************************************************************************************\n */\nvoid smpc_handle_dh_key_check_complete(uint8_t conidx,const uint8_t* dh_key);\n\n#endif // (BLE_SMPC)\n#endif //(SMPC_API_H_)\n\n/// @} SMPC_API\n"
  },
  {
    "path": "services/ble_stack/hl/src/gap/smpc/smpc_crypto.h",
    "content": "#ifndef SMPC_CRYPTO_H_\n#define SMPC_CRYPTO_H_\n\n#include \"rwip_config.h\"\n#if (SECURE_CONNECTIONS)\n#include \"../smp_common.h\"\n\n/**\n ****************************************************************************************\n * @brief Initiates the F4 crypto function\n *\n * @param[in] conidx   connection identifier\n * @param[in] U        pointer to array of bytes (see spec)\n * @param[in] V        pointer to array of bytes (see spec)\n * @param[in] X        pointer to array of bytes (see spec)\n * @param[in] Z        single byte value (see spec)\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_f4_Init(uint8_t conidx,uint8_t* U,uint8_t* V,uint8_t* X,uint8_t Z);\n\n\n/**\n ****************************************************************************************\n * @brief Cleans up after the F4 crypto function, freeing any memory which had been allocated\n *\n * @param[in] conidx   connection identifier\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_f4_complete(uint8_t conidx);\n\n\n/**\n ****************************************************************************************\n * @brief  Initiates the G2 crypto function\n *\n * @param[in] conidx   connection identifier\n * @param[in] U        pointer to array of bytes (see spec)\n * @param[in] V        pointer to array of bytes (see spec)\n * @param[in] X        pointer to array of bytes (see spec)\n * @param[in] Y        pointer to array of bytes (see spec)\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_g2_init(uint8_t conidx, uint8_t* U, uint8_t* V, uint8_t* X, uint8_t* Y);\n\n/**\n ****************************************************************************************\n * @brief Cleans up after the G2 crypto function, freeing any memory which had been allocated\n *\n * @param[in] conidx   connection identifier\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_g2_complete(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief  Initiates the F5 crypto function\n *\n * @param[in] conidx   connection identifier\n * @param[in] W        pointer to the DH Key\n * @param[in] N1       pointer to 16 byte random number\n * @param[in] N2       pointer to 16 byte random number\n * @param[in] A1       pointer to array representing address of device\n * @param[in] A2       pointer to array representing address of device\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_f5_init(uint8_t conidx, uint8_t* W,uint8_t* N1,uint8_t* N2,uint8_t* A1,uint8_t* A2);\n\n/**\n ****************************************************************************************\n * @brief Cleans up after the F5 crypto function, freeing any memory which had been allocated\n *\n * @param[in] conidx   connection identifier\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_f5_complete(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief  Initiates the F6 crypto function\n *\n * @param[in] conidx   connection identifier\n * @param[in] W        pointer to Mac Key\n * @param[in] N1       pointer to 16 byte random number\n * @param[in] N2       pointer to 16 byte random number\n * @param[in] R        pointer to array of bytes (see spec)\n * @param[in] IoCap    pointer to array representing IO capabilities of device\n * @param[in] A1       pointer to array representing address of device\n * @param[in] A2       pointer to array representing address of device\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_f6_init(uint8_t conidx,uint8_t* W, uint8_t* N1, uint8_t* N2, uint8_t* R, uint8_t* IOcap, uint8_t* A1, uint8_t* A2);\n\n/**\n ****************************************************************************************\n * @brief Cleans up after the F6 crypto function, freeing any memory which had been allocated\n *\n * @param[in] conidx   connection identifier\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_f6_complete(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Initiates the AES CMAC crypto function. Allocate memory for the CMAC and\n *        begins the subkey generation\n *\n * @param[in] conidx   connection identifier\n * @param[in] K        pointer to the Key to be used\n * @param[in] M        pointer to the block of data the data on which the CMAC is performed\n * @param[in] M_len    length (in bytes) of the block of data M\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_aes_cmac_init(uint8_t conidx,uint8_t* K,uint8_t* M,uint8_t M_len);\n\n/**\n ****************************************************************************************\n * @brief Continues subsequent stages of the AES CMAC crypto function\n *\n * @param[in] conidx   connection identifier\n * @param[in] aes_res  point to the result of the previous stage of the AES CMAC\n *\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_aes_cmac_continue(uint8_t conIdx,uint8_t* aes_res);\n\n/**\n ****************************************************************************************\n * @brief The final stage of the AES CMAC crypto function\n *\n * @param[in] conidx   connection identifier\n * @param[in] aes_res  point to the result of the previous stage of the AES CMAC\n *\n * @return none.\n ****************************************************************************************\n */\nvoid smpc_aes_cmac_complete(uint8_t conIdx,uint8_t* aes_res);\n\n/**\n ****************************************************************************************\n * @brief Process the next stage of the AES CMAC (wrapping smpc_aes_cmac_continue(..) and\n *        smpc_aes_cmac_complete(..)\n *\n * @param[in] conidx   connection identifier\n * @param[in] aes_res  point to the result of the previous stage of the AES CMAC\n *\n * @returns boolean    Indicate if the AES CMAC is complete\n ****************************************************************************************\n */\n\nbool smpc_process_aes_cmac(uint8_t idx,uint8_t* aes_res);\n#endif // (SECURE_CONNECTIONS)\n\n\n#endif /* SMPC_CRYPTO_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/src/gap/smpc/smpc_int.h",
    "content": "#ifndef SMPC_INT_H_\n#define SMPC_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup SMP_INT Security Manager Protocol Internal\n * @ingroup HOST\n * @brief Security Manager Protocol Internals.\n * @{\n *\n ****************************************************************************************\n */\n\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_SMPC)\n#include \"smpc.h\"\n\n#include \"../smp_common.h\"\n\n#include \n#include \n\n#include \"co_bt.h\"\n#include \"gap.h\"\n\n#include \"smpc_api.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Minimum Encryption key size\n#define SMPC_MIN_ENC_SIZE_LEN                   (7)\n/// Maximum Encryption Key size\n#define SMPC_MAX_ENC_SIZE_LEN                   (16)\n\n\n/// Pairing Request and Pairing Response PDU Length\n#define SMPC_CODE_PAIRING_REQ_RESP_LEN          (7)\n\n\n/*\n * ENUMERATIONS\n ****************************************************************************************\n */\n\n\n///Security Properties for distributed keys(all have the issued STK's properties)\nenum\n{\n    ///No security properties\n    SMP_KSEC_NONE = 0x00,\n    ///Unauthenticated no MITM\n    SMP_KSEC_UNAUTH_NO_MITM,\n    ///Authenticated with MITM\n    SMP_KSEC_AUTH_MITM,\n};\n\n/// Repeated Attempts Attack Detection status\nenum smpc_attempts_status\n{\n    /// No attack has been detected\n    SMPC_REP_ATTEMPTS_NO_ERROR          = GAP_ERR_NO_ERROR,           // 0x00\n    /// An attack has already been detected, drop the message\n    SMPC_REP_ATTEMPTS_ATTACK,\n    /// An attack has been detected, an indication has been sent to the HL\n    SMPC_REP_ATTEMPS_ATTACK_DETECTED,\n    /// Repeated Attempt detected, need to send a Pairing Failed PDU to the peer device\n    SMPC_REP_ATTEMPT                    = SMP_ERROR_REPEATED_ATTEMPTS   // 0x09\n};\n\n\n/// STK generation methods\nenum smpc_method\n{\n    ///Just Works Method\n    SMPC_METH_JW            = 0x00,\n    ///PassKey Entry Method\n    SMPC_METH_PK,\n    ////OOB Method\n    SMPC_METH_OOB,\n    ////Numeric Comparison\n    SMPC_METH_NC\n};\n\n/// Signature Command Types\nenum\n{\n    /// Generate Signature\n    SMPC_SIGN_GEN           = 0x00,\n    /// Verify Signature\n    SMPC_SIGN_VERIF\n};\n\nenum\n{\n    /// Use of STK in start encryption command\n    SMPC_USE_STK     = 0x00,\n    /// Use of LTK in start encryption command\n    SMPC_USE_LTK\n};\n\n#if (SECURE_CONNECTIONS)\nenum\n{\n    SMP_AES_CMAC_KEY_GENERATION = 0x00,\n\n    SMP_AES_CMAC_BLOCK\n};\n\n/// Keypress Notification types\nenum smpc_notification_type\n{\n    /// Passkey entry started\n    SMP_PASSKEY_ENTRY_STARTED = 0x00,\n    /// Passkey digit entered\n    SMP_PASSKEY_DIGIT_ENTERED,\n    /// Passkey digit erased\n    SMP_PASSKEY_DIGIT_ERASED,\n    /// Passkey cleared\n    SMP_PASSKEY_CLEARED,\n    /// Passkey entry completed\n    SMP_PASSKEY_ENTRY_COMPLETED\n};\n#endif // (SECURE_CONNECTIONS)\n/*\n * STRUCTURES DEFINITION\n ****************************************************************************************\n */\n\n/*\n * GLOBAL VARIABLES DEFINITION\n ****************************************************************************************\n */\n\n\n/*\n * MACROS\n ****************************************************************************************\n */\n/// Authentication Request mask\n#define SMPC_MASK_AUTH_REQ(req)    (req & 0x07)\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Send a GAPM_USE_ENC_BLOCK_CMD message to the SMPM. Shall be use when the AES_128\n *        encryption block need to be used.\n *\n * @param[in] conidx      Connection Index\n * @param[in] operand_1   First operand\n * @param[in] operand_2   Second operand\n ****************************************************************************************\n */\nvoid smpc_send_use_enc_block_cmd(uint8_t conidx,\n                                 uint8_t *operand_1, uint8_t *operand_2);\n\n\n/**\n ****************************************************************************************\n * @brief Send a GAPM_GEN_DH_KEY_CMD message to the SMPM. Shall be use when we need to\n *        generate a DH KEy\n *\n * @param[in] conidx      Connection Index\n * @param[in] operand_1   X co-ordinate\n * @param[in] operand_2   Y co-ordinate\n ****************************************************************************************\n */\n\nvoid smpc_send_gen_dh_key_cmd(uint8_t conidx,\n                                uint8_t *operand_1, uint8_t *operand_2);\n\n/**\n ****************************************************************************************\n * @brief Send a request to the controller to start the encryption procedure.\n *\n * @param[in] conidx      Connection Index\n * @param[in] operand_1   First operand\n * @param[in] operand_2   Second operand\n ****************************************************************************************\n */\nvoid smpc_send_start_enc_cmd(uint8_t idx, uint8_t key_type, uint8_t *key,\n                             uint8_t *randnb, uint16_t ediv);\n\n/**\n ****************************************************************************************\n * @brief Send the LTK provided by the HL to the controller.\n *\n * @param[in] idx         Connection Index\n * @param[in] found       Indicate if the requested LTK has been found by the application\n * @param[in] key         Found LTK, used only if found is set to true\n ****************************************************************************************\n */\nvoid smpc_send_ltk_req_rsp(uint8_t idx, bool found, uint8_t *key);\n\n/**\n ****************************************************************************************\n * @brief Send a SMPC_PAIRING_REQ_IND message to the HL\n *\n * @param[in] conidx      Connection Index\n * @param[in] req_type    Kind of request\n ****************************************************************************************\n */\nvoid smpc_send_pairing_req_ind(uint8_t conidx, uint8_t req_type);\n\n/**\n ****************************************************************************************\n * @brief Send a SMPC_PAIRING_IND message to the HL\n *\n * @param[in] conidx      Connection Index\n * @param[in] ind_type    Kind of indication\n * @param[in] value       Value to indicate (keys, ...)\n ****************************************************************************************\n */\nvoid smpc_send_pairing_ind(uint8_t conidx, uint8_t ind_type, void *value);\n\n/**\n ****************************************************************************************\n * @brief Check if the provided pairing features are within the specified range.\n *\n * @param[in] pair_feat   Pairing Features values to check\n *\n * @param[out] true if features are valid, else false\n ****************************************************************************************\n */\nbool smpc_check_pairing_feat(struct gapc_pairing *pair_feat);\n\n/**\n ****************************************************************************************\n * @brief Check if an attack by repeated attempts has been triggered by the peer device\n *\n * @param[in] conidx   Connection Index\n ****************************************************************************************\n */\nuint8_t smpc_check_repeated_attempts(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Compute and check the encryption key size to use during the connection.\n *\n * @param[in] conidx   Connection Index\n *\n * @param[out] true if the resultant EKS is within the specified range [7-16 bytes], else false\n ****************************************************************************************\n */\nbool smpc_check_max_key_size(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Check if the keys distribution scheme is compliant with the required security\n *        level\n *\n * @param[in] conidx      Connection Index\n * @param[in] sec_level   Security level required by the device.\n ****************************************************************************************\n */\nbool smpc_check_key_distrib(uint8_t conidx, uint8_t sec_level);\n\n/**\n ****************************************************************************************\n * @brief Apply the XOR operator to the two provided operands\n *\n * @param[in|out] result      Buffer which will contain the result of the XOR operation\n * @param[in]     operand_1   First operand\n * @param[in]     operand_2   Second operand\n ****************************************************************************************\n */\nvoid smpc_xor(uint8_t *result, uint8_t *operand_1, uint8_t *operand_2);\n\n/**\n ****************************************************************************************\n * @brief Generate the L value during a signature verification/generation procedure.\n *\n * @param[in] conidx   Connection Index\n * @param[in] src      Indicate the source of the CSRK which will be used (LOCAL or PEER)\n ****************************************************************************************\n */\nvoid smpc_generate_l(uint8_t conidx, uint8_t src);\n\n/**\n ****************************************************************************************\n * @brief Generate one of the Ci value during a signature verification/generation procedure.\n *\n * @param[in] conidx   Connection Index\n * @param[in] src      Indicate the source of the CSRK which will be used (LOCAL or PEER)\n * @param[in] ci1      Previous computed Ci value\n * @param[in] mi       16-byte block used to generate the ci value\n ****************************************************************************************\n */\nvoid smpc_generate_ci(uint8_t conidx, uint8_t src, uint8_t *ci1, uint8_t *mi);\n\n/**\n ****************************************************************************************\n * @brief Generate the random value exchanged during the pairing procedure (phase 2)\n *\n * @param[in] conidx   Connection Index\n * @param[in] state    New state of the SMPC task.\n ****************************************************************************************\n */\nvoid smpc_generate_rand(uint8_t conidx, uint8_t state);\n\n/**\n ****************************************************************************************\n * @brief Generate the first value needed in the confirm value generation\n *\n * @param[in] conidx   Connection Index\n * @param[in] role     Current role of the device\n * @param[in] local    true if the confirm value to generate is the confirm value of the\n *                     device, false if it is the remote device's one.\n ****************************************************************************************\n */\nvoid smpc_generate_e1(uint8_t conidx, uint8_t role, bool local);\n\n/**\n ****************************************************************************************\n * @brief Generate the confirm value\n *\n * @param[in] conidx   Connection Index\n * @param[in] role     Current role of the device\n * @param[in] e1       e1 value\n ****************************************************************************************\n */\nvoid smpc_generate_cfm(uint8_t conidx, uint8_t role, uint8_t *e1);\n\n/**\n ****************************************************************************************\n * @brief Generate the STK used to encrypt a link after the pairing procedure\n *\n * @param[in] conidx   Connection Index\n * @param[in] role     Current role of the device\n ****************************************************************************************\n */\nvoid smpc_generate_stk(uint8_t conidx, uint8_t role);\n\n/**\n ****************************************************************************************\n * @brief Calculate one of the subkey used during the signature generation/verification\n *        procedure.\n *\n * @param[in] gen_k2        true if the returned subkeys is k2, false if k1\n * @param[in] l_value       L value obtained from the CSRK.\n * @param[in|out] subkey    Buffer which will contain the generated subkey.\n ****************************************************************************************\n */\nvoid smpc_calc_subkeys(bool gen_k2, uint8_t *l_value, uint8_t *subkey);\n\n/**\n ****************************************************************************************\n * @brief Start to send the keys defined during the pairing features exchange procedure.\n *\n * @param[in] conidx        Connection Index\n * @param[in] role          Current role of the device\n ****************************************************************************************\n */\nvoid smpc_tkdp_send_start(uint8_t conidx, uint8_t role);\n\n/**\n ****************************************************************************************\n * @brief Define the next step of TKDP procedure (sending side).\n *\n * @param[in] conidx        Connection Index\n * @param[in] role          Current role of the device\n ****************************************************************************************\n */\nvoid smpc_tkdp_send_continue(uint8_t conidx, uint8_t role);\n\n/**\n ****************************************************************************************\n * @brief Put the task in a state allowing to receive the keys defined during the pairing\n *        features exchange procedure.\n *\n * @param[in] conidx        Connection Index\n * @param[in] role          Current role of the device\n ****************************************************************************************\n */\nvoid smpc_tkdp_rcp_start(uint8_t conidx, uint8_t role);\n\n/**\n ****************************************************************************************\n * @brief Define the next step of TKDP procedure (reception side).\n *\n * @param[in] conidx        Connection Index\n * @param[in] role          Current role of the device\n ****************************************************************************************\n */\nvoid smpc_tkdp_rcp_continue(uint8_t conidx, uint8_t role);\n\n\n/**\n ****************************************************************************************\n * @brief Start the timer used to detect a Repeated Attempts attack\n *\n * @param[in] conidx        Connection Index\n ****************************************************************************************\n */\nvoid smpc_launch_rep_att_timer(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Determine the method which will be used to generate the STK during a pairing\n *        procedure\n *\n * @param[in] conidx        Connection Index\n ****************************************************************************************\n */\nvoid smpc_get_key_sec_prop(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Check if the security mode requested by the application or the peer device can\n *        be reached with the exchanged pairing features.\n *\n * @param[in] conidx        Connection Index\n * @param[in] role          Current role of the device\n ****************************************************************************************\n */\nbool smpc_is_sec_mode_reached(uint8_t conidx, uint8_t role);\n\n/**\n ****************************************************************************************\n * @brief Define what to do once a start encryption procedure has been successfully finished.\n *\n * @param[in] conidx        Connection Index\n * @param[in] role          Current role of the device\n * @param[in] status        Status\n ****************************************************************************************\n */\nvoid smpc_handle_enc_change_evt(uint8_t conidx, uint8_t role, uint8_t status);\n\n\n#if (SECURE_CONNECTIONS)\n/**\n ****************************************************************************************\n * @brief Initiate DHKey Check algorithm\n *\n * @param[in] conidx        Connection Index\n ****************************************************************************************\n */\nvoid smpc_initiate_dhkey_check(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Initiates the f5 algorithm to calculate the MacKey and LTK for a link\n *\n * @param[in] conidx        Connection Index\n *\n ****************************************************************************************\n */\n\nvoid smpc_init_mac_key_calculation(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Initiates the f6 algorithm to verify a DH Key Check.\n *\n * @param[in] conidx        Connection Index\n *\n ****************************************************************************************\n */\n\nvoid smpc_initiate_dhkey_verification(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Determines the next bit of the passkey to be used\n *\n * @param[in] conidx        Connection Index\n *\n ****************************************************************************************\n */\nuint8_t smpc_get_next_passkey_bit(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Checks if secure connections are enabled on a link\n *\n * @param[in] conidx        Connection Index\n *\n ****************************************************************************************\n */\nbool smpc_secure_connections_enabled(uint8_t idx);\n\n#endif // (SECURE_CONNECTIONS)\n#endif //(BLE_SMPC)\n#endif //SMPC_INT_H_\n\n/// @} SMPC\n"
  },
  {
    "path": "services/ble_stack/hl/src/gap/smpc/smpc_util.h",
    "content": "#ifndef SMPC_UTIL_H_\n#define SMPC_UTIL_H_\n\n/**\n ****************************************************************************************\n * @addtogroup SMPC_UTIL Utility\n * @ingroup SMPC\n * @brief Contains utility functions and macros for SMPC.\n *\n * The SMPC Utilities block contains key generating and security related functions\n * that are useful in accomplishing the task of the security manager protocol\n * layer of the Bluetooth Low Energy.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_SMPC)\n\n#include \"../smp_common.h\"\n#include \n\n#include \"l2cc_pdu.h\"\n#include \"smpc_int.h\"\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// SMPC command PDU construct function pointer type definition\ntypedef void (*smpc_construct_pdu_t)(struct l2cc_pdu *pdu, void *value);\n\n/// SMPC command PDU reception functions\ntypedef void (*smpc_recv_pdu_t)(uint8_t idx, struct l2cc_pdu *pdu);\n\n/*\n * GLOBAL VARIABLES DECLARATION\n ****************************************************************************************\n */\n\nextern const smpc_construct_pdu_t smpc_construct_pdu[L2C_CODE_SECURITY_MAX];\nextern const smpc_recv_pdu_t smpc_recv_pdu[L2C_CODE_SECURITY_MAX];\n\n/*\n * FUNCTIONS DECLARATION\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Parameter checking function of SMP PDU packets.\n *\n * @param[in] pdu   Pointer to the data part of the SMP command PDU.\n *\n * @return Value of check parameter status, to be reported to host or back to peer.\n ****************************************************************************************\n */\nuint8_t smpc_check_param(struct l2cc_pdu *pdu);\n\n#endif //(BLE_SMPC)\n#endif //(SMPC_UTIL_H_)\n\n/// @} SMPC_UTIL\n"
  },
  {
    "path": "services/ble_stack/hl/src/gatt/attc/attc.h",
    "content": "#ifndef ATTC_H_\n#define ATTC_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ATTC Attribute Client\n * @ingroup ATT\n * @brief Attribute Protocol Client\n *\n * The ATTC module is responsible for handling messages intended for the attribute\n * profile client. It has defined interfaces with @ref ATTM \"ATTM\".\n *\n * @{\n *\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#include \n#include \"l2cc.h\"\n#include \"ke_task.h\"\n\n#if (BLE_ATTC)\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// Allocate a Attribute PDU packet for a specific attribute request.\n#define ATTC_ALLOCATE_ATT_REQ(conidx, opcode, pdu_type, value_len)\\\n    L2CC_ATT_PDU_ALLOC_DYN(conidx, opcode, KE_BUILD_ID(TASK_GATTC, conidx), pdu_type, value_len)\n\n/*\n * DATA STRUCTURES\n ****************************************************************************************\n */\n\n/// Peer device event registration\nstruct attc_register_evt\n{\n    /// list header\n    struct co_list_hdr hdr;\n    /// Attribute start handle\n    uint16_t start_hdl;\n    /// Attribute end handle\n    uint16_t end_hdl;\n    /// Task to be notified\n    ke_task_id_t task;\n};\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n/**\n ****************************************************************************************\n * @brief Sends Indication reception confirmation message\n *\n * @param[in] conidx        connection index\n *\n ****************************************************************************************\n */\nvoid attc_send_hdl_cfm(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief Sends write execute.\n *\n * @param[in] conidx        connection index\n * @param[in] flag          write execute flag (write or discard)\n *\n ****************************************************************************************\n */\nvoid attc_send_execute(uint8_t conidx, uint8_t flag);\n\n\n/**\n ****************************************************************************************\n * @brief Send a PDU Attribute request packet\n *\n * @param[in] conidx  Index of the connection with the peer device\n * @param[in] pdu        PDU Packet\n ****************************************************************************************\n */\nvoid attc_send_att_req(uint8_t conidx, void *pdu);\n\n#endif /* (BLE_ATTC) */\n\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n/**\n ****************************************************************************************\n * @brief Handles reception of PDU Packet\n *\n * @param[in] conidx  Index of the connection with the peer device\n * @param[in] param   Received PDU Packet\n *\n * @return If message has been proceed or consumed\n ****************************************************************************************\n */\nint attc_l2cc_pdu_recv_handler(uint8_t conidx, struct l2cc_pdu_recv_ind *param);\n#endif /* #if (BLE_CENTRAL || BLE_PERIPHERAL) */\n\n/// @} ATTC\n#endif // ATT_H_\n"
  },
  {
    "path": "services/ble_stack/hl/src/gatt/attm/attm_db.h",
    "content": "#ifndef ATTM_DB_H_\n#define ATTM_DB_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ATTDB Database\n * @ingroup ATTM\n * @brief Attribute Protocol Database\n *\n * The ATTDB module is responsible for providing different sets of attribute databases\n * for Attribute Profile server.\n *\n * This module can be tailored by client, to match the requirement of the desired database.\n *\n * @{\n *\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_ATTS)\n#include \n#include \"rwip_config.h\"\n#include \"ke_task.h\"\n#include \"attm.h\"\n#include \"gattm_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n/*\n * TYPE DEFINITION\n ****************************************************************************************\n */\n#if(BLE_ATTS)\n\n/**\n * Attribute Description\n */\nstruct attm_att_desc\n{\n    /**\n     * 16 bits UUID or data offset used to retrieve 32 or 128 bits UUID in service memory block\n     */\n    uint16_t uuid;\n\n    /**\n     *  Attribute Permission (@see attm_perm_mask)\n     */\n    uint16_t perm;\n\n    /**\n     * value information (@see attm_value_perm_mask)\n     */\n    union att_info\n    {\n        /// attribute max length (RI = 1)\n        uint16_t max_length;\n\n        /// attribute value offset pointer (RI = 0)\n        uint16_t offset;\n    } info;\n};\n\n/// attribute value if present in database\nstruct attm_att_value\n{\n    /// Maximum attribute length\n    uint16_t max_length;\n    /// currrent attribute length that can be read.\n    uint16_t length;\n    ///value data pointer\n    uint8_t  value[__ARRAY_EMPTY];\n};\n\n/// service description\nstruct attm_svc_desc\n{\n    /// Service Start Handle\n    uint16_t start_hdl;\n    /// Service End Handle\n    uint16_t end_hdl;\n    /// Task identifier that manages service\n    uint16_t task_id;\n\n    /**\n     * Service Permission (@see attm_svc_perm_mask)\n     */\n    uint8_t perm;\n\n    /// number of attributes present in service (end_hdl - start_hdl - 1)\n    uint8_t nb_att;\n\n    /// Service 16 bits UUID (LSB First) or data offset used to retrieve 32 or 128 bits\n    /// UUID in service memory block\n    uint16_t uuid;\n};\n\n/**\n * Service description present in attribute database\n */\nstruct attm_svc\n{\n    /// Next Service\n    struct attm_svc* next;\n\n    /// service description\n    struct attm_svc_desc svc;\n\n    /**\n     * List of attribute description present in service.\n     */\n    struct attm_att_desc atts[__ARRAY_EMPTY];\n};\n\n/// Attribute element information\nstruct attm_elmt\n{\n    /// element info\n    union elem_info\n    {\n        /// attribute info pointer\n        struct attm_att_desc* att;\n\n        /// service info pointer\n        struct attm_svc_desc* svc;\n    } info;\n\n    /// use to know if current element is a service or an attribute\n    bool service;\n};\n\n/// ATTM General Information Manager\nstruct attm_db\n{\n    /**\n     * **************************************************************************************\n     * @brief Attribute database\n     *\n     * The Attribute database is a list of attribute services sorted by handle number.\n     * This database shall be initiate by GAP, GATT, profiles and application process at\n     * startup and must not change during runtime.\n     *\n     * Database initialization shall be deterministic in order to always have service handle\n     * at same position in database during all product life-cycle. This is required since\n     * database client can save position of services in database to not perform service\n     * discovery at each connection.\n     ***************************************************************************************\n     */\n    struct attm_svc * svcs;\n\n    /**\n     ***************************************************************************************\n     * Last attribute service searched.\n     *\n     * Used as a cached variable, it's used to reduce handle search duration.\n     ***************************************************************************************\n     */\n    struct attm_svc * cache;\n\n    /**\n     * Temporary value used for read operation on service and characteristics attributes\n     */\n    uint8_t  temp_val[ATT_UUID_128_LEN + ATT_HANDLE_LEN + ATT_HANDLE_LEN];\n};\n\n\n\n\n\n#endif //(BLE_ATTS)\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n * Check if Service handle Range can be allocated in Database, and if handle should be\n * dynamically allocated, calculate first available handle range.\n *\n * @param[in|out] svc_desc Service information to add in DB\n *\n * @return status of operation\n */\nuint8_t attmdb_svc_check_hdl(struct gattm_svc_desc* svc_desc);\n\n/**\n ****************************************************************************************\n * @brief Add a service in database.\n *\n * According to service start handle and number of attribute, ATTM DB allocate a set of\n * attribute handles, then using other parameters it allocate a buffer used to describe\n * service, and allocate attributes + their values.\n *\n * If start_hdl = 0, it allocated service using first available handle (start_hdl is\n * modified); else it will allocate service according to given start handle.\n *\n *\n * @param[in|out] svc_desc Service description.\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If service allocation succeeds.\n *  - @ref ATT_ERR_INVALID_HANDLE: If start_hdl given in parameter or UUIDs value invalid\n *  - @ref ATT_ERR_INSUFF_RESOURCE: There is not enough memory to allocate service buffer.\n ****************************************************************************************\n */\nuint8_t attmdb_add_service(struct gattm_svc_desc* svc_desc);\n\n\n\n\n/**\n ****************************************************************************************\n *  @brief Search in database from which service attribute handle comes from.\n *\n * @param[in] handle Attribute handle.\n *\n * @return Services that contains attribute handle; NULL if handle not available in\n *         database.\n ****************************************************************************************\n */\nstruct attm_svc * attmdb_get_service(uint16_t handle);\n\n/**\n ****************************************************************************************\n *  @brief Search in database Attribute pointer using attribute handle.\n *\n * @param[in]  handle   Attribute handle.\n * @param[out] elmt     Attribute element to fill\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If attribute found.\n *  - @ref ATT_ERR_INVALID_HANDLE: If No Attribute found\n ****************************************************************************************\n */\nuint8_t attmdb_get_attribute(uint16_t handle, struct attm_elmt*elmt);\n\n/**\n ****************************************************************************************\n * @brief Retrieve attribute at or after specified handle\n *\n * Retrieve first attribute with handle >= parameter handle.\n * Parameter handle is updated according found attribute.\n *\n * @param[in|out] handle   Attribute handle.\n * @param[out]    elmt     Attribute element to fill\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If attribute found.\n *  - @ref ATT_ERR_INVALID_HANDLE: If No Attribute found\n ****************************************************************************************\n */\nuint8_t attmdb_get_next_att(uint16_t * handle, struct attm_elmt*elmt);\n\n/**\n ****************************************************************************************\n * Check if attribute element UUID is equals to uuid given in parameter.\n *\n * @param elmt     Attribute element that can be a UUID 16 or 128 bits\n * @param uuid16   UUID 16 bits to compare\n *\n * @return True if UUIDs matches, False else.\n ****************************************************************************************\n */\nbool attmdb_uuid16_comp(struct attm_elmt *elmt, uint16_t uuid16);\n\n/**\n ****************************************************************************************\n * @brief Retrieve attribute value Max Length\n *\n * @param[in]  elmt    Attribute element information\n * @param[out] length  Max length Size of attribute value\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If request succeeds\n *  - @ref ATT_ERR_REQUEST_NOT_SUPPORTED: If attribute is read only\n ****************************************************************************************\n */\nuint8_t attmdb_get_max_len(struct attm_elmt* elmt, att_size_t* length);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve attribute UUID\n *\n * @param[in]  elmt     Attribute information.\n * @param[out] uuid_len Size of attribute UUID\n * @param[out] uuid     UUID value to update\n * @param[in]  srv_uuid For a service, if set, return service UUID\n * @param[in]  air      Prepare UUID for the air (For a 32 bit UUID, returns a 128 bit UUID)\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If request succeeds\n *  - @ref ATT_ERR_INVALID_HANDLE: If handle doesn't exist in database\n ****************************************************************************************\n */\nuint8_t attmdb_get_uuid(struct attm_elmt *elmt, uint8_t* uuid_len, uint8_t* uuid, bool srv_uuid, bool air);\n\n/**\n ****************************************************************************************\n * @brief Retrieve attribute permission\n * If access mask is set, service authentication or encryption key size value can be loaded.\n *\n * @param[in]  handle      Attribute handle.\n * @param[out] perm        Permission value to return\n * @param[in]  mode_mask   Mode Access mask to check type of access\n *                         parameter (0 return full attribute permission)\n * @param[in]  perm_mask   Permission Access mask to check only specific permission\n * @param[in|out] elmt     Attribute information\n *\n * @return Command status code:\n *  - @ref ATT_ERR_NO_ERROR: If request succeeds\n *  - @ref ATT_ERR_INVALID_HANDLE: If handle doesn't exist in database.\n *  - @ref ATT_ERR_REQUEST_NOT_SUPPORTED: If mode is disabled.\n *  - @ref ATT_ERR_INSUFF_AUTHOR: when service is disabled.\n *  - @ref ATT_ERR_INSUFF_ENC_KEY_SIZE:\n ****************************************************************************************\n */\nuint8_t attmdb_att_get_permission(uint16_t handle, uint16_t* perm, uint16_t mode_mask,\n                                  uint16_t perm_mask, struct attm_elmt *elmt);\n\n\n#if (RW_DEBUG)\n\n/**\n ****************************************************************************************\n * @brief Retrieve number of services.\n *\n * @return number of services\n ****************************************************************************************\n */\nuint8_t attmdb_get_nb_svc(void);\n\n/**\n ****************************************************************************************\n * @brief Retrieve services informations\n *\n * @param[in] svc_info Services information array to update\n ****************************************************************************************\n */\nvoid attmdb_get_svc_info(struct gattm_svc_info* svc_info);\n#endif /* (RW_DEBUG) */\n\n#endif // #if (BLE_ATTS)\n\n/// @} ATTDB\n#endif // ATTM_DB_H_\n"
  },
  {
    "path": "services/ble_stack/hl/src/gatt/atts/atts.h",
    "content": "#ifndef ATTS_H_\n#define ATTS_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ATTS Attribute Server\n * @ingroup ATT\n * @brief Attribute Protocol Server\n *\n * The ATTS module is responsible for handling messages intended for the attribute\n * profile server. It has defined interfaces with @ref ATTM \"ATTM\".\n *\n *\n * @{\n *\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_ATTS)\n#include \"att.h\"\n#include \"compiler.h\"\n#include \n#include \"co_list.h\"\n#include \"gattc_task.h\"\n#include \"l2cc.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n * Confirmation of write signed (signature verified)\n *\n * @param[in] conidx    Connection Index\n * @param[in] length    Signed Data Length\n * @param[in] sign_data Signed Data\n */\nvoid atts_write_signed_cfm(uint8_t conidx, uint16_t length, uint8_t* sign_data);\n\n\n/**\n ****************************************************************************************\n * @brief Send an attribute error response to peer.\n *\n * @param[in] conidx            Index of the connection with the peer device\n * @param[in] opcode            failing operation code\n * @param[in] uuid              attribute UUID\n * @param[in] error             error code\n ****************************************************************************************\n */\nvoid atts_send_error(uint8_t conidx, uint8_t opcode, uint16_t uuid, uint8_t error);\n\n\n/**\n ****************************************************************************************\n * @brief Format the Write Response PDU and send it after receiving a Write Request PDU\n * @param[in] conidx Index of the connection with the peer device\n * @param[in] atthdl  Attribute handle for which to send the response\n * @param[in] status  ATT error code\n ****************************************************************************************\n */\nvoid atts_write_rsp_send(uint8_t conidx, uint16_t atthdl, uint8_t status);\n\n\n/**\n ****************************************************************************************\n * @brief Sends a value notification/indication command\n *\n * @param[in] conidx    Connection Index\n * @param[in] event     Event parameters to send\n *\n * @return If notification can be sent or not\n ****************************************************************************************\n */\nuint8_t atts_send_event(uint8_t conidx, struct gattc_send_evt_cmd *event);\n\n\n/**\n * @brief  Clear allocated prepare write temporary data.\n *\n * @param[in] conidx            connection index\n */\nvoid atts_clear_prep_data(uint8_t conidx);\n\n\n/**\n * @brief  Clear allocated temporary data used for ATTS response.\n *\n * @param[in] conidx            connection index\n */\nvoid atts_clear_rsp_data(uint8_t conidx);\n\n/**\n * @brief  Clear temporary attribute read data present in cache.\n *\n * @param[in] conidx            connection index\n */\nvoid atts_clear_read_cache(uint8_t conidx);\n\n\n/// @} ATTS\n#endif /* (BLE_ATTS) */\n\n#if (BLE_CENTRAL || BLE_PERIPHERAL)\n/**\n ****************************************************************************************\n * @brief Handles reception of PDU Packet\n *\n * @param[in] conidx  Index of the connection with the peer device\n * @param[in] param   Received PDU Packet\n *\n * @return If message has been proceed or consumed\n ****************************************************************************************\n */\nint atts_l2cc_pdu_recv_handler(uint8_t conidx, struct l2cc_pdu_recv_ind *param);\n#endif /* #if (BLE_CENTRAL || BLE_PERIPHERAL) */\n\n#endif // ATTS_H_\n"
  },
  {
    "path": "services/ble_stack/hl/src/gatt/gatt.h",
    "content": "#ifndef GATT_H_\n#define GATT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GATT Generic Attribute Profile\n * @ingroup HOST\n * @brief Generic Attribute Profile.\n *\n * The GATT module is responsible for providing an API for all attribute related operations.\n * It is responsible for all the service framework activities using the Attribute protocol\n * for discovering services and for reading and writing characteristic values on a peer device.\n * To achieve this, the GATT interfaces with @ref ATTM \"ATTM\", @ref ATTC \"ATTC\" and the\n * @ref ATTS \"ATTS\".\n *\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#include \"att.h\"\n\n\n/*\n * DEFINE DECLARATIONS\n ****************************************************************************************\n */\n\n/// retrieve gatt attribute handle from attribute index.\n#define GATT_GET_ATT_HANDLE(idx)\\\n    ((gattm_svc_get_start_hdl() == 0)? (0) :(gattm_svc_get_start_hdl() + (idx)))\n\n\n\n\n#if (BLE_ATTS)\n/// GATT Attribute database handles\n/// Generic Attribute Profile Service\nenum gatt_db_att\n{\n    GATT_IDX_PRIM_SVC,\n    GATT_IDX_CHAR_SVC_CHANGED,\n    GATT_IDX_SVC_CHANGED,\n    GATT_IDX_SVC_CHANGED_CFG,\n\n    GATT_IDX_NUMBER\n};\n#endif /* (BLE_ATTS)*/\n\n/*\n * Type Definition\n ****************************************************************************************\n */\n\n\n/// Service Changed type definition\nstruct gatt_svc_changed\n{\n    /// Service start handle which changed\n    uint16_t start_hdl;\n    /// Service end handle which changed\n    uint16_t end_hdl;\n};\n\n\n/// @} GATT\n#endif // GATT_H_\n"
  },
  {
    "path": "services/ble_stack/hl/src/gatt/gattc/gattc_int.h",
    "content": "#ifndef GATTC_TASK_INT_H_\n#define GATTC_TASK_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GATTC_INT Internals\n * @ingroup GATTC\n * @brief Internal features of the GATTC module\n *\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_GATTC)\n#include \"gattc.h\"\n#include \"gattc_task.h\"\n#include \"ke_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// retrieve on-going operation command\n#define GATT_OPERATION_CMD(conidx, op_type, cmd) \\\n    ((struct cmd*) gattc_get_operation_ptr(conidx, op_type))\n\n#define GATT_WRITE_ERROR_CODE (0xFFFF)\n\n\n/// number of GATT Controller Process\n#define GATTC_IDX_MAX                                 BLE_CONNECTION_MAX\n\n\n\n/// states of GATT Controller task\nenum gattc_state_id\n{\n    /// Connection ready state\n    GATTC_READY = 0,\n    #if (BLE_ATTC)\n    /// Client operation on-going\n    GATTC_CLIENT_BUSY       = (1 << GATTC_OP_CLIENT),\n    /// Service Discovery Procedure operation on-going\n    GATTC_SDP_BUSY          = (1 << GATTC_OP_SDP),\n    #endif // (BLE_ATTC)\n    #if (BLE_ATTS)\n    /// Server operation on-going\n    GATTC_SERVER_BUSY       = (1 << GATTC_OP_SERVER),\n    GATTC_ATTS_BUSY         = (1 << GATTC_OP_MAX),\n    #endif // (BLE_ATTS)\n    /// Connection started but ATTS not ready\n    GATTC_CONNECTED         = (1 << (GATTC_OP_MAX + 1)),\n\n    /// Free state\n    GATTC_FREE              = (1 << (GATTC_OP_MAX + 2)),\n    /// Number of defined states.\n    GATTC_STATE_MAX\n};\n\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\nextern struct gattc_env_tag* gattc_env[GATTC_IDX_MAX];\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Initialization of the GATT controller module.\n * This function performs all the initialization steps of the GATT module.\n *\n * @param[in] reset  true if it's requested by a reset; false if it's boot initialization\n *\n ****************************************************************************************\n */\nvoid gattc_init(bool reset);\n\n\n/**\n ****************************************************************************************\n * @brief Initialize GATT controller for connection.\n *\n * @param[in] conidx    connection record index\n * @param[in] role   device role after connection establishment\n *\n ****************************************************************************************\n */\nvoid gattc_create(uint8_t conidx);\n\n\n\n/**\n ****************************************************************************************\n * @brief Cleanup GATT controller resources for connection\n *\n * @param[in] conidx   connection record index\n *\n ****************************************************************************************\n */\nvoid gattc_cleanup(uint8_t conidx);\n\n/**\n * @brief Send a complete event of ongoing executed operation to requester.\n * It also clean-up variable used for ongoing operation.\n *\n * @param[in] conidx Connection index\n * @param[in] op_type       Operation type.\n * @param[in] status Status of completed operation\n */\nvoid gattc_send_complete_evt(uint8_t conidx, uint8_t op_type, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send operation completed message with status error code not related to a\n * running operation.\n *\n * @param[in] conidx    Connection index\n * @param[in] operation Operation code\n * @param[in] seq_num   Operation sequence number\n * @param[in] requester requester of operation\n * @param[in] status    Error status code\n ****************************************************************************************\n */\nvoid gattc_send_error_evt(uint8_t conidx, uint8_t operation, uint16_t seq_num, const ke_task_id_t requester, uint8_t status);\n\n\n/**\n ****************************************************************************************\n * @brief Get operation on going\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return operation code on going\n ****************************************************************************************\n */\nuint8_t gattc_get_operation(uint8_t conidx, uint8_t op_type);\n\n/**\n ****************************************************************************************\n * @brief Get operation pointer\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return operation pointer on going\n ****************************************************************************************\n */\nvoid* gattc_get_operation_ptr(uint8_t conidx, uint8_t op_type);\n\n\n/**\n ****************************************************************************************\n * @brief Set operation pointer\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n * @param[in] op            Operation pointer.\n *\n ****************************************************************************************\n */\nvoid gattc_set_operation_ptr(uint8_t conidx, uint8_t op_type, void* op);\n\n/**\n ****************************************************************************************\n * @brief Operation execution not finish, request kernel to reschedule it in order to\n * continue its execution\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return if operation has been rescheduled (not done if operation pointer is null)\n ****************************************************************************************\n */\nbool gattc_reschedule_operation(uint8_t conidx, uint8_t op_type);\n\n/**\n ****************************************************************************************\n * @brief Get requester of on going operation\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return task that requests to execute the operation\n ****************************************************************************************\n */\nke_task_id_t gattc_get_requester(uint8_t conidx, uint8_t op_type);\n\n\n\n/**\n ****************************************************************************************\n * @brief Get Operation Sequence Number\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return Sequence number provided for operation execution\n ****************************************************************************************\n */\nuint16_t gattc_get_op_seq_num(uint8_t conidx, uint8_t op_type);\n\n\n/**\n ****************************************************************************************\n * @brief Update task state\n *\n * @param[in] conidx Connection index\n * @param[in] state to update\n * @param[in] set state to busy (true) or idle (false)\n *\n ****************************************************************************************\n */\nvoid gattc_update_state(uint8_t conidx, ke_state_t state, bool busy);\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n\n#endif // (BLE_GATTC)\n\n/// @} GATTCTASK\n#endif // GATTC_INT\n"
  },
  {
    "path": "services/ble_stack/hl/src/gatt/gattm/gattm_int.h",
    "content": "#ifndef GATTM_INT_H_\n#define GATTM_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup GATTM_INT Task\n * @ingroup GATTM\n * @brief Internal function required for GATTM usage\n * @{\n ****************************************************************************************\n */\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"ke_task.h\"\n#include \"gattm_task.h\"\n\n#include \"../attm/attm_db.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/// number of GATT Process\n#define GATTM_IDX_MAX                                 BLE_CONNECTION_MAX\n\n\n/// GATT database default features\n#define GATT_DB_DEFAULT_FEAT         0x0001\n/// GATT database Service changed feature\n#define GATT_DB_SVC_CHG_FEAT         0x000E\n\n\n\n/// states of GATT task\nenum gattm_state_id\n{\n    /// idle state\n    GATTM_IDLE,\n    /// busy state\n    GATTM_BUSY,\n    /// Number of defined states.\n    GATTM_STATE_MAX\n};\n\n\n\n/// GATT General Information Manager\nstruct gattm_env_tag\n{\n    #if (BLE_ATTS)\n    /// Environment data needed by attribute database\n    struct attm_db  db;\n\n    /// GATT service start handle\n    uint16_t svc_start_hdl;\n    #endif // (BLE_ATTS)\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\nextern struct gattm_env_tag gattm_env;\n\n\n/*\n * FUNCTIONS DECLARATIONS\n ****************************************************************************************\n */\n\n\n\n/*\n * TASK DESCRIPTOR DECLARATIONS\n ****************************************************************************************\n */\n\n\n/// @} GATTM_INT\n#endif // GATTM_INT_H_\n"
  },
  {
    "path": "services/ble_stack/hl/src/l2c/l2cc/l2cc_int.h",
    "content": "#ifndef L2CC_INT_H_\n#define L2CC_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup L2CCINT Internals\n * @ingroup L2CC\n * @brief Internal API for L2CC module\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#if (BLE_L2CC)\n\n#include \"l2cc_task.h\"\n#include \"l2cc.h\"\n\n/*\n * MACRO DEFINITIONS\n ****************************************************************************************\n */\n\n\n/// Maximum number of instances of the L2CC task\n#define L2CC_IDX_MAX            (BLE_CONNECTION_MAX)\n\n/*\n * STATES\n ****************************************************************************************\n */\n\n\n\n/// states of L2CAP Controller task\nenum l2cc_state_id\n{\n    /// Connection ready state\n    L2CC_READY,\n    /// LE signaling protocol busy\n    L2CC_SIG_BUSY           = (1 << L2CC_OP_SIG),\n    /// Free state\n    L2CC_FREE               = 0X3F,\n\n    /// Number of defined states.\n    L2CC_STATE_MAX\n};\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/// L2CAP environment pool\nextern struct l2cc_env_tag *l2cc_env[L2CC_IDX_MAX];\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Create and Initialize the L2CAP controller task.\n *\n * @param[in] reset   true if it's requested by a reset; false if it's boot initialization\n *\n ****************************************************************************************\n */\nvoid l2cc_init(bool reset);\n\n/**\nstruct l2cc_pdu_recv_ind;\n *\n ****************************************************************************************\n * @brief Initialize the link layer controller task.\n *\n * @param[in] conidx            Connection index\n *\n ****************************************************************************************\n */\nvoid l2cc_create(uint8_t conidx);\n\n/**\n ****************************************************************************************\n * @brief De-initialize the task.\n *\n * @param[in] conidx            Connection index\n * @param[in] reset   true if it's requested by a reset; false if it's boot initialization\n ****************************************************************************************\n */\nvoid l2cc_cleanup(uint8_t conidx, bool reset);\n\n/**\n ****************************************************************************************\n * @brief Update task state\n *\n * @param[in] conidx Connection index\n * @param[in] state to update\n * @param[in] set state to busy (true) or idle (false)\n *\n ****************************************************************************************\n */\nvoid l2cc_update_state(uint8_t conidx, ke_state_t state, bool busy);\n\n\n/**\n * @brief Send a complete event of ongoing executed operation to requester.\n * It also clean-up variable used for ongoing operation.\n *\n * @param[in] conidx        Connection index\n * @param[in] op_type       Operation type.\n * @param[in] status        Status of completed operation\n */\nvoid l2cc_send_complete_evt(uint8_t conidx, uint8_t op_type, uint8_t status);\n\n/**\n ****************************************************************************************\n * @brief Send operation completed message with status error code not related to a\n * running operation.\n *\n * @param[in] conidx    Connection index\n * @param[in] operation Operation code\n * @param[in] requester requester of operation\n * @param[in] status    Error status code\n * @param[in] cid           Channel Identifier\n ****************************************************************************************\n */\nvoid l2cc_send_error_evt(uint8_t conidx, uint8_t operation, const ke_task_id_t requester, uint8_t status, uint16_t cid);\n\n\n/**\n ****************************************************************************************\n * @brief Get operation on going\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return operation code on going\n ****************************************************************************************\n */\nuint8_t l2cc_get_operation(uint8_t conidx, uint8_t op_type);\n\n/**\n ****************************************************************************************\n * @brief Get operation pointer\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n *\n * @return operation pointer on going\n ****************************************************************************************\n */\nvoid* l2cc_get_operation_ptr(uint8_t conidx, uint8_t op_type);\n\n\n/**\n ****************************************************************************************\n * @brief Set operation pointer\n *\n * @param[in] conidx        Connection Index\n * @param[in] op_type       Operation type.\n * @param[in] op            Operation pointer.\n *\n ****************************************************************************************\n */\nvoid l2cc_set_operation_ptr(uint8_t conidx, uint8_t op_type, void* op);\n\n\n\n\n/**\n ****************************************************************************************\n * @brief Perform data packet TX over HCI (call of this function is handled by L2CM\n *\n * @param[in] conidx        Connection Index\n * @param[in] nb_buffer     Number of available TX buffers\n ****************************************************************************************\n */\nbool l2cc_data_send(uint8_t conidx, uint8_t nb_buffer);\n\n\n\n\n\n\n#endif //(BLE_L2CC)\n\n/// @} L2CCINT\n\n#endif // L2CC_INT_H_\n"
  },
  {
    "path": "services/ble_stack/hl/src/l2c/l2cc/l2cc_lecb.h",
    "content": "#ifndef _L2CC_LECB_H_\n#define _L2CC_LECB_H_\n\n/**\n ****************************************************************************************\n * @addtogroup L2CC_LECB L2Cap Controller LE Credit Based connection management\n * @ingroup L2CC\n * @brief This module is in charge of LECB connection management\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_LECB)\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n/// LE Credit Based fields.\nenum l2cc_lecb_fields\n{\n    /// LE Protocol Service Multiplexer\n    L2CC_LECB_LEPSM,\n    /// Local channel ID\n    L2CC_LECB_LOCAL_CID,\n    /// Peer channel ID\n    L2CC_LECB_PEER_CID,\n};\n\n\n/// Status of the LE Credit Based connection\n///\n///    7    6    5    4    3    2    1    0\n/// +----+----+----+----+----+----+----+----+\n/// |           RFU          |P_I |TX_W|CON |\n/// +----+----+----+----+----+----+----+----+\n///\n/// bit [2]  : Local(0)/Peer (1) initiated connection\n/// bit [1]  : TX in Wait state (segment transmission not finished)\n/// bit [0]  : LECB Connected\nenum l2cc_lecb_state\n{\n    /// Peer initiated connection\n    L2CC_LECB_PEER_INIT_BIT    = (1<<2),\n    L2CC_LECB_PEER_INIT_POS    = (2),\n\n    /// TX in Wait state (segment transmission not finished)\n    L2CC_LECB_TX_WAIT_BIT      = (1<<1),\n    L2CC_LECB_TX_WAIT_POS      = (1),\n\n    /// Channel Connected\n    L2CC_LECB_CONNECTED_BIT    = (1<<0),\n    L2CC_LECB_CONNECTED_POS    = (0),\n};\n\n\n\n\n\n/*\n * MACRO DEFINITIONS\n ****************************************************************************************\n */\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n\n/// LE credit based information for a link started or on-going.\nstruct l2cc_lecb_info\n{\n    /// Pointer to the following list\n    struct co_list_hdr hdr;\n    /// SDU waiting to be transfered (required for segmentation algorithm)\n    struct l2cc_lecb_sdu_send_cmd* tx_sdu;\n    /// SDU waiting to be received (required for reassembly algorithm)\n    struct l2cc_lecb_sdu_recv_ind* rx_sdu;\n\n    /// LE Protocol/Service Multiplexer\n    uint16_t le_psm;\n\n    /// Local channel ID\n    uint16_t local_cid;\n    /// Local Maximum Transmission Unit\n    uint16_t local_mtu;\n    /// Local Maximum Packet Size\n    uint16_t local_mps;\n    /// Local credit\n    uint16_t local_credit;\n\n    /// Peer channel ID\n    uint16_t peer_cid;\n    /// Peer Maximum Transmission Unit\n    uint16_t peer_mtu;\n    /// Peer Maximum Packet Size\n    uint16_t peer_mps;\n    /// Peer credit\n    uint16_t peer_credit;\n\n    /// Task id requested connection\n    ke_task_id_t task_id;\n\n    /// Status of the LE Credit Based connection (@see enum l2cc_lecb_state)\n    uint8_t state;\n\n    /// disconnection reason\n    uint8_t disc_reason;\n\n    /// Packet identifier - used for LECB negotiation\n    uint8_t pkt_id;\n};\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Search LE Credit Based channel depending on the parameter\n *\n * @param[in] conidx        Connection Index\n * @param[in] field         Search field (@see enum l2cc_lecb_fields)\n * @param[in] value         Field value to search\n *\n * @return Returns NULL or pointer to the LE Credit Based channel info\n ****************************************************************************************\n */\nstruct l2cc_lecb_info* l2cc_lecb_find(uint8_t conidx, uint8_t field, uint16_t value);\n\n/**\n ****************************************************************************************\n * @brief End of LECB Connection, free information, and send disconnect indication\n *\n * @param[in] conidx         Connection Index\n * @param[in] lecb           LE Credit Based Connection information\n * @param[in] disconnect_ind True, sends disconnect indication\n ****************************************************************************************\n */\nvoid l2cc_lecb_free(uint8_t conidx, struct l2cc_lecb_info* lecb, bool disconnect_ind);\n\n\n/**\n ****************************************************************************************\n * @brief Sends LE credit based connection request\n *\n * @param[in] conidx        connection index\n * @param[in] pkt_id        Packet identifier\n * @param[in] scid          Source channel ID\n * @param[in] credits       Credits\n * @param[in] mps           Maximum Packet Size\n * @param[in] mtu           Maximum Transfer Unit\n ****************************************************************************************\n */\nvoid l2cc_lecb_send_con_req(uint8_t conidx, uint8_t pkt_id, uint16_t le_psm, uint16_t scid, uint16_t credits,\n                            uint16_t mps, uint16_t mtu);\n\n/**\n ****************************************************************************************\n * @brief Sends LE credit based connection response\n *\n * @param[in] conidx        connection index\n * @param[in] status        status of the connection\n * @param[in] pkt_id        Packet identifier\n * @param[in] dcid          Destination channel ID\n * @param[in] credits       Credits\n * @param[in] mps           Maximum Packet Size\n * @param[in] mtu           Maximum Transfer Unit\n ****************************************************************************************\n */\nvoid l2cc_lecb_send_con_rsp(uint8_t conidx, uint16_t status, uint8_t pkt_id,\n                            uint16_t dcid, uint16_t credits, uint16_t mps, uint16_t mtu);\n\n/**\n ****************************************************************************************\n * @brief Sends LE credit based disconnection request\n *\n * @param[in] conidx        connection index\n * @param[in] pkt_id        Packet identifier\n * @param[in] dcid          Destination channel ID\n * @param[in] scid          Source channel ID\n ****************************************************************************************\n */\nvoid l2cc_lecb_send_disc_req(uint8_t conidx, uint8_t pkt_id, uint16_t scid, uint16_t dcid);\n\n/**\n ****************************************************************************************\n * @brief Sends LE credit based disconnection response\n *\n * @param[in] conidx        connection index\n * @param[in] pkt_id        Packet identifier\n * @param[in] dcid          Destination channel ID\n * @param[in] scid          Source channel ID\n ****************************************************************************************\n */\nvoid l2cc_lecb_send_disc_rsp(uint8_t conidx, uint8_t pkt_id, uint16_t dcid, uint16_t scid);\n/**\n ****************************************************************************************\n * @brief Sends LE credit based Flow Control credit add message\n *\n * @param[in] conidx        connection index\n * @param[in] pkt_id        Packet identifier\n * @param[in] cid           Source Channel ID\n * @param[in] credits       Credits\n ****************************************************************************************\n */\nvoid l2cc_lecb_send_credit_add(uint8_t conidx, uint8_t pkt_id, uint16_t cid, uint16_t credits);\n\n\n/**\n ****************************************************************************************\n * @brief Due to an error on LECB link, initiate a disconnection of the channel\n *\n * @param[in] conidx        connection index\n * @param[in] lecb          Information of the channel\n * @param[in] disc_reason   Disconnection reason\n *\n ****************************************************************************************\n */\nvoid l2cc_lecb_init_disconnect(uint8_t conidx, struct l2cc_lecb_info* lecb, uint8_t disc_reason);\n\n/**\n ****************************************************************************************\n * @brief Retrieve LECB error Code from Host error code\n *\n * @param[in] h_err      Host Error code\n *\n * @return LECB Error code\n ****************************************************************************************\n */\nuint16_t l2cc_lecb_h2l_err(uint8_t h_err);\n\n#endif //(BLE_LECB)\n\n/// @} L2CC_LECB\n\n#endif /* _L2CC_LECB_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/src/l2c/l2cc/l2cc_pdu_int.h",
    "content": "#ifndef _L2CC_PDU_INT_H_\n#define _L2CC_PDU_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup L2CC_PDU_INT L2Cap Controller (internal)\n * @ingroup L2CC\n * @brief This module is in charge to pack or unpack L2CAP packets\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"\n\n#if (BLE_L2CC)\n\n#include \"l2cc_pdu.h\"\n\n/*\n * MACROS\n ****************************************************************************************\n */\n\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * Pack PDU from firmware readable data to a L2CAP packet using generic method.\n * (no segmentation)\n *\n * @param[in]      p_pdu       Pointer to the unpacked PDU structure\n * @param[in|out]  p_offset    Pointer to address where the next part of PDU will be read\n * @param[in|out]  p_length    Pointer to the length of payload that has been packed\n * @param[in|out]  p_buffer    Pointer to address where the next part of PDU will be written\n * @param[in|out]  pb_flag     Packet Boundary flags\n *\n * @return GAP_ERR_NO_ERROR if packing succeed, else another error code.\n ****************************************************************************************\n */\n#ifdef __GATT_OVER_BR_EDR__\n    uint8_t l2cc_pdu_pack(uint8_t conidx, struct l2cc_pdu *p_pdu, uint16_t *p_offset, uint16_t *p_length, uint8_t *p_buffer, uint8_t *pb_flag);\n#else\n    uint8_t l2cc_pdu_pack(struct l2cc_pdu *p_pdu, uint16_t *p_offset, uint16_t *p_length, uint8_t *p_buffer, uint8_t *pb_flag);\n#endif\n\n/**\n ****************************************************************************************\n * Unpack L2Cap PDU in a generic format that can be used by firmware using generic method.\n * (no reassembly)\n *\n * @param[in]      p_pdu       Pointer to the unpacked PDU structure\n * @param[in|out]  p_offset    Pointer to address where the next part of PDU will be written\n * @param[in|out]  p_rem_len   Pointer to the remaining length value of PDU to receive\n * @param[in|out]  p_buffer    Pointer to address where the next part of PDU will be read\n * @param[in]      pkt_length  Length of the received packet\n * @param[in]      pb_flag     Packet Boundary flags\n *\n * @return GAP_ERR_NO_ERROR if packing succeed, else another error code.\n ****************************************************************************************\n */\nuint8_t l2cc_pdu_unpack(struct l2cc_pdu *p_pdu, uint16_t *p_offset, uint16_t *p_rem_len,\n                        const uint8_t *p_buffer, uint16_t pkt_length, uint8_t pb_flag);\n\n\n\n#if (RW_DEBUG)\n/**\n ****************************************************************************************\n * Pack DBG PDU (any kind of PDU generated by Host) from firmware readable data to a L2CAP\n * packet (no segmentation)\n *\n * @param[in]      conidx      Connection Index\n * @param[in]      pdu         Pointer to the Debug PDU to send\n * @param[in|out]  p_length    Pointer to the length of payload that has been packed\n * @param[in|out]  buffer      Pointer to address where the next part of PDU will be written\n * @param[in|out]  offset      Pointer to address where the next part of PDU will be read\n * @param[in|out]  pb_flag     Packet Boundary flags\n *\n * @return GAP_ERR_NO_ERROR if packing succeed, else another error code.\n ****************************************************************************************\n */\nuint8_t l2cc_dbg_pdu_pack(struct l2cc_dbg_pdu *pdu, uint16_t *length, uint8_t *buffer, uint16_t* offset,uint8_t *pb_flag);\n\n\n/**\n ****************************************************************************************\n * Unpack L2Cap PDU in a generic format that can be used by firmware for debugging\n * (no reassembly)\n *\n * @param[in|out]  sdu         Pointer to the unpacked SDU structure\n * @param[in]      buffer      Pointer to address where the next part of PDU will be read\n * @param[in]      length      Length of the received packet\n * @param[in|out]  offset      Pointer to address where the next part of PDU will be written\n * @param[in]      pb_flag     Packet Boundary flags\n *\n * @return GAP_ERR_NO_ERROR if packing succeed, else another error code.\n ****************************************************************************************\n */\nuint8_t l2cc_dbg_pdu_unpack(struct l2cc_dbg_pdu *pdu, uint8_t *buffer, uint16_t length, uint16_t* offset, uint8_t pb_flag);\n#endif // (RW_DEBUG)\n\n#if (BLE_LECB)\n/**\n ****************************************************************************************\n * Pack LE Credit Based channel PDU from firmware readable data to a L2CAP packet\n *\n * @param[in]      conidx      Connection Index\n * @param[in]      pdu         Pointer to the SDU to send\n * @param[out]     length      Pointer to the length of payload that has been packed\n * @param[in|out]  buffer      Pointer to address where the next part of PDU will be written\n * @param[in|out]  offset      Pointer to address where the next part of PDU will be read\n * @param[in|out]  pdu_len     PDU length to transmitt\n * @param[in]      pb_flag     Packet Boundary flags\n *\n * @return GAP_ERR_NO_ERROR if packing succeed, else another error code.\n ****************************************************************************************\n */\nuint8_t l2cc_lecb_pdu_pack(uint8_t conidx, struct l2cc_sdu *sdu, uint16_t *length, uint8_t *buffer, uint16_t* offset,\n                           uint16_t pdu_len, uint8_t pb_flag);\n\n\n/**\n ****************************************************************************************\n * Unpack L2Cap LECB SDU in a generic format that can be used by firmware\n *\n * @param[in|out] sdu            Pointer to the unpacked SDU structure\n * @param[in]     buffer         Pointer to address where the next part of PDU will be read\n * @param[in]     length         Length of the received packet\n * @param[in|out] offset         Pointer to address where the next part of PDU will be written\n * @param[in|out] pdu_remain_len Pointer to the data length still expected on segment\n * @param[in]     pb_flag     Packet Boundary flags\n *\n * @return GAP_ERR_NO_ERROR if packing succeed, else another error code.\n ****************************************************************************************\n */\nuint8_t l2cc_lecb_pdu_unpack(struct l2cc_sdu *sdu, uint8_t *buffer, uint16_t length, uint16_t* offset,\n         uint16_t* pdu_remain_len, uint8_t pb_flag);\n\n#endif //(BLE_LECB)\n\n/**\n ****************************************************************************************\n * @brief Check the PDU packet header channel ID, Length, in order to:\n *  - verify if no error detected\n *  - allocate or retrieve the RX messge for expected destination task\n *\n * @param[in]  conidx   Connection Index\n * @param[in]  buffer   RX buffer that contains first PDU fragment\n *\n * @return GAP_ERR_NO_ERROR if header sanity check succeed, else an error code to ignore\n *         reception of PDU\n ****************************************************************************************\n */\nuint8_t l2cc_pdu_header_check(uint8_t conidx, uint8_t* buffer);\n\n\n/// @} L2CC_PDU_INT\n\n#endif //(BLE_L2CC)\n\n#endif /* _L2CC_PDU_INT_H_ */\n"
  },
  {
    "path": "services/ble_stack/hl/src/l2c/l2cc/l2cc_sig.h",
    "content": "#ifndef _L2CC_SIG_H_\n#define _L2CC_SIG_H_\n\n\n/**\n ****************************************************************************************\n * @addtogroup L2CC_SIG L2CAP Controller Signaling PDU Handler.\n * @ingroup L2CC\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n\n#if (BLE_L2CC)\n\n#include \"l2cc.h\"\n#include \"l2cc_task.h\"\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * MACRO DEFINITIONS\n ****************************************************************************************\n */\n\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Send an L2Cap command rejected signaling packet with command not understood\n * error code.\n *\n * @param[in] conidx        Connection Index\n * @param[in] pkt_id        Packet identifier\n *\n * @param[in] reason        The Reason field describes why the Request packet was rejected\n * @param[in] opt1          Optional param 1\n * @param[in] opt2          Optional param 2\n ****************************************************************************************\n */\nvoid l2cc_sig_send_cmd_reject(uint8_t conidx, uint8_t pkt_id, uint16_t reason, uint16_t opt1, uint16_t opt2);\n\n\n/**\n ****************************************************************************************\n *  @brief Handles reception of L2CAP signaling messages from peer device.\n *\n * @param[in] conidx        Connection Index\n * @param[in] pdu           PDU Received\n *\n * @return If the message was consumed or not.\n ****************************************************************************************\n */\nint l2cc_sig_pdu_recv_handler(uint8_t conidx, struct l2cc_pdu *pdu);\n\n\n\n\n#endif // (BLE_L2CC)\n\n#endif // _L2CC_SIG_H_\n\n/// @} L2CC_SIG\n"
  },
  {
    "path": "services/ble_stack/hl/src/l2c/l2cm/l2cm_int.h",
    "content": "#ifndef L2CM_INT_H_\n#define L2CM_INT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup L2C_INT Logical Link Control and Adaptation Protocol internals\n * @ingroup HOST\n * @brief Logical Link Control and Adaptation Protocol - Internal API.\n *\n * @{\n ****************************************************************************************\n */\n#include \"rwip_config.h\"\n#include \"hal_trace.h\"\n\n#if (BLE_L2CM)\n#include \n#include \n#include \"compiler.h\"\n#include \"l2cm.h\"\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#define TRACE_BLE_TX_BUFFER_USAGE\t0\n\n/*\n * DEFINES\n ****************************************************************************************\n */\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\n\n/// L2CAP Manager environment structure to be saved\nstruct l2cm_env_tag\n{\n    #if (BLE_L2CC)\n    /// bit field used to know per connection if TX activity is on-going\n    uint32_t    con_tx_state;\n    #endif //  (BLE_L2CC)\n    /// Lower Layer buffers length\n    uint16_t    le_acl_data_pkt_len;\n    /// Total number of available Lower Layer buffers\n    uint16_t    le_acl_total_nb_acl_pkt;\n    /// Number of available Lower Layer buffers\n    uint16_t    nb_buffer_avail;\n\n\tuint16_t    usedBufferNumber[BLE_CONNECTION_MAX];\n\t\n };\n\n/*\n * GLOBAL VARIABLE DECLARATIONS\n ****************************************************************************************\n */\nextern struct l2cm_env_tag l2cm_env;\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Acquire low layer LE ACL packet\n ****************************************************************************************\n */\nstatic __INLINE void l2cm_buffer_acquire(uint8_t conidx)\n{\n    l2cm_env.nb_buffer_avail--;\t\n\tl2cm_env.usedBufferNumber[conidx]++;\n#if TRACE_BLE_TX_BUFFER_USAGE\t\n\tTRACE(3, \"ble nb -- to %d coidx %d use buf ++ to %d\", l2cm_env.nb_buffer_avail,\n\t\tconidx, l2cm_env.usedBufferNumber[conidx]);\n#endif\n}\n\n/**\n ****************************************************************************************\n * @brief Release low layer LE ACL packet\n *\n * @parm[in] nb Number of buffer to release.\n ****************************************************************************************\n */\nstatic __INLINE void l2cm_buffer_release(uint8_t conidx, uint16_t nb)\n{\n\tif (l2cm_env.usedBufferNumber[conidx] < nb)\n\t{\n\t\tl2cm_env.nb_buffer_avail += l2cm_env.usedBufferNumber[conidx];\n\t\tl2cm_env.usedBufferNumber[conidx] = 0;\n\t}\n\telse\n\t{\n\t\tl2cm_env.nb_buffer_avail += nb;\n\t\tl2cm_env.usedBufferNumber[conidx] -= nb;\n\t}\n#if TRACE_BLE_TX_BUFFER_USAGE\t\n    TRACE(4, \"post ble nb ++ %d to %d coidx %d use buf -- to %d\", nb, l2cm_env.nb_buffer_avail,\n        conidx, l2cm_env.usedBufferNumber[conidx]);\n#endif\n}\n\nstatic __INLINE void l2cm_buffer_reset(uint8_t conidx)\n{\n#if TRACE_BLE_TX_BUFFER_USAGE\n\tTRACE(2, \"pre ble nb %d use buf %d\", l2cm_env.nb_buffer_avail,\n\t\t     l2cm_env.usedBufferNumber[conidx]);\n#endif\n\n\tl2cm_env.nb_buffer_avail += l2cm_env.usedBufferNumber[conidx];\n\tl2cm_env.usedBufferNumber[conidx] = 0;\n\n#if TRACE_BLE_TX_BUFFER_USAGE\t\n\tTRACE(3, \"post ble reset to %d conidx %d use buf to %d\", l2cm_env.nb_buffer_avail,\n\t\tconidx, l2cm_env.usedBufferNumber[conidx]);\t\n#endif\n}\n\n/**\n ****************************************************************************************\n * @brief Retrieve low layer LE ACL Buffers size\n *\n * @return size of LE ACL Buffers\n ****************************************************************************************\n */\nstatic __INLINE uint16_t l2cm_get_buffer_size(void)\n {\n     return l2cm_env.le_acl_data_pkt_len;\n }\n\n\n/**\n ****************************************************************************************\n * @brief Set if TX queue for specific connection is empty or not.\n *\n * If not empty, it will request L2CM to start transmission of buffers\n *\n * @param[in] conidx           Connection index\n * @param[in] busy             False if TX buffer queue is empty, True else\n *\n ****************************************************************************************\n */\nvoid l2cm_tx_status(uint8_t conidx, bool busy);\n\n/// @} L2CM_INT\n\n#endif //(BLE_L2CM)\n\n#endif // L2CM_INT_H_\n"
  },
  {
    "path": "services/ble_stack/ke/api/ke.h",
    "content": "#ifndef _KE_H_\n#define _KE_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ENV Environment\n * @ingroup KERNEL\n * @brief Kernel Environment\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"          // stack configuration\n\n#include               // standard boolean definitions\n#include                // standard integer definitions\n\n/*\n * ENUMERATION\n ****************************************************************************************\n */\n\n/// Kernel Error Status\nenum KE_STATUS\n{\n    KE_SUCCESS = 0,\n    KE_FAIL\n};\n\n\n/*\n * FUNCTION DECLARATIONS\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief This function performs all the initializations of the kernel.\n *\n * It initializes first the heap, then the message queues and the events. Then if required\n * it initializes the trace.\n *\n ****************************************************************************************\n */\nvoid ke_init(void);\n\n/**\n ****************************************************************************************\n * @brief This function flushes all messages, timers and events currently pending in the\n * kernel.\n *\n ****************************************************************************************\n */\nvoid ke_flush(void);\n\n/**\n ****************************************************************************************\n * @brief This function checks if sleep is possible or kernel is processing\n *\n * @return      True if sleep is allowed, false otherwise\n ****************************************************************************************\n */\nbool ke_sleep_check(void);\n\n#if (KE_PROFILING)\n/**\n ****************************************************************************************\n * @brief This function gets the statistics of the kernel usage.\n *\n * @param[out]   max_msg_sent      Max message sent\n * @param[out]   max_msg_saved     Max message saved\n * @param[out]   max_timer_used    Max timer used\n * @param[out]   max_heap_used     Max heap used\n ****************************************************************************************\n */\nenum KE_STATUS ke_stats_get(uint8_t* max_msg_sent,\n                uint8_t* max_msg_saved,\n                uint8_t* max_timer_used,\n                uint16_t* max_heap_used);\n#endif //KE_PROFILING\n\n/// @} KE\n\n#endif // _KE_H_\n"
  },
  {
    "path": "services/ble_stack/ke/api/ke_event.h",
    "content": "#ifndef _KE_EVENT_H_\n#define _KE_EVENT_H_\n\n/**\n ****************************************************************************************\n * @addtogroup EVT Events and Schedule\n * @ingroup KERNEL\n * @brief Event scheduling module.\n *\n * The KE_EVT module implements event scheduling functions. It can be used to\n * implement deferred actions.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"          // stack configuration\n\n#include        // standard integer definition\n\n\n/*\n * CONSTANTS\n ****************************************************************************************\n */\n\n\n/// Status of ke_task API functions\nenum KE_EVENT_STATUS\n{\n    KE_EVENT_OK = 0,\n    KE_EVENT_FAIL,\n    KE_EVENT_UNKNOWN,\n    KE_EVENT_CAPA_EXCEEDED,\n    KE_EVENT_ALREADY_EXISTS,\n};\n\n\n/*\n * TYPE DEFINITION\n ****************************************************************************************\n */\n\n\n\n\n/*\n * FUNCTION PROTOTYPES\n ****************************************************************************************\n */\n\n\n\n/**\n ****************************************************************************************\n * @brief Initialize Kernel event module.\n ****************************************************************************************\n */\nvoid ke_event_init(void);\n\n/**\n ****************************************************************************************\n * @brief Register an event callback.\n *\n * @param[in]  event_type       Event type.\n * @param[in]  p_callback       Pointer to callback function.\n *\n * @return                      Status\n ****************************************************************************************\n */\nuint8_t ke_event_callback_set(uint8_t event_type, void (*p_callback)(void));\n\n/**\n ****************************************************************************************\n * @brief Set an event\n *\n * This primitive sets one event. It will trigger the call to the corresponding event\n * handler in the next scheduling call.\n *\n * @param[in]  event_type      Event to be set.\n ****************************************************************************************\n */\nvoid ke_event_set(uint8_t event_type);\n\n/**\n ****************************************************************************************\n * @brief Clear an event\n *\n * @param[in]  event_type      Event to be cleared.\n ****************************************************************************************\n */\nvoid ke_event_clear(uint8_t event_type);\n\n/**\n ****************************************************************************************\n * @brief Get the status of an event\n *\n * @param[in]  event_type      Event to get.\n *\n * @return                     Event status (0: not set / 1: set)\n ****************************************************************************************\n */\nuint8_t ke_event_get(uint8_t event_type);\n\n/**\n ****************************************************************************************\n * @brief Get all event status\n *\n * @return                     Events bit field\n ****************************************************************************************\n */\nuint32_t ke_event_get_all(void);\n\n/**\n ****************************************************************************************\n * @brief Flush all pending events.\n ****************************************************************************************\n */\nvoid ke_event_flush(void);\n\n/**\n ****************************************************************************************\n * @brief Event scheduler entry point.\n *\n * This primitive is the entry point of Kernel event scheduling.\n ****************************************************************************************\n */\nvoid ke_event_schedule(void);\n\n\n\n/// @} EVT\n\n#endif //_KE_EVENT_H_\n"
  },
  {
    "path": "services/ble_stack/ke/api/ke_mem.h",
    "content": "#ifndef _KE_MEM_H_\n#define _KE_MEM_H_\n\n#include \"rwip_config.h\"     // IP configuration\n#include           // standard integer\n#include          // standard includes\n\n/**\n ****************************************************************************************\n * @defgroup MEM Memory\n * @ingroup KERNEL\n * @brief Heap management module.\n *\n * This module implements heap management functions that allow initializing heap,\n * allocating and freeing memory.\n *\n * @{\n ****************************************************************************************\n */\n\n// forward declarations\nstruct mblock_free;\n\n/**\n ****************************************************************************************\n * @brief Heap initialization.\n *\n * This function performs the following operations:\n * - sanity checks\n * - check memory allocated is at least large enough to hold two block descriptors to hold\n * start and end\n * - initialize the first and last descriptors\n * - save heap into kernel environment variable.\n *\n * @param[in]     type      Memory type.\n * @param[in|out] heap      Heap pointer\n * @param[in]     heap_size Size of the heap\n *\n *\n ****************************************************************************************\n */\nvoid ke_mem_init(uint8_t type, uint8_t* heap, uint16_t heap_size);\n\n/**\n ****************************************************************************************\n * @brief Allocation of a block of memory.\n *\n * Allocates a memory block whose size is size; if no memory is available return NULL\n *\n * @param[in] size Size of the memory area that need to be allocated.\n * @param[in] type Type of memory block\n *\n * @return A pointer to the allocated memory area.\n *\n ****************************************************************************************\n */\nvoid *ke_malloc(uint32_t size, uint8_t type);\n\n\n/**\n ****************************************************************************************\n * @brief Check if it's possible to allocate a block of memory with a specific size.\n *\n * @param[in] size Size of the memory area that need to be allocated.\n * @param[in] type Type of memory block\n *\n * @return True if memory block can be allocated, False else.\n *\n ****************************************************************************************\n */\nbool ke_check_malloc(uint32_t size, uint8_t type);\n\n/**\n ****************************************************************************************\n * @brief Freeing of a block of memory.\n *\n * Free the memory area pointed by mem_ptr : mark the block as free and insert it in\n * the pool of free block.\n *\n * @param[in] mem_ptr Pointer to the memory area that need to be freed.\n *\n ****************************************************************************************\n */\nvoid ke_free(void *mem_ptr);\n\n\n/**\n ****************************************************************************************\n * @brief Check if current heap is empty or not (not used)\n *\n * @param[in] type Type of memory heap block\n *\n * @return true if heap not used, false else.\n ****************************************************************************************\n */\nbool ke_mem_is_empty(uint8_t type);\n\n\n\n/**\n ****************************************************************************************\n * @brief Check if current pointer is free or not\n *\n * @param[in] mem_ptr pointer to a memory block\n *\n * @return true if already free, false else.\n ****************************************************************************************\n */\nbool ke_is_free(void* mem_ptr);\n\n#if (KE_PROFILING)\n\n/**\n ****************************************************************************************\n * @brief Retrieve memory usage of selected heap.\n *\n * @param[in] type Type of memory heap block\n *\n * @return current memory usage of current heap.\n ****************************************************************************************\n */\nuint16_t ke_get_mem_usage(uint8_t type);\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve max memory usage of all heap.\n * This command also resets max measured value.\n *\n * @return max memory usage of all heap.\n ****************************************************************************************\n */\nuint32_t ke_get_max_mem_usage(void);\n\n#endif // (KE_PROFILING)\n\n///@} MEM\n\n#endif // _KE_MEM_H_\n\n"
  },
  {
    "path": "services/ble_stack/ke/api/ke_msg.h",
    "content": "#ifndef _KE_MSG_H_\n#define _KE_MSG_H_\n\n/**\n ****************************************************************************************\n * @defgroup MSG Message Exchange\n * @ingroup KERNEL\n * @brief Message scheduling module.\n *\n * The MSG module implements message scheduling functions.\n\n * A kernel message has an ID, a receiver task ID and a source task ID.\n * In most cases, it also has parameters which are defined in\n * a structure dynamically embedded in the message structure,\n * so the whole message will be managed internally as one block.\n *\n * A message can also have one extra parameter which is referenced\n * in the normal parameter structure. This extra block is assumed\n * to be large by the kernel and will be moved by DMA if needed.\n * This feature allows moving MMPDU from LMAC to UMAC.\n *\n * In order to send a message, a function first have to allocate\n * the memory for this message. It can be done with the wrapper\n * macro KE_MSG_ALLOC() (which will call ke_msg_alloc()).\n\n * The message can then be sent with ke_msg_send(). The kernel\n * will take care of freeing the allocated memory.\n\n * If the message has no parameters, the ke_msg_send_basic() function\n * can be used.\n *\n * @{\n ****************************************************************************************\n */\n\n#include           // standard definition\n#include           // standard integer\n#include          // standard boolean\n#include \"arch.h\"            // architectural definition\n#include \"compiler.h\"        // compiler definition\n#include \"co_list.h\"         // list definition\n\n/// Task Identifier. Composed by the task type and the task index.\ntypedef uint16_t ke_task_id_t;\n\n/// Builds the task identifier from the type and the index of that task.\n#define KE_BUILD_ID(type, index) ( (ke_task_id_t)(((index) << 8)|(type)) )\n\n/// Retrieves task type from task id.\n#define KE_TYPE_GET(ke_task_id) ((ke_task_id) & 0xFF)\n\n/// Retrieves task index number from task id.\n#define KE_IDX_GET(ke_task_id) (((ke_task_id) >> 8) & 0xFF)\n\n/// Task State\ntypedef uint8_t ke_state_t;\n\n/// Message Identifier. The number of messages is limited to 0xFFFF.\n/// The message ID is divided in two parts:\n/// bits[15~8]: task index (no more than 255 tasks support)\n/// bits[7~0]: message index(no more than 255 messages per task)\ntypedef uint16_t ke_msg_id_t;\n\n/// Message structure.\nstruct ke_msg\n{\n    struct co_list_hdr hdr;     ///< List header for chaining\n\n    ke_msg_id_t     id;         ///< Message id.\n    ke_task_id_t    dest_id;    ///< Destination kernel identifier.\n    ke_task_id_t    src_id;     ///< Source kernel identifier.\n    uint16_t        param_len;  ///< Parameter embedded struct length.\n    uint32_t        param[__ARRAY_EMPTY];   ///< Parameter embedded struct. Must be word-aligned.\n};\n\n\n/// Status returned by a task when handling a message\nenum ke_msg_status_tag\n{\n    KE_MSG_CONSUMED = 0, ///< consumed, msg and ext are freed by the kernel\n    KE_MSG_NO_FREE,      ///< consumed, nothing is freed by the kernel\n    KE_MSG_SAVED,        ///< not consumed, will be pushed in the saved queue\n};\n\n/**\n ****************************************************************************************\n * @brief Convert a parameter pointer to a message pointer\n *\n * @param[in]  param_ptr Pointer to the parameter member of a ke_msg\n *                       Usually retrieved by a ke_msg_alloc()\n *\n * @return The pointer to the ke_msg\n ****************************************************************************************\n */\n__STATIC __INLINE struct ke_msg * ke_param2msg(void const *param_ptr)\n{\n    return (struct ke_msg*) (((uint8_t*)param_ptr) - offsetof(struct ke_msg, param));\n}\n\n/**\n ****************************************************************************************\n * @brief Convert a message pointer to a parameter pointer\n *\n * @param[in]  msg Pointer to the ke_msg.\n *\n * @return The pointer to the param member\n ****************************************************************************************\n */\n__STATIC __INLINE void * ke_msg2param(struct ke_msg const *msg)\n{\n    return (void*) (((uint8_t*) msg) + offsetof(struct ke_msg, param));\n}\n\n/**\n ****************************************************************************************\n * @brief Convenient wrapper to ke_msg_alloc()\n *\n * This macro calls ke_msg_alloc() and cast the returned pointer to the\n * appropriate structure. Can only be used if a parameter structure exists\n * for this message (otherwise, use ke_msg_send_basic()).\n *\n * @param[in] id        Message identifier\n * @param[in] dest      Destination Identifier\n * @param[in] src       Source Identifier\n * @param[in] param_str parameter structure tag\n *\n * @return Pointer to the parameter member of the ke_msg.\n ****************************************************************************************\n */\n#define KE_MSG_ALLOC(id, dest, src, param_str) \\\n    (struct param_str*) ke_msg_alloc(id, dest, src, sizeof(struct param_str))\n\n/**\n ****************************************************************************************\n * @brief Convenient wrapper to ke_msg_free()\n *\n * This macro calls ke_msg_free() with the appropriate msg pointer as parameter, according\n * to the message parameter pointer passed.\n *\n * @param[in] param_ptr parameter structure pointer\n ****************************************************************************************\n */\n#define KE_MSG_FREE(param_ptr) ke_msg_free(ke_param2msg((param_ptr)))\n\n/**\n ****************************************************************************************\n * @brief Convenient wrapper to ke_msg_alloc()\n *\n * This macro calls ke_msg_alloc() and cast the returned pointer to the\n * appropriate structure with a variable length. Can only be used if a parameter structure exists\n * for this message (otherwise, use ke_msg_send_basic()).Can only be used if the data array is\n * located at the end of the structure.\n *\n * @param[in] id        Message identifier\n * @param[in] dest      Destination Identifier\n * @param[in] src       Source Identifier\n * @param[in] param_str parameter structure tag\n * @param[in] length    length for the data\n *\n * @return Pointer to the parameter member of the ke_msg.\n ****************************************************************************************\n */\n#define KE_MSG_ALLOC_DYN(id, dest, src, param_str,length)  (struct param_str*)ke_msg_alloc(id, dest, src, \\\n    (sizeof(struct param_str) + (length)));\n\n/**\n ****************************************************************************************\n * @brief Allocate memory for a message\n *\n * This primitive allocates memory for a message that has to be sent. The memory\n * is allocated dynamically on the heap and the length of the variable parameter\n * structure has to be provided in order to allocate the correct size.\n *\n * Several additional parameters are provided which will be preset in the message\n * and which may be used internally to choose the kind of memory to allocate.\n *\n * The memory allocated will be automatically freed by the kernel, after the\n * pointer has been sent to ke_msg_send(). If the message is not sent, it must\n * be freed explicitly with ke_msg_free().\n *\n * Allocation failure is considered critical and should not happen.\n *\n * @param[in] id        Message identifier\n * @param[in] dest_id   Destination Task Identifier\n * @param[in] src_id    Source Task Identifier\n * @param[in] param_len Size of the message parameters to be allocated\n *\n * @return Pointer to the parameter member of the ke_msg. If the parameter\n *         structure is empty, the pointer will point to the end of the message\n *         and should not be used (except to retrieve the message pointer or to\n *         send the message)\n ****************************************************************************************\n */\nvoid *ke_msg_alloc(ke_msg_id_t const id, ke_task_id_t const dest_id,\n                   ke_task_id_t const src_id, uint16_t const param_len);\n\n/**\n ****************************************************************************************\n * @brief Message sending.\n *\n * Send a message previously allocated with any ke_msg_alloc()-like functions.\n *\n * The kernel will take care of freeing the message memory.\n *\n * Once the function have been called, it is not possible to access its data\n * anymore as the kernel may have copied the message and freed the original\n * memory.\n *\n * @param[in] param_ptr  Pointer to the parameter member of the message that\n *                       should be sent.\n ****************************************************************************************\n */\n\nvoid ke_msg_send(void const *param_ptr);\n\n/**\n ****************************************************************************************\n * @brief Basic message sending.\n *\n * Send a message that has a zero length parameter member. No allocation is\n * required as it will be done internally.\n *\n * @param[in] id        Message identifier\n * @param[in] dest_id   Destination Identifier\n * @param[in] src_id    Source Identifier\n ****************************************************************************************\n */\nvoid ke_msg_send_basic(ke_msg_id_t const id, ke_task_id_t const dest_id, ke_task_id_t const src_id);\n\n/**\n ****************************************************************************************\n * @brief Message forwarding.\n *\n * Forward a message to another task by changing its destination and source tasks IDs.\n *\n * @param[in] param_ptr  Pointer to the parameter member of the message that\n *                       should be sent.\n * @param[in] dest_id New destination task of the message.\n * @param[in] src_id New source task of the message.\n ****************************************************************************************\n */\nvoid ke_msg_forward(void const *param_ptr, ke_task_id_t const dest_id, ke_task_id_t const src_id);\n\n/**\n ****************************************************************************************\n * @brief Message forwarding.\n *\n * Forward a message to another task by changing its message ID and its destination and source tasks IDs.\n *\n * @param[in] param_ptr  Pointer to the parameter member of the message that\n *                       should be sent.\n * @param[in] msg_id  New ID of the message.\n * @param[in] dest_id New destination task of the message.\n * @param[in] src_id  New source task of the message.\n ****************************************************************************************\n */\nvoid ke_msg_forward_new_id(void const *param_ptr,\n                           ke_msg_id_t const msg_id, ke_task_id_t const dest_id, ke_task_id_t const src_id);\n\n/**\n ****************************************************************************************\n * @brief Free allocated message\n *\n * @param[in] msg   Pointer to the message to be freed (not the parameter member!)\n ****************************************************************************************\n */\nvoid ke_msg_free(struct ke_msg const *param);\n\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve destination task identifier of a kernel message\n *\n * @param[in] param_ptr  Pointer to the parameter member of the message.\n *\n * @return message destination task\n ****************************************************************************************\n */\nke_msg_id_t ke_msg_dest_id_get(void const *param_ptr);\n\n\n\n/**\n ****************************************************************************************\n * @brief Retrieve source task identifier of a kernel message\n *\n * @param[in] param_ptr  Pointer to the parameter member of the message.\n *\n * @return message source task\n ****************************************************************************************\n */\nke_msg_id_t ke_msg_src_id_get(void const *param_ptr);\n\n/**\n * Used to know if message is present in kernel queue or not.\n *\n * @param[in]  param_ptr  Pointer to the parameter member of the message.\n *\n * @return True if message is present in Kernel Queue, False else.\n */\nbool ke_msg_in_queue(void const *param_ptr);\n/// @} MSG\n\n#endif // _KE_MSG_H_\n"
  },
  {
    "path": "services/ble_stack/ke/api/ke_task.h",
    "content": "#ifndef _KE_TASK_H_\n#define _KE_TASK_H_\n\n/**\n ****************************************************************************************\n * @defgroup TASK Task and Process\n * @ingroup KERNEL\n * @brief Task management module.\n *\n * This module implements the functions used for managing tasks.\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include           // standard integer\n#include          // standard boolean\n\n#include \"rwip_config.h\"     // stack configuration\n#include \"compiler.h\"        // compiler defines, INLINE\n#include \"ke_msg.h\"          // kernel message defines\n \n/* Default Message handler code to handle several message type in same handler. */\n#define KE_MSG_DEFAULT_HANDLER  (0xFFFF)\n/* Invalid task */\n#define KE_TASK_INVALID         (0xFFFF)\n/* Used to know if a message is not present in kernel queue */\n#define KE_MSG_NOT_IN_QUEUE     ((struct co_list_hdr *) 0xFFFFFFFF)\n\n/// Status of ke_task API functions\nenum KE_TASK_STATUS\n{\n    KE_TASK_OK = 0,\n    KE_TASK_FAIL,\n    KE_TASK_UNKNOWN,\n    KE_TASK_CAPA_EXCEEDED,\n    KE_TASK_ALREADY_EXISTS,\n};\n\n\n#define MSG_T(msg)         ((ke_task_id_t)((msg) >> 8))\n#define MSG_I(msg)         ((msg) & ((1<<8)-1))\n\n/// Format of a task message handler function\ntypedef int (*ke_msg_func_t)(ke_msg_id_t const msgid, void const *param,\n                             ke_task_id_t const dest_id, ke_task_id_t const src_id);\n\n/// Macro for message handler function declaration or definition\n#define KE_MSG_HANDLER(msg_name, param_struct)   __STATIC int msg_name##_handler(ke_msg_id_t const msgid,     \\\n                                                                                param_struct const *param,  \\\n                                                                                ke_task_id_t const dest_id, \\\n                                                                                ke_task_id_t const src_id)\n\n#define KE_MSG_HANDLER_NO_STATIC(msg_name, param_struct)   int msg_name##_handler(ke_msg_id_t const msgid,     \\\n                                                                                param_struct const *param,  \\\n                                                                                ke_task_id_t const dest_id, \\\n                                                                                ke_task_id_t const src_id)\n\n/// Macro for message handlers table declaration or definition\n#define KE_MSG_HANDLER_TAB(task)   __STATIC const struct ke_msg_handler task##_msg_handler_tab[] =\n\n/// Element of a message handler table.\nstruct ke_msg_handler\n{\n    /// Id of the handled message.\n    ke_msg_id_t id;\n    /// Pointer to the handler function for the msgid above.\n    ke_msg_func_t func;\n};\n\n/// Element of a state handler table.\nstruct ke_state_handler\n{\n    /// Pointer to the message handler table of this state.\n    const struct ke_msg_handler *msg_table;\n    /// Number of messages handled in this state.\n    uint16_t msg_cnt;\n};\n\n/// Task descriptor grouping all information required by the kernel for the scheduling.\nstruct ke_task_desc\n{\n    /// Pointer to the message handler table\n    const struct ke_msg_handler* msg_handler_tab;\n    /// Pointer to the state table (one element for each instance).\n    ke_state_t* state;\n    /// Maximum index of supported instances of the task.\n    uint16_t idx_max;\n    /// Number of messages handled\n    uint16_t msg_cnt;\n};\n\n/*\n * FUNCTION PROTOTYPES\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Initialize Kernel task module.\n ****************************************************************************************\n */\nvoid ke_task_init(void);\n\n/**\n ****************************************************************************************\n * @brief Create a task.\n *\n * @param[in]  task_type       Task type.\n * @param[in]  p_task_desc     Pointer to task descriptor.\n *\n * @return                     Status\n ****************************************************************************************\n */\nuint8_t ke_task_create(uint8_t task_type, struct ke_task_desc const * p_task_desc);\n\n/**\n ****************************************************************************************\n * @brief Delete a task.\n *\n * @param[in]  task_type       Task type.\n *\n * @return                     Status\n ****************************************************************************************\n */\nuint8_t ke_task_delete(uint8_t task_type);\n\n/**\n ****************************************************************************************\n * @brief Retrieve the state of a task.\n *\n * @param[in]  id   Task id.\n *\n * @return          Current state of the task\n ****************************************************************************************\n */\nke_state_t ke_state_get(ke_task_id_t const id);\n\n/**\n ****************************************************************************************\n * @brief Set the state of the task identified by its Task Id.\n *\n * In this function we also handle the SAVE service: when a task state changes we\n * try to activate all the messages currently saved in the save queue for the given\n * task identifier.\n *\n * @param[in]  id          Identifier of the task instance whose state is going to be modified\n * @param[in]  state_id    New State\n *\n ****************************************************************************************\n */\nvoid ke_state_set(ke_task_id_t const id, ke_state_t const state_id);\n\n/**\n ****************************************************************************************\n * @brief Generic message handler to consume message without handling it in the task.\n *\n * @param[in] msgid Id of the message received (probably unused)\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id TaskId of the receiving task.\n * @param[in] src_id TaskId of the sending task.\n *\n * @return KE_MSG_CONSUMED\n ****************************************************************************************\n */\nint ke_msg_discard(ke_msg_id_t const msgid, void const *param,\n                   ke_task_id_t const dest_id, ke_task_id_t const src_id);\n\n/**\n ****************************************************************************************\n * @brief Generic message handler to consume message without handling it in the task.\n *\n * @param[in] msgid Id of the message received (probably unused)\n * @param[in] param Pointer to the parameters of the message.\n * @param[in] dest_id TaskId of the receiving task.\n * @param[in] src_id TaskId of the sending task.\n *\n * @return KE_MSG_CONSUMED\n ****************************************************************************************\n */\nint ke_msg_save(ke_msg_id_t const msgid, void const *param,\n                ke_task_id_t const dest_id, ke_task_id_t const src_id);\n\n\n\n/**\n ****************************************************************************************\n * @brief This function flushes all messages, currently pending in the kernel for a\n * specific task.\n *\n * @param[in] task The Task Identifier that shall be flushed.\n ****************************************************************************************\n */\nvoid ke_task_msg_flush(ke_task_id_t task);\n\n\n/**\n ****************************************************************************************\n * @brief Check validity of a task. If task type or task instance does not exist,\n * return invalid task\n *\n * @param[in] task Task Identifier to check.\n *\n * @return Task identifier if valid, invalid identifier else.\n ****************************************************************************************\n */\nke_task_id_t ke_task_check(ke_task_id_t task);\n\nvoid ke_task_msg_retrieve(ke_task_id_t const id);\n\n/// @} TASK\n\n#endif // _KE_TASK_H_\n\n"
  },
  {
    "path": "services/ble_stack/ke/api/ke_timer.h",
    "content": "#ifndef _KE_TIMER_H_\n#define _KE_TIMER_H_\n\n/**\n ****************************************************************************************\n * @defgroup TIMER BT Time\n * @ingroup KERNEL\n * @brief Timer management module.\n *\n * This module implements the functions used for managing kernel timers.\n *\n ****************************************************************************************\n */\n\n#include \"rwip_config.h\"          // stack configuration\n#include \"ke_msg.h\"               // messaging definition\n\n\n/*\n * DEFINITIONS\n ****************************************************************************************\n */\n\n///  Convert timer from second to timer accuracy (10ms)\n#define KE_TIME_IN_SEC(_time) (_time * 100)\n\n\n/*\n * TYPE DEFINITIONS\n ****************************************************************************************\n */\n\n/// Timer Object\nstruct ke_timer\n{\n    /// next ke timer\n    struct ke_timer *next;\n    /// message identifier\n    ke_msg_id_t     id;\n    /// task identifier\n    ke_task_id_t    task;\n    /// time value\n    uint32_t        time;\n};\n\n\n/*\n * FUNCTION PROTOTYPES\n ****************************************************************************************\n */\n\n\n/**\n ****************************************************************************************\n * @brief Initialize Kernel timer module.\n ****************************************************************************************\n */\nvoid ke_timer_init(void);\n\n/**\n ****************************************************************************************\n * @brief Set a timer.\n *\n * The function first cancel the timer if it is already existing, then\n * it creates a new one. The timer can be one-shot or periodic, i.e. it\n * will be automatically set again after each trigger.\n *\n * When the timer expires, a message is sent to the task provided as\n * argument, with the timer id as message id.\n *\n * The timer is programmed in time units (TU is 10ms).\n *\n * @param[in] timer_id      Timer identifier (message identifier type).\n * @param[in] task_id       Task identifier which will be notified\n * @param[in] delay         Delay in time units.\n ****************************************************************************************\n */\nvoid ke_timer_set(ke_msg_id_t const timer_id, ke_task_id_t const task, uint32_t delay);\n\n/**\n ****************************************************************************************\n * @brief Remove an registered timer.\n *\n * This function search for the timer identified by its id and its task id.\n * If found it is stopped and freed, otherwise an error message is returned.\n *\n * @param[in] timer_id  Timer identifier.\n * @param[in] task      Task identifier.\n ****************************************************************************************\n */\nvoid ke_timer_clear(ke_msg_id_t const timerid, ke_task_id_t const task);\n\n/**\n ****************************************************************************************\n * @brief Checks if a requested timer is active.\n *\n * This function pops the first timer from the timer queue and notifies the appropriate\n * task by sending a kernel message. If the timer is periodic, it is set again;\n * if it is one-shot, the timer is freed. The function checks also the next timers\n * and process them if they have expired or are about to expire.\n ****************************************************************************************\n */\nbool ke_timer_active(ke_msg_id_t const timer_id, ke_task_id_t const task_id);\n\n/**\n ****************************************************************************************\n * @brief Adjust all kernel timers by specified adjustment delay.\n *\n * This function updates all timers to align to a new SCLK after a system clock adjust.\n ****************************************************************************************\n */\nvoid ke_timer_adjust_all(uint32_t delay);\n\n/**\n ****************************************************************************************\n * @brief Compute the authorized sleep time until next kernel timer event\n * \n * The function takes as argument the current time to compute the sleep time.\n * \n * if some timer are programmed it return the sleep time between current time and \n * first timer expiration.\n * \n * If there is no timer programmed, function return false meaning that platform should not \n * consider the kernel timer to decide the sleep time duration.\n * \n * @param[in]     current_time   Current system time\n * @param[out]    sleep_time     Computed sleep duration\n *\n * @return true sleep time has been computed ; false if there is no programed timer, \n           meaning that sleep_time is not relevant and can be ignored.\n ****************************************************************************************\n */\nbool ke_sleep_time_get(uint32_t current_time, int32_t* sleep_time);\n\nbool ke_timer_is_active(void);\n\n\n/// @} TIMER\n\n#endif // _KE_TIMER_H_\n"
  },
  {
    "path": "services/ble_stack/ke/src/ke_env.h",
    "content": "#ifndef _KE_ENV_H_\n#define _KE_ENV_H_\n\n/**\n ****************************************************************************************\n * @addtogroup ENV Environment\n * @ingroup KERNEL\n * @brief Kernel Environment\n *\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"rwip_config.h\"          // stack configuration\n#include \"ke_event.h\"             // kernel event\n#include \"co_list.h\"              // kernel queue definition\n\n// forward declaration\nstruct mblock_free;\n\n/// Kernel environment definition\nstruct ke_env_tag\n{\n    /// Queue of sent messages but not yet delivered to receiver\n    struct co_list queue_sent;\n    /// Queue of messages delivered but not consumed by receiver\n    struct co_list queue_saved;\n    /// Queue of timers\n    struct co_list queue_timer;\n\n    /// Root pointer = pointer to first element of heap linked lists\n    struct mblock_free * heap[KE_MEM_BLOCK_MAX];\n    /// Size of heaps\n    uint16_t heap_size[KE_MEM_BLOCK_MAX];\n\n    #if (KE_PROFILING)\n    /// Size of heap used\n    uint16_t heap_used[KE_MEM_BLOCK_MAX];\n    /// Maximum heap memory used\n    uint32_t max_heap_used;\n    #endif //KE_PROFILING\n};\n\n/// Kernel environment\nextern struct ke_env_tag ke_env;\n\n/// @} ENV\n\n#endif // _KE_ENV_H_\n"
  },
  {
    "path": "services/ble_stack/ke/src/ke_queue.h",
    "content": "#ifndef _KE_QUEUE_H_\n#define _KE_QUEUE_H_\n\n/**\n ****************************************************************************************\n * @addtogroup QUEUE Queues and Lists\n * @ingroup KERNEL\n * @brief Queue management module\n *\n * This module implements the functions used for managing message queues.\n * These functions must not be called under IRQ!\n * @{\n ****************************************************************************************\n */\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include               // standard integer\n#include              // standard boolean\n#include \"compiler.h\"            // compiler definitions\n#include \"co_list.h\"             // list definition\n\n/*\n * FUNCTION PROTOTYPES\n ****************************************************************************************\n */\n\n/**\n ****************************************************************************************\n * @brief Pop entry to the queue\n *\n * @param[in]  queue    Pointer to the queue.\n * @param[in]  element  Pointer to the element.\n ****************************************************************************************\n */\n__STATIC __INLINE void ke_queue_push(struct co_list *const queue, struct co_list_hdr *const element)\n{\n    co_list_push_back(queue, element);\n}\n\n/**\n ****************************************************************************************\n * @brief push entry to the front of queue\n *\n * @param[in]  queue    Pointer to the queue.\n * @param[in]  element  Pointer to the element.\n ****************************************************************************************\n */\n__STATIC __INLINE void ke_queue_push_front(struct co_list *const queue, struct co_list_hdr *const element)\n{\n    co_list_push_front(queue, element);\n}\n\n/**\n ****************************************************************************************\n * @brief Pop entry from the queue\n *\n * @param[in]  queue    Pointer to the queue.\n *\n * @return              Pointer to the element.\n ****************************************************************************************\n */\n__STATIC __INLINE struct co_list_hdr *ke_queue_pop(struct co_list *const queue)\n{\n    return co_list_pop_front(queue);\n}\n\n/**\n ****************************************************************************************\n * @brief Extracts an element matching a given algorithm.\n *\n * @param[in]  queue    Pointer to the queue.\n * @param[in]  func     Matching function.\n * @param[in]  arg      Match argument.\n *\n * @return              Pointer to the element found and removed (NULL otherwise).\n ****************************************************************************************\n */\nstruct co_list_hdr *ke_queue_extract(struct co_list * const queue,\n                                 bool (*func)(struct co_list_hdr const * elmt, uint32_t arg),\n                                 uint32_t arg);\n\n/**\n ****************************************************************************************\n * @brief Insert an element in a sorted queue.\n *\n * This primitive use a comparison function from the parameter list to select where the\n * element must be inserted.\n *\n * @param[in]  queue    Pointer to the queue.\n * @param[in]  element  Pointer to the element to insert.\n * @param[in]  cmp      Comparison function (return true if first element has to be inserted\n *                      before the second one).\n *\n * @return              Pointer to the element found and removed (NULL otherwise).\n ****************************************************************************************\n */\nvoid ke_queue_insert(struct co_list * const queue, struct co_list_hdr * const element,\n                     bool (*cmp)(struct co_list_hdr const *elementA,\n                     struct co_list_hdr const *elementB));\n\n/// @} QUEUE\n\n#endif // _KE_QUEUE_H_\n"
  },
  {
    "path": "services/bridge/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nifeq ($(ENHANCED_STACK),1)\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)bridge_v2.c))\nelse\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)bridge.c))\nendif\n\nBTBRIDGE_LIB_NAME := $(CHIP)_libbridge\n\nifeq ($(HFP_1_6_ENABLE), 1)\nBTBRIDGE_LIB_NAME := $(BTBRIDGE_LIB_NAME)_sbc_enc\nendif\n\n$(BTBRIDGE_LIB_NAME)-y := $(obj_c:.c=.o)\n\nobj-y := $(BTBRIDGE_LIB_NAME).a\n\nPROF_INC :=\n\n\nsubdir-ccflags-y += \\\n\t-Iservices/bridge/ \\\n\t-Iservices/ble_stack/common/api/ \\\n\t-Iservices/ble_stack/hl/inc/ \\\n\t-Iservices/ble_stack/hl/api/ \\\n\t-Iservices/ble_stack/hl/src/gap/ \\\n\t-Iservices/ble_stack/hl/src/gap/gapc/ \\\n\t-Iservices/ble_stack/hl/src/gap/gapm/ \\\n\t-Iservices/ble_stack/hl/src/gap/smpc/ \\\n\t-Iservices/ble_stack/ke/api/ \\\n\t-Iservices/ble_stack/ke/src/ \\\n\t-Iservices/ble_stack/hl/src/gatt/attc/ \\\n\t-Iservices/ble_stack/hl/src/gatt/attm/ \\\n\t-Iservices/ble_stack/hl/src/gatt/atts/ \\\n\t-Iservices/ble_stack/hl/src/gatt/gattc/ \\\n\t-Iservices/ble_stack/hl/src/gatt/gattm/ \\\n\t-Iservices/ble_stack/hl/src/gatt/ \\\n\t-Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n\t-Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n\t-Iservices/ble_stack/hci/api/ \\\n\t-Iservices/ble_stack/hci/src/ \\\n\t-Iservices/ble_stack/dbg/api/ \\\n\t-Iservices/ble_stack/dbg/src/ \\\n\t-Iservices/ble_stack/ble_ip/ \\\n\t-Iutils/intersyshci/ \\\n\t-Iplatform/drivers/bt/ \\\n\t-Iservices/bt_app/ \\\n\t-Iservices/osif/ \\\n\t$(BT_IF_INCLUDES) \\\n\t$(BT_PROFILES_INCLUDES)\n\n\n"
  },
  {
    "path": "services/bridge/bridge.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BRIDGE_H__\n#define __BRIDGE_H__\n\n#if !defined(ENHANCED_STACK)\n#include \"hci.h\"\n#endif\n\n#include \"ke_msg.h\"\n\n#if defined(ENHANCED_STACK)\n\ntypedef struct {\n    uint8_t *buffer;\n    uint16_t buffer_len;\n    uint8_t *priv;\n    uint16_t conn_handle_flags;\n} BridgeBuffer;\n\ntypedef struct {\n    U8 *param;\n    U8 param_len;\n    uint8_t event;\n    BridgeBuffer *rx_buff;\n} BridgeEvent;\n\n#else\n\ntypedef HciEvent BridgeEvent;\ntypedef HciBuffer BridgeBuffer;\n\n#endif /* ENHANCED_STACK */\n\nvoid bridge_hcif_send_acl(struct ke_msg *msg);\nvoid bridge_hcif_recv_acl(BridgeBuffer * pBuffer);\nvoid bridge_free_rx_buffer(BridgeBuffer *pBuffer);\nvoid bridge_free_tx_buffer(BridgeBuffer *pBuffer);\nvoid bridge_hci_ble_event(const BridgeEvent* event);\nuint8_t bridge_is_cmd_opcode_supported(uint16_t opcode);\nvoid bridge_free_token(void * token);\nU8 bridge_check_ble_handle_valid(U16 handle);\nvoid bridge_hcif_send_cmd(struct ke_msg *msg);\n\n#endif\n"
  },
  {
    "path": "services/bt_app/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\n\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\nifeq ($(VOICE_DATAPATH_TYPE),gsound)\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)/app_voice/app_$(VOICE_DATAPATH_TYPE)/*.cpp))\nendif\n\nobj_snd := $(patsubst $(cur_dir)%,%,$(wildcard ../../config/_default_cfg_src_/res/$(AUDIO)/*))\n\nobj-y := $(obj_snd:=.snd.o) $(obj_snd:=.snd.cpp) $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nobj-y += a2dp_codecs/\n\nifeq ($(A2DP_AAC_ON),1)\nAAC_INCLUDES =  \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libAACdec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libAACenc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libFDK/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libMpegTPDec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libMpegTPEnc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libPCMutils/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSBRdec/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSBRenc/include \\\n\t-Iservices/multimedia/audio/codec/fdkaac_codec/libSYS/include\nelse\nAAC_INCLUDES =\nendif\n\nccflags-y += \\\n\t$(AAC_INCLUDES) \\\n\t-Iservices/osif \\\n\t-Iservices/audio_process \\\n\t-Iservices/audio_dump/include \\\n\t-Iservices/hw_dsp/inc \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/fs/fat/ChaN \\\n\t$(BT_IF_INCLUDES) \\\n\t$(BT_PROFILES_INCLUDES) \\\n\t-Iservices/multimedia/speech/inc \\\n\t-Iservices/bone_sensor/lis25ba \\\n\t-Iservices/overlay \\\n\t-Ithirdparty/tile/tile_common/tile_storage \\\n\t-Iservices/nvrecord \\\n\t-Iservices/resources \\\n\t-Iservices/multimedia/rbcodec \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/audio/process/drc/include \\\n\t-Iservices/multimedia/audio/process/anc/include\\\n\t-Iservices/nv_section/aud_section \\\n\t-Iservices/nv_section/userdata_section \\\n\t-Iservices/nv_section/include \\\n\t-Iservices/voicepath/$(VOICE_DATAPATH_TYPE) \\\n\t-Iservices/voicepath/gsound/gsound_target \\\n\t-Iservices/voicepath/gsound/gsound_custom/inc \\\n\t-Iservices/voicepath/gsound/gsound_target_api_read_only \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/cmsis \\\n\t-Iplatform/drivers/bt \\\n\t-Iutils/cqueue \\\n\t-Iutils/heap \\\n\t-Iservices/audioflinger \\\n\t-Iutils/lockcqueue \\\n\t-Iutils/intersyshci \\\n\t-Iapps/anc/inc \\\n\t-Iapps/key \\\n\t-Iapps/main \\\n\t-Iapps/mic_alg \\\n\t-Iapps/common \\\n\t-Iapps/audioplayers \\\n\t-Iapps/audioplayers/a2dp_decoder \\\n\t-Iapps/battery \\\n\t-Iapps/common \\\n\t-Iapps/factory \\\n\t-Iservices/app_ibrt/inc \\\n\t-Iservices/ble_app \\\n\t-Iutils/hwtimer_list \\\n\t-Iservices/ibrt_core/inc \\\n\t-Iservices/ibrt_ui/inc \\\n\t-Iservices/ble_stack/ble_ip \\\n\t-Iservices/ble_stack/hl/api \\\n\t-Iservices/ble_stack/app/api/  \\\n\t-Iservices/ble_stack/common/api/ \\\n\t-Iservices/ble_stack/hl/inc/ \\\n\t-Iservices/ble_stack/ke/api \\\n\t-Iservices/voicepath \\\n\t-Ithirdparty/userapi \\\n\t-Iservices/ble_app/app_gfps \\\n\t-Iservices/ble_app/app_main \\\n\t-Ithirdparty/audio_codec_lib/liblhdc-dec/inc \\\n\t-Iservices/ai_voice/manager \\\n\t-Iservices/ai_voice/audio \\\n\t-Iservices/ai_voice/transport \\\n\t-Iservices/app_ai/inc \\\n\t-Iservices/interconnection/red \\\n\t-Iservices/interconnection/green \\\n\t-Iservices/interconnection/umm_malloc \\\n\t-Iservices/bt_app \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n\t-Iservices/multimedia/audio/process/adj_mc/inc \\\n\t-Iservices/bt_app/a2dp_codecs/include \\\n\t-Ithirdparty/tile/tile_target \\\n\t-Iservices/osif \\\n    -Iservices/app_tws/inc \\\n\t-Iout/$(T)/config/_default_cfg_src_\n\nifeq ($(GATT_OVER_BR_EDR),1)\nccflags-y += -Iservices/ble_stack/hl/src/l2c/l2cm\nendif\n\nifeq ($(ANC_NOISE_TRACKER),1)\nccflags-y += \\\n\t-Ithirdparty/noise_tracker_lib \\\n\t-Ithirdparty/userapi/noise_tracker_app\nendif\n\nifeq ($(BTUSB_AUDIO_MODE),1)\nccflags-y += -Iapps/btusbaudio\nendif\n\nifeq ($(BT_USB_AUDIO_DUAL_MODE),1)\nccflags-y += -Iapps/btusbaudio\nccflags-y += $(BT_PROFILES_INCLUDES)\nendif\n\nifeq ($(INTERCONNECTION),1)\nccflags-y += $(BT_PROFILES_INCLUDES)\nendif\n\nifeq ($(INTERACTION),1)\nccflags-y += $(BT_PROFILES_INCLUDES)\nendif\n\nCFLAGS_app_bt_stream.o += -DAUDIO_OUTPUT_VOLUME_DEFAULT=$(AUDIO_OUTPUT_VOLUME_DEFAULT)\n\nifeq ($(A2DP_LDAC_ON),1)\nccflags-y += -Ithirdparty/audio_codec_lib/ldac/inc\nendif\n\nifeq ($(RB_CODEC),1)\nccflags-y += -DRB_CODEC\nendif\n\nifeq ($(TEST_OVER_THE_AIR),1)\nccflags-y += -Iservices/tota\nendif\n\nifeq ($(IBRT),1)\nccflags-y += -Iservices/ibrt/inc\nendif\n\n\nifeq ($(AUDIO_QUEUE_SUPPORT),1)\nCFLAGS_app_bt_media_manager.o += -D__AUDIO_QUEUE_SUPPORT__\nendif\n\nCFLAGS_besmain.o += -DBUILD_HOSTNAME=$(BUILD_HOSTNAME) -DBUILD_USERNAME=$(BUILD_USERNAME)\n\nifeq ($(SPEECH_TX_AEC),1)\nCFLAGS_app_bt_stream.o += -DSPEECH_TX_AEC\nCFLAGS_app_hfp.o += -DSPEECH_TX_AEC\nendif\n\nifeq ($(SPEECH_TX_NS),1)\nCFLAGS_app_bt_stream.o += -DSPEECH_TX_NS\nCFLAGS_app_hfp.o += -DSPEECH_TX_NS\nendif\n\nifeq ($(AUDIO_INPUT_MONO),1)\nCFLAGS_app_bt_stream.o += -D__AUDIO_INPUT_MONO_MODE__\nendif\n\nifeq ($(AUDIO_OUTPUT_MONO),1)\nCFLAGS_app_bt_stream.o += -D__AUDIO_OUTPUT_MONO_MODE__\nendif\n\nifeq ($(AUDIO_OUTPUT_SW_GAIN),1)\nCFLAGS_app_bt_stream.o += -DAUDIO_OUTPUT_SW_GAIN\nendif\n\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_app_bt_stream.o += -D__AUDIO_RESAMPLE__\nendif\nifeq ($(SW_PLAYBACK_RESAMPLE),1)\nCFLAGS_app_bt_stream.o += -DSW_PLAYBACK_RESAMPLE\nendif\nifeq ($(SW_CAPTURE_RESAMPLE),1)\nCFLAGS_app_bt_stream.o += -DSW_CAPTURE_RESAMPLE\nendif\nifeq ($(SW_SCO_RESAMPLE),1)\nCFLAGS_app_bt_stream.o += -DSW_SCO_RESAMPLE\nendif\nifeq ($(NO_SCO_RESAMPLE),1)\nCFLAGS_app_bt_stream.o += -DNO_SCO_RESAMPLE\nendif\nifeq ($(RESAMPLE_ANY_SAMPLE_RATE),1)\nCFLAGS_app_bt_stream.o += -DRESAMPLE_ANY_SAMPLE_RATE\nendif\n\nifeq ($(BT_XTAL_SYNC),1)\nCFLAGS_app_bt_stream.o += -DBT_XTAL_SYNC\nendif\n\nifeq ($(AUDIO_SPECTRUM),1)\nCFLAGS_app_bt_stream.o += -D__AUDIO_SPECTRUM__\nendif\n\nifeq ($(HW_FIR_EQ_PROCESS),1)\nCFLAGS_app_bt_stream.o += -D__HW_FIR_EQ_PROCESS__\nendif\n\nifeq ($(HW_IIR_EQ_PROCESS),1)\nCFLAGS_app_bt_stream.o += -D__HW_IIR_EQ_PROCESS__\nendif\n\nifeq ($(SW_IIR_EQ_PROCESS),1)\nCFLAGS_app_bt_stream.o += -D__SW_IIR_EQ_PROCESS__\nendif\n\nifeq ($(HW_DAC_IIR_EQ_PROCESS),1)\nCFLAGS_app_bt_stream.o += -D__HW_DAC_IIR_EQ_PROCESS__\nendif\n\nifeq ($(ANC_APP),1)\nCFLAGS_app_bt_stream.o += -DANC_APP\nCFLAGS_app_media_player.o += -DANC_APP\nendif\n\nifeq ($(ANC_WNR_ENABLED),1)\nCFLAGS_app_bt_stream.o += -DANC_WNR_ENABLED\nendif\n\nMUSIC_DELAY_CONTROL ?= 1\n\nifeq ($(MUSIC_DELAY_CONTROL),1)\nCFLAGS_app_bt_stream.o += -DMUSIC_DELAY_CONTROL\nendif\n\nifeq ($(A2DP_EQ_24BIT),1)\nCFLAGS_app_bt_stream.o += -DA2DP_EQ_24BIT\nCFLAGS_app_ring_merge.o += -DA2DP_EQ_24BIT\nendif\n\nifeq ($(APP_MUSIC_26M),1)\nCFLAGS_app_bt_stream.o += -DAPP_MUSIC_26M\nendif\n\nifeq ($(AUDIO_DRC),1)\nccflags-y += -D__AUDIO_DRC__\nendif\n\nifeq ($(AUDIO_DRC2),1)\nccflags-y += -D__AUDIO_DRC2__\nendif\n\nifeq ($(SPEECH_TX_AEC_CODEC_REF),1)\nCFLAGS_app_bt_stream.o += -DSPEECH_TX_AEC_CODEC_REF\nendif\n\nifeq ($(SPEECH_RX_24BIT),1)\nCFLAGS_app_bt_stream.o += -DSPEECH_RX_24BIT\nendif\n\nifeq ($(ANC_NOISE_TRACKER),1)\nCFLAGS_app_bt_stream.o += -DANC_NOISE_TRACKER\nendif\n\nifeq ($(SNIFF_MODE_CHECK),1)\nCFLAGS_app_a2dp.o += -D__SNIFF_MODE_CHECK__\nendif\n\nifeq ($(MEDIA_PLAY_24BIT),1)\nCFLAGS_app_media_player.o += -DMEDIA_PLAY_24BIT\nendif\n"
  },
  {
    "path": "services/bt_app/a2dp_codecs/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_s += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*/*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*/*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*/*.cpp))\n\nA2DPCODECS_LIB_NAME := lib_a2dpcodecs\n\nobj-y += $(A2DPCODECS_LIB_NAME).a\n\n$(A2DPCODECS_LIB_NAME)-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nCFLAGS_a2dp_codec_ldac.o += -Ithirdparty/audio_codec_lib/ldac/inc\n\nsubdir-ccflags-y += \\\n\t-Iservices/audio_process \\\n\t-Iservices/hw_dsp/inc \\\n\t-Iservices/fs/fat \\\n\t-Iservices/fs/sd \\\n\t-Iservices/fs/fat/ChaN \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iservices/multimedia/speech/inc \\\n\t-Iservices/bone_sensor/lis25ba \\\n\t-Iservices/overlay \\\n\t-Iservices/nvrecord \\\n\t-Iservices/resources \\\n\t-Iservices/multimedia/rbcodec \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/multimedia/audio/process/drc/include \\\n\t-Iservices/multimedia/audio/process/anc/include\\\n\t-Iservices/nv_section/aud_section \\\n\t-Iservices/nv_section/userdata_section \\\n  \t-Iservices/nv_section/include   \\\n\t-Iservices/voicepath/$(VOICE_DATAPATH_TYPE) \\\n\t-Iservices/voicepath/gsound \\\n\t-Iplatform/drivers/uarthci \\\n\t-Iplatform/drivers/ana \\\n\t-Iplatform/cmsis \\\n\t-Iplatform/drivers/bt \\\n\t-Iutils/cqueue \\\n\t-Iutils/heap \\\n\t-Iservices/audioflinger \\\n\t-Iutils/lockcqueue \\\n\t-Iutils/intersyshci \\\n\t-Iapps/anc/inc \\\n\t-Iapps/key \\\n\t-Iapps/main \\\n\t-Iapps/common \\\n\t-Iapps/audioplayers \\\n\t-Iapps/audioplayers/a2dp_decoder \\\n\t-Iapps/battery \\\n\t-Iapps/common \\\n\t-Iapps/factory \\\n\t-Iservices/app_ibrt/inc \\\n\t-Iservices/ble_app \\\n\t-Iutils/hwtimer_list \\\n\t-Iservices/ibrt_ui/inc \\\n\t-Iservices/ibrt_core/inc \\\n\t-Iservices/ble_stack/ble_ip \\\n\t-Iservices/ble_stack/hl/api \\\n\t-Iservices/ble_stack/app/api/  \\\n\t-Iservices/ble_stack/common/api/ \\\n\t-Iservices/ble_stack/hl/inc/ \\\n\t-Iservices/ble_stack/ke/api \\\n\t-Iservices/voicepath \\\n\t-Ithirdparty/userapi \\\n\t-Iservices/ble_app/app_gfps \\\n\t-Iservices/ble_app/app_main \\\n\t-Ithirdparty/audio_codec_lib/liblhdc-dec/inc \\\n\t-Iservices/ai_voice/manager \\\n\t-Iservices/ai_voice/audio \\\n\t-Iservices/ai_voice/transport \\\n\t-Iservices/app_ai/inc \\\n\t-Iservices/interconnection/red \\\n\t-Iservices/interconnection/green \\\n\t-Iservices/interconnection/umm_malloc \\\n\t-Iservices/bt_app \\\n\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n\t-Iservices/bt_app/a2dp_codecs/include\n"
  },
  {
    "path": "services/bt_app/a2dp_codecs/aac/a2dp_codec_aac.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"a2dp_api.h\"\n#include \"analog.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"bt_drv_interface.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hci_api.h\"\n#include \"resources.h\"\n#include \"tgt_hardware.h\"\n\n#include \"a2dp_codec_aac.h\"\n#include \"avdtp_api.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\n\n#if defined(A2DP_AAC_ON)\n\n#ifdef __A2DP_AVDTP_CP__\nbtif_avdtp_content_prot_t a2dp_aac_avdtpCp[BT_DEVICE_NUM];\nU8 a2dp_avdtpCp_aac_securityData[BT_DEVICE_NUM][BTIF_AVDTP_MAX_CP_VALUE_SIZE] =\n    {};\n#endif\n\nbtif_avdtp_codec_t a2dp_aac_avdtpcodec;\n\nconst unsigned char a2dp_codec_aac_elements[A2DP_AAC_OCTET_NUMBER] = {\n    A2DP_AAC_OCTET0_MPEG2_AAC_LC, A2DP_AAC_OCTET1_SAMPLING_FREQUENCY_44100,\n    A2DP_AAC_OCTET2_CHANNELS_1 | A2DP_AAC_OCTET2_CHANNELS_2 |\n        A2DP_AAC_OCTET2_SAMPLING_FREQUENCY_48000,\n    A2DP_AAC_OCTET3_VBR_SUPPORTED | ((MAX_AAC_BITRATE >> 16) & 0x7f),\n    /* left bit rate 0 for unkown */\n    (MAX_AAC_BITRATE >> 8) & 0xff, (MAX_AAC_BITRATE)&0xff};\n\nbtif_avdtp_codec_t *app_a2dp_codec_get_aac_avdtp_codec() {\n  return (btif_avdtp_codec_t *)&a2dp_aac_avdtpcodec;\n}\n\nbt_status_t a2dp_codec_aac_init(int index) {\n  bt_status_t st;\n  struct BT_DEVICE_T *bt_dev = &app_bt_device;\n\n#ifdef __A2DP_AVDTP_CP__\n  a2dp_aac_avdtpCp[index].cpType = BTIF_AVDTP_CP_TYPE_SCMS_T;\n  a2dp_aac_avdtpCp[index].data = (U8 *)&a2dp_avdtpCp_aac_securityData[index][0];\n  a2dp_aac_avdtpCp[index].dataLen = 0;\n#endif\n\n  a2dp_aac_avdtpcodec.codecType = BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC;\n  a2dp_aac_avdtpcodec.discoverable = 1;\n  a2dp_aac_avdtpcodec.elements = (U8 *)&a2dp_codec_aac_elements;\n  a2dp_aac_avdtpcodec.elemLen = sizeof(a2dp_codec_aac_elements);\n\n#ifdef __A2DP_AVDTP_CP__\n  st = btif_a2dp_register(bt_dev->a2dp_aac_stream[index]->a2dp_stream,\n                          BTIF_A2DP_STREAM_TYPE_SINK, &a2dp_aac_avdtpcodec,\n                          &a2dp_aac_avdtpCp[index], 1, index, a2dp_callback);\n  btif_a2dp_add_content_protection(bt_dev->a2dp_aac_stream[index]->a2dp_stream,\n                                   &a2dp_aac_avdtpCp[index]);\n#else\n  st = btif_a2dp_register(bt_dev->a2dp_aac_stream[index]->a2dp_stream,\n                          BTIF_A2DP_STREAM_TYPE_SINK, &a2dp_aac_avdtpcodec,\n                          NULL, 1, index, a2dp_callback);\n#endif\n\n  return st;\n}\n\n#endif /* A2DP_AAC_ON */\n"
  },
  {
    "path": "services/bt_app/a2dp_codecs/app_a2dp_codecs.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"a2dp_api.h\"\n#include \"analog.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"bt_drv_interface.h\"\n#include \"cqueue.h\"\n#include \"hci_api.h\"\n#include \"resources.h\"\n#include \"tgt_hardware.h\"\n\n#define _FILE_TAG_ \"A2DP\"\n#include \"app_bt_func.h\"\n#include \"color_log.h\"\n#include \"os_api.h\"\n\n#if (A2DP_DECODER_VER >= 2)\n#include \"a2dp_decoder.h\"\n#endif\n\n#include \"app_a2dp.h\"\n#include \"app_a2dp_codecs.h\"\n#include \"btapp.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\n\nint a2dp_codec_source_init(void) {\n  struct BT_DEVICE_T POSSIBLY_UNUSED *bt_dev = &app_bt_device;\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n  if (bt_dev->src_or_snk == BT_DEVICE_SRC) {\n    a2dp_avdtpcodec.codecType = BTIF_AVDTP_CODEC_TYPE_SBC;\n    a2dp_avdtpcodec.discoverable = 1;\n    a2dp_avdtpcodec.elements = (U8 *)&a2dp_codec_elements;\n    a2dp_avdtpcodec.elemLen = 4;\n    btif_a2dp_register(bt_dev->a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream,\n                       BTIF_A2DP_STREAM_TYPE_SOURCE, &a2dp_avdtpcodec, NULL, 0,\n                       0, a2dp_callback);\n  }\n#endif\n\n  return 0;\n}\n\nint a2dp_codec_sink_init(void) {\n  int i;\n  struct BT_DEVICE_T POSSIBLY_UNUSED *bt_dev = &app_bt_device;\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n  if (bt_dev->src_or_snk != BT_DEVICE_SRC)\n#endif\n  {\n    for (i = 0; i < BT_DEVICE_NUM; i++) {\n      a2dp_codec_sbc_init(i);\n#if defined(A2DP_AAC_ON)\n      a2dp_codec_aac_init(i);\n#endif\n#if defined(A2DP_LDAC_ON)\n      a2dp_codec_ldac_init(i);\n#endif\n#if defined(A2DP_LHDC_ON)\n      a2dp_codec_lhdc_init(i);\n#endif\n#if defined(MASTER_USE_OPUS) || defined(ALL_USE_OPUS)\n      a2dp_codec_opus_init(i);\n#endif\n#if defined(A2DP_SCALABLE_ON)\n      a2dp_codec_scalable_init(i);\n#endif\n    }\n  }\n\n  return 0;\n}\n\nuint8_t a2dp_codec_confirm_stream_state(uint8_t index, uint8_t old_state,\n                                        uint8_t new_state) {\n  btif_a2dp_confirm_stream_state(app_bt_device.a2dp_stream[index]->a2dp_stream,\n                                 old_state, new_state);\n#if defined(A2DP_AAC_ON)\n  btif_a2dp_confirm_stream_state(\n      app_bt_device.a2dp_aac_stream[index]->a2dp_stream, old_state, new_state);\n#endif\n#if defined(A2DP_LHDC_ON)\n  btif_a2dp_confirm_stream_state(\n      app_bt_device.a2dp_lhdc_stream[index]->a2dp_stream, old_state, new_state);\n#endif\n#if defined(A2DP_SCALABLE_ON)\n  btif_a2dp_confirm_stream_state(\n      app_bt_device.a2dp_scalable_stream[index]->a2dp_stream, old_state,\n      new_state);\n#endif\n#if defined(A2DP_LDAC_ON)\n  btif_a2dp_confirm_stream_state(\n      app_bt_device.a2dp_ldac_stream[index]->a2dp_stream, old_state, new_state);\n#endif\n\n  return 0;\n}\n\nstatic void a2dp_set_codec_info(btif_dev_it_e dev_num, const uint8_t *codec) {\n  app_bt_device.codec_type[dev_num] = codec[0];\n  app_bt_device.sample_bit[dev_num] = codec[1];\n  app_bt_device.sample_rate[dev_num] = codec[2];\n#if defined(A2DP_LHDC_ON)\n  app_bt_device.a2dp_lhdc_llc[dev_num] = codec[3];\n#endif\n#if defined(A2DP_LDAC_ON)\n  app_ibrt_restore_ldac_info(app_bt_device.sample_rate[dev_num]);\n#endif\n}\n\nstatic void a2dp_get_codec_info(btif_dev_it_e dev_num, uint8_t *codec) {\n  codec[0] = app_bt_device.codec_type[dev_num];\n  codec[1] = app_bt_device.sample_bit[dev_num];\n  codec[2] = app_bt_device.sample_rate[dev_num];\n#if defined(A2DP_LHDC_ON)\n  codec[3] = app_bt_device.a2dp_lhdc_llc[dev_num];\n#endif\n}\n\nint a2dp_codec_init(void) {\n  a2dp_codec_source_init();\n  a2dp_codec_sink_init();\n  btif_a2dp_get_codec_info_func(a2dp_get_codec_info);\n  btif_a2dp_set_codec_info_func(a2dp_set_codec_info);\n  return 0;\n}\n\nbtif_avdtp_codec_t *app_a2dp_codec_get_avdtp_codec() {\n  return (btif_avdtp_codec_t *)&a2dp_avdtpcodec;\n}\n\n#if defined(IBRT)\nenum AUD_SAMPRATE_T bt_parse_sbc_sample_rate(uint8_t sbc_samp_rate);\nuint32_t\napp_a2dp_codec_parse_aac_sample_rate(const a2dp_callback_parms_t *info) {\n  uint32_t ret_sample_rate = AUD_SAMPRATE_44100;\n  btif_a2dp_callback_parms_t *p_info = (btif_a2dp_callback_parms_t *)info;\n\n  if (p_info->p.configReq->codec.elements[1] &\n      A2DP_AAC_OCTET1_SAMPLING_FREQUENCY_44100) {\n    ret_sample_rate = AUD_SAMPRATE_44100;\n  } else if (p_info->p.configReq->codec.elements[2] &\n             A2DP_AAC_OCTET2_SAMPLING_FREQUENCY_48000) {\n    ret_sample_rate = AUD_SAMPRATE_48000;\n  }\n  return ret_sample_rate;\n}\nuint32_t\napp_a2dp_codec_parse_aac_lhdc_sample_rate(const a2dp_callback_parms_t *info) {\n  btif_a2dp_callback_parms_t *p_info = (btif_a2dp_callback_parms_t *)info;\n\n  switch (A2DP_LHDC_SR_DATA(p_info->p.configReq->codec.elements[6])) {\n  case A2DP_LHDC_SR_96000:\n    return AUD_SAMPRATE_96000;\n  case A2DP_LHDC_SR_48000:\n    return AUD_SAMPRATE_48000;\n  case A2DP_LHDC_SR_44100:\n    return AUD_SAMPRATE_44100;\n  default:\n    return AUD_SAMPRATE_44100;\n  }\n}\nuint32_t app_a2dp_codec_get_sample_rate(const a2dp_callback_parms_t *info) {\n  btif_a2dp_callback_parms_t *p_info = (btif_a2dp_callback_parms_t *)info;\n  btif_avdtp_codec_type_t codetype =\n      btif_a2dp_get_codec_type((const a2dp_callback_parms_t *)p_info);\n\n  switch (codetype) {\n  case BTIF_AVDTP_CODEC_TYPE_SBC:\n    return bt_parse_sbc_sample_rate(p_info->p.configReq->codec.elements[0]);\n  case BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC:\n    return app_a2dp_codec_parse_aac_sample_rate(\n        (const a2dp_callback_parms_t *)p_info);\n  case BTIF_AVDTP_CODEC_TYPE_LHDC:\n    return app_a2dp_codec_parse_aac_lhdc_sample_rate(\n        (const a2dp_callback_parms_t *)p_info);\n  default:\n    ASSERT(0, \"btif_a2dp_get_sample_rate codetype error!!\");\n    return 0;\n  }\n}\nuint8_t app_a2dp_codec_get_sample_bit(const a2dp_callback_parms_t *info) {\n  btif_avdtp_codec_type_t codetype = btif_a2dp_get_codec_type(info);\n  btif_a2dp_callback_parms_t *p_info = (btif_a2dp_callback_parms_t *)info;\n\n  if ((codetype == BTIF_AVDTP_CODEC_TYPE_LHDC) &&\n      A2DP_LHDC_FMT_DATA(p_info->p.configReq->codec.elements[6])) {\n    return 24;\n  } else {\n    // AAC and SBC sample bit eq 16\n    return 16;\n  }\n}\n#endif\n"
  },
  {
    "path": "services/bt_app/a2dp_codecs/include/a2dp_codec_aac.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_CODEC_AAC_H__\n#define __A2DP_CODEC_AAC_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#include \"avdtp_api.h\"\n#include \"tgt_hardware.h\"\n\n#ifndef MAX_AAC_BITRATE\n#if defined(CHIP_BEST1400)\n#define MAX_AAC_BITRATE (96000)\n#else\n#define MAX_AAC_BITRATE (264630)\n#endif\n#endif\n\n#define A2DP_AAC_OCTET0_MPEG2_AAC_LC              0x80\n#define A2DP_AAC_OCTET0_MPEG4_AAC_LC              0x40\n#define A2DP_AAC_OCTET1_SAMPLING_FREQUENCY_44100  0x01\n#define A2DP_AAC_OCTET2_SAMPLING_FREQUENCY_48000  0x80\n#define A2DP_AAC_OCTET2_CHANNELS_1                0x08\n#define A2DP_AAC_OCTET2_CHANNELS_2                0x04\n#define A2DP_AAC_OCTET3_VBR_SUPPORTED             0x80\n\n#define A2DP_AAC_OCTET_NUMBER                     (6)\n\n#if defined(A2DP_AAC_ON)\nextern const unsigned char a2dp_codec_aac_elements[A2DP_AAC_OCTET_NUMBER];\nbt_status_t a2dp_codec_aac_init(int index);\n#endif /* A2DP_AAC_ON */\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __A2DP_CODEC_AAC_H__ */\n"
  },
  {
    "path": "services/bt_app/a2dp_codecs/include/a2dp_codec_ldac.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_CODEC_LDAC_H__\n#define __A2DP_CODEC_LDAC_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#include \"avdtp_api.h\"\n\n#define A2DP_LDAC_OCTET_NUMBER                     (8)\n#define A2DP_LDAC_VENDOR_ID                       0x0000012d\n#define A2DP_LDAC_CODEC_ID                        0x00aa\n//To indicate Sampling Rate.\n#define A2DP_LDAC_SR_96000                        0x04\n#define A2DP_LDAC_SR_88200                        0x08\n#define A2DP_LDAC_SR_48000                        0x10\n#define A2DP_LDAC_SR_44100                        0x20\n#define A2DP_LDAC_SR_DATA(X)                      (X & (A2DP_LDAC_SR_96000 | A2DP_LDAC_SR_88200 | A2DP_LDAC_SR_48000 | A2DP_LDAC_SR_44100))\n#define A2DP_LDAC_CM_DATA(X)                      (X & (A2DP_LDAC_CM_MONO | A2DP_LDAC_CM_DUAL | A2DP_LDAC_CM_STEREO))\n//To indicate channel mode(a2dp)\n#define A2DP_LDAC_CM_MONO                        0x04\n#define A2DP_LDAC_CM_DUAL                        0x02\n#define A2DP_LDAC_CM_STEREO                      0x01\n\n#if defined(A2DP_LDAC_ON)\nextern const unsigned char a2dp_codec_ldac_elements[A2DP_LDAC_OCTET_NUMBER];\nbt_status_t a2dp_codec_ldac_init(int index);\n#endif /* A2DP_LDAC_ON */\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __A2DP_CODEC_LDAC_H__ */"
  },
  {
    "path": "services/bt_app/a2dp_codecs/include/a2dp_codec_lhdc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_CODEC_LHDC_H__\n#define __A2DP_CODEC_LHDC_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#include \"avdtp_api.h\"\n#include \"codec_lhdc.h\"\n\n#if defined(A2DP_LHDC_ON)\nextern const unsigned char a2dp_codec_lhdc_elements[A2DP_LHDC_OCTET_NUMBER];\nbt_status_t a2dp_codec_lhdc_init(int index);\n#endif\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __A2DP_CODEC_LHDC_H__ */"
  },
  {
    "path": "services/bt_app/a2dp_codecs/include/a2dp_codec_opus.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_CODEC_OPUS_H__\n#define __A2DP_CODEC_OPUS_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#include \"avdtp_api.h\"\n#include \"btapp.h\"\n\n#if defined(MASTER_USE_OPUS) || defined(ALL_USE_OPUS)\nbt_status_t a2dp_codec_opus_init(int index);\n#endif\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __A2DP_CODEC_OPUS_H__ */"
  },
  {
    "path": "services/bt_app/a2dp_codecs/include/a2dp_codec_sbc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_CODEC_SBC_H__\n#define __A2DP_CODEC_SBC_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#include \"avdtp_api.h\"\n\nextern btif_avdtp_codec_t a2dp_avdtpcodec;\nextern const unsigned char a2dp_codec_elements[];\nbt_status_t a2dp_codec_sbc_init(int index);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __A2DP_CODEC_SBC_H__ */"
  },
  {
    "path": "services/bt_app/a2dp_codecs/include/a2dp_codec_scalable.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __A2DP_CODEC_SCALABLE_H__\n#define __A2DP_CODEC_SCALABLE_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#include \"avdtp_api.h\"\n\n#define A2DP_SCALABLE_OCTET_NUMBER                (7)\n#define A2DP_SCALABLE_VENDOR_ID                   0x00000075\n#define A2DP_SCALABLE_CODEC_ID                    0x0103\n\n//To indicate bits per sample.\n#define A2DP_SCALABLE_HQ\t                      0x08\n#define A2DP_SCALABLE_ADD_INFO1                   0x00\n#define A2DP_SCALABLE_ADD_INFO2                   0x00\n#define A2DP_SCALABLE_ADD_INFO3                   0x00\n#define A2DP_SCALABLE_INFO(X)                 \t  (X & (A2DP_SCALABLE_HQ | A2DP_SCALABLE_ADD_INFO1 | A2DP_SCALABLE_ADD_INFO2 | A2DP_SCALABLE_ADD_INFO3))\n\n//To indicate Sampling Rate.\n#define A2DP_SCALABLE_SR_96000                    0x80\n#define A2DP_SCALABLE_SR_32000                    0x40\n#define A2DP_SCALABLE_SR_44100                    0x20\n#define A2DP_SCALABLE_SR_48000                    0x10\n#define A2DP_SCALABLE_SR_DATA(X)                  (X & (A2DP_SCALABLE_SR_96000 | A2DP_SCALABLE_SR_32000 | A2DP_SCALABLE_SR_44100 | A2DP_SCALABLE_SR_48000))\n\n//To indicate bits per sample.\n#define A2DP_SCALABLE_FMT_24                      0x08\n#define A2DP_SCALABLE_FMT_16                      0x00\n#define A2DP_SCALABLE_FMT_DATA(X)                 (X & (A2DP_SCALABLE_FMT_24 | A2DP_SCALABLE_FMT_16))\n\nextern btif_avdtp_codec_t a2dp_scalable_avdtpcodec;\nextern const unsigned char a2dp_codec_scalable_elements[];\nbt_status_t a2dp_codec_scalable_init(int index);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __A2DP_CODEC_SCALABLE_H__ */\n"
  },
  {
    "path": "services/bt_app/a2dp_codecs/include/app_a2dp_codecs.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_A2DP_CODEC_H__\n#define __APP_A2DP_CODEC_H__\n\n#include \"a2dp_codec_sbc.h\"\n#include \"a2dp_codec_aac.h\"\n#include \"a2dp_codec_ldac.h\"\n#include \"a2dp_codec_lhdc.h\"\n#include \"a2dp_codec_opus.h\"\n#include \"a2dp_codec_scalable.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint a2dp_codec_init(void);\nuint8_t a2dp_codec_confirm_stream_state(uint8_t index, uint8_t old_state, uint8_t new_state);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __APP_A2DP_CODEC_H__ */"
  },
  {
    "path": "services/bt_app/a2dp_codecs/include/codec_lhdc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __CODEC_LHDC_H__\n#define __CODEC_LHDC_H__\n\n#define A2DP_LHDC_OCTET_NUMBER                     (9)\n#define A2DP_LHDC_VENDOR_ID                       0x0000053a\n#if defined(A2DP_LHDC_V3)\n#define A2DP_LHDC_CODEC_ID                        0x4C33\n#else\n#define A2DP_LHDC_CODEC_ID                        0x4C32\n#endif\n//To indicate Sampling Rate.\n#define A2DP_LHDC_SR_96000                        0x01\n#define A2DP_LHDC_SR_88200                        0x02\n#define A2DP_LHDC_SR_48000                        0x04\n#define A2DP_LHDC_SR_44100                        0x08\n#define A2DP_LHDC_SR_DATA(X)                      (X & (A2DP_LHDC_SR_96000 | A2DP_LHDC_SR_88200 | A2DP_LHDC_SR_48000 | A2DP_LHDC_SR_44100))\n\n//To indicate bits per sample.\n#define A2DP_LHDC_FMT_24                          0x10\n#define A2DP_LHDC_FMT_16                          0x20\n#define A2DP_LHDC_FMT_DATA(X)                     (X & (A2DP_LHDC_FMT_24 | A2DP_LHDC_FMT_16))\n\n#if defined(A2DP_LHDC_V3)\n#define A2DP_LHDC_VERSION_NUM                      0x01\n#else\n#define A2DP_LHDC_VERSION_NUM                      0x00\n#endif\n#define A2DP_LHDC_MAX_SR_900                       0x00\n#define A2DP_LHDC_MAX_SR_500                       0x10\n#define A2DP_LHDC_MAX_SR_400                       0x20\n#define A2DP_LHDC_MAX_SR_RESERVED                  0x30\n#define A2DP_LHDC_LLC_ENABLE                       0x40\n\n#define A2DP_LHDC_COF_CSC_DISABLE                  0x01\n#define A2DP_LHDC_COF_CSC                          0x02 //\n#define A2DP_LHDC_COF_CSC_PRE                      0x04\n#define A2DP_LHDC_COF_CSC_RESERVED                 0x08\n#define A2DP_LHDC_COF_DATA(X)                     (X & (A2DP_LHDC_COF_CSC_DISABLE | A2DP_LHDC_COF_CSC | A2DP_LHDC_COF_CSC_PRE))\n\ntypedef enum {\n    LHDC_CHANNEL_SPLIT_DISABLE = 0,\n    LHDC_CHANNEL_SPLIT,         //For forwarding type TWS used\n    LHDC_CHANNEL_SPLIT_FROM_ENCODER,    // Pre-split left/right frame at encode side.\n    LHDC_CHANNEL_SPLIT_INVALID,\n} compressor_output_format_t;\n\ntypedef struct {\n    uint32_t vendor_id;\n    uint16_t codec_id;\n    uint8_t bits;\n    uint8_t sample_rater;       //uint:K\n    uint8_t version_num;\n    uint16_t max_sample_rate;   //uint:K  \n    bool llc_enable;            //low latency control\n    compressor_output_format_t compress_output_format;\n} lhdc_info_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif                          /*  */\n\n    void lhdc_info_parse(uint8_t * elements, lhdc_info_t * info);\n    uint8_t a2dp_lhdc_get_sample_rate(uint8_t * elements);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __CODEC_LHDC_H__ */"
  },
  {
    "path": "services/bt_app/a2dp_codecs/ldac/a2dp_codec_ldac.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"a2dp_api.h\"\n#include \"analog.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"bt_drv_interface.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hci_api.h\"\n#include \"resources.h\"\n#include \"tgt_hardware.h\"\n\n#include \"a2dp_codec_ldac.h\"\n#include \"avdtp_api.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\n\n#if defined(A2DP_LDAC_ON)\nstatic btif_avdtp_codec_t a2dp_ldac_avdtpcodec;\n\nconst unsigned char a2dp_codec_ldac_elements[A2DP_LDAC_OCTET_NUMBER] = {\n    0x2d,\n    0x01,\n    0x00,\n    0x00, // Vendor ID\n    0xaa,\n    0x00, // Codec ID\n    (A2DP_LDAC_SR_96000 | A2DP_LDAC_SR_88200 | A2DP_LDAC_SR_48000 |\n     A2DP_LDAC_SR_44100),\n    //    (A2DP_LDAC_SR_48000 |A2DP_LDAC_SR_44100),\n    (A2DP_LDAC_CM_MONO | A2DP_LDAC_CM_DUAL | A2DP_LDAC_CM_STEREO),\n};\n\nbt_status_t a2dp_codec_ldac_init(int index) {\n  bt_status_t st;\n\n  struct BT_DEVICE_T *bt_dev = &app_bt_device;\n\n  a2dp_ldac_avdtpcodec.codecType = BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n  a2dp_ldac_avdtpcodec.discoverable = 1;\n  a2dp_ldac_avdtpcodec.elements = (U8 *)&a2dp_codec_ldac_elements;\n  a2dp_ldac_avdtpcodec.elemLen = sizeof(a2dp_codec_ldac_elements);\n  TRACE(1, \"a2dp_ldac_avdtpcodec.elemLen = %d \\n\",\n        a2dp_ldac_avdtpcodec.elemLen);\n  TRACE(7,\n        \"a2dp_ldac_avdtpcodec.elements->[0]=0x%02x,[1]=0x%02x,[2]=0x%02x,[3]=\"\n        \"0x%02x,[4]=0x%02x,[5]=0x%02x,[6]=0x%02x,\\n\",\n        a2dp_ldac_avdtpcodec.elements[0], a2dp_ldac_avdtpcodec.elements[1],\n        a2dp_ldac_avdtpcodec.elements[2], a2dp_ldac_avdtpcodec.elements[3],\n        a2dp_ldac_avdtpcodec.elements[4], a2dp_ldac_avdtpcodec.elements[5],\n        a2dp_ldac_avdtpcodec.elements[6]);\n  TRACE(1, \"a2dp_ldac_avdtpcodec.elements->[7]=0x%02x,\\n\",\n        a2dp_ldac_avdtpcodec.elements[7]);\n\n  st = btif_a2dp_register(bt_dev->a2dp_ldac_stream[index]->a2dp_stream,\n                          BTIF_A2DP_STREAM_TYPE_SINK, &a2dp_ldac_avdtpcodec,\n                          NULL, 3, index, a2dp_callback);\n\n  return st;\n}\n#endif /* A2DP_LDAC_ON */"
  },
  {
    "path": "services/bt_app/a2dp_codecs/lhdc/a2dp_codec_lhdc.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"a2dp_api.h\"\n#include \"analog.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"bt_drv_interface.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hci_api.h\"\n#include \"resources.h\"\n#include \"tgt_hardware.h\"\n\n#include \"a2dp_codec_lhdc.h\"\n#include \"avdtp_api.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\n\n#if defined(A2DP_LHDC_ON)\nstatic btif_avdtp_codec_t a2dp_lhdc_avdtpcodec;\n\n#if 0\nconst unsigned char a2dp_codec_lhdc_elements[A2DP_LHDC_OCTET_NUMBER] = {\n    0x3A, 0x05, 0x00, 0x00, //Vendor ID\n    0x4C, 0x48,         //Codec ID\n    (A2DP_LHDC_SR_96000 | A2DP_LHDC_SR_48000 | A2DP_LHDC_SR_44100) | (A2DP_LHDC_FMT_16 | A2DP_LHDC_FMT_24),\n};\n#else\n// V2\n\nconst unsigned char a2dp_codec_lhdc_elements[A2DP_LHDC_OCTET_NUMBER] = {\n    0x3A, 0x05, 0x00, 0x00, // Vendor ID\n#if defined(A2DP_LHDC_V3)\n    0x33, 0x4c,             // Codec ID\n#else\n    0x32, 0x4c, // Codec ID\n#endif\n    // A2DP_LHDC_SR_96000 |  // 96K sample rate will audio drop, don't register\n    (A2DP_LHDC_SR_48000 | A2DP_LHDC_SR_44100) |\n        (A2DP_LHDC_FMT_16 | A2DP_LHDC_FMT_24),\n    (\n#if defined(IBRT)\n        A2DP_LHDC_LLC_ENABLE |\n#endif\n        A2DP_LHDC_MAX_SR_400 | A2DP_LHDC_VERSION_NUM),\n    (A2DP_LHDC_COF_CSC_DISABLE)};\n#endif /* if 0 */\n\nbtif_avdtp_codec_t *app_a2dp_codec_get_lhdc_avdtp_codec() {\n  return (btif_avdtp_codec_t *)&a2dp_lhdc_avdtpcodec;\n}\n\nbt_status_t a2dp_codec_lhdc_init(int index) {\n  bt_status_t st;\n  struct BT_DEVICE_T *bt_dev = &app_bt_device;\n\n  a2dp_lhdc_avdtpcodec.codecType = BTIF_AVDTP_CODEC_TYPE_LHDC;\n  a2dp_lhdc_avdtpcodec.discoverable = 1;\n  a2dp_lhdc_avdtpcodec.elements = (U8 *)&a2dp_codec_lhdc_elements;\n  a2dp_lhdc_avdtpcodec.elemLen = sizeof(a2dp_codec_lhdc_elements);\n  {\n    btif_avdtp_codec_t *p = &a2dp_lhdc_avdtpcodec;\n    TRACE(1, \"a2dp_lhdc_avdtpcodec.elemLen = %d \\n\", p->elemLen);\n\n    TRACE(5,\n          \"a2dp_lhdc_avdtpcodec.elements->[0]=0x%02x,[1]=0x%02x,[2]=0x%02x,[3]=\"\n          \"0x%02x,[4]=0x%02x\\n\",\n          p->elements[0], p->elements[1], p->elements[2], p->elements[3],\n          p->elements[4]);\n\n    TRACE(4,\n          \"a2dp_lhdc_avdtpcodec.elements->[5]=0x%02x,[6]=0x%02x,[7]=0x%02x,[8]=\"\n          \"0x%02x\\n\",\n          p->elements[5], p->elements[6], p->elements[7], p->elements[8]);\n  }\n\n  st = btif_a2dp_register(bt_dev->a2dp_lhdc_stream[index]->a2dp_stream,\n                          BTIF_A2DP_STREAM_TYPE_SINK, &a2dp_lhdc_avdtpcodec,\n                          NULL, 2, index, a2dp_callback);\n\n  return st;\n}\n#endif /* A2DP_LHDC_ON */\n"
  },
  {
    "path": "services/bt_app/a2dp_codecs/lhdc/codec_lhdc.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef A2DP_LHDC_ON\n\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"audioflinger.h\"\n#include \"bt_drv.h\"\n#include \"bt_drv_interface.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_env.h\"\n#include \n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hal_chipid.h\"\n#include \"resources.h\"\n#include \"spp_api.h\"\n#include \"tgt_hardware.h\"\n#ifdef __TWS__\n#include \"app_bt.h\"\n#include \"app_tws.h\"\n#include \"app_tws_if.h\"\n#endif\n\n#include \"codec_lhdc.h\"\n\nvoid lhdc_info_parse(uint8_t *elements, lhdc_info_t *info) {\n  info->vendor_id = (uint32_t)elements[0];\n  info->vendor_id |= ((uint32_t)elements[1]) << 8;\n  info->vendor_id |= ((uint32_t)elements[2]) << 16;\n  info->vendor_id |= ((uint32_t)elements[3]) << 24;\n\n  info->codec_id = (uint16_t)elements[4];\n  info->codec_id |= ((uint16_t)elements[5]) << 8;\n  uint8_t config = elements[6];\n\n  if (info->vendor_id == A2DP_LHDC_VENDOR_ID &&\n      info->codec_id == A2DP_LHDC_CODEC_ID) {\n\n    TRACE(2, \"Vendor ID = 0x%08x, Codec ID = 0x%04x, LHDC Codec\\n\",\n          info->vendor_id, info->codec_id);\n    switch (A2DP_LHDC_SR_DATA(config)) {\n    case A2DP_LHDC_SR_96000:\n      info->sample_rater = A2D_SBC_IE_SAMP_FREQ_96;\n      TRACE(1, \"%s:CodecCfg sample_rate 96000\\n\", __func__);\n      break;\n    case A2DP_LHDC_SR_48000:\n      info->sample_rater = A2D_SBC_IE_SAMP_FREQ_48;\n      TRACE(1, \"%s:CodecCfg sample_rate 48000\\n\", __func__);\n      break;\n    case A2DP_LHDC_SR_44100:\n      info->sample_rater = A2D_SBC_IE_SAMP_FREQ_44;\n      TRACE(1, \"%s:CodecCfg sample_rate 44100\\n\", __func__);\n      break;\n    }\n    switch (A2DP_LHDC_FMT_DATA(config)) {\n    case A2DP_LHDC_FMT_16:\n      info->bits = 16;\n      TRACE(1, \"%s:CodecCfg bits per sampe = 16\", __func__);\n      break;\n    case A2DP_LHDC_FMT_24:\n      TRACE(1, \"%s:CodecCfg bits per sampe = 24\", __func__);\n      info->bits = 24;\n      break;\n    }\n\n    config = elements[7];\n    info->version_num = 0x0f & config;\n    TRACE(2, \"%s:lhdc codec version num:%x\\n\", __func__, info->version_num);\n    info->max_sample_rate = 0x30 & config;\n    TRACE(2, \"%s:lhdc codec max sample rate:%x\\n\", __func__,\n          info->sample_rater);\n\n    info->llc_enable = 0x40 & config;\n    TRACE(2, \"%s:lhdc codec llc enable:%x \\n\", __func__, info->llc_enable);\n\n    config = elements[8];\n    switch (A2DP_LHDC_COF_DATA(config)) {\n    case A2DP_LHDC_COF_CSC_DISABLE:\n      info->compress_output_format = LHDC_CHANNEL_SPLIT_DISABLE;\n      TRACE(1, \"%s:compress_output_format: LHDC_COF_CSC_DISABLE\", __func__);\n      break;\n    case A2DP_LHDC_COF_CSC:\n      TRACE(1, \"%s:compress_output_format: LHDC_COF_CSC\", __func__);\n      info->compress_output_format = LHDC_CHANNEL_SPLIT;\n      break;\n    case A2DP_LHDC_COF_CSC_PRE:\n      TRACE(1, \"%s:compress_output_format: LHDC_COF_CSC_PRE\", __func__);\n      info->compress_output_format = LHDC_CHANNEL_SPLIT_FROM_ENCODER;\n      break;\n    }\n  }\n}\n\nuint8_t a2dp_lhdc_get_sample_rate(uint8_t *elements) {\n  uint32_t vendor_id = (uint32_t)elements[0];\n  vendor_id |= ((uint32_t)elements[1]) << 8;\n  vendor_id |= ((uint32_t)elements[2]) << 16;\n  vendor_id |= ((uint32_t)elements[3]) << 24;\n  uint16_t codec_id = (uint16_t)elements[4];\n  codec_id |= ((uint16_t)elements[5]) << 8;\n\n  uint8_t config = elements[6];\n  if (vendor_id == A2DP_LHDC_VENDOR_ID && codec_id == A2DP_LHDC_CODEC_ID) {\n    switch (A2DP_LHDC_SR_DATA(config)) {\n    case A2DP_LHDC_SR_96000:\n      return A2D_SBC_IE_SAMP_FREQ_96;\n    case A2DP_LHDC_SR_48000:\n      return A2D_SBC_IE_SAMP_FREQ_48;\n    case A2DP_LHDC_SR_44100:\n      return A2D_SBC_IE_SAMP_FREQ_44;\n    }\n  }\n  return 0;\n}\n\n#endif\n"
  },
  {
    "path": "services/bt_app/a2dp_codecs/opus/a2dp_codec_opus.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"a2dp_api.h\"\n#include \"analog.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"bt_drv_interface.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hci_api.h\"\n#include \"resources.h\"\n#include \"tgt_hardware.h\"\n\n#include \"a2dp_codec_opus.h\"\n#include \"avdtp_api.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\n\n#if defined(MASTER_USE_OPUS) || defined(ALL_USE_OPUS)\nstatic btif_avdtp_codec_t a2dp_opus_avdtpcodec;\n\nconst unsigned char a2dp_codec_opus_elements[] = {\n    A2D_SBC_IE_SAMP_FREQ_48 | A2D_SBC_IE_SAMP_FREQ_44 |\n        A2D_SBC_IE_CH_MD_STEREO | A2D_SBC_IE_CH_MD_JOINT,\n    A2D_SBC_IE_BLOCKS_16 | A2D_SBC_IE_BLOCKS_12 | A2D_SBC_IE_SUBBAND_8 |\n        A2D_SBC_IE_ALLOC_MD_L,\n    A2D_SBC_IE_MIN_BITPOOL, BTA_AV_CO_SBC_MAX_BITPOOL};\n\nbt_status_t a2dp_codec_opus_init(struct BT_DEVICE_T *bt_dev, int index) {\n  return BT_STS_SUCCESS;\n}\n\n#endif /* MASTER_USE_OPUS || ALL_USE_OPUS */"
  },
  {
    "path": "services/bt_app/a2dp_codecs/sbc/a2dp_codec_sbc.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"a2dp_api.h\"\n#include \"analog.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"bt_drv_interface.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hci_api.h\"\n#include \"resources.h\"\n#include \"tgt_hardware.h\"\n\n#include \"a2dp_codec_sbc.h\"\n#include \"avdtp_api.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\n\n#ifdef __A2DP_AVDTP_CP__\nbtif_avdtp_content_prot_t a2dp_avdtpCp[BT_DEVICE_NUM];\nU8 a2dp_avdtpCp_securityData[BT_DEVICE_NUM][BTIF_AVDTP_MAX_CP_VALUE_SIZE] = {};\n#endif /* __A2DP_AVDTP_CP__ */\n\nbtif_avdtp_codec_t a2dp_avdtpcodec;\n\nconst unsigned char a2dp_codec_elements[] = {\n    A2D_SBC_IE_SAMP_FREQ_48 | A2D_SBC_IE_SAMP_FREQ_44 | A2D_SBC_IE_CH_MD_MONO |\n        A2D_SBC_IE_CH_MD_STEREO | A2D_SBC_IE_CH_MD_JOINT |\n        A2D_SBC_IE_CH_MD_DUAL,\n    A2D_SBC_IE_BLOCKS_16 | A2D_SBC_IE_BLOCKS_12 | A2D_SBC_IE_BLOCKS_8 |\n        A2D_SBC_IE_BLOCKS_4 | A2D_SBC_IE_SUBBAND_8 | A2D_SBC_IE_ALLOC_MD_L |\n        A2D_SBC_IE_ALLOC_MD_S,\n    A2D_SBC_IE_MIN_BITPOOL, BTA_AV_CO_SBC_MAX_BITPOOL};\n\nbt_status_t a2dp_codec_sbc_init(int index) {\n  struct BT_DEVICE_T *bt_dev = &app_bt_device;\n\n  bt_status_t st;\n#ifdef __A2DP_AVDTP_CP__\n  a2dp_avdtpCp[index].cpType = BTIF_AVDTP_CP_TYPE_SCMS_T;\n  a2dp_avdtpCp[index].data = (U8 *)&a2dp_avdtpCp_securityData[index][0];\n  a2dp_avdtpCp[index].dataLen = 0;\n#endif /* __A2DP_AVDTP_CP__ */\n\n  a2dp_avdtpcodec.codecType = BTIF_AVDTP_CODEC_TYPE_SBC;\n  a2dp_avdtpcodec.discoverable = 1;\n  a2dp_avdtpcodec.elements = (U8 *)&a2dp_codec_elements;\n  a2dp_avdtpcodec.elemLen = 4;\n\n#ifdef __A2DP_AVDTP_CP__\n  st = btif_a2dp_register(bt_dev->a2dp_stream[index]->a2dp_stream,\n                          BTIF_A2DP_STREAM_TYPE_SINK, &a2dp_avdtpcodec,\n                          &a2dp_avdtpCp[index], 0, index, a2dp_callback);\n  btif_a2dp_add_content_protection(bt_dev->a2dp_stream[index]->a2dp_stream,\n                                   &a2dp_avdtpCp[index]);\n#else\n  st = btif_a2dp_register(bt_dev->a2dp_stream[index]->a2dp_stream,\n                          BTIF_A2DP_STREAM_TYPE_SINK, &a2dp_avdtpcodec, NULL, 0,\n                          index, a2dp_callback);\n#endif /* __A2DP_AVDTP_CP__ */\n\n  return st;\n}"
  },
  {
    "path": "services/bt_app/a2dp_codecs/scalable/a2dp_codec_scalable.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"a2dp_api.h\"\n#include \"analog.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"bt_drv_interface.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hci_api.h\"\n#include \"resources.h\"\n#include \"tgt_hardware.h\"\n\n#include \"a2dp_codec_scalable.h\"\n#include \"avdtp_api.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\n\n#if defined(A2DP_SCALABLE_ON)\nbtif_avdtp_codec_t a2dp_scalable_avdtpcodec;\n\n// Vendor Specific value (8bit) : 0x78 (not support UHQ)  0xF8  (support UHQ)\n// - bit 7 : 96kHz   sampling frequency supported\n// - bit 6 : 32kHz   sampling frequency supported\n// - bit 5 : 44.1kHz sampling frequency supported\n// - bit 4 : 48kHz   sampling frequency supported\n// - bit 3 : high quality supported \n// - bit 2 : additional information (current 0)\n// - bit 1 : additional information (current 0)\n// - bit 0 : additional information (current 0)\n//<1byte Vendor Specific values for Scalable codec> \nconst unsigned char a2dp_codec_scalable_elements[A2DP_SCALABLE_OCTET_NUMBER] = {\n    0x75, 0x0,  0x0, 0x0, // vendor id\n    0x03, 0x01,           // vendor specific codec id\n#if defined(A2DP_SCALABLE_UHQ_SUPPORT)\n    0xf8, // vendor specific value\n#else\n    0x78, // vendor specific value\n#endif\n};\n\nbt_status_t a2dp_codec_scalable_init(int index) {\n  bt_status_t st;\n\n  struct BT_DEVICE_T *bt_dev = &app_bt_device;\n\n  a2dp_scalable_avdtpcodec.codecType = BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n  a2dp_scalable_avdtpcodec.discoverable = 1;\n  a2dp_scalable_avdtpcodec.elements = (U8 *)&a2dp_codec_scalable_elements;\n  a2dp_scalable_avdtpcodec.elemLen = sizeof(a2dp_codec_scalable_elements);\n\n  st = btif_a2dp_register(bt_dev->a2dp_scalable_stream[index]->a2dp_stream,\n                          BTIF_A2DP_STREAM_TYPE_SINK, &a2dp_scalable_avdtpcodec,\n                          NULL, 4, index, a2dp_callback);\n\n  return st;\n}\n#endif /* A2DP_SCALABLE_ON */\n"
  },
  {
    "path": "services/bt_app/app_a2dp.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_a2dp.h\"\n#include \"a2dp_api.h\"\n#include \"analog.h\"\n#include \"app.h\"\n#include \"app_audio.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n#if defined(A2DP_LHDC_ON)\n// #include \"../liblhdc-dec/lhdcUtil.h\"\n#include \"lhdcUtil.h\"\n#endif\n\n#if defined(A2DP_LDAC_ON)\n#include \"ldacBT.h\"\n#endif\n\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_media_manager.h\"\n#include \"apps.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hal_bootmode.h\"\n#include \"hci_api.h\"\n#include \"resources.h\"\n#include \"tgt_hardware.h\"\n\n#ifdef BT_USB_AUDIO_DUAL_MODE\n#include \"btusb_audio.h\"\n#endif\n\n#if defined(__BTMAP_ENABLE__)\n#include \"app_btmap_sms.h\"\n#endif\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n#include \"app_a2dp_source.h\"\nextern enum AUD_SAMPRATE_T bt_parse_sbc_sample_rate(uint8_t sbc_samp_rate);\n#endif\n\n#ifdef __THIRDPARTY\n#include \"app_thirdparty.h\"\n#endif\n\n#ifdef VOICE_DATAPATH\n#include \"app_voicepath.h\"\n#endif\n\n#ifdef __AI_VOICE__\n#include \"ai_thread.h\"\n#endif\n\n#define _FILE_TAG_ \"A2DP\"\n#include \"app_bt_func.h\"\n#include \"color_log.h\"\n#include \"os_api.h\"\n\n#if (A2DP_DECODER_VER >= 2)\n#include \"a2dp_decoder.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#include \"app_tws_ibrt_cmd_sync_a2dp_status.h\"\n#endif\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom_bt.h\"\n#endif\n\n#define APP_A2DP_STRM_FLAG_QUERY_CODEC 0x08\n\n#define APP_A2DP__DEBUG\n\n#ifdef APP_A2DP__DEBUG\n#define APP_A2DP_TRACE(str, ...) TRACE(str, ##__VA_ARGS__)\n#else\n#define APP_A2DP_TRACE(str, ...)\n#endif\n\nuint8_t current_a2dp_non_type = 0;\n\ntypedef uint8_t tx_done_flag;\n\n#define TX_DONE_FLAG_INIT ((uint8_t)0)\n#define TX_DONE_FLAG_SUCCESS ((uint8_t)1)\n#define TX_DONE_FLAG_FAIL ((uint8_t)2)\n#define TX_DONE_FLAG_TXING ((uint8_t)3)\ntx_done_flag vol_ctrl_done_flag[BT_DEVICE_NUM] = {TX_DONE_FLAG_INIT};\n\nint a2dp_volume_get(enum BT_DEVICE_ID_T id);\n\n#ifdef GFPS_ENABLED\nextern \"C\" void app_exit_fastpairing_mode(void);\n#endif\nextern int app_bt_stream_volumeset(int8_t vol);\n\nstatic void app_AVRCP_sendCustomCmdRsp(uint8_t device_id,\n                                       btif_avrcp_channel_t *chnl,\n                                       uint8_t isAccept, uint8_t transId);\nstatic void app_AVRCP_CustomCmd_Received(uint8_t *ptrData, uint32_t len);\n\nvoid get_value1_pos(U8 mask, U8 *start_pos, U8 *end_pos) {\n  U8 num = 0;\n\n  for (U8 i = 0; i < 8; i++) {\n    if ((0x01 << i) & mask) {\n      *start_pos = i; // start_pos,end_pos stands for the start and end position\n                      // of value 1 in mask\n      break;\n    }\n  }\n  for (U8 i = 0; i < 8; i++) {\n    if ((0x01 << i) & mask)\n      num++; // number of value1 in mask\n  }\n  *end_pos = *start_pos + num - 1;\n}\nU8 get_valid_bit(U8 elements, U8 mask) {\n  U8 start_pos, end_pos;\n\n  get_value1_pos(mask, &start_pos, &end_pos);\n  //    TRACE(2,\"!!!start_pos:%d,end_pos:%d\\n\",start_pos,end_pos);\n  for (U8 i = start_pos; i <= end_pos; i++) {\n    if ((0x01 << i) & elements) {\n      elements = ((0x01 << i) | (elements & (~mask)));\n      break;\n    }\n  }\n  return elements;\n}\n\nstruct BT_DEVICE_T app_bt_device;\nuint8_t a2dp_channel_num[BT_DEVICE_NUM];\n\n#if defined(IBRT)\n#if defined(ENHANCED_STACK)\nuint32_t app_avrcp_save_ctxs(btif_remote_device_t *rem_dev, uint8_t *buf,\n                             uint32_t buf_len) {\n  int i = 0;\n  int offset = 0;\n\n  if (rem_dev == NULL) {\n    TRACE(1, \"%s:rem_dev_is_NULL,error!\", __func__);\n    return 0;\n  }\n\n  for (i = 0; i < BT_DEVICE_NUM; ++i) {\n    if (btif_avrcp_state_connected(app_bt_device.avrcp_channel[i])) {\n      if (btif_avrcp_get_remote_device(\n              app_bt_device.avrcp_channel[i]->avrcp_channel_handle) == rem_dev)\n        break;\n    }\n  }\n\n  if (i == BT_DEVICE_NUM) {\n    TRACE(2, \"%s:no_proper_avrcp_channel_to_save,rem_dev=%p,error!\", __func__,\n          rem_dev);\n    return 0;\n  }\n\n  buf[offset] = i;\n  ++offset;\n\n  return offset;\n}\n\nuint32_t app_avrcp_restore_ctxs(btif_remote_device_t *rem_dev, uint8_t *buf,\n                                uint32_t buf_len) {\n  return 0;\n}\n#endif /* ENHANCED_STACK */\n#endif\n\nbool is_bd_addr_valid(bt_bdaddr_t *addr) {\n  uint8_t addr_empty[6];\n  memset(addr_empty, 0, sizeof(addr_empty));\n  if (memcmp(addr, addr_empty, 6)) {\n    return TRUE;\n  } else {\n    return FALSE;\n  }\n}\n\nstatic void app_avrcp_connect_timeout_timer_handler(uint32_t deviceId) {\n  TRACE(2, \"app_avrcp_connect_timeout_handler a2dp state=%d,avrcp state=%d\",\n        app_bt_device.a2dp_state[deviceId],\n        btif_get_avrcp_state(app_bt_device.avrcp_channel[deviceId]));\n  if ((!app_is_disconnecting_all_bt_connections()) &&\n      app_bt_device.a2dp_state[deviceId] &&\n      (btif_get_avrcp_state(app_bt_device.avrcp_channel[deviceId]) !=\n       BTIF_AVRCP_STATE_CONNECTED)) {\n    btif_remote_device_t *rdev = btif_a2dp_get_stream_conn_remDev(\n        app_bt_device.a2dp_connected_stream[deviceId]);\n    if (rdev) {\n      bt_bdaddr_t *bd_addr = btif_me_get_remote_device_bdaddr(rdev);\n      if (is_bd_addr_valid(bd_addr)) {\n        btif_avrcp_connect(app_bt_device.avrcp_channel[deviceId], bd_addr);\n      } else {\n        TRACE(1, \"%s bd_addr is empty \", __func__);\n      }\n    } else {\n      TRACE(1, \"%s rdev  is NULL \", __func__);\n    }\n  }\n}\n\nvoid app_avrcp_connect_timeout_timer_callback(void const *param) {\n  app_bt_start_custom_function_in_bt_thread(\n      (uint32_t)param, 0, (uint32_t)app_avrcp_connect_timeout_timer_handler);\n}\n\n#define MAX_AVRCP_CONNECT_TRY_TIME 3\nosTimerDef(APP_AVRCP_CONNECT0, app_avrcp_connect_timeout_timer_callback);\nosTimerId POSSIBLY_UNUSED app_avrcp_connect_timer0 = NULL;\nstatic uint8_t app_avrcp_connect_try_times[BT_DEVICE_NUM];\n#ifdef __BT_ONE_BRING_TWO__\nosTimerDef(APP_AVRCP_CONNECT1, app_avrcp_connect_timeout_timer_callback);\nosTimerId POSSIBLY_UNUSED app_avrcp_connect_timer1 = NULL;\n#endif\n\n#define MAX_GET_CAPABILITIES_RETRY_TIME (3)\n#define MAX_GET_CAPABILITIES_RETRY_INTERVAL (500)\n\ntypedef struct {\n  btif_avrcp_chnl_handle_t chnl;\n  osTimerId delay_timer;\n  int8_t retry_cnt;\n} app_avrcp_get_capabilities_ctx_t;\n\nvoid app_avrcp_get_capabilities_retry_callback(void const *param);\nosTimerDef(APP_AVRCP_GET_CAPABILITIES0,\n           app_avrcp_get_capabilities_retry_callback);\nosTimerId POSSIBLY_UNUSED app_avrcp_get_capabilities_timer0 = NULL;\napp_avrcp_get_capabilities_ctx_t app_avrcp_get_capabilities_ctx0;\n\n#ifdef __BT_ONE_BRING_TWO__\nosTimerDef(APP_AVRCP_GET_CAPABILITIES1,\n           app_avrcp_get_capabilities_retry_callback);\nosTimerId POSSIBLY_UNUSED app_avrcp_get_capabilities_timer1 = NULL;\napp_avrcp_get_capabilities_ctx_t app_avrcp_get_capabilities_ctx1;\n#endif\n\nvoid app_avrcp_get_capabilities_start(btif_avrcp_chnl_handle_t chnl) {\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T device_id =\n      (chnl == app_bt_device.avrcp_channel[0]->avrcp_channel_handle)\n          ? BT_DEVICE_ID_1\n          : BT_DEVICE_ID_2;\n#else\n  enum BT_DEVICE_ID_T device_id = BT_DEVICE_ID_1;\n#endif\n  btif_avrcp_channel_t *channel = btif_get_avrcp_channel(chnl);\n\n  if (btif_get_avrcp_version(channel) == BTIF_AVRCP_VERSION_UNKNOWN) {\n    APP_A2DP_TRACE(0, \"::AVRCP_GET_CAPABILITY DELAY\\n\");\n    switch (device_id) {\n#ifdef __BT_ONE_BRING_TWO__\n    case BT_DEVICE_ID_2:\n      app_avrcp_get_capabilities_ctx1.chnl = chnl;\n      app_avrcp_get_capabilities_ctx1.retry_cnt =\n          MAX_GET_CAPABILITIES_RETRY_TIME;\n      osTimerStart(app_avrcp_get_capabilities_ctx1.delay_timer,\n                   MAX_GET_CAPABILITIES_RETRY_INTERVAL);\n      break;\n#endif\n    case BT_DEVICE_ID_1:\n    default:\n      app_avrcp_get_capabilities_ctx0.chnl = chnl;\n      app_avrcp_get_capabilities_ctx0.retry_cnt =\n          MAX_GET_CAPABILITIES_RETRY_TIME;\n      osTimerStart(app_avrcp_get_capabilities_ctx0.delay_timer,\n                   MAX_GET_CAPABILITIES_RETRY_INTERVAL);\n      break;\n    }\n  } else {\n    if (btif_get_avrcp_version(channel) >= BTIF_AVRCP_VERSION_1_3) {\n      APP_A2DP_TRACE(0, \"::AVRCP_GET_CAPABILITY\\n\");\n      if (app_bt_device.avrcp_cmd1[device_id] == NULL) {\n        btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n            &app_bt_device.avrcp_cmd1[device_id]);\n      }\n      btif_avrcp_ct_get_capabilities(channel,\n                                     app_bt_device.avrcp_cmd1[device_id],\n                                     BTIF_AVRCP_CAPABILITY_EVENTS_SUPPORTED);\n    }\n  }\n}\n\nvoid app_avrcp_get_capabilities_retry_callback(void const *param) {\n  app_avrcp_get_capabilities_ctx_t *get_capabilities_ctx =\n      (app_avrcp_get_capabilities_ctx_t *)param;\n  enum BT_DEVICE_ID_T device_id = BT_DEVICE_ID_1;\n  btif_avrcp_channel_t *channel = NULL;\n\n#ifdef __BT_ONE_BRING_TWO__\n  device_id = (get_capabilities_ctx->chnl ==\n               app_bt_device.avrcp_channel[0]->avrcp_channel_handle)\n                  ? BT_DEVICE_ID_1\n                  : BT_DEVICE_ID_2;\n#else\n  device_id = BT_DEVICE_ID_1;\n#endif\n  channel = btif_get_avrcp_channel(get_capabilities_ctx->chnl);\n\n  get_capabilities_ctx->retry_cnt--;\n\n  if (btif_get_avrcp_state(channel) != BTIF_AVRCP_STATE_CONNECTED) {\n    APP_A2DP_TRACE(0, \"::AVRCP_GET_CAPABILITY CONTINUE disconnect cancel\");\n    return;\n  }\n\n  if (get_capabilities_ctx->retry_cnt <= 0) {\n    APP_A2DP_TRACE(0, \"::AVRCP_GET_CAPABILITY CONTINUE limit cancel\");\n    return;\n  }\n\n  if (app_bt_device.avrcp_cmd1[device_id] == NULL) {\n    btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n        &app_bt_device.avrcp_cmd1[device_id]);\n  }\n\n  if (btif_get_avrcp_version(channel) == BTIF_AVRCP_VERSION_UNKNOWN) {\n    APP_A2DP_TRACE(1, \"::AVRCP_GET_CAPABILITY CONTINUE cnt:%d\\n\",\n                   get_capabilities_ctx->retry_cnt);\n    switch (device_id) {\n#ifdef __BT_ONE_BRING_TWO__\n    case BT_DEVICE_ID_2:\n      osTimerStart(app_avrcp_get_capabilities_ctx1.delay_timer,\n                   MAX_GET_CAPABILITIES_RETRY_INTERVAL);\n      break;\n#endif\n    case BT_DEVICE_ID_1:\n    default:\n      osTimerStart(app_avrcp_get_capabilities_ctx0.delay_timer,\n                   MAX_GET_CAPABILITIES_RETRY_INTERVAL);\n      break;\n    }\n  } else {\n    if (btif_get_avrcp_version(channel) >= BTIF_AVRCP_VERSION_1_3) {\n      APP_A2DP_TRACE(0, \"::AVRCP_GET_CAPABILITY\\n\");\n      if (app_bt_device.avrcp_cmd1[device_id] == NULL) {\n        btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n            &app_bt_device.avrcp_cmd1[device_id]);\n      }\n      btif_avrcp_ct_get_capabilities(channel,\n                                     app_bt_device.avrcp_cmd1[device_id],\n                                     BTIF_AVRCP_CAPABILITY_EVENTS_SUPPORTED);\n    }\n  }\n}\n\n#ifdef BTIF_AVRCP_ADVANCED_CONTROLLER\n\nvoid a2dp_init(void) {\n  btif_a2dp_init();\n  for (int i = 0; i < BT_DEVICE_NUM; i++) {\n    app_bt_device.a2dp_stream[i] = btif_a2dp_alloc_stream();\n#if defined(A2DP_LHDC_ON)\n    app_bt_device.a2dp_lhdc_stream[i] = btif_a2dp_alloc_stream();\n#endif\n#if defined(A2DP_SCALABLE_ON)\n    app_bt_device.a2dp_scalable_stream[i] = btif_a2dp_alloc_stream();\n#endif\n#if defined(ALL_USE_OPUS)\n    app_bt_device.a2dp_aac_stream[i] = btif_a2dp_alloc_stream();\n#endif\n#if defined(A2DP_AAC_ON)\n    app_bt_device.a2dp_aac_stream[i] = btif_a2dp_alloc_stream();\n#endif\n#if defined(A2DP_LDAC_ON)\n    app_bt_device.a2dp_ldac_stream[i] = btif_a2dp_alloc_stream();\n#endif\n  }\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n  struct nvrecord_env_t *nvrecord_env;\n  nv_record_env_get(&nvrecord_env);\n  app_bt_device.src_or_snk = nvrecord_env->src_snk_flag.src_snk_mode;\n  app_bt_device.src_or_snk = BT_DEVICE_SRC;\n  //  app_bt_device.src_or_snk=BT_DEVICE_SNK;\n  TRACE(1, \"src_or_snk:%d\\n\", app_bt_device.src_or_snk);\n  app_bt_device.input_onoff = 0;\n#endif\n\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    a2dp_channel_num[i] = BTIF_SBC_CHNL_MODE_STEREO;\n    app_bt_device.a2dp_state[i] = 0;\n    app_bt_device.a2dp_streamming[i] = 0;\n    app_bt_device.avrcp_get_capabilities_rsp[i] = NULL;\n    app_bt_device.avrcp_control_rsp[i] = NULL;\n    app_bt_device.avrcp_notify_rsp[i] = NULL;\n    app_bt_device.avrcp_cmd1[i] = NULL;\n    app_bt_device.avrcp_cmd2[i] = NULL;\n    app_bt_device.a2dp_connected_stream[i] = NULL;\n#ifdef __A2DP_AVDTP_CP__\n    app_bt_device.avdtp_cp[i] = 0;\n#endif\n\n    app_bt_device.latestPausedDevId = BT_DEVICE_ID_1;\n  }\n  app_bt_device.avrcpVolumeSync = 1;\n\n  btif_app_a2dp_avrcpadvancedpdu_mempool_init();\n\n  app_bt_device.a2dp_state[BT_DEVICE_ID_1] = 0;\n  app_bt_device.a2dp_play_pause_flag = 0;\n  app_bt_device.curr_a2dp_stream_id = BT_DEVICE_ID_1;\n\n  app_bt_device.callSetupBitRec = 0;\n\n  if (app_avrcp_connect_timer0 == NULL) {\n    app_avrcp_connect_timer0 =\n        osTimerCreate(osTimer(APP_AVRCP_CONNECT0), osTimerOnce, (void *)0);\n  }\n  app_avrcp_connect_try_times[0] = 0;\n\n  if (app_avrcp_get_capabilities_ctx0.delay_timer == NULL) {\n    app_avrcp_get_capabilities_ctx0.delay_timer =\n        osTimerCreate(osTimer(APP_AVRCP_GET_CAPABILITIES0), osTimerOnce,\n                      (void *)&app_avrcp_get_capabilities_ctx0);\n  }\n#ifdef __BT_ONE_BRING_TWO__\n  if (app_avrcp_connect_timer1 == NULL) {\n    app_avrcp_connect_timer1 =\n        osTimerCreate(osTimer(APP_AVRCP_CONNECT1), osTimerOnce, (void *)1);\n  }\n  app_avrcp_connect_try_times[1] = 0;\n\n  if (app_avrcp_get_capabilities_ctx1.delay_timer == NULL) {\n    app_avrcp_get_capabilities_ctx1.delay_timer =\n        osTimerCreate(osTimer(APP_AVRCP_GET_CAPABILITIES1), osTimerOnce,\n                      (void *)&app_avrcp_get_capabilities_ctx1);\n  }\n#endif\n}\n\nstatic bool a2dp_bdaddr_from_id(uint8_t id, bt_bdaddr_t *bd_addr) {\n  btif_remote_device_t *remDev = NULL;\n  ASSERT(id < BT_DEVICE_NUM, \"invalid bt device id\");\n  if (NULL != bd_addr) {\n    remDev =\n        btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[id]);\n    memset(bd_addr, 0, sizeof(bt_bdaddr_t));\n    if (NULL != remDev) {\n      memcpy(bd_addr, btif_me_get_remote_device_bdaddr(remDev),\n             sizeof(bt_bdaddr_t));\n      return true;\n    }\n  }\n  return false;\n}\n\nstatic bool a2dp_bdaddr_cmp(bt_bdaddr_t *bd_addr_1, bt_bdaddr_t *bd_addr_2) {\n  if ((NULL == bd_addr_1) || (NULL == bd_addr_2)) {\n    return false;\n  }\n  return (memcmp(bd_addr_1->address, bd_addr_2->address, BTIF_BD_ADDR_SIZE) ==\n          0);\n}\n\nbool a2dp_id_from_bdaddr(bt_bdaddr_t *bd_addr, uint8_t *id) {\n  bt_bdaddr_t curr_addr = {0};\n  uint8_t curr_id = BT_DEVICE_NUM;\n\n  if (app_bt_is_device_connected(BT_DEVICE_ID_1)) {\n    a2dp_bdaddr_from_id(BT_DEVICE_ID_1, &curr_addr);\n    if (a2dp_bdaddr_cmp(&curr_addr, bd_addr)) {\n      curr_id = BT_DEVICE_ID_1;\n    }\n  }\n\n#ifdef __BT_ONE_BRING_TWO__\n  if (app_bt_is_device_connected(BT_DEVICE_ID_2)) {\n    a2dp_bdaddr_from_id(BT_DEVICE_ID_2, &curr_addr);\n    if (a2dp_bdaddr_cmp(&curr_addr, bd_addr)) {\n      curr_id = BT_DEVICE_ID_2;\n    }\n  }\n#endif\n  if (id) {\n    *id = curr_id;\n  }\n  return (curr_id < BT_DEVICE_NUM);\n}\n\n#ifdef __BT_ONE_BRING_TWO__\n#define APP_BT_PAUSE_MEDIA_PLAYER_DELAY 300\nosTimerId app_bt_pause_media_player_delay_timer_id = NULL;\nextern uint8_t avrcp_playback_status[BT_DEVICE_NUM];\nstatic uint8_t deviceIdPendingForMediaPlayerPause = 0;\nstatic uint8_t deviceIdInMediaPlayHoldState = BT_DEVICE_NUM;\nstatic void app_bt_pause_media_player_delay_timer_handler(void const *n);\nosTimerDef(APP_BT_PAUSE_MEDIA_PLAYER_DELAY_TIMER,\n           app_bt_pause_media_player_delay_timer_handler);\n\nstatic void app_bt_pause_media_player_delay_timer_handler(void const *n) {\n  app_bt_start_custom_function_in_bt_thread(\n      deviceIdPendingForMediaPlayerPause, 0,\n      (uint32_t)app_bt_pause_music_player);\n}\n\nvoid app_bt_pause_media_player_again(uint8_t deviceId) {\n  if (NULL == app_bt_pause_media_player_delay_timer_id) {\n    app_bt_pause_media_player_delay_timer_id = osTimerCreate(\n        osTimer(APP_BT_PAUSE_MEDIA_PLAYER_DELAY_TIMER), osTimerOnce, NULL);\n  }\n\n  TRACE(1,\n        \"The media player on device %d is resumed before it's allowed, so \"\n        \"pause it again.\",\n        deviceId);\n\n  deviceIdPendingForMediaPlayerPause = deviceId;\n  osTimerStart(app_bt_pause_media_player_delay_timer_id,\n               APP_BT_PAUSE_MEDIA_PLAYER_DELAY);\n}\n\nbool app_bt_is_to_resume_music_player(uint8_t deviceId) {\n  return (deviceIdInMediaPlayHoldState == deviceId);\n}\n\nvoid app_bt_reset_music_player_resume_state(void) {\n  deviceIdInMediaPlayHoldState = BT_DEVICE_NUM;\n}\n\nvoid app_bt_set_music_player_resume_device(uint8_t deviceId) {\n  deviceIdInMediaPlayHoldState = deviceId;\n}\n\nbool app_bt_is_music_player_working(uint8_t deviceId) {\n  TRACE(3, \"device %d a2dp streaming %d playback state %d\", deviceId,\n        app_bt_is_a2dp_streaming(deviceId), avrcp_playback_status[deviceId]);\n  return (app_bt_is_a2dp_streaming(deviceId) &&\n          avrcp_playback_status[deviceId]);\n}\n\nvoid app_bt_suspend_a2dp_streaming(uint8_t deviceId) {\n  if (!app_bt_is_a2dp_streaming(deviceId)) {\n    return;\n  }\n\n  TRACE(1, \"Suspend a2dp streaming of device %d\", deviceId);\n  btif_a2dp_suspend_stream(app_bt_device.a2dp_connected_stream[deviceId]);\n}\n\nbool app_bt_pause_music_player(uint8_t deviceId) {\n  if (!app_bt_is_music_player_working(deviceId)) {\n    return false;\n  }\n\n  btif_avrcp_channel_t *avrcp_channel_tmp =\n      app_bt_device.avrcp_channel[deviceId];\n\n  TRACE(1, \"Pause music player of device %d\", deviceId);\n  app_bt_suspend_a2dp_streaming(deviceId);\n\n  btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_PAUSE, TRUE);\n  btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_PAUSE, FALSE);\n\n  app_bt_device.a2dp_play_pause_flag = 0;\n\n  return true;\n}\n\nvoid app_bt_resume_music_player(uint8_t deviceId) {\n  app_bt_reset_music_player_resume_state();\n\n  if (app_bt_is_music_player_working(deviceId)) {\n    return;\n  }\n\n  btif_avrcp_channel_t *avrcp_channel_tmp =\n      app_bt_device.avrcp_channel[deviceId];\n\n  TRACE(1, \"Resume music player of device %d\", deviceId);\n  btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_PLAY, TRUE);\n  btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_PLAY, FALSE);\n  app_bt_device.a2dp_play_pause_flag = 1;\n}\n#endif\n\nbool app_bt_is_a2dp_streaming(uint8_t deviceId) {\n  return app_bt_device.a2dp_streamming[deviceId];\n}\n\nFRAM_TEXT_LOC uint8_t bt_sbc_player_get_codec_type(void) {\n  enum BT_DEVICE_ID_T st_id = app_bt_device.curr_a2dp_stream_id;\n  if (app_bt_device.a2dp_connected_stream[st_id])\n    return btif_a2dp_get_stream_codec(\n               app_bt_device.a2dp_connected_stream[st_id])\n        ->codecType;\n  else\n    return BTIF_AVDTP_CODEC_TYPE_SBC;\n}\n\nFRAM_TEXT_LOC uint8_t bt_sbc_player_get_sample_bit(void) {\n  enum BT_DEVICE_ID_T st_id = app_bt_device.curr_a2dp_stream_id;\n\n  return app_bt_device.sample_bit[st_id];\n}\n\n#ifdef __BT_ONE_BRING_TWO__\n\nuint8_t avrcp_playback_status[BT_DEVICE_NUM] = {0};\nstatic struct BT_DEVICE_ID_DIFF avrcp_bond_a2dp_stream;\nstatic uint8_t avrcp_bonding_a2dp_id[BT_DEVICE_NUM] = {BT_DEVICE_NUM,\n                                                       BT_DEVICE_NUM};\nstatic POSSIBLY_UNUSED uint8_t a2dp_get_cur_stream_id(void) {\n  return (uint8_t)app_bt_device.curr_a2dp_stream_id;\n}\nstatic uint8_t avrcp_find_a2dp_stream_id(btif_avrcp_chnl_handle_t chnl) {\n  btif_remote_device_t *p_avrcp_remDev = btif_avrcp_get_remote_device(chnl);\n  uint8_t i = 0;\n  btif_remote_device_t *p_a2dp_remDev = 0;\n  TRACE(1, \"avrcp_remDev = %p\", p_avrcp_remDev);\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    p_a2dp_remDev =\n        btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[i]);\n    TRACE(1, \"p_a2dp_remDev = %p\", p_a2dp_remDev);\n    if (p_avrcp_remDev == p_a2dp_remDev)\n      break;\n  }\n  return i;\n}\nuint8_t get_avrcp_via_a2dp_id(uint8_t a2dp_id) {\n  enum BT_DEVICE_ID_T avrcp_id = BT_DEVICE_NUM;\n  if (avrcp_bonding_a2dp_id[BT_DEVICE_ID_1] == a2dp_id)\n    avrcp_id = BT_DEVICE_ID_1;\n  else if (avrcp_bonding_a2dp_id[BT_DEVICE_ID_2] == a2dp_id)\n    avrcp_id = BT_DEVICE_ID_2;\n  TRACE(2, \"[%s] avrcp_id = %d\", __func__, avrcp_id);\n  return avrcp_id;\n}\nstatic uint8_t\navrcp_distinguish_bonding_a2dp_stream(btif_avrcp_chnl_handle_t chnl,\n                                      uint8_t id) {\n  avrcp_bond_a2dp_stream.id =\n      (enum BT_DEVICE_ID_T)avrcp_find_a2dp_stream_id(chnl);\n  TRACE(2, \"%s id = %d\", __func__, avrcp_bond_a2dp_stream.id);\n  if (avrcp_bond_a2dp_stream.id == BT_DEVICE_NUM) {\n    avrcp_bond_a2dp_stream.id = BT_DEVICE_ID_1;\n    return 2;\n  }\n  avrcp_bonding_a2dp_id[id] = avrcp_bond_a2dp_stream.id;\n  return 0;\n}\n\nstatic void a2dp_to_bond_avrcp_with_stream(a2dp_stream_t *ptrA2dpStream,\n                                           uint8_t a2dpDevIndex) {\n  for (uint8_t avrcpIndex = 0; avrcpIndex < BT_DEVICE_NUM; avrcpIndex++) {\n    if (btif_avrcp_get_remote_device(\n            app_bt_device.avrcp_channel[avrcpIndex]->avrcp_channel_handle) ==\n        btif_a2dp_get_remote_device(ptrA2dpStream)) {\n      avrcp_bond_a2dp_stream.id = (enum BT_DEVICE_ID_T)a2dpDevIndex;\n      avrcp_bonding_a2dp_id[avrcpIndex] = a2dpDevIndex;\n      break;\n    }\n  }\n}\n\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\nvoid a2dp_update_music_link(void);\n#endif\n\nstatic void a2dp_set_cur_stream(enum BT_DEVICE_ID_T id) {\n  TRACE(1, \"Set current a2dp stream as %d\", id);\n  app_bt_device.curr_a2dp_stream_id = id;\n  if (app_bt_device.a2dp_connected_stream[id]) {\n    btif_remote_device_t *activeRem =\n        btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[id]);\n    if (activeRem)\n      app_bt_device.current_a2dp_conhdl =\n          btif_me_get_remote_device_hci_handle(activeRem);\n    else\n      app_bt_device.current_a2dp_conhdl = 0xffff;\n\n  } else {\n    app_bt_device.current_a2dp_conhdl = 0xffff;\n  }\n\n#ifdef __BT_ONE_BRING_TWO__\n  a2dp_update_music_link();\n#endif\n}\n\nstatic uint8_t a2dp_skip_frame_cnt = 0;\nenum BT_DEVICE_ID_T a2dp_get_cur_stream(void) {\n  return app_bt_device.curr_a2dp_stream_id;\n}\n\nuint16_t a2dp_Get_curr_a2dp_conhdl(void) {\n  return app_bt_device.current_a2dp_conhdl;\n}\n\nvoid a2dp_get_curStream_remDev(btif_remote_device_t **p_remDev) {\n  enum BT_DEVICE_ID_T id = a2dp_get_cur_stream();\n  uint8_t i = 0;\n  if (id != BT_DEVICE_NUM)\n    i = id;\n  *p_remDev =\n      btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[i]);\n  // TRACE(1,\"temp_addr = %x\",*p_remDev);\n}\nuint8_t app_a2dp_run_skip_frame(void) {\n  if (a2dp_skip_frame_cnt > 0) {\n    a2dp_skip_frame_cnt--;\n    return 1;\n  }\n  a2dp_skip_frame_cnt = 0;\n  return 0;\n}\nvoid app_a2dp_set_skip_frame(uint8_t frames) { a2dp_skip_frame_cnt = frames; }\n#define SWITCH_MUTE_FRAMES_CNT 65\nvoid app_a2dp_hold_mute() {\n  TRACE(0, \"mute a2dp streaming.\");\n  a2dp_skip_frame_cnt = SWITCH_MUTE_FRAMES_CNT;\n}\nvoid app_a2dp_unhold_mute() { a2dp_skip_frame_cnt = 0; }\n\navrcp_advanced_pdu_t *avrcp_get_play_status_cmd[BT_DEVICE_NUM] = {NULL};\n\nvoid avrcp_get_current_media_status(enum BT_DEVICE_ID_T device_id) {\n  if (app_bt_device.avrcp_state[device_id] == 0)\n    return;\n  if (NULL == avrcp_get_play_status_cmd[device_id]) {\n    btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n        &avrcp_get_play_status_cmd[device_id]);\n  }\n  btif_avrcp_ct_get_play_status(app_bt_device.avrcp_channel[device_id],\n                                avrcp_get_play_status_cmd[device_id]);\n}\n\nvoid btapp_a2dp_suspend_music(enum BT_DEVICE_ID_T stream_id);\nuint8_t a2dp_get_streaming_id(void);\nvoid avrcp_set_media_status(uint8_t status);\n\n#ifdef USER_REBOOT_PLAY_MUSIC_AUTO\nextern bool a2dp_need_to_play;\n#endif\nextern \"C\" void avrcp_callback_CT(btif_avrcp_chnl_handle_t chnl,\n                                  const avrcp_callback_parms_t *parms) {\n  btif_avrcp_channel_t *channel = btif_get_avrcp_channel(chnl);\n  btif_avctp_event_t event = btif_avrcp_get_callback_event(parms);\n  APP_A2DP_TRACE(3, \"%s : chnl %p, Parms %p\\n\", __func__, chnl, parms);\n  APP_A2DP_TRACE(2, \"::%s Parms->event %d\\n\", __func__,\n                 btif_avrcp_get_callback_event(parms));\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T device_id =\n      (chnl == app_bt_device.avrcp_channel[0]->avrcp_channel_handle)\n          ? BT_DEVICE_ID_1\n          : BT_DEVICE_ID_2;\n  enum BT_DEVICE_ID_T device_id_other =\n      (device_id == BT_DEVICE_ID_1) ? (BT_DEVICE_ID_2) : (BT_DEVICE_ID_1);\n  APP_A2DP_TRACE(1, \"device_id = %d\", device_id);\n#else\n  enum BT_DEVICE_ID_T device_id = BT_DEVICE_ID_1;\n#endif\n  switch (event) {\n  case BTIF_AVRCP_EVENT_CONNECT_IND:\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"Connect ok.\");\n#endif\n    APP_A2DP_TRACE(1, \"::avrcp_callback_CT AVRCP_EVENT_CONNECT_IND %d\\n\",\n                   btif_avrcp_get_callback_event(parms));\n    btif_avrcp_connect_rsp(channel, 1);\n\n    break;\n  case BTIF_AVRCP_EVENT_CONNECT:\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"Connect ok.\");\n#endif\n    app_bt_device.avrcp_state[device_id] = 1;\n    app_avrcp_get_capabilities_start(chnl);\n\n#ifdef AVRCP_TRACK_CHANGED\n    if (app_bt_device.avrcp_cmd2[device_id] == NULL)\n      btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n          &app_bt_device.avrcp_cmd2[device_id]);\n    btif_avrcp_ct_register_notification(channel,\n                                        app_bt_device.avrcp_cmd2[device_id],\n                                        BTIF_AVRCP_ENABLE_TRACK_CHANGED, 0);\n#endif\n#ifdef __AVRCP_TRACK_PLAY_STATUS__\n    TRACE(0, \"::REG AVRCP_EID_MEDIA_STATUS_CHANGED\\n\");\n    if (app_bt_device.avrcp_cmd1[device_id] == NULL)\n      app_a2dp_avrcpadvancedpdu_mempool_calloc(\n          app_bt_device.avrcp_cmd1[device_id]);\n    btif_avrcp_ct_register_notification(channel,\n                                        app_bt_device.avrcp_cmd1[device_id],\n                                        AVRCP_EID_MEDIA_STATUS_CHANGED, 0);\n#endif\n    avrcp_get_current_media_status(device_id);\n    APP_A2DP_TRACE(2, \"::AVRCP_EVENT_CONNECT avrcp_version=0x%x,device_id=%d\\n\",\n                   btif_get_avrcp_version(channel), device_id);\n#ifdef __BT_ONE_BRING_TWO__\n    avrcp_playback_status[device_id] = 0;\n    avrcp_bonding_a2dp_id[device_id] = BT_DEVICE_NUM;\n    avrcp_distinguish_bonding_a2dp_stream(chnl, device_id);\n#endif\n#ifdef USER_REBOOT_PLAY_MUSIC_AUTO\n    if (a2dp_need_to_play == true) {\n      TRACE(0, \"a2dp_need_to_play is true,now play music\");\n      a2dp_handleKey(AVRCP_KEY_PLAY);\n      a2dp_need_to_play = false;\n    }\n#endif\n    app_avrcp_connect_try_times[device_id] = 0;\n    break;\n  case BTIF_AVRCP_EVENT_DISCONNECT:\n    app_bt_device.avrcp_state[device_id] = 0;\n    TRACE(0, \"::AVRCP_EVENT_DISCONNECT\");\n#ifdef __BT_ONE_BRING_TWO__\n    if (app_bt_is_to_resume_music_player(device_id)) {\n      app_bt_reset_music_player_resume_state();\n    }\n#endif\n    if (app_bt_device.avrcp_get_capabilities_rsp[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_get_capabilities_rsp[device_id]);\n      app_bt_device.avrcp_get_capabilities_rsp[device_id] = NULL;\n    }\n    if (app_bt_device.avrcp_control_rsp[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_control_rsp[device_id]);\n      app_bt_device.avrcp_control_rsp[device_id] = NULL;\n    }\n    if (app_bt_device.avrcp_notify_rsp[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_notify_rsp[device_id]);\n      app_bt_device.avrcp_notify_rsp[device_id] = NULL;\n    }\n\n    if (app_bt_device.avrcp_cmd1[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_cmd1[device_id]);\n      app_bt_device.avrcp_cmd1[device_id] = NULL;\n    }\n    if (app_bt_device.avrcp_cmd2[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_cmd2[device_id]);\n      app_bt_device.avrcp_cmd2[device_id] = NULL;\n    }\n    app_bt_device.volume_report[device_id] = 0;\n#ifdef AVRCP_TRACK_CHANGED\n    app_bt_device.track_changed[device_id] = 0;\n#endif\n#ifdef __BT_ONE_BRING_TWO__\n    avrcp_playback_status[device_id] = 0;\n    avrcp_bonding_a2dp_id[device_id] = BT_DEVICE_NUM;\n#endif\n\n    if (0 == device_id) {\n      osTimerStop(app_avrcp_connect_timer0);\n    }\n#ifdef __BT_ONE_BRING_TWO__\n    else {\n      osTimerStop(app_avrcp_connect_timer1);\n    }\n#endif\n\n#ifndef IBRT\n    if (!app_is_disconnecting_all_bt_connections()) {\n      app_avrcp_connect_try_times[device_id]++;\n      if (app_avrcp_connect_try_times[device_id] < MAX_AVRCP_CONNECT_TRY_TIME) {\n        if (0 == device_id) {\n          osTimerStart(app_avrcp_connect_timer0, 3000);\n        }\n#ifdef __BT_ONE_BRING_TWO__\n        else {\n          osTimerStart(app_avrcp_connect_timer1, 3000);\n        }\n#endif\n      }\n    }\n#endif\n    break;\n  case BTIF_AVRCP_EVENT_RESPONSE:\n    APP_A2DP_TRACE(2,\n                   \"::avrcp_callback_CT AVRCP_EVENT_RESPONSE op=%x,status=%x\\n\",\n                   btif_get_avrcp_cb_channel_advOp(parms),\n                   btif_get_avrcp_cb_channel_state(parms));\n\n    if (btif_get_avrcp_cb_channel_advOp(parms) ==\n        BTIF_AVRCP_OP_GET_PLAY_STATUS) {\n      avrcp_set_media_status((uint8_t)btif_get_avrcp_cb_channel_state(parms));\n      if (btif_get_avrcp_cb_channel_state(parms) == 0x1) {\n        app_bt_device.a2dp_play_pause_flag = 1;\n      } else if (btif_get_avrcp_adv_rsp_play_status(parms)->mediaStatus ==\n                     0x0 ||\n                 btif_get_avrcp_adv_rsp_play_status(parms)->mediaStatus ==\n                     0x2) {\n        app_bt_device.a2dp_play_pause_flag = 0;\n      }\n    }\n\n    break;\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n    /*For Sony Compability Consideration*/\n  case BTIF_AVRCP_EVENT_PANEL_PRESS:\n    TRACE(3, \"::avrcp_callback_TG AVRCP_EVENT_PANEL_PRESS %x,%x,device_id=%d\",\n          btif_get_avrcp_panel_cnf(parms)->operation,\n          btif_get_avrcp_panel_ind(parms)->operation, device_id);\n\n    switch (btif_get_avrcp_panel_ind(parms)->operation) {\n    case BTIF_AVRCP_POP_VOLUME_UP:\n      TRACE(0, \"avrcp_callback_TG avrcp_key = AVRCP_KEY_VOLUME_UP\");\n      app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_UP, 0);\n      break;\n    case BTIF_AVRCP_POP_VOLUME_DOWN:\n      TRACE(0, \"avrcp_callback_TG avrcp_key = AVRCP_KEY_VOLUME_DOWN\");\n      app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_DOWN, 0);\n      break;\n    // SRC:for accept play/pause command from snk\n    case BTIF_AVRCP_POP_PLAY:\n      TRACE(0, \"::avrcp start stream !\");\n      app_a2dp_start_stream();\n      break;\n    case BTIF_AVRCP_POP_PAUSE:\n      TRACE(0, \"::acrcp stop stream !\");\n      app_a2dp_suspend_stream();\n      break;\n    default:\n      break;\n    }\n    break;\n#else\n    /*For Sony Compability Consideration*/\n  case BTIF_AVRCP_EVENT_PANEL_PRESS:\n    TRACE(3, \"::avrcp_callback_TG AVRCP_EVENT_PANEL_PRESS %x,%x,device_id=%d\",\n          btif_get_avrcp_panel_cnf(parms)->operation,\n          btif_get_avrcp_panel_ind(parms)->operation, device_id);\n    switch (btif_get_avrcp_panel_cnf(parms)->operation) {\n    case BTIF_AVRCP_POP_VOLUME_UP:\n      TRACE(0, \"avrcp_callback_TG avrcp_key = AVRCP_KEY_VOLUME_UP\");\n      app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_UP, 0);\n      break;\n    case BTIF_AVRCP_POP_VOLUME_DOWN:\n      TRACE(0, \"avrcp_callback_TG avrcp_key = AVRCP_KEY_VOLUME_DOWN\");\n      app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_DOWN, 0);\n      break;\n    default:\n      break;\n    }\n    break;\n\n#endif\n  case BTIF_AVRCP_EVENT_PANEL_HOLD:\n    TRACE(2, \"::avrcp_callback_TG AVRCP_EVENT_PANEL_HOLD %x,%x\",\n          btif_get_avrcp_panel_cnf(parms)->operation,\n          btif_get_avrcp_panel_ind(parms)->operation);\n    break;\n  case BTIF_AVRCP_EVENT_PANEL_RELEASE:\n    TRACE(2, \"::avrcp_callback_TG AVRCP_EVENT_PANEL_RELEASE %x,%x\",\n          btif_get_avrcp_panel_cnf(parms)->operation,\n          btif_get_avrcp_panel_ind(parms)->operation);\n    break;\n    /*For Sony Compability Consideration End*/\n  case BTIF_AVRCP_EVENT_PANEL_CNF:\n    TRACE(3, \"::AVRCP_EVENT_PANEL_CNF %x,%x,%x\",\n          btif_get_avrcp_panel_cnf(parms)->operation,\n          btif_get_avrcp_panel_cnf(parms)->press,\n          btif_get_avrcp_panel_cnf(parms)->response);\n    break;\n  case BTIF_AVRCP_EVENT_ADV_TX_DONE: // 20\n    TRACE(3, \"::AVRCP_EVENT_ADV_TX_DONE op:%x err_code:%d state:%d\\n\",\n          btif_get_avrcp_cb_txPdu_Op(parms),\n          btif_get_avrcp_cb_channel_error_code(parms),\n          btif_get_avrcp_cb_channel_state(parms));\n\n    if (btif_get_avrcp_cb_txPdu_Op(parms) == BTIF_AVRCP_OP_GET_CAPABILITIES) {\n      if (app_bt_device.avrcp_get_capabilities_rsp[device_id] ==\n          btif_get_avrcp_cb_txPdu(parms)) {\n        app_bt_device.avrcp_get_capabilities_rsp[device_id] = NULL;\n        btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n            btif_get_avrcp_cb_txPdu(parms));\n      }\n    }\n    {\n      void *adv_pdu = app_bt_device.avrcp_notify_rsp[device_id];\n\n      if (adv_pdu &&\n          btif_get_avrcp_pdu_ctype(adv_pdu) == BTIF_AVCTP_RESPONSE_INTERIM) {\n        vol_ctrl_done_flag[device_id] = TX_DONE_FLAG_SUCCESS;\n      }\n    }\n    break;\n  case BTIF_AVRCP_EVENT_ADV_RESPONSE: // 18\n    TRACE(2,\n          \"::avrcp_callback_CT AVRCP_EVENT_ADV_RESPONSE device_id=%d,role=%x\\n\",\n          device_id, btif_get_avrcp_channel_role(channel));\n    TRACE(2, \"::avrcp_callback_CT AVRCP_EVENT_ADV_RESPONSE op=%x,status=%x\\n\",\n          btif_get_avrcp_cb_channel_advOp(parms),\n          btif_get_avrcp_cb_channel_state(parms));\n\n    if (btif_get_avrcp_cb_channel_advOp(parms) ==\n            BTIF_AVRCP_OP_GET_PLAY_STATUS &&\n        btif_get_avrcp_cb_channel_state(parms) == BT_STS_SUCCESS) {\n      TRACE(3, \"::AVRCP_OP_GET_PLAY_STATUS %d/%d Status:%d\",\n            btif_get_avrcp_adv_rsp_play_status(parms)->position,\n            btif_get_avrcp_adv_rsp_play_status(parms)->length,\n            btif_get_avrcp_adv_rsp_play_status(parms)->mediaStatus);\n      avrcp_set_media_status(\n          btif_get_avrcp_adv_rsp_play_status(parms)->mediaStatus);\n    }\n\n    if (btif_get_avrcp_cb_channel_advOp(parms) ==\n            BTIF_AVRCP_OP_GET_CAPABILITIES &&\n        btif_get_avrcp_cb_channel_state(parms) == BT_STS_SUCCESS) {\n      TRACE(1, \"::avrcp_callback_CT AVRCP eventmask=%x\\n\",\n            btif_get_avrcp_adv_rsp(parms)->capability.info.eventMask);\n\n      btif_set_avrcp_adv_rem_event_mask(\n          channel, btif_get_avrcp_adv_rsp(parms)->capability.info.eventMask);\n      if (btif_get_avrcp_adv_rem_event_mask(channel) &\n          BTIF_AVRCP_ENABLE_PLAY_STATUS_CHANGED) {\n        TRACE(0, \"::avrcp_callback_CT AVRCP send notification \"\n                 \"PLAY_STATUS_CHANGED\\n\");\n        if (app_bt_device.avrcp_cmd1[device_id] == NULL) {\n          btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n              &app_bt_device.avrcp_cmd1[device_id]);\n        }\n        btif_avrcp_ct_register_notification(\n            channel, app_bt_device.avrcp_cmd1[device_id],\n            BTIF_AVRCP_EID_MEDIA_STATUS_CHANGED, 0);\n      }\n      if (btif_get_avrcp_adv_rem_event_mask(channel) &\n          BTIF_AVRCP_ENABLE_PLAY_POS_CHANGED) {\n#if 0\n                    TRACE(0,\"::avrcp_callback_CT AVRCP send notification PLAY_POS_CHANGED\\n\");\n                    if (app_bt_device.avrcp_cmd2[device_id] == NULL){\n                        btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(&app_bt_device.avrcp_cmd2[device_id]);\n                    }\n                    btif_avrcp_ct_register_notification(channel,app_bt_device.avrcp_cmd2[device_id],BTIF_AVRCP_EID_PLAY_POS_CHANGED,1);\n#endif\n      }\n    } else if (btif_get_avrcp_cb_channel_advOp(parms) ==\n                   BTIF_AVRCP_OP_REGISTER_NOTIFY &&\n               btif_get_avrcp_cb_channel_state(parms) == BT_STS_SUCCESS) {\n      btif_avrcp_ct_register_notify_response_check(\n          channel, btif_get_avrcp_adv_notify(parms)->event);\n      if (btif_get_avrcp_adv_notify(parms)->event ==\n          BTIF_AVRCP_EID_MEDIA_STATUS_CHANGED) {\n        TRACE(1, \"::avrcp_callback_CT ACRCP notify rsp playback states=%x\",\n              btif_get_avrcp_adv_notify(parms)->p.mediaStatus);\n#if defined(__BT_ONE_BRING_TWO__)\n        if (btif_get_avrcp_adv_notify(parms)->p.mediaStatus == 0x1) {\n          avrcp_playback_status[device_id] = 0x01;\n          if (app_bt_is_to_resume_music_player(device_id) ||\n              (BTIF_HF_AUDIO_CON ==\n               app_bt_device.hf_audio_state[device_id_other])) {\n            app_bt_pause_media_player_again(device_id);\n          }\n        } else if (btif_get_avrcp_adv_notify(parms)->p.mediaStatus == 0x0 ||\n                   btif_get_avrcp_adv_notify(parms)->p.mediaStatus == 0x2) {\n          avrcp_playback_status[device_id] = 0x00;\n          app_bt_device.latestPausedDevId = device_id;\n        }\n#endif\n#if defined(__BT_ONE_BRING_TWO__) && defined(__MULTIPOINT_A2DP_PREEMPT__)\n        uint8_t is_a2dp_streaming = 0;\n        enum BT_DEVICE_ID_T avrcp_bonding_a2dp_another = BT_DEVICE_NUM;\n        is_a2dp_streaming = a2dp_get_streaming_id();\n        TRACE(1, \"is_a2dp_streaming = %d\", is_a2dp_streaming);\n        TRACE(2, \"device_id = %d other_id = %d\", device_id, device_id_other);\n        if (avrcp_distinguish_bonding_a2dp_stream(chnl, device_id) == 0x02) {\n          return;\n        }\n        avrcp_bonding_a2dp_another =\n            (avrcp_bond_a2dp_stream.id == BT_DEVICE_ID_1) ? (BT_DEVICE_ID_2)\n                                                          : (BT_DEVICE_ID_1);\n        TRACE(5,\n              \"avrcp_playback_status_id[%d] = %d , \"\n              \"avrcp_playback_status_id_other[%d] = %d cur_a2dp_stream = %d\",\n              device_id, avrcp_playback_status[device_id], device_id_other,\n              avrcp_playback_status[device_id_other],\n              app_bt_device.curr_a2dp_stream_id);\n        if ((avrcp_playback_status[BT_DEVICE_ID_1] == 0) &&\n            (avrcp_playback_status[BT_DEVICE_ID_2] == 0)) {\n          app_bt_device.a2dp_play_pause_flag = 0;\n        } else {\n          app_bt_device.a2dp_play_pause_flag = 1;\n        }\n        if (is_a2dp_streaming != 0) {\n          if (avrcp_playback_status[device_id] ==\n              1) /*&&\n                   (avrcp_playback_status[BT_DEVICE_ID_2] == 1))*/\n          {\n            app_audio_manager_sendrequest(\n                APP_BT_STREAM_MANAGER_START, BT_STREAM_SBC,\n                avrcp_bond_a2dp_stream.id, MAX_RECORD_NUM);\n            a2dp_set_cur_stream(avrcp_bond_a2dp_stream.id);\n#if 1\n            if (avrcp_playback_status[device_id_other] == 1) {\n              btapp_a2dp_suspend_music(device_id_other);\n              app_audio_manager_sendrequest(\n                  APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                  avrcp_bonding_a2dp_another, MAX_RECORD_NUM);\n              /*if(bt_media_is_media_active_by_device(BT_STREAM_SBC,avrcp_bond_a2dp_stream.id_other)\n               * != 0)*/\n              {\n                app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_SET,\n                                              TGT_VOLUME_LEVEL_MUTE);\n                app_a2dp_hold_mute();\n              }\n            }\n#endif\n          }\n          if (is_a2dp_streaming > 2) {\n            if ((avrcp_playback_status[device_id] == 1) &&\n                (avrcp_playback_status[device_id_other] == 0)) {\n              a2dp_set_cur_stream(avrcp_bond_a2dp_stream.id);\n            }\n            if (app_bt_device.a2dp_play_pause_flag == 0) {\n              app_audio_manager_sendrequest(\n                  APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                  avrcp_bond_a2dp_stream.id, MAX_RECORD_NUM);\n            }\n          }\n          if (app_bt_device.a2dp_play_pause_flag == 1) {\n            if (avrcp_playback_status[device_id] == 0) {\n              a2dp_set_cur_stream(avrcp_bonding_a2dp_another);\n              app_a2dp_unhold_mute();\n            }\n          }\n        }\n        TRACE(1, \">stream_id = %d\", a2dp_get_cur_stream_id());\n#else\n        avrcp_set_media_status(btif_get_avrcp_adv_notify(parms)->p.mediaStatus);\n        if (btif_get_avrcp_adv_notify(parms)->p.mediaStatus == 0x1) {\n          app_bt_device.a2dp_play_pause_flag = 1;\n        } else if (btif_get_avrcp_adv_notify(parms)->p.mediaStatus == 0x0 ||\n                   btif_get_avrcp_adv_notify(parms)->p.mediaStatus == 0x2) {\n          app_bt_device.a2dp_play_pause_flag = 0;\n        }\n#endif\n      } else if (btif_get_avrcp_adv_notify(parms)->event ==\n                 BTIF_AVRCP_EID_PLAY_POS_CHANGED) {\n        TRACE(1, \"::ACRCP notify rsp play pos =%x\",\n              btif_get_avrcp_adv_notify(parms)->p.position);\n      } else if (btif_get_avrcp_adv_notify(parms)->event ==\n                 BTIF_AVRCP_EID_VOLUME_CHANGED) {\n        TRACE(1, \"::ACRCP notify rsp volume =%x\",\n              btif_get_avrcp_adv_notify(parms)->p.volume);\n        a2dp_volume_set(device_id, btif_get_avrcp_adv_notify(parms)->p.volume);\n      }\n#ifdef AVRCP_TRACK_CHANGED\n      else if (btif_get_avrcp_adv_notify(parms)->event ==\n               BTIF_AVRCP_EID_TRACK_CHANGED) {\n        //   TRACE(1,\"::AVRCP_EID_TRACK_CHANGED transId:%d\\n\",\n        //   Parms->p.cmdFrame->transId);\n        if (app_bt_device.avrcp_notify_rsp[device_id] == NULL)\n          btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n              &app_bt_device.avrcp_notify_rsp[device_id]);\n\n        btif_set_app_bt_device_avrcp_notify_rsp_ctype(\n            app_bt_device.avrcp_notify_rsp[device_id],\n            BTIF_AVCTP_RESPONSE_INTERIM);\n\n        app_bt_device.track_changed[device_id] = BTIF_AVCTP_RESPONSE_INTERIM;\n        btif_avrcp_ct_get_media_Info(\n            channel, app_bt_device.avrcp_notify_rsp[device_id], 0x7f);\n      }\n#endif\n    } else if (btif_get_avrcp_cb_channel_advOp(parms) ==\n                   BTIF_AVRCP_OP_GET_PLAY_STATUS &&\n               btif_get_avrcp_cb_channel_state(parms) == BT_STS_SUCCESS) {\n      TRACE(1, \"AVRCP get play status returns %d\",\n            btif_get_avrcp_adv_rsp_play_status(parms)->mediaStatus);\n#if defined(__BT_ONE_BRING_TWO__)\n      if (btif_get_avrcp_adv_rsp_play_status(parms)->mediaStatus == 0x1) {\n        avrcp_playback_status[device_id] = 0x01;\n      } else if (btif_get_avrcp_adv_rsp_play_status(parms)->mediaStatus ==\n                     0x0 ||\n                 btif_get_avrcp_adv_rsp_play_status(parms)->mediaStatus ==\n                     0x2) {\n        avrcp_playback_status[device_id] = 0x00;\n      }\n#endif\n    }\n#ifdef AVRCP_TRACK_CHANGED\n    else if (btif_get_avrcp_cb_channel_advOp(parms) ==\n                 BTIF_AVRCP_OP_GET_MEDIA_INFO &&\n             btif_get_avrcp_cb_channel_state(parms) == BT_STS_SUCCESS) {\n      TRACE(1, \"AVRCP_TRACK_CHANGED numid=%d\",\n            btif_get_avrcp_adv_rsp(parms)->element.numIds);\n      for (uint8_t i = 0; i < 7; i++) {\n        if (btif_get_avrcp_adv_rsp(parms)->element.txt[i].length > 0) {\n          TRACE(2, \"Id=%d,%s\\n\", i,\n                btif_get_avrcp_adv_rsp(parms)->element.txt[i].string);\n        }\n      }\n    }\n#endif\n    break;\n  case BTIF_AVRCP_EVENT_COMMAND:\n    TRACE(2, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND device_id=%d,role=%x\\n\",\n          device_id, btif_get_avrcp_channel_role(channel));\n    TRACE(2, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND ctype=%x,subunitype=%x\\n\",\n          btif_get_avrcp_cmd_frame(parms)->ctype,\n          btif_get_avrcp_cmd_frame(parms)->subunitType);\n    TRACE(2, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND subunitId=%x,opcode=%x\\n\",\n          btif_get_avrcp_cmd_frame(parms)->subunitId,\n          btif_get_avrcp_cmd_frame(parms)->opcode);\n    TRACE(2,\n          \"::avrcp_callback_CT AVRCP_EVENT_COMMAND operands=%p,operandLen=%x\\n\",\n          btif_get_avrcp_cmd_frame(parms)->operands,\n          btif_get_avrcp_cmd_frame(parms)->operandLen);\n    TRACE(1, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND more=%x\\n\",\n          btif_get_avrcp_cmd_frame(parms)->more);\n    if (btif_get_avrcp_cmd_frame(parms)->ctype == BTIF_AVRCP_CTYPE_STATUS) {\n      uint32_t company_id =\n          *(btif_get_avrcp_cmd_frame(parms)->operands + 2) +\n          ((uint32_t)(*(btif_get_avrcp_cmd_frame(parms)->operands + 1)) << 8) +\n          ((uint32_t)(*(btif_get_avrcp_cmd_frame(parms)->operands)) << 16);\n      TRACE(1, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND company_id=%x\\n\",\n            company_id);\n      if (company_id == 0x001958) // bt sig\n      {\n        avrcp_operation_t op = *(btif_get_avrcp_cmd_frame(parms)->operands + 3);\n        uint8_t oplen =\n            *(btif_get_avrcp_cmd_frame(parms)->operands + 6) +\n            ((uint32_t)(*(btif_get_avrcp_cmd_frame(parms)->operands + 5)) << 8);\n        TRACE(2, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND op=%x,oplen=%x\\n\", op,\n              oplen);\n        switch (op) {\n        case BTIF_AVRCP_OP_GET_CAPABILITIES: {\n          uint8_t event = *(btif_get_avrcp_cmd_frame(parms)->operands + 7);\n          if (event == BTIF_AVRCP_CAPABILITY_COMPANY_ID) {\n            TRACE(0, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND send support \"\n                     \"compay id\");\n            if (app_bt_device.avrcp_get_capabilities_rsp[device_id] == NULL)\n              btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n                  &app_bt_device.avrcp_get_capabilities_rsp[device_id]);\n            btif_avrcp_set_capabilities_rsp_cmd(\n                app_bt_device.avrcp_get_capabilities_rsp[device_id],\n                btif_get_avrcp_cmd_frame(parms)->transId,\n                BTIF_AVCTP_RESPONSE_IMPLEMENTED_STABLE);\n            btif_avrcp_ct_get_capabilities_company_id_rsp(\n                channel, app_bt_device.avrcp_get_capabilities_rsp[device_id]);\n          } else if (event == BTIF_AVRCP_CAPABILITY_EVENTS_SUPPORTED) {\n            TRACE(1,\n                  \"::avrcp_callback_CT AVRCP_EVENT_COMMAND send support event \"\n                  \"transId:%d\",\n                  btif_get_avrcp_cmd_frame(parms)->transId);\n            if (app_bt_device.avrcpVolumeSync) {\n              btif_set_avrcp_adv_rem_event_mask(\n                  channel, BTIF_AVRCP_ENABLE_VOLUME_CHANGED);\n            } else {\n              btif_set_avrcp_adv_rem_event_mask(channel, 0);\n            }\n            if (app_bt_device.avrcp_get_capabilities_rsp[device_id] == NULL)\n              btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n                  &app_bt_device.avrcp_get_capabilities_rsp[device_id]);\n\n            uint8_t transid = btif_get_avrcp_cmd_frame(parms)->transId;\n            btif_avrcp_set_capabilities_rsp_cmd(\n                app_bt_device.avrcp_get_capabilities_rsp[device_id], transid,\n                BTIF_AVCTP_RESPONSE_IMPLEMENTED_STABLE);\n            TRACE(1,\n                  \"::avrcp_callback_CT AVRCP_EVENT_COMMAND send support event \"\n                  \"transId:%d\",\n                  transid);\n            btif_avrcp_ct_get_capabilities_rsp(\n                channel, app_bt_device.avrcp_get_capabilities_rsp[device_id],\n                BTIF_AVRCP_CAPABILITY_EVENTS_SUPPORTED,\n                btif_get_avrcp_adv_rem_event_mask(channel));\n          } else {\n            TRACE(0, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND send error event \"\n                     \"value\");\n          }\n        } break;\n        }\n      }\n\n    } else if (btif_get_avrcp_cmd_frame(parms)->ctype ==\n               BTIF_AVCTP_CTYPE_CONTROL) {\n      TRACE(0, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND AVCTP_CTYPE_CONTROL\\n\");\n      DUMP8(\"%02x \", btif_get_avrcp_cmd_frame(parms)->operands,\n            btif_get_avrcp_cmd_frame(parms)->operandLen);\n      if (btif_get_avrcp_cmd_frame(parms)->operands[3] ==\n          BTIF_AVRCP_OP_SET_ABSOLUTE_VOLUME) {\n        TRACE(1, \"::avrcp_callback_CT AVRCP_EID_VOLUME_CHANGED transId:%d\\n\",\n              btif_get_avrcp_cmd_frame(parms)->transId);\n        if ((btif_get_avrcp_cmd_frame(parms)->operands[7] < 127) &&\n            (btif_get_avrcp_cmd_frame(parms)->operands[7] > 1)) {\n          a2dp_volume_set(device_id,\n                          btif_get_avrcp_cmd_frame(parms)->operands[7] + 1);\n        } else {\n          a2dp_volume_set(device_id,\n                          btif_get_avrcp_cmd_frame(parms)->operands[7]);\n        }\n        // a2dp_volume_set(device_id,\n        // btif_get_avrcp_cmd_frame(parms)->operands[7]);\n        if (app_bt_device.avrcp_control_rsp[device_id] == NULL)\n          btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n              &app_bt_device.avrcp_control_rsp[device_id]);\n        // #if defined(__BQB_PROFILE_TEST__)\n        if ((btif_get_avrcp_cmd_frame(parms)->operandLen !=\n             8)) // it works for BQB\n        {\n          btif_avrcp_set_control_rsp_cmd_witherror(\n              app_bt_device.avrcp_control_rsp[device_id],\n              btif_get_avrcp_cmd_frame(parms)->transId,\n              BTIF_AVCTP_RESPONSE_REJECTED, BTIF_AVRCP_ERR_INVALID_PARM);\n          TRACE(0, \"reject invalid volume\");\n        } else\n          // #endif\n          btif_avrcp_set_control_rsp_cmd(\n              app_bt_device.avrcp_control_rsp[device_id],\n              btif_get_avrcp_cmd_frame(parms)->transId,\n              BTIF_AVCTP_RESPONSE_ACCEPTED);\n\n        DUMP8(\"%02x \", btif_get_avrcp_cmd_frame(parms)->operands,\n              btif_get_avrcp_cmd_frame(parms)->operandLen);\n        btif_avrcp_ct_accept_absolute_volume_rsp(\n            channel, app_bt_device.avrcp_control_rsp[device_id],\n            btif_get_avrcp_cmd_frame(parms)->operands[7]);\n      } else if (BTIF_AVRCP_OP_CUSTOM_CMD ==\n                 btif_get_avrcp_cmd_frame(parms)->operands[3]) {\n        app_AVRCP_CustomCmd_Received(\n            &btif_get_avrcp_cmd_frame(parms)->operands[7],\n            btif_get_avrcp_cmd_frame(parms)->operandLen - 7);\n        app_AVRCP_sendCustomCmdRsp(device_id, channel, true,\n                                   btif_get_avrcp_cmd_frame(parms)->transId);\n      }\n    } else if (btif_get_avrcp_cmd_frame(parms)->ctype ==\n               BTIF_AVCTP_CTYPE_NOTIFY) {\n      bt_status_t status;\n      TRACE(0, \"::avrcp_callback_CT AVRCP_EVENT_COMMAND AVCTP_CTYPE_NOTIFY\\n\");\n      DUMP8(\"%02x \", btif_get_avrcp_cmd_frame(parms)->operands,\n            btif_get_avrcp_cmd_frame(parms)->operandLen);\n      if (btif_get_avrcp_cmd_frame(parms)->operands[7] ==\n          BTIF_AVRCP_EID_VOLUME_CHANGED) {\n        TRACE(1, \"::avrcp_callback_CT AVRCP_EID_VOLUME_CHANGED transId:%d\\n\",\n              btif_get_avrcp_cmd_frame(parms)->transId);\n        if (app_bt_device.avrcp_notify_rsp[device_id] == NULL) {\n          btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n              &app_bt_device.avrcp_notify_rsp[device_id]);\n        }\n        btif_avrcp_set_notify_rsp_cmd(app_bt_device.avrcp_notify_rsp[device_id],\n                                      btif_get_avrcp_cmd_frame(parms)->transId,\n                                      BTIF_AVCTP_RESPONSE_INTERIM);\n        app_bt_device.volume_report[device_id] = BTIF_AVCTP_RESPONSE_INTERIM;\n        status = btif_avrcp_ct_get_absolute_volume_rsp(\n            channel, app_bt_device.avrcp_notify_rsp[device_id],\n            a2dp_volume_get(device_id));\n        TRACE(1,\n              \"::avrcp_callback_CT AVRCP_EVENT_COMMAND \"\n              \"AVRCP_EID_VOLUME_CHANGED nRet:%x\\n\",\n              status);\n\n      }\n      // #if defined(__BQB_PROFILE_TEST__)\n      else if (btif_get_avrcp_cmd_frame(parms)->operands[7] ==\n               0xff) // it works for BQB\n      {\n        TRACE(1, \"trances id:%d\", btif_get_avrcp_cmd_frame(parms)->transId);\n        if (app_bt_device.avrcp_notify_rsp[device_id] == NULL) {\n          btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n              &app_bt_device.avrcp_notify_rsp[device_id]);\n        }\n        btif_avrcp_set_notify_rsp_cmd_witherror(\n            app_bt_device.avrcp_notify_rsp[device_id],\n            btif_get_avrcp_cmd_frame(parms)->transId,\n            BTIF_AVCTP_RESPONSE_REJECTED, BTIF_AVRCP_ERR_INVALID_PARM);\n\n        status = btif_avrcp_ct_invalid_volume_rsp(\n            channel, app_bt_device.avrcp_notify_rsp[device_id]);\n        TRACE(1, \"AVRCP_CtInvalidVolume_Rsp,status%d\", status);\n      }\n      // #endif\n    }\n    // #endif\n    break;\n  case BTIF_AVRCP_EVENT_ADV_NOTIFY: // 17\n    TRACE(3,\n          \"::avrcp_callback_CT AVRCP_EVENT_ADV_NOTIFY  \"\n          \"adv.notify.event=%x,device_id=%d,chnl->role=%x\\n\",\n          btif_get_avrcp_adv_notify(parms)->event, device_id,\n          btif_get_avrcp_cb_channel_role(channel));\n    if (btif_get_avrcp_adv_notify(parms)->event ==\n        BTIF_AVRCP_EID_VOLUME_CHANGED) {\n      TRACE(1, \"::avrcp_callback_CT ACRCP notify  vol =%x\",\n            btif_get_avrcp_adv_notify(parms)->p.volume);\n      // AVRCP_CtRegisterNotification(chnl,app_bt_device.avrcp_notify_rsp[device_id],BTIF_AVRCP_EID_VOLUME_CHANGED,0);\n      btif_avrcp_ct_register_notification(\n          channel, app_bt_device.avrcp_notify_rsp[device_id],\n          BTIF_AVRCP_EID_VOLUME_CHANGED, 0);\n    } else if (btif_get_avrcp_adv_notify(parms)->event ==\n               BTIF_AVRCP_EID_MEDIA_STATUS_CHANGED) {\n      TRACE(1, \"::avrcp_callback_CT ACRCP notify  playback states=%x\",\n            btif_get_avrcp_adv_notify(parms)->p.mediaStatus);\n      avrcp_set_media_status(btif_get_avrcp_adv_notify(parms)->p.mediaStatus);\n      if (app_bt_device.avrcp_cmd1[device_id] == NULL) {\n        btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n            &app_bt_device.avrcp_cmd1[device_id]);\n      }\n      btif_avrcp_ct_register_notification(\n          channel, app_bt_device.avrcp_cmd1[device_id],\n          BTIF_AVRCP_EID_MEDIA_STATUS_CHANGED, 0);\n    } else if (btif_get_avrcp_adv_notify(parms)->event ==\n               BTIF_AVRCP_EID_PLAY_POS_CHANGED) {\n      TRACE(1, \"::avrcp_callback_CT ACRCP notify  play pos =%x\",\n            btif_get_avrcp_adv_notify(parms)->p.position);\n      if (app_bt_device.avrcp_cmd2[device_id] == NULL) {\n        btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n            &app_bt_device.avrcp_cmd2[device_id]);\n      }\n      btif_avrcp_ct_register_notification(channel,\n                                          app_bt_device.avrcp_cmd2[device_id],\n                                          BTIF_AVRCP_EID_PLAY_POS_CHANGED, 1);\n    }\n#ifdef AVRCP_TRACK_CHANGED\n    else if (btif_get_avrcp_adv_notify(parms)->event ==\n             BTIF_AVRCP_EID_TRACK_CHANGED) {\n      TRACE(2, \"::AVRCP notify track msU32=%x, lsU32=%x\",\n            btif_get_avrcp_adv_notify(parms)->p.track.msU32,\n            btif_get_avrcp_adv_notify(parms)->p.track.lsU32);\n      if (app_bt_device.avrcp_cmd2[device_id] == NULL) {\n        btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n            &app_bt_device.avrcp_cmd2[device_id]);\n      }\n      btif_avrcp_ct_register_notification(channel,\n                                          app_bt_device.avrcp_cmd2[device_id],\n                                          BTIF_AVRCP_EID_TRACK_CHANGED, 0);\n    }\n#endif\n    break;\n  case BTIF_AVRCP_EVENT_ADV_CMD_TIMEOUT:\n    TRACE(2,\n          \"::avrcp_callback_CT AVRCP_EVENT_ADV_CMD_TIMEOUT \"\n          \"device_id=%d,role=%x\\n\",\n          device_id, btif_get_avrcp_cb_channel_role(channel));\n    break;\n  }\n\n#if defined(IBRT)\n  app_tws_ibrt_profile_callback(BTIF_APP_AVRCP_PROFILE_ID, (void *)chnl,\n                                (void *)parms);\n#endif\n}\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\nextern \"C\" void avrcp_callback_TG(btif_avrcp_chnl_handle_t chnl,\n                                  const avrcp_callback_parms_t *parms) {\n  // do nothing\n}\n#endif\n#ifdef __TWS__\ntypedef uint8_t tx_done_flag;\n#define TX_DONE_FLAG_INIT 0\n#define TX_DONE_FLAG_SUCCESS 1\n#define TX_DONE_FLAG_FAIL 2\n#define TX_DONE_FLAG_TXING 3\ntx_done_flag TG_tx_done_flag = TX_DONE_FLAG_INIT;\n\nvoid avrcp_callback_TG(btif_avrcp_chnl_handle_t chnl,\n                       const avrcp_callback_parms_t *parms) {\n  APP_A2DP_TRACE(2, \"avrcp_callback_TG : chnl %p, Parms %p\\n\", chnl, parms);\n  APP_A2DP_TRACE(1, \"::avrcp_callback_TG Parms->event %d\\n\",\n                 btif_get_avrcp_cb_channel_state(parms));\n  btif_avrcp_channel_t *channel = btif_get_avrcp_channel(chnl);\n\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T device_id =\n      (chnl == app_bt_device.avrcp_channel[0]->avrcp_channel_handle)\n          ? BT_DEVICE_ID_1\n          : BT_DEVICE_ID_2;\n#else\n  enum BT_DEVICE_ID_T device_id = BT_DEVICE_ID_1;\n#endif\n  switch (btif_avrcp_get_callback_event((avrcp_callback_parms_t *)parms)) {\n  case BTIF_AVRCP_EVENT_CONNECT:\n    btif_set_avrcp_state(channel, BTIF_AVRCP_STATE_CONNECTED);\n    if (app_bt_device.avrcp_custom_cmd[device_id] == NULL) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n          &app_bt_device.avrcp_custom_cmd[device_id]);\n    }\n    APP_A2DP_TRACE(2,\n                   \"::avrcp_callback_TG AVRCP_EVENT_CONNECT %x,device_id=%d\\n\",\n                   btif_get_avrcp_version(channel), device_id);\n\n    break;\n  case BTIF_AVRCP_EVENT_DISCONNECT:\n    APP_A2DP_TRACE(0, \"::avrcp_callback_TG AVRCP_EVENT_DISCONNECT\");\n\n    btif_set_avrcp_state(channel, BTIF_AVRCP_STATE_DISCONNECTED);\n    if (app_bt_device.avrcp_get_capabilities_rsp[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_get_capabilities_rsp[device_id]);\n      app_bt_device.avrcp_get_capabilities_rsp[device_id] = NULL;\n    }\n    if (app_bt_device.avrcp_control_rsp[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_control_rsp[device_id]);\n      app_bt_device.avrcp_control_rsp[device_id] = NULL;\n    }\n    if (app_bt_device.avrcp_notify_rsp[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_notify_rsp[device_id]);\n      app_bt_device.avrcp_notify_rsp[device_id] = NULL;\n    }\n\n    if (app_bt_device.avrcp_cmd1[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_cmd1[device_id]);\n      app_bt_device.avrcp_cmd1[device_id] = NULL;\n    }\n    if (app_bt_device.avrcp_cmd2[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_cmd2[device_id]);\n      app_bt_device.avrcp_cmd2[device_id] = NULL;\n    }\n\n    if (app_bt_device.avrcp_custom_cmd[device_id]) {\n      btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n          app_bt_device.avrcp_custom_cmd[device_id]);\n      app_bt_device.avrcp_custom_cmd[device_id] = NULL;\n    }\n\n    app_bt_device.volume_report[device_id] = 0;\n\n    break;\n  case BTIF_AVRCP_EVENT_RESPONSE:\n    APP_A2DP_TRACE(2,\n                   \"::avrcp_callback_TG AVRCP_EVENT_RESPONSE op=%x,status=%x\\n\",\n                   btif_get_avrcp_cb_channel_advOp(parms),\n                   btif_get_avrcp_cb_channel_state(parms));\n\n    break;\n  case BTIF_AVRCP_EVENT_PANEL_CNF:\n    APP_A2DP_TRACE(3, \"::avrcp_callback_TG AVRCP_EVENT_PANEL_CNF %x,%x,%x\",\n                   btif_get_avrcp_panel_cnf(parms)->response,\n                   btif_get_avrcp_panel_cnf(parms)->operation,\n                   btif_get_avrcp_panel_cnf(parms)->press);\n    break;\n  case BTIF_AVRCP_EVENT_ADV_TX_DONE:\n    APP_A2DP_TRACE(3,\n                   \"::avrcp_callback_TG AVRCP_EVENT_ADV_TX_DONE \"\n                   \"device_id=%d,status=%x,errorcode=%x\\n\",\n                   device_id, btif_get_avrcp_cb_channel_state(parms),\n                   btif_get_avrcp_cb_channel_error_code(parms));\n    APP_A2DP_TRACE(\n        2, \"::avrcp_callback_TG AVRCP_EVENT_ADV_TX_DONE op:%d, transid:%x\\n\",\n        btif_get_avrcp_cb_txPdu_Op(parms),\n        btif_get_avrcp_cb_txPdu_transId(parms));\n    if (btif_get_avrcp_cb_txPdu_Op(parms) == BTIF_AVRCP_OP_GET_CAPABILITIES) {\n      if (app_bt_device.avrcp_get_capabilities_rsp[device_id] ==\n          btif_get_avrcp_cb_txPdu(parms)) {\n        app_bt_device.avrcp_get_capabilities_rsp[device_id] = NULL;\n        btif_app_a2dp_avrcpadvancedpdu_mempool_free(\n            btif_get_avrcp_cb_txPdu(parms));\n      }\n    }\n    TG_tx_done_flag = TX_DONE_FLAG_SUCCESS;\n#if 0\n            if (Parms->p.adv.txPdu->op == AVRCP_OP_SET_ABSOLUTE_VOLUME){\n                if (Parms->p.adv.txPdu->ctype != AVCTP_RESPONSE_INTERIM){\n                    if (app_bt_device.avrcp_control_rsp[device_id] == Parms->p.adv.txPdu){\n                        app_bt_device.avrcp_control_rsp[device_id] = NULL;\n                        app_a2dp_avrcpadvancedpdu_mempool_free(Parms->p.adv.txPdu);\n                    }\n                }\n            }\n            if (Parms->p.adv.txPdu->op == AVRCP_OP_REGISTER_NOTIFY){\n                if (Parms->p.adv.txPdu->ctype != AVCTP_RESPONSE_INTERIM){\n                    if (Parms->p.adv.txPdu->parms[0] == AVRCP_EID_VOLUME_CHANGED){\n                        app_bt_device.avrcp_notify_rsp[device_id] = NULL;\n                        app_a2dp_avrcpadvancedpdu_mempool_free(Parms->p.adv.txPdu);\n                    }\n                }\n            }\n#endif\n\n    break;\n  case BTIF_AVRCP_EVENT_COMMAND:\n    APP_A2DP_TRACE(\n        2, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND device_id=%d,role=%x\\n\",\n        device_id, btif_get_avrcp_channel_role(channel));\n    APP_A2DP_TRACE(\n        2, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND ctype=%x,subunitype=%x\\n\",\n        btif_get_avrcp_cmd_frame(parms)->ctype,\n        btif_get_avrcp_cmd_frame(parms)->subunitType);\n    APP_A2DP_TRACE(\n        2, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND subunitId=%x,opcode=%x\\n\",\n        btif_get_avrcp_cmd_frame(parms)->subunitId,\n        btif_get_avrcp_cmd_frame(parms)->opcode);\n    APP_A2DP_TRACE(\n        2,\n        \"::avrcp_callback_TG AVRCP_EVENT_COMMAND operands=%x,operandLen=%x\\n\",\n        btif_get_avrcp_cmd_frame(parms)->operands,\n        btif_get_avrcp_cmd_frame(parms)->operandLen);\n    APP_A2DP_TRACE(1, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND more=%x\\n\",\n                   btif_get_avrcp_cmd_frame(parms)->more);\n    if (btif_get_avrcp_cmd_frame(parms)->ctype == BTIF_AVRCP_CTYPE_STATUS) {\n      uint32_t company_id =\n          *(btif_get_avrcp_cmd_frame(parms)->operands + 2) +\n          ((uint32_t)(*(btif_get_avrcp_cmd_frame(parms)->operands + 1)) << 8) +\n          ((uint32_t)(*(btif_get_avrcp_cmd_frame(parms)->operands)) << 16);\n      TRACE(1, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND company_id=%x\\n\",\n            company_id);\n      if (company_id == 0x001958) // bt sig\n      {\n        avrcp_operation_t op = *(btif_get_avrcp_cmd_frame(parms)->operands + 3);\n        uint8_t oplen =\n            *(btif_get_avrcp_cmd_frame(parms)->operands + 6) +\n            ((uint32_t)(*(btif_get_avrcp_cmd_frame(parms)->operands + 5)) << 8);\n        APP_A2DP_TRACE(\n            2, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND op=%x,oplen=%x\\n\", op,\n            oplen);\n        switch (op) {\n        case BTIF_AVRCP_OP_GET_CAPABILITIES: {\n          uint8_t event = *(btif_get_avrcp_cmd_frame(parms)->operands + 7);\n          if (event == BTIF_AVRCP_CAPABILITY_COMPANY_ID) {\n            APP_A2DP_TRACE(0, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND send \"\n                              \"support compay id\");\n          } else if (event == BTIF_AVRCP_CAPABILITY_EVENTS_SUPPORTED) {\n            APP_A2DP_TRACE(1,\n                           \"::avrcp_callback_TG AVRCP_EVENT_COMMAND send \"\n                           \"support event transId:%d\",\n                           btif_get_avrcp_cmd_frame(parms)->transId);\n            if (app_bt_device.avrcpVolumeSync) {\n              btif_set_avrcp_adv_rem_event_mask(\n                  channel, BTIF_AVRCP_ENABLE_VOLUME_CHANGED);\n            } else {\n              btif_set_avrcp_adv_rem_event_mask(channel, 0);\n            }\n\n            if (app_bt_device.avrcp_get_capabilities_rsp[device_id] == NULL)\n              btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n                  &app_bt_device.avrcp_get_capabilities_rsp[device_id]);\n\n            // app_bt_device.avrcp_get_capabilities_rsp[device_id]->transId =\n            // btif_get_avrcp_cmd_frame(parms)->transId;\n            // app_bt_device.avrcp_get_capabilities_rsp[device_id]->ctype =\n            // BTIF_AVCTP_RESPONSE_IMPLEMENTED_STABLE;\n            btif_avrcp_set_capabilities_rsp_cmd(\n                app_bt_device.avrcp_get_capabilities_rsp[device_id],\n                btif_get_avrcp_cmd_frame(parms)->transId,\n                BTIF_AVCTP_RESPONSE_IMPLEMENTED_STABLE);\n            APP_A2DP_TRACE(\n                1,\n                \"::avrcp_callback_TG AVRCP_EVENT_COMMAND send support event \"\n                \"transId:%d\",\n                btif_get_app_bt_device_avrcp_notify_rsp_transid(\n                    app_bt_device.avrcp_get_capabilities_rsp[device_id]));\n            btif_avrcp_ct_get_capabilities_rsp(\n                channel, app_bt_device.avrcp_get_capabilities_rsp[device_id],\n                BTIF_AVRCP_CAPABILITY_EVENTS_SUPPORTED,\n                btif_get_avrcp_adv_rem_event_mask(channel));\n            // AVRCP_CtGetCapabilities_Rsp(chnl,app_bt_device.avrcp_get_capabilities_rsp[device_id],BTIF_AVRCP_CAPABILITY_EVENTS_SUPPORTED,chnl->adv.eventMask);\n          } else {\n            APP_A2DP_TRACE(0, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND send \"\n                              \"error event value\");\n          }\n        } break;\n        }\n      }\n\n    } else if (btif_get_avrcp_cmd_frame(parms)->ctype ==\n               BTIF_AVCTP_CTYPE_CONTROL) {\n      APP_A2DP_TRACE(\n          0, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND AVCTP_CTYPE_CONTROL\\n\");\n      DUMP8(\"%02x \", btif_get_avrcp_cmd_frame(parms)->operands,\n            btif_get_avrcp_cmd_frame(parms)->operandLen);\n      if (btif_get_avrcp_cmd_frame(parms)->operands[3] ==\n          BTIF_AVRCP_OP_SET_ABSOLUTE_VOLUME) {\n        APP_A2DP_TRACE(\n            1, \"::avrcp_callback_TG AVRCP_EID_VOLUME_CHANGED transId:%d\\n\",\n            btif_get_avrcp_cmd_frame(parms)->transId);\n        a2dp_volume_set(device_id,\n                        (btif_get_avrcp_cmd_frame(parms)->operands[7]) + 1);\n        // a2dp_volume_set(btif_get_avrcp_cmd_frame(parms)->operands[7]);\n        log_event_2(EVENT_AVRCP_VOLUME_CHANGE_REQ_RECEIVED,\n                    (btif_avrcp_get_cmgrhandler_remDev_hciHandle(channel)) &\n                        0x3,\n                    btif_get_avrcp_cmd_frame(parms)->operands[7]);\n\n        if (app_bt_device.avrcp_control_rsp[device_id] == NULL)\n          btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n              &app_bt_device.avrcp_control_rsp[device_id]);\n\n        // app_bt_device.avrcp_control_rsp[device_id]->transId =\n        // btif_get_avrcp_cmd_frame(parms)->transId;\n        // app_bt_device.avrcp_control_rsp[device_id]->ctype =\n        // BTIF_AVCTP_RESPONSE_ACCEPTED;\n        btif_avrcp_set_control_rsp_cmd(\n            app_bt_device.avrcp_control_rsp[device_id],\n            btif_get_avrcp_cmd_frame(parms)->transId,\n            BTIF_AVCTP_RESPONSE_ACCEPTED);\n        DUMP8(\"%02x \", btif_get_avrcp_cmd_frame(parms)->operands,\n              btif_get_avrcp_cmd_frame(parms)->operandLen);\n\n        // AVRCP_CtAcceptAbsoluteVolume_Rsp(chnl,\n        // app_bt_device.avrcp_control_rsp[device_id],\n        // btif_get_avrcp_cmd_frame(parms)->operands[7]);\n        btif_avrcp_ct_accept_absolute_volume_rsp(\n            channel, app_bt_device.avrcp_control_rsp[device_id],\n            btif_get_avrcp_cmd_frame(parms)->operands[7]);\n      } else if (BTIF_AVRCP_OP_CUSTOM_CMD ==\n                 btif_get_avrcp_cmd_frame(parms)->operands[3]) {\n        app_AVRCP_CustomCmd_Received(\n            &btif_get_avrcp_cmd_frame(parms)->operands[7],\n            btif_get_avrcp_cmd_frame(parms)->operandLen - 7);\n        app_AVRCP_sendCustomCmdRsp(device_id, channel, true,\n                                   btif_get_avrcp_cmd_frame(parms)->transId);\n      }\n    } else if (btif_get_avrcp_cmd_frame(parms)->ctype ==\n               BTIF_AVCTP_CTYPE_NOTIFY) {\n      bt_status_t status;\n      APP_A2DP_TRACE(\n          0, \"::avrcp_callback_TG AVRCP_EVENT_COMMAND AVCTP_CTYPE_NOTIFY\\n\");\n      DUMP8(\"%02x \", btif_get_avrcp_cmd_frame(parms)->operands,\n            btif_get_avrcp_cmd_frame(parms)->operandLen);\n      if (btif_get_avrcp_cmd_frame(parms)->operands[7] ==\n          BTIF_AVRCP_EID_VOLUME_CHANGED) {\n        APP_A2DP_TRACE(\n            1, \"::avrcp_callback_TG AVRCP_EID_VOLUME_CHANGED transId:%d\\n\",\n            btif_get_avrcp_cmd_frame(parms)->transId);\n        if (app_bt_device.avrcp_notify_rsp[device_id] == NULL)\n          btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n              &app_bt_device.avrcp_notify_rsp[device_id]);\n\n        // app_bt_device.avrcp_notify_rsp[device_id]->transId =\n        // btif_get_avrcp_cmd_frame(parms)->transId;\n        // app_bt_device.avrcp_notify_rsp[device_id]->ctype =\n        // BTIF_AVCTP_RESPONSE_INTERIM;\n        btif_avrcp_set_notify_rsp_cmd(app_bt_device.avrcp_notify_rsp[device_id],\n                                      btif_get_avrcp_cmd_frame(parms)->transId,\n                                      BTIF_AVCTP_RESPONSE_INTERIM);\n        app_bt_device.volume_report[device_id] = BTIF_AVCTP_RESPONSE_INTERIM;\n\n        // status = AVRCP_CtGetAbsoluteVolume_Rsp(chnl,\n        // app_bt_device.avrcp_notify_rsp[device_id], a2dp_volume_get());\n        status = btif_avrcp_ct_get_absolute_volume_rsp(\n            channel, app_bt_device.avrcp_notify_rsp[device_id],\n            a2dp_volume_get(device_id));\n        APP_A2DP_TRACE(1,\n                       \"::avrcp_callback_TG AVRCP_EVENT_COMMAND \"\n                       \"AVRCP_EID_VOLUME_CHANGED nRet:%x\\n\",\n                       status);\n      }\n    }\n    break;\n  case BTIF_AVRCP_EVENT_ADV_CMD_TIMEOUT:\n    APP_A2DP_TRACE(2,\n                   \"::avrcp_callback_TG AVRCP_EVENT_ADV_CMD_TIMEOUT \"\n                   \"device_id=%d,role=%x\\n\",\n                   device_id, btif_get_avrcp_channel_role(channel));\n    break;\n  }\n}\n\n#endif\n\navrcp_media_status_t media_status = 0xff;\nuint8_t avrcp_get_media_status(void) {\n  APP_A2DP_TRACE(2, \"%s %d\", __func__, media_status);\n  return media_status;\n}\nuint8_t avrcp_ctrl_music_flag;\nvoid avrcp_set_media_status(uint8_t status) {\n  APP_A2DP_TRACE(2, \"%s %d\", __func__, status);\n  if ((status == 1 && avrcp_ctrl_music_flag == 2) ||\n      (status == 2 && avrcp_ctrl_music_flag == 1))\n    avrcp_ctrl_music_flag = 0;\n\n  media_status = status;\n}\n\n#else\nvoid a2dp_init(void) {\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    a2dp_channel_num[i] = BTIF_SBC_CHNL_MODE_STEREO;\n    app_bt_device.a2dp_state[i] = 0;\n  }\n\n  app_bt_device.a2dp_state[BT_DEVICE_ID_1] = 0;\n  app_bt_device.a2dp_play_pause_flag = 0;\n  app_bt_device.curr_a2dp_stream_id = BT_DEVICE_ID_1;\n}\n\nextern \"C\" void avrcp_callback(AvrcpChannel *chnl,\n                               const AvrcpCallbackParms *Parms) {\n  TRACE(2, \"avrcp_callback : chnl %p, Parms %p\\n\", chnl, Parms);\n  TRACE(1, \"::Parms->event %d\\n\", Parms->event);\n  switch (Parms->event) {\n  case AVRCP_EVENT_CONNECT_IND:\n    TRACE(1, \"::AVRCP_EVENT_CONNECT_IND %d\\n\", Parms->event);\n    AVRCP_ConnectRsp(chnl, 1);\n    break;\n  case AVRCP_EVENT_CONNECT:\n    TRACE(1, \"::AVRCP_EVENT_CONNECT %d\\n\", Parms->event);\n    break;\n  case AVRCP_EVENT_RESPONSE:\n    TRACE(1, \"::AVRCP_EVENT_RESPONSE %d\\n\", Parms->event);\n\n    break;\n  case AVRCP_EVENT_PANEL_CNF:\n    TRACE(3, \"::AVRCP_EVENT_PANEL_CNF %x,%x,%x\", Parms->p.panelCnf.response,\n          Parms->p.panelCnf.operation, Parms->p.panelCnf.press);\n#if 0\n            if((Parms->p.panelCnf.response == AVCTP_RESPONSE_ACCEPTED) && (Parms->p.panelCnf.press == TRUE))\n            {\n                AVRCP_SetPanelKey(chnl,Parms->p.panelCnf.operation,FALSE);\n            }\n#endif\n    break;\n  }\n}\n#endif\n// void avrcp_init(void)\n//{\n//  hal_uart_open(HAL_UART_ID_0,NULL);\n//    TRACE(0,\"avrcp_init...OK\\n\");\n//}\n\nint store_sbc_buffer(unsigned char *buf, unsigned int len);\nint a2dp_audio_sbc_set_frame_info(int rcv_len, int frame_num);\n\nvoid btapp_send_pause_key(enum BT_DEVICE_ID_T stream_id) {\n  TRACE(1, \"btapp_send_pause_key id = %x\", stream_id);\n  btif_avrcp_set_panel_key(app_bt_device.avrcp_channel[stream_id],\n                           BTIF_AVRCP_POP_PAUSE, TRUE);\n  btif_avrcp_set_panel_key(app_bt_device.avrcp_channel[stream_id],\n                           BTIF_AVRCP_POP_PAUSE, FALSE);\n  //   app_bt_device.a2dp_play_pause_flag = 0;\n}\n\nvoid btapp_a2dp_suspend_music(enum BT_DEVICE_ID_T stream_id) {\n  TRACE(1, \"btapp_a2dp_suspend_music id = %x\", stream_id);\n\n  btapp_send_pause_key(stream_id);\n}\n\nextern enum AUD_SAMPRATE_T a2dp_sample_rate;\n\n#define A2DP_TIMESTAMP_TRACE(s, ...)\n// TRACE(s, ##__VA_ARGS__)\n\n#define A2DP_TIMESTAMP_DEBOUNCE_DURATION (1000)\n#define A2DP_TIMESTAMP_MODE_SAMPLE_THRESHOLD (2000)\n\n#define A2DP_TIMESTAMP_SYNC_LIMIT_CNT (100)\n#define A2DP_TIMESTAMP_SYNC_TIME_THRESHOLD (60)\n#define A2DP_TIMESTAMP_SYNC_SAMPLE_THRESHOLD                                   \\\n  ((int64_t)a2dp_sample_rate * A2DP_TIMESTAMP_SYNC_TIME_THRESHOLD / 1000)\n\n#define RICE_THRESHOLD\n#define RICE_THRESHOLD\n\nstruct A2DP_TIMESTAMP_INFO_T {\n  uint16_t rtp_timestamp;\n  uint32_t loc_timestamp;\n  uint16_t frame_num;\n  int32_t rtp_timestamp_diff_sum;\n};\n\nenum A2DP_TIMESTAMP_MODE_T {\n  A2DP_TIMESTAMP_MODE_NONE,\n  A2DP_TIMESTAMP_MODE_SAMPLE,\n  A2DP_TIMESTAMP_MODE_TIME,\n};\n\nenum A2DP_TIMESTAMP_MODE_T a2dp_timestamp_mode = A2DP_TIMESTAMP_MODE_NONE;\n\nstruct A2DP_TIMESTAMP_INFO_T a2dp_timestamp_pre = {0, 0, 0};\nbool a2dp_timestamp_parser_need_sync = false;\n\nint a2dp_timestamp_parser_init(void) {\n  a2dp_timestamp_mode = A2DP_TIMESTAMP_MODE_NONE;\n  a2dp_timestamp_pre.rtp_timestamp = 0;\n  a2dp_timestamp_pre.loc_timestamp = 0;\n  a2dp_timestamp_pre.frame_num = 0;\n  a2dp_timestamp_pre.rtp_timestamp_diff_sum = 0;\n  a2dp_timestamp_parser_need_sync = false;\n  return 0;\n}\n\nint a2dp_timestamp_parser_needsync(void) {\n  a2dp_timestamp_parser_need_sync = true;\n  return 0;\n}\n\nint a2dp_timestamp_parser_run(uint16_t timestamp, uint16_t framenum) {\n  static int skip_cnt = 0;\n  struct A2DP_TIMESTAMP_INFO_T curr_timestamp;\n  int skipframe = 0;\n  uint16_t rtpdiff;\n  int32_t locdiff;\n  bool needsave_rtp_timestamp = true;\n  bool needsave_loc_timestamp = true;\n\n  curr_timestamp.rtp_timestamp = timestamp;\n  curr_timestamp.loc_timestamp = hal_sys_timer_get();\n  curr_timestamp.frame_num = framenum;\n\n  switch (a2dp_timestamp_mode) {\n  case A2DP_TIMESTAMP_MODE_NONE:\n\n    //            TRACE(5,\"parser rtp:%d loc:%d num:%d prertp:%d preloc:%d\\n\",\n    //            curr_timestamp.rtp_timestamp, curr_timestamp.loc_timestamp,\n    //            curr_timestamp.frame_num,\n    //                                                   a2dp_timestamp_pre.rtp_timestamp,\n    //                                                   a2dp_timestamp_pre.loc_timestamp);\n    if (a2dp_timestamp_pre.rtp_timestamp) {\n      locdiff = curr_timestamp.loc_timestamp - a2dp_timestamp_pre.loc_timestamp;\n      if (TICKS_TO_MS(locdiff) > A2DP_TIMESTAMP_DEBOUNCE_DURATION) {\n        rtpdiff =\n            curr_timestamp.rtp_timestamp - a2dp_timestamp_pre.rtp_timestamp;\n        if (ABS((int16_t)TICKS_TO_MS(locdiff) - rtpdiff) >\n            A2DP_TIMESTAMP_MODE_SAMPLE_THRESHOLD) {\n          a2dp_timestamp_mode = A2DP_TIMESTAMP_MODE_SAMPLE;\n          TRACE(0, \"A2DP_TIMESTAMP_MODE_SAMPLE\\n\");\n        } else {\n          a2dp_timestamp_mode = A2DP_TIMESTAMP_MODE_TIME;\n          TRACE(0, \"A2DP_TIMESTAMP_MODE_TIME\\n\");\n        }\n      } else {\n        needsave_rtp_timestamp = false;\n        needsave_loc_timestamp = false;\n      }\n    }\n    break;\n  case A2DP_TIMESTAMP_MODE_SAMPLE:\n    if (a2dp_timestamp_parser_need_sync) {\n      skip_cnt++;\n      rtpdiff = curr_timestamp.rtp_timestamp - a2dp_timestamp_pre.rtp_timestamp;\n      locdiff = curr_timestamp.loc_timestamp - a2dp_timestamp_pre.loc_timestamp;\n      a2dp_timestamp_pre.rtp_timestamp_diff_sum += rtpdiff;\n\n      A2DP_TIMESTAMP_TRACE(3, \"%d-%d=%d\", curr_timestamp.rtp_timestamp,\n                           a2dp_timestamp_pre.rtp_timestamp, rtpdiff);\n\n      A2DP_TIMESTAMP_TRACE(3, \"%d-%d=%d\", curr_timestamp.loc_timestamp,\n                           a2dp_timestamp_pre.loc_timestamp, locdiff);\n\n      A2DP_TIMESTAMP_TRACE(\n          3, \"%d-%d=%d\",\n          (int32_t)((int64_t)(TICKS_TO_MS(locdiff)) *\n                    (uint32_t)a2dp_sample_rate / 1000),\n          a2dp_timestamp_pre.rtp_timestamp_diff_sum,\n          (int32_t)((TICKS_TO_MS(locdiff) * a2dp_sample_rate / 1000) -\n                    a2dp_timestamp_pre.rtp_timestamp_diff_sum));\n\n      A2DP_TIMESTAMP_TRACE(\n          2, \"A2DP_TIMESTAMP_MODE_SAMPLE SYNC diff:%d cnt:%d\\n\",\n          (int32_t)((int64_t)(TICKS_TO_MS(locdiff) * a2dp_sample_rate / 1000) -\n                    a2dp_timestamp_pre.rtp_timestamp_diff_sum),\n          skip_cnt);\n      if (((int64_t)(TICKS_TO_MS(locdiff) * a2dp_sample_rate / 1000) -\n           a2dp_timestamp_pre.rtp_timestamp_diff_sum) <\n          (int32_t)A2DP_TIMESTAMP_SYNC_SAMPLE_THRESHOLD) {\n        TRACE(1, \"A2DP_TIMESTAMP_MODE_SAMPLE RESYNC OK cnt:%d\\n\", skip_cnt);\n        skip_cnt = 0;\n        a2dp_timestamp_parser_need_sync = false;\n      } else if (skip_cnt > A2DP_TIMESTAMP_SYNC_LIMIT_CNT) {\n        TRACE(0, \"A2DP_TIMESTAMP_MODE_SAMPLE RESYNC FORCE END\\n\");\n        skip_cnt = 0;\n        a2dp_timestamp_parser_need_sync = false;\n      } else {\n        needsave_loc_timestamp = false;\n        skipframe = 1;\n      }\n    } else {\n      a2dp_timestamp_pre.rtp_timestamp_diff_sum = 0;\n    }\n    break;\n  case A2DP_TIMESTAMP_MODE_TIME:\n    if (a2dp_timestamp_parser_need_sync) {\n      skip_cnt++;\n      rtpdiff = curr_timestamp.rtp_timestamp - a2dp_timestamp_pre.rtp_timestamp;\n      locdiff = curr_timestamp.loc_timestamp - a2dp_timestamp_pre.loc_timestamp;\n      a2dp_timestamp_pre.rtp_timestamp_diff_sum += rtpdiff;\n\n      A2DP_TIMESTAMP_TRACE(5, \"%d/%d/ %d/%d %d\\n\", rtpdiff,\n                           a2dp_timestamp_pre.rtp_timestamp_diff_sum,\n                           a2dp_timestamp_pre.loc_timestamp,\n                           curr_timestamp.loc_timestamp, TICKS_TO_MS(locdiff));\n      A2DP_TIMESTAMP_TRACE(\n          2, \"A2DP_TIMESTAMP_MODE_TIME SYNC diff:%d cnt:%d\\n\",\n          (int32_t)ABS(TICKS_TO_MS(locdiff) -\n                       a2dp_timestamp_pre.rtp_timestamp_diff_sum),\n          skip_cnt);\n      if (((int64_t)TICKS_TO_MS(locdiff) -\n           a2dp_timestamp_pre.rtp_timestamp_diff_sum) <\n          A2DP_TIMESTAMP_SYNC_TIME_THRESHOLD) {\n        TRACE(1, \"A2DP_TIMESTAMP_MODE_TIME RESYNC OK cnt:%d\\n\", skip_cnt);\n        skip_cnt = 0;\n        needsave_loc_timestamp = false;\n        a2dp_timestamp_parser_need_sync = false;\n      } else if (skip_cnt > A2DP_TIMESTAMP_SYNC_LIMIT_CNT) {\n        TRACE(0, \"A2DP_TIMESTAMP_MODE_TIME RESYNC FORCE END\\n\");\n        skip_cnt = 0;\n        a2dp_timestamp_parser_need_sync = false;\n      } else {\n        needsave_loc_timestamp = false;\n        skipframe = 1;\n      }\n    } else {\n      a2dp_timestamp_pre.rtp_timestamp_diff_sum = 0;\n    }\n    break;\n  }\n\n  if (needsave_rtp_timestamp) {\n    a2dp_timestamp_pre.rtp_timestamp = curr_timestamp.rtp_timestamp;\n  }\n\n  if (needsave_loc_timestamp) {\n    a2dp_timestamp_pre.loc_timestamp = curr_timestamp.loc_timestamp;\n  }\n\n  return skipframe;\n}\n\nstatic struct BT_DEVICE_ID_DIFF stream_id_flag;\n\n#if defined(A2DP_LHDC_ON)\nuint8_t bits_depth;\nuint8_t bt_sbc_player_get_bitsDepth(void) {\n  if (app_bt_device.sample_bit[stream_id_flag.id] != bits_depth) {\n    /* code */\n    bits_depth = app_bt_device.sample_bit[stream_id_flag.id];\n  }\n  return bits_depth;\n}\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n\nuint8_t a2dp_stream_id_distinguish(a2dp_stream_t *Stream, uint8_t event_type) {\n  uint8_t found_device_id = BT_DEVICE_NUM;\n  if (Stream == app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_1]) {\n    found_device_id = BT_DEVICE_ID_1;\n    stream_id_flag.id = BT_DEVICE_ID_1;\n  } else if (Stream == app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_2]) {\n    found_device_id = BT_DEVICE_ID_2;\n    stream_id_flag.id = BT_DEVICE_ID_2;\n  } else /* if(event_type == A2DP_EVENT_STREAM_CLOSED)*/ {\n    btif_remote_device_t *remDev = 0;\n    btif_remote_device_t *connected_remDev[BT_DEVICE_NUM];\n    remDev = btif_a2dp_get_remote_device(Stream);\n    connected_remDev[0] = btif_a2dp_get_remote_device(\n        app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_1]);\n    connected_remDev[1] = btif_a2dp_get_remote_device(\n        app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_2]);\n    if ((connected_remDev[0] == remDev) && (remDev != 0)) {\n      stream_id_flag.id = BT_DEVICE_ID_1;\n      found_device_id = BT_DEVICE_ID_1;\n    } else if ((connected_remDev[1] == remDev) && (remDev != 0)) {\n      stream_id_flag.id = BT_DEVICE_ID_2;\n      found_device_id = BT_DEVICE_ID_2;\n    }\n  }\n  return found_device_id;\n}\n\nuint8_t POSSIBLY_UNUSED a2dp_get_streaming_id(void) {\n  uint8_t nRet = 0;\n  if (btif_a2dp_get_stream_state(\n          app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_1]) ==\n      BTIF_AVDTP_STRM_STATE_STREAMING)\n    nRet |= 1 << 0;\n  if (btif_a2dp_get_stream_state(\n          app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_2]) ==\n      BTIF_AVDTP_STRM_STATE_STREAMING)\n    nRet |= 1 << 1;\n  return nRet;\n}\n\n/* profile pass to here 2 states, if no will to change it, call api to confirm\n * it */\nuint8_t a2dp_stream_confirm_stream_state(uint8_t index, uint8_t old_state,\n                                         uint8_t new_state) {\n  return a2dp_codec_confirm_stream_state(index, old_state, new_state);\n}\n\nuint8_t a2dp_stream_locate_the_connected_dev_id(a2dp_stream_t *Stream) {\n  for (uint8_t index = 0; index < BT_DEVICE_NUM; index++) {\n    if ((app_bt_device.a2dp_stream[index]->a2dp_stream) == Stream) {\n      TRACE(1, \"Get a2dp stream index %d\", index);\n      return index;\n    }\n\n#if defined(A2DP_AAC_ON)\n    if ((app_bt_device.a2dp_aac_stream[index]->a2dp_stream) == Stream) {\n      TRACE(1, \"Get a2dp aac stream index %d\", index);\n      return index;\n    }\n#endif\n#if defined(A2DP_LHDC_ON)\n    if ((app_bt_device.a2dp_lhdc_stream[index]->a2dp_stream) == Stream) {\n      TRACE(1, \"Get a2dp lhdc stream index %d\", index);\n      return index;\n    }\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\n    if ((app_bt_device.a2dp_scalable_stream[index]->a2dp_stream) == Stream) {\n      TRACE(1, \"Get a2dp scalable stream index %d\", index);\n      return index;\n    }\n#endif\n\n#if defined(A2DP_LDAC_ON)\n    if ((app_bt_device.a2dp_ldac_stream[index]->a2dp_stream) == Stream) {\n      TRACE(1, \"Get a2dp ldac stream index %d\", index);\n      return index;\n    }\n#endif\n  }\n\n  ASSERT(false, \"Connected to an non-existing a2dp stream instance.\");\n\n  return 0;\n}\n\nvoid a2dp_stream_push_connected_stream(a2dp_stream_t *Stream) {\n\n  uint8_t reserved_device = BT_DEVICE_NUM;\n  reserved_device = a2dp_stream_locate_the_connected_dev_id(Stream);\n  app_bt_device.a2dp_connected_stream[reserved_device] = Stream;\n}\n\nvoid a2dp_stream_push_configed_stream(a2dp_stream_t *Stream,\n                                      btif_remote_device_t *rem) {\n  uint8_t reserved_device = BT_DEVICE_NUM;\n  reserved_device = a2dp_stream_locate_the_connected_dev_id(Stream);\n  app_bt_device.a2dp_outconfiged_stream[reserved_device] = Stream;\n  app_bt_device.a2dp_outconfiged_rem[reserved_device] = rem;\n}\n\n#ifdef A2DP_AAC_ON\nuint8_t is_aac_stream(a2dp_stream_t *Stream) {\n  if ((Stream == app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream) ||\n      (Stream == app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_2]->a2dp_stream))\n    return TRUE;\n  else\n    return FALSE;\n}\n#endif\n#endif\n\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_BT_RECONNECT__)\n\n#ifdef __BT_ONE_BRING_TWO__\nextern btif_device_record_t record2_copy;\nextern uint8_t record2_avalible;\n#endif\n\n#endif\n\n#if defined(A2DP_LHDC_ON)\nvoid a2dp_lhdc_config(uint8_t *elements) {\n  // uint8_t * elements = &(Info->p.configReq->codec.elements[0]);\n  uint32_t vendor_id = (uint32_t)elements[0];\n  vendor_id |= ((uint32_t)elements[1]) << 8;\n  vendor_id |= ((uint32_t)elements[2]) << 16;\n  vendor_id |= ((uint32_t)elements[3]) << 24;\n  uint16_t codec_id = (uint16_t)elements[4];\n  codec_id |= ((uint16_t)elements[5]) << 8;\n  uint8_t config = elements[6];\n  TRACE(3,\n        \"##codecType: LHDC Codec, config value = 0x%02x, elements[6]=0x%02x \"\n        \"elements[7]=0x%02x\\n\",\n        A2DP_LHDC_SR_DATA(config), elements[6], elements[7]);\n  if (vendor_id == A2DP_LHDC_VENDOR_ID && codec_id == A2DP_LHDC_CODEC_ID) {\n    TRACE(2, \"Vendor ID = 0x%08x, Codec ID = 0x%04x, LHDC Codec\\n\", vendor_id,\n          codec_id);\n    switch (A2DP_LHDC_SR_DATA(config)) {\n    case A2DP_LHDC_SR_96000:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_96;\n      TRACE(1, \"%s:CodecCfg sample_rate 96000\\n\", __func__);\n      break;\n    case A2DP_LHDC_SR_48000:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_48;\n      TRACE(1, \"%s:CodecCfg sample_rate 48000\\n\", __func__);\n      break;\n    case A2DP_LHDC_SR_44100:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_44;\n      TRACE(1, \"%s:CodecCfg sample_rate 44100\\n\", __func__);\n      break;\n    }\n    switch (A2DP_LHDC_FMT_DATA(config)) {\n    case A2DP_LHDC_FMT_16:\n      app_bt_device.sample_bit[stream_id_flag.id] = 16;\n      TRACE(1, \"%s:CodecCfg bits per sampe = 16\", __func__);\n      break;\n    case A2DP_LHDC_FMT_24:\n      TRACE(1, \"%s:CodecCfg bits per sampe = 24\", __func__);\n      app_bt_device.sample_bit[stream_id_flag.id] = 24;\n      break;\n    }\n\n    if (elements[7] & A2DP_LHDC_LLC_ENABLE) {\n      app_bt_device.a2dp_lhdc_llc[stream_id_flag.id] = true;\n      ;\n    } else {\n      app_bt_device.a2dp_lhdc_llc[stream_id_flag.id] = false;\n      ;\n    }\n  }\n}\n\nuint8_t a2dp_lhdc_config_llc_get(void) {\n  return app_bt_device.a2dp_lhdc_llc[stream_id_flag.id];\n}\n\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\nvoid a2dp_scalable_config(uint8_t *elements) {\n  // uint8_t * elements = &(Info->p.configReq->codec.elements[0]);\n  uint32_t vendor_id = (uint32_t)elements[0];\n  vendor_id |= ((uint32_t)elements[1]) << 8;\n  vendor_id |= ((uint32_t)elements[2]) << 16;\n  vendor_id |= ((uint32_t)elements[3]) << 24;\n  uint16_t codec_id = (uint16_t)elements[4];\n  codec_id |= ((uint16_t)elements[5]) << 8;\n  uint8_t config = elements[6];\n  TRACE(2,\n        \"##codecType: Scalable Codec, config value = 0x%02x, \"\n        \"elements[6]=0x%02x\\n\",\n        A2DP_SCALABLE_SR_DATA(config), elements[6]);\n  if (vendor_id == A2DP_SCALABLE_VENDOR_ID &&\n      codec_id == A2DP_SCALABLE_CODEC_ID) {\n    TRACE(2, \"Vendor ID = 0x%08x, Codec ID = 0x%04x, Scalable Codec\\n\",\n          vendor_id, codec_id);\n    switch (A2DP_SCALABLE_SR_DATA(config)) {\n    case A2DP_SCALABLE_SR_96000:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_96;\n      TRACE(1, \"%s:CodecCfg sample_rate 96000\\n\", __func__);\n      break;\n    case A2DP_SCALABLE_SR_48000:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_48;\n      TRACE(1, \"%s:CodecCfg sample_rate 48000\\n\", __func__);\n      break;\n    case A2DP_SCALABLE_SR_44100:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_44;\n      TRACE(1, \"%s:CodecCfg sample_rate 44100\\n\", __func__);\n      break;\n    case A2DP_SCALABLE_SR_32000:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_32;\n      TRACE(1, \"%s:CodecCfg sample_rate 32000\\n\", __func__);\n      break;\n    }\n    switch (A2DP_SCALABLE_FMT_DATA(config)) {\n    case A2DP_SCALABLE_FMT_16:\n      app_bt_device.sample_bit[stream_id_flag.id] = 16;\n      TRACE(1, \"%s:CodecCfg bits per sampe = 16\", __func__);\n      break;\n    case A2DP_SCALABLE_FMT_24:\n      app_bt_device.sample_bit[stream_id_flag.id] = 24;\n      TRACE(1, \"%s:CodecCfg bits per sampe = 24\", __func__);\n      if (app_bt_device.sample_rate[stream_id_flag.id] !=\n          A2D_SBC_IE_SAMP_FREQ_96) {\n        app_bt_device.sample_bit[stream_id_flag.id] = 16;\n        TRACE(\n            1,\n            \"%s:CodeCfg reset bit per sample to 16 when samplerate is not 96k\",\n            __func__);\n      }\n      break;\n    }\n  }\n}\n#endif\n\n#if defined(A2DP_LDAC_ON)\nint ldac_decoder_sf = 0;\nint ldac_decoder_cm = 0;\nvoid a2dp_ldac_config(uint8_t *elements) {\n  // uint8_t * elements = &(Info->p.configReq->codec.elements[0]);\n  uint32_t vendor_id = (uint32_t)elements[0];\n  vendor_id |= ((uint32_t)elements[1]) << 8;\n  vendor_id |= ((uint32_t)elements[2]) << 16;\n  vendor_id |= ((uint32_t)elements[3]) << 24;\n  uint16_t codec_id = (uint16_t)elements[4];\n  codec_id |= ((uint16_t)elements[5]) << 8;\n  uint8_t sf_config = elements[6];\n  uint8_t cm_config = elements[7];\n  TRACE(2,\n        \"##codecType: LDAC Codec, config value = 0x%02x, elements[6]=0x%02x\\n\",\n        A2DP_LDAC_SR_DATA(sf_config), elements[6]);\n  TRACE(2,\n        \"##codecType: LDAC Codec, config value = 0x%02x, elements[7]=0x%02x\\n\",\n        A2DP_LDAC_CM_DATA(cm_config), elements[7]);\n  TRACE(2, \"Vendor ID = 0x%08x, Codec ID = 0x%04x, LDAC Codec\\n\", vendor_id,\n        codec_id);\n  if (vendor_id == A2DP_LDAC_VENDOR_ID && codec_id == A2DP_LDAC_CODEC_ID) {\n    switch (A2DP_LDAC_SR_DATA(sf_config)) {\n    case A2DP_LDAC_SR_96000:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_96;\n      ldac_decoder_sf = 96000;\n      TRACE(1, \"%s:ldac CodecCfg sample_rate 96000\\n\", __func__);\n      break;\n    case A2DP_LDAC_SR_88200:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_88;\n      ldac_decoder_sf = 88200;\n      TRACE(1, \"%s:ldac CodecCfg sample_rate 88200\\n\", __func__);\n      break;\n    case A2DP_LDAC_SR_48000:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_48;\n      ldac_decoder_sf = 48000;\n      TRACE(1, \"%s:ldac CodecCfg sample_rate 48000\\n\", __func__);\n      break;\n    case A2DP_LDAC_SR_44100:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_44;\n      ldac_decoder_sf = 44100;\n      TRACE(1, \"%sldac :CodecCfg sample_rate 44100\\n\", __func__);\n      break;\n      /*case A2DP_LDAC_SR_88200:\n      app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_88;\n      ldac_decoder_sf = 88200;\n      TRACE(1,\"%s:ldac CodecCfg sample_rate 88200\\n\", __func__);\n      break;*/\n    }\n    switch (A2DP_LDAC_CM_DATA(cm_config)) {\n    case A2DP_LDAC_CM_MONO:\n      app_bt_device.channel_mode = LDACBT_CHANNEL_MODE_MONO;\n      TRACE(1, \"%s:ldac CodecCfg A2DP_LDAC_CM_MONO\", __func__);\n      break;\n    case A2DP_LDAC_CM_DUAL:\n      TRACE(1, \"%s:ldac CodecCfg A2DP_LDAC_CM_DUAL\", __func__);\n      app_bt_device.channel_mode = LDACBT_CHANNEL_MODE_DUAL_CHANNEL;\n      break;\n    case A2DP_LDAC_CM_STEREO:\n      TRACE(1, \"%s:ldac ldac CodecCfg A2DP_LDAC_CM_STEREO\", __func__);\n      app_bt_device.channel_mode = LDACBT_CHANNEL_MODE_STEREO;\n      break;\n    }\n  }\n}\n\nvoid app_ibrt_restore_ldac_info(uint8_t sample_freq) {\n  app_bt_device.channel_mode = LDACBT_CHANNEL_MODE_STEREO;\n  switch (sample_freq) {\n  case A2D_SBC_IE_SAMP_FREQ_96:\n    ldac_decoder_sf = 96000;\n    break;\n  case A2D_SBC_IE_SAMP_FREQ_88:\n    ldac_decoder_sf = 88200;\n    break;\n  case A2D_SBC_IE_SAMP_FREQ_48:\n    ldac_decoder_sf = 48000;\n    break;\n  case A2D_SBC_IE_SAMP_FREQ_44:\n    ldac_decoder_sf = 44100;\n    break;\n  }\n}\n\nint channel_mode;\nint bt_ldac_player_get_channelmode(void) {\n  if (app_bt_device.channel_mode != channel_mode) {\n    /* code */\n    channel_mode = app_bt_device.channel_mode;\n  }\n  return channel_mode;\n}\nint bt_get_ladc_sample_rate(void) { return ldac_decoder_sf; }\n\n#endif\n\nextern void\napp_bt_profile_connect_manager_a2dp(enum BT_DEVICE_ID_T id,\n                                    a2dp_stream_t *Stream,\n                                    const a2dp_callback_parms_t *Info);\n\n#ifdef __BT_ONE_BRING_TWO__\n\nvoid a2dp_dual_slave_setup_during_sco(enum BT_DEVICE_ID_T currentId) {\n  if (app_bt_device.a2dp_state[BT_DEVICE_ID_1] ||\n      app_bt_device.a2dp_state[BT_DEVICE_ID_2]) {\n    uint8_t activeDevice = currentId;\n    uint8_t idleDevice =\n        (BT_DEVICE_ID_1 == activeDevice) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n\n    btif_remote_device_t *activeRem = btif_a2dp_get_remote_device(\n        app_bt_device.a2dp_connected_stream[activeDevice]);\n    btif_remote_device_t *idleRem = btif_a2dp_get_remote_device(\n        app_bt_device.a2dp_connected_stream[idleDevice]);\n\n    TRACE(2, \"activeRem %p idleRem %p\", activeRem, idleRem);\n    if (idleRem && activeRem) {\n      btdrv_enable_dual_slave_configurable_slot_mode(\n          true, btif_me_get_remote_device_hci_handle(activeRem),\n          btif_me_get_remote_device_role(activeRem),\n          btif_me_get_remote_device_hci_handle(idleRem),\n          btif_me_get_remote_device_role(idleRem));\n    } else {\n      btdrv_enable_dual_slave_configurable_slot_mode(\n          false, 0x80, BTIF_BCR_SLAVE, 0x81, BTIF_BCR_SLAVE);\n    }\n  } else {\n    btdrv_enable_dual_slave_configurable_slot_mode(false, 0x80, BTIF_BCR_SLAVE,\n                                                   0x81, BTIF_BCR_SLAVE);\n  }\n}\n\nvoid a2dp_dual_slave_handling_refresh(void) {\n  if (app_bt_device.a2dp_state[BT_DEVICE_ID_1] ||\n      app_bt_device.a2dp_state[BT_DEVICE_ID_2]) {\n    TRACE(1, \"current a2dp streaming id %d\", app_bt_device.curr_a2dp_stream_id);\n    uint8_t activeDevice = app_bt_device.curr_a2dp_stream_id;\n    uint8_t idleDevice =\n        (BT_DEVICE_ID_1 == activeDevice) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n\n    btif_remote_device_t *activeRem = btif_a2dp_get_remote_device(\n        app_bt_device.a2dp_connected_stream[activeDevice]);\n    btif_remote_device_t *idleRem = btif_a2dp_get_remote_device(\n        app_bt_device.a2dp_connected_stream[idleDevice]);\n    TRACE(2, \"activeRem %p idleRem %p\", activeRem, idleRem);\n    if (idleRem && activeRem) {\n      btdrv_enable_dual_slave_configurable_slot_mode(\n          true, btif_me_get_remote_device_hci_handle(activeRem),\n          btif_me_get_remote_device_role(activeRem),\n          btif_me_get_remote_device_hci_handle(idleRem),\n          btif_me_get_remote_device_role(idleRem));\n    } else {\n      btdrv_enable_dual_slave_configurable_slot_mode(\n          false, 0x80, BTIF_BCR_SLAVE, 0x81, BTIF_BCR_SLAVE);\n    }\n  } else {\n    btdrv_enable_dual_slave_configurable_slot_mode(false, 0x80, BTIF_BCR_SLAVE,\n                                                   0x81, BTIF_BCR_SLAVE);\n  }\n}\n\nvoid a2dp_update_music_link(void) {\n  TRACE(1, \"current a2dp streaming id %d\", app_bt_device.curr_a2dp_stream_id);\n  uint8_t activeDevice = app_bt_device.curr_a2dp_stream_id;\n  uint8_t idleDevice =\n      (BT_DEVICE_ID_1 == activeDevice) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n\n  btif_remote_device_t *activeRem = btif_a2dp_get_remote_device(\n      app_bt_device.a2dp_connected_stream[activeDevice]);\n  btif_remote_device_t *idleRem = btif_a2dp_get_remote_device(\n      app_bt_device.a2dp_connected_stream[idleDevice]);\n  TRACE(2, \"activeRem %p idleRem %p\", activeRem, idleRem);\n  if (idleRem && activeRem) {\n    bt_drv_reg_op_music_link_config(\n        btif_me_get_remote_device_hci_handle(activeRem),\n        btif_me_get_remote_device_role(activeRem),\n        btif_me_get_remote_device_hci_handle(idleRem),\n        btif_me_get_remote_device_role(idleRem));\n  } else if (activeRem) {\n    bt_drv_reg_op_music_link_config(\n        btif_me_get_remote_device_hci_handle(activeRem),\n        btif_me_get_remote_device_role(activeRem), 0xff, BTIF_BCR_SLAVE);\n  }\n}\n\n#endif\n\nuint8_t a2dp_get_latest_paused_device(void) {\n  return app_bt_device.latestPausedDevId;\n}\n\n#ifdef __BT_ONE_BRING_TWO__\n#if !defined(__BT_SELECT_PROF_DEVICE_ID__)\nstatic void\na2dp_avdtp_stream_state_lock_management(a2dp_stream_t *Stream,\n                                        const a2dp_callback_parms_t *info) {\n  btif_a2dp_callback_parms_t *Info = (btif_a2dp_callback_parms_t *)info;\n\n  static uint8_t last_locked_configedid = 0xff;\n  if (Info->error != BTIF_AVDTP_ERR_NO_ERROR)\n    return;\n  switch (Info->event) {\n\n  case BTIF_A2DP_AVDTP_EVENT_SET_CFG_CNF: //-->set config\n    LOG_D(0, \"outgoing set cfg\");\n    // record the outgoing configed stream and rem\n    a2dp_stream_push_configed_stream(Stream, Info->remDev);\n    break;\n\n  case BTIF_A2DP_EVENT_STREAM_RECONFIG_CNF: // reconfig-->\n  case BTIF_A2DP_EVENT_STREAM_RECONFIG_IND: // rsp reconfig <--\n\n  case BTIF_A2DP_EVENT_STREAM_OPEN_IND: // set configed <--\n  case BTIF_A2DP_EVENT_STREAM_OPEN:     // after avdtp open rsp  AVDTP medio\n                                        // connected\n\n    LOG_E(2, \"evt %d STREAM %p \", Info->event, Stream);\n    btif_a2dp_lock_same_deviceid_endpoint(Stream, Info->remDev);\n    break;\n  case BTIF_A2DP_EVENT_AVDTP_CLOSE_IND:\n  case BTIF_A2DP_EVENT_STREAM_CLOSED: // unlock the stream state before the\n                                      // connected stream been released\n\n    LOG_E(2, \"evt %d STREAM %p \", Info->event, Stream);\n    btif_a2dp_unlock_same_deviceid_endpoint(Stream, Info->remDev);\n    break;\n  case BTIF_A2DP_EVENT_AVDTP_DISCOVER_IND: //<-- discover\n\n    LOG_E(0, \"DISCOVER_IND\");\n    btif_a2dp_unlock_the_connected_stream_byRemdev(Info->remDev);\n\n    // lock the other id\n    last_locked_configedid =\n        btif_a2dp_trylock_the_other_id_by_configedid(Info->remDev);\n    break;\n  case BTIF_A2DP_EVENT_AVDTP_DISCOVER_RSP:\n    LOG_D(0, \"disc rsp\");\n    btif_a2dp_unlock_deviceid_endpoint(last_locked_configedid);\n    break;\n  default:\n\n    break;\n  }\n}\n#endif\n#endif\n\n#if defined(__BT_SELECT_PROF_DEVICE_ID__)\nstatic void _a2dp_select_stream(a2dp_stream_t *Stream,\n                                a2dp_callback_parms_t *info) {\n  uint32_t i = 0, stream_is_on_device_id = 0;\n  a2dp_stream_t *dst_stream = NULL;\n  btif_remote_device_t *matching_remdev = NULL, *wanted_remdev = NULL;\n  // 1. find already connected profile, if any other one profile was conncected,\n  // select that device id\n  // 2. if no other profile connected, select min device id\n  btif_a2dp_set_dst_stream(info, Stream);\n  wanted_remdev = btif_a2dp_get_remote_device_from_cbparms(Stream, info);\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    // Other profile connected\n    stream_is_on_device_id = app_bt_a2dp_is_stream_on_device_id(Stream, i);\n    if (app_bt_is_any_profile_connected(i)) {\n      matching_remdev = app_bt_get_connected_profile_remdev(i);\n      LOG_D(3, \"device_id=%d, a2dp_select_stream : remdev=0x%x:0x%x.\", i,\n            wanted_remdev, matching_remdev);\n      LOG_D(1, \"device_id=%d, a2dp_select_stream : other_profile_connected.\",\n            i);\n      if (wanted_remdev == matching_remdev) {\n        LOG_D(1, \"device_id=%d, a2dp_select_stream : same_remdev.\", i);\n        // SWITCH COND 1 : same remdev but cross device id to select stream\n        if (!stream_is_on_device_id) {\n          app_bt_a2dp_find_same_unused_stream(Stream, &dst_stream, i);\n          btif_a2dp_set_dst_stream(info, dst_stream);\n          LOG_D(3,\n                \"device_id=%d, a2dp_select_stream : Switch_cond 1 : 0x%x:0x%x\",\n                i, Stream, dst_stream);\n        } else {\n          LOG_D(1,\n                \"device_id=%d, a2dp_select_stream : same device id, \"\n                \"no_need_to_switch.\",\n                i);\n        }\n        break;\n      } else {\n        LOG_D(1, \"device_id=%d, a2dp_select_stream : different_remdev.\", i);\n        if (stream_is_on_device_id) {\n          LOG_D(1,\n                \"device_id=%d, a2dp_select_stream : error : \"\n                \"different_remdev_but_same_device_id, see next device id.\",\n                i);\n        } else {\n          LOG_D(1,\n                \"device_id=%d, a2dp_select_stream : good : \"\n                \"different_remdev_different_device_id, see next device id.\",\n                i);\n        }\n      }\n    } else {\n      LOG_D(1,\n            \"device_id=%d, a2dp_select_stream : other_profile_not_connected.\",\n            i);\n      // first found idle device id is min device id we want\n      // Assume : other profile will use device id ascending\n      // TODO to keep other profile use device id ascending\n      if (!stream_is_on_device_id) {\n        app_bt_a2dp_find_same_unused_stream(Stream, &dst_stream, i);\n        btif_a2dp_set_dst_stream(info, dst_stream);\n        LOG_D(3, \"device_id=%d, a2dp_select_stream : Switch_cond 2 : 0x%x:0x%x\",\n              i, Stream, dst_stream);\n      } else {\n        LOG_D(1,\n              \"device_id=%d, a2dp_select_stream : same device id, \"\n              \"no_need_to_switch.\",\n              i);\n      }\n      break;\n    }\n  }\n}\n#endif\n\n#if defined(IBRT)\na2dp_stream_t *app_bt_get_mobile_a2dp_stream(uint32_t deviceId);\nint app_bt_stream_ibrt_audio_mismatch_stopaudio(void);\nvoid app_bt_stream_ibrt_audio_mismatch_resume(void);\n\nstatic uint8_t a2dp_session = 0;\nint a2dp_ibrt_session_reset(void) {\n  a2dp_session = 0;\n  return 0;\n}\n\nint a2dp_ibrt_session_new(void) {\n  a2dp_session++;\n  return 0;\n}\n\nint a2dp_ibrt_session_set(uint8_t session) {\n  a2dp_session = session;\n  return 0;\n}\n\nuint32_t a2dp_ibrt_session_get(void) { return a2dp_session; }\n\nstatic int a2dp_ibrt_autotrigger_flag = 0;\nint a2dp_ibrt_stream_need_autotrigger_set_flag(void) {\n  a2dp_ibrt_autotrigger_flag = 1;\n  return 0;\n}\n\nint a2dp_ibrt_stream_need_autotrigger_getandclean_flag(void) {\n  uint32_t flag;\n#if defined(IBRT_A2DP_TRIGGER_BY_MYSELF)\n  flag = a2dp_ibrt_autotrigger_flag;\n  a2dp_ibrt_autotrigger_flag = 0;\n#else\n  a2dp_ibrt_autotrigger_flag = 0;\n  flag = 1;\n#endif\n  return flag;\n}\n\nint a2dp_ibrt_sync_get_status(ibrt_a2dp_status_t *a2dp_status) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n  a2dp_status->codec = p_ibrt_ctrl->a2dp_codec;\n  a2dp_status->volume = a2dp_volume_get(BT_DEVICE_ID_1);\n  a2dp_status->state = btif_a2dp_get_stream_state(\n      app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_1]);\n  a2dp_status->latency_factor = a2dp_audio_latency_factor_get();\n  a2dp_status->session = a2dp_ibrt_session_get();\n  TRACE(4,\n        \"%s,sync a2dp stream ac = %p ; stream_status = %d ; codec_type =  %d \",\n        __func__, app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_1],\n        a2dp_status->state, a2dp_status->codec.codec_type);\n  return 0;\n}\n\nint a2dp_ibrt_sync_set_status(ibrt_a2dp_status_t *a2dp_status) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n  a2dp_stream_t *Stream = app_bt_get_mobile_a2dp_stream(BTIF_DEVICE_ID_1);\n  btif_avdtp_stream_state_t old_avdtp_stream_state =\n      btif_a2dp_get_stream_state(Stream);\n\n  btif_a2dp_callback_parms_t info;\n  btif_avdtp_config_request_t avdtp_config_req;\n\n  TRACE(5, \"%s,stream_state:[%d]->[%d], codec_type:%d volume:%d\", __func__,\n        old_avdtp_stream_state, a2dp_status->state,\n        a2dp_status->codec.codec_type, a2dp_status->volume);\n\n  if ((!(p_ibrt_ctrl->mobile_constate & BTIF_APP_A2DP_PROFILE_ID)) &&\n      (!(p_ibrt_ctrl->ibrt_constate & BTIF_APP_A2DP_PROFILE_ID))) {\n    TRACE(1, \"%s,a2dp profile not connected\", __func__);\n    return 1;\n  }\n\n  btif_a2dp_set_codec_info(BTIF_DEVICE_ID_1, (uint8_t *)&a2dp_status->codec);\n  info.event = BTIF_A2DP_EVENT_STREAM_OPEN;\n  app_tws_ibrt_set_a2dp_codec(&info);\n  app_bt_stream_volume_ptr_update((uint8_t *)btif_me_get_remote_device_bdaddr(\n      btif_a2dp_get_stream_conn_remDev(Stream)));\n  a2dp_volume_set(BT_DEVICE_ID_1, a2dp_status->volume);\n  a2dp_audio_latency_factor_set(a2dp_status->latency_factor);\n  a2dp_ibrt_session_set(a2dp_status->session);\n\n  if (a2dp_status->state != old_avdtp_stream_state) {\n    switch (a2dp_status->state) {\n    case BTIF_AVDTP_STRM_STATE_STREAMING:\n      app_bt_clear_connecting_profiles_state(BTIF_DEVICE_ID_1);\n      a2dp_timestamp_parser_init();\n      btif_a2dp_set_stream_state(Stream, a2dp_status->state);\n      info.event = BTIF_A2DP_EVENT_STREAM_STARTED_MOCK;\n      TRACE(0, \"::A2DP_EVENT_STREAM_STARTED mock\");\n      a2dp_ibrt_stream_need_autotrigger_set_flag();\n#if defined(IBRT_FORCE_AUDIO_RETRIGGER)\n      a2dp_callback(Stream, &info);\n      app_ibrt_if_force_audio_retrigger();\n#else\n      //                app_bt_stream_ibrt_audio_mismatch_resume();\n      a2dp_callback(Stream, &info);\n#endif\n      break;\n    case BTIF_AVDTP_STRM_STATE_OPEN:\n      // Ignore START->OPEN transition since itslef can received SUSPEND CMD\n      if (old_avdtp_stream_state != BTIF_AVDTP_STRM_STATE_STREAMING) {\n        TRACE(0, \"::A2DP_EVENT_STREAM_OPEN mock\");\n        btif_a2dp_set_stream_state(Stream, a2dp_status->state);\n        info.event = BTIF_A2DP_EVENT_STREAM_OPEN;\n        info.p.configReq = &avdtp_config_req;\n        info.p.configReq->codec.codecType = a2dp_status->codec.codec_type;\n        info.p.configReq->codec.elements =\n            (uint8_t *)btif_a2dp_get_stream_codecCfg(\n                (a2dp_stream_t *)p_ibrt_ctrl->p_mobile_a2dp_profile) +\n            2;\n        a2dp_callback(Stream, &info);\n      }\n      break;\n    default:\n      if (btif_a2dp_get_stream_state(Stream) != BTIF_AVDTP_STRM_STATE_IDLE) {\n        TRACE(0, \"::A2DP_EVENT_STREAM_SUSPENDED mock\");\n        btif_a2dp_set_stream_state(Stream, a2dp_status->state);\n        info.event = BTIF_A2DP_EVENT_STREAM_SUSPENDED;\n        a2dp_callback(Stream, &info);\n      }\n      break;\n    }\n  }\n  return 0;\n}\n\nint a2dp_ibrt_stream_open_mock(void) {\n  a2dp_stream_t *Stream = app_bt_get_mobile_a2dp_stream(BTIF_DEVICE_ID_1);\n  btif_remote_device_t *remDev = btif_a2dp_get_stream_conn_remDev(Stream);\n\n  TRACE(0, \"::A2DP_EVENT_STREAM_OPEN mock\");\n\n  app_bt_clear_connecting_profiles_state(BTIF_DEVICE_ID_1);\n  a2dp_timestamp_parser_init();\n  a2dp_set_cur_stream(stream_id_flag.id);\n\n  if (remDev) {\n    btdevice_profile *btdevice_plf_p = NULL;\n    btdevice_plf_p = (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n        btif_me_get_remote_device_bdaddr(remDev)->address);\n    nv_record_btdevicerecord_set_a2dp_profile_active_state(btdevice_plf_p,\n                                                           true);\n    nv_record_btdevicerecord_set_a2dp_profile_codec(\n        btdevice_plf_p, bt_sbc_player_get_codec_type());\n    a2dp_get_current_codec_type(\n        btif_a2dp_get_stream_codec(\n            app_bt_device\n                .a2dp_connected_stream[app_bt_device.curr_a2dp_stream_id])\n            ->elements);\n    app_bt_stream_volume_ptr_update(\n        (uint8_t *)btif_me_get_remote_device_bdaddr(remDev));\n    TRACE(2, \"::A2DP_EVENT_STREAM_OPEN mock codec_type:%d vol:%d\",\n          bt_sbc_player_get_codec_type(),\n          app_bt_stream_volume_get_ptr()->a2dp_vol);\n  } else {\n    TRACE(0, \"::A2DP_EVENT_STREAM_OPEN mock no find remDev\");\n    app_bt_stream_volume_ptr_update(NULL);\n  }\n\n  return 0;\n}\n\n#ifdef __SNIFF_MODE_CHECK__\nosTimerId sniff_check_timer = NULL;\nstatic void sniff_check_timer_handler(void const *param);\nosTimerDef(SNIFF_CHECK_TIMER,\n           (void (*)(void const *))sniff_check_timer_handler); // define timers\nuint8_t sniff_timer_state = 0;\n\nstatic void sniff_check_timer_handler(void const *param) {\n  ASSERT(0, \"sniff mode error\");\n}\n#endif\n\n#define A2DP_IBRT_STREAM_SKIP_TWS_SNIFF_STATUS (1)\n\nint a2dp_ibrt_stream_event_stream_data_ind_needskip(a2dp_stream_t *Stream) {\n  int nRet = 0;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n#ifdef __SNIFF_MODE_CHECK__\n  if (!sniff_check_timer)\n    sniff_check_timer =\n        osTimerCreate(osTimer(SNIFF_CHECK_TIMER), osTimerOnce, NULL);\n#endif\n  if (app_tws_ibrt_mobile_link_connected()) {\n    if (p_ibrt_ctrl->mobile_mode == IBRT_SNIFF_MODE) {\n      TRACE(\n          0,\n          \"::A2DP_EVENT_STREAM_DATA_IND ibrt_link skip (mobile) skip sniff\\n\");\n      nRet = 1;\n#ifdef __SNIFF_MODE_CHECK__\n      if (sniff_timer_state == 0) {\n        sniff_timer_state = 1;\n        osTimerStart(sniff_check_timer, 5000);\n      }\n#endif\n    }\n#ifdef __SNIFF_MODE_CHECK__\n    else {\n      sniff_timer_state = 0;\n      osTimerStop(sniff_check_timer);\n    }\n#endif\n    if (app_tws_ibrt_tws_link_connected()) {\n      if (app_ibrt_ui_is_profile_exchanged() &&\n          p_ibrt_ctrl->tws_mode == IBRT_SNIFF_MODE) {\n        TRACE(0, \"::A2DP_EVENT_STREAM_DATA_IND mobile_link (tws) skip sniff\\n\");\n#ifndef A2DP_IBRT_STREAM_SKIP_TWS_SNIFF_STATUS\n        nRet = 1;\n#endif\n#ifdef __SNIFF_MODE_CHECK__\n        if (sniff_timer_state == 0) {\n          sniff_timer_state = 1;\n          osTimerStart(sniff_check_timer, 5000);\n        }\n#endif\n      }\n#ifdef __SNIFF_MODE_CHECK__\n      else {\n        sniff_timer_state = 0;\n        osTimerStop(sniff_check_timer);\n      }\n#endif\n    }\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    if (p_ibrt_ctrl->mobile_mode == IBRT_SNIFF_MODE) {\n      TRACE(\n          0,\n          \"::A2DP_EVENT_STREAM_DATA_IND ibrt_link skip (mobile) skip sniff\\n\");\n      nRet = 1;\n#ifdef __SNIFF_MODE_CHECK__\n      if (sniff_timer_state == 0) {\n        sniff_timer_state = 1;\n        osTimerStart(sniff_check_timer, 5000);\n      }\n#endif\n    }\n#ifdef __SNIFF_MODE_CHECK__\n    else {\n      sniff_timer_state = 0;\n      osTimerStop(sniff_check_timer);\n    }\n#endif\n    if (p_ibrt_ctrl->tws_mode == IBRT_SNIFF_MODE) {\n      TRACE(0,\n            \"::A2DP_EVENT_STREAM_DATA_IND ibrt_link skip (tws) skip sniff\\n\");\n#ifndef A2DP_IBRT_STREAM_SKIP_TWS_SNIFF_STATUS\n      nRet = 1;\n#endif\n#ifdef __SNIFF_MODE_CHECK__\n      if (sniff_timer_state == 0) {\n        sniff_timer_state = 1;\n        osTimerStart(sniff_check_timer, 5000);\n      }\n#endif\n    }\n#ifdef __SNIFF_MODE_CHECK__\n    else {\n      sniff_timer_state = 0;\n      osTimerStop(sniff_check_timer);\n    }\n#endif\n  }\n\n#ifdef __SNIFF_MODE_CHECK__\n  if (nRet == 0) {\n    sniff_timer_state = 0;\n    osTimerStop(sniff_check_timer);\n  }\n#endif\n  return nRet;\n}\n#endif\n\n#ifdef __A2DP_AVDTP_CP__\nextern U8 a2dp_avdtpCp_securityData[BT_DEVICE_NUM]\n                                   [BTIF_AVDTP_MAX_CP_VALUE_SIZE];\nextern U8 a2dp_avdtpCp_aac_securityData[BT_DEVICE_NUM]\n                                       [BTIF_AVDTP_MAX_CP_VALUE_SIZE];\n#endif /* __A2DP_AVDTP_CP__ */\n\nuint8_t a2dp_get_current_codec_type(uint8_t *elements) {\n  uint8_t current_codec_type = 0;\n\n  TRACE(\n      4,\n      \"INFO element[0]:0x%x, element[1]:0x%x, element[2]:0x%x, element[3]:0x%x\",\n      elements[0], elements[1], elements[2], elements[3]);\n\n#if defined(A2DP_LHDC_ON)\n  TRACE(\n      4,\n      \"LHDC element[0]:0x%x, element[1]:0x%x, element[2]:0x%x, element[3]:0x%x\",\n      a2dp_codec_lhdc_elements[0], a2dp_codec_lhdc_elements[1],\n      a2dp_codec_lhdc_elements[2], a2dp_codec_lhdc_elements[3]);\n\n  if (!(strncmp((char *)elements, (char *)&a2dp_codec_lhdc_elements, 4))) {\n    TRACE(0, \"USE codec type is LHDC\");\n    current_codec_type = A2DP_NON_CODEC_TYPE_LHDC;\n  }\n#endif\n\n#if defined(A2DP_LDAC_ON)\n  TRACE(\n      4,\n      \"LDAC element[0]:0x%x, element[1]:0x%x, element[2]:0x%x, element[3]:0x%x\",\n      a2dp_codec_ldac_elements[0], a2dp_codec_ldac_elements[1],\n      a2dp_codec_ldac_elements[2], a2dp_codec_ldac_elements[3]);\n\n  if (!(strncmp((char *)elements, (char *)&a2dp_codec_ldac_elements, 4))) {\n    TRACE(0, \"USE codec type is LDAC\");\n    current_codec_type = A2DP_NON_CODEC_TYPE_LDAC;\n  }\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\n  if (!(strncmp((char *)elements, (char *)&a2dp_codec_scalable_elements, 4))) {\n    TRACE(0, \"USE codec type is SCALABLE\");\n    current_codec_type = A2DP_NON_CODEC_TYPE_SCALABLE;\n  }\n#endif\n\n  current_a2dp_non_type = current_codec_type;\n\n  return current_codec_type;\n}\n\nextern \"C\" void a2dp_callback(a2dp_stream_t *Stream,\n                              const a2dp_callback_parms_t *info) {\n  int header_len = 0;\n  btif_avdtp_media_header_t header;\n  uint8_t distinguish_found_id = BT_DEVICE_NUM;\n  btif_a2dp_callback_parms_t *Info = (btif_a2dp_callback_parms_t *)info;\n  btif_avdtp_codec_t *codec = NULL;\n  struct bt_cb_tag *bt_drv_func_cb = bt_drv_get_func_cb_ptr();\n\n  static uint8_t detect_first_packet[BT_DEVICE_NUM] = {\n      0,\n  };\n\n  uint8_t current_codec_type = 0;\n\n#if defined(__BTIF_BT_RECONNECT__)\n  static btif_avdtp_codec_t setconfig_codec;\n  static u8 tmp_element[10];\n#endif\n#ifdef __A2DP_AVDTP_CP__\n  static btif_avdtp_content_prot_t setconfig_cp[BT_DEVICE_NUM];\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n\n  // !!! not used now\n  // if (Info->event == BTIF_A2DP_EVENT_STREAM_STATE_CFM) {\n  //     _a2dp_confirm_stream_state(Stream, (a2dp_callback_parms_t *)info);\n  //     return;\n  // }\n\n  if (Info->event == BTIF_A2DP_EVENT_STREAM_SELECT) {\n#if defined(__BT_SELECT_PROF_DEVICE_ID__)\n    _a2dp_select_stream(Stream, (a2dp_callback_parms_t *)info);\n#endif\n    return;\n  }\n\n  if (Info->event == BTIF_A2DP_EVENT_STREAM_OPEN) {\n    // BTIF_A2DP_EVENT_STREAM_OPEN means that the\n    //  AVDTP opened   the avdtp media has connected\n    a2dp_stream_push_connected_stream(Stream);\n  }\n#if !defined(__BT_SELECT_PROF_DEVICE_ID__)\n  a2dp_avdtp_stream_state_lock_management(Stream, info);\n#endif\n  if (Info->event == BTIF_A2DP_EVENT_STREAM_SELECT) {\n    return;\n  }\n  distinguish_found_id = a2dp_stream_id_distinguish(Stream, Info->event);\n#else\n  stream_id_flag.id = BT_DEVICE_ID_1;\n  app_bt_device.a2dp_connected_stream[BT_DEVICE_ID_1] = Stream;\n  distinguish_found_id = BT_DEVICE_ID_1;\n#endif\n\n  codec = btif_a2dp_get_stream_codec(Stream);\n  if (BTIF_A2DP_EVENT_STREAM_DATA_IND != Info->event) {\n    TRACE(1, \"Get A2DP event %d\", Info->event);\n  }\n#ifdef __BT_ONE_BRING_TWO__\n\n  enum BT_DEVICE_ID_T anotherDevice =\n      (BT_DEVICE_ID_1 == stream_id_flag.id) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n  switch (Info->event) {\n  case BTIF_A2DP_EVENT_AVDTP_DISCONNECT:\n    TRACE(3, \"::A2DP_EVENT_AVDTP_DISCONNECT %d st = %p,id %d\\n\", Info->event,\n          Stream, stream_id_flag.id);\n    break;\n  case BTIF_A2DP_EVENT_AVDTP_CONNECT:\n    TRACE(3, \"::A2DP_EVENT_AVDTP_CONNECT %d st = %p id = %d\\n\", Info->event,\n          Stream, stream_id_flag.id);\n\n#ifdef BT_USB_AUDIO_DUAL_MODE\n    if (!btusb_is_bt_mode()) {\n      btusb_btaudio_close(false);\n    }\n#endif\n    break;\n  case BTIF_A2DP_EVENT_STREAM_OPEN:\n    TRACE(2,\n          \"::A2DP_EVENT_STREAM_OPEN dev_id %x, stream_id:%d, sample_rate \"\n          \"codec.elements 0x%x\\n\",\n          distinguish_found_id, stream_id_flag.id,\n          Info->p.configReq->codec.elements[0]);\n\n    // update bt_profile_manager[deviceId].stream\n    app_bt_set_mobile_a2dp_stream(distinguish_found_id, Stream);\n\n#ifdef __BT_ONE_BRING_TWO__\n    app_bt_device.latestPausedDevId = anotherDevice;\n#else\n    app_bt_device.latestPausedDevId = BT_DEVICE_ID_1;\n#endif\n\n#ifdef GFPS_ENABLED\n    app_exit_fastpairing_mode();\n#endif\n\n    app_bt_clear_connecting_profiles_state(stream_id_flag.id);\n\n#ifdef __BT_ONE_BRING_TWO__\n    a2dp_to_bond_avrcp_with_stream(Stream, stream_id_flag.id);\n#endif\n\n#if defined(__BTMAP_ENABLE__)\n#ifdef BTIF_DIP_DEVICE\n    if ((btif_dip_get_process_status(\n            btif_a2dp_get_stream_conn_remDev(Stream))) &&\n        (app_btmap_check_is_idle(stream_id_flag.id)))\n#endif\n    {\n      app_btmap_sms_open(stream_id_flag.id,\n                         btif_me_get_remote_device_bdaddr(\n                             btif_a2dp_get_stream_conn_remDev(Stream)));\n    }\n#endif\n\n#ifdef __A2DP_AVDTP_CP__\n    // btif_a2dp_security_control_req(Stream,(uint8_t\n    // *)&a2dp_avdtpCp_securityData[stream_id_flag.id][0],1);\n#endif\n    a2dp_timestamp_parser_init();\n    app_bt_stream_volume_ptr_update((uint8_t *)btif_me_get_remote_device_bdaddr(\n        btif_a2dp_get_stream_conn_remDev(Stream)));\n    //            app_bt_stream_a2dpvolume_reset();\n\n    current_codec_type =\n        a2dp_get_current_codec_type(Info->p.configReq->codec.elements);\n\n    TRACE(2, \"codecType 0x%x, current_codec_type %d \\n\",\n          Info->p.configReq->codec.codecType, current_codec_type);\n\n#if defined(A2DP_AAC_ON)\n    if (Info->p.configReq->codec.codecType ==\n        BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n      TRACE(2,\n            \"::A2DP_EVENT_STREAM_OPEN stream_id:%d, aac sample_rate \"\n            \"codec.elements 0x%x\\n\",\n            stream_id_flag.id, Info->p.configReq->codec.elements[1]);\n      app_bt_device.codec_type[stream_id_flag.id] =\n          BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC;\n      app_bt_device.sample_bit[stream_id_flag.id] = 16;\n      // convert aac sample_rate to sbc sample_rate format\n      if (Info->p.configReq->codec.elements[1] &\n          A2DP_AAC_OCTET1_SAMPLING_FREQUENCY_44100) {\n        TRACE(1,\n              \"::A2DP_EVENT_STREAM_OPEN stream_id:%d, aac sample_rate 44100\\n\",\n              stream_id_flag.id);\n        app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_44;\n      } else if (Info->p.configReq->codec.elements[2] &\n                 A2DP_AAC_OCTET2_SAMPLING_FREQUENCY_48000) {\n        TRACE(1,\n              \"::A2DP_EVENT_STREAM_OPEN stream_id:%d, aac sample_rate 48000\\n\",\n              stream_id_flag.id);\n        app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_48;\n      } else {\n        TRACE(1,\n              \"::A2DP_EVENT_STREAM_OPEN stream_id:%d, aac sample_rate not \"\n              \"48000 or 44100, set to 44100\\n\",\n              stream_id_flag.id);\n        app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_44;\n      }\n\n      if (Info->p.configReq->codec.elements[2] & A2DP_AAC_OCTET2_CHANNELS_1) {\n        a2dp_channel_num[stream_id_flag.id] = 1;\n      } else {\n        a2dp_channel_num[stream_id_flag.id] = 2;\n      }\n    } else\n#endif\n        if (Info->p.configReq->codec.codecType ==\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n#if defined(A2DP_LHDC_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_LHDC) {\n        TRACE(2,\n              \"##codecType: LHDC Codec, Element length = %d, \"\n              \"AVDTP_MAX_CODEC_ELEM_SIZE = %d\\n\",\n              Info->p.configReq->codec.elemLen, BTIF_AVDTP_MAX_CODEC_ELEM_SIZE);\n        app_bt_device.codec_type[stream_id_flag.id] =\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n        a2dp_lhdc_config(&(Info->p.configReq->codec.elements[0]));\n      }\n#endif\n#if defined(A2DP_SCALABLE_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n        TRACE(0, \"##codecType scalable\\n\");\n        a2dp_scalable_config(&(Info->p.configReq->codec.elements[0]));\n        app_bt_device.codec_type[stream_id_flag.id] =\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n        // 0x75 0x00 0x00 0x00Vid\n        // 0x03 0x01   Codec id\n        if (Info->p.codec->elements[0] == 0x75 &&\n            Info->p.codec->elements[4] == 0x03 &&\n            Info->p.codec->elements[5] == 0x01) {\n          setconfig_codec.elements = a2dp_scalable_avdtpcodec.elements;\n        } else {\n          if (Info->p.codec->pstreamflags != NULL)\n            Info->p.codec->pstreamflags[0] &= ~APP_A2DP_STRM_FLAG_QUERY_CODEC;\n          else {\n            ASSERT(false, \"pstreamflags not init ..\");\n          }\n\n          a2dp_channel_num[stream_id_flag.id] = 2;\n        }\n      }\n#endif\n#if defined(A2DP_LDAC_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_LDAC) {\n        TRACE(2,\n              \"##codecType: LDAC Codec, Element length = %d, \"\n              \"AVDTP_MAX_CODEC_ELEM_SIZE = %d\\n\",\n              Info->p.configReq->codec.elemLen, BTIF_AVDTP_MAX_CODEC_ELEM_SIZE);\n        app_bt_device.codec_type[stream_id_flag.id] =\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n        //\n        // Codec Info Element: 0x 2d 01 00 00 aa 00 34 07\n        //\n        if (Info->p.codec->elements[0] == 0x2d) {\n          app_bt_device.sample_bit[stream_id_flag.id] = 16;\n          a2dp_ldac_config(&(Info->p.configReq->codec.elements[0]));\n\n        } else {\n          if (Info->p.codec->pstreamflags != NULL)\n            Info->p.codec->pstreamflags[0] &= ~APP_A2DP_STRM_FLAG_QUERY_CODEC;\n          else {\n            ASSERT(false, \"pstreamflags not init ..\");\n          }\n\n          a2dp_channel_num[stream_id_flag.id] = 2;\n        }\n      }\n#endif\n    } else {\n      TRACE(\n          5,\n          \"app_bt_device.sample_rate::elements[0] %d BITPOOL:%d/%d %02x/%02x\\n\",\n          Info->p.codec->elements[0], Info->p.codec->elements[2],\n          Info->p.codec->elements[3], Info->p.codec->elements[2],\n          Info->p.codec->elements[3]);\n\n      app_bt_device.codec_type[stream_id_flag.id] = BTIF_AVDTP_CODEC_TYPE_SBC;\n      app_bt_device.sample_bit[stream_id_flag.id] = 16;\n      app_bt_device.sample_rate[stream_id_flag.id] =\n          (Info->p.configReq->codec.elements[0] & A2D_SBC_IE_SAMP_FREQ_MSK);\n\n      if (Info->p.configReq->codec.elements[0] & A2D_SBC_IE_CH_MD_MONO)\n        a2dp_channel_num[stream_id_flag.id] = 1;\n      else\n        a2dp_channel_num[stream_id_flag.id] = 2;\n    }\n    app_bt_device.a2dp_state[stream_id_flag.id] = 1;\n\n    if (btif_a2dp_is_stream_device_has_delay_reporting(Stream)) {\n      btif_a2dp_set_sink_delay(Stream, 150);\n    }\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n    if (app_bt_device.src_or_snk == BT_DEVICE_SRC) {\n      if ((Info->p.configReq->codec.elements[1] & A2D_SBC_IE_SUBBAND_MSK) ==\n          A2D_SBC_IE_SUBBAND_4)\n        TRACE(0, \"numSubBands is only support 8!\");\n      // a2dp_source.sample_rate =\n      // bt_parse_sbc_sample_rate(btif_a2dp_get_stream_codec_element(Stream,0));\n      a2dp_source.sample_rate =\n          bt_parse_sbc_sample_rate(A2D_SBC_IE_SAMP_FREQ_44);\n      // TRACE(0,\"::AVRCP_Connect\\n\", __LINE__);\n      // AVRCP_Connect(&app_bt_device.avrcp_channel[stream_id_flag.id],\n      // &Stream->stream.conn.remDev->bdAddr);\n    } else {\n      // reset connect counter\n      app_avrcp_connect_try_times[stream_id_flag.id] = 0;\n      btif_avrcp_connect(app_bt_device.avrcp_channel[stream_id_flag.id],\n                         btif_me_get_remote_device_bdaddr(\n                             btif_a2dp_get_stream_conn_remDev(Stream)));\n    }\n#else\n    // reset connect counter\n    app_avrcp_connect_try_times[stream_id_flag.id] = 0;\n    btif_avrcp_connect(app_bt_device.avrcp_channel[stream_id_flag.id],\n                       btif_me_get_remote_device_bdaddr(\n                           btif_a2dp_get_stream_conn_remDev(Stream)));\n#endif\n    app_bt_profile_connect_manager_a2dp(stream_id_flag.id, Stream,\n                                        (a2dp_callback_parms_t *)Info);\n#ifdef __BT_ONE_BRING_TWO__\n\n    if (app_bt_device.a2dp_connected_stream[anotherDevice] &&\n        (btif_a2dp_get_stream_state(\n             app_bt_device.a2dp_connected_stream[anotherDevice]) !=\n         BTIF_AVDTP_STRM_STATE_STREAMING)) {\n      a2dp_set_cur_stream(stream_id_flag.id);\n    } else if (!app_bt_device.a2dp_connected_stream[anotherDevice]) {\n      a2dp_set_cur_stream(stream_id_flag.id);\n    }\n#else\n    a2dp_set_cur_stream(stream_id_flag.id);\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n    a2dp_dual_slave_handling_refresh();\n#endif\n#if defined(IBRT)\n    a2dp_ibrt_session_reset();\n#endif\n    break;\n  case BTIF_A2DP_EVENT_STREAM_OPEN_IND:\n    TRACE(1, \"::A2DP_EVENT_STREAM_OPEN_IND %d\\n\", Info->event);\n    btif_a2dp_open_stream_rsp(Stream, BTIF_A2DP_ERR_NO_ERROR,\n                              BTIF_AVDTP_SRV_CAT_MEDIA_TRANSPORT);\n#ifdef __A2DP_AVDTP_CP__\n    if (Info->p.configReq->cp.cpType == BTIF_AVDTP_CP_TYPE_SCMS_T) {\n      app_bt_device.avdtp_cp[stream_id_flag.id] = 1;\n    }\n#endif\n    break;\n  case BTIF_A2DP_EVENT_STREAM_STARTED:\n#if defined(IBRT)\n    a2dp_ibrt_session_new();\n  case BTIF_A2DP_EVENT_STREAM_STARTED_MOCK:\n    app_ibrt_if_sniff_checker_start(APP_IBRT_IF_SNIFF_CHECKER_USER_A2DP);\n    {\n      ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n      bt_drv_reg_op_set_agc_thd(p_ibrt_ctrl->current_role == IBRT_MASTER,\n                                false);\n    }\n#endif\n\n    if (bt_drv_func_cb->bt_switch_agc != NULL) {\n      bt_drv_func_cb->bt_switch_agc(BT_A2DP_WORK_MODE);\n    }\n\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"Music on ok.\");\n#endif\n    if (btif_a2dp_is_stream_device_has_delay_reporting(Stream)) {\n      btif_a2dp_set_sink_delay(Stream, 150);\n    }\n#if !defined(IBRT)\n    app_bt_active_mode_set(ACTIVE_MODE_KEEPER_A2DP_STREAMING,\n                           stream_id_flag.id);\n#endif\n    a2dp_timestamp_parser_init();\n    app_bt_device.a2dp_streamming[stream_id_flag.id] = 1;\n    detect_first_packet[stream_id_flag.id] = 1;\n\n#ifdef __BT_ONE_BRING_TWO__\n    if (app_bt_is_device_connected(anotherDevice)) {\n      app_bt_active_mode_set(ACTIVE_MODE_KEEPER_A2DP_STREAMING, anotherDevice);\n    }\n\n    TRACE(\n        5, \"::BTIF_A2DP_EVENT_STREAM_STARTED_MOCK %d  stream_id:%d %d %d %d\\n\",\n        codec->codecType, stream_id_flag.id, app_bt_device.curr_a2dp_stream_id,\n        app_bt_device.a2dp_streamming[0], app_bt_device.a2dp_streamming[1]);\n\n    TRACE(1, \"playback = %d\", app_bt_device.a2dp_play_pause_flag);\n    if (app_bt_device.a2dp_connected_stream[anotherDevice] &&\n        (btif_a2dp_get_stream_state(\n             app_bt_device.a2dp_connected_stream[anotherDevice]) !=\n         BTIF_AVDTP_STRM_STATE_STREAMING)) {\n      a2dp_set_cur_stream(stream_id_flag.id);\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_SBC,\n                                    stream_id_flag.id, MAX_RECORD_NUM);\n      app_a2dp_unhold_mute();\n    } else if (!app_bt_device.a2dp_connected_stream[anotherDevice]) {\n      a2dp_set_cur_stream(stream_id_flag.id);\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_SBC,\n                                    stream_id_flag.id, MAX_RECORD_NUM);\n      app_a2dp_unhold_mute();\n    }\n#else // #ifndef __BT_ONE_BRING_TWO__\n    TRACE(4, \"::A2DP_EVENT_STREAM_STARTED %d  stream_id:%d %d %d\\n\",\n          codec->codecType, stream_id_flag.id,\n          app_bt_device.curr_a2dp_stream_id, app_bt_device.a2dp_streamming[0]);\n\n    a2dp_set_cur_stream(BT_DEVICE_ID_1);\n\n#if (A2DP_DECODER_VER == 2)\n#if defined(IBRT)\n    if (Info->event == BTIF_A2DP_EVENT_STREAM_STARTED) {\n      a2dp_audio_latency_factor_setlow();\n    }\n#else\n    a2dp_audio_latency_factor_setlow();\n#endif\n#endif\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n    if (app_bt_device.src_or_snk == BT_DEVICE_SNK) {\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_SBC,\n                                    stream_id_flag.id, MAX_RECORD_NUM);\n    } else {\n      TRACE(0, \"::APP_A2DP_SOURCE START \\n\");\n#if defined(APP_LINEIN_A2DP_SOURCE)\n      app_audio_sendrequest(APP_A2DP_SOURCE_LINEIN_AUDIO,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n#else\n      app_audio_sendrequest(APP_A2DP_SOURCE_I2S_AUDIO,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n#endif\n      app_bt_device.input_onoff = 1;\n    }\n#else  // #if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_SBC,\n                                  stream_id_flag.id, MAX_RECORD_NUM);\n#endif // #if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\n#endif // #ifdef __BT_ONE_BRING_TWO__\n\n#ifdef __BT_ONE_BRING_TWO__\n    if (btapp_hfp_is_dev_sco_connected(anotherDevice)) {\n      a2dp_dual_slave_setup_during_sco(anotherDevice);\n    } else {\n      a2dp_dual_slave_handling_refresh();\n    }\n#endif\n\n#ifdef __IAG_BLE_INCLUDE__\n    app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_A2DP_ON, true);\n#endif\n    break;\n  case BTIF_A2DP_EVENT_STREAM_START_IND:\n#ifdef __BT_ONE_BRING_TWO__\n    TRACE(5, \"::A2DP_EVENT_STREAM_START_IND %d  stream_id:%d %d %d %d\\n\",\n          codec->codecType, stream_id_flag.id,\n          app_bt_device.curr_a2dp_stream_id, app_bt_device.a2dp_streamming[0],\n          app_bt_device.a2dp_streamming[1]);\n#else\n    TRACE(4, \"::A2DP_EVENT_STREAM_START_IND %d  stream_id:%d %d %d\\n\",\n          codec->codecType, stream_id_flag.id,\n          app_bt_device.curr_a2dp_stream_id, app_bt_device.a2dp_streamming[0]);\n#endif\n    {\n#ifdef BT_USB_AUDIO_DUAL_MODE\n      if (!btusb_is_bt_mode()) {\n        btif_a2dp_start_stream_rsp(Stream, BTIF_A2DP_ERR_INSUFFICIENT_RESOURCE);\n      } else\n#endif\n      {\n        btif_a2dp_start_stream_rsp(Stream, BTIF_A2DP_ERR_NO_ERROR);\n        app_bt_device.a2dp_play_pause_flag = 1;\n      }\n    }\n    break;\n  case BTIF_A2DP_EVENT_STREAM_IDLE:\n    TRACE(0, \"BTIF_A2DP_EVENT_STREAM_IDLE\");\n  case BTIF_A2DP_EVENT_STREAM_SUSPENDED:\n#if defined(IBRT)\n    app_ibrt_if_sniff_checker_stop(APP_IBRT_IF_SNIFF_CHECKER_USER_A2DP);\n#endif\n    if (bt_drv_func_cb->bt_switch_agc != NULL) {\n      bt_drv_func_cb->bt_switch_agc(BT_IDLE_MODE);\n    }\n\n#ifdef __BT_ONE_BRING_TWO__\n    TRACE(5, \"::A2DP_EVENT_STREAM_SUSPENDED %d  stream_id:%d %d %d %d\\n\",\n          codec->codecType, stream_id_flag.id,\n          app_bt_device.curr_a2dp_stream_id, app_bt_device.a2dp_streamming[0],\n          app_bt_device.a2dp_streamming[1]);\n#else\n    TRACE(4, \"::A2DP_EVENT_STREAM_SUSPENDED %d  stream_id:%d %d %d\\n\",\n          codec->codecType, stream_id_flag.id,\n          app_bt_device.curr_a2dp_stream_id, app_bt_device.a2dp_streamming[0]);\n#endif\n    a2dp_timestamp_parser_init();\n    app_bt_device.a2dp_streamming[stream_id_flag.id] = 0;\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"Music suspend ok.\");\n#endif\n    app_bt_active_mode_clear(ACTIVE_MODE_KEEPER_A2DP_STREAMING,\n                             stream_id_flag.id);\n\n#ifdef __BT_ONE_BRING_TWO__\n    if (app_bt_is_device_connected(anotherDevice) &&\n        (!app_bt_device.a2dp_streamming[anotherDevice]) &&\n        (BTIF_HF_CALL_ACTIVE != app_bt_device.hfchan_call[anotherDevice])) {\n      app_bt_active_mode_clear(ACTIVE_MODE_KEEPER_A2DP_STREAMING,\n                               anotherDevice);\n    }\n\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                  stream_id_flag.id, 0);\n    if ((app_bt_device.a2dp_connected_stream[anotherDevice]) &&\n        (btif_a2dp_get_stream_state(\n             app_bt_device.a2dp_connected_stream[anotherDevice]) ==\n         BTIF_AVDTP_STRM_STATE_STREAMING)) {\n      if (bt_media_is_media_active_by_device(BT_STREAM_SBC, anotherDevice) ==\n          1) {\n        a2dp_set_cur_stream(anotherDevice);\n        app_bt_device.a2dp_play_pause_flag = 1;\n      } else {\n        a2dp_set_cur_stream(anotherDevice);\n        app_bt_device.a2dp_play_pause_flag = 1;\n        app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n                                      BT_STREAM_SBC, anotherDevice, 0);\n      }\n    } else {\n      app_bt_device.a2dp_play_pause_flag = 0;\n      app_a2dp_hold_mute();\n    }\n#else\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n    if (app_bt_device.src_or_snk == BT_DEVICE_SNK) {\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                    BT_DEVICE_ID_1, MAX_RECORD_NUM);\n    } else {\n      TRACE(0, \"::APP_A2DP_SOURCE SUSPEND \\n\");\n#if defined(APP_LINEIN_A2DP_SOURCE)\n      app_audio_sendrequest(APP_A2DP_SOURCE_LINEIN_AUDIO,\n                            (uint8_t)APP_BT_SETTING_CLOSE, 0);\n#else\n      app_audio_sendrequest(APP_A2DP_SOURCE_I2S_AUDIO,\n                            (uint8_t)APP_BT_SETTING_CLOSE, 0);\n#endif\n      app_bt_device.input_onoff = 0;\n    }\n#else\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                  BT_DEVICE_ID_1, MAX_RECORD_NUM);\n#endif\n    app_bt_device.a2dp_play_pause_flag = 0;\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n    if (btapp_hfp_is_dev_sco_connected(anotherDevice)) {\n      a2dp_dual_slave_setup_during_sco(anotherDevice);\n    } else {\n      a2dp_dual_slave_handling_refresh();\n    }\n#endif\n\n#ifdef __IAG_BLE_INCLUDE__\n    app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_A2DP_ON, false);\n#endif\n\n    break;\n  case BTIF_A2DP_EVENT_STREAM_DATA_IND:\n#ifdef __AI_VOICE__\n    if (app_ai_is_to_mute_a2dp_during_ai_starting_speech()) {\n      // TRACE(0,\"app_ai_is_to_mute_a2dp_during_ai_starting_speech\");\n      break;\n    }\n#endif\n#if defined(IBRT)\n    if (a2dp_ibrt_stream_event_stream_data_ind_needskip(Stream)) {\n      header_len = btif_avdtp_parse_mediaHeader(\n          &header, (btif_a2dp_callback_parms_t *)Info, 0);\n      TRACE(2, \"::A2DP_EVENT_STREAM_DATA_IND skip seq:%d timestamp:%d\\n\",\n            header.sequenceNumber, header.timestamp);\n      break;\n    }\n#else\n    if (btif_me_get_current_mode(btif_a2dp_get_remote_device(Stream)) ==\n        BTIF_BLM_SNIFF_MODE) {\n      TRACE(0, \"::A2DP_EVENT_STREAM_DATA_IND skip\\n\");\n      break;\n    }\n#endif\n    if (detect_first_packet[stream_id_flag.id]) {\n      detect_first_packet[stream_id_flag.id] = 0;\n      avrcp_get_current_media_status(stream_id_flag.id);\n    }\n\n#ifdef __BT_ONE_BRING_TWO__\n    ////play music of curr_a2dp_stream_id\n    if (app_bt_device.curr_a2dp_stream_id == stream_id_flag.id &&\n        app_bt_device.hf_audio_state[stream_id_flag.id] ==\n            BTIF_HF_AUDIO_DISCON &&\n        app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_DISCON &&\n        app_bt_device.hfchan_callSetup[anotherDevice] ==\n            BTIF_HF_CALL_SETUP_NONE) {\n#ifdef __A2DP_AVDTP_CP__ // zadd bug fixed sony Z5 no sound\n      header_len = btif_avdtp_parse_mediaHeader(\n          &header, (btif_a2dp_callback_parms_t *)Info,\n          app_bt_device.avdtp_cp[stream_id_flag.id]);\n#else\n      header_len = btif_avdtp_parse_mediaHeader(\n          &header, (btif_a2dp_callback_parms_t *)Info, 0);\n#endif\n      if (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC) &&\n          (btif_a2dp_get_stream_state(Stream) ==\n           BTIF_AVDTP_STRM_STATE_STREAMING)) {\n#ifdef __A2DP_TIMESTAMP_PARSER__\n        if (a2dp_timestamp_parser_run(\n                header.timestamp,\n                (*(((unsigned char *)Info->p.data) + header_len)))) {\n          TRACE(0, \"::A2DP_EVENT_STREAM_DATA_IND skip frame\\n\");\n        } else\n#endif\n        {\n#if (A2DP_DECODER_VER >= 2)\n          a2dp_audio_store_packet(&header,\n                                  ((unsigned char *)Info->p.data) + header_len,\n                                  Info->len - header_len);\n#else\n          a2dp_audio_sbc_set_frame_info(\n              Info->len - header_len - 1,\n              (*(((unsigned char *)Info->p.data) + header_len)));\n#if defined(A2DP_LHDC_ON)\n          if (app_bt_device.codec_type[stream_id_flag.id] ==\n              BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n            store_sbc_buffer(((unsigned char *)Info->p.data) + header_len,\n                             Info->len - header_len);\n          } else\n#endif\n#if defined(A2DP_AAC_ON)\n              if (app_bt_device.codec_type[stream_id_flag.id] ==\n                  BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n#ifdef BT_USB_AUDIO_DUAL_MODE\n            if (btusb_is_bt_mode())\n#endif\n            {\n              store_sbc_buffer(((unsigned char *)Info->p.data) + header_len,\n                               Info->len - header_len);\n            }\n          } else\n#endif\n#if defined(A2DP_SCALABLE_ON)\n              if (app_bt_device.codec_type[stream_id_flag.id] ==\n                  BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n            store_sbc_buffer(((unsigned char *)Info->p.data) + header_len,\n                             Info->len - header_len);\n          } else\n#endif\n          {\n            store_sbc_buffer(((unsigned char *)Info->p.data) + header_len + 1,\n                             Info->len - header_len - 1);\n          }\n#endif\n        }\n      }\n    }\n#else\n#ifdef __A2DP_AVDTP_CP__ // zadd bug fixed sony Z5 no sound\n    header_len = btif_avdtp_parse_mediaHeader(\n        &header, (btif_a2dp_callback_parms_t *)Info,\n        app_bt_device.avdtp_cp[stream_id_flag.id]);\n#else\n    header_len = btif_avdtp_parse_mediaHeader(\n        &header, (btif_a2dp_callback_parms_t *)Info, 0);\n#endif\n    if (\n#if (A2DP_DECODER_VER < 2)\n        app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC) &&\n#endif\n        (btif_a2dp_get_stream_state(Stream) ==\n         BTIF_AVDTP_STRM_STATE_STREAMING)) {\n#ifdef __A2DP_TIMESTAMP_PARSER__\n      if (a2dp_timestamp_parser_run(\n              header.timestamp,\n              (*(((unsigned char *)Info->p.data) + header_len)))) {\n        TRACE(0, \"::A2DP_EVENT_STREAM_DATA_IND skip frame\\n\");\n      } else\n#endif\n      {\n#if (A2DP_DECODER_VER >= 2)\n        a2dp_audio_store_packet(&header,\n                                ((unsigned char *)Info->p.data) + header_len,\n                                Info->len - header_len);\n#else\n        a2dp_audio_sbc_set_frame_info(\n            Info->len - header_len - 1,\n            (*(((unsigned char *)Info->p.data) + header_len)));\n\n        current_codec_type = a2dp_get_current_codec_type(\n            (unsigned char *)Info->p.configReq->codec.elements);\n#if defined(A2DP_AAC_ON)\n        // TRACE(4,\"%s:%d pt 0x%x, app_bt_device.codec_type[stream_id_flag.id]\n        // %d\\n\",\n        //      __func__, __LINE__, header.payloadType,\n        //      app_bt_device.codec_type[stream_id_flag.id]);\n        if (app_bt_device.codec_type[stream_id_flag.id] ==\n            BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n          store_sbc_buffer(((unsigned char *)Info->p.data) + header_len,\n                           Info->len - header_len);\n        } else\n#endif\n#if defined(A2DP_SCALABLE_ON)\n            if (app_bt_device.codec_type[stream_id_flag.id] ==\n                BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n          store_sbc_buffer(((unsigned char *)Info->p.data) + header_len,\n                           Info->len - header_len);\n        } else\n#endif\n#if defined(A2DP_LHDC_ON)\n            if (app_bt_device.codec_type[stream_id_flag.id] ==\n                BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n          store_sbc_buffer(((unsigned char *)Info->p.data) + header_len,\n                           Info->len - header_len);\n        } else\n#endif\n#if defined(A2DP_LDAC_ON)\n            if (app_bt_device.codec_type[stream_id_flag.id] ==\n                BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n          // if((((unsigned char *)Info->p.data) + header_len))\n          store_sbc_buffer(((unsigned char *)Info->p.data) + header_len + 1,\n                           Info->len - header_len - 1);\n        } else\n#endif\n\n          store_sbc_buffer(((unsigned char *)Info->p.data) + header_len + 1,\n                           Info->len - header_len - 1);\n#endif\n      }\n    } else {\n      TRACE(2,\n            \"::A2DP_EVENT_STREAM_DATA_IND skip \"\n            \"app_bt_stream_isrun=%d,stream_state=%d\",\n            app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC),\n            btif_a2dp_get_stream_state(Stream));\n    }\n#endif\n    break;\n  case BTIF_A2DP_EVENT_STREAM_CLOSED:\n    if (bt_drv_func_cb->bt_switch_agc != NULL) {\n      bt_drv_func_cb->bt_switch_agc(BT_IDLE_MODE);\n    }\n    TRACE(2, \"::A2DP_EVENT_STREAM_CLOSED stream_id:%d, reason = %x\\n\",\n          stream_id_flag.id, Info->discReason);\n    if (btif_a2dp_is_disconnected(\n            app_bt_device.a2dp_connected_stream[stream_id_flag.id])) {\n      // disconnect avrcp also when a2dp closed\n      btif_avrcp_disconnect(\n          app_bt_device.avrcp_channel[stream_id_flag.id]->avrcp_channel_handle);\n    }\n#ifdef __A2DP_AVDTP_CP__\n    app_bt_device.avdtp_cp[stream_id_flag.id] = 0;\n#endif\n    a2dp_timestamp_parser_init();\n    app_bt_device.a2dp_streamming[stream_id_flag.id] = 0;\n#ifdef __BT_ONE_BRING_TWO__\n    if (app_bt_is_to_resume_music_player(stream_id_flag.id)) {\n      app_bt_reset_music_player_resume_state();\n    }\n#endif\n    if (distinguish_found_id != BT_DEVICE_NUM) {\n#ifdef __BT_ONE_BRING_TWO__\n      TRACE(3, \"found_id=%d state[0]/[1] = %d %d\", distinguish_found_id,\n            app_bt_device.a2dp_state[BT_DEVICE_ID_1],\n            app_bt_device.a2dp_state[BT_DEVICE_ID_2]);\n      //            app_bt_device.curr_a2dp_stream_id = anotherDevice;\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                    stream_id_flag.id, 0);\n      if ((app_bt_device.a2dp_connected_stream[anotherDevice]) &&\n          (btif_a2dp_get_stream_state(\n               app_bt_device.a2dp_connected_stream[anotherDevice]) ==\n           BTIF_AVDTP_STRM_STATE_STREAMING)) {\n        if (bt_media_is_media_active_by_device(BT_STREAM_SBC, anotherDevice) ==\n            1) {\n          a2dp_set_cur_stream(anotherDevice);\n          app_bt_device.a2dp_play_pause_flag = 1;\n        } else {\n          a2dp_set_cur_stream(anotherDevice);\n          app_bt_device.a2dp_play_pause_flag = 1;\n          app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n                                        BT_STREAM_SBC, anotherDevice, 0);\n        }\n      } else {\n        app_bt_device.a2dp_play_pause_flag = 0;\n        app_a2dp_hold_mute();\n      }\n#else\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n      if (app_bt_device.src_or_snk == BT_DEVICE_SRC) {\n        if (app_bt_device.input_onoff != 0) {\n#if defined(APP_LINEIN_A2DP_SOURCE)\n          app_audio_sendrequest(APP_A2DP_SOURCE_LINEIN_AUDIO,\n                                (uint8_t)APP_BT_SETTING_CLOSE, 0);\n#else\n          app_audio_sendrequest(APP_A2DP_SOURCE_I2S_AUDIO,\n                                (uint8_t)APP_BT_SETTING_CLOSE, 0);\n#endif\n          app_bt_device.input_onoff = 0;\n        }\n        app_bt_device.a2dp_streamming[BT_DEVICE_ID_1] = 0;\n        a2dp_source_notify_send();\n      } else {\n        app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                      stream_id_flag.id, 0);\n        app_bt_profile_connect_manager_a2dp(stream_id_flag.id, Stream,\n                                            (a2dp_callback_parms_t *)Info);\n      }\n#else\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                    stream_id_flag.id, 0);\n      app_bt_device.a2dp_play_pause_flag = 0;\n#endif\n\n#endif\n\n      app_bt_device.a2dp_state[stream_id_flag.id] = 0;\n      app_bt_device.a2dp_connected_stream[stream_id_flag.id] = NULL;\n#ifdef __BT_ONE_BRING_TWO__\n      /// a2dp disconnect so check the other stream is playing or not\n      if ((app_bt_device.a2dp_connected_stream[anotherDevice]) &&\n          (btif_a2dp_get_stream_state(\n               app_bt_device.a2dp_connected_stream[anotherDevice]) !=\n           BTIF_AVDTP_STRM_STATE_STREAMING)) {\n        app_bt_device.a2dp_play_pause_flag = 0;\n        app_a2dp_hold_mute();\n      }\n#endif\n    }\n\n#ifdef __BT_ONE_BRING_TWO__\n    a2dp_dual_slave_handling_refresh();\n#endif\n    app_bt_profile_connect_manager_a2dp(stream_id_flag.id, Stream, info);\n#if defined(IBRT)\n    a2dp_ibrt_session_reset();\n#endif\n    break;\n#if defined(__BTIF_BT_RECONNECT__)\n  case BTIF_A2DP_EVENT_CODEC_INFO:\n    TRACE(1, \"::A2DP_EVENT_CODEC_INFO %d\\n\", Info->event);\n    setconfig_codec.codecType = Info->p.codec->codecType;\n    setconfig_codec.discoverable = Info->p.codec->discoverable;\n    setconfig_codec.elemLen = Info->p.codec->elemLen;\n    setconfig_codec.elements = tmp_element;\n    memset(tmp_element, 0, sizeof(tmp_element));\n\n    DUMP8(\"%02x \", (setconfig_codec.elements), 8);\n    if (Info->p.codec->codecType == BTIF_AVDTP_CODEC_TYPE_SBC) {\n      setconfig_codec.elements[0] =\n          (Info->p.codec->elements[0]) & (a2dp_codec_elements[0]);\n      setconfig_codec.elements[1] =\n          (Info->p.codec->elements[1]) & (a2dp_codec_elements[1]);\n\n      if (Info->p.codec->elements[2] <= a2dp_codec_elements[2])\n        setconfig_codec.elements[2] =\n            a2dp_codec_elements[2]; ////[2]:MIN_BITPOOL\n      else\n        setconfig_codec.elements[2] = Info->p.codec->elements[2];\n\n      if (Info->p.codec->elements[3] >= a2dp_codec_elements[3])\n        setconfig_codec.elements[3] =\n            a2dp_codec_elements[3]; ////[3]:MAX_BITPOOL\n      else\n        setconfig_codec.elements[3] = Info->p.codec->elements[3];\n\n      ///////null set situation:\n      if (setconfig_codec.elements[3] < a2dp_codec_elements[2]) {\n        setconfig_codec.elements[2] = a2dp_codec_elements[2];\n        setconfig_codec.elements[3] = a2dp_codec_elements[3];\n      } else if (setconfig_codec.elements[2] > a2dp_codec_elements[3]) {\n        setconfig_codec.elements[2] = a2dp_codec_elements[3];\n        setconfig_codec.elements[3] = a2dp_codec_elements[3];\n      }\n      TRACE(\n          2,\n          \"!!!setconfig_codec.elements[2]:%d,setconfig_codec.elements[3]:%d\\n\",\n          setconfig_codec.elements[2], setconfig_codec.elements[3]);\n\n      setconfig_codec.elements[0] =\n          get_valid_bit(setconfig_codec.elements[0], A2D_SBC_IE_SAMP_FREQ_MSK);\n      setconfig_codec.elements[0] =\n          get_valid_bit(setconfig_codec.elements[0], A2D_SBC_IE_CH_MD_MSK);\n      setconfig_codec.elements[1] =\n          get_valid_bit(setconfig_codec.elements[1], A2D_SBC_IE_BLOCKS_MSK);\n      setconfig_codec.elements[1] =\n          get_valid_bit(setconfig_codec.elements[1], A2D_SBC_IE_SUBBAND_MSK);\n      setconfig_codec.elements[1] =\n          get_valid_bit(setconfig_codec.elements[1], A2D_SBC_IE_ALLOC_MD_MSK);\n    }\n#if defined(A2DP_AAC_ON)\n    else if (Info->p.codec->codecType == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n      setconfig_codec.elements[0] = a2dp_codec_aac_elements[0];\n      if (Info->p.codec->elements[1] & A2DP_AAC_OCTET1_SAMPLING_FREQUENCY_44100)\n        setconfig_codec.elements[1] |= A2DP_AAC_OCTET1_SAMPLING_FREQUENCY_44100;\n      else if (Info->p.codec->elements[2] &\n               A2DP_AAC_OCTET2_SAMPLING_FREQUENCY_48000)\n        setconfig_codec.elements[2] |= A2DP_AAC_OCTET2_SAMPLING_FREQUENCY_48000;\n\n      if (Info->p.codec->elements[2] & A2DP_AAC_OCTET2_CHANNELS_2)\n        setconfig_codec.elements[2] |= A2DP_AAC_OCTET2_CHANNELS_2;\n      else if (Info->p.codec->elements[2] & A2DP_AAC_OCTET2_CHANNELS_1)\n        setconfig_codec.elements[2] |= A2DP_AAC_OCTET2_CHANNELS_1;\n\n      setconfig_codec.elements[3] =\n          (Info->p.codec->elements[3]) & A2DP_AAC_OCTET3_VBR_SUPPORTED;\n      if (((Info->p.codec->elements[3]) & A2DP_AAC_OCTET3_VBR_SUPPORTED) &&\n          (((a2dp_codec_aac_elements[3]) & A2DP_AAC_OCTET3_VBR_SUPPORTED) ==\n           0)) {\n        Info->error = BTIF_A2DP_ERR_NOT_SUPPORTED_VBR;\n        TRACE(0, \"setconfig: VBR  UNSUPPORTED!!!!!!\");\n      }\n\n      uint32_t bit_rate = 0;\n      bit_rate = ((Info->p.codec->elements[3]) & 0x7f) << 16;\n      bit_rate |= (Info->p.codec->elements[4]) << 8;\n      bit_rate |= (Info->p.codec->elements[5]);\n      TRACE(1, \"bit_rate = %d\", bit_rate);\n      if (bit_rate == 0) {\n        bit_rate = MAX_AAC_BITRATE;\n      } else if (bit_rate > MAX_AAC_BITRATE) {\n        bit_rate = MAX_AAC_BITRATE;\n      }\n\n      setconfig_codec.elements[3] |= (bit_rate >> 16) & 0x7f;\n      setconfig_codec.elements[4] = (bit_rate >> 8) & 0xff;\n      setconfig_codec.elements[5] = bit_rate & 0xff;\n    }\n#endif\n    else if (Info->p.codec->codecType == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n#if defined(A2DP_SCALABLE_ON)\n      // 0x75 0x00 0x00 0x00Vid\n      // 0x03 0x01   Codec id\n      if (Info->p.codec->elements[0] == 0x75 &&\n          Info->p.codec->elements[1] == 0x00 &&\n          Info->p.codec->elements[2] == 0x00 &&\n          Info->p.codec->elements[3] == 0x00 &&\n          Info->p.codec->elements[4] == 0x03 &&\n          Info->p.codec->elements[5] == 0x01) {\n        memcpy(&setconfig_codec.elements[0], &a2dp_codec_scalable_elements[0],\n               6);\n        DUMP8(\"%02x \", (setconfig_codec.elements), 8);\n        DUMP8(\"%02x \", &(Info->p.codec->elements[0]), 8);\n        setconfig_codec.elements[6] = 0x00;\n        // Audio format setting\n#if defined(A2DP_SCALABLE_UHQ_SUPPORT)\n        if (Info->p.codec->elements[6] & A2DP_SCALABLE_SR_96000) {\n          setconfig_codec.elements[6] |= A2DP_SCALABLE_SR_96000;\n        }\n#endif\n        if (Info->p.codec->elements[6] & A2DP_SCALABLE_SR_32000) {\n          setconfig_codec.elements[6] |= A2DP_SCALABLE_SR_32000;\n        } else if (Info->p.codec->elements[6] & A2DP_SCALABLE_SR_44100) {\n          setconfig_codec.elements[6] |= A2DP_SCALABLE_SR_44100;\n        } else if (Info->p.codec->elements[6] & A2DP_SCALABLE_SR_48000) {\n          setconfig_codec.elements[6] |= A2DP_SCALABLE_SR_48000;\n        }\n\n        if (Info->p.codec->elements[6] & A2DP_SCALABLE_HQ) {\n          setconfig_codec.elements[6] |= A2DP_SCALABLE_HQ;\n        }\n        DUMP8(\"0x%02x \", setconfig_codec.elements, setconfig_codec.elemLen);\n      }\n#endif\n\n#if defined(A2DP_LHDC_ON)\n      // 0x3A 0x05 0x00 0x00Vid\n      // 0x33 0x4c   Codec id V3\n      // 0x32 0x4c   Codec id V2\n      if (Info->p.codec->elements[0] == a2dp_codec_lhdc_elements[0] &&\n          Info->p.codec->elements[1] == a2dp_codec_lhdc_elements[1] &&\n          Info->p.codec->elements[2] == a2dp_codec_lhdc_elements[2] &&\n          Info->p.codec->elements[3] == a2dp_codec_lhdc_elements[3] &&\n          Info->p.codec->elements[4] == a2dp_codec_lhdc_elements[4] &&\n          Info->p.codec->elements[5] == a2dp_codec_lhdc_elements[5]) {\n        memcpy(&setconfig_codec.elements[0], &a2dp_codec_lhdc_elements[0], 6);\n        DUMP8(\"%02x \", (setconfig_codec.elements), 8);\n        DUMP8(\"%02x \", &(Info->p.codec->elements[0]), 8);\n\n        // Audio format setting\n        //(A2DP_LHDC_SR_96000|A2DP_LHDC_SR_48000 |A2DP_LHDC_SR_44100) |\n        //(A2DP_LHDC_FMT_16),\n        if (Info->p.codec->elements[6] & A2DP_LHDC_SR_96000) {\n          setconfig_codec.elements[6] |= A2DP_LHDC_SR_96000;\n        } else if (Info->p.codec->elements[6] & A2DP_LHDC_SR_48000) {\n          setconfig_codec.elements[6] |= A2DP_LHDC_SR_48000;\n        } else if (Info->p.codec->elements[6] & A2DP_LHDC_SR_44100) {\n          setconfig_codec.elements[6] |= A2DP_LHDC_SR_44100;\n        }\n\n        if (Info->p.codec->elements[6] & A2DP_LHDC_FMT_16) {\n          setconfig_codec.elements[6] |= A2DP_LHDC_FMT_16;\n        } else if (Info->p.codec->elements[6] & A2DP_LHDC_FMT_24) {\n          setconfig_codec.elements[6] |= A2DP_LHDC_FMT_24;\n        }\n      }\n#endif\n\n#if defined(A2DP_LDAC_ON)\n      //                0x2d, 0x01, 0x00, 0x00, //Vendor ID\n      //                0xaa, 0x00,     //Codec ID\n      if (Info->p.codec->elements[0] == a2dp_codec_ldac_elements[0] &&\n          Info->p.codec->elements[1] == a2dp_codec_ldac_elements[1] &&\n          Info->p.codec->elements[2] == a2dp_codec_ldac_elements[2] &&\n          Info->p.codec->elements[3] == a2dp_codec_ldac_elements[3] &&\n          Info->p.codec->elements[4] == a2dp_codec_ldac_elements[4] &&\n          Info->p.codec->elements[5] == a2dp_codec_ldac_elements[5]) {\n        memcpy(&setconfig_codec.elements[0], &a2dp_codec_ldac_elements[0], 6);\n\n        DUMP8(\"%02x \", (setconfig_codec.elements), 8);\n        DUMP8(\"%02x \", &(Info->p.codec->elements[0]), 8);\n        // Audio format setting\n        // 3c 03\n        // 34 07\n        if (Info->p.codec->elements[6] & A2DP_LDAC_SR_96000) {\n          setconfig_codec.elements[6] |= A2DP_LDAC_SR_96000;\n        } else if (Info->p.codec->elements[6] & A2DP_LDAC_SR_88200) {\n          setconfig_codec.elements[6] |= A2DP_LDAC_SR_88200;\n        } else if (Info->p.codec->elements[6] & A2DP_LDAC_SR_48000) {\n          setconfig_codec.elements[6] |= A2DP_LDAC_SR_48000;\n        } else if (Info->p.codec->elements[6] & A2DP_LDAC_SR_44100) {\n          setconfig_codec.elements[6] |= A2DP_LDAC_SR_44100;\n        }\n        //              }else if (Info->p.codec->elements[6] &\n        //              A2DP_LDAC_SR_88200) {\n        //                  setconfig_codec.elements[6] |= A2DP_LDAC_SR_88200;\n        //              }\n\n        if (Info->p.codec->elements[7] & A2DP_LDAC_CM_MONO) {\n          setconfig_codec.elements[7] |= A2DP_LDAC_CM_MONO;\n        } else if (Info->p.codec->elements[7] & A2DP_LDAC_CM_DUAL) {\n          setconfig_codec.elements[7] |= A2DP_LDAC_CM_DUAL;\n        } else if (Info->p.codec->elements[7] & A2DP_LDAC_CM_STEREO) {\n          setconfig_codec.elements[7] |= A2DP_LDAC_CM_STEREO;\n        }\n\n        TRACE(1, \"setconfig_codec.elemLen = %d\", setconfig_codec.elemLen);\n        TRACE(1, \"setconfig_codec.elements[7] = 0x%02x\",\n              setconfig_codec.elements[7]);\n\n        DUMP8(\"%02x \", (setconfig_codec.elements), 8);\n      }\n#endif\n    }\n    break;\n\n  case BTIF_A2DP_EVENT_GET_CONFIG_IND:\n    TRACE(1, \"::A2DP_EVENT_GET_CONFIG_IND %d\\n\", Info->event);\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n    // I2S or LineIn for 44.1K\n    setconfig_codec.elements[0] =\n        (setconfig_codec.elements[0] & 0xef) | A2D_SBC_IE_SAMP_FREQ_44;\n#endif\n#ifdef __A2DP_AVDTP_CP__\n    if (Info->p.capability->type & BTIF_AVDTP_SRV_CAT_CONTENT_PROTECTION ||\n        Info->p.cp->cpType != 0) {\n      TRACE(0, \"support CONTENT_PROTECTION\\n\");\n      btif_a2dp_set_stream_config(Stream, &setconfig_codec,\n                                  &setconfig_cp[stream_id_flag.id]);\n    } else {\n      TRACE(0, \"no CONTENT_PROTECTION\\n\");\n      btif_a2dp_set_stream_config(Stream, &setconfig_codec, NULL);\n    }\n#else\n    btif_a2dp_set_stream_config(Stream, &setconfig_codec, NULL);\n#endif\n    break;\n  case BTIF_A2DP_EVENT_STREAM_RECONFIG_IND:\n    TRACE(1, \"::A2DP_EVENT_STREAM_RECONFIG_IND %d\\n\", Info->event);\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n    SOURCE_DBLOG(\"::BTIF_A2DP_EVENT_STREAM_RECONFIG_IND %d\\n\", Info->event);\n#else\n\n    if (Info->p.configReq->codec.codecType == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      current_codec_type = a2dp_get_current_codec_type(\n          (unsigned char *)Info->p.configReq->codec.elements);\n#if defined(A2DP_SCALABLE_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n        TRACE(0, \"::##SCALABLE A2DP_EVENT_STREAM_RECONFIG_IND\\n\");\n        a2dp_scalable_config(&(Info->p.configReq->codec.elements[0]));\n      }\n#endif\n#if defined(A2DP_LHDC_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_LHDC) {\n        TRACE(0, \"::##LHDC A2DP_EVENT_STREAM_RECONFIG_IND\\n\");\n        a2dp_lhdc_config(&(Info->p.configReq->codec.elements[0]));\n      }\n#endif\n#if defined(A2DP_LDAC_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_LDAC) {\n        TRACE(0, \"::##LDAC A2DP_EVENT_STREAM_RECONFIG_IND\\n\");\n        a2dp_ldac_config(&(Info->p.configReq->codec.elements[0]));\n      }\n#endif\n    }\n\n#if defined(A2DP_AAC_ON)\n    if (Info->p.configReq->codec.codecType ==\n        BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n      TRACE(0, \"::##AAC A2DP_EVENT_STREAM_RECONFIG_IND\\n\");\n      if (((Info->p.codec->elements[3]) & A2DP_AAC_OCTET3_VBR_SUPPORTED) &&\n          (((a2dp_codec_aac_elements[3]) & A2DP_AAC_OCTET3_VBR_SUPPORTED) ==\n           0)) {\n        Info->error = BTIF_A2DP_ERR_NOT_SUPPORTED_VBR;\n        btif_a2dp_reconfig_stream_rsp(Stream, BTIF_A2DP_ERR_NOT_SUPPORTED_VBR,\n                                      0);\n        TRACE(0, \"stream reconfig: VBR  UNSUPPORTED!!!!!!\");\n        break;\n      }\n    }\n#endif\n    if (Info->p.configReq->codec.codecType == BTIF_AVDTP_CODEC_TYPE_SBC) {\n      TRACE(0, \"::##SBC A2DP_EVENT_STREAM_RECONFIG_IND\\n\");\n      TRACE(\n          5,\n          \"app_bt_device.sample_rate::elements[0] %d BITPOOL:%d/%d %02x/%02x\\n\",\n          Info->p.configReq->codec.elements[0],\n          Info->p.configReq->codec.elements[2],\n          Info->p.configReq->codec.elements[3],\n          Info->p.configReq->codec.elements[2],\n          Info->p.configReq->codec.elements[3]);\n    }\n#endif\n    btif_a2dp_reconfig_stream_rsp(Stream, BTIF_A2DP_ERR_NO_ERROR, 0);\n    break;\n  case BTIF_A2DP_EVENT_STREAM_RECONFIG_CNF:\n    TRACE(3, \"::A2DP_EVENT_STREAM_RECONFIG_CNF %d,sample rate=%x,%x\\n\",\n          Info->event, btif_a2dp_get_stream_codecCfg(Stream)->elements[0],\n          Info->p.codec->elements[0]);\n\n#if defined(A2DP_AAC_ON)\n    if (Info->p.configReq->codec.codecType ==\n        BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n#ifdef __A2DP_AVDTP_CP__\n      btif_a2dp_security_control_req(\n          Stream, (U8 *)&a2dp_avdtpCp_aac_securityData[stream_id_flag.id][0],\n          1);\n#endif\n      TRACE(2,\n            \"::A2DP_EVENT_STREAM_OPEN stream_id:%d, aac sample_rate \"\n            \"codec.elements 0x%x\\n\",\n            stream_id_flag.id, Info->p.configReq->codec.elements[1]);\n      app_bt_device.codec_type[stream_id_flag.id] =\n          BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC;\n      app_bt_device.sample_bit[stream_id_flag.id] = 16;\n      // convert aac sample_rate to sbc sample_rate format\n      if (Info->p.configReq->codec.elements[1] &\n          A2DP_AAC_OCTET1_SAMPLING_FREQUENCY_44100) {\n        TRACE(1,\n              \"::A2DP_EVENT_STREAM_OPEN stream_id:%d, aac sample_rate 44100\\n\",\n              stream_id_flag.id);\n        app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_44;\n      } else if (Info->p.configReq->codec.elements[2] &\n                 A2DP_AAC_OCTET2_SAMPLING_FREQUENCY_48000) {\n        TRACE(1,\n              \"::A2DP_EVENT_STREAM_OPEN stream_id:%d, aac sample_rate 48000\\n\",\n              stream_id_flag.id);\n        app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_48;\n      } else {\n        TRACE(1,\n              \"::A2DP_EVENT_STREAM_OPEN stream_id:%d, aac sample_rate not \"\n              \"48000 or 44100, set to 44100\\n\",\n              stream_id_flag.id);\n        app_bt_device.sample_rate[stream_id_flag.id] = A2D_SBC_IE_SAMP_FREQ_44;\n      }\n\n      if (Info->p.configReq->codec.elements[2] & A2DP_AAC_OCTET2_CHANNELS_1) {\n        a2dp_channel_num[stream_id_flag.id] = 1;\n      } else {\n        a2dp_channel_num[stream_id_flag.id] = 2;\n      }\n    } else\n#endif\n        if (Info->p.configReq->codec.codecType ==\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      current_codec_type = a2dp_get_current_codec_type(\n          (unsigned char *)Info->p.configReq->codec.elements);\n#if defined(A2DP_SCALABLE_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n        TRACE(0, \"##codecType scalable\\n\");\n        a2dp_scalable_config(&(Info->p.configReq->codec.elements[0]));\n        app_bt_device.codec_type[stream_id_flag.id] =\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n        // 0x75 0x00 0x00 0x00Vid\n        // 0x03 0x01   Codec id\n        if (Info->p.codec->elements[0] == 0x75 &&\n            Info->p.codec->elements[4] == 0x03 &&\n            Info->p.codec->elements[5] == 0x01) {\n          setconfig_codec.elements = a2dp_scalable_avdtpcodec.elements;\n        } else {\n          if (Info->p.codec->pstreamflags != NULL)\n            Info->p.codec->pstreamflags[0] &= ~APP_A2DP_STRM_FLAG_QUERY_CODEC;\n          else {\n            ASSERT(false, \"pstreamflags not init ..\");\n          }\n        }\n\n        a2dp_channel_num[stream_id_flag.id] = 2;\n      }\n#endif\n#if defined(A2DP_LHDC_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_LHDC) {\n        TRACE(2,\n              \"##codecType: LHDC Codec, Element length = %d, \"\n              \"AVDTP_MAX_CODEC_ELEM_SIZE = %d\\n\",\n              Info->p.configReq->codec.elemLen, BTIF_AVDTP_MAX_CODEC_ELEM_SIZE);\n        app_bt_device.codec_type[stream_id_flag.id] =\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n        a2dp_channel_num[stream_id_flag.id] = 2;\n        a2dp_lhdc_config(&(Info->p.configReq->codec.elements[0]));\n      }\n#endif\n#if defined(A2DP_LDAC_ON)\n      if (current_codec_type == A2DP_NON_CODEC_TYPE_LDAC) {\n        TRACE(2,\n              \"##codecType: LDAC Codec, Element length = %d, \"\n              \"AVDTP_MAX_CODEC_ELEM_SIZE = %d\\n\",\n              Info->p.configReq->codec.elemLen, BTIF_AVDTP_MAX_CODEC_ELEM_SIZE);\n        app_bt_device.codec_type[stream_id_flag.id] =\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n        a2dp_channel_num[stream_id_flag.id] = 2;\n        a2dp_ldac_config(&(Info->p.configReq->codec.elements[0]));\n      }\n#endif\n    } else\n\n    {\n      TRACE(\n          5,\n          \"app_bt_device.sample_rate::elements[0] %d BITPOOL:%d/%d %02x/%02x\\n\",\n          Info->p.codec->elements[0], Info->p.codec->elements[2],\n          Info->p.codec->elements[3], Info->p.codec->elements[2],\n          Info->p.codec->elements[3]);\n\n      app_bt_device.codec_type[stream_id_flag.id] = BTIF_AVDTP_CODEC_TYPE_SBC;\n      app_bt_device.sample_bit[stream_id_flag.id] = 16;\n      app_bt_device.sample_rate[stream_id_flag.id] =\n          (Info->p.configReq->codec.elements[0] & A2D_SBC_IE_SAMP_FREQ_MSK);\n\n      if (Info->p.configReq->codec.elements[0] & A2D_SBC_IE_CH_MD_MONO)\n        a2dp_channel_num[stream_id_flag.id] = 1;\n      else\n        a2dp_channel_num[stream_id_flag.id] = 2;\n    }\n#ifdef __A2DP_AVDTP_CP__\n    if (Info->p.configReq->cp.cpType == BTIF_AVDTP_CP_TYPE_SCMS_T) {\n      app_bt_device.avdtp_cp[stream_id_flag.id] = 1;\n    }\n#endif\n#endif\n    if (btif_a2dp_is_stream_device_has_delay_reporting(Stream)) {\n      btif_a2dp_set_sink_delay(Stream, 150);\n    }\n    break;\n#ifdef __A2DP_AVDTP_CP__\n  case BTIF_A2DP_EVENT_CP_INFO:\n    TRACE(2, \"::A2DP_EVENT_CP_INFO %d cpType: %x\\n\", Info->event,\n          Info->p.cp->cpType);\n    setconfig_cp[stream_id_flag.id].cpType = Info->p.cp->cpType;\n    setconfig_cp[stream_id_flag.id].data = Info->p.cp->data;\n    setconfig_cp[stream_id_flag.id].dataLen = Info->p.cp->dataLen;\n    if (Info->p.cp && Info->p.cp->cpType == BTIF_AVDTP_CP_TYPE_SCMS_T) {\n      app_bt_device.avdtp_cp[stream_id_flag.id] = 1;\n    } else {\n      app_bt_device.avdtp_cp[stream_id_flag.id] = 0;\n    }\n    btif_a2dp_set_copy_protection_enable(\n        Stream, app_bt_device.avdtp_cp[stream_id_flag.id]);\n    break;\n  case BTIF_A2DP_EVENT_STREAM_SECURITY_IND:\n    TRACE(1, \"::A2DP_EVENT_STREAM_SECURITY_IND %d\\n\", Info->event);\n    DUMP8(\"%x \", Info->p.data, Info->len);\n    btif_a2dp_security_control_rsp(Stream, &Info->p.data[1], Info->len - 1,\n                                   Info->error);\n    break;\n  case BTIF_A2DP_EVENT_STREAM_SECURITY_CNF:\n    app_bt_device.avdtp_cp[stream_id_flag.id] = 1;\n    TRACE(1, \"::A2DP_EVENT_STREAM_SECURITY_CNF %d\\n\", Info->event);\n    break;\n#endif\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n  case BTIF_A2DP_EVENT_STREAM_SBC_PACKET_SENT:\n    // TRACE(0,\"@sbc be send succ\");\n    if (app_bt_device.src_or_snk == BT_DEVICE_SRC) {\n      a2dp_source_notify_send();\n    }\n    break;\n#endif\n  }\n#if defined(IBRT)\n  app_tws_ibrt_profile_callback(BTIF_APP_A2DP_PROFILE_ID, (void *)Stream,\n                                (void *)info);\n#endif\n}\n\nvoid a2dp_suspend_music_force(void) {\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                BT_DEVICE_ID_1, 0);\n#ifdef __BT_ONE_BRING_TWO__\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                BT_DEVICE_ID_2, 0);\n#endif\n}\n\nint a2dp_volume_get(enum BT_DEVICE_ID_T id) {\n  int vol = TGT_VOLUME_LEVEL_15;\n\n  btif_remote_device_t *remDev = NULL;\n  nvrec_btdevicerecord *record = NULL;\n\n  if (id >= BT_DEVICE_NUM) {\n    TRACE(2, \"%s error id %d\", __func__, id);\n  }\n\n  remDev = btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[id]);\n  if (remDev && !nv_record_btdevicerecord_find(\n                    btif_me_get_remote_device_bdaddr(remDev), &record)) {\n    vol = record->device_vol.a2dp_vol;\n  } else if (app_audio_manager_a2dp_is_active(id)) {\n    vol = app_bt_stream_a2dpvolume_get();\n  } else {\n    vol = TGT_VOLUME_LEVEL_15;\n  }\n\n  if (vol == TGT_VOLUME_LEVEL_MUTE) {\n    vol = 0;\n  } else {\n    if (vol >= TGT_VOLUME_LEVEL_15) {\n      vol = TGT_VOLUME_LEVEL_15;\n    } else if (vol <= TGT_VOLUME_LEVEL_0) {\n      vol = TGT_VOLUME_LEVEL_0;\n    }\n    vol = 8 * (vol - 1);\n  }\n\n  if (vol > 0x7f)\n    vol = 0x7f;\n\n  // TRACE(2,\"get vol raw:%d %d/127\", app_bt_stream_volume_get_ptr()->a2dp_vol,\n  // vol);\n\n  return (vol);\n}\n\nvoid a2dp_volume_local_set(enum BT_DEVICE_ID_T id, int8_t vol) {\n  btif_remote_device_t *remDev = NULL;\n  nvrec_btdevicerecord *record = NULL;\n  remDev = btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[id]);\n  if (remDev) {\n    if (!nv_record_btdevicerecord_find(btif_me_get_remote_device_bdaddr(remDev),\n                                       &record)) {\n      nv_record_btdevicerecord_set_a2dp_vol(record, vol);\n    }\n  }\n\n  if (app_bt_stream_volume_get_ptr()->a2dp_vol != vol) {\n#if defined(NEW_NV_RECORD_ENABLED)\n    nv_record_btdevicevolume_set_a2dp_vol(app_bt_stream_volume_get_ptr(), vol);\n#endif\n    nv_record_touch_cause_flush();\n  }\n}\n\nint a2dp_volume_set(enum BT_DEVICE_ID_T id, uint8_t vol) {\n  int dest_vol;\n\n  if (!vol) {\n    dest_vol = TGT_VOLUME_LEVEL_MUTE;\n  } else {\n    if (0x7f == vol) {\n      dest_vol = TGT_VOLUME_LEVEL_15;\n    } else {\n      dest_vol = (((int)vol & 0x7f) << 4) / 128 + 1;\n    }\n    if (dest_vol > TGT_VOLUME_LEVEL_15) {\n      dest_vol = TGT_VOLUME_LEVEL_15;\n    } else if (dest_vol < TGT_VOLUME_LEVEL_0) {\n      dest_vol = TGT_VOLUME_LEVEL_0;\n    }\n  }\n\n  a2dp_volume_local_set(id, dest_vol);\n  if (app_audio_manager_a2dp_is_active(id)) {\n    app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_SET, dest_vol);\n  }\n\n  TRACE(2, \"put vol raw:%d/127 %d\", vol, dest_vol);\n\n  return (vol);\n}\n\nbool a2dp_is_music_ongoing(void) {\n#ifdef __BT_ONE_BRING_TWO__\n  return app_bt_device.a2dp_streamming[BT_DEVICE_ID_1] ||\n         app_bt_device.a2dp_streamming[BT_DEVICE_ID_2];\n#else\n  return app_bt_device.a2dp_streamming[BT_DEVICE_ID_1];\n#endif\n}\n\nvoid btapp_a2dp_report_speak_gain(void) {\n#ifdef BTIF_AVRCP_ADVANCED_CONTROLLER\n  uint8_t i;\n  int vol;\n  btif_remote_device_t *remDev = NULL;\n  btif_link_mode_t mode = BTIF_BLM_SNIFF_MODE;\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    /*\n        TRACE(4,\"btapp_a2dp_report_speak_gain transId:%d a2dp_state:%d\n       streamming:%d report:%02x\\n\", btif_get_avrcp_adv_notify(const\n       avrcp_callback_parms_t *\n       parms)(app_bt_device.avrcp_notify_rsp[i])->transId,\n        app_bt_device.a2dp_state[i],\n        app_bt_device.a2dp_streamming[i],\n        app_bt_device.volume_report[i]);\n       */\n\n    osapi_lock_stack();\n    if ((vol_ctrl_done_flag[i] == TX_DONE_FLAG_INIT) ||\n        (vol_ctrl_done_flag[i] == TX_DONE_FLAG_SUCCESS)) {\n      remDev =\n          btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[i]);\n      if (remDev) {\n        mode = btif_me_get_current_mode(remDev);\n      } else {\n        mode = BTIF_BLM_SNIFF_MODE;\n      }\n      if ((app_bt_device.a2dp_state[i] == 1) &&\n          (app_bt_device.a2dp_streamming[i] == 1) &&\n          (app_bt_device.volume_report[i] == BTIF_AVCTP_RESPONSE_INTERIM) &&\n          (mode == BTIF_BLM_ACTIVE_MODE)) {\n        app_bt_device.volume_report[i] = BTIF_AVCTP_RESPONSE_CHANGED;\n        //  TRACE(1,\"btapp_a2dp_report_speak_gain transId:%d\\n\",\n        //  app_bt_device.avrcp_notify_rsp[i]->transId);\n        if (app_bt_device.avrcp_notify_rsp[i] != NULL) {\n\n          btif_set_app_bt_device_avrcp_notify_rsp_ctype(\n              app_bt_device.avrcp_notify_rsp[i], BTIF_AVCTP_RESPONSE_CHANGED);\n          vol = a2dp_volume_get((enum BT_DEVICE_ID_T)i);\n          btif_avrcp_ct_get_absolute_volume_rsp(\n              app_bt_device.avrcp_channel[i], app_bt_device.avrcp_notify_rsp[i],\n              vol);\n          vol_ctrl_done_flag[i] = TX_DONE_FLAG_TXING;\n          btif_avrcp_recheck_vol_ctrl_flag(vol_ctrl_done_flag + i);\n        }\n      }\n    }\n    osapi_unlock_stack();\n  }\n#endif\n}\n\nextern \"C\" bool avdtp_Get_aacEnable_Flag(btif_remote_device_t *remDev,\n                                         btif_avdtp_stream_t *strm) {\n  TRACE(2, \"%s,version=%x\", __func__,\n        btif_me_get_remote_device_version(remDev)[1]);\n#if 0 // defined(A2DP_AAC_ON)\n    if(((remDev->remoteVersion[1] == 0x0f) && (remDev->remoteVersion[2] == 0)) || strm->codec->codecType !=AVDTP_CODEC_TYPE_MPEG2_4_AAC){\n        return TRUE;\n    }else\n        return FALSE;\n#else\n  return TRUE;\n#endif\n}\n\n#ifdef __TWS__\nvoid app_AVRCP_SendCustomCmdToMobile(uint8_t *ptrData, uint32_t len) {\n  if (is_slave_tws_mode()) {\n    return;\n  }\n\n  btif_avrcp_send_custom_cmd_generic(\n      app_bt_device.avrcp_channel[BT_DEVICE_ID_1], ptrData, len);\n}\n\nvoid app_AVRCP_SendCustomCmdToTws(uint8_t *ptrData, uint32_t len) {\n  if (is_slave_tws_mode()) {\n    btif_avrcp_send_custom_cmd_generic(\n        app_bt_device.avrcp_channel[BT_DEVICE_ID_1], ptrData, len);\n  } else if (is_master_tws_mode()) {\n    btif_avrcp_channel_t *chnl =\n        btif_get_avrcp_channel(tws_get_avrcp_channel_hdl());\n    btif_avrcp_send_custom_cmd_generic(chnl, ptrData, len);\n  }\n}\n\n#endif\n\nstatic void app_AVRCP_sendCustomCmdRsp(uint8_t device_id,\n                                       btif_avrcp_channel_t *chnl,\n                                       uint8_t isAccept, uint8_t transId) {\n  if (app_bt_device.avrcp_control_rsp[device_id] == NULL) {\n    btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n        &app_bt_device.avrcp_control_rsp[device_id]);\n  }\n\n  btif_avrcp_set_control_rsp_cmd(app_bt_device.avrcp_control_rsp[device_id],\n                                 transId, BTIF_AVCTP_RESPONSE_ACCEPTED);\n\n  btif_avrcp_ct_accept_custom_cmd_rsp(\n      chnl, app_bt_device.avrcp_control_rsp[device_id], isAccept);\n}\n\nstatic void app_AVRCP_CustomCmd_Received(uint8_t *ptrData, uint32_t len) {\n  TRACE(1, \"AVRCP Custom Command Received %d bytes data:\", len);\n  DUMP8(\"0x%02x \", ptrData, len);\n}\n"
  },
  {
    "path": "services/bt_app/app_a2dp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_A2DP_H__\n#define __APP_A2DP_H__\n#include \"btapp.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#define A2DP_NON_CODEC_TYPE_NON         0\n#define A2DP_NON_CODEC_TYPE_LHDC        1\n#define A2DP_NON_CODEC_TYPE_LDAC        2\n#define A2DP_NON_CODEC_TYPE_SCALABLE    3\n\nuint8_t a2dp_get_current_codec_type(uint8_t *elements);\n\nbool a2dp_is_music_ongoing(void);\nint a2dp_volume_set(enum BT_DEVICE_ID_T id, uint8_t vol);\n#if defined(A2DP_LDAC_ON)\nvoid app_ibrt_restore_ldac_info(uint8_t sample_freq);\n#endif\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_a2dp_source.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n\n#include \"app_a2dp_source.h\"\n#include \"a2dp_api.h\"\n#include \"app_overlay.h\"\n\nuint8_t *a2dp_linein_buff;\nstatic char a2dp_transmit_buffer[A2DP_TRANS_SIZE];\n\nsbcbank_t sbcbank;\n\nA2DP_SOURCE_STRUCT a2dp_source;\n\nstatic sbcpack_t *get_sbcPacket(void) {\n  int index = sbcbank.free;\n  sbcbank.free += 1;\n  if (sbcbank.free == 1) {\n    sbcbank.free = 0;\n  }\n  return &(sbcbank.sbcpacks[index]);\n}\n\n#if 0\ntypedef struct {\n    AvrcpAdvancedPdu pdu;\n    uint8_t para_buf[10];\n}APP_A2DP_AVRCPADVANCEDPDU;\n\n\n\nextern osPoolId   app_a2dp_avrcpadvancedpdu_mempool;\n\n#define app_a2dp_avrcpadvancedpdu_mempool_init()                               \\\n  do {                                                                         \\\n    if (app_a2dp_avrcpadvancedpdu_mempool == NULL)                             \\\n      app_a2dp_avrcpadvancedpdu_mempool =                                      \\\n          osPoolCreate(osPool(app_a2dp_avrcpadvancedpdu_mempool));             \\\n  } while (0);\n\n#define app_a2dp_avrcpadvancedpdu_mempool_calloc(buf)                          \\\n  do {                                                                         \\\n    APP_A2DP_AVRCPADVANCEDPDU *avrcpadvancedpdu;                               \\\n    avrcpadvancedpdu = (APP_A2DP_AVRCPADVANCEDPDU *)osPoolCAlloc(              \\\n        app_a2dp_avrcpadvancedpdu_mempool);                                    \\\n    buf = &(avrcpadvancedpdu->pdu);                                            \\\n    buf->parms = avrcpadvancedpdu->para_buf;                                   \\\n  } while (0);\n\n#define app_a2dp_avrcpadvancedpdu_mempool_free(buf)                            \\\n  do {                                                                         \\\n    osPoolFree(app_a2dp_avrcpadvancedpdu_mempool, buf);                        \\\n  } while (0);\n\n\nvoid a2dp_source_volume_local_set(int8_t vol)\n{\n    app_bt_stream_volume_get_ptr()->a2dp_vol = vol;\n    nv_record_touch_cause_flush();\n}\n\nstatic int a2dp_volume_get(void)\n{\n    int vol = app_bt_stream_volume_get_ptr()->a2dp_vol;\n\n    vol = 8*vol-1;\n    if (vol > (0x7f-1))\n        vol = 0x7f;\n\n    return (vol);\n}\n\n\nstatic int a2dp_volume_set(U8 vol)\n{\n    int dest_vol;\n\n    dest_vol = (((int)vol&0x7f)<<4)/0x7f + 1;\n\n    if (dest_vol > TGT_VOLUME_LEVEL_15)\n        dest_vol = TGT_VOLUME_LEVEL_15;\n    if (dest_vol < TGT_VOLUME_LEVEL_0)\n        dest_vol = TGT_VOLUME_LEVEL_0;\n\n    a2dp_source_volume_local_set(dest_vol);\n    app_bt_stream_volumeset(dest_vol);\n\n    return (vol);\n}\n\n\n\nvoid avrcp_source_callback_TG(AvrcpChannel *chnl, const AvrcpCallbackParms *Parms)\n{\n    TRACE(3,\"%s : chnl %p, Parms %p,Parms->event\\n\", __FUNCTION__,chnl, Parms,Parms->event);\n\n    enum BT_DEVICE_ID_T device_id = BT_DEVICE_ID_1;\n    switch(Parms->event)\n    {\n        case AVRCP_EVENT_CONNECT:\n            if(0)//(chnl->avrcpVersion >=0x103)\n            {\n                TRACE(1,\"::%s AVRCP_GET_CAPABILITY\\n\",__FUNCTION__);\n                if (app_bt_device.avrcp_cmd1[device_id] == NULL)\n                    app_a2dp_avrcpadvancedpdu_mempool_calloc(app_bt_device.avrcp_cmd1[device_id]);\n                AVRCP_CtGetCapabilities(chnl,app_bt_device.avrcp_cmd1[device_id],AVRCP_CAPABILITY_EVENTS_SUPPORTED);\n            }\n\n            app_bt_device.avrcp_channel[device_id].avrcpState = AVRCP_STATE_CONNECTED;\n\n            TRACE(3,\"::%s  AVRCP_EVENT_CONNECT %x,device_id=%d\\n\",__FUNCTION__, chnl->avrcpVersion,device_id);\n            break;\n        case AVRCP_EVENT_DISCONNECT:\n            TRACE(1,\"::%s  AVRCP_EVENT_DISCONNECT\",__FUNCTION__);\n            app_bt_device.avrcp_channel[device_id].avrcpState = AVRCP_STATE_DISCONNECTED;\n            if (app_bt_device.avrcp_get_capabilities_rsp[device_id]){\n                app_a2dp_avrcpadvancedpdu_mempool_free(app_bt_device.avrcp_get_capabilities_rsp[device_id]);\n                app_bt_device.avrcp_get_capabilities_rsp[device_id] = NULL;\n            }\n            if (app_bt_device.avrcp_control_rsp[device_id]){\n                app_a2dp_avrcpadvancedpdu_mempool_free(app_bt_device.avrcp_control_rsp[device_id]);\n                app_bt_device.avrcp_control_rsp[device_id] = NULL;\n            }\n            if (app_bt_device.avrcp_notify_rsp[device_id]){\n                app_a2dp_avrcpadvancedpdu_mempool_free(app_bt_device.avrcp_notify_rsp[device_id]);\n                app_bt_device.avrcp_notify_rsp[device_id] = NULL;\n            }\n\n            if (app_bt_device.avrcp_cmd1[device_id]){\n                app_a2dp_avrcpadvancedpdu_mempool_free(app_bt_device.avrcp_cmd1[device_id]);\n                app_bt_device.avrcp_cmd1[device_id] = NULL;\n            }\n            if (app_bt_device.avrcp_cmd2[device_id]){\n                app_a2dp_avrcpadvancedpdu_mempool_free(app_bt_device.avrcp_cmd2[device_id]);\n                app_bt_device.avrcp_cmd2[device_id] = NULL;\n            }\n            app_bt_device.volume_report[device_id] = 0;\n            break;\n        case AVRCP_EVENT_RESPONSE:\n            TRACE(3,\"::%s  AVRCP_EVENT_RESPONSE op=%x,status=%x\\n\",__FUNCTION__, Parms->advOp,Parms->status);\n\n            break;\n        case AVRCP_EVENT_PANEL_CNF:\n            TRACE(4,\"::%s AVRCP_EVENT_PANEL_CNF %x,%x,%x\",__FUNCTION__,\n                Parms->p.panelCnf.response,Parms->p.panelCnf.operation,Parms->p.panelCnf.press);\n            break;\n        case AVRCP_EVENT_ADV_TX_DONE:\n            TRACE(4,\"::%s AVRCP_EVENT_ADV_TX_DONE device_id=%d,status=%x,errorcode=%x\\n\",__FUNCTION__,device_id,Parms->status,Parms->errorCode);\n            TRACE(3,\"::%s AVRCP_EVENT_ADV_TX_DONE op:%d, transid:%x\\n\", __FUNCTION__,Parms->p.adv.txPdu->op,Parms->p.adv.txPdu->transId);\n            if (Parms->p.adv.txPdu->op == AVRCP_OP_GET_CAPABILITIES){\n                if (app_bt_device.avrcp_get_capabilities_rsp[device_id] == Parms->p.adv.txPdu){\n                    app_bt_device.avrcp_get_capabilities_rsp[device_id] = NULL;\n                    app_a2dp_avrcpadvancedpdu_mempool_free(Parms->p.adv.txPdu);\n                }\n            }\n\n            break;\n        case AVRCP_EVENT_COMMAND:\n#ifndef __AVRCP_EVENT_COMMAND_VOLUME_SKIP__\n            TRACE(3,\"::%s AVRCP_EVENT_COMMAND device_id=%d,role=%x\\n\",__FUNCTION__,device_id,chnl->role);\n            TRACE(3,\"::%s AVRCP_EVENT_COMMAND ctype=%x,subunitype=%x\\n\",__FUNCTION__, Parms->p.cmdFrame->ctype,Parms->p.cmdFrame->subunitType);\n            TRACE(3,\"::%s AVRCP_EVENT_COMMAND subunitId=%x,opcode=%x\\n\",__FUNCTION__, Parms->p.cmdFrame->subunitId,Parms->p.cmdFrame->opcode);\n            TRACE(3,\"::%s AVRCP_EVENT_COMMAND operands=%x,operandLen=%x\\n\",__FUNCTION__, Parms->p.cmdFrame->operands,Parms->p.cmdFrame->operandLen);\n            TRACE(2,\"::%s AVRCP_EVENT_COMMAND more=%x\\n\", Parms->p.cmdFrame->more);\n            if(Parms->p.cmdFrame->ctype == AVRCP_CTYPE_STATUS)\n            {\n                uint32_t company_id = *(Parms->p.cmdFrame->operands+2) + ((uint32_t)(*(Parms->p.cmdFrame->operands+1))<<8) + ((uint32_t)(*(Parms->p.cmdFrame->operands))<<16);\n                TRACE(2,\"::%s AVRCP_EVENT_COMMAND company_id=%x\\n\",__FUNCTION__, company_id);\n                if(company_id == 0x001958)  //bt sig\n                {\n                    AvrcpOperation op = *(Parms->p.cmdFrame->operands+3);\n                    uint8_t oplen =  *(Parms->p.cmdFrame->operands+6)+ ((uint32_t)(*(Parms->p.cmdFrame->operands+5))<<8);\n                    TRACE(3,\"::%s AVRCP_EVENT_COMMAND op=%x,oplen=%x\\n\",__FUNCTION__, op,oplen);\n                    switch(op)\n                    {\n                        case AVRCP_OP_GET_CAPABILITIES:\n                        {\n                                uint8_t event = *(Parms->p.cmdFrame->operands+7);\n                                if(event==AVRCP_CAPABILITY_COMPANY_ID)\n                                {\n                                    TRACE(1,\"::%s AVRCP_EVENT_COMMAND send support compay id\",__FUNCTION__);\n                                }\n                                else if(event == AVRCP_CAPABILITY_EVENTS_SUPPORTED)\n                                {\n                                    TRACE(2,\"::%s AVRCP_EVENT_COMMAND send support event transId:%d\", __FUNCTION__,Parms->p.cmdFrame->transId);\n                                    chnl->adv.eventMask = AVRCP_ENABLE_VOLUME_CHANGED;   ///volume control\n                                    if (app_bt_device.avrcp_get_capabilities_rsp[device_id] == NULL)\n                                        app_a2dp_avrcpadvancedpdu_mempool_calloc(app_bt_device.avrcp_get_capabilities_rsp[device_id]);\n                                    app_bt_device.avrcp_get_capabilities_rsp[device_id]->transId = Parms->p.cmdFrame->transId;\n                                    app_bt_device.avrcp_get_capabilities_rsp[device_id]->ctype = AVCTP_RESPONSE_IMPLEMENTED_STABLE;\n                                    TRACE(2,\"::%s AVRCP_EVENT_COMMAND send support event transId:%d\", __FUNCTION__,app_bt_device.avrcp_get_capabilities_rsp[device_id]->transId);\n                                    AVRCP_CtGetCapabilities_Rsp(chnl,app_bt_device.avrcp_get_capabilities_rsp[device_id],AVRCP_CAPABILITY_EVENTS_SUPPORTED,chnl->adv.eventMask);\n                                }\n                                else\n                                {\n                                    TRACE(1,\"::%s AVRCP_EVENT_COMMAND send error event value\",__FUNCTION__);\n                                }\n                        }\n                        break;\n                    }\n\n                }\n\n            }else if(Parms->p.cmdFrame->ctype == AVCTP_CTYPE_CONTROL){\n                TRACE(1,\"::%s AVRCP_EVENT_COMMAND AVCTP_CTYPE_CONTROL\\n\",__FUNCTION__);\n                DUMP8(\"%02x \", Parms->p.cmdFrame->operands, Parms->p.cmdFrame->operandLen);\n                if (Parms->p.cmdFrame->operands[3] == AVRCP_OP_SET_ABSOLUTE_VOLUME){\n                    TRACE(2,\"::%s AVRCP_EID_VOLUME_CHANGED transId:%d\\n\", __FUNCTION__,Parms->p.cmdFrame->transId);\n                    a2dp_volume_set(Parms->p.cmdFrame->operands[7]);\n                    if (app_bt_device.avrcp_control_rsp[device_id] == NULL)\n                        app_a2dp_avrcpadvancedpdu_mempool_calloc(app_bt_device.avrcp_control_rsp[device_id]);\n                    app_bt_device.avrcp_control_rsp[device_id]->transId = Parms->p.cmdFrame->transId;\n                    app_bt_device.avrcp_control_rsp[device_id]->ctype = AVCTP_RESPONSE_ACCEPTED;\n                    DUMP8(\"%02x \", Parms->p.cmdFrame->operands, Parms->p.cmdFrame->operandLen);\n                    AVRCP_CtAcceptAbsoluteVolume_Rsp(chnl, app_bt_device.avrcp_control_rsp[device_id], Parms->p.cmdFrame->operands[7]);\n                }\n            }else if (Parms->p.cmdFrame->ctype == AVCTP_CTYPE_NOTIFY){\n                BtStatus status;\n                TRACE(1,\"::%s AVRCP_EVENT_COMMAND AVCTP_CTYPE_NOTIFY\\n\",__FUNCTION__);\n                DUMP8(\"%02x \", Parms->p.cmdFrame->operands, Parms->p.cmdFrame->operandLen);\n                if (Parms->p.cmdFrame->operands[7] == AVRCP_EID_VOLUME_CHANGED){\n                    TRACE(2,\"::%s AVRCP_EID_VOLUME_CHANGED transId:%d\\n\", __FUNCTION__,Parms->p.cmdFrame->transId);\n                    if (app_bt_device.avrcp_notify_rsp[device_id] == NULL)\n                        app_a2dp_avrcpadvancedpdu_mempool_calloc(app_bt_device.avrcp_notify_rsp[device_id]);\n                    app_bt_device.avrcp_notify_rsp[device_id]->transId = Parms->p.cmdFrame->transId;\n                    app_bt_device.avrcp_notify_rsp[device_id]->ctype = AVCTP_RESPONSE_INTERIM;\n                    app_bt_device.volume_report[device_id] = AVCTP_RESPONSE_INTERIM;\n                    status = AVRCP_CtGetAbsoluteVolume_Rsp(chnl, app_bt_device.avrcp_notify_rsp[device_id], a2dp_volume_get());\n                    TRACE(2,\"::%s AVRCP_EVENT_COMMAND AVRCP_EID_VOLUME_CHANGED nRet:%x\\n\",__FUNCTION__,status);\n                }\n            }\n#endif\n            break;\n        case AVRCP_EVENT_ADV_CMD_TIMEOUT:\n            TRACE(3,\"::%s AVRCP_EVENT_ADV_CMD_TIMEOUT device_id=%d,role=%x\\n\",__FUNCTION__,device_id,chnl->role);\n            break;\n    }\n}\n#endif\n\nosMutexId a2dp_source_mutex_id = NULL;\nosMutexDef(a2dp_source_mutex);\n\nstatic void a2dp_source_mutex_lock(void) {\n  osMutexWait(a2dp_source_mutex_id, osWaitForever);\n}\n\nstatic void a2dp_source_mutex_unlock(void) {\n  osMutexRelease(a2dp_source_mutex_id);\n}\n\nstatic void a2dp_source_sem_lock(a2dp_source_lock_t *lock) {\n  osSemaphoreWait(lock->_osSemaphoreId, osWaitForever);\n}\n\nstatic void a2dp_source_sem_unlock(a2dp_source_lock_t *lock) {\n\n  osSemaphoreRelease(lock->_osSemaphoreId);\n}\n\nstatic void a2dp_source_reset_send_lock(void) {\n  PSCB p_scb = (PSCB)(a2dp_source.sbc_send_lock._osSemaphoreDef.semaphore);\n  uint32_t lock = int_lock();\n  p_scb->tokens = 0;\n  int_unlock(lock);\n}\n\nstatic bool a2dp_source_is_send_wait(void) {\n  bool ret = false;\n  uint32_t lock = int_lock();\n  PSCB p_scb = (PSCB)(a2dp_source.sbc_send_lock._osSemaphoreDef.semaphore);\n  if (p_scb->p_lnk) {\n    ret = true;\n  }\n  int_unlock(lock);\n  return ret;\n}\n\nstatic void a2dp_source_wait_pcm_data(void) {\n\n  a2dp_source_lock_t *lock = &(a2dp_source.data_lock);\n  PSCB p_scb = (PSCB)(lock->_osSemaphoreDef.semaphore);\n  uint32_t iflag = int_lock();\n  p_scb->tokens = 0;\n  int_unlock(iflag);\n  a2dp_source_sem_lock(lock);\n}\n\nstatic void a2dp_source_put_data(void) {\n  a2dp_source_lock_t *lock = &(a2dp_source.data_lock);\n  a2dp_source_sem_unlock(lock);\n}\n\n#if 0\nstatic void a2dp_source_lock_sbcsending(void * channel)\n{\n    tws_lock_t *lock = &(a2dp_source.sbc_send_lock);\n    sem_lock(lock);\n}\nstatic void a2dp_source_unlock_sbcsending(void * channel)\n{\n    tws_lock_t *lock = &(a2dp_source.sbc_send_lock);\n    sem_unlock(lock);\n}\n#endif\n\nstatic int32_t a2dp_source_wait_sent(uint32_t timeout) {\n  int32_t ret = 0;\n  a2dp_source_lock_t *lock = &(a2dp_source.sbc_send_lock);\n  a2dp_source_reset_send_lock();\n  ret = osSemaphoreWait(lock->_osSemaphoreId, timeout);\n  return ret;\n}\n\nvoid a2dp_source_notify_send(void) {\n  if (a2dp_source_is_send_wait()) { // task wait lock\n    //   TWS_DBLOG(\"\\nNOTIFY SEND\\n\");\n    a2dp_source_sem_unlock(&(a2dp_source.sbc_send_lock));\n  }\n}\n\n// loop write\nstatic int A2dpSourceEnCQueue(CQueue *Q, CQItemType *e, unsigned int len) {\n  int status = CQ_OK;\n  if (AvailableOfCQueue(Q) < (int)len) {\n    Q->write = 0;\n    Q->len = 0;\n    Q->read = 0;\n    status = CQ_ERR;\n  } else {\n    status = CQ_OK;\n  }\n\n  Q->len += len;\n\n  while (len > 0) {\n    Q->base[Q->write] = *e;\n\n    ++Q->write;\n    ++e;\n    --len;\n\n    if (Q->write >= Q->size)\n      Q->write = 0;\n  }\n\n  // TRACE(1,\"Q->len:%d \", Q->len);\n\n  return status;\n}\n\nstatic int a2dp_source_pcm_buffer_write(uint8_t *pcm_buf, uint16_t len) {\n  int status;\n  // TWS_DBLOG(\"\\nenter: %s %d\\n\",__FUNCTION__,__LINE__);\n  a2dp_source_mutex_lock();\n  status = A2dpSourceEnCQueue(&(a2dp_source.pcm_queue), pcm_buf, len);\n  a2dp_source_mutex_unlock();\n  // TWS_DBLOG(\"\\nexit: %s %d\\n\",__FUNCTION__,__LINE__);\n  return status;\n}\n\nstatic int a2dp_source_pcm_buffer_read(uint8_t *buff, uint16_t len) {\n  uint8_t *e1 = NULL, *e2 = NULL;\n  unsigned int len1 = 0, len2 = 0;\n  int status;\n  a2dp_source_mutex_lock();\n  status = PeekCQueue(&(a2dp_source.pcm_queue), len, &e1, &len1, &e2, &len2);\n  if (len == (len1 + len2)) {\n    memcpy(buff, e1, len1);\n    memcpy(buff + len1, e2, len2);\n    DeCQueue(&(a2dp_source.pcm_queue), 0, len);\n  } else {\n    // SOURCE_DBLOG(\"memset buffer\");\n    memset(buff, 0x00, len);\n    status = -1;\n  }\n  a2dp_source_mutex_unlock();\n  return status;\n}\n\nuint32_t a2dp_source_linein_more_pcm_data(uint8_t *pcm_buf, uint32_t len) {\n#if 1\n  int status;\n  status = a2dp_source_pcm_buffer_write(pcm_buf, len);\n  // pcm data from adc\n  // DUMP8(\"%02x \",pcm_buf, 10);\n  if (status != CQ_OK) {\n    SOURCE_DBLOG(\"linin buff overflow!\");\n  }\n  a2dp_source_put_data();\n  return len;\n#else\n  int status;\n  status = a2dp_source_pcm_buffer_write(pcm_buf, len);\n  // pcm data from adc\n  // DUMP8(\"%02x \",pcm_buf, 10);\n  if (status != CQ_OK) {\n    SOURCE_DBLOG(\"linin buff overflow!\");\n  }\n  if (((app_bt_device.input_onoff == 1) &&\n       (a2dp_source.pcm_queue.len > 10 * 1024)) ||\n      (app_bt_device.input_onoff == 2)) {\n    a2dp_source_put_data();\n    app_bt_device.input_onoff = 2;\n  }\n\n  return len;\n\n#endif\n}\n\nstatic btif_handler a2dp_source_handler;\nstatic uint8_t app_a2dp_source_find_process = 0;\n\nvoid app_a2dp_source_stop_find(void) {\n  app_a2dp_source_find_process = 0;\n  // ME_UnregisterGlobalHandler(&a2dp_source_handler);\n}\n\n#if 0\nstatic void bt_a2dp_source_call_back(const BtEvent* event)\n{\n    switch (event->eType) {\n        case BTEVENT_HCI_COMMAND_SENT:\n\t\tcase BTEVENT_ACL_DATA_NOT_ACTIVE:\n            return;\n        case BTEVENT_ACL_DATA_ACTIVE:\n            CmgrHandler    *cmgrHandler;\n            /* Start the sniff timer */\n            cmgrHandler = CMGR_GetAclHandler(event->p.remDev);\n            if (cmgrHandler)\n                app_bt_CMGR_SetSniffTimer(cmgrHandler, NULL, CMGR_SNIFF_TIMER);\n            return;\n    }\n\n    TRACE(1,\"SRC app_bt_golbal_handle evt = %d\",event->eType);\n\n    switch(event->eType){\n        case BTEVENT_NAME_RESULT:\n            SOURCE_DBLOG(\"\\n%s %d BTEVENT_NAME_RESULT\\n\",__FUNCTION__,__LINE__);\n            break;\n        case BTEVENT_INQUIRY_RESULT:\n            SOURCE_DBLOG(\"\\n%s %d BTEVENT_INQUIRY_RESULT\\n\",__FUNCTION__,__LINE__);\n            DUMP8(\"%02x \", event->p.inqResult.bdAddr.addr, 6);\n            SOURCE_DBLOG(\"inqmode = %x\",event->p.inqResult.inqMode);\n            DUMP8(\"%02x \", event->p.inqResult.extInqResp, 20);\n            SOURCE_DBLOG(\"classdevice=%x\",event->p.inqResult.classOfDevice);\n            ///check the class of device to find the handfree device\n            if(event->p.inqResult.classOfDevice & COD_MAJOR_AUDIO)\n            //if((event->p.inqResult.classOfDevice & COD_MAJOR_AUDIO)&&(!memcmp(event->p.inqResult.bdAddr.addr,\"\\x36\\x35\\x34\",3)))\n            {\n            \tmemcpy(app_bt_device.inquried_snk_bdAddr.addr,event->p.inqResult.bdAddr.addr,sizeof(event->p.inqResult.bdAddr.addr));\n\t\t\t\tDUMP8(\"%02x \",app_bt_device.inquried_snk_bdAddr.addr, 6);\n                ME_CancelInquiry();\n                app_a2dp_source_stop_find();\n            }\n\n            break;\n        case BTEVENT_INQUIRY_COMPLETE:\n            SOURCE_DBLOG(\"\\n%s %d BTEVENT_INQUIRY_COMPLETE\\n\",__FUNCTION__,__LINE__);\n            app_a2dp_source_stop_find();\n            break;\n            /** The Inquiry process is canceled. */\n        case BTEVENT_INQUIRY_CANCELED:\n            SOURCE_DBLOG(\"\\n%s %d BTEVENT_INQUIRY_CANCELED\\n\",__FUNCTION__,__LINE__);\n\t\t\tSOURCE_DBLOG(\"start to connect peer device\");\n            A2DP_OpenStream(&app_bt_device.a2dp_stream[BT_DEVICE_ID_1], (BT_BD_ADDR *)&app_bt_device.inquried_snk_bdAddr);\n            break;\n        case BTEVENT_LINK_CONNECT_CNF:\n        case BTEVENT_LINK_CONNECT_IND:\n\t\t\tSOURCE_DBLOG(\"CONNECT_IND/CNF evt:%d errCode:0x%0x newRole:%d activeCons:%d\",event->eType, event->errCode, event->p.remDev->role, MEC(activeCons));\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_AUTOPOWEROFF__) \n\t\t\tif (MEC(activeCons) == 0){\n\t\t\t    app_start_10_second_timer(APP_POWEROFF_TIMER_ID);\n\t\t\t}else{\n\t\t\t    app_stop_10_second_timer(APP_POWEROFF_TIMER_ID);\n\t\t\t}\n#endif\n\t\t\tif (MEC(activeCons) > 1){\n\t\t\t    app_bt_MeDisconnectLink(event->p.remDev);\n\t\t\t}\n        default:\n            //SOURCE_DBLOG(\"\\n%s %d etype:%d\\n\",__FUNCTION__,__LINE__,event->eType);\n            break;\n\n    }\n\n\tapp_bt_role_manager_process(event);\n    app_bt_accessible_manager_process(event);\n    app_bt_sniff_manager_process(event);\n    app_bt_golbal_handle_hook(event);\n\n    //SOURCE_DBLOG(\"\\nexit: %s %d\\n\",__FUNCTION__,__LINE__);\n\n}\n\n#else\nuint8_t source_bt_addr[6] = {0x88, 0xaa, 0x33, 0x22, 0x11, 0x11};\n// uint8_t source_bt_addr[6]={0x85,0x7e,0xaa,0x3c,0xd0,0xe8};\n\nstatic void bt_a2dp_source_call_back(const btif_event_t *Event) {\n\n  uint8_t etype = btif_me_get_callback_event_type(Event);\n  btif_remote_device_t *remDev;\n\n  switch (etype) {\n  case BTIF_BTEVENT_HCI_COMMAND_SENT:\n  case BTIF_BTEVENT_ACL_DATA_NOT_ACTIVE:\n    return;\n  case BTIF_BTEVENT_ACL_DATA_ACTIVE:\n\n    btif_cmgr_handler_t *cmgrHandler;\n    /* Start the sniff timer */\n    cmgrHandler =\n        btif_cmgr_get_acl_handler(btif_me_get_callback_event_rem_dev(Event));\n    if (cmgrHandler)\n      app_bt_CMGR_SetSniffTimer(cmgrHandler, NULL, BTIF_CMGR_SNIFF_TIMER);\n    return;\n  }\n\n  TRACE(1, \"SRC app_bt_golbal_handle evt = %d\", etype);\n\n  switch (etype) {\n  case BTIF_BTEVENT_NAME_RESULT:\n    SOURCE_DBLOG(\"\\n%s %d BTEVENT_NAME_RESULT\\n\", __FUNCTION__, __LINE__);\n    break;\n  case BTIF_BTEVENT_INQUIRY_RESULT:\n    remDev = btif_me_get_callback_event_rem_dev(Event);\n    SOURCE_DBLOG(\"\\n%s %d BTEVENT_INQUIRY_RESULT\\n\", __FUNCTION__, __LINE__);\n    DUMP8(\"%02x \", btif_me_get_callback_event_inq_result_bd_addr_addr(Event),\n          6);\n    SOURCE_DBLOG(\"inqmode = %x\",\n                 btif_me_get_callback_event_inq_result_inq_mode(Event));\n    DUMP8(\"%02x \", btif_me_get_callback_event_inq_result_ext_inq_resp(Event),\n          20);\n    SOURCE_DBLOG(\"classdevice=%x\",\n                 btif_me_get_callback_event_inq_result_classofdevice(Event));\n    /// check the class of device to find the handfree device\n    // if(btif_me_get_callback_event_inq_result_classofdevice(Event) &\n    // BTIF_COD_MAJOR_AUDIO)\n    if ((btif_me_get_callback_event_inq_result_classofdevice(Event) &\n         BTIF_COD_MAJOR_AUDIO) &&\n        (!memcmp(btif_me_get_callback_event_inq_result_bd_addr_addr(Event),\n                 source_bt_addr, 6))) {\n      memcpy(app_bt_device.inquried_snk_bdAddr.addr,\n             btif_me_get_callback_event_inq_result_bd_addr_addr(Event), 6);\n      DUMP8(\"%02x \", app_bt_device.inquried_snk_bdAddr.addr, 6);\n      btif_me_cancel_inquiry();\n      app_a2dp_source_stop_find();\n    }\n\n    break;\n  case BTIF_BTEVENT_INQUIRY_COMPLETE:\n    SOURCE_DBLOG(\"\\n%s %d BTEVENT_INQUIRY_COMPLETE\\n\", __FUNCTION__, __LINE__);\n    app_a2dp_source_stop_find();\n    break;\n    /** The Inquiry process is canceled. */\n  case BTIF_BTEVENT_INQUIRY_CANCELED:\n    SOURCE_DBLOG(\"\\n%s %d BTEVENT_INQUIRY_CANCELED\\n\", __FUNCTION__, __LINE__);\n    SOURCE_DBLOG(\"start to connect peer device\");\n    btif_a2dp_open_stream(\n        app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream,\n        (bt_bdaddr_t *)&app_bt_device.inquried_snk_bdAddr);\n    break;\n  case BTIF_BTEVENT_LINK_CONNECT_CNF:\n  case BTIF_BTEVENT_LINK_CONNECT_IND:\n    SOURCE_DBLOG(\n        \"CONNECT_IND/CNF evt:%d errCode:0x%0x newRole:%d activeCons:%d\", etype,\n        btif_me_get_callback_event_err_code(Event),\n        btif_me_get_remote_device_role(\n            btif_me_get_callback_event_rem_dev(Event)),\n        btif_me_get_activeCons());\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_AUTOPOWEROFF__)\n    if (btif_me_get_activeCons() == 0) {\n      app_start_10_second_timer(APP_POWEROFF_TIMER_ID);\n    } else {\n      app_stop_10_second_timer(APP_POWEROFF_TIMER_ID);\n    }\n#endif\n    if (btif_me_get_activeCons() > 1) {\n      remDev = btif_me_get_callback_event_rem_dev(Event);\n      app_bt_MeDisconnectLink(remDev);\n    }\n  default:\n    // SOURCE_DBLOG(\"\\n%s %d etype:%d\\n\",__FUNCTION__,__LINE__,event->eType);\n    break;\n  }\n\n  app_bt_role_manager_process(Event);\n  app_bt_accessible_manager_process(Event);\n  app_bt_sniff_manager_process(Event);\n\n  // SOURCE_DBLOG(\"\\nexit: %s %d\\n\",__FUNCTION__,__LINE__);\n}\n\n#endif\n\nvoid app_a2dp_start_stream(void) {\n  btif_a2dp_start_stream(&app_bt_device.a2dp_stream[BT_DEVICE_ID_1]);\n}\n\nvoid app_a2dp_suspend_stream(void) {\n  btif_a2dp_suspend_stream(&app_bt_device.a2dp_stream[BT_DEVICE_ID_1]);\n}\n\nstatic void _find_a2dp_sink_peer_device_start(void) {\n  SOURCE_DBLOG(\"\\nenter: %s %d\\n\", __FUNCTION__, __LINE__);\n  bt_status_t state;\n  if (app_a2dp_source_find_process == 0 && app_bt_device.a2dp_state[0] == 0) {\n    app_a2dp_source_find_process = 1;\n\n  again:\n    state = btif_me_inquiry(BTIF_BT_IAC_GIAC, 30, 0);\n    SOURCE_DBLOG(\"\\n%s %d\\n\", __FUNCTION__, __LINE__);\n    if (state != BT_STS_PENDING) {\n      osDelay(500);\n      goto again;\n    }\n    SOURCE_DBLOG(\"\\n%s %d\\n\", __FUNCTION__, __LINE__);\n  }\n}\n\nvoid app_a2dp_source_find_sink(void) { _find_a2dp_sink_peer_device_start(); }\n\nstatic bool need_init_encoder = true;\n//__PSRAMDATA static SbcStreamInfo StreamInfo = {0};\nstatic btif_sbc_stream_info_short_t StreamInfo = {0};\n\nstatic btif_sbc_encoder_t sbc_encoder;\n\nstatic uint8_t\napp_a2dp_source_samplerate_2_sbcenc_type(enum AUD_SAMPRATE_T sample_rate) {\n  uint8_t rate = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n  switch (sample_rate) {\n  case AUD_SAMPRATE_16000:\n    rate = BTIF_SBC_CHNL_SAMPLE_FREQ_16;\n    break;\n  case AUD_SAMPRATE_32000:\n    rate = BTIF_SBC_CHNL_SAMPLE_FREQ_32;\n    break;\n  case AUD_SAMPRATE_44100:\n    rate = BTIF_SBC_CHNL_SAMPLE_FREQ_44_1;\n    break;\n  case AUD_SAMPRATE_48000:\n    rate = BTIF_SBC_CHNL_SAMPLE_FREQ_48;\n    break;\n  default:\n    TRACE(0, \"error!  sbc enc don't support other samplerate\");\n    break;\n  }\n  SOURCE_DBLOG(\"\\n%s %d rate = %x\\n\", __FUNCTION__, __LINE__, rate);\n  return rate;\n}\n\n#if 1\nstatic void a2dp_source_send_sbc_packet(void) {\n  uint32_t frame_size = 512;\n  uint32_t frame_num = A2DP_TRANS_SIZE / frame_size;\n  //    a2dp_source.lock_stream(&(tws.tws_source));\n  uint16_t byte_encoded = 0;\n  //    uint16_t pcm_frame_size = 512/2;\n  unsigned short enc_len = 0;\n  bt_status_t status = BT_STS_FAILED;\n\n  int lock = int_lock();\n  sbcpack_t *sbcpack = get_sbcPacket();\n  btif_a2dp_sbc_packet_t *sbcPacket = &(sbcpack->sbcPacket);\n  sbcPacket->data = (U8 *)sbcpack->buffer;\n  memcpy(sbcpack->buffer, a2dp_transmit_buffer, A2DP_TRANS_SIZE);\n\n  //    sbcPacket->dataLen = len;\n  //    sbcPacket->frameSize = len/frame_num;\n\n  btif_sbc_pcm_data_t PcmEncData;\n\n  if (need_init_encoder) {\n    btif_sbc_init_encoder(&sbc_encoder);\n    sbc_encoder.streamInfo.numChannels = 2;\n    sbc_encoder.streamInfo.channelMode = BTIF_SBC_CHNL_MODE_JOINT_STEREO;\n    sbc_encoder.streamInfo.bitPool = A2DP_SBC_BITPOOL;\n    sbc_encoder.streamInfo.sampleFreq =\n        app_a2dp_source_samplerate_2_sbcenc_type(a2dp_source.sample_rate);\n    sbc_encoder.streamInfo.allocMethod = BTIF_SBC_ALLOC_METHOD_SNR;\n    sbc_encoder.streamInfo.numBlocks = 16;\n    sbc_encoder.streamInfo.numSubBands = 8;\n    sbc_encoder.streamInfo.mSbcFlag = 0;\n    need_init_encoder = 0;\n  }\n  PcmEncData.data = (uint8_t *)a2dp_transmit_buffer;\n  PcmEncData.dataLen = A2DP_TRANS_SIZE;\n  PcmEncData.numChannels = 2;\n  PcmEncData.sampleFreq = sbc_encoder.streamInfo.sampleFreq;\n\n  btif_sbc_encode_frames(&sbc_encoder, &PcmEncData, &byte_encoded,\n                         (unsigned char *)sbcpack->buffer, &enc_len,\n                         A2DP_TRANS_SIZE);\n  sbcPacket->dataLen = enc_len;\n  sbcPacket->frameSize = enc_len / frame_num;\n\n  int_unlock(lock);\n  status = btif_a2dp_stream_send_sbc_packet(\n      app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream, sbcPacket,\n      &StreamInfo);\n  if (status == BT_STS_PENDING)\n    a2dp_source_wait_sent(osWaitForever);\n}\n#endif\n\n// #define BT_A2DP_SOURCE_LINEIN_BUFF_SIZE    \t(512*5*2*2)\n#define BT_A2DP_SOURCE_LINEIN_BUFF_SIZE (A2DP_TRANS_SIZE * 2)\n\n#if defined(APP_LINEIN_A2DP_SOURCE)\n//////////start the audio linein stream for capure the pcm data\nint app_a2dp_source_linein_on(bool on) {\n  uint8_t *buff_play = NULL;\n  struct AF_STREAM_CONFIG_T stream_cfg;\n  static bool isRun = false;\n  SOURCE_DBLOG(\"app_a2dp_source_linein_on work:%d op:%d\", isRun, on);\n\n  if (isRun == on)\n    return 0;\n\n  if (on) {\n#if defined(SLAVE_USE_OPUS) || defined(MASTER_USE_OPUS) || defined(ALL_USE_OPUS)\n    app_audio_mempool_init(app_audio_get_basebuf_ptr(APP_MEM_LINEIN_AUDIO),\n                           app_audio_get_basebuf_size(APP_MEM_LINEIN_AUDIO));\n#else\n    app_audio_mempool_init();\n#endif\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_104M);\n    app_audio_mempool_get_buff(&buff_play, BT_A2DP_SOURCE_LINEIN_BUFF_SIZE);\n\n    memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n    stream_cfg.bits = AUD_BITS_16;\n    stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n    stream_cfg.sample_rate = a2dp_source.sample_rate;\n    stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n    stream_cfg.vol = 10;\n    // stream_cfg.io_path = AUD_INPUT_PATH_HP_MIC;\n    // stream_cfg.io_path =AUD_INPUT_PATH_MAINMIC;\n    stream_cfg.io_path = AUD_INPUT_PATH_LINEIN;\n    stream_cfg.handler = a2dp_source_linein_more_pcm_data;\n    stream_cfg.data_ptr = buff_play;\n    stream_cfg.data_size = BT_A2DP_SOURCE_LINEIN_BUFF_SIZE;\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    SOURCE_DBLOG(\"app_source_linein_on on\");\n  } else {\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    SOURCE_DBLOG(\"app_source_linein_on off\");\n    // clear buffer data\n    a2dp_source.pcm_queue.write = 0;\n    a2dp_source.pcm_queue.len = 0;\n    a2dp_source.pcm_queue.read = 0;\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n  }\n\n  isRun = on;\n  return 0;\n}\n#endif\n\n////////////////////////////creat the thread for send sbc data to a2dp sink\n/// device ///////////////////\nstatic void send_thread(const void *arg);\n\nosThreadDef(send_thread, osPriorityHigh, 1, 1024 * 2, \"a2dp_send\");\n\n#if 1\nstatic void send_thread(const void *arg) {\n  while (1) {\n    a2dp_source_wait_pcm_data();\n    while (a2dp_source_pcm_buffer_read((uint8_t *)a2dp_transmit_buffer,\n                                       A2DP_TRANS_SIZE) == 0) {\n      a2dp_source_send_sbc_packet();\n    }\n  }\n}\n#endif\nvoid app_source_init(void) {\n  // register the bt global handler\n  a2dp_source_handler.callback = bt_a2dp_source_call_back;\n  btif_me_register_global_handler(&a2dp_source_handler);\n  btif_me_set_event_mask(\n      &a2dp_source_handler,\n      BTIF_BEM_LINK_DISCONNECT | BTIF_BEM_ROLE_CHANGE |\n          BTIF_BEM_INQUIRY_RESULT | BTIF_BEM_INQUIRY_COMPLETE |\n          BTIF_BEM_INQUIRY_CANCELED | BTIF_BEM_LINK_CONNECT_CNF |\n          BTIF_BEM_LINK_CONNECT_IND);\n}\n///////init the a2dp source feature\nvoid app_a2dp_source_init(void) {\n  a2dp_source_lock_t *lock;\n  // get heap from app_audio_buffer\n  app_audio_mempool_get_buff(&a2dp_linein_buff, A2DP_LINEIN_SIZE);\n  InitCQueue(&a2dp_source.pcm_queue, A2DP_LINEIN_SIZE,\n             (CQItemType *)a2dp_linein_buff);\n  if (a2dp_source_mutex_id == NULL) {\n    a2dp_source_mutex_id = osMutexCreate((osMutex(a2dp_source_mutex)));\n  }\n\n  lock = &(a2dp_source.data_lock);\n  memset(lock, 0, sizeof(a2dp_source_lock_t));\n  lock->_osSemaphoreDef.semaphore = lock->_semaphore_data;\n  lock->_osSemaphoreId = osSemaphoreCreate(&(lock->_osSemaphoreDef), 0);\n\n  lock = &(a2dp_source.sbc_send_lock);\n  memset(lock, 0, sizeof(a2dp_source_lock_t));\n  lock->_osSemaphoreDef.semaphore = lock->_semaphore_data;\n  lock->_osSemaphoreId = osSemaphoreCreate(&(lock->_osSemaphoreDef), 0);\n  a2dp_source.sbc_send_id = osThreadCreate(osThread(send_thread), NULL);\n  a2dp_source.sample_rate = AUD_SAMPRATE_44100;\n}\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_a2dp_source.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\n#ifndef __APP_A2DP_SOURCE_H__\n#define __APP_A2DP_SOURCE_H__\n\n#include \n#include \"cmsis_os.h\"\n#include \"hal_uart.h\"\n#include \"hal_timer.h\"\n#include \"audioflinger.h\"\n#include \"lockcqueue.h\"\n#include \"hal_trace.h\"\n#include \"hal_cmu.h\"\n#include \"analog.h\"\n#include \"bt_drv.h\"\n#include \"app_audio.h\"\n#include \"bt_drv_interface.h\"\n#include \"app_bt_stream.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_env.h\"\n#include \"nvrecord_dev.h\"\n#include \"a2dp_api.h\"\n#include \"avrcp_api.h\"\n\n#include \"besbt.h\"\n\n#include \"cqueue.h\"\n#include \"btapp.h\"\n#include \"apps.h\"\n#include \"resources.h\"\n#include \"app_bt_media_manager.h\"\n#include \"tgt_hardware.h\"\n#include \"app_utils.h\"\n#include \"app_bt_func.h\"\n#include \"a2dp_api.h\"\n\n//#define APP_SOURCE_DEBUG\n#ifdef APP_SOURCE_DEBUG\n#define SOURCE_DBLOG TRACE\n#else\n#define SOURCE_DBLOG(...)\n#endif\n\n\nextern struct BT_DEVICE_T  app_bt_device;\n\n\n//#define A2DP_LINEIN_SIZE    (48*2*1024)\n//#define A2DP_TRANS_SIZE     2048\n\n#define A2DP_LINEIN_SIZE    (10*2*1024)\n#if 0\n//2dh3 5frame 40 encode delay\n#define A2DP_TRANS_SIZE     (128*5*2*2)\n#define A2DP_SBC_BITPOOL    (51)\n#elif\n//2dh3 5frame 40 encode delay\n#define A2DP_TRANS_SIZE     (128*5*2*2)\n#define A2DP_SBC_BITPOOL    (27)\n#else\n//2dh3 5frame 40 encode delay\n#define A2DP_TRANS_SIZE     (128*4*2*2)\n#define A2DP_SBC_BITPOOL    (36)\n#endif\n\ntypedef struct _SCB {\n  U8     cb_type;                 /* Control Block Type                      */\n  U8     mask;                    /* Semaphore token mask                    */\n  U16    tokens;                  /* Semaphore tokens                        */\n  struct OS_TCB *p_lnk;           /* Chain of tasks waiting for tokens       */\n} *PSCB;\n\ntypedef struct  {\n    osSemaphoreId _osSemaphoreId;\n    osSemaphoreDef_t _osSemaphoreDef;\n#ifdef CMSIS_OS_RTX\n    uint32_t _semaphore_data[2];\n#endif\n\n} a2dp_source_lock_t;\n\n\ntypedef struct{\n    CQueue  pcm_queue;\n    osThreadId sbc_send_id;\n    a2dp_source_lock_t  data_lock;\n    a2dp_source_lock_t  sbc_send_lock;\n    enum AUD_SAMPRATE_T sample_rate;\n    uint8_t sbcen_samplerate;\n\n\n}A2DP_SOURCE_STRUCT;\n\n\ntypedef struct sbcpack{\n    btif_a2dp_sbc_packet_t sbcPacket;\n    char buffer[A2DP_TRANS_SIZE];\n    int free;\n}sbcpack_t;\n\ntypedef struct sbcbank{\n    sbcpack_t sbcpacks[1];\n    int free;\n}sbcbank_t;\n\nextern A2DP_SOURCE_STRUCT  a2dp_source;\nextern void a2dp_source_notify_send(void);\nextern uint32_t a2dp_source_linein_more_pcm_data(uint8_t * pcm_buf, uint32_t len);\n#endif\n#endif\n"
  },
  {
    "path": "services/bt_app/app_bqb.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#if defined(__BQB_PROFILE_TEST__) && !defined(ENHANCED_STACK)\n#include \"analog.h\"\n#include \"bt_drv.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_uart.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n\n#include \"apps.h\"\n#include \"cqueue.h\"\n#include \"tgt_hardware.h\"\n\n#include \"cmsis_os.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n\n#include \"hal_bootmode.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n\n#include \"app_audio.h\"\n#include \"app_key.h\"\n#include \"app_overlay.h\"\n#include \"app_status_ind.h\"\n#include \"app_thread.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"audioflinger.h\"\n#ifdef __FACTORY_MODE_SUPPORT__\n#include \"app_factory.h\"\n#include \"app_factory_bt.h\"\n#endif\n#include \"besbt.h\"\n#include \"bt_drv_interface.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n\n#include \"a2dp_api.h\"\n#include \"app_bt.h\"\n#include \"avctp_api.h\"\n#include \"avdtp_api.h\"\n#include \"avrcp_api.h\"\n#include \"btapp.h\"\n#include \"me_api.h\"\n\n#ifdef MEDIA_PLAYER_SUPPORT\n#include \"app_media_player.h\"\n#include \"resources.h\"\n#endif\n#include \"app_bt_media_manager.h\"\n#include \"hal_sleep.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\nvoid A2dp_pts_Set_Sink_Delay(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!A2dp_pts_Set_Sink_Delay\\n\");\n  btif_a2dp_set_sink_delay(\n      app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream, 10);\n}\n\nvoid A2dp_pts_Create_Avdtp_Signal_Channel(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!A2dp_pts_Create_Avdtp_Signal_Channel\\n\");\n  bt_bdaddr_t bdAddr;\n\n  // PTS addr:13 71 da 7d 1a 0\n  bdAddr.address[0] = 0x13;\n  bdAddr.address[1] = 0x71;\n  bdAddr.address[2] = 0xda;\n  bdAddr.address[3] = 0x7d;\n  bdAddr.address[4] = 0x1a;\n  bdAddr.address[5] = 0x00;\n  btif_a2dp_open_stream(app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream,\n                        &bdAddr);\n}\n\nvoid Hfp_pts_create_service_level_channel(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_create_service_level_channel\\n\");\n  bt_bdaddr_t bdAddr;\n\n  // PTS addr:13 71 da 7d 1a 0\n  bdAddr.address[0] = 0x13;\n  bdAddr.address[1] = 0x71;\n  bdAddr.address[2] = 0xda;\n  bdAddr.address[3] = 0x7d;\n  bdAddr.address[4] = 0x1a;\n  bdAddr.address[5] = 0x00;\n  btif_hf_create_service_link(app_bt_device.hf_channel[BT_DEVICE_ID_1],\n                              &bdAddr);\n}\n\n#if 0\ntypedef struct {\n    AvrcpAdvancedPdu pdu;\n    uint8_t para_buf[10];\n}APP_A2DP_AVRCPADVANCEDPDU;\nextern osPoolId   app_a2dp_avrcpadvancedpdu_mempool;\n#define app_a2dp_avrcpadvancedpdu_mempool_calloc(buf)                          \\\n  do {                                                                         \\\n    APP_A2DP_AVRCPADVANCEDPDU *avrcpadvancedpdu;                               \\\n    avrcpadvancedpdu = (APP_A2DP_AVRCPADVANCEDPDU *)osPoolCAlloc(              \\\n        app_a2dp_avrcpadvancedpdu_mempool);                                    \\\n    buf = &(avrcpadvancedpdu->pdu);                                            \\\n    buf->parms = avrcpadvancedpdu->para_buf;                                   \\\n  } while (0);\n\n#endif\n\nvoid Avrcp_pts_volume_change_notify(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Avrcp_pts_volume_change_notify\\n\");\n  if (app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1] == NULL)\n    btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n        &app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1]);\n  btif_avrcp_ct_register_notification(\n      app_bt_device.avrcp_channel[BT_DEVICE_ID_1],\n      app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1],\n      BTIF_AVRCP_EID_VOLUME_CHANGED, 0);\n}\n\n// extern int a2dp_volume_get(void);\n#if 0\nvoid Avrcp_pts_set_absolute_volume(APP_KEY_STATUS *status, void *param)\n{\n    TRACE(0,\"app_avrcp_set_absolute_volume\\n\");\n    if (app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1] == NULL)\n        btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(&app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1]);\n\n    int vol = app_bt_stream_volume_get_ptr()->a2dp_vol;\n    vol = 8*vol-1;\n    if (vol > (0x7f-1))\n        vol = 0x7f;\n\n    btif_avrcp_ct_set_absolute_volume(app_bt_device.avrcp_channel[BT_DEVICE_ID_1],(avrcp_advanced_pdu_t*)app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1],vol);\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/bt_app/app_bqb_new_profile.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#if defined(__BQB_PROFILE_TEST__) && defined(ENHANCED_STACK)\n#include \"app_key.h\"\n#include \"bt_if.h\"\n#include \"conmgr_api.h\"\n#include \"hal_trace.h\"\n\nstatic bt_bdaddr_t pts_bt_addr = {{\n#if 1\n    0x14, 0x71, 0xda, 0x7d, 0x1a, 0x00\n#else\n    0x13, 0x71, 0xda, 0x7d, 0x1a, 0x00\n#endif\n}};\n\nvoid A2dp_pts_Create_Avdtp_Signal_Channel(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!A2dp_pts_Create_Avdtp_Signal_Channel\\n\");\n  btif_pts_av_create_channel(&pts_bt_addr);\n}\n\nvoid A2dp_pts_set_sink_delay(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!A2dp_pts_set_sink_delay\\n\");\n  btif_pts_av_set_sink_delay();\n}\n\nvoid Avctp_pts_avrcp_connect(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Avctp_pts_avrcp_connect\\n\");\n  btif_pts_ar_connect(&pts_bt_addr);\n}\n\nvoid Avrcp_pts_volume_change_notify(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Avrcp_pts_volume_change_notify\\n\");\n  btif_pts_ar_volume_notify();\n}\n\nvoid Avrcp_pts_set_absolute_volume(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"app_avrcp_set_absolute_volume\\n\");\n  btif_pts_ar_set_absolute_volume();\n}\n\nvoid Hfp_pts_create_service_level_channel(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_create_service_level_channel\\n\");\n  btif_pts_hf_create_service_link(&pts_bt_addr);\n}\n\nvoid Hfp_pts_disconnect_service_link(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_disconnect_service_link\\n\");\n  btif_pts_hf_disc_service_link();\n}\n\nvoid Hfp_pts_create_audio_link(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_create_audio_link\\n\");\n  btif_pts_hf_create_audio_link();\n}\n\nvoid Hfp_pts_enable_voice_recognition(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_enable_voice_recognition\\n\");\n  btif_pts_hf_vr_enable();\n}\n\nvoid Hfp_pts_disable_voice_recognition(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_disable_voice_recognition\\n\");\n  btif_pts_hf_vr_disable();\n}\n\nvoid Hfp_pts_list_current_calls(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_list_current_calls\\n\");\n  btif_pts_hf_list_current_calls();\n}\n\nvoid Hfp_pts_release_active_call_index2(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_release_active_call_index2\\n\");\n  btif_pts_hf_release_active_call_2();\n}\n\nvoid Hfp_pts_hold_active_call_index2(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_hold_active_call_index2\\n\");\n  btif_pts_hf_hold_active_call_2();\n}\n\nvoid Hfp_pts_release_active_call(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_release_active_call\\n\");\n  btif_pts_hf_release_active_call();\n}\n\nvoid Hfp_pts_hf_indicators_1(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_hf_indicators_1\\n\");\n  btif_pts_hf_send_ind_1();\n}\n\nvoid Hfp_pts_hf_indicators_2(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_hf_indicators_2\\n\");\n  btif_pts_hf_send_ind_2();\n}\n\nvoid Hfp_pts_hf_indicators_3(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_hf_indicators_3\\n\");\n  btif_pts_hf_send_ind_3();\n}\n\nvoid Hfp_pts_update_indicators_value(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!Hfp_pts_update_indicators_value\\n\");\n  btif_pts_hf_update_ind_value();\n}\n\nvoid rfcomm_pts_register_channel(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"rfcomm_pts_register_channel\\n\");\n  btif_pts_rfc_register_channel();\n}\n\nvoid rfcomm_pts_rfcomm_close(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"rfcomm_pts_rfcomm_close\\n\");\n  btif_pts_rfc_close();\n}\n\nvoid rfcomm_pts_rfcomm_close_dlci0(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"rfcomm_pts_rfcomm_close_dlci0\\n\");\n  btif_pts_rfc_close_dlci_0();\n}\n\nvoid rfcomm_pts_rfcomm_send_data(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"rfcomm_pts_rfcomm_send_data\\n\");\n  btif_pts_rfc_send_data();\n}\n\nvoid Avdtp_pts_send_discover_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_discover_cmd\\n\");\n  btif_pts_av_send_discover();\n}\n\nvoid Avdtp_pts_send_get_capability_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_get_capability_cmd\\n\");\n  btif_pts_av_send_getcap();\n}\n\nvoid Avdtp_pts_send_set_configuration_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_set_configuration_cmd\\n\");\n  btif_pts_av_send_setconf();\n}\n\nvoid Avdtp_pts_send_get_configuration_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_get_configuration_cmd\\n\");\n  btif_pts_av_send_getconf();\n}\n\nvoid Avdtp_pts_send_reconfigure_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_reconfigure_cmd\\n\");\n  btif_pts_av_send_reconf();\n}\n\nvoid Avdtp_pts_send_open_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_open_cmd\\n\");\n  btif_pts_av_send_open();\n}\n\nvoid Avdtp_pts_send_close_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_close_cmd\\n\");\n  btif_pts_av_send_close();\n}\n\nvoid Avdtp_pts_send_abort_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_abort_cmd\\n\");\n  btif_pts_av_send_abort();\n}\n\nvoid Avdtp_pts_send_get_all_capability_cmd(APP_KEY_STATUS *status,\n                                           void *param) {\n  TRACE(0, \"Avdtp_pts_send_get_all_capability_cmd\\n\");\n  btif_pts_av_send_getallcap();\n}\n\nvoid Avdtp_pts_send_suspend_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_suspend_cmd\\n\");\n  btif_pts_av_send_suspend();\n}\n\nvoid Avdtp_pts_send_start_cmd(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_send_start_cmd\\n\");\n  btif_pts_av_send_start();\n}\n\nvoid Avdtp_pts_create_media_channel(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"Avdtp_pts_create_media_channel\\n\");\n  btif_pts_av_create_media_channel();\n}\n\nvoid l2cap_pts_disconnect_channel(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!l2cap_pts_disconnect_channel\\n\");\n  btif_pts_l2c_disc_channel();\n}\n\nvoid l2cap_pts_send_data(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"!!!l2cap_pts_send_data\\n\");\n  btif_pts_l2c_send_data();\n}\n\nvoid pts_spp_client_init(void);\nbtif_cmgr_handler_t *pts_cmgr_handler;\nbt_status_t btif_cmgr_create_data_link(btif_cmgr_handler_t *cmgr_handler,\n                                       bt_bdaddr_t *bd_addr);\nbt_status_t btif_cmgr_register_handler(btif_cmgr_handler_t *cmgr_handler,\n                                       btif_cmgr_callback callback);\nvoid pts_cmgr_callback(btif_cmgr_handler_t *cHandler, cmgr_event_t Event,\n                       bt_status_t Status);\nvoid spp_pts_client_open(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"spp_pts_client_open\\n\");\n\n  pts_cmgr_handler = btif_cmgr_handler_create();\n  btif_cmgr_register_handler(pts_cmgr_handler, pts_cmgr_callback);\n  pts_spp_client_init();\n  btif_cmgr_create_data_link(pts_cmgr_handler, &pts_bt_addr);\n}\n\nextern struct gap_bdaddr BLE_BdAddr;\nextern \"C\" void pts_ble_addr_init(void);\nextern \"C\" void appm_start_connecting(struct gap_bdaddr *ptBdAddr);\nvoid ble_pts_appm_start_connecting(APP_KEY_STATUS *status, void *param) {\n  TRACE(0, \"ble_pts_appm_start_connecting\\n\");\n  pts_ble_addr_init();\n  appm_start_connecting(&BLE_BdAddr);\n}\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_bt.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"app_bt.h\"\n#include \"a2dp_api.h\"\n#include \"app_a2dp.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_dip.h\"\n#include \"app_hfp.h\"\n#include \"app_status_ind.h\"\n#include \"app_thread.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"besbt_cfg.h\"\n#include \"bluetooth.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"btapp.h\"\n#include \"dip_api.h\"\n#include \"hal_aud.h\"\n#include \"hal_chipid.h\"\n#include \"hal_trace.h\"\n#include \"hci_api.h\"\n#include \"hfp_api.h\"\n#include \"l2cap_api.h\"\n#include \"me_api.h\"\n#include \"mei_api.h\"\n#include \"nvrecord.h\"\n#include \"os_api.h\"\n\n#if defined(IBRT)\n#include \"app_ibrt_a2dp.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_tws_ibrt.h\"\n#endif\n\n#ifdef __THIRDPARTY\n#include \"app_thirdparty.h\"\n#endif\n\n#include \"app_ble_mode_switch.h\"\n\n#ifdef GFPS_ENABLED\n#include \"app_gfps.h\"\n#endif\n\n#ifdef __AI_VOICE__\n#include \"ai_manager.h\"\n#include \"ai_spp.h\"\n#include \"ai_thread.h\"\n#endif\n\n#ifdef __INTERCONNECTION__\n#include \"app_interconnection.h\"\n#include \"app_interconnection_ble.h\"\n#include \"app_interconnection_ccmp.h\"\n#include \"app_interconnection_spp.h\"\n#include \"app_spp.h\"\n#include \"spp_api.h\"\n#endif\n\n#ifdef __INTERACTION__\n#include \"app_interaction.h\"\n#endif\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom_bt.h\"\n#endif\n\n#if defined(__EARPHONE_STAY_BCR_SLAVE__) && defined(__BT_ONE_BRING_TWO__)\n#error can not defined at the same time.\n#endif\n\n#ifdef GFPS_ENABLED\n#include \"app_gfps.h\"\n#endif\n\n#ifdef TILE_DATAPATH\n#include \"rwip_config.h\"\n#include \"tile_target_ble.h\"\n#endif\n\n#if (A2DP_DECODER_VER >= 2)\n#include \"a2dp_decoder.h\"\n#endif\nextern \"C\" {\n#include \"ddbif.h\"\n}\nextern struct BT_DEVICE_T app_bt_device;\nextern \"C\" bool app_anc_work_status(void);\nextern uint8_t avrcp_get_media_status(void);\nvoid avrcp_set_media_status(uint8_t status);\n\n#ifdef GFPS_ENABLED\nextern \"C\" void\napp_gfps_handling_on_mobile_link_disconnection(btif_remote_device_t *pRemDev);\n#endif\n\nstatic btif_remote_device_t *connectedMobile = NULL;\nstatic btif_remote_device_t *sppOpenMobile = NULL;\n\nU16 bt_accessory_feature_feature = BTIF_HF_CUSTOM_FEATURE_SUPPORT;\n\n#ifdef __BT_ONE_BRING_TWO__\nbtif_device_record_t record2_copy;\nuint8_t record2_avalible;\n#endif\n\nenum bt_profile_reconnect_mode {\n  bt_profile_reconnect_null,\n  bt_profile_reconnect_openreconnecting,\n  bt_profile_reconnect_reconnecting,\n  bt_profile_reconnect_reconnect_pending,\n};\n\nenum bt_profile_connect_status {\n  bt_profile_connect_status_unknow,\n  bt_profile_connect_status_success,\n  bt_profile_connect_status_failure,\n};\n\nstruct app_bt_profile_manager {\n  bool has_connected;\n  enum bt_profile_connect_status hfp_connect;\n  enum bt_profile_connect_status hsp_connect;\n  enum bt_profile_connect_status a2dp_connect;\n  bt_bdaddr_t rmt_addr;\n  bt_profile_reconnect_mode reconnect_mode;\n  bt_profile_reconnect_mode saved_reconnect_mode;\n  a2dp_stream_t *stream;\n  // HfChannel *chan;\n  hf_chan_handle_t chan;\n#if defined(__HSP_ENABLE__)\n  HsChannel *hs_chan;\n#endif\n  uint16_t reconnect_cnt;\n  osTimerId connect_timer;\n  void (*connect_timer_cb)(void const *);\n\n  APP_BT_CONNECTING_STATE_E connectingState;\n};\n\n// reconnect = (INTERVAL+PAGETO)*CNT = (3000ms+5000ms)*15 = 120s\n#define APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS (3000)\n#define APP_BT_PROFILE_OPENNING_RECONNECT_RETRY_LIMIT_CNT (2)\n#define APP_BT_PROFILE_RECONNECT_RETRY_LIMIT_CNT (15)\n#define APP_BT_PROFILE_CONNECT_RETRY_MS (10000)\n\nstatic struct app_bt_profile_manager bt_profile_manager[BT_DEVICE_NUM];\n\nstatic int8_t app_bt_profile_reconnect_pending_process(void);\nvoid app_bt_connectable_mode_stop_reconnecting(void);\n\nbtif_accessible_mode_t g_bt_access_mode = BTIF_BAM_NOT_ACCESSIBLE;\n\n#define APP_BT_PROFILE_BOTH_SCAN_MS (11000)\n#define APP_BT_PROFILE_PAGE_SCAN_MS (4000)\n\nosTimerId app_bt_accessmode_timer = NULL;\nbtif_accessible_mode_t app_bt_accessmode_timer_argument =\n    BTIF_BAM_NOT_ACCESSIBLE;\nstatic int app_bt_accessmode_timehandler(void const *param);\nosTimerDef(APP_BT_ACCESSMODE_TIMER,\n           (void (*)(void const *))\n               app_bt_accessmode_timehandler); // define timers\n\n#define A2DP_CONN_CLOSED 10\n\n#ifdef __IAG_BLE_INCLUDE__\n#define APP_FAST_BLE_ADV_TIMEOUT_IN_MS 30000\nosTimerId app_fast_ble_adv_timeout_timer = NULL;\nstatic int app_fast_ble_adv_timeout_timehandler(void const *param);\nosTimerDef(APP_FAST_BLE_ADV_TIMEOUT_TIMER,\n           (void (*)(void const *))\n               app_fast_ble_adv_timeout_timehandler); // define timers\n\n/*---------------------------------------------------------------------------\n *            app_start_fast_connectable_ble_adv\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    start fast connectable BLE adv\n *\n * Parameters:\n *    advInterval - adv interval\n *\n * Return:\n *    void\n */\nstatic void app_start_fast_connectable_ble_adv(uint16_t advInterval);\n#endif\n\n#if defined(__INTERCONNECTION__)\nbtif_accessible_mode_t app_bt_get_current_access_mode(void) {\n  return g_bt_access_mode;\n}\n\nbool app_bt_is_connected() {\n  uint8_t i = 0;\n  bool connceted_value = false;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (bt_profile_manager[i].has_connected) {\n      connceted_value = true;\n      break;\n    }\n  }\n\n  TRACE(1, \"bt_is_connected is %d\", connceted_value);\n  return connceted_value;\n}\n#endif\n\nbool app_device_bt_is_connected() {\n  uint8_t i = 0;\n  bool connceted_value = false;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (bt_profile_manager[i].has_connected) {\n      connceted_value = true;\n      break;\n    }\n  }\n\n  //   TRACE(\"bt_is_connected : %d, a2dp : %d, hfp : %d\",\n  //   connceted_value,bt_profile_manager[i].a2dp_connect,bt_profile_manager[i].hfp_connect);\n  return connceted_value;\n}\n\nstatic void app_bt_precheck_before_starting_connecting(uint8_t isBtConnected);\n\nstatic void app_bt_accessmode_handler(btif_accessible_mode_t accMode) {\n  const btif_access_mode_info_t info = {\n      BTIF_BT_DEFAULT_INQ_SCAN_INTERVAL, BTIF_BT_DEFAULT_INQ_SCAN_WINDOW,\n      BTIF_BT_DEFAULT_PAGE_SCAN_INTERVAL, BTIF_BT_DEFAULT_PAGE_SCAN_WINDOW};\n\n  osapi_lock_stack();\n  if (accMode == BTIF_BAM_CONNECTABLE_ONLY) {\n    app_bt_accessmode_timer_argument = BTIF_BAM_GENERAL_ACCESSIBLE;\n    osTimerStart(app_bt_accessmode_timer, APP_BT_PROFILE_PAGE_SCAN_MS);\n  } else if (accMode == BTIF_BAM_GENERAL_ACCESSIBLE) {\n    app_bt_accessmode_timer_argument = BTIF_BAM_CONNECTABLE_ONLY;\n    osTimerStart(app_bt_accessmode_timer, APP_BT_PROFILE_BOTH_SCAN_MS);\n  }\n  app_bt_ME_SetAccessibleMode(accMode, &info);\n  TRACE(1, \"app_bt_accessmode_timehandler accMode=%x\", accMode);\n  osapi_unlock_stack();\n}\n\nstatic int app_bt_accessmode_timehandler(void const *param) {\n  btif_accessible_mode_t accMode = *(btif_accessible_mode_t *)(param);\n  app_bt_start_custom_function_in_bt_thread(\n      (uint32_t)accMode, 0, (uint32_t)app_bt_accessmode_handler);\n  return 0;\n}\n\nvoid app_bt_accessmode_set(btif_accessible_mode_t mode) {\n  const btif_access_mode_info_t info = {\n      BTIF_BT_DEFAULT_INQ_SCAN_INTERVAL, BTIF_BT_DEFAULT_INQ_SCAN_WINDOW,\n      BTIF_BT_DEFAULT_PAGE_SCAN_INTERVAL, BTIF_BT_DEFAULT_PAGE_SCAN_WINDOW};\n#if defined(IBRT)\n  return;\n#endif\n  TRACE(2, \"%s %d\", __func__, mode);\n  osapi_lock_stack();\n  g_bt_access_mode = mode;\n  if (g_bt_access_mode == BTIF_BAM_GENERAL_ACCESSIBLE) {\n    app_bt_accessmode_timehandler(&g_bt_access_mode);\n  } else {\n    osTimerStop(app_bt_accessmode_timer);\n    app_bt_ME_SetAccessibleMode(g_bt_access_mode, &info);\n    TRACE(1, \"app_bt_accessmode_set access_mode=%x\", g_bt_access_mode);\n  }\n  osapi_unlock_stack();\n}\n\nextern \"C\" uint8_t app_bt_get_act_cons(void) {\n  int activeCons;\n\n  osapi_lock_stack();\n  activeCons = btif_me_get_activeCons();\n  osapi_unlock_stack();\n  TRACE(2, \"%s %d\", __func__, activeCons);\n  return activeCons;\n}\nenum {\n  INITIATE_PAIRING_NONE = 0,\n  INITIATE_PAIRING_RUN = 1,\n};\nstatic uint8_t initiate_pairing = INITIATE_PAIRING_NONE;\nvoid app_bt_connectable_state_set(uint8_t set) { initiate_pairing = set; }\nbool is_app_bt_pairing_running(void) {\n  return (initiate_pairing == INITIATE_PAIRING_RUN) ? (true) : (false);\n}\n#define APP_DISABLE_PAGE_SCAN_AFTER_CONN\n#ifdef APP_DISABLE_PAGE_SCAN_AFTER_CONN\nosTimerId disable_page_scan_check_timer = NULL;\nstatic void disable_page_scan_check_timer_handler(void const *param);\nosTimerDef(DISABLE_PAGE_SCAN_CHECK_TIMER,\n           (void (*)(void const *))\n               disable_page_scan_check_timer_handler); // define timers\nstatic void disable_page_scan_check_timer_handler(void const *param) {\n#ifdef __BT_ONE_BRING_TWO__\n  if ((btif_me_get_activeCons() > 1) &&\n      (initiate_pairing == INITIATE_PAIRING_NONE)) {\n#else\n  if ((btif_me_get_activeCons() > 0) &&\n      (initiate_pairing == INITIATE_PAIRING_NONE)) {\n#endif\n    app_bt_accessmode_set_req(BTIF_BAM_NOT_ACCESSIBLE);\n  }\n}\n\nstatic void disable_page_scan_check_timer_start(void) {\n  if (disable_page_scan_check_timer == NULL) {\n    disable_page_scan_check_timer = osTimerCreate(\n        osTimer(DISABLE_PAGE_SCAN_CHECK_TIMER), osTimerOnce, NULL);\n  }\n  osTimerStart(disable_page_scan_check_timer, 4000);\n}\n\n#endif\nvoid PairingTransferToConnectable(void) {\n  int activeCons;\n  osapi_lock_stack();\n  activeCons = btif_me_get_activeCons();\n  osapi_unlock_stack();\n  TRACE(1, \"%s\", __func__);\n\n  app_bt_connectable_state_set(INITIATE_PAIRING_NONE);\n  if (activeCons == 0) {\n    TRACE(0, \"!!!PairingTransferToConnectable  BAM_CONNECTABLE_ONLY\\n\");\n    app_bt_accessmode_set_req(BTIF_BAM_CONNECTABLE_ONLY);\n  }\n}\nint app_bt_get_audio_up_id(void) {\n  uint8_t i;\n  btif_remote_device_t *remDev = NULL;\n  btif_cmgr_handler_t *cmgrHandler;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    remDev = btif_me_enumerate_remote_devices(i);\n    if (remDev != NULL) {\n      cmgrHandler = btif_cmgr_get_acl_handler(remDev);\n      if (btif_cmgr_is_audio_up(cmgrHandler) == true)\n        break;\n    }\n  }\n\n  return i;\n}\n#define HFP_DEBUG\nvoid hfp_call_state_checker(void);\n\n#if defined(IBRT)\nint app_bt_ibrt_profile_checker(const char *str, btif_remote_device_t *remDev,\n                                btif_cmgr_handler_t *cmgrHandler,\n                                a2dp_stream_t *a2dp_stream,\n                                hf_chan_handle_t hf_channel) {\n  if (remDev && cmgrHandler) {\n    TRACE(6, \"checker: %s remDev state:%d mode:%d role:%d sniffInterval:%d/%d\",\n          str, btif_me_get_remote_device_state(remDev),\n          btif_me_get_remote_device_mode(remDev),\n          btif_me_get_remote_device_role(remDev),\n          btif_cmgr_get_cmgrhandler_sniff_Interval(cmgrHandler),\n          btif_cmgr_get_cmgrhandler_sniff_info(cmgrHandler)->maxInterval);\n\n    TRACE(2, \"checker: %s remDev:%p remote_dev_address:\", str, remDev);\n    DUMP8(\"0x%02x \", btif_me_get_remote_device_bdaddr(remDev)->address,\n          BTIF_BD_ADDR_SIZE);\n  } else {\n    TRACE(3, \"checker: %s remDev:%p cmgrHandler:%p\", str, remDev, cmgrHandler);\n  }\n\n  if (a2dp_stream) {\n    TRACE(1, \"a2dp State:%d\", btif_a2dp_get_stream_state(a2dp_stream));\n    if (btif_a2dp_get_stream_state(a2dp_stream) > BTIF_AVDTP_STRM_STATE_IDLE) {\n      TRACE(1, \"a2dp cmgrHandler remDev:%p\",\n            btif_a2dp_get_stream_devic_cmgrHandler_remdev(a2dp_stream));\n    }\n  } else {\n    TRACE(1, \"%s a2dp stream NULL\", str);\n  }\n  if (hf_channel) {\n    TRACE(4, \"hf_channel Connected:%d IsAudioUp:%d/%d remDev:%p\",\n          btif_hf_is_acl_connected(hf_channel), app_bt_device.hf_audio_state[0],\n          btif_hf_check_AudioConnect_status(hf_channel),\n          btif_hf_cmgr_get_remote_device(hf_channel));\n  } else {\n    TRACE(1, \"%s hf_channel NULL\", str);\n  }\n  return 0;\n}\n#endif\n\nint app_bt_state_checker(void) {\n  btif_remote_device_t *remDev = NULL;\n  btif_cmgr_handler_t *cmgrHandler;\n\n  osapi_lock_stack();\n\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (app_tws_ibrt_mobile_link_connected()) {\n    TRACE(1, \"checker: IBRT_MASTER activeCons:%d\", btif_me_get_activeCons());\n    remDev = p_ibrt_ctrl->p_tws_remote_dev;\n    if (remDev != NULL) {\n      cmgrHandler = btif_cmgr_get_acl_handler(remDev);\n      if (cmgrHandler) {\n        app_bt_ibrt_profile_checker(\"tws peers\", remDev, cmgrHandler, NULL,\n                                    NULL);\n      } else {\n        TRACE(0, \"checker: cmgrhandler not handle p_tws_remote_dev!\");\n      }\n    } else {\n      TRACE(0, \"checker: tws_remote_dev is NULL!\");\n    }\n\n    remDev = p_ibrt_ctrl->p_mobile_remote_dev;\n    if (remDev != NULL) {\n      cmgrHandler = btif_cmgr_get_acl_handler(remDev);\n      if (cmgrHandler) {\n        app_bt_ibrt_profile_checker(\n            \"master mobile\", remDev, cmgrHandler,\n            app_bt_device.a2dp_connected_stream[0],\n            app_bt_device.hf_conn_flag[0] ? app_bt_device.hf_channel[0] : NULL);\n      } else {\n        TRACE(0, \"checker: cmgrhandler not handle mobile_remote_dev\");\n      }\n    } else {\n      TRACE(0, \"checker: mobile_remote_dev is NULL!\");\n    }\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    TRACE(1, \"checker: IBRT_SLAVE activeCons:%d\", btif_me_get_activeCons());\n    remDev = p_ibrt_ctrl->p_tws_remote_dev;\n    if (remDev != NULL) {\n      cmgrHandler = btif_cmgr_get_acl_handler(remDev);\n      if (cmgrHandler) {\n        app_bt_ibrt_profile_checker(\"tws peers\", remDev, cmgrHandler, NULL,\n                                    NULL);\n      } else {\n        TRACE(0, \"checker: cmgrhandler not handle p_tws_remote_dev!\");\n      }\n    } else {\n      TRACE(0, \"checker: tws_remote_dev is NULL!\");\n    }\n    if (app_ibrt_ui_is_profile_exchanged()) {\n      app_bt_ibrt_profile_checker(\n          \"ibrt mobile\", NULL, NULL, app_bt_device.a2dp_connected_stream[0],\n          app_bt_device.hf_conn_flag[0] ? app_bt_device.hf_channel[0] : NULL);\n    }\n  } else {\n    TRACE(1, \"checker: IBRT_UNKNOW activeCons:%d\", btif_me_get_activeCons());\n  }\n  app_ibrt_if_ctx_checker();\n#if defined(ENHANCED_STACK)\n  btif_me_cobuf_state_dump();\n  btif_me_hcibuff_state_dump();\n#endif\n  // BT controller state checker\n  ASSERT(bt_drv_reg_op_check_bt_controller_state(), \"BT controller dead!\");\n#else\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    remDev = btif_me_enumerate_remote_devices(i);\n    if (remDev != NULL) {\n      cmgrHandler = btif_cmgr_get_acl_handler(remDev);\n      if (cmgrHandler) {\n        TRACE(8,\n              \"checker: id:%d state:%d mode:%d role:%d cmghdl:%p \"\n              \"sniffInterva:%d/%d IsAudioUp:%d\",\n              i, btif_me_get_remote_device_state(remDev),\n              btif_me_get_remote_device_mode(remDev),\n              btif_me_get_remote_device_role(remDev), cmgrHandler,\n              btif_cmgr_get_cmgrhandler_sniff_Interval(cmgrHandler),\n              btif_cmgr_get_cmgrhandler_sniff_info(cmgrHandler)->maxInterval,\n              app_bt_device.hf_audio_state[i]);\n        DUMP8(\"0x%02x \", btif_me_get_remote_device_bdaddr(remDev)->address,\n              BTIF_BD_ADDR_SIZE);\n        TRACE(4, \"remDev:%p a2dp State:%d hf_channel Connected:%d remDev:%p \",\n              remDev,\n              app_bt_device.a2dp_connected_stream[i]\n                  ? btif_a2dp_get_stream_state(\n                        app_bt_device.a2dp_connected_stream[i])\n                  : BTIF_A2DP_STREAM_STATE_CLOSED,\n              app_bt_device.hf_conn_flag[i],\n              app_bt_device.hf_conn_flag[i]\n                  ? (btif_remote_device_t *)btif_hf_cmgr_get_remote_device(\n                        app_bt_device.hf_channel[i])\n                  : NULL);\n      }\n    } else {\n      TRACE(1, \"checker: id:%d remDev is NULL!\", i);\n    }\n\n#ifdef __AI_VOICE__\n    TRACE(1, \"ai_setup_complete %d\", app_ai_is_setup_complete());\n#endif\n#ifdef IS_MULTI_AI_ENABLED\n    TRACE(1, \"current_spec %d\", app_ai_manager_get_current_spec());\n#endif\n#if defined(__HSP_ENABLE__)\n    TRACE(2, \"hs_channel Connected:%d remDev:%p \",\n          app_bt_device.hs_conn_flag[i],\n          app_bt_device.hs_channel[i].cmgrHandler.remDev);\n#endif\n    TRACE(2, \"%s btif_me_get_activeCons = %d\", __func__,\n          btif_me_get_activeCons());\n#ifdef HFP_DEBUG\n    hfp_call_state_checker();\n#endif\n  }\n#if defined(ENHANCED_STACK)\n  btif_me_cobuf_state_dump();\n  btif_me_hcibuff_state_dump();\n#endif\n#endif\n  osapi_unlock_stack();\n\n  return 0;\n}\n\nstatic uint8_t app_bt_get_devId_from_RemDev(btif_remote_device_t *remDev) {\n  uint8_t connectedDevId = 0;\n  for (uint8_t devId = 0; devId < BT_DEVICE_NUM; devId++) {\n    if (btif_me_enumerate_remote_devices(devId) == remDev) {\n      TRACE(2, \"%s %d\", __func__, devId);\n      connectedDevId = devId;\n      break;\n    }\n  }\n\n  return connectedDevId;\n}\nvoid app_bt_accessible_manager_process(const btif_event_t *Event) {\n#if defined(IBRT)\n  // IBRT device's access mode will be controlled by UI\n  return;\n#else\n  btif_event_type_t etype = btif_me_get_callback_event_type(Event);\n#ifdef __BT_ONE_BRING_TWO__\n  static uint8_t opening_reconnect_cnf_cnt = 0;\n  // uint8_t disconnectedDevId =\n  // app_bt_get_devId_from_RemDev(btif_me_get_callback_event_rem_dev( Event));\n\n  if (app_bt_profile_connect_openreconnecting(NULL)) {\n    if (etype == BTIF_BTEVENT_LINK_CONNECT_CNF) {\n      opening_reconnect_cnf_cnt++;\n    }\n    if (record2_avalible) {\n      if (opening_reconnect_cnf_cnt < 2) {\n        return;\n      }\n    }\n  }\n#endif\n  switch (etype) {\n  case BTIF_BTEVENT_LINK_CONNECT_CNF:\n  case BTIF_BTEVENT_LINK_CONNECT_IND:\n    TRACE(1, \"BTEVENT_LINK_CONNECT_IND/CNF activeCons:%d\",\n          btif_me_get_activeCons());\n#if defined(__BTIF_EARPHONE__)\n    app_stop_10_second_timer(APP_PAIR_TIMER_ID);\n#endif\n#ifdef __BT_ONE_BRING_TWO__\n    if (btif_me_get_activeCons() == 0) {\n#ifdef __EARPHONE_STAY_BOTH_SCAN__\n      app_bt_accessmode_set_req(BTIF_BT_DEFAULT_ACCESS_MODE_PAIR);\n#else\n      app_bt_accessmode_set_req(BTIF_BAM_CONNECTABLE_ONLY);\n#endif\n    } else if (btif_me_get_activeCons() == 1) {\n      app_bt_accessmode_set_req(BTIF_BAM_CONNECTABLE_ONLY);\n    } else if (btif_me_get_activeCons() >= 2) {\n      app_bt_accessmode_set_req(BTIF_BAM_NOT_ACCESSIBLE);\n    }\n#else\n    if (btif_me_get_activeCons() == 0) {\n#ifdef __EARPHONE_STAY_BOTH_SCAN__\n      app_bt_accessmode_set_req(BTIF_BT_DEFAULT_ACCESS_MODE_PAIR);\n#else\n      app_bt_accessmode_set_req(BTIF_BAM_CONNECTABLE_ONLY);\n#endif\n    } else if (btif_me_get_activeCons() >= 1) {\n      app_bt_accessmode_set_req(BTIF_BAM_NOT_ACCESSIBLE);\n    }\n#endif\n    break;\n  case BTIF_BTEVENT_LINK_DISCONNECT:\n    TRACE(1, \"DISCONNECT activeCons:%d\", btif_me_get_activeCons());\n#ifdef __EARPHONE_STAY_BOTH_SCAN__\n#ifdef __BT_ONE_BRING_TWO__\n    if (btif_me_get_activeCons() == 0) {\n      app_bt_accessmode_set_req(BTIF_BT_DEFAULT_ACCESS_MODE_PAIR);\n    } else if (btif_me_get_activeCons() == 1) {\n      app_bt_accessmode_set_req(BTIF_BAM_CONNECTABLE_ONLY);\n    } else if (btif_me_get_activeCons() >= 2) {\n      app_bt_accessmode_set_req(BTIF_BAM_NOT_ACCESSIBLE);\n    }\n#else\n    app_bt_accessmode_set_req(BTIF_BT_DEFAULT_ACCESS_MODE_PAIR);\n#endif\n#else\n    app_bt_accessmode_set_req(BTIF_BAM_CONNECTABLE_ONLY);\n#endif\n    break;\n#ifdef __BT_ONE_BRING_TWO__\n  case BTIF_BTEVENT_SCO_CONNECT_IND:\n  case BTIF_BTEVENT_SCO_CONNECT_CNF:\n    if (btif_me_get_activeCons() == 1) {\n      app_bt_accessmode_set_req(BTIF_BAM_NOT_ACCESSIBLE);\n    }\n    break;\n  case BTIF_BTEVENT_SCO_DISCONNECT:\n    if (btif_me_get_activeCons() == 1) {\n      app_bt_accessmode_set_req(BTIF_BAM_CONNECTABLE_ONLY);\n    }\n    break;\n#endif\n  default:\n    break;\n  }\n#endif\n}\n\n#define APP_BT_SWITCHROLE_LIMIT (2)\n// #define __SET_OUR_AS_MASTER__\n\nvoid app_bt_role_manager_process(const btif_event_t *Event) {\n#if defined(IBRT) || defined(APP_LINEIN_A2DP_SOURCE) ||                        \\\n    defined(APP_I2S_A2DP_SOURCE) || defined(__APP_A2DP_SOURCE__)\n  return;\n#else\n  static btif_remote_device_t *opRemDev = NULL;\n  static uint8_t switchrole_cnt = 0;\n  btif_remote_device_t *remDev = NULL;\n  btif_event_type_t etype = btif_me_get_callback_event_type(Event);\n  // on phone connecting\n  switch (etype) {\n  case BTIF_BTEVENT_LINK_CONNECT_IND:\n    if (btif_me_get_callback_event_err_code(Event) == BTIF_BEC_NO_ERROR) {\n      if (btif_me_get_activeCons() == 1) {\n        switch (btif_me_get_callback_event_rem_dev_role(Event)) {\n#if defined(__SET_OUR_AS_MASTER__)\n        case BTIF_BCR_SLAVE:\n        case BTIF_BCR_PSLAVE:\n#else\n        case BTIF_BCR_MASTER:\n        case BTIF_BCR_PMASTER:\n#endif\n          TRACE(1, \"CONNECT_IND try to role %p\\n\",\n                btif_me_get_callback_event_rem_dev(Event));\n          // curr connectrot try to role\n          opRemDev = btif_me_get_callback_event_rem_dev(Event);\n          switchrole_cnt = 0;\n          app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                  BTIF_BLP_MASTER_SLAVE_SWITCH |\n                                      BTIF_BLP_SNIFF_MODE);\n          break;\n#if defined(__SET_OUR_AS_MASTER__)\n        case BTIF_BCR_MASTER:\n        case BTIF_BCR_PMASTER:\n#else\n        case BTIF_BCR_SLAVE:\n        case BTIF_BCR_PSLAVE:\n#endif\n        case BTIF_BCR_ANY:\n        case BTIF_BCR_UNKNOWN:\n        default:\n          TRACE(1, \"CONNECT_IND disable role %p\\n\",\n                btif_me_get_callback_event_rem_dev(Event));\n          // disable roleswitch when 1 connect\n          app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                  BTIF_BLP_SNIFF_MODE);\n          break;\n        }\n        // set next connector to master\n        app_bt_ME_SetConnectionRole(BTIF_BCR_MASTER);\n      } else if (btif_me_get_activeCons() > 1) {\n        switch (btif_me_get_callback_event_rem_dev_role(Event)) {\n        case BTIF_BCR_MASTER:\n        case BTIF_BCR_PMASTER:\n          TRACE(1, \"CONNECT_IND disable role %p\\n\",\n                btif_me_get_callback_event_rem_dev(Event));\n          // disable roleswitch\n          app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                  BTIF_BLP_SNIFF_MODE);\n          break;\n        case BTIF_BCR_SLAVE:\n        case BTIF_BCR_PSLAVE:\n        case BTIF_BCR_ANY:\n        case BTIF_BCR_UNKNOWN:\n        default:\n          // disconnect slave\n          TRACE(1, \"CONNECT_IND disconnect slave %p\\n\",\n                btif_me_get_callback_event_rem_dev(Event));\n          app_bt_MeDisconnectLink(btif_me_get_callback_event_rem_dev(Event));\n          break;\n        }\n        // set next connector to master\n        app_bt_ME_SetConnectionRole(BTIF_BCR_MASTER);\n      }\n    }\n    break;\n  case BTIF_BTEVENT_LINK_CONNECT_CNF:\n    if (btif_me_get_activeCons() == 1) {\n      switch (btif_me_get_callback_event_rem_dev_role(Event)) {\n#if defined(__SET_OUR_AS_MASTER__)\n      case BTIF_BCR_SLAVE:\n      case BTIF_BCR_PSLAVE:\n#else\n      case BTIF_BCR_MASTER:\n      case BTIF_BCR_PMASTER:\n#endif\n        TRACE(1, \"CONNECT_CNF try to role %p\\n\",\n              btif_me_get_callback_event_rem_dev(Event));\n        // curr connectrot try to role\n        opRemDev = btif_me_get_callback_event_rem_dev(Event);\n        switchrole_cnt = 0;\n        app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                BTIF_BLP_MASTER_SLAVE_SWITCH |\n                                    BTIF_BLP_SNIFF_MODE);\n        app_bt_ME_SwitchRole(btif_me_get_callback_event_rem_dev(Event));\n        break;\n#if defined(__SET_OUR_AS_MASTER__)\n      case BTIF_BCR_MASTER:\n      case BTIF_BCR_PMASTER:\n#else\n      case BTIF_BCR_SLAVE:\n      case BTIF_BCR_PSLAVE:\n#endif\n      case BTIF_BCR_ANY:\n      case BTIF_BCR_UNKNOWN:\n      default:\n        TRACE(1, \"CONNECT_CNF disable role %p\\n\",\n              btif_me_get_callback_event_rem_dev(Event));\n        // disable roleswitch\n        app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                BTIF_BLP_SNIFF_MODE);\n        break;\n      }\n      // set next connector to master\n      app_bt_ME_SetConnectionRole(BTIF_BCR_MASTER);\n    } else if (btif_me_get_activeCons() > 1) {\n      switch (btif_me_get_callback_event_rem_dev_role(Event)) {\n      case BTIF_BCR_MASTER:\n      case BTIF_BCR_PMASTER:\n        TRACE(1, \"CONNECT_CNF disable role %p\\n\",\n              btif_me_get_callback_event_rem_dev(Event));\n        // disable roleswitch\n        app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                BTIF_BLP_SNIFF_MODE);\n        break;\n      case BTIF_BCR_SLAVE:\n      case BTIF_BCR_ANY:\n      case BTIF_BCR_UNKNOWN:\n      default:\n        // disconnect slave\n        TRACE(1, \"CONNECT_CNF disconnect slave %p\\n\",\n              btif_me_get_callback_event_rem_dev(Event));\n        app_bt_MeDisconnectLink(btif_me_get_callback_event_rem_dev(Event));\n        break;\n      }\n      // set next connector to master\n      app_bt_ME_SetConnectionRole(BTIF_BCR_MASTER);\n    }\n    break;\n  case BTIF_BTEVENT_LINK_DISCONNECT:\n    if (opRemDev == btif_me_get_callback_event_rem_dev(Event)) {\n      opRemDev = NULL;\n      switchrole_cnt = 0;\n    }\n    if (btif_me_get_activeCons() == 0) {\n      for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n        if (app_bt_device.a2dp_connected_stream[i])\n          app_bt_A2DP_SetMasterRole(app_bt_device.a2dp_connected_stream[i],\n                                    FALSE);\n        app_bt_HF_SetMasterRole(app_bt_device.hf_channel[i], FALSE);\n      }\n      app_bt_ME_SetConnectionRole(BTIF_BCR_ANY);\n    } else if (btif_me_get_activeCons() == 1) {\n      // set next connector to master\n      app_bt_ME_SetConnectionRole(BTIF_BCR_MASTER);\n    }\n    break;\n  case BTIF_BTEVENT_ROLE_CHANGE:\n    if (opRemDev == btif_me_get_callback_event_rem_dev(Event)) {\n      switch (btif_me_get_callback_event_role_change_new_role(Event)) {\n#if defined(__SET_OUR_AS_MASTER__)\n      case BTIF_BCR_SLAVE:\n#else\n      case BTIF_BCR_MASTER:\n#endif\n        if (++switchrole_cnt <= APP_BT_SWITCHROLE_LIMIT) {\n          app_bt_ME_SwitchRole(btif_me_get_callback_event_rem_dev(Event));\n        } else {\n#if defined(__SET_OUR_AS_MASTER__)\n          TRACE(2, \"ROLE TO MASTER FAILED remDev %p cnt:%d\\n\",\n                btif_me_get_callback_event_rem_dev(Event), switchrole_cnt);\n#else\n          TRACE(2, \"ROLE TO SLAVE FAILED remDev %p cnt:%d\\n\",\n                btif_me_get_callback_event_rem_dev(Event), switchrole_cnt);\n#endif\n          opRemDev = NULL;\n          switchrole_cnt = 0;\n        }\n        break;\n#if defined(__SET_OUR_AS_MASTER__)\n      case BTIF_BCR_MASTER:\n        TRACE(2, \"ROLE TO MASTER SUCCESS remDev %p cnt:%d\\n\",\n              btif_me_get_callback_event_rem_dev(Event), switchrole_cnt);\n#else\n      case BTIF_BCR_SLAVE:\n        TRACE(2, \"ROLE TO SLAVE SUCCESS remDev %p cnt:%d\\n\",\n              btif_me_get_callback_event_rem_dev(Event), switchrole_cnt);\n#endif\n        opRemDev = NULL;\n        switchrole_cnt = 0;\n        app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                BTIF_BLP_SNIFF_MODE);\n        break;\n      case BTIF_BCR_ANY:\n        break;\n      case BTIF_BCR_UNKNOWN:\n        break;\n      default:\n        break;\n      }\n    }\n\n    if (btif_me_get_activeCons() > 1) {\n      uint8_t slave_cnt = 0;\n      for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n        remDev = btif_me_enumerate_remote_devices(i);\n        if (btif_me_get_current_role(remDev) == BTIF_BCR_SLAVE) {\n          slave_cnt++;\n        }\n      }\n      if (slave_cnt > 1) {\n        TRACE(1, \"ROLE_CHANGE disconnect slave %p\\n\",\n              btif_me_get_callback_event_rem_dev(Event));\n        app_bt_MeDisconnectLink(btif_me_get_callback_event_rem_dev(Event));\n      }\n    }\n    break;\n  default:\n    break;\n  }\n#endif\n}\n\nvoid app_bt_role_manager_process_dual_slave(const btif_event_t *Event) {\n#if defined(IBRT) || defined(APP_LINEIN_A2DP_SOURCE) ||                        \\\n    defined(APP_I2S_A2DP_SOURCE) || defined(__APP_A2DP_SOURCE__)\n  return;\n#else\n  static btif_remote_device_t *opRemDev = NULL;\n  static uint8_t switchrole_cnt = 0;\n  // btif_remote_device_t *remDev = NULL;\n  // on phone connecting\n  switch (btif_me_get_callback_event_type(Event)) {\n  case BTIF_BTEVENT_LINK_CONNECT_IND:\n  case BTIF_BTEVENT_LINK_CONNECT_CNF:\n    if (btif_me_get_callback_event_err_code(Event) == BTIF_BEC_NO_ERROR) {\n      switch (btif_me_get_callback_event_rem_dev_role(Event)) {\n#if defined(__SET_OUR_AS_MASTER__)\n      case BTIF_BCR_SLAVE:\n      case BTIF_BCR_PSLAVE:\n#else\n      case BTIF_BCR_MASTER:\n      case BTIF_BCR_PMASTER:\n#endif\n        TRACE(1, \"CONNECT_IND/CNF try to role %p\\n\",\n              btif_me_get_callback_event_rem_dev(Event));\n        opRemDev = btif_me_get_callback_event_rem_dev(Event);\n        switchrole_cnt = 0;\n        app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                BTIF_BLP_MASTER_SLAVE_SWITCH |\n                                    BTIF_BLP_SNIFF_MODE);\n        app_bt_ME_SwitchRole(btif_me_get_callback_event_rem_dev(Event));\n        break;\n#if defined(__SET_OUR_AS_MASTER__)\n      case BTIF_BCR_MASTER:\n      case BTIF_BCR_PMASTER:\n#else\n      case BTIF_BCR_SLAVE:\n      case BTIF_BCR_PSLAVE:\n#endif\n      case BTIF_BCR_ANY:\n      case BTIF_BCR_UNKNOWN:\n      default:\n        TRACE(1, \"CONNECT_IND disable role %p\\n\",\n              btif_me_get_callback_event_rem_dev(Event));\n        app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                BTIF_BLP_SNIFF_MODE);\n        break;\n      }\n      app_bt_ME_SetConnectionRole(BTIF_BCR_SLAVE);\n    }\n    break;\n  case BTIF_BTEVENT_LINK_DISCONNECT:\n    if (opRemDev == btif_me_get_callback_event_rem_dev(Event)) {\n      opRemDev = NULL;\n      switchrole_cnt = 0;\n    }\n    if (btif_me_get_activeCons() == 0) {\n      for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n        if (app_bt_device.a2dp_connected_stream[i])\n          app_bt_A2DP_SetMasterRole(app_bt_device.a2dp_connected_stream[i],\n                                    FALSE);\n        app_bt_HF_SetMasterRole(app_bt_device.hf_channel[i], FALSE);\n      }\n      app_bt_ME_SetConnectionRole(BTIF_BCR_ANY);\n    } else if (btif_me_get_activeCons() == 1) {\n      app_bt_ME_SetConnectionRole(BTIF_BCR_SLAVE);\n    }\n    break;\n  case BTIF_BTEVENT_ROLE_CHANGE:\n    if (opRemDev == btif_me_get_callback_event_rem_dev(Event)) {\n      switch (btif_me_get_callback_event_role_change_new_role(Event)) {\n#if defined(__SET_OUR_AS_MASTER__)\n      case BTIF_BCR_SLAVE:\n#else\n      case BTIF_BCR_MASTER:\n#endif\n        if (++switchrole_cnt <= APP_BT_SWITCHROLE_LIMIT) {\n          TRACE(1, \"ROLE_CHANGE try to role again: %d\", switchrole_cnt);\n          app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                                  BTIF_BLP_MASTER_SLAVE_SWITCH |\n                                      BTIF_BLP_SNIFF_MODE);\n          app_bt_ME_SwitchRole(btif_me_get_callback_event_rem_dev(Event));\n        } else {\n#if defined(__SET_OUR_AS_MASTER__)\n          TRACE(2, \"ROLE TO MASTER FAILED remDev %p cnt:%d\\n\",\n                btif_me_get_callback_event_rem_dev(Event), switchrole_cnt);\n#else\n          TRACE(2, \"ROLE TO SLAVE FAILED remDev %p cnt:%d\\n\",\n                btif_me_get_callback_event_rem_dev(Event), switchrole_cnt);\n#endif\n          opRemDev = NULL;\n          switchrole_cnt = 0;\n        }\n        break;\n#if defined(__SET_OUR_AS_MASTER__)\n      case BTIF_BCR_MASTER:\n        TRACE(2, \"ROLE TO MASTER SUCCESS remDev %p cnt:%d\\n\",\n              btif_me_get_callback_event_rem_dev(Event), switchrole_cnt);\n#else\n      case BTIF_BCR_SLAVE:\n        TRACE(2, \"ROLE TO SLAVE SUCCESS remDev %p cnt:%d\\n\",\n              btif_me_get_callback_event_rem_dev(Event), switchrole_cnt);\n#endif\n        opRemDev = NULL;\n        switchrole_cnt = 0;\n        // workaround for power reset opening reconnect sometime unsuccessfully\n        // in sniff mode, only after authentication completes, enable sniff\n        // mode.\n        opRemDev = btif_me_get_callback_event_rem_dev(Event);\n        if (btif_me_get_remote_device_auth_state(opRemDev) ==\n            BTIF_BAS_AUTHENTICATED) {\n          app_bt_Me_SetLinkPolicy(opRemDev, BTIF_BLP_SNIFF_MODE);\n        } else {\n          app_bt_Me_SetLinkPolicy(opRemDev, BTIF_BLP_DISABLE_ALL);\n        }\n        break;\n      case BTIF_BCR_ANY:\n        break;\n      case BTIF_BCR_UNKNOWN:\n        break;\n      default:\n        break;\n      }\n    }\n    break;\n  }\n#endif\n}\n\nstatic int app_bt_sniff_manager_init(void) {\n  btif_sniff_info_t sniffInfo;\n  btif_remote_device_t *remDev = NULL;\n\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    remDev = btif_me_enumerate_remote_devices(i);\n    sniffInfo.maxInterval = BTIF_CMGR_SNIFF_MAX_INTERVAL;\n    sniffInfo.minInterval = BTIF_CMGR_SNIFF_MIN_INTERVAL;\n    sniffInfo.attempt = BTIF_CMGR_SNIFF_ATTEMPT;\n    sniffInfo.timeout = BTIF_CMGR_SNIFF_TIMEOUT;\n    app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(&sniffInfo, remDev);\n    app_bt_HF_EnableSniffMode(app_bt_device.hf_channel[i], FALSE);\n#if defined(__HSP_ENABLE__)\n    app_bt_HS_EnableSniffMode(&app_bt_device.hs_channel[i], FALSE);\n#endif\n  }\n\n  return 0;\n}\n\nvoid app_bt_sniff_config(btif_remote_device_t *remDev) {\n  btif_sniff_info_t sniffInfo;\n  sniffInfo.maxInterval = BTIF_CMGR_SNIFF_MAX_INTERVAL;\n  sniffInfo.minInterval = BTIF_CMGR_SNIFF_MIN_INTERVAL;\n  sniffInfo.attempt = BTIF_CMGR_SNIFF_ATTEMPT;\n  sniffInfo.timeout = BTIF_CMGR_SNIFF_TIMEOUT;\n  app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(&sniffInfo, remDev);\n#if !defined(IBRT)\n  if (btif_me_get_activeCons() > 1) {\n    btif_remote_device_t *tmpRemDev = NULL;\n    btif_cmgr_handler_t *currbtif_cmgr_handler_t = NULL;\n    btif_cmgr_handler_t *otherbtif_cmgr_handler_t = NULL;\n    currbtif_cmgr_handler_t = btif_cmgr_get_conn_ind_handler(remDev);\n    for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n      tmpRemDev = btif_me_enumerate_remote_devices(i);\n      if (remDev != tmpRemDev && tmpRemDev != NULL) {\n        otherbtif_cmgr_handler_t = btif_cmgr_get_acl_handler(tmpRemDev);\n        if (otherbtif_cmgr_handler_t && currbtif_cmgr_handler_t) {\n          if (btif_cmgr_get_cmgrhandler_sniff_info(otherbtif_cmgr_handler_t)\n                  ->maxInterval ==\n              btif_cmgr_get_cmgrhandler_sniff_info(currbtif_cmgr_handler_t)\n                  ->maxInterval) {\n            sniffInfo.maxInterval =\n                btif_cmgr_get_cmgrhandler_sniff_info(otherbtif_cmgr_handler_t)\n                    ->maxInterval -\n                20;\n            sniffInfo.minInterval =\n                btif_cmgr_get_cmgrhandler_sniff_info(otherbtif_cmgr_handler_t)\n                    ->minInterval -\n                20;\n            sniffInfo.attempt = BTIF_CMGR_SNIFF_ATTEMPT;\n            sniffInfo.timeout = BTIF_CMGR_SNIFF_TIMEOUT;\n            app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(&sniffInfo, remDev);\n          }\n        }\n        break;\n      } else {\n        TRACE(3,\n              \"%s:enumerate i:%d remDev is NULL, param remDev:%p, this may \"\n              \"cause error!\",\n              __func__, i, remDev);\n      }\n    }\n  }\n#endif\n}\n\nvoid app_bt_sniff_manager_process(const btif_event_t *Event) {\n  static btif_remote_device_t *opRemDev = NULL;\n  btif_remote_device_t *remDev = NULL;\n  btif_cmgr_handler_t *currbtif_cmgr_handler_t = NULL;\n  btif_cmgr_handler_t *otherbtif_cmgr_handler_t = NULL;\n\n  btif_sniff_info_t sniffInfo;\n\n  if (!besbt_cfg.sniff)\n    return;\n\n  switch (btif_me_get_callback_event_type(Event)) {\n  case BTIF_BTEVENT_LINK_CONNECT_IND:\n    break;\n  case BTIF_BTEVENT_LINK_CONNECT_CNF:\n    break;\n  case BTIF_BTEVENT_LINK_DISCONNECT:\n    if (opRemDev == btif_me_get_callback_event_rem_dev(Event)) {\n      opRemDev = NULL;\n    }\n    sniffInfo.maxInterval = BTIF_CMGR_SNIFF_MAX_INTERVAL;\n    sniffInfo.minInterval = BTIF_CMGR_SNIFF_MIN_INTERVAL;\n    sniffInfo.attempt = BTIF_CMGR_SNIFF_ATTEMPT;\n    sniffInfo.timeout = BTIF_CMGR_SNIFF_TIMEOUT;\n    app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(\n        &sniffInfo, btif_me_get_callback_event_rem_dev(Event));\n    break;\n  case BTIF_BTEVENT_MODE_CHANGE:\n\n    /*\n    if(Event->p.modeChange.curMode == BLM_SNIFF_MODE){\n        currbtif_cmgr_handler_t =\n    btif_cmgr_get_acl_handler(btif_me_get_callback_event_rem_dev( Event)); if\n    (Event->p.modeChange.interval > CMGR_SNIFF_MAX_INTERVAL){ if (!opRemDev){\n                    opRemDev = currbtif_cmgr_handler_t->remDev;\n                }\n                currbtif_cmgr_handler_t->sniffInfo.maxInterval =\n    CMGR_SNIFF_MAX_INTERVAL; currbtif_cmgr_handler_t->sniffInfo.minInterval =\n    CMGR_SNIFF_MIN_INTERVAL; currbtif_cmgr_handler_t->sniffInfo.attempt =\n    CMGR_SNIFF_ATTEMPT; currbtif_cmgr_handler_t->sniffInfo.timeout =\n    CMGR_SNIFF_TIMEOUT;\n                app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(&currbtif_cmgr_handler_t->sniffInfo,btif_me_get_callback_event_rem_dev(\n    Event)); app_bt_ME_StopSniff(currbtif_cmgr_handler_t->remDev); }else{ if\n    (currbtif_cmgr_handler_t){ currbtif_cmgr_handler_t->sniffInfo.maxInterval =\n    Event->p.modeChange.interval; currbtif_cmgr_handler_t->sniffInfo.minInterval\n    = Event->p.modeChange.interval; currbtif_cmgr_handler_t->sniffInfo.attempt =\n    CMGR_SNIFF_ATTEMPT; currbtif_cmgr_handler_t->sniffInfo.timeout =\n    CMGR_SNIFF_TIMEOUT;\n                app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(&currbtif_cmgr_handler_t->sniffInfo,btif_me_get_callback_event_rem_dev(\n    Event));\n            }\n            if (btif_me_get_activeCons() > 1){\n                for (uint8_t i=0; isniffInfo.maxInterval ==\n    currbtif_cmgr_handler_t->sniffInfo.maxInterval){ if\n    (btif_me_get_current_mode(remDev) == BLM_ACTIVE_MODE){\n                                    otherbtif_cmgr_handler_t->sniffInfo.maxInterval\n    -= 20; otherbtif_cmgr_handler_t->sniffInfo.minInterval -= 20;\n                                    otherbtif_cmgr_handler_t->sniffInfo.attempt\n    = CMGR_SNIFF_ATTEMPT; otherbtif_cmgr_handler_t->sniffInfo.timeout =\n    CMGR_SNIFF_TIMEOUT;\n                                    app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(&otherbtif_cmgr_handler_t->sniffInfo,\n    remDev); TRACE(1,\"reconfig sniff other RemDev:%x\\n\", remDev); }else if\n    (btif_me_get_current_mode(remDev) == BLM_SNIFF_MODE){ need_reconfig = true;\n                                }\n                            }\n                        }\n                        break;\n                    }\n                }\n            }\n            if (need_reconfig){\n                opRemDev = remDev;\n                if (currbtif_cmgr_handler_t){\n                    currbtif_cmgr_handler_t->sniffInfo.maxInterval -= 20;\n                    currbtif_cmgr_handler_t->sniffInfo.minInterval -= 20;\n                    currbtif_cmgr_handler_t->sniffInfo.attempt =\n    CMGR_SNIFF_ATTEMPT; currbtif_cmgr_handler_t->sniffInfo.timeout =\n    CMGR_SNIFF_TIMEOUT;\n                    app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(&currbtif_cmgr_handler_t->sniffInfo,\n    currbtif_cmgr_handler_t->remDev);\n                }\n                app_bt_ME_StopSniff(currbtif_cmgr_handler_t->remDev);\n                TRACE(1,\"reconfig sniff setup op opRemDev:%x\\n\", opRemDev);\n            }\n        }\n    }\n    if (Event->p.modeChange.curMode == BLM_ACTIVE_MODE){\n        if (opRemDev ==btif_me_get_callback_event_rem_dev( Event)){\n            TRACE(1,\"reconfig sniff op opRemDev:%x\\n\", opRemDev);\n            opRemDev = NULL;\n            currbtif_cmgr_handler_t =\n    btif_cmgr_get_acl_handler(btif_me_get_callback_event_rem_dev( Event)); if\n    (currbtif_cmgr_handler_t){\n                app_bt_CMGR_SetSniffTimer(currbtif_cmgr_handler_t, NULL,\n    CMGR_SNIFF_TIMER);\n            }\n        }\n    }\n    */\n    break;\n  case BTIF_BTEVENT_ACL_DATA_ACTIVE:\n    btif_cmgr_handler_t *cmgrHandler;\n    /* Start the sniff timer */\n    cmgrHandler =\n        btif_cmgr_get_acl_handler(btif_me_get_callback_event_rem_dev(Event));\n    if (cmgrHandler)\n      app_bt_CMGR_SetSniffTimer(cmgrHandler, NULL, BTIF_CMGR_SNIFF_TIMER);\n    break;\n  case BTIF_BTEVENT_SCO_CONNECT_IND:\n  case BTIF_BTEVENT_SCO_CONNECT_CNF:\n    TRACE(1, \"BTEVENT_SCO_CONNECT_IND/CNF cur_remDev = %p\",\n          btif_me_get_callback_event_rem_dev(Event));\n    currbtif_cmgr_handler_t = btif_cmgr_get_conn_ind_handler(\n        btif_me_get_callback_event_rem_dev(Event));\n    app_bt_Me_SetLinkPolicy(\n        btif_me_get_callback_event_sco_connect_rem_dev(Event),\n        BTIF_BLP_DISABLE_ALL);\n    if (btif_me_get_activeCons() > 1) {\n      for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n        remDev = btif_me_enumerate_remote_devices(i);\n        TRACE(1, \"other_remDev = %p\", remDev);\n        if (btif_me_get_callback_event_rem_dev(Event) == remDev) {\n          continue;\n        }\n\n        otherbtif_cmgr_handler_t = btif_cmgr_get_conn_ind_handler(remDev);\n        if (otherbtif_cmgr_handler_t) {\n          if (btif_cmgr_is_link_up(otherbtif_cmgr_handler_t)) {\n            if (btif_me_get_current_mode(remDev) == BTIF_BLM_ACTIVE_MODE) {\n              TRACE(0, \"other dev disable sniff\");\n              app_bt_Me_SetLinkPolicy(remDev, BTIF_BLP_DISABLE_ALL);\n            } else if (btif_me_get_current_mode(remDev) ==\n                       BTIF_BLM_SNIFF_MODE) {\n              TRACE(0, \" ohter dev exit & disable sniff\");\n              app_bt_ME_StopSniff(remDev);\n              app_bt_Me_SetLinkPolicy(remDev, BTIF_BLP_DISABLE_ALL);\n            }\n          }\n        }\n\n#if defined(HFP_NO_PRERMPT)\n        TRACE(2, \"cur_audio = %d other_audio = %d\",\n              btif_cmgr_is_audio_up(currbtif_cmgr_handler_t),\n              btif_cmgr_is_audio_up(otherbtif_cmgr_handler_t));\n        if ((btif_cmgr_is_audio_up(otherbtif_cmgr_handler_t) == true) &&\n            (btif_cmgr_is_audio_up(currbtif_cmgr_handler_t) == true)\n            /*(btapp_hfp_get_call_active()!=0)*/) {\n          btif_cmgr_remove_audio_link(currbtif_cmgr_handler_t);\n          app_bt_Me_switch_sco(btif_cmgr_get_sco_connect_sco_Hcihandler(\n              otherbtif_cmgr_handler_t));\n        }\n#endif\n      }\n    }\n    break;\n  case BTIF_BTEVENT_SCO_DISCONNECT:\n    app_bt_profile_reconnect_pending_process();\n    if (a2dp_is_music_ongoing()) {\n      break;\n    }\n    if (btif_me_get_activeCons() == 1) {\n      app_bt_Me_SetLinkPolicy(\n          btif_me_get_callback_event_sco_connect_rem_dev(Event),\n          BTIF_BLP_SNIFF_MODE);\n    } else {\n      uint8_t i;\n      for (i = 0; i < BT_DEVICE_NUM; i++) {\n        remDev = btif_me_enumerate_remote_devices(i);\n        if (btif_me_get_callback_event_rem_dev(Event) == remDev) {\n          break;\n        }\n      }\n      /*\n                      if(i==0)\n                          remDev = btif_me_enumerate_remote_devices(1);\n                      else if(i==1)\n                          remDev = btif_me_enumerate_remote_devices(0);\n                      else\n                          ASSERT(0,\"error other remotedevice!!!\");     */\n      otherbtif_cmgr_handler_t = btif_cmgr_get_conn_ind_handler(remDev);\n      currbtif_cmgr_handler_t = btif_cmgr_get_conn_ind_handler(\n          btif_me_get_callback_event_rem_dev(Event));\n\n      TRACE(4, \"SCO_DISCONNECT:%d/%d %p/%p\\n\",\n            btif_cmgr_is_audio_up(currbtif_cmgr_handler_t),\n            btif_cmgr_is_audio_up(otherbtif_cmgr_handler_t),\n            btif_cmgr_get_cmgrhandler_remdev(currbtif_cmgr_handler_t),\n            btif_me_get_callback_event_rem_dev(Event));\n      if (otherbtif_cmgr_handler_t) {\n        if (!btif_cmgr_is_audio_up(otherbtif_cmgr_handler_t)) {\n          TRACE(0, \"enable sniff to all\\n\");\n          app_bt_Me_SetLinkPolicy(\n              btif_me_get_callback_event_sco_connect_rem_dev(Event),\n              BTIF_BLP_SNIFF_MODE);\n          app_bt_Me_SetLinkPolicy(\n              btif_cmgr_get_cmgrhandler_remdev(otherbtif_cmgr_handler_t),\n              BTIF_BLP_SNIFF_MODE);\n        }\n      } else {\n        app_bt_Me_SetLinkPolicy(\n            btif_me_get_callback_event_sco_connect_rem_dev(Event),\n            BTIF_BLP_SNIFF_MODE);\n      }\n    }\n    break;\n  default:\n    break;\n  }\n}\n\nAPP_BT_GOLBAL_HANDLE_HOOK_HANDLER\napp_bt_global_handle_hook_handler[APP_BT_GOLBAL_HANDLE_HOOK_USER_QTY] = {0};\nvoid app_bt_global_handle_hook(const btif_event_t *Event) {\n  uint8_t i;\n  for (i = 0; i < APP_BT_GOLBAL_HANDLE_HOOK_USER_QTY; i++) {\n    if (app_bt_global_handle_hook_handler[i])\n      app_bt_global_handle_hook_handler[i](Event);\n  }\n}\n\nint app_bt_global_handle_hook_set(enum APP_BT_GOLBAL_HANDLE_HOOK_USER_T user,\n                                  APP_BT_GOLBAL_HANDLE_HOOK_HANDLER handler) {\n  app_bt_global_handle_hook_handler[user] = handler;\n  return 0;\n}\n\nAPP_BT_GOLBAL_HANDLE_HOOK_HANDLER\napp_bt_global_handle_hook_get(enum APP_BT_GOLBAL_HANDLE_HOOK_USER_T user) {\n  return app_bt_global_handle_hook_handler[user];\n}\n\nextern uint8_t once_event_case;\nextern bool IsMobileLinkLossing;\nextern void startonce_event(int ms, uint8_t once_event_pram);\n\nextern void a2dp_update_music_link(void);\n/////There is a device connected, so stop PAIR_TIMER and POWEROFF_TIMER of\n/// earphone.\nbtif_handler app_bt_handler;\nvoid app_bt_global_handle(const btif_event_t *Event) {\n  switch (btif_me_get_callback_event_type(Event)) {\n  case BTIF_BTEVENT_HCI_INITIALIZED:\n    break;\n#if defined(IBRT)\n  case BTIF_BTEVENT_HCI_COMMAND_SENT:\n    return;\n#else\n  case BTIF_BTEVENT_HCI_COMMAND_SENT:\n  case BTIF_BTEVENT_ACL_DATA_NOT_ACTIVE:\n    return;\n  case BTIF_BTEVENT_ACL_DATA_ACTIVE:\n    btif_cmgr_handler_t *cmgrHandler;\n    /* Start the sniff timer */\n    cmgrHandler =\n        btif_cmgr_get_acl_handler(btif_me_get_callback_event_rem_dev(Event));\n    if (cmgrHandler)\n      app_bt_CMGR_SetSniffTimer(cmgrHandler, NULL, BTIF_CMGR_SNIFF_TIMER);\n    return;\n#endif\n  case BTIF_BTEVENT_AUTHENTICATED:\n    TRACE(1, \"[BTEVENT] HANDER AUTH error=%x\",\n          btif_me_get_callback_event_err_code(Event));\n    // after authentication completes, re-enable sniff mode.\n    if (btif_me_get_callback_event_err_code(Event) == BTIF_BEC_NO_ERROR) {\n      app_bt_Me_SetLinkPolicy(btif_me_get_callback_event_rem_dev(Event),\n                              BTIF_BLP_SNIFF_MODE);\n    } else if (btif_me_get_callback_event_err_code(Event) ==\n               BTIF_BEC_AUTHENTICATE_FAILURE) {\n      // auth failed should clear nv record link key\n      bt_bdaddr_t *bd_ddr = btif_me_get_callback_event_rem_dev_bd_addr(Event);\n      btif_device_record_t record;\n\n      if (ddbif_find_record(bd_ddr, &record) == BT_STS_SUCCESS) {\n        ddbif_delete_record(&record.bdAddr);\n#if defined(IBRT)\n        ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n        if (!p_ibrt_ctrl->mobile_pair_canceled)\n#endif\n        {\n          memset(&record, 0, sizeof(record));\n          record.bdAddr = *bd_ddr;\n          ddbif_add_record(&record);\n        }\n        nv_record_flash_flush();\n      }\n    }\n    break;\n  }\n  // trace filter\n  switch (btif_me_get_callback_event_type(Event)) {\n  case BTIF_BTEVENT_HCI_COMMAND_SENT:\n  case BTIF_BTEVENT_ACL_DATA_NOT_ACTIVE:\n  case BTIF_BTEVENT_ACL_DATA_ACTIVE:\n    break;\n  default:\n    TRACE(1, \"[BTEVENT] evt = %d\", btif_me_get_callback_event_type(Event));\n    break;\n  }\n\n  switch (btif_me_get_callback_event_type(Event)) {\n  case BTIF_BTEVENT_LINK_CONNECT_IND:\n    hfp_reconnecting_timer_stop_callback(Event);\n  case BTIF_BTEVENT_LINK_CONNECT_CNF:\n#ifdef __BT_ONE_BRING_TWO__\n    if (bt_drv_reg_op_get_reconnecting_flag()) {\n      bt_drv_reg_op_clear_reconnecting_flag();\n      if (a2dp_is_music_ongoing())\n        a2dp_update_music_link();\n    }\n#endif\n\n    if (BTIF_BEC_NO_ERROR == btif_me_get_callback_event_err_code(Event)) {\n      connectedMobile = btif_me_get_callback_event_rem_dev(Event);\n      uint8_t connectedDevId = app_bt_get_devId_from_RemDev(connectedMobile);\n      app_bt_set_connecting_profiles_state(connectedDevId);\n      TRACE(1, \"MEC(pendCons) is %d\", btif_me_get_pendCons());\n\n      app_bt_stay_active_rem_dev(btif_me_get_callback_event_rem_dev(Event));\n#ifdef __BT_ONE_BRING_TWO__\n      btif_remote_device_t *remote_dev =\n          btif_me_get_callback_event_rem_dev(Event);\n      uint16_t conn_handle = btif_me_get_remote_device_hci_handle(remote_dev);\n      btif_me_qos_set_up(conn_handle);\n#endif\n\n#if (defined(__AI_VOICE__) || defined(BISTO_ENABLED))\n      app_ai_if_mobile_connect_handle(\n          btif_me_get_callback_event_rem_dev_bd_addr(Event));\n#endif\n    }\n\n    TRACE(4,\n          \"[BTEVENT] CONNECT_IND/CNF evt:%d errCode:0x%0x newRole:%d \"\n          \"activeCons:%d\",\n          btif_me_get_callback_event_type(Event),\n          btif_me_get_callback_event_err_code(Event),\n          btif_me_get_callback_event_rem_dev_role(Event),\n          btif_me_get_activeCons());\n    DUMP8(\"%02x \", btif_me_get_callback_event_rem_dev_bd_addr(Event),\n          BTIF_BD_ADDR_SIZE);\n\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_AUTOPOWEROFF__)\n    if (btif_me_get_activeCons() == 0) {\n      app_start_10_second_timer(APP_POWEROFF_TIMER_ID);\n    } else {\n      app_stop_10_second_timer(APP_POWEROFF_TIMER_ID);\n    }\n#endif\n#if defined(__BT_ONE_BRING_TWO__) || defined(IBRT)\n    if (btif_me_get_activeCons() > 2) {\n      TRACE(1, \"CONNECT_IND/CNF activeCons:%d so disconnect it\",\n            btif_me_get_activeCons());\n      app_bt_MeDisconnectLink(btif_me_get_callback_event_rem_dev(Event));\n    }\n#else\n    if (btif_me_get_activeCons() > 1) {\n      TRACE(1, \"CONNECT_IND/CNF activeCons:%d so disconnect it\",\n            btif_me_get_activeCons());\n      app_bt_MeDisconnectLink(btif_me_get_callback_event_rem_dev(Event));\n    }\n#endif\n    break;\n  case BTIF_BTEVENT_LINK_DISCONNECT: {\n    connectedMobile = btif_me_get_callback_event_rem_dev(Event);\n    uint8_t disconnectedDevId = app_bt_get_devId_from_RemDev(connectedMobile);\n    connectedMobile = NULL;\n    app_bt_clear_connecting_profiles_state(disconnectedDevId);\n\n    btif_remote_device_t *remote_dev =\n        btif_me_get_callback_event_disconnect_rem_dev(Event);\n    if (remote_dev) {\n      uint16_t conhdl = btif_me_get_remote_device_hci_handle(remote_dev);\n      bt_drv_reg_op_acl_tx_silence_clear(conhdl);\n      bt_drv_hwspi_select(conhdl - 0x80, 0);\n    }\n\n    TRACE(5,\n          \"[BTEVENT] DISCONNECT evt = %d encryptState:%d reason:0x%02x/0x%02x \"\n          \"activeCons:%d\",\n          btif_me_get_callback_event_type(Event),\n          btif_me_get_remote_sevice_encrypt_state(\n              btif_me_get_callback_event_rem_dev(Event)),\n          btif_me_get_remote_device_disc_reason_saved(\n              btif_me_get_callback_event_rem_dev(Event)),\n          btif_me_get_remote_device_disc_reason(\n              btif_me_get_callback_event_rem_dev(Event)),\n          btif_me_get_activeCons());\n    DUMP8(\"%02x \", btif_me_get_callback_event_rem_dev_bd_addr(Event),\n          BTIF_BD_ADDR_SIZE);\n#ifdef CHIP_BEST2000\n    bt_drv_patch_force_disconnect_ack();\n#endif\n    // disconnect from reconnect connection, and the HF don't connect successful\n    // once (whitch will release the saved_reconnect_mode ). so we are reconnect\n    // fail with remote link key loss.\n    // goto pairing.\n    // reason 07 maybe from the controller's error .\n    // 05  auth error\n    // 16  io cap reject.\n\n#if defined(__BTIF_EARPHONE__) && defined(__BTIF_AUTOPOWEROFF__)\n    if (btif_me_get_activeCons() == 0) {\n      app_start_10_second_timer(APP_POWEROFF_TIMER_ID);\n    }\n#endif\n\n#if defined(BISTO_ENABLED)\n    gsound_custom_bt_link_disconnected_handler(\n        btif_me_get_callback_event_rem_dev_bd_addr(Event)->address);\n#endif\n#if defined(__AI_VOICE__)\n    app_ai_mobile_disconnect_handle(\n        btif_me_get_callback_event_rem_dev_bd_addr(Event));\n#endif\n#ifdef __IAG_BLE_INCLUDE__\n    // start BLE adv\n    app_ble_force_switch_adv(BLE_SWITCH_USER_BT_CONNECT, true);\n#endif\n\n#ifdef BTIF_DIP_DEVICE\n    btif_dip_clear(remote_dev);\n#endif\n\n    app_bt_active_mode_reset(disconnectedDevId);\n\n#ifdef GFPS_ENABLED\n    app_gfps_handling_on_mobile_link_disconnection(\n        btif_me_get_callback_event_rem_dev(Event));\n#endif\n#if !defined(IBRT) && defined(BT_XTAL_SYNC_NO_RESET)\n    bt_term_xtal_sync_default();\n#endif\n\n    break;\n  }\n  case BTIF_BTEVENT_ROLE_CHANGE:\n    TRACE(3,\n          \"[BTEVENT] ROLE_CHANGE eType:0x%x errCode:0x%x newRole:%d \"\n          \"activeCons:%d\",\n          btif_me_get_callback_event_type(Event),\n          btif_me_get_callback_event_err_code(Event),\n          btif_me_get_callback_event_role_change_new_role(Event),\n          btif_me_get_activeCons());\n    break;\n  case BTIF_BTEVENT_MODE_CHANGE:\n    TRACE(4,\n          \"[BTEVENT] MODE_CHANGE evt:%d errCode:0x%0x curMode=0x%0x, \"\n          \"interval=%d \",\n          btif_me_get_callback_event_type(Event),\n          btif_me_get_callback_event_err_code(Event),\n          btif_me_get_callback_event_mode_change_curMode(Event),\n          btif_me_get_callback_event_mode_change_interval(Event));\n    DUMP8(\"%02x \", btif_me_get_callback_event_rem_dev_bd_addr(Event),\n          BTIF_BD_ADDR_SIZE);\n    break;\n  case BTIF_BTEVENT_ACCESSIBLE_CHANGE:\n    TRACE(3, \"[BTEVENT] ACCESSIBLE_CHANGE evt:%d errCode:0x%0x aMode=0x%0x\",\n          btif_me_get_callback_event_type(Event),\n          btif_me_get_callback_event_err_code(Event),\n          btif_me_get_callback_event_a_mode(Event));\n#if !defined(IBRT)\n    if (app_is_access_mode_set_pending()) {\n      app_set_pending_access_mode();\n    } else {\n      if (BTIF_BEC_NO_ERROR != btif_me_get_callback_event_err_code(Event)) {\n        app_retry_setting_access_mode();\n      }\n    }\n#endif\n    break;\n  case BTIF_BTEVENT_LINK_POLICY_CHANGED: {\n    BT_SET_LINKPOLICY_REQ_T *pReq = app_bt_pop_pending_set_linkpolicy();\n    if (NULL != pReq) {\n      app_bt_Me_SetLinkPolicy(pReq->remDev, pReq->policy);\n    }\n    break;\n  }\n  case BTIF_BTEVENT_DEFAULT_LINK_POLICY_CHANGED: {\n    TRACE(0, \"[BTEVENT] DEFAULT_LINK_POLICY_CHANGED-->BT_STACK_INITIALIZED\");\n    app_notify_stack_ready(STACK_READY_BT);\n    break;\n  }\n  case BTIF_BTEVENT_NAME_RESULT: {\n    uint8_t *ptrName;\n    uint8_t nameLen;\n    nameLen = btif_me_get_callback_event_remote_dev_name(Event, &ptrName);\n    TRACE(1, \"[BTEVENT] NAME_RESULT name len %d\", nameLen);\n    if (nameLen > 0) {\n      TRACE(1, \"remote dev name: %s\", ptrName);\n    }\n    // return;\n  }\n  default:\n    break;\n  }\n\n#ifdef MULTIPOINT_DUAL_SLAVE\n  app_bt_role_manager_process_dual_slave(Event);\n#else\n  app_bt_role_manager_process(Event);\n#endif\n  app_bt_accessible_manager_process(Event);\n#if !defined(IBRT)\n  app_bt_sniff_manager_process(Event);\n#endif\n  app_bt_global_handle_hook(Event);\n#if defined(IBRT)\n  app_tws_ibrt_global_callback(Event);\n#endif\n}\n\n#include \"app_bt_media_manager.h\"\nosTimerId bt_sco_recov_timer = NULL;\nstatic void bt_sco_recov_timer_handler(void const *param);\nosTimerDef(BT_SCO_RECOV_TIMER,\n           (void (*)(void const *))bt_sco_recov_timer_handler); // define timers\nvoid hfp_reconnect_sco(uint8_t flag);\nstatic void bt_sco_recov_timer_handler(void const *param) {\n  TRACE(1, \"%s\", __func__);\n  hfp_reconnect_sco(0);\n}\nstatic void bt_sco_recov_timer_start() {\n  osTimerStop(bt_sco_recov_timer);\n  osTimerStart(bt_sco_recov_timer, 2500);\n}\n\nenum {\n  SCO_DISCONNECT_RECONN_START,\n  SCO_DISCONNECT_RECONN_RUN,\n  SCO_DISCONNECT_RECONN_NONE,\n};\n\nstatic uint8_t sco_reconnect_status = SCO_DISCONNECT_RECONN_NONE;\n\nvoid hfp_reconnect_sco(uint8_t set) {\n  TRACE(3, \"%s cur_chl_id=%d reconnect_status =%d\", __func__,\n        app_bt_device.curr_hf_channel_id, sco_reconnect_status);\n  if (set == 1) {\n    sco_reconnect_status = SCO_DISCONNECT_RECONN_START;\n  }\n  if (sco_reconnect_status == SCO_DISCONNECT_RECONN_START) {\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                  app_bt_device.curr_hf_channel_id,\n                                  MAX_RECORD_NUM);\n    app_bt_HF_DisconnectAudioLink(\n        app_bt_device.hf_channel[app_bt_device.curr_hf_channel_id]);\n    sco_reconnect_status = SCO_DISCONNECT_RECONN_RUN;\n    bt_sco_recov_timer_start();\n  } else if (sco_reconnect_status == SCO_DISCONNECT_RECONN_RUN) {\n    app_bt_HF_CreateAudioLink(\n        app_bt_device.hf_channel[app_bt_device.curr_hf_channel_id]);\n    sco_reconnect_status = SCO_DISCONNECT_RECONN_NONE;\n  }\n}\n\nvoid app_bt_global_handle_init(void) {\n  btif_event_mask_t mask = BTIF_BEM_NO_EVENTS;\n  btif_me_init_handler(&app_bt_handler);\n  app_bt_handler.callback = app_bt_global_handle;\n  btif_me_register_global_handler(&app_bt_handler);\n#if defined(IBRT)\n  btif_me_register_accept_handler(&app_bt_handler);\n#endif\n#ifdef IBRT_SEARCH_UI\n  app_bt_global_handle_hook_set(APP_BT_GOLBAL_HANDLE_HOOK_USER_0,\n                                app_bt_manager_ibrt_role_process);\n#endif\n\n  mask |= BTIF_BEM_ROLE_CHANGE | BTIF_BEM_SCO_CONNECT_CNF |\n          BTIF_BEM_SCO_DISCONNECT | BTIF_BEM_SCO_CONNECT_IND;\n  mask |= BTIF_BEM_AUTHENTICATED;\n  mask |= BTIF_BEM_LINK_CONNECT_IND;\n  mask |= BTIF_BEM_LINK_DISCONNECT;\n  mask |= BTIF_BEM_LINK_CONNECT_CNF;\n  mask |= BTIF_BEM_ACCESSIBLE_CHANGE;\n  mask |= BTIF_BEM_ENCRYPTION_CHANGE;\n  mask |= BTIF_BEM_SIMPLE_PAIRING_COMPLETE;\n#if (defined(__BT_ONE_BRING_TWO__) || defined(IBRT))\n  mask |= BTIF_BEM_MODE_CHANGE;\n#endif\n  mask |= BTIF_BEM_LINK_POLICY_CHANGED;\n\n  app_bt_ME_SetConnectionRole(BTIF_BCR_ANY);\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    app_bt_A2DP_SetMasterRole(app_bt_device.a2dp_stream[i]->a2dp_stream, FALSE);\n#if defined(A2DP_LHDC_ON)\n    app_bt_A2DP_SetMasterRole(app_bt_device.a2dp_lhdc_stream[i]->a2dp_stream,\n                              FALSE);\n#endif\n#if defined(A2DP_AAC_ON)\n    app_bt_A2DP_SetMasterRole(app_bt_device.a2dp_aac_stream[i]->a2dp_stream,\n                              FALSE);\n#endif\n#if defined(A2DP_SCALABLE_ON)\n    app_bt_A2DP_SetMasterRole(\n        app_bt_device.a2dp_scalable_stream[i]->a2dp_stream, FALSE);\n#endif\n#if defined(A2DP_LDAC_ON)\n    app_bt_A2DP_SetMasterRole(app_bt_device.a2dp_ldac_stream[i]->a2dp_stream,\n                              FALSE);\n#endif\n\n    app_bt_HF_SetMasterRole(app_bt_device.hf_channel[i], FALSE);\n#if defined(__HSP_ENABLE__)\n    HS_SetMasterRole(&app_bt_device.hs_channel[i], FALSE);\n#endif\n  }\n  btif_me_set_event_mask(&app_bt_handler, mask);\n  app_bt_sniff_manager_init();\n  app_bt_accessmode_timer =\n      osTimerCreate(osTimer(APP_BT_ACCESSMODE_TIMER), osTimerOnce,\n                    &app_bt_accessmode_timer_argument);\n  bt_sco_recov_timer =\n      osTimerCreate(osTimer(BT_SCO_RECOV_TIMER), osTimerOnce, NULL);\n}\n\nvoid app_bt_send_request(uint32_t message_id, uint32_t param0, uint32_t param1,\n                         uint32_t ptr) {\n  APP_MESSAGE_BLOCK msg;\n\n  msg.mod_id = APP_MODUAL_BT;\n  msg.msg_body.message_id = message_id;\n  msg.msg_body.message_Param0 = param0;\n  msg.msg_body.message_Param1 = param1;\n  msg.msg_body.message_ptr = ptr;\n  app_mailbox_put(&msg);\n}\n\nextern void app_start_10_second_timer(uint8_t timer_id);\n\nstatic int app_bt_handle_process(APP_MESSAGE_BODY *msg_body) {\n  btif_accessible_mode_t old_access_mode;\n\n  switch (msg_body->message_id) {\n  case APP_BT_REQ_ACCESS_MODE_SET:\n    old_access_mode = g_bt_access_mode;\n    app_bt_accessmode_set(msg_body->message_Param0);\n    if (msg_body->message_Param0 == BTIF_BAM_GENERAL_ACCESSIBLE &&\n        old_access_mode != BTIF_BAM_GENERAL_ACCESSIBLE) {\n      // app_status_indication_set(APP_STATUS_INDICATION_BOTHSCAN);\n#ifdef MEDIA_PLAYER_SUPPORT\n      app_voice_report(APP_STATUS_INDICATION_BOTHSCAN, 0);\n#endif\n      app_start_10_second_timer(APP_PAIR_TIMER_ID);\n    } else {\n      // app_status_indication_set(APP_STATUS_INDICATION_PAGESCAN);\n    }\n    break;\n  default:\n    break;\n  }\n\n  return 0;\n}\n\nvoid *app_bt_profile_active_store_ptr_get(uint8_t *bdAddr) {\n  static btdevice_profile device_profile = {true, false, true, 0};\n  btdevice_profile *ptr;\n\n  nvrec_btdevicerecord *record = NULL;\n  if (!nv_record_btdevicerecord_find((bt_bdaddr_t *)bdAddr, &record)) {\n    uint32_t lock = nv_record_pre_write_operation();\n    ptr = &(record->device_plf);\n    DUMP8(\"0x%02x \", bdAddr, BTIF_BD_ADDR_SIZE);\n    TRACE(5, \"%s hfp_act:%d hsp_act:%d a2dp_act:0x%x codec_type=%x\", __func__,\n          ptr->hfp_act, ptr->hsp_act, ptr->a2dp_act, ptr->a2dp_codectype);\n    /* always need connect a2dp and hfp */\n    ptr->hfp_act = true;\n    ptr->a2dp_act = true;\n    nv_record_post_write_operation(lock);\n  } else {\n    ptr = &device_profile;\n    TRACE(1, \"%s default\", __func__);\n  }\n  return (void *)ptr;\n}\n\nstatic void app_bt_profile_reconnect_timehandler(void const *param);\nextern void startonce_delay_event_Timer_(int ms);\nosTimerDef(BT_PROFILE_CONNECT_TIMER0,\n           app_bt_profile_reconnect_timehandler); // define timers\n#ifdef __BT_ONE_BRING_TWO__\nosTimerDef(BT_PROFILE_CONNECT_TIMER1, app_bt_profile_reconnect_timehandler);\n#endif\n\n#ifdef __AUTO_CONNECT_OTHER_PROFILE__\nstatic void app_bt_profile_connect_hf_retry_handler(void) {\n  struct app_bt_profile_manager *bt_profile_manager_p =\n      (struct app_bt_profile_manager *)param;\n  if (MEC(pendCons) > 0) {\n    TRACE(1, \"Former link is not down yet, reset the timer %s.\", __FUNCTION__);\n    osTimerStart(bt_profile_manager_p->connect_timer,\n                 APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n  } else {\n    app_bt_precheck_before_starting_connecting(\n        bt_profile_manager_p->has_connected);\n    if (bt_profile_manager_p->hfp_connect !=\n        bt_profile_connect_status_success) {\n      app_bt_HF_CreateServiceLink(bt_profile_manager_p->chan,\n                                  &bt_profile_manager_p->rmt_addr);\n    }\n  }\n}\n\nstatic void app_bt_profile_connect_hf_retry_timehandler(void const *param) {\n  app_bt_start_custom_function_in_bt_thread(\n      0, 0, (uint32_t)app_bt_profile_connect_hf_retry_handler);\n}\n\n#if defined(__HSP_ENABLE__)\nstatic void app_bt_profile_connect_hs_retry_timehandler(void const *param) {\n  struct app_bt_profile_manager *bt_profile_manager_p =\n      (struct app_bt_profile_manager *)param;\n  if (MEC(pendCons) > 0) {\n    if (bt_profile_manager_p->reconnect_cnt <\n        APP_BT_PROFILE_OPENNING_RECONNECT_RETRY_LIMIT_CNT) {\n      bt_profile_manager_p->reconnect_cnt++;\n    }\n    TRACE(1, \"Former link is not down yet, reset the timer %s.\", __FUNCTION__);\n    osTimerStart(bt_profile_manager_p->connect_timer,\n                 BTIF_BT_DEFAULT_PAGE_TIMEOUT_IN_MS +\n                     APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n  } else {\n    if (bt_profile_manager_p->hsp_connect !=\n        bt_profile_connect_status_success) {\n      app_bt_HS_CreateServiceLink(bt_profile_manager_p->hs_chan,\n                                  &bt_profile_manager_p->rmt_addr);\n    }\n  }\n}\n#endif\n\nstatic bool app_bt_profile_manager_connect_a2dp_filter_connected_a2dp_stream(\n    BT_BD_ADDR bd_addr) {\n  uint8_t i = 0;\n  BtRemoteDevice *StrmRemDev;\n  A2dpStream *connected_stream;\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if ((app_bt_device.a2dp_stream[i].stream.state ==\n             AVDTP_STRM_STATE_STREAMING ||\n         app_bt_device.a2dp_stream[i].stream.state == AVDTP_STRM_STATE_OPEN)) {\n      connected_stream = &app_bt_device.a2dp_stream[i];\n      StrmRemDev = A2DP_GetRemoteDevice(connected_stream);\n      if (memcmp(StrmRemDev->bdAddr.addr, bd_addr.addr, BD_ADDR_SIZE) == 0) {\n        return true;\n      }\n    }\n  }\n  return false;\n}\n\nstatic void app_bt_profile_connect_a2dp_retry_handler(void) {\n  struct app_bt_profile_manager *bt_profile_manager_p =\n      (struct app_bt_profile_manager *)param;\n  TRACE(1, \"%s reconnect_cnt = %d\", __func__,\n        bt_profile_manager_p->reconnect_cnt);\n\n  if (MEC(pendCons) > 0) {\n    if (bt_profile_manager_p->reconnect_cnt <\n        APP_BT_PROFILE_OPENNING_RECONNECT_RETRY_LIMIT_CNT) {\n      bt_profile_manager_p->reconnect_cnt++;\n    }\n    TRACE(1, \"Former link is not down yet, reset the timer %s.\", __FUNCTION__);\n    osTimerStart(bt_profile_manager_p->connect_timer,\n                 BTIF_BT_DEFAULT_PAGE_TIMEOUT_IN_MS +\n                     APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n  } else {\n    if (app_bt_profile_manager_connect_a2dp_filter_connected_a2dp_stream(\n            bt_profile_manager_p->rmt_addr) == true) {\n      TRACE(0, \"has been connected , no need to init connect again\");\n      return;\n    }\n    app_bt_precheck_before_starting_connecting(\n        bt_profile_manager_p->has_connected);\n    if (bt_profile_manager_p->a2dp_connect !=\n        bt_profile_connect_status_success) {\n      app_bt_A2DP_OpenStream(bt_profile_manager_p->stream,\n                             &bt_profile_manager_p->rmt_addr);\n    }\n  }\n}\n\nstatic void app_bt_profile_connect_a2dp_retry_timehandler(void const *param) {\n  app_bt_start_custom_function_in_bt_thread(\n      0, 0, (uint32_t)app_bt_profile_connect_a2dp_retry_handler);\n}\n#endif\n\nvoid app_bt_reset_reconnect_timer(bt_bdaddr_t *pBdAddr) {\n  uint8_t devId = 0;\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    if (pBdAddr == &(bt_profile_manager[i].rmt_addr)) {\n      devId = i;\n      break;\n    }\n  }\n\n  TRACE(1, \"Resart the reconnecting timer of dev %d\", devId);\n  osTimerStart(bt_profile_manager[devId].connect_timer,\n               BTIF_BT_DEFAULT_PAGE_TIMEOUT_IN_MS +\n                   APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n}\n\nstatic void app_bt_profile_reconnect_handler(void const *param) {\n#if !defined(IBRT)\n  struct app_bt_profile_manager *bt_profile_manager_p =\n      (struct app_bt_profile_manager *)param;\n  TRACE(1, \"%s reconnect_cnt = %d\", __FUNCTION__,\n        bt_profile_manager_p->reconnect_cnt);\n\n  if (btif_me_get_pendCons() > 0) {\n    if (bt_profile_manager_p->reconnect_cnt <\n        APP_BT_PROFILE_OPENNING_RECONNECT_RETRY_LIMIT_CNT) {\n      bt_profile_manager_p->reconnect_cnt++;\n    }\n    TRACE(1, \"Former link is not down yet, reset the timer %s.\", __FUNCTION__);\n    osTimerStart(bt_profile_manager_p->connect_timer,\n                 BTIF_BT_DEFAULT_PAGE_TIMEOUT_IN_MS +\n                     APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n  } else {\n    btdevice_profile *btdevice_plf_p =\n        (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n            bt_profile_manager_p->rmt_addr.address);\n#ifdef __BT_ONE_BRING_TWO__\n    if (a2dp_is_music_ongoing() &&\n        (bt_profile_manager_p->has_connected == false)) {\n      bt_drv_reg_op_set_reconnecting_flag();\n      a2dp_update_music_link();\n    }\n#endif\n\n    if (bt_profile_manager_p->connect_timer_cb) {\n      bt_profile_manager_p->connect_timer_cb(param);\n      bt_profile_manager_p->connect_timer_cb = NULL;\n    } else {\n      if ((btdevice_plf_p->hfp_act) && (bt_profile_manager_p->hfp_connect !=\n                                        bt_profile_connect_status_success)) {\n        TRACE(0, \"try connect hf\");\n        app_bt_precheck_before_starting_connecting(\n            bt_profile_manager_p->has_connected);\n        app_bt_HF_CreateServiceLink(\n            bt_profile_manager_p->chan,\n            (bt_bdaddr_t *)&bt_profile_manager_p->rmt_addr);\n      }\n#if defined(__HSP_ENABLE__)\n      else if (btdevice_plf_p->hsp_act)\n                &&(bt_profile_manager_p->hsp_connect != bt_profile_connect_status_success))\n            {\n                  TRACE(0, \"try connect hs\");\n                  app_bt_precheck_before_starting_connecting(\n                      bt_profile_manager_p->has_connected);\n                  app_bt_HS_CreateServiceLink(bt_profile_manager_p->hs_chan,\n                                              &bt_profile_manager_p->rmt_addr);\n                }\n#endif\n      else if ((btdevice_plf_p->a2dp_act) &&\n               (bt_profile_manager_p->a2dp_connect !=\n                bt_profile_connect_status_success)) {\n                TRACE(0, \"try connect a2dp\");\n                app_bt_precheck_before_starting_connecting(\n                    bt_profile_manager_p->has_connected);\n                app_bt_A2DP_OpenStream(bt_profile_manager_p->stream,\n                                       &bt_profile_manager_p->rmt_addr);\n      }\n    }\n  }\n#else\n  TRACE(0, \"ibrt_ui_log:app_bt_profile_reconnect_timehandler called\");\n#endif\n}\n\nstatic void app_bt_profile_reconnect_timehandler(void const *param) {\n  app_bt_start_custom_function_in_bt_thread(\n      (uint32_t)param, 0, (uint32_t)app_bt_profile_reconnect_handler);\n}\n\nbool app_bt_is_in_connecting_profiles_state(void) {\n  for (uint8_t devId = 0; devId < BT_DEVICE_NUM; devId++) {\n    if (APP_BT_IN_CONNECTING_PROFILES_STATE ==\n        bt_profile_manager[devId].connectingState) {\n      return true;\n    }\n  }\n\n  return false;\n}\n\nvoid app_bt_clear_connecting_profiles_state(uint8_t devId) {\n  TRACE(1, \"Dev %d exists connecting profiles state\", devId);\n\n  bt_profile_manager[devId].connectingState = APP_BT_IDLE_STATE;\n  if (!app_bt_is_in_connecting_profiles_state()) {\n#ifdef __IAG_BLE_INCLUDE__\n    app_start_fast_connectable_ble_adv(BLE_FAST_ADVERTISING_INTERVAL);\n#endif\n  }\n}\n\nvoid app_bt_set_connecting_profiles_state(uint8_t devId) {\n  TRACE(1, \"Dev %d enters connecting profiles state\", devId);\n\n  bt_profile_manager[devId].connectingState =\n      APP_BT_IN_CONNECTING_PROFILES_STATE;\n}\n\nvoid app_bt_profile_connect_manager_open(void) {\n  uint8_t i = 0;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    bt_profile_manager[i].has_connected = false;\n    bt_profile_manager[i].hfp_connect = bt_profile_connect_status_unknow;\n    bt_profile_manager[i].hsp_connect = bt_profile_connect_status_unknow;\n    bt_profile_manager[i].a2dp_connect = bt_profile_connect_status_unknow;\n    memset(bt_profile_manager[i].rmt_addr.address, 0, BTIF_BD_ADDR_SIZE);\n    bt_profile_manager[i].reconnect_mode = bt_profile_reconnect_null;\n    bt_profile_manager[i].saved_reconnect_mode = bt_profile_reconnect_null;\n    bt_profile_manager[i].stream = NULL;\n    bt_profile_manager[i].chan = NULL;\n#if defined(__HSP_ENABLE__)\n    bt_profile_manager[i].hs_chan = NULL;\n#endif\n    bt_profile_manager[i].reconnect_cnt = 0;\n    bt_profile_manager[i].connect_timer_cb = NULL;\n    bt_profile_manager[i].connectingState = APP_BT_IDLE_STATE;\n  }\n\n  bt_profile_manager[BT_DEVICE_ID_1].connect_timer =\n      osTimerCreate(osTimer(BT_PROFILE_CONNECT_TIMER0), osTimerOnce,\n                    &bt_profile_manager[BT_DEVICE_ID_1]);\n#ifdef __BT_ONE_BRING_TWO__\n  bt_profile_manager[BT_DEVICE_ID_2].connect_timer =\n      osTimerCreate(osTimer(BT_PROFILE_CONNECT_TIMER1), osTimerOnce,\n                    &bt_profile_manager[BT_DEVICE_ID_2]);\n#endif\n}\n\nBOOL app_bt_profile_connect_openreconnecting(void *ptr) {\n  bool nRet = false;\n  uint8_t i;\n\n  /*\n   * If launched from peer device,stop reconnecting and accept connection\n   */\n  if ((ptr != NULL) && (btif_me_get_remote_device_initiator(\n                            (btif_remote_device_t *)ptr) == FALSE)) {\n    // Peer device launch reconnet,then we give up reconnect procedure\n    TRACE(0, \"give up reconnecting\");\n    app_bt_connectable_mode_stop_reconnecting();\n    return false;\n  }\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    nRet |= bt_profile_manager[i].reconnect_mode ==\n                    bt_profile_reconnect_openreconnecting\n                ? true\n                : false;\n    if (nRet) {\n      TRACE(2, \"io cap rj [%d]: %d\", i, bt_profile_manager[i].reconnect_mode);\n    }\n  }\n\n  return nRet;\n}\n\nbool app_bt_is_in_reconnecting(void) {\n  uint8_t devId;\n  for (devId = 0; devId < BT_DEVICE_NUM; devId++) {\n    if (bt_profile_reconnect_null != bt_profile_manager[devId].reconnect_mode) {\n      return true;\n    }\n  }\n\n  return false;\n}\n\nvoid app_bt_profile_connect_manager_opening_reconnect(void) {\n  int ret;\n  btif_device_record_t record1;\n  btif_device_record_t record2;\n  btdevice_profile *btdevice_plf_p;\n  int find_invalid_record_cnt;\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n  if (app_bt_device.src_or_snk == BT_DEVICE_SRC) {\n    return;\n  }\n#endif\n  osapi_lock_stack();\n\n#ifndef __BT_ONE_BRING_TWO__\n  if (btif_me_get_activeCons() != 0) {\n    osapi_unlock_stack();\n    TRACE(0, \"bt link disconnect not complete,ignore this time reconnect\");\n    return;\n  }\n#endif\n\n  do {\n    find_invalid_record_cnt = 0;\n    ret = nv_record_enum_latest_two_paired_dev(&record1, &record2);\n    if (ret == 1) {\n      btdevice_plf_p = (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n          record1.bdAddr.address);\n      if (!(btdevice_plf_p->hfp_act) && !(btdevice_plf_p->a2dp_act)) {\n                nv_record_ddbrec_delete((bt_bdaddr_t *)&record1.bdAddr);\n                find_invalid_record_cnt++;\n      }\n    } else if (ret == 2) {\n      btdevice_plf_p = (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n          record1.bdAddr.address);\n      if (!(btdevice_plf_p->hfp_act) && !(btdevice_plf_p->a2dp_act)) {\n                nv_record_ddbrec_delete((bt_bdaddr_t *)&record1.bdAddr);\n                find_invalid_record_cnt++;\n      }\n      btdevice_plf_p = (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n          record2.bdAddr.address);\n      if (!(btdevice_plf_p->hfp_act) && !(btdevice_plf_p->a2dp_act)) {\n                nv_record_ddbrec_delete((bt_bdaddr_t *)&record2.bdAddr);\n                find_invalid_record_cnt++;\n      }\n    }\n  } while (find_invalid_record_cnt);\n\n  TRACE(0, \"!!!app_bt_opening_reconnect:\\n\");\n  DUMP8(\"%02x \", &record1.bdAddr, 6);\n  DUMP8(\"%02x \", &record2.bdAddr, 6);\n\n  if (ret > 0) {\n    TRACE(0, \"!!!start reconnect first device\\n\");\n\n    if (btif_me_get_pendCons() == 0) {\n      bt_profile_manager[BT_DEVICE_ID_1].reconnect_mode =\n          bt_profile_reconnect_openreconnecting;\n      bt_profile_manager[BT_DEVICE_ID_1].reconnect_cnt = 0;\n      memcpy(bt_profile_manager[BT_DEVICE_ID_1].rmt_addr.address,\n             record1.bdAddr.address, BTIF_BD_ADDR_SIZE);\n      btdevice_plf_p = (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n          bt_profile_manager[BT_DEVICE_ID_1].rmt_addr.address);\n\n#if defined(A2DP_LHDC_ON)\n      if (btdevice_plf_p->a2dp_codectype == BTIF_AVDTP_CODEC_TYPE_NON_A2DP)\n                bt_profile_manager[BT_DEVICE_ID_1].stream =\n                    app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream;\n      else\n#endif\n#if defined(A2DP_AAC_ON)\n          if (btdevice_plf_p->a2dp_codectype ==\n              BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC)\n                bt_profile_manager[BT_DEVICE_ID_1].stream =\n                    app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n      else\n#endif\n#if defined(A2DP_LDAC_ON) // workaround for mate10 no a2dp issue when link back\n                if (btdevice_plf_p->a2dp_codectype ==\n                    BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n                  // bt_profile_manager[BT_DEVICE_ID_1].stream =\n                  // app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n                  // btdevice_plf_p->a2dp_codectype =\n                  // BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC;\n                  bt_profile_manager[BT_DEVICE_ID_1].stream =\n                      app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]\n                          ->a2dp_stream;\n                  btdevice_plf_p->a2dp_codectype =\n                      BTIF_AVDTP_CODEC_TYPE_NON_A2DP;\n                } else\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\n                    if (btdevice_plf_p->a2dp_codectype ==\n                        BTIF_AVDTP_CODEC_TYPE_NON_A2DP)\n                  bt_profile_manager[BT_DEVICE_ID_1].stream =\n                      app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_1]\n                          ->a2dp_stream;\n                else\n#endif\n                {\n                  bt_profile_manager[BT_DEVICE_ID_1].stream =\n                      app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream;\n                }\n\n      btif_a2dp_reset_stream_state(bt_profile_manager[BT_DEVICE_ID_1].stream);\n\n      bt_profile_manager[BT_DEVICE_ID_1].chan =\n          app_bt_device.hf_channel[BT_DEVICE_ID_1];\n#if defined(__HSP_ENABLE__)\n      bt_profile_manager[BT_DEVICE_ID_1].hs_chan =\n          &app_bt_device.hs_channel[BT_DEVICE_ID_1];\n#endif\n      if (btdevice_plf_p->hfp_act) {\n                TRACE(0, \"try connect hf\");\n                app_bt_precheck_before_starting_connecting(\n                    bt_profile_manager[BT_DEVICE_ID_1].has_connected);\n                app_bt_HF_CreateServiceLink(\n                    bt_profile_manager[BT_DEVICE_ID_1].chan,\n                    (bt_bdaddr_t *)&bt_profile_manager[BT_DEVICE_ID_1]\n                        .rmt_addr);\n      } else if (btdevice_plf_p->a2dp_act) {\n                TRACE(0, \"try connect a2dp\");\n                app_bt_precheck_before_starting_connecting(\n                    bt_profile_manager[BT_DEVICE_ID_1].has_connected);\n                app_bt_A2DP_OpenStream(\n                    bt_profile_manager[BT_DEVICE_ID_1].stream,\n                    &bt_profile_manager[BT_DEVICE_ID_1].rmt_addr);\n      }\n\n#if defined(__HSP_ENABLE__)\n      else if (btdevice_plf_p->hsp_act) {\n                TRACE(0, \"try connect hs\");\n                app_bt_precheck_before_starting_connecting(\n                    bt_profile_manager[BT_DEVICE_ID_1].has_connected);\n                app_bt_HS_CreateServiceLink(\n                    bt_profile_manager[BT_DEVICE_ID_1].hs_chan,\n                    &bt_profile_manager[BT_DEVICE_ID_1].rmt_addr);\n      }\n#endif\n    }\n#ifdef __BT_ONE_BRING_TWO__\n    if (ret > 1) {\n      TRACE(0, \"!!!need reconnect second device\\n\");\n      bt_profile_manager[BT_DEVICE_ID_2].reconnect_mode =\n          bt_profile_reconnect_openreconnecting;\n      bt_profile_manager[BT_DEVICE_ID_2].reconnect_cnt = 0;\n      memcpy(bt_profile_manager[BT_DEVICE_ID_2].rmt_addr.address,\n             record2.bdAddr.address, BTIF_BD_ADDR_SIZE);\n      btdevice_plf_p = (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n          bt_profile_manager[BT_DEVICE_ID_2].rmt_addr.address);\n\n#if defined(A2DP_LHDC_ON)\n      if (btdevice_plf_p->a2dp_codectype == BTIF_AVDTP_CODEC_TYPE_NON_A2DP)\n                bt_profile_manager[BT_DEVICE_ID_2].stream =\n                    app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_2]->a2dp_stream;\n      else\n#endif\n#if defined(A2DP_AAC_ON)\n          if (btdevice_plf_p->a2dp_codectype ==\n              BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC)\n                bt_profile_manager[BT_DEVICE_ID_2].stream =\n                    app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_2]->a2dp_stream;\n      else\n#endif\n#if defined(A2DP_SCALABLE_ON)\n          if (btdevice_plf_p->a2dp_codectype == BTIF_AVDTP_CODEC_TYPE_NON_A2DP)\n                bt_profile_manager[BT_DEVICE_ID_2].stream =\n                    app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_2]\n                        ->a2dp_stream;\n      else\n#endif\n      {\n                bt_profile_manager[BT_DEVICE_ID_2].stream =\n                    app_bt_device.a2dp_stream[BT_DEVICE_ID_2]->a2dp_stream;\n      }\n\n      btif_a2dp_reset_stream_state(bt_profile_manager[BT_DEVICE_ID_2].stream);\n\n      bt_profile_manager[BT_DEVICE_ID_2].chan =\n          app_bt_device.hf_channel[BT_DEVICE_ID_2];\n#if defined(__HSP_ENABLE__)\n      bt_profile_manager[BT_DEVICE_ID_2].hs_chan =\n          &app_bt_device.hs_channel[BT_DEVICE_ID_2];\n#endif\n    }\n#endif\n  }\n\n  else {\n    TRACE(0, \"!!!go to pairing\\n\");\n#ifdef __EARPHONE_STAY_BOTH_SCAN__\n    app_bt_accessmode_set_req(BTIF_BT_DEFAULT_ACCESS_MODE_PAIR);\n#else\n    app_bt_accessmode_set_req(BTIF_BAM_CONNECTABLE_ONLY);\n#endif\n  }\n  osapi_unlock_stack();\n}\n\nvoid app_bt_resume_sniff_mode(uint8_t deviceId) {\n  if (bt_profile_connect_status_success ==\n          bt_profile_manager[deviceId].a2dp_connect ||\n      bt_profile_connect_status_success ==\n          bt_profile_manager[deviceId].hfp_connect ||\n      bt_profile_connect_status_success ==\n          bt_profile_manager[deviceId].hsp_connect) {\n    app_bt_allow_sniff(deviceId);\n    btif_remote_device_t *currentRemDev = app_bt_get_remoteDev(deviceId);\n    app_bt_sniff_config(currentRemDev);\n  }\n}\n#if !defined(IBRT)\nstatic int8_t app_bt_profile_reconnect_pending(enum BT_DEVICE_ID_T id) {\n  if (btapp_hfp_is_dev_call_active(id) == true) {\n    bt_profile_manager[id].reconnect_mode =\n        bt_profile_reconnect_reconnect_pending;\n    return 0;\n  }\n  return -1;\n}\n#endif\nstatic int8_t app_bt_profile_reconnect_pending_process(void) {\n  uint8_t i = BT_DEVICE_NUM;\n\n  btif_remote_device_t *remDev = NULL;\n  btif_cmgr_handler_t *cmgrHandler;\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    remDev = btif_me_enumerate_remote_devices(i);\n    if (remDev != NULL) {\n      cmgrHandler = btif_cmgr_get_acl_handler(remDev);\n      if (btif_cmgr_is_audio_up(cmgrHandler) == 1)\n                return -1;\n    }\n  }\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (bt_profile_manager[i].reconnect_mode ==\n        bt_profile_reconnect_reconnect_pending)\n      break;\n  }\n\n  if (i == BT_DEVICE_NUM)\n    return -1;\n\n  bt_profile_manager[i].reconnect_mode = bt_profile_reconnect_reconnecting;\n#ifdef __IAG_BLE_INCLUDE__\n  app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n#endif\n  osTimerStart(bt_profile_manager[i].connect_timer,\n               APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n  return 0;\n}\n\nuint8_t app_bt_get_num_of_connected_dev(void) {\n  uint8_t num_of_connected_dev = 0;\n  uint8_t deviceId;\n\n  for (deviceId = 0; deviceId < BT_DEVICE_NUM; deviceId++) {\n    if (bt_profile_manager[deviceId].has_connected) {\n      num_of_connected_dev++;\n    }\n  }\n\n  return num_of_connected_dev;\n}\n\nstatic uint8_t recorded_latest_connected_service_device_id = BT_DEVICE_ID_1;\nvoid app_bt_record_latest_connected_service_device_id(uint8_t device_id) {\n  recorded_latest_connected_service_device_id = device_id;\n}\n\nuint8_t app_bt_get_recorded_latest_connected_service_device_id(void) {\n  return recorded_latest_connected_service_device_id;\n}\n\nstatic void app_bt_precheck_before_starting_connecting(uint8_t isBtConnected) {\n#ifdef __IAG_BLE_INCLUDE__\n  if (!isBtConnected) {\n    app_ble_force_switch_adv(BLE_SWITCH_USER_BT_CONNECT, false);\n  }\n#endif\n}\n\nstatic void app_bt_restore_reconnecting_idle_mode(uint8_t deviceId) {\n  bt_profile_manager[deviceId].reconnect_mode = bt_profile_reconnect_null;\n#ifdef __IAG_BLE_INCLUDE__\n  app_start_fast_connectable_ble_adv(BLE_FAST_ADVERTISING_INTERVAL);\n#endif\n}\n\n#ifdef __BT_ONE_BRING_TWO__\nstatic void app_bt_update_connectable_mode_after_connection_management(void) {\n  uint8_t deviceId;\n  bool isEnterConnetableOnlyState = true;\n  for (deviceId = 0; deviceId < BT_DEVICE_NUM; deviceId++) {\n    // assure none of the device is in reconnecting mode\n    if (bt_profile_manager[deviceId].reconnect_mode !=\n        bt_profile_reconnect_null) {\n      isEnterConnetableOnlyState = false;\n      break;\n    }\n  }\n\n  if (isEnterConnetableOnlyState) {\n    for (deviceId = 0; deviceId < BT_DEVICE_NUM; deviceId++) {\n      if (!bt_profile_manager[deviceId].has_connected) {\n                app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                return;\n      }\n    }\n  }\n}\n#endif\n\nstatic void app_bt_connectable_mode_stop_reconnecting_handler(void) {\n  uint8_t deviceId;\n  btif_remote_device_t *remDev;\n  btif_cmgr_handler_t *cmgrHandler;\n  for (deviceId = 0; deviceId < BT_DEVICE_NUM; deviceId++) {\n    if (bt_profile_manager[deviceId].reconnect_mode !=\n        bt_profile_reconnect_null) {\n      bt_profile_manager[deviceId].hfp_connect =\n          bt_profile_connect_status_failure;\n      bt_profile_manager[deviceId].reconnect_mode = bt_profile_reconnect_null;\n      bt_profile_manager[deviceId].saved_reconnect_mode =\n          bt_profile_reconnect_null;\n      bt_profile_manager[deviceId].reconnect_cnt = 0;\n      if (bt_profile_manager[deviceId].connect_timer != NULL)\n                osTimerStop(bt_profile_manager[deviceId].connect_timer);\n      remDev = btif_me_enumerate_remote_devices(deviceId);\n      if (remDev != NULL) {\n                cmgrHandler = btif_cmgr_get_acl_handler(remDev);\n                btif_me_cancel_create_link(\n                    btif_cmgr_get_cmgrhandler_remdev_bthandle(cmgrHandler),\n                    remDev);\n      }\n    }\n  }\n}\n\nvoid app_bt_connectable_mode_stop_reconnecting(void) {\n  app_bt_start_custom_function_in_bt_thread(\n      0, 0, (uint32_t)app_bt_connectable_mode_stop_reconnecting_handler);\n}\n\n#if defined(__HSP_ENABLE__)\nvoid app_bt_profile_connect_manager_hs(enum BT_DEVICE_ID_T id, HsChannel *Chan,\n                                       HsCallbackParms *Info) {\n  btdevice_profile *btdevice_plf_p =\n      (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n          (uint8_t *)Info->p.remDev->bdAddr.address);\n\n  osTimerStop(bt_profile_manager[id].connect_timer);\n  bt_profile_manager[id].connect_timer_cb = NULL;\n  bool profile_reconnect_enable = false;\n\n  if (Chan && Info) {\n    switch (Info->event) {\n    case HF_EVENT_SERVICE_CONNECTED:\n      TRACE(1, \"%s HS_EVENT_SERVICE_CONNECTED\", __func__);\n      nv_record_btdevicerecord_set_hsp_profile_active_state(btdevice_plf_p,\n                                                            true);\n      nv_record_touch_cause_flush();\n      bt_profile_manager[id].hsp_connect = bt_profile_connect_status_success;\n      bt_profile_manager[id].reconnect_cnt = 0;\n      bt_profile_manager[id].hs_chan = &app_bt_device.hs_channel[id];\n      memcpy(bt_profile_manager[id].rmt_addr.address,\n             Info->p.remDev->bdAddr.address, BTIF_BD_ADDR_SIZE);\n      if (false == bt_profile_manager[id].has_connected) {\n                app_bt_resume_sniff_mode(id);\n      }\n      if (bt_profile_manager[id].reconnect_mode ==\n          bt_profile_reconnect_openreconnecting) {\n                // do nothing\n      } else if (bt_profile_manager[id].reconnect_mode ==\n                 bt_profile_reconnect_reconnecting) {\n                if (btdevice_plf_p->a2dp_act &&\n                    bt_profile_manager[id].a2dp_connect !=\n                        bt_profile_connect_status_success) {\n                  TRACE(0, \"!!!continue connect a2dp\\n\");\n                  app_bt_precheck_before_starting_connecting(\n                      bt_profile_manager[id].has_connected);\n                  app_bt_A2DP_OpenStream(bt_profile_manager[id].stream,\n                                         &bt_profile_manager[id].rmt_address);\n                }\n      }\n#ifdef __AUTO_CONNECT_OTHER_PROFILE__\n      else {\n                if (btdevice_plf_p->a2dp_act &&\n                    bt_profile_manager[id].a2dp_connect !=\n                        bt_profile_connect_status_success) {\n                  bt_profile_manager[id].connect_timer_cb =\n                      app_bt_profile_connect_a2dp_retry_timehandler;\n                  app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                  osTimerStart(bt_profile_manager[id].connect_timer,\n                               APP_BT_PROFILE_CONNECT_RETRY_MS);\n                }\n      }\n#endif\n      break;\n    case HF_EVENT_SERVICE_DISCONNECTED:\n      TRACE(2, \"%s HS_EVENT_SERVICE_DISCONNECTED discReason:%d\", __func__,\n            Info->p.remDev->discReason);\n      bt_profile_manager[id].hsp_connect = bt_profile_connect_status_failure;\n      if (bt_profile_manager[id].reconnect_mode ==\n          bt_profile_reconnect_openreconnecting) {\n                if (++bt_profile_manager[id].reconnect_cnt <\n                    APP_BT_PROFILE_OPENNING_RECONNECT_RETRY_LIMIT_CNT) {\n                  app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                  profile_reconnect_enable = true;\n                  bt_profile_manager[id].hfp_connect =\n                      bt_profile_connect_status_unknow;\n                }\n      } else if (bt_profile_manager[id].reconnect_mode ==\n                 bt_profile_reconnect_reconnecting) {\n                if (++bt_profile_manager[id].reconnect_cnt <\n                    APP_BT_PROFILE_RECONNECT_RETRY_LIMIT_CNT) {\n                  app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                  profile_reconnect_enable = true\n                } else {\n                  app_bt_restore_reconnecting_idle_mode(id);\n                  // bt_profile_manager[id].reconnect_mode =\n                  // bt_profile_reconnect_null;\n                }\n                TRACE(2, \"%s try to reconnect cnt:%d\", __func__,\n                      bt_profile_manager[id].reconnect_cnt);\n#if !defined(IBRT)\n      } else if (Info->p.remDev->discReason == 0x8) {\n                bt_profile_manager[id].reconnect_mode =\n                    bt_profile_reconnect_reconnecting;\n                app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                TRACE(1, \"%s try to reconnect\", __func__);\n                if (app_bt_profile_reconnect_pending(id) != 0) {\n                  profile_reconnect_enable = true;\n                }\n#endif\n      } else {\n                bt_profile_manager[id].hsp_connect =\n                    bt_profile_connect_status_unknow;\n      }\n\n      if (profile_reconnect_enable) {\n#ifdef __IAG_BLE_INCLUDE__\n                app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n#endif\n                osTimerStart(bt_profile_manager[id].connect_timer,\n                             APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n      }\n      break;\n    default:\n      break;\n    }\n  }\n\n  if (bt_profile_manager[id].reconnect_mode ==\n      bt_profile_reconnect_reconnecting) {\n    bool reconnect_hsp_proc_final = true;\n    bool reconnect_a2dp_proc_final = true;\n    if (bt_profile_manager[id].hsp_connect ==\n        bt_profile_connect_status_failure) {\n      reconnect_hsp_proc_final = false;\n    }\n    if (bt_profile_manager[id].a2dp_connect ==\n        bt_profile_connect_status_failure) {\n      reconnect_a2dp_proc_final = false;\n    }\n    if (reconnect_hsp_proc_final && reconnect_a2dp_proc_final) {\n      TRACE(3, \"!!!reconnect success %d/%d/%d\\n\",\n            bt_profile_manager[id].hfp_connect,\n            bt_profile_manager[id].hsp_connect,\n            bt_profile_manager[id].a2dp_connect);\n      app_bt_restore_reconnecting_idle_mode(id);\n      // bt_profile_manager[id].reconnect_mode = bt_profile_reconnect_null;\n    }\n  } else if (bt_profile_manager[id].reconnect_mode ==\n             bt_profile_reconnect_openreconnecting) {\n    bool opening_hsp_proc_final = false;\n    bool opening_a2dp_proc_final = false;\n\n    if (btdevice_plf_p->hsp_act && bt_profile_manager[id].hsp_connect ==\n                                       bt_profile_connect_status_unknow) {\n      opening_hsp_proc_final = false;\n    } else {\n      opening_hsp_proc_final = true;\n    }\n\n    if (btdevice_plf_p->a2dp_act && bt_profile_manager[id].a2dp_connect ==\n                                        bt_profile_connect_status_unknow) {\n      opening_a2dp_proc_final = false;\n    } else {\n      opening_a2dp_proc_final = true;\n    }\n\n    if ((opening_hsp_proc_final && opening_a2dp_proc_final) ||\n        (bt_profile_manager[id].hsp_connect ==\n         bt_profile_connect_status_failure)) {\n      TRACE(3, \"!!!reconnect success %d/%d/%d\\n\",\n            bt_profile_manager[id].hfp_connect,\n            bt_profile_manager[id].hsp_connect,\n            bt_profile_manager[id].a2dp_connect);\n      app_bt_restore_reconnecting_idle_mode(id);\n      // bt_profile_manager[id].reconnect_mode = bt_profile_reconnect_null;\n    }\n\n    if (btdevice_plf_p->hsp_act && bt_profile_manager[id].hsp_connect ==\n                                       bt_profile_connect_status_success) {\n      if (btdevice_plf_p->a2dp_act && !opening_a2dp_proc_final) {\n                TRACE(0, \"!!!continue connect a2dp\\n\");\n                app_bt_precheck_before_starting_connecting(\n                    bt_profile_manager[id].has_connected);\n                app_bt_A2DP_OpenStream(bt_profile_manager[id].stream,\n                                       &bt_profile_manager[id].rmt_addr);\n      }\n    }\n\n    if (bt_profile_manager[id].reconnect_mode == bt_profile_reconnect_null) {\n      for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n                if (bt_profile_manager[i].reconnect_mode ==\n                    bt_profile_reconnect_openreconnecting) {\n                  TRACE(0, \"!!!hs->start reconnect second device\\n\");\n                  if ((btdevice_plf_p->hfp_act) &&\n                      (!bt_profile_manager[i].hfp_connect)) {\n                    TRACE(0, \"try connect hf\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[i].has_connected);\n                    app_bt_HF_CreateServiceLink(\n                        bt_profile_manager[i].chan,\n                        &bt_profile_manager[i].rmt_addr);\n                  } else if ((btdevice_plf_p->hsp_act) &&\n                             (!bt_profile_manager[i].hsp_connect)) {\n                    TRACE(0, \"try connect hs\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[i].has_connected);\n                    app_bt_HS_CreateServiceLink(\n                        bt_profile_manager[i].hs_chan,\n                        &bt_profile_manager[i].rmt_addr);\n\n                  } else if ((btdevice_plf_p->a2dp_act) &&\n                             (!bt_profile_manager[i].a2dp_connect)) {\n                    TRACE(0, \"try connect a2dp\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[i].has_connected);\n                    app_bt_A2DP_OpenStream(bt_profile_manager[i].stream,\n                                           &bt_profile_manager[i].rmt_addr);\n                  }\n                  break;\n                }\n      }\n    }\n  }\n\n#ifdef __IAG_BLE_INCLUDE__\n  if (bt_profile_manager[id].hfp_connect == bt_profile_connect_status_success &&\n      bt_profile_manager[id].hsp_connect == bt_profile_connect_status_success &&\n      bt_profile_manager[id].a2dp_connect ==\n          bt_profile_connect_status_success) {\n    app_ble_force_switch_adv(BLE_SWITCH_USER_BT_CONNECT, true);\n  }\n#endif\n\n  if (!bt_profile_manager[id].has_connected &&\n      (bt_profile_manager[id].hfp_connect ==\n           bt_profile_connect_status_success ||\n       bt_profile_manager[id].hsp_connect ==\n           bt_profile_connect_status_success ||\n       bt_profile_manager[id].a2dp_connect ==\n           bt_profile_connect_status_success)) {\n\n    bt_profile_manager[id].has_connected = true;\n    TRACE(0, \"BT connected!!!\");\n\n#ifndef IBRT\n    btif_me_get_remote_device_name(&(ctx->remote_dev_bdaddr),\n                                   app_bt_global_handle);\n#endif\n#if defined(MEDIA_PLAYER_SUPPORT) && !defined(IBRT)\n    app_voice_report(APP_STATUS_INDICATION_CONNECTED, id);\n#endif\n#ifdef __INTERCONNECTION__\n    app_interconnection_start_disappear_adv(\n        INTERCONNECTION_BLE_ADVERTISING_INTERVAL,\n        APP_INTERCONNECTION_DISAPPEAR_ADV_IN_MS);\n\n    if (btif_me_get_activeCons() <= 2) {\n      app_interconnection_spp_open(btif_me_enumerate_remote_devices(id));\n    }\n#endif\n#ifdef __INTERACTION__\n    // app_interaction_spp_open();\n#endif\n  }\n\n  if (bt_profile_manager[id].has_connected &&\n      (bt_profile_manager[id].hfp_connect !=\n           bt_profile_connect_status_success &&\n       bt_profile_manager[id].hsp_connect !=\n           bt_profile_connect_status_success &&\n       bt_profile_manager[id].a2dp_connect !=\n           bt_profile_connect_status_success)) {\n\n    bt_profile_manager[id].has_connected = false;\n    TRACE(0, \"BT disconnected!!!\");\n\n#ifdef GFPS_ENABLED\n    if (app_gfps_is_last_response_pending()) {\n      app_gfps_enter_connectable_mode_req_handler(app_gfps_get_last_response());\n    }\n#endif\n\n#if defined(MEDIA_PLAYER_SUPPORT) && !defined(IBRT)\n    app_voice_report(APP_STATUS_INDICATION_DISCONNECTED, id);\n#endif\n#ifdef __INTERCONNECTION__\n    app_interconnection_disconnected_callback();\n#endif\n\n    app_set_disconnecting_all_bt_connections(false);\n  }\n\n#ifdef __BT_ONE_BRING_TWO__\n  app_bt_update_connectable_mode_after_connection_management();\n#endif\n}\n#endif\n\nvoid hfp_reconnecting_timer_stop_callback(const btif_event_t *event) {\n  uint8_t i = 0;\n  uint8_t id = BT_DEVICE_NUM;\n  bt_bdaddr_t *remote = NULL;\n  bt_bdaddr_t *hfp_remote = NULL;\n  remote = btif_me_get_callback_event_rem_dev_bd_addr(event);\n  if (remote != NULL) {\n    for (i = 0; i < BT_DEVICE_NUM; i++) {\n      hfp_remote = &bt_profile_manager[i].rmt_addr;\n      if (!strcmp((char *)hfp_remote, (char *)remote)) {\n                id = i;\n                TRACE(2, \"%s: find bt device num = %d\", __func__, id);\n                break;\n      }\n    }\n  }\n  if (i < BT_DEVICE_NUM) {\n    TRACE(3, \"%s: hfp_connect=%d,reconnect_mode=%d,reconnect_cnt=%d\", __func__,\n          bt_profile_manager[id].hfp_connect,\n          bt_profile_manager[id].reconnect_mode,\n          bt_profile_manager[id].reconnect_cnt);\n    if ((bt_profile_manager[id].reconnect_mode != bt_profile_reconnect_null) &&\n        bt_profile_manager[id].reconnect_cnt != 0) {\n      bt_profile_manager[id].reconnect_mode = bt_profile_reconnect_null;\n      bt_profile_manager[id].saved_reconnect_mode = bt_profile_reconnect_null;\n      bt_profile_manager[id].reconnect_cnt = 0;\n      if (bt_profile_manager[id].connect_timer != NULL)\n                osTimerStop(bt_profile_manager[id].connect_timer);\n\n      TRACE(1, \"%s: stop success\", __func__);\n    }\n  } else {\n    TRACE(1, \"%s: not find bt device\", __func__);\n  }\n}\n\nvoid app_audio_switch_flash_flush_req(void);\n\nextern uint8_t once_event_case;\nextern bool IsMobileLinkLossing;\n// void app_bt_profile_connect_manager_hf(enum BT_DEVICE_ID_T id, HfChannel\n// *Chan, HfCallbackParms *Info)\nvoid app_bt_profile_connect_manager_hf(enum BT_DEVICE_ID_T id,\n                                       hf_chan_handle_t Chan,\n                                       struct hfp_context *ctx) {\n  static ibrt_ctrl_t *p_ibrt_ctrl = app_ibrt_if_get_bt_ctrl_ctx();\n  // btdevice_profile *btdevice_plf_p = (btdevice_profile\n  // *)app_bt_profile_active_store_ptr_get((uint8_t\n  // *)Info->p.remDev->bdAddr.address);\n  btdevice_profile *btdevice_plf_p =\n      (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n          (uint8_t *)ctx->remote_dev_bdaddr.address);\n  bool profile_reconnect_enable = false;\n\n  osTimerStop(bt_profile_manager[id].connect_timer);\n  bt_profile_manager[id].connect_timer_cb = NULL;\n  // if (Chan&&Info){\n  if (Chan) {\n    switch (ctx->event) {\n    case BTIF_HF_EVENT_SERVICE_CONNECTED:\n      TRACE(1, \"%s HF_EVENT_SERVICE_CONNECTED\", __func__);\n      nv_record_btdevicerecord_set_hfp_profile_active_state(btdevice_plf_p,\n                                                            true);\n      nv_record_touch_cause_flush();\n      bt_profile_manager[id].hfp_connect = bt_profile_connect_status_success;\n      bt_profile_manager[id].saved_reconnect_mode = bt_profile_reconnect_null;\n      bt_profile_manager[id].reconnect_cnt = 0;\n      bt_profile_manager[id].chan = app_bt_device.hf_channel[id];\n      memcpy(bt_profile_manager[id].rmt_addr.address,\n             ctx->remote_dev_bdaddr.address, BTIF_BD_ADDR_SIZE);\n      if (false == bt_profile_manager[id].has_connected) {\n                app_bt_resume_sniff_mode(id);\n      }\n\n#ifdef BTIF_DIP_DEVICE\n      btif_dip_get_remote_info(app_bt_get_remoteDev(id));\n#endif\n\n      if (bt_profile_manager[id].reconnect_mode ==\n          bt_profile_reconnect_openreconnecting) {\n                // do nothing\n      }\n#if defined(IBRT)\n      else if (app_bt_ibrt_reconnect_mobile_profile_flag_get()) {\n                app_bt_ibrt_reconnect_mobile_profile_flag_clear();\n#else\n      else if (bt_profile_manager[id].reconnect_mode ==\n               bt_profile_reconnect_reconnecting) {\n#endif\n                TRACE(2, \"app_bt: a2dp_act in NV =%d,a2dp_connect=%d\",\n                      btdevice_plf_p->a2dp_act,\n                      bt_profile_manager[id].a2dp_connect);\n                if (btdevice_plf_p->a2dp_act &&\n                    bt_profile_manager[id].a2dp_connect !=\n                        bt_profile_connect_status_success) {\n                  TRACE(0, \"!!!continue connect a2dp\\n\");\n                  app_bt_precheck_before_starting_connecting(\n                      bt_profile_manager[id].has_connected);\n                  app_bt_A2DP_OpenStream(bt_profile_manager[id].stream,\n                                         &bt_profile_manager[id].rmt_addr);\n                }\n      }\n#ifdef __AUTO_CONNECT_OTHER_PROFILE__\n      else {\n                // befor auto connect a2dp profile, check whether a2dp is\n                // supported\n                if (btdevice_plf_p->a2dp_act &&\n                    bt_profile_manager[id].a2dp_connect !=\n                        bt_profile_connect_status_success) {\n                  bt_profile_manager[id].connect_timer_cb =\n                      app_bt_profile_connect_a2dp_retry_timehandler;\n                  app_bt_accessmode_set(BAM_CONNECTABLE_ONLY);\n                  osTimerStart(bt_profile_manager[id].connect_timer,\n                               APP_BT_PROFILE_CONNECT_RETRY_MS);\n                }\n      }\n#endif\n      break;\n    case BTIF_HF_EVENT_SERVICE_DISCONNECTED:\n      if (((ctx->disc_reason == 0) || (ctx->disc_reason == 19)) &&\n          (p_ibrt_ctrl->current_role != IBRT_SLAVE)) {\n                once_event_case = 2;\n                startonce_delay_event_Timer_(1000);\n      }\n      // TRACE(3,\"%s HF_EVENT_SERVICE_DISCONNECTED discReason:%d/%d\",__func__,\n      // Info->p.remDev->discReason, Info->p.remDev->discReason_saved);\n      TRACE(3, \"%s HF_EVENT_SERVICE_DISCONNECTED discReason:%d/%d\", __func__,\n            ctx->disc_reason, ctx->disc_reason_saved);\n      bt_profile_manager[id].hfp_connect = bt_profile_connect_status_failure;\n      if (bt_profile_manager[id].reconnect_mode ==\n          bt_profile_reconnect_openreconnecting) {\n                if (++bt_profile_manager[id].reconnect_cnt <\n                    APP_BT_PROFILE_OPENNING_RECONNECT_RETRY_LIMIT_CNT) {\n                  app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                  profile_reconnect_enable = true;\n                  bt_profile_manager[id].hfp_connect =\n                      bt_profile_connect_status_unknow;\n                }\n      } else if (bt_profile_manager[id].reconnect_mode ==\n                 bt_profile_reconnect_reconnecting) {\n                if (++bt_profile_manager[id].reconnect_cnt <\n                    APP_BT_PROFILE_RECONNECT_RETRY_LIMIT_CNT) {\n                  app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                  profile_reconnect_enable = true;\n                } else {\n                  app_bt_restore_reconnecting_idle_mode(id);\n                  // bt_profile_manager[id].reconnect_mode =\n                  // bt_profile_reconnect_null;\n                }\n                TRACE(2, \"%s try to reconnect cnt:%d\", __func__,\n                      bt_profile_manager[id].reconnect_cnt);\n                /*\n                }else if ((Info->p.remDev->discReason == 0x8)||\n                      (Info->p.remDev->discReason_saved == 0x8)){\n                      */\n      }\n#if !defined(IBRT)\n#if defined(ENHANCED_STACK)\n      else if ((ctx->disc_reason == 0x8) || (ctx->disc_reason_saved == 0x8) ||\n               (ctx->disc_reason == 0x4) || (ctx->disc_reason_saved == 0x4))\n#else\n      else if ((ctx->disc_reason == 0x8) || (ctx->disc_reason_saved == 0x8) ||\n               (ctx->disc_reason == 0x0) || (ctx->disc_reason_saved == 0x0))\n#endif\n      {\n                bt_profile_manager[id].reconnect_mode =\n                    bt_profile_reconnect_reconnecting;\n                app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                TRACE(2, \"%s try to reconnect reason =%d\", __func__,\n                      ctx->disc_reason);\n                if (app_bt_profile_reconnect_pending(id) != 0) {\n                  profile_reconnect_enable = true;\n                }\n      }\n#endif\n      else {\n                bt_profile_manager[id].hfp_connect =\n                    bt_profile_connect_status_unknow;\n      }\n\n      if (profile_reconnect_enable) {\n#ifdef __IAG_BLE_INCLUDE__\n                app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n#endif\n                osTimerStart(bt_profile_manager[id].connect_timer,\n                             APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n      }\n      break;\n    default:\n      break;\n    }\n  }\n  DUMP8(\"%02x \", &bt_profile_manager[id].rmt_addr.address, 6);\n  btdevice_profile *btdevice_plf_p1 =\n      (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n          (uint8_t *)&bt_profile_manager[id].rmt_addr.address);\n\n  if (bt_profile_manager[id].reconnect_mode ==\n      bt_profile_reconnect_reconnecting) {\n    bool reconnect_hfp_proc_final = false;\n    bool reconnect_a2dp_proc_final = false;\n\n    if (bt_profile_manager[id].hfp_connect !=\n        bt_profile_connect_status_success) {\n      reconnect_hfp_proc_final = false;\n    } else {\n      reconnect_hfp_proc_final = true;\n    }\n    if (bt_profile_manager[id].a2dp_connect !=\n        bt_profile_connect_status_success) {\n      if (btdevice_plf_p1->hfp_act && btdevice_plf_p1->a2dp_act) {\n                reconnect_a2dp_proc_final = false;\n      } else {\n                reconnect_a2dp_proc_final = true;\n      }\n    }\n    if (reconnect_hfp_proc_final && reconnect_a2dp_proc_final) {\n      TRACE(3, \"!!!reconnect success %d/%d/%d\\n\",\n            bt_profile_manager[id].hfp_connect,\n            bt_profile_manager[id].hsp_connect,\n            bt_profile_manager[id].a2dp_connect);\n      app_bt_restore_reconnecting_idle_mode(id);\n      // bt_profile_manager[id].reconnect_mode = bt_profile_reconnect_null;\n    }\n  } else if (bt_profile_manager[id].reconnect_mode ==\n             bt_profile_reconnect_openreconnecting) {\n    bool opening_hfp_proc_final = false;\n    bool opening_a2dp_proc_final = false;\n\n    if (btdevice_plf_p1->hfp_act && bt_profile_manager[id].hfp_connect ==\n                                        bt_profile_connect_status_unknow) {\n      opening_hfp_proc_final = false;\n    } else {\n      opening_hfp_proc_final = true;\n    }\n\n    if (btdevice_plf_p1->a2dp_act && bt_profile_manager[id].a2dp_connect ==\n                                         bt_profile_connect_status_unknow) {\n      opening_a2dp_proc_final = false;\n    } else {\n      opening_a2dp_proc_final = true;\n    }\n\n    if (opening_hfp_proc_final && opening_a2dp_proc_final) {\n      TRACE(3, \"!!!reconnect success %d/%d/%d\\n\",\n            bt_profile_manager[id].hfp_connect,\n            bt_profile_manager[id].hsp_connect,\n            bt_profile_manager[id].a2dp_connect);\n      bt_profile_manager[id].saved_reconnect_mode =\n          bt_profile_reconnect_openreconnecting;\n      app_bt_restore_reconnecting_idle_mode(id);\n    } else if (bt_profile_manager[id].hfp_connect ==\n               bt_profile_connect_status_failure) {\n      TRACE(3, \"reconnect_mode888:%d\", bt_profile_manager[0].reconnect_mode);\n      TRACE(3, \"!!!reconnect success %d/%d/%d\\n\",\n            bt_profile_manager[id].hfp_connect,\n            bt_profile_manager[id].hsp_connect,\n            bt_profile_manager[id].a2dp_connect);\n      bt_profile_manager[id].saved_reconnect_mode =\n          bt_profile_reconnect_openreconnecting;\n      if ((bt_profile_manager[id].reconnect_mode ==\n           bt_profile_reconnect_openreconnecting) &&\n          (bt_profile_manager[id].reconnect_cnt >=\n           APP_BT_PROFILE_OPENNING_RECONNECT_RETRY_LIMIT_CNT)) {\n                app_bt_restore_reconnecting_idle_mode(id);\n      }\n    }\n\n    if (btdevice_plf_p1->hfp_act && bt_profile_manager[id].hfp_connect ==\n                                        bt_profile_connect_status_success) {\n      if (btdevice_plf_p1->a2dp_act && !opening_a2dp_proc_final) {\n                TRACE(1, \"!!!continue connect a2dp %p\\n\",\n                      bt_profile_manager[id].stream);\n                app_bt_precheck_before_starting_connecting(\n                    bt_profile_manager[id].has_connected);\n                app_bt_A2DP_OpenStream(bt_profile_manager[id].stream,\n                                       &bt_profile_manager[id].rmt_addr);\n      }\n    }\n\n    if (bt_profile_manager[id].reconnect_mode == bt_profile_reconnect_null) {\n      for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n                btdevice_profile *btdevice_plf_p_temp =\n                    (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n                        (uint8_t *)bt_profile_manager[i].rmt_addr.address);\n                TRACE(3, \"reconnect_mode:%d\",\n                      bt_profile_manager[i].reconnect_mode);\n                if (bt_profile_manager[i].reconnect_mode ==\n                    bt_profile_reconnect_openreconnecting) {\n                  TRACE(0, \"!!!hf->start reconnect second device\\n\");\n                  if ((btdevice_plf_p_temp->hfp_act) &&\n                      (!bt_profile_manager[i].hfp_connect)) {\n                    TRACE(0, \"try connect hf\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[id].has_connected);\n                    app_bt_HF_CreateServiceLink(\n                        bt_profile_manager[i].chan,\n                        (bt_bdaddr_t *)&bt_profile_manager[i].rmt_addr);\n                  }\n#if defined(__HSP_ENABLE__)\n                  else if ((btdevice_plf_p_temp->hsp_act) &&\n                           (!bt_profile_manager[i].hsp_connect)) {\n                    TRACE(0, \"try connect hs\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[id].has_connected);\n                    app_bt_HS_CreateServiceLink(\n                        bt_profile_manager[i].hs_chan,\n                        &bt_profile_manager[i].rmt_addr);\n                  }\n#endif\n                  else if ((btdevice_plf_p_temp->a2dp_act) &&\n                           (!bt_profile_manager[i].a2dp_connect)) {\n                    TRACE(0, \"try connect a2dp\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[id].has_connected);\n                    app_bt_A2DP_OpenStream(bt_profile_manager[i].stream,\n                                           &bt_profile_manager[i].rmt_addr);\n                  }\n                  break;\n                }\n      }\n    }\n  }\n#ifdef __INTERCONNECTION__\n  if (bt_profile_manager[id].hfp_connect == bt_profile_connect_status_success &&\n      bt_profile_manager[id].a2dp_connect ==\n          bt_profile_connect_status_success) {\n    app_interconnection_start_disappear_adv(\n        INTERCONNECTION_BLE_ADVERTISING_INTERVAL,\n        APP_INTERCONNECTION_DISAPPEAR_ADV_IN_MS);\n\n    if (btif_me_get_activeCons() <= 2) {\n      app_interconnection_spp_open(btif_me_enumerate_remote_devices(id));\n    }\n  }\n#endif\n\n#ifdef __IAG_BLE_INCLUDE__\n  TRACE(3, \"%s hfp %d a2dp %d\", __func__, bt_profile_manager[id].hfp_connect,\n        bt_profile_manager[id].a2dp_connect);\n  if (bt_profile_manager[id].hfp_connect == bt_profile_connect_status_success &&\n#ifdef __HSP_ENABLE__\n      bt_profile_manager[id].hsp_connect == bt_profile_connect_status_success &&\n#endif\n      bt_profile_manager[id].a2dp_connect ==\n          bt_profile_connect_status_success) {\n    app_ble_force_switch_adv(BLE_SWITCH_USER_BT_CONNECT, true);\n  }\n#endif\n\n  if (!bt_profile_manager[id].has_connected &&\n      (bt_profile_manager[id].hfp_connect ==\n           bt_profile_connect_status_success ||\n#ifdef __HSP_ENABLE__\n       bt_profile_manager[id].hsp_connect ==\n           bt_profile_connect_status_success ||\n#endif\n       bt_profile_manager[id].a2dp_connect ==\n           bt_profile_connect_status_success)) {\n\n    bt_profile_manager[id].has_connected = true;\n    TRACE(0, \"BT connected!!!\");\n    once_event_case = 1;\n    /*if(IsMobileLinkLossing){\n        startonce_delay_event_Timer_(3000);\n    }\n    else{\n        startonce_delay_event_Timer_(1500);\n    }*/\n    app_voice_report(APP_STATUS_INDICATION_CONNECTED, 0);\n    IsMobileLinkLossing = FALSE;\n#ifndef IBRT\n    btif_me_get_remote_device_name(&(ctx->remote_dev_bdaddr),\n                                   app_bt_global_handle);\n#endif\n#if defined(MEDIA_PLAYER_SUPPORT) && !defined(IBRT)\n    app_voice_report(APP_STATUS_INDICATION_CONNECTED, id);\n#endif\n\n#if 0 // #ifdef __INTERCONNECTION__\n        app_interconnection_start_disappear_adv(BLE_ADVERTISING_INTERVAL, APP_INTERCONNECTION_DISAPPEAR_ADV_IN_MS);\n        app_interconnection_spp_open();\n#endif\n\n#ifdef __INTERACTION__\n    //    app_interaction_spp_open();\n#endif\n  }\n\n  if (bt_profile_manager[id].has_connected &&\n      (bt_profile_manager[id].hfp_connect !=\n           bt_profile_connect_status_success &&\n#ifdef __HSP_ENABLE__\n       bt_profile_manager[id].hsp_connect !=\n           bt_profile_connect_status_success &&\n#endif\n       bt_profile_manager[id].a2dp_connect !=\n           bt_profile_connect_status_success)) {\n\n    bt_profile_manager[id].has_connected = false;\n    TRACE(0, \"BT disconnected!!!\");\n\n#ifdef GFPS_ENABLED\n    if (app_gfps_is_last_response_pending()) {\n      app_gfps_enter_connectable_mode_req_handler(app_gfps_get_last_response());\n    }\n#endif\n\n#if defined(MEDIA_PLAYER_SUPPORT) && !defined(IBRT)\n    app_voice_report(APP_STATUS_INDICATION_DISCONNECTED, id);\n#endif\n#ifdef __INTERCONNECTION__\n    app_interconnection_disconnected_callback();\n#endif\n\n    app_set_disconnecting_all_bt_connections(false);\n  }\n\n#ifdef __BT_ONE_BRING_TWO__\n  app_bt_update_connectable_mode_after_connection_management();\n#endif\n}\n\nvoid app_bt_profile_connect_manager_a2dp(enum BT_DEVICE_ID_T id,\n                                         a2dp_stream_t *Stream,\n                                         const a2dp_callback_parms_t *info) {\n  btdevice_profile *btdevice_plf_p = NULL;\n  btif_remote_device_t *remDev = NULL;\n  btif_a2dp_callback_parms_t *Info = (btif_a2dp_callback_parms_t *)info;\n  osTimerStop(bt_profile_manager[id].connect_timer);\n  bt_profile_manager[id].connect_timer_cb = NULL;\n  bool profile_reconnect_enable = false;\n\n  remDev = btif_a2dp_get_stream_conn_remDev(Stream);\n  if (remDev) {\n    btdevice_plf_p = (btdevice_profile *)app_bt_profile_active_store_ptr_get(\n        btif_me_get_remote_device_bdaddr(remDev)->address);\n  } else {\n    btdevice_plf_p =\n        (btdevice_profile *)app_bt_profile_active_store_ptr_get(NULL);\n  }\n\n  if (Stream && Info) {\n\n    switch (Info->event) {\n    case BTIF_A2DP_EVENT_STREAM_OPEN:\n      TRACE(4, \"%s A2DP_EVENT_STREAM_OPEN,codec type=%x a2dp:%d mode:%d\",\n            __func__, Info->p.configReq->codec.codecType,\n            bt_profile_manager[id].a2dp_connect,\n            bt_profile_manager[id].reconnect_mode);\n\n      nv_record_btdevicerecord_set_a2dp_profile_active_state(btdevice_plf_p,\n                                                             true);\n      nv_record_btdevicerecord_set_a2dp_profile_codec(\n          btdevice_plf_p, Info->p.configReq->codec.codecType);\n      nv_record_touch_cause_flush();\n      if (bt_profile_manager[id].a2dp_connect ==\n          bt_profile_connect_status_success) {\n                TRACE(0, \"!!!a2dp has opened   force return \");\n                return;\n      }\n      bt_profile_manager[id].a2dp_connect = bt_profile_connect_status_success;\n      bt_profile_manager[id].reconnect_cnt = 0;\n      bt_profile_manager[id].stream = app_bt_device.a2dp_connected_stream[id];\n      memcpy(bt_profile_manager[id].rmt_addr.address,\n             btif_me_get_remote_device_bdaddr(\n                 btif_a2dp_get_stream_conn_remDev(Stream))\n                 ->address,\n             BTIF_BD_ADDR_SIZE);\n      app_bt_record_latest_connected_service_device_id(id);\n      if (false == bt_profile_manager[id].has_connected) {\n                app_bt_resume_sniff_mode(id);\n      }\n\n#ifdef BTIF_DIP_DEVICE\n      btif_dip_get_remote_info(remDev);\n#endif\n\n      if (bt_profile_manager[id].reconnect_mode ==\n          bt_profile_reconnect_openreconnecting) {\n                // do nothing\n      }\n\n#if defined(IBRT)\n      else if (app_bt_ibrt_reconnect_mobile_profile_flag_get()) {\n                app_bt_ibrt_reconnect_mobile_profile_flag_clear();\n#else\n      else if (bt_profile_manager[id].reconnect_mode ==\n               bt_profile_reconnect_reconnecting) {\n#endif\n                TRACE(2, \"app_bt: hfp_act in NV =%d,a2dp_connect=%d\",\n                      btdevice_plf_p->hfp_act,\n                      bt_profile_manager[id].hfp_connect);\n                if (btdevice_plf_p->hfp_act &&\n                    bt_profile_manager[id].hfp_connect !=\n                        bt_profile_connect_status_success) {\n                  if (btif_hf_check_rfcomm_l2cap_channel_is_creating(\n                          &bt_profile_manager[id].rmt_addr)) {\n                    TRACE(0,\n                          \"!!!remote is creating hfp after a2dp connected\\n\");\n                  } else {\n                    TRACE(0, \"!!!continue connect hfp\\n\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[id].has_connected);\n                    app_bt_HF_CreateServiceLink(\n                        bt_profile_manager[id].chan,\n                        (bt_bdaddr_t *)&bt_profile_manager[id].rmt_addr);\n                  }\n                }\n#if defined(__HSP_ENABLE__)\n                else if (btdevice_plf_p->hsp_act &&\n                         bt_profile_manager[id].hsp_connect !=\n                             bt_profile_connect_status_success) {\n                  TRACE(0, \"!!!continue connect hsp\\n\");\n                  app_bt_precheck_before_starting_connecting(\n                      bt_profile_manager[id].has_connected);\n                  app_bt_HS_CreateServiceLink(bt_profile_manager[id].hs_chan,\n                                              &bt_profile_manager[id].rmt_addr);\n                }\n#endif\n      }\n#ifdef __AUTO_CONNECT_OTHER_PROFILE__\n      else {\n                if (btdevice_plf_p->hfp_act &&\n                    bt_profile_manager[id].hfp_connect !=\n                        bt_profile_connect_status_success) {\n                  bt_profile_manager[id].connect_timer_cb =\n                      app_bt_profile_connect_hf_retry_timehandler;\n                  app_bt_accessmode_set(BAM_CONNECTABLE_ONLY);\n                  osTimerStart(bt_profile_manager[id].connect_timer,\n                               APP_BT_PROFILE_CONNECT_RETRY_MS);\n                }\n#if defined(__HSP_ENABLE__)\n                else if (btdevice_plf_p->hsp_act &&\n                         bt_profile_manager[id].hsp_connect !=\n                             bt_profile_connect_status_success) {\n                  bt_profile_manager[id].connect_timer_cb =\n                      app_bt_profile_connect_hs_retry_timehandler;\n                  app_bt_accessmode_set(BAM_CONNECTABLE_ONLY);\n                  osTimerStart(bt_profile_manager[id].connect_timer,\n                               APP_BT_PROFILE_CONNECT_RETRY_MS);\n                }\n#endif\n      }\n#endif\n#ifdef APP_DISABLE_PAGE_SCAN_AFTER_CONN\n      disable_page_scan_check_timer_start();\n#endif\n      break;\n    case BTIF_A2DP_EVENT_STREAM_CLOSED:\n\n      TRACE(2, \"%s A2DP_EVENT_STREAM_CLOSED discReason1:%d\", __func__,\n            Info->discReason);\n\n      if (Info->subevt != A2DP_CONN_CLOSED) {\n                TRACE(0, \"do not need set access mode\");\n                return;\n      }\n\n      if (Stream != NULL) {\n                if (btif_a2dp_get_remote_device(Stream) != NULL)\n                  TRACE(2, \"%s A2DP_EVENT_STREAM_CLOSED discReason2:%d\",\n                        __func__,\n                        btif_me_get_remote_device_disc_reason_saved(\n                            btif_a2dp_get_remote_device(Stream)));\n      }\n\n#if defined(IBRT)\n      if (app_bt_ibrt_reconnect_mobile_profile_flag_get()) {\n                app_bt_HF_CreateServiceLink(\n                    bt_profile_manager[id].chan,\n                    (bt_bdaddr_t *)&bt_profile_manager[id].rmt_addr);\n      }\n#endif\n\n      bt_profile_manager[id].a2dp_connect = bt_profile_connect_status_failure;\n\n      if (bt_profile_manager[id].reconnect_mode ==\n          bt_profile_reconnect_openreconnecting) {\n                if (++bt_profile_manager[id].reconnect_cnt <\n                    APP_BT_PROFILE_OPENNING_RECONNECT_RETRY_LIMIT_CNT) {\n                  app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                  profile_reconnect_enable = true;\n                  bt_profile_manager[id].a2dp_connect =\n                      bt_profile_connect_status_unknow;\n                }\n      } else if (bt_profile_manager[id].reconnect_mode ==\n                 bt_profile_reconnect_reconnecting) {\n                if (++bt_profile_manager[id].reconnect_cnt <\n                    APP_BT_PROFILE_RECONNECT_RETRY_LIMIT_CNT) {\n                  app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                  profile_reconnect_enable = true;\n                } else {\n                  app_bt_restore_reconnecting_idle_mode(id);\n                  // bt_profile_manager[id].reconnect_mode =\n                  // bt_profile_reconnect_null;\n                }\n                TRACE(2, \"%s try to reconnect cnt:%d\", __func__,\n                      bt_profile_manager[id].reconnect_cnt);\n      }\n#if !defined(IBRT)\n#if defined(ENHANCED_STACK)\n      else if (((Info->discReason == 0x08) || (Info->discReason == 0x04)) &&\n#else\n      else if (((Info->discReason == 0x8) || (Info->discReason_saved == 0x8) ||\n                (Info->discReason_saved == 0x0)) &&\n#endif\n               (btdevice_plf_p->a2dp_act) && (!btdevice_plf_p->hfp_act) &&\n               (!btdevice_plf_p->hsp_act)) {\n                bt_profile_manager[id].reconnect_mode =\n                    bt_profile_reconnect_reconnecting;\n                TRACE(2, \"%s try to reconnect cnt:%d\", __func__,\n                      bt_profile_manager[id].reconnect_cnt);\n                app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n                if (app_bt_profile_reconnect_pending(id) != 0) {\n                  profile_reconnect_enable = true;\n                }\n      }\n#endif\n      else {\n                bt_profile_manager[id].a2dp_connect =\n                    bt_profile_connect_status_unknow;\n      }\n\n      if (profile_reconnect_enable) {\n#ifdef __IAG_BLE_INCLUDE__\n                app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n#endif\n                osTimerStart(bt_profile_manager[id].connect_timer,\n                             APP_BT_PROFILE_RECONNECT_RETRY_INTERVAL_MS);\n      }\n      break;\n    default:\n      break;\n    }\n  }\n\n  if (bt_profile_manager[id].reconnect_mode ==\n      bt_profile_reconnect_reconnecting) {\n    bool reconnect_hfp_proc_final = true;\n    bool reconnect_a2dp_proc_final = true;\n    if (bt_profile_manager[id].hfp_connect ==\n        bt_profile_connect_status_failure) {\n      reconnect_hfp_proc_final = false;\n    }\n#if defined(__HSP_ENABLE__)\n    if (btdevice_plf_p->hsp_act != 0) // has HSP\n    {\n      reconnect_hfp_proc_final = true;\n      if (bt_profile_manager[id].hsp_connect ==\n          bt_profile_connect_status_failure) {\n                reconnect_hfp_proc_final = false;\n      }\n    }\n#endif\n    if (bt_profile_manager[id].a2dp_connect ==\n        bt_profile_connect_status_failure) {\n      reconnect_a2dp_proc_final = false;\n    }\n    if (reconnect_hfp_proc_final && reconnect_a2dp_proc_final) {\n      TRACE(3, \"!!!reconnect success %d/%d/%d\\n\",\n            bt_profile_manager[id].hfp_connect,\n            bt_profile_manager[id].hsp_connect,\n            bt_profile_manager[id].a2dp_connect);\n      app_bt_restore_reconnecting_idle_mode(id);\n      // bt_profile_manager[id].reconnect_mode = bt_profile_reconnect_null;\n    }\n  } else if (bt_profile_manager[id].reconnect_mode ==\n             bt_profile_reconnect_openreconnecting) {\n    bool opening_hfp_proc_final = false;\n    bool opening_a2dp_proc_final = false;\n\n    if (btdevice_plf_p->hfp_act && bt_profile_manager[id].hfp_connect ==\n                                       bt_profile_connect_status_unknow) {\n      opening_hfp_proc_final = false;\n    } else {\n      opening_hfp_proc_final = true;\n    }\n\n    if (btdevice_plf_p->a2dp_act && bt_profile_manager[id].a2dp_connect ==\n                                        bt_profile_connect_status_unknow) {\n      opening_a2dp_proc_final = false;\n    } else {\n      opening_a2dp_proc_final = true;\n    }\n\n    if ((opening_hfp_proc_final && opening_a2dp_proc_final) ||\n        (bt_profile_manager[id].a2dp_connect ==\n         bt_profile_connect_status_failure)) {\n      TRACE(3, \"!!!reconnect success %d/%d/%d\\n\",\n            bt_profile_manager[id].hfp_connect,\n            bt_profile_manager[id].hsp_connect,\n            bt_profile_manager[id].a2dp_connect);\n      app_bt_restore_reconnecting_idle_mode(id);\n      // bt_profile_manager[id].reconnect_mode = bt_profile_reconnect_null;\n    }\n\n    if (btdevice_plf_p->a2dp_act && bt_profile_manager[id].a2dp_connect ==\n                                        bt_profile_connect_status_success) {\n      if (btdevice_plf_p->hfp_act && !opening_hfp_proc_final) {\n                if (btif_hf_check_rfcomm_l2cap_channel_is_creating(\n                        &bt_profile_manager[id].rmt_addr)) {\n                  TRACE(0, \"!!!remote is creating hf after a2dp connected\\n\");\n                } else {\n                  TRACE(0, \"!!!continue connect hf\\n\");\n                  app_bt_precheck_before_starting_connecting(\n                      bt_profile_manager[id].has_connected);\n                  app_bt_HF_CreateServiceLink(\n                      bt_profile_manager[id].chan,\n                      (bt_bdaddr_t *)&bt_profile_manager[id].rmt_addr);\n                }\n      }\n#if defined(__HSP_ENABLE)\n      else if (btdevice_plf_p->hsp_act && !opening_hfp_hsp_proc_final) {\n                TRACE(0, \"!!!continue connect hs\\n\");\n                app_bt_precheck_before_starting_connecting(\n                    bt_profile_manager[id].has_connected);\n                app_bt_HS_CreateServiceLink(bt_profile_manager[id].hs_chan,\n                                            &bt_profile_manager[id].rmt_addr);\n      }\n#endif\n    }\n\n    if (bt_profile_manager[id].reconnect_mode == bt_profile_reconnect_null) {\n      for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n                if (bt_profile_manager[i].reconnect_mode ==\n                    bt_profile_reconnect_openreconnecting) {\n                  TRACE(1, \"!!!a2dp->start reconnect device %d\\n\", i);\n                  if ((btdevice_plf_p->hfp_act) &&\n                      (!bt_profile_manager[i].hfp_connect)) {\n                    TRACE(0, \"try connect hf\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[i].has_connected);\n                    app_bt_HF_CreateServiceLink(\n                        bt_profile_manager[i].chan,\n                        (bt_bdaddr_t *)&bt_profile_manager[i].rmt_addr);\n                  }\n#if defined(__HSP_ENABLE__)\n                  else if ((btdevice_plf_p->hsp_act) &&\n                           (!bt_profile_manager[i].hsp_connect)) {\n                    TRACE(0, \"try connect hs\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[i].has_connected);\n                    app_bt_HS_CreateServiceLink(\n                        bt_profile_manager[i].hs_chan,\n                        &bt_profile_manager[i].rmt_addr);\n                  }\n#endif\n                  else if ((btdevice_plf_p->a2dp_act) &&\n                           (!bt_profile_manager[i].a2dp_connect)) {\n                    TRACE(0, \"try connect a2dp\");\n                    app_bt_precheck_before_starting_connecting(\n                        bt_profile_manager[i].has_connected);\n                    app_bt_A2DP_OpenStream(bt_profile_manager[i].stream,\n                                           &bt_profile_manager[i].rmt_addr);\n                  }\n                  break;\n                }\n      }\n    }\n  }\n\n#ifdef __INTERCONNECTION__\n  if (bt_profile_manager[id].hfp_connect == bt_profile_connect_status_success &&\n      bt_profile_manager[id].a2dp_connect ==\n          bt_profile_connect_status_success) {\n    app_interconnection_start_disappear_adv(\n        INTERCONNECTION_BLE_ADVERTISING_INTERVAL,\n        APP_INTERCONNECTION_DISAPPEAR_ADV_IN_MS);\n\n    if (btif_me_get_activeCons() <= 2) {\n      app_interconnection_spp_open(remDev);\n    }\n  }\n#endif\n\n#ifdef __IAG_BLE_INCLUDE__\n  TRACE(3, \"%s hfp %d a2dp %d\", __func__, bt_profile_manager[id].hfp_connect,\n        bt_profile_manager[id].a2dp_connect);\n  if (bt_profile_manager[id].hfp_connect == bt_profile_connect_status_success &&\n#ifdef __HSP_ENABLE__\n      bt_profile_manager[id].hsp_connect == bt_profile_connect_status_success &&\n#endif\n      bt_profile_manager[id].a2dp_connect ==\n          bt_profile_connect_status_success) {\n    app_ble_force_switch_adv(BLE_SWITCH_USER_BT_CONNECT, true);\n  }\n#endif\n\n  if (!bt_profile_manager[id].has_connected &&\n      (bt_profile_manager[id].hfp_connect ==\n           bt_profile_connect_status_success ||\n#ifdef __HSP_ENABLE__\n       bt_profile_manager[id].hsp_connect ==\n           bt_profile_connect_status_success ||\n#endif\n       bt_profile_manager[id].a2dp_connect ==\n           bt_profile_connect_status_success)) {\n\n    bt_profile_manager[id].has_connected = true;\n    TRACE(0, \"BT connected!!!\");\n    IsMobileLinkLossing = FALSE;\n#ifndef IBRT\n    btif_me_get_remote_device_name(&(bt_profile_manager[id].rmt_addr),\n                                   app_bt_global_handle);\n#endif\n#if defined(MEDIA_PLAYER_SUPPORT) //&& !defined(IBRT)\n    app_voice_report(APP_STATUS_INDICATION_CONNECTED, id);\n#endif\n\n#if 0 // #ifdef __INTERCONNECTION__\n        app_interconnection_start_disappear_adv(BLE_ADVERTISING_INTERVAL, APP_INTERCONNECTION_DISAPPEAR_ADV_IN_MS);\n        app_interconnection_spp_open();\n#endif\n\n#ifdef __INTERACTION__\n    //    app_interaction_spp_open();\n#endif\n  }\n\n  if (bt_profile_manager[id].has_connected &&\n      (bt_profile_manager[id].hfp_connect !=\n           bt_profile_connect_status_success &&\n#ifdef __HSP_ENABLE__\n       bt_profile_manager[id].hsp_connect !=\n           bt_profile_connect_status_success &&\n#endif\n       bt_profile_manager[id].a2dp_connect !=\n           bt_profile_connect_status_success)) {\n\n    bt_profile_manager[id].has_connected = false;\n    TRACE(0, \"BT disconnected!!!\");\n\n#ifdef GFPS_ENABLED\n    if (app_gfps_is_last_response_pending()) {\n      app_gfps_enter_connectable_mode_req_handler(app_gfps_get_last_response());\n    }\n#endif\n\n#if defined(MEDIA_PLAYER_SUPPORT) && !defined(IBRT)\n    app_voice_report(APP_STATUS_INDICATION_DISCONNECTED, id);\n#endif\n#ifdef __INTERCONNECTION__\n    app_interconnection_disconnected_callback();\n#endif\n\n    app_set_disconnecting_all_bt_connections(false);\n  }\n\n#ifdef __BT_ONE_BRING_TWO__\n  app_bt_update_connectable_mode_after_connection_management();\n#endif\n}\n\n#ifdef BTIF_HID_DEVICE\nvoid hid_exit_shutter_mode(void);\n#endif\n\nstatic bool isDisconnectAllBtConnections = false;\n\nbool app_is_disconnecting_all_bt_connections(void) {\n  return isDisconnectAllBtConnections;\n}\n\nvoid app_set_disconnecting_all_bt_connections(bool isEnable) {\n  isDisconnectAllBtConnections = isEnable;\n}\n\nbt_status_t LinkDisconnectDirectly(bool PowerOffFlag) {\n  app_set_disconnecting_all_bt_connections(true);\n  // TRACE(1,\"osapi_lock_is_exist:%d\",osapi_lock_is_exist());\n  if (osapi_lock_is_exist())\n    osapi_lock_stack();\n#ifdef __IAG_BLE_INCLUDE__\n  TRACE(1, \"ble_connected_state:%d\", app_ble_is_any_connection_exist());\n#endif\n\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (true == PowerOffFlag)\n    p_ibrt_ctrl->ibrt_in_poweroff = true;\n\n  if (p_ibrt_ctrl->init_done) {\n    if (IBRT_MASTER == p_ibrt_ctrl->current_role) {\n      if (app_tws_ibrt_mobile_link_connected()) {\n                // should check return status\n                app_tws_ibrt_disconnect_connection(\n                    btif_me_get_remote_device_by_handle(\n                        p_ibrt_ctrl->mobile_conhandle));\n      }\n    }\n    if (app_tws_ibrt_tws_link_connected()) {\n      app_tws_ibrt_disconnect_connection(\n          btif_me_get_remote_device_by_handle(p_ibrt_ctrl->tws_conhandle));\n    }\n  }\n\n  if (osapi_lock_is_exist())\n    osapi_unlock_stack();\n\n  osDelay(500);\n\n  return BT_STS_SUCCESS;\n#endif\n\n  TRACE(1, \"activeCons:%d\", btif_me_get_activeCons());\n\n  uint8_t Tmp_activeCons = btif_me_get_activeCons();\n\n  if (Tmp_activeCons) {\n    // TRACE(3,\"%s id1 hf:%d a2dp:%d\",__func__,\n    // app_bt_device.hf_channel[BT_DEVICE_ID_1].state,\n    // btif_a2dp_get_stream_state(app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream));\n    TRACE(3, \"%s id1 hf:%d a2dp:%d\", __func__,\n          btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_1]),\n          btif_a2dp_get_stream_state(\n              app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream));\n#ifdef BTIF_HID_DEVICE\n    hid_exit_shutter_mode();\n#endif\n    if (btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_1]) ==\n        BTIF_HF_STATE_OPEN) {\n      app_bt_HF_DisconnectServiceLink(app_bt_device.hf_channel[BT_DEVICE_ID_1]);\n    }\n#if defined(__HSP_ENABLE__)\n    if (app_bt_device.hs_channel[BT_DEVICE_ID_1].state == HS_STATE_OPEN) {\n      app_bt_HS_DisconnectServiceLink(\n          &app_bt_device.hs_channel[BT_DEVICE_ID_1]);\n    }\n#endif // btif_a2dp_get_stream_state(app_bt_device.a2dp_stream[device_id]->a2dp_stream)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream);\n    }\n#if defined(A2DP_LHDC_ON)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream);\n    }\n#endif\n#if defined(A2DP_LDAC_ON)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]->a2dp_stream);\n    }\n#endif\n\n#if defined(A2DP_AAC_ON)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream);\n    }\n#endif\n#if defined(A2DP_SCALABLE_ON)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_1]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_1]->a2dp_stream);\n    }\n#endif\n    if (btif_avrcp_get_remote_device(\n            app_bt_device.avrcp_channel[BT_DEVICE_ID_1]\n                ->avrcp_channel_handle)) {\n      btif_avrcp_disconnect(\n          app_bt_device.avrcp_channel[BT_DEVICE_ID_1]->avrcp_channel_handle);\n    }\n#ifdef __BT_ONE_BRING_TWO__\n    TRACE(3, \"%s id2 hf:%d a2dp:%d\", __func__,\n          btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_2]),\n          btif_a2dp_get_stream_state(\n              app_bt_device.a2dp_stream[BT_DEVICE_ID_2]->a2dp_stream));\n    // if(app_bt_device.hf_channel[BT_DEVICE_ID_2].state == HF_STATE_OPEN){\n    if (btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_2]) ==\n        BTIF_HF_STATE_OPEN) {\n      app_bt_HF_DisconnectServiceLink(app_bt_device.hf_channel[BT_DEVICE_ID_2]);\n    }\n\n#if defined(__HSP_ENABLE__)\n    if (app_bt_device.hs_channel[BT_DEVICE_ID_2].state == HS_STATE_OPEN) {\n      app_bt_HS_DisconnectServiceLink(\n          &app_bt_device.hs_channel[BT_DEVICE_ID_2]);\n    }\n#endif // __HSP_ENABLE__\n\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_stream[BT_DEVICE_ID_2]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_stream[BT_DEVICE_ID_2]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_stream[BT_DEVICE_ID_2]->a2dp_stream);\n    }\n#if defined(A2DP_LHDC_ON)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_2]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_2]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_2]->a2dp_stream);\n    }\n#endif // A2DP_LHDC_ON\n#if defined(A2DP_AAC_ON)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_2]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_2]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_2]->a2dp_stream);\n    }\n#endif // A2DP_AAC_ON\n#if defined(A2DP_SCALABLE_ON)\n    if (btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_2]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_STREAMING ||\n        btif_a2dp_get_stream_state(\n            app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_2]->a2dp_stream) ==\n            BTIF_AVDTP_STRM_STATE_OPEN) {\n      app_bt_A2DP_CloseStream(\n          app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_2]->a2dp_stream);\n    }\n#endif // A2DP_SCALABLE_ON\n    if (btif_avrcp_get_remote_device(\n            app_bt_device.avrcp_channel[BT_DEVICE_ID_2]\n                ->avrcp_channel_handle)) {\n      btif_avrcp_disconnect(\n          app_bt_device.avrcp_channel[BT_DEVICE_ID_2]->avrcp_channel_handle);\n    }\n#endif //__BT_ONE_BRING_TWO__\n\n#ifdef BISTO_ENABLED\n    gsound_custom_bt_disconnect_all_channel();\n#endif\n  }\n\n#ifdef __IAG_BLE_INCLUDE__\n  if (app_ble_is_any_connection_exist()) {\n#ifdef GFPS_ENABLED\n    if (!app_gfps_is_last_response_pending())\n#endif\n      app_ble_disconnect_all();\n  }\n#endif\n\n  if (osapi_lock_is_exist())\n    osapi_unlock_stack();\n\n  osDelay(500);\n\n  if (Tmp_activeCons) {\n    btif_remote_device_t *remDev = app_bt_get_remoteDev(BT_DEVICE_ID_1);\n    if (NULL != remDev) {\n      app_bt_MeDisconnectLink(remDev);\n    }\n\n#ifdef __BT_ONE_BRING_TWO__\n    remDev = app_bt_get_remoteDev(BT_DEVICE_ID_2);\n    if (NULL != remDev) {\n      osDelay(200);\n      app_bt_MeDisconnectLink(remDev);\n    }\n#endif\n  }\n  return BT_STS_SUCCESS;\n}\n\nvoid app_disconnect_all_bt_connections(void) { LinkDisconnectDirectly(false); }\n\nstatic int app_custom_function_process(APP_MESSAGE_BODY *msg_body) {\n  APP_APPTHREAD_REQ_CUSTOMER_CALL_FN_T customer_call =\n      (APP_APPTHREAD_REQ_CUSTOMER_CALL_FN_T)(msg_body->message_ptr);\n  TRACE(4, \"func:0x%08x,param0:0x%08x, param1:0x%08x\", msg_body->message_ptr,\n        msg_body->message_Param0, msg_body->message_Param1);\n  if (customer_call) {\n    customer_call((void *)msg_body->message_Param0,\n                  (void *)msg_body->message_Param1);\n  }\n  return 0;\n}\n\nint app_bt_start_custom_function_in_app_thread(uint32_t param0, uint32_t param1,\n                                               uint32_t funcPtr) {\n  APP_MESSAGE_BLOCK msg;\n\n  msg.mod_id = APP_MODUAL_CUSTOM_FUNCTION;\n  msg.msg_body.message_id = 0;\n  msg.msg_body.message_ptr = funcPtr;\n  msg.msg_body.message_Param0 = param0;\n  msg.msg_body.message_Param1 = param1;\n\n  app_mailbox_put(&msg);\n  return 0;\n}\n\nvoid app_bt_init(void) {\n  app_bt_mail_init();\n  app_set_threadhandle(APP_MODUAL_BT, app_bt_handle_process);\n  btif_me_sec_set_io_cap_rsp_reject_ext(\n      app_bt_profile_connect_openreconnecting);\n  app_bt_active_mode_manager_init();\n  app_set_threadhandle(APP_MODUAL_CUSTOM_FUNCTION, app_custom_function_process);\n}\n\nextern \"C\" bool app_bt_has_connectivitys(void) {\n  int activeCons;\n  osapi_lock_stack();\n  activeCons = btif_me_get_activeCons();\n  osapi_unlock_stack();\n\n  if (activeCons > 0)\n    return true;\n\n  return false;\n#if 0\n    if(app_bt_device.hf_channel[BT_DEVICE_ID_1].cmgrHandler.remDev)\n        return true;\n    if(app_bt_device.a2dp_stream[BT_DEVICE_ID_1].device->cmgrHandler.remDev)\n        return true;\n#ifdef __BT_ONE_BRING_TWO__\n    if(app_bt_device.hf_channel[BT_DEVICE_ID_2].cmgrHandler.remDev)\n        return true;\n    if(app_bt_device.a2dp_stream[BT_DEVICE_ID_2].device->cmgrHandler.remDev)\n        return true;\n#endif\n    return false;\n#endif\n}\n\n#ifdef __TWS_CHARGER_BOX__\n\nextern \"C\" {\nbt_status_t ME_Ble_Clear_Whitelist(void);\nbt_status_t ME_Ble_Set_Private_Address(BT_BD_ADDR *addr);\nbt_status_t ME_Ble_Add_Dev_To_Whitelist(U8 addr_type, BT_BD_ADDR *addr);\nbt_status_t ME_Ble_SetAdv_data(U8 len, U8 *data);\nbt_status_t ME_Ble_SetScanRsp_data(U8 len, U8 *data);\nbt_status_t ME_Ble_SetAdv_parameters(adv_para_struct *para);\nbt_status_t ME_Ble_SetAdv_en(U8 en);\nbt_status_t ME_Ble_Setscan_parameter(scan_para_struct *para);\nbt_status_t ME_Ble_Setscan_en(U8 scan_en, U8 filter_duplicate);\n}\n\nint8_t power_level = 0;\n#define TWS_BOX_OPEN 1\n#define TWS_BOX_CLOSE 0\nvoid app_tws_box_set_slave_adv_data(uint8_t power_level, uint8_t box_status) {\n  uint8_t adv_data[] = {\n      0x02, 0xfe, 0x00, 0x02, 0xfd, 0x00 // manufacturer data\n  };\n\n  adv_data[2] = power_level;\n\n  adv_data[5] = box_status;\n  ME_Ble_SetAdv_data(sizeof(adv_data), adv_data);\n}\n\nvoid app_tws_box_set_slave_adv_para(void) {\n  uint8_t peer_addr[BTIF_BD_ADDR_SIZE] = {0};\n  adv_para_struct para;\n\n  para.interval_min = 0x0040; // 20ms\n  para.interval_max = 0x0040; // 20ms\n  para.adv_type = 0x03;\n  para.own_addr_type = 0x01;\n  para.peer_addr_type = 0x01;\n  para.adv_chanmap = 0x07;\n  para.adv_filter_policy = 0x00;\n  memcpy(para.bd_addr.addr, peer_addr, BTIF_BD_ADDR_SIZE);\n\n  ME_Ble_SetAdv_parameters(¶);\n}\n\nextern uint8_t bt_addr[6];\nvoid app_tws_start_chargerbox_adv(void) {\n  app_tws_box_set_slave_adv_data(power_level, TWS_BOX_OPEN);\n  ME_Ble_Set_Private_Address((BT_BD_ADDR *)bt_addr);\n  app_tws_box_set_slave_adv_para();\n  ME_Ble_SetAdv_en(1);\n}\n\n#endif\n\nbool app_is_hfp_service_connected(void) {\n  return (bt_profile_manager[BT_DEVICE_ID_1].hfp_connect ==\n          bt_profile_connect_status_success);\n}\n\nbtif_remote_device_t *app_bt_get_remoteDev(uint8_t deviceId) {\n  btif_remote_device_t *currentRemDev = NULL;\n\n  if (btif_a2dp_get_stream_state(\n          app_bt_device.a2dp_stream[deviceId]->a2dp_stream) ==\n          BTIF_AVDTP_STRM_STATE_STREAMING ||\n      btif_a2dp_get_stream_state(\n          app_bt_device.a2dp_stream[deviceId]->a2dp_stream) ==\n          BTIF_AVDTP_STRM_STATE_OPEN) {\n    currentRemDev = btif_a2dp_get_stream_conn_remDev(\n        app_bt_device.a2dp_stream[deviceId]->a2dp_stream);\n  } else if (btif_get_hf_chan_state(app_bt_device.hf_channel[deviceId]) ==\n             BTIF_HF_STATE_OPEN) {\n    currentRemDev = (btif_remote_device_t *)btif_hf_cmgr_get_remote_device(\n        app_bt_device.hf_channel[deviceId]);\n  }\n\n  TRACE(2, \"%s get current Remdev %p\", __FUNCTION__, currentRemDev);\n\n  return currentRemDev;\n}\n\nvoid app_bt_stay_active_rem_dev(btif_remote_device_t *pRemDev) {\n  if (pRemDev) {\n    btif_cmgr_handler_t *cmgrHandler;\n    /* Clear the sniff timer */\n    cmgrHandler = btif_cmgr_get_acl_handler(pRemDev);\n    btif_cmgr_clear_sniff_timer(cmgrHandler);\n    btif_cmgr_disable_sniff_timer(cmgrHandler);\n    app_bt_Me_SetLinkPolicy(pRemDev, BTIF_BLP_MASTER_SLAVE_SWITCH);\n  }\n}\n\nvoid app_bt_stay_active(uint8_t deviceId) {\n  btif_remote_device_t *currentRemDev = app_bt_get_remoteDev(deviceId);\n  app_bt_stay_active_rem_dev(currentRemDev);\n}\n\nvoid app_bt_allow_sniff_rem_dev(btif_remote_device_t *pRemDev) {\n  if (pRemDev &&\n      (BTIF_BDS_CONNECTED == btif_me_get_remote_device_state(pRemDev))) {\n    btif_cmgr_handler_t *cmgrHandler;\n    /* Enable the sniff timer */\n    cmgrHandler = btif_cmgr_get_acl_handler(pRemDev);\n\n    /* Start the sniff timer */\n    btif_sniff_info_t sniffInfo;\n    sniffInfo.minInterval = BTIF_CMGR_SNIFF_MIN_INTERVAL;\n    sniffInfo.maxInterval = BTIF_CMGR_SNIFF_MAX_INTERVAL;\n    sniffInfo.attempt = BTIF_CMGR_SNIFF_ATTEMPT;\n    sniffInfo.timeout = BTIF_CMGR_SNIFF_TIMEOUT;\n    if (cmgrHandler) {\n      btif_cmgr_set_sniff_timer(cmgrHandler, &sniffInfo, BTIF_CMGR_SNIFF_TIMER);\n    }\n    app_bt_Me_SetLinkPolicy(pRemDev,\n                            BTIF_BLP_MASTER_SLAVE_SWITCH | BTIF_BLP_SNIFF_MODE);\n  }\n}\n\nextern \"C\" uint8_t is_sco_mode(void);\nvoid app_bt_allow_sniff(uint8_t deviceId) {\n  if (a2dp_is_music_ongoing() || is_sco_mode()) {\n    return;\n  }\n  btif_remote_device_t *currentRemDev = app_bt_get_remoteDev(deviceId);\n  app_bt_allow_sniff_rem_dev(currentRemDev);\n}\n\nvoid app_bt_stop_sniff(uint8_t deviceId) {\n  btif_remote_device_t *currentRemDev = app_bt_get_remoteDev(deviceId);\n\n  if (currentRemDev &&\n      (btif_me_get_remote_device_state(currentRemDev) == BTIF_BDS_CONNECTED)) {\n    if (btif_me_get_current_mode(currentRemDev) == BTIF_BLM_SNIFF_MODE) {\n      TRACE(1, \"!!! stop sniff currmode:%d\\n\",\n            btif_me_get_current_mode(currentRemDev));\n      app_bt_ME_StopSniff(currentRemDev);\n    }\n  }\n}\n\nbool app_bt_is_device_connected(uint8_t deviceId) {\n  if (deviceId < BT_DEVICE_NUM) {\n    return bt_profile_manager[deviceId].has_connected;\n  } else {\n    // Indicate no connection is user passes invalid deviceId\n    return false;\n  }\n}\n\n#if defined(__BT_SELECT_PROF_DEVICE_ID__)\nint8_t app_bt_a2dp_is_same_stream(a2dp_stream_t *src_Stream,\n                                  a2dp_stream_t *dst_Stream) {\n  return btif_a2dp_is_register_codec_same(src_Stream, dst_Stream);\n}\nvoid app_bt_a2dp_find_same_unused_stream(a2dp_stream_t *in_Stream,\n                                         a2dp_stream_t **out_Stream,\n                                         uint32_t device_id) {\n  *out_Stream = NULL;\n  if (app_bt_a2dp_is_same_stream(\n          app_bt_device.a2dp_stream[device_id]->a2dp_stream, in_Stream))\n    *out_Stream = app_bt_device.a2dp_stream[device_id]->a2dp_stream;\n#if defined(A2DP_LHDC_ON)\n  else if (app_bt_a2dp_is_same_stream(\n               app_bt_device.a2dp_lhdc_stream[device_id]->a2dp_stream,\n               in_Stream))\n    *out_Stream = app_bt_device.a2dp_lhdc_stream[device_id]->a2dp_stream;\n#endif\n#if defined(A2DP_LDAC_ON)\n  else if (app_bt_a2dp_is_same_stream(\n               app_bt_device.a2dp_ldac_stream[device_id]->a2dp_stream,\n               in_Stream))\n    *out_Stream = app_bt_device.a2dp_ldac_stream[device_id]->a2dp_stream;\n#endif\n#if defined(A2DP_AAC_ON)\n  else if (app_bt_a2dp_is_same_stream(\n               app_bt_device.a2dp_aac_stream[device_id]->a2dp_stream,\n               in_Stream))\n    *out_Stream = app_bt_device.a2dp_aac_stream[device_id]->a2dp_stream;\n#endif\n#if defined(A2DP_SCALABLE_ON)\n  else if (app_bt_a2dp_is_same_stream(\n               app_bt_device.a2dp_scalable_stream[device_id]->a2dp_stream,\n               in_Stream))\n    *out_Stream = app_bt_device.a2dp_scalable_stream[device_id]->a2dp_stream;\n#endif\n}\nint8_t app_bt_a2dp_is_stream_on_device_id(a2dp_stream_t *in_Stream,\n                                          uint32_t device_id) {\n  if (app_bt_device.a2dp_stream[device_id]->a2dp_stream == in_Stream)\n    return 1;\n#if defined(A2DP_LHDC_ON)\n  else if (app_bt_device.a2dp_lhdc_stream[device_id]->a2dp_stream == in_Stream)\n    return 1;\n#endif\n#if defined(A2DP_LDAC_ON)\n  else if (app_bt_device.a2dp_ldac_stream[device_id]->a2dp_stream == in_Stream)\n    return 1;\n#endif\n#if defined(A2DP_AAC_ON)\n  else if (app_bt_device.a2dp_aac_stream[device_id]->a2dp_stream == in_Stream)\n    return 1;\n#endif\n#if defined(A2DP_SCALABLE_ON)\n  else if (app_bt_device.a2dp_scalable_stream[device_id]->a2dp_stream ==\n           in_Stream)\n    return 1;\n#endif\n  return 0;\n}\nint8_t app_bt_hfp_is_chan_on_device_id(hf_chan_handle_t chan,\n                                       uint32_t device_id) {\n  if (app_bt_device.hf_channel[device_id] == chan)\n    return 1;\n  return 0;\n}\nint8_t app_bt_is_any_profile_connected(uint32_t device_id) {\n  // TODO avrcp?spp?hid?bisto?ama?dma?rfcomm?\n  if ((bt_profile_manager[device_id].hfp_connect ==\n       bt_profile_connect_status_success) ||\n      (bt_profile_manager[device_id].hsp_connect ==\n       bt_profile_connect_status_success) ||\n      (bt_profile_manager[device_id].a2dp_connect ==\n       bt_profile_connect_status_success)) {\n    return 1;\n  }\n\n  return 0;\n}\nint8_t app_bt_is_a2dp_connected(uint32_t device_id) {\n  if (bt_profile_manager[device_id].a2dp_connect ==\n      bt_profile_connect_status_success) {\n    return 1;\n  }\n\n  return 0;\n}\nbtif_remote_device_t *app_bt_get_connected_profile_remdev(uint32_t device_id) {\n  if (bt_profile_manager[device_id].a2dp_connect ==\n      bt_profile_connect_status_success) {\n    return (btif_remote_device_t *)btif_a2dp_get_remote_device(\n        app_bt_device.a2dp_connected_stream[device_id]);\n  } else if (bt_profile_manager[device_id].hfp_connect ==\n             bt_profile_connect_status_success) {\n    return (btif_remote_device_t *)btif_hf_cmgr_get_remote_device(\n        app_bt_device.hf_channel[device_id]);\n  }\n#if defined(__HSP_ENABLE__)\n  else if (bt_profile_manager[device_id].hsp_connect ==\n           bt_profile_connect_status_success) {\n    // TODO hsp support\n    // return (btif_remote_device_t\n    // *)btif_hs_cmgr_get_remote_device(app_bt_device.hs_channel[i]);\n  }\n#endif\n\n  return NULL;\n}\n#endif\n\nbool app_bt_get_device_bdaddr(uint8_t deviceId, uint8_t *btAddr) {\n  bool ret = false;\n\n  if (app_bt_is_device_connected(deviceId)) {\n    btif_remote_device_t *currentRemDev = app_bt_get_remoteDev(deviceId);\n\n    if (currentRemDev) {\n      memcpy(btAddr, btif_me_get_remote_device_bdaddr(currentRemDev)->address,\n             BTIF_BD_ADDR_SIZE);\n      ret = true;\n    }\n  }\n\n  return ret;\n}\n\nvoid fast_pair_enter_pairing_mode_handler(void) {\n#if defined(IBRT)\n  app_ibrt_ui_judge_scan_type(IBRT_FASTPAIR_TRIGGER, MOBILE_LINK, 0);\n#else\n  app_bt_accessmode_set(BTIF_BAM_GENERAL_ACCESSIBLE);\n#endif\n\n#ifdef __INTERCONNECTION__\n  clear_discoverable_adv_timeout_flag();\n  app_interceonnection_start_discoverable_adv(\n      INTERCONNECTION_BLE_FAST_ADVERTISING_INTERVAL,\n      APP_INTERCONNECTION_FAST_ADV_TIMEOUT_IN_MS);\n#endif\n}\n\nbool app_bt_is_hfp_audio_on(void) {\n  bool hfp_audio_is_on = false;\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    if (BTIF_HF_AUDIO_CON == app_bt_device.hf_audio_state[i]) {\n      hfp_audio_is_on = true;\n      break;\n    }\n  }\n  return hfp_audio_is_on;\n}\n\nbtif_remote_device_t *app_bt_get_connected_mobile_device_ptr(void) {\n  return connectedMobile;\n}\nvoid app_bt_set_spp_device_ptr(btif_remote_device_t *device) {\n  TRACE(2, \"%s set sppOpenMobile is %p\", __func__, device);\n  sppOpenMobile = device;\n  return;\n}\n\nbtif_remote_device_t *app_bt_get_spp_device_ptr(void) {\n  TRACE(2, \"%s sppOpenMobile %p\", __func__, sppOpenMobile);\n  ASSERT((sppOpenMobile != NULL), \"sppOpenMobile is NULL!!!!!!!!!!!!\");\n  return sppOpenMobile;\n}\n\n#ifdef BT_USB_AUDIO_DUAL_MODE\n#include \"a2dp_api.h\"\nextern \"C\" a2dp_stream_t *app_bt_get_steam(enum BT_DEVICE_ID_T id) {\n  a2dp_stream_t *stream;\n\n  stream = (a2dp_stream_t *)bt_profile_manager[id].stream;\n  return stream;\n}\n\nextern \"C\" int app_bt_get_bt_addr(enum BT_DEVICE_ID_T id, bt_bdaddr_t *bdaddr) {\n  memcpy(bdaddr, &bt_profile_manager[id].rmt_addr, sizeof(bt_bdaddr_t));\n  return 0;\n}\n\nextern \"C\" bool app_bt_a2dp_service_is_connected(void) {\n  return (bt_profile_manager[BT_DEVICE_ID_1].a2dp_connect ==\n          bt_profile_connect_status_success);\n}\n#endif\n\nstruct app_bt_search_t {\n  bool search_start;\n  bool inquiry_pending;\n  bool device_searched;\n  bt_bdaddr_t address;\n};\n\nstatic bool app_bt_search_device_match(const bt_bdaddr_t *addr,\n                                       const char *name) {\n  TRACE(7,\n        \"app_bt_search_callback found device %02x:%02x:%02x:%02x:%02x:%02x \"\n        \"'%s'\\n\",\n        addr->address[0], addr->address[1], addr->address[2], addr->address[3],\n        addr->address[4], addr->address[5], name);\n\n#if defined(HFP_MOBILE_AG_ROLE)\n  bt_bdaddr_t test_device1 = {{0xd2, 0x53, 0x86, 0x42, 0x71, 0x31}};\n  bt_bdaddr_t test_device2 = {{0xd3, 0x53, 0x86, 0x42, 0x71, 0x31}};\n  return (memcmp(addr, test_device1.address, sizeof(bt_bdaddr_t)) == 0 ||\n          memcmp(addr, test_device2.address, sizeof(bt_bdaddr_t)) == 0);\n#else\n  return false;\n#endif\n}\n\nstatic struct app_bt_search_t g_bt_search;\nstatic void app_bt_search_callback(const btif_event_t *event) {\n  TRACE(2, \"%s event %d\\n\", __func__, btif_me_get_callback_event_type(event));\n\n  switch (btif_me_get_callback_event_type(event)) {\n  case BTIF_BTEVENT_INQUIRY_RESULT: {\n    bt_bdaddr_t *addr = btif_me_get_callback_event_inq_result_bd_addr(event);\n    uint8_t mode = btif_me_get_callback_event_inq_result_inq_mode(event);\n    const int NAME_MAX_LEN = 255;\n    char device_name[NAME_MAX_LEN + 1] = {0};\n    int device_name_len = 0;\n    uint8_t *eir = NULL;\n\n    if ((mode == BTIF_INQ_MODE_EXTENDED) &&\n        (eir = btif_me_get_callback_event_inq_result_ext_inq_resp(event))) {\n      device_name_len = btif_me_get_ext_inq_data(\n          eir, 0x09, (uint8_t *)device_name, NAME_MAX_LEN);\n    }\n\n    if (app_bt_search_device_match(addr,\n                                   device_name_len > 0 ? device_name : \"\")) {\n      g_bt_search.address = *addr;\n      g_bt_search.device_searched = true;\n      btif_me_cancel_inquiry();\n    }\n  } break;\n  case BTIF_BTEVENT_INQUIRY_COMPLETE:\n  case BTIF_BTEVENT_INQUIRY_CANCELED:\n    btif_me_unregister_globa_handler((btif_handler *)btif_me_get_bt_handler());\n    g_bt_search.search_start = false;\n    g_bt_search.inquiry_pending = false;\n    if (g_bt_search.device_searched) {\n#if defined(HFP_MOBILE_AG_ROLE)\n      bt_profile_manager[BT_DEVICE_ID_1].reconnect_mode =\n          bt_profile_reconnect_null;\n      bt_profile_manager[BT_DEVICE_ID_1].rmt_addr = g_bt_search.address;\n      bt_profile_manager[BT_DEVICE_ID_1].chan =\n          app_bt_device.hf_channel[BT_DEVICE_ID_1];\n      app_bt_precheck_before_starting_connecting(\n          bt_profile_manager[BT_DEVICE_ID_1].has_connected);\n      app_bt_HF_CreateServiceLink(bt_profile_manager[BT_DEVICE_ID_1].chan,\n                                  &bt_profile_manager[BT_DEVICE_ID_1].rmt_addr);\n#endif\n    } else {\n      TRACE(1, \"%s no device matched\\n\", __func__);\n#if 0\n                /* continue to search ??? */\n                app_bt_start_search();\n#endif\n    }\n    break;\n  default:\n    break;\n  }\n}\n\nvoid app_bt_start_search(void) {\n  uint8_t max_search_time = 10; /* 12.8s */\n\n  if (g_bt_search.search_start) {\n    TRACE(1, \"%s already started\\n\", __func__);\n    return;\n  }\n\n  btif_me_set_handler(btif_me_get_bt_handler(), app_bt_search_callback);\n\n  btif_me_set_event_mask(\n      btif_me_get_bt_handler(),\n      BTIF_BEM_INQUIRY_RESULT | BTIF_BEM_INQUIRY_COMPLETE |\n          BTIF_BEM_INQUIRY_CANCELED | BTIF_BEM_LINK_CONNECT_IND |\n          BTIF_BEM_LINK_CONNECT_CNF | BTIF_BEM_LINK_DISCONNECT |\n          BTIF_BEM_ROLE_CHANGE | BTIF_BEM_MODE_CHANGE);\n\n  btif_me_register_global_handler(btif_me_get_bt_handler());\n\n  g_bt_search.search_start = true;\n  g_bt_search.device_searched = false;\n  g_bt_search.inquiry_pending = false;\n\n  if (BT_STS_PENDING != btif_me_inquiry(BTIF_BT_IAC_GIAC, max_search_time, 0)) {\n    TRACE(1, \"%s start inquiry failed\\n\", __func__);\n    g_bt_search.inquiry_pending = true;\n  }\n}\n\nuint8_t app_bt_avrcp_get_notify_trans_id(void) {\n  return btif_a2dp_get_avrcpadvancedpdu_trans_id(\n      app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1]);\n}\n\nvoid app_bt_avrcp_set_notify_trans_id(uint8_t trans_id) {\n  TRACE(3, \"%s %d %p\\n\", __func__, trans_id,\n        app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1]);\n  btif_a2dp_set_avrcpadvancedpdu_trans_id(\n      app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1], trans_id);\n}\n\nuint8_t app_bt_avrcp_get_ctl_trans_id(void) {\n  return btif_avrcp_get_ctl_trans_id(\n      app_bt_device.avrcp_channel[BT_DEVICE_ID_1]);\n}\n\nvoid app_bt_avrcp_set_ctl_trans_id(uint8_t trans_id) {\n  TRACE(3, \"%s %d %p\\n\", __func__, trans_id,\n        app_bt_device.avrcp_channel[BT_DEVICE_ID_1]);\n  btif_avrcp_set_ctl_trans_id(app_bt_device.avrcp_channel[BT_DEVICE_ID_1],\n                              trans_id);\n}\n\nvoid app_bt_set_mobile_a2dp_stream(uint32_t deviceId, a2dp_stream_t *stream) {\n  bt_profile_manager[deviceId].stream = stream;\n}\n\n#if defined(IBRT)\n#if defined(ENHANCED_STACK)\nuint32_t app_bt_save_spp_app_ctx(uint32_t app_id, btif_remote_device_t *rem_dev,\n                                 uint8_t *buf, uint32_t buf_len) {\n  bt_bdaddr_t *remote = NULL;\n  uint32_t offset = 0;\n  struct spp_device *device = (struct spp_device *)btif_spp_get_device(app_id);\n  ASSERT(device, \"%s NULL spp device app_id=0x%x\", __func__, app_id);\n\n  // save app_id\n  buf[offset++] = app_id & 0xFF;\n  buf[offset++] = (app_id >> 8) & 0xFF;\n  buf[offset++] = (app_id >> 16) & 0xFF;\n  buf[offset++] = (app_id >> 24) & 0xFF;\n\n  // save port type\n  buf[offset++] = device->portType;\n\n  // save remote address\n  remote = btif_me_get_remote_device_bdaddr(rem_dev);\n  memcpy(buf + offset, remote, sizeof(bt_bdaddr_t));\n  offset += sizeof(bt_bdaddr_t);\n\n  // TRACE(7,\"%s:%02x:%02x:%02x:%02x:%02x:%02x\\r\\n\",\n  //    __func__, remote->addr[5], remote->addr[4], remote->addr[3],\n  //               remote->addr[2], remote->addr[1], remote->addr[0]);\n\n  // spp device\n  buf[offset++] = device->spp_connected_flag;\n\n  return offset;\n}\n\nuint32_t app_bt_restore_spp_app_ctx(uint8_t *buf, uint32_t buf_len,\n                                    uint32_t app_id) {\n  bt_bdaddr_t remote;\n  uint32_t offset = 0;\n  struct spp_device *device = NULL;\n  uint8_t i = 0;\n  uint8_t port_type = 0;\n  uint32_t app_id_restore = 0;\n\n  // restore app_id\n  for (i = 0; i < 4; i++) {\n    app_id_restore += (buf[offset + i] << (8 * i));\n  }\n  offset += 4;\n\n  port_type = buf[offset++];\n\n  ASSERT(app_id_restore == app_id, \"%s,spp app id mismatch=%x,%x\", __func__,\n         app_id_restore, app_id);\n\n  // restore remote address\n  memcpy(&remote, buf + offset, sizeof(remote));\n  offset += sizeof(remote);\n\n  device = (struct spp_device *)btif_spp_get_device(app_id);\n\n#ifdef __INTERCONNECTION__\n  TRACE(1, \"%s,%x,%x,%x\", __func__, app_id, BTIF_APP_SPP_CLIENT_CCMP_ID,\n        BTIF_APP_SPP_CLIENT_RED_ID);\n#endif\n\n  if (device == NULL) {\n    /*\n     * SPP client device may not be created in bt host initialized stage,so IBRT\n     * SLAVE will restore it\n     */\n    if (port_type == BTIF_SPP_CLIENT_PORT) {\n      TRACE(1, \"%s,spp client device null\", __func__);\n      switch (app_id) {\n#ifdef __INTERCONNECTION__\n      case BTIF_APP_SPP_CLIENT_CCMP_ID:\n                app_ccmp_client_open((uint8_t *)SppServiceSearchReq,\n                                     app_interconnection_get_length(), 0, 1);\n                device = (struct spp_device *)btif_spp_get_device(\n                    BTIF_APP_SPP_CLIENT_CCMP_ID);\n                device->spp_callback = ccmp_callback;\n                // device->_channel = chnl; //restore in\n                // btif_spp_profile_restore_ctx\n                device->sppUsedFlag = 1;\n                break;\n\n      case BTIF_APP_SPP_CLIENT_RED_ID:\n                app_spp_client_open((uint8_t *)SppServiceSearchReq,\n                                    app_interconnection_get_length(), 1);\n                device = (struct spp_device *)btif_spp_get_device(\n                    BTIF_APP_SPP_CLIENT_RED_ID);\n                device->spp_callback = spp_client_callback;\n                // device->_channel = chnl; //restore in\n                // btif_spp_profile_restore_ctx\n                device->sppUsedFlag = 1;\n                break;\n#endif\n\n      default:\n                ASSERT(device, \"%s NULL spp client device app_id=0x%x\",\n                       __func__, app_id);\n                break;\n      }\n    } else {\n      ASSERT(device, \"%s NULL spp server device app_id=0x%x\", __func__, app_id);\n    }\n  }\n\n#ifdef __INTERCONNECTION__\n  if (app_id == BTIF_APP_SPP_CLIENT_RED_ID) {\n    // btm_conn will NULL if only SPP profile since btm_conn restore later\n    app_bt_set_spp_device_ptr(\n        (btif_remote_device_t *)btif_me_get_remote_device_by_bdaddr(&remote));\n  }\n#endif\n\n  // restore spp device\n  device->portType = port_type;\n  device->spp_connected_flag = buf[offset++];\n\n  return offset;\n}\n\nuint32_t app_bt_save_hfp_app_ctx(btif_remote_device_t *rem_dev, uint8_t *buf,\n                                 uint32_t buf_len) {\n  BTIF_CTX_INIT(buf);\n\n  BTIF_CTX_STR_BUF(btif_me_get_remote_device_bdaddr(rem_dev),\n                   BTIF_BD_ADDR_SIZE);\n\n  BTIF_CTX_STR_VAL8(app_bt_device.hfchan_call[BT_DEVICE_ID_1]);\n  BTIF_CTX_STR_VAL8(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1]);\n  BTIF_CTX_STR_VAL8(app_bt_device.hf_callheld[BT_DEVICE_ID_1]);\n\n  BTIF_CTX_SAVE_UPDATE_DATA_LEN();\n  return BTIF_CTX_GET_TOTAL_LEN();\n}\n\nuint32_t app_bt_restore_hfp_app_ctx(uint8_t *buf, uint32_t buf_len) {\n  bt_bdaddr_t remote;\n  uint8_t call, callsetup, callheld;\n  BTIF_CTX_INIT(buf);\n\n  BTIF_CTX_LDR_BUF(&remote, BTIF_BD_ADDR_SIZE);\n\n  BTIF_CTX_LDR_VAL8(call);\n  BTIF_CTX_LDR_VAL8(callsetup);\n  BTIF_CTX_LDR_VAL8(callheld);\n\n  app_bt_device.hfchan_call[BT_DEVICE_ID_1] = call;\n  app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] = callsetup;\n  app_bt_device.hf_callheld[BT_DEVICE_ID_1] = callheld;\n\n  TRACE(4, \"%s call %d callsetup %d callheld %d\", __func__, call, callsetup,\n        callheld);\n\n  return BTIF_CTX_GET_TOTAL_LEN();\n}\nuint32_t app_bt_save_a2dp_app_ctx(btif_remote_device_t *rem_dev, uint8_t *buf,\n                                  uint32_t buf_len) {\n  uint32_t offset = 0;\n  unsigned char stream_enc = 0;\n  uint32_t factor = 0;\n\n  // TODO\n  // more codecs, BT_DEVICE_ID_2\n  if (bt_profile_manager[BT_DEVICE_ID_1].stream ==\n      app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream) {\n    stream_enc = 0;\n  }\n#if defined(A2DP_AAC_ON)\n  else if (bt_profile_manager[BT_DEVICE_ID_1].stream ==\n           app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream) {\n    stream_enc = 1;\n  }\n#endif\n#if defined(A2DP_LHDC_ON)\n  else if (bt_profile_manager[BT_DEVICE_ID_1].stream ==\n           app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream) {\n    stream_enc = 2;\n  }\n#endif\n#if defined(A2DP_LDAC_ON)\n  else if (bt_profile_manager[BT_DEVICE_ID_1].stream ==\n           app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]->a2dp_stream) {\n    stream_enc = 2;\n  }\n#endif\n\n  buf[offset++] = stream_enc;\n  memcpy(buf + offset, btif_me_get_remote_device_bdaddr(rem_dev),\n         BTIF_BD_ADDR_SIZE);\n  offset += BTIF_BD_ADDR_SIZE;\n\n  buf[offset++] = app_bt_device.a2dp_state[BT_DEVICE_ID_1];\n  buf[offset++] = app_bt_device.a2dp_play_pause_flag;\n  buf[offset++] = avrcp_get_media_status();\n\n  // codec\n  buf[offset++] = app_bt_device.codec_type[BT_DEVICE_ID_1];\n  buf[offset++] = app_bt_device.sample_rate[BT_DEVICE_ID_1];\n  buf[offset++] = app_bt_device.sample_bit[BT_DEVICE_ID_1];\n#if defined(A2DP_LHDC_ON)\n  buf[offset++] = app_bt_device.a2dp_lhdc_llc[BT_DEVICE_ID_1];\n#endif\n\n#if defined(__A2DP_AVDTP_CP__)\n  buf[offset++] = app_bt_device.avdtp_cp[BT_DEVICE_ID_1];\n#endif\n\n  // volume\n  buf[offset++] = (uint8_t)a2dp_volume_get(BT_DEVICE_ID_1);\n\n  // latency factor\n  factor = (uint32_t)a2dp_audio_latency_factor_get();\n  buf[offset++] = factor & 0xFF;\n  buf[offset++] = (factor >> 8) & 0xFF;\n  buf[offset++] = (factor >> 16) & 0xFF;\n  buf[offset++] = (factor >> 24) & 0xFF;\n\n  // a2dp session\n  buf[offset++] = a2dp_ibrt_session_get() & 0xFF;\n  buf[offset++] = (a2dp_ibrt_session_get() >> 8) & 0xFF;\n  buf[offset++] = (a2dp_ibrt_session_get() >> 16) & 0xFF;\n  buf[offset++] = (a2dp_ibrt_session_get() >> 24) & 0xFF;\n\n  return offset;\n}\n\nuint32_t app_bt_restore_a2dp_app_ctx(uint8_t *buf, uint32_t buf_len) {\n  uint32_t offset = 0;\n  bt_bdaddr_t remote;\n  unsigned char stream_enc = 0;\n\n  stream_enc = buf[offset++];\n\n  memcpy(&remote, buf + offset, BTIF_BD_ADDR_SIZE);\n  offset += BTIF_BD_ADDR_SIZE;\n\n  app_bt_device.a2dp_state[BT_DEVICE_ID_1] = buf[offset++];\n  app_bt_device.a2dp_play_pause_flag = buf[offset++];\n  avrcp_set_media_status(buf[offset++]);\n\n  // codec info\n  app_bt_device.codec_type[BT_DEVICE_ID_1] = buf[offset++];\n  app_bt_device.sample_rate[BT_DEVICE_ID_1] = buf[offset++];\n  app_bt_device.sample_bit[BT_DEVICE_ID_1] = buf[offset++];\n#if defined(A2DP_LHDC_ON)\n  app_bt_device.a2dp_lhdc_llc[BT_DEVICE_ID_1] = buf[offset++];\n#endif\n\n#if defined(__A2DP_AVDTP_CP__)\n  app_bt_device.avdtp_cp[BT_DEVICE_ID_1] = buf[offset++];\n#endif\n\n  // volume\n  a2dp_volume_set(BT_DEVICE_ID_1, buf[offset++]);\n\n  // latency factor\n  a2dp_audio_latency_factor_set((float)(buf[offset] + (buf[offset + 1] << 8) +\n                                        (buf[offset + 2] << 16) +\n                                        (buf[offset + 3] << 24)));\n  offset += 4;\n\n  // a2dp session\n  a2dp_ibrt_session_set((buf[offset] + (buf[offset + 1] << 8) +\n                         (buf[offset + 2] << 16) + (buf[offset + 3] << 24)));\n  offset += 4;\n\n  // TODO\n  // more codecs, BT_DEVICE_ID_2\n  if (stream_enc == 0) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  }\n#if defined(A2DP_AAC_ON)\n  else if (stream_enc == 1) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  }\n#endif\n#if defined(A2DP_LHDC_ON)\n  else if (stream_enc == 2) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  }\n#endif\n#if defined(A2DP_LDAC_ON)\n  else if (stream_enc == 2) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  }\n#endif\n\n  memcpy(bt_profile_manager[BT_DEVICE_ID_1].rmt_addr.address, &remote,\n         BTIF_BD_ADDR_SIZE);\n  bt_profile_manager[BT_DEVICE_ID_1].a2dp_connect =\n      bt_profile_connect_status_success;\n  bt_profile_manager[BT_DEVICE_ID_1].hfp_connect =\n      bt_profile_connect_status_success;\n  bt_profile_manager[BT_DEVICE_ID_1].has_connected = true;\n\n  return offset;\n}\n\nuint32_t app_bt_save_avrcp_app_ctx(btif_remote_device_t *rem_dev, uint8_t *buf,\n                                   uint32_t buf_len) {\n  uint32_t offset = 0;\n\n  buf[offset++] = app_bt_device.avrcp_state[BT_DEVICE_ID_1];\n  buf[offset++] = app_bt_device.volume_report[BT_DEVICE_ID_1];\n\n  if (app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1]) {\n    buf[offset++] = true;\n    buf[offset++] = app_bt_avrcp_get_notify_trans_id();\n  } else {\n    buf[offset++] = false;\n    buf[offset++] = 0;\n  }\n\n  return offset;\n}\n\nuint32_t app_bt_restore_avrcp_app_ctx(uint8_t *buf, uint32_t buf_len) {\n  uint32_t offset = 0;\n  uint8_t notify_rsp_exist = 0;\n  uint8_t trans_id = 0;\n\n  app_bt_device.avrcp_state[BT_DEVICE_ID_1] = buf[offset++];\n  app_bt_device.volume_report[BT_DEVICE_ID_1] = buf[offset++];\n  notify_rsp_exist = buf[offset++];\n  trans_id = buf[offset++];\n\n  TRACE(4, \"app_bt_restore_avrcp_app_ctx state %d report %d notify %d %d\\n\",\n        app_bt_device.avrcp_state[BT_DEVICE_ID_1],\n        app_bt_device.volume_report[BT_DEVICE_ID_1], notify_rsp_exist,\n        trans_id);\n\n  if (notify_rsp_exist &&\n      app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1] == NULL) {\n    btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(\n        &app_bt_device.avrcp_notify_rsp[BT_DEVICE_ID_1]);\n  }\n\n  app_bt_avrcp_set_notify_trans_id(trans_id);\n\n  return offset;\n}\n\n#ifdef __BTMAP_ENABLE__\nuint32_t app_bt_save_map_app_ctx(btif_remote_device_t *rem_dev, uint8_t *buf,\n                                 uint32_t buf_len) {\n  // struct bdaddr_t *remote = NULL;\n  uint32_t offset = 0;\n\n  memcpy((void *)buf, (void *)app_bt_device.map_session_handle,\n         sizeof(app_bt_device.map_session_handle));\n  offset += sizeof(app_bt_device.map_session_handle);\n\n  return offset;\n}\n\nuint32_t app_bt_restore_map_app_ctx(uint8_t *buf, uint32_t buf_len) {\n  uint32_t offset = 0;\n\n  memcpy((void *)app_bt_device.map_session_handle, (void *)buf,\n         sizeof(btif_map_session_handle_t));\n  offset += sizeof(btif_map_session_handle_t);\n\n  return offset;\n}\n#endif\n\n#if BTIF_HID_DEVICE\nuint32_t app_bt_save_hid_app_ctx(uint8_t *buf) {\n  uint32_t offset = 0;\n\n  if (app_bt_device.hid_channel == NULL) {\n    TRACE(0, \"app_bt_save_hid_app_ctx app_bt_device.hid_channel is NULL\");\n    return offset;\n  }\n\n  memcpy((void *)buf, (void *)app_bt_device.hid_channel,\n         sizeof(app_bt_device.hid_channel));\n  offset += sizeof(app_bt_device.hid_channel);\n\n  return offset;\n}\n\nuint32_t app_bt_restore_hid_app_ctx(uint8_t *buf) {\n  uint32_t offset = 0;\n\n  memcpy((void *)app_bt_device.hid_channel, (void *)buf, sizeof(hid_channel_t));\n  offset += sizeof(hid_channel_t);\n\n  return offset;\n}\n#else\nuint32_t app_bt_restore_hid_app_ctx(uint8_t *buf) { return 4; }\nuint32_t app_bt_save_hid_app_ctx(uint8_t *buf) {\n  buf[0] = 0;\n  buf[1] = 0;\n  buf[2] = 0;\n  buf[3] = 0;\n  return 4;\n}\n\n#endif\n#endif /* ENHANCED_STACK */\n\na2dp_stream_t *app_bt_get_mobile_a2dp_stream(uint32_t deviceId) {\n  return bt_profile_manager[deviceId].stream;\n}\n\nvoid app_bt_update_bt_profile_manager(void) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  memcpy(bt_profile_manager[BT_DEVICE_ID_1].rmt_addr.address,\n         p_ibrt_ctrl->mobile_addr.address, BTIF_BD_ADDR_SIZE);\n\n#if defined(A2DP_AAC_ON)\n  if (p_ibrt_ctrl->a2dp_codec.codec_type == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n\n  } else\n#endif\n#if defined(A2DP_SCALABLE_ON)\n      if (p_ibrt_ctrl->a2dp_codec.codec_type ==\n          BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  } else\n#endif\n#if defined(A2DP_LHDC_ON)\n      if (p_ibrt_ctrl->a2dp_codec.codec_type ==\n          BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  } else\n#endif\n#if defined(A2DP_LDAC_ON)\n      if (p_ibrt_ctrl->a2dp_codec.codec_type ==\n          BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  } else\n#endif\n      if (p_ibrt_ctrl->a2dp_codec.codec_type == BTIF_AVDTP_CODEC_TYPE_SBC) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  } else {\n    ASSERT(0, \"%s err codec_type:%d \", __func__,\n           p_ibrt_ctrl->a2dp_codec.codec_type);\n  }\n\n  bt_profile_manager[BT_DEVICE_ID_1].a2dp_connect =\n      bt_profile_connect_status_success;\n  bt_profile_manager[BT_DEVICE_ID_1].hfp_connect =\n      bt_profile_connect_status_success;\n  bt_profile_manager[BT_DEVICE_ID_1].has_connected = true;\n\n  TRACE(3, \"%s codec_type:%x if_a2dp_stream:%p\", __func__,\n        p_ibrt_ctrl->a2dp_codec.codec_type,\n        bt_profile_manager[BT_DEVICE_ID_1].stream);\n  DUMP8(\"%02x \", bt_profile_manager[BT_DEVICE_ID_1].rmt_addr.address,\n        BTIF_BD_ADDR_SIZE);\n}\n\nvoid app_bt_update_bt_profile_manager_codec_type(uint8_t codec_type) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  p_ibrt_ctrl->a2dp_codec.codec_type = codec_type;\n\n#if defined(A2DP_AAC_ON)\n  if (p_ibrt_ctrl->a2dp_codec.codec_type == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n\n  } else\n#endif\n#if defined(A2DP_SCALABLE_ON)\n      if (p_ibrt_ctrl->a2dp_codec.codec_type ==\n          BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  } else\n#endif\n#if defined(A2DP_LHDC_ON)\n      if (p_ibrt_ctrl->a2dp_codec.codec_type ==\n          BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  } else\n#endif\n#if defined(A2DP_LDAC_ON)\n      if (p_ibrt_ctrl->a2dp_codec.codec_type ==\n          BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  } else\n#endif\n      if (p_ibrt_ctrl->a2dp_codec.codec_type == BTIF_AVDTP_CODEC_TYPE_SBC) {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream;\n  } else {\n    ASSERT(0, \"%s err codec_type:%d \", __func__,\n           p_ibrt_ctrl->a2dp_codec.codec_type);\n  }\n\n  bt_profile_manager[BT_DEVICE_ID_1].a2dp_connect =\n      bt_profile_connect_status_success;\n  bt_profile_manager[BT_DEVICE_ID_1].hfp_connect =\n      bt_profile_connect_status_success;\n  bt_profile_manager[BT_DEVICE_ID_1].has_connected = true;\n\n  TRACE(3, \"%s codec_type:%x if_a2dp_stream:%p\", __func__,\n        p_ibrt_ctrl->a2dp_codec.codec_type,\n        bt_profile_manager[BT_DEVICE_ID_1].stream);\n}\n\nstatic bool ibrt_reconnect_mobile_profile_flag = false;\nvoid app_bt_ibrt_reconnect_mobile_profile_flag_set(void) {\n  ibrt_reconnect_mobile_profile_flag = true;\n}\n\nvoid app_bt_ibrt_reconnect_mobile_profile_flag_clear(void) {\n  ibrt_reconnect_mobile_profile_flag = false;\n}\n\nbool app_bt_ibrt_reconnect_mobile_profile_flag_get(void) {\n  return ibrt_reconnect_mobile_profile_flag;\n}\n\nvoid app_bt_ibrt_reconnect_mobile_profile(bt_bdaddr_t mobile_addr) {\n  nvrec_btdevicerecord *mobile_record = NULL;\n\n  bt_profile_manager[BT_DEVICE_ID_1].reconnect_mode = bt_profile_reconnect_null;\n  bt_profile_manager[BT_DEVICE_ID_1].rmt_addr = mobile_addr;\n  bt_profile_manager[BT_DEVICE_ID_1].chan =\n      app_bt_device.hf_channel[BT_DEVICE_ID_1];\n\n  if (!nv_record_btdevicerecord_find(&mobile_addr, &mobile_record)) {\n#if defined(A2DP_AAC_ON)\n    if (mobile_record->device_plf.a2dp_codectype ==\n        BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n      bt_profile_manager[BT_DEVICE_ID_1].stream =\n          app_bt_device.a2dp_aac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n    } else\n#endif\n#if defined(A2DP_SCALABLE_ON)\n        if (mobile_record->device_plf.a2dp_codectype ==\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      bt_profile_manager[BT_DEVICE_ID_1].stream =\n          app_bt_device.a2dp_scalable_stream[BT_DEVICE_ID_1]->a2dp_stream;\n    } else\n#endif\n#if defined(A2DP_LHDC_ON)\n        if (mobile_record->device_plf.a2dp_codectype ==\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      bt_profile_manager[BT_DEVICE_ID_1].stream =\n          app_bt_device.a2dp_lhdc_stream[BT_DEVICE_ID_1]->a2dp_stream;\n    } else\n#endif\n#if defined(A2DP_LDAC_ON)\n        if (mobile_record->device_plf.a2dp_codectype ==\n            BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      bt_profile_manager[BT_DEVICE_ID_1].stream =\n          app_bt_device.a2dp_ldac_stream[BT_DEVICE_ID_1]->a2dp_stream;\n    } else\n#endif\n    {\n      bt_profile_manager[BT_DEVICE_ID_1].stream =\n          app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream;\n    }\n  } else {\n    bt_profile_manager[BT_DEVICE_ID_1].stream =\n        app_bt_device.a2dp_stream[BT_DEVICE_ID_1]\n            ->a2dp_stream; // default using SBC\n  }\n\n  btif_a2dp_reset_stream_state(bt_profile_manager[BT_DEVICE_ID_1].stream);\n\n  TRACE(0, \"ibrt_ui_log:start reconnect mobile, addr below:\");\n  DUMP8(\"0x%02x \", &(mobile_addr.address[0]), BTIF_BD_ADDR_SIZE);\n  app_bt_ibrt_reconnect_mobile_profile_flag_set();\n  app_bt_precheck_before_starting_connecting(\n      bt_profile_manager[BT_DEVICE_ID_1].has_connected);\n\n  app_ibrt_ui_t *p_ibrt_ui = app_ibrt_ui_get_ctx();\n  if (p_ibrt_ui->config.profile_concurrency_supported) {\n    app_bt_A2DP_OpenStream(bt_profile_manager[BT_DEVICE_ID_1].stream,\n                           &(bt_profile_manager[BT_DEVICE_ID_1].rmt_addr));\n    app_bt_HF_CreateServiceLink(bt_profile_manager[BT_DEVICE_ID_1].chan,\n                                &(bt_profile_manager[BT_DEVICE_ID_1].rmt_addr));\n  } else {\n    app_bt_A2DP_OpenStream(bt_profile_manager[BT_DEVICE_ID_1].stream,\n                           &(bt_profile_manager[BT_DEVICE_ID_1].rmt_addr));\n    // app_bt_HF_CreateServiceLink(bt_profile_manager[BT_DEVICE_ID_1].chan,\n    // &(bt_profile_manager[BT_DEVICE_ID_1].rmt_addr));\n  }\n  // osTimerStart(bt_profile_manager[BT_DEVICE_ID_1].connect_timer,\n  // APP_IBRT_RECONNECT_TIMEOUT_MS);\n}\n#endif\n\n#ifdef __IAG_BLE_INCLUDE__\nstatic void app_start_fast_connectable_ble_adv(uint16_t advInterval) {\n  bool ret = FALSE;\n\n  if (NULL == app_fast_ble_adv_timeout_timer) {\n    app_fast_ble_adv_timeout_timer = osTimerCreate(\n        osTimer(APP_FAST_BLE_ADV_TIMEOUT_TIMER), osTimerOnce, NULL);\n  }\n\n  osTimerStart(app_fast_ble_adv_timeout_timer, APP_FAST_BLE_ADV_TIMEOUT_IN_MS);\n\n#ifdef IBRT\n  ret = app_ibrt_ui_get_snoop_via_ble_enable();\n#endif\n\n  if (FALSE == ret) {\n    app_ble_start_connectable_adv(advInterval);\n  }\n}\n\nstatic int app_fast_ble_adv_timeout_timehandler(void const *param) {\n  bool ret = FALSE;\n\n#ifdef IBRT\n  ret = app_ibrt_ui_get_snoop_via_ble_enable();\n#endif\n\n  if (FALSE == ret) {\n    app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n  }\n\n  return 0;\n}\n\nvoid app_stop_fast_connectable_ble_adv_timer(void) {\n  if (NULL != app_fast_ble_adv_timeout_timer) {\n    osTimerStop(app_fast_ble_adv_timeout_timer);\n  }\n}\n#endif\n\nstatic uint32_t bt_link_active_mode_bits[MAX_ACTIVE_MODE_MANAGED_LINKS];\n\nvoid app_bt_active_mode_manager_init(void) {\n  memset(bt_link_active_mode_bits, 0, sizeof(bt_link_active_mode_bits));\n}\n\nvoid app_bt_active_mode_reset(uint32_t linkIndex) {\n  bt_link_active_mode_bits[linkIndex] = 0;\n}\n\nvoid app_bt_active_mode_set(BT_LINK_ACTIVE_MODE_KEEPER_USER_E user,\n                            uint32_t linkIndex) {\n#if defined(IBRT)\n  return;\n#endif\n\n  bool isAlreadyInActiveMode = false;\n  if (linkIndex < MAX_ACTIVE_MODE_MANAGED_LINKS) {\n    uint32_t lock = int_lock_global();\n    if (bt_link_active_mode_bits[linkIndex] > 0) {\n      isAlreadyInActiveMode = true;\n    } else {\n      isAlreadyInActiveMode = false;\n    }\n    bt_link_active_mode_bits[linkIndex] |= (1 << user);\n    int_unlock_global(lock);\n\n    if (!isAlreadyInActiveMode) {\n      app_bt_stop_sniff(linkIndex);\n      app_bt_stay_active(linkIndex);\n    }\n\n  } else if (MAX_ACTIVE_MODE_MANAGED_LINKS == linkIndex) {\n    for (uint8_t devId = 0; devId < BT_DEVICE_NUM; devId++) {\n      uint32_t lock = int_lock_global();\n      if (bt_link_active_mode_bits[devId] > 0) {\n                isAlreadyInActiveMode = true;\n      } else {\n                isAlreadyInActiveMode = false;\n      }\n      bt_link_active_mode_bits[devId] |= (1 << user);\n      int_unlock_global(lock);\n\n      if (!isAlreadyInActiveMode) {\n                app_bt_stop_sniff(devId);\n                app_bt_stay_active(devId);\n      }\n    }\n  }\n\n  TRACE(2, \"set active mode for user %d, link %d, now state:\", user, linkIndex);\n  DUMP32(\"%08x\", bt_link_active_mode_bits, MAX_ACTIVE_MODE_MANAGED_LINKS);\n}\n\nvoid app_bt_active_mode_clear(BT_LINK_ACTIVE_MODE_KEEPER_USER_E user,\n                              uint32_t linkIndex) {\n#if defined(IBRT)\n  return;\n#endif\n\n  bool isAlreadyAllowSniff = false;\n  if (linkIndex < MAX_ACTIVE_MODE_MANAGED_LINKS) {\n    uint32_t lock = int_lock_global();\n\n    if (0 == bt_link_active_mode_bits[linkIndex]) {\n      isAlreadyAllowSniff = true;\n    } else {\n      isAlreadyAllowSniff = false;\n    }\n\n    bt_link_active_mode_bits[linkIndex] &= (~(1 << user));\n\n    int_unlock_global(lock);\n\n    if (!isAlreadyAllowSniff) {\n      app_bt_allow_sniff(linkIndex);\n    }\n  } else if (MAX_ACTIVE_MODE_MANAGED_LINKS == linkIndex) {\n    for (uint8_t devId = 0; devId < BT_DEVICE_NUM; devId++) {\n      uint32_t lock = int_lock_global();\n      if (0 == bt_link_active_mode_bits[devId]) {\n                isAlreadyAllowSniff = true;\n      } else {\n                isAlreadyAllowSniff = false;\n      }\n      bt_link_active_mode_bits[devId] &= (~(1 << user));\n      int_unlock_global(lock);\n\n      if (!isAlreadyAllowSniff) {\n                app_bt_allow_sniff(devId);\n      }\n    }\n  }\n\n  TRACE(2, \"clear active mode for user %d, link %d, now state:\", user,\n        linkIndex);\n  DUMP32(\"%08x \", bt_link_active_mode_bits, MAX_ACTIVE_MODE_MANAGED_LINKS);\n}\n\nint8_t app_bt_get_rssi(void) {\n  int8_t rssi = 127;\n  uint8_t i;\n  btif_remote_device_t *remDev = NULL;\n  rx_agc_t tws_agc = {0};\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    remDev = btif_me_enumerate_remote_devices(i);\n    if (remDev) {\n      if (btif_me_get_remote_device_hci_handle(remDev)) {\n                rssi = bt_drv_reg_op_read_rssi_in_dbm(\n                    btif_me_get_remote_device_hci_handle(remDev), &tws_agc);\n                rssi = bt_drv_reg_op_rssi_correction(rssi);\n                TRACE(1, \" headset to mobile RSSI:%d dBm\", rssi);\n      }\n    }\n  }\n  return rssi;\n}\n\n#ifdef TILE_DATAPATH\nint8_t app_tile_get_ble_rssi(void) {\n  int8_t rssi = 127;\n  uint8_t i;\n  btif_remote_device_t *remDev = NULL;\n  rx_agc_t tws_agc = {0};\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    remDev = btif_me_enumerate_remote_devices(i);\n    if (remDev) {\n      if (app_tile_ble_get_connection_index() != BLE_INVALID_CONNECTION_INDEX) {\n                rssi = bt_drv_reg_op_read_ble_rssi_in_dbm(\n                    app_tile_ble_get_connection_index(), &tws_agc);\n                rssi = bt_drv_reg_op_rssi_correction(rssi);\n                TRACE(1, \" headset to mobile RSSI:%d dBm\", rssi);\n      }\n    }\n  }\n  return rssi;\n}\n#endif\n\n#ifdef __GMA_VOICE__\nvoid app_bt_prepare_for_ota(void) {\n  app_ibrt_ui_t *p_ui_ctrl = app_ibrt_ui_get_ctx();\n\n  p_ui_ctrl->config.disable_tws_switch = true; // disable role switch\n\n  app_key_close();\n\n  if (IBRT_MASTER == app_tws_ibrt_role_get_callback(NULL)) {\n    btif_hf_disconnect_service_link(app_bt_device.hf_channel[BT_DEVICE_ID_1]);\n    btif_a2dp_suspend_stream(\n        app_bt_device.a2dp_stream[BT_DEVICE_ID_1]->a2dp_stream);\n  }\n  TRACE(0, \"app_bt_prepare_for_ota\");\n}\n#endif\n"
  },
  {
    "path": "services/bt_app/app_bt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BT_H__\n#define __APP_BT_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"me_api.h\"\n#include \"a2dp_api.h\"\n#include \"hfp_api.h\"\n\nenum APP_BT_REQ_T {\n    APP_BT_REQ_ACCESS_MODE_SET,\n    APP_BT_REQ_AUTO_TEST,\n    APP_BT_REQ_NUM\n};\n\nenum APP_BT_GOLBAL_HANDLE_HOOK_USER_T {\n    APP_BT_GOLBAL_HANDLE_HOOK_USER_0 = 0,\n    APP_BT_GOLBAL_HANDLE_HOOK_USER_1,\n    APP_BT_GOLBAL_HANDLE_HOOK_USER_QTY\n};\n\ntypedef void (*APP_BT_REQ_CONNECT_PROFILE_FN_T)(void *, void *);\ntypedef bt_status_t  (*APP_BT_REQ_HF_OP_FN_T)(void *);\ntypedef void (*APP_BT_GOLBAL_HANDLE_HOOK_HANDLER)(const btif_event_t*Event);\ntypedef void (*APP_APPTHREAD_REQ_CUSTOMER_CALL_FN_T)(void *, void *);\n\n#define app_bt_accessmode_set_req(accmode) do{app_bt_send_request(APP_BT_REQ_ACCESS_MODE_SET, accmode, 0, 0);}while(0)\ntypedef enum\n{\n    APP_BT_IDLE_STATE = 0,\n    APP_BT_IN_CONNECTING_PROFILES_STATE\t// acl link is created and in the process of connecting profiles\n} APP_BT_CONNECTING_STATE_E;\n\ntypedef enum\n{\n    // always in active mode during a2dp streaming\n    ACTIVE_MODE_KEEPER_A2DP_STREAMING = 0,\n    // always in active mode during ai voice up-streaming\n    ACTIVE_MODE_KEEPER_AI_VOICE_STREAM,\n    // always in active mode during OTA\n    ACTIVE_MODE_KEEPER_OTA,\n    // stay in active mode for 15 seconds after role switch\n    ACTIVE_MODE_KEEPER_ROLE_SWITCH,\n    // stay in active mode during synchronous voice prompt playing\n    ACTIVE_MODE_KEEPER_SYNC_VOICE_PROMPT,\n    // always in active mode during phone call\n    ACTIVE_MODE_KEEPEER_SCO_STREAMING,\n\n\n} BT_LINK_ACTIVE_MODE_KEEPER_USER_E;\n\n#define MAX_ACTIVE_MODE_MANAGED_LINKS       3  \n#define UPDATE_ACTIVE_MODE_FOR_ALL_LINKS    MAX_ACTIVE_MODE_MANAGED_LINKS\n\nvoid app_bt_active_mode_manager_init(void);\n\nvoid app_bt_active_mode_reset(uint32_t linkIndex);\n\nvoid app_bt_active_mode_set(BT_LINK_ACTIVE_MODE_KEEPER_USER_E user, uint32_t linkIndex);\n\nvoid app_bt_active_mode_clear(BT_LINK_ACTIVE_MODE_KEEPER_USER_E user, uint32_t linkIndex);\n\nvoid app_bt_global_handle(const btif_event_t *Event);\nbool is_app_bt_pairing_running(void);\n\nvoid PairingTransferToConnectable(void);\n\nvoid app_bt_global_handle_init(void);\n\nvoid app_bt_opening_reconnect(void);\n\nvoid app_bt_accessmode_set(  btif_accessible_mode_t mode);\n\nvoid app_bt_send_request(uint32_t message_id, uint32_t param0, uint32_t param1, uint32_t ptr);\n\nvoid app_bt_init(void);\n\nint app_bt_state_checker(void);\n\nvoid *app_bt_profile_active_store_ptr_get(uint8_t *bdAddr);\n\nvoid app_bt_profile_connect_manager_open(void);\n\nvoid app_bt_profile_connect_manager_opening_reconnect(void);\n\nBOOL app_bt_profile_connect_openreconnecting(void *ptr);\n\nint app_bt_global_handle_hook_set(enum APP_BT_GOLBAL_HANDLE_HOOK_USER_T user, APP_BT_GOLBAL_HANDLE_HOOK_HANDLER handler);\n\nAPP_BT_GOLBAL_HANDLE_HOOK_HANDLER app_bt_global_handle_hook_get(enum APP_BT_GOLBAL_HANDLE_HOOK_USER_T user);\n\nbool app_is_hfp_service_connected(void);\n#if defined(IBRT)\nvoid app_bt_ibrt_reconnect_mobile_profile_flag_set(void);\nvoid app_bt_ibrt_reconnect_mobile_profile_flag_clear(void);\nbool app_bt_ibrt_reconnect_mobile_profile_flag_get(void);\n#endif\n#if defined(__BT_SELECT_PROF_DEVICE_ID__)\nint8_t app_bt_a2dp_is_same_stream(a2dp_stream_t *src_Stream, a2dp_stream_t *dst_Stream);\n\nvoid app_bt_a2dp_find_same_unused_stream(a2dp_stream_t *in_Stream, a2dp_stream_t **out_Stream, uint32_t device_id);\n\nint8_t app_bt_a2dp_is_stream_on_device_id(a2dp_stream_t *in_Stream, uint32_t device_id);\n\nint8_t app_bt_hfp_is_chan_on_device_id(hf_chan_handle_t chan, uint32_t device_id);\n\nint8_t app_bt_is_any_profile_connected(uint32_t device_id);\n\nint8_t app_bt_is_a2dp_connected(uint32_t device_id);\n\nbtif_remote_device_t *app_bt_get_connected_profile_remdev(uint32_t device_id);\n#endif\n\nvoid app_bt_stay_active(uint8_t deviceId);\n\nvoid app_bt_allow_sniff(uint8_t deviceId);\n\nbtif_remote_device_t* app_bt_get_remoteDev(uint8_t deviceId);\n\nvoid app_bt_stop_sniff(uint8_t deviceId);\n\nvoid app_bt_sniff_config(btif_remote_device_t *remDev);\n\nvoid app_bt_allow_sniff_rem_dev(btif_remote_device_t* pRemDev);\n\nvoid app_bt_stay_active_rem_dev(btif_remote_device_t* pRemDev);\n\nvoid app_check_pending_stop_sniff_op(void);\n\nvoid app_bt_reset_reconnect_timer(bt_bdaddr_t *pBdAddr);\n\nuint8_t app_bt_get_num_of_connected_dev(void);\n\nbool btapp_hfp_is_dev_call_active(uint8_t devId);\n\nvoid app_bt_pause_media_player_again(uint8_t deviceId);\n\nbool app_bt_is_music_player_working(uint8_t deviceId);\n\nbool app_bt_pause_music_player(uint8_t deviceId);\n\nvoid app_bt_resume_music_player(uint8_t deviceId);\n\nbool app_bt_is_to_resume_music_player(uint8_t deviceId);\n\nvoid app_bt_reset_music_player_resume_state(void);\n\nbool app_bt_is_device_connected(uint8_t deviceId);\n\nvoid app_bt_set_music_player_resume_device(uint8_t deviceId);\n\nbool app_bt_is_a2dp_streaming(uint8_t deviceId);\n\nvoid app_bt_suspend_a2dp_streaming(uint8_t deviceId);\n\nbool app_bt_get_device_bdaddr(uint8_t deviceId, uint8_t* btAddr);\n\nvoid fast_pair_enter_pairing_mode_handler(void);\n\nvoid app_hfp_start_voice_media(uint8_t devId);\n\nvoid app_hfp_resume_pending_voice_media(void);\n\nbool app_hfp_is_starting_media_pending(void);\n\nbool app_bt_is_in_reconnecting(void);\n\nbool btapp_hfp_is_dev_sco_connected(uint8_t devId);\n\nuint8_t a2dp_get_latest_paused_device(void);\n\nbool app_bt_is_in_connecting_profiles_state(void);\n\nvoid app_bt_clear_connecting_profiles_state(uint8_t devId);\n\nvoid app_bt_set_connecting_profiles_state(uint8_t devId);\n\nvoid app_a2dp_hold_mute();\n\nvoid app_a2dp_unhold_mute();\n\nvoid app_bt_set_mobile_a2dp_stream(uint32_t deviceId,a2dp_stream_t *stream);\n\n#if defined(__INTERCONNECTION__)\nbtif_accessible_mode_t app_bt_get_current_access_mode(void);\n\nbool app_bt_is_connected();\n#endif\nbool app_device_bt_is_connected();\nbool app_bt_is_hfp_audio_on(void);\n\nbtif_remote_device_t* app_bt_get_connected_mobile_device_ptr(void);\nvoid app_bt_set_spp_device_ptr(btif_remote_device_t* device);\nbtif_remote_device_t* app_bt_get_spp_device_ptr(void);\n\nbool app_is_disconnecting_all_bt_connections(void);\n\nvoid app_set_disconnecting_all_bt_connections(bool isEnable);\n\nvoid app_bt_start_search(void);\n\n#if defined(IBRT)\n#if defined(ENHANCED_STACK)\nuint32_t app_bt_save_a2dp_app_ctx(btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\nuint32_t app_bt_restore_a2dp_app_ctx(uint8_t *buf, uint32_t buf_len);\nuint32_t app_bt_save_avrcp_app_ctx(btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\nuint32_t app_bt_restore_avrcp_app_ctx(uint8_t *buf, uint32_t buf_len);\nuint32_t app_bt_save_hfp_app_ctx(btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\nuint32_t app_bt_restore_hfp_app_ctx(uint8_t *buf, uint32_t buf_len);\nuint32_t app_bt_save_spp_app_ctx(uint32_t app_id,btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\nuint32_t app_bt_restore_spp_app_ctx(uint8_t *buf, uint32_t buf_len, uint32_t app_id);\n#ifdef __BTMAP_ENABLE__\nuint32_t app_bt_save_map_app_ctx(btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\nuint32_t app_bt_restore_map_app_ctx(uint8_t *buf, uint32_t buf_len);\n#endif\nuint32_t app_bt_restore_hid_app_ctx(uint8_t *buf);\nuint32_t app_bt_save_hid_app_ctx(uint8_t *buf);\n#endif /* ENHANCED_STACK */\n#endif\n\nvoid app_stop_fast_connectable_ble_adv_timer(void);\nint8_t app_bt_get_rssi(void);\n\n#ifdef  TILE_DATAPATH\nint8_t app_tile_get_ble_rssi(void);\n#endif\nvoid app_bt_prepare_for_ota(void);\nvoid hfp_reconnecting_timer_stop_callback(const btif_event_t *event);\nint app_bt_start_custom_function_in_app_thread(\n                                    uint32_t param0, uint32_t param1, uint32_t funcPtr);\nuint8_t app_bt_get_a2dp_state();\n\n#ifdef __cplusplus\n}\n#endif\n#endif /* BESBT_H */\n"
  },
  {
    "path": "services/bt_app/app_bt_func.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n\n#include \"app_ble_mode_switch.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"besbt.h\"\n#include \"bluetooth.h\"\n#include \"hfp_api.h\"\n#include \"os_api.h\"\n\nextern \"C\" void OS_NotifyEvm(void);\nstatic const char *const app_bt_func_table_str[] = {\n    \"Me_switch_sco\",\n    \"ME_SwitchRole\",\n    \"ME_SetConnectionRole\",\n    \"MeDisconnectLink\",\n    \"ME_StopSniff\",\n    \"ME_SetAccessibleMode\",\n    \"Me_SetLinkPolicy\",\n    \"CMGR_SetSniffTimer\",\n    \"CMGR_SetSniffInofToAllHandlerByRemDev\",\n    \"A2DP_OpenStream\",\n    \"A2DP_CloseStream\",\n    \"A2DP_SetMasterRole\",\n    \"HF_CreateServiceLink\",\n    \"HF_DisconnectServiceLink\",\n    \"HF_CreateAudioLink\",\n    \"HF_DisconnectAudioLink\",\n    \"HF_EnableSniffMode\",\n    \"HF_SetMasterRole\",\n    \"HS_CreateServiceLink\",\n    \"HS_CreateAudioLink\",\n    \"HS_DisconnectAudioLink\",\n    \"HS_EnableSniffMode\",\n    \"HS_DisconnectServiceLink\",\n    \"BT_Control_SleepMode\",\n    \"BT_Custom_Func\",\n    \"ME_StartSniff\",\n    \"DIP_QuryService\",\n    \"A2DP_Force_OpenStream\",\n    \"HF_Force_CreateServiceLink\",\n    \"app_set_access_mode_test\",\n    \"app_set_adv_mode_test\",\n    \"FPGA_write_mem_test\",\n    \"FPGA_read_mem_test\",\n};\n\n#define APP_BT_MAILBOX_MAX (40)\nosMailQDef(app_bt_mailbox, APP_BT_MAILBOX_MAX, APP_BT_MAIL);\nstatic osMailQId app_bt_mailbox = NULL;\n\nstatic btif_accessible_mode_t gBT_DEFAULT_ACCESS_MODE = BTIF_BAM_NOT_ACCESSIBLE;\nstatic uint8_t bt_access_mode_set_pending = 0;\nvoid app_set_accessmode(btif_accessible_mode_t mode) {\n#if !defined(IBRT)\n  const btif_access_mode_info_t info = {\n      BTIF_BT_DEFAULT_INQ_SCAN_INTERVAL, BTIF_BT_DEFAULT_INQ_SCAN_WINDOW,\n      BTIF_BT_DEFAULT_PAGE_SCAN_INTERVAL, BTIF_BT_DEFAULT_PAGE_SCAN_WINDOW};\n  bt_status_t status;\n  osapi_lock_stack();\n  gBT_DEFAULT_ACCESS_MODE = mode;\n\n  status = btif_me_set_accessible_mode(mode, &info);\n  TRACE(1, \"app_set_accessmode status=0x%x\", status);\n\n  if (status == BT_STS_IN_PROGRESS)\n    bt_access_mode_set_pending = 1;\n  else\n    bt_access_mode_set_pending = 0;\n  osapi_unlock_stack();\n#endif\n}\n\nbool app_is_access_mode_set_pending(void) { return bt_access_mode_set_pending; }\n\nextern \"C\" void app_bt_accessmode_set(btif_accessible_mode_t mode);\nvoid app_set_pending_access_mode(void) {\n  if (bt_access_mode_set_pending) {\n    TRACE(1, \"Pending for change access mode to %d\", gBT_DEFAULT_ACCESS_MODE);\n    bt_access_mode_set_pending = 0;\n    app_bt_accessmode_set(gBT_DEFAULT_ACCESS_MODE);\n  }\n}\n\nvoid app_retry_setting_access_mode(void) {\n  TRACE(0, \"Former setting access mode failed, retry it.\");\n  app_bt_accessmode_set(gBT_DEFAULT_ACCESS_MODE);\n}\n\n#define PENDING_SET_LINKPOLICY_REQ_BUF_CNT 5\nstatic BT_SET_LINKPOLICY_REQ_T\n    pending_set_linkpolicy_req[PENDING_SET_LINKPOLICY_REQ_BUF_CNT];\n\nstatic uint8_t pending_set_linkpolicy_in_cursor = 0;\nstatic uint8_t pending_set_linkpolicy_out_cursor = 0;\n\nstatic void app_bt_print_pending_set_linkpolicy_req(void) {\n  TRACE(0, \"Pending set link policy requests:\");\n  uint8_t index = pending_set_linkpolicy_out_cursor;\n  while (index != pending_set_linkpolicy_in_cursor) {\n    TRACE(3, \"index %d RemDev %p LinkPolicy %d\", index,\n          pending_set_linkpolicy_req[index].remDev,\n          pending_set_linkpolicy_req[index].policy);\n    index++;\n    if (PENDING_SET_LINKPOLICY_REQ_BUF_CNT == index) {\n      index = 0;\n    }\n  }\n}\n\nstatic void app_bt_push_pending_set_linkpolicy(btif_remote_device_t *remDev,\n                                               btif_link_policy_t policy) {\n  // go through the existing pending list to see if the remDev is already in\n  uint8_t index = pending_set_linkpolicy_out_cursor;\n  while (index != pending_set_linkpolicy_in_cursor) {\n    if (remDev == pending_set_linkpolicy_req[index].remDev) {\n      pending_set_linkpolicy_req[index].policy = policy;\n      return;\n    }\n    index++;\n    if (PENDING_SET_LINKPOLICY_REQ_BUF_CNT == index) {\n      index = 0;\n    }\n  }\n\n  pending_set_linkpolicy_req[pending_set_linkpolicy_in_cursor].remDev = remDev;\n  pending_set_linkpolicy_req[pending_set_linkpolicy_in_cursor].policy = policy;\n  pending_set_linkpolicy_in_cursor++;\n  if (PENDING_SET_LINKPOLICY_REQ_BUF_CNT == pending_set_linkpolicy_in_cursor) {\n    pending_set_linkpolicy_in_cursor = 0;\n  }\n\n  app_bt_print_pending_set_linkpolicy_req();\n}\n\nBT_SET_LINKPOLICY_REQ_T *app_bt_pop_pending_set_linkpolicy(void) {\n  if (pending_set_linkpolicy_out_cursor == pending_set_linkpolicy_in_cursor) {\n    return NULL;\n  }\n\n  BT_SET_LINKPOLICY_REQ_T *ptReq =\n      &pending_set_linkpolicy_req[pending_set_linkpolicy_out_cursor];\n  pending_set_linkpolicy_out_cursor++;\n  if (PENDING_SET_LINKPOLICY_REQ_BUF_CNT == pending_set_linkpolicy_out_cursor) {\n    pending_set_linkpolicy_out_cursor = 0;\n  }\n\n  app_bt_print_pending_set_linkpolicy_req();\n  return ptReq;\n}\n\nvoid app_bt_set_linkpolicy(btif_remote_device_t *remDev,\n                           btif_link_policy_t policy) {\n  if (btif_me_get_remote_device_state(remDev) == BTIF_BDS_CONNECTED) {\n    bt_status_t ret = btif_me_set_link_policy(remDev, policy);\n    TRACE(3, \"%s policy %d returns %d\", __FUNCTION__, policy, ret);\n\n    osapi_lock_stack();\n    if (BT_STS_IN_PROGRESS == ret) {\n      app_bt_push_pending_set_linkpolicy(remDev, policy);\n    }\n    osapi_unlock_stack();\n  }\n}\n\n#define COUNT_OF_PENDING_REMOTE_DEV_TO_EXIT_SNIFF_MODE 8\nstatic btif_remote_device_t *pendingRemoteDevToExitSniffMode\n    [COUNT_OF_PENDING_REMOTE_DEV_TO_EXIT_SNIFF_MODE];\nstatic uint8_t maskOfRemoteDevPendingForExitingSniffMode = 0;\nvoid app_check_pending_stop_sniff_op(void) {\n  if (maskOfRemoteDevPendingForExitingSniffMode > 0) {\n    for (uint8_t index = 0;\n         index < COUNT_OF_PENDING_REMOTE_DEV_TO_EXIT_SNIFF_MODE; index++) {\n      if (maskOfRemoteDevPendingForExitingSniffMode & (1 << index)) {\n        btif_remote_device_t *remDev = pendingRemoteDevToExitSniffMode[index];\n        if (!btif_me_is_op_in_progress(remDev)) {\n          if (btif_me_get_remote_device_state(remDev) == BTIF_BDS_CONNECTED) {\n            if (btif_me_get_current_mode(remDev) == BTIF_BLM_SNIFF_MODE) {\n              TRACE(1, \"!!! stop sniff currmode:%d\\n\",\n                    btif_me_get_current_mode(remDev));\n              bt_status_t ret = btif_me_stop_sniff(remDev);\n              TRACE(1, \"Return status %d\", ret);\n              if (BT_STS_IN_PROGRESS != ret) {\n                maskOfRemoteDevPendingForExitingSniffMode &= (~(1 << index));\n                break;\n              }\n            }\n          }\n        }\n      }\n    }\n\n    if (maskOfRemoteDevPendingForExitingSniffMode > 0) {\n      osapi_notify_evm();\n    }\n  }\n}\n\nstatic void app_add_pending_stop_sniff_op(btif_remote_device_t *remDev) {\n  for (uint8_t index = 0;\n       index < COUNT_OF_PENDING_REMOTE_DEV_TO_EXIT_SNIFF_MODE; index++) {\n    if (maskOfRemoteDevPendingForExitingSniffMode & (1 << index)) {\n      if (pendingRemoteDevToExitSniffMode[index] == remDev) {\n        return;\n      }\n    }\n  }\n\n  for (uint8_t index = 0;\n       index < COUNT_OF_PENDING_REMOTE_DEV_TO_EXIT_SNIFF_MODE; index++) {\n    if (0 == (maskOfRemoteDevPendingForExitingSniffMode & (1 << index))) {\n      pendingRemoteDevToExitSniffMode[index] = remDev;\n      maskOfRemoteDevPendingForExitingSniffMode |= (1 << index);\n    }\n  }\n}\n\nextern \"C\" bt_status_t\napp_tws_ibrt_set_access_mode(btif_accessible_mode_t mode);\nvoid app_start_ble_adv_for_test(void);\n\nstatic inline int app_bt_mail_process(APP_BT_MAIL *mail_p) {\n  bt_status_t status = BT_STS_LAST_CODE;\n  if (mail_p->request_id != CMGR_SetSniffTimer_req) {\n    TRACE(3, \"[BT_FUNC] src_thread:0x%08x call request_id=%x->:%s\",\n          mail_p->src_thread, mail_p->request_id,\n          app_bt_func_table_str[mail_p->request_id]);\n  }\n  switch (mail_p->request_id) {\n  case Me_switch_sco_req:\n    status = btif_me_switch_sco(mail_p->param.Me_switch_sco_param.scohandle);\n    break;\n  case ME_SwitchRole_req:\n    status = btif_me_switch_role(mail_p->param.ME_SwitchRole_param.remDev);\n    break;\n  case ME_SetConnectionRole_req:\n    status =\n        btif_me_set_connection_role(mail_p->param.BtConnectionRole_param.role);\n    break;\n  case MeDisconnectLink_req:\n    status = btif_me_force_disconnect_link_with_reason(\n        NULL, mail_p->param.MeDisconnectLink_param.remDev,\n        BTIF_BEC_USER_TERMINATED, TRUE);\n    break;\n  case ME_StopSniff_req: {\n    if (btif_me_get_remote_device_state(\n            mail_p->param.ME_StopSniff_param.remDev) == BTIF_BDS_CONNECTED) {\n      status = btif_me_stop_sniff(mail_p->param.ME_StopSniff_param.remDev);\n      if (BT_STS_IN_PROGRESS == status) {\n        app_add_pending_stop_sniff_op(mail_p->param.ME_StopSniff_param.remDev);\n      }\n    }\n    break;\n  }\n  case ME_StartSniff_req: {\n    if (btif_me_get_remote_device_state(\n            mail_p->param.ME_StartSniff_param.remDev) == BTIF_BDS_CONNECTED) {\n      status =\n          btif_me_start_sniff(mail_p->param.ME_StartSniff_param.remDev,\n                              &(mail_p->param.ME_StartSniff_param.sniffInfo));\n    }\n    break;\n  }\n  case BT_Control_SleepMode_req: {\n    btif_me_write_bt_sleep_enable(\n        mail_p->param.ME_BtControlSleepMode_param.isEnable);\n    break;\n  }\n  case ME_SetAccessibleMode_req:\n    app_set_accessmode(mail_p->param.ME_SetAccessibleMode_param.mode);\n    break;\n  case Me_SetLinkPolicy_req:\n    app_bt_set_linkpolicy(mail_p->param.Me_SetLinkPolicy_param.remDev,\n                          mail_p->param.Me_SetLinkPolicy_param.policy);\n    break;\n  case CMGR_SetSniffTimer_req:\n    if (mail_p->param.CMGR_SetSniffTimer_param.SniffInfo.maxInterval == 0) {\n      status = btif_cmgr_set_sniff_timer(\n          mail_p->param.CMGR_SetSniffTimer_param.Handler, NULL,\n          mail_p->param.CMGR_SetSniffTimer_param.Time);\n    } else {\n      status = btif_cmgr_set_sniff_timer(\n          mail_p->param.CMGR_SetSniffTimer_param.Handler,\n          &mail_p->param.CMGR_SetSniffTimer_param.SniffInfo,\n          mail_p->param.CMGR_SetSniffTimer_param.Time);\n    }\n    break;\n  case CMGR_SetSniffInofToAllHandlerByRemDev_req:\n    status = btif_cmgr_set_sniff_info_to_all_handler_by_remdev(\n        &mail_p->param.CMGR_SetSniffInofToAllHandlerByRemDev_param.SniffInfo,\n        mail_p->param.CMGR_SetSniffInofToAllHandlerByRemDev_param.RemDev);\n    break;\n  case A2DP_OpenStream_req:\n    status = btif_a2dp_open_stream(mail_p->param.A2DP_OpenStream_param.Stream,\n                                   mail_p->param.A2DP_OpenStream_param.Addr);\n    if ((BT_STS_NO_RESOURCES == status) || (BT_STS_IN_PROGRESS == status)) {\n      app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n      app_bt_reset_reconnect_timer(mail_p->param.A2DP_OpenStream_param.Addr);\n    } else {\n      app_bt_accessmode_set(BTIF_BAM_NOT_ACCESSIBLE);\n    }\n    break;\n  case A2DP_CloseStream_req:\n    status =\n        btif_a2dp_close_stream(mail_p->param.A2DP_CloseStream_param.Stream);\n    break;\n  case A2DP_SetMasterRole_req:\n    status =\n        btif_a2dp_set_master_role(mail_p->param.A2DP_SetMasterRole_param.Stream,\n                                  mail_p->param.A2DP_SetMasterRole_param.Flag);\n    break;\n  case HF_CreateServiceLink_req:\n    status = btif_hf_create_service_link(\n        mail_p->param.HF_CreateServiceLink_param.Chan,\n        mail_p->param.HF_CreateServiceLink_param.Addr);\n    if ((BT_STS_NO_RESOURCES == status) || (BT_STS_IN_PROGRESS == status)) {\n      app_bt_accessmode_set(BTIF_BAM_CONNECTABLE_ONLY);\n      app_bt_reset_reconnect_timer(\n          mail_p->param.HF_CreateServiceLink_param.Addr);\n    } else {\n      app_bt_accessmode_set(BTIF_BAM_NOT_ACCESSIBLE);\n    }\n    break;\n  case HF_DisconnectServiceLink_req:\n    status = btif_hf_disconnect_service_link(\n        mail_p->param.HF_DisconnectServiceLink_param.Chan);\n    break;\n  case HF_CreateAudioLink_req:\n    status =\n        btif_hf_create_audio_link(mail_p->param.HF_CreateAudioLink_param.Chan);\n    break;\n  case HF_DisconnectAudioLink_req:\n    status = btif_hf_disc_audio_link(\n        mail_p->param.HF_DisconnectAudioLink_param.Chan);\n    break;\n  case HF_EnableSniffMode_req:\n    status = btif_hf_enable_sniff_mode(\n        mail_p->param.HF_EnableSniffMode_param.Chan,\n        mail_p->param.HF_EnableSniffMode_param.Enable);\n    break;\n  case HF_SetMasterRole_req:\n    status = btif_hf_set_master_role(mail_p->param.HF_SetMasterRole_param.Chan,\n                                     mail_p->param.HF_SetMasterRole_param.Flag);\n    break;\n#ifdef BTIF_DIP_DEVICE\n  case DIP_QuryService_req:\n    status = btif_dip_query_for_service(\n        mail_p->param.DIP_QuryService_param.dip_client,\n        mail_p->param.DIP_QuryService_param.remDev);\n    break;\n#endif\n#if defined(__HSP_ENABLE__)\n  case HS_CreateServiceLink_req:\n    app_bt_accessmode_set(BTIF_BAM_NOT_ACCESSIBLE);\n    status =\n        HS_CreateServiceLink(mail_p->param.HS_CreateServiceLink_param.Chan,\n                             mail_p->param.HS_CreateServiceLink_param.Addr);\n    break;\n  case HS_CreateAudioLink_req:\n    status = HS_CreateAudioLink(mail_p->param.HS_CreateAudioLink_param.Chan);\n    break;\n  case HS_DisconnectAudioLink_req:\n    status =\n        HS_DisconnectAudioLink(mail_p->param.HS_DisconnectAudioLink_param.Chan);\n    break;\n  case HS_DisconnectServiceLink_req:\n    status = HS_DisconnectServiceLink(\n        mail_p->param.HS_DisconnectServiceLink_param.Chan);\n    break;\n  case HS_EnableSniffMode_req:\n    status = HS_EnableSniffMode(mail_p->param.HS_EnableSniffMode_param.Chan,\n                                mail_p->param.HS_EnableSniffMode_param.Enable);\n    break;\n#endif\n  case BT_Custom_Func_req:\n    if (mail_p->param.CustomFunc_param.func_ptr) {\n      TRACE(3, \"func:0x%08x,param0:0x%08x, param1:0x%08x\",\n            mail_p->param.CustomFunc_param.func_ptr,\n            mail_p->param.CustomFunc_param.param0,\n            mail_p->param.CustomFunc_param.param1);\n      ((APP_BTTHREAD_REQ_CUSTOMER_CALL_CB_T)(mail_p->param.CustomFunc_param\n                                                 .func_ptr))(\n          (void *)mail_p->param.CustomFunc_param.param0,\n          (void *)mail_p->param.CustomFunc_param.param1);\n    }\n    break;\n  }\n\n  if (mail_p->request_id != CMGR_SetSniffTimer_req) {\n    TRACE(2, \"[BT_FUNC] exit request_id:%d :status:%d\", mail_p->request_id,\n          status);\n  }\n  return 0;\n}\n\nstatic inline int app_bt_mail_alloc(APP_BT_MAIL **mail) {\n  *mail = (APP_BT_MAIL *)osMailAlloc(app_bt_mailbox, 0);\n  ASSERT(*mail, \"app_bt_mail_alloc error\");\n  return 0;\n}\n\nstatic inline int app_bt_mail_send(APP_BT_MAIL *mail) {\n  osStatus status;\n\n  ASSERT(mail, \"osMailAlloc NULL\");\n  status = osMailPut(app_bt_mailbox, mail);\n  ASSERT(osOK == status, \"osMailAlloc Put failed\");\n\n  OS_NotifyEvm();\n\n  return (int)status;\n}\n\nstatic inline int app_bt_mail_free(APP_BT_MAIL *mail_p) {\n  osStatus status;\n\n  status = osMailFree(app_bt_mailbox, mail_p);\n  ASSERT(osOK == status, \"osMailAlloc Put failed\");\n\n  return (int)status;\n}\n\nstatic inline int app_bt_mail_get(APP_BT_MAIL **mail_p) {\n  osEvent evt;\n  evt = osMailGet(app_bt_mailbox, 0);\n  if (evt.status == osEventMail) {\n    *mail_p = (APP_BT_MAIL *)evt.value.p;\n    return 0;\n  }\n  return -1;\n}\n\nstatic void app_bt_mail_poll(void) {\n  APP_BT_MAIL *mail_p = NULL;\n  if (!app_bt_mail_get(&mail_p)) {\n    app_bt_mail_process(mail_p);\n    app_bt_mail_free(mail_p);\n    osapi_notify_evm();\n  }\n}\n\nint app_bt_mail_init(void) {\n  app_bt_mailbox = osMailCreate(osMailQ(app_bt_mailbox), NULL);\n  if (app_bt_mailbox == NULL) {\n    TRACE(0, \"Failed to Create app_mailbox\\n\");\n    return -1;\n  }\n  Besbt_hook_handler_set(BESBT_HOOK_USER_1, app_bt_mail_poll);\n\n  return 0;\n}\n\nint app_bt_Me_switch_sco(uint16_t scohandle) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = Me_switch_sco_req;\n  mail->param.Me_switch_sco_param.scohandle = scohandle;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_ME_SwitchRole(btif_remote_device_t *remDev) {\n#if !defined(IBRT)\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = ME_SwitchRole_req;\n  mail->param.ME_SwitchRole_param.remDev = remDev;\n  app_bt_mail_send(mail);\n#endif\n  return 0;\n}\n\nint app_bt_ME_SetConnectionRole(btif_connection_role_t role) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = ME_SetConnectionRole_req;\n  mail->param.BtConnectionRole_param.role = role;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_MeDisconnectLink(btif_remote_device_t *remDev) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = MeDisconnectLink_req;\n  mail->param.MeDisconnectLink_param.remDev = remDev;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_ME_StopSniff(btif_remote_device_t *remDev) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = ME_StopSniff_req;\n  mail->param.ME_StopSniff_param.remDev = remDev;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_ME_StartSniff(btif_remote_device_t *remDev,\n                         btif_sniff_info_t *sniffInfo) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = ME_StartSniff_req;\n  mail->param.ME_StartSniff_param.remDev = remDev;\n  mail->param.ME_StartSniff_param.sniffInfo = *sniffInfo;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_ME_ControlSleepMode(bool isEnabled) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = BT_Control_SleepMode_req;\n  mail->param.ME_BtControlSleepMode_param.isEnable = isEnabled;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_ME_SetAccessibleMode(btif_accessible_mode_t mode,\n                                const btif_access_mode_info_t *info) {\n#if defined(BLE_ONLY_ENABLED)\n  return 0;\n#endif\n\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = ME_SetAccessibleMode_req;\n  mail->param.ME_SetAccessibleMode_param.mode = mode;\n  memcpy(&mail->param.ME_SetAccessibleMode_param.info, info,\n         sizeof(btif_access_mode_info_t));\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_Me_SetLinkPolicy(btif_remote_device_t *remDev,\n                            btif_link_policy_t policy) {\n#if !defined(IBRT)\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = Me_SetLinkPolicy_req;\n  mail->param.Me_SetLinkPolicy_param.remDev = remDev;\n  mail->param.Me_SetLinkPolicy_param.policy = policy;\n  app_bt_mail_send(mail);\n#endif\n  return 0;\n}\n\nint app_bt_CMGR_SetSniffTimer(btif_cmgr_handler_t *Handler,\n                              btif_sniff_info_t *SniffInfo, TimeT Time) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = CMGR_SetSniffTimer_req;\n  mail->param.CMGR_SetSniffTimer_param.Handler = Handler;\n  if (SniffInfo) {\n    memcpy(&mail->param.CMGR_SetSniffTimer_param.SniffInfo, SniffInfo,\n           sizeof(btif_sniff_info_t));\n  } else {\n    memset(&mail->param.CMGR_SetSniffTimer_param.SniffInfo, 0,\n           sizeof(btif_sniff_info_t));\n  }\n  mail->param.CMGR_SetSniffTimer_param.Time = Time;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(btif_sniff_info_t *SniffInfo,\n                                                 btif_remote_device_t *RemDev) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = CMGR_SetSniffInofToAllHandlerByRemDev_req;\n  memcpy(&mail->param.CMGR_SetSniffInofToAllHandlerByRemDev_param.SniffInfo,\n         SniffInfo, sizeof(btif_sniff_info_t));\n  mail->param.CMGR_SetSniffInofToAllHandlerByRemDev_param.RemDev = RemDev;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_A2DP_OpenStream(a2dp_stream_t *Stream, bt_bdaddr_t *Addr) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = A2DP_OpenStream_req;\n  mail->param.A2DP_OpenStream_param.Stream = Stream;\n  mail->param.A2DP_OpenStream_param.Addr = Addr;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_A2DP_CloseStream(a2dp_stream_t *Stream) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = A2DP_CloseStream_req;\n  mail->param.A2DP_CloseStream_param.Stream = Stream;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_A2DP_SetMasterRole(a2dp_stream_t *Stream, BOOL Flag) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = A2DP_SetMasterRole_req;\n  mail->param.A2DP_SetMasterRole_param.Stream = Stream;\n  mail->param.A2DP_SetMasterRole_param.Flag = Flag;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HF_CreateServiceLink(hf_chan_handle_t Chan, bt_bdaddr_t *Addr) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HF_CreateServiceLink_req;\n  mail->param.HF_CreateServiceLink_param.Chan = Chan;\n  mail->param.HF_CreateServiceLink_param.Addr = Addr;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HF_DisconnectServiceLink(hf_chan_handle_t Chan) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HF_DisconnectServiceLink_req;\n  mail->param.HF_DisconnectServiceLink_param.Chan = Chan;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HF_CreateAudioLink(hf_chan_handle_t Chan) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HF_CreateAudioLink_req;\n  mail->param.HF_CreateAudioLink_param.Chan = Chan;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HF_DisconnectAudioLink(hf_chan_handle_t Chan) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HF_DisconnectAudioLink_req;\n  mail->param.HF_DisconnectAudioLink_param.Chan = Chan;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HF_EnableSniffMode(hf_chan_handle_t Chan, BOOL Enable) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HF_EnableSniffMode_req;\n  mail->param.HF_EnableSniffMode_param.Chan = Chan;\n  mail->param.HF_EnableSniffMode_param.Enable = Enable;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HF_SetMasterRole(hf_chan_handle_t Chan, BOOL Flag) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HF_SetMasterRole_req;\n  mail->param.HF_SetMasterRole_param.Chan = Chan;\n  mail->param.HF_SetMasterRole_param.Flag = Flag;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\n#ifdef BTIF_DIP_DEVICE\nint app_bt_dip_QuryService(btif_dip_client_t *client,\n                           btif_remote_device_t *rem) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = DIP_QuryService_req;\n  mail->param.DIP_QuryService_param.remDev = rem;\n  mail->param.DIP_QuryService_param.dip_client = client;\n  app_bt_mail_send(mail);\n  return 0;\n}\n#endif\n\n#if defined(__HSP_ENABLE__)\nint app_bt_HS_CreateServiceLink(HsChannel *Chan, bt_bdaddr_t *Addr) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HS_CreateServiceLink_req;\n  mail->param.HS_CreateServiceLink_param.Chan = Chan;\n  mail->param.HS_CreateServiceLink_param.Addr = Addr;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HS_CreateAudioLink(HsChannel *Chan) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HS_CreateAudioLink_req;\n  mail->param.HS_CreateAudioLink_param.Chan = Chan;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HS_DisconnectAudioLink(HsChannel *Chan) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HS_DisconnectAudioLink_req;\n  mail->param.HS_DisconnectAudioLink_param.Chan = Chan;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HS_DisconnectServiceLink(HsChannel *Chan) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HS_DisconnectServiceLink_req;\n  mail->param.HS_DisconnectServiceLink_param.Chan = Chan;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\nint app_bt_HS_EnableSniffMode(HsChannel *Chan, BOOL Enable) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = HS_EnableSniffMode_req;\n  mail->param.HS_EnableSniffMode_param.Chan = Chan;\n  mail->param.HS_EnableSniffMode_param.Enable = Enable;\n  app_bt_mail_send(mail);\n  return 0;\n}\n\n#endif\nint app_bt_start_custom_function_in_bt_thread(uint32_t param0, uint32_t param1,\n                                              uint32_t funcPtr) {\n  APP_BT_MAIL *mail;\n  app_bt_mail_alloc(&mail);\n  mail->src_thread = (uint32_t)osThreadGetId();\n  mail->request_id = BT_Custom_Func_req;\n  mail->param.CustomFunc_param.func_ptr = funcPtr;\n  mail->param.CustomFunc_param.param0 = param0;\n  mail->param.CustomFunc_param.param1 = param1;\n  app_bt_mail_send(mail);\n  return 0;\n}\n"
  },
  {
    "path": "services/bt_app/app_bt_func.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BT_FUNC_H__\n#define __APP_BT_FUNC_H__\n\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \"a2dp_api.h\"\n#include \"dip_api.h\"\n#include \"hfp_api.h\"\n#include \"me_api.h\"\n\ntypedef enum _bt_fn_req {\n  Me_switch_sco_req = 0,\n  ME_SwitchRole_req = 1,\n  ME_SetConnectionRole_req = 2,\n  MeDisconnectLink_req = 3,\n  ME_StopSniff_req = 4,\n  ME_SetAccessibleMode_req = 5,\n  Me_SetLinkPolicy_req = 6,\n  CMGR_SetSniffTimer_req = 7,\n  CMGR_SetSniffInofToAllHandlerByRemDev_req = 8,\n  A2DP_OpenStream_req = 9,\n  A2DP_CloseStream_req = 10,\n  A2DP_SetMasterRole_req = 11,\n  HF_CreateServiceLink_req = 12,\n  HF_DisconnectServiceLink_req = 13,\n  HF_CreateAudioLink_req = 14,\n  HF_DisconnectAudioLink_req = 15,\n  HF_EnableSniffMode_req = 16,\n  HF_SetMasterRole_req = 17,\n#if defined(__HSP_ENABLE__)\n  HS_CreateServiceLink_req = 18,\n  HS_CreateAudioLink_req = 19,\n  HS_DisconnectAudioLink_req = 20,\n  HS_EnableSniffMode_req = 21,\n  HS_DisconnectServiceLink_req = 22,\n#endif\n  BT_Control_SleepMode_req = 23,\n  BT_Custom_Func_req = 24,\n  ME_StartSniff_req = 25,\n#ifdef BTIF_DIP_DEVICE\n  DIP_QuryService_req = 26,\n#endif\n  A2DP_Force_OpenStream_req = 27,\n  HF_Force_CreateServiceLink_req = 28,\n  BT_Red_Ccmp_Client_Open = 29,\n  BT_Set_Access_Mode_Test = 30,\n  BT_Set_Adv_Mode_Test = 31,\n  Write_Controller_Memory_Test = 32,\n  Read_Controller_Memory_Test = 33,\n} bt_fn_req;\ntypedef void (*APP_BTTHREAD_REQ_CUSTOMER_CALL_CB_T)(void *, void *);\n\ntypedef union _bt_fn_param {\n  // BtStatus Me_switch_sco(uint16_t  scohandle)\n  struct {\n    uint16_t scohandle;\n  } Me_switch_sco_param;\n\n  // BtStatus ME_SwitchRole(btif_remote_device_t *remDev)\n  struct {\n    btif_remote_device_t *remDev;\n  } ME_SwitchRole_param;\n\n  // BtConnectionRole ME_SetConnectionRole(BtConnectionRole role)\n  struct {\n    btif_connection_role_t role;\n  } BtConnectionRole_param;\n\n  // void MeDisconnectLink(btif_remote_device_t* remDev)\n  struct {\n    btif_remote_device_t *remDev;\n  } MeDisconnectLink_param;\n\n  // BtStatus ME_StopSniff(btif_remote_device_t *remDev)\n  struct {\n    btif_remote_device_t *remDev;\n  } ME_StopSniff_param;\n\n  struct {\n    btif_remote_device_t *remDev;\n    btif_sniff_info_t sniffInfo;\n  } ME_StartSniff_param;\n\n  struct {\n    bool isEnable;\n  } ME_BtControlSleepMode_param;\n\n  struct {\n    bool isEnable;\n  } ME_BtSetAdvMode_param;\n\n  // BtStatus ME_SetAccessibleMode(btif_accessible_mode_t mode, const\n  // btif_access_mode_info_t *info)\n  struct {\n    btif_accessible_mode_t mode;\n    btif_access_mode_info_t info;\n  } ME_SetAccessibleMode_param;\n\n  // BtStatus Me_SetLinkPolicy(btif_remote_device_t *remDev, btif_link_policy_t\n  // policy)\n  struct {\n    btif_remote_device_t *remDev;\n    btif_link_policy_t policy;\n  } Me_SetLinkPolicy_param;\n\n  /*BtStatus CMGR_SetSniffTimer(CmgrHandler *Handler,\n                              btif_sniff_info_t* SniffInfo,\n                              TimeT Time)\n     */\n  struct {\n    btif_cmgr_handler_t *Handler;\n    btif_sniff_info_t SniffInfo;\n    TimeT Time;\n  } CMGR_SetSniffTimer_param;\n\n  /*BtStatus CMGR_SetSniffInofToAllHandlerByRemDev(btif_sniff_info_t* SniffInfo,\n                                                              btif_remote_device_t\n     *RemDev)\n     */\n  struct {\n    btif_sniff_info_t SniffInfo;\n    btif_remote_device_t *RemDev;\n  } CMGR_SetSniffInofToAllHandlerByRemDev_param;\n\n  // BtStatus A2DP_OpenStream(a2dp_stream_t *Stream, bt_bdaddr_t *Addr)\n  struct {\n    a2dp_stream_t *Stream;\n    bt_bdaddr_t *Addr;\n  } A2DP_OpenStream_param;\n\n  // BtStatus A2DP_CloseStream(a2dp_stream_t *Stream);\n  struct {\n    a2dp_stream_t *Stream;\n  } A2DP_CloseStream_param;\n\n  // BtStatus A2DP_SetMasterRole(a2dp_stream_t *Stream, BOOL Flag);\n  struct {\n    a2dp_stream_t *Stream;\n    BOOL Flag;\n  } A2DP_SetMasterRole_param;\n\n  // BtStatus HF_CreateServiceLink(HfChannel *Chan, bt_bdaddr_t *Addr)\n  struct {\n    hf_chan_handle_t Chan;\n    bt_bdaddr_t *Addr;\n  } HF_CreateServiceLink_param;\n\n  // bt_status_t HF_DisconnectServiceLink(hf_chan_handle_t Chan)\n  struct {\n    hf_chan_handle_t Chan;\n  } HF_DisconnectServiceLink_param;\n\n  // bt_status_t HF_CreateAudioLink(hf_chan_handle_t Chan)\n  struct {\n    hf_chan_handle_t Chan;\n  } HF_CreateAudioLink_param;\n\n  // bt_status_t HF_DisconnectAudioLink(hf_chan_handle_t Chan)\n  struct {\n    hf_chan_handle_t Chan;\n  } HF_DisconnectAudioLink_param;\n\n  // bt_status_t HF_EnableSniffMode(hf_chan_handle_t Chan, BOOL Enable)\n  struct {\n    hf_chan_handle_t Chan;\n    BOOL Enable;\n  } HF_EnableSniffMode_param;\n\n  // bt_status_t HF_SetMasterRole(hf_chan_handle_t Chan, BOOL Flag);\n  struct {\n    hf_chan_handle_t Chan;\n    BOOL Flag;\n  } HF_SetMasterRole_param;\n\n#ifdef BTIF_DIP_DEVICE\n  struct {\n    btif_remote_device_t *remDev;\n    btif_dip_client_t *dip_client;\n  } DIP_QuryService_param;\n#endif\n\n#if defined(__HSP_ENABLE__)\n  // bt_status_t HS_CreateServiceLink(HsChannel *Chan, bt_bdaddr_t *Addr)\n  struct {\n    HsChannel *Chan;\n    bt_bdaddr_t *Addr;\n  } HS_CreateServiceLink_param;\n\n  // BtStatus HS_CreateAudioLink(HsChannel *Chan)\n  struct {\n    HsChannel *Chan;\n  } HS_CreateAudioLink_param;\n\n  // BtStatus HS_DisconnectAudioLink(HsChannel *Chan)\n  struct {\n    HsChannel *Chan;\n  } HS_DisconnectAudioLink_param;\n\n  // BtStatus HS_DisconnectServiceLink(HsChannel *Chan)\n  struct {\n    HsChannel *Chan;\n  } HS_DisconnectServiceLink_param;\n\n  // BtStatus HS_EnableSniffMode(HsChannel *Chan, BOOL Enable)\n  struct {\n    HsChannel *Chan;\n    BOOL Enable;\n  } HS_EnableSniffMode_param;\n#endif\n\n  struct {\n    uint32_t func_ptr;\n    uint32_t param0;\n    uint32_t param1;\n  } CustomFunc_param;\n\n  struct {\n    uint32_t addr;\n    uint32_t memval;\n    uint8_t type;\n  } Me_writecontrollermem_param;\n\n  struct {\n    uint32_t addr;\n    uint8_t len;\n    uint8_t type;\n  } Me_readcontrollermem_param;\n\n} bt_fn_param;\n\ntypedef struct {\n  uint32_t src_thread;\n  uint32_t request_id;\n  bt_fn_param param;\n} APP_BT_MAIL;\n\ntypedef struct {\n  btif_remote_device_t *remDev;\n  btif_link_policy_t policy;\n} BT_SET_LINKPOLICY_REQ_T;\n\nint app_bt_mail_init(void);\n\nint app_bt_Me_switch_sco(uint16_t scohandle);\n\nint app_bt_ME_SwitchRole(btif_remote_device_t *remDev);\n\nint app_bt_ME_SetConnectionRole(btif_connection_role_t role);\n\nint app_bt_MeDisconnectLink(btif_remote_device_t *remDev);\n\nint app_bt_ME_StopSniff(btif_remote_device_t *remDev);\n\nint app_bt_ME_SetAccessibleMode(btif_accessible_mode_t mode,\n                                const btif_access_mode_info_t *info);\n\nint app_bt_Me_SetLinkPolicy(btif_remote_device_t *remDev,\n                            btif_link_policy_t policy);\n\nint app_bt_CMGR_SetSniffTimer(btif_cmgr_handler_t *Handler,\n                              btif_sniff_info_t *SniffInfo, TimeT Time);\n\nint app_bt_CMGR_SetSniffInfoToAllHandlerByRemDev(btif_sniff_info_t *SniffInfo,\n                                                 btif_remote_device_t *RemDev);\n\nint app_bt_A2DP_OpenStream(a2dp_stream_t *Stream, bt_bdaddr_t *Addr);\n\nint app_bt_A2DP_CloseStream(a2dp_stream_t *Stream);\n\nint app_bt_A2DP_SetMasterRole(a2dp_stream_t *Stream, BOOL Flag);\n\nint app_bt_HF_CreateServiceLink(hf_chan_handle_t Chan, bt_bdaddr_t *Addr);\n\nint app_bt_HF_DisconnectServiceLink(hf_chan_handle_t Chan);\n\nint app_bt_HF_CreateAudioLink(hf_chan_handle_t Chan);\n\nint app_bt_HF_DisconnectAudioLink(hf_chan_handle_t Chan);\n\nint app_bt_HF_EnableSniffMode(hf_chan_handle_t Chan, BOOL Enable);\n\nint app_bt_HF_SetMasterRole(hf_chan_handle_t Chan, BOOL Flag);\n\nvoid app_bt_accessible_manager_process(const btif_event_t *Event);\nvoid app_bt_role_manager_process(const btif_event_t *Event);\nvoid app_bt_sniff_manager_process(const btif_event_t *Event);\n// void app_bt_golbal_handle_hook(const btif_event_t *Event);\n\nint app_bt_ME_ControlSleepMode(bool isEnabled);\n\n#ifdef BTIF_DIP_DEVICE\nint app_bt_dip_QuryService(btif_dip_client_t *client,\n                           btif_remote_device_t *rem);\n#endif\n\n#if defined(__HSP_ENABLE__)\nint app_bt_HS_CreateServiceLink(HsChannel *Chan, bt_bdaddr_t *Addr);\n\nint app_bt_HS_CreateAudioLink(HsChannel *Chan);\n\nint app_bt_HS_DisconnectAudioLink(HsChannel *Chan);\n\nint app_bt_HS_DisconnectServiceLink(HsChannel *Chan);\n\nint app_bt_HS_EnableSniffMode(HsChannel *Chan, BOOL Enable);\n\n#endif\nbool app_is_access_mode_set_pending(void);\nvoid app_set_pending_access_mode(void);\nvoid app_bt_set_linkpolicy(btif_remote_device_t *remDev,\n                           btif_link_policy_t policy);\nvoid app_check_pending_stop_sniff_op(void);\nBT_SET_LINKPOLICY_REQ_T *app_bt_pop_pending_set_linkpolicy(void);\nvoid app_retry_setting_access_mode(void);\nvoid app_set_accessmode(btif_accessible_mode_t mode);\n\nint app_bt_start_custom_function_in_bt_thread(uint32_t param0, uint32_t param1,\n                                              uint32_t funcPtr);\nint app_bt_ME_StartSniff(btif_remote_device_t *remDev,\n                         btif_sniff_info_t *sniffInfo);\n\n#ifdef __cplusplus\n}\n#endif\n#endif /* __APP_BT_FUNC_H__ */\n"
  },
  {
    "path": "services/bt_app/app_bt_hid.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef BTIF_HID_DEVICE\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_battery.h\"\n#include \"app_status_ind.h\"\n#include \"bluetooth.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n#include \"app.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_hid.h\"\n#include \"app_tws_ibrt.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"besbt_cfg.h\"\n#include \"bt_drv_interface.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"bt_if.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hid_api.h\"\n#include \"me_api.h\"\n#include \"os_api.h\"\n#include \"resources.h\"\n\nstatic bool shutter_mode = false;\nstatic bool send_capture_pending = false;\n\n#define APP_BT_HID_DELAY_SEND_CAPTURE_MS 500\nosTimerId app_bt_hid_delay_send_timer_id = 0;\nstatic void app_bt_hid_delay_send_timer_handler(void const *param);\nosTimerDef(APP_BT_HID_DELAY_SEND_CAPTURE_TIMER,\n           app_bt_hid_delay_send_timer_handler);\n\nextern struct BT_DEVICE_T app_bt_device;\n\nstatic void app_bt_hid_delay_send_timer_handler(void const *param) {\n  hid_channel_t chan = (hid_channel_t)param;\n  app_bt_start_custom_function_in_bt_thread((uint32_t)&chan, (uint32_t)NULL,\n                                            (uint32_t)app_bt_hid_send_capture);\n}\n\nstatic void app_bt_hid_delay_send_capture(hid_channel_t chan) {\n  if (app_bt_hid_delay_send_timer_id) {\n    osTimerStop(app_bt_hid_delay_send_timer_id);\n    osTimerDelete(app_bt_hid_delay_send_timer_id);\n    app_bt_hid_delay_send_timer_id = 0;\n  }\n\n  app_bt_hid_delay_send_timer_id = osTimerCreate(\n      osTimer(APP_BT_HID_DELAY_SEND_CAPTURE_TIMER), osTimerOnce, chan);\n\n  if (!app_bt_hid_delay_send_timer_id) {\n    TRACE(1, \"%s create timer failed\", __func__);\n    return;\n  }\n\n  TRACE(2, \"%s channel %p\", __func__, chan);\n\n  osTimerStart(app_bt_hid_delay_send_timer_id,\n               APP_BT_HID_DELAY_SEND_CAPTURE_MS);\n}\n\nstatic void app_bt_hid_callback(hid_channel_t chan,\n                                const hid_callback_parms_t *param) {\n  btif_hid_callback_param_t *info = (btif_hid_callback_param_t *)param;\n\n  TRACE(9, \"%s channel %p event %d errno %02x %02x:%02x:%02x:%02x:%02x:%02x\",\n        __func__, chan, info->event, info->error_code, info->remote.address[0],\n        info->remote.address[1], info->remote.address[2],\n        info->remote.address[3], info->remote.address[4],\n        info->remote.address[5]);\n\n  switch (info->event) {\n  case BTIF_HID_EVENT_CONN_OPENED:\n    shutter_mode = true;\n    if (send_capture_pending) {\n      app_bt_hid_delay_send_capture(chan);\n      send_capture_pending = false;\n    }\n    break;\n  case BTIF_HID_EVENT_CONN_CLOSED:\n    shutter_mode = false;\n    break;\n  default:\n    break;\n  }\n  app_tws_ibrt_profile_callback(BTIF_APP_HID_PROFILE_ID, (void *)chan,\n                                (void *)param);\n}\n\nvoid app_bt_hid_init(void) {\n  // TRACE(2, \"%s sink_enable %d\", __func__, besbt_cfg.sink_enable);\n  // if (besbt_cfg.sink_enable)\n  {\n    btif_hid_init(app_bt_hid_callback, HID_DEVICE_ROLE);\n\n    for (int i = 0; i < BT_DEVICE_NUM; ++i) {\n      app_bt_device.hid_channel[i] = btif_hid_channel_alloc();\n      TRACE(2, \"app_bt_hid_init device: %d hid_channle: %p\", i,\n            app_bt_device.hid_channel[i]);\n    }\n  }\n}\n\nvoid app_bt_hid_profile_connect(bt_bdaddr_t *bdaddr) {\n  static bt_bdaddr_t remote;\n\n  remote = *bdaddr;\n\n  TRACE(7, \"%s address %02x:%02x:%02x:%02x:%02x:%02x\", __func__,\n        remote.address[0], remote.address[1], remote.address[2],\n        remote.address[3], remote.address[4], remote.address[5]);\n\n  app_bt_start_custom_function_in_bt_thread((uint32_t)&remote, (uint32_t)NULL,\n                                            (uint32_t)btif_hid_connect);\n}\n\nvoid app_bt_hid_profile_disconnect(hid_channel_t chnl) {\n  TRACE(1, \"%s channel %p\", __func__, chnl);\n\n  app_bt_start_custom_function_in_bt_thread((uint32_t)chnl, (uint32_t)NULL,\n                                            (uint32_t)btif_hid_disconnect);\n}\n\nint app_bt_nvrecord_get_latest_device_addr(bt_bdaddr_t *addr) {\n  btif_device_record_t record;\n  int found_addr_count = 0;\n  int paired_dev_count = nv_record_get_paired_dev_count();\n\n  if (paired_dev_count > 0 &&\n      BT_STS_SUCCESS == nv_record_enum_dev_records(0, &record)) {\n    *addr = record.bdAddr;\n    found_addr_count = 1;\n  }\n\n  return found_addr_count;\n}\n\nvoid app_bt_hid_enter_shutter_mode(void) {\n  bt_bdaddr_t remote;\n\n  TRACE(1, \"%s\", __func__);\n\n  if (!app_bt_nvrecord_get_latest_device_addr(&remote)) {\n    TRACE(1, \"%s latest device not found\", __func__);\n    return;\n  }\n\n  if (!shutter_mode) {\n    app_bt_hid_profile_connect(&remote);\n    shutter_mode = true;\n  } else {\n    TRACE(1, \"%s already in shutter mode\", __func__);\n  }\n}\n\nvoid app_bt_hid_exit_shutter_mode(void) {\n  hid_channel_t chnl = NULL;\n  int i = 0;\n\n  TRACE(0, \"%s\", __func__);\n\n  for (; i < BT_DEVICE_NUM; ++i) {\n    chnl = app_bt_device.hid_channel[i];\n    if (btif_hid_is_connected(chnl)) {\n      app_bt_hid_profile_disconnect(chnl);\n    }\n  }\n\n  shutter_mode = false;\n}\n\nvoid app_bt_hid_send_capture(hid_channel_t chnl) {\n  for (int i = 0; i < BT_DEVICE_NUM; ++i) {\n    if (btif_hid_is_connected(app_bt_device.hid_channel[i])) {\n      chnl = app_bt_device.hid_channel[i];\n      break;\n    }\n  }\n\n  TRACE(3, \"%s channel %p state %d\", __func__, chnl, btif_hid_get_state(chnl));\n\n  if (btif_hid_is_connected(chnl)) {\n    send_capture_pending = false;\n\n    btif_hid_keyboard_input_report(chnl, HID_MOD_KEY_NULL, HID_KEY_CODE_ENTER);\n    btif_hid_keyboard_input_report(chnl, HID_MOD_KEY_NULL, HID_KEY_CODE_NULL);\n\n    btif_hid_keyboard_send_ctrl_key(chnl, HID_CTRL_KEY_VOLUME_INC);\n    btif_hid_keyboard_send_ctrl_key(chnl, HID_CTRL_KEY_NULL);\n  } else {\n    send_capture_pending = true;\n\n    app_bt_hid_enter_shutter_mode();\n  }\n}\n\n#endif /* BTIF_HID_DEVICE */\n"
  },
  {
    "path": "services/bt_app/app_bt_hid.h",
    "content": "\n/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BT_HID_H__\n#define __APP_BT_HID_H__\n\n#ifdef BTIF_HID_DEVICE\n\n#include \"bluetooth.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define HID_CTRL_KEY_NULL       0x00\n#define HID_CTRL_KEY_POWER      0x01\n#define HID_CTRL_KEY_PLAY       0x02\n#define HID_CTRL_KEY_PAUSE      0x04\n#define HID_CTRL_KEY_STOP       0x08\n#define HID_CTRL_KEY_EJECT      0x10\n#define HID_CTRL_KEY_PLAY_PAUSE 0x20\n#define HID_CTRL_KEY_VOLUME_INC 0x40\n#define HID_CTRL_KEY_VOLUME_DEC 0x80\n\n#define HID_MOD_KEY_NULL    0x00\n#define HID_MOD_KEY_L_CTRL  0x01\n#define HID_MOD_KEY_L_SHIFT 0x02\n#define HID_MOD_KEY_L_ALT   0x04\n#define HID_MOD_KEY_L_WIN   0x08\n#define HID_MOD_KEY_R_CTRL  0x10\n#define HID_MOD_KEY_R_SHIFT 0x20\n#define HID_MOD_KEY_R_ALT   0x40\n#define HID_MOD_KEY_R_WIN   0x80\n\n#define HID_KEY_CODE_NULL   0x00\n#define HID_KEY_CODE_A      0x04\n#define HID_KEY_CODE_Z      0x1d\n#define HID_KEY_CODE_1      0x1e\n#define HID_KEY_CODE_9      0x26\n#define HID_KEY_CODE_0      0x27\n#define HID_KEY_CODE_ENTER  0x28\n#define HID_KEY_CODE_ESC    0x29\n#define HID_KEY_CODE_DEL    0x2a\n#define HID_KEY_CODE_TAB    0x2b\n#define HID_KEY_CODE_SPACE  0x2c\n#define HID_KEY_CODE_VOLUP  0x80\n#define HID_KEY_CODE_VOLDN  0x81\n\ntypedef struct hid_control_t* hid_channel_t;\n\nvoid app_bt_hid_init(void);\n\nvoid app_bt_hid_enter_shutter_mode(void);\n\nvoid app_bt_hid_exit_shutter_mode(void);\n\nvoid app_bt_hid_send_capture(hid_channel_t chnl);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* BTIF_HID_DEVICE */\n\n#endif /* __APP_BT_HID_H__ */\n\n"
  },
  {
    "path": "services/bt_app/app_bt_media_manager.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \n#include \n\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_bt_trace.h\"\n#include \"app_overlay.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#else\n#include \"app_media_player.h\"\n#endif\n\n#include \"resources.h\"\n#ifdef MEDIA_PLAYER_SUPPORT\n#include \"app_media_player.h\"\n#endif\n\n#include \"app_bt_func.h\"\n#include \"apps.h\"\n#include \"bt_drv.h\"\n\n#include \"besbt.h\"\n\n#include \"app_hfp.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n\n#include \"app_bt_media_manager.h\"\n#include \"app_thread.h\"\n\n#include \"app_ai_if.h\"\n#include \"app_ring_merge.h\"\n#include \"audio_prompt_sbc.h\"\n#include \"bt_if.h\"\n\nint bt_sco_player_forcemute(bool mic_mute, bool spk_mute);\nint bt_sco_player_get_codetype(void);\nextern struct BT_DEVICE_T app_bt_device;\nextern enum AUD_SAMPRATE_T a2dp_sample_rate;\n\nstruct bt_media_manager {\n  uint16_t media_active[BT_DEVICE_NUM];\n  uint8_t media_current_call_state[BT_DEVICE_NUM];\n  uint8_t media_curr_sbc;\n  uint8_t media_curr_sco;\n  uint16_t curr_active_media; // low 8 bits are out direciton, while high 8 bits\n                              // are in direction\n};\n\nstatic char _strm_type_str[168];\nstatic char *_catstr(char *dst, const char *src) {\n  while (*dst)\n    dst++;\n  while ((*dst++ = *src++))\n    ;\n  return --dst;\n}\nstatic const char *strmtype2str(uint16_t stream_type) {\n  const char *s = NULL;\n  char _cat = 0, first = 1, *d = NULL;\n  _strm_type_str[0] = '\\0';\n  d = _strm_type_str;\n  d = _catstr(d, \"[\");\n  if (stream_type != 0) {\n    for (int i = 15; i >= 0; i--) {\n      _cat = 1;\n      // TRACE_AUD_MGR_I(\"i=%d,stream_type=0x%d,stream_type&(1<%d\", bt_meida.media_curr_sbc, id);\n  bt_meida.media_curr_sbc = id;\n}\n\nstatic void bt_media_set_current_media(uint16_t media_type) {\n  // out direction\n  if (media_type < 0x100) {\n    bt_meida.curr_active_media &= (~0xFF);\n    bt_meida.curr_active_media |= media_type;\n  } else {\n    // bt_meida.curr_active_media &= (~0xFF00);\n    bt_meida.curr_active_media |= media_type;\n  }\n\n  TRACE_AUD_MGR_I(\"curr_active_media is set to 0x%x->:%s\",\n                  bt_meida.curr_active_media,\n                  strmtype2str(bt_meida.curr_active_media));\n}\n\nstatic void bt_media_clear_current_media(uint16_t media_type) {\n  if (media_type < 0x100) {\n    bt_meida.curr_active_media &= (~0xFF);\n  } else {\n    bt_meida.curr_active_media &= (~media_type);\n  }\n  TRACE_AUD_MGR_I(\"clear media 0x%x curr media 0x%x\", media_type,\n                  bt_meida.curr_active_media);\n}\n#ifdef VOICE_DATAPATH\n#if !ISOLATED_AUDIO_STREAM_ENABLED\nstatic void bt_media_clear_all_media_type(void) {\n  uint8_t i;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    bt_meida.media_active[i] &= (~BT_STREAM_MEDIA);\n  }\n}\n#endif\n#endif\n\nstatic uint8_t bt_media_set_media_type(uint16_t media_type,\n                                       enum BT_DEVICE_ID_T device_id) {\n  TRACE_AUD_MGR_I(\"[MEDIA_TYPE][SET] 0x%x active_now 0x%x id %d\", media_type,\n                  bt_meida.media_active[0], device_id);\n  if (device_id < BT_DEVICE_NUM) {\n    bt_meida.media_active[device_id] |= media_type;\n  } else {\n    TRACE_AUD_MGR_W(\"[MEDIA_TYPE][SET] invalid devcie_id:%d\", device_id);\n  }\n  return 0;\n}\n\nvoid bt_media_clear_media_type(uint16_t media_type,\n                               enum BT_DEVICE_ID_T device_id) {\n  TRACE_AUD_MGR_I(\"[MEDIA_TYPE][CLR] 0x%x active_now 0x%x id %d\", media_type,\n                  bt_meida.media_active[0], device_id);\n  if (media_type == BT_STREAM_MEDIA) {\n    for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n      bt_meida.media_active[i] &= (~media_type);\n    }\n  } else {\n    bt_meida.media_active[device_id] &= (~media_type);\n  }\n}\n\nstatic enum BT_DEVICE_ID_T bt_media_get_active_sbc_device(void) {\n  enum BT_DEVICE_ID_T device = BT_DEVICE_NUM;\n  uint8_t i;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if ((bt_meida.media_active[i] & BT_STREAM_SBC) &&\n        (i == bt_meida.media_curr_sbc))\n      device = (enum BT_DEVICE_ID_T)i;\n  }\n  return device;\n}\n\n#ifdef RB_CODEC\nbool bt_media_rbcodec_start_process(uint16_t stream_type,\n                                    enum BT_DEVICE_ID_T device_id,\n                                    AUD_ID_ENUM media_id, uint32_t param,\n                                    uint32_t ptr) {\n  int ret_SendReq2AudioThread = -1;\n  bt_meida.media_active[device_id] |= stream_type;\n\n  ret_SendReq2AudioThread = app_audio_sendrequest(\n      APP_BT_STREAM_RBCODEC, (uint8_t)APP_BT_SETTING_OPEN, media_id);\n  bt_media_set_current_media(BT_STREAM_RBCODEC);\n  return true;\nexit:\n  return false;\n}\n#endif\n\n#ifdef VOICE_DATAPATH\nstatic bool bt_media_voicepath_start_process(uint16_t stream_type,\n                                             enum BT_DEVICE_ID_T device_id,\n                                             AUD_ID_ENUM media_id,\n                                             uint32_t param, uint32_t ptr) {\n  bt_meida.media_active[device_id] |= stream_type;\n  app_audio_sendrequest(APP_BT_STREAM_VOICEPATH, (uint8_t)APP_BT_SETTING_OPEN,\n                        media_id);\n\n  bt_media_set_current_media(BT_STREAM_CAPTURE);\n  return true;\n}\n#endif\n\n#ifdef __AI_VOICE__\nstatic bool bt_media_ai_voice_start_process(uint16_t stream_type,\n                                            enum BT_DEVICE_ID_T device_id,\n                                            AUD_ID_ENUM media_id,\n                                            uint32_t param, uint32_t ptr) {\n  bt_meida.media_active[device_id] |= stream_type;\n  app_audio_sendrequest(APP_BT_STREAM_AI_VOICE, (uint8_t)APP_BT_SETTING_OPEN,\n                        media_id);\n\n  bt_media_set_current_media(BT_STREAM_AI_VOICE);\n  return true;\n}\n#endif\n\n#ifdef __THIRDPARTY\nstatic bool bt_media_thirdparty_voice_start_process(\n    uint16_t stream_type, enum BT_DEVICE_ID_T device_id, AUD_ID_ENUM media_id,\n    uint32_t param, uint32_t ptr) {\n  bt_meida.media_active[device_id] |= stream_type;\n  app_audio_sendrequest(APP_BT_STREAM_THIRDPARTY_VOICE,\n                        (uint8_t)APP_BT_SETTING_OPEN, media_id);\n\n  bt_media_set_current_media(BT_STREAM_THIRDPARTY_VOICE);\n  return true;\n}\n#endif\n\nvoid app_stop_a2dp_media_stream(uint8_t devId) {\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC,\n                                devId, 0);\n}\n\nvoid app_stop_sco_media_stream(uint8_t devId) {\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                devId, 0);\n}\n\n// only used in iamain thread ,can't used in other thread or interrupt\nvoid bt_media_start(uint16_t stream_type, enum BT_DEVICE_ID_T device_id,\n                    uint16_t media_id) {\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T other_device_id =\n      (device_id == BT_DEVICE_ID_1) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n\n#ifdef MEDIA_PLAYER_SUPPORT\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n  bool isMergingPrompt = true;\n#endif\n#endif\n\n  bt_media_set_media_type(stream_type, device_id);\n\n  TRACE_AUD_MGR_I(\n      \"[HANDLE_START] type= 0x%x->:%s,device id = 0x%x,media_id = 0x%x\",\n      stream_type, strmtype2str(stream_type), device_id, media_id);\n\n#ifdef __BT_ONE_BRING_TWO__\n  TRACE_AUD_MGR_I(\"[HANDLE_START] media_active[0] = 0x%x->:%s\",\n                  bt_meida.media_active[0],\n                  strmtype2str(bt_meida.media_active[0]));\n  TRACE_AUD_MGR_I(\"[HANDLE_START] media_active[1] = 0x%x->:%s\",\n                  bt_meida.media_active[1],\n                  strmtype2str(bt_meida.media_active[1]));\n  TRACE_AUD_MGR_I(\"[HANDLE_START] curr_active_media = 0x%x->:%s\",\n                  bt_meida.curr_active_media,\n                  strmtype2str(bt_meida.curr_active_media));\n#else\n  TRACE_AUD_MGR_I(\"[HANDLE_START] media_active = 0x%x->:%s\",\n                  bt_meida.media_active[0],\n                  strmtype2str(bt_meida.media_active[0]));\n  TRACE_AUD_MGR_I(\"[HANDLE_START] curr_active_media = 0x%x->:%s\",\n                  bt_meida.curr_active_media,\n                  strmtype2str(bt_meida.curr_active_media));\n#endif\n\n  switch (stream_type) {\n#ifdef RB_CODEC\n  case BT_STREAM_RBCODEC:\n    if (!bt_media_rbcodec_start_process(stream_type, device_id,\n                                        (AUD_ID_ENUM)media_id, NULL, NULL))\n      goto exit;\n    break;\n#endif\n\n#ifdef VOICE_DATAPATH\n  case BT_STREAM_CAPTURE:\n    if (bt_media_get_current_media() & BT_STREAM_CAPTURE) {\n      TRACE_AUD_MGR_I(\"[HANDLE_START] capture stream exist ,do nothing\");\n      return;\n    }\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n      goto exit;\n    }\n\n#ifdef MEDIA_PLAYER_SUPPORT\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n    if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n      return;\n    }\n#endif\n#endif\n    if (!bt_media_voicepath_start_process(BT_STREAM_CAPTURE, device_id,\n                                          (AUD_ID_ENUM)media_id, (uint32_t)NULL,\n                                          (uint32_t)NULL))\n      goto exit;\n    break;\n#endif\n\n#ifdef __AI_VOICE__\n  case BT_STREAM_AI_VOICE:\n    if (bt_media_get_current_media() & BT_STREAM_AI_VOICE) {\n      TRACE_AUD_MGR_I(\"[HANDLE_START] ai voice stream exist ,do nothing\");\n      return;\n    }\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n      TRACE_AUD_MGR_I(\"[HANDLE_START] SCO stream exist ,do nothing\");\n      goto exit;\n    }\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n      if (bt_media_get_current_media() & BT_STREAM_SBC) {\n        TRACE_AUD_MGR_I(\"[HANDLE_START] CLOSE SBC.\");\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)APP_BT_SETTING_CLOSE, 0);\n        bt_media_clear_current_media(BT_STREAM_SBC);\n      }\n    }\n\n    if (!bt_media_ai_voice_start_process(BT_STREAM_AI_VOICE, device_id,\n                                         (AUD_ID_ENUM)media_id, (uint32_t)NULL,\n                                         (uint32_t)NULL))\n      goto exit;\n    break;\n#endif\n#ifdef __THIRDPARTY\n  case BT_STREAM_THIRDPARTY_VOICE:\n    if (bt_media_get_current_media() & BT_STREAM_THIRDPARTY_VOICE) {\n      TRACE_AUD_MGR_I(\n          \"[HANDLE_START]there is a thirdparty voice stream exist ,do nothing\");\n      return;\n    }\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n      TRACE_AUD_MGR_I(\"[HANDLE_START]there is a SCO stream exist ,do nothing\");\n      goto exit;\n    }\n\n    if (!bt_media_thirdparty_voice_start_process(\n            BT_STREAM_THIRDPARTY_VOICE, device_id, (AUD_ID_ENUM)media_id,\n            (uint32_t)NULL, (uint32_t)NULL))\n      goto exit;\n    break;\n#endif\n\n  case BT_STREAM_SBC: {\n    uint8_t media_pre_sbc = bt_meida.media_curr_sbc;\n    ////because voice is the highest priority and media report will stop soon\n    //// so just store the sbc type\n    if (bt_meida.media_curr_sbc == BT_DEVICE_NUM)\n      bt_meida.media_curr_sbc = device_id;\n    TRACE_AUD_MGR_I(\"[HANDLE_START] pre/cur_sbc = %d/%d\", media_pre_sbc,\n                    bt_meida.media_curr_sbc);\n\n#ifdef MEDIA_PLAYER_SUPPORT\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    /// clear the pending stop flag if it is set\n    audio_prompt_clear_pending_stream(PENDING_TO_STOP_A2DP_STREAMING);\n#endif\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n      goto exit;\n    }\n#endif\n#ifdef RB_CODEC\n    if (bt_media_is_media_active_by_type(BT_STREAM_RBCODEC)) {\n      goto exit;\n    }\n#endif\n\n#ifdef VOICE_DATAPATH\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n    if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n      goto exit;\n    }\n#endif\n#endif\n\n#ifdef __AI_VOICE__\n    if (bt_media_is_media_active_by_type(BT_STREAM_AI_VOICE) ||\n        ai_if_is_ai_stream_mic_open()) {\n      TRACE_AUD_MGR_I(\"[HANDLE_START] ai voice stream exist\");\n      goto exit;\n    }\n#endif\n\n#ifdef AUDIO_LINEIN\n    if (bt_media_is_media_active_by_type(BT_STREAM_LINEIN)) {\n      if (bt_media_get_current_media() & BT_STREAM_LINEIN) {\n        app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP,\n                                      (uint8_t)BT_STREAM_LINEIN, 0, 0);\n        app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n                                      BT_STREAM_SBC, device_id, 0);\n        return;\n      }\n    }\n#endif\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n      ////sbc and voice is all on so set sys freq to 104m\n      app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_104M);\n      return;\n    }\n#ifdef __BT_ONE_BRING_TWO__\n    else if (btapp_hfp_is_call_active()) {\n      // do nothing\n      TRACE_AUD_MGR_I(\"[HANDLE_START] skip sbc start, because HF_CALL_ACTIVE\");\n    } else if (bt_media_is_media_active_by_device(BT_STREAM_SBC,\n                                                  other_device_id)) {\n#if !defined(__MULTIPOINT_A2DP_PREEMPT__)\n      // if another device is the active stream do nothing\n      if (bt_meida.media_curr_sbc == other_device_id) {\n\n        /// 2 device is play sbc,so set sys freq to 104m\n        app_audio_manager_switch_a2dp(\n            (enum BT_DEVICE_ID_T)bt_meida.media_curr_sbc);\n        app_audio_sendrequest_param((uint8_t)APP_BT_STREAM_A2DP_SBC,\n                                    (uint8_t)APP_BT_SETTING_RESTART, 0,\n                                    APP_SYSFREQ_104M);\n        return;\n      }\n#else\n      if (bt_meida.media_curr_sbc == other_device_id) {\n        app_audio_manager_switch_a2dp(device_id);\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)(APP_BT_SETTING_SETUP),\n                              (uint32_t)(app_bt_device.sample_rate[device_id] &\n                                         A2D_STREAM_SAMP_FREQ_MSK));\n        app_audio_sendrequest_param(APP_BT_STREAM_A2DP_SBC,\n                                    (uint8_t)APP_BT_SETTING_RESTART, 0,\n                                    APP_SYSFREQ_104M);\n        return;\n      }\n#endif\n      ////if curr active media is not sbc,wrong~~\n      if (0 == (bt_media_get_current_media() & BT_STREAM_SBC)) {\n        ASSERT(0, \"curr_active_media is wrong!\");\n      }\n      /// stop the old audio sbc and start the new audio sbc\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)APP_BT_SETTING_CLOSE, 0);\n    }\n#endif\n    else {\n      // start audio sbc stream\n      if (media_pre_sbc != bt_meida.media_curr_sbc) {\n        app_audio_manager_switch_a2dp(device_id);\n        bt_media_set_current_media(BT_STREAM_SBC);\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)(APP_BT_SETTING_SETUP),\n                              (uint32_t)(app_bt_device.sample_rate[device_id] &\n                                         A2D_STREAM_SAMP_FREQ_MSK));\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)APP_BT_SETTING_OPEN, 0);\n      }\n    }\n  } break;\n\n#ifdef MEDIA_PLAYER_SUPPORT\n  case BT_STREAM_MEDIA:\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    isMergingPrompt = IS_PROMPT_NEED_MERGING(media_id);\n#endif\n\n    if (\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n        audio_prompt_is_playing_ongoing() ||\n#endif\n        app_audio_list_playback_exist()) {\n      if (!bt_media_cur_is_bt_stream_media()) {\n        bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n      }\n      media_id = PROMPT_ID_FROM_ID_VALUE(media_id);\n      APP_AUDIO_STATUS aud_status;\n      aud_status.id = APP_PLAY_BACK_AUDIO;\n      aud_status.aud_id = media_id;\n\n      app_audio_list_append(&aud_status);\n      break;\n    }\n\n#ifdef AUDIO_LINEIN\n    if (bt_media_is_media_active_by_type(BT_STREAM_LINEIN)) {\n      if (bt_media_get_current_media() & BT_STREAM_LINEIN) {\n        APP_AUDIO_STATUS aud_status;\n        aud_status.id = media_id;\n        app_play_audio_lineinmode_start(&aud_status);\n        bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n      }\n    } else\n#endif\n        // first,if the voice is active so  mix \"dudu\" to the stream\n        if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n      if (bt_media_get_current_media() & BT_STREAM_VOICE) {\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n        // if the playback is not triggered yet, we just use the stand-alone\n        // prompt playing\n        if (!bt_is_playback_triggered()) {\n          isMergingPrompt = false;\n        }\n#endif\n        // if call is not active so do media report\n        if ((btapp_hfp_is_call_active() && !btapp_hfp_incoming_calls()) ||\n            (app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM))) {\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n          bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n          if (isMergingPrompt) {\n            audio_prompt_start_playing(media_id, sco_sample_rate);\n            goto exit;\n          } else {\n            app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                                  (uint8_t)APP_BT_SETTING_CLOSE, 0);\n            app_audio_sendrequest(APP_PLAY_BACK_AUDIO,\n                                  (uint8_t)APP_BT_SETTING_OPEN, media_id);\n            bt_media_set_current_media(BT_STREAM_MEDIA);\n          }\n#else\n          // in three way call merge \"dudu\"\n          TRACE_AUD_MGR_I(\n              \"[HANDLE_START] BT_STREAM_VOICE-->app_ring_merge_start\\n\");\n          app_ring_merge_start();\n          // meida is done here\n          bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n#endif\n        } else {\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n          bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n          if (isMergingPrompt) {\n            audio_prompt_start_playing(media_id, sco_sample_rate);\n            goto exit;\n          } else {\n            app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                                  (uint8_t)APP_BT_SETTING_CLOSE, 0);\n            app_audio_sendrequest(APP_PLAY_BACK_AUDIO,\n                                  (uint8_t)APP_BT_SETTING_OPEN, media_id);\n            bt_media_set_current_media(BT_STREAM_MEDIA);\n          }\n#else\n          TRACE_AUD_MGR_I(\"[HANDLE_START] stop sco and do media report\\n\");\n          bt_media_set_current_media(BT_STREAM_MEDIA);\n          app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                                (uint8_t)APP_BT_SETTING_CLOSE, 0);\n          app_audio_sendrequest(APP_PLAY_BACK_AUDIO,\n                                (uint8_t)APP_BT_SETTING_OPEN, media_id);\n#endif\n        }\n      } else if (bt_media_get_current_media() & BT_STREAM_MEDIA) {\n        bt_media_set_current_media(BT_STREAM_MEDIA);\n        app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_OPEN,\n                              media_id);\n      } else {\n        /// if voice is active but current is not voice something is unkown\n        bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n#ifdef __BT_ONE_BRING_TWO__\n        TRACE_AUD_MGR_I(\n            \"[HANDLE_START] voice_act media_act = %x,%x,curr_media = %x\",\n            bt_meida.media_active[0], bt_meida.media_active[1],\n            bt_meida.curr_active_media);\n#else\n        TRACE_AUD_MGR_I(\n            \"[HANDLE_START] voice_act media_act = %x,curr_media = %x\",\n            bt_meida.media_active[0], bt_meida.curr_active_media);\n\n#endif\n      }\n    } else if (btapp_hfp_is_call_active()) {\n      bt_media_set_current_media(BT_STREAM_MEDIA);\n      app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_OPEN,\n                            media_id);\n    }\n#ifdef VOICE_DATAPATH\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n    else if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n      if (bt_media_get_current_media() & BT_STREAM_MEDIA) {\n        app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_OPEN,\n                              media_id);\n      } else {\n        goto exit;\n      }\n    }\n#endif\n#endif\n    ////if sbc active so\n    else if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n      if (bt_media_get_current_media() & BT_STREAM_SBC) {\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n        // if the playback is not triggered yet, we just use the stand-alone\n        // prompt playing\n        if (!bt_is_playback_triggered()) {\n          isMergingPrompt = false;\n        }\n\n        bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n        if (isMergingPrompt) {\n          audio_prompt_start_playing(media_id, a2dp_sample_rate);\n          goto exit;\n        } else {\n          TRACE_AUD_MGR_I(\"[HANDLE_START] START prompt.\");\n          app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                                (uint8_t)APP_BT_SETTING_CLOSE, 0);\n          bt_media_set_current_media(BT_STREAM_MEDIA);\n          app_audio_sendrequest(APP_PLAY_BACK_AUDIO,\n                                (uint8_t)APP_BT_SETTING_OPEN, media_id);\n        }\n#else\n#ifdef __BT_WARNING_TONE_MERGE_INTO_STREAM_SBC__\n        if (PROMPT_ID_FROM_ID_VALUE(media_id) == AUD_ID_BT_WARNING) {\n          TRACE_AUD_MGR_I(\n              \"[HANDLE_START] BT_STREAM_SBC-->app_ring_merge_start\\n\");\n          app_ring_merge_start();\n          // meida is done here\n          bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n        } else\n#endif\n        {\n          app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                                (uint8_t)APP_BT_SETTING_CLOSE, 0);\n          bt_media_set_current_media(BT_STREAM_MEDIA);\n          app_audio_sendrequest(APP_PLAY_BACK_AUDIO,\n                                (uint8_t)APP_BT_SETTING_OPEN, media_id);\n        }\n#endif // #ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n      } else if (bt_media_get_current_media() & BT_STREAM_MEDIA) {\n        app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_OPEN,\n                              media_id);\n      } else if ((bt_media_get_current_media() & 0xFF) == 0) {\n        app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_OPEN,\n                              media_id);\n      } else {\n        ASSERT(0, \"media in sbc  current wrong\");\n      }\n    }\n    /// just play the media\n    else {\n      bt_media_set_current_media(BT_STREAM_MEDIA);\n      app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_OPEN,\n                            media_id);\n    }\n    break;\n#endif\n  case BT_STREAM_VOICE:\n#ifdef HFP_NO_PRERMPT\n    if (app_audio_manager_get_active_sco_num() != BT_DEVICE_NUM)\n      return;\n#endif\n    app_audio_manager_set_active_sco_num(device_id);\n\n#ifdef VOICE_DATAPATH\n    if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n      if (bt_media_get_current_media() & BT_STREAM_CAPTURE) {\n        app_audio_sendrequest(APP_BT_STREAM_VOICEPATH,\n                              (uint8_t)APP_BT_SETTING_CLOSE, 0);\n        bt_media_clear_current_media(BT_STREAM_CAPTURE);\n      }\n    }\n#endif\n#ifdef __AI_VOICE__\n    if (bt_media_is_media_active_by_type(BT_STREAM_AI_VOICE)) {\n      if (bt_media_get_current_media() & BT_STREAM_AI_VOICE) {\n        app_audio_sendrequest(APP_BT_STREAM_AI_VOICE,\n                              (uint8_t)APP_BT_SETTING_CLOSE, 0);\n        bt_media_clear_current_media(BT_STREAM_AI_VOICE);\n      }\n    }\n#endif\n#ifdef __THIRDPARTY\n    if (bt_media_is_media_active_by_type(BT_STREAM_THIRDPARTY_VOICE)) {\n      if (bt_media_get_current_media() & BT_STREAM_THIRDPARTY_VOICE) {\n        app_audio_sendrequest(APP_BT_STREAM_THIRDPARTY_VOICE,\n                              (uint8_t)APP_BT_SETTING_CLOSE, 0);\n        bt_media_clear_current_media(BT_STREAM_THIRDPARTY_VOICE);\n      }\n    }\n#endif\n\n#ifdef MEDIA_PLAYER_SUPPORT\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    /// clear the pending stop flag if it is set\n    audio_prompt_clear_pending_stream(PENDING_TO_STOP_A2DP_STREAMING);\n#endif\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n      // if call is active ,so disable media report\n      if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n        if (bt_media_get_current_media() & BT_STREAM_MEDIA) {\n          if (app_play_audio_get_aud_id() == AUD_ID_BT_CALL_INCOMING_NUMBER) {\n            // if meida is open ,close media clear all media type\n            TRACE_AUD_MGR_I(\"[HANDLE_START] call active so start sco and stop \"\n                            \"media report\\n\");\n#ifdef __AUDIO_QUEUE_SUPPORT__\n            app_audio_list_clear();\n#endif\n            app_audio_sendrequest(APP_PLAY_BACK_AUDIO,\n                                  (uint8_t)APP_BT_SETTING_CLOSE, 0);\n            bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n            bt_media_set_current_media(BT_STREAM_VOICE);\n            app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                                  (uint8_t)APP_BT_SETTING_OPEN, 0);\n          }\n        }\n      } else {\n        ////call is not active so media report continue\n      }\n    } else\n#endif\n        if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n      /// if sbc is open  stop sbc\n      if (bt_media_get_current_media() & BT_STREAM_SBC) {\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)APP_BT_SETTING_CLOSE, 0);\n      }\n      ////start voice stream\n      bt_media_set_current_media(BT_STREAM_VOICE);\n      app_audio_sendrequest_param(APP_BT_STREAM_HFP_PCM,\n                                  (uint8_t)APP_BT_SETTING_OPEN, 0,\n                                  APP_SYSFREQ_104M);\n    } else {\n      // voice is open already so do nothing\n      if (bt_media_get_current_media() & BT_STREAM_VOICE) {\n#if defined(__BT_ONE_BRING_TWO__)\n        if (bt_get_sco_number() > 1\n#ifdef CHIP_BEST1000\n            && hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2\n#endif\n        ) {\n          app_audio_manager_swap_sco(device_id);\n#if defined(__HF_KEEP_ONE_ALIVE__)\n          if (btif_hf_check_AudioConnect_status(\n                  app_bt_device.hf_channel[other_device_id])) {\n            TRACE_AUD_MGR_I(\"[MEDIA_START] Disconnect another AudioLink\");\n            btif_hf_disc_audio_link(app_bt_device.hf_channel[other_device_id]);\n          }\n#endif\n        }\n#endif\n      } else {\n        bt_media_set_current_media(BT_STREAM_VOICE);\n        app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                              (uint8_t)APP_BT_SETTING_OPEN, 0);\n      }\n    }\n\n    break;\n#ifdef AUDIO_LINEIN\n  case BT_STREAM_LINEIN:\n    if (!bt_media_is_media_active_by_type(BT_STREAM_SBC | BT_STREAM_MEDIA |\n                                          BT_STREAM_VOICE)) {\n      app_audio_sendrequest(APP_PLAY_LINEIN_AUDIO, (uint8_t)APP_BT_SETTING_OPEN,\n                            0);\n      bt_media_set_current_media(BT_STREAM_LINEIN);\n    }\n    break;\n#endif\n\n  default:\n    ASSERT(0, \"bt_media_open ERROR TYPE\");\n    break;\n  }\n\n#if defined(RB_CODEC) || defined(VOICE_DATAPATH) ||                            \\\n    defined(MEDIA_PLAYER_SUPPORT) || defined(__AI_VOICE__)\nexit:\n  return;\n#endif\n}\n\n#ifdef RB_CODEC\n\nstatic bool bt_media_rbcodec_stop_process(uint16_t stream_type,\n                                          enum BT_DEVICE_ID_T device_id,\n                                          uint32_t ptr) {\n  int ret_SendReq2AudioThread = -1;\n  bt_media_clear_media_type(stream_type, device_id);\n  // if current stream is the stop one ,so stop it\n  if (bt_media_get_current_media() & BT_STREAM_RBCODEC) {\n    ret_SendReq2AudioThread = app_audio_sendrequest(\n        APP_BT_STREAM_RBCODEC, (uint8_t)APP_BT_SETTING_CLOSE, ptr);\n    bt_media_clear_current_media(BT_STREAM_RBCODEC);\n    TRACE_AUD_MGR_I(\"[RBCODEC][STOPED]\");\n  }\n\n  if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n    enum BT_DEVICE_ID_T sbc_id =\n        bt_media_get_active_device_by_type(BT_STREAM_SBC);\n    TRACE_AUD_MGR_I(\"[RBCODEC][STOPED] sbc_id %d\", sbc_id);\n    if (sbc_id < BT_DEVICE_NUM) {\n      bt_meida.media_curr_sbc = sbc_id;\n    }\n  } else {\n    bt_meida.media_curr_sbc = BT_DEVICE_NUM;\n  }\n\n  TRACE_AUD_MGR_I(\"[RBCODEC][STOPED] bt_meida.media_curr_sbc %d\",\n                  bt_meida.media_curr_sbc);\n\n  if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n  } else if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n    enum BT_DEVICE_ID_T sbc_id =\n        bt_media_get_active_device_by_type(BT_STREAM_SBC);\n    if (sbc_id < BT_DEVICE_NUM) {\n#ifdef __TWS__\n      bt_media_clear_media_type(BT_STREAM_SBC, sbc_id);\n      bt_media_clear_current_media(BT_STREAM_SBC);\n      notify_tws_player_status(APP_BT_SETTING_OPEN);\n#else\n      bt_parse_store_sbc_sample_rate(app_bt_device.sample_rate[sbc_id]);\n      ret_SendReq2AudioThread = app_audio_sendrequest(\n          APP_BT_STREAM_A2DP_SBC, (uint8_t)APP_BT_SETTING_OPEN, 0);\n      bt_media_set_current_media(BT_STREAM_SBC);\n#endif\n    }\n  } else if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n    // do nothing\n  }\n}\n#endif\n\n#ifdef VOICE_DATAPATH\nbool bt_media_voicepath_stop_process(uint16_t stream_type,\n                                     enum BT_DEVICE_ID_T device_id) {\n  int ret_SendReq2AudioThread __attribute__((unused));\n  ret_SendReq2AudioThread = -1;\n  bt_media_clear_media_type(stream_type, device_id);\n  // if current stream is the stop one ,so stop it\n  if (bt_media_get_current_media() & BT_STREAM_CAPTURE) {\n    ret_SendReq2AudioThread = app_audio_sendrequest(\n        APP_BT_STREAM_VOICEPATH, (uint8_t)APP_BT_SETTING_CLOSE, 0);\n    bt_media_clear_current_media(BT_STREAM_CAPTURE);\n    TRACE_AUD_MGR_I(\"[VOICEPATH][STOPED] Voice Path STOPED! \");\n  }\n\n  if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n    enum BT_DEVICE_ID_T sbc_id =\n        bt_media_get_active_device_by_type(BT_STREAM_SBC);\n    TRACE_AUD_MGR_I(\"[VOICEPATH][STOPED] sbc_id %d\", sbc_id);\n    if (sbc_id < BT_DEVICE_NUM) {\n      bt_meida.media_curr_sbc = sbc_id;\n    }\n  } else {\n    bt_meida.media_curr_sbc = BT_DEVICE_NUM;\n  }\n\n  TRACE_AUD_MGR_I(\"[VOICEPATH][STOPED] bt_meida.media_curr_sbc %d\",\n                  bt_meida.media_curr_sbc);\n\n  if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n  }\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n  else if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n    app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_OPEN, 0);\n    bt_media_set_current_media(BT_STREAM_MEDIA);\n  } else if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n    enum BT_DEVICE_ID_T sbc_id =\n        bt_media_get_active_device_by_type(BT_STREAM_SBC);\n    if (sbc_id < BT_DEVICE_NUM) {\n#ifdef __TWS__\n      bt_media_clear_media_type(BT_STREAM_SBC, sbc_id);\n      bt_media_clear_current_media(BT_STREAM_SBC);\n      notify_tws_player_status(APP_BT_SETTING_OPEN);\n#else\n      // bt_parse_store_sbc_sample_rate(app_bt_device.sample_rate[sbc_id]);\n      ret_SendReq2AudioThread = app_audio_sendrequest(\n          APP_BT_STREAM_A2DP_SBC, (uint8_t)APP_BT_SETTING_OPEN, 0);\n      bt_media_set_current_media(BT_STREAM_SBC);\n#endif\n    }\n  }\n#endif\n  return true;\n}\n#endif\n\n#ifdef __AI_VOICE__\nbool bt_media_ai_voice_stop_process(uint16_t stream_type,\n                                    enum BT_DEVICE_ID_T device_id) {\n  bt_media_clear_media_type(BT_STREAM_AI_VOICE, device_id);\n  // if current stream is the stop one ,stop it\n  if (bt_media_get_current_media() & BT_STREAM_AI_VOICE) {\n    app_audio_sendrequest(APP_BT_STREAM_AI_VOICE, (uint8_t)APP_BT_SETTING_CLOSE,\n                          0);\n    bt_media_clear_current_media(BT_STREAM_AI_VOICE);\n    TRACE_AUD_MGR_I(\"[AI_VOICE][STOPED]\");\n\n#ifdef IBRT\n    if (!bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n      app_ibrt_if_force_audio_retrigger();\n    }\n#endif\n  }\n\n#ifndef IBRT\n  enum BT_DEVICE_ID_T sbc_id = BT_DEVICE_NUM;\n  sbc_id = bt_media_get_active_device_by_type(BT_STREAM_SBC);\n  TRACE_AUD_MGR_I(\"[AI_VOICE][STOPED] sbc_id %d\", sbc_id);\n  bt_meida.media_curr_sbc = sbc_id;\n\n  TRACE_AUD_MGR_I(\"[AI_VOICE][STOPED] bt_meida.media_curr_sbc %d\",\n                  bt_meida.media_curr_sbc);\n\n  if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n  } else if (sbc_id < BT_DEVICE_NUM) {\n    if (!(bt_media_get_current_media() & BT_STREAM_SBC)) {\n      // bt_parse_store_sbc_sample_rate(app_bt_device.sample_rate[sbc_id]);\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)(APP_BT_SETTING_SETUP),\n                            (uint32_t)(app_bt_device.sample_rate[sbc_id] &\n                                       A2D_STREAM_SAMP_FREQ_MSK));\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n      bt_media_set_current_media(BT_STREAM_SBC);\n    }\n  }\n#endif\n  return true;\n}\n#endif\n\n#ifdef __THIRDPARTY\nbool bt_media_thirdparty_voice_stop_process(uint16_t stream_type,\n                                            enum BT_DEVICE_ID_T device_id) {\n  bt_media_clear_media_type(BT_STREAM_THIRDPARTY_VOICE, device_id);\n  // if current stream is the stop one ,stop it\n  if (bt_media_get_current_media() & BT_STREAM_THIRDPARTY_VOICE) {\n    app_audio_sendrequest(APP_BT_STREAM_THIRDPARTY_VOICE,\n                          (uint8_t)APP_BT_SETTING_CLOSE, 0);\n    bt_media_clear_current_media(BT_STREAM_THIRDPARTY_VOICE);\n    TRACE_AUD_MGR_I(\"THIRDPARTY VOICE STOPED! \");\n  }\n  return true;\n}\n#endif\n\n/*\n   bt_media_stop function is called to stop media by app or media play callback\n   sbc is just stop by a2dp stream suspend or close\n   voice is just stop by hfp audio disconnect\n   media is stop by media player finished call back\n\n*/\nvoid bt_media_stop(uint16_t stream_type, enum BT_DEVICE_ID_T device_id) {\n  TRACE_AUD_MGR_I(\"[HANDLE_STOP] type= 0x%x->:%s, device id = 0x%x\",\n                  stream_type, strmtype2str(stream_type), device_id);\n#ifdef __BT_ONE_BRING_TWO__\n  TRACE_AUD_MGR_I(\"[HANDLE_STOP] media_active[0] = 0x%x->:%s\",\n                  bt_meida.media_active[0],\n                  strmtype2str(bt_meida.media_active[0]));\n  TRACE_AUD_MGR_I(\"[HANDLE_STOP] media_active[1] = 0x%x->:%s\",\n                  bt_meida.media_active[1],\n                  strmtype2str(bt_meida.media_active[1]));\n  TRACE_AUD_MGR_I(\"[HANDLE_STOP] curr_active_media = 0x%x->:%s\",\n                  bt_meida.curr_active_media,\n                  strmtype2str(bt_meida.curr_active_media));\n#else\n  TRACE_AUD_MGR_I(\"[HANDLE_STOP] media_active = 0x%x->:%s\",\n                  bt_meida.media_active[0],\n                  strmtype2str(bt_meida.media_active[0]));\n  TRACE_AUD_MGR_I(\"[HANDLE_STOP] curr_active_media = 0x%x->:%s\",\n                  bt_meida.curr_active_media,\n                  strmtype2str(bt_meida.curr_active_media));\n#endif\n\n  if (!bt_media_is_media_active_by_device(stream_type, device_id) &&\n      !(bt_media_get_current_media() & stream_type)) {\n    return;\n  }\n\n  switch (stream_type) {\n#ifdef VOICE_DATAPATH\n  case BT_STREAM_CAPTURE:\n    bt_media_voicepath_stop_process(stream_type, device_id);\n    break;\n#endif\n#ifdef __AI_VOICE__\n  case BT_STREAM_AI_VOICE:\n    bt_media_ai_voice_stop_process(stream_type, device_id);\n    break;\n#endif\n#ifdef __THIRDPARTY\n  case BT_STREAM_THIRDPARTY_VOICE:\n    bt_media_thirdparty_voice_stop_process(stream_type, device_id);\n    break;\n#endif\n\n  case BT_STREAM_SBC: {\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    if (!audio_prompt_check_on_stopping_stream(PENDING_TO_STOP_A2DP_STREAMING,\n                                               device_id)) {\n      TRACE_AUD_MGR_I(\"[HANDLE_STOP] Pending stop BT_STREAM_SBC\");\n      return;\n    }\n\n#else\n    if (app_ring_merge_isrun()) {\n      TRACE_AUD_MGR_I(\"[HANDLE_STOP] pending BT_STREAM_SBC\");\n      app_ring_merge_save_pending_start_stream_op(\n          PENDING_TO_STOP_A2DP_STREAMING, device_id);\n      return;\n    }\n#endif\n\n    uint8_t media_pre_sbc = bt_meida.media_curr_sbc;\n    TRACE_AUD_MGR_I(\"[HANDLE_STOP] SBC STOPPING id:%d/%d\",\n                    bt_meida.media_curr_sbc, device_id);\n\n    ////if current media is sbc ,stop the sbc streaming\n    bt_media_clear_media_type(stream_type, device_id);\n\n    // if current stream is the stop one ,so stop it\n    if ((bt_media_get_current_media() & BT_STREAM_SBC)\n#if !defined(IBRT)\n        && bt_meida.media_curr_sbc == device_id\n#endif\n    ) {\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)APP_BT_SETTING_CLOSE, 0);\n      bt_media_clear_current_media(BT_STREAM_SBC);\n      TRACE_AUD_MGR_I(\"[HANDLE_STOP] SBC STOPED!\");\n    }\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n      enum BT_DEVICE_ID_T sbc_id =\n          bt_media_get_active_device_by_type(BT_STREAM_SBC);\n      if (sbc_id < BT_DEVICE_NUM) {\n        bt_meida.media_curr_sbc = sbc_id;\n      }\n    } else {\n      bt_meida.media_curr_sbc = BT_DEVICE_NUM;\n    }\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n\n    } else if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n      // do nothing\n    }\n#ifdef VOICE_DATAPATH\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n    else if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n      // do nothing\n    }\n#endif\n#endif\n    else if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n      enum BT_DEVICE_ID_T sbc_id =\n          bt_media_get_active_device_by_type(BT_STREAM_SBC);\n      if (sbc_id < BT_DEVICE_NUM &&\n          (media_pre_sbc != bt_meida.media_curr_sbc)) {\n        app_audio_manager_switch_a2dp(sbc_id);\n        bt_media_set_current_media(BT_STREAM_SBC);\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)(APP_BT_SETTING_SETUP),\n                              (uint32_t)(app_bt_device.sample_rate[sbc_id] &\n                                         A2D_STREAM_SAMP_FREQ_MSK));\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)APP_BT_SETTING_OPEN, 0);\n      }\n    }\n  } break;\n#ifdef MEDIA_PLAYER_SUPPORT\n  case BT_STREAM_MEDIA:\n    bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n\n    if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n      // also have media report so do nothing\n    } else if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n      if (bt_media_get_current_media() & BT_STREAM_VOICE) {\n        // do nothing\n      } else if (bt_media_get_current_media() & BT_STREAM_MEDIA) {\n        /// media report is end ,so goto voice\n        uint8_t curr_sco_id;\n        curr_sco_id = app_audio_manager_get_active_sco_num();\n        if (curr_sco_id != BT_DEVICE_NUM) {\n          bt_media_set_media_type(BT_STREAM_VOICE,\n                                  (enum BT_DEVICE_ID_T)curr_sco_id);\n          bt_media_set_current_media(BT_STREAM_VOICE);\n#ifdef __BT_ONE_BRING_TWO__\n          app_audio_manager_swap_sco((enum BT_DEVICE_ID_T)curr_sco_id);\n#endif\n          app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                                (uint8_t)APP_BT_SETTING_OPEN, 0);\n        }\n      }\n\n    } else if (btapp_hfp_is_call_active()) {\n      // do nothing\n    }\n\n#ifdef VOICE_DATAPATH\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n    else if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n      app_audio_sendrequest(APP_BT_STREAM_VOICEPATH,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n      bt_media_set_current_media(BT_STREAM_CAPTURE);\n    }\n#endif\n#endif\n#ifdef __AI_VOICE__\n    else if (bt_media_is_media_active_by_type(BT_STREAM_AI_VOICE) ||\n             ai_if_is_ai_stream_mic_open()) {\n      bt_media_clear_current_media(BT_STREAM_MEDIA);\n      if (bt_media_is_media_active_by_type(BT_STREAM_AI_VOICE) &&\n          !(bt_media_get_current_media() & BT_STREAM_AI_VOICE)) {\n        app_audio_sendrequest(APP_BT_STREAM_AI_VOICE,\n                              (uint8_t)APP_BT_SETTING_OPEN, 0);\n        bt_media_set_current_media(BT_STREAM_AI_VOICE);\n      }\n    }\n#endif\n    else if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n      /// if another device is also in sbc mode\n      enum BT_DEVICE_ID_T sbc_id = bt_media_get_active_sbc_device();\n      bt_media_set_media_type(BT_STREAM_SBC, sbc_id);\n      app_audio_manager_switch_a2dp(sbc_id);\n      bt_media_set_current_media(BT_STREAM_SBC);\n\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)(APP_BT_SETTING_SETUP),\n                            (uint32_t)(app_bt_device.sample_rate[sbc_id] &\n                                       A2D_STREAM_SAMP_FREQ_MSK));\n\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n    } else {\n      // have no meida task,so goto idle\n      bt_media_set_current_media(0);\n    }\n    break;\n#endif\n  case BT_STREAM_VOICE:\n\n    if (!bt_media_is_media_active_by_device(BT_STREAM_VOICE, device_id) ||\n        !(bt_media_get_current_media() & BT_STREAM_VOICE)) {\n      TRACE_AUD_MGR_I(\"[HANDLE_STOP] bt_media_stop already stop\");\n      bt_media_clear_media_type(stream_type, device_id);\n      return;\n    }\n\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    if (!audio_prompt_check_on_stopping_stream(PENDING_TO_STOP_SCO_STREAMING,\n                                               device_id)) {\n      return;\n    }\n\n#else\n    if (app_ring_merge_isrun()) {\n      TRACE_AUD_MGR_I(\"[HANDLE_STOP] bt_media_stop pending BT_STREAM_VOICE\");\n      app_ring_merge_save_pending_start_stream_op(PENDING_TO_STOP_SCO_STREAMING,\n                                                  device_id);\n      return;\n    }\n#endif\n\n    app_audio_manager_set_active_sco_num(BT_DEVICE_NUM);\n    bt_media_clear_media_type(stream_type, device_id);\n\n#ifdef MEDIA_PLAYER_SUPPORT\n    if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n      if (bt_media_get_current_media() & BT_STREAM_MEDIA) {\n        // do nothing\n      }\n\n#ifdef VOICE_DATAPATH\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n      else if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n        bt_media_clear_all_media_type();\n        app_audio_sendrequest(APP_BT_STREAM_VOICEPATH,\n                              (uint8_t)APP_BT_SETTING_OPEN, 0);\n        bt_media_set_current_media(BT_STREAM_CAPTURE);\n      }\n#endif\n#endif\n      else if (bt_media_get_current_media() & BT_STREAM_VOICE) {\n        TRACE_AUD_MGR_W(\"[HANDLE_STOP] voice and media is all on,media should \"\n                        \"be the current media\");\n        if (!bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n          app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                                (uint8_t)APP_BT_SETTING_CLOSE, 0);\n        }\n      } else if (bt_media_get_current_media() & BT_STREAM_SBC) {\n        TRACE_AUD_MGR_W(\"[HANDLE_STOP] voice and media is all on,media should \"\n                        \"be the current media\");\n        if (!bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n          app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                                (uint8_t)APP_BT_SETTING_CLOSE, 0);\n        }\n      }\n    } else\n#endif\n        if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n#ifdef __BT_ONE_BRING_TWO__\n      if (bt_get_sco_number() > 1\n#ifdef CHIP_BEST1000\n          && hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2\n#endif\n      ) {\n        TRACE_AUD_MGR_W(\n            \"[HANDLE_STOP] bt_media_stop, but another soc need connect\");\n        enum BT_DEVICE_ID_T voice_dev_id =\n            bt_media_get_active_device_by_type(BT_STREAM_VOICE);\n#ifdef HFP_NO_PRERMPT\n        app_audio_manager_set_active_sco_num(voice_dev_id);\n#else\n        app_audio_manager_swap_sco(voice_dev_id);\n#ifdef __HF_KEEP_ONE_ALIVE__\n        enum BT_DEVICE_ID_T other_voice_dev_id =\n            (voice_dev_id == BT_DEVICE_ID_1) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n        ;\n        if (btif_hf_check_AudioConnect_status(\n                app_bt_device.hf_channel[other_voice_dev_id])) {\n          TRACE_AUD_MGR_I(\"[HANDLE_STOP] Disconnect another AudioLink\");\n          app_bt_HF_DisconnectAudioLink(\n              app_bt_device.hf_channel[other_voice_dev_id]);\n        }\n#endif\n#endif\n      }\n      bt_media_set_current_media(BT_STREAM_VOICE);\n#endif\n    } else if (btapp_hfp_is_call_active()) {\n      TRACE_AUD_MGR_I(\"[HANDLE_STOP] stop in HF_CALL_ACTIVE and no sco need\");\n      bt_media_set_current_media(0);\n      app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                            (uint8_t)APP_BT_SETTING_CLOSE, 0);\n      bt_media_clear_media_type(BT_STREAM_VOICE, device_id);\n      {\n        enum BT_DEVICE_ID_T sbc_id = bt_media_get_active_sbc_device();\n        if (sbc_id < BT_DEVICE_NUM) {\n          app_audio_manager_switch_a2dp(sbc_id);\n          bt_media_set_current_media(BT_STREAM_SBC);\n          app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                                (uint8_t)(APP_BT_SETTING_SETUP),\n                                (uint32_t)(app_bt_device.sample_rate[sbc_id] &\n                                           A2D_STREAM_SAMP_FREQ_MSK));\n          app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                                (uint8_t)APP_BT_SETTING_OPEN, 0);\n        }\n      }\n    }\n#ifdef VOICE_DATAPATH\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n    else if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n      app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                            (uint8_t)APP_BT_SETTING_CLOSE, 0);\n      app_audio_sendrequest(APP_BT_STREAM_VOICEPATH,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n      bt_media_set_current_media(BT_STREAM_CAPTURE);\n    }\n#endif\n#endif\n    else if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n      /// if another device is also in sbc mode\n      enum BT_DEVICE_ID_T sbc_id = bt_media_get_active_sbc_device();\n      if (sbc_id < BT_DEVICE_NUM /*&& device_id == sbc_id*/) {\n        app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                              (uint8_t)APP_BT_SETTING_CLOSE, 0);\n        app_audio_manager_switch_a2dp(sbc_id);\n        bt_media_set_current_media(BT_STREAM_SBC);\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)(APP_BT_SETTING_SETUP),\n                              (uint32_t)(app_bt_device.sample_rate[sbc_id] &\n                                         A2D_STREAM_SAMP_FREQ_MSK));\n        app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                              (uint8_t)APP_BT_SETTING_OPEN, 0);\n      }\n    } else {\n      bt_media_set_current_media(0);\n      app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                            (uint8_t)APP_BT_SETTING_CLOSE, 0);\n    }\n\n#if ISOLATED_AUDIO_STREAM_ENABLED\n#ifdef VOICE_DATAPATH\n    if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n      app_audio_sendrequest(APP_BT_STREAM_VOICEPATH,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n      bt_media_set_current_media(BT_STREAM_CAPTURE);\n    }\n#endif\n#endif\n#ifdef __THIRDPARTY\n    if (bt_media_is_media_active_by_type(BT_STREAM_THIRDPARTY_VOICE)) {\n      app_audio_sendrequest(APP_BT_STREAM_THIRDPARTY_VOICE,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n      bt_media_set_current_media(BT_STREAM_THIRDPARTY_VOICE);\n    }\n#endif\n    break;\n#ifdef RB_CODEC\n  case BT_STREAM_RBCODEC:\n    bt_media_rbcodec_stop_process(stream_type, device_id, 0);\n    break;\n#endif\n#ifdef AUDIO_LINEIN\n  case BT_STREAM_LINEIN:\n    if (bt_media_is_media_active_by_type(BT_STREAM_LINEIN)) {\n      app_audio_sendrequest(APP_PLAY_LINEIN_AUDIO,\n                            (uint8_t)APP_BT_SETTING_CLOSE, 0);\n      if (bt_media_get_current_media() & BT_STREAM_LINEIN)\n        bt_media_set_current_media(0);\n\n      bt_media_clear_media_type(stream_type, device_id);\n    }\n    break;\n#endif\n  default:\n    ASSERT(0, \"[HANDLE_STOP] ERROR TYPE: %x\", stream_type);\n    break;\n  }\n#ifdef __BT_ONE_BRING_TWO__\n  TRACE_AUD_MGR_I(\n      \"[HANDLE_STOP] end media_active = %x,%x,curr_active_media = %x\",\n      bt_meida.media_active[0], bt_meida.media_active[1],\n      bt_meida.curr_active_media);\n#else\n  TRACE_AUD_MGR_I(\"[HANDLE_STOP] end media_active = %x%s\",\n                  bt_meida.media_active[0],\n                  strmtype2str(bt_meida.media_active[0]));\n  TRACE_AUD_MGR_I(\"[HANDLE_STOP] end curr_active_media = %x%s\",\n                  bt_meida.curr_active_media,\n                  strmtype2str(bt_meida.curr_active_media));\n#endif\n}\n\nvoid app_media_stop_media(uint16_t stream_type, enum BT_DEVICE_ID_T device_id) {\n#ifdef MEDIA_PLAYER_SUPPORT\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n  audio_prompt_stop_playing();\n#endif\n\n  if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA) ||\n      app_audio_list_playback_exist()) {\n#ifdef __AUDIO_QUEUE_SUPPORT__\n    ////should have no sbc\n    app_audio_list_clear();\n#endif\n    if (bt_media_get_current_media() & BT_STREAM_MEDIA) {\n      TRACE_AUD_MGR_I(\"[STOP_MEDIA]\");\n      // bt_media_set_current_media(0);\n      app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_CLOSE,\n                            0);\n    }\n    bt_media_clear_media_type(BT_STREAM_MEDIA, device_id);\n    if (bt_media_is_media_active_by_type(BT_STREAM_VOICE)) {\n      enum BT_DEVICE_ID_T currScoId = BT_DEVICE_NUM;\n      currScoId = (enum BT_DEVICE_ID_T)app_audio_manager_get_active_sco_num();\n\n      if (currScoId == BT_DEVICE_NUM) {\n        for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n          if (bt_media_is_media_active_by_device(BT_STREAM_VOICE,\n                                                 (enum BT_DEVICE_ID_T)i)) {\n            currScoId = device_id;\n            break;\n          }\n        }\n      }\n\n      TRACE_AUD_MGR_I(\"[STOP_MEDIA] try to resume sco:%d\", currScoId);\n      if (currScoId != BT_DEVICE_NUM) {\n        bt_media_set_media_type(BT_STREAM_VOICE, currScoId);\n        bt_media_set_current_media(BT_STREAM_VOICE);\n#ifdef __BT_ONE_BRING_TWO__\n        app_audio_manager_swap_sco(currScoId);\n#endif\n        app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                              (uint8_t)APP_BT_SETTING_OPEN, 0);\n      }\n    }\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n#ifdef VOICE_DATAPATH\n    else if (bt_media_is_media_active_by_type(BT_STREAM_CAPTURE)) {\n      app_audio_sendrequest(APP_BT_STREAM_VOICEPATH,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n      bt_media_set_current_media(BT_STREAM_CAPTURE);\n    }\n#endif\n#endif\n#ifdef __AI_VOICE__\n    else if (bt_media_is_media_active_by_type(BT_STREAM_AI_VOICE)) {\n      if ((bt_media_get_current_media() & BT_STREAM_AI_VOICE) == 0) {\n        app_audio_sendrequest(APP_BT_STREAM_AI_VOICE,\n                              (uint8_t)APP_BT_SETTING_OPEN, 0);\n        bt_media_set_current_media(BT_STREAM_AI_VOICE);\n      }\n    }\n#endif\n    else if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n      enum BT_DEVICE_ID_T sbc_id = bt_media_get_active_sbc_device();\n      bt_media_set_media_type(BT_STREAM_SBC, device_id);\n      app_audio_manager_switch_a2dp(sbc_id);\n      bt_media_set_current_media(BT_STREAM_SBC);\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)(APP_BT_SETTING_SETUP),\n                            (uint32_t)(app_bt_device.sample_rate[sbc_id] &\n                                       A2D_STREAM_SAMP_FREQ_MSK));\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n    }\n  }\n#endif\n}\n\nvoid bt_media_switch_to_voice(uint16_t stream_type,\n                              enum BT_DEVICE_ID_T device_id) {\n  TRACE_AUD_MGR_I(\"[SW2VOICE] stream_type= 0x%x,device_id=0x%x \", stream_type,\n                  device_id);\n#ifdef __BT_ONE_BRING_TWO__\n  TRACE_AUD_MGR_I(\n      \"[SW2VOICE] media_active = 0x%x,0x%x,curr_active_media = 0x%x\",\n      bt_meida.media_active[0], bt_meida.media_active[1],\n      bt_meida.curr_active_media);\n#else\n  TRACE_AUD_MGR_I(\"[SW2VOICE] media_active = 0x%x,curr_active_media = 0x%x\",\n                  bt_meida.media_active[0], bt_meida.curr_active_media);\n\n#endif\n\n  /// already in voice ,so return\n  if (bt_media_get_current_media() & BT_STREAM_VOICE) {\n#ifndef HFP_NO_PRERMPT\n#ifdef __BT_ONE_BRING_TWO__\n    if (!bt_media_is_media_active_by_device(BT_STREAM_VOICE, device_id)) {\n      app_audio_manager_swap_sco(device_id);\n    }\n#ifdef __HF_KEEP_ONE_ALIVE__\n    enum BT_DEVICE_ID_T other_device_id =\n        (device_id == BT_DEVICE_ID_1) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n    if (btif_hf_check_AudioConnect_status(\n            app_bt_device.hf_channel[other_device_id])) {\n      TRACE_AUD_MGR_I(\"[SW2VOICE] Disconnect another AudioLink\");\n      btif_hf_disc_audio_link(app_bt_device.hf_channel[other_device_id]);\n    }\n#endif\n#endif\n#endif\n    return;\n  }\n  app_media_stop_media(stream_type, device_id);\n}\n\nvoid app_media_update_media(uint16_t stream_type,\n                            enum BT_DEVICE_ID_T device_id) {\n  TRACE_AUD_MGR_I(\"[UPDATE_MEDIA]\");\n\n#ifdef MEDIA_PLAYER_SUPPORT\n  if (bt_media_is_media_active_by_type(BT_STREAM_MEDIA)) {\n    // do nothing\n    TRACE_AUD_MGR_I(\"[UPDATE_MEDIA] skip BT_STREAM_MEDIA\");\n  } else\n#endif\n      if (bt_media_is_media_active_by_type(BT_STREAM_VOICE) ||\n          btapp_hfp_is_call_active()) {\n    // do nothing\n    TRACE_AUD_MGR_I(\"[UPDATE_MEDIA] skip BT_STREAM_VOICE\");\n    TRACE_AUD_MGR_I(\"[UPDATE_MEDIA] DEBUG INFO actByVoc:%d %d %d\",\n                    bt_media_is_media_active_by_type(BT_STREAM_VOICE),\n                    btapp_hfp_is_call_active(), btapp_hfp_incoming_calls());\n  } else if (bt_media_is_media_active_by_type(BT_STREAM_SBC)) {\n#ifdef __AI_VOICE__\n    if (bt_media_is_media_active_by_type(BT_STREAM_AI_VOICE) ||\n        ai_if_is_ai_stream_mic_open()) {\n      TRACE_AUD_MGR_I(\"[UPDATE_MEDIA] there is a ai voice stream exist, skip\");\n      return;\n    }\n#endif\n    /// if another device is also in sbc mode\n    TRACE_AUD_MGR_I(\"[UPDATE_MEDIA] try to resume sbc\");\n    enum BT_DEVICE_ID_T sbc_id = bt_media_get_active_sbc_device();\n    if (0 == (bt_media_get_current_media() & BT_STREAM_SBC)) {\n      app_audio_manager_switch_a2dp(sbc_id);\n      bt_media_set_current_media(BT_STREAM_SBC);\n      app_audio_sendrequest(\n          APP_BT_STREAM_A2DP_SBC, (uint8_t)(APP_BT_SETTING_SETUP),\n          (uint32_t)(app_bt_device\n                         .sample_rate[sbc_id < BT_DEVICE_NUM ? sbc_id\n                                                             : BT_DEVICE_ID_1] &\n                     A2D_STREAM_SAMP_FREQ_MSK));\n      app_audio_sendrequest(APP_BT_STREAM_A2DP_SBC,\n                            (uint8_t)APP_BT_SETTING_OPEN, 0);\n    }\n  } else {\n    TRACE_AUD_MGR_I(\"[UPDATE_MEDIA] skip idle\");\n  }\n}\n\nint app_audio_manager_sco_status_checker(void) {\n  btif_cmgr_handler_t *cmgrHandler __attribute__((unused)) = NULL;\n\n  TRACE_AUD_MGR_I(\"[SCO_CHK] enter\");\n#if defined(CHIP_BEST1000) || defined(CHIP_BEST2000)\n  uint32_t scoTransmissionInterval_reg;\n  bt_bdaddr_t bdaddr;\n  if (bt_meida.media_curr_sco != BT_DEVICE_NUM) {\n    BTDIGITAL_REG_GET_FIELD(0xD0220120, 0xff, 24, scoTransmissionInterval_reg);\n    // cmgrHandler =\n    // &app_bt_device.hf_channel[bt_meida.media_curr_sco].cmgrHandler;\n    cmgrHandler = (btif_cmgr_handler_t *)btif_hf_get_chan_manager_handler(\n        app_bt_device.hf_channel[bt_meida.media_curr_sco]);\n    if (btif_cmgr_is_audio_up(cmgrHandler)) {\n      if (btif_cmgr_get_sco_connect_sco_link_type(cmgrHandler) ==\n          BTIF_BLT_ESCO) {\n        if (btif_cmgr_get_sco_connect_sco_rx_parms_sco_transmission_interval(\n                cmgrHandler) != scoTransmissionInterval_reg) {\n          BTDIGITAL_REG_SET_FIELD(\n              0xD0220120, 0xff, 24,\n              btif_cmgr_get_sco_connect_sco_rx_parms_sco_transmission_interval(\n                  cmgrHandler));\n        }\n      }\n    }\n    TRACE_AUD_MGR_I(\n        \"[SCO_CHK] curr:%d type:%d Intv:%d Intv_reg:%d\",\n        bt_meida.media_curr_sco,\n        btif_cmgr_get_sco_connect_sco_link_type(cmgrHandler),\n        btif_cmgr_get_sco_connect_sco_rx_parms_sco_transmission_interval(\n            cmgrHandler),\n        scoTransmissionInterval_reg);\n\n    // DUMP8(\"%02x \",\n    // app_bt_device.hf_channel[bt_meida.media_curr_sco].cmgrHandler.remDev->bdAddr.addr,\n    // 6);\n    btif_hf_get_remote_bdaddr(app_bt_device.hf_channel[bt_meida.media_curr_sco],\n                              &bdaddr);\n    DUMP8(\"%02x \", bdaddr.address, 6);\n#if defined(HFP_1_6_ENABLE)\n    uint32_t code_type;\n    uint32_t code_type_reg;\n    code_type = app_audio_manager_get_scocodecid();\n    code_type_reg = BTDIGITAL_REG(0xD0222000);\n    if (code_type == BTIF_HF_SCO_CODEC_MSBC) {\n      BTDIGITAL_REG(0xD0222000) = (code_type_reg & (~(7 << 1))) | (3 << 1);\n      TRACE_AUD_MGR_I(\"[SCO_CHK] MSBC REG:0xD0222000=0x%08x B:%d\",\n                      BTDIGITAL_REG(0xD0222000),\n                      (BTDIGITAL_REG(0xD0222000) >> 15) & 1);\n\n    } else {\n      BTDIGITAL_REG(0xD0222000) = (code_type_reg & (~(7 << 1))) | (2 << 1);\n      TRACE_AUD_MGR_I(\"[SCO_CHK] CVSD REG:0xD0222000=0x%08x B:%d\",\n                      BTDIGITAL_REG(0xD0222000),\n                      (BTDIGITAL_REG(0xD0222000) >> 15) & 1);\n    }\n#else\n    uint32_t code_type_reg;\n    code_type_reg = BTDIGITAL_REG(0xD0222000);\n    BTDIGITAL_REG(0xD0222000) = (code_type_reg & (~(7 << 1))) | (2 << 1);\n    TRACE_AUD_MGR_I(\"[SCO_CHK] CVSD REG:0xD0222000=0x%08x B:%d\",\n                    BTDIGITAL_REG(0xD0222000),\n                    (BTDIGITAL_REG(0xD0222000) >> 15) & 1);\n#endif\n  }\n#else\n#if defined(DEBUG)\n#if defined(IBRT)\n  if (app_tws_ibrt_mobile_link_connected())\n#endif\n  {\n    hf_chan_handle_t hf_chan =\n        app_bt_device.hf_channel[bt_meida.media_curr_sco];\n    if (hf_chan && (cmgrHandler = btif_hf_get_chan_manager_handler(hf_chan))) {\n      TRACE_AUD_MGR_I(\n          \"[SCO_CHK] curSco:%d type:%d Interval:%d\", bt_meida.media_curr_sco,\n          btif_cmgr_get_sco_connect_sco_link_type(cmgrHandler),\n          btif_cmgr_get_sco_connect_sco_rx_parms_sco_transmission_interval(\n              cmgrHandler));\n    }\n  }\n#endif\n#endif\n  TRACE_AUD_MGR_I(\"[SCO_CHK] exit\");\n  return 0;\n}\n\nint app_audio_manager_swap_sco(enum BT_DEVICE_ID_T id) {\n  if (bt_get_sco_number() <= 1)\n    return 0;\n#if defined(HFP_1_6_ENABLE)\n  uint8_t curr_sco_id;\n  curr_sco_id = app_audio_manager_get_active_sco_num();\n#endif\n  bt_bdaddr_t bdAdd;\n  uint16_t scohandle;\n  // if (HF_GetRemoteBDAddr(&app_bt_device.hf_channel[id], &bdAdd)){\n  if (btif_hf_get_remote_bdaddr(app_bt_device.hf_channel[id], &bdAdd)) {\n    // TRACE_AUD_MGR_I(\"[SCO SWAP]switch_sco to id:%d sco:%x\", id,\n    // app_bt_device.hf_channel[id].cmgrHandler.scoConnect);\n\n    // DUMP8(\"%02x \",\n    // app_bt_device.hf_channel[id].cmgrHandler.remDev->bdAddr.addr, 6);\n    // DUMP8(\"%02x \", bdAdd.address, 6);\n\n    /*\n    TRACE_AUD_MGR_I(\"[SCO_SWAP] state:%d type:%d hdl:%x \",\n    app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scostate,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoLinkType,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoHciHandle);\n    TRACE_AUD_MGR_I(\"[SCO_SWAP] tx[bw:%d rbw:%d ml:%d vs:%d rt:%d pktyp:%d]\",\n    app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoTxParms.transmitBandwidth,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoTxParms.receiveBandwidth,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoTxParms.maxLatency,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoTxParms.voiceSetting,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoTxParms.retransmissionEffort,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoTxParms.eScoPktType);\n\n    TRACE_AUD_MGR_I(\"[SCO_SWAP] rx[itv:%d ret:%d rxl:%d txl:%d]\",\n    app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoRxParms.scoTransmissionInterval,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoRxParms.scoRetransmissionWindow,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoRxParms.scoRxPacketLen,\n            app_bt_device.hf_channel[id].cmgrHandler.scoConnect->scoRxParms.scoTxPacketLen);\n            */\n\n    app_audio_manager_set_active_sco_num(id);\n    scohandle = btif_hf_get_sco_hcihandle(app_bt_device.hf_channel[id]);\n    if (scohandle != BTIF_HCI_INVALID_HANDLE) {\n      app_bt_Me_switch_sco(scohandle);\n    }\n    app_bt_stream_volume_ptr_update(bdAdd.address);\n    app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_SET,\n                                  app_bt_stream_volume_get_ptr()->hfp_vol);\n#if defined(HFP_1_6_ENABLE)\n    if (curr_sco_id != id) {\n      TRACE_AUD_MGR_I(\"[SCO_SWAP] try restart\");\n      bt_sco_player_forcemute(true, true);\n      app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                            (uint8_t)APP_BT_SETTING_RESTART, 0);\n    }\n#endif\n    app_audio_manager_sco_status_checker();\n  }\n  return 0;\n}\n\nint app_audio_manager_ctrl_volume_handle(APP_MESSAGE_BODY *msg_body) {\n  enum APP_AUDIO_MANAGER_VOLUME_CTRL_T volume_ctrl;\n  uint16_t volume_level = 0;\n\n  volume_ctrl = (enum APP_AUDIO_MANAGER_VOLUME_CTRL_T)msg_body->message_ptr;\n  volume_level = (uint16_t)msg_body->message_Param0;\n\n  switch (volume_ctrl) {\n  case APP_AUDIO_MANAGER_VOLUME_CTRL_SET:\n    app_bt_stream_volumeset(volume_level);\n    break;\n  case APP_AUDIO_MANAGER_VOLUME_CTRL_UP:\n    app_bt_stream_volumeup();\n    btapp_hfp_report_speak_gain();\n    btapp_a2dp_report_speak_gain();\n    break;\n  case APP_AUDIO_MANAGER_VOLUME_CTRL_DOWN:\n    app_bt_stream_volumedown();\n    btapp_hfp_report_speak_gain();\n    btapp_a2dp_report_speak_gain();\n    break;\n  default:\n    break;\n  }\n\n  return 0;\n}\n\nint app_audio_manager_tune_samplerate_ratio_handle(APP_MESSAGE_BODY *msg_body) {\n  enum AUD_STREAM_T stream = AUD_STREAM_NUM;\n  float ratio = 1.0f;\n\n  stream = (enum AUD_STREAM_T)msg_body->message_ptr;\n  ratio = *(float *)&msg_body->message_Param0;\n\n  TRACE_AUD_MGR_I(\"[TUNE] %d\", (int32_t)(ratio * 10000000));\n  af_codec_tune(stream, ratio);\n\n  return 0;\n}\n\nstatic bool app_audio_manager_init = false;\n\nint app_audio_manager_sendrequest(uint8_t massage_id, uint16_t stream_type,\n                                  uint8_t device_id, uint16_t aud_id) {\n  uint32_t audevt;\n  uint32_t msg0;\n  APP_MESSAGE_BLOCK msg;\n\n  if (app_audio_manager_init == false)\n    return -1;\n\n  // only allow prompt playing if powering-off is on-going\n  if (app_is_power_off_in_progress()) {\n    if ((APP_BT_STREAM_MANAGER_START == massage_id) &&\n        (BT_STREAM_MEDIA != stream_type)) {\n      return -1;\n    }\n  }\n\n  msg.mod_id = APP_MODUAL_AUDIO_MANAGE;\n  APP_AUDIO_MANAGER_SET_MESSAGE(audevt, massage_id, stream_type);\n  APP_AUDIO_MANAGER_SET_MESSAGE0(msg0, device_id, aud_id);\n  msg.msg_body.message_id = audevt;\n  msg.msg_body.message_ptr = msg0;\n  msg.msg_body.message_Param0 = msg0;\n  msg.msg_body.message_Param1 = 0;\n  msg.msg_body.message_Param2 = 0;\n  app_mailbox_put(&msg);\n\n  return 0;\n}\n\nint app_audio_manager_sendrequest_need_callback(uint8_t massage_id,\n                                                uint16_t stream_type,\n                                                uint8_t device_id,\n                                                uint16_t aud_id, uint32_t cb,\n                                                uint32_t cb_param) {\n  uint32_t audevt;\n  uint32_t msg0;\n  APP_MESSAGE_BLOCK msg;\n\n  if (app_audio_manager_init == false)\n    return -1;\n\n  msg.mod_id = APP_MODUAL_AUDIO_MANAGE;\n  APP_AUDIO_MANAGER_SET_MESSAGE(audevt, massage_id, stream_type);\n  APP_AUDIO_MANAGER_SET_MESSAGE0(msg0, device_id, aud_id);\n  msg.msg_body.message_id = audevt;\n  msg.msg_body.message_ptr = msg0;\n  msg.msg_body.message_Param0 = msg0;\n  msg.msg_body.message_Param1 = cb;\n  msg.msg_body.message_Param2 = cb_param;\n  app_mailbox_put(&msg);\n\n  return 0;\n}\n\nint app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_T volume_ctrl,\n                                  uint16_t volume_level) {\n  uint32_t audevt;\n  APP_MESSAGE_BLOCK msg;\n  osThreadId currThreadId;\n\n  if (app_audio_manager_init == false)\n    return -1;\n\n  msg.mod_id = APP_MODUAL_AUDIO_MANAGE;\n  APP_AUDIO_MANAGER_SET_MESSAGE(audevt, APP_BT_STREAM_MANAGER_CTRL_VOLUME, 0);\n  msg.msg_body.message_id = audevt;\n  msg.msg_body.message_ptr = (uint32_t)volume_ctrl;\n  msg.msg_body.message_Param0 = (uint32_t)volume_level;\n  msg.msg_body.message_Param1 = 0;\n  msg.msg_body.message_Param2 = 0;\n  currThreadId = osThreadGetId();\n  if (currThreadId == af_thread_tid_get() || currThreadId == app_os_tid_get()) {\n    app_audio_manager_ctrl_volume_handle(&msg.msg_body);\n  } else {\n    app_mailbox_put(&msg);\n  }\n  return 0;\n}\n\nint app_audio_manager_tune_samplerate_ratio(enum AUD_STREAM_T stream,\n                                            float ratio) {\n  uint32_t audevt;\n  APP_MESSAGE_BLOCK msg;\n  osThreadId currThreadId;\n\n  if (app_audio_manager_init == false)\n    return -1;\n\n  msg.mod_id = APP_MODUAL_AUDIO_MANAGE;\n  APP_AUDIO_MANAGER_SET_MESSAGE(audevt,\n                                APP_BT_STREAM_MANAGER_TUNE_SAMPLERATE_RATIO, 0);\n  msg.msg_body.message_id = audevt;\n  msg.msg_body.message_ptr = (uint32_t)stream;\n  msg.msg_body.message_Param0 = *(uint32_t *)∶\n  msg.msg_body.message_Param1 = 0;\n  msg.msg_body.message_Param2 = 0;\n\n  currThreadId = osThreadGetId();\n  if (currThreadId == af_thread_tid_get() || currThreadId == app_os_tid_get()) {\n    app_audio_manager_tune_samplerate_ratio_handle(&msg.msg_body);\n  } else {\n    app_mailbox_put(&msg);\n  }\n\n  return 0;\n}\n\n#if defined(VOICE_DATAPATH) && defined(MIX_MIC_DURING_MUSIC)\nstatic bool app_audio_handle_pre_processing(APP_MESSAGE_BODY *msg_body) {\n  uint16_t stream_type;\n  APP_AUDIO_MANAGER_GET_STREAM_TYPE(msg_body->message_id, stream_type);\n\n  bool isToResetCaptureStream = false;\n  if ((BT_STREAM_SBC == stream_type) || (BT_STREAM_MEDIA == stream_type)) {\n    if (app_audio_manager_capture_is_active()) {\n      isToResetCaptureStream = true;\n    }\n  }\n\n  if (isToResetCaptureStream) {\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_CAPTURE,\n                                  0, 0);\n\n    APP_MESSAGE_BLOCK msg;\n    msg.msg_body = *msg_body;\n    msg.mod_id = APP_MODUAL_AUDIO_MANAGE;\n\n    app_mailbox_put(&msg);\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n                                  BT_STREAM_CAPTURE, 0, 0);\n\n    return false;\n  } else {\n    return true;\n  }\n}\n#endif\n\nstatic int app_audio_manager_handle_process(APP_MESSAGE_BODY *msg_body) {\n  int nRet = 0;\n\n  APP_AUDIO_MANAGER_MSG_STRUCT aud_manager_msg;\n  APP_AUDIO_MANAGER_CALLBACK_T callback_fn = NULL;\n  uint32_t callback_param = 0;\n\n  if (app_audio_manager_init == false)\n    return -1;\n\n#if defined(VOICE_DATAPATH) && defined(MIX_MIC_DURING_MUSIC)\n  bool isContinue = app_audio_handle_pre_processing(msg_body);\n  if (!isContinue) {\n    return -1;\n  }\n#endif\n\n  APP_AUDIO_MANAGER_GET_ID(msg_body->message_id, aud_manager_msg.id);\n  APP_AUDIO_MANAGER_GET_STREAM_TYPE(msg_body->message_id,\n                                    aud_manager_msg.stream_type);\n  APP_AUDIO_MANAGER_GET_DEVICE_ID(msg_body->message_Param0,\n                                  aud_manager_msg.device_id);\n  APP_AUDIO_MANAGER_GET_AUD_ID(msg_body->message_Param0,\n                               aud_manager_msg.aud_id);\n  APP_AUDIO_MANAGER_GET_CALLBACK((uintptr_t)msg_body->message_Param1,\n                                 callback_fn);\n  APP_AUDIO_MANAGER_GET_CALLBACK_PARAM(msg_body->message_Param2,\n                                       callback_param);\n\n  TRACE_AUD_MGR_I(\"[handle_process] id %d %s type 0x%x %s\", aud_manager_msg.id,\n                  handleId2str(aud_manager_msg.id), aud_manager_msg.stream_type,\n                  strmtype2str(aud_manager_msg.stream_type));\n\n  switch (aud_manager_msg.id) {\n  case APP_BT_STREAM_MANAGER_START:\n    bt_media_start(aud_manager_msg.stream_type,\n                   (enum BT_DEVICE_ID_T)aud_manager_msg.device_id,\n                   aud_manager_msg.aud_id);\n    break;\n  case APP_BT_STREAM_MANAGER_STOP:\n    bt_media_stop(aud_manager_msg.stream_type,\n                  (enum BT_DEVICE_ID_T)aud_manager_msg.device_id);\n    break;\n  case APP_BT_STREAM_MANAGER_SWITCHTO_SCO:\n    bt_media_switch_to_voice(aud_manager_msg.stream_type,\n                             (enum BT_DEVICE_ID_T)aud_manager_msg.device_id);\n    break;\n  case APP_BT_STREAM_MANAGER_STOP_MEDIA:\n    app_media_stop_media(aud_manager_msg.stream_type,\n                         (enum BT_DEVICE_ID_T)aud_manager_msg.device_id);\n    break;\n  case APP_BT_STREAM_MANAGER_UPDATE_MEDIA:\n    app_media_update_media(aud_manager_msg.stream_type,\n                           (enum BT_DEVICE_ID_T)aud_manager_msg.device_id);\n    break;\n  case APP_BT_STREAM_MANAGER_SWAP_SCO:\n    app_audio_manager_swap_sco((enum BT_DEVICE_ID_T)aud_manager_msg.device_id);\n    break;\n  case APP_BT_STREAM_MANAGER_CTRL_VOLUME:\n    app_audio_manager_ctrl_volume_handle(msg_body);\n    break;\n  case APP_BT_STREAM_MANAGER_TUNE_SAMPLERATE_RATIO:\n    app_audio_manager_tune_samplerate_ratio_handle(msg_body);\n    break;\n  default:\n    break;\n  }\n  if (callback_fn) {\n    callback_fn(aud_manager_msg.id, callback_param);\n  }\n  return nRet;\n}\n\nvoid bt_media_volume_ptr_update_by_mediatype(uint16_t stream_type) {\n  bt_bdaddr_t *bdAdd = NULL;\n  bt_bdaddr_t temp;\n  btif_remote_device_t *remDev = NULL;\n  uint8_t id;\n\n  TRACE_AUD_MGR_I(\"[VOLUME_PTR] enter\");\n  if (stream_type & bt_media_get_current_media()) {\n    switch (stream_type) {\n    case BT_STREAM_SBC:\n      id = bt_meida.media_curr_sbc;\n      ASSERT(id < BT_DEVICE_NUM, \"INVALID_BT_DEVICE_NUM\");\n      remDev =\n          btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[id]);\n      if (remDev) {\n        bdAdd = btif_me_get_remote_device_bdaddr(remDev);\n        app_bt_stream_volume_ptr_update(bdAdd->address);\n      }\n      break;\n    case BT_STREAM_VOICE:\n      id = app_audio_manager_get_active_sco_num();\n      ASSERT(id < BT_DEVICE_NUM, \"INVALID_BT_DEVICE_NUM\");\n      // if (HF_GetRemoteBDAddr(&app_bt_device.hf_channel[id], &bdAdd)){\n      bdAdd = &temp;\n      if (btif_hf_get_remote_bdaddr(app_bt_device.hf_channel[id], bdAdd)) {\n        app_bt_stream_volume_ptr_update(bdAdd->address);\n      }\n      break;\n    case BT_STREAM_MEDIA:\n    default:\n      break;\n    }\n  }\n  TRACE_AUD_MGR_I(\"[VOLUME_PTR] exit\");\n}\n\nint app_audio_manager_set_active_sco_num(enum BT_DEVICE_ID_T id) {\n  bt_meida.media_curr_sco = id;\n  return 0;\n}\n\nint app_audio_manager_get_active_sco_num(void) {\n  return bt_meida.media_curr_sco;\n}\n\nhf_chan_handle_t *app_audio_manager_get_active_sco_chnl(void) {\n  int curr_sco;\n\n  curr_sco = app_audio_manager_get_active_sco_num();\n  if (curr_sco != BT_DEVICE_NUM) {\n    return &app_bt_device.hf_channel[curr_sco];\n  }\n  return NULL;\n}\n\n#if defined(HFP_1_6_ENABLE)\n#ifdef __BT_ONE_BRING_TWO__\nstatic uint16_t app_audio_manage_scocodecid[BT_DEVICE_NUM] = {\n    BTIF_HF_SCO_CODEC_CVSD, BTIF_HF_SCO_CODEC_CVSD};\n#else\nstatic uint16_t app_audio_manage_scocodecid[BT_DEVICE_NUM] = {\n    BTIF_HF_SCO_CODEC_CVSD};\n#endif\n\nint app_audio_manager_set_scocodecid(enum BT_DEVICE_ID_T dev_id,\n                                     uint16_t codec_id) {\n  app_audio_manage_scocodecid[dev_id] = codec_id;\n  return 0;\n}\n\nint app_audio_manager_get_scocodecid(void) {\n  int scocodecid = BTIF_HF_SCO_CODEC_NONE;\n  if (bt_meida.media_curr_sco != BT_DEVICE_NUM) {\n    scocodecid = app_audio_manage_scocodecid[bt_meida.media_curr_sco];\n  }\n  return scocodecid;\n}\n#endif\n\nint app_audio_manager_switch_a2dp(enum BT_DEVICE_ID_T id) {\n  bt_bdaddr_t *bdAdd = NULL;\n  btif_remote_device_t *remDev = NULL;\n\n#ifndef __MULTIPOINT_A2DP_PREEMPT__\n  if (bt_meida.media_curr_sbc == id) {\n    TRACE_AUD_MGR_I(\"[A2DP_SWITCH]the disconnected dev not working\");\n    return 0;\n  }\n#endif\n\n  remDev = btif_a2dp_get_remote_device(app_bt_device.a2dp_connected_stream[id]);\n  if (remDev) {\n    TRACE_AUD_MGR_I(\"[A2DP_SWITCH] switch_a2dp to id:%d\", id);\n    bdAdd = btif_me_get_remote_device_bdaddr(remDev);\n    app_bt_stream_volume_ptr_update(bdAdd->address);\n    bt_meida.media_curr_sbc = id;\n  }\n  return 0;\n}\n\nbool app_audio_manager_a2dp_is_active(enum BT_DEVICE_ID_T id) {\n  uint16_t media_type;\n  bool nRet = false;\n\n  media_type = bt_media_get_current_media();\n  if (media_type & BT_STREAM_SBC) {\n    if (bt_meida.media_curr_sbc == id) {\n      nRet = true;\n    }\n  }\n\n#ifndef BES_AUTOMATE_TEST\n  TRACE_AUD_MGR_I(\"[A2DP_ACTIVE] nRet:%d type:%d %d/%d\", nRet, media_type, id,\n                  bt_meida.media_curr_sbc);\n#endif\n  return nRet;\n}\n\nbool app_audio_manager_hfp_is_active(enum BT_DEVICE_ID_T id) {\n  uint16_t media_type;\n  bool nRet = false;\n\n  media_type = bt_media_get_current_media();\n  if (media_type & BT_STREAM_VOICE) {\n    if (bt_meida.media_curr_sco == id) {\n      nRet = true;\n    }\n  }\n\n#ifndef BES_AUTOMATE_TEST\n  TRACE_AUD_MGR_I(\"[SCO_ACTIVE] nRet:%d type:%d %d/%d\", nRet, media_type, id,\n                  bt_meida.media_curr_sco);\n#endif\n  return nRet;\n}\n\n#ifdef VOICE_DATAPATH\nbool app_audio_manager_capture_is_active(void) {\n  uint16_t media_type;\n  bool nRet = false;\n\n  media_type = bt_media_get_current_media();\n  if (media_type & BT_STREAM_CAPTURE) {\n    nRet = true;\n  }\n\n  return nRet;\n}\n#endif\n\nbool app_audio_manager_media_is_active(void) {\n  uint16_t media_type;\n  bool nRet = false;\n\n  media_type = bt_media_get_current_media();\n  if (media_type & BT_STREAM_MEDIA) {\n    nRet = true;\n  }\n\n  return nRet;\n}\n\nvoid app_audio_manager_open(void) {\n  if (app_audio_manager_init) {\n    return;\n  }\n  bt_meida.media_curr_sbc = BT_DEVICE_NUM;\n  bt_meida.media_curr_sco = BT_DEVICE_NUM;\n  bt_meida.curr_active_media = 0;\n  app_set_threadhandle(APP_MODUAL_AUDIO_MANAGE,\n                       app_audio_manager_handle_process);\n  app_audio_manager_init = true;\n\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n  audio_prompt_init_handler();\n#endif\n}\n\nvoid app_audio_manager_close(void) {\n  app_set_threadhandle(APP_MODUAL_AUDIO_MANAGE, NULL);\n  app_audio_manager_init = false;\n}\n\n#ifdef RB_CODEC\n\nstatic bool app_rbcodec_play_status = false;\n\nstatic bool app_rbplay_player_mode = false;\n\nbool app_rbplay_is_localplayer_mode(void) { return app_rbplay_player_mode; }\n\nbool app_rbplay_mode_switch(void) {\n  return (app_rbplay_player_mode = !app_rbplay_player_mode);\n}\n\nvoid app_rbplay_set_player_mode(bool isInPlayerMode) {\n  app_rbplay_player_mode = isInPlayerMode;\n}\n\nvoid app_rbcodec_ctr_play_onoff(bool on) {\n  TRACE_AUD_MGR_I(\"[RBCODEC] onoff %d ,turnon:%d \", app_rbcodec_play_status,\n                  on);\n\n  if (app_rbcodec_play_status == on)\n    return;\n  app_rbcodec_play_status = on;\n  if (on)\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n                                  BT_STREAM_RBCODEC, 0, 0);\n  else\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_RBCODEC,\n                                  0, 0);\n}\n\nvoid app_rbcodec_ctl_set_play_status(bool st) {\n  app_rbcodec_play_status = st;\n  TRACE_AUD_MGR_I(\"[RBCODEC] curr_status%d\", app_rbcodec_play_status);\n}\n\nbool app_rbcodec_get_play_status(void) {\n  TRACE_AUD_MGR_I(\"[RBCODEC] play_status:%d\", app_rbcodec_play_status);\n  return app_rbcodec_play_status;\n}\n\nvoid app_rbcodec_toggle_play_stop(void) {\n  if (app_rbcodec_get_play_status()) {\n    app_rbcodec_ctr_play_onoff(false);\n  } else {\n    app_rbcodec_ctr_play_onoff(true);\n  }\n}\n\nbool app_rbcodec_check_hfp_active(void) {\n  return (bool)bt_media_is_media_active_by_type(BT_STREAM_VOICE);\n}\n#endif\n\nvoid app_ibrt_sync_mix_prompt_req_handler(uint8_t *ptrParam,\n                                          uint16_t paramLen) {\n#ifdef TWS_PROMPT_SYNC\n  app_tws_cmd_sync_mix_prompt_req_handler(ptrParam, paramLen);\n#endif\n}\n\nvoid app_audio_decode_err_force_trigger(void) {\n#ifndef IBRT\n  trigger_media_play((AUD_ID_ENUM)AUDIO_ID_BT_MUTE, 0, false);\n#endif\n}\n"
  },
  {
    "path": "services/bt_app/app_bt_media_manager.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BT_MEDIA_MANAGER_H__\n#define __APP_BT_MEDIA_MANAGER_H__\n\n#include \"resources.h\"\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \"btapp.h\"\n\n#define  BT_STREAM_DIRECTION_OUT    0\n#define  BT_STREAM_DIRECTION_IN     1\n\n// direction is out\n#define  BT_STREAM_SBC          0x1\n#define  BT_STREAM_MEDIA        0x2\n#define  BT_STREAM_VOICE        0x4\n#ifdef AUDIO_LINEIN\n#define  BT_STREAM_LINEIN       0x8\n#endif\n#ifdef RB_CODEC\n#define  BT_STREAM_RBCODEC      0x10    //from rockbox decoder\n#endif\n\n// direction is in\n#ifdef VOICE_DATAPATH\n#define BT_STREAM_CAPTURE       0x100\n#endif\n\n#ifdef __AI_VOICE__\n#define BT_STREAM_AI_VOICE      0x200\n#endif\n\n#define BT_STREAM_THIRDPARTY_VOICE 0x400\n\n#define BT_STREAM_TYPE_MASK   (BT_STREAM_SBC | BT_STREAM_MEDIA | BT_STREAM_VOICE)\n\n\nenum APP_BT_MEDIA_MANAGER_ID_T {\n    APP_BT_STREAM_MANAGER_START = 0,\n    APP_BT_STREAM_MANAGER_STOP,\n    APP_BT_STREAM_MANAGER_SWITCHTO_SCO,\n    APP_BT_STREAM_MANAGER_STOP_MEDIA,\n    APP_BT_STREAM_MANAGER_UPDATE_MEDIA,\n    APP_BT_STREAM_MANAGER_SWAP_SCO,\n    APP_BT_STREAM_MANAGER_CTRL_VOLUME,\n    APP_BT_STREAM_MANAGER_TUNE_SAMPLERATE_RATIO,\n    APP_BT_STREAM_MANAGER_NUM,\n};\n\ntypedef struct {\n    uint8_t id;\n    uint16_t stream_type;\n    uint8_t device_id;\n    uint16_t aud_id;\n\n}APP_AUDIO_MANAGER_MSG_STRUCT;\n\nenum APP_AUDIO_MANAGER_VOLUME_CTRL_T {\n    APP_AUDIO_MANAGER_VOLUME_CTRL_SET = 0,\n    APP_AUDIO_MANAGER_VOLUME_CTRL_UP,\n    APP_AUDIO_MANAGER_VOLUME_CTRL_DOWN,\n    APP_AUDIO_MANAGER_VOLUME_CTRL_NUM,\n};\n\ntypedef void (*APP_AUDIO_MANAGER_CALLBACK_T)(uint32_t status, uint32_t param);\n\n#define APP_AUDIO_MANAGER_SET_MESSAGE(appevt, id, stream_type) (appevt = (((uint32_t)id&0xffff)<<16)|(stream_type&0xffff))\n#define APP_AUDIO_MANAGER_SET_MESSAGE0(appmsg, device_id,aud_id) (appmsg = (((uint32_t)device_id&0xffff)<<16)|(aud_id&0xffff))\n#define APP_AUDIO_MANAGER_GET_ID(appevt, id) (id = (appevt>>16)&0xffff)\n#define APP_AUDIO_MANAGER_GET_STREAM_TYPE(appevt, stream_type) (stream_type = appevt&0xffff)\n#define APP_AUDIO_MANAGER_GET_DEVICE_ID(appmsg, device_id) (device_id = (appmsg>>16)&0xffff)\n#define APP_AUDIO_MANAGER_GET_AUD_ID(appmsg, aud_id) (aud_id = appmsg&0xffff)\n#define APP_AUDIO_MANAGER_GET_CALLBACK(appmsg, callback) (callback = (APP_AUDIO_MANAGER_CALLBACK_T)appmsg)\n#define APP_AUDIO_MANAGER_GET_CALLBACK_PARAM(appmsg, param) (param = appmsg)\n\nint app_audio_manager_sendrequest(uint8_t massage_id,uint16_t stream_type, uint8_t device_id, uint16_t aud_id);\nint app_audio_manager_sendrequest_need_callback(\n                           uint8_t massage_id, uint16_t stream_type, uint8_t device_id, uint16_t aud_id, uint32_t cb, uint32_t cb_param);\nvoid app_audio_manager_open(void);\n\nvoid  bt_media_start(uint16_t stream_type,enum BT_DEVICE_ID_T device_id,uint16_t media_id);\nvoid bt_media_stop(uint16_t stream_type,enum BT_DEVICE_ID_T device_id);\nvoid bt_media_switch_to_voice(uint16_t stream_type,enum BT_DEVICE_ID_T device_id);\nuint16_t bt_media_get_media_active(enum BT_DEVICE_ID_T device_id);\nuint8_t bt_media_is_media_active_by_type(uint16_t media_type);\nvoid bt_media_volume_ptr_update_by_mediatype(uint16_t stream_type);\nint app_audio_manager_set_active_sco_num(enum BT_DEVICE_ID_T id);\nint app_audio_manager_get_active_sco_num(void);\nhf_chan_handle_t* app_audio_manager_get_active_sco_chnl(void);\nint app_audio_manager_swap_sco(enum BT_DEVICE_ID_T id);\nuint8_t bt_media_is_media_active_by_device(uint16_t media_type,enum BT_DEVICE_ID_T device_id);\nuint16_t bt_media_get_current_media(void);\nint app_audio_manager_sco_status_checker(void);\nint app_audio_manager_switch_a2dp(enum BT_DEVICE_ID_T id);\nbool app_audio_manager_a2dp_is_active(enum BT_DEVICE_ID_T id);\nbool app_audio_manager_capture_is_active(void);\nbool app_audio_manager_media_is_active(void);\nbool app_audio_manager_hfp_is_active(enum BT_DEVICE_ID_T id);\nint app_audio_manager_set_scocodecid(enum BT_DEVICE_ID_T dev_id, uint16_t codec_id);\nint app_audio_manager_get_scocodecid(void);\nbool bt_media_is_media_idle(void);\nuint8_t bt_media_device_enumerate_media_type_by_prior();\nvoid bt_media_clean_up(void);\n\nbool bt_media_is_media_active_by_sbc(void);\n#ifdef RB_CODEC\nbool app_rbplay_is_localplayer_mode(void);\nbool app_rbplay_mode_switch(void);\nvoid app_rbplay_set_player_mode(bool isInPlayerMode);\nvoid app_rbcodec_ctr_play_onoff(bool on );\nbool app_rbcodec_get_play_status(void);\nvoid app_rbcodec_toggle_play_stop(void);\n#endif\n\nvoid app_stop_a2dp_media_stream(uint8_t devId);\nvoid app_stop_sco_media_stream(uint8_t devId);\nint app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_T volume_ctrl, uint16_t volume_level);\nint app_audio_manager_tune_samplerate_ratio(enum AUD_STREAM_T stream, float ratio);\nbool bt_media_cur_is_bt_stream_media(void);\nbool bt_media_is_sbc_media_active(void);\nvoid bt_media_current_sbc_set(uint8_t id);\nvoid app_ibrt_sync_mix_prompt_req_handler(uint8_t* ptrParam, uint16_t paramLen);\nvoid app_audio_decode_err_force_trigger(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_bt_stream.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// #include \"mbed.h\"\n#include \n#include \n\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_bt_trace.h\"\n#include \"app_overlay.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n#include \"avdtp_i.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_overlay.h\"\n#include \"hal_timer.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"tgt_hardware.h\"\n#ifdef ANC_APP\n#include \"app_anc.h\"\n#endif\n#include \"anc_wnr.h\"\n#include \"bluetooth.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_codec.h\"\n#include \"hal_i2s.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \"resample_coef.h\"\n#ifdef MEDIA_PLAYER_SUPPORT\n#include \"app_media_player.h\"\n#include \"resources.h\"\n#endif\n#ifdef __FACTORY_MODE_SUPPORT__\n#include \"app_factory_audio.h\"\n#endif\n#ifdef TX_RX_PCM_MASK\n#include \"hal_chipid.h\"\n#endif\n\n#ifdef __IAG_BLE_INCLUDE__\n#include \"app_ble_mode_switch.h\"\n#endif\n\n#ifdef VOICE_DATAPATH\n#include \"app_voicepath.h\"\n#endif\n\n#if defined(__AI_VOICE__) || defined(BISTO_ENABLED)\n#include \"app_ai_if.h\"\n#include \"app_ai_voice.h\"\n#endif\n\n#ifdef AI_AEC_CP_ACCEL\n#include \"app_ai_algorithm.h\"\n#endif\n\n#include \"app_a2dp.h\"\n#include \"app_bt.h\"\n#include \"app_hfp.h\"\n#include \"app_ring_merge.h\"\n#include \"audio_dump.h\"\n#include \"audio_process.h\"\n#include \"besbt.h\"\n#include \"bt_drv.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"bt_xtal_sync.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hal_chipid.h\"\n#include \"math.h\"\n#include \"os_api.h\"\n\n#ifdef WL_DET\n#include \"app_mic_alg.h\"\n#endif\n\n#if (A2DP_DECODER_VER == 2)\n#include \"a2dp_decoder.h\"\n#endif\n#if defined(__AUDIO_SPECTRUM__)\n#include \"audio_spectrum.h\"\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n#include \"lis25ba.h\"\n#include \"speech_utils.h\"\n#include \"tdm_stream.h\"\n#endif\n\n#if defined(ANC_NOISE_TRACKER)\n#include \"noise_tracker.h\"\n#include \"noise_tracker_callback.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_ibrt_a2dp.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_rssi.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_audio_analysis.h\"\n#include \"app_tws_ibrt_audio_sync.h\"\n#undef MUSIC_DELAY_CONTROL\n#endif\n\n#if defined(AUDIO_ANC_FB_ADJ_MC)\n#include \"adj_mc.h\"\n#include \"fftfilt2.h\"\n#endif\n\n// NOTE: Modify parameters for your project.\n// #define A2DP_STREAM_AUDIO_DUMP\n\n#if defined(__SW_IIR_EQ_PROCESS__)\nstatic uint8_t audio_eq_sw_iir_index = 0;\nextern const IIR_CFG_T *const audio_eq_sw_iir_cfg_list[];\n#endif\n\n#if defined(__HW_FIR_EQ_PROCESS__)\nstatic uint8_t audio_eq_hw_fir_index = 0;\nextern const FIR_CFG_T *const audio_eq_hw_fir_cfg_list[];\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\nstatic uint8_t audio_eq_hw_dac_iir_index = 0;\nextern const IIR_CFG_T *const audio_eq_hw_dac_iir_cfg_list[];\n#endif\n\n#include \"audio_prompt_sbc.h\"\n\n#if defined(__HW_IIR_EQ_PROCESS__)\nstatic uint8_t audio_eq_hw_iir_index = 0;\nextern const IIR_CFG_T *const audio_eq_hw_iir_cfg_list[];\n#endif\n\n#if defined(HW_DC_FILTER_WITH_IIR)\n#include \"hw_codec_iir_process.h\"\n#include \"hw_filter_codec_iir.h\"\n\nhw_filter_codec_iir_cfg\n    POSSIBLY_UNUSED\n        adc_iir_cfg = {.bypass = 0,\n                       .iir_device = HW_CODEC_IIR_ADC,\n#if 1\n                       .iir_cfg =\n                           {.iir_filtes_l = {.iir_bypass_flag = 0,\n                                             .iir_counter = 2,\n                                             .iir_coef =\n                                                 {\n                                                     {{0.994406, -1.988812,\n                                                       0.994406},\n                                                      {1.000000,\n                                                       -1.988781, 0.988843}}, // iir_designer('highpass',\n                                                                              // 0, 20, 0.7,\n                                                                              // 16000);\n                                                     {{4.0, 0.0, 0.0}, {1.0, 0.0, 0.0}},\n                                                 }},\n                            .iir_filtes_r =\n                                {\n                                    .iir_bypass_flag = 0,\n                                    .iir_counter = 2,\n                                    .iir_coef =\n                                        {\n                                            {{0.994406, -1.988812, 0.994406},\n                                             {1.000000, -1.988781, 0.988843}},\n                                            {{4.0, 0.0, 0.0}, {1.0, 0.0, 0.0}},\n                                        }}}\n#else\n                       .iir_cfg = {.gain0 = 0,\n                                   .gain1 = 0,\n                                   .num = 1,\n                                   .param =\n                                       {\n                                           {IIR_TYPE_HIGH_PASS, 0, 20.0, 0.7},\n                                       }}\n#endif\n};\n\nhw_filter_codec_iir_state *hw_filter_codec_iir_st;\n#endif\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                       \\\n    defined(CHIP_BEST3003) || defined(CHIP_BEST1400) ||                        \\\n    defined(CHIP_BEST1402) || defined(CHIP_BEST1000) ||                        \\\n    defined(CHIP_BEST2000) || defined(CHIP_BEST3001) || defined(CHIP_BEST2001)\n\n#undef AUDIO_RESAMPLE_ANTI_DITHER\n\n#else\n#define AUDIO_RESAMPLE_ANTI_DITHER\n#endif\n\n#include \"audio_cfg.h\"\n\n// #define SCO_DMA_SNAPSHOT_DEBUG\n\nextern uint8_t bt_audio_get_eq_index(AUDIO_EQ_TYPE_T audio_eq_type,\n                                     uint8_t anc_status);\nextern uint32_t bt_audio_set_eq(AUDIO_EQ_TYPE_T audio_eq_type, uint8_t index);\nextern uint8_t bt_audio_updata_eq_for_anc(uint8_t anc_status);\n\n#include \"app_bt_media_manager.h\"\n\n#include \"hal_location.h\"\n#include \"string.h\"\n\n#include \"bt_drv_interface.h\"\n\n#include \"audio_resample_ex.h\"\n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || defined(CHIP_BEST2001)\n#define BT_INIT_XTAL_SYNC_FCAP_RANGE (0x1FF)\n#else\n#define BT_INIT_XTAL_SYNC_FCAP_RANGE (0xFF)\n#endif\n#define BT_INIT_XTAL_SYNC_MIN (20)\n#define BT_INIT_XTAL_SYNC_MAX                                                  \\\n  (BT_INIT_XTAL_SYNC_FCAP_RANGE - BT_INIT_XTAL_SYNC_MIN)\n\n#ifdef __THIRDPARTY\n#include \"app_thirdparty.h\"\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n#include \"anc_process.h\"\n\n#ifdef ANC_FB_MC_96KHZ\n#define DELAY_SAMPLE_MC (29 * 2)       //  2:ch\n#define SAMPLERATE_RATIO_THRESHOLD (4) // 384 = 96*4\n#else\n#define DELAY_SAMPLE_MC (31 * 2)       //  2:ch\n#define SAMPLERATE_RATIO_THRESHOLD (8) // 384 = 48*8\n#endif\n\nstatic int32_t delay_buf_bt[DELAY_SAMPLE_MC];\n#endif\n\n#ifdef ANC_APP\nstatic uint8_t anc_status_record = 0xff;\n#endif\n\n#if defined(SCO_DMA_SNAPSHOT)\n\n#ifdef PCM_FAST_MODE\n#define MASTER_MOBILE_BTCLK_OFFSET (4)\n#elif TX_RX_PCM_MASK\n#define MASTER_MOBILE_BTCLK_OFFSET (8)\n#else\n#define MASTER_MOBILE_BTCLK_OFFSET (4)\n#endif\n#define MASTER_MOBILE_BTCNT_OFFSET (MASTER_MOBILE_BTCLK_OFFSET * 625)\n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402) ||                        \\\n    defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A) ||                      \\\n    defined(CHIP_BEST2001)\n#define MUTE_PATTERN (0x55)\n#else\n#define MUTE_PATTERN (0x00)\n#endif\n\nextern void app_tws_ibrt_audio_mobile_clkcnt_get(uint32_t btclk, uint16_t btcnt,\n                                                 uint32_t *mobile_master_clk,\n                                                 uint16_t *mobile_master_cnt);\n\nstatic uint8_t *playback_buf_codecpcm;\nstatic uint32_t playback_size_codecpcm;\nstatic uint8_t *capture_buf_codecpcm;\nstatic uint32_t capture_size_codecpcm;\n\nstatic uint8_t *playback_buf_btpcm;\nstatic uint32_t playback_size_btpcm;\nstatic uint8_t *capture_buf_btpcm;\nstatic uint32_t capture_size_btpcm;\n\n#ifdef TX_RX_PCM_MASK\nstatic uint8_t *playback_buf_btpcm_copy = NULL;\nstatic uint32_t playback_size_btpcm_copy = 0;\nstatic uint8_t *capture_buf_btpcm_copy = NULL;\nstatic uint32_t capture_size_btpcm_copy = 0;\n#endif\n\nvolatile int sco_btpcm_mute_flag = 0;\nvolatile int sco_disconnect_mute_flag = 0;\n\nstatic uint8_t *playback_buf_btpcm_cache = NULL;\n\nstatic enum AUD_SAMPRATE_T playback_samplerate_codecpcm;\nstatic int32_t mobile_master_clk_offset_init;\n#endif\n\nenum PLAYER_OPER_T {\n  PLAYER_OPER_START,\n  PLAYER_OPER_STOP,\n  PLAYER_OPER_RESTART,\n};\n\n#if defined(AF_ADC_I2S_SYNC)\nextern \"C\" void hal_codec_capture_enable(void);\nextern \"C\" void hal_codec_capture_enable_delay(void);\n\nstatic uint32_t codec_capture_cnt = 0;\nstatic uint32_t codec_playback_cnt = 0;\n#endif\n\n#if (AUDIO_OUTPUT_VOLUME_DEFAULT < 1) || (AUDIO_OUTPUT_VOLUME_DEFAULT > 17)\n#error \"AUDIO_OUTPUT_VOLUME_DEFAULT out of range\"\n#endif\nint8_t stream_local_volume = (AUDIO_OUTPUT_VOLUME_DEFAULT);\n#ifdef AUDIO_LINEIN\nint8_t stream_linein_volume = (AUDIO_OUTPUT_VOLUME_DEFAULT);\n#endif\n\nstruct btdevice_volume *btdevice_volume_p;\nstruct btdevice_volume current_btdevice_volume;\n\n#ifdef __BT_ANC__\nuint8_t bt_sco_samplerate_ratio = 0;\nstatic uint8_t *bt_anc_sco_dec_buf;\nextern void us_fir_init(void);\nextern uint32_t voicebtpcm_pcm_resample(short *src_samp_buf,\n                                        uint32_t src_smpl_cnt,\n                                        short *dst_samp_buf);\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\nstatic enum AUD_BITS_T sample_size_play_bt;\nstatic enum AUD_SAMPRATE_T sample_rate_play_bt;\nstatic uint32_t data_size_play_bt;\n\nstatic uint8_t *playback_buf_bt;\nstatic uint32_t playback_size_bt;\nstatic int32_t playback_samplerate_ratio_bt;\n\nstatic uint8_t *playback_buf_mc;\nstatic uint32_t playback_size_mc;\nstatic enum AUD_CHANNEL_NUM_T playback_ch_num_bt;\n#ifdef AUDIO_ANC_FB_ADJ_MC\nuint32_t adj_mc_capture_sample_rate;\n#endif\n#endif\n\n#if defined(MUSIC_DELAY_CONTROL) &&                                            \\\n    (defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                      \\\n     defined(CHIP_BEST2300A) || defined(CHIP_BEST1400) ||                      \\\n     defined(CHIP_BEST1402))\nstatic enum AUD_BITS_T lowdelay_sample_size_play_bt;\nstatic enum AUD_SAMPRATE_T lowdelay_sample_rate_play_bt;\nstatic uint32_t lowdelay_data_size_play_bt;\nstatic enum AUD_CHANNEL_NUM_T lowdelay_playback_ch_num_bt;\n#endif\n\nextern uint8_t current_a2dp_non_type;\n\nextern void bt_media_clear_media_type(uint16_t media_type,\n                                      enum BT_DEVICE_ID_T device_id);\n\nextern \"C\" uint8_t is_sbc_mode(void);\nuint8_t bt_sbc_mode;\nextern \"C\" uint8_t __attribute__((section(\".fast_text_sram\")))\nis_sbc_mode(void) {\n  return bt_sbc_mode;\n}\n\nextern \"C\" uint8_t is_sco_mode(void);\n\nuint8_t bt_sco_mode;\nextern \"C\" uint8_t __attribute__((section(\".fast_text_sram\")))\nis_sco_mode(void) {\n  return bt_sco_mode;\n}\n\n#define APP_BT_STREAM_TRIGGER_TIMEROUT (2000)\n\n#define TRIGGER_CHECKER_A2DP_PLAYERBLACK (1 << 0)\n#define TRIGGER_CHECKER_A2DP_DONE (TRIGGER_CHECKER_A2DP_PLAYERBLACK)\n\n#define TRIGGER_CHECKER_HFP_BTPCM_PLAYERBLACK (1 << 1)\n#define TRIGGER_CHECKER_HFP_BTPCM_CAPTURE (1 << 2)\n#define TRIGGER_CHECKER_HFP_AUDPCM_PLAYERBLACK (1 << 3)\n#define TRIGGER_CHECKER_HFP_AUDPCM_CAPTURE (1 << 4)\n#define TRIGGER_CHECKER_HFP_DONE                                               \\\n  (TRIGGER_CHECKER_HFP_BTPCM_PLAYERBLACK | TRIGGER_CHECKER_HFP_BTPCM_CAPTURE | \\\n   TRIGGER_CHECKER_HFP_AUDPCM_PLAYERBLACK |                                    \\\n   TRIGGER_CHECKER_HFP_AUDPCM_CAPTURE)\n\nstatic bool app_bt_stream_trigger_enable = 0;\nstatic uint32_t app_bt_stream_trigger_checker = 0;\nstatic void app_bt_stream_trigger_timeout_cb(void const *n);\nosTimerDef(APP_BT_STREAM_TRIGGER_TIMEOUT, app_bt_stream_trigger_timeout_cb);\nosTimerId app_bt_stream_trigger_timeout_id = NULL;\n\nstatic void app_bt_stream_trigger_timeout_cb(void const *n) {\n  TRACE_AUD_STREAM_I(\"[STRM_TRIG][CHK]timeout_cb\\n\");\n  if (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC)) {\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][CHK]-->A2DP_SBC\\n\");\n#if defined(IBRT)\n    app_ibrt_if_force_audio_retrigger();\n#else\n    app_audio_sendrequest_param(APP_BT_STREAM_A2DP_SBC,\n                                (uint8_t)APP_BT_SETTING_RESTART, 0, 0);\n#endif\n  } else if (app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM)) {\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][CHK]-->HFP_PCM\\n\");\n    app_audio_sendrequest(APP_BT_STREAM_HFP_PCM,\n                          (uint8_t)APP_BT_SETTING_RESTART, 0);\n  }\n}\n\nstatic int app_bt_stream_trigger_checker_init(void) {\n  if (app_bt_stream_trigger_timeout_id == NULL) {\n    app_bt_stream_trigger_enable = false;\n    app_bt_stream_trigger_checker = 0;\n    app_bt_stream_trigger_timeout_id = osTimerCreate(\n        osTimer(APP_BT_STREAM_TRIGGER_TIMEOUT), osTimerOnce, NULL);\n  }\n\n  return 0;\n}\n\nstatic int app_bt_stream_trigger_checker_start(void) {\n  app_bt_stream_trigger_checker = 0;\n  app_bt_stream_trigger_enable = true;\n  osTimerStart(app_bt_stream_trigger_timeout_id,\n               APP_BT_STREAM_TRIGGER_TIMEROUT);\n  return 0;\n}\n\nstatic int app_bt_stream_trigger_checker_stop(void) {\n  app_bt_stream_trigger_enable = false;\n  app_bt_stream_trigger_checker = 0;\n  osTimerStop(app_bt_stream_trigger_timeout_id);\n  return 0;\n}\n\nint app_bt_stream_trigger_checker_handler(uint32_t trigger_checker) {\n  bool trigger_ok = false;\n\n  if (app_bt_stream_trigger_enable) {\n    app_bt_stream_trigger_checker |= trigger_checker;\n    if (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC)) {\n      if (app_bt_stream_trigger_checker == TRIGGER_CHECKER_A2DP_DONE) {\n        trigger_ok = true;\n      }\n    } else if (app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM)) {\n      if (app_bt_stream_trigger_checker == TRIGGER_CHECKER_HFP_DONE) {\n        trigger_ok = true;\n      }\n    }\n    if (trigger_ok) {\n      TRACE_AUD_STREAM_I(\"[STRM_TRIG][CHK] ok\\n\");\n      app_bt_stream_trigger_checker_stop();\n    }\n  }\n  return 0;\n}\n\n#ifdef A2DP_LHDC_ON\nextern struct BT_DEVICE_T app_bt_device;\n#if defined(A2DP_LHDC_V3)\n#define LHDC_AUDIO_96K_BUFF_SIZE (256 * 2 * 4 * 8)\n// #define LHDC_AUDIO_96K_16BITS_BUFF_SIZE (256*2*2*8)\n\n#define LHDC_AUDIO_BUFF_SIZE (256 * 2 * 4 * 4)\n// #define LHDC_AUDIO_16BITS_BUFF_SIZE     (256*2*2*4)\n#define LHDC_LLC_AUDIO_BUFF_SIZE (256 * 2 * 2 * 2)\n#else\n#define LHDC_AUDIO_BUFF_SIZE (512 * 2 * 4)\n// #define LHDC_AUDIO_16BITS_BUFF_SIZE     (512*2*2)\n#endif\n#endif\nuint16_t gStreamplayer = APP_BT_STREAM_INVALID;\n\nuint32_t a2dp_audio_more_data(uint8_t codec_type, uint8_t *buf, uint32_t len);\nint a2dp_audio_init(void);\nint a2dp_audio_deinit(void);\nenum AUD_SAMPRATE_T a2dp_sample_rate = AUD_SAMPRATE_48000;\nuint32_t a2dp_data_buf_size;\n#ifdef RB_CODEC\nextern int app_rbplay_audio_onoff(bool onoff, uint16_t aud_id);\n#endif\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\nint app_a2dp_source_linein_on(bool on);\n#endif\n#if defined(APP_I2S_A2DP_SOURCE)\n#include \"app_a2dp_source.h\"\n#include \"app_status_ind.h\"\n// player channel should <= capture channel number\n// player must be 2 channel\n#define LINEIN_PLAYER_CHANNEL (2)\n#ifdef __AUDIO_INPUT_MONO_MODE__\n#define LINEIN_CAPTURE_CHANNEL (1)\n#else\n#define LINEIN_CAPTURE_CHANNEL (2)\n#endif\n\n#if (LINEIN_CAPTURE_CHANNEL == 1)\n#define LINEIN_PLAYER_BUFFER_SIZE (1024 * LINEIN_PLAYER_CHANNEL)\n#define LINEIN_CAPTURE_BUFFER_SIZE (LINEIN_PLAYER_BUFFER_SIZE / 2)\n#elif (LINEIN_CAPTURE_CHANNEL == 2)\n#define LINEIN_PLAYER_BUFFER_SIZE (1024 * LINEIN_PLAYER_CHANNEL)\n// #define LINEIN_CAPTURE_BUFFER_SIZE (LINEIN_PLAYER_BUFFER_SIZE)\n#define LINEIN_CAPTURE_BUFFER_SIZE (1024 * 10)\n#endif\n\nstatic int16_t *app_linein_play_cache = NULL;\n\nint8_t app_linein_buffer_is_empty(void) {\n  if (app_audio_pcmbuff_length()) {\n    return 0;\n  } else {\n    return 1;\n  }\n}\n\nuint32_t app_linein_pcm_come(uint8_t *pcm_buf, uint32_t len) {\n  // DUMP16(\"%d \", pcm_buf, 10);\n  DUMP8(\"0x%02x \", pcm_buf, 10);\n  TRACE_AUD_STREAM_I(\"app_linein_pcm_come\");\n  app_audio_pcmbuff_put(pcm_buf, len);\n\n  return len;\n}\n\nuint32_t app_linein_need_pcm_data(uint8_t *pcm_buf, uint32_t len) {\n\n#if (LINEIN_CAPTURE_CHANNEL == 1)\n  app_audio_pcmbuff_get((uint8_t *)app_linein_play_cache, len / 2);\n  // app_play_audio_lineinmode_more_data((uint8_t\n  // *)app_linein_play_cache,len/2);\n  app_bt_stream_copy_track_one_to_two_16bits(\n      (int16_t *)pcm_buf, app_linein_play_cache, len / 2 / 2);\n#elif (LINEIN_CAPTURE_CHANNEL == 2)\n  app_audio_pcmbuff_get((uint8_t *)pcm_buf, len);\n  // app_play_audio_lineinmode_more_data((uint8_t *)pcm_buf, len);\n#endif\n\n#if defined(__AUDIO_OUTPUT_MONO_MODE__)\n  merge_stereo_to_mono_16bits((int16_t *)buf, (int16_t *)pcm_buf, len / 2);\n#endif\n\n#ifdef ANC_APP\n  bt_audio_updata_eq_for_anc(app_anc_work_status());\n#endif\n\n  audio_process_run(pcm_buf, len);\n\n  return len;\n}\nextern \"C\" void pmu_linein_onoff(unsigned char en);\nextern \"C\" int hal_analogif_reg_read(unsigned short reg, unsigned short *val);\nint app_a2dp_source_I2S_onoff(bool onoff) {\n  static bool isRun = false;\n  uint8_t *linein_audio_cap_buff = 0;\n  uint8_t *linein_audio_play_buff = 0;\n  uint8_t *linein_audio_loop_buf = NULL;\n  struct AF_STREAM_CONFIG_T stream_cfg;\n\n  TRACE_AUD_STREAM_I(\"app_a2dp_source_I2S_onoff work:%d op:%d\", isRun, onoff);\n\n  if (isRun == onoff)\n    return 0;\n\n  if (onoff) {\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_104M);\n    app_overlay_select(APP_OVERLAY_A2DP);\n    app_audio_mempool_init();\n    app_audio_mempool_get_buff(&linein_audio_cap_buff,\n                               LINEIN_CAPTURE_BUFFER_SIZE);\n    //        app_audio_mempool_get_buff(&linein_audio_play_buff,\n    //        LINEIN_PLAYER_BUFFER_SIZE);\n    //        app_audio_mempool_get_buff(&linein_audio_loop_buf,\n    //        LINEIN_PLAYER_BUFFER_SIZE<<2);\n    //        app_audio_pcmbuff_init(linein_audio_loop_buf,\n    //        LINEIN_PLAYER_BUFFER_SIZE<<2);\n\n#if (LINEIN_CAPTURE_CHANNEL == 1)\n    app_audio_mempool_get_buff((uint8_t **)&app_linein_play_cache,\n                               LINEIN_PLAYER_BUFFER_SIZE / 2 / 2);\n    // app_play_audio_lineinmode_init(LINEIN_CAPTURE_CHANNEL,\n    // LINEIN_PLAYER_BUFFER_SIZE/2/2);\n#elif (LINEIN_CAPTURE_CHANNEL == 2)\n    // app_play_audio_lineinmode_init(LINEIN_CAPTURE_CHANNEL,\n    // LINEIN_PLAYER_BUFFER_SIZE/2);\n#endif\n\n    sRet = memset_s(&stream_cfg, sizeof(stream_cfg), 0, sizeof(stream_cfg));\n    if (sRet) {\n      TRACE_AUD_STREAM_W(\"func-s line:%d sRet:%d %s \", __LINE__, sRet,\n                         __func__);\n    }\n    stream_cfg.bits = AUD_BITS_16;\n    stream_cfg.channel_num = (enum AUD_CHANNEL_NUM_T)LINEIN_PLAYER_CHANNEL;\n    stream_cfg.sample_rate = AUD_SAMPRATE_44100;\n\n#if 0\n        stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n\n        stream_cfg.vol = 10;//stream_linein_volume;\n        //TRACE_AUD_STREAM_I(\"vol = %d\",stream_linein_volume);\n        stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n        stream_cfg.handler = app_linein_need_pcm_data;\n        stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(linein_audio_play_buff);\n        stream_cfg.data_size = LINEIN_PLAYER_BUFFER_SIZE;\n        af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n        af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n#endif\n\n#if 1\n    stream_cfg.device = AUD_STREAM_USE_I2S0_SLAVE;\n    //     stream_cfg.io_path = AUD_INPUT_PATH_LINEIN;\n    //      stream_cfg.handler = app_linein_pcm_come;\n    stream_cfg.handler = a2dp_source_linein_more_pcm_data;\n    //      stream_cfg.handler = app_linein_pcm_come;\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(linein_audio_cap_buff);\n    stream_cfg.data_size = LINEIN_CAPTURE_BUFFER_SIZE; // 2k\n\n    //        pmu_linein_onoff(1);\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n\n    audio_process_open(stream_cfg.sample_rate, stream_cfg.bits,\n                       stream_cfg.channel_num, NULL, 0);\n\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n#endif\n    // app_status_indication_set(APP_STATUS_INDICATION_LINEIN_ON);\n  } else {\n    //       clear buffer data\n    a2dp_source.pcm_queue.write = 0;\n    a2dp_source.pcm_queue.len = 0;\n    a2dp_source.pcm_queue.read = 0;\n    //       pmu_linein_onoff(0);\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n    // app_status_indication_set(APP_STATUS_INDICATION_LINEIN_OFF);\n    app_overlay_unloadall();\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n  }\n\n  isRun = onoff;\n  TRACE_AUD_STREAM_I(\"%s end!\\n\", __func__);\n  return 0;\n}\n#endif\n\nenum AUD_SAMPRATE_T bt_parse_sbc_sample_rate(uint8_t sbc_samp_rate) {\n  enum AUD_SAMPRATE_T sample_rate;\n  sbc_samp_rate = sbc_samp_rate & A2D_STREAM_SAMP_FREQ_MSK;\n\n  switch (sbc_samp_rate) {\n  case A2D_SBC_IE_SAMP_FREQ_16:\n    //            sample_rate = AUD_SAMPRATE_16000;\n    //            break;\n  case A2D_SBC_IE_SAMP_FREQ_32:\n    //            sample_rate = AUD_SAMPRATE_32000;\n    //            break;\n  case A2D_SBC_IE_SAMP_FREQ_48:\n    sample_rate = AUD_SAMPRATE_48000;\n    break;\n  case A2D_SBC_IE_SAMP_FREQ_44:\n    sample_rate = AUD_SAMPRATE_44100;\n    break;\n#if defined(A2DP_LHDC_ON) || defined(A2DP_LDAC_ON) || defined(A2DP_SCALABLE_ON)\n  case A2D_SBC_IE_SAMP_FREQ_96:\n    sample_rate = AUD_SAMPRATE_96000;\n    break;\n#endif\n\n  default:\n    ASSERT(0, \"[%s] 0x%x is invalid\", __func__, sbc_samp_rate);\n    break;\n  }\n  return sample_rate;\n}\n\nvoid bt_store_sbc_sample_rate(enum AUD_SAMPRATE_T sample_rate) {\n  a2dp_sample_rate = sample_rate;\n}\n\nenum AUD_SAMPRATE_T bt_get_sbc_sample_rate(void) { return a2dp_sample_rate; }\n\nenum AUD_SAMPRATE_T bt_parse_store_sbc_sample_rate(uint8_t sbc_samp_rate) {\n  enum AUD_SAMPRATE_T sample_rate;\n\n  sample_rate = bt_parse_sbc_sample_rate(sbc_samp_rate);\n  bt_store_sbc_sample_rate(sample_rate);\n\n  return sample_rate;\n}\n\nint bt_sbc_player_setup(uint8_t freq) {\n  struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n  static uint8_t sbc_samp_rate = 0xff;\n  uint32_t ret;\n\n  if (sbc_samp_rate == freq)\n    return 0;\n\n  switch (freq) {\n  case A2D_SBC_IE_SAMP_FREQ_16:\n  case A2D_SBC_IE_SAMP_FREQ_32:\n  case A2D_SBC_IE_SAMP_FREQ_48:\n    a2dp_sample_rate = AUD_SAMPRATE_48000;\n    break;\n#if defined(A2DP_LHDC_ON) || defined(A2DP_LDAC_ON) || defined(A2DP_SCALABLE_ON)\n  case A2D_SBC_IE_SAMP_FREQ_96:\n    a2dp_sample_rate = AUD_SAMPRATE_96000;\n    break;\n#if defined(A2DP_LDAC_ON)\n  case A2D_SBC_IE_SAMP_FREQ_88:\n    a2dp_sample_rate = AUD_SAMPRATE_88200;\n    break;\n#endif\n#endif\n  case A2D_SBC_IE_SAMP_FREQ_44:\n    a2dp_sample_rate = AUD_SAMPRATE_44100;\n    break;\n  default:\n    break;\n  }\n  TRACE_AUD_STREAM_I(\"%s:Sample rate :%d\", __func__, a2dp_sample_rate);\n\n  ret = af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg,\n                          true);\n  if (ret == 0) {\n    stream_cfg->sample_rate = a2dp_sample_rate;\n    af_stream_setup(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, stream_cfg);\n  }\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n  ret = af_stream_get_cfg(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK, &stream_cfg,\n                          true);\n  if (ret == 0) {\n    stream_cfg->sample_rate = a2dp_sample_rate;\n    sample_rate_play_bt = stream_cfg->sample_rate;\n    af_stream_setup(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK, stream_cfg);\n    anc_mc_run_setup(hal_codec_anc_convert_rate(sample_rate_play_bt));\n  }\n#endif\n\n  sbc_samp_rate = freq;\n\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n  if (audio_prompt_is_playing_ongoing()) {\n    audio_prompt_forcefully_stop();\n  }\n#endif\n\n  return 0;\n}\n\nvoid merge_stereo_to_mono_16bits(int16_t *src_buf, int16_t *dst_buf,\n                                 uint32_t src_len) {\n  uint32_t i = 0;\n  for (i = 0; i < src_len; i += 2) {\n    dst_buf[i] = (src_buf[i] >> 1) + (src_buf[i + 1] >> 1);\n    dst_buf[i + 1] = dst_buf[i];\n  }\n}\n\nvoid merge_stereo_to_mono_24bits(int32_t *src_buf, int32_t *dst_buf,\n                                 uint32_t src_len) {\n  uint32_t i = 0;\n  for (i = 0; i < src_len; i += 2) {\n    dst_buf[i] = (src_buf[i] >> 1) + (src_buf[i + 1] >> 1);\n    dst_buf[i + 1] = dst_buf[i];\n  }\n}\n\nstatic char _player_type_str[168];\nstatic char *_catstr(char *dst, const char *src) {\n  while (*dst)\n    dst++;\n  while ((*dst++ = *src++))\n    ;\n  return --dst;\n}\nconst char *player2str(uint16_t player_type) {\n  const char *s = NULL;\n  char _cat = 0, first = 1, *d = NULL;\n  _player_type_str[0] = '\\0';\n  d = _player_type_str;\n  d = _catstr(d, \"[\");\n  if (player_type != 0) {\n    for (int i = 15; i >= 0; i--) {\n      _cat = 1;\n      // TRACE_AUD_STREAM_I(\"i=%d,player_type=0x%d,player_type&(1<= 0x80 &&\n      a2dp_Get_curr_a2dp_conhdl() <= 0x82) {\n    btofs = btdrv_rf_bitoffset_get(a2dp_Get_curr_a2dp_conhdl() - 0x80);\n\n    if (calib_reset == 1) {\n      calib_reset = 0;\n\n      bt_clock_total_mutius = 0;\n\n      bt_old_clock_us = btcnt;\n      bt_old_clock_mutius = btclk;\n\n      bt_total_offset_us = 0;\n\n      local_total_samples = 0;\n      local_total_frames = 0;\n      local_clock_ms = 0;\n\n      bt_local_clock_s = 0;\n      bt_clock_us = 0;\n      bt_clock_ms = 0;\n\n      bt_old_offset_us = btofs;\n\n      calib_factor_offset = 0.0f;\n      calib_factor_flag = 0;\n      calib_total_delay = 0;\n      calib_flag = 0;\n    } else {\n      btoffset = btofs - bt_old_offset_us;\n\n      if (btoffset < -BT_USPERCLK / 3) {\n        btoffset = btoffset + BT_USPERCLK;\n      } else if (btoffset > BT_USPERCLK / 3) {\n        btoffset = btoffset - BT_USPERCLK;\n      }\n\n      bt_total_offset_us = bt_total_offset_us + btoffset;\n      bt_old_offset_us = btofs;\n\n      local_total_frames++;\n      if (lowdelay_sample_size_play_bt == AUD_BITS_16) {\n        smplcnt = len / (2 * lowdelay_playback_ch_num_bt);\n      } else {\n        smplcnt = len / (4 * lowdelay_playback_ch_num_bt);\n      }\n\n      local_total_samples = local_total_samples + smplcnt;\n\n      bt_clock_us = btcnt - bt_old_clock_us - bt_total_offset_us;\n\n      btoffset = btclk - bt_old_clock_mutius;\n      if (btoffset < 0) {\n        btoffset = 0;\n      }\n      bt_clock_total_mutius = bt_clock_total_mutius + btoffset;\n\n      bt_old_clock_us = btcnt;\n      bt_old_clock_mutius = btclk;\n\n      if ((bt_clock_total_mutius > BT_MUTIUSPERSECOND) &&\n          (local_total_samples > lowdelay_sample_rate_play_bt)) {\n        bt_local_clock_s++;\n        bt_clock_total_mutius = bt_clock_total_mutius - BT_MUTIUSPERSECOND;\n        local_total_samples =\n            local_total_samples - lowdelay_sample_rate_play_bt;\n      }\n\n      bt_clock_ms =\n          (bt_clock_total_mutius * BT_USPERCLK / 1000) + bt_clock_us / 625;\n      local_clock_ms =\n          (local_total_samples * 1000) / lowdelay_sample_rate_play_bt;\n\n      local_clock_ms = local_clock_ms + calib_total_delay;\n\n      // TRACE_AUD_STREAM_I(\"A2DP\n      // bt_clock_ms:%8d,local_clock_ms:%8d,bt_total_offset_us:%8d\\n\",bt_clock_ms,\n      // local_clock_ms,bt_total_offset_us);\n\n      if (bt_clock_ms > (local_clock_ms + CALIB_DEVIATION_MS)) {\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n        app_resample_tune(a2dp_resample, CALIB_FACTOR_DELAY);\n#else\n        af_codec_tune(AUD_STREAM_PLAYBACK, CALIB_FACTOR_DELAY);\n#endif\n        calib_factor_flag = 1;\n        // TRACE_AUD_STREAM_I(\"*************1***************\");\n      } else if (bt_clock_ms < (local_clock_ms - CALIB_DEVIATION_MS)) {\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n        app_resample_tune(a2dp_resample, -CALIB_FACTOR_DELAY);\n#else\n        af_codec_tune(AUD_STREAM_PLAYBACK, -CALIB_FACTOR_DELAY);\n#endif\n        calib_factor_flag = -1;\n        // TRACE_AUD_STREAM_I(\"*************-1***************\");\n      } else {\n        if ((calib_factor_flag == 1 || calib_factor_flag == -1) &&\n            (bt_clock_ms == local_clock_ms)) {\n          if (calib_factor_offset < CALIB_FACTOR_MAX_THRESHOLD &&\n              calib_flag == 0) {\n            if (calib_factor_flag == 1) {\n              calib_factor_offset =\n                  calib_factor_offset + CALIB_BT_CLOCK_FACTOR_STEP;\n            } else {\n              calib_factor_offset =\n                  calib_factor_offset - CALIB_BT_CLOCK_FACTOR_STEP;\n            }\n          }\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n          app_resample_tune(a2dp_resample, calib_factor_offset);\n#else\n          af_codec_tune(AUD_STREAM_PLAYBACK, calib_factor_offset);\n#endif\n          calib_factor_flag = 0;\n          calib_flag = 0;\n          // TRACE_AUD_STREAM_I(\"*************0***************\");\n        }\n      }\n      //  TRACE_AUD_STREAM_I(\"factoroffset:%d\\n\",(int32_t)((factoroffset)*(float)10000000.0f));\n    }\n  }\n\n  return;\n}\n\n#endif\n\nbool app_if_need_fix_target_rxbit(void) {\n  return (!bt_drv_is_enhanced_ibrt_rom());\n}\n\nstatic uint8_t isBtPlaybackTriggered = false;\n\nbool bt_is_playback_triggered(void) { return isBtPlaybackTriggered; }\n\nstatic void bt_set_playback_triggered(bool isEnable) {\n  isBtPlaybackTriggered = isEnable;\n}\n\nFRAM_TEXT_LOC uint32_t bt_sbc_player_more_data(uint8_t *buf, uint32_t len) {\n  app_bt_stream_trigger_checker_handler(TRIGGER_CHECKER_A2DP_PLAYERBLACK);\n#ifdef A2DP_STREAM_AUDIO_DUMP\n  audio_dump_clear_up();\n  audio_dump_add_channel_data_from_multi_channels(0, buf, len / sizeof(int) / 2,\n                                                  2, 0);\n  audio_dump_run();\n#endif\n\n  bt_set_playback_triggered(true);\n\n#if defined(MUSIC_DELAY_CONTROL) &&                                            \\\n    (defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                      \\\n     defined(CHIP_BEST2300A) || defined(CHIP_BEST1400) ||                      \\\n     defined(CHIP_BEST1402))\n  a2dp_clock_calib_process(len);\n#endif\n\n#if defined(IBRT) && defined(RSSI_GATHERING_ENABLED)\n  app_ibrt_ui_rssi_process();\n#endif\n\n#ifdef VOICE_DATAPATH\n  // if (AI_SPEC_GSOUND == ai_manager_get_current_spec())\n  {\n    if (app_voicepath_get_stream_pending_state(VOICEPATH_STREAMING)) {\n#ifdef __DUAL_MIC_RECORDING__\n      app_ibrt_voice_capture_trigger_init();\n#endif\n      af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n#ifdef MIX_MIC_DURING_MUSIC\n      app_voicepath_enable_hw_sidetone(0, HW_SIDE_TONE_MAX_ATTENUATION_COEF);\n#endif\n      app_voicepath_set_stream_state(VOICEPATH_STREAMING, true);\n      app_voicepath_set_pending_started_stream(VOICEPATH_STREAMING, false);\n    }\n  }\n#endif\n#ifdef BT_XTAL_SYNC\n#ifdef BT_XTAL_SYNC_NEW_METHOD\n  if (a2dp_Get_curr_a2dp_conhdl() >= 0x80 &&\n      a2dp_Get_curr_a2dp_conhdl() <= 0x82) {\n    uint32_t bitoffset =\n        btdrv_rf_bitoffset_get(a2dp_Get_curr_a2dp_conhdl() - 0x80);\n    if (app_if_need_fix_target_rxbit() == false) {\n      if (bitoffset < XTAL_OFFSET)\n        bitoffset = XTAL_OFFSET;\n      else if (bitoffset > SLOT_SIZE - XTAL_OFFSET)\n        bitoffset = SLOT_SIZE - XTAL_OFFSET;\n    }\n#ifdef BT_XTAL_SYNC_SLOW\n    bt_xtal_sync_new(bitoffset, app_if_need_fix_target_rxbit(),\n                     BT_XTAL_SYNC_MODE_WITH_MOBILE);\n#else\n    bt_xtal_sync_new_new(bitoffset, app_if_need_fix_target_rxbit(),\n                         BT_XTAL_SYNC_MODE_WITH_MOBILE);\n#endif\n  }\n\n#else\n  bt_xtal_sync(BT_XTAL_SYNC_MODE_MUSIC);\n#endif\n#endif\n\n  uint8_t codec_type = bt_sbc_player_get_codec_type();\n  uint32_t overlay_id = 0;\n  if (codec_type == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n    overlay_id = APP_OVERLAY_A2DP_AAC;\n  } else if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n#if defined(A2DP_LHDC_ON)\n    if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LHDC) {\n      overlay_id = APP_OVERLAY_A2DP_LHDC;\n    }\n#endif\n\n#if defined(A2DP_LDAC_ON)\n    if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LDAC) {\n      overlay_id = APP_OVERLAY_A2DP_LDAC;\n    }\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\n    if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n      overlay_id = APP_OVERLAY_A2DP_SCALABLE;\n    }\n#endif\n  } else {\n    overlay_id = APP_OVERLAY_A2DP;\n  }\n\n  memset(buf, 0, len);\n\n  if (app_get_current_overlay() != overlay_id) {\n    return len;\n  }\n\n#ifdef PLAYBACK_FORCE_48K\n  app_playback_resample_run(force48k_resample, buf, len);\n#else\n#if (A2DP_DECODER_VER == 2)\n  a2dp_audio_playback_handler(buf, len);\n#else\n  a2dp_audio_more_data(overlay_id, buf, len);\n#endif\n#endif\n\n#ifdef __AUDIO_SPECTRUM__\n  audio_spectrum_run(buf, len);\n#endif\n\n#ifdef __KWS_AUDIO_PROCESS__\n  short *pdata = (short *)buf;\n  short pdata_mono = 0;\n  for (unsigned int i = 0; i < len / 4; i++) {\n    pdata_mono = pdata[2 * i] / 2 + pdata[2 * i + 1] / 2;\n    pdata[2 * i] = pdata_mono;\n    pdata[2 * i + 1] = pdata_mono;\n  }\n#endif\n\n#ifdef __AUDIO_OUTPUT_MONO_MODE__\n#ifdef A2DP_EQ_24BIT\n  merge_stereo_to_mono_24bits((int32_t *)buf, (int32_t *)buf,\n                              len / sizeof(int32_t));\n#else\n  merge_stereo_to_mono_16bits((int16_t *)buf, (int16_t *)buf,\n                              len / sizeof(int16_t));\n#endif\n#endif\n\n#ifdef __HEAR_THRU_PEAK_DET__\n#ifdef ANC_APP\n  if (app_anc_work_status())\n#endif\n  {\n    int vol_level = 0;\n    vol_level = app_bt_stream_local_volume_get();\n    peak_detector_run(buf, len, pkd_vol_multiple[vol_level]);\n  }\n#endif\n\n#ifdef ANC_APP\n  bt_audio_updata_eq_for_anc(app_anc_work_status());\n#endif\n\n  audio_process_run(buf, len);\n\n#if defined(IBRT)\n  app_tws_ibrt_audio_analysis_audiohandler_tick();\n#endif\n\n  osapi_notify_evm();\n\n  return len;\n}\n\nFRAM_TEXT_LOC void\nbt_sbc_player_playback_post_handler(uint8_t *buf, uint32_t len, void *cfg) {\n  POSSIBLY_UNUSED struct AF_STREAM_CONFIG_T *config =\n      (struct AF_STREAM_CONFIG_T *)cfg;\n\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n#ifdef TWS_PROMPT_SYNC\n  tws_playback_ticks_check_for_mix_prompt();\n#endif\n  if (audio_prompt_is_playing_ongoing()) {\n    audio_prompt_processing_handler(len, buf);\n  }\n#else\n  app_ring_merge_more_data(buf, len);\n#endif\n}\n\n#ifdef __THIRDPARTY\nbool start_by_sbc = false;\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\nstatic int32_t mid_p_8_old_l = 0;\nstatic int32_t mid_p_8_old_r = 0;\n#ifdef AUDIO_ANC_FB_ADJ_MC\n#define ADJ_MC_STREAM_ID AUD_STREAM_ID_1\n\n#define ADJ_MC_SAMPLE_BITS (16)\n#define ADJ_MC_SAMPLE_BYTES (ADJ_MC_SAMPLE_BITS / 8)\n#define ADJ_MC_CHANNEL_NUM (2)\n#define ADJ_MC_FRAME_LEN (256)\n#define ADJ_MC_BUF_SIZE                                                        \\\n  (ADJ_MC_FRAME_LEN * ADJ_MC_CHANNEL_NUM * ADJ_MC_SAMPLE_BYTES * 2) // pingpong\nstatic uint8_t POSSIBLY_UNUSED adj_mc_buf[ADJ_MC_BUF_SIZE];\n\nstatic uint32_t audio_adj_mc_data_playback_a2dp(uint8_t *buf,\n                                                uint32_t mc_len_bytes) {\n  uint32_t begin_time;\n  // uint32_t end_time;\n  begin_time = hal_sys_timer_get();\n  TRACE_AUD_STREAM_I(\"[A2DP][MUSIC_CANCEL] begin_time: %d\", begin_time);\n\n  float left_gain;\n  float right_gain;\n  int playback_len_bytes, mc_len_bytes_run;\n  int i, j, k;\n  int delay_sample;\n\n  hal_codec_get_dac_gain(&left_gain, &right_gain);\n\n  // TRACE_AUD_STREAM_I(\"[A2DP][MUSIC_CANCEL]playback_samplerate_ratio:\n  // %d\",playback_samplerate_ratio);\n\n  // TRACE_AUD_STREAM_I(\"[A2DP][MUSIC_CANCEL]left_gain:\n  // %d\",(int)(left_gain*(1<<12)));\n  // TRACE_AUD_STREAM_I(\"[A2DP][MUSIC_CANCEL]right_gain:\n  // %d\",(int)(right_gain*(1<<12)));\n\n  playback_len_bytes = mc_len_bytes / playback_samplerate_ratio_bt;\n\n  mc_len_bytes_run = mc_len_bytes / SAMPLERATE_RATIO_THRESHOLD;\n\n  if (sample_size_play_bt == AUD_BITS_16) {\n    int16_t *sour_p = (int16_t *)(playback_buf_bt + playback_size_bt / 2);\n    int16_t *mid_p = (int16_t *)(buf);\n    int16_t *mid_p_8 = (int16_t *)(buf + mc_len_bytes - mc_len_bytes_run);\n    int16_t *dest_p = (int16_t *)buf;\n\n    if (buf == playback_buf_mc) {\n      sour_p = (int16_t *)playback_buf_bt;\n    }\n\n    delay_sample = DELAY_SAMPLE_MC / 2;\n\n    for (i = 0, j = 0; i < delay_sample; i = i + 1) {\n      mid_p[j++] = delay_buf_bt[i];\n    }\n\n    for (i = 0; i < playback_len_bytes / 2 - delay_sample; i = i + 1) {\n      mid_p[j++] = sour_p[i];\n    }\n\n    for (j = 0; i < playback_len_bytes / 2; i = i + 1) {\n      delay_buf_bt[j++] = sour_p[i];\n    }\n\n    if (playback_samplerate_ratio_bt <= SAMPLERATE_RATIO_THRESHOLD) {\n      for (i = 0, j = 0; i < playback_len_bytes / 2;\n           i = i +\n               (SAMPLERATE_RATIO_THRESHOLD / playback_samplerate_ratio_bt)) {\n        mid_p_8[j++] = mid_p[i];\n      }\n    } else {\n      for (i = 0, j = 0; i < playback_len_bytes / 2; i = i + 1) {\n        for (k = 0;\n             k < playback_samplerate_ratio_bt / SAMPLERATE_RATIO_THRESHOLD;\n             k++) {\n          mid_p_8[j++] = mid_p[i];\n        }\n      }\n    }\n\n    anc_adj_mc_run_mono((uint8_t *)mid_p_8, mc_len_bytes_run, AUD_BITS_16);\n\n    for (i = 0, j = 0; i < (mc_len_bytes_run) / 2; i = i + 1) {\n      float delta_l =\n          (mid_p_8[i] - mid_p_8_old_l) / (float)SAMPLERATE_RATIO_THRESHOLD;\n      for (k = 1; k <= SAMPLERATE_RATIO_THRESHOLD; k++) {\n        dest_p[j++] = mid_p_8_old_l + (int32_t)(delta_l * k);\n      }\n      mid_p_8_old_l = mid_p_8[i];\n    }\n\n  } else if (sample_size_play_bt == AUD_BITS_24) {\n    int32_t *sour_p = (int32_t *)(playback_buf_bt + playback_size_bt / 2);\n    int32_t *mid_p = (int32_t *)(buf);\n    int32_t *mid_p_8 = (int32_t *)(buf + mc_len_bytes - mc_len_bytes_run);\n    int32_t *dest_p = (int32_t *)buf;\n\n    if (buf == (playback_buf_mc)) {\n      sour_p = (int32_t *)playback_buf_bt;\n    }\n\n    delay_sample = DELAY_SAMPLE_MC / 2;\n\n    for (i = 0, j = 0; i < delay_sample; i = i + 1) {\n      mid_p[j++] = delay_buf_bt[i];\n    }\n\n    for (i = 0; i < playback_len_bytes / 4 - delay_sample; i = i + 1) {\n      mid_p[j++] = sour_p[i];\n    }\n\n    for (j = 0; i < playback_len_bytes / 4; i = i + 1) {\n      delay_buf_bt[j++] = sour_p[i];\n    }\n\n    if (playback_samplerate_ratio_bt <= SAMPLERATE_RATIO_THRESHOLD) {\n      for (i = 0, j = 0; i < playback_len_bytes / 4;\n           i = i +\n               (SAMPLERATE_RATIO_THRESHOLD / playback_samplerate_ratio_bt)) {\n        mid_p_8[j++] = mid_p[i];\n      }\n    } else {\n      for (i = 0, j = 0; i < playback_len_bytes / 4; i = i + 1) {\n        for (k = 0;\n             k < playback_samplerate_ratio_bt / SAMPLERATE_RATIO_THRESHOLD;\n             k++) {\n          mid_p_8[j++] = mid_p[i];\n        }\n      }\n    }\n\n    anc_adj_mc_run_mono((uint8_t *)mid_p_8, mc_len_bytes_run, AUD_BITS_24);\n\n    for (i = 0, j = 0; i < (mc_len_bytes_run) / 4; i = i + 1) {\n      float delta_l =\n          (mid_p_8[i] - mid_p_8_old_l) / (float)SAMPLERATE_RATIO_THRESHOLD;\n      for (k = 1; k <= SAMPLERATE_RATIO_THRESHOLD; k++) {\n        dest_p[j++] = mid_p_8_old_l + (int32_t)(delta_l * k);\n      }\n      mid_p_8_old_l = mid_p_8[i];\n    }\n  }\n\n  //  end_time = hal_sys_timer_get();\n\n  //   TRACE_AUD_STREAM_I(\"[A2DP][MUSIC_CANCEL] run time: %d\",\n  //   end_time-begin_time);\n\n  return 0;\n}\n#else\nstatic uint32_t audio_mc_data_playback_a2dp(uint8_t *buf,\n                                            uint32_t mc_len_bytes) {\n  //    uint32_t begin_time;\n  //    uint32_t end_time;\n  //    begin_time = hal_sys_timer_get();\n  //    TRACE_AUD_STREAM_I(\"music cancel: %d\",begin_time);\n\n  float left_gain;\n  float right_gain;\n  int playback_len_bytes, mc_len_bytes_run;\n  int i, j, k;\n  int delay_sample;\n\n  hal_codec_get_dac_gain(&left_gain, &right_gain);\n\n  // TRACE_AUD_STREAM_I(\"playback_samplerate_ratio:\n  // %d\",playback_samplerate_ratio);\n\n  // TRACE_AUD_STREAM_I(\"left_gain:  %d\",(int)(left_gain*(1<<12)));\n  // TRACE_AUD_STREAM_I(\"right_gain: %d\",(int)(right_gain*(1<<12)));\n\n  playback_len_bytes = mc_len_bytes / playback_samplerate_ratio_bt;\n\n  mc_len_bytes_run = mc_len_bytes / SAMPLERATE_RATIO_THRESHOLD;\n\n  if (sample_size_play_bt == AUD_BITS_16) {\n    int16_t *sour_p = (int16_t *)(playback_buf_bt + playback_size_bt / 2);\n    int16_t *mid_p = (int16_t *)(buf);\n    int16_t *mid_p_8 = (int16_t *)(buf + mc_len_bytes - mc_len_bytes_run);\n    int16_t *dest_p = (int16_t *)buf;\n\n    if (buf == playback_buf_mc) {\n      sour_p = (int16_t *)playback_buf_bt;\n    }\n\n    delay_sample = DELAY_SAMPLE_MC;\n\n    for (i = 0, j = 0; i < delay_sample; i = i + 2) {\n      mid_p[j++] = delay_buf_bt[i];\n      mid_p[j++] = delay_buf_bt[i + 1];\n    }\n\n    for (i = 0; i < playback_len_bytes / 2 - delay_sample; i = i + 2) {\n      mid_p[j++] = sour_p[i];\n      mid_p[j++] = sour_p[i + 1];\n    }\n\n    for (j = 0; i < playback_len_bytes / 2; i = i + 2) {\n      delay_buf_bt[j++] = sour_p[i];\n      delay_buf_bt[j++] = sour_p[i + 1];\n    }\n\n    if (playback_samplerate_ratio_bt <= SAMPLERATE_RATIO_THRESHOLD) {\n      for (i = 0, j = 0; i < playback_len_bytes / 2;\n           i = i + 2 * (SAMPLERATE_RATIO_THRESHOLD /\n                        playback_samplerate_ratio_bt)) {\n        mid_p_8[j++] = mid_p[i];\n        mid_p_8[j++] = mid_p[i + 1];\n      }\n    } else {\n      for (i = 0, j = 0; i < playback_len_bytes / 2; i = i + 2) {\n        for (k = 0;\n             k < playback_samplerate_ratio_bt / SAMPLERATE_RATIO_THRESHOLD;\n             k++) {\n          mid_p_8[j++] = mid_p[i];\n          mid_p_8[j++] = mid_p[i + 1];\n        }\n      }\n    }\n\n    anc_mc_run_stereo((uint8_t *)mid_p_8, mc_len_bytes_run, left_gain,\n                      right_gain, AUD_BITS_16);\n\n    for (i = 0, j = 0; i < (mc_len_bytes_run) / 2; i = i + 2) {\n      float delta_l =\n          (mid_p_8[i] - mid_p_8_old_l) / (float)SAMPLERATE_RATIO_THRESHOLD;\n      float delta_r =\n          (mid_p_8[i + 1] - mid_p_8_old_r) / (float)SAMPLERATE_RATIO_THRESHOLD;\n      for (k = 1; k <= SAMPLERATE_RATIO_THRESHOLD; k++) {\n        dest_p[j++] = mid_p_8_old_l + (int32_t)(delta_l * k);\n        dest_p[j++] = mid_p_8_old_r + (int32_t)(delta_r * k);\n      }\n      mid_p_8_old_l = mid_p_8[i];\n      mid_p_8_old_r = mid_p_8[i + 1];\n    }\n\n  } else if (sample_size_play_bt == AUD_BITS_24) {\n    int32_t *sour_p = (int32_t *)(playback_buf_bt + playback_size_bt / 2);\n    int32_t *mid_p = (int32_t *)(buf);\n    int32_t *mid_p_8 = (int32_t *)(buf + mc_len_bytes - mc_len_bytes_run);\n    int32_t *dest_p = (int32_t *)buf;\n\n    if (buf == (playback_buf_mc)) {\n      sour_p = (int32_t *)playback_buf_bt;\n    }\n\n    delay_sample = DELAY_SAMPLE_MC;\n\n    for (i = 0, j = 0; i < delay_sample; i = i + 2) {\n      mid_p[j++] = delay_buf_bt[i];\n      mid_p[j++] = delay_buf_bt[i + 1];\n    }\n\n    for (i = 0; i < playback_len_bytes / 4 - delay_sample; i = i + 2) {\n      mid_p[j++] = sour_p[i];\n      mid_p[j++] = sour_p[i + 1];\n    }\n\n    for (j = 0; i < playback_len_bytes / 4; i = i + 2) {\n      delay_buf_bt[j++] = sour_p[i];\n      delay_buf_bt[j++] = sour_p[i + 1];\n    }\n\n    if (playback_samplerate_ratio_bt <= SAMPLERATE_RATIO_THRESHOLD) {\n      for (i = 0, j = 0; i < playback_len_bytes / 4;\n           i = i + 2 * (SAMPLERATE_RATIO_THRESHOLD /\n                        playback_samplerate_ratio_bt)) {\n        mid_p_8[j++] = mid_p[i];\n        mid_p_8[j++] = mid_p[i + 1];\n      }\n    } else {\n      for (i = 0, j = 0; i < playback_len_bytes / 4; i = i + 2) {\n        for (k = 0;\n             k < playback_samplerate_ratio_bt / SAMPLERATE_RATIO_THRESHOLD;\n             k++) {\n          mid_p_8[j++] = mid_p[i];\n          mid_p_8[j++] = mid_p[i + 1];\n        }\n      }\n    }\n\n    anc_mc_run_stereo((uint8_t *)mid_p_8, mc_len_bytes_run, left_gain,\n                      right_gain, AUD_BITS_24);\n\n    for (i = 0, j = 0; i < (mc_len_bytes_run) / 4; i = i + 2) {\n      float delta_l =\n          (mid_p_8[i] - mid_p_8_old_l) / (float)SAMPLERATE_RATIO_THRESHOLD;\n      float delta_r =\n          (mid_p_8[i + 1] - mid_p_8_old_r) / (float)SAMPLERATE_RATIO_THRESHOLD;\n      for (k = 1; k <= SAMPLERATE_RATIO_THRESHOLD; k++) {\n        dest_p[j++] = mid_p_8_old_l + (int32_t)(delta_l * k);\n        dest_p[j++] = mid_p_8_old_r + (int32_t)(delta_r * k);\n      }\n      mid_p_8_old_l = mid_p_8[i];\n      mid_p_8_old_r = mid_p_8[i + 1];\n    }\n  }\n\n  //  end_time = hal_sys_timer_get();\n\n  //   TRACE_AUD_STREAM_I(\"%s:run time: %d\", __FUNCTION__, end_time-begin_time);\n\n  return 0;\n}\n#endif\n#endif\n\nstatic uint8_t g_current_eq_index = 0xff;\nstatic bool isMeridianEQON = false;\n\nbool app_is_meridian_on() { return isMeridianEQON; }\n\nuint8_t app_audio_get_eq() { return g_current_eq_index; }\n\nbool app_meridian_eq(bool onoff) {\n  isMeridianEQON = onoff;\n  return onoff;\n}\n\nint app_audio_set_eq(uint8_t index) {\n#ifdef __SW_IIR_EQ_PROCESS__\n  if (index >= EQ_SW_IIR_LIST_NUM)\n    return -1;\n#endif\n#ifdef __HW_FIR_EQ_PROCESS__\n  if (index >= EQ_HW_FIR_LIST_NUM)\n    return -1;\n#endif\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n  if (index >= EQ_HW_DAC_IIR_LIST_NUM)\n    return -1;\n#endif\n#ifdef __HW_IIR_EQ_PROCESS__\n  if (index >= EQ_HW_IIR_LIST_NUM)\n    return -1;\n#endif\n  g_current_eq_index = index;\n  return index;\n}\n\nvoid bt_audio_updata_eq(uint8_t index) {\n  TRACE_AUD_STREAM_I(\"[EQ] update idx = %d\", index);\n#if defined(__SW_IIR_EQ_PROCESS__) || defined(__HW_FIR_EQ_PROCESS__) ||        \\\n    defined(__HW_DAC_IIR_EQ_PROCESS__) || defined(__HW_IIR_EQ_PROCESS__)\n  AUDIO_EQ_TYPE_T audio_eq_type;\n#ifdef __SW_IIR_EQ_PROCESS__\n  audio_eq_type = AUDIO_EQ_TYPE_SW_IIR;\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\n  audio_eq_type = AUDIO_EQ_TYPE_HW_FIR;\n#endif\n\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n  audio_eq_type = AUDIO_EQ_TYPE_HW_DAC_IIR;\n#endif\n\n#ifdef __HW_IIR_EQ_PROCESS__\n  audio_eq_type = AUDIO_EQ_TYPE_HW_IIR;\n#endif\n  bt_audio_set_eq(audio_eq_type, index);\n#endif\n}\n\n#ifdef ANC_APP\nuint8_t bt_audio_updata_eq_for_anc(uint8_t anc_status) {\n  anc_status = app_anc_work_status();\n  if (anc_status_record != anc_status) {\n    anc_status_record = anc_status;\n    TRACE_AUD_STREAM_I(\"[EQ] update anc_status = %d\", anc_status);\n#ifdef __SW_IIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_SW_IIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_SW_IIR, anc_status));\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_HW_FIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_FIR, anc_status));\n#endif\n\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n    bt_audio_set_eq(\n        AUDIO_EQ_TYPE_HW_DAC_IIR,\n        bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_DAC_IIR, anc_status));\n#endif\n\n#ifdef __HW_IIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_HW_IIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_IIR, anc_status));\n#endif\n  }\n  return 0;\n}\n#endif\n\nuint8_t bt_audio_get_eq_index(AUDIO_EQ_TYPE_T audio_eq_type,\n                              uint8_t anc_status) {\n  uint8_t index_eq = 0;\n\n#if defined(__SW_IIR_EQ_PROCESS__) || defined(__HW_FIR_EQ_PROCESS__) ||        \\\n    defined(__HW_DAC_IIR_EQ_PROCESS__) || defined(__HW_IIR_EQ_PROCESS__)\n  switch (audio_eq_type) {\n#if defined(__SW_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_SW_IIR: {\n    if (anc_status) {\n      index_eq = audio_eq_sw_iir_index + 1;\n    } else {\n      index_eq = audio_eq_sw_iir_index;\n    }\n\n  } break;\n#endif\n\n#if defined(__HW_FIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_FIR: {\n    if (a2dp_sample_rate == AUD_SAMPRATE_44100) {\n      index_eq = 0;\n    } else if (a2dp_sample_rate == AUD_SAMPRATE_48000) {\n      index_eq = 1;\n    } else if (a2dp_sample_rate == AUD_SAMPRATE_96000) {\n      index_eq = 2;\n    } else {\n      ASSERT(0, \"[%s] sample_rate_recv(%d) is not supported\", __func__,\n             a2dp_sample_rate);\n    }\n    audio_eq_hw_fir_index = index_eq;\n\n    if (anc_status) {\n      index_eq = index_eq + 3;\n    }\n  } break;\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_DAC_IIR: {\n    if (anc_status) {\n      index_eq = audio_eq_hw_dac_iir_index + 1;\n    } else {\n      index_eq = audio_eq_hw_dac_iir_index;\n    }\n  } break;\n#endif\n\n#if defined(__HW_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_IIR: {\n    if (anc_status) {\n      index_eq = audio_eq_hw_iir_index + 1;\n    } else {\n      index_eq = audio_eq_hw_iir_index;\n    }\n  } break;\n#endif\n  default: {\n    ASSERT(false, \"[%s]Error eq type!\", __func__);\n  }\n  }\n#endif\n  return index_eq;\n}\n\nuint32_t bt_audio_set_eq(AUDIO_EQ_TYPE_T audio_eq_type, uint8_t index) {\n  const FIR_CFG_T *fir_cfg = NULL;\n  const IIR_CFG_T *iir_cfg = NULL;\n\n  TRACE_AUD_STREAM_I(\"[EQ] set type=%d,index=%d\", audio_eq_type, index);\n\n#if defined(__SW_IIR_EQ_PROCESS__) || defined(__HW_FIR_EQ_PROCESS__) ||        \\\n    defined(__HW_DAC_IIR_EQ_PROCESS__) || defined(__HW_IIR_EQ_PROCESS__)\n  switch (audio_eq_type) {\n#if defined(__SW_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_SW_IIR: {\n    if (index >= EQ_SW_IIR_LIST_NUM) {\n      TRACE_AUD_STREAM_W(\"[EQ] SET index %u > EQ_SW_IIR_LIST_NUM\", index);\n      return 1;\n    }\n\n    iir_cfg = audio_eq_sw_iir_cfg_list[index];\n  } break;\n#endif\n\n#if defined(__HW_FIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_FIR: {\n    if (index >= EQ_HW_FIR_LIST_NUM) {\n      TRACE_AUD_STREAM_W(\"[EQ] SET index %u > EQ_HW_FIR_LIST_NUM\", index);\n      return 1;\n    }\n\n    fir_cfg = audio_eq_hw_fir_cfg_list[index];\n  } break;\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_DAC_IIR: {\n    if (index >= EQ_HW_DAC_IIR_LIST_NUM) {\n      TRACE_AUD_STREAM_W(\"[EQ] SET index %u > EQ_HW_DAC_IIR_LIST_NUM\", index);\n      return 1;\n    }\n\n    iir_cfg = audio_eq_hw_dac_iir_cfg_list[index];\n  } break;\n#endif\n\n#if defined(__HW_IIR_EQ_PROCESS__)\n  case AUDIO_EQ_TYPE_HW_IIR: {\n    if (index >= EQ_HW_IIR_LIST_NUM) {\n      TRACE_AUD_STREAM_W(\"[EQ] SET index %u > EQ_HW_IIR_LIST_NUM\", index);\n      return 1;\n    }\n\n    iir_cfg = audio_eq_hw_iir_cfg_list[index];\n  } break;\n#endif\n  default: {\n    ASSERT(false, \"[%s]Error eq type!\", __func__);\n  }\n  }\n#endif\n\n#ifdef AUDIO_SECTION_ENABLE\n  const IIR_CFG_T *iir_cfg_from_audio_section =\n      (const IIR_CFG_T *)load_audio_cfg_from_audio_section(\n          AUDIO_PROCESS_TYPE_IIR_EQ);\n  if (iir_cfg_from_audio_section) {\n    iir_cfg = iir_cfg_from_audio_section;\n  }\n#endif\n\n  return audio_eq_set_cfg(fir_cfg, iir_cfg, audio_eq_type);\n}\n\n#define A2DP_PLAYER_PLAYBACK_WATER_LINE                                        \\\n  ((uint32_t)(3.f * a2dp_audio_latency_factor_get() + 0.5f))\n#define A2DP_PLAYER_PLAYBACK_WATER_LINE_UPPER (25)\n\n/********************************\n        AUD_BITS_16\n        dma_buffer_delay_us =\n stream_cfg->data_size/stream_cfg->channel_num/2*1000000LL/stream_cfg->sample_rate;\n        AUD_BITS_24\n        dma_buffer_delay_us =\n stream_cfg->data_size/stream_cfg->channel_num/4*1000000LL/stream_cfg->sample_rate;\n\n        dma_buffer_delay_us\n        scalable delay = 864/sample*1000*n ms\n        scalable delay = 864/44100*1000*13 = 117ms\n        scalable delay = 864/96000*1000*6 = 118ms\n        waterline delay = 864/sample*1000*n ms\n        waterline delay = 864/44100*1000*3 = 58ms\n        waterline delay = 864/96000*1000*3 = 27ms\n        audio_delay = scalable delay + waterline delay\n *********************************/\n\n#define A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_MTU (13)\n#define A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_BASE (9000)\n#define A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_US                           \\\n  (A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_BASE *                            \\\n   A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_MTU)\n\n#define A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_MTU (6)\n#define A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_BASE (19500)\n#define A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_US                         \\\n  (A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_BASE *                          \\\n   A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_MTU)\n\n/********************************\n        AUD_BITS_16\n        dma_buffer_delay_us =\n stream_cfg->data_size/stream_cfg->channel_num/2*1000000LL/stream_cfg->sample_rate;\n        AUD_BITS_24\n        dma_buffer_delay_us =\n stream_cfg->data_size/stream_cfg->channel_num/4*1000000LL/stream_cfg->sample_rate;\n\n        dma_buffer_delay_us\n        aac delay = 1024/sample*1000*n ms\n        aac delay = 1024/44100*1000*5 = 116ms\n        waterline delay = 1024/sample*1000*n ms\n        waterline delay = 1024/44100*1000*3 = 69ms\n        audio_delay = aac delay + waterline delay\n *********************************/\n#ifndef A2DP_PLAYER_PLAYBACK_DELAY_AAC_MTU\n#ifdef A2DP_PLAYER_PLAYBACK_WATER_LINE\n#define A2DP_PLAYER_PLAYBACK_DELAY_AAC_MTU (3)\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_AAC_MTU (6)\n#endif\n#endif\n#define A2DP_PLAYER_PLAYBACK_DELAY_AAC_BASE (23000)\n#define A2DP_PLAYER_PLAYBACK_DELAY_AAC_US                                      \\\n  (A2DP_PLAYER_PLAYBACK_DELAY_AAC_BASE * A2DP_PLAYER_PLAYBACK_DELAY_AAC_MTU)\n\n/********************************\n    AUD_BITS_16\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/2*1000000LL/stream_cfg->sample_rate;\n    AUD_BITS_24\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/4*1000000LL/stream_cfg->sample_rate;\n\n    sbc delay = 128/sample*n ms\n    sbc delay = 128/44100*45 = 130ms\n    sbc_delay = sbc delay(23219us)\n    waterline delay = 128/sample*SBC_FRAME_MTU*n ms\n    waterline delay = 128/44100*5*3 = 43ms\n    audio_delay = aac delay + waterline delay\n*********************************/\n#define A2DP_PLAYER_PLAYBACK_DELAY_SBC_FRAME_MTU (5)\n#ifndef A2DP_PLAYER_PLAYBACK_DELAY_SBC_MTU\n#ifdef A2DP_PLAYER_PLAYBACK_WATER_LINE\n#define A2DP_PLAYER_PLAYBACK_DELAY_SBC_MTU (35)\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_SBC_MTU (50)\n#endif\n#endif\n#define A2DP_PLAYER_PLAYBACK_DELAY_SBC_BASE (2800)\n#define A2DP_PLAYER_PLAYBACK_DELAY_SBC_US                                      \\\n  (A2DP_PLAYER_PLAYBACK_DELAY_SBC_BASE * A2DP_PLAYER_PLAYBACK_DELAY_SBC_MTU)\n\n#if defined(A2DP_LHDC_ON)\n/********************************\n    AUD_BITS_16\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/2*1000000LL/stream_cfg->sample_rate;\n    AUD_BITS_24\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/4*1000000LL/stream_cfg->sample_rate;\n\n    lhdc delay = 512/sample*1000*n ms\n    lhdc delay =    *28 = 149ms\n    audio_delay = lhdc delay\n\n    lhdc_v2 delay = 512/96000*1000*38 =  202ms\n    lhdc_v3 delay = 256/96000*1000*58 = 154ms\n    audio_delay = lhdc_v3 delay\n*********************************/\n#if defined(IBRT)\n#if defined(A2DP_LHDC_V3)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_MTU (68)\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_MTU (38)\n#endif\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_MTU (28)\n#endif\n\n#if defined(A2DP_LHDC_V3)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_BASE (2666)\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_BASE (5333)\n#endif\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_US                               \\\n  (A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_MTU *                                 \\\n   A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_BASE)\n\n/********************************\n    AUD_BITS_16\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/2*1000000LL/stream_cfg->sample_rate;\n    AUD_BITS_24\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/4*1000000LL/stream_cfg->sample_rate;\n\n    lhdc delay = 512/sample*1000*n ms\n    lhdc_v2 delay = 512/48000*1000*14 = 149ms\n    lhdc_v3 delay = 256/48000*1000*28 = 149ms\n    audio_delay = lhdc delay\n*********************************/\n#if defined(A2DP_LHDC_V3)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_MTU (38)\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_MTU (14)\n#endif\n\n#if defined(A2DP_LHDC_V3)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_BASE (5333)\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_BASE (10666)\n#endif\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_US                             \\\n  (A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_MTU *                               \\\n   A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_BASE)\n\n/********************************\n    AUD_BITS_16\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/2*1000000LL/stream_cfg->sample_rate;\n    AUD_BITS_24\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/4*1000000LL/stream_cfg->sample_rate;\n\n    lhdc delay = 512/sample*1000*n ms\n    lhdc_v2 delay = 512/48000*1000*9 = 96ms\n    lhdc_v3 delay = 256/48000*1000*19 = 101ms\n    audio_delay = lhdc delay\n*********************************/\n#if defined(IBRT)\n#if defined(A2DP_LHDC_V3)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_MTU (15)\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_MTU (9)\n#endif\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_MTU (6)\n#endif\n\n#if defined(A2DP_LHDC_V3)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_BASE (5333)\n#else\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_BASE (10666)\n#endif\n#define A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_US                                 \\\n  (A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_MTU *                                   \\\n   A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_BASE)\n#endif\n\n#if defined(A2DP_LDAC_ON)\n/********************************\n    AUD_BITS_16\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/2*1000000LL/stream_cfg->sample_rate;\n    AUD_BITS_24\n    dma_buffer_delay_us =\nstream_cfg->data_size/stream_cfg->channel_num/4*1000000LL/stream_cfg->sample_rate;\n\n    ldac delay = 256/sample*1000*n ms\n    ldac delay = 256/96000*1000*56 = 149ms\n    audio_delay = ldac delay\n*********************************/\n#define A2DP_PLAYER_PLAYBACK_DELAY_LDAC_FRAME_MTU (5)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LDAC_MTU (60)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LDAC_BASE (2667)\n#define A2DP_PLAYER_PLAYBACK_DELAY_LDAC_US                                     \\\n  (A2DP_PLAYER_PLAYBACK_DELAY_LDAC_BASE * A2DP_PLAYER_PLAYBACK_DELAY_LDAC_MTU)\n#endif\n\nenum BT_STREAM_TRIGGER_STATUS_T {\n  BT_STREAM_TRIGGER_STATUS_NULL = 0,\n  BT_STREAM_TRIGGER_STATUS_INIT,\n  BT_STREAM_TRIGGER_STATUS_WAIT,\n  BT_STREAM_TRIGGER_STATUS_OK,\n};\n\nstatic uint32_t tg_acl_trigger_time = 0;\nstatic uint32_t tg_acl_trigger_start_time = 0;\nstatic uint32_t tg_acl_trigger_init_time = 0;\nstatic enum BT_STREAM_TRIGGER_STATUS_T bt_stream_trigger_status =\n    BT_STREAM_TRIGGER_STATUS_NULL;\n\nvoid app_bt_stream_playback_irq_notification(enum AUD_STREAM_ID_T id,\n                                             enum AUD_STREAM_T stream);\n\ninline void\napp_bt_stream_trigger_stauts_set(enum BT_STREAM_TRIGGER_STATUS_T stauts) {\n  TRACE_AUD_STREAM_I(\"[STRM_TRIG] stauts_set %d->%d\", bt_stream_trigger_status,\n                     stauts);\n  bt_stream_trigger_status = stauts;\n}\n\ninline enum BT_STREAM_TRIGGER_STATUS_T app_bt_stream_trigger_stauts_get(void) {\n  TRACE_AUD_STREAM_I(\"[STRM_TRIG] stauts_get:%d\", bt_stream_trigger_status);\n  return bt_stream_trigger_status;\n}\n\nuint32_t app_bt_stream_get_dma_buffer_delay_us(void) {\n  uint32_t dma_buffer_delay_us = 0;\n  struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n  if (!af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg,\n                         false)) {\n    if (stream_cfg->bits <= AUD_BITS_16) {\n      dma_buffer_delay_us = stream_cfg->data_size / stream_cfg->channel_num /\n                            2 * 1000000LL / stream_cfg->sample_rate;\n    } else {\n      dma_buffer_delay_us = stream_cfg->data_size / stream_cfg->channel_num /\n                            4 * 1000000LL / stream_cfg->sample_rate;\n    }\n  }\n  return dma_buffer_delay_us;\n}\n\nuint32_t app_bt_stream_get_dma_buffer_samples(void) {\n  uint32_t dma_buffer_delay_samples = 0;\n  struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n  if (!af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg,\n                         false)) {\n    if (stream_cfg->bits <= AUD_BITS_16) {\n      dma_buffer_delay_samples =\n          stream_cfg->data_size / stream_cfg->channel_num / 2;\n    } else {\n      dma_buffer_delay_samples =\n          stream_cfg->data_size / stream_cfg->channel_num / 4;\n    }\n  }\n  return dma_buffer_delay_samples;\n}\n\n#if defined(IBRT)\ntypedef enum {\n  APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_IDLE,\n  APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_ONPROCESS,\n  APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_SYNCOK,\n} APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_TYPE;\n\n#define APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_CNT_LIMIT (100)\nvoid app_bt_stream_ibrt_set_trigger_time(\n    APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger);\nvoid app_bt_stream_ibrt_auto_synchronize_initsync_start(\n    APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger);\nstatic APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T\n    app_bt_stream_ibrt_auto_synchronize_trigger;\nstatic uint32_t app_bt_stream_ibrt_auto_synchronize_cnt = 0;\nint app_bt_stream_ibrt_audio_mismatch_stopaudio(void);\nvoid app_bt_stream_ibrt_auto_synchronize_hungup(void);\nvoid app_bt_stream_ibrt_auto_synchronize_stop(void);\nstatic APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_TYPE ibrt_auto_synchronize_status =\n    APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_IDLE;\n\nint app_bt_stream_ibrt_auto_synchronize_status_set(\n    APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_TYPE status) {\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNC] status:%d\", status);\n  ibrt_auto_synchronize_status = status;\n  return 0;\n}\n\nAPP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_TYPE\napp_bt_stream_ibrt_auto_synchronize_status_get(void) {\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNC] status:%d\", ibrt_auto_synchronize_status);\n  return ibrt_auto_synchronize_status;\n}\n\nint app_bt_stream_ibrt_auto_synchronize_trigger_start(\n    btif_media_header_t *header, unsigned char *buf, unsigned int len) {\n  APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger =\n      &app_bt_stream_ibrt_auto_synchronize_trigger;\n  app_bt_stream_ibrt_auto_synchronize_stop();\n  TRACE_AUD_STREAM_I(\n      \"[AUTO_SYNC] trigger:%d Seq:%d timestamp:%d SubSeq:%d/%d currSeq:%d\",\n      sync_trigger->trigger_time, sync_trigger->audio_info.sequenceNumber,\n      sync_trigger->audio_info.timestamp,\n      sync_trigger->audio_info.curSubSequenceNumber,\n      sync_trigger->audio_info.totalSubSequenceNumber, header->sequenceNumber);\n\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    if (sync_trigger->trigger_time >=\n        bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle)) {\n      app_bt_stream_ibrt_set_trigger_time(sync_trigger);\n    } else {\n      TRACE_AUD_STREAM_W(\"[AUTO_SYNC]failed trigger(%d)-->tg(%d) need resume\",\n                         bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle),\n                         sync_trigger->trigger_time);\n      app_ibrt_if_force_audio_retrigger();\n      // app_tws_ibrt_audio_sync_mismatch_resume_notify();\n    }\n  } else {\n    TRACE_AUD_STREAM_I(\"[AUTO_SYNC] ok but currRole:%d mismatch\\n\",\n                       p_ibrt_ctrl->current_role);\n    app_ibrt_if_force_audio_retrigger();\n  }\n\n  return 0;\n}\n\nint app_bt_stream_ibrt_auto_synchronize_dataind_cb(btif_media_header_t *header,\n                                                   unsigned char *buf,\n                                                   unsigned int len) {\n  APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger =\n      &app_bt_stream_ibrt_auto_synchronize_trigger;\n  bool synchronize_ok = false;\n  int32_t timestamp_diff = 0;\n  int32_t dma_buffer_samples = 0;\n  int32_t frame_totle_samples = 0;\n\n  frame_totle_samples = sync_trigger->audio_info.totalSubSequenceNumber *\n                        sync_trigger->audio_info.frame_samples;\n  timestamp_diff = sync_trigger->audio_info.timestamp - header->timestamp;\n\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNC][DATAIND] seq:%d/%d timestamp:%d/%d cnt:%d\",\n                     header->sequenceNumber,\n                     sync_trigger->audio_info.sequenceNumber, header->timestamp,\n                     sync_trigger->audio_info.timestamp,\n                     app_bt_stream_ibrt_auto_synchronize_cnt);\n\n  if (++app_bt_stream_ibrt_auto_synchronize_cnt >\n      APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_CNT_LIMIT) {\n    app_bt_stream_ibrt_auto_synchronize_stop();\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNC][DATAIND] SYNCHRONIZE_CNT_LIMIT, we need force retrigger\");\n    app_ibrt_if_force_audio_retrigger();\n  } else if (app_tws_ibrt_mobile_link_connected()) {\n    app_bt_stream_ibrt_auto_synchronize_stop();\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNC][DATAIND] find role to master, we need force retrigger\");\n    app_ibrt_if_force_audio_retrigger();\n  } else if (sync_trigger->audio_info.sequenceNumber < header->sequenceNumber) {\n    app_bt_stream_ibrt_auto_synchronize_stop();\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNC][DATAIND] seq timestamp:%d/%d mismatch need resume\",\n        header->timestamp, sync_trigger->audio_info.timestamp);\n    app_ibrt_if_force_audio_retrigger();\n  } else {\n    if (header->sequenceNumber >= sync_trigger->audio_info.sequenceNumber &&\n        !sync_trigger->audio_info.totalSubSequenceNumber) {\n      synchronize_ok = true;\n    } else if (header->timestamp == sync_trigger->audio_info.timestamp) {\n      synchronize_ok = true;\n    }\n\n    dma_buffer_samples = app_bt_stream_get_dma_buffer_samples() / 2;\n\n    if (sync_trigger->audio_info.timestamp >= header->timestamp &&\n        sync_trigger->audio_info.totalSubSequenceNumber) {\n      if (timestamp_diff < dma_buffer_samples) {\n        TRACE_AUD_STREAM_I(\"[AUTO_SYNC][DATAIND] timestamp_diff < \"\n                           \"dma_buffer_samples synchronize ok\");\n        synchronize_ok = true;\n      } else if (timestamp_diff < frame_totle_samples) {\n        TRACE_AUD_STREAM_I(\"[AUTO_SYNC][DATAIND] timestamp_diff < \"\n                           \"frame_totle_samples synchronize ok\");\n        synchronize_ok = true;\n      }\n    }\n\n    if (!synchronize_ok &&\n        header->sequenceNumber >= sync_trigger->audio_info.sequenceNumber) {\n\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNC][DATAIND] timestamp %d vs %d\",\n                         sync_trigger->audio_info.timestamp - header->timestamp,\n                         frame_totle_samples);\n      if ((sync_trigger->audio_info.timestamp - header->timestamp) <=\n          (uint32_t)(frame_totle_samples * 3)) {\n        sync_trigger->audio_info.sequenceNumber++;\n        TRACE_AUD_STREAM_I(\n            \"[AUTO_SYNC][DATAIND] timestamp try sequenceNumber:%d\",\n            header->sequenceNumber);\n      }\n    }\n\n    // flush all\n    a2dp_audio_synchronize_dest_packet_mut(0);\n\n    if (synchronize_ok) {\n      A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info;\n      if (a2dp_audio_lastframe_info_get(&lastframe_info) < 0) {\n        TRACE_AUD_STREAM_I(\n            \"[AUTO_SYNC][DATAIND]synchronize ok but lastframe error\");\n        goto exit;\n      }\n\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNC][DATAIND]synchronize ok timestamp_diff:%d \"\n                         \"frame_samples:%d\",\n                         timestamp_diff, lastframe_info.frame_samples);\n      sync_trigger->trigger_type = APP_TWS_IBRT_AUDIO_TRIGGER_TYPE_LOCAL;\n      sync_trigger->audio_info.sequenceNumber = header->sequenceNumber;\n      sync_trigger->audio_info.timestamp = header->timestamp;\n      if (sync_trigger->audio_info.totalSubSequenceNumber) {\n        sync_trigger->audio_info.curSubSequenceNumber =\n            timestamp_diff / lastframe_info.frame_samples;\n        TRACE_AUD_STREAM_I(\n            \"[AUTO_SYNC][DATAIND]synchronize ok tstmp_diff:%d/%d SubSeq:%d\",\n            timestamp_diff, sync_trigger->audio_info.frame_samples,\n            sync_trigger->audio_info.curSubSequenceNumber);\n      } else {\n        sync_trigger->audio_info.curSubSequenceNumber = 0;\n      }\n      sync_trigger->audio_info.totalSubSequenceNumber =\n          lastframe_info.totalSubSequenceNumber;\n      sync_trigger->audio_info.frame_samples = lastframe_info.frame_samples;\n      if (sync_trigger->audio_info.totalSubSequenceNumber &&\n          sync_trigger->audio_info.curSubSequenceNumber >=\n              sync_trigger->audio_info.totalSubSequenceNumber) {\n        TRACE_AUD_STREAM_W(\"[AUTO_SYNC][DATAIND]synchronize ok but sbc & \"\n                           \"timestamp is ms so force trigger\");\n        app_bt_stream_ibrt_auto_synchronize_stop();\n        app_ibrt_if_force_audio_retrigger();\n      } else {\n        a2dp_audio_detect_store_packet_callback_register(\n            app_bt_stream_ibrt_auto_synchronize_trigger_start);\n      }\n    } else {\n      a2dp_audio_detect_first_packet();\n    }\n  }\nexit:\n  return 0;\n}\n\nvoid app_bt_stream_ibrt_auto_synchronize_start(\n    APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger) {\n  TRACE_AUD_STREAM_I(\n      \"[AUTO_SYNC][DATAIND] trigger_time:%d seq:%d timestamp:%d SubSeq:%d/%d\",\n      sync_trigger->trigger_time, sync_trigger->audio_info.sequenceNumber,\n      sync_trigger->audio_info.timestamp,\n      sync_trigger->audio_info.curSubSequenceNumber,\n      sync_trigger->audio_info.totalSubSequenceNumber);\n  app_bt_stream_ibrt_auto_synchronize_status_set(\n      APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_ONPROCESS);\n  app_bt_stream_ibrt_auto_synchronize_cnt = 0;\n  app_bt_stream_ibrt_auto_synchronize_trigger = *sync_trigger;\n  a2dp_audio_detect_next_packet_callback_register(\n      app_bt_stream_ibrt_auto_synchronize_dataind_cb);\n  a2dp_audio_detect_first_packet();\n}\n\nvoid app_bt_stream_ibrt_auto_synchronize_hungup(void) {\n  a2dp_audio_detect_next_packet_callback_register(NULL);\n  a2dp_audio_detect_store_packet_callback_register(NULL);\n}\n\nvoid app_bt_stream_ibrt_auto_synchronize_stop(void) {\n  app_bt_stream_ibrt_auto_synchronize_hungup();\n  app_bt_stream_ibrt_auto_synchronize_cnt = 0;\n  app_bt_stream_ibrt_auto_synchronize_status_set(\n      APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_IDLE);\n}\n\nbool app_bt_stream_ibrt_auto_synchronize_on_porcess(void) {\n  bool nRet = true;\n  APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_TYPE synchronize_status =\n      app_bt_stream_ibrt_auto_synchronize_status_get();\n  if (synchronize_status == APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_IDLE) {\n    nRet = false;\n  }\n  return nRet;\n}\n\nvoid app_bt_stream_ibrt_start_sbc_player_callback(uint32_t status,\n                                                  uint32_t param) {\n  if (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC)) {\n    TRACE_AUD_STREAM_I(\n        \"start_sbc_player_cb trigger(%d)-->tg(%d)\", param,\n        ((APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *)(uintptr_t)param)->trigger_time);\n    app_bt_stream_ibrt_set_trigger_time(\n        (APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *)(uintptr_t)param);\n  } else {\n    TRACE_AUD_STREAM_I(\"start_sbc_player_cb try again\");\n    app_audio_manager_sendrequest_need_callback(\n        APP_BT_STREAM_MANAGER_START, BT_STREAM_SBC, BT_DEVICE_ID_1,\n        MAX_RECORD_NUM,\n        (uint32_t)(uintptr_t)app_bt_stream_ibrt_start_sbc_player_callback,\n        (uint32_t)param);\n  }\n}\n\nint app_bt_stream_ibrt_start_sbc_player(\n    APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger) {\n  TRACE_AUD_STREAM_I(\"start_sbc_player tg(%d)\", sync_trigger->trigger_time);\n  app_audio_manager_sendrequest_need_callback(\n      APP_BT_STREAM_MANAGER_START, BT_STREAM_SBC, BT_DEVICE_ID_1,\n      MAX_RECORD_NUM,\n      (uint32_t)(uintptr_t)app_bt_stream_ibrt_start_sbc_player_callback,\n      (uint32_t)(uintptr_t)sync_trigger);\n  return 0;\n}\n\nuint16_t app_bt_stream_ibrt_trigger_seq_diff_calc(int32_t dma_samples,\n                                                  int32_t frame_samples,\n                                                  int32_t total_subseq,\n                                                  int32_t interval) {\n  float seq_factor = 1.0f;\n  if (total_subseq) {\n    seq_factor = (float)(dma_samples / frame_samples) / (float)total_subseq;\n  } else {\n    seq_factor = (float)(dma_samples / frame_samples);\n  }\n  return (uint16_t)(seq_factor * (float)interval);\n}\n\n#define MOBILE_LINK_PLAYBACK_INFO_TRIG_DUMMY_DMA_CNT (5)\n#define SYNCHRONIZE_DATAIND_CNT_LIMIT (25)\n\nstatic int synchronize_need_discards_dma_cnt = 0;\nstatic int synchronize_dataind_cnt = 0;\n\nint app_bt_stream_ibrt_auto_synchronize_initsync_dataind_cb_v2(\n    btif_media_header_t *header, unsigned char *buf, unsigned int len) {\n  bool synchronize_ok = false;\n  bool discards_samples_finished = false;\n  int dest_discards_samples = 0;\n  uint32_t list_samples = 0;\n  uint32_t curr_ticks = 0;\n  A2DP_AUDIO_HEADFRAME_INFO_T headframe_info;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger =\n      &app_bt_stream_ibrt_auto_synchronize_trigger;\n\n  synchronize_dataind_cnt++;\n  if (app_tws_ibrt_mobile_link_connected()) {\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNCV2] mobile_link is connect retrigger because role switch\");\n    app_ibrt_if_force_audio_retrigger();\n    return 0;\n  }\n\n  if (synchronize_dataind_cnt >= SYNCHRONIZE_DATAIND_CNT_LIMIT) {\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNCV2] mobile_link is connect retrigger because CNT_LIMIT\");\n    app_ibrt_if_force_audio_retrigger();\n    return 0;\n  }\n\n  dest_discards_samples = app_bt_stream_get_dma_buffer_samples() / 2 *\n                          synchronize_need_discards_dma_cnt;\n  a2dp_audio_convert_list_to_samples(&list_samples);\n  if ((int)list_samples > dest_discards_samples) {\n    discards_samples_finished = true;\n    a2dp_audio_discards_samples(dest_discards_samples);\n  }\n  a2dp_audio_decoder_headframe_info_get(&headframe_info);\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNCV2] sample:%d->%d seq:%d sub_seq:%d/%d\",\n                     list_samples, dest_discards_samples,\n                     headframe_info.sequenceNumber,\n                     headframe_info.curSubSequenceNumber,\n                     headframe_info.totalSubSequenceNumber);\n\n  curr_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle);\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNCV2] trig:%x/%x\", curr_ticks,\n                     sync_trigger->trigger_time);\n\n  if (discards_samples_finished) {\n    if (sync_trigger->trigger_time > curr_ticks) {\n      synchronize_ok = true;\n    } else {\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNCV2] synchronize_failed\");\n      app_ibrt_if_force_audio_retrigger();\n      return 0;\n    }\n  }\n  if (synchronize_ok) {\n    TRACE_AUD_STREAM_I(\"[AUTO_SYNCV2] synchronize_ok\");\n    tg_acl_trigger_time = sync_trigger->trigger_time;\n    btdrv_syn_trigger_codec_en(1);\n    btdrv_syn_clr_trigger();\n    btdrv_enable_playback_triggler(ACL_TRIGGLE_MODE);\n    bt_syn_set_tg_ticks(sync_trigger->trigger_time, p_ibrt_ctrl->ibrt_conhandle,\n                        BT_TRIG_SLAVE_ROLE);\n    app_tws_ibrt_audio_analysis_start(sync_trigger->handler_cnt,\n                                      AUDIO_ANALYSIS_CHECKER_INTERVEL_INVALID);\n    app_tws_ibrt_audio_sync_start();\n    app_tws_ibrt_audio_sync_new_reference(sync_trigger->factor_reference);\n    TRACE_AUD_STREAM_I(\"[AUTO_SYNCV2] trigger curr(%d)-->tg(%d)\",\n                       bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle),\n                       sync_trigger->trigger_time);\n    synchronize_need_discards_dma_cnt = 0;\n    synchronize_dataind_cnt = 0;\n    a2dp_audio_detect_first_packet_clear();\n    a2dp_audio_detect_next_packet_callback_register(NULL);\n    a2dp_audio_detect_store_packet_callback_register(NULL);\n  } else {\n    a2dp_audio_detect_first_packet();\n  }\n\n  return 0;\n}\n\nvoid app_bt_stream_ibrt_mobile_link_playback_info_receive(\n    APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger) {\n  uint32_t tg_tick = 0;\n  uint32_t next_dma_cnt = 0;\n  A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info;\n  A2DP_AUDIO_SYNCFRAME_INFO_T sync_info;\n  A2DP_AUDIO_HEADFRAME_INFO_T headframe_info;\n  APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger_loc =\n      &app_bt_stream_ibrt_auto_synchronize_trigger;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  TRACE_AUD_STREAM_I(\n      \"[AUTO_SYNCV2][INFO_RECV] session:%d hdl:%d clk:%d cnt:%d seq:%d/%d/%d\",\n      sync_trigger->a2dp_session, sync_trigger->handler_cnt,\n      sync_trigger->trigger_bt_clk, sync_trigger->trigger_bt_cnt,\n      sync_trigger->audio_info.sequenceNumber,\n      sync_trigger->audio_info.curSubSequenceNumber,\n      sync_trigger->audio_info.totalSubSequenceNumber);\n\n  if (app_bt_stream_ibrt_auto_synchronize_on_porcess()) {\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNCV2][INFO_RECV] auto_synchronize_on_porcess skip it\");\n    return;\n  }\n\n  if (!app_bt_is_a2dp_streaming(BTIF_DEVICE_ID_1)) {\n    TRACE_AUD_STREAM_W(\"[AUTO_SYNCV2][INFO_RECV] streaming not ready skip it\");\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    return;\n  }\n\n  if (a2dp_ibrt_session_get() != sync_trigger->a2dp_session) {\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNCV2][INFO_RECV] session mismatch skip it loc:%d rmt:%d\",\n        a2dp_ibrt_session_get(), sync_trigger->a2dp_session);\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNCV2][INFO_RECV] session froce resume and try retrigger\");\n    a2dp_ibrt_session_set(sync_trigger->a2dp_session);\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    return;\n  }\n\n  if (a2dp_audio_lastframe_info_get(&lastframe_info) < 0) {\n    TRACE_AUD_STREAM_W(\n        \"[AUTO_SYNCV2][INFO_RECV] lastframe not ready mismatch_stopaudio\");\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    return;\n  }\n\n  *sync_trigger_loc = *sync_trigger;\n\n  sync_info.sequenceNumber = sync_trigger->audio_info.sequenceNumber;\n  sync_info.timestamp = sync_trigger->audio_info.timestamp;\n  sync_info.curSubSequenceNumber =\n      sync_trigger->audio_info.curSubSequenceNumber;\n  sync_info.totalSubSequenceNumber =\n      sync_trigger->audio_info.totalSubSequenceNumber;\n  sync_info.frame_samples = sync_trigger->audio_info.frame_samples;\n  if (a2dp_audio_synchronize_packet(&sync_info,\n                                    A2DP_AUDIO_SYNCFRAME_MASK_ALL)) {\n    TRACE_AUD_STREAM_W(\"[AUTO_SYNCV2][INFO_RECV] synchronize_packe mismatch\");\n    app_ibrt_if_force_audio_retrigger();\n    return;\n  }\n\n  a2dp_audio_decoder_headframe_info_get(&headframe_info);\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNCV2][INFO_RECV] sync with master packet step1 \"\n                     \"seq:%d sub_seq:%d/%d\",\n                     headframe_info.sequenceNumber,\n                     headframe_info.curSubSequenceNumber,\n                     headframe_info.totalSubSequenceNumber);\n  a2dp_audio_discards_samples(lastframe_info.list_samples);\n  a2dp_audio_decoder_headframe_info_get(&headframe_info);\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNCV2][INFO_RECV] sync with master packet step2 \"\n                     \"seq:%d sub_seq:%d/%d\",\n                     headframe_info.sequenceNumber,\n                     headframe_info.curSubSequenceNumber,\n                     headframe_info.totalSubSequenceNumber);\n\n  uint32_t btclk;\n  uint16_t btcnt;\n  uint32_t mobile_master_clk = 0;\n  uint16_t mobile_master_cnt = 0;\n  int64_t mobile_master_us = 0;\n  btclk = btdrv_syn_get_curr_ticks() / 2;\n  btcnt = 0;\n  app_tws_ibrt_audio_mobile_clkcnt_get(btclk, btcnt, &mobile_master_clk,\n                                       &mobile_master_cnt);\n  mobile_master_us = (int64_t)mobile_master_clk * (int64_t)SLOT_SIZE +\n                     (int64_t)mobile_master_cnt;\n\n  uint32_t rmt_mobile_master_clk = sync_trigger->trigger_bt_clk;\n  uint16_t rmt_mobile_master_cnt = sync_trigger->trigger_bt_cnt;\n  int64_t rmt_mobile_master_us = 0;\n  int64_t tmp_mobile_master_us = 0;\n  rmt_mobile_master_us = (int64_t)rmt_mobile_master_clk * (int64_t)SLOT_SIZE +\n                         (int64_t)rmt_mobile_master_cnt;\n\n  uint32_t dma_buffer_us = 0;\n  dma_buffer_us = app_bt_stream_get_dma_buffer_delay_us() / 2;\n\n  tmp_mobile_master_us = rmt_mobile_master_us;\n  do {\n    if (tmp_mobile_master_us - mobile_master_us >= 0) {\n      break;\n    }\n    tmp_mobile_master_us += dma_buffer_us;\n    next_dma_cnt++;\n  } while (1);\n  next_dma_cnt += MOBILE_LINK_PLAYBACK_INFO_TRIG_DUMMY_DMA_CNT;\n  tmp_mobile_master_us +=\n      dma_buffer_us * (MOBILE_LINK_PLAYBACK_INFO_TRIG_DUMMY_DMA_CNT - 1);\n  synchronize_need_discards_dma_cnt =\n      next_dma_cnt + a2dp_audio_frame_delay_get() - 1;\n  synchronize_dataind_cnt = 0;\n  TRACE_AUD_STREAM_I(\n      \"[AUTO_SYNCV2][INFO_RECV] loc:%08x%08x rmt:%08x%08x tg:%08x%08x\",\n      (uint32_t)((uint64_t)mobile_master_us >> 32U),\n      (uint32_t)((uint64_t)mobile_master_us & 0xffffffff),\n      (uint32_t)((uint64_t)rmt_mobile_master_us >> 32U),\n      (uint32_t)((uint64_t)rmt_mobile_master_us & 0xffffffff),\n      (uint32_t)((uint64_t)tmp_mobile_master_us >> 32U),\n      (uint32_t)((uint64_t)tmp_mobile_master_us & 0xffffffff));\n\n  tmp_mobile_master_us = tmp_mobile_master_us / SLOT_SIZE;\n\n  tg_tick = tmp_mobile_master_us * 2;\n  tg_tick &= 0x0fffffff;\n\n  sync_trigger_loc->trigger_type = APP_TWS_IBRT_AUDIO_TRIGGER_TYPE_LOCAL;\n  sync_trigger_loc->trigger_time = tg_tick;\n  sync_trigger_loc->handler_cnt += next_dma_cnt;\n  a2dp_audio_detect_next_packet_callback_register(\n      app_bt_stream_ibrt_auto_synchronize_initsync_dataind_cb_v2);\n  a2dp_audio_detect_first_packet();\n\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNCV2][INFO_RECV] mobile clk:%x/%x tg:%x\",\n                     bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle) / 2,\n                     mobile_master_clk, tg_tick / 2);\n\n  TRACE_AUD_STREAM_I(\n      \"[AUTO_SYNCV2][INFO_RECV] master_us:%x/%x/%x dma_cnt:%d/%d\",\n      (int32_t)mobile_master_us, (int32_t)rmt_mobile_master_us,\n      (int32_t)tmp_mobile_master_us, next_dma_cnt,\n      sync_trigger_loc->handler_cnt);\n}\n\nvoid app_bt_stream_ibrt_set_trigger_time(\n    APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger) {\n  uint32_t curr_ticks = 0;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  uint32_t tg_tick = sync_trigger->trigger_time;\n  A2DP_AUDIO_SYNCFRAME_INFO_T sync_info;\n  int synchronize_ret;\n  A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info;\n  A2DP_AUDIO_HEADFRAME_INFO_T headframe_info;\n\n  if (app_bt_stream_ibrt_auto_synchronize_on_porcess()) {\n    TRACE_AUD_STREAM_W(\n        \"[STRM_TRIG][A2DP][IBRT] auto_synchronize_on_porcess skip it\");\n    return;\n  }\n\n  if (!app_bt_is_a2dp_streaming(BTIF_DEVICE_ID_1)) {\n    TRACE_AUD_STREAM_W(\"[STRM_TRIG][A2DP][IBRT] streaming not ready skip it\");\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    return;\n  }\n\n  if (a2dp_ibrt_session_get() != sync_trigger->a2dp_session) {\n    TRACE_AUD_STREAM_W(\n        \"[STRM_TRIG][A2DP][IBRT] session mismatch skip it loc:%d rmt:%d\",\n        a2dp_ibrt_session_get(), sync_trigger->a2dp_session);\n    TRACE_AUD_STREAM_W(\n        \"[STRM_TRIG][A2DP][IBRT] session froce resume and try retrigger\");\n    a2dp_ibrt_session_set(sync_trigger->a2dp_session);\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    return;\n  }\n\n  if (a2dp_audio_lastframe_info_get(&lastframe_info) < 0) {\n    TRACE_AUD_STREAM_W(\n        \"[STRM_TRIG][A2DP][IBRT] lastframe not ready mismatch_stopaudio\");\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    return;\n  }\n\n  if (a2dp_audio_decoder_headframe_info_get(&headframe_info) < 0) {\n    TRACE_AUD_STREAM_W(\n        \"[STRM_TRIG][A2DP][IBRT] lastframe not ready mismatch_stopaudio\");\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    goto exit;\n  }\n  TRACE_AUD_STREAM_W(\"[STRM_TRIG][A2DP][IBRT] info base_seq:%d/%d\",\n                     headframe_info.sequenceNumber,\n                     sync_trigger->sequenceNumberStart);\n\n  a2dp_audio_detect_next_packet_callback_register(NULL);\n  a2dp_audio_detect_store_packet_callback_register(NULL);\n\n  sync_info.sequenceNumber = sync_trigger->sequenceNumberStart;\n  synchronize_ret =\n      a2dp_audio_synchronize_packet(&sync_info, A2DP_AUDIO_SYNCFRAME_MASK_SEQ);\n  if (synchronize_ret) {\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][A2DP][IBRT] synchronize_packet failed\");\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    goto exit;\n  }\n\n  curr_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle);\n  if (tg_tick < curr_ticks) {\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][A2DP][IBRT] synchronize tick failed:%x->%x\",\n                       curr_ticks, tg_tick);\n    app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    goto exit;\n  }\n  sync_info.sequenceNumber = sync_trigger->audio_info.sequenceNumber;\n  sync_info.timestamp = sync_trigger->audio_info.timestamp;\n  sync_info.curSubSequenceNumber =\n      sync_trigger->audio_info.curSubSequenceNumber;\n  sync_info.totalSubSequenceNumber =\n      sync_trigger->audio_info.totalSubSequenceNumber;\n  sync_info.frame_samples = sync_trigger->audio_info.frame_samples;\n\n  if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    if (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC)) {\n      if (sync_trigger->trigger_type ==\n          APP_TWS_IBRT_AUDIO_TRIGGER_TYPE_INIT_SYNC) {\n        TRACE_AUD_STREAM_I(\n            \"[STRM_TRIG][A2DP][IBRT] TRIGGER_TYPE_INIT_SYNC needskip:%d\",\n            sync_trigger->trigger_skip_frame);\n        // limter to water line upper\n        uint32_t list_samples = 0;\n        uint32_t limter_water_line_samples = 0;\n        limter_water_line_samples =\n            (a2dp_audio_dest_packet_mut_get() * lastframe_info.list_samples);\n        a2dp_audio_convert_list_to_samples(&list_samples);\n        TRACE_AUD_STREAM_I(\"[STRM_TRIG][A2DP][IBRT] synchronize:%d/%d\",\n                           list_samples, limter_water_line_samples);\n        if (list_samples > limter_water_line_samples) {\n          TRACE_AUD_STREAM_I(\"[STRM_TRIG][A2DP][IBRT] skip discards:%d\",\n                             list_samples - limter_water_line_samples);\n          a2dp_audio_discards_samples(list_samples - limter_water_line_samples);\n        }\n        app_bt_stream_ibrt_auto_synchronize_initsync_start(sync_trigger);\n        app_bt_stream_ibrt_auto_synchronize_status_set(\n            APP_TWS_IBRT_AUDIO_SYNCHRONIZE_STATUS_SYNCOK);\n      }\n    } else if (!app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM)) {\n      TRACE_AUD_STREAM_I(\n          \"[STRM_TRIG][A2DP][IBRT] sbc player not active, so try to start it\");\n      app_bt_stream_ibrt_auto_synchronize_trigger = *sync_trigger;\n      app_bt_stream_ibrt_audio_mismatch_stopaudio();\n    }\n  } else {\n    TRACE_AUD_STREAM_W(\"[STRM_TRIG][A2DP][IBRT] Not Connected\");\n  }\nexit:\n  return;\n}\n\nvoid app_bt_stream_ibrt_audio_mismatch_resume(void) {\n  ibrt_a2dp_status_t a2dp_status;\n\n  a2dp_ibrt_sync_get_status(&a2dp_status);\n\n  TRACE_AUD_STREAM_I(\"[MISMATCH] resume state:%d\", a2dp_status.state);\n\n  if (a2dp_status.state == BTIF_AVDTP_STRM_STATE_STREAMING) {\n    if (app_tws_ibrt_mobile_link_connected()) {\n      TRACE_AUD_STREAM_I(\n          \"[MISMATCH] resume find role switch so force retrigger\");\n      app_ibrt_if_force_audio_retrigger();\n    } else {\n      app_tws_ibrt_audio_sync_mismatch_resume_notify();\n    }\n  }\n}\n\nvoid app_bt_stream_ibrt_audio_mismatch_stopaudio_cb(uint32_t status,\n                                                    uint32_t param) {\n  TRACE_AUD_STREAM_I(\"[MISMATCH] stopaudio_cb\");\n\n  if (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC)) {\n    TRACE_AUD_STREAM_I(\"[MISMATCH] stopaudio_cb try again\");\n    app_audio_manager_sendrequest_need_callback(\n        APP_BT_STREAM_MANAGER_STOP, BT_STREAM_SBC, BT_DEVICE_ID_1,\n        MAX_RECORD_NUM,\n        (uintptr_t)app_bt_stream_ibrt_audio_mismatch_stopaudio_cb,\n        (uint32_t)NULL);\n  } else {\n    app_bt_stream_ibrt_audio_mismatch_resume();\n  }\n}\n\nint app_bt_stream_ibrt_audio_mismatch_stopaudio(void) {\n  ibrt_a2dp_status_t a2dp_status;\n\n  a2dp_ibrt_sync_get_status(&a2dp_status);\n\n  TRACE_AUD_STREAM_I(\"[MISMATCH] stopaudio state:%d sco:%d sbc:%d media:%d\",\n                     a2dp_status.state,\n                     app_audio_manager_hfp_is_active(BT_DEVICE_ID_1),\n                     app_audio_manager_a2dp_is_active(BT_DEVICE_ID_1),\n                     app_bt_stream_isrun(APP_PLAY_BACK_AUDIO));\n\n  if (a2dp_status.state == BTIF_AVDTP_STRM_STATE_STREAMING) {\n    if (app_audio_manager_a2dp_is_active(BT_DEVICE_ID_1)) {\n      TRACE_AUD_STREAM_I(\"[MISMATCH] stopaudio\");\n      app_audio_sendrequest_param(APP_BT_STREAM_A2DP_SBC,\n                                  (uint8_t)APP_BT_SETTING_RESTART, 0,\n                                  APP_SYSFREQ_52M);\n      app_bt_stream_ibrt_audio_mismatch_resume();\n    } else {\n      if (app_ibrt_ui_is_profile_exchanged()) {\n        if (!bt_media_is_sbc_media_active()) {\n          TRACE_AUD_STREAM_I(\n              \"[MISMATCH] stopaudio not active resume it & force retrigger\");\n          app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n                                        BT_STREAM_SBC, BT_DEVICE_ID_1,\n                                        MAX_RECORD_NUM);\n          app_ibrt_if_force_audio_retrigger();\n        } else {\n          if (app_bt_stream_isrun(APP_PLAY_BACK_AUDIO)\n#ifdef MEDIA_PLAYER_SUPPORT\n              && app_play_audio_get_aud_id() == AUDIO_ID_BT_MUTE\n#endif\n          ) {\n            TRACE_AUD_STREAM_I(\"[MISMATCH] stopaudio resum on process skip it\");\n          } else {\n            TRACE_AUD_STREAM_I(\n                \"[MISMATCH] stopaudio cancel_media and force retrigger\");\n            app_ibrt_if_force_audio_retrigger();\n          }\n        }\n      } else {\n        TRACE_AUD_STREAM_I(\n            \"[MISMATCH] stopaudio profile not exchanged skip it\");\n      }\n    }\n  }\n\n  return 0;\n}\n#endif\n\nvoid app_bt_stream_set_trigger_time(uint32_t trigger_time_us) {\n  struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n  uint32_t curr_ticks = 0;\n  uint32_t dma_buffer_delay_us = 0;\n  uint32_t tg_acl_trigger_offset_time = 0;\n\n  if (trigger_time_us) {\n#if defined(IBRT)\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    uint16_t conhandle = INVALID_HANDLE;\n    if (app_tws_ibrt_mobile_link_connected()) {\n      conhandle = p_ibrt_ctrl->mobile_conhandle;\n      curr_ticks = bt_syn_get_curr_ticks(conhandle);\n    } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n      conhandle = p_ibrt_ctrl->ibrt_conhandle;\n      curr_ticks = bt_syn_get_curr_ticks(conhandle);\n    } else {\n      return;\n    }\n#else\n    curr_ticks = btdrv_syn_get_curr_ticks();\n#endif\n    af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg, false);\n    btdrv_syn_trigger_codec_en(0);\n    btdrv_syn_clr_trigger();\n\n    btdrv_enable_playback_triggler(ACL_TRIGGLE_MODE);\n\n    dma_buffer_delay_us = app_bt_stream_get_dma_buffer_delay_us();\n    dma_buffer_delay_us /= 2;\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][A2DP][SETTIME] %d-%d-%d dma_sz:%d dly:%d\",\n                       stream_cfg->sample_rate, stream_cfg->channel_num,\n                       stream_cfg->bits, stream_cfg->data_size,\n                       dma_buffer_delay_us);\n\n    tg_acl_trigger_offset_time =\n        US_TO_BTCLKS(trigger_time_us - dma_buffer_delay_us);\n    tg_acl_trigger_time = curr_ticks + tg_acl_trigger_offset_time;\n    tg_acl_trigger_start_time = curr_ticks;\n#if defined(IBRT)\n    bt_syn_set_tg_ticks(tg_acl_trigger_time, conhandle, BT_TRIG_SLAVE_ROLE);\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][A2DP][SETTIME] %d->%d trig_dly:%d aud_dly:%dus\",\n        curr_ticks, tg_acl_trigger_time, trigger_time_us - dma_buffer_delay_us,\n        trigger_time_us + dma_buffer_delay_us);\n#else\n    bt_syn_set_tg_ticks(tg_acl_trigger_time, 0, BT_TRIG_NONE_ROLE);\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][A2DP][SETTIME] %d->%d trig_dly:%d aud_dly:%dus\",\n        curr_ticks, tg_acl_trigger_time, trigger_time_us - dma_buffer_delay_us,\n        trigger_time_us + dma_buffer_delay_us);\n#endif\n\n    btdrv_syn_trigger_codec_en(1);\n    app_bt_stream_trigger_stauts_set(BT_STREAM_TRIGGER_STATUS_WAIT);\n  } else {\n    tg_acl_trigger_time = 0;\n    tg_acl_trigger_start_time = 0;\n    btdrv_syn_trigger_codec_en(0);\n    btdrv_syn_clr_trigger();\n    app_bt_stream_trigger_stauts_set(BT_STREAM_TRIGGER_STATUS_NULL);\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][A2DP][SETTIME] trigger clear\");\n  }\n}\n\nvoid app_bt_stream_trigger_result(void) {\n  uint32_t curr_ticks = 0;\n\n  if (tg_acl_trigger_time) {\n#if defined(IBRT)\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    if (app_tws_ibrt_mobile_link_connected()) {\n      curr_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->mobile_conhandle);\n      bt_syn_trig_checker(p_ibrt_ctrl->mobile_conhandle);\n    } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n      curr_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle);\n      bt_syn_trig_checker(p_ibrt_ctrl->ibrt_conhandle);\n    } else {\n      TRACE_AUD_STREAM_I(\n          \"[STRM_TRIG][A2DP][RESULT] mobile_link:%d %04x ibrt_link:%d %04x\",\n          app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n          app_tws_ibrt_slave_ibrt_link_connected(),\n          p_ibrt_ctrl->ibrt_conhandle);\n    }\n#else\n    curr_ticks = btdrv_syn_get_curr_ticks();\n#endif\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][A2DP][RESULT] trig:%d curr:%d tg:%d start:%d\",\n        (curr_ticks -\n         (uint32_t)US_TO_BTCLKS(app_bt_stream_get_dma_buffer_delay_us() / 2)),\n        curr_ticks, tg_acl_trigger_time, tg_acl_trigger_start_time);\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][A2DP][RESULT] tg_trig_diff:%d trig_diff:%d\",\n        (uint32_t)BTCLKS_TO_US(curr_ticks - tg_acl_trigger_time),\n        (uint32_t)BTCLKS_TO_US(curr_ticks - tg_acl_trigger_start_time));\n    app_bt_stream_set_trigger_time(0);\n    app_bt_stream_trigger_stauts_set(BT_STREAM_TRIGGER_STATUS_OK);\n    A2DP_AUDIO_HEADFRAME_INFO_T headframe_info;\n    a2dp_audio_decoder_headframe_info_get(&headframe_info);\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][A2DP][RESULT] synchronize_ok :%d\",\n                       headframe_info.sequenceNumber);\n  }\n}\n\nvoid app_bt_stream_playback_irq_notification(enum AUD_STREAM_ID_T id,\n                                             enum AUD_STREAM_T stream) {\n  if (id != AUD_STREAM_ID_0 || stream != AUD_STREAM_PLAYBACK) {\n    return;\n  }\n  app_bt_stream_trigger_result();\n#if defined(IBRT)\n  app_tws_ibrt_audio_analysis_interrupt_tick();\n#endif\n}\nextern void a2dp_audio_set_mtu_limit(uint8_t mut);\nextern float a2dp_audio_latency_factor_get(void);\nextern uint8_t a2dp_lhdc_config_llc_get(void);\n\nvoid app_bt_stream_trigger_init(void) {\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (app_tws_ibrt_mobile_link_connected()) {\n    tg_acl_trigger_init_time =\n        bt_syn_get_curr_ticks(p_ibrt_ctrl->mobile_conhandle);\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    tg_acl_trigger_init_time =\n        bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle);\n  } else {\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][A2DP][INIT] mobile_link:%d %04x ibrt_link:%d %04x\",\n        app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n        app_tws_ibrt_slave_ibrt_link_connected(), p_ibrt_ctrl->ibrt_conhandle);\n  }\n#else\n  tg_acl_trigger_init_time = btdrv_syn_get_curr_ticks();\n#endif\n  app_bt_stream_set_trigger_time(0);\n#ifdef PLAYBACK_USE_I2S\n  af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, false);\n  af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, true);\n#else\n  af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, false);\n  af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, true);\n#endif\n  app_bt_stream_trigger_stauts_set(BT_STREAM_TRIGGER_STATUS_INIT);\n}\n\nvoid app_bt_stream_trigger_deinit(void) { app_bt_stream_set_trigger_time(0); }\n\nvoid app_bt_stream_trigger_start(uint8_t offset) {\n  float tg_trigger_time = 0;\n  uint32_t curr_ticks;\n  struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n  af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg, false);\n\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (app_tws_ibrt_mobile_link_connected()) {\n    curr_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->mobile_conhandle);\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    curr_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle);\n  } else {\n    return;\n  }\n#else\n  curr_ticks = btdrv_syn_get_curr_ticks();\n#endif\n\n  TRACE_AUD_STREAM_I(\n      \"[STRM_TRIG][A2DP][START] init(%d)-->set_trig(%d) %dus\",\n      tg_acl_trigger_init_time, curr_ticks,\n      (uint32_t)BTCLKS_TO_US(curr_ticks - tg_acl_trigger_init_time));\n\n#if defined(A2DP_AAC_ON)\n  if (bt_sbc_player_get_codec_type() == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n    tg_trigger_time =\n        A2DP_PLAYER_PLAYBACK_DELAY_AAC_US * a2dp_audio_latency_factor_get();\n    tg_trigger_time += offset * A2DP_PLAYER_PLAYBACK_DELAY_AAC_BASE;\n#if (A2DP_DECODER_VER < 2)\n    a2dp_audio_set_mtu_limit(A2DP_PLAYER_PLAYBACK_DELAY_AAC_MTU);\n#endif\n  } else\n#endif\n      if (bt_sbc_player_get_codec_type() == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n#if defined(A2DP_SCALABLE_ON)\n    if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n      if (stream_cfg->sample_rate > AUD_SAMPRATE_48000) {\n        tg_trigger_time = A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_US *\n                          a2dp_audio_latency_factor_get();\n\n        tg_trigger_time +=\n            offset * A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_BASE;\n#if (A2DP_DECODER_VER < 2)\n        a2dp_audio_set_mtu_limit(A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_MTU);\n#endif\n      } else {\n        tg_trigger_time = A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_US *\n                          a2dp_audio_latency_factor_get();\n        tg_trigger_time +=\n            offset * A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_BASE;\n#if (A2DP_DECODER_VER < 2)\n        a2dp_audio_set_mtu_limit(\n            A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_MTU);\n#endif\n      }\n    }\n#endif\n#if defined(A2DP_LHDC_ON)\n    if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LHDC) {\n      if (a2dp_lhdc_config_llc_get()) {\n        tg_trigger_time = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_US *\n                          a2dp_audio_latency_factor_get();\n        tg_trigger_time += offset * A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_BASE;\n#if (A2DP_DECODER_VER < 2)\n        a2dp_audio_set_mtu_limit(A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_MTU);\n#endif\n      } else if (stream_cfg->sample_rate > AUD_SAMPRATE_48000) {\n        tg_trigger_time = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_US *\n                          a2dp_audio_latency_factor_get();\n        tg_trigger_time += offset * A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_BASE;\n#if (A2DP_DECODER_VER < 2)\n        a2dp_audio_set_mtu_limit(A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_MTU);\n#endif\n      } else {\n        tg_trigger_time = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_US *\n                          a2dp_audio_latency_factor_get();\n        tg_trigger_time +=\n            offset * A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_BASE;\n#if (A2DP_DECODER_VER < 2)\n        a2dp_audio_set_mtu_limit(A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_MTU);\n#endif\n      }\n    }\n#endif\n#if defined(A2DP_LDAC_ON)\n    if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LDAC) {\n      uint32_t frame_mtu = A2DP_PLAYER_PLAYBACK_DELAY_LDAC_FRAME_MTU;\n#if (A2DP_DECODER_VER == 2)\n      A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info;\n      if (!a2dp_audio_lastframe_info_get(&lastframe_info)) {\n        frame_mtu = lastframe_info.totalSubSequenceNumber;\n      }\n#endif\n      tg_trigger_time =\n          A2DP_PLAYER_PLAYBACK_DELAY_LDAC_US * a2dp_audio_latency_factor_get();\n      tg_trigger_time +=\n          offset * A2DP_PLAYER_PLAYBACK_DELAY_LDAC_BASE * frame_mtu;\n#if (A2DP_DECODER_VER < 2)\n      a2dp_audio_set_mtu_limit(A2DP_PLAYER_PLAYBACK_DELAY_LDAC_MTU);\n#endif\n      TRACE_AUD_STREAM_I(\"[STRM_TRIG][A2DP][START] [%d,%d,%d]\",\n                         A2DP_PLAYER_PLAYBACK_DELAY_LDAC_MTU,\n                         A2DP_PLAYER_PLAYBACK_DELAY_LDAC_BASE,\n                         A2DP_PLAYER_PLAYBACK_DELAY_LDAC_US);\n    }\n#endif\n  } else {\n    uint32_t frame_mtu = A2DP_PLAYER_PLAYBACK_DELAY_SBC_FRAME_MTU;\n#if (A2DP_DECODER_VER == 2)\n    A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info;\n    if (!a2dp_audio_lastframe_info_get(&lastframe_info)) {\n      frame_mtu = lastframe_info.totalSubSequenceNumber;\n    }\n#endif\n    tg_trigger_time = A2DP_PLAYER_PLAYBACK_DELAY_SBC_US;\n    tg_trigger_time += offset * A2DP_PLAYER_PLAYBACK_DELAY_SBC_BASE * frame_mtu;\n#if (A2DP_DECODER_VER < 2)\n    a2dp_audio_set_mtu_limit(A2DP_PLAYER_PLAYBACK_DELAY_SBC_MTU);\n#endif\n  }\n  app_bt_stream_set_trigger_time((uint32_t)tg_trigger_time);\n}\n\nbool app_bt_stream_trigger_onprocess(void) {\n  if (app_bt_stream_trigger_stauts_get() == BT_STREAM_TRIGGER_STATUS_INIT) {\n    return true;\n  } else {\n    return false;\n  }\n}\n\n#if defined(IBRT)\n#ifdef A2DP_CP_ACCEL\n#define APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME (8)\n#define APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC (12)\n\n#else\n#define APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME (4)\n#endif\n\nAPP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T\napp_bt_stream_ibrt_auto_synchronize_initsync_trigger;\n\nint app_bt_stream_ibrt_auto_synchronize_initsync_dataind_cb(\n    btif_media_header_t *header, unsigned char *buf, unsigned int len) {\n  APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger =\n      &app_bt_stream_ibrt_auto_synchronize_initsync_trigger;\n  bool synchronize_ok = false;\n  A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info;\n\n  TRACE_AUD_STREAM_I(\n      \"[AUTO_SYNC][INITSYNC][DATAIND] dataind_seq:%d/%d timestamp:%d/%d\",\n      header->sequenceNumber, sync_trigger->audio_info.sequenceNumber,\n      header->timestamp, sync_trigger->audio_info.timestamp);\n\n  if (a2dp_audio_lastframe_info_get(&lastframe_info) < 0) {\n    TRACE_AUD_STREAM_W(\"[AUTO_SYNC][INITSYNC][DATAIND] force retrigger\");\n    app_ibrt_if_force_audio_retrigger();\n    return 0;\n  }\n\n  if (app_bt_stream_trigger_stauts_get() != BT_STREAM_TRIGGER_STATUS_WAIT) {\n    TRACE_AUD_STREAM_W(\"[AUTO_SYNC][INITSYNC][DATAIND] already end\");\n    a2dp_audio_detect_next_packet_callback_register(NULL);\n    a2dp_audio_detect_store_packet_callback_register(NULL);\n    return 0;\n  }\n\n  if (sync_trigger->audio_info.sequenceNumber < header->sequenceNumber) {\n    TRACE_AUD_STREAM_W(\"[AUTO_SYNC][INITSYNC][DATAIND] force retrigger\");\n    app_ibrt_if_force_audio_retrigger();\n  } else {\n    if (header->sequenceNumber >= sync_trigger->audio_info.sequenceNumber) {\n      synchronize_ok = true;\n    }\n\n    if (synchronize_ok &&\n        app_bt_stream_trigger_stauts_get() != BT_STREAM_TRIGGER_STATUS_WAIT) {\n      TRACE_AUD_STREAM_W(\"[AUTO_SYNC][INITSYNC][DATAIND] synchronize_failed\");\n      app_ibrt_if_force_audio_retrigger();\n      return 0;\n    }\n#ifdef A2DP_PLAYER_PLAYBACK_WATER_LINE\n    // limter to water line upper\n    uint32_t list_samples = 0;\n    uint32_t limter_water_line_samples = 0;\n    limter_water_line_samples =\n        (a2dp_audio_dest_packet_mut_get() * lastframe_info.list_samples);\n    a2dp_audio_convert_list_to_samples(&list_samples);\n    TRACE_AUD_STREAM_W(\"[AUTO_SYNC][INITSYNC][DATAIND] synchronize:%d/%d\",\n                       list_samples, limter_water_line_samples);\n    if (list_samples > limter_water_line_samples) {\n      TRACE_AUD_STREAM_W(\"[AUTO_SYNC][INITSYNC][DATAIND] skip discards:%d\",\n                         list_samples - limter_water_line_samples);\n      a2dp_audio_discards_samples(list_samples - limter_water_line_samples);\n    }\n#else\n    // flush all\n    a2dp_audio_synchronize_dest_packet_mut(0);\n#endif\n    if (synchronize_ok) {\n      A2DP_AUDIO_HEADFRAME_INFO_T headframe_info;\n      a2dp_audio_decoder_headframe_info_get(&headframe_info);\n      TRACE_AUD_STREAM_W(\"[AUTO_SYNC][INITSYNC][DATAIND] synchronize_ok :%d\",\n                         headframe_info.sequenceNumber);\n      a2dp_audio_detect_next_packet_callback_register(NULL);\n      a2dp_audio_detect_store_packet_callback_register(NULL);\n    } else {\n      a2dp_audio_detect_first_packet();\n    }\n  }\n  return 0;\n}\n\nvoid app_bt_stream_ibrt_auto_synchronize_initsync_start(\n    APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T *sync_trigger) {\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNC][INITSYNC] start trigger_time:%d seq:%d \"\n                     \"timestamp:%d SubSeq:%d/%d\",\n                     sync_trigger->trigger_time,\n                     sync_trigger->audio_info.sequenceNumber,\n                     sync_trigger->audio_info.timestamp,\n                     sync_trigger->audio_info.curSubSequenceNumber,\n                     sync_trigger->audio_info.totalSubSequenceNumber);\n  app_bt_stream_ibrt_auto_synchronize_initsync_trigger = *sync_trigger;\n  a2dp_audio_detect_next_packet_callback_register(\n      app_bt_stream_ibrt_auto_synchronize_initsync_dataind_cb);\n  a2dp_audio_detect_first_packet();\n  if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    if (sync_trigger->trigger_time >\n        bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle)) {\n      uint32_t tg_tick = sync_trigger->trigger_time;\n      btdrv_syn_trigger_codec_en(1);\n      btdrv_syn_clr_trigger();\n      btdrv_enable_playback_triggler(ACL_TRIGGLE_MODE);\n      bt_syn_set_tg_ticks(tg_tick, p_ibrt_ctrl->ibrt_conhandle,\n                          BT_TRIG_SLAVE_ROLE);\n      tg_acl_trigger_time = tg_tick;\n      app_bt_stream_trigger_stauts_set(BT_STREAM_TRIGGER_STATUS_WAIT);\n      TRACE_AUD_STREAM_I(\n          \"[AUTO_SYNC][INITSYNC] start slave trigger curr(%d)-->tg(%d)\",\n          bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle), tg_tick);\n      app_tws_ibrt_audio_analysis_start(\n          sync_trigger->handler_cnt, AUDIO_ANALYSIS_CHECKER_INTERVEL_INVALID);\n      app_tws_ibrt_audio_sync_start();\n      app_tws_ibrt_audio_sync_new_reference(sync_trigger->factor_reference);\n    } else {\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNC][INITSYNC] start slave failed \"\n                         \"trigger(%d)-->tg(%d) need resume\",\n                         bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle),\n                         sync_trigger->trigger_time);\n      app_tws_ibrt_audio_sync_mismatch_resume_notify();\n    }\n  }\n}\n\nint app_bt_stream_ibrt_audio_master_detect_next_packet_cb(\n    btif_media_header_t *header, unsigned char *buf, unsigned int len) {\n#ifdef A2DP_PLAYER_PLAYBACK_WATER_LINE\n  A2DP_AUDIO_SYNCFRAME_INFO_T sync_info;\n  A2DP_AUDIO_HEADFRAME_INFO_T headframe_info;\n#endif\n\n  if (app_bt_stream_trigger_stauts_get() == BT_STREAM_TRIGGER_STATUS_INIT) {\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    int32_t dma_buffer_samples = app_bt_stream_get_dma_buffer_samples() / 2;\n\n    if (app_tws_ibrt_slave_ibrt_link_connected()) {\n      TRACE_AUD_STREAM_W(\n          \"[AUTO_SYNC][MASTER] cache ok but currRole:%d mismatch\\n\",\n          p_ibrt_ctrl->current_role);\n      app_ibrt_if_force_audio_retrigger();\n    } else if (!app_ibrt_ui_is_profile_exchanged() &&\n               !app_ibrt_if_start_ibrt_onporcess() &&\n               !app_ibrt_sync_a2dp_status_onporcess()) {\n      if (p_ibrt_ctrl->mobile_mode == IBRT_SNIFF_MODE) {\n        // flush all\n        a2dp_audio_synchronize_dest_packet_mut(0);\n        a2dp_audio_detect_first_packet();\n        TRACE_AUD_STREAM_I(\n            \"[AUTO_SYNC][MASTER] cache skip delay dma trigger1\\n\");\n        return 0;\n      }\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNC][MASTER] cache ok use dma trigger1\\n\");\n      a2dp_audio_detect_next_packet_callback_register(NULL);\n      a2dp_audio_detect_store_packet_callback_register(NULL);\n#ifdef A2DP_PLAYER_PLAYBACK_WATER_LINE\n      app_bt_stream_trigger_start(A2DP_PLAYER_PLAYBACK_WATER_LINE);\n#else\n      app_bt_stream_trigger_start(0);\n#endif\n    } else if (app_ibrt_if_start_ibrt_onporcess() ||\n               app_ibrt_sync_a2dp_status_onporcess() ||\n               app_ibrt_waiting_cmd_rsp()) {\n      // flush all\n      a2dp_audio_synchronize_dest_packet_mut(0);\n      a2dp_audio_detect_first_packet();\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNC][MASTER] cache skip profile_exchanged \"\n                         \"sync_a2dp_status_onporcess\\n\");\n      return 0;\n    } else {\n      if (p_ibrt_ctrl->tws_mode == IBRT_SNIFF_MODE ||\n          p_ibrt_ctrl->mobile_mode == IBRT_SNIFF_MODE) {\n        // flush all\n        a2dp_audio_synchronize_dest_packet_mut(0);\n        a2dp_audio_detect_first_packet();\n        TRACE_AUD_STREAM_I(\n            \"[AUTO_SYNC][MASTER] cache skip delay dma trigger2\\n\");\n        return 0;\n      }\n      uint8_t codec_type = bt_sbc_player_get_codec_type();\n#ifdef A2DP_PLAYER_PLAYBACK_WATER_LINE\n      uint32_t dest_waterline_samples = 0;\n      uint32_t list_samples = 0;\n      dest_waterline_samples = app_bt_stream_get_dma_buffer_samples() / 2 *\n                               A2DP_PLAYER_PLAYBACK_WATER_LINE;\n      a2dp_audio_convert_list_to_samples(&list_samples);\n      if (list_samples < dest_waterline_samples) {\n        a2dp_audio_detect_first_packet();\n        TRACE_AUD_STREAM_I(\n            \"[AUTO_SYNC][MASTER] cache skip fill data sample:%d\\n\",\n            list_samples);\n        return 0;\n      }\n      a2dp_audio_decoder_headframe_info_get(&headframe_info);\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_LHDC) {\n        sync_info.sequenceNumber = headframe_info.sequenceNumber;\n      } else {\n        sync_info.sequenceNumber = headframe_info.sequenceNumber + 1;\n      }\n      a2dp_audio_synchronize_packet(&sync_info, A2DP_AUDIO_SYNCFRAME_MASK_SEQ);\n#else\n      a2dp_audio_synchronize_dest_packet_mut(0);\n#endif\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNC][MASTER] cache ok use dma trigger2\\n\");\n      // uint8_t codec_type = bt_sbc_player_get_codec_type();\n#ifdef A2DP_CP_ACCEL\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_LHDC) {\n        app_bt_stream_trigger_start(\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC -\n            a2dp_audio_frame_delay_get());\n      } else {\n        app_bt_stream_trigger_start(\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME -\n            a2dp_audio_frame_delay_get());\n      }\n#else\n      app_bt_stream_trigger_start(\n          APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME);\n#endif\n      APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T sync_trigger;\n      A2DP_AUDIO_HEADFRAME_INFO_T headframe_info;\n      A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info;\n      sync_trigger.trigger_time = tg_acl_trigger_time;\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_LHDC) {\n        sync_trigger.trigger_skip_frame =\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC -\n            a2dp_audio_frame_delay_get();\n      } else {\n        sync_trigger.trigger_skip_frame =\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME -\n            a2dp_audio_frame_delay_get();\n      }\n      sync_trigger.trigger_type = APP_TWS_IBRT_AUDIO_TRIGGER_TYPE_INIT_SYNC;\n      if (a2dp_audio_lastframe_info_get(&lastframe_info) < 0) {\n        goto exit;\n      }\n\n      a2dp_audio_decoder_headframe_info_get(&headframe_info);\n      sync_trigger.sequenceNumberStart = headframe_info.sequenceNumber;\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_LHDC) {\n        sync_trigger.audio_info.sequenceNumber =\n            lastframe_info.sequenceNumber +\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC;\n        if (lastframe_info.totalSubSequenceNumber) {\n          sync_trigger.audio_info.timestamp =\n              lastframe_info.timestamp +\n              (lastframe_info.totalSubSequenceNumber *\n               lastframe_info.frame_samples) *\n                  APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC;\n        } else {\n          sync_trigger.audio_info.timestamp =\n              lastframe_info.timestamp +\n              dma_buffer_samples *\n                  APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC;\n        }\n      } else {\n        sync_trigger.audio_info.sequenceNumber =\n            lastframe_info.sequenceNumber +\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME;\n        if (lastframe_info.totalSubSequenceNumber) {\n          sync_trigger.audio_info.timestamp =\n              lastframe_info.timestamp +\n              (lastframe_info.totalSubSequenceNumber *\n               lastframe_info.frame_samples) *\n                  APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME;\n        } else {\n          sync_trigger.audio_info.timestamp =\n              lastframe_info.timestamp +\n              dma_buffer_samples *\n                  APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME;\n        }\n      }\n      sync_trigger.audio_info.curSubSequenceNumber =\n          lastframe_info.curSubSequenceNumber;\n      sync_trigger.audio_info.totalSubSequenceNumber =\n          lastframe_info.totalSubSequenceNumber;\n      sync_trigger.audio_info.frame_samples = lastframe_info.frame_samples;\n      sync_trigger.factor_reference =\n          a2dp_audio_get_output_config()->factor_reference;\n      sync_trigger.a2dp_session = a2dp_ibrt_session_get();\n      sync_trigger.handler_cnt = 0;\n\n      app_bt_stream_ibrt_auto_synchronize_initsync_start(&sync_trigger);\n\n      if (app_tws_ibrt_mobile_link_connected() &&\n          app_ibrt_ui_is_profile_exchanged()) {\n        tws_ctrl_send_cmd_high_priority(\n            APP_TWS_CMD_SET_TRIGGER_TIME, (uint8_t *)&sync_trigger,\n            sizeof(APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T));\n      }\n    }\n  } else {\n    if (app_bt_stream_trigger_stauts_get() == BT_STREAM_TRIGGER_STATUS_NULL) {\n      TRACE_AUD_STREAM_W(\"[AUTO_SYNC][MASTER] audio not ready skip it\");\n    } else {\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNC][MASTER] unhandle status:%d\",\n                         app_bt_stream_trigger_stauts_get());\n      app_ibrt_if_force_audio_retrigger();\n    }\n  }\nexit:\n  return 0;\n}\n\nint app_bt_stream_ibrt_audio_master_detect_next_packet_start(void) {\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNC][MASTER] start\");\n\n  a2dp_audio_detect_next_packet_callback_register(\n      app_bt_stream_ibrt_audio_master_detect_next_packet_cb);\n  return 0;\n}\n\n#define SLAVE_DETECT_NEXT_PACKET_TO_RETRIGGER_THRESHOLD (120)\nstatic uint32_t slave_detect_next_packet_cnt = 0;\nint app_bt_stream_ibrt_audio_slave_detect_next_packet_waitforever_cb(\n    btif_media_header_t *header, unsigned char *buf, unsigned int len) {\n  if (app_tws_ibrt_mobile_link_connected() ||\n      ++slave_detect_next_packet_cnt >\n          SLAVE_DETECT_NEXT_PACKET_TO_RETRIGGER_THRESHOLD) {\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    TRACE_AUD_STREAM_W(\"[AUTO_SYNC][SLAVE] detect_next_packet ok but \"\n                       \"currRole:%d mismatch packet_cnt:%d\\n\",\n                       p_ibrt_ctrl->current_role, slave_detect_next_packet_cnt);\n    slave_detect_next_packet_cnt = 0;\n    app_ibrt_if_force_audio_retrigger();\n  } else {\n    TRACE_AUD_STREAM_I(\"[AUTO_SYNC][SLAVE] detect_next_packet cnt:%d\\n\",\n                       slave_detect_next_packet_cnt);\n    a2dp_audio_detect_first_packet();\n  }\n  return 0;\n}\n\nint app_bt_stream_ibrt_audio_slave_detect_next_packet_cb(\n    btif_media_header_t *header, unsigned char *buf, unsigned int len) {\n  if (app_bt_stream_trigger_onprocess()) {\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    int32_t dma_buffer_samples = app_bt_stream_get_dma_buffer_samples() / 2;\n\n    if (app_tws_ibrt_mobile_link_connected()) {\n      TRACE_AUD_STREAM_W(\n          \"[AUTO_SYNC][SLAVE]cache ok but currRole:%d mismatch\\n\",\n          p_ibrt_ctrl->current_role);\n      app_ibrt_if_force_audio_retrigger();\n    } else {\n      if (app_tws_ibrt_slave_ibrt_link_connected() &&\n          (p_ibrt_ctrl->tws_mode == IBRT_SNIFF_MODE ||\n           p_ibrt_ctrl->mobile_mode == IBRT_SNIFF_MODE ||\n           !app_ibrt_ui_is_profile_exchanged())) {\n        // flush all\n        a2dp_audio_synchronize_dest_packet_mut(0);\n        a2dp_audio_detect_first_packet();\n        TRACE_AUD_STREAM_W(\"[AUTO_SYNC][SLAVE]cache skip delay dma trigger2\\n\");\n        return 0;\n      }\n      TRACE_AUD_STREAM_I(\"[AUTO_SYNC][SLAVE]cache ok use dma trigger2\\n\");\n      // flush all\n      a2dp_audio_synchronize_dest_packet_mut(0);\n      uint8_t codec_type = bt_sbc_player_get_codec_type();\n#ifdef A2DP_CP_ACCEL\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_LHDC) {\n        app_bt_stream_trigger_start(\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC -\n            a2dp_audio_frame_delay_get());\n      } else {\n        app_bt_stream_trigger_start(\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME -\n            a2dp_audio_frame_delay_get());\n      }\n#else\n      app_bt_stream_trigger_start(\n          APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME);\n#endif\n      APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T sync_trigger = {\n          0,\n      };\n      A2DP_AUDIO_LASTFRAME_INFO_T lastframe_info = {\n          0,\n      };\n      sync_trigger.trigger_time = tg_acl_trigger_time;\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_LHDC) {\n        sync_trigger.trigger_skip_frame =\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC -\n            a2dp_audio_frame_delay_get();\n      } else {\n        sync_trigger.trigger_skip_frame =\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME -\n            a2dp_audio_frame_delay_get();\n      }\n      sync_trigger.trigger_type = APP_TWS_IBRT_AUDIO_TRIGGER_TYPE_INIT_SYNC;\n      if (a2dp_audio_lastframe_info_get(&lastframe_info) < 0) {\n        goto exit;\n      }\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_LHDC) {\n        sync_trigger.audio_info.sequenceNumber =\n            lastframe_info.sequenceNumber +\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC;\n        sync_trigger.audio_info.timestamp =\n            lastframe_info.timestamp +\n            dma_buffer_samples *\n                APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME_LHDC;\n      } else {\n        sync_trigger.audio_info.sequenceNumber =\n            lastframe_info.sequenceNumber +\n            APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME;\n        sync_trigger.audio_info.timestamp =\n            lastframe_info.timestamp +\n            dma_buffer_samples *\n                APP_BT_STREAM_IBRT_AUTO_SYNCHRONIZE_INITSYNC_SKIP_FRAME;\n      }\n      sync_trigger.audio_info.curSubSequenceNumber =\n          lastframe_info.curSubSequenceNumber;\n      sync_trigger.audio_info.totalSubSequenceNumber =\n          lastframe_info.totalSubSequenceNumber;\n      sync_trigger.audio_info.frame_samples = lastframe_info.frame_samples;\n      sync_trigger.factor_reference =\n          a2dp_audio_get_output_config()\n              ? a2dp_audio_get_output_config()->factor_reference\n              : 1.0f;\n      sync_trigger.a2dp_session = a2dp_ibrt_session_get();\n      sync_trigger.handler_cnt = 0;\n\n      app_bt_stream_ibrt_auto_synchronize_initsync_start(&sync_trigger);\n    }\n  }\nexit:\n  return 0;\n}\n\nint app_bt_stream_ibrt_audio_slave_detect_next_packet_start(\n    int need_autotrigger) {\n  TRACE_AUD_STREAM_I(\"[AUTO_SYNC][SLAVE] start\");\n  slave_detect_next_packet_cnt = 0;\n  if (need_autotrigger) {\n    a2dp_audio_detect_next_packet_callback_register(\n        app_bt_stream_ibrt_audio_slave_detect_next_packet_waitforever_cb);\n  } else {\n    app_tws_ibrt_audio_analysis_start(0,\n                                      AUDIO_ANALYSIS_CHECKER_INTERVEL_INVALID);\n    app_tws_ibrt_audio_sync_start();\n    a2dp_audio_detect_next_packet_callback_register(\n        app_bt_stream_ibrt_audio_slave_detect_next_packet_cb);\n  }\n  return 0;\n}\n\n#else\nint app_bt_stream_detect_next_packet_cb(btif_media_header_t *header,\n                                        unsigned char *buf, unsigned int len) {\n  if (app_bt_stream_trigger_onprocess()) {\n    TRACE_AUD_STREAM_I(\"[AUTO_SYNC] start\");\n    app_bt_stream_trigger_start(0);\n  }\n  return 0;\n}\n#endif\n\nvoid app_audio_buffer_check(void) {\n  bool buffer_check = (APP_AUDIO_BUFFER_SIZE + APP_CAPTURE_AUDIO_BUFFER_SIZE) <=\n                      syspool_original_size();\n\n  TRACE_AUD_STREAM_I(\n      \"audio buf size[%d] capture buf size[%d] total available space[%d]\",\n      APP_AUDIO_BUFFER_SIZE, APP_CAPTURE_AUDIO_BUFFER_SIZE,\n      syspool_original_size());\n\n  ASSERT(\n      buffer_check,\n      \"Audio buffer[%d]+Capture buffer[%d] exceeds the maximum ram sapce[%d]\",\n      APP_AUDIO_BUFFER_SIZE, APP_CAPTURE_AUDIO_BUFFER_SIZE,\n      syspool_original_size());\n}\n\nstatic bool isRun = false;\n\nint bt_sbc_player(enum PLAYER_OPER_T on, enum APP_SYSFREQ_FREQ_T freq) {\n  struct AF_STREAM_CONFIG_T stream_cfg;\n  enum AUD_SAMPRATE_T sample_rate;\n  const char *g_log_player_oper_str[] = {\n      \"PLAYER_OPER_START\",\n      \"PLAYER_OPER_STOP\",\n      \"PLAYER_OPER_RESTART\",\n  };\n\n  uint8_t *bt_audio_buff = NULL;\n\n  uint8_t POSSIBLY_UNUSED *bt_eq_buff = NULL;\n  uint32_t POSSIBLY_UNUSED eq_buff_size = 0;\n  uint8_t POSSIBLY_UNUSED play_samp_size;\n  TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] work:%d op:%s freq:%d :sample:%d \\n\", isRun,\n                     g_log_player_oper_str[on], freq, a2dp_sample_rate);\n\n  bt_set_playback_triggered(false);\n\n  if ((isRun && on == PLAYER_OPER_START) ||\n      (!isRun && on == PLAYER_OPER_STOP)) {\n    TRACE_AUD_STREAM_W(\"[A2DP_PLAYER],fail,isRun=%x,on=%x\", isRun, on);\n    return 0;\n  }\n\n  uint8_t codec_type = bt_sbc_player_get_codec_type();\n\n  if (on == PLAYER_OPER_STOP || on == PLAYER_OPER_RESTART) {\n#ifdef __THIRDPARTY\n    start_by_sbc = false;\n#endif\n\n#ifdef WL_DET\n    app_mic_alg_audioloop(false, APP_SYSFREQ_78M);\n#endif\n\n#ifdef PLAYBACK_USE_I2S\n    hal_cmu_audio_resample_enable();\n#endif\n\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    bool isToClearActiveMedia =\n        audio_prompt_clear_pending_stream(PENDING_TO_STOP_A2DP_STREAMING);\n    if (isToClearActiveMedia) {\n      // clear active media mark\n      bt_media_clear_media_type(BT_STREAM_SBC, BT_DEVICE_ID_1);\n      bt_media_current_sbc_set(BT_DEVICE_NUM);\n    }\n#endif\n\n#if defined(IBRT)\n    app_bt_stream_ibrt_auto_synchronize_stop();\n    app_tws_ibrt_audio_analysis_stop();\n    app_tws_ibrt_audio_sync_stop();\n#endif\n\n#if (A2DP_DECODER_VER == 2)\n    a2dp_audio_stop();\n#endif\n    af_codec_set_playback_post_handler(NULL);\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n#ifdef AUDIO_ANC_FB_ADJ_MC\n    af_stream_stop(ADJ_MC_STREAM_ID, AUD_STREAM_CAPTURE);\n#endif\n    af_stream_stop(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n\n#if defined(MUSIC_DELAY_CONTROL) &&                                            \\\n    (defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                      \\\n     defined(CHIP_BEST2300A) || defined(CHIP_BEST1400) ||                      \\\n     defined(CHIP_BEST1402))\n    calib_reset = 1;\n    af_stream_dma_tc_irq_disable(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n#endif\n    af_stream_dma_tc_irq_disable(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n#if defined(__AUDIO_SPECTRUM__)\n    audio_spectrum_close();\n#endif\n\n    audio_process_close();\n\n    TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] syspool free size: %d/%d\",\n                       syspool_free_size(), syspool_total_size());\n\n#if !(defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE))\n    af_codec_tune(AUD_STREAM_PLAYBACK, 0);\n#endif\n\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n#ifdef AUDIO_ANC_FB_ADJ_MC\n    af_stream_close(ADJ_MC_STREAM_ID, AUD_STREAM_CAPTURE);\n#endif\n\n    af_stream_close(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n\n    bt_sbc_mode = 0;\n\n#ifdef VOICE_DATAPATH\n    app_voicepath_set_stream_state(AUDIO_OUTPUT_STREAMING, false);\n    app_voicepath_set_pending_started_stream(AUDIO_OUTPUT_STREAMING, false);\n#endif\n#ifdef AI_AEC_CP_ACCEL\n    cp_aec_deinit();\n#endif\n    af_set_irq_notification(NULL);\n    if (on == PLAYER_OPER_STOP) {\n\n      osThreadId ctrl_thread_id = NULL;\n      osPriority ctrl_thread_priority;\n      ctrl_thread_id = osThreadGetId();\n      ctrl_thread_priority = osThreadGetPriority(ctrl_thread_id);\n      osThreadSetPriority(ctrl_thread_id, osPriorityLow);\n      app_bt_stream_trigger_checker_stop();\n#ifdef USER_REBOOT_PLAY_MUSIC_AUTO\n      TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] hal_sw_bootmode_clear \"\n                         \"HAL_SW_BOOTMODE_LOCAL_PLAYER!!!!!!\");\n      hal_sw_bootmode_clear(HAL_SW_BOOTMODE_LOCAL_PLAYER);\n#endif\n#ifdef __A2DP_PLAYER_USE_BT_TRIGGER__\n      app_bt_stream_trigger_deinit();\n#endif\n#ifdef BT_XTAL_SYNC\n      bt_term_xtal_sync(false);\n#ifndef BT_XTAL_SYNC_NO_RESET\n      bt_term_xtal_sync_default();\n#endif\n#endif\n      a2dp_audio_deinit();\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) &&                            \\\n    !defined(__AUDIO_RESAMPLE__) && defined(AUDIO_ANC_FB_ADJ_MC)\n      adj_mc_deinit();\n#endif\n      app_overlay_unloadall();\n#ifdef __THIRDPARTY\n      app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n                                               THIRDPARTY_STOP2MIC);\n      app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n                                               THIRDPARTY_START);\n#endif\n      app_sysfreq_req(APP_SYSFREQ_USER_BT_A2DP, APP_SYSFREQ_32K);\n      osThreadSetPriority(ctrl_thread_id, ctrl_thread_priority);\n      af_set_priority(AF_USER_SBC, osPriorityAboveNormal);\n\n#if defined(__AI_VOICE__) || defined(BISTO_ENABLED)\n      app_ai_if_inform_music_or_prompt_status(false, 0);\n#endif\n\n#if defined(IBRT)\n      app_ibrt_if_exec_sleep_hook_blocker_clr(\n          APP_IBRT_IF_SLEEP_HOOK_BLOCKER_A2DP_STREAMING);\n#endif\n    }\n  }\n\n  if (on == PLAYER_OPER_START || on == PLAYER_OPER_RESTART) {\n#if USER_REBOOT_PLAY_MUSIC_AUTO\n    TRACE_AUD_STREAM_I(\n        \"[A2DP_PLAYER] hal_sw_bootmode_set HAL_SW_BOOTMODE_LOCAL_PLAYER!!!!!!\");\n    hal_sw_bootmode_set(HAL_SW_BOOTMODE_LOCAL_PLAYER);\n#endif\n\n#if defined(__AI_VOICE__) || defined(BISTO_ENABLED)\n    app_ai_if_inform_music_or_prompt_status(true, a2dp_sample_rate);\n    app_ai_if_pre_music_or_prompt_check();\n#endif\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    audio_prompt_stop_playing();\n#endif\n\n#if defined(IBRT)\n    app_ibrt_if_exec_sleep_hook_blocker_set(\n        APP_IBRT_IF_SLEEP_HOOK_BLOCKER_A2DP_STREAMING);\n#endif\n#ifdef __THIRDPARTY\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n                                             THIRDPARTY_STOP);\n#endif\n    af_set_priority(AF_USER_SBC, osPriorityHigh);\n    bt_media_volume_ptr_update_by_mediatype(BT_STREAM_SBC);\n    stream_local_volume = btdevice_volume_p->a2dp_vol;\n    app_audio_mempool_init_with_specific_size(APP_AUDIO_BUFFER_SIZE);\n\n#ifdef __BT_ONE_BRING_TWO__\n    if (btif_me_get_activeCons() > 1) {\n      if (freq < APP_SYSFREQ_104M) {\n        freq = APP_SYSFREQ_104M;\n      }\n    }\n#endif\n#ifdef __PC_CMD_UART__\n    if (freq < APP_SYSFREQ_104M) {\n      freq = APP_SYSFREQ_104M;\n    }\n#endif\n#if defined(__SW_IIR_EQ_PROCESS__) && defined(__HW_FIR_EQ_PROCESS__) &&        \\\n    defined(CHIP_BEST1000)\n    if (audio_eq_hw_fir_cfg_list[bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_FIR, 0)]\n            ->len > 128) {\n      if (freq < APP_SYSFREQ_104M) {\n        freq = APP_SYSFREQ_104M;\n      }\n    }\n#endif\n#if defined(APP_MUSIC_26M) && !defined(__SW_IIR_EQ_PROCESS__) &&               \\\n    !defined(__HW_IIR_EQ_PROCESS__) && !defined(__HW_FIR_EQ_PROCESS__)\n    if (freq < APP_SYSFREQ_26M) {\n      freq = APP_SYSFREQ_26M;\n    }\n#else\n    if (freq < APP_SYSFREQ_52M) {\n      freq = APP_SYSFREQ_52M;\n    }\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    if (freq < APP_SYSFREQ_104M) {\n      freq = APP_SYSFREQ_104M;\n    }\n#endif\n    TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] codec_type:%d\", codec_type);\n#if defined(A2DP_AAC_ON)\n    if (codec_type == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n      if (freq < APP_SYSFREQ_52M) {\n        freq = APP_SYSFREQ_52M;\n      }\n    }\n#endif\n#if defined(A2DP_SCALABLE_ON)\n    if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      if (a2dp_sample_rate == 44100) {\n        if (freq < APP_SYSFREQ_78M) {\n          freq = APP_SYSFREQ_78M;\n        }\n      } else if (a2dp_sample_rate == 96000) {\n        if (freq < APP_SYSFREQ_208M) {\n          freq = APP_SYSFREQ_208M;\n        }\n      }\n    }\n    TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] a2dp_sample_rate=%d\", a2dp_sample_rate);\n#endif\n\n#if defined(__AUDIO_DRC__) || defined(__AUDIO_DRC2__)\n    freq = (freq < APP_SYSFREQ_208M) ? APP_SYSFREQ_208M : freq;\n#endif\n\n#ifdef AUDIO_OUTPUT_SW_GAIN\n    freq = (freq < APP_SYSFREQ_104M) ? APP_SYSFREQ_104M : freq;\n#endif\n\n#ifdef PLAYBACK_FORCE_48K\n    freq = (freq < APP_SYSFREQ_104M) ? APP_SYSFREQ_104M : freq;\n#endif\n\n#ifdef A2DP_CP_ACCEL\n    // Default freq for SBC\n    freq = APP_SYSFREQ_26M;\n#if defined(A2DP_AAC_ON)\n    if (codec_type == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n      freq = APP_SYSFREQ_26M;\n    }\n#endif\n\n#if defined(A2DP_LHDC_ON) || defined(A2DP_SCALABLE_ON) || defined(A2DP_LDAC_ON)\n    if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      freq = APP_SYSFREQ_52M;\n    }\n\n    if (a2dp_sample_rate == AUD_SAMPRATE_96000) {\n      freq = APP_SYSFREQ_104M;\n    }\n#endif\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    if (freq < APP_SYSFREQ_52M) {\n      freq = APP_SYSFREQ_52M;\n    }\n#endif\n#if defined(A2DP_LDAC_ON)\n    if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      if (a2dp_sample_rate == AUD_SAMPRATE_96000 ||\n          a2dp_sample_rate == AUD_SAMPRATE_88200) {\n        freq = APP_SYSFREQ_104M;\n      } else {\n        freq = APP_SYSFREQ_52M;\n      }\n    }\n#endif\n#endif\n    if (freq < APP_SYSFREQ_52M) {\n      freq = APP_SYSFREQ_52M;\n    }\n    app_sysfreq_req(APP_SYSFREQ_USER_BT_A2DP, freq);\n    TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] sysfreq %d\", freq);\n    TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] sysfreq calc : %d\\n\",\n                       hal_sys_timer_calc_cpu_freq(5, 0));\n\n    if (on == PLAYER_OPER_START) {\n      af_set_irq_notification(app_bt_stream_playback_irq_notification);\n      ASSERT(!app_ring_merge_isrun(),\n             \"Ring playback will be abnormal, please check.\");\n      if (0) {\n      }\n#if defined(A2DP_AAC_ON)\n      else if (codec_type == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n        app_overlay_select(APP_OVERLAY_A2DP_AAC);\n      }\n#endif\n\n      else if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n        TRACE(1, \"current_a2dp_non_type %d\", current_a2dp_non_type);\n        if (0) {\n        }\n#if defined(A2DP_LHDC_ON)\n        else if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LHDC) {\n          app_overlay_select(APP_OVERLAY_A2DP_LHDC);\n        }\n#endif\n#if defined(A2DP_SCALABLE_ON)\n        else if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n          app_overlay_select(APP_OVERLAY_A2DP_SCALABLE);\n        }\n#endif\n#if defined(A2DP_LDAC_ON)\n        else if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LDAC) {\n          TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] ldac overlay select \\n\"); // toto\n          app_overlay_select(APP_OVERLAY_A2DP_LDAC);\n        }\n#endif\n      } else {\n        app_overlay_select(APP_OVERLAY_A2DP);\n      }\n\n#ifdef BT_XTAL_SYNC\n\n#ifdef __TWS__\n      if (app_tws_mode_is_only_mobile()) {\n        btdrv_rf_bit_offset_track_enable(false);\n      } else\n#endif\n      {\n        btdrv_rf_bit_offset_track_enable(true);\n      }\n      bt_init_xtal_sync(BT_XTAL_SYNC_MODE_MUSIC, BT_INIT_XTAL_SYNC_MIN,\n                        BT_INIT_XTAL_SYNC_MAX, BT_INIT_XTAL_SYNC_FCAP_RANGE);\n#endif // BT_XTAL_SYNC\n#ifdef __THIRDPARTY\n      app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n                                               THIRDPARTY_START2MIC);\n#endif\n\n      bt_sbc_mode = 1;\n    }\n\n#ifdef __THIRDPARTY\n    // app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,THIRDPARTY_STOP);\n    start_by_sbc = true;\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n                                             THIRDPARTY_START);\n#endif\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n    sample_rate = AUD_SAMPRATE_50781;\n#else\n    sample_rate = a2dp_sample_rate;\n#endif\n\n#ifdef PLAYBACK_USE_I2S\n    hal_cmu_audio_resample_disable();\n#endif\n\n    memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n    stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n#ifdef PLAYBACK_FORCE_48K\n    stream_cfg.sample_rate = AUD_SAMPRATE_48000;\n#else\n    stream_cfg.sample_rate = sample_rate;\n#endif\n\n#ifdef PLAYBACK_USE_I2S\n    stream_cfg.device = AUD_STREAM_USE_I2S0_MASTER;\n#else\n    stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n#endif\n\n#ifdef PLAYBACK_USE_I2S\n    stream_cfg.io_path = AUD_IO_PATH_NULL;\n#else\n    stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n#endif\n\n    stream_cfg.vol = stream_local_volume;\n    stream_cfg.handler = bt_sbc_player_more_data;\n\n    if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n#if defined(A2DP_SCALABLE_ON)\n      if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n        stream_cfg.data_size = SCALABLE_FRAME_SIZE * 8;\n      }\n#endif\n#if defined(A2DP_LHDC_ON)\n      if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LHDC) {\n#if defined(A2DP_LHDC_V3)\n        if (bt_get_sbc_sample_rate() == AUD_SAMPRATE_96000) {\n          stream_cfg.data_size = LHDC_AUDIO_96K_BUFF_SIZE;\n        } else {\n          stream_cfg.data_size = LHDC_AUDIO_BUFF_SIZE;\n        }\n        if (a2dp_lhdc_config_llc_get()) {\n          TRACE_AUD_STREAM_I(\"[A2DP_PLAYER] USE LHDC_LLC\");\n          stream_cfg.data_size = LHDC_LLC_AUDIO_BUFF_SIZE;\n        }\n#else\n        stream_cfg.data_size = LHDC_AUDIO_BUFF_SIZE;\n#endif\n      }\n#endif\n#if defined(A2DP_LDAC_ON)\n      if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LDAC) {\n        stream_cfg.data_size = BT_AUDIO_BUFF_SIZE_LDAC;\n      }\n#endif\n    } else\n\n#if defined(A2DP_AAC_ON)\n        if (codec_type == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n      stream_cfg.data_size = BT_AUDIO_BUFF_AAC_SIZE;\n    } else\n#endif\n    {\n      if (stream_cfg.sample_rate == AUD_SAMPRATE_44100) {\n        stream_cfg.data_size = BT_AUDIO_BUFF_SBC_44P1K_SIZE;\n      } else {\n        stream_cfg.data_size = BT_AUDIO_BUFF_SBC_48K_SIZE;\n      }\n    }\n\n    stream_cfg.bits = AUD_BITS_16;\n\n#ifdef A2DP_EQ_24BIT\n    stream_cfg.data_size *= 2;\n    stream_cfg.bits = AUD_BITS_24;\n#elif defined(A2DP_SCALABLE_ON) || defined(A2DP_LHDC_ON) ||                    \\\n    defined(A2DP_LDAC_ON)\n    if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n      stream_cfg.data_size *= 2;\n      stream_cfg.bits = AUD_BITS_24;\n    }\n#endif\n\n#if 0 // defined(A2DP_LHDC_ON)\n        if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP)\n        {\n            if(bt_sbc_player_get_sample_bit() == AUD_BITS_16)\n            {\n                stream_cfg.bits = AUD_BITS_16;\n            }\n        }\n#endif\n\n    a2dp_data_buf_size = stream_cfg.data_size;\n\n    app_audio_mempool_get_buff(&bt_audio_buff, stream_cfg.data_size);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n#if defined(MUSIC_DELAY_CONTROL) &&                                            \\\n    (defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                      \\\n     defined(CHIP_BEST2300A) || defined(CHIP_BEST1400) ||                      \\\n     defined(CHIP_BEST1402))\n    lowdelay_sample_size_play_bt = stream_cfg.bits;\n    lowdelay_sample_rate_play_bt = stream_cfg.sample_rate;\n    lowdelay_data_size_play_bt = stream_cfg.data_size;\n    lowdelay_playback_ch_num_bt = stream_cfg.channel_num;\n#endif\n\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    uint8_t *promptTmpSourcePcmDataBuf;\n    uint8_t *promptTmpTargetPcmDataBuf;\n    uint8_t *promptPcmDataBuf;\n    uint8_t *promptResamplerBuf;\n\n    app_audio_mempool_get_buff(&promptTmpSourcePcmDataBuf,\n                               AUDIO_PROMPT_SOURCE_PCM_BUFFER_SIZE);\n    app_audio_mempool_get_buff(&promptTmpTargetPcmDataBuf,\n                               AUDIO_PROMPT_TARGET_PCM_BUFFER_SIZE);\n    app_audio_mempool_get_buff(&promptPcmDataBuf, AUDIO_PROMPT_PCM_BUFFER_SIZE);\n    app_audio_mempool_get_buff(&promptResamplerBuf,\n                               AUDIO_PROMPT_BUF_SIZE_FOR_RESAMPLER);\n\n    audio_prompt_buffer_config(MIX_WITH_A2DP_STREAMING, stream_cfg.channel_num,\n                               stream_cfg.bits, promptTmpSourcePcmDataBuf,\n                               promptTmpTargetPcmDataBuf, promptPcmDataBuf,\n                               AUDIO_PROMPT_PCM_BUFFER_SIZE, promptResamplerBuf,\n                               AUDIO_PROMPT_BUF_SIZE_FOR_RESAMPLER);\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    sample_size_play_bt = stream_cfg.bits;\n    sample_rate_play_bt = stream_cfg.sample_rate;\n    data_size_play_bt = stream_cfg.data_size;\n    playback_buf_bt = stream_cfg.data_ptr;\n    playback_size_bt = stream_cfg.data_size;\n    if (sample_rate_play_bt == AUD_SAMPRATE_96000) {\n      playback_samplerate_ratio_bt = 4;\n    } else {\n      playback_samplerate_ratio_bt = 8;\n    }\n    playback_ch_num_bt = stream_cfg.channel_num;\n    mid_p_8_old_l = 0;\n    mid_p_8_old_r = 0;\n#endif\n\n#ifdef PLAYBACK_FORCE_48K\n    force48k_resample = app_force48k_resample_any_open(\n        stream_cfg.channel_num, app_force48k_resample_iter,\n        stream_cfg.data_size / stream_cfg.channel_num,\n        (float)sample_rate / AUD_SAMPRATE_48000);\n#endif\n\n    TRACE(4,\n          \"A2DP Playback: sample rate: %d, bits = %d, channel number = %d, \"\n          \"data size:%d\",\n          stream_cfg.sample_rate, stream_cfg.bits, stream_cfg.channel_num,\n          stream_cfg.data_size);\n\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    stream_cfg.bits = sample_size_play_bt;\n    stream_cfg.channel_num = playback_ch_num_bt;\n    stream_cfg.sample_rate = sample_rate_play_bt;\n    stream_cfg.device = AUD_STREAM_USE_MC;\n    stream_cfg.vol = 0;\n#ifdef AUDIO_ANC_FB_ADJ_MC\n    stream_cfg.handler = audio_adj_mc_data_playback_a2dp;\n#else\n    stream_cfg.handler = audio_mc_data_playback_a2dp;\n#endif\n    stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n    app_audio_mempool_get_buff(\n        &bt_audio_buff, data_size_play_bt * playback_samplerate_ratio_bt);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n    stream_cfg.data_size = data_size_play_bt * playback_samplerate_ratio_bt;\n\n    playback_buf_mc = stream_cfg.data_ptr;\n    playback_size_mc = stream_cfg.data_size;\n\n    anc_mc_run_init(hal_codec_anc_convert_rate(sample_rate_play_bt));\n\n    memset(delay_buf_bt, 0, sizeof(delay_buf_bt));\n\n    af_stream_open(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK, &stream_cfg);\n    // ASSERT(ret == 0, \"af_stream_open playback failed: %d\", ret);\n#ifdef AUDIO_ANC_FB_ADJ_MC\n    adj_mc_capture_sample_rate = sample_rate_play_bt / 3;\n    adj_mc_init(ADJ_MC_FRAME_LEN);\n    memset(&stream_cfg, 0, sizeof(stream_cfg));\n    stream_cfg.channel_num = (enum AUD_CHANNEL_NUM_T)ADJ_MC_CHANNEL_NUM;\n    stream_cfg.data_size = ADJ_MC_BUF_SIZE;\n    stream_cfg.sample_rate = (enum AUD_SAMPRATE_T)adj_mc_capture_sample_rate;\n    stream_cfg.bits = AUD_BITS_16;\n    stream_cfg.vol = 12;\n    stream_cfg.chan_sep_buf = true;\n    stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n    stream_cfg.io_path = AUD_INPUT_PATH_ASRMIC;\n    stream_cfg.handler = adj_mc_filter_estimate;\n    stream_cfg.data_ptr = adj_mc_buf;\n    TRACE(2, \"[A2DP_PLAYER] capture sample_rate:%d, data_size:%d\",\n          stream_cfg.sample_rate, stream_cfg.data_size);\n    af_stream_open(ADJ_MC_STREAM_ID, AUD_STREAM_CAPTURE, &stream_cfg);\n#endif\n\n#endif\n\n#ifdef A2DP_STREAM_AUDIO_DUMP\n    audio_dump_init(1024, sizeof(int), 1);\n#endif\n\n#ifdef __HEAR_THRU_PEAK_DET__\n    PEAK_DETECTOR_CFG_T peak_detector_cfg;\n    peak_detector_cfg.fs = stream_cfg.sample_rate;\n    peak_detector_cfg.bits = stream_cfg.bits;\n    peak_detector_cfg.factor_up = 0.6;\n    peak_detector_cfg.factor_down = 2.0;\n    peak_detector_cfg.reduce_dB = -30;\n    peak_detector_init();\n    peak_detector_setup(&peak_detector_cfg);\n#endif\n\n#if defined(__AUDIO_SPECTRUM__)\n    audio_spectrum_open(stream_cfg.sample_rate, stream_cfg.bits);\n#endif\n\n#if defined(__HW_FIR_EQ_PROCESS__) && defined(__HW_IIR_EQ_PROCESS__)\n    eq_buff_size = stream_cfg.data_size * 2;\n#elif defined(__HW_FIR_EQ_PROCESS__) && !defined(__HW_IIR_EQ_PROCESS__)\n\n    play_samp_size = (stream_cfg.bits <= AUD_BITS_16) ? 2 : 4;\n#if defined(CHIP_BEST2000)\n    eq_buff_size = stream_cfg.data_size * sizeof(int32_t) / play_samp_size;\n#elif defined(CHIP_BEST1000)\n    eq_buff_size = stream_cfg.data_size * sizeof(int16_t) / play_samp_size;\n#elif defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                     \\\n    defined(CHIP_BEST2300A)\n    eq_buff_size = stream_cfg.data_size;\n#endif\n#elif !defined(__HW_FIR_EQ_PROCESS__) && defined(__HW_IIR_EQ_PROCESS__)\n    eq_buff_size = stream_cfg.data_size;\n#else\n    eq_buff_size = 0;\n    bt_eq_buff = NULL;\n#endif\n\n    if (eq_buff_size > 0) {\n      app_audio_mempool_get_buff(&bt_eq_buff, eq_buff_size);\n    }\n\n#if defined(IBRT)\n    enum AUD_CHANNEL_NUM_T sw_ch_num = AUD_CHANNEL_NUM_1;\n#else\n    enum AUD_CHANNEL_NUM_T sw_ch_num = stream_cfg.channel_num;\n#endif\n\n    audio_process_open(stream_cfg.sample_rate, stream_cfg.bits, sw_ch_num,\n                       stream_cfg.channel_num,\n                       stream_cfg.data_size / stream_cfg.channel_num /\n                           (stream_cfg.bits <= AUD_BITS_16 ? 2 : 4) / 2,\n                       bt_eq_buff, eq_buff_size);\n\n// disable audio eq config on a2dp start for audio tuning tools\n#ifndef __PC_CMD_UART__\n#ifdef __SW_IIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_SW_IIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_SW_IIR, 0));\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_HW_FIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_FIR, 0));\n#endif\n\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_HW_DAC_IIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_DAC_IIR, 0));\n#endif\n\n#ifdef __HW_IIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_HW_IIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_IIR, 0));\n#endif\n#endif\n\n#ifdef ANC_APP\n    anc_status_record = 0xff;\n#endif\n\n#if defined(IBRT)\n    APP_TWS_IBRT_AUDIO_SYNC_CFG_T sync_config;\n    sync_config.factor_reference = TWS_IBRT_AUDIO_SYNC_FACTOR_REFERENCE;\n    sync_config.factor_fast_limit = TWS_IBRT_AUDIO_SYNC_FACTOR_FAST_LIMIT;\n    sync_config.factor_slow_limit = TWS_IBRT_AUDIO_SYNC_FACTOR_SLOW_LIMIT;\n    ;\n    sync_config.dead_zone_us = TWS_IBRT_AUDIO_SYNC_DEAD_ZONE_US;\n    app_tws_ibrt_audio_sync_reconfig(&sync_config);\n#else\n#if !(defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE))\n    af_codec_tune(AUD_STREAM_PLAYBACK, 0);\n#endif\n#endif\n    if (on == PLAYER_OPER_START) {\n      // This might use all of the rest buffer in the mempool,\n      // so it must be the last configuration before starting stream.\n#if (A2DP_DECODER_VER == 2)\n      A2DP_AUDIO_OUTPUT_CONFIG_T output_config;\n      A2DP_AUDIO_CODEC_TYPE a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_SBC;\n      output_config.sample_rate = sample_rate;\n      output_config.num_channels = 2;\n#ifdef A2DP_EQ_24BIT\n      output_config.bits_depth = 24;\n#else\n      output_config.bits_depth = 16;\n#endif\n      output_config.frame_samples = app_bt_stream_get_dma_buffer_samples() / 2;\n      output_config.factor_reference = 1.0f;\n#if defined(IBRT)\n      ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n      uint8_t codec_type = bt_sbc_player_get_codec_type();\n      float dest_packet_mut = 0;\n      int need_autotrigger =\n          a2dp_ibrt_stream_need_autotrigger_getandclean_flag();\n\n      uint32_t offset_mut = 0;\n      switch (codec_type) {\n      case BTIF_AVDTP_CODEC_TYPE_SBC:\n        a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_SBC;\n        dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_SBC_MTU;\n#ifdef A2DP_PLAYER_PLAYBACK_WATER_LINE\n        offset_mut = A2DP_PLAYER_PLAYBACK_DELAY_SBC_FRAME_MTU *\n                     A2DP_PLAYER_PLAYBACK_WATER_LINE;\n#endif\n        break;\n      case BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC:\n        a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_MPEG2_4_AAC;\n        dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_AAC_MTU;\n#ifdef A2DP_PLAYER_PLAYBACK_WATER_LINE\n        offset_mut = A2DP_PLAYER_PLAYBACK_WATER_LINE;\n#endif\n        break;\n      case BTIF_AVDTP_CODEC_TYPE_NON_A2DP:\n#if defined(A2DP_LHDC_ON)\n        if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LHDC) {\n          a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_LHDC;\n          if (a2dp_lhdc_config_llc_get()) {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_MTU;\n          } else if (sample_rate > AUD_SAMPRATE_48000) {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_MTU;\n          } else {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_MTU;\n          }\n        }\n#endif\n#if defined(A2DP_LDAC_ON)\n        if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LDAC) {\n          a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_LDAC;\n          dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_LDAC_MTU;\n        }\n#endif\n\n#if defined(A2DP_SCALABLE_ON)\n        if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n          a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_SCALABL;\n          if (sample_rate > AUD_SAMPRATE_48000) {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_MTU;\n          } else {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_MTU;\n          }\n        }\n#endif\n\n        break;\n      default:\n        break;\n      }\n      output_config.factor_reference = TWS_IBRT_AUDIO_SYNC_FACTOR_REFERENCE;\n#if defined(A2DP_LHDC_ON) || defined(A2DP_SCALABLE_ON) || defined(A2DP_LDAC_ON)\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n        if (bt_sbc_player_get_sample_bit() == AUD_BITS_16) {\n          output_config.curr_bits = AUD_BITS_16;\n        } else {\n          output_config.curr_bits = AUD_BITS_24;\n        }\n      }\n#endif\n\n      dest_packet_mut *= a2dp_audio_latency_factor_get();\n      A2DP_AUDIO_CHANNEL_SELECT_E a2dp_audio_channel_sel =\n          A2DP_AUDIO_CHANNEL_SELECT_STEREO;\n      switch ((AUDIO_CHANNEL_SELECT_E)p_ibrt_ctrl->audio_chnl_sel) {\n      case AUDIO_CHANNEL_SELECT_STEREO:\n        a2dp_audio_channel_sel = A2DP_AUDIO_CHANNEL_SELECT_STEREO;\n        break;\n      case AUDIO_CHANNEL_SELECT_LRMERGE:\n        a2dp_audio_channel_sel = A2DP_AUDIO_CHANNEL_SELECT_LRMERGE;\n        break;\n      case AUDIO_CHANNEL_SELECT_LCHNL:\n        a2dp_audio_channel_sel = A2DP_AUDIO_CHANNEL_SELECT_LCHNL;\n        break;\n      case AUDIO_CHANNEL_SELECT_RCHNL:\n        a2dp_audio_channel_sel = A2DP_AUDIO_CHANNEL_SELECT_RCHNL;\n        break;\n      default:\n        break;\n      }\n      dest_packet_mut += offset_mut;\n      a2dp_audio_init(freq, a2dp_audio_codec_type, &output_config,\n                      a2dp_audio_channel_sel, (uint16_t)dest_packet_mut);\n\n      app_tws_ibrt_audio_analysis_interval_set(sample_rate > AUD_SAMPRATE_48000\n                                                   ? AUDIO_ANALYSIS_INTERVAL * 2\n                                                   : AUDIO_ANALYSIS_INTERVAL);\n      if (app_tws_ibrt_mobile_link_connected()) {\n        app_tws_ibrt_audio_analysis_start(\n            0, AUDIO_ANALYSIS_CHECKER_INTERVEL_INVALID);\n        app_tws_ibrt_audio_sync_start();\n        app_bt_stream_ibrt_audio_master_detect_next_packet_start();\n      } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n        app_bt_stream_ibrt_audio_slave_detect_next_packet_start(\n            need_autotrigger);\n      } else {\n        TRACE_AUD_STREAM_E(\n            \"[A2DP_PLAYER] mobile_link:%d %04x ibrt_link:%d %04x\",\n            app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n            app_tws_ibrt_slave_ibrt_link_connected(),\n            p_ibrt_ctrl->ibrt_conhandle);\n      }\n#else\n      uint8_t codec_type = bt_sbc_player_get_codec_type();\n      uint16_t dest_packet_mut = 0;\n\n      switch (codec_type) {\n      case BTIF_AVDTP_CODEC_TYPE_SBC:\n        a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_SBC;\n        dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_SBC_MTU;\n        break;\n      case BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC:\n        a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_MPEG2_4_AAC;\n        dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_AAC_MTU;\n        break;\n      case BTIF_AVDTP_CODEC_TYPE_NON_A2DP:\n#if defined(A2DP_LHDC_ON)\n        if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LHDC) {\n          a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_LHDC;\n          if (a2dp_lhdc_config_llc_get()) {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_LLC_MTU;\n          } else if (sample_rate > AUD_SAMPRATE_48000) {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_HIRES_MTU;\n          } else {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_LHDC_BASERES_MTU;\n          }\n        }\n#endif\n#if defined(A2DP_LDAC_ON)\n        if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_LDAC) {\n          a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_LDAC;\n          dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_LDAC_MTU;\n        }\n#endif\n#if defined(A2DP_SCALABLE_ON)\n        if (current_a2dp_non_type == A2DP_NON_CODEC_TYPE_SCALABLE) {\n          a2dp_audio_codec_type = A2DP_AUDIO_CODEC_TYPE_SCALABL;\n          if (sample_rate > AUD_SAMPRATE_48000) {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_HIRES_MTU;\n          } else {\n            dest_packet_mut = A2DP_PLAYER_PLAYBACK_DELAY_SCALABLE_BASERES_MTU;\n          }\n        }\n#endif\n\n        if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n          if (bt_sbc_player_get_sample_bit() == AUD_BITS_16) {\n            output_config.curr_bits = AUD_BITS_16;\n          } else {\n            output_config.curr_bits = AUD_BITS_24;\n          }\n        }\n\n        break;\n      default:\n        break;\n      }\n#if defined(A2DP_LHDC_ON)\n      if (codec_type == BTIF_AVDTP_CODEC_TYPE_NON_A2DP) {\n        if (bt_sbc_player_get_sample_bit() == AUD_BITS_16) {\n          output_config.curr_bits = AUD_BITS_16;\n        } else {\n          output_config.curr_bits = AUD_BITS_24;\n        }\n      }\n#endif\n      a2dp_audio_init(freq, a2dp_audio_codec_type, &output_config,\n                      A2DP_AUDIO_CHANNEL_SELECT_STEREO, dest_packet_mut);\n      a2dp_audio_detect_next_packet_callback_register(\n          app_bt_stream_detect_next_packet_cb);\n#endif\n      a2dp_audio_start();\n#else\n      a2dp_audio_init();\n#endif\n    }\n\n#if defined(MUSIC_DELAY_CONTROL) &&                                            \\\n    (defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                      \\\n     defined(CHIP_BEST2300A) || defined(CHIP_BEST1400) ||                      \\\n     defined(CHIP_BEST1402))\n    calib_reset = 1;\n#endif\n    af_stream_dma_tc_irq_enable(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n    af_codec_set_playback_post_handler(bt_sbc_player_playback_post_handler);\n#ifdef __A2DP_PLAYER_USE_BT_TRIGGER__\n    app_bt_stream_trigger_init();\n#endif\n#ifdef VOICE_DATAPATH\n    if (app_voicepath_get_stream_state(VOICEPATH_STREAMING)) {\n      app_voicepath_set_pending_started_stream(AUDIO_OUTPUT_STREAMING, true);\n    } else {\n      app_voicepath_set_stream_state(AUDIO_OUTPUT_STREAMING, true);\n      af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n    }\n#else\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n#endif\n#ifdef AI_AEC_CP_ACCEL\n    cp_aec_init();\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    af_stream_start(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#ifdef AUDIO_ANC_FB_ADJ_MC\n    af_stream_start(ADJ_MC_STREAM_ID, AUD_STREAM_CAPTURE);\n#endif\n#endif\n\n#ifdef WL_DET\n    app_mic_alg_audioloop(true, APP_SYSFREQ_78M);\n#endif\n\n#ifdef __THIRDPARTY\n    // app_thirdparty_specific_lib_event_handle(THIRDPARTY_ID_NO1,THIRDPARTY_OTHER_EVENT);\n#endif\n    app_bt_stream_trigger_checker_start();\n  }\n\n  isRun = (on != PLAYER_OPER_STOP);\n  return 0;\n}\n\n#if defined(SCO_DMA_SNAPSHOT)\nstatic uint32_t sco_trigger_wait_codecpcm = 0;\nstatic uint32_t sco_trigger_wait_btpcm = 0;\nvoid app_bt_stream_sco_trigger_set_codecpcm_triggle(uint8_t triggle_en) {\n  sco_trigger_wait_codecpcm = triggle_en;\n}\n\nuint32_t app_bt_stream_sco_trigger_wait_codecpcm_triggle(void) {\n  return sco_trigger_wait_codecpcm;\n}\n\nvoid app_bt_stream_sco_trigger_set_btpcm_triggle(uint32_t triggle_en) {\n  sco_trigger_wait_btpcm = triggle_en;\n}\n\nuint32_t app_bt_stream_sco_trigger_wait_btpcm_triggle(void) {\n  return sco_trigger_wait_btpcm;\n}\n\nint app_bt_stream_sco_trigger_codecpcm_tick(void) {\n  if (app_bt_stream_sco_trigger_wait_codecpcm_triggle()) {\n    app_bt_stream_sco_trigger_set_codecpcm_triggle(0);\n#if defined(IBRT)\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    if (app_tws_ibrt_mobile_link_connected()) {\n      TRACE_AUD_STREAM_I(\"[SCO_PLAYER] codecpcm_tick:%x/%x\",\n                         btdrv_syn_get_curr_ticks(),\n                         bt_syn_get_curr_ticks(p_ibrt_ctrl->mobile_conhandle));\n    } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n      TRACE_AUD_STREAM_I(\"[SCO_PLAYER] codecpcm_tick:%x/%x\",\n                         btdrv_syn_get_curr_ticks(),\n                         bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle));\n    } else {\n      TRACE_AUD_STREAM_E(\n          \"[SCO_PLAYER] codecpcm_tick mobile_link:%d %04x ibrt_link:%d %04x\",\n          app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n          app_tws_ibrt_slave_ibrt_link_connected(),\n          p_ibrt_ctrl->ibrt_conhandle);\n    }\n#else\n    uint16_t conhdl = 0xFFFF;\n    int curr_sco;\n\n    curr_sco = app_audio_manager_get_active_sco_num();\n    if (curr_sco != BT_DEVICE_NUM) {\n      conhdl = btif_hf_get_remote_hci_handle(\n          *app_audio_manager_get_active_sco_chnl());\n    }\n    if (conhdl != 0xFFFF) {\n      TRACE_AUD_STREAM_I(\"[SCO_PLAYER] codecpcm_tick:%x\",\n                         bt_syn_get_curr_ticks(conhdl));\n    }\n#endif\n    btdrv_syn_clr_trigger();\n    return 1;\n  }\n  return 0;\n}\n\nint app_bt_stream_sco_trigger_btpcm_tick(void) {\n  if (app_bt_stream_sco_trigger_wait_btpcm_triggle()) {\n    app_bt_stream_sco_trigger_set_btpcm_triggle(0);\n    btdrv_set_bt_pcm_triggler_en(0);\n#if defined(IBRT)\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    if (app_tws_ibrt_mobile_link_connected()) {\n      TRACE_AUD_STREAM_I(\"[SCO_PLAYER] btpcm_tick:%x/%x\",\n                         btdrv_syn_get_curr_ticks(),\n                         bt_syn_get_curr_ticks(p_ibrt_ctrl->mobile_conhandle));\n    } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n      TRACE_AUD_STREAM_I(\"[SCO_PLAYER] btpcm_tick:tick:%x/%x\",\n                         btdrv_syn_get_curr_ticks(),\n                         bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle));\n    } else {\n      TRACE_AUD_STREAM_I(\n          \"[SCO_PLAYER] btpcm_tick: mobile_link:%d %04x ibrt_link:%d %04x\",\n          app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n          app_tws_ibrt_slave_ibrt_link_connected(),\n          p_ibrt_ctrl->ibrt_conhandle);\n    }\n#else\n    uint16_t conhdl = 0xFFFF;\n    int curr_sco;\n\n    curr_sco = app_audio_manager_get_active_sco_num();\n    if (curr_sco != BT_DEVICE_NUM) {\n      conhdl = btif_hf_get_remote_hci_handle(\n          *app_audio_manager_get_active_sco_chnl());\n    }\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] btpcm_tick:%x\",\n                       bt_syn_get_curr_ticks(conhdl));\n#endif\n    btdrv_syn_clr_trigger();\n    return 1;\n  }\n  return 0;\n}\n\nvoid app_bt_stream_sco_trigger_btpcm_start(void) {\n  uint32_t curr_ticks = 0;\n  uint32_t tg_acl_trigger_offset_time = 0;\n  uint16_t conhdl = 0xFFFF;\n\n  uint32_t lock;\n\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (app_tws_ibrt_mobile_link_connected()) {\n    conhdl = p_ibrt_ctrl->mobile_conhandle;\n#ifdef __SW_TRIG__\n    btdrv_sync_sw_trig_store_conhdl(p_ibrt_ctrl->mobile_conhandle);\n#endif\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    conhdl = p_ibrt_ctrl->ibrt_conhandle;\n#ifdef __SW_TRIG__\n    btdrv_sync_sw_trig_store_conhdl(p_ibrt_ctrl->ibrt_conhandle);\n#endif\n  } else {\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][SCO] btpcm_startr mobile:%d %04x ibrt:%d %04x\",\n        app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n        app_tws_ibrt_slave_ibrt_link_connected(), p_ibrt_ctrl->ibrt_conhandle);\n  }\n#else\n  int curr_sco;\n  curr_sco = app_audio_manager_get_active_sco_num();\n  if (curr_sco != BT_DEVICE_NUM) {\n    conhdl =\n        btif_hf_get_remote_hci_handle(*app_audio_manager_get_active_sco_chnl());\n  }\n#endif\n\n  lock = int_lock();\n  curr_ticks = bt_syn_get_curr_ticks(conhdl);\n\n  tg_acl_trigger_offset_time =\n      (curr_ticks + 0x180) - ((curr_ticks + 0x180) % 192);\n\n  btdrv_set_bt_pcm_triggler_en(0);\n  btdrv_set_bt_pcm_en(0);\n  btdrv_syn_clr_trigger();\n  btdrv_enable_playback_triggler(SCO_TRIGGLE_MODE);\n\n#if defined(IBRT)\n  if (app_tws_ibrt_mobile_link_connected()) {\n    bt_syn_set_tg_ticks(tg_acl_trigger_offset_time,\n                        p_ibrt_ctrl->mobile_conhandle, BT_TRIG_SLAVE_ROLE);\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] btpcm_startr set ticks:%d,\",\n                       tg_acl_trigger_offset_time);\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    bt_syn_set_tg_ticks(tg_acl_trigger_offset_time, p_ibrt_ctrl->ibrt_conhandle,\n                        BT_TRIG_SLAVE_ROLE);\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] btpcm_startr set ticks:%d,\",\n                       tg_acl_trigger_offset_time);\n  } else {\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][SCO] btpcm_startr mobile:%d %04x ibrt:%d %04x\",\n        app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n        app_tws_ibrt_slave_ibrt_link_connected(), p_ibrt_ctrl->ibrt_conhandle);\n  }\n  TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] btpcm_startr get ticks:%d,\", curr_ticks);\n\n#else\n  bt_syn_set_tg_ticks(tg_acl_trigger_offset_time, conhdl, BT_TRIG_SLAVE_ROLE);\n#endif\n  btdrv_set_bt_pcm_triggler_en(1);\n  btdrv_set_bt_pcm_en(1);\n  app_bt_stream_sco_trigger_set_btpcm_triggle(1);\n  TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] btpcm_startr curr:%x, trig:%x, curr:%x\",\n                     btdrv_syn_get_curr_ticks(), tg_acl_trigger_offset_time,\n                     bt_syn_get_curr_ticks(conhdl));\n  int_unlock(lock);\n}\n\nvoid app_bt_stream_sco_trigger_btpcm_stop(void) { return; }\n\n#define TIRG_DELAY_THRESHOLD_325US                                             \\\n  (15)                      // total:TIRG_DELAY_THRESHOLD_325US*325us\n#define TIRG_DELAY_MAX (20) // total:20*TIRG_DELAY_325US*325us\n\n#define TIRG_DELAY_325US                                                       \\\n  (96) // total:TIRG_DELAY_325US*325us It' up to the codec and bt pcm pingpang\n       // buffer.\n\nvoid app_bt_stream_sco_trigger_codecpcm_start(uint32_t btclk, uint16_t btcnt) {\n  uint32_t curr_ticks = 0;\n  uint32_t tg_acl_trigger_offset_time = 0;\n  uint32_t lock;\n  uint16_t conhdl = 0xFFFF;\n  // must lock the interrupts when set trig ticks.\n\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (app_tws_ibrt_mobile_link_connected()) {\n    conhdl = p_ibrt_ctrl->mobile_conhandle;\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    conhdl = p_ibrt_ctrl->ibrt_conhandle;\n  } else {\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][SCO] codecpcm_start mobile_link:%d %04x ibrt_link:%d %04x\",\n        app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n        app_tws_ibrt_slave_ibrt_link_connected(), p_ibrt_ctrl->ibrt_conhandle);\n  }\n#else\n  int curr_sco;\n  curr_sco = app_audio_manager_get_active_sco_num();\n  if (curr_sco != BT_DEVICE_NUM) {\n    conhdl =\n        btif_hf_get_remote_hci_handle(*app_audio_manager_get_active_sco_chnl());\n  }\n#endif\n\n  lock = int_lock();\n  curr_ticks = bt_syn_get_curr_ticks(conhdl);\n  TRACE_AUD_STREAM_I(\"[[STRM_TRIG][SCO] codecpcm_start 1 curr:%d clk:%dcnt:%d\",\n                     curr_ticks, btclk, btcnt);\n#ifdef LOW_DELAY_SCO\n  tg_acl_trigger_offset_time = btclk + 12 + MASTER_MOBILE_BTCLK_OFFSET;\n#else\n  tg_acl_trigger_offset_time = btclk + 24 + MASTER_MOBILE_BTCLK_OFFSET;\n#endif\n\n  tg_acl_trigger_offset_time = tg_acl_trigger_offset_time * 2;\n  if (tg_acl_trigger_offset_time < curr_ticks + TIRG_DELAY_THRESHOLD_325US) {\n    int tirg_delay = 0;\n    tirg_delay = ((curr_ticks + TIRG_DELAY_THRESHOLD_325US) -\n                  tg_acl_trigger_offset_time) /\n                 TIRG_DELAY_325US;\n    tirg_delay = tirg_delay + 1;\n    if (tirg_delay > TIRG_DELAY_MAX) {\n      tirg_delay = TIRG_DELAY_MAX;\n      TRACE_AUD_STREAM_W(\"[STRM_TRIG][SCO] codecpcm_start bt clk convolution!\");\n    }\n    tg_acl_trigger_offset_time =\n        tg_acl_trigger_offset_time + tirg_delay * TIRG_DELAY_325US;\n    TRACE_AUD_STREAM_W(\"[STRM_TRIG][SCO] codecpcm_start need more \"\n                       \"tirg_delay:%d offset:%d curr:%d,\",\n                       tirg_delay, tg_acl_trigger_offset_time, curr_ticks);\n  }\n  tg_acl_trigger_offset_time &= 0x0fffffff;\n\n  btdrv_syn_trigger_codec_en(0);\n  //    af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, false);\n  //    af_codec_sync_config(AUD_STREAM_CAPTURE, AF_CODEC_SYNC_TYPE_BT, false);\n  btdrv_syn_clr_trigger();\n\n#if defined(IBRT)\n  if (app_tws_ibrt_mobile_link_connected()) {\n    bt_syn_set_tg_ticks(tg_acl_trigger_offset_time,\n                        p_ibrt_ctrl->mobile_conhandle, BT_TRIG_SLAVE_ROLE);\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] codecpcm_start set 2 offset:%d\",\n                       tg_acl_trigger_offset_time);\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    bt_syn_set_tg_ticks(tg_acl_trigger_offset_time, p_ibrt_ctrl->ibrt_conhandle,\n                        BT_TRIG_SLAVE_ROLE);\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] codecpcm_start set 2 offset:%d\",\n                       tg_acl_trigger_offset_time);\n  } else {\n    TRACE_AUD_STREAM_I(\n        \"[STRM_TRIG][SCO] codecpcm_start mobile_link:%d %04x ibrt_link:%d %04x\",\n        app_tws_ibrt_mobile_link_connected(), p_ibrt_ctrl->mobile_conhandle,\n        app_tws_ibrt_slave_ibrt_link_connected(), p_ibrt_ctrl->ibrt_conhandle);\n  }\n#else\n  bt_syn_set_tg_ticks(tg_acl_trigger_offset_time, conhdl, BT_TRIG_SLAVE_ROLE);\n#endif\n  btdrv_syn_trigger_codec_en(1);\n  app_bt_stream_sco_trigger_set_codecpcm_triggle(1);\n\n  btdrv_enable_playback_triggler(ACL_TRIGGLE_MODE);\n\n  int_unlock(lock);\n\n  TRACE_AUD_STREAM_I(\n      \"[STRM_TRIG][SCO] codecpcm_start enable curr:%x trig:%x curr:%x\",\n      btdrv_syn_get_curr_ticks(), tg_acl_trigger_offset_time, curr_ticks);\n\n  //    af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, true);\n  //    af_codec_sync_config(AUD_STREAM_CAPTURE, AF_CODEC_SYNC_TYPE_BT, true);\n}\n\nvoid app_bt_stream_sco_trigger_codecpcm_stop(void) {\n#ifdef PLAYBACK_USE_I2S\n  af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, false);\n#else\n  af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, false);\n#endif\n  af_codec_sync_config(AUD_STREAM_CAPTURE, AF_CODEC_SYNC_TYPE_BT, false);\n}\n#endif\n\nvoid speech_tx_aec_set_frame_len(int len);\nint voicebtpcm_pcm_echo_buf_queue_init(uint32_t size);\nvoid voicebtpcm_pcm_echo_buf_queue_reset(void);\nvoid voicebtpcm_pcm_echo_buf_queue_deinit(void);\nint voicebtpcm_pcm_audio_init(int sco_sample_rate, int codec_sample_rate);\nint voicebtpcm_pcm_audio_deinit(void);\nuint32_t voicebtpcm_pcm_audio_data_come(uint8_t *buf, uint32_t len);\nuint32_t voicebtpcm_pcm_audio_more_data(uint8_t *buf, uint32_t len);\nint store_voicebtpcm_m2p_buffer(unsigned char *buf, unsigned int len);\nint get_voicebtpcm_p2m_frame(unsigned char *buf, unsigned int len);\nstatic uint32_t mic_force_mute = 0;\nstatic uint32_t spk_force_mute = 0;\nstatic uint32_t bt_sco_player_code_type = 0;\n\nstatic enum AUD_CHANNEL_NUM_T sco_play_chan_num;\nstatic enum AUD_CHANNEL_NUM_T sco_cap_chan_num;\n\nbool bt_sco_codec_is_msbc(void) {\n  bool en = false;\n#ifdef HFP_1_6_ENABLE\n  if (app_audio_manager_get_scocodecid() == BTIF_HF_SCO_CODEC_MSBC) {\n    en = true;\n  } else\n#endif\n  {\n    en = false;\n  }\n\n  return en;\n}\n\nvoid bt_sco_mobile_clkcnt_get(uint32_t btclk, uint16_t btcnt,\n                              uint32_t *mobile_master_clk,\n                              uint16_t *mobile_master_cnt) {\n#if defined(IBRT)\n  app_tws_ibrt_audio_mobile_clkcnt_get(btclk, btcnt, mobile_master_clk,\n                                       mobile_master_cnt);\n#else\n  uint16_t conhdl = 0xFFFF;\n  int32_t clock_offset;\n  uint16_t bit_offset;\n  int curr_sco;\n\n  curr_sco = app_audio_manager_get_active_sco_num();\n  if (curr_sco != BT_DEVICE_NUM) {\n    conhdl =\n        btif_hf_get_remote_hci_handle(*app_audio_manager_get_active_sco_chnl());\n  }\n\n  if (conhdl != 0xFFFF) {\n    bt_drv_reg_op_piconet_clk_offset_get(conhdl, &clock_offset, &bit_offset);\n    // TRACE_AUD_STREAM_I(\"mobile piconet clk:%d bit:%d loc clk:%d cnt:%d\",\n    // clock_offset, bit_offset, btclk, btcnt);\n    btdrv_slave2master_clkcnt_convert(btclk, btcnt, clock_offset, bit_offset,\n                                      mobile_master_clk, mobile_master_cnt);\n  } else {\n    TRACE_AUD_STREAM_W(\n        \"[STRM_TRIG][SCO] mobile_clkcnt_get warning conhdl NULL conhdl:%x\",\n        conhdl);\n    *mobile_master_clk = 0;\n    *mobile_master_cnt = 0;\n  }\n#endif\n}\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n\n#ifdef CHIP_BEST1000\n#error \"Unsupport SW_SCO_RESAMPLE on best1000 by now\"\n#endif\n#ifdef NO_SCO_RESAMPLE\n#error \"Conflicted config: NO_SCO_RESAMPLE and SW_SCO_RESAMPLE\"\n#endif\n\n// The decoded playback data in the first irq is output to DAC after the second\n// irq (PING-PONG buffer)\n#define SCO_PLAY_RESAMPLE_ALIGN_CNT 2\n\nstatic uint8_t sco_play_irq_cnt;\nstatic bool sco_dma_buf_err;\nstatic struct APP_RESAMPLE_T *sco_capture_resample;\nstatic struct APP_RESAMPLE_T *sco_playback_resample;\n\nstatic int bt_sco_capture_resample_iter(uint8_t *buf, uint32_t len) {\n  voicebtpcm_pcm_audio_data_come(buf, len);\n  return 0;\n}\n\nstatic int bt_sco_playback_resample_iter(uint8_t *buf, uint32_t len) {\n  voicebtpcm_pcm_audio_more_data(buf, len);\n  return 0;\n}\n\n#endif\n#if defined(SCO_DMA_SNAPSHOT)\nextern int process_downlink_bt_voice_frames(uint8_t *in_buf, uint32_t in_len,\n                                            uint8_t *out_buf, uint32_t out_len,\n                                            int32_t codec_type);\nextern int process_uplink_bt_voice_frames(uint8_t *in_buf, uint32_t in_len,\n                                          uint8_t *ref_buf, uint32_t ref_len,\n                                          uint8_t *out_buf, uint32_t out_len,\n                                          int32_t codec_type);\n#define MSBC_FRAME_LEN (60)\n#define PCM_LEN_PER_FRAME (240)\n#define CAL_FRAME_NUM (22)\n\nstatic void bt_sco_codec_tuning(void) {\n  uint32_t btclk;\n  uint16_t btcnt;\n\n  uint32_t mobile_master_clk;\n  uint16_t mobile_master_cnt;\n\n  uint32_t mobile_master_clk_offset;\n  int32_t mobile_master_cnt_offset;\n\n  static float fre_offset = 0.0f;\n  static int32_t mobile_master_cnt_offset_init;\n  static int32_t mobile_master_cnt_offset_old;\n  static uint32_t first_proc_flag = 0;\n#if defined(__AUDIO_RESAMPLE__) && !defined(AUDIO_RESAMPLE_ANTI_DITHER)\n  static uint32_t frame_counter = 0;\n  static int32_t mobile_master_cnt_offset_max = 0;\n  static int32_t mobile_master_cnt_offset_min = 0;\n  static int32_t mobile_master_cnt_offset_resample = 0;\n\n  int32_t offset_max = 0;\n  int32_t offset_min = 0;\n#endif\n\n  bt_drv_reg_op_dma_tc_clkcnt_get(&btclk, &btcnt);\n  bt_sco_mobile_clkcnt_get(btclk, btcnt, &mobile_master_clk,\n                           &mobile_master_cnt);\n\n#if defined(SCO_DMA_SNAPSHOT_DEBUG)\n  TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] tune btclk:%d,btcnt:%d,\",\n                     mobile_master_clk, mobile_master_cnt);\n#endif\n\n  mobile_master_clk_offset =\n      (mobile_master_clk - mobile_master_clk_offset_init) % 12;\n  mobile_master_cnt_offset =\n      mobile_master_clk_offset * 625 + (625 - mobile_master_cnt);\n  mobile_master_cnt_offset =\n      mobile_master_cnt_offset -\n      (MASTER_MOBILE_BTCNT_OFFSET + mobile_master_cnt_offset_init);\n\n  if (app_bt_stream_sco_trigger_codecpcm_tick()) {\n    fre_offset = 0.0f;\n    if (mobile_master_clk_offset < MASTER_MOBILE_BTCLK_OFFSET) {\n      mobile_master_cnt_offset_init = -mobile_master_cnt;\n    } else {\n      mobile_master_cnt_offset_init = 625 - mobile_master_cnt;\n    }\n\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] tune first_cnt:%d offset_init:%d,\",\n                       mobile_master_cnt, mobile_master_cnt_offset_init);\n\n    if (playback_samplerate_codecpcm == AUD_SAMPRATE_16000) {\n#ifdef ANC_APP\n      mobile_master_cnt_offset_init = -232;\n#else\n#if defined(__AUDIO_RESAMPLE__)\n      if (hal_cmu_get_audio_resample_status()) {\n#if defined(AUDIO_RESAMPLE_ANTI_DITHER)\n        mobile_master_cnt_offset_init = 171;\n#else\n        mobile_master_cnt_offset_init = 146;\n#endif\n      } else\n#endif\n      {\n        mobile_master_cnt_offset_init = 113;\n      }\n#endif\n    } else if (playback_samplerate_codecpcm == AUD_SAMPRATE_8000) {\n#ifdef ANC_APP\n      mobile_master_cnt_offset_init = -512;\n#else\n#if defined(__AUDIO_RESAMPLE__)\n      if (hal_cmu_get_audio_resample_status()) {\n#if defined(AUDIO_RESAMPLE_ANTI_DITHER)\n        mobile_master_cnt_offset_init = -270;\n#else\n        mobile_master_cnt_offset_init = -327;\n#endif\n      } else\n#endif\n      {\n        mobile_master_cnt_offset_init = -386;\n      }\n#endif\n    }\n\n#if defined(__AUDIO_RESAMPLE__) && !defined(AUDIO_RESAMPLE_ANTI_DITHER)\n    mobile_master_cnt_offset =\n        mobile_master_clk_offset * 625 + (625 - mobile_master_cnt);\n    mobile_master_cnt_offset =\n        mobile_master_cnt_offset -\n        (MASTER_MOBILE_BTCNT_OFFSET + mobile_master_cnt_offset_init);\n    TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] tune mobile_master_cnt_offset:%d,\",\n                       mobile_master_cnt_offset);\n#ifdef LOW_DELAY_SCO\n    fre_offset =\n        (float)mobile_master_cnt_offset / (CAL_FRAME_NUM * 7.5f * 1000.0f);\n#else\n    fre_offset =\n        (float)mobile_master_cnt_offset / (CAL_FRAME_NUM * 15.0f * 1000.0f);\n#endif\n    first_proc_flag = 0;\n#endif\n\n#if defined(__AUDIO_RESAMPLE__) && !defined(AUDIO_RESAMPLE_ANTI_DITHER)\n    if (hal_cmu_get_audio_resample_status()) {\n      frame_counter = 0;\n      mobile_master_cnt_offset_max = 0;\n      mobile_master_cnt_offset_min = 0;\n      mobile_master_cnt_offset_resample = 0;\n    }\n#endif\n    mobile_master_cnt_offset = 0;\n    mobile_master_cnt_offset_old = 0;\n  }\n\n#if defined(__AUDIO_RESAMPLE__) && !defined(SW_PLAYBACK_RESAMPLE) &&           \\\n    !defined(AUDIO_RESAMPLE_ANTI_DITHER)\n  if (hal_cmu_get_audio_resample_status()) {\n    if (playback_samplerate_codecpcm == AUD_SAMPRATE_16000) {\n      offset_max = 28;\n      offset_min = -33;\n    } else if (playback_samplerate_codecpcm == AUD_SAMPRATE_8000) {\n      offset_max = 12;\n      offset_min = -112;\n    }\n\n    if (mobile_master_cnt_offset > mobile_master_cnt_offset_max) {\n      mobile_master_cnt_offset_max = mobile_master_cnt_offset;\n    }\n\n    if (mobile_master_cnt_offset < mobile_master_cnt_offset_min) {\n      mobile_master_cnt_offset_min = mobile_master_cnt_offset;\n    }\n\n    frame_counter++;\n\n    if (frame_counter >= CAL_FRAME_NUM) {\n      if (mobile_master_cnt_offset_min < offset_min) {\n        mobile_master_cnt_offset_resample =\n            mobile_master_cnt_offset_min - offset_min;\n      } else if (mobile_master_cnt_offset_max > offset_max) {\n        mobile_master_cnt_offset_resample =\n            mobile_master_cnt_offset_max - offset_max;\n      } else {\n        mobile_master_cnt_offset_resample = 0;\n      }\n      TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] tune mobile_master_cnt_offset:%d/%d\",\n                         mobile_master_cnt_offset_min,\n                         mobile_master_cnt_offset_max);\n      mobile_master_cnt_offset = mobile_master_cnt_offset_resample;\n\n      if (first_proc_flag == 0) {\n        fre_offset = ((int32_t)(mobile_master_cnt_offset * 0.5f)) * 0.0000001f +\n                     (mobile_master_cnt_offset - mobile_master_cnt_offset_old) *\n                         0.0000001f;\n        first_proc_flag = 1;\n      } else {\n        fre_offset = fre_offset +\n                     ((int32_t)(mobile_master_cnt_offset * 0.5f)) * 0.0000001f +\n                     (mobile_master_cnt_offset - mobile_master_cnt_offset_old) *\n                         0.0000001f;\n        first_proc_flag = 1;\n      }\n\n      mobile_master_cnt_offset_old = mobile_master_cnt_offset;\n#if defined(SCO_DMA_SNAPSHOT_DEBUG)\n      TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] tune mobile_master_cnt_offset:%d\",\n                         mobile_master_cnt_offset);\n#endif\n      mobile_master_cnt_offset_max = 0;\n      mobile_master_cnt_offset_min = 0;\n      frame_counter = 0;\n    }\n  } else\n#endif\n  {\n    fre_offset =\n        fre_offset +\n        ((int32_t)(mobile_master_cnt_offset * 0.5f)) * 0.00000001f +\n        (mobile_master_cnt_offset - mobile_master_cnt_offset_old) * 0.00000001f;\n\n    mobile_master_cnt_offset_old = mobile_master_cnt_offset;\n    // TRACE_AUD_STREAM_I(\"mobile_master_cnt_offset:%d\",mobile_master_cnt_offset);\n    first_proc_flag = 1;\n  }\n\n#if defined(SCO_DMA_SNAPSHOT_DEBUG)\n  TRACE_AUD_STREAM_I(\"[STRM_TRIG][SCO] tune fre_offset:%d\",\n                     (int)(fre_offset * 10000000.0f));\n#endif\n  if (first_proc_flag == 1) {\n    if (fre_offset > 0.0001f)\n      fre_offset = 0.0001f;\n    if (fre_offset < -0.0001f)\n      fre_offset = -0.0001f;\n  }\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE)\n  app_resample_tune(playback_samplerate_codecpcm, fre_offset);\n#else\n  af_codec_tune(AUD_STREAM_NUM, fre_offset);\n#endif\n\n  return;\n}\n#endif\nextern CQueue *get_tx_esco_queue_ptr();\n\n#if defined(BONE_SENSOR_TDM)\n#define MIC_TDM_FRAME_MS (15)\n#define MIC_TDM_MAX_CH (3)\nstatic int16_t mic_tdm_buf[SPEECH_FRAME_MS_TO_LEN(16000, MIC_TDM_FRAME_MS)];\n\n// forward\nstatic uint32_t bt_sco_codec_capture_data(uint8_t *buf, uint32_t len);\n\nuint32_t tdm_callback_func(uint8_t *buf_ptr, uint32_t frame_len) {\n  int16_t *pcm_buf = (int16_t *)buf_ptr;\n\n  // TODO: Check frame_len, depend on sample rate\n\n  for (uint32_t i = 0; i < frame_len; i++) {\n    mic_tdm_buf[i] = pcm_buf[i];\n  }\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n  ASSERT(0,\n         \"[%s] Do not support defined(__AUDIO_RESAMPLE__) && \"\n         \"defined(SW_SCO_RESAMPLE)\",\n         __func__);\n#endif\n\n  return 0;\n}\n\nvoid bt_sco_get_tdm_buffer(uint8_t **buf, uint32_t *len) {\n  *buf = (uint8_t *)&mic_tdm_buf[0];\n  *len = sizeof(mic_tdm_buf);\n}\n#endif\n\n#if defined(ANC_NOISE_TRACKER)\nstatic int16_t *anc_buf = NULL;\n#endif\n\n#if defined(ANC_WNR_ENABLED)\n#if defined(SPEECH_TX_24BIT)\nstatic int32_t wnr_buf[256 * 2];\n#else\nstatic short wnr_buf[256 * 2];\n#endif\n#endif\n// #define BT_SCO_HANDLER_PROFILE\n\n//( codec:mic-->btpcm:tx\n// codec:mic\nstatic uint32_t bt_sco_codec_capture_data(uint8_t *buf, uint32_t len) {\n  app_bt_stream_trigger_checker_handler(TRIGGER_CHECKER_HFP_AUDPCM_CAPTURE);\n\n#if defined(ANC_NOISE_TRACKER)\n  int16_t *pcm_buf = (int16_t *)buf;\n  uint32_t pcm_len = len / sizeof(short);\n  uint32_t ch_num =\n      SPEECH_CODEC_CAPTURE_CHANNEL_NUM + ANC_NOISE_TRACKER_CHANNEL_NUM;\n  uint32_t remain_ch_num = SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n\n#if defined(SPEECH_TX_AEC_CODEC_REF)\n  ch_num += 1;\n  remain_ch_num += 1;\n#endif\n\n  ASSERT(pcm_len % ch_num == 0, \"[%s] input data length error\", __FUNCTION__);\n\n  // assume anc mic in ch0\n  for (uint32_t i = 0, j = 0; i < pcm_len;\n       i += ch_num, j += ANC_NOISE_TRACKER_CHANNEL_NUM) {\n    for (uint32_t ch = 0; ch < ANC_NOISE_TRACKER_CHANNEL_NUM; ch++)\n      anc_buf[j + ch] = pcm_buf[i + ch];\n  }\n\n  noise_tracker_process(anc_buf,\n                        pcm_len / ch_num * ANC_NOISE_TRACKER_CHANNEL_NUM);\n\n  for (uint32_t i = 0, j = 0; i < pcm_len; i += ch_num, j += remain_ch_num) {\n    for (uint32_t chi = ANC_NOISE_TRACKER_CHANNEL_NUM, cho = 0; chi < ch_num;\n         chi++, cho++)\n      pcm_buf[j + cho] = pcm_buf[i + chi];\n  }\n\n  len = len / ch_num * remain_ch_num;\n#endif\n\n#if defined(AF_ADC_I2S_SYNC)\n  // TRACE_AUD_STREAM_I(\"[SCO][MIC] cnt = %d\", codec_capture_cnt++);\n#endif\n\n#if defined(ANC_WNR_ENABLED)\n\n#if defined(SPEECH_TX_24BIT)\n  int32_t *pcm_buf = (int32_t *)buf;\n  uint32_t pcm_len = len / sizeof(int32_t);\n#else\n  int16_t *pcm_buf = (int16_t *)buf;\n  uint32_t pcm_len = len / sizeof(short);\n#endif\n\n  for (uint32_t i = 0; i < pcm_len / sco_cap_chan_num; i++) {\n    wnr_buf[2 * i] = pcm_buf[sco_cap_chan_num * i];\n    wnr_buf[2 * i + 1] = pcm_buf[sco_cap_chan_num * i + 1];\n  }\n\n  // TRACE(\"sco_cap_chan_num=%d\",sco_cap_chan_num);\n  if (app_anc_work_status()) {\n    // 2ch, interleave, 24bits\n    anc_wnr_process(wnr_buf, pcm_len * 2 / sco_cap_chan_num);\n  }\n#endif\n\n  if (mic_force_mute || btapp_hfp_mic_need_skip_frame() ||\n      btapp_hfp_need_mute()) {\n    memset(buf, 0, len);\n  }\n\n#if defined(SCO_DMA_SNAPSHOT)\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t start_ticks = hal_fast_sys_timer_get();\n#endif\n\n  int pingpang;\n\n  // processing  ping pang flag\n  if (buf == capture_buf_codecpcm) {\n    pingpang = 0;\n  } else {\n    pingpang = 1;\n  }\n\n  uint16_t *playback_dst =\n      (uint16_t *)(playback_buf_btpcm + (pingpang)*playback_size_btpcm / 2);\n  uint16_t *playback_src = (uint16_t *)playback_buf_btpcm_cache;\n\n  for (uint32_t i = 0; i < playback_size_btpcm / 4; i++) {\n    playback_dst[i] = playback_src[i];\n  }\n#ifdef TX_RX_PCM_MASK\n  // processing btpcm.(It must be from CPU's copy )\n  if (btdrv_is_pcm_mask_enable() == 1 && bt_sco_codec_is_msbc()) {\n    uint32_t lock;\n    uint32_t i;\n    // must lock the interrupts when exchanging data.\n    lock = int_lock();\n    uint16_t *playback_src =\n        (uint16_t *)(playback_buf_btpcm + (pingpang)*playback_size_btpcm / 2);\n    for (i = 0; i < playback_size_btpcm_copy; i++) {\n      playback_buf_btpcm_copy[i] = (uint8_t)(playback_src[i] >> 8);\n    }\n    int_unlock(lock);\n  }\n#endif\n\n  // TRACE_AUD_STREAM_I(\"pcm length:%d\",len);\n\n  // processing clock\n  bt_sco_codec_tuning();\n\n  // processing mic\n  uint8_t *capture_pcm_frame_p =\n      capture_buf_codecpcm + pingpang * (capture_size_codecpcm) / 2;\n  // uint8_t *dst=(uint8_t\n  // *)(playback_buf_btpcm+(pingpang)*playback_size_btpcm/2);\n  uint8_t *dst = playback_buf_btpcm_cache;\n  uint8_t *ref_pcm_frame_p =\n      playback_buf_codecpcm + (pingpang ^ 1) * (playback_size_codecpcm) / 2;\n\n#if defined(HFP_1_6_ENABLE)\n  process_uplink_bt_voice_frames(capture_pcm_frame_p, len, ref_pcm_frame_p,\n                                 (playback_size_codecpcm) / 2, dst, len,\n                                 app_audio_manager_get_scocodecid());\n#else\n  process_uplink_bt_voice_frames(capture_pcm_frame_p, len, ref_pcm_frame_p,\n                                 (playback_size_codecpcm) / 2, dst, len,\n                                 BTIF_HF_SCO_CODEC_CVSD);\n#endif\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t end_ticks = hal_fast_sys_timer_get();\n  TRACE_AUD_STREAM_I(\"[SCO][MIC] takes %d us\",\n                     FAST_TICKS_TO_US(end_ticks - start_ticks));\n#endif\n\n  return len;\n\n#else\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t start_ticks = hal_fast_sys_timer_get();\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n  int16_t *pcm_buf = (int16_t *)buf;\n  uint32_t frame_len = len / sizeof(short) / SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n  uint32_t ch_num = SPEECH_CODEC_CAPTURE_CHANNEL_NUM + 1;\n\n  ASSERT(SPEECH_CODEC_CAPTURE_CHANNEL_NUM < MIC_TDM_MAX_CH,\n         \"[%s] SPEECH_CODEC_CAPTURE_CHANNEL_NUM(%d) is invalid\", __func__,\n         SPEECH_CODEC_CAPTURE_CHANNEL_NUM);\n  // TODO: Check len, depend on sample rate\n\n  for (uint32_t ch = 0; ch < SPEECH_CODEC_CAPTURE_CHANNEL_NUM; ch++) {\n    for (uint32_t i = 0; i < frame_len; i++) {\n      mic_tdm_buf[ch_num * i + ch] =\n          pcm_buf[SPEECH_CODEC_CAPTURE_CHANNEL_NUM * i + ch];\n    }\n  }\n\n  return len;\n#endif\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n  if (hal_cmu_get_audio_resample_status()) {\n    if (af_stream_buffer_error(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE)) {\n      sco_dma_buf_err = true;\n    }\n    // The decoded playback data in the first irq is output to DAC after the\n    // second irq (PING-PONG buffer), so it is aligned with the capture data\n    // after 2 playback irqs.\n    if (sco_play_irq_cnt < SCO_PLAY_RESAMPLE_ALIGN_CNT) {\n      // Skip processing\n      return len;\n    }\n    app_capture_resample_run(sco_capture_resample, buf, len);\n  } else\n#endif\n  {\n    voicebtpcm_pcm_audio_data_come(buf, len);\n  }\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t end_ticks = hal_fast_sys_timer_get();\n  TRACE_AUD_STREAM_I(\"[SCO][MIC] takes %d us\",\n                     FAST_TICKS_TO_US(end_ticks - start_ticks));\n#endif\n\n  return len;\n#endif\n}\n\n#ifdef _SCO_BTPCM_CHANNEL_\n// btpcm:tx\nstatic uint32_t bt_sco_btpcm_playback_data(uint8_t *buf, uint32_t len) {\n  app_bt_stream_trigger_checker_handler(TRIGGER_CHECKER_HFP_BTPCM_PLAYERBLACK);\n\n#if defined(SCO_DMA_SNAPSHOT)\n  return len;\n#else\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t start_ticks = hal_fast_sys_timer_get();\n#endif\n\n  get_voicebtpcm_p2m_frame(buf, len);\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t end_ticks = hal_fast_sys_timer_get();\n  TRACE_AUD_STREAM_I(\"[SCO][SPK] takes %d us\",\n                     FAST_TICKS_TO_US(end_ticks - start_ticks));\n#endif\n\n  return len;\n\n#endif\n}\n//)\n\n#if defined(AF_ADC_I2S_SYNC)\nvoid codec_capture_i2s_enable(void) {\n  uint32_t lock;\n\n  TRACE_AUD_STREAM_I(\"[SCO][IIS] Start...\", __func__);\n\n  lock = int_lock();\n  hal_codec_capture_enable();\n  hal_i2s_enable(HAL_I2S_ID_0);\n  int_unlock(lock);\n}\n#endif\n\nextern CQueue *get_rx_esco_queue_ptr();\n\nstatic volatile bool is_codec_stream_started = false;\n#ifdef PCM_PRIVATE_DATA_FLAG\n\nvoid bt_sco_btpcm_get_pcm_priv_data(struct PCM_DATA_FLAG_T *pcm_data,\n                                    uint8_t *buf, uint32_t len) {\n  uint8_t frame_num = len / 120;\n  for (uint8_t i = 0; i < frame_num; i++) {\n    uint8_t head_pos = 120 * i;\n    pcm_data[i].undef = buf[head_pos];\n    pcm_data[i].bitcnt = (buf[head_pos + 2] | (buf[head_pos + 4] << 8)) & 0x3ff;\n    pcm_data[i].softbit_flag = (buf[head_pos + 4] >> 5) & 3;\n    pcm_data[i].btclk = buf[head_pos + 6] | (buf[head_pos + 8] << 8) |\n                        (buf[head_pos + 10] << 16) | (buf[head_pos + 12] << 24);\n    pcm_data[i].reserved = buf[head_pos + 14] | (buf[head_pos + 16] << 8) |\n                           (buf[head_pos + 18] << 16) |\n                           (buf[head_pos + 20] << 24);\n    // clear private msg in buffer\n    for (uint8_t j = 0; j < PCM_PRIVATE_DATA_LENGTH; j++)\n      buf[head_pos + 2 * j] = 0;\n  }\n}\n#endif\n//( btpcm:rx-->codec:spk\n// btpcm:rx\nextern void bt_drv_reg_op_set_music_ongong_flag();\nextern void bt_drv_reg_op_clear_music_ongong_flag();\nstatic uint32_t bt_sco_btpcm_capture_data(uint8_t *buf, uint32_t len) {\n  int POSSIBLY_UNUSED sRet = 0;\n\n  app_bt_stream_trigger_checker_handler(TRIGGER_CHECKER_HFP_BTPCM_CAPTURE);\n\n#ifdef __BT_ONE_BRING_TWO__\n  if (a2dp_is_music_ongoing())\n    bt_drv_reg_op_set_music_ongong_flag();\n  else\n    bt_drv_reg_op_clear_music_ongong_flag();\n#endif\n#if defined(PCM_PRIVATE_DATA_FLAG) && defined(PCM_FAST_MODE)\n  bt_sco_btpcm_get_pcm_priv_data(pcm_data_param, buf, len);\n\n#endif\n\n#if defined(SCO_DMA_SNAPSHOT)\n  uint32_t btclk;\n  uint16_t btcnt;\n\n  uint32_t mobile_master_clk;\n  uint16_t mobile_master_cnt;\n\n  bool codec_stream_trig = false;\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t start_ticks = hal_fast_sys_timer_get();\n#endif\n\n  if ((is_codec_stream_started == false) && (buf == capture_buf_btpcm)) {\n    if (!af_stream_buffer_error(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE)) {\n      bt_drv_reg_op_dma_tc_clkcnt_get(&btclk, &btcnt);\n      bt_sco_mobile_clkcnt_get(btclk, btcnt, &mobile_master_clk,\n                               &mobile_master_cnt);\n      hal_sys_timer_delay_us(1);\n      if (!af_stream_buffer_error(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE)) {\n        codec_stream_trig = true;\n      }\n    }\n  }\n  /*\n      uint32_t curr_ticks;\n\n      ibbt_ctrl_t *p_ibbt_ctrl = app_tws_ibbt_get_bt_ctrl_ctx();\n      if (app_tws_ibbt_tws_link_connected()){\n          curr_ticks = bt_syn_get_curr_ticks(IBBT_MASTER ==\n     p_ibbt_ctrl->current_role ? p_ibbt_ctrl->mobile_conhandle :\n     p_ibbt_ctrl->ibbt_conhandle); TRACE_AUD_STREAM_I(\"bt_sco_btpcm_capture_data\n     +++++++++++++++++++++++++++++++++curr_ticks:%d,\",curr_ticks); }else{\n          curr_ticks = btdrv_syn_get_curr_ticks();\n       TRACE_AUD_STREAM_I(\"--------------------------------------\");\n      }\n  */\n  sco_btpcm_mute_flag = 0;\n\n  if (codec_stream_trig) {\n    if (app_bt_stream_sco_trigger_btpcm_tick()) {\n      af_stream_dma_tc_irq_enable(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n      af_stream_dma_tc_irq_disable(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE);\n\n#if defined(SCO_DMA_SNAPSHOT_DEBUG)\n      af_stream_dma_tc_irq_enable(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE);\n#endif\n      TRACE_AUD_STREAM_I(\"[SCO][BTPCMRX] buf:%p,capture_buf_btpcm:%p\", buf,\n                         capture_buf_btpcm);\n\n      // uint16_t *source=(uint16_t *)buf;\n      // DUMP16(\"%02x,\", source, MSBC_FRAME_LEN);\n\n#if defined(BONE_SENSOR_TDM)\n#if defined(AF_ADC_I2S_SYNC)\n      hal_i2s_enable_delay(HAL_I2S_ID_0);\n      // hal_codec_capture_enable_delay();\n#endif\n      tdm_stream_start();\n#endif\n      mobile_master_clk_offset_init = mobile_master_clk % 12;\n      app_bt_stream_sco_trigger_codecpcm_start(mobile_master_clk,\n                                               mobile_master_cnt);\n      is_codec_stream_started = true;\n\n#if defined(SCO_DMA_SNAPSHOT_DEBUG)\n      TRACE_AUD_STREAM_I(\"[SCO][BTPCMRX] btclk:%d,btcnt:%d,\", mobile_master_clk,\n                         mobile_master_cnt);\n#endif\n    }\n  } else {\n#if defined(SCO_DMA_SNAPSHOT_DEBUG)\n    bt_drv_reg_op_dma_tc_clkcnt_get(&btclk, &btcnt);\n    bt_sco_mobile_clkcnt_get(btclk, btcnt, &mobile_master_clk,\n                             &mobile_master_cnt);\n    TRACE_AUD_STREAM_I(\"[SCO][BTPCMRX]:btclk:%d,btcnt:%d,\", mobile_master_clk,\n                       mobile_master_cnt);\n#endif\n  }\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t end_ticks = hal_fast_sys_timer_get();\n  TRACE_AUD_STREAM_I(\"[SCO][BTPCMRX] takes %d us\",\n                     FAST_TICKS_TO_US(end_ticks - start_ticks));\n#endif\n\n  return len;\n\n#else\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t start_ticks = hal_fast_sys_timer_get();\n#endif\n\n  if (!is_sco_mode()) {\n    TRACE_AUD_STREAM_E(\"[SCO][BTPCMRX] player exit!\");\n    memset(buf, 0x0, len);\n    return len;\n  }\n\n#if defined(TX_RX_PCM_MASK)\n  TRACE_AUD_STREAM_I(\"[SCO][BTPCMRX] TX_RX_PCM_MASK\");\n  CQueue *Rx_esco_queue_temp = NULL;\n  Rx_esco_queue_temp = get_rx_esco_queue_ptr();\n  if (bt_sco_codec_is_msbc() && btdrv_is_pcm_mask_enable() == 1) {\n    memset(buf, 0, len);\n    int status = 0;\n    len /= 2;\n    uint8_t rx_data[len];\n    status = DeCQueue(Rx_esco_queue_temp, rx_data, len);\n    for (uint32_t i = 0; i < len; i++) {\n      buf[2 * i + 1] = rx_data[i];\n    }\n    len *= 2;\n    if (status) {\n      TRACE_AUD_STREAM_E(\"[SCO][BTPCMRX] Rx Dec Fail\");\n    }\n  }\n#endif\n\n  if (is_codec_stream_started == false) {\n    if (bt_sco_codec_is_msbc() == false)\n      hal_sys_timer_delay_us(3000);\n\n    TRACE_AUD_STREAM_I(\"[SCO][BTPCMRX] start codec %d\",\n                       FAST_TICKS_TO_US(hal_fast_sys_timer_get()));\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    af_stream_start(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n#if defined(AF_ADC_I2S_SYNC)\n    hal_i2s_enable_delay(HAL_I2S_ID_0);\n    hal_codec_capture_enable_delay();\n#endif\n    tdm_stream_start();\n#endif\n\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n\n#if defined(AF_ADC_I2S_SYNC)\n    codec_capture_i2s_enable();\n#endif\n    is_codec_stream_started = true;\n\n    return len;\n  }\n  store_voicebtpcm_m2p_buffer(buf, len);\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t end_ticks = hal_fast_sys_timer_get();\n  TRACE_AUD_STREAM_I(\"[SCO][BTPCMRX] takes %d us\",\n                     FAST_TICKS_TO_US(end_ticks - start_ticks));\n#endif\n\n  return len;\n#endif\n}\n#endif\n\n#ifdef __BT_ANC__\nstatic void bt_anc_sco_down_sample_16bits(int16_t *dst, int16_t *src,\n                                          uint32_t dst_cnt) {\n  for (uint32_t i = 0; i < dst_cnt; i++) {\n    dst[i] = src[i * bt_sco_samplerate_ratio * sco_play_chan_num];\n  }\n}\n#endif\n\nstatic void bt_sco_codec_playback_data_post_handler(uint8_t *buf, uint32_t len,\n                                                    void *cfg) {\n  POSSIBLY_UNUSED struct AF_STREAM_CONFIG_T *config =\n      (struct AF_STREAM_CONFIG_T *)cfg;\n\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n#ifdef TWS_PROMPT_SYNC\n  tws_playback_ticks_check_for_mix_prompt();\n#endif\n  if (audio_prompt_is_playing_ongoing()) {\n    audio_prompt_processing_handler(len, buf);\n  }\n#else\n  app_ring_merge_more_data(buf, len);\n#endif\n}\n\nstatic uint32_t bt_sco_codec_playback_data(uint8_t *buf, uint32_t len) {\n  app_bt_stream_trigger_checker_handler(TRIGGER_CHECKER_HFP_AUDPCM_PLAYERBLACK);\n\n  bt_set_playback_triggered(true);\n\n#if defined(IBRT) && defined(RSSI_GATHERING_ENABLED)\n  app_ibrt_ui_rssi_process();\n#endif\n\n#ifdef BT_XTAL_SYNC\n#ifdef BT_XTAL_SYNC_NEW_METHOD\n#ifdef IBRT\n  bool valid = false;\n  uint32_t bitoffset = 0;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  if (app_tws_ibrt_mobile_link_connected()) {\n    valid = true;\n    bitoffset = btdrv_rf_bitoffset_get(p_ibrt_ctrl->mobile_conhandle - 0x80);\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    valid = true;\n    bitoffset = btdrv_rf_bitoffset_get(p_ibrt_ctrl->ibrt_conhandle - 0x80);\n  }\n\n  if (valid) {\n    if (app_if_need_fix_target_rxbit() == false) {\n      if (bitoffset < XTAL_OFFSET)\n        bitoffset = XTAL_OFFSET;\n      else if (bitoffset > SLOT_SIZE - XTAL_OFFSET)\n        bitoffset = SLOT_SIZE - XTAL_OFFSET;\n    }\n#ifdef BT_XTAL_SYNC_SLOW\n    bt_xtal_sync_new_new(bitoffset, app_if_need_fix_target_rxbit(),\n                         BT_XTAL_SYNC_MODE_WITH_MOBILE);\n#else\n    bt_xtal_sync_new(bitoffset, app_if_need_fix_target_rxbit(),\n                     BT_XTAL_SYNC_MODE_WITH_MOBILE);\n#endif\n  }\n#endif\n#else\n  bt_xtal_sync(BT_XTAL_SYNC_MODE_VOICE);\n#endif\n#endif\n\n#if defined(AF_ADC_I2S_SYNC)\n  // TRACE_AUD_STREAM_I(\"[%s] cnt = %d\", __func__, codec_playback_cnt++);\n#endif\n\n#if defined(SCO_DMA_SNAPSHOT)\n  // processing  ping pang flag\n  int pingpang;\n\n  if (buf == playback_buf_codecpcm) {\n    pingpang = 0;\n  } else {\n    pingpang = 1;\n  }\n#ifdef TX_RX_PCM_MASK\n  // processing btpcm.(It must be from CPU's copy )\n  if (btdrv_is_pcm_mask_enable() == 1 && bt_sco_codec_is_msbc()) {\n    uint32_t lock;\n    uint32_t i;\n    // must lock the interrupts when exchanging data.\n    lock = int_lock();\n    uint16_t *capture_dst =\n        (uint16_t *)(capture_buf_btpcm + pingpang * capture_size_btpcm / 2);\n\n    for (i = 0; i < capture_size_btpcm / 4; i++) {\n      capture_dst[i] = (uint16_t)capture_buf_btpcm_copy[i] << 8;\n    }\n    int_unlock(lock);\n  }\n#endif\n\n  // processing spk\n  uint8_t *playbakce_pcm_frame_p =\n      playback_buf_codecpcm + pingpang * playback_size_codecpcm / 2;\n  uint8_t *source = capture_buf_btpcm + pingpang * capture_size_btpcm / 2;\n\n  if (sco_btpcm_mute_flag == 1 || sco_disconnect_mute_flag == 1) {\n    for (uint32_t i = 0; i < playback_size_btpcm / 2; i++) {\n      source[i] = MUTE_PATTERN;\n    }\n\n    TRACE_AUD_STREAM_I(\"[SCO][SPK]mute....................\");\n  } else {\n    sco_btpcm_mute_flag = 1;\n  }\n\n#if defined(HFP_1_6_ENABLE)\n  uint32_t source_len = playback_size_btpcm / 2;\n  if (app_audio_manager_get_scocodecid() == BTIF_HF_SCO_CODEC_MSBC) {\n    uint16_t *source_u16 = (uint16_t *)source;\n    for (uint32_t i = 0; i < source_len / 2; i++) {\n      source[i] = (source_u16[i] >> 8);\n    }\n    source_len >>= 1;\n  }\n  process_downlink_bt_voice_frames(source, source_len, playbakce_pcm_frame_p,\n                                   (playback_size_codecpcm) /\n                                       sco_play_chan_num / 2,\n                                   app_audio_manager_get_scocodecid());\n#else\n  process_downlink_bt_voice_frames(\n      source, (playback_size_btpcm) / 2, playbakce_pcm_frame_p,\n      (playback_size_codecpcm) / sco_play_chan_num / 2, BTIF_HF_SCO_CODEC_CVSD);\n#endif\n\n  if (sco_play_chan_num == AUD_CHANNEL_NUM_2) {\n    // Convert mono data to stereo data\n#if defined(SPEECH_RX_24BIT)\n    app_bt_stream_copy_track_one_to_two_24bits(\n        (int32_t *)playbakce_pcm_frame_p, (int32_t *)playbakce_pcm_frame_p,\n        playback_size_codecpcm / 2 / sco_play_chan_num / sizeof(int32_t));\n#else\n    app_bt_stream_copy_track_one_to_two_16bits(\n        (int16_t *)playbakce_pcm_frame_p, (int16_t *)playbakce_pcm_frame_p,\n        playback_size_codecpcm / 2 / sco_play_chan_num / sizeof(int16_t));\n#endif\n  }\n  return len;\n#else\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t start_ticks = hal_fast_sys_timer_get();\n#endif\n\n  uint8_t *dec_buf;\n  uint32_t mono_len;\n\n#if defined(SPEECH_RX_24BIT)\n  len /= 2;\n#endif\n\n#ifdef __BT_ANC__\n  mono_len = len / sco_play_chan_num / bt_sco_samplerate_ratio;\n  dec_buf = bt_anc_sco_dec_buf;\n#else\n  mono_len = len / sco_play_chan_num;\n  dec_buf = buf;\n#endif\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n  if (hal_cmu_get_audio_resample_status()) {\n    if (sco_play_irq_cnt < SCO_PLAY_RESAMPLE_ALIGN_CNT) {\n      sco_play_irq_cnt++;\n    }\n    if (sco_dma_buf_err ||\n        af_stream_buffer_error(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK)) {\n      sco_dma_buf_err = false;\n      sco_play_irq_cnt = 0;\n      app_resample_reset(sco_playback_resample);\n      app_resample_reset(sco_capture_resample);\n      voicebtpcm_pcm_echo_buf_queue_reset();\n      TRACE_AUD_STREAM_I(\"[SCO][SPK]: DMA buffer error: reset resample\");\n    }\n    app_playback_resample_run(sco_playback_resample, dec_buf, mono_len);\n  } else\n#endif\n  {\n#ifdef __BT_ANC__\n    bt_anc_sco_down_sample_16bits((int16_t *)dec_buf, (int16_t *)buf,\n                                  mono_len / 2);\n#else\n    if (sco_play_chan_num == AUD_CHANNEL_NUM_2) {\n      // Convert stereo data to mono data (to save into echo_buf)\n      app_bt_stream_copy_track_two_to_one_16bits((int16_t *)dec_buf,\n                                                 (int16_t *)buf, mono_len / 2);\n    }\n#endif\n    voicebtpcm_pcm_audio_more_data(dec_buf, mono_len);\n  }\n\n#ifdef __BT_ANC__\n  voicebtpcm_pcm_resample((int16_t *)dec_buf, mono_len / 2, (int16_t *)buf);\n#endif\n\n#if defined(SPEECH_RX_24BIT)\n  len <<= 1;\n#endif\n\n  if (sco_play_chan_num == AUD_CHANNEL_NUM_2) {\n    // Convert mono data to stereo data\n#if defined(SPEECH_RX_24BIT)\n    app_bt_stream_copy_track_one_to_two_24bits((int32_t *)buf, (int32_t *)buf,\n                                               len / 2 / sizeof(int32_t));\n#else\n    app_bt_stream_copy_track_one_to_two_16bits((int16_t *)buf, (int16_t *)buf,\n                                               len / 2 / sizeof(int16_t));\n#endif\n  }\n\n  if (spk_force_mute) {\n    memset(buf, 0, len);\n  }\n\n#if defined(BT_SCO_HANDLER_PROFILE)\n  uint32_t end_ticks = hal_fast_sys_timer_get();\n  TRACE_AUD_STREAM_I(\"[SCO][SPK] takes %d us\",\n                     FAST_TICKS_TO_US(end_ticks - start_ticks));\n#endif\n\n  return len;\n#endif\n}\n\nint bt_sco_player_forcemute(bool mic_mute, bool spk_mute) {\n  mic_force_mute = mic_mute;\n  spk_force_mute = spk_mute;\n  return 0;\n}\n\nint bt_sco_player_get_codetype(void) {\n  if (gStreamplayer & APP_BT_STREAM_HFP_PCM) {\n    return bt_sco_player_code_type;\n  } else {\n    return 0;\n  }\n}\n\n#if defined(AUDIO_ANC_FB_MC_SCO) && defined(ANC_APP) &&                        \\\n    !defined(__AUDIO_RESAMPLE__)\nstatic uint32_t audio_mc_data_playback_sco(uint8_t *buf,\n                                           uint32_t mc_len_bytes) {\n  // uint32_t begin_time;\n  // uint32_t end_time;\n  // begin_time = hal_sys_timer_get();\n  // TRACE_AUD_STREAM_I(\"phone cancel: %d\",begin_time);\n\n  float left_gain;\n  float right_gain;\n  int32_t playback_len_bytes, mc_len_bytes_8;\n  int32_t i, j, k;\n  int delay_sample;\n\n  mc_len_bytes_8 = mc_len_bytes / 8;\n\n  hal_codec_get_dac_gain(&left_gain, &right_gain);\n\n  TRACE_AUD_STREAM_I(\n      \"[SCO][SPK][MC] playback_samplerate_ratio:  %d,ch:%d,sample_size:%d.\",\n      playback_samplerate_ratio_bt, playback_ch_num_bt, sample_size_play_bt);\n  TRACE_AUD_STREAM_I(\"[SCO][SPK][MC] len:  %d\", mc_len_bytes);\n\n  // TRACE_AUD_STREAM_I(\"left_gain:  %d\",(int)(left_gain*(1<<12)));\n  // TRACE_AUD_STREAM_I(\"right_gain: %d\",(int)(right_gain*(1<<12)));\n\n  playback_len_bytes = mc_len_bytes / playback_samplerate_ratio_bt;\n\n  if (sample_size_play_bt == AUD_BITS_16) {\n    int16_t *sour_p = (int16_t *)(playback_buf_bt + playback_size_bt / 2);\n    int16_t *mid_p = (int16_t *)(buf);\n    int16_t *mid_p_8 = (int16_t *)(buf + mc_len_bytes - mc_len_bytes_8);\n    int16_t *dest_p = (int16_t *)buf;\n\n    if (buf == playback_buf_mc) {\n      sour_p = (int16_t *)playback_buf_bt;\n    }\n\n    if (playback_ch_num_bt == AUD_CHANNEL_NUM_2) {\n      delay_sample = DELAY_SAMPLE_MC;\n\n      for (i = 0, j = 0; i < delay_sample; i = i + 2) {\n        mid_p[j++] = delay_buf_bt[i];\n        mid_p[j++] = delay_buf_bt[i + 1];\n      }\n\n      for (i = 0; i < playback_len_bytes / 2 - delay_sample; i = i + 2) {\n        mid_p[j++] = sour_p[i];\n        mid_p[j++] = sour_p[i + 1];\n      }\n\n      for (j = 0; i < playback_len_bytes / 2; i = i + 2) {\n        delay_buf_bt[j++] = sour_p[i];\n        delay_buf_bt[j++] = sour_p[i + 1];\n      }\n\n      if (playback_samplerate_ratio_bt <= 8) {\n        for (i = 0, j = 0; i < playback_len_bytes / 2;\n             i = i + 2 * (8 / playback_samplerate_ratio_bt)) {\n          mid_p_8[j++] = mid_p[i];\n          mid_p_8[j++] = mid_p[i + 1];\n        }\n      } else {\n        for (i = 0, j = 0; i < playback_len_bytes / 2; i = i + 2) {\n          for (k = 0; k < playback_samplerate_ratio_bt / 8; k++) {\n            mid_p_8[j++] = mid_p[i];\n            mid_p_8[j++] = mid_p[i + 1];\n          }\n        }\n      }\n\n      anc_mc_run_stereo((uint8_t *)mid_p_8, mc_len_bytes_8, left_gain,\n                        right_gain, AUD_BITS_16);\n\n      for (i = 0, j = 0; i < (mc_len_bytes_8) / 2; i = i + 2) {\n        for (k = 0; k < 8; k++) {\n          dest_p[j++] = mid_p_8[i];\n          dest_p[j++] = mid_p_8[i + 1];\n        }\n      }\n\n    } else if (playback_ch_num_bt == AUD_CHANNEL_NUM_1) {\n      delay_sample = DELAY_SAMPLE_MC / 2;\n\n      for (i = 0, j = 0; i < delay_sample; i = i + 1) {\n        mid_p[j++] = delay_buf_bt[i];\n      }\n\n      for (i = 0; i < playback_len_bytes / 2 - delay_sample; i = i + 1) {\n        mid_p[j++] = sour_p[i];\n      }\n\n      for (j = 0; i < playback_len_bytes / 2; i = i + 1) {\n        delay_buf_bt[j++] = sour_p[i];\n      }\n\n      if (playback_samplerate_ratio_bt <= 8) {\n        for (i = 0, j = 0; i < playback_len_bytes / 2;\n             i = i + 1 * (8 / playback_samplerate_ratio_bt)) {\n          mid_p_8[j++] = mid_p[i];\n        }\n      } else {\n        for (i = 0, j = 0; i < playback_len_bytes / 2; i = i + 1) {\n          for (k = 0; k < playback_samplerate_ratio_bt / 8; k++) {\n            mid_p_8[j++] = mid_p[i];\n          }\n        }\n      }\n\n      anc_mc_run_mono((uint8_t *)mid_p_8, mc_len_bytes_8, left_gain,\n                      AUD_BITS_16);\n\n      for (i = 0, j = 0; i < (mc_len_bytes_8) / 2; i = i + 1) {\n        for (k = 0; k < 8; k++) {\n          dest_p[j++] = mid_p_8[i];\n        }\n      }\n    }\n\n  } else if (sample_size_play_bt == AUD_BITS_24) {\n    int32_t *sour_p = (int32_t *)(playback_buf_bt + playback_size_bt / 2);\n    int32_t *mid_p = (int32_t *)(buf);\n    int32_t *mid_p_8 = (int32_t *)(buf + mc_len_bytes - mc_len_bytes_8);\n    int32_t *dest_p = (int32_t *)buf;\n\n    if (buf == playback_buf_mc) {\n      sour_p = (int32_t *)playback_buf_bt;\n    }\n\n    if (playback_ch_num_bt == AUD_CHANNEL_NUM_2) {\n      delay_sample = DELAY_SAMPLE_MC;\n\n      for (i = 0, j = 0; i < delay_sample; i = i + 2) {\n        mid_p[j++] = delay_buf_bt[i];\n        mid_p[j++] = delay_buf_bt[i + 1];\n      }\n\n      for (i = 0; i < playback_len_bytes / 4 - delay_sample; i = i + 2) {\n        mid_p[j++] = sour_p[i];\n        mid_p[j++] = sour_p[i + 1];\n      }\n\n      for (j = 0; i < playback_len_bytes / 4; i = i + 2) {\n        delay_buf_bt[j++] = sour_p[i];\n        delay_buf_bt[j++] = sour_p[i + 1];\n      }\n\n      if (playback_samplerate_ratio_bt <= 8) {\n        for (i = 0, j = 0; i < playback_len_bytes / 4;\n             i = i + 2 * (8 / playback_samplerate_ratio_bt)) {\n          mid_p_8[j++] = mid_p[i];\n          mid_p_8[j++] = mid_p[i + 1];\n        }\n      } else {\n        for (i = 0, j = 0; i < playback_len_bytes / 4; i = i + 2) {\n          for (k = 0; k < playback_samplerate_ratio_bt / 8; k++) {\n            mid_p_8[j++] = mid_p[i];\n            mid_p_8[j++] = mid_p[i + 1];\n          }\n        }\n      }\n\n      anc_mc_run_stereo((uint8_t *)mid_p_8, mc_len_bytes_8, left_gain,\n                        right_gain, AUD_BITS_24);\n\n      for (i = 0, j = 0; i < (mc_len_bytes_8) / 4; i = i + 2) {\n        for (k = 0; k < 8; k++) {\n          dest_p[j++] = mid_p_8[i];\n          dest_p[j++] = mid_p_8[i + 1];\n        }\n      }\n\n    } else if (playback_ch_num_bt == AUD_CHANNEL_NUM_1) {\n      delay_sample = DELAY_SAMPLE_MC / 2;\n\n      for (i = 0, j = 0; i < delay_sample; i = i + 1) {\n        mid_p[j++] = delay_buf_bt[i];\n      }\n\n      for (i = 0; i < playback_len_bytes / 4 - delay_sample; i = i + 1) {\n        mid_p[j++] = sour_p[i];\n      }\n\n      for (j = 0; i < playback_len_bytes / 4; i = i + 1) {\n        delay_buf_bt[j++] = sour_p[i];\n      }\n\n      if (playback_samplerate_ratio_bt <= 8) {\n        for (i = 0, j = 0; i < playback_len_bytes / 4;\n             i = i + 1 * (8 / playback_samplerate_ratio_bt)) {\n          mid_p_8[j++] = mid_p[i];\n        }\n      } else {\n        for (i = 0, j = 0; i < playback_len_bytes / 4; i = i + 1) {\n          for (k = 0; k < playback_samplerate_ratio_bt / 8; k++) {\n            mid_p_8[j++] = mid_p[i];\n          }\n        }\n      }\n\n      anc_mc_run_mono((uint8_t *)mid_p_8, mc_len_bytes_8, left_gain,\n                      AUD_BITS_24);\n\n      for (i = 0, j = 0; i < (mc_len_bytes_8) / 4; i = i + 1) {\n        for (k = 0; k < 8; k++) {\n          dest_p[j++] = mid_p_8[i];\n        }\n      }\n    }\n  }\n\n  //  end_time = hal_sys_timer_get();\n\n  //   TRACE_AUD_STREAM_I(\"[SCO][SPK][MC]:run time: %d\", end_time-begin_time);\n\n  return 0;\n}\n#endif\n\n#if defined(LOW_DELAY_SCO)\nint speech_get_frame_size(int fs, int ch, int ms) {\n  return (fs / 1000 * ch * ms) / 2;\n}\n#else\nint speech_get_frame_size(int fs, int ch, int ms) {\n  return (fs / 1000 * ch * ms);\n}\n#endif\n\nint speech_get_af_buffer_size(int fs, int ch, int ms) {\n  return speech_get_frame_size(fs, ch, ms) * 2 * 2;\n}\n\nenum AUD_SAMPRATE_T speech_sco_get_sample_rate(void) {\n  enum AUD_SAMPRATE_T sample_rate;\n\n#if defined(HFP_1_6_ENABLE)\n  if (bt_sco_codec_is_msbc()) {\n    sample_rate = AUD_SAMPRATE_16000;\n  } else\n#endif\n  {\n    sample_rate = AUD_SAMPRATE_8000;\n  }\n\n  return sample_rate;\n}\n\nenum AUD_SAMPRATE_T speech_codec_get_sample_rate(void) {\n  enum AUD_SAMPRATE_T sample_rate;\n\n#if defined(MSBC_8K_SAMPLE_RATE)\n  sample_rate = AUD_SAMPRATE_8000;\n#else\n  if (bt_sco_codec_is_msbc()) {\n\n    sample_rate = AUD_SAMPRATE_16000;\n  } else {\n    sample_rate = AUD_SAMPRATE_8000;\n  }\n#endif\n\n  return sample_rate;\n}\n\nint app_bt_stream_volumeset(int8_t vol);\n\nenum AUD_SAMPRATE_T sco_sample_rate;\n\n#if defined(AF_ADC_I2S_SYNC)\nvoid bt_sco_bt_trigger_callback(void) {\n  TRACE_AUD_STREAM_I(\"[SCO][IIS] Start...\", __func__);\n\n  hal_i2s_enable(HAL_I2S_ID_0);\n}\n#endif\n\nextern void bt_drv_reg_op_pcm_set(uint8_t en);\nextern uint8_t bt_drv_reg_op_pcm_get();\nint bt_sco_player(bool on, enum APP_SYSFREQ_FREQ_T freq) {\n  struct AF_STREAM_CONFIG_T stream_cfg;\n  static bool isRun = false;\n  uint8_t *bt_audio_buff = NULL;\n  enum AUD_SAMPRATE_T sample_rate;\n\n  TRACE_AUD_STREAM_I(\"[SCO_PLAYER] work:%d op:%d freq:%d\", isRun, on, freq);\n\n#ifdef CHIP_BEST2000\n  btdrv_enable_one_packet_more_head(0);\n#endif\n\n  bt_set_playback_triggered(false);\n  if (isRun == on)\n    return 0;\n\n  if (on) {\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    audio_prompt_stop_playing();\n#endif\n\n#ifdef WL_DET\n    app_mic_alg_audioloop(false, APP_SYSFREQ_78M);\n#endif\n\n#if defined(IBRT)\n    app_ibrt_ui_rssi_reset();\n    app_ibrt_if_exec_sleep_hook_blocker_set(\n        APP_IBRT_IF_SLEEP_HOOK_BLOCKER_HFP_SCO);\n#endif\n#ifdef __IAG_BLE_INCLUDE__\n    app_ble_force_switch_adv(BLE_SWITCH_USER_SCO, false);\n#endif\n#ifdef TX_RX_PCM_MASK\n    if (btdrv_is_pcm_mask_enable() == 1 && bt_sco_codec_is_msbc()) {\n      bt_drv_reg_op_pcm_set(1);\n      TRACE_AUD_STREAM_I(\"[SCO_PLAYER] PCM MASK\");\n    }\n#endif\n\n#if defined(PCM_FAST_MODE)\n    btdrv_open_pcm_fast_mode_enable();\n#ifdef PCM_PRIVATE_DATA_FLAG\n    bt_drv_reg_op_set_pcm_flag();\n#endif\n#endif\n\n#ifdef __THIRDPARTY\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n                                             THIRDPARTY_STOP);\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO2,\n                                             THIRDPARTY_MIC_OPEN);\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO3,\n                                             THIRDPARTY_STOP);\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_KWS,\n                                             THIRDPARTY_CALL_START);\n#endif\n    // bt_syncerr set to max(0x0a)\n    //        BTDIGITAL_REG_SET_FIELD(REG_BTCORE_BASE_ADDR, 0x0f, 0, 0x0f);\n    //        af_set_priority(AF_USER_SCO, osPriorityRealtime);\n    af_set_priority(AF_USER_SCO, osPriorityHigh);\n    bt_media_volume_ptr_update_by_mediatype(BT_STREAM_VOICE);\n    stream_local_volume = btdevice_volume_p->hfp_vol;\n    app_audio_manager_sco_status_checker();\n\n#if defined(HFP_1_6_ENABLE)\n    bt_sco_player_code_type = app_audio_manager_get_scocodecid();\n#endif\n\n    if (freq < APP_SYSFREQ_104M) {\n      freq = APP_SYSFREQ_104M;\n    }\n\n#if defined(AUDIO_ANC_FB_MC_SCO) && defined(ANC_APP) &&                        \\\n    !defined(__AUDIO_RESAMPLE__)\n    if (freq < APP_SYSFREQ_208M) {\n      freq = APP_SYSFREQ_208M;\n    }\n#endif\n\n#if defined(SCO_CP_ACCEL)\n    freq = APP_SYSFREQ_52M;\n#endif\n\n    app_sysfreq_req(APP_SYSFREQ_USER_BT_SCO, freq);\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] sysfreq:%d\", freq);\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] sysfreq calc : %d\\n\",\n                       hal_sys_timer_calc_cpu_freq(5, 0));\n\n    app_overlay_select(APP_OVERLAY_HFP);\n#ifdef BT_XTAL_SYNC\n    bt_init_xtal_sync(BT_XTAL_SYNC_MODE_VOICE, BT_INIT_XTAL_SYNC_MIN,\n                      BT_INIT_XTAL_SYNC_MAX, BT_INIT_XTAL_SYNC_FCAP_RANGE);\n#endif\n    btdrv_rf_bit_offset_track_enable(true);\n\n#if !defined(SCO_DMA_SNAPSHOT)\n    int aec_frame_len = speech_get_frame_size(speech_codec_get_sample_rate(), 1,\n                                              SPEECH_SCO_FRAME_MS);\n    speech_tx_aec_set_frame_len(aec_frame_len);\n#endif\n\n    bt_sco_player_forcemute(false, false);\n\n    bt_sco_mode = 1;\n\n    app_audio_mempool_init();\n\n#ifndef _SCO_BTPCM_CHANNEL_\n    memset(&hf_sendbuff_ctrl, 0, sizeof(hf_sendbuff_ctrl));\n#endif\n\n    sample_rate = speech_codec_get_sample_rate();\n\n    sco_cap_chan_num = (enum AUD_CHANNEL_NUM_T)SPEECH_CODEC_CAPTURE_CHANNEL_NUM;\n\n\n#if defined(SPEECH_TX_AEC_CODEC_REF)\n    sco_cap_chan_num = (enum AUD_CHANNEL_NUM_T)(sco_cap_chan_num + 1);\n#endif\n\n#if defined(ANC_NOISE_TRACKER)\n    sco_cap_chan_num = (enum AUD_CHANNEL_NUM_T)(sco_cap_chan_num +\n                                                ANC_NOISE_TRACKER_CHANNEL_NUM);\n#endif\n\n#ifdef PLAYBACK_USE_I2S\n    hal_cmu_audio_resample_disable();\n#endif\n\n    memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n    // codec:mic\n    stream_cfg.channel_num = sco_cap_chan_num;\n    stream_cfg.data_size = speech_get_af_buffer_size(\n        sample_rate, sco_cap_chan_num, SPEECH_SCO_FRAME_MS);\n\n#if defined(__AUDIO_RESAMPLE__) && defined(NO_SCO_RESAMPLE)\n    // When __AUDIO_RESAMPLE__ is defined,\n    // resample is off by default on best1000, and on by default on other\n    // platforms\n#ifndef CHIP_BEST1000\n    hal_cmu_audio_resample_disable();\n#endif\n#endif\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n    if (sample_rate == AUD_SAMPRATE_8000) {\n      stream_cfg.sample_rate = AUD_SAMPRATE_8463;\n    } else if (sample_rate == AUD_SAMPRATE_16000) {\n      stream_cfg.sample_rate = AUD_SAMPRATE_16927;\n    }\n#ifdef RESAMPLE_ANY_SAMPLE_RATE\n    sco_capture_resample = app_capture_resample_any_open(\n        stream_cfg.channel_num, bt_sco_capture_resample_iter,\n        stream_cfg.data_size / 2, (float)CODEC_FREQ_26M / CODEC_FREQ_24P576M);\n#else\n    sco_capture_resample = app_capture_resample_open(\n        sample_rate, stream_cfg.channel_num, bt_sco_capture_resample_iter,\n        stream_cfg.data_size / 2);\n#endif\n    uint32_t mono_cap_samp_cnt =\n        stream_cfg.data_size / 2 / 2 / stream_cfg.channel_num;\n    uint32_t cap_irq_cnt_per_frm =\n        ((mono_cap_samp_cnt * stream_cfg.sample_rate + (sample_rate - 1)) /\n             sample_rate +\n         (aec_frame_len - 1)) /\n        aec_frame_len;\n    if (cap_irq_cnt_per_frm == 0) {\n      cap_irq_cnt_per_frm = 1;\n    }\n#else\n    stream_cfg.sample_rate = sample_rate;\n#endif\n\n#if defined(SPEECH_TX_24BIT)\n    stream_cfg.bits = AUD_BITS_24;\n    stream_cfg.data_size *= 2;\n#else\n    stream_cfg.bits = AUD_BITS_16;\n#endif\n    stream_cfg.vol = stream_local_volume;\n\n    stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n    stream_cfg.io_path = AUD_INPUT_PATH_MAINMIC;\n    stream_cfg.handler = bt_sco_codec_capture_data;\n    app_audio_mempool_get_buff(&bt_audio_buff, stream_cfg.data_size);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n\n#if defined(SCO_DMA_SNAPSHOT)\n    capture_buf_codecpcm = stream_cfg.data_ptr;\n    capture_size_codecpcm = stream_cfg.data_size;\n#endif\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] capture sample_rate:%d, data_size:%d\",\n                       stream_cfg.sample_rate, stream_cfg.data_size);\n\n#if defined(ANC_WNR_ENABLED)\n    if (app_anc_work_status()) {\n      anc_wnr_close();\n      anc_wnr_ctrl(stream_cfg.sample_rate,\n                   speech_get_frame_size(stream_cfg.sample_rate, 1,\n                                         SPEECH_SCO_FRAME_MS));\n      anc_release_gain();\n      anc_wnr_open(ANC_WNR_OPEN_MODE_CONFIGURE);\n    } else {\n      anc_wnr_ctrl(stream_cfg.sample_rate,\n                   speech_get_frame_size(stream_cfg.sample_rate, 1,\n                                         SPEECH_SCO_FRAME_MS));\n    }\n#endif\n\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n\n#if defined(HW_DC_FILTER_WITH_IIR)\n    hw_filter_codec_iir_st = hw_filter_codec_iir_create(\n        stream_cfg.sample_rate, stream_cfg.channel_num, stream_cfg.bits,\n        &adc_iir_cfg);\n#endif\n\n#if defined(CHIP_BEST2300)\n    btdrv_set_bt_pcm_triggler_delay(60);\n#elif defined(CHIP_BEST1400) || defined(CHIP_BEST1402) || defined(CHIP_BEST2001)\n\n#if defined(SCO_DMA_SNAPSHOT)\n    btdrv_set_bt_pcm_triggler_delay(2);\n#else\n    btdrv_set_bt_pcm_triggler_delay(60);\n#endif\n\n#elif defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n\n#if defined(SCO_DMA_SNAPSHOT)\n    btdrv_set_bt_pcm_triggler_delay(2);\n#else\n    btdrv_set_bt_pcm_triggler_delay(59);\n#endif\n\n#else\n    btdrv_set_bt_pcm_triggler_delay(55);\n#endif\n    // codec:spk\n    sample_rate = speech_codec_get_sample_rate();\n#if defined(CHIP_BEST1000)\n    sco_play_chan_num = AUD_CHANNEL_NUM_2;\n#else\n#ifdef PLAYBACK_USE_I2S\n    sco_play_chan_num = AUD_CHANNEL_NUM_2;\n#else\n    sco_play_chan_num = AUD_CHANNEL_NUM_1;\n#endif\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n#if defined(AF_ADC_I2S_SYNC)\n    codec_capture_cnt = 0;\n    codec_playback_cnt = 0;\n#endif\n    lis25ba_init();\n    tdm_stream_register(tdm_callback_func);\n#endif\n\n    stream_cfg.channel_num = sco_play_chan_num;\n    // stream_cfg.data_size = BT_AUDIO_SCO_BUFF_SIZE * stream_cfg.channel_num;\n    stream_cfg.data_size = speech_get_af_buffer_size(\n        sample_rate, sco_play_chan_num, SPEECH_SCO_FRAME_MS);\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n    if (sample_rate == AUD_SAMPRATE_8000) {\n      stream_cfg.sample_rate = AUD_SAMPRATE_8463;\n    } else if (sample_rate == AUD_SAMPRATE_16000) {\n      stream_cfg.sample_rate = AUD_SAMPRATE_16927;\n    }\n#ifdef RESAMPLE_ANY_SAMPLE_RATE\n    sco_playback_resample = app_playback_resample_any_open(\n        AUD_CHANNEL_NUM_1, bt_sco_playback_resample_iter,\n        stream_cfg.data_size / stream_cfg.channel_num / 2,\n        (float)CODEC_FREQ_24P576M / CODEC_FREQ_26M);\n#else\n    sco_playback_resample = app_playback_resample_open(\n        sample_rate, AUD_CHANNEL_NUM_1, bt_sco_playback_resample_iter,\n        stream_cfg.data_size / stream_cfg.channel_num / 2);\n#endif\n    sco_play_irq_cnt = 0;\n    sco_dma_buf_err = false;\n\n    uint32_t mono_play_samp_cnt =\n        stream_cfg.data_size / 2 / 2 / stream_cfg.channel_num;\n    uint32_t play_irq_cnt_per_frm =\n        ((mono_play_samp_cnt * stream_cfg.sample_rate + (sample_rate - 1)) /\n             sample_rate +\n         (aec_frame_len - 1)) /\n        aec_frame_len;\n    if (play_irq_cnt_per_frm == 0) {\n      play_irq_cnt_per_frm = 1;\n    }\n    uint32_t play_samp_cnt_per_frm = mono_play_samp_cnt * play_irq_cnt_per_frm;\n    uint32_t cap_samp_cnt_per_frm = mono_cap_samp_cnt * cap_irq_cnt_per_frm;\n    uint32_t max_samp_cnt_per_frm =\n        (play_samp_cnt_per_frm >= cap_samp_cnt_per_frm) ? play_samp_cnt_per_frm\n                                                        : cap_samp_cnt_per_frm;\n    uint32_t echo_q_samp_cnt =\n        (((max_samp_cnt_per_frm +\n           mono_play_samp_cnt * SCO_PLAY_RESAMPLE_ALIGN_CNT) *\n              // convert to 8K/16K sample cnt\n              sample_rate +\n          (stream_cfg.sample_rate - 1)) /\n             stream_cfg.sample_rate +\n         // aligned with aec_frame_len\n         (aec_frame_len - 1)) /\n        aec_frame_len * aec_frame_len;\n    if (echo_q_samp_cnt == 0) {\n      echo_q_samp_cnt = aec_frame_len;\n    }\n    voicebtpcm_pcm_echo_buf_queue_init(echo_q_samp_cnt * 2);\n#else\n    stream_cfg.sample_rate = sample_rate;\n#endif\n\n#ifdef __BT_ANC__\n    // Mono channel decoder buffer (8K or 16K sample rate)\n    app_audio_mempool_get_buff(&bt_anc_sco_dec_buf,\n                               stream_cfg.data_size / 2 / sco_play_chan_num);\n    // The playback size for the actual sample rate\n    bt_sco_samplerate_ratio = 6 / (sample_rate / AUD_SAMPRATE_8000);\n    stream_cfg.data_size *= bt_sco_samplerate_ratio;\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n    stream_cfg.sample_rate = AUD_SAMPRATE_50781;\n#else\n    stream_cfg.sample_rate = AUD_SAMPRATE_48000;\n#endif\n    // damic_init();\n    // init_amic_dc_bt();\n    // ds_fir_init();\n    us_fir_init();\n#endif\n    stream_cfg.bits = AUD_BITS_16;\n#ifdef PLAYBACK_USE_I2S\n    stream_cfg.device = AUD_STREAM_USE_I2S0_MASTER;\n    stream_cfg.io_path = AUD_IO_PATH_NULL;\n#else\n    stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n#endif\n    stream_cfg.handler = bt_sco_codec_playback_data;\n\n#if defined(SPEECH_RX_24BIT)\n    stream_cfg.bits = AUD_BITS_24;\n    stream_cfg.data_size *= 2;\n#endif\n\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    uint8_t *promptTmpSourcePcmDataBuf;\n    uint8_t *promptTmpTargetPcmDataBuf;\n    uint8_t *promptPcmDataBuf;\n    uint8_t *promptResamplerBuf;\n\n    sco_sample_rate = stream_cfg.sample_rate;\n    app_audio_mempool_get_buff(&promptTmpSourcePcmDataBuf,\n                               AUDIO_PROMPT_SOURCE_PCM_BUFFER_SIZE);\n    app_audio_mempool_get_buff(&promptTmpTargetPcmDataBuf,\n                               AUDIO_PROMPT_TARGET_PCM_BUFFER_SIZE);\n    app_audio_mempool_get_buff(&promptPcmDataBuf, AUDIO_PROMPT_PCM_BUFFER_SIZE);\n    app_audio_mempool_get_buff(&promptResamplerBuf,\n                               AUDIO_PROMPT_BUF_SIZE_FOR_RESAMPLER);\n\n    audio_prompt_buffer_config(MIX_WITH_SCO_STREAMING, stream_cfg.channel_num,\n                               stream_cfg.bits, promptTmpSourcePcmDataBuf,\n                               promptTmpTargetPcmDataBuf, promptPcmDataBuf,\n                               AUDIO_PROMPT_PCM_BUFFER_SIZE, promptResamplerBuf,\n                               AUDIO_PROMPT_BUF_SIZE_FOR_RESAMPLER);\n#endif\n\n    app_audio_mempool_get_buff(&bt_audio_buff, stream_cfg.data_size);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] playback sample_rate:%d, data_size:%d\",\n                       stream_cfg.sample_rate, stream_cfg.data_size);\n\n#if defined(AUDIO_ANC_FB_MC_SCO) && defined(ANC_APP) &&                        \\\n    !defined(__AUDIO_RESAMPLE__)\n    sample_size_play_bt = stream_cfg.bits;\n    sample_rate_play_bt = stream_cfg.sample_rate;\n    data_size_play_bt = stream_cfg.data_size;\n    playback_buf_bt = stream_cfg.data_ptr;\n    playback_size_bt = stream_cfg.data_size;\n\n#ifdef __BT_ANC__\n    playback_samplerate_ratio_bt = 8;\n#else\n    if (sample_rate_play_bt == AUD_SAMPRATE_8000) {\n      playback_samplerate_ratio_bt = 8 * 3 * 2;\n    } else if (sample_rate_play_bt == AUD_SAMPRATE_16000) {\n      playback_samplerate_ratio_bt = 8 * 3;\n    }\n#endif\n\n    playback_ch_num_bt = stream_cfg.channel_num;\n#endif\n\n#if defined(SCO_DMA_SNAPSHOT)\n    playback_buf_codecpcm = stream_cfg.data_ptr;\n    playback_size_codecpcm = stream_cfg.data_size;\n    playback_samplerate_codecpcm = stream_cfg.sample_rate;\n#endif\n\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n\n    af_stream_dma_tc_irq_enable(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n    af_codec_set_playback_post_handler(bt_sco_codec_playback_data_post_handler);\n\n#if defined(AUDIO_ANC_FB_MC_SCO) && defined(ANC_APP) &&                        \\\n    !defined(__AUDIO_RESAMPLE__)\n    stream_cfg.bits = sample_size_play_bt;\n    stream_cfg.channel_num = playback_ch_num_bt;\n    stream_cfg.sample_rate = sample_rate_play_bt;\n    stream_cfg.device = AUD_STREAM_USE_MC;\n    stream_cfg.vol = 0;\n    stream_cfg.handler = audio_mc_data_playback_sco;\n    stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n\n    app_audio_mempool_get_buff(\n        &bt_audio_buff, data_size_play_bt * playback_samplerate_ratio_bt);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n    stream_cfg.data_size = data_size_play_bt * playback_samplerate_ratio_bt;\n\n    playback_buf_mc = stream_cfg.data_ptr;\n    playback_size_mc = stream_cfg.data_size;\n\n    anc_mc_run_init(hal_codec_anc_convert_rate(sample_rate_play_bt));\n\n    memset(delay_buf_bt, 0, sizeof(delay_buf_bt));\n\n    af_stream_open(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK, &stream_cfg);\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n    tdm_stream_open();\n\n#if defined(AF_ADC_I2S_SYNC)\n    af_codec_bt_trigger_config(true, bt_sco_bt_trigger_callback);\n#endif\n#endif\n\n#if defined(ANC_NOISE_TRACKER)\n    app_audio_mempool_get_buff(\n        (uint8_t **)&anc_buf,\n        speech_get_frame_size(speech_codec_get_sample_rate(),\n                              ANC_NOISE_TRACKER_CHANNEL_NUM,\n                              SPEECH_SCO_FRAME_MS) *\n            sizeof(int16_t));\n    noise_tracker_init(nt_demo_words_cb, ANC_NOISE_TRACKER_CHANNEL_NUM, -20);\n#endif\n\n    // Must call this function before af_stream_start\n    // Get all free app audio buffer except SCO_BTPCM used(2k)\n    voicebtpcm_pcm_audio_init(speech_sco_get_sample_rate(),\n                              speech_codec_get_sample_rate());\n\n    /*\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] start codec %d\",\nFAST_TICKS_TO_US(hal_fast_sys_timer_get())); #if defined(AUDIO_ANC_FB_MC) &&\ndefined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    af_stream_start(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    */\n\n#ifdef SPEECH_SIDETONE\n    hal_codec_sidetone_enable();\n#endif\n\n#ifdef _SCO_BTPCM_CHANNEL_\n    stream_cfg.bits = AUD_BITS_16;\n    stream_cfg.sample_rate = speech_sco_get_sample_rate();\n    stream_cfg.channel_num = AUD_CHANNEL_NUM_1;\n    // stream_cfg.data_size = BT_AUDIO_SCO_BUFF_SIZE * stream_cfg.channel_num;\n\n    if (bt_sco_codec_is_msbc()) {\n      stream_cfg.data_size = speech_get_af_buffer_size(stream_cfg.sample_rate,\n                                                       stream_cfg.channel_num,\n                                                       SPEECH_SCO_FRAME_MS) /\n                             2;\n    } else {\n      stream_cfg.data_size = speech_get_af_buffer_size(\n          stream_cfg.sample_rate, stream_cfg.channel_num, SPEECH_SCO_FRAME_MS);\n    }\n\n    // btpcm:rx\n    stream_cfg.device = AUD_STREAM_USE_BT_PCM;\n    stream_cfg.handler = bt_sco_btpcm_capture_data;\n    app_audio_mempool_get_buff(&bt_audio_buff, stream_cfg.data_size);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] sco btpcm sample_rate:%d, data_size:%d\",\n                       stream_cfg.sample_rate, stream_cfg.data_size);\n\n#if defined(SCO_DMA_SNAPSHOT)\n    sco_btpcm_mute_flag = 0;\n    sco_disconnect_mute_flag = 0;\n\n    capture_buf_btpcm = stream_cfg.data_ptr;\n    capture_size_btpcm = stream_cfg.data_size;\n#ifdef TX_RX_PCM_MASK\n    capture_size_btpcm_copy =\n        stream_cfg.data_size / 4; // only need ping or pang;\n    app_audio_mempool_get_buff(&capture_buf_btpcm_copy,\n                               capture_size_btpcm_copy);\n#endif\n#endif\n    af_stream_open(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE, &stream_cfg);\n\n    // btpcm:tx\n    stream_cfg.device = AUD_STREAM_USE_BT_PCM;\n    stream_cfg.handler = bt_sco_btpcm_playback_data;\n    app_audio_mempool_get_buff(&bt_audio_buff, stream_cfg.data_size);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n\n#if defined(SCO_DMA_SNAPSHOT)\n    playback_buf_btpcm = stream_cfg.data_ptr;\n    playback_size_btpcm = stream_cfg.data_size;\n#ifdef TX_RX_PCM_MASK\n    playback_size_btpcm_copy =\n        stream_cfg.data_size / 4; // only need ping or pang;\n    app_audio_mempool_get_buff(&playback_buf_btpcm_copy,\n                               playback_size_btpcm_copy);\n#endif\n    // only need ping or pang;\n    app_audio_mempool_get_buff(&playback_buf_btpcm_cache,\n                               stream_cfg.data_size / 2);\n#endif\n\n    af_stream_open(AUD_STREAM_ID_1, AUD_STREAM_PLAYBACK, &stream_cfg);\n\n#if !(defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE))\n    af_codec_tune(AUD_STREAM_NUM, 0);\n#endif\n\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] start btpcm %d\",\n                       FAST_TICKS_TO_US(hal_fast_sys_timer_get()));\n    af_stream_start(AUD_STREAM_ID_1, AUD_STREAM_PLAYBACK);\n    af_stream_start(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE);\n#if defined(SCO_DMA_SNAPSHOT)\n    af_stream_dma_tc_irq_enable(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE);\n\n#ifdef PLAYBACK_USE_I2S\n    af_i2s_sync_config(AUD_STREAM_PLAYBACK, AF_I2S_SYNC_TYPE_BT, true);\n#else\n    af_codec_sync_config(AUD_STREAM_PLAYBACK, AF_CODEC_SYNC_TYPE_BT, true);\n#endif\n    af_codec_sync_config(AUD_STREAM_CAPTURE, AF_CODEC_SYNC_TYPE_BT, true);\n\n    btdrv_disable_playback_triggler();\n    app_bt_stream_sco_trigger_btpcm_start();\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n#endif\n\n    is_codec_stream_started = false;\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                       \\\n    defined(CHIP_BEST2300A) || defined(CHIP_BEST1400) ||                       \\\n    defined(CHIP_BEST1402) || defined(CHIP_BEST2001)\n#if defined(CVSD_BYPASS)\n    btdrv_cvsd_bypass_enable(bt_sco_codec_is_msbc());\n#endif\n#if !defined(SCO_DMA_SNAPSHOT)\n    btdrv_pcm_enable();\n#endif\n#endif\n\n#endif\n\n    app_bt_stream_trigger_checker_start();\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] on\");\n  } else {\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    bool isToClearActiveMedia =\n        audio_prompt_clear_pending_stream(PENDING_TO_STOP_SCO_STREAMING);\n    if (isToClearActiveMedia) {\n      bt_media_clear_media_type(BT_STREAM_VOICE, BT_DEVICE_ID_1);\n    }\n#endif\n    app_bt_stream_trigger_checker_stop();\n#if defined(SCO_DMA_SNAPSHOT)\n#ifdef TX_RX_PCM_MASK\n    playback_buf_btpcm_copy = NULL;\n    capture_buf_btpcm_copy = NULL;\n    playback_size_btpcm_copy = 0;\n    capture_size_btpcm_copy = 0;\n#endif\n#endif\n\n#ifdef __THIRDPARTY\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO2,\n                                             THIRDPARTY_MIC_CLOSE);\n#endif\n#if defined(SCO_DMA_SNAPSHOT)\n    app_bt_stream_sco_trigger_codecpcm_stop();\n#endif\n    af_stream_dma_tc_irq_disable(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n    af_codec_set_playback_post_handler(NULL);\n\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n#if defined(AUDIO_ANC_FB_MC_SCO) && defined(ANC_APP) &&                        \\\n    !defined(__AUDIO_RESAMPLE__)\n    af_stream_stop(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n    is_codec_stream_started = false;\n\n#if defined(BONE_SENSOR_TDM)\n    tdm_stream_stop();\n#endif\n\n#if !(defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE))\n    af_codec_tune(AUD_STREAM_NUM, 0);\n#endif\n\n#ifdef _SCO_BTPCM_CHANNEL_\n    af_stream_stop(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE);\n    af_stream_stop(AUD_STREAM_ID_1, AUD_STREAM_PLAYBACK);\n\n    af_stream_close(AUD_STREAM_ID_1, AUD_STREAM_CAPTURE);\n    af_stream_close(AUD_STREAM_ID_1, AUD_STREAM_PLAYBACK);\n#endif\n#ifdef TX_RX_PCM_MASK\n    if (btdrv_is_pcm_mask_enable() == 1 && bt_drv_reg_op_pcm_get()) {\n      bt_drv_reg_op_pcm_set(0);\n      TRACE_AUD_STREAM_I(\"[SCO_PLAYER] PCM UNMASK\");\n    }\n#endif\n#if defined(PCM_FAST_MODE)\n    btdrv_open_pcm_fast_mode_disable();\n#endif\n\n#if defined(HW_DC_FILTER_WITH_IIR)\n    hw_filter_codec_iir_destroy(hw_filter_codec_iir_st);\n#endif\n\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n#if defined(AUDIO_ANC_FB_MC_SCO) && defined(ANC_APP) &&                        \\\n    !defined(__AUDIO_RESAMPLE__)\n    af_stream_close(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n\n#if defined(BONE_SENSOR_TDM)\n    tdm_stream_close();\n#endif\n\n#ifdef SPEECH_SIDETONE\n    hal_codec_sidetone_disable();\n#endif\n\n#if defined(__AUDIO_RESAMPLE__) && defined(SW_SCO_RESAMPLE)\n    app_capture_resample_close(sco_capture_resample);\n    sco_capture_resample = NULL;\n    app_capture_resample_close(sco_playback_resample);\n    sco_playback_resample = NULL;\n#endif\n\n#if defined(__AUDIO_RESAMPLE__) && defined(NO_SCO_RESAMPLE)\n#ifndef CHIP_BEST1000\n    // When __AUDIO_RESAMPLE__ is defined,\n    // resample is off by default on best1000, and on by default on other\n    // platforms\n    hal_cmu_audio_resample_enable();\n#endif\n#endif\n\n#ifdef PLAYBACK_USE_I2S\n    hal_cmu_audio_resample_enable();\n#endif\n\n    bt_sco_mode = 0;\n\n#ifdef __BT_ANC__\n    bt_anc_sco_dec_buf = NULL;\n    // damic_deinit();\n    // app_cap_thread_stop();\n#endif\n    voicebtpcm_pcm_audio_deinit();\n\n#if defined(BONE_SENSOR_TDM)\n    lis25ba_deinit();\n#endif\n\n#ifdef BT_XTAL_SYNC\n    bt_term_xtal_sync(false);\n#ifndef BT_XTAL_SYNC_NO_RESET\n    bt_term_xtal_sync_default();\n#endif\n#endif\n#if defined(HFP_1_6_ENABLE)\n    TRACE(1, \"clear sco tx fifo codec:%d\", bt_sco_player_code_type);\n    bt_drv_reg_op_sco_txfifo_reset(bt_sco_player_code_type);\n    bt_sco_player_code_type = BTIF_HF_SCO_CODEC_NONE;\n#else\n    bt_drv_reg_op_sco_txfifo_reset(1);\n#endif\n\n#if defined(ANC_WNR_ENABLED)\n    if (app_anc_work_status()) {\n      anc_wnr_close();\n      anc_release_gain();\n      anc_wnr_open(ANC_WNR_OPEN_MODE_STANDALONE);\n    }\n#endif\n\n#ifdef __IAG_BLE_INCLUDE__\n    app_ble_force_switch_adv(BLE_SWITCH_USER_SCO, true);\n#endif\n\n    TRACE_AUD_STREAM_I(\"[SCO_PLAYER] off\");\n    app_overlay_unloadall();\n    app_sysfreq_req(APP_SYSFREQ_USER_BT_SCO, APP_SYSFREQ_32K);\n    af_set_priority(AF_USER_SCO, osPriorityAboveNormal);\n\n    // bt_syncerr set to default(0x07)\n//       BTDIGITAL_REG_SET_FIELD(REG_BTCORE_BASE_ADDR, 0x0f, 0, 0x07);\n#ifdef __THIRDPARTY\n    // app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,THIRDPARTY_START);\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO3,\n                                             THIRDPARTY_START);\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_KWS,\n                                             THIRDPARTY_CALL_STOP);\n#endif\n#if defined(IBRT)\n    app_ibrt_if_exec_sleep_hook_blocker_clr(\n        APP_IBRT_IF_SLEEP_HOOK_BLOCKER_HFP_SCO);\n    app_ibrt_ui_rssi_reset();\n#endif\n\n#ifdef WL_DET\n    app_mic_alg_audioloop(true, APP_SYSFREQ_78M);\n#endif\n  }\n\n  isRun = on;\n  return 0;\n}\n\n#ifdef AUDIO_LINEIN\n#include \"app_status_ind.h\"\n// player channel should <= capture channel number\n// player must be 2 channel\n#define LINEIN_PLAYER_CHANNEL (2)\n#ifdef __AUDIO_OUTPUT_MONO_MODE__\n#define LINEIN_CAPTURE_CHANNEL (1)\n#else\n#define LINEIN_CAPTURE_CHANNEL (2)\n#endif\n\n#if (LINEIN_CAPTURE_CHANNEL == 1)\n#define LINEIN_PLAYER_BUFFER_SIZE (1024 * LINEIN_PLAYER_CHANNEL)\n#define LINEIN_CAPTURE_BUFFER_SIZE (LINEIN_PLAYER_BUFFER_SIZE / 2)\n#elif (LINEIN_CAPTURE_CHANNEL == 2)\n#define LINEIN_PLAYER_BUFFER_SIZE (1024 * LINEIN_PLAYER_CHANNEL)\n#define LINEIN_CAPTURE_BUFFER_SIZE (LINEIN_PLAYER_BUFFER_SIZE)\n#endif\n\nint8_t app_linein_buffer_is_empty(void) {\n  if (app_audio_pcmbuff_length()) {\n    return 0;\n  } else {\n    return 1;\n  }\n}\n\nuint32_t app_linein_pcm_come(uint8_t *pcm_buf, uint32_t len) {\n  app_audio_pcmbuff_put(pcm_buf, len);\n\n  return len;\n}\n\nuint32_t app_linein_need_pcm_data(uint8_t *pcm_buf, uint32_t len) {\n#if (LINEIN_CAPTURE_CHANNEL == 1)\n  app_audio_pcmbuff_get((uint8_t *)app_linein_play_cache, len / 2);\n  app_play_audio_lineinmode_more_data((uint8_t *)app_linein_play_cache,\n                                      len / 2);\n  app_bt_stream_copy_track_one_to_two_16bits(\n      (int16_t *)pcm_buf, app_linein_play_cache, len / 2 / 2);\n#elif (LINEIN_CAPTURE_CHANNEL == 2)\n  app_audio_pcmbuff_get((uint8_t *)pcm_buf, len);\n  app_play_audio_lineinmode_more_data((uint8_t *)pcm_buf, len);\n#endif\n\n#if defined(__AUDIO_OUTPUT_MONO_MODE__)\n  merge_stereo_to_mono_16bits((int16_t *)buf, (int16_t *)pcm_buf, len / 2);\n#endif\n\n#ifdef ANC_APP\n  bt_audio_updata_eq_for_anc(app_anc_work_status());\n#else\n  bt_audio_updata_eq(app_audio_get_eq());\n#endif\n\n  audio_process_run(pcm_buf, len);\n\n  return len;\n}\n\nint app_play_linein_onoff(bool onoff) {\n  static bool isRun = false;\n  uint8_t *linein_audio_cap_buff = 0;\n  uint8_t *linein_audio_play_buff = 0;\n  uint8_t *linein_audio_loop_buf = NULL;\n  struct AF_STREAM_CONFIG_T stream_cfg;\n\n  uint8_t POSSIBLY_UNUSED *bt_eq_buff = NULL;\n  uint32_t POSSIBLY_UNUSED eq_buff_size;\n  uint8_t POSSIBLY_UNUSED play_samp_size;\n\n  TRACE_AUD_STREAM_I(\"[LINEIN_PLAYER] work:%d op:%d\", isRun, onoff);\n\n  if (isRun == onoff)\n    return 0;\n\n  if (onoff) {\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_104M);\n    app_overlay_select(APP_OVERLAY_A2DP);\n    app_audio_mempool_init();\n    app_audio_mempool_get_buff(&linein_audio_cap_buff,\n                               LINEIN_CAPTURE_BUFFER_SIZE);\n    app_audio_mempool_get_buff(&linein_audio_play_buff,\n                               LINEIN_PLAYER_BUFFER_SIZE);\n    app_audio_mempool_get_buff(&linein_audio_loop_buf,\n                               LINEIN_PLAYER_BUFFER_SIZE << 2);\n    app_audio_pcmbuff_init(linein_audio_loop_buf,\n                           LINEIN_PLAYER_BUFFER_SIZE << 2);\n\n#if (LINEIN_CAPTURE_CHANNEL == 1)\n    app_audio_mempool_get_buff((uint8_t **)&app_linein_play_cache,\n                               LINEIN_PLAYER_BUFFER_SIZE / 2 / 2);\n    app_play_audio_lineinmode_init(LINEIN_CAPTURE_CHANNEL,\n                                   LINEIN_PLAYER_BUFFER_SIZE / 2 / 2);\n#elif (LINEIN_CAPTURE_CHANNEL == 2)\n    app_play_audio_lineinmode_init(LINEIN_CAPTURE_CHANNEL,\n                                   LINEIN_PLAYER_BUFFER_SIZE / 2);\n#endif\n\n    memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n    stream_cfg.bits = AUD_BITS_16;\n    stream_cfg.channel_num = (enum AUD_CHANNEL_NUM_T)LINEIN_PLAYER_CHANNEL;\n#if defined(__AUDIO_RESAMPLE__)\n    stream_cfg.sample_rate = AUD_SAMPRATE_50781;\n#else\n    stream_cfg.sample_rate = AUD_SAMPRATE_44100;\n#endif\n    stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n    stream_cfg.vol = stream_linein_volume;\n    TRACE_AUD_STREAM_I(\"[LINEIN_PLAYER] vol = %d\", stream_linein_volume);\n    stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n    stream_cfg.handler = app_linein_need_pcm_data;\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(linein_audio_play_buff);\n    stream_cfg.data_size = LINEIN_PLAYER_BUFFER_SIZE;\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    sample_size_play_bt = stream_cfg.bits;\n    sample_rate_play_bt = stream_cfg.sample_rate;\n    data_size_play_bt = stream_cfg.data_size;\n    playback_buf_bt = stream_cfg.data_ptr;\n    playback_size_bt = stream_cfg.data_size;\n    if (sample_rate_play_bt == AUD_SAMPRATE_96000) {\n      playback_samplerate_ratio_bt = 4;\n    } else {\n      playback_samplerate_ratio_bt = 8;\n    }\n    playback_ch_num_bt = stream_cfg.channel_num;\n    mid_p_8_old_l = 0;\n    mid_p_8_old_r = 0;\n#endif\n\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n\n#if defined(__HW_FIR_EQ_PROCESS__) && defined(__HW_IIR_EQ_PROCESS__)\n    eq_buff_size = stream_cfg.data_size * 2;\n#elif defined(__HW_FIR_EQ_PROCESS__) && !defined(__HW_IIR_EQ_PROCESS__)\n\n    play_samp_size = (stream_cfg.bits <= AUD_BITS_16) ? 2 : 4;\n#if defined(CHIP_BEST2000)\n    eq_buff_size = stream_cfg.data_size * sizeof(int32_t) / play_samp_size;\n#elif defined(CHIP_BEST1000)\n    eq_buff_size = stream_cfg.data_size * sizeof(int16_t) / play_samp_size;\n#elif defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) ||                     \\\n    defined(CHIP_BEST2300A)\n    eq_buff_size = stream_cfg.data_size;\n#endif\n\n#elif !defined(__HW_FIR_EQ_PROCESS__) && defined(__HW_IIR_EQ_PROCESS__)\n    eq_buff_size = stream_cfg.data_size;\n#else\n    eq_buff_size = 0;\n    bt_eq_buff = NULL;\n#endif\n\n    if (eq_buff_size > 0) {\n      app_audio_mempool_get_buff(&bt_eq_buff, eq_buff_size);\n    }\n\n#if defined(IBRT)\n    enum AUD_CHANNEL_NUM_T sw_ch_num = AUD_CHANNEL_NUM_1;\n#else\n    enum AUD_CHANNEL_NUM_T sw_ch_num = stream_cfg.channel_num;\n#endif\n\n    audio_process_open(stream_cfg.sample_rate, stream_cfg.bits, sw_ch_num,\n                       stream_cfg.channel_num,\n                       stream_cfg.data_size / stream_cfg.channel_num /\n                           (stream_cfg.bits <= AUD_BITS_16 ? 2 : 4) / 2,\n                       bt_eq_buff, eq_buff_size);\n\n#ifdef __SW_IIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_SW_IIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_SW_IIR, 0));\n#endif\n\n#ifdef __HW_FIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_HW_FIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_FIR, 0));\n#endif\n\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_HW_DAC_IIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_DAC_IIR, 0));\n#endif\n\n#ifdef __HW_IIR_EQ_PROCESS__\n    bt_audio_set_eq(AUDIO_EQ_TYPE_HW_IIR,\n                    bt_audio_get_eq_index(AUDIO_EQ_TYPE_HW_IIR, 0));\n#endif\n\n#ifdef ANC_APP\n    anc_status_record = 0xff;\n#endif\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    uint8_t *bt_audio_buff = NULL;\n    stream_cfg.bits = sample_size_play_bt;\n    stream_cfg.channel_num = playback_ch_num_bt;\n    stream_cfg.sample_rate = sample_rate_play_bt;\n    stream_cfg.device = AUD_STREAM_USE_MC;\n    stream_cfg.vol = 0;\n    stream_cfg.handler = audio_mc_data_playback_a2dp;\n    stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n\n    app_audio_mempool_get_buff(\n        &bt_audio_buff, data_size_play_bt * playback_samplerate_ratio_bt);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n    stream_cfg.data_size = data_size_play_bt * playback_samplerate_ratio_bt;\n\n    playback_buf_mc = stream_cfg.data_ptr;\n    playback_size_mc = stream_cfg.data_size;\n\n    anc_mc_run_init(hal_codec_anc_convert_rate(sample_rate_play_bt));\n\n    memset(delay_buf_bt, 0, sizeof(delay_buf_bt));\n\n    af_stream_open(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK, &stream_cfg);\n    // ASSERT(ret == 0, \"af_stream_open playback failed: %d\", ret);\n#endif\n\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n#if defined(AUDIO_ANC_FB_MC) && defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n    af_stream_start(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n\n    memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n    stream_cfg.bits = AUD_BITS_16;\n#if defined(__AUDIO_RESAMPLE__)\n    stream_cfg.sample_rate = AUD_SAMPRATE_50781;\n#else\n    stream_cfg.sample_rate = AUD_SAMPRATE_44100;\n#endif\n    stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n    stream_cfg.io_path = AUD_INPUT_PATH_LINEIN;\n    stream_cfg.channel_num = (enum AUD_CHANNEL_NUM_T)LINEIN_CAPTURE_CHANNEL;\n    stream_cfg.channel_map =\n        (enum AUD_CHANNEL_MAP_T)hal_codec_get_input_path_cfg(\n            stream_cfg.io_path);\n    stream_cfg.handler = app_linein_pcm_come;\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(linein_audio_cap_buff);\n    stream_cfg.data_size = LINEIN_CAPTURE_BUFFER_SIZE;\n\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n  } else {\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n    audio_process_close();\n\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n    app_overlay_unloadall();\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n  }\n\n  isRun = onoff;\n  TRACE_AUD_STREAM_I(\"[LINEIN_PLAYER] end!\\n\");\n  return 0;\n}\n#endif\n\nint app_bt_stream_open(APP_AUDIO_STATUS *status) {\n  int nRet = -1;\n  uint16_t player = status->id;\n  APP_AUDIO_STATUS next_status;\n  enum APP_SYSFREQ_FREQ_T freq = (enum APP_SYSFREQ_FREQ_T)status->freq;\n\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][OPEN] prev:0x%x%s freq:%d\", gStreamplayer,\n                     player2str(gStreamplayer), freq);\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][OPEN] cur:0x%x%s freq:%d\", player,\n                     player2str(player), freq);\n\n  APP_AUDIO_STATUS streamToClose;\n\n  if (gStreamplayer != APP_BT_STREAM_INVALID) {\n#if !ISOLATED_AUDIO_STREAM_ENABLED\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][OPEN] close 0x%x%s prev opening\",\n                       gStreamplayer, player2str(gStreamplayer));\n    nRet = app_bt_stream_close(gStreamplayer);\n    if (nRet) {\n      return -1;\n    } else {\n      streamToClose.id = gStreamplayer;\n      app_audio_list_rmv_callback(&streamToClose, &next_status,\n                                  APP_BT_SETTING_Q_POS_TAIL, false);\n    }\n#else\n    if (gStreamplayer & player) {\n      TRACE_AUD_STREAM_I(\"[STRM_PLAYER][OPEN] 0x%x%s has opened\", player,\n                         player2str(player));\n      return -1;\n    }\n\n    if (player >= APP_BT_STREAM_BORDER_INDEX) {\n      if (APP_BT_INPUT_STREAM_INDEX(gStreamplayer) > 0) {\n        TRACE_AUD_STREAM_I(\"[STRM_PLAYER][OPEN] close 0x%x%s prev opening\",\n                           gStreamplayer, player2str(gStreamplayer));\n      }\n    } else {\n      if (APP_BT_OUTPUT_STREAM_INDEX(gStreamplayer) > 0) {\n        TRACE_AUD_STREAM_I(\"[STRM_PLAYER][OPEN] close 0x%x%s prev opening\",\n                           gStreamplayer, player2str(gStreamplayer));\n        uint16_t player2close = APP_BT_OUTPUT_STREAM_INDEX(gStreamplayer);\n        nRet = app_bt_stream_close(player2close);\n        if (nRet) {\n          return -1;\n        } else {\n          streamToClose.id = player2close;\n          app_audio_list_rmv_callback(&streamToClose, &next_status,\n                                      APP_BT_SETTING_Q_POS_TAIL, false);\n        }\n      }\n    }\n#endif\n  }\n\n  switch (player) {\n  case APP_BT_STREAM_HFP_PCM:\n  case APP_BT_STREAM_HFP_CVSD:\n  case APP_BT_STREAM_HFP_VENDOR:\n    nRet = bt_sco_player(true, freq);\n    break;\n  case APP_BT_STREAM_A2DP_SBC:\n  case APP_BT_STREAM_A2DP_AAC:\n  case APP_BT_STREAM_A2DP_VENDOR:\n    nRet = bt_sbc_player(PLAYER_OPER_START, freq);\n    break;\n#ifdef __FACTORY_MODE_SUPPORT__\n  case APP_FACTORYMODE_AUDIO_LOOP:\n    nRet = app_factorymode_audioloop(true, freq);\n    break;\n#endif\n#ifdef MEDIA_PLAYER_SUPPORT\n  case APP_PLAY_BACK_AUDIO:\n    nRet = app_play_audio_onoff(true, status);\n    break;\n#endif\n\n#ifdef RB_CODEC\n  case APP_BT_STREAM_RBCODEC:\n    nRet = app_rbplay_audio_onoff(true, 0);\n    break;\n#endif\n\n#ifdef AUDIO_LINEIN\n  case APP_PLAY_LINEIN_AUDIO:\n    nRet = app_play_linein_onoff(true);\n    break;\n#endif\n\n#if defined(APP_LINEIN_A2DP_SOURCE)\n  case APP_A2DP_SOURCE_LINEIN_AUDIO:\n    nRet = app_a2dp_source_linein_on(true);\n    break;\n#endif\n#if defined(APP_I2S_A2DP_SOURCE)\n  case APP_A2DP_SOURCE_I2S_AUDIO:\n    nRet = app_a2dp_source_I2S_onoff(true);\n    break;\n#endif\n\n#ifdef VOICE_DATAPATH\n  case APP_BT_STREAM_VOICEPATH:\n    nRet = app_voicepath_start_audio_stream();\n    break;\n#endif\n#ifdef __AI_VOICE__\n  case APP_BT_STREAM_AI_VOICE:\n    nRet = app_ai_voice_start_mic_stream();\n    break;\n#endif\n#ifdef __THIRDPARTY\n  case APP_BT_STREAM_THIRDPARTY_VOICE:\n    nRet = app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_KWS,\n                                                    THIRDPARTY_MIC_OPEN);\n    break;\n#endif\n  default:\n    nRet = -1;\n    break;\n  }\n\n  if (!nRet) {\n    gStreamplayer |= player;\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][OPEN] updated to  0x%x%s\", gStreamplayer,\n                       player2str(gStreamplayer));\n  }\n  return nRet;\n}\n\nint app_bt_stream_close(uint16_t player) {\n  int nRet = -1;\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][CLOSE] gStreamplayer: 0x%x%s\",\n                     gStreamplayer, player2str(gStreamplayer));\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][CLOSE] player:0x%x%s\", gStreamplayer,\n                     player2str(gStreamplayer));\n\n  if ((gStreamplayer & player) != player) {\n    return -1;\n  }\n\n  switch (player) {\n  case APP_BT_STREAM_HFP_PCM:\n  case APP_BT_STREAM_HFP_CVSD:\n  case APP_BT_STREAM_HFP_VENDOR:\n    nRet = bt_sco_player(false, APP_SYSFREQ_32K);\n    break;\n  case APP_BT_STREAM_A2DP_SBC:\n  case APP_BT_STREAM_A2DP_AAC:\n  case APP_BT_STREAM_A2DP_VENDOR:\n    nRet = bt_sbc_player(PLAYER_OPER_STOP, APP_SYSFREQ_32K);\n    break;\n#ifdef __FACTORY_MODE_SUPPORT__\n  case APP_FACTORYMODE_AUDIO_LOOP:\n    nRet = app_factorymode_audioloop(false, APP_SYSFREQ_32K);\n    break;\n#endif\n#ifdef MEDIA_PLAYER_SUPPORT\n  case APP_PLAY_BACK_AUDIO:\n    nRet = app_play_audio_onoff(false, NULL);\n    break;\n#endif\n#ifdef RB_CODEC\n  case APP_BT_STREAM_RBCODEC:\n    nRet = app_rbplay_audio_onoff(false, 0);\n    break;\n#endif\n\n#ifdef AUDIO_LINEIN\n  case APP_PLAY_LINEIN_AUDIO:\n    nRet = app_play_linein_onoff(false);\n    break;\n#endif\n\n#if defined(APP_LINEIN_A2DP_SOURCE)\n  case APP_A2DP_SOURCE_LINEIN_AUDIO:\n    nRet = app_a2dp_source_linein_on(false);\n    break;\n#endif\n#if defined(APP_I2S_A2DP_SOURCE)\n  case APP_A2DP_SOURCE_I2S_AUDIO:\n    nRet = app_a2dp_source_I2S_onoff(false);\n    break;\n#endif\n\n#ifdef VOICE_DATAPATH\n  case APP_BT_STREAM_VOICEPATH:\n    nRet = app_voicepath_stop_audio_stream();\n    break;\n#endif\n#ifdef __AI_VOICE__\n  case APP_BT_STREAM_AI_VOICE:\n    nRet = app_ai_voice_stop_mic_stream();\n    break;\n#endif\n#ifdef __THIRDPARTY\n  case APP_BT_STREAM_THIRDPARTY_VOICE:\n    nRet = app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_KWS,\n                                                    THIRDPARTY_MIC_CLOSE);\n    break;\n#endif\n  default:\n    nRet = -1;\n    break;\n  }\n  if (!nRet) {\n    gStreamplayer &= (~player);\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][CLOSE] updated to 0x%x%s\", gStreamplayer,\n                       player2str(gStreamplayer));\n  }\n  return nRet;\n}\n\nint app_bt_stream_setup(uint16_t player, uint8_t status) {\n  int nRet = -1;\n\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][SETUP] prev:%d%s sample:%d\", gStreamplayer,\n                     player2str(gStreamplayer), status);\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][SETUP] cur:%d%s sample:%d\", player,\n                     player2str(player), status);\n\n  switch (player) {\n  case APP_BT_STREAM_HFP_PCM:\n  case APP_BT_STREAM_HFP_CVSD:\n  case APP_BT_STREAM_HFP_VENDOR:\n    break;\n  case APP_BT_STREAM_A2DP_SBC:\n  case APP_BT_STREAM_A2DP_AAC:\n  case APP_BT_STREAM_A2DP_VENDOR:\n    bt_sbc_player_setup(status);\n    break;\n  default:\n    nRet = -1;\n    break;\n  }\n\n  return nRet;\n}\n\nint app_bt_stream_restart(APP_AUDIO_STATUS *status) {\n  int nRet = -1;\n  uint16_t player = status->id;\n  enum APP_SYSFREQ_FREQ_T freq = (enum APP_SYSFREQ_FREQ_T)status->freq;\n\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][RESTART] prev:%d%s freq:%d\", gStreamplayer,\n                     player2str(gStreamplayer), freq);\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][RESTART] cur:%d%s freq:%d\", player,\n                     player2str(player), freq);\n\n  if ((gStreamplayer & player) != player) {\n    return -1;\n  }\n\n  switch (player) {\n  case APP_BT_STREAM_HFP_PCM:\n  case APP_BT_STREAM_HFP_CVSD:\n  case APP_BT_STREAM_HFP_VENDOR:\n    nRet = bt_sco_player(false, freq);\n    nRet = bt_sco_player(true, freq);\n    break;\n  case APP_BT_STREAM_A2DP_SBC:\n  case APP_BT_STREAM_A2DP_AAC:\n  case APP_BT_STREAM_A2DP_VENDOR:\n#if defined(IBRT)\n    ibrt_a2dp_status_t a2dp_status;\n    a2dp_ibrt_sync_get_status(&a2dp_status);\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][RESTART] state:%d\", a2dp_status.state);\n    if (a2dp_status.state == BTIF_AVDTP_STRM_STATE_STREAMING) {\n      if (app_audio_manager_a2dp_is_active(BT_DEVICE_ID_1)) {\n        TRACE_AUD_STREAM_I(\"[STRM_PLAYER][RESTART] resume\");\n        nRet = bt_sbc_player(PLAYER_OPER_STOP, freq);\n        nRet = bt_sbc_player(PLAYER_OPER_START, freq);\n      } else {\n        if (app_ibrt_ui_is_profile_exchanged()) {\n          TRACE_AUD_STREAM_I(\"[STRM_PLAYER][RESTART] force_audio_retrigger\");\n          app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START,\n                                        BT_STREAM_SBC, BT_DEVICE_ID_1,\n                                        MAX_RECORD_NUM);\n          app_ibrt_if_force_audio_retrigger();\n        }\n      }\n    }\n#elif defined(__BT_ONE_BRING_TWO__)\n    if (btif_me_get_activeCons() > 1) {\n      enum APP_SYSFREQ_FREQ_T sysfreq;\n\n#ifdef A2DP_CP_ACCEL\n      sysfreq = APP_SYSFREQ_26M;\n#else\n      sysfreq = APP_SYSFREQ_104M;\n#endif\n      app_sysfreq_req(APP_SYSFREQ_USER_BT_A2DP, sysfreq);\n      bt_media_volume_ptr_update_by_mediatype(BT_STREAM_SBC);\n      app_bt_stream_volumeset(btdevice_volume_p->a2dp_vol);\n    }\n#endif\n    break;\n#ifdef __FACTORY_MODE_SUPPORT__\n  case APP_FACTORYMODE_AUDIO_LOOP:\n    break;\n#endif\n#ifdef MEDIA_PLAYER_SUPPORT\n  case APP_PLAY_BACK_AUDIO:\n    break;\n#endif\n  default:\n    nRet = -1;\n    break;\n  }\n\n  return nRet;\n}\n\nvoid app_bt_stream_volumeup(void) {\n#if defined AUDIO_LINEIN\n  if (app_bt_stream_isrun(APP_PLAY_LINEIN_AUDIO)) {\n    stream_linein_volume++;\n    if (stream_linein_volume > TGT_VOLUME_LEVEL_15)\n      stream_linein_volume = TGT_VOLUME_LEVEL_15;\n    app_bt_stream_volumeset(stream_linein_volume);\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][UP] set linein volume %d\\n\",\n                       stream_linein_volume);\n  } else\n#endif\n  {\n    if (app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM)) {\n      TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][UP] hfp volume\");\n\n      int8_t updatedVol = btdevice_volume_p->hfp_vol;\n      updatedVol++;\n      if (updatedVol > TGT_VOLUME_LEVEL_15) {\n        updatedVol = TGT_VOLUME_LEVEL_15;\n      }\n      uint32_t lock = nv_record_pre_write_operation();\n      btdevice_volume_p->hfp_vol = updatedVol;\n      nv_record_post_write_operation(lock);\n      current_btdevice_volume.hfp_vol = updatedVol;\n      if (updatedVol < TGT_VOLUME_LEVEL_15) {\n        app_bt_stream_volumeset(updatedVol);\n      }\n      if (btdevice_volume_p->hfp_vol == TGT_VOLUME_LEVEL_15) {\n#ifdef MEDIA_PLAYER_SUPPORT\n        media_PlayAudio(AUD_ID_BT_WARNING, 0);\n#endif\n      }\n\n    } else if ((app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC)) ||\n               (app_bt_stream_isrun(APP_BT_STREAM_INVALID))) {\n      TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][UP] a2dp volume\");\n      int8_t updatedVol = btdevice_volume_p->a2dp_vol;\n      updatedVol++;\n      if (updatedVol > TGT_VOLUME_LEVEL_15) {\n        updatedVol = TGT_VOLUME_LEVEL_15;\n      }\n      uint32_t lock = nv_record_pre_write_operation();\n      btdevice_volume_p->a2dp_vol = updatedVol;\n      nv_record_post_write_operation(lock);\n      current_btdevice_volume.a2dp_vol = updatedVol;\n      if (updatedVol < TGT_VOLUME_LEVEL_15) {\n        app_bt_stream_volumeset(updatedVol);\n      }\n      if (btdevice_volume_p->a2dp_vol == TGT_VOLUME_LEVEL_15) {\n#ifdef MEDIA_PLAYER_SUPPORT\n        media_PlayAudio(AUD_ID_BT_WARNING, 0);\n#endif\n      }\n    }\n\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][UP]  a2dp: %d\",\n                       btdevice_volume_p->a2dp_vol);\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][UP]  hfp: %d\",\n                       btdevice_volume_p->hfp_vol);\n  }\n  nv_record_touch_cause_flush();\n}\n\nvoid app_bt_set_volume(uint16_t type, uint8_t level) {\n  if ((type & APP_BT_STREAM_HFP_PCM) &&\n      app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM)) {\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL] set hfp volume\");\n    if (level >= TGT_VOLUME_LEVEL_MUTE && level <= TGT_VOLUME_LEVEL_15) {\n      uint32_t lock = nv_record_pre_write_operation();\n      btdevice_volume_p->hfp_vol = level;\n      nv_record_post_write_operation(lock);\n      app_bt_stream_volumeset(btdevice_volume_p->hfp_vol);\n    }\n    if (btdevice_volume_p->hfp_vol == TGT_VOLUME_LEVEL_0) {\n#ifdef MEDIA_PLAYER_SUPPORT\n      media_PlayAudio(AUD_ID_BT_WARNING, 0);\n#endif\n    }\n  }\n  if ((type & APP_BT_STREAM_A2DP_SBC) &&\n      ((app_bt_stream_isrun(APP_BT_STREAM_INVALID)) ||\n       (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC)))) {\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL] set a2dp volume\");\n    if (level >= TGT_VOLUME_LEVEL_MUTE && level <= TGT_VOLUME_LEVEL_15) {\n      uint32_t lock = nv_record_pre_write_operation();\n      btdevice_volume_p->a2dp_vol = level;\n      nv_record_post_write_operation(lock);\n      app_bt_stream_volumeset(btdevice_volume_p->a2dp_vol);\n    }\n    if (btdevice_volume_p->a2dp_vol == TGT_VOLUME_LEVEL_MUTE) {\n#ifdef MEDIA_PLAYER_SUPPORT\n      media_PlayAudio(AUD_ID_BT_WARNING, 0);\n#endif\n    }\n  }\n\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL] a2dp: %d\",\n                     btdevice_volume_p->a2dp_vol);\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL] hfp: %d\", btdevice_volume_p->hfp_vol);\n  nv_record_touch_cause_flush();\n}\n\nvoid app_bt_stream_volumedown(void) {\n#if defined AUDIO_LINEIN\n  if (app_bt_stream_isrun(APP_PLAY_LINEIN_AUDIO)) {\n    stream_linein_volume--;\n    if (stream_linein_volume < TGT_VOLUME_LEVEL_MUTE)\n      stream_linein_volume = TGT_VOLUME_LEVEL_MUTE;\n    app_bt_stream_volumeset(stream_linein_volume);\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][DONW] set linein volume %d\\n\",\n                       stream_linein_volume);\n  } else\n#endif\n  {\n    if (app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM)) {\n      TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][DONW] set hfp volume\");\n\n      int8_t updatedVol = btdevice_volume_p->hfp_vol;\n      updatedVol--;\n      if (updatedVol < TGT_VOLUME_LEVEL_0) {\n        updatedVol = TGT_VOLUME_LEVEL_0;\n      }\n\n      uint32_t lock = nv_record_pre_write_operation();\n      btdevice_volume_p->hfp_vol = updatedVol;\n      nv_record_post_write_operation(lock);\n      current_btdevice_volume.hfp_vol = updatedVol;\n      app_bt_stream_volumeset(updatedVol);\n      if (btdevice_volume_p->hfp_vol == TGT_VOLUME_LEVEL_0) {\n#ifdef MEDIA_PLAYER_SUPPORT\n        media_PlayAudio(AUD_ID_BT_WARNING, 0);\n#endif\n      }\n    } else if ((app_bt_stream_isrun(APP_BT_STREAM_INVALID)) ||\n               (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC))) {\n      TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][DONW] set a2dp volume\");\n      int8_t updatedVol = btdevice_volume_p->a2dp_vol;\n      updatedVol--;\n      if (updatedVol < TGT_VOLUME_LEVEL_MUTE) {\n        updatedVol = TGT_VOLUME_LEVEL_MUTE;\n      }\n\n      uint32_t lock = nv_record_pre_write_operation();\n      btdevice_volume_p->a2dp_vol = updatedVol;\n      nv_record_post_write_operation(lock);\n      current_btdevice_volume.a2dp_vol = updatedVol;\n      app_bt_stream_volumeset(updatedVol);\n      if (btdevice_volume_p->a2dp_vol == TGT_VOLUME_LEVEL_MUTE) {\n#ifdef MEDIA_PLAYER_SUPPORT\n        media_PlayAudio(AUD_ID_BT_WARNING, 0);\n#endif\n      }\n    }\n\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][DONW] a2dp: %d\",\n                       btdevice_volume_p->a2dp_vol);\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][DONW] hfp: %d\",\n                       btdevice_volume_p->hfp_vol);\n  }\n  nv_record_touch_cause_flush();\n}\n\nvoid app_bt_stream_volumeset_handler(int8_t vol) {\n  uint32_t ret;\n  struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n  ret = af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg,\n                          false);\n  if (ret == 0) {\n    stream_cfg->vol = vol;\n    af_stream_setup(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, stream_cfg);\n  }\n#if (defined(AUDIO_ANC_FB_MC) || defined(AUDIO_ANC_FB_MC_SCO)) &&              \\\n    defined(ANC_APP) && !defined(__AUDIO_RESAMPLE__)\n  ret = af_stream_get_cfg(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK, &stream_cfg,\n                          false);\n  if (ret == 0) {\n    stream_cfg->vol = vol;\n    af_stream_setup(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK, stream_cfg);\n  }\n#endif\n}\n\nint app_bt_stream_volumeset(int8_t vol) {\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][SET] vol=%d\", vol);\n\n  if (vol > TGT_VOLUME_LEVEL_15)\n    vol = TGT_VOLUME_LEVEL_15;\n  if (vol < TGT_VOLUME_LEVEL_MUTE)\n    vol = TGT_VOLUME_LEVEL_MUTE;\n\n  stream_local_volume = vol;\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n  if ((!app_bt_stream_isrun(APP_PLAY_BACK_AUDIO)) &&\n      (audio_prompt_is_allow_update_volume()))\n#else\n  if (!app_bt_stream_isrun(APP_PLAY_BACK_AUDIO))\n#endif\n  {\n    app_bt_stream_volumeset_handler(vol);\n  }\n  return 0;\n}\n\nint app_bt_stream_local_volume_get(void) { return stream_local_volume; }\n\nuint8_t app_bt_stream_a2dpvolume_get(void) {\n  // return btdevice_volume_p->a2dp_vol;\n  return current_btdevice_volume.a2dp_vol;\n}\n\nuint8_t app_bt_stream_hfpvolume_get(void) {\n  // return btdevice_volume_p->hfp_vol;\n  return current_btdevice_volume.hfp_vol;\n}\n\nvoid app_bt_stream_a2dpvolume_reset(void) {\n  btdevice_volume_p->a2dp_vol = NVRAM_ENV_STREAM_VOLUME_A2DP_VOL_DEFAULT;\n  current_btdevice_volume.a2dp_vol = NVRAM_ENV_STREAM_VOLUME_A2DP_VOL_DEFAULT;\n}\n\nvoid app_bt_stream_hfpvolume_reset(void) {\n  btdevice_volume_p->hfp_vol = NVRAM_ENV_STREAM_VOLUME_HFP_VOL_DEFAULT;\n  current_btdevice_volume.hfp_vol = NVRAM_ENV_STREAM_VOLUME_HFP_VOL_DEFAULT;\n}\n\nvoid app_bt_stream_volume_ptr_update(uint8_t *bdAddr) {\n  static struct btdevice_volume stream_volume = {\n      NVRAM_ENV_STREAM_VOLUME_A2DP_VOL_DEFAULT,\n      NVRAM_ENV_STREAM_VOLUME_HFP_VOL_DEFAULT};\n\n  nvrec_btdevicerecord *record = NULL;\n\n  memset(¤t_btdevice_volume, 0, sizeof(btdevice_volume));\n\n  if (bdAddr &&\n      !nv_record_btdevicerecord_find((bt_bdaddr_t *)bdAddr, &record)) {\n    btdevice_volume_p = &(record->device_vol);\n    DUMP8(\"0x%02x \", bdAddr, BTIF_BD_ADDR_SIZE);\n    TRACE_AUD_STREAM_I(\n        \"[STRM_PLAYER][VOL][UPDATE] a2dp_vol:%d hfp_vol:%d ptr:%p\",\n        btdevice_volume_p->a2dp_vol, btdevice_volume_p->hfp_vol,\n        btdevice_volume_p);\n  } else\n  {\n    btdevice_volume_p = &stream_volume;\n    TRACE_AUD_STREAM_I(\"[STRM_PLAYER][VOL][UPDATE] default\");\n    if (bdAddr) {\n      DUMP8(\"0x%02x \", bdAddr, BTIF_BD_ADDR_SIZE);\n    }\n  }\n  current_btdevice_volume.a2dp_vol = btdevice_volume_p->a2dp_vol;\n  current_btdevice_volume.hfp_vol = btdevice_volume_p->hfp_vol;\n}\n\nstruct btdevice_volume *app_bt_stream_volume_get_ptr(void) {\n  return btdevice_volume_p;\n}\n\nbool app_bt_stream_isrun(uint16_t player) {\n  if ((gStreamplayer & player) == player) {\n    return true;\n  } else {\n    return false;\n  }\n}\n\nint app_bt_stream_closeall() {\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][CLOSEALL]\");\n\n  bt_sco_player(false, APP_SYSFREQ_32K);\n  bt_sbc_player(PLAYER_OPER_STOP, APP_SYSFREQ_32K);\n\n#ifdef MEDIA_PLAYER_SUPPORT\n  app_play_audio_onoff(false, 0);\n#endif\n#ifdef RB_CODEC\n  app_rbplay_audio_onoff(false, 0);\n#endif\n\n#ifdef VOICE_DATAPATH\n  app_voicepath_stop_audio_stream();\n#endif\n\n  gStreamplayer = APP_BT_STREAM_INVALID;\n\n  return 0;\n}\n\nvoid app_bt_stream_copy_track_one_to_two_24bits(int32_t *dst_buf,\n                                                int32_t *src_buf,\n                                                uint32_t src_len) {\n  // Copy from tail so that it works even if dst_buf == src_buf\n  for (int i = (int)(src_len - 1); i >= 0; i--) {\n    dst_buf[i * 2 + 0] = dst_buf[i * 2 + 1] = src_buf[i];\n  }\n}\n\nvoid app_bt_stream_copy_track_one_to_two_16bits(int16_t *dst_buf,\n                                                int16_t *src_buf,\n                                                uint32_t src_len) {\n  // Copy from tail so that it works even if dst_buf == src_buf\n  for (int i = (int)(src_len - 1); i >= 0; i--) {\n    dst_buf[i * 2 + 0] = dst_buf[i * 2 + 1] = src_buf[i];\n  }\n}\n\nvoid app_bt_stream_copy_track_two_to_one_16bits(int16_t *dst_buf,\n                                                int16_t *src_buf,\n                                                uint32_t dst_len) {\n  for (uint32_t i = 0; i < dst_len; i++) {\n    dst_buf[i] = src_buf[i * 2];\n  }\n}\n\nvoid app_bt_stream_adaptive_frequency_adjusting(void) {\n#if 0 //(A2DP_DECODER_VER == 2)\n    if (app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC)){\n        if (!a2dp_audio_sysfreq_boost_running()){\n            a2dp_audio_sysfreq_boost_start(1);\n        }\n    }\n#endif\n}\n\n#ifdef PLAYBACK_FORCE_48K\nstatic int app_force48k_resample_iter(uint8_t *buf, uint32_t len) {\n  uint8_t codec_type = bt_sbc_player_get_codec_type();\n  uint32_t overlay_id = 0;\n  if (0) {\n#if defined(A2DP_LHDC_ON)\n  } else if (codec_type == BTIF_AVDTP_CODEC_TYPE_LHDC) {\n    overlay_id = APP_OVERLAY_A2DP_LHDC;\n#endif\n#if defined(A2DP_AAC_ON)\n  } else if (codec_type == BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC) {\n    overlay_id = APP_OVERLAY_A2DP_AAC;\n#endif\n  } else if (codec_type == BTIF_AVDTP_CODEC_TYPE_SBC) {\n    overlay_id = APP_OVERLAY_A2DP;\n  }\n  a2dp_audio_more_data(overlay_id, buf, len);\n  return 0;\n}\n\nstruct APP_RESAMPLE_T *\napp_force48k_resample_any_open(enum AUD_CHANNEL_NUM_T chans,\n                               APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len,\n                               float ratio_step) {\n  return app_playback_resample_any_open(chans, cb, iter_len, ratio_step);\n}\n#endif\n\n// =======================================================\n// APP RESAMPLE\n// =======================================================\n\n#ifndef MIX_MIC_DURING_MUSIC\n#include \"resample_coef.h\"\n#endif\n\nstatic APP_RESAMPLE_BUF_ALLOC_CALLBACK resamp_buf_alloc =\n    app_audio_mempool_get_buff;\n\nstatic void memzero_int16(void *dst, uint32_t len) {\n  if (dst) {\n    int16_t *dst16 = (int16_t *)dst;\n    int16_t *dst16_end = dst16 + len / 2;\n\n    while (dst16 < dst16_end) {\n      *dst16++ = 0;\n    }\n  } else {\n    TRACE_AUD_STREAM_I(\"WRN: receive null pointer\");\n  }\n}\n\nstruct APP_RESAMPLE_T *app_resample_open_with_preallocated_buf(\n    enum AUD_STREAM_T stream, const struct RESAMPLE_COEF_T *coef,\n    enum AUD_CHANNEL_NUM_T chans, APP_RESAMPLE_ITER_CALLBACK cb,\n    uint32_t iter_len, float ratio_step, uint8_t *buf, uint32_t bufSize) {\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][PROMPT_MIXER][OPEN]\");\n  struct APP_RESAMPLE_T *resamp;\n  struct RESAMPLE_CFG_T cfg;\n  enum RESAMPLE_STATUS_T status;\n  uint32_t size, resamp_size;\n\n  resamp_size = audio_resample_ex_get_buffer_size(chans, AUD_BITS_16,\n                                                  coef->phase_coef_num);\n\n  size = sizeof(struct APP_RESAMPLE_T);\n  size += ALIGN(iter_len, 4);\n  size += resamp_size;\n\n  ASSERT(size < bufSize,\n         \"Pre-allocated buffer size %d is smaller than the needed size %d\",\n         bufSize, size);\n\n  resamp = (struct APP_RESAMPLE_T *)buf;\n  buf += sizeof(*resamp);\n  resamp->stream = stream;\n  resamp->cb = cb;\n  resamp->iter_buf = buf;\n  buf += ALIGN(iter_len, 4);\n  resamp->iter_len = iter_len;\n  resamp->offset = iter_len;\n  resamp->ratio_step = ratio_step;\n\n  memset(&cfg, 0, sizeof(cfg));\n  cfg.chans = chans;\n  cfg.bits = AUD_BITS_16;\n  cfg.ratio_step = ratio_step;\n  cfg.coef = coef;\n  cfg.buf = buf;\n  cfg.size = resamp_size;\n\n  status = audio_resample_ex_open(&cfg, (RESAMPLE_ID *)&resamp->id);\n  ASSERT(status == RESAMPLE_STATUS_OK, \"%s: Failed to open resample: %d\",\n         __func__, status);\n\n#ifdef CHIP_BEST1000\n  hal_cmu_audio_resample_enable();\n#endif\n\n  return resamp;\n}\n\nstatic struct APP_RESAMPLE_T *\napp_resample_open(enum AUD_STREAM_T stream, const struct RESAMPLE_COEF_T *coef,\n                  enum AUD_CHANNEL_NUM_T chans, APP_RESAMPLE_ITER_CALLBACK cb,\n                  uint32_t iter_len, float ratio_step) {\n  TRACE_AUD_STREAM_I(\"[STRM_PLAYER][RESAMPLE][OPEN] ratio: %d/1000\",\n                     uint32_t(ratio_step * 1000));\n  struct APP_RESAMPLE_T *resamp;\n  struct RESAMPLE_CFG_T cfg;\n  enum RESAMPLE_STATUS_T status;\n  uint32_t size, resamp_size;\n  uint8_t *buf;\n\n  resamp_size = audio_resample_ex_get_buffer_size(chans, AUD_BITS_16,\n                                                  coef->phase_coef_num);\n\n  size = sizeof(struct APP_RESAMPLE_T);\n  size += ALIGN(iter_len, 4);\n  size += resamp_size;\n\n  resamp_buf_alloc(&buf, size);\n\n  resamp = (struct APP_RESAMPLE_T *)buf;\n  buf += sizeof(*resamp);\n  resamp->stream = stream;\n  resamp->cb = cb;\n  resamp->iter_buf = buf;\n  buf += ALIGN(iter_len, 4);\n  resamp->iter_len = iter_len;\n  resamp->offset = iter_len;\n  resamp->ratio_step = ratio_step;\n\n  memset(&cfg, 0, sizeof(cfg));\n  cfg.chans = chans;\n  cfg.bits = AUD_BITS_16;\n  cfg.ratio_step = ratio_step;\n  cfg.coef = coef;\n  cfg.buf = buf;\n  cfg.size = resamp_size;\n\n  status = audio_resample_ex_open(&cfg, (RESAMPLE_ID *)&resamp->id);\n  ASSERT(status == RESAMPLE_STATUS_OK, \"%s: Failed to open resample: %d\",\n         __func__, status);\n\n#ifdef CHIP_BEST1000\n  hal_cmu_audio_resample_enable();\n#endif\n\n  return resamp;\n}\n\nstatic int app_resample_close(struct APP_RESAMPLE_T *resamp) {\n#ifdef CHIP_BEST1000\n  hal_cmu_audio_resample_disable();\n#endif\n\n  if (resamp) {\n    audio_resample_ex_close((RESAMPLE_ID *)resamp->id);\n  }\n\n  return 0;\n}\n\nstruct APP_RESAMPLE_T *\napp_playback_resample_open(enum AUD_SAMPRATE_T sample_rate,\n                           enum AUD_CHANNEL_NUM_T chans,\n                           APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len) {\n  const struct RESAMPLE_COEF_T *coef = NULL;\n\n  if (sample_rate == AUD_SAMPRATE_8000) {\n    coef = &resample_coef_8k_to_8p4k;\n  } else if (sample_rate == AUD_SAMPRATE_16000) {\n    coef = &resample_coef_8k_to_8p4k;\n  } else if (sample_rate == AUD_SAMPRATE_32000) {\n    coef = &resample_coef_32k_to_50p7k;\n  } else if (sample_rate == AUD_SAMPRATE_44100) {\n    coef = &resample_coef_44p1k_to_50p7k;\n  } else if (sample_rate == AUD_SAMPRATE_48000) {\n    coef = &resample_coef_48k_to_50p7k;\n  } else {\n    ASSERT(false, \"%s: Bad sample rate: %u\", __func__, sample_rate);\n  }\n\n  return app_resample_open(AUD_STREAM_PLAYBACK, coef, chans, cb, iter_len, 0);\n}\n\n#ifdef RESAMPLE_ANY_SAMPLE_RATE\nstruct APP_RESAMPLE_T *\napp_playback_resample_any_open(enum AUD_CHANNEL_NUM_T chans,\n                               APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len,\n                               float ratio_step) {\n  const struct RESAMPLE_COEF_T *coef = &resample_coef_any_up256;\n\n  return app_resample_open(AUD_STREAM_PLAYBACK, coef, chans, cb, iter_len,\n                           ratio_step);\n}\n\nstruct APP_RESAMPLE_T *app_playback_resample_any_open_with_pre_allocated_buffer(\n    enum AUD_CHANNEL_NUM_T chans, APP_RESAMPLE_ITER_CALLBACK cb,\n    uint32_t iter_len, float ratio_step, uint8_t *ptrBuf, uint32_t bufSize) {\n  const struct RESAMPLE_COEF_T *coef = &resample_coef_any_up256;\n\n  return app_resample_open_with_preallocated_buf(AUD_STREAM_PLAYBACK, coef,\n                                                 chans, cb, iter_len,\n                                                 ratio_step, ptrBuf, bufSize);\n}\n\nstruct APP_RESAMPLE_T *app_capture_resample_14k7_to_16k(\n    enum AUD_CHANNEL_NUM_T chans, APP_RESAMPLE_ITER_CALLBACK cb,\n    uint32_t iter_len, float ratio_step, uint8_t *ptrBuf, uint32_t bufSize) {\n  const struct RESAMPLE_COEF_T *coef = &resample_coef_44p1k_to_48k;\n\n  return app_resample_open_with_preallocated_buf(AUD_STREAM_PLAYBACK, coef,\n                                                 chans, cb, iter_len,\n                                                 ratio_step, ptrBuf, bufSize);\n}\n\n#endif\n\nint app_playback_resample_close(struct APP_RESAMPLE_T *resamp) {\n  return app_resample_close(resamp);\n}\n\nint app_playback_resample_run(struct APP_RESAMPLE_T *resamp, uint8_t *buf,\n                              uint32_t len) {\n  uint32_t in_size, out_size;\n  struct RESAMPLE_IO_BUF_T io;\n  enum RESAMPLE_STATUS_T status;\n  int ret;\n  // uint32_t lock;\n\n  if (resamp == NULL) {\n    goto _err_exit;\n  }\n\n  io.out_cyclic_start = NULL;\n  io.out_cyclic_end = NULL;\n\n  if (resamp->offset < resamp->iter_len) {\n    io.in = resamp->iter_buf + resamp->offset;\n    io.in_size = resamp->iter_len - resamp->offset;\n    io.out = buf;\n    io.out_size = len;\n\n    // lock = int_lock();\n    status = audio_resample_ex_run((RESAMPLE_ID *)resamp->id, &io, &in_size,\n                                   &out_size);\n    // int_unlock(lock);\n    if (status != RESAMPLE_STATUS_OUT_FULL &&\n        status != RESAMPLE_STATUS_IN_EMPTY && status != RESAMPLE_STATUS_DONE) {\n      goto _err_exit;\n    }\n\n    buf += out_size;\n    len -= out_size;\n    resamp->offset += in_size;\n\n    ASSERT(len == 0 || resamp->offset == resamp->iter_len,\n           \"%s: Bad resample offset: len=%d offset=%u iter_len=%u\", __func__,\n           len, resamp->offset, resamp->iter_len);\n  }\n\n  while (len) {\n    ret = resamp->cb(resamp->iter_buf, resamp->iter_len);\n    if (ret) {\n      goto _err_exit;\n    }\n\n    io.in = resamp->iter_buf;\n    io.in_size = resamp->iter_len;\n    io.out = buf;\n    io.out_size = len;\n\n    // lock = int_lock();\n    status = audio_resample_ex_run((RESAMPLE_ID *)resamp->id, &io, &in_size,\n                                   &out_size);\n    // int_unlock(lock);\n    if (status != RESAMPLE_STATUS_OUT_FULL &&\n        status != RESAMPLE_STATUS_IN_EMPTY && status != RESAMPLE_STATUS_DONE) {\n      goto _err_exit;\n    }\n\n    ASSERT(out_size <= len, \"%s: Bad resample out_size: out_size=%u len=%d\",\n           __func__, out_size, len);\n    ASSERT(in_size <= resamp->iter_len,\n           \"%s: Bad resample in_size: in_size=%u iter_len=%u\", __func__,\n           in_size, resamp->iter_len);\n\n    buf += out_size;\n    len -= out_size;\n    if (in_size != resamp->iter_len) {\n      resamp->offset = in_size;\n\n      ASSERT(len == 0, \"%s: Bad resample len: len=%d out_size=%u\", __func__,\n             len, out_size);\n    }\n  }\n\n  return 0;\n\n_err_exit:\n  if (resamp) {\n    app_resample_reset(resamp);\n  }\n\n  memzero_int16(buf, len);\n\n  return 1;\n}\n\nstruct APP_RESAMPLE_T *\napp_capture_resample_open(enum AUD_SAMPRATE_T sample_rate,\n                          enum AUD_CHANNEL_NUM_T chans,\n                          APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len) {\n  const struct RESAMPLE_COEF_T *coef = NULL;\n\n  if (sample_rate == AUD_SAMPRATE_8000) {\n    coef = &resample_coef_8p4k_to_8k;\n  } else if (sample_rate == AUD_SAMPRATE_16000) {\n    // Same coef as 8K sample rate\n    coef = &resample_coef_8p4k_to_8k;\n  } else {\n    ASSERT(false, \"%s: Bad sample rate: %u\", __func__, sample_rate);\n  }\n\n  return app_resample_open(AUD_STREAM_CAPTURE, coef, chans, cb, iter_len, 0);\n}\n\n#ifdef RESAMPLE_ANY_SAMPLE_RATE\nstruct APP_RESAMPLE_T *\napp_capture_resample_any_open(enum AUD_CHANNEL_NUM_T chans,\n                              APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len,\n                              float ratio_step) {\n  const struct RESAMPLE_COEF_T *coef = &resample_coef_any_up256;\n  return app_resample_open(AUD_STREAM_CAPTURE, coef, chans, cb, iter_len,\n                           ratio_step);\n}\n#endif\n\nint app_capture_resample_close(struct APP_RESAMPLE_T *resamp) {\n  return app_resample_close(resamp);\n}\n\nint app_capture_resample_run(struct APP_RESAMPLE_T *resamp, uint8_t *buf,\n                             uint32_t len) {\n  uint32_t in_size, out_size;\n  struct RESAMPLE_IO_BUF_T io;\n  enum RESAMPLE_STATUS_T status;\n  int ret;\n\n  if (resamp == NULL) {\n    goto _err_exit;\n  }\n\n  io.out_cyclic_start = NULL;\n  io.out_cyclic_end = NULL;\n\n  if (resamp->offset < resamp->iter_len) {\n    io.in = buf;\n    io.in_size = len;\n    io.out = resamp->iter_buf + resamp->offset;\n    io.out_size = resamp->iter_len - resamp->offset;\n\n    status = audio_resample_ex_run((RESAMPLE_ID *)resamp->id, &io, &in_size,\n                                   &out_size);\n    if (status != RESAMPLE_STATUS_OUT_FULL &&\n        status != RESAMPLE_STATUS_IN_EMPTY && status != RESAMPLE_STATUS_DONE) {\n      goto _err_exit;\n    }\n\n    buf += in_size;\n    len -= in_size;\n    resamp->offset += out_size;\n\n    ASSERT(len == 0 || resamp->offset == resamp->iter_len,\n           \"%s: Bad resample offset: len=%d offset=%u iter_len=%u\", __func__,\n           len, resamp->offset, resamp->iter_len);\n\n    if (resamp->offset == resamp->iter_len) {\n      ret = resamp->cb(resamp->iter_buf, resamp->iter_len);\n      if (ret) {\n        goto _err_exit;\n      }\n    }\n  }\n\n  while (len) {\n    io.in = buf;\n    io.in_size = len;\n    io.out = resamp->iter_buf;\n    io.out_size = resamp->iter_len;\n\n    status = audio_resample_ex_run((RESAMPLE_ID *)resamp->id, &io, &in_size,\n                                   &out_size);\n    if (status != RESAMPLE_STATUS_OUT_FULL &&\n        status != RESAMPLE_STATUS_IN_EMPTY && status != RESAMPLE_STATUS_DONE) {\n      goto _err_exit;\n    }\n\n    ASSERT(in_size <= len, \"%s: Bad resample in_size: in_size=%u len=%u\",\n           __func__, in_size, len);\n    ASSERT(out_size <= resamp->iter_len,\n           \"%s: Bad resample out_size: out_size=%u iter_len=%u\", __func__,\n           out_size, resamp->iter_len);\n\n    buf += in_size;\n    len -= in_size;\n    if (out_size == resamp->iter_len) {\n      ret = resamp->cb(resamp->iter_buf, resamp->iter_len);\n      if (ret) {\n        goto _err_exit;\n      }\n    } else {\n      resamp->offset = out_size;\n\n      ASSERT(len == 0, \"%s: Bad resample len: len=%u in_size=%u\", __func__, len,\n             in_size);\n    }\n  }\n\n  return 0;\n\n_err_exit:\n  if (resamp) {\n    app_resample_reset(resamp);\n  }\n\n  memzero_int16(buf, len);\n\n  return 1;\n}\n\nvoid app_resample_reset(struct APP_RESAMPLE_T *resamp) {\n  audio_resample_ex_flush((RESAMPLE_ID *)resamp->id);\n  resamp->offset = resamp->iter_len;\n}\n\nvoid app_resample_tune(struct APP_RESAMPLE_T *resamp, float ratio) {\n  float new_step;\n\n  if (resamp == NULL) {\n    return;\n  }\n\n  TRACE_AUD_STREAM_I(\"%s: stream=%d ratio=%d\", __FUNCTION__, resamp->stream,\n                     FLOAT_TO_PPB_INT(ratio));\n\n  if (resamp->stream == AUD_STREAM_PLAYBACK) {\n    new_step = resamp->ratio_step + resamp->ratio_step * ratio;\n  } else {\n    new_step = resamp->ratio_step - resamp->ratio_step * ratio;\n  }\n  audio_resample_ex_set_ratio_step(resamp->id, new_step);\n}\n\nAPP_RESAMPLE_BUF_ALLOC_CALLBACK\napp_resample_set_buf_alloc_callback(APP_RESAMPLE_BUF_ALLOC_CALLBACK cb) {\n  APP_RESAMPLE_BUF_ALLOC_CALLBACK old_cb;\n\n  old_cb = resamp_buf_alloc;\n  resamp_buf_alloc = cb;\n\n  return old_cb;\n}\n\n#ifdef TX_RX_PCM_MASK\n\n#ifdef SCO_DMA_SNAPSHOT\n\n#define MSBC_LEN 60\n\nvoid store_encode_frame2buff() {\n  if (bt_sco_codec_is_msbc()) {\n    uint32_t len;\n    // processing uplink msbc data.\n    if (playback_buf_btpcm_copy != NULL) {\n      len = playback_size_btpcm_copy - MSBC_LEN;\n      memcpy((uint8_t *)(*(volatile uint32_t *)(MIC_BUFF_ADRR_REG)),\n             playback_buf_btpcm_copy, MSBC_LEN);\n      memcpy(playback_buf_btpcm_copy, playback_buf_btpcm_copy + MSBC_LEN, len);\n    }\n    // processing downlink msbc data.\n    if (capture_buf_btpcm_copy != NULL) {\n      len = capture_size_btpcm_copy - MSBC_LEN;\n      memcpy(capture_buf_btpcm_copy, capture_buf_btpcm_copy + MSBC_LEN, len);\n      memcpy(capture_buf_btpcm_copy + len,\n             (uint8_t *)(*(volatile uint32_t *)(RX_BUFF_ADRR)), MSBC_LEN);\n    }\n#if defined(CHIP_BEST2300A)\n    uint8_t sco_toggle = *(volatile uint8_t *)(RX_BUFF_ADRR + 8);\n    pcm_data_param[sco_toggle].curr_time =\n        *(volatile uint32_t *)(RX_BUFF_ADRR + 4);\n    pcm_data_param[sco_toggle].toggle = sco_toggle;\n    pcm_data_param[sco_toggle].flag = *(volatile uint8_t *)(RX_BUFF_ADRR + 9);\n    pcm_data_param[sco_toggle].counter =\n        *(volatile uint16_t *)(RX_BUFF_ADRR + 10);\n#endif\n  }\n  return;\n}\n#else\nextern CQueue *get_tx_esco_queue_ptr();\nextern CQueue *get_rx_esco_queue_ptr();\nvoid store_encode_frame2buff() {\n  CQueue *Tx_esco_queue_temp = NULL;\n  CQueue *Rx_esco_queue_temp = NULL;\n  Tx_esco_queue_temp = get_tx_esco_queue_ptr();\n  Rx_esco_queue_temp = get_rx_esco_queue_ptr();\n  unsigned int len;\n  len = 60;\n  int status = 0;\n  if (bt_sco_codec_is_msbc()) {\n    status =\n        DeCQueue(Tx_esco_queue_temp,\n                 (uint8_t *)(*(volatile uint32_t *)(MIC_BUFF_ADRR_REG)), len);\n    if (status) {\n      // TRACE_AUD_STREAM_I(\"TX DeC Fail\");\n    }\n    status = EnCQueue(Rx_esco_queue_temp,\n                      (uint8_t *)(*(volatile uint32_t *)(RX_BUFF_ADRR)), len);\n    if (status) {\n      // TRACE_AUD_STREAM_I(\"RX EnC Fail\");\n    }\n  }\n}\n#endif\n#endif\n\nint app_bt_stream_init(void) {\n  app_bt_stream_trigger_checker_init();\n  return 0;\n}\n"
  },
  {
    "path": "services/bt_app/app_bt_stream.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BT_STREAM_H__\n#define __APP_BT_STREAM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_aud.h\"\n#include \"stdint.h\"\n#define BT_AUDIO_BUFF_AAC_SIZE (1024*2*2*2)\n\n#if defined(__3M_PACK__)\n#define BT_AUDIO_BUFF_SBC_SIZE (128*7*2*2*2)\n#else\n#define BT_AUDIO_BUFF_SBC_44P1K_SIZE (128*5*2*2*2)\n#define BT_AUDIO_BUFF_SBC_48K_SIZE (128*6*2*2*2)\n#endif\n\n#if defined(A2DP_LDAC_ON)\n#define BT_AUDIO_BUFF_SIZE_LDAC (256*4*2*2*2)\n#endif\n\n#define BT_AUDIO_CACHE_2_UNCACHE(addr) \\\n    ((unsigned char *)((unsigned int)addr & ~(0x04000000)))\n\n// #if BT_AUDIO_BUFF_SIZE < BT_AUDIO_SCO_BUFF_SIZE * 4\n// #error BT_AUDIO_BUFF_SIZE must be at least BT_AUDIO_SCO_BUFF_SIZE * 4\n// #endif\n\n// low 11 bits are output streams index while high 5 bits are input streams index\n// one output stream and one input stream can exit at the same time,\n// while two streams with the same direction are mutex\n#define APP_BT_STREAM_BORDER_BIT_OFFSET     12\n// the index < the border is the output stream\n// the index >= the border is the input stream\n#define APP_BT_STREAM_BORDER_INDEX          (1 << APP_BT_STREAM_BORDER_BIT_OFFSET)\n\n// output streams\n#define APP_BT_STREAM_HFP_PCM               (1 << 0)\n#define APP_BT_STREAM_HFP_CVSD              (1 << 1)\n#define APP_BT_STREAM_HFP_VENDOR            (1 << 2)\n#define APP_BT_STREAM_A2DP_SBC              (1 << 3)\n#define APP_BT_STREAM_A2DP_AAC              (1 << 4)\n#define APP_BT_STREAM_A2DP_VENDOR           (1 << 5)\n#ifdef __FACTORY_MODE_SUPPORT__\n#define APP_FACTORYMODE_AUDIO_LOOP          (1 << 6)\n#endif\n#define APP_PLAY_BACK_AUDIO                 (1 << 7)\n#ifdef RB_CODEC\n#define APP_BT_STREAM_RBCODEC               (1 << 8)\n#endif\n#ifdef AUDIO_LINEIN\n#define APP_PLAY_LINEIN_AUDIO               (1 << 9)\n#endif\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(__APP_A2DP_SOURCE__)||(APP_I2S_A2DP_SOURCE)\n#define APP_A2DP_SOURCE_LINEIN_AUDIO        (1 << 10)\n#define APP_A2DP_SOURCE_I2S_AUDIO           (1 << 11)\n#endif\n\n\n// input streams\n#ifdef VOICE_DATAPATH\n#define APP_BT_STREAM_VOICEPATH             (1 << APP_BT_STREAM_BORDER_BIT_OFFSET)\n#endif\n\n#ifdef __AI_VOICE__\n#define APP_BT_STREAM_AI_VOICE             (1 << (APP_BT_STREAM_BORDER_BIT_OFFSET+1))\n#endif\n\n#ifdef __THIRDPARTY\n#define APP_BT_STREAM_THIRDPARTY_VOICE        (1 << (APP_BT_STREAM_BORDER_BIT_OFFSET+2))\n#endif\n\n#define APP_BT_STREAM_INVALID               0\n\n#define APP_BT_OUTPUT_STREAM_INDEX(player)  ((player) & ((1 << APP_BT_STREAM_BORDER_BIT_OFFSET) - 1))\n#define APP_BT_INPUT_STREAM_INDEX(player)   ((player) & (~((1 << APP_BT_STREAM_BORDER_BIT_OFFSET) - 1)))\n\n#include \n\nenum APP_BT_SETTING_T {\n    APP_BT_SETTING_OPEN = 0,\n    APP_BT_SETTING_CLOSE,\n    APP_BT_SETTING_SETUP,\n    APP_BT_SETTING_RESTART,\n    APP_BT_SETTING_CLOSEALL,\n    APP_BT_SETTING_CLOSEMEDIA,\n    APP_BT_SETTING_NUM,\n};\n\nenum APP_BT_AUDIO_Q_POS {\n    APP_BT_SETTING_Q_POS_HEAD = 0,\n    APP_BT_SETTING_Q_POS_TAIL = 1,\n};\n\ntypedef struct {\n    uint16_t id;\n    uint16_t status;\n\n    uint16_t aud_type;\n    uint16_t aud_id;\n\n    uint8_t freq;\n}APP_AUDIO_STATUS;\n\nconst char *player2str(uint16_t player_type);\n\nint app_bt_stream_init(void);\n\nint app_bt_stream_open(APP_AUDIO_STATUS* status);\n\nint app_bt_stream_close(uint16_t player);\n\nint app_bt_stream_setup(uint16_t player, uint8_t status);\n\nint app_bt_stream_restart(APP_AUDIO_STATUS* status);\n\nint app_bt_stream_closeall();\n\nbool app_bt_stream_isrun(uint16_t player);\n\nvoid app_bt_set_volume(uint16_t type,uint8_t level);\n\nvoid app_bt_stream_volumeup(void);\n\nvoid app_bt_stream_volumedown(void);\n\nvoid app_bt_stream_volume_ptr_update(uint8_t *bdAddr);\n\nstruct btdevice_volume * app_bt_stream_volume_get_ptr(void);\n\nint app_bt_stream_volumeset(int8_t vol);\n\nuint8_t app_bt_stream_a2dpvolume_get(void);\n\nuint8_t app_bt_stream_hfpvolume_get(void);\n\nvoid app_bt_stream_a2dpvolume_reset(void);\n\nvoid app_bt_stream_hfpvolume_reset(void);\n\nvoid app_bt_stream_copy_track_one_to_two_24bits(int32_t *dst_buf, int32_t *src_buf, uint32_t src_len);\n\nvoid app_bt_stream_copy_track_one_to_two_16bits(int16_t *dst_buf, int16_t *src_buf, uint32_t src_len);\n\nvoid app_bt_stream_copy_track_two_to_one_16bits(int16_t *dst_buf, int16_t *src_buf, uint32_t dst_len);\n\nenum AUD_SAMPRATE_T bt_get_sbc_sample_rate(void);\n\nvoid bt_store_sbc_sample_rate(enum AUD_SAMPRATE_T sample_rate);\n\nenum AUD_SAMPRATE_T bt_parse_store_sbc_sample_rate(uint8_t sbc_samp_rate);\n\nbool app_bt_stream_is_mic_mix_during_music_enabled(void);\nvoid app_bt_sream_set_mix_mic_flag(bool isEnable);\nvoid bt_sbc_mix_mic_init(void);\nvoid bt_sbc_mix_mic_deinit(void);\nuint32_t bt_sbc_codec_capture_data(uint8_t *buf, uint32_t len);\n\nvoid app_audio_buffer_check(void);\n\n// =======================================================\n// APP RESAMPLE\n// =======================================================\n\n#include \"hal_aud.h\"\n\ntypedef int (*APP_RESAMPLE_BUF_ALLOC_CALLBACK)(uint8_t **buff, uint32_t size);\n\ntypedef int (*APP_RESAMPLE_ITER_CALLBACK)(uint8_t *buf, uint32_t len);\n\nstruct APP_RESAMPLE_T {\n    enum AUD_STREAM_T stream;\n    void *id;\n    APP_RESAMPLE_ITER_CALLBACK cb;\n    uint8_t *iter_buf;\n    uint32_t iter_len;\n    uint32_t offset;\n    float ratio_step;\n};\n\nstruct APP_RESAMPLE_T *app_playback_resample_open(enum AUD_SAMPRATE_T sample_rate, enum AUD_CHANNEL_NUM_T chans,\n                                                  APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len);\nstruct APP_RESAMPLE_T *app_playback_resample_any_open(enum AUD_CHANNEL_NUM_T chans,\n                                                      APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len,\n                                                      float ratio_step);\nstruct APP_RESAMPLE_T *app_playback_resample_any_open_with_pre_allocated_buffer(enum AUD_CHANNEL_NUM_T chans,\n        APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len,\n        float ratio_step, uint8_t* ptrBuf, uint32_t bufSize);    \n\nstruct APP_RESAMPLE_T *app_capture_resample_14k7_to_16k(enum AUD_CHANNEL_NUM_T chans,\n        APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len,\n        float ratio_step, uint8_t* ptrBuf, uint32_t bufSize);\n        \nint app_playback_resample_close(struct APP_RESAMPLE_T *resamp);\nint app_playback_resample_run(struct APP_RESAMPLE_T *resamp, uint8_t *buf, uint32_t len);\n\nstruct APP_RESAMPLE_T *app_capture_resample_open(enum AUD_SAMPRATE_T sample_rate, enum AUD_CHANNEL_NUM_T chans,\n                                                 APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len);\nstruct APP_RESAMPLE_T *app_capture_resample_any_open(enum AUD_CHANNEL_NUM_T chans,\n                                                     APP_RESAMPLE_ITER_CALLBACK cb, uint32_t iter_len,\n                                                     float ratio_step);\nint app_capture_resample_close(struct APP_RESAMPLE_T *resamp);\nint app_capture_resample_run(struct APP_RESAMPLE_T *resamp, uint8_t *buf, uint32_t len);\n\nvoid app_resample_reset(struct APP_RESAMPLE_T *resamp);\nvoid app_resample_tune(struct APP_RESAMPLE_T *resamp, float ratio);\nAPP_RESAMPLE_BUF_ALLOC_CALLBACK app_resample_set_buf_alloc_callback(APP_RESAMPLE_BUF_ALLOC_CALLBACK cb);\nuint16_t app_bt_stream_ibrt_trigger_seq_diff_calc(int32_t dma_samples, int32_t frame_samples, int32_t sub_seq, int32_t interval);\nvoid app_bt_stream_volumeset_handler(int8_t vol);\n\n#ifdef TX_RX_PCM_MASK\nvoid store_encode_frame2buff();\n#endif\n\n#ifdef BONE_SENSOR_TDM\nvoid bt_sco_get_tdm_buffer(uint8_t **buf, uint32_t *len);\n#endif\nint app_bt_stream_local_volume_get(void);\n\nbool bt_is_playback_triggered(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_bt_trace.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BT_TRACE_H__\n#define __APP_BT_TRACE_H__\n\n#include \"hal_trace.h\"\n\n#ifdef ENABLE_COMPRESS_LOG\n#define TRACE_AUD_MGR_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][MGR][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_MGR_I(str, ...) LOG_INFO(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][MGR]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_MGR_W(str, ...) LOG_WARN(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][MGR][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_MGR_E(str, ...) LOG_ERROR(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][MGR][ERR]\"str, ##__VA_ARGS__)\n#else\n#define TRACE_AUD_MGR_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_MOD(AUDFLG),    \"[AUD][MGR][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_MGR_I(str, ...) LOG_INFO(LOG_MOD(AUDFLG),     \"[AUD][MGR]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_MGR_W(str, ...) LOG_WARN(LOG_MOD(AUDFLG),     \"[AUD][MGR][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_MGR_E(str, ...) LOG_ERROR(LOG_MOD(AUDFLG),    \"[AUD][MGR][ERR]\"str, ##__VA_ARGS__)\n#endif\n\n#ifdef ENABLE_COMPRESS_LOG\n#define TRACE_AUD_HDL_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][HDL][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_HDL_I(str, ...) LOG_INFO(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][HDL]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_HDL_W(str, ...) LOG_WARN(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][HDL][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_HDL_E(str, ...) LOG_ERROR(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][HDL][ERR]\"str, ##__VA_ARGS__)\n#else\n#define TRACE_AUD_HDL_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_MOD(AUDFLG),    \"[AUD][HDL][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_HDL_I(str, ...) LOG_INFO(LOG_MOD(AUDFLG),     \"[AUD][HDL]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_HDL_W(str, ...) LOG_WARN(LOG_MOD(AUDFLG),     \"[AUD][HDL][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_HDL_E(str, ...) LOG_ERROR(LOG_MOD(AUDFLG),    \"[AUD][HDL][ERR]\"str, ##__VA_ARGS__)\n#endif\n\n#ifdef ENABLE_COMPRESS_LOG\n#define TRACE_AUD_STREAM_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][STRM][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_STREAM_I(str, ...) LOG_INFO(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][STRM]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_STREAM_W(str, ...) LOG_WARN(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][STRM][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_STREAM_E(str, ...) LOG_ERROR(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][STRM][ERR]\"str, ##__VA_ARGS__)\n#else\n#define TRACE_AUD_STREAM_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_MOD(AUDFLG),    \"[AUD][STRM][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_STREAM_I(str, ...) LOG_INFO(LOG_MOD(AUDFLG),     \"[AUD][STRM]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_STREAM_W(str, ...) LOG_WARN(LOG_MOD(AUDFLG),     \"[AUD][STRM][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_AUD_STREAM_E(str, ...) LOG_ERROR(LOG_MOD(AUDFLG),    \"[AUD][STRM][ERR]\"str, ##__VA_ARGS__)\n#endif\n\n#ifdef ENABLE_COMPRESS_LOG\n#define TRACE_MEDIA_PLAYER_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][STRM][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_MEDIA_PLAYESTREAM_I(str, ...) LOG_INFO(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][STRM]\"str, ##__VA_ARGS__)\n#define TRACE_MEDIA_PLAYESTREAM_W(str, ...) LOG_WARN(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][STRM][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_MEDIA_PLAYESTREAM_E(str, ...) LOG_ERROR(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][STRM][ERR]\"str, ##__VA_ARGS__)\n#else\n#define TRACE_MEDIA_PLAYESTREAM_D(str, ...) hal_trace_dummy(str, ##__VA_ARGS__)\n//LOG_DEBUG(LOG_MOD(AUDFLG),    \"[AUD][STRM][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_MEDIA_PLAYESTREAM_I(str, ...) LOG_INFO(LOG_MOD(AUDFLG),     \"[AUD][STRM]\"str, ##__VA_ARGS__)\n#define TRACE_MEDIA_PLAYESTREAM_W(str, ...) LOG_WARN(LOG_MOD(AUDFLG),     \"[AUD][STRM][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_MEDIA_PLAYESTREAM_E(str, ...) LOG_ERROR(LOG_MOD(AUDFLG),    \"[AUD][STRM][ERR]\"str, ##__VA_ARGS__)\n#endif\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_btgatt.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef __GATT_OVER_BR_EDR__\n#include \"app_btgatt.h\"\n#include \"btgatt_api.h\"\n#include \"hal_trace.h\"\n#include \"plat_types.h\"\n\nvoid app_btgatt_addsdp(uint16_t pServiceUUID, uint16_t startHandle,\n                       uint16_t endHandle) {\n  TRACE(1, \"%s\", __func__);\n  btif_btgatt_addsdp(pServiceUUID, startHandle, endHandle);\n}\n\nvoid app_btgatt_init(void) {\n  TRACE(1, \"%s\", __func__);\n  btif_btgatt_init();\n}\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_btgatt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BTGATT_H__\n#define __APP_BTGATT_H__\n\n#define ATT_SERVICE_UUID 0x0118\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nvoid app_btgatt_init(void);\nvoid app_btgatt_addsdp(uint16_t pServiceUUID, uint16_t startHandle, uint16_t endHandle);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/bt_app/app_btmap_sms.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_battery.h\"\n#include \"app_status_ind.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_fp_rfcomm.h\"\n#include \"app_hfp.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"bt_if.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hfp_api.h\"\n#include \"os_api.h\"\n#include \"resources.h\"\n#ifdef BT_USB_AUDIO_DUAL_MODE\n#include \"btusb_audio.h\"\n#endif\n#ifdef __THIRDPARTY\n#include \"app_thirdparty.h\"\n#endif\n\n#include \"bt_drv_interface.h\"\n\n#ifdef VOICE_DATAPATH\n#include \"app_voicepath.h\"\n#endif\n#include \"app.h\"\n#ifdef __AI_VOICE__\n#include \"ai_control.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_ibrt_hf.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_ibrt_cmd_sync_hfp_status.h\"\n#endif\n\n#if defined(__BTMAP_ENABLE__)\n#include \"app_btmap_sms.h\"\n#include \"map_api.h\"\n#include \"obex_api.h\"\n\nextern struct BT_DEVICE_T app_bt_device;\nstruct SMS_MSG_T app_sms_msg;\n\n#define CHACK_BTMAP_STATE_STAYING_MS 2000\nosTimerId app_btmap_state_check_handling_timer_id = NULL;\nstatic int app_btmap_state_check_handling_handler(void const *param);\nosTimerDef(APP_BTMAP_STATE_CHECK_HANDLING_TIMER,\n           (void (*)(void const *))app_btmap_state_check_handling_handler);\n\nstatic int btmap_sms_session_event_handler(btif_map_session_handle_t handle,\n                                           btif_map_session_event_t event,\n                                           btif_map_session_cb_param_t *param) {\n  TRACE(1, \"%s\", __func__);\n  btif_map_session_function_param_t func_param;\n  switch (event) {\n  case BTIF_MAP_SESSION_EVENT_OPEN:\n    func_param.p.SetFolder.folder[0] = \"root\";\n    func_param.p.SetFolder.folder[1] = \"telecom\";\n    func_param.p.SetFolder.folder[2] = \"msg\";\n    func_param.p.SetFolder.folder[3] = NULL;\n    func_param.p.SetFolder.up_level = 0;\n    btif_map_set_folder(handle, &func_param);\n    break;\n  case BTIF_MAP_SESSION_EVENT_CLOSE:\n    break;\n  default:\n    break;\n  }\n  return 0;\n}\n\nvoid app_btmap_connected_callback(void *param, void *map_session) {\n  TRACE(1, \"%s\", __func__);\n#if defined(IBRT)\n  app_tws_ibrt_profile_callback(BTIF_APP_MAP_PROFILE_ID, (void *)param,\n                                (void *)map_session);\n#endif\n}\n\nvoid app_btmap_sms_init(void) {\n  TRACE(1, \"%s\", __func__);\n  int i = 0;\n  btif_map_initialize();\n  btif_map_callback_register(app_btmap_connected_callback);\n  // only map mas client supported now\n  for (i = 0; i < BT_DEVICE_NUM; ++i) {\n    app_bt_device.map_session_handle[i] = btif_map_create_session();\n  }\n}\n\nvoid app_btmap_sms_open(BT_DEVICE_ID_T id, bt_bdaddr_t *remote) {\n  TRACE(1, \"%s\", __func__);\n  btif_map_session_config_t config;\n  btif_map_session_handle_t handle = NULL;\n  handle = app_bt_device.map_session_handle[id];\n\n  if (handle == NULL) {\n    TRACE(2, \"%s:handle is NULL, id=%d\", __func__, id);\n    return;\n  }\n\n  TRACE(2, \"btmap_sms_open:id=%d,remote=0x%p\", id, remote);\n  DUMP8(\"0x%02x-\", remote, 6);\n\n  config.type = BTIF_MAP_SESSION_TYPE_MAS;\n  config.obex_role = BTIF_OBEX_SESSION_ROLE_CLIENT;\n  btif_map_session_open(handle, remote, &config,\n                        btmap_sms_session_event_handler);\n}\n\nvoid app_btmap_sms_close(BT_DEVICE_ID_T id) {\n  TRACE(1, \"%s\", __func__);\n  btif_map_session_handle_t handle = NULL;\n  handle = app_bt_device.map_session_handle[id];\n\n  if (handle == NULL) {\n    TRACE(2, \"%s:handle is NULL, id=%d\", __func__, id);\n    return;\n  }\n\n  btif_map_session_close(handle);\n}\n\nvoid app_btmap_sms_send(BT_DEVICE_ID_T id, char *telNum, char *msg) {\n  btif_map_session_handle_t handle = NULL;\n  handle = app_bt_device.map_session_handle[id];\n\n  if (handle == NULL) {\n    TRACE(2, \"%s:handle is NULL, id=%d\", __func__, id);\n    return;\n  }\n\n  btif_map_send_sms(handle, telNum, msg);\n}\n\nbool app_btmap_check_is_connected(BT_DEVICE_ID_T id) {\n  TRACE(1, \"%s\", __func__);\n  btif_map_session_handle_t handle = NULL;\n  handle = app_bt_device.map_session_handle[id];\n\n  return btif_map_check_is_connected(handle);\n}\n\nbool app_btmap_check_is_idle(BT_DEVICE_ID_T id) {\n  TRACE(1, \"%s\", __func__);\n  btif_map_session_handle_t handle = NULL;\n  handle = app_bt_device.map_session_handle[id];\n\n  return btif_map_check_is_idle(handle);\n}\n\nvoid app_btmap_sms_save(BT_DEVICE_ID_T id, char *telNum, char *msg) {\n  TRACE(1, \"%s\", __func__);\n  app_sms_msg.telNum = telNum;\n  app_sms_msg.msg = msg;\n  app_sms_msg.telNumLen = strlen(telNum);\n  app_sms_msg.msgLen = strlen(msg);\n\n  if (NULL == app_btmap_state_check_handling_timer_id) {\n    app_btmap_state_check_handling_timer_id = osTimerCreate(\n        osTimer(APP_BTMAP_STATE_CHECK_HANDLING_TIMER), osTimerOnce, NULL);\n  }\n\n  osTimerStart(app_btmap_state_check_handling_timer_id,\n               CHACK_BTMAP_STATE_STAYING_MS);\n}\n\nvoid app_btmap_sms_resend(void) {\n  TRACE(1, \"%s\", __func__);\n\n  app_btmap_sms_send(BT_DEVICE_ID_1, app_sms_msg.telNum, app_sms_msg.msg);\n  memset((void *)app_sms_msg.telNum, 0, app_sms_msg.telNumLen);\n  memset((void *)app_sms_msg.msg, 0, app_sms_msg.msgLen);\n}\nstatic uint8_t resendTime = 0;\nstatic int app_btmap_state_check_handling_handler(void const *param) {\n  TRACE(1, \"%s\", __func__);\n  resendTime++;\n  if (resendTime >= 6) {\n    resendTime = 0;\n    return -1;\n  }\n\n  if (true == app_btmap_check_is_connected(BT_DEVICE_ID_1)) {\n    app_btmap_sms_resend();\n  } else {\n    osTimerStart(app_btmap_state_check_handling_timer_id,\n                 CHACK_BTMAP_STATE_STAYING_MS);\n  }\n  return 0;\n}\n\n#endif /* __BTMAP_ENABLE__ */\n"
  },
  {
    "path": "services/bt_app/app_btmap_sms.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BTMAP_SMS_H__\n#define __APP_BTMAP_SMS_H__\n\n#include \"bluetooth.h\"\n#include \"btapp.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_btmap_sms_init(void);\nvoid app_btmap_sms_open(BT_DEVICE_ID_T id, bt_bdaddr_t *remote);\nvoid app_btmap_sms_close(BT_DEVICE_ID_T id);\nvoid app_btmap_sms_send(BT_DEVICE_ID_T id, char* telNum, char* msg);\nbool app_btmap_check_is_connected(BT_DEVICE_ID_T id);\nvoid app_btmap_sms_save(BT_DEVICE_ID_T id, char* telNum, char* msg);\nvoid app_btmap_sms_resend(void);\nbool app_btmap_check_is_idle(BT_DEVICE_ID_T id);\n\n\nstruct SMS_MSG_T{\n    char* telNum;\n    char* msg;\n    uint8_t telNumLen;\n    uint32_t msgLen;\n};\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /*__APP_BTMAP_SMS_H__*/\n\n"
  },
  {
    "path": "services/bt_app/app_dip.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"btif_sys_config.h\"\n\n#ifdef BTIF_DIP_DEVICE\n\n#include \"app_bt.h\"\n#include \"app_dip.h\"\n#include \"cmsis_os.h\"\n#include \"dip_api.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord_bt.h\"\n#include \"plat_types.h\"\n#include \n\n#if defined(ENHANCED_STACK)\n#include \"me_api.h\"\n#include \"sdp_api.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_peripheral_manager.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_tws_if.h\"\n#endif\n\n#if defined(__AI_VOICE__) || defined(BISTO_ENABLED)\n#include \"app_ai_if.h\"\n#endif\n\n#if defined(__AI_VOICE__)\n#include \"ai_thread.h\"\n#endif\n\nvoid app_dip_sync_dip_info(void);\n\nstatic void app_dip_callback(bt_bdaddr_t *_addr, bool ios_flag) {\n  btif_remote_device_t *p_remote_dev =\n      btif_me_get_remote_device_by_bdaddr(_addr);\n\n  TRACE(2, \"%s dev %p addr :\", __func__, p_remote_dev);\n  DUMP8(\"%x \", _addr->address, 6);\n\n#if defined(IBRT)\n  if (TWS_LINK == app_tws_ibrt_get_remote_link_type(p_remote_dev)) {\n    TRACE(1, \"%s connect type is TWS\", __func__);\n    return;\n  }\n\n  app_dip_sync_dip_info();\n#endif\n\n#if defined(__AI_VOICE__) || defined(BISTO_ENABLED)\n  app_ai_if_mobile_connect_handle(_addr);\n#endif\n}\n\n#if defined(IBRT)\nvoid app_dip_sync_info_prepare_handler(uint8_t *buf, uint16_t *length) {\n  uint32_t offset = 0;\n  ibrt_ctrl_t *p_g_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  bt_bdaddr_t *mobile_addr = &p_g_ibrt_ctrl->mobile_addr;\n  uint16_t vend_id = 0;\n  uint16_t vend_id_source = 0;\n\n  btif_dip_get_record_vend_id_and_source(mobile_addr, &vend_id,\n                                         &vend_id_source);\n  memcpy(buf, mobile_addr->address, 6);\n  offset += 6;\n  memcpy(buf + offset, (uint8_t *)&vend_id, 2);\n  offset += 2;\n  memcpy(buf + offset, (uint8_t *)&vend_id_source, 2);\n  offset += 2;\n\n  *length = offset;\n}\n\nvoid app_dip_sync_info_received_handler(uint8_t *buf, uint16_t length) {\n  bt_bdaddr_t mobile_addr;\n  uint16_t vend_id = 0;\n  uint16_t vend_id_source = 0;\n  uint32_t offset = 0;\n  nvrec_btdevicerecord *record = NULL;\n\n  memcpy(mobile_addr.address, buf, 6);\n  offset += 6;\n  memcpy((uint8_t *)&vend_id, buf + offset, 2);\n  offset += 2;\n  memcpy((uint8_t *)&vend_id_source, buf + offset, 2);\n  offset += 2;\n  TRACE(2, \"%s vend_id 0x%x vend_id_source 0x%x addr:\", __func__, vend_id,\n        vend_id_source);\n  DUMP8(\"0x%x \", mobile_addr.address, 6);\n\n  if (vend_id && !nv_record_btdevicerecord_find(&mobile_addr, &record)) {\n    nv_record_btdevicerecord_set_vend_id_and_source(record, vend_id,\n                                                    vend_id_source);\n  }\n}\n\nvoid app_dip_sync_init(void) {\n  TWS_SYNC_USER_T user_app_dip_t = {\n      app_dip_sync_info_prepare_handler,\n      app_dip_sync_info_received_handler,\n      NULL,\n      NULL,\n      NULL,\n  };\n\n  app_tws_if_register_sync_user(TWS_SYNC_USER_DIP, &user_app_dip_t);\n}\n\nvoid app_dip_sync_dip_info(void) { app_tws_if_sync_info(TWS_SYNC_USER_DIP); }\n#endif\n\nvoid app_dip_init(void) { btif_dip_init(app_dip_callback); }\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_dip.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_DIP_H__\n#define __APP_DIP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n//the mobile connect type\ntypedef enum {\n    MOBILE_CONNECT_IDLE,\n    MOBILE_CONNECT_IOS,\n    MOBILE_CONNECT_ANDROID,\n} MOBILE_CONN_TYPE_E;\n\nvoid app_dip_sync_init(void);\nvoid app_dip_init(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/bt_app/app_fp_rfcomm.cpp",
    "content": "#include \"app_fp_rfcomm.h\"\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_rfcomm_mgr.h\"\n#include \"app_spp.h\"\n#include \"bt_if.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"os_api.h\"\n#include \"sdp_api.h\"\n#include \"spp_api.h\"\n#include \n#include \n#include \n#ifdef IBRT\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_if.h\"\n#endif\n\nosMutexDef(fp_rfcomm_mutex);\nosMutexDef(fp_rfcomm_credit_mutex);\n\n#define FP_RFCOMM_TX_PKT_CNT 6\n\n/* 128 bit UUID in Big Endian df21fe2c-2515-4fdb-8886-f12c4d67927c */\nstatic const uint8_t FP_RFCOMM_UUID_128[16] = {\n    0x7C, 0x92, 0x67, 0x4D, 0x2C, 0xF1, 0x86, 0x88,\n    0xDB, 0x4F, 0x15, 0x25, 0x2C, 0xFE, 0x21, 0xDF};\n\ntypedef struct {\n  uint8_t isConnected;\n  int8_t serviceIndex;\n  uint8_t isRfcommInitialized;\n} FpRFcommServiceEnv_t;\n\ntypedef union {\n  struct {\n    uint8_t isCompanionAppInstalled : 1;\n    uint8_t isSilentModeSupported : 1;\n    uint8_t reserve : 6;\n  } env;\n  uint8_t content;\n} FpCapabilitiesEnv_t;\n\ntypedef struct {\n  uint8_t isRightRinging : 1;\n  uint8_t isLeftRinging : 1;\n  uint8_t reserve : 6;\n} FpRingStatus_t;\n\nstatic FpRFcommServiceEnv_t fp_rfcomm_service = {false, -1, false};\n\nstatic FpCapabilitiesEnv_t fp_capabilities = {false, false, 0};\n\nstatic __attribute__((unused))\nFpRingStatus_t fp_ring_status = {false, false, 0};\n\nbtif_sdp_record_t *fpSppSdpRecord;\n\nextern \"C\" void app_gfps_get_battery_levels(uint8_t *pCount,\n                                            uint8_t *pBatteryLevel);\nextern \"C\" uint8_t *appm_get_current_ble_addr(void);\n\nstatic int fp_rfcomm_data_received(void *pDev, uint8_t process, uint8_t *pData,\n                                   uint16_t dataLen);\nstatic void app_fp_msg_send_active_components_rsp(void);\nstatic void app_fp_msg_send_message_ack(uint8_t msgGroup, uint8_t msgCode);\nstatic void app_fp_msg_send_message_nak(uint8_t reason, uint8_t msgGroup,\n                                        uint8_t msgCode);\nstatic void fp_rfcomm_data_handler(uint8_t *ptr, uint16_t len);\n// update this value if the maximum possible tx data size is bigger than current\n// value\n#define FP_RFCOMM_TX_BUF_CHUNK_SIZE 64\n#define FP_RFCOMM_TX_BUF_CHUNK_CNT FP_RFCOMM_TX_PKT_CNT\n#define FP_RFCOMM_TX_BUF_SIZE                                                  \\\n  (FP_RFCOMM_TX_BUF_CHUNK_CNT * FP_RFCOMM_TX_BUF_CHUNK_SIZE)\n\nstatic uint32_t fp_rfcomm_tx_buf_next_allocated_chunk = 0;\nstatic uint32_t fp_rfcomm_tx_buf_allocated_chunk_cnt = 0;\nstatic uint8_t fp_rfcomm_tx_buf[FP_RFCOMM_TX_BUF_CHUNK_CNT]\n                               [FP_RFCOMM_TX_BUF_CHUNK_SIZE];\n\nstatic uint8_t *fp_rfcomm_tx_buf_addr(uint32_t chunk) {\n  return fp_rfcomm_tx_buf[chunk];\n}\n\nstatic int32_t fp_rfcomm_alloc_tx_chunk(void) {\n  uint32_t lock = int_lock_global();\n\n  if (fp_rfcomm_tx_buf_allocated_chunk_cnt >= FP_RFCOMM_TX_BUF_CHUNK_CNT) {\n    int_unlock_global(lock);\n    return -1;\n  }\n\n  uint32_t returnedChunk = fp_rfcomm_tx_buf_next_allocated_chunk;\n\n  fp_rfcomm_tx_buf_allocated_chunk_cnt++;\n  fp_rfcomm_tx_buf_next_allocated_chunk++;\n  if (FP_RFCOMM_TX_BUF_CHUNK_CNT == fp_rfcomm_tx_buf_next_allocated_chunk) {\n    fp_rfcomm_tx_buf_next_allocated_chunk = 0;\n  }\n\n  int_unlock_global(lock);\n  return returnedChunk;\n}\n\nstatic bool fp_rfcomm_free_tx_chunk(void) {\n  uint32_t lock = int_lock_global();\n  if (0 == fp_rfcomm_tx_buf_allocated_chunk_cnt) {\n    int_unlock_global(lock);\n    return false;\n  }\n\n  fp_rfcomm_tx_buf_allocated_chunk_cnt--;\n  int_unlock_global(lock);\n  return true;\n}\n\nstatic void fp_rfcomm_reset_tx_buf(void) {\n  uint32_t lock = int_lock_global();\n  fp_rfcomm_tx_buf_allocated_chunk_cnt = 0;\n  fp_rfcomm_tx_buf_next_allocated_chunk = 0;\n  int_unlock_global(lock);\n}\n\n#define GFPS_FIND_MY_BUDS_CMD_STOP 0x0\n#define GFPS_FIND_MY_BUDS_CMD_START 0x1\n\n#define FIND_MY_BUDS_CMD_STOP_MASTER 0x00\n#define FIND_MY_BUDS_CMD_STOP_SLAVE 0x01\n#define FIND_MY_BUDS_CMD_START_MASTER 0x10\n#define FIND_MY_BUDS_CMD_START_SLAVE 0x11\n\n#define FIND_MY_BUDS_STATUS_SLAVE_MASK 0x1\n#define FIND_MY_BUDS_STATUS_MASTER_MASK 0x2\nuint8_t find_buds_flag = 0;\n\n#include \"app_status_ind.h\"\n#include \"apps.h\"\n\nvoid app_set_find_my_buds(uint8_t mode) {\n#ifdef IBRT\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  TRACE(2, \"%s, mode = %d,role = %d\", __func__, mode,\n        p_ibrt_ctrl->current_role);\n\n  switch (mode) {\n  case FIND_MY_BUDS_CMD_STOP_MASTER:\n    if (find_buds_flag & FIND_MY_BUDS_STATUS_MASTER_MASK) {\n      /* stop beeping master */\n      if (IBRT_SLAVE != p_ibrt_ctrl->current_role) {\n        // app_set_find_my_buds_status(false);\n        app_voice_stop(APP_STATUS_INDICATION_FIND_MY_BUDS, 0);\n        find_buds_flag &= ~(FIND_MY_BUDS_STATUS_MASTER_MASK);\n      }\n    }\n    break;\n  case FIND_MY_BUDS_CMD_STOP_SLAVE:\n    if (find_buds_flag & FIND_MY_BUDS_STATUS_SLAVE_MASK) {\n      /* stop beeping slave */\n      if (IBRT_SLAVE == p_ibrt_ctrl->current_role) {\n        app_voice_stop(APP_STATUS_INDICATION_FIND_MY_BUDS, 0);\n        find_buds_flag &= ~(FIND_MY_BUDS_STATUS_SLAVE_MASK);\n      }\n    }\n    break;\n  case FIND_MY_BUDS_CMD_START_MASTER:\n    if (!(find_buds_flag & FIND_MY_BUDS_STATUS_MASTER_MASK)) {\n      /* start beep master */\n      if (IBRT_SLAVE != p_ibrt_ctrl->current_role) {\n        app_voice_report(APP_STATUS_INDICATION_FIND_MY_BUDS, 0);\n\n        find_buds_flag |= FIND_MY_BUDS_STATUS_MASTER_MASK;\n      }\n    }\n    break;\n  case FIND_MY_BUDS_CMD_START_SLAVE:\n    if (!(find_buds_flag & FIND_MY_BUDS_STATUS_SLAVE_MASK)) {\n      /* start beep slave */\n      if (IBRT_SLAVE == p_ibrt_ctrl->current_role) {\n        app_voice_report(APP_STATUS_INDICATION_FIND_MY_BUDS, 0);\n\n        find_buds_flag |= FIND_MY_BUDS_STATUS_SLAVE_MASK;\n      }\n    }\n    break;\n  default:\n    break;\n  }\n#else\n  switch (mode) {\n  case GFPS_FIND_MY_BUDS_CMD_START:\n    app_voice_report(APP_STATUS_INDICATION_FIND_MY_BUDS, 0);\n    break;\n  case GFPS_FIND_MY_BUDS_CMD_STOP:\n    app_voice_stop(APP_STATUS_INDICATION_FIND_MY_BUDS, 0);\n  default:\n    break;\n  }\n#endif\n}\n\nosTimerId ring_timeout_timer_id = NULL;\nstatic void gfps_find_devices_ring_timeout_handler(void const *param);\nosTimerDef(GFPS_FIND_DEVICES_RING_TIMEOUT,\n           gfps_find_devices_ring_timeout_handler);\n#define GFPS_FIND_MY_BUDS_CMD_STOP_DUAL 0x0\n#define GFPS_FIND_MY_BUDS_CMD_START_MASTER_ONLY 0x1\n#define GFPS_FIND_MY_BUDS_CMD_START_SLAVE_ONLY 0x2\n#define GFPS_FIND_MY_BUDS_CMD_START_DUAL 0x3\nstatic void gfps_set_find_my_buds(uint8_t cmd) {\n  TRACE(2, \"%s, cmd = %d\", __func__, cmd);\n#ifdef IBRT\n  if (GFPS_FIND_MY_BUDS_CMD_STOP_DUAL == cmd) {\n    app_set_find_my_buds(FIND_MY_BUDS_CMD_STOP_MASTER);\n    app_set_find_my_buds(FIND_MY_BUDS_CMD_STOP_SLAVE);\n  } else if (GFPS_FIND_MY_BUDS_CMD_START_MASTER_ONLY ==\n             cmd) // right ring, stop left\n  {\n    app_set_find_my_buds(FIND_MY_BUDS_CMD_STOP_SLAVE);\n    app_set_find_my_buds(FIND_MY_BUDS_CMD_START_MASTER);\n  } else if (GFPS_FIND_MY_BUDS_CMD_START_SLAVE_ONLY ==\n             cmd) // left ring, stop right\n  {\n    app_set_find_my_buds(FIND_MY_BUDS_CMD_STOP_MASTER);\n    app_set_find_my_buds(FIND_MY_BUDS_CMD_START_SLAVE);\n  } else if (GFPS_FIND_MY_BUDS_CMD_START_DUAL == cmd) // both ring\n  {\n    app_set_find_my_buds(FIND_MY_BUDS_CMD_START_MASTER);\n    app_set_find_my_buds(FIND_MY_BUDS_CMD_START_SLAVE);\n  }\n#else\n  app_set_find_my_buds(cmd);\n#endif\n}\nstatic void gfps_find_devices_ring_timeout_handler(void const *param) {\n  TRACE(0, \"gfps_find_devices_ring_timeout_handler\");\n  app_bt_start_custom_function_in_bt_thread(GFPS_FIND_MY_BUDS_CMD_STOP_DUAL, 0,\n                                            (uint32_t)gfps_set_find_my_buds);\n}\n\nvoid fp_rfcomm_ring_timer_set(uint8_t period) {\n  TRACE(2, \"%s, period = %d\", __func__, period);\n  if (ring_timeout_timer_id == NULL) {\n    ring_timeout_timer_id = osTimerCreate(\n        osTimer(GFPS_FIND_DEVICES_RING_TIMEOUT), osTimerOnce, NULL);\n  }\n\n  osTimerStop(ring_timeout_timer_id);\n  if (period) {\n    osTimerStart(ring_timeout_timer_id, period * 1000);\n  }\n}\n\nstatic void fp_rfcomm_ring_request_handling(uint8_t *requestdata,\n                                            uint16_t datalen) {\n  TRACE(1, \"%s,[RFCOMM][FMD] request\", __func__);\n  DUMP8(\"%02x \", requestdata, datalen);\n  app_fp_msg_send_message_ack(FP_MSG_GROUP_DEVICE_ACTION,\n                              FP_MSG_DEVICE_ACTION_RING);\n  if (datalen > 1) {\n    fp_rfcomm_ring_timer_set(requestdata[1]);\n  }\n\n  gfps_set_find_my_buds(requestdata[0]);\n\n  // TODO: implement the continuous audio prompt playing state machine\n#if 0\n    uint8_t isAllowed = false;\n    uint8_t isChangePeerDevStatus = false;\n    switch (request)\n    {\n        case 3:\n        {\n             if (IS_CONNECTED_WITH_TWS() && \n                ((0 == fp_ring_status.isLeftRinging) && \n                    (0 == fp_ring_status.isRightRinging)))\n            {\n                // TODO: start ringing on both sides\n                fp_ring_status.isLeftRinging = true;\n                fp_ring_status.isRightRinging = true;\n\n                isAllowed = true;\n            }\n            break;\n        }\n        case 1:            \n            if (0 == fp_ring_status.isRightRinging)\n            {\n                if (((fp_ring_status.isLeftRinging) && app_tws_is_right_side()) ||\n                    app_tws_is_left_side())\n                {\n                    isChangePeerDevStatus = true;\n                }\n\n                if (isChangePeerDevStatus && !IS_CONNECTED_WITH_TWS())\n                {\n                    break;\n                }\n\n                // start right ring\n                if (app_tws_is_left_side())\n                {\n                    // TODO: start ringing on peer device\n                }\n                else if (app_tws_is_right_side())\n                {\n                    // TODO: start local ringing\n                }\n\n                if (fp_ring_status.isLeftRinging)\n                {\n                    // stop left ring\n                    if (app_tws_is_right_side())\n                    {\n                        // TODO: stop ringing on peer device\n                    }\n                    else if (app_tws_is_left_side())\n                    {\n                        // TODO: stop local ringing\n                    }                  \n                }\n                \n                fp_ring_status.isLeftRinging = false;\n                fp_ring_status.isRightRinging = true;\n\n                isAllowed = true;\n            }\n            break;\n        case 2:\n            if (0 == fp_ring_status.isLeftRinging)\n            {\n                if (((fp_ring_status.isRightRinging) && app_tws_is_left_side()) ||\n                    app_tws_is_right_side())\n                {\n                    isChangePeerDevStatus = true;\n                }\n\n                if (isChangePeerDevStatus && !IS_CONNECTED_WITH_TWS())\n                {\n                    break;\n                }\n\n                // start left ring\n                if (app_tws_is_right_side())\n                {\n                    // TODO: start ringing on peer device\n                }\n                else if (app_tws_is_left_side())\n                {\n                    // TODO: start local ringing\n                }\n\n                if (fp_ring_status.isRightRinging)\n                {\n                    // stop left ring\n                    if (app_tws_is_left_side())\n                    {\n                        // TODO: stop ringing on peer device\n                    }\n                    else if (app_tws_is_right_side())\n                    {\n                        // TODO: stop local ringing\n                    }                  \n                }\n\n                fp_ring_status.isLeftRinging = true;\n                fp_ring_status.isRightRinging = false;\n                isAllowed = true;\n            }\n            break;\n        case 0:\n             if (IS_CONNECTED_WITH_TWS() && \n                ((1 == fp_ring_status.isLeftRinging) && \n                    (1 == fp_ring_status.isRightRinging)))\n            {\n                // TODO: stop ringing on both sides\n                fp_ring_status.isLeftRinging = false;\n                fp_ring_status.isRightRinging = false;\n\n                isAllowed = true;\n            }\n            else\n            {\n                if (((fp_ring_status.isLeftRinging) && app_tws_is_right_side()) ||\n                    ((fp_ring_status.isRightRinging) && app_tws_is_left_side()))\n                {\n                    isChangePeerDevStatus = true;\n                }\n\n                if (isChangePeerDevStatus && !IS_CONNECTED_WITH_TWS())\n                {\n                    break;\n                }\n\n                // stop right ring\n                if (fp_ring_status.isRightRinging)\n                {\n                    if (app_tws_is_left_side())\n                    {\n                        // TODO: stop ringing on peer device\n                    }\n                    else if (app_tws_is_right_side())\n                    {\n                        // TODO: stop local ringing\n                    }                  \n                }\n\n                if (fp_ring_status.isLeftRinging)\n                {\n                    // stop left ring\n                    if (app_tws_is_right_side())\n                    {\n                        // TODO: stop ringing on peer device\n                    }\n                    else if (app_tws_is_left_side())\n                    {\n                        // TODO: stop local ringing\n                    }                  \n                }\n                \n                fp_ring_status.isLeftRinging = false;\n                fp_ring_status.isRightRinging = false;\n\n                isAllowed = true;\n            }\n            break;\n        default:\n            isAllowed = false;\n            break;\n    }\n\n    if (isAllowed)\n    {\n        app_fp_msg_send_message_ack(FP_MSG_GROUP_DEVICE_ACTION, FP_MSG_DEVICE_ACTION_RING);\n    }\n    else\n    {\n        app_fp_msg_send_message_nak(FP_MSG_NAK_REASON_NOT_ALLOWED, \n            FP_MSG_GROUP_DEVICE_ACTION, FP_MSG_DEVICE_ACTION_RING);        \n    }\n#endif\n}\n\n#define FP_ACCUMULATED_DATA_BUF_SIZE 128\nstatic uint8_t fp_accumulated_data_buf[FP_ACCUMULATED_DATA_BUF_SIZE];\nstatic uint16_t fp_accumulated_data_size = 0;\n\nstatic void fp_rfcomm_reset_data_accumulator(void) {\n  fp_accumulated_data_size = 0;\n  memset(fp_accumulated_data_buf, 0, sizeof(fp_accumulated_data_buf));\n}\n\nstatic void fp_rfcomm_data_accumulator(uint8_t *ptr, uint16_t len) {\n  ASSERT((fp_accumulated_data_size + len) < sizeof(fp_accumulated_data_buf),\n         \"fp accumulcate buffer is overflow!\");\n\n  memcpy(&fp_accumulated_data_buf[fp_accumulated_data_size], ptr, len);\n  fp_accumulated_data_size += len;\n\n  uint16_t msgTotalLen;\n  FP_MESSAGE_STREAM_T *msgStream;\n\n  while (fp_accumulated_data_size >= FP_MESSAGE_RESERVED_LEN) {\n    msgStream = (FP_MESSAGE_STREAM_T *)fp_accumulated_data_buf;\n    msgTotalLen =\n        ((msgStream->dataLenHighByte << 8) | msgStream->dataLenLowByte) +\n        FP_MESSAGE_RESERVED_LEN;\n    ASSERT(msgTotalLen < sizeof(fp_accumulated_data_buf),\n           \"Wrong fp msg len %d received!\", msgTotalLen);\n    if (fp_accumulated_data_size >= msgTotalLen) {\n      fp_rfcomm_data_handler(fp_accumulated_data_buf, msgTotalLen);\n      fp_accumulated_data_size -= msgTotalLen;\n      memmove(fp_accumulated_data_buf, &fp_accumulated_data_buf[msgTotalLen],\n              fp_accumulated_data_size);\n    } else {\n      break;\n    }\n  }\n}\n\nstatic void fp_rfcomm_data_handler(uint8_t *ptr, uint16_t len) {\n  FP_MESSAGE_STREAM_T *pMsg = (FP_MESSAGE_STREAM_T *)ptr;\n  uint16_t datalen = 0;\n  TRACE(2, \"fp rfcomm receives msg group %d code %d\", pMsg->messageGroup,\n        pMsg->messageCode);\n\n  switch (pMsg->messageGroup) {\n  case FP_MSG_GROUP_DEVICE_INFO: {\n    switch (pMsg->messageCode) {\n    case FP_MSG_DEVICE_INFO_ACTIVE_COMPONENTS_REQ:\n      app_fp_msg_send_active_components_rsp();\n      break;\n    case FP_MSG_DEVICE_INFO_TELL_CAPABILITIES:\n      fp_capabilities.content = pMsg->data[0];\n      TRACE(3, \"cap 0x%x isCompanionAppInstalled %d isSilentModeSupported %d\",\n            fp_capabilities.content,\n            fp_capabilities.env.isCompanionAppInstalled,\n            fp_capabilities.env.isSilentModeSupported);\n      break;\n    default:\n      break;\n    }\n  }\n  case FP_MSG_GROUP_DEVICE_ACTION: {\n    switch (pMsg->messageCode) {\n    case FP_MSG_DEVICE_ACTION_RING:\n      datalen = (pMsg->dataLenHighByte << 8) + pMsg->dataLenLowByte;\n      fp_rfcomm_ring_request_handling(pMsg->data, datalen);\n      break;\n    default:\n      break;\n    }\n    break;\n  }\n  default:\n    break;\n  }\n}\n\nstatic int fp_rfcomm_data_received(void *pDev, uint8_t process, uint8_t *pData,\n                                   uint16_t dataLen) {\n  TRACE(1, \"%s\", __func__);\n  // DUMP8(\"0x%02x \",pData, dataLen);\n  fp_rfcomm_data_accumulator(pData, dataLen);\n  return 0;\n}\n\nstatic void fp_rfcomm_connected_handler(void) {\n  if (!fp_rfcomm_service.isConnected) {\n    fp_rfcomm_service.isConnected = true;\n\n    fp_rfcomm_reset_data_accumulator();\n    app_fp_msg_send_model_id();\n    app_fp_msg_send_updated_ble_addr();\n    app_fp_msg_send_battery_levels();\n  }\n}\n\nstatic bool fp_rfcomm_callback(RFCOMM_EVENT_E event, uint8_t instanceIndex,\n                               uint16_t connHandle, uint8_t *pBtAddr,\n                               uint8_t *pSentDataBuf, uint16_t sentDataLen) {\n  TRACE(2, \"%s,event is %d\", __func__, event);\n  switch (event) {\n  case RFCOMM_INCOMING_CONN_REQ: {\n    TRACE(0, \"Connected Indication RFComm device info:\");\n    TRACE(2, \"hci handle is 0x%x service index %d\", connHandle, instanceIndex);\n    if (pBtAddr) {\n      TRACE(0, \"Bd addr is:\");\n      DUMP8(\"%02x \", pBtAddr, 6);\n    }\n\n    fp_rfcomm_connected_handler();\n    break;\n  }\n  case RFCOMM_CONNECTED: {\n    if (pBtAddr) {\n      TRACE(0, \"Bd addr is:\");\n      DUMP8(\"%02x \", pBtAddr, 6);\n    }\n\n    fp_rfcomm_connected_handler();\n    break;\n  }\n  case RFCOMM_DISCONNECTED: {\n    TRACE(0, \"Disconnected Rfcomm device info:\");\n    TRACE(0, \"Bd addr is:\");\n    DUMP8(\"%02x \", pBtAddr, 6);\n    TRACE(1, \"hci handle is 0x%x\", connHandle);\n\n    TRACE(1, \"::RFCOMM_DISCONNECTED %d\", event);\n\n    fp_rfcomm_service.isConnected = false;\n    fp_rfcomm_reset_tx_buf();\n    break;\n  }\n  case RFCOMM_TX_DONE: {\n    TRACE(1, \"Rfcomm dataLen %d sent out\", sentDataLen);\n    fp_rfcomm_free_tx_chunk();\n    break;\n  }\n  default: {\n    TRACE(1, \"Unkown rfcomm event %d\", event);\n    break;\n  }\n  }\n\n  return true;\n}\n\nstatic void app_fp_disconnect_rfcomm_handler(void) {\n  if (fp_rfcomm_service.isConnected) {\n    app_rfcomm_close(fp_rfcomm_service.serviceIndex);\n  }\n}\n\nvoid app_fp_disconnect_rfcomm(void) {\n  app_bt_start_custom_function_in_bt_thread(\n      0, 0, (uint32_t)app_fp_disconnect_rfcomm_handler);\n}\n\nstatic void app_fp_rfcomm_send_handler(uint8_t *ptrData, uint32_t length) {\n  int8_t ret =\n      app_rfcomm_write(fp_rfcomm_service.serviceIndex, ptrData, length);\n  if (0 != ret) {\n    fp_rfcomm_free_tx_chunk();\n  }\n}\n\nvoid app_fp_rfcomm_send(uint8_t *ptrData, uint32_t length) {\n  if (!fp_rfcomm_service.isConnected) {\n    return;\n  }\n\n  int32_t chunk = fp_rfcomm_alloc_tx_chunk();\n  if (-1 == chunk) {\n    TRACE(0, \"Fast pair rfcomm tx buffer used out!\");\n    return;\n  }\n\n  ASSERT(length < FP_RFCOMM_TX_BUF_CHUNK_SIZE,\n         \"FP_RFCOMM_TX_BUF_CHUNK_SIZE is %d which is smaller than %d, need to \"\n         \"increase!\",\n         FP_RFCOMM_TX_BUF_CHUNK_SIZE, length);\n\n  uint8_t *txBufAddr = fp_rfcomm_tx_buf_addr(chunk);\n  memcpy(txBufAddr, ptrData, length);\n  app_bt_start_custom_function_in_bt_thread(\n      (uint32_t)txBufAddr, (uint32_t)length,\n      (uint32_t)app_fp_rfcomm_send_handler);\n}\n\nbt_status_t app_fp_rfcomm_init(void) {\n  TRACE(1, \"%s\", __func__);\n  bt_status_t stat = BT_STS_SUCCESS;\n\n  if (!fp_rfcomm_service.isRfcommInitialized) {\n    osMutexId mid;\n    mid = osMutexCreate(osMutex(fp_rfcomm_mutex));\n    if (!mid) {\n      ASSERT(0, \"cannot create mutex\");\n    }\n\n    fp_rfcomm_service.isRfcommInitialized = true;\n\n    RFCOMM_CONFIG_T tConfig;\n    tConfig.callback = fp_rfcomm_callback;\n    tConfig.tx_pkt_cnt = FP_RFCOMM_TX_PKT_CNT;\n    tConfig.rfcomm_128bit_uuid = FP_RFCOMM_UUID_128;\n    tConfig.rfcomm_ch = RFCOMM_CHANNEL_FP;\n    tConfig.app_id = BTIF_APP_SPP_SERVER_FP_RFCOMM_ID;\n    tConfig.spp_handle_data_event_func = fp_rfcomm_data_received;\n    tConfig.mutexId = mid;\n    tConfig.creditMutexId = osMutexCreate(osMutex(fp_rfcomm_credit_mutex));\n    int8_t index = app_rfcomm_open(&tConfig);\n\n    if (-1 == index) {\n      TRACE(0, \"fast pair rfcomm open failed\");\n      return BT_STS_FAILED;\n    }\n\n    fp_rfcomm_service.isConnected = false;\n    fp_rfcomm_service.serviceIndex = index;\n  } else {\n    TRACE(0, \"already initialized.\");\n  }\n\n  return stat;\n}\n\nbool app_is_fp_rfcomm_connected(void) { return fp_rfcomm_service.isConnected; }\n\n// use cases for fp message stream\nvoid app_fp_msg_enable_bt_silence_mode(bool isEnable) {\n  if (fp_capabilities.env.isSilentModeSupported) {\n    FP_MESSAGE_STREAM_T req = {FP_MSG_GROUP_BLUETOOTH_EVENT, 0, 0, 0};\n    if (isEnable) {\n      req.messageCode = FP_MSG_BT_EVENT_ENABLE_SILENCE_MODE;\n    } else {\n      req.messageCode = FP_MSG_BT_EVENT_DISABLE_SILENCE_MODE;\n    }\n\n    app_fp_rfcomm_send((uint8_t *)&req, FP_MESSAGE_RESERVED_LEN);\n  } else {\n    TRACE(0, \"fp silence mode is not supported.\");\n  }\n}\n\nvoid app_fp_msg_send_model_id(void) {\n  TRACE(1, \"%s\", __func__);\n#ifndef IS_USE_CUSTOM_FP_INFO\n  uint32_t model_id = 0x2B677D;\n#else\n  uint32_t model_id = app_bt_get_model_id();\n#endif\n  uint8_t modelID[3];\n  modelID[0] = (model_id >> 16) & 0xFF;\n  modelID[1] = (model_id >> 8) & 0xFF;\n  modelID[2] = (model_id)&0xFF;\n\n  uint16_t rawDataLen = sizeof(modelID);\n\n  FP_MESSAGE_STREAM_T req = {\n      FP_MSG_GROUP_DEVICE_INFO, FP_MSG_DEVICE_INFO_MODEL_ID,\n      (uint8_t)(rawDataLen >> 8), (uint8_t)(rawDataLen & 0xFF)};\n  memcpy(req.data, modelID, sizeof(modelID));\n\n  app_fp_rfcomm_send((uint8_t *)&req, FP_MESSAGE_RESERVED_LEN + rawDataLen);\n}\n\nvoid app_fp_msg_send_updated_ble_addr(void) {\n  FP_MESSAGE_STREAM_T req = {FP_MSG_GROUP_DEVICE_INFO,\n                             FP_MSG_DEVICE_INFO_BLE_ADD_UPDATED, 0, 6};\n\n  uint8_t *ptr = appm_get_current_ble_addr();\n\n  for (uint8_t index = 0; index < 6; index++) {\n    req.data[index] = ptr[5 - index];\n  }\n\n  app_fp_rfcomm_send((uint8_t *)&req, FP_MESSAGE_RESERVED_LEN + 6);\n}\n\nvoid app_fp_msg_send_battery_levels(void) {\n  TRACE(1, \"%s\", __func__);\n  FP_MESSAGE_STREAM_T req = {FP_MSG_GROUP_DEVICE_INFO,\n                             FP_MSG_DEVICE_INFO_BATTERY_UPDATED, 0, 3};\n\n  uint8_t batteryLevelCount = 0;\n  app_gfps_get_battery_levels(&batteryLevelCount, req.data);\n\n  app_fp_rfcomm_send((uint8_t *)&req, FP_MESSAGE_RESERVED_LEN + 3);\n}\n\nstatic __attribute__((unused)) void\napp_fp_msg_send_active_components_rsp(void) {\n  FP_MESSAGE_STREAM_T req = {FP_MSG_GROUP_DEVICE_INFO,\n                             FP_MSG_DEVICE_INFO_ACTIVE_COMPONENTS_RSP, 0, 1};\n\n#if defined(IBRT)\n  if (app_tws_ibrt_tws_link_connected()) {\n    req.data[0] = FP_MSG_BOTH_BUDS_ACTIVE;\n  } else {\n    if (app_tws_is_left_side()) {\n      req.data[0] = FP_MSG_LEFT_BUD_ACTIVE;\n    } else {\n      req.data[0] = FP_MSG_RIGHT_BUD_ACTIVE;\n    }\n  }\n#else\n  req.data[0] = FP_MSG_BOTH_BUDS_ACTIVE;\n#endif\n\n  app_fp_rfcomm_send((uint8_t *)&req, FP_MESSAGE_RESERVED_LEN + 1);\n}\n\nstatic __attribute__((unused)) void\napp_fp_msg_send_message_ack(uint8_t msgGroup, uint8_t msgCode) {\n  FP_MESSAGE_STREAM_T req = {FP_MSG_GROUP_ACKNOWLEDGEMENT, FP_MSG_ACK, 0, 2};\n\n  req.data[0] = msgGroup;\n  req.data[1] = msgCode;\n\n  app_fp_rfcomm_send((uint8_t *)&req, FP_MESSAGE_RESERVED_LEN + 2);\n}\n\nstatic __attribute__((unused)) void\napp_fp_msg_send_message_nak(uint8_t reason, uint8_t msgGroup, uint8_t msgCode) {\n  FP_MESSAGE_STREAM_T req = {FP_MSG_GROUP_ACKNOWLEDGEMENT, FP_MSG_NAK, 0, 3};\n\n  req.data[0] = reason;\n  req.data[1] = msgGroup;\n  req.data[2] = msgCode;\n\n  app_fp_rfcomm_send((uint8_t *)&req, FP_MESSAGE_RESERVED_LEN + 3);\n}\n"
  },
  {
    "path": "services/bt_app/app_fp_rfcomm.h",
    "content": "#ifndef __APP_FP_RFCOMM_H__\n#define __APP_FP_RFCOMM_H__\n#include \"bluetooth.h\"\n#include \n#include \n#define FP_MESSAGE_RESERVED_LEN 4 // at least 4 bytes\n// TODO: increase this value if needed\n#define FP_MESSAGE_STREAM_MAX_ADDITIONAL_DATA_LEN 16\ntypedef struct {\n  uint8_t messageGroup;\n  uint8_t messageCode;\n  uint8_t dataLenHighByte;\n  uint8_t dataLenLowByte;\n  uint8_t data[FP_MESSAGE_STREAM_MAX_ADDITIONAL_DATA_LEN];\n} __attribute__((packed)) FP_MESSAGE_STREAM_T;\n\n// The values is posted at FP spec 8/27/19 revision\n#define FP_MSG_GROUP_BLUETOOTH_EVENT 0x01\n#define FP_MSG_BT_EVENT_ENABLE_SILENCE_MODE 0x01\n#define FP_MSG_BT_EVENT_DISABLE_SILENCE_MODE 0x02\n\n#define FP_MSG_GROUP_COMPANION_APP_EVENT 0x02\n#define FP_MSG_COMPANION_APP_LOG_BUF_FULL 0x01\n\n#define FP_MSG_GROUP_DEVICE_INFO 0x03\n#define FP_MSG_DEVICE_INFO_MODEL_ID 0x01\n#define FP_MSG_DEVICE_INFO_BLE_ADD_UPDATED 0x02\n#define FP_MSG_DEVICE_INFO_BATTERY_UPDATED 0x03\n#define FP_MSG_DEVICE_INFO_REMAINING_BATTERY_TIME 0x04\n#define FP_MSG_DEVICE_INFO_ACTIVE_COMPONENTS_REQ 0x05\n#define FP_MSG_DEVICE_INFO_ACTIVE_COMPONENTS_RSP 0x06\n#define FP_MSG_DEVICE_INFO_TELL_CAPABILITIES 0x07\n#define FP_MSG_DEVICE_INFO_PLATFORM_TYPE 0x08\n\n#define FP_MSG_GROUP_DEVICE_ACTION 0x04\n#define FP_MSG_DEVICE_ACTION_RING 0x01\n\n#define FP_MSG_NEITHER_BUD_ACTIVE 0x00\n#define FP_MSG_RIGHT_BUD_ACTIVE 0x01\n#define FP_MSG_LEFT_BUD_ACTIVE 0x02\n#define FP_MSG_BOTH_BUDS_ACTIVE 0x03\n\n#define FP_MSG_GROUP_ACKNOWLEDGEMENT 0xFF\n#define FP_MSG_ACK 0x01\n#define FP_MSG_NAK 0x02\n\n#define FP_MSG_NAK_REASON_NOT_SUPPORTED 0x00\n#define FP_MSG_NAK_REASON_DEVICE_BUSY 0x01\n#define FP_MSG_NAK_REASON_NOT_ALLOWED 0x02\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_fp_rfcomm_send(uint8_t *ptrData, uint32_t length);\nbt_status_t app_fp_rfcomm_init(void);\nvoid app_fp_disconnect_rfcomm(void);\nbool app_is_fp_rfcomm_connected(void);\n\nvoid app_fp_msg_enable_bt_silence_mode(bool isEnable);\nvoid app_fp_msg_send_model_id(void);\nvoid app_fp_msg_send_updated_ble_addr(void);\nvoid app_fp_msg_send_battery_levels(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // __APP_FP_RFCOMM_H__\n"
  },
  {
    "path": "services/bt_app/app_hfp.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_battery.h\"\n#include \"app_status_ind.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#endif\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_fp_rfcomm.h\"\n#include \"app_hfp.h\"\n#include \"apps.h\"\n#include \"besbt.h\"\n#include \"bt_if.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#include \"hfp_api.h\"\n#include \"os_api.h\"\n#include \"resources.h\"\n#ifdef BT_USB_AUDIO_DUAL_MODE\n#include \"btusb_audio.h\"\n#endif\n#ifdef __THIRDPARTY\n#include \"app_thirdparty.h\"\n#endif\n\n#include \"bt_drv_interface.h\"\n\n#ifdef __IAG_BLE_INCLUDE__\n#include \"app_ble_mode_switch.h\"\n#endif\n\n#ifdef VOICE_DATAPATH\n#include \"app_voicepath.h\"\n#endif\n#include \"app.h\"\n#ifdef __AI_VOICE__\n#include \"ai_control.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_ibrt_hf.h\"\n#include \"app_ibrt_if.h\"\n#include \"app_tws_ibrt_cmd_sync_hfp_status.h\"\n#include \"besaud_api.h\"\n#endif\n\n#include \"bt_drv_reg_op.h\"\n\n#ifdef BISTO_ENABLED\n#include \"gsound_custom_bt.h\"\n#endif\n\n#if defined(__BTMAP_ENABLE__)\n#include \"app_btmap_sms.h\"\n#endif\n\n#ifdef __INTERCONNECTION__\n#define HF_COMMAND_HUAWEI_BATTERY_HEAD \"AT+HUAWEIBATTERY=\"\n#define BATTERY_REPORT_NUM 2\n#define BATTERY_REPORT_TYPE_BATTERY_LEVEL 1\n#define BATTERY_REPORT_KEY_LEFT_BATTERY_LEVEL 2\n#define BATTERY_REPORT_KEY_LEFT_CHARGE_STATE 3\nchar ATCommand[42];\nconst char *huawei_self_defined_command_response = \"+HUAWEIBATTERY=OK\";\n#endif\n\n/* hfp */\nint store_voicebtpcm_m2p_buffer(unsigned char *buf, unsigned int len);\nint get_voicebtpcm_p2m_frame(unsigned char *buf, unsigned int len);\n\nint store_voicecvsd_buffer(unsigned char *buf, unsigned int len);\nint store_voicemsbc_buffer(unsigned char *buf, unsigned int len);\n\nvoid btapp_hfp_mic_need_skip_frame_set(int32_t skip_frame);\nvoid a2dp_dual_slave_handling_refresh(void);\nvoid a2dp_dual_slave_setup_during_sco(enum BT_DEVICE_ID_T currentId);\n\nextern \"C\" bool bt_media_cur_is_bt_stream_media(void);\nbool bt_is_sco_media_open();\nextern bool app_audio_list_playback_exist(void);\n#ifdef GFPS_ENABLED\nextern \"C\" void app_exit_fastpairing_mode(void);\n#endif\n\nextern void app_bt_profile_connect_manager_hf(enum BT_DEVICE_ID_T id,\n                                              hf_chan_handle_t Chan,\n                                              struct hfp_context *ctx);\n#ifdef __BT_ONE_BRING_TWO__\nextern void hfcall_next_sta_handler(hf_event_t event);\n#endif\n#ifndef _SCO_BTPCM_CHANNEL_\nstruct hf_sendbuff_control hf_sendbuff_ctrl;\n#endif\n#ifdef __INTERACTION__\nconst char *oppo_self_defined_command_response = \"+VDSF:7\";\n#endif\n#if defined(SCO_LOOP)\n#define HF_LOOP_CNT (20)\n#define HF_LOOP_SIZE (360)\n\nstatic uint8_t hf_loop_buffer[HF_LOOP_CNT * HF_LOOP_SIZE];\nstatic uint32_t hf_loop_buffer_len[HF_LOOP_CNT];\nstatic uint32_t hf_loop_buffer_valid = 1;\nstatic uint32_t hf_loop_buffer_size = 0;\nstatic char hf_loop_buffer_w_idx = 0;\n#endif\n\nstatic void app_hfp_set_starting_media_pending_flag(bool isEnabled,\n                                                    uint8_t devId);\nvoid app_hfp_resume_pending_voice_media(void);\n\nstatic void app_hfp_mediaplay_delay_resume_timer_cb(void const *n) {\n  app_hfp_resume_pending_voice_media();\n}\n\n#define HFP_MEDIAPLAY_DELAY_RESUME_IN_MS                                       \\\n  3000 // This time must be greater than SOUND_CONNECTED play time.\nstatic void app_hfp_mediaplay_delay_resume_timer_cb(void const *n);\nosTimerDef(APP_HFP_MEDIAPLAY_DELAY_RESUME_TIMER,\n           app_hfp_mediaplay_delay_resume_timer_cb);\nosTimerId app_hfp_mediaplay_delay_resume_timer_id = NULL;\n\n#ifdef __IAG_BLE_INCLUDE__\nstatic void app_hfp_resume_ble_adv(void);\n#endif\n\n#define HFP_AUDIO_CLOSED_DELAY_RESUME_ADV_IN_MS 1500\nstatic void app_hfp_audio_closed_delay_resume_ble_adv_timer_cb(void const *n);\nosTimerDef(APP_HFP_AUDIO_CLOSED_DELAY_RESUME_BLE_ADV_TIMER,\n           app_hfp_audio_closed_delay_resume_ble_adv_timer_cb);\nosTimerId app_hfp_audio_closed_delay_resume_ble_adv_timer_id = NULL;\n\nextern struct BT_DEVICE_T app_bt_device;\n\n#if defined(SUPPORT_BATTERY_REPORT) || defined(SUPPORT_HF_INDICATORS)\n#ifdef __BT_ONE_BRING_TWO__\nstatic uint8_t battery_level[BT_DEVICE_NUM] = {0xff, 0xff};\n#else\nstatic uint8_t battery_level[BT_DEVICE_NUM] = {0xff};\n#endif\n\nstatic uint8_t report_battery_level = 0xff;\nvoid app_hfp_set_battery_level(uint8_t level) {\n  osapi_lock_stack();\n  if (report_battery_level == 0xff) {\n    report_battery_level = level;\n    osapi_notify_evm();\n  }\n  osapi_unlock_stack();\n}\n\nint app_hfp_battery_report_reset(uint8_t bt_device_id) {\n  ASSERT(bt_device_id < BT_DEVICE_NUM, \"bt_device_id error\");\n  battery_level[bt_device_id] = 0xff;\n  return 0;\n}\n\n#ifdef __INTERACTION_CUSTOMER_AT_COMMAND__\n#define HF_COMMAND_BATTERY_HEAD \"AT+VDBTY=\"\n#define HF_COMMAND_VERSION_HEAD \"AT+VDRV=\"\n#define HF_COMMAND_FEATURE_HEAD \"AT+VDSF=\"\n#define REPORT_NUM 3\n#define LEFT_UNIT_REPORT 1\n#define RIGHT_UNIT_REPORT 2\n#define BOX_REPORT 3\nchar ATCommand[42];\n\nbt_status_t Send_customer_battery_report_AT_command(hf_chan_handle_t chan_h,\n                                                    uint8_t level) {\n  TRACE(0, \"Send battery report at commnad.\");\n  /// head and keyNumber\n  sprintf(ATCommand, \"%s%d\", HF_COMMAND_BATTERY_HEAD, REPORT_NUM);\n  /// keys and corresponding values\n  sprintf(ATCommand, \"%s,%d,%d,%d,%d,%d,%d\\r\", ATCommand, LEFT_UNIT_REPORT,\n          level, RIGHT_UNIT_REPORT, level, BOX_REPORT, 9);\n  /// send AT command\n  return btif_hf_send_at_cmd(chan_h, ATCommand);\n}\n\nbt_status_t\nSend_customer_phone_feature_support_AT_command(hf_chan_handle_t chan_h,\n                                               uint8_t val) {\n  TRACE(0, \"Send_customer_phone_feature_support_AT_command.\");\n  /// keys and corresponding values\n  sprintf(ATCommand, \"%s%d\\r\", HF_COMMAND_FEATURE_HEAD, val);\n  /// send AT command\n  return btif_hf_send_at_cmd(chan_h, ATCommand);\n}\n\nbt_status_t Send_customer_version_report_AT_command(hf_chan_handle_t chan_h) {\n  TRACE(0, \"Send version report at commnad.\");\n  /// head and keyNumber\n  sprintf(ATCommand, \"%s%d\", HF_COMMAND_VERSION_HEAD, REPORT_NUM);\n  /// keys and corresponding values\n  sprintf(ATCommand, \"%s,%d,%d,%d,%d,%d,%d\\r\", ATCommand, LEFT_UNIT_REPORT,\n          0x1111, RIGHT_UNIT_REPORT, 0x2222, BOX_REPORT, 0x3333);\n  /// send AT command\n  return btif_hf_send_at_cmd(chan_h, ATCommand);\n}\n#endif\n\n#ifdef __INTERCONNECTION__\nuint8_t ask_is_selfdefined_battery_report_AT_command_support(void) {\n  TRACE(0, \"ask if mobile support self-defined at commnad.\");\n  uint8_t *pSelfDefinedCommandSupport =\n      app_battery_get_mobile_support_self_defined_command_p();\n  *pSelfDefinedCommandSupport = 0;\n\n  sprintf(ATCommand, \"%s?\", HF_COMMAND_HUAWEI_BATTERY_HEAD);\n  btif_hf_send_at_cmd(\n      (hf_chan_handle_t)app_bt_device.hf_channel[BT_DEVICE_ID_1], ATCommand);\n\n  return 0;\n}\n\nuint8_t send_selfdefined_battery_report_AT_command(void) {\n  uint8_t *pSelfDefinedCommandSupport =\n      app_battery_get_mobile_support_self_defined_command_p();\n  uint8_t batteryInfo = 0;\n\n  if (*pSelfDefinedCommandSupport) {\n    app_battery_get_info(NULL, &batteryInfo, NULL);\n\n    /// head and keyNumber\n    sprintf(ATCommand, \"%s%d\", HF_COMMAND_HUAWEI_BATTERY_HEAD,\n            BATTERY_REPORT_NUM);\n\n    /// keys and corresponding values\n    sprintf(ATCommand, \"%s,%d,%d,%d,%d\", ATCommand,\n            BATTERY_REPORT_KEY_LEFT_BATTERY_LEVEL, batteryInfo & 0x7f,\n            BATTERY_REPORT_KEY_LEFT_CHARGE_STATE, (batteryInfo & 0x80) ? 1 : 0);\n\n    /// send AT command\n    btif_hf_send_at_cmd(\n        (hf_chan_handle_t)app_bt_device.hf_channel[BT_DEVICE_ID_1], ATCommand);\n  }\n  return 0;\n}\n#endif\n\nint app_hfp_battery_report(uint8_t level) {\n  // Care: BT_DEVICE_NUM<-->{0xff, 0xff, ...}\n  bt_status_t status = BT_STS_LAST_CODE;\n  hf_chan_handle_t chan;\n\n  uint8_t i;\n  int nRet = 0;\n\n  if (level > 9)\n    return -1;\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    chan = app_bt_device.hf_channel[i];\n    if (btif_get_hf_chan_state(chan) == BTIF_HF_STATE_OPEN) {\n      if (btif_hf_is_hf_indicators_support(chan)) {\n        if (battery_level[i] != level) {\n          uint8_t assigned_num = 2; /// battery level assigned num:2\n          status =\n              btif_hf_update_indicators_batt_level(chan, assigned_num, level);\n        }\n      } else if (btif_hf_is_batt_report_support(chan)) {\n        if (battery_level[i] != level) {\n#ifdef GFPS_ENABLED\n          app_fp_msg_send_battery_levels();\n#endif\n#ifdef __INTERACTION_CUSTOMER_AT_COMMAND__\n          status = Send_customer_battery_report_AT_command(chan, level);\n#endif\n          status = btif_hf_batt_report(chan, level);\n        }\n      }\n      if (BT_STS_PENDING == status) {\n        battery_level[i] = level;\n      } else {\n        nRet = -1;\n      }\n    } else {\n      battery_level[i] = 0xff;\n      nRet = -1;\n    }\n  }\n  return nRet;\n}\n\nvoid app_hfp_battery_report_proc(void) {\n  osapi_lock_stack();\n\n  if (report_battery_level != 0xff) {\n    app_hfp_battery_report(report_battery_level);\n    report_battery_level = 0xff;\n  }\n  osapi_unlock_stack();\n}\n\nbt_status_t app_hfp_send_at_command(const char *cmd) {\n  bt_status_t ret = 0;\n  // send AT command\n  ret = btif_hf_send_at_cmd(\n      (hf_chan_handle_t)app_bt_device.hf_channel[BT_DEVICE_ID_1], cmd);\n\n  return ret;\n}\n\n#endif\n\nvoid a2dp_get_curStream_remDev(btif_remote_device_t **p_remDev);\n\nbool app_hfp_curr_audio_up(hf_chan_handle_t hfp_chnl) {\n  int i = 0;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (app_bt_device.hf_channel[i] == hfp_chnl) {\n      return app_bt_device.hf_conn_flag[i] &&\n             app_bt_device.hf_audio_state[i] == BTIF_HF_AUDIO_CON;\n    }\n  }\n  return false;\n}\n\nuint8_t app_hfp_get_chnl_via_remDev(hf_chan_handle_t *p_hfp_chnl) {\n  uint8_t i = 0;\n\n#ifdef __BT_ONE_BRING_TWO__\n  btif_remote_device_t *p_a2dp_remDev;\n  btif_remote_device_t *p_hfp_remDev;\n\n  a2dp_get_curStream_remDev(&p_a2dp_remDev);\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    p_hfp_remDev = (btif_remote_device_t *)btif_hf_cmgr_get_remote_device(\n        app_bt_device.hf_channel[i]);\n    if (p_hfp_remDev == p_a2dp_remDev)\n      break;\n  }\n  if (i != BT_DEVICE_NUM)\n    *p_hfp_chnl = app_bt_device.hf_channel[i];\n#else\n  i = BT_DEVICE_ID_1;\n  *p_hfp_chnl = app_bt_device.hf_channel[i];\n#endif\n  return i;\n}\n\n#ifdef SUPPORT_SIRI\nint app_hfp_siri_report() {\n  uint8_t i;\n  bt_status_t status = BT_STS_LAST_CODE;\n  hf_chan_handle_t chan;\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    chan = app_bt_device.hf_channel[i];\n    if (btif_get_hf_chan_state(chan) == BTIF_HF_STATE_OPEN) {\n      status = btif_hf_siri_report(chan);\n      if (status == BT_STS_PENDING) {\n        return 0;\n      } else {\n        return -1;\n      }\n    }\n  }\n  return 0;\n}\n\nextern int open_siri_flag;\nint app_hfp_siri_voice(bool en) {\n  static enum BT_DEVICE_ID_T hf_id = BT_DEVICE_ID_1;\n  bt_status_t res = BT_STS_LAST_CODE;\n\n  hf_chan_handle_t POSSIBLY_UNUSED hf_siri_chnl = NULL;\n  if (open_siri_flag == 1) {\n    if (btif_hf_is_voice_rec_active(app_bt_device.hf_channel[hf_id]) == false) {\n      open_siri_flag = 0;\n      TRACE(0, \"end auto\");\n    } else {\n      TRACE(0, \"need close\");\n      en = false;\n    }\n  }\n  if (open_siri_flag == 0) {\n    if (btif_hf_is_voice_rec_active(app_bt_device.hf_channel[BT_DEVICE_ID_1]) ==\n        true) {\n      TRACE(0, \"1 ->close\");\n      hf_id = BT_DEVICE_ID_1;\n      en = false;\n      hf_siri_chnl = app_bt_device.hf_channel[BT_DEVICE_ID_1];\n    }\n#ifdef __BT_ONE_BRING_TWO__\n    else if (btif_hf_is_voice_rec_active(\n                 app_bt_device.hf_channel[BT_DEVICE_ID_2]) == true) {\n      TRACE(0, \"2->close\");\n      hf_id = BT_DEVICE_ID_2;\n      en = false;\n      hf_siri_chnl = app_bt_device.hf_channel[BT_DEVICE_ID_2];\n    }\n#endif\n    else {\n      open_siri_flag = 1;\n      en = true;\n#ifdef __BT_ONE_BRING_TWO__\n      hf_id = (enum BT_DEVICE_ID_T)app_hfp_get_chnl_via_remDev(&hf_siri_chnl);\n#else\n      hf_id = BT_DEVICE_ID_1;\n#endif\n      TRACE(1, \"a2dp id = %d\", hf_id);\n    }\n  }\n  TRACE(4, \"[%s]id =%d/%d/%d\", __func__, hf_id, open_siri_flag, en);\n  if (hf_id == BT_DEVICE_NUM)\n    hf_id = BT_DEVICE_ID_1;\n\n  if ((btif_get_hf_chan_state(app_bt_device.hf_channel[hf_id]) ==\n       BTIF_HF_STATE_OPEN)) {\n    res = btif_hf_enable_voice_recognition(app_bt_device.hf_channel[hf_id], en);\n  }\n\n  TRACE(3, \"[%s] Line =%d, res = %d\", __func__, __LINE__, res);\n\n  return 0;\n}\n#endif\n\n#define _THREE_WAY_ONE_CALL_COUNT__ 1\n#ifdef _THREE_WAY_ONE_CALL_COUNT__\nstatic enum BT_DEVICE_ID_T hfp_cur_call_chnl = BT_DEVICE_NUM;\nstatic int8_t cur_chnl_call_on_active[BT_DEVICE_NUM] = {0};\nint app_bt_get_audio_up_id(void);\n\nvoid app_hfp_3_way_call_counter_set(enum BT_DEVICE_ID_T id, uint8_t set) {\n  if (set > 0) {\n    cur_chnl_call_on_active[id]++;\n    if (cur_chnl_call_on_active[id] > BT_DEVICE_NUM)\n      cur_chnl_call_on_active[id] = 2;\n  } else {\n    cur_chnl_call_on_active[id]--;\n    if (cur_chnl_call_on_active[id] < 0)\n      cur_chnl_call_on_active[id] = 0;\n    if (app_bt_device.hfchan_call[id] == 1)\n      cur_chnl_call_on_active[id] = 1;\n  }\n  TRACE(1, \"call_on_active = %d\", cur_chnl_call_on_active[id]);\n}\n\nvoid app_hfp_set_cur_chnl_id(uint8_t id) {\n  if (hfp_cur_call_chnl == BT_DEVICE_NUM) {\n    hfp_cur_call_chnl = (enum BT_DEVICE_ID_T)id;\n    cur_chnl_call_on_active[id] = 1;\n  }\n  TRACE(3, \"%s    hfp_cur_call_chnl = %d    id=%d\", __func__, hfp_cur_call_chnl,\n        id);\n}\n\nuint8_t app_hfp_get_cur_call_chnl(void **chnl) {\n  TRACE(2, \"%s    hfp_cur_call_chnl = %d\", __func__, hfp_cur_call_chnl);\n  if (hfp_cur_call_chnl != BT_DEVICE_NUM) {\n    return hfp_cur_call_chnl;\n  }\n  return BT_DEVICE_NUM;\n}\n\nvoid app_hfp_clear_cur_call_chnl(enum BT_DEVICE_ID_T id) {\n  hfp_cur_call_chnl = BT_DEVICE_NUM;\n  cur_chnl_call_on_active[id] = 0;\n  TRACE(2, \"%s    id= %d\", __func__, id);\n}\n\nvoid app_hfp_cur_call_chnl_reset(enum BT_DEVICE_ID_T id) {\n  if (id == hfp_cur_call_chnl)\n    hfp_cur_call_chnl = BT_DEVICE_NUM;\n  TRACE(3, \"%s hfp_cur_call_chnl = %d    id=%d\", __func__, hfp_cur_call_chnl,\n        id);\n}\n\nbool app_hfp_cur_chnl_is_on_3_way_calling(void) {\n  uint8_t i = 0;\n  TRACE(1, \"hfp_cur_call_chnl = %d\", hfp_cur_call_chnl);\n#ifdef __BT_ONE_BRING_TWO__\n  TRACE(2, \"cur_chnl_call_on_active[0] = %d  [1] = %d\",\n        cur_chnl_call_on_active[0], cur_chnl_call_on_active[1]);\n#else\n  TRACE(1, \"cur_chnl_call_on_active[0] = %d\", cur_chnl_call_on_active[0]);\n#endif\n  if (hfp_cur_call_chnl == BT_DEVICE_NUM)\n    return false;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (cur_chnl_call_on_active[i] > 1) {\n      break;\n    }\n  }\n  if (i == BT_DEVICE_NUM)\n    return false;\n  return true;\n}\n#endif\n#if defined(__BTIF_EARPHONE__)\nstatic void hfp_app_status_indication(enum BT_DEVICE_ID_T chan_id,\n                                      struct hfp_context *ctx) {\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T chan_id_other =\n      (chan_id == BT_DEVICE_ID_1) ? (BT_DEVICE_ID_2) : (BT_DEVICE_ID_1);\n#else\n  enum BT_DEVICE_ID_T chan_id_other = BT_DEVICE_ID_1;\n#endif\n  switch (ctx->event) {\n  /*\n  case HF_EVENT_SERVICE_CONNECTED:\n      break;\n  case HF_EVENT_SERVICE_DISCONNECTED:\n      break;\n      */\n  case BTIF_HF_EVENT_CURRENT_CALL_STATE:\n    TRACE(2, \"!!!HF_EVENT_CURRENT_CALL_STATE  chan_id:%d, call_number:%s\\n\",\n          chan_id, ctx->call_number);\n    if (app_bt_device.hfchan_callSetup[chan_id] == BTIF_HF_CALL_SETUP_IN) {\n      //////report incoming call number\n      // app_status_set_num(ctx->call_number);\n#ifdef __BT_WARNING_TONE_MERGE_INTO_STREAM_SBC__\n      app_voice_report(APP_STATUS_RING_WARNING, chan_id);\n#endif\n    }\n    break;\n  case BTIF_HF_EVENT_CALL_IND:\n    if (ctx->call == BTIF_HF_CALL_NONE &&\n        app_bt_device.hfchan_call[chan_id] == BTIF_HF_CALL_ACTIVE) {\n      //////report call hangup voice\n      TRACE(1,\n            \"!!!HF_EVENT_CALL_IND  APP_STATUS_INDICATION_HANGUPCALL  \"\n            \"chan_id:%d\\n\",\n            chan_id);\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP_MEDIA,\n                                    BT_STREAM_VOICE, chan_id, 0);\n      /// disable media prompt\n      if (app_bt_device.hf_endcall_dis[chan_id] == false) {\n        TRACE(0, \"HANGUPCALL PROMPT\");\n        // app_voice_report(APP_STATUS_INDICATION_HANGUPCALL,chan_id);\n      }\n#if defined(_THREE_WAY_ONE_CALL_COUNT__)\n      if (app_hfp_get_cur_call_chnl(NULL) == chan_id) {\n        app_hfp_clear_cur_call_chnl(chan_id);\n      }\n#endif\n    }\n#if defined(_THREE_WAY_ONE_CALL_COUNT__)\n    else if ((ctx->call == BTIF_HF_CALL_ACTIVE) &&\n             (app_bt_get_audio_up_id() == chan_id)) {\n      app_hfp_set_cur_chnl_id(chan_id);\n    }\n#endif\n    break;\n  case BTIF_HF_EVENT_CALLSETUP_IND:\n    if (ctx->call_setup == BTIF_HF_CALL_SETUP_NONE &&\n        (app_bt_device.hfchan_call[chan_id] != BTIF_HF_CALL_ACTIVE) &&\n        (app_bt_device.hfchan_callSetup[chan_id] != BTIF_HF_CALL_SETUP_NONE)) {\n      ////check the call refuse and stop media of (ring and call number)\n      TRACE(1,\n            \"!!!HF_EVENT_CALLSETUP_IND  APP_STATUS_INDICATION_REFUSECALL  \"\n            \"chan_id:%d\\n\",\n            chan_id);\n#if 0 // def __BT_ONE_BRING_TWO__\n                if (app_bt_device.hf_audio_state[chan_id_other] == BTIF_HF_AUDIO_DISCON){\n                    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP_MEDIA,BT_STREAM_VOICE,chan_id,0);\n                    app_voice_report(APP_STATUS_INDICATION_REFUSECALL,chan_id);\n                }\n#else\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP_MEDIA,\n                                    BT_STREAM_VOICE, chan_id, 0);\n#if !defined(IBRT) && defined(MEDIA_PLAYER_SUPPORT)\n      app_voice_report(APP_STATUS_INDICATION_REFUSECALL,\n                       chan_id); /////////////du����\n#endif\n#endif\n      if ((app_bt_device.hfchan_call[chan_id_other] == BTIF_HF_CALL_ACTIVE) &&\n          (app_bt_device.hf_audio_state[chan_id_other] == BTIF_HF_AUDIO_CON)) {\n        app_bt_device.curr_hf_channel_id = chan_id_other;\n      }\n    } else if (ctx->call_setup == BTIF_HF_CALL_SETUP_NONE &&\n               (app_bt_device.hfchan_callSetup[chan_id] !=\n                BTIF_HF_CALL_SETUP_NONE) &&\n               (app_bt_device.hfchan_call[chan_id] == BTIF_HF_CALL_ACTIVE)) {\n      TRACE(1,\n            \"!!!HF_EVENT_CALLSETUP_IND  APP_STATUS_INDICATION_ANSWERCALL but \"\n            \"noneed sco chan_id:%d\\n\",\n            chan_id);\n#ifdef _THREE_WAY_ONE_CALL_COUNT__\n      if (app_bt_device.hf_callheld[chan_id] == BTIF_HF_CALL_HELD_NONE) {\n        if (app_hfp_get_cur_call_chnl(NULL) == chan_id) {\n          app_hfp_3_way_call_counter_set(chan_id, 0);\n        }\n      }\n#endif /* _THREE_WAY_ONE_CALL_COUNT__ */\n\n#ifdef MEDIA_PLAYER_SUPPORT\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP_MEDIA,\n                                    BT_STREAM_MEDIA, chan_id, 0);\n#endif\n    }\n#if defined(_THREE_WAY_ONE_CALL_COUNT__)\n    else if ((ctx->call_setup != BTIF_HF_CALL_SETUP_NONE) &&\n             (app_bt_device.hfchan_call[chan_id] == BTIF_HF_CALL_ACTIVE)) {\n      if (app_hfp_get_cur_call_chnl(NULL) == chan_id) {\n        app_hfp_3_way_call_counter_set(chan_id, 1);\n      }\n    }\n#endif\n    break;\n    /*\ncase HF_EVENT_AUDIO_CONNECTED:\n    TRACE(1,\"!!!HF_EVENT_AUDIO_CONNECTED  APP_STATUS_INDICATION_ANSWERCALL\nchan_id:%d\\n\",chan_id);\n  //\napp_voice_report(APP_STATUS_INDICATION_ANSWERCALL,chan_id);//////////////duһ��\n    break;\n    */\n  case BTIF_HF_EVENT_RING_IND:\n#ifdef MEDIA_PLAYER_SUPPORT\n    app_voice_report(APP_STATUS_INDICATION_INCOMINGCALL, chan_id);\n#endif\n    break;\n  default:\n    break;\n  }\n}\n#endif\n\nstruct BT_DEVICE_ID_DIFF chan_id_flag;\n#ifdef __BT_ONE_BRING_TWO__\nvoid hfp_chan_id_distinguish(hf_chan_handle_t chan) {\n  if (chan == app_bt_device.hf_channel[BT_DEVICE_ID_1]) {\n    chan_id_flag.id = BT_DEVICE_ID_1;\n  } else if (chan == app_bt_device.hf_channel[BT_DEVICE_ID_2]) {\n    chan_id_flag.id = BT_DEVICE_ID_2;\n  }\n}\n#endif\n\nint hfp_volume_get(enum BT_DEVICE_ID_T id) {\n  int vol = TGT_VOLUME_LEVEL_15;\n\n  nvrec_btdevicerecord *record = NULL;\n  bt_bdaddr_t bdAdd;\n  if (btif_hf_get_remote_bdaddr(app_bt_device.hf_channel[id], &bdAdd) &&\n      !nv_record_btdevicerecord_find(&bdAdd, &record)) {\n    vol = record->device_vol.hfp_vol - 2;\n  } else if (app_audio_manager_hfp_is_active(id)) {\n    vol = app_bt_stream_hfpvolume_get() - 2;\n  } else {\n    vol = TGT_VOLUME_LEVEL_15;\n  }\n\n  if (vol > 15)\n    vol = 15;\n  if (vol < 0)\n    vol = 0;\n\n#ifndef BES_AUTOMATE_TEST\n  TRACE(2, \"hfp get vol raw:%d loc:%d\", vol, vol + 2);\n#endif\n  return (vol);\n}\n\nvoid hfp_volume_local_set(enum BT_DEVICE_ID_T id, int8_t vol) {\n  nvrec_btdevicerecord *record = NULL;\n  bt_bdaddr_t bdAdd;\n  if (btif_hf_get_remote_bdaddr(app_bt_device.hf_channel[id], &bdAdd)) {\n    if (!nv_record_btdevicerecord_find(&bdAdd, &record)) {\n      nv_record_btdevicerecord_set_hfp_vol(record, vol);\n    }\n  }\n\n  if (app_bt_stream_volume_get_ptr()->hfp_vol != vol) {\n#if defined(NEW_NV_RECORD_ENABLED)\n    nv_record_btdevicevolume_set_hfp_vol(app_bt_stream_volume_get_ptr(), vol);\n#endif\n    nv_record_touch_cause_flush();\n  }\n}\n\nint hfp_volume_set(enum BT_DEVICE_ID_T id, int vol) {\n  if (vol > 15)\n    vol = 15;\n  if (vol < 0)\n    vol = 0;\n\n  hfp_volume_local_set(id, vol + 2);\n  if (app_audio_manager_hfp_is_active(id)) {\n    app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_SET, vol + 2);\n  }\n\n  TRACE(2, \"hfp put vol raw:%d loc:%d\", vol, vol + 2);\n  return 0;\n}\n\nstatic uint8_t call_setup_running_on = 0;\nvoid hfp_call_setup_running_on_set(uint8_t set) { call_setup_running_on = set; }\n\nvoid hfp_call_setup_running_on_clr(void) { call_setup_running_on = 0; }\n\nuint8_t hfp_get_call_setup_running_on_state(void) {\n  TRACE(2, \"%s state = %d\", __func__, call_setup_running_on);\n  return call_setup_running_on;\n}\n\nstatic void hfp_connected_ind_handler(hf_chan_handle_t chan,\n                                      struct hfp_context *ctx) {\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T anotherDevice =\n      (BT_DEVICE_ID_1 == chan_id_flag.id) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n\n#ifdef GFPS_ENABLED\n  app_exit_fastpairing_mode();\n#endif\n\n  app_bt_clear_connecting_profiles_state(chan_id_flag.id);\n\n  TRACE(1, \"::HF_EVENT_SERVICE_CONNECTED  Chan_id:%d\\n\", chan_id_flag.id);\n  app_bt_device.phone_earphone_mark = 1;\n\n#if defined(__BTIF_EARPHONE__)\n  if (ctx->state == BTIF_HF_STATE_OPEN) {\n    ////report connected voice\n    app_bt_device.hf_conn_flag[chan_id_flag.id] = 1;\n  }\n#endif\n#if defined(SUPPORT_BATTERY_REPORT) || defined(SUPPORT_HF_INDICATORS)\n  uint8_t battery_level;\n  app_hfp_battery_report_reset(chan_id_flag.id);\n  app_battery_get_info(NULL, &battery_level, NULL);\n  app_hfp_set_battery_level(battery_level);\n#endif\n  //        app_bt_stream_hfpvolume_reset();\n  btif_hf_report_speaker_volume(chan, hfp_volume_get(chan_id_flag.id));\n\n#if defined(HFP_DISABLE_NREC)\n  btif_hf_disable_nrec(chan);\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n  ////if a call is active and start bt open reconnect procedure, process the\n  /// curr_hf_channel_id\n  if ((app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_CON) ||\n      (app_bt_device.hfchan_callSetup[anotherDevice] ==\n       BTIF_HF_CALL_SETUP_IN)) {\n    app_bt_device.curr_hf_channel_id = anotherDevice;\n  } else {\n    app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n  }\n#endif\n\n#if defined(__BTMAP_ENABLE__) && defined(BTIF_DIP_DEVICE)\n  if ((btif_dip_get_process_status(app_bt_get_remoteDev(chan_id_flag.id))) &&\n      (app_btmap_check_is_idle(chan_id_flag.id))) {\n    app_btmap_sms_open(chan_id_flag.id, &ctx->remote_dev_bdaddr);\n  }\n#endif\n\n  app_bt_profile_connect_manager_hf(chan_id_flag.id, chan, ctx);\n#ifdef __INTERCONNECTION__\n  ask_is_selfdefined_battery_report_AT_command_support();\n#endif\n#ifdef __INTERACTION_CUSTOMER_AT_COMMAND__\n  Send_customer_phone_feature_support_AT_command(chan, 7);\n  Send_customer_battery_report_AT_command(chan, battery_level);\n#endif\n}\n\nstatic void hfp_disconnected_ind_handler(hf_chan_handle_t chan,\n                                         struct hfp_context *ctx) {\n  TRACE(2, \"::HF_EVENT_SERVICE_DISCONNECTED Chan_id:%d, reason=%x\\n\",\n        chan_id_flag.id, ctx->disc_reason);\n#if defined(HFP_1_6_ENABLE)\n  btif_hf_set_negotiated_codec(chan, BTIF_HF_SCO_CODEC_CVSD);\n#endif\n#if defined(__BTIF_EARPHONE__)\n  if (app_bt_device.hf_conn_flag[chan_id_flag.id]) {\n    ////report device disconnected voice\n    app_bt_device.hf_conn_flag[chan_id_flag.id] = 0;\n  }\n#endif\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                chan_id_flag.id, MAX_RECORD_NUM);\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    if (chan == app_bt_device.hf_channel[i]) {\n      app_bt_device.hfchan_call[i] = 0;\n      app_bt_device.hfchan_callSetup[i] = 0;\n      app_bt_device.hf_audio_state[i] = BTIF_HF_AUDIO_DISCON;\n      app_bt_device.hf_conn_flag[i] = 0;\n      app_bt_device.hf_voice_en[i] = 0;\n    }\n  }\n\n  app_bt_profile_connect_manager_hf(chan_id_flag.id, chan, ctx);\n}\nstatic void hfp_audio_data_sent_handler(hf_chan_handle_t chan,\n                                        struct hfp_context *ctx) {\n#if defined(SCO_LOOP)\n  hf_loop_buffer_valid = 1;\n#endif\n}\n\nstatic void hfp_audio_data_handler(hf_chan_handle_t chan,\n                                   struct hfp_context *ctx) {\n#ifdef __BT_ONE_BRING_TWO__\n  if (app_bt_device.hf_voice_en[chan_id_flag.id]) {\n#endif\n\n#ifndef _SCO_BTPCM_CHANNEL_\n    uint32_t idx = 0;\n    if (app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM)) {\n      store_voicebtpcm_m2p_buffer(ctx->audio_data, ctx->audio_data_len);\n\n      idx = hf_sendbuff_ctrl.index % HF_SENDBUFF_MEMPOOL_NUM;\n      get_voicebtpcm_p2m_frame(&(hf_sendbuff_ctrl.mempool[idx].buffer[0]),\n                               ctx->audio_data_len);\n      hf_sendbuff_ctrl.mempool[idx].packet.data =\n          &(hf_sendbuff_ctrl.mempool[idx].buffer[0]);\n      hf_sendbuff_ctrl.mempool[idx].packet.dataLen = ctx->audio_data_len;\n      hf_sendbuff_ctrl.mempool[idx].packet.flags = BTIF_BTP_FLAG_NONE;\n      if (!app_bt_device.hf_mute_flag) {\n        btif_hf_send_audio_data(chan, &hf_sendbuff_ctrl.mempool[idx].packet);\n      }\n      hf_sendbuff_ctrl.index++;\n    }\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n  }\n#endif\n\n#if defined(SCO_LOOP)\n  memcpy(hf_loop_buffer + hf_loop_buffer_w_idx * HF_LOOP_SIZE,\n         Info->p.audioData->data, Info->p.audioData->len);\n  hf_loop_buffer_len[hf_loop_buffer_w_idx] = Info->p.audioData->len;\n  hf_loop_buffer_w_idx = (hf_loop_buffer_w_idx + 1) % HF_LOOP_CNT;\n  ++hf_loop_buffer_size;\n\n  if (hf_loop_buffer_size >= 18 && hf_loop_buffer_valid == 1) {\n    hf_loop_buffer_valid = 0;\n    idx = hf_loop_buffer_w_idx - 17 < 0\n              ? (HF_LOOP_CNT - (17 - hf_loop_buffer_w_idx))\n              : hf_loop_buffer_w_idx - 17;\n    pkt.flags = BTP_FLAG_NONE;\n    pkt.dataLen = hf_loop_buffer_len[idx];\n    pkt.data = hf_loop_buffer + idx * HF_LOOP_SIZE;\n    HF_SendAudioData(Chan, &pkt);\n  }\n#endif\n}\n\nstatic void hfp_call_ind_handler(hf_chan_handle_t chan,\n                                 struct hfp_context *ctx) {\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T anotherDevice =\n      (BT_DEVICE_ID_1 == chan_id_flag.id) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n  TRACE(8,\n        \"::HF_EVENT_CALL_IND %d chan_id %dx call %d %d held %d %d audio_state \"\n        \"%d %d\\n\",\n        ctx->call, chan_id_flag.id, app_bt_device.hfchan_call[BT_DEVICE_ID_1],\n        app_bt_device.hfchan_call[BT_DEVICE_ID_2],\n        app_bt_device.hf_callheld[BT_DEVICE_ID_1],\n        app_bt_device.hf_callheld[BT_DEVICE_ID_2],\n        app_bt_device.hf_audio_state[BT_DEVICE_ID_1],\n        app_bt_device.hf_audio_state[BT_DEVICE_ID_2]);\n#else\n  TRACE(2, \"::HF_EVENT_CALL_IND  chan_id:%d, call:%d\\n\", chan_id_flag.id,\n        ctx->call);\n#endif\n  if (ctx->call == BTIF_HF_CALL_NONE) {\n    hfp_call_setup_running_on_clr();\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"Call hangup ok.\");\n#endif\n    app_bt_device.hf_callheld[chan_id_flag.id] = BTIF_HF_CALL_HELD_NONE;\n  } else if (ctx->call == BTIF_HF_CALL_ACTIVE) {\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"Call setup ok.\");\n#endif\n\n    /// call is active so check if it's a outgoing call\n    if (app_bt_device.hfchan_callSetup[chan_id_flag.id] ==\n        BTIF_HF_CALL_SETUP_ALERT) {\n      TRACE(1, \"HF CALLACTIVE TIME=%d\", hal_sys_timer_get());\n      if (TICKS_TO_MS(hal_sys_timer_get() -\n                      app_bt_device.hf_callsetup_time[chan_id_flag.id]) <\n          1000) {\n        TRACE(0, \"DISABLE HANGUPCALL PROMPT\");\n        app_bt_device.hf_endcall_dis[chan_id_flag.id] = true;\n      }\n    }\n    /////stop media of (ring and call number) and switch to sco\n#if defined(HFP_NO_PRERMPT)\n    if (app_bt_device.hfchan_call[anotherDevice] == BTIF_HF_CALL_ACTIVE) {\n    } else\n#endif\n    {\n#ifdef __BT_ONE_BRING_TWO__\n      TRACE(1, \"%s another %d,hf_callheld %d\", __func__, anotherDevice,\n            app_bt_device.hf_callheld[anotherDevice]);\n      if ((btapp_hfp_get_call_state()) &&\n          (app_bt_device.hf_callheld[anotherDevice] == BTIF_HF_CALL_HELD_NONE))\n#else\n      if (btapp_hfp_get_call_state())\n#endif\n      {\n        TRACE(0, \"DON'T SIWTCH_TO_SCO\");\n        app_bt_device.hfchan_call[chan_id_flag.id] = ctx->call;\n        return;\n      } else {\n#ifndef ENABLE_HFP_AUDIO_PENDING_FOR_MEDIA\n        app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_SWITCHTO_SCO,\n                                      BT_STREAM_VOICE, chan_id_flag.id, 0);\n#endif\n      }\n    }\n  } else {\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"Call hangup ok.\");\n#endif\n  }\n\n#if defined(__BTIF_EARPHONE__)\n  hfp_app_status_indication(chan_id_flag.id, ctx);\n#endif\n\n  if (ctx->call == BTIF_HF_CALL_ACTIVE) {\n#if defined(HFP_NO_PRERMPT)\n#else\n    app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n#endif\n  }\n#ifdef __BT_ONE_BRING_TWO__\n  else if ((ctx->call == BTIF_HF_CALL_NONE) &&\n           ((app_bt_device.hfchan_call[anotherDevice] == BTIF_HF_CALL_ACTIVE) ||\n            (app_bt_device.hfchan_callSetup[anotherDevice] ==\n             BTIF_HF_CALL_SETUP_IN) ||\n            (app_bt_device.hfchan_callSetup[anotherDevice] ==\n             BTIF_HF_CALL_SETUP_OUT) ||\n            (app_bt_device.hfchan_callSetup[anotherDevice] ==\n             BTIF_HF_CALL_SETUP_ALERT))) {\n    app_bt_device.curr_hf_channel_id = anotherDevice;\n  }\n#endif\n  TRACE(1, \"!!!HF_EVENT_CALL_IND  curr_hf_channel_id:%d\\n\",\n        app_bt_device.curr_hf_channel_id);\n  app_bt_device.hfchan_call[chan_id_flag.id] = ctx->call;\n  if (ctx->call == BTIF_HF_CALL_NONE) {\n    app_bt_device.hf_endcall_dis[chan_id_flag.id] = false;\n  }\n#if defined(__BT_ONE_BRING_TWO__)\n  if (bt_get_sco_number() > 1\n#ifdef CHIP_BEST1000\n      && hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2\n#endif\n  ) {\n    ////a call is active:\n    if (app_bt_device.hfchan_call[chan_id_flag.id] == BTIF_HF_CALL_ACTIVE) {\n#if !defined(HFP_NO_PRERMPT)\n      if (app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_CON) {\n        app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n#ifdef __HF_KEEP_ONE_ALIVE__\n#ifdef ENABLE_HFP_AUDIO_PENDING_FOR_MEDIA\n        if (bt_media_cur_is_bt_stream_media()) {\n          app_hfp_set_starting_media_pending_flag(true, chan_id_flag.id);\n        } else\n#endif\n        {\n          app_hfp_start_voice_media(chan_id_flag.id);\n        }\n#else\n        app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_SWAP_SCO,\n                                      BT_STREAM_SBC, chan_id_flag.id, 0);\n#endif\n      }\n      app_bt_device.hf_voice_en[chan_id_flag.id] = HF_VOICE_ENABLE;\n      app_bt_device.hf_voice_en[anotherDevice] = HF_VOICE_DISABLE;\n#endif\n    } else {\n      ////a call is hung up:\n      /// if one device  setup a sco connect so get the other device's sco\n      /// state, if both connect mute the earlier one\n      if (app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_CON) {\n        app_bt_device.hf_voice_en[anotherDevice] = HF_VOICE_ENABLE;\n        app_bt_device.hf_voice_en[chan_id_flag.id] = HF_VOICE_DISABLE;\n      }\n    }\n  }\n#endif\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_UPDATE_MEDIA,\n                                BT_STREAM_VOICE, chan_id_flag.id,\n                                MAX_RECORD_NUM);\n}\n\nextern uint8_t once_event_case;\nextern void startonce_delay_event_Timer_(int ms);\nextern void bt_drv_clear_skip_flag();\nstatic void hfp_callsetup_ind_handler(hf_chan_handle_t chan,\n                                      struct hfp_context *ctx) {\n#ifdef __BT_ONE_BRING_TWO__\n  // clear flag_skip_resv and flag_skip_retx\n  bt_drv_clear_skip_flag();\n  enum BT_DEVICE_ID_T anotherDevice =\n      (BT_DEVICE_ID_1 == chan_id_flag.id) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n\n  TRACE(2, \"::HF_EVENT_CALLSETUP_IND chan_id:%d, callSetup =%d\\n\",\n        chan_id_flag.id, ctx->call_setup);\n  if (ctx->call_setup == 0x03) {\n    once_event_case = 8;\n    startonce_delay_event_Timer_(1000);\n  }\n  if ((ctx->call_setup & 0x03) != 0) {\n    hfp_call_setup_running_on_set(1);\n  }\n#if defined(__BTIF_EARPHONE__)\n  hfp_app_status_indication(chan_id_flag.id, ctx);\n#endif\n\n  if (BTIF_HF_CALL_SETUP_NONE != ctx->call_setup) {\n    // exit sniff mode and stay active\n    app_bt_active_mode_set(ACTIVE_MODE_KEEPEER_SCO_STREAMING,\n                           UPDATE_ACTIVE_MODE_FOR_ALL_LINKS);\n  } else {\n    // resume sniff mode\n    app_bt_active_mode_clear(ACTIVE_MODE_KEEPEER_SCO_STREAMING,\n                             UPDATE_ACTIVE_MODE_FOR_ALL_LINKS);\n  }\n\n#ifdef __BT_ONE_BRING_TWO__\n  TRACE(2, \"call [0]/[1] =%d / %d\", app_bt_device.hfchan_call[BT_DEVICE_ID_1],\n        app_bt_device.hfchan_call[BT_DEVICE_ID_2]);\n  TRACE(2, \"audio [0]/[1] =%d / %d\",\n        app_bt_device.hf_audio_state[BT_DEVICE_ID_1],\n        app_bt_device.hf_audio_state[BT_DEVICE_ID_2]);\n\n  app_bt_device.callSetupBitRec |= (1 << ctx->call_setup);\n  if (ctx->call_setup == 0) {\n    // do nothing\n  } else {\n\n#ifdef BT_USB_AUDIO_DUAL_MODE\n    if (!btusb_is_bt_mode()) {\n      TRACE(0, \"btusb_usbaudio_close doing.\");\n      btusb_usbaudio_close();\n    }\n#endif\n#if defined(HFP_NO_PRERMPT)\n    if (((app_bt_device.hfchan_call[anotherDevice] == BTIF_HF_CALL_ACTIVE) &&\n         (app_bt_device.hfchan_call[chan_id_flag.id] == BTIF_HF_CALL_NONE)) ||\n        ((app_bt_device.hfchan_callSetup[anotherDevice] ==\n          BTIF_HF_CALL_SETUP_IN) &&\n         (app_bt_device.hfchan_call[chan_id_flag.id] == BTIF_HF_CALL_NONE))) {\n      app_bt_device.curr_hf_channel_id = anotherDevice;\n    } else if ((app_bt_device.hfchan_call[chan_id_flag.id] ==\n                BTIF_HF_CALL_ACTIVE) &&\n               (app_bt_device.hfchan_call[anotherDevice] ==\n                BTIF_HF_CALL_ACTIVE)) {\n    } else {\n      app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n    }\n#else\n    if ((app_bt_device.hfchan_call[anotherDevice] == BTIF_HF_CALL_ACTIVE) ||\n        ((app_bt_device.hfchan_callSetup[anotherDevice] ==\n          BTIF_HF_CALL_SETUP_IN) &&\n         (app_bt_device.hfchan_call[chan_id_flag.id] != BTIF_HF_CALL_ACTIVE))) {\n      app_bt_device.curr_hf_channel_id = anotherDevice;\n    } else {\n      app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n    }\n#endif\n  }\n  TRACE(1, \"!!!HF_EVENT_CALLSETUP_IND curr_hf_channel_id:%d\\n\",\n        app_bt_device.curr_hf_channel_id);\n#endif\n  app_bt_device.hfchan_callSetup[chan_id_flag.id] = ctx->call_setup;\n  /////call is alert so remember this time\n  if (app_bt_device.hfchan_callSetup[chan_id_flag.id] ==\n      BTIF_HF_CALL_SETUP_ALERT) {\n    TRACE(1, \"HF CALLSETUP TIME=%d\", hal_sys_timer_get());\n    app_bt_device.hf_callsetup_time[chan_id_flag.id] = hal_sys_timer_get();\n  }\n  if (app_bt_device.hfchan_callSetup[chan_id_flag.id] ==\n      BTIF_HF_CALL_SETUP_IN) {\n    btif_hf_list_current_calls(chan);\n  }\n\n  if ((app_bt_device.hfchan_callSetup[chan_id_flag.id] == 0) &&\n      (app_bt_device.hfchan_call[chan_id_flag.id] == 0)) {\n    hfp_call_setup_running_on_clr();\n  }\n}\n\nstatic void hfp_current_call_state_handler(hf_chan_handle_t chan,\n                                           struct hfp_context *ctx) {\n  TRACE(1, \"::HF_EVENT_CURRENT_CALL_STATE  chan_id:%d\\n\", chan_id_flag.id);\n#if defined(__BTIF_EARPHONE__)\n  hfp_app_status_indication(chan_id_flag.id, ctx);\n#endif\n}\nvoid app_hfp_mute_upstream(uint8_t devId, bool isMute);\n\nstatic void hfp_audio_connected_handler(hf_chan_handle_t chan,\n                                        struct hfp_context *ctx) {\n\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T anotherDevice =\n      (BT_DEVICE_ID_1 == chan_id_flag.id) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n#if defined(HFP_1_6_ENABLE)\n  hf_chan_handle_t chan_tmp;\n#endif\n#ifdef __AI_VOICE__\n  ai_function_handle(CALLBACK_STOP_SPEECH, NULL, 0);\n  ai_function_handle(CALLBACK_AI_APP_KEEPALIVE_POST_HANDLER, NULL, 0); // check\n#endif\n  if (ctx->status != BT_STS_SUCCESS)\n    return;\n#if defined(IBRT)\n  app_ibrt_if_sniff_checker_start(APP_IBRT_IF_SNIFF_CHECKER_USER_HFP);\n#endif\n\n  btdrv_set_powerctrl_rssi_low(0xffff);\n  btapp_hfp_mic_need_skip_frame_set(2);\n\n#ifdef __BT_ONE_BRING_TWO__\n#ifdef SUSPEND_ANOTHER_DEV_A2DP_STREAMING_WHEN_CALL_IS_COMING\n  if (app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_CON) {\n    TRACE(0, \"::HF_EVENT_AUDIO_CONNECTED no need to update state\");\n    return;\n  }\n  hfp_suspend_another_device_a2dp();\n#endif\n#endif\n#ifdef __BT_ONE_BRING_TWO__\n  a2dp_dual_slave_setup_during_sco(chan_id_flag.id);\n#endif\n\n#if defined(HFP_1_6_ENABLE)\n  chan_tmp = app_bt_device.hf_channel[chan_id_flag.id];\n  uint16_t codec_id;\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (p_ibrt_ctrl->current_role == IBRT_SLAVE) {\n    codec_id = p_ibrt_ctrl->ibrt_sco_codec;\n  } else\n#endif\n  {\n    codec_id = btif_hf_get_negotiated_codec(chan_tmp);\n  }\n  TRACE(2, \"::HF_EVENT_AUDIO_CONNECTED  chan_id:%d, codec_id:%d\\n\",\n        chan_id_flag.id, codec_id);\n  app_audio_manager_set_scocodecid(chan_id_flag.id, codec_id);\n\n  //  bt_drv_reg_op_sco_txfifo_reset(codec_id);\n#else\n  TRACE(1, \"::HF_EVENT_AUDIO_CONNECTED  chan_id:%d\\n\", chan_id_flag.id);\n  // bt_drv_reg_op_sco_txfifo_reset(1);\n#endif\n#if defined(HFP_NO_PRERMPT)\n  if (((app_bt_device.hfchan_call[anotherDevice] == BTIF_HF_CALL_ACTIVE) &&\n       (app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_DISCON)) &&\n      ((app_bt_device.hf_audio_state[chan_id_flag.id] ==\n        BTIF_HF_AUDIO_DISCON) &&\n       (app_bt_device.hfchan_call[chan_id_flag.id] == BTIF_HF_CALL_ACTIVE))) {\n    app_bt_device.phone_earphone_mark = 0;\n    app_bt_device.hf_mute_flag = 0;\n  } else if ((app_bt_device.hf_audio_state[chan_id_flag.id] ==\n              BTIF_HF_AUDIO_CON) ||\n             (app_bt_device.hf_audio_state[anotherDevice] ==\n              BTIF_HF_AUDIO_CON)) {\n  } else\n#endif\n  {\n    app_bt_device.phone_earphone_mark = 0;\n    app_bt_device.hf_mute_flag = 0;\n  }\n  app_bt_device.hf_audio_state[chan_id_flag.id] = BTIF_HF_AUDIO_CON;\n\n#if defined(__FORCE_REPORTVOLUME_SOCON__)\n  btif_hf_report_speaker_volume(chan, hfp_volume_get(chan_id_flag.id));\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n  if (bt_get_sco_number() > 1\n#ifdef CHIP_BEST1000\n      && hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2\n#endif\n  ) {\n    if (app_bt_device.hfchan_call[chan_id_flag.id] == BTIF_HF_CALL_ACTIVE) {\n#if !defined(HFP_NO_PRERMPT)\n#ifndef __HF_KEEP_ONE_ALIVE__\n      app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_SWAP_SCO,\n                                    BT_STREAM_SBC, chan_id_flag.id, 0);\n#endif\n      app_bt_device.hf_voice_en[chan_id_flag.id] = HF_VOICE_ENABLE;\n      app_bt_device.hf_voice_en[anotherDevice] = HF_VOICE_DISABLE;\n#else\n      if ((app_bt_device.hfchan_call[anotherDevice] == BTIF_HF_CALL_NONE) &&\n          (app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_DISCON))\n        app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n#ifdef _THREE_WAY_ONE_CALL_COUNT__\n      app_hfp_set_cur_chnl_id(chan_id_flag.id);\n      TRACE(4, \"%s :%d : app_bt_device.hf_callheld[%d]: %d\\n\", __func__,\n            __LINE__, chan_id_flag.id,\n            app_bt_device.hf_callheld[chan_id_flag.id]);\n      if (app_bt_device.hf_callheld[chan_id_flag.id] ==\n          BTIF_HF_CALL_HELD_ACTIVE) {\n        if (app_hfp_get_cur_call_chnl(NULL) == chan_id_flag.id)\n          app_hfp_3_way_call_counter_set(chan_id_flag.id, 1);\n      } else if ((app_bt_device.hf_callheld[chan_id_flag.id] ==\n                  BTIF_HF_CALL_HELD_NONE) ||\n                 (app_bt_device.hf_callheld[chan_id_flag.id] ==\n                  BTIF_HF_CALL_HELD_NO_ACTIVE)) {\n        if (app_hfp_get_cur_call_chnl(NULL) == chan_id_flag.id)\n          app_hfp_3_way_call_counter_set(chan_id_flag.id, 0);\n      }\n#endif\n#endif\n    } else if (app_bt_device.hf_audio_state[anotherDevice] ==\n               BTIF_HF_AUDIO_CON) {\n      app_bt_device.hf_voice_en[chan_id_flag.id] = HF_VOICE_DISABLE;\n      app_bt_device.hf_voice_en[anotherDevice] = HF_VOICE_ENABLE;\n    }\n  } else {\n    /// if one device  setup a sco connect so get the other device's sco state,\n    /// if both connect mute the earlier one\n    if (app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_CON) {\n      app_bt_device.hf_voice_en[anotherDevice] = HF_VOICE_DISABLE;\n    }\n    app_bt_device.hf_voice_en[chan_id_flag.id] = HF_VOICE_ENABLE;\n  }\n#ifndef __HF_KEEP_ONE_ALIVE__\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_VOICE,\n                                chan_id_flag.id, MAX_RECORD_NUM);\n#endif\n#if defined(HFP_NO_PRERMPT)\n  TRACE(2, \"call[id_other] =%d audio[id_other] = %d\",\n        app_bt_device.hfchan_call[anotherDevice],\n        app_bt_device.hf_audio_state[anotherDevice]);\n  if (/*(app_bt_device.hfchan_call[anotherDevice] == HF_CALL_ACTIVE)&&*/\n      (app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_CON)) {\n  } else\n#endif\n  {\n    if (bt_media_cur_is_bt_stream_media()) {\n      app_hfp_start_voice_media(chan_id_flag.id);\n      app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n    } else {\n#ifdef __BT_ONE_BRING_TWO__\n      TRACE(1, \"%s another[%d] hf_audio_state %d,\", __func__, anotherDevice,\n            app_bt_device.hf_audio_state[anotherDevice]);\n\n      if (BTIF_HF_AUDIO_CON == app_bt_device.hf_audio_state[anotherDevice]) {\n        TRACE(1,\n              \"disconnect current audio link and don't swith to current sco\");\n        btif_hf_disc_audio_link(app_bt_device.hf_channel[chan_id_flag.id]);\n        app_bt_device.curr_hf_channel_id = anotherDevice;\n      }\n#else\n      if (bt_is_sco_media_open()) {\n        TRACE(0,\n              \"disconnect current audio link and don't swith to current sco\");\n        app_bt_HF_DisconnectAudioLink(\n            app_bt_device.hf_channel[chan_id_flag.id]);\n      }\n#endif\n      else {\n        app_hfp_start_voice_media(chan_id_flag.id);\n        app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n      }\n    }\n  }\n#else\n#ifdef _THREE_WAY_ONE_CALL_COUNT__\n  app_hfp_set_cur_chnl_id(chan_id_flag.id);\n#endif\n#ifdef ENABLE_HFP_AUDIO_PENDING_FOR_MEDIA\n  if (bt_media_cur_is_bt_stream_media()) {\n    app_hfp_set_starting_media_pending_flag(true, BT_DEVICE_ID_1);\n  } else\n#endif\n  {\n    app_hfp_start_voice_media(BT_DEVICE_ID_1);\n  }\n#endif\n\n#ifdef __IAG_BLE_INCLUDE__\n  app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_HFP_ON, true);\n#endif\n}\n\nstatic void hfp_audio_disconnected_handler(hf_chan_handle_t chan,\n                                           struct hfp_context *ctx) {\n#ifdef __BT_ONE_BRING_TWO__\n  // clear flag_skip_resv and flag_skip_retx\n  bt_drv_clear_skip_flag();\n  enum BT_DEVICE_ID_T anotherDevice =\n      (BT_DEVICE_ID_1 == chan_id_flag.id) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n\n#ifdef BT_USB_AUDIO_DUAL_MODE\n  if (!btusb_is_bt_mode()) {\n    TRACE(0, \"btusb_usbaudio_open doing.\");\n    btusb_usbaudio_open();\n  }\n#endif\n  app_hfp_set_starting_media_pending_flag(false, 0);\n#if defined(IBRT)\n  app_ibrt_if_sniff_checker_stop(APP_IBRT_IF_SNIFF_CHECKER_USER_HFP);\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n#ifdef SUSPEND_ANOTHER_DEV_A2DP_STREAMING_WHEN_CALL_IS_COMING\n  if (app_bt_is_to_resume_music_player(anotherDevice)) {\n    app_bt_resume_music_player(anotherDevice);\n  }\n#endif\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n  a2dp_dual_slave_handling_refresh();\n#endif\n  TRACE(1, \"::HF_EVENT_AUDIO_DISCONNECTED  chan_id:%d\\n\", chan_id_flag.id);\n  if (app_bt_device.hfchan_call[chan_id_flag.id] == BTIF_HF_CALL_ACTIVE) {\n    app_bt_device.phone_earphone_mark = 1;\n  }\n\n  app_bt_device.hf_audio_state[chan_id_flag.id] = BTIF_HF_AUDIO_DISCON;\n\n  /* Dont clear callsetup status when audio disc: press iphone volume button\n     will disc audio link, but the iphone incoming call is still exist. The\n     callsetup status will be reported after call rejected or answered. */\n  // app_bt_device.hfchan_callSetup[chan_id_flag.id] = BTIF_HF_CALL_SETUP_NONE;\n\n#ifdef __IAG_BLE_INCLUDE__\n  if (!app_bt_is_in_reconnecting()) {\n    app_hfp_resume_ble_adv();\n  }\n\n  app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_HFP_ON, false);\n#endif\n\n#if defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A) ||                      \\\n    defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n  bt_drv_reg_op_clean_flags_of_ble_and_sco();\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n  if (btif_get_hf_chan_state(app_bt_device.hf_channel[anotherDevice]) !=\n      BTIF_HF_STATE_OPEN) {\n    TRACE(2, \"!!!HF_EVENT_AUDIO_DISCONNECTED  hfchan_call[%d]:%d\\n\",\n          anotherDevice, app_bt_device.hfchan_call[anotherDevice]);\n  }\n  if ((app_bt_device.hfchan_call[anotherDevice] == BTIF_HF_CALL_ACTIVE) ||\n      (app_bt_device.hfchan_callSetup[anotherDevice] ==\n       BTIF_HF_CALL_SETUP_IN)) {\n    //            app_bt_device.curr_hf_channel_id = chan_id_flag.id_other;\n    TRACE(\n        1,\n        \"!!!HF_EVENT_AUDIO_DISCONNECTED  app_bt_device.curr_hf_channel_id:%d\\n\",\n        app_bt_device.curr_hf_channel_id);\n  } else {\n    app_bt_device.curr_hf_channel_id = chan_id_flag.id;\n  }\n#if defined(_THREE_WAY_ONE_CALL_COUNT__)\n  if (chan_id_flag.id == app_hfp_get_cur_call_chnl(NULL)) {\n    app_hfp_cur_call_chnl_reset(chan_id_flag.id);\n  }\n#endif\n  app_bt_device.hf_voice_en[chan_id_flag.id] = HF_VOICE_DISABLE;\n  if (app_bt_device.hf_audio_state[anotherDevice] == BTIF_HF_AUDIO_CON) {\n    app_bt_device.hf_voice_en[anotherDevice] = HF_VOICE_ENABLE;\n    TRACE(1, \"chan_id:%d AUDIO_DISCONNECTED, then enable id_other voice\",\n          chan_id_flag.id);\n  }\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                chan_id_flag.id, MAX_RECORD_NUM);\n#else\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                BT_DEVICE_ID_1, MAX_RECORD_NUM);\n\n#endif\n  app_bt_device.callSetupBitRec = 0;\n  // app_hfp_mute_upstream(chan_id_flag.id, true);\n#if defined(HFP_1_6_ENABLE)\n  uint16_t codec_id =\n      btif_hf_get_negotiated_codec(app_bt_device.hf_channel[chan_id_flag.id]);\n  bt_drv_reg_op_sco_txfifo_reset(codec_id);\n#else\n  bt_drv_reg_op_sco_txfifo_reset(1);\n#endif\n\n  app_bt_active_mode_clear(ACTIVE_MODE_KEEPEER_SCO_STREAMING,\n                           UPDATE_ACTIVE_MODE_FOR_ALL_LINKS);\n}\n\nstatic void hfp_ring_ind_handler(hf_chan_handle_t chan,\n                                 struct hfp_context *ctx) {\n#if defined(__BTIF_EARPHONE__) && defined(MEDIA_PLAYER_SUPPORT)\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T anotherDevice =\n      (BT_DEVICE_ID_1 == chan_id_flag.id) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n  TRACE(1, \"::HF_EVENT_RING_IND  chan_id:%d\\n\", chan_id_flag.id);\n  TRACE(1, \"btif_hf_is_inbandring_enabled:%d\",\n        btif_hf_is_inbandring_enabled(chan));\n#if defined(__BT_ONE_BRING_TWO__)\n  if ((app_bt_device.hf_audio_state[chan_id_flag.id] != BTIF_HF_AUDIO_CON) &&\n      (app_bt_device.hf_audio_state[anotherDevice] != BTIF_HF_AUDIO_CON))\n    app_voice_report(APP_STATUS_INDICATION_INCOMINGCALL, chan_id_flag.id);\n#else\n\n#if defined(IBRT)\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (p_ibrt_ctrl->current_role == IBRT_SLAVE)\n    return;\n#endif\n  if (app_bt_device.hf_audio_state[chan_id_flag.id] != BTIF_HF_AUDIO_CON)\n    app_voice_report(APP_STATUS_INDICATION_INCOMINGCALL, chan_id_flag.id);\n#endif\n#endif\n}\n\nstatic void hfp_speak_volume_handler(hf_chan_handle_t chan,\n                                     struct hfp_context *ctx) {\n  TRACE(2, \"::HF_EVENT_SPEAKER_VOLUME  chan_id:%d,speaker gain = %d\\n\",\n        chan_id_flag.id, ctx->speaker_volume);\n  hfp_volume_set(chan_id_flag.id, (int)ctx->speaker_volume);\n}\n\nstatic void hfp_voice_rec_state_ind_handler(hf_chan_handle_t chan,\n                                            struct hfp_context *ctx) {\n  TRACE(2, \"::HF_EVENT_VOICE_REC_STATE  chan_id:%d,voice_rec_state = %d\\n\",\n        chan_id_flag.id, ctx->voice_rec_state);\n}\n\nstatic void hfp_bes_test_handler(hf_chan_handle_t chan,\n                                 struct hfp_context *ctx) {\n  // TRACE(0,\"HF_EVENT_BES_TEST content =d\", Info->p.ptr);\n}\n\nstatic void hfp_read_ag_ind_status_handler(hf_chan_handle_t chan,\n                                           struct hfp_context *ctx) {\n  TRACE(1, \"HF_EVENT_READ_AG_INDICATORS_STATUS %s\\n\", __func__);\n}\n\nstatic void hfp_call_held_ind_handler(hf_chan_handle_t chan,\n                                      struct hfp_context *ctx) {\n#if defined(__BT_ONE_BRING_TWO__)\n  TRACE(8,\n        \"::HF_EVENT_CALLHELD_IND %d chan_id %d call %d %d held %d %d \"\n        \"audio_state %d %d\\n\",\n        ctx->call_held, chan_id_flag.id,\n        app_bt_device.hfchan_call[BT_DEVICE_ID_1],\n        app_bt_device.hfchan_call[BT_DEVICE_ID_2],\n        app_bt_device.hf_callheld[BT_DEVICE_ID_1],\n        app_bt_device.hf_callheld[BT_DEVICE_ID_2],\n        app_bt_device.hf_audio_state[BT_DEVICE_ID_1],\n        app_bt_device.hf_audio_state[BT_DEVICE_ID_2]);\n#else\n  TRACE(2, \"::HF_EVENT_CALLHELD_IND  chan_id:%d HELD_STATUS = %d \\n\",\n        chan_id_flag.id, ctx->call_held);\n#endif\n#if defined(_THREE_WAY_ONE_CALL_COUNT__)\n#if defined(__BT_ONE_BRING_TWO__)\n  if (app_bt_device.hf_audio_state[chan_id_flag.id] == BTIF_HF_AUDIO_CON &&\n      (ctx->call_held == BTIF_HF_CALL_HELD_NONE ||\n       ctx->call_held == BTIF_HF_CALL_HELD_ACTIVE)) {\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_SWITCHTO_SCO,\n                                  BT_STREAM_VOICE, chan_id_flag.id, 0);\n  }\n#endif\n  app_bt_device.hf_callheld[chan_id_flag.id] = ctx->call_held;\n  if (ctx->call_held == BTIF_HF_CALL_HELD_ACTIVE) {\n    if (app_hfp_get_cur_call_chnl(NULL) == chan_id_flag.id)\n      app_hfp_3_way_call_counter_set(chan_id_flag.id, 1);\n  } else if ((ctx->call_held == BTIF_HF_CALL_HELD_NONE) ||\n             (ctx->call_held == BTIF_HF_CALL_HELD_NO_ACTIVE)) {\n    if (app_hfp_get_cur_call_chnl(NULL) == chan_id_flag.id)\n      app_hfp_3_way_call_counter_set(chan_id_flag.id, 0);\n  } else {\n    TRACE(0, \"UNKNOWN CMD.IGNORE\");\n  }\n#endif\n}\n\nstatic uint8_t skip_frame_cnt = 0;\nvoid app_hfp_set_skip_frame(uint8_t frames) { skip_frame_cnt = frames; }\nuint8_t app_hfp_run_skip_frame(void) {\n  if (skip_frame_cnt > 0) {\n    skip_frame_cnt--;\n    return 1;\n  }\n  return 0;\n}\nuint8_t hfp_is_service_connected(uint8_t device_id) {\n  if (device_id >= BT_DEVICE_NUM)\n    return 0;\n  return app_bt_device.hf_conn_flag[device_id];\n}\n#if HF_VERSION_1_6 == XA_ENABLED\n// HfCommand hf_codec_sel_command;\n#endif\n\nstatic uint8_t app_hfp_is_starting_media_pending_flag = false;\nstatic uint8_t app_hfp_pending_dev_id;\nbool app_hfp_is_starting_media_pending(void) {\n  return app_hfp_is_starting_media_pending_flag;\n}\nstatic uint8_t upstreamMute = 0xff;\nvoid app_hfp_mute_upstream(uint8_t devId, bool isMute) {\n  if (upstreamMute != isMute) {\n    TRACE(3, \"%s devId %d isMute %d\", __func__, devId, isMute);\n    upstreamMute = isMute;\n    if (isMute) {\n      btdrv_set_bt_pcm_en(0);\n    } else {\n      btdrv_set_bt_pcm_en(1);\n    }\n  }\n}\n\nstatic void app_hfp_set_starting_media_pending_flag(bool isEnabled,\n                                                    uint8_t devId) {\n  TRACE(1, \"%s %d.Current state %d toEnable %d\", __func__, __LINE__,\n        app_hfp_is_starting_media_pending_flag, isEnabled);\n  if ((app_hfp_is_starting_media_pending_flag && isEnabled) ||\n      (!app_hfp_is_starting_media_pending_flag && !isEnabled)) {\n    return;\n  }\n\n  app_hfp_is_starting_media_pending_flag = isEnabled;\n\n  app_hfp_pending_dev_id = devId;\n#if 0\n    if (isEnabled)\n    {\n        if (!app_hfp_mediaplay_delay_resume_timer_id ) {\n            app_hfp_mediaplay_delay_resume_timer_id  =\n                osTimerCreate(osTimer(APP_HFP_MEDIAPLAY_DELAY_RESUME_TIMER),\n                osTimerOnce, NULL);\n        }\n        osTimerStart(app_hfp_mediaplay_delay_resume_timer_id ,\n            HFP_MEDIAPLAY_DELAY_RESUME_IN_MS);\n    }\n#endif\n}\n\nvoid app_hfp_start_voice_media(uint8_t devId) {\n  app_hfp_set_starting_media_pending_flag(false, 0);\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_VOICE,\n                                devId, MAX_RECORD_NUM);\n}\n\nvoid app_hfp_resume_pending_voice_media(void) {\n  if (btapp_hfp_is_dev_sco_connected(app_hfp_pending_dev_id)) {\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_VOICE,\n                                  app_hfp_pending_dev_id, MAX_RECORD_NUM);\n    app_hfp_set_starting_media_pending_flag(false, 0);\n  }\n}\n\n#include \"app_bt_func.h\"\nvoid hfp_multipoint_audio_manage_a2dp_callback() {\n#ifdef SUSPEND_ANOTHER_DEV_A2DP_STREAMING_WHEN_CALL_IS_COMING\n  int i = 0;\n  int j = 0;\n  TRACE(1, \"%s\", __func__);\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (app_bt_device.a2dp_streamming[i] == 1)\n      break;\n  }\n  if (i == BT_DEVICE_NUM)\n    return;\n\n  for (j = 0; j < BT_DEVICE_NUM; j++) {\n    if (app_bt_device.hf_audio_state[j] == BTIF_HF_AUDIO_CON)\n      break;\n  }\n\n  if (j == BT_DEVICE_NUM)\n    return;\n\n  btif_remote_device_t *activeA2dpRem =\n      A2DP_GetRemoteDevice(app_bt_device.a2dp_connected_stream[i]);\n\n  btif_remote_device_t *activeHfpRem =\n      (btif_remote_device_t *)btif_hf_cmgr_get_remote_device(\n          app_bt_device.hf_channel[j]);\n\n  if (activeA2dpRem == activeHfpRem)\n    return;\n\n  TRACE(0, \"different profile device\");\n  if (app_bt_is_music_player_working(i)) {\n    bool isPaused = app_bt_pause_music_player(i);\n    if (isPaused) {\n      app_bt_set_music_player_resume_device(i);\n    }\n  } else if (app_bt_is_a2dp_streaming(i)) {\n    app_bt_suspend_a2dp_streaming(i);\n  }\n#endif\n}\n\nvoid hfp_suspend_another_device_a2dp(void) {\n  app_bt_start_custom_function_in_bt_thread(\n      0, 0, (uint32_t)hfp_multipoint_audio_manage_a2dp_callback);\n}\n\nstatic void app_hfp_audio_closed_delay_resume_ble_adv_timer_cb(void const *n) {\n#ifdef __IAG_BLE_INCLUDE__\n  app_ble_refresh_adv_state(BLE_ADVERTISING_INTERVAL);\n#endif\n}\n#ifdef __IAG_BLE_INCLUDE__\nstatic void app_hfp_resume_ble_adv(void) {\n  if (!app_hfp_audio_closed_delay_resume_ble_adv_timer_id) {\n    app_hfp_audio_closed_delay_resume_ble_adv_timer_id =\n        osTimerCreate(osTimer(APP_HFP_AUDIO_CLOSED_DELAY_RESUME_BLE_ADV_TIMER),\n                      osTimerOnce, NULL);\n  }\n\n  osTimerStart(app_hfp_audio_closed_delay_resume_ble_adv_timer_id,\n               HFP_AUDIO_CLOSED_DELAY_RESUME_ADV_IN_MS);\n}\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\n#if defined(__BT_SELECT_PROF_DEVICE_ID__)\nstatic void _app_hfp_select_channel(hf_chan_handle_t chan,\n                                    struct hfp_context *ctx) {\n  uint32_t i = 0;\n  btif_remote_device_t *matching_remdev = NULL, *wanted_remdev = NULL;\n  hf_chan_handle_t curr_channel;\n\n  wanted_remdev = ctx->chan_sel_remDev;\n  // default channel is NULL\n  *(ctx->chan_sel_channel) = NULL;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    // Other profile connected\n    curr_channel = app_bt_device.hf_channel[i];\n    if (app_bt_is_any_profile_connected(i)) {\n      matching_remdev = app_bt_get_connected_profile_remdev(i);\n      TRACE(3, \"device_id=%d, hfp_select_channel : remdev=0x%x:0x%x.\", i,\n            wanted_remdev, matching_remdev);\n      TRACE(1, \"device_id=%d, hfp_select_channel : other_profile_connected.\",\n            i);\n      if (wanted_remdev == matching_remdev) {\n        TRACE(2, \"device_id=%d, hfp_select_channel : found_same_remdev : 0x%x\",\n              i, &(app_bt_device.hf_channel[i]));\n        if (btif_get_hf_chan_state(curr_channel) == BTIF_HF_STATE_CLOSED) {\n          TRACE(1,\n                \"device_id=%d, hfp_select_channel : current_channel_is_closed, \"\n                \"good.\",\n                i);\n          *(ctx->chan_sel_channel) = (uint32_t *)curr_channel;\n        } else {\n          TRACE(2,\n                \"device_id=%d, hfp_select_channel : other_profile_connected: \"\n                \"current_channel_is_not_closed %d, ohno.\",\n                i, btif_get_hf_chan_state(curr_channel));\n          TRACE(1,\n                \"device_id=%d, hfp_select_channel : other_profile_connected: \"\n                \"missed right channel, found nothing, return\",\n                i);\n        }\n        return;\n      } else {\n        TRACE(1,\n              \"device_id=%d, hfp_select_channel : different_remdev, see next \"\n              \"device id\",\n              i);\n      }\n    } else {\n      TRACE(1,\n            \"device_id=%d, hfp_select_channel : other_profile_not_connected.\",\n            i);\n      // first found idle device id is min device id we want\n      // Assume : other profile will use device id ascending\n      // TODO to keep other profile use device id ascending\n      if (btif_get_hf_chan_state(curr_channel) == BTIF_HF_STATE_CLOSED) {\n        TRACE(1,\n              \"device_id=%d, hfp_select_channel : current_channel_is_closed, \"\n              \"choose this idle channel.\",\n              i);\n        *(ctx->chan_sel_channel) = (uint32_t *)curr_channel;\n      } else {\n        TRACE(2,\n              \"device_id=%d, hfp_select_channel : no_other_profile_connected : \"\n              \"current_channel_is_not_closed %d, ohno.\",\n              i, btif_get_hf_chan_state(curr_channel));\n        TRACE(1,\n              \"device_id=%d, hfp_select_channel : no_other_profile_connected : \"\n              \"missed right channel, found nothing, return\",\n              i);\n      }\n      return;\n    }\n  }\n}\n#endif\n#endif\n\nvoid app_hfp_event_callback(hf_chan_handle_t chan, struct hfp_context *ctx) {\n  struct bt_cb_tag *bt_drv_func_cb = bt_drv_get_func_cb_ptr();\n\n#ifdef __BT_ONE_BRING_TWO__\n  if (ctx->event == BTIF_HF_EVENT_SELECT_CHANNEL) {\n#if defined(__BT_SELECT_PROF_DEVICE_ID__)\n    _app_hfp_select_channel(chan, ctx);\n#endif\n    return;\n  }\n  hfp_chan_id_distinguish(chan);\n#else\n  if (ctx->event == BTIF_HF_EVENT_SELECT_CHANNEL) {\n    return;\n  }\n  chan_id_flag.id = BT_DEVICE_ID_1;\n#endif\n  switch (ctx->event) {\n  case BTIF_HF_EVENT_SERVICE_CONNECTED:\n    hfp_connected_ind_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_AUDIO_DATA_SENT:\n    hfp_audio_data_sent_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_AUDIO_DATA:\n    hfp_audio_data_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_SERVICE_DISCONNECTED:\n    hfp_disconnected_ind_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_CALL_IND:\n    hfp_call_ind_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_CALLSETUP_IND:\n    hfp_callsetup_ind_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_CURRENT_CALL_STATE:\n    hfp_current_call_state_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_AUDIO_CONNECTED:\n#ifdef IBRT\n  {\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    bt_drv_reg_op_set_agc_thd(p_ibrt_ctrl->current_role == IBRT_MASTER, true);\n\n    if (!btif_besaud_is_connected()) {\n      bt_drv_reg_op_hack_max_slot(p_ibrt_ctrl->mobile_conhandle - 0x80, 1);\n    }\n  }\n#endif\n\n    if (bt_drv_func_cb->bt_switch_agc != NULL) {\n      bt_drv_func_cb->bt_switch_agc(BT_HFP_WORK_MODE);\n    }\n\n    hfp_audio_connected_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_AUDIO_DISCONNECTED:\n\n    if (bt_drv_func_cb->bt_switch_agc != NULL) {\n      bt_drv_func_cb->bt_switch_agc(BT_IDLE_MODE);\n    }\n\n    hfp_audio_disconnected_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_RING_IND:\n    hfp_ring_ind_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_SPEAKER_VOLUME:\n    hfp_speak_volume_handler(chan, ctx);\n    break;\n#ifdef SUPPORT_SIRI\n  case BTIF_HF_EVENT_SIRI_STATUS:\n    break;\n#endif\n  case BTIF_HF_EVENT_BES_TEST:\n    hfp_bes_test_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_READ_AG_INDICATORS_STATUS:\n    hfp_read_ag_ind_status_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_CALLHELD_IND:\n    hfp_call_held_ind_handler(chan, ctx);\n    break;\n  case BTIF_HF_EVENT_COMMAND_COMPLETE:\n    break;\n  case BTIF_HF_EVENT_AT_RESULT_DATA:\n    TRACE(1, \"received AT command: %s\", ctx->ptr);\n#ifdef __INTERACTION__\n    if (!memcmp(oppo_self_defined_command_response, ctx->ptr,\n                strlen(oppo_self_defined_command_response))) {\n      for (int i = 0; i < BT_DEVICE_NUM; i++) {\n        chan = app_bt_device.hf_channel[i];\n        {\n          TRACE(2, \"hf state=%x %d\", chan, btif_get_hf_chan_state(chan));\n          if (btif_get_hf_chan_state(chan) == BTIF_HF_STATE_OPEN) {\n            // char firmwareversion[] = \"AT+VDRV=3,1,9,2,9,3,9\";\n            // sprintf(&firmwareversion[27], \"%d\", (int)NeonFwVersion[0]);\n            // sprintf(&firmwareversion[28], \"%d\", (int)NeonFwVersion[1]);\n            // sprintf(&firmwareversion[29], \"%d\", (int)NeonFwVersion[2]);\n            // btif_hf_send_at_cmd(chan,firmwareversion);\n          }\n        }\n      }\n      TRACE(0, \"oppo_self_defined_command_response\");\n    }\n#endif\n#ifdef __INTERCONNECTION__\n    if (!memcmp(huawei_self_defined_command_response, ctx->ptr,\n                strlen(huawei_self_defined_command_response) + 1)) {\n      uint8_t *pSelfDefinedCommandSupport =\n          app_battery_get_mobile_support_self_defined_command_p();\n      *pSelfDefinedCommandSupport = 1;\n\n      TRACE(0, \"send self defined AT command to mobile.\");\n      send_selfdefined_battery_report_AT_command();\n    }\n#endif\n    break;\n\n  case BTIF_HF_EVENT_VOICE_REC_STATE:\n    hfp_voice_rec_state_ind_handler(chan, ctx);\n    break;\n\n  default:\n    break;\n  }\n\n#ifdef __BT_ONE_BRING_TWO__\n  hfcall_next_sta_handler(ctx->event);\n#endif\n\n#if defined(IBRT)\n  app_tws_ibrt_profile_callback(BTIF_APP_HFP_PROFILE_ID, (void *)chan,\n                                (void *)ctx);\n#endif\n}\n\nuint8_t btapp_hfp_get_call_state(void) {\n  uint8_t i;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (app_bt_device.hfchan_call[i] == BTIF_HF_CALL_ACTIVE) {\n      return 1;\n    }\n  }\n  return 0;\n}\n\nuint8_t btapp_hfp_get_call_setup(void) {\n  uint8_t i;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if ((app_bt_device.hfchan_callSetup[i] != BTIF_HF_CALL_SETUP_NONE)) {\n      return (app_bt_device.hfchan_callSetup[i]);\n    }\n  }\n  return 0;\n}\n\nuint8_t btapp_hfp_incoming_calls(void) {\n  uint8_t i;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (app_bt_device.hfchan_callSetup[i] == BTIF_HF_CALL_SETUP_IN) {\n      return 1;\n    }\n  }\n  return 0;\n}\n\nbool btapp_hfp_is_call_active(void) {\n  uint8_t i;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if ((app_bt_device.hfchan_call[i] == BTIF_HF_CALL_ACTIVE) &&\n        (app_bt_device.hf_audio_state[i] == BTIF_HF_AUDIO_CON)) {\n      return true;\n    }\n  }\n  return false;\n}\n\nbool btapp_hfp_is_sco_active(void) {\n  uint8_t i;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if (app_bt_device.hf_audio_state[i] == BTIF_HF_AUDIO_CON) {\n      return true;\n    }\n  }\n  return false;\n}\n\nbool btapp_hfp_is_dev_call_active(uint8_t devId) {\n  return ((app_bt_device.hfchan_call[devId] == BTIF_HF_CALL_ACTIVE) &&\n          (app_bt_device.hf_audio_state[devId] == BTIF_HF_AUDIO_CON));\n}\n\nbool btapp_hfp_is_dev_sco_connected(uint8_t devId) {\n  return (app_bt_device.hf_audio_state[devId] == BTIF_HF_AUDIO_CON);\n}\n\nuint8_t btapp_hfp_get_call_active(void) {\n  uint8_t i;\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    if ((app_bt_device.hfchan_call[i] == BTIF_HF_CALL_ACTIVE) ||\n        (app_bt_device.hfchan_callSetup[i] == BTIF_HF_CALL_SETUP_ALERT)) {\n\n      return 1;\n    }\n  }\n  return 0;\n}\n\nvoid btapp_hfp_report_speak_gain(void) {\n  uint8_t i;\n  btif_remote_device_t *remDev = NULL;\n  btif_link_mode_t mode = BTIF_BLM_SNIFF_MODE;\n  hf_chan_handle_t chan;\n\n  for (i = 0; i < BT_DEVICE_NUM; i++) {\n    osapi_lock_stack();\n    remDev = (btif_remote_device_t *)btif_hf_cmgr_get_remote_device(\n        app_bt_device.hf_channel[i]);\n    if (remDev) {\n      mode = btif_me_get_current_mode(remDev);\n    } else {\n      mode = BTIF_BLM_SNIFF_MODE;\n    }\n    chan = app_bt_device.hf_channel[i];\n    if ((btif_get_hf_chan_state(chan) == BTIF_HF_STATE_OPEN) &&\n        (mode == BTIF_BLM_ACTIVE_MODE)) {\n      btif_hf_report_speaker_volume(chan,\n                                    hfp_volume_get((enum BT_DEVICE_ID_T)i));\n    }\n    osapi_unlock_stack();\n  }\n}\n\nuint8_t btapp_hfp_need_mute(void) { return app_bt_device.hf_mute_flag; }\n\nint32_t hfp_mic_need_skip_frame_cnt = 0;\n\nbool btapp_hfp_mic_need_skip_frame(void) {\n  bool nRet;\n\n  if (hfp_mic_need_skip_frame_cnt > 0) {\n    hfp_mic_need_skip_frame_cnt--;\n    nRet = true;\n  } else {\n    app_hfp_mute_upstream(0, false);\n    nRet = false;\n  }\n  return nRet;\n}\n\nvoid btapp_hfp_mic_need_skip_frame_set(int32_t skip_frame) {\n  hfp_mic_need_skip_frame_cnt = skip_frame;\n}\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\ntypedef void (*btapp_set_sco_switch_cmd_callback)(void);\n\nbtapp_set_sco_switch_cmd_callback set_sco_switch_cmd_callback;\n\nvoid btapp_sco_switch_set_pcm(void) {\n  TRACE(0, \"btapp_sco_switch_set_pcm\\n\");\n  TRACE(1, \"0xd02201b0 = 0x%x before\\n\", *(volatile uint32_t *)(0xd02201b0));\n  osDelay(20);\n  btdrv_pcm_enable();\n  TRACE(1, \"0xd02201b0 = 0x%x after\\n\", *(volatile uint32_t *)(0xd02201b0));\n}\n#endif\n\nvoid app_hfp_init(void) {\n  hfp_hfcommand_mempool_init();\n#if defined(ENHANCED_STACK)\n  btif_hfp_initialize();\n#endif /* ENHANCED_STACK */\n  app_bt_device.curr_hf_channel_id = BT_DEVICE_ID_1;\n  app_bt_device.hf_mute_flag = 0;\n\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    app_bt_device.hf_channel[i] = btif_hf_create_channel();\n    if (!app_bt_device.hf_channel[i]) {\n      ASSERT(0, \"Serious error: cannot create hf channel\\n\");\n    }\n    btif_hf_init_channel(app_bt_device.hf_channel[i]);\n    app_bt_device.hfchan_call[i] = 0;\n    app_bt_device.hfchan_callSetup[i] = 0;\n    app_bt_device.hf_audio_state[i] = BTIF_HF_AUDIO_DISCON,\n    app_bt_device.hf_conn_flag[i] = false;\n    app_bt_device.hf_voice_en[i] = 0;\n  }\n  btif_hf_register_callback(app_hfp_event_callback);\n#if defined(SUPPORT_BATTERY_REPORT) || defined(SUPPORT_HF_INDICATORS)\n  Besbt_hook_handler_set(BESBT_HOOK_USER_3, app_hfp_battery_report_proc);\n#endif\n\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n  set_sco_switch_cmd_callback = btapp_sco_switch_set_pcm;\n#endif\n  app_hfp_mute_upstream(chan_id_flag.id, true);\n}\n\nvoid app_hfp_enable_audio_link(bool isEnable) { return; }\n\n#if defined(IBRT)\nint hfp_ibrt_service_connected_mock(void) {\n  if (btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_1]) ==\n      BTIF_HF_STATE_OPEN) {\n    TRACE(0, \"::HF_EVENT_SERVICE_CONNECTED mock\");\n    app_bt_device.hf_conn_flag[chan_id_flag.id] = 1;\n  } else {\n    TRACE(1, \"::HF_EVENT_SERVICE_CONNECTED mock need check chan_state:%d\",\n          btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_1]));\n  }\n\n  return 0;\n}\n\nint hfp_ibrt_sync_get_status(ibrt_hfp_status_t *hfp_status) {\n  hfp_status->audio_state =\n      (uint8_t)app_bt_device.hf_audio_state[BT_DEVICE_ID_1];\n  hfp_status->volume = hfp_volume_get(BT_DEVICE_ID_1);\n  hfp_status->lmp_sco_hdl = 0;\n\n  if (hfp_status->audio_state == BTIF_HF_AUDIO_CON &&\n      app_tws_ibrt_mobile_link_connected()) {\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    uint16_t sco_connhdl =\n        btif_me_get_scohdl_by_connhdl(p_ibrt_ctrl->mobile_conhandle);\n    hfp_status->lmp_sco_hdl = bt_drv_reg_op_lmp_sco_hdl_get(sco_connhdl);\n    TRACE(2, \"ibrt_ui_log:get sco lmp hdl %04x %02x\\n\", sco_connhdl,\n          hfp_status->lmp_sco_hdl);\n  }\n\n  return 0;\n}\n\nint hfp_ibrt_sync_set_status(ibrt_hfp_status_t *hfp_status) {\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  btif_remote_device_t *remDev = NULL;\n\n  TRACE(4, \"%s audio_state:%d volume:%d lmp_scohdl:%02x\", __func__,\n        hfp_status->audio_state, hfp_status->volume, hfp_status->lmp_sco_hdl);\n\n  app_bt_device.hf_audio_state[BT_DEVICE_ID_1] =\n      (btif_audio_state_t)hfp_status->audio_state;\n\n  if (app_tws_ibrt_mobile_link_connected()) {\n    remDev = btif_me_get_remote_device_by_handle(p_ibrt_ctrl->mobile_conhandle);\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    remDev = btif_me_get_remote_device_by_handle(p_ibrt_ctrl->ibrt_conhandle);\n  }\n\n  if (remDev) {\n    app_bt_stream_volume_ptr_update(\n        (uint8_t *)btif_me_get_remote_device_bdaddr(remDev));\n  } else {\n    app_bt_stream_volume_ptr_update(NULL);\n  }\n\n  hfp_volume_set(BT_DEVICE_ID_1, hfp_status->volume);\n\n  p_ibrt_ctrl->ibrt_sco_lmphdl = 0;\n\n  if (hfp_status->audio_state == BTIF_HF_AUDIO_CON &&\n      hfp_status->lmp_sco_hdl != 0 &&\n      app_tws_ibrt_slave_ibrt_link_connected()) {\n    uint16_t sco_connhdl = 0x0100; // SYNC_HFP_STATUS arrive before mock\n                                   // sniffer_sco, so use 0x0100 directly\n    if (bt_drv_reg_op_lmp_sco_hdl_set(sco_connhdl, hfp_status->lmp_sco_hdl)) {\n      TRACE(2, \"ibrt_ui_log:set sco %04x lmp hdl %02x\\n\", sco_connhdl,\n            hfp_status->lmp_sco_hdl);\n    } else {\n      // SYNC_HFP_STATUS may so much faster lead bt_drv_reg_op_lmp_sco_hdl_set\n      // fail, backup the value\n      p_ibrt_ctrl->ibrt_sco_lmphdl = hfp_status->lmp_sco_hdl;\n    }\n  }\n\n  return 0;\n}\n\nint hfp_ibrt_sco_audio_connected(hfp_sco_codec_t codec, uint16_t sco_connhdl) {\n  int ret = BT_STS_SUCCESS;\n  ibrt_ctrl_t *p_ibrt_ctrl = NULL;\n\n  TRACE(0, \"::HF_EVENT_AUDIO_CONNECTED mock\");\n\n  app_bt_device.hf_audio_state[BT_DEVICE_ID_1] = BTIF_HF_AUDIO_CON;\n  btif_hf_set_negotiated_codec(app_bt_device.hf_channel[BT_DEVICE_ID_1], codec);\n  app_audio_manager_set_scocodecid(BT_DEVICE_ID_1, codec);\n#ifdef ENABLE_HFP_AUDIO_PENDING_FOR_MEDIA\n  if (bt_media_cur_is_bt_stream_media()) {\n    app_hfp_set_starting_media_pending_flag(true, BT_DEVICE_ID_1);\n  } else\n#endif\n  {\n    app_hfp_start_voice_media(BT_DEVICE_ID_1);\n  }\n  app_ibrt_if_sniff_checker_start(APP_IBRT_IF_SNIFF_CHECKER_USER_HFP);\n\n  struct bt_cb_tag *bt_drv_func_cb = bt_drv_get_func_cb_ptr();\n  if (bt_drv_func_cb->bt_switch_agc != NULL) {\n    bt_drv_func_cb->bt_switch_agc(BT_HFP_WORK_MODE);\n  }\n\n  p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n  if (p_ibrt_ctrl->ibrt_sco_lmphdl != 0) {\n    // set backuped lmphdl if it is failed in hfp_ibrt_sync_set_status\n    TRACE(2, \"ibrt_ui_log:set sco %04x lmp hdl %02x\\n\", sco_connhdl,\n          p_ibrt_ctrl->ibrt_sco_lmphdl);\n    bt_drv_reg_op_lmp_sco_hdl_set(sco_connhdl, p_ibrt_ctrl->ibrt_sco_lmphdl);\n    p_ibrt_ctrl->ibrt_sco_lmphdl = 0;\n  }\n\n  return ret;\n}\n\nint hfp_ibrt_sco_audio_disconnected(void) {\n  int ret = BT_STS_SUCCESS;\n  TRACE(0, \"::HF_EVENT_AUDIO_DISCONNECTED mock\");\n  app_bt_device.hf_audio_state[BT_DEVICE_ID_1] = BTIF_HF_AUDIO_DISCON;\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                BT_DEVICE_ID_1, 0);\n  app_ibrt_if_sniff_checker_stop(APP_IBRT_IF_SNIFF_CHECKER_USER_HFP);\n\n  struct bt_cb_tag *bt_drv_func_cb = bt_drv_get_func_cb_ptr();\n  if (bt_drv_func_cb->bt_switch_agc != NULL) {\n    bt_drv_func_cb->bt_switch_agc(BT_IDLE_MODE);\n  }\n  return ret;\n}\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_hfp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_HFP_H__\n#define __APP_HFP_H__\n\n#include \"bluetooth.h\"\n#include \"btapp.h\"\n\n#define HF_VOICE_DISABLE  0\n#define HF_VOICE_ENABLE   1\n\n#define HF_SENDBUFF_SIZE (320)\n#define HF_SENDBUFF_MEMPOOL_NUM (2)\n\nstruct hf_sendbuff_control {\n    struct {\n        btif_bt_packet_t packet;\n        uint8_t buffer[HF_SENDBUFF_SIZE];\n    } mempool[HF_SENDBUFF_MEMPOOL_NUM];\n    uint8_t index;\n};\n\n\n#ifndef _SCO_BTPCM_CHANNEL_\nextern struct hf_sendbuff_control  hf_sendbuff_ctrl;\n#endif\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif                          /*  */\n\n#if defined(SUPPORT_BATTERY_REPORT) || defined(SUPPORT_HF_INDICATORS)\nint app_hfp_battery_report(uint8_t level);\nbt_status_t app_hfp_send_at_command(const char *cmd);\n#else\nstatic inline int app_hfp_battery_report(uint8_t level) {return 0;}\n#endif\n\nuint8_t btapp_hfp_get_call_state(void);\n\nuint8_t btapp_hfp_incoming_calls(void);\n\nbool btapp_hfp_is_call_active(void);\n\nbool btapp_hfp_is_sco_active(void);\n\nvoid btapp_hfp_report_speak_gain(void);\n\nbool btapp_hfp_mic_need_skip_frame(void);\n\nuint8_t btapp_hfp_need_mute(void);\n\n#ifdef __INTERCONNECTION__\nuint8_t ask_is_selfdefined_battery_report_AT_command_support(void);\n\nuint8_t send_selfdefined_battery_report_AT_command(void);\n#endif\n\nuint8_t  app_hfp_get_chnl_via_remDev(hf_chan_handle_t * p_hfp_chnl);\nbool app_hfp_curr_audio_up(hf_chan_handle_t hfp_chnl);\nint hfp_volume_set(enum BT_DEVICE_ID_T id, int vol);\n\n\n#ifdef __cplusplus\n}\n#endif                          /*  */\n#endif /*__APP_HFP_H__*/\n\n"
  },
  {
    "path": "services/bt_app/app_hsp.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_status_ind.h\"\n#include \"audioflinger.h\"\n#include \"bluetooth.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \n\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n\n#include \"nvrecord.h\"\n\n#include \"apps.h\"\n#include \"resources.h\"\n\n#include \"app_bt_media_manager.h\"\n\n#if defined(__HSP_ENABLE__) && defined(__BT_ONE_BRING_TWO__)\n#error can not defined at the same time.\n#endif\n\n#if defined(__HSP_ENABLE__)\n\n#define MODIFY_HS_CALL_SETUP_IN HF_CALL_SETUP_IN\n#define MODIFY_HS_CALL_ACTIVE HF_CALL_ACTIVE\n#define MODIFY_HS_CALL_NONE HF_CALL_NONE\n\nextern struct BT_DEVICE_ID_DIFF chan_id_flag;\nextern struct BT_DEVICE_T app_bt_device;\n\n#if defined(SCO_LOOP)\n#define HF_LOOP_CNT (20)\n#define HF_LOOP_SIZE (360)\n\nextern uint8_t hf_loop_buffer[HF_LOOP_CNT * HF_LOOP_SIZE];\nextern uint32_t hf_loop_buffer_len[HF_LOOP_CNT];\nextern uint32_t hf_loop_buffer_valid;\nextern uint32_t hf_loop_buffer_size;\nextern char hf_loop_buffer_w_idx;\n\n#endif\n\n#ifndef _SCO_BTPCM_CHANNEL_\nextern struct hf_sendbuff_control hf_sendbuff_ctrl;\n#endif\n\n#ifdef __BT_ONE_BRING_TWO__\nextern void hfp_chan_id_distinguish(HfChannel *Chan);\n#endif\n\nextern int store_voicebtpcm_m2p_buffer(unsigned char *buf, unsigned int len);\nextern int get_voicebtpcm_p2m_frame(unsigned char *buf, unsigned int len);\nextern int store_voicecvsd_buffer(unsigned char *buf, unsigned int len);\nextern int store_voicemsbc_buffer(unsigned char *buf, unsigned int len);\nextern int hfp_volume_get(enum BT_DEVICE_ID_T id);\nextern void hfp_volume_local_set(int8_t vol);\nextern int hfp_volume_set(enum BT_DEVICE_ID_T id, int vol);\nextern void app_bt_profile_connect_manager_hs(enum BT_DEVICE_ID_T id,\n                                              HsChannel *Chan,\n                                              HsCallbackParms *Info);\n;\n\n#ifdef __BT_ONE_BRING_TWO__\nvoid hsp_chan_id_distinguish(HsChannel *Chan) {\n  if (Chan == &app_bt_device.hs_channel[BT_DEVICE_ID_1]) {\n    chan_id_flag.id = BT_DEVICE_ID_1;\n    chan_id_flag.id_other = BT_DEVICE_ID_2;\n  } else if (Chan == &app_bt_device.hsf_channel[BT_DEVICE_ID_2]) {\n    chan_id_flag.id = BT_DEVICE_ID_2;\n    chan_id_flag.id_other = BT_DEVICE_ID_1;\n  }\n}\n#endif\n\nint app_hsp_hscommand_mempool_init(void) {\n  app_hfp_hfcommand_mempool_init();\n  return 0;\n}\n\nint app_hsp_hscommand_mempool_calloc(HsCommand **hs_cmd_p) {\n  app_hfp_hfcommand_mempool_calloc(hs_cmd_p);\n  return 0;\n}\n\nint app_hsp_hscommand_mempool_free(HsCommand *hs_cmd_p) {\n  app_hfp_hfcommand_mempool_free(hs_cmd_p);\n  return 0;\n}\n#if 0\n#define app_hsp_hscommand_mempool app_hfp_hfcommand_mempool\n#define app_hsp_hscommand_mempool_init app_hfp_hfcommand_mempool_init\n#define app_hsp_hscommand_mempool_calloc app_hfp_hfcommand_mempool_calloc\n#define app_hsp_hscommand_mempool_free app_hfp_hfcommand_mempool_free\n#endif\n\nXaStatus app_hs_handle_cmd(HsChannel *Chan, uint8_t cmd_type) {\n  HsCommand *hs_cmd_p;\n  int8_t ret = 0;\n  switch (cmd_type) {\n  case APP_REPORT_SPEAKER_VOL_CMD:\n    app_hsp_hscommand_mempool_calloc(&hs_cmd_p);\n    if (hs_cmd_p) {\n      if (HS_ReportSpeakerVolume(Chan, hfp_volume_get(chan_id_flag.id),\n                                 hs_cmd_p) != BT_STATUS_PENDING) {\n        app_hsp_hscommand_mempool_free(hs_cmd_p);\n        ret = -1;\n      }\n    }\n    break;\n  case APP_CPKD_CMD:\n    app_hsp_hscommand_mempool_calloc(&hs_cmd_p);\n    if (hs_cmd_p) {\n      if (HS_CKPD_CONTROL(Chan, hs_cmd_p) != BT_STATUS_PENDING) {\n        app_hsp_hscommand_mempool_free(hs_cmd_p);\n        ret = -1;\n      }\n    }\n    break;\n  default:\n    break;\n  }\n\n  return ret;\n}\n\n// because hfp and hsp can not exist simultaneously , so we do not need to alloc\n// 2 cmd pool!\nvoid app_hsp_init(void) {\n\n  app_hsp_hscommand_mempool_init();\n\n  app_bt_device.curr_hs_channel_id = BT_DEVICE_ID_1;\n  app_bt_device.hs_mute_flag = 0;\n\n  for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n    app_bt_device.hschan_call[i] = 0;\n    app_bt_device.hs_audio_state[i] = 0;\n    app_bt_device.hs_conn_flag[i] = 0;\n    app_bt_device.hs_voice_en[i] = 0;\n  }\n}\n\n/*\nDiffer with HFP in HF_EVENT_RING_IND:\n    Because hsp lack of some state, like         HF_EVENT_CALL_IND\n                                                                    HF_EVENT_CALLSETUP_IND\n                                                                    (DONE)\n    And for the least code modify purpose, meanwhile  keep the state runs ok.\n    i put all the state setting in HF_EVENT_RING_IND case\n*/\nvoid hsp_callback(HsChannel *Chan, HsCallbackParms *Info) {\n  uint8_t ret = 0;\n\n#ifdef __BT_ONE_BRING_TWO__\n  hsp_chan_id_distinguish(Chan);\n#else\n  chan_id_flag.id = BT_DEVICE_ID_1;\n#endif\n\n  TRACE(2, \"[%s] event = %d\", __func__, Info->event);\n\n  switch (Info->event) {\n  case HS_EVENT_SERVICE_CONNECTED:\n    TRACE(1, \"::HS_EVENT_SERVICE_CONNECTED  Chan_id:%d\\n\", chan_id_flag.id);\n    app_bt_profile_connect_manager_hs(chan_id_flag.id, Chan, Info);\n#if defined(__BTIF_EARPHONE__)\n    if (Chan->state == HF_STATE_OPEN) {\n      ////report connected voice\n      app_bt_device.hs_conn_flag[chan_id_flag.id] = 1;\n    }\n#endif\n    app_bt_stream_volume_ptr_update((uint8_t *)Info->p.remDev->bdAddr.addr);\n    if (app_hs_handle_cmd(Chan, APP_REPORT_SPEAKER_VOL_CMD) != 0)\n      TRACE(0, \"app_hs_handle_cmd err\");\n\n    break;\n  case HS_EVENT_AUDIO_DATA_SENT:\n    TRACE(1, \"::HF_EVENT_AUDIO_DATA_SENT %d\\n\", Info->event);\n#if defined(SCO_LOOP)\n    hf_loop_buffer_valid = 1;\n#endif\n    break;\n  case HS_EVENT_AUDIO_DATA:\n    TRACE(0, \"HF_EVENT_AUDIO_DATA\");\n    {\n\n#ifndef _SCO_BTPCM_CHANNEL_\n      uint32_t idx = 0;\n      if (app_bt_stream_isrun(APP_BT_STREAM_HFP_PCM)) {\n        store_voicebtpcm_m2p_buffer(Info->p.audioData->data,\n                                    Info->p.audioData->len);\n\n        idx = hf_sendbuff_ctrl.index % HF_SENDBUFF_MEMPOOL_NUM;\n        get_voicebtpcm_p2m_frame(&(hf_sendbuff_ctrl.mempool[idx].buffer[0]),\n                                 Info->p.audioData->len);\n        hf_sendbuff_ctrl.mempool[idx].packet.data =\n            &(hf_sendbuff_ctrl.mempool[idx].buffer[0]);\n        hf_sendbuff_ctrl.mempool[idx].packet.dataLen = Info->p.audioData->len;\n        hf_sendbuff_ctrl.mempool[idx].packet.flags = BTP_FLAG_NONE;\n        if (!app_bt_device.hf_mute_flag) {\n          HF_SendAudioData(Chan, &hf_sendbuff_ctrl.mempool[idx].packet);\n        }\n        hf_sendbuff_ctrl.index++;\n      }\n#endif\n    }\n\n#if defined(SCO_LOOP)\n    memcpy(hf_loop_buffer + hf_loop_buffer_w_idx * HF_LOOP_SIZE,\n           Info->p.audioData->data, Info->p.audioData->len);\n    hf_loop_buffer_len[hf_loop_buffer_w_idx] = Info->p.audioData->len;\n    hf_loop_buffer_w_idx = (hf_loop_buffer_w_idx + 1) % HF_LOOP_CNT;\n    ++hf_loop_buffer_size;\n\n    if (hf_loop_buffer_size >= 18 && hf_loop_buffer_valid == 1) {\n      hf_loop_buffer_valid = 0;\n      idx = hf_loop_buffer_w_idx - 17 < 0\n                ? (HF_LOOP_CNT - (17 - hf_loop_buffer_w_idx))\n                : hf_loop_buffer_w_idx - 17;\n      pkt.flags = BTP_FLAG_NONE;\n      pkt.dataLen = hf_loop_buffer_len[idx];\n      pkt.data = hf_loop_buffer + idx * HF_LOOP_SIZE;\n      HF_SendAudioData(Chan, &pkt);\n    }\n#endif\n    break;\n  case HS_EVENT_SERVICE_DISCONNECTED:\n    TRACE(2, \"::HS_EVENT_SERVICE_DISCONNECTED Chan_id:%d, reason=%x\\n\",\n          chan_id_flag.id, Info->p.remDev->discReason);\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                  chan_id_flag.id, MAX_RECORD_NUM);\n\n#if defined(__BTIF_EARPHONE__)\n    if (app_bt_device.hs_conn_flag[chan_id_flag.id]) {\n      ////report device disconnected voice\n      app_bt_device.hs_conn_flag[chan_id_flag.id] = 0;\n    }\n#endif\n    app_bt_stream_volume_ptr_update(NULL);\n\n    app_bt_profile_connect_manager_hs(chan_id_flag.id, Chan, Info);\n    for (uint8_t i = 0; i < BT_DEVICE_NUM; i++) {\n      if (Chan == &(app_bt_device.hs_channel[i])) {\n        app_bt_device.hschan_call[i] = 0;\n        app_bt_device.hs_audio_state[i] = 0;\n        app_bt_device.hs_conn_flag[i] = 0;\n        app_bt_device.hs_voice_en[i] = 0;\n      }\n    }\n    break;\n\n  case HS_EVENT_AUDIO_CONNECTED:\n\n    if (Info->status == BT_STATUS_SUCCESS) {\n      TRACE(1, \"::HS_EVENT_AUDIO_CONNECTED  chan_id:%d\\n\", chan_id_flag.id);\n      if ((Chan->state == HF_STATE_OPEN) &&\n          (app_bt_device.hs_conn_flag[chan_id_flag.id] == 1)) {\n        app_bt_device.hschan_call[BT_DEVICE_ID_1] = MODIFY_HS_CALL_ACTIVE;\n      }\n\n      app_bt_device.curr_hs_channel_id = chan_id_flag.id;\n\n      app_bt_device.phone_earphone_mark = 0;\n      app_bt_device.hs_mute_flag = 0;\n\n      app_bt_device.hs_audio_state[chan_id_flag.id] = HF_AUDIO_CON;\n\n#if defined(__FORCE_REPORTVOLUME_SOCON__)\n\n      app_hs_handle_cmd(Chan, APP_REPORT_SPEAKER_VOL_CMD);\n\n#endif\n\n      if (bt_media_cur_is_bt_stream_media()) {\n        app_hfp_set_starting_media_pending_flag(true, BT_DEVICE_ID_1);\n      } else {\n        app_hfp_start_voice_media(BT_DEVICE_ID_1);\n      }\n    }\n    break;\n  case HS_EVENT_AUDIO_DISCONNECTED:\n    TRACE(1, \"::HS_EVENT_AUDIO_DISCONNECTED  chan_id:%d\\n\", chan_id_flag.id);\n\n    if (app_bt_device.hschan_call[chan_id_flag.id] == HF_CALL_ACTIVE) {\n      app_bt_device.phone_earphone_mark = 1;\n    }\n\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_STOP, BT_STREAM_VOICE,\n                                  BT_DEVICE_ID_1, MAX_RECORD_NUM);\n\n    break;\n\n  case HS_EVENT_RING_IND:\n    TRACE(1, \"::HS_EVENT_RING_IND  chan_id:%d\\n\", chan_id_flag.id);\n#if defined(__BTIF_EARPHONE__)\n    //        if(app_bt_device.hs_audio_state[chan_id_flag.id] != HF_AUDIO_CON)\n    app_voice_report(APP_STATUS_INDICATION_INCOMINGCALL, chan_id_flag.id);\n#endif\n\n    break;\n  case HS_EVENT_SPEAKER_VOLUME:\n    TRACE(2, \"::HS_EVENT_SPEAKER_VOLUME  chan_id:%d,speaker gain = %x\\n\",\n          chan_id_flag.id, Info->p.ptr);\n    hfp_volume_set(chan_id_flag.id, (int)(uint32_t)Info->p.ptr);\n    break;\n\n  case HS_EVENT_COMMAND_COMPLETE:\n    TRACE(2, \"::EVENT_HS_COMMAND_COMPLETE  chan_id:%d %x\\n\", chan_id_flag.id,\n          (HsCommand *)Info->p.ptr);\n    if (Info->p.ptr)\n      app_hsp_hscommand_mempool_free((HsCommand *)Info->p.ptr);\n    break;\n  default:\n    break;\n  }\n}\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_keyhandle.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// #include \"mbed.h\"\n#include \"analog.h\"\n#include \"audioflinger.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \n\n#include \"a2dp_api.h\"\n#include \"avctp_api.h\"\n#include \"avdtp_api.h\"\n#include \"avrcp_api.h\"\n#include \"hfp_api.h\"\n#include \"me_api.h\"\n\n#include \"besbt.h\"\n\n#include \"app_audio.h\"\n#include \"app_key.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n\n#include \"app_bt.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_bt_stream.h\"\n#include \"app_hfp.h\"\n#include \"apps.h\"\n#include \"bt_if.h\"\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n#include \"nvrecord_env.h\"\n#endif\n\n#include \"os_api.h\"\nextern struct BT_DEVICE_T app_bt_device;\n// BT_DEVICE_ID_T g_current_device_id=BT_DEVICE_NUM;  //used to change sco by\n// one-bring-two BT_DEVICE_ID_T g_another_device_id=BT_DEVICE_NUM;  //used to\n// change sco by one-bring-two\n\n#ifdef BTIF_HID_DEVICE\n#include \"app_bt_hid.h\"\n#endif\n\n#ifdef SUPPORT_SIRI\nextern int app_hfp_siri_report();\nextern int app_hfp_siri_voice(bool en);\nint open_siri_flag = 0;\nvoid bt_key_handle_siri_key(enum APP_KEY_EVENT_T event) {\n  switch (event) {\n  case APP_KEY_EVENT_NONE:\n    if (open_siri_flag == 1) {\n      TRACE(0, \"open siri\");\n      app_hfp_siri_voice(true);\n      open_siri_flag = 0;\n    } /*else {\n        TRACE(0,\"evnet none close siri\");\n        app_hfp_siri_voice(false);\n    }*/\n    break;\n  case APP_KEY_EVENT_LONGLONGPRESS:\n  case APP_KEY_EVENT_UP:\n    // TRACE(0,\"long long/up/click event close siri\");\n    // app_hfp_siri_voice(false);\n    break;\n  default:\n    TRACE(1, \"unregister down key event=%x\", event);\n    break;\n  }\n}\n\n#endif\n\n// bool hf_mute_flag = 0;\n\n#if defined(__HSP_ENABLE__)\n\nextern XaStatus app_hs_handle_cmd(HsChannel *Chan, uint8_t cmd_type);\n\nvoid hsp_handle_key(uint8_t hsp_key) {\n  HsCommand *hs_cmd_p;\n  HsChannel *hs_channel_tmp = NULL;\n  uint8_t ret = 0;\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T another_device_id =\n      (app_bt_device.curr_hs_channel_id == BT_DEVICE_ID_1) ? BT_DEVICE_ID_2\n                                                           : BT_DEVICE_ID_1;\n  TRACE(1, \"!!!hsp_handle_key curr_hf_channel=%d\\n\",\n        app_bt_device.curr_hs_channel_id);\n  hs_channel_tmp = (app_bt_device.curr_hs_channel_id == BT_DEVICE_ID_1)\n                       ? &(app_bt_device.hs_channel[BT_DEVICE_ID_1])\n                       : &(app_bt_device.hs_channel[BT_DEVICE_ID_2]);\n#else\n  hs_channel_tmp = &(app_bt_device.hs_channel[BT_DEVICE_ID_1]);\n#endif\n\n  if (hsp_key == HSP_KEY_CKPD_CONTROL) {\n    TRACE(0, \"hsp_key = HSP_KEY_CKPD_CONTROL\");\n    if (app_hs_handle_cmd(hs_channel_tmp, APP_CPKD_CMD) != 0)\n      TRACE(0, \"app_hs_handle_cmd err\");\n\n  } else if (hsp_key == HSP_KEY_CHANGE_TO_PHONE) {\n    TRACE(0, \"hsp_key = HSP_KEY_CHANGE_TO_PHONE\");\n    HS_DisconnectAudioLink(hs_channel_tmp);\n  } else if (hsp_key == HSP_KEY_ADD_TO_EARPHONE) {\n    TRACE(0, \"hsp_key = HSP_KEY_ADD_TO_EARPHONE\");\n    HS_CreateAudioLink(hs_channel_tmp);\n  }\n}\n#endif\n#ifdef __BT_ONE_BRING_TWO__\nuint8_t gHfcallNextSta = HFCALL_NEXT_STA_NULL;\nvoid hfcall_next_sta_handler(hf_event_t event) {\n  TRACE(0, \"!!!hfcall_next_sta_handler curr_hf_channel=%d,gHfcallNextSta %d\\n\",\n        app_bt_device.curr_hf_channel_id, gHfcallNextSta);\n  // hf_chan_handle_t hf_channel_curr =\n  // app_bt_device.hf_channel[app_bt_device.curr_hf_channel_id];\n  enum BT_DEVICE_ID_T another_device_id =\n      (app_bt_device.curr_hf_channel_id == BT_DEVICE_ID_1) ? BT_DEVICE_ID_2\n                                                           : BT_DEVICE_ID_1;\n  hf_chan_handle_t hf_channel_another =\n      app_bt_device.hf_channel[another_device_id];\n\n  switch (gHfcallNextSta) {\n  case HFCALL_NEXT_STA_NULL:\n    break;\n  case HFCALL_NEXT_STA_ANOTHER_ANSWER:\n    if (event == BTIF_HF_EVENT_AUDIO_DISCONNECTED) {\n      TRACE(0, \"NEXT_ACTION = HFP_ANSWER_ANOTHER_CALL\\n\");\n      btif_hf_answer_call(hf_channel_another);\n      gHfcallNextSta = HFCALL_NEXT_STA_NULL;\n    }\n  case HFCALL_NEXT_STA_ANOTHER_ADDTOEARPHONE:\n    if (event == BTIF_HF_EVENT_AUDIO_DISCONNECTED) {\n      TRACE(0, \"NEXT_ACTION = HFP_ANOTHER_ADDTOEARPHONE\\n\");\n      btif_hf_create_audio_link(hf_channel_another);\n      gHfcallNextSta = HFCALL_NEXT_STA_NULL;\n    }\n    break;\n  }\n}\n#endif\nvoid hfp_handle_key(uint8_t hfp_key) {\n  hf_chan_handle_t hf_channel_curr =\n      app_bt_device.hf_channel[app_bt_device.curr_hf_channel_id];\n#ifdef __BT_ONE_BRING_TWO__\n  enum BT_DEVICE_ID_T another_device_id =\n      (app_bt_device.curr_hf_channel_id == BT_DEVICE_ID_1) ? BT_DEVICE_ID_2\n                                                           : BT_DEVICE_ID_1;\n  hf_chan_handle_t hf_channel_another =\n      app_bt_device.hf_channel[another_device_id];\n#endif\n  switch (hfp_key) {\n  case HFP_KEY_ANSWER_CALL:\n    /// answer a incomming call\n    TRACE(0, \"avrcp_key = HFP_KEY_ANSWER_CALL\\n\");\n    btif_hf_answer_call(hf_channel_curr);\n    break;\n  case HFP_KEY_HANGUP_CALL:\n    TRACE(0, \"avrcp_key = HFP_KEY_HANGUP_CALL\\n\");\n    btif_hf_hang_up_call(hf_channel_curr);\n    break;\n  case HFP_KEY_REDIAL_LAST_CALL:\n    /// redail the last call\n    TRACE(0, \"avrcp_key = HFP_KEY_REDIAL_LAST_CALL\\n\");\n    btif_hf_redial_call(hf_channel_curr);\n    break;\n  case HFP_KEY_CHANGE_TO_PHONE:\n    /// remove sco and voice change to phone\n    if (app_bt_is_hfp_audio_on()) {\n      TRACE(0, \"avrcp_key = HFP_KEY_CHANGE_TO_PHONE\\n\");\n      btif_hf_disc_audio_link(hf_channel_curr);\n    }\n    break;\n  case HFP_KEY_ADD_TO_EARPHONE:\n    /// add a sco and voice change to earphone\n    if (!app_bt_is_hfp_audio_on()) {\n      TRACE(0, \"avrcp_key = HFP_KEY_ADD_TO_EARPHONE ver:%x\\n\",\n            btif_hf_get_version(hf_channel_curr));\n#if defined(HFP_1_6_ENABLE)\n      // if (hf_channel_tmp->negotiated_codec == HF_SCO_CODEC_MSBC){\n      if (btif_hf_get_negotiated_codec(hf_channel_curr) ==\n          BTIF_HF_SCO_CODEC_MSBC) {\n        TRACE(0, \"at+bcc\");\n#ifdef __HFP_OK__\n        hfp_handle_add_to_earphone_1_6(hf_channel_curr);\n#endif\n        TRACE(0, \"CreateAudioLink\");\n        btif_hf_create_audio_link(hf_channel_curr);\n      } else\n#endif\n      {\n        TRACE(0, \"CreateAudioLink\");\n        btif_hf_create_audio_link(hf_channel_curr);\n      }\n    }\n    break;\n  case HFP_KEY_MUTE:\n    TRACE(0, \"avrcp_key = HFP_KEY_MUTE\\n\");\n    app_bt_device.hf_mute_flag = 1;\n    break;\n  case HFP_KEY_CLEAR_MUTE:\n    TRACE(0, \"avrcp_key = HFP_KEY_CLEAR_MUTE\\n\");\n    app_bt_device.hf_mute_flag = 0;\n    break;\n  case HFP_KEY_THREEWAY_HOLD_AND_ANSWER:\n    TRACE(0, \"avrcp_key = HFP_KEY_THREEWAY_HOLD_AND_ANSWER\\n\");\n    btif_hf_call_hold(hf_channel_curr, BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n    break;\n  case HFP_KEY_THREEWAY_HANGUP_AND_ANSWER:\n    TRACE(0, \"avrcp_key = HFP_KEY_THREEWAY_HOLD_SWAP_ANSWER\\n\");\n    btif_hf_call_hold(hf_channel_curr, BTIF_HF_HOLD_RELEASE_ACTIVE_CALLS, 0);\n    break;\n  case HFP_KEY_THREEWAY_HOLD_REL_INCOMING:\n    TRACE(0, \"avrcp_key = HFP_KEY_THREEWAY_HOLD_REL_INCOMING\\n\");\n    btif_hf_call_hold(hf_channel_curr, BTIF_HF_HOLD_RELEASE_HELD_CALLS, 0);\n    break;\n#ifdef __BT_ONE_BRING_TWO__\n  case HFP_KEY_DUAL_HF_HANGUP_ANOTHER:\n    TRACE(0, \"avrcp_key = HFP_KEY_DUAL_HF_HANGUP_ANOTHER\\n\");\n    btif_hf_hang_up_call(hf_channel_another);\n    break;\n  case HFP_KEY_DUAL_HF_HANGUP_CURR_ANSWER_ANOTHER:\n    TRACE(0, \"avrcp_key = HFP_KEY_DUAL_HF_HANGUP_CURR_ANSWER_ANOTHER\\n\");\n    btif_hf_hang_up_call(hf_channel_curr);\n    gHfcallNextSta = HFCALL_NEXT_STA_ANOTHER_ANSWER;\n    break;\n  case HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER:\n    TRACE(0, \"avrcp_key = HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER\\n\");\n#ifdef __HFP_OK__\n    hf_answer_call(hf_channel_another);\n#endif\n    break;\n  case HFP_KEY_DUAL_HF_CHANGETOPHONE_ANSWER_ANOTHER:\n    TRACE(0, \"avrcp_key = HFP_KEY_DUAL_HF_CHANGETOPHONE_ANSWER_ANOTHER\\n\");\n    btif_hf_disc_audio_link(hf_channel_curr);\n    gHfcallNextSta = HFCALL_NEXT_STA_ANOTHER_ANSWER;\n    break;\n  case HFP_KEY_DUAL_HF_CHANGETOPHONE_ANOTHER_ADDTOEARPHONE:\n    TRACE(0,\n          \"avrcp_key = HFP_KEY_DUAL_HF_CHANGETOPHONE_ANOTHER_ADDTOEARPHONE\\n\");\n    btif_hf_disc_audio_link(hf_channel_curr);\n    gHfcallNextSta = HFCALL_NEXT_STA_ANOTHER_ADDTOEARPHONE;\n    break;\n  case HFP_KEY_DUAL_HF_HANGUP_ANOTHER_ADDTOEARPHONE:\n    TRACE(0, \"avrcp_key = HFP_KEY_DUAL_HF_HANGUP_ANOTHER_ADDTOEARPHONE\\n\");\n    btif_hf_hang_up_call(hf_channel_curr);\n    gHfcallNextSta = HFCALL_NEXT_STA_ANOTHER_ADDTOEARPHONE;\n    break;\n#endif\n\n  default:\n    break;\n  }\n}\n\n// bool a2dp_play_pause_flag = 0;\nuint8_t get_avrcp_via_a2dp_id(uint8_t a2dp_id);\nextern void a2dp_handleKey(uint8_t a2dp_key) {\n  btif_avrcp_channel_t *avrcp_channel_tmp = NULL;\n  enum BT_DEVICE_ID_T avrcp_id = BT_DEVICE_NUM;\n  if (app_bt_device.a2dp_state[app_bt_device.curr_a2dp_stream_id] == 0)\n    return;\n\n#ifdef __BT_ONE_BRING_TWO__\n  TRACE(1, \"!!!a2dp_handleKey curr_a2dp_stream_id=%d\\n\",\n        app_bt_device.curr_a2dp_stream_id);\n  avrcp_id = (enum BT_DEVICE_ID_T)get_avrcp_via_a2dp_id(\n      app_bt_device.curr_a2dp_stream_id);\n  if (avrcp_id == BT_DEVICE_NUM)\n    avrcp_id = BT_DEVICE_ID_1;\n  avrcp_channel_tmp = app_bt_device.avrcp_channel[avrcp_id];\n#else\n  avrcp_id = BT_DEVICE_ID_1;\n  avrcp_channel_tmp = app_bt_device.avrcp_channel[avrcp_id];\n#endif\n\n  if (!btif_avrcp_is_control_channel_connected(avrcp_channel_tmp)) {\n    TRACE(1, \"avrcp_key %d the channel is not connected\", a2dp_key);\n    return;\n  }\n\n  switch (a2dp_key) {\n  case AVRCP_KEY_STOP:\n    TRACE(0, \"avrcp_key = AVRCP_KEY_STOP\");\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_STOP, TRUE);\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_STOP, FALSE);\n    app_bt_device.a2dp_play_pause_flag = 0;\n    break;\n  case AVRCP_KEY_PLAY:\n    TRACE(0, \"avrcp_key = AVRCP_KEY_PLAY\");\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_PLAY, TRUE);\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_PLAY, FALSE);\n    app_bt_device.a2dp_play_pause_flag = 1;\n    break;\n  case AVRCP_KEY_PAUSE:\n    TRACE(0, \"avrcp_key = AVRCP_KEY_PAUSE\");\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_PAUSE, TRUE);\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_PAUSE, FALSE);\n    app_bt_device.a2dp_play_pause_flag = 0;\n    break;\n  case AVRCP_KEY_FORWARD:\n    TRACE(0, \"avrcp_key = AVRCP_KEY_FORWARD\");\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_FORWARD, TRUE);\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_FORWARD, FALSE);\n    app_bt_device.a2dp_play_pause_flag = 1;\n    break;\n  case AVRCP_KEY_BACKWARD:\n    TRACE(0, \"avrcp_key = AVRCP_KEY_BACKWARD\");\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_BACKWARD, TRUE);\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_BACKWARD, FALSE);\n    app_bt_device.a2dp_play_pause_flag = 1;\n    break;\n  case AVRCP_KEY_VOLUME_UP:\n    TRACE(0, \"avrcp_key = AVRCP_KEY_VOLUME_UP\");\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_VOLUME_UP, TRUE);\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_VOLUME_UP,\n                             FALSE);\n    break;\n  case AVRCP_KEY_VOLUME_DOWN:\n    TRACE(0, \"avrcp_key = AVRCP_KEY_VOLUME_DOWN\");\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_VOLUME_DOWN,\n                             TRUE);\n    btif_avrcp_set_panel_key(avrcp_channel_tmp, BTIF_AVRCP_POP_VOLUME_DOWN,\n                             FALSE);\n    break;\n  default:\n    break;\n  }\n}\n\n// uint8_t phone_earphone_mark = 0;\n#if 0 // def __BT_ONE_BRING_TWO__\n#define HF_CHANNEL_SWITCH_HOOK_USER APP_BT_GOLBAL_HANDLE_HOOK_USER_0\n\nenum HF_CHANNEL_SWITCH_STATUS{\n    HF_CHANNEL_SWITCH_STATUS_IDLE,\n    HF_CHANNEL_SWITCH_STATUS_ONPROCESS,\n};\n\nstruct HF_CHANNEL_SWITCH_ENV_T{\n    BT_DEVICE_ID_T old_device_id;\n    hf_chan_handle_t hf_channel_old;\n    BT_DEVICE_ID_T new_device_id;\n    hf_chan_handle_t hf_channel_new;\n    enum HF_CHANNEL_SWITCH_STATUS status;\n}hf_channel_switch_env;\n\nstatic void bt_key_hf_channel_switch_hook(const btif_event_t *Event);\n\nstatic void bt_key_hf_channel_switch_stop(void)\n{\n    hf_channel_switch_env.status = HF_CHANNEL_SWITCH_STATUS_IDLE;\n    hf_channel_switch_env.old_device_id = BT_DEVICE_NUM;\n    hf_channel_switch_env.hf_channel_old = NULL;\n    hf_channel_switch_env.new_device_id = BT_DEVICE_NUM;\n    hf_channel_switch_env.hf_channel_new  = NULL;\n    app_bt_global_handle_hook_set(HF_CHANNEL_SWITCH_HOOK_USER, NULL);\n}\n\n#ifdef __HF_KEEP_ONE_ALIVE__\nstatic void bt_key_hf_channel_switch_active(BT_DEVICE_ID_T current_id, BT_DEVICE_ID_T another_id)\n{\n    TRACE(2,\"switch_active %d-->%d\", current_id, another_id);\n\n    hf_channel_switch_env.old_device_id = current_id;\n    hf_channel_switch_env.hf_channel_old = (app_bt_device.hf_channel[current_id]);\n\n    hf_channel_switch_env.new_device_id = another_id;\n    hf_channel_switch_env.hf_channel_new = (app_bt_device.hf_channel[another_id]);\n\n    app_bt_HF_DisconnectAudioLink(hf_channel_switch_env.hf_channel_old);\n    app_bt_HF_CreateAudioLink(hf_channel_switch_env.hf_channel_new);\n}\n#endif\n\nstatic void bt_key_hf_channel_switch_start(void)\n{\n    uint8_t i;\n\n    TRACE(2,\"%s status:%d enter\",__func__, hf_channel_switch_env.status );\n    if (hf_channel_switch_env.status == HF_CHANNEL_SWITCH_STATUS_ONPROCESS){\n        return;\n    }\n\n    for (i=0; i= BTIF_HF_CALL_SETUP_OUT) &&\n           current_call == BTIF_HF_CALL_NONE) {\n    TRACE(\n        0,\n        \"current hfcall machine status is HFCALL_MACHINE_CURRENT_OUTGOING!!!!\");\n    status = HFCALL_MACHINE_CURRENT_OUTGOING;\n  }\n  // current AG is calling.\n  else if ((current_callSetup == BTIF_HF_CALL_SETUP_NONE) &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld != BTIF_HF_CALL_HELD_ACTIVE) {\n    TRACE(\n        0,\n        \"current hfcall machine status is HFCALL_MACHINE_CURRENT_CALLING!!!!\");\n    status = HFCALL_MACHINE_CURRENT_CALLING;\n  }\n  // current AG is 3way incomming.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_IN &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld == BTIF_HF_CALL_HELD_NONE) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_3WAY_INCOMMING!!!!\");\n    status = HFCALL_MACHINE_CURRENT_3WAY_INCOMMING;\n  }\n  // current AG is 3way hold calling.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld == BTIF_HF_CALL_HELD_ACTIVE) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING!!!!\");\n    status = HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING;\n  } else {\n    TRACE(0, \"current hfcall machine status is not found!!!!!!\");\n  }\n#else\n  // current AG is idle , another AG is idle.\n  if (current_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n      current_call == BTIF_HF_CALL_NONE &&\n      current_audioState == BTIF_HF_AUDIO_DISCON &&\n      another_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n      another_call == BTIF_HF_CALL_NONE &&\n      another_audioState == BTIF_HF_AUDIO_DISCON) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_IDLE_ANOTHER_IDLE!!!!\");\n    status = HFCALL_MACHINE_CURRENT_IDLE_ANOTHER_IDLE;\n  }\n  // current AG is on incomming , another AG is idle.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_IN &&\n           current_call == BTIF_HF_CALL_NONE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           another_call == BTIF_HF_CALL_NONE &&\n           another_audioState == BTIF_HF_AUDIO_DISCON) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_IDLE!!!!\");\n    status = HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_IDLE;\n  }\n  // current AG is on outgoing , another AG is idle.\n  else if (current_callSetup >= BTIF_HF_CALL_SETUP_OUT &&\n           current_call == BTIF_HF_CALL_NONE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           another_call == BTIF_HF_CALL_NONE &&\n           another_audioState == BTIF_HF_AUDIO_DISCON) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_IDLE!!!!\");\n    status = HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_IDLE;\n  }\n  // current AG is on calling , another AG is idle.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld != BTIF_HF_CALL_HELD_ACTIVE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           another_call == BTIF_HF_CALL_NONE &&\n           another_audioState == BTIF_HF_AUDIO_DISCON) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_IDLE!!!!\");\n    status = HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_IDLE;\n  }\n  // current AG is 3way incomming , another AG is idle.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_IN &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld == BTIF_HF_CALL_HELD_NONE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           another_call == BTIF_HF_CALL_NONE &&\n           another_audioState == BTIF_HF_AUDIO_DISCON) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_3WAY_INCOMMING_ANOTHER_IDLE!!!!\");\n    status = HFCALL_MACHINE_CURRENT_3WAY_INCOMMING_ANOTHER_IDLE;\n  }\n  // current AG is 3way hold calling , another AG is without connecting.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld == BTIF_HF_CALL_HELD_ACTIVE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           another_call == BTIF_HF_CALL_NONE &&\n           another_audioState == BTIF_HF_AUDIO_DISCON) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING_ANOTHER_IDLE!!!!\");\n    status = HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING_ANOTHER_IDLE;\n  }\n  // current AG is incomming , another AG is incomming too.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_IN &&\n           current_call == BTIF_HF_CALL_NONE &&\n           current_callheld == BTIF_HF_CALL_HELD_NONE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_IN &&\n           another_call == BTIF_HF_CALL_NONE &&\n           another_callheld == BTIF_HF_CALL_HELD_NONE) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_INCOMMING!!!!\");\n    status = HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_INCOMMING;\n  }\n  // current AG is outgoing , another AG is incomming too.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_OUT &&\n           current_call == BTIF_HF_CALL_NONE &&\n           current_callheld == BTIF_HF_CALL_HELD_NONE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_IN &&\n           another_call == BTIF_HF_CALL_NONE &&\n           another_callheld == BTIF_HF_CALL_HELD_NONE) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_INCOMMING!!!!\");\n    status = HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_INCOMMING;\n  }\n  // current AG is calling , another AG is incomming.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld == BTIF_HF_CALL_HELD_NONE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_IN &&\n           another_call == BTIF_HF_CALL_NONE &&\n           another_callheld == BTIF_HF_CALL_HELD_NONE) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_INCOMMING!!!!\");\n    status = HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_INCOMMING;\n  }\n  // current AG is on calling , another AG calling changed to phone.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld == BTIF_HF_CALL_HELD_NONE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           another_call == BTIF_HF_CALL_ACTIVE &&\n           another_callheld == BTIF_HF_CALL_HELD_NONE &&\n           another_audioState == BTIF_HF_AUDIO_DISCON) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_CHANGETOPHONE!!!!\");\n    status = HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_CHANGETOPHONE;\n  }\n  // current AG is on calling , another AG calling is hold.\n  else if (current_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           current_call == BTIF_HF_CALL_ACTIVE &&\n           current_callheld == BTIF_HF_CALL_HELD_NONE &&\n           another_callSetup == BTIF_HF_CALL_SETUP_NONE &&\n           another_call == BTIF_HF_CALL_ACTIVE &&\n           another_callheld == BTIF_HF_CALL_HELD_ACTIVE) {\n    TRACE(0, \"current hfcall machine status is \"\n             \"HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_HOLD!!!!\");\n    status = HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_HOLD;\n  } else {\n    TRACE(0, \"current hfcall machine status is not found!!!!!!\");\n  }\n#endif\n  //    TRACE(0,\"%s status is %d\",__func__,status);\n  return status;\n}\n\nvoid bt_key_handle_func_click(void) {\n  TRACE(0, \"%s enter\", __func__);\n\n  HFCALL_MACHINE_ENUM hfcall_machine = app_get_hfcall_machine();\n  switch (hfcall_machine) {\n  case HFCALL_MACHINE_CURRENT_IDLE: {\n    if (app_bt_device.a2dp_play_pause_flag == 0) {\n      a2dp_handleKey(AVRCP_KEY_PLAY);\n    } else {\n      a2dp_handleKey(AVRCP_KEY_PAUSE);\n    }\n  } break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING:\n    hfp_handle_key(HFP_KEY_ANSWER_CALL);\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING:\n    hfp_handle_key(HFP_KEY_HANGUP_CALL);\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING:\n    hfp_handle_key(HFP_KEY_HANGUP_CALL);\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_INCOMMING:\n    hfp_handle_key(HFP_KEY_THREEWAY_HANGUP_AND_ANSWER);\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING:\n    hfp_handle_key(HFP_KEY_THREEWAY_HOLD_AND_ANSWER);\n    break;\n#ifdef __BT_ONE_BRING_TWO__\n  case HFCALL_MACHINE_CURRENT_IDLE_ANOTHER_IDLE: {\n    if (app_bt_device.a2dp_play_pause_flag == 0) {\n      a2dp_handleKey(AVRCP_KEY_PLAY);\n    } else {\n      a2dp_handleKey(AVRCP_KEY_PAUSE);\n    }\n  } break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_ANSWER_CALL);\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_HANGUP_CALL);\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_HANGUP_CALL);\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_INCOMMING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_THREEWAY_HANGUP_AND_ANSWER);\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_THREEWAY_HOLD_AND_ANSWER);\n    break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_INCOMMING:\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_INCOMMING:\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_INCOMMING:\n    hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_CURR_ANSWER_ANOTHER);\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_CHANGETOPHONE:\n    hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_ANOTHER_ADDTOEARPHONE);\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_HOLD:\n    hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_CURR_ANSWER_ANOTHER);\n    break;\n#endif\n  default:\n    break;\n  }\n#if defined(__HSP_ENABLE__)\n  // now we know it is HSP active !\n  if (app_bt_device.hs_conn_flag[app_bt_device.curr_hs_channel_id] == 1) {\n    hsp_handle_key(HSP_KEY_CKPD_CONTROL);\n  }\n#endif\n#if HF_CUSTOM_FEATURE_SUPPORT & HF_CUSTOM_FEATURE_SIRI_REPORT\n  open_siri_flag = 0;\n#endif\n  return;\n}\nvoid bt_key_handle_func_doubleclick(void) {\n  TRACE(0, \"%s enter\", __func__);\n\n  HFCALL_MACHINE_ENUM hfcall_machine = app_get_hfcall_machine();\n\n#ifdef SUPPORT_SIRI\n  open_siri_flag = 0;\n#endif\n\n  switch (hfcall_machine) {\n  case HFCALL_MACHINE_CURRENT_IDLE:\n#ifdef BTIF_HID_DEVICE\n    app_bt_hid_send_capture(app_bt_device.hid_channel[BT_DEVICE_ID_1]);\n#else\n    hfp_handle_key(HFP_KEY_REDIAL_LAST_CALL);\n#endif\n    break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING:\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING:\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING:\n    if (app_bt_device.hf_mute_flag == 0) {\n      hfp_handle_key(HFP_KEY_MUTE);\n      app_bt_device.hf_mute_flag = 1;\n    } else {\n      hfp_handle_key(HFP_KEY_CLEAR_MUTE);\n      app_bt_device.hf_mute_flag = 0;\n    }\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_INCOMMING:\n    hfp_handle_key(HFP_KEY_THREEWAY_HOLD_REL_INCOMING);\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING:\n    break;\n#ifdef __BT_ONE_BRING_TWO__\n  case HFCALL_MACHINE_CURRENT_IDLE_ANOTHER_IDLE:\n#ifdef BTIF_HID_DEVICE\n    app_bt_hid_send_capture(app_bt_device.hid_channel[BT_DEVICE_ID_1]);\n#else\n    hfp_handle_key(HFP_KEY_REDIAL_LAST_CALL);\n#endif\n    break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_IDLE:\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_IDLE:\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_IDLE:\n    if (app_bt_device.hf_mute_flag == 0) {\n      hfp_handle_key(HFP_KEY_MUTE);\n    } else {\n      hfp_handle_key(HFP_KEY_CLEAR_MUTE);\n    }\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_INCOMMING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_THREEWAY_HOLD_REL_INCOMING);\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING_ANOTHER_IDLE:\n    break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_INCOMMING:\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_INCOMMING:\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_INCOMMING:\n    hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_ANOTHER);\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_CHANGETOPHONE:\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_HOLD:\n    break;\n#endif\n  default:\n    break;\n  }\n}\nvoid bt_key_handle_func_longpress(void) {\n  TRACE(0, \"%s enter\", __func__);\n  HFCALL_MACHINE_ENUM hfcall_machine = app_get_hfcall_machine();\n#ifdef SUPPORT_SIRI\n  open_siri_flag = 0;\n#endif\n  app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n\n  switch (hfcall_machine) {\n  case HFCALL_MACHINE_CURRENT_IDLE: {\n#if HF_CUSTOM_FEATURE_SUPPORT & HF_CUSTOM_FEATURE_SIRI_REPORT\n    if (open_siri_flag == 0) {\n      app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n      open_siri_flag = 1;\n    }\n#endif\n  } break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING:\n    hfp_handle_key(HFP_KEY_HANGUP_CALL);\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING:\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING: {\n    if (app_bt_device.phone_earphone_mark == 0) {\n      // call is active, switch from earphone to phone\n      hfp_handle_key(HFP_KEY_CHANGE_TO_PHONE);\n    } else if (app_bt_device.phone_earphone_mark == 1) {\n      // call is active, switch from phone to earphone\n      hfp_handle_key(HFP_KEY_ADD_TO_EARPHONE);\n    }\n  } break;\n  case HFCALL_MACHINE_CURRENT_3WAY_INCOMMING: {\n    app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n    hfp_handle_key(HFP_KEY_THREEWAY_HOLD_AND_ANSWER);\n  } break;\n  case HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING:\n    hfp_handle_key(HFP_KEY_THREEWAY_HANGUP_AND_ANSWER);\n    break;\n#ifdef __BT_ONE_BRING_TWO__\n  case HFCALL_MACHINE_CURRENT_IDLE_ANOTHER_IDLE:\n#ifdef BTIF_HID_DEVICE\n    Hid_Send_capture(&app_bt_device.hid_channel[BT_DEVICE_ID_1]);\n#endif\n    break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_HANGUP_CALL);\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_IDLE:\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_IDLE: {\n    if (app_bt_device.phone_earphone_mark == 0) {\n      // call is active, switch from earphone to phone\n      hfp_handle_key(HFP_KEY_CHANGE_TO_PHONE);\n    } else if (app_bt_device.phone_earphone_mark == 1) {\n      // call is active, switch from phone to earphone\n      hfp_handle_key(HFP_KEY_ADD_TO_EARPHONE);\n    }\n  } break;\n  case HFCALL_MACHINE_CURRENT_3WAY_INCOMMING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_THREEWAY_HOLD_AND_ANSWER);\n    break;\n  case HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING_ANOTHER_IDLE:\n    hfp_handle_key(HFP_KEY_THREEWAY_HANGUP_AND_ANSWER);\n    break;\n  case HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_INCOMMING:\n    break;\n  case HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_INCOMMING:\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_INCOMMING:\n    hfp_handle_key(HFP_KEY_DUAL_HF_CHANGETOPHONE_ANSWER_ANOTHER);\n    // hfp_handle_key(HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER);\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_CHANGETOPHONE:\n    hfp_handle_key(HFP_KEY_DUAL_HF_CHANGETOPHONE_ANOTHER_ADDTOEARPHONE);\n    break;\n  case HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_HOLD:\n    hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_CURR_ANSWER_ANOTHER);\n    break;\n#endif\n  default:\n    break;\n  }\n#if defined(__HSP_ENABLE__)\n  if (hfcall_machine == HFCALL_MACHINE_NUM) {\n    if (app_bt_device.hs_conn_flag[app_bt_device.curr_hs_channel_id] ==\n        1) { // now we know it is HSP active !\n      if (app_bt_device.phone_earphone_mark == 0) {\n        // call is active, switch from earphone to phone\n        hsp_handle_key(HSP_KEY_CHANGE_TO_PHONE);\n      } else if (app_bt_device.phone_earphone_mark == 1) {\n        // call is active, switch from phone to earphone\n        hsp_handle_key(HSP_KEY_ADD_TO_EARPHONE);\n      }\n    }\n  }\n#endif\n}\n\nvoid bt_key_handle_func_key(enum APP_KEY_EVENT_T event) {\n  switch (event) {\n  case APP_KEY_EVENT_UP:\n  case APP_KEY_EVENT_CLICK:\n    bt_key_handle_func_click();\n    break;\n  case APP_KEY_EVENT_DOUBLECLICK:\n    bt_key_handle_func_doubleclick();\n    break;\n  case APP_KEY_EVENT_LONGPRESS:\n    bt_key_handle_func_longpress();\n    break;\n  default:\n    TRACE(0, \"unregister func key event=%x\", event);\n    break;\n  }\n}\n\n#if 0\nvoid bt_key_handle_func_key(enum APP_KEY_EVENT_T event)\n{\n#ifdef __BT_ONE_BRING_TWO__\n    //if(g_current_device_id == BT_DEVICE_NUM)\n    BT_DEVICE_ID_T current_device_id;\n    BT_DEVICE_ID_T another_device_id;\n\n    current_device_id = app_bt_device.curr_hf_channel_id;\n    another_device_id = (current_device_id == BT_DEVICE_ID_1) ? BT_DEVICE_ID_2 : BT_DEVICE_ID_1;\n#endif\n\n    switch(event)\n    {\n#ifndef __BT_ONE_BRING_TWO__\n        case  APP_KEY_EVENT_UP:\n        case  APP_KEY_EVENT_CLICK:\n            bt_key_handle_func_click();\n            break;\n        case  APP_KEY_EVENT_DOUBLECLICK:\n            bt_key_handle_func_doubleclick();\n            break;\n        case  APP_KEY_EVENT_LONGPRESS:\n            bt_key_handle_func_longpress();\n            break;\n#else\n        case  APP_KEY_EVENT_UP:\n        case  APP_KEY_EVENT_CLICK:\n            TRACE(8,\"!!!APP_KEY_EVENT_CLICK callsetup %d %d call %d %d held %d %d audio_state %d %d\\n\",\n\t\t\t\tapp_bt_device.hfchan_callSetup[BT_DEVICE_ID_1], app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2],\n                app_bt_device.hfchan_call[BT_DEVICE_ID_1], app_bt_device.hfchan_call[BT_DEVICE_ID_2],\n\t\t\t\tapp_bt_device.hf_callheld[BT_DEVICE_ID_1], app_bt_device.hf_callheld[BT_DEVICE_ID_2],\n                app_bt_device.hf_audio_state[BT_DEVICE_ID_1], app_bt_device.hf_audio_state[BT_DEVICE_ID_2]);\n\n            if((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] ==  BTIF_HF_CALL_NONE)&&(app_bt_device.hf_audio_state[BT_DEVICE_ID_1] == BTIF_HF_AUDIO_DISCON)&&\n                (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] ==  BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_2] ==  BTIF_HF_CALL_NONE)&&(app_bt_device.hf_audio_state[BT_DEVICE_ID_2] == BTIF_HF_AUDIO_DISCON)){\n                if(app_bt_device.a2dp_play_pause_flag == 0){\n                    a2dp_handleKey(AVRCP_KEY_PLAY);\n                }else{\n                    a2dp_handleKey(AVRCP_KEY_PAUSE);\n                }\n            }\n\n            if(((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] ==  BTIF_HF_CALL_SETUP_IN)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] ==  BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_2] ==  BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] !=  BTIF_HF_CALL_SETUP_ALERT))) {\n                //hfp_handle_key(HFP_KEY_ANSWER_CALL);\n                /* (A incoming && B no active) */\n                TRACE(0,\"!!!!answer call hf_channel=0\\n\");\n                btif_hf_answer_call(app_bt_device.hf_channel[BT_DEVICE_ID_1]);\n            } else if ((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] ==  BTIF_HF_CALL_SETUP_IN)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_2] ==  BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] ==  BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] !=  BTIF_HF_CALL_SETUP_ALERT)) {\n                //hfp_handle_key(HFP_KEY_ANSWER_CALL);\n                /* B incoming && A no active */\n                TRACE(0,\"!!!!answer call hf_channel=1\\n\");\n                btif_hf_answer_call(app_bt_device.hf_channel[BT_DEVICE_ID_2]);\n            }\n\n            if (((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] ==  BTIF_HF_CALL_SETUP_OUT)||(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_ALERT))&&(app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] ==  BTIF_HF_CALL_SETUP_NONE)) {\n                TRACE(0,\"!!!!call out hangup hf_channel=0\\n\");\n                //hfp_handle_key(HFP_KEY_HANGUP_CALL);\n                /* (A outgoing && B no active no setup */\n                btif_hf_hang_up_call(app_bt_device.hf_channel[BT_DEVICE_ID_1]);\n            } else if (((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] ==  BTIF_HF_CALL_SETUP_OUT)||(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_ALERT))&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] ==  BTIF_HF_CALL_SETUP_NONE)) {\n                TRACE(0,\"!!!!call out hangup hf_channel=1\\n\");\n                //hfp_handle_key(HFP_KEY_HANGUP_CALL);\n                /* B outgoing && A no active no setup */\n                btif_hf_hang_up_call(app_bt_device.hf_channel[BT_DEVICE_ID_2]);\n            }\n\n            if(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_ACTIVE){\n                if((app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_NONE) &&\n                            (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_NONE)) {\n                    if (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_IN) {\n                        /* A 1-call active 1-call incoming && B on active no setup */\n                        TRACE(0,\"!!!!release active calls hf_channel=0\\n\");\n                        btif_hf_call_hold(app_bt_device.hf_channel[BT_DEVICE_ID_1], BTIF_HF_HOLD_RELEASE_ACTIVE_CALLS, 0);\n                    } else {\n                        /* A active && B no active no setup */\n                        //hfp_handle_key(HFP_KEY_HANGUP_CALL);\n                        TRACE(0,\"!!!!hangup call hf_channel=0\\n\");\n                        if (app_bt_device.hf_callheld[BT_DEVICE_ID_1] == BTIF_HF_CALL_HELD_NO_ACTIVE) {\n                            btif_hf_call_hold(app_bt_device.hf_channel[BT_DEVICE_ID_1], BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n                        }\n                        btif_hf_hang_up_call(app_bt_device.hf_channel[BT_DEVICE_ID_1]);\n                    }\n                }else if(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_IN){\n                    //hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_CURR_ANSWER_ANOTHER);\n                    /* A active && B incoming */\n                    TRACE(0,\"!!!!1hangup active and answer incoming\\n\");\n                    btif_hf_hang_up_call(app_bt_device.hf_channel[BT_DEVICE_ID_1]);\n                    btif_hf_answer_call(app_bt_device.hf_channel[BT_DEVICE_ID_2]);\n                }\n            }else if(app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_ACTIVE){\n                if((app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE) &&\n                            (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)) {\n                    if (app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_IN) {\n                        /* B 1-call active 1-call incoming && A on active no setup */\n                        TRACE(0,\"!!!!release active calls hf_channel=1\\n\");\n                        btif_hf_call_hold(app_bt_device.hf_channel[BT_DEVICE_ID_2], BTIF_HF_HOLD_RELEASE_ACTIVE_CALLS, 0);\n                    } else {\n                        /* B active && A no active no setup */\n                        //hfp_handle_key(HFP_KEY_HANGUP_CALL);\n                        TRACE(0,\"!!!!hangup call hf_channel=1\\n\");\n                        if (app_bt_device.hf_callheld[BT_DEVICE_ID_2] == BTIF_HF_CALL_HELD_NO_ACTIVE) {\n                            btif_hf_call_hold(app_bt_device.hf_channel[BT_DEVICE_ID_2], BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n                        }\n                        btif_hf_hang_up_call(app_bt_device.hf_channel[BT_DEVICE_ID_2]);\n                    }\n                }else if(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_IN){\n                    //hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_CURR_ANSWER_ANOTHER);\n                    /* B active && A incoming */\n                    TRACE(0,\"!!!!2hangup active and answer incoming\\n\");\n                    btif_hf_hang_up_call(app_bt_device.hf_channel[BT_DEVICE_ID_2]);\n                    btif_hf_answer_call(app_bt_device.hf_channel[BT_DEVICE_ID_1]);\n                }\n            }\n\n            /* A active && B active */\n            if((app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_ACTIVE) &&\n                    (app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_ACTIVE)){\n                TRACE(0,\"!!!two call both active\\n\");\n                hfp_handle_key(HFP_KEY_HANGUP_CALL);\n            }\n#ifdef SUPPORT_SIRI\n            //TRACE(0,\"powerkey close siri\");\n            //app_hfp_siri_voice(false);\n            open_siri_flag = 0;\n#endif\n\n            break;\n        case  APP_KEY_EVENT_DOUBLECLICK:\n\t\t    TRACE(8,\"!!!APP_KEY_EVENT_DOUBLECLICK callsetup %d %d call %d %d held %d %d audio_state %d %d\\n\",\n\t\t\t\tapp_bt_device.hfchan_callSetup[BT_DEVICE_ID_1], app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2],\n                app_bt_device.hfchan_call[BT_DEVICE_ID_1], app_bt_device.hfchan_call[BT_DEVICE_ID_2],\n\t\t\t\tapp_bt_device.hf_callheld[BT_DEVICE_ID_1], app_bt_device.hf_callheld[BT_DEVICE_ID_2],\n                app_bt_device.hf_audio_state[BT_DEVICE_ID_1], app_bt_device.hf_audio_state[BT_DEVICE_ID_2]);\n\n            //if(((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&(app_bt_device.hf_channel[BT_DEVICE_ID_2].state == HF_STATE_CLOSED))||\n            if(((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&\n                        (btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_2]) == BTIF_HF_STATE_CLOSED))||\n                ((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_NONE))){\n                hfp_handle_key(HFP_KEY_REDIAL_LAST_CALL);\n            }\n\n            if(((app_bt_device.hf_audio_state[BT_DEVICE_ID_1] == BTIF_HF_AUDIO_CON)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_NONE))||\n                ((app_bt_device.hf_audio_state[BT_DEVICE_ID_2] == BTIF_HF_AUDIO_CON)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE))){\n                if(app_bt_device.hf_mute_flag == 0){\n                    hfp_handle_key(HFP_KEY_MUTE);\n                }else{\n                    hfp_handle_key(HFP_KEY_CLEAR_MUTE);\n                }\n            }\n\n            if((app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_IN)){\n                /* A active && B incoming */\n                //hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_ANOTHER);\n                TRACE(0,\"!!!!1keep active and reject incoming\\n\");\n                btif_hf_hang_up_call(app_bt_device.hf_channel[BT_DEVICE_ID_2]);\n            } else if ((app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_IN)){\n                /* B active && A incoming */\n                //hfp_handle_key(HFP_KEY_DUAL_HF_HANGUP_ANOTHER);\n                TRACE(0,\"!!!!2keep active and reject incoming\\n\");\n                btif_hf_hang_up_call(app_bt_device.hf_channel[BT_DEVICE_ID_1]);\n            } else if ((app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_IN)) {\n                /* A 1-call active and 1-call incoming */\n                TRACE(0,\"!!!!release incoming call hf_channel=0\\n\");\n                btif_hf_call_hold(app_bt_device.hf_channel[BT_DEVICE_ID_1], BTIF_HF_HOLD_RELEASE_HELD_CALLS, 0);\n            } else if ((app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_IN)) {\n                /* B 1-call active and 1-call incoming */\n                TRACE(0,\"!!!!release incoming call hf_channel=1\\n\");\n                btif_hf_call_hold(app_bt_device.hf_channel[BT_DEVICE_ID_2], BTIF_HF_HOLD_RELEASE_HELD_CALLS, 0);\n            }\n\n            break;\n            \n        case  APP_KEY_EVENT_TRIPLECLICK:\n            TRACE(5,\"!!!APP_KEY_EVENT_TRIPLECLICK callsetup %d %d call %d %d,phone_earphone_mark %d\\n\",\n                app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1], app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2],\n                app_bt_device.hfchan_call[BT_DEVICE_ID_1], app_bt_device.hfchan_call[BT_DEVICE_ID_2],\n                app_bt_device.phone_earphone_mark);\n            if(((app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_NONE))||\n                ((app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE))){\n                    if(app_bt_device.phone_earphone_mark == 0){\n                        hfp_handle_key(HFP_KEY_CHANGE_TO_PHONE);\n                    }else if(app_bt_device.phone_earphone_mark == 1){\n                        hfp_handle_key(HFP_KEY_ADD_TO_EARPHONE);\n                    }\n                }\n            break;\n        case  APP_KEY_EVENT_LONGPRESS:\n#ifdef SUPPORT_SIRI\n            open_siri_flag=0;\n#endif\n\n\n\n//one bring two: long press switch sco\n\t\t    TRACE(8,\"!!!APP_KEY_EVENT_LONGPRESS callsetup %d %d call %d %d held %d %d audio_state %d %d\\n\",\n\t\t\t\tapp_bt_device.hfchan_callSetup[BT_DEVICE_ID_1], app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2],\n                app_bt_device.hfchan_call[BT_DEVICE_ID_1], app_bt_device.hfchan_call[BT_DEVICE_ID_2],\n\t\t\t\tapp_bt_device.hf_callheld[BT_DEVICE_ID_1], app_bt_device.hf_callheld[BT_DEVICE_ID_2],\n                app_bt_device.hf_audio_state[BT_DEVICE_ID_1], app_bt_device.hf_audio_state[BT_DEVICE_ID_2]);\n\n            TRACE(6,\"app_bt_device.curr_hf_channel_id=%d, g_curr=%d curr=%d another:%d scoHciHandle:%x/%x\",  app_bt_device.curr_hf_channel_id,current_device_id,\n                                                                                  current_device_id, another_device_id,\n                                                                                  //app_bt_device.hf_channel[current_device_id].cmgrHandler.scoConnect->scoHciHandle\n                                                                                  //,app_bt_device.hf_channel[another_device_id].cmgrHandler.scoConnect->scoHciHandle);\n                                                                                   btif_hf_get_sco_hcihandle(app_bt_device.hf_channel[current_device_id]),\n                                                                                   btif_hf_get_sco_hcihandle(app_bt_device.hf_channel[another_device_id]));\n              if((app_bt_device.hfchan_call[current_device_id] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_call[another_device_id] != BTIF_HF_CALL_ACTIVE)\n                &&(app_bt_device.hfchan_callSetup[another_device_id] == BTIF_HF_CALL_SETUP_IN)){//A is active, B is incoming call\n                TRACE(2,\"HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER: current=%d, g_current_device_id=%d\",app_bt_device.curr_hf_channel_id, current_device_id);\n                app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n                //hfp_handle_key(HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER); //hold and answer\n                //app_bt_device.curr_hf_channel_id = another_device_id;\n                btif_hf_answer_call(app_bt_device.hf_channel[another_device_id]);\n                btif_hf_call_hold(app_bt_device.hf_channel[current_device_id], BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n            } else if ((app_bt_device.hfchan_call[another_device_id] == BTIF_HF_CALL_ACTIVE) &&\n                     (app_bt_device.hfchan_call[current_device_id] != BTIF_HF_CALL_ACTIVE) &&\n                     (app_bt_device.hfchan_callSetup[current_device_id] == BTIF_HF_CALL_SETUP_IN))\n            {\n                TRACE(2,\"HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER: current=%d, g_current_device_id=%d\",app_bt_device.curr_hf_channel_id, current_device_id);\n                app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n                btif_hf_answer_call(app_bt_device.hf_channel[current_device_id]);\n                btif_hf_call_hold(app_bt_device.hf_channel[another_device_id], BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n            } else if (app_bt_device.hfchan_call[current_device_id] == BTIF_HF_CALL_ACTIVE &&\n                     app_bt_device.hf_callheld[current_device_id] == BTIF_HF_CALL_HELD_NONE &&\n                     app_bt_device.hf_callheld[another_device_id] == BTIF_HF_CALL_HELD_NO_ACTIVE)\n            {\n                TRACE(0,\"!!!!1switch hold call and active call\\n\");\n                app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n                btif_hf_call_hold(app_bt_device.hf_channel[current_device_id], BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n                btif_hf_call_hold(app_bt_device.hf_channel[another_device_id], BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n            } else if (app_bt_device.hfchan_call[another_device_id] == BTIF_HF_CALL_ACTIVE &&\n                     app_bt_device.hf_callheld[another_device_id] == BTIF_HF_CALL_HELD_NONE &&\n                     app_bt_device.hf_callheld[current_device_id] == BTIF_HF_CALL_HELD_NO_ACTIVE)\n            {\n                TRACE(0,\"!!!!2switch hold call and active call\\n\");\n                app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n                btif_hf_call_hold(app_bt_device.hf_channel[another_device_id], BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n                btif_hf_call_hold(app_bt_device.hf_channel[current_device_id], BTIF_HF_HOLD_HOLD_ACTIVE_CALLS, 0);\n            } else if((app_bt_device.hfchan_call[current_device_id] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_call[another_device_id] == BTIF_HF_CALL_ACTIVE)\n                &&(app_bt_device.hfchan_callSetup[current_device_id] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_callSetup[another_device_id] == BTIF_HF_CALL_SETUP_NONE)){//A is active, B is active\n                TRACE(2,\"AB is active: current=%d, g_current_device_id=%d\",app_bt_device.curr_hf_channel_id, current_device_id);\n                app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n                if (bt_get_sco_number()>1){\n#ifdef __HF_KEEP_ONE_ALIVE__\n                    bt_key_hf_channel_switch_active(current_device_id, another_device_id);\n#else\n                    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_SWAP_SCO,BT_STREAM_SBC, another_device_id, 0);\n#endif\n                    app_bt_device.hf_voice_en[current_device_id] = HF_VOICE_DISABLE;\n                    app_bt_device.hf_voice_en[another_device_id] = HF_VOICE_ENABLE;\n                    app_bt_device.curr_hf_channel_id = another_device_id;\n                }else{\n                    bt_key_hf_channel_switch_start();\n                }\n            } else if((app_bt_device.hfchan_call[current_device_id] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_call[another_device_id] == BTIF_HF_CALL_ACTIVE)\n                &&((app_bt_device.hfchan_callSetup[current_device_id] == BTIF_HF_CALL_SETUP_IN)||(app_bt_device.hfchan_callSetup[another_device_id] == BTIF_HF_CALL_SETUP_IN))){\n                TRACE(2,\"AB is active and incoming call: current=%d, g_current_device_id=%d\",app_bt_device.curr_hf_channel_id, current_device_id);\n                app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n                if (bt_get_sco_number()>1){\n#ifdef __HF_KEEP_ONE_ALIVE__\n                    bt_key_hf_channel_switch_active(current_device_id, another_device_id);\n#else\n                    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_SWAP_SCO, BT_STREAM_SBC, another_device_id, 0);\n#endif\n                    app_bt_device.hf_voice_en[current_device_id] = HF_VOICE_DISABLE;\n                    app_bt_device.hf_voice_en[another_device_id] = HF_VOICE_ENABLE;\n                    app_bt_device.curr_hf_channel_id = another_device_id;\n                }else{\n                    bt_key_hf_channel_switch_start();\n                }\n            } else if(((app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_NONE))||\n                ((app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE))){\n//three call\n                TRACE(0,\"three way call\");\n                app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n                hfp_handle_key(HFP_KEY_THREEWAY_HOLD_AND_ANSWER);\n#if 0\n                if(app_bt_device.phone_earphone_mark == 0){\n                    hfp_handle_key(HFP_KEY_CHANGE_TO_PHONE);\n                }else if(app_bt_device.phone_earphone_mark == 1){\n                    hfp_handle_key(HFP_KEY_ADD_TO_EARPHONE);\n                }\n#endif\n            } else if(((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_IN)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_NONE))||\n                ((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_IN)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE))){\n                hfp_handle_key(HFP_KEY_HANGUP_CALL);\n            }\n#ifdef BTIF_HID_DEVICE\n            else if(((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&( btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_2])== BTIF_HF_STATE_CLOSED))||\n                ((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_NONE))){\n\n                Hid_Send_capture(&app_bt_device.hid_channel[BT_DEVICE_ID_1]);\n            }\n#endif\n#ifdef SUPPORT_SIRI\n            else if((open_siri_flag == 0) &&\n                    (((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&(btif_get_hf_chan_state(app_bt_device.hf_channel[BT_DEVICE_ID_2]) == BTIF_HF_STATE_CLOSED))||\n                    //(((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&(app_bt_device.hf_channel[BT_DEVICE_ID_2].state == BTIF_HF_STATE_CLOSED))||\n                    ((app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_NONE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_NONE)&&(app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_NONE)))){\n                    app_voice_report(APP_STATUS_INDICATION_WARNING, 0);\n                    open_siri_flag = 1;\n            }\n#endif\n\n#if 0\n            if((app_bt_device.hfchan_call[BT_DEVICE_ID_1] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_2] == BTIF_HF_CALL_SETUP_IN)){\n                hfp_handle_key(HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER);\n            }else if((app_bt_device.hfchan_call[BT_DEVICE_ID_2] == BTIF_HF_CALL_ACTIVE)&&(app_bt_device.hfchan_callSetup[BT_DEVICE_ID_1] == BTIF_HF_CALL_SETUP_IN)){\n                hfp_handle_key(HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER);\n            }\n#endif\n            break;\n#endif /* __BT_ONE_BRING_TWO__ */\n        default:\n            TRACE(1,\"unregister func key event=%x\",event);\n            break;\n    }\n}\n#endif\nvoid app_bt_volumeup() {\n  app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_UP, 0);\n}\n\nvoid app_bt_volumedown() {\n  app_audio_manager_ctrl_volume(APP_AUDIO_MANAGER_VOLUME_CTRL_DOWN, 0);\n}\n\n#if defined(__APP_KEY_FN_STYLE_A__)\nvoid bt_key_handle_up_key(enum APP_KEY_EVENT_T event) {\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n  struct nvrecord_env_t *nvrecord_env = NULL;\n#endif\n  switch (event) {\n  case APP_KEY_EVENT_UP:\n  case APP_KEY_EVENT_CLICK:\n    app_bt_volumeup();\n    break;\n  case APP_KEY_EVENT_LONGPRESS:\n    a2dp_handleKey(AVRCP_KEY_FORWARD);\n    break;\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n  case APP_KEY_EVENT_DOUBLECLICK:\n    // debug switch src mode\n    nv_record_env_get(&nvrecord_env);\n    if (app_bt_device.src_or_snk == BT_DEVICE_SRC) {\n      nvrecord_env->src_snk_flag.src_snk_mode = BT_DEVICE_SNK;\n    } else {\n      nvrecord_env->src_snk_flag.src_snk_mode = BT_DEVICE_SRC;\n    }\n    nv_record_env_set(nvrecord_env);\n    app_reset();\n    break;\n#endif\n  default:\n    TRACE(1, \"unregister up key event=%x\", event);\n    break;\n  }\n}\n\nvoid bt_key_handle_down_key(enum APP_KEY_EVENT_T event) {\n  switch (event) {\n  case APP_KEY_EVENT_UP:\n  case APP_KEY_EVENT_CLICK:\n    app_bt_volumedown();\n    break;\n  case APP_KEY_EVENT_LONGPRESS:\n    a2dp_handleKey(AVRCP_KEY_BACKWARD);\n\n    break;\n  default:\n    TRACE(1, \"unregister down key event=%x\", event);\n    break;\n  }\n}\n#else // #elif defined(__APP_KEY_FN_STYLE_B__)\nvoid bt_key_handle_up_key(enum APP_KEY_EVENT_T event) {\n  TRACE(1, \"%s\", __func__);\n  switch (event) {\n  case APP_KEY_EVENT_REPEAT:\n    app_bt_volumeup();\n    break;\n  case APP_KEY_EVENT_UP:\n  case APP_KEY_EVENT_CLICK:\n    a2dp_handleKey(AVRCP_KEY_FORWARD);\n    break;\n  default:\n    TRACE(1, \"unregister up key event=%x\", event);\n    break;\n  }\n}\n\nvoid bt_key_handle_down_key(enum APP_KEY_EVENT_T event) {\n  switch (event) {\n  case APP_KEY_EVENT_REPEAT:\n    app_bt_volumedown();\n    break;\n  case APP_KEY_EVENT_UP:\n  case APP_KEY_EVENT_CLICK:\n    a2dp_handleKey(AVRCP_KEY_BACKWARD);\n    break;\n  default:\n    TRACE(1, \"unregister down key event=%x\", event);\n    break;\n  }\n}\n#endif\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\nvoid bt_key_handle_source_func_key(enum APP_KEY_EVENT_T event) {\n  TRACE(2, \"%s,%d\", __FUNCTION__, event);\n  static bool onaudioloop = false;\n  switch (event) {\n  case APP_KEY_EVENT_UP:\n  case APP_KEY_EVENT_CLICK:\n    app_a2dp_source_find_sink();\n    break;\n  case APP_KEY_EVENT_DOUBLECLICK:\n    if (app_bt_device.a2dp_state[0] == 1) {\n      onaudioloop = onaudioloop ? false : true;\n      if (onaudioloop) {\n        app_a2dp_start_stream();\n\n      } else {\n        app_a2dp_suspend_stream();\n      }\n    }\n    break;\n  case APP_KEY_EVENT_TRIPLECLICK:\n    app_a2dp_start_stream();\n    break;\n  default:\n    TRACE(1, \"unregister down key event=%x\", event);\n    break;\n  }\n}\n#endif\n\nAPP_KEY_STATUS bt_key;\nstatic void bt_update_key_event(uint32_t code, uint8_t event) {\n  TRACE(3, \"%s code:%d evt:%d\", __func__, code, event);\n\n  bt_key.code = code;\n  bt_key.event = event;\n  osapi_notify_evm();\n}\n\nvoid bt_key_send(APP_KEY_STATUS *status) {\n  uint32_t lock = int_lock();\n  bool isKeyBusy = false;\n  if (0xff != bt_key.code) {\n    isKeyBusy = true;\n  }\n  int_unlock(lock);\n\n  if (!isKeyBusy) {\n    app_bt_start_custom_function_in_bt_thread((uint32_t)status->code,\n                                              (uint32_t)status->event,\n                                              (uint32_t)bt_update_key_event);\n  }\n}\n\nvoid bt_key_handle(void) {\n  osapi_lock_stack();\n  if (bt_key.code != 0xff) {\n    TRACE(3, \"%s code:%d evt:%d\", __func__, bt_key.code, bt_key.event);\n    switch (bt_key.code) {\n    case BTAPP_FUNC_KEY:\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n      if (app_bt_device.src_or_snk == BT_DEVICE_SRC) {\n        bt_key_handle_source_func_key((enum APP_KEY_EVENT_T)bt_key.event);\n      } else\n#endif\n      {\n        bt_key_handle_func_key((enum APP_KEY_EVENT_T)bt_key.event);\n      }\n      break;\n    case BTAPP_VOLUME_UP_KEY:\n      bt_key_handle_up_key((enum APP_KEY_EVENT_T)bt_key.event);\n      break;\n    case BTAPP_VOLUME_DOWN_KEY:\n      bt_key_handle_down_key((enum APP_KEY_EVENT_T)bt_key.event);\n      break;\n#ifdef SUPPORT_SIRI\n    case BTAPP_RELEASE_KEY:\n      bt_key_handle_siri_key((enum APP_KEY_EVENT_T)bt_key.event);\n      break;\n#endif\n    default:\n      TRACE(0, \"bt_key_handle  undefined key\");\n      break;\n    }\n    bt_key.code = 0xff;\n  }\n  osapi_unlock_stack();\n}\n\nvoid bt_key_init(void) {\n  Besbt_hook_handler_set(BESBT_HOOK_USER_2, bt_key_handle);\n#ifdef __BT_ONE_BRING_TWO__\n  // bt_key_hf_channel_switch_init();\n#endif\n  bt_key.code = 0xff;\n  bt_key.event = 0xff;\n}\n"
  },
  {
    "path": "services/bt_app/app_media_player.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_bt_trace.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"tgt_hardware.h\"\n#include \n#include \n#include \n\n#ifdef WL_DET\n#include \"app_mic_alg.h\"\n#endif\n\n#ifdef MEDIA_PLAYER_SUPPORT\n\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_overlay.h\"\n#include \"app_utils.h\"\n#include \"audioflinger.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n\n#include \"app_bt.h\"\n#include \"app_media_player.h\"\n#include \"audio_prompt_sbc.h\"\n#include \"besbt.h\"\n#include \"res_audio_data.h\"\n#include \"res_audio_ring.h\"\n#include \"resources.h\"\n\n#include \"app_bt_media_manager.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#ifdef VOICE_DATAPATH\n#include \"app_ai_if.h\"\n#include \"app_voicepath.h\"\n#endif\n\n#if defined(AUDIO_ANC_FB_MC_MEDIA) && defined(ANC_APP) &&                      \\\n    !defined(__AUDIO_RESAMPLE__)\n#include \"anc_process.h\"\n#include \"hal_codec.h\"\n#endif\n\n#ifdef __THIRDPARTY\n#include \"app_thirdparty.h\"\n#endif\n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_voice_report.h\"\n#include \"app_tws_ibrt.h\"\n#endif\n#ifdef __INTERACTION__\nuint8_t g_findme_fadein_vol = TGT_VOLUME_LEVEL_0;\n#endif\nstatic char need_init_decoder = 1;\nstatic btif_sbc_decoder_t *media_sbc_decoder = NULL;\n\n#define SBC_TEMP_BUFFER_SIZE 64\n#define SBC_QUEUE_SIZE (SBC_TEMP_BUFFER_SIZE * 16)\nCQueue media_sbc_queue;\n\nstatic float *media_sbc_eq_band_gain = NULL;\n\n#ifdef __BT_ANC__\n#define APP_AUDIO_PLAYBACK_BUFF_SIZE (1024 * 3)\n#else\n#define APP_AUDIO_PLAYBACK_BUFF_SIZE (1024 * 4)\n#endif\n\n#if defined(AUDIO_ANC_FB_MC_MEDIA) && defined(ANC_APP) &&                      \\\n    !defined(__AUDIO_RESAMPLE__)\nstatic enum AUD_BITS_T sample_size_play_bt;\nstatic enum AUD_SAMPRATE_T sample_rate_play_bt;\nstatic uint32_t data_size_play_bt;\n\nstatic uint8_t *playback_buf_bt;\nstatic uint32_t playback_size_bt;\nstatic int32_t playback_samplerate_ratio_bt;\n\nstatic uint8_t *playback_buf_mc;\nstatic uint32_t playback_size_mc;\nstatic enum AUD_CHANNEL_NUM_T playback_ch_num_bt;\n#endif\n\n#define SBC_FRAME_LEN 64 // 0x5c   /* pcm 512 bytes*/\nstatic U8 *g_app_audio_data = NULL;\nstatic uint32_t g_app_audio_length = 0;\nstatic uint32_t g_app_audio_read = 0;\n\nstatic uint32_t g_play_continue_mark = 0;\n\nstatic uint8_t app_play_sbc_stop_proc_cnt = 0;\n\nstatic uint16_t g_prompt_chnlsel = PROMOT_ID_BIT_MASK_CHNLSEl_ALL;\n\n// for continue play\n\n#define MAX_SOUND_NUMBER 10\n\ntypedef struct tMediaSoundMap {\n  U8 *data;       // total files\n  uint32_t fsize; // file index\n\n} _tMediaSoundMap;\n\nconst tMediaSoundMap media_sound_map[MAX_SOUND_NUMBER] = {\n    {(U8 *)SOUND_ZERO, SOUND_ZERO_len},   {(U8 *)SOUND_ONE, SOUND_ONE_len},\n    {(U8 *)SOUND_TWO, SOUND_TWO_len},     {(U8 *)SOUND_THREE, SOUND_THREE_len},\n    {(U8 *)SOUND_FOUR, SOUND_FOUR_len},   {(U8 *)SOUND_FIVE, SOUND_FIVE_len},\n    {(U8 *)SOUND_SIX, SOUND_SIX_len},     {(U8 *)SOUND_SEVEN, SOUND_SEVEN_len},\n    {(U8 *)SOUND_EIGHT, SOUND_EIGHT_len}, {(U8 *)SOUND_NINE, SOUND_NINE_len},\n};\n\nextern const uint8_t SOUND_MUTE[];\nextern const unsigned SOUND_MUTE_len;\n\nchar Media_player_number[MAX_PHB_NUMBER];\n\ntypedef struct tPlayContContext {\n  uint32_t g_play_continue_total; // total files\n  uint32_t g_play_continue_n;     // file index\n\n  uint32_t g_play_continue_fread; // per file have readed\n\n  U8 g_play_continue_array[MAX_PHB_NUMBER];\n\n} _tPlayContContext;\n\ntPlayContContext pCont_context;\n\nAPP_AUDIO_STATUS MSG_PLAYBACK_STATUS;\nAPP_AUDIO_STATUS *ptr_msg_playback = &MSG_PLAYBACK_STATUS;\n\nstatic int g_language = MEDIA_DEFAULT_LANGUAGE;\n#ifdef AUDIO_LINEIN\nstatic enum AUD_SAMPRATE_T app_play_audio_sample_rate = AUD_SAMPRATE_16000;\n#endif\n\n#define PROMPT_MIX_PROPERTY_PTR_FROM_ENTRY_INDEX(index)                        \\\n  ((PROMPT_MIX_PROPERTY_T *)((uintptr_t)__mixprompt_property_table_start +     \\\n                             (index) * sizeof(PROMPT_MIX_PROPERTY_T)))\n\nint media_audio_init(void) {\n  const float EQLevel[25] = {\n      0.0630957, 0.0794328, 0.1,       0.1258925, 0.1584893,\n      0.1995262, 0.2511886, 0.3162278, 0.398107,  0.5011872,\n      0.6309573, 0.794328,  1,         1.258925,  1.584893,\n      1.995262,  2.5118864, 3.1622776, 3.9810717, 5.011872,\n      6.309573,  7.943282,  10,        12.589254, 15.848932}; //-12~12\n  uint8_t *buff = NULL;\n  uint8_t i;\n\n  app_audio_mempool_get_buff((uint8_t **)&media_sbc_eq_band_gain,\n                             CFG_HW_AUD_EQ_NUM_BANDS * sizeof(float));\n\n  for (i = 0; i < CFG_HW_AUD_EQ_NUM_BANDS; i++) {\n    media_sbc_eq_band_gain[i] = EQLevel[12];\n  }\n\n  app_audio_mempool_get_buff(&buff, SBC_QUEUE_SIZE);\n  memset(buff, 0, SBC_QUEUE_SIZE);\n\n  LOCK_APP_AUDIO_QUEUE();\n  APP_AUDIO_InitCQueue(&media_sbc_queue, SBC_QUEUE_SIZE, buff);\n  UNLOCK_APP_AUDIO_QUEUE();\n\n  app_audio_mempool_get_buff((uint8_t **)&media_sbc_decoder,\n                             sizeof(btif_sbc_decoder_t) + 4);\n\n  need_init_decoder = 1;\n\n  app_play_sbc_stop_proc_cnt = 0;\n\n  return 0;\n}\nstatic int decode_sbc_frame(unsigned char *pcm_buffer, unsigned int pcm_len) {\n  uint8_t underflow = 0;\n\n  int r = 0;\n  unsigned char *e1 = NULL, *e2 = NULL;\n  unsigned int len1 = 0, len2 = 0;\n\n  static btif_sbc_pcm_data_t pcm_data;\n  bt_status_t ret = BT_STS_SUCCESS;\n  unsigned short byte_decode = 0;\n\n  pcm_data.data = (unsigned char *)pcm_buffer;\n\n  LOCK_APP_AUDIO_QUEUE();\nagain:\n  if (need_init_decoder) {\n    pcm_data.data = (unsigned char *)pcm_buffer;\n    pcm_data.dataLen = 0;\n    btif_sbc_init_decoder(media_sbc_decoder);\n  }\n\nget_again:\n  len1 = len2 = 0;\n  r = APP_AUDIO_PeekCQueue(&media_sbc_queue, SBC_TEMP_BUFFER_SIZE, &e1, &len1,\n                           &e2, &len2);\n\n  if (r == CQ_ERR) {\n    need_init_decoder = 1;\n    underflow = 1;\n    r = pcm_data.dataLen;\n    TRACE_MEDIA_PLAYESTREAM_I(\"[DECODE_SBC][END]\");\n    goto exit;\n  }\n  if (!len1) {\n    TRACE_MEDIA_PLAYESTREAM_I(\"[DECODE_SBC][LOOP] len1 underflow %d/%d\\n\", len1,\n                              len2);\n    goto get_again;\n  }\n\n  ret = btif_sbc_decode_frames(media_sbc_decoder, (unsigned char *)e1, len1,\n                               &byte_decode, &pcm_data, pcm_len,\n                               media_sbc_eq_band_gain);\n\n  if (ret == BT_STS_CONTINUE) {\n    need_init_decoder = 0;\n    APP_AUDIO_DeCQueue(&media_sbc_queue, 0, len1);\n    goto again;\n\n    /* back again */\n  } else if (ret == BT_STS_SUCCESS) {\n    need_init_decoder = 0;\n    r = pcm_data.dataLen;\n    pcm_data.dataLen = 0;\n\n    APP_AUDIO_DeCQueue(&media_sbc_queue, 0, byte_decode);\n\n    // TRACE_MEDIA_PLAYESTREAM_I(\"p %d\\n\", pcm_data.sampleFreq);\n\n    /* leave */\n  } else if (ret == BT_STS_FAILED) {\n    need_init_decoder = 1;\n    r = pcm_data.dataLen;\n    TRACE_MEDIA_PLAYESTREAM_E(\"[DECODE_SBC] err\\n\");\n\n    APP_AUDIO_DeCQueue(&media_sbc_queue, 0, byte_decode);\n\n    /* leave */\n  } else if (ret == BT_STS_NO_RESOURCES) {\n    need_init_decoder = 0;\n\n    TRACE_MEDIA_PLAYESTREAM_I(\"[DECODE_SBC] no\\n\");\n\n    /* leav */\n    r = 0;\n  }\n\nexit:\n  if (underflow) {\n    TRACE_MEDIA_PLAYESTREAM_I(\"[DECODE_SBC][END] len:%d\\n \", pcm_len);\n  }\n  UNLOCK_APP_AUDIO_QUEUE();\n  return r;\n}\n\nstatic int store_sbc_buffer(unsigned char *buf, unsigned int len) {\n  int nRet;\n\n  LOCK_APP_AUDIO_QUEUE();\n  nRet = APP_AUDIO_EnCQueue(&media_sbc_queue, buf, len);\n  UNLOCK_APP_AUDIO_QUEUE();\n\n  return nRet;\n}\n\n#if defined(IBRT)\n\n#define PENDING_SYNC_PROMPT_BUFFER_CNT 8\n// cleared when tws is disconnected\nstatic uint16_t pendingSyncPromptId[PENDING_SYNC_PROMPT_BUFFER_CNT];\nstatic uint8_t pending_sync_prompt_in_index = 0;\nstatic uint8_t pending_sync_prompt_out_index = 0;\nstatic uint8_t pending_sync_prompt_cnt = 0;\n\nvoid app_tws_sync_prompt_manager_reset(void) {\n  pending_sync_prompt_in_index = 0;\n  pending_sync_prompt_out_index = 0;\n  pending_sync_prompt_cnt = 0;\n}\n\nvoid app_tws_sync_prompt_check(void) {\n  if (0 == pending_sync_prompt_cnt) {\n    app_bt_active_mode_clear(ACTIVE_MODE_KEEPER_SYNC_VOICE_PROMPT,\n                             UPDATE_ACTIVE_MODE_FOR_ALL_LINKS);\n  }\n\n  if (IBRT_ACTIVE_MODE != app_ibrt_if_get_bt_ctrl_ctx()->tws_mode) {\n    return;\n  }\n\n  bool isPlayPendingPrompt = false;\n  uint16_t promptIdToPlay = 0;\n\n  uint32_t lock = int_lock_global();\n  if (pending_sync_prompt_cnt > 0) {\n    isPlayPendingPrompt = true;\n    promptIdToPlay = pendingSyncPromptId[pending_sync_prompt_out_index];\n    pending_sync_prompt_out_index++;\n    if (PENDING_SYNC_PROMPT_BUFFER_CNT == pending_sync_prompt_out_index) {\n      pending_sync_prompt_out_index = 0;\n    }\n    pending_sync_prompt_cnt--;\n  }\n  int_unlock_global(lock);\n\n  if (isPlayPendingPrompt) {\n    TRACE_MEDIA_PLAYESTREAM_I(\"[POP_PENDING_PROMPT] 0x%x to play\",\n                              promptIdToPlay);\n    app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_MEDIA,\n                                  0, promptIdToPlay);\n  }\n}\n#endif\n\nvoid trigger_media_play(AUD_ID_ENUM id, uint8_t device_id, uint16_t aud_pram) {\n  uint16_t convertedId = (uint8_t)id;\n  convertedId |= aud_pram;\n  app_audio_manager_sendrequest(APP_BT_STREAM_MANAGER_START, BT_STREAM_MEDIA,\n                                device_id, convertedId);\n}\nvoid trigger_media_stop(AUD_ID_ENUM id, uint8_t device_id) {\n  /* Only the stop loop mode is supported */\n  if (id == AUDIO_ID_FIND_MY_BUDS)\n    app_play_sbc_stop_proc_cnt = 1;\n}\n\nuint32_t media_playAudioSideSelect(AUD_ID_ENUM id, uint8_t device_id,\n                                   uint16_t side_select) {\n  trigger_media_play(id, device_id, PROMOT_ID_BIT_MASK_MERGING | side_select);\n  return 0;\n}\n\nuint32_t media_PlayAudio(AUD_ID_ENUM id, uint8_t device_id) {\n  trigger_media_play(id, device_id,\n                     PROMOT_ID_BIT_MASK_MERGING |\n                         PROMOT_ID_BIT_MASK_CHNLSEl_ALL);\n  return 0;\n}\n\nvoid media_PlayAudio_standalone(AUD_ID_ENUM id, uint8_t device_id) {\n  trigger_media_play(id, device_id, false);\n}\n\nvoid media_PlayAudio_locally(AUD_ID_ENUM id, uint8_t device_id) {\n  trigger_media_play(id, device_id,\n                     PROMOT_ID_BIT_MASK_MERGING |\n                         PROMOT_ID_BIT_MASK_CHNLSEl_ALL);\n}\n\nvoid media_PlayAudio_standalone_locally(AUD_ID_ENUM id, uint8_t device_id) {\n  trigger_media_play(id, device_id, PROMOT_ID_BIT_MASK_CHNLSEl_ALL);\n}\n\nvoid media_PlayAudio_remotely(AUD_ID_ENUM id, uint8_t device_id) {\n  trigger_media_play(id, device_id,\n                     PROMOT_ID_BIT_MASK_MERGING |\n                         PROMOT_ID_BIT_MASK_CHNLSEl_ALL);\n}\n\nvoid media_PlayAudio_standalone_remotely(AUD_ID_ENUM id, uint8_t device_id) {\n  trigger_media_play(id, device_id, PROMOT_ID_BIT_MASK_CHNLSEl_ALL);\n}\n\nAUD_ID_ENUM media_GetCurrentPrompt(uint8_t device_id) {\n  AUD_ID_ENUM currentPromptId = AUD_ID_INVALID;\n  if (app_bt_stream_isrun(APP_PLAY_BACK_AUDIO)) {\n    currentPromptId = app_get_current_standalone_promptId();\n  }\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n  else if (audio_prompt_is_playing_ongoing()) {\n    currentPromptId = (AUD_ID_ENUM)audio_prompt_get_prompt_id();\n  }\n#endif\n  return currentPromptId;\n}\n\n#define IsDigit(c) (((c) >= '0') && ((c) <= '9'))\nvoid media_Set_IncomingNumber(const char *pNumber) {\n  char *p_num = Media_player_number;\n  uint8_t cnt = 0;\n  for (uint8_t idx = 0; idx < MAX_PHB_NUMBER; idx++) {\n    if (*(pNumber + idx) == 0)\n      break;\n\n    if (IsDigit(*(pNumber + idx))) {\n      *(p_num + cnt) = *(pNumber + idx);\n      TRACE_MEDIA_PLAYESTREAM_I(\"[INCOMINGNUMBER] cnt %d ,p_num  %d\", cnt,\n                                *(p_num + cnt));\n      cnt++;\n    }\n  }\n}\n\nPROMPT_MIX_PROPERTY_T *get_prompt_mix_property(uint16_t promptId) {\n  for (uint32_t index = 0;\n       index < ((uint32_t)(uintptr_t)__mixprompt_property_table_end -\n                (uint32_t)(uintptr_t)__mixprompt_property_table_start) /\n                   sizeof(PROMPT_MIX_PROPERTY_T);\n       index++) {\n    if (PROMPT_MIX_PROPERTY_PTR_FROM_ENTRY_INDEX(index)->promptId == promptId) {\n      return PROMPT_MIX_PROPERTY_PTR_FROM_ENTRY_INDEX(index);\n    }\n  }\n\n  return NULL;\n}\n/*\nReference information for how to pass\nparameters into PROMPT_MIX_PROPERTY_TO_ADD:\n\nPROMPT_MIX_PROPERTY_TO_ADD(\npromptId,\nvolume_level_override,\ncoeff_for_mix_prompt_for_music,\ncoeff_for_mix_music_for_music,\ncoeff_for_mix_prompt_for_call,\ncoeff_for_mix_call_for_call)\n*/\nvoid media_runtime_audio_prompt_update(uint16_t id, uint8_t **ptr,\n                                       uint32_t *len) {\n  switch (id) {\n  case AUD_ID_POWER_ON:\n    g_app_audio_data = (U8 *)SOUND_POWER_ON; // aud_get_reouce((AUD_ID_ENUM)id,\n                                             // &g_app_audio_length, &type);\n    g_app_audio_length = SOUND_POWER_ON_len;\n    break;\n  case AUD_ID_POWER_OFF:\n    g_app_audio_data = (U8 *)SOUND_POWER_OFF;\n    g_app_audio_length = SOUND_POWER_OFF_len;\n    break;\n  case AUD_ID_BT_PAIR_ENABLE:\n    g_app_audio_data = (U8 *)SOUND_PAIR_ENABLE;\n    g_app_audio_length = SOUND_PAIR_ENABLE_len;\n    break;\n  case AUD_ID_BT_PAIRING:\n    g_app_audio_data = (U8 *)SOUND_PAIRING;\n    g_app_audio_length = SOUND_PAIRING_len;\n    break;\n  case AUD_ID_BT_PAIRING_SUC:\n    g_app_audio_data = (U8 *)SOUND_PAIRING_SUCCESS;\n    g_app_audio_length = SOUND_PAIRING_SUCCESS_len;\n    break;\n  case AUD_ID_BT_PAIRING_FAIL:\n    g_app_audio_data = (U8 *)SOUND_PAIRING_FAIL;\n    g_app_audio_length = SOUND_PAIRING_FAIL_len;\n    break;\n  case AUD_ID_BT_CALL_REFUSE:\n    g_app_audio_data = (U8 *)SOUND_REFUSE;\n    g_app_audio_length = SOUND_REFUSE_len;\n    break;\n  case AUD_ID_BT_CALL_OVER:\n    g_app_audio_data = (U8 *)SOUND_OVER;\n    g_app_audio_length = SOUND_OVER_len;\n    break;\n  case AUD_ID_BT_CALL_ANSWER:\n    g_app_audio_data = (U8 *)SOUND_ANSWER;\n    g_app_audio_length = SOUND_ANSWER_len;\n    break;\n  case AUD_ID_BT_CALL_HUNG_UP:\n    g_app_audio_data = (U8 *)SOUND_HUNG_UP;\n    g_app_audio_length = SOUND_HUNG_UP_len;\n    break;\n  case AUD_ID_BT_CALL_INCOMING_CALL:\n    g_app_audio_data = (U8 *)SOUND_INCOMING_CALL;\n    g_app_audio_length = SOUND_INCOMING_CALL_len;\n    break;\n  case AUD_ID_BT_CHARGE_PLEASE:\n    g_app_audio_data = (U8 *)SOUND_CHARGE_PLEASE;\n    g_app_audio_length = SOUND_CHARGE_PLEASE_len;\n    break;\n  case AUD_ID_BT_CHARGE_FINISH:\n    g_app_audio_data = (U8 *)SOUND_CHARGE_FINISH;\n    g_app_audio_length = SOUND_CHARGE_FINISH_len;\n    break;\n  case AUD_ID_BT_CONNECTED:\n    g_app_audio_data = (U8 *)SOUND_CONNECTED;\n    g_app_audio_length = SOUND_CONNECTED_len;\n    break;\n  case AUD_ID_BT_DIS_CONNECT:\n    g_app_audio_data = (U8 *)SOUND_DIS_CONNECT;\n    g_app_audio_length = SOUND_DIS_CONNECT_len;\n    break;\n  case AUD_ID_BT_WARNING:\n    g_app_audio_data = (U8 *)SOUND_WARNING;\n    g_app_audio_length = SOUND_WARNING_len;\n    break;\n  case AUDIO_ID_BT_ALEXA_START:\n    g_app_audio_data = (U8 *)SOUND_ALEXA_START;\n    g_app_audio_length = SOUND_ALEXA_START_len;\n    break;\n  case AUDIO_ID_BT_ALEXA_STOP:\n  case AUDIO_ID_FIND_MY_BUDS:\n  case AUDIO_ID_FIND_TILE:\n    g_app_audio_data = (U8 *)SOUND_ALEXA_STOP;\n    g_app_audio_length = SOUND_ALEXA_STOP_len;\n    break;\n  case AUDIO_ID_BT_GSOUND_MIC_OPEN:\n    g_app_audio_data = (U8 *)SOUND_GSOUND_MIC_OPEN;\n    g_app_audio_length = SOUND_GSOUND_MIC_OPEN_len;\n    break;\n  case AUDIO_ID_BT_GSOUND_MIC_CLOSE:\n    g_app_audio_data = (U8 *)SOUND_GSOUND_MIC_CLOSE;\n    g_app_audio_length = SOUND_GSOUND_MIC_CLOSE_len;\n    break;\n  case AUDIO_ID_BT_GSOUND_NC:\n    g_app_audio_data = (U8 *)SOUND_GSOUND_NC;\n    g_app_audio_length = SOUND_GSOUND_NC_len;\n    break;\n  case AUD_ID_LANGUAGE_SWITCH:\n    g_app_audio_data = (U8 *)SOUND_LANGUAGE_SWITCH;\n    g_app_audio_length = SOUND_LANGUAGE_SWITCH_len;\n    break;\n  case AUDIO_ID_BT_MUTE:\n    g_app_audio_data = (U8 *)SOUND_MUTE;\n    g_app_audio_length = SOUND_MUTE_len;\n    break;\n  case AUD_ID_NUM_0:\n    g_app_audio_data = (U8 *)SOUND_ZERO;\n    g_app_audio_length = SOUND_ZERO_len;\n    break;\n  case AUD_ID_NUM_1:\n    g_app_audio_data = (U8 *)SOUND_ONE;\n    g_app_audio_length = SOUND_ONE_len;\n    break;\n  case AUD_ID_NUM_2:\n    g_app_audio_data = (U8 *)SOUND_TWO;\n    g_app_audio_length = SOUND_TWO_len;\n    break;\n  case AUD_ID_NUM_3:\n    g_app_audio_data = (U8 *)SOUND_THREE;\n    g_app_audio_length = SOUND_THREE_len;\n    break;\n  case AUD_ID_NUM_4:\n    g_app_audio_data = (U8 *)SOUND_FOUR;\n    g_app_audio_length = SOUND_FOUR_len;\n    break;\n  case AUD_ID_NUM_5:\n    g_app_audio_data = (U8 *)SOUND_FIVE;\n    g_app_audio_length = SOUND_FIVE_len;\n    break;\n  case AUD_ID_NUM_6:\n    g_app_audio_data = (U8 *)SOUND_SIX;\n    g_app_audio_length = SOUND_SIX_len;\n    break;\n  case AUD_ID_NUM_7:\n    g_app_audio_data = (U8 *)SOUND_SEVEN;\n    g_app_audio_length = SOUND_SEVEN_len;\n    break;\n  case AUD_ID_NUM_8:\n    g_app_audio_data = (U8 *)SOUND_EIGHT;\n    g_app_audio_length = SOUND_EIGHT_len;\n    break;\n  case AUD_ID_NUM_9:\n    g_app_audio_data = (U8 *)SOUND_NINE;\n    g_app_audio_length = SOUND_NINE_len;\n    break;\n#ifdef __BT_WARNING_TONE_MERGE_INTO_STREAM_SBC__\n  case AUD_ID_RING_WARNING:\n    g_app_audio_data = (U8 *)RES_AUD_RING_SAMPRATE_16000;\n    g_app_audio_length = RES_AUD_RING_SAMPRATE_16000;\n    break;\n#endif\n#ifdef __INTERACTION__\n  case AUD_ID_BT_FINDME:\n    g_app_audio_data = (U8 *)SOUND_FINDME;\n    g_app_audio_length = SOUND_FINDME_len;\n    break;\n#endif\n  case AUDIO_ID_BT_DUDU:\n    g_app_audio_data = (U8 *)DUDU;\n    g_app_audio_length = DUDU_len;\n    break;\n  case AUDIO_ID_BT_DU:\n    g_app_audio_data = (U8 *)DUDU;\n    g_app_audio_length = DUDU_len;\n    break;\n  default:\n    g_app_audio_length = 0;\n    break;\n  }\n\n  *ptr = g_app_audio_data;\n  *len = g_app_audio_length;\n}\n\nvoid media_Play_init_audio(uint16_t aud_id) {\n\n  if (aud_id == AUD_ID_BT_CALL_INCOMING_NUMBER) {\n    g_play_continue_mark = 1;\n\n    memset(&pCont_context, 0x0, sizeof(pCont_context));\n\n    pCont_context.g_play_continue_total =\n        strlen((const char *)Media_player_number);\n\n    for (uint32_t i = 0;\n         (i < pCont_context.g_play_continue_total) && (i < MAX_PHB_NUMBER);\n         i++) {\n      pCont_context.g_play_continue_array[i] = Media_player_number[i] - '0';\n\n      TRACE_MEDIA_PLAYESTREAM_I(\"[INIT_AUDIO] array[%d] = %d, total =%d\", i,\n                                pCont_context.g_play_continue_array[i],\n                                pCont_context.g_play_continue_total);\n    }\n  } else {\n    g_app_audio_read = 0;\n    g_play_continue_mark = 0;\n\n    media_runtime_audio_prompt_update(aud_id, &g_app_audio_data,\n                                      &g_app_audio_length);\n  }\n}\nuint32_t app_play_sbc_more_data_fadeout(int16_t *buf, uint32_t len) {\n  uint32_t i;\n  uint32_t j = 0;\n\n  for (i = len; i > 0; i--) {\n    *(buf + j) = *(buf + j) * i / len;\n    j++;\n  }\n\n  return len;\n}\n\nstatic uint32_t need_fadein_len = 0;\nstatic uint32_t need_fadein_len_processed = 0;\n\nint app_play_sbc_more_data_fadein_config(uint32_t len) {\n  TRACE_MEDIA_PLAYESTREAM_I(\"[FADEIN] config l:%d\", len);\n  need_fadein_len = len;\n  need_fadein_len_processed = 0;\n  return 0;\n}\nuint32_t app_play_sbc_more_data_fadein(int16_t *buf, uint32_t len) {\n  uint32_t i;\n  uint32_t j = 0;\n  uint32_t base;\n  uint32_t dest;\n\n  base = need_fadein_len_processed;\n  dest = need_fadein_len_processed + len < need_fadein_len\n             ? need_fadein_len_processed + len\n             : need_fadein_len_processed;\n\n  if (base >= dest) {\n    //        TRACE_MEDIA_PLAYESTREAM_I(\"skip fadein\");\n    return len;\n  }\n  //    TRACE_MEDIA_PLAYESTREAM_I(\"fadein l:%d base:%d dest:%d\", len, base,\n  //    dest); DUMP16(\"%5d \", buf, 20); DUMP16(\"%5d \", buf+len-19, 20);\n\n  for (i = base; i < dest; i++) {\n    *(buf + j) = *(buf + j) * i / need_fadein_len;\n    j++;\n  }\n\n  need_fadein_len_processed += j;\n  //    DUMP16(\"%05d \", buf, 20);\n  //    DUMP16(\"%5d \", buf+len-19, 20);\n  return len;\n}\n\nuint32_t app_play_single_sbc_more_data(uint8_t *buf, uint32_t len) {\n  // int32_t stime, etime;\n  // U16 byte_decode;\n  uint32_t l = 0;\n\n  // TRACE_MEDIA_PLAYESTREAM_I(\"app_play_sbc_more_data : %d, %d\",\n  // g_app_audio_read, g_app_audio_length);\n\n  if (g_app_audio_read < g_app_audio_length) {\n    unsigned int available_len = 0;\n    unsigned int store_len = 0;\n\n    available_len = AvailableOfCQueue(&media_sbc_queue);\n    store_len = (g_app_audio_length - g_app_audio_read) > available_len\n                    ? available_len\n                    : (g_app_audio_length - g_app_audio_read);\n    store_sbc_buffer((unsigned char *)(g_app_audio_data + g_app_audio_read),\n                     store_len);\n    g_app_audio_read += store_len;\n  }\n\n  l = decode_sbc_frame(buf, len);\n\n  if (l != len) {\n    g_app_audio_read = g_app_audio_length;\n    // af_stream_stop(AUD_STREAM_PLAYBACK);\n    // af_stream_close(AUD_STREAM_PLAYBACK);\n    TRACE_MEDIA_PLAYESTREAM_I(\n        \"[SINGLE_SBC_MORE_DATA][END] length:%d len:%d l:%d\", g_app_audio_length,\n        len, l);\n  }\n\n  return l;\n}\n\n/* play continue sound */\nuint32_t app_play_continue_sbc_more_data(uint8_t *buf, uint32_t len) {\n\n  uint32_t l, n, fsize = 0;\n\n  U8 *pdata = NULL;\n\n  // store data\n  unsigned int available_len = 0;\n  unsigned int store_len = 0;\n\n  if (pCont_context.g_play_continue_n < pCont_context.g_play_continue_total) {\n    do {\n      n = pCont_context.g_play_continue_n;\n      pdata = media_sound_map[pCont_context.g_play_continue_array[n]].data;\n      fsize = media_sound_map[pCont_context.g_play_continue_array[n]].fsize;\n\n      available_len = AvailableOfCQueue(&media_sbc_queue);\n      if (!available_len)\n        break;\n\n      store_len = (fsize - pCont_context.g_play_continue_fread) > available_len\n                      ? available_len\n                      : (fsize - pCont_context.g_play_continue_fread);\n      store_sbc_buffer(\n          (unsigned char *)(pdata + pCont_context.g_play_continue_fread),\n          store_len);\n      pCont_context.g_play_continue_fread += store_len;\n      if (pCont_context.g_play_continue_fread == fsize) {\n        pCont_context.g_play_continue_n++;\n        pCont_context.g_play_continue_fread = 0;\n      }\n    } while (pCont_context.g_play_continue_n <\n             pCont_context.g_play_continue_total);\n  }\n\n  l = decode_sbc_frame(buf, len);\n\n  if (l != len) {\n    TRACE_MEDIA_PLAYESTREAM_I(\"[CONTINUE_SBC_MORE_DATA][END]\");\n  }\n\n  return l;\n}\n\nuint32_t app_play_sbc_channel_select(int16_t *dst_buf, int16_t *src_buf,\n                                     uint32_t src_len) {\n#if defined(IBRT)\n  if (IS_PROMPT_CHNLSEl_ALL(g_prompt_chnlsel) ||\n      app_ibrt_voice_report_is_me(\n          PROMPT_CHNLSEl_FROM_ID_VALUE(g_prompt_chnlsel))) {\n    // Copy from tail so that it works even if dst_buf == src_buf\n    for (int i = (int)(src_len - 1); i >= 0; i--) {\n      dst_buf[i * 2 + 0] = dst_buf[i * 2 + 1] = src_buf[i];\n    }\n  } else {\n    // Copy from tail so that it works even if dst_buf == src_buf\n    for (int i = (int)(src_len - 1); i >= 0; i--) {\n      dst_buf[i * 2 + 0] = dst_buf[i * 2 + 1] = 0;\n    }\n  }\n#else\n  if (IS_PROMPT_CHNLSEl_ALL(g_prompt_chnlsel)) {\n    // Copy from tail so that it works even if dst_buf == src_buf\n    for (int i = (int)(src_len - 1); i >= 0; i--) {\n      dst_buf[i * 2 + 0] = dst_buf[i * 2 + 1] = src_buf[i];\n    }\n  } else if (IS_PROMPT_CHNLSEl_LCHNL(g_prompt_chnlsel)) {\n    // Copy from tail so that it works even if dst_buf == src_buf\n    for (int i = (int)(src_len - 1); i >= 0; i--) {\n      dst_buf[i * 2 + 0] = src_buf[i];\n      dst_buf[i * 2 + 1] = 0;\n    }\n  } else if (IS_PROMPT_CHNLSEl_RCHNL(g_prompt_chnlsel)) {\n    // Copy from tail so that it works even if dst_buf == src_buf\n    for (int i = (int)(src_len - 1); i >= 0; i--) {\n      dst_buf[i * 2 + 0] = 0;\n      dst_buf[i * 2 + 1] = src_buf[i];\n    }\n  } else {\n    // Copy from tail so that it works even if dst_buf == src_buf\n    for (int i = (int)(src_len - 1); i >= 0; i--) {\n      dst_buf[i * 2 + 0] = dst_buf[i * 2 + 1] = 0;\n    }\n  }\n#endif\n  return 0;\n}\n\n#ifdef __BT_ANC__\nextern uint8_t bt_sco_samplerate_ratio;\nextern void us_fir_init(void);\nextern U32 us_fir_run(short *src_buf, short *dst_buf, U32 in_samp_num);\n#endif\n\nuint32_t g_cache_buff_sz = 0;\n\nstatic int16_t *app_play_sbc_cache = NULL;\nuint32_t app_play_sbc_more_data(uint8_t *buf, uint32_t len) {\n#if defined(IBRT)\n  app_ibrt_voice_report_trigger_checker();\n#endif\n\n#ifdef VOICE_DATAPATH\n  if (app_voicepath_get_stream_pending_state(VOICEPATH_STREAMING)) {\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n#ifdef MIX_MIC_DURING_MUSIC\n    app_voicepath_enable_hw_sidetone(0, HW_SIDE_TONE_MAX_ATTENUATION_COEF);\n#endif\n    app_voicepath_set_stream_state(VOICEPATH_STREAMING, true);\n    app_voicepath_set_pending_started_stream(VOICEPATH_STREAMING, false);\n  }\n#endif\n  uint32_t l = 0;\n\n  memset(buf, 0, len);\n\n#if defined(MEDIA_PLAY_24BIT)\n  len /= 2;\n#endif\n\n#ifdef __BT_ANC__\n  uint32_t dec_len = len / bt_sco_samplerate_ratio;\n#endif\n\n  if (app_play_sbc_cache)\n    memset(app_play_sbc_cache, 0, g_cache_buff_sz);\n\n  if (app_play_sbc_stop_proc_cnt) {\n    if (app_play_sbc_stop_proc_cnt == 1) {\n      app_play_sbc_stop_proc_cnt = 2;\n    } else if (app_play_sbc_stop_proc_cnt == 2) {\n      app_play_sbc_stop_proc_cnt = 3;\n\n      // For 8K sample rate data, it takes about 4ms (or 12ms if h/w resample in\n      // use) from codec to DAC PA. The playback stream should be stopped after\n      // the last data arrives at DAC PA, otherwise there might be some pop\n      // sound.\n      app_play_audio_stop();\n    }\n  } else {\n    if (app_play_sbc_cache) {\n#ifdef __BT_ANC__\n      len = dec_len;\n#endif\n      if (g_play_continue_mark) {\n        l = app_play_continue_sbc_more_data((uint8_t *)app_play_sbc_cache,\n                                            len / 2);\n      } else {\n        l = app_play_single_sbc_more_data((uint8_t *)app_play_sbc_cache,\n                                          len / 2);\n      }\n      if (l != len / 2) {\n#ifdef __BT_ANC__\n        len = dec_len * 3;\n#endif\n        memset(app_play_sbc_cache + l, 0, len / 2 - l);\n        app_play_sbc_stop_proc_cnt = 1;\n      }\n#ifdef __BT_ANC__\n      len = dec_len * 3;\n      l = l * 3;\n      us_fir_run((short *)app_play_sbc_cache, (short *)buf, dec_len / 2 / 2);\n      app_play_sbc_channel_select((int16_t *)buf, (int16_t *)buf, len / 2 / 2);\n#else\n      app_play_sbc_channel_select((int16_t *)buf, app_play_sbc_cache,\n                                  len / 2 / 2);\n#endif\n\n#if defined(MEDIA_PLAY_24BIT)\n      int32_t *buf32 = (int32_t *)buf;\n      int16_t *buf16 = (int16_t *)buf;\n\n      for (int16_t i = len / 2 - 1; i >= 0; i--) {\n        buf32[i] = ((int32_t)buf16[i] << 8);\n      }\n      len *= 2;\n#endif\n    } else {\n#if defined(MEDIA_PLAY_24BIT)\n      len *= 2;\n#endif\n      memset(buf, 0, len);\n    }\n  }\n\n  return l;\n}\n\n#ifdef AUDIO_LINEIN\nstatic uint8_t app_play_lineinmode_merge = 0;\nstatic uint8_t app_play_lineinmode_mode = 0;\n\ninline static void app_play_audio_lineinmode_mono_merge(int16_t *aud_buf_mono,\n                                                        int16_t *ring_buf_mono,\n                                                        uint32_t aud_buf_len) {\n  uint32_t i = 0;\n  for (i = 0; i < aud_buf_len; i++) {\n    aud_buf_mono[i] = (aud_buf_mono[i] >> 1) + (ring_buf_mono[i] >> 1);\n  }\n}\n\ninline static void app_play_audio_lineinmode_stereo_merge(\n    int16_t *aud_buf_stereo, int16_t *ring_buf_mono, uint32_t aud_buf_len) {\n  uint32_t aud_buf_stereo_offset = 0;\n  uint32_t ring_buf_mono_offset = 0;\n  for (aud_buf_stereo_offset = 0; aud_buf_stereo_offset < aud_buf_len;) {\n    aud_buf_stereo[aud_buf_stereo_offset] =\n        aud_buf_stereo[aud_buf_stereo_offset] +\n        (ring_buf_mono[ring_buf_mono_offset] >> 1);\n    aud_buf_stereo_offset++;\n    aud_buf_stereo[aud_buf_stereo_offset] =\n        aud_buf_stereo[aud_buf_stereo_offset] +\n        (ring_buf_mono[ring_buf_mono_offset] >> 1);\n    aud_buf_stereo_offset++;\n    ring_buf_mono_offset++;\n  }\n}\n\nuint32_t app_play_audio_lineinmode_more_data(uint8_t *buf, uint32_t len) {\n  uint32_t l = 0;\n  if (app_play_lineinmode_merge && app_play_sbc_cache) {\n    TRACE(1, \"line in mode:%d \", len);\n    if (app_play_lineinmode_mode == 1) {\n      if (g_play_continue_mark) {\n        l = app_play_continue_sbc_more_data((uint8_t *)app_play_sbc_cache, len);\n      } else {\n        l = app_play_single_sbc_more_data((uint8_t *)app_play_sbc_cache, len);\n      }\n      if (l != len) {\n        memset(app_play_sbc_cache + l, 0, len - l);\n        app_play_lineinmode_merge = 0;\n      }\n      app_play_audio_lineinmode_mono_merge(\n          (int16_t *)buf, (int16_t *)app_play_sbc_cache, len / 2);\n    } else if (app_play_lineinmode_mode == 2) {\n      if (g_play_continue_mark) {\n        l = app_play_continue_sbc_more_data((uint8_t *)app_play_sbc_cache,\n                                            len / 2);\n      } else {\n        l = app_play_single_sbc_more_data((uint8_t *)app_play_sbc_cache,\n                                          len / 2);\n      }\n      if (l != len / 2) {\n        memset(app_play_sbc_cache + l, 0, len / 2 - l);\n        app_play_lineinmode_merge = 0;\n      }\n      app_play_audio_lineinmode_stereo_merge(\n          (int16_t *)buf, (int16_t *)app_play_sbc_cache, len / 2);\n    }\n  }\n\n  return l;\n}\n\nint app_play_audio_lineinmode_init(uint8_t mode, uint32_t buff_len) {\n  TRACE(1, \"lapp_play_audio_lineinmode_init:%d \", buff_len);\n  app_play_lineinmode_mode = mode;\n  app_audio_mempool_get_buff((uint8_t **)&app_play_sbc_cache, buff_len);\n  media_audio_init();\n  return 0;\n}\n\nint app_play_audio_lineinmode_start(APP_AUDIO_STATUS *status) {\n  if (app_play_audio_sample_rate == AUD_SAMPRATE_44100) {\n    LOCK_APP_AUDIO_QUEUE();\n    APP_AUDIO_DeCQueue(&media_sbc_queue, 0,\n                       APP_AUDIO_LengthOfCQueue(&media_sbc_queue));\n    UNLOCK_APP_AUDIO_QUEUE();\n    app_play_lineinmode_merge = 1;\n    need_init_decoder = 1;\n    media_Play_init_audio(status->aud_id);\n  }\n  return 0;\n}\n\nint app_play_audio_lineinmode_stop(APP_AUDIO_STATUS *status) {\n  app_play_lineinmode_merge = 0;\n  return 0;\n}\n#endif\n\n#if defined(AUDIO_ANC_FB_MC_MEDIA) && defined(ANC_APP) &&                      \\\n    !defined(__AUDIO_RESAMPLE__)\n#define DELAY_SAMPLE_MC (33 * 2) //  2:ch\nstatic int32_t delay_buf_media[DELAY_SAMPLE_MC];\nstatic uint32_t audio_mc_data_playback_media(uint8_t *buf,\n                                             uint32_t mc_len_bytes) {\n  uint32_t begin_time;\n  // uint32_t end_time;\n  begin_time = hal_sys_timer_get();\n  TRACE_MEDIA_PLAYESTREAM_I(\"[PLAYBACK_MEDIA][MC] %d\", begin_time);\n\n  float left_gain;\n  float right_gain;\n  int32_t playback_len_bytes, mc_len_bytes_8;\n  int32_t i, j, k;\n  int delay_sample;\n\n  mc_len_bytes_8 = mc_len_bytes / 8;\n\n  hal_codec_get_dac_gain(&left_gain, &right_gain);\n\n  // TRACE_MEDIA_PLAYESTREAM_I(\"playback_samplerate_ratio:\n  // %d\",playback_samplerate_ratio);\n\n  // TRACE_MEDIA_PLAYESTREAM_I(\"left_gain:  %d\",(int)(left_gain*(1<<12)));\n  // TRACE_MEDIA_PLAYESTREAM_I(\"right_gain: %d\",(int)(right_gain*(1<<12)));\n\n  playback_len_bytes = mc_len_bytes / playback_samplerate_ratio_bt;\n\n  if (sample_size_play_bt == AUD_BITS_16) {\n    int16_t *sour_p = (int16_t *)(playback_buf_bt + playback_size_bt / 2);\n    int16_t *mid_p = (int16_t *)(buf);\n    int16_t *mid_p_8 = (int16_t *)(buf + mc_len_bytes - mc_len_bytes_8);\n    int16_t *dest_p = (int16_t *)buf;\n\n    if (buf == playback_buf_mc) {\n      sour_p = (int16_t *)playback_buf_bt;\n    }\n\n    delay_sample = DELAY_SAMPLE_MC;\n\n    for (i = 0, j = 0; i < delay_sample; i = i + 2) {\n      mid_p[j++] = delay_buf_media[i];\n      mid_p[j++] = delay_buf_media[i + 1];\n    }\n\n    for (i = 0; i < playback_len_bytes / 2 - delay_sample; i = i + 2) {\n      mid_p[j++] = sour_p[i];\n      mid_p[j++] = sour_p[i + 1];\n    }\n\n    for (j = 0; i < playback_len_bytes / 2; i = i + 2) {\n      delay_buf_media[j++] = sour_p[i];\n      delay_buf_media[j++] = sour_p[i + 1];\n    }\n\n    if (playback_samplerate_ratio_bt <= 8) {\n      for (i = 0, j = 0; i < playback_len_bytes / 2;\n           i = i + 2 * (8 / playback_samplerate_ratio_bt)) {\n        mid_p_8[j++] = mid_p[i];\n        mid_p_8[j++] = mid_p[i + 1];\n      }\n    } else {\n      for (i = 0, j = 0; i < playback_len_bytes / 2; i = i + 2) {\n        for (k = 0; k < playback_samplerate_ratio_bt / 8; k++) {\n          mid_p_8[j++] = mid_p[i];\n          mid_p_8[j++] = mid_p[i + 1];\n        }\n      }\n    }\n\n    anc_mc_run_stereo((uint8_t *)mid_p_8, mc_len_bytes_8, left_gain, right_gain,\n                      AUD_BITS_16);\n\n    for (i = 0, j = 0; i < (mc_len_bytes_8) / 2; i = i + 2) {\n      for (k = 0; k < 8; k++) {\n        dest_p[j++] = mid_p_8[i];\n        dest_p[j++] = mid_p_8[i + 1];\n      }\n    }\n\n  } else if (sample_size_play_bt == AUD_BITS_24) {\n    int32_t *sour_p = (int32_t *)(playback_buf_bt + playback_size_bt / 2);\n    int32_t *mid_p = (int32_t *)(buf);\n    int32_t *mid_p_8 = (int32_t *)(buf + mc_len_bytes - mc_len_bytes_8);\n    int32_t *dest_p = (int32_t *)buf;\n\n    if (buf == (playback_buf_mc)) {\n      sour_p = (int32_t *)playback_buf_bt;\n    }\n\n    delay_sample = DELAY_SAMPLE_MC;\n\n    for (i = 0, j = 0; i < delay_sample; i = i + 2) {\n      mid_p[j++] = delay_buf_media[i];\n      mid_p[j++] = delay_buf_media[i + 1];\n    }\n\n    for (i = 0; i < playback_len_bytes / 4 - delay_sample; i = i + 2) {\n      mid_p[j++] = sour_p[i];\n      mid_p[j++] = sour_p[i + 1];\n    }\n\n    for (j = 0; i < playback_len_bytes / 4; i = i + 2) {\n      delay_buf_media[j++] = sour_p[i];\n      delay_buf_media[j++] = sour_p[i + 1];\n    }\n\n    if (playback_samplerate_ratio_bt <= 8) {\n      for (i = 0, j = 0; i < playback_len_bytes / 4;\n           i = i + 2 * (8 / playback_samplerate_ratio_bt)) {\n        mid_p_8[j++] = mid_p[i];\n        mid_p_8[j++] = mid_p[i + 1];\n      }\n    } else {\n      for (i = 0, j = 0; i < playback_len_bytes / 4; i = i + 2) {\n        for (k = 0; k < playback_samplerate_ratio_bt / 8; k++) {\n          mid_p_8[j++] = mid_p[i];\n          mid_p_8[j++] = mid_p[i + 1];\n        }\n      }\n    }\n\n    anc_mc_run_stereo((uint8_t *)mid_p_8, mc_len_bytes_8, left_gain, right_gain,\n                      AUD_BITS_24);\n\n    for (i = 0, j = 0; i < (mc_len_bytes_8) / 4; i = i + 2) {\n      for (k = 0; k < 8; k++) {\n        dest_p[j++] = mid_p_8[i];\n        dest_p[j++] = mid_p_8[i + 1];\n      }\n    }\n  }\n\n  //  end_time = hal_sys_timer_get();\n\n  //   TRACE_MEDIA_PLAYESTREAM_I(\"%s:run time: %d\", __FUNCTION__,\n  //   end_time-begin_time);\n\n  return 0;\n}\n#endif\n\nvoid app_audio_playback_done(void) {\n#if defined(IBRT)\n  app_tws_sync_prompt_check();\n#endif\n}\n\nint app_play_audio_stop(void) {\n  TRACE_MEDIA_PLAYESTREAM_I(\"[STOP]\");\n\n  app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_CLOSE, 0);\n  return 0;\n}\n\nuint32_t g_active_aud_id = MAX_RECORD_NUM;\n\nint app_play_audio_set_aud_id(uint32_t aud_id) {\n  g_active_aud_id = aud_id;\n  return 0;\n}\n\nint app_play_audio_get_aud_id(void) { return g_active_aud_id; }\n\nvoid app_play_audio_set_lang(int L) { g_language = L; }\n\nint app_play_audio_get_lang() { return g_language; }\nextern struct BT_DEVICE_T app_bt_device;\nint app_play_audio_onoff(bool onoff, APP_AUDIO_STATUS *status) {\n  static bool isRun = false;\n\n  struct AF_STREAM_CONFIG_T stream_cfg;\n  uint8_t *bt_audio_buff = NULL;\n  uint16_t bytes_parsed = 0;\n  enum AUD_SAMPRATE_T sample_rate POSSIBLY_UNUSED = AUD_SAMPRATE_16000;\n  uint16_t aud_id = 0;\n  uint16_t aud_pram = 0;\n\n  TRACE_MEDIA_PLAYESTREAM_I(\"[MEDIA_ONOFF] %s, to %s it\",\n                            isRun ? \"Running\" : \"Idle\",\n                            onoff ? \"start\" : \"stop\");\n\n  if (isRun == onoff) {\n    return 0;\n  }\n  if (onoff) {\n\n#ifdef WL_DET\n    app_mic_alg_audioloop(false, APP_SYSFREQ_78M);\n#endif\n\n#if defined(__AI_VOICE__) || defined(BISTO_ENABLED)\n    app_ai_if_inform_music_or_prompt_status(true, AUD_SAMPRATE_16000);\n    app_ai_if_pre_music_or_prompt_check();\n#endif\n\n#if defined(__THIRDPARTY)\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n                                             THIRDPARTY_STOP);\n#endif\n    aud_id = PROMPT_ID_FROM_ID_VALUE(status->aud_id);\n    aud_pram = PROMPT_PRAM_FROM_ID_VALUE(status->aud_id);\n    g_prompt_chnlsel = PROMPT_CHNLSEl_FROM_ID_VALUE(aud_pram);\n    TRACE_MEDIA_PLAYESTREAM_I(\n        \"[MEDIA_ONOFF] aud_id:%04x %s aud_pram:%04x chnlsel:%d\", status->aud_id,\n        aud_id2str(aud_id), aud_pram, g_prompt_chnlsel);\n\n    media_Play_init_audio(aud_id);\n    app_play_audio_set_aud_id(aud_id);\n    if (!g_app_audio_length) {\n      app_audio_sendrequest(APP_PLAY_BACK_AUDIO, (uint8_t)APP_BT_SETTING_CLOSE,\n                            0);\n      return 0;\n    }\n\n#if defined(AUDIO_ANC_FB_MC_MEDIA) && defined(ANC_APP) &&                      \\\n    !defined(__AUDIO_RESAMPLE__)\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_104M);\n#else\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_52M);\n#endif\n    af_set_priority(AF_USER_AUDIO, osPriorityHigh);\n    app_audio_mempool_init_with_specific_size(APP_AUDIO_BUFFER_SIZE);\n    media_audio_init();\n\n#if (defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)) &&       \\\n    defined(ENHANCED_STACK)\n    if (app_bt_device.src_or_snk == BT_DEVICE_SRC) {\n      app_a2dp_source_init();\n    }\n#endif\n\n    btif_sbc_init_decoder(media_sbc_decoder);\n    btif_sbc_decode_frames(media_sbc_decoder, g_app_audio_data,\n                           g_app_audio_length, &bytes_parsed, NULL, 0, NULL);\n    switch (media_sbc_decoder->streamInfo.sampleFreq) {\n    case BTIF_SBC_CHNL_SAMPLE_FREQ_16:\n      sample_rate = AUD_SAMPRATE_16000;\n      break;\n    case BTIF_SBC_CHNL_SAMPLE_FREQ_32:\n      sample_rate = AUD_SAMPRATE_32000;\n      break;\n    case BTIF_SBC_CHNL_SAMPLE_FREQ_44_1:\n      sample_rate = AUD_SAMPRATE_44100;\n      break;\n    case BTIF_SBC_CHNL_SAMPLE_FREQ_48:\n      sample_rate = AUD_SAMPRATE_48000;\n      break;\n    default:\n      sample_rate = AUD_SAMPRATE_16000;\n      break;\n    }\n\n#ifdef PLAYBACK_USE_I2S\n    hal_cmu_audio_resample_disable();\n#endif\n\n    memset(&stream_cfg, 0, sizeof(stream_cfg));\n\n#if defined(MEDIA_PLAY_24BIT)\n    stream_cfg.bits = AUD_BITS_24;\n#else\n    stream_cfg.bits = AUD_BITS_16;\n#endif\n    stream_cfg.channel_num = AUD_CHANNEL_NUM_2;\n#ifdef __BT_ANC__\n    stream_cfg.sample_rate = AUD_SAMPRATE_48000;\n#else\n    stream_cfg.sample_rate = AUD_SAMPRATE_16000;\n#endif\n#ifdef PLAYBACK_USE_I2S\n    stream_cfg.device = AUD_STREAM_USE_I2S0_MASTER;\n    stream_cfg.io_path = AUD_IO_PATH_NULL;\n#else\n    stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n    stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n#endif\n#ifdef __INTERACTION__\n    if (aud_id == AUD_ID_BT_FINDME) {\n      stream_cfg.vol = g_findme_fadein_vol;\n    } else\n#endif\n    {\n      stream_cfg.vol = TGT_VOLUME_LEVEL_WARNINGTONE;\n    }\n    stream_cfg.handler = app_play_sbc_more_data;\n\n    stream_cfg.data_size = APP_AUDIO_PLAYBACK_BUFF_SIZE;\n\n#if defined(MEDIA_PLAY_24BIT)\n    stream_cfg.data_size *= 2;\n#endif\n\n    g_cache_buff_sz = stream_cfg.data_size / 2 / 2;\n\n    app_audio_mempool_get_buff((uint8_t **)&app_play_sbc_cache,\n                               g_cache_buff_sz);\n    app_audio_mempool_get_buff(&bt_audio_buff, stream_cfg.data_size);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n\n#ifdef __BT_ANC__\n    bt_sco_samplerate_ratio = 3;\n    us_fir_init();\n#endif\n\n#if defined(AUDIO_ANC_FB_MC_MEDIA) && defined(ANC_APP) &&                      \\\n    !defined(__AUDIO_RESAMPLE__)\n    sample_size_play_bt = stream_cfg.bits;\n    sample_rate_play_bt = stream_cfg.sample_rate;\n    data_size_play_bt = stream_cfg.data_size;\n    playback_buf_bt = stream_cfg.data_ptr;\n    playback_size_bt = stream_cfg.data_size;\n#ifdef __BT_ANC__\n    playback_samplerate_ratio_bt = 8;\n#else\n    playback_samplerate_ratio_bt = 8 * 3;\n#endif\n    playback_ch_num_bt = stream_cfg.channel_num;\n#endif\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg);\n\n#if defined(AUDIO_ANC_FB_MC_MEDIA) && defined(ANC_APP) &&                      \\\n    !defined(__AUDIO_RESAMPLE__)\n    stream_cfg.bits = sample_size_play_bt;\n    stream_cfg.channel_num = playback_ch_num_bt;\n    stream_cfg.sample_rate = sample_rate_play_bt;\n    stream_cfg.device = AUD_STREAM_USE_MC;\n    stream_cfg.vol = 0;\n    stream_cfg.handler = audio_mc_data_playback_media;\n    stream_cfg.io_path = AUD_OUTPUT_PATH_SPEAKER;\n\n    app_audio_mempool_get_buff(\n        &bt_audio_buff, data_size_play_bt * playback_samplerate_ratio_bt);\n    stream_cfg.data_ptr = BT_AUDIO_CACHE_2_UNCACHE(bt_audio_buff);\n    stream_cfg.data_size = data_size_play_bt * playback_samplerate_ratio_bt;\n\n    playback_buf_mc = stream_cfg.data_ptr;\n    playback_size_mc = stream_cfg.data_size;\n\n    anc_mc_run_init(hal_codec_anc_convert_rate(sample_rate_play_bt));\n    af_stream_open(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK, &stream_cfg);\n#endif\n\n#if !(defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE))\n    af_codec_tune(AUD_STREAM_NUM, 0);\n#endif\n\n#if defined(IBRT)\n    app_ibrt_voice_report_trigger_init(aud_id, aud_pram);\n#endif\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n#if defined(AUDIO_ANC_FB_MC_MEDIA) && defined(ANC_APP) &&                      \\\n    !defined(__AUDIO_RESAMPLE__)\n    af_stream_start(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n\n  } else {\n\n#ifdef VOICE_DATAPATH\n    app_voicepath_set_stream_state(AUDIO_OUTPUT_STREAMING, false);\n    app_voicepath_set_pending_started_stream(AUDIO_OUTPUT_STREAMING, false);\n#endif\n#if !(defined(__AUDIO_RESAMPLE__) && defined(SW_PLAYBACK_RESAMPLE))\n    af_codec_tune(AUD_STREAM_PLAYBACK, 0);\n#endif\n\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK);\n\n#if defined(AUDIO_ANC_FB_MC_MEDIA) && defined(ANC_APP) &&                      \\\n    !defined(__AUDIO_RESAMPLE__)\n    af_stream_stop(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n    af_stream_close(AUD_STREAM_ID_2, AUD_STREAM_PLAYBACK);\n#endif\n#if defined(IBRT)\n    app_ibrt_voice_report_trigger_deinit();\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n    audio_prompt_stop_playing();\n#endif\n#endif\n#ifdef PLAYBACK_USE_I2S\n    hal_cmu_audio_resample_enable();\n#endif\n\n    app_play_sbc_cache = NULL;\n    g_cache_buff_sz = 0;\n    g_prompt_chnlsel = PROMOT_ID_BIT_MASK_CHNLSEl_ALL;\n    app_play_audio_set_aud_id(MAX_RECORD_NUM);\n    af_set_priority(AF_USER_AUDIO, osPriorityAboveNormal);\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_0, APP_SYSFREQ_32K);\n\n    app_audio_playback_done();\n#if defined(__THIRDPARTY)\n    app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_NO1,\n                                             THIRDPARTY_START);\n#endif\n\n#ifdef WL_DET\n    app_mic_alg_audioloop(true, APP_SYSFREQ_78M);\n#endif\n  }\n  isRun = onoff;\n\n  return 0;\n}\n\nstatic void app_stop_local_prompt_playing(void) {\n  app_audio_sendrequest(APP_PLAY_BACK_AUDIO, APP_BT_SETTING_CLOSE, 0);\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n  audio_prompt_stop_playing();\n#endif\n}\n\nvoid app_stop_both_prompt_playing(void) {\n  app_stop_local_prompt_playing();\n  app_tws_stop_peer_prompt();\n}\n\nvoid app_tws_cmd_stop_prompt_handler(uint8_t *ptrParam, uint16_t paramLen) {\n  TRACE_MEDIA_PLAYESTREAM_I(\"[STOP_PROMPT_HANDLER]\");\n  app_stop_local_prompt_playing();\n}\n#endif\n"
  },
  {
    "path": "services/bt_app/app_media_player.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_MEDIA_PLAYER_H__\n#define __APP_MEDIA_PLAYER_H__\n\n#include \"resources.h\"\n#include \"app_bt_stream.h\"\n\n#define MEDIA_DEFAULT_LANGUAGE (0)\n\ntypedef enum\n{\n    T_AUDIO_ID = 0x0,\n        \n    T_AUDIO_NUMBER,     \n    \n}MEDIA_AUDIO_TYPE;\n\n#define MAX_PHB_NUMBER 20\n\n#define PROMOT_ID_BIT_MASK                      (0xff << 8)\n#define PROMOT_ID_BIT_MASK_MERGING              (1 << 15)\n#define PROMOT_ID_BIT_MASK_CHNLSEl_LCHNL        (1 << 14)\n#define PROMOT_ID_BIT_MASK_CHNLSEl_RCHNL        (1 << 13)\n#define PROMOT_ID_BIT_MASK_CHNLSEl_ALL          (PROMOT_ID_BIT_MASK_CHNLSEl_LCHNL|PROMOT_ID_BIT_MASK_CHNLSEl_RCHNL)\n\n#define IS_PROMPT_NEED_MERGING(promptId)           ((promptId)&PROMOT_ID_BIT_MASK_MERGING ? true : false)\n#define PROMPT_ID_FROM_ID_VALUE(promptIdVal)      ((promptIdVal)&(~PROMOT_ID_BIT_MASK))\n#define PROMPT_CHNLSEl_FROM_ID_VALUE(promptIdVal) ((promptIdVal)&PROMOT_ID_BIT_MASK_CHNLSEl_ALL)\n#define PROMPT_PRAM_FROM_ID_VALUE(promptIdVal)    ((promptIdVal)&PROMOT_ID_BIT_MASK)\n#define IS_PROMPT_CHNLSEl_ALL(promptId)           (((promptId)&PROMOT_ID_BIT_MASK_CHNLSEl_ALL) == PROMOT_ID_BIT_MASK_CHNLSEl_ALL  ? true : false)\n#define IS_PROMPT_CHNLSEl_LCHNL(promptId)         (((promptId)&PROMOT_ID_BIT_MASK_CHNLSEl_ALL) == PROMOT_ID_BIT_MASK_CHNLSEl_RCHNL  ? true : false)\n#define IS_PROMPT_CHNLSEl_RCHNL(promptId)         (((promptId)&PROMOT_ID_BIT_MASK_CHNLSEl_ALL) == PROMOT_ID_BIT_MASK_CHNLSEl_LCHNL  ? true : false)\n\ntypedef struct \n{\n    uint16_t id;\n    uint16_t status;\n    // APP_AUDIO_STATUS\n    uint16_t aud_type;\n    uint16_t aud_id;\n    char phb_number[MAX_PHB_NUMBER];\t\n}msg_num_ptr;\n\ntypedef struct\n{\n    uint16_t    promptId;\n    int16_t     volume_level_override;\n    float       coeff_for_mix_prompt_for_music;\n    float       coeff_for_mix_music_for_music;\n    float       coeff_for_mix_prompt_for_call;\n    float       coeff_for_mix_call_for_call;\n\n} __attribute__((packed)) PROMPT_MIX_PROPERTY_T;\n\n#define PROMPT_MIX_PROPERTY_TO_ADD(promptId, \\\n                                    volume_level_override,  \\\n                                    coeff_for_mix_prompt_for_music, \\\n                                    coeff_for_mix_music_for_music,  \\\n                                    coeff_for_mix_prompt_for_call,  \\\n                                    coeff_for_mix_call_for_call)  \\\nstatic PROMPT_MIX_PROPERTY_T promptId##_entry __attribute__((used, section(\".mixprompt_property_table\"))) =     \\\n    {(promptId),                        \\\n    (volume_level_override),            \\\n    (coeff_for_mix_prompt_for_music),   \\\n    (coeff_for_mix_music_for_music),    \\\n    (coeff_for_mix_prompt_for_call),    \\\n    (coeff_for_mix_call_for_call),      \\\n    };\n\nextern uint32_t __mixprompt_property_table_start[];\nextern uint32_t __mixprompt_property_table_end[];\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n//uint32_t media_playAudioSideSelect(AUD_ID_ENUM id,uint8_t device_id, uint8_t side_select);\n// Prompt will be played on the both sides if they're connected.\n// If there are music/phone call on-going, the prompt will be mixed.\nuint32_t media_PlayAudio(AUD_ID_ENUM id,uint8_t device_id);\n\nuint32_t media_playAudioSideSelect(AUD_ID_ENUM id,uint8_t device_id, uint16_t side_select);\n\n// Prompt will be played locally no matter whether earbuds are connected or not\n// If there are music/phone call on-going, the prompt will be mixed.\nvoid media_PlayAudio_locally(AUD_ID_ENUM id, uint8_t device_id);\n\n// Prompt will be played on peer device only if they're connected. \n// If there are music/phone call on-going, the music or phone call output will be stopped\n// until the prompt playing is completed.\nvoid media_PlayAudio_remotely(AUD_ID_ENUM id, uint8_t device_id);\n\n// Prompt will be played on the both sides if they're connected.\n// If there are music/phone call on-going, the music or phone call output will be stopped\n// until the prompt playing is completed.\nvoid media_PlayAudio_standalone(AUD_ID_ENUM id, uint8_t device_id);\n\n// Prompt will be played locally no matter whether earbuds are connected or not\n// If there are music/phone call on-going, the music or phone call output will be stopped\n// until the prompt playing is completed.\nvoid media_PlayAudio_standalone_locally(AUD_ID_ENUM id, uint8_t device_id);\n\n// Prompt will be played on the peer device only if they're connected.\n// If there are music/phone call on-going, the music or phone call output will be stopped\n// until the prompt playing is completed.\nvoid media_PlayAudio_standalone_remotely(AUD_ID_ENUM id, uint8_t device_id);\n\nvoid media_Set_IncomingNumber(const char* pNumber);\n\nvoid media_FreeMemory(void* data);\n\nint app_play_audio_onoff(bool on, APP_AUDIO_STATUS* status);\n\nvoid stand_alone_prompt_supervision_timer_init(void);\n\nvoid app_play_audio_set_lang(int L);\n\nint app_play_audio_get_lang();\n\nvoid app_audio_playback_done(void);\n\nvoid media_runtime_audio_prompt_update(uint16_t id, uint8_t** ptr, uint32_t* len);\n\nPROMPT_MIX_PROPERTY_T* get_prompt_mix_property(uint16_t promptId);\n\nAUD_ID_ENUM media_GetCurrentPrompt(uint8_t device_id);\n\nAUD_ID_ENUM app_get_current_standalone_promptId(void);\n\nvoid update_standalone_prompt_volume(int8_t vol);\n\nvoid app_tws_cmd_stop_prompt_handler(uint8_t* ptrParam, uint16_t paramLen);\n\nvoid app_stop_both_prompt_playing(void);\n\nvoid app_tws_stop_peer_prompt(void);\n\nint app_play_audio_stop(void);\n\nint app_play_audio_get_aud_id(void);\n\nvoid trigger_media_play(AUD_ID_ENUM id, uint8_t device_id, uint16_t aud_pram);\nvoid trigger_media_stop(AUD_ID_ENUM id, uint8_t device_id);\n\n\n#ifdef AUDIO_LINEIN\nuint32_t app_play_audio_lineinmode_more_data(uint8_t *buf, uint32_t len);\n\nint app_play_audio_lineinmode_init(uint8_t mode, uint32_t buff_len);\n\nint app_play_audio_lineinmode_start(APP_AUDIO_STATUS* status);\n\nint app_play_audio_lineinmode_stop(APP_AUDIO_STATUS* status);\n\n#endif\n\nvoid app_tws_sync_prompt_check(void);\n\nvoid app_tws_sync_prompt_manager_reset(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/bt_app/app_rfcomm_mgr.cpp",
    "content": "#include \"app_rfcomm_mgr.h\"\n#include \"string.h\"\nextern \"C\" {\n#include \"app_bt.h\"\n#include \"bt_if.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"hal_trace.h\"\n#include \"os_api.h\"\n#include \"spp_api.h\"\n}\n\ntypedef struct {\n  uint8_t instanceIndex;\n\n  struct spp_device *sppDev;\n\n#if SPP_SERVER == XA_ENABLED\n  struct spp_service *sppService;\n  btif_sdp_record_t *sppSdpRecord;\n#endif\n\n  rfcomm_callback_func callback;\n  osMutexId service_mutex_id;\n} RfcommService_t;\n\n#define RFCOMM_SERVER_MAX_CHANNEL_CNT 4\n\nstatic RfcommService_t RfcommServiceInstance[RFCOMM_SERVER_MAX_CHANNEL_CNT];\nstatic uint8_t rfcomm_service_used_instance_cnt = 0;\n#define RFCOMM_RECV_BUFFER_SIZE 2048\n#define RFCOMM_RECV_BUFFER_POOL_SIZE                                           \\\n  (RFCOMM_SERVER_MAX_CHANNEL_CNT * RFCOMM_RECV_BUFFER_SIZE)\n\nstatic uint8_t rfcomm_rx_buf[RFCOMM_RECV_BUFFER_POOL_SIZE];\nstatic uint32_t rfcomm_rx_buf_allocated_offset = 0;\n\n/****************************************************************************\n * SPP SDP Entries\n ****************************************************************************/\nstatic const uint8_t RFCOMM_NULL_UUID_128[16] = {\n    0x00,\n};\n\nstatic const U8 rfcommClassId[] = {\n    SDP_ATTRIB_HEADER_8BIT(17),            /* Data Element Sequence, 17 bytes */\n    SDP_UUID_128BIT(RFCOMM_NULL_UUID_128), /* 128 bit UUID in Big Endian */\n};\n\nstatic uint8_t rfcommClassIdArray[RFCOMM_SERVER_MAX_CHANNEL_CNT *\n                                  sizeof(rfcommClassId)] = {\n\n};\n\nstatic const U8 RfcommProtoDescList[] = {\n    SDP_ATTRIB_HEADER_8BIT(12), /* Data element sequence, 12 bytes */\n\n    /* Each element of the list is a Protocol descriptor which is a\n     * data element sequence. The first element is L2CAP which only\n     * has a UUID element.\n     */\n    SDP_ATTRIB_HEADER_8BIT(3), /* Data element sequence for L2CAP, 3\n                                * bytes\n                                */\n\n    SDP_UUID_16BIT(PROT_L2CAP), /* Uuid16 L2CAP */\n\n    /* Next protocol descriptor in the list is RFCOMM. It contains two\n     * elements which are the UUID and the channel. Ultimately this\n     * channel will need to filled in with value returned by RFCOMM.\n     */\n\n    /* Data element sequence for RFCOMM, 5 bytes */\n    SDP_ATTRIB_HEADER_8BIT(5),\n\n    SDP_UUID_16BIT(PROT_RFCOMM), /* Uuid16 RFCOMM */\n\n    /* Uint8 RFCOMM channel number - value can vary */\n    SDP_UINT_8BIT(0)};\n\nstatic uint8_t RfcommProtoDescListArray[RFCOMM_SERVER_MAX_CHANNEL_CNT *\n                                        sizeof(RfcommProtoDescList)] = {\n\n};\n\n/*\n * BluetoothProfileDescriptorList\n */\nstatic const U8 ProfileDescList[] = {\n    SDP_ATTRIB_HEADER_8BIT(8), /* Data element sequence, 8 bytes */\n\n    /* Data element sequence for ProfileDescriptor, 6 bytes */\n    SDP_ATTRIB_HEADER_8BIT(6),\n\n    SDP_UUID_16BIT(SC_SERIAL_PORT), /* Uuid16 SPP */\n    SDP_UINT_16BIT(0x0102)          /* As per errata 2239 */\n};\n\n/* SPP attributes.\n *\n * This is a ROM template for the RAM structure used to register the\n * SPP SDP record.\n */\nstatic sdp_attribute_t rfcommAttributes[] = {\n    SDP_ATTRIBUTE(AID_SERVICE_CLASS_ID_LIST, rfcommClassId),\n\n    SDP_ATTRIBUTE(AID_PROTOCOL_DESC_LIST, RfcommProtoDescList),\n\n    SDP_ATTRIBUTE(AID_BT_PROFILE_DESC_LIST, ProfileDescList),\n};\n\nstatic sdp_attribute_t rfcommAttributesArray[RFCOMM_SERVER_MAX_CHANNEL_CNT]\n                                            [ARRAY_SIZE(rfcommAttributes)] = {\n\n};\n\nosThreadId app_rfcomm_get_rx_thread_id(uint8_t serviceIndex) {\n  if (serviceIndex < rfcomm_service_used_instance_cnt) {\n    return RfcommServiceInstance[serviceIndex].sppDev->reader_thread_id;\n  } else {\n    ASSERT(false, \"Wrong rfcomm service index %d\", serviceIndex);\n  }\n}\n\nuint8_t app_rfcomm_get_instance_index(void *dev) {\n  for (uint8_t index = 0; index < rfcomm_service_used_instance_cnt; index++) {\n    if ((struct spp_device *)dev == (RfcommServiceInstance[index].sppDev)) {\n      return index;\n    }\n  }\n\n  ASSERT(false, \"invalid rfcomm callback triggered!\");\n  return 0;\n}\n\nstatic void app_rfcomm_org_callback(struct spp_device *locDev,\n                                    struct spp_callback_parms *info) {\n  uint8_t index = app_rfcomm_get_instance_index(locDev);\n  RfcommService_t *pService = &(RfcommServiceInstance[index]);\n  RFCOMM_EVENT_E event;\n  uint16_t sentDataLen = 0;\n  uint8_t *sentDataBuf = NULL;\n\n  if (BTIF_SPP_EVENT_REMDEV_CONNECTED_IND == info->event) {\n    event = RFCOMM_INCOMING_CONN_REQ;\n  } else if (BTIF_SPP_EVENT_REMDEV_CONNECTED == info->event) {\n    event = RFCOMM_CONNECTED;\n  } else if (BTIF_SPP_EVENT_REMDEV_DISCONNECTED == info->event) {\n    event = RFCOMM_DISCONNECTED;\n  } else if (BTIF_SPP_EVENT_DATA_SENT == info->event) {\n    struct spp_tx_done *pTxDone = (struct spp_tx_done *)(info->p.other);\n    sentDataBuf = pTxDone->tx_buf;\n    sentDataLen = pTxDone->tx_data_length;\n    event = RFCOMM_TX_DONE;\n  } else {\n    event = RFCOMM_UNKNOWN_EVENT;\n  }\n\n  uint8_t *pBtAddr = NULL;\n  if (info->p.remDev) {\n    pBtAddr = btif_me_get_remote_device_bdaddr(info->p.remDev)->address;\n\n    if (pService->callback) {\n      bool ret = pService->callback(\n          event, index, btif_me_get_remote_device_hci_handle(info->p.remDev),\n          pBtAddr, sentDataBuf, sentDataLen);\n\n      if (!ret) {\n        if (RFCOMM_INCOMING_CONN_REQ == event) {\n          // reject the incoming connection request\n          info->status = BT_STS_CANCELLED;\n        }\n      }\n    }\n  }\n}\n\nosMutexId app_rfcomm_service_get_mutex(uint8_t instanceIndex) {\n  return RfcommServiceInstance[instanceIndex].service_mutex_id;\n}\n\nstatic bt_status_t app_rfcomm_service_init(\n    RfcommService_t *service, sdp_attribute_t *sdpAttributes,\n    int attributeCount, int serviceId, uint32_t app_id,\n    spp_handle_data_event_func_t dataRecCallback, int txPacketCount,\n    osMutexId mutexId, osMutexId creditMutexId) {\n  service->sppService = btif_create_spp_service();\n  service->sppDev = btif_create_spp_device();\n\n  service->sppDev->portType = BTIF_SPP_SERVER_PORT;\n  uint8_t *ptrRxBuf = &rfcomm_rx_buf[rfcomm_rx_buf_allocated_offset];\n  uint32_t rxBufSize = RFCOMM_RECV_BUFFER_SIZE;\n\n  rfcomm_rx_buf_allocated_offset += rxBufSize;\n\n  ASSERT(rfcomm_rx_buf_allocated_offset <= RFCOMM_RECV_BUFFER_POOL_SIZE,\n         \"RFComm rx buffer overflow! Need %d actual %d\",\n         rfcomm_rx_buf_allocated_offset, RFCOMM_RECV_BUFFER_POOL_SIZE);\n\n  btif_spp_init_rx_buf(service->sppDev, ptrRxBuf, rxBufSize);\n\n  service->sppSdpRecord = btif_sdp_create_record();\n\n  btif_sdp_record_param_t param;\n  param.attrs = sdpAttributes, param.attr_count = attributeCount;\n  param.COD = BTIF_COD_MAJOR_PERIPHERAL;\n  btif_sdp_record_setup(service->sppSdpRecord, ¶m);\n\n  service->sppService->rf_service.serviceId = serviceId;\n  service->sppService->numPorts = 0;\n  service->sppDev->app_id = app_id;\n  service->sppDev->spp_handle_data_event_func = dataRecCallback;\n  // TODO: add more in other files\n  service->sppDev->creditMutex = creditMutexId;\n\n  btif_spp_service_setup(service->sppDev, service->sppService,\n                         service->sppSdpRecord);\n  btif_spp_init_device(service->sppDev, txPacketCount, mutexId);\n\n  return btif_spp_open(service->sppDev, NULL, app_rfcomm_org_callback);\n}\n\nvoid app_rfcomm_read(uint8_t instanceIndex, uint8_t *pBuf, uint16_t *ptrLen) {\n  if (instanceIndex >= rfcomm_service_used_instance_cnt) {\n    return;\n  }\n\n  uint16_t lenToRead = *ptrLen;\n\n  btif_spp_read(RfcommServiceInstance[instanceIndex].sppDev, (char *)pBuf,\n                &lenToRead);\n  *ptrLen = lenToRead;\n}\n\nint8_t app_rfcomm_write(uint8_t instanceIndex, const uint8_t *pBuf,\n                        uint16_t length) {\n  if (instanceIndex >= rfcomm_service_used_instance_cnt) {\n    return -1;\n  }\n\n  uint16_t len = (uint16_t)length;\n  if (BT_STS_SUCCESS !=\n      btif_spp_write(RfcommServiceInstance[instanceIndex].sppDev, (char *)pBuf,\n                     &len)) {\n    return -1;\n  } else {\n    return 0;\n  }\n}\n\nbool app_rfcomm_removesdpservice(uint8_t instanceIndex) {\n  if (instanceIndex >= rfcomm_service_used_instance_cnt) {\n    return false;\n  }\n\n  return (BT_STS_SUCCESS ==\n          btif_sdp_remove_record(\n              &(RfcommServiceInstance[instanceIndex].sppSdpRecord)));\n}\n\nbool app_rfcomm_addsdpservice(uint8_t instanceIndex) {\n  if (instanceIndex >= rfcomm_service_used_instance_cnt) {\n    return false;\n  }\n\n  return (BT_STS_SUCCESS ==\n          btif_sdp_add_record(\n              &(RfcommServiceInstance[instanceIndex].sppSdpRecord)));\n}\n\nvoid app_rfcomm_close(uint8_t instanceIndex) {\n  if (instanceIndex >= rfcomm_service_used_instance_cnt) {\n    return;\n  }\n  btif_spp_close(RfcommServiceInstance[instanceIndex].sppDev);\n}\n\nint8_t app_rfcomm_open(RFCOMM_CONFIG_T *ptConfig) {\n  if (rfcomm_service_used_instance_cnt >= RFCOMM_SERVER_MAX_CHANNEL_CNT) {\n    return -1;\n  }\n\n  RfcommService_t *sppServiceInstance =\n      &RfcommServiceInstance[rfcomm_service_used_instance_cnt];\n\n  sppServiceInstance->callback = ptConfig->callback;\n\n  memcpy(&rfcommClassIdArray[rfcomm_service_used_instance_cnt *\n                             sizeof(rfcommClassId)],\n         rfcommClassId, sizeof(rfcommClassId));\n  for (int32_t index = 0; index < 16; index++) {\n    rfcommClassIdArray[rfcomm_service_used_instance_cnt *\n                           sizeof(rfcommClassId) +\n                       3 + index] = ptConfig->rfcomm_128bit_uuid[15 - index];\n  }\n\n  memcpy(&RfcommProtoDescListArray[rfcomm_service_used_instance_cnt *\n                                   sizeof(RfcommProtoDescList)],\n         RfcommProtoDescList, sizeof(RfcommProtoDescList));\n  memcpy(&RfcommProtoDescListArray[rfcomm_service_used_instance_cnt *\n                                       sizeof(RfcommProtoDescList) +\n                                   13],\n         &(ptConfig->rfcomm_ch), 1);\n\n  memcpy(&rfcommAttributesArray[rfcomm_service_used_instance_cnt],\n         rfcommAttributes, sizeof(rfcommAttributes));\n\n  rfcommAttributesArray[rfcomm_service_used_instance_cnt][0].value =\n      &rfcommClassIdArray[rfcomm_service_used_instance_cnt *\n                          sizeof(rfcommClassId)];\n  rfcommAttributesArray[rfcomm_service_used_instance_cnt][1].value =\n      &RfcommProtoDescListArray[rfcomm_service_used_instance_cnt *\n                                sizeof(RfcommProtoDescList)];\n\n  sppServiceInstance->instanceIndex = rfcomm_service_used_instance_cnt;\n\n  bt_status_t status = app_rfcomm_service_init(\n      sppServiceInstance,\n      rfcommAttributesArray[rfcomm_service_used_instance_cnt],\n      ARRAY_SIZE(rfcommAttributes), ptConfig->rfcomm_ch, ptConfig->app_id,\n      ptConfig->spp_handle_data_event_func, ptConfig->tx_pkt_cnt,\n      ptConfig->mutexId, ptConfig->creditMutexId);\n\n  if (status != BT_STS_SUCCESS) {\n    return -1;\n  } else {\n    return rfcomm_service_used_instance_cnt++;\n  }\n}\n\nvoid app_rfcomm_mgr_init(void) {\n  memset(&RfcommServiceInstance, 0, sizeof(RfcommServiceInstance));\n  rfcomm_service_used_instance_cnt = 0;\n}\n\n// Add services to sdp database, currently invoked on connection\n//\nvoid app_rfcomm_services_add_sdp(void) {}\n\n// Remove services from sdp database, currently invoked on disconnection\n//\nvoid app_rfcomm_services_remove_sdp(void) {}\n"
  },
  {
    "path": "services/bt_app/app_rfcomm_mgr.h",
    "content": "#ifndef __APP_RFCOMM_MGR_H__\n#define __APP_RFCOMM_MGR_H__\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"cmsis_os.h\"\n\n#if defined(__3M_PACK__)\n#define L2CAP_MTU                           980\n#else\n#define L2CAP_MTU                           672\n#endif\n\n#define SPP_MAX_PACKET_SIZE     L2CAP_MTU\n#define MAXIMUM_RFCOMM_TX_SIZE              ((L2CAP_MTU) - 10)\n#define SPP_TX_BUF_DATA_SIZE      4096\n#define SPP_MAX_PACKET_NUM \\\n  ((int)(SPP_TX_BUF_DATA_SIZE / MAXIMUM_RFCOMM_TX_SIZE))\n\ntypedef enum\n{\n    RFCOMM_INCOMING_CONN_REQ = 0,\n    RFCOMM_CONNECTED,\n    RFCOMM_DISCONNECTED,\n    RFCOMM_TX_DONE,\n    RFCOMM_UNKNOWN_EVENT\n} RFCOMM_EVENT_E;\n\ntypedef bool (*rfcomm_callback_func)(RFCOMM_EVENT_E event, uint8_t serviceIndex,\n    uint16_t connHandle, uint8_t* pBtAddr, uint8_t* pSentDataBuf, uint16_t sentDataLen);\n    \ntypedef int (*spp_handle_data_event_func_t)(void *pDev, uint8_t process, uint8_t *pData, uint16_t dataLen);\n\ntypedef struct\n{\n    uint8_t     rfcomm_ch;\n    uint8_t     tx_pkt_cnt;\n    uint32_t    app_id;\n    const uint8_t*          rfcomm_128bit_uuid;\n    rfcomm_callback_func    callback;\n    spp_handle_data_event_func_t spp_handle_data_event_func;\n    osMutexId   mutexId;\n    osMutexId   creditMutexId;\n} RFCOMM_CONFIG_T;\n\nint8_t app_rfcomm_open(RFCOMM_CONFIG_T* ptConfig);\nvoid app_rfcomm_close(uint8_t instanceIndex);\nint8_t app_rfcomm_write(uint8_t instanceIndex, const uint8_t* pBuf, uint16_t length);\nvoid app_rfcomm_read(uint8_t instanceIndex, uint8_t* pBuf, uint16_t* ptrLen);\nvoid app_rfcomm_mgr_init(void);\nuint8_t app_rfcomm_get_instance_index(void* dev);\nosThreadId app_rfcomm_get_rx_thread_id(uint8_t serviceIndex);\nvoid app_rfcomm_services_add_sdp(void);\nvoid app_rfcomm_services_remove_sdp(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // __APP_RFCOMM_MGR_H__\n\n"
  },
  {
    "path": "services/bt_app/app_ring_merge.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_ring_merge.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"res_audio_ring.h\"\n\n// control queue access\nosMutexId app_ring_merge_mutex_id = NULL;\nosMutexDef(app_ring_merge_mutex);\n\nextern \"C\" void app_stop_a2dp_media_stream(uint8_t devId);\nextern \"C\" void app_stop_sco_media_stream(uint8_t devId);\n\nstatic void app_ring_merge_finished_callback(void);\n\nenum APP_RING_MERGE_STATUS {\n  APP_RING_MERGE_STATUS_STOP,\n  APP_RING_MERGE_STATUS_START,\n  APP_RING_MERGE_STATUS_RUNNING\n};\n\nstruct APP_RING_MERGE_CONFIG_T {\n  APP_RING_MERGE_STATUS status;\n  int16_t *pbuf;\n  uint32_t len;\n  uint32_t next;\n  AUD_BITS_T bits;\n  enum APP_RING_MERGE_PLAY_T play;\n  AF_STREAM_HANDLER_T handler;\n\n  uint8_t pendingStopOp;\n  int8_t savedStoppedStreamId;\n};\n\nstruct APP_RING_MERGE_CONFIG_T app_ring_merge_config = {\n    .status = APP_RING_MERGE_STATUS_STOP,\n    .pbuf = NULL,\n    .len = 0,\n    .next = 0,\n    .bits = AUD_BITS_16,\n    .play = APP_RING_MERGE_PLAY_QTY,\n    .handler = NULL};\n\ntemplate  static DataType convertTo(int16_t x) {\n  return (x);\n}\n\ntemplate <> int32_t convertTo(int16_t x) { return (x << 8); }\n\ntemplate \nstatic void app_ring_merge_track_2_in_1(DataType *src_buf0, int16_t *src_buf1,\n                                        DataType *dst_buf, uint32_t src_len) {\n  uint32_t i = 0;\n  for (i = 0; i < src_len; i++) {\n    dst_buf[i] = (src_buf0[i] >> 1) + ((convertTo(src_buf1[i])) >> 1);\n  }\n}\n\n/*\nstatic void app_ring_merge_track_2_in_1_16bits(int16_t *src_buf0, int16_t\n*src_buf1, int16_t *dst_buf,  uint32_t src_len)\n{\n    app_ring_merge_track_2_in_1(src_buf0, src_buf1, dst_buf, src_len);\n}\n\nstatic void app_ring_merge_track_2_in_1_24bits(int32_t *src_buf0, int16_t\n*src_buf1, int32_t *dst_buf,  uint32_t src_len)\n{\n    app_ring_merge_track_2_in_1(src_buf0, src_buf1, dst_buf, src_len);\n}\n*/\n\ntemplate \nstatic uint32_t app_ring_merge_oneshot_more_data_impl(uint8_t *buf,\n                                                      uint32_t len) {\n  uint32_t need_len = len / sizeof(DataType);\n  DataType *pBuf = (DataType *)buf;\n\n  uint32_t curr_size = 0;\n\n  if (app_ring_merge_config.next == app_ring_merge_config.len) {\n    return len;\n  }\n\n  if (need_len > app_ring_merge_config.len) {\n    app_ring_merge_track_2_in_1(pBuf, app_ring_merge_config.pbuf, pBuf,\n                                app_ring_merge_config.len);\n    app_ring_merge_config.next = app_ring_merge_config.len;\n    app_ring_merge_finished_callback();\n  } else {\n    if ((app_ring_merge_config.len - app_ring_merge_config.next) >= need_len) {\n      app_ring_merge_track_2_in_1(\n          pBuf, app_ring_merge_config.pbuf + app_ring_merge_config.next, pBuf,\n          need_len);\n      app_ring_merge_config.next += need_len;\n    } else {\n      curr_size = app_ring_merge_config.len - app_ring_merge_config.next;\n      app_ring_merge_track_2_in_1(\n          pBuf, app_ring_merge_config.pbuf + app_ring_merge_config.next, pBuf,\n          curr_size);\n      app_ring_merge_config.next = app_ring_merge_config.len;\n      app_ring_merge_finished_callback();\n    }\n  }\n  return len;\n}\n\nstatic uint32_t app_ring_merge_oneshot_more_data(uint8_t *buf, uint32_t len) {\n  uint32_t ret = 0;\n\n  if (app_ring_merge_config.bits == AUD_BITS_16)\n    ret = app_ring_merge_oneshot_more_data_impl(buf, len);\n  else if (app_ring_merge_config.bits == AUD_BITS_24)\n    ret = app_ring_merge_oneshot_more_data_impl(buf, len);\n  else\n    TRACE(1, \"[%s] warning not suitable callback available\", __func__);\n\n  return ret;\n}\n\ntemplate \nstatic uint32_t app_ring_merge_periodic_more_data_impl(uint8_t *buf,\n                                                       uint32_t len) {\n  uint32_t need_len = len / sizeof(DataType);\n  uint32_t remain_size = len / sizeof(DataType);\n  uint32_t curr_size = 0;\n  DataType *pBuf = (DataType *)buf;\n  if (need_len > app_ring_merge_config.len) {\n    do {\n      if (app_ring_merge_config.next) {\n        curr_size = app_ring_merge_config.len - app_ring_merge_config.next;\n        app_ring_merge_track_2_in_1(\n            pBuf, app_ring_merge_config.pbuf + app_ring_merge_config.next, pBuf,\n            curr_size);\n        remain_size -= curr_size;\n        app_ring_merge_config.next = 0;\n      } else if (remain_size > app_ring_merge_config.len) {\n        app_ring_merge_track_2_in_1(\n            pBuf + curr_size, app_ring_merge_config.pbuf, pBuf + curr_size,\n            app_ring_merge_config.len);\n        curr_size += app_ring_merge_config.len;\n        remain_size -= app_ring_merge_config.len;\n      } else {\n        app_ring_merge_track_2_in_1(pBuf + curr_size,\n                                    app_ring_merge_config.pbuf,\n                                    pBuf + curr_size, remain_size);\n        app_ring_merge_config.next = remain_size;\n        remain_size = 0;\n      }\n    } while (remain_size);\n  } else {\n    if ((app_ring_merge_config.len - app_ring_merge_config.next) >= need_len) {\n      app_ring_merge_track_2_in_1(\n          pBuf, app_ring_merge_config.pbuf + app_ring_merge_config.next, pBuf,\n          need_len);\n      app_ring_merge_config.next += need_len;\n    } else {\n      curr_size = app_ring_merge_config.len - app_ring_merge_config.next;\n      app_ring_merge_track_2_in_1(\n          pBuf, app_ring_merge_config.pbuf + app_ring_merge_config.next, pBuf,\n          curr_size);\n      app_ring_merge_config.next = need_len - curr_size;\n      app_ring_merge_track_2_in_1(pBuf + curr_size, app_ring_merge_config.pbuf,\n                                  pBuf + curr_size, app_ring_merge_config.next);\n    }\n  }\n  return len;\n}\n\nstatic uint32_t app_ring_merge_periodic_more_data(uint8_t *buf, uint32_t len) {\n  uint32_t ret = 0;\n\n  if (app_ring_merge_config.bits == AUD_BITS_16)\n    ret = app_ring_merge_periodic_more_data_impl(buf, len);\n  else if (app_ring_merge_config.bits == AUD_BITS_24)\n    ret = app_ring_merge_periodic_more_data_impl(buf, len);\n  else\n    TRACE(1, \"[%s] warning not suitable callback available\", __func__);\n\n  return ret;\n}\n\nuint32_t app_ring_merge_more_data(uint8_t *buf, uint32_t len) {\n  uint32_t nRet = len;\n\n  osMutexWait(app_ring_merge_mutex_id, osWaitForever);\n  if (app_ring_merge_config.handler &&\n      app_ring_merge_config.status != APP_RING_MERGE_STATUS_STOP) {\n    if (app_ring_merge_config.status == APP_RING_MERGE_STATUS_START) {\n      app_ring_merge_config.status = APP_RING_MERGE_STATUS_RUNNING;\n    }\n    nRet = app_ring_merge_config.handler(buf, len);\n  }\n  osMutexRelease(app_ring_merge_mutex_id);\n\n  return nRet;\n}\n\nint app_ring_merge_setup(int16_t *buf, uint32_t len,\n                         enum APP_RING_MERGE_PLAY_T play) {\n  TRACE(3, \"%s mode:%d len:%d\", __func__, play, len);\n\n  osMutexWait(app_ring_merge_mutex_id, osWaitForever);\n\n  app_ring_merge_config.status = APP_RING_MERGE_STATUS_STOP;\n  app_ring_merge_config.pbuf = (int16_t *)buf;\n  app_ring_merge_config.len = len;\n  app_ring_merge_config.next = 0;\n\n  app_ring_merge_config.play = play;\n\n  if (play == APP_RING_MERGE_PLAY_ONESHOT) {\n    app_ring_merge_config.handler = app_ring_merge_oneshot_more_data;\n  } else if (play == APP_RING_MERGE_PLAY_PERIODIC) {\n    app_ring_merge_config.handler = app_ring_merge_periodic_more_data;\n  }\n\n  osMutexRelease(app_ring_merge_mutex_id);\n\n  return 0;\n}\n\nint app_ring_merge_init(void) {\n  if (app_ring_merge_mutex_id == NULL) {\n    app_ring_merge_mutex_id = osMutexCreate((osMutex(app_ring_merge_mutex)));\n  }\n\n  app_ring_merge_config.savedStoppedStreamId = -1;\n  return 0;\n}\n\nint app_ring_merge_deinit(void) {\n  osMutexWait(app_ring_merge_mutex_id, osWaitForever);\n\n  app_ring_merge_config.status = APP_RING_MERGE_STATUS_STOP;\n  app_ring_merge_config.pbuf = NULL;\n  app_ring_merge_config.len = 0;\n  app_ring_merge_config.next = 0;\n  app_ring_merge_config.bits = AUD_BITS_16;\n  app_ring_merge_config.play = APP_RING_MERGE_PLAY_QTY;\n  app_ring_merge_config.handler = NULL;\n\n  app_ring_merge_config.savedStoppedStreamId = -1;\n\n  osMutexRelease(app_ring_merge_mutex_id);\n\n  return 0;\n}\n\nint app_ring_merge_start(void) {\n  uint32_t ret;\n  struct AF_STREAM_CONFIG_T *stream_cfg = NULL;\n\n  ret = af_stream_get_cfg(AUD_STREAM_ID_0, AUD_STREAM_PLAYBACK, &stream_cfg,\n                          true);\n  if (ret != 0) {\n    TRACE(0, \"Failed to get stream cfg\");\n    return 0;\n  }\n  TRACE(4, \"%s: sample_rate: %d, bits: %d, channel: %d\\n\", __func__,\n        stream_cfg->sample_rate, stream_cfg->bits, stream_cfg->channel_num);\n\n  osMutexWait(app_ring_merge_mutex_id, osWaitForever);\n#ifdef __BT_WARNING_TONE_MERGE_INTO_STREAM_SBC__\n  switch (stream_cfg->sample_rate) {\n  case AUD_SAMPRATE_8000:\n    app_ring_merge_setup((int16_t *)RES_AUD_RING_SAMPRATE_8000,\n                         sizeof(RES_AUD_RING_SAMPRATE_8000) / sizeof(int16_t),\n                         APP_RING_MERGE_PLAY_ONESHOT);\n    app_ring_merge_config.next = 0;\n    app_ring_merge_config.status = APP_RING_MERGE_STATUS_START;\n    break;\n  case AUD_SAMPRATE_16000:\n    TRACE(0, \"sample rate 16000 merge\");\n    app_ring_merge_setup((int16_t *)RES_AUD_RING_SAMPRATE_16000,\n                         sizeof(RES_AUD_RING_SAMPRATE_16000) / sizeof(int16_t),\n                         APP_RING_MERGE_PLAY_ONESHOT);\n    app_ring_merge_config.next = 0;\n    app_ring_merge_config.status = APP_RING_MERGE_STATUS_START;\n    break;\n  case AUD_SAMPRATE_44100:\n    app_ring_merge_setup((int16_t *)RES_AUD_RING_SAMPRATE_44100,\n                         sizeof(RES_AUD_RING_SAMPRATE_44100) / sizeof(int16_t),\n                         APP_RING_MERGE_PLAY_ONESHOT);\n    app_ring_merge_config.next = 0;\n    app_ring_merge_config.status = APP_RING_MERGE_STATUS_START;\n    break;\n\n  case AUD_SAMPRATE_48000:\n    app_ring_merge_setup((int16_t *)RES_AUD_RING_SAMPRATE_48000,\n                         sizeof(RES_AUD_RING_SAMPRATE_48000) / sizeof(int16_t),\n                         APP_RING_MERGE_PLAY_ONESHOT);\n    app_ring_merge_config.next = 0;\n    app_ring_merge_config.status = APP_RING_MERGE_STATUS_START;\n    break;\n  case AUD_SAMPRATE_22050:\n  case AUD_SAMPRATE_24000:\n  case AUD_SAMPRATE_96000:\n  case AUD_SAMPRATE_192000:\n  case AUD_SAMPRATE_NULL:\n  default:\n    app_ring_merge_config.next = 0;\n    app_ring_merge_config.status = APP_RING_MERGE_STATUS_START;\n    break;\n  }\n#else\n  app_ring_merge_setup((int16_t *)RES_AUD_RING_SAMPRATE_8000,\n                       sizeof(RES_AUD_RING_SAMPRATE_8000) / sizeof(int16_t),\n                       APP_RING_MERGE_PLAY_ONESHOT);\n\n  app_ring_merge_config.next = 0;\n  app_ring_merge_config.status = APP_RING_MERGE_STATUS_START;\n#endif\n  app_ring_merge_config.bits = stream_cfg->bits;\n\n  app_ring_merge_config.savedStoppedStreamId = -1;\n\n  osMutexRelease(app_ring_merge_mutex_id);\n\n  return 0;\n}\n\nint app_ring_merge_stop(void) {\n  osMutexWait(app_ring_merge_mutex_id, osWaitForever);\n  app_ring_merge_config.status = APP_RING_MERGE_STATUS_STOP;\n  app_ring_merge_config.next = 0;\n  osMutexRelease(app_ring_merge_mutex_id);\n\n  app_ring_merge_finished_callback();\n\n  return 0;\n}\n\nbool app_ring_merge_isrun(void) {\n  bool running = false;\n  osMutexWait(app_ring_merge_mutex_id, osWaitForever);\n  if (app_ring_merge_config.status == APP_RING_MERGE_STATUS_RUNNING) {\n    running = true;\n  }\n  osMutexRelease(app_ring_merge_mutex_id);\n  return running;\n}\n\nvoid app_ring_merge_save_pending_start_stream_op(uint8_t pendingStopOp,\n                                                 uint8_t deviceId) {\n  app_ring_merge_config.pendingStopOp = pendingStopOp;\n  app_ring_merge_config.savedStoppedStreamId = deviceId;\n}\n\nstatic void app_ring_merge_finished_callback(void) {\n  TRACE(1, \"%s\", __func__);\n  app_ring_merge_config.status = APP_RING_MERGE_STATUS_STOP;\n\n  if (app_ring_merge_config.savedStoppedStreamId >= 0) {\n    if (PENDING_TO_STOP_A2DP_STREAMING == app_ring_merge_config.pendingStopOp) {\n      TRACE(0, \"Stop the pending stopped a2dp media stream.\");\n      app_stop_a2dp_media_stream(app_ring_merge_config.savedStoppedStreamId);\n    } else if (PENDING_TO_STOP_SCO_STREAMING ==\n               app_ring_merge_config.pendingStopOp) {\n      TRACE(0, \"Stop the pending stopped sco media stream.\");\n      app_stop_sco_media_stream(app_ring_merge_config.savedStoppedStreamId);\n    }\n  }\n  app_ring_merge_config.savedStoppedStreamId = -1;\n}\n"
  },
  {
    "path": "services/bt_app/app_ring_merge.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_RING_MERGE_H__\n#define __APP_RING_MERGE_H__\n\n#include \n#include \"plat_types.h\"\n\nenum APP_RING_MERGE_PLAY_T {\n  APP_RING_MERGE_PLAY_ONESHOT = 0,\n  APP_RING_MERGE_PLAY_PERIODIC,\n\n  APP_RING_MERGE_PLAY_QTY = 0xff\n};\n\n#define PENDING_TO_STOP_A2DP_STREAMING 0\n#define PENDING_TO_STOP_SCO_STREAMING 1\n\nuint32_t app_ring_merge_more_data(uint8_t *buf, uint32_t len);\n\nint app_ring_merge_setup(int16_t *buf, uint32_t len,\n                         enum APP_RING_MERGE_PLAY_T play);\n\nint app_ring_merge_init(void);\n\nint app_ring_merge_deinit(void);\n\nint app_ring_merge_start(void);\n\nint app_ring_merge_stop(void);\n\nbool app_ring_merge_isrun(void);\n\nvoid app_ring_merge_save_pending_start_stream_op(uint8_t pendingStopOp,\n                                                 uint8_t deviceId);\n\n#endif\n"
  },
  {
    "path": "services/bt_app/app_sec.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"apps.h\"\n#include \"bt_if.h\"\n#include \"hal_trace.h\"\n#include \"me_api.h\"\n#include \"nvrecord.h\"\n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#endif\n\nvoid pair_handler_func(enum pair_event evt, const btif_event_t *event) {\n  switch (evt) {\n  case PAIR_EVENT_NUMERIC_REQ:\n    break;\n  case PAIR_EVENT_COMPLETE:\n#if defined(_AUTO_TEST_)\n    AUTO_TEST_SEND(\"Pairing ok.\");\n#endif\n\n#ifdef MEDIA_PLAYER_SUPPORT\n    if (btif_me_get_callback_event_err_code(event) == BTIF_BEC_NO_ERROR) {\n#if defined(IBRT)\n      app_voice_report(APP_STATUS_INDICATION_PAIRSUCCEED, 0);\n#endif\n    } else {\n      app_voice_report(APP_STATUS_INDICATION_PAIRFAIL, 0);\n    }\n#endif\n#if defined(IBRT)\n    if (app_ibrt_if_is_audio_active()) {\n      TRACE(0, \"!!!!!!!!!! flash_touch\");\n      nv_record_execute_async_flush();\n    } else {\n      TRACE(0, \"!!!!!!!!!! flash_flush\");\n      nv_record_flash_flush();\n    }\n#elif !defined(__BT_ONE_BRING_TWO__)\n    nv_record_flash_flush();\n#endif\n    break;\n  default:\n    break;\n  }\n}\n\nvoid auth_handler_func(void) {\n  /*currently do nothing*/\n  return;\n}\n"
  },
  {
    "path": "services/bt_app/app_spp.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_status_ind.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \"umm_malloc.h\"\n#include \n\n#include \"app_spp.h\"\n#include \"cqueue.h\"\n#include \"plat_types.h\"\n#include \"resources.h\"\n#include \"sdp_api.h\"\n#include \"spp_api.h\"\n\n#define SPP_MAX_PACKET_NUM 10\n\nstruct spp_device *app_create_spp_device(void) {\n  return btif_create_spp_device();\n}\n\nbt_status_t app_spp_send_data(struct spp_device *osDev_t, uint8_t *ptrData,\n                              uint16_t *length) {\n  bt_status_t status = BT_STS_FAILED;\n  uint8_t *ptrBuf = NULL;\n  uint16_t len = *length;\n\n  if (!osDev_t->spp_connected_flag) {\n    TRACE(1, \"%s spp don't connect\\n\", __func__);\n    return status;\n  }\n\n  TRACE(2, \"%s length %d\", __func__, len);\n  // DUMP8(\"0x%02x \",ptrData,length);\n\n  ptrBuf = (uint8_t *)umm_malloc(len);\n  if (NULL == ptrBuf) {\n    TRACE(1, \"%s failed to malloc for tx buffer\", __func__);\n    return status;\n  }\n  memcpy(ptrBuf, ptrData, len);\n\n  status = btif_spp_write(osDev_t, (char *)ptrBuf, length);\n  if (status != BT_STS_SUCCESS) {\n    TRACE(2, \"%s spp send error status %d\", __func__, status);\n    umm_free((void *)ptrBuf);\n  }\n\n  return status;\n}\n\nvoid app_spp_open(struct spp_device *osDev_t, btif_remote_device_t *btDevice,\n                  btif_sdp_record_param_t *param, osMutexId mid,\n                  uint8_t service_id, spp_callback_t callback) {\n  btif_sdp_record_t *spp_sdp_record = NULL;\n\n#if SPP_SERVER == XA_ENABLED\n  struct spp_service *spp_service_t;\n\n  if (osDev_t->portType == BTIF_SPP_SERVER_PORT) {\n    spp_service_t = btif_create_spp_service();\n    spp_service_t->rf_service.serviceId = service_id;\n    spp_service_t->numPorts = 0;\n\n    spp_sdp_record = btif_sdp_create_record();\n    btif_sdp_record_setup(spp_sdp_record, param);\n    btif_spp_service_setup(osDev_t, spp_service_t, spp_sdp_record);\n  }\n#endif\n\n  btif_spp_init_device(osDev_t, SPP_MAX_PACKET_NUM, mid);\n  btif_spp_open(osDev_t, btDevice, callback);\n}\n\n#if defined(__BQB_PROFILE_TEST__)\n\n#if 1\nstatic struct spp_device *spp_test_dev;\nosMutexDef(client_spp_test_mutex);\nstatic uint8_t spp_test_rx_buf[SPP_RECV_BUFFER_SIZE];\n#define TEST_PORT_SPP 0x1101\nstatic const uint8_t SppTestSearchReq[] = {\n    /* First parameter is the search pattern in data element format. It\n     * is a list of 3 UUIDs.\n     */\n    /* Data Element Sequence, 9 bytes */\n    SDP_ATTRIB_HEADER_8BIT(9), SDP_UUID_16BIT(TEST_PORT_SPP),\n    SDP_UUID_16BIT(PROT_L2CAP),  /* L2CAP UUID in Big Endian */\n    SDP_UUID_16BIT(PROT_RFCOMM), /* UUID for RFCOMM in Big Endian */\n    /* The second parameter is the maximum number of bytes that can be\n     * be received for the attribute list.\n     */\n    0x00, 0x64, /* Max number of bytes for attribute is 100 */\n    SDP_ATTRIB_HEADER_8BIT(9), SDP_UINT_16BIT(AID_PROTOCOL_DESC_LIST),\n    SDP_UINT_16BIT(AID_BT_PROFILE_DESC_LIST),\n    SDP_UINT_16BIT(AID_ADDITIONAL_PROT_DESC_LISTS)};\nint spp_test_handle_data_event_func(void *pDev, uint8_t process, uint8_t *pData,\n                                    uint16_t dataLen) {\n  TRACE(1, \"%s\", __func__);\n  return 0;\n}\nstatic void spp_test_client_callback(struct spp_device *locDev,\n                                     struct spp_callback_parms *Info) {\n  TRACE(2, \"%s event %d\", __func__, Info->event);\n  switch (Info->event) {\n  case BTIF_SPP_EVENT_REMDEV_CONNECTED:\n    TRACE(1, \"::SPP_EVENT_REMDEV_CONNECTED %d\\n\", Info->event);\n    break;\n\n  case BTIF_SPP_EVENT_REMDEV_DISCONNECTED:\n    TRACE(1, \"::SPP_EVENT_REMDEV_DISCONNECTED %d\\n\", Info->event);\n    break;\n\n  case BTIF_SPP_EVENT_DATA_SENT:\n    TRACE(1, \"::SPP_EVENT_DATA_SENT %d\\n\", Info->event);\n    break;\n\n  default:\n    TRACE(1, \"::unknown event %d\\n\", Info->event);\n    break;\n  }\n}\n#endif\n\n#if 0\nvoid app_spp_test_client_open(btif_remote_device_t *remote_device)\n{\n#if 1\n    TRACE(1,\"[%s]\", __func__);\n    bt_status_t status;\n    osMutexId mid;\n\n    if(spp_test_dev == NULL)\n        spp_test_dev = app_create_spp_device();\n    //app_spp_init_tx_buf(NULL);\n    btif_spp_init_rx_buf(spp_test_dev, spp_test_rx_buf, SPP_RECV_BUFFER_SIZE);\n\n    mid = osMutexCreate(osMutex(client_spp_test_mutex));\n    if (!mid)\n    {\n        ASSERT(0, \"cannot create mutex\");\n    }\n    spp_test_dev->portType = BTIF_SPP_CLIENT_PORT;\n    spp_test_dev->app_id = 0x8000;\n    spp_test_dev->spp_handle_data_event_func = spp_test_handle_data_event_func;\n\n    btif_spp_init_device(spp_test_dev, SPP_MAX_PACKET_NUM, mid);\n\n    spp_test_dev->sppDev.type.client.rfcommServiceSearchRequestPtr = (uint8_t*)SppTestSearchReq;\n    spp_test_dev->sppDev.type.client.rfcommServiceSearchRequestLen = sizeof(SppTestSearchReq);\n    status  = btif_spp_open(spp_test_dev, remote_device, spp_test_client_callback);\n    TRACE(2,\"%s status is %d\", __func__, status);\n#endif\n}\n#endif\n\nvoid pts_spp_client_init(void) {\n  TRACE(1, \"[%s]\", __func__);\n  // bt_status_t status;\n  osMutexId mid;\n\n  if (spp_test_dev == NULL)\n    spp_test_dev = app_create_spp_device();\n  // app_spp_init_tx_buf(NULL);\n  btif_spp_init_rx_buf(spp_test_dev, spp_test_rx_buf, SPP_RECV_BUFFER_SIZE);\n\n  mid = osMutexCreate(osMutex(client_spp_test_mutex));\n  if (!mid) {\n    ASSERT(0, \"cannot create mutex\");\n  }\n  spp_test_dev->portType = BTIF_SPP_CLIENT_PORT;\n  spp_test_dev->app_id = 0x8000;\n  spp_test_dev->spp_handle_data_event_func = spp_test_handle_data_event_func;\n\n  btif_spp_init_device(spp_test_dev, SPP_MAX_PACKET_NUM, mid);\n\n  spp_test_dev->sppDev.type.client.rfcommServiceSearchRequestPtr =\n      (uint8_t *)SppTestSearchReq;\n  spp_test_dev->sppDev.type.client.rfcommServiceSearchRequestLen =\n      sizeof(SppTestSearchReq);\n}\n\n#include \"conmgr_api.h\"\nbtif_remote_device_t *\nbtif_cmgr_pts_get_remDev(btif_cmgr_handler_t *cmgr_handler);\nextern btif_cmgr_handler_t *pts_cmgr_handler;\nvoid pts_cmgr_callback(btif_cmgr_handler_t *cHandler, cmgr_event_t Event,\n                       bt_status_t Status) {\n  btif_remote_device_t *remDev = btif_cmgr_pts_get_remDev(pts_cmgr_handler);\n\n  TRACE(2, \"%s Event %d\", __func__, Event);\n  if (Event == BTIF_BTEVENT_LINK_CONNECT_IND ||\n      Event == BTIF_BTEVENT_LINK_CONNECT_CNF) {\n    if (Status == BT_STS_SUCCESS) {\n      TRACE(2, \"connect ok cHandler %p remDev=%x\", cHandler, remDev);\n      btif_spp_open(spp_test_dev, remDev, spp_test_client_callback);\n    } else {\n      TRACE(0, \"connect failed\");\n    }\n  }\n\n  if (Event == BTIF_BTEVENT_LINK_DISCONNECT) {\n    if (Status == BT_STS_SUCCESS) {\n      TRACE(0, \"disconnect ok\");\n    } else {\n      TRACE(0, \"disconnect failed\");\n    }\n  }\n}\n#endif\n"
  },
  {
    "path": "services/bt_app/app_spp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_SPP_H__\n#define __APP_SPP_H__\n\n#include \"spp_api.h\"\n#include \"sdp_api.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#if defined(__3M_PACK__)\n#define L2CAP_MTU                           980\n#else\n#define L2CAP_MTU                           672\n#endif\n\n#define SPP_RECV_BUFFER_SIZE   L2CAP_MTU*4\n#define SPP_MAX_DATA_PACKET_SIZE    L2CAP_MTU\n\n#ifdef ENHANCED_STACK\n#define    BTIF_APP_SPP_SERVER_GSOUND_CTL_ID    BTIF_APP_SPP_SERVER_ID_1\n#define    BTIF_APP_SPP_SERVER_GSOUND_AUD_ID    BTIF_APP_SPP_SERVER_ID_2\n#define    BTIF_APP_SPP_SERVER_TOTA_ID          BTIF_APP_SPP_SERVER_ID_3\n#define    BTIF_APP_SPP_SERVER_BES_OTA_ID       BTIF_APP_SPP_SERVER_ID_4\n#define    BTIF_APP_SPP_SERVER_AI_VOICE_ID      BTIF_APP_SPP_SERVER_ID_5\n#define    BTIF_APP_SPP_SERVER_GREEN_ID         BTIF_APP_SPP_SERVER_ID_6\n#define    BTIF_APP_SPP_SERVER_RED_ID           BTIF_APP_SPP_SERVER_ID_7\n#define    BTIF_APP_SPP_SERVER_FP_RFCOMM_ID     BTIF_APP_SPP_SERVER_ID_8\n#define    BTIF_APP_SPP_SERVER_TOTA_GENERAL_ID  BTIF_APP_SPP_SERVER_ID_9\n\n\n#define    BTIF_APP_SPP_CLIENT_AI_VOICE_ID      BTIF_APP_SPP_CLIENT_ID_1\n#define    BTIF_APP_SPP_CLIENT_CCMP_ID          BTIF_APP_SPP_CLIENT_ID_2\n#define    BTIF_APP_SPP_CLIENT_RED_ID           BTIF_APP_SPP_CLIENT_ID_3\n\n/*---------------------------------------------------------------------------\n * rfcomm channel number\n *      should be from 1 to 30\n */\nenum RFCOMM_CHANNEL_NUM {\n    RFCOMM_CHANNEL_GS_CONTROL   = RFCOMM_CHANNEL_1,\n    RFCOMM_CHANNEL_GS_AUDIO     = RFCOMM_CHANNEL_2,\n    RFCOMM_CHANNEL_TOTA         = RFCOMM_CHANNEL_3,\n    RFCOMM_CHANNEL_BES_OTA      = RFCOMM_CHANNEL_4,\n    RFCOMM_CHANNEL_AI_VOICE     = RFCOMM_CHANNEL_5,\n    RFCOMM_CHANNEL_GREEN        = RFCOMM_CHANNEL_6,\n    RFCOMM_CHANNEL_RED          = RFCOMM_CHANNEL_7,\n    RFCOMM_CHANNEL_FP           = RFCOMM_CHANNEL_8,\n    RFCOMM_CHANNEL_TOTA_GENERAL = RFCOMM_CHANNEL_9,\n};\n#endif\n\nstruct spp_device *app_create_spp_device(void);\n#if 0\nvoid app_spp_register_connect_callback(struct spp_device *osDev_t, spp_event_callback_t callback);\nvoid app_spp_register_disconnect_callback(struct spp_device *osDev_t, spp_event_callback_t callback);\nvoid app_spp_register_tx_done(struct spp_device *osDev_t, spp_event_callback_t callback);\n#endif\nbt_status_t app_spp_send_data(struct spp_device *osDev_t, uint8_t* ptrData, uint16_t *length);\nvoid app_spp_open(struct spp_device *osDev_t, btif_remote_device_t  *btDevice, btif_sdp_record_param_t *param, osMutexId mid, uint8_t service_id, spp_callback_t callback);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/bt_app/audio_prompt_sbc.cpp",
    "content": "#include \"audio_prompt_sbc.h\"\n#include \"app_bt_media_manager.h\"\n#include \"app_bt_stream.h\"\n#include \"app_utils.h\"\n#include \"cmsis.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n\n#include \"app_media_player.h\"\n#include \"audioflinger.h\"\n#include \"bt_drv_interface.h\"\n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#endif\n#include \"app_audio.h\"\n#include \"apps.h\"\n#ifdef MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n\n#define AUDIO_PROMPT_RESAMPLE_ITER_NUM 256\n\n#ifdef TWS_PROMPT_SYNC\nextern void tws_sync_mix_prompt_start_handling(void);\nextern void tws_reset_mix_prompt_trigger_ticks(void);\nextern void tws_enable_mix_prompt(bool isEnable);\n#endif\n\nextern void app_stop_a2dp_media_stream(uint8_t devId);\nextern void app_stop_sco_media_stream(uint8_t devId);\nextern void app_bt_stream_copy_track_one_to_two_16bits(int16_t *dst_buf,\n                                                       int16_t *src_buf,\n                                                       uint32_t src_len);\n\nstatic uint32_t audio_prompt_sbc_decode(uint8_t *pcm_buffer,\n                                        uint32_t expectedOutputSize,\n                                        uint8_t isReset);\n\nstatic btif_sbc_decoder_t audio_prompt_sbc_decoder;\n\nstatic float audio_prompt_sbc_eq_band_gain[8] = {1, 1, 1, 1, 1, 1, 1, 1};\n\n// keep the current volume\n#define KEEP_CURRENT_VOLUME_FOR_MIX_PROMPT -1\n\n// from TGT_VOLUME_LEVEL_T or KEEP_CURRENT_VOLUME_FOR_MIX_PROMPT\n#define DEFAULT_VOLUME_FOR_MIX_PROMPT KEEP_CURRENT_VOLUME_FOR_MIX_PROMPT\n\n#define DEFAULT_COEFF_FOR_MIX_PROMPT_FOR_MUSIC 1.0\n#define DEFAULT_COEFF_FOR_MIX_MUSIC_FOR_MUSIC 0.4\n#define DEFAULT_COEFF_FOR_MIX_PROMPT_FOR_CALL 1.0\n#define DEFAULT_COEFF_FOR_MIX_CALL_FOR_CALL 0.4\n\n#define DEFAULT_OVERLAP_LENGTH 128\n\nstatic int audio_prompt_sbc_init_decoder(void) {\n  btif_sbc_init_decoder(&audio_prompt_sbc_decoder);\n  return 0;\n}\n\ntypedef struct {\n  uint32_t wholeEncodedDataLen;\n  uint32_t leftEncodedDataLen;\n  uint8_t *promptDataBuf;\n  uint16_t tmpSourcePcmDataLen;\n  uint16_t tmpSourcePcmDataOutIndex;\n  uint8_t *tmpSourcePcmDataBuf;\n  uint8_t *tmpTargetPcmDataBuf;\n  CQueue pcmDataQueue;\n  uint8_t isResetDecoder;\n  uint8_t isAudioPromptDecodingDone;\n  uint8_t targetBytesCntPerSample;\n  uint32_t targetSampleRate;\n  struct APP_RESAMPLE_T *resampler;\n  uint32_t targetPcmChunkSize;\n  float resampleRatio;\n  uint8_t *bufForResampler;\n  uint32_t resampleBufLen;\n  uint8_t pendingStopOp;\n  int8_t savedStoppedStreamId;\n  uint8_t targetChannelCnt;\n  uint8_t mixType;\n  uint16_t promptId;\n  int16_t volume_level_override;\n  uint16_t promptPram;\n  float coeff_for_mix_prompt_for_music;\n  float coeff_for_mix_music_for_music;\n  float coeff_for_mix_prompt_for_call;\n  float coeff_for_mix_call_for_call;\n  uint8_t isMixPromptOn;\n  int16_t currentVol;\n  uint16_t mergeInOverlapLength;\n  uint16_t mergeOutOverlapLength;\n  float mergeInWeight;\n  float mergeOutWeight;\n  float mergeStep;\n} AUDIO_PROMPT_ENV_T;\n\nstatic AUDIO_PROMPT_ENV_T audio_prompt_env;\n\nstatic void audio_prompt_set_pending_stop_op(uint8_t op) {\n  audio_prompt_env.pendingStopOp = op;\n  TRACE(1, \"pendingStopOp is set to %d\", op);\n}\n\nstatic uint8_t audio_prompt_get_pending_stop_op(void) {\n  return audio_prompt_env.pendingStopOp;\n}\n\nstatic void audio_prompt_set_saved_stopped_stream_id(int8_t id) {\n  audio_prompt_env.savedStoppedStreamId = id;\n  TRACE(1, \"savedStoppedStreamId is set to %d\", id);\n}\n\nstatic int8_t audio_prompt_get_saved_stopped_stream_id(void) {\n  return audio_prompt_env.savedStoppedStreamId;\n}\n\nvoid audio_prompt_init_handler(void) {\n  memset((uint8_t *)&audio_prompt_env, 0, sizeof(audio_prompt_env));\n  audio_prompt_set_saved_stopped_stream_id(-1);\n}\n\nbool audio_prompt_is_allow_update_volume(void) {\n  bool isAllow = true;\n\n  uint32_t lock = int_lock_global();\n\n  isAllow = (!(audio_prompt_env.isMixPromptOn)) ||\n            (KEEP_CURRENT_VOLUME_FOR_MIX_PROMPT ==\n             audio_prompt_env.volume_level_override);\n\n  int_unlock_global(lock);\n\n  return isAllow;\n}\n\nbool audio_prompt_is_playing_ongoing(void) {\n  bool isPlayingOnGoing = false;\n  uint32_t lock = int_lock_global();\n  if (audio_prompt_env.isMixPromptOn) {\n    isPlayingOnGoing = true;\n  }\n  int_unlock_global(lock);\n  return isPlayingOnGoing;\n}\n\n#ifdef TWS_PROMPT_SYNC\n\n#define MEDIA_SHORT_TRIGGER_DELAY 8\n#define MEDIA_LONG_TRIGGER_DELAY 12\n\n#define PROMPT_TICKS_OFFSET_TO_TRIGGER_MIX 10 // 3.25 ms\n\nstatic uint32_t mix_prompt_trigger_ticks = 0;\nstatic uint32_t playback_interval_in_ticks = 0;\nstatic uint32_t playback_last_irq_ticks = 0;\nstatic uint8_t isStartMixPrompt = false;\n\nstatic uint32_t get_prompt_trigger_delay(uint16_t promptId) {\n  switch (promptId) {\n  case AUDIO_ID_BT_GSOUND_MIC_OPEN:\n  case AUDIO_ID_BT_GSOUND_MIC_CLOSE:\n    // TODO: add more case for specific prompts here if you wanna it played\n    // sooner\n    return MEDIA_SHORT_TRIGGER_DELAY;\n  default:\n    return MEDIA_LONG_TRIGGER_DELAY;\n  }\n}\n\nbool tws_calculate_mix_prompt_trigger_ticks(uint16_t promptId) {\n  if (0 == mix_prompt_trigger_ticks) {\n    if ((playback_interval_in_ticks > 0) && (playback_last_irq_ticks > 0)) {\n      mix_prompt_trigger_ticks =\n          playback_last_irq_ticks +\n          get_prompt_trigger_delay(promptId) * playback_interval_in_ticks;\n      // TRACE(1,\"playback_last_irq_ticks %d\",playback_last_irq_ticks);\n      // TRACE(2,\"playback_interval_in_ticks %d mix_prompt_trigger_ticks\n      // %d\",playback_interval_in_ticks, mix_prompt_trigger_ticks);\n      return true;\n    }\n  }\n\n  return false;\n}\n\nvoid tws_enable_mix_prompt(bool isEnable) {\n  TRACE(1, \"isStartMixPrompt to %d.\", isEnable);\n  isStartMixPrompt = isEnable;\n}\n\nvoid tws_set_mix_prompt_trigger_ticks(uint32_t ticks) {\n  mix_prompt_trigger_ticks = ticks;\n}\n\nvoid tws_sync_mix_prompt_start_handling(void) {\n  if (!app_tws_ibrt_tws_link_connected()) {\n    tws_enable_mix_prompt(true);\n  } else {\n    tws_enable_mix_prompt(false);\n  }\n}\n\nbool tws_is_mix_prompt_allowed_to_start(void) { return isStartMixPrompt; }\n\nvoid app_ibrt_send_mix_prompt_req(void) {\n  if (app_tws_ibrt_tws_link_connected()) {\n    APP_TWS_CMD_MIX_PROMPT_SYNC_T req;\n    req.promptId = audio_prompt_get_prompt_id();\n    req.promptPram = audio_prompt_env.promptPram;\n    req.trigger_time = mix_prompt_trigger_ticks;\n    req.sampleRate = audio_prompt_get_sample_rate();\n    tws_ctrl_send_cmd(APP_TWS_CMD_SYNC_MIX_PROMPT_REQ, (uint8_t *)&req,\n                      sizeof(APP_TWS_CMD_MIX_PROMPT_SYNC_T));\n  }\n}\n\nbool tws_sync_mix_prompt_handling(void) {\n  if (!tws_is_mix_prompt_allowed_to_start()) {\n    if (tws_calculate_mix_prompt_trigger_ticks(audio_prompt_get_prompt_id())) {\n      // get the trigger ticks, send request to slave\n      app_ibrt_send_mix_prompt_req();\n    }\n    return false;\n  } else {\n    return true;\n  }\n}\n\nuint32_t tws_get_mix_prompt_trigger_ticks(void) {\n  return mix_prompt_trigger_ticks;\n}\n\nvoid tws_reset_mix_prompt_trigger_ticks(void) {\n  mix_prompt_trigger_ticks = 0;\n  playback_interval_in_ticks = 0;\n  playback_last_irq_ticks = 0;\n  isStartMixPrompt = false;\n}\n\nvoid app_tws_stop_peer_prompt(void) {\n  uint8_t stub_param = 0;\n\n  tws_ctrl_send_cmd(APP_TWS_CMD_STOP_PEER_PROMPT_REQ, &stub_param,\n                    sizeof(stub_param));\n}\n\nvoid tws_playback_ticks_check_for_mix_prompt(void) {\n  if ((!audio_prompt_is_playing_ongoing()) ||\n      tws_is_mix_prompt_allowed_to_start()) {\n    // TRACE(0,\"check for mix prompt<1>\");\n    return;\n  }\n\n  uint32_t curr_ticks = 0;\n  uint16_t conhandle = INVALID_HANDLE;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  uint32_t btclk;\n  uint16_t btcnt;\n  int32_t offset;\n\n  if (app_tws_ibrt_mobile_link_connected()) {\n    conhandle = p_ibrt_ctrl->mobile_conhandle;\n  } else if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    conhandle = p_ibrt_ctrl->ibrt_conhandle;\n  } else {\n    TRACE(0, \"check for mix prompt<2>\");\n    tws_enable_mix_prompt(true);\n    return;\n  }\n\n  bt_drv_reg_op_dma_tc_clkcnt_get(&btclk, &btcnt);\n  if (conhandle >= 0x80) {\n    offset = bt_syn_get_offset_ticks(conhandle);\n  } else {\n    offset = 0;\n  }\n  curr_ticks = (2 * btclk + offset) & 0x0fffffff;\n\n  if (mix_prompt_trigger_ticks > 0) {\n    if (curr_ticks >= mix_prompt_trigger_ticks) {\n      TRACE(2, \"ticks<1> %d - trigger ticks %d\", curr_ticks,\n            mix_prompt_trigger_ticks);\n      tws_enable_mix_prompt(true);\n    } else if ((curr_ticks < mix_prompt_trigger_ticks) &&\n               ((mix_prompt_trigger_ticks - curr_ticks) <\n                PROMPT_TICKS_OFFSET_TO_TRIGGER_MIX)) {\n      TRACE(2, \"ticks<2> %d - trigger ticks %d\", curr_ticks,\n            mix_prompt_trigger_ticks);\n      tws_enable_mix_prompt(true);\n    }\n  }\n\n  if (0 != playback_last_irq_ticks) {\n    playback_interval_in_ticks = curr_ticks - playback_last_irq_ticks;\n  }\n\n  playback_last_irq_ticks = curr_ticks;\n}\n\nvoid app_tws_cmd_sync_mix_prompt_req_handler(uint8_t *ptrParam,\n                                             uint16_t paramLen) {\n  uint16_t promptPram = 0xFFFF;\n  uint32_t curr_ticks = 0xFFFFFFFF;\n  ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n\n  APP_TWS_CMD_MIX_PROMPT_SYNC_T *pReq =\n      (APP_TWS_CMD_MIX_PROMPT_SYNC_T *)ptrParam;\n  TRACE(2, \"promptId, trigger_time:0x%x, %d\", pReq->promptId,\n        pReq->trigger_time);\n\n  audio_prompt_stop_playing();\n\n  if (app_tws_ibrt_slave_ibrt_link_connected()) {\n    curr_ticks = bt_syn_get_curr_ticks(p_ibrt_ctrl->ibrt_conhandle);\n  }\n\n  if ((!app_tws_ibrt_slave_ibrt_link_connected()) ||\n      ((curr_ticks > pReq->trigger_time) &&\n       ((curr_ticks - pReq->trigger_time) >\n        PROMPT_TICKS_OFFSET_TO_TRIGGER_MIX))) {\n    TRACE(0, \"return directly.\");\n    return;\n  }\n\n  tws_set_mix_prompt_trigger_ticks(pReq->trigger_time);\n  promptPram = pReq->promptId | pReq->promptPram;\n  audio_prompt_start_playing(promptPram, pReq->sampleRate);\n  if (curr_ticks >= pReq->trigger_time) {\n    TRACE(1, \"Instant passed %d\", curr_ticks);\n    tws_enable_mix_prompt(true);\n  } else if ((curr_ticks < pReq->trigger_time) &&\n             ((pReq->trigger_time - curr_ticks) <\n              PROMPT_TICKS_OFFSET_TO_TRIGGER_MIX)) {\n    TRACE(1, \"Instant near %d\", curr_ticks);\n    tws_enable_mix_prompt(true);\n  }\n}\n#endif\n\nstatic int audio_prompt_resample_iter(uint8_t *buf, uint32_t len) {\n  if (!buf) {\n    TRACE(0, \"NULL pointer received in %s\", __func__);\n    return -1;\n  }\n\n  uint32_t leftLen = audio_prompt_env.tmpSourcePcmDataLen -\n                     audio_prompt_env.tmpSourcePcmDataOutIndex;\n  uint32_t lenToFetch;\n\n  if (leftLen >= len) {\n    lenToFetch = len;\n  } else {\n    lenToFetch = leftLen;\n  }\n\n  memcpy(buf,\n         audio_prompt_env.tmpSourcePcmDataBuf +\n             audio_prompt_env.tmpSourcePcmDataOutIndex,\n         lenToFetch);\n  audio_prompt_env.tmpSourcePcmDataOutIndex += lenToFetch;\n\n  memset(buf + lenToFetch, 0, len - lenToFetch);\n\n  return 0;\n}\n\nvoid audio_prompt_buffer_config(uint8_t mixType, uint8_t channel_cnt,\n                                uint8_t bitNumPerSample,\n                                uint8_t *tmpSourcePcmDataBuf,\n                                uint8_t *tmpTargetPcmDataBuf,\n                                uint8_t *pcmDataBuf, uint32_t pcmBufLen,\n                                uint8_t *bufForResampler,\n                                uint32_t resampleBufLen) {\n  af_lock_thread();\n  audio_prompt_env.mixType = mixType;\n  audio_prompt_env.targetChannelCnt = channel_cnt;\n  if (24 == bitNumPerSample) {\n    audio_prompt_env.targetBytesCntPerSample = 4;\n  } else if (16 == bitNumPerSample) {\n    audio_prompt_env.targetBytesCntPerSample = 2;\n  } else {\n    ASSERT(false, \"bitNumPerSample %d is not supported by prompt mixer yet!\",\n           bitNumPerSample);\n  }\n\n  audio_prompt_env.tmpSourcePcmDataBuf = tmpSourcePcmDataBuf;\n  audio_prompt_env.tmpTargetPcmDataBuf = tmpTargetPcmDataBuf;\n  audio_prompt_env.bufForResampler = bufForResampler;\n  audio_prompt_env.resampleBufLen = resampleBufLen;\n\n  InitCQueue(&(audio_prompt_env.pcmDataQueue), pcmBufLen,\n             (CQItemType *)(pcmDataBuf));\n  af_unlock_thread();\n}\n\nuint16_t audio_prompt_get_prompt_id(void) { return audio_prompt_env.promptId; }\n\nuint32_t audio_prompt_get_sample_rate(void) {\n  return audio_prompt_env.targetSampleRate;\n}\n\nbool audio_prompt_start_playing(uint16_t promptPram,\n                                uint32_t targetSampleRate) {\n  uint16_t promptId = PROMPT_ID_FROM_ID_VALUE(promptPram);\n\n  if (audio_prompt_is_playing_ongoing()) {\n    return false;\n  }\n\n  TRACE(0, \"[%s]\", __func__);\n\n#ifdef TWS_PROMPT_SYNC\n  bool isPlayingLocally = false;\n  if (app_tws_ibrt_tws_link_connected()) {\n    isPlayingLocally = false;\n  } else {\n    isPlayingLocally = true;\n  }\n#endif\n\n  promptId = PROMPT_ID_FROM_ID_VALUE(promptId);\n\n  uint32_t lock = int_lock_global();\n  audio_prompt_env.isMixPromptOn = true;\n\n  uint8_t *promptDataPtr = NULL;\n  uint32_t promptDataLen = 0;\n  PROMPT_MIX_PROPERTY_T *pPromptProperty = NULL;\n\n#ifdef MEDIA_PLAYER_SUPPORT\n  media_runtime_audio_prompt_update(promptId, &promptDataPtr, &promptDataLen);\n  pPromptProperty = get_prompt_mix_property(promptId);\n#endif\n\n  if (NULL == pPromptProperty) {\n    TRACE(0, \"use default mix property\");\n\n    // use default property\n    audio_prompt_env.volume_level_override = DEFAULT_VOLUME_FOR_MIX_PROMPT;\n\n    audio_prompt_env.coeff_for_mix_prompt_for_call =\n        DEFAULT_COEFF_FOR_MIX_PROMPT_FOR_CALL;\n    audio_prompt_env.coeff_for_mix_call_for_call =\n        DEFAULT_COEFF_FOR_MIX_CALL_FOR_CALL;\n    audio_prompt_env.coeff_for_mix_prompt_for_music =\n        DEFAULT_COEFF_FOR_MIX_PROMPT_FOR_MUSIC;\n    audio_prompt_env.coeff_for_mix_music_for_music =\n        DEFAULT_COEFF_FOR_MIX_MUSIC_FOR_MUSIC;\n  } else {\n    audio_prompt_env.volume_level_override =\n        pPromptProperty->volume_level_override;\n\n    audio_prompt_env.coeff_for_mix_prompt_for_call =\n        pPromptProperty->coeff_for_mix_prompt_for_call;\n    audio_prompt_env.coeff_for_mix_call_for_call =\n        pPromptProperty->coeff_for_mix_call_for_call;\n    audio_prompt_env.coeff_for_mix_prompt_for_music =\n        pPromptProperty->coeff_for_mix_prompt_for_music;\n    audio_prompt_env.coeff_for_mix_music_for_music =\n        pPromptProperty->coeff_for_mix_music_for_music;\n  }\n\n  if (KEEP_CURRENT_VOLUME_FOR_MIX_PROMPT !=\n      audio_prompt_env.volume_level_override) {\n    // if the prompt's volume is smaller than the current volume, don't change\n    // it\n    if (audio_prompt_env.volume_level_override <=\n        app_bt_stream_local_volume_get()) {\n      audio_prompt_env.volume_level_override =\n          KEEP_CURRENT_VOLUME_FOR_MIX_PROMPT;\n    }\n  }\n\n  audio_prompt_env.promptId = promptId;\n  audio_prompt_env.promptPram = PROMPT_PRAM_FROM_ID_VALUE(promptPram);\n  audio_prompt_env.promptDataBuf = promptDataPtr;\n  audio_prompt_env.isResetDecoder = true;\n  audio_prompt_env.isAudioPromptDecodingDone = false;\n  audio_prompt_env.wholeEncodedDataLen = promptDataLen;\n  audio_prompt_env.leftEncodedDataLen = audio_prompt_env.wholeEncodedDataLen;\n  audio_prompt_env.targetSampleRate = targetSampleRate;\n\n  audio_prompt_env.resampleRatio = ((float)AUDIO_PROMPT_SBC_SAMPLE_RATE_VALUE) /\n                                   audio_prompt_env.targetSampleRate;\n  audio_prompt_env.targetPcmChunkSize =\n      (uint32_t)(AUDIO_PROMPT_SBC_PCM_DATA_SIZE_PER_FRAME /\n                 audio_prompt_env.resampleRatio);\n\n  audio_prompt_env.resampler =\n      app_playback_resample_any_open_with_pre_allocated_buffer(\n          (enum AUD_CHANNEL_NUM_T)AUDIO_PROMPT_SBC_CHANNEL_COUNT,\n          audio_prompt_resample_iter, AUDIO_PROMPT_RESAMPLE_ITER_NUM,\n          audio_prompt_env.resampleRatio, audio_prompt_env.bufForResampler,\n          audio_prompt_env.resampleBufLen);\n\n  // audio resample out size should be even\n  uint16_t targetOverlapLength =\n      ((uint16_t)(DEFAULT_OVERLAP_LENGTH / audio_prompt_env.resampleRatio) / 2 *\n       2);\n  audio_prompt_env.mergeInOverlapLength =\n      targetOverlapLength * audio_prompt_env.targetChannelCnt;\n  audio_prompt_env.mergeOutOverlapLength =\n      targetOverlapLength * audio_prompt_env.targetChannelCnt;\n  audio_prompt_env.mergeInWeight = 0.f;\n  audio_prompt_env.mergeOutWeight = 1.f;\n  audio_prompt_env.mergeStep = 1.f / (targetOverlapLength - 1);\n\n  audio_prompt_set_saved_stopped_stream_id(-1);\n\n  int_unlock_global(lock);\n\n  TRACE(1, \"start audio prompt. target sample rate %d\", targetSampleRate);\n\n  app_sysfreq_req(APP_SYSFREQ_USER_PROMPT_MIXER, APP_SYSFREQ_104M);\n\n#ifdef TWS_PROMPT_SYNC\n  if (!isPlayingLocally) {\n    tws_sync_mix_prompt_start_handling();\n  } else {\n    tws_enable_mix_prompt(true);\n  }\n#endif\n\n  return true;\n}\n\nvoid audio_prompt_forcefully_stop(void) {\n  app_playback_resample_close(audio_prompt_env.resampler);\n  audio_prompt_set_saved_stopped_stream_id(-1);\n  audio_prompt_env.isAudioPromptDecodingDone = true;\n  audio_prompt_env.leftEncodedDataLen = 0;\n  app_sysfreq_req(APP_SYSFREQ_USER_PROMPT_MIXER, APP_SYSFREQ_32K);\n#if defined(IBRT) && defined(MEDIA_PLAYER_SUPPORT)\n  app_tws_sync_prompt_check();\n#endif\n}\n\nbool audio_prompt_check_on_stopping_stream(uint8_t pendingStopOp,\n                                           uint8_t deviceId) {\n  uint32_t lock = int_lock_global();\n  if (audio_prompt_env.isMixPromptOn) {\n    if (bt_is_playback_triggered()) {\n      TRACE(1, \"Prompt mixing ongoing, pending op:%d\", pendingStopOp);\n      audio_prompt_env.pendingStopOp = pendingStopOp;\n      audio_prompt_set_saved_stopped_stream_id(deviceId);\n      int_unlock_global(lock);\n      return false;\n    } else {\n      int_unlock_global(lock);\n      audio_prompt_stop_playing();\n      return true;\n    }\n  }\n\n  int_unlock_global(lock);\n  return true;\n}\n\nbool audio_prompt_clear_pending_stream(uint8_t op) {\n  bool isToClearActiveMedia = false;\n\n  TRACE(4, \"%s stop_id %d pendingStopOp %d op %d\", __func__,\n        audio_prompt_get_saved_stopped_stream_id(),\n        audio_prompt_env.pendingStopOp, op);\n\n  if (-1 != audio_prompt_get_saved_stopped_stream_id()) {\n    uint32_t lock = int_lock_global();\n    if ((PENDING_TO_STOP_A2DP_STREAMING == op) &&\n        (PENDING_TO_STOP_A2DP_STREAMING ==\n         audio_prompt_get_pending_stop_op())) {\n      audio_prompt_set_saved_stopped_stream_id(-1);\n      audio_prompt_set_pending_stop_op(PENDING_TO_STOP_STREAM_INVALID);\n      isToClearActiveMedia = true;\n    } else if ((PENDING_TO_STOP_SCO_STREAMING == op) &&\n               (PENDING_TO_STOP_SCO_STREAMING ==\n                audio_prompt_get_pending_stop_op())) {\n      audio_prompt_set_saved_stopped_stream_id(-1);\n      audio_prompt_set_pending_stop_op(PENDING_TO_STOP_STREAM_INVALID);\n      isToClearActiveMedia = true;\n    }\n    int_unlock_global(lock);\n  }\n\n  return isToClearActiveMedia;\n}\n\nvoid audio_prompt_stop_playing(void) {\n  if (!audio_prompt_env.isMixPromptOn) {\n    return;\n  }\n\n  TRACE(0, \"Stop audio prompt.\");\n\n  app_playback_resample_close(audio_prompt_env.resampler);\n\n  uint32_t lock = int_lock_global();\n\n  audio_prompt_env.leftEncodedDataLen = 0;\n  audio_prompt_env.isMixPromptOn = false;\n\n#ifdef TWS_PROMPT_SYNC\n  tws_reset_mix_prompt_trigger_ticks();\n#endif\n\n  int_unlock_global(lock);\n\n  if (KEEP_CURRENT_VOLUME_FOR_MIX_PROMPT !=\n      audio_prompt_env.volume_level_override) {\n    // restore the volume\n    app_bt_stream_volumeset_handler(app_bt_stream_local_volume_get());\n  }\n\n  lock = int_lock_global();\n\n  uint8_t pendingStopOp;\n  int8_t savedStoppedStreamId;\n\n  pendingStopOp = audio_prompt_env.pendingStopOp;\n  savedStoppedStreamId = audio_prompt_get_saved_stopped_stream_id();\n\n  audio_prompt_set_saved_stopped_stream_id(-1);\n\n  int_unlock_global(lock);\n\n  if (savedStoppedStreamId >= 0) {\n    if (PENDING_TO_STOP_A2DP_STREAMING == pendingStopOp) {\n      TRACE(0, \"Stop the pending stopped a2dp media stream.\");\n      app_stop_a2dp_media_stream(savedStoppedStreamId);\n    } else if (PENDING_TO_STOP_SCO_STREAMING == pendingStopOp) {\n      TRACE(0, \"Stop the pending stopped sco media stream.\");\n      app_stop_sco_media_stream(savedStoppedStreamId);\n    }\n  }\n\n  app_sysfreq_req(APP_SYSFREQ_USER_PROMPT_MIXER, APP_SYSFREQ_32K);\n\n#if defined(IBRT) && defined(MEDIA_PLAYER_SUPPORT)\n  app_tws_sync_prompt_check();\n#endif\n  // check if there is any pending prompt need to play\n  APP_AUDIO_STATUS status_next;\n  APP_AUDIO_STATUS aud_status;\n  aud_status.id = APP_PLAY_BACK_AUDIO;\n  if (app_audio_list_rmv_callback(&aud_status, &status_next,\n                                  APP_BT_SETTING_Q_POS_HEAD, true)) {\n    TRACE(4, \"%s next id: 0x%x%s, aud_id %d\", __func__, status_next.id,\n          player2str(status_next.id), status_next.aud_id);\n#if defined(IBRT)\n    app_ibrt_if_voice_report_handler(status_next.aud_id, true);\n#endif\n  }\n}\n\ntemplate  static inline DstType prompt_data_ssat(int32_t in) {\n  DstType out;\n\n  if (sizeof(DstType) == 2) {\n    out = __SSAT(in, 16);\n  } else {\n    out = __SSAT(in, 24);\n  }\n\n  return out;\n}\n\ntemplate \nstatic inline DstType prompt_data_extend(int16_t in) {\n  DstType out;\n\n  if (sizeof(DstType) == 2) {\n    out = in;\n  } else {\n    out = (in << 8);\n  }\n\n  return out;\n}\n\ntemplate \nstatic void audio_prompt_crossfade(DstType *dst_buf, DstType *src_buf1,\n                                   int16_t *src_buf0, float coeff_for_source,\n                                   float coeff_for_prompt,\n                                   uint32_t merge_in_end,\n                                   uint32_t merge_out_start, uint32_t src_len) {\n  uint32_t i = 0;\n  if (audio_prompt_env.targetChannelCnt == 2) {\n    float weight = audio_prompt_env.mergeInWeight;\n    for (; i < merge_in_end; i += 2) {\n      /* TODO: increase coeff by step instead of calcualted every step */\n      float coeff0 = 1 - weight + weight * coeff_for_source;\n      float coeff1 = weight * coeff_for_prompt;\n\n      float tmp0 = coeff0 * src_buf1[i] +\n                   coeff1 * prompt_data_extend(src_buf0[i]);\n      float tmp1 = coeff0 * src_buf1[i + 1] +\n                   coeff1 * prompt_data_extend(src_buf0[i + 1]);\n      dst_buf[i] = prompt_data_ssat((int32_t)tmp0);\n      dst_buf[i + 1] = prompt_data_ssat((int32_t)tmp1);\n\n      weight += audio_prompt_env.mergeStep;\n    }\n    audio_prompt_env.mergeInOverlapLength -= merge_in_end;\n    audio_prompt_env.mergeInWeight = weight;\n  } else if (audio_prompt_env.targetChannelCnt == 1) {\n    float weight = audio_prompt_env.mergeInWeight;\n    for (; i < merge_in_end; i++) {\n      float coeff0 = 1 - weight + weight * coeff_for_source;\n      float coeff1 = weight * coeff_for_prompt;\n\n      float tmp0 = coeff0 * src_buf1[i] +\n                   coeff1 * prompt_data_extend(src_buf0[i]);\n      dst_buf[i] = prompt_data_ssat((int32_t)tmp0);\n\n      weight += audio_prompt_env.mergeStep;\n    }\n    audio_prompt_env.mergeInOverlapLength -= merge_in_end;\n    audio_prompt_env.mergeInWeight = weight;\n  } else {\n    ASSERT(0, \"[%s] channel number %d not supported\", __FUNCTION__,\n           audio_prompt_env.targetChannelCnt);\n  }\n  for (; i < merge_out_start; i++) {\n    float mix_value =\n        coeff_for_prompt * prompt_data_extend(src_buf0[i]) +\n        coeff_for_source * src_buf1[i];\n    dst_buf[i] = prompt_data_ssat((int32_t)mix_value);\n  }\n  if (audio_prompt_env.targetChannelCnt == 2) {\n    float weight = audio_prompt_env.mergeOutWeight;\n    for (; i < src_len; i += 2) {\n      float coeff0 = (1 - weight + weight * coeff_for_source);\n      float coeff1 = weight * coeff_for_prompt;\n\n      float tmp0 = coeff0 * src_buf1[i] +\n                   coeff1 * prompt_data_extend(src_buf0[i]);\n      float tmp1 = coeff0 * src_buf1[i + 1] +\n                   coeff1 * prompt_data_extend(src_buf0[i + 1]);\n      dst_buf[i] = prompt_data_ssat((int32_t)tmp0);\n      dst_buf[i + 1] = prompt_data_ssat((int32_t)tmp1);\n\n      weight -= audio_prompt_env.mergeStep;\n    }\n    audio_prompt_env.mergeOutOverlapLength -= src_len - merge_out_start;\n    audio_prompt_env.mergeOutWeight = weight;\n  } else if (audio_prompt_env.targetChannelCnt == 1) {\n    float weight = audio_prompt_env.mergeOutWeight;\n    for (; i < src_len; i++) {\n      float coeff0 = (1 - weight + weight * coeff_for_source);\n      float coeff1 = weight * coeff_for_prompt;\n\n      float tmp0 = coeff0 * src_buf1[i] +\n                   coeff1 * prompt_data_extend(src_buf0[i]);\n      dst_buf[i] = prompt_data_ssat((int32_t)tmp0);\n\n      weight -= audio_prompt_env.mergeStep;\n    }\n    audio_prompt_env.mergeOutOverlapLength -= src_len - merge_out_start;\n    audio_prompt_env.mergeOutWeight = weight;\n  } else {\n    ASSERT(0, \"[%s] channel number %d not supported\", __FUNCTION__,\n           audio_prompt_env.targetChannelCnt);\n  }\n}\n\nstatic void audio_prompt_processing_handler_func(uint32_t acquiredPcmDataLen,\n                                                 uint8_t *pcmDataToMerge) {\n#ifdef TWS_PROMPT_SYNC\n  uint16_t prompt_chnlsel =\n      PROMPT_CHNLSEl_FROM_ID_VALUE(audio_prompt_env.promptPram);\n#endif\n\n  uint32_t pcmDataToGetFromPrompt =\n      acquiredPcmDataLen / (audio_prompt_env.targetChannelCnt *\n                            audio_prompt_env.targetBytesCntPerSample / 2);\n\n  while ((uint32_t)LengthOfCQueue(&(audio_prompt_env.pcmDataQueue)) <\n         pcmDataToGetFromPrompt) {\n    if (audio_prompt_env.isAudioPromptDecodingDone) {\n      break;\n    }\n\n    // decode the audio prompt\n    uint32_t returnedPcmDataLen =\n        audio_prompt_sbc_decode(audio_prompt_env.tmpSourcePcmDataBuf,\n                                AUDIO_PROMPT_SBC_PCM_DATA_SIZE_PER_FRAME,\n                                audio_prompt_env.isResetDecoder);\n\n    if (returnedPcmDataLen < AUDIO_PROMPT_SBC_PCM_DATA_SIZE_PER_FRAME) {\n      audio_prompt_env.isAudioPromptDecodingDone = true;\n    }\n\n    audio_prompt_env.isResetDecoder = false;\n    audio_prompt_env.tmpSourcePcmDataLen = returnedPcmDataLen;\n    audio_prompt_env.tmpSourcePcmDataOutIndex = 0;\n\n    // do resmpling\n    if (audio_prompt_env.targetSampleRate !=\n        AUDIO_PROMPT_SBC_SAMPLE_RATE_VALUE) {\n      uint32_t targetPcmSize = returnedPcmDataLen;\n      if (AUDIO_PROMPT_SBC_PCM_DATA_SIZE_PER_FRAME == returnedPcmDataLen) {\n        targetPcmSize = audio_prompt_env.targetPcmChunkSize;\n      } else {\n        targetPcmSize =\n            (uint32_t)(returnedPcmDataLen / audio_prompt_env.resampleRatio);\n      }\n\n      targetPcmSize = (targetPcmSize / 4) * 4;\n\n      app_playback_resample_run(audio_prompt_env.resampler,\n                                audio_prompt_env.tmpTargetPcmDataBuf,\n                                targetPcmSize);\n\n      // fill into pcm data queue\n      EnCQueue(&(audio_prompt_env.pcmDataQueue),\n               audio_prompt_env.tmpTargetPcmDataBuf, targetPcmSize);\n    } else {\n      EnCQueue(&(audio_prompt_env.pcmDataQueue),\n               audio_prompt_env.tmpSourcePcmDataBuf, returnedPcmDataLen);\n    }\n  }\n\n  uint32_t pcmDataLenToMerge = pcmDataToGetFromPrompt;\n  if ((uint32_t)LengthOfCQueue(&(audio_prompt_env.pcmDataQueue)) <\n      pcmDataToGetFromPrompt) {\n    pcmDataLenToMerge = LengthOfCQueue(&(audio_prompt_env.pcmDataQueue));\n  }\n\n  if (pcmDataLenToMerge == 0)\n    goto exit;\n\n  // copy to multiple channel if needed\n  if (audio_prompt_env.targetChannelCnt > 1) {\n    // get the data\n    DeCQueue(&(audio_prompt_env.pcmDataQueue),\n             audio_prompt_env.tmpSourcePcmDataBuf, pcmDataLenToMerge);\n    app_bt_stream_copy_track_one_to_two_16bits(\n        (int16_t *)audio_prompt_env.tmpTargetPcmDataBuf,\n        (int16_t *)audio_prompt_env.tmpSourcePcmDataBuf,\n        pcmDataLenToMerge / sizeof(uint16_t));\n  } else {\n    DeCQueue(&(audio_prompt_env.pcmDataQueue),\n             audio_prompt_env.tmpTargetPcmDataBuf, pcmDataLenToMerge);\n  }\n\n#ifdef TWS_PROMPT_SYNC\n  if (IS_PROMPT_CHNLSEl_ALL(prompt_chnlsel) ||\n      app_ibrt_voice_report_is_me(prompt_chnlsel))\n#endif\n  {\n    // merge the data\n    int16_t *src_buf0 = (int16_t *)audio_prompt_env.tmpTargetPcmDataBuf;\n    uint32_t src_len = pcmDataLenToMerge * audio_prompt_env.targetChannelCnt /\n                       sizeof(uint16_t);\n\n    float coeff_for_prompt;\n    float coeff_for_source;\n\n    if (MIX_WITH_A2DP_STREAMING == audio_prompt_env.mixType) {\n      coeff_for_prompt = audio_prompt_env.coeff_for_mix_prompt_for_music;\n      coeff_for_source = audio_prompt_env.coeff_for_mix_music_for_music;\n    } else {\n      coeff_for_prompt = audio_prompt_env.coeff_for_mix_prompt_for_call;\n      coeff_for_source = audio_prompt_env.coeff_for_mix_call_for_call;\n    }\n\n    /*\n     * 0 --------------- merge_in_end --- merge_out_start --- src_len\n     * |---- merge in ---------|---- merge ------|----- merge out ---|\n     * Split data into three segments, merge in stands for merge begin\n     * crossfade, merge out for merge end crossfade. In merge begin crossfade\n     * stage, old data is music/sco pcm data, new data is merged data. In merge\n     * end crossfade stage, old data is merged data, new data is music/sco data.\n     * Assume music/soc is a, ring is b, then merged data is x = m * a + p * b,\n     * merge begin final data y = (1 - w) * a + w * x = (1 - w + w * m) * a + w\n     * * p * b for w = 0:step:1, merge end final data y = (1 - w) * a + w * x =\n     * (1 - w + w * m) * a + w * p * b for w = 1:-step:0.\n     */\n    uint32_t merge_in_end = 0;\n    if (audio_prompt_env.mergeInOverlapLength > 0) {\n      TRACE(3, \"[%s] bytes_per_sample %d, channel_num %d\", __FUNCTION__,\n            audio_prompt_env.targetBytesCntPerSample,\n            audio_prompt_env.targetChannelCnt);\n      TRACE(2, \"[%s] merge start, remain %d\", __FUNCTION__,\n            audio_prompt_env.mergeInOverlapLength);\n      merge_in_end = MIN(audio_prompt_env.mergeInOverlapLength, src_len);\n    }\n\n    uint32_t merge_out_start = src_len;\n    /* TODO: calc remain decoded pcm samples for DEFAULT_OVERLAP_LENGTH > 128 */\n    if (audio_prompt_env.leftEncodedDataLen == 0) {\n      if (LengthOfCQueue(&(audio_prompt_env.pcmDataQueue)) <\n          audio_prompt_env.mergeOutOverlapLength /\n              audio_prompt_env.targetChannelCnt * (int32_t)sizeof(uint16_t)) {\n        TRACE(2, \"[%s] merge end, remain %d\", __FUNCTION__,\n              audio_prompt_env.mergeOutOverlapLength);\n        merge_out_start =\n            src_len -\n            (audio_prompt_env.mergeOutOverlapLength -\n             LengthOfCQueue(&(audio_prompt_env.pcmDataQueue)) /\n                 sizeof(uint16_t) * audio_prompt_env.targetChannelCnt);\n      }\n    }\n\n    // TRACE(3, \"[%s] merge_in_end = %d, merge_out_start = %d\", __FUNCTION__,\n    // merge_in_end, merge_out_start); TRACE(3, \"[%s] pcm queue size = %d,\n    // src_len = %d\", __FUNCTION__,\n    // LengthOfCQueue(&(audio_prompt_env.pcmDataQueue)), src_len);\n\n    if (2 == audio_prompt_env.targetBytesCntPerSample) {\n      int16_t *src_buf1 = (int16_t *)pcmDataToMerge;\n      int16_t *dst_buf = (int16_t *)pcmDataToMerge;\n\n      audio_prompt_crossfade(dst_buf, src_buf1, src_buf0,\n                                      coeff_for_source, coeff_for_prompt,\n                                      merge_in_end, merge_out_start, src_len);\n    } else if (4 == audio_prompt_env.targetBytesCntPerSample) {\n      int32_t *src_buf1 = (int32_t *)pcmDataToMerge;\n      int32_t *dst_buf = (int32_t *)pcmDataToMerge;\n\n      audio_prompt_crossfade(dst_buf, src_buf1, src_buf0,\n                                      coeff_for_source, coeff_for_prompt,\n                                      merge_in_end, merge_out_start, src_len);\n    }\n  }\n\nexit:\n  if (audio_prompt_env.mergeOutOverlapLength == 0) {\n    // prompt playing is completed\n    audio_prompt_stop_playing();\n    app_sysfreq_req(APP_SYSFREQ_USER_PROMPT_MIXER, APP_SYSFREQ_32K);\n  }\n}\n\nvoid audio_prompt_processing_handler(uint32_t acquiredPcmDataLen,\n                                     uint8_t *pcmDataToMerge) {\n#ifdef TWS_PROMPT_SYNC\n  if (!tws_sync_mix_prompt_handling()) {\n    return;\n  }\n#endif\n\n  af_lock_thread();\n\n  if (audio_prompt_env.leftEncodedDataLen ==\n      audio_prompt_env.wholeEncodedDataLen) {\n    if (KEEP_CURRENT_VOLUME_FOR_MIX_PROMPT !=\n        audio_prompt_env.volume_level_override) {\n      // first entering, coordinate the volume here\n      app_bt_stream_volumeset_handler(audio_prompt_env.volume_level_override);\n    }\n  }\n\n  uint32_t gotDataLen = 0;\n  while (gotDataLen < acquiredPcmDataLen) {\n    uint32_t lenToGet;\n    if ((acquiredPcmDataLen - gotDataLen) > AUDIO_PROMPT_PCM_FILL_UNIT_SIZE) {\n      lenToGet = AUDIO_PROMPT_PCM_FILL_UNIT_SIZE;\n    } else {\n      lenToGet = acquiredPcmDataLen - gotDataLen;\n    }\n\n    audio_prompt_processing_handler_func(lenToGet, pcmDataToMerge + gotDataLen);\n    gotDataLen += lenToGet;\n  }\n  af_unlock_thread();\n}\n\nstatic uint32_t audio_prompt_sbc_decode(uint8_t *pcm_buffer,\n                                        uint32_t expectedOutputSize,\n                                        uint8_t isReset) {\n  if (isReset) {\n    audio_prompt_sbc_init_decoder();\n  }\n\n  uint32_t sbcDataBytesToDecode;\n  unsigned int pcm_offset = 0;\n  uint16_t byte_decode;\n  int8_t ret;\n  btif_sbc_pcm_data_t audio_prompt_PcmDecData;\n\nget_again:\n  audio_prompt_PcmDecData.data = pcm_buffer + pcm_offset;\n  audio_prompt_PcmDecData.dataLen = 0;\n\n  if (audio_prompt_env.leftEncodedDataLen >\n      AUDIO_PROMPT_SBC_ENCODED_DATA_SIZE_PER_FRAME) {\n    sbcDataBytesToDecode = AUDIO_PROMPT_SBC_ENCODED_DATA_SIZE_PER_FRAME;\n  } else {\n    sbcDataBytesToDecode = audio_prompt_env.leftEncodedDataLen;\n  }\n\n  ret = btif_sbc_decode_frames(\n      &audio_prompt_sbc_decoder,\n      audio_prompt_env.promptDataBuf + audio_prompt_env.wholeEncodedDataLen -\n          audio_prompt_env.leftEncodedDataLen,\n      sbcDataBytesToDecode, &byte_decode, &audio_prompt_PcmDecData,\n      expectedOutputSize - pcm_offset, audio_prompt_sbc_eq_band_gain);\n\n  audio_prompt_env.leftEncodedDataLen -= byte_decode;\n\n  pcm_offset += audio_prompt_PcmDecData.dataLen;\n\n  if (0 == audio_prompt_env.leftEncodedDataLen) {\n    goto exit;\n  }\n\n  if (expectedOutputSize == pcm_offset) {\n    goto exit;\n  }\n\n  if ((ret == BT_STS_CONTINUE) || (ret == BT_STS_SUCCESS)) {\n    goto get_again;\n  }\n\nexit:\n  return pcm_offset;\n}\n#endif // MIX_AUDIO_PROMPT_WITH_A2DP_MEDIA_ENABLED\n"
  },
  {
    "path": "services/bt_app/audio_prompt_sbc.h",
    "content": "#ifndef __AUDIO_PROMPT_SBC_H__\n#define __AUDIO_PROMPT_SBC_H__\n#include \"stdint.h\"\n#include \"cqueue.h\"\n#include \"codec_sbc.h\"\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define MIX_WITH_A2DP_STREAMING  0\n#define MIX_WITH_SCO_STREAMING   1\n\n#define PENDING_TO_STOP_A2DP_STREAMING  0\n#define PENDING_TO_STOP_SCO_STREAMING   1\n#define PENDING_TO_STOP_STREAM_INVALID  (0xFF)\n\ntypedef struct\n{\n    uint8_t    channelCnt;\n    uint8_t    channelMode;\n    uint8_t    bitPool;\n    uint8_t    sizePerSample;\n    uint8_t    sampleRate;\n    uint8_t    numBlocks;\n    uint8_t    numSubBands;\n    uint8_t    mSbcFlag;\n    uint8_t    allocMethod;\n} AUDIO_PROMPT_SBC_CONFIG_T;\n\n#ifdef TWS_PROMPT_SYNC\ntypedef struct {\n    uint16_t promptId;\n    uint16_t promptPram;\n    uint32_t sampleRate;\n    uint32_t trigger_time;    \n}APP_TWS_CMD_MIX_PROMPT_SYNC_T;\n\n#endif\n\ntypedef struct\n{\n    uint8_t                 dev_id;\n    uint16_t                voicePrompt;\n} app_tws_voice_prompt_to_play_t;\n\n#define IS_IGNORME_SBC_FRAME_HEADER             (1)\n#define AUDIO_PROMPT_SBC_FRAME_HEADER_LEN       (4)\n\n#define AUDIO_PROMPT_SBC_CHANNEL_COUNT          (1)\n#define AUDIO_PROMPT_SBC_CHANNEL_MODE           (BTIF_SBC_CHNL_MODE_MONO)\n\n#define AUDIO_PROMPT_SOURCE_PCM_BUFFER_SIZE     (512)\n#define AUDIO_PROMPT_TARGET_PCM_BUFFER_SIZE     (AUDIO_PROMPT_SOURCE_PCM_BUFFER_SIZE*3)\n#define AUDIO_PROMPT_PCM_BUFFER_SIZE            (AUDIO_PROMPT_SOURCE_PCM_BUFFER_SIZE*4)\n\n#define AUDIO_PROMPT_SBC_BLOCK_SIZE             40\n#define AUDIO_PROMPT_SBC_SIZE_PER_SAMPLE        (2)// 16 bits, 1 channel\n\n\n#define AUDIO_PROMPT_SBC_SAMPLE_RATE_VALUE      16000\n\n#define AUDIO_PROMPT_SBC_FRAME_PERIOD_IN_MS     (24)\n\n#define AUDIO_PROMPT_SBC_PCM_DATA_SIZE_PER_FRAME        256\n\n#define AUDIO_PROMPT_PCM_FILL_UNIT_SIZE                 (AUDIO_PROMPT_SBC_PCM_DATA_SIZE_PER_FRAME*2)\n\n#define AUDIO_PROMPT_SBC_ENCODED_DATA_SIZE_PER_FRAME    (AUDIO_PROMPT_SBC_BLOCK_SIZE*4)\n\n#define AUDIO_PROMPT_BUF_SIZE_FOR_RESAMPLER             800\n\nuint32_t audio_prompt_sbc_get_frame_len(void);\n\nvoid audio_prompt_init_handler(void);\n\nbool audio_prompt_is_playing_ongoing(void);\n\nvoid audio_prompt_buffer_config(uint8_t mixType,\n                                uint8_t channel_cnt,\n                                uint8_t bitNumPerSample,\n                                uint8_t *tmpSourcePcmDataBuf,\n                                uint8_t *tmpTargetPcmDataBuf,\n                                uint8_t *pcmDataBuf,\n                                uint32_t pcmBufLen,\n                                uint8_t *bufForResampler,\n                                uint32_t resampleBufLen);\n\nbool audio_prompt_start_playing(uint16_t promptId, uint32_t targetSampleRate);\n\nvoid audio_prompt_stop_playing(void);\n\nvoid audio_prompt_processing_handler(uint32_t acquiredPcmDataLen,\n                                     uint8_t *pcmDataToMerge);\n\nbool audio_prompt_check_on_stopping_stream(uint8_t pendingStopOp, uint8_t deviceId);\n\nvoid audio_prompt_forcefully_stop(void);\n\nbool audio_prompt_is_allow_update_volume(void);\n\nuint16_t audio_prompt_get_prompt_id(void);\n\nuint32_t audio_prompt_get_sample_rate(void);\n\n#ifdef TWS_PROMPT_SYNC\nvoid tws_playback_ticks_check_for_mix_prompt(void);\nvoid app_tws_cmd_sync_mix_prompt_req_handler(uint8_t *ptrParam, uint16_t paramLen);\n#endif\n\nbool audio_prompt_clear_pending_stream(uint8_t op);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\t// __AUDIO_PROMPT_SBC_H__\n\n"
  },
  {
    "path": "services/bt_app/besbt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/***\n * besbt.h\n */\n\n#ifndef BESBT_H\n#define BESBT_H\n\nenum BESBT_HOOK_USER_T {\n    BESBT_HOOK_USER_0 = 0,\n    BESBT_HOOK_USER_1,\n    BESBT_HOOK_USER_2,    \n    BESBT_HOOK_USER_3,\n    BESBT_HOOK_USER_QTY\n};\n\ntypedef void (*BESBT_HOOK_HANDLER)(void);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid BesbtInit(void);\nvoid BesbtThread(void const *argument);\nint Besbt_hook_handler_set(enum BESBT_HOOK_USER_T user, BESBT_HOOK_HANDLER handler);\nunsigned char *bt_get_local_address(void);\nvoid bt_set_local_address(unsigned char* btaddr);\nunsigned char *bt_get_ble_local_address(void);\nconst char *bt_get_local_name(void);\nvoid bt_set_local_name(const char* name);\nconst char *bt_get_ble_local_name(void);\nvoid gen_bt_addr_for_debug(void);\nvoid bt_set_ble_local_address(uint8_t* bleAddr);\n\n#ifdef __cplusplus\n}\n#endif\n#endif /* BESBT_H */\n"
  },
  {
    "path": "services/bt_app/besbt_cfg.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/***\n * besbt_cfg.h\n */\n\n#ifndef BESBT_CFG_H\n#define BESBT_CFG_H\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nstruct besbt_cfg_t{\n    bool sniff;\n    bool force_use_cvsd;\n    bool one_bring_two;\n    bool avdtp_cp_enable;\n    bool source_enable;\n    bool lhdc_v3;\n};\nextern struct besbt_cfg_t besbt_cfg;\n\n#ifdef __cplusplus\n}\n#endif\n#endif /* BESBT_H */\n"
  },
  {
    "path": "services/bt_app/besmain.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// #include \"mbed.h\"\n#include \"analog.h\"\n#include \"app_bt_func.h\"\n#include \"app_bt_stream.h\"\n#include \"app_status_ind.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"audioflinger.h\"\n#include \"besbt_cfg.h\"\n#include \"bt_if.h\"\n#include \"cmsis_os.h\"\n#include \"dip_api.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"hfp_api.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord_dev.h\"\n#include \"os_api.h\"\n#include \"rwapp_config.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n#include \n#include \n#if defined(ENHANCED_STACK)\n#include \"sdp_api.h\"\n#endif\n#ifdef BTIF_DIP_DEVICE\n#include \"app_dip.h\"\n#endif\n\n#ifdef TEST_OVER_THE_AIR_ENANBLED\n#include \"app_tota.h\"\n#endif\nextern \"C\" {\n#ifdef __IAG_BLE_INCLUDE__\n#include \"besble.h\"\n#endif\n#ifdef TX_RX_PCM_MASK\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"hal_intersys.h\"\n#endif\n#include \"bt_drv_interface.h\"\n\n#ifdef __GATT_OVER_BR_EDR__\n#include \"app_btgatt.h\"\n#endif\n\n#ifdef VOICE_DATAPATH\n#include \"app_voicepath.h\"\n#endif\n\n#ifdef __AI_VOICE__\n#include \"app_ai_if.h\"\n#endif\n\n#ifdef GFPS_ENABLED\n#include \"app_fp_rfcomm.h\"\n#endif\n\nvoid BESHCI_Open(void);\nvoid BESHCI_Poll(void);\nvoid BESHCI_SCO_Data_Start(void);\nvoid BESHCI_SCO_Data_Stop(void);\nvoid BESHCI_LockBuffer(void);\nvoid BESHCI_UNLockBuffer(void);\n}\n#include \"besbt.h\"\n\n#include \"app_bt.h\"\n#include \"btapp.h\"\n#include \"cqueue.h\"\n#if defined(__BTMAP_ENABLE__)\n#include \"app_btmap_sms.h\"\n#endif\n\n#if defined(IBRT)\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_peripheral_manager.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#endif\n\n#ifdef __AI_VOICE__\n#include \"ai_thread.h\"\n#endif\n\n#if defined(IBRT)\nrssi_t raw_rssi[2];\n#endif\n\nstruct besbt_cfg_t besbt_cfg = {\n#ifdef __BTIF_SNIFF__\n    .sniff = true,\n#else\n    .sniff = false,\n#endif\n\n    .force_use_cvsd = false,\n\n#ifdef __BT_ONE_BRING_TWO__\n    .one_bring_two = true,\n#else\n    .one_bring_two = false,\n#endif\n#ifdef __A2DP_AVDTP_CP__\n    .avdtp_cp_enable = true,\n#else\n    .avdtp_cp_enable = false,\n#endif\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n    .source_enable = true,\n#else\n    .source_enable = false,\n#endif\n#ifdef A2DP_LHDC_V3\n    .lhdc_v3 = true,\n#else\n    .lhdc_v3 = false,\n#endif\n};\n\nosMessageQDef(evm_queue, 128, uint32_t);\nosMessageQId evm_queue_id;\n\n/* besbt thread */\n#ifndef BESBT_STACK_SIZE\n#if defined(ENHANCED_STACK)\n#ifdef __IAG_BLE_INCLUDE__\n#define BESBT_STACK_SIZE 6144\n#else\n#define BESBT_STACK_SIZE (3326)\n#endif\n#else\n#ifdef __IAG_BLE_INCLUDE__\n#define BESBT_STACK_SIZE 5120\n#else\n#if defined(IBRT)\n#define BESBT_STACK_SIZE (3328)\n#else\n#define BESBT_STACK_SIZE (2304)\n#endif\n#endif\n#endif\n#endif\n\nosThreadDef(BesbtThread, (osPriorityAboveNormal), 1, (BESBT_STACK_SIZE),\n            \"bes_bt_main\");\n\nstatic BESBT_HOOK_HANDLER bt_hook_handler[BESBT_HOOK_USER_QTY] = {0};\n\nint Besbt_hook_handler_set(enum BESBT_HOOK_USER_T user,\n                           BESBT_HOOK_HANDLER handler) {\n  bt_hook_handler[user] = handler;\n  return 0;\n}\n\nstatic void Besbt_hook_proc(void) {\n  uint8_t i;\n  for (i = 0; i < BESBT_HOOK_USER_QTY; i++) {\n    if (bt_hook_handler[i]) {\n      bt_hook_handler[i]();\n    }\n  }\n}\n\nextern struct BT_DEVICE_T app_bt_device;\n\nextern void a2dp_init(void);\nextern void app_hfp_init(void);\n\nunsigned char *bt_get_local_address(void) { return bt_addr; }\n\nvoid bt_set_local_address(unsigned char *btaddr) {\n  if (btaddr != NULL) {\n    memcpy(bt_addr, btaddr, BTIF_BD_ADDR_SIZE);\n  }\n}\n\nvoid bt_set_ble_local_address(uint8_t *bleAddr) {\n  if (bleAddr) {\n    memcpy(ble_addr, bleAddr, BTIF_BD_ADDR_SIZE);\n  }\n}\n\nunsigned char *bt_get_ble_local_address(void) { return ble_addr; }\n\nconst char *bt_get_local_name(void) { return BT_LOCAL_NAME; }\n\nvoid bt_set_local_name(const char *name) {\n  if (name != NULL) {\n    BT_LOCAL_NAME = name;\n  }\n}\n\nconst char *bt_get_ble_local_name(void) { return BLE_DEFAULT_NAME; }\n\nvoid bt_key_init(void);\nvoid pair_handler_func(enum pair_event evt, const btif_event_t *event);\n#ifdef BTIF_SECURITY\nvoid auth_handler_func();\n#endif\n\ntypedef void (*bt_hci_delete_con_send_complete_cmd_func)(uint16_t handle,\n                                                         uint8_t num);\nextern \"C\" void register_hci_delete_con_send_complete_cmd_callback(\n    bt_hci_delete_con_send_complete_cmd_func func);\nextern \"C\" void HciSendCompletePacketCommandRightNow(uint16_t handle,\n                                                     uint8_t num);\n\nvoid gen_bt_addr_for_debug(void) {\n  static const char host[] = TO_STRING(BUILD_HOSTNAME);\n  static const char user[] = TO_STRING(BUILD_USERNAME);\n  uint32_t hlen, ulen;\n  uint32_t i, j;\n  uint32_t addr_size = BTIF_BD_ADDR_SIZE;\n\n  hlen = strlen(host);\n  ulen = strlen(user);\n\n  TRACE(0, \"Configured BT addr is:\");\n  DUMP8(\"%02x \", bt_addr, BTIF_BD_ADDR_SIZE);\n\n  j = 0;\n  for (i = 0; i < hlen; i++) {\n    bt_addr[j++] ^= host[i];\n    if (j >= addr_size / 2) {\n      j = 0;\n    }\n  }\n\n  j = addr_size / 2;\n  for (i = 0; i < ulen; i++) {\n    bt_addr[j++] ^= user[i];\n    if (j >= addr_size) {\n      j = addr_size / 2;\n    }\n  }\n\n  TRACE(0, \"Modified debug BT addr is:\");\n  DUMP8(\"%02x \", bt_addr, BTIF_BD_ADDR_SIZE);\n}\n\n#if !defined(ENHANCED_STACK)\nstatic void __set_local_dev_name(void) {\n  dev_addr_name devinfo;\n\n  devinfo.btd_addr = bt_get_local_address();\n  devinfo.ble_addr = bt_get_ble_local_address();\n  devinfo.localname = bt_get_local_name();\n  devinfo.ble_name = bt_get_ble_local_name();\n\n  nvrec_dev_localname_addr_init(&devinfo);\n  bt_set_local_dev_name((const unsigned char *)devinfo.localname,\n                        strlen(devinfo.localname) + 1);\n}\n#endif\n\nstatic void add_randomness(void) {\n  uint32_t generatedSeed = hal_sys_timer_get();\n\n  // avoid bt address collision low probability\n  for (uint8_t index = 0; index < sizeof(bt_addr); index++) {\n    generatedSeed ^=\n        (((uint32_t)(bt_addr[index])) << (hal_sys_timer_get() & 0xF));\n  }\n  srand(generatedSeed);\n}\n\nstatic void __set_bt_sco_num(void) {\n  uint8_t sco_num;\n\n#ifdef CHIP_BEST1000\n  if (hal_get_chip_metal_id() >= HAL_CHIP_METAL_ID_2)\n#endif\n  {\n    sco_num = 2;\n  }\n#ifdef CHIP_BEST1000\n  else {\n    sco_num = 1;\n  }\n#endif\n#if defined(__BT_ONE_BRING_TWO__) //&&defined(HFP_NO_PRERMPT)\n  sco_num = 1;\n#endif\n  bt_set_sco_number(sco_num);\n}\n\n#if defined(ENHANCED_STACK)\nvoid app_notify_stack_ready(uint8_t ready_flag);\nstatic void stack_ready_callback(int status) {\n  dev_addr_name devinfo;\n\n  devinfo.btd_addr = bt_get_local_address();\n  devinfo.ble_addr = bt_get_ble_local_address();\n  devinfo.localname = bt_get_local_name();\n  devinfo.ble_name = bt_get_ble_local_name();\n\n  nvrec_dev_localname_addr_init(&devinfo);\n  bt_set_local_dev_name((const unsigned char *)devinfo.localname,\n                        strlen(devinfo.localname) + 1);\n\n  bt_stack_config((const unsigned char *)devinfo.localname,\n                  strlen(devinfo.localname) + 1);\n\n  app_notify_stack_ready(STACK_READY_BT);\n}\n#endif /* ENHANCED_STACK */\n\nint besmain(void) {\n  enum APP_SYSFREQ_FREQ_T sysfreq;\n\n#if !defined(BLE_ONLY_ENABLED)\n#ifdef A2DP_CP_ACCEL\n  sysfreq = APP_SYSFREQ_26M;\n#else\n  sysfreq = APP_SYSFREQ_52M;\n#endif\n#else\n  sysfreq = APP_SYSFREQ_26M;\n#endif\n\n  BESHCI_Open();\n#if defined(TX_RX_PCM_MASK)\n  if (btdrv_is_pcm_mask_enable() == 1)\n    hal_intersys_mic_open(HAL_INTERSYS_ID_1, store_encode_frame2buff);\n#endif\n  __set_bt_sco_num();\n  add_randomness();\n\n#ifdef __IAG_BLE_INCLUDE__\n  bes_ble_init();\n#endif\n\n  btif_set_btstack_chip_config(bt_drv_get_btstack_chip_config());\n\n  /* bes stack init */\n  bt_stack_initilize();\n\n#if defined(ENHANCED_STACK)\n  bt_stack_register_ready_callback(stack_ready_callback);\n  btif_sdp_init();\n#endif\n\n#if defined(ENHANCED_STACK)\n  btif_cmgr_handler_init();\n#endif\n\n  a2dp_init();\n  btif_avrcp_init(&app_bt_device);\n\n#ifdef __AI_VOICE__\n  app_ai_voice_init();\n#endif\n#if defined(VOICE_DATAPATH)\n  app_voicepath_init();\n#endif\n#ifdef GFPS_ENABLED\n  app_fp_rfcomm_init();\n#endif\n\n  app_hfp_init();\n#if defined(__HSP_ENABLE_)\n  app_hsp_init();\n#endif\n#if defined(__BTMAP_ENABLE__)\n  app_btmap_sms_init();\n#endif\n#if defined(__GATT_OVER_BR_EDR__)\n  app_btgatt_init();\n#endif\n\n  /* pair callback init */\n  bt_pairing_init(pair_handler_func);\n  bt_authing_init(auth_handler_func);\n\n  a2dp_hid_init();\n  a2dp_codec_init();\n\n#ifdef BTIF_HID_DEVICE\n  app_bt_hid_init();\n#endif\n\n#ifdef BTIF_DIP_DEVICE\n  app_dip_init();\n#endif\n\n#if defined(ENHANCED_STACK)\n  // register_hci_delete_con_send_complete_cmd_callback(HciSendCompletePacketCommandRightNow);\n\n  /* bt local name */\n  /*\n  nvrec_dev_localname_addr_init(&devinfo);\n  */\n#else\n\n  register_hci_delete_con_send_complete_cmd_callback(\n      HciSendCompletePacketCommandRightNow);\n\n  __set_local_dev_name();\n#endif\n#if defined(IBRT)\n  app_ibrt_set_cmdhandle(TWS_CMD_IBRT, app_ibrt_cmd_table_get);\n  app_ibrt_set_cmdhandle(TWS_CMD_CUSTOMER, app_ibrt_customif_cmd_table_get);\n#if defined(IBRT_OTA) || defined(__GMA_OTA_TWS__) || defined(BISTO_ENABLED)\n  app_ibrt_set_cmdhandle(TWS_CMD_IBRT_OTA, app_ibrt_ota_tws_cmd_table_get);\n#endif\n#ifdef __INTERACTION__\n  app_ibrt_set_cmdhandle(TWS_CMD_OTA, app_ibrt_ota_cmd_table_get);\n#endif\n  tws_ctrl_thread_init();\n  app_ibrt_peripheral_thread_init();\n#endif\n\n#if defined(APP_LINEIN_A2DP_SOURCE)\n  app_source_init();\n#endif\n\n#if defined(ENHANCED_STACK)\n  /*\n  __set_local_dev_name();\n  bt_stack_config();\n  */\n#else\n  bt_stack_config();\n#endif\n  // init bt key\n  bt_key_init();\n#ifdef TEST_OVER_THE_AIR_ENANBLED\n  app_tota_init();\n#endif\n  osapi_notify_evm();\n  while (1) {\n    app_sysfreq_req(APP_SYSFREQ_USER_BT_MAIN, APP_SYSFREQ_32K);\n    osMessageGet(evm_queue_id, osWaitForever);\n    app_sysfreq_req(APP_SYSFREQ_USER_BT_MAIN, sysfreq);\n    //    BESHCI_LockBuffer();\n#ifdef __LOCK_AUDIO_THREAD__\n    bool stream_a2dp_sbc_isrun = app_bt_stream_isrun(APP_BT_STREAM_A2DP_SBC);\n    if (stream_a2dp_sbc_isrun) {\n      af_lock_thread();\n    }\n#endif\n    bt_process_stack_events();\n\n#ifdef __IAG_BLE_INCLUDE__\n    bes_ble_schedule();\n#endif\n\n    Besbt_hook_proc();\n\n#ifdef __LOCK_AUDIO_THREAD__\n    if (stream_a2dp_sbc_isrun) {\n      af_unlock_thread();\n    }\n#endif\n    // BESHCI_UNLockBuffer();\n    BESHCI_Poll();\n\n#if defined(IBRT)\n    app_ibrt_data_send_handler();\n    app_ibrt_data_receive_handler();\n    app_ibrt_ui_controller_dbg_state_checker();\n    app_ibrt_ui_stop_ibrt_condition_checker();\n#endif\n    app_check_pending_stop_sniff_op();\n  }\n\n  return 0;\n}\n\nvoid BesbtThread(void const *argument) { besmain(); }\nosThreadId besbt_tid;\nvoid BesbtInit(void) {\n\n  evm_queue_id = osMessageCreate(osMessageQ(evm_queue), NULL);\n  /* bt */\n  besbt_tid = osThreadCreate(osThread(BesbtThread), NULL);\n  TRACE(1, \"BesbtThread: %p\\n\", besbt_tid);\n}\n"
  },
  {
    "path": "services/bt_app/btapp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BTAPP_H__\n#define __BTAPP_H__\n\n#include \"app_key.h\"\n#include \"hfp_api.h\"\n#include \"a2dp_api.h\"\n#include \"app_a2dp_codecs.h\"\n#ifdef BTIF_HID_DEVICE\n#include \"app_bt_hid.h\"\n#endif\n#if defined(__BTMAP_ENABLE__)\n#include \"map_api.h\"\n#endif\n\n//#define __EARPHONE_STAY_BOTH_SCAN__\n\n/* bt config */\n#ifdef _SCO_BTPCM_CHANNEL_\n#define SYNC_CONFIG_PATH (0<<8|1<<4|1<<0) /* all links use hci */\n#else\n#define SYNC_CONFIG_PATH (0<<8|0<<4|0<<0) /* all links use hci */\n#endif\n#define SYNC_CONFIG_MAX_BUFFER (0) /* (e)sco use Packet size */\n#ifdef CVSD_BYPASS\n#define SYNC_CONFIG_CVSD_BYPASS (1) /* use pcm over hci */\n#else\n#define SYNC_CONFIG_CVSD_BYPASS (0) /* use pcm over hci */\n#endif\n#define INQ_EXT_RSP_LEN 240\n///a2dp app include\n/* a2dp */\n/* Default SBC codec configuration */\n/* data type for the SBC Codec Information Element*/\n/*****************************************************************************\n**  Constants\n*****************************************************************************/\n/* the length of the SBC Media Payload header. */\n#define A2D_SBC_MPL_HDR_LEN         1\n\n/* the LOSC of SBC media codec capabilitiy */\n#define A2D_SBC_INFO_LEN            6\n\n/* for Codec Specific Information Element */\n#if defined(A2DP_SCALABLE_ON)\n#define A2D_SCALABLE_IE_SAMP_FREQ_MSK    0xFF    /* b7-b0 sampling frequency */\n#endif\n\n#if defined(A2DP_LHDC_ON)\n#define A2D_LHDC__IE_SAMP_FREQ_MSK    0xFF    /* b7-b0 sampling frequency */\n#endif\n\n\n#define A2D_STREAM_SAMP_FREQ_MSK    0xFF    /* b7-b4 sampling frequency */\n\n#define A2D_SBC_IE_SAMP_FREQ_MSK    0xF0    /* b7-b4 sampling frequency */\n\n#define A2D_SBC_IE_SAMP_FREQ_16     0x80    /* b7:16  kHz */\n#define A2D_SBC_IE_SAMP_FREQ_32     0x40    /* b6:32  kHz */\n#define A2D_SBC_IE_SAMP_FREQ_44     0x20    /* b5:44.1kHz */\n#define A2D_SBC_IE_SAMP_FREQ_48     0x10    /* b4:48  kHz */\n\n#ifdef A2DP_SCALABLE_ON\n#define A2D_SBC_IE_SAMP_FREQ_96     0x08    /* b4:96  kHz */\n#endif\n\n#ifdef A2DP_LHDC_ON\n#ifndef A2D_SBC_IE_SAMP_FREQ_96\n#define A2D_SBC_IE_SAMP_FREQ_96     0x08    /* b4:96  kHz */\n#endif\n#endif\n\n#ifdef A2DP_LDAC_ON\n#ifndef A2DP_LDAC_OCTET_NUMBER\n#define A2DP_LDAC_OCTET_NUMBER                     (8)\n#endif\n\n#ifndef A2D_SBC_IE_SAMP_FREQ_96\n#define A2D_SBC_IE_SAMP_FREQ_96     0x08    /* b4:96  kHz */\n#endif\n#ifndef A2D_SBC_IE_SAMP_FREQ_88\n#define A2D_SBC_IE_SAMP_FREQ_88     0x04    /* b4:88.2  kHz */\n#endif\n#endif\n\n#define A2D_SBC_IE_BIT_NUM_16       0x16\n#define A2D_SBC_IE_BIT_NUM_24       0x24\n\n#define A2D_SBC_IE_CH_MD_MSK        0x0F    /* b3-b0 channel mode */\n#define A2D_SBC_IE_CH_MD_MONO       0x08    /* b3: mono */\n#define A2D_SBC_IE_CH_MD_DUAL       0x04    /* b2: dual */\n#define A2D_SBC_IE_CH_MD_STEREO     0x02    /* b1: stereo */\n#define A2D_SBC_IE_CH_MD_JOINT      0x01    /* b0: joint stereo */\n\n#define A2D_SBC_IE_BLOCKS_MSK       0xF0    /* b7-b4 number of blocks */\n#define A2D_SBC_IE_BLOCKS_4         0x80    /* 4 blocks */\n#define A2D_SBC_IE_BLOCKS_8         0x40    /* 8 blocks */\n#define A2D_SBC_IE_BLOCKS_12        0x20    /* 12blocks */\n#define A2D_SBC_IE_BLOCKS_16        0x10    /* 16blocks */\n\n#define A2D_SBC_IE_SUBBAND_MSK      0x0C    /* b3-b2 number of subbands */\n#define A2D_SBC_IE_SUBBAND_4        0x08    /* b3: 4 */\n#define A2D_SBC_IE_SUBBAND_8        0x04    /* b2: 8 */\n\n#define A2D_SBC_IE_ALLOC_MD_MSK     0x03    /* b1-b0 allocation mode */\n#define A2D_SBC_IE_ALLOC_MD_S       0x02    /* b1: SNR */\n#define A2D_SBC_IE_ALLOC_MD_L       0x01    /* b0: loundess */\n\n#define A2D_SBC_IE_MIN_BITPOOL      2\n#define A2D_SBC_IE_MAX_BITPOOL      250\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n//extern A2dpStream a2dp_stream;\n//extern btif_avdtp_codec_t a2dp_avdtpcodec;\nextern const unsigned char a2dp_codec_elements[];\n//extern enum AUD_SAMPRATE_T a2dp_sample_rate;\n\n//#define AVRCP_TRACK_CHANGED\n\n#define AVRCP_KEY_NULL                  0\n#define AVRCP_KEY_STOP                  1\n#define AVRCP_KEY_PLAY                  2\n#define AVRCP_KEY_PAUSE                 3\n#define AVRCP_KEY_FORWARD               4\n#define AVRCP_KEY_BACKWARD              5\n#define AVRCP_KEY_VOLUME_UP             6\n#define AVRCP_KEY_VOLUME_DOWN           7\n\n#define HFP_KEY_ANSWER_CALL             8\n#define HFP_KEY_HANGUP_CALL             9\n#define HFP_KEY_REDIAL_LAST_CALL        10\n#define HFP_KEY_CHANGE_TO_PHONE         11\n#define HFP_KEY_ADD_TO_EARPHONE         12\n#define HFP_KEY_MUTE                    13\n#define HFP_KEY_CLEAR_MUTE              14\n//3way calls oper\n#define HFP_KEY_THREEWAY_HOLD_AND_ANSWER              15\n#define HFP_KEY_THREEWAY_HANGUP_AND_ANSWER             16\n#define HFP_KEY_THREEWAY_HOLD_REL_INCOMING            17\n#define HFP_KEY_THREEWAY_HOLD_ADD_HELD_CALL           18\n\n#ifdef __BT_ONE_BRING_TWO__\n#define HFP_KEY_DUAL_HF_HANGUP_ANOTHER      19\n#define HFP_KEY_DUAL_HF_HANGUP_CURR_ANSWER_ANOTHER  20\n#define HFP_KEY_DUAL_HF_HOLD_CURR_ANSWER_ANOTHER    21\n#define HFP_KEY_DUAL_HF_CHANGETOPHONE_ANSWER_ANOTHER  22 \n#define HFP_KEY_DUAL_HF_CHANGETOPHONE_ANOTHER_ADDTOEARPHONE 23\n#define HFP_KEY_DUAL_HF_HANGUP_ANOTHER_ADDTOEARPHONE 24\n#endif\n\n//hsp\n#define HSP_KEY_CKPD_CONTROL     \t21\n#define HSP_KEY_ADD_TO_EARPHONE \t22\n#define HSP_KEY_CHANGE_TO_PHONE\t23\n\ntypedef enum\n{\n    HFCALL_MACHINE_CURRENT_IDLE = 0,                                //0\n    HFCALL_MACHINE_CURRENT_INCOMMING,                               //1\n    HFCALL_MACHINE_CURRENT_OUTGOING,                                //2\n    HFCALL_MACHINE_CURRENT_CALLING,                                 //3\n    HFCALL_MACHINE_CURRENT_3WAY_INCOMMING,                          //4\n    HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING,                       //5\n    HFCALL_MACHINE_CURRENT_IDLE_ANOTHER_IDLE,                       //6\n    HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_IDLE,                  //7\n    HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_IDLE,                   //8\n    HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_IDLE,                    //9\n    HFCALL_MACHINE_CURRENT_3WAY_INCOMMING_ANOTHER_IDLE,             //10\n    HFCALL_MACHINE_CURRENT_3WAY_HOLD_CALLING_ANOTHER_IDLE,          //11\n    HFCALL_MACHINE_CURRENT_INCOMMING_ANOTHER_INCOMMING,             //12\n    HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_INCOMMING,               //13\n    HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_CHANGETOPHONE,           //14\n    HFCALL_MACHINE_CURRENT_OUTGOING_ANOTHER_INCOMMING,              //15\n    HFCALL_MACHINE_CURRENT_CALLING_ANOTHER_HOLD,                    //16\n    HFCALL_MACHINE_NUM\n} HFCALL_MACHINE_ENUM;\n\ntypedef enum\n{\n    HFCALL_NEXT_STA_NULL = 0,                                //0\n    HFCALL_NEXT_STA_ANOTHER_ANSWER,                               //1\n    HFCALL_NEXT_STA_ANOTHER_ADDTOEARPHONE,                               //2\n    HFCALL_NEXT_STA_NUM\n} HFCALL_NEXT_STA_ENUM;\n\n#if defined (__HSP_ENABLE__)\nvoid hsp_callback(HsChannel *Chan, HsCallbackParms *Info);\n#endif\n\n#define APP_REPORT_SPEAKER_VOL_CMD \t0x01\n#define APP_CPKD_CMD\t\t\t\t0x02\n#define SPP_MAX_TX_PACKET_NUM\t5\n#define AVRCP_PDU_PARAM_MAX_LEN\t40\n\n\nenum BT_DEVICE_ID_T{\n    BT_DEVICE_ID_1 = 0,\n#ifdef __BT_ONE_BRING_TWO__\n    BT_DEVICE_ID_2,\n#endif\n    BT_DEVICE_NUM\n};\n\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\nenum BT_DEVICE_SRC_SNK_T{\n\tBT_DEVICE_SNK=0,\n\tBT_DEVICE_SRC\n};\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\n#define APP_BD_ADDR_SIZE    6\ntypedef struct APP_BT_BD_ADDR {\n    U8    addr[APP_BD_ADDR_SIZE];\n} APP_BT_BD_ADDR;\n#endif\n#endif\n\nstruct BT_DEVICE_T{\n    btif_a2dp_stream_t*  a2dp_stream[BT_DEVICE_NUM];\n    uint8_t avdtp_cp[BT_DEVICE_NUM];\n    btif_a2dp_stream_t* a2dp_lhdc_stream[BT_DEVICE_NUM];\n    uint8_t a2dp_lhdc_llc[BT_DEVICE_NUM];\n\n    btif_a2dp_stream_t* a2dp_ldac_stream[BT_DEVICE_NUM];\n    int channel_mode;\n\n     btif_a2dp_stream_t* a2dp_aac_stream[BT_DEVICE_NUM];\n\n     btif_a2dp_stream_t* a2dp_scalable_stream[BT_DEVICE_NUM];\n\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\n\tuint8_t src_or_snk;//src or snk fkag\n\tuint8_t input_onoff;\n\tAPP_BT_BD_ADDR         inquried_snk_bdAddr;           /* Device Address */\n\t//BT_BD_ADDR         rmt_bdAddr;           /* Device Address */\n#endif\n\n    a2dp_stream_t * a2dp_connected_stream[BT_DEVICE_NUM];\n    a2dp_stream_t * a2dp_outconfiged_stream[BT_DEVICE_NUM];\n    btif_remote_device_t * a2dp_outconfiged_rem[BT_DEVICE_NUM];\n    enum BT_DEVICE_ID_T curr_a2dp_stream_id;\n    uint16_t current_a2dp_conhdl;\n\n    \n    uint8_t a2dp_state[BT_DEVICE_NUM];\n    uint8_t a2dp_streamming[BT_DEVICE_NUM];\n    uint8_t a2dp_play_pause_flag;\n    uint8_t\tavrcpPendingKey;\n\tuint8_t latestPausedDevId;\n    uint8_t\tavrcpPressedKey;\n    uint8_t\tavrcpVolumeSync;\n    btif_avdtp_codec_type_t codec_type[BT_DEVICE_NUM];\n\n    uint8_t sample_rate[BT_DEVICE_NUM];\n    uint8_t sample_bit[BT_DEVICE_NUM];\n    uint8_t avrcp_state[BT_DEVICE_NUM];\n    btif_avrcp_channel_t*  avrcp_channel[BT_DEVICE_NUM];\n\n    hf_chan_handle_t hf_channel[BT_DEVICE_NUM];\n#if defined (__HSP_ENABLE__)\n    HsChannel hs_channel[BT_DEVICE_NUM];\n#endif\n#if defined (__BTMAP_ENABLE__)\n    btif_map_session_handle_t map_session_handle[BT_DEVICE_NUM];\n#endif\n    enum BT_DEVICE_ID_T curr_hf_channel_id;\n    btif_hf_call_setup_t hfchan_callSetup[BT_DEVICE_NUM];\n    btif_hf_call_active_t hfchan_call[BT_DEVICE_NUM];\n    btif_audio_state_t hf_audio_state[BT_DEVICE_NUM];\n    btif_hf_call_held_state hf_callheld[BT_DEVICE_NUM];\n    uint32_t hf_callsetup_time[BT_DEVICE_NUM];\n#if defined (__HSP_ENABLE__)\n    enum BT_DEVICE_ID_T curr_hs_channel_id;\n    HsCallActiveState hschan_call[BT_DEVICE_NUM];\n    HsAudioConnectState hs_audio_state[BT_DEVICE_NUM];\n#endif\n#ifdef BTIF_AVRCP_ADVANCED_CONTROLLER\n    uint32_t avrcp_advancedPdu_size;\n    void *avrcp_cmd1[BT_DEVICE_NUM];\n    void *avrcp_cmd2[BT_DEVICE_NUM];\n    void *avrcp_get_capabilities_rsp[BT_DEVICE_NUM];\n    void *avrcp_control_rsp[BT_DEVICE_NUM];\n    void *avrcp_notify_rsp[BT_DEVICE_NUM];\n    uint8_t volume_report[BT_DEVICE_NUM];\n    void *avrcp_volume_cmd[BT_DEVICE_NUM];\n\n    void *avrcp_custom_cmd[BT_DEVICE_NUM];\n#ifdef AVRCP_TRACK_CHANGED\n    uint8_t track_changed[BT_DEVICE_NUM];\n#endif\n#endif\n    uint8_t hf_conn_flag[BT_DEVICE_NUM];\n    uint8_t hf_voice_en[BT_DEVICE_NUM];\n    uint8_t hf_endcall_dis[BT_DEVICE_NUM];\n    uint8_t hf_mute_flag;\n    uint8_t phone_earphone_mark;\n#if defined (__HSP_ENABLE__)\n    uint8_t hs_conn_flag[BT_DEVICE_NUM];\n    uint8_t hs_voice_en[BT_DEVICE_NUM];\n    uint8_t hs_mute_flag;\n#endif\n#ifdef BTIF_HID_DEVICE\n    hid_channel_t  hid_channel[BT_DEVICE_NUM];\n#endif\n\n    uint8_t callSetupBitRec;\n};\n\n\n\nstruct BT_DEVICE_ID_DIFF{\n    enum BT_DEVICE_ID_T id;\n#ifdef __BT_ONE_BRING_TWO__\n    enum BT_DEVICE_ID_T id_other;\n#endif\n};\n\n/////app key handle include\nvoid a2dp_handleKey(uint8_t a2dp_key);\nvoid hfp_handle_key(uint8_t hfp_key);\nvoid hsp_handle_key(uint8_t hsp_key);\nvoid btapp_a2dp_report_speak_gain(void);\n\n#ifdef __POWERKEY_CTRL_ONOFF_ONLY__\n#define   BTAPP_FUNC_KEY\t\t\tAPP_KEY_CODE_FN1\n#define   BTAPP_VOLUME_UP_KEY\t\tAPP_KEY_CODE_FN2\n#define   BTAPP_VOLUME_DOWN_KEY\t\tAPP_KEY_CODE_FN3\n#ifdef SUPPORT_SIRI\n#define   BTAPP_RELEASE_KEY\t\t\tAPP_KEY_CODE_NONE\n#endif\n#else\n#define   BTAPP_FUNC_KEY\t\t\tAPP_KEY_CODE_PWR\n#define   BTAPP_VOLUME_UP_KEY\t\tAPP_KEY_CODE_FN1\n#define   BTAPP_VOLUME_DOWN_KEY\t\tAPP_KEY_CODE_FN2\n#ifdef SUPPORT_SIRI\n#define   BTAPP_RELEASE_KEY\t\t\tAPP_KEY_CODE_NONE\n#endif\n#endif\nvoid bt_key_init(void);\nvoid bt_key_send(APP_KEY_STATUS *status);\nvoid bt_key_handle(void);\n\nvoid a2dp_callback(a2dp_stream_t *Stream, const a2dp_callback_parms_t *Info);\nvoid avrcp_init(void);\n//void avrcp_callback(AvrcpChannel *chnl, const AvrcpCallbackParms *Parms);\n\nvoid avrcp_callback_CT(btif_avrcp_chnl_handle_t  chnl, const avrcp_callback_parms_t *Parms);\nvoid avrcp_callback_TG(btif_avrcp_chnl_handle_t chnl, const avrcp_callback_parms_t *Parms);\nint a2dp_volume_get(enum BT_DEVICE_ID_T id);\nint a2dp_volume_get_tws(void);\nbool avrcp_get_tg_play_status_play_pause(void);\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE) || defined(__APP_A2DP_SOURCE__)\n#ifdef __TWS__\n//void avrcp_set_slave_volume(uint8_t transid,int8_t volume);\n#endif\n\n\n//#define AVRCP_TRACK_CHANGED\nvoid a2dp_set_config_codec(btif_avdtp_codec_t *config_codec,const btif_a2dp_callback_parms_t *Info);\n\nvoid a2dp_callback_source(a2dp_stream_t *Stream, const a2dp_callback_parms_t *Info);\nvoid app_a2dp_source_init(void);\nvoid app_source_init(void);\n\nvoid app_a2dp_source_find_sink(void);\nvoid avrcp_source_callback_TG(btif_avrcp_chnl_handle_t chnl, const avrcp_callback_parms_t *Parms);\nvoid app_a2dp_start_stream(void);\nvoid app_a2dp_suspend_stream(void);\n#endif\n\n/**\n * Convert BES BD_ADDR to virtual\n * BES Device ID\n */\nbool a2dp_id_from_bdaddr(bt_bdaddr_t *bd_addr, uint8_t *id);\n\nvoid bt_key_handle_func_click();\nvoid bt_key_handle_func_doubleclick();\nvoid bt_key_handle_func_longpress();\n\n\nvoid bt_sbc_player_set_codec_type(uint8_t type);\nuint8_t bt_sbc_player_get_codec_type(void);\nuint8_t bt_sbc_player_get_sample_bit(void);\n#if defined(A2DP_LDAC_ON)\nint bt_ldac_player_get_channelmode(void);\nint bt_get_ladc_sample_rate(void);\n#endif\n\nuint8_t app_bt_avrcp_get_notify_trans_id(void);\nvoid app_bt_avrcp_set_notify_trans_id(uint8_t trans_id);\nuint8_t app_bt_avrcp_get_ctl_trans_id(void);\nvoid app_bt_avrcp_set_ctl_trans_id(uint8_t trans_id);\n\n\n#if defined(IBRT)\n#if defined(ENHANCED_STACK)\nuint32_t app_avrcp_save_ctxs(btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\nuint32_t app_avrcp_restore_ctxs(btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\n#endif /* ENHANCED_STACK */\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __BTAPP_H__ */\n"
  },
  {
    "path": "services/bt_app/res_audio_data.h",
    "content": "#pragma once\n\n/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef MEDIA_PLAYER_SUPPORT\n\nextern const uint8_t SOUND_POWER_ON[];\nextern const uint8_t SOUND_POWER_OFF[];\nextern const uint8_t SOUND_ZERO[];\nextern const uint8_t SOUND_ONE[];\nextern const uint8_t SOUND_TWO[];\nextern const uint8_t SOUND_THREE[];\nextern const uint8_t SOUND_FOUR[];\nextern const uint8_t SOUND_FIVE[];\nextern const uint8_t SOUND_SIX[];\nextern const uint8_t SOUND_SEVEN[];\nextern const uint8_t SOUND_EIGHT[];\nextern const uint8_t SOUND_NINE[];\nextern const uint8_t SOUND_PAIR_ENABLE[];\nextern const uint8_t SOUND_PAIRING[];\nextern const uint8_t SOUND_PAIRING_FAIL[];\nextern const uint8_t SOUND_PAIRING_SUCCESS[];\nextern const uint8_t SOUND_REFUSE[];\nextern const uint8_t SOUND_OVER[];\nextern const uint8_t SOUND_ANSWER[];\nextern const uint8_t SOUND_HUNG_UP[];\nextern const uint8_t SOUND_CONNECTED[];\nextern const uint8_t SOUND_DIS_CONNECT[];\nextern const uint8_t SOUND_INCOMING_CALL[];\nextern const uint8_t SOUND_CHARGE_PLEASE[];\nextern const uint8_t SOUND_CHARGE_FINISH[];\nextern const uint8_t SOUND_LANGUAGE_SWITCH[];\nextern const uint8_t SOUND_WARNING[];\nextern const uint8_t SOUND_ALEXA_START[];\nextern const uint8_t SOUND_ALEXA_STOP[];\nextern const uint8_t SOUND_GSOUND_MIC_OPEN[];\nextern const uint8_t SOUND_GSOUND_MIC_CLOSE[];\nextern const uint8_t DUDU[];\nextern const uint8_t SOUND_GSOUND_NC[];\n\nextern const unsigned SOUND_POWER_ON_len;\nextern const unsigned SOUND_POWER_OFF_len;\nextern const unsigned SOUND_ZERO_len;\nextern const unsigned SOUND_ONE_len;\nextern const unsigned SOUND_TWO_len;\nextern const unsigned SOUND_THREE_len;\nextern const unsigned SOUND_FOUR_len;\nextern const unsigned SOUND_FIVE_len;\nextern const unsigned SOUND_SIX_len;\nextern const unsigned SOUND_SEVEN_len;\nextern const unsigned SOUND_EIGHT_len;\nextern const unsigned SOUND_NINE_len;\nextern const unsigned SOUND_PAIR_ENABLE_len;\nextern const unsigned SOUND_PAIRING_len;\nextern const unsigned SOUND_PAIRING_FAIL_len;\nextern const unsigned SOUND_PAIRING_SUCCESS_len;\nextern const unsigned SOUND_REFUSE_len;\nextern const unsigned SOUND_OVER_len;\nextern const unsigned SOUND_ANSWER_len;\nextern const unsigned SOUND_HUNG_UP_len;\nextern const unsigned SOUND_CONNECTED_len;\nextern const unsigned SOUND_DIS_CONNECT_len;\nextern const unsigned SOUND_INCOMING_CALL_len;\nextern const unsigned SOUND_CHARGE_PLEASE_len;\nextern const unsigned SOUND_CHARGE_FINISH_len;\nextern const unsigned SOUND_LANGUAGE_SWITCH_len;\nextern const unsigned SOUND_WARNING_len;\nextern const unsigned SOUND_ALEXA_START_len;\nextern const unsigned SOUND_ALEXA_STOP_len;\nextern const unsigned SOUND_GSOUND_MIC_OPEN_len;\nextern const unsigned SOUND_GSOUND_MIC_CLOSE_len;\nextern const unsigned DUDU_len;\nextern const unsigned SOUND_GSOUND_NC_len;\n\n#ifdef __INTERACTION__\nextern const uint8_t SOUND_FINDME[];\nextern unsigned int SOUND_FINDME_len;\n#endif\n\n#endif\n"
  },
  {
    "path": "services/bt_app/res_audio_ring.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\nconst int16_t RES_AUD_RING_SAMPRATE_8000 [] = {\n#include \"res/ring/SOUND_RING_8000.txt\"\n};\n#ifdef __BT_WARNING_TONE_MERGE_INTO_STREAM_SBC__\n\nconst int16_t RES_AUD_RING_SAMPRATE_16000 [] = {\n#include \"res/ring/SOUND_RING_16000.txt\"\n};\nconst int16_t RES_AUD_RING_SAMPRATE_44100[] = {\n#include \"res/ring/SOUND_RING_44100.txt\"\n};\n\nconst int16_t RES_AUD_RING_SAMPRATE_48000 [] = {\n#include \"res/ring/SOUND_RING_48000.txt\"\n};\n#endif\n"
  },
  {
    "path": "services/bt_if_enhanced/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nsrc_obj := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)a2dp/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)a2dp/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)avrcp/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)avrcp/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)conmgr/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)conmgr/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hci/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hci/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)l2cap/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)l2cap/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)me/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)me/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)sdp/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)sdp/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)spp/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)spp/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hfp/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hfp/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)os/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)os/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)rfcomm/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)rfcomm/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)sync/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)sync/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)besaud/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)besaud/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)dip/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)dip/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)map/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)map/*.cpp))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hid/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hid/*.cpp))\n\nifeq ($(GATT_OVER_BR_EDR),1)\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)btgatt/*.c))\nsrc_obj += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)btgatt/*.cpp))\nendif\n\nobj_s := $(filter %.s, $(src_obj))\nobj_c := $(filter %.c, $(src_obj))\nobj_cpp := $(filter %.cpp, $(src_obj))\n\nifeq ($(IBRT), 1)\nBTAPI_LIB_NAME := ibrt_libbt_api\nelse\nBTAPI_LIB_NAME := $(CHIP)_libbt_api\nendif\n\nifeq ($(HFP_1_6_ENABLE), 1)\nBTAPI_LIB_NAME := $(BTAPI_LIB_NAME)_sbc_enc\nendif\n\nifeq ($(SBC_FUNC_IN_ROM), 1)\nBTAPI_LIB_NAME := $(BTAPI_LIB_NAME)_sbc_in_rom\nendif\n\nifeq ($(BT_RF_PREFER), 2M)\nBTAPI_LIB_NAME := $(BTAPI_LIB_NAME)_2m\nendif\n\nifeq ($(BT_RF_PREFER), 3M)\nBTAPI_LIB_NAME := $(BTAPI_LIB_NAME)_3m\nendif\n\nifeq ($(BT_ONE_BRING_TWO), 1)\nBTAPI_LIB_NAME := $(BTAPI_LIB_NAME)_1b2\nendif\n\nifeq ($(BLE), 1)\nBTAPI_LIB_NAME := $(BTAPI_LIB_NAME)_ble\nendif\n\nifeq ($(KERNEL),RTX)\nBTAPI_LIB_NAME := $(BTAPI_LIB_NAME)_RTX\nendif\nifeq ($(KERNEL),RTX5)\nBTAPI_LIB_NAME := $(BTAPI_LIB_NAME)_RTX5\nendif\n\n$(BTAPI_LIB_NAME)-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nobj-y += $(BTAPI_LIB_NAME).a\n\nccflags-y += \\\n    $(BT_IF_INCLUDES) \\\n    -Iservices/bt_if_enhanced/conmgr \\\n    $(BT_PROFILES_INCLUDES) \\\n    -Iservices/app_ai/inc \\\n    -Iservices/audio_process \\\n    -Iservices/overlay \\\n    -Iservices/nvrecord \\\n    -Iutils/cqueue \\\n    -Iutils/heap \\\n    -Iservices/audioflinger \\\n    -Iutils/lockcqueue \\\n    -Iservices/ble_app \\\n    -Iservices/ble_stack/common/api/ \\\n    -Iservices/bt_app \\\n    -Iservices/resources/ \\\n    -Iservices/osif \\\n    -Iservices/auto_test/ \\\n    -Iapps/audioplayers \\\n    -Iapps/main/ \\\n    -Iapps/key/ \\\n    -Iplatform/drivers/ana/ \\\n    -Iplatform/drivers/bt/ \\\n    -Iutils/intersyshci \\\n    -Iservices/ibrt/inc \\\n    -Iservices/multimedia/audio/codec/sbc/inc \\\n    -Iservices/multimedia/audio/codec/sbc/src/inc \\\n    -Iservices/bt_app/a2dp_codecs/include\n\nifeq ($(GATT_OVER_BR_EDR),1)\nccflags-y += \\\n    -Iservices/ble_stack/hl/src/l2c/l2cm\t\\\n    -Iservices/ble_stack/ble_ip\t\\\n    -Iservices/ble_stack/hl/api\t\\\n    -Iservices/ble_stack/hl/inc\t\\\n    -Iservices/ble_stack/ke/api\nendif\n\nCFLAGS_bt_if.o += -DBESLIB_INFO=$(BESLIB_INFO)\n\nifeq ($(ANC_APP),1)\nCFLAGS_besaud_api.o += -DANC_APP\nendif\n\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/a2dp_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _A2DP_API_H\n#define _A2DP_API_H\n#include \"bluetooth.h\"\n#include \"avrcp_api.h\"\n\n#include \"avdtp_api.h\"\n#include \"conmgr_api.h\"\n#include \"codec_sbc.h\"\n\ntypedef enum{\n    BTIF_DEVICE_ID_1 = 0,\n#ifdef __BT_ONE_BRING_TWO__\n    BTIF_DEVICE_ID_2,\n#endif\n    BTIF_DEVICE_NUM\n}btif_dev_it_e;\n\ntypedef void a2dp_stream_t;\ntypedef void a2dp_callback_parms_t;\n\ntypedef uint8_t btif_a2dp_event_t;\n\n\n#define A2DP_AAC_OCTET_NUMBER                     (6)\n#define A2DP_AAC_OCTET0_MPEG2_AAC_LC              0x80\n#define A2DP_AAC_OCTET1_SAMPLING_FREQUENCY_44100  0x01\n#define A2DP_AAC_OCTET2_CHANNELS_1                0x08\n#define A2DP_AAC_OCTET2_CHANNELS_2                0x04\n#define A2DP_AAC_OCTET2_SAMPLING_FREQUENCY_48000  0x80\n#define A2DP_AAC_OCTET3_VBR_SUPPORTED             0x80\n/**  Accept or reject by calling btif_a2dp_open_stream_rsp().\n */\n#define BTIF_A2DP_EVENT_STREAM_OPEN_IND           1\n\n/** This event is  the response to a call from   btif_a2dp_open_stream() or\n *  btif_a2dp_open_stream_rsp().\n */\n#define BTIF_A2DP_EVENT_STREAM_OPEN               2\n\n/** This event is received during the establishment of an\n *  outgoing stream (btif_a2dp_open_stream()) to indicate the capabilities of the\n *  remote device.  This event may also be received after calling\n *  btif_a2dp_get_stream_capabilities().\n */\n#define BTIF_A2DP_EVENT_CODEC_INFO                3\n\n/** This event is received  during the establishment of an\n *  outgoing stream (btif_a2dp_open_stream()) to indicated the capabilities of the\n *  remote device.  This event may also be received after calling\n *  btif_a2dp_get_stream_capabilities().\n *\n */\n#define BTIF_A2DP_EVENT_CP_INFO                   4\n\n/**  If this event is received, then the remote device\n *  supports the Delay Reporting feature.\n */\n#define BTIF_A2DP_EVENT_DELAY_REPORTING_INFO      5\n\n/** This event is received  when a stream is opening and\n *  all matching capabilities have been found.  The application must call\n *  btif_a2dp_set_stream_config() to configure the stream.  If successful, the\n *  stream will be opened.  btif_a2dp_close_stream() can also be called to close\n *  the stream.  This event is only received on outgoing connections.\n */\n#define BTIF_A2DP_EVENT_GET_CONFIG_IND            6\n\n/** This event is received after calling btif_a2dp_get_stream_capabilities().  This\n *  event is received after all the capabilities of the remote device have\n *  been indicated (see BTIF_A2DP_EVENT_CODEC_INFO and BTIF_A2DP_EVENT_CP_INFO).\n */\n#define BTIF_A2DP_EVENT_GET_CAP_CNF               7\n\n/** This event is received  when an open stream has been\n *  closed.  This can happen as a result of a call to btif_a2dp_close_stream(), if\n *  the stream has been closed by the remote device, if a link loss has been\n *  detected, or if the remote device rejects a request to open the stream.\n *\n */\n#define BTIF_A2DP_EVENT_STREAM_CLOSED             8\n\n/** This event is received  when an open stream has been\n *  set to the idle state.   result of a call to btif_a2dp_idle_stream().\n */\n#define BTIF_A2DP_EVENT_STREAM_IDLE               9\n\n/** When the remote device requests streaming to begin, this event will be\n *  received .  The application can accept or reject\n *  this request by calling btif_a2dp_start_stream_rsp(). (Note: this event\n *  will be received only after BTIF_A2DP_EVENT_STREAM_OPEN_IND but it may arrive\n *  before BTIF_A2DP_EVENT_STREAM_OPEN.)\n */\n#define BTIF_A2DP_EVENT_STREAM_START_IND         10\n\n/** When streaming has been started, this event will be received.  This can happen as the result to a call to\n *  btif_a2dp_start_stream() or btif_a2dp_start_stream_rsp().\n */\n#define BTIF_A2DP_EVENT_STREAM_STARTED           11\n\n/** When streaming has been suspended, this event will be received .  as the result to a call to\n *  btif_a2dp_suspend_stream(), or when the remote device suspends the stream.\n */\n#define BTIF_A2DP_EVENT_STREAM_SUSPENDED         12\n\n/** When the remote device wishes to reconfigure an open stream, this event\n *  is received by the application.  The application can accept or reject\n *  the request by calling btif_a2dp_reconfig_stream_rsp().\n *\n */\n#define BTIF_A2DP_EVENT_STREAM_RECONFIG_IND      13\n\n/** When an open stream is reconfigured, this event is received by the\n *  application.\n *\n */\n#define BTIF_A2DP_EVENT_STREAM_RECONFIG_CNF      14\n\n/** This event is received when the remote device requests the security\n *  process to begin.  The application responds to this request by calling\n *  btif_a2dp_security_control_rsp().\n */\n#define BTIF_A2DP_EVENT_STREAM_SECURITY_IND      15\n\n/** This event is received  when the remote device responds\n *  to the security process request.\n */\n#define BTIF_A2DP_EVENT_STREAM_SECURITY_CNF      16\n\n/** When the stream is aborted, this event is received by the application.\n *  This can happen in response to a request from the remote device to abort\n *  the stream, or as the result of a call to btif_a2dp_abort_stream().  When a\n *  stream is aborted, the stream is closed.\n */\n#define BTIF_A2DP_EVENT_STREAM_ABORTED           17\n\n/** This event is received when stream data has been received from the remote\n *  device.  The data is raw and is not parsed by A2DP.  It should contain\n *  a single media packet.\n */\n#define BTIF_A2DP_EVENT_STREAM_DATA_IND          18\n\n/** This event is received when raw data has been sent to the remote device.\n *  This happens as the result of a call to btif_a2dp_stream_send_raw_packet().\n *\n */\n#define BTIF_A2DP_EVENT_STREAM_PACKET_SENT       19\n\n/** This event is received when SBC data has been sent to the remote device.\n *  This happens as the result of a call to btif_a2dp_stream_send_sbc_packet().\n */\n#define BTIF_A2DP_EVENT_STREAM_SBC_PACKET_SENT   20\n\n/** This event is received by a Source when the Sink reports the value of its\n *  buffer/processing delay.  This may happen when the stream is configured\n *  (or reconfigured), and when the stream is in the streaming state.\n *\n */\n#define BTIF_A2DP_EVENT_DELAY_REPORT_IND         21\n\n/** This event is received by a Sink when the Source acknowldeges the\n *  transmitted buffer/processing delay.\n */\n#define BTIF_A2DP_EVENT_DELAY_REPORT_CNF         22\n\n/** When the the lower level AVDTP connection is established between the\n *  local and remote devices, this event will be generated.\n *\n *  During this callback, the 'p.device' parameter contains a pointer to the\n *  device that was connected.\n */\n#define BTIF_A2DP_EVENT_AVDTP_CONNECT            23\n\n/** When the the lower level AVDTP connection is disconnected, this event\n *  will be generated.\n *\n */\n#define BTIF_A2DP_EVENT_AVDTP_DISCONNECT         24\n\n#if  BTIF_AV_WORKER\n/* Confirms  has received configuration information after an\n * btif_avdtp_get_config() request.\n */\n#define BTIF_A2DP_AVDTP_EVENT_GET_CFG_CNF        27\n\n/* Confirms  has sent configuration information after an\n * btif_avdtp_open_stream() request.\n */\n#define BTIF_A2DP_AVDTP_EVENT_SET_CFG_CNF        28\n\n#endif\n\n#define BTIF_A2DP_EVENT_STREAM_STARTED_MOCK      29\n\n//user define @biao\n#define BTIF_A2DP_EVENT_AVDTP_CLOSE_IND          81\n#define BTIF_A2DP_EVENT_AVDTP_DISCOVER_IND       82\n#define BTIF_A2DP_EVENT_AVDTP_DISCOVER_RSP       83\n//#define AVDTP_EVENT_STREAM_CLOSE_IND\n\n/* event that let app level to see a stream is good to select */\n#define BTIF_A2DP_EVENT_STREAM_SELECT            84\n/* event that let app level to confirm stream(sep) state */\n#define BTIF_A2DP_EVENT_STREAM_STATE_CFM         85\n\ntypedef uint8_t btif_a2dp_error_t;\n\n#define BTIF_A2DP_ERR_NO_ERROR                         0x00\n\n#define BTIF_A2DP_ERR_BAD_SERVICE                      0x80\n\n#define BTIF_A2DP_ERR_INSUFFICIENT_RESOURCE            0x81\n\n#define BTIF_A2DP_ERR_INVALID_CODEC_TYPE               0xC1\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_CODEC_TYPE   AVDTP_ERR_NOT_SUPPORTED_CODEC_TYPE\n\n#define BTIF_A2DP_ERR_INVALID_SAMPLING_FREQUENCY       0xC3\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_SAMP_FREQ          0xC4\n\n/** Channel mode not valid\n *\n *  SBC\n *  MPEG-1,2 Audio\n *  ATRAC family\n */\n#define BTIF_A2DP_ERR_INVALID_CHANNEL_MODE             0xC5\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_CHANNEL_MODE       0xC6\n\n#define BTIF_A2DP_ERR_INVALID_SUBBANDS                 0xC7\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_SUBBANDS           0xC8\n\n#define BTIF_A2DP_ERR_INVALID_ALLOCATION_METHOD        0xC9\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_ALLOC_METHOD       0xCA\n\n#define BTIF_A2DP_ERR_INVALID_MIN_BITPOOL_VALUE        0xCB\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_MIN_BITPOOL_VALUE  0xCC\n\n#define BTIF_A2DP_ERR_INVALID_MAX_BITPOOL_VALUE        0xCD\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_MAX_BITPOOL_VALUE  0xCE\n\n#define BTIF_A2DP_ERR_INVALID_LAYER                    0xCF\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_LAYER              0xD0\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_CRC                0xD1\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_MPF                0xD2\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_VBR                0xD3\n\n#define BTIF_A2DP_ERR_INVALID_BIT_RATE                 0xD4\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_BIT_RATE           0xD5\n\n#define BTIF_A2DP_ERR_INVALID_OBJECT_TYPE              0xD6\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_OBJECT_TYPE        0xD7\n\n#define BTIF_A2DP_ERR_INVALID_CHANNELS                 0xD8\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_CHANNELS           0xD9\n\n#define A2DP_SCALABLE_OCTET_NUMBER (7)\n\n#define BTIF_A2DP_ERR_INVALID_VERSION                  0xDA\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_VERSION            0xDB\n\n#define BTIF_A2DP_ERR_NOT_SUPPORTED_MAXIMUM_SUL        0xDC\n\n#define BTIF_A2DP_ERR_INVALID_BLOCK_LENGTH             0xDD\n\n#define BTIF_A2DP_ERR_INVALID_CP_TYPE                  0xE0\n\n#define BTIF_A2DP_ERR_INVALID_CP_FORMAT                0xE1\n\n#define BTIF_A2DP_ERR_UNKNOWN_ERROR                    AVDTP_ERR_UNKNOWN_ERROR\n\ntypedef U16 btif_a22dp_version_t;\n\ntypedef U16 btif_a2dp_features_t;\n\n/* Audio Player */\n#define BTIF_A2DP_SRC_FEATURE_PLAYER    0x01\n\n/* Microphone */\n#define BTIF_A2DP_SRC_FEATURE_MIC       0x02\n\n/* Tuner */\n#define BTIF_A2DP_SRC_FEATURE_TUNER     0x04\n\n/* Mixer */\n#define BTIF_A2DP_SRC_FEATURE_MIXER     0x08\n\n/* Headphones */\n#define BTIF_A2DP_SNK_FEATURE_HEADPHONE 0x01\n\n/* Loudspeaker */\n#define BTIF_A2DP_SNK_FEATURE_SPEAKER   0x02\n\n/* Audio Recorder */\n#define BTIF_A2DP_SNK_FEATURE_RECORDER  0x04\n\n/* Amplifier */\n#define BTIF_A2DP_SNK_FEATURE_AMP       0x08\n\ntypedef U8 btif_a2dp_endpoint_type_t;\n\n/* The stream is a source */\n#define BTIF_A2DP_STREAM_TYPE_SOURCE  0\n\n/* The stream is a sink */\n#define BTIF_A2DP_STREAM_TYPE_SINK    1\n\ntypedef uint8_t btif_a2dp_stream_state_t;\n\n/* The stream is closed */\n#define BTIF_A2DP_STREAM_STATE_CLOSED     0\n\n/* The stream is idle */\n#define BTIF_A2DP_STREAM_STATE_IDLE       1\n\n/* The stream is open */\n#define BTIF_A2DP_STREAM_STATE_OPEN       2\n\n/* The stream is streaming */\n#define BTIF_A2DP_STREAM_STATE_STREAMING  3\n\n/* Unknown state */\n#define BTIF_A2DP_STREAM_STATE_UNKNOWN    0xFF\n\ntypedef void (*btif_a2dp_callback) (a2dp_stream_t * Stream, const a2dp_callback_parms_t * Info);\n\n\ntypedef void btif_av_device_t;\n\nstruct btif_get_codec_cap_t\n{\n    uint8_t ** cap;\n    uint16_t * cap_len;\n    bool     done;\n};\n\ntypedef struct {\n    btif_a2dp_event_t event;\n\tuint8_t  subevt;\n    uint16_t len;\n    I8 status;\n    btif_a2dp_error_t error;\n    btif_a2dp_error_t discReason;\n    union {\n        btif_avdtp_content_prot_t *cp;\n        btif_avdtp_codec_t *codec;\n        btif_avdtp_capability_t *capability;\n        btif_avdtp_config_request_t *configReq; /* AVDTP Config request          */\n        btif_bt_packet_t *btPacket; /* Raw Transmit packet           */\n        btif_a2dp_sbc_packet_t *sbcPacket;  /* SBC Transmit packet           */\n        uint8_t *data;          /* Receive data                  */\n        uint16_t delayMs;       /* Buffering/processing delay of\n                                 * the Sink.\n                                 */\n        btif_avdtp_stream_info_t *streamInfo;   /* Stream information */\n        btif_av_device_t *device;   /* The connecting or disconnectin device. */\n        struct btif_get_codec_cap_t *get_cap;\n\n        a2dp_stream_t    *dstStream;  /* Stream to switch */\n    } p;\n     btif_remote_device_t   *remDev;\n} btif_a2dp_callback_parms_t;\n\ntypedef struct {\n    list_entry_t node;          /* Used internally by A2DP. */\n    btif_avdtp_stream_info_t info;  /* Stream information */\n} btif_a2dp_streamInfo_t;\n\ntypedef struct {\n#if defined(__TWS__)\n    btif_avdtp_codec_t setconfig_codec;\n#endif /*  */\n    bool free;\n    uint8_t state;\n    a2dp_stream_t *a2dp_stream; //stack A2dpStream  object\n} btif_a2dp_stream_t;\n\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n    void btif_a2dp_init(void);\n\n    int a2dp_hid_init(void);\n\n    btif_a2dp_stream_t *btif_a2dp_alloc_stream(void);\n\n    uint16_t btif_avdtp_parse_mediaHeader(btif_media_header_t * header,\n                                          btif_a2dp_callback_parms_t * Info, uint8_t avdtp_cp);\n\n    void btif_app_a2dp_avrcpadvancedpdu_mempool_init();\n\n    void btif_app_a2dp_avrcpadvancedpdu_mempool_calloc(void **buf);\n\n    void btif_app_a2dp_avrcpadvancedpdu_mempool_free(void *buf);\n\n    void a2dp_set_config_codec(btif_avdtp_codec_t * config_codec,\n                               const btif_a2dp_callback_parms_t * Info);\n\n    btif_avdtp_codec_type_t btif_a2dp_get_stream_register_codec_type(a2dp_stream_t *stream);\n\n    bt_status_t btif_a2dp_register(a2dp_stream_t *Stream, \n                                   btif_a2dp_endpoint_type_t stream_type,\n                                   btif_avdtp_codec_t *Codec,\n                                   btif_avdtp_content_prot_t *Prot,                               \n                                   uint8_t Priority,\n                                   uint8_t Device_id,\n                                   btif_a2dp_callback Callback);\n\n    bt_status_t btif_a2dp_add_content_protection(a2dp_stream_t *Stream, btif_avdtp_content_prot_t *Prot);\n\n    bt_status_t btif_a2dp_deregister(a2dp_stream_t * Stream);\n\n    int8_t btif_a2dp_is_register_codec_same(a2dp_stream_t *src_stream, a2dp_stream_t *dst_stream);\n\n    void btif_a2dp_lhdc_config_tws_audio(const a2dp_callback_parms_t * info);\n\n    void btif_a2dp_aac_config_tws_audio(const a2dp_callback_parms_t * info);\n\n    void btif_a2dp_sbc_config_tws_audio(const a2dp_callback_parms_t * info);\n\n    void btif_a2dp_tws_set_mobile_codec_info(const a2dp_callback_parms_t * info);\n\n    void btif_a2dp_set_copy_protection_enable(a2dp_stream_t *stream, bool enable);\n\n    btif_remote_device_t *btif_a2dp_get_remote_device(a2dp_stream_t * stream);\n\n    uint8_t *btif_a2dp_get_stream_devic_cmgrHandler_remdev_bdAddr(a2dp_stream_t * Stream);\n\n    void *btif_a2dp_get_stream_device(a2dp_stream_t * Stream);\n\n    void *btif_a2dp_get_stream_devic_cmgrHandler_bt_handler(a2dp_stream_t * Stream);\n\n    void *btif_a2dp_get_stream_devic_cmgrHandler_remdev(a2dp_stream_t * Stream);\n\n    uint8_t btif_a2dp_get_stream_devic_cmgrHandler_remdev_role(a2dp_stream_t * Stream);\n\n    btif_cmgr_handler_t *btif_a2dp_get_stream_devic_cmgrHandler(a2dp_stream_t * Stream);\n\n    void btif_me_set_sniffer_env(uint8_t sniffer_acitve, uint8_t sniffer_role,\n                                 uint8_t * monitored_addr, uint8_t * sniffer_addr);\n\n    uint16_t btif_me_get_remote_device_hci_handle(btif_remote_device_t * rdev);\n\n    bt_bdaddr_t *btif_a2dp_stream_conn_remDev_bdAddr(a2dp_stream_t * Stream);\n\n    uint8_t *btif_a2dp_get_remote_device_version(btif_remote_device_t * remDev);\n\n    btif_a2dp_event_t btif_a2dp_get_cb_event(a2dp_callback_parms_t * info);\n\n    bt_status_t btif_a2dp_set_sink_delay(a2dp_stream_t * Stream, U16 delayMs);\n\n    bt_status_t btif_a2dp_set_stream_config(a2dp_stream_t * Stream,\n                                            btif_avdtp_codec_t * Codec,\n                                            btif_avdtp_content_prot_t * Cp);\n\n    bt_status_t btif_a2dp_open_stream(a2dp_stream_t * Stream, bt_bdaddr_t * Addr);\n\n    bt_status_t btif_a2dp_disc_stream(a2dp_stream_t * Stream);\n\n    bt_status_t btif_a2dp_start_stream(a2dp_stream_t * Stream);\n\n    bt_status_t btif_a2dp_idle_stream(a2dp_stream_t * Stream);\n\n    bt_status_t btif_a2dp_suspend_stream(a2dp_stream_t * Stream);\n\n    bt_status_t btif_a2dp_start_stream_rsp(a2dp_stream_t * Stream, btif_a2dp_error_t error);\n\n    bt_status_t btif_a2dp_close_stream(a2dp_stream_t * Stream);\n\n    bt_status_t btif_a2dp_reconfig_stream_rsp(a2dp_stream_t * Stream,\n                                              btif_a2dp_error_t Error,\n                                              btif_avdtp_capability_type_t Type);\n\n    bt_status_t btif_a2dp_reconfig_stream(a2dp_stream_t * Stream,\n                                          btif_avdtp_codec_t * codec_cfg,\n                                          btif_avdtp_content_prot_t * cp);\n\n    uint8_t btif_a2dp_security_control_req(a2dp_stream_t *stream, uint8_t *data, uint16_t len);\n    uint8_t btif_a2dp_security_control_rsp(a2dp_stream_t *stream,uint8_t* data,uint16_t len, uint8_t error);\n\n    bt_status_t btif_a2dp_open_stream_rsp(a2dp_stream_t * Stream,\n                                          btif_a2dp_error_t Error,\n                                          btif_avdtp_capability_type_t CapType);\n\n    bool btif_a2dp_stream_has_remote_device(btif_a2dp_stream_t * stream);\n\n    bt_bdaddr_t *btif_a2dp_stream_get_remote_bd_addr(btif_a2dp_stream_t * stream);\n\n    btif_a2dp_stream_t *btif_get_a2dp_stream(a2dp_stream_t * stream);\n\n    btif_a2dp_endpoint_type_t btif_a2dp_get_stream_type(a2dp_stream_t * Stream);\n\n    btif_avdtp_stream_state_t btif_a2dp_get_stream_state(a2dp_stream_t * Stream);\n\n    uint8_t btif_a2dp_get_stream_loc_strmId(a2dp_stream_t * Stream);\n\n    uint8_t btif_a2dp_get_stream_rem_strmId(a2dp_stream_t * Stream);\n\n    uint16_t btif_a2dp_get_stream_chnl_sigchnl_l2ChannelId(a2dp_stream_t * Stream);\n\n    void btif_a2dp_set_stream_state(a2dp_stream_t * Stream, btif_avdtp_stream_state_t state);\n\n    void btif_a2dp_reset_stream_state(a2dp_stream_t *stream);\n\n    void btif_a2dp_set_stream_conn_l2ChannelId(a2dp_stream_t * Stream, uint16_t id);\n\n    void btif_a2dp_set_stream_chnl_conn_l2ChannelId(a2dp_stream_t * Stream, uint16_t id);\n\n    void btif_a2dp_set_stream_chnl_sigChnl_l2ChannelId(a2dp_stream_t * Stream, uint16_t id);\n\n    void btif_a2dp_set_stream_loc_streamId(a2dp_stream_t * Stream, uint8_t id);\n\n    void btif_a2dp_set_stream_remote_streamId(a2dp_stream_t * Stream, uint8_t id);\n\n    void btif_a2dp_discover(a2dp_stream_t* Stream);\n\n    BOOL btif_a2dp_is_stream_device_has_delay_reporting(a2dp_stream_t * Stream);\n\n    btif_avdtp_codec_t *btif_a2dp_get_stream_codec(a2dp_stream_t * Stream);\n\n    btif_avdtp_codec_t *btif_a2dp_get_stream_codecCfg(a2dp_stream_t * Stream);\n\n    uint16_t btif_a2dp_get_stream_conn_remDev_hciHandle(a2dp_stream_t * Stream);\n\n    uint16_t btif_a2dp_get_stream_device_cmgrhandler_remDev_hciHandle(a2dp_stream_t * Stream);\n\n    btif_avdtp_codec_t *btif_a2dp_get_avdtp_setconfig_codec(a2dp_stream_t * stream);\n\n    bt_status_t btif_a2dp_get_stream_capabilities(a2dp_stream_t * Stream);\n\n    bt_status_t btif_a2dp_stream_send_sbc_packet(a2dp_stream_t * stream,\n                                                 btif_a2dp_sbc_packet_t * Packet,\n                                                 btif_sbc_stream_info_short_t * StreamInfo);\n\n    void btif_a2dp_sync_avdtp_streaming_state(bt_bdaddr_t *addr);\n\n    void btif_app_a2dp_source_init(void);\n\n    uint8_t btif_a2dp_get_cb_error(const btif_a2dp_callback_parms_t * Info);\n\n    uint8_t btif_a2dp_set_dst_stream(a2dp_callback_parms_t *Info, a2dp_stream_t *stream);\n\n    btif_remote_device_t *btif_a2dp_get_stream_conn_remDev(a2dp_stream_t * stream);\n\n    uint8_t btif_a2dp_get_stream_codec_element(a2dp_stream_t * stream,uint8_t index);\n\n    bt_status_t btif_a2dp_set_master_role(a2dp_stream_t * Stream, BOOL Flag);\n\n    uint16_t btif_a2dp_get_stream_conn_l2ChannelId(a2dp_stream_t * Stream);\n\n    btif_media_header_t *btif_a2dp_get_stream_media_header(a2dp_stream_t * stream);\n\n    int tws_if_get_a2dpbuff_available(void);\n\n    int a2dp_codec_init(void);\n    void  btif_a2dp_lock_same_deviceid_endpoint(a2dp_stream_t  * Stream,btif_remote_device_t   *remDev);\n    void  btif_a2dp_unlock_same_deviceid_endpoint(a2dp_stream_t  * Stream,btif_remote_device_t   *remDev);\n    void  btif_a2dp_unlock_the_connected_stream_byRemdev(btif_remote_device_t* RemDev);\n\n    uint8_t btif_a2dp_trylock_the_other_id_by_configedid(btif_remote_device_t* RemDev);\n\n    uint8_t btif_a2dp_confirm_stream_state(a2dp_stream_t *Stream, uint8_t old_state, uint8_t new_state);\n\n    void  btif_a2dp_lock_deviceid_endpoint(uint8_t id);\n\n    void  btif_a2dp_unlock_deviceid_endpoint(uint8_t unused_id);\n\n    bool btif_a2dp_is_disconnected(a2dp_stream_t *Stream);\n\n    uint8_t btif_a2dp_get_avrcpadvancedpdu_trans_id(void* pdu);\n    void btif_a2dp_set_avrcpadvancedpdu_trans_id(void* pdu, uint8_t trans_id);\n\n    btif_remote_device_t *btif_a2dp_get_remote_device_from_cbparms(a2dp_stream_t *Stream, const a2dp_callback_parms_t *info);\n\n    btif_avdtp_codec_type_t btif_a2dp_get_codec_type(const a2dp_callback_parms_t *info);\n    void btif_a2dp_set_codec_info_func(void (*func)(btif_dev_it_e dev_num, const uint8_t *codec));\n    void btif_a2dp_get_codec_info_func(void (*func)(btif_dev_it_e dev_num, uint8_t *codec));\n\n#if defined(IBRT)\n    void btif_reset_app_bt_device_streaming(uint8_t bt_dev_idx, uint8_t rm_detbl_idx , uint8_t avd_ctx_device_idx);\n    void btif_a2dp_set_codec_info(btif_dev_it_e dev_num, const uint8_t *codec);\n    void btif_a2dp_get_codec_info(btif_dev_it_e dev_num, uint8_t *codec);\n#endif\n#if defined(IBRT)\n#if defined(ENHANCED_STACK)\n    uint32_t btif_a2dp_profile_save_ctx(btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\n    uint32_t btif_a2dp_profile_restore_ctx(uint8_t *buf, uint32_t buf_len);\n    uint8_t btif_a2dp_is_critical_avdtp_cmd_handling(void);\n    void btif_a2dp_critical_avdtp_cmd_timeout(void);\n#endif /* *ENHANCED_STACK */\n#endif /* IBRT */\n\n    /* Callout functions, do not call directly */\n    uint8_t a2dp_stream_confirm_stream_state(uint8_t index, uint8_t old_state, uint8_t new_state);\n    uint8_t a2dp_stream_locate_the_connected_dev_id(a2dp_stream_t *Stream);\n\nvoid btif_a2dp_get_info(uint8_t devIndex, btif_avdtp_codec_type_t* pCodec,\n    uint8_t* pSampleRate, uint8_t* pSampleBit);\n\n#ifdef __cplusplus\n}\n#endif                          /*  */\n#endif                          /*  */\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/avctp_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _AVCTP_API_H\n#define _AVCTP_API_H\n\ntypedef uint8_t btif_avctp_event_t;\n\n#define BTIF_AVCTP_CONNECT_EVENT             1\n\n#define BTIF_AVCTP_CONNECT_IND_EVENT         2\n\n#define BTIF_AVCTP_DISCONNECT_EVENT          3\n\n#define BTIF_AVCTP_COMMAND_EVENT             4\n\n#define BTIF_AVCTP_RESPONSE_EVENT            5\n\n#define BTIF_AVCTP_REJECT_EVENT              6\n\n#define BTIF_AVCTP_TX_DONE_EVENT            8\n\n#define BTIF_AVCTP_OPERANDS_EVENT            9\n\n#define BTIF_AVCTP_LAST_EVENT                9\n\n#define BTIF_AVCTP_CTYPE_CONTROL               0x00\n#define BTIF_AVCTP_CTYPE_STATUS                0x01\n#define BTIF_AVCTP_CTYPE_SPECIFIC_INQUIRY      0x02\n#define BTIF_AVCTP_CTYPE_NOTIFY                0x03\n#define BTIF_AVCTP_CTYPE_GENERAL_INQUIRY       0x04\n#define BTIF_AVCTP_CTYPE_BROWSING              0x80\n#define BTIF_AVCTP_CTYPE_RESERVED              0x0A\n\ntypedef U8 avctp_response_t;\n\n#define BTIF_AVCTP_RESPONSE_NOT_IMPLEMENTED    0x08\n#define BTIF_AVCTP_RESPONSE_ACCEPTED           0x09\n#define BTIF_AVCTP_RESPONSE_REJECTED           0x0A\n#define BTIF_AVCTP_RESPONSE_IN_TRANSITION      0x0B\n#define BTIF_AVCTP_RESPONSE_IMPLEMENTED_STABLE 0x0C\n#define BTIF_AVCTP_RESPONSE_CHANGED            0x0D\n#define BTIF_AVCTP_RESPONSE_INTERIM            0x0F\n#define BTIF_AVCTP_RESPONSE_BROWSING           0x40\n\ntypedef U8 btif_avctp_opcode_t;\n\n#define BTIF_AVCTP_OPCODE_VENDOR_DEPENDENT     0x00\n#define BTIF_AVCTP_OPCODE_UNIT_INFO            0x30\n#define BTIF_AVCTP_OPCODE_SUBUNIT_INFO         0x31\n#define BTIF_AVCTP_OPCODE_PASS_THROUGH         0x7C\n\n#define BTIF_AVCTP_PACKET_TYPE_SINGLE          0\n#define BTIF_AVCTP_PACKET_TYPE_START           1\n#define BTIF_AVCTP_PACKET_TYPE_CONTINUE        2\n#define BTIF_AVCTP_PACKET_TYPE_END             3\n\ntypedef U8 btif_avctp_errorcode_t;\n\n#define BTIF_AVRCP_ERR_INVALID_CMD         0x00\n#define BTIF_AVRCP_ERR_INVALID_PARM        0x01\n\ntypedef void avctp_cmdframe_t;\ntypedef void avctp_rspframe_t;\n\ntypedef struct {\n\n    /* Callback parameter object, depending on \"event\" */\n    union {\n\n        void *remDev;\n\n        void *cmdFrame;\n\n        void *rspFrame;\n    } p;\n} avctp_callback_parms_t;\n\n#endif /*  */\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/avdtp_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _AVDTP_API_H\n#define _AVDTP_API_H\n\n#include \"stdint.h\"\n#include \"bluetooth.h\"\n\n/* Signal Commands */\n#define BTIF_AVDTP_SIG_DISCOVER             0x01\n#define BTIF_AVDTP_SIG_GET_CAPABILITIES     0x02\n#define BTIF_AVDTP_SIG_SET_CONFIG           0x03\n#define BTIF_AVDTP_SIG_GET_CONFIG           0x04\n#define BTIF_AVDTP_SIG_RECONFIG             0x05\n#define BTIF_AVDTP_SIG_OPEN                 0x06\n#define BTIF_AVDTP_SIG_START                0x07\n#define BTIF_AVDTP_SIG_CLOSE                0x08\n#define BTIF_AVDTP_SIG_SUSPEND              0x09\n#define BTIF_AVDTP_SIG_ABORT                0x0A\n#define BTIF_AVDTP_SIG_SECURITY_CTRL        0x0B\n#define BTIF_AVDTP_SIG_GET_ALL_CAPABILITIES 0x0C\n#define BTIF_AVDTP_SIG_DELAYREPORT          0x0D\n\n#ifndef  avdtp_codec_t\n#define   avdtp_codec_t void\n#endif\n#ifndef avdtp_channel_t\n#define   avdtp_channel_t void\n#endif\n\ntypedef uint8_t btif_avdtp_codec_type_t;\ntypedef uint16_t btif_avdtp_content_prot_type_t;\ntypedef uint8_t btif_avdtp_capability_type_t;\n\n#define BTIF_AVDTP_CP_TYPE_DTCP      0x0001\n\n#define BTIF_AVDTP_CP_TYPE_SCMS_T    0x0002\n\n#define BTIF_AVDTP_SRV_CAT_MEDIA_TRANSPORT      0x01\n#define BTIF_AVDTP_SRV_CAT_REPORTING            0x02\n#define BTIF_AVDTP_SRV_CAT_RECOVERY             0x03\n#define BTIF_AVDTP_SRV_CAT_CONTENT_PROTECTION   0x04\n#define BTIF_AVDTP_SRV_CAT_HEADER_COMPRESSION   0x05\n#define BTIF_AVDTP_SRV_CAT_MULTIPLEXING         0x06\n#define BTIF_AVDTP_SRV_CAT_MEDIA_CODEC          0x07\n#define BTIF_AVDTP_SRV_CAT_DELAY_REPORTING      0x08\n\ntypedef uint16_t btif_avdtp_codec_sample_rate_t;\n\n#define BTIF_AVDTP_CODEC_TYPE_SBC           0x00\n\n#define BTIF_AVDTP_CODEC_TYPE_MPEG1_2_AUDIO 0x01\n\n#define BTIF_AVDTP_CODEC_TYPE_MPEG2_4_AAC   0x02\n\n#define BTIF_AVDTP_CODEC_TYPE_ATRAC         0x04\n\n#define BTIF_AVDTP_CODEC_TYPE_OPUS          0x08\n\n#define BTIF_AVDTP_CODEC_TYPE_H263          0x01\n\n#define BTIF_AVDTP_CODEC_TYPE_MPEG4_VSP     0x02\n\n#define BTIF_AVDTP_CODEC_TYPE_H263_PROF3    0x03\n\n#define BTIF_AVDTP_CODEC_TYPE_H263_PROF8    0x04\n\n#define BTIF_AVDTP_CODEC_TYPE_LHDC          0xFF\n\n#define BTIF_AVDTP_CODEC_TYPE_NON_A2DP      0xFF\n\n#define BTIF_AVDTP_MAX_CODEC_ELEM_SIZE 10\n\n#define BTIF_AVDTP_MAX_CP_VALUE_SIZE 10\n\ntypedef uint8_t btif_avdtp_stream_state_t;\n\n/** The stream is idle and not configured.  Streaming is not possible.\n */\n#define BTIF_AVDTP_STRM_STATE_IDLE           0\n\n/** A stream is configured, but not open.  This state will only occur in\n *  certain cases where a request to open the stream is rejected, and the\n *  operation cannot be aborted.\n *\n *  AVDTP_AbortStream() must be called to exit this state.\n */\n#define BTIF_AVDTP_STRM_STATE_CONFIGURED     1\n\n/** The stream is open and configured.  Streaming can be initiated after the\n *  stream is open by calling AVDTP_StartStream().\n */\n#define BTIF_AVDTP_STRM_STATE_OPEN           2\n\n/** The stream is active.  Stream data (media packets) can be sent only in\n *  this state.\n */\n#define BTIF_AVDTP_STRM_STATE_STREAMING      3\n\n#define BTIF_AVDTP_STRM_STATE_CLOSING        4\n\n#define BTIF_AVDTP_STRM_STATE_ABORTING       5\n\ntypedef U8 btif_avdtp_error_t;\n\n#define BTIF_AVDTP_ERR_NO_ERROR                    0x00\n\n#define BTIF_AVDTP_ERR_BAD_HEADER_FORMAT           0x01\n\n#define BTIF_AVDTP_ERR_BAD_LENGTH                  0x11\n\n#define BTIF_AVDTP_ERR_BAD_ACP_SEID                0x12\n\n#define BTIF_AVDTP_ERR_IN_USE                      0x13\n\n#define BTIF_AVDTP_ERR_NOT_IN_USE                  0x14\n\n#define BTIF_AVDTP_ERR_BAD_SERV_CATEGORY           0x17\n\n#define BTIF_AVDTP_ERR_BAD_PAYLOAD_FORMAT          0x18\n\n#define BTIF_AVDTP_ERR_NOT_SUPPORTED_COMMAND       0x19\n\n#define BTIF_AVDTP_ERR_INVALID_CAPABILITIES        0x1A\n\n#define BTIF_AVDTP_ERR_BAD_RECOVERY_TYPE           0x22\n\n#define BTIF_AVDTP_ERR_BAD_MEDIA_TRANSPORT_FORMAT  0x23\n\n#define BTIF_AVDTP_ERR_BAD_RECOVERY_FORMAT         0x25\n\n#define BTIF_AVDTP_ERR_BAD_ROHC_FORMAT             0x26\n\n#define BTIF_AVDTP_ERR_BAD_CP_FORMAT               0x27\n\n#define BTIF_AVDTP_ERR_BAD_MULTIPLEXING_FORMAT     0x28\n\n#define BTIF_AVDTP_ERR_UNSUPPORTED_CONFIGURATION   0x29\n\n#define BTIF_AVDTP_ERR_BAD_STATE                   0x31\n\n#define BTIF_AVDTP_ERR_NOT_SUPPORTED_CODEC_TYPE    0xC2\n\n#define BTIF_AVDTP_ERR_UNKNOWN_ERROR               0xFF\n\ntypedef struct {\n    btif_avdtp_content_prot_type_t cpType;\n    uint8_t dataLen;\n    uint8_t *data;\n}__attribute__((packed))  btif_avdtp_content_prot_t;\n\ntypedef struct {\n    btif_avdtp_codec_type_t codecType;\n    uint8_t elemLen;\n    uint8_t *elements;\n    uint8_t *pstreamflags; \n    bool discoverable;\n}__attribute__((packed)) btif_avdtp_codec_t ;\n\ntypedef struct {\n    btif_avdtp_capability_type_t type;\n    union {\n        btif_avdtp_codec_t codec;\n        btif_avdtp_content_prot_t cp;\n    } p;\n} btif_avdtp_capability_t;\n\ntypedef struct {\n    btif_avdtp_codec_t codec;\n    btif_avdtp_content_prot_t cp;\n    BOOL delayReporting;\n} btif_avdtp_config_request_t;\n\n\ntypedef uint8_t btif_avdtp_streamId_t;\ntypedef uint8_t btif_avdtp_media_type;\ntypedef uint8_t btif_avdtp_strm_endpoint_type_t;\n\ntypedef struct {\n    btif_avdtp_streamId_t id;\n    bool inUse;\n    btif_avdtp_media_type mediaType;\n    btif_avdtp_strm_endpoint_type_t streamType;\n} btif_avdtp_stream_info_t;\n\ntypedef struct {\n    U8 version;\n    U8 padding;\n    U8 marker;\n    U8 payloadType;\n    U16 sequenceNumber;\n    U32 timestamp;\n    U32 ssrc;\n    U8 csrcCount;\n    U32 csrcList[15];\n} btif_avdtp_media_header_t;\ntypedef btif_avdtp_media_header_t btif_media_header_t;\n\ntypedef void btif_avdtp_stream_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n\n#endif\n    btif_avdtp_codec_type_t btif_avdtp_get_stream_codec_type(btif_avdtp_stream_t * stream);\n\n#ifdef __cplusplus\n}\n#endif                          /*  */\n#endif                          /*  */\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/avrcp_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _AVRCP_API_H\n#define _AVRCP_API_H\n#include \"me_api.h\"\n#include \"avctp_api.h\"\n#include \"bluetooth.h\"\n#include \"plat_types.h\"\n#include \"cqueue.h\"\n\n#define BTIF_AVRCP_MAX_CHAR_SETS                 10\n\n#define BTIF_AVTP_HEADER_LEN 10\n\n#define BTIF_AVRCP_RX_FRAG_BUFF_SIZE             672 //L2CAP_DEFAULT_MTU\n\ntypedef btif_avctp_event_t btif_avrcp_event_t;\ntypedef void *btif_avrcp_chnl_handle_t;\ntypedef void *btif_app_bt_device_t;\n\n\n/** The transport layer is connected and commands/responses can now\n *  be exchanged.\n */\n#define BTIF_AVRCP_EVENT_CONNECT             BTIF_AVCTP_CONNECT_EVENT\n\n/** The application will receive this event when a lower layer connection\n *  (L2CAP) has been disconnected.  Both the target and controller of the\n *  connection are notified.\n *\n *  During this callback, the 'p.remDev' parameter is valid.\n */\n#define BTIF_AVRCP_EVENT_DISCONNECT           BTIF_AVCTP_DISCONNECT_EVENT\n\n/** A remote device is attempting to connect the transport layer.\n *  Only the acceptor of the connection is notified.\n */\n#define BTIF_AVRCP_EVENT_CONNECT_IND          BTIF_AVCTP_CONNECT_IND_EVENT\n\n/* Group: Events for the exchange of basic AV/C commands that are not routed\n * to the panel subunit.\n */\n#define BTIF_AVRCP_EVENT_COMMAND             BTIF_AVCTP_COMMAND_EVENT\n\n/** A AV/C response was received from the remote device (target). This event\n *  is received for responses not routed to the panel subunit.\n */\n#define BTIF_AVRCP_EVENT_RESPONSE            BTIF_AVCTP_RESPONSE_EVENT\n\n/** The remote device (target) rejected the AV/C command.  This event is\n *  received for responses not routed to the panel subunit.\n */\n#define BTIF_AVRCP_EVENT_REJECT               BTIF_AVCTP_REJECT_EVENT\n\n/** A command (see AVRCP_SendCommand) or response (see AVRCP_SendResponse)\n * has been sent.\n */\n#define BTIF_AVRCP_EVENT_TX_DONE             BTIF_AVCTP_TX_DONE_EVENT\n\n/** Additional operand data has been received for the previous\n *  AVRCP_EVENT_COMMAND or AVRCP_EVENT_RESPONSE.\n */\n#define BTIF_AVRCP_EVENT_OPERANDS             BTIF_AVCTP_OPERANDS_EVENT\n\n/** An AV/C command has timed out.\n */\n#define BTIF_AVRCP_EVENT_CMD_TIMEOUT         ( BTIF_AVCTP_LAST_EVENT + 1)\n\n/* Group: Events for the exchange of standard AV/C panel subunit commands.\n */\n\n#define BTIF_AVRCP_EVENT_PANEL_PRESS        ( BTIF_AVCTP_LAST_EVENT + 2)\n\n/** The key corresponding to a panel operation has been held down on the\n * remote controller device for at least AVRCP_PANEL_PRESSHOLD_TIME.\n */\n#define BTIF_AVRCP_EVENT_PANEL_HOLD       ( BTIF_AVCTP_LAST_EVENT + 3)\n\n/** The key corresponding to a panel operation has been released on the\n * remote controller device.\n */\n#define BTIF_AVRCP_EVENT_PANEL_RELEASE      ( BTIF_AVCTP_LAST_EVENT + 4)\n\n/** A panel response has been received from the remote target device.\n * All fields of \"p.panelCnf\" are valid.\n */\n#define BTIF_AVRCP_EVENT_PANEL_CNF          ( BTIF_AVCTP_LAST_EVENT + 5)\n\n/* Group: Events for the exchange of Bluetooth specific advanced AV/C\n * commands routed through the panel subunit.\n */\n\n/** Advanced status information has been received from the controller.\n */\n#define BTIF_AVRCP_EVENT_ADV_INFO          ( BTIF_AVCTP_LAST_EVENT + 6)\n\n/** An advanced request was received and requires a response by the\n *  application.\n */\n#define BTIF_AVRCP_EVENT_ADV_REQ            ( BTIF_AVCTP_LAST_EVENT + 7)\n\n/** The notification of a registered event has been received.\n */\n#define BTIF_AVRCP_EVENT_ADV_NOTIFY        ( BTIF_AVCTP_LAST_EVENT + 8)\n\n/** An Advanced command was sent successfully to the target and a response\n *  was received.\n */\n#define BTIF_AVRCP_EVENT_ADV_RESPONSE      ( BTIF_AVCTP_LAST_EVENT + 9)\n\n/** No response was received for an Advanced command and it has timed out.\n *  This event is received for advanced commands routed to the panel subunit.\n */\n#define BTIF_AVRCP_EVENT_ADV_CMD_TIMEOUT    ( BTIF_AVCTP_LAST_EVENT + 10)\n\n/** An Advanced PDU was sent successfully.\n */\n#define BTIF_AVRCP_EVENT_ADV_TX_DONE        ( BTIF_AVCTP_LAST_EVENT + 11)\n\n/* Group: Connection events for establishing and releasing the AVRCP browsing\n * channel.  The browsing channel is used for the exchange of AVCTP-based\n * commands/responses which contain Bluetooth specific media\n * operations.\n */\n#define BTIF_AVRCP_EVENT_BROWSE_CONNECT     ( BTIF_AVCTP_LAST_EVENT + 12)\n\n/** The application will receive this event when a lower layer connection\n *  (L2CAP) has been disconnected.  Both the target and controller of the\n *  connection are notified.\n */\n#define BTIF_AVRCP_EVENT_BROWSE_DISCONNECT  ( BTIF_AVCTP_LAST_EVENT + 13)\n\n/**  remote device is attempting to connect the browsing channel.\n */\n#define BTIF_AVRCP_EVENT_BROWSE_CONNECT_IND ( BTIF_AVCTP_LAST_EVENT + 14)\n\n/* Group: Events for the exchange of browsing channel commands.\n */\n#define BTIF_AVRCP_EVENT_BROWSE_REQ        ( BTIF_AVCTP_LAST_EVENT + 15)\n\n#define BTIF_AVRCP_EVENT_BROWSE_INFO       ( BTIF_AVCTP_LAST_EVENT + 16)\n\n#define BTIF_AVRCP_EVENT_BROWSE_RESPONSE    ( BTIF_AVCTP_LAST_EVENT + 17)\n\n#define BTIF_AVRCP_EVENT_BROWSE_CMD_TIMEOUT ( BTIF_AVCTP_LAST_EVENT + 18)\n\n#define BTIF_AVRCP_EVENT_BROWSE_TX_DONE     ( BTIF_AVCTP_LAST_EVENT + 19)\n\n#define BTIF_AVRCP_EVENT_LAST               ( BTIF_AVCTP_LAST_EVENT + 19)\n\ntypedef uint16_t avrcp_role_t;\n\n/* Controller: Player/recorder features supported (\"play\" and \"stop\") */\n#define BTIF_AVRCP_CT_CATEGORY_1       0x0001\n\n/* Controller: Monitor/amplifier features supported (\"volume up\" and \"volume down\") */\n#define BTIF_AVRCP_CT_CATEGORY_2       0x0002\n\n/* Controller: Tuner features supported (\"channel up\" and \"channel down\") */\n#define BTIF_AVRCP_CT_CATEGORY_3       0x0004\n\n/* Controller: Menu features supported (\"root menu\", \"up\", \"down\", \"left\",\n * \"right\", and \"select\")\n */\n#define BTIF_AVRCP_CT_CATEGORY_4       0x0008\n\n/* Target: Player/recorder features supported (\"play\" and \"stop\") */\n#define BTIF_AVRCP_TG_CATEGORY_1       0x0100\n\n/* Target: Monitor/amplifier features supported (\"volume up\" and \"volume down\") */\n#define BTIF_AVRCP_TG_CATEGORY_2       0x0200\n\n/* Target: Tuner features supported (\"channel up\" and \"channel down\") */\n#define BTIF_AVRCP_TG_CATEGORY_3       0x0400\n\n/* Target: Menu features supported (\"root menu\", \"up\", \"down\", \"left\",\n * \"right\", and \"select\")\n */\n#define BTIF_AVRCP_TG_CATEGORY_4       0x0800\n\n/* Target: Player settings supported */\n#define BTIF_AVRCP_TG_PLAYER_SETTINGS  0x1000\n\n/* Target: Group navigation supported */\n#define BTIF_AVRCP_TG_GROUP_NAV        0x2000\n\n/* Target: Media browsing is supported */\n#define BTIF_AVRCP_TG_BROWSING         0x4000\n\n/* Target: Multiple media players */\n#define BTIF_AVRCP_TG_MULTIPLE_PLAYERS 0x8000\n\ntypedef uint8_t avrcp_ctype_t;\n\n#define BTIF_AVRCP_CTYPE_CONTROL              BTIF_ AVCTP_CTYPE_CONTROL\n#define BTIF_AVRCP_CTYPE_STATUS                 BTIF_AVCTP_CTYPE_STATUS\n#define BTIF_AVRCP_CTYPE_SPECIFIC_INQUIRY     BTIF_ AVCTP_CTYPE_SPECIFIC_INQUIRY\n#define BTIF_AVRCP_CTYPE_NOTIFY                BTIF_AVCTP_CTYPE_NOTIFY\n#define BTIF_AVRCP_CTYPE_GENERAL_INQUIRY       BTIF_AVCTP_CTYPE_GENERAL_INQUIRY\n\n#define BTIF_AVRCP_CTYPE_BROWSING              BTIF_AVCTP_CTYPE_BROWSING\n\ntypedef avctp_response_t avrcp_response_t;\n\n#define BTIF_AVRCP_RESPONSE_NOT_IMPLEMENTED    BTIF_AVCTP_RESPONSE_NOT_IMPLEMENTED\n#define BTIF_AVRCP_RESPONSE_ACCEPTED           AVCTP_RESPONSE_ACCEPTED\n#define BTIF_AVRCP_RESPONSE_REJECTED           AVCTP_RESPONSE_REJECTED\n#define BTIF_AVRCP_RESPONSE_IN_TRANSITION      AVCTP_RESPONSE_IN_TRANSITION\n#define BTIF_AVRCP_RESPONSE_IMPLEMENTED_STABLE AVCTP_RESPONSE_IMPLEMENTED_STABLE\n#define BTIF_AVRCP_RESPONSE_CHANGED            AVRCP_RESP_CHANGED \n#define BTIF_AVRCP_RESPONSE_INTERIM            AVCTP_RESPONSE_INTERIM\n\n#define BTIF_AVRCP_RESPONSE_BROWSING           AVCTP_RESPONSE_BROWSING\n\n#define BTIF_AVRCP_RESPONSE_SKIPPED            0xF0\n\n#define BTIF_AVRCP_RESPONSE_TIMEOUT            0xF1\n\ntypedef uint8_t avrcp_opcode_t;\n\n#define BTIF_AVRCP_OPCODE_VENDOR_DEPENDENT     AVRCP_VENDOR_DEP_IND\n#define BTIF_AVRCP_OPCODE_UNIT_INFO            AVRCP_UINT_INFO_IND\n#define BTIF_AVRCP_OPCODE_SUBUNIT_INFO         AVRCP_SUBUNIT_INFO_IND\n#define BTIF_AVRCP_OPCODE_PASS_THROUGH         AVRCP_PASSTHROUGH_IND\n\ntypedef avctp_cmdframe_t avrcp_cmdframe_t;\ntypedef avctp_rspframe_t avrcp_rspframe_t;\n\ntypedef uint8_t avrcp_subunit_type_t;\n\n#define BTIF_AVRCP_SUBUNIT_PANEL        0x09\n#define BTIF_AVRCP_SUBUNIT_UNIT         0x1F\n\ntypedef U16 avrcp_panel_operation_t;\n\n#define BTIF_AVRCP_POP_SELECT            0x0000\n#define BTIF_AVRCP_POP_UP                0x0001\n#define BTIF_AVRCP_POP_DOWN              0x0002\n#define BTIF_AVRCP_POP_LEFT              0x0003\n#define BTIF_AVRCP_POP_RIGHT             0x0004\n#define BTIF_AVRCP_POP_RIGHT_UP          0x0005\n#define BTIF_AVRCP_POP_RIGHT_DOWN        0x0006\n#define BTIF_AVRCP_POP_LEFT_UP           0x0007\n#define BTIF_AVRCP_POP_LEFT_DOWN         0x0008\n#define BTIF_AVRCP_POP_ROOT_MENU         0x0009\n#define BTIF_AVRCP_POP_SETUP_MENU        0x000A\n#define BTIF_AVRCP_POP_CONTENTS_MENU     0x000B\n#define BTIF_AVRCP_POP_FAVORITE_MENU     0x000C\n#define BTIF_AVRCP_POP_EXIT              0x000D\n\n#define BTIF_AVRCP_POP_0                 0x0020\n#define BTIF_AVRCP_POP_1                 0x0021\n#define BTIF_AVRCP_POP_2                 0x0022\n#define BTIF_AVRCP_POP_3                 0x0023\n#define BTIF_AVRCP_POP_4                 0x0024\n#define BTIF_AVRCP_POP_5                 0x0025\n#define BTIF_AVRCP_POP_6                 0x0026\n#define BTIF_AVRCP_POP_7                 0x0027\n#define BTIF_AVRCP_POP_8                 0x0028\n#define BTIF_AVRCP_POP_9                 0x0029\n#define BTIF_AVRCP_POP_DOT               0x002A\n#define BTIF_AVRCP_POP_ENTER             0x002B\n#define BTIF_AVRCP_POP_CLEAR             0x002C\n\n#define BTIF_AVRCP_POP_CHANNEL_UP        0x0030\n#define BTIF_AVRCP_POP_CHANNEL_DOWN      0x0031\n#define BTIF_AVRCP_POP_PREVIOUS_CHANNEL  0x0032\n#define BTIF_AVRCP_POP_SOUND_SELECT      0x0033\n#define BTIF_AVRCP_POP_INPUT_SELECT      0x0034\n#define BTIF_AVRCP_POP_DISPLAY_INFO      0x0035\n#define BTIF_AVRCP_POP_HELP              0x0036\n#define BTIF_AVRCP_POP_PAGE_UP           0x0037\n#define BTIF_AVRCP_POP_PAGE_DOWN         0x0038\n\n#define BTIF_AVRCP_POP_POWER             0x0040\n#define BTIF_AVRCP_POP_VOLUME_UP         0x0041\n#define BTIF_AVRCP_POP_VOLUME_DOWN       0x0042\n#define BTIF_AVRCP_POP_MUTE              0x0043\n#define BTIF_AVRCP_POP_PLAY              0x0044\n#define BTIF_AVRCP_POP_STOP              0x0045\n#define BTIF_AVRCP_POP_PAUSE             0x0046\n#define BTIF_AVRCP_POP_RECORD            0x0047\n#define BTIF_AVRCP_POP_REWIND            0x0048\n#define BTIF_AVRCP_POP_FAST_FORWARD      0x0049\n#define BTIF_AVRCP_POP_EJECT             0x004A\n#define BTIF_AVRCP_POP_FORWARD           0x004B\n#define BTIF_AVRCP_POP_BACKWARD          0x004C\n\n#define BTIF_AVRCP_POP_ANGLE             0x0050\n#define BTIF_AVRCP_POP_SUBPICTURE        0x0051\n\n#define BTIF_AVRCP_POP_F1                0x0071\n#define BTIF_AVRCP_POP_F2                0x0072\n#define BTIF_AVRCP_POP_F3                0x0073\n#define BTIF_AVRCP_POP_F4                0x0074\n#define BTIF_AVRCP_POP_F5                0x0075\n\n#define BTIF_AVRCP_POP_VENDOR_UNIQUE     0x007E\n\n#define BTIF_AVRCP_POP_NEXT_GROUP        0x017E\n#define BTIF_AVRCP_POP_PREV_GROUP        0x027E\n\n#define BTIF_AVRCP_POP_RESERVED          0x007F\n\n#define BTIF_AVRCP_NUM_EVENTS                  13\n#define BTIF_AVRCP_MAX_NOTIFICATIONS           15\n\n#define BTIF_AVRCP_SUBUNIT_OP_QUEUE_MAX  15\n\n/*---------------------------------------------------------------------------\n * avrcp operation code\n */\ntypedef U8 btif_avrcp_operation_t;\n\n#define BTIF_AVRCP_OP_GET_CAPABILITIES               0x10\n\n#define BTIF_AVRCP_OP_LIST_PLAYER_SETTING_ATTRIBS    0x11\n\n#define BTIF_AVRCP_OP_LIST_PLAYER_SETTING_VALUES     0x12\n\n#define BTIF_AVRCP_OP_GET_PLAYER_SETTING_VALUE       0x13\n\n#define BTIF_AVRCP_OP_SET_PLAYER_SETTING_VALUE       0x14\n\n#define BTIF_AVRCP_OP_GET_PLAYER_SETTING_ATTR_TEXT   0x15\n\n#define BTIF_AVRCP_OP_GET_PLAYER_SETTING_VALUE_TEXT  0x16\n\n#define BTIF_AVRCP_OP_INFORM_DISP_CHAR_SET           0x17\n\n#define BTIF_AVRCP_OP_INFORM_BATT_STATUS             0x18\n\n#define BTIF_AVRCP_OP_GET_MEDIA_INFO                 0x20\n\n#define BTIF_AVRCP_OP_GET_PLAY_STATUS                0x30\n\n#define BTIF_AVRCP_OP_REGISTER_NOTIFY                0x31\n\n#define BTIF_AVRCP_OP_REQUEST_CONT_RESP              0x40\n\n#define BTIF_AVRCP_OP_ABORT_CONT_RESP                0x41\n\n#define BTIF_AVRCP_OP_SET_ABSOLUTE_VOLUME            0x50\n\n#define BTIF_AVRCP_OP_SET_ADDRESSED_PLAYER           0x60\n\n#define BTIF_AVRCP_OP_SET_BROWSED_PLAYER             0x70\n\n#define BTIF_AVRCP_OP_GET_FOLDER_ITEMS               0x71\n\n#define BTIF_AVRCP_OP_CHANGE_PATH                    0x72\n\n#define BTIF_AVRCP_OP_GET_ITEM_ATTRIBUTES            0x73\n\n#define BTIF_AVRCP_OP_PLAY_ITEM                      0x74\n\n#define BTIF_AVRCP_OP_SEARCH                         0x80\n\n#define BTIF_AVRCP_OP_ADD_TO_NOW_PLAYING             0x90\n\n#define BTIF_AVRCP_OP_GENERAL_REJECT                 0xA0\n\n#define BTIF_AVRCP_OP_CUSTOM_CMD\t\t\t\t\t\t0xF0\n\ntypedef uint8_t avrcp_error_code_t;\n\n#define BTIF_AVRCP_INVALID_CMD_ERR         0x00\n#define BTIF_AVRCP_INVALID_PARM_ERR        0x01\n#define BTIF_AVRCP_PARM_NOT_FOUND_ERR      0x02\n#define BTIF_AVRCP_INTERNAL_ERROR_ERR      0x03\n#define BTIF_AVRCP_NO_ERROR_ERR            0x04\n#define BTIF_AVRCP_UIDS_CHANGED_ERR        0x05\n#define BTIF_AVRCP_ERR_UNKNOWN_ERROR       0x06\n#define BTIF_AVRCP_ERR_INVALID_DIRECTION   0x07\n#define BTIF_AVRCP_ERR_NON_DIRECTORY       0x08\n#define BTIF_AVRCP_ERR_DOES_NOT_EXIST      0x09\n#define BTIF_AVRCP_ERR_INVALID_SCOPE       0x0A\n#define BTIF_AVRCP_ERR_OUT_OF_BOUNDS       0x0B\n#define BTIF_AVRCP_ERR_IS_DIRECTORY        0x0C\n#define BTIF_AVRCP_ERR_MEDIA_IN_USE        0x0D\n#define BTIF_AVRCP_ERR_NOW_PLAYING_FULL    0x0E\n#define BTIF_AVRCP_ERR_NO_SEARCH_SUPPORT   0x0F\n#define BTIF_AVRCP_ERR_SEARCH_IN_PROGRESS  0x10\n#define BTIF_AVRCP_ERR_INVALID_PLAYER_ID   0x11\n#define BTIF_AVRCP_ERR_NOT_BROWSABLE       0x12\n#define BTIF_AVRCP_ERR_NOT_ADDRESSED       0x13\n#define BTIF_AVRCP_ERR_NO_SEARCH_RESULTS   0x14\n#define BTIF_AVRCP_ERR_NO_AVAIL_PLAYERS    0x15\n#define BTIF_AVRCP_ERR_ADDR_PLAYER_CHANGED 0x16\n\n/*---------------------------------------------------------------------------\n *  event Id\n */\ntypedef uint8_t avrcp_event_Id_t;\n\n#define BTIF_AVRCP_EID_MEDIA_STATUS_CHANGED        0x01 /* Change in media status */\n\n#define BTIF_AVRCP_EID_TRACK_CHANGED               0x02 /* Current track changed */\n\n#define BTIF_AVRCP_EID_TRACK_END                   0x03 /* Reached end of track */\n\n#define BTIF_AVRCP_EID_TRACK_START                 0x04 /* Reached track start */\n\n#define BTIF_AVRCP_EID_PLAY_POS_CHANGED            0x05 /* Change in playback position.\n                                                         * Returned after the specified\n                                                         * playback notification change\n                                                         * notification interval.\n                                                         */\n\n#define BTIF_AVRCP_EID_BATT_STATUS_CHANGED         0x06 /* Change in battery status   */\n#define BTIF_AVRCP_EID_SYS_STATUS_CHANGED          0x07 /* Change in system status    */\n#define BTIF_AVRCP_EID_APP_SETTING_CHANGED         0x08 /* Change in player\n                                                         * application setting\n                                                         */\n\n#define BTIF_AVRCP_EID_NOW_PLAYING_CONTENT_CHANGED 0x09 /* Contents of the now playing\n                                                         * list have changed\n                                                         */\n\n#define BTIF_AVRCP_EID_AVAILABLE_PLAYERS_CHANGED   0x0A /* The available players have\n                                                         * changed\n                                                         */\n\n#define BTIF_AVRCP_EID_ADDRESSED_PLAYER_CHANGED    0x0B /* The addressed player has\n                                                         * changed\n                                                         */\n\n#define BTIF_AVRCP_EID_UIDS_CHANGED                0x0C /* The UIDS have changed */\n\n#define BTIF_AVRCP_EID_VOLUME_CHANGED              0x0D /* The volume was changed */\n\n#define BTIF_AVRCP_EID_FLAG_INTERIM                0x80 /* Used Internally */\n\n/*---------------------------------------------------------------------------\n * even mask\n */\ntypedef uint16_t avrcp_event_mask_t;\n\n#define BTIF_AVRCP_ENABLE_PLAY_STATUS_CHANGED      0x0001   /* Change in playback\n                                                             * status\n                                                             */\n#define BTIF_AVRCP_ENABLE_MEDIA_STATUS_CHANGED     0x0001   /* Alias */\n#define BTIF_AVRCP_ENABLE_TRACK_CHANGED            0x0002   /* Current track changed */\n#define BTIF_AVRCP_ENABLE_TRACK_END                0x0004   /* Reached end of track  */\n#define BTIF_AVRCP_ENABLE_TRACK_START              0x0008   /* Reached track start   */\n#define BTIF_AVRCP_ENABLE_PLAY_POS_CHANGED         0x0010   /* Change in playback\n                                                             * position\n                                                             */\n#define BTIF_AVRCP_ENABLE_BATT_STATUS_CHANGED      0x0020   /* Change in battery\n                                                             * status\n                                                             */\n#define BTIF_AVRCP_ENABLE_SYS_STATUS_CHANGED       0x0040   /* Change in system status */\n#define BTIF_AVRCP_ENABLE_APP_SETTING_CHANGED      0x0080   /* Change in player\n                                                             * application setting\n                                                             */\n\n#define BTIF_AVRCP_ENABLE_NOW_PLAYING_CHANGED      0x0100   /* Change in the now\n                                                             * playing list\n                                                             */\n#define BTIF_AVRCP_ENABLE_AVAIL_PLAYERS_CHANGED    0x0200   /* Available players\n                                                             * changed\n                                                             */\n#define BTIF_AVRCP_ENABLE_ADDRESSED_PLAYER_CHANGED 0x0400   /* Addressed player changed */\n#define BTIF_AVRCP_ENABLE_UIDS_CHANGED             0x0800   /* UIDS changed */\n#define BTIF_AVRCP_ENABLE_VOLUME_CHANGED           0x1000   /* Volume Changed */\n\ntypedef uint8_t btif_avrcp_capabilityId;\n\n#define BTIF_AVRCP_CAPABILITY_COMPANY_ID        2\n#define BTIF_AVRCP_CAPABILITY_EVENTS_SUPPORTED  3\n\n/*---------------------------------------------------------------------------\n * player attrId  type\n */\ntypedef uint8_t avrcp_playerAttrId;\n\n#define BTIF_AVRCP_PLAYER_EQ_STATUS        1    /* Player equalizer status */\n#define BTIF_AVRCP_PLAYER_REPEAT_STATUS    2    /* Player repeat status */\n#define BTIF_AVRCP_PLAYER_SHUFFLE_STATUS   3    /* Player Shuffle status */\n#define BTIF_AVRCP_PLAYER_SCAN_STATUS      4    /* Player scan status */\n\n/*---------------------------------------------------------------------------\n *  playerattrId mask type\n */\ntypedef uint16_t avrcp_player_attrId_mask_t;\n\n#define BTIF_AVRCP_ENABLE_PLAYER_EQ_STATUS       0x0001\n#define BTIF_AVRCP_ENABLE_PLAYER_REPEAT_STATUS   0x0002\n#define BTIF_AVRCP_ENABLE_PLAYER_SHUFFLE_STATUS  0x0004\n#define BTIF_AVRCP_ENABLE_PLAYER_SCAN_STATUS     0x0008\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_5  0x0010\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_6  0x0020\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_7  0x0040\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_8  0x0080\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_9  0x0100\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_10 0x0200\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_11 0x0400\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_12 0x0800\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_13 0x1000\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_14 0x2000\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_15 0x4000\n#define BTIF_AVRCP_ENABLE_PLAYER_EXTENSION_ID_16 0x8000\n\n#ifndef BTIF_AVRCP_MAX_FOLDER_DEPTH\n#define BTIF_AVRCP_MAX_FOLDER_DEPTH 10\n#endif\n\ntypedef uint8_t avrcp_eq_value_t;\n\n#define BTIF_AVRCP_EQ_OFF  1\n#define BTIF_AVRCP_EQ_ON   2\n\ntypedef uint8_t avrcp_repeat_value_t;\n\n#define BTIF_AVRCP_REPEAT_OFF     1\n#define BTIF_AVRCP_REPEAT_SINGLE  2\n#define BTIF_AVRCP_REPEAT_ALL     3\n#define BTIF_AVRCP_REPEAT_GROUP   4\n\ntypedef uint8_t avrcp_shuffle_value_t;\n\n#define BTIF_AVRCP_SHUFFLE_OFF    1\n#define BTIF_AVRCP_SHUFFLE_ALL    2\n#define BTIF_AVRCP_SHUFFLE_GROUP  3\n\ntypedef uint8_t avrcp_scan_value_t;\n\n#define BTIF_AVRCP_SCAN_OFF    1\n#define BTIF_AVRCP_SCAN_ALL    2\n#define BTIF_AVRCP_SCAN_GROUP  3\n\ntypedef uint8_t avrcp_ext_value_t;\n\ntypedef uint8_t avrcp_battery_status_t;\n\n#define BTIF_AVRCP_BATT_STATUS_NORMAL      0\n#define BTIF_AVRCP_BATT_STATUS_WARNING     1\n#define BTIF_AVRCP_BATT_STATUS_CRITICAL    2\n#define BTIF_AVRCP_BATT_STATUS_EXTERNAL    3\n#define BTIF_AVRCP_BATT_STATUS_FULL_CHARGE 4\n\ntypedef uint8_t avrcp_system_status_t;\n\n#define BTIF_AVRCP_SYS_POWER_ON   0\n#define BTIF_AVRCP_SYS_POWER_OFF  1\n#define BTIF_AVRCP_SYS_UNPLUGGED  2\n\ntypedef uint32_t avrcp_media_attrId_t;\n\n#define BTIF_AVRCP_MEDIA_ATTR_TITLE       0x00000001\n#define BTIF_AVRCP_MEDIA_ATTR_ARTIST      0x00000002\n#define BTIF_AVRCP_MEDIA_ATTR_ALBUM       0x00000003\n#define BTIF_AVRCP_MEDIA_ATTR_TRACK       0x00000004\n#define BTIF_AVRCP_MEDIA_ATTR_NUM_TRACKS  0x00000005\n#define BTIF_AVRCP_MEDIA_ATTR_GENRE       0x00000006\n#define BTIF_AVRCP_MEDIA_ATTR_DURATION    0x00000007\n\ntypedef uint32_t avrcp_media_attrId_mask_t;\n\n#define BTIF_AVRCP_ENABLE_MEDIA_ATTR_TITLE       0x01\n#define BTIF_AVRCP_ENABLE_MEDIA_ATTR_ARTIST      0x02\n#define BTIF_AVRCP_ENABLE_MEDIA_ATTR_ALBUM       0x04\n#define BTIF_AVRCP_ENABLE_MEDIA_ATTR_TRACK       0x08\n#define BTIF_AVRCP_ENABLE_MEDIA_ATTR_NUM_TRACKS  0x10\n#define BTIF_AVRCP_ENABLE_MEDIA_ATTR_GENRE       0x20\n#define BTIF_AVRCP_ENABLE_MEDIA_ATTR_DURATION    0x40\n\ntypedef uint8_t avrcp_media_status_t;\n\n#define BTIF_AVRCP_MEDIA_STOPPED       0x00\n#define BTIF_AVRCP_MEDIA_PLAYING       0x01\n#define BTIF_AVRCP_MEDIA_PAUSED        0x02\n#define BTIF_AVRCP_MEDIA_FWD_SEEK      0x03\n#define BTIF_AVRCP_MEDIA_REV_SEEK      0x04\n#define BTIF_AVRCP_MEDIA_ERROR         0xFF\n\ntypedef uint16_t avrcp_version_t;\n\n/* Unable to determine the Hands Free Profile version that is supported */\n#define BTIF_AVRCP_VERSION_UNKNOWN 0x0000\n\n/* Supports Version 1.0 of the AVRCP Profile */\n#define BTIF_AVRCP_VERSION_1_0     0x0100\n\n/* Supports Version 1.3 of the AVRCP Profile */\n#define BTIF_AVRCP_VERSION_1_3     0x0103\n\n/* Supports Version 1.4 of the AVRCP Profile */\n#define BTIF_AVRCP_VERSION_1_4     0x0104\n\ntypedef uint16_t avrcp_features_t;\n\n/* Player/recorder features supported (\"play\" and \"stop\") */\n#define BTIF_AVRCP_FEATURES_CATEGORY_1       0x0001\n\n/* Monitor/amplifier features supported (\"volume up\" and \"volume down\") */\n#define BTIF_AVRCP_FEATURES_CATEGORY_2       0x0002\n\n/* Tuner features supported (\"channel up\" and \"channel down\") */\n#define BTIF_AVRCP_FEATURES_CATEGORY_3       0x0004\n\n/* Menu features supported (\"root menu\", \"up\", \"down\", \"left\", \"right\", and\n * \"select\")\n */\n#define BTIF_AVRCP_FEATURES_CATEGORY_4       0x0008\n\n/* Player settings supported */\n#define BTIF_AVRCP_FEATURES_PLAYER_SETTINGS  0x0010\n\n/* Group navigation supported */\n#define BTIF_AVRCP_FEATURES_GROUP_NAV        0x0020\n\n#define BTIF_AVRCP_FEATURES_BROWSING         0x0040\n\n#define BTIF_AVRCP_FEATURES_MULTIPLE_PLAYERS 0x0080\n\ntypedef uint8_t avrcp_maj_player_type_t;\n\n#define BTIF_AVRCP_MAJ_PLAYER_AUDIO      0x01\n#define BTIF_AVRCP_MAJ_PLAYER_VIDEO      0x02\n#define BTIF_AVRCP_MAJ_PLAYER_AUD_BCAST  0x04\n#define BTIF_AVRCP_MAJ_PLAYER_VID_BCAST  0x08\n\ntypedef uint32_t avrcp_player_sub_type_t;\n\n#define BTIF_AVRCP_PLAYER_SUB_AUDIO_BOOK  0x00000001\n#define BTIF_AVRCP_PLAYER_SUB_PODCAST     0x00000002\n\ntypedef uint8_t avrcp_scope_t;\n\n#define BTIF_AVRCP_SCOPE_MEDIA_PLAYER_LIST  0x00\n#define BTIF_AVRCP_SCOPE_VIRTUAL_FILESYS    0x01\n#define BTIF_AVRCP_SCOPE_SEARCH             0x02\n#define BTIF_AVRCP_SCOPE_NOW_PLAYING        0x03\n\ntypedef uint8_t avrcp_chg_path_direction_t;\n\n#define BTIF_AVRCP_DIR_UP                   0x00\n#define BTIF_AVRCP_DIR_DOWN                 0x01\n\ntypedef uint8_t avrcp_plyr_featr_byte_t;\n\n/* Byte 0 */\n\n#define BTIF_AVRCP_BRWS_0_FEAT_SELECT              0x01\n#define BTIF_AVRCP_BRWS_0_FEAT_UP                  0x02\n#define BTIF_AVRCP_BRWS_0_FEAT_DOWN                0x04\n#define BTIF_AVRCP_BRWS_0_FEAT_LEFT                0x08\n#define BTIF_AVRCP_BRWS_0_FEAT_RIGHT               0x10\n#define BTIF_AVRCP_BRWS_0_FEAT_RIGHT_UP            0x20\n#define BTIF_AVRCP_BRWS_0_FEAT_RIGHT_DOWN          0x40\n#define BTIF_AVRCP_BRWS_0_FEAT_LEFT_UP             0x80\n\n/* Byte 1 */\n\n#define BTIF_AVRCP_BRWS_1_FEAT_LEFT_DOWN           0x01\n#define BTIF_AVRCP_BRWS_1_FEAT_ROOT_MENU           0x02\n#define BTIF_AVRCP_BRWS_1_FEAT_SETUP_MENU          0x04\n#define BTIF_AVRCP_BRWS_1_FEAT_CONTENTS_MENU       0x08\n#define BTIF_AVRCP_BRWS_1_FEAT_FAVORITE_MENU       0x10\n#define BTIF_AVRCP_BRWS_1_FEAT_EXIT                0x20\n#define BTIF_AVRCP_BRWS_1_FEAT_0                   0x40\n#define BTIF_AVRCP_BRWS_1_FEAT_1                   0x80\n\n/* Byte 2 */\n\n#define BTIF_AVRCP_BRWS_2_FEAT_2                   0x01\n#define BTIF_AVRCP_BRWS_2_FEAT_3                   0x02\n#define BTIF_AVRCP_BRWS_2_FEAT_4                   0x04\n#define BTIF_AVRCP_BRWS_2_FEAT_5                   0x08\n#define BTIF_AVRCP_BRWS_2_FEAT_6                   0x10\n#define BTIF_AVRCP_BRWS_2_FEAT_7                   0x20\n#define BTIF_AVRCP_BRWS_2_FEAT_8                   0x40\n#define BTIF_AVRCP_BRWS_2_FEAT_9                   0x80\n\n/* Byte 3 */\n\n#define BTIF_AVRCP_BRWS_3_FEAT_DOT                 0x01\n#define BTIF_AVRCP_BRWS_3_FEAT_ENTER               0x02\n#define BTIF_AVRCP_BRWS_3_FEAT_CLEAR               0x04\n#define BTIF_AVRCP_BRWS_3_FEAT_CHNL_UP             0x08\n#define BTIF_AVRCP_BRWS_3_FEAT_CHNL_DOWN           0x10\n#define BTIF_AVRCP_BRWS_3_FEAT_PREV_CHNL           0x20\n#define BTIF_AVRCP_BRWS_3_FEAT_SOUND_SEL           0x40\n#define BTIF_AVRCP_BRWS_3_FEAT_INPUT_SEL           0x80\n\n/* Byte 4 */\n\n#define BTIF_AVRCP_BRWS_3_FEAT_DISPLAY_INFO        0x01\n#define BTIF_AVRCP_BRWS_4_FEAT_HELP                0x02\n#define BTIF_AVRCP_BRWS_4_FEAT_PG_UP               0x04\n#define BTIF_AVRCP_BRWS_4_FEAT_PG_DOWN             0x08\n#define BTIF_AVRCP_BRWS_4_FEAT_POWER               0x10\n#define BTIF_AVRCP_BRWS_4_FEAT_VOL_UP              0x20\n#define BTIF_AVRCP_BRWS_4_FEAT_VOL_DOWN            0x40\n#define BTIF_AVRCP_BRWS_4_FEAT_MUTE                0x80\n\n/* Byte 5 */\n\n#define BTIF_AVRCP_BRWS_5_FEAT_PLAY                0x01\n#define BTIF_AVRCP_BRWS_5_FEAT_STOP                0x02\n#define BTIF_AVRCP_BRWS_5_FEAT_PAUSE               0x04\n#define BTIF_AVRCP_BRWS_5_FEAT_RECORD              0x08\n#define BTIF_AVRCP_BRWS_5_FEAT_REWIND              0x10\n#define BTIF_AVRCP_BRWS_5_FEAT_FF                  0x20\n#define BTIF_AVRCP_BRWS_5_FEAT_EJECT               0x40\n#define BTIF_AVRCP_BRWS_5_FEAT_FORWARD             0x80\n\n/* Byte 6 */\n\n#define BTIF_AVRCP_BRWS_6_FEAT_BACKWARD            0x01\n#define BTIF_AVRCP_BRWS_6_FEAT_ANGLE               0x02\n#define BTIF_AVRCP_BRWS_6_FEAT_SUBPIC              0x04\n#define BTIF_AVRCP_BRWS_6_FEAT_F1                  0x08\n#define BTIF_AVRCP_BRWS_6_FEAT_F2                  0x10\n#define BTIF_AVRCP_BRWS_6_FEAT_F3                  0x20\n#define BTIF_AVRCP_BRWS_6_FEAT_F4                  0x40\n#define BTIF_AVRCP_BRWS_6_FEAT_F5                  0x80\n\n/* Byte 7 */\n\n#define BTIF_AVRCP_BRWS_7_FEAT_VENDOR_UNIQUE       0x01\n#define BTIF_AVRCP_BRWS_7_FEAT_GROUP_NAV           0x02\n#define BTIF_AVRCP_BRWS_7_FEAT_ADVANCED_CTRL       0x04\n#define BTIF_AVRCP_BRWS_7_FEAT_BROWSING            0x08\n#define BTIF_AVRCP_BRWS_7_FEAT_SEARCHING           0x10\n#define BTIF_AVRCP_BRWS_7_FEAT_ADD_TO_PLAYING      0x20\n#define BTIF_AVRCP_BRWS_7_FEAT_UIDS_UNIQUE         0x40\n#define BTIF_AVRCP_BRWS_7_FEAT_BRWS_WHEN_ADDRESSED 0x80\n\n/* Byte 8 */\n\n#define BTIF_AVRCP_BRWS_8_SEARCH_WHEN_ADDRESSED    0x01\n#define BTIF_AVRCP_BRWS_8_NOW_PLAYING              0x02\n#define BTIF_AVRCP_BRWS_8_UID_PERSISTENT           0x04\n\ntypedef uint8_t avrcp_item_type_t;\n\n#define BTIF_AVRCP_ITEM_MEDIA_PLAYER  0x01\n#define BTIF_AVRCP_ITEM_FOLDER        0x02\n#define BTIF_AVRCP_ITEM_MEDIA_ELEMENT 0x03\n\ntypedef uint8_t avrcp_folder_type_t;\n\n#define BTIF_AVRCP_FOLDER_TYPE_MIXED     0x00\n#define BTIF_AVRCP_FOLDER_TYPE_TITLES    0x01\n#define BTIF_AVRCP_FOLDER_TYPE_ALBUMS    0x02\n#define BTIF_AVRCP_FOLDER_TYPE_ARTISTS   0x03\n#define BTIF_AVRCP_FOLDER_TYPE_GENRES    0x04\n#define BTIF_AVRCP_FOLDER_TYPE_PLAYLISTS 0x05\n#define BTIF_AVRCP_FOLDER_TYPE_YEARS     0x06\n\ntypedef uint8_t avrcp_is_playable_t;\ntypedef uint16_t avrcp_capabilityId_t;\ntypedef void avrcp_advanced_pdu_t;\n\n#define BTIF_AVRCP_IS_NOT_PLAYABLE  0x00\n#define BTIF_AVRCP_IS_PLAYABLE      0x01\n\ntypedef uint8_t avrcp_media_type_t;\n\n#define BTIF_AVRCP_MEDIA_TYPE_AUDIO 0x00\n#define BTIF_AVRCP_MEIDA_TYPE_VIDEO 0x01\n\n#define BTIF_AVCTP_RESPONSE_INTERIM            0x0F\n\ntypedef struct {\n\n    /* Index 0 == Off, Index 1 == On */\n    const char *string[2];\n    uint8_t len[2];\n} avrcp_eq_string_t;\n\ntypedef struct {\n\n    /* Index 0 == Off, Index 1 == Single, Index 2 == All, Index 3 == Group */\n    const char *string[4];\n    uint8_t len[4];\n} avrcp_repeat_string_t;\n\ntypedef struct {\n\n    /* Index 0 == Off, Index 1 == All, Index 2 == Group */\n    const char *string[3];\n    uint8_t len[3];\n} avrcp_shuffle_string_t;\n\ntypedef struct {\n\n    /* Index 0 == Off, Index 1 == All, Index 2 == Group */\n    const char *string[3];\n    uint8_t len[3];\n} avrcp_scan_string_t;\n\n#ifndef BTIF_AVRCP_MAX_PLAYER_STRINGS\n#define BTIF_AVRCP_MAX_PLAYER_STRINGS  5\n#endif\n/*--------------------------------------------------------------------------\n * NUM  PLAYER SETTINGS constant\n */\n\n#define BTIF_AVRCP_PANEL_STATE_NONE       0\n\n#define BTIF_AVRCP_PANEL_STATE_C_IDLE     1\n#define BTIF_AVRCP_PANEL_STATE_C_PRESS    2\n#define BTIF_AVRCP_PANEL_STATE_C_PRESS_R  3\n#define BTIF_AVRCP_PANEL_STATE_C_RELEASE  4\n#define BTIF_AVRCP_PANEL_STATE_C_SKIP     5\n\n#define BTIF_AVRCP_PANEL_STATE_T_IDLE     101\n#define BTIF_AVRCP_PANEL_STATE_T_PRESS    102\n#define BTIF_AVRCP_PANEL_STATE_T_HOLD     103\n\ntypedef struct {\n\n    /* Number of extended player settings */\n    uint8_t numStrings;\n    const char *string[BTIF_AVRCP_MAX_PLAYER_STRINGS];  /* The player setting string */\n    uint8_t len[BTIF_AVRCP_MAX_PLAYER_STRINGS]; /* The player setting string length */\n} avrcp_ext_string_t;\ntypedef uint8_t avrcp_player_attrId_t;\n\ntypedef struct {\n    avrcp_player_attrId_t attrId;   /* Media Player Attribute ID */\n    union {\n        avrcp_eq_value_t eq;\n        avrcp_repeat_value_t repeat;\n        avrcp_shuffle_value_t shuffle;\n        avrcp_scan_value_t scan;\n        avrcp_ext_value_t extValue;\n        uint8_t value;          /* Used Internally */\n    } setting;\n} avrcp_player_setting_t;\n\ntypedef struct {\n    const char *attrString;     /* Media Player Attribute Text */\n    uint8_t attrLen;            /* Length of the Attribute Text */\n    union {\n        avrcp_eq_string_t eq;   /* Equalizer status */\n        avrcp_repeat_string_t repeat;   /* Repeat mode status */\n        avrcp_shuffle_string_t shuffle; /* Shuffle mode status */\n        avrcp_scan_string_t scan;   /* Scan mode status */\n        avrcp_ext_string_t ext; /* Extended settings status */\n    } setting;\n} avrcp_player_strings_t;\n\ntypedef struct {\n    avrcp_media_attrId_t attrId;    /* Media element attribute ID */\n    const char *string;         /* The media element */\n    uint16_t length;            /* Length of the media element */\n} avrcp_media_info_t;\n\ntypedef struct {\n    uint8_t numCharSets;\n    uint16_t charSets[BTIF_AVRCP_MAX_CHAR_SETS];\n} avrcp_char_sets_t;\n\ntypedef struct {\n    uint32_t length;\n\n    uint32_t position;\n    avrcp_media_status_t mediaStatus;\n} avrcp_media_play_status_t;\n\ntypedef struct {\n    uint16_t nameLen;\n    const char *name;\n} avrcp_folder_t;\n\ntypedef struct {\n\n    /* Used Internally */\n    list_entry_t node;\n\n    /* Used Internally */\n    uint16_t playerId;\n\n    /* Major Player Type */\n    avrcp_maj_player_type_t majorType;\n\n    /* Player Sub Type */\n    avrcp_player_sub_type_t subType;\n\n    /* Current media play status */\n    avrcp_media_status_t mediaStatus;\n\n    /* Player feature bitmask */\n    avrcp_plyr_featr_byte_t features[16];\n\n    /* Displayable character set */\n    uint16_t charSet;\n\n    /* Player name length */\n    uint16_t nameLen;\n\n    /* Player name */\n    const char *name;\n\n    /* Folder depth */\n    uint16_t folderDepth;\n\n    /* Current folder */\n    avrcp_folder_t folder[BTIF_AVRCP_MAX_FOLDER_DEPTH];\n\n    /* Number of items in the current folder */\n    uint32_t numItems;\n} avrcp_media_player_item_t;\ntypedef uint16_t avrcp_event_mask_t;\ntypedef uint8_t avrcp_operation_t;\n\ntypedef struct _AvrcpFolderItem {\n\n    /* The UID of this media element */\n    uint8_t uid[8];\n\n    /* Folder Type */\n    avrcp_folder_type_t folderType;\n\n    /* Is Playable Flag */\n    avrcp_is_playable_t isPlayable;\n\n    /* Character Set */\n    uint16_t charSet;\n\n    /* The name length of this media element */\n    uint16_t nameLen;\n\n    /* The name of this media element */\n    uint8_t *name;\n} avrcp_folder_item_t;\n\ntypedef struct {\n\n    /* Attribute ID */\n    avrcp_media_attrId_t attrId;\n\n    /* Character Set */\n    uint16_t charSet;\n\n    /* Attribute Length */\n    uint16_t valueLen;\n\n    /* Attribute Name */\n    uint8_t *value;\n} avrcp_media_attribute_t;\n\ntypedef struct {\n\n    /* The UID of this media element */\n    uint8_t uid[8];\n\n    /* Media type (audio or video) */\n    avrcp_media_type_t mediaType;\n\n    /* Character Set */\n    uint16_t charSet;\n\n    /* The name length of this media element */\n    uint16_t nameLen;\n\n    /* The name of this media element */\n    uint8_t *name;\n\n    /* Number of media attributes */\n    uint8_t numAttrs;\n\n    /* Media Attributes */\n    avrcp_media_attribute_t attrs[BTIF_AVRCP_NUM_MEDIA_ATTRIBUTES];\n} avrcp_media_element_item_t;\n\ntypedef uint8_t avrcp_Item_type_t;\n\ntypedef struct {\n\n    /* Media Item Type */\n    avrcp_Item_type_t itemType;\n\n    /* The Media Item */\n    union {\n        avrcp_media_player_item_t player;\n        avrcp_folder_item_t folder;\n        avrcp_media_element_item_t element;\n    } item;\n} avrcp_media_item_t;\n\ntypedef struct {\n\n    /* The most significant 32 bits of the track index information.  */\n    uint32_t msU32;\n\n    /* The least significant 32 bits of the track index information.  */\n    uint32_t lsU32;\n} avrcp_track_struct_t;\n\ntypedef struct {\n\n    /* Transaction ID of the request */\n    uint32_t transId;\n    union {\n\n        /* Contains an item to be played on the addressed media player.  This\n         * is valid when \"advOp\" is set to AVRCP_OP_PLAY_ITEM or\n         * AVRCP_OP_ADD_TO_NOW_PLAYING.\n         */\n        struct {\n            avrcp_scope_t scope;\n            uint8_t uid[8];\n            uint16_t uidCounter;\n        } item;\n    } p;\n} avrcp_adv_req_parms_t;\n\ntypedef union {\n\n    /* The value of each player setting.  This is valid when \"advOp\" is set\n     * to AVRCP_OP_SET_PLAYER_SETTING_VALUE.\n     */\n    avrcp_player_setting_t playerSetting;\n    struct {\n\n        /* Bitmask that describes which\n         * attributes are being reported\n         */\n        avrcp_player_attrId_mask_t attrMask;\n\n        /* The equalizer setting. */\n        avrcp_eq_value_t eq;\n\n        /* The repeat setting. */\n        avrcp_repeat_value_t repeat;\n\n        /* The shuffle setting. */\n        avrcp_shuffle_value_t shuffle;\n\n        /* The scan setting. */\n        avrcp_scan_value_t scan;\n\n#if BTIF_AVRCP_NUM_PLAYER_SETTINGS > 4\n        /* Extended player setting. */\n        avrcp_ext_value_t extValue[BTIF_AVRCP_NUM_PLAYER_SETTINGS - 4];\n\n#endif                          /*  */\n    } setting;\n\n    /* The list of character sets displayable on the controller.\n     * This is valid when \"advOp\" is set to AVRCP_OP_INFORM_DISP_CHAR_SET. The\n     * default is 106 (UTF-8).\n     */\n    avrcp_char_sets_t charSet;\n\n    /* The battery status of the controller.\n     * This is valid when \"advOp\" is set to AVRCP_OP_INFORM_BATT_STATUS.\n     */\n    avrcp_battery_status_t battStatus;\n\n#if BTIF_AVRCP_VERSION_1_3_ONLY == BTIF_DISABLED\n    /* The Absolute Volume\n     * This is valid when \"advOp\" is set to AVRCP_OP_SET_ABSOLUTE_VOLUME.\n     */\n    uint8_t volume;\n\n    /* The addressed player\n     * This is valid when \"advOp\" is set to AVRCP_OP_SET_ADDRESSED_PLAYER.\n     */\n    avrcp_media_player_item_t *addrPlayer;\n\n#endif                          /* BTIF_AVRCP_VERSION_1_3_ONLY == BTIF_DISABLED */\n} avrcp_adv_inf_parms_t;\n\ntypedef struct {\n    avrcp_player_attrId_t attrId;\n    uint16_t charSet;\n    uint8_t length;\n    const char *string;\n} avrcp_player_attrib_t;\n\ntypedef struct {\n    uint8_t valueId;\n    uint16_t charSet;\n    uint8_t length;\n    const char *string;\n} avrcp_player_settings_t;\n\ntypedef struct {\n    U32 attrId;\n    uint16_t charSet;\n    uint16_t length;\n    const char *string;\n} avrcp_media_attr_t;\ntypedef uint16_t avrcp_player_attrId_mask_t;\n\ntypedef struct {\n    uint32_t length;\n    uint32_t position;\n    uint8_t mediaStatus;\n} adv_play_status_t;\n\ntypedef union {\n\n    /* The capabilities of the target.\n     * This is valid when \"advOp\" is set to AVRCP_OP_GET_CAPABILITIES.\n     */\n    struct {\n\n        /* The type of capability. */\n        uint8_t type;\n\n        /* The capability info. */\n        union {\n\n            /* The list of company IDs.\n             * (type == AVRCP_CAPABILITY_COMPANY_ID)\n             */\n            struct {\n\n                /* The number of supported company IDs. */\n                uint8_t numIds;\n\n                /* An array of company IDs (3 bytes each). */\n                uint8_t *ids;\n            } companyId;\n\n            /* A bitmask of the supported events.\n             * (type == AVRCP_CAPABILITY_EVENTS_SUPPORTED)\n             */\n            uint16_t eventMask;\n        } info;\n    } capability;\n\n    /* A bitmask that indicates the player settings supported by\n     * the target device.\n     * This is valid when \"advOp\" is set to\n     * AVRCP_OP_LIST_PLAYER_SETTING_ATTRIBS.\n     */\n    uint16_t attrMask;\n\n    /* The list of values for the requested attribute on the target\n     * device.\n     * This is valid when \"advOp\" is set to AVRCP_OP_LIST_PLAYER_SETTING_VALUES.\n     */\n    struct {\n\n        /* The number of supported value IDs. */\n        uint8_t numIds;\n\n        /* An array of value ID (1 byte each). */\n        uint8_t *ids;\n    } attrValues;\n\n    /* The text of each player setting attribute.\n     * This is valid when \"advOp\" is set to\n     * AVRCP_OP_GET_PLAYER_SETTING_ATTR_TEXT\n     */\n    struct {\n\n        /* The number of attribute IDs returned. */\n        uint8_t numIds;\n\n        /* An array of attribute text information */\n        avrcp_player_attrib_t txt[BTIF_AVRCP_NUM_PLAYER_SETTINGS];\n    } attrStrings;\n\n    /* The value of each player setting.\n     * This is valid when \"advOp\" is set to AVRCP_OP_GET_PLAYER_SETTING_VALUE.\n     */\n    struct {\n\n        /* Bitmask that describes which\n         * attributes are being reported\n         */\n        avrcp_player_attrId_mask_t attrMask;\n\n        /* The equalizer setting. */\n        avrcp_eq_value_t eq;\n\n        /* The repeat setting. */\n        avrcp_repeat_value_t repeat;\n\n        /* The shuffle setting. */\n        avrcp_shuffle_value_t shuffle;\n\n        /* The scan setting. */\n        avrcp_scan_value_t scan;\n\n#if BTIF_AVRCP_NUM_PLAYER_SETTINGS > 4\n        /* Extended player setting. */\n        avrcp_ext_value_t extValue[BTIF_AVRCP_NUM_PLAYER_SETTINGS - 4];\n\n#endif                          /*  */\n    } setting;\n\n    /* The list of setting values for the requested attribute on the target.\n     * This is valid when \"advOp\" is set to\n     * AVRCP_OP_GET_PLAYER_SETTING_VALUE_TEXT.\n     */\n    struct {\n\n        /* The number of settings returned */\n        uint8_t numSettings;\n\n        /* An array of value text information */\n        avrcp_player_settings_t txt[BTIF_AVRCP_NUM_PLAYER_SETTINGS];\n    } settingStrings;\n\n    /* The list of element values for the current track on the\n     * target.  This is valid when \"advOp\" is set to AVRCP_OP_GET_MEDIA_INFO.\n     */\n    struct {\n\n        /* The number of elements returned */\n        uint8_t numIds;\n\n        /* An array of element value text information */\n        avrcp_media_attr_t txt[BTIF_AVRCP_NUM_MEDIA_ATTRIBUTES];\n    } element;\n\n    adv_play_status_t playStatus;\n\n#if BTIF_AVRCP_VERSION_1_3_ONLY == BTIF_DISABLED\n    /* The Absolute Volume\n     * This is valid when \"advOp\" is set to AVRCP_OP_SET_ABSOLUTE_VOLUME.\n     */\n    uint8_t volume;\n\n#endif                          /* BTIF_AVRCP_VERSION_1_3_ONLY == BTIF_DISABLED */\n} avrcp_adv_rsp_parms_t;\n\n/*---------------------------------------------------------------------------\n * AvrcpNotifyParms structure\n *\n * Defines the callback parameters for AVRCP_EVENT_ADV_RESPONSE when \"advOp\" is\n * set to AVRCP_OP_REGISTER_NOTIFY, and for the AVRCP_EVENT_ADV_NOTIFY event.\n */\ntypedef struct {\n\n    /* Defines the event ID that was received */\n    avrcp_event_Id_t event;\n    union {\n\n        /* Play status of the media.  Valid when the event ID is\n         * AVRCP_EID_MEDIA_STATUS_CHANGED.\n         */\n        avrcp_media_status_t mediaStatus;\n\n        /* The current track.  Valid when the event ID is\n         * AVRCP_EID_TRACK_CHANGED.\n         */\n        avrcp_track_struct_t track;\n\n        /* The position (ms) of the current track.  Valid when the event\n         * ID is AVRCP_EID_PLAY_POS_CHANGED.\n         */\n        uint32_t position;\n\n        /* The battery status of the target.  Valid when the event ID is\n         * AVRCP_EID_BATT_STATUS_CHANGED.\n         */\n        avrcp_battery_status_t battStatus;\n\n        /* The system status of the target.  Valid when the event ID is\n         * AVRCP_EID_SYS_STATUS_CHANGED.\n         */\n        avrcp_system_status_t sysStatus;\n\n        /* The player settings.  Valid when the event ID is\n         * AVRCP_EID_APP_SETTING_CHANGED\n         */\n        struct {\n\n            /* Bitmask that describes which\n             * attributes are being reported\n             */\n            avrcp_player_attrId_mask_t attrMask;\n\n            /* The equalizer setting. */\n            avrcp_eq_value_t eq;\n\n            /* The repeat setting. */\n            avrcp_repeat_value_t repeat;\n\n            /* The shuffle setting. */\n            avrcp_shuffle_value_t shuffle;\n\n            /* The scan setting. */\n            avrcp_scan_value_t scan;\n\n#if BTIF_AVRCP_NUM_PLAYER_SETTINGS > 4\n            /* Extended player setting. */\n            avrcp_ext_value_t extValue[BTIF_AVRCP_NUM_PLAYER_SETTINGS - 4];\n\n#endif                          /*  */\n        } setting;\n\n#if BTIF_AVRCP_VERSION_1_3_ONLY == BTIF_DISABLED\n        /* Absolute volume.  Valid when the event ID is\n         * AVRCP_EID_VOLUME_CHANGED.\n         */\n        uint8_t volume;\n\n        /* The addressed player.  Valid when the event ID is\n         * AVRCP_EID_ADDRESSED_PLAYER_CHANGED.\n         */\n        struct {\n            uint16_t playerId;\n            uint16_t uidCounter;\n        } addrPlayer;\n\n        /* The UID counter.  Valid when the event ID is\n         * AVRCP_EID_UIDS_CHANGED.\n         */\n        uint16_t uidCounter;\n\n#endif                          /* BTIF_AVRCP_VERSION_1_3_ONLY == BTIF_DISABLED */\n    } p;\n} avrcp_adv_notify_parms_t;\n\ntypedef struct {\n    uint8_t transId;\n    union {\n\n        /* Folder Item.  Valid when \"advOp\" is AVRCP_OP_GET_FOLDER_ITEMS */\n        struct {\n            avrcp_scope_t scope;    /* The requested scope */\n            uint32_t start;     /* The starting item */\n            uint32_t end;       /* The ending item */\n            uint8_t numAttrs;   /* Number of attributes requested */\n            uint8_t *attrList;  /* List of attributes requested */\n        } folder;\n\n        /* Path.  Valid when \"advOp\" is AVRCP_OP_CHANGE_PATH */\n        struct {\n            uint16_t uidCounter;    /* Current UID counter */\n            uint8_t direction;  /* Direction to change in the path (up or down) */\n            uint8_t *uid;       /* UID of folder to change to (down) */\n        } chPath;\n\n        /* Item Attributes.  Valid when \"advOp\" is AVRCP_OP_GET_ITEM_ATTRIBUTES */\n        struct {\n            avrcp_scope_t scope;    /* The requested scope */\n            uint8_t *uid;       /* UID of the requested item */\n            uint16_t uidCounter;    /* Current UID counter */\n            uint8_t numAttrs;   /* Number of attributes requested */\n            uint8_t *attrList;  /* List of attributes requested */\n        } attr;\n\n        /* Search. Valid when \"advOp\" is AVRCP_OP_SEARCH */\n        struct {\n            uint16_t charSet;   /* Character set of the search string */\n            uint16_t len;       /* Length of the search string */\n            uint8_t *str;       /* Search string */\n        } search;\n    } p;\n} avrcp_browse_req_parms_t;\n\ntypedef union {\n    /* The browsed player.  Valid when \"advOp\" is AVRCP_OP_SET_BROWSED_PLAYER\n     */\n    avrcp_media_player_item_t *brwsPlayer;\n} avrcp_browse_inf_parms_t;\n\ntypedef union {\n    /* Browsed Player. Valid when \"advOp\" is AVRCP_OP_SET_BROWSED_PLAYER */\n    struct {\n        uint16_t uidCounter;    /* Current UID counter */\n        uint32_t numItems;      /* Number of items in the current path */\n        uint16_t charSet;       /* Character set used by the player */\n        uint8_t fDepth;         /* Number of folder length/name pairs to follow */\n        uint8_t *list;          /* List of folder names */\n    } brwsPlayer;\n\n    /* Folder Items. Valid when \"advOp\" is AVRCP_OP_GET_FOLDER_ITEMS */\n    struct {\n        uint16_t uidCounter;    /* Current UID counter */\n        uint32_t numItems;      /* Number of items in the current path */\n        uint8_t *list;          /* List of items returned */\n    } fldrItems;\n\n    /* Change Path. Valid when \"advOp\" is AVRCP_OP_CHANGE_PATH */\n    struct {\n        uint32_t numItems;      /* Number of items in the current path */\n    } chPath;\n\n    /* Item Attributes. Valid when \"advOp\" is AVRCP_OP_GET_ITEM_ATTRIBUTES */\n    struct {\n        uint8_t numAttrs;       /* Number of attributes returned */\n        uint8_t *list;          /* List of attributes returned */\n    } itemAttrs;\n\n    /* Search. Valid when \"advOp\" is AVRCP_OP_SEARCH */\n    struct {\n        uint16_t uidCounter;    /* Current UID counter */\n        uint32_t numItems;      /* Number of items found in the search */\n    } search;\n} avrcp_browse_rsp_parms_t;\n\ntypedef struct {\n\n    /* Operation to which the remote target responded */\n    uint16_t operation;\n\n    /* The press state of the key in the command to which\n     * the target responded.\n     */\n    BOOL press;\n\n    /* Response from the target. May indicate\n     * an \"extended\" response code such as\n     * AVRCP_RESPONSE_SKIPPED or AVRCP_RESPONSE_TIMEOUT.\n     */\n    uint8_t response;\n} avrcp_panel_cnf_t;\ntypedef struct {\n\n    /* Operation corresponding to the key pressed, held, or\n     * released. AVRCP will only indicate a new operation\n     * when the previous one has been _RELEASE'd.\n     */\n    uint16_t operation;\n} avrcp_panel_ind_t;\n\n/* Channel Packet */\ntypedef struct {\n    list_entry_t node;\n    U8 transId;\n    U8 msgType;\n    U8 msgHdrLen;\n    U8 msgHdr[BTIF_AVTP_HEADER_LEN];\n    U8 txIdSize;\n    U16 txId;\n    U16 txDataLen;\n    U8 *txData;\n    U32 context;\n} avtp_packet_t;\n\ntypedef struct {\n    list_entry_t node;          /* Used internally by AVCTP. */\n    uint8_t transId;            /* Transaction ID */\n    uint8_t ctype;              /* 4 bits */\n    uint8_t subunitType;        /* 5 bits */\n    uint8_t subunitId;          /* 3 bits */\n    uint8_t opcode;             /* 8 bits */\n    uint8_t headerLen;          /* Header length */\n    uint8_t header[6];          /* Header information */\n    uint16_t operandLen;         /* Length of buffer in \"operands\" */\n    uint8_t *operands;          /* Buffer containing the command data */\n    BOOL more;                  /* Indicates whether to expect additional\n                                 * frames containing more operand data. */\n    avtp_packet_t avtpPacket;   /* For sending over AVTP */\n\n    // EvmTimer    timer;          /* Timer for the command */\n} avctp_cmd_frame_t;\n\nenum {\n    BTIF_AVRCP_STATE_DISCONNECTED,\n    BTIF_AVRCP_STATE_CONNECTED\n};\ntypedef void avrcp_callback_parms_t;\n\ntypedef void (*btif_avrcp_callback)(btif_avrcp_chnl_handle_t chnl, const avrcp_callback_parms_t *parms);\n\nstatic POSSIBLY_UNUSED inline btif_avctp_event_t btif_convert_avrcp_event(btif_avrcp_event_t event)\n{\n    return (btif_avctp_event_t) event;\n}\n\n#define BTIF_AVRCP_EVENT(stack_avrcp_event)   btif_convert_avrcp_event(stack_avrcp_event)\n#define BTIF_AVRCP_ERROR_CODE(statck_error_code)  statck_error_code\n\ntypedef struct\n{\n    list_entry_t node;\n    U8 op;\n    U16 parm_len;\n    U8 *parms;\n    U8  trans_id;\n\n    BOOL more;\n    U16  cur_len;\n    U16  bytes_to_send;\n    U8   cont_op;\n    BOOL abort;\n\n    BOOL  internal;\n    U8  response;\n    U8 error;\n\n    BOOL is_cmd;\n    U8  ctype;          /* 4 bits */\n} btif_avrcp_advanced_cmd_pdu_t ;\n\ntypedef struct\n{\n    bool free;\n    uint8_t state;\n    list_entry_t tx_cmd_list;\n    CQueue tx_op_queue;\n    uint8_t tx_op_queue_buff[BTIF_AVRCP_SUBUNIT_OP_QUEUE_MAX*3]; // 3 bytes per operation\n    avctp_cmd_frame_t rx_cmd_frame;\n    uint8_t rx_frag_buff[BTIF_AVRCP_RX_FRAG_BUFF_SIZE];\n    uint32_t rx_frag_buff_offset;\n    struct\n    {\n        avrcp_event_mask_t rem_eventMask;\n        btif_avrcp_advanced_cmd_pdu_t *tx_cmd;\n    } adv;\n    btif_avrcp_callback cb;\n    btif_avrcp_chnl_handle_t avrcp_channel_handle;\n} btif_avrcp_channel_t;\n\ntypedef struct\n{\n    btif_avrcp_advanced_cmd_pdu_t *tx_cmd;\n    avrcp_adv_rsp_parms_t rsp;\n    avrcp_adv_notify_parms_t notify;\n} btif_avrcp_rsp_adv;\n\ntypedef struct\n{\n    btif_avrcp_event_t event;\n    btif_avrcp_channel_t *channel;\n    bt_status_t status;\n    uint8_t error_code;\n    btif_avrcp_operation_t adv_op;\n    union\n    {\n        avctp_cmd_frame_t *cmdFrame;\n        btif_avrcp_rsp_adv adv;\n        avrcp_panel_cnf_t panel_cnf;\n        avrcp_panel_ind_t panel_ind;\n    } p;\n} btif_avrcp_callback_parms_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n    void btif_avrcp_init(btif_app_bt_device_t btif_app_bt_device);\n\n    bt_status_t btif_avrcp_register(btif_avrcp_channel_t *channel, btif_avrcp_callback cb, avrcp_features_t feat);\n\n    btif_avrcp_channel_t *btif_alloc_avrcp_channel(void);\n\n    btif_avrcp_channel_t *btif_get_avrcp_channel(btif_avrcp_chnl_handle_t handle);\n\n    btif_avctp_event_t btif_avrcp_get_callback_event(const avrcp_callback_parms_t * parms);\n\n    bool btif_avrcp_state_connected(btif_avrcp_channel_t * channel);\n\n    void btif_avrcp_set_volume_cmd(void *cmd, uint8_t transid, int8_t volume);\n\n    void btif_avrcp_register_read_remote_sdp_callback(void (*cb)(btif_avrcp_chnl_handle_t chnl, uint16_t version, uint16_t features));\n\n    void btif_avrcp_send_custom_cmd_generic(btif_avrcp_channel_t * chnl, uint8_t * ptrData,\n                                            uint32_t len);\n    bt_status_t btif_avrcp_ct_accept_custom_cmd_rsp(btif_avrcp_channel_t * chnl, void *cmd_res,\n                                                    uint8_t isAccept);\n    bt_status_t btif_avrcp_connect(btif_avrcp_channel_t * channel, bt_bdaddr_t * addr);\n\n    bt_status_t btif_avrcp_connect_rsp(btif_avrcp_channel_t * chnl, BOOL accept);\n\n    bt_status_t btif_avrcp_disconnect(btif_avrcp_chnl_handle_t channel);\n\n    bt_status_t btif_avrcp_ct_get_play_status(btif_avrcp_channel_t * channel,\n\n                                              avrcp_advanced_pdu_t * cmd);\n    avrcp_version_t btif_get_avrcp_version(btif_avrcp_channel_t * channel);\n\n    bt_status_t btif_avrcp_ct_get_capabilities(btif_avrcp_channel_t * channel,\n                                               avrcp_advanced_pdu_t * pdu,\n                                               btif_avrcp_capabilityId capabilityId);\n\n    void btif_set_avrcp_state(btif_avrcp_channel_t * channel, uint8_t avrcp_state);\n\n    uint8_t btif_get_avrcp_state(btif_avrcp_channel_t * channel);\n\n    bool btif_avrcp_is_control_channel_connected(btif_avrcp_channel_t * channel);\n\n    btif_remote_device_t *btif_avrcp_get_remote_device(btif_avrcp_chnl_handle_t handle);\n\n    uint8_t btif_avrcp_get_channel_panel_int_state(btif_avrcp_chnl_handle_t handle);\n\n    uint8_t btif_avrcp_get_channel_avrcp_state(btif_avrcp_chnl_handle_t handle);\n\n    void btif_avrcp_set_register_notify_check_callback(bool (*cb)(uint8_t event), void (*resp_cb)(uint8_t event));\n\n    bt_status_t btif_avrcp_ct_register_notification(btif_avrcp_channel_t * channel,\n                                                    avrcp_advanced_pdu_t * pdu,\n                                                    btif_avrcp_event_t eventId, uint32_t interval);\n    void btif_avrcp_ct_register_notify_response_check(btif_avrcp_channel_t * channel, uint8_t event);\n    bt_status_t btif_get_avrcp_cb_channel_state(const avrcp_callback_parms_t * parms);\n\n    avrcp_error_code_t btif_get_avrcp_cb_channel_error_code(const avrcp_callback_parms_t * parms);\n\n    btif_avrcp_operation_t btif_get_avrcp_cb_channel_advOp(const avrcp_callback_parms_t * parms);\n\n    void *btif_get_avrcp_cb_txPdu(const avrcp_callback_parms_t * parms);\n\n    btif_avrcp_operation_t btif_get_avrcp_cb_txPdu_Op(const avrcp_callback_parms_t * parms);\n\n    uint8_t  btif_get_avrcp_pdu_ctype(void * adv_pdu);\n\n    uint8_t btif_get_avrcp_cb_txPdu_transId(const avrcp_callback_parms_t * parms);\n\n    avrcp_role_t btif_get_avrcp_cb_channel_role(btif_avrcp_channel_t * channel);\n\n    avrcp_panel_cnf_t *btif_get_panel_cnf(const avrcp_callback_parms_t * parms);\n\n    avrcp_role_t btif_get_avrcp_channel_role(btif_avrcp_channel_t * channel);\n\n    adv_play_status_t *btif_get_avrcp_adv_rsp_play_status(const avrcp_callback_parms_t * parms);\n\n    avrcp_adv_rsp_parms_t *btif_get_avrcp_adv_rsp(const avrcp_callback_parms_t * parms);\n\n    avrcp_adv_notify_parms_t *btif_get_avrcp_adv_notify(const avrcp_callback_parms_t * parms);\n\n    avrcp_event_mask_t btif_get_avrcp_adv_rem_event_mask(btif_avrcp_channel_t * channel);\n\n    void btif_set_avrcp_adv_rem_event_mask(btif_avrcp_channel_t * channel, uint16_t mask);\n\n    void btif_set_app_bt_device_avrcp_notify_rsp_ctype(avrcp_advanced_pdu_t * cmd, uint8_t type);\n\n    uint8_t btif_get_app_bt_device_avrcp_notify_rsp_transid(avrcp_advanced_pdu_t * cmd);\n\n    bt_status_t btif_avrcp_ct_get_media_Info(btif_avrcp_channel_t * channel,\n\n                                             avrcp_advanced_pdu_t * cmd,\n                                             avrcp_media_attrId_mask_t mediaMask);\n    avctp_cmd_frame_t *btif_get_avrcp_cmd_frame(const avrcp_callback_parms_t * parms);\n\n    void btif_avrcp_set_capabilities_rsp_cmd(avrcp_advanced_pdu_t * cmd_pdu, uint8_t transId,\n\n                                             uint8_t type);\n\n    void btif_avrcp_set_control_rsp_cmd(avrcp_advanced_pdu_t * cmd_pdu, uint8_t transId,\n                                        uint8_t type);\n\t\n\tvoid btif_avrcp_set_control_rsp_cmd_witherror(avrcp_advanced_pdu_t * cmd_pdu, uint8_t transId, uint8_t type, uint8_t error);\n\n    bt_status_t btif_avrcp_ct_get_capabilities_rsp(btif_avrcp_channel_t * channel,\n                                                   avrcp_advanced_pdu_t * cmd_pdu,\n                                                   avrcp_capabilityId_t capid, uint16_t mask);\n\n    bt_status_t btif_avrcp_ct_get_capabilities_company_id_rsp(btif_avrcp_channel_t * channel, avrcp_advanced_pdu_t * cmd_pdu);\n\n    bt_status_t btif_avrcp_ct_accept_absolute_volume_rsp(btif_avrcp_channel_t * channel,\n                                                         avrcp_advanced_pdu_t * cmd_pdu,\n                                                         uint8_t volume);\n\n    void btif_avrcp_set_notify_rsp_cmd(avrcp_advanced_pdu_t * cmd_pdu, uint8_t transId,\n                                       uint8_t type);\n\t\n\tvoid btif_avrcp_set_notify_rsp_cmd_witherror(avrcp_advanced_pdu_t * cmd_pdu, uint8_t transId, uint8_t type, uint8_t error);\n\n    void btif_avrcp_recheck_vol_ctrl_flag(uint8_t * flag);\n    \n    bt_status_t btif_avrcp_ct_get_absolute_volume_rsp(btif_avrcp_channel_t * channel,\n                                                      avrcp_advanced_pdu_t * cmd_pdu,\n                                                      uint8_t volume);\n\n    bt_status_t btif_avrcp_tg_absolute_volume_notify(btif_avrcp_channel_t * channel, avrcp_advanced_pdu_t * cmd_pdu, uint8_t volume);\n\n    uint16_t btif_avrcp_get_cmgrhandler_remDev_hciHandle(btif_avrcp_channel_t * channel);\n\n    avrcp_panel_cnf_t *btif_get_avrcp_panel_cnf(const avrcp_callback_parms_t * parms);\n\n    avrcp_panel_ind_t *btif_get_avrcp_panel_ind(const avrcp_callback_parms_t * parms);\n\n    bt_status_t btif_avrcp_set_panel_key(btif_avrcp_channel_t * channel, avrcp_panel_operation_t op,\n                                         bool press);\n\n    uint8_t btif_avrcp_get_ctl_trans_id(btif_avrcp_channel_t * channel);\n    void btif_avrcp_set_ctl_trans_id(btif_avrcp_channel_t * channel, uint8_t trans_id);\n\n    bt_status_t btif_avrcp_ct_set_absolute_volume(btif_avrcp_channel_t *channel, avrcp_advanced_pdu_t *_pdu, uint8_t volume);\n\n    void btif_avrcp_set_channel_adv_event_mask(btif_avrcp_chnl_handle_t handle, uint16_t mask);\n\n    bt_status_t btif_avrcp_tg_send_general_rsp(btif_avrcp_channel_t * channel, avrcp_advanced_pdu_t * cmd_pdu, uint8_t op, uint8_t error_code);\n\n   \tbt_status_t btif_avrcp_ct_invalid_volume_rsp(btif_avrcp_channel_t * channel, avrcp_advanced_pdu_t * cmd_pdu);\n\n#if defined(IBRT)\n    uint32_t btif_avrcp_profile_save_ctxs(btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\n    uint32_t btif_avrcp_profile_restore_ctxs(uint8_t *buf, uint32_t buf_len);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/avtp_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __AVTP_API_H_\n#define __AVTP_API_H_\n\n/* Message Types */\n#define BTIF_AVTP_MSG_TYPE_COMMAND       0\n#define BTIF_AVTP_MSG_TYPE_ACCEPT        2\n#define BTIF_AVTP_MSG_TYPE_REJECT        3\n\n#endif /* __AVTP_H_ */\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/besaud_api.h",
    "content": "#ifndef __BESAUD_API_H__\n#define __BESAUD_API_H__\n\n#include \"cqueue.h\"\n#include \"bluetooth.h\"\n#include \"me_api.h\"\n\n#define BTIF_BESAUD_EVENT_CONTROL_CONNECTED            0x21\n\n#define BTIF_BESAUD_EVENT_CONTROL_DISCONNECTED         0x22\n\n#define BTIF_BESAUD_EVENT_CONTROL_DATA_IND             0x23\n\n#define BTIF_BESAUD_EVENT_CONTROL_DATA_SENT            0x24\n\n#define BTIF_BESAUD_EVENT_CONTROL_SET_IDLE             0x30\n\ntypedef uint16_t btif_besaud_event;\n\ntypedef void (*btif_besaud_status_change_callback)(btif_besaud_event event);\n\ntypedef void (*btif_besaud_data_received_callback)(uint8_t*, uint16_t);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nuint8_t btif_besaud_is_connected(void);\nuint8_t btif_besaud_is_cmd_sending(void);\nvoid btif_besaud_clear_cmd_sending(void);\nvoid btif_besaud_client_create(btif_remote_device_t *dev);\nvoid btif_besaud_server_create(btif_besaud_status_change_callback callback);\nvoid btif_besaud_data_received_register(btif_besaud_data_received_callback callback);\nvoid btif_besaud_send_cmd(uint8_t* cmd, uint16_t len);\nbt_status_t btif_besaud_send_cmd_no_wait(uint8_t* cmd, uint16_t len);\nvoid btif_besaud_status_changed(btif_besaud_event event);\nbtif_remote_device_t *btif_besaud_get_peer_device(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/besble_debug.h",
    "content": "#ifndef __BESBLE_DEBUG_H\n#define __BESBLE_DEBUG_H\n\n#include \"hal_uart.h\"\n\nconst char *DebugMask2Prefix(uint8_t mask);\n\n#define DEBUG_PREFIX_FORMAT         \"%s<%s> \"\n#define DEBUG_SUFFIX_FORMAT         \"\\n\"\n\n#define LOG_HCI_TAG  \"[BLE HCI]: \"\n#define LOG_L2C_TAG  \"[BLE L2C]: \"\n#define LOG_ATT_TAG  \"[BLE ATT]: \"\n#define LOG_GATT_TAG \"[BLE GATT]: \"\n#define LOG_SMP_TAG  \"[BLE SMP]: \"\n\n#define LOG_GAP_TAG \"[BLE GAP]: \"\n#define LOG_APP_TAG \"[BLE APP]: \"\n#define LOG_BLE_TAG \"[BLE]: \"\n#define LOG_HTP_TAG \"[BLE HTP]: \"\n\n#define GAP_ERROR   1\n#define GAP_OUT     2\n#define GATT_ERROR  3\n#define GATT_OUT    4\n#define ATT_ERROR   5\n#define ATT_OUT     6\n#define L2C_ERROR   7\n#define L2C_OUT     8\n#define HCI_ERROR   9\n#define HCI_OUT     10\n#define SMP_ERROR   11\n#define SMP_OUT     12\n#define APP_ERROR   13\n#define APP_OUT     14\n/* Profile macro start */\n#define PRF_HT_ERROR    15\n#define PRF_HT_OUT      16\n/* Profile macro end */\n#define BLE_ERROR       30\n#define BLE_OUT         31\n\n#define DebugOut(mask, str, ...)                             \\\n    do                                                       \\\n    {                                                        \\\n        const char *prefix = NULL;                           \\\n        prefix             = DebugMask2Prefix(mask);         \\\n        TRACE(1, DEBUG_PREFIX_FORMAT, prefix, __FUNCTION__); \\\n        TRACE(1, str, ##__VA_ARGS__);                        \\\n    } while (0)\n\n#if 0\n#define DEBUG_HCI_DBG   1\n#define DEBUG_GAP_DBG   0\n#define DEBUG_GATT_DBG  0\n#define DEBUG_ATT_DBG   0\n#define DEBUG_L2C_DBG   0\n#define DEBUG_SMP_DBG   0\n#define DEBUG_APP_DBG   0\n#define DEBUG_PRF_DBG   0\n#define DEBUG_BLE_DBG   0\n\n#else\n/* ble debug macro switch */\n#define DEBUG_HCI_DBG   0\n#define DEBUG_GAP_DBG   0\n#define DEBUG_GATT_DBG  0\n#define DEBUG_ATT_DBG   0\n#define DEBUG_L2C_DBG   0\n#define DEBUG_SMP_DBG   0\n#define DEBUG_APP_DBG   0\n#define DEBUG_PRF_DBG   0\n#define DEBUG_BLE_DBG   0\n#endif\n\n#if DEBUG_HCI_DBG\n#define BLE_HCI_DBG(str,...)     DebugOut(HCI_OUT, str, ##__VA_ARGS__)\n#define BLE_HCI_ERR(str,...)     DebugOut(HCI_ERROR, str, ##__VA_ARGS__)\n#define BLE_HCI_FUNC_ENTER()     TRACE(LOG_BLE_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_HCI_FUNC_LEAVE()     TRACE(LOG_BLE_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#else\n#define BLE_HCI_DBG(str,...)\n#define BLE_HCI_ERR(str,...)     DebugOut(HCI_ERROR, str, ##__VA_ARGS__)\n#define BLE_HCI_FUNC_ENTER()\n#define BLE_HCI_FUNC_LEAVE()\n#endif\n\n#if DEBUG_GAP_DBG\n#define BLE_GAP_DBG(str,...)     DebugOut(GAP_OUT, str, ##__VA_ARGS__)\n#define BLE_GAP_ERR(str,...)     DebugOut(GAP_ERROR, str, ##__VA_ARGS__)\n#define BLE_GAP_FUNC_ENTER()     TRACE(LOG_GAP_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_GAP_FUNC_LEAVE()     TRACE(LOG_GAP_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#else\n#define BLE_GAP_DBG(str,...)\n#define BLE_GAP_ERR(str,...)     DebugOut(GAP_ERROR, str, ##__VA_ARGS__)\n#define BLE_GAP_FUNC_ENTER()\n#define BLE_GAP_FUNC_LEAVE()\n#endif\n\n#if DEBUG_GATT_DBG\n#define BLE_GATT_DBG(str,...)    DebugOut(GATT_OUT, str, ##__VA_ARGS__)\n#define BLE_GATT_ERR(str,...)    DebugOut(GATT_ERROR, str, ##__VA_ARGS__)\n#define BLE_GATT_FUNC_ENTER()    TRACE(LOG_GATT_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_GATT_FUNC_LEAVE()    TRACE(LOG_GATT_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#else\n#define BLE_GATT_DBG(str,...)\n#define BLE_GATT_ERR(str,...)    DebugOut(GATT_ERROR, str, ##__VA_ARGS__)\n#define BLE_GATT_FUNC_ENTER()\n#define BLE_GATT_FUNC_LEAVE()\n#endif\n\n#if DEBUG_ATT_DBG\n#define BLE_ATT_DBG(str,...)     DebugOut(ATT_OUT, str, ##__VA_ARGS__)\n#define BLE_ATT_ERR(str,...)     DebugOut(ATT_ERROR, str, ##__VA_ARGS__)\n#define BLE_ATT_FUNC_ENTER()     TRACE(LOG_ATT_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_ATT_FUNC_LEAVE()     TRACE(LOG_ATT_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#else\n#define BLE_ATT_DBG(str,...)\n#define BLE_ATT_ERR(str,...)     DebugOut(ATT_ERROR, str, ##__VA_ARGS__)\n#define BLE_ATT_FUNC_ENTER()\n#define BLE_ATT_FUNC_LEAVE()\n#endif\n\n#if DEBUG_L2C_DBG\n#define BLE_L2C_DBG(str,...)     DebugOut(L2C_OUT, str, ##__VA_ARGS__)\n#define BLE_L2C_ERR(str,...)     DebugOut(L2C_ERROR, str, ##__VA_ARGS__)\n#define BLE_L2C_FUNC_ENTER()     TRACE(LOG_L2C_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_L2C_FUNC_LEAVE()     TRACE(LOG_L2C_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#else\n#define BLE_L2C_DBG(str,...)\n#define BLE_L2C_ERR(str,...)     DebugOut(L2C_ERROR, str, ##__VA_ARGS__)\n#define BLE_L2C_FUNC_ENTER()\n#define BLE_L2C_FUNC_LEAVE()\n#endif\n\n#if DEBUG_L2C_DBG\n#define BLE_SMP_DBG(str,...)     DebugOut(SMP_OUT, str, ##__VA_ARGS__)\n#define BLE_SMP_ERR(str,...)     DebugOut(SMP_ERROR, str, ##__VA_ARGS__)\n#define BLE_SMP_FUNC_ENTER()     TRACE(LOG_SMP_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_SMP_FUNC_LEAVE()     TRACE(LOG_SMP_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#else\n#define BLE_SMP_DBG(str,...) \n#define BLE_SMP_ERR(str,...)     DebugOut(SMP_ERROR, str, ##__VA_ARGS__)\n#define BLE_SMP_FUNC_ENTER()\n#define BLE_SMP_FUNC_LEAVE()\n#endif\n\n#if DEBUG_APP_DBG\n#define BLE_APP_DBG(str,...)     DebugOut(APP_OUT, str, ##__VA_ARGS__)\n#define BLE_APP_ERR(str,...)     DebugOut(APP_ERROR, str, ##__VA_ARGS__)\n#define BLE_APP_FUNC_ENTER()     TRACE(LOG_APP_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_APP_FUNC_LEAVE()     TRACE(LOG_APP_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#else\n#define BLE_APP_DBG(str,...)\n#define BLE_APP_ERR(str,...)     DebugOut(APP_ERROR, str, ##__VA_ARGS__)\n#define BLE_APP_FUNC_ENTER()\n#define BLE_APP_FUNC_LEAVE()\n#endif\n\n#if DEBUG_PRF_DBG\n#define BLE_PRF_HP_DBG(str,...)  DebugOut(PRF_HT_OUT, str, ##__VA_ARGS__)\n#define BLE_PRF_HP_ERR(str,...)  DebugOut(PRF_HT_ERROR, str, ##__VA_ARGS__)\n#define BLE_PRF_HP_FUNC_ENTER()  TRACE(LOG_HTP_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_PRF_HP_FUNC_LEAVE()  TRACE(LOG_HTP_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#else\n#define BLE_PRF_HP_DBG(str,...)\n#define BLE_PRF_HP_ERR(str,...)  DebugOut(PRF_HT_ERROR, str, ##__VA_ARGS__)\n#define BLE_PRF_HP_FUNC_ENTER()\n#define BLE_PRF_HP_FUNC_LEAVE()\n#endif\n\n#if DEBUG_BLE_DBG\n#define BLE_DBG(str,...)         DebugOut(BLE_OUT, str, ##__VA_ARGS__)\n#define BLE_ERR(str,...)         DebugOut(BLE_ERROR, str, ##__VA_ARGS__)\n#define BLE_FUNC_ENTER()         TRACE(LOG_BLE_TAG\"%s line: %d +++\\n\", __FUNCTION__, __LINE__)\n#define BLE_FUNC_LEAVE()         TRACE(LOG_BLE_TAG\"%s line: %d ---\\n\", __FUNCTION__, __LINE__)\n#define BLE_DUMP8(x,y,z)         DUMP8(x,y,z)\n\n#else\n#define BLE_DBG(str,...)\n#define BLE_ERR(str,...)         DebugOut(BLE_ERROR, str, ##__VA_ARGS__)\n#define BLE_FUNC_ENTER() \n#define BLE_FUNC_LEAVE()\n#define BLE_DUMP8(x,y,z)\n\n#endif\n\n#endif\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/bluetooth.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BLUETOOTH_H__\n#define __BLUETOOTH_H__\n#include \"stdint.h\"\n#include \"string.h\"\n#include \"btif_sys_config.h\"\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef BOOL_DEFINED\ntypedef unsigned int BOOL;      /* IGNORESTYLE */\n#endif\n\ntypedef unsigned int U32;\ntypedef unsigned short U16;\ntypedef unsigned char U8;\n\ntypedef int S32;\ntypedef short S16;\ntypedef char S8;\n\n#ifndef U32_PTR_DEFINED\ntypedef U32 U32_PTR;\n\n#define U32_PTR_DEFINED\n#endif /* U32_PTR_DEFINED */\n\n/* Variable sized integers. Used to optimize processor efficiency by\n * using the most efficient data size for counters, arithmatic, etc.\n */\ntypedef unsigned long I32;\n\n#ifndef XA_INTEGER_SIZE\n#define XA_INTEGER_SIZE    4\n#endif\n\n#if XA_INTEGER_SIZE == 4\ntypedef unsigned long I16;\ntypedef unsigned long I8;\n#elif XA_INTEGER_SIZE == 2\ntypedef unsigned short I16;\ntypedef unsigned short I8;\n#elif XA_INTEGER_SIZE == 1\ntypedef unsigned short I16;\ntypedef unsigned char I8;\n#else\n#error No XA_INTEGER_SIZE specified!\n#endif\n\ntypedef void (*PFV) (void);\n\n/* Boolean Definitions */\n#ifndef TRUE\n#define TRUE  (1==1)\n#endif /* TRUE */\n\n#ifndef FALSE\n#define FALSE (0==1)\n#endif /* FALSE */\n\n#ifndef TimeT\ntypedef U32 TimeT;\n#endif\n\n#ifndef BtPriority\ntypedef U8 BtPriority;\n#endif\n\n/** Bluetooth Address */\ntypedef struct {\n    uint8_t address[6];\n} __attribute__ ((packed)) bt_bdaddr_t;\n\n#define BTIF_BD_ADDR_SIZE    6\n#define BTIF_LINK_KEY_SIZE   16\ntypedef struct _list_entr {\n    struct _list_entr *Flink;\n    struct _list_entr *Blink;\n    unsigned int resv;\n} list_entry_t;\n\n/*---------------------------------------------------------------------------\n *\n *  Doubly-linked list manipulation routines.  Some are implemented as\n *  macros but logically are procedures.\n */\n#ifndef BTIF_LIST_MACROS\n//void InitializeListHead(ListEntry *head);\n#define initialize_list_head(ListHead) (\\\n    (ListHead)->Flink = (ListHead)->Blink = (ListHead) )\n\n#define initialize_list_entry(Entry) (\\\n    (Entry)->Flink = (Entry)->Blink = 0 )\n\n#define is_entry_available(Entry) (\\\n    ((Entry)->Flink == 0))\n\n#ifndef is_list_empty\n//BOOL is_list_empty(ListEntry *head);\n#define is_list_empty(ListHead) (\\\n    ((ListHead)->Flink == (ListHead)))\n#endif\n\n#define get_head_list(ListHead) (ListHead)->Flink\n\n#define get_tail_list(ListHead) (ListHead)->Blink\n\n#define get_next_node(Node)     (Node)->Flink\n\n#define get_prior_node(Node)    (Node)->Blink\n\n#define is_node_connected(n) (((n)->Blink->Flink == (n)) && ((n)->Flink->Blink == (n)))\nBOOL is_list_circular(list_entry_t * list);\n\n#define list_assert(exp) (ASSERT(exp, \"%s %s, %d\\n\", #exp, __func__, __LINE__))\n\n//void InsertTailList(ListEntry *head, ListEntry *entry);\nvoid _insert_tail_list(list_entry_t * head, list_entry_t * entry);\n\n#define insert_tail_list(a, b) (list_assert(is_list_circular(a)), \\\n                            _insert_tail_list(a, b), \\\n                            list_assert(is_list_circular(a)))\n\nvoid insert_head_list(list_entry_t * head, list_entry_t * entry);\nvoid _insert_head_list(list_entry_t * head, list_entry_t * entry);\n\n#define insert_head_list(a, b) (list_assert(is_list_circular(a)), \\\n                            _insert_head_list(a, b), \\\n                            list_assert(is_list_circular(a)))\n\nlist_entry_t *remove_head_list(list_entry_t * head);\nlist_entry_t *_remove_head_list(list_entry_t * head);\n\n#define remove_head_list(a) (list_assert(is_list_circular(a)), \\\n                            _remove_head_list(a))\n\nvoid remove_entry_list(list_entry_t * entry);\nBOOL is_node_on_list(list_entry_t * head, list_entry_t * node);\nU8 get_list_number(list_entry_t * head);\nBOOL is_list_circular(list_entry_t * list);\nvoid move_list(list_entry_t * dest, list_entry_t * src);\n#endif\n\n#define iterate_list_safe(head, cur, next, type) \\\n    for ( (cur) = (type) get_head_list(head) ; \\\n          (next) = (type) get_next_node(&(cur)->node), \\\n            (cur) != (type) (head); \\\n          (cur) = (next))\n\n/*---------------------------------------------------------------------------\n * IterateList()\n *\n *     Sets up ordinary traversal of a list. The current member must NOT\n *     be removed during iteration. Must be followed by a block of code\n *     containing the body of the iteration.\n *\n *     For example:\n *     BtSecurityRecord *record;\n *     IterateList(MEC(secList), record, BtSecurityRecord *) {\n *         [...do something with \"record\", but do not remove it!...]\n *     }\n *\n * Parameters:\n *     head - Head of list (address of ListEntry structure)\n *     cur - Variable to use for current list member\n *     type - Structure type of cur and next.\n */\n#define iterate_list(head, cur, type) \\\n    for ( (cur) = (type) get_head_list(&(head)) ; \\\n          (cur) != (type) &(head); \\\n          (cur) = (type) get_next_node(&(cur)->node) )\n\nenum _bt_status {\n    BT_STS_SUCCESS = 0,\n    BT_STS_FAILED = 1,\n    BT_STS_PENDING = 2,\n    BT_STS_BUSY = 11,\n    BT_STS_NO_RESOURCES = 12,\n    BT_STS_NOT_FOUND = 13,\n    BT_STS_DEVICE_NOT_FOUND = 14,\n    BT_STS_CONNECTION_FAILED = 15,\n    BT_STS_TIMEOUT = 16,\n    BT_STS_NO_CONNECTION = 17,\n    BT_STS_INVALID_PARM = 18,\n    BT_STS_IN_PROGRESS = 19,\n    BT_STS_RESTRICTED = 20,\n    BT_STS_INVALID_TYPE = 21,\n    BT_STS_HCI_INIT_ERR = 22,\n    BT_STS_NOT_SUPPORTED = 23,\n    BT_STS_IN_USE = 5,\n    BT_STS_SDP_CONT_STATE = 24,\n    BT_STS_CONTINUE =24,\n    BT_STS_CANCELLED = 25,\n\n    /* The last defined status code */\n    BT_STS_LAST_CODE = BT_STS_CANCELLED,\n};\n\ntypedef uint32_t bt_status_t;\n\ntypedef struct _evm_timer evm_timer_t;\ntypedef void (*evm_timer_notify) (evm_timer_t *);\n\nstruct _evm_timer {\n    list_entry_t node;          /* Used internally by the Event Manager */\n    void *context;              /* Context area for use by callers */\n    evm_timer_notify func;      /* Function to call when timer fires */\n\n    /* === Internal use only === */\n    TimeT time;                 /* Amount of time to wait */\n    TimeT startTime;            /* System time when the timer started */\n};\n\n/*---------------------------------------------------------------------------\n * btif_packet_flags type\n *\n *     This type is used by L2CAP and protocols that use directly L2CAP\n *     to manage the status of a particular BtPacket.\n */\ntypedef uint16_t btif_packet_flags;\n\n#define BTIF_BTP_FLAG_NONE       0x0000  /* No current flags */\n#define BTIF_BTP_FLAG_INUSE      0x0001  /* Used only by packet owner */\n#define BTIF_BTP_FLAG_LSYSTEM    0x0002  /* Used only by L2CAP */\n#define BTIF_BTP_FLAG_TAIL       0x0004  /* Used only by L2CAP Applications */\n#define BTIF_BTP_FLAG_RDEV       0x0008  /* Used only by L2CAP */\n#define BTIF_BTP_FLAG_FCS        0x0010  /* FCS field is valid, set only by L2CAP */\n#define BTIF_BTP_FLAG_NON_FLUSH  0x0020  /* Used by L2CAP, HCI or packet owner */\n#define BTIF_BTP_FLAG_ENHANCED   0x0040  /* Used only by L2CAP */\n#define BTIF_BTP_FLAG_SEGMENTED  0x0080  /* Used only by L2CAP */\n#define BTIF_BTP_FLAG_TXDONE     0x0100  /* Used only by L2CAP */\n#define BTIF_BTP_FLAG_USER       0x0200  /* Used only by L2CAP */\n#define BTIF_BTP_FLAG_IMMEDIATE  0x0400  /* Used only by L2CAP */\n\n/* End of btif_packet_flags */\n\n#define BTIF_BT_PACKET_HEADER_LEN 25\n\ntypedef struct {\n    list_entry_t node;\n    uint8_t *data;              /* Points to a buffer of user data.  */\n    uint16_t dataLen;           /* Indicates the length of \"data\" in bytes. */\n    uint16_t flags;             /* Must be initialized to BTIF_BTP_FLAG_NONE by\n                                 * applications running on top of L2CAP.\n                                 */\n\n#if   BTIF_L2CAP_PRIORITY == BTIF_ENABLED\n    BtPriority priority;\n#endif\n\n    /* Group: The following fields are for internal use only by the stack. */\n    void *ulpContext;\n    uint8_t *tail;\n    uint16_t tailLen;\n\n#ifdef  BTIF_XA_STATISTICS\n    U32 rfc_timer;\n    U32 hci_timer;\n    U32 l2cap_timer;\n\n#endif\n    uint16_t llpContext;\n    uint16_t remoteCid;\n\n#if  BTIF_L2CAP_NUM_ENHANCED_CHANNELS > 0\n    uint8_t segStart;\n    uint16_t segNum;\n    uint16_t segCount;\n    uint8_t fcs[2];\n\n#endif\n    uint8_t hciPackets;\n    uint8_t headerLen;\n    uint8_t header[BTIF_BT_PACKET_HEADER_LEN];\n} btif_bt_packet_t;\n\n/*---------------------------------------------------------------------------\n *            le_to_host16()\n *---------------------------------------------------------------------------\n *\n * Synopsis:  Retrieve a 16-bit number from the given buffer. The number\n *            is in Little-Endian format.\n *\n * Return:    16-bit number.\n */\nU16 le_to_host16(const U8 * ptr);\n\n/*---------------------------------------------------------------------------\n *            be_to_host16()\n *---------------------------------------------------------------------------\n *\n * Synopsis:  Retrieve a 16-bit number from the given buffer. The number\n *            is in Big-Endian format.\n *\n * Return:    16-bit number.\n */\nU16 be_to_host16(const U8* ptr);\n/*---------------------------------------------------------------------------\n *            be_to_host32()\n *---------------------------------------------------------------------------\n *\n * Synopsis:  Retrieve a 32-bit number from the given buffer. The number\n *            is in Big-Endian format.\n *\n * Return:    32-bit number.\n */\nU32 be_to_host32(const U8* ptr);\n/*---------------------------------------------------------------------------\n *            store_le16()\n *---------------------------------------------------------------------------\n *\n * Synopsis:  Store 16 bit value into a buffer in Little Endian format.\n *\n * Return:    void\n */\nvoid store_le16(U8 *buff, U16 le_value);\n\n/*---------------------------------------------------------------------------\n *            store_le32()\n *---------------------------------------------------------------------------\n *\n * Synopsis:  Store 32 bit value into a buffer in Little Endian format.\n *\n * Return:    void\n */\nvoid store_le32(U8 *buff, U32 le_value);\n\n/*---------------------------------------------------------------------------\n *            store_be16()\n *---------------------------------------------------------------------------\n *\n * Synopsis:  Store 16 bit value into a buffer in Big Endian format.\n *\n * Return:    void\n */\nvoid store_be16(U8 *buff, U16 be_value);\n\n/*---------------------------------------------------------------------------\n *            store_be32()\n *---------------------------------------------------------------------------\n *\n * Synopsis:  Store 32 bit value into a buffer in Big Endian format.\n *\n * Return:    void\n */\nvoid store_be32(U8 *buff, U32 be_value);\n\n#if defined(ENHANCED_STACK)\n/* Copy, compare bluetooth Address */\nstatic inline int ba_cmp(const bt_bdaddr_t *ba1, const bt_bdaddr_t *ba2)\n{\n    return memcmp(ba1, ba2, sizeof(bt_bdaddr_t ));\n}\n\nstatic inline void ba_cpy( bt_bdaddr_t *dst, const bt_bdaddr_t *src)\n{\n    memcpy(dst, src, sizeof(bt_bdaddr_t ));\n}\n\n#define BTIF_CTX_INIT(buff) \\\n    POSSIBLY_UNUSED unsigned int __offset = 2; \\\n    POSSIBLY_UNUSED unsigned char *__buff = buff;\n\n#define BTIF_CTX_STR_BUF(buff,len) \\\n    memcpy(__buff+__offset, buff, len); \\\n    __offset += len;\n\n#define BTIF_CTX_LDR_BUF(buff,len) \\\n    memcpy(buff, __buff+__offset, len); \\\n    __offset += len;\n\n#define BTIF_CTX_STR_VAL8(v) \\\n    __buff[__offset] = v&0xFF; \\\n    __offset += 1;\n\n#define BTIF_CTX_LDR_VAL8(v) \\\n    v = __buff[__offset]; \\\n    __offset += 1;\n\n#define BTIF_CTX_STR_VAL16(v) \\\n    __buff[__offset] = v&0xFF; \\\n    __buff[__offset+1] = (v>>8)&0xFF; \\\n    __offset += 2;\n\n#define BTIF_CTX_LDR_VAL16(v) \\\n    v = __buff[__offset]; \\\n    v |= __buff[__offset+1]<<8; \\\n    __offset += 2;\n\n#define BTIF_CTX_STR_VAL32(v) \\\n    __buff[__offset] = v&0xFF; \\\n    __buff[__offset+1] = (v>>8)&0xFF; \\\n    __buff[__offset+2] = (v>>16)&0xFF; \\\n    __buff[__offset+3] = (v>>24)&0xFF; \\\n    __offset += 4;\n\n#define BTIF_CTX_LDR_VAL32(v) \\\n    v = __buff[__offset]; \\\n    v |= __buff[__offset+1]<<8; \\\n    v |= __buff[__offset+2]<<16; \\\n    v |= __buff[__offset+3]<<24; \\\n    __offset += 4;\n\n#define BTIF_CTX_GET_BUF_CURR() __buff\n\n#define BTIF_CTX_GET_BUF_HEAD() __buff\n\n#define BTIF_CTX_GET_OFFSET() __offset\n\n#define BTIF_CTX_GET_DATA_LEN() (__buff[0] | __buff[1]<<8)\n\n#define BTIF_CTX_GET_TOTAL_LEN() (BTIF_CTX_GET_DATA_LEN()+2)\n\n#define BTIF_CTX_SAVE_UPDATE_DATA_LEN() \\\n   __buff[0] = (__offset-2)&0xFF; \\\n   __buff[1] = ((__offset-2)>>8)&0xFF;\n\nstruct btif_ctx_content {\n    unsigned char *buff;\n    unsigned int buff_len;\n};\n#endif /* ENHANCED_STACK */\n\n#ifdef __cplusplus\n}\n#endif                          /*  */\n#endif /*__BLUETOOTH_H__*/\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/bt_if.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_IF_H_\n#define __BT_IF_H_\n#include \n#include \"bluetooth.h\"\n#include \"btif_sys_config.h\"\n#include \"me_api.h\"\n\n//Application ID,indentify profle app context\n#define    BTIF_APP_INVALID_ID              (0x00000000u)\n#define    BTIF_APP_HFP_PROFILE_ID          (0x00000001u)\n#define    BTIF_APP_A2DP_PROFILE_ID         (0x00000002u)\n#define    BTIF_APP_AVRCP_PROFILE_ID        (0x00000004u)\n#define    BTIF_APP_MAP_PROFILE_ID          (0X00000008u)\n#define    BTIF_APP_HID_PROFILE_ID          (0X00000010u)\n\n#define    BTIF_APP_SPP_SERVER_START_ID     (0x00000020u)\n#define    BTIF_APP_SPP_SERVER_ID_1         (BTIF_APP_SPP_SERVER_START_ID)\n#define    BTIF_APP_SPP_SERVER_ID_2         (BTIF_APP_SPP_SERVER_START_ID << 1)\n#define    BTIF_APP_SPP_SERVER_ID_3         (BTIF_APP_SPP_SERVER_START_ID << 2)\n#define    BTIF_APP_SPP_SERVER_ID_4         (BTIF_APP_SPP_SERVER_START_ID << 3)\n#define    BTIF_APP_SPP_SERVER_ID_5         (BTIF_APP_SPP_SERVER_START_ID << 4)\n#define    BTIF_APP_SPP_SERVER_ID_6         (BTIF_APP_SPP_SERVER_START_ID << 5)\n#define    BTIF_APP_SPP_SERVER_ID_7         (BTIF_APP_SPP_SERVER_START_ID << 6)\n#define    BTIF_APP_SPP_SERVER_ID_8         (BTIF_APP_SPP_SERVER_START_ID << 7)\n#define    BTIF_APP_SPP_SERVER_ID_9         (BTIF_APP_SPP_SERVER_START_ID << 8)\n#define    BTIF_APP_SPP_SERVER_ID_10        (BTIF_APP_SPP_SERVER_START_ID << 9)\n#define    BTIF_APP_SPP_SERVER_END_ID       (BTIF_APP_SPP_SERVER_ID_10)\n#define    BTIF_APP_SPP_SERVER_OFFSET       (4)\n#define    BTIF_APP_SPP_SERVER_NUM          (10)\n#define    BTIF_APP_SPP_SERVER_MASK         (0x000003FF<\n#include \n#include \"plat_types.h\"\n\ntypedef uint8_t btif_event_type_t;\n\n#if defined(BTIF_HCI_HOST_FLOW_CONTROL) && defined(__IAG_BLE_INCLUDE__)\n#define BTIF_BTEVENT_CONNECT_CPMPLETE 1\n\n#endif /*  */\n\n#define BTIF_BTEVENT_INQUIRY_RESULT 1\n\n#define BTIF_BTEVENT_INQUIRY_COMPLETE 2\n\n#define BTIF_BTEVENT_INQUIRY_CANCELED 3\n\n#define BTIF_BTEVENT_LINK_CONNECT_IND 4\n\n#define BTIF_BTEVENT_SCO_CONNECT_IND 5\n\n#define BTIF_BTEVENT_LINK_DISCONNECT 6\n\n#define BTIF_BTEVENT_LINK_CONNECT_CNF 7\n\n#define BTIF_BTEVENT_LINK_CON_RESTRICT 8\n\n#define BTIF_BTEVENT_MODE_CHANGE 9\n\n#define BTIF_BTEVENT_ACCESSIBLE_CHANGE 10\n\n#define BTIF_BTEVENT_AUTHENTICATED 11\n\n#define BTIF_BTEVENT_ENCRYPTION_CHANGE 12\n\n#define BTIF_BTEVENT_SECURITY_CHANGE 13\n\n#define BTIF_BTEVENT_ROLE_CHANGE 14\n\n#define BTIF_BTEVENT_SCO_DISCONNECT 15\n\n#define BTIF_BTEVENT_SCO_CONNECT_CNF 16\n\n#define BTIF_BTEVENT_SIMPLE_PAIRING_COMPLETE 17\n\n#define BTIF_BTEVENT_REMOTE_FEATURES 18\n\n#define BTIF_BTEVENT_REM_HOST_FEATURES 19\n\n#define BTIF_BTEVENT_LINK_SUPERV_TIMEOUT_CHANGED 20\n\n#define BTIF_BTEVENT_SET_SNIFF_SUBRATING_PARMS_CNF 21\n\n#define BTIF_BTEVENT_SNIFF_SUBRATE_INFO 22\n\n#define BTIF_BTEVENT_SET_INQUIRY_MODE_CNF 23\n\n#define BTIF_BTEVENT_SET_INQ_TX_PWR_LVL_CNF 24\n\n#define BTIF_BTEVENT_SET_EXT_INQUIRY_RESP_CNF 25\n\n#define BTIF_BTEVENT_SET_ERR_DATA_REPORTING_CNF 26\n\n#define BTIF_BTEVENT_KEY_PRESSED 27\n\n#define BTIF_BTEVENT_QOS_SETUP_COMPLETE 28\n\n#ifdef __TWS_RECONNECT_USE_BLE__\n#define BTIF_BTEVENT_TWS_BLE_ADV_REPORT_EVENT 29\n#endif /*  */\n\n/**  an ACL connection has received an internal data transmit\n *  request while it is in hold, park or sniff mode. The data will still be\n *  passed to the radio in park and sniff modes. However, hold mode will\n *  block data transmit. It may be necessary to return the ACL to active\n *  mode to restore normal data transfer.\n */\n#define BTIF_BTEVENT_ACL_DATA_NOT_ACTIVE 99\n\n/*\nIndicate that an ACL connection is sending or receiving data\nwhile it is in active mode. Then, keep resetting the sniff timer.\n*/\n#define BTIF_BTEVENT_ACL_DATA_ACTIVE 98\n/** Indicates that the HCI failed to initialize.\n */\n#define BTIF_BTEVENT_HCI_INIT_ERROR 100\n\n#define BTIF_BTEVENT_HCI_INITIALIZED 101\n/** Indicates that a fatal error has occurred in the radio or the HCI transport.\n */\n#define BTIF_BTEVENT_HCI_FATAL_ERROR 102\n\n/** Indicates that the HCI has been deinitialized.\n */\n#define BTIF_BTEVENT_HCI_DEINITIALIZED 103\n\n/** Indicates that the HCI cannot be initialized.\n */\n#define BTIF_BTEVENT_HCI_FAILED 104\n\n#define BTIF_BTEVENT_HCI_COMMAND_SENT 105\n\n/** Indicates the name of a remote device or cancellation of a name request.\n */\n#define BTIF_BTEVENT_NAME_RESULT 30\n\n#define BTIF_BTEVENT_SCO_DATA_IND 31\n\n/** Outgoing SCO data has been sent and the packet is free for re-use by\n *  the application.\n */\n#define BTIF_BTEVENT_SCO_DATA_CNF 32\n\n#define BTIF_BTEVENT_LINK_CONNECT_REQ 33\n\n/** Incoming link accept complete.  */\n#define BTIF_BTEVENT_LINK_ACCEPT_RSP 34\n\n/** Incoming link reject complete. . */\n#define BTEVENT_LINK_REJECT_RSP 35\n\n#define BTIF_BTEVENT_COMMAND_COMPLETE 36\n\n#define BTIF_BTEVENT_SCO_CONNECT_REQ 37\n\n/** Set Audio/Voice settings complete.  */\n#define BTIF_BTEVENT_SCO_VSET_COMPLETE 38\n\n/** SCO link connection process started. */\n#define BTIF_BTEVENT_SCO_STARTED 39\n\n/** Select Device operation complete, \"p.select\" is valid. */\n#define BTIF_BTEVENT_DEVICE_SELECTED 40\n\n/** The eSCO connection has changed. \"p.scoConnect\" is valid.\n */\n#define BTIF_BTEVENT_SCO_CONN_CHNG 41\n\n/* Group: Security-related events. */\n\n/** Indicates access request is successful. \"p.secToken\" is valid. */\n#define BTIF_BTEVENT_ACCESS_APPROVED 50\n\n/** Indicates access request failed. \"p.secToken\" is valid. */\n#define BTIF_BTEVENT_ACCESS_DENIED 51\n\n/** Request authorization when \"errCode\" is BEC_NO_ERROR.\n *  \"p.remDev\" is valid.\n */\n#define BTIF_BTEVENT_AUTHORIZATION_REQ 52\n\n/** Request a Pin for pairing when \"errCode\" is BEC_NO_ERROR.\n *  \"p.pinReq\" is valid. If p.pinReq.pinLen is > 0 then SEC_SetPin()\n *  must be called in response to this event with a pin length >=\n *  p.pinReq.pinLen.\n */\n#define BTIF_BTEVENT_PIN_REQ 53\n\n/** Pairing operation is complete.\n */\n#define BTIF_BTEVENT_PAIRING_COMPLETE 54\n\n/** Authentication operation complete. \"p.remDev\" is valid. */\n#define BTIF_BTEVENT_AUTHENTICATE_CNF 55\n\n/** Encryption operation complete. \"p.remDev\" is valid. */\n#define BTIF_BTEVENT_ENCRYPT_COMPLETE 56\n\n/** Security mode 3 operation complete. \"p.secMode\" is valid. */\n#define BTIF_BTIF_BTEVENT_SECURITY3_COMPLETE 57\n\n/** A link key is returned. \"p.bdLinkKey\" is valid.  */\n#define BTIF_BTEVENT_RETURN_LINK_KEYS 58\n\n/** Out of Band data has been received from the host controller. */\n#define BTIF_BTEVENT_LOCAL_OOB_DATA 59\n\n/** Request a Pass Key for simple pairing when \"errCode\" is BEC_NO_ERROR. The\n *  application should call SEC_SetPassKey() to provide the passkey or reject\n *  the request, and optionally save the link key.\n */\n#define BTIF_BTEVENT_PASS_KEY_REQ 60\n\n/** Request a User Confirmation for simple pairing when \"errCode\" is\n *  BEC_NO_ERROR.\n */\n#define BTIF_BTEVENT_CONFIRM_NUMERIC_REQ 61\n\n#define BTIF_BTEVENT_DISPLAY_NUMERIC_IND 62\n\n#define BTIF_BTEVENT_CONN_PACKET_TYPE_CHNG 63\n\n#define BTIF_SDEVENT_QUERY_RSP 70\n\n#define BTIF_SDEVENT_QUERY_ERR 71\n\n#define BTIF_SDEVENT_QUERY_FAILED 72\n\n#define BTIF_BTEVENT_SELECT_DEVICE_REQ 80\n\n#define BTIF_BTEVENT_DEVICE_ADDED 81\n\n#define BTIF_BTEVENT_DEVICE_DELETED 82\n\n#define BTIF_BTEVENT_MAX_SLOT_CHANGED 83\n\n#define BTIF_BTEVENT_SNIFFER_CONTROL_DONE 84\n\n#define BTIF_BTEVENT_LINK_POLICY_CHANGED 85\n\n#define BTIF_BTEVENT_DEFAULT_LINK_POLICY_CHANGED 86\n\n#define BTIF_BTEVENT_BES_AUD_CONNECTED 200\n\n#define BTIF_BTEVENT_BES_AUD_DISCONNECTED 201\n\n#define BTIF_STACK_LINK_DISCONNECT_COMPLETE 220\n\ntypedef uint32_t btif_event_mask_t;\n\n#define BTIF_BEM_NO_EVENTS 0x00000000\n#define BTIF_BEM_INQUIRY_RESULT 0x00000001\n#define BTIF_BEM_INQUIRY_COMPLETE 0x00000002\n#define BTIF_BEM_INQUIRY_CANCELED 0x00000004\n#define BTIF_BEM_LINK_CONNECT_IND 0x00000008\n#define BTIF_BEM_SCO_CONNECT_IND 0x00000010\n#define BTIF_BEM_LINK_DISCONNECT 0x00000020\n#define BTIF_BEM_LINK_CONNECT_CNF 0x00000040\n#define BTIF_BEM_LINK_CON_RESTRICT 0x00000080\n#define BTIF_BEM_MODE_CHANGE 0x00000100\n#define BTIF_BEM_ACCESSIBLE_CHANGE 0x00000200\n#define BTIF_BEM_AUTHENTICATED 0x00000400\n#define BTIF_BEM_ENCRYPTION_CHANGE 0x00000800\n#define BTIF_BEM_SECURITY_CHANGE 0x00001000\n#define BTIF_BEM_ROLE_CHANGE 0x00002000\n#define BTIF_BEM_SCO_DISCONNECT 0x00004000\n#define BTIF_BEM_SCO_CONNECT_CNF 0x00008000\n#define BTIF_BEM_SIMPLE_PAIRING_COMPLETE 0x00010000\n#define BTIF_BEM_REMOTE_FEATURES 0x00020000\n#define BTIF_BEM_REM_HOST_FEATURES 0x00040000\n#define BTIF_BEM_LINK_SUPERV_TIMEOUT_CHANGED 0x00080000\n#define BTIF_BEM_SET_SNIFF_SUBR_PARMS 0x00100000\n#define BTIF_BEM_SNIFF_SUBRATE_INFO 0x00200000\n#define BTIF_BEM_SET_INQ_MODE 0x00400000\n#define BTIF_BEM_SET_INQ_RSP_TX_PWR 0x00800000\n#define BTIF_BEM_SET_EXT_INQ_RESP 0x01000000\n#define BTIF_BEM_SET_ERR_DATA_REP 0x02000000\n#define BTIF_BEM_KEY_PRESSED 0x04000000\n#define BTIF_BEM_CONN_PACKET_TYPE_CHNG 0x08000000\n#define BTIF_BEM_QOS_SETUP_COMPLETE 0x10000000\n#define BTIF_BEM_MAX_SLOT_CHANGED 0x20000000\n#define BTIF_BEM_SNIFFER_CONTROL_DONE 0x40000000\n#define BTIF_BEM_LINK_POLICY_CHANGED 0x80000000\n#define BTIF_BEM_ALL_EVENTS 0xffffffff\n\ntypedef uint8_t btif_error_code_t;\n\n#define BTIF_BEC_NO_ERROR 0x00\n#define BTIF_BEC_UNKNOWN_HCI_CMD 0x01\n#define BTIF_BEC_NO_CONNECTION 0x02\n#define BTIF_BEC_HARDWARE_FAILURE 0x03\n#define BTIF_BEC_PAGE_TIMEOUT 0x04\n#define BTIF_BEC_AUTHENTICATE_FAILURE 0x05\n#define BTIF_BEC_MISSING_KEY 0x06\n#define BTIF_BEC_MEMORY_FULL 0x07\n#define BTIF_BEC_CONNECTION_TIMEOUT 0x08\n#define BTIF_BEC_MAX_CONNECTIONS 0x09\n#define BTIF_BEC_MAX_SCO_CONNECTIONS 0x0a\n#define BTIF_BEC_ACL_ALREADY_EXISTS 0x0b\n#define BTIF_BEC_COMMAND_DISALLOWED 0x0c\n#define BTIF_BEC_LIMITED_RESOURCE 0x0d\n#define BTIF_BEC_SECURITY_ERROR 0x0e\n#define BTIF_BEC_PERSONAL_DEVICE 0x0f\n#define BTIF_BEC_HOST_TIMEOUT 0x10\n#define BTIF_BEC_UNSUPPORTED_FEATURE 0x11\n#define BTIF_BEC_INVALID_HCI_PARM 0x12\n#define BTIF_BEC_USER_TERMINATED 0x13\n#define BTIF_BEC_LOW_RESOURCES 0x14\n#define BTIF_BEC_POWER_OFF 0x15\n#define BTIF_BEC_LOCAL_TERMINATED 0x16\n#define BTIF_BEC_REPEATED_ATTEMPTS 0x17\n#define BTIF_BEC_PAIRING_NOT_ALLOWED 0x18\n#define BTIF_BEC_UNKNOWN_LMP_PDU 0x19\n#define BTIF_BEC_UNSUPPORTED_REMOTE 0x1a\n#define BTIF_BEC_SCO_OFFSET_REJECT 0x1b\n#define BTIF_BEC_SCO_INTERVAL_REJECT 0x1c\n#define BTIF_BEC_SCO_AIR_MODE_REJECT 0x1d\n#define BTIF_BEC_INVALID_LMP_PARM 0x1e\n#define BTIF_BEC_UNSPECIFIED_ERR 0x1f\n#define BTIF_BEC_UNSUPPORTED_LMP_PARM 0x20\n#define BTIF_BEC_ROLE_CHG_NOT_ALLOWED 0x21\n#define BTIF_BEC_LMP_RESPONSE_TIMEOUT 0x22\n#define BTIF_BEC_LMP_TRANS_COLLISION 0x23\n#define BTIF_BEC_LMP_PDU_NOT_ALLOWED 0x24\n#define BTIF_BEC_ENCRYP_MODE_NOT_ACC 0x25\n#define BTIF_BEC_UNIT_KEY_USED 0x26\n#define BTIF_BEC_QOS_NOT_SUPPORTED 0x27\n#define BTIF_BEC_INSTANT_PASSED 0x28\n#define BTIF_BEC_PAIR_UNITKEY_NO_SUPP 0x29\n#define BTIF_BEC_NOT_FOUND 0xf1\n#define BTIF_BEC_REQUEST_CANCELLED 0xf2\n\n#define BTIF_BEC_INVALID_SDP_PDU 0xd1\n#define BTIF_BEC_SDP_DISCONNECT 0xd2\n#define BTIF_BEC_SDP_NO_RESOURCES 0xd3\n#define BTIF_BEC_SDP_INTERNAL_ERR 0xd4\n\n#define BTIF_BEC_STORE_LINK_KEY_ERR 0xe0\n\ntypedef uint32_t btif_iac_t;\n\n#define BTIF_BT_IAC_GIAC 0x9E8B33 /* General/Unlimited Inquiry Access Code */\n#define BTIF_BT_IAC_LIAC 0x9E8B00 /* Limited Dedicated Inquiry Access Code */\n\ntypedef uint8_t btif_link_type_t;\n\n#define BTIF_BLT_SCO 0x00\n#define BTIF_BLT_ACL 0x01\n#define BTIF_BLT_ESCO 0x02\n\ntypedef U16 btif_acl_packet;\n\n#define BTIF_BAPT_NO_2_DH1 0x0002\n#define BTIF_BAPT_NO_3_DH1 0x0004\n#define BTIF_BAPT_DM1 0x0008\n#define BTIF_BAPT_DH1 0x0010\n#define BTIF_BAPT_NO_2_DH3 0x0100\n#define BTIF_BAPT_NO_3_DH3 0x0200\n#define BTIF_BAPT_DM3 0x0400\n#define BTIF_BAPT_DH3 0x0800\n#define BTIF_BAPT_NO_2_DH5 0x1000\n#define BTIF_BAPT_NO_3_DH5 0x2000\n#define BTIF_BAPT_DM5 0x4000\n#define BTIF_BAPT_DH5 0x8000\n\n#define BTIF_2M_PACKET                                                         \\\n  (BTIF_BAPT_DM1 | BTIF_BAPT_DH1 | BTIF_BAPT_NO_3_DH1 | BTIF_BAPT_NO_3_DH3 |   \\\n   BTIF_BAPT_DM3 | BTIF_BAPT_DH3 | BTIF_BAPT_NO_3_DH5)\n#define BTIF_3M_PACKET                                                         \\\n  (BTIF_BAPT_DM1 | BTIF_BAPT_DH1 | BTIF_BAPT_DM3 | BTIF_BAPT_DH3 |             \\\n   BTIF_BAPT_DM5 | BTIF_BAPT_DH5)\n#define BTIF_1_SLOT_PACKET                                                     \\\n  (BTIF_BAPT_DM1 | BTIF_BAPT_DH1 | BTIF_BAPT_NO_3_DH1 | BTIF_BAPT_NO_2_DH3 |   \\\n   BTIF_BAPT_NO_3_DH3 | BTIF_BAPT_NO_2_DH5 | BTIF_BAPT_NO_3_DH5)\n#define BTIF_3_SLOT_PACKET                                                     \\\n  (BTIF_BAPT_DM1 | BTIF_BAPT_NO_3_DH3 | BTIF_BAPT_NO_2_DH5 | BTIF_BAPT_NO_3_DH5)\n\ntypedef uint16_t btif_link_policy_t;\n\n#define BTIF_BLP_DISABLE_ALL 0x0000\n#define BTIF_BLP_MASTER_SLAVE_SWITCH 0x0001\n#define BTIF_BLP_HOLD_MODE 0x0002\n#define BTIF_BLP_SNIFF_MODE 0x0004\n#define BTIF_BLP_PARK_MODE 0x0008\n#define BTIF_BLP_SCATTER_MODE 0x0010\n\n/* Mask must be updated if new policy values are added */\n#define BLP_MASK 0xfff0         /* Disables ScatterNet bit */\n#define BLP_SCATTER_MASK 0xffe0 /* Enables ScatterNet bit */\n\ntypedef uint8_t btif_accessible_mode_t;\n\n#define BTIF_BAM_NOT_ACCESSIBLE 0x00 /* Non-discoverable or connectable */\n#define BTIF_BAM_GENERAL_ACCESSIBLE                                            \\\n  0x03 /* General discoverable and connectable */\n#define BTIF_BAM_LIMITED_ACCESSIBLE                                            \\\n  0x13 /* Limited discoverable and connectable */\n#define BTIF_BAM_CONNECTABLE_ONLY 0x02  /* Connectable but not discoverable */\n#define BTIF_BAM_DISCOVERABLE_ONLY 0x01 /* Discoverable but not connectable */\n#define BTIF_BT_DEFAULT_ACCESS_MODE_PAIR BTIF_BAM_GENERAL_ACCESSIBLE\n#define BTIF_BAM_INVALID_ACCESS_MODE 0xFF\n\n/* End of BtAccessibleMode */\n\ntypedef uint8_t btif_oob_data_present_t;\n\n#define BTIF_OOB_DATA_NOT_PRESENT 0 /* No Out of Band Data is present */\n#define BTIF_OOB_DATA_PRESENT 1     /* Out of Band Data is present    */\n\ntypedef uint8_t btif_auth_requirements_t;\n\n#define BTIF_MITM_PROTECT_NOT_REQUIRED                                         \\\n  0x00                                  /* No Man in the Middle protection  */\n#define BTIF_MITM_PROTECT_REQUIRED 0x01 /* Man in the Middle protection req */\n\ntypedef uint8_t btif_link_mode_t;\n\n#define BTIF_BLM_ACTIVE_MODE 0x00\n#define BTIF_BLM_HOLD_MODE 0x01\n#define BTIF_BLM_SNIFF_MODE 0x02\n#define BTIF_BLM_PARK_MODE 0x03\n#define BTIF_BLM_SCATTER_MODE 0x04\n\ntypedef uint8_t btif_link_key_type_t;\n\n#define BTIF_COMBINATION_KEY 0x00\n#define BTIF_LOCAL_UNIT_KEY 0x01\n#define BTIF_REMOTE_UNIT_KEY 0x02\n#define BTIF_DEBUG_COMBINATION_KEY 0x03\n#define BTIF_UNAUTH_COMBINATION_KEY 0x04\n#define BTIF_AUTH_COMBINATION_KEY 0x05\n#define BTIF_CHANGED_COMBINATION_KEY 0x06\n#define BTIF_IBRT_STORE_ADDR_ONLY 0x07\n\ntypedef uint8_t btif_connection_role_t;\n\n#define BTIF_BCR_MASTER 0x00\n#define BTIF_BCR_SLAVE 0x01\n#define BTIF_BCR_ANY 0x02\n#define BTIF_BCR_UNKNOWN 0x03\n#define BTIF_BCR_PSLAVE 0x04\n#define BTIF_BCR_PMASTER 0x05\n\ntypedef uint8_t btif_stack_state_t;\n\ntypedef enum {\n  HCI_CMD_COMPLETE_USER_IBRT_CMD = 0,\n  HCI_CMD_COMPLETE_USER_BLE = 1,\n  HCI_CMD_COMPLETE_USER_RESEVER_1 = 2,\n  HCI_CMD_COMPLETE_USER_RESEVER_2 = 3,\n  HCI_CMD_COMPLETE_USER_RESEVER_3 = 4,\n  HCI_CMD_COMPLETE_USER_RESEVER_4 = 5,\n\n  HCI_CMD_COMPLETE_USER_NUM,\n} HCI_CMD_COMPLETE_USER_E;\n\n/* The stack has completed initialization of the radio hardware. */\n#define BTIF_BTSS_NOT_INITIALIZED 0\n\n/* The stack is initialized. */\n#define BTIF_BTSS_INITIALIZED 1\n\n/* The stack has encountered an error while initializing the radio hardware. */\n#define BTIF_BTSS_INITIALIZE_ERR 2\n\n/* The stack is deinitializing. */\n#define BTIF_BTSS_DEINITIALIZE 3\n\n/* End of BtStackState */\ntypedef void btif_remote_device_t;\n\ntypedef void btif_BtDeviceContext;\n\n/* Forward declaration of the callback parameters */\ntypedef void btif_event_t;\n\ntypedef void (*btif_callback)(const void *);\ntypedef void (*ibrt_cmd_status_callback)(const uint8_t *para);\ntypedef void (*ibrt_cmd_complete_callback)(const uint8_t *para);\ntypedef uint8_t (*btif_callback_ext)(const void *);\ntypedef uint8_t (*btif_callback_ext2)(void);\ntypedef void (*btif_callback_ext3)(void);\n\ntypedef uint8_t btif_inquiry_mode_t;\n\n#define BTIF_INQ_MODE_NORMAL 0    /* Normal Inquiry Response format           */\n#define BTIF_INQ_MODE_RSSI 1      /* RSSI Inquiry Response format             */\n#define BTIF_INQ_INVALID_RSSI 127 /* RSSI Inquiry Response format */\n#define BTIF_INQ_MODE_EXTENDED 2  /* Extended or RSSI Inquiry Response format  \\\n                                   */\n\ntypedef uint8_t btif_rem_dev_state_t;\n\n#define BTIF_BDS_DISCONNECTED 0x00\n#define BTIF_BDS_OUT_CON 0x01   /* Starting an out going connection */\n#define BTIF_BDS_IN_CON 0x02    /* In process of incoming connection */\n#define BTIF_BDS_CONNECTED 0x03 /* Connected */\n#define BTIF_BDS_OUT_DISC 0x04  /* Starting an out going disconnect */\n#define BTIF_BDS_OUT_DISC2 0x05 /* Disconnect status received */\n#define BTIF_BDS_OUT_CON2                                                      \\\n  0x06 /* In SCO, used when connection request has                             \\\n          been sent */\n\ntypedef uint8_t btif_eir_data_type_t;\n\n#define BTIF_EIR_FLAGS 0x01\n#define BTIF_EIR_SRV_CLASS_16_PART 0x02\n#define BTIF_EIR_SRV_CLASS_16_WHOLE 0x03\n#define BTIF_EIR_SRV_CLASS_32_PART 0x04\n#define BTIF_EIR_SRV_CLASS_32_WHOLE 0x05\n#define BTIF_EIR_SRV_CLASS_128_PART 0x06\n#define BTIF_EIR_SRV_CLASS_128_WHOLE 0x07\n#define BTIF_EIR_REM_NAME_PART 0x08\n#define BTIF_EIR_REM_NAME_WHOLE 0x09\n#define BTIF_EIR_TX_POWER 0x0A\n#define BTIF_EIR_MAN_SPECIFIC 0xFF\n\n#define BTIF_BR_USE_FEC (0 << 0)\n#define BTIF_BR_NOT_USE_FEC (1 << 0)\n#define BTIF_BR_NO_PKT_PRFER_AVALB (0 << 1)\n#define BTIF_BR_USE_1_SLOT_PKT (1 << 1)\n#define BTIF_BR_USE_3_SLOT_PKT (2 << 1)\n#define BTIF_BR_USE_5_SLOT_PKT (3 << 1)\n#define BTIF_EDR_USE_DM1_PKT (0 << 3)\n#define BTIF_EDR_USE_2MB_PKT (1 << 3)\n#define BTIF_EDR_USE_3MB_PKT (2 << 3)\n#define BTIF_EDR_NO_PKT_PRFER_AVALB (0 << 5)\n#define BTIF_EDR_USE_1_SLOT_PTK (1 << 5)\n#define BTIF_EDR_USE_3_SLOT_PTK (2 << 5)\n#define BTIF_EDR_USE_5_SLOT_PTK (3 << 5)\n\n#define CONN_AUTO_ACCEPT_DISABLE 0x01\n\n#define CONN_AUTO_ACCEPT_ENABLE_WITH_MSS_DISABLE 0x02\n\n#define CONN_AUTO_ACCEPT_ENABLE_WITH_MSS_ENABLE 0x03\n/*---------------------------------------------------------------------------\n * btif_class_of_device_t type\n *\n *     Bit pattern representing the class of device along with the\n *     supported services. There can be more than one supported service.\n *     Service classes can be ORed together. The Device Class is composed\n *     of a major device class plus a minor device class. ORing together\n *     each service class plus one major device class plus one minor device\n *     class creates the class of device value. The minor device class is\n *     interpreted in the context of the major device class.\n */\n\ntypedef uint32_t btif_class_of_device_t;\n\n/* Group: Major Service Classes. Can be ORed together */\n#define BTIF_COD_LIMITED_DISCOVERABLE_MODE 0x00002000\n#define BTIF_COD_POSITIONING 0x00010000\n#define BTIF_COD_NETWORKING 0x00020000\n#define BTIF_COD_RENDERING 0x00040000\n#define BTIF_COD_CAPTURING 0x00080000\n#define BTIF_COD_OBJECT_TRANSFER 0x00100000\n#define BTIF_COD_AUDIO 0x00200000\n#define BTIF_COD_TELEPHONY 0x00400000\n#define BTIF_COD_INFORMATION 0x00800000\n\n/* Group: Major Device Classes (Select one) */\n#define BTIF_COD_MAJOR_MISCELLANEOUS 0x00000000\n#define BTIF_COD_MAJOR_COMPUTER 0x00000100\n#define BTIF_COD_MAJOR_PHONE 0x00000200\n#define BTIF_COD_MAJOR_LAN_ACCESS_POINT 0x00000300\n#define BTIF_COD_MAJOR_AUDIO 0x00000400\n#define BTIF_COD_MAJOR_PERIPHERAL 0x00000500\n#define BTIF_COD_MAJOR_IMAGING 0x00000600\n#define BTIF_COD_MAJOR_UNCLASSIFIED 0x00001F00\n\n/* Group: Minor Device Class - Computer Major class */\n#define BTIF_COD_MINOR_COMP_UNCLASSIFIED 0x00000000\n#define BTIF_COD_MINOR_COMP_DESKTOP 0x00000004\n#define BTIF_COD_MINOR_COMP_SERVER 0x00000008\n#define BTIF_COD_MINOR_COMP_LAPTOP 0x0000000C\n#define BTIF_COD_MINOR_COMP_HANDHELD 0x00000010\n#define BTIF_COD_MINOR_COMP_PALM 0x00000014\n#define BTIF_COD_MINOR_COMP_WEARABLE 0x00000018\n\n/* Group: Minor Device Class - Phone Major class */\n#define BTIF_COD_MINOR_PHONE_UNCLASSIFIED 0x00000000\n#define BTIF_COD_MINOR_PHONE_CELLULAR 0x00000004\n#define BTIF_COD_MINOR_PHONE_CORDLESS 0x00000008\n#define BTIF_COD_MINOR_PHONE_SMART 0x0000000C\n#define BTIF_COD_MINOR_PHONE_MODEM 0x00000010\n#define BTIF_COD_MINOR_PHONE_ISDN 0x00000014\n\n/* Group: Minor Device Class - LAN Access Point Major class */\n#define BTIF_COD_MINOR_LAN_0 0x00000000          /* fully available */\n#define BTIF_COD_MINOR_LAN_17 0x00000020         /* 1-17% utilized */\n#define BTIF_COD_MINOR_LAN_33 0x00000040         /* 17-33% utilized */\n#define BTIF_COD_MINOR_LAN_50 0x00000060         /* 33-50% utilized */\n#define BTIF_COD_MINOR_LAN_67 0x00000080         /* 50-67% utilized */\n#define BTIF_COD_MINOR_LAN_83 0x000000A0         /* 67-83% utilized */\n#define BTIF_COD_MINOR_LAN_99 0x000000C0         /* 83-99% utilized */\n#define BTIF_COD_MINOR_LAN_NO_SERVICE 0x000000E0 /* 100% utilized */\n\n/* Group: Minor Device Class - Audio Major class */\n#define BTIF_COD_MINOR_AUDIO_UNCLASSIFIED 0x00000000\n#define BTIF_COD_MINOR_AUDIO_HEADSET 0x00000004\n#define BTIF_COD_MINOR_AUDIO_HANDSFREE 0x00000008\n#define BTIF_COD_MINOR_AUDIO_MICROPHONE 0x00000010\n#define BTIF_COD_MINOR_AUDIO_LOUDSPEAKER 0x00000014\n#define BTIF_COD_MINOR_AUDIO_HEADPHONES 0x00000018\n#define BTIF_COD_MINOR_AUDIO_PORTABLEAUDIO 0x0000001C\n#define BTIF_COD_MINOR_AUDIO_CARAUDIO 0x00000020\n#define BTIF_COD_MINOR_AUDIO_SETTOPBOX 0x00000024\n#define BTIF_COD_MINOR_AUDIO_HIFIAUDIO 0x00000028\n#define BTIF_COD_MINOR_AUDIO_VCR 0x0000002C\n#define BTIF_COD_MINOR_AUDIO_VIDEOCAMERA 0x00000030\n#define BTIF_COD_MINOR_AUDIO_CAMCORDER 0x00000034\n#define BTIF_COD_MINOR_AUDIO_VIDEOMONITOR 0x00000038\n#define BTIF_COD_MINOR_AUDIO_VIDEOSPEAKER 0x0000003C\n#define BTIF_COD_MINOR_AUDIO_CONFERENCING 0x00000040\n#define BTIF_COD_MINOR_AUDIO_GAMING 0x00000048\n\n/* Group: Minor Device Class - Peripheral Major class */\n#define BTIF_COD_MINOR_PERIPH_KEYBOARD 0x00000040\n#define BTIF_COD_MINOR_PERIPH_POINTING 0x00000080\n#define BTIF_COD_MINOR_PERIPH_COMBOKEY 0x000000C0\n/* Group: Minor Device Class - ORed with Peripheral Minor Device class */\n#define BTIF_COD_MINOR_PERIPH_UNCLASSIFIED 0x00000000\n#define BTIF_COD_MINOR_PERIPH_JOYSTICK 0x00000004\n#define BTIF_COD_MINOR_PERIPH_GAMEPAD 0x00000008\n#define BTIF_COD_MINOR_PERIPH_REMOTECTRL 0x0000000C\n#define BTIF_COD_MINOR_PERIPH_SENSING 0x00000010\n#define BTIF_COD_MINOR_PERIPH_DIGITIZER 0x00000014\n#define BTIF_COD_MINOR_PERIPH_CARD_RDR 0x00000018\n\n/* Group: Minor Device Class - Imaging Major class */\n#define BTIF_COD_MINOR_IMAGE_UNCLASSIFIED 0x00000000\n#define BTIF_COD_MINOR_IMAGE_DISPLAY 0x00000010\n#define BTIF_COD_MINOR_IMAGE_CAMERA 0x00000020\n#define BTIF_COD_MINOR_IMAGE_SCANNER 0x00000040\n#define BTIF_COD_MINOR_IMAGE_PRINTER 0x00000080\n\n/* Group: Masks used to isolate the class of device components */\n#define BTIF_COD_SERVICE_MASK 0x00ffC000 /* Less LIAC bit */\n#define BTIF_COD_MAJOR_MASK 0x00001F00\n#define BTIF_COD_MINOR_MASK 0x000000FC\n#define BTIF_COD_LIMITED_DISC_MASK 0x00002000 /* LIAC bit */\n\n/* End of btif_class_of_device_t */\n\n// when report_format=0,data_format will set the interval(unit:slot)\n// when report_format=1,data_format will set the packet total num\n// when report_format=2,data_format has no meaning\n#define FLAG_RESET_DATA 2\n#define FLAG_START_DATA 1\n#define FLAG_GET_DATA 0\n\n#define REP_FORMAT_TIME 0\n#define REP_FORMAT_PACKET 1\n#define REP_FORMAT_STOP_GET 2\n\n// Vendor defined error code\n#define BTIF_EVT_ERROR_SCO_UNKNOWN (0xE8)\n#define BTIF_EVT_ERROR_ACL_UNKNOWN (0xE9)\n\ntypedef struct {\n  list_entry_t node;\n  uint8_t opType;\n} btif_operation_t;\n\ntypedef struct {\n\n  /* the mandatory sniff interval range for controllers is between 0x0006 and\n   * 0x0540. The value is expressed in 0.625 ms increments (0x0006 = 3.75 ms).\n   *\n   * The actual interval selected by the radio will be returned in\n   * a BTEVENT_MODE_CHANGE event.\n   */\n\n  uint16_t maxInterval;\n\n  /* Minimum acceptable interval between each consecutive sniff period.\n   * Must be an even number between 0x0002 and 0xFFFE, and be less than\n   * \"maxInterval\". Like maxInterval this value is expressed in\n   * 0.625 ms increments.\n   */\n  uint16_t minInterval;\n\n  /* The number of master-to-slave transmission slots during which\n   * a device should listen for traffic (sniff attempt).\n   * Expressed in 0.625 ms increments. May be between 0x0001 and 0x7FFF.\n   */\n  uint16_t attempt;\n\n  /* The amount of time before a sniff timeout occurs. Expressed in\n   * 1.25 ms increments. May be between 0x0000 and 0x7FFF, but the mandatory\n   * range for controllers is 0x0000 to 0x0028.\n   */\n  uint16_t timeout;\n} btif_sniff_info_t;\n\ntypedef struct {\n\n  /*  May be any number between 0x0000 and 0xFFFE.  The value is expressed in\n   * 0.625 ms increments.\n   */\n  uint16_t maxLatency;\n\n  /*  any number between 0x0000 and 0xFFFE.  The value is expressed in\n   * 0.625 ms increments.\n   */\n  uint16_t minRemoteTimeout;\n\n  /* Minimum base sniff subrate timeout that the local device may use.\n   * May be any number between 0x0000 and 0xFFFE.  The value is expressed in\n   * 0.625 ms increments.\n   */\n  uint16_t minLocalTimeout;\n} btif_sniff_subrate_parms_t;\n\ntypedef struct {\n  uint16_t inqInterval;  /* Inquiry scan interval */\n  uint16_t inqWindow;    /* Inquiry scan Window */\n  uint16_t pageInterval; /* Page scan interval */\n  uint16_t pageWindow;   /* Page scan window */\n} btif_access_mode_info_t;\n\ntypedef struct {\n  list_entry_t node;       /* For internal stack use only. */\n  btif_callback callback;  /* Pointer to callback function */\n  btif_event_mask_t emask; /* For internal stack use only. */\n} btif_handler;\n\n/* Internal types required for BtRemoteDevice structure */\ntypedef uint8_t btif_auth_state_t;\n\ntypedef uint8_t btif_encrypt_state_t;\n\ntypedef uint8_t btif_authorize_state_t;\n\ntypedef uint8_t btif_sec_access_state_t;\n\ntypedef uint8_t btif_link_rx_state_t;\n\ntypedef uint8_t btif_op_type_t;\n\ntypedef struct {\n\n  /* Reserved */\n  uint8_t flags;\n\n  /* Service Type: 0 = No Traffic, 1 = Best Effort, 2 Guaranteed */\n  uint8_t serviceType;\n\n  /* Token Rate in octets per second */\n  uint32_t tokenRate;\n\n  /* Peak Bandwidth in octets per second */\n  uint32_t peakBandwidth;\n\n  /* Latency in microseconds */\n  uint32_t latency;\n\n  /* Delay Variation in microseconds */\n  uint32_t delayVariation;\n} btif_qos_info_t;\n\ntypedef struct {\n  bt_bdaddr_t bdAddr;\n  BOOL trusted;\n  uint8_t linkKey[16];\n  btif_link_key_type_t keyType;\n\n  uint8_t pinLen;\n} btif_device_record_t;\n\ntypedef struct {\n  btif_operation_t op;\n  uint8_t len;\n  uint8_t data[31];\n} btif_write_adv_data_op_t;\n\ntypedef struct {\n  uint16_t interval_min;\n  uint16_t interval_max;\n  uint8_t adv_type;\n  uint8_t own_addr_type;\n  uint8_t peer_addr_type;\n  bt_bdaddr_t bd_addr;\n  uint8_t adv_chanmap;\n  uint8_t adv_filter_policy;\n} btif_adv_para_struct_t;\n\ntypedef struct {\n  btif_operation_t op;\n  btif_adv_para_struct_t adv_para;\n} btif_write_adv_para_op_t;\n\ntypedef struct {\n  btif_operation_t op;\n  uint8_t en;\n} btif_write_adv_en_op_t;\n\n#define BLE_ADV_REPORT_MAX_LEN 31\n\ntypedef struct {\n  uint8_t type;\n  uint8_t addr_type;\n  bt_bdaddr_t addr;\n  uint8_t data_len;\n  uint8_t data[BLE_ADV_REPORT_MAX_LEN];\n  int8_t rssi;\n} btif_ble_adv_report;\n\ntypedef struct {\n  uint8_t scan_type;\n  uint16_t scan_interval;\n  uint16_t scan_window;\n  uint8_t own_addr_type;\n  uint8_t scan_filter_policy;\n} btif_scan_para_struct_t;\n\ntypedef struct {\n  btif_operation_t op;\n  btif_scan_para_struct_t scan_para;\n} btif_write_scan_para_op_t;\n\ntypedef struct {\n  btif_operation_t op;\n  uint8_t scan_en;\n  uint32_t filter_duplicat;\n} btif_write_scan_en_op_t;\n\ntypedef struct {\n  bt_bdaddr_t bdAddr; /* Device Address */\n  uint8_t linkKey[16];\n} btif_dev_linkkey;\n\ntypedef struct {\n  U8 psRepMode;\n  U8 psMode;\n  U16 clockOffset;\n} bt_page_scanInfo_t;\n\ntypedef struct {\n  bt_bdaddr_t bdAddr;     /* Device Address */\n  bt_page_scanInfo_t psi; /* Page scan info used for connecting */\n  U8 psPeriodMode;\n  U32 classOfDevice;\n\n  /* RSSI in dBm (-127 to +20). Only valid when controller reports RSSI with\n   * in inquiry results (also see ME_SetInquiryMode). Otherwise it will be\n   * set to BT_INVALID_RSSI.\n   */\n  S8 rssi;\n\n  /* Extended Inquiry response.  Only valid when controller reports an\n   * extended inquiry (also see ME_SetInquiryMode).  Otherwise it will be\n   * set to all 0's.\n   */\n  U8 extInqResp[240];\n\n  /* Describes the format of the current inquiry result */\n  U8 inqMode;\n\n} bt_Inquiry_result_t;\n\ntypedef struct {\n  /* Event causing callback. Always valid.*/\n  uint8_t eType;\n\n  /* Error code. See BtEventType for guidance on whether errCode is valid. */\n  uint8_t errCode;\n\n  /* Pointer to handler. Only valid for events directed to BtHandlers. */\n  btif_handler *handler;\n\n  /* Parameters */\n  union {\n    btif_accessible_mode_t aMode; /* New access mode */\n    void *remDev;                 /* Pointer to remote device */\n    bt_bdaddr_t bdAddr;           /* Device Address */\n    void *meToken;                /* Me command token */\n    U8 pMode;                     /* Simple Pairing Mode */\n\n#ifdef __TWS_RECONNECT_USE_BLE__\n    struct {\n      U8 *data;\n      U16 len;\n    } twsBleReport;\n#endif\n    bt_Inquiry_result_t inqResult;\n\n    void *secToken; /* Security Token */\n    void *token;\n\n    /* Information for BTEVENT_PAIRING_COMPLETE */\n    struct {\n      void *remDev;\n      btif_link_key_type_t keyType;\n    } pairingInfo;\n\n    /* Information for BTEVENT_PIN_REQ */\n    struct {\n      void *remDev;\n\n      /* If > 0 then the pin length returned in SEC_SetPin must be >= pinLen */\n      U8 pinLen;\n    } pinReq;\n\n    /* Information for BTEVENT_SET_INQUIRY_MODE_CNF */\n    btif_inquiry_mode_t inqMode;\n\n    /* Information for BTEVENT_SET_INQ_TX_PWR_LVL_CNF */\n    S8 inqTxPwr;\n\n    /* Information for BTEVENT_REMOTE_FEATURES */\n    struct {\n      bt_bdaddr_t bdAddr;\n      U8 features[8];\n    } remoteFeatures;\n\n    /* Information for BTEVENT_REM_HOST_FEATURES */\n    struct {\n      bt_bdaddr_t bdAddr;\n      U8 features[8];\n    } remHostFeatures;\n\n    /* Information for BTEVENT_LINK_SUPERV_TIMEOUT_CHANGED */\n    struct {\n      void *remDev;\n      U16 timeout;\n    } linkSupervision;\n\n    /* Information for BTEVENT_MAX_SLOT_CHANGED */\n    struct {\n      U16 connHandle;\n      U8 maxSlot;\n    } maxSlotChanged;\n\n    /* Information for BTEVENT_QOS_SETUP_COMPLETE */\n    struct {\n\n      /* Reserved */\n      U8 flags;\n\n      /* Service Type: 0 = No Traffic, 1 = Best Effort, 2 Guaranteed */\n      U8 serviceType;\n\n      /* Token Rate in octets per second */\n      U32 tokenRate;\n\n      /* Peak Bandwidth in octets per second */\n      U32 peakBandwidth;\n\n      /* Latency in microseconds */\n      U32 latency;\n\n      /* Delay Variation in microseconds */\n      U32 delayVariation;\n    } qos;\n\n    /* Result for BTEVENT_SET_SNIFF_SUBRATING_PARMS_CNF */\n    btif_sniff_subrate_parms_t *sniffSubrateParms;\n\n    /* Information for BTEVENT_SNIFF_SUBRATE_INFO */\n    struct {\n      /* Pointer to the remote device */\n      void *remDev;\n\n      /* Maximum latency for data being transmitted from the local\n       * device to the remote device.\n       */\n      U16 maxTxLatency;\n\n      /* Maximum latency for data being received by the local\n       * device from the remote device.\n       */\n      U16 maxRxLatency;\n\n      /* The base sniff subrate timeout in baseband slots that the\n       * remote device shall use.\n       */\n      U16 minRemoteTimeout;\n\n      /* The base sniff subrate timeout in baseband slots that the\n       * local device will use.\n       */\n      U16 minLocalTimeout;\n    } sniffSubrateInfo;\n\n    /* Result for BTEVENT_LOCAL_OOB_DATA */\n    struct {\n      /* Simple Pairing Hash C from the local device */\n      U8 hashC[16];\n\n      /* Simple Pairing Randomizer R the local device */\n      U8 randR[16];\n    } oobData;\n\n    /* Information for BTEVENT_CONFIRM_NUMERIC_REQ, BTEVENT_PASS_KEY_REQ,\n     * and BTEVENT_DISPLAY_NUMERIC_IND\n     */\n    struct {\n      void *remDev; /* Pointer to the remote device */\n      U32 numeric;  /* Numeric value received from Secure\n                     * Simple Pairing (not valid for\n                     * BTEVENT_PASS_KEY_REQ\n                     */\n\n      U8 bondingMode; /* Bonding has been requested */\n    } userIoReq;\n\n    /* Result for BTEVENT_ENCRYPTION_CHANGE event. */\n    struct {\n      void *remDev;\n      U8 mode; /* New encryption mode (uses the\n                * BtEncryptMode type) */\n    } encrypt;\n\n    /* Result for BTEVENT_KEY_PRESSED */\n    struct {\n      bt_bdaddr_t bdAddr; /* Address of the device sending the keypress */\n      U8 parm;            /* The value of the keypress parameter */\n    } keyPress;\n\n    struct {\n      void *remDev;\n\n      /* If disconnection was successful, contains BEC_NO_ERROR.\n       * errCode will contain the disconnect reason.\n       *\n       * Unsuccessful disconnections will contain an error code\n       * as generated by the radio. In this case, errCode can be\n       * ignored.\n       */\n      btif_error_code_t status;\n    } disconnect;\n\n    /* Result for the BTEVENT_SCO_DATA_CNF event */\n    struct {\n      void *remDev;    /* Pointer to remote device */\n      void *scoCon;    /* SCO connection */\n      void *scoPacket; /* SCO Packet Handled */\n    } scoPacketHandled;\n\n    /* Result for the BTEVENT_SCO_CONNECT_CNF && BTEVENT_SCO_CONNECT_IND\n       events.\n     */\n    struct {\n      void *remDev;     /* Pointer to remote device */\n      U16 scoHandle;    /* SCO Connection handle for HCI */\n      void *scoCon;     /* SCO connection */\n      U8 scoLinkType;   /* SCO link type */\n      void *scoTxParms; /* Pointer to eSCO TX parameters */\n      void *scoRxParms; /* Pointer to eSCO RX parameters */\n    } scoConnect;\n\n    /* Result for the BTEVENT_SCO_DATA_IND event */\n    struct {\n      void *remDev;  /* Pointer to remote device */\n      U16 scoHandle; /* SCO Connection handle for HCI */\n      void *scoCon;  /* SCO connection. */\n      U8 len;        /* SCO data len */\n      U8 *ptr;       /* SCO data ptr */\n      U8 errFlags;   /* Erroneous Data Reporting */\n    } scoDataInd;\n\n    /* Result for the BTEVENT_SECURITY_CHANGE and\n     * BTEVENT_SECURITY3_COMPLETE events\n     */\n    struct {\n      U8 mode;      /* New security mode (uses the BtSecurityMode\n                     * type). */\n      BOOL encrypt; /* Indicate if encryption set or not */\n    } secMode;\n\n    /* Results for the BTEVENT_MODE_CHANGE event */\n    struct {\n      void *remDev;\n      uint8_t curMode;\n      U16 interval;\n    } modeChange;\n\n    /* Results for BTEVENT_ROLE_CHANGE */\n    struct {\n      void *remDev;\n      uint8_t newRole; /* New role */\n    } roleChange;\n\n    /* Results for BTEVENT_ACL_DATA_ACTIVE */\n    struct {\n      void *remDev;\n      uint16_t dataLen; /* ACL data length */\n    } aclDataActive;\n\n    /* Results for BTEVENT_ACL_DATA_NOT_ACTIVE */\n    struct {\n      void *remDev;\n      uint16_t dataLen; /* ACL data length */\n    } aclDataNotActive;\n    struct {\n      uint8_t status;\n      bt_bdaddr_t bdAddr; /* Address of the device sending the keypress */\n    } name_rsp;\n    struct {\n      btif_remote_device_t *conn;\n    } conn_req;\n  } edata;\n} event_t;\n\ntypedef struct {\n  event_t *evt;\n  btif_event_mask_t mask;\n} me_event_t;\ntypedef bool (*ibrt_io_capbility_callback)(void *bdaddr);\ntypedef void (*ibrt_disconnect_callback)(const void *event);\ntypedef void (*btif_cmgr_callback)(void *handler, uint8_t event,\n                                   bt_status_t status);\ntypedef void (*btif_global_handle)(const btif_event_t *Event);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif /*  */\nbt_status_t btif_me_get_tws_slave_mobile_rssi(uint16_t ConnHandle);\n\nvoid btif_me_set_sniffer_env(uint8_t sniffer_acitve, uint8_t sniffer_role,\n                             uint8_t *monitored_addr, uint8_t *sniffer_addr);\nBOOL btif_me_get_remote_device_initiator(btif_remote_device_t *rdev);\nuint16_t btif_me_get_remote_device_hci_handle(btif_remote_device_t *rdev);\nbtif_remote_device_t *btif_me_get_remote_device_by_handle(uint16_t hci_handle);\nuint16_t\nbtif_me_get_hci_handle_by_remote_dev(btif_remote_device_t *p_remote_dev);\nbtif_remote_device_t *btif_me_get_remote_device_by_bdaddr(bt_bdaddr_t *bdaddr);\nuint8_t btif_me_get_remote_device_op_optype(btif_remote_device_t *rdev);\nbtif_connection_role_t\nbtif_me_get_remote_device_role(btif_remote_device_t *rdev);\nvoid btif_me_set_remote_device_role(btif_remote_device_t *rdev, uint8_t role);\nBOOL *btif_me_get_remote_device_new_link_key(btif_remote_device_t *rdev);\nvoid *btif_me_get_remote_device_parms(btif_remote_device_t *rdev);\nbt_status_t btif_me_exchange_bt_addr(uint16_t connHandle);\nbool btif_me_role_switch_pending(uint16_t handle);\nbool btif_me_is_tws_role_switch_pending();\nbool btif_me_is_exechange_bt_addr_pending();\nbool is_btif_me_current_role_bcr_master(btif_remote_device_t *device);\nbt_status_t btif_me_inquiry(uint32_t lap, uint8_t len, uint8_t maxResp);\nbt_status_t btif_me_ble_add_dev_to_whitelist(uint8_t addr_type,\n                                             bt_bdaddr_t *addr);\nbt_status_t btif_me_ble_clear_whitelist(void);\nbt_status_t btif_me_ble_set_private_address(bt_bdaddr_t *addr);\nbt_status_t btif_me_ble_set_adv_data(uint8_t len, uint8_t *data);\nbt_status_t btif_me_ble_set_scan_rsp_data(U8 len, U8 *data);\nbt_status_t btif_me_ble_set_adv_parameters(btif_adv_para_struct_t *para);\nbt_status_t btif_me_ble_set_adv_en(uint8_t en);\nbt_status_t btif_me_ble_set_scan_parameter(btif_scan_para_struct_t *para);\nbt_status_t btif_me_ble_set_scan_en(uint8_t scan_en, uint8_t filter_duplicate);\nbt_status_t\nbtif_me_ble_receive_adv_report(void (*cb)(const btif_ble_adv_report *report));\nbt_status_t btif_sec_find_device_record(const bt_bdaddr_t *bdAddr,\n                                        btif_device_record_t *record);\n\nuint8_t btif_sec_set_io_capabilities(uint8_t ioCap);\nuint8_t btif_sec_set_authrequirements(uint8_t authRequirements);\nuint8_t btif_me_get_callback_event_type(const btif_event_t *event);\nuint8_t btif_me_get_callback_event_rem_dev_role(const btif_event_t *event);\nbt_bdaddr_t *\nbtif_me_get_callback_event_rem_dev_bd_addr(const btif_event_t *event);\nbt_bdaddr_t *btif_me_get_callback_event_disconnect_rem_dev_bd_addr(\n    const btif_event_t *event);\nbtif_remote_device_t *\nbtif_me_get_callback_event_disconnect_rem_dev(const btif_event_t *event);\nbtif_remote_device_t *\nbtif_me_get_callback_event_role_change_rem_dev(const btif_event_t *event);\nuint8_t btif_me_get_callback_event_disconnect_rem_dev_disc_reason_saved(\n    const btif_event_t *event);\nuint8_t btif_me_get_callback_event_disconnect_rem_dev_disc_reason(\n    const btif_event_t *event);\n\nuint8_t btif_me_get_pendCons(void);\n\nuint8_t btif_me_get_activeCons(void);\n\nvoid btif_me_set_pendCons(uint8_t pendCons);\n\nvoid btif_me_set_activeCons(uint8_t activeCons);\n\nbtif_remote_device_t *\nbtif_me_get_callback_event_rem_dev(const btif_event_t *event);\n\nbtif_BtDeviceContext *btif_me_get_bt_device_context(const btif_event_t *event);\n\nuint16_t btif_me_get_scohdl_by_connhdl(uint16_t conn_handle);\nbtif_remote_device_t *\nbtif_me_get_callback_event_sco_connect_rem_dev(const btif_event_t *event);\nuint8_t\nbtif_me_get_callback_event_role_change_new_role(const btif_event_t *event);\nbt_bdaddr_t *\nbtif_me_get_callback_event_inq_result_bd_addr(const btif_event_t *event);\nuint8_t *\nbtif_me_get_callback_event_inq_result_bd_addr_addr(const btif_event_t *event);\nuint8_t\nbtif_me_get_callback_event_inq_result_inq_mode(const btif_event_t *event);\nuint8_t btif_me_get_callback_event_rssi(const btif_event_t *event);\nuint8_t *\nbtif_me_get_callback_event_inq_result_ext_inq_resp(const btif_event_t *event);\nuint32_t\nbtif_me_get_callback_event_inq_result_classofdevice(const btif_event_t *event);\nuint8_t btif_me_get_callback_event_err_code(const btif_event_t *event);\nuint8_t btif_me_get_callback_event_a_mode(const btif_event_t *event);\nuint16_t btif_me_get_callback_event_max_slot_changed_connHandle(\n    const btif_event_t *event);\nuint8_t\nbtif_me_get_callback_event_max_slot_changed_max_slot(const btif_event_t *event);\nuint8_t\nbtif_me_get_callback_event_mode_change_curMode(const btif_event_t *event);\nuint16_t\nbtif_me_get_callback_event_mode_change_interval(const btif_event_t *event);\n\nuint16_t btif_me_get_callback_event_remote_dev_name(const btif_event_t *event,\n                                                    uint8_t **ppName);\n\nbt_status_t btif_me_get_remote_device_name(const bt_bdaddr_t *bdAddr,\n                                           btif_global_handle handler);\n\nuint8_t btif_me_get_ext_inq_data(uint8_t *eir, btif_eir_data_type_t type,\n                                 uint8_t *outBuffer, uint8_t Length);\nbt_status_t btif_me_cancel_inquiry(void);\nbt_status_t btif_sec_delete_device_record(const bt_bdaddr_t *bdAddr);\nbt_status_t btif_me_cancel_create_link(btif_handler *handler,\n                                       btif_remote_device_t *rdev);\nvoid btif_me_set_handler(void *handler, btif_callback cb);\nuint8_t btif_me_set_connection_role(uint8_t role);\nbt_status_t btif_me_disconnect_link(btif_handler *handler,\n                                    btif_remote_device_t *rdev);\nbt_status_t btif_me_set_link_policy(btif_remote_device_t *rdev,\n                                    btif_link_policy_t policy);\nbt_status_t btif_me_set_link_lowlayer_monitor(btif_remote_device_t *rdev,\n                                              uint8_t control_flag,\n                                              uint8_t report_format,\n                                              uint32_t data_format,\n                                              uint8_t report_unit);\nbt_status_t btif_me_set_connection_qos_info(btif_remote_device_t *rdev,\n                                            btif_qos_info_t *qosInfo);\nvoid btif_me_fake_tws_disconnect(uint16_t hci_handle, uint8_t reason);\nvoid btif_me_fake_mobile_disconnect(uint16_t hci_handle, uint8_t reason);\nvoid btif_me_fake_tws_connect(uint8_t status, uint16_t hci_handle,\n                              bt_bdaddr_t *bdAddr);\nvoid btif_me_reset_bt_controller(void);\nvoid btif_me_fake_mobile_connect(uint8_t status, uint16_t hci_handle,\n                                 bt_bdaddr_t *bdAddr);\n\nbt_status_t btif_me_set_lbrt_enable(uint16_t connHandle, uint8_t enable);\nbt_status_t btif_me_set_accessible_mode(btif_accessible_mode_t mode,\n                                        const btif_access_mode_info_t *info);\nbt_status_t btif_me_write_page_timeout(uint16_t timeout);\nbool btif_me_is_op_in_progress(btif_remote_device_t *rdev);\nbt_status_t btif_me_switch_role(btif_remote_device_t *rdev);\nbt_status_t btif_me_register_global_handler(void *handler);\nvoid *btif_me_register_accept_handler(void *handler);\nbt_status_t btif_me_set_event_mask(void *handler, btif_event_mask_t mask);\nvoid *btif_me_get_bt_handler(void);\nbt_status_t btif_me_set_bt_address(uint8_t *btAddr);\nbt_status_t btif_me_set_local_device_name(const U8 *name, U8 length);\nbt_status_t btif_me_set_ble_bd_address(uint8_t *btAddr);\nbt_status_t btif_sec_add_device_record(btif_device_record_t *record);\nbt_status_t btif_enum_device_record(U16 dev_id, btif_device_record_t *record);\nbt_bdaddr_t *btif_me_get_remote_device_bdaddr(btif_remote_device_t *rdev);\nbtif_rem_dev_state_t\nbtif_me_get_remote_device_state(btif_remote_device_t *rdev);\nbtif_link_mode_t btif_me_get_remote_device_mode(btif_remote_device_t *rdev);\nbtif_authorize_state_t\nbtif_me_get_remote_device_auth_state(btif_remote_device_t *rdev);\nbt_status_t btif_me_write_link_superv_timeout(uint16_t handle, uint16_t slots);\nbtif_link_mode_t btif_me_get_current_mode(btif_remote_device_t *rdev);\nbtif_connection_role_t btif_me_get_current_role(btif_remote_device_t *rdev);\n\nbt_status_t btif_me_start_sniff(btif_remote_device_t *rdev,\n                                btif_sniff_info_t *info);\n\nbt_status_t btif_me_stop_sniff(btif_remote_device_t *rdev);\n\nbt_status_t btif_me_accept_incoming_link(const btif_event_t *event,\n                                         btif_remote_device_t *rdev,\n                                         btif_connection_role_t role);\n\nbt_status_t btif_me_reject_incoming_link(btif_remote_device_t *rdev,\n                                         btif_error_code_t reason);\n\nbt_status_t btif_me_start_tws_role_switch(uint16_t slaveConnHandle,\n                                          uint16_t mobileConnHandle);\nbt_status_t btif_me_set_sco_tx_silence(uint16_t connHandle, uint8_t silence_on);\nvoid btif_me_increase_active_counts(void);\nbool btif_me_is_sending_data_to_peer_dev_pending(void);\nbtif_handler *btif_me_get_me_handler(void);\nbt_status_t\nbtif_me_force_disconnect_link_with_reason(btif_handler *handler,\n                                          btif_remote_device_t *rdev,\n                                          uint8_t reason, BOOL forceDisconnect);\n\nvoid btif_me_sec_set_io_cap_rsp_reject_ext(BOOL (*ext_fn)(void *));\nvoid btif_me_write_bt_sleep_enable(uint8_t sleep_en);\nvoid btif_me_write_bt_page_scan_type(uint8_t scan_type);\nvoid btif_me_write_bt_inquiry_scan_type(uint8_t scan_type);\n\n#if IS_USE_INTERNAL_ACL_DATA_PATH\nbt_status_t btif_me_send_data_to_peer_dev(uint16_t connHandle, uint8_t dataLen,\n                                          uint8_t *data);\n#endif /*  */\nvoid btif_bt_call_back(const btif_event_t *event);\nvoid btif_me_init_handler(btif_handler *handler);\nbt_status_t btif_me_dbg_sniffer_interface(uint16_t connHandle, uint8_t subCode);\nbt_status_t btif_me_switch_sco(uint16_t scohandle);\nuint8_t *btif_me_get_remote_device_version(btif_remote_device_t *rdev);\nvoid *btif_me_get_cmgr_handler();\nbt_status_t btif_bind_cmgr_handler(void *cmgr_handler, bt_bdaddr_t *bdAddr,\n                                   btif_cmgr_callback Callback);\nbt_status_t btif_create_acl_to_slave(void *cmgr_handler, bt_bdaddr_t *bdAddr,\n                                     btif_cmgr_callback Callback);\nbt_status_t btif_register_cmgr_handle(void *cmgr_handler,\n                                      btif_cmgr_callback Callback);\nvoid btif_me_update_cmgr_info(void *cmgr_handler,\n                              btif_BtDeviceContext *bt_device_context,\n                              btif_remote_device_t *rdev);\nvoid btif_me_unregister_globa_handler(btif_handler *handler);\nvoid btif_me_set_inquiry_mode(uint8_t mode);\nvoid btif_me_inquiry_result_setup(uint8_t *inquiry_buff, bool rssi,\n                                  bool extended_mode);\nbtif_remote_device_t *btif_me_enumerate_remote_devices(uint32_t devid);\n\nuint8_t btif_me_get_remote_sevice_encrypt_state(btif_remote_device_t *rdev);\n\nuint8_t\nbtif_me_get_remote_device_disc_reason_saved(btif_remote_device_t *device);\n\nuint8_t btif_me_get_remote_device_disc_reason(btif_remote_device_t *device);\n\nvoid btif_me_event_report(me_event_t *event);\nvoid btif_me_init_peer_headset_addr(uint8_t *p_remote_addr);\nbt_bdaddr_t *btif_me_get_peer_headset_addr(void);\nuint8_t btif_me_get_remote_device_link_mode(btif_remote_device_t *rdev);\nuint8_t btif_me_get_remote_device_bt_role(btif_remote_device_t *rdev);\nbt_status_t btif_me_change_packet_type(btif_remote_device_t *rdev,\n                                       btif_acl_packet packetTypes);\nvoid btif_me_cobuf_state_dump(void);\nvoid btif_me_hcibuff_state_dump(void);\nbt_status_t btif_me_read_controller_memory(uint32_t addr, uint32_t len,\n                                           uint8_t type);\nbt_status_t btif_me_write_controller_memory(uint32_t addr, uint32_t val,\n                                            uint8_t type);\nbt_status_t btif_me_qos_set_up(uint16_t conn_handle);\nvoid btif_set_sco_max_number(uint8_t num);\nuint8_t btif_get_sco_max_number();\n#if defined(IBRT)\n// ibrt fast ack toggle\n#define IBRT_FAST_ACK_OFF (0)\n#define IBRT_FAST_ACK_ON (1)\n// ibrt fast direction\n#define IBRT_FAST_ACK_TX 0\n#define IBRT_FAST_ACK_RX 1\n// ibrt slave flow control\n#define IBRT_SLAVE_FLOW_CTRL_ON IBRT_FAST_ACK_OFF\n#define IBRT_SLAVE_FLOW_CTRL_OFF IBRT_FAST_ACK_ON\n\nbt_status_t btif_me_enable_fastack(uint16_t conhdl, uint8_t direction,\n                                   uint8_t enable);\nbt_status_t btif_me_start_ibrt(U16 slaveConnHandle, U16 mobileConnHandle);\nbt_status_t btif_me_stop_ibrt(uint8_t enable, uint8_t reason);\nbt_status_t btif_me_suspend_ibrt(void);\nbt_status_t btif_me_ibrt_mode_init(bool enable);\nbt_status_t btif_me_ibrt_role_switch(uint8_t switch_op);\n\nvoid btif_me_set_ibrt_mobile_hci_handle(uint16_t hci_handle);\nuint16_t btif_me_get_ibrt_mobile_hci_handle(void);\n\nvoid btif_me_set_devctx_state(uint8_t ctx_idx, uint16_t state);\nvoid btif_me_set_devctx_link(uint8_t ctx_idx, btif_remote_device_t *rm_dev);\nbt_bdaddr_t *btif_me_get_devctx_btaddr(uint8_t ctx_idx);\nbtif_remote_device_t *btif_me_get_remote_device(uint8_t dev_index);\nvoid btif_me_free_tws_outgoing_dev(uint8_t *peer_tws_addr);\nbtif_remote_device_t *btif_me_get_devctx_remote_device(uint8_t ctx_idx);\nbtif_remote_device_t *btif_me_avdev_ctx_get_conn_remote_device(uint8_t dev_idx);\n\nuint32_t btif_me_save_record_ctx(uint8_t *ctx_buffer, uint8_t *addr);\nuint32_t btif_me_set_record_ctx(uint8_t *ctx_buffer, uint8_t *addr);\nuint32_t btif_me_save_me_ctx(uint8_t *ctx_buffer, uint16_t dev_id);\nuint32_t btif_me_set_me_ctx(uint8_t *ctx_buffer, uint16_t dev_id);\nuint8_t btif_me_get_mobile_avdev_index(uint16_t mobile_handle);\nuint8_t btif_me_get_free_avdev_index(void);\nuint32_t btif_me_save_avdev_ctx(uint8_t *ctx_buffer, uint16_t dev_id);\nuint32_t btif_me_set_avdev_ctx(uint8_t *ctx_buffer, uint16_t dev_id,\n                               uint8_t rm_devtbl_idx);\nvoid btif_me_conn_auto_accept_enable(uint8_t *condition);\nuint8_t btif_me_get_callback_event_encty_mode(const btif_event_t *event);\nbtif_dev_linkkey *btif_me_get_callback_link_key(const btif_event_t *event);\nvoid btif_me_register_ibrt_disconnect_callback(btif_callback cb);\nbt_status_t btif_me_set_tws_poll_interval(uint16_t conn_handle,\n                                          uint16_t poll_interval);\nbt_status_t btif_me_resume_ibrt(uint8_t enable);\nvoid btif_me_write_scan_activity_specific(uint16_t opcode,\n                                          uint16_t scan_interval,\n                                          uint16_t scan_window);\nvoid btif_me_write_dbg_sniffer(const uint8_t subcode,\n                               const uint16_t connhandle);\nvoid btif_me_ibrt_simu_hci_event_disallow(uint8_t opcode1, uint8_t opcode2);\nvoid btif_me_register_conn_req_pre_treatment_callback(btif_callback cb);\nvoid btif_me_register_cmd_status_callback(btif_callback cb);\nvoid btif_me_register_cmd_complete_callback(HCI_CMD_COMPLETE_USER_E index,\n                                            btif_callback cb);\nbt_status_t btif_me_ibrt_conn_connected(bt_bdaddr_t *bt_addr, uint16_t conhdl);\nbt_status_t btif_me_ibrt_conn_disconnected(bt_bdaddr_t *bt_addr,\n                                           uint16_t conhdl, uint8_t status,\n                                           uint8_t reason);\nvoid btif_me_register_ibrt_io_capbility_callback(ibrt_io_capbility_callback cb);\nbt_status_t btif_me_auth_req(uint16_t conn_handle);\nvoid btif_me_set_ecc_ibrt_data_test(uint8_t ecc_data_test_en,\n                                    uint8_t ecc_data_len, uint16_t ecc_count,\n                                    uint32_t data_pattern);\nvoid btif_me_send_prefer_rate(uint16_t connhdl, uint8_t rate);\n#endif\n#ifdef __cplusplus\n}\n#endif /*  */\n#endif /* __ME_H */\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/mei_api.h",
    "content": "/****************************************************************************\n *\n * File:\n *     $Id: mei_api.h 886 2009-02-24 14:40:12Z brentk $\n *     $Product: BES Blue SDK v3.x $\n *     $Revision: 886 $\n *\n * Description:\n *     Public types, defines, and prototypes for accessing the\n *     upper layer of the Management Entity.\n *\n * Copyright 1999-2005 Extended Systems, Inc.\n * Portions copyright BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * Unpublished Confidential Information of BES.\n * Do Not Disclose.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __MEI_API__H__\n#define __MEI_API__H__\n \n/*---------------------------------------------------------------------------\n *\n * Authenticate State of a Remote Device (BtAuthState). The typedef is in \n * mei_api.h\n */\n#define BTIF_BAS_NOT_AUTHENTICATED  0x00\n#define  BTIF_BAS_START_AUTHENTICATE 0x01\n#define  BTIF_BAS_WAITING_KEY_REQ    0x02\n#define  BTIF_BAS_SENDING_KEY        0x03\n#define  BTIF_BAS_WAITING_FOR_IO     0x04\n#define  BTIF_BAS_WAITING_FOR_IO_R   0x05\n#define  BTIF_BAS_WAITING_FOR_KEY    0x06\n#define  BTIF_BAS_WAITING_FOR_KEY_R  0x07\n#define  BTIF_BAS_AUTHENTICATED      0x08\n    \n#define BTIF_DBG_SNIFFER_SCO_STOP  0\n#define BTIF_DBG_SNIFFER_SCO_START  1\n#define BTIF_DBG_SNIFFER_ACL_SWOTCH  2\n#define BTIF_DBG_SEND_MAX_SLOT_REQ  3\n    \n#endif /* __ME_H */\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/obex_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __OBEX_API_H__\n#define __OBEX_API_H__\n\n#include \"bluetooth.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum {\n    BTIF_OBEX_SESSION_ROLE_CLIENT = 0,\n    BTIF_OBEX_SESSION_ROLE_SERVER, // 1\n} btif_obex_session_role_t;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __OBEX_API_H__ */\n\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/os_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __OS_API__H__\n#define __OS_API__H__\n\n#include \"bluetooth.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n    typedef void (*osapi_timer_notify) (void);\n\n    void osapi_stop_hardware(void);\n\n    void osapi_resume_hardware(void);\n\n    void osapi_memcopy(U8 * dest, const U8 * source, U32 numBytes);\n\n    void osapi_lock_stack(void);\n\n    void osapi_unlock_stack(void);\n\n    void osapi_notify_evm(void);\n\t\n\tuint8_t osapi_lock_is_exist(void);\n\n#ifdef __cplusplus\n}\n#endif\n#endif/*__OS_API__H__*/\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/rfcomm_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __RFCOMM_API_H__\n#define __RFCOMM_API_H__\n#include \"bluetooth.h\"\n#include \"me_api.h\"\n#include \"bt_if.h\"\n\ntypedef void *rf_channel_t;\n\ntypedef uint8_t rf_event_t;\n\n#define BTIF_RFEVENT_OPEN_IND              1\n#define BTIF_RFEVENT_OPEN                  2\n#define BTIF_RFEVENT_CLOSE_IND             3\n#define BTIF_RFEVENT_CLOSED                4\n#define BTIF_RFEVENT_DATA_IND              5\n#define BTIF_RFEVENT_PACKET_HANDLED        6\n#define BTIF_RFEVENT_TEST_CNF              7\n#define BTIF_RFEVENT_PORT_NEG_IND          8\n#define BTIF_RFEVENT_PORT_NEG_CNF          9\n#define BTIF_RFEVENT_PORT_STATUS_IND       10\n#define BTIF_RFEVENT_PORT_STATUS_CNF       11\n#define BTIF_RFEVENT_MODEM_STATUS_IND      12\n#define BTIF_RFEVENT_MODEM_STATUS_CNF      13\n#define BTIF_RFEVENT_LINE_STATUS_IND       14\n#define BTIF_RFEVENT_LINE_STATUS_CNF       15\n#define BTIF_RFEVENT_FLOW_OFF_IND          16\n#define BTIF_RFEVENT_FLOW_ON_IND           17\n#define BTIF_RFEVENT_RESOURCE_FREE         18\n#define BTIF_RFEVENT_FRAME_SIZE_CHANGED    19\n\ntypedef uint8_t rf_signals;\n#define RFCOMM_FLOW  0x02\n#define RFCOMM_RTC   0x04\n#define RFCOMM_RTR   0x08\n#define RFCOMM_IC    0x40\n#define RFCOMM_DV    0x80\n\n#define RFCOMM_DSR   0x04\n#define RFCOMM_CTS   0x08\n#define RFCOMM_RI    0x40\n#define RFCOMM_CD    0x80\n\n#define RFCOMM_DTR   0x04\n#define RFCOMM_RTS   0x08\n\ntypedef uint8_t rf_data_format;\n#define RFCOMM_DATA_BITS_5       0x00\n#define RFCOMM_DATA_BITS_6       0x02\n#define RFCOMM_DATA_BITS_7       0x01\n#define RFCOMM_DATA_BITS_8       0x03\n\n#define RFCOMM_STOP_BITS_1       0x00\n#define RFCOMM_STOP_BITS_1_5     0x04\n\n#define RFCOMM_PARITY_NONE       0x00\n#define RFCOMM_PARITY_ON         0x08\n\n#define RFCOMM_PARITY_TYPE_ODD        0x00\n#define RFCOMM_PARITY_TYPE_EVEN       0x20\n#define RFCOMM_PARITY_TYPE_MARK       0x10\n#define RFCOMM_PARITY_TYPE_SPACE      0x30\n\n#define RFCOMM_DATA_BITS_MASK    0x03\n#define RFCOMM_STOP_BITS_MASK    0x04\n#define RFCOMM_PARITY_MASK       0x08\n#define RFCOMM_PARITY_TYPE_MASK  0x30\n\ntypedef uint8_t rf_line_status;\n#define RFCOMM_LINE_ERROR  0x01\n#define RFCOMM_OVERRUN     0x02\n#define RFCOMM_PARITY      0x04\n#define RFCOMM_FRAMING     0x08\n\ntypedef uint8_t rf_signals;\n#define RFCOMM_FLOW  0x02\n#define RFCOMM_RTC   0x04       /* Set when sender is ready to communicate.     */\n#define RFCOMM_RTR   0x08       /* Set when sender is ready to receive data.    */\n#define RFCOMM_IC    0x40       /* Set when a call is incoming.        */\n#define RFCOMM_DV    0x80       /* Set when valid data is being sent.  */\n\n#define RFCOMM_DSR   0x04\n#define RFCOMM_CTS   0x08\n#define RFCOMM_RI    0x40\n#define RFCOMM_CD    0x80\n\n#define RFCOMM_DTR   0x04\n#define RFCOMM_RTS   0x08\n\nstruct rf_modem_status\n{\n    rf_signals signals;\n    uint8_t break_len;\n};\n\ntypedef uint16_t rf_port_settings_mask;\n\n#define RFCOMM_PARM_BAUDRATE     0x0001\n#define RFCOMM_PARM_DATABITS     0x0002\n#define RFCOMM_PARM_STOPBITS     0x0004\n#define RFCOMM_PARM_PARITY       0x0008\n#define RFCOMM_PARM_PARITY_TYPE  0x0010\n#define RFCOMM_PARM_DATA_FORMAT  (RFCOMM_PARM_DATABITS | RFCOMM_PARM_STOPBITS | \\\n                              RFCOMM_PARM_PARITY | RFCOMM_PARM_PARITY_TYPE)\n#define RFCOMM_PARM_XON_CHAR     0x0020\n#define RFCOMM_PARM_XOFF_CHAR    0x0040\n\n#define RFCOMM_PARM_XON_INPUT    0x0100\n#define RFCOMM_PARM_XON_OUTPUT   0x0200\n#define RFCOMM_PARM_RTR_INPUT    0x0400\n#define RFCOMM_PARM_RTR_OUTPUT   0x0800\n#define RFCOMM_PARM_RTC_INPUT    0x1000\n#define RFCOMM_PARM_RTC_OUTPUT   0x2000\n\n#define RFCOMM_PARM_FLOW_RTS_CTS  (RFCOMM_PARM_RTR_INPUT | RFCOMM_PARM_RTR_OUTPUT)\n#define RFCOMM_PARM_FLOW_DTR_DSR  (RFCOMM_PARM_RTC_INPUT | RFCOMM_PARM_RTC_OUTPUT)\n#define RFCOMM_PARM_FLOW_XON_XOFF (RFCOMM_PARM_XON_INPUT | RFCOMM_PARM_XON_OUTPUT)\n\ntypedef uint8_t rf_flow_control;\n\n#define RFCOMM_FLOW_CTRL_NONE    0x00\n#define RFCOMM_XON_ON_INPUT      0x01\n#define RFCOMM_XON_ON_OUTPUT     0x02\n#define RFCOMM_RTR_ON_INPUT      0x04\n#define RFCOMM_RTR_ON_OUTPUT     0x08\n#define RFCOMM_RTC_ON_INPUT      0x10\n#define RFCOMM_RTC_ON_OUTPUT     0x20\n\n#define RFCOMM_FLOW_RTS_CTS      (RFCOMM_RTR_ON_INPUT | RFCOMM_RTR_ON_OUTPUT)\n#define RFCOMM_FLOW_DTR_DSR      (RFCOMM_RTC_ON_INPUT | RFCOMM_RTC_ON_OUTPUT)\n#define RFCOMM_FLOW_XON_XOFF     (RFCOMM_XON_ON_INPUT | RFCOMM_XON_ON_OUTPUT)\n\ntypedef uint8_t rf_data_format;\n#define RFCOMM_DATA_BITS_5       0x00\n#define RFCOMM_DATA_BITS_6       0x02\n#define RFCOMM_DATA_BITS_7       0x01\n#define RFCOMM_DATA_BITS_8       0x03\n#define RFCOMM_STOP_BITS_1       0x00\n#define RFCOMM_STOP_BITS_1_5     0x04\n#define RFCOMM_PARITY_NONE       0x00\n#define RFCOMM_PARITY_ON         0x08\n#define RFCOMM_PARITY_TYPE_ODD   0x00\n#define RFCOMM_PARITY_TYPE_EVEN  0x20\n#define RFCOMM_PARITY_TYPE_MARK  0x10\n#define RFCOMM_PARITY_TYPE_SPACE 0x30\n#define RFCOMM_DATA_BITS_MASK    0x03\n#define RFCOMM_STOP_BITS_MASK    0x04\n#define RFCOMM_PARITY_MASK       0x08\n#define RFCOMM_PARITY_TYPE_MASK  0x30\n\ntypedef uint8_t rf_baud_rate;\n\n#define RFCOMM_BAUD_2400         0x00\n#define RFCOMM_BAUD_4800         0x01\n#define RFCOMM_BAUD_7200         0x02\n#define RFCOMM_BAUD_9600         0x03\n#define RFCOMM_BAUD_19200        0x04\n#define RFCOMM_BAUD_38400        0x05\n#define RFCOMM_BAUD_57600        0x06\n#define RFCOMM_BAUD_115200       0x07\n#define RFCOMM_BAUD_230400       0x08\n\ntypedef struct _rf_port_settings\n{\n    rf_baud_rate baudRate;\n    rf_data_format dataFormat;\n    rf_flow_control flowControl;\n    uint8_t xonChar;\n    uint8_t xoffChar;\n    rf_port_settings_mask parmMask;\n} rf_port_settings;\n\nstruct rf_callback_prams\n{\n    rf_event_t event;\n    int status;\n    uint16_t data_len;\n    union\n    {\n        btif_bt_packet_t *packet;\n        U8 *data;\n        struct rf_modem_status *modem_status;\n        rf_line_status *line_status;\n        rf_port_settings *port_settings;\n        btif_remote_device_t *remDev;\n    } ptrs;\n};\n\ntypedef void (*rf_callback_func) (rf_channel_t chan, struct rf_callback_prams * parms);\n\nstruct rf_chan_info\n{\n    rf_callback_func callback;\n    uint16_t max_frame_size;\n    uint8_t priority;\n    void *priv;\n};\n\nstruct rf_service\n{\n    uint8_t serviceId;\n};\n\nstruct _rf_channel\n{\n    rf_callback_func callback;\n    int8_t server_channel;\n    uint32_t rfcomm_handle;\n    uint32_t app_id;\n    void *priv;\n    list_entry_t tx_queue;\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif                          /*  */\nvoid btif_rfcomm_ctx_input_init(void *para);\nrf_channel_t btif_rf_create_channel(void);\n\nvoid btif_rf_free_channel(rf_channel_t chan_h);\n\nbt_status_t btif_rf_register_server_channel(rf_channel_t chan_h,\n        struct rf_service *service, uint8_t credit);\nbt_status_t btif_rf_deregister_server_channel(rf_channel_t chan_h, struct rf_service *service);\n\nbt_status_t btif_rf_deregister_service(struct rf_service *service);\n\nuint16_t btif_rf_frame_size(rf_channel_t chan_h);\n\nbt_status_t btif_rf_respond_channel(rf_channel_t chan_h, bool accept);\n\nbt_status_t btif_rf_accept_channel(rf_channel_t chan_h);\n#define btif_rf_accept_channel(c) btif_rf_respond_channel(c, true)\n\nbt_status_t btif_rf_reject_channel(rf_channel_t chan_h);\n#define btif_rf_reject_channel(c) btif_rf_respond_channel(c, false)\n\n#if BTIF_RF_SEND_CONTROL == BTIF_ENABLED\nbt_status_t btif_rf_send_port_settings(rf_channel_t chan_h, rf_port_settings * PortSettings);\n\nbt_status_t btif_rf_request_port_settings(rf_channel_t chan_h, rf_port_settings * portSettings);\n#define btif_rf_request_port_settings(c, p) btif_rf_send_port_settings(c, p)\n\nbt_status_t btif_rf_request_port_status(rf_channel_t chan_h);\n#define btif_rf_request_port_status(c) btif_rf_send_port_settings(c, NULL)\n\nbt_status_t btif_rf_set_modem_status(rf_channel_t chan_h,\n                                     struct rf_modem_status *modem_status);\n#endif                          /*BTIF_RF_SEND_CONTROL == BTIF_ENABLED */\n\nbt_status_t btif_rf_open_client_channel(btif_remote_device_t * RemDev,\n                                        uint8_t server_id, rf_channel_t chan_h, uint8_t credit);\n\nbt_status_t btif_rf_close_channel(rf_channel_t chan_h);\n\nbt_status_t btif_rf_send_data(rf_channel_t chan_h, btif_bt_packet_t * Packet);\n\nbt_status_t btif_rf_advance_credit(rf_channel_t chan_h, uint8_t credit);\n\nbool btif_rf_credit_flow_enabled(rf_channel_t chan_h);\n\nbt_status_t btif_rf_setup_channel(rf_channel_t chan_h, struct rf_chan_info *info);\n\nvoid *btif_rf_get_channel_priv(rf_channel_t chan);\nuint32_t btif_rf_get_app_id(rf_channel_t chan_h);\n\nuint32_t btif_rf_get_rfcomm_handle(rf_channel_t chan_h);\nbt_status_t btif_rf_set_rfcomm_handle(rf_channel_t chan_h, uint32_t rfcomm_handle);\nuint8_t btif_rf_get_server_channel(rf_channel_t chan_h);\n\nuint16_t btif_rf_max_frame_size_configure(void);\nvoid btif_rf_set_app_id(rf_channel_t chan_h,uint32_t app_id);\n\n#if defined(IBRT)\n#if defined(ENHANCED_STACK)\nuint32_t btif_save_rfc_ctx(uint8_t *ctx_buffer, uint8_t MuxId);\nuint32_t btif_set_rfc_ctx(uint8_t* ctx_buffer, uint16_t MuxId, uint8_t rm_devtbl_idx);\nuint32_t btif_rfc_get_session_l2c_handle(uint16_t hci_handle);\nbool btif_rfc_is_dlci_channel_connected(uint32_t session_l2c_handle,uint32_t app_id);\n#else\nuint32_t btif_save_rfc_ctx(uint8_t *ctx_buffer, uint8_t MuxId);\nuint32_t btif_set_rfc_ctx(uint8_t* ctx_buffer, uint16_t MuxId, uint8_t rm_devtbl_idx);\nuint32_t btif_save_rfcomm_channel_ctx(uint8_t *ctx_buffer, uint8_t MuxId, uint32_t app_id);\nuint32_t btif_set_rfcomm_channel_ctx(uint8_t *ctx_buffer, uint8_t MuxId, uint32_t app_id);\n#endif\nbool btif_rf_is_rfcomm_channel_connected(uint8_t mux_id,uint32_t app_id);\nbtif_remote_device_t*  btif_rfc_get_mux_remote_device(uint8_t mux_idx);\nuint8_t btif_rfc_get_mux_index(uint16_t hci_handle);\nuint8_t btif_rfc_get_mux_state(uint8_t mux_idx);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n#endif /*__RFCOMM_API_H__*/\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/sco_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _SCO_API_H\n#define _SCO_API_H\n#include \"btlib_type.h\"\n\n/* notify upper layer */\nenum sco_event_enum {\n    SCO_OPENED,\n    SCO_CLOSED\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n    int8 sco_register_link(struct bdaddr_t *bdaddr,\n                           void (*sco_notify_callback) (enum sco_event_enum event, void *pdata), void *link);\n    int8 sco_open_link(struct bdaddr_t *bdaddr,\n                       void (*sco_notify_callback) (enum sco_event_enum event, void *pdata, void *link), void *link);\n    int8 sco_close_link(struct bdaddr_t *bdaddr1, uint8 reason, void *link);\n    int8 sco_unregister_link(struct bdaddr_t *bdaddr);\n    int8 sco_init(void);\n    int8 sco_exit(void);\n    void sco_conn_opened_ind(struct bdaddr_t *bdaddr_remote);\n    void sco_conn_closed_ind(struct bdaddr_t *bdaddr_remote);\n#ifdef __cplusplus\n    extern \"C\" {\n#endif\n\n#endif                          /**/\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/sdp_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef\t__SDP_API_H__\n#define\t__SDP_API_H__\n\n#include \"me_api.h\"\n\n#define BTIF_SDP_RECORD_NUM_MAX (10)\n#define BTIF_SDP_QUERY_TOKEN_NUM_MAX (4)\n\ntypedef void btif_sdp_record_t;\n\ntypedef uint8_t sdp_query_type;\n#define BTIF_BSQT_ATTRIB_REQ                 0x04\n#define BTIF_BSQT_SERVICE_SEARCH_ATTRIB_REQ  0x06\ntypedef uint8_t sdp_query_resp;\n#define BTIF_BSQR_ERROR_RESP                 0x01\n#define BTIF_BSQR_SERVICE_SEARCH_RESP        0x03\n#define BTIF_BSQR_ATTRIB_RESP                0x05\n#define BTIF_BSQR_SERVICE_SEARCH_ATTRIB_RESP 0x07\n\n#if SDP_SERVER_SUPPORT == XA_ENABLED\n#define BTIF_SDP_SERVER_ATTRIBS 3\n#define BTIF_SDP_SERVER_TX_SIZE (SDP_SERVER_SEND_SIZE - 5)\n#define BTIF_SDP_SERV_OWN_HANDLE     0x00000000\n#define BTIF_SDP_SERV_FIRST_HANDLE   0x00010000\n#define BTIF_SDP_SERV_BOGUS_HANDLE   0xffffffff\n#define BTIF_SDP_ZERO_SERVICE_DATABASE_STATE_SIZE 5\n#endif /* SDP_SERVER_SUPPORT == XA_ENABLED */\n\ntypedef uint16_t sdp_service_class_uuid;\n#define BTIF_SC_SERVICE_DISCOVERY_SERVER             0x1000\n#define BTIF_SC_BROWSE_GROUP_DESC                    0x1001\n#define BTIF_SC_PUBLIC_BROWSE_GROUP                  0x1002\n#define BTIF_SC_SERIAL_PORT                          0x1101\n#define BTIF_SC_LAN_ACCESS_PPP                       0x1102\n#define BTIF_SC_DIALUP_NETWORKING                    0x1103\n#define BTIF_SC_IRMC_SYNC                            0x1104\n#define BTIF_SC_OBEX_OBJECT_PUSH                     0x1105\n#define BTIF_SC_OBEX_FILE_TRANSFER                   0x1106\n#define BTIF_SC_IRMC_SYNC_COMMAND                    0x1107\n#define BTIF_SC_HEADSET                              0x1108\n#define BTIF_SC_CORDLESS_TELEPHONY                   0x1109\n#define BTIF_SC_AUDIO_SOURCE                         0x110A\n#define BTIF_SC_AUDIO_SINK                           0x110B\n#define BTIF_SC_AV_REMOTE_CONTROL_TARGET             0x110C\n#define BTIF_SC_AUDIO_DISTRIBUTION                   0x110D\n#define BTIF_SC_AV_REMOTE_CONTROL                    0x110E\n#define BTIF_SC_VIDEO_CONFERENCING                   0x110F\n#define BTIF_SC_INTERCOM                             0x1110\n#define BTIF_SC_FAX                                  0x1111\n#define BTIF_SC_HEADSET_AUDIO_GATEWAY                0x1112\n#define BTIF_SC_WAP                                  0x1113\n#define BTIF_SC_WAP_CLIENT                           0x1114\n#define BTIF_SC_PANU                                 0x1115\n#define BTIF_SC_NAP                                  0x1116\n#define BTIF_SC_GN                                   0x1117\n#define BTIF_SC_DIRECT_PRINTING                      0x1118\n#define BTIF_SC_REFERENCE_PRINTING                   0x1119\n#define BTIF_SC_IMAGING                              0x111A\n#define BTIF_SC_IMAGING_RESPONDER                    0x111B\n#define BTIF_SC_IMAGING_AUTOMATIC_ARCHIVE            0x111C\n#define BTIF_SC_IMAGING_REFERENCED_OBJECTS           0x111D\n#define BTIF_SC_HANDSFREE                            0x111E\n#define BTIF_SC_HANDSFREE_AUDIO_GATEWAY              0x111F\n#define BTIF_SC_DIRECT_PRINTING_REF_OBJECTS          0x1120\n#define BTIF_SC_REFLECTED_UI                         0x1121\n#define BTIF_SC_BASIC_PRINTING                       0x1122\n#define BTIF_SC_PRINTING_STATUS                      0x1123\n#define BTIF_SC_HUMAN_INTERFACE_DEVICE               0x1124\n#define BTIF_SC_HCR                                  0x1125\n#define BTIF_SC_HCR_PRINT                            0x1126\n#define BTIF_SC_HCR_SCAN                             0x1127\n#define BTIF_SC_ISDN                                 0x1128\n#define BTIF_SC_VIDEO_CONFERENCING_GW                0x1129\n#define BTIF_SC_UDI_MT                               0x112A\n#define BTIF_SC_UDI_TA                               0x112B\n#define BTIF_SC_AUDIO_VIDEO                          0x112C\n#define BTIF_SC_SIM_ACCESS                           0x112D\n#define BTIF_SC_PBAP_CLIENT                          0x112E\n#define BTIF_SC_PBAP_SERVER                          0x112F\n#define BTIF_SC_PBAP_PROFILE                         0x1130\n#define BTIF_SC_MAP_SERVER                           0x1132\n#define BTIF_SC_MAP_NOTIFY_SERVER                    0x1133\n#define BTIF_SC_MAP_PROFILE                          0x1134\n#define BTIF_SC_PNP_INFO                             0x1200\n#define BTIF_SC_GENERIC_NETWORKING                   0x1201\n#define BTIF_SC_GENERIC_FILE_TRANSFER                0x1202\n#define BTIF_SC_GENERIC_AUDIO                        0x1203\n#define BTIF_SC_GENERIC_TELEPHONY                    0x1204\n#define BTIF_SC_UPNP_SERVICE                         0x1205\n#define BTIF_SC_UPNP_IP_SERVICE                      0x1206\n#define BTIF_SC_ESDP_UPNP_IP_PAN                     0x1300\n#define BTIF_SC_ESDP_UPNP_IP_LAP                     0x1301\n#define BTIF_SC_ESDP_UPNP_L2CAP                      0x1302\n#define BTIF_SC_VIDEO_SOURCE                         0x1303\n#define BTIF_SC_VIDEO_SINK                           0x1304\n#define BTIF_SC_VIDEO_DISTRIBUTION                   0x1305\n\ntypedef uint8_t sdp_parsing_mode;\n#define BTIF_BSPM_BEGINNING   0x00\n#define BTIF_BSPM_RESUME      0x01\n#define BTIF_BSPM_CONT_STATE  0x02\n#define BTIF_BSPM_NO_SKIP   0x04\n\ntypedef uint8_t sdp_query_mode;\n#define BTIF_BSQM_FIRST     0x00\n#define BTIF_BSQM_CONTINUE  0x01\n#define BTIF_BSQM_DONT_CARE 0xFF\n\ntypedef U8 SdpDataElemType;\n#define DETD_NIL  0x00\n#define DETD_UINT 0x08\n#define DETD_SINT 0x10\n#define DETD_UUID 0x18\n#define DETD_TEXT 0x20\n#define DETD_BOOL 0x28\n#define DETD_SEQ  0x30\n#define DETD_ALT  0x38\n#define DETD_URL  0x40\n#define DETD_MASK 0xf8\n\ntypedef uint8_t sdp_data_elem_size;\n#define DESD_1BYTE      0x00\n#define DESD_2BYTES     0x01\n#define DESD_4BYTES     0x02\n#define DESD_8BYTES     0x03\n#define DESD_16BYTES    0x04\n#define DESD_ADD_8BITS  0x05\n#define DESD_ADD_16BITS 0x06\n#define DESD_ADD_32BITS 0x07\n#define DESD_MASK       0x07\n\n#define SDP_ATTRIBUTE(attribId, attrib) \\\n          { attribId,           \\\n            sizeof(attrib),     \\\n            attrib,             \\\n            0x0000 }\n\n#define SDP_ATTRIBUTE_ARM(attribId, attrib) \\\n          { attribId,           \\\n            sizeof(attrib),     \\\n            0,                  \\\n            0x0000 }\n\n#define SDP_ATTRIB_HEADER_8BIT(size) \\\n            DETD_SEQ + DESD_ADD_8BITS,      \\\n            size\n\n#define SDP_ATTRIB_HEADER_16BIT(size) \\\n            DETD_SEQ + DESD_ADD_16BITS,      \\\n            (U8)(((size) & 0xff00) >> 8),    \\\n            (U8)((size) & 0x00ff)\n\n#define SDP_ATTRIB_HEADER_32BIT(size) \\\n            DETD_SEQ + DESD_ADD_32BITS,         \\\n            (U8)(((size) & 0xff000000) >> 24),  \\\n            (U8)(((size) & 0x00ff0000) >> 16),  \\\n            (U8)(((size) & 0x0000ff00) >> 8),   \\\n            (U8)((size) & 0x000000ff)\n\n#define SDP_ATTRIB_HEADER_ALT_8BIT(size) \\\n            DETD_ALT + DESD_ADD_8BITS,      \\\n            size\n\n#define SDP_ATTRIB_HEADER_ALT_16BIT(size) \\\n            DETD_ALT + DESD_ADD_16BITS,      \\\n            (U8)(((size) & 0xff00) >> 8),    \\\n            (U8)((size) & 0x00ff)\n\n#define SDP_ATTRIB_HEADER_ALT_32BIT(size) \\\n            DETD_ALT + DESD_ADD_32BITS,         \\\n            (U8)(((size) & 0xff000000) >> 24),  \\\n            (U8)(((size) & 0x00ff0000) >> 16),  \\\n            (U8)(((size) & 0x0000ff00) >> 8),   \\\n            (U8)((size) & 0x000000ff)\n\n#define SDP_UUID_16BIT(uuid) \\\n            DETD_UUID + DESD_2BYTES,         \\\n            (U8)(((uuid) & 0xff00) >> 8),    \\\n            (U8)((uuid) & 0x00ff)\n\n#define SDP_UUID_32BIT(uuid) \\\n            DETD_UUID + DESD_4BYTES,            \\\n            (U8)(((uuid) & 0xff000000) >> 24),  \\\n            (U8)(((uuid) & 0x00ff0000) >> 16),  \\\n            (U8)(((uuid) & 0x0000ff00) >> 8),   \\\n            (U8)((uuid) & 0x000000ff)\n\n#define SDP_UUID_128BIT(uuid)                \\\n            DETD_UUID + DESD_16BYTES,        \\\n            (U8)(uuid[15]), \\\n            (U8)(uuid[14]), \\\n            (U8)(uuid[13]), \\\n            (U8)(uuid[12]), \\\n            (U8)(uuid[11]), \\\n            (U8)(uuid[10]), \\\n            (U8)(uuid[9]),  \\\n            (U8)(uuid[8]),  \\\n            (U8)(uuid[7]),  \\\n            (U8)(uuid[6]),  \\\n            (U8)(uuid[5]),  \\\n            (U8)(uuid[4]),  \\\n            (U8)(uuid[3]),  \\\n            (U8)(uuid[2]),  \\\n            (U8)(uuid[1]),  \\\n            (U8)(uuid[0])\n\n#define SDP_UINT_8BIT(uint) \\\n            DETD_UINT + DESD_1BYTE,          \\\n            (U8)(uint)\n\n#define SDP_UINT_16BIT(uint) \\\n            DETD_UINT + DESD_2BYTES,         \\\n            (U8)(((uint) & 0xff00) >> 8),    \\\n            (U8)((uint) & 0x00ff)\n\n#define SDP_UINT_32BIT(uint) \\\n            DETD_UINT + DESD_4BYTES,            \\\n            (U8)(((uint) & 0xff000000) >> 24),  \\\n            (U8)(((uint) & 0x00ff0000) >> 16),  \\\n            (U8)(((uint) & 0x0000ff00) >> 8),   \\\n            (U8)((uint) & 0x000000ff)\n\n#define SDP_UINT_64BIT(uint)                    \\\n            DETD_UINT + DESD_8BYTES,            \\\n            uint\n\n#define SDP_UINT_128BIT(uint)                   \\\n            DETD_UINT + DESD_16BYTES,           \\\n            uint\n\n#define SDP_TEXT_8BIT(size) \\\n            DETD_TEXT + DESD_ADD_8BITS,\\\n            (U8)(size)\n\n#define SDP_TEXT_16BIT(size) \\\n            DETD_TEXT + DESD_ADD_16BITS,\\\n            (U8)(((size) & 0xff00) >> 8),\\\n            (U8)((size) & 0x00ff)\n\n#define SDP_TEXT_32BIT(size) \\\n            DETD_TEXT + DESD_ADD_32BITS,        \\\n            (U8)(((size) & 0xff000000) >> 24),  \\\n            (U8)(((size) & 0x00ff0000) >> 16),  \\\n            (U8)(((size) & 0x0000ff00) >> 8),   \\\n            (U8)((size) & 0x000000ff)\n\n#define SDP_BOOL(value) \\\n            DETD_BOOL + DESD_1BYTE,          \\\n            (U8)(value)\n\ntypedef uint16_t sdp_service_class_uuid;\n#define SC_SERVICE_DISCOVERY_SERVER             0x1000\n#define SC_BROWSE_GROUP_DESC                    0x1001\n#define SC_PUBLIC_BROWSE_GROUP                  0x1002\n#define SC_SERIAL_PORT                          0x1101\n#define SC_LAN_ACCESS_PPP                       0x1102\n#define SC_DIALUP_NETWORKING                    0x1103\n#define SC_IRMC_SYNC                            0x1104\n#define SC_OBEX_OBJECT_PUSH                     0x1105\n#define SC_OBEX_FILE_TRANSFER                   0x1106\n#define SC_IRMC_SYNC_COMMAND                    0x1107\n#define SC_HEADSET                              0x1108\n#define SC_CORDLESS_TELEPHONY                   0x1109\n#define SC_AUDIO_SOURCE                         0x110A\n#define SC_AUDIO_SINK                           0x110B\n#define SC_AV_REMOTE_CONTROL_TARGET             0x110C\n#define SC_AUDIO_DISTRIBUTION                   0x110D\n#define SC_AV_REMOTE_CONTROL                    0x110E\n#define SC_VIDEO_CONFERENCING                   0x110F\n#define SC_INTERCOM                             0x1110\n#define SC_FAX                                  0x1111\n#define SC_HEADSET_AUDIO_GATEWAY                0x1112\n#define SC_WAP                                  0x1113\n#define SC_WAP_CLIENT                           0x1114\n#define SC_PANU                                 0x1115\n#define SC_NAP                                  0x1116\n#define SC_GN                                   0x1117\n#define SC_DIRECT_PRINTING                      0x1118\n#define SC_REFERENCE_PRINTING                   0x1119\n#define SC_IMAGING                              0x111A\n#define SC_IMAGING_RESPONDER                    0x111B\n#define SC_IMAGING_AUTOMATIC_ARCHIVE            0x111C\n#define SC_IMAGING_REFERENCED_OBJECTS           0x111D\n#define SC_HANDSFREE                            0x111E\n#define SC_HANDSFREE_AUDIO_GATEWAY              0x111F\n#define SC_DIRECT_PRINTING_REF_OBJECTS          0x1120\n#define SC_REFLECTED_UI                         0x1121\n#define SC_BASIC_PRINTING                       0x1122\n#define SC_PRINTING_STATUS                      0x1123\n#define SC_HUMAN_INTERFACE_DEVICE               0x1124\n#define SC_HCR                                  0x1125\n#define SC_HCR_PRINT                            0x1126\n#define SC_HCR_SCAN                             0x1127\n#define SC_ISDN                                 0x1128\n#define SC_VIDEO_CONFERENCING_GW                0x1129\n#define SC_UDI_MT                               0x112A\n#define SC_UDI_TA                               0x112B\n#define SC_AUDIO_VIDEO                          0x112C\n#define SC_SIM_ACCESS                           0x112D\n#define SC_PBAP_CLIENT                          0x112E\n#define SC_PBAP_SERVER                          0x112F\n#define SC_PBAP_PROFILE                         0x1130\n#define SC_MAP_SERVER                           0x1132\n#define SC_MAP_NOTIFY_SERVER                    0x1133\n#define SC_MAP_PROFILE                          0x1134\n#define SC_PNP_INFO                             0x1200\n#define SC_GENERIC_NETWORKING                   0x1201\n#define SC_GENERIC_FILE_TRANSFER                0x1202\n#define SC_GENERIC_AUDIO                        0x1203\n#define SC_GENERIC_TELEPHONY                    0x1204\n#define SC_UPNP_SERVICE                         0x1205\n#define SC_UPNP_IP_SERVICE                      0x1206\n#define SC_ESDP_UPNP_IP_PAN                     0x1300\n#define SC_ESDP_UPNP_IP_LAP                     0x1301\n#define SC_ESDP_UPNP_L2CAP                      0x1302\n#define SC_VIDEO_SOURCE                         0x1303\n#define SC_VIDEO_SINK                           0x1304\n#define SC_VIDEO_DISTRIBUTION                   0x1305\n\ntypedef uint16_t sdp_protocol_uuid;\n#define PROT_SDP                     0x0001\n#define PROT_UDP                     0x0002\n#define PROT_RFCOMM                  0x0003\n#define PROT_TCP                     0x0004\n#define PROT_TCS_BIN                 0x0005\n#define PROT_TCS_AT                  0x0006\n#define PROT_OBEX                    0x0008\n#define PROT_IP                      0x0009\n#define PROT_FTP                     0x000A\n#define PROT_HTTP                    0x000C\n#define PROT_WSP                     0x000E\n#define PROT_BNEP                    0x000F\n#define PROT_UPNP                    0x0010\n#define PROT_HIDP                    0x0011\n#define PROT_HCR_CONTROL_CHANNEL     0x0012\n#define PROT_HCR_DATA_CHANNEL        0x0014\n#define PROT_HCR_NOTIFICATION        0x0016\n#define PROT_AVCTP                   0x0017\n#define PROT_AVDTP                   0x0019\n#define PROT_AVCTP_BROWSING          0x001B\n#define PROT_UDI_C                   0x001D\n#define PROT_L2CAP                   0x0100\n\ntypedef uint16_t sdp_attribute_id;\n#define AID_SERVICE_RECORD_HANDLE               0x0000\n#define AID_SERVICE_CLASS_ID_LIST               0x0001\n#define AID_SERVICE_RECORD_STATE                0x0002\n#define AID_SERVICE_ID                          0x0003\n#define AID_PROTOCOL_DESC_LIST                  0x0004\n#define AID_BROWSE_GROUP_LIST                   0x0005\n#define AID_LANG_BASE_ID_LIST                   0x0006\n#define AID_SERVICE_INFO_TIME_TO_LIVE           0x0007\n#define AID_SERVICE_AVAILABILITY                0x0008\n#define AID_BT_PROFILE_DESC_LIST                0x0009\n#define AID_DOC_URL                             0x000a\n#define AID_CLIENT_EXEC_URL                     0x000b\n#define AID_ICON_URL                            0x000c\n#define AID_ADDITIONAL_PROT_DESC_LISTS          0x000d\n#define AID_SERVICE_NAME                        0x0000\n#define AID_SERVICE_DESCRIPTION                 0x0001\n#define AID_PROVIDER_NAME                       0x0002\n#define AID_IP_SUBNET                           0x0200\n#define AID_GROUP_ID                            0x0200\n#define AID_VERSION_NUMBER_LIST                 0x0200\n#define AID_SERVICE_DATABASE_STATE              0x0201\n#define AID_SERVICE_VERSION                     0x0300\n#define AID_EXTERNAL_NETWORK                    0x0301\n#define AID_SUPPORTED_DATA_STORES_LIST          0x0301\n#define AID_FAX_CLASS_1_SUPPORT                 0x0302\n#define AID_REMOTE_AUDIO_VOL_CONTROL            0x0302\n#define AID_FAX_CLASS_20_SUPPORT                0x0303\n#define AID_SUPPORTED_FORMATS_LIST              0x0303\n#define AID_FAX_CLASS_2_SUPPORT                 0x0304\n#define AID_AUDIO_FEEDBACK_SUPPORT              0x0305\n#define AID_NETWORK_ADDRESS                     0x0306\n#define AID_WAP_GATEWAY                         0x0307\n#define AID_HOME_PAGE_URL                       0x0308\n#define AID_WAP_STACK_TYPE                      0x0309\n#define AID_SECURITY_DESC                       0x030A\n#define AID_NET_ACCESS_TYPE                     0x030B\n#define AID_MAX_NET_ACCESS_RATE                 0x030C\n#define AID_IPV4_SUBNET                         0x030D\n#define AID_IPV6_SUBNET                         0x030E\n#define AID_SUPPORTED_CAPABILITIES              0x0310\n#define AID_SUPPORTED_FEATURES                  0x0311\n#define AID_SUPPORTED_FUNCTIONS                 0x0312\n#define AID_TOTAL_IMAGE_DATA_CAPACITY           0x0313\n#define AID_SUPPORTED_REPOSITORIES              0x0314\n#define AID_MAS_INSTANCE_ID                     0x0315\n#define AID_SUPPORTED_MESSAGE_TYPES             0x0316\n#define AID_SUPPORTED_DOC_FORMATS               0x0350\n#define AID_SUPPORTED_CHAR_REPERTOIRES          0x0352\n#define AID_SUPPORTED_XHTML_IMAGE_FORMATS       0x0354\n#define AID_COLOR_SUPPORTED                     0x0356\n#define AID_PRINTER_1284ID                      0x0358\n#define AID_DUPLEX_SUPPORTED                    0x035E\n#define AID_SUPPORTED_MEDIA_TYPES               0x0360\n#define AID_MAX_MEDIA_WIDTH                     0x0362\n#define AID_MAX_MEDIA_LENGTH                    0x0364\n#define AID_HID_PARSERVERSION                   0x201\n#define AID_HID_DEVICESUBCLASS                  0x202\n#define AID_HID_CONTRYCODE                      0x203\n#define AID_HID_VIRTUALCABLE                    0x204\n#define AID_HID_RECONNECTINITIATE               0x205\n#define AID_HID_DESCRIPTORLIST                  0x206\n#define AID_HID_LANGIDBASELIST                  0x207\n#define AID_HID_BATTERYPOWER                    0x209\n#define AID_HID_REMOTEWAKE                      0x20A\n#define AID_HID_SUPERVISIONTIMEOUT              0x20C\n#define AID_HID_NORMALLYCONNECTABLE             0x20D\n#define AID_HID_BOOTDEVICE                      0x20E\n#define AID_HID_SSRHOSTMAXLATENCY               0x20F\n#define AID_HID_SSRHOSTMINTIMEOUT               0x210\n\nU16 sdp_get_u16(U8 * buff);\n#define sdp_get_u16(buff) be_to_host16((buff))\nU32 sdp_get_u32(U8 * buff);\n#define sdp_get_u32(buff) BEtoHost32((buff))\nvoid sdp_put_u16(U8 * buff, U16 val);\n#define sdp_put_u16(buff,val) StoreBE16((buff),(val))\nvoid sdp_put_u32(U8 * buff, U32 val);\n#define sdp_put_u32(buff,val) StoreBE32((buff),(val))\n\ntypedef struct btif_sdp_attribute {\n    uint16_t id;\n    uint16_t len;\n    const uint8_t *value;\n    uint16_t flags;\n} __attribute__ ((__packed__)) sdp_attribute_t;\n\ntypedef struct btif_sdp_query_info {\n    const uint8_t *parms;\n    uint16_t parm_len;\n    sdp_query_type query_type;\n    sdp_attribute_id attr_id;\n    uint16_t uuid;\n    sdp_parsing_mode mode;\n    btif_callback callback;\n    void *priv;\n} __attribute__ ((__packed__)) btif_sdp_query_info_t;\n\ntypedef struct btif_sdp_record_param {\n    sdp_attribute_t *attrs;\n    uint32_t attr_count;\n    uint32_t COD;\n} __attribute__ ((__packed__)) btif_sdp_record_param_t;\n\n\ntypedef struct btif_sdp_query_token\n{\n    btif_remote_device_t *rm;  /* The remote device to query. An ACL\n                               * connection must exist with this device\n                               * before the query is started. */\n   struct btif_sdp_query_info info;\n    uint8_t         channel;\n    uint8_t     response_buff[666];\n    uint32_t    response_buff_len;\n} __attribute__ ((__packed__)) btif_sdp_query_token_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n    bt_status_t btif_sdp_init(void);\n\n    btif_sdp_record_t *btif_sdp_create_record(void);\n\n    void btif_sdp_free_record(btif_sdp_record_t* record);\n\n    void *btif_sdp_get_record_priv(btif_sdp_record_t *record);\n\n    bt_status_t btif_sdp_record_setup(btif_sdp_record_t *record, btif_sdp_record_param_t *param);\n\n    btif_sdp_query_token_t *btif_sdp_create_query_token(void);\n\n    void btif_sdp_free_token(btif_sdp_query_token_t * query_token);\n\n    int btif_sdp_set_query_token(btif_sdp_query_token_t * query_token, btif_sdp_query_info_t *info);\n\n    int btif_sdp_set_remote_device(btif_sdp_query_token_t * query_token,\n                                   btif_remote_device_t * r_device);\n\n    bt_status_t btif_sdp_query(btif_sdp_query_token_t * query_token, sdp_query_mode mode);\n\n    bt_status_t btif_sdp_parse_attrs(btif_sdp_query_token_t * query_token);\n\n    btif_remote_device_t *btif_sdp_get_remote_device(btif_sdp_query_token_t * query_token);\n\n    uint8_t btif_sdp_get_server_id(btif_sdp_query_token_t * query_token);\n\n    void *btif_sdp_get_token_priv(btif_sdp_query_token_t * query_token);\n\n    bt_status_t btif_sdp_add_record(btif_sdp_record_t * record);\n\n    bt_status_t btif_sdp_remove_record(btif_sdp_record_t * record);\n\n    void btif_sdp_set_parsing_mode(btif_sdp_query_token_t * query_token, sdp_parsing_mode mode);\n\n    bt_status_t btif_spp_insert_rfcomm_chan(btif_sdp_record_t *record, uint8_t channel);\n\n    btif_sdp_query_token_t *btif_me_get_callback_event_sdp_token(const btif_event_t *event);\n#ifdef __cplusplus\n}\n#endif\n#endif              /*__SDP_API_H__*/\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/spp_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __SPP_API_H__\n#define __SPP_API_H__\n\n#include \"sdp_api.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"rfcomm_api.h\"\n\n#define SPP_DEVICE_NUM      6\n#define SPP_SERVICE_NUM     6\n\ntypedef uint16_t spp_event_t;\n#define BTIF_SPP_EVENT_REMDEV_CONNECTED         0\n#define BTIF_SPP_EVENT_REMDEV_DISCONNECTED      1\n#define BTIF_SPP_EVENT_DATA_SENT                2\n#define BTIF_SPP_EVENT_REMDEV_DISCONNECTED_IND  3\n#define BTIF_SPP_EVENT_REMDEV_CONNECTED_IND     4\n\ntypedef uint8_t spp_port_t;\n\n#define BTIF_SPP_SERVER_PORT             0x01\n#define BTIF_SPP_CLIENT_PORT             0x02\n\n#define SPP_RX_SIGNAL_ID                 0x04\n\nstruct spp_device;\n\nstruct spp_tx_done {\n    uint8_t         *tx_buf;\n    uint16_t        tx_data_length;\n};\n\nstruct spp_client {\n    btif_remote_device_t *remDev;\n    uint8_t                  serverId;\n    btif_sdp_query_token_t   *sdpToken;\n    uint8_t* rfcommServiceSearchRequestPtr;\n    uint8_t rfcommServiceSearchRequestLen;\n};\n\nstruct spp_service {\n    struct rf_service   rf_service;\n    const uint8_t       *name;\n    uint16_t            nameLen;\n    uint16_t            numPorts;\n    btif_sdp_record_t   *sdpRecord;\n    uint8_t             service_used_flag;\n};\n\nstruct spp_callback_parms {\n    spp_event_t event;\n    int status;\n    union {\n        void           *other;\n        btif_remote_device_t *remDev;\n    } p;\n};\n\ntypedef void (*spp_callback_t)(struct spp_device *locDev,\n                            struct spp_callback_parms *Info);\n\ntypedef int (*spp_handle_data_event_func_t)(void *pDev, uint8_t process, uint8_t *pData, uint16_t dataLen);\n\nstruct _spp_dev {\n    union {\n        struct spp_client   client;\n        struct spp_service  *sppService;\n    } type;\n};\n\nstruct spp_device {\n    spp_port_t      portType;\n    uint32_t        app_id;\n    osThreadId      reader_thread_id;\n    osMutexId       mutex_id;\n    CQueue          rx_queue;\n    uint8_t         *rx_buffer;\n    uint32_t        rx_buffer_size;\n    uint32_t        tx_packet_num;\n    void            *priv;\n    spp_callback_t  spp_callback;\n    spp_handle_data_event_func_t spp_handle_data_event_func;\n    uint8_t         serialNumber;\n    uint8_t         spp_connected_flag;\n    uint8_t         sppUsedFlag;\n    uint8_t         close_pending;\n    struct _spp_dev sppDev;\n    void            *_channel;\n    uint8_t         initial_credit;\n    uint8_t         credit_give_limit;\n    osMutexId       creditMutex;\n    bt_bdaddr_t     btaddr;\n};\n\n#define container_of(ptr, type, member) ({                  \\\n    const typeof( ((type *)0)->member ) *__mptr = (ptr);    \\\n    (type *)( (char *)__mptr - offsetof(type,member) );})\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nbt_status_t btif_spp_init_device(struct spp_device *dev, uint16_t numPackets, osMutexId mid);\nbt_status_t btif_spp_init_rx_buf(struct spp_device *dev, uint8_t *rx_buf, uint32_t size);\nbool btif_sppos_is_txpacket_available(struct spp_device *dev);\nbt_status_t btif_spp_open(struct spp_device *dev,\n                        btif_remote_device_t  *btDevice,\n                        spp_callback_t callback);\nbt_status_t btif_spp_open_client(struct spp_device *dev,\n                        bt_bdaddr_t *bdaddr,\n                        spp_callback_t callback);\nbt_status_t btif_spp_open_server(struct spp_device *dev,\n                        spp_callback_t callback);\nbt_status_t btif_spp_disconnect(struct spp_device *dev);\nbt_status_t btif_spp_close(struct spp_device *dev);\nvoid btif_spp_close_device(struct spp_device *dev);\nbt_status_t btif_spp_read(struct spp_device *dev, char *buffer, uint16_t *nBytes);\nbt_status_t btif_spp_write(struct spp_device *dev, char *buffer, uint16_t *nBytes);\nbt_status_t btif_spp_service_setup(struct spp_device *dev,\n                                struct spp_service *service,\n                                btif_sdp_record_t *record);\nbt_status_t btif_ccmp_open(struct spp_device *dev,\n                        btif_remote_device_t  *btDevice,\n                        spp_callback_t callback,\n                        uint8_t port);\nstruct spp_device *btif_create_spp_device(void);\nvoid btif_destroy_spp_device(struct spp_device *dev_t);\nstruct spp_device *btif_spp_get_device(uint32_t app_id);\nstruct spp_service *btif_create_spp_service(void);\nvoid btif_destroy_spp_service(struct spp_service *spp_service_p);\nuint32_t btif_spp_get_app_id(struct spp_device *dev);\nuint32_t btif_spp_get_rfcomm_handle(struct spp_device *dev);\nuint8_t btif_spp_get_server_channel(struct spp_device *dev);\nconst char *btif_spp_event2str(spp_event_t event);\n\ntypedef void (*btif_bt_spp_app_callback_func)(void* spp_devi, void* spp_para);\nvoid btif_register_bt_spp_callback_func(btif_bt_spp_app_callback_func func);\nuint32_t btif_spp_profile_save_ctx(uint32_t app_id,btif_remote_device_t *rem_dev, uint8_t *buf, uint32_t buf_len);\nuint32_t btif_spp_profile_restore_ctx(uint8_t *buf, uint32_t buf_len);\n\n/*---------------------------------------------------------------------------\n * rfcomm channel number\n *      should be from 1 to 30\n */\nenum RFCOMM_CHANNEL_NUM_ {\n    RFCOMM_CHANNEL_1 = 10,\n    RFCOMM_CHANNEL_2,\n    RFCOMM_CHANNEL_3,\n    RFCOMM_CHANNEL_4,\n    RFCOMM_CHANNEL_5,\n    RFCOMM_CHANNEL_6,\n    RFCOMM_CHANNEL_7,\n    RFCOMM_CHANNEL_8,\n    RFCOMM_CHANNEL_9,\n    RFCOMM_CHANNEL_10,\n};\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __SPP_API_H__ */\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/spp_task.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __SPP_TASK_H__\n#define __SPP_TASK_H__\n\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"rfcomm_api.h\"\n#include \"sdp_api.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nosThreadId create_spp_read_thread(void);\n\nvoid close_spp_read_thread(void);\n\nint spp_mailbox_put(struct spp_device *dev, uint8_t spp_dev_num, uint32_t len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __SPP_TASK_H__ */\n"
  },
  {
    "path": "services/bt_if_enhanced/inc/tws_role_switch.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __TWS_ROLE_SWITCH__H__\n#define __TWS_ROLE_SWITCH__H__\n\n#include \"bluetooth.h\"\n\nenum TWS_DATA_STRUCTURE\n{\n    BT_ME = 0,\n    BT_HCI,\n    CMGR_CONTEXT,\n    \n    BT_L2CAP,\n    BT_RFC,\n    \n    RFCOMM_CHANNEL,\n    AVRCP_CONTEXT,\n    APP_BT_DEVICE,\n    AVDEV_CONTEXT,\n    SLAVE_SAVE_DATA_OK,\n};\n\nenum PSM_CONTEXT_TYPE\n{\n     PSM_CONTEXT_SDP     = 0x01,  //SDP\n     PSM_CONTEXT_RFC     = 0x02,  //RFCOMM MUX,HFP and SPP share\n     PSM_CONTEXT_AVDTP   = 0x04,  //A2DP\n     PSM_CONTEXT_AVCTP   = 0x08,  //AVRCP\n     \n     PSM_CONTEXT_INVALID = 0x80,\n};\n\n#define BT_RPOFILE_FINAL_FLAG   (0x55)\n\nenum PROFILE_CONTEXT_FLAG\n{\n#if defined(ENHANCED_STACK)\n    BT_HFP_FLAG = 0x01,\n    BT_A2DP_FLAG = 0x02,\n    BT_AVRCP_FLAG = 0x04,\n    BT_MAP_FLAG =0x08,\n    BT_HID_FLAG = 0x10,\n\n    //add new profile flag here\n\n    BT_SPP_FLAG = 0x80, //SPP has multiple app id(total BTIF_APP_SPP_NUM),BT_SPP_FLAG flag should be at high bit\n#else\n    BT_COMMON_FLAG = 0x01,\n    BT_RFC_MUX_FLAG = 0x02,\n    BT_HFP_FLAG = 0x04,\n    BT_A2DP_FLAG = 0x08,\n    BT_A2DP_CONTINUE_FLAG = 0x10,\n    BT_AVRCP_FLAG = 0x20,\n    BT_SPP_FLAG = 0x40,\n    \n    DATA_COMPLETE_FLAG = 0x80,\n#endif\n};\n\n#define BT_ALL_CONTEXT_PSM    (PSM_CONTEXT_SDP | PSM_CONTEXT_RFC | PSM_CONTEXT_AVDTP | PSM_CONTEXT_AVCTP)  \n\n#if defined(ENHANCED_STACK)\n#define BT_ALL_CONTEXT_FLAG   (BT_HFP_FLAG | BT_A2DP_FLAG  | BT_AVRCP_FLAG | BT_MAP_FLAG | BT_SPP_FLAG | BT_HID_FLAG)\n#else\n#define BT_ALL_CONTEXT_FLAG   (BT_COMMON_FLAG | BT_RFC_MUX_FLAG | BT_HFP_FLAG | BT_A2DP_FLAG | BT_A2DP_CONTINUE_FLAG | BT_AVRCP_FLAG | SPP_SERVER_INTERACTION_FLAG)\n#endif\n\n#define BT_ALL_RFC_APP_ID     (BTIF_APP_HFP_PROFILE_ID | BT_SPP_FLAG) \n\n#define BT_EARPHONE_BASIC_APP_ID       (BTIF_APP_HFP_PROFILE_ID | BTIF_APP_A2DP_PROFILE_ID | BTIF_APP_AVRCP_PROFILE_ID)\n\nenum TWS_CHANNEL_TYPE\n{\n     HF_RF_CHANNEL = 0,\n     UNKNOWN_CHANNEL,\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif                          /*  */\n\n\n#ifdef __cplusplus\n}\n#endif                          /*  */\n#endif                          /* __ME_H */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)protocols/*/*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)protocols/*/*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)protocols/*/*.cpp))\n\nifeq ($(AUTO_TEST),1)\nobj_s += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)protocols/test/*/*.s))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)protocols/test/*/*.c))\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)protocols/test/*/*.cpp))\nendif\n\nobj_s += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)common/*.s))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)common/*.c))\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)common/*.cpp))\n\nobj_s += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)besport/*.s))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)besport/*.c))\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)besport/*.cpp))\n\nobj_s += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hci/*.s))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hci/*.c))\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)hci/*.cpp))\n\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)main/bt_schedule.c))\n\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)applications/hshf/hshf_app.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)applications/hshf/bt_schedule.c))\n\nobj_s += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)lib_proc/*.s))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)lib_proc/*.c))\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)lib_proc/*.cpp))\n\nifeq ($(IBRT), 1)\nBTPROFILE_LIB_NAME := ibrt_libbt_profiles\nelse\nBTPROFILE_LIB_NAME := $(CHIP)_libbt_profiles\nendif\n\nifeq ($(HFP_1_6_ENABLE), 1)\nBTPROFILE_LIB_NAME := $(BTPROFILE_LIB_NAME)_sbc_enc\nendif\n\nifeq ($(ROM_UTILS_ON),1)\nBTPROFILE_LIB_NAME := $(BTPROFILE_LIB_NAME)_romaac\nendif\n\nifeq ($(BLE),1)\nBTPROFILE_LIB_NAME := $(BTPROFILE_LIB_NAME)_ble\nendif\n\nifeq ($(BT_RF_PREFER), 2M)\nBTPROFILE_LIB_NAME := $(BTPROFILE_LIB_NAME)_2m\nendif\n\nifeq ($(BT_RF_PREFER), 3M)\nBTPROFILE_LIB_NAME := $(BTPROFILE_LIB_NAME)_3m\nendif\n\nifeq ($(KERNEL),RTX)\nBTPROFILE_LIB_NAME := $(BTPROFILE_LIB_NAME)_RTX\nendif\nifeq ($(KERNEL),RTX5)\nBTPROFILE_LIB_NAME := $(BTPROFILE_LIB_NAME)_RTX5\nendif\n\n$(BTPROFILE_LIB_NAME)-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nobj-y += $(BTPROFILE_LIB_NAME).a\n\nCFLAGS_a2dp.o += -O3\n\nCFLAGS_btm.o += -DBESLIB_INFO=$(BESLIB_INFO)\n\nsubdir-ccflags-y += \\\n    -Iservices/osif/ \\\n    -Iservices/auto_test \\\n    $(BT_IF_INCLUDES) \\\n    $(BT_PROFILES_INCLUDES) \\\n    -Iservices/bridge/ \\\n    -Iservices/ble_stack/ke/api/ \\\n    -Iservices/ble_stack/ble_ip/ \\\n    -Iservices/ble_stack/common/api/ \\\n    -Iservices/ble_stack/hl/api/ \\\n    -Iplatform/drivers/uarthci \\\n    -Iplatform/drivers/ana \\\n    -Iplatform/drivers/bt \\\n    -Iutils/cqueue \\\n    -Iutils/heap \\\n    -Iutils/intersyshci \\\n    -Iservices/bt_app \\\n    -Iservices/audioflinger \\\n    -Iservices/nvrecord \\\n    -Iservices/resources \\\n    -Iservices/ibrt_core/inc \\\n    -Iutils/lockcqueue \\\n    -Iapps/key \\\n    -Iservices/multimedia/audio/codec/sbc/inc \\\n    -Iservices/multimedia/audio/codec/sbc/src/inc \\\n    -Iapps/audioplayers\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/a2dp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __A2DP_H__\n#define __A2DP_H__\n\n#include \"btlib_type.h\"\n#include \"a2dp_i.h\"\n#include \"avdtp_i.h\"\n\n#define AVDTP_CODEC_CAP_MAX_LENGTH (32)\n\n#define AVDTP_VER_1_2 0x0102\n#define AVDTP_VER_1_3 0x0103\n#define AVDTP_LOCAL_VERSION AVDTP_VER_1_3\n\n#define A2DP_VER_1_2 0x0102\n#define A2DP_VER_1_3 0x0103\n#define A2DP_LOCAL_VERSION A2DP_VER_1_3\n\n#define A2DP_MEDIA_TYPE_AUDIO \t    0x00\n\n#define A2DP_CODEC_SBC              0x00\n#define A2DP_CODEC_MPEG12_AUDIO     0x01\n#define A2DP_CODEC_MPEG24_AAC       0x02\n#define A2DP_CODEC_ATRAC            0x03\n#define A2DP_CODEC_VENDOR_SPECIFIC  0xff\n\n#define A2DP_SAMPLING_FREQ_16000\t(1 << 3)\n#define A2DP_SAMPLING_FREQ_32000\t(1 << 2)\n#define A2DP_SAMPLING_FREQ_44100\t(1 << 1)\n#define A2DP_SAMPLING_FREQ_48000\t1\n\n#define A2DP_CHANNEL_MODE_MONO\t\t(1 << 3)\n#define A2DP_CHANNEL_MODE_DUAL_CHANNEL\t(1 << 2)\n#define A2DP_CHANNEL_MODE_STEREO\t(1 << 1)\n#define A2DP_CHANNEL_MODE_JOINT_STEREO\t1\n\n#define A2DP_BLOCK_LENGTH_4\t\t(1 << 3)\n#define A2DP_BLOCK_LENGTH_8\t\t(1 << 2)\n#define A2DP_BLOCK_LENGTH_12\t\t(1 << 1)\n#define A2DP_BLOCK_LENGTH_16\t\t1\n\n#define A2DP_SUBBANDS_4\t\t\t(1 << 1)\n#define A2DP_SUBBANDS_8\t\t\t1\n\n#define A2DP_ALLOCATION_SNR\t\t(1 << 1)\n#define A2DP_ALLOCATION_LOUDNESS\t1\n\nstruct a2dp_sep {\n    uint8 type;   //src or snk\n    struct avdtp_local_sep *sep;\n};\n\nstruct get_codec_cap_t {\n    uint8 ** cap;\n    uint16 * cap_len; \n    bool     done;\n};\n\nstruct sbc_codec_cap {\n    uint32 rfa0:4;\n    uint32 media_type:4;\n    uint32 media_codec_type:8;\n    uint32 channel_mode:4;\n    uint32 frequency:4;\n    uint32 allocation_method:2;\n    uint32 subbands:2;\n    uint32 block_length:4;\n    uint8 min_bitpool;\n    uint8 max_bitpool;\n} __attribute__ ((packed));\n\n#define AAC_OCTECT0_MPEG2_AAC_LC     0x80\n#define AAC_OCTECT1_SAMP_FREQ_44100  0x01\n#define AAC_OCTECT2_SAMP_FREQ_48000  0x8\n#define AAC_OCTECT2_CHAN_MODE_MONO   0x08\n#define AAC_OCTECT2_CHAN_MODE_STEREO 0x04\n\nstruct aac_codec_cap {\n    uint32 media_type:8;                //Audio            0x00\n    uint32 media_codec_type:8;          //MEPG-2,4 AAC     0x02\n    uint32 object_types_support:8;      //MPEG-2 AAC LC    0x80\n    uint32 samp_freq_441:8;             //44100            0x01\n    uint32 channel_mode:4;              //1(0x8) 2(0x4) 1 2(0xc)\n    uint32 samp_freq_48k:4;             //48000            0x8-\n    uint32 max_peak_bitrate_high:7;\n    uint32 vbr_supported:1;\n    uint8 max_peak_bitrate_low2;\n    uint8 max_peak_bitrate_low1;\n} __attribute__ ((packed));\n\n#define LHDC_CODEC_SAMP_RATE_96000 0x01\n#define LHDC_CODEC_SAMP_RATE_88200 0x02\n#define LHDC_CODEC_SAMP_RATE_48000 0x04\n#define LHDC_CODEC_SAMP_RATE_44100 0x08\n#define LHDC_CODEC_BITS_PER_SAMP_24 0x10\n#define LHDC_CODEC_BITS_PER_SAMP_16 0x20\n\n#define LHDC_CODEC_VERSION_V3 0x01\n#define LHDC_CODEC_VERSION_LOWER 0x00\n#define LHDC_CODEC_VERSION_MASK 0x0f\n#define LHDC_CODEC_MAX_SR_900 0x00\n#define LHDC_CODEC_MAX_SR_500 0x10\n#define LHDC_CODEC_MAX_SR_400 0x20\n#define LHDC_CODEC_MAX_LLC_EN 0x40\n#define LHDC_CODEC_MAX_SR_MASK 0xf0\n\n#define LHDC_CODEC_COF_CSC_DISABLE 0x01\n#define LHDC_CODEC_COF_CSC 0x02\n#define LHDC_CODEC_COF_CSC_PRE 0x04\n#define LHDC_CODEC_COF_CSC_RFU 0x08\n\nstruct lhdc_codec_cap {\n    uint8 media_type; //Audio 0x00\n    uint8 media_codec_type; //Vendor-Specific Codec 0xff\n    uint8 vendor_id[4]; //3a 05 00 00\n    uint8 codec_id[2];  //32 4c (Lower Ver.) or 33 4c (V3)\n    uint8 sample_rate;\n    uint8 max_sr_ver;\n    uint8 cof_csc;\n} __attribute__ ((packed));\n\n#define LDAC_CODEC_SAMP_FREQ_96000 0x04\n#define LDAC_CODEC_SAMP_FREQ_88200 0x08\n#define LDAC_CODEC_SAMP_FREQ_48000 0x10\n#define LDAC_CODEC_SAMP_FREQ_44100 0x20\n\n#define LDAC_CODEC_CHAN_MODE_STEREO 0x01\n#define LDAC_CODEC_CHAN_MODE_DUAL   0x02\n#define LDAC_CODEC_CHAN_MODE_MONO   0x04\n\nstruct ldac_codec_cap {\n    uint8 media_type; //Audio 0x00\n    uint8 media_codec_type; //Vendor-Specific Codec 0xff\n    uint8 vendor_id[4]; //2d 01 00 00\n    uint8 codec_id[2];  //aa 00\n    uint8 sample_freq;\n    uint8 chan_mode;\n} __attribute__ ((packed));\n\n#define SCALABLE_CODEC_BITS_16 0x00\n#define SCALABLE_CODEC_BITS_24 0x08\n#define SCALABLE_CODEC_SAMP_48000 0x10\n#define SCALABLE_CODEC_SAMP_44100 0x20\n#define SCALABLE_CODEC_SAMP_32000 0x40\n#define SCALABLE_CODEC_SAMP_96000 0x80\n\nstruct scalable_codec_cap {\n    uint8 media_type; //Audio 0x00\n    uint8 media_codec_type; //Vendor-Specific Codec 0xff\n    uint8 vendor_id[4]; //75 00 00 00\n    uint8 codec_id[2];  //03 01\n    uint8 sample_rate;\n} __attribute__ ((packed));\n\nU16 a2dp_MediaPacketSize(struct a2dp_control_t *Stream);\n#define a2dp_MediaPacketSize(s) (l2cap_get_tx_mtu((s)->l2capSignalHandle))\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nU16 a2dp_create_media_header(struct a2dp_control_t *a2dp_ctl, U8 *buffer);\nvoid a2dp_notifyCallback(uint8 event, uint32 l2cap_channel, void *pData, uint8 reason);\nvoid a2dp_dataRecvCallback(uint32 l2cap_handle, struct pp_buff *ppb);\nint8 a2dp_close(struct a2dp_control_t * stream);\nvoid doDisconnect(void);\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __A2DP_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/a2dp_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __A2DP_I_H__\n#define __A2DP_I_H__\n\n#include \"btlib_type.h\"\n#include \"btm_i.h\"\n#include \"avdtp.h\"\n#include \"avdtp_i.h\"\n#include \"sdp.h\"\n\n#define A2DP_RECVDATA_BUF_SIZE 48\n\n/* notify upper layer */\nenum a2dp_event_t\n{\n    /* user command event*/\n    AV_CONNECT_REQ = 1,\n    AV_DISCONNECT_REQ, //210\n    AV_TRANS_REQ,\n    AV_SUSPEND_REQ,\n    AV_START_REQ,\n    AV_ABORT_REQ,\n    AV_SET_CONFIG_REQ,\n    AV_RECONF_REQ,\n\n    /* internal event */\n    //  AV_EVNT_BEGIN,\n    AV_CONN_OPENED, //217\n    AV_CONN_CLOSED,\n\n    AV_MEDIA_GET_CAP_IND,\n    AV_MEDIA_SET_CFG_IND,\n    AV_MEDIA_GET_CFG_CFM,\n    AV_MEDIA_STREAM_CLOSE,   //219\n    AV_MEDIA_STREAM_ABORT, //219\n    AV_MEDIA_RECONF_IND,\n    AV_MEDIA_DISCOVERY_COMPLETE,\n\n    AV_MEDIA_OPENED,         //219\n    AV_MEDIA_STREAM_START,   //219\n    AV_MEDIA_STREAM_DATA_IND,   //219\n    AV_MEDIA_STREAM_SUSPEND, //219\n    AV_MEDIA_FREQ_CHANGED,   //219\n    AV_CONN_REQ_FAIL,\n    AV_MEDIA_SECURITY_CONTROL_CMD,\n    AV_MEDIA_SECURITY_CONTROL_CFM\n};\n\nenum av_conn_state_enum\n{\n    AV_STOP,\n    AV_STANDBY = 1, //ready\n    AV_QUERING, //sdp quering\n    AV_CONNECTING,  //initializing\n    AV_OPEN,        //AV_SIG_ACTIVE,\n    AV_CONNECTED,\n    AV_STREAMING\n};\n\n\nstruct a2dp_control_t\n{\n    struct bdaddr_t remote;\n    bool cp_enable;\n    uint8 disc_reason;\n    uint32 l2capSignalHandle;\n    uint32 l2capMediaHandle;\n    uint32 freq;\n    uint16 avdtp_local_version;\n    uint16 avdtp_remote_version;\n    uint16 a2dp_remote_features;\n    uint8 channel_mode;\n\n    enum av_conn_state_enum state; /*check if it is connecting now, if it is connecting,the hf_connect_req will not work */\n\n    struct a2dp_sep *sep; //bind to lsep\n    struct avdtp_control_t *avdtp;\n                          //struct avdtp_stream *stream;\n    void *avdtp_codec_req;\n    void *avdtp_cp_req;\n    struct avdtp_media_codec_capability *avdtp_codec_cap;\n    struct avdtp_media_content_protect_capability *avdtp_content_protect_cap;\n    uint8 type;\n    struct avdtp_local_sep *lsep;\n\n    void (*indicate)(struct a2dp_control_t *stream, uint8 event, void *pData);\n    void (*data_cb)(struct a2dp_control_t *stream,struct pp_buff *ppb);\n    uint8 sep_prio;\n    struct a2dp_control_t* next;\n    avdtp_media_header_t media_header;\n    struct sdp_request sdp_request;\n    uint8 device_id;\n};\n\nstruct a2dp_ctx_input {\n    struct ctx_content ctx;\n    struct bdaddr_t *remote;\n    struct a2dp_control_t *a2dp_ctl;\n    struct avdtp_control_t *avdtp_ctl;\n    struct avdtp_local_sep *local_sep;\n    uint32 l2capSignalHandle;\n    uint32 l2capMediaHandle;\n    void (*indicate_callback)(struct a2dp_control_t *stream, uint8 event, void *pData);\n    void (*data_callback)(struct a2dp_control_t *stream, struct pp_buff *ppb);\n};\n\nstruct a2dp_ctx_output {\n};\n\nextern struct a2dp_control_t *a2dp_ctl_list;\n\n//int8 av_register_datacallback(struct a2dp_control_t *stream,void (*data_callback)(struct a2dp_control_t* stream, struct pp_buff *ppb));\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nvoid a2dp_stack_init(void);\n/*---- a2dp_app.c ----*/\n//void app_callback(struct a2dp_control_t* stream, uint8 event, void *pData);\nvoid data_callback_av(struct a2dp_control_t *stream, struct pp_buff *ppb);\n\n/*----a2dp.c----*/\nint8 a2dp_register(struct a2dp_control_t *stream,\n                   void (*indicate_callback)(struct a2dp_control_t *stream, uint8 event, void *pData),\n                   void (*data_callback)(struct a2dp_control_t *stream, struct pp_buff *ppb));\nint a2dp_unregister(struct a2dp_control_t *ctl);\n\nenum av_conn_state_enum av_getState(struct  a2dp_control_t*stream) ;\nvoid av_setState( struct  a2dp_control_t *stream, enum av_conn_state_enum state);\nint8 av_turnOn(struct  a2dp_control_t *stream);\nint8 av_turnOff(struct a2dp_control_t * stream);\n\nint8 av_connectReq(struct a2dp_control_t *stream, struct bdaddr_t *peer);\nint8 av_disconnectReq(struct  a2dp_control_t *stream);\n//int8 av_sendData(uint8 *data, uint32 datalen);\n\nvoid av_reset_a2dp_state(struct a2dp_control_t * stream);\n\nconst char *a2dp_state2str(enum av_conn_state_enum state);\n\nint8 av_suspendReq(struct a2dp_control_t *stream);\nint8 av_startReq(  struct  a2dp_control_t  *stream);\nint8 av_abortReq( struct  a2dp_control_t  *stream);\nint8 av_setConfReq( struct  a2dp_control_t  *stream); ///\nint8 av_reconfReq( struct  a2dp_control_t  *stream );  ///\n\nvoid av_discoverCap(struct a2dp_control_t *stream);\nint8 av_setSinkDelay(struct a2dp_control_t *stream, uint16 delay_ms);\nint8 av_security_control_req(struct a2dp_control_t *stream, uint8_t *data, uint16_t len);\nint8 av_security_control_resp(struct a2dp_control_t *stream, uint8_t *data, uint16_t len, uint8 error);\nuint32 av_getFreq( struct  a2dp_control_t  *stream);\nvoid av_setFreq( struct a2dp_control_t *stream, uint32 frequency);\nuint8 av_getChannelMode(struct  a2dp_control_t *stream);\n\nstruct avdtp_control_t *a2dp_get_avdtp_control(struct a2dp_control_t *stream);\nuint32 a2dp_save_ctx(struct a2dp_control_t *a2dp_ctl, uint8_t *buf, uint32_t buf_len);\nuint32 a2dp_restore_ctx(struct a2dp_ctx_input *input, struct a2dp_ctx_output *output);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __A2DP_I_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/avctp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __AVCTP_H__\n#define __AVCTP_H__\n\n#include \"avctp_i.h\"\n#include \"l2cap_i.h\"\n\n#ifndef PSM_AVCTP\n#endif\n\n#define AVCTP_DEFAULT_MTU     127\n#define AVCTP_DEFAULT_CREDITS 7\n\n#define AVCTP_MAX_L2CAP_MTU 1013\n#define AVCTP_MAX_CREDITS   40\n\n/* flow control states */\n#define AVCTP_CFC_DISABLED 0\n#define AVCTP_CFC_ENABLED  AVCTP_DEFAULT_CREDITS\n\n#define AVCTP_CFG_SESSIONS_MAX   2    /* means how many l2cap channel */\n\nstruct avctp_resp {\n    struct avctp_header header;\n    void *avrcp_resp;\n} __attribute__ ((packed));\n\n#endif /* __AVCTP_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/avctp_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __AVCTP_I_H__\n#define __AVCTP_I_H__\n\n#include \"btlib.h\"\n#include \"co_ppbuff.h\"\n#include \"bt_co_list.h\"\n#include \"btm_i.h\"\n#include \"l2cap_i.h\"\n\nenum avctp_event_enum {\n    AVCTP_CHANNEL_CONN_REQ,\n    AVCTP_CHANNEL_OPEN,\n    AVCTP_CHANNEL_NEW_OPENED,\n    AVCTP_CHANNEL_TX_HANDLED,\n    AVCTP_CHANNEL_CLOSED\n};\n\nenum avctp_ctl_state_enum {\n    AVCTP_CTL_FREE,\n    AVCTP_CTL_INUSE\n};\n\nenum avctp_frame_type_enum {\n    AVCTP_FRAME_ADV_CMD,\n    AVCTP_FRAME_ADV_RSP,\n    AVCTP_FRAME_PNL_CMD,\n    AVCTP_FRAME_PNL_RSP,\n    AVCTP_FRAME_UNITINFO_CMD,\n    AVCTP_FRAME_UNITINFO_RSP,\n    AVCTP_FRAME_SUBUNITINFO_RSP,\n};\n\nenum avctp_tx_status_enum {\n    AVCTP_TX_IDLE,\n    AVCTP_TX_BUSY,\n};\n\nenum avctp_role_enum {\n    AVCTP_MASTER,\n    AVCTP_SLAVE\n};\n\n#define AVCTP_CFG_SERVER_CHANNEL 0x08\n\n/*\nstruct avctp_session {\n    struct list_node list;\n    \n    uint32 l2cap_handle;\n    \n    struct bdaddr_t remote;\n    \n    void (*notify_callback) (uint8 event, struct avctp_session *s, void *pdata);\n    void (*datarecv_callback) (struct avctp_session *s, struct pp_buff *ppb);\n};\n*/\n\n#define AVCTP_PKT_HEADER_PROFILE_ID 0x110E\n\n#define AVCTP_PKT_HEADER_VALID_PID 0\n#define AVCTP_PKT_HEADER_INVALID_PID 1\n\n#define AVCTP_PKT_HEADER_IS_CMD 0\n#define AVCTP_PKT_HEADER_IS_RESPONSE 1\n\nenum avctp_packet_type\n{\n    AVCTP_PACKET_TYPE_SINGLE = 0,\n    AVCTP_PACKET_TYPE_START = 1,\n    AVCTP_PACKET_TYPE_CONTINUE = 2,\n    AVCTP_PACKET_TYPE_END = 3,\n};\n\nstruct avctp_header {\n    uint32\n    ipid_ind    : 1,\n    com_or_resp : 1,\n    packet_type : 2,\n    trans_label : 4;\n    uint8 profile_ind[2];\n}__attribute__ ((packed));\n\nstruct avctp_frame_t {\n    struct list_node node;\n    struct avctp_header header;\n    int8 frame_type;\n    bool need_free;\n    uint8 *data;\n    uint32 data_len;\n    uint32 data_offset;\n};\n\nstruct avctp_control_t {\n    struct list_node node;\n    struct list_node tx_list;\n    \n    struct bdaddr_t remote;\n    struct avctp_header header;\n    int8 server_channel;\n    uint32 l2cap_handle;\n\n    int8 tx_status;\n\n    enum avctp_ctl_state_enum ctl_state;\n    \n    enum avctp_role_enum role;\n    int (*notify_callback)(struct avctp_control_t *avctp_ctl, uint8 event, uint32 handle, void *pdata);\n    void (*datarecv_callback)(struct avctp_control_t *avctp_ctl, uint32 handle, struct pp_buff *ppb);\n};\n\nstruct avctp_ctx_input {\n    struct ctx_content ctx;\n    struct bdaddr_t *remote;\n    uint32 l2cap_handle;\n    struct avctp_control_t *avctp_ctl;\n};\n\nstruct avctp_ctx_output {\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint avctp_l2cap_notify_callback(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason);\nvoid avctp_l2cap_datarecv_callback(uint32 l2cap_handle, struct pp_buff *ppb);\n\nint8 avctp_init(struct avctp_control_t *avctp_ctl);\nint8 avctp_init_service(void);\n\nint8 avctp_register_server (struct avctp_control_t *avctp_ctl, int8 server_channel,\n                            int (*avctp_notify_callback)(struct avctp_control_t *avctp_ctl, uint8 event, uint32 handle, void *pdata),\n                            void (*avctp_datarecv_callback)(struct avctp_control_t *avctp_ctl, uint32 handle, struct pp_buff *ppb)\n                            );\n                            \nint8 avctp_unregister_server (struct avctp_control_t *avctp_ctl, int8 server_channel);\n\nvoid avctp_init_packet_header(struct avctp_control_t *avctp_ctl, struct avctp_frame_t *frame, \n    int8 is_cmd, int8 ipid_ind, uint16 profile_ind);\nint8 avctp_send_message(struct avctp_control_t *avctp_ctl, struct avctp_frame_t *frame);\nint8 avctp_close(struct avctp_control_t *avctp_ctl);\nint8 avctp_open_i(struct avctp_control_t *avctp_ctl, struct bdaddr_t *remote,\n                  int (*avctp_notify_callback)(struct avctp_control_t *avctp_ctl, uint8 event, uint32 handle, void *pdata),\n                  void (*avctp_datarecv_callback)(struct avctp_control_t *avctp_ctl, uint32 handle, struct pp_buff *ppb),\n                  uint32 *avctp_handle);\nint8 avctp_disconnectReq (struct avctp_control_t *avctp_ctl);\n\nuint32 avctp_get_l2cap_handle(struct avctp_control_t *avctp_ctl);\nuint16 avctp_get_conn_handle(struct avctp_control_t *avctp_ctl);\nuint32 avctp_save_ctx(struct avctp_control_t *avctp_ctl, uint8_t *buf, uint32_t buf_len);\nuint32 avctp_restore_ctx(struct avctp_ctx_input *input, struct avctp_ctx_output *output);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __AVCTP_I_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/avdtp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __AVDTP_H__\n#define __AVDTP_H__\n\n#include \"avdtp_i.h\"\n#include \"l2cap_i.h\"\n#include \"btm.h\"\n\n#define MAX_SEID 0x3E\n\n#define AVDTP_DISCOVER 0x01\n#define AVDTP_GET_CAPABILITIES 0x02\n#define AVDTP_SET_CONFIGURATION 0x03\n#define AVDTP_GET_CONFIGURATION 0x04\n#define AVDTP_RECONFIGURE 0x05\n#define AVDTP_OPEN 0x06\n#define AVDTP_START 0x07\n#define AVDTP_CLOSE 0x08\n#define AVDTP_SUSPEND 0x09\n#define AVDTP_ABORT 0x0A\n#define AVDTP_SECURITY_CONTROL 0x0B\n#define AVDTP_GET_ALL_CAPABILITIES 0x0C\n#define AVDTP_DELAYREPORT 0x0D\n\n#define AVDTP_PKT_TYPE_SINGLE 0x00\n#define AVDTP_PKT_TYPE_START 0x01\n#define AVDTP_PKT_TYPE_CONTINUE 0x02\n#define AVDTP_PKT_TYPE_END 0x03\n\n#define AVDTP_MSG_TYPE_COMMAND 0x00\n#define AVDTP_MSG_TYPE_GENERAL_REJECT 0x01\n#define AVDTP_MSG_TYPE_ACCEPT 0x02\n#define AVDTP_MSG_TYPE_REJECT 0x03\n\n/* AVDTP error definitions */\n#define AVDTP_BAD_HEADER_FORMAT 0x01\n#define AVDTP_BAD_LENGTH 0x11\n#define AVDTP_BAD_ACP_SEID 0x12\n#define AVDTP_SEP_IN_USE 0x13\n#define AVDTP_SEP_NOT_IN_USE 0x14\n#define AVDTP_BAD_SERV_CATEGORY 0x17\n#define AVDTP_BAD_PAYLOAD_FORMAT 0x18\n#define AVDTP_NOT_SUPPORTED_COMMAND 0x19\n#define AVDTP_INVALID_CAPABILITIES 0x1A\n#define AVDTP_BAD_RECOVERY_TYPE 0x22\n#define AVDTP_BAD_MEDIA_TRANSPORT_FORMAT 0x23\n#define AVDTP_BAD_RECOVERY_FORMAT 0x25\n#define AVDTP_BAD_REPORT_FORMAT 0x65\n#define AVDTP_BAD_ROHC_FORMAT 0x26\n#define AVDTP_BAD_CP_FORMAT 0x27\n#define AVDTP_BAD_MULTIPLEXING_FORMAT 0x28\n#define AVDTP_UNSUPPORTED_CONFIGURATION 0x29\n#define AVDTP_BAD_STATE 0x31\n\n#define AVDTP_CONN_TIMEOUT //(HZ * 30)\n#define AVDTP_DISC_TIMEOUT //(HZ * 20)\n#define AVDTP_AUTH_TIMEOUT //(HZ * 25)\n\n#define AVDTP_DEFAULT_MTU 127\n#define AVDTP_DEFAULT_CREDITS 7\n\n#define AVDTP_MAX_L2CAP_MTU 1013\n#define AVDTP_MAX_CREDITS 40\n\n#define AVDTP_PPB_HEAD_RESERVE 8\n#define AVDTP_PPB_TAIL_RESERVE 2\n#define AVDTP_PPB_RESERVE (AVDTP_PPB_HEAD_RESERVE + AVDTP_PPB_TAIL_RESERVE)\n\ntypedef struct\n{\n\tU8 version; /* RTP Version */\n\n\tU8 padding; /* If the padding bit is set, the packet contains \n                         * one or more additional padding octets at the end, \n                         * which are not parts of the payload.  The last \n                         * octet of the padding contains a count of how many \n                         * padding octets should be ignored.  \n                         */\n\n\tU8 marker; /* Profile dependent.  Used to mark significant \n                         * events such as frame boundaries in the packet \n                         * stream.  \n                         */\n\n\tU8 payloadType; /* Profile dependent.  Identifies the RTP payload \n                         * type.  \n                         */\n\n\tU16 sequenceNumber; /* Incremented by one for each packet sent */\n\n\tU32 timestamp; /* Time stamp of the sample */\n\n\tU32 ssrc; /* Synchronization source */\n\n\tU8 csrcCount; /* The number of CSRC (Contributing Source) \n                         * identifiers that follow the fixed header.  \n                         */\n\n\tU32 csrcList[15]; /* List of CSRC identifiers */\n\n} avdtp_media_header_t;\n\nstruct avdtp_header\n{\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\tuint32 signal_id : 6;\n\tuint32 rfa0 : 2;\n\t//\tuint32 unused:16;\n} __attribute__((packed));\n\nstruct seid_req\n{\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\tuint32 signal_id : 6;\n\tuint32 rfa0 : 2;\n\tuint32 rfa1 : 2;\n\tuint32 acp_seid : 6;\n\tuint8 param[0];\n\t//\tuint32 unused:8;\n} __attribute__((packed));\n\nstruct discover_resp\n{\n\t//\tstruct avdtp_header header;\n\t//\tstruct seid_info *seps;\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\tuint32 signal_id : 6;\n\tuint32 rfa0 : 2;\n\n\tuint32 rfa1 : 1;\n\tuint32 inuse : 1;\n\tuint32 seid : 6;\n\tuint32 rfa2 : 3;\n\tuint32 type : 1;\n\tuint32 media_type : 4;\n} __attribute__((packed));\n\nstruct discover_rej\n{\n\t//\tstruct avdtp_header header;\n\t//\tstruct seid_info *seps;\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\tuint32 signal_id : 6;\n\tuint32 rfa0 : 2;\n    uint8  error_code;\n} __attribute__((packed));\n\n\n\nstruct security_control_req\n{\n\t//avdtp hrader\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\tuint32 signal_id : 6;\n\tuint32 rfa0 : 2;\n\tuint32 rfa2 : 2;\n\tuint32 acp_seid : 6;\n\t//Content Protection Method Dependent Data\n\tuint8 *data;\n} __attribute__((packed));\n\nstruct security_control_resp\n{\n\tstruct avdtp_header header;\n\tuint8 *data;\n} __attribute__((packed));\n\nstruct getcap_resp\n{\n\tstruct avdtp_header header;\n\tuint8 *caps;\n} __attribute__((packed));\n\nstruct getcap_req\n{\n    uint32 message_type : 2;\n    uint32 packet_type : 2;\n    uint32 transaction : 4;\n    uint32 signal_id : 6;\n    uint32 rfa0 : 2;\n    uint32 rfa2 : 2;\n    uint32 ACP_seid : 6;\n} __attribute__((packed));\n\n\nstruct start_req\n{\n\tstruct avdtp_header header;\n\n\tuint8 first_seid;\n\tuint8 *other_seids;\n} __attribute__((packed));\n\nstruct suspend_req\n{\n\tstruct avdtp_header header;\n\n\tuint8 first_seid;\n\tuint8 *other_seids;\n} __attribute__((packed));\n\nstruct setconf_req\n{\n\t//\tstruct avdtp_header header;\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\tuint32 signal_id : 6;\n\tuint32 rfa0 : 2;\n\n\tuint32 rfa2 : 2;\n\tuint32 acp_seid : 6;\n\tuint32 rfa1 : 2;\n\tuint32 int_seid : 6;\n\n\tuint8 *caps;\n} __attribute__((packed));\n\nstruct reconf_req\n{\n\t//\tstruct avdtp_header header;\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\tuint32 signal_id : 6;\n\tuint32 rfa0 : 2;\n\n\tuint32 rfa2 : 2;\n\tuint32 acp_seid : 6;\n\n\tuint8 *caps;\n} __attribute__((packed));\nstruct general_rej\n{\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\t//uint32 rfa0:8;\n\tuint32 signal_id : 6; //modified by owen.liu, for support version 1.3\n\tuint32 rfa0 : 2;\n} __attribute__((packed));\n\nstruct seid_rej\n{\n\t//\tstruct avdtp_header header;\n\tuint32 message_type : 2;\n\tuint32 packet_type : 2;\n\tuint32 transaction : 4;\n\tuint32 signal_id : 6;\n\tuint32 rfa0 : 2;\n\n\tuint32 error : 8;\n\tuint32 unused : 8;\n} __attribute__((packed));\n\nstruct conf_rej\n{\n\tstruct avdtp_header header;\n\tuint8 category;\n\tuint8 error;\n} __attribute__((packed));\n\nstruct stream_rej\n{\n\tstruct avdtp_header header;\n\tuint8 acp_seid;\n\tuint8 error;\n} __attribute__((packed));\n\nstruct avdtp_session\n{\n\tuint32 l2cap_handle;\n\tuint8 state;\n} __attribute__((packed));\n\nenum avdtp_session_state_enum\n{\n\tAVDTP_SESSION_CLOSE,\t /* l2cap connection closed, wait for openning, and then can send out sabm request */\n\tAVDTP_SESSION_CONNECTED, /* l2cap channel created */\n\tAVDTP_SESSION_OPEN\t\t /* avdtp session open, ready for start stream */\n};\n\n\n\n//int8 avdtp_open(struct avdtp_session *session, struct avdtp_stream *stream);\n\n/* flow control states */\n#define AVDTP_CFC_DISABLED 0\n#define AVDTP_CFC_ENABLED AVDTP_DEFAULT_CREDITS\n\n#define AVDTP_CFG_SESSIONS_MAX 5 /* means how many l2cap channel */\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n\nint8 avdtp_send(uint32 avdtp_handle, uint8 *data, uint32 datalen);\nint avdtp_l2cap_notify_callback(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason);\nvoid avdtp_l2cap_datarecv_callback(uint32 l2cap_handle, struct pp_buff *ppb);\nstruct avdtp_control_t *avdtp_ctl_search_l2caphandle(uint32 l2cap_handle);\nvoid avdtp_free_remote_sep_list(void);\nstruct avdtp_local_sep* avdtp_find_same_device_other_sep(struct avdtp_local_sep *sep);\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __AVDTP_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/avdtp_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __AVDTP_I_H__\n#define __AVDTP_I_H__\n\n#include \"btlib.h\"\n#include \"co_ppbuff.h\"\n#include \"bt_co_list.h\"\n#include \"bt_common.h\"\n#include \"avdtp.h\"\n\nenum avdtp_event_enum\n{\n    AVDTP_OPENED,\n    AVDTP_ACCEPT_OPENED,\n    AVDTP_MEDIA_OPENED,\n    AVDTP_CLOSED\n};\n\ntypedef enum\n{\n    AVDTP_STATE_IDLE,\n    AVDTP_STATE_DISCOVER,\n    AVDTP_STATE_GETCAP,\n    AVDTP_STATE_SETCONFIG,\n    AVDTP_STATE_CONFIGURED,\n    AVDTP_STATE_OPEN,\n    AVDTP_STATE_STREAMING,\n    AVDTP_STATE_CLOSING,\n    AVDTP_STATE_ABORTING\n} avdtp_state_t;\n\n/* SEP types definitions */\n#define AVDTP_SEP_TYPE_SOURCE 0x00\n#define AVDTP_SEP_TYPE_SINK 0x01\n\n/* Media types definitions */\n#define AVDTP_MEDIA_TYPE_AUDIO 0x00\n#define AVDTP_MEDIA_TYPE_VIDEO 0x01\n#define AVDTP_MEDIA_TYPE_MULTIMEDIA 0x02\n\n/* SEP capability categories */\n#define AVDTP_MEDIA_TRANSPORT 0x01\n#define AVDTP_REPORTING 0x02\n#define AVDTP_RECOVERY 0x03\n#define AVDTP_CONTENT_PROTECTION 0x04\n#define AVDTP_HEADER_COMPRESSION 0x05\n#define AVDTP_MULTIPLEXING 0x06\n#define AVDTP_MEDIA_CODEC 0x07\n#define AVDTP_DELAY_REPORTING 0x08\n\n#define AVDTP_CFG_SERVER_CHANNEL 0x07\n\n/* AVDTP Content Protection Type */\n#define AVDTP_CP_TYPE_DTCP      0x0001\n#define AVDTP_CP_TYPE_SCMS_T    0x0002\n\nstruct seid_info\n{\n    uint32 rfa0 : 1;\n    uint32 inuse : 1;\n    uint32 seid : 6;\n    uint32 rfa2 : 3;\n    uint32 type : 1;\n    uint32 media_type : 4;\n    //  uint32 unused:16;\n} __attribute__((packed));\nstruct avdtp_service_capability\n{\n    uint8 category;\n    uint8 length;\n    uint8 data[1];\n} __attribute__((packed));\n\nstruct avdtp_media_codec_capability\n{\n    uint8 media_codec_type;\n    uint8 len;\n    uint8 *data;\n} __attribute__((packed));\n\n\nstruct avdtp_media_content_protect_capability\n{\n    uint16 protect_type;\n    uint8 len;\n    uint8 *data;\n} __attribute__((packed));\n\n\nstruct avdtp_media_delay_report_capability\n{\n    uint8 len;\n} __attribute__((packed));\n\nstruct avdtp_service_cap_req\n{\n    struct avdtp_service_capability *cap;\n    uint8  parse_error;\n}__attribute__((packed));\n\n\n\nstruct avdtp_config_request\n{\n    struct avdtp_service_cap_req *trans_cap;\n    struct avdtp_service_cap_req *codec_cap;\n    struct avdtp_service_cap_req *cp_cap;\n    struct avdtp_service_cap_req *dr_cap;\n    struct avdtp_service_cap_req *rp_cap;\n    struct avdtp_service_cap_req *mp_cap;\n    struct avdtp_service_cap_req *hc_cap;\n    struct avdtp_service_cap_req *rc_cap;\n\n    struct avdtp_service_cap_req *unknown_cap;\n};\n\nstruct avdtp_local_sep\n{\n    struct seid_info info;\n    uint8 codec;\n    struct avdtp_sep_ind *ind;\n    struct avdtp_sep_cfm *cfm;\n    void *user_data;\n    void *a2dp_stream;\n    uint8 delay_reporting_support;\n    uint16 dr_delay_ms;\n    uint8 device_id;\n    struct avdtp_local_sep *next;\n};\n\nstruct avdtp_remote_sep\n{\n    uint8 seid;\n    uint8 transact_id;\n    uint8 delay_reporting_support;\n    uint16 avdtp_cp_type;\n    struct avdtp_service_capability *codec;\n    struct avdtp_remote_sep *next;\n};\n\nstruct avdtp_control_t\n{\n    int8 avdtp_channel;\n    struct bdaddr_t remote;\n    uint8 remote_seid;\n    uint8 same_sepid_workaround_for_redmi5;\n    uint8 delay_reporting_enabled_on_the_stream;\n\n    void (*notify_callback)(uint8 event, uint32 l2cap_channel, void *pdata, uint8 reason);\n    void (*datarecv_callback)(uint32 l2cap_channel, struct pp_buff *ppb);\n    void (*discover_cb)(struct avdtp_control_t *avdtp_ctl, struct avdtp_remote_sep *);\n    uint8 discover_cnt;\n\n    avdtp_state_t state;\n\n    struct avdtp_session *signal_session;\n    struct avdtp_session *media_session;\n    void *a2dp_stream;\n    struct avdtp_local_sep *local_sep;\n    BOOLEAN initiator;\n    struct avdtp_control_t *next;\n    void * cur_op;\n\n    uint8 delay_resp_discover_req;\n    uint8 discover_req_transaction;\n};\n\nstruct avdtp_ctx_input {\n    struct ctx_content ctx;\n    struct bdaddr_t *remote;\n    struct avdtp_control_t *avdtp_ctl;\n    avdtp_state_t state;\n    uint32_t seid;\n    uint32 sig_handle;\n    uint32 med_handle;\n    void (*avdtp_notify_callback)(uint8 event, uint32 l2cap_channel, void *pdata, uint8 reason);\n    void (*avdtp_datarecv_callback)(uint32 l2cap_handle, struct pp_buff *ppb);\n};\n\nstruct avdtp_ctx_output {\n    struct avdtp_control_t *avdtp_ctl;\n    struct avdtp_local_sep *local_sep;\n};\n\n//callback functions for dealing with remote response to local command\nstruct avdtp_sep_cfm\n{\n    void (*setconf)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep );\n    void (*getconf)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep );\n    void (*open)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep );\n    void (*start)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep );\n    void (*suspend)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep );\n    void (*close)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep );\n    void (*abort)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep );\n    void (*reconf)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep );\n    void (*security_control)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep , struct avdtp_media_content_protect_capability* cp);\n};\n//callback functions to deal with remote command\nstruct avdtp_sep_ind\n{\n    uint8 *(*getcap)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep , uint16 *len, uint8 sig_type);\n    int8 (*setconf)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep , struct avdtp_config_request* cfg_req);\n    int8 (*open)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep);\n    int8 (*start)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep);\n    int8 (*suspend)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep);\n    int8 (*close)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep);\n    int8 (*abort)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep);\n    int8 (*reconf)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep, struct avdtp_config_request* cfg_req);\n    int8 (*security_control)(struct avdtp_control_t *avdtp_ctl,struct avdtp_local_sep *local_sep , struct avdtp_media_content_protect_capability* cp);\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint8 avdtp_init(int8 server_channel,\n                void (*avdtp_notify_callback)(uint8 event, uint32 l2cap_channel, void *pdata, uint8 reason),\n                void (*avdtp_datarecv_callback)(uint32 l2cap_handle, struct pp_buff *ppb));\nuint32 avdtp_open_i(void *a2dp_ctl, struct bdaddr_t *remote);\nint8 avdtp_close_i(struct bdaddr_t *remote);\n\nint8 avdtp_send_delay_report(struct avdtp_control_t * avdtp_ctl, uint16 delay_ms);\n\nint8 avdtp_send_security_control_req(struct avdtp_control_t *stream, uint8_t *data, uint16_t len);\n\nint8 avdtp_send_security_control_resp(struct avdtp_control_t *stream,\n                                      uint8_t *data, uint16_t len, uint8 error);\n\nstruct avdtp_local_sep *avdtp_register_sep(uint8 device_id,\n                                           uint8 type,\n                                           struct avdtp_sep_ind *indi,\n                                           struct avdtp_sep_cfm *cnfm);\nint8 avdtp_unregister_sep(struct avdtp_local_sep *sep);\nint8 avdtp_discover(void (*discover_cb)(struct avdtp_control_t *avdtp_ctl, struct avdtp_remote_sep *),uint32_t l2csig_handle);\nint8 avdtp_force_close(uint32_t l2csig_handle);\nvoid avdtp_discover_cap(uint32_t l2csig_handle);\nint8 avdtp_set_configuration(struct avdtp_control_t *avdtp_ctl, struct avdtp_remote_sep *rsep, uint8 local_sepid, uint8 *conf_data, uint16 caps_len);\n\nint8 avdtp_send_command_with_param(struct avdtp_control_t *avdtp_ctl, uint32 signal_id, uint8 *params, uint32 param_len);\n\n#define avdtp_send_command_len3(c,s) \\\n    avdtp_send_command_with_param(c,s,NULL,0)\n\n#define avdtp_open(avdtp_ctl) \\\n    avdtp_send_command_len3(avdtp_ctl, AVDTP_OPEN)\n\n#define avdtp_start(avdtp_ctl) \\\n    avdtp_send_command_len3(avdtp_ctl, AVDTP_START)\n\n#define avdtp_close(avdtp_ctl) \\\n    avdtp_send_command_len3(avdtp_ctl, AVDTP_CLOSE)\n\n#define avdtp_suspend(avdtp_ctl) \\\n    avdtp_send_command_len3((avdtp_ctl), AVDTP_SUSPEND)\n\n#define avdtp_abort(avdtp_ctl) \\\n    avdtp_send_command_len3((avdtp_ctl), AVDTP_ABORT)\n\n//int8 avdtp_discover(struct avdtp_session *session, void (*discover_cb)(struct avdtp_session *s, GSList *sep, uint8 err, void *user_data));\n\nuint32 avdtp_get_signal_l2cap_handle(struct avdtp_control_t *avdtp_ctl);\nuint32 avdtp_get_media_l2cap_handle(struct avdtp_control_t *avdtp_ctl);\nuint32 avdtp_save_ctx(struct avdtp_control_t *avdtp_ctl, uint8_t *buf, uint32_t buf_len);\nuint32 avdtp_restore_ctx(struct avdtp_ctx_input *input, struct avdtp_ctx_output *output);\nvoid avdtp_set_synced_streaming_state(struct bdaddr_t *addr);\n\nvoid pts_send_discover_cmd(void);\nvoid pts_send_get_capability_cmd(void);\nvoid pts_send_set_configuration_cmd(void);\nvoid pts_send_get_configuration_cmd(void);\nvoid pts_send_reconfigure_cmd(void);\nvoid pts_send_open_cmd(void);\nvoid pts_send_close_cmd(void);\nvoid pts_send_abort_cmd(void);\nvoid pts_send_get_all_capability_cmd(void);\nvoid pts_send_suspend_cmd(void);\nvoid pts_send_start_cmd(void);\n\nconst char *avdtp_state2str(avdtp_state_t state);\nconst char *avdtp_event2str(enum avdtp_event_enum event);\n\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __AVDTP_I_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/avrcp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __AVRCP_H__\n#define __AVRCP_H__\n\n#include \"btlib_type.h\"\n#include \"avctp_i.h\"\n\n#define AVRCP_BT_COMPANY_ID \"\\x00\\x19\\x58\"\n \n /* Define Opcode */\n#define AVRCP_OPCODE_UNIT_INFO       0x30\n#define AVRCP_OPCODE_SUBUNIT_INFO    0x31\n#define AVRCP_OPCODE_PASS_THROUGH    0x7C\n#define AVRCP_OPCODE_VENDOR_DEP      0x00\n\n/* Define Command Type*/\n#define AVRCP_CTYPE_CONTROL   0x00\n#define AVRCP_CTYPE_STATUS    0x01\n#define AVRCP_CTYPE_NOTIFY    0x03\n#define AVCTP_CTYPE_GENERAL_INQUIRY       0x04\n\n/* Response */\n#define AVRCP_RESPONSE_STABLE    0x0C\n\n/* Define PASSTHROUGH OP_ID */\n#define AVRCP_OP_ID_PLAY    0x44\n#define AVRCP_OP_ID_STOP    0x45\n#define AVRCP_OP_ID_PAUSE   0x46\n#define AVRCP_OP_ID_REC     0x47\n#define AVRCP_OP_ID_FB      0x48\n#define AVRCP_OP_ID_FF      0x49\n#define AVRCP_OP_ID_FW      0x4B\n#define AVRCP_OP_ID_BW      0x4C\n\n#define AVRCP_OP_NEXT_GROUP  0x017E\n#define AVRCP_OP_PREV_GROUP  0x027E\n\n#define AVRCP_BTN_PUSHED\t0x00\n#define AVRCP_BTN_RELEASED\t0x80\nint avrcp_notify_callback(struct avctp_control_t *avctp_ctl, uint8 event, uint32 handle, void *pdata);\nvoid avrcp_datarecv_callback(struct avctp_control_t *avctp_ctl, uint32 handle, struct pp_buff *ppb);\n\n#endif /* __AVRCP_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/avrcp_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __AVRCP_I_H__\n#define __AVRCP_I_H__\n\n#include \"bt_co_list.h\"\n#include \"btlib_type.h\"\n#include \"btm_i.h\"\n#include \"avctp_i.h\"\n#include \"sdp.h\"\n\n#define AVRCP_RECVDATA_BUF_SIZE 48\n\n#define AVRCP_UINT_INFO_IND      0x30\n#define AVRCP_SUBUNIT_INFO_IND   0x31\n#define AVRCP_PASSTHROUGH_IND    0x7C\n#define AVRCP_VENDOR_DEP_IND     0x00\n\n#define AVRCP_RESP_NOT_IMPLEMENTED  0x08\n#define AVRCP_RESP_ACCEPT           0x09\n#define AVRCP_RESP_REJECT           0x0A\n#define AVRCP_RESP_STABLE           0x0C\n#define AVRCP_RESP_CHANGED          0x0D\n#define AVRCP_RESP_INTERIM          0x0F\n\n#define AVRCP_OP_GET_CAPABILITIES               0x10\n#define AVRCP_OP_LIST_PLAYER_SETTING_ATTRIBS    0x11\n#define AVRCP_OP_LIST_PLAYER_SETTING_VALUES     0x12\n#define AVRCP_OP_GET_PLAYER_SETTING_VALUE       0x13\n#define AVRCP_OP_SET_PLAYER_SETTING_VALUE       0x14\n#define AVRCP_OP_GET_PLAYER_SETTING_ATTR_TEXT   0x15\n#define AVRCP_OP_GET_PLAYER_SETTING_VALUE_TEXT  0x16\n#define AVRCP_OP_INFORM_DISP_CHAR_SET           0x17\n#define AVRCP_OP_INFORM_BATT_STATUS             0x18\n#define AVRCP_OP_GET_MEDIA_INFO                 0x20\n#define AVRCP_OP_GET_PLAY_STATUS                0x30\n#define AVRCP_OP_REGISTER_NOTIFY                0x31\n#define AVRCP_OP_REQUEST_CONT_RESP              0x40\n#define AVRCP_OP_ABORT_CONT_RESP                0x41\n#define AVRCP_OP_SET_ABSOLUTE_VOLUME            0x50\n#define AVRCP_OP_SET_ADDRESSED_PLAYER           0x60\n#define AVRCP_OP_SET_BROWSED_PLAYER             0x70\n#define AVRCP_OP_GET_FOLDER_ITEMS               0x71\n#define AVRCP_OP_CHANGE_PATH                    0x72\n#define AVRCP_OP_GET_ITEM_ATTRIBUTES            0x73\n#define AVRCP_OP_PLAY_ITEM                      0x74\n#define AVRCP_OP_SEARCH                         0x80\n#define AVRCP_OP_ADD_TO_NOW_PLAYING             0x90\n#define AVRCP_OP_GENERAL_REJECT                 0xA0\n#define AVRCP_OP_CUSTOM_CMD\t\t\t\t\t\t0xF0\n\nenum avrcp_role_enum {\n    AVRCP_MASTER,\n    AVRCP_SLAVE\n};\nenum avrcp_event_t {\n//    AVRCP_TURN_ON = 1,\n//    AVRCP_TURN_OFF,\n    AVRCP_PLAY_REQ = 1, //241\n    AVRCP_PAUSE_REQ,\n    AVRCP_STOP_REQ,\n    AVRCP_RECORD_REQ,\n    AVRCP_FORWARD_REQ,\n    AVRCP_BACKWARD_REQ,\n    AVRCP_FAST_FORWARD_START_REQ,\n    AVRCP_FAST_BACKWARD_START_REQ,\n    AVRCP_FF_FB_STOP_REQ,\n    AVRCP_CONN_REQ, //250\n    AVRCP_DISCONN_REQ,\n\n//   AV_C_EVNT_BEGIN,\n    AVRCP_CHANNEL_OPENED,\n    AVRCP_CHANNEL_NEW_OPEN,\n    AVRCP_CHANNEL_CLOSED,\n    AVRCP_CHANNEL_TX_HANDLED,\n    AVRCP_CHANNEL_RESPONSE,\n    AVRCP_CHANNEL_COMMAND,\n    AVRCP_CHANNEL_DATA_IND,\n    AVRCP_RESPONSE            //no more than 15\n};\n\n\nenum avrcp_state_enum {\n    AVRCP_STOP,\n    AVRCP_STANDBY = 1,  //ready\n    AVRCP_QUERING,\n    AVRCP_CONNECTING,\n    AVRCP_CONNECTED\n //   AVRCP_BUSY\n};\n\nenum music_state_enum {\n    MUSIC_NO_ACTION,\n    MUSIC_PLAYING,\n    MUSIC_PAUSE,\n    MUSIC_RESUME,\n    MUSIC_STOP\n};\n\nstruct avrcp_control_t {\n    struct list_node node;\n    struct avctp_control_t avctp_ctl;\n    enum avrcp_role_enum role;\n    struct bdaddr_t remote;\n    enum avrcp_state_enum state;\n    uint32 handle;\n    uint8 op_code;\n    uint8 op_id;\n    struct avctp_frame_t pnl_cmd;\n    struct avctp_frame_t adv_cmd;\n    struct avctp_frame_t adv_rsp;\n    struct avctp_frame_t unitinfo_cmd;\n    struct avctp_frame_t subunitinfo_cmd;\n    uint8 pnl_cmd_buff[64];\n    uint8 adv_cmd_buff[128];\n    uint8 adv_rsp_buff[128];\n    uint8 unitinfo_cmd_buff[64];\n    uint8 is_src_playing;\n    uint8 is_volume_sync;\n   \n    void (*indicate) (struct avrcp_control_t *avrcp_ctl, uint8 event, void *pdata);\n    void (*data_cb) (struct avrcp_control_t *avrcp_ctl, struct pp_buff *ppb);\n\n    struct sdp_request sdp_request;\n    uint16 remote_avctp_version;\n    uint16 remote_avrcp_version;\n    uint16 remote_support_features;\n    bool conn_avctp_after_sdp;\n};\n\nstruct avrcp_advanced_cmd_pdu {\n    struct list_node node;\n    uint8 op;\n    U16 parm_len;\n    U8 *parms;\n    U8  trans_id;\n\n    BOOL more;\n    U16  cur_len;\n    U16  bytes_to_send;\n    U8   cont_op;\n    BOOL abort;\n\n    BOOL  internal;\n    U8  response;\n    U8 error;\n\n    BOOL is_cmd;\n    U8  ctype;          /* 4 bits */\n};\n\nstruct avrcp_adv_cmd_rsp_cb_parms {\n    uint8 rsp;\n    uint8 subunit_type;\n    uint8 subunit_id;\n    uint8 op_code;\n    uint8 *origin_data;\n    uint8 *op_data;\n    uint16 op_data_len;\n};\n\nstruct avrcp_adv_cmd_cb_parms {\n    uint8 ctype;\n    uint8 subunit_type;\n    uint8 subunit_id;\n    uint8 op_code;\n    uint8 *origin_data;\n    uint8 *op_data;\n    uint16 op_data_len;\n};\n\nstruct avrcp_ctx_input {\n    struct ctx_content ctx;\n    struct bdaddr_t *remote;\n    struct avrcp_control_t *avrcp_ctl;\n};\n\nstruct avrcp_ctx_output {\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n/* AVRCP APP */\nvoid app_callback(uint8 event, void *pdata);\n\n/* AVRCP */\nint8 avrcp_init_inst(struct avrcp_control_t *avrcp_ctl, void (*indicate) (struct avrcp_control_t *avrcp_ctl, uint8 event, void *pdata),\n                void (*datarecv_callback) (struct avrcp_control_t *avrcp_ctl, struct pp_buff *ppb));\n                \nenum avrcp_state_enum avrcp_getState(struct avrcp_control_t *avrcp_ctl);\nvoid avrcp_setState(struct avrcp_control_t *avrcp_ctl, enum avrcp_state_enum state);\nint8 avrcp_turnOn(struct avrcp_control_t *avrcp_ctl);\nint8 avrcp_turnOff(struct avrcp_control_t *avrcp_ctl);\nint8 avrcp_connectReq(struct avrcp_control_t *avrcp_ctl, struct bdaddr_t *peer);\nint8 avrcp_disconnectReq(struct avrcp_control_t *avrcp_ctl);\nint8 avrcp_send_cmd(struct avrcp_control_t *avrcp_ctl, int op);\n\n/* Used by Controller to Send Command */\nbool avrcp_is_advanced_command_can_send(struct avrcp_control_t * avrcp_ctl, bool is_cmd);\nint8 avrcp_send_advanced_command(struct avrcp_control_t *avrcp_ctl, struct avrcp_advanced_cmd_pdu *pdu);\nint8 avrcp_send_advanced_response(struct avrcp_control_t *avrcp_ctl, struct avrcp_advanced_cmd_pdu *pdu);\nint8 avrcp_send_panel_key(struct avrcp_control_t *avrcp_ctl, uint16 op, uint8 press);\nbool avrcp_is_control_channel_connected(struct avrcp_control_t *avrcp_ctl);\nint8 avrcp_is_panel_cmd_can_send(struct avrcp_control_t *avrcp_ctl);\nint8 avrcp_send_panel_response(struct avrcp_control_t *avrcp_ctl, uint16 op, uint8 press, uint8 response);\nint8 avrcp_send_unit_info_cmd(struct avrcp_control_t *avrcp_ctl);\nint8 avrcp_send_unit_info_response(struct avrcp_control_t *avrcp_ctl);\nint8 avrcp_send_subunit_info_response(struct avrcp_control_t *avrcp_ctl);\nvoid avrcp_register_panel_command_tx_handled_callback(void (*cb)(struct avrcp_control_t *avrcp_ctl, void *pdata));\n\nstruct avctp_control_t *avrcp_get_avctp_control(struct avrcp_control_t *avrcp_ctl);\nuint16 avrcp_get_conn_handle(struct avrcp_control_t* avrcp_ctl);\nuint32 avrcp_save_ctx(struct avrcp_control_t *avrcp_ctl, uint8_t *buf, uint32_t buf_len);\nuint32 avrcp_restore_ctx(struct avrcp_ctx_input *input, struct avrcp_ctx_output *output);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __AVRCP_I_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/bes_os.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \n#include \n\n/* all platform dependences shoule be included only here */\n\n#include \"cmsis_os.h\"\n#include \"cmsis.h\"\n#include \"plat_types.h\"\n#include \"hal_trace.h\"\n#include \"hal_timer.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"intersyshci.h\"\n#include \"besbt_cfg.h\"\n#include \"osif.h\"\n#include \"ddbif.h\"\n#include \"btlib_type.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#define Plt_Assert ASSERT\n#define Plt_TICKS_TO_MS(ticks) TICKS_TO_MS(ticks)\n#define Plt_DUMP8 DUMP8\n\n#define OS_CRITICAL_METHOD      0\n#define OS_ENTER_CRITICAL()     uint32_t os_lock = int_lock()\n#define OS_EXIT_CRITICAL()      int_unlock(os_lock)\n#define OSTimeDly(a)            osDelay((a)*2)\n\n\n#if defined(__cplusplus)\n}\n#endif"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/besaud.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BESAUD_H__\n#define __BESAUD_H__\n\n#include \"bluetooth.h\"\n#include \"bt_co_list.h\"\n#include \"btm.h\"\n#include \"btlib_type.h\"\n\n#define BESAUD_PACKET_COUNT (5)\n\ntypedef struct _BesaudCallbackParms BesaudCallbackParms;\ntypedef struct _BesaudChannel   BesaudChannel;\n\ntypedef struct _BesaudConn BesaudConn;\ntypedef struct _BesaudConnCallbackParms BesaudConnCallbackParms;\n\ntypedef void (*BesaudConnCallback)(BesaudConn *Conn, BesaudConnCallbackParms *Parms);\n\n/* Connection State */\nstruct _BesaudConn {\n    uint32 l2cap_handle;\n    uint8                state;\n    BesaudConnCallback callback;\n};\n\nstruct _BesaudConnCallbackParms {\n    uint8         event;\n    int8          status;\n    uint16        dataLen;\n    union {\n        struct btm_conn_item_t *remDev;\n        uint8             *data;\n    } ptrs;\n};\n\nint8 BesaudDisconnect(struct btm_conn_item_t *RemDev);\nBOOL BesaudIsConnected(BesaudConn *Conn);\nint8 BesaudConnect(BesaudChannel *chnl, struct btm_conn_item_t *RemDev);\n\ntypedef uint16 BesaudEvent;\n\ntypedef struct\n{\n    struct list_node node;\n\tuint8* \t\tpBuf;\n\tuint16\t\tpDataLength;\n} BesaudPacket;\n\nstruct _BesaudCallbackParms{\n    BesaudEvent    event;\n\n    int8    status;\n    int8    errCode;\n    BesaudChannel *chnl;\n    union{\n        struct btm_conn_item_t *remDev;\n        BesaudPacket   Packet;\n    }p;\n};\n\n/*--------------------------------------------------------------------------\n * BESAUDChannelStates type\n *\n *     This type enumerates the possible BESAUD channel connection\n *     states.\n */\ntypedef uint8 BesaudChannelStates;\n\n/* End of HfChannelStates */\n\ntypedef void (*BesaudCallback)(BesaudChannel *Chan, BesaudCallbackParms *Info);\n\n\nstruct _BesaudChannel{\n    struct list_node node;\n    struct btm_conn_item_t *remDev;\n    BesaudCallback          callback;         /* Application callback*/\n    BesaudConn          besaudc_conn;\n    BesaudChannelStates     state;           /* Current connection state      */\n    uint16                 flags;           /* Current connection flags      */\n    struct list_node freeTxPacketList;\n    struct list_node pendingTxPacketList;\n    uint8    initiator;\n    uint8    tx_state;\n    BesaudPacket *curr_tx_packet;\n};\n\n#ifndef BESAUDC_MAX_MTU\n#define BESAUDC_MAX_MTU L2CAP_MTU\n#endif\n\n\n#ifndef BESAUDI_MAX_MTU\n#define BESAUDI_MAX_MTU L2CAP_MTU\n#endif\n\n\n////besaud channel state\n#define BESAUD_STATE_DISCONNECTED   0\n#define BESAUD_STATE_CONN_PENDING   1\n#define BESAUD_STATE_CONN_INCOMING  2\n#define BESAUD_STATE_DISC_PENDING   3\n#define BESAUD_STATE_DISC_INCOMING  4\n#define BESAUD_STATE_CONNECTED      5\n\n////channel tx state\n#define BESAUD_TX_STATE_IDLE 0\n#define BESAUD_TX_STATE_IN_TX 1\n\n#define BESAUD_REPORT_TYPE_INPUT     1\n#define BESAUD_REPORT_TYPE_OUTPUT     2\n#define BESAUD_REPORT_TYPE_FEATURE     3\n\n\n\n#define BESAUD_TRANS_TYPE_HANDSHAKE    0\n#define BESAUD_TRANS_TYPE_CONTROL        1\n#define BESAUD_TRANS_TYPE_GET_REPORT        4\n#define BESAUD_TRANS_TYPE_SET_REPORT        5\n#define BESAUD_TRANS_TYPE_GET_PROTOCAL        6\n#define BESAUD_TRANS_TYPE_SET_PROTOCAL        7\n#define BESAUD_TRANS_TYPE_GET_IDLE        8\n#define BESAUD_TRANS_TYPE_SET_IDLE        9\n#define BESAUD_TRANS_TYPE_DATA        10\n#define BESAUD_TRANS_TYPE_DATAC        11\n\n\n#define BESAUD_HANDSHAKE_SUCCESS    0\n#define BESAUD_HANDSHAKE_NOT_READY    1\n#define BESAUD_HANDSHAKE_INVALID_REPORTID    2\n#define BESAUD_HANDSHAKE_UNSUPPORT_REQUEST    3\n#define BESAUD_HANDSHAKE_INVALID_PARAM   4\n#define BESAUD_HANDSHAKE_ERROR_UNKNOWN    0xe\n#define BESAUD_HANDSHAKE_ERROR_FATAL   0xF\n\n\n#define BESAUD_CONTROL_NOP        0\n#define BESAUD_CONTROL_HARD_RESET   1\n#define BESAUD_CONTROL_SOFT_RESET   2\n#define BESAUD_CONTROL_SUSPEND   3\n#define BESAUD_CONTROL_EXIT_SUSPEND   4\n#define BESAUD_CONTROL_VIRTUAL_CABLE_UNPLUG   5\n\n#define BESAUD_CHANNEL_TYPE_INTERRUPT     0\n#define BESAUD_CHANNEL_TYPE_CONTROL     1\n\n\n\n#define BESAUD_DATA_TXSTATE_IDLE            0\n#define BESAUD_DATA_TXSTATE_SEND            1\n\n\n\n#define BESAUD_EVENT_CONTROL_CONNECTED               0x21\n\n#define BESAUD_EVENT_CONTROL_DISCONNECTED         0x22\n\n#define BESAUD_EVENT_CONTROL_DATA_IND                0x23\n\n#define BESAUD_EVENT_CONTROL_DATA_SENT              0x24\n\n\n#define BESAUD_EVENT_CONTROL_SET_IDLE              0x30\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint8 BESAUD_Init(void);\nint8 Besaud_Register(BesaudChannel *chnl,\n                        BesaudCallback    callback\n                        );\nint8 Besaud_Connect(BesaudChannel *chnl, struct btm_conn_item_t *RemDev);\nint8 Besaud_Disconnect(BesaudChannel *chnl);\nint8 Besaud_Send_packet(BesaudChannel *chnl, char *buffer, uint16 nBytes);\nint8 Besaud_Send_cmd_packet(BesaudChannel *chnl, char *buffer, uint16 nBytes);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __BESAUD_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/besaudalloc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BESAUDALLOC_H__\n#define __BESAUDALLOC_H__\n\ntypedef struct _BtBesaudContext {\n    struct list_node channelList;\n    uint16 besaudcpsm;\n} BtBesaudContext;\n\nextern BtBesaudContext besaudContext;\n#define BESAUD(s) (besaudContext.s)\n\nint8 BesaudAlloc(void);\n\n#endif /* __BESAUDALLOC_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/bt_co_list.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BT_CO_LIST_H__\n#define __BT_CO_LIST_H__\n\n#include \"btlib_more.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define ITER_WARN \"list too much loop=%d!!!!\"\n\n#if !defined(ITER_ASSERT)\n\n#if defined(ASSERT_SHOW_FILE_FUNC)\n#define ITER_ASSERT(head)  hal_trace_assert_dump(__FILE__, __FUNCTION__, __LINE__, ITER_WARN, (head)->__iter__cnt)\n#elif defined(ASSERT_SHOW_FILE)\n#define ITER_ASSERT(head)  hal_trace_assert_dump(__FILE__, __FUNCTION__, __LINE__, ITER_WARN, (head)->__iter__cnt)\n#elif defined(ASSERT_SHOW_FUNC)\n#define ITER_ASSERT(head)  hal_trace_assert_dump(__FUNCTION__, __LINE__, ITER_WARN, (head)->__iter__cnt)\n#else\n#define ITER_ASSERT(head)  hal_trace_assert_dump(ITER_WARN, (head)->__iter__cnt)\n#endif\n\n#endif /* ITER_ASSERT */\n\n#if 1\n#define ITER_INIT(head) ,(head)->__iter__cnt = 0\n#define ITER_CHK(head) ,((head)->__iter__cnt>100?ITER_ASSERT((head)):(void)((head)->__iter__cnt++))\n#else\n#define ITER_INIT(head)\n#define ITER_CHK(head)\n#endif\n\n#ifndef OFFSETOF\n#define OFFSETOF(type, member) ((unsigned int) &((type *)0)->member)\n#endif\n\n#ifndef CONTAINER_OF\n#define CONTAINER_OF(ptr, type, member) ((type *)( (char *)ptr - OFFSETOF(type,member) ))\n#endif\n\nstruct list_node {\n    struct list_node *next;\n    struct list_node *prev;\n    unsigned int __iter__cnt;\n};\n\n#define DEF_LIST_HEAD(head) \\\n    struct list_node head = { &(head), &(head) }\n\n#define INIT_LIST_HEAD(head) do { \\\n    (head)->next = (head); (head)->prev = (head); \\\n} while (0)\n\nvoid colist_addto_head(struct list_node *n, struct list_node *head);\nvoid colist_addto_tail(struct list_node *n, struct list_node *head);\nvoid colist_delete(struct list_node *entry);\nvoid colist_moveto_head(struct list_node *list, struct list_node *head);\nint colist_is_node_on_list(struct list_node *list, struct list_node *node);\nstruct list_node *colist_get_head(struct list_node *head);\nint colist_is_list_empty(struct list_node *head);\n\n#define colist_structure(ptr, type, member) \\\n    ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))\n#define colist_iterate(pos, head) \\\n    for (pos = (head)->next ITER_INIT((head)); pos != (head); \\\n            pos = pos->next ITER_CHK((head)))\n#define colist_iterate_prev(pos, head) \\\n    for (pos = (head)->prev ITER_INIT((head)); pos != (head); \\\n            pos = pos->prev ITER_CHK((head))\n#define colist_iterate_safe(pos, n, head) \\\n    for (pos = (head)->next, n = pos->next ITER_INIT((head)); pos != (head); \\\n        pos = n, n = pos->next ITER_CHK((head)))\n#define colist_iterate_entry(pos, type, head, member)               \\\n    for (pos = colist_structure((head)->next, type, member) ITER_INIT((head));            \\\n         &pos->member != (head);                    \\\n         pos = colist_structure(pos->member.next, type, member) ITER_CHK((head)))\n#define colist_iterate_entry_safe(pos, n, type, head, member)           \\\n    for (pos = colist_structure((head)->next, type, member),    \\\n        n = colist_structure(pos->member.next, type, member) ITER_INIT((head));   \\\n         &pos->member != (head);                    \\\n         pos = n, n = colist_structure(n->member.next, type, member) ITER_CHK((head)))\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __BT_CO_LIST_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/bt_common.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BT_COMMON_H__\n#define __BT_COMMON_H__\n\n/* This file should be included in every source code file in stack */\n\n#include \"bt_sys_cfg.h\" // include cobt.h, cobt.h is independent header for including definations about bluetooth\n#include \"btlib_type.h\" // global types\n#include \"platform_deps.h\" // all platform dependence are in here\n#include \"debug_cfg.h\"\n#include \"btlib.h\" // some utility or helper macros, functions\n#include \"btlib_more.h\" // some utility or helper macros, functions\n\n#include \"debug_print.h\"\n#include \"packer.h\"\n#include \"cobuf.h\"\n#include \"btm_hci.h\"\n#include \"hci.h\"\n\n#endif /* __BT_COMMON_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/bt_schedule.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BT_SCHEDULE__\n#define __BT_SCHEDULE__\n\n#include \"debug_print.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nvoid bt_schedule(void);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/bt_sys_cfg.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BT_SYS_CFG_H__\n#define __BT_SYS_CFG_H__\n\n#include \"cobt.h\"\n\n/* for debug usage */\n#if !defined(DEBUG)\n#define DEBUG 0\n#endif\n\n#define ESCO_ENABLE 1\n\n#define ADS_IDE    0\n#define BA_GCC     1\n\n#if DEBUG == 1\n#define DBG_DEBUG_PRINT_ENABLE                  1\n#define DBG_COBUF_NEED_STATISTIC                1\n#else  /*must NOT change the following macro*/\n#define DBG_DEBUG_PRINT_ENABLE                  0\n#define DBG_COBUF_NEED_STATISTIC                0\n#endif\n\n#define DBG_PPBUFF_NEED_STATISTIC               1\n\n/* config memory block size and count */\n#define COBUF_SIZE_N1    8\n#define COBUF_SIZE_N2    16\n#define COBUF_SIZE_N3    32\n#define COBUF_SIZE_N4    64\n#define COBUF_SIZE_N5    128\n#define COBUF_SIZE_N6    ((L2CAP_DEFAULT_MTU+3)/4*4)\n\n#if defined(CHIP_BEST1402) || defined(CHIP_BEST1400)\n#define COBUF_NUMS_N1    32\n#define COBUF_NUMS_N2    45\n#define COBUF_NUMS_N3    39\n#define COBUF_NUMS_N4    20\n#define COBUF_NUMS_N5    10\n#define COBUF_NUMS_N6    6\n#else\n#define COBUF_NUMS_N1    64\n#define COBUF_NUMS_N2    90\n#define COBUF_NUMS_N3    78\n#define COBUF_NUMS_N4    40\n#define COBUF_NUMS_N5    20\n#define COBUF_NUMS_N6    18\n#endif\n\n/* SCO */\n#ifdef CVSD_BYPASS\n#define BTM_SYNC_CONN_AUDIO_SETTING_DEFAULT            0x0040\n#else\n#define BTM_SYNC_CONN_AUDIO_SETTING_DEFAULT            0x0060\n#endif\n#define BTM_SYNC_CONN_AUDIO_SETTING_IN_CODING_LINEAR   0x0000   /* Linear */\n#define BTM_SYNC_CONN_AUDIO_SETTING_IN_CODING_ULAW     0x0100   /* u-law */\n#define BTM_SYNC_CONN_AUDIO_SETTING_IN_CODING_ALAW     0x0200   /* a-law */\n#define BTM_SYNC_CONN_AUDIO_SETTING_IN_DATA_ONES       0x0000   /* 1's complement */\n#define BTM_SYNC_CONN_AUDIO_SETTING_IN_DATA_TWOS       0x0040   /* 2's complement */\n#define BTM_SYNC_CONN_AUDIO_SETTING_IN_DATA_SM         0x0080   /* Sign-Magnitude */\n#define BTM_SYNC_CONN_AUDIO_SETTING_IN_SAMPLE_8BIT     0x0000   /* 8 bit */\n#define BTM_SYNC_CONN_AUDIO_SETTING_IN_SAMPLE_16BIT    0x0020   /* 16 bit */\n#define BTM_SYNC_CONN_AUDIO_SETTING_CVSD               0x0000   /* CVSD */\n#define BTM_SYNC_CONN_AUDIO_SETTING_ULAW               0x0001   /* u-LAW */\n#define BTM_SYNC_CONN_AUDIO_SETTING_ALAW               0x0002   /* A-LAW */\n#define BTM_SYNC_CONN_AUDIO_SETTING_TRANSPNT \t       0x0003   /* msbc */\n#define BTM_SYNC_CONN_AUDIO_SETTING_MSBC               0x0060\n\n#define BTM_SYNC_CONN_AUDIO_PARAM_SCO      1\n#define BTM_SYNC_CONN_AUDIO_PARAM_S1       2\n#define BTM_SYNC_CONN_AUDIO_PARAM_S2       3\n#define BTM_SYNC_CONN_AUDIO_PARAM_S3       4\n#define BTM_SYNC_CONN_AUDIO_PARAM_S4       5\n#define BTM_SYNC_CONN_AUDIO_PARAM_CUSTOM   6\n#define BTM_SYNC_CONN_AUDIO_PARAM_T1       7\n#define BTM_SYNC_CONN_AUDIO_PARAM_T2       8\n\n#define BTM_SYNC_CONN_AUDIO_DEFAULT_PARMS           BTM_SYNC_CONN_AUDIO_PARAM_S4\n\n/* HFP */\n#define HFP_CMD_FLOW_CONTROL_ENABLE        1\n#define HFP_CMD_SYST_TX_TIMEOUT_VAL_MS     3000\n\n#define HFP_HF_CHANNEL 7\n\n#define HFP_HF_FEAT_ECNR        0x00000001\n#define HFP_HF_FEAT_3WAY        0x00000002\n#define HFP_HF_FEAT_CLI         0x00000004\n#define HFP_HF_FEAT_VR          0x00000008\n#define HFP_HF_FEAT_RVC         0x00000010\n#define HFP_HF_FEAT_ECS         0x00000020\n#define HFP_HF_FEAT_ECC         0x00000040\n#define HFP_HF_FEAT_CODEC       0x00000080\n#define HFP_HF_FEAT_HF_IND      0x00000100\n#define HFP_HF_FEAT_ESCO_S4_T2  0x00000200\n\n#define HFP_HF_SDP_FEAT_MASK    0x001f\n#define HFP_HF_SDP_FEAT_WBS     0x0020\n\n#define HFP_AG_FEAT_3WAY        0x00000001\n#define HFP_AG_FEAT_ECNR        0x00000002\n#define HFP_AG_FEAT_VR          0x00000004\n#define HFP_AG_FEAT_INBAND      0x00000008\n#define HFP_AG_FEAT_VTAG        0x00000010\n#define HFP_AG_FEAT_REJ_CALL    0x00000020\n#define HFP_AG_FEAT_ECS         0x00000040\n#define HFP_AG_FEAT_ECC         0x00000080\n#define HFP_AG_FEAT_EXT_ERR     0x00000100\n#define HFP_AG_FEAT_CODEC       0x00000200\n#define HFP_AG_FEAT_HF_IND      0x00000400\n#define HFP_AG_FEAT_ESCO_S4_T2  0x00000800\n\n#define HFP_AG_SDP_FEAT_MASK    0x001f\n#define HFP_AG_SDP_FEAT_WBS     0x0020\n\n#if defined(HFP_1_6_ENABLE)\n#define HFP_HF_FEATURES ( \\\n                HFP_HF_FEAT_CLI   | \\\n                HFP_HF_FEAT_RVC   | \\\n                HFP_HF_FEAT_ECS   | \\\n                HFP_HF_FEAT_ECC   | \\\n                HFP_HF_FEAT_CODEC | \\\n                HFP_HF_FEAT_ECNR  | \\\n                HFP_HF_FEAT_3WAY  | \\\n                HFP_HF_FEAT_VR    | \\\n                HFP_HF_FEAT_ESCO_S4_T2 \\\n                )\n#define HFP_HF_SDP_FEATURES ((HFP_HF_FEATURES & HFP_HF_SDP_FEAT_MASK) | HFP_HF_SDP_FEAT_WBS)\n\n#define HFP_AG_FEATURES ( \\\n                HFP_AG_FEAT_3WAY     | \\\n                HFP_AG_FEAT_ECNR     | \\\n                HFP_AG_FEAT_REJ_CALL | \\\n                HFP_AG_FEAT_ECS      | \\\n                HFP_AG_FEAT_ECC      | \\\n                HFP_AG_FEAT_CODEC    | \\\n                HFP_AG_FEAT_ESCO_S4_T2 \\\n                )\n#define HFP_AG_SDP_FEATURES ((HFP_AG_FEATURES & HFP_AG_SDP_FEAT_MASK) | HFP_AG_SDP_FEAT_WBS)\n#else\n#define HFP_HF_FEATURES ( \\\n                HFP_HF_FEAT_CLI   | \\\n                HFP_HF_FEAT_RVC   | \\\n                HFP_HF_FEAT_ECS   | \\\n                HFP_HF_FEAT_ECC     \\\n                )\n#define HFP_HF_SDP_FEATURES (HFP_HF_FEATURES & HFP_HF_SDP_FEAT_MASK)\n\n#define HFP_AG_FEATURES ( \\\n                HFP_AG_FEAT_REJ_CALL | \\\n                HFP_AG_FEAT_ECS      | \\\n                HFP_AG_FEAT_ECC      | \\\n                )\n#define HFP_AG_SDP_FEATURES ((HFP_AG_FEATURES & HFP_AG_SDP_FEAT_MASK) | HFP_AG_SDP_FEAT_WBS)\n#endif\n\n/* btm */\n/*\nbtm upper layers (l2cap,profiles) use ppb to pass incoming data.\nwe cannot change all usage now.\nit is a bad idea for alloc ppb (only one time used in callback) for incoming data.\nso to setup a fix buffer to alloc ppb inplace to avoid alloc ppb dynamicly failure.\n*/\n#define HCIBUFF_STATISTIC_ENABLE 1\n\n#define CFG_BTM_USE_INPLACE_BUFFER_FOR_ACL       1\n#define CFG_BTM_DISC_ACL_IN_BTM_TIMER            0\n#define CFG_BTM_DROP_TX_ACL_WHEN_DISCONNECT_PENDING 1 // meaningless when CFG_BTM_DISC_ACL_IN_BTM_TIMER=1\n\n#define MAX_SDP_SOCK_NUMBER                      2\n#define NUM_BT_DEVICES                           2\n#define NUM_SCO_CONNS                            2\n#define NUM_BLE_DEVICES                          2\n\n#define CFG_VOICE_SETTING_DEFAULT                0x0043\n\n#if defined(__3M_PACK__)\n#define CFG_HCI_ACL_DATA_SIZE                    1040\n#else\n#define CFG_HCI_ACL_DATA_SIZE                    800\n#endif\n\n#define CFG_HCI_EVT_DATA_SIZE                    300\n#define CFG_HCI_SCO_DATA_SIZE                    180\n#define CFG_HCI_NUM_ACL_BUFFERS                  6\n#define CFG_HCI_NUM_SCO_BUFFERS                  6\n\n#define BTM_DEVICEDB_SIZE                        6\n#define BTM_PINCODE_MAX_LEN                      8    /*include '\\0'*/\n#define BTM_NAME_MAX_LEN                         248  /*include '\\0'*/\n\n#define BTM_CFG_TIMEOUT_BEFORE_LOWPOWER               5\n#define BTM_INQUIRY_RESULT_UNUSED_TIMEOUT             30   /*seconds, decide the time out to destory an inquiry result structure*/\n#define BTM_DISCONN_WAITING_TIME                      1    /* changed by marvin.zhu. seconds, decide the timeout be disconnect an acl link after it is not used by l2cap*/\n#define BTM_HCI_HOST_FLOW_CONTROL_ENABLE              (1)\n#define BTM_BLE_USE_INTERNAL_QUEUE_CACHE_ENABLE       (1)  /* if 1, for ble acl data, stack will use a internal queue to cache ble data, hci buff will be release imm */\n#define BTM_FC_BLE_TX_USE_BT_BUFFER_FORCE             (0)\n#define BTM_FC_HOST_TO_CONTROLLER_RESV_ACL_BUF_NUM    (1)\n#define BTM_FC_HOST_TO_CONTROLLER_CMD_BUF_NUM         (24)\n#define BTM_FC_HOST_TO_CONTROLLER_ACL_BUF_NUM         (10) /* this value will be overide by read buffer size command reaponse, tx queue will be this value */\n#define BTM_FC_CONTROLLER_TO_HOST_ACL_BUF_NUM         (CFG_HCI_NUM_ACL_BUFFERS)\n#if BTM_BLE_USE_INTERNAL_QUEUE_CACHE_ENABLE==1\n#define BTM_BLE_INTERNAL_QUEUE_BUF_NUM                (BTM_FC_CONTROLLER_TO_HOST_ACL_BUF_NUM)\n#endif\n\n#if BTM_BLE_USE_INTERNAL_QUEUE_CACHE_ENABLE==1\n#if (BTM_BLE_INTERNAL_QUEUE_BUF_NUM= BTM_FC_CONTROLLER_TO_HOST_ACL_BUF_NUM\"\n#endif\n#endif\n\n#define BTM_FC_CONTROLLER_TO_HOST_EVT_BUF_NUM         (25)\n#define BTM_FC_HOST_TO_CONTROLLER_SCO_BUF_NUM         (6)\n#define BTM_FC_CONTROLLER_TO_HOST_SCO_BUF_NUM         (6)\n#define BTM_CFG_CON_ACL_MAX                           (7)\n\n/* audio connection config */\n#define HCI_CFG_SYNC_TX_BANDWIDTH            0x00001F40\n#define HCI_CFG_SYNC_RX_BANDWIDTH            0x00001F40\n#define HCI_CFG_SYNC_MAX_LATENCY             0xffff\n#define HCI_CFG_SYNC_RETX_EFFORT             0x2\n//#define HCI_CFG_SYNC_PKT_TYPE              HCI_PKT_TYPE_HV3\n#if ESCO_ENABLE\n#define HCI_CFG_SYNC_SCO_PKTS                (PACKET_TYPE_HV1 | PACKET_TYPE_HV2 | PACKET_TYPE_HV3)\n#define HCI_CFG_SYNC_PKT_TYPE                (PACKET_TYPE_HV1 | PACKET_TYPE_HV2 | PACKET_TYPE_HV3 | PACKET_TYPE_EV3)\n#else\n#define HCI_CFG_SYNC_PKT_TYPE                (PACKET_TYPE_HV1_FLAG | PACKET_TYPE_HV2_FLAG | PACKET_TYPE_HV3_FLAG)\n#endif\n#define HCI_CFG_INPUT_CODING                 INPUT_CODING_LINEAR\n#define HCI_CFG_INPUT_DATA_FORMAT            INPUT_DATA_FORMAT_1S\n#define HCI_CFG_INPUT_SAMPLE_SIZE            INPUT_SAMPLE_SIZE_8BITS\n#if defined(HFP_1_6_ENABLE)\n#define HCI_CFG_AIR_CODING_FORMAT            AIR_CODING_FORMAT_MSBC\n#else\n#define HCI_CFG_AIR_CODING_FORMAT            AIR_CODING_FORMAT_CVSD\n#endif\n#define HCI_CFG_LINEAR_PCM_BITPOS            0x00\n\n#define HCI_CFG_VOICE_SETTING               (HCI_CFG_INPUT_CODING&  \\\n                                             HCI_CFG_INPUT_DATA_FORMAT&  \\\n                                             HCI_CFG_INPUT_SAMPLE_SIZE&  \\\n                                             HCI_CFG_AIR_CODING_FORMAT& \\\n                                             (HCI_CFG_LINEAR_PCM_BITPOS<<2))\n\n\n\n#define HCI_CFG_SNIFF_MAX_INTERVAL           0x0320\n#define HCI_CFG_SNIFF_MIN_INTERVAL           0x0300\n#define HCI_CFG_SNIFF_ATTEMPT                0x08\n#define HCI_CFG_SNIFF_TIMEOUT                0x00\n\n#define HCI_CFG_LINK_POLICY_LOWPOWER         HCI_LP_ENABLE_ROLE_SWITCH_MASK \\\n                                             |HCI_LP_ENABLE_SNIFF_MODE_MASK \n\n\n/* 10*1.28 seconds */\n#define HCI_CFG_INQUIRY_TIMEOUT              10\n/* unlimited */\n#define HCI_CFG_INQUIRY_RESPONSE_NUM         0\n\n#define CFG_DEFAULT_PAGE_TIMEOUT             0x2000\n\n#define CFG_COD_LIMITED_DISCOVERABLE_MODE    0x00002000\n#define CFG_COD_POSITIONING                  0x00010000\n#define CFG_COD_NETWORKING                   0x00020000\n#define CFG_COD_RENDERING                    0x00040000\n#define CFG_COD_CAPTURING                    0x00080000\n#define CFG_COD_OBJECT_TRANSFER              0x00100000\n#define CFG_COD_AUDIO                        0x00200000\n#define CFG_COD_TELEPHONY                    0x00400000\n#define CFG_COD_INFORMATION                  0x00800000\n#define CFG_COD_MAJOR_MISCELLANEOUS          0x00000000\n#define CFG_COD_MAJOR_COMPUTER               0x00000100\n#define CFG_COD_MAJOR_PHONE                  0x00000200\n#define CFG_COD_MAJOR_LAN_ACCESS_POINT       0x00000300\n#define CFG_COD_MAJOR_AUDIO                  0x00000400\n#define CFG_COD_MAJOR_PERIPHERAL             0x00000500\n#define CFG_COD_MAJOR_IMAGING                0x00000600\n#define CFG_COD_MAJOR_UNCLASSIFIED           0x00001F00\n#define CFG_COD_MINOR_AUDIO_UNCLASSIFIED     0x00000000\n#define CFG_COD_MINOR_AUDIO_HEADSET          0x00000004\n#define CFG_COD_MINOR_AUDIO_HANDSFREE        0x00000008\n#define CFG_COD_MINOR_AUDIO_MICROPHONE       0x00000010\n#define CFG_COD_MINOR_AUDIO_LOUDSPEAKER      0x00000014\n#define CFG_COD_MINOR_AUDIO_HEADPHONES       0x00000018\n#define CFG_COD_MINOR_AUDIO_PORTABLEAUDIO    0x0000001C\n#define CFG_COD_MINOR_AUDIO_CARAUDIO         0x00000020\n#define CFG_COD_MINOR_AUDIO_SETTOPBOX        0x00000024\n#define CFG_COD_MINOR_AUDIO_HIFIAUDIO        0x00000028\n#define CFG_COD_MINOR_AUDIO_VCR              0x0000002C\n#define CFG_COD_MINOR_AUDIO_VIDEOCAMERA      0x00000030\n#define CFG_COD_MINOR_AUDIO_CAMCORDER        0x00000034\n#define CFG_COD_MINOR_AUDIO_VIDEOMONITOR     0x00000038\n#define CFG_COD_MINOR_AUDIO_VIDEOSPEAKER     0x0000003C\n#define CFG_COD_MINOR_AUDIO_CONFERENCING     0x00000040\n#define CFG_COD_MINOR_AUDIO_GAMING           0x00000048\n#define CFG_CLASS_OF_DEVICE                  (CFG_COD_MAJOR_AUDIO|CFG_COD_MINOR_AUDIO_HEADSET|CFG_COD_AUDIO|CFG_COD_RENDERING)\n\n// Minor device class for CFG_COD_MAJOR_PERIPHERAL\n#define CFG_COD_MINOR_PERIPH_KEYBOARD       0x00000040\n#define CFG_COD_MINOR_PERIPH_POINTING       0x00000080\n#define CFG_COD_MINOR_PERIPH_COMBOKEY       0x000000C0\n\n#ifdef _SCO_BTPCM_CHANNEL_\n#define CFG_SYNC_CONFIG_PATH                 (0<<8|1<<4|1<<0) /* all links use hci */\n#else\n#define CFG_SYNC_CONFIG_PATH                 (0<<8|0<<4|0<<0) /* all links use hci */\n#endif\n#define CFG_SYNC_CONFIG_MAX_BUFFER           (0) /* (e)sco use Packet size */\n#ifdef _CVSD_BYPASS_\n#define CFG_SYNC_CONFIG_CVSD_BYPASS          (1) /* use pcm over hci */\n#else\n#define CFG_SYNC_CONFIG_CVSD_BYPASS          (0) /* use pcm over hci */\n#endif\n\n#define CFG_LP_SNIFF_MODE                    0x0000\n\n#define EDR_ENABLED 0\n\n#define CFG_BT_DEFAULT_PAGE_SCAN_WINDOW      0x12\n#define CFG_BT_DEFAULT_PAGE_SCAN_INTERVAL    0x800\n#define CFG_BT_DEFAULT_INQ_SCAN_WINDOW       0x12\n#define CFG_BT_DEFAULT_INQ_SCAN_INTERVAL     0x800\n\n#define CFG_INQ_TYPE    1\n#define CFG_PAGE_TYPE   1\n\n/* l2cap */\n#define SSP_RECONNECT              1\n#define L2CAP_AUTH_NEED_ENCRYPTION 1/* default value in spec */\n\n#if defined(__3M_PACK__)\n#define L2CAP_CFG_MTU                                               1021\n#else\n#define L2CAP_CFG_MTU                                               679\n#endif\n#define L2CAP_DEFAULT_MTU \t                                        L2CAP_CFG_MTU\n#define L2CAP_MIN_MTU                                               48\n\n#define L2CAP_DEFAULT_FLUSH_TO\t                                    0xFFFF\n\n#define L2CAP_DEFAULT_QOS_SERVICE_TYPE                              L2CAP_QOS_BEST_EFFORT \n#define L2CAP_DEFAULT_QOS_TOKEN_RATE                                0x00000000\n#define L2CAP_DEFAULT_QOS_TOKEN_BUCKET_SIZE                         0x00000000\n#define L2CAP_DEFAULT_QOS_PEEK_BANDWIDTH                            0x00000000\n#define L2CAP_DEFAULT_QOS_LATENCY                                   0xffffffff\n#define L2CAP_DEFAULT_QOS_DELAY_VARIATION                           0xffffffff\n\n\n#define L2CAP_DEFAULT_RFC_MODE                                      L2CAP_MODE_BASE                  \n#define L2CAP_DEFAULT_RFC_TXWINDOW                                  32      /*1 to 32*/\n#define L2CAP_DEFAULT_RFC_MAXTRANSMIT                               32\n#define L2CAP_DEFAULT_RFC_RETRANSMISSION_TIMEOUT                    1000\n#define L2CAP_DEFAULT_RFC_MONITOR_TIMEOUT                           1000\n#define L2CAP_DEFAULT_RFC_MPS                                       0xFFFF\n\n#define L2CAP_DEFAULT_FCS_TYPE\t\tL2CAP_FCS_TYPE_16_BIT\n\n/* used for pp_buff */\n#define L2CAP_PPB_HEAD_RESERVE      4       /*len+cid+control+sdulen  2+2+2+2*/\n#define L2CAP_PPB_TAIL_RESERVE\t    0        /* fcs 2 */\n#define L2CAP_PPB_RESERVE  (L2CAP_PPB_HEAD_RESERVE + L2CAP_PPB_TAIL_RESERVE)\n\n#define L2CAP_CFG_FLUSH_TO\t                                         L2CAP_DEFAULT_FLUSH_TO\n\n#define L2CAP_CFG_QOS_SERVICE_TYPE                                   L2CAP_DEFAULT_QOS_SERVICE_TYPE \n#define L2CAP_CFG_QOS_TOKEN_RATE                                     0x00000000\n#define L2CAP_CFG_QOS_TOKEN_BUCKET_SIZE                              0x00000000\n#define L2CAP_CFG_QOS_PEEK_BANDWIDTH                                 0x00000000\n#define L2CAP_CFG_QOS_LATENCY                                        0xffffffff\n#define L2CAP_CFG_QOS_DELAY_VARIATION                                0xffffffff\n\n#define L2CAP_CFG_RFC_MODE                                           L2CAP_DEFAULT_RFC_MODE                   /*L2CAP_MODE_BASE*/\n/* below is only available when rfc mode is not base mode*/\n#define L2CAP_CFG_RFC_TXWINDOW                                       32      /*1 to 32*/\n#define L2CAP_CFG_RFC_MAXTRANSMIT                                    32\n#define L2CAP_CFG_RFC_RETRANSMISSION_TIMEOUT                         1000\n#define L2CAP_CFG_RFC_MONITOR_TIMEOUT                                1000\n#define L2CAP_CFG_RFC_MPS                                            0xFFFF\n\n/* L2CAP_RTX: The Responsive Timeout eXpired timer is used to terminate\n   the channel when the remote endpoint is unresponsive to signalling\n   requests (min 1s, max 60s) */\n#define L2CAP_CFG_RTX 60\n/* L2CAP_RTX_MAXN: Maximum number of Request retransmissions before\n   terminating the channel identified by the request. The decision\n   should be based on the flush timeout of the signalling link. If the\n   flush timeout is infinite, no retransmissions should be performed */\n#define L2CAP_CFG_RTX_MAXN 0\n/* L2CAP_ERTX: The Extended Response Timeout eXpired timer is used in\n   place of the RTC timer when a L2CAP_ConnectRspPnd event is received\n   (min 60s, max 300s) */\n#define L2CAP_CFG_ERTX 300\n\n\n#endif /* __BT_SYS_CFG_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btgatt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef __GATT_OVER_BR_EDR__\n#ifndef __BTGATT_H__\n#define __BTGATT_H__\n#include \"cmsis_os.h\"\n#include \"stdbool.h\"\n#include \"bt_co_list.h\"\n#include \"btlib_type.h\"\n#include \"btm.h\"\n\n#define BTGATT_PACKET_COUNT (5)\n\ntypedef struct _BtgattCallbackParms BtgattCallbackParms;\ntypedef struct _BtgattChannel   BtgattChannel;\ntypedef struct _BtgattConn BtgattConn;\ntypedef struct _BtgattConnCallbackParms BtgattConnCallbackParms;\n\ntypedef void (*BtgattConnCallback)(BtgattConn *Conn, BtgattConnCallbackParms *Parms);\n\n/* Connection State */\nstruct _BtgattConn {\n    uint32              l2cap_handle;\n    uint8               state;\n    BtgattConnCallback  callback;\n};\n\nstruct _BtgattConnCallbackParms {\n    uint8         event;\n    int8          status;\n    uint16        dataLen;\n    union {\n        struct btm_conn_item_t *remDev;\n        uint8             *data;\n    } ptrs;\n};\n\ntypedef uint16 BtgattEvent;\n\ntypedef struct\n{\n    struct list_node    node;\n    uint8*              pBuf;\n    uint16              pDataLength;\n} BtgattPacket;\n\nstruct _BtgattCallbackParms{\n    BtgattEvent    event;\n\n    int8    status;\n    int8    errCode;\n    BtgattChannel *chnl;\n    union{\n        struct btm_conn_item_t *remDev;\n        BtgattPacket   Packet;\n    }p;\n};\n\ntypedef struct _BtBtgattContext {\n    struct list_node channelList;\n    uint16 btgattcpsm;\n} BtBtgattContext;\n\n/*--------------------------------------------------------------------------\n * BTGATTChannelStates type\n *\n *     This type enumerates the possible BTGATT channel connection\n *     states.\n */\ntypedef uint8 BtgattChannelStates;\n\n/* End of HfChannelStates */\ntypedef void (*BtgattCallback)(BtgattChannel *Chan, BtgattCallbackParms *Info);\n\nstruct _BtgattChannel{\n    struct list_node        node;\n    struct btm_conn_item_t  *remDev;\n    BtgattCallback          callback;           /* Application callback*/\n    BtgattConn              btgattc_conn;\n    BtgattChannelStates     state;              /* Current connection state      */\n    uint16                  flags;              /* Current connection flags      */\n    struct list_node        freeTxPacketList;\n    struct list_node        pendingTxPacketList;\n    uint8                   initiator;\n    uint8                   tx_state;\n    BtgattPacket            *curr_tx_packet;\n};\n\n////btgatt channel state\n#define BTGATT_STATE_DISCONNECTED   0\n#define BTGATT_STATE_CONN_PENDING   1\n#define BTGATT_STATE_CONN_INCOMING  2\n#define BTGATT_STATE_DISC_PENDING   3\n#define BTGATT_STATE_DISC_INCOMING  4\n#define BTGATT_STATE_CONNECTED      5\n\n////channel tx state\n#define BTGATT_TX_STATE_IDLE 0\n#define BTGATT_TX_STATE_IN_TX 1\n\n\n#define BTGATT_EVENT_CONTROL_CONNECTED      0x21\n#define BTGATT_EVENT_CONTROL_DISCONNECTED   0x22\n#define BTGATT_EVENT_CONTROL_DATA_IND       0x23\n#define BTGATT_EVENT_CONTROL_DATA_SENT      0x24\n\n#define BTGATT(s) (btgattContext.s)\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\nint8 Btgatt_init(void);\nint8 Btgatt_Register(BtgattChannel *chnl, BtgattCallback callback);\nint8 Btgatt_Connect(BtgattChannel *chnl, struct btm_conn_item_t *RemDev);\nint8 Btgatt_Disconnect(BtgattChannel *chnl);\nint8 Btgatt_Send_packet(BtgattChannel *chnl, char *buffer, uint16 nBytes);\nint8 Btgatt_Send_cmd_packet(BtgattChannel *chnl, char *buffer, uint16 nBytes);\nbool Btgatt_Is_Connected(BtgattConn *Conn);\nvoid Btgatt_addsdp(uint16_t pServiceUUID, uint16_t startHandle, uint16_t endHandle);\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __BTGATT_H__ */\n#endif\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btlib.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BTLIB_H__\n#define __BTLIB_H__\n\n#include \"bt_common.h\"\n#include \"hci.h\"\n#include \"co_timer.h\"\n#include \"btm.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint8 btlib_send_hci_cmd(uint16 opcode, uint8 *param_data_ptr, uint8 param_len);\nint8 btlib_send_acl_data( uint16 conn_handle, uint8 *data_ptr, uint16 data_len, uint8 *priv);\nint8 btlib_hcicmd_acl_connect(struct bdaddr_t *bdaddr, \n                              uint16 pkt_type, \n                              uint8 page_scan_repetition_mode, \n                              uint16 clk_off, \n                              uint8 allow_role_switch);\nint8 btlib_hcicmd_addsyc_conn(struct btm_conn_item_t *conn);\nint8 btlib_hcicmd_addsco_conn(struct btm_conn_item_t *conn, uint16 pkt_type);\nint8 btlib_hcicmd_write_scan_enable(uint8 scan_enable);\nint8 btlib_hcicmd_write_current_iac_lap(uint8 num);\nint8 btlib_hcicmd_reject_conn_req(struct bdaddr_t *bdaddr, uint8 reason);\nint8 btlib_hcicmd_accep_conn_req(struct bdaddr_t *bdaddr, uint8 role);\nint8 btlib_hcicmd_switch_role(struct bdaddr_t *bdaddr, uint8 role);\nint8 btlib_hcicmd_write_page_timeout(uint16_t timeout);\nint8 btlib_hcicmd_write_superv_timeout(uint16 connhandle, uint16 superv_timeout);\nint8 btlib_hcicmd_create_connection_cancel(struct bdaddr_t *bdaddr);\nint8 btlib_hcicmd_set_extended_inquiry_response(uint8 fec, uint8 *buff, uint32 len);\nint8 btlib_hcicmd_start_tws_exchange(uint16_t tws_slave_conn_handle, uint16_t mobile_conn_handle);\nint8 btlib_hcicmd_enable_lmp_filter(uint16_t conhdl, uint8_t enable);\nint8 btlib_hcicmd_enable_fastack(uint16_t conhdl, uint8_t direction, uint8_t enable);\nint8 btlib_hcicmd_suspend_ibrt(void);\nint8 btlib_hcicmd_stop_ibrt(uint8_t enable,uint8_t reason);\nint8 btlib_hcicmd_ibrt_mode_init(uint8_t enable);\nint8 btlib_hcicmd_ibrt_role_switch(uint8_t switch_op);\nint8 btlib_hcicmd_start_ibrt(uint16 slaveConnHandle, uint16 mobileConnHandle);\nint8 btlib_hcicmd_resume_ibrt(uint8_t enable);\nint8 btlib_hcicmd_set_tws_pool_interval(uint16_t conn_handle, uint16_t poll_interval);\nint8 btlib_hcicmd_set_normal_sync_pos(uint8_t flag, uint8_t linkid, uint8_t normalSyncPos);\nint8 btlib_hcicmd_set_connection_qos_info(void *remDev, void *qosInfo);\nint8 btlib_hcicmd_set_sniffer_env(uint8 sniffer_active, uint8 sniffer_role, struct bdaddr_t *monitor_bdaddr, struct bdaddr_t *sniffer_bdaddr);\nint8 btlib_hcicmd_get_slave_mobile_rssi(uint16_t conn_handle);\nint8 btlib_hcicmd_set_link_lbrt_enable(uint16 conn_handle, uint8 enable);\nint8 btlib_hcicmd_qos_setup(uint16 conn_handle);\nint8 btlib_hcicmd_ble_write_random_addr(struct bdaddr_t *bdaddr);\nint8 btlib_hcicmd_ble_write_adv_param(struct hci_write_adv_param *para);\nint8 btlib_hcicmd_ble_write_adv_data(U8 len, U8 *data);\nint8 btlib_hcicmd_ble_write_scan_rsp_data(U8 len, U8 *data);\nint8 btlib_hcicmd_ble_write_adv_en(uint8 en);\nint8 btlib_hcicmd_ble_write_scan_param(struct hci_write_ble_scan_param *para);\nint8 btlib_hcicmd_ble_write_scan_en(uint8 scan_en, uint8 filter_duplicate);\nint8 btlib_hcicmd_ble_clear_wl(void);\nint8 btlib_hcicmd_ble_add_dev_to_wl(uint8 addr_type, struct bdaddr_t *bdaddr);\nint8 btlib_hcicmd_tws_bdaddr_exchange(uint16 conn_handle);\nint8 btlib_hcicmd_accept_sync_conn_req(struct bdaddr_t *bdaddr, uint32 tx_bandwidth, uint32 rx_bandwidth, uint16 max_latency, uint16 voice_setting, uint8 retx_effort, uint16 pkt_type);\n\nint8 btlib_hcicmd_pincode_reply(struct bdaddr_t *bdaddr, uint8 *pin, int8 pinlen);\n\nint8 btlib_hcicmd_pincode_neg_reply(struct bdaddr_t *bdaddr);\nint8 btlib_hcicmd_linkkey_reply(struct bdaddr_t *bdaddr, uint8 *linkkey);\nint8 btlib_hcicmd_linkkey_neg_reply(struct bdaddr_t *bdaddr);\n\nint8 btlib_hcicmd_authentication_req (uint16 conn_handle);\nint8 btlib_hcicmd_write_auth_enable(uint8 flag);\nint8 btlib_hcicmd_set_conn_encryption (uint16 conn_handle, uint8 encry_enable);\nint8 btlib_hcicmd_disconnect (uint16 conn_handle, uint8 reason);\n\nint8 btlib_hcicmd_write_classofdevice (uint8 *class_de);\nint8 btlib_hcicmd_write_localname (uint8 *local_name);\nint8 btlib_hcicmd_set_bdaddr (uint8 *address);\nint8 btlib_hcicmd_set_ble_bdaddr (const uint8 *address);\nint8 btlib_hcicmd_write_memory(uint32 addr, uint32 value, uint8 bytelen);\n\nint8 btlib_hcicmd_sniff_mode(uint16 conn_handle, \n                            uint16 sniff_max_interval, \n                            uint16 sniff_min_interval, \n                            uint16 sniff_attempt, \n                            uint16 sniff_timeout);\n\nint8 btlib_hcicmd_exit_sniff_mode(uint16 conn_handle);\nint8 btlib_hcicmd_bt_role_discovery(uint16 conn_handle);\nint8 btlib_hcicmd_read_remote_version_info(uint16 conn_handle);\nint8 btlib_hcicmd_read_remote_supported_feat(uint16 conn_handle);\nint8 btlib_hcicmd_read_remote_extended_feat(uint16 conn_handle, uint8 page_n);\nint8 btlib_hcicmd_write_link_policy(uint16 conn_handle, uint16 link_policy_settings);\nint8 btlib_hcicmd_lowlayer_monitor(uint16 conn_handle, uint8 control_flag, uint8 report_format, uint32 data_format, uint8 report_unit);\nint8 btlib_hcicmd_read_stored_linkkey(struct bdaddr_t *bdaddr, uint8 read_all_flag);\nint8 btlib_hcicmd_write_stored_linkkey(struct bdaddr_t *bdaddr, uint8 *linkkey);\nint8 btlib_hcicmd_delete_stored_linkkey(struct bdaddr_t *bdaddr, uint8 delete_all_flag);\n\nint8 btlib_hcicmd_inquiry(uint32 lap, uint8 inq_period, uint8 num_rs);\nint8 btlib_hcicmd_inquiry_cancel(void);\n\nint8 btlib_hcicmd_remote_name_request(struct hci_cp_remote_name_request *req);\nint8 btlib_hcicmd_remote_name_cancel(struct bdaddr_t *bdaddr);\nint8 btlib_hcicmd_write_pagescan_type (const uint8 pagescan_type);\nint8 btlib_hcicmd_write_inqscan_type (const uint8 inqscan_type);\nint8 btlib_hcicmd_write_sleep_enable(uint8 sleep_en);\nint8 btlib_hcicmd_write_inquiry_mode(uint8 mode);\nint8 btlib_hcicmd_set_sco_switch (const uint16 sco_handle);\nint8 btlib_hcicmd_dbg_sniffer_interface (const uint8 subcode, const uint16 connhandle);\nint8 btlib_hcicmd_sco_tx_silence (const uint16 connhandle, const uint8 slience_on);\n\nextern void delay_ms(int num);\nextern char *co_strncat( char *dst, const char *src, uint32 n );\nextern void *co_memcpy_reverse(void *dst, const void *src, uint32 n);\nextern void *co_memcpy(void *dst, const void *src, uint32 n);\nextern int co_memcmp( const void *s1, const void *s2, uint32 n );\nextern int co_strncmp( const char *s1, const char *s2, uint32 n );\nextern char *co_strncpy( char *dst, const char *src, uint32 n );\nextern char *co_strcpy( char *dst, const char *src );\nextern void *co_memset( void *s, int c, uint32 n);\n\n#define bdaddr_equal(addr1, addr2) \\\n            (co_memcmp((const void *)(addr1),(const void *)(addr2),6) == \\\n                        0 ? TRUE : FALSE)\n\n#define bdaddr_set(dest, src) \\\n    do { \\\n        memcpy((void *)(dest),(void *)(src),6); \\\n    } while (0);\n\nstatic inline void bdaddr_cpy(struct bdaddr_t *dst, const struct bdaddr_t *src) {\n    co_memcpy(dst, src, sizeof(struct bdaddr_t));\n}\n\nvoid print_bdaddr(const struct bdaddr_t *bdaddr);\nint ba2str(const struct bdaddr_t *bdaddr, char *str);\nint sprintf(char *buf, const char *fmt, ...);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __BTLIB_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btlib_more.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __BT_LIB_MORE_H__\n#define __BT_LIB_MORE_H__\n\n#include \"cobuf.h\"\n#include \"co_printf.h\"\n#include \"btlib_type.h\"     \n\n#endif /* __BT_LIB_MORE_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btlib_type.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __BTLIB_TYPE_H__\n#define __BTLIB_TYPE_H__\n\n#ifndef NULL\n#define NULL 0\n#endif\n\n#ifndef SUCCESS\n#define SUCCESS     0\n#endif\n\n#ifndef FAILURE\n#define FAILURE     1\n#endif\n\n#ifndef INPROGRESS\n#define INPROGRESS  2\n#endif\n\n#ifndef L2C_DISCONNECT_ITSELF\n#define L2C_DISCONNECT_ITSELF  (0x5E)\n#endif\n\n#ifndef TRUE\n#define TRUE 1\n#endif\n\n#ifndef FALSE\n#define FALSE 0\n#endif\n\n\ntypedef unsigned char BtStatus;\n\n#define BT_STATUS_SUCCESS         0  /* Successful and complete */\n#define BT_STATUS_FAILED          1  /* Operation failed */\n#define BT_STATUS_PENDING         2  /* Successfully started but pending */\n#define BT_STATUS_DISCONNECT      3  /* Link disconnected */\n#define BT_STATUS_NO_LINK         4  /* No Link layer Connection exists */\n#define BT_STATUS_IN_USE          5  /* Operation failed - already in use. */\n/* IrDA specific return codes */\n#define BT_STATUS_MEDIA_BUSY      6  /* IRDA: Media is busy */\n#define BT_STATUS_MEDIA_NOT_BUSY  7  /* IRDA: Media is not busy */\n#define BT_STATUS_NO_PROGRESS     8  /* IRDA: IrLAP not making progress */\n#define BT_STATUS_LINK_OK         9  /* IRDA: No progress condition cleared */\n#define BT_STATUS_SDU_OVERRUN    10  /* IRDA: Sent more data than current SDU size */\n/* Bluetooth specific return codes */\n#define BT_STATUS_BUSY              11\n#define BT_STATUS_NO_RESOURCES      12\n#define BT_STATUS_NOT_FOUND         13\n#define BT_STATUS_DEVICE_NOT_FOUND  14\n#define BT_STATUS_CONNECTION_FAILED 15\n#define BT_STATUS_TIMEOUT           16\n#define BT_STATUS_NO_CONNECTION     17\n#define BT_STATUS_INVALID_PARM      18\n#define BT_STATUS_IN_PROGRESS       19\n#define BT_STATUS_RESTRICTED        20\n#define BT_STATUS_INVALID_TYPE      21\n#define BT_STATUS_HCI_INIT_ERR      22\n#define BT_STATUS_NOT_SUPPORTED     23\n#define BT_STATUS_CONTINUE          24\n#define BT_STATUS_CANCELLED         25\n\n/* The last defined status code */\n#define BT_STATUS_LAST_CODE         25\n\n#define BIT0                            0x00000001\n#define BIT1                            0x00000002\n#define BIT2                            0x00000004\n#define BIT3                            0x00000008\n#define BIT4                            0x00000010\n#define BIT5                            0x00000020\n#define BIT6                            0x00000040\n#define BIT7                            0x00000080\n#define BIT8                            0x00000100\n#define BIT9                            0x00000200\n#define BIT10                           0x00000400\n#define BIT11                           0x00000800\n#define BIT12                           0x00001000\n#define BIT13                           0x00002000\n#define BIT14                           0x00004000\n#define BIT15                           0x00008000\n#define BIT16                           0x00010000\n#define BIT17                           0x00020000\n#define BIT18                           0x00040000\n#define BIT19                           0x00080000\n#define BIT20                           0x00100000\n#define BIT21                           0x00200000\n#define BIT22                           0x00400000\n#define BIT23                           0x00800000\n#define BIT24                           0x01000000\n#define BIT25                           0x02000000\n#define BIT26                           0x04000000\n#define BIT27                           0x08000000\n#define BIT28                           0x10000000\n#define BIT29                           0x20000000\n#define BIT30                           0x40000000\n#define BIT31                           0x80000000\n\n\ntypedef unsigned char  byte;                    /* Unsigned  8 bit quantity                           */\ntypedef unsigned char  uint8;                    /* Unsigned  8 bit quantity                           */\ntypedef unsigned char  uint8_t;                    /* Unsigned  8 bit quantity                           */\ntypedef signed   char  int8;                    /* Signed    8 bit quantity                           */\ntypedef unsigned short uint16;                   /* Unsigned 16 bit quantity                           */\ntypedef signed   short int16;                   /* Signed   16 bit quantity                           */\ntypedef unsigned int   uint32;                   /* Unsigned 32 bit quantity                           */\ntypedef signed   int   int32;                   /* Signed   32 bit quantity                           */\n\ntypedef unsigned char  BOOLEAN;\ntypedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */\ntypedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */\ntypedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */                                                                                                  \ntypedef signed   short INT16S;                   /* Signed   16 bit quantity                           */\ntypedef unsigned int   INT32U;                   /* Unsigned 32 bit quantity                           */\ntypedef signed   int   INT32S;                   /* Signed   32 bit quantity                           */\ntypedef float          FP32;                     /* Single precision floating point                    */\ntypedef double         FP64;                     /* Double precision floating point                    */\n\n\ntypedef unsigned char  \t\tu8;  \n#if 0\ntypedef signed   char  \t\ts8;  \ntypedef unsigned short \t\tu16; \ntypedef signed   short\t\ts16; \ntypedef unsigned int  \t\tu32; \ntypedef signed   int  \t\ts32; \ntypedef unsigned long long \tu64; \ntypedef signed   long long \ts64;\n#endif\n\ntypedef uint16  CNH;\n\n\n\ntypedef   struct {\n    uint8  A[6];\n}  __attribute__ ((packed)) BD_ADDR;\n\ntypedef    struct{\n\tuint8 A[10];\n}  __attribute__ ((packed)) CHANMAP;\n\n\ntypedef  struct {\n    uint8  A[3];\n}  __attribute__ ((packed))  LAP;\n\n\ntypedef  struct {\n    uint8  A[3];\n} __attribute__ ((packed))   CLASS;\n\n\ntypedef  struct {\n    uint8  A[16];\n} __attribute__ ((packed))   PIN_CODE;\n\n\ntypedef  struct {\n    uint8  A[16];\n} __attribute__ ((packed))   LINK_KEY;\n\n\ntypedef  struct {\n    uint8  A[4];\n}  __attribute__ ((packed))  SRES;\n\n\ntypedef  struct {\n    uint8  A[12];\n} __attribute__ ((packed))   ACO;\n\n\n\ntypedef  struct {\n    uint8   A[8];\n} __attribute__ ((packed))  FEATURES;\n\n\ntypedef  struct {\n    uint8  A[14];\n} __attribute__ ((packed))   NAME_VEC;\n\n\n\nstruct bdaddr_t {\n    uint8 addr[6];\n}__attribute__ ((packed));\n\n struct class_of_device_t {\n    uint8  A[3];\n}__attribute__ ((packed));\n\n struct link_key_t{\n    uint8  A[16];\n}__attribute__ ((packed));\n\n#define STR_BE32(buff,num) ( (((U8*)buff)[0] = (U8) ((num)>>24)),  \\\n                              (((U8*)buff)[1] = (U8) ((num)>>16)),  \\\n                              (((U8*)buff)[2] = (U8) ((num)>>8)),   \\\n                              (((U8*)buff)[3] = (U8) (num)) )\n\n#define STR_BE16(buff,num) ( (((U8*)buff)[0] = (U8) ((num)>>8)),    \\\n                              (((U8*)buff)[1] = (U8) (num)) )\n\n#define BEtoHost16(ptr)  (U16)( ((U16) *((U8*)(ptr)) << 8) | \\\n                                ((U16) *((U8*)(ptr)+1)) )                              \n\n#define BEtoHost32(ptr)  (U32)( ((U32) *((U8*)(ptr)) << 24)   | \\\n                                ((U32) *((U8*)(ptr)+1) << 16) | \\\n                                ((U32) *((U8*)(ptr)+2) << 8)  | \\\n                                ((U32) *((U8*)(ptr)+3)) )                                \n\n/* Store value into a buffer in Little Endian format */\n#define StoreLE16(buff,num) ( ((buff)[1] = (U8) ((num)>>8)),    \\\n                              ((buff)[0] = (U8) (num)) )\n\n#define StoreLE32(buff,num) ( ((buff)[3] = (U8) ((num)>>24)),  \\\n                              ((buff)[2] = (U8) ((num)>>16)),  \\\n                              ((buff)[1] = (U8) ((num)>>8)),   \\\n                              ((buff)[0] = (U8) (num)) )\n\n/* Store value into a buffer in Big Endian format */\n#define StoreBE16(buff,num) ( ((buff)[0] = (U8) ((num)>>8)),    \\\n                              ((buff)[1] = (U8) (num)) )\n\n#define StoreBE32(buff,num) ( ((buff)[0] = (U8) ((num)>>24)),  \\\n                              ((buff)[1] = (U8) ((num)>>16)),  \\\n                              ((buff)[2] = (U8) ((num)>>8)),   \\\n                              ((buff)[3] = (U8) (num)) )\n\n\n#define LEtoHost16(ptr)  (U16)(((U16) *((U8*)(ptr)+1) << 8) | \\\n        (U16) *((U8*)(ptr)))                                \n\n#define BDADDR_ANY   (&(bdaddr_t) {{0, 0, 0, 0, 0, 0}})\n#define BDADDR_ALL   (&(bdaddr_t) {{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}})\n#define BDADDR_LOCAL (&(bdaddr_t) {{0, 0, 0, 0xff, 0xff, 0xff}})\n\n#define CTX_INIT(buff) \\\n    POSSIBLY_UNUSED unsigned int __offset = 2; \\\n    POSSIBLY_UNUSED unsigned char *__buff = buff;\n\n#define CTX_STR_BUF(buff,len) \\\n    memcpy(__buff+__offset, buff, len); \\\n    __offset += len;\n\n#define CTX_LDR_BUF(buff,len) \\\n    memcpy(buff, __buff+__offset, len); \\\n    __offset += len;\n\n#define CTX_STR_VAL8(v) \\\n    __buff[__offset] = v&0xFF; \\\n    __offset += 1;\n\n#define CTX_LDR_VAL8(v) \\\n    v = __buff[__offset]; \\\n    __offset += 1;\n\n#define CTX_STR_VAL16(v) \\\n    __buff[__offset] = v&0xFF; \\\n    __buff[__offset+1] = (v>>8)&0xFF; \\\n    __offset += 2;\n\n#define CTX_LDR_VAL16(v) \\\n    v = __buff[__offset]; \\\n    v |= __buff[__offset+1]<<8; \\\n    __offset += 2;\n\n#define CTX_STR_VAL32(v) \\\n    __buff[__offset] = v&0xFF; \\\n    __buff[__offset+1] = (v>>8)&0xFF; \\\n    __buff[__offset+2] = (v>>16)&0xFF; \\\n    __buff[__offset+3] = (v>>24)&0xFF; \\\n    __offset += 4;\n\n#define CTX_LDR_VAL32(v) \\\n    v = __buff[__offset]; \\\n    v |= __buff[__offset+1]<<8; \\\n    v |= __buff[__offset+2]<<16; \\\n    v |= __buff[__offset+3]<<24; \\\n    __offset += 4;\n\n#define CTX_GET_BUF_CURR() __buff\n\n#define CTX_GET_BUF_HEAD() __buff\n\n#define CTX_GET_OFFSET() __offset\n\n#define CTX_GET_DATA_LEN() (__buff[0] | __buff[1]<<8)\n\n#define CTX_GET_TOTAL_LEN() (CTX_GET_DATA_LEN()+2)\n\n#define CTX_SAVE_UPDATE_DATA_LEN() \\\n   __buff[0] = (__offset-2)&0xFF; \\\n   __buff[1] = ((__offset-2)>>8)&0xFF;\n\nstruct ctx_content {\n    uint8 *buff;\n    uint32 buff_len;\n};\n\n#endif /* __BTLIB_TYPE_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btm.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __BTM_H__\n#define __BTM_H__\n\n#include \"bt_sys_cfg.h\"\n#include \"btlib_type.h\"\n#include \"bt_co_list.h\"\n#include \"btm_devicedb.h\"\n#include \"btm_security.h\"\n#include \"btm_i.h\"\n\nstruct btm_device_mode_t\n{\n    enum device_mode_dis_enum discoverable;\n    enum device_mode_conn_enum connectable;\n};\n\nstruct btm_inquiry_result_item_t\n{\n    struct list_node list;\n\n    struct bdaddr_t remote;\n\n    uint16 timeout_count;  /*=0: disable , count down to 1: timeout happen*/\n\n    /* received in inquiry result */\n    uint8 page_scan_repetition_mode;\n    uint8 page_scan_period_mode;\n    uint8 class_dev[3];\n    uint16 clk_off;\n};\n\ntypedef uint8  connection_role;\n\n#define BCR_MASTER   0x00\n#define BCR_SLAVE    0x01\n#define BCR_ANY      0x02\n\n#define GAP_INVALID_CONIDX                      0xFF\n#define BTM_MAX_LINK_NUMS                       0x02\n#define BTM_MAX_xSCO_NUMS                       0x02\n\n#define BTM_FEAT_3SLOT_PACKETS      0,0,0x01\n#define BTM_FEAT_5SLOT_PACKETS      0,0,0x02\n#define BTM_FEAT_ENCRYPTION         0,0,0x04\n#define BTM_FEAT_SLOT_OFFSET        0,0,0x08\n#define BTM_FEAT_TIMING_ACC         0,0,0x10\n#define BTM_FEAT_ROLE_SWITCH        0,0,0x20\n#define BTM_FEAT_HOLD_MODE          0,0,0x40\n#define BTM_FEAT_SNIFF_MODE         0,0,0x80\n#define BTM_FEAT_PWR_CTRL_REQ       0,1,0x02\n#define BTM_FEAT_CQDDR              0,1,0x04\n#define BTM_FEAT_SCO_LINK           0,1,0x08\n#define BTM_FEAT_HV2_PACKETS        0,1,0x10\n#define BTM_FEAT_HV3_PACKETS        0,1,0x20\n#define BTM_FEAT_ULAW_SYNC_DATA     0,1,0x40\n#define BTM_FEAT_ALAW_SYNC_DATA     0,1,0x80\n#define BTM_FEAT_CVSD_SYNC_DATA     0,2,0x01\n#define BTM_FEAT_PAGE_PARA_NEGO     0,2,0x02\n#define BTM_FEAT_PWR_CTRL           0,2,0x04\n#define BTM_FEAT_TRANS_SYNC_DATA    0,2,0x08\n#define BTM_FEAT_FLOW_CTRL_LST_BIT  0,2,0x10\n#define BTM_FEAT_FLOW_CTRL_MID_BIT  0,2,0x20\n#define BTM_FEAT_FLOW_CTRL_MST_BIT  0,2,0x40\n#define BTM_FEAT_BROADCAST_ENCRYT   0,2,0x80\n#define BTM_FEAT_EDR_2M_MODE        0,3,0x02\n#define BTM_FEAT_EDR_3M_MODE        0,3,0x04\n#define BTM_FEAT_ENHANCED_ISCAN     0,3,0x08\n#define BTM_FEAT_INTERLACED_ISCAN   0,3,0x10\n#define BTM_FEAT_INTERLACED_PSCAN   0,3,0x20\n#define BTM_FEAT_RSSI_WITH_INQRES   0,3,0x40\n#define BTM_FEAT_ESCO_LINK          0,3,0x80\n#define BTM_FEAT_EV4_PACKETS        0,4,0x01\n#define BTM_FEAT_EV5_PACKETS        0,4,0x02\n#define BTM_FEAT_AFH_CAPAB_SLAVE    0,4,0x08\n#define BTM_FEAT_AFH_CLASS_SLAVE    0,4,0x10\n#define BTM_FEAT_BREDR_NOT_SUPP     0,4,0x20\n#define BTM_FEAT_LE_CTRL_SUPP       0,4,0x40\n#define BTM_FEAT_3SLOT_EDR_ACL      0,4,0x80\n#define BTM_FEAT_5SLOT_EDR_ACL      0,5,0x01\n#define BTM_FEAT_SNIFF_SUBRATING    0,5,0x02\n#define BTM_FEAT_PAUSE_ENCRYPT      0,5,0x04\n#define BTM_FEAT_AFH_CAPAB_MASTER   0,5,0x08\n#define BTM_FEAT_AFH_CLASS_MASTER   0,5,0x10\n#define BTM_FEAT_EDR_ESCO_2M_MODE   0,5,0x20\n#define BTM_FEAT_EDR_ESCO_3M_MODE   0,5,0x40\n#define BTM_FEAT_3SLOT_EDR_ESCO     0,5,0x80\n#define BTM_FEAT_EXTENDED_INQRES    0,6,0x01\n#define BTM_FEAT_SIMU_LE_BREDR_CTRL 0,6,0x02\n#define BTM_FEAT_SECURE_SIMPLE_PAIR 0,6,0x08\n#define BTM_FEAT_ENCAPSULATED_PDU   0,6,0x10\n#define BTM_FEAT_ERR_DATA_REPORT    0,6,0x20\n#define BTM_FEAT_NONFLUSH_PBF       0,6,0x40\n#define BTM_FEAT_LINKSUPTO_CHANGE   0,7,0x01\n#define BTM_FEAT_INQ_TX_PWR_LEVEL   0,7,0x02\n#define BTM_FEAT_ENHANCED_PWR_CTRL  0,7,0x04\n#define BTM_FEAT_EXTENDED_FEATURES  0,7,0x80\n#define BTM_FEAT_SSP_HOST_SUPP      1,0,0x01\n#define BTM_FEAT_LE_HOST_SUPP       1,0,0x02\n#define BTM_FEAT_SIMU_LE_BREDR_HOST 1,0,0x04\n#define BTM_FEAT_SEC_CONN_HOST_SUPP 1,0,0x08\n#define BTM_FEAT_SLAVE_BROAD_MSTOP  2,0,0x01\n#define BTM_FEAT_SLAVE_BROAD_SLVOP  2,0,0x02\n#define BTM_FEAT_SYNCHRON_TRAIN     2,0,0x04\n#define BTM_FEAT_SYNCHRON_SCAN      2,0,0x08\n#define BTM_FEAT_INQRES_NOTIFY      2,0,0x10\n#define BTM_FEAT_GENERAL_INTERSCAN  2,0,0x20\n#define BTM_FEAT_COARSE_CLOCK_ADJ   2,0,0x40\n#define BTM_FEAT_SEC_CONN_CTRL_SUPP 2,1,0x01\n#define BTM_FEAT_PING               2,1,0x02\n#define BTM_FEAT_TRAIN_NUDGING      2,1,0x08\n#define BTM_FEAT_SLOT_AVAIL_MASK    2,1,0x10\n\n#define BTM_MAX_FEATURE_PAGE (3)\n\nstruct btm_feature_t\n{\n    uint8 max_page;\n    uint8 feature[8];\n};\n\n#define BTM_AUTH_WAIT_CMPL 0x01 \n#define BTM_AUTH_WAIT_MSS  0x02\n#define REMOTE_VERSION_LEN 5\n\nstruct btm_conn_item_t\n{\n    struct list_node list;\n    struct list_node sco_conn_list;\n    struct pp_buff_head   tx_queue;\n    struct pp_buff * ppb_recv;\n\n    struct bdaddr_t remote;\n    void *cmgr_handler;\n    uint16 conn_handle;\n\n    uint8 used;\n    /*1: positive connet to the remote or 0: negtive be connected*/\n    uint8 positive;\n\n    /* received in inquiry result */\n    uint8 page_scan_repetition_mode;\n    uint16 clk_off;\n\n#if CFG_BTM_DISC_ACL_IN_BTM_TIMER==1\n    uint8 disconn_flag;  /*if this is need to disconn*/\n    uint8 disconn_count; /*to undercount to disconn*/\n#endif\n    uint8 discReason_saved;\n    uint8 discReason;\n    uint8 lowpower_flag;  /*if is lowpower. decided to buffer tx data*/\n    uint8 lowpower_count; /*to count when to enter lowpower*/\n    uint8 sniff_count;  /*to count how many sniff req sent*/\n    uint8 role_switch_pending;\n    uint8 authen_enable_flag;\n    uint8 authen_pending;\n    uint8 encry_enable_flag;/*tell if the entryption is enabled in this acl conn*/\n    uint8 encry_need_flag;/*tell if the entryption is need*/\n    connection_role role;\n    uint8 state;\n    uint8 mode;\n    uint8 authState;\n\tuint8 io_cap;\n\tuint8 oob_present;\n\tuint8 authen_requirement;\n    uint8 conn_dev_idx;\n    uint16 rx_complete_count; /* Host HCI RX packets complete number, controller to host flow control */\n    uint8 remote_version[5];\n    struct btm_feature_t remote_feature[BTM_MAX_FEATURE_PAGE];\n#if (BTM_HCI_HOST_FLOW_CONTROL_ENABLE == 1)\n    uint8 fc_bt_tx_acl_unconfirmed;\n#endif\n#if (CFG_BTM_USE_INPLACE_BUFFER_FOR_ACL==1)\n    uint8 *btm_acl_inplace_buff;\n#endif\n};\n    \n#define IS_REMOTE_FEAT_SUPPORT(conn, FEAT_MASK) \\\n    btm_is_remote_feature_support(conn, FEAT_MASK)\n\nstruct btm_sco_conn_item_t\n{\n    struct list_node list;\n    struct btm_conn_item_t *conn;  /*acl connection*/\n    uint16 conn_handle;\n    uint8 link_type;  /* HCI_LINK_TYPE_ESCO or HCI_LINK_TYPE_SCO */\n    enum conn_sco_stat_enum status;\n    connection_role role;\n    uint8 index;\n    uint8 used;\n};\n\nenum btm_stack_state {\n    BTM_STACK_Initializing = 0,\n    BTM_STACK_Ready = 1,\n};\n\nenum btm_stack_init_sub_state {\n    BTM_INIT_ST_RESET = 0,\n    BTM_INIT_ST_SET_VOICE_SETTTING,\n    BTM_INIT_ST_READ_BUFFER_SIZE, \n    BTM_INIT_ST_LE_READ_BUFFER_SIZE,\n    BTM_INIT_ST_HOST_BUFFER_SIZE, \n    BTM_INIT_ST_SET_HCITOHOST_FLOW_CONTROL, \n    BTM_INIT_ST_WRITE_PAGE_TIEMOUT, \n    BTM_INIT_ST_READ_PAGE_TIMEOUT, \n    BTM_INIT_ST_SET_BLE_ADDRESS, \n    BTM_INIT_ST_SET_BD_ADDRESS, \n    BTM_INIT_ST_SET_EVENT_MASK, \n    BTM_INIT_ST_SET_BLE_EVENT_MASK, \n    BTM_INIT_ST_READ_LOCAL_VER_INFO, \n    BTM_INIT_ST_READ_LOCAL_SUP_COMMANDS, \n    BTM_INIT_ST_READ_LOCAL_FEATURES, \n    BTM_INIT_ST_READ_LOCAL_EXT_FEATURES, \n    BTM_INIT_ST_READ_LOCAL_EXT_FEATURES_1, \n    BTM_INIT_ST_READ_LOCAL_EXT_FEATURES_2, \n    BTM_INIT_ST_READ_BD_ADDRESS, \n    BTM_INIT_ST_READ_INQUIRY_MODE, \n    BTM_INIT_ST_READ_DEF_ERR_DATA_REPORTING, \n    BTM_INIT_ST_WRITE_SAMPLE_PAIRING_MODE, \n    BTM_INIT_ST_WRITE_CLASS_OF_DEVICE, \n    BTM_INIT_ST_WRITE_LOCAL_NAME, \n    BTM_INIT_ST_WRITE_SYNC_CONFIG, \n    BTM_INIT_ST_WRITE_DEF_ERR_DATA_REPORTING, \n    BTM_INIT_ST_WRITE_DEFAULT_LP_SETTINGS, \n    BTM_INIT_ST_WRITE_PAGESCAN_ACTIVITY, \n    BTM_INIT_ST_WRITE_INQUIRYSCAN_ACTIVITY, \n    BTM_INIT_ST_WRITE_INQUIRYSCAN_TYPE, \n    BTM_INIT_ST_WRITE_PAGESCAN_TYPE,     \n\n    BTM_INIT_ST_NUM,\n};\n\nstruct btm_sync_conn_param {\n    uint16 max_latency;\n    uint16 packet_type;\n    uint16 voice_setting;\n    uint8  retrans_effort;\n    uint32 receive_bandwidth;\n    uint32 transmit_bandwidth;    \n};\n\nstruct btm_ctrl_t {\n    enum btm_stack_state stack_state;\n    enum btm_stack_init_sub_state init_sub_state;\n    uint16 init_sub_state_opcode;\n    uint8 pairing_flag;  /*tell whether the device in pairing state, 1:yes, 0:no*/\n    uint32 pairing_timeout;\n    void (*btm_pairing_notify_callback)(enum btm_pairing_event event,void *pdata);\n    uint8 security_waitfor_linkkey_reply;\n    struct bdaddr_t security_waitfor_linkkey_reply_bdaddr;\n\n    // local\n    uint8 bt_version;\n    uint8 bt_features[8];\n    uint8 bt_ext_features[2][8];\n\n    // esco\n    uint8 sco_param_select;\n    uint8 sco_default_param_select;\n    struct btm_sync_conn_param sco_custom_param;\n\n    // security\n    uint8 security_bonding_mode;\n    uint8 security_auth_requirements;\n    uint8 security_io_capability;\n    uint8 security_oob_present;\n\n#if (BTM_HCI_HOST_FLOW_CONTROL_ENABLE == 1)\n    uint16 fc_bt_tx_cmd_left;\n    uint8 fc_bt_tx_acl_left;\n    uint8 fc_bt_tx_acl_total;\n    uint8 fc_bt_rx_acl_left;\n\n#ifdef __IAG_BLE_INCLUDE__\n    uint8 fc_ble_tx_acl_left;\n    uint8 fc_ble_tx_acl_total;\n    uint8 fc_ble_share_bt_tx_packet;\n    uint8 bleAclRxPacketsLeft;\n    uint8 bleFlags;\n#endif\n\n#endif /* BTM_HCI_HOST_FLOW_CONTROL_ENABLE */\n    void (*btm_event_report)(uint16 evt_id, void* pdata);\n    void (*btm_cmgr_event_report)(uint16 evt_id, void* conn);\n    bool conn_req_cb_enable;\n    uint8 con_num;\n\n    uint8 sync_cmd_busy;\n    hci_buff_t *sync_cmd_curr;\n};\n\n#define BTM(x) btm_ctrl.x\n\nstruct btm_conn_env_t {\n    struct btm_conn_item_t *conn_item;\n};\n\nstruct btm_pts_ctrl_t{\n    uint8_t pts_mode ;\n    uint8_t pts_accept ; \n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nextern struct btm_pts_ctrl_t btm_pts_ctrl;\nextern struct btm_ctrl_t btm_ctrl;\nstruct btm_inquiry_result_item_t *btm_inquiry_result_search ( struct bdaddr_t *bdaddr );\nstruct btm_inquiry_result_item_t *btm_inquiry_result_find_or_add ( struct bdaddr_t *bdaddr );\nstruct btm_conn_item_t *btm_conn_add_new ( struct bdaddr_t *bdaddr );\nstruct btm_conn_item_t *btm_conn_search ( struct bdaddr_t *bdaddr );\nuint16 btm_conn_find_scohdl_by_connhdl(uint16 conn_handle);\nstruct btm_conn_item_t *btm_conn_search_linkup ( struct bdaddr_t *bdaddr );\nstruct btm_conn_item_t *btm_conn_find_or_add ( struct bdaddr_t *bdaddr );\nstruct btm_sco_conn_item_t *btm_conn_sco_find_or_add( struct btm_conn_item_t *conn);\nstruct btm_conn_item_t *btm_conn_acl_search_by_handle( uint16 conn_handle);\nstruct btm_sco_conn_item_t *btm_conn_sco_search_by_handle( uint16 conn_handle);\nbool btm_is_remote_feature_support(struct btm_conn_item_t* conn, uint8 page, uint8 i, uint8 mask);\nvoid btm_conn_disconnect_process(uint16 handle, uint8 status, uint8 reason);\nint8 btlib_hcicmd_read_remote_name(struct bdaddr_t *bdaddr, uint8 page_scan_repetition_mode, uint16 clk_off);\nvoid btm_sco_conn_status_notify  (struct bdaddr_t *remote_bdaddr, enum conn_sco_stat_enum sco_conn_notify_type);\nvoid btm_conn_acl_process_tx(struct btm_conn_item_t *conn);\nint8 btm_conn_acl_send_ppb_done(uint16 conn_handle, struct pp_buff *ppb);\nvoid btm_register_event_report( void (*evt_cb)(uint16 evt_id, void *pdata));\nvoid btm_register_cmgr_event_report(void (*evt_cb)(uint16 evt_id, void* conn));\nextern uint8 gapc_get_conidx(uint16 conhdl);\nextern void gapc_inc_rx_packet_count(uint8 idx,uint8 inc_count);\nextern uint8 gapc_get_rx_packet_counnt(uint8 idx);\nextern uint8 gapc_get_conn_handle(uint8 idx);\nextern void gapc_rx_packet_count_reset(uint8 idx);\nbool btm_conn_need_authentication(struct btm_conn_item_t *conn);\nuint8 btm_conn_allocate_dev_idx(void);\nvoid btm_conn_free_dev_idx(uint8 idx);\nvoid btm_conn_set_item_by_idx(struct btm_conn_item_t *p_conn_item, uint8 dev_idx);\nstruct l2cap_conn *l2cap_conn_search(struct bdaddr_t *bdaddr);\nstruct l2cap_conn *l2cap_conn_add_new(struct bdaddr_t *bdaddr);\nstruct bdaddr_t *btm_get_address_from_rem_dev(struct btm_conn_item_t *rem_dev);\nstruct btm_conn_item_t * btm_conn_get_item_by_idx(uint8 dev_idx);\nuint8 btm_get_bt_version(void);\nuint8 btm_get_bt_features(uint8 index);\nvoid btm_print_statistic(void);\nvoid btm_conn_delete_free(struct btm_conn_item_t *conn);\nstruct btm_sco_conn_item_t *btm_conn_sco_find( struct btm_conn_item_t *conn);\nstruct btm_sco_conn_item_t *btm_sco_malloc_add( struct btm_conn_item_t *conn);\nvoid btm_sco_delete_free(struct btm_sco_conn_item_t *sco);\nint8 btm_get_pending_hci_cmd(uint16 opcode, struct hci_cmd_packet **cmd);\nbool btm_acl_role_switch_pending(uint16_t conn_handle);\n\n#if (CFG_BTM_USE_INPLACE_BUFFER_FOR_ACL==1)\nvoid btm_inplacebuff_init(void);\n#endif\n#if (BTM_HCI_HOST_FLOW_CONTROL_ENABLE == 1)\nvoid btm_fc_init(void);\n// bt : host to controller\nvoid btm_fc_bt_host_to_controller_cmd_tx_left_update(uint16 v);\nvoid btm_fc_bt_host_to_controller_cmd_tx_left_dec(uint8 v);\nint8 btm_fc_bt_host_to_controller_cmd_can_send(void);\nvoid btm_fc_bt_host_to_controller_acl_unconfirmed_inc(uint16 handle, uint8 v);\nvoid btm_fc_bt_host_to_controller_acl_unconfirmed_dec(uint16 handle, uint8 v);\nvoid btm_fc_bt_host_to_controller_acl_counter_inc(uint8 v);\nvoid btm_fc_bt_host_to_controller_acl_counter_dec(uint8 v);\nint8 btm_fc_bt_host_to_controller_can_send(void);\nint8 btm_fc_bt_hci_buff_list_pop(uint8 type, hci_buff_t **buff);\n#if defined(__IAG_BLE_INCLUDE__)\nvoid bleUpdateFlowControl(uint16 handle);\nvoid BleHciSendCompletedPackets(BOOL TimerFired, BOOL isForceSend);\nbool bridge_get_ble_handle(uint16 connHandle);\nBOOL btm_ble_conn_is_up(uint16 handle);\n// bt : host to controller\nvoid btm_fc_ble_host_to_controller_acl_unconfirmed_inc(uint16 handle, uint8 v);\nvoid btm_fc_ble_host_to_controller_acl_unconfirmed_dec(uint16 handle, uint8 v);\nvoid btm_fc_ble_host_to_controller_acl_counter_inc(uint8 v);\nvoid btm_fc_ble_host_to_controller_acl_counter_dec(uint8 v);\nint8 btm_fc_ble_host_to_controller_can_send(void);\nvoid btm_fc_ble_host_to_controller_flow_check(void);\n#endif /* __IAG_BLE_INCLUDE__ */\n// bt : controller to host\nvoid btm_fc_bt_controller_to_host_acl_counter_inc(uint8 v);\nvoid btm_fc_bt_controller_to_host_acl_counter_dec(uint8 v);\nvoid btm_fc_bt_update_host_num_complete_pkts(uint16 handle, uint8 inc, bool right_now);\nvoid btm_fc_bt_send_host_num_completed_pkts(void *arg);\nvoid btm_fc_print_statistic(void);\n\n#endif /* BTM_HCI_HOST_FLOW_CONTROL_ENABLE */\nuint8_t btm_sco_conn_count();\nuint8_t btm_get_sco_max_number();\nvoid btm_set_sco_max_number(uint8_t num);\n#ifdef __cplusplus \n}\n#endif\n\n#endif /* __BTM_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btm_devicedb.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BTM_DEVICEDB_H__\n#define __BTM_DEVICEDB_H__\n\n#include \"btlib_type.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint8 btm_devicedb_get_latest_device ( struct bdaddr_t *bdaddr );\nint8 btm_devicedb_save_latest_device (struct bdaddr_t *bdaddr );\nint8 btm_devicedb_save_latest_device_profile (struct bdaddr_t *bdaddr, uint8* profile);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __BTM_DEVICEDB_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btm_fast_init.h",
    "content": "#ifndef __BTM_FAST_INIT__\n#define __BTM_FAST_INIT__\n#include \n#include \"btlib_type.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nvoid btm_fast_init(uint8_t* bt_addr, uint8_t* ble_addr);\n\n#ifdef __cplusplus \n}\n#endif\n#endif//__BTM_FAST_INIT__\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btm_handle_hcievent.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BTM_HANDLE_HCIEVENT_H__\n#define __BTM_HANDLE_HCIEVENT_H__\n\n#include \"btlib.h\"\n#include \"btm_hci.h\"\ntypedef bool (*ibrt_io_capbility_callback)(void *bdaddr);\n\nvoid btm_event_handle(uint8 *param, uint8 *priv, uint8 *donot_free);\nvoid btm_ble_acl_handle(uint16 conn_handle, uint8 *data_p, uint16 data_len, uint8 *priv, uint8 *donot_free);\nvoid btm_acl_handle(uint16 conn_handle, uint8 *data_p, uint16 data_len, uint8 *priv, uint8 *donot_free);\nvoid btm_sco_handle(uint16 conn_handle, uint8 *data_p, uint16 data_len, uint8 *priv, uint8 *donot_free);\nvoid btm_process_conn_complete_evt(struct hci_evt_packet_t *pkt);\n//void btm_process_conn_req_evt(struct hci_evt_packet_t *pkt);\nint8 btm_create_acl_connection_fail_process(struct btm_conn_item_t *conn, uint8 status, struct bdaddr_t *bdaddr);\n\nvoid btm_process_pin_code_req_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_link_key_req_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_link_key_notify_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_authentication_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_simple_pairing_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_encryption_change_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_remote_name_req_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_inquiry_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_inquiry_result_evt(struct hci_evt_packet_t *pkt, uint8 rssi, uint8 extinq);\nvoid btm_process_mode_change_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_acl_data_active_evt(void *conn, uint16_t len);\nvoid btm_process_acl_data_not_active_evt(void *conn, uint16_t len);\nvoid btm_process_num_of_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_read_remote_version_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_read_remote_supported_feature_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_read_remote_extended_feature_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_cmd_complete_inquiry_cancel (uint8 *data);\nvoid btm_process_cmd_complete_remote_name_cancel(uint8 *data);\nvoid btm_process_cmd_complete_evt(struct hci_evt_packet_t *pkt);\nvoid btm_process_cmd_complete_read_buffer_size(uint8 *data);\nvoid btm_process_return_linkkeys_evt (struct hci_evt_packet_t *pkt); \nvoid btm_acl_handle_nocopy(uint16 conn_handle, uint16 data_len, uint8 *data_p);\nextern void hcile_acl_rx_data_received(uint16 conn_handle, uint16 data_len, uint8 *data_p);\nextern int hci_no_operation_cmd_cmp_evt_handler(uint16_t opcode, void const *param);\nextern uint8_t hcile_evt_received(uint8_t code, uint8_t length, uint8 *data_p);\nvoid btm_process_vendor_evt(struct hci_evt_packet_t *pkt);\n\n#endif /* __BTM_HANDLE_HCIEVENT_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btm_hci.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BTM_HCI_H__\n#define __BTM_HCI_H__\n\n#include \"bt_sys_cfg.h\"\n#include \"string.h\"\n\n/* HCI Error Codes */\n#define HCI_STATUS_OK                               0x00\n#define HCI_ERR_UNKNOWN_HCI_CMD                     0x01\n#define HCI_ERR_NO_CONNECTION                       0x02\n#define HCI_ERR_HARDWARE_FAILURE                    0x03\n#define HCI_ERR_PAGE_TIMEOUT                        0x04\n#define HCI_ERR_AUTH_FAILURE                        0x05\n#define HCI_ERR_KEY_MISSING                         0x06\n#define HCI_ERR_MEMORY_FULL                         0x07\n#define HCI_ERR_CONN_TIMEOUT                        0x08\n#define HCI_ERR_MAX_NUM_CONNS                       0x09\n#define HCI_ERR_MAX_SCO_CONNS                       0x0A\n#define HCI_ERR_ACL_ALREADY_EXISTS                  0x0B\n#define HCI_ERR_CMD_DISALLOWED                      0x0C\n#define HCI_ERR_HOST_REJ_NO_RESOURCES               0x0D\n#define HCI_ERR_HOST_REJ_SECURITY                   0x0E\n#define HCI_ERR_HOST_REJ_PERSONAL_DEV               0x0F\n#define HCI_ERR_HOST_TIMEOUT                        0x10\n#define HCI_ERR_UNSUPP_FEATUR_PARM_VAL              0x11\n#define HCI_ERR_INVAL_HCI_PARM_VAL                  0x12\n#define HCI_ERR_CONN_TERM_USER_REQ                  0x13\n#define HCI_ERR_CONN_TERM_LOW_RESOURCES             0x14\n#define HCI_ERR_CONN_TERM_POWER_OFF                 0x15\n#define HCI_ERR_CONN_TERM_LOCAL_HOST                0x16\n#define HCI_ERR_REPEATED_ATTEMPTS                   0x17\n#define HCI_ERR_PAIRING_DISALLOWED                  0x18\n#define HCI_ERR_UNKNOWN_LMP_PDU                     0x19\n#define HCI_ERR_UNSUPP_REMOTE_FEATURE               0x1A\n#define HCI_ERR_SCO_OFFSET_REJECTED                 0x1B\n#define HCI_ERR_SCO_INTERVAL_REJECTED               0x1C\n#define HCI_ERR_SCO_AIR_MODE_REJECTED               0x1D\n#define HCI_ERR_INVALID_LMP_PARM                    0x1E\n#define HCI_ERR_UNSPECIFIED_ERROR                   0x1F\n#define HCI_ERR_UNSUPP_LMP_PARM                     0x20\n#define HCI_ERR_ROLE_CHANGE_DISALLOWED              0x21\n#define HCI_ERR_LMP_RESPONSE_TIMEDOUT               0x22\n#define HCI_ERR_LMP_ERR_TRANSACT_COLL               0x23\n#define HCI_ERR_LMP_PDU_DISALLOWED                  0x24\n#define HCI_ERR_ENCRYPTN_MODE_UNACCEPT              0x25\n#define HCI_ERR_UNIT_KEY_USED                       0x26\n#define HCI_ERR_QOS_NOT_SUPPORTED                   0x27\n#define HCI_ERR_INSTANT_PASSED                      0x28\n#define HCI_ERR_PAIRING_W_UNIT_KEY_UNSUPP           0x29\n#define HCI_ERR_DIFFERENT_TRANSACTION_COLLISION     0x2A\n#define HCI_ERR_INSUFF_RESOURCES_FOR_SCATTER_MODE   0x2B\n#define HCI_ERR_QOS_UNACCEPTABLE_PARAMETER          0x2C\n#define HCI_ERR_QOS_REJECTED                        0x2D\n#define HCI_ERR_CHANNEL_CLASSIF_NOT_SUPPORTED       0x2E\n#define HCI_ERR_INSUFFICIENT_SECURITY               0x2F\n#define HCI_ERR_PARAMETER_OUT_OF_MANDATORY_RANGE    0x30\n#define HCI_ERR_SCATTER_MODE_NO_LONGER_REQUIRED     0x31\n#define HCI_ERR_ROLE_SWITCH_PENDING                 0x32\n#define HCI_ERR_SCATTER_MODE_PARM_CHNG_PENDING      0x33\n#define HCI_ERR_RESERVED_SLOT_VIOLATION             0x34\n#define HCI_ERR_SWITCH_FAILED                       0x35\n#define HCI_ERR_EXTENDED_INQ_RESP_TOO_LARGE         0x36\n#define HCI_ERR_SECURE_SIMPLE_PAIR_NOT_SUPPORTED    0x37\n#define HCI_ERR_HOST_BUSY_PAIRING                   0x38\n\n/* voice setting*/\n#define INPUT_CODING_LINEAR 0x0000\n#define INPUT_CODING_ULAW 0x0100\n#define INPUT_CODING_ALAW 0x0200\n#define INPUT_DATA_FORMAT_1S 0x0000\n#define INPUT_DATA_FORMAT_2S 0x0040\n#define INPUT_DATA_FORMAT_SIGN 0x0080\n#define INPUT_DATA_FORMAT_UNSIGN 0x00C0\n#define INPUT_SAMPLE_SIZE_8BITS 0x0000\n#define INPUT_SAMPLE_SIZE_16BITS 0x0020\n#define AIR_CODING_FORMAT_CVSD 0x0000\n#define AIR_CODING_FORMAT_ULAW 0x0001\n#define AIR_CODING_FORMAT_ALAW 0x0002\n#define AIR_CODING_FORMAT_TRANSPARENT 0x0003\n#define AIR_CODING_FORMAT_MSBC 0x0060\n\n\n/* ACL */\n#define HCI_PKT_TYPE_DM1  0x0008\n#define HCI_PKT_TYPE_DH1  0x0010\n#define HCI_PKT_TYPE_DM3  0x0400\n#define HCI_PKT_TYPE_DH3  0x0800\n#define HCI_PKT_TYPE_DM5  0x4000\n#define HCI_PKT_TYPE_DH5  0x8000\n#define HCI_PKT_TYPE_ACL  0xcc18\n\n/* sco esco */\n#define HCI_PKT_TYPE_HV1  0x0001\n#define HCI_PKT_TYPE_HV2  0x0002\n#define HCI_PKT_TYPE_HV3  0x0004\n#define HCI_PKT_TYPE_EV3  0x0008\n#define HCI_PKT_TYPE_EV4  0x0010\n#define HCI_PKT_TYPE_EV5  0x0020\n#define HCI_PKT_TYPE_2EV3   0x0040\n#define HCI_PKT_TYPE_3EV3   0x0080\n#define HCI_PKT_TYPE_2EV5   0x0100\n#define HCI_PKT_TYPE_3EV5   0x0200\n#define HCI_PKT_TYPE_SCO  0x003f\n\n\n#define HCI_HANDLE_MASK                        0x0FFF\n#define HCI_FLAG_PB_MASK                      0x3000\n#define HCI_FLAG_BROADCAST_MASK       0xC000\n\n\n\n#define BROADCAST_NONE                         0x0000\n#define BROADCAST_ACTIVE                      0x4000\n#define BROADCAST_PARKED                     0x8000\n\n\n/*create connection param*/\n#define ALLOW_ROLE_SWITCH_YES   0x01\n#define ALLOW_ROLE_SWITCH_NO    0x00\n\n\n/*accept connection req param*/\n#define ROLE_BECAME_MASTER 0x00\n#define ROLE_REMAIN_SLAVE 0x01\n\n\n/* link policy */\n#define HCI_LP_ENABLE_ROLE_SWITCH_MASK  0x01\n#define HCI_LP_ENABLE_HOLD_MODE_MASK        0x02\n#define HCI_LP_ENABLE_SNIFF_MODE_MASK       0x04\n#define HCI_LP_ENABLE_PARK_MODE_MASK        0x08\n\n\n#ifdef __IAG_BLE_INCLUDE__\n#define HCI_BLE_SUBEVT_CODE_CONNECT_CPMPLETE    1\n#endif /* __IAG_BLE_INCLUDE__ */\n\n/******************************************************************************************\n * Event Evtcode Definition  (OLD)\n *****************************************************************************************/\n#define HCI_MasterLinkKeyCompleteEvt_Code                0x0A\n#define HCI_PageScanModeChangeEvt_Code                   0x1F\n#define HCI_PageScanRepetitionModeChangeEvt_Code         0x20\n#define HCI_InquiryResultEvt_withRSSI                    0x22\n\n#define HCI_EV_INQUIRY_COMPLETE 0x01\n struct hci_ev_inquiry_complete {\n    uint8 status;\n}__attribute__ ((packed));\n\n#define HCI_EV_INQUIRY_RESULT        0x02\n#define HCI_EV_INQUIRY_RESULT_RSSI   0x22\n#define HCI_EV_INQUIRY_RESULT_EXTINQ 0x2F\n\n#define PAGE_SCAN_REPETITION_MODE_R0    0x00\n#define PAGE_SCAN_REPETITION_MODE_R1    0x01\n#define PAGE_SCAN_REPETITION_MODE_R2    0x02\n#define PAGE_SCAN_PERIOD_MODE_P0    0x00\n#define PAGE_SCAN_PERIOD_MODE_P1    0x01\n#define PAGE_SCAN_PERIOD_MODE_P2    0x02\n struct hci_ev_inquiry_result {\n    uint8 num_responses;\n    struct bdaddr_t bdaddr;\n    uint8 page_scan_repetition_mode;\n    uint8 reserved1;\n    uint8 reserved2;/*must be 0*/\n    uint8 class_dev[3];\n    uint16 clk_off;\n}__attribute__ ((packed));\n\n\n\n#define HCI_EV_CONN_COMPLETE    0x03\n struct hci_ev_conn_complete {\n    uint8     status;\n    uint16   handle;\n    struct bdaddr_t bdaddr;\n    uint8     link_type;\n    uint8     encr_mode;\n}__attribute__ ((packed));\n\n#define HCI_EV_CONN_REQUEST 0x04\n\n#define HCI_LINK_TYPE_SCO 0x00\n#define HCI_LINK_TYPE_ACL 0x01\n#define HCI_LINK_TYPE_ESCO 0x02\n struct hci_ev_conn_request {\n    struct bdaddr_t bdaddr;\n    uint8     class_dev[3];\n    uint8     link_type;\n}__attribute__ ((packed));\n\n#define HCI_EV_DISCONN_COMPLETE 0x05\n struct hci_ev_disconn_complete {\n    uint8     status;\n    uint16   handle;\n    uint8     reason;\n}__attribute__ ((packed));\n\n#define HCI_EV_AUTHENTICATION_COMPLETE  0x06\n struct hci_ev_authentication_complete {\n    uint8     status;\n    uint16   handle;\n}__attribute__ ((packed));\n\n#define HCI_EV_REMOTENAMEREQ_COMPLETE   0x07\n#define HCI_REMOTENAME_MAX    248\n struct hci_ev_remote_name_req_complete {\n    uint8    status;\n    struct   bdaddr_t bdaddr;\n    uint8    name[HCI_REMOTENAME_MAX];\n}__attribute__ ((packed));\n\n#define HCI_EV_ENCRYPTION_CHANGE    0x08\n struct hci_ev_encryption_change {\n    uint8    status;\n    uint16   conn_handle;\n    uint8    encryption_enable;\n}__attribute__ ((packed));\n\n\n#define HCI_EV_READ_REMOTE_FEATURES 0x0B\n struct hci_ev_read_remote_features{\n    uint8    status;\n    uint16   conn_handle;\n    uint8    features[8];\n}__attribute__ ((packed));\n\n\n#define HCI_EV_READ_REMOTE_VERSION  0x0C\n struct hci_ev_read_remote_version{\n    uint8    status;\n    uint16   conn_handle;\n    uint8    lmp_version;\n    uint16 manufacturer_name;\n    uint16  lmp_subversion;\n}__attribute__ ((packed));\n\n\n\n#define HCI_EV_QOSSETUP_COMPLETE                     0x0D\n\n struct hci_ev_qossetup_complete{\n    uint8    status;\n    uint16   conn_handle;\n    uint8    flags;\n    uint8 service_type;\n    uint32 token_rate;\n    uint32 peak_bandwith;\n    uint32 latency;\n    uint32 delay_v;\n}__attribute__ ((packed));\n\n\n#define HCI_EV_CMD_COMPLETE 0x0e\n\n struct hci_ev_cmd_complete{\n    uint8   num_hci_cmd_packets;\n    uint16  cmd_opcode;\n    uint8   param[1];\n}__attribute__ ((packed));\n\n#define HCI_EV_CMD_STATUS   0x0f\n struct hci_ev_cmd_status{\n    uint8   status;\n    uint8   num_hci_cmd_packets;\n    uint16  cmd_opcode;\n}__attribute__ ((packed));\n\n#define HCI_EV_HARDWARE_ERROR   0x10\n struct hci_ev_hardware_error{\n    uint8 hw_code;\n}__attribute__ ((packed));\n\n\n#define HCI_EV_ROLE_CHANGE                           0x12\n struct hci_ev_role_change{\n    uint8 status;\n    struct bdaddr_t bdaddr;\n    uint8     new_role;\n}__attribute__ ((packed));\n\n struct hci_ev_cmd_complete_read_stored_linkkey{\n    uint8     status;\n    uint16   max_num_keys;\n    uint8    num_keys_read;\n}__attribute__ ((packed));\n\n struct hci_ev_cmd_complete_le_read_buffer_size{\n    uint8     status;\n    uint16   le_data_packet_length;\n    uint8    total_num_le_data_packets;\n}__attribute__ ((packed));\n\n struct hci_ev_cmd_complete_role_discovery{\n    uint8     status;\n    uint16   connection_handle;\n    uint8    current_role;\n}__attribute__ ((packed));\n\n\nstruct hci_ev_cmd_complete_read_local_version{\n    uint8 status;\n    uint8 hci_version;\n    uint16 hci_revision;\n    uint8 lmp_version;\n    uint16 manu_name;\n    uint16 lmp_subversion;\n}__attribute__ ((packed));\n\nstruct hci_ev_cmd_complete_read_local_sup_features{\n    uint8 status;\n    uint8 features[8];\n}__attribute__ ((packed));\n\nstruct hci_ev_cmd_complete_read_local_ext_features{\n    uint8 status;\n    uint8 page_num;\n    uint8 max_page_num;\n    uint8 features[8];\n}__attribute__ ((packed));\n\n#define HCI_EV_NUM_OF_CMPLT 0x13\n struct hci_ev_num_of_complete{\n    uint8  num_handle;\n    uint16 handle;\n    uint16 num_of_comp;\n}__attribute__ ((packed));\n\n struct hci_ev_num_of_complete_item{\n    uint16 handle;\n    uint16 num_of_comp;\n}__attribute__ ((packed));\n\n#define HCI_EV_MODE_CHANGE  0x14\n\n#define HCI_MODE_ACTIVE 0x00\n#define HCI_MODE_HOLD 0x01\n#define HCI_MODE_SNIFF 0x02\n#define HCI_MODE_PARK 0x03\n\n struct hci_ev_mode_change {\n    uint8     status;\n    uint16   handle;\n    uint8    current_mode;\n    uint16  interval;\n}__attribute__ ((packed));\n\n#define HCI_EV_RETURN_LINKKEYS  0x15\n\n struct hci_ev_return_linkkeys{\n    uint8     num_keys;\n    struct bdaddr_t bdaddr;\n    uint8   link_key[16];\n}__attribute__ ((packed));\n\nstruct hci_evt_packet_t {\n    uint8 evt_code;\n    uint8 length;\n    uint8 data[1];\n}__attribute__ ((packed));\n\n#define HCI_EV_PIN_CODE_REQ 0x16\n struct hci_ev_pin_code_req {\n    struct bdaddr_t bdaddr;\n}__attribute__ ((packed));\n\n#define HCI_EV_LINK_KEY_REQ 0x17\n struct hci_ev_link_key_req {\n    struct bdaddr_t bdaddr;\n}__attribute__ ((packed));\n\n#define HCI_EV_LINK_KEY_NOTIFY  0x18\n struct hci_ev_link_key_notify {\n    struct bdaddr_t bdaddr;\n    uint8    link_key[16];\n    uint8    key_type;\n}__attribute__ ((packed));\n\n#define HCI_EV_DATABUF_OVERFLOW 0x1A\n struct hci_ev_databuf_overflow{\n    uint8 link_type;\n}__attribute__ ((packed));\n\n\n#define HCI_EV_MAX_SLOT_CHANGE  0x1B\n struct hci_ev_max_slot_change {\n    uint16 handle;\n    uint8   max_slots;\n}__attribute__ ((packed));\n\n#define HCI_EV_READ_CLKOFF_Code              0x1C\n struct hci_ev_read_clkoff{\n    uint8    status;\n    uint16     handle;\n    uint16    clkoff;\n}__attribute__ ((packed));\n\n#define HCI_EV_CONNPKT_TYPE_CHANGE           0x1D\n struct hci_ev_connpkt_type_change {\n    uint8 status;\n    uint16 handle;\n    uint16 pkt_type;\n}__attribute__ ((packed));\n\n#define HCI_EV_QOS_VIOLATION                         0x1E\n struct hci_ev_qos_violation {\n    uint16 handle;\n}__attribute__ ((packed));\n\n#define HCI_EV_FLOW_SPECIFICATION                    0x21\n struct hci_ev_flow_specification {\n    uint8 status;\n    uint16 handle;\n    uint8 flags;\n    uint8 flow_dir;\n    uint8 service_type;\n    uint32 token_rate;\n    uint32 token_bucket;\n    uint32 peak_bandwidth;\n    uint32 latency;\n}__attribute__ ((packed));\n\n#define HCI_EV_READ_REMOTE_EXTFEATURES   0x23\n struct hci_ev_read_remote_extfeatures {\n    uint8 status;\n    uint16 handle;\n    uint8 page_num;\n    uint8 max_page_num;\n    uint8 ext_features[8];\n}__attribute__ ((packed));\n\n#define HCI_EV_SYNC_CONN_COMPLETE   0x2c\n struct hci_ev_sync_conn_complete {\n    uint8     status;\n    uint16   handle;\n    struct bdaddr_t bdaddr;\n    uint8 link_type;\n    uint8 tx_interval;\n    uint8 retx_window;\n    uint16 rx_pkt_length;\n    uint16 tx_pkt_length;\n    uint8 air_mode;\n}__attribute__ ((packed));\n\n#define HCI_EV_ENCRYPT_KEY_REFRESH_COMPLETE    0x30\n\n#define HCI_EV_IO_CAPABILITY_REQUEST    0x31\nstruct hci_ev_io_capability_request {\n    struct bdaddr_t bdaddr;\n}__attribute__ ((packed));\n\n#define HCI_EV_IO_CAPABILITY_RESPONSE    0x32\nstruct hci_ev_io_capability_response {\n    struct bdaddr_t bdaddr;\n    uint8 io_capability;\n    uint8 oob_data_present;\n    uint8 authentication_requirement;\n}__attribute__ ((packed));\n\n#define HCI_EV_USER_CONFIRMATION_REQUEST    0x33\nstruct hci_ev_user_confirmation_request {\n    struct bdaddr_t bdaddr;\n}__attribute__ ((packed));\n\n#define HCI_EV_SIMPLE_PAIRING_COMPLETE    0x36\nstruct hci_ev_simple_pairing_complete{\n    uint8 status;\n    struct bdaddr_t bdaddr;\n}__attribute__ ((packed));\n\n#define HCI_EV_LINK_SUPERV_TIMEOUT_CHANGED    0x38\n\n#define HCI_LE_META_EVT    0x3E\n#define HCI_LE_EV_CONN_COMPLETE 0x01\n#define HCI_LE_EV_ADV_REPORT    0x02\n\n#define HCI_EV_SYNC_CONN_CHANGE                      0x2D\n struct hci_ev_sync_conn_change {\n    uint8     status;\n    uint16   handle;\n    uint8 tx_interval;\n    uint8 retx_window;\n    uint16 rx_pkt_length;\n    uint16 tx_pkt_length;\n}__attribute__ ((packed));\n\n#define HCI_EV_SNIFF_SUBRATING          0x2E\n struct hci_ev_sniff_subrating {\n    uint8 status;\n    uint16 handle;\n    uint16 maximum_transmit_lantency;\n    uint16 maximum_receive_lantency;\n    uint16 minimum_remote_timeout;\n    uint16 minimum_local_timeout;\n}__attribute__ ((packed));\n\n#define HCI_EV_DEBUG                                 0xFF\n struct hci_ev_debug {\n    uint16   debug_evt_code;\n    uint8 param[1];\n}__attribute__ ((packed));\n\nstruct get_buffer\n{\n    /// length of buffer\n    uint8_t length;\n    /// data of 128 bytes length\n    uint8_t data[128];\n};\n\nstruct hci_ev_rd_mem_cmp_evt\n{\n    ///Status\n    uint8_t status;\n    ///buffer structure to return\n    struct get_buffer buf;\n};\n\n/* vendor event */\n#define HCI_EV_VENDOR_EVENT                (0xFF)\n\n//sub event code\n#define HCI_DBG_TRACE_WARNING_EVT_CODE      0x01\n#define HCI_SCO_SNIFFER_STATUS_EVT_CODE     0x02\n#define HCI_ACL_SNIFFER_STATUS_EVT_CODE     0x03\n#define HCI_TWS_EXCHANGE_CMP_EVT_CODE       0x04\n#define HCI_NOTIFY_CURRENT_ADDR_EVT_CODE    0x05\n#define HCI_NOTIFY_DATA_XFER_EVT_CODE       0x06\n#define HCI_START_SWITCH_EVT_CODE           0x09\n#define HCI_LL_MONITOR_EVT_CODE             0x0A\n#define HCI_DBG_LMP_MESSAGE_RECORD_EVT_SUBCODE  0x0B\n#define HCI_GET_TWS_SLAVE_MOBILE_RSSI_CODE             0x0C\n\n#endif /* __BTM_HCI_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btm_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __BTM_I_H__\n#define __BTM_I_H__\n\n#include \"btlib_type.h\"\n#include \"co_ppbuff.h\"\n#include \"bt_sys_cfg.h\"\n#include \"hci.h\"\n#include \"btm_hci.h\"\n\n#define SUPPORT_AV 1\n#define SUPPORT_AV_C 1\n#define SUPPORT_OPP 0\n#define SUPPORT_FTP 0\n#define SUPPORT_SPP 1\n#define SUPPORT_AG 0\n#define SUPPORT_DUN\t0\n#define SUPPORT_HSHF 0  //sdk\n#define SUPPORT_HID  0\n\n#define SUPPORT_OBEX    0\n#define SUPPORT_PBAP    0\n\n#define SUPPORT_L2CAP_ENHANCED_RETRANS\t0\n\n#define PROFILE_NONE    0x00\n#define PROFILE_HSHF    0x01\n#define PROFILE_SPP     0x02\n#define PROFILE_OPP     0x04\n#define PROFILE_FTP     0x08\n#define PROFILE_AG\t    0x10\n#define PROFILE_AV      0x20\n#define PROFILE_DUN\t\t0x40\n#define PROFILE_AV_C    0x80\n\n#define ASCP_CMD_BASE          0x00\n#define HSHF_CMD_BASE          0x10\n#define SPP_CMD_BASE           0x20\n#define OPP_CMD_BASE           0x30\n#define FTP_CMD_BASE           0x40\n#define AV_CMD_BASE           0x50\n#define\tAG_CMD_BASE\t0x60\n#define DUN_CMD_BASE\t0x70\n\n#define ASCP_EVNT_BASE        0x80\n#define HSHF_EVNT_BASE        0x90\n#define SPP_EVNT_BASE         0xA0\n#define OPP_EVNT_BASE         0xB0\n#define FTP_EVNT_BASE         0xC0\n#define MISC_EVNT_BASE        0xC0\t//BUG 15 owen.liu\n#define AV_EVNT_BASE         0xD0\n#define\tAG_EVNT_BASE\t    0xE0\n#define\tDUN_EVNT_BASE\t\t0xF0  //share with AV_C (used in AT)\n#define AV_C_EVNT_BASE      0xF0  //share with DUN(used in ascp)\n\n#define BT_ECODE_NO_ERROR                   0x00\n#define BT_ECODE_UNKNOWN_HCI_CMD            0x01\n#define BT_ECODE_NO_CONNECTION              0x02\n#define BT_ECODE_HARDWARE_FAILURE           0x03\n#define BT_ECODE_PAGE_TIMEOUT               0x04\n#define BT_ECODE_AUTHENTICATE_FAILURE       0x05\n#define BT_ECODE_MISSING_KEY                0x06\n#define BT_ECODE_MEMORY_FULL                0x07\n#define BT_ECODE_CONNECTION_TIMEOUT         0x08\n#define BT_ECODE_MAX_CONNECTIONS            0x09\n#define BT_ECODE_MAX_SCO_CONNECTIONS        0x0a\n#define BT_ECODE_ACL_ALREADY_EXISTS         0x0b\n#define BT_ECODE_COMMAND_DISALLOWED         0x0c\n#define BT_ECODE_LIMITED_RESOURCE           0x0d\n#define BT_ECODE_SECURITY_ERROR             0x0e\n#define BT_ECODE_PERSONAL_DEVICE            0x0f\n#define BT_ECODE_CONN_ACCEPT_TIMEOUT        0x10\n#define BT_ECODE_UNSUPPORTED_FEATURE        0x11\n#define BT_ECODE_INVALID_HCI_PARM           0x12\n#define BT_ECODE_REMOTE_USER_TERMINATED     0x13\n#define BT_ECODE_LOW_RESOURCES              0x14\n#define BT_ECODE_POWER_OFF                  0x15\n#define BT_ECODE_LOCAL_TERMINATED           0x16\n#define BT_ECODE_REPEATED_ATTEMPTS          0x17\n#define BT_ECODE_PAIRING_NOT_ALLOWED        0x18\n#define BT_ECODE_UNKNOWN_LMP_PDU            0x19\n#define BT_ECODE_UNSUPPORTED_REMOTE         0x1a\n#define BT_ECODE_SCO_OFFSET_REJECT          0x1b\n#define BT_ECODE_SCO_INTERVAL_REJECT        0x1c\n#define BT_ECODE_SCO_AIR_MODE_REJECT        0x1d\n#define BT_ECODE_INVALID_LMP_PARM           0x1e\n#define BT_ECODE_UNSPECIFIED_ERR            0x1f\n#define BT_ECODE_UNSUPPORTED_LMP_PARM       0x20\n#define BT_ECODE_ROLE_CHG_NOT_ALLOWED       0x21\n#define BT_ECODE_LMP_RESPONSE_TIMEOUT       0x22\n#define BT_ECODE_LMP_TRANS_COLLISION        0x23\n#define BT_ECODE_LMP_PDU_NOT_ALLOWED        0x24\n#define BT_ECODE_ENCRYP_MODE_NOT_ACC        0x25\n#define BT_ECODE_UNIT_KEY_USED              0x26\n#define BT_ECODE_QOS_NOT_SUPPORTED          0x27\n#define BT_ECODE_INSTANT_PASSED             0x28\n#define BT_ECODE_PAIR_UNITKEY_NO_SUPP       0x29\n#define BT_ECODE_NOT_FOUND                  0xf1\n#define BT_ECODE_REQUEST_CANCELLED          0xf2\n\nenum device_mode_dis_enum{\n    DEVICE_MODE_DISCOVERABLE = 0x01,\n    DEVICE_MODE_NON_DISCOVERABLE = 0x0\n};\nenum device_mode_conn_enum{\n    DEVICE_MODE_CONNECTABLE = 0x01,\n    DEVICE_MODE_NON_CONNECTABLE = 0x0,\n    DEVICE_MODE_NO_CHANGE = 0x04\n};\n\nenum acl_pkt_boundary_enum{\n    ACL_START = 0x02,\n    ACL_CONTINUE = 0x01\n};\nenum btm_security_event_enum {\n    BTM_SECURITY_AUTORITY_SUCCESS=1,\n    BTM_SECURITY_AUTORITY_FAILURE\n};\n\nenum btm_l2cap_event_enum {\n    BTM_EV_CONN_ACL_OPENED=1,\n    BTM_EV_CONN_ACL_CLOSED,\n    BTM_EV_SECURITY_AUTORITY_SUCCESS,\n    BTM_EV_SECURITY_AUTORITY_FAILURE\n};\n\nenum conn_sco_stat_enum{\n    BTM_CONN_SCO_OPENED=1,\n    BTM_CONN_SCO_CLOSED,\n    BTM_CONN_SCO_WAIT      /*the sco connection is waiting for the acl connection to be connected first*/\n};\n\nenum btm_pairing_event\n{\n\tPAIRING_OK,\n\tPAIRING_TIMEOUT,\n\tPAIRING_FAILED,\n\tUNPAIR_OK\n};\t// change\n\n/* enum for inquiry events */\nenum btm_inquiry_event {\n\tINQUIRY_DONE,\t\t\t// inquiry is done\n\tNEW_REMOTE_DEV_IND,\t\t// found a new remote device\n\tINQUIRY_CANCEL_OK,      // cancel inquiry\n\tINQUIRY_CANCEL_FAIL\n};\n\nenum btm_name_event\n{\n\tNAME_DONE,\n\tNAME_FAIL,\n\tNAME_CANCEL_OK,\n\tNAME_CANCEL_FAIL\n};\n\ntypedef void (*btm_pairing_callback_t)(enum btm_pairing_event event,void *pdata);\n\ntypedef void (*btm_chip_init_ready_callback_t)(int status);\n\n/*bt event definition to application layer*/\n#define BTEVENT_INQUIRY_RESULT       1\n\n#define BTEVENT_INQUIRY_COMPLETE     2\n\n#define BTEVENT_INQUIRY_CANCELED     3\n\n#define BTEVENT_LINK_CONNECT_IND     4\n\n#define BTEVENT_SCO_CONNECT_IND      5\n\n#define BTEVENT_LINK_DISCONNECT      6\n\n#define BTEVENT_LINK_CONNECT_CNF     7\n\n#define BTEVENT_LINK_CON_RESTRICT    8\n\n#define BTEVENT_MODE_CHANGE          9\n\n#define BTEVENT_ACCESSIBLE_CHANGE   10\n\n#define BTEVENT_AUTHENTICATED       11\n\n#define BTEVENT_ENCRYPTION_CHANGE   12\n\n#define BTEVENT_SECURITY_CHANGE     13\n\n#define BTEVENT_ROLE_CHANGE         14\n\n#define BTEVENT_SCO_DISCONNECT      15\n\n#define BTEVENT_SCO_CONNECT_CNF     16\n\n#define BTEVENT_SIMPLE_PAIRING_COMPLETE       17\n\n#define BTEVENT_REMOTE_FEATURES               18\n\n#define BTEVENT_REM_HOST_FEATURES             19\n\n#define BTEVENT_LINK_SUPERV_TIMEOUT_CHANGED   20\n\n#define BTEVENT_SET_SNIFF_SUBRATING_PARMS_CNF 21\n\n#define BTEVENT_SNIFF_SUBRATE_INFO            22\n\n#define BTEVENT_SET_INQUIRY_MODE_CNF          23\n\n#define BTEVENT_SET_INQ_TX_PWR_LVL_CNF        24\n\n#define BTEVENT_SET_EXT_INQUIRY_RESP_CNF      25\n\n#define BTEVENT_SET_ERR_DATA_REPORTING_CNF    26\n\n#define BTEVENT_KEY_PRESSED                   27\n\n#define BTEVENT_QOS_SETUP_COMPLETE            28\n\n#ifdef __TWS_RECONNECT_USE_BLE__\n#define BTEVENT_TWS_BLE_ADV_REPORT_EVENT      29\n#endif /*  */\n\n/**  an ACL connection has received an internal data transmit\n *  request while it is in hold, park or sniff mode. The data will still be\n *  passed to the radio in park and sniff modes. However, hold mode will\n *  block data transmit. It may be necessary to return the ACL to active\n *  mode to restore normal data transfer.\n */\n#define BTEVENT_ACL_DATA_NOT_ACTIVE 99\n\n/*\nIndicate that an ACL connection is sending or receiving data\nwhile it is in active mode. Then, keep resetting the sniff timer.\n*/\n#define BTEVENT_ACL_DATA_ACTIVE 98\n/** Indicates that the HCI failed to initialize.\n */\n#define BTEVENT_HCI_INIT_ERROR      100\n\n#define BTEVENT_HCI_INITIALIZED     101\n/** Indicates that a fatal error has occurred in the radio or the HCI transport.\n */\n#define BTEVENT_HCI_FATAL_ERROR     102\n\n/** Indicates that the HCI has been deinitialized.\n */\n#define BTEVENT_HCI_DEINITIALIZED   103\n\n/** Indicates that the HCI cannot be initialized.\n */\n#define BTEVENT_HCI_FAILED          104\n\n#define BTEVENT_HCI_COMMAND_SENT    105\n\n/** Indicates the name of a remote device or cancellation of a name request.\n */\n#define BTEVENT_NAME_RESULT         30\n\n#define BTEVENT_SCO_DATA_IND        31\n\n/** Outgoing SCO data has been sent and the packet is free for re-use by\n *  the application.\n */\n#define BTEVENT_SCO_DATA_CNF        32\n\n#define BTEVENT_LINK_CONNECT_REQ    33\n\n/** Incoming link accept complete.  */\n#define BTEVENT_LINK_ACCEPT_RSP     34\n\n/** Incoming link reject complete. . */\n#define BTEVENT_LINK_REJECT_RSP     35\n\n#define BTEVENT_COMMAND_COMPLETE    36\n\n#define BTEVENT_SCO_CONNECT_REQ     37\n\n/** Set Audio/Voice settings complete.  */\n#define BTEVENT_SCO_VSET_COMPLETE   38\n\n/** SCO link connection process started. */\n#define BTEVENT_SCO_STARTED         39\n\n/** Select Device operation complete, \"p.select\" is valid. */\n#define BTEVENT_DEVICE_SELECTED     40\n\n/** The eSCO connection has changed. \"p.scoConnect\" is valid.\n */\n#define BTEVENT_SCO_CONN_CHNG       41\n\n/* Group: Security-related events. */\n\n/** Indicates access request is successful. \"p.secToken\" is valid. */\n#define BTEVENT_ACCESS_APPROVED     50\n\n/** Indicates access request failed. \"p.secToken\" is valid. */\n#define BTEVENT_ACCESS_DENIED       51\n\n/** Request authorization when \"errCode\" is BEC_NO_ERROR.\n *  \"p.remDev\" is valid.\n */\n#define BTEVENT_AUTHORIZATION_REQ   52\n\n/** Request a Pin for pairing when \"errCode\" is BEC_NO_ERROR.\n *  \"p.pinReq\" is valid. If p.pinReq.pinLen is > 0 then SEC_SetPin()\n *  must be called in response to this event with a pin length >=\n *  p.pinReq.pinLen.\n */\n#define BTEVENT_PIN_REQ             53\n\n/** Pairing operation is complete.\n */\n#define BTEVENT_PAIRING_COMPLETE    54\n\n/** Authentication operation complete. \"p.remDev\" is valid. */\n#define BTEVENT_AUTHENTICATE_CNF    55\n\n/** Encryption operation complete. \"p.remDev\" is valid. */\n#define BTEVENT_ENCRYPT_COMPLETE    56\n\n/** Security mode 3 operation complete. \"p.secMode\" is valid. */\n#define BTEVENT_SECURITY3_COMPLETE  57\n\n/** A link key is returned. \"p.bdLinkKey\" is valid.  */\n#define BTEVENT_RETURN_LINK_KEYS    58\n\n/** Out of Band data has been received from the host controller. */\n#define BTEVENT_LOCAL_OOB_DATA      59\n\n/** Request a Pass Key for simple pairing when \"errCode\" is BEC_NO_ERROR. The\n *  application should call SEC_SetPassKey() to provide the passkey or reject\n *  the request, and optionally save the link key.\n */\n#define BTEVENT_PASS_KEY_REQ        60\n\n/** Request a User Confirmation for simple pairing when \"errCode\" is\n *  BEC_NO_ERROR.\n */\n\n#define BTEVENT_CONFIRM_NUMERIC_REQ 61\n\n#define BTEVENT_DISPLAY_NUMERIC_IND 62\n\n#define BTEVENT_CONN_PACKET_TYPE_CHNG   63\n\n#define SDEVENT_QUERY_RSP           70\n\n#define SDEVENT_QUERY_ERR           71\n\n#define SDEVENT_QUERY_FAILED        72\n\n#define BTEVENT_SELECT_DEVICE_REQ   80\n\n#define BTEVENT_DEVICE_ADDED        81\n\n#define BTEVENT_DEVICE_DELETED      \t82\n\n#define BTEVENT_MAX_SLOT_CHANGED\t\t83\n\n#define BTEVENT_SNIFFER_CONTROL_DONE \t84\n\n#define BTEVENT_LINK_POLICY_CHANGED\t\t85\n\n/* added for pass command status to up level */\n#define BTEVENT_COMMAND_STATUS\t    \t86\n\ntypedef uint32_t event_mask_t;\n\n#define BTM_EVTMASK_NO_EVENTS                    0x00000000\n#define BTM_EVTMASK_INQUIRY_RESULT               0x00000001\n#define BTM_EVTMASK_INQUIRY_COMPLETE             0x00000002\n#define BTM_EVTMASK_INQUIRY_CANCELED             0x00000004\n#define BTM_EVTMASK_LINK_CONNECT_IND             0x00000008\n#define BTM_EVTMASK_SCO_CONNECT_IND              0x00000010\n#define BTM_EVTMASK_LINK_DISCONNECT              0x00000020\n#define BTM_EVTMASK_LINK_CONNECT_CNF             0x00000040\n#define BTM_EVTMASK_LINK_CON_RESTRICT            0x00000080\n#define BTM_EVTMASK_MODE_CHANGE                  0x00000100\n#define BTM_EVTMASK_ACCESSIBLE_CHANGE            0x00000200\n#define BTM_EVTMASK_AUTHENTICATED                0x00000400\n#define BTM_EVTMASK_ENCRYPTION_CHANGE            0x00000800\n#define BTM_EVTMASK_SECURITY_CHANGE              0x00001000\n#define BTM_EVTMASK_ROLE_CHANGE                  0x00002000\n#define BTM_EVTMASK_SCO_DISCONNECT               0x00004000\n#define BTM_EVTMASK_SCO_CONNECT_CNF              0x00008000\n#define BTM_EVTMASK_SIMPLE_PAIRING_COMPLETE      0x00010000\n#define BTM_EVTMASK_REMOTE_FEATURES              0x00020000\n#define BTM_EVTMASK_REM_HOST_FEATURES            0x00040000\n#define BTM_EVTMASK_LINK_SUPERV_TIMEOUT_CHANGED  0x00080000\n#define BTM_EVTMASK_SET_SNIFF_SUBR_PARMS         0x00100000\n#define BTM_EVTMASK_SNIFF_SUBRATE_INFO           0x00200000\n#define BTM_EVTMASK_SET_INQ_MODE                 0x00400000\n#define BTM_EVTMASK_SET_INQ_RSP_TX_PWR           0x00800000\n#define BTM_EVTMASK_SET_EXT_INQ_RESP             0x01000000\n#define BTM_EVTMASK_SET_ERR_DATA_REP             0x02000000\n#define BTM_EVTMASK_KEY_PRESSED                  0x04000000\n#define BTM_EVTMASK_CONN_PACKET_TYPE_CHNG        0x08000000\n#define BTM_EVTMASK_QOS_SETUP_COMPLETE           0x10000000\n#define BTM_EVTMASK_MAX_SLOT_CHANGED             0x20000000\n#define BTM_EVTMASK_SNIFFER_CONTROL_DONE         0x40000000\n#define BTM_EVTMASK_LINK_POLICY_CHANGED\t         0x80000000\n#define BTM_EVTMASK_ALL_EVENTS                   0xffffffff\n\n#define BTM_ACL_ST_DISCONNECTED  0x00\n#define BTM_ACL_ST_OUT_CON       0x01\n#define BTM_ACL_ST_IN_CON        0x02\n#define BTM_ACL_ST_CONNECTED     0x03\n#define BTM_ACL_ST_OUT_DISC      0x04\n#define BTM_ACL_ST_OUT_DISC2     0x05\n#define BTM_ACL_ST_OUT_CON2      0x06\n\n#define BTM_CMGR_INIT_REQ       0x00\n#define BTM_CMGR_DEINIT_REQ     0x01\n\n/*  event param of BTEVENT_LINK_CONNECT_IND*/\nstruct acl_open_data{\n    struct btm_conn_item_t* conn; //acl connection\n    uint8 err_code;\n    uint32 emask;\n};\nstruct conn_req_data{\n    struct btm_conn_item_t *conn;\n    uint32   emask;\n};\nstruct acl_close_data{\n    struct btm_conn_item_t *conn;\n    struct hci_ev_disconn_complete *param;\n    uint8 status;\n    uint8 reason;\n    uint32 emask;\n};\n\nstruct sco_open_data{\n    struct btm_sco_conn_item_t* conn;\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct sco_close_data{\n    struct btm_sco_conn_item_t *conn;\n    struct hci_ev_disconn_complete *param;\n    uint8 status;\n    uint8 reason;\n    uint32 emask;\n};\n\nstruct accessible_change_data{\n    enum device_mode_dis_enum discoverable;\n    enum device_mode_conn_enum connectable;\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct inquiry_cancel_data{\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct command_status_data{\n\tuint8  status;\n\tuint8  num_hci_cmd_packets;\n\tuint16 cmd_opcode;\n    uint32 emask;\n};\n\nstruct role_change_data{\n    struct btm_conn_item_t *rem_dev;\n\tuint8 new_role;\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct mode_change_data{\n    struct btm_conn_item_t *rem_dev;\n\tuint8 cur_mode;\n    uint16 interval;\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct acl_data_active{\n    struct btm_conn_item_t *rem_dev;\n    uint16 data_len;\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct acl_data_not_active{\n    struct btm_conn_item_t *rem_dev;\n    uint16 data_len;\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct authenticaion_complete_data{\n    struct btm_conn_item_t *rem_dev;\n    uint32 emask;\n    uint8 err_code;\n};\n\nstruct simple_pairing_complete_data{\n    struct btm_conn_item_t *rem_dev;\n    uint32 emask;\n    uint8 err_code;\n};\n\nstruct encryption_change_data{\n    struct btm_conn_item_t *rem_dev;\n\tuint8 mode;\n    uint32 emask;\n    uint8 err_code;\n};\n\nstruct inquiry_result_data{\n    uint8 *data;\n    uint8 is_rssi;\n    uint8 is_extinq;\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct name_rsp_data{\n    uint8    status;\n    struct   bdaddr_t bdaddr;\n    uint32   emask;\n};\nstruct inquiry_complete_data{\n    uint8 status;\n    uint8 err_code;\n    uint32 emask;\n};\n\nstruct btm_ctx_input {\n    struct bdaddr_t *remote;\n    struct ctx_content ctx;\n    uint16 conn_handle;\n};\n\nstruct btm_ctx_output {\n    uint16 conn_handle;\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nstruct l2cap_channel;\n\nint8 btm_init(void);\n\nint8 btm_register_chip_init_ready_callback(btm_chip_init_ready_callback_t cb);\n\nint8 btm_device_mode_set(enum device_mode_dis_enum discoverable, enum device_mode_conn_enum connectable);\nint8 btm_device_write_iac(uint8 num);\nint8 btm_device_write_page_scan_activity(uint16 interval, uint16 window);\nint8 btm_device_write_inquiry_scan_activity(uint16 interval, uint16 window);\n\nint8 btm_conn_sco_is_open (struct btm_conn_item_t *conn);\nuint16 btm_conn_acl_get_conn_handle ( struct bdaddr_t *remote_bdaddr);\n\n\nint8 btm_conn_acl_req ( struct bdaddr_t *remote_bdaddr);\nint8 btm_conn_acl_is_open( struct bdaddr_t *remote_bdaddr);\n\nint8 btm_conn_sco_req ( struct bdaddr_t *remote_bdaddr);\n\nint8 btm_conn_sco_disconnect(struct bdaddr_t *remote_bdaddr, uint8 reason);  //added by zmchen on 20070205\nint8 btm_conn_acl_senddata (struct bdaddr_t *remote_bdaddr, uint8 *data_buf_p, uint16 data_buf_len);\n\nint8 btm_conn_acl_send_ppb (uint16 conn_handle, struct pp_buff *ppb);\nint8 btm_conn_acl_send_continue_ppb (uint16 conn_handle, struct pp_buff *ppb);\n\nvoid btm_conn_acl_fake_connection_complete(uint8_t status, struct bdaddr_t *bdAddr);\nint8 btm_conn_acl_close(struct bdaddr_t *bdaddr, uint8 reason);\n\nint8 btm_security_askfor_authority(uint16 conn_handle, uint16 psm, struct l2cap_channel *l2cap_channel);\n\nvoid btm_pairing_enter(uint32 pairing_timeout, btm_pairing_callback_t callback);\n\n/* for pairing that needs remote device address */\nvoid btm_start_pairing(\tstruct bdaddr_t remote_addr, btm_pairing_callback_t callback);\n\nvoid btm_unpair_reomte(struct bdaddr_t remote_addr, btm_pairing_callback_t callback);\n\nvoid btm_pairing_register_callback(btm_pairing_callback_t callback);\n\nvoid btm_pairing_exit(void);\n\nvoid btm_direct_set_audio_param(uint8 param);\nuint8 btm_get_audio_default_param(void);\nvoid btm_set_audio_default_param(uint8 param);\n\n/* inquiry functions */\nvoid btm_start_inquiry(void (*btm_start_inquiry_notify_callback)(enum btm_inquiry_event event, void *pData), uint8 inq_period, uint8 num_rsp);\nvoid btm_cancel_inquiry(void (*btm_start_inquiry_notify_callback)(enum btm_inquiry_event event, void *pData));\nvoid btm_remote_name_request(struct hci_cp_remote_name_request *req, void (*btm_name_notify_callback)(enum btm_name_event event,void *pData));\nvoid btm_remote_name_cancel(struct bdaddr_t *remote, void (*btm_name_notify_callback)(enum btm_name_event event,void *pData));\n\nvoid btm_hcicmd_sniff_mode(struct bdaddr_t *remote_bdaddr, uint16 sniff_max_interval,uint16 sniff_min_interval, uint16 sniff_attempt,uint16 sniff_timeout);\nint8 btm_exit_sniff (struct bdaddr_t *remote_bdaddr);\n\ntypedef void (*bt_hci_vendor_event_handler_func)(uint8_t* pbuf, uint32_t length);\nvoid register_hci_vendor_event_handler_callback(bt_hci_vendor_event_handler_func func);\n\ntypedef bool (*bt_hci_sync_airmode_check_ind_func)(uint8_t status);\nvoid register_hci_sync_airmode_check_ind_callback(bt_hci_sync_airmode_check_ind_func func);\n\nuint32 btm_save_ctx(struct bdaddr_t *remote, uint8_t *buf, uint32_t buf_len);\nuint32 btm_restore_ctx(struct btm_ctx_input *input, struct btm_ctx_output *output);\n\nint8 btm_sync_conn_audio_connected(struct bdaddr_t *bdAddr, uint16_t conhdl);\nint8 btm_sync_conn_audio_disconnected(struct bdaddr_t *bdAddr, uint16_t conhdl);\n\nint8 btm_acl_conn_connected(struct bdaddr_t *bdAddr, uint16 conn_handle);\nint8 btm_acl_conn_disconnected(struct bdaddr_t *bdAddr, uint16 conn_handle, uint8_t status, uint8_t reason);\n\nconst char *btm_state2str(uint8 state);\nconst char *btm_errorcode2str(uint32 errorcode);\nconst char *btm_cmd_opcode2str(uint16 opcode);\n\nstruct btstack_chip_config_t\n{\n    uint16_t hci_dbg_set_sync_config_cmd_opcode;\n    uint16_t hci_dbg_set_sco_switch_cmd_opcode;\n};\n\nstruct btstack_chip_config_t* btm_get_btstack_chip_config(void);\nvoid btm_set_btstack_chip_config(void* config);\nint8 btm_device_set_ecc_ibrt_data_test(uint8  ecc_data_test_en, uint8 ecc_data_len, uint16 ecc_count, uint32 data_pattern);\nint8 btm_device_send_prefer_rate(uint16 connhdl, uint8 rate);\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __BTM_I_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/btm_security.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __BTM_SECURITY_H__\n#define __BTM_SECURITY_H__\n\nstruct btm_security_auth_pending_item_t {\n    struct list_node list;\n};\n\n#define BTM_BONDING_NOT_REQUIRED 0x00\n#define BTM_DEDICATED_BONDING    0x02\n#define BTM_GENERAL_BONDING      0x04\n#define BTM_BONDING_NOT_ALLOWED  0x10\n\n#define BTM_AUTH_MITM_PROTECT_NOT_REQUIRED  0x00\n#define BTM_AUTH_MITM_PROTECT_REQUIRED      0x01\n\n#define BTM_IO_DISPLAY_ONLY   0\n#define BTM_IO_DISPLAY_YESNO  1\n#define BTM_IO_KEYBOARD_ONLY  2\n#define BTM_IO_NO_IO          3\n\n/*api to handle hci event */\nvoid btm_security_link_key_notify(struct bdaddr_t *remote, uint8 *linkkey, uint8 key_type);\nvoid btm_security_pin_code_req(struct bdaddr_t *remote);\nvoid btm_security_link_key_req(struct bdaddr_t *remote);\nvoid btm_security_authen_complete(uint8 status, uint16 conn_handle);\nvoid btm_security_encryption_change(uint8 status, uint16 conn_handle, uint8 encrypt_en);\n\n#endif /* __BTM_SECURITY_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/co_lib.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __CO_LIB_H__\n#define __CO_LIB_H__\n\nchar ascii_char2val(const char c);\nint ascii_str2val( const char str[], char base);\nint ascii_strn2val( const char str[], char base, char n);\n\n#define  __set_mask(var, mask)   {var |= mask;}\n#define  __test_mask(var, mask)   (var & mask)\n//#define  __test_and_clear_mask(var, mask)  ((var & mask)?(var &= ~mask,1):0)\n\n#endif /* __CO_LIB_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/co_ppbuff.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __CO_PPBUFF_H__\n#define __CO_PPBUFF_H__\n\n#include \"btlib_type.h\"\n#include \"btlib_more.h\"\n#include \"bt_co_list.h\"\n\n/* protocol type */\n#define PPB_GET_PROTO_TYPE(ppb) (ppb->flag & 0x0F)\n#define PPB_SET_PROTO_TYPE(ppb,type) ppb->flag |= type\n\n#define PP_BUFF_FLAG_NORMAL\t0x00 /* normal buffer */\n#define PP_BUFF_FLAG_L2CAPE\t0x01 /* l2cap enhanced retrans buffer */\n\n/* alloc type */\n#define PPB_GET_ALLOC_TYPE(ppb) (ppb->flag & 0xF0)\n#define PPB_SET_ALLOC_TYPE(ppb,type) ppb->flag |= type\n\n#define PP_BUFF_FLAG_ALLOC_DYNAMIC 0x10 /* dynamic alloced, free inside */\n#define PP_BUFF_FLAG_ALLOC_INPLACE 0x20 /* inplace alloced, free outside */\n\nstruct pp_buff {\n    struct pp_buff *next;\n    struct pp_buff *prev;\n\n    uint16 len;\n    uint16 flag;\n    uint8 *head;\n    uint8 *data;\n    uint8 *tail;\n    uint8 *end;\n\n    void *context;\n#if DBG_PPBUFF_NEED_STATISTIC==1\n    struct list_node node;\n    uint32 ca;\n#endif\n};\n\nstruct pp_buff_head {\n    struct pp_buff *next;\n    struct pp_buff *prev;\n    uint32 qlen;\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nstruct pp_buff *ppb_alloc(uint32 size);\nstruct pp_buff *ppb_alloc_inplace(uint32 size, uint8 *inplace_buff, uint32 inplace_buff_len);\nvoid ppb_free( struct pp_buff *ppb);\nuint8 *ppb_put(struct pp_buff *ppb, uint32 len);\nvoid ppb_put_data(struct pp_buff *ppb, uint8 *data, uint32 len);\nuint8 *ppb_push(struct pp_buff *ppb, uint32 len);\nuint8 *ppb_pull(struct pp_buff *ppb, uint32 len);\nvoid ppb_reserve(struct pp_buff *ppb, int len);\nvoid ppb_trim(struct pp_buff *ppb, unsigned int len);\nstruct pp_buff *ppb_peek(struct pp_buff_head *list_);\nstruct pp_buff *ppb_peek_tail(struct pp_buff_head *list_);\nvoid ppb_queue_head_init(struct pp_buff_head *list);\nvoid ppb_queue_after(struct pp_buff_head *list, struct pp_buff *prev,struct pp_buff *newpp);\nvoid ppb_queue_head(struct pp_buff_head *list, struct pp_buff *newpp);\nvoid ppb_queue_tail(struct pp_buff_head *list, struct pp_buff *newpp);\nstruct pp_buff *ppb_dequeue(struct pp_buff_head *list);\nvoid ppb_insert(struct pp_buff *newpp, struct pp_buff *prev, struct pp_buff *next, struct pp_buff_head *list);\nvoid ppb_append(struct pp_buff *old, struct pp_buff *newpp, struct pp_buff_head *list);\nvoid ppb_unlink(struct pp_buff *ppb, struct pp_buff_head *list);\nstruct pp_buff *ppb_dequeue_tail(struct pp_buff_head *list);\nstruct pp_buff *ppb_alloc_fixpacket(uint32 size);\nvoid ppb_print_statistic(void);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __CO_PPBUFF_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/co_printf.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __CO_PRINTF_H__\n#define __CO_PRINTF_H__\n\nint co_strlen( const char *s );\nint co_printf(const char *format, ...);\nchar *co_strstr(const char *s1, const char *s2);\nint co_sprintf(char *out, const char *format, ...);\n\n#endif /* __CO_PRINTF_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/co_queue.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __COQUEUE_H__\n#define __COQUEUE_H__\n\n#include \n\ntypedef void (*coqueue_destroy_func_t)(void *data);\n\nstruct coqueue_entry {\n    void *data;\n    struct coqueue_entry *next;\n};\n\nstruct coqueue {\n    int ref_count;\n    struct coqueue_entry *head;\n    struct coqueue_entry *tail;\n    unsigned int entries;\n};\n\nstruct coqueue *coqueue_create(void);\nvoid coqueue_destroy(struct coqueue *coqueue, coqueue_destroy_func_t destroy);\nbool coqueue_push_tail(struct coqueue *coqueue, void *data);\nbool coqueue_push_head(struct coqueue *coqueue, void *data);\nbool coqueue_push_after(struct coqueue *coqueue, const void *entry, void *data);\nvoid *coqueue_pop_head(struct coqueue *coqueue);\nvoid *coqueue_peek_head(struct coqueue *coqueue);\nvoid *coqueue_peek_tail(struct coqueue *coqueue);\ntypedef bool (*coqueue_match_func_t)(const void *data, const void *match_data);\nvoid *coqueue_search(struct coqueue *coqueue, coqueue_match_func_t function,\n                            const void *match_data);\nbool coqueue_delete(struct coqueue *coqueue, const void *data);\nvoid *coqueue_delete_if(struct coqueue *coqueue, coqueue_match_func_t function,\n                            const void *user_data);\nunsigned int coqueue_delete_all(struct coqueue *coqueue, coqueue_match_func_t function,\n                void *user_data, coqueue_destroy_func_t destroy);\n\n#endif /*__COQUEUE_H__*/"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/co_timer.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __CO_TIMER_H__\n#define __CO_TIMER_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint co_timer_is_running (uint8 *timer_id);\nvoid co_timer_init(unsigned char timer_task_prio, unsigned int *ptos );\nvoid co_timer_del(uint8 *timer_handle);\nvoid co_timer_cfg(uint8 *timer_handle, unsigned int millisecond, void (*timer_func)(void *), void *arg, int times);\nvoid co_timer_resume(uint8 *timer_handle );\nvoid co_timer_restart(uint8 *timer_handle );\nvoid co_timer_update_and_restart(uint8 *timer_handle,unsigned int millisecond);;\nvoid co_timer_start(uint8 *timer_handle);\nvoid co_timer_stop(uint8 *timer_handle);\nint co_timer_new(uint8 *timer_handle, unsigned int millisecond, void (*timer_func)(void *), void *arg, int times);\nvoid co_timer_reset(void );\nvoid co_timer_reduce(uint8 *timer_handle, unsigned int reduece_ms);\nvoid co_timer_reduce_all(unsigned int reduece_ms);\nvoid co_timer_check(void);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __CO_TIMER_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/cobt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n #ifndef __CO_BT_H__\n #define __CO_BT_H__\n\n#define BLUETOOTH_20 1\n\n/* Allow Role Switch     HCI:4.6.8                                                      */\n#define MASTER_ROLE             0\n#define SLAVE_ROLE              1\n\n/* Allow Role Switch     HCI:4.5.5                                                      */\n#define ROLE_SWITCH_NOT_ALLOWED 0\n#define ROLE_SWITCH_ALLOWED     1\n\n/* AcceptConnection Role     HCI:4.5.8                                                  */\n#define ACCEPT_SWITCH_TO_MASTER 0\n#define ACCEPT_REMAIN_SLAVE     1\n\n/* Packet Type Flags     HCI:4.5.14                                                     */\n#define PACKET_TYPE_DM1_FLAG    0x0008\n#define PACKET_TYPE_DH1_FLAG    0x0010\n#define PACKET_TYPE_DM3_FLAG    0x0400\n#define PACKET_TYPE_DH3_FLAG    0x0800\n#define PACKET_TYPE_DM5_FLAG    0x4000\n#define PACKET_TYPE_DH5_FLAG    0x8000\n\n#define PACKET_TYPE_EV3_FLAG    0x0001\n#define PACKET_TYPE_EV4_FLAG    0x0002\n#define PACKET_TYPE_EV5_FLAG    0x0004\n\n#define PACKET_TYPE_HV1_FLAG    0x0020\n#define PACKET_TYPE_HV2_FLAG    0x0040\n#define PACKET_TYPE_HV3_FLAG    0x0080\n\n#ifdef BLUETOOTH_20//used in change packet type\n#define PACKET_TYPE_2_DH1_FLAG    0x0002\n#define PACKET_TYPE_3_DH1_FLAG    0x0004\n#define PACKET_TYPE_2_DH3_FLAG    0x0100\n#define PACKET_TYPE_3_DH3_FLAG    0x0200\n#define PACKET_TYPE_2_DH5_FLAG    0x1000\n#define PACKET_TYPE_3_DH5_FLAG    0x2000\n#define EDR_2M_PACKET_TYPE_MASK (PACKET_TYPE_2_DH1_FLAG|\\\n\tPACKET_TYPE_2_DH3_FLAG|\\\n\tPACKET_TYPE_2_DH5_FLAG)\n\n                              \n#define EDR_3M_PACKET_TYPE_MASK (PACKET_TYPE_3_DH1_FLAG|\\\n\tPACKET_TYPE_3_DH3_FLAG|\\\n\tPACKET_TYPE_3_DH5_FLAG)  \n#define ALL_ACL_PACKET_MASK  (PACKET_TYPE_DH5_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DM5_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DH3_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DM3_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DH1_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DM1_FLAG|\\\n\t\t\t\t\t\t\t EDR_2M_PACKET_TYPE_MASK |\\\n\t\t\t\t\t\t\t EDR_3M_PACKET_TYPE_MASK)\n\t\t\t\t\t\t\t\n#define ACL_1M_PACKET_MASK  (PACKET_TYPE_DH5_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DM5_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DH3_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DM3_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DH1_FLAG|\\\n\t\t\t\t\t\t\t PACKET_TYPE_DM1_FLAG)\n                                \n#define ACL_1SLOT_PACKET_MASK  (PACKET_TYPE_DH1_FLAG|\\\n                                PACKET_TYPE_DM1_FLAG|\\\n                                PACKET_TYPE_2_DH1_FLAG|\\\n                                PACKET_TYPE_3_DH1_FLAG)\n\n#define PACKET_TYPE_2_EV3_FLAG    0x0040\n#define PACKET_TYPE_3_EV3_FLAG    0x0080\n#define PACKET_TYPE_2_EV5_FLAG    0x0100\n#define PACKET_TYPE_3_EV5_FLAG    0x0200\n#endif\n/* add for spec 1.2  HCI 7.1.26 */\n#define PACKET_TYPE_HV1\t\t\t0x0001\n#define PACKET_TYPE_HV2\t\t\t0x0002\n#define PACKET_TYPE_HV3\t\t\t0x0004\n#define PACKET_TYPE_EV3\t\t\t0x0008\n#define PACKET_TYPE_EV4\t\t\t0x0010\n#define PACKET_TYPE_EV5\t\t\t0x0020\n#define PACKET_TYPE_NO_2_EV3    0x0040\n#define PACKET_TYPE_NO_3_EV3    0x0080\n#define PACKET_TYPE_NO_2_EV5    0x0100\n#define PACKET_TYPE_NO_3_EV5    0x0200\n\n#ifdef BLUETOOTH_20//used in set up synchronous link\n#define PACKET_TYPE_2_EV3\t\t\t0x0040\n#define PACKET_TYPE_3_EV3\t\t\t0x0080\n#define PACKET_TYPE_2_EV5\t\t\t0x0100\n#define PACKET_TYPE_3_EV5\t\t\t0x0200\n#endif\n\n/* Packet Boundary Flag   HCI:4.4.3                                                     */\n#define CONT_HL_FRAG            0x01\n#define FIRST_HL_FRAG           0x02\n#define LMP_FRAG                0x03\n\n/* Packet Broadcast Flag   HCI:4.4.3                                                    */\n#define POINT_TO_POINT          0x00\n#define ACTIVE_BCST             0x01\n#define PICONET_BCST            0x02\n\n/* Park mode defines LMP:3.17                                                           */\n#define MACCESS_MSK             0x0F\n#define ACCSCHEM_MSK            0xF0\n\n/* Device Supported Features defines LMP:5.1.1                                          */\n#define THREE_SLOT_FEATURE      0x01\n#define FIVE_SLOT_FEATURE       0x02\n#define ENCRYPT_FEATURE         0x04\n#define SLOTOFF_FEATURE         0x08\n#define TIMEACC_FEATURE         0x10\n#define SWITCH_FEATURE          0x20\n#define HOLD_FEATURE            0x40\n#define SNIFF_FEATURE           0x80\n\n#define PARK_FEATURE            0x01\n#define RSSI_FEATURE            0x02\n#define QUALITY_FEATURE         0x04\n#define SCO_FEATURE             0x08\n#define HV2_FEATURE             0x10\n#define HV3_FEATURE             0x20\n#define ULAW_FEATURE            0x40\n#define ALAW_FEATURE            0x80\n\n//#define EV3_FEATURE\t\t\t0x20\n\n\n#define CVSD_FEATURE            0x01\n#define PAGING_FEATURE          0x02\n#define POWER_FEATURE           0x04\n#define TRANSPARENT_FEATURE\t\t0x08\n#define FLOWLEAST_FEATURE\t\t0x10\n#define FLOWMID_FEATURE\t\t\t0x20\n#define FLOWMOST_FEATURE\t\t0x40\n#define BCENCRYPT_FEATURE\t\t0x80\n\n#define ACL_2M_FEATURE           0x02\n#define ACL_3M_FEATURE           0x04\n\n#define ENHANCEINQSCAN_FEATURE\t0x08\n#define INTERINQSCAN_FEATURE\t0x10\n#define INTERPGSCAN_FEATURE  \t0x20\n#define RSSIINQ_FEATURE\t\t \t0x40\n#define EV3_FEATURE\t\t\t    0x80\n\n#define EV4_FEATURE\t\t\t\t0x01\n#define EV5_FEATURE\t\t\t\t0x02\n#define AFHCAPSL_FEATURE\t\t0x08\n#define AFHCLASSSL_FEATURE\t\t0x10\n#define ACL_3SLOTS_FEATURE      0x80\n\n\n#define ACL_5SLOTS_FEATURE      0x01\n#define SNIFF_SUBRATING_FEATURE\t0x02\n#define PAUSE_ENCRYPTION_FEATURE    0x04\n#define AFHCAPMS_FEATURE\t\t0x08\n#define AFHCLASSMS_FEATURE\t\t0x10\n#ifdef BLUETOOTH_20\n#define ESCO_2M_FEATURE         0x20\n#define ESCO_3M_FEATURE         0x40\n#define ESCO_3SLOTS_FEATURE     0x80\n#else\n#define ESCO_2M_FEATURE         0x00\n#define ESCO_3M_FEATURE         0x00\n#define ESCO_3SLOTS_FEATURE     0x00\n#endif\n\n\n/* Packet and buffer sizes. These sizes do not include payload header (except for FHS   */\n/* packet where there is no payload header) since payload header is written or read by  */\n/* the BOOST in a different control structure part (TX/RXPHDR)                          */\n#define FHS_PACKET_SIZE         18\n#define DM1_PACKET_SIZE         17\n#define DH1_PACKET_SIZE         27\n#define DV_ACL_PACKET_SIZE      9\n#define DM3_PACKET_SIZE         121\n#define DH3_PACKET_SIZE         183\n#define DM5_PACKET_SIZE         224\n#define DH5_PACKET_SIZE         339\n#define AUX1_PACKET_SIZE        29\n\n#define HV1_PACKET_SIZE         10\n#define HV2_PACKET_SIZE         20\n#define HV3_PACKET_SIZE         30\n\n//add by yfwen for BT1.2 eSco packet\n#define EV3_PACKET_SIZE         30\n#define EV4_PACKET_SIZE         120\n#define EV5_PACKET_SIZE         180\n\n#ifdef BLUETOOTH_20\n#define DH1_2_PACKET_SIZE\t  54\n#define DH1_3_PACKET_SIZE\t  83\n#define DH3_2_PACKET_SIZE\t  367\n#define DH3_3_PACKET_SIZE\t  552\n#define DH5_2_PACKET_SIZE\t  679\n#define DH5_3_PACKET_SIZE\t  1021\n\n#define EV3_2_PACKET_SIZE         60\n#define EV3_3_PACKET_SIZE         90\n#define EV5_2_PACKET_SIZE         360\n#define EV5_3_PACKET_SIZE         540\n#endif\n\n\n/* SCO Packet coding LMP:5.1                                                            */\n#define SCO_PACKET_HV1          0x00\n#define SCO_PACKET_HV2          0x01\n#define SCO_PACKET_HV3          0x02\n/* ESCO Packet type coding LMP 5 in spec 1.2 page 437 */\n#define ESCO_PACKET_EV3          0x07\n#define ESCO_PACKET_EV4          0x0C\n#define ESCO_PACKET_EV5          0x0D\n#define ESCO_PACKET_2EV3\t\t\t0x26\n#define ESCO_PACKET_3EV3          0x37\n#define ESCO_PACKET_2EV5          0x2C\n#define ESCO_PACKET_3EV5          0x3D\n\n#ifdef BLUETOOTH_20\n#define ESCO_PACKET_2_EV3          0x26\n#define ESCO_PACKET_3_EV3          0x37\n#define ESCO_PACKET_2_EV5          0x2C\n#define ESCO_PACKET_3_EV5          0x3D\n#endif\n\n#define MAX_EV3_LENGTH    0x001E\n#define MAX_EV4_LENGTH    0x0078\n#define MAX_EV5_LENGTH    0x00B4\n#ifdef BLUETOOTH_20\n#define MAX_2_EV3_LENGTH    0x003C\n#define MAX_2_EV5_LENGTH    0x0168\n#define MAX_3_EV3_LENGTH    0x005A\n#define MAX_3_EV5_LENGTH    0x021C\n#endif\n\n/* Tsco (ScoInterval) BaseBand:4.4.2.1                                                 */\n#define TSCO_HV1                2\n#define TSCO_HV2                4\n#define TSCO_HV3                6\n\n//add by yfwen for BT1.2 eSco packet\n#define TESCO_EV3                6 // \n#define TESCO_EV4                16\n#define TESCO_EV5                16\n\n/* Inquiry train repetition length , Baseband :Table 10.4                               */\n/*      - 256 repetitions if no SCO                                                     */\n/*      - 512 repetitions if 1 SCO                                                      */\n/*      - 768 repetitions if 2 SCO                                                      */\n#define INQ_TRAIN_LENGTH_NO_SCO 256\n#define INQ_TRAIN_LENGTH_1_SCO  512\n#define INQ_TRAIN_LENGTH_2_SCO  768\n\n/* Counter for train length, Npage (N*16 slots) depends on the slave page scan mode and */\n/* the number of active SCO:                                                            */\n/*    | SR mode |  no SCO  |  one SCO  |  two SCO |                                     */\n/*    |   R0    |   >=1    |    >=2    |    >=3   |                                     */\n/*    |   R1    |   >=128  |    >=256  |    >=384 |                                     */\n/*    |   R2    |   >=256  |    >=512  |    >=768 |                                     */\n#define PAGE_TRAIN_LENGTH_R0    1\n#define PAGE_TRAIN_LENGTH_R1    128\n#define PAGE_TRAIN_LENGTH_R2    256\n\n/* Baseband timeout default value, Baseband timers: 1.1                                 */\n#define PAGE_RESP_TO_DEF        8\n#define INQ_RESP_TO_DEF         128\n#define NEW_CONNECTION_TO_DEF   32\n\n/* Voice mute pattern defines                                                           */\n#define MU_LAW_MUTE             0xFF\n#define ALAW_CVSD_MUTE          0x55\n\n/* Air Mode  LMP:5.1                                                                    */\n#define MU_LAW_MODE             0\n#define A_LAW_MODE              1\n#define CVSD_MODE               2\n#define TRANSPARENT_MODE\t\t3\n\n/* Timing Control Flags  LMP:5.1                                                        */\n#define TIM_CHANGE_FLAG         0x01\n#define INIT2_FLAG              0x02\n#define ACCESS_WIN_FLAG         0x04\n\n/* Data Rate defines    LMP:5.1                                                         */\n#define FEC_RATE_MSK            0x01\n#define USE_FEC_RATE            0x00\n#define NO_FEC_RATE             0x01\n#define PREF_PACK_MSK           0x06\n#define NO_PREF_PACK_SIZE       0x00\n#define USE_1_SLOT_PACKET       0x02\n#define USE_3_SLOT_PACKET       0x04\n#define USE_5_SLOT_PACKET       0x06\n#define USE_SLOT_MASK           0x06\n\n#define USE_DM1_PACKET          0x00\n#define USE_2M_PACKET           0x08\n#define USE_3M_PACKET           0x10\n#define EDR_NO_PREF_PACK_SIZE   0x00\n#define EDR_USE_1_SLOT_PACKET   0x20\n#define EDR_USE_3_SLOT_PACKET   0x40\n#define EDR_USE_5_SLOT_PACKET   0x60\n#define EDR_USE_SLOT_MASK       0x60\n\n/* Bluetooth bandwidth               */\n\n#define BT_8000_BANDWIDTH      0x00001F40\n#define NOT_CARE_WIDTH         0xFFFFFFFF\n\n/* Voice setting HCI:4.7.29 & 4.7.30                                                    */\n#define INPUT_COD_LIN           0x0000\n#define INPUT_COD_MULAW         0x0100\n#define INPUT_COD_ALAW          0x0200\n#define INPUT_COD_MSK           0x0300\n#define INPUT_DATA_1COMP        0x0000\n#define INPUT_DATA_2COMP        0x0040\n#define INPUT_DATA_SMAG         0x0080\n#define INPUT_DATAFORM_MSK      0x00C0\n#define INPUT_SAMP_8BIT         0x0000\n#define INPUT_SAMP_16BIT        0x0020\n#define INPUT_SAMPSIZE_MSK      0x0020\n#define LIN_PCM_BIT_POS_MSK     0x001C\n#define AIR_COD_CVSD            0x0000\n#define AIR_COD_MULAW           0x0001\n#define AIR_COD_ALAW            0x0002\n#define AIR_TRANSPARENT_DATA    0x0003\n#define AIR_COD_MSK             0x0003\n\n\n\n#endif /* __CO_BT_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/cobuf.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef _COBUF_H\n#define _COBUF_H\n#include \"bt_sys_cfg.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n/*must be 4 align*/\nstruct cobuf_statistic_packet \n{\n    unsigned short stat_flag; /*must be 0x5a5a if used, or 0xa5a5 if released*/\n    unsigned short alloc_place_id;\n    unsigned short block_index;\n    unsigned short realsize;\n};\n\nstruct cobuf_base\n{\n    struct cobuf_base *link;\n#if DBG_COBUF_NEED_STATISTIC == 1\n    struct cobuf_statistic_packet statistic;\n#endif\n    unsigned char buf[2];\n};\n\nvoid init_buf( struct cobuf_base **head,\n                 struct cobuf_base *first,\n                 int elm_size,\n                 int buf_num);\nunsigned char*  alloc_buf(struct cobuf_base **head_ptr);\nunsigned char*  alloc_buf_infiq(struct cobuf_base **head_ptr);\nvoid  free_buf(unsigned char *buf);\n\nvoid cobuf_init(void);\n\n#if DBG_COBUF_NEED_STATISTIC == 1\n#define DBG_COBUF_STATISTIC_PLACE_RECORD_ENABLE  1\n#define DBG_COBUF_STATISTIC_PLACE_RECORD_OPTIMIZE_ENABLE  1\n\nunsigned char *_cobuf_malloc_with_statistic(int size, char *module_str, int line);\nunsigned char *_cobuf_malloc_with_statistic_infiq(int size, char *module_str, int line);\nvoid  _cobuf_free_with_statistic(unsigned char *buf);\n\n#if BA_GCC==1\n#define __CO_MODULE  __func__\n#endif\n\n#define cobuf_malloc(size)  _cobuf_malloc_with_statistic(size,(char *)__CO_MODULE,__LINE__)\n#define cobuf_malloc_infiq(size)  _cobuf_malloc_with_statistic_infiq(size,(char *)__CO_MODULE,__LINE__)\n#define cobuf_free(buf) _cobuf_free_with_statistic(buf);\n\n#else\n\nunsigned char *_cobuf_malloc(int size);\nunsigned char *_cobuf_malloc_infiq(int size);\nvoid  _cobuf_free(unsigned char *buf);\n#define cobuf_malloc(size) _cobuf_malloc(size)\n#define cobuf_malloc_infiq(size) _cobuf_malloc_infiq(size)\n#define cobuf_free(buf) _cobuf_free(buf)\n\n#endif\n\nunsigned char *cobuf_zmalloc(int size);\nvoid cobuf_print_statistic(void);\nvoid cobuf_print_block_statistic(void);\nvoid cobuf_print_place_statistic(void);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/data_link.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __DATA_LINK_H__\n#define __DATA_LINK_H__\n\n#include \"bt_co_list.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum data_link_type {\n    DL_TYPE_VALUE_U8 = 0,\n    DL_TYPE_VALUE_U16,\n    DL_TYPE_VALUE_U32,\n    DL_TYPE_VALUE_S8,\n    DL_TYPE_VALUE_S16,\n    DL_TYPE_VALUE_S32,\n    DL_TYPE_VALUE_FLOAT,\n    DL_TYPE_VALUE_DOUBLE,\n    DL_TYPE_BUFFER,\n};\n\nstruct data_link {\n    struct list_node node;\n    enum data_link_type type;\n    uint32 len;\n    union {\n        unsigned char _u8;\n        unsigned short _u16;\n        unsigned int _u32;\n        unsigned char _s8;\n        unsigned short _s16;\n        unsigned int _s32;\n        //float _float;\n        //double _double;\n        uint8 *_ptr;\n    } data;\n};\n\n#define link_to_tail(data,head) \\\n    colist_addto_tail(data,head)\n\n#define iter_data_link(head,node) \\\n    colist_iterate_entry(node,struct data_link,&head->node,node)\n\n#define data_link_total_len(head,p) \\\n    { \\\n        uint32 _total_len = 0; \\\n        struct data_link *node = NULL; \\\n        iter_data_link(head, node) { \\\n            _total_len += node->len; \\\n        }  \\\n        *p = _total_len; \\\n    }\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __DATA_LINK_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/debug_cfg.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n///////////////////////////////////////\n/*      For Debug Print Module       */\n/*                                   */\n///////////////////////////////////////\n\n#define DBG_ERROR_LEVEL             1\n#define DBG_WARNING_LEVEL           2\n#define DBG_INFO_LEVEL              3\n\n\n/*NEED TO DEFINE OUTPUT METHOD*/\n#define DEBUG_PRINT TRACE\n\n\n/*Moudle list need to set*/\n/*set debug level for each file*/\n\n#define a2dp_LEVEL          DBG_ERROR_LEVEL\n#define avctp_LEVEL         DBG_ERROR_LEVEL\n#define avdtp_LEVEL         DBG_INFO_LEVEL\n#define avrcp_LEVEL         DBG_ERROR_LEVEL\n#define AUDIO_CODEC_LEVEL   DBG_ERROR_LEVEL\n#define btm_handle_hcievent_LEVEL   DBG_ERROR_LEVEL\n#define btm_LEVEL           DBG_ERROR_LEVEL\n#define HCI_LEVEL           DBG_INFO_LEVEL\n#define hshf_app_LEVEL      DBG_ERROR_LEVEL\n#define i2s_LEVEL           DBG_ERROR_LEVEL\n#define l2cap_LEVEL         DBG_INFO_LEVEL\n#define LC_LEVEL            DBG_ERROR_LEVEL\n#define LMP_LEVEL           DBG_ERROR_LEVEL\n#define LMP_UI_LEVEL        DBG_ERROR_LEVEL\n#define rfcomm_LEVEL        DBG_INFO_LEVEL\n#define SBC_LEVEL           DBG_ERROR_LEVEL\n#define sco_LEVEL           DBG_ERROR_LEVEL\n#define sdp_LEVEL           DBG_INFO_LEVEL\n#define sdp_client_LEVEL    DBG_ERROR_LEVEL\n#define sdp_server_LEVEL    DBG_INFO_LEVEL\n#define spp_app_LEVEL       DBG_WARNING_LEVEL\n#define sppnew_LEVEL        DBG_WARNING_LEVEL\n\n\n///////////////////////////////////////\n/*      For Debug cpu use Module     */\n/*                                   */\n///////////////////////////////////////\n\n#define EXT_LINE_SET_HIGH\n#define EXT_LINE_SET_LOW\n\n\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/debug_print.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*\nusage:\n\n0.make sure globle cfg control DBG_DEBUG_PRINT_ENABLE is 1\n\n1.set your  module in your source code file at the top(MUST).\n   #undef MOUDLE\n   #define MOUDLE BB\n   #include \"debug_print.h\"\n   \n2.define the module debug level in debug_cfg.h, \n  NOTICE,if no define, then no print\n  \n   #define BB_LEVEL INFO_LEVEL\n   \n3.use DEBUG_INFO,DEBUG_WARNING,and DEBUG_ERROR in your module's codes\n\n4.DEBUG_ASSERT always work.\n\n*/\n#ifndef __DEBUG_PRINT_H__\n#define __DEBUG_PRINT_H__\n\n#include \"bt_common.h\"\n#include \"debug_cfg.h\"\n\n#ifdef ENABLE_COMPRESS_LOG\n#define TRACE_BTPRF_V(num,str, ...) LOG_VERBOSE(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), str, ##__VA_ARGS_\n#define TRACE_BTPRF_I(num,str, ...) LOG_INFO(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), str, ##__VA_ARGS__)\n#define TRACE_BTPRF_W(num,str, ...) LOG_WARN(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), str, ##__VA_ARGS__)\n#define TRACE_BTPRF_E(num,str, ...) LOG_ERROR(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)), str, ##__VA_ARGS__)__)\n#else\n#define TRACE_BTPRF_D(num,str, ...) LOG_DEBUG(LOG_MOD(BTPRF), str, ##__VA_ARGS__)\n#define TRACE_BTPRF_I(num,str, ...) LOG_INFO(LOG_MOD(BTPRF), str, ##__VA_ARGS__)\n#define TRACE_BTPRF_W(num,str, ...) LOG_WARN(LOG_MOD(BTPRF), str, ##__VA_ARGS__)\n#define TRACE_BTPRF_E(num,str, ...) LOG_ERROR(LOG_MOD(BTPRF), str, ##__VA_ARGS__)\n#endif\n\n// used for global cfg control, to set if debug_print feature enable\n#if DBG_DEBUG_PRINT_ENABLE == 1\n\n#define _CONCAT(a, b) a##b\n#define CONCAT(a, b) _CONCAT(a, b)\n#define _NAME(a) #a\n#define NAME(a) _NAME(a)\n\n#define WHERESTR  \"[module %s, line %d]: \"\n#define WHEREARG  NAME(MOUDLE), __LINE__\n#define DEBUGPRINT2(num,...)       TRACE(num,__VA_ARGS__)\n\n#define CO_DEBUG_PRINTF(num,level,...)  do{ \\\n\t\t\t\t\t\t\t\t\t\tDEBUGPRINT2(num,__VA_ARGS__);\\\n\t\t\t\t\t\t\t\t\t}while(0);\n\n\n\n#if ( CONCAT(MOUDLE, _LEVEL) >= DBG_INFO_LEVEL )\n#define DEBUG_INFO(num,...) CO_DEBUG_PRINTF(num,\"INF\", __VA_ARGS__)\n#else\n#define DEBUG_INFO(...)\n#endif\n\n\n#if ( CONCAT(MOUDLE, _LEVEL) >= DBG_WARNING_LEVEL )\n#define DEBUG_WARNING(num,...)  CO_DEBUG_PRINTF(num,\"WAR\", __VA_ARGS__)\n#else\n#define DEBUG_WARNING(...)\n#endif\n\n\n#if ( CONCAT(MOUDLE, _LEVEL) >= DBG_ERROR_LEVEL )\n#define DEBUG_ERROR(num,...) CO_DEBUG_PRINTF(num,\"ERR\", __VA_ARGS__)\n#else\n#define DEBUG_ERROR(...)\n#endif\n\n#if 0\n#define DEBUG_ASSERT(expr)  do{\\\n\t\t\t\t\t\t\t if (expr)\\\n\t\t\t\t\t\t\t \t{ ; }\\\n\t\t\t\t\t\t\t else \\\n\t\t\t\t\t\t\t \t{CO_DEBUG_PRINTF(\"ASSERT\",\"%s\",#expr)}\\\n\t\t\t\t\t\t\t }while(0);\n#endif\n\n/*only dump at info level*/\n#if ( CONCAT(MOUDLE, _LEVEL) >= INFO_LEVEL )\nvoid _debug_print_dump_data(char *mem, int mem_size);\n#define DEBUG_DUMP_DATA(memaddr, memlen) do{ \\\n\t\t\t\t\t\t\t\t\t\t\tDEBUGPRINT2(2,\"\\r\\n\"  WHERESTR , WHEREARG);\\\n\t\t\t\t\t\t\t\t\t\t\tDEBUGPRINT2(0,\"\\r\\n\");\\\n\t\t\t\t\t\t\t\t\t\t\tPlt_DUMP8(\"%02x \", (char *)memaddr,memlen);\\\n\t\t\t\t\t\t\t\t\t\t   }while(0);\n\n#else\n#define DEBUG_DUMP_DATA(...) \n#endif\n\n\n#define DEBUG_RAW(...) DEBUG_PRINT(__VA_ARGS__)\n\n#define DEBUG_IMM(...) TRACE_IMM(__VA_ARGS__)\n\n#else\n\n#define DEBUG_IMM(...)\n#define DEBUG_INFO(...)\n#define DEBUG_WARNING(...)\n#define DEBUG_ERROR(...)\n#define DEBUG_ASSERT(expr)\n#define DEBUG_DUMP_DATA(...)  \n#define DEBUG_RAW(...) \n#endif\n\n#endif /* __DEBUG_PRINT_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/dip.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __DIP_H__\n#define __DIP_H__\n\n#include \"sdp.h\"\n#include \"btlib_type.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// customize\n#if !defined(DIP_VENDOR_ID)\n#define DIP_VENDOR_ID  0x02B0 //BesTechnic(Shanghai),Ltd\n#endif\n#if !defined(DIP_PRODUCT_ID)\n#define DIP_PRODUCT_ID 0x0000\n#endif\n#if !defined(DIP_PRODUCT_VERSION)\n#define DIP_PRODUCT_VERSION 0x001F  //0.1.F\n#endif\n\n#define DIP_SPECIFICATION              0x0103\n\n// values should keep untouched\n#define DIP_VENDID_SOURCE_BTSIG        0x0001\n#define DIP_VENDID_SOURCE_USBIF        0x0002\n\n#define ATTRID_SPECIFICATION_ID        0x0200\n#define ATTRID_VENDOR_ID               0x0201\n#define ATTRID_PRODUCT_ID              0x0202\n#define ATTRID_PRODUCT_VERSION         0x0203\n#define ATTRID_PRIMARY_RECORD          0x0204\n#define ATTRID_VENDOR_ID_SOURCE        0x0205\n\nenum dip_event {\n    DIP_EVENT_SDP_REQ_FAIL,\n    DIP_EVENT_SDP_REQ_SUCCESS,\n};\n\nenum dip_ctrl_state {\n    DIP_CTRL_ST_IDLE = 0,\n    DIP_CTRL_ST_SDP_REQUESTING,\n};\n\nstruct dip_device_info\n{\n    uint16 spec_id;\n    uint16 vend_id;\n    uint16 prod_id;\n    uint16 prod_ver;\n    uint8  prim_rec;\n    uint16 vend_id_source;\n};\n\nenum dip_sdp_req_fail_reason {\n    DIP_FAIL_REASON_NO_ERROR = 0,\n    DIP_FAIL_REASON_SDP_ERROR,\n    DIP_FAIL_REASON_SDP_CHANNEL_CLOSE,\n};\n\nstruct dip_sdp_req_fail {\n    enum dip_sdp_req_fail_reason reason;\n};\n\nstruct dip_callback_param {\n    enum dip_event event;\n    union {\n        struct dip_sdp_req_fail fail;\n    }p;\n};\n\nstruct dip_control_t;\ntypedef void (*dip_callback_t)(struct dip_control_t *ctrl, struct dip_callback_param *param);\n\nstruct dip_control_t {\n    struct bdaddr_t remote;\n    enum dip_ctrl_state state;\n    struct dip_device_info device_info;\n    uint8 device_info_valid;\n    dip_callback_t callback;\n    struct sdp_request sdp_request;\n};\n\nint8 dip_register_sdp(void);\nint8 dip_deregister_sdp(void);\nint8 dip_init(struct dip_control_t *ctrl, dip_callback_t callback);\nint8 dip_send_sdp_request(struct dip_control_t *ctrl, struct bdaddr_t *remote);\nint8 dip_is_idle(struct dip_control_t *ctrl);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __DIP_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/hci.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __HCI_H__\n#define __HCI_H__\n\n#include \"string.h\"\n#include \"btlib_type.h\"\n#include \"stdint.h\"\n#include \"bt_sys_cfg.h\"\n#include \"hci_buff.h\"\n\n#ifdef IBRT\ntypedef void (*hci_tx_buf_tss_process_cb_type)(void);\ntypedef void (*bt_hci_acl_ecc_softbit_handler_func)(uint16_t*,uint16_t*, uint16_t, uint8_t*);\n#endif\n\ntypedef enum hci_command_type {\n    CMD_TYPE_SYNC_GLOBAL_ONLY = 0,\n    CMD_TYPE_SYNC_CONN_ONLY,\n    CMD_TYPE_SYNC_MULTI,\n    CMD_TYPE_FREE,\n} hci_command_type_t;\n\n#define HCI_MAX_PARAM_SIZE      255\n#define HCI_COMMAND_FIFO_SIZE   258                     /* size of the transmit fifo    */\n/* Packet types :                                                                       */\n#define HCI_CMD_PACKET          0x01\n#define HCI_ACL_PACKET          0x02\n#define HCI_SCO_PACKET          0x03\n#define HCI_EVT_PACKET          0x04\n#define HCI_BLE_PACKET          0x05//to distinush from acl to ble data\n#define HCI_ACL_PACKET_TX       0x12                    /* internal: used for trace only */\n\n/* HCI_COMMAND_STATUS_EVT_FIXED_SIZE = evtcode (1) + len (1) + status (1) + num packet (1) + opcode (2) */\n#define HCI_COMMAND_STATUS_EVT_FIXED_SIZE   6\n\n/* HCI_COMMAND_COMP_EVT_FIXED_SIZE = evtcode (1) + len (1) + num packet (1) + opcode (2) + ... */\n#define HCI_COMMAND_COMP_EVT_FIXED_SIZE   5\n\n/* HCI_COMMAND_EVT_FIXED_SIZE = evtcode (1) + len (1) + ... */\n#define HCI_COMMAND_EVT_FIXED_SIZE   2\n\n/* HCI_COMMAND_EVT_FIXED_SIZE = evtcode (1) + len (1) + msgclass(1) + msgtag(1) + ... */\n#define HCI_DEBUG_EVT_FIXED_SIZE     4\n\n#define HCI_DEBUG_GROUP_CODE         0x3F\n#define HCI_DEBUG_PRINT_EVENT_CLASS  0x00\n\n/* this variable should be use to perform a control flow for HCI commands               */\n#define HCI_NUM_COMMAND_PACKETS      1\n\n#define BLE_ACL_DATA_HDR_LEN 5//HCI_ACL_HDR_LEN + HCI_TRANSPORT_HDR_LEN\n\n#define BLE_ADV_DATA_LENGTH 31\n#define BLE_SCAN_RSP_DATA_LENGTH 31\n\n\n/******************************************************************************************\n   OGF opcodes group define\n   hence the values\n******************************************************************************************/\n#define HCI_OGF_BIT_OFFSET                ((INT8U) 10) /* Number of bit shifts */\n\n\n#define HCI_OPCODE_MASK                       0x03FF\n\n\n/******************************************************************************************\n   OCF opcode defines\n******************************************************************************************/\n\n/******************************************************************************************\n   OCF opcode defines - Link Control Commands  (OGF: 0x01)\n******************************************************************************************/\n//#define HCI_INQUIRY                         0x0401\n#define HCI_INQUIRY_CANCEL                    0x0402\n#define HCI_PERIODIC_INQUIRY_MODE             0x0403\n#define HCI_EXIT_PERIODIC_INQUIRY_MODE        0x0404\n//#define HCI_CREATE_CONNECTION                   0x0405\n//#define HCI_DISCONNECT                      0x0406\n#define HCI_ADDSCO_CONN                       0x0407\n//#define HCI_CREATE_CONNECTION_CANCEL          0x0408\n//#define HCI_ACCEPT_CONNECTION_REQ           0x0409\n//#define HCI_REJECT_CONNECTION_REQ               0x040A\n//#define HCI_LINK_KEY_REQ_REPLY                  0x040B\n//#define HCI_LINK_KEY_REQ_NEG_REPLY          0x040C\n//#define HCI_PIN_CODE_REQ_REPLY                  0x040D\n//#define HCI_PIN_CODE_REQ_NEG_REPLY          0x040E\n#define HCI_CHANGE_CONN_PKT_TYPE              0x040F\n//#define HCI_AUTH_REQ                        0x0411\n//#define HCI_SET_CONN_ENCRYPTION                 0x0413\n#define HCI_CHANGE_CONN_LINK_KEY              0x0415\n#define HCI_MASTER_LINK_KEY                   0x0417\n//#define HCI_REMOTE_NAME_REQ                 0x0419\n//#define HCI_REMOTE_NAME_CANCEL              0x041A\n#define HCI_READ_REMOTE_SUP_FEATURES          0x041B\n#define HCI_READ_REMOTE_VER_INFO              0x041D\n#define HCI_READ_CLOCK_OFFSET                 0x041F\n#define HCI_READREMOTE_EXT_FEATURES           0x041C\n#define HCI_READ_LMP_HANDLE                   0x0420\n//#define HCI_SETUP_SYNC_CONN                     0x0428\n//#define HCI_ACCEPT_SYNC_CONN                0x0429\n//#define HCI_REJECT_SYNC_CONN                0x042A\n\n/******************************************************************************************\n   OCF opcode defines - Link Policy Commands  (OGF 0x02)\n ******************************************************************************************/\n#define HCI_HOLD_MODE                             0x0801\n#define HCI_PARK_MODE                             0x0805\n#define HCI_EXIT_PARK_MODE                        0x0806\n//#define HCI_QOS_SETUP                             0x0807\n#define HCI_ROLE_DISCOVERY                        0x0809\n//#define HCI_SWITCH_ROLE                           0x080B\n#define HCI_READ_LP_SETTINGS                      0x080C           //LP:LINK POLICY\n#define HCI_READ_DEFAULT_LP_SETTINGS              0x080E\n#define HCI_WRITE_DEFAULT_LP_SETTINGS             0x080F\n#define HCI_FLOW_SPECIFICATION                    0x0810\n\n/******************************************************************************************\n OCF opcode defines -Host Controller and Baseband Commands (OGF 0x03)\n******************************************************************************************/\n#define HCI_SET_EVENT_MASK                    0x0C01\n#define HCI_RESET                             0x0C03\n#define HCI_SET_EVENT_FILTER                  0x0C05\n#define HCI_FLUSH                             0x0C08\n#define HCI_READ_PIN_TYPE                     0x0C09\n#define HCI_WRITE_PIN_TYPE                    0x0C0A\n#define HCI_CREATE_NEW_UNIT_KEY               0x0C0B\n//#define HCI_DELETE_STORED_LINK_KEY          0x0C12\n//#define HCI_WRITE_LOCAL_NAME                  0x0C13\n#define HCI_READ_LOCAL_NAME                   0x0C14\n#define HCI_READ_CONN_ACCEPT_TIMEOUT          0x0C15\n#define HCI_WRITE_CONN_ACCEPT_TIMEOUT         0x0C16\n#define HCI_READ_PAGE_TIMEOUT                 0x0C17\n#define HCI_WRITE_PAGE_TIMEOUT                0x0C18\n#define HCI_READ_SCAN_ENABLE                  0x0C19\n//#define HCI_WRITE_SCAN_ENABLE                   0x0C1A\n#define HCI_READ_PAGESCAN_ACTIVITY            0x0C1B\n#define HCI_WRITE_PAGESCAN_ACTIVITY           0x0C1C\n#define HCI_READ_INQUIRYSCAN_ACTIVITY         0x0C1D\n#define HCI_WRITE_INQUIRYSCAN_ACTIVITY        0x0C1E\n#define HCI_READ_AUTH_ENABLE                  0x0C1F\n//#define HCI_WRITE_AUTH_ENABLE                   0x0C20\n#define HCI_READ_ENCRY_MODE                   0x0C21\n#define HCI_WRITE_ENCRY_MODE                  0x0C22\n#define HCI_READ_CLASS_OF_DEVICE              0x0C23\n//#define HCI_WRITE_CLASS_OF_DEVICE               0x0C24\n#define HCI_READ_VOICE_SETTING                0x0C25\n#define HCI_WRITE_VOICE_SETTING               0x0C26\n#define HCI_READ_AUTO_FLUSH_TIMEOUT           0x0C27\n#define HCI_WRITE_AUTO_FLUSH_TIMEOUT          0x0C28\n#define HCI_READ_NUM_BCAST_RETRANSMIT         0x0C29\n#define HCI_WRITE_NUM_BCAST_RETRANSMIT        0x0C2A\n#define HCI_READ_HOLD_MODE_ACTIVITY           0x0C2B\n#define HCI_WRITE_HOLD_MODE_ACTIVITY          0x0C2C\n#define HCI_READ_TX_POWER_LEVEL               0x0C2D\n#define HCI_READ_SYNC_FLOW_CON_ENABLE         0x0C2E\n#define HCI_WRITE_SYNC_FLOW_CON_ENABLE        0x0C2F\n#define HCI_SET_HCTOHOST_FLOW_CONTROL         0x0C31\n#define HCI_HOST_BUFFER_SIZE                  0x0C33\n#define HCI_HOST_NUM_COMPLETED_PACKETS        0x0C35\n#define HCI_READ_LINK_SUPERV_TIMEOUT          0x0C36\n//#define HCI_WRITE_LINK_SUPERV_TIMEOUT         0x0C37\n#define HCI_READ_NUM_SUPPORTED_IAC            0x0C38\n#define HCI_READ_CURRENT_IAC_LAP              0x0C39\n#define HCI_WRITE_CURRENT_IAC_LAP             0x0C3A\n#define HCI_READ_PAGESCAN_PERIOD_MODE         0x0C3B\n#define HCI_WRITE_PAGESCAN_PERIOD_MODE        0x0C3C\n\n#define HCI_READ_PAGESCAN_MODE                0x0C3D\n#define HCI_WRITE_PAGESCAN_MODE               0x0C3E\n\n#define SET_AFH_HOST_CHL_CLASSFICAT           0x0C3F\n#define HCI_READ_INQUIRYSCAN_TYPE             0x0C42\n#define HCI_WRITE_INQUIRYSCAN_TYPE            0x0C43\n#define HCI_READ_INQUIRY_MODE                 0x0C44\n#define HCI_WRITE_INQUIRY_MODE                0x0C45\n#define HCI_READ_PAGESCAN_TYPE                0x0C46\n//#define HCI_WRITE_PAGESCAN_TYPE               0x0C47\n#define HCI_READ_AFH_CHL_ASSESS_MODE          0x0C48\n#define HCI_WRITE_AFH_CHL_ASSESS_MODE         0x0C49\n#define HCI_WRITE_EXTENDED_INQ_RESP           0x0C52\n#define HCI_WRITE_SIMPLE_PAIRING_MODE         0x0C56\n#define HCI_READ_DEF_ERR_DATA_REPORTING       0x0C5A\n#define HCI_WRITE_DEF_ERR_DATA_REPORTING      0x0C5B\n\n/******************************************************************************************\n OCF opcode defines -Information Parameters (OGF  0x04)\n******************************************************************************************/\n#define HCI_READ_LOCAL_VER_INFO               0x1001\n#define HCI_READ_LOCAL_SUP_COMMANDS           0x1002\n#define HCI_READ_LOCAL_SUP_FEATURES           0x1003\n#define HCI_READ_LOCAL_EXT_FEATURES           0x1004\n#define HCI_READ_BUFFER_SIZE                  0x1005\n#define HCI_READ_BD_ADDR                      0x1009\n\n/******************************************************************************************\n OCF opcode defines -Status Parameters (0GF 0X05)\n******************************************************************************************/\n#define HCI_READ_FAILED_CONTACT_COUNT              0x1401\n#define HCI_RESET_FAILED_CONTACT_COUNT             0x1402\n#define HCI_READ_LINK_QUALITY                      0x1403\n#define HCI_READ_RSSI                              0x1405\n#define HCI_READ_AFH_CHANNEL_MAP                   0x1406\n#define HCI_READ_CLOCK                             0x1407\n\n/******************************************************************************************\n *OCF opcode defines -Testing Commands (OGF 0X06)\n******************************************************************************************/\n#define HCI_READ_LOOPBACK_MODE                0x1801\n#define HCI_WRITE_LOOPBACK_MODE               0x1802\n#define HCI_ENABLE_DUT_MODE                   0x1803\n\n/******************************************************************************************\n *OCF opcode defines -BLE Commands (OGF 0X08)\n******************************************************************************************/\n#define HCI_BLE_SET_EVENT_MASK                0x2001\n#define HCI_LE_READ_BUFFER_SIZE               0x2002\n\n\n/******************************************************************************************\n *OCF opcode defines -Vendor Commands (OGF 0xff)\n******************************************************************************************/\n\n/*\n#define HCI_READ_LMP_PARAM               0x2001\n#define HCI_SET_AFH                      0x2002\n#define HCI_SET_BD_ADDR                  0x2004\n#define HCI_PRJ_VERSION                  0x2005\n#define HCI_GET_PKT_STATICS              0x2006\n#define HCI_READ_MEMORY                  0x2007\n#define HCI_WRITE_MEMORY                 0x2008\n#define HCI_READ_HW_REGISTER             0x2009\n#define HCI_WRITE_HW_REGISTER            0x200A\n#define HCI_TEST_CONTROL                 0x200B\n#define HCI_SEND_PDU                     0x2010\n#define HCI_SET_SCO_CHANNEL              0x2011\n#define HCI_SET_ESCO_CHANNEL             0x2012\n#define HCI_DBG_OPCODE                   0x203f\n#define HCI_SET_UART_BAUD_RATE           0x2013\n#define HCI_SET_UART_PORT                0x2014\n#define HCI_SET_CLOCK                    0x2015\n#define HCI_GET_PKTS_ERR                 0x2016\n#define HCI_DEEP_SLEEP                   0x2019\n#define HCI_SET_SCOOVER_TYPE             0x201A\n#define HCI_GET_SCOOVER_TYPE             0x201B\n*/\n\n#define HCI_READ_LMP_PARAM               0xFC01\n#define HCI_SET_AFH                      0xFC02\n//#define HCI_SET_BD_ADDR                    0xFC04\n#define HCI_PRJ_VERSION                  0xFC05\n#define HCI_GET_PKT_STATICS              0xFC06\n//#define HCI_READ_MEMORY                  0xFC07\n//#define HCI_WRITE_MEMORY                 0xFC08\n#define HCI_READ_HW_REGISTER             0xFC09\n#define HCI_WRITE_HW_REGISTER            0xFC0A\n#define HCI_TEST_CONTROL                 0xFC0B\n#define HCI_SEND_PDU                     0xFC10\n#define HCI_SET_SCO_CHANNEL              0xFC11\n#define HCI_SET_ESCO_CHANNEL             0xFC12\n#define HCI_DBG_OPCODE                   0xFC3f\n#define HCI_SET_UART_BAUD_RATE           0xFC13\n#define HCI_SET_UART_PORT                0xFC14\n#define HCI_SET_CLOCK                    0xFC15\n#define HCI_GET_PKTS_ERR                 0xFC16\n#define HCI_DEEP_SLEEP                   0xFC19\n//#define HCI_SET_SCOOVER_TYPE             0xFC1A\n#define HCI_SET_SCOOVER_TYPE             0xFC04\n//#define HCI_GET_SCOOVER_TYPE             0xFC1B\n#define HCI_GET_SCOOVER_TYPE             0xFC03\n\n#define HCI_CONFIG_WRITE             0xFC1C\n#define HCI_CONFIG_READ             0xFC1D\n#define HCI_CONFIG_FIXED_FREQ             0xFC1E\n#define HCI_CONFIG_HOP_FREQ               0xFC1F\n#define HCI_GET_IVT_SECCODE             0xfc20\n#define HCI_SET_IVT_SECCODE             0xfc21\n#define HCI_SET_CLK_DBGMODE             0xfc22\n#define HCI_SET_SLAVE_TEST_MODE         0xfc23\n\n#define HCI_OGF_VENDOR  0x3f\n#define HCI_OCF_CONFIG_WRITE     0x1C\n#define HCI_OCF_CONFIG_READ      0x1D\n\n\n\n#define HCI_EVTCODE_VENDOR  0xff\n\n\n#define HCI_GET_OGF(val)  ((unsigned int)val>>10)\n#define HCI_GET_OCF(val)  ((unsigned int)val & 0x3ff)\n#define HCI_GET_OPCODE(ogf,ocf)  ((ogf<<10) + ocf)\n\n#ifdef HCI_AFH\n#define HCI_AFHEvt_Code     0xFD\n#define HCI_ChannelEvt_Code  0xFE\n#endif\n\n\n\n\n\n/******************************************************************************************\n *OCF opcode defines -Debug Commands (OGF )\n******************************************************************************************/\n\n/* LM/HCI Errors                                                                        */\n#define HCI_ERROR_NO_ERROR             0x00\n#define HCI_ERROR_UNKNOWN_HCI_CMD      0x01\n#define HCI_ERROR_NO_CONNECTION        0x02\n#define HCI_ERROR_HARDWARE_FAILURE     0x03\n#define HCI_ERROR_PAGE_TIMEOUT         0x04\n#define HCI_ERROR_AUTHENTICATE_FAILURE 0x05\n#define HCI_ERROR_MISSING_KEY          0x06\n#define HCI_ERROR_MEMORY_FULL          0x07\n#define HCI_ERROR_CONNECTION_TIMEOUT   0x08\n#define HCI_ERROR_MAX_CONNECTIONS      0x09\n#define HCI_ERROR_MAX_SCO_CONNECTIONS  0x0a\n#define HCI_ERROR_ACL_ALREADY_EXISTS   0x0b\n#define HCI_ERROR_COMMAND_DISALLOWED   0x0c\n#define HCI_ERROR_LIMITED_RESOURCE     0x0d\n#define HCI_ERROR_SECURITY_ERROR       0x0e\n#define HCI_ERROR_PERSONAL_DEVICE      0x0f\n#define HCI_ERROR_HOST_TIMEOUT         0x10\n#define HCI_ERROR_UNSUPPORTED_FEATURE  0x11\n#define HCI_ERROR_INVALID_HCI_PARM     0x12\n#define HCI_ERROR_USER_TERMINATED      0x13\n#define HCI_ERROR_LOW_RESOURCES        0x14\n#define HCI_ERROR_POWER_OFF            0x15\n#define HCI_ERROR_LOCAL_TERMINATED     0x16\n#define HCI_ERROR_REPEATED_ATTEMPTS    0x17\n#define HCI_ERROR_PAIRING_NOT_ALLOWED  0x18\n#define HCI_ERROR_UNKNOWN_LMP_PDU      0x19\n#define HCI_ERROR_UNSUPPORTED_REMOTE   0x1a\n#define HCI_ERROR_SCO_OFFSET_REJECT    0x1b\n#define HCI_ERROR_SCO_INTERVAL_REJECT  0x1c\n#define HCI_ERROR_SCO_AIR_MODE_REJECT  0x1d\n#define HCI_ERROR_INVALID_LMP_PARM     0x1e\n#define HCI_ERROR_UNSPECIFIED_ERR      0x1f\n#define HCI_ERROR_UNSUPPORTED_LMP_PARM 0x20\n#define HCI_ERROR_ROLE_CHG_NOT_ALLOWED 0x21\n#define HCI_ERROR_LMP_RESPONSE_TIMEOUT 0x22\n#define HCI_ERROR_LMP_TRANS_COLLISION  0x23\n#define HCI_ERROR_LMP_PDU_NOT_ALLOWED  0x24\n#define HCI_ERROR_ENCRYP_MODE_NOT_ACC  0x25\n#define HCI_ERROR_UNIT_KEY_USED        0x26\n#define HCI_ERROR_QOS_NOT_SUPPORTED    0x27\n#define HCI_ERROR_INSTANT_PASSED       0x28\n#define HCI_ERROR_PAIR_UNITKEY_NO_SUPP 0x29\n#define HCI_ERROR_NOT_FOUND            0xf1\n#define HCI_ERROR_REQUEST_CANCELLED    0xf2\n#define HCI_ERROR_INVALID_SDP_PDU      0xd1\n#define HCI_ERROR_SDP_DISCONNECT       0xd2\n#define HCI_ERROR_SDP_NO_RESOURCES     0xd3\n#define HCI_ERROR_SDP_INTERNAL_ERR     0xd4\n#define HCI_ERROR_STORE_LINK_KEY_ERR   0xe0\n\n\n/****************************************************************************\n\n   HCI_COMMAND, Define Parammeter Length\n *****************************************************************************/\n#define HCI_INQUIRY_PARAM_LEN                    ((INT8U) 5)\n#define HCI_INQUIRY_CANCEL_PARAM_LEN             ((INT8U) 0)\n#define HCI_PERIODIC_INQUIRY_MODE_PARAM_LEN      ((INT8U) 9)\n#define HCI_EXIT_PERIODIC_INQUIRY_MODE_PARAM_LEN ((INT8U) 0)\n#define HCI_CREATE_CONNECTION_PARAM_LEN          ((INT8U) 13)\n#define HCI_DISCONNECT_PARAM_LEN                 ((INT8U) 3)\n#define HCI_ADD_SCO_CONNECTION_PARAM_LEN         ((INT8U) 4)\n#define HCI_ACCEPT_CONNECTION_REQ_PARAM_LEN      ((INT8U) 7)\n#define HCI_REJECT_CONNECTION_REQ_PARAM_LEN      ((INT8U) 7)\n#define HCI_LINK_KEY_REQ_REPLY_PARAM_LEN         ((INT8U) 22)\n#define HCI_LINK_KEY_REQ_NEG_REPLY_PARAM_LEN     ((INT8U) 6)\n#define HCI_PIN_CODE_REQ_REPLY_PARAM_LEN         ((INT8U) 23)\n#define HCI_PIN_CODE_REQ_NEG_REPLY_PARAM_LEN     ((INT8U) 6)\n#define HCI_CHANGE_CONN_PKT_TYPE_PARAM_LEN       ((INT8U) 4)\n#define HCI_AUTH_REQ_PARAM_LEN                   ((INT8U) 2)\n#define HCI_SET_CONN_ENCRYPTION_PARAM_LEN        ((INT8U) 3)\n#define HCI_CHANGE_CONN_LINK_KEY_PARAM_LEN       ((INT8U) 2)\n#define HCI_MASTER_LINK_KEY_PARAM_LEN            ((INT8U) 1)\n#define HCI_REMOTE_NAME_REQ_PARAM_LEN            ((INT8U) 10)\n#define HCI_REMOTE_NAME_REQ_CANCEL_LEN           ((INT8U) 6)\n#define HCI_READ_REMOTE_SUPP_FEATURES_PARAM_LEN  ((INT8U) 2)\n#define HCI_READ_REMOTE_SUPP_FEATURES_EXT_LEN    ((INT8U) 3)\n#define HCI_READ_REMOTE_VER_INFO_PARAM_LEN       ((INT8U) 2)\n#define HCI_READ_CLOCK_OFFSET_PARAM_LEN          ((INT8U) 2)\n#define HCI_READ_LMP_HANDLE_PARAM_LEN            ((INT8U) 2)\n#define HCI_SETUP_SYNC_CONNECTION_PARAM_LEN      ((INT8U) 17)\n#define HCI_ACCEPT_SYNC_CONNECTION_PARAM_LEN     ((INT8U) 21)\n#define HCI_REJECT_SYNC_CONNECTION_PARAM_LEN     ((INT8U) 7)\n\n#define HCI_HOLD_MODE_PARAM_LEN                  ((INT8U) 6)\n#define HCI_SNIFF_MODE_PARAM_LEN                 ((INT8U) 10)\n#define HCI_EXIT_SNIFF_MODE_PARAM_LEN            ((INT8U) 2)\n#define HCI_PARK_MODE_PARAM_LEN                  ((INT8U) 6)\n#define HCI_EXIT_PARK_MODE_PARAM_LEN             ((INT8U) 2)\n#define HCI_QOS_SETUP_PARAM_LEN                  ((INT8U) 20)\n#define HCI_ROLE_DISCOVERY_PARAM_LEN             ((INT8U) 2)\n#define HCI_SWITCH_ROLE_PARAM_LEN                ((INT8U) 7)\n#define HCI_READ_LINK_POLICY_SETTINGS_PARAM_LEN  ((INT8U) 2)\n#define HCI_WRITE_LINK_POLICY_SETTINGS_PARAM_LEN ((INT8U) 4)\n#define HCI_READ_DEF_LP_SETTINGS_PARAM_LEN       ((INT8U) 0)\n#define HCI_WRITE_DEF_LP_SETTINGS_PARAM_LEN      ((INT8U) 2)\n\n#define HCI_SET_EVENT_MASK_PARAM_LEN             ((INT8U) 8)\n#define HCI_RESET_PARAM_LEN                      ((INT8U) 0)\n#define HCI_SET_EVENT_FILTER_PARAM_LEN           ((INT8U) 8) /* Variable */\n#define HCI_FLUSH_PARAM_LEN                      ((INT8U) 2)\n#define HCI_READ_PIN_TYPE_PARAM_LEN              ((INT8U) 0)\n#define HCI_WRITE_PIN_TYPE_PARAM_LEN             ((INT8U) 1)\n#define HCI_CREATE_NEW_UNIT_KEY_PARAM_LEN        ((INT8U) 0)\n#define HCI_READ_STORED_LINK_KEY_PARAM_LEN       ((INT8U) 7)\n#define HCI_WRITE_STORED_LINK_KEY_PARAM_LEN      ((INT8U) 23) /* Variable */\n#define HCI_DELETE_STORED_LINK_KEY_PARAM_LEN     ((INT8U) 7)\n#define HCI_CHANGE_LOCAL_NAME_PARAM_LEN          ((INT8U) 248)\n#define HCI_READ_LOCAL_NAME_PARAM_LEN            ((INT8U) 0)\n#define HCI_READ_CONN_ACCEPT_TIMEOUT_PARAM_LEN   ((INT8U) 0)\n#define HCI_WRITE_CONN_ACCEPT_TIMEOUT_PARAM_LEN  ((INT8U) 2)\n#define HCI_READ_PAGE_TIMEOUT_PARAM_LEN          ((INT8U) 0)\n#define HCI_WRITE_PAGE_TIMEOUT_PARAM_LEN         ((INT8U) 2)\n#define HCI_READ_SCAN_ENABLE_PARAM_LEN           ((INT8U) 0)\n#define HCI_WRITE_SCAN_ENABLE_PARAM_LEN          ((INT8U) 1)\n#define HCI_READ_PAGESCAN_ACTIVITY_PARAM_LEN     ((INT8U) 0)\n#define HCI_WRITE_PAGESCAN_ACTIVITY_PARAM_LEN    ((INT8U) 4)\n#define HCI_READ_INQUIRYSCAN_ACTIVITY_PARAM_LEN  ((INT8U) 0)\n#define HCI_WRITE_INQUIRYSCAN_ACTIVITY_PARAM_LEN ((INT8U) 4)\n#define HCI_READ_AUTH_ENABLE_PARAM_LEN           ((INT8U) 0)\n#define HCI_WRITE_AUTH_ENABLE_PARAM_LEN          ((INT8U) 1)\n#define HCI_READ_ENC_MODE_PARAM_LEN              ((INT8U) 0)\n#define HCI_WRITE_ENC_MODE_PARAM_LEN             ((INT8U) 1)\n#define HCI_READ_CLASS_OF_DEVICE_PARAM_LEN       ((INT8U) 0)\n#define HCI_WRITE_CLASS_OF_DEVICE_PARAM_LEN      ((INT8U) 3)\n#define HCI_READ_VOICE_SETTING_PARAM_LEN         ((INT8U) 0)\n#define HCI_WRITE_VOICE_SETTING_PARAM_LEN        ((INT8U) 2)\n#define HCI_READ_AUTO_FLUSH_TIMEOUT_PARAM_LEN    ((INT8U) 2)\n#define HCI_WRITE_AUTO_FLUSH_TIMEOUT_PARAM_LEN   ((INT8U) 4)\n#define HCI_READ_NUM_BCAST_RETXS_PARAM_LEN       ((INT8U) 0)\n#define HCI_WRITE_NUM_BCAST_RETXS_PARAM_LEN      ((INT8U) 1)\n#define HCI_READ_HOLD_MODE_ACTIVITY_PARAM_LEN    ((INT8U) 0)\n#define HCI_WRITE_HOLD_MODE_ACTIVITY_PARAM_LEN   ((INT8U) 1)\n#define HCI_READ_TX_POWER_LEVEL_PARAM_LEN        ((INT8U) 3)\n#define HCI_READ_SYNC_FLOW_CON_ENABLE_PARAM_LEN   ((INT8U) 0)\n#define HCI_WRITE_SYNC_FLOW_CON_ENABLE_PARAM_LEN  ((INT8U) 1)\n#define HCI_SET_HCTOHOST_FLOW_CONTROL_PARAM_LEN  ((INT8U) 1)\n#define HCI_HOST_BUFFER_SIZE_PARAM_LEN           ((INT8U) 7)\n#define HCI_HOST_NUM_COMPLETED_PACKETS_PARAM_LEN ((INT8U) 5) /* Variable */\n#define HCI_READ_LINK_SUPERV_TIMEOUT_PARAM_LEN   ((INT8U) 2)\n#define HCI_WRITE_LINK_SUPERV_TIMEOUT_PARAM_LEN  ((INT8U) 4)\n#define HCI_READ_NUM_SUPPORTED_IAC_PARAM_LEN     ((INT8U) 0)\n#define HCI_READ_CURRENT_IAC_LAP_PARAM_LEN       ((INT8U) 0)\n#define HCI_WRITE_CURRENT_IAC_LAP_PARAM_LEN      ((INT8U) 4) /* Variable */\n#define HCI_READ_PAGESCAN_PERIOD_MODE_PARAM_LEN  ((INT8U) 0)\n#define HCI_WRITE_PAGESCAN_PERIOD_MODE_PARAM_LEN ((INT8U) 1)\n#define HCI_READ_PAGESCAN_MODE_PARAM_LEN         ((INT8U) 0)\n#define HCI_WRITE_PAGESCAN_MODE_PARAM_LEN        ((INT8U) 1)\n\n#define HCI_READ_INQUIRYSCAN_TYPE_PARAM_LEN         ((INT8U) 0)\n#define HCI_WRITE_INQUIRYSCAN_TYPE_PARAM_LEN        ((INT8U) 1)\n#define HCI_READ_INQUIRY_MODE_PARAM_LEN             ((INT8U) 0)\n#define HCI_WRITE_INQUIRY_MODE_PARAM_LEN            ((INT8U) 1)\n\n#define HCI_READ_AFH_CHANNEL_ASSESSMENT_MODE_LEN    ((INT8U) 0)\n#define HCI_WRITE_AFH_CHANNEL_ASSESSMENT_MODE_LEN   ((INT8U) 1)\n\n\n#define HCI_READ_LOCAL_VER_INFO_PARAM_LEN        ((INT8U) 0)\n#define HCI_READ_LOCAL_SUPP_CMD_PARAM_LEN        ((INT8U) 0)\n#define HCI_READ_LOCAL_SUPP_FEATURES_PARAM_LEN   ((INT8U) 0)\n#define HCI_READ_LOCAL_FEATURES_EXT_PARAM_LEN    ((INT8U) 1)\n#define HCI_READ_BUFFER_SIZE_PARAM_LEN           ((INT8U) 0)\n#define HCI_READ_COUNTRY_CODE_PARAM_LEN          ((INT8U) 0)\n#define HCI_READ_BD_ADDR_PARAM_LEN               ((INT8U) 0)\n\n#define HCI_READ_FAILED_CONTACT_COUNT_PARAM_LEN  ((INT8U) 2)\n#define HCI_RESET_FAILED_CONTACT_COUNT_PARAM_LEN ((INT8U) 2)\n#define HCI_GET_LINK_QUALITY_PARAM_LEN           ((INT8U) 2)\n#define HCI_READ_RSSI_PARAM_LEN                  ((INT8U) 2)\n#define HCI_READ_AFH_CHANNEL_MAP_PARAM_LEN       ((INT8U) 2)\n#define HCI_READ_CLOCK_PARAM_LEN                 ((INT8U) 3)\n\n#define HCI_READ_LOOPBACK_MODE_PARAM_LEN         ((INT8U) 0)\n#define HCI_WRITE_LOOPBACK_MODE_PARAM_LEN        ((INT8U) 1)\n#define HCI_ENABLE_DUT_MODE_PARAM_LEN            ((INT8U) 0)\n\n#define HCI_DEBUG_REQUEST_PARAM_LEN              ((INT8U) 2)\n\n\n/******************************************************************************\n        Event Parameter Lengths\n *****************************************************************************/\n#define HCI_EV_INQUIRY_COMPLETE_PARAM_LEN                 ((INT8U) 1)\n#define HCI_EV_INQUIRY_RESULT_PARAM_LEN                   ((INT8U) 15) /* Variable */\n#define HCI_EV_CONN_COMPLETE_PARAM_LEN                    ((INT8U) 11)\n#define HCI_EV_CONN_REQUEST_PARAM_LEN                     ((INT8U) 10)\n#define HCI_EV_DISCONNECT_COMPLETE_PARAM_LEN              ((INT8U) 4)\n#define HCI_EV_AUTH_COMPLETE_PARAM_LEN                    ((INT8U) 3)\n#define HCI_EV_REMOTE_NAME_REQ_COMPLETE_MAX_LEN           ((INT8U) 255)\n#define HCI_EV_REMOTE_NAME_REQ_COMPLETE_BASIC_LEN         ((INT8U) 7)\n#define HCI_EV_ENCRYPTION_CHANGE_PARAM_LEN                ((INT8U) 4)\n#define HCI_EV_CHANGE_CONN_LINK_KEY_COMPLETE_PARAM_LEN    ((INT8U) 3)\n#define HCI_EV_MASTER_LINK_KEY_COMPLETE_PARAM_LEN         ((INT8U) 4)\n#define HCI_EV_READ_REM_SUPP_FEATURES_COMPLETE_PARAM_LEN  ((INT8U) 11)\n#define HCI_EV_READ_REMOTE_VER_INFO_COMPLETE_PARAM_LEN    ((INT8U) 8)\n#define HCI_EV_QOS_SETUP_COMPLETE_PARAM_LEN               ((INT8U) 21)\n#define HCI_EV_COMMAND_COMPLETE_PARAM_LEN                 ((INT8U) 3) /* Variable see below */\n#define HCI_EV_COMMAND_STATUS_PARAM_LEN                   ((INT8U) 4)\n#define HCI_EV_HARDWARE_ERROR_PARAM_LEN                   ((INT8U) 1)\n#define HCI_EV_FLUSH_OCCURRED_PARAM_LEN                   ((INT8U) 2)\n#define HCI_EV_ROLE_CHANGE_PARAM_LEN                      ((INT8U) 8)\n#define HCI_EV_NUMBER_COMPLETED_PKTS_PARAM_LEN            ((INT8U) 5) /* Variable */\n#define HCI_EV_MODE_CHANGE_PARAM_LEN                      ((INT8U) 6)\n#define HCI_EV_RETURN_LINK_KEYS_PARAM_LEN                 ((INT8U) 23) /* Variable */\n#define HCI_EV_PIN_CODE_REQ_PARAM_LEN                     ((INT8U) 6)\n#define HCI_EV_LINK_KEY_REQ_PARAM_LEN                     ((INT8U) 6)\n#define HCI_EV_LINK_KEY_NOTIFICATION_PARAM_LEN            ((INT8U) 23)\n#define HCI_EV_LOOPBACK_COMMAND_PARAM_LEN                 ((INT8U) 0) /* Variable */\n#define HCI_EV_DATA_BUFFER_OVERFLOW_PARAM_LEN             ((INT8U) 1)\n#define HCI_EV_MAX_SLOTS_CHANGE_PARAM_LEN                 ((INT8U) 3)\n#define HCI_EV_READ_CLOCK_OFFSET_COMPLETE_PARAM_LEN       ((INT8U) 5)\n#define HCI_EV_CONN_PACKET_TYPE_CHANGED_PARAM_LEN         ((INT8U) 5)\n#define HCI_EV_QOS_VIOLATION_PARAM_LEN                    ((INT8U) 2)\n#define HCI_EV_PAGE_SCAN_MODE_CHANGE_PARAM_LEN            ((INT8U) 7)\n#define HCI_EV_PAGE_SCAN_REP_MODE_CHANGE_PARAM_LEN        ((INT8U) 7)\n#define HCI_EV_DEBUG_PARAM_LEN                            ((INT8U) 20 )\n\n\n/******************************************************************************\n   HCI_COMMAND_COMPLETE, Argument Length Definitions (not full length)\n   3 From Command Complete + Return Parameters.\n   When an argument length is dependant on the number of elements in the array\n   the defined length contains the constant parameter lengths only. The full\n   array length must be calculated.\n *****************************************************************************/\n#define HCI_INQUIRY_CANCEL_ARG_LEN             ((INT8U) 1)\n#define HCI_PERIODIC_INQ_MODE_ARG_LEN          ((INT8U) 1)\n#define HCI_EXIT_PERIODIC_INQ_MODE_ARG_LEN     ((INT8U) 1)\n#define HCI_CREATE_CONN_CANCEL_ARG_LEN          ((INT8U) 6)\n#define HCI_LINK_KEY_REQ_REPLY_ARG_LEN         ((INT8U) 7)\n#define HCI_LINK_KEY_REQ_NEG_REPLY_ARG_LEN     ((INT8U) 7)\n#define HCI_PIN_CODE_REQ_REPLY_ARG_LEN         ((INT8U) 7)\n#define HCI_PIN_CODE_REQ_NEG_REPLY_ARG_LEN     ((INT8U) 7)\n#define HCI_ROLE_DISCOVERY_ARG_LEN             ((INT8U) 4)\n#define HCI_READ_LINK_POLICY_SETTINGS_ARG_LEN  ((INT8U) 5)\n#define HCI_WRITE_LINK_POLICY_SETTINGS_ARG_LEN ((INT8U) 3)\n#define HCI_SET_SNIFF_SUBRATING_SETTINGS_ARG_LEN ((INT8U) 3)\n#define HCI_SET_EVENT_MASK_ARG_LEN             ((INT8U) 1)\n#define HCI_RESET_ARG_LEN                      ((INT8U) 1)\n#define HCI_SET_EVENT_FILTER_ARG_LEN           ((INT8U) 1)\n#define HCI_FLUSH_ARG_LEN                      ((INT8U) 4)\n#define HCI_READ_PIN_TYPE_ARG_LEN              ((INT8U) 2)\n#define HCI_WRITE_PIN_TYPE_ARG_LEN             ((INT8U) 1)\n#define HCI_CREATE_NEW_UNIT_KEY_ARG_LEN        ((INT8U) 1)\n#define HCI_READ_STORED_LINK_KEY_ARG_LEN       ((INT8U) 5)\n#define HCI_WRITE_STORED_LINK_KEY_ARG_LEN      ((INT8U) 2)\n#define HCI_DELETE_STORED_LINK_KEY_ARG_LEN     ((INT8U) 3)\n#define HCI_CHANGE_LOCAL_NAME_ARG_LEN          ((INT8U) 1)\n#define HCI_READ_LOCAL_NAME_ARG_LEN            ((INT8U) 249)\n#define HCI_READ_CONN_ACCEPT_TIMEOUT_ARG_LEN   ((INT8U) 3)\n#define HCI_WRITE_CONN_ACCEPT_TIMEOUT_ARG_LEN  ((INT8U) 1)\n#define HCI_READ_PAGE_TIMEOUT_ARG_LEN          ((INT8U) 3)\n#define HCI_WRITE_PAGE_TIMEOUT_ARG_LEN         ((INT8U) 1)\n#define HCI_READ_SCAN_ENABLE_ARG_LEN           ((INT8U) 2)\n#define HCI_WRITE_SCAN_ENABLE_ARG_LEN          ((INT8U) 1)\n#define HCI_READ_PAGESCAN_ACTIVITY_ARG_LEN     ((INT8U) 5)\n#define HCI_WRITE_PAGESCAN_ACTIVITY_ARG_LEN    ((INT8U) 1)\n#define HCI_READ_INQUIRYSCAN_ACTIVITY_ARG_LEN  ((INT8U) 5)\n#define HCI_WRITE_INQUIRYSCAN_ACTIVITY_ARG_LEN ((INT8U) 1)\n#define HCI_READ_AUTH_ENABLE_ARG_LEN           ((INT8U) 2)\n#define HCI_WRITE_AUTH_ENABLE_ARG_LEN          ((INT8U) 1)\n#define HCI_READ_ENC_MODE_ARG_LEN              ((INT8U) 2)\n#define HCI_WRITE_ENC_MODE_ARG_LEN             ((INT8U) 1)\n#define HCI_READ_CLASS_OF_DEVICE_ARG_LEN       ((INT8U) 4)\n#define HCI_WRITE_CLASS_OF_DEVICE_ARG_LEN      ((INT8U) 1)\n#define HCI_READ_VOICE_SETTING_ARG_LEN         ((INT8U) 3)\n#define HCI_WRITE_VOICE_SETTING_ARG_LEN        ((INT8U) 1)\n#define HCI_READ_AUTO_FLUSH_TIMEOUT_ARG_LEN    ((INT8U) 5)\n#define HCI_WRITE_AUTO_FLUSH_TIMEOUT_ARG_LEN   ((INT8U) 3)\n#define HCI_READ_NUM_BCASTXS_ARG_LEN           ((INT8U) 2)\n#define HCI_WRITE_NUM_BCASTXS_ARG_LEN          ((INT8U) 1)\n#define HCI_READ_HOLD_MODE_ACTIVITY_ARG_LEN    ((INT8U) 2)\n#define HCI_WRITE_HOLD_MODE_ACTIVITY_ARG_LEN   ((INT8U) 1)\n#define HCI_READ_TX_POWER_LEVEL_ARG_LEN        ((INT8U) 4)\n#define HCI_READ_SCO_FLOW_CON_ENABLE_ARG_LEN   ((INT8U) 2)\n#define HCI_WRITE_SCO_FLOW_CON_ENABLE_ARG_LEN  ((INT8U) 1)\n#define HCI_SET_HC_TO_H_FLOW_CONTROL_ARG_LEN   ((INT8U) 1)\n#define HCI_HOST_BUFFER_SIZE_ARG_LEN           ((INT8U) 1)\n#define HCI_HOST_NUM_COMPLETED_PKTS_ARG_LEN    ((INT8U) 1)\n#define HCI_READ_LINK_SUPERV_TIMEOUT_ARG_LEN   ((INT8U) 5)\n#define HCI_WRITE_LINK_SUPERV_TIMEOUT_ARG_LEN  ((INT8U) 3)\n#define HCI_READ_NUM_SUPPORTED_IAC_ARG_LEN     ((INT8U) 2)\n#define HCI_READ_CURRENT_IAC_LAP_ARG_LEN       ((INT8U) 5) /* Variable */\n#define HCI_WRITE_CURRENT_IAC_LAP_ARG_LEN      ((INT8U) 1)\n#define HCI_READ_PAGESCAN_PERIOD_MODE_ARG_LEN  ((INT8U) 2)\n#define HCI_WRITE_PAGESCAN_PERIOD_MODE_ARG_LEN ((INT8U) 1)\n#define HCI_READ_PAGESCAN_MODE_ARG_LEN         ((INT8U) 2)\n#define HCI_WRITE_PAGESCAN_MODE_ARG_LEN        ((INT8U) 1)\n#define HCI_READ_INQUIRYSCAN_TYPE_ARG_LEN      ((INT8U) 2)  /* Add for spec 1.2 */\n#define HCI_WRITE_INQUIRYSCAN_TYPE_ARG_LEN     ((INT8U) 1)  /* Add for spec 1.2 */\n#define HCI_READ_INQUIRY_MODE_ARG_LEN          ((INT8U) 2)  /* Add for spec 1.2 */\n#define HCI_WRITE_INQUIRY_MODE_ARG_LEN         ((INT8U) 1)  /* Add for spec 1.2 */\n\n\n#define HCI_READ_LOCAL_VER_INFO_ARG_LEN        ((INT8U) 9)\n#define HCI_READ_LOCAL_FEATURES_LEN            ((INT8U) 9)\n#define HCI_READ_BUFFER_SIZE_ARG_LEN           ((INT8U) 8)\n#define HCI_READ_COUNTRY_CODE_ARG_LEN          ((INT8U) 2)\n#define HCI_READ_BD_ADDR_ARG_LEN               ((INT8U) 7)\n#define HCI_READ_FAILED_CONTACT_COUNT_ARG_LEN  ((INT8U) 5)\n#define HCI_RESET_FAILED_CONTACT_COUNT_ARG_LEN ((INT8U) 3)\n#define HCI_GET_LINK_QUALITY_ARG_LEN           ((INT8U) 4)\n#define HCI_READ_RSSI_ARG_LEN                  ((INT8U) 4)\n#define HCI_READ_LOOPBACK_MODE_ARG_LEN         ((INT8U) 2)\n#define HCI_WRITE_LOOPBACK_MODE_ARG_LEN        ((INT8U) 1)\n#define HCI_ENABLE_DUT_ARG_LEN                 ((INT8U) 1)\n#define HCI_MNFR_EXTENSION_ARG_LEN             ((INT8U) 1)\n\n\n/*HCI_CMD_PACKET: 0x01 + opcode(2 bytes)+length(1 byte)+data[255]*/\n\n\nstruct hci_cmd_packet\n{\n    struct list_node node;\n    uint8 misc_data; /* to adjust with lmp_handle_msg */\n    uint8 cmd_flag;  /*must be 0x01*/\n    uint16 opcode;\n    uint16 handle;\n    uint8 length;\n    uint8 data[1];\n} __attribute__ ((packed));\n\nstruct hci_acl_packet\n{\n    INT16U conn_handle;\n    INT16U length;\n    INT8U *data;\n} __attribute__ ((packed));\nstruct hci_sco_packet\n{\n    INT16U conn_handle;\n    INT8U length;\n    INT8U *data;\n} __attribute__ ((packed));\n\n\nstruct hci_evt_packet\n{\n    uint8 evt_flag; /*must be 0x04*/\n    uint8 evt_code;\n    uint8 length;\n    uint8 data[1];\n} __attribute__ ((packed));\n\n\n#define HCI_INQUIRY                                   0x0401\n\nstruct hci_cp_inquiry\n{\n    uint8     lap[3];\n    uint8     length;\n    uint8     num_rsp;\n} __attribute__ ((packed));\n\n#define HCI_CREATE_CONNECTION                 0x0405\nstruct hci_cp_create_conn\n{\n    struct bdaddr_t bdaddr;\n    uint16 pkt_type;\n    uint8 page_scan_repetition_mode;\n    uint8 reserved;\n    uint16 clk_off;\n    uint8 allow_role_switch;\n} __attribute__ ((packed));\n\n#define HCI_DISCONNECT                    0x0406\nstruct hci_cp_disconnect\n{\n    uint16   handle;\n    uint8     reason;\n} __attribute__ ((packed));\n\n#define HCI_ADDSCO_CONN                       0x0407\nstruct hci_cp_addsco_conn\n{\n    uint16 conn_handle;\n    uint16 pkt_type;\n} __attribute__ ((packed));\n\n#define HCI_CREATE_CONNECTION_CANCEL          0x0408\nstruct hci_create_connection_cancel\n{\n    struct bdaddr_t bdaddr;\n} __attribute__ ((packed));\n\n#define HCI_ACCEPT_CONNECTION_REQ             0x0409\nstruct hci_cp_accept_conn_req\n{\n    struct bdaddr_t bdaddr;\n\n    uint8     role;\n} __attribute__ ((packed));\n\n#define HCI_REJECT_CONNECTION_REQ         0x040A\nstruct hci_cp_reject_conn_req\n{\n    struct bdaddr_t bdaddr;\n    uint8     reason;\n} __attribute__ ((packed));\n#define HCI_LINK_KEY_REQ_REPLY            0x040B\nstruct hci_cp_link_key_reply\n{\n    struct bdaddr_t bdaddr;\n    uint8     link_key[16];\n} __attribute__ ((packed));\n\n#define HCI_LINK_KEY_REQ_NEG_REPLY            0x040C\nstruct hci_cp_link_key_neg_reply\n{\n    struct bdaddr_t bdaddr;\n} __attribute__ ((packed));\n\n#define HCI_PIN_CODE_REQ_REPLY                0x040D\nstruct hci_cp_pin_code_reply\n{\n    struct bdaddr_t  bdaddr;\n    uint8     pin_len;\n    uint8     pin_code[16];\n} __attribute__ ((packed));\n\n#define HCI_PIN_CODE_REQ_NEG_REPLY            0x040E\nstruct hci_cp_pin_code_neg_reply\n{\n    struct bdaddr_t  bdaddr;\n} __attribute__ ((packed));\n#define HCI_CHANGE_CONN_PKT_TYPE              0x040F\nstruct hci_cp_change_conn_pkt_type\n{\n    uint16 conn_handle;\n    uint16 pkt_type;\n} __attribute__ ((packed));\n\n\n#define HCI_AUTH_REQ                      0x0411\nstruct hci_cp_auth_req\n{\n    uint16 conn_handle;\n} __attribute__ ((packed));\n\n#define HCI_SET_CONN_ENCRYPTION                   0x0413\nstruct hci_cp_set_conn_encryption\n{\n    uint16 conn_handle;\n    uint8 encryption_enable;\n} __attribute__ ((packed));\n\n\n#define HCI_REMOTE_NAME_REQ                   0x0419\nstruct hci_cp_remote_name_request\n{\n    struct bdaddr_t bdaddr;\n    uint8 page_scan_repetition_mode;\n    uint8 reserved;\n    uint16 clk_off;\n} __attribute__ ((packed));\n\n#define HCI_REMOTE_NAME_CANCEL                0x041A\nstruct hci_cp_remote_name_cancel\n{\n    struct bdaddr_t bdaddr;\n} __attribute__ ((packed));\n\n#define HCI_REMOTE_SUPPORTED_FEATURES   0x041B\nstruct hci_cp_remote_supported_feat\n{\n    uint16 conn_handle;\n} __attribute__ ((packed));\n\n#define HCI_REMOTE_EXTENDED_FEATURES    0x041C\nstruct hci_cp_remote_extended_feat\n{\n    uint16 conn_handle;\n    uint8 page_num;\n} __attribute__ ((packed));\n\n#define HCI_REMOTE_VERSION_INFO         0x041D\nstruct hci_cp_remote_version_info\n{\n    uint16 conn_handle;\n} __attribute__ ((packed));\n\n#define HCI_SETUP_SYNC_CONN           0x0428\nstruct hci_cp_setup_sync_conn\n{\n    uint16 conn_handle;\n    uint32 tx_bandwidth;\n    uint32 rx_bandwidth;\n    uint16 max_latency;\n    uint16 voice_setting;\n    uint8 retx_effort;\n    uint16 pkt_type;\n} __attribute__ ((packed));\n\n#define HCI_ACCEPT_SYNC_CONN              0x0429\nstruct hci_cp_accept_sync_conn\n{\n    struct bdaddr_t bdaddr;\n    uint32 tx_bandwidth;\n    uint32 rx_bandwidth;\n    uint16 max_latency;\n    uint16 voice_setting;\n    uint8 retx_effort;\n    uint16 pkt_type;\n} __attribute__ ((packed));\n\n\n#define HCI_REJECT_SYNC_CONN              0x042A\nstruct hci_cp_reject_sync_conn\n{\n    struct bdaddr_t bdaddr;\n    uint8     reason;\n} __attribute__ ((packed));\n\n#define HCI_IO_CAPABILIRY_RESPONSE           0x042B\nstruct hci_cp_io_capability_request_reply\n{\n    struct bdaddr_t bdaddr;\n    uint8  io_caps;\n    uint8  oob_present;\n    uint8  auth_requirements;\n}__attribute__ ((packed));\n\n#define HCI_IO_CAPABILIRY_NEGATIVE_REPLY          0x0434\nstruct hci_cp_io_capability_negative_reply\n{\n    struct bdaddr_t bdaddr;\n    uint8  reason;\n}__attribute__ ((packed));\n\n#define HCI_USER_CONFIRMATION_REPLY    0x042C\n#define HCI_USER_CONFIRMATION_NEG_REPLY    0x042D\nstruct hci_cp_usr_confirmation_reply\n{\n    struct bdaddr_t bdaddr;\n}__attribute__ ((packed));\n\n#define HCI_SNIFF_MODE                            0x0803\nstruct hci_cp_sniff_mode\n{\n    uint16 conn_handle;\n    uint16 sniff_max_interval;\n    uint16 sniff_min_interval;\n    uint16 sniff_attempt;\n    uint16 sniff_timeout;\n} __attribute__ ((packed));\n\n#define HCI_EXIT_SNIFF_MODE                       0x0804\nstruct hci_cp_exit_sniff_mode\n{\n    uint16 conn_handle;\n} __attribute__ ((packed));\n\n#define HCI_QOS_SETUP                             0x0807\nstruct hci_qos_setup\n{\n    uint16 conn_handle;\n    uint8  unused;\n    uint8  service_type;\n    uint32 token_rate;\n    uint32 peak_bandwidth;\n    uint32 latency;\n    uint32 delay_variation;\n} __attribute__ ((packed));\n\n#define HCI_ROLE_DISCOVERY                        0x0809\nstruct hci_write_role_discovery\n{\n    uint16 conn_handle;\n} __attribute__ ((packed));\n\n#define HCI_SWITCH_ROLE                       0x080B\nstruct hci_witch_role\n{\n    struct bdaddr_t bdaddr;\n    uint8           role;\n} __attribute__ ((packed));\n\n#define HCI_WRITE_LP_SETTINGS                     0x080D\nstruct hci_cp_write_link_policy\n{\n    uint16 conn_handle;\n    uint16 link_policy_settings;\n} __attribute__ ((packed));\n\n#define HCI_SNIFF_SUBRATING             0x0811\nstruct hci_cp_sniff_subrating\n{\n    uint16 conn_handle;\n    uint16 maximum_lantency;\n    uint16 minimum_remote_timeout;\n    uint16 minimum_local_timeout;\n} __attribute__ ((packed));\n\n\n#define HCI_WRITE_SCAN_ENABLE                 0x0C1A\nstruct hci_cp_write_scan_enable\n{\n    uint8     scan_enable;\n} __attribute__ ((packed));\n\n#define HCI_WRITE_CLASS_OF_DEVICE             0x0C24\nstruct hci_cp_write_class_of_device\n{\n    uint8    class_dev[3];\n} __attribute__ ((packed));\n\n#define HCI_WRITE_LOCAL_NAME                  0x0C13\nstruct hci_cp_write_local_name\n{\n    uint8    local_name[BTM_NAME_MAX_LEN];\n} __attribute__ ((packed));\n\n// HCI_WRITE_EXTENDED_INQ_RESP\nstruct hci_write_extended_inquiry_response\n{\n    uint8  fec;\n    uint8  eir[240];\n} __attribute__ ((packed));\n\n#define HCI_LOWLAYER_MONITOR                     0xFC9b\nstruct hci_cp_lowlayer_monitor\n{\n    uint16 conn_handle;\n    uint8 control_flag;\n    uint8 report_format;\n    uint32 data_format;\n    uint8 report_unit;\n} __attribute__ ((packed));\n\n#define HCI_READ_STORED_LINK_KEY              0x0C0D\nstruct hci_cp_read_stored_linkkey\n{\n    struct bdaddr_t bdaddr;\n    uint8 read_all_flag;\n} __attribute__ ((packed));\n\n#define HCI_WRITE_STORED_LINK_KEY             0x0C11\n#define HCI_HS_STORED_LINK_KEY                0x201C //\nstruct hci_cp_write_stored_linkkey\n{\n    uint8 num_keys_to_write;\n    struct bdaddr_t bdaddr;\n    uint8    link_key[16];\n} __attribute__ ((packed));\n\n#define HCI_DELETE_STORED_LINK_KEY            0x0C12\nstruct hci_cp_delete_stored_linkkey\n{\n    struct bdaddr_t bdaddr;\n    uint8  delete_all_flag;\n} __attribute__ ((packed));\n\n#define HCI_WRITE_AUTH_ENABLE                 0x0C20\nstruct hci_cp_write_auth_enable\n{\n    uint8 enable_flag;\n} __attribute__ ((packed));\n\n\n#define HCI_SET_BD_ADDR                  0xFC72\nstruct hci_cp_set_bdaddr\n{\n    uint8 addr_type; /* 0 bt, 1 ble */\n    struct bdaddr_t bdaddr;\n} __attribute__ ((packed));\n\n#define HCI_WRITE_MEMORY                  0xFC02\nstruct hci_cp_write_memory\n{\n    uint32 address;\n    uint8  type;\n    uint8  length;\n    uint32 value;\n} __attribute__ ((packed));\n\n#define HCI_READ_MEMORY                  0xFC01\nstruct hci_cp_read_memory\n{\n    uint32 address;\n    uint8  type;\n    uint8  length;\n} __attribute__ ((packed));\n\n#define HCI_WRITE_CURRENT_IAC_LAP        0x0C3A\nstruct hci_write_current_iac_lap\n{\n    uint8  iac_lap[4];\n} __attribute__ ((packed));\n\n\n#define HCI_WRITE_INQSCAN_TYPE           0x0C43\nstruct hci_write_inqscan_type\n{\n    uint8  inqscan_type;\n} __attribute__ ((packed));\n\n#define HCC_DBG_WRITE_SLEEP_EXWAKEUP_EN  0xFC77\n\n\n#define HCI_WRITE_INQ_MODE              0x0C45\nstruct hci_write_inqmode\n{\n    uint8  inqmode;\n} __attribute__ ((packed));\n\n#define HCI_WRITE_PAGESCAN_TYPE          0x0C47\nstruct hci_write_pagescan_type\n{\n    uint8  pagescan_type;\n} __attribute__ ((packed));\n\n//set sco path\n#define HCI_DBG_SET_SYNC_CONFIG_CMD_OPCODE            0xFC8F\n#define HCC_DBG_SET_SCO_SWITCH           0xFC89\n\n#define HCI_DBG_SET_SYNC_CONFIG_CMD_OPCODE_OLD_VER            0xFC51\n#define HCC_DBG_SET_SCO_SWITCH_OLD_VER           0xFC62\n\nstruct hci_set_switch_sco\n{\n    uint16  sco_handle;\n} __attribute__ ((packed));\n\n#define HCI_DBG_SCO_TX_SILENCE_CMD_OPCODE     0xFC94\nstruct hci_dbg_sco_tx_silence_cmd\n{\n    uint16   connhandle;\n    uint8    silence_on;\n} __attribute__ ((packed));\n\n#define HCI_DBG_SNIFFER_CMD_OPCODE            0xFC95\nstruct hci_dbg_sniffer_interface\n{\n    uint16   connhandle;\n    uint8    subcode;\n} __attribute__ ((packed));\n\n#define HCI_WRITE_LINK_SUPERV_TIMEOUT         0x0C37\nstruct hci_write_superv_timeout\n{\n    uint16   connhandle;\n    uint16   superv_timeout;\n} __attribute__ ((packed));\n\n#define HCI_DBG_START_TWS_EXCHANGE_CMD_OPCODE 0xFC91\nstruct hci_start_tws_exchange\n{\n    uint16   tws_slave_conn_handle;\n    uint16   mobile_conn_handle;\n} __attribute__ ((packed));\n\n#define HCI_DBG_SET_SNIFFER_ENV_CMD_OPCODE    0xFC8E\nstruct hci_set_sniffer_env\n{\n    uint8 sniffer_active;\n    uint8 sniffer_role;\n    struct bdaddr_t monitor_bdaddr;\n    struct bdaddr_t sniffer_bdaddr;\n} __attribute__ ((packed));\n\n#define HCI_DBG_ENABLE_FASTACK_CMD_OPCODE     0xFCA1\nstruct hci_enable_fastack\n{\n    uint16 conn_handle;\n    uint8 direction;\n    uint8 enable;\n} __attribute__ ((packed));\n\n#define HCI_DBG_ENABLE_IBRT_MODE_CMD_OPCODE    0xFCA2\nstruct hci_ibrt_mode_op\n{\n    uint8 enable;\n    uint8 switchOp;\n} __attribute__ ((packed));\n\n#define HCI_DBG_START_IBRT_CMD_OPCODE     0xFCA3\nstruct hci_start_ibrt\n{\n    uint16 slaveConnHandle;\n    uint16 mobilConnHandle;\n} __attribute__ ((packed));\n\n#define HCI_DBG_GET_TWS_SLAVE_OF_MOBILE_RSSI_CMD_OPCODE  0xFCA4\nstruct hci_get_tws_slave_of_mobile_rssi\n{\n    uint16 conn_handle;\n} __attribute__ ((packed));\n\n#define HCI_DBG_STOP_IBRT_CMD_OPCODE     0xFCA8\nstruct hci_stop_ibrt\n{\n    uint8 enable;\n    uint8 reason;\n} __attribute__ ((packed));\n\n#define HCI_DBG_STOP_MULTI_POINT_IBRT_CMD_OPCODE         0xFCBF\nstruct hci_stop_multi_point_ibrt\n{\n    uint16 mobile_conhdl;\n    uint8 reason;\n} __attribute__ ((packed));\n\n#define HCI_DBG_RESUME_IBRT_CMD_OPCODE     0xFCAC\nstruct hci_resume_ibrt\n{\n    uint8 enable;\n} __attribute__ ((packed));\n\n\n#define HCI_DBG_SET_LINK_LBRT_CMD_OPCODE          0xFC97\nstruct hci_set_link_lbrt_enable\n{\n    uint16 conn_handle;\n    uint8  enable;\n} __attribute__ ((packed));\n\n#define HCI_DBG_IBRT_SWITCH_CMD_OPCODE          0xFCBE\nstruct hci_ibrt_switch\n{\n    uint16 conn_handle;\n} __attribute__ ((packed));\n\n#define HCC_WRITE_RANDOM_ADDR               0x2005\nstruct hci_write_random_addr\n{\n    struct bdaddr_t bdaddr;\n} __attribute__ ((packed));\n\n#define HCC_WRITE_ADV_PARAMETER             0x2006\nstruct hci_write_adv_param\n{\n    uint16  interval_min;\n    uint16  interval_max;\n    uint8   adv_type;\n    uint8   own_addr_type;\n    uint8   peer_addr_type;\n    struct bdaddr_t bdaddr;\n    uint8   adv_chanmap;\n    uint8   adv_filter_policy;\n} __attribute__ ((packed));\n\n#define HCC_WRITE_ADV_DATA                  0x2008\nstruct hci_write_adv_data\n{\n    uint8 len;\n    uint8 data[BLE_ADV_DATA_LENGTH];\n} __attribute__ ((packed));\n\n#define HCC_WRITE_SCAN_RSP_DATA             0x2009\nstruct hci_write_scan_rsp_data\n{\n    uint8 len;\n    uint8 data[BLE_SCAN_RSP_DATA_LENGTH];\n} __attribute__ ((packed));\n\n#define HCC_WRITE_ADV_ENABLE                0x200A\nstruct hci_write_adv_en\n{\n    uint8 en;\n} __attribute__ ((packed));\n\n#define HCC_WRITE_BLE_SCAN_PARAMETER        0x200B\nstruct hci_write_ble_scan_param\n{\n    uint8   scan_type;\n    uint16  scan_interval;\n    uint16  scan_window;\n    uint8   own_addr_type;\n    uint8   scan_filter_policy;\n} __attribute__ ((packed));\n\n#define HCC_WRITE_BLE_SCAN_ENABLE           0x200C\nstruct hci_write_ble_can_en\n{\n    uint8 scan_en;\n    uint8 filter_duplicat;\n} __attribute__ ((packed));\n\n\n#define HCC_CLEAR_WHITE_LIST                0x2010\n#define HCC_ADD_DEVICE_TO_WHITELIST         0x2011\nstruct hci_add_device_to_wl\n{\n    uint8 addr_type;\n    struct bdaddr_t bdaddr;\n} __attribute__ ((packed));\n\n#define HCI_DBG_BTADDR_EXCHANGE_CMD_OPCODE  0xFC92\nstruct hci_tws_bdaddr_exchange\n{\n    uint16 conn_handle;\n} __attribute__ ((packed));\n\n#define HCI_DBG_SEND_PREFER_RATE_CMD_OPCODE 0xFCA9\nstruct hci_dbg_send_prefer_rate\n{\n    uint16 conn_handle;\n    uint8 rate;\n} __attribute__ ((packed));\n\n#define HCI_DBG_SET_ECC_DATA_TEST_CMD_OPCODE  0xFCBB\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint8 btlib_hcicmd_dbg_send_prefer_rate(uint16 conn_handle, uint8 rate);\nint8 btlib_send_hci_cmd_direct(uint16 opcode, uint8 *param_data_ptr, uint8 param_len);\nvoid hci_rxtx_buff_process(void);\nint8 hci_simulate_event(uint8 event, uint8 *buff, uint32 buff_len);\nvoid hci_rx_data_ind(hci_buff_t *hci_buff);\nvoid hci_bt_tx_acl_flush(uint16 handle);\nvoid hci_bt_command_sync_flush(uint16 handle);\nvoid hci_ble_tx_acl_flush(uint16 handle);\n#if (BTM_BLE_USE_INTERNAL_QUEUE_CACHE_ENABLE==1)\nvoid hci_ble_rx_acl_flush(uint16 handle);\n#endif\nint8 hcicmd_msg_dispatch (struct hci_cmd_packet *head);\nstruct hci_cmd_packet *hcicmd_packet_create (uint16 opcode, uint8 param_len);\nint8 hcicmd_sync_cmd_done(void);\nint8 hcicmd_get_current_sync_cmd(struct hci_cmd_packet **head);\nint8 btlib_send_ble_data( uint16 conn_handle, uint8 *data_ptr, uint16 data_len, uint8 *priv);\nuint8 hci_receive_ble_handle(uint16 connHandle);\n\ntypedef void (*event_handle_t)(uint8 *param, uint8 *priv, uint8 *donot_free);\ntypedef void (*acl_handle_t)(uint16 handle, uint8 *data, uint16 data_len, uint8 *priv, uint8 *donot_free);\ntypedef void (*sco_handle_t)(uint16 handle, uint8 *data, uint16 data_len, uint8 *priv, uint8* donot_free);\n\nint8 btlib_register_hci_rx_handle(event_handle_t event_handle,acl_handle_t acl_handle, sco_handle_t sco_handle);\nvoid hci_callback(uint8 type, uint16 conn_handle, uint8 *data, uint16 length, uint8 *priv, uint8 *donot_free);\nint8 btlib_hcicmd_write_controller_memory(uint32_t addr, uint32_t val,uint8_t type);\nint8 btlib_hcicmd_read_controller_memory(uint32_t addr, uint32_t len,uint8_t type);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __HCI_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/hci_buff.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __HCI_BUFF_H__\n#define __HCI_BUFF_H__\n\n// abbrs\n// HCI_BUFF -> HB hb\n// HCI_BUFF_TYPE -> HBT\n// HCI_BUFF_DATA_HEAD_TYPE -> HBDHT\n\n#include \"string.h\"\n#include \"btlib_type.h\"\n#include \"stdint.h\"\n#include \"bt_co_list.h\"\n\n#define DUMP_PUSH_POP_TIME 0\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n// hci buffer type\n#define HBT_COMMAND       0x01\n#define HBT_COMMAND_SYNC  0x11\n#define HBT_RX_ACL        0x02\n#define HBT_RX_SCO        0x03\n#define HBT_EVENT         0x04\n#define HBT_TX_ACL        0x05\n#define HBT_TX_SCO        0x06\n#define HBT_RX_BLE        0x07\n#define HBT_TX_BLE        0x08\n#define HBT_RX            0x09\n\n#define HB_TYPE(hci_buff) (hci_buff->type)\n#define HB_OPCODE(hci_buff) (hci_buff->u.opcode)\n#define HB_HANDLE(hci_buff) (hci_buff->u.handle)\n#define HB_DATA(hci_buff) (hci_buff->data)\n#define HB_DATA_LEN(hci_buff) (hci_buff->data_len)\n#define HB_PRIV(hci_buff) (hci_buff->priv)\n#define HB_SHOULD_FREE(hci_buff) (hci_buff->should_free)\n\ntypedef struct {\n    struct list_node node;\n    uint8 type;\n    uint8 should_free;\n    union {\n        uint16 handle;\n        uint16 opcode;\n    } u;\n    uint16 data_len;\n    uint8 *data;\n    void *priv;\n#if defined(DUMP_PUSH_POP_TIME)\n    uint32 push_time;\n#endif\n} hci_buff_t;\n\n#define hci_buff_list_iter_begin(type,hci_buff,error) \\\n    do{ \\\n        hci_buff_t *__hci_buff = NULL; \\\n        struct list_node *__list = hci_buff_get_pend_list(type); \\\n        struct list_node *__pos  = NULL, *__next = NULL; \\\n        error = 0; \\\n        if (__list == NULL) { \\\n            error = 1; \\\n            break; \\\n        } \\\n        colist_iterate_safe(__pos, __next, __list)  \\\n        { \\\n            __hci_buff = colist_structure(__pos, hci_buff_t, node); \\\n            if (__hci_buff == NULL) { \\\n                error = 2; \\\n            } else {\\\n                hci_buff = __hci_buff; \\\n            }\n\n#define hci_buff_list_iter_end() \\\n        } \\\n    }while(0);\n\n/*\n    @brief To init list (add buff to free list, pend list is empty)\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_list_init(void);\n/*\n    @brief To get pend list\n    @param type - buffer type\n    @return list\n*/\nstruct list_node *hci_buff_get_pend_list(uint8 type);\n/*\n    @brief To push buff to list tail\n    @param type - buffer type\n    @param buff - buffer\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_list_push(hci_buff_t *buff);\n/*\n    @brief To push buff to list head\n    @param type - buffer type\n    @param buff - buffer\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_list_push_front(hci_buff_t *buff);\n/*\n    @brief To see list head but no delete operation\n    @param type - buffer type\n    @param buff - buffer to store head\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_list_peek(uint8 type, hci_buff_t **buff);\n/*\n    @brief To get list head and delete it from list\n    @param type - buffer type\n    @param buff - buffer to store head\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_list_pop(uint8 type, hci_buff_t **buff);\n/*\n    @brief To remove a buffer from pending buffer\n    @param buff - buffer to remove\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_list_remove(hci_buff_t *buff);\n/*\n    @brief To see if list is empty\n    @param type - buffer type\n    @return 1 - empty, 0 - empty\n*/\nint8 hci_buff_list_is_empty(uint8 type);\n/*\n    @brief To dump list\n    @param type - buffer type\n*/\nvoid hci_buff_list_dump(uint8 type);\n/*\n    @brief To alloc a buffer\n    @param type - buffer type\n    @param buff - buffer to store head\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_alloc(uint8 type, hci_buff_t **buff);\n/*\n    @brief To free a buffer\n    @param type - buffer type\n    @param buff - buffer to store head\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_free(hci_buff_t *buff);\n/*\n    @brief To print hcibuff statistic\n    @return SUCCESS/FAILURE\n*/\nint8 hci_buff_print_statistic(void);\nint8 hci_buff_rx_print_statistic(void);\nvoid hci_buff_list_filter_handle_peek(uint8 type,uint16 handle,bool equal,hci_buff_t **peek_buff);\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __HCI_BUFF_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/hfp.h",
    "content": "#ifndef __HFP_H__\n#define __HFP_H__\n#include \"btlib_type.h\"\n\nstruct hfp_response {\n\tconst char *data;\n\tunsigned int offset;\n};\n\nenum hfp_result {\n\tHFP_RESULT_OK\t\t= 0,\n\tHFP_RESULT_CONNECT\t= 1,\n\tHFP_RESULT_RING\t\t= 2,\n\tHFP_RESULT_NO_CARRIER\t= 3,\n\tHFP_RESULT_ERROR\t= 4,\n\tHFP_RESULT_NO_DIALTONE\t= 6,\n\tHFP_RESULT_BUSY\t\t= 7,\n\tHFP_RESULT_NO_ANSWER\t= 8,\n\tHFP_RESULT_DELAYED\t= 9,\n\tHFP_RESULT_BLACKLISTED\t= 10,\n\tHFP_RESULT_CME_ERROR\t= 11,\n};\n\nenum hfp_error {\n\tHFP_ERROR_AG_FAILURE\t\t\t= 0,\n\tHFP_ERROR_NO_CONNECTION_TO_PHONE\t= 1,\n\tHFP_ERROR_OPERATION_NOT_ALLOWED\t\t= 3,\n\tHFP_ERROR_OPERATION_NOT_SUPPORTED\t= 4,\n\tHFP_ERROR_PH_SIM_PIN_REQUIRED\t\t= 5,\n\tHFP_ERROR_SIM_NOT_INSERTED\t\t= 10,\n\tHFP_ERROR_SIM_PIN_REQUIRED\t\t= 11,\n\tHFP_ERROR_SIM_PUK_REQUIRED\t\t= 12,\n\tHFP_ERROR_SIM_FAILURE\t\t\t= 13,\n\tHFP_ERROR_SIM_BUSY\t\t\t= 14,\n\tHFP_ERROR_INCORRECT_PASSWORD\t\t= 16,\n\tHFP_ERROR_SIM_PIN2_REQUIRED\t\t= 17,\n\tHFP_ERROR_SIM_PUK2_REQUIRED\t\t= 18,\n\tHFP_ERROR_MEMORY_FULL\t\t\t= 20,\n\tHFP_ERROR_INVALID_INDEX\t\t\t= 21,\n\tHFP_ERROR_MEMORY_FAILURE\t\t= 23,\n\tHFP_ERROR_TEXT_STRING_TOO_LONG\t\t= 24,\n\tHFP_ERROR_INVALID_CHARS_IN_TEXT_STRING\t= 25,\n\tHFP_ERROR_DIAL_STRING_TO_LONG\t\t= 26,\n\tHFP_ERROR_INVALID_CHARS_IN_DIAL_STRING\t= 27,\n\tHFP_ERROR_NO_NETWORK_SERVICE\t\t= 30,\n\tHFP_ERROR_NETWORK_TIMEOUT\t\t= 31,\n\tHFP_ERROR_NETWORK_NOT_ALLOWED\t\t= 32,\n};\n\ntypedef void (*hfp_destroy_func_t)(void *user_data);\ntypedef void (*hfp_debug_func_t)(const char *str, void *user_data);\n\ntypedef void (*hfp_command_func_t)(const char *command, void *user_data);\nextern struct hshf_control *hshf_ctl;\n\ntypedef void (*hfp_hf_result_func_t)(struct hfp_response *context,\n\t\t\t\t\t\t\tvoid *user_data);\n\ntypedef void (*hfp_response_func_t)(enum hfp_result result,\n\t\t\t\t\t\t\tenum hfp_error cme_err,\n\t\t\t\t\t\t\tvoid *user_data);\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#if !defined(HFP_MOBILE_AG_ROLE)\nvoid hf_process_input(struct hshf_control *hfp, const char *data, size_t len);\n#else\nvoid ag_process_input(struct hshf_control *hfp, const char *data, size_t len);\n#endif\n\nbool hfp_hf_send_command(struct hshf_control *hfp, hfp_response_func_t resp_cb,\n\t\t\t\tvoid *user_data, const char *data, unsigned int len);\nbool hfp_hf_send_command_do(struct hshf_control *hfp, hfp_response_func_t resp_cb,\n\t\t\t\tvoid *user_data, const char *data, unsigned int len, bool is_cust_cmd ,uint8 param);\n\n#define hfp_hf_send_command(h,rc,ud,d,dl) hfp_hf_send_command_do(h,rc,ud,d,dl,false,0xFF)\n\n#define hfp_hf_send_command_private(h,rc,ud,d,dl,param) hfp_hf_send_command_do(h,rc,ud,d,dl,false,param)\n\n\n\nbool hfp_context_get_string(struct hfp_response *context, char *buf,\n\t\t\t\t\t\t\t\tuint8_t len);\n\nvoid hfp_context_skip_field(struct hfp_response *context);\n\nvoid skip_whitespace(struct hfp_response *context);\n\nbool hfp_hf_register(struct hshf_control *hfp, hfp_hf_result_func_t callback,\n\t\t\t\t\t\tconst char *prefix,\n\t\t\t\t\t\tvoid *user_data,\n\t\t\t\t\t\thfp_destroy_func_t destroy);\n\nbool hfp_hf_unregister(struct hshf_control *hfp, const char *prefix);\n\nbool hfp_context_open_container(struct hfp_response *context);\n\nbool hfp_context_close_container(struct hfp_response *context);\n\nbool hfp_context_get_unquoted_string(struct hfp_response *context,\n\t\t\t\t\t\t\tchar *buf, uint8_t len);\n\nbool hfp_context_has_next(struct hfp_response *context);\n\nbool hfp_context_get_range(struct hfp_response *context, unsigned int *min,\n\t\t\t\t\t\t\t\tunsigned int *max);\n\nbool hfp_context_get_number(struct hfp_response *context,\n\t\t\t\t\t\t\tunsigned int *val);\n\nvoid hfp_hf_destory_resource(struct hshf_control *hfp);\n\nvoid hf_rfcomm_data_recv_cb(uint32 rfcomm_handle,\n                                    struct pp_buff *ppb, void *priv);\n\nvoid hf_rfcomm_notify_cb(enum rfcomm_event_enum event,\n                                uint32 rfcomm_handle,\n                                void *data, uint8 reason, void *priv);\n\nstruct hshf_control *hfp_search_address(struct bdaddr_t *bdaddr);\n\nbool hfp_msbc_is_enable(struct bdaddr_t *bdaddr);\nstruct hshf_control *hf_find_unused_channel(void);\n#if defined(HFP_MOBILE_AG_ROLE)\nstruct hfp_mobile_module_handler;\nvoid hfp_ag_send_call_active_status(struct hshf_control *hfp, bool active);\nvoid hfp_ag_send_callsetup_status(struct hshf_control *hfp, uint8 status);\nvoid hfp_ag_send_callheld_status(struct hshf_control *hfp, uint8 status);\nvoid hfp_ag_send_calling_ring(struct hshf_control *hfp, const char* number);\nbool hfp_ag_set_speaker_gain(struct hshf_control *hfp, uint8 volume);\nbool hfp_ag_set_microphone_gain(struct hshf_control *hfp, uint8 volume);\nbool hfp_ag_send_result_code(struct hshf_control *hfp, const char *data, int len);\nvoid hfp_ag_register_mobile_module(struct hshf_control* hfp, struct hfp_mobile_module_handler* handler);\nvoid hfp_ag_send_result_ok(struct hshf_control *hfp);\nvoid hfp_ag_send_result_error(struct hshf_control *hfp);\nvoid hfp_ag_send_service_status(struct hshf_control *hfp, bool enabled);\nvoid hfp_ag_send_mobile_signal_level(struct hshf_control *hfp, uint8 level);\nvoid hfp_ag_send_mobile_roam_status(struct hshf_control *hfp, bool enabled);\nbool hfp_ag_send_mobile_battery_level(struct hshf_control *hfp, uint8 level);\n#endif\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /*__HFP_H__*/\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/hid_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"bt_co_list.h\"\n#include \"btlib_type.h\"\n#include \"btm_i.h\"\n#include \"sdp.h\"\n\n#ifndef __HID_I_H__\n#define __HID_I_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum {\n    HID_STATE_CLOSED,\n    HID_STATE_STANDBY = 1, // ready\n    HID_STATE_QUERING,\n    HID_STATE_CONNECTING,\n    HID_STATE_WAITING_INTRUPT_CHANNEL,\n    HID_STATE_CONNECTING_INTRUPT_CHANNEL,\n    HID_STATE_OPEN,\n    HID_STATE_DISCONNECTING,\n} hid_state_t;\n\ntypedef enum {\n    HID_EVENT_REMOTE_NOT_SUPPORT = 1,\n    HID_EVENT_CONN_OPENED,\n    HID_EVENT_CONN_CLOSED,\n} hid_event_t;\n\ntypedef enum {\n    HID_SESSION_CLOSE,\n    HID_SESSION_CONNECTING,\n    HID_SESSION_OPEN,\n} hid_session_state_t;\n\ntypedef enum {\n    HID_PENDING_OP_NULL = 0,\n    HID_PENDING_OP_GET_REPORT,\n    HID_PENDING_OP_GET_PROTOCOL,\n    HID_PENDING_OP_SET_REPORT,\n    HID_PENDING_OP_SET_PROTOCOL,\n} hid_pending_op_t;\n\nstruct hid_session_t {\n    uint32 l2cap_handle;\n    hid_session_state_t state;\n};\n\nstruct hid_callback_parms_t\n{\n    hid_event_t event;\n    uint8_t error_code;\n    struct bdaddr_t remote;\n};\n\n#define HID_BOOT_PROTOCOL_MODE      0x0\n#define HID_REPORT_PROTOCOL_MODE    0x1\n\ntypedef enum {\n    HID_REPORT_TYPE_OTHER = 0,\n    HID_REPORT_TYPE_INPUT,\n    HID_REPORT_TYPE_OUTPUT,\n    HID_REPORT_TYPE_FEATURE,\n} hid_report_type_enum_t;\n\n#define HID_FRAME_DATA_MAX_LEN 11 /* DM1 is recommended packet */\nextern struct hid_stack_interface_t hid_stack_if;\n\nstruct hid_report_data_t {\n    uint8_t report_id;\n    uint8_t data[HID_FRAME_DATA_MAX_LEN];\n    uint8_t data_len;\n};\n\nstruct hid_frame_t {\n    uint8_t header;\n    uint8_t data[HID_FRAME_DATA_MAX_LEN];\n    uint8_t data_len;\n    bool waiting_rsp;\n    hid_pending_op_t pending_op;\n};\n\nstruct hid_frame_node_t {\n    struct list_node node;\n    struct hid_frame_t frame;\n};\n\nstruct hid_rx_msg_t {\n    uint8_t msg_type;\n    uint8_t param;\n    uint8_t data_len;\n    uint8_t *data;\n};\n\nstruct hid_control_t {\n    struct bdaddr_t remote;\n    bool initiator;\n    bool is_hid_device_role;\n    struct hid_session_t control_session;\n    struct hid_session_t interrupt_session;\n    hid_state_t state;\n    hid_pending_op_t pending_op;\n    uint8 pending_protocol_set;\n    uint8 unplug_op_pending;\n    uint8 local_protocol_mode;\n    uint8 remote_protocol_mode;\n    uint8 remote_report_descriptor_has_report_id;\n    uint8 disc_reason;\n    void (*hid_callback)(struct hid_control_t *hid_ctl, const struct hid_callback_parms_t *info);\n    struct sdp_request sdp_request;\n    struct hid_report_data_t device_input_data;\n    struct hid_report_data_t device_output_data;\n    struct hid_report_data_t device_feature_data;\n    struct list_node ctrl_tx_list;\n    struct list_node intr_tx_list;\n    bool ctrl_tx_busy;\n    bool intr_tx_busy;\n    bool use_interrupt_channel;\n};\n\nstruct hid_stack_interface_t {\n    struct hid_control_t *(*hid_alloc_standby_control)(void *remote);\n    struct hid_control_t *(*hid_search_from_control_handle)(uint32_t l2cap_handle);\n    struct hid_control_t *(*hid_search_from_interrupt_handle)(uint32_t l2cap_handle);\n    struct hid_control_t *(*hid_search_from_remote_bdaddr)(void *remote);\n};\n\nstruct hid_ctx_input {\n    struct ctx_content ctx;\n    struct bdaddr_t *remote;\n    struct hid_control_t *hid_ctl;\n    uint32 hid_ctrl_handle;\n    uint32 hid_intr_handle;\n};\n\nint hid_stack_init(struct hid_stack_interface_t *stack_if, uint8_t is_hid_device_role);\n\nint hid_connect_req(struct hid_control_t *hid_ctl);\n\nvoid hid_disconnect_req(struct hid_control_t *hid_ctl);\n\nhid_state_t hid_get_state(struct hid_control_t *hid_ctl);\n\nint hid_send_handshake(struct hid_control_t *hid_ctl, uint8_t code);\n\nvoid hid_keyboard_input_report(struct hid_control_t *hid_ctl, uint8_t modifier_key, uint8_t key_code);\n\nvoid hid_keyboard_send_ctrl_key(struct hid_control_t *hid_ctl, uint8_t ctrl_key);\n\nint hid_l2cap_control_notify_callback(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason);\nint hid_l2cap_interrupt_notify_callback(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason);\nvoid hid_l2cap_control_data_receive(uint32 l2cap_handle, struct pp_buff *ppb);\nvoid hid_l2cap_interrupt_data_receive(uint32 l2cap_handle, struct pp_buff *ppb);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __HID_I_H__ */\n\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/hshf.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HSHF_H__\n#define __HSHF_H__\n\n#include \"btlib_type.h\"\n\n#include \"rfcomm_i.h\"\n#include \"sco_i.h\"\n\n#define HS_CFG_SERVER_CHANNEL 0x12\n#define HF_CFG_SERVER_CHANNEL 0x13\n\n#define HF_CFG_MAX_RX_CREDIT 207\n#define HF_CFG_CREDIT_GIVE_LIMIT 20\n\n/* Functions */\nint8 hs_init ( void (*indicate_callback) ( uint8 event, void *pdata ));\nint8 hs_close(void);\n\nvoid hs_rfcomm_datarecv_callback(uint32 rfcomm_handle, struct pp_buff *ppb, void *priv);\nvoid hs_rfcomm_notify_callback(enum rfcomm_event_enum event,\n                                uint32 rfcomm_handle, void *pData,\n                                uint8 reason, void *priv);\n\n#endif /* __HSHF_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/hshf_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HSHF_I_H__\n#define __HSHF_I_H__\n\n#include \"btlib_type.h\"\n#include \"rfcomm_i.h\"\n#include \"co_queue.h\"\n#include \"bt_co_list.h\"\n#include \"sdp.h\"\n#include \"bt_sys_cfg.h\"\n\n//#define _THREE_WAY_CALL\n\n//#define PRO_PCDEMO\nstruct hshf_control;\n\ntypedef void (*hfp_callback_t)(struct hshf_control *, uint8_t, void *);\n\nenum hshf_tx_status {\n    HFP_TX_IDLE = 0,\n    HFP_TX_BUSY,\n};\n\n/* notify upper layer */\nenum hshf_event_t {\n    /* user command event*/\n    HSHF_ENTER_PAIRING = 1,\n    HSHF_EXIT_PAIRING,\n    HF_DIAL_NUM_REQ,\n    HF_ANSWER_REQ,\n    HF_REJECT_REQ,\n    HF_ENDCALL_REQ,\n    HF_TRANSFER_REQ,\n    HF_DIAL_LASTNUM_REQ,\n    HF_TRANSMIT_DTMF,\n    HF_VOICE_DIAL_REQ, //10\n    HF_VOICE_DIAL_CANCEL_REQ,\n    HSHF_CONNECT_REQ,\n    HF_DISCONNECT_REQ,\n    HSHF_SPK_VOL_UP,\n    HSHF_SPK_VOL_DOWN,\n    HSHF_TOGGLE_MIC,\n    HSHF_TOGGLE_LED,\n    HSHF_TOGGLE_VOLBTN,\n    HF_ANSWER_ENDCALL_CONN,     //  answer @ ring, end @ talking, connect@idle\n    HF_REJ_REDIAL_TRANS_CONN,   // reject @ ring, redial @ connected, transfer @ talking\n    HF_RELEASE_HOLD_REJECT_WAIT_REQ, //21\n    HF_RELEASE_ACTVIE_ACCEPT_OTHER_REQ,\n    HF_HOLD_ACTIVE_ACCEPT_OTHER_REQ,\n    HF_CONFERENCE_REQ,\n    HSHF_SET_PB_STORAGE,\n    HSHF_GET_PB_ITEM,\n\n    HF_HCI_RXTX_IND,\n\n    /* internal event */\n    HSHF_EVNT_BEGIN,     //28\n    HSHF_RFCOMM_OPENED, //29\n    HSHF_CONN_OPENED, \n    HSHF_CONN_CLOSED,\n    HSHF_CONN_REQ_FAIL,\n    HF_AG_SUPPORTED_FEATURE_IND,\n    HF_AG_SUPPORTED_INDICATOR_IND,\n    HF_AG_CURRENT_INDICATOR_IND,\n    HF_INDICATOR_EVENT_IND,\n    HF_CIEV_CALL_IND,\n    HF_CIEV_SERVICE_IND,\n    HF_CIEV_CALLSETUP_IND,    //38\n    HF_CALLER_ID_IND,\n    HF_VOICE_IND,\n    HSHF_RING_IND,  //41\n    HSHF_AUDIOCONN_OPENED,\n    HSHF_AUDIOCONN_CLOSED,\n    HSHF_SPK_VOL_IND,\n    HSHF_MIC_VOL_IND,\n    HF_IN_BAND_RING_IND,\n    HSHF_PAIR_OK,  //47\n    HSHF_PAIR_TOUT,\n    HSHF_PAIR_FAILED,\n    //// NEW for three way call\n    HF_CIEW_CALLHELD_IND,\n    HF_CCWA_IND,\n    HF_VOICE_REQ,\n    // for enter pairing and test mode by combkey\n    HSHF_ENTER_TESTMODE,\n    HSHF_CALL_IND,\n    HF_EVENT_AT_RESULT_DATA,\n};\n\nenum hshf_callsetup {\n    CALL_SETUP_NONE,\n    CALL_SETUP_INCOMING,\n    CALL_SETUP_OUTGOING,\n    CALL_SETUP_REMOTE_ALERT,\n    CALL_SETUP_ESTABLISHED\n};\n\nenum hshf_call {\n\tCALL_NONE = 0,\n\tCALL_ESTABLISHED\n};\n\nenum hshf_profile {\n    PRO_BOTH = 0,\n    PRO_HEADSET,\n    PRO_HANDSFREE,\n    PRO_EXIT,\n    PRO_SHOW\n};\n\nenum hshf_conn_state {\n    STOP,\n    STANDBY = 1,\n    LISTENING ,  //ready\n    QUERING,\n    CONNECTING,\n    AT_EXCHANGING,\n    CONNECTED,\n    SCOCONNECTED\n};\n\nenum hshf_pb_location {\n    LOCATION_SM = 0,\n    LOCATION_ME,\n    LOCATION_MT,\n    LOCATION_DC,\n    LOCATION_RC,\n    LOCATION_MC,\n    LOCATION_LD\n};\n\nenum hshf_pb_action {\n    ACTION_PREV = 0,\n    ACTION_NEXT\n};\n\nenum hfp_indicator {\n\tHFP_INDICATOR_SERVICE = 0,\n\tHFP_INDICATOR_CALL,\n\tHFP_INDICATOR_CALLSETUP,\n\tHFP_INDICATOR_CALLHELD,\n\tHFP_INDICATOR_SIGNAL,\n\tHFP_INDICATOR_ROAM,\n\tHFP_INDICATOR_BATTCHG,\n\tHFP_INDICATOR_LAST\n};\n\ntypedef void (*ciev_func_t)(struct hshf_control *chan, uint8_t val);\n\nstruct indicator {\n    uint8_t index;\n    uint8_t min;\n    uint8_t max;\n    uint8_t val;\n    bool disable;\n    ciev_func_t cb;\n};\n\nstruct indicator;\n\n#define HFP_HF_IND_ENHANCED_SAFETY 1\n#define HFP_HF_IND_BATTERY_LEVEL   2\n\nstruct hf_ind_enhanced_safety {\n    bool local_support;\n    bool remote_support;\n    bool enabled;\n    uint8_t value; /* 0 or 1 */\n};\n\nstruct hf_ind_battery_level {\n    bool local_support;\n    bool remote_support;\n    bool enabled;\n    uint8_t value; /* 0 ~ 100 */\n};\n\nstruct hf_indicator {\n    struct hf_ind_enhanced_safety enhanced_safety;\n    struct hf_ind_battery_level battery_level;\n};\n\n#define MAX_DIAL_NUM_SIZE     0x10\n#define MAX_SAVED_CALL_NUM    4\n\n#define CODEC_ID_CVSD 0x01\n#define CODEC_ID_MSBC 0x02\nstruct hfp_codec {\n\tuint8_t type;\n\tbool local_supported;\n\tbool remote_supported;\n};\n\n#if defined(HFP_MOBILE_AG_ROLE)\nstruct hfp_ag_call_info\n{\n    uint8_t direction; // 0 outgoing, 1 incoming\n    uint8_t state; // 0 active, 1 held, 2 outgoing dialing, 3 outgoing alerting, 4 incoming, 5 waiting, 6 held by Response and Hold\n    uint8_t mode; // 0 voice, 1 data, 2 fax\n    uint8_t multiparty; // 0 is not one of multiparty call parties, 1 is one of.\n    const char* number; // calling number, optional\n};\n\ntypedef int (*hfp_mobile_handler)(void* hfp_chan);\ntypedef int (*hfp_mobile_handler_int)(void* hfp_chan, int n);\ntypedef int (*hfp_mobile_handler_str)(void* hfp_chan, const char* s);\ntypedef int (*hfp_mobile_iterate_call_handler)(void* hfp_chan, struct hfp_ag_call_info* out);\ntypedef const char* (*hfp_mobile_query_operator_handler)(void* hfp_chan);\n\nstruct hfp_mobile_module_handler\n{\n    hfp_mobile_handler answer_call;\n    hfp_mobile_handler hungup_call;\n    hfp_mobile_handler dialing_last_number;\n    hfp_mobile_handler release_held_calls;\n    hfp_mobile_handler release_active_and_accept_calls;\n    hfp_mobile_handler hold_active_and_accept_calls;\n    hfp_mobile_handler add_held_call_to_conversation;\n    hfp_mobile_handler connect_remote_two_calls;\n    hfp_mobile_handler disable_mobile_nrec;\n    hfp_mobile_handler_int release_specified_active_call;\n    hfp_mobile_handler_int hold_all_calls_except_specified_one;\n    hfp_mobile_handler_int hf_battery_change; /* battery level 0 ~ 100 */\n    hfp_mobile_handler_int hf_spk_gain_change; /* speaker gain 0 ~ 15 */\n    hfp_mobile_handler_int hf_mic_gain_change; /* mic gain 0 ~ 15 */\n    hfp_mobile_handler_int transmit_dtmf_code;\n    hfp_mobile_handler_int memory_dialing_call;\n    hfp_mobile_handler_str dialing_call;\n    hfp_mobile_handler_str handle_at_command;\n    hfp_mobile_query_operator_handler query_current_operator;\n    hfp_mobile_iterate_call_handler iterate_current_call;\n};\n#endif\n\nstruct hshf_control {\n    struct list_node hfp_node;\n    struct bdaddr_t remote;\n    uint32_t rfcomm_handle;\n    uint8 listen_channel;\n    uint8 disc_reason;\n    uint8 audio_up;\n\tstruct coqueue *cmd_queue;\n\n#if HFP_CMD_FLOW_CONTROL_ENABLE==1\n    unsigned int tx_time;\n    uint8_t tx_timeout_timer;\n    enum hshf_tx_status tx_status;\n#endif\n\n\tstruct coqueue *event_handlers;\n\tuint8_t negotiated_codec;\n\n\tstruct hfp_codec codecs[2];\n\n\tstruct indicator ag_ind[HFP_INDICATOR_LAST];\n\n    struct hf_indicator hf_ind;\n\n\tuint32_t chld_features;\n\n    uint8 bsir_enable;\n    uint8 status_call;             /* Phone status info - call */\n    uint8 status_service;          /* Phone status info - service */\n    uint8 status_callsetup;\t\t  /* Phone status info - callsetup*/\n    uint8 status_callheld;\t\t  /* Phone status info - callheld*/\n\n#if defined(HFP_MOBILE_AG_ROLE)\n    uint32_t slc_completed: 1;\n    uint32_t ag_status_report_enable: 1;\n    uint32_t calling_line_notify: 1;\n    uint32_t call_waiting_notify: 1;\n    uint32_t extended_error_enable: 1;\n    struct hfp_mobile_module_handler* mobile_module;\n#endif\n\n    uint32_t hf_features;    /*hf supported feature bitmap:            */\n                                /* bit 0 - EC/NR function                */\n                                /*     1 - Call waiting and 3-way calling */\n                                /*     2 - CLI presentation capability   */\n                                /*     3 - Voice recognition activation   */\n                                /*     4 - Remote volume control         */\n                                /*     5 - Enhance call status            */\n                                /*     6 - Enhanced call control         */\n    uint32_t ag_features;   /* AG supported feature bitmap  */\n                                /* bit0 - 3-way calling      */\n                                /*    1 - EC/NR function    */\n                                /*    2 - Voice recognition  */\n                                /*    3 - In-band ring tone */\n                                /*    4 - Attach a number to a voice tag*/\n                                /*    5 - Ablility to reject a call */\n                                /*    6 - Enhanced call status     */\n                                /*    7 - Enhanced call control     */\n                                /*    8 - extended error result codes*/\n\n    enum hshf_conn_state state;   /*check if it is connecting now,\n                                   if it is connecting,the hf_connect_req\n                                   will not work\n                                   */\n    uint8 speak_volume;\n    uint8 mic_gain;\n    uint8 voice_rec;\n    uint8 voice_rec_param;\n    bool client_enabled;\n    char caller_id[MAX_DIAL_NUM_SIZE+1]; /* incoming caller id */\n\n    struct sdp_request sdp_request;\n    char *ptr;\n};\n\nstruct hfp_ctx_input {\n    struct ctx_content ctx;\n    struct bdaddr_t *remote;\n    uint32 rfcomm_handle;\n    struct hshf_control *hfp_ctl;\n};\n\nstruct hfp_ctx_output {\n    uint32 rfcomm_handle;\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n/*----hshf.c----*/\nenum hshf_conn_state hshf_get_state(struct hshf_control *chan);\nvoid hshf_set_state(struct hshf_control *chan, enum hshf_conn_state state);\nconst char *hshf_state2str(enum hshf_conn_state state);\nconst char *hshf_event2str(enum hshf_event_t event);\n\ntypedef struct {\n    uint8 length;\n    char *caller_id;\n} hf_caller_id_ind_t;\n\nint8 hf_release_sco(struct bdaddr_t *bdaddr, uint8 reason);\n\n/*----connect.c----*/\nint8 hf_disconnect_req(struct hshf_control *chan);\nint8 hshf_exit_sniff(struct hshf_control *chan);\nint8 hshf_connect_req (struct hshf_control *hshf_ctl, struct bdaddr_t *remote);\n\n/* - hfp.c - */\nint8 hshf_create_codec_connection(struct bdaddr_t *bdaddr, struct hshf_control *chan);\nint8 hf_createSCO(struct bdaddr_t *bdaddr, void *chan);\nint hfp_init(hfp_callback_t callback);\n\nint hf_open_chan(struct hshf_control *chan);\n\nint8 hf_close_chan(struct hshf_control *chan);\n\nbool hshf_disable_nrec(struct hshf_control *chan);\n\nbool hshf_report_speaker_volume(struct hshf_control *chan, uint8_t gain);\n\nbool hshf_send_custom_cmd(struct hshf_control *chan, const char *cmd);\n\nbool hshf_hungup_call(struct hshf_control *chan);\n\nbool hshf_dial_number(struct hshf_control *chan, uint8 *number, uint16 len);\n\nbool hshf_answer_call(struct hshf_control *chan);\n\nbool hshf_redial_call(struct hshf_control *chan);\n\nbool hshf_batt_report(struct hshf_control *chan, uint8_t level);\n\nbool hshf_call_hold(struct hshf_control *chan, int8 action, int8 index);\n\nvoid hshf_set_hf_indicator_enabled(bool enable);\nbool hshf_report_enhanced_safety(struct hshf_control *chan, uint8_t value);\nbool hshf_report_battery_level(struct hshf_control* chan, uint8_t value);\n\nbool hshf_update_indicators_value(struct hshf_control *chan, uint8_t assigned_num, uint8_t level);\nbool hshf_hf_indicators_1(struct hshf_control *chan);\nbool hshf_hf_indicators_2(struct hshf_control *chan);\nbool hshf_hf_indicators_3(struct hshf_control *chan);\nbool hshf_codec_conncetion(struct hshf_control *chan);\nbool hshf_list_current_calls(struct hshf_control *chan);\n\nbool hshf_enable_voice_recognition(struct hshf_control *chan, uint8_t en);\n\nbool hshf_is_voice_recognition_active(struct hshf_control *chan);\n\nuint32 hfp_get_rfcomm_handle(struct hshf_control *hfp_ctl);\n\nuint32 hfp_save_ctx(struct hshf_control *hfp_ctl, uint8_t *buf, uint32_t buf_len);\n\nuint32 hfp_restore_ctx(struct hfp_ctx_input *input, struct hfp_ctx_output *output);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __HSHF_I_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/l2cap.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __L2CAP_H__\n#define __L2CAP_H__\n\n#include \"btlib_type.h\"\n#include \"co_ppbuff.h\"\n#include \"bt_co_list.h\"\n#include \"l2cap_i.h\"\n#include \"btm_i.h\"\n\ntypedef void (*l2cap_sdp_disconnect_callback)(const void *para);\ntypedef uint8 (*btm_get_ibrt_role_callback)(const void *para);\ntypedef uint8 (*btm_get_tss_state_callback)(const void *para);\n/* base frame */\n#define L2CAP_SIG_CID 0x0001\n#define L2CAP_CONNECTIONLESS_CID 0x0002\n\n#define L2CAP_CHANNEL_NUM_PER_LINK     (9) /* rfcomm (1) + avrcp (1) + avdtp (2) + sdp (4) + extra (1) */\n#define CID_INDEX_OFFSET               (0x40)\n#define l2cap_cid_to_index(cid)        (cid - CID_INDEX_OFFSET)\n#define l2cap_index_to_cid(index)      (index + CID_INDEX_OFFSET)\n\nstruct l2cap_hdr {\n    uint16 len;\n    uint16 cid;\n}__attribute__ ((packed));\n\n/* command code */\n#define L2CAP_SIG_REJ 0x01\n#define L2CAP_SIG_CONN_REQ 0x02\n#define L2CAP_SIG_CONN_RSP 0x03\n#define L2CAP_SIG_CFG_REQ 0x04\n#define L2CAP_SIG_CFG_RSP 0x05\n#define L2CAP_SIG_DISCONN_REQ 0x06\n#define L2CAP_SIG_DISCONN_RSP 0x07\n#define L2CAP_SIG_ECHO_REQ 0x08\n#define L2CAP_SIG_ECHO_RSP 0x09\n#define L2CAP_SIG_INFO_REQ 0x0A\n#define L2CAP_SIG_INFO_RSP 0x0B\n\n//Not used since inter-operation with special BT insturement\n#if 0\n/* indentifier id */\n#define L2C_SIG_ID_REMAP_OFFSET    (100)\n#define L2C_SIG_CONN_REQ_ID        (1)\n#define L2C_SIG_DISCONN_REQ_ID     (21)\n#define L2C_SIG_CONFIG_REQ_ID      (41)\n#define L2C_SIG_ECHO_REQ_ID        (61)\n#define L2CAP_SIG_INFO_REQ_ID      (81)\n#define L2CAP_SIG_DEFAULT_ID       (1)\n#endif\n\nstruct l2cap_sig_hdr {\n    byte code;\n    byte id;\n    uint16 len;\n}__attribute__ ((packed));\n\n\n#define L2CAP_SIG_REASON_NOT_UNDERSTOOD 0x0\n#define L2CAP_SIG_REASON_MTU_EXCEED 0x1\n#define L2CAP_SIG_REASON_INVALID_CID 0x2\nstruct l2cap_sig_rej {\n\n    uint16 reason;\n/*data*/\n    uint16 scid;            /*the data len is 0 - 4*/\n    uint16 dcid;\n}__attribute__ ((packed));\n\nstruct l2cap_sig_conn_req {\n    uint16 psm;\n    uint16 scid;\n}__attribute__ ((packed));\n\n#define L2CAP_SIG_RESULT_SUCCESS 0x0\n#define L2CAP_SIG_RESULT_PENDING 0x1\n#define L2CAP_SIG_RESULT_REFUSE_PSM 0x2\n#define L2CAP_SIG_RESULT_REFUSE_SECURITY 0x3\n#define L2CAP_SIG_RESULT_REFUSE_RESOURCE 0x4    \n\n#define L2CAP_SIG_RESULT_PENDING_NOINFO 0x00    \n#define L2CAP_SIG_RESULT_PENDING_AUTHEN 0x01\n#define L2CAP_SIG_RESULT_PENDING_AUTHOR 0x02\nstruct l2cap_sig_conn_rsp {\n    uint16 dcid;\n    uint16 scid;\n\n    uint16 result;\n    uint16 status;   /*only defined when result = pending */\n}__attribute__ ((packed));\n\nstruct l2cap_sig_cfg_req {\n    uint16 dcid;\n    uint16 flags;           /* bit0=1:continue  bit0=0:complete  */\n}__attribute__ ((packed));\n\n#define L2CAP_CFGRSP_SUCCESS                        0x0000\n#define L2CAP_CFGRSP_UNACCEPT_PARAMS       0x0001\n#define L2CAP_CFGRSP_REJ                                 0x0002\n#define L2CAP_CFGRSP_UNKNOWN                       0x0003\nstruct l2cap_sig_cfg_rsp {\n    uint16 scid;\n    uint16 flags;\n    uint16 result;\n}__attribute__ ((packed));\n    \n#define L2CAP_CFG_TYPE_MTU\t\t0x01\n#define L2CAP_CFG_TYPEF_FLUSH_TO\t0x02\n#define L2CAP_CFG_TYPE_QOS\t\t0x03\n#define L2CAP_CFG_TYPE_RFC\t\t0x04\t//retransmission and flow control\n#define L2CAP_CFG_TYPE_FCS\t\t0x05\n#define L2CAP_CFG_TYPE_EFS\t\t0x05\t//extended flow specification\n#define L2CAP_CFG_TYPE_EWS\t\t0x06\t//extended window size\nstruct l2cap_sig_cfg_opt_hdr{\n    byte type;\n    byte len;\n}__attribute__ ((packed));\n\nstruct l2cap_sig_cfg_opt_mtu {\n\n    uint16 mtu;\n}__attribute__ ((packed));\nstruct l2cap_sig_cfg_opt_flushto {\n    \n    uint16 flushto;\n}__attribute__ ((packed));\n\n#define L2CAP_QOS_NO_TRAFFIC\t\t0x00\n#define L2CAP_QOS_BEST_EFFORT\t\t0x01\n#define L2CAP_QOS_GUARANTEED\t\t0x02    \nstruct l2cap_sig_cfg_opt_qos {\n   \n    byte\t flags;\n    byte     service_type;\n    uint32  token_rate;\n    uint32  token_size;\n    uint32  bandwidth;\n    uint32  latency;\n    uint32  delay_variation;    \n}__attribute__ ((packed));\n\n#define L2CAP_MODE_BASE 0\n#define L2CAP_MODE_RETRANSMISSION 1\n#define L2CAP_MODE_FLOWCONTROL  2   \n#define L2CAP_MODE_ENHANCED_RETRANSMISSION\t3\n#define L2CAP_MODE_STREAMING\t4\nstruct l2cap_sig_cfg_opt_rfc {\n\n    byte     mode;\n    byte      txwindow;\n    byte      maxtransmit;\n    uint16   retransmission_timeout;\n    uint16   monitor_timeout;\n    uint16   mps;\n}__attribute__ ((packed));\n\n#define L2CAP_FCS_TYPE_NONE\t\t0x00\n#define L2CAP_FCS_TYPE_16_BIT\t\t0x01\nstruct l2cap_sig_cfg_opt_fcs {\n\tbyte type;\n}__attribute__ ((packed));\n\nstruct l2cap_sig_disconn_req {\n\n    uint16 dcid;\n    uint16 scid;\n}__attribute__ ((packed));\n\nstruct l2cap_sig_disconn_rsp {\n    uint16 dcid;\n    uint16 scid;\n}__attribute__ ((packed));\n\n#define L2CAP_INFOTYPE_CONNLESS_MTU         0x01\n#define L2CAP_INFOTYPE_EXTENED_FEATURE   0x02\nstruct l2cap_sig_info_req {\n    uint16 infotype;\n}__attribute__ ((packed));\n\n#define L2CAP_INFOTYPE_SUCCESS              0x00\n#define L2CAP_INFOTYPE_NOT_SUPPORT      0x01\n\n#define L2CAP_INFOTYPE_SUPPORT_FLOWCONTROL_MASK         0x01\n#define L2CAP_INFOTYPE_SUPPORT_RETRANSMISSION_MASK     0x02\n#define L2CAP_INFOTYPE_SUPPORT_BIQOS_MASK                       0x04\nstruct l2cap_sig_info_rsp {\n    uint16 infotype;\n    uint16 result;\n    /*if result == success, data: mtu(2 bytes), feature mask(4 bytes) */\n    uint32 mask;\n}__attribute__ ((packed));\n\n//supported extern features by l2cap\n#define L2CAP_EXFEATURE_FLOW_CONTROL        (1<<0)\n#define L2CAP_EXFEATURE_RETRANS_MODE        (1<<1)\n#define L2CAP_EXFEATURE_BIDIRECT_QOS        (1<<2)\n#define L2CAP_EXFEATURE_ENHANCED_RETRANS    (1<<3)\n#define L2CAP_EXFEATURE_STREAMING_MODE      (1<<4)\n#define L2CAP_EXFEATURE_FCS_OPTIONS         (1<<5)\n#define L2CAP_EXFEATURE_EXT_FLOW_SPEC       (1<<6)\n#define L2CAP_EXFEATURE_FIXED_CHANNELS      (1<<7)\n#define L2CAP_EXFEATURE_EXT_WINDOW_SIZE     (1<<8)\n#define L2CAP_EXFEATURE_UCD_RECEPTION       (1<<9)\n\n#define L2CAP_SIG_CFG_MTU_MASK                  (1<<0)\n#define L2CAP_SIG_CFG_FLUSHTO_MASK          (1<<1)\n#define L2CAP_SIG_CFG_QOS_MASK                  (1<<2)\n#define L2CAP_SIG_CFG_RFC_MASK                   (1<<3)\n#define L2CAP_SIG_CFG_FCS_MASK                   (1<<4)\n\nstruct config_in_t {\n    uint8  cfgin_flag;\n    struct l2cap_sig_cfg_opt_mtu mtu_local;\n    struct l2cap_sig_cfg_opt_flushto flushto_remote;\n    struct l2cap_sig_cfg_opt_qos qos_remote;\n    struct l2cap_sig_cfg_opt_rfc rfc_local;\n    struct l2cap_sig_cfg_opt_fcs fcs_remote;\n};\n\nstruct config_out_t {\n    uint8 cfgout_flag;\n    struct l2cap_sig_cfg_opt_mtu mtu_remote;\n    struct l2cap_sig_cfg_opt_flushto flushto_local;\n    struct l2cap_sig_cfg_opt_qos qos_local;\n    struct l2cap_sig_cfg_opt_rfc rfc_remote;\n    struct l2cap_sig_cfg_opt_fcs fcs_local;\n};\n\n#define L2C_NOTIFY_RESULT_ACCEPT (0)\n#define L2C_NOTIFY_RESULT_REJECT (1)\n#define L2C_NOTIFY_RESULT_UPPER_LAYER_HANDLED (2)\n\nstruct l2cap_registered_psm_item_t {\n    struct list_node list;\n    uint16 psm;\n    int8 conn_count;    /*how many conn can be created*/\n    int (*l2cap_notify_callback)(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason);\n    void (*l2cap_datarecv_callback)(uint32 l2cap_handle, struct pp_buff *ppb);\n};\n\nenum l2cap_channel_state_enum {\n    L2CAP_CLOSE,                /*baseband connection closed, wait for hci conn openning, and then can send out conn request signal*/\n    L2CAP_WAIT_DISCONNECT,\n    L2CAP_WAITING,              /* waitf for the baseband connection to send out conn req signal */\n    L2CAP_AUTH_PENDING, /* waiting for baseband authentication or encryption */\n    L2CAP_WAIT_CONNECTION_RSP,\n    L2CAP_WAIT_CONFIG,\n    L2CAP_WAIT_CONFIG_REQ_RSP,\n    L2CAP_WAIT_CONFIG_RSP, \n    L2CAP_WAIT_CONFIG_REQ,\n    L2CAP_OPEN\n};\n\nstruct l2cap_channel{\n    struct list_node list;\n\n    struct l2cap_conn *conn;\n\n\n    uint32 l2cap_handle;\n\n    uint16 scid;\n    uint16 dcid;\n    uint16 psm_remote;\n\n    uint8 used;         /* channel used or not*/\n    uint8 initiator;    /* local or peer initate l2cap channel*/\n    uint8 sigid_last_send;   /*to save our last request signal id*/\n    uint8 sigid_last_recv;  /*to save the last remote's request signal id*/\n\n    //max co timer num is less than 255 in our stack,so just one byte is ok\n    uint8 disconnect_req_timeout_timer;/*to avoid disconnect req not response,so we need to give a timeout flag*/\n    uint8 close_delay_timer;\n    uint8 wait_conn_req_timer;\n    uint8 wait_config_req_timer;\n\n    uint8 disconnect_req_reason;\n    /* for config req and resp */\n    uint8 wait_cfg_req_done;\n    struct config_in_t cfgin;\n    struct config_out_t cfgout;\n\n\n    enum l2cap_channel_state_enum state;\n    \n    int (*l2cap_notify_callback)(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason);\n    void (*l2cap_datarecv_callback)(uint32 l2cap_handle, struct pp_buff *ppb);\n#if SUPPORT_L2CAP_ENHANCED_RETRANS==1\n    struct l2cap_enhanced_channel *eChannel;\n    uint8 channel_mode;\n#endif\n};\n\nstruct l2cap_conn {\n    struct list_node list;\n    struct bdaddr_t remote;\n    uint16 conn_handle;\n    uint8 sigid;\n    uint8 inuse;\n\n    uint8 disconnect_by_acl;\n    uint8 disconnect_reason;\n    uint8 delay_free_conn_timer;\n\n    struct list_node channels;\n    struct l2cap_channel l2c_channel_array[L2CAP_CHANNEL_NUM_PER_LINK];\n};\n\nstruct l2cap_conn_req_param_t {\n    uint16 conn_handle;\n    uint16 remote_scid;\n    uint16 psm;\n    uint8 identifier;\n    struct bdaddr_t remote_addr;\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nstruct l2cap_channel * l2cap_accept_conn_req(struct l2cap_conn_req_param_t* req);\nvoid l2cap_reject_conn_req(struct l2cap_conn_req_param_t* req, uint16 reason);\n\nint8 l2cap_send_frame_done(uint16 conn_handle, struct pp_buff *ppb);\nuint8* l2cap_make_sig_req(struct l2cap_channel *channel,uint8 sig_code,uint16 sig_datalen,struct pp_buff *ppb);\nstruct l2cap_conn *l2cap_conn_search_conn_handle(uint16 conn_handle);\nstruct l2cap_channel *l2cap_channel_search_l2cap_conn(struct l2cap_conn * conn, uint16 psm);\nuint16 l2cap_get_conn_handle(struct bdaddr_t *bdaddr);\nvoid l2cap_channel_add_new(struct l2cap_conn *conn,struct l2cap_channel *channel);\nstruct l2cap_channel *l2cap_channel_search_scid(struct l2cap_conn *conn, uint16 scid);\nstruct l2cap_channel *l2cap_channel_search_psm(struct l2cap_conn *conn, uint16 psm);\n//uint32 l2cap_save_channel_ctx(uint8 *ctxs_buffer, uint16 mobile_handle);\n//uint32 l2cap_set_channels_ctx(uint8 *ctxs_buffer, uint8 dev_tbl_idx);\nstruct l2cap_channel *l2cap_channel_malloc(struct l2cap_conn *conn,uint16 psm,uint16 scid);\nvoid l2cap_channel_free(struct l2cap_channel *channel);\nvoid l2cap_find_and_free_pending_avdtp_channel(struct bdaddr_t* remote);\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __L2CAP_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/l2cap_er.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n\n#ifndef __L2CAP_ER_H__\n#define __L2CAP_ER_H__\n\n#include \"l2cap.h\"\n#include \"co_ppbuff.h\"\n\n#if SUPPORT_L2CAP_ENHANCED_RETRANS==1\n\n/* retransmission and flow control options for enhanced retransmission mode */\n#define L2CAPE_RFC_TXWINDOW\t\t\t\t\t5 //in enhanced retransmission mode, this value should be between 1 and 63. 10 is just a reference, need to be modified.\n#define L2CAPE_RFC_MAXTRANSMIT\t\t\t\t3\n#define L2CAPE_RFC_RETRANSMISSION_TIMEOUT\t2000\n#define L2CAPE_RFC_MONITOR_TIMEOUT\t\t\t12000\n#define L2CAPE_RFC_MPS\t\t\t\t\t\t\t666//666L2CAP_CFG_MTU - L2CAPE_CONTROL_LEN - L2CAPE_SDULEN_LEN - L2CAPE_FCS_LEN\n\n#define L2CAPE_CONTROL_LEN\t2\n#define L2CAPE_SDULEN_LEN\t\t2\n#define L2CAPE_FCS_LEN\t\t\t2\n#define L2CAPE_PPB_RESERVE\t(L2CAPE_CONTROL_LEN+L2CAP_PPB_RESERVE)\t//in our design SAR is always 00, so L2CAPE_SDULEN_LEN is useless\n\n#define L2CAPE_STATE_XMIT\t\t\t0x00\n#define L2CAPE_STATE_WAIT_F\t\t0x01\n\n#define L2CAPE_STATE_RECV\t\t\t0x00\n#define L2CAPE_STATE_REJ_SEND\t\t0x01\n#define L2CAPE_STATE_SREJ_SEND\t0x02\n\n#define L2CAPE_FLAG_REMOTE_BUSY\t(1<<0)\n#define L2CAPE_FLAG_LOCAL_BUSY\t(1<<1)\n#define L2CAPE_FLAG_RNR_SENT\t\t(1<<2)\n/* After S-frame with P-bit set, a rej frame with F-bit is 0 was received before receive a frame with F-bit is set, this flag will be set. */\n#define L2CAPE_FLAG_REJ_ACTIONED\t(1<<3)\n#define L2CAPE_FLAG_SREJ_ACTIONED\t(1<<4)\n#define L2CAPE_FLAG_SEND_REJ\t\t(1<<5)\n#define L2CAPE_FLAG_F_BIT_SET\t\t(1<<6)\t//indicate the bit in received frame\n#define L2CAPE_FLAG_P_BIT_SET\t\t(1<<7)\n#define L2CAPE_FLAG_FCS_USED\t\t(1<<8)\n#define L2CAPE_FLAG_SET_F_BIT\t\t(1<<9)\t//indicate the bit will be set or not in sending frame\n#define L2CAPE_FLAG_SET_P_BIT\t\t(1<<10)\n#define L2CAPE_FLAG_SEND_ACK\t\t(1<<11)\t//when receive SAR_UNSEG or SAR_END, this bit is set\n\n#define L2CAPE_SREJ_SUPPORTED\t\tFALSE\n\n#define L2CAPE_EVENT_DATA_REQUEST\t\t\t0x00\n#define L2CAPE_EVENT_LOCAL_BUSY_DETECTED\t0x01\n#define L2CAPE_EVENT_LOCAL_BUSY_CLEAR\t\t0x02\n#define L2CAPE_EVENT_RECV_REQSEQ_F\t\t\t0x03\n#define L2CAPE_EVENT_RECV_F\t\t\t\t\t0x04\n#define L2CAPE_EVENT_RETRANSMIT_EXPIRED\t0x05\n#define L2CAPE_EVENT_MONITOR_EXPIRED\t\t0x06\n#define L2CAPE_EVENT_RECV_I_FRAME\t\t\t0x07\n#define L2CAPE_EVENT_RECV_RR\t\t\t\t0x08\n#define L2CAPE_EVENT_RECV_REJ\t\t\t\t0x09\n#define L2CAPE_EVENT_RECV_RNR\t\t\t\t0x0A\n#define L2CAPE_EVENT_RECV_SREJ\t\t\t\t0x0B\n\n#define L2CAPE_SAR_UNSEG\t\t0x00\n#define L2CAPE_SAR_START\t\t0x01\n#define L2CAPE_SAR_END\t\t\t0x02\n#define L2CAPE_SAR_CONTINUE\t0x03\n\n#define L2CAPE_SFRAME_TYPE_RR\t\t0x00\n#define L2CAPE_SFRAME_TYPE_REJ\t0x01\n#define L2CAPE_SFRAME_TYPE_RNR\t0x02\n#define L2CAPE_SFRAME_TYPE_SREJ\t0x03\n\nstruct l2cap_enhanced_control_i {\n\tuint32 i_bit:1;\n\tuint32 txSeq:6;\n\tuint32 f_bit:1;\n\tuint32 reqSeq:6;\n\tuint32 sar:2;\n}__attribute__ ((packed));\n\nstruct l2cap_enhanced_control_s {\n\tuint32 s_bit:1;\n\tuint32 reserve1:1;\n\tuint32 type:2;\n\tuint32 p_bit:1;\n\tuint32 reserve2:2;\n\tuint32 f_bit:1;\n\tuint32 reqSeq:6;\n\tuint32 reserve3:2;\n}__attribute__ ((packed));\n\n/* this struct is used to store sending data, we don't support segment, so sequence is always 0 */\nstruct l2cap_enhanced_packet {\n\tstruct pp_buff *ppb;\t\t//a whole frame before segmented is stored in this ppb\n\tstruct l2cap_enhanced_packet *next;\n\tstruct l2cap_enhanced_control_i *i_frame;\n\t//uint8 sequence;\t\t\t\t//the position of this packet in the origion frame\n};\n\nunion l2cap_enhanced_control {\n\tvoid *arg;\n\tstruct l2cap_enhanced_control_i *i_frame;\n\tstruct l2cap_enhanced_control_s *s_frame;\n};\n\nstruct l2cap_enhanced_channel {\n\tuint32 flags;\n\tuint8 tx_state;\n\tuint8 rx_state;\n\n\tuint8 maxRxWindow;\n\tuint8 maxTransmit;\n\tuint16 retransTimeout;\n\tuint16 monitorTimeout;\n\tuint16 sendAckTimeout;\n\tuint8 retransTimer;\n\tuint8 monitorTimer;\n\tuint8 sendAckTimer;\n\n\t/* sending peer variables and sequence numbers */\n\tuint8 maxTxWindow;\n\tuint8 nextTxSeq;\t\t//the next I-frame to be transmitted\n\tuint8 expectedAckSeq;\t//the next I-frame expected to be acknowledged by receiving peer\n\tuint8 unackedFrames;\t//holds the number of unacknowledged I-frames\n\tstruct l2cap_enhanced_packet *sendingList;\t\t//hold the unacknowledged I-frames and pending I-frames\n\tstruct l2cap_enhanced_packet *pendingList;\t\t//hold the pending I-frames, it is a member of sendingList\n\tuint8 retryIframes[64];\t//holds a retry counter for each I-frame that is sent within the receiving device's TxWindow\n\t//uint8 pendingFrames;\t//holds the number of pending I-frames\n\t//struct pp_buff *send_buf;\t//it's used as a queue, and store encapsulated data can be sent directly by __l2cap_send_data_ppb\n\tuint8 retryCount;\t\t//holds the number of times an S-frame operation is retried\n\t//uint8 framesSent;\n\n\t/* receiving peer variables and sequence numbers */\n\tuint8 txSeqRx;\t\t\t//the sequence of new I-frame\n\tuint8 reqSeqRx;\t\t\t//the sequence number in an acknowledgement frame to request I-frame with TxSeq=ReqSeq and acknowledge receipt of I-frames up to and including (ReqSeq-1)\n\tuint8 expectedTxSeq; \t//the value of TxSeq expected in the next I-frame\n\tuint8 lastAckSeq;\n\t//uint8 bufferSeq;\t\t//in this design, bufferSeq-1 is used as lastAckSeq\n\tuint8 currentRxWindow;\n\tuint8 bufferSeqSrej;\n\tuint8 srejSaveReqSeq;\n\tstruct pp_buff *recv_buf;\t//the latest received ppb buffer\n\tstruct pp_buff *seg_buf;\t//when the SDU is segmented, we use this buffer to do reassemble\n\n\tunion l2cap_enhanced_control control_field;\n};\n\nstruct pp_buff *l2cap_enre_data_ppb_alloc(struct l2cap_channel *channel, uint32 len);\nvoid l2cap_enre_free_channel(struct l2cap_enhanced_channel *eCh);\nint8 l2cap_enre_send_data_ppb(struct l2cap_channel *channel, struct pp_buff *ppb);\nvoid l2cap_enre_receive_data(struct l2cap_channel *channel, struct pp_buff *ppb);\nuint8 l2cap_enre_channel_add_new(struct l2cap_channel *channel);\n\n#endif\t//if SUPPORT_L2CAP_ENHANCED_RETRANS==1\n\n#endif /* __L2CAP_ER_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/l2cap_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __L2CAP_I_H__\n#define __L2CAP_I_H__\n\n#include \"co_ppbuff.h\"\n#include \"btlib_type.h\"\n#include \"btm_i.h\"\n#include \"data_link.h\"\n\n#define PSM_SDP              0x0001\n#define PSM_RFCOMM           0x0003\n#define PSM_BNEP             0x000F\n#define PSM_HID_CTRL         0x0011\n#define PSM_HID_INTR         0x0013\n#define PSM_UPNP             0x0015\n#define PSM_AVCTP            0x0017\n#define PSM_AVDTP            0x0019\n#define PSM_AVCTP_BROWSING   0x001B\n#define PSM_ATT              0x001F\n#define PSM_BESAUD           0x0033\n\n#define L2CAP_BESAUD_EXTRA_CHAN_ID 0x0b0e\n\nenum l2cap_event_enum {\n    L2CAP_CHANNEL_CONN_REQ,\n    L2CAP_CHANNEL_OPENED,\n    L2CAP_CHANNEL_NEW_OPENED,\n    L2CAP_CHANNEL_TX_HANDLED,\n    L2CAP_CHANNEL_CLOSED,\n};\n\nstruct l2cap_ctx_input {\n    struct ctx_content ctx;\n    struct bdaddr_t *remote;\n    uint32 l2cap_handle;\n    uint16 conn_handle;\n    int (*l2cap_notify_callback)(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason);\n    void (*l2cap_datarecv_callback)(uint32 l2cap_handle, struct pp_buff *ppb);\n};\n\nstruct l2cap_ctx_output {\n    uint32 l2cap_handle;\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint8 l2cap_init ( void );\n\n\nint8 l2cap_register  (uint16 psm, \n                      int8 l2cap_conn_count_max, \n                      int (*l2cap_notify_callback)(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason),\n                      void (*l2cap_datarecv_callback)(uint32 l2cap_handle, struct pp_buff *ppb)\n                      );\n\n\nuint32 l2cap_open (struct bdaddr_t *remote, \n                    uint16 psm, \n                    int (*l2cap_notify_callback)(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason),\n                    void (*l2cap_datarecv_callback)(uint32 l2cap_handle, struct pp_buff *ppb)\n                    );\n\nvoid l2cap_create_besaud_extra_channel(void* remote, uint16_t channel_id,\n    int (*notify_callback)(enum l2cap_event_enum event, uint32 l2cap_handle, void *pdata, uint8 reason),\n    void (*datarecv_callback)(uint32 l2cap_handle, struct pp_buff *ppb));\n\nint8 l2cap_close (uint32 l2cap_handle);\n\nstruct pp_buff *l2cap_data_ppb_alloc(uint32 l2cap_handle, uint32 datalen);\n\nint8 l2cap_send_data_link(uint32 l2cap_handle, struct data_link *head, void *context);\n\nint8 l2cap_send_data_ppb( uint32 l2cap_handle, struct pp_buff *ppb);\n\nint8 l2cap_send_data_auto_fragment(uint32 l2cap_handle, const uint8* data, uint32 len, void *context);\n\nint8 l2cap_send_data( uint32 l2cap_handle, uint8 *data, uint32 datalen, void *context);\n\nint8 l2cap_unregister(uint16 psm);\n\nint8 l2cap_close_delay (uint32 l2cap_handle, int delay_sec);\n\nint32 l2cap_get_tx_mtu(uint32 l2cap_handle);\n\nconst char *l2cap_event2str(enum l2cap_event_enum event);\nconst char *l2cap_psm2str(uint32 psm);\n\n/* below is called by lower layer (btm) */\nvoid l2cap_btm_notify_callback(enum btm_l2cap_event_enum event, uint16 conn_handle, void *pdata, uint8 reason);\nvoid l2cap_btm_datarecv_callback (uint16 conn_handle, struct pp_buff *ppb);\n\nint8 l2cap_send_frame(uint16 conn_handle, struct pp_buff *ppb);\n\nstruct bdaddr_t *l2cap_get_conn_remote_addr(uint32 l2cap_handle);\nstruct l2cap_channel *l2cap_channel_search_l2caphandle(uint32 l2cap_handle);\n\nuint32 l2cap_save_ctx(uint32 l2cap_handle, uint8_t *buf, uint32_t buf_len);\nuint32 l2cap_restore_ctx(struct l2cap_ctx_input *input, struct l2cap_ctx_output *output);\n\nvoid l2cap_pts_send_disconnect_channel(void);\nvoid l2cap_pts_send_l2cap_data(void);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __L2CAP_I_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/map_bmessage_builder.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef MAP_BMESSAGE_BUILDER_H_INCLUDED\n#define MAP_BMESSAGE_BUILDER_H_INCLUDED\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n//------ 20191129 MAP_SPEC_V11 ------//\n//------ This is simple version : ASCII as UTF8 ------//\n\n//------ MAP_SPEC_V11 3.1.3 Message format (x-bt/message) ------//\n//------ VAR - VARIABLE, VAL - VALUE ------//\n#define MAP_BMSG_CRLF                               \"\\r\\n\"\n#define MAP_BMSG_object_BEGIN                       \"BEGIN:BMSG\\r\\n\"\n#define MAP_BMSG_object_END                         \"END:BMSG\\r\\n\"\n#define MAP_BMSG_version_VAR                        \"VERSION:\"\n#define MAP_BMSG_readstatus_VAR                     \"STATUS:\"\n#define MAP_BMSG_type_VAR                           \"TYPE:\"\n#define MAP_BMSG_folder_VAR                         \"FOLDER:\"\n#define MAP_BMSG_envelope_BEGIN                     \"BEGIN:BENV\\r\\n\"\n#define MAP_BMSG_envelope_END                       \"END:BENV\\r\\n\"\n#define MAP_BMSG_content_BEGIN                      \"BEGIN:BBODY\\r\\n\"\n#define MAP_BMSG_content_END                        \"END:BBODY\\r\\n\"\n#define MAP_BMSG_body_part_id_VAR                   \"PARTID:\"\n#define MAP_BMSG_body_encoding_property_VAR         \"ENCODING:\"\n#define MAP_BMSG_body_charset_property_VAR          \"CHARSET:\"\n#define MAP_BMSG_body_language_property_VAR         \"LANGUAGE:\"\n#define MAP_BMSG_body_content_length_property_VAR   \"LENGTH:\"\n#define MAP_BMSG_body_content_BEGIN         \"BEGIN:MSG\\r\\n\"\n#define MAP_BMSG_body_content_END           \"END:MSG\\r\\n\"\n\n#define MAP_BMSG_version_VAL_10                     \"1.0\\r\\n\"\n#define MAP_BMSG_readstatus_VAL_READ                \"READ\\r\\n\"\n#define MAP_BMSG_readstatus_VAL_UNREAD              \"UNREAD\\r\\n\"\n#define MAP_BMSG_type_VAL_EMAIL                     \"EMAIL\\r\\n\"\n#define MAP_BMSG_type_VAL_SMS_GSM                   \"SMS_GSM\\r\\n\"\n#define MAP_BMSG_type_VAL_SMS_CDMA                  \"SMS_CDMA\\r\\n\"\n#define MAP_BMSG_type_VAL_MMS                       \"MMS\\r\\n\"\n#define MAP_BMSG_body_encoding_VAL_8BIT             \"8BIT\\r\\n\"\n#define MAP_BMSG_body_encoding_VAL_G7BIT            \"G-7BIT\\r\\n\"\n\n#define MAP_BMSG_vcard_BEGIN                        \"BEGIN:VCARD\\r\\n\"\n#define MAP_BMSG_vcard_END                          \"END:VCARD\\r\\n\"\n#define MAP_BMSG_vcard_version_VAR                  \"VERSION:\"\n#define MAP_BMSG_vcard_name_VAR                     \"N:\"\n#define MAP_BMSG_vcard_tel_VAR                      \"TEL:\"\n#define MAP_BMSG_vcard_email_VAR                    \"EMAIL:\"\n\ntypedef struct {\n    uint8 *buff;\n    uint32 buff_len;\n    uint32 msg_len;\n} map_bmsg_t;\n\n#define BMSG_BEGIN(bmsg) \\\n    { \\\n        map_bmsg_t *__bmsg = bmsg;\n\n#define BMSG_ADD(str) \\\n    map_bmsg_builder_add(__bmsg,(const char *)str,strlen((char *)str))\n\n#define BMSG_ADD_BUFF(buff,buff_len) \\\n    map_bmsg_builder_add(__bmsg,buff,buff_len)\n\n#define BMSG_END() \\\n    }\n\nint32 map_bmsg_builder_init(map_bmsg_t *bmsg, uint8 *buff, uint32 buff_len);\nint32 map_bmsg_builder_add(map_bmsg_t *bmsg, const char *buff, uint32 buff_len);\nuint32 map_bmsg_builder_get_length(map_bmsg_t *bmsg);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // MAP_BMESSAGE_BUILDER_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/map_protocol.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef MAP_PROTOCOL_H_INCLUDED\n#define MAP_PROTOCOL_H_INCLUDED\n\n#include \"obex_tlv.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n//------ MAP_SPEC_V10 5.3.2 Flags and Name ------//\ntypedef unsigned int map_obex_flag_t;\n#define map_obex_flag_GoBackToRoot (0x02)\n#define map_obex_flag_GoDown1Level (0x02)\n#define map_obex_flag_GoUp1Level   (0x03)\n\n//------ MAP_SPEC_V10 6.3.1 Application Parameters Header ------//\n#define map_appparam_tlv_ID_Transparent     (0x0B)\n#define map_appparam_tlv_ID_Retry           (0x0C)\n#define map_appparam_tlv_ID_Charset         (0x14)\n#define map_appparam_tlv_VAL_Charset_native (0x00)\n#define map_appparam_tlv_VAL_Charset_UTF8   (0x01)\n\n//------ INTERACES : all in one now -------/\n#define map_appparam_tlv_add_Transparent(tlv,val) \\\n    obex_tlv_add_1Byte(tlv, map_appparam_tlv_ID_Transparent, val)\n\n#define map_appparam_tlv_add_Retry(tlv,val) \\\n    obex_tlv_add_1Byte(tlv, map_appparam_tlv_ID_Retry, val)\n\n#define map_appparam_tlv_add_Charset(tlv,val) \\\n    obex_tlv_add_1Byte(tlv, map_appparam_tlv_ID_Charset, val)\n\ntypedef enum {\n    MAP_BMSG_TYPE_EMAIL = 0,\n    MAP_BMSG_TYPE_SMS_GSM, // 1\n    MAP_BMSG_TYPE_SMS_CDMA, // 2\n    MAP_BMSG_TYPE_MMS, // 3\n} map_bmessage_type_t;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // MAP_PROTOCOL_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/map_sdp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef MAP_SDP_H_INCLUDED\n#define MAP_SDP_H_INCLUDED\n\n#include \"bt_common.h\"\n#include \"bt_co_list.h\"\n#include \"btlib_type.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum {\n    MAP_SDP_EVT_SUCCESS = 0,\n    MAP_SDP_EVT_NOT_FOUND, // 1\n    MAP_SDP_EVT_CONNECT_FAIL, // 2\n    MAP_SDP_EVT_CONNECT_CLOSE, // 3\n} map_sdp_event_t;\n\ntypedef struct {\n    uint32 rfcomm_channel;\n    uint32 l2cap_psm;\n    uint16 profile_version;\n    uint8 mas_instance_id;\n    uint8 supported_message_types;\n    uint32 map_supported_features;\n} map_sdp_server_property_t;\n\ntypedef struct {\n    union {\n        struct {\n            map_sdp_server_property_t property;\n        } success;\n        struct {\n            uint8 reason;\n        } connect_fail;\n    } u;\n} map_sdp_callback_param;\n\ntypedef int32 (*map_sdp_callback_t)(map_sdp_event_t event, map_sdp_callback_param *cb_param, void *priv);\n\nint32 map_sdp_request(struct bdaddr_t *remote, void *priv);\nint32 map_sdp_register(map_sdp_server_property_t *property);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // MAP_SDP_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/map_session.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef MAP_SESSION_H_INCLUDED\n#define MAP_SESSION_H_INCLUDED\n\n#include \"obex_session.h\"\n#include \"map_protocol.h\"\n#include \"map_bmessage_builder.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define MAP_SESSION_FOLDER_LEVEL_MAX (32)\n#define MAP_MAX_PACKET_LENGTH (512)\n#define MAP_OBEX_VERSION (0x10)\n\ntypedef enum {\n    MAP_SESSION_TYPE_MAS = 0,\n    MAP_SESSION_TYPE_MNS, // 1\n} map_session_type_t;\n\ntypedef struct {\n    map_session_type_t type;\n    obex_session_role_t obex_role;\n} map_session_config_t;\n\ntypedef enum {\n    MAP_FUNC_NONE = 0,\n    MAP_FUNC_SendEvent,\n    MAP_FUNC_SetNotificationRegistration,\n    MAP_FUNC_SetFolder,\n    MAP_FUNC_GetFolderListing,\n    MAP_FUNC_GetMessagesListing,\n    MAP_FUNC_GetMessage,\n    MAP_FUNC_SetMessageStatus,\n    MAP_FUNC_PushMessage,\n    MAP_FUNC_UpdateInbox,\n} map_session_function_t;\n\ntypedef struct {\n    union {\n        struct {\n            uint32 bmsg_offset;\n        } PushMessage;\n        struct {\n            uint8 level;\n        } SetFolder;\n    } state;\n} map_session_function_state_t;\n\ntypedef enum {\n    MAP_SESSION_ERR_NO_ERROR = 0,\n    MAP_SESSION_ERR_SDP_REQUEST_FAIL, // 1\n    MAP_SESSION_ERR_CHANNEL_CLOSE, // 2\n} map_session_error_t;\n\ntypedef struct {\n    union {\n        struct {\n            map_session_error_t error;\n            uint8 error_detail;\n        } close;\n        struct {\n            uint8 *packet;\n            uint32 packet_len;\n        } data;\n        struct {\n            struct bdaddr_t *remote;\n        } open;\n    } p;\n} map_session_cb_param_t;\n\ntypedef enum {\n    MAP_SESSION_EVENT_OPEN_IND = 0,\n    MAP_SESSION_EVENT_OPEN, // 1\n    MAP_SESSION_EVENT_CLOSE, // 2\n} map_session_event_t;\n\ntypedef enum {\n    MAP_SESSION_STATE_CLOSE = 0,\n    MAP_SESSION_STATE_SDP_REQUESTING, // 1\n    MAP_SESSION_STATE_OPENING, // 2\n    MAP_SESSION_STATE_CONNECTING, // 3\n    MAP_SESSION_STATE_OPEN, // 4\n    MAP_SESSION_STATE_CONNECTED, // 5\n} map_session_state_t;\n\nstruct _map_session_t;\n\ntypedef int32 (*map_session_event_handler_t)(struct _map_session_t *, map_session_event_t event, map_session_cb_param_t *param);\n\ntypedef struct {\n    union {\n        struct\n        {\n        } SendEvent;\n        struct\n        {\n        } SetNotificationRegistration;\n        struct\n        {\n            char *folder[MAP_SESSION_FOLDER_LEVEL_MAX];\n            uint8 folder_level;\n            uint8 up_level;\n        } SetFolder;\n        struct\n        {\n        } GetFolderListing;\n        struct\n        {\n        } GetMessagesListing;\n        struct\n        {\n        } GetMessage;\n        struct\n        {\n        } SetMessageStatus;\n        struct\n        {\n            char *folder;\n            uint32 folder_len;\n            char *msg_body;\n            uint32 msg_body_len;\n            uint8 retry;\n            uint8 transparent;\n            map_bmessage_type_t type;\n            char *originator_name;\n            uint32 originator_name_len;\n            char *originator_tel;\n            uint32 originator_tel_len;\n            char *receipt_name;\n            uint32 receipt_name_len;\n            char *receipt_tel;\n            uint32 receipt_tel_len;\n        } PushMessage;\n        struct\n        {\n        } UpdateInbox;\n    } p;\n} map_session_function_param_t;\n\ntypedef enum {\n    MAP_FUNC_ACTION_NONE = 0,\n    MAP_FUNC_ACTION_START,\n    MAP_FUNC_ACTION_STOP,\n    MAP_FUNC_ACTION_REQUEST,\n    MAP_FUNC_ACTION_RESPONSE,\n    MAP_FUNC_ACTION_CONNECTED,\n} map_session_function_action_t;\n\ntypedef struct {\n    void *priv;\n    union {\n        struct {\n            uint8 *packet;\n            uint32 packet_len;\n        } request;\n        struct {\n            uint8 *packet;\n            uint32 packet_len;\n        } response;\n    } p;\n} map_session_function_action_param_t;\n\ntypedef struct _map_session_t {\n    map_session_config_t config;\n    map_session_state_t state;\n    obex_session_t obex_session;\n    obex_transmission_t obex_transm;\n    struct sdp_request sdp_request;\n    map_sdp_callback_t sdp_callback;\n    map_sdp_server_property_t remote_server_property;\n    struct bdaddr_t remote;\n    map_session_event_handler_t event_handler;\n    uint8 transm_buffer[MAP_MAX_PACKET_LENGTH];\n    uint8 tlv_buffer[MAP_MAX_PACKET_LENGTH];\n    uint8 bmsg_buffer[MAP_MAX_PACKET_LENGTH];\n    map_bmsg_t bmsg;\n    map_session_function_t function;\n    map_session_function_param_t function_param;\n    map_session_function_state_t function_state;\n} map_session_t;\n\ntypedef void (*map_callback_t) (obex_session_cb_param_t * param, map_session_t * map_session);\n\nvoid map_callback_register(map_callback_t callback);\nint32 map_session_init(map_session_t *session, map_session_config_t *cfg, map_session_event_handler_t event_handler);\nint32 map_session_open(map_session_t *session, struct bdaddr_t *remote);\nint32 map_session_close(map_session_t *session);\nint32 map_session_exec_function(map_session_t *session, map_session_function_t func, map_session_function_param_t *param);\nint32 map_session_restore(map_session_t *session, uint32 conn_id,uint32 server_chnl);\nbool map_session_check_is_idle(map_session_t *map_session);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // MAP_SESSION_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/md5.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __MD5_H__\n#define __MD5_H__\n\n#include \"obex_i.h\"\n#include \"btlib_type.h\"\n\n#if OBEX_AUTHENTICATION == 1\n\ntypedef struct _xMD5Context {\n    uint32     buf[4];\n    uint32     bytes[2];\n    uint32     in[16];\n} xMD5Context;\n\nvoid MD5(void *dest, void *orig, uint16 len);\nvoid xMD5Init(xMD5Context * ctx);\nvoid xMD5Update(xMD5Context * ctx, const uint8 * buf, uint16 len);\nvoid xMD5Final(uint8 digest [ AUTH_NONCE_LEN ], xMD5Context * ctx);\n\n#endif\n\n#endif /* __MD5_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __OBEX_H__\n#define __OBEX_H__\n\n#include \"rfcomm_i.h\"\n\nenum obex_event_t{\n\tOBEX_EVENT_TP_CONNECTED,\n\tOBEX_EVENT_TP_DISCONNECTED,\n\tOBEX_EVENT_CONNECTED,\n\tOBEX_EVENT_DISCONNECTED,\n\tOBEX_EVENT_GET,\n\tOBEX_EVENT_SET_PATH,\n\tOBEX_EVENT_ABORT,\n\tOBEX_EVENT_SUCCESS,\n\tOBEX_EVENT_FAILED,\n\tOBEX_EVENT_TIMEOUT\n};\n\n#define OBEX_FINAL_BIT\t\t\t\t0x80\n\n#define OBEX_OPCODE_CONNECT\t\t0x00\n#define OBEX_OPCODE_DISCONNECT\t0x01\n#define OBEX_OPCODE_PUT\t\t\t0x02\n#define OBEX_OPCODE_GET\t\t\t0x03\n#define OBEX_OPCODE_SET_PATH\t\t0x05\n#define OBEX_OPCODE_ABORT\t\t\t0xFF\n\ntypedef uint8 obex_respcode;\n\n#define OBEX_RESP_CONTINUE\t\t\t\t0x10 /* Continue */\n#define OBEX_RESP_SUCCESS\t\t\t\t\t0x20 /* OK, Success */\n\n#define OBEX_RESP_CREATED\t\t\t\t\t0x21 /* Created */\n#define OBEX_RESP_ACCEPTED\t\t\t\t0x22 /* Accepted */\n#define OBEX_RESP_NON_AUTHOR_INFO\t\t\t0x23 /* Non-Authoritative Information */\n#define OBEX_RESP_NO_CONTENT\t\t\t\t0x24 /* No Content */\n#define OBEX_RESP_RESET_CONTENT\t\t\t0x25 /* Reset Content */\n#define OBEX_RESP_PARTIAL_CONTENT\t\t\t0x26 /* Partial Content */\n\n#define OBEX_RESP_MULTIPLE_CHOICES\t\t0x30 /* Multiple Choices */\n#define OBEX_RESP_MOVED_PERMANENT\t\t\t0x31 /* Moved Permanently */\n#define OBEX_RESP_MOVED_TEMPORARY\t\t\t0x32 /* Moved Temporarily */\n#define OBEX_RESP_SEE_OTHER\t\t\t\t0x33 /* See Other */\n#define OBEX_RESP_NOT_MODIFIED\t\t\t0x34 /* Not Modified */\n#define OBEX_RESP_USE_PROXY\t\t\t\t0x35 /* Use Proxy */\n\n#define OBEX_RESP_BAD_REQUEST\t\t\t\t0x40 /* Bad Request */\n#define OBEX_RESP_UNAUTHORIZED\t\t\t0x41 /* Unauthorized */\n#define OBEX_RESP_PAYMENT_REQUIRED\t\t0x42 /* Payment Required */\n#define OBEX_RESP_FORBIDDEN\t\t\t\t0x43 /* Forbidden - operation is understood but refused */\n#define OBEX_RESP_NOT_FOUND\t\t\t\t0x44 /* Not Found */\n#define OBEX_RESP_METHOD_NOT_ALLOWED\t\t0x45 /* Method Not Allowed */\n#define OBEX_RESP_NOT_ACCEPTABLE\t\t\t0x46 /* Not Acceptable */\n#define OBEX_RESP_PROXY_AUTHEN_REQ\t\t0x47 /* Proxy Authentication Required */\n#define OBEX_RESP_REQUEST_TIME_OUT\t\t0x48 /* Request Timed Out */\n#define OBEX_RESP_CONFLICT\t\t\t\t0x49 /* Conflict */\n\n#define OBEX_RESP_GONE\t\t\t\t\t\t0x4a /* Gone */\n#define OBEX_RESP_LENGTH_REQUIRED\t\t\t0x4b /* Length Required */\n#define OBEX_RESP_PRECONDITION_FAILED\t0x4c /* Precondition Failed */\n#define OBEX_RESP_REQ_ENTITY_TOO_LARGE\t0x4d /* Requested entity is too large */\n#define OBEX_RESP_REQ_URL_TOO_LARGE\t\t0x4e /* Requested URL is too large */\n#define OBEX_RESP_UNSUPPORT_MEDIA_TYPE\t0x4f /* Unsupported Media Type */\n\n#define OBEX_RESP_INTERNAL_SERVER_ERR\t0x50 /* Internal Server Error */\n#define OBEX_RESP_NOT_IMPLEMENTED\t\t\t0x51 /* Not Implemented */\n#define OBEX_RESP_BAD_GATEWAY\t\t\t\t0x52 /* Bad Gateway */\n#define OBEX_RESP_SERVICE_UNAVAILABLE\t0x53 /* Service Unavailable */\n#define OBEX_RESP_GATEWAY_TIMEOUT\t\t\t0x54 /* Gateway Timeout */\n#define OBEX_RESP_HTTP_VER_NO_SUPPORT\t0x55 /* HTTP version not supported */\n\n#define OBEX_RESP_DATABASE_FULL\t\t\t0x60 /* Database Full */\n#define OBEX_RESP_DATABASE_LOCKED\t\t\t0x61 /* Database Locked */\n\ntypedef uint8 obex_header;\n\n#define OBEX_HEADER_COUNT\t\t\t0xC0 /* (4-byte) Number of objects */\n#define OBEX_HEADER_NAME\t\t\t0x01 /* (Unicode) Object name */\n#define OBEX_HEADER_TYPE\t\t\t0x42 /* (ByteSeq) MIME type of object */\n#define OBEX_HEADER_LENGTH\t\t0xC3 /* (4-byte) Object length */\n#define OBEX_HEADER_TIME_ISO\t\t0x44 /* (ByteSeq, ISO 8601 format) Creation or modification time for object (preferred format). */\n#define OBEX_HEADER_TIME_COMPAT\t0xC4 /* (4-byte) Creation or modification time for object for backward-compatibility. */\n#define OBEX_HEADER_DESCRIPTION\t0x05 /* (Unicode) Text description of object */\n#define OBEX_HEADER_TARGET\t\t0x46 /* (ByteSeq) Target ID for operation */\n#define OBEX_HEADER_HTTP\t\t\t0x47 /* (ByteSeq) An HTTP 1.x header (URL for object) */\n#define OBEX_HEADER_BODY\t\t\t0x48 /* Not for use by OBEX applications */\n#define OBEX_HEADER_END_BODY\t\t0x49 /* Not for use by OBEX applications */\n#define OBEX_HEADER_WHO\t\t\t0x4A /* (ByteSeq) Who ID identifies service providing the object */\n#define OBEX_HEADER_CONNID\t\t0xCB /* (4-byte) Identifies the connection for which the operation is directed */\n#define OBEX_HEADER_APP_PARAMS\t0x4C /* (ByteSeq) Application parameters */\n#define OBEX_HEADER_AUTH_CHAL\t\t0x4D /* (ByteSeq) Authentication challenge */\n#define OBEX_HEADER_AUTH_RESP\t\t0x4E /* (ByteSeq) Authentication response */\n#define OBEX_HEADER_OBJECT_CLASS\t0x4F /* (ByteSeq)  OBEX Object class of object */\n\n#define MAX_OBEX_TX_BUF_LEN\t128\t\t//need to be confirm\n#define MAX_OBEX_PACKET_SIZE\t0x0200\t//need to be confirm, 512\n\n#define OBEX_CFG_SERVER_CHANNEL\t0x14\t//need to be confirm\n\nint8 obex_init(void (*indicate_callback)(enum obex_event_t event));\nint8 obex_close(void);\nvoid obex_rfcomm_notifyCallback(enum rfcomm_event_enum event, uint32 rfcomm_handle, void *pData, uint8 reason, void *priv);\nvoid obex_rfcomm_dataRecvCallback(uint32 rfcomm_handle, struct pp_buff *ppb, void *priv);\n//int8 obex_sendData(struct obex_client *client);\n\n#endif /* __OBEX_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex_ascii_unicode.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef OBEX_ASCII_UNICODE_H_INCLUDED\n#define OBEX_ASCII_UNICODE_H_INCLUDED\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/* IrDA Object Exchange Protocol IrOBEX 2.1 OBEX Headers */\n/*\nFor Unicode text, the length field (immediately following the header ID) includes the 2 bytes of the null\nterminator (0x00, 0x00). Therefore the length of the string Jumar would be 12 bytes; 5 visible\ncharacters plus the null terminator, each two bytes in length.\n*/\n\n/* It is not a real UNICODE. It is 2 bytes presentation of ASCII. */\n\nuint32 obex_ascii_to_unicode(uint8 *ascii, uint32 ascii_len_without_null, uint8 *unicode, uint32 unicode_len_with_null);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // OBEX_ASCII_UNICODE_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __OBEX_I_H__\n#define __OBEX_I_H__\n\n#include \"obex.h\"\n#include \"sdp.h\"\n\n#define OBEX_AUTHENTICATION\t0\n#define AUTH_NONCE_LEN\t\t\t16\n\ntypedef uint8 obex_opcode;\n\nenum obex_conn_state_enum{\n\tOBEX_TP_CONNECTING,\n\tOBEX_TP_CONNECTED,\n\tOBEX_TP_DISCONNECTING,\n\tOBEX_TP_DISCONNECTED\n};\n\nenum obex_state_enum{\n\tOBEX_IDLE,\n\tOBEX_STANDBY,\n\tOBEX_CONNECTING,\n\tOBEX_CONNECTED,\n\tOBEX_DISCONNECTING,\n\t//OBEX_DISCONNECTED,\n\tOBEX_GET,\n\tOBEX_ABORT,\n\tOBEX_SET_PATH\n};\n\n#define OBEX_FLAG_CONTINUE\t0x01\n#define OBEX_FLAG_CHALLENGE\t0x02\n\nstruct obex_client{\n\tuint8 flags;\n\tobex_opcode opcode;\n\t\n\tvoid (*indicate_cb)(enum obex_event_t event);\n\tvoid (*data_cb)(uint8 *data, uint16 len);\n\n\tuint8 *tx_buffer;\n\tuint16 tx_length;\n\t\n\tuint8 rfcomm_handle;\n};\n\nstruct obex_control_t{\n\tuint8_t timer_handle;\n\tstruct bdaddr_t remote;\n\t//uint8 rfcomm_handle;\n\n\tenum obex_conn_state_enum conn_state;\n\tenum obex_state_enum state;\n\n\t/*uint16 sendlen;\n\tchar sendData[OBEX_SENDDATA_BUF_SIZE];*/\n\n\tvoid (*indicate_cb)(enum obex_event_t event);\n\tvoid (*data_cb)(struct pp_buff *ppb);\n\n\tstruct obex_client *pbap_client;\n};\n\nint8 obex_turnOn(struct obex_client *client);\nint8 obex_turnOff(void);\nint8 obex_parse_tx(struct obex_client *client);\n\n#endif /* __OBEX_I_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex_if.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef OBEX_IF_H_INCLUDED\n#define OBEX_IF_H_INCLUDED\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // OBEX_IF_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex_protocol.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef OBEX_PROTOCOL_H_INCLUDED\n#define OBEX_PROTOCOL_H_INCLUDED\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define OBEX_HOST16_TO_BE(value,ptr) \\\n    *(ptr+0) = ((value)>>8)&0xFF; \\\n    *(ptr+1) = ((value))&0xFF\n\n#define OBEX_HOST16_TO_LE(value,ptr) \\\n    *(ptr+0) = ((value))&0xFF; \\\n    *(ptr+1) = ((value)>>8)&0xFF\n\n#define OBEX_BE_TO_HOST16(ptr) \\\n    (*(ptr+0))<<8|(*(ptr+1))\n\n#define OBEX_HOST32_TO_BE(value,ptr) \\\n    *(ptr+0) = ((value)>>24)&0xFF; \\\n    *(ptr+1) = ((value)>>16)&0xFF; \\\n    *(ptr+2) = ((value)>>8)&0xFF; \\\n    *(ptr+3) = ((value))&0xFF \\\n\n#define OBEX_HOST32_TO_LE(value,ptr) \\\n    *(ptr+0) = ((value))&0xFF; \\\n    *(ptr+1) = ((value)>>8)&0xFF; \\\n    *(ptr+2) = ((value)>>16)&0xFF; \\\n    *(ptr+3) = ((value)>>24)&0xFF \\\n\n#define OBEX_BE_TO_HOST32(ptr) \\\n    (*(ptr+0))<<24|(*(ptr+1))<<16|(*(ptr+2))<<8|(*(ptr+3))\n\n//----- Max 128 ASCII for 'Name' ... Unicode String ------//\n#define OBEX_UNICODE_STRING_SIZE_MAX (256)\n\n//------ GOEP_SPEC_V1.1 5.2 OBEX HEADERS ------//\ntypedef unsigned char obex_header_type_t;\n#define obex_header_type_UnicodeText          0x00\n#define obex_header_type_ByteSequence         0x40\n#define obex_header_type_1ByteQuality         0x80\n#define obex_header_type_4ByteQuality         0xC0\n\ntypedef unsigned char obex_header_id_t;\n\n#define obex_header_id_Count                  0xC0\n#define obex_header_id_Name                   0x01\n#define obex_header_id_Type                   0x42\n#define obex_header_id_Length                 0xC3\n#define obex_header_id_Time_ISO8601           0x44\n#define obex_header_id_Time_4byte             0xC4\n#define obex_header_id_Description            0x05\n#define obex_header_id_Target                 0x46\n#define obex_header_id_HTTP                   0x47\n#define obex_header_id_Body                   0x48\n#define obex_header_id_EndofBody              0x49\n#define obex_header_id_Who                    0x4A\n#define obex_header_id_ConnectionID           0xCB\n#define obex_header_id_ApplicationParameters  0x4C\n#define obex_header_id_AuthenticateChallenge  0x4D\n#define obex_header_id_AuthenticateResponse   0x4E\n#define obex_header_id_ObjectClass            0x4F\n\n//------ IrDA Object Exchange Protocol 3.3 OBEX Operations and Opcode definitions ------//\ntypedef unsigned char obex_operation_opcode_t;\n\n#define obex_opcode_CONNECT         0x80\n#define obex_opcode_DISCONNECT      0x81\n#define obex_opcode_PUT             0x02\n#define obex_opcode_GET             0x03\n#define obex_opcode_RESERVED        0x04\n#define obex_opcode_SETPATH         0x85\n#define obex_opcode_ABORT           0xFF\n#define obex_opcode_FINAL           0x80\n\n//------ IrDA Object Exchange Protocol 3.2.1 Response Code values ------//\ntypedef unsigned char obex_operation_response_code_t;\n\n#define obex_response_code_Continue                      0x10\n#define obex_response_code_OK_Success                    0x20\n#define obex_response_code_Created                       0x21\n#define obex_response_code_Accepted                      0x22\n#define obex_response_code_Non_Authoritative_Information 0x23\n#define obex_response_code_No_Content                    0x24\n#define obex_response_code_Reset_Content                 0x25\n#define obex_response_code_Partial_Content               0x26\n#define obex_response_code_Multiple_Choices              0x30\n#define obex_response_code_Moved_Permanently             0x31\n#define obex_response_code_Moved_temporarily             0x32\n#define obex_response_code_See_Other                     0x33\n#define obex_response_code_Not_modified                  0x34\n#define obex_response_code_Use_Proxy                     0x35\n#define obex_response_code_Bad_Request                   0x40\n#define obex_response_code_Unauthorized                  0x41\n#define obex_response_code_Payment_required              0x42\n#define obex_response_code_Forbidden                     0x43\n#define obex_response_code_Not_Found                     0x44\n#define obex_response_code_Method_not_allowed            0x45\n#define obex_response_code_Not_Acceptable                0x46\n#define obex_response_code_Proxy_Authentication_required 0x47\n#define obex_response_code_Request_Time_Out              0x48\n#define obex_response_code_Conflict                      0x49\n#define obex_response_code_Gone                          0x4A\n#define obex_response_code_Length_Required               0x4B\n#define obex_response_code_Precondition_failed           0x4C\n#define obex_response_code_Requeste_dentity_too_large    0x4D\n#define obex_response_code_Request_URL_too_large         0x4E\n#define obex_response_code_Unsupported_media_type        0x4F\n#define obex_response_code_Internal_Server_Error         0x50\n#define obex_response_code_Not_Implemented               0x51\n#define obex_response_code_Bad_Gateway                   0x52\n#define obex_response_code_Service_Unavailable           0x53\n#define obex_response_code_Gateway_Timeout               0x54\n#define obex_response_code_HTTP_version_not_supported    0x55\n#define obex_response_code_Database_Full                 0x60\n#define obex_response_code_Database_Locked               0x61\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // OBEX_PROTOCOL_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex_session.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef OBEX_SESSION_H_INCLUDED\n#define OBEX_SESSION_H_INCLUDED\n\n#include \"bt_common.h\"\n#include \"bt_co_list.h\"\n#include \"obex_protocol.h\"\n#include \"obex_transmission.h\"\n#include \"obex_transportlayer.h\"\n#include \"map_sdp.h\"\n#include \"sdp.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\ntypedef enum {\n    OBEX_SESSION_EVT_OPEN_IND = 0,\n    OBEX_SESSION_EVT_OPEN, // 1\n    OBEX_SESSION_EVT_REQUEST, // 2\n    OBEX_SESSION_EVT_RESPONSE, // 3\n    OBEX_SESSION_EVT_CLOSE, // 4\n} obex_session_event_t;\n\ntypedef struct {\n    uint8 opcode;\n    uint8 *packet;\n    uint16 packet_len;\n    union {\n        struct {\n            struct {\n                uint8 obex_version_num;\n                uint8 flags;\n                uint16 obex_max_packet_len;\n            } connect;\n            struct {\n                uint8 flags;\n                uint16 constants;\n            } setpath;\n        } request;\n        struct {\n            struct {\n                uint8 obex_version_num;\n                uint8 flags;\n                uint16 obex_max_packet_len;\n            } connect;\n        } response;\n    } p;\n} obex_session_cb_param_t;\n\nstruct _obex_session_t;\n\ntypedef int32 (*obex_session_event_handler_t)(struct _obex_session_t *session, obex_session_event_t event, obex_session_cb_param_t *param);\n\ntypedef enum {\n    OBEX_SESSION_ROLE_CLIENT = 0,\n    OBEX_SESSION_ROLE_SERVER, // 1\n} obex_session_role_t;\n\ntypedef enum {\n    OBEX_SESSION_STATE_CLOSE = 0,\n    OBEX_SESSION_STATE_CONNECTING, // 1\n    OBEX_SESSION_STATE_OPEN, // 2\n    OBEX_SESSION_STATE_DISCONNECTING, // 3\n} obex_session_state_t;\n\ntypedef struct {\n    obex_session_role_t role;\n    uint32 remote_rfcomm_channel;\n    uint32 remote_l2cap_psm;\n    uint8 local_version;\n    uint16 max_obex_packet_length;\n    uint8 local_rfcomm_channel;\n    uint8 local_l2cap_psm;\n    obex_transport_type_t transport_type;\n    void *priv;\n} obex_session_config_t;\n\ntypedef struct _obex_session_t{\n    obex_session_config_t config;\n    obex_session_state_t state;\n    obex_transport_t transport;\n    obex_transmission_t *transmission;\n    struct bdaddr_t remote;\n    uint32 connectionID;\n    obex_operation_opcode_t op;\n    obex_session_event_handler_t event_handler;\n} obex_session_t;\n\nint32 obex_session_init(obex_session_t *session, obex_session_config_t *config, obex_session_event_handler_t event_handler);\nint32 obex_session_open(obex_session_t *session, struct bdaddr_t *remote);\nint32 obex_session_connect(obex_session_t *session, obex_transmission_t *transmission);\nint32 obex_session_disconnect(obex_session_t *session, obex_transmission_t *transmission);\nint32 obex_session_put(obex_session_t *session, obex_transmission_t *transmission);\nint32 obex_session_get(obex_session_t *session, obex_transmission_t *transmission);\nint32 obex_session_setpath(obex_session_t *session, obex_transmission_t *transmission);\nint32 obex_session_abort(obex_session_t *session, obex_transmission_t *transmission);\nint32 obex_session_response(obex_session_t *session, obex_transmission_t *transmission);\nint32 obex_session_close(obex_session_t *session);\nint32 obex_session_restore(obex_session_t *session,uint32 connectionID,uint32 server_chnl);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // OBEX_SESSION_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex_tlv.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef OBEX_TLV_H_INCLUDED\n#define OBEX_TLV_H_INCLUDED\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef unsigned char obex_tlv_id_t;\ntypedef unsigned char obex_tlv_length_t;\n\ntypedef struct {\n    uint8 *buff;\n    uint32 buff_max_len;\n    uint32 packet_len;\n} obex_tlv_t;\n\nint32 obex_tlv_init(obex_tlv_t *tlv, uint8 *buff, uint32 buff_len);\nint32 obex_tlv_add_1Byte(obex_tlv_t *tlv, obex_tlv_id_t id, uint8 value);\nint32 obex_tlv_add_2Bytes(obex_tlv_t *tlv, obex_tlv_id_t id, uint16 value, bool is_le);\nint32 obex_tlv_add_4Bytes(obex_tlv_t *tlv, obex_tlv_id_t id, uint32 value, bool is_le);\nint32 obex_tlv_add_buffer(obex_tlv_t *tlv, obex_tlv_id_t id, obex_tlv_length_t lenght, uint8 *value);\nuint32 obex_tlv_get_length(obex_tlv_t *tlv);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // OBEX_TLV_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex_transmission.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef OBEX_TRANSMISSION_H_INCLUDED\n#define OBEX_TRANSMISSION_H_INCLUDED\n\n#include \"bt_common.h\"\n#include \"bt_co_list.h\"\n#include \"obex_protocol.h\"\n\n/*------ What Is A Transmission ------*/\n/* An user (application) fires a operation (CONNECT/DISCONNECT/PUT/GET/SETPATH/ABORT) to server to do something */\n/* The operation is in fact a packet of data which is called Transmission here */\n/* A Transmission is composed of fixed 'Field' plus some optional 'HEADER' */\n/* For the fixed 'Field', here using obex_transmisson_prepare to reserve the buffer in Transmission */\n/* For the optional 'Header', here using obex_transmisson_add_XXX to add it in Transmission */\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    uint16 len;\n    uint8 *text;\n    uint8 valid;\n} obex_transmission_header_Unicode_t;\n\ntypedef struct {\n    uint16 len;\n    uint8 *buff;\n    uint8 valid;\n} obex_transmission_header_ByteSequence_t;\n\ntypedef struct {\n    uint8 value;\n    uint8 valid;\n} obex_transmission_header_1ByteQuality;\n\ntypedef struct {\n    uint32 value;\n    uint8 valid;\n} obex_transmission_header_4ByteQuality;\n\ntypedef struct {\n    obex_transmission_header_4ByteQuality Count;\n    obex_transmission_header_Unicode_t Name;\n    obex_transmission_header_ByteSequence_t Type;\n    obex_transmission_header_4ByteQuality Length;\n    obex_transmission_header_ByteSequence_t Time_ISO8601;\n    obex_transmission_header_4ByteQuality Time_4Bytes;\n    obex_transmission_header_Unicode_t Description;\n    obex_transmission_header_ByteSequence_t Target;\n    obex_transmission_header_ByteSequence_t HTTP;\n    obex_transmission_header_ByteSequence_t Body;\n    obex_transmission_header_ByteSequence_t EndOfBody;\n    obex_transmission_header_ByteSequence_t Who;\n    obex_transmission_header_4ByteQuality ConnectionID;\n    obex_transmission_header_ByteSequence_t AppParameters;\n    obex_transmission_header_ByteSequence_t AuthChallenge;\n    obex_transmission_header_ByteSequence_t AuthResponse;\n    obex_transmission_header_ByteSequence_t ObjectClass;\n} obex_transmission_headers_t;\n\ntypedef struct {\n    uint8 *buff;\n    uint16 packet_len;\n    uint16 max_buff_len;\n    bool is_final;\n    uint8 flag;\n} obex_transmission_t;\n\n//------ Initialize a transmission in a give buffer ------//\nint32 obex_transmission_init(obex_transmission_t *trasmission, uint8 *buff, uint32 len);\nint32 obex_transmission_prepare(obex_transmission_t *trasmission, obex_operation_opcode_t operation_code);\n\nint32 obex_transmission_parse_headers(uint8 *buff, uint32 len, obex_transmission_headers_t *headers);\n\nbool obex_is_final_transmission(obex_transmission_t *transmission);\nvoid obex_transmission_set_final(obex_transmission_t *transmission, bool final);\nuint8 obex_transmission_get_flag(obex_transmission_t *transmission);\nvoid obex_transmission_set_flag(obex_transmission_t *transmission, uint8 flag);\n\n#define obex_transmission_add_Count(tr,Count) \\\n    obex_transmission_add_4ByteQuantity(tr,obex_header_id_Count,Count)\n\n#define obex_transmission_add_Name(tr,name,name_len_without_null) \\\n    obex_transmission_add_Unicode(tr,obex_header_id_Name,name,name_len_without_null)\n\n#define obex_transmission_add_Type(tr,type,type_len_with_null) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_Type,type,type_len_with_null)\n\n#define obex_transmission_add_Length(tr,Length) \\\n    obex_transmission_add_4ByteQuantity(tr,obex_header_id_Length,Length)\n\n#define obex_transmission_add_Time_ISO8601t(tr,time,time_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_Time_ISO8601,time,time_len)\n\n#define obex_transmission_add_Time_4Byte(tr,Time) \\\n    obex_transmission_add_4ByteQuantity(tr,obex_header_id_Time_4byte,Time)\n\n#define obex_transmission_add_Description(tr,desc,desc_len_without_null) \\\n    obex_transmission_add_Unicode(tr,obex_header_id_Description,desc,desc_len_without_null)\n\n#define obex_transmission_add_Target(tr,uuid,uuid_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_Target,uuid,uuid_len)\n\n#define obex_transmission_add_HTTP(tr,http,http_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_HTTP,http,http_len)\n\n#define obex_transmission_add_Body(tr,body,body_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_Body,body,body_len)\n\n#define obex_transmission_add_EndOfBody(tr,body,body_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_EndofBody,body,body_len)\n\n#define obex_transmission_add_Who(tr,who,who_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_Who,who,who_len)\n\n#define obex_transmission_add_ConnectionID(tr,ConnectionID) \\\n    obex_transmission_add_4ByteQuantity(tr,obex_header_id_ConnectionID,ConnectionID)\n\n#define obex_transmission_add_ApplicationParameters(tr,tlv,tlv_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_ApplicationParameters,tlv,tlv_len)\n\n#define obex_transmission_add_AuthenticateChallenge(tr,ac,ac_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_AuthenticateChallenge,ac,ac_len)\n\n#define obex_transmission_add_AuthenticateResponse(tr,as,as_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_AuthenticateResponse,as,as_len)\n\n#define obex_transmission_add_ObjectClass(tr,oc,oc_len) \\\n    obex_transmission_add_ByteSequence(tr,obex_header_id_ObjectClass,oc,oc_len)\n\n//------ null terminated Unicode text, length prefixed with 2 byte unsigned integer ------//\nint32 obex_transmission_add_Unicode(obex_transmission_t *tr, obex_header_id_t id, uint8 *ascii, uint32 ascii_len_without_null);\n//------ byte sequence, length prefixed with 2 byte unsigned integer ------//\nint32 obex_transmission_add_ByteSequence(obex_transmission_t *tr, obex_header_id_t id, uint8 *bytes, uint32 bytes_len);\n//------ 1 byte quantity ------//\nint32 obex_transmission_add_1ByteQuantity(obex_transmission_t *tr, obex_header_id_t id, uint8 value);\n//------ 4 byte quantity ------//\nint32 obex_transmission_add_4ByteQuantity(obex_transmission_t *tr, obex_header_id_t id, uint32 value);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // OBEX_TRANSMISSION_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/obex_transportlayer.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef OBEX_TRANSPORTLAYER_H_INCLUDED\n#define OBEX_TRANSPORTLAYER_H_INCLUDED\n\n#include \"bt_common.h\"\n#include \"bt_co_list.h\"\n#include \"rfcomm_i.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum {\n    OBEX_TRANSPORT_TYPE_RFCOMM = 0,\n    OBEX_TRANSPORT_TYPE_L2CAP, // 1\n} obex_transport_type_t;\n\ntypedef enum {\n    OBEX_TRANSPORT_ROLE_CLIENT = 0,\n    OBEX_TRANSPORT_ROLE_SERVER, // 1\n} obex_transport_role_t;\n\ntypedef enum {\n    OBEX_TRANSPORT_CONN_STATE_CLOSE = 0,\n    OBEX_TRANSPORT_CONN_STATE_CONNECTING, // 1\n    OBEX_TRANSPORT_CONN_STATE_CONNECTED, // 2\n    OBEX_TRANSPORT_CONN_STATE_DISCONNECTING, // 3\n} obex_transport_conn_state_t;\n\ntypedef enum {\n    OBEX_TRANSPORT_LISTEN_STATE_IDLE = 0,\n    OBEX_TRANSPORT_LISTEN_STATE_LISTENING, // 1\n} obex_transport_listen_state_t;\n\ntypedef struct {\n    obex_transport_type_t type;\n    union {\n        struct {\n            uint32 remote_channel;\n            uint32 local_channel;\n            uint32 rfcomm_handle;\n        } rfcomm;\n        struct {\n            uint32 psm;\n            uint32 channel;\n        } l2cap;\n    } u;\n    void *priv;\n} obex_transport_config_t;\n\ntypedef enum {\n    OBEX_TRANSPORT_EVENT_OPEN_IND = 0,\n    OBEX_TRANSPORT_EVENT_OPEN, // 1\n    OBEX_TRANSPORT_EVENT_TX_HANDLED, // 2\n    OBEX_TRANSPORT_EVENT_CLOSE,// 3\n    OBEX_TRANSPORT_EVENT_DATA, // 4\n} obex_transport_event_t;\n\ntypedef struct {\n    union {\n        struct {\n        } open_ind;\n        struct {\n        } open;\n        struct {\n        } tx_handled;\n        struct {\n        } close;\n        struct {\n            uint8 *buff;\n            uint32 len;\n        } data;\n    } u;\n} obex_transport_cb_param_t;\n\nstruct _obex_transport_t;\n\ntypedef int32 (*obex_transport_connect_t) (struct _obex_transport_t *transport, struct bdaddr_t *remote);\ntypedef int32 (*obex_transport_listen_t) (struct _obex_transport_t *transport);\ntypedef int32 (*obex_transport_disconnect_t) (struct _obex_transport_t *transport);\ntypedef uint32 (*obex_transport_send_t)(struct _obex_transport_t *transport, uint8 *buff, uint32 buff_len);\ntypedef int32 (*obex_transport_event_handler_t)(struct _obex_transport_t *transport, obex_transport_event_t event, obex_transport_cb_param_t *param);\n\ntypedef struct _obex_transport_t{\n    struct list_node node;\n    obex_transport_conn_state_t conn_state;\n    obex_transport_listen_state_t listen_state;\n    obex_transport_config_t config;\n\n    obex_transport_send_t send;\n    obex_transport_listen_t listen;\n    obex_transport_connect_t connect;\n    obex_transport_disconnect_t disconnect;\n    obex_transport_event_handler_t event_handler;\n} obex_transport_t;\n\nconst char *obex_transport_conn_state_2_str(obex_transport_conn_state_t state);\nconst char *obex_transport_event_2_str(obex_transport_event_t event);\nint32 obex_transport_init(obex_transport_t *transport, obex_transport_config_t *config, obex_transport_event_handler_t event_handler);\nint32 obex_transport_restore(obex_transport_t *transport,uint32 server_chnl);\nvoid obex_rfcomm_notify_cb(enum rfcomm_event_enum event,uint32 rfcomm_handle,void *data, uint8 reason, void *priv);\nvoid obex_rfcomm_data_recv_cb(uint32 rfcomm_handle,struct pp_buff *ppb, void *priv);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif // OBEX_TRANSPORTLAYER_H_INCLUDED\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/overide.h",
    "content": "/****************************************************************************\n *\n * File:\n *     $Id: overide.h 2809 2011-10-11 21:42:02Z dliechty $\n *     $Product: BES AV Profiles SDK v2.x $\n *     $Revision: 2809 $\n *\n * Description: Configuration overrides for the A2DP project.\n *\n * Created:     June 15, 2004\n *\n * Copyright 2004-2005 Extended Systems, Inc.\n * Portions copyright BES.\n * All rights reserved.  All unpublished rights reserved.\n *\n * Unpublished Confidential Information of BES.\n * Do Not Disclose.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __OVERIDE_H\n#define __OVERIDE_H\n\n/* WARNING: The values in this overide.h file were selected specifically for\n * this sample application. If you change them, the sample application may fail\n * to compile or not work properly.\n */\n\n/****************************************************************************\n *\n *          Module Selection\n *  Please select the module/profiles which are needed\n *\n ****************************************************************************/\n\n/* Initialize the necessary modules */\n#if defined (BES_AUD)\n#if defined (__HSP_ENABLE__)\n#define XA_LOAD_LIST        XA_MODULE(CMGR) \\\n                            XA_MODULE(HF) \\\n                            XA_MODULE(HS) \\\n                            XA_MODULE(AVDTP) \\\n                            XA_MODULE(AVDEV) \\\n                            XA_MODULE(A2DP) \\\n                            XA_MODULE(AVRCP) \\\n                            XA_MODULE(HID) \\\n                            XA_MODULE(BESAUD)\n#else\n#define XA_LOAD_LIST        XA_MODULE(CMGR) \\\n                            XA_MODULE(HF) \\\n                            XA_MODULE(AVDTP) \\\n                            XA_MODULE(AVDEV) \\\n                            XA_MODULE(A2DP) \\\n                            XA_MODULE(AVRCP) \\\n                            XA_MODULE(HID) \\\n                            XA_MODULE(BESAUD)\n#endif\n\n#else\n\n#if defined (__HSP_ENABLE__)\n#define XA_LOAD_LIST        XA_MODULE(CMGR) \\\n                            XA_MODULE(HF) \\\n                            XA_MODULE(HS) \\\n                            XA_MODULE(AVDTP) \\\n                            XA_MODULE(AVDEV) \\\n                            XA_MODULE(A2DP) \\\n                            XA_MODULE(AVRCP) \\\n                            XA_MODULE(HID)\n#else\n#define XA_LOAD_LIST        XA_MODULE(CMGR) \\\n                            XA_MODULE(HF) \\\n                            XA_MODULE(AVDTP) \\\n                            XA_MODULE(AVDEV) \\\n                            XA_MODULE(A2DP) \\\n                            XA_MODULE(AVRCP) \\\n                            XA_MODULE(HID)\n#endif\n#endif \n                            /*      XA_MODULE(HF) \\\n                         XA_MODULE(OBEX) \\\n                            XA_MODULE(GOEP) \\\n                            XA_MODULE(OPUSH) \\\n                            XA_MODULE(FTP) \\\n                                XA_MODULE(CMGR) \\\n                                XA_MODULE(SPPDRV) \\\n                                XA_MODULE(OBEX) \\\n                                XA_MODULE(GOEP) \\\n                                XA_MODULE(HF) \\\n                                XA_MODULE(HS) \\\n                        */\n\n/*****************************************************************************\n *    Global Definition for feature selection\n *    Based on BlueSDK Porting API.pdf\n *****************************************************************************/\n\n/*   Part 1. Global definition */\n#define BT_STACK                                    XA_ENABLED\n#define TCP_STACK                                   XA_DISABLED\n#define IRDA_STACK                                  XA_DISABLED\n\n#define BT_BEST_SYNC_CONFIG                         XA_ENABLED\n\n//#define XA_DEBUG                                    XA_DISABLED /* enable debug */\n#ifndef XA_DEBUG\n#define XA_DEBUG                                    XA_DISABLED\n#endif\n#define XA_DEBUG_PRINT                              XA_DEBUG   // enable debug information output, must imprement OS_Report\n#define XA_ERROR_CHECK                              XA_ENABLED /* enable error check of stack */\n//#define XA_CONTEXT_PTR                                XA_ENABLED /* disable dymanical RAM allocation. The context structures are performed using \"->\" operand */\n#define XA_CONTEXT_PTR                              XA_DISABLED /* disable dymanical RAM allocation. The context structures are performed using \"->\" operand */\n\n#define XA_INTEGER_SIZE                             4\n#define XA_USE_ENDIAN_MACROS                        XA_DISABLED\n//#define XA_MULTITASKING                               XA_DISABLED //Need implement OS_StartTimer, OS_CancelTimer, OS_NotifyEvm, OS_LockStack, OS_UnlockStack\n#define XA_MULTITASKING                             XA_ENABLED //Need implement OS_StartTimer, OS_CancelTimer, OS_NotifyEvm, OS_LockStack, OS_UnlockStack\n#define XA_EVENTMGR                                 XA_ENABLED //Enable Event Manager (EVM)\n//#define XA_SNIFFER                                    XA_DISABLED //to sniff stack operation, need to disable in release stack\n//#define XA_DECODER                                    XA_DISABLED //to decode stack information in sniff and debug\n//#define XA_STATISTICS                             XA_DISABLED /* Enable statistics */\n#define XA_SNIFFER                                  XA_DISABLED //to sniff stack operation, need to disable in release stack\n#define XA_DECODER                                  XA_DEBUG //to decode stack information in sniff and debug\n#define XA_STATISTICS                               XA_DISABLED /* Enable statistics */\n\n/*   Part 2. Global Configuration  */\n#define BDADDR_NTOA_SIZE                            18\n\n#define NUM_BT_DEVICES                              2\n#define NUM_SCO_CONNS                               2\n\n#define NUM_BLE_DEVICES                             2\n/*   Part 3. Management Entity Configuration   */\n#define BT_ALLOW_SCAN_WHILE_CON                     XA_ENABLED\n#define BT_SCO_HCI_DATA                             XA_DISABLED\n#define BT_SCO_HCI_NUM_PACKETS                      (8 * NUM_SCO_CONNS)\n#define BT_SCO_USE_LEGACY_CONNECT                   XA_DISABLED\n#define BT_SECURITY                                 XA_ENABLED\n#define BT_SECURITY_TIMEOUT                         80 //seconds\n\n//#define BT_DEFAULT_PAGE_SCAN_WINDOW                   0\n//#define BT_DEFAULT_PAGE_SCAN_INTERVAL             0\n//#define BT_DEFAULT_INQ_SCAN_WINDOW                    0\n//#define BT_DEFAULT_INQ_SCAN_INTERVAL              0\n\n//#define BT_DEFAULT_PAGE_SCAN_WINDOW                   0x20\n//#define BT_DEFAULT_PAGE_SCAN_INTERVAL             0x40\n#define BT_DEFAULT_PAGE_SCAN_WINDOW                 0x12\n#define BT_DEFAULT_PAGE_SCAN_INTERVAL               0x800\n#define BT_DEFAULT_INQ_SCAN_WINDOW                  0x12\n#define BT_DEFAULT_INQ_SCAN_INTERVAL                0x800\n#define BT_DEFAULT_ACCESS_MODE_NC                   BAM_GENERAL_ACCESSIBLE\n#define BT_DEFAULT_ACCESS_MODE_C                    BAM_NOT_ACCESSIBLE\n\n#define BT_DEFAULT_ACCESS_MODE_PAIR                 BAM_GENERAL_ACCESSIBLE\n#define BT_DEFAULT_ACCESS_MODE_NCON                 BAM_CONNECTABLE_ONLY\n#define BT_DEFAULT_ACCESS_MODE_1C                   BAM_CONNECTABLE_ONLY\n#define BT_DEFAULT_ACCESS_MODE_2C                   BAM_NOT_ACCESSIBLE\n\n#define BT_HCI_NUM_INIT_RETRIES                     0x80\n#define BT_DEFAULT_PAGE_TIMEOUT\t\t\t\t\t\t0x2000 //0x2000=5.12s\n#define BT_DEFAULT_PAGE_TIMEOUT_IN_MS\t\t\t\t5000\n#define BT_PACKET_HEADER_LEN                        25\n#define NUM_KNOWN_DEVICES                           10\n#define DS_NUM_SERVICES                             8\n\n\n/*    Part 4. HCI      */\n#define HCI_RESET_TIMEOUT                           10000 //=10s\n#define HCI_NUM_PACKETS                             (2 * NUM_BT_DEVICES)\n#define HCI_NUM_COMMANDS                            1\n#define HCI_NUM_EVENTS                              10\n#define HCI_CMD_PARM_LEN                            248\n#define HCI_HOST_FLOW_CONTROL                       XA_ENABLED //IMPORTANT\n\n#define HCI_MAX_COMPLETED_PKTS                      8\n#define HCI_SCO_FLOW_CONTROL                        XA_DISABLED //IMPORTANT\n#define HCI_ALLOW_PRESCAN                           XA_DISABLED\n#define HCI_NUM_ACL_TX_RESERVE                      0\n#define HCI_NUM_UNCONN_RESERVE                      0\n#if defined(A2DP_SCALABLE_ON)\n#define HCI_ACL_DATA_SIZE                           1000\n#else\n#if defined(__3M_PACK__)\n#define HCI_ACL_DATA_SIZE                           1000\n#else\n#define HCI_ACL_DATA_SIZE                           800\n#endif\n//#define HCI_ACL_DATA_SIZE                         350\n#endif\n#ifndef _SCO_BTPCM_CHANNEL_        \n#define HCI_SCO_DATA_SIZE                           180\n#else\n#define HCI_SCO_DATA_SIZE                           4\n#endif\n//#define HCI_NUM_ACL_BUFFERS                           (L2CAP_ERTM_RX_WIN_SIZE * L2CAP_NUM_ENHANCED_CHANNELS)\n#define HCI_NUM_ACL_BUFFERS                         6\n#ifndef _SCO_BTPCM_CHANNEL_        \n#define HCI_NUM_SCO_BUFFERS                         6\n#else\n#define HCI_NUM_SCO_BUFFERS                         1\n#endif\n\n#define HCI3W_SLIDING_WINDOW                        (3)\n#define HCI3W_MAX_PAYLOAD                           (0x0FFF)\n#define HCI3W_MEM_POOL_SIZE                         (0x8000)\n#define HCI3W_UART_MULTIPLIER                       (1)\n#define HCI3W_TXQ_MAX                               (8)\n#define HCI3W_CRC                                   XA_ENABLED\n#define HCI3W_OOF                                   XA_ENABLED\n#define HCI3W_DEBUG_TXQ                             XA_DISABLED\n\n#define BT_EXPOSE_BCCMD                             XA_DISABLED\n\n\n/* Part 5. Connection Manager (CMGR)   */\n#define CMGR_DEFAULT_SNIFF_EXIT_POLICY      CMGR_SNIFF_EXIT_ON_AUDIO\n#define CMGR_DEFAULT_SNIFF_TIMER            CMGR_SNIFF_DONT_CARE\n//#define CMGR_AUDIO_DEFAULT_PARMS          CMGR_AUDIO_PARMS_S3\n//#define CMGR_AUDIO_DEFAULT_PARMS          CMGR_AUDIO_PARMS_SCO\n#define CMGR_AUDIO_DEFAULT_PARMS            CMGR_AUDIO_PARMS_S4\n#define CMGR_MEMORY_EXTERNAL                XA_DISABLED\n#define CMGR_SNIFF_MIN_INTERVAL             800\n#define CMGR_SNIFF_MAX_INTERVAL             800\n#define CMGR_SNIFF_ATTEMPT                  3\n#define CMGR_SNIFF_TIMEOUT                  1\n\n\n/* Part 6. L2CAP definitions */\n//#define L2CAP_NUM_CHANNELS                10\n//#define L2CAP_NUM_ENHANCED_CHANNELS       3\n#define L2CAP_NUM_ENHANCED_CHANNELS         0\n\n#if defined(__3M_PACK__)\n#define L2CAP_MTU                           1021\n#else\n#define L2CAP_MTU                           679\n#endif\n#if L2CAP_NUM_ENHANCED_CHANNELS\n#define L2CAP_MPS                           (L2CAP_MTU-7)\n#else\n#define L2CAP_MPS                           L2CAP_MTU\n#endif\n\n#ifdef __ACC_FRAGMENT_COMPATIBLE__\n#define L2CAP_MTU_FOR_ACC                   1024\n#endif\n\n#define L2CAP_NUM_PROTOCOLS                 12\n#define L2CAP_PING_SUPPORT                  XA_DISABLED\n#define L2CAP_FCS_OPTION                    L2FCS_16BIT\n\n#define L2CAP_NUM_GROUPS                    0  //8\n#define L2CAP_GET_INFO_SUPPORT              XA_DISABLED\n#define L2CAP_FLEXIBLE_CONFIG               XA_DISABLED\n#define L2CAP_RTX_TIMEOUT                   30 //seconds\n#define L2CAP_ERTX_TIMEOUT                  150 //seconds\n#define L2CAP_ERTM_TX_WIN_SIZE              5\n#define L2CAP_ERTM_RX_WIN_SIZE              5\n#define L2CAP_ERTM_MAX_TRANSMIT             10\n#define L2CAP_ERTM_RETRANS_TIMEOUT          2000 //milliseconds\n#define L2CAP_ERTM_MONITOR_TIMEOUT          12000 //MILLISECONDS\n#define L2CAP_ERTM_ACK_TIMEOUT              (L2CAP_ERTM_RETRANS_TIMEOUT/2)\n#define L2CAP_ERTM_SREJ_ENABLE              XA_DISABLED\n#define L2CAP_ERTM_FRAGMENTS                XA_DISABLED\n#define L2CAP_ERTM_IMMEDIATE                XA_DISABLED\n#define L2CAP_FLOW_CONTROL                  XA_DISABLED\n#define L2CAP_PRIORITY                      XA_DISABLED\n//#define L2CAP_PRIORITY                        XA_ENABLED\n#define L2CAP_DEREGISTER_FUNC               XA_DISABLED\n//#define L2CAP_NUM_SIGNAL_PACKETS          (NUM_BT_DEVICES * L2CAP_NUM_ENHANCED_CHANNELS *4)\n#define L2CAP_NUM_SIGNAL_PACKETS            (NUM_BT_DEVICES * 2)\n#define L2CAP_NUM_TX_PACKETS                ((L2CAP_ERTM_TX_WIN_SIZE * L2CAP_NUM_ENHANCED_CHANNELS) + 2)\n#define L2CAP_PRELUDE_SIZE                  7\n#define L2CAP_VIOLATE_SPEC_MTU_NEG          XA_DISABLED\n\n//Not documented\n//#define L2CAP_DEFAULT_MTU                 672\n//#define L2CAP_DEFAULT_MTU                 335\n#define L2CAP_MINIMUM_MTU                   0x0030\n#define L2CAP_MAXIMUM_MTU                   L2CAP_MTU\n#define L2CAP_MANGLER_TESTING               XA_DISABLED\n#define L2CAP_ENHANCED_IOP_TESTING          XA_DISABLED\n\n/* Part 7. SDP               */\n#define SDP_CLIENT_SUPPORT                  XA_ENABLED\n#define SDP_SERVER_SUPPORT                  XA_ENABLED\n#define SDP_CLIENT_LOCAL_MTU                L2CAP_MTU\n#define SDP_PARSING_FUNCS                   XA_ENABLED\n#define SDP_NUM_CLIENTS                     NUM_BT_DEVICES\n#define SDP_ACTIVE_CLIENTS                  (NUM_BT_DEVICES)\n#define SDP_SERVER_SEND_SIZE                128\n#define SDP_SERVER_MAX_LEVEL                4\n#define SDP_SERVER_LOCAL_MTU                L2CAP_MTU\n#define SDP_SERVER_MIN_REMOTE_MTU           48\n\n/* Part 8. RFCOMM              */\n#define RFCOMM_PROTOCOL                     XA_ENABLED\n#define RF_SECURITY                         XA_ENABLED\n#define RF_SEND_TEST                        XA_DISABLED  //XA_ENABLED\n#define RF_SEND_CONTROL                     XA_DISABLED  //XA_ENABLED\n#define NUM_RF_SERVERS                      30\n#define NUM_RF_CHANNELS                     (NUM_RF_SERVERS * 2)\n#define RF_MAX_FRAME_SIZE                   L2CAP_MTU-5\n#define RF_CONNECT_TIMEOUT                  60000 //milliseconds\n#define RF_T1_TIMEOUT                       20000  //milliseconds\n#define RF_T2_TIMEOUT                       20000  //milliseconds\n\n#define RF_MIN_FRAME_SIZE                   23\n#define RF_DEFAULT_FRAMESIZE                127\n#define RF_DEFAULT_PRIORITY                 0\n#define RF_LOWEST_PRIORITY                  63\n\n/* Part 9. SPP                */\n#define SPP_SERVER                          XA_ENABLED\n#define SPP_CLIENT                          XA_ENABLED\n\n/* Part 10. Unplugfest testing */\n#define UPF_TWEAKS                          XA_DISABLED\n\n/*BES AUD data path*/\n#ifdef BES_AUD\n#define BESAUD_DEVICE                       XA_ENABLED\n#else\n#define BESAUD_DEVICE                       XA_DISABLED\n#endif\n\n/**********************************************************************************\n *\n *   AV Profile SDK\n *\n **********************************************************************************/\n/* A2DP definitions */\n\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\n#define A2DP_SOURCE                         XA_ENABLED\n#else\n#define A2DP_SOURCE                         XA_DISABLED\n#endif\n#define A2DP_SINK                           XA_ENABLED\n#define A2DP_MINOR_DEVICE_CLASS             COD_MINOR_AUDIO_HIFIAUDIO\n#define A2DP_SRC_FEATURES                   A2DP_SRC_FEATURE_PLAYER\n#define A2DP_SNK_FEATURES                   (A2DP_SNK_FEATURE_SPEAKER | A2DP_SNK_FEATURE_HEADPHONE)\n#define A2DP_MAX_STREAMINFOS                8\n\n//#define A2DP_APP_USE_WMSDK                    XA_ENABLED  //for Windows only\n#define A2DP_APP_USE_WMSDK                  XA_DISABLED\n\n/* VDP                 */\n#define VDP_SOURCE                          XA_DISABLED\n#define VDP_SINK                            XA_DISABLED\n#define VDP_MINOR_DEVICE_CLASS              COD_MINOR_AUDIO_VIDEOCAMERA\n#define VDP_MAX_STREAMINFOS                 8\n\n/* AVDTP              */\n#define AVDTP_RTX_SIG_TIMEOUT               3000\n#define AVDTP_MAX_CODEC_ELEM_SIZE           10\n#define AVDTP_MAX_CP_VALUE_SIZE             10\n#define AVDTP_NUM_TX_PACKETS                4\n#define AVDTP_TX_SIGNAL_MPS                 L2CAP_MINIMUM_MTU\n#define AVDTP_RX_SIGNAL_MPS                 L2CAP_MPS\n#define AVDTP_TX_STREAM_MPS                 L2CAP_MPS\n#define AVDTP_RX_STREAM_MPS                 L2CAP_MPS\n#define BT_STATUS_ABORTED                   (BT_STATUS_LAST_CODE + 1)\n#define AV_WORKER 1\n/* AVRCP               */\n#define AVRCP_VERSION_1_3_ONLY              XA_DISABLED //XA_DISABLED\n#define AVRCP_RTX_CMD_TIMEOUT               1000\n#define AVRCP_RTX_ADV_CMD_TIMEOUT           1000\n#define AVRCP_RTX_BROWSE_CMD_TIMEOUT        10000\n#define AVRCP_ADVANCED_TARGET               XA_DISABLED\n\n#define AVRCP_ADVANCED_TARGET_SLIM          XA_ENABLED\n#define AVRCP_ADVANCED_CONTROLLER           XA_ENABLED\n#define AVRCP_PROVIDER_NAME                 'M', 'V', 'I', 'E', 'W', '\\0'\n#define AVRCP_PROVIDER_NAME_LEN             6\n#define AVRCP_CT_SERVICE_NAME               'M', 'V', 'I', 'E', 'W', '\\0'\n#define AVRCP_CT_SERVICE_NAME_LEN           6\n#define AVRCP_TG_SERVICE_NAME               'M', 'V', 'I', 'E', 'W', '\\0'\n#define AVRCP_TG_SERVICE_NAME_LEN           6\n#define AVRCP_PANEL_COMPANY_ID              \"\\xFF\\xFF\\xFF\"\n#define AVRCP_SUBUNIT_OP_QUEUE_MAX          15\n#define AVRCP_BLUETOOTH_COMPANY_ID          \"\\x00\\x19\\x58\"\n#define AVRCP_MAX_CHAR_SETS                 10\n#define AVRCP_ADVANCED_RESPONSE_SIZE        128\n#define AVRCP_NO_TRACK_CURRENTLY_SELECTED   0xFFFFFFFF\n#define AVRCP_MAX_MEDIA_PLAYERS             10\n#define AVRCP_BROWSING_TARGET               XA_DISABLED\n#define AVRCP_BROWSING_CONTROLLER           XA_DISABLED\n#define AVRCP_LIST_PLAYERS_ENABLED          XA_DISABLED /*((AVRCP_ADVANCED_TARGET == XA_ENABLED) && (AVRCP_VERSION_1_3_ONLY == XA_DISABLED))*/\n#define AVRCP_BROWSE_AUTO_ACCEPT            XA_DISABLED\n#define AVRCP_MAX_FOLDER_DEPTH              10\n#define AVRCP_NUM_PLAYER_SETTINGS           4\n#define AVRCP_MAX_PALYER_STRINGS            5\n\n/* AVCTP             */\n\n\n/**********************************************************************************\n *\n *   BIP\n *\n **********************************************************************************/\n/* Value */\n#define BIP_SUPPORTED_CAPABILITIES          0x01\n#define BIP_SUPPORTED_FEATURES              0x0091\n#define BIP_SUPPORTED_FUNCTIONS             0x41EB\n#define BIP_IMAGING_DATA_CAPACITY           0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00\n\n/* Constants */\n#define BIP_NUM_INITIATORS                  1\n#define BIP_NUM_RESPONDERS                  1\n#define BIP_MAX_PASSWORD_LEN                18\n#define BIP_MAX_USERID_LEN                  20\n#define BIP_MAX_REALM_LEN                   20\n\n/**********************************************************************************\n *\n *   BNEP\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define NUM_BNEP_PANUS                      1\n#define BNEP_ETHERNET_EMULATION             XA_DISABLED\n#define BNEP_NUM_TIMERS                     3\n#define BNEP_CONTROL_TIMEOUT                10\n\n/**********************************************************************************\n *\n *   BPP\n *\n **********************************************************************************/\n/* Value */\n#define BPP_1284ID \\\n    'M','F','G',':','E','X','T','E','N','D','E','D','-','S', \\\n    'Y','S','T','E','M','S',';','M','D','L',':','X','A','B', \\\n    'T','P','r','i','n','t','e','r',';','D','E','S',':','X', \\\n    'T','N','D','A','c','c','e','s','s',' ','B','l','u','e', \\\n    't','o','o','t','h',' ','P','r','i','n','t','e','r',';', \\\n    'S','N',':','1','2','3','4','5','\\0'\n#define BPP_1284ID_LEN                      79\n#define BPP_DOC_FORMATS \\\n    'a','p','p','l','i','c','a','t','i','o','n','/', \\\n    'v','n','d','.','p','w','g','-','x','h','t','m','l','-', \\\n    'p','r','i','n','t','+','x','m','l',':','1','.','0',',', \\\n    't','e','x','t','/','p','l','a','i','n','\\0'\n#define BPP_DOC_FORMATS_LEN                 51\n#define BPP_CHAR_REPERTOIRES \\\n    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \\\n    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0xff\n#define BPP_IMG_FORMATS \\\n    'i','m','a','g','e','/','j','p','e','g',',', \\\n    'i','m','a','g','e','/','g','i','f',':','8','9','A','\\0'\n#define BPP_IMG_FORMATS_LEN                 25\n#define BPP_COLOR_SUPPORTED                 TRUE\n#define BPP_DUPLEX_SUPPORTED                TRUE\n#define BPP_MEDIA_TYPES \\\n    's','t','a','t','i','o','e','r','y',',', \\\n    'c','a','r','d','s','t','o','c','k',',', \\\n    'e','n','v','e','l','o','p','e','\\0'\n#define BPP_MEDIA_TYPES_LEN                 29\n#define BPP_MAX_MEDIA_WIDTH                 210\n#define BPP_MAX_MEDIA_LENGTH                297\n\n\n/* Constants */\n#define BPP_NUM_SENDERS                     1\n#define BPP_NUM_PRINTERS                    1\n#define BPP_PRINT_STATUS                    XA_ENABLED\n#define BPP_MAX_PASSWORD_LEN                20\n#define BPP_MAX_USERID_LEN                  20\n#define BPP_MAX_REALM_LEN                   20\n\n/**********************************************************************************\n *\n *   HFP\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n//wangjianjun\n#if defined(HFP_1_6_ENABLE)\n#define HF_VERSION_1_6                  XA_ENABLED\n#else\n#define HF_VERSION_1_6                  XA_DISABLED\n#endif\n//#define HF_VERSION_1_6                    XA_ENABLED\n#define HF_VREC                             XA_ENABLED\n#define HF_FEATURE_ECHO_NOISE               0x00000001\n#define HF_FEATURE_CALL_WAITING             0x00000002\n#define HF_FEATURE_CLI_PRESENTATION         0x00000004\n#define HF_FEATURE_VOICE_RECOGNITION        0x00000008\n#define HF_FEATURE_VOLUME_CONTROL           0x00000010\n\n#if  HF_VERSION_1_6 == XA_ENABLED\n#define HF_FEATURE_CODEC_NEGOTIATION        0x00000020 //wind band speech\n#define HF_FEATURE_ENHANCED_CALL_STATUS         0x00000040\n#define HF_FEATURE_ENHANCED_CALL_CTRL       0x00000080\n#else\n#define HF_FEATURE_ENHANCED_CALL_STATUS         0x00000020\n#define HF_FEATURE_ENHANCED_CALL_CTRL       0x00000040\n#endif\n\n//zjq add for hfp1.7 hf_indicators\n#define HF_FEATURE_HF_INDICATORS                 0x00000100\n#define HF_FEATURE_ESCO_S4                 0x00000200\n\n//only 5 bits avirable, no useful!!!\n#if HF_VERSION_1_6 == XA_ENABLED\n#define HF_SDK_FEATURES (HF_FEATURE_ECHO_NOISE  \\\n                            | HF_FEATURE_CALL_WAITING   \\\n                            | HF_FEATURE_CLI_PRESENTATION   \\\n                            | HF_FEATURE_VOICE_RECOGNITION  \\\n                            | HF_FEATURE_VOLUME_CONTROL \\\n                            | HF_FEATURE_CODEC_NEGOTIATION  \\\n                            | HF_FEATURE_ENHANCED_CALL_STATUS   \\\n                            | HF_FEATURE_ENHANCED_CALL_CTRL \\\n                            | HF_FEATURE_ESCO_S4)\n#else\n\n#define HF_SDK_FEATURES (HF_FEATURE_ECHO_NOISE          \\\n                            | HF_FEATURE_CALL_WAITING   \\\n                            | HF_FEATURE_CLI_PRESENTATION   \\\n                            | HF_FEATURE_VOICE_RECOGNITION  \\\n                            | HF_FEATURE_VOLUME_CONTROL \\\n                            | HF_FEATURE_ENHANCED_CALL_STATUS   \\\n                            | HF_FEATURE_ENHANCED_CALL_CTRL)\n#endif\n\n#define HF_COMMAND_TIMEOUT                  10000\n#define HF_USE_CALL_MANAGER                 XA_DISABLED  //XA_ENABLED\n#define HF_POLL_TIMEOUT                     120000\n#define HF_POLL_TIMEOUT_ACTIVE              4000\n#define HF_RING_TIMEOUT                     10000\n#define HF_TX_BUFFER_SIZE                   128   //1024\n#define HF_RECV_BUFFER_SIZE                 HCI_ACL_DATA_SIZE  //1024\n#define HF_USE_PHONEBOOK_COMMANDS           XA_DISABLED\n#define HF_USE_MESSAGING_COMMANDS           XA_DISABLED\n#define HF_USE_IIA                          XA_DISABLED\n//#define HF_USE_RESP_HOLD                  XA_ENABLED\n#define HF_USE_RESP_HOLD                    XA_DISABLED\n#define HF_SNIFF_MIN_INTERVAL               0x0040\n#define HF_SNIFF_MAX_INTERVAL               0x0800\n#define HF_SNIFF_ATTEMPT                    0x0160\n#define HF_SNIFF_TIMEOUT                    0x0160\n#define HF_MEMORY_EXTERNAL                  XA_DISABLED\n//#define HF_SECURITY_SETTINGS              (BSL_AUTHORIZATION_IN | BSL_SECURITY_L2_IN | BSL_SECURITY_L2_OUT )\n#define HF_SECURITY_SETTINGS                (BSL_SECURITY_L2_IN | BSL_SECURITY_L2_OUT )\n#define HF_CBSZ                             (256)\n#define HF_MAX_BIA_STRING                   (40)\n#define HF_DELAY_CHUP_OK_POLL               XA_DISABLED\n#define HF_DELAY_IND_SETUP_POLL             XA_DISABLED\n\n\n/**********************************************************************************\n *\n *   HFP_AG\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n//wangjianjun for hfp AG\n#define HFG_FEATURE_THREE_WAY_CALLS         0x00000001\n#define HFG_FEATURE_ECHO_NOISE              0x00000002\n#define HFG_FEATURE_VOICE_RECOGNITION       0x00000004\n#define HFG_FEATURE_RING_TONE               0x00000008\n#define HFG_FEATURE_VOICE_TAG               0x00000010\n#define HFG_FEATURE_REJECT                  0x00000020\n#define HFG_FEATURE_ENHANCED_CALL_STATUS    0x00000040\n#define HFG_FEATURE_ENHANCED_CALL_CTRL      0x00000080\n#define HFG_FEATURE_EXTENDED_ERRORS         0x00000100\n#if HF_VERSION_1_6 == XA_ENABLED\n#define HFG_FEATURE_CODEC_NEGOTATION            0x00000200\n#endif\n\n#define HFG_TX_BUFFER_SIZE                  1024\n#define HFG_RECV_BUFFER_SIZE                1024\n#define HFG_USE_RESP_HOLD                   XA_DISABLED  //XA_ENABLED\n#define HFG_USE_IIA                         XA_ENABLED\n#define HFG_SNIFF_TIMER                     2000\n#define HFG_SNIFF_MIN_INTERVAL              800\n#define HFG_SNIFF_MAX_INTERVAL              8000\n#define HFG_SNIFF_ATTEMPT                   1600\n#define HFG_SNIFF_TIMEOUT                   1600\n#define HFG_MEMORY_EXTERNAL                 XA_DISABLED\n#define HFG_SECURITY_SETTINGS               (BSL_AUTHORIZATION_IN | BSL_SECURITY_L2_IN | BSL_SECURITY_L2_OUT )\n#define HFG_II_DESC_MAX                     128\n\n\n/**********************************************************************************\n *\n *   HCRP\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define HCRP_1284ID \\\n    'M','F','G',':','i','A','n','y','w','h','e','r','e',';','M','D', \\\n    'L',':','i','A','B','T','P','r','i','n','t','e','r',';','D','E', \\\n    'S',':','i','A','n','y','w','h','e','r','e',' ','B','l','u','e', \\\n    't','o','o','t','h',' ','P','r','i','n','t','e','r',';','S','N', \\\n    ':','1','2','3','4','5',';'\n#define HCRP_1284ID_LEN                     71\n#define HCRP_DEVICE_NAME 'i','A','B','t','P','r','i','n','t','e','r'\n#define HCRP_DEVICE_NAME_LEN                11\n#define HCRP_FRIENDLY_NAME \\\n    'i','A','n','y','w','h','e','r','e',' ','B','l','u','e','t','o', \\\n    'o','t','h',' ','P','r','i','n','t','e','r'\n#define HCRP_FRIENDLY_NAME_LEN              27\n#define HCRP_SERVER                         XA_DISABLED\n#define HCRP_CLIENT                         XA_DISABLED\n#define HCRP_CLIENT_CTL_MTU                 (L2CAP_MTU - 8)\n\n/**********************************************************************************\n *\n *   HSP\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define HS_MAX_LEVEL                        15\n#define HS_DEFAULT_LEVEL                    7\n#define HS_SECURITY                         XA_ENABLED\n#define HS_SECURITY_SETTINGS                (BSL_AUTHORIZATION_IN | BSL_SECURITY_L2_IN | BSL_SECURITY_L2_OUT)\n#define HS_MEMORY_EXTERNAL                  XA_DISABLED\n#define HS_REMOTE_AUDIO_VOLUME_CONTROL      TRUE\n \n#define HS_SNIFF_ATTEMPT\t0x0160\n#define HS_SNIFF_TIMEOUT\t0x0160\n#define HS_SNIFF_MAX_INTERVAL\t0x0800\n#define HS_SNIFF_MIN_INTERVAL\t0x0040 \n\t\n#define HS_RECV_BUFFER_SIZE\t\tHCI_ACL_DATA_SIZE\n#define HS_TX_BUFFER_SIZE\t\t128\n\n\n/**********************************************************************************\n *\n *   HSP_AG\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define AG_SECURITY                         XA_ENABLED\n#define AG_SECURITY_SETTINGS                (BSL_AUTHORIZATION_IN | BSL_SECURITY_L2_IN | BSL_SECURITY_L2_OUT)\n#define AG_SCO_SETTINGS                     XA_ENABLED\n#define AG_RINGTIMER                        5000\n#define AG_MAX_RING_COUNT                   5\n#define AG_MAX_LEVEL                        15\n#define AG_DEFAULT_LEVEL                    7\n#define AG_DISCONNECT_REQUEST_NOTIFY        XA_ENABLED\n#define AG_MEMORY_EXTERNAL                  XA_DISABLED\n\n\n/**********************************************************************************\n *\n *   HID\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define HID_HOST                            XA_DISABLED\n#ifndef HID_DEVICE\n#define HID_DEVICE                          XA_DISABLED\n#endif\n#define HID_NUM_TX_PACKETS                  5\n#define HID_NUM_SDP_ATTRIBUTES              24\n#define DEVICE_ID_NUM_SDP_ATTRIBUTES        7\n#define HID_DEVICE_RELEASE                  0x0100\n#define HID_PARSER_VERSION                  0x0111\n#define HID_DEVICE_SUBCLASS\t\t\t\t\t((U8)(COD_MINOR_PERIPH_KEYBOARD))\n#define HID_COUNTRY_CODE                    0x21\n#define HID_VIRTUAL_CABLE                   TRUE\n#define HID_RECONNECT_INITIATE              TRUE\n#define HID_DESCRIPTOR_TYPE                 0x22\n#define HID_DESCRIPTIOR_LEN                 50\n#define HID_DESCRIPTOR \\\n        0x05, 0x01,  /* USAGE_PAGE(Generic Desktop)   */ \\\n        0x09, 0x02,  /* USAGE(Mouse)                  */ \\\n        0xA1, 0x01,  /* COLLECTION(Application)       */ \\\n        0x09, 0x01,  /*  USAGE(Pointer)               */ \\\n        0xA1, 0x00,  /*  COLLECTION(Physical)         */ \\\n        0x05, 0x01,  /*   USAGE_PAGE(Generic Desktop) */ \\\n        0x09, 0x30,  /*   USAGE(X)                    */ \\\n        0x09, 0x31,  /*   USAGE(Y)                    */ \\\n        0x15, 0x81,  /*   LOGICAL_MINIMUM(-127)       */ \\\n        0x25, 0x7F,  /*   LOGICAL_MAXIMUM(127)        */ \\\n        0x75, 0x08,  /*   REPORT_SIZE(8)              */ \\\n        0x95, 0x02,  /*   REPORT_COUNT(2)             */ \\\n        0x81, 0x06,  /*   INPUT(Data,Var,Rel)         */ \\\n        0xC0,        /*  END_COLLECTION               */ \\\n        0x05, 0x09,  /*  USAGE_PAGE(Button)           */ \\\n        0x19, 0x01,  /*  USAGE_MINIMUM(Button 1)      */ \\\n        0x29, 0x03,  /*  USAGE_MAXIMUM(Button 3)      */ \\\n        0x15, 0x00,  /*  LOGICAL_MINUMUM(0)           */ \\\n        0x25, 0x03,  /*  LOGICAL_MAXIMUM(1)           */ \\\n        0x95, 0x03,  /*  REPORT_COUNT(3)              */ \\\n        0x75, 0x01,  /*  REPORT_SIZE(1)               */ \\\n        0x81, 0x02,  /*  INPUT(Data,Var,Abs)          */ \\\n        0x95, 0x01,  /*  REPORT_COUNT(1)              */ \\\n        0x75, 0x05,  /*  REPORT_SIZE(5)               */ \\\n        0x81, 0x03,  /*  INPUT(Cnst,Var,Abs)          */ \\\n        0xC0         /* END_COLLECTION                */\n#define HID_MAX_DESCRIPTOR_LEN              128\n#define HID_BATTERY_POWER                   FALSE\n#define HID_REMOTE_WAKE                     TRUE\n#define HID_SUPERVISION_TIMEOUT             0x7D00\n#define HID_NORMALLY_CONNECTABLE            TRUE\n#define HID_BOOT_DEVICE                     TRUE\n#define HID_DEVID_SPEC_ID                   0x0103\n#define HID_DEVID_VENDOR_ID                 0x23A1\n#define HID_DEVID_VENDOR_ID_SRC             0x0001\n#define HID_DEVID_PRODUCT_ID                0x1234\n/**********************************************************************************\n *\n *   DIP\n *\n **********************************************************************************/\n/* Value */\n#ifndef DIP_DEVICE\n#define DIP_DEVICE                          XA_ENABLED\n#endif\n\n\n/**********************************************************************************\n *\n *   MAP\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define MAP_NUM_CLIENTS                     1\n#define MAP_NUM_SERVERS                     1\n#define MAP_NOTIFICATION                    XA_ENABLED\n#define MAP_BROWSING                        XA_ENABLED\n#define MAP_DELETE                          XA_ENABLED\n#define MAP_UPLOADING                       XA_ENABLED\n#define MAP_MAX_APP_PARMS_LEN               255\n#define MAP_EMAIL_SUPPORTED                 XA_ENABLED\n#define MAP_SMS_GSM_SUPPORTED               XA_ENABLED\n#define MAP_SMS_CDMA_SUPPORTED              XA_DISABLED\n#define MAP_MMS_SUPPORTED                   XA_ENABLED\n#define MAP_NOTIFICATION_SUPPORTED          XA_ENABLED\n#define PUSH_MESSAGE_TYPE                   \"x-bt/message\"\n#define PULL_MESSAGE_TYPE                   \"x-bt/message\"\n#define SET_MESSAGE_STATUS_TYPE             \"x-bt/messageStatus\"\n#define GET_MESSAGE_LISTING_TYPE            \"x-bt/MAP-msg-listing\"\n#define GET_FOLDER_LISTING_TYPE             \"x-obex/folder-listing\"\n#define SET_NOTIFICATION_REGISTER_TYPE      \"x-bt/MAP-NotificationRegistration\"\n#define SEND_EVENT_TYPE                     \"x-bt/MAP-event-report\"\n#define UPDATE_INBOX_TYPE                   \"x-bt/MAP-messageUpdate\"\n#define MAP_UNKNOWN_OBJECT_LENGTH           0xFFFFFFFF\n\n\n/**********************************************************************************\n *\n *   PAN\n *\n **********************************************************************************/\n/* Value */\n#define PAN_PANU_NUM_ATTRIBUTES     9\n#define PAN_GN_NUM_ATTRIBUTES       11\n#define PAN_NAP_NUM_ATTRIBUTES      13\n#define PAN_NUM_SEARCH_ATTRIBUTES   21\n#define PAN_PKT_TYPE_LIST \\\n    SDP_UINT_16BIT(0x0800),         /* Uint16 IPv4 */ \\\n    SDP_UINT_16BIT(0x0806)          /* Uint16 ARP */\n#define PAN_SECURITY_LEVEL      0x0000  /* No security */\n#define PAN_PANU_SERVICE_NAME \\\n    'P','e','r','s','o','n','a','l',' ','A','d','-','h','o','c',' ', \\\n    'U','s','e','r',' ','S','e','r','v','i','c','e', 0x00\n#define PAN_PANU_SERVICE_DESCRIPTION \\\n    'P','e','r','s','o','n','a','l',' ','A','d','-','h','o','c',' ', \\\n    'U','s','e','r',' ','S','e','r','v','i','c','e', 0x00\n#define PAN_GN_SERVICE_NAME \\\n    'G','r','o','u','p','A','d','-','h','o','c',' ', \\\n    'N','e','t','w','o','r','k',' ','S','e','r','v','i','c','e', 0x00\n#define PAN_GN_SERVICE_DESCRIPTION \\\n    'P','e','r','s','o','n','a','l',' ','G','r','o','u','p',' ', \\\n    'A','d','-','h','o','c',' ','N','e','t','w','o','r','k',' ', \\\n    'S','e','r','v','i','c','e', 0x00\n#define PAN_GN_IPV4_SUBNET '1','0','.','0','.','0','.','0','/','8'\n#define PAN_GN_IPV6_SUBNET 'f','e','8','0',':',':','/','4','8'\n#define PAN_NAP_SERVICE_NAME \\\n    'N','e','t','w','o','r','k',' ','A','c','c','e','s','s',' ', \\\n    'P','o','i','n','t',' ','S','e','r','v','i','c','e', 0x00\n#define PAN_NAP_SERVICE_DESCRIPTION \\\n    'P','e','r','s','o','n','a','l',' ','A','d','-','h','o','c',' ', \\\n    'N','e','t','w','o','r','k',' ','S','e','r','v','i','c','e', 0x00\n/*---------------------------------------------------------------------------\n *  PAN_NAP_NET_ACCESS_TYPE constant\n *      0x0000: PSTN,\n *      0x0001: ISDN,\n *      0x0002: DSL,\n *      0x0003: Cable Modem,\n *      0x0004: 10Mb Ethernet,\n *      0x0005: 100Mb Ethernet,\n *      0x0006: 4Mb Token Ring,\n *      0x0007: 16Mb Token Ring,\n *      0x0008: 100Mb Token Ring,\n *      0x0009: FDDI,\n *      0x000A: GSM,\n *      0x000B: CDMA,\n *      0x000C: GPRS,\n *      0x000D: 3G,\n *      0xFFFE: other.\n */\n#define PAN_NAP_NET_ACCESS_TYPE     0x0005      /* 100Mb Ethernet */\n#define PAN_NAP_MAX_NET_ACCESS_RATE 10000000    /* 10Mb/sec */\n#define PAN_NAP_IPV4_SUBNET '1','0','.','0','.','0','.','0','/','8'\n#define PAN_NAP_IPV6_SUBNET 'f','e','8','0',':',':','/','4','8'\n\n/* Constants */\n#define NUM_BT_PKTS                         (NUM_BNEP_PANUS * 4)\n#define NUM_PAN_ARP_ADDRS                   10\n#define PAN_LINK_LOCAL_SUBNET               0xA9FE0000 /*169.254.0.0*/\n#define PAN_ROLE_PANU                       XA_ENABLED\n#define PAN_ROLE_GN                         XA_DISABLED\n#define PAN_ROLE_NAP                        XA_DISABLED\n\n\n/**********************************************************************************\n *\n *   PBAP\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define PBAP_NUM_CLIENTS                    1\n#define PBAP_NUM_SERVERS                    1\n#define PBAP_MAX_PASSWORD_LEN               20\n#define PBAP_MAX_USERID_LEN                 20\n#define PBAP_MAX_REALM_LEN                  20\n#define PBAP_MAX_APP_PARMS_LEN              30\n#define PBAP_LOCAL_PHONEBOOK_SUPPORTED      XA_ENABLED\n#define PBAP_SIM_PHONEBOOK_SUPPORTED        XA_ENABLED\n#define PULL_PHONEBOOK_TYPE                 \"x-bt/phonebook\"\n#define VCARD_LISTING_OBJECT_TYPE           \"x-bt/vcard-listing\"\n#define VCARD_OBJECT_TYPE                   \"x-bt/vcard\"\n#define PBAP_UNKNOWN_OBJECT_LENGTH          0xFFFFFFFF\n#define PBAP_FILTER_SIZE                    8\n\n\n/**********************************************************************************\n *\n *   SIM\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define SIM_SERVER                          XA_DISABLED\n#define SIM_CLIENT                          XA_DISABLED\n#define SIM_MAX_MSG_SIZE                    RF_MAX_FRAME_SIZE\n#define SIM_MAX_APDU                        276\n#define SIM_CLIENT_SECURITY_SETTINGS        (BSL_AUTHORIZATION_IN | BSL_SECURITY_L2_IN | BSL_SECURITY_L2_OUT)\n#define SIM_MAX_MSG_PARMS                   3\n\n\n/**********************************************************************************\n *\n *   TCS Binary\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define TCS_CORDLESS                        XA_DISABLED\n#define TCS_WUG_MASTER                      XA_DISABLED\n#define NUM_TCS_CONNS                       1\n#define TCS_TIMEOUT_CONNECT_VAL             (3 * 60 * 1000)\n#define TCS_TIMEOUT_OUTPROCEED_VAL          (30 * 1000)\n#define TCS_COI_MAX                         6\n#define TCS_MDATA_MAX                       (74 + TCS_COI_MAX)\n\n\n/**********************************************************************************\n *\n *   TCS Message\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n\n\n\n/**********************************************************************************\n *\n *   Intercom\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n#define ICM_SECURITY                        XA_DISABLED\n#define ICM_SCO_SETTINGS                    XA_DISABLED\n\n\n/**********************************************************************************\n *\n *   Cordless Profile\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n\n\n\n\n\n/**********************************************************************************\n *\n *   OBEX\n *\n **********************************************************************************/\n/* Value */\n\n/* Constants */\n//not documented\n#define OBEX_RFCOMM_TRANSPORT               XA_ENABLED\n#define OBEX_ROLE_CLIENT                    XA_ENABLED\n#define OBEX_DEINIT_FUNCS                   XA_ENABLED\n#define OBEX_ROLE_SERVER                    XA_ENABLED\n#define OBEX_TRANSPORT_FLOW_CTRL            XA_ENABLED\n#define OBEX_ALLOW_SERVER_TP_CONNECT        XA_ENABLED\n#define OBEX_PROVIDE_SDP_RESULTS            XA_ENABLED\n#define OBEX_SERVER_CONS_SIZE               2\n#define OBEX_DYNAMIC_OBJECT_SUPPORT         XA_ENABLED\n#define OBEX_PACKET_FLOW_CONTROL            XA_ENABLED\n#define OBEX_BODYLESS_GET                   XA_ENABLED\n#define FTP_EXPANDED_API              XA_ENABLED\n#define OPUSH_EXPANDED_API            XA_ENABLED\n\n\n/**********************************************************************************\n *\n *   Other defition without documentation\n *\n **********************************************************************************/\n\n#define PME_APP_NAME \"A2DP Sample Application\"\n\n/* ============================================================\n *  GOEP\n */\n#define GOEP_SERVER_HB_SIZE         12\n#define GOEP_MAX_TYPE_LEN           100\n\n\n\n/* ===============================\n *  Temp add by Jimmy\n */\n#define OEM_STACK           XA_DISABLED\n#define AT_HANDSFREE        XA_ENABLED\n#define AT_DUN              XA_DISABLED\n#define AT_PHONEBOOK        XA_DISABLED\n#define AT_SMS              XA_DISABLED\n#define AT_ROLE_TERMINAL    XA_ENABLED\n#define AT_ROLE_MOBILE      XA_DISABLED\n\n#define HF_CUSTOM_FEATURE_NULL              (0x00)\n//#define HF_CUSTOM_FEATURE_RESERVED          (0x01 << 0)\n#define HF_CUSTOM_FEATURE_BATTERY_REPORT    (0x03 << 0)\n#define HF_CUSTOM_FEATURE_DOCK              (0x01 << 2)\n#define HF_CUSTOM_FEATURE_SIRI_REPORT       (0x01 << 3)\n#define HF_CUSTOM_FEATURE_NR_REPORT         (0x01 << 4)\n\n//#define HF_CUSTOM_FEATURE_SUPPORT           (HF_CUSTOM_FEATURE_BATTERY_REPORT | HF_CUSTOM_FEATURE_SIRI_REPORT)\n#ifndef HF_CUSTOM_FEATURE_SUPPORT\n#ifdef SUPPORT_SIRI\n#define HF_CUSTOM_FEATURE_SUPPORT           (HF_CUSTOM_FEATURE_BATTERY_REPORT | HF_CUSTOM_FEATURE_SIRI_REPORT)\n#else\n#define HF_CUSTOM_FEATURE_SUPPORT           (HF_CUSTOM_FEATURE_BATTERY_REPORT)\n#endif /*SUPPORT_SIRI*/\n#endif /*HFt _CUSTOM_FEATURE_SUPPORT*/\n\n#if HF_CUSTOM_FEATURE_SUPPORT\n#define HF_CUSTOM_VENDOR_ID     0x0000\n#define HF_CUSTOM_PRODUCT_ID    0x0000\n#define HF_CUSTOM_VERSION_ID    0x0100\n#endif\n\n#define __BT_RECONNECT__\n#define __BT_HFP_RECONNECT__\n#define __BT_SNIFF__\n//#define __BT_ONE_BRING_TWO__\n//#define __BT_REAL_ONE_BRING_TWO__\n#define __EARPHONE__\n#define __AUTOPOWEROFF__\n#endif /* __OVERIDE_H */\n\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/packer.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __PACKER_H__\n#define __PACKER_H__\n\n#define WRITE_INT8(offset, p, data)                        \\\n  ( *(INT8U *)(((INT8U *)p) + offset) = (INT8U)data )\n\n#define WRITE_INT16(offset, p, data)                       \\\n  WRITE_INT8(offset,     p, (((INT16U)data) & 0xFF));              \\\n  WRITE_INT8((offset+1), p, ((((INT16U)data) >> 8) & 0xFF))\n\n/* convert parameters into single data*/\n#define READ_INT8(offset, p)                              \\\n  ( *(INT8U *)(((INT8U *)p) + offset) )\n\n#define READ_INT16(offset, p)                             \\\n  (INT16U )(READ_INT8(offset, p) +                        \\\n         (READ_INT8(offset+1, p) << 8))\n         \n#endif /* __PACKER_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/pbap.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __PBAP_H__\n#define __PBAP_H__\n\n#endif /* __PBAP_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/pbap_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __PBAP_I_H__\n#define __PBAP_I_H__\n\n#include \"obex_i.h\"\n\n#define PULL_PHONEBOOK_TYPE\t\t\"x-bt/phonebook\"\n#define PULL_LISTING_TYPE\t\t\t\"x-bt/vcard-listing\"\n#define PULL_VCARD_ENTRY_TYPE\t\t\"x-bt/vcard\"\n\ntypedef uint8 vcard_sort_type;\n#define VCARD_SORT_ORDER_INDEXED\t\t0x00       /* Indexed sorting */\n#define VCARD_SORT_ORDER_ALPHA\t\t0x01       /* Alphabetical sorting */\n#define VCARD_SORT_ORDER_PHONETICAL\t0x02       /* Phonetical sorting */\n\ntypedef uint8 vcard_search_attribute;\n#define VCARD_SEARCH_ATTRIB_NAME\t\t0x00        /* Search by Name */\n#define VCARD_SEARCH_ATTRIB_NUMBER\t0x01        /* Search by Number */\n#define VCARD_SEARCH_ATTRIB_SOUND\t\t0x02        /* Search by Sound */\n\nstruct vcard_filter{\n\tuint32 low;\n\tuint32 high;\n};\n\n#define VCARD_FILTER_VERSION\t\t0    /* Version (Bit 0) */\n#define VCARD_FILTER_FN\t\t\t1    /* Formatted Name (Bit 1) */\n#define VCARD_FILTER_N\t\t\t\t2    /* Structured Presentation of Name (Bit 2) */\n#define VCARD_FILTER_PHOTO\t\t3    /* Associated Image or Photo (Bit 3) */\n#define VCARD_FILTER_BDAY\t\t\t4    /* Birthday (Bit 4) */\n#define VCARD_FILTER_ADR\t\t\t5    /* Delivery Address (Bit 5) */\n#define VCARD_FILTER_LABEL\t\t6    /* Delivery (Bit 6) */\n#define VCARD_FILTER_TEL\t\t\t7    /* Telephone (Bit 7) */\n#define VCARD_FILTER_EMAIL\t\t8    /* Electronic Mail Address (Bit 8) */\n#define VCARD_FILTER_MAILER\t\t9    /* Electronic Mail (Bit 9) */\n#define VCARD_FILTER_TZ\t\t\t10   /* Time Zone (Bit 10) */\n#define VCARD_FILTER_GEO\t\t\t11   /* Geographic Position (Bit 11) */\n#define VCARD_FILTER_TITLE\t\t12   /* Job (Bit 12) */\n#define VCARD_FILTER_ROLE\t\t\t13   /* Role within the Organization (Bit 13) */\n#define VCARD_FILTER_LOGO\t\t\t14   /* Organization Logo (Bit 14) */\n#define VCARD_FILTER_AGENT\t\t15   /* vCard of Person Representing (Bit 15) */\n#define VCARD_FILTER_ORG\t\t\t16   /* Name of Organization (Bit 16) */\n#define VCARD_FILTER_NOTE\t\t\t17   /* Comments (Bit 17) */\n#define VCARD_FILTER_REV\t\t\t18   /* Revision (Bit 18) */\n#define VCARD_FILTER_SOUND\t\t19   /* Pronunciation of Name (Bit 19) */\n#define VCARD_FILTER_URL\t\t\t20   /* Uniform Resource Locator (Bit 20) */\n#define VCARD_FILTER_UID\t\t\t21   /* Unique ID (Bit 21) */\n#define VCARD_FILTER_KEY\t\t\t22   /* Public Encryption Key (Bit 22) */\n#define VCARD_FILTER_NICKNAME\t\t23   /* Nickname (Bit 23) */\n#define VCARD_FILTER_CATEGORIES\t24   /* Categories (Bit 24) */\n#define VCARD_FILTER_PRODID\t\t25   /* Product Id (Bit 25) */\n#define VCARD_FILTER_CLASS\t\t26   /* Class Information (Bit 26) */\n#define VCARD_FILTER_SORT_STRING\t27   /* Sort string (Bit 27) */\n#define VCARD_FILTER_TIMESTAMP\t28   /* Time stamp (Bit 28) */\n/* Bits 29-38 Reserved for future use */\n#define VCARD_FILTER_PROPRIETARY\t39   /* Use of a proprietary filter (Bit 39) */ \n/* Bits 40-63 Reserved for proprietary filter usage */\n\ntypedef uint8 vcard_format;\n#define VCARD_FORMAT_21        0x00       /* Version 2.1 format */\n#define VCARD_FORMAT_30        0x01       /* Version 3.0 format */\n\ntypedef uint8 app_parameter_tag;\n#define PBAP_TAG_ORDER\t\t\t\t0x01  /* 1-byte, 0x00 (indexed), 0x01 (alpha), or 0x02 (phonetic) */\n#define PBAP_TAG_SEARCH_VALUE\t\t0x02  /* Variable length text string */\n#define PBAP_TAG_SEARCH_ATTRIB\t0x03  /* 1-byte, 0x00 (Name), 0x01 (Number), or 0x02 (Sound) */\n#define PBAP_TAG_MAX_LIST_COUNT\t0x04  /* 2-bytes, 0x0000 to 0xFFFF */\n#define PBAP_TAG_LIST_OFFSET\t\t0x05  /* 2-bytes, 0x0000 to 0xFFFF */\n#define PBAP_TAG_FILTER\t\t\t0x06  /* 8-bytes, 64 bit mask */\n#define PBAP_TAG_FORMAT\t\t\t0x07  /* 1-byte, 0x00 = 2.1, 0x01 = 3.0 */\n#define PBAP_TAG_PHONEBOOK_SIZE\t0x08  /* 2-bytes, 0x0000 to 0xFFFF */\n#define PBAP_TAG_MISSED_CALLS\t\t0x09  /* 1-byte, 0x00 to 0xFF */\n\nenum pbap_state{\n\tPBAP_TP_CONNECTING,\n\tPBAP_TP_DISCONNECTING,\n\tPBAP_IDLE,\t\t\t\t//transport connection idle, connection idle\n\tPBAP_DISCONNECTING,\t//transport connection established, connection discarding\n\tPBAP_TP_CONNECTED,\t\t//transport connection established, connection idle\n\tPBAP_CONNECTING,\t\t//transport connection established, connection establishing\n\tPBAP_CONNECTED,\t\t//transport connection established, connection established\n\tPBAP_GET,\n\tPBAP_ABORT,\n\tPBAP_SET_PATH\n};\n\nenum pbap_event{\n\tPBAP_EVENT_IDLE,\n\tPBAP_EVENT_TP_CONNECTED,\n\tPBAP_EVENT_CONNECTED,\n\tPBAP_EVENT_CONTINUE,\n\tPBAP_EVENT_COMPLETE,\n#if OBEX_AUTHENTICATION == 1\n\tPBAP_EVENT_AUTH,\n#endif\n\tPBAP_EVENT_NO_CONNECTION,\n\tPBAP_EVENT_FAILED,\n\tPBAP_EVENT_TIMEOUT\n};\n\ntypedef uint8 pbap_opcode;\n#define PBAP_OP_NULL\t\t\t0x00\n#define PBAP_OP_CONNECT\t\t0x01\n#define PBAP_PULL_PHONEBOOK\t0x02\n#define PBAP_PULL_VCARDLIST\t0x03\n#define PBAP_PULL_VCARDENTRY\t0x04\n#define PBAP_OP_SET_PATH\t\t0x05\n#define PBAP_OP_ABORT\t\t\t0x06\n#define PBAP_OP_DISCONNECT\t0x07\n\nstruct pbap_pull_phonebook_parms{\n\tchar name[30];\n\tstruct vcard_filter filter;\n\tuint8 format;\n\tuint16 maxListCount;\n\tuint16 listStartOffset;\n};\n\nstruct pbap_pull_list_parms{\n\tchar folder[10];\n\tuint8 order;\n\tchar searchValue[20];\n\tuint8 searchAttribute;\n\tuint16 maxListCount;\n\tuint16 listStartOffset;\n};\n\nstruct pbap_pull_entry_parms{\n\tchar name[10];\n\tstruct vcard_filter filter;\n};\n\nstruct pbap_set_path_parms{\n\tchar path[10];\n};\n\nstruct pbap_client{\n\tpbap_opcode opcode;\n\tvoid (*pbap_client_callback)(enum pbap_event event);\n\n\t/*struct pbap_pull_phonebook_parms *pb_parms;\n\tstruct pbap_pull_list_parms *list_parms;\n\tstruct pbap_pull_entry_parms *entry_parms;\n\tstruct pbap_set_path_parms *setPath_parms;*/\n\tvoid *parms;\n\n\tuint8 *recData;\n\tuint16 recLen;\n};\n\n#if OBEX_AUTHENTICATION == 1\n#include \"md5.h\"\n#endif\n\nstruct pbap_control_t{\n\tenum pbap_state state;\n\t\n\tuint8 connectID[4];\n#if OBEX_AUTHENTICATION == 1\n\tuint8 challenge[AUTH_NONCE_LEN];\n\tuint8 response[AUTH_NONCE_LEN];\n\tuint8 challenge_length;\n#endif\n\tstruct pbap_client *pbap_client_app;\n};\n\n#define PBAP_SEM_TIMEOUT\t100\n\nint8 pbap_connectReq(void);\nint8 pbap_disconnectReq(void);\n//void pbap_pull_phonebook(struct pbap_pull_phonebook_parms *parms);\n//void pbap_set_path(char *pathName);\n//void pbap_pull_vCardListing(struct pbap_pull_list_parms *parms);\n//void pbap_pull_vCardEntry(struct pbap_pull_entry_parms *parms);\nint8 pbap_pull_phonebook(void);\nint8 pbap_set_path(void);\nint8 pbap_pull_vCardListing(void);\nint8 pbap_pull_vCardEntry(void);\nint8 pbap_abort(void);\n\nvoid pbap_client_init(struct pbap_client *client);\nvoid pbap_client_exit(void);\nvoid vcard_filter_set_bit(struct vcard_filter *filter, uint8 bit);\nvoid vcard_filter_clear_bit(struct vcard_filter *filter, uint8 bit);\nenum pbap_state pbap_getState(void);\nint8 pbap_get_continue(void);\n\n#endif /* __PBAP_I_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/platform_deps.h",
    "content": "\n/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __PLATFORM_DEPS_H__\n#define __PLATFORM_DEPS_H__\n\n#if defined(_WIN32)\n#include \"win32_os.h\"\n#else\n#include \"bes_os.h\"\n#endif\n\n// ------ HCI ------ //\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\nvoid Plt_HciInit(void);\nvoid Plt_HciSendData(unsigned char type, unsigned short cmd_conn, unsigned short len, unsigned char *buffer);\nvoid Plt_HciSendBuffer(unsigned char type, unsigned char *buff, int len);\nvoid Plt_NotifyScheduler(void);\nvoid Plt_LockHCIBuffer(void);\nvoid Plt_UNLockHCIBuffer(void);\n\n// ------ OS ------ //\n//typedef enum {\n//    OS_STK_EVT_STACK_READY = 0,\n//    OS_STK_EVT_NOTIFY_EVM, // 1\n//    OS_STK_EVT_EXIT_MAINLOOP, // 2\n//}OS_STACK_EVENT_T;\n\nchar OS_Init(void);\nvoid OS_LockStack(void);\nvoid OS_UnlockStack(void);\nunsigned char OS_LockIsExist(void);\nvoid OS_StopHardware(void);\nvoid OS_ResumeHardware(void);\n//OS_STACK_EVENT_T OS_WaitEvent(unsigned int timeout_ms);\n//char OS_SendEvent(OS_STACK_EVENT_T event);\nvoid OS_NotifyEvm(void);\nbool OS_WaitEvm(unsigned int timeout_ms);\n\n// ------ TIMER ------ //\nvoid Plt_TimerWrapperInit(void);\nvoid Plt_TimerWrapperStart(unsigned int ms);\nvoid Plt_TimerWrapperStop(void);\nvoid Plt_UNLockTimerWrapper(void);\nvoid Plt_LockTimerWrapper(void);\nunsigned int Plt_GetTicks(void);\nunsigned int Plt_GetTicksMax(void);\n\n#if defined(__cplusplus)\n}\n#endif\n#endif /* __PLATFORM_DEPS_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/rfcomm.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __RFCOMM_H__\n#define __RFCOMM_H__\n\n#include \"rfcomm_i.h\"\n#include \"bt_co_list.h\"\n\n#define RFCOMM_CONN_TIMEOUT //(HZ * 30)\n#define RFCOMM_DISC_TIMEOUT //(HZ * 20)\n#define RFCOMM_AUTH_TIMEOUT //(HZ * 25)\n\n#define RFCOMM_DEFAULT_MTU      672\n#define RFCOMM_DEFAULT_CREDITS  7\n\n#define RFCOMM_MAX_CREDITS\t40\n\n#define RFCOMM_PPB_HEAD_RESERVE\t8\n#define RFCOMM_PPB_TAIL_RESERVE\t2\n#define RFCOMM_PPB_RESERVE  (RFCOMM_PPB_HEAD_RESERVE + RFCOMM_PPB_TAIL_RESERVE)\n\n#define RFCOMM_SABM\t0x2f\n#define RFCOMM_DISC\t0x43\n#define RFCOMM_UA\t0x63\n#define RFCOMM_DM\t0x0f\n#define RFCOMM_UIH\t0xef\n\n#define RFCOMM_TEST\t0x08\n#define RFCOMM_FCON\t0x28\n#define RFCOMM_FCOFF\t0x18\n#define RFCOMM_MSC\t0x38\n#define RFCOMM_RPN\t0x24\n#define RFCOMM_RLS\t0x14\n#define RFCOMM_PN\t0x20\n#define RFCOMM_NSC\t0x04\n\n#define RFCOMM_V24_FC\t0x02\n#define RFCOMM_V24_RTC\t0x04\n#define RFCOMM_V24_RTR\t0x08\n#define RFCOMM_V24_IC\t0x40\n#define RFCOMM_V24_DV\t0x80\n\n#define RFCOMM_RPN_BR_2400\t0x0\n#define RFCOMM_RPN_BR_4800\t0x1\n#define RFCOMM_RPN_BR_7200\t0x2\n#define RFCOMM_RPN_BR_9600\t0x3\n#define RFCOMM_RPN_BR_19200\t0x4\n#define RFCOMM_RPN_BR_38400\t0x5\n#define RFCOMM_RPN_BR_57600\t0x6\n#define RFCOMM_RPN_BR_115200\t0x7\n#define RFCOMM_RPN_BR_230400\t0x8\n\n#define RFCOMM_RPN_DATA_5\t0x0\n#define RFCOMM_RPN_DATA_6\t0x1\n#define RFCOMM_RPN_DATA_7\t0x2\n#define RFCOMM_RPN_DATA_8\t0x3\n\n#define RFCOMM_RPN_STOP_1\t0\n#define RFCOMM_RPN_STOP_15\t1\n\n#define RFCOMM_RPN_PARITY_NONE\t0x0\n#define RFCOMM_RPN_PARITY_ODD\t0x1\n#define RFCOMM_RPN_PARITY_EVEN\t0x3\n#define RFCOMM_RPN_PARITY_MARK\t0x5\n#define RFCOMM_RPN_PARITY_SPACE\t0x7\n\n#define RFCOMM_RPN_FLOW_NONE\t0x00\n\n#define RFCOMM_RPN_XON_CHAR\t0x11\n#define RFCOMM_RPN_XOFF_CHAR\t0x13\n\n#define RFCOMM_RPN_PM_BITRATE\t\t0x0001\n#define RFCOMM_RPN_PM_DATA\t\t0x0002\n#define RFCOMM_RPN_PM_STOP\t\t0x0004\n#define RFCOMM_RPN_PM_PARITY\t\t0x0008\n#define RFCOMM_RPN_PM_PARITY_TYPE\t0x0010\n#define RFCOMM_RPN_PM_XON\t\t0x0020\n#define RFCOMM_RPN_PM_XOFF\t\t0x0040\n#define RFCOMM_RPN_PM_FLOW\t\t0x3F00\n\n#define RFCOMM_RPN_PM_ALL\t\t0x3F7F\n\n#define RFCOMM_HANDLE_UNUSED        0xffffffff\n#define RFCOMM_HANDLE_MAX_VALUE     0xffffff00\n\n\nstruct rfcomm_hdr {\n\tuint8 addr;\n\tuint8 ctrl;\n\tuint8 len;    // Actual size can be 2 bytes\n}__attribute__ ((packed));\n\nstruct rfcomm_cmd {\n\tuint8 addr;\n\tuint8 ctrl;\n\tuint8 len;\n\tuint8 fcs;\n}__attribute__ ((packed));\n\nstruct rfcomm_mcc {\n\tuint8 type;\n\tuint8 len;\n}__attribute__ ((packed));\n\nstruct rfcomm_pn {\n\tuint8  dlci;\n\tuint8  flow_ctrl;\n\tuint8  priority;\n\tuint8  ack_timer;\n\tuint16 mtu;\n\tuint8  max_retrans;\n\tuint8  credits;\n}__attribute__ ((packed));\n\nstruct rfcomm_rpn {\n\tuint8  dlci;\n\tuint8  bit_rate;\n\tuint8  line_settings;\n\tuint8  flow_ctrl;\n\tuint8  xon_char;\n\tuint8  xoff_char;\n\tuint16 param_mask;\n}__attribute__ ((packed));\n\nstruct rfcomm_rls {\n\tuint8  dlci;\n\tuint8  status;\n}__attribute__ ((packed));\n\nstruct rfcomm_msc {\n\tuint8  dlci;\n\tuint8  v24_sig;\n}__attribute__ ((packed));\n\nenum rfcomm_session_state_enum {\n    SESSION_CLOSE,          /*l2cap connection closed, wait for openning, and then can send out sabm request*/\n    SESSION_CONNECT,      /*l2cap channel created*/\n    SESSION_WAITING_OPEN, /*has sent sabm of dlci 0, wait ack*/\n    SESSION_OPEN,            /* rfcomm session created, means dlci 0 created ok */\n    SESSION_CLOSING       /* all dlc disced, dlci 0 wait to close */\n};\n\nstruct rfcomm_session {\n    struct list_node list;\n\n    uint8              initiator;\n    uint32          l2cap_handle;\n\n    enum rfcomm_session_state_enum state;\n\n    struct bdaddr_t remote;\n    struct list_node dlcs;\n};\n\n\nenum rfcomm_dlc_state_enum {\n    DLC_CLOSE,\n    DLC_CONFIG,     /*in dlc parameter config process*/\n    DLC_CONNECTING, /* config passed, then send sabm,waiting for ack */\n    DLC_OPEN,\n    DLC_DISCONNECT /*in dlc disconnection process*/\n};\n\nstruct rfcomm_dlc {\n\n    struct list_node      list;\n    struct rfcomm_session *session;\n    struct pp_buff_head   tx_queue;\n\n    uint32          rfcomm_handle;\n    uint8            dlci;\n    uint8            addr;\n    bool           local_trx_ready;\n    bool           peer_trx_ready;\n\n    uint16          mtu;\n    uint8            priority;\n    uint8            v24_sig;\n    uint8            cfc;   /* 0: no flow control; other: the credits we give remote;*/\n\n    uint8          rx_credits;  /*the remote device's tx credits now*/\n    uint8          tx_credits;  /*our tx credits*/\n    uint8          credit_give_limit;\n    osMutexId      creditMutex; //!< used to manage the remote device's tx credit\n\n    enum rfcomm_dlc_state_enum state;\n\n    rfcomm_notify_callback_t rfcomm_notify_callback;\n    rfcomm_datarecv_callback_t rfcomm_datarecv_callback;\n\n    /*\n     * for used by uplayer to it's own private info, mainly used for\n     * hfp channel address, hsp channel, spp channel, etc...\n     */\n    void *priv;\n    struct {\n        void *priv;\n    } context;\n};\n\nstruct rfcomm_registered_server_item_t {\n    struct list_node list;\n    int8 server_channel;\n    osMutexId creditMutex;\n    uint8 initial_credits;\n    uint8 credit_give_limit;\n    rfcomm_notify_callback_t rfcomm_notify_callback;\n    rfcomm_datarecv_callback_t rfcomm_datarecv_callback;\n    struct rfcomm_dlc *dlc;\n    /*\n     * used for server's private info\n     */\n    void *priv;\n};\n\n/* flow control states */\n#define RFCOMM_CFC_DISABLED 0\n#define RFCOMM_CFC_ENABLED  RFCOMM_DEFAULT_CREDITS\n\n#define RFCOMM_CFG_SESSIONS_MAX   5    /* means how many l2cap channel */\n\n#endif /* __RFCOMM_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/rfcomm_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __RFCOMM_I_H__\n#define __RFCOMM_I_H__\n\n#include \"co_ppbuff.h\"\n#include \"l2cap_i.h\"\n#include \"cmsis_os.h\"\n\nenum rfcomm_event_enum {\n    RFCOMM_OPENED,\n    RFCOMM_NEW_OPENED,\n    RFCOMM_CLOSED,\n    RFCOMM_QUERY_FAIL,\n    RFCOMM_TX_FINISHED\n};\n\nstruct rfcomm_config_t {\n    uint8 initial_credit;\n    uint8 credit_give_limit;\n    osMutexId creditMutex;\n};\n\ntypedef void (*rfcomm_notify_callback_t)(enum rfcomm_event_enum event,\n                                    uint32 rfcomm_handle,\n                                    void *pdata, uint8 reason, void *priv);\n\ntypedef void (*rfcomm_datarecv_callback_t)(uint32 rfcomm_handle,\n                                            struct pp_buff *ppb, void *priv);\n\nstruct rfcomm_ctx_input {\n    struct ctx_content ctx;\n    struct bdaddr_t *remote;\n    uint32 l2cap_handle;\n    uint8  server_channel;\n    rfcomm_notify_callback_t rfcomm_notify_callback;\n    rfcomm_datarecv_callback_t rfcomm_datarecv_callback;\n};\n\nstruct rfcomm_ctx_output {\n    uint32 rfcomm_handle;\n};\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint8 rfcomm_init(void);\n\nint8 rfcomm_register_server(int8 server_channel,\n                            rfcomm_notify_callback_t notify_callback,\n                            rfcomm_datarecv_callback_t datarecv_callback,\n                            void *priv);\n\nint8 rfcomm_register_server_ex(int8 server_channel,\n                                        rfcomm_notify_callback_t notify_callback,\n                                        rfcomm_datarecv_callback_t datarecv_callback,\n                                        void *priv,\n                                        struct rfcomm_config_t *cfg);\n\nuint32 rfcomm_open(struct bdaddr_t *remote, int8 server_channel,\n                   rfcomm_notify_callback_t notify_callback,\n                   rfcomm_datarecv_callback_t datarecv_callback);\n\nuint32 rfcomm_open_ex(struct bdaddr_t *remote, int8 server_channel,\n                               rfcomm_notify_callback_t rfcomm_notify_callback,\n                               rfcomm_datarecv_callback_t rfcomm_datarecv_callback,\n                               uint8 initial_credits,\n                               uint8 credit_give_limit);\n\nint8 rfcomm_send (uint32 rfcomm_handle, uint8 *data, uint32 datalen, void *priv);\n\nint8 rfcomm_get_server_channel(uint32 rfcomm_handle);\n\n//int8 rfcomm_send_ppb (uint32 rfcomm_handle, struct pp_buff *ppb);\n\n//struct pp_buff *rfcomm_data_ppb_alloc (struct rfcomm_session *s, uint32 datalen);\n\nint8 rfcomm_close (uint32 rfcomm_handle);\n\nint8 rfcomm_unregister_server (int8 server_channel);\n\nint rfcomm_l2cap_notify_callback(enum l2cap_event_enum event,\n                            uint32 l2cap_handle, void *pdata, uint8 reason);\n\nvoid rfcomm_l2cap_datarecv_callback(uint32 l2cap_handle, struct pp_buff *ppb);\n\nuint32 rfcomm_get_l2cap_handle(uint32 rfcomm_handle);\n\nuint32 rfcomm_save_ctx(uint32 rfcomm_handle, uint8_t *buf, uint32_t buf_len);\n\nuint32 rfcomm_restore_ctx(struct rfcomm_ctx_input *input, struct rfcomm_ctx_output *output);\nvoid rfcomm_pts_register_dlci2_channel1(void);\nvoid pts_rfcomm_close(void);\nvoid pts_rfcomm_close_dlci0(void);\nvoid pts_rfcomm_send_data(void);\nstruct rfcomm_session *rfcomm_session_search_l2caphandle(uint32 l2cap_handle);\nstruct rfcomm_session *rfcomm_session_search_bdaddr (struct bdaddr_t *bdaddr);\nstruct rfcomm_dlc *rfcomm_dlc_search(struct rfcomm_session *s, uint8 dlci);\nconst char *rfcomm_event2str(enum rfcomm_event_enum event);\nuint32 rfcomm_get_rfcomm_handle(struct bdaddr_t *remote,int8 server_channel);\n\nstruct rfcomm_registered_server_item_t *rfcomm_registered_server_search(\n    int8 server_channel );\n\nint8 rfcomm_send_credits(struct rfcomm_session *s, uint8 addr, uint8 credits);\nbool rfcomm_l2cap_channle_is_creating(struct bdaddr_t *remote);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __RFCOMM_I_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/sco.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __SCO_H__\n#define __SCO_H__\n\n#include \"sco_i.h\"\n\nstruct sco_item_t {\n    struct list_node list;\n    struct bdaddr_t remote_bdaddr;\n\n    sco_notify_callback_t sco_notify_callback;\n\n    void *priv;\n};\n\n#endif /* __SCO_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/sco_i.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __SCO_I_H__\n#define __SCO_I_H__\n\n#include \"btlib_type.h\"\n\n/* notify upper layer */\nenum sco_event_enum{\n    SCO_OPENED,\n    SCO_CLOSED\n};\n\ntypedef void (*sco_notify_callback_t)(enum sco_event_enum event, void *pdata, void *link_host);\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nint8 sco_register_link(struct bdaddr_t *bdaddr,\n                        sco_notify_callback_t notify_callback, void *link_host);\n\nint8 sco_open_link(struct bdaddr_t *bdaddr,\n                        sco_notify_callback_t notify_callback, void *link_host);\n\nint8 sco_close_link(struct bdaddr_t *bdaddr1, uint8 reason);\n\nint8 sco_unregister_link(struct bdaddr_t *bdaddr);\n\nint8 sco_init (void);\n\nint8 sco_exit (void);\n\nvoid sco_conn_opened_ind(struct bdaddr_t *bdaddr_remote);\n\nvoid sco_conn_closed_ind(struct bdaddr_t *bdaddr_remote);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __SCO_I_H__ */"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/sdp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SDP_H__\n#define __SDP_H__\n\n#include \"btlib_more.h\"\n#include \"l2cap_i.h\"\n#include \"bt_co_list.h\"\n#include \"data_link.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SDP_PRIVATE_RECORD_LIST 1\n#define SDP_INVALID_HANDLE 0xFFFFFFFF\n\n/*\n    @brief PSM defination\n*/\n#define SDP_PSM_SDP        PSM_SDP\n#define SDP_PSM_RFCOMM     PSM_RFCOMM\n#define SDP_PSM_AVCTP      PSM_AVCTP\n#define SDP_PSM_AVDTP      PSM_AVDTP\n\n/*\n    @brief SDP data element type_size_table defination\n    bit0-5: len\n    bit6: 1 -- type_length is value\n    bit7: 0 -- len represent the size of data; 1 -- len represent the data size is contained\n            in the additional len bytes\n*/\n#define SDP_DATA_LENGTH_MASK        0x3F\n#define SDP_TYPE_SIZE_VALUE         0x40\n#define SDP_DATA_CONTAINED_IN_BYTE  0x80\n\n/*\n    @brief PDU defination\n*/\n#define SDP_PDU_ID_OFFSET        0\n#define SDP_TRANS_ID_OFFSET      1\n#define SDP_PARAM_LEN_OFFSET     3\n#define SDP_PDU_LEN              5\n\n/*\n    @brief sdp_service_search_request defination\n        ServiceSearchPattern        -- varies bytes\n        MaximumServiceRecordCount   -- 2 bytes\n        ContinuationState           -- 1-17 bytes\n*/\n#define SDP_SERVICE_SEARCH_MIN_SIZE  8\n#define SDP_MAX_SER_RECORD_COUNT_LEN 2\n\n/*\n    @brief sdp_service_attribute_request defination\n        ServiceRecordHandle         -- 4 bytes\n        MaximumAttributeByteCount   -- 2 bytes\n        AttributeIDList             -- varies bytes\n        ContinuationState           -- 1-17 bytes\n*/\n#define SDP_SERVICE_ATTR_MIN_SIZE        12\n#define SDP_SER_RECORD_HANDLE_OFFSET     0\n#define SDP_SER_RECORD_HANDLE_LEN        4\n#define SDP_MAX_ATTR_BYTE_COUNT_OFFSET   4\n#define SDP_MAX_ATTR_BYTE_COUNT_LEN      2\n#define SDP_SER_ATTR_REQ_ID_LIST_OFFSET  6\n\n/*\n    @brief sdp_service_search_attribute_request defination\n        ServiceSearchPattern        -- varies bytes\n        MaximumAttributeByteCount   -- 2 bytes\n        AttributeIDList             -- varies bytes\n        ContinuationState           -- 1-17 bytes\n*/\n#define SDP_SERVICE_SEARCH_ATTR_MIN_SIZE    13\n//#define SDP_MAX_ATTR_BYTE_COUNT_LEN  2\n\n/*\n    @brief Data element type defination\n    Refer to Table3.1 in Core_v5.0.pdf\n*/\n#define DE_TYPE_MASK 0x1F\n#define DE_TYPE_OFFSET 3\nenum data_element_type {\n    DE_TYPE_NIL = 0,\n    DE_TYPE_UINT = 1,\n    DE_TYPE_S2CMPLINT = 2,\n    DE_TYPE_UUID = 3,\n    DE_TYPE_TEXTSTR = 4,\n    DE_TYPE_BOOL = 5,\n    DE_TYPE_DESEQ = 6,\n    DE_TYPE_DEALT = 7,\n    DE_TYPE_URL = 8,\n};\n\n/*\n    @brief Data element size index defination\n    Refer to Table3.2 in Core_v5.0.pdf\n*/\n#define DE_SIZE_MASK    0x07\nenum data_element_size {\n    DE_SIZE_0 = 0,\n    DE_SIZE_1 = 1,\n    DE_SIZE_2 = 2,\n    DE_SIZE_3 = 3,\n    DE_SIZE_4 = 4,\n    DE_SIZE_5 = 5,\n    DE_SIZE_6 = 6,\n    DE_SIZE_7 = 7,\n};\n\n/*\n    @brief SDP pdu id\n    Refer to 4.2 in Core_v5.0.pdf\n*/\nenum sdp_pdu_id {\n    SDP_PDU_ErrorResponse = 0x01,\n    SDP_PDU_ServiceSearchRequest = 0x02,\n    SDP_PDU_ServiceSearchResponse = 0x03,\n    SDP_PDU_ServiceAttributeRequest = 0x04,\n    SDP_PDU_ServiceAttributeResponse = 0x05,\n    SDP_PDU_ServiceSearchAttributeRequest = 0x06,\n    SDP_PDU_ServiceSearchAttributeResponse = 0x07,\n};\n\n/*\n    @brief SDP Error Code\n    Refer to 4.4.1 SDP_ErrorResponse PDU\n*/\nenum sdp_error_code {\n    SDP_Reserved_for_future_use = 0x0000,\n    SDP_Invalid_SDP_version = 0x0001,\n    SDP_Invalid_Service_Record_Handle = 0x0002,\n    SDP_Invalid_request_syntax = 0x0003,\n    SDP_Invalid_PDU_Size = 0x0004,\n    SDP_Invalid_Continuation_State = 0x0005,\n    SDP_Insufficient_Resources_to_satisfy_Request = 0x0006,\n};\n\n/*\n    @brief SDP Attribute ID Type\n*/\n#define ATTR_ID_TYPE_RECORED_HANDLE \\\n    0x00,0x00\n\n/*\n    @brief SDP callback event\n*/\nenum sdp_event {\n    SDP_EVT_TX_HANDLED = 0,\n    SDP_EVT_RESPONSE_ERROR,\n    SDP_EVT_CHANNEL_CLOSE,\n    SDP_EVT_TX_TIMEOUT,\n    SDP_EVT_RESPONSE,\n    SDP_EVT_UNKNOWN_ERROR,\n};\n\n/* \n    @brief SDP callback params\n*/\nstruct sdp_callback_params {\n    enum sdp_error_code error_code;\n    struct sdp_control_t *sdp_ctl;\n    struct {\n        uint8 *data;\n        uint32 data_len;\n        enum sdp_pdu_id response_pdu_id;\n        union {\n            struct {\n                uint8 *service_record_handle_list_buff;\n                uint32 service_record_handle_list_buff_len;\n                uint16 total_service_record_count;\n                uint16 current_service_record_count;\n                uint8 cont_state_len;\n            }service_search_response;\n            struct {\n                uint8 *attribute_list_buff;\n                uint32 attribute_list_buff_len;\n                uint16 attribute_list_bytes_count;\n                uint8 cont_state_len;\n            }service_search_attr_response;\n        };\n    } response;\n};\n\n/* \n    @brief SDP connection role\n*/\nenum sdp_connection_role {\n    SDP_ROLE_CLIENT = 0,\n    SDP_ROLE_SERVER,\n};\n\n/*\n    @brief SDP connection state \n*/\nenum sdp_connection_state {\n    SDP_ST_STANDBY = 0,\n    SDP_ST_CONNECTING,\n    SDP_ST_CONNECTED,\n    SDP_ST_CLT_QUERING,\n    SDP_ST_DISCONNETING,\n};\n\n/*\n    @brief SDP tx state \n*/\nenum sdp_tx_state {\n    SDP_TX_IDLE = 0,\n    SDP_TX_BUSY,\n};\n\n/*\n    @brief SDP ctl state\n*/\nenum sdp_ctl_state {\n    SDP_CTL_FREE,\n    SDP_CTL_INUSE\n};\n\n/*\n    @brief SDP server record attribute\n*/\nstruct sdp_server_record_attr {\n    uint16 attr_id;\n    uint16 data_len;\n    const uint8 *data;\n    uint16 resv;\n} __attribute__ ((__packed__));\n\n/*\n    @brief SDP server record\n*/\nstruct sdp_server_record {\n    struct list_node node;\n    uint32 record_handle;\n    uint32 attr_list_count;\n    struct sdp_server_record_attr *attr_list;\n};\n\n/*\n    @brief SDP Request Callback\n*/\ntypedef void (*T_sdp_request_callback)(enum sdp_event event, struct sdp_callback_params *params, void *priv);\n\n/*\n    @brief SDP Request\n*/\nstruct sdp_request {\n    struct list_node node;\n    void *priv;\n    uint32 request_len;\n    uint8 *request_data;\n    struct bdaddr_t remote;\n    enum sdp_pdu_id type;\n    T_sdp_request_callback callback;\n};\n\n#define SDP_RESPONSE_SIZE (1024)\n#define SDP_RESPONSE_HANDLES_SIZE (14)\n\n#define SDP_PACKET_HEADER_LEN (5)\n#define SDP_PACKET_CONT_FIELD_LEN (1 + sizeof(SDP_CONT_STATE))\n#define SDP_PACKET_MAX_RSP_SDU_SIZE (128)\n\n/*\n    @brief SDP control struct\n*/\nstruct sdp_control_t\n{\n    struct list_node node;\n    enum sdp_connection_state conn_state;\n    enum sdp_ctl_state ctl_state;\n    enum sdp_connection_role role;\n    enum sdp_tx_state tx_state;\n    uint32 l2cap_handle;\n    struct bdaddr_t remote;\n\n    // for server\n    uint32 max_attr_bytes_count;\n    uint16 response_trans_id;\n#if defined(SDP_PRIVATE_RECORD_LIST)\n    struct list_node record_list; \n#endif\n    uint16 refer_count;\n    uint8 response_pdu_header[SDP_PACKET_HEADER_LEN];\n    uint32 response_handle_buff[SDP_RESPONSE_HANDLES_SIZE];\n    uint8 response_handle_count;\n    uint8 response_handle_offset;\n    uint8 response_buff[SDP_RESPONSE_SIZE];\n    uint32 response_buff_offset;\n    uint32 response_buff_len;\n    uint8 response_cont_data_len;\n    uint8 response_cont_data[16+1]; // 1 byte more to store cont data len\n    struct data_link response_data_list;\n    struct data_link response_head;\n    struct data_link response_data;\n    struct data_link response_cont;    \n\n    // for client\n    struct list_node request_list; \n    struct sdp_request *curr_request; \n    struct sdp_request *pending_request; \n\n    uint16 request_trans_id;\n    uint8 request_cont_data_len;\n    uint8 request_cont_data[16+1]; // 1 byte more to store cont data len\n    uint8 request_pdu_header[5];\n    struct data_link request_data_list;\n    struct data_link request_head;\n    struct data_link request_data;\n    struct data_link request_cont;\n};\n\n\n/*\n    @brief Service Attribute ID\n*/\n#define SERV_ATTRID_SERVICE_RECORD_HANDLE               0x0000\n#define SERV_ATTRID_SERVICE_CLASS_ID_LIST               0x0001\n#define SERV_ATTRID_SERVICE_RECORD_STATE                0x0002\n#define SERV_ATTRID_SERVICE_ID                          0x0003\n#define SERV_ATTRID_PROTOCOL_DESC_LIST                  0x0004\n#define SERV_ATTRID_BROWSE_GROUP_LIST                   0x0005\n#define SERV_ATTRID_LANG_BASE_ID_LIST                   0x0006\n#define SERV_ATTRID_SERVICE_INFO_TIME_TO_LIVE           0x0007\n#define SERV_ATTRID_SERVICE_AVAILABILITY                0x0008\n#define SERV_ATTRID_BT_PROFILE_DESC_LIST                0x0009\n#define SERV_ATTRID_DOC_URL                             0x000a\n#define SERV_ATTRID_CLIENT_EXEC_URL                     0x000b\n#define SERV_ATTRID_ICON_URL                            0x000c\n#define SERV_ATTRID_ADDITIONAL_PROT_DESC_LISTS          0x000d\n#define SERV_ATTRID_SERVICE_NAME                        0X0100\n#define SERV_ATTRID_PROVIDER_NAME                       0X0102\n#define SERV_ATTRID_SDP_VERSION_NUMBER_LIST             0x0200\n#define SERV_ATTRID_SUPPORTED_FEATURES                  0x0311\n\n/*\n    @brief UUID\n*/\n#define SERV_UUID_GENERIC_AUDIO            0x12,0x03\n#define SERV_UUID_HandsFree                0x11,0x1E\n#define SERV_UUID_HandsFreeAudioGateway    0x11,0x1F\n#define SERV_UUID_SDP                      0x00,0x01\n#define SERV_UUID_UDP                      0x00,0x02\n#define SERV_UUID_RFCOMM                   0x00,0x03\n#define SERV_UUID_TCP                      0x00,0x04\n#define SERV_UUID_TCS_BIN                  0x00,0x05\n#define SERV_UUID_TCS_AT                   0x00,0x06\n#define SERV_UUID_ATT                      0x00,0x07\n#define SERV_UUID_OBEX                     0x00,0x08\n#define SERV_UUID_IP                       0x00,0x09\n#define SERV_UUID_FTP                      0x00,0x0A\n#define SERV_UUID_HTTP                     0x00,0x0C\n#define SERV_UUID_WSP                      0x00,0x0E\n#define SERV_UUID_BNEP                     0x00,0x0F\n#define SERV_UUID_UPNP                     0x12,0x00\n#define SERV_UUID_HID_PROTOCOL             0x00,0x11\n#define SERV_UUID_HID_CTRL                 0x00,0x11\n#define SERV_UUID_HID_INTR                 0x00,0x13\n#define SERV_UUID_HardcopyControlChannel   0x00,0x12\n#define SERV_UUID_HardcopyDataChannel      0x00,0x14\n#define SERV_UUID_HardcopyNotification     0x00,0x16\n#define SERV_UUID_AVCTP                    0x00,0x17\n#define SERV_UUID_AVDTP                    0x00,0x19\n#define SERV_UUID_CMTP                     0x00,0x1B\n#define SERV_UUID_MCAPControlChannel       0x00,0x1E\n#define SERV_UUID_MCAPDataChannel          0x00,0x1F\n#define SERV_UUID_L2CAP                    0x01,0x00\n#define SERV_UUID_SPP                      0x11,0x01\n#define SERV_UUID_AUDIOSOURCE              0x11,0x0A\n#define SERV_UUID_AUDIOSINK                0x11,0x0B\n#define SERV_UUID_HID                      0x11,0x24\n#define SERV_UUID_MAP                      0x11,0x34\n#define SERV_UUID_AdvancedAudioDistribution                0x11,0x0D\n#define SERV_UUID_AV_REMOTE_CONTROL        0x11,0x0E\n#define SERV_UUID_AV_REMOTE_CONTROL_TARGET 0x11,0x0C\n#define SERV_UUID_AV_REMOTE_CONTROL_CONTROLLER 0x11,0x0F\n\n/* \n    @brief Service Record defination helper macros\n*/\n#define _U8VALUE(v) ((v)&0xFF)\n\n#define SDP_SPLIT_16BITS_BE(v) \\\n    _U8VALUE(v>>8),_U8VALUE(v)\n#define SDP_SPLIT_32BITS_BE(v) \\\n    _U8VALUE(v>>24),_U8VALUE(v>>16),_U8VALUE(v>>8),_U8VALUE(v)\n\n#define X_SDP_COMBINE_16BITS_BE(a,b) \\\n    (_U8VALUE(a)<<8) | _U8VALUE(b)\n#define SDP_COMBINE_16BITS_BE(...) \\\n    X_SDP_COMBINE_16BITS_BE(__VA_ARGS__)\n\n/*\n    @brief NIL\n*/\n#define SDP_DE_NIL_H1_D0 \\\n    DE_TYPE_NIL<<3\n\n/*\n    @brief Unsigned Integer\n*/\n#define SDP_DE_UINT(size_index) \\\n    DE_TYPE_UINT<<3|size_index\n\n#define SDP_DE_UINT_H1_D1 \\\n    SDP_DE_UINT(DE_SIZE_0)\n\n#define SDP_DE_UINT_H1_D2 \\\n    SDP_DE_UINT(DE_SIZE_1)\n\n#define SDP_DE_UINT_H1_D4 \\\n    SDP_DE_UINT(DE_SIZE_2)\n\n#define SDP_DE_UINT_H1_D8 \\\n    SDP_DE_UINT(DE_SIZE_3)\n\n#define SDP_DE_UINT_H1_D16 \\\n    SDP_DE_UINT(DE_SIZE_4)\n\n/*\n    @brief Signed twos-complement integer\n*/\n#define SDP_DE_S2CMPLINT(size_index) \\\n    DE_TYPE_S2CMPLINT<<3|size_index\n\n#define SDP_DE_S2CMPLINT_H1_D1 \\\n    SDP_DE_S2CMPLINT(DE_SIZE_0)\n\n#define SDP_DE_S2CMPLINT_H1_D2 \\\n    SDP_DE_S2CMPLINT(DE_SIZE_1)\n\n#define SDP_DE_S2CMPLINT_H1_D4 \\\n    SDP_DE_S2CMPLINT(DE_SIZE_2)\n\n#define SDP_DE_S2CMPLINT_H1_D8 \\\n    SDP_DE_S2CMPLINT(DE_SIZE_3)\n\n#define SDP_DE_S2CMPLINT_H1_D16 \\\n    SDP_DE_S2CMPLINT(DE_SIZE_4)\n\n/*\n    @brief UUID\n*/\n#define SDP_DE_UUID(size_index) \\\n    DE_TYPE_UUID<<3|size_index\n\n#define SDP_DE_UUID_H1_D2 \\\n    SDP_DE_UUID(DE_SIZE_1)\n\n#define SDP_DE_UUID_H1_D4 \\\n    SDP_DE_UUID(DE_SIZE_2)\n\n#define SDP_DE_UUID_H1_D16 \\\n    SDP_DE_UUID(DE_SIZE_4)\n\n/*\n    @brief Text string\n*/\n#define SDP_DE_TEXTSTR_8BITSIZE_H2_D(size) \\\n    DE_TYPE_TEXTSTR<<3|DE_SIZE_5,_U8VALUE(size)\n\n#define SDP_DE_TEXTSTR_16BITSIZE_H3_D(size) \\\n    DE_TYPE_TEXTSTR<<3|DE_SIZE_6,_U8VALUE(size),_U8VALUE(size>>8)\n\n#define SDP_DE_TEXTSTR_32BITSIZE_H5_D(size) \\\n    DE_TYPE_TEXTSTR<<3|DE_SIZE_7,_U8VALUE(size),U*VALUE(size>>8),_U8VALUE(size>>16),_U8VALUE(size>>24)\n\n/*\n    @brief Boolean\n*/\n#define SDP_DE_BOOL_H1_D1 \\\n    DE_TYPE_BOOL<<3|DE_SIZE_0\n\n/*\n    @brief Data element sequence\n*/\n#define SDP_DE_DESEQ_8BITSIZE_H2_D(size) \\\n    DE_TYPE_DESEQ<<3|DE_SIZE_5,_U8VALUE(size)\n\n#define SDP_DE_DESEQ_16BITSIZE_H3_D(size) \\\n    DE_TYPE_DESEQ<<3|DE_SIZE_6,_U8VALUE(size),_U8VALUE(size>>8)\n\n#define SDP_DE_DESEQ_32BITSIZE_H5_D(size) \\\n    DE_TYPE_DESEQ<<3|DE_SIZE_7,_U8VALUE(size),U*VALUE(size>>8),_U8VALUE(size>>16),_U8VALUE(size>>24)\n\n/*\n    @brief Data element alternative\n*/\n#define SDP_DE_DEALT_8BITSIZE_H2_D(size) \\\n    DE_TYPE_DEALT<<3|DE_SIZE_5,_U8VALUE(size)\n\n#define SDP_DE_DEALT_16BITSIZE_H3_D(size) \\\n    DE_TYPE_DEALT<<3|DE_SIZE_6,_U8VALUE(size),_U8VALUE(size>>8)\n\n#define SDP_DE_DEALT_32BITSIZE_H5_D(size) \\\n    DE_TYPE_DEALT<<3|DE_SIZE_7,_U8VALUE(size),_U8VALUE(size>>8),_U8VALUE(size>>16),_U8VALUE(size>>24)\n\n/*\n    @brief URL\n*/\n#define SDP_DE_URL_8BITSIZE_H2_D(size) \\\n    DE_TYPE_URL<<3|DE_SIZE_5,_U8VALUE(size)\n\n#define SDP_DE_URL_16BITSIZE_H3_D(size) \\\n    DE_TYPE_URL<<3|DE_SIZE_6,_U8VALUE(size),_U8VALUE(size>>8)\n\n#define SDP_DE_URL_32BITSIZE_H5_D(size) \\\n    DE_TYPE_URL<<3|DE_SIZE_7,_U8VALUE(size),_U8VALUE(size>>8),_U8VALUE(size>>16),_U8VALUE(size>>24)\n\n\n/*\n    @brief Define a attribute\n*/\n#define SDP_DEF_ATTRIBUTE(attr_id,attrs) \\\n    { \\\n        attr_id,sizeof(attrs),attrs,0x0, \\\n    }\n\n/*\n    @brief SDP init\n    @param in_ctl - control instance\n\n    @return error code - 0 for no error\n*/ \nint32 sdp_init(struct sdp_control_t *in_ctl);\n\n/*\n    @brief SDP init server record\n    @param in_attr_list - attr list\n    @param in_attr_list_len - attr list len in bytes\n    @param out_record - output record\n\n    @return error code - 0 for no error\n*/ \nint32 sdp_init_server_record(struct sdp_server_record_attr *in_attr_list, uint32 in_attr_list_len, struct sdp_server_record *out_record);\n\n/*\n    @brief Parse an element from buffer\n    @param in_buff - buffer to parse\n    @param in_len - buffer length\n    @param out_type - element type\n    @param out_header_len - element total length\n    @param out_data_len - element data length\n\n    @return error code - 0 for no error\n*/\nint32 sdp_parse_data_element(uint8 *in_buff, uint32 in_len, \n            enum data_element_type *out_type, uint32 *out_header_len, uint32 *out_data_len);\n\n/*\n    @brief Gether all right size uuid in ServiceClassID attr\n    @param out_buff - buffer to fill\n    @param out_buff_len - buffer length\n    @param in_uuid_size - uuid size to find (in bytes)\n    @param out_len - output length (in bytes)\n    @param out_real_len - real uuid length (in bytes)\n\n    @return error code - 0 for no error\n*/\nint32 sdp_gether_global_service_uuids(uint8 in_uuid_size, uint8 *out_buff, uint32 out_buff_len, uint32 *out_len, uint32 *out_real_len);\n\n/*\n    @brief Get attribute from attribute list\n    Return attribute value data element (array)\n    @param in_buff - buffer to parse\n    @param in_len - buffer length\n    @param in_attr_id - attribute id buffer\n    @param in_attr_id_len - attribute id buffer len\n    @param out_attr - found attribute value buffer (array), it is a data element sequence (array)\n    @param out_attr - found attribute value buffer len (array)\n    @param in_out_max_attr_count - out_attr pointer count, we may found multiple attribute\n    @param out_attr_count - real found out_attr ponter count\n\n    @return error code - 0 for no error\n*/\nint32 sdp_get_attribute_from_attribute_list(uint8 *in_buff, uint32 in_len, \n            uint8 *in_attr_id, uint8 in_attr_id_len, uint32 *out_attr, uint32 *out_attr_len, uint32 in_out_attr_count, uint32 *out_attr_count);\n\n/*\n    @brief Iterate data element list\n    These macros are used when too much loops in one function\n    @param label - name for this iterate (any symbol, like L1,L2,...)\n    @param in_de_list_buff - element list buffer (uint8 *)\n    @param in_de_buff_len - element list buffer len (uint32)\n    @param out_de_buff - found data element buffer (uint8 *)\n    @param out_type - found data element type (enum data_element_type *)\n    @param out_header_len - found data element header len (uint32 *)\n    @param out_data_len - found data element data len (uint32 *)\n    @param out_error - 0 means no error (uint32 *)\n*/\n#define SDP_ITERATE_DATA_ELEMENT_LIST_START(label,in_de_list_buff,in_de_buff_len,out_de_buff,out_type,out_header_len,out_data_len,out_error) \\\n        { \\\n            POSSIBLY_UNUSED int32 __ret = 0, __break = 0; \\\n            POSSIBLY_UNUSED uint8 *__buff = in_de_list_buff; \\\n            POSSIBLY_UNUSED uint32 __offset = 0, __buff_len = in_de_buff_len; \\\n            while (__offset < __buff_len) { \\\n                *out_error = 0; \\\n                __ret = sdp_parse_data_element(__buff, __buff_len-__offset, out_type, out_header_len, out_data_len); \\\n                out_de_buff = __buff; \\\n                if (__ret != 0) { \\\n                    *out_error = 1; \\\n                } \\\n            __buff += *out_header_len + *out_data_len; \\\n            __offset += *out_header_len + *out_data_len;\n\n#define S_I_D_E_L_CONTINUE(label) \\\n        goto __finish_loop_##label;\n\n#define S_I_D_E_L_BREAK(label) \\\n        __break = 1; goto __finish_loop_##label;\n\n#define SDP_ITERATE_DATA_ELEMENT_LIST_END(label) \\\n            } \\\n        }\n\n#if 0\n#define SDP_ITERATE_DATA_ELEMENT_LIST_END(label) \\\n            POSSIBLY_UNUSED __finish_loop_##label: \\\n                if (__break) break; \\\n            } \\\n        }\n#endif\n\n/*\n    @brief UUID Compare\n    @param uuid_a - uuid value a\n    @param uuid_a_len - uuid value a len\n    @param uuid_b - uuid value a\n    @param uuid_b_len - uuid value b len\n\n    @return result, 1 if equal, or 0\n*/\nint32 sdp_uuid_cmp(uint8 *uuid_a, uint32 uuid_a_len, uint8 *uuid_b, uint32 uuid_b_len);\n\n/*\n    @brief Find uuid in data element list\n    An data elemement list means an array of data element who has buffer address and buffer length.\n    It can be a data element sequence/alternative or a few data elements in an array.\n    In common case, no matter sdp request or sdp response, data to be parsed in which will be a data element sequence.\n\n    @param in_buff - buffer to parse\n    @param in_buff_len - buffer length\n    @param in_uuid - uuid to find\n    @param in_uuid_len - uuid length\n\n    @return result, 0 means not found, 1 means found at least one\n*/\nint32 sdp_find_uuid_in_data_element_list(uint8 *in_buff, uint32 in_len, uint8 *uuid, uint32 uuid_len);\n\n\n/*\n    @brief Walk data element list\n    Details see sdp_find_uuid_in_data_element_list.\n\n    @param in_buff - buffer to parse\n    @param in_buff_len - buffer length\n    @param cb - callback for caller to deal with current data element\n    @param stop - stop flag,  1 to stop walking\n    @param priv - priv data to pass into cb\n\n    @return result, 0 - no error, non 0 - error\n*/\ntypedef void (*T_sdp_walk_data_element_list_cb)(enum data_element_type type, uint8 *parent_buff, uint8 *buff, \\\n    uint32 header_len, uint32 data_len, uint8 *stop, uint32 *priv);\nint32 sdp_walk_data_element_list(uint8 *buff, uint32 buff_len, T_sdp_walk_data_element_list_cb cb, uint8 *stop, uint32 *priv);\n\n/*\n    @brief SDP client send a request to server\n    @param in_ctl - control instance\n    @param in_request - request to send\n\n    @return error code - 0 for no error\n*/ \nint32 sdp_client_request(struct sdp_request *in_request);\n\n/*\n    @brief SDP close\n    @param in_ctl - control instance\n\n    @return error code - 0 for no error\n*/ \nint32 sdp_close(struct sdp_control_t *in_ctl);\n\n/*\n    @brief SDP server add record\n    @param in_ctl - control instance\n    @param in_record - server record\n\n    @return error code - 0 for no error\n*/\n#if defined(SDP_PRIVATE_RECORD_LIST)\nint32 sdp_server_add_record(struct sdp_control_t *in_ctl, struct sdp_server_record *in_record);\nint32 sdp_server_remove_record(struct sdp_control_t *in_ctl, struct sdp_server_record *in_record);\n#endif\nint32 sdp_server_add_global_record(struct sdp_server_record *in_record);\nint32 sdp_server_remove_global_record(struct sdp_server_record *in_record);\nuint32 sdp_serv_find_sdp_record_handle(uint32 handle);\n\n/*\n    @brief Generate an data element in given buffer\n    @param in_buff - buffer to generate the data element\n    @param in_len - buffer length\n    @param in_type - element type\n    @param in_data - data buffer\n    @param in_data_len - element data length\n    @param out_header_len - output header len\n\n    @return error code - 0 for no error\n*/\nint32 sdp_generate_an_data_element(uint8 *in_buff, uint32 in_len, enum data_element_type type, int8 *in_data, uint32 in_data_len, uint32 *ou_header_len);\n\n/*\n    @brief Edit an data element length in given buffer\n    @param in_len - buffer length\n    @param in_buff - buffer to generate the data element\n\n    @return error code - 0 for no error\n*/\nint32 sdp_edit_data_element_length(uint8 *in_buff, uint32 in_buff_len, uint32 in_data_len);\n\n/*\n    @brief Convert sdp event to string\n    @param event - event\n\n    @return event string or \"[]\"\n*/\nconst char *sdp_event2str(enum sdp_event event);\n\nuint16 sdp_serv_find_max_attr_id(const struct sdp_server_record *record, uint16 origin_max);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __SDP_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/sppnew.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPPNEW_H__\n#define __SPPNEW_H__\n\n#include \"btlib_more.h\"\n#include \"l2cap_i.h\"\n#include \"bt_co_list.h\"\n#include \"data_link.h\"\n#include \"sdp.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum sppnew_event {\n    SPPNEW_EVENT_OPEN,\n    SPPNEW_EVENT_NEW_OPEN,\n    SPPNEW_EVENT_DATA_IND,\n    SPPNEW_EVENT_CLOSE,\n    SPPNEW_EVENT_TX_HANDLED,\n    SPPNEW_EVENT_QUERY_FAIL,\n};\n\nenum sppnew_chnl_state {\n    SPPNEW_CHNL_STATE_CLOSE,\n    SPPNEW_CHNL_STATE_QUERING,\n    SPPNEW_CHNL_STATE_CONNECTING,\n    SPPNEW_CHNL_STATE_OUT_CLOSING,\n    SPPNEW_CHNL_STATE_OPEN,\n};\n\nenum sppnew_tx_state {\n    SPPNEW_TX_STATE_IDLE,\n    SPPNEW_TX_STATE_BUSY,\n};\n\nstruct sppnew_callback_param {\n    union {\n        struct {\n            uint8 *buff;\n            uint32 buff_len;\n        } data_ind;\n        struct {\n            uint8 *buff;\n            uint32 buff_len;\n        } tx_handled;\n        struct {\n            void *remDev;\n        } open;\n        struct {\n            void *remDev;\n        } new_open;\n        struct {\n            uint8 reason;\n            void *remDev;\n        } close;\n    } p;\n};\n\nenum sppnew_device_type {\n    SPPNEW_DEVICE_TYPE_CLIENT,\n    SPPNEW_DEVICE_TYPE_SERVER,\n};\n\nstruct sppnew_channel;\ntypedef int8 (*sppnew_callback)(struct sppnew_channel *chnl, enum sppnew_event event, struct sppnew_callback_param *param);\n\nstruct sppnew_setup {\n    uint32 buad_rate;\n};\n\nstruct sppnew_packet {\n    struct list_node node;\n    uint8 *buff;\n    uint32 buff_len;\n};\n\nstruct sppnew_config {\n    #if 0\n    uint8 *tx_buff;\n    uint32 tx_buff_len;\n    #endif\n    sppnew_callback callback;\n    uint8 local_server_channel;\n    uint32 tx_packet_list_length;\n    enum sppnew_device_type dev_type;\n    struct sppnew_packet *tx_free_packet;\n    void *priv;\n};\n\nstruct sppnew_channel {\n    struct list_node node;\n    uint32 tx_size_max;\n    uint32 rfcomm_handle;\n    struct bdaddr_t bdaddr;\n    struct sppnew_config cfg;\n    uint8 remote_server_channel;\n    enum sppnew_chnl_state state;\n    enum sppnew_tx_state tx_state;\n    struct list_node tx_pend_list;\n    struct list_node tx_free_list;\n    struct sppnew_packet *tx_packet;\n    struct sdp_request sdp_request;\n};\n\nstruct sppnew_ctx_input {\n    struct ctx_content ctx;\n    struct sppnew_channel *chnl;\n    struct sppnew_config *cfg;\n    uint32 rfcomm_handle;\n    struct bdaddr_t *remote;\n};\n\nstruct sppnew_ctx_output {\n};\n\nint8 sppnew_init(struct sppnew_channel *chnl, struct sppnew_config *config);\nint8 sppnew_open_server(struct sppnew_channel *chnl, struct rfcomm_config_t * cfg);\nint8 sppnew_open_client(struct sppnew_channel *chnl, struct bdaddr_t *bdaddr, uint8 remote_channel);\nint8 sppnew_query_and_open_client(struct sppnew_channel *chnl, struct bdaddr_t *bdaddr, uint8 *query, uint32 query_len);\nint8 sppnew_write(struct sppnew_channel *chnl, uint8 *buff, uint32 buff_len);\nint8 sppnew_setup(struct sppnew_channel *chnl, struct sppnew_setup *setup);\nint8 sppnew_disconnect(struct sppnew_channel *chnl);\nint8 sppnew_close(struct sppnew_channel *chnl);\nenum sppnew_chnl_state sppnew_get_state(struct sppnew_channel *chnl);\nvoid *sppnew_get_priv(struct sppnew_channel *chnl);\nconst char *sppnew_event2str(enum sppnew_event event);\nvoid _sppnew_rfc_notify_callback(enum rfcomm_event_enum event, uint32 rfcomm_handle, void *pdata, uint8 reason, void *priv);\nvoid _sppnew_rfc_datarecv_callbac(uint32 rfcomm_handle, struct pp_buff *ppb, void *priv);\nvoid sppnew_delete_chnl_note(struct sppnew_channel *chnl);\nuint32 sppnew_save_ctx(struct sppnew_channel *chnl, uint8_t *buf, uint32_t buf_len);\nuint32 sppnew_restore_ctx(struct sppnew_ctx_input *input, struct sppnew_ctx_output *output);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __SPPNEW_H__ */\n"
  },
  {
    "path": "services/bt_profiles_enhanced/inc/win32_os.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \n#include \n#include \n\n#ifndef __WIN32_OS__\n#define __WIN32_OS__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n//---- MACROS ----//\n#define Plt_Assert(expr,...) assert(expr)\n#define Plt_TICKS_TO_MS(ticks) (ticks)\n#define POSSIBLY_UNUSED\n#define ITER_ASSERT(...)\n#define Plt_DUMP8(...)\n\n#define OS_CRITICAL_METHOD      0\n#define OS_ENTER_CRITICAL()\n#define OS_EXIT_CRITICAL()\n#define OSTimeDly(a)\n\n//---- TYPES ----//\ntypedef short I16;\ntypedef unsigned char U8;\ntypedef unsigned short U16;\ntypedef unsigned int U32;\ntypedef unsigned char BOOL;\n#define ALIGNED(a)  __attribute__((aligned(a)))\ntypedef U32 bt_status_t;\n\nenum _bt_status {\n    BT_STS_SUCCESS = 0,\n    BT_STS_FAILED = 1,\n    BT_STS_PENDING = 2,\n    BT_STS_BUSY = 11,\n    BT_STS_NO_RESOURCES = 12,\n    BT_STS_NOT_FOUND = 13,\n    BT_STS_DEVICE_NOT_FOUND = 14,\n    BT_STS_CONNECTION_FAILED = 15,\n    BT_STS_TIMEOUT = 16,\n    BT_STS_NO_CONNECTION = 17,\n    BT_STS_INVALID_PARM = 18,\n    BT_STS_IN_PROGRESS = 19,\n    BT_STS_RESTRICTED = 20,\n    BT_STS_INVALID_TYPE = 21,\n    BT_STS_HCI_INIT_ERR = 22,\n    BT_STS_NOT_SUPPORTED = 23,\n    BT_STS_IN_USE = 5,\n    BT_STS_SDP_CONT_STATE = 24,\n    BT_STS_CONTINUE =24,\n    BT_STS_CANCELLED = 25,\n\n    /* The last defined status code */\n    BT_STS_LAST_CODE = BT_STS_CANCELLED,\n};\n\ntypedef struct {\n    unsigned char address[6];\n} __attribute__ ((packed)) bt_bdaddr_t;\n\ntypedef unsigned char btif_link_key_type_t;\n\ntypedef struct {\n    bt_bdaddr_t bdAddr;\n    bool trusted;\n    unsigned char linkKey[16];\n    btif_link_key_type_t keyType;\n\n    unsigned char pinLen;\n} btif_device_record_t;\n\ntypedef void (*ibrt_cmd_complete_callback)(const unsigned char *para);\ntypedef bool (*ibrt_io_capbility_callback)(void *bdaddr);\n\n#define BLE_ADV_REPORT_MAX_LEN 31\n\ntypedef struct {\n    unsigned char type;\n    unsigned char addr_type;\n    bt_bdaddr_t addr;\n    unsigned char data_len;\n    unsigned char data[BLE_ADV_REPORT_MAX_LEN];\n    unsigned char rssi;\n} btif_ble_adv_report;\n\n#define BTIF_BEC_USER_TERMINATED    0x13\n\n//------ VARS ------//\n#define BT_LOCAL_NAME \"bes_enhanced_stack_core\"\nextern unsigned char bt_addr[6];\nextern unsigned char ble_addr[6];\n\nextern struct besbt_cfg_t besbt_cfg;\n\n//------ DDB ------//\nbt_status_t ddbif_delete_record(const bt_bdaddr_t *bdAddr);\nbt_status_t ddbif_open(const bt_bdaddr_t *bdAddr);\nbt_status_t ddbif_add_record(btif_device_record_t *record);\nbt_status_t ddbif_find_record(const bt_bdaddr_t *bdAddr, btif_device_record_t *record);\nbt_status_t ddbif_enum_device_records(I16 index, btif_device_record_t *record);\n\n//------ BTIF ------//\nvoid btif_adv_event_report(const btif_ble_adv_report* event);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif // __WIN32_OS__\n"
  },
  {
    "path": "services/communication/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nifeq ($(USE_KNOWLES),1)\nobj-y += comminication_knowles/\nendif\n\nccflags-y += \\\n\t-Iapps/common \\\n\t-Iplatform/drivers/ana \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iservices/communication/comminication_knowles \\\n\t-Ithirdparty/knowles_uart_lib \\\n\t-Iutils/crc32 \\\n\t-Iservices/app_ai/inc\n\n"
  },
  {
    "path": "services/communication/comminication_knowles/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\n\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\n\nsubdir-ccflags-y += \\\n\t-Iapps/common \\\n\t-Iplatform/drivers/ana \\\n\t-Iutils/crc32 \\\n\t-Iservices/bt_app \\\n\t-Iservices/communication/comminication_knowles \\\n\t-Iservices/audio_dump/include \\\n\t-Iutils/cqueue \\\n\t$(BT_IF_INCLUDES) \\\n\t-Ithirdparty/userapi/knowles_uart_app \\\n\t-Ithirdparty/knowles_uart_lib \\\n\t-Iservices/app_ai/inc\n\n"
  },
  {
    "path": "services/communication/comminication_knowles/communication_cmd_handle.cpp",
    "content": "#include \"communication_cmd_handle.h\"\n#include \"hal_chipid.h\"\n#include \"hal_dma.h\"\n#include \"hal_trace.h\"\n#include \"plat_types.h\"\n#include \"stdbool.h\"\n#include \"stdint.h\"\n#include \"string.h\"\n\nstatic bool communication_cmd_inited = false;\nstatic int (*send_reply_cb)(const unsigned char *, unsigned int);\n\nextern \"C\" int extend_cmd_pmu_open(void);\n\nint communication_cmd_init(int (*cb)(const unsigned char *, unsigned int)) {\n  if (!communication_cmd_inited) {\n    send_reply_cb = cb;\n    communication_cmd_inited = true;\n  }\n  return 0;\n}\n\nint communication_cmd_send_reply(const unsigned char *payload,\n                                 unsigned int len) {\n  return send_reply_cb(payload, len);\n}\n\nenum ERR_CODE communication_cmd_check_msg_hdr(struct message_t *msg) {\n  return ERR_NONE;\n}\n\nvoid FloatToByte(float floatNum, unsigned char *byteArry) {\n  char *pchar = (char *)&floatNum;\n  for (u32 i = 0; i < sizeof(float); i++) {\n    *byteArry = *pchar;\n    pchar++;\n    byteArry++;\n  }\n}\n\nenum ERR_CODE communication_cmd_handle_cmd(enum COMMUNICATION_CMD_TYPE cmd,\n                                           unsigned char *param,\n                                           unsigned int len) {\n  enum ERR_CODE nRet = ERR_NONE;\n  // uint8_t cret[5]={0x01,0x02,0x03,0x04,0x05};\n\n  // cret[0] = ERR_NONE;\n\n  TRACE(1, \"###communication_cmd_handle_cmd,len=%d\", len);\n  switch (cmd) {\n  case COMMUNICATION_CMD_EQ_OP: {\n#ifdef __PC_CMD_UART__\n    // DUMP8(\"%02x \",param,len);\n    communication_cmd_send_reply(param, len);\n#endif\n  } break;\n  case COMMUNICATION_CMD_DRC_OP: {\n\n  } break;\n  case COMMUNICATION_CMD_HF_OP: {\n  } break;\n  default: {\n    TRACE(1, \"Invalid command: 0x%x\", cmd);\n    nRet = ERR_INTERNAL;\n  }\n  }\n  // communication_cmd_send_reply(cret,10);\n  return nRet;\n}\n"
  },
  {
    "path": "services/communication/comminication_knowles/communication_cmd_handle.h",
    "content": "#ifndef COMMUNICATION_CMD_HANDLE_H\n#define COMMUNICATION_CMD_HANDLE_H\n\n#include \"tool_msg.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define COMMUNICATION_CMD_BUFF_TO_U32(ptr,val) do{ \\\n                                val =( ((uint32_t) *((uint8_t*)ptr+3) << 24)   | \\\n                                      ((uint32_t) *((uint8_t*)ptr+2) << 16) | \\\n                                      ((uint32_t) *((uint8_t*)ptr+1) << 8)  | \\\n                                      ((uint32_t) *((uint8_t*)ptr)) ); \\\n                         }while(0)\n\n#define COMMUNICATION_CMD_U32_TO_BUFF(ptr,val) do{ \\\n                            *(ptr+3) = (uint8_t) (val>>24); \\\n                            *(ptr+2) = (uint8_t) (val>>16); \\\n                            *(ptr+1) = (uint8_t) (val>>8); \\\n                            *(ptr+0) = (uint8_t) val; \\\n                         }while(0)\n\nint communication_cmd_init(int (* cb)(const unsigned char *, unsigned int));\n\nint communication_cmd_send_reply(const unsigned char *payload, unsigned int len);\n\nenum ERR_CODE communication_cmd_check_msg_hdr(struct message_t *msg);\n\nenum ERR_CODE communication_cmd_handle_cmd(enum COMMUNICATION_CMD_TYPE cmd, unsigned char *param, unsigned int len);\n\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/communication/comminication_knowles/communication_cmd_msg.h",
    "content": "#ifndef __COMMUNICATION_CMD_MSG_H__\n#define __COMMUNICATION_CMD_MSG_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum COMMUNICATION_CMD_TYPE {\n    COMMUNICATION_CMD_EQ_OP = 0xA1,\n    COMMUNICATION_CMD_DRC_OP  = 0xA2,\n    COMMUNICATION_CMD_HF_OP  = 0xA3,\n};\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/communication/comminication_knowles/communication_sysapi.cpp",
    "content": "#include \"app_ai_if_config.h\"\n#include \"cmsis_nvic.h\"\n#include \"cmsis_os.h\"\n#include \"stdbool.h\"\n#include \"stdint.h\"\n#include \"string.h\"\n#include \"tool_msg.h\"\n//#include \"hal_timer_raw.h\"\n#include \"app_thread.h\"\n#include \"communication_sysapi.h\"\n#include \"hal_bootmode.h\"\n#include \"hal_cmu.h\"\n#include \"hal_iomux.h\"\n#include \"hal_uart.h\"\n#include \"pmu.h\"\n#include \"tgt_hardware.h\"\n\n//#define FLASH_BASE                              0x6C000000\n//#define FLASH_TO_FLASHX(d)                      ((uint32_t)(d) & 0x0FFFFFFF)\n\n#define WAIT_TRACE_TIMEOUT MS_TO_TICKS(200)\n\nstatic uint32_t send_timeout = MS_TO_TICKS(500);\n\nstatic const struct HAL_UART_CFG_T uart_cfg = {\n    HAL_UART_PARITY_NONE,\n#ifdef __KNOWLES\n    HAL_UART_STOP_BITS_2,\n#else\n    HAL_UART_STOP_BITS_1,\n#endif\n    HAL_UART_DATA_BITS_8,\n    HAL_UART_FLOW_CONTROL_NONE, // RTC/CTS pins might be unavailable for some\n                                // chip packages\n    HAL_UART_FIFO_LEVEL_1_2,\n    HAL_UART_FIFO_LEVEL_1_2,\n#ifdef __PC_CMD_UART__\n    115200,\n#else\n    921600,\n#endif\n    true,\n    false,\n    false,\n};\n#ifdef __PC_CMD_UART__\nstatic const enum HAL_UART_ID_T comm_uart = HAL_UART_ID_0;\n#else\n#ifdef CHIP_BEST2300P\nstatic const enum HAL_UART_ID_T comm_uart = HAL_UART_ID_2;\n#else\nstatic const enum HAL_UART_ID_T comm_uart = HAL_UART_ID_1;\n#endif\n#endif\nstatic volatile enum UART_DMA_STATE uart_dma_rx_state = UART_DMA_IDLE;\nstatic volatile uint32_t uart_dma_rx_size = 0;\nstatic bool uart_opened = false;\n\nstatic volatile bool cancel_xfer = false;\n\nstatic uint32_t xfer_err_time = 0;\nstatic uint32_t xfer_err_cnt = 0;\n\n#ifdef __KNOWLES\n\n#include \"Knowles_mic_demo.h\"\n#include \"audio_dump.h\"\n#include \"cqueue.h\"\n\nuint32_t kw_start_index = 0;\nuint32_t kw_end_index = 0;\nbool is_markers_read_done = false;\n\n#ifdef KNOWLES_UART_DATA\nuint8_t out_buf[FRAME_SIZE];\nuint8_t found = 0;\n\nstatic osMutexId uart_audio_pcmbuff_mutex_id = NULL;\nosMutexDef(uart_audio_pcmbuff_mutex);\n\ntypedef enum { PP_PING = 0, PP_PANG = 1 } FIR_PP_T;\n\n#define PP_PINGPANG(v) (v == PP_PING ? PP_PANG : PP_PING)\n\nstatic FIR_PP_T pp_index = PP_PING;\nstatic uint32_t uart_dma_interval;\n\n#define knowles_uart_packet_len FRAME_SIZE // 640//20MS\nstatic uint8_t\n    audio_data_receive_buf[knowles_uart_packet_len * 2]; // ping_pong_buffer\n\n#ifdef SYSTEM_USE_PSRAM\n#include \"hal_location.h\"\n#define AMA_STREAM_UART_FIFO_SIZE (1024 * 32)\nPSRAM_BSS_LOC static unsigned char ama_uart_buff[AMA_STREAM_UART_FIFO_SIZE];\n#else\n#define AMA_STREAM_UART_FIFO_SIZE (1024 * 16)\nstatic unsigned char ama_uart_buff[AMA_STREAM_UART_FIFO_SIZE];\n#endif\nstatic CQueue ama_uart_queue = {0};\n\nextern osThreadId knowles_uart_audio_tid;\n\n#define APP_UART_FLOW_CONTROL_TIMEOUT_INTERVEL (12)\n\nstatic void app_uart_flow_control_timeout_timer_cb(void const *n);\nosTimerDef(APP_UART_FLOW_CONTROL_TIMEOUT,\n           app_uart_flow_control_timeout_timer_cb);\nosTimerId app_uart_flow_control_timeout_timer_id = NULL;\n\nstatic void app_uart_flow_control_timeout_timer_cb(void const *n) {\n  uint32_t available_buffer;\n  unsigned char get_next_chunk_cmd[4];\n  smart_mic_get_nextchunk_cmd(get_next_chunk_cmd);\n\n  available_buffer = avil_len_of_the_fifo();\n  available_buffer = AMA_STREAM_UART_FIFO_SIZE - available_buffer;\n\n  TRACE(1, \"UART_FLOW_CONTROL: Available UART Buffer %d\\n\", available_buffer);\n  if (available_buffer > 1024) {\n    // TRACE(0,\"More than 1024 bytes availble hence sending next chunk command\n    // \\n\");\n    send_data(get_next_chunk_cmd, 4);\n    osTimerStop(app_uart_flow_control_timeout_timer_id);\n    osTimerStart(app_uart_flow_control_timeout_timer_id,\n                 APP_UART_FLOW_CONTROL_TIMEOUT_INTERVEL);\n  } else {\n    // TRACE(0,\"no buffer available hence triggering timer for 10ms\\n\");\n    osTimerStop(app_uart_flow_control_timeout_timer_id);\n    osTimerStart(app_uart_flow_control_timeout_timer_id,\n                 APP_UART_FLOW_CONTROL_TIMEOUT_INTERVEL);\n  }\n}\n\nvoid ama_uart_stream_fifo_init() {\n  if (uart_audio_pcmbuff_mutex_id == NULL) {\n    uart_audio_pcmbuff_mutex_id =\n        osMutexCreate((osMutex(uart_audio_pcmbuff_mutex)));\n  }\n\n  pp_index = PP_PING;\n\n  if (knowles_uart_audio_tid) {\n    osSignalClear(knowles_uart_audio_tid, UART_OUT_SIGNAL_ID);\n  }\n\n  memset(audio_data_receive_buf, 0, sizeof(audio_data_receive_buf));\n  InitCQueue(&ama_uart_queue, AMA_STREAM_UART_FIFO_SIZE,\n             (CQItemType *)ama_uart_buff);\n}\n\nuint32_t ama_uart_get_fifo_data(uint8_t *buf) {\n  uint32_t avail = 0;\n\n  avail = LengthOfCQueue(&ama_uart_queue);\n  if (avail > 0) {\n    if (avail < knowles_uart_packet_len) {\n      TRACE(2, \"%s: Invalid  UART STREAM SIZE: %d\", __FUNCTION__, avail);\n      return 0;\n    } else {\n      // TRACE(1,\"UART_GET_len %d\",knowles_uart_packet_len);\n      if (!DeCQueue(&ama_uart_queue, buf, knowles_uart_packet_len))\n        return knowles_uart_packet_len;\n      TRACE(2, \"%s: queue get data error len %d\", __func__,\n            knowles_uart_packet_len);\n      return 0;\n    }\n  } else {\n    TRACE(0, \"uart no stream to get\");\n    return 0;\n  }\n}\n\nuint32_t avil_len_of_the_fifo() { return LengthOfCQueue(&ama_uart_queue); }\n\nextern \"C\" void OS_NotifyEvm(void);\n\nvoid send_message() { OS_NotifyEvm(); }\n#endif\n#endif\n\nstatic void uart_break_handler(void) {\n  TRACE(0, \"****** Handle break ******\");\n\n  cancel_xfer = true;\n  hal_uart_stop_dma_recv(comm_uart);\n  hal_uart_stop_dma_send(comm_uart);\n  uart_dma_rx_state = UART_DMA_ERROR;\n}\n\nextern \"C\" uint8_t app_ai_is_stream_running(void);\nstatic void uart_rx_dma_handler(uint32_t xfer_size, int dma_error,\n                                union HAL_UART_IRQ_T status) {\n  if (status.BE) {\n    uart_break_handler();\n    return;\n  }\n\n  // The DMA transfer has been cancelled\n#ifndef KNOWLES_UART_DATA\n  if (uart_dma_rx_state != UART_DMA_START) {\n    return;\n  }\n#endif\n  uart_dma_rx_size = xfer_size;\n  if (dma_error || status.FE || status.OE || status.PE || status.BE) {\n    TRACE(2, \"UART-RX Error: dma_error=%d, status=0x%08x\", dma_error,\n          status.reg);\n    uart_dma_rx_state = UART_DMA_ERROR;\n  } else {\n    // TRACE(1,\"UART-RX OK: rx_size=%d\", uart_dma_rx_size);\n    uart_dma_rx_state = UART_DMA_DONE;\n    int ret = 0;\n    // TRACE(1,\"UART DMA INTERUPT\n    // TIME=%d\",hal_sys_timer_get()-uart_dma_interval);\n    uart_dma_interval = hal_sys_timer_get();\n    if (app_ai_is_stream_running()) {\n      if (!EnCQueue(&ama_uart_queue,\n                    (uint8_t *)&audio_data_receive_buf[pp_index *\n                                                       knowles_uart_packet_len],\n                    FRAME_SIZE))\n        ret = FRAME_SIZE;\n      if (ret < FRAME_SIZE) {\n        TRACE(2, \"%s:WARNING !!! UART STREAM OVERFLOW Dropping %d Bytes\",\n              __FUNCTION__, (FRAME_SIZE - ret));\n      }\n\n      osSignalSet(knowles_uart_audio_tid, UART_OUT_SIGNAL_ID);\n    }\n    pp_index = PP_PINGPANG(pp_index);\n  }\n}\n\nvoid recv_data_state_get(enum UART_DMA_STATE *state) {\n  *state = uart_dma_rx_state;\n}\n\nvoid recv_data_reset(void) {\n  union HAL_UART_IRQ_T mask;\n  mask.reg = 0;\n  mask.BE = 1;\n  hal_uart_irq_set_mask(comm_uart, mask);\n  uart_dma_rx_state = UART_DMA_IDLE;\n}\n\nvoid init_transport(void) {\n  union HAL_UART_IRQ_T mask;\n  struct HAL_UART_CFG_T comm_uart_cfg;\n#ifdef KNOWLES_UART_DATA\n  // audio_dump_init(320, 1);\n  ama_uart_stream_fifo_init();\n#endif\n  if (!uart_opened) {\n#ifdef __PC_CMD_UART__\n    hal_iomux_set_uart0();\n#else\n#ifdef CHIP_BEST2300P\n    hal_iomux_init(cfg_pinmux_uart, ARRAY_SIZE(cfg_pinmux_uart));\n#else\n    hal_iomux_set_uart1();\n#endif\n#endif\n    memcpy(&comm_uart_cfg, &uart_cfg, sizeof(comm_uart_cfg));\n    hal_uart_open(comm_uart, &comm_uart_cfg);\n    mask.reg = 0;\n    mask.BE = 1;\n    mask.FE = 1;\n    mask.OE = 1;\n    mask.PE = 1;\n\n    hal_uart_irq_set_dma_handler(comm_uart, uart_rx_dma_handler, NULL);\n    hal_uart_irq_set_mask(comm_uart, mask);\n    uart_opened = true;\n  }\n\n  cancel_xfer = false;\n\n  hal_uart_flush(comm_uart, 0);\n#ifdef KNOWLES_UART_DATA\n  if (recv_data(&audio_data_receive_buf[0], knowles_uart_packet_len * 2) < 0)\n    TRACE(1, \"%s error\", __func__);\n  smart_mic_stream_header_parser_init(FRAME_SIZE);\n#endif\n\n  app_uart_flow_control_timeout_timer_id =\n      osTimerCreate(osTimer(APP_UART_FLOW_CONTROL_TIMEOUT), osTimerOnce, NULL);\n}\n\nvoid deinit_transport(void) {\n  union HAL_UART_IRQ_T mask;\n\n  mask.reg = 0;\n\n  // audio_dump_clear_up(); //added by punith\n\n  hal_uart_stop_dma_recv(comm_uart); // punith\n  uart_dma_rx_state = UART_DMA_IDLE;\n  hal_uart_irq_set_mask(comm_uart, mask);\n  hal_uart_irq_set_dma_handler(comm_uart, NULL, NULL);\n  hal_uart_close(comm_uart);\n\n  hal_uart_flush(comm_uart, 0);\n  uart_opened = false;\n  cancel_xfer = true;\n\n  osTimerStop(app_uart_flow_control_timeout_timer_id);\n  if (osTimerDelete(app_uart_flow_control_timeout_timer_id) != osOK) {\n    TRACE(0, \"app_uart_flow_control_timeout_timer_id Failed !!!!\");\n  }\n}\n\nvoid reinit_transport(void) {\n  union HAL_UART_IRQ_T mask;\n  struct HAL_UART_CFG_T comm_uart_cfg;\n\n  uart_opened = false;\n  memcpy(&comm_uart_cfg, &uart_cfg, sizeof(comm_uart_cfg));\n  hal_uart_open(comm_uart, &comm_uart_cfg);\n  mask.reg = 0;\n  mask.BE = 1;\n  mask.FE = 1;\n  mask.OE = 1;\n  mask.PE = 1;\n  hal_uart_irq_set_dma_handler(comm_uart, uart_rx_dma_handler, NULL);\n  hal_uart_irq_set_mask(comm_uart, mask);\n  uart_opened = true;\n\n  cancel_xfer = false;\n\n  hal_uart_flush(comm_uart, 0);\n}\n\nvoid set_send_timeout(uint32_t timeout) { send_timeout = MS_TO_TICKS(timeout); }\n\nint debug_read_enabled(void) {\n  return !!(hal_sw_bootmode_get() & HAL_SW_BOOTMODE_READ_ENABLED);\n}\n\nint debug_write_enabled(void) {\n  return !!(hal_sw_bootmode_get() & HAL_SW_BOOTMODE_WRITE_ENABLED);\n}\n\nstatic int uart_send_data(const unsigned char *buf, unsigned int len) {\n  uint32_t start;\n  uint32_t sent = 0;\n\n  start = hal_sys_timer_get();\n  while (sent < len) {\n    while (!cancel_xfer && !hal_uart_writable(comm_uart) &&\n           hal_sys_timer_get() - start < send_timeout)\n      ;\n    if (cancel_xfer) {\n      break;\n    }\n    if (hal_uart_writable(comm_uart)) {\n      hal_uart_putc(comm_uart, buf[sent++]);\n    } else {\n      break;\n    }\n  }\n\n  if (sent != len) {\n    return 1;\n  }\n\n  return 0;\n}\n\nint send_data(const unsigned char *buf, unsigned int len) {\n  if (cancel_xfer) {\n    return -1;\n  }\n\n  return uart_send_data(buf, len);\n}\n\nstatic struct HAL_DMA_DESC_T dma_desc[17] = {0};\n\nstatic int uart_recv_data_dma(unsigned char *buf, unsigned int len,\n                              unsigned int expect) {\n  int ret;\n  union HAL_UART_IRQ_T mask;\n\n  uint32_t desc_cnt = ARRAY_SIZE(dma_desc);\n\n  if (uart_dma_rx_state != UART_DMA_IDLE) {\n    ret = -3;\n    goto _no_state_exit;\n  }\n\n  uart_dma_rx_state = UART_DMA_START;\n  uart_dma_rx_size = 0;\n\n#ifdef KNOWLES_UART_DATA\n  ret = hal_uart_dma_recv_pingpang(comm_uart, buf, expect, &dma_desc[0],\n                                   &desc_cnt);\n#else\n  ret = hal_uart_dma_recv(comm_uart, buf, expect, &dma_desc[0], &desc_cnt);\n#endif\n\n  if (ret) {\n    uart_dma_rx_state = UART_DMA_ERROR;\n    goto err_exit;\n  }\n\n  mask.reg = 0;\n  mask.BE = 1;\n  mask.FE = 1;\n  mask.OE = 1;\n  mask.PE = 1;\n  // mask.RT = 1;\n  hal_uart_irq_set_mask(comm_uart, mask);\n\n_no_state_exit:\n  TRACE(2, \"%s ret %d\", __func__, ret);\n  return ret;\nerr_exit:\n  TRACE(2, \"%s err_exit ret %d\", __func__, ret);\n  return -1;\n}\n\nint recv_data(unsigned char *buf, unsigned int len) {\n  TRACE(3, \"%s %d %d\", __func__, cancel_xfer, len);\n  if (cancel_xfer) {\n    return -1;\n  }\n  return uart_recv_data_dma(buf, len, len);\n}\n\nint recv_data_dma(unsigned char *buf, unsigned int len, unsigned int expect) {\n  if (cancel_xfer) {\n    return -1;\n  }\n\n  return uart_recv_data_dma(buf, len, expect);\n}\n\nstatic int uart_handle_error(void) {\n  TRACE(0, \"****** Send break ******\");\n\n  // Send break signal, to tell the peer to reset the connection\n  hal_uart_break_set(comm_uart);\n  osDelay(100);\n  hal_uart_break_clear(comm_uart);\n\n  return 0;\n}\n\nint handle_error(void) {\n  int ret = 0;\n  uint32_t err_time;\n\n  osDelay(200);\n\n  if (!cancel_xfer) {\n    ret = uart_handle_error();\n  }\n\n  xfer_err_cnt++;\n  err_time = hal_sys_timer_get();\n  if (err_time - xfer_err_time > MS_TO_TICKS(5000)) {\n    xfer_err_cnt = 0;\n  }\n  xfer_err_time = err_time;\n  if (xfer_err_cnt < 2) {\n    osDelay(500);\n  } else if (xfer_err_cnt < 5) {\n    osDelay(1000);\n  } else {\n    osDelay(2000);\n  }\n\n  return ret;\n}\n\nstatic int uart_cancel_input(void) {\n  hal_uart_flush(comm_uart, 0);\n  return 0;\n}\n\nint cancel_input(void) { return uart_cancel_input(); }\n\nvoid system_reboot(void) { hal_cmu_sys_reboot(); }\n\nvoid system_shutdown(void) { pmu_shutdown(); }\n\nvoid system_set_bootmode(unsigned int bootmode) {\n  bootmode &= ~(HAL_SW_BOOTMODE_READ_ENABLED | HAL_SW_BOOTMODE_WRITE_ENABLED);\n  hal_sw_bootmode_set(bootmode);\n}\n\nvoid system_clear_bootmode(unsigned int bootmode) {\n  bootmode &= ~(HAL_SW_BOOTMODE_READ_ENABLED | HAL_SW_BOOTMODE_WRITE_ENABLED);\n  hal_sw_bootmode_clear(bootmode);\n}\n\nunsigned int system_get_bootmode(void) { return hal_sw_bootmode_get(); }\n\nvoid wait_trace_finished(void) {\n  uint32_t time;\n  int idle_cnt = 0;\n\n  time = hal_sys_timer_get();\n\n  while (idle_cnt < 2 && hal_sys_timer_get() - time < WAIT_TRACE_TIMEOUT) {\n    osDelay(10);\n    idle_cnt = hal_trace_busy() ? 0 : (idle_cnt + 1);\n  }\n}\n\nunsigned int get_current_time(void) { return hal_sys_timer_get(); }\n\n#ifdef KNOWLES_UART_DATA\nuint8_t *uart_stream_buf;\nbool send_start_speech = false;\nextern bool is_markers_read_done;\n#endif\n#ifdef KNOWLES_UART_DATA\nosThreadId knowles_uart_audio_tid = NULL;\nstatic void uart_data_process_thread(const void *arg);\nosThreadDef(uart_data_process_thread, (osPriorityAboveNormal), 1, (1024 * 12),\n            \"UART_DATA\");\n\nint app_ai_voice_uart_audio_init() {\n  ama_uart_stream_fifo_init();\n  if (knowles_uart_audio_tid == NULL)\n    knowles_uart_audio_tid =\n        osThreadCreate(osThread(uart_data_process_thread), NULL);\n  if (knowles_uart_audio_tid == NULL) {\n    TRACE(0, \"[UART AUDIO]Create thread error\\n\");\n    return -1;\n  }\n\n  return 0;\n}\nvoid uart_data_process_thread(const void *arg) {\n  uint32_t ret = 0;\n  uint32_t frame_len = 0;\n  // uint32_t stime,etime;\n  // stime=hal_sys_timer_get();\n\n  while (1) {\n    // TRACE(0,\"---in uart_process_thread\\n\");\n    osEvent evt;\n\n    if (avil_len_of_the_fifo() <= 640) {\n      evt = osSignalWait(0x0, osWaitForever);\n    }\n\n    // TRACE(1,\"#####Available len of fifo  %d####\",avil_len_of_the_fifo());\n    // get role from signal value\n    if (evt.status == osEventSignal) {\n      if (evt.value.signals & UART_OUT_SIGNAL_ID) {\n        if (app_ai_is_stream_running()) {\n          frame_len = ama_uart_get_fifo_data(uart_stream_buf);\n        } else {\n          frame_len = 0;\n        }\n\n        if (frame_len != 0) {\n          TRACE(1, \"--data start encode %d\", frame_len);\n          // DUMP8(\"%02x \",uart_stream_buf,10);\n\n          // stime=hal_sys_timer_get();\n\n          ret = voice_compression_handle(app_ai_get_encode_type(),\n                                         uart_stream_buf,\n                                         VOB_PCM_SIZE_TO_SAMPLE_CNT(640),\n                                         app_ai_is_algorithm_engine_reset());\n          app_ai_set_algorithm_engine_reset(false);\n\n          ai_function_handle(API_DATA_SEND, NULL, 0);\n\n          // etime=hal_sys_timer_get();\n          // TRACE(1,\"OPUS COST TIME %d\", TICKS_TO_MS(etime-stime));\n          // TRACE(2,\"%s ====>sys freq calc : %d\\n\", __func__,\n          // hal_sys_timer_calc_cpu_freq(50, 0));\n          audio_dump_add_channel_data(0, (short *)uart_stream_buf,\n                                      frame_len / 2);\n          audio_dump_run();\n          send_message();\n          if (ret < 0) {\n            goto __EXCEPTION;\n          }\n        }\n      }\n    }\n\n    continue;\n\n  __EXCEPTION:\n    app_ai_voice_stop_stream();\n  }\n}\n#endif\n"
  },
  {
    "path": "services/communication/comminication_knowles/communication_sysapi.h",
    "content": "#ifndef __COMMUNICATION_SYSAPI_H__\n#define __COMMUNICATION_SYSAPI_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef _WIN32\n#include \"stdio.h\"\n\n#define TRACE(str, ...)                 do { printf(\"%s/\" str \"\\n\", __FUNCTION__, __VA_ARGS__); } while (0)\n#define ASSERT(cond, str, ...)          \\\n    do { if (!(cond)) { printf(\"[ASSERT]%s/\" str, __FUNCTION__, __VA_ARGS__); while (1); } } while (0)\n#define TRACE_TIME(num,str, ...)            TRACE(num,str, __VA_ARGS__)\n\nint write_sig_data(const unsigned char *data, unsigned int len);\nint write_code_data(const unsigned char *data, unsigned int len);\nvoid programmer_main(void);\n#else\n#include \"hal_trace.h\"\n#include \"hal_timer.h\"\n\n#define TRACE_TIME(num,str, ...)            TRACE(num+1,\"[%05u] \" str, TICKS_TO_MS(hal_sys_timer_get()), ##__VA_ARGS__)\n#endif\n\n#define UART_OUT_SIGNAL_ID 0x19\nenum DOWNLOAD_TRANSPORT {\n    TRANSPORT_USB,\n    TRANSPORT_UART,\n};\n\nenum XFER_TIMEOUT {\n    XFER_TIMEOUT_SHORT,\n    XFER_TIMEOUT_MEDIUM,\n    XFER_TIMEOUT_LONG,\n    XFER_TIMEOUT_IDLE,\n\n    XFER_TIMEOUT_QTY\n};\n\nenum UART_DMA_STATE {\n    UART_DMA_IDLE,\n    UART_DMA_START,\n    UART_DMA_DONE,\n    UART_DMA_ERROR,\n};\n\nvoid init_transport(void);\nvoid deinit_transport(void);\nvoid reinit_transport(void);\nvoid set_send_timeout(uint32_t timeout);\nint secure_settings_valid(void);\nint secure_boot_enabled(void);\nint usb_enabled(void);\nint usb_connected(void);\nunsigned short get_boot_security_value(void);\nunsigned int get_boot_key_index(void);\nint send_data(const unsigned char *buf, unsigned int len);\nint recv_data(unsigned char *buf, unsigned int len);\nint recv_data_dma(unsigned char *buf, unsigned int len, unsigned int expect);\nvoid recv_data_state_get(enum UART_DMA_STATE *state);\nvoid recv_data_reset(void);\nint handle_error(void);\nint cancel_input(void);\n\nint verify_signature(const unsigned char *key, const unsigned char *sig, const unsigned char *data, unsigned int len);\n\nint debug_read_enabled(void);\nint debug_write_enabled(void);\n\nint get_flash_boot_flag(void);\nvoid set_flash_boot_flag(int flag);\nvoid system_reboot(void);\nvoid system_shutdown(void);\nvoid system_flash_boot(void);\nvoid system_set_bootmode(unsigned int bootmode);\nvoid system_clear_bootmode(unsigned int bootmode);\nunsigned int system_get_bootmode(void);\n\nvoid wait_trace_finished(void);\n\nunsigned int get_current_time(void);\nuint32_t ama_uart_get_fifo_data(uint8_t *buf);\nuint32_t avil_len_of_the_fifo();\nvoid send_message();\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/communication/comminication_knowles/tool_msg.h",
    "content": "#ifndef __TOOL_MSG_H__\n#define __TOOL_MSG_H__\n\n#include \"communication_cmd_msg.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define BOOT_MAGIC_NUMBER           0xBE57EC1C\n#define BOOT_HASH_TYPE_MD5          1\n#define BOOT_HASH_TYPE_SHA256       2\n#define BOOT_KEY_TYPE_RSA2048       1\n#define BOOT_KEY_TYPE_ECDSA192      2\n#define BOOT_KEY_TYPE_ECDSA256      3\n\n#ifdef __PC_CMD_UART__\n#define PREFIX_CHAR                 0x7b//{\n#else\n#define PREFIX_CHAR                 0xBE\n#endif\n\n#define KEY_LEN                     (4 + 256 + 256)\n#define SIG_LEN                     256\n\n#define BOOT_STRUCT_OFFSET_TO_SIGN(b)  \\\n    ((unsigned char *)&((struct boot_struct_t *)(b))->hdr.security)\n#define BOOT_STRUCT_LEN_TO_SIGN     \\\n    ((unsigned int)&((struct boot_struct_t *)0)->sig[0] - \\\n    (unsigned int)&((struct boot_struct_t *)0)->hdr.security)\n\n#define SIG_MSG_OVERHEAD            8\n#define SIG_MSG_EXTRA_DATA_LEN      (sizeof(struct boot_struct_t) + sizeof(struct code_sig_struct_t))\n#define SIG_MSG_TOTAL_LEN           (SIG_MSG_OVERHEAD + SIG_MSG_EXTRA_DATA_LEN)\n\n#define CODE_MSG_OVERHEAD           8\n#define BURN_DATA_MSG_OVERHEAD      16\n\n#define SECTOR_SIZE_64K             (1 << 16)\n#define SECTOR_SIZE_32K             (1 << 15)\n#define SECTOR_SIZE_16K             (1 << 14)\n#define SECTOR_SIZE_4K              (1 << 12)\n\n#define MSG_TOTAL_LEN(msg)          (sizeof((msg)->hdr) + (msg)->hdr.len + 1)\n\nenum MSG_TYPE {\n    TYPE_SYS = 0x00,\n    TYPE_READ = 0x01,\n    TYPE_WRITE = 0x02,\n    TYPE_BULK_READ = 0x03,\n    TYPE_SYNC = 0x50,\n    TYPE_SIG_INFO = 0x51,\n    TYPE_SIG = 0x52,\n    TYPE_CODE_INFO = 0x53,\n    TYPE_CODE = 0x54,\n    TYPE_RUN = 0x55,\n    TYPE_SECTOR_SIZE = 0x60,\n    TYPE_ERASE_BURN_START = 0x61,\n    TYPE_ERASE_BURN_DATA = 0x62,\n    TYPE_BURN_START = 0x63,\n    TYPE_BURN_DATA = 0x64,\n    TYPE_BURN_CMD = 0x65,\n    TYPE_GET_SECTOR_INFO = 0x66,\n#if defined(__EXT_CMD_SUPPORT__)\n    TYPE_EXTEND_CMD = 0x67,\n#endif\n    TYPE_COMMUNICATION_CMD = 0x68,\n};\n\nenum SYS_CMD_TYPE {\n    SYS_CMD_REBOOT = 0xF1,\n    SYS_CMD_SHUTDOWN = 0xF2,\n    SYS_CMD_FLASH_BOOT = 0xF3,\n    SYS_CMD_SET_BOOTMODE = 0xE1,\n    SYS_CMD_CLR_BOOTMODE = 0xE2,\n    SYS_CMD_GET_BOOTMODE = 0xE3,\n};\n\nenum ERR_CODE {\n    ERR_NONE = 0x00,\n    ERR_LEN = 0x01,\n    ERR_CHECKSUM = 0x02,\n    ERR_NOT_SYNC = 0x03,\n    ERR_NOT_SEC = 0x04,\n    ERR_SYNC_WORD = 0x05,\n    ERR_SYS_CMD = 0x06,\n    ERR_DATA_ADDR = 0x07,\n    ERR_DATA_LEN = 0x08,\n    ERR_ACCESS_RIGHT = 0x09,\n\n    ERR_TYPE_INVALID = 0x0F,\n\n    //ERR_BOOT_OK = 0x10,\n    ERR_BOOT_MAGIC = 0x11,\n    ERR_BOOT_SEC = 0x12,\n    ERR_BOOT_HASH_TYPE = 0x13,\n    ERR_BOOT_KEY_TYPE = 0x14,\n    ERR_BOOT_KEY_LEN = 0x15,\n    ERR_BOOT_SIG_LEN = 0x16,\n    ERR_BOOT_SIG = 0x17,\n    ERR_BOOT_CRC = 0x18,\n    ERR_BOOT_LEN = 0x19,\n    ERR_SIG_CODE_SIZE = 0x1A,\n    ERR_SIG_SIG_LEN = 0x1B,\n    ERR_SIG_INFO_MISSING = 0x1C,\n\n    ERR_CODE_OK = 0x20,\n    ERR_BOOT_MISSING = 0x21,\n    ERR_CODE_SIZE_SIG = 0x22,\n    ERR_CODE_ADDR_SIZE = 0x23,\n    ERR_CODE_INFO_MISSING = 0x24,\n    ERR_CODE_CRC = 0x25,\n    ERR_CODE_SIG = 0x26,\n\n    ERR_CODE_MISSING = 0x31,\n\n    ERR_BURN_OK = 0x60,\n    ERR_SECTOR_SIZE = 0x61,\n    ERR_SECTOR_SEQ_OVERFLOW = 0x62,\n    ERR_BURN_INFO_MISSING = 0x63,\n    ERR_SECTOR_DATA_LEN = 0x64,\n    ERR_SECTOR_DATA_CRC = 0x65,\n    ERR_SECTOR_SEQ = 0x66,\n    ERR_ERASE_FLSH = 0x67,\n    ERR_BURN_FLSH = 0x68,\n    ERR_VERIFY_FLSH = 0x69,\n    ERR_BURN_CMD = 0x6A,\n\n    ERR_TYPE_MISMATCHED = 0xE1,\n    ERR_SEQ_MISMATCHED = 0xE2,\n    ERR_BUF_TOO_SMALL = 0xE3,\n\n    ERR_INTERNAL = 0xFF,\n};\n\nenum PARSE_STATE {\n    PARSE_HEADER,\n    PARSE_DATA,\n    PARSE_EXTRA,\n};\n\nstruct message_t {\n    struct msg_hdr_t {\n        unsigned char prefix;\n        unsigned char type;\n        unsigned char seq;\n        unsigned char len;\n    } hdr;\n    unsigned char data[255];\n};\n\nstruct boot_struct_t {\n    struct boot_hdr_t {\n        unsigned int magic;\n        unsigned short security;\n        unsigned char hash_type;\n        unsigned char key_type;\n        unsigned short key_len;\n        unsigned short sig_len;\n        unsigned int build_info_start;\n    } hdr;\n    unsigned char key[KEY_LEN];\n    unsigned char sig[SIG_LEN];\n};\n\nstruct code_sig_struct_t {\n    unsigned int code_size;\n    unsigned short sig_len;\n    unsigned short reserved;\n    unsigned char sig[SIG_LEN];\n};\n\nstruct exec_struct_t {\n    unsigned int entry;\n    unsigned int param;\n    unsigned int sp;\n    unsigned int reserved;\n};\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/communication/communication_svr.cpp",
    "content": "#include \"communication_svr.h\"\n#include \"app_ai_if_config.h\"\n#include \"cmsis_nvic.h\"\n#include \"cmsis_os.h\"\n#include \"communication_sysapi.h\"\n#include \"crc32.h\"\n#include \"hal_gpio.h\"\n#include \"hal_iomux.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"plat_types.h\"\n#include \"stdbool.h\"\n#include \"stdint.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n\n//======================================================================================================\n\nenum COMMUNICATION_MSG {\n  COMMUNICATION_MSG_TX_REQ = 0,\n  COMMUNICATION_MSG_TX_DONE = 1,\n  COMMUNICATION_MSG_RX_REQ = 2,\n  COMMUNICATION_MSG_RX_DONE = 3,\n  COMMUNICATION_MSG_INIT = 4,\n  COMMUNICATION_MSG_REINIT = 5,\n  COMMUNICATION_MSG_RESET = 6,\n  COMMUNICATION_MSG_BREAK = 7,\n};\n\nconst static uint8_t communication_process_log[8][26] = {\n    \"COMMUNICATION_MSG_TX_REQ\", \"COMMUNICATION_MSG_TX_DONE\",\n    \"COMMUNICATION_MSG_RX_REQ\", \"COMMUNICATION_MSG_RX_DONE\",\n    \"COMMUNICATION_MSG_INIT\",   \"COMMUNICATION_MSG_REINIT\",\n    \"COMMUNICATION_MSG_RESET\",  \"COMMUNICATION_MSG_BREAK\",\n};\n\nenum COMMUNICATION_MODE {\n  COMMUNICATION_MODE_NULL,\n  COMMUNICATION_MODE_TX,\n  COMMUNICATION_MODE_RX,\n  COMMUNICATION_MODE_ENABLE_IRQ,\n  COMMUNICATION_MODE_DISABLE_IRQ,\n};\n\n#define COMMAND_BLOCK_MAX (5)\n#define COMMAND_LEN_MAX (128)\n#define COMMAND_TRANSMITTED_SIGNAL (1 << 0)\n\ntypedef struct {\n  uint8_t cmd_buf[COMMAND_LEN_MAX];\n  uint8_t cmd_len;\n} COMMAND_BLOCK;\nosPoolDef(command_mempool, COMMAND_BLOCK_MAX, COMMAND_BLOCK);\nosPoolId command_mempool = NULL;\n\n#define COMMUNICATION_MAILBOX_MAX (10)\ntypedef struct {\n  uint32_t src_thread;\n  uint32_t system_time;\n  uint32_t message;\n  uint32_t parms1;\n  uint32_t parms2;\n} COMMUNICATION_MAIL;\n\nosMailQDef(communication_mailbox, COMMUNICATION_MAILBOX_MAX,\n           COMMUNICATION_MAIL);\nstatic osMailQId communication_mailbox = NULL;\nstatic uint8_t communication_mailbox_cnt = 0;\n\nstatic osThreadId communication_tid = NULL;\nstatic void communication_thread(void const *argument);\nosThreadDef(communication_thread, osPriorityHigh, 1, 2048,\n            \"communication_server\");\n\nstatic bool uart_opened = false;\nstatic int uart_error_detected = 0;\n\n#if defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\nstatic const enum HAL_UART_ID_T comm_uart = HAL_UART_ID_2;\n#else\nstatic const enum HAL_UART_ID_T comm_uart = HAL_UART_ID_1;\n#endif\n\nstatic const struct HAL_UART_CFG_T uart_cfg = {\n    HAL_UART_PARITY_NONE,\n    HAL_UART_STOP_BITS_1,\n    HAL_UART_DATA_BITS_8,\n    HAL_UART_FLOW_CONTROL_NONE,\n    HAL_UART_FIFO_LEVEL_1_2,\n    HAL_UART_FIFO_LEVEL_1_2,\n#if defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n    1152000,\n#else\n    921600,\n#endif\n    true,\n    true,\n    false,\n};\n\nstatic bool uart_rx_dma_is_running = false;\n\nstatic COMMAND_BLOCK *rx_command_block_p = NULL;\n\nstatic uint32_t uart_rx_idle_counter = 0;\nstatic void uart_rx_idle_handler(void const *param);\nosTimerDef(uart_rx_idle_timer, uart_rx_idle_handler);\nstatic osTimerId uart_rx_idle_timer_id = NULL;\n\nstatic communication_receive_func_typedef communication_receive_cb = NULL;\n\nconst static struct HAL_IOMUX_PIN_FUNCTION_MAP cfg_led2 = {\n    HAL_IOMUX_PIN_LED2,\n    HAL_IOMUX_FUNC_GPIO,\n    HAL_IOMUX_PIN_VOLTAGE_VBAT,\n    HAL_IOMUX_PIN_PULLUP_ENABLE,\n};\n\ninline int communication_mailbox_put(COMMUNICATION_MAIL *msg_src);\nstatic void communication_process(COMMUNICATION_MAIL *mail_p);\nint communication_io_mode_switch(enum COMMUNICATION_MODE mode);\n\nstatic void uart_rx_dma_stop(void) {\n  union HAL_UART_IRQ_T mask;\n\n  uint32_t lock = int_lock();\n  //    TRACE(1,\"uart_rx_dma_stop:%d\", uart_rx_dma_is_running);\n  if (uart_rx_dma_is_running) {\n    mask.reg = 0;\n    hal_uart_irq_set_mask(comm_uart, mask);\n    hal_uart_stop_dma_recv(comm_uart);\n    uart_rx_dma_is_running = false;\n  }\n\n  int_unlock(lock);\n}\n\nstatic void uart_rx_dma_start(void) {\n  union HAL_UART_IRQ_T mask;\n\n  uint32_t lock = int_lock();\n\n  //    TRACE(1,\"uart_rx_dma_start:%d\", uart_rx_dma_is_running);\n\n  hal_uart_flush(comm_uart, 0);\n  // hal_uart_dma_recv(comm_uart, rx_command_block_p->cmd_buf, COMMAND_LEN_MAX,\n  // NULL, NULL);\n  mask.reg = 0;\n  mask.RT = 1;\n  // hal_uart_irq_set_mask(comm_uart, mask);\n  hal_uart_dma_recv_mask(comm_uart, rx_command_block_p->cmd_buf,\n                         COMMAND_LEN_MAX, NULL, NULL, &mask);\n\n  uart_rx_dma_is_running = true;\n\n  int_unlock(lock);\n}\n\nstatic void uart_break_handler(void) {\n  union HAL_UART_IRQ_T mask;\n  COMMUNICATION_MAIL msg;\n  memset(&msg, 0, sizeof(msg));\n\n  TRACE(0, \"UART-BREAK\");\n  mask.reg = 0;\n  hal_uart_irq_set_mask(comm_uart, mask);\n  hal_uart_flush(comm_uart, 0);\n  uart_error_detected = 1;\n  msg.message = COMMUNICATION_MSG_BREAK;\n  communication_mailbox_put(&msg);\n}\n\nstatic void uart_rx_dma_handler(uint32_t xfer_size, int dma_error,\n                                union HAL_UART_IRQ_T status) {\n  COMMUNICATION_MAIL msg;\n\n  // TRACE(8,\"UART-RX size:%d dma_error=%d, status=0x%08x rt:%d fe:%d pe:%d\n  // be:%d oe:%d\", xfer_size, dma_error, status, status.RT, status.FE,\n  // status.PE, status.BE, status.OE);\n\n  if (status.BE) {\n    uart_break_handler();\n    return;\n  }\n\n  memset(&msg, 0, sizeof(COMMUNICATION_MAIL));\n  msg.message = COMMUNICATION_MSG_RX_DONE;\n\n  if (dma_error || status.FE || status.PE || status.BE || status.OE) {\n    uart_error_detected = 1;\n    uart_rx_dma_stop();\n    msg.parms1 = false;\n    msg.message = COMMUNICATION_MSG_RESET;\n    communication_mailbox_put(&msg);\n  } else {\n    if (xfer_size) {\n      msg.parms1 = true;\n      msg.parms2 = xfer_size;\n      communication_mailbox_put(&msg);\n    } else {\n      uart_rx_dma_stop();\n      msg.message = COMMUNICATION_MSG_RESET;\n      communication_mailbox_put(&msg);\n    }\n  }\n}\n\nstatic void uart_tx_dma_handler(uint32_t xfer_size, int dma_error) {\n  COMMUNICATION_MAIL msg;\n\n  memset(&msg, 0, sizeof(COMMUNICATION_MAIL));\n\n  //    TRACE(2,\"UART-TX size:%d dma_error=%d\", xfer_size, dma_error);\n\n  osSignalSet(communication_tid, COMMAND_TRANSMITTED_SIGNAL);\n\n  msg.message = COMMUNICATION_MSG_TX_DONE;\n\n  communication_mailbox_put(&msg);\n}\n\nstatic void uart_init(void) {\n  struct HAL_UART_CFG_T comm_uart_cfg;\n\n  if (!uart_opened) {\n    memcpy(&comm_uart_cfg, &uart_cfg, sizeof(comm_uart_cfg));\n    hal_uart_open(comm_uart, &comm_uart_cfg);\n    hal_uart_irq_set_dma_handler(comm_uart, uart_rx_dma_handler,\n                                 uart_tx_dma_handler);\n    uart_opened = true;\n  }\n\n  hal_uart_flush(comm_uart, 0);\n}\n\nstatic void uart_deinit(void) {\n  if (uart_opened) {\n    hal_uart_close(comm_uart);\n    uart_opened = false;\n  }\n}\n\nstatic void uart_rx_idle_timer_start(void) {\n  uart_rx_idle_counter = 0;\n  TRACE(1, \"[%s] enter...\", __func__);\n\n  if (uart_rx_idle_timer_id != NULL) {\n    osTimerStop(uart_rx_idle_timer_id);\n    osTimerStart(uart_rx_idle_timer_id, 100);\n  }\n}\n\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\nstatic void uart_rx_edge_detect_handler(enum HAL_GPIO_PIN_T pin) {\n  COMMUNICATION_MAIL msg = {0};\n\n  // disable led2 pin external interrupt mode...\n  communication_io_mode_switch(COMMUNICATION_MODE_DISABLE_IRQ);\n\n  // post uart rx request...\n  msg.message = COMMUNICATION_MSG_RX_REQ;\n  communication_mailbox_put(&msg);\n}\n#endif\n\nstatic void uart_rx_idle_handler(void const *param) {\n  const uint8_t rx_idle_indicate[2] = {0x10, 0x24};\n\n  if (uart_rx_idle_counter++ >= 150) // 150 * 100 = 15s\n  {\n    TRACE(1, \"[%s] enter...\", __func__);\n\n    uart_rx_idle_counter = 0;\n\n    // stop virtual timer...\n    osTimerStop(uart_rx_idle_timer_id);\n\n    // stop uart rx dma...\n    uart_rx_dma_stop();\n\n    // notify charge box uart rx dma has closed...\n    communication_io_mode_switch(COMMUNICATION_MODE_TX);\n    hal_uart_dma_send(comm_uart, rx_idle_indicate, 2, NULL, NULL);\n    osDelay(10);\n\n    // config led2 pin as external interrupt mode...\n    communication_io_mode_switch(COMMUNICATION_MODE_ENABLE_IRQ);\n  }\n}\n\nint communication_io_mode_switch(enum COMMUNICATION_MODE mode) {\n  // best1400 and best1402 platform\n  switch (mode) {\n  case COMMUNICATION_MODE_TX: {\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n    hal_iomux_single_wire_uart1_tx();\n#endif\n  } break;\n  case COMMUNICATION_MODE_RX: {\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n    hal_iomux_single_wire_uart1_rx();\n#endif\n  } break;\n  case COMMUNICATION_MODE_ENABLE_IRQ: {\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n    hal_iomux_single_wire_uart1_enable_irq(uart_rx_edge_detect_handler);\n#endif\n  } break;\n  case COMMUNICATION_MODE_DISABLE_IRQ: {\n#if defined(CHIP_BEST1400) || defined(CHIP_BEST1402)\n    hal_iomux_single_wire_uart1_disable_irq();\n#endif\n  } break;\n  default:\n    break;\n  }\n  return 0;\n}\n\nint communication_io_mode_init(void) {\n  communication_io_mode_switch(COMMUNICATION_MODE_RX);\n\n  return 0;\n}\n\ninline int communication_mailbox_put(COMMUNICATION_MAIL *msg_src) {\n  osStatus status;\n\n  COMMUNICATION_MAIL *mail_p = NULL;\n\n  if (msg_src == NULL) {\n    return -1;\n  }\n\n  mail_p = (COMMUNICATION_MAIL *)osMailAlloc(communication_mailbox, 0);\n  if (!mail_p) {\n    osEvent evt;\n    TRACE(0, \"communication_mailbox\");\n    for (uint8_t i = 0; i < COMMUNICATION_MAILBOX_MAX; i++) {\n      evt = osMailGet(communication_mailbox, 0);\n      if (evt.status == osEventMail) {\n        TRACE(4, \"msg cnt:%d msg:%d parms:%08x/%08x\", i,\n              ((COMMUNICATION_MAIL *)(evt.value.p))->message,\n              ((COMMUNICATION_MAIL *)(evt.value.p))->parms1,\n              ((COMMUNICATION_MAIL *)(evt.value.p))->parms2);\n      } else {\n        break;\n      }\n    }\n    ASSERT(mail_p, \"communication_mailbox error\");\n  }\n  mail_p->src_thread = (uint32_t)osThreadGetId();\n  mail_p->system_time = hal_sys_timer_get();\n  mail_p->message = msg_src->message;\n  mail_p->parms1 = msg_src->parms1;\n  mail_p->parms2 = msg_src->parms2;\n  status = osMailPut(communication_mailbox, mail_p);\n  if (osOK == status) {\n    communication_mailbox_cnt++;\n  }\n\n  return (int)status;\n}\n\ninline int communication_mailbox_free(COMMUNICATION_MAIL *mail_p) {\n  osStatus status;\n\n  status = osMailFree(communication_mailbox, mail_p);\n  if (osOK == status) {\n    communication_mailbox_cnt--;\n  }\n  return (int)status;\n}\n\ninline int communication_mailbox_get(COMMUNICATION_MAIL **mail_p) {\n  osEvent evt;\n  evt = osMailGet(communication_mailbox, osWaitForever);\n  if (evt.status == osEventMail) {\n    *mail_p = (COMMUNICATION_MAIL *)evt.value.p;\n    return 0;\n  }\n  return -1;\n}\n\nstatic void communication_thread(void const *argument) {\n  while (1) {\n    COMMUNICATION_MAIL *mail_p = NULL;\n    if (!communication_mailbox_get(&mail_p)) {\n      communication_process(mail_p);\n      communication_mailbox_free(mail_p);\n    }\n  }\n}\n\nint communication_command_block_alloc(COMMAND_BLOCK **cmd_blk) {\n  *cmd_blk = (COMMAND_BLOCK *)osPoolCAlloc(command_mempool);\n  ASSERT(*cmd_blk, \"%s error\", __func__);\n  return 0;\n}\n\nvoid communication_command_block_free(COMMAND_BLOCK *cmd_blk) {\n  osPoolFree(command_mempool, cmd_blk);\n}\n\nvoid communication_send_command(COMMAND_BLOCK *cmd_blk) {\n  COMMUNICATION_MAIL mail;\n  memset(&mail, 0, sizeof(mail));\n  ASSERT(cmd_blk->cmd_len <= COMMAND_LEN_MAX, \"%s len error\", __func__);\n  mail.message = COMMUNICATION_MSG_TX_REQ;\n  mail.parms2 = (uint32_t)cmd_blk;\n  communication_mailbox_put(&mail);\n}\n\nstatic void communication_process(COMMUNICATION_MAIL *mail_p) {\n  osEvent evt;\n  COMMAND_BLOCK *command_block_p;\n  COMMUNICATION_MAIL msg;\n  uint32_t lock;\n\n  TRACE(2, \"[%s]: %s\", __func__, communication_process_log[mail_p->message]);\n\n  memset(&msg, 0, sizeof(COMMUNICATION_MAIL));\n  switch (mail_p->message) {\n  case COMMUNICATION_MSG_TX_REQ:\n    command_block_p = (COMMAND_BLOCK *)mail_p->parms2;\n    TRACE(1, \"UART TX:%d\", command_block_p->cmd_len);\n    DUMP8(\"%02x \", command_block_p->cmd_buf, command_block_p->cmd_len);\n    uart_rx_dma_stop();\n    communication_io_mode_switch(COMMUNICATION_MODE_TX);\n    osSignalClear(communication_tid, COMMAND_TRANSMITTED_SIGNAL);\n    hal_uart_dma_send(comm_uart, command_block_p->cmd_buf,\n                      command_block_p->cmd_len, NULL, NULL);\n    evt = osSignalWait(COMMAND_TRANSMITTED_SIGNAL, 1000);\n    if (evt.status == osEventTimeout) {\n      ASSERT(0, \"%s osEventTimeout\", __func__);\n    }\n    communication_command_block_free(command_block_p);\n    while (!hal_uart_get_flag(comm_uart).TXFE ||\n           hal_uart_get_flag(comm_uart).BUSY) {\n      osThreadYield();\n    }\n    communication_io_mode_switch(COMMUNICATION_MODE_RX);\n    if (!uart_error_detected) {\n      uart_rx_dma_start();\n      uart_rx_idle_timer_start();\n    }\n    break;\n  case COMMUNICATION_MSG_TX_DONE:\n    break;\n  case COMMUNICATION_MSG_RX_REQ:\n    communication_io_mode_init();\n    uart_init();\n    uart_rx_dma_start();\n    uart_rx_idle_timer_start();\n    break;\n  case COMMUNICATION_MSG_RX_DONE:\n    TRACE(2, \"UART RX status:%d len:%d\", mail_p->parms1, mail_p->parms2);\n    DUMP8(\"%02x \", rx_command_block_p->cmd_buf, mail_p->parms2);\n    TRACE(1, \"%s\", rx_command_block_p->cmd_buf);\n\n    if (communication_receive_cb != NULL)\n      (*communication_receive_cb)(rx_command_block_p->cmd_buf, mail_p->parms2);\n\n    memset(rx_command_block_p->cmd_buf, 0, mail_p->parms2);\n\n    if (!uart_error_detected) {\n      uart_rx_dma_start();\n      uart_rx_idle_timer_start();\n    }\n    break;\n  case COMMUNICATION_MSG_REINIT:\n    uart_deinit();\n  case COMMUNICATION_MSG_INIT:\n    uart_error_detected = 0;\n    communication_io_mode_init();\n    uart_init();\n    uart_rx_dma_start();\n    uart_rx_idle_timer_id =\n        osTimerCreate(osTimer(uart_rx_idle_timer), osTimerPeriodic, NULL);\n    uart_rx_idle_timer_start();\n    break;\n  case COMMUNICATION_MSG_RESET:\n  case COMMUNICATION_MSG_BREAK:\n    lock = int_lock();\n    uart_rx_dma_stop();\n    communication_io_mode_switch(COMMUNICATION_MODE_RX);\n    hal_uart_flush(comm_uart, 0);\n    uart_rx_dma_start();\n    uart_error_detected = 0;\n    int_unlock(lock);\n    uart_rx_idle_timer_start();\n    break;\n\n  default:\n    break;\n  }\n}\n\nvoid communication_init(void) {\n  COMMUNICATION_MAIL msg;\n  COMMAND_BLOCK *cmd_blk;\n\n  memset(&msg, 0, sizeof(COMMUNICATION_MAIL));\n  TRACE(1, \"%s\", __func__);\n\n  if (command_mempool == NULL) {\n    command_mempool = osPoolCreate(osPool(command_mempool));\n  }\n\n  if (communication_mailbox == NULL) {\n    communication_mailbox = osMailCreate(osMailQ(communication_mailbox), NULL);\n  }\n\n  if (communication_tid == NULL) {\n    communication_tid = osThreadCreate(osThread(communication_thread), NULL);\n  }\n\n  if (rx_command_block_p == NULL) {\n    communication_command_block_alloc(&rx_command_block_p);\n    memset(rx_command_block_p->cmd_buf, 0, COMMAND_LEN_MAX);\n    rx_command_block_p->cmd_len = 0;\n  }\n\n  msg.message = COMMUNICATION_MSG_INIT;\n  communication_mailbox_put(&msg);\n\n  communication_command_block_alloc(&cmd_blk);\n  cmd_blk->cmd_buf[0] = 0xff;\n  cmd_blk->cmd_len = 1;\n  communication_send_command(cmd_blk);\n}\n\nint communication_receive_register_callback(\n    communication_receive_func_typedef p) {\n  if (p == NULL)\n    return -1;\n\n  communication_receive_cb = p;\n\n  TRACE(1, \"[%s] register receive callback success\\n\", __func__);\n\n  return 0;\n}\n\nint communication_send_buf(uint8_t *buf, uint8_t len) {\n  COMMAND_BLOCK *cmd_blk;\n\n  communication_command_block_alloc(&cmd_blk);\n  memcpy(cmd_blk->cmd_buf, buf, len);\n  cmd_blk->cmd_len = len;\n  communication_send_command(cmd_blk);\n  return 0;\n}\n\n#ifdef KNOWLES_UART_DATA\n#include \"knowles_uart.h\"\n\nvoid uart_audio_init() {\n  TRACE(1, \"%s run!!!\", __func__);\n  init_transport();\n}\n\nvoid uart_audio_deinit() {\n  deinit_transport();\n  reopen_uart();\n}\n\n#endif\n"
  },
  {
    "path": "services/communication/communication_svr.h",
    "content": "#ifndef __COMMUNICATION_SVR_H__\n#define __COMMUNICATION_SVR_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \n\ntypedef void (*communication_receive_func_typedef)(uint8_t *buf, uint8_t len);\n\nvoid communication_init(void);\nint communication_receive_register_callback(\n    communication_receive_func_typedef p);\nint communication_send_buf(uint8_t *buf, uint8_t len);\n\n#ifdef KNOWLES_UART_DATA\nvoid uart_audio_init();\nvoid uart_audio_deinit();\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/cp_accel/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y += -Iapps/common -Iutils/cqueue\n\nifeq ($(CP_ACCEL_DEBUG),1)\nccflags-y += -DCP_ACCEL_DEBUG\nendif\n\n"
  },
  {
    "path": "services/cp_accel/cp_accel.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef CHIP_HAS_CP\n\n#include \"cp_accel.h\"\n#include \"app_utils.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_mcu2cp.h\"\n#include \"hal_memsc.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"mpu.h\"\n#include \"stdarg.h\"\n#include \"string.h\"\n#include \"system_cp.h\"\n\n#ifdef CP_ACCEL_DEBUG\n#define CP_ACCEL_TRACE(s, ...) TRACE(s, ##__VA_ARGS__)\n#else\n#define CP_ACCEL_TRACE(s, ...)\n#endif\n\n#define CP_NO_FLASH_ACCESS\n\n#define CP_CRASH_START_TIMEOUT MS_TO_TICKS(100)\n#define CP_TRACE_FLUSH_TIMEOUT MS_TO_TICKS(200)\n#define CP_CRASH_DUMP_TIMEOUT MS_TO_TICKS(500)\n#define CP_TRACE_BUF_FULL_INTVL MS_TO_TICKS(50)\n\nenum CP_SYS_EVENT_T {\n  CP_SYS_EVENT_NONE = 0,\n  CP_SYS_EVENT_CRASH_START,\n  CP_SYS_EVENT_CRASH_END,\n  CP_SYS_EVENT_TRACE_FLUSH,\n  CP_SYS_EVENT_TRACE_BUF_FULL,\n};\n\nstatic bool ram_inited;\nstatic bool cp_accel_inited = false;\nstatic struct cp_task_env_tag cp_task_env;\nstatic CP_BSS_LOC volatile struct cp_env_tag cp_env;\n\nstatic CP_BSS_LOC volatile enum CP_SYS_EVENT_T cp_sys_evt;\nstatic CP_BSS_LOC bool cp_in_crash;\nstatic CP_BSS_LOC volatile uint8_t cp_in_sleep;\nstatic CP_BSS_LOC uint32_t cp_buf_full_time;\nstatic CP_BSS_LOC uint8_t req_event = 0, pending_event = 0;\n\nstatic CP_TEXT_SRAM_LOC int send_sys_ctrl_cp2mcu(uint32_t event) {\n  return hal_mcu2cp_send_cp(HAL_MCU2CP_ID_1, HAL_MCU2CP_MSG_TYPE_0,\n                            (unsigned char *)event, 0);\n}\n\nstatic CP_TEXT_SRAM_LOC void\ncp_trace_crash_notify(enum HAL_TRACE_STATE_T state) {\n  uint32_t time;\n\n  if (state == HAL_TRACE_STATE_CRASH_ASSERT_START ||\n      state == HAL_TRACE_STATE_CRASH_FAULT_START) {\n    cp_in_crash = true;\n    cp_sys_evt = CP_SYS_EVENT_CRASH_START;\n    mpu_close();\n    send_sys_ctrl_cp2mcu(0);\n\n    time = hal_sys_timer_get();\n    while (cp_sys_evt == CP_SYS_EVENT_CRASH_START &&\n           hal_sys_timer_get() - time < CP_CRASH_START_TIMEOUT)\n      ;\n  } else {\n    cp_sys_evt = CP_SYS_EVENT_CRASH_END;\n  }\n}\n\nstatic CP_TEXT_SRAM_LOC void\ncp_trace_buffer_ctrl(enum HAL_TRACE_BUF_STATE_T buf_state) {\n  uint32_t time;\n\n  if (cp_sys_evt != CP_SYS_EVENT_NONE) {\n    return;\n  }\n\n  time = hal_sys_timer_get();\n\n  if (buf_state == HAL_TRACE_BUF_STATE_FLUSH) {\n    cp_sys_evt = CP_SYS_EVENT_TRACE_FLUSH;\n    if (!cp_in_crash) {\n      send_sys_ctrl_cp2mcu(0);\n    }\n\n    while (cp_sys_evt == CP_SYS_EVENT_TRACE_FLUSH &&\n           hal_sys_timer_get() - time < CP_TRACE_FLUSH_TIMEOUT)\n      ;\n  } else if (buf_state == HAL_TRACE_BUF_STATE_FULL ||\n             buf_state == HAL_TRACE_BUF_STATE_NEAR_FULL) {\n    if (time - cp_buf_full_time >= CP_TRACE_BUF_FULL_INTVL) {\n      cp_buf_full_time = time;\n      if (!cp_in_crash) {\n        cp_sys_evt = CP_SYS_EVENT_TRACE_BUF_FULL;\n        send_sys_ctrl_cp2mcu(0);\n      }\n    }\n  }\n}\n\nstatic SRAM_TEXT_LOC unsigned int cp2mcu_sys_arrived(const unsigned char *data,\n                                                     unsigned int len) {\n  uint32_t time;\n  uint8_t task_id = 0;\n\n  if (cp_sys_evt == CP_SYS_EVENT_TRACE_FLUSH) {\n    TRACE_FLUSH();\n    cp_sys_evt = CP_SYS_EVENT_NONE;\n  } else if (cp_sys_evt == CP_SYS_EVENT_TRACE_BUF_FULL) {\n    TRACE(0, \" \");\n    cp_sys_evt = CP_SYS_EVENT_NONE;\n  } else if (cp_sys_evt == CP_SYS_EVENT_CRASH_START) {\n    cp_sys_evt = CP_SYS_EVENT_NONE;\n\n    TRACE(0, \" \");\n    TRACE(0, \"CP Crash starts ...\");\n    UNLOCK_CP_PROCESS(); // Forced release lock\n\n    // Wait CP crash dump finishes in interrupt context\n    time = hal_sys_timer_get();\n    while (cp_sys_evt != CP_SYS_EVENT_CRASH_END &&\n           hal_sys_timer_get() - time < CP_CRASH_DUMP_TIMEOUT) {\n      if (cp_sys_evt == CP_SYS_EVENT_TRACE_FLUSH) {\n        TRACE_FLUSH();\n        cp_sys_evt = CP_SYS_EVENT_NONE;\n      }\n    }\n\n    for (task_id = 0; task_id < CP_TASK_MAX; task_id++) {\n      if (cp_task_env.p_desc[task_id].mcu_sys_ctrl_hdlr) {\n        cp_task_env.p_desc[task_id].mcu_sys_ctrl_hdlr(CP_SYS_EVENT_CRASH_END);\n      }\n    }\n\n    TRACE(0, \"CP Crash ends ...\");\n    TRACE(0, \" \");\n  }\n\n  return len;\n}\n\nstatic CP_TEXT_SRAM_LOC unsigned int\nmcu2cp_msg_arrived(const unsigned char *data, unsigned int len) {\n  uint8_t task_id = CP_TASK_ID_GET(*data);\n  uint8_t event_type = CP_EVENT_GET(*data);\n\n  cp_env.cp_msg[task_id][event_type] = 1;\n  cp_env.cp_msg_recv = true;\n\n  if (cp_task_env.p_desc[task_id].cp_evt_hdlr) {\n    cp_task_env.p_desc[task_id].cp_evt_hdlr((uint32_t)data);\n  }\n\n  return len;\n}\n\nstatic CP_TEXT_SRAM_LOC void mcu2cp_msg_sent(const unsigned char *data,\n                                             unsigned int len) {\n  // TRACE(1, \"mcu2cp_msg_sent,pending count = %d\", cp_env.mcu2cp_tx_count);\n\n  if (cp_env.mcu2cp_tx_count > 1) {\n    cp_env.mcu2cp_tx_count--;\n    pending_event = cp_env.mcu2cp_tx_pending[0];\n    hal_mcu2cp_send_mcu(HAL_MCU2CP_ID_0, HAL_MCU2CP_MSG_TYPE_0, &pending_event,\n                        1);\n\n    for (uint8_t index = 0; index < cp_env.mcu2cp_tx_count - 1; index++) {\n      cp_env.mcu2cp_tx_pending[index] = cp_env.mcu2cp_tx_pending[index + 1];\n    }\n  } else {\n    cp_env.mcu2cp_tx_count = 0;\n  }\n}\n\n#if defined(__ARM_ARCH_8M_MAIN__)\n\n#define CP_CODE_MAP_BASE (ROM_BASE + 0x800)\n#define CP_CODE_MAP_SIZE (RAMX_BASE + RAM_TOTAL_SIZE - CP_CODE_MAP_BASE)\n\nstatic CP_DATA_LOC const mpu_regions_t mpu_table_cp[] = {\n    {CP_CODE_MAP_BASE, CP_CODE_MAP_SIZE, MPU_ATTR_EXEC, MAIR_ATTR_INT_SRAM},\n    {RAM_BASE, RAM_TOTAL_SIZE, MPU_ATTR_READ_WRITE, MAIR_ATTR_INT_SRAM},\n    {CMU_BASE, 0x01000000, MPU_ATTR_READ_WRITE, MAIR_ATTR_DEVICE},\n};\n#else\nstatic CP_DATA_LOC const mpu_regions_t mpu_table_cp[] = {\n    {0, 0x800, MPU_ATTR_NO_ACCESS},\n    {FLASHX_BASE, 0x4000000, MPU_ATTR_NO_ACCESS},\n    {FLASH_BASE, 0x4000000, MPU_ATTR_NO_ACCESS},\n    {FLASH_NC_BASE, 0x4000000, MPU_ATTR_NO_ACCESS},\n};\n#endif\n\nstatic CP_TEXT_SRAM_LOC NOINLINE void accel_loop(void) {\n  uint32_t lock;\n  uint8_t task_index = 0, event_index = 0;\n  bool msg_flag = false;\n  uint8_t msg[CP_TASK_MAX][CP_EVENT_MAX];\n\n  mpu_setup_cp(mpu_table_cp, ARRAY_SIZE(mpu_table_cp));\n\n  while (1) {\n    lock = int_lock_global();\n    msg_flag = cp_env.cp_msg_recv;\n    cp_env.cp_msg_recv = false;\n    memcpy(msg, (uint8_t *)cp_env.cp_msg, sizeof(cp_env.cp_msg));\n    memset((uint8_t *)cp_env.cp_msg, 0, sizeof(cp_env.cp_msg));\n    if (false == msg_flag) {\n      cp_in_sleep = true;\n      __WFI();\n      cp_in_sleep = false;\n    }\n    int_unlock_global(lock);\n\n    if (msg_flag) {\n      for (task_index = 0; task_index < CP_TASK_MAX; task_index++) {\n        for (event_index = 0; event_index < CP_EVENT_MAX; event_index++) {\n          LOCK_CP_PROCESS();\n          if ((msg[task_index][event_index]) &&\n              (cp_task_env.p_desc[task_index].cp_work_main)) {\n            cp_task_env.p_desc[task_index].cp_work_main(event_index);\n          }\n          UNLOCK_CP_PROCESS();\n        }\n      }\n    }\n  }\n}\n\nstatic void accel_main(void) {\n  system_cp_init(!ram_inited);\n  TRACE(1, \"%s\", __func__);\n\n  ram_inited = true;\n\n  memset((uint8_t *)&cp_env, 0, sizeof(cp_env));\n\n  hal_trace_open_cp();\n\n  hal_mcu2cp_open_cp(HAL_MCU2CP_ID_0, HAL_MCU2CP_MSG_TYPE_0, mcu2cp_msg_arrived,\n                     NULL, false);\n  hal_mcu2cp_open_cp(HAL_MCU2CP_ID_1, HAL_MCU2CP_MSG_TYPE_0, NULL, NULL, false);\n\n  hal_mcu2cp_start_recv_cp(HAL_MCU2CP_ID_0);\n  // hal_mcu2cp_start_recv_cp(HAL_MCU2CP_ID_1);\n\n  cp_accel_inited = true;\n\n  accel_loop();\n}\n\nstatic SRAM_TEXT_LOC unsigned int cp2mcu_msg_arrived(const unsigned char *data,\n                                                     unsigned int len) {\n  uint8_t task_id = CP_TASK_ID_GET((uint32_t)data);\n  // TRACE(2, \"%s, task_id = %d\", __func__, task_id);\n\n  if (task_id >= CP_TASK_MAX) {\n    return -1;\n  }\n\n  if (cp_task_env.p_desc[task_id].mcu_evt_hdlr) {\n    cp_task_env.p_desc[task_id].mcu_evt_hdlr((uint32_t)data);\n  }\n\n  return len;\n}\n\nint cp_accel_open(enum CP_TASK_TYPE task_id,\n                  struct cp_task_desc const *p_task_desc) {\n  TRACE(4, \"%s, task id = %d, cp_state = %d init %d\", __func__, task_id,\n        cp_task_env.p_desc[task_id].cp_accel_state, cp_accel_inited);\n\n  if ((task_id >= CP_TASK_MAX) || (p_task_desc == NULL)) {\n    TRACE(1, \"%s task id error\", __func__);\n    return -1;\n  }\n\n  if (cp_task_env.p_desc[task_id].cp_accel_state != CP_ACCEL_STATE_CLOSED) {\n    TRACE(1, \"%s cp_accel_state error\", __func__);\n    return -1;\n  }\n\n  cp_task_env.p_desc[task_id].cp_accel_state = CP_ACCEL_STATE_OPENING;\n  cp_task_env.p_desc[task_id].cp_work_main = p_task_desc->cp_work_main;\n  cp_task_env.p_desc[task_id].cp_evt_hdlr = p_task_desc->cp_evt_hdlr;\n  cp_task_env.p_desc[task_id].mcu_evt_hdlr = p_task_desc->mcu_evt_hdlr;\n  cp_task_env.p_desc[task_id].mcu_sys_ctrl_hdlr =\n      p_task_desc->mcu_sys_ctrl_hdlr;\n\n  if (false == cp_accel_inited) {\n    hal_trace_cp_register(cp_trace_crash_notify, cp_trace_buffer_ctrl);\n\n    hal_cmu_cp_enable(RAMCP_BASE + RAMCP_SIZE, (uint32_t)accel_main);\n\n    hal_mcu2cp_open_mcu(HAL_MCU2CP_ID_0, HAL_MCU2CP_MSG_TYPE_0,\n                        cp2mcu_msg_arrived, mcu2cp_msg_sent, false);\n    hal_mcu2cp_open_mcu(HAL_MCU2CP_ID_1, HAL_MCU2CP_MSG_TYPE_0,\n                        cp2mcu_sys_arrived, NULL, false);\n\n    hal_mcu2cp_start_recv_mcu(HAL_MCU2CP_ID_0);\n    hal_mcu2cp_start_recv_mcu(HAL_MCU2CP_ID_1);\n  }\n  cp_task_env.p_desc[task_id].cp_accel_state = CP_ACCEL_STATE_OPENED;\n\n  return 0;\n}\n\nint cp_accel_close(enum CP_TASK_TYPE task_id) {\n  uint8_t i = 0;\n\n  TRACE(4, \"%s, task id = %d, cp_state = %d init %d\", __func__, task_id,\n        cp_task_env.p_desc[task_id].cp_accel_state, cp_accel_inited);\n  LOCK_CP_PROCESS(); // avoid hangup\n\n  if (cp_task_env.p_desc[task_id].cp_accel_state == CP_ACCEL_STATE_CLOSED) {\n    goto accel_close_end;\n  }\n\n  cp_task_env.p_desc[task_id].cp_accel_state = CP_ACCEL_STATE_CLOSING;\n  cp_task_env.p_desc[task_id].cp_work_main = NULL;\n  cp_task_env.p_desc[task_id].cp_evt_hdlr = NULL;\n  cp_task_env.p_desc[task_id].mcu_evt_hdlr = NULL;\n\n  for (i = 0; i < CP_TASK_MAX; i++) {\n    if (cp_task_env.p_desc[i].cp_accel_state == CP_ACCEL_STATE_OPENED ||\n        cp_task_env.p_desc[i].cp_accel_state == CP_ACCEL_STATE_OPENING) {\n      goto accel_close_end;\n    }\n  }\n\n  if (cp_accel_inited) {\n    cp_accel_inited = false;\n\n    hal_mcu2cp_close_mcu(HAL_MCU2CP_ID_0, HAL_MCU2CP_MSG_TYPE_0);\n    hal_mcu2cp_close_mcu(HAL_MCU2CP_ID_1, HAL_MCU2CP_MSG_TYPE_0);\n\n    hal_cmu_cp_disable();\n\n    system_cp_term();\n\n    hal_mcu2cp_close_cp(HAL_MCU2CP_ID_0, HAL_MCU2CP_MSG_TYPE_0);\n    hal_mcu2cp_close_cp(HAL_MCU2CP_ID_1, HAL_MCU2CP_MSG_TYPE_0);\n\n    hal_trace_cp_register(NULL, NULL);\n  }\n\naccel_close_end:\n  cp_task_env.p_desc[task_id].cp_accel_state = CP_ACCEL_STATE_CLOSED;\n  UNLOCK_CP_PROCESS();\n  return 0;\n}\n\nint SRAM_TEXT_LOC cp_accel_init_done(void) {\n  // TRACE(2, \"%s, cp_inited = %d\", __func__, cp_accel_inited);\n  return cp_accel_inited;\n}\n\nint cp_accel_send_event_mcu2cp(uint8_t event) {\n  if ((false == cp_accel_inited) || (cp_env.mcu2cp_tx_count > MAX_CP_MSG_NUM)) {\n    TRACE(2, \"send_evt error, cp_accel_inited = %d, event pending count = %d\",\n          cp_accel_inited, cp_env.mcu2cp_tx_count);\n\n    TRACE(2, \"send evt task_id = %d, event = %d\", CP_TASK_ID_GET(event),\n          CP_EVENT_GET(event));\n    return -1;\n  }\n\n  // TRACE(1, \"current CP tx count:%d\", cp_env.mcu2cp_tx_count);\n  if (cp_env.mcu2cp_tx_count > 0) {\n    cp_env.mcu2cp_tx_pending[cp_env.mcu2cp_tx_count - 1] = event;\n    cp_env.mcu2cp_tx_count++;\n  } else {\n    req_event = event;\n    cp_env.mcu2cp_tx_count = 1;\n    hal_mcu2cp_send_mcu(HAL_MCU2CP_ID_0, HAL_MCU2CP_MSG_TYPE_0, &req_event, 1);\n  }\n\n  return 0;\n}\n\nint CP_TEXT_SRAM_LOC cp_accel_send_event_cp2mcu(uint8_t event) {\n  return hal_mcu2cp_send_cp(HAL_MCU2CP_ID_0, HAL_MCU2CP_MSG_TYPE_0,\n                            (unsigned char *)(uint32_t)event, 0);\n}\n\nint SRAM_TEXT_LOC cp_accel_busy(enum CP_TASK_TYPE task_id) {\n  if (cp_task_env.p_desc[task_id].cp_accel_state != CP_ACCEL_STATE_CLOSED) {\n    if (cp_task_env.p_desc[task_id].cp_accel_state == CP_ACCEL_STATE_OPENED &&\n        cp_in_sleep && !hal_mcu2cp_local_irq_pending_cp(HAL_MCU2CP_ID_0)) {\n      return false;\n    }\n    return true;\n  }\n\n  return false;\n}\n\n#endif\n"
  },
  {
    "path": "services/cp_accel/cp_accel.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __CP_ACCEL_H__\n#define __CP_ACCEL_H__\n\n#include \"plat_types.h\"\n#include \"hal_location.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define MAX_CP_MSG_NUM                    5\n\n#define HAL_MEMSC_ID_CP                    HAL_MEMSC_ID_1\n\n#define LOCK_CP_PROCESS() \\\n     while (hal_memsc_lock(HAL_MEMSC_ID_CP) == 0){}\n\n#define UNLOCK_CP_PROCESS() \\\n     hal_memsc_unlock(HAL_MEMSC_ID_CP);\n\ntypedef unsigned int (*CP_ACCEL_CP_MAIN)(uint8_t event);\n\ntypedef unsigned int (*CP_ACCEL_EVT_HDLR)(uint8_t event);\n\n/// Tasks types definition\nenum CP_TASK_EVENT\n{\n    CP_EVENT_A2DP_DECODE = 0x00,\n\n    CP_EVENT_SCO_PROCESSING = 0x00,\n\n    CP_EVENT_AEC_PROCESSING = 0x0,\n    CP_EVENT_AEC_RESAMPLING_PROCESSING = 0x1,\n\n    CP_EVENT_HW_PROCESSING = 0x0,\n\n    /// Maximum number of event\n    CP_EVENT_MAX = 0x2,\n};\n\nenum MCU_TASK_EVENT\n{\n    MCU_EVENT_HW_DETECTED = 0,\n    MCU_EVENT_HW_NEW_DATA_AVAILABLE = 1,\n    MCU_EVENT_HW_UPSTREAM_DATA = 2,\n    MCU_EVENT_HW_START_VAD = 3,\n    MCU_EVENT_HW_CP_PROCESS_DONE = 4,\n\n    MCU_EVENT_MAX,\n};\n\n/// Tasks types definition\nenum CP_TASK_TYPE\n{\n    CP_TASK_A2DP_DECODE = 0x00,\n    CP_TASK_SCO = 0x01,\n    CP_TASK_AEC = 0x02,\n    CP_TASK_HW = 0x03,\n    /// Maximum number of tasks\n    CP_TASK_MAX,\n};\n\ntypedef enum {\n    CP_ACCEL_STATE_CLOSED = 0,\n    CP_ACCEL_STATE_OPENING,\n    CP_ACCEL_STATE_OPENED,\n    CP_ACCEL_STATE_CLOSING,\n}CP_ACCEL_STATE_E;\n\n/// Task descriptor grouping all information required.\nstruct cp_task_desc\n{\n    CP_ACCEL_STATE_E cp_accel_state;\n    CP_ACCEL_CP_MAIN cp_work_main;\n    CP_ACCEL_EVT_HDLR cp_evt_hdlr;\n    CP_ACCEL_EVT_HDLR mcu_evt_hdlr;\n    CP_ACCEL_EVT_HDLR mcu_sys_ctrl_hdlr;\n};\n/// CP TASK environment structure\nstruct cp_task_env_tag\n{\n    struct cp_task_desc p_desc[CP_TASK_MAX];\n};\n/// cp environment definition\nstruct cp_env_tag\n{\n    uint8_t mcu2cp_tx_count;\n    uint8_t mcu2cp_tx_pending[MAX_CP_MSG_NUM];\n    bool cp_msg_recv;\n    uint8_t cp_msg[CP_TASK_MAX][2];\n};\n\n/// Retrieves task type from event id.\n#define CP_TASK_ID_GET(cp_event_id) (((cp_event_id) & 0xF0) >> 4)\n/// Retrieves event from event id.\n#define CP_EVENT_GET(cp_event_id) ((cp_event_id) & 0x0F)\n/// Builds the task identifier from the type and the index of that task.\n#define CP_BUILD_ID(id, event) ( (uint8_t)(((id) << 4)|(event)) )\n\n//int cp_accel_open(CP_ACCEL_CP_MAIN cp_main, CP_ACCEL_EVT_HDLR cp_hdlr, CP_ACCEL_EVT_HDLR mcu_hdlr);\nint cp_accel_open(enum CP_TASK_TYPE task_id, struct cp_task_desc const * p_task_desc);\n\nint cp_accel_close(enum CP_TASK_TYPE task_id);\n\nint cp_accel_init_done(void);\n\nint cp_accel_send_event_mcu2cp(uint8_t event);\n\nint cp_accel_send_event_cp2mcu(uint8_t event);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/cp_accel/cp_queue.c",
    "content": "\n/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/***\n * cqueue.c - c circle queue c file\n */\n\n#include \"cp_queue.h\"\n#include \"cmsis.h\"\n#include \"hal_uart.h\"\n#include \n#include \n\nint InitCpQueue(CQueue *Q, unsigned int size, CQItemType *buf) {\n  Q->size = size;\n  Q->base = buf;\n  Q->len = 0;\n  if (!Q->base)\n    return CQ_ERR;\n\n  Q->read = Q->write = 0;\n  return CQ_OK;\n}\n\nint IsEmptyCpQueue(CQueue *Q) {\n  if (Q->len == 0)\n    return CQ_OK;\n  else\n    return CQ_ERR;\n}\n\nint LengthOfCpQueue(CQueue *Q) { return Q->len; }\n\nint AvailableOfCpQueue(CQueue *Q) { return (Q->size - Q->len); }\n\nint EnCpQueue(CQueue *Q, CQItemType *e, unsigned int len) {\n  if (AvailableOfCQueue(Q) < len) {\n    return CQ_ERR;\n  }\n\n  Q->len += len;\n\n  uint32_t bytesToTheEnd = Q->size - Q->write;\n  if (bytesToTheEnd > len) {\n    memcpy((uint8_t *)&Q->base[Q->write], (uint8_t *)e, len);\n    Q->write += len;\n  } else {\n    memcpy((uint8_t *)&Q->base[Q->write], (uint8_t *)e, bytesToTheEnd);\n    memcpy((uint8_t *)&Q->base[0], (((uint8_t *)e) + bytesToTheEnd),\n           len - bytesToTheEnd);\n    Q->write = len - bytesToTheEnd;\n  }\n\n  return CQ_OK;\n}\n\nint DeCpQueue(CQueue *Q, CQItemType *e, unsigned int len) {\n  if (LengthOfCQueue(Q) < len)\n    return CQ_ERR;\n\n  Q->len -= len;\n\n  if (e != NULL) {\n\n    uint32_t bytesToTheEnd = Q->size - Q->read;\n    if (bytesToTheEnd > len) {\n      memcpy((uint8_t *)e, (uint8_t *)&Q->base[Q->read], len);\n      Q->read += len;\n    } else {\n      memcpy((uint8_t *)e, (uint8_t *)&Q->base[Q->read], bytesToTheEnd);\n      memcpy((((uint8_t *)e) + bytesToTheEnd), (uint8_t *)&Q->base[0],\n             len - bytesToTheEnd);\n      Q->read = len - bytesToTheEnd;\n    }\n  } else {\n    Q->read = (Q->read + len) % Q->size;\n  }\n\n  return CQ_OK;\n}\n\nint PeekCpQueue(CQueue *Q, unsigned int len_want, CQItemType **e1,\n                unsigned int *len1, CQItemType **e2, unsigned int *len2) {\n  if (LengthOfCQueue(Q) < len_want) {\n    return CQ_ERR;\n  }\n\n  *e1 = &(Q->base[Q->read]);\n  if ((Q->write > Q->read) || (Q->size - Q->read >= len_want)) {\n    *len1 = len_want;\n    *e2 = NULL;\n    *len2 = 0;\n    return CQ_OK;\n  } else {\n    *len1 = Q->size - Q->read;\n    *e2 = &(Q->base[0]);\n    *len2 = len_want - *len1;\n    return CQ_OK;\n  }\n\n  return CQ_ERR;\n}\n\nvoid ResetCpQueue(CQueue *Q) {\n  Q->len = 0;\n  Q->read = Q->write = 0;\n}"
  },
  {
    "path": "services/cp_accel/cp_queue.h",
    "content": "\n/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/***\n* cqueue.h - c circle queue c header\n*/\n\n#ifndef CP_QUEUE_H\n#define CP_QUEUE_H 1\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#include \"cqueue.h\"\n\n/* Init Queue */\nint InitCpQueue(CQueue *Q, unsigned int size, CQItemType *buf);\n/* Is Queue Empty */\nint IsEmptyCpQueue(CQueue *Q);\n/* Filled Length Of Queue */\nint LengthOfCpQueue(CQueue *Q);\n/* Empty Length Of Queue */\nint AvailableOfCpQueue(CQueue *Q);\n/* Push Data Into Queue (Tail) */\nint EnCpQueue(CQueue *Q, CQItemType *e, unsigned int len);\n/* Pop Data Data From Queue (Front) */\nint DeCpQueue(CQueue *Q, CQItemType *e, unsigned int len);\n/* Peek But Not Pop Data From Queue (Front) */\nint PeekCpQueue(CQueue *Q, unsigned int len_want, CQItemType **e1, unsigned int *len1, CQItemType **e2, unsigned int *len2);\n\nvoid ResetCpQueue(CQueue *Q);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* CP_QUEUE_H */\n"
  },
  {
    "path": "services/hw_dsp/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s \t:= $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c \t:= $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj_c \t+= $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.cpp))\n\nifeq ($(HW_FILTER_CODEC_IIR),1)\nifeq ($(ANC_APP),1)\n$(error \"error: ANC_APP and HW_FILTER_CODEC_IIR can't be used in the same\")\nendif\nifeq ($(HW_DAC_IIR_EQ_PROCESS),1)\n$(error \"error: HW_DAC_IIR_EQ_PROCESS and HW_FILTER_CODEC_IIR can't be used in the same\")\nendif\nendif\n\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n    -Iservices/hw_dsp/inc \\\n\t-Iservices/multimedia/audio/process/filters/include\n"
  },
  {
    "path": "services/hw_dsp/inc/hw_filter_codec_iir.h",
    "content": "#ifndef __HW_FILTER_CODEC_IIR_H__\n#define __HW_FILTER_CODEC_IIR_H__\n\n#include \n#include \"iir_process.h\"\n#include \"hw_codec_iir_process.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\ntypedef struct {\n    int32_t                 bypass;\n    HW_CODEC_IIR_TYPE_T     iir_device;\n#if 1\n    HW_CODEC_IIR_CFG_F      iir_cfg;\n#else\n    IIR_CFG_T               iir_cfg;\n#endif\n} hw_filter_codec_iir_cfg;\n\nstruct hw_filter_codec_iir_state_;\n\ntypedef struct hw_filter_codec_iir_state_ hw_filter_codec_iir_state;\n\n// Creat a instance from hw_filter_codec_iir module/class\n// Common value include: sample rate, frame size and so on. \nhw_filter_codec_iir_state *hw_filter_codec_iir_create(int32_t sample_rate, int32_t channel_num, int32_t bits, hw_filter_codec_iir_cfg *cfg);\n\n// Destory a hw_filter_codec_iir instance\nint32_t hw_filter_codec_iir_destroy(hw_filter_codec_iir_state *st);\n\n// Just use modify instance configure\nint32_t hw_filter_codec_iir_set_config(hw_filter_codec_iir_state *st, hw_filter_codec_iir_cfg *cfg);\n\n// Get/set some value or enable/disable some function\n// int32_t hw_filter_codec_iir_ctl(hw_filter_codec_iir_state *st, int32_t ctl, void *ptr);\n\n// Do not need process function, because hardware run separately\n\n// Debug hw_filter_codec_iir instance\nint32_t hw_filter_codec_iir_dump(hw_filter_codec_iir_state *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/hw_dsp/src/hw_filter_codec_iir.c",
    "content": "/*******************************************************************************\n** namer：\tspeech_eq\n** description:\tfir and iir eq manager\n** version：V0.9\n** author： Yunjie Huo\n** modify：\t2016.12.26\n** todo: \t1.\n*******************************************************************************/\n#include \"hw_filter_codec_iir.h\"\n#include \"hal_cmu.h\"\n#include \"hal_location.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hw_codec_iir_process.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n\n#ifndef CODEC_OUTPUT_DEV\n#define CODEC_OUTPUT_DEV CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV\n#endif\n\nstruct hw_filter_codec_iir_state_ {\n  // public\n  /* Basic info */\n  int32_t sample_rate;\n  // int32_t     frame_size;\n  int32_t channel_num;\n  int32_t bits;\n\n  /* configure info */\n  int32_t bypass;\n  int32_t need_value;\n  HW_CODEC_IIR_TYPE_T iir_device;\n\n  // private\n  /* Parameters */\n  int32_t iir_device_opened;\n\n  /* DSP-related arrays */\n\n  /* Misc */\n  // input and output buffer\n};\n\n// just support 1 st\nhw_filter_codec_iir_state iir_st;\n\nhw_filter_codec_iir_state *\nhw_filter_codec_iir_create(int32_t sample_rate, int32_t channel_num,\n                           int32_t bits, hw_filter_codec_iir_cfg *cfg) {\n  hw_filter_codec_iir_state *st = &iir_st;\n\n  TRACE(4, \"[%s] sample_rate = %d, channel_num = %d, bits = %d\", __func__,\n        sample_rate, channel_num, bits);\n\n  // Set parameters\n  st->sample_rate = sample_rate;\n  st->channel_num = channel_num;\n  st->bits = bits;\n\n  // Initialize internal variables\n  st->iir_device_opened = 0;\n\n  // Malloc dynamic memory\n\n  // Initialize dynamic memory\n\n  hw_filter_codec_iir_set_config(st, cfg);\n\n  return st;\n}\n\nint32_t hw_filter_codec_iir_destroy(hw_filter_codec_iir_state *st) {\n  if (st->iir_device_opened) {\n    hw_codec_iir_close(st->iir_device);\n  }\n\n  st->bypass = 0;\n  st->iir_device = HW_CODEC_IIR_NOTYPE;\n  st->iir_device_opened = 0;\n\n  return 0;\n}\n\nint32_t hw_filter_codec_iir_set_config(hw_filter_codec_iir_state *st,\n                                       hw_filter_codec_iir_cfg *cfg) {\n  st->bypass = cfg->bypass;\n  st->iir_device = cfg->iir_device;\n\n  TRACE(2, \"[%s] iir device = %d\", __func__, st->iir_device);\n\n  if (!st->iir_device_opened) {\n    hw_codec_iir_open((enum AUD_SAMPRATE_T)st->sample_rate, st->iir_device,\n                      CODEC_OUTPUT_DEV);\n  }\n\n#if 1\n  hw_codec_iir_set_coefs(&cfg->iir_cfg, st->iir_device);\n#else\n  HW_CODEC_IIR_CFG_T *hw_iir_cfg = NULL;\n\n  hw_iir_cfg =\n      hw_codec_iir_get_cfg((enum AUD_SAMPRATE_T)st->sample_rate, &cfg->iir_cfg);\n  ASSERT(hw_iir_cfg != NULL, \"[%s] codec IIR parameter error!\", __func__);\n  hal_codec_iir_dump(hw_iir_cfg);\n  hw_codec_iir_set_cfg(hw_iir_cfg, (enum AUD_SAMPRATE_T)st->sample_rate,\n                       st->iir_device);\n#endif\n\n  return 0;\n}\n\n// int32_t hw_filter_codec_iir_ctl(hw_filter_codec_iir_state *st, int32_t ctl,\n// void *ptr)\n// {\n//     switch(ctl)\n//     {\n//     case HW_FILTER_CODEC_IIR_SET_AAA:\n//         st->aaa = (*(int32_t*)ptr);\n//         break;\n\n//     case HW_FILTER_CODEC_IIR_GET_AAA:\n//         (*(int32_t*)ptr) = (int32_t)st->aaa;\n//         break;\n\n//     default:\n//         TRACE(2,\"[%s] ctl(%d) is not valid\", __func__, ctl);\n//         return -1;\n//     }\n\n//     return 0;\n// }\n\nint32_t hw_filter_codec_iir_dump(hw_filter_codec_iir_state *st) {\n  TRACE(1, \"[%s]: \", __func__);\n\n  // Add dump info\n\n  // End\n\n  return 0;\n}"
  },
  {
    "path": "services/ibrt_core/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\n\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.cpp))\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nIBRT_LIB_NAME := libtws_ibrt\n\nifeq ($(ENHANCED_STACK),1)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_enhanced_stack\nendif\n\nifeq ($(BLE), 1)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_ble\nendif\n\nifeq ($(ANC_APP), 1)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_anc\nendif\n\nifeq ($(KERNEL),RTX)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_RTX\nendif\nifeq ($(KERNEL),RTX5)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_RTX5\nendif\n\n$(IBRT_LIB_NAME)-y := $(src_obj)\n\nobj-y :=  $(IBRT_LIB_NAME).a\n\nsubdir-ccflags-y += \\\n    -Iservices/fs/fat \\\n    -Iservices/fs/sd \\\n    -Iservices/fs/fat/ChaN \\\n    -Iservices/overlay \\\n    -Iservices/nvrecord \\\n    -Iservices/resources \\\n    -Iservices/multimedia/audio/process/resample/include \\\n    $(BT_IF_INCLUDES) \\\n    -Iplatform/drivers/uarthci \\\n    -Iplatform/drivers/ana \\\n    -Iplatform/drivers/bt \\\n    -Iutils/cqueue \\\n    -Iutils/heap \\\n    -Iservices/audioflinger \\\n    -Iutils/lockcqueue \\\n    -Iutils/intersyshci \\\n    -Iapps/key \\\n    -Iapps/main \\\n    -Iapps/battery \\\n    -Iapps/common \\\n    -Iapps/audioplayers \\\n    -Iapps/audioplayers/a2dp_decoder \\\n    -Iapps/factory \\\n    -Iservices/ai_voice/manager \\\n    -Iservices/ble_stack/ble_ip \\\n    -Iservices/ble_stack/common/api \\\n    -Iservices/ble_stack/hl/api \\\n    -Iservices/ble_stack/hl/inc \\\n    -Iservices/ble_stack/ke/api \\\n    -Iservices/ble_app \\\n    -Iservices/ble_app/app_datapath \\\n    -Iservices/ble_app/app_tws \\\n    -Iservices/ble_app/app_main \\\n    $(BT_PROFILES_INCLUDES) \\\n    -Iservices/osif \\\n    -Iservices/nv_section/factory_section \\\n    -Iservices/nv_section/log_section \\\n    -Iservices/app_ibrt/inc \\\n    -Iservices/bt_app/a2dp_codecs/include \\\n    -Ithirdparty/audio_codec_lib/liblhdc-dec/inc \\\n    -Iservices/multimedia/audio/codec/sbc/inc \\\n    -Iservices/multimedia/audio/codec/sbc/src/inc \\\n    -Iutils/hwtimer_list \\\n    -Iservices/voicepath \\\n    -Iservices/app_tws/inc \\\n    -Iservices/app_ai/inc \\\n    -Iservices/ai_voice/protocol/gma/gma_crypto \\\n    -Iapps/anc/inc \n\nifeq ($(IBRT),1)\nsubdir-ccflags-y += \\\n    -Iservices/ibrt_core/inc \\\n    -Iservices/ibrt_ui/inc \\\n    -Iservices/bt_app\nendif\n\nCFLAGS_app_tws_ibrt.o += -DBESLIB_INFO=$(BESLIB_INFO)\n\n"
  },
  {
    "path": "services/ibrt_core/inc/app_ibrt_bt_profile_sync.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_IBRT_BT_PROFILE_SYNC__\n#define __APP_IBRT_BT_PROFILE_SYNC__\n\n#include \"stdint.h\"\n\n\n#define LM_SP_P192_PRE_COMP_POINTS  4\n#define DEV_CLASS_LEN       3\n#define FEATURE_PAGE_MAX   3\n#define KEY_LEN             0x10\n#define SRES_LEN            0x04\n#define ACO_LEN             12\n#define PIN_CODE_MAX_LEN    0x10\n#define CHNL_MAP_LEN        0x0A\n#define BD_NAME_SIZE        0xF8 // Was 0x20 for BLE HL\n#define FEATS_LEN           0x08\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nuint8_t app_ibrt_pack_bt_profile_data(uint8_t* buf, uint16_t* len, uint16_t conhdl);\nuint8_t app_ibrt_unpack_bt_profile_data(uint8_t* buf, uint16_t len);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_besaud.h",
    "content": "#ifndef __APP_TWS_BESAUD_H__\n#define __APP_TWS_BESAUD_H__\n\n#include \"bluetooth.h\"\n#include \"besaud_api.h\"\n\n#define TWS_BESAUD_EVENT_CONTROL_CONNECTED            (BTIF_BESAUD_EVENT_CONTROL_CONNECTED)\n\n#define TWS_BESAUD_EVENT_CONTROL_DISCONNECTED         (BTIF_BESAUD_EVENT_CONTROL_DISCONNECTED)\n\n#define TWS_BESAUD_EVENT_CONTROL_DATA_IND             (BTIF_BESAUD_EVENT_CONTROL_DATA_IND)\n\n#define TWS_BESAUD_EVENT_CONTROL_DATA_SENT            (BTIF_BESAUD_EVENT_CONTROL_DATA_SENT)\n\n#define TWS_BESAUD_EVENT_CONTROL_SET_IDLE             (BTIF_BESAUD_EVENT_CONTROL_SET_IDLE)\n\ntypedef btif_besaud_event tws_besaud_event;\n\ntypedef btif_besaud_status_change_callback tws_besaud_status_change_callback;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nuint8_t tws_besaud_is_connected(void);\nuint8_t tws_besaud_is_cmd_sending(void);\nvoid tws_besaud_client_create(btif_remote_device_t *dev);\nvoid tws_besaud_server_create(tws_besaud_status_change_callback callback);\nvoid tws_besaud_init(void);\nvoid tws_besaud_send_cmd(uint8_t* cmd, uint16_t len);\nbt_status_t tws_besaud_send_cmd_no_wait(uint8_t* cmd, uint16_t len);\nvoid tws_besaud_status_changed(tws_besaud_event event);\n\nvoid tws_besaud_create_extra_channel(bt_bdaddr_t *remote);\nvoid tws_besaud_extra_channel_send_data(const void* data, uint32_t len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ctrl_thread.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_CTRL_THREAD__\n#define __APP_TWS_CTRL_THREAD__\n\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n#include \"app_ibrt_custom_cmd.h\"\n\n#if (defined IBRT_OTA || defined __GMA_OTA_TWS__ || defined OTA_ENABLED) || defined __DUAL_MIC_RECORDING__\n#define APP_TWS_CTRL_BUFFER_MAX_LEN 672\n#else\n#if (defined TILE_DATAPATH && defined GFPS_ENABLED)\n#define APP_TWS_CTRL_BUFFER_MAX_LEN 512\n#else\n#define APP_TWS_CTRL_BUFFER_MAX_LEN 300  //no more buf for 1400\n#endif\n#endif\ntypedef void (*app_tws_cmd_send_function_t)(uint8_t*, uint16_t);\n\ntypedef struct\n{\n    uint32_t                        cmdcode;\n    app_tws_cmd_send_function_t     tws_cmd_send;\n} __attribute__((packed)) app_tws_cmd_send_t;\n\ntypedef enum\n{\n    PARA_NONE,\n    PARA_CODEC_TYPE,\n    PARA_PLAY_BACK,\n    PARA_BUFFER,\n    PARA_SYNC_TRIGGER,\n} mail_para_type_e;\n\ntypedef struct\n{\n    uint8_t *cmd_buffer;\n    uint16_t cmd_len;\n} cmd_buffer_t;\n\ntypedef struct\n{\n    uint32_t evt;\n    uint32_t arg;\n    uint32_t arg1;\n    uint32_t system_time;\n    cmd_buffer_t cmd_buff;\n} TWS_MSG_BLOCK;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nvoid tws_ctrl_thread_init(void);\nvoid *tws_ctrl_mailbox_heap_malloc(uint32_t size);\nvoid tws_ctrl_mailbox_heap_free(void *rmem);\nint tws_ctrl_send_cmd(uint32_t cmd_code, uint8_t *p_buff, uint16_t length);\nint tws_ctrl_send_rsp(uint16_t rsp_code, uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nint tws_ctrl_send_cmd_high_priority(uint32_t cmd_code, uint8_t *p_buff, uint16_t length);\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT__\n#define __APP_TWS_IBRT__\n#include \"app_tws_profile_sync.h\"\n#include \"a2dp_api.h\"\n#include \"cmsis_os.h\"\n#include \"rfcomm_api.h\"\n#include \"spp_api.h\"\n#include \"hfp_api.h\"\n#include \"bt_drv_reg_op.h\"\n\n#define ACCESS_MODE_ARRAY_MAX           10\n#define APP_IBRT_RECONNECT_TIMEOUT_MS   5\n\n#define LETOHOST16(ptr)  (uint16_t)( ((uint16_t) *((uint8_t*)(ptr)+1) << 8) | \\\n                                ((uint16_t) *((uint8_t*)(ptr))) )\n\n#define LETOHOST32(ptr)  (uint32_t)( ((uint32_t) *((uint8_t*)(ptr)+3) << 24) | \\\n                                ((uint32_t) *((uint8_t*)(ptr)+2) << 16) | \\\n                                ((uint32_t) *((uint8_t*)(ptr)+1) << 8)  | \\\n                                ((uint32_t) *((uint8_t*)(ptr))) )\n\n\n#define UINT16LOW(num)   ((uint8_t)(num & 0xFF))\n#define UINT16HIGH(num)  ((uint8_t)((num >> 8) & 0xFF))\n\n#define APP_IBRT_SUPV_TO (0x640)\n\n#define NV_RAM_RECORD_NUM   (10)\n\n#define INVALID_ERROR   0xFF\n#define INVALID_HANDLE  0xFFFF\n#define BD_ADDR_LEN     6\n\n#define IBRT_DISABLE         0\n#define IBRT_ENABLE          1\n#define IBRT_SWITCH          2\n\n#define IBRT_NONE_ROLE       0\n#define IBRT_SNIFFER_ROLE    1\n#define IBRT_FORWARD_ROLE    2\n\n#define IBRT_TWS_SNIFF_MAX_INTERVAL (254)\n#define IBRT_TWS_SNIFF_MIN_INTERVAL (254)\n\n#define IBRT_TWS_LINK_LARGE_DURATION           (12)\n#define IBRT_TWS_LINK_DEFAULT_DURATION         (8)\n\n#define IBRT_TWS_PRIVATE_TWS_ENABLE            (1)\n#define IBRT_TWS_PRIVATE_TWS_DURATION          (2)\n#define IBRT_TWS_PRIVATE_TWS_INTERVAL          (4)\n\n#define IBRT_ENCRYPT_DISABLE 0x00\n#define IBRT_ENCRYPT_ENABLE  0x01\n#define IBRT_ENCRYPT_REFRESH 0x02\n\n#define  IBRT_TWS_BT_TPOLL_DEFAULT             (80)\n\ntypedef uint8_t ibrt_link_mode_e;\n#define IBRT_ACTIVE_MODE     0x00\n#define IBRT_HOLD_MODE       0x01\n#define IBRT_SNIFF_MODE      0x02\n#define IBRT_PARK_MODE       0x03\n#define IBRT_SCATTER_MODE    0x04\n\ntypedef enum\n{\n    NO_LINK_TYPE,\n    SNOOP_LINK,\n    MOBILE_LINK,\n    TWS_LINK,\n} ibrt_link_type_e;\n\ntypedef uint8_t ibrt_role_e;\n#define   IBRT_MASTER       0\n#define   IBRT_SLAVE        1\n#define   IBRT_UNKNOW       0xff\n\n/*\n * tx data protect in tws switch\n */\n#ifndef __TWS_SWITCH_TX_DATA_PROTECT__\n#define __TWS_SWITCH_TX_DATA_PROTECT__\n#endif\n\ntypedef uint8_t tss_state_e;\n#define  TSS_IDLE_STATE          (0x00)\n#define  TSS_CRITICAL_WAIT_STATE (0x01)\n\n#define  TSS_TX_WAIT_STATE       (0x02)\n#define  TSS_TIMER_WAIT_STATE    (0x04)\n#define  TSS_CMD_STATE           (0x08)\n#define  TSS_SLAVE_WAIT_STATE    (0x10)\n\n\n/*\n * wait some high priority criticals to be finished\n * such as sending accept response of avdtp start/suspend cmd\n * then launch tws switch\n */\n#define  TSS_DELAY_CRITICAL_TIMEOUT_MS  50\n\n/*\n * wait profile layer tx data to hci txbuf list\n * wait controller tx data to air\n */\n#define  TSS_DELAY_HCI_CMD_TIMEOUT_MS  20\n\n\n\n// hci tx buf type mapping\n#define IBRT_HBT_TX_ACL     0x05  //#define HBT_TX_ACL   0x05\n#define IBRT_HBT_TX_BLE     0x08  //#define HBT_TX_BLE   0x08\n\n#define    CODING_FORMAT_CVSD          0x02\n#define    CODING_FORMAT_TRANSP        0x03\n\ntypedef struct\n{\n    uint8_t  codec_type;\n    uint8_t  sample_bit;\n    uint8_t  sample_rate;\n    uint8_t  vendor_para;\n} __attribute__((packed)) ibrt_codec_t;\n\ntypedef struct\n{\n    uint8_t  backup_index;\n    uint8_t  pickup_index;\n    uint8_t  array_counter;\n    btif_accessible_mode_t access_mode_array[ACCESS_MODE_ARRAY_MAX];\n} access_mode_backup_t;\n\ntypedef enum {\n    AUDIO_CHANNEL_SELECT_STEREO,\n    AUDIO_CHANNEL_SELECT_LRMERGE,\n    AUDIO_CHANNEL_SELECT_LCHNL,\n    AUDIO_CHANNEL_SELECT_RCHNL,\n} AUDIO_CHANNEL_SELECT_E;\n\ntypedef enum {\n    IBRT_ROLE_SWITCH_USER_AI = 0,\n    IBRT_ROLE_SWITCH_USER_OTA,\n    IBRT_ROLE_SWITCH_USER_COUNT\n}IBRT_ROLE_SWITCH_USER_E;\n\ntypedef struct\n{\n    bool lowlayer_monitor_enable;\n\n    uint16_t long_private_poll_interval ;\n    uint16_t default_private_poll_interval;\n    uint16_t short_private_poll_interval;\n\n    uint16_t default_private_poll_interval_in_sco;\n    uint16_t short_private_poll_interval_in_sco;\n    uint16_t default_bt_tpoll;\n\n    bool     tws_switch_tx_data_protect;\n    uint32_t tws_cmd_send_timeout;\n    uint32_t tws_cmd_send_counter_threshold;\n    uint32_t tws_switch_stable_timeout;\n\n    uint16_t mobile_page_timeout;\n    uint16_t tws_connection_timeout;\n\n    bool delay_exit_sniff;\n    uint32_t delay_ms_exit_sniff;\n    uint8_t audio_sync_mismatch_resume_version;\n} ibrt_core_config_t;\n\ntypedef struct\n{\n    int32_t mobile_diff_us;\n    int32_t tws_diff_us;\n}diff_us_t;\ntypedef struct\n{\n    ibrt_role_e init_done;\n    ibrt_role_e nv_role;\n    ibrt_role_e current_role;\n    uint8_t role_switch_debonce_time;\n    rssi_t raw_rssi;\n    rssi_t peer_raw_rssi;\n    int32_t mobile_diff_us;\n    int32_t tws_diff_us;\n    int8_t  cur_buf_size;\n    uint16_t local_battery_volt;\n    uint16_t peer_battery_volt;\n    bt_bdaddr_t local_addr;\n    bt_bdaddr_t peer_addr;\n    bt_bdaddr_t mobile_addr;\n    uint8_t mobile_linkKey[16];\n    uint16_t ibrt_conhandle;\n    uint8_t  ibrt_disc_reason;\n    uint16_t tws_conhandle;\n    uint16_t peer_tws_conhandle;\n    uint16_t mobile_conhandle;//if local dev is connected with mobile\n    uint16_t peer_mobile_conhandle;\n    uint32_t mobile_constate;\n    uint32_t tws_constate;\n    uint32_t ibrt_constate;\n    uint32_t ibrt_ai_role_switch_handle;    //one bit represent a AI\n    uint32_t ibrt_role_switch_handle_user;  //one bit represent a user\n    osMailQId tws_mailbox;\n    ibrt_codec_t a2dp_codec;\n    uint32_t     audio_chnl_sel;\n    void *p_mobile_a2dp_profile;\n    void *p_mobile_hfp_profile;\n    void *p_mobile_avrcp_profile;\n    void *p_mobile_map_profile;\n    void *p_mobile_reseved0_profile;\n    void *p_mobile_reseved1_profile;\n    btif_remote_device_t *p_tws_remote_dev;\n    btif_remote_device_t *p_mobile_remote_dev;\n    btif_accessible_mode_t access_mode;\n    bool access_mode_sending;\n    bool is_ibrt_search_ui;\n    uint8_t tws_switch_local_done: 1;\n    uint8_t tws_switch_peer_done: 1;\n    uint8_t master_tws_switch_pending: 1;\n    uint8_t slave_tws_switch_pending: 1;\n    uint8_t avrcp_register_notify_event;\n    uint8_t avrcp_wait_register_notify_rsp;\n    osTimerId wait_profile_ready_timer_id;\n    osTimerId delay_profile_send_timer_id;\n    osTimerId delay_hci_tss_cmd_timer_id;\n    bool wait_profile;\n    uint8_t rx_profile_update;\n    uint8_t tx_profile_update;\n    ibrt_link_mode_e tws_mode;\n    ibrt_link_mode_e mobile_mode;\n    access_mode_backup_t access_mode_backup;\n\n    uint8_t ibrt_sco_activate;\n    hfp_sco_codec_t ibrt_sco_codec;\n    uint16_t ibrt_sco_hcihandle;\n    uint8_t ibrt_sco_lmphdl;\n    bool ibrt_in_poweroff;\n    bool w4_ibrt_connected;\n    bool mobile_encryp_done;\n    uint32_t rx_seq_error;\n    uint32_t tws_cmd_send_time;\n    bool w4_stop_ibrt_for_rx_seq_error;\n    bool dbg_state_timer_ongoing;\n    bool stop_ibrt_timer_ongoing;\n    bool ibrt_stopped_due_to_checker;\n    bool phone_connect_happened;\n    bool wait4_reset_complete;\n    uint8_t reset_error_type;\n    tss_state_e tss_state;\n    bool mobile_pair_canceled;\n    uint16_t sync_id_mask;\n    uint8_t snoop_connected;\n    bool w4_tws_exit_sniff;\n    ibrt_core_config_t config;\n    uint32_t  basic_profiles;\n} ibrt_ctrl_t;\n\ntypedef struct\n{\n    ibrt_role_e nv_role;\n    bt_bdaddr_t local_addr;\n    bt_bdaddr_t peer_addr;\n    bt_bdaddr_t mobile_addr;\n    uint32_t    audio_chnl_sel;\n} ibrt_config_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_tws_ibrt_init(void);\nvoid app_tws_ibrt_start(ibrt_config_t *config, bool is_search_ui);\nvoid app_tws_ibrt_global_callback(const btif_event_t *event);\nibrt_link_type_e app_tws_ibrt_get_remote_link_type(btif_remote_device_t *remote_dev);\nvoid app_tws_ibrt_set_a2dp_codec(const a2dp_callback_parms_t *info);\nvoid app_tws_ibrt_profile_callback(uint32_t profile,void *param1,void *param2);\nvoid app_tws_ibrt_spp_callback(void* spp_devi, void* spp_para);\nstruct BT_DEVICE_T* app_tws_ibrt_get_bt_device_ctx(void);\nibrt_ctrl_t* app_tws_ibrt_get_bt_ctrl_ctx(void);\nbool app_tws_ibrt_mobile_link_connected(void);\nbool app_tws_ibrt_tws_link_connected(void);\nbt_status_t app_tws_ibrt_create_tws_connection(uint16_t page_timeout);\nbt_status_t app_tws_ibrt_create_mobile_connection(uint16_t mobile_page_timeout,const bt_bdaddr_t *mobile_addr);\nvoid app_tws_ibrt_proctect_bt_tx_type(uint16_t length);\nbt_status_t app_tws_ibrt_disconnect_connection(btif_remote_device_t *remdev);\nvoid app_tws_ibrt_clear_mobile_reconnecting(void);\nvoid app_tws_ibrt_clear_tws_reconnecting(void);\nvoid app_tws_ibrt_set_tws_reconnecting(void);\nbool app_tws_ibrt_is_reconnecting_tws(void);\nvoid app_bt_ibrt_reconnect_mobile_profile(bt_bdaddr_t mobile_addr);\nvoid app_tws_ibrt_reset_bdaddr_to_nv_original(void);\nvoid app_tws_ibrt_set_bdaddr_to_nv_master(void);\nbt_status_t app_tws_ibrt_init_access_mode(btif_accessible_mode_t mode);\nbt_status_t app_tws_ibrt_set_access_mode(btif_accessible_mode_t mode);\nbt_status_t app_tws_ibrt_do_mss_with_mobile(void);\nbt_status_t app_tws_ibrt_do_mss_with_tws(void);\nbt_status_t app_tws_ibrt_exit_sniff_with_mobile(void);\nbt_status_t app_tws_ibrt_exit_sniff_with_tws(void);\nbtif_connection_role_t app_tws_ibrt_get_local_tws_role(void);\nbtif_connection_role_t app_tws_ibrt_get_local_mobile_role(void);\nvoid app_tws_ibrt_delay_slave_create_connection(void const *para);\nvoid app_tws_ibrt_store_mobile_link_key(uint8_t *p_link_key);\nibrt_link_type_e app_tws_ibrt_get_link_type_by_addr(bt_bdaddr_t *p_addr);\nbool app_tws_ibrt_slave_ibrt_link_connected(void);\nvoid app_tws_ibrt_disconnect_callback(const btif_event_t * event);\nvoid app_tws_ibrt_timing_control(bool enable, uint8_t type, uint16_t acl_interv_acl, uint16_t acl_interv_sco);\nvoid app_tws_ibrt_sniff_timeout_handler(evm_timer_t *timer, unsigned int *skipInternalHandler);\nvoid app_tws_ibrt_sniff_callback(const btif_event_t *event);\nvoid app_tws_ibrt_use_the_same_bd_addr(void);\nbtif_accessible_mode_t app_tws_ibrt_access_mode_pickup(void);\nvoid app_tws_ibrt_access_mode_backup(btif_accessible_mode_t mode);\nvoid app_tws_ibrt_sdp_disconnect_callback(const void *para);\nuint8_t app_tws_ibrt_role_get_callback(const void *para);\nconst char* app_tws_ibrt_role2str(uint8_t role);\nbool app_tws_ibrt_key_already_exist(void *bdaddr);\nbool btdrv_get_page_pscan_coex_enable(void);\nvoid app_tws_ibrt_conn_req_pre_treatment_callback(const void *bd_addr);\nvoid app_tws_ibrt_set_tws_pravite_interval(uint16_t tws_conhandle, uint16_t interval);\nint app_ibrt_release_cmd_semphore(void);\nint app_ibrt_clear_cmd_semphore(void);\nvoid app_tws_ibrt_disconnect_mobile(void);\nvoid app_tws_ibrt_disconnect_all_connection(void);\nbool app_tws_ibrt_get_phone_connect_happened(void);\nvoid app_tws_ibrt_clear_phone_connect_happened(void);\nvoid app_tws_ibrt_set_phone_connect_happened(void);\nvoid app_tws_ibrt_hci_tx_buf_tss_process(void);\nvoid app_tws_ibrt_delay_hci_tss_cmd_timer_cb(void const *para);\nvoid app_tws_ibrt_switch_role(void);\nvoid app_tws_ibrt_set_tss_state(tss_state_e state);\ntss_state_e app_tws_ibrt_get_tss_state(void);\nvoid app_tws_ibrt_reset_tss_state(void);\nvoid app_tws_ibrt_set_controller_rx_flow_stop(void);\nvoid app_tws_ibrt_clear_controller_rx_flow_stop(void);\nuint8_t app_tws_ibrt_get_audio_voice_active_state(void);\nuint8_t app_tws_ibrt_get_tss_state_callback(const void *para);\n\nbool app_tws_ibrt_sync_airmode_check_ind_handler(uint8_t voice_setting);\nvoid app_tws_ibrt_register_esco_auto_accept(void);\nbtif_remote_device_t *app_tws_get_mobile_rem_dev(void);\nuint32_t app_tws_get_mobile_conn_state(void);\nuint32_t app_tws_get_tws_conn_state(void);\nuint16_t app_tws_get_tws_conhdl(void);\nbool app_tws_ibrt_sync_airmode_check_ind_handler(uint8_t voice_setting);\nuint8_t app_tws_ibrt_nv_role_get_callback(const void *para);\nvoid app_tws_ibrt_update_basic_profiles(uint32_t profile_id,bool is_add);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_audio_analysis.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_AUDIO_ANALYSIS_H__\n#define __APP_TWS_IBRT_AUDIO_ANALYSIS_H__\n\n#define AUDIO_ANALYSIS_INTERVAL (25)\n#define AUDIO_ANALYSIS_CHECKER_INTERVEL_INVALID (1000)\n\ntypedef struct {    \n    uint32_t timestamp;\n    uint16_t sequenceNumber;\n    uint16_t curSubSequenceNumber;\n    uint16_t totalSubSequenceNumber;\n    uint16_t frame_samples;\n    uint32_t decoded_frames;    \n    uint8_t undecode_frames;\n    uint8_t undecode_min_frames;\n    uint8_t undecode_max_frames;    \n    uint8_t average_frames;\n    uint32_t sample_rate;\n#if A2DP_DECODER_CHECKER\n    uint32_t check_sum;\n#endif\n} APP_TWS_IBRT_AUDIO_ANALYSIS_PLAYBACK_INFO_T;\n\ntypedef struct {\n    APP_TWS_IBRT_AUDIO_ANALYSIS_PLAYBACK_INFO_T playback_info;\n    uint16_t mobile_cnt;\n    uint16_t bt_cnt;\n    uint32_t bt_clk;\n    uint32_t mobile_clk;\n    uint32_t handler_cnt;\n    int8_t  compensate_cnt;    \n    bool updated;\n} APP_TWS_IBRT_AUDIO_ANALYSIS_INFO_T;\n\ntypedef struct {\n    uint32_t tws_diff_clk;\n    uint16_t tws_diff_bit;\n    int32_t tws_diff_us;\n    uint32_t mobile_diff_clk;\n    uint16_t mobile_diff_cnt;\n    int32_t mobile_diff_us;\n} APP_TWS_IBRT_AUDIO_ANALYSIS_RESULT_T;\n\ntypedef enum {\n    AUDIO_ANALYSIS_STATUS_STOP,\n    AUDIO_ANALYSIS_STATUS_SUSPEND,\n    AUDIO_ANALYSIS_STATUS_START,\n    AUDIO_ANALYSIS_STATUS_DATA_VALID\n}AUDIO_ANALYSIS_STATUS_E;\n\nvoid  app_tws_ibrt_audio_mobile_clkcnt_get(uint32_t btclk, uint16_t btcnt,\n                                                     uint32_t *mobile_master_clk, uint16_t *mobile_master_cnt);\nAPP_TWS_IBRT_AUDIO_ANALYSIS_RESULT_T *app_tws_ibrt_audio_analysis_result_get(void);\nAPP_TWS_IBRT_AUDIO_ANALYSIS_INFO_T *app_tws_ibrt_audio_analysis_local_info_get(void);\nAPP_TWS_IBRT_AUDIO_ANALYSIS_INFO_T *app_tws_ibrt_audio_analysis_remote_info_get(void);\nint app_tws_ibrt_audio_analysis_status_get(void);\nint app_tws_ibrt_audio_analysis_init(void);\nint app_tws_ibrt_audio_analysis_start(uint32_t start_offset, uint32_t checker_intervel);\nint app_tws_ibrt_audio_analysis_stop(void);\nint app_tws_ibrt_audio_analysis_suspend(void);\nint app_tws_ibrt_audio_analysis_resume(void);\nint app_tws_ibrt_audio_analysis_skipnext(void);\nuint32_t app_tws_ibrt_audio_analysis_interval_get(void);\nint app_tws_ibrt_audio_analysis_interval_set(uint32_t analysis_interval);\nuint32_t app_tws_ibrt_audio_analysis_tick_get(void);\nint app_tws_ibrt_audio_analysis(APP_TWS_IBRT_AUDIO_ANALYSIS_INFO_T *local_info ,\n                                APP_TWS_IBRT_AUDIO_ANALYSIS_INFO_T *remote_info);\nvoid app_tws_ibrt_audio_analysis_interrupt_tick(void);\nvoid app_tws_ibrt_audio_analysis_audiohandler_tick(void);\n\n\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_audio_sync.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_AUDIO_SYNC_H__\n#define __APP_TWS_IBRT_AUDIO_SYNC_H__\n\n#define TWS_IBRT_AUDIO_SYNC_FACTOR_REFERENCE (1.0f - 80*1e-6)\n//#define TWS_IBRT_AUDIO_SYNC_FACTOR_REFERENCE     (1.0f)\n#define TWS_IBRT_AUDIO_SYNC_FACTOR_FAST_LIMIT    ( 0.0005f)\n#define TWS_IBRT_AUDIO_SYNC_FACTOR_SLOW_LIMIT    (-0.0005f)\n\n#define TWS_IBRT_AUDIO_SYNC_DEAD_ZONE_US     (5)\n\n#define APP_TWS_IBRT_AUDIO_SYNC_MISMATCH_FLAG_NULL          (0)\n#define APP_TWS_IBRT_AUDIO_SYNC_MISMATCH_FLAG_NEEDRETRIGGER (1<<1)\n\n#define APP_TWS_IBRT_AUDIO_SYNC_SAMPLEING_FLAG_NULL     (0)\n#define APP_TWS_IBRT_AUDIO_SYNC_SAMPLEING_FLAG_DETECTER (1<<1)\n\n#ifdef __A2DP_AUDIO_SYNC_FIX_DIFF_NOPID__\n#define APP_TWS_IBRT_AUDIO_SYNC_TUNE_SKIP_NEXT_CNT      (50)\n#else\n#define APP_TWS_IBRT_AUDIO_SYNC_TUNE_SKIP_NEXT_CNT      (200)\n#endif\n\ntypedef enum {\n    APP_TWS_IBRT_AUDIO_TRIGGER_TYPE_INIT_SYNC,\n    APP_TWS_IBRT_AUDIO_TRIGGER_TYPE_RESUME,\n    APP_TWS_IBRT_AUDIO_TRIGGER_TYPE_LOCAL,\n}APP_TWS_IBRT_AUDIO_TRIGGER_TYPE;\n\ntypedef struct {    \n    uint32_t timestamp;\n    uint16_t sequenceNumber;\n    uint8_t curSubSequenceNumber;\n    uint8_t totalSubSequenceNumber;\n    uint32_t frame_samples;\n} APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_PLAYBACK_INFO_T;\n\ntypedef struct\n{\n    uint32_t trigger_time;\n    uint8_t trigger_skip_frame;\n    APP_TWS_IBRT_AUDIO_TRIGGER_TYPE trigger_type;\n    APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_PLAYBACK_INFO_T audio_info;\n    uint16_t sequenceNumberStart;\n    float factor_reference;\n    uint8_t a2dp_session;\n    uint32_t handler_cnt;\n    uint32_t trigger_bt_clk;\n    uint16_t trigger_bt_cnt;\n#ifdef __SW_TRIG__\n    uint16_t tg_bitcnt;\n#endif\n}APP_TWS_IBRT_AUDIO_SYNC_TRIGGER_T;\n\ntypedef struct\n{\n    uint32_t reseved;\n}APP_TWS_IBRT_AUDIO_NEED_RETRIGGER_T;\n\ntypedef struct\n{\n    float factor_reference;\n    uint32_t handler_cnt;\n}APP_TWS_IBRT_AUDIO_SYNC_TUNE_T;\n\ntypedef struct\n{\n    APP_TWS_IBRT_AUDIO_SYNC_TUNE_T sync_tune;\n    uint32_t new_reference_flag;\n}APP_TWS_IBRT_AUDIO_SYNC_TUNE_REQ_T;\n\ntypedef enum{\n    APP_TWS_IBRT_AUDIO_SYNC_MISMATCH_RESUME_REQ_DISABLE,\n    APP_TWS_IBRT_AUDIO_SYNC_MISMATCH_RESUME_REQ_NULL,\n    APP_TWS_IBRT_AUDIO_SYNC_MISMATCH_RESUME_REQ_REQUEST,\n    APP_TWS_IBRT_AUDIO_SYNC_MISMATCH_RESUME_REQ_WAITRESUME,\n}APP_TWS_IBRT_AUDIO_SYNC_MISMATCH_RESUME_REQ;\n\ntypedef struct{\n    float factor_reference;\n    float factor_fast_limit;\n    float factor_slow_limit;\n    uint32_t dead_zone_us;  \n}APP_TWS_IBRT_AUDIO_SYNC_CFG_T;\n\nfloat app_tws_ibrt_audio_sync_config_factor_reference_get(void);\n\nint app_tws_ibrt_audio_sync_sampleing_set_flag(uint32_t flag);\n\nint app_tws_ibrt_audio_sync_sampleing_get_flag(uint32_t *flag);\n\nint app_tws_ibrt_audio_sync_new_reference(float factor_reference);\n\nint app_tws_ibrt_audio_sync_reconfig(APP_TWS_IBRT_AUDIO_SYNC_CFG_T *config);\n\nbool app_tws_ibrt_audio_sync_playback_info_initdone(void);\n\nint app_tws_ibrt_audio_sync_init(void);\n\nint app_tws_ibrt_audio_sync_start(void);\n\nint app_tws_ibrt_audio_sync_restart(void);\n\nint app_tws_ibrt_audio_sync_stop(void);\n\nint app_tws_ibrt_audio_sync_tick(uint32_t tick);\n\nbool app_tws_ibrt_audio_sync_sampleing(float sample);\n\nint app_tws_ibrt_audio_sync_mismatch_tick(bool mismatch);\n\nint app_tws_ibrt_audio_sync_mismatch_resume_handle(uint32_t tick);\n\nint app_tws_ibrt_audio_sync_mismatch_resume_notify(void);\n\nint app_tws_ibrt_audio_sync_tune_request(APP_TWS_IBRT_AUDIO_SYNC_TUNE_REQ_T *sync_tune);\n\nbool app_tws_ibrt_audio_sync_tune_onprocess(void);\n\nint app_tws_ibrt_audio_sync_tune_handle(uint32_t tick);\n\nint app_tws_ibrt_audio_sync_tune_cancel(void);\n\nint app_tws_ibrt_audio_sync_tune_skip_next_cnt_proc(void);\n\nint app_tws_ibrt_audio_sync_tune_need_skip(void);\n\nvoid app_tws_ibrt_audio_sync_tune_skip_next_cnt(int32_t bypass_next_cnt);\n\nAPP_TWS_IBRT_AUDIO_SYNC_CFG_T *app_tws_ibrt_audio_sync_config_default_get(void);\n\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_cmd_audio_analysis.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_CMD_AUDIO_ANALYSIS_H__\n#define __APP_TWS_IBRT_CMD_AUDIO_ANALYSIS_H__\n\nvoid app_ibrt_cmd_send_playback_info(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_cmd_send_playback_info_handler(uint16_t rsp_seq, uint8_t *ptrParam, uint16_t paramLen);\nvoid app_tws_ibrt_audio_analysis_send_info_done(uint16_t cmdcode, uint16_t rsp_seq, uint8_t *ptrParam, uint16_t paramLen);\n\nvoid app_ibrt_cmd_set_trigger(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_cmd_set_trigger_handler(uint16_t rsp_seq, uint8_t *ptrParam, uint16_t paramLen);\n\nvoid app_ibrt_cmd_need_retrigger(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_cmd_need_retrigger_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nvoid app_ibrt_cmd_audio_sync_tune(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_cmd_audio_sync_tune_handler(uint16_t rsp_seq, uint8_t *ptrParam, uint16_t paramLen);\n\nvoid app_ibrt_cmd_audio_sync_set_latencyfactor(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_cmd_audio_sync_set_latencyfactor_handler(uint16_t rsp_seq, uint8_t *ptrParam, uint16_t paramLen);\n\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_cmd_handler.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_CMD_HANDLER__\n#define __APP_TWS_IBRT_CMD_HANDLER__\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_ibrt_cmd_audio_analysis.h\"\n#include \"app_tws_ibrt_cmd_sync_hfp_status.h\"\n#include \"app_tws_ibrt_cmd_sync_a2dp_status.h\"\n#include \"app_ibrt_voice_report.h\"\n#include \"app_ibrt_keyboard.h\"\n\n#define IBRT_PROFILE_ARRAY_SIZE                 (12)\n#define IBRT_WAIT_PROFILE_TIMEOUT               (10000)\n#define IBRT_NEW_PROFILE_WAIT_TIMEOUT           (245)\n\n#define RSP_TIMEOUT_DEFAULT                     (5000)\n#define RSP_TIMEOUT_FAST_ACK                    (1000)\n#define APP_TWS_IBRT_MAX_DATA_SIZE              (672)\n#define APP_TWS_IBRT_CMDCODE_SIZE               sizeof(uint16_t)\n#define APP_TWS_IBRT_CMDSEQ_SIZE                sizeof(uint16_t)\n#define APP_TWS_IBRT_CMDHEAD_SIZE               (APP_TWS_IBRT_CMDCODE_SIZE+APP_TWS_IBRT_CMDSEQ_SIZE)\n\n#define IBRT_BESAUD_RX_BUFF_SIZE                (672)\n#define IBRT_BESAUD_TX_BUFF_SIZE                (672*4)\n#define IBRT_TIMEOUT_INVALID                    (0)\n#define app_ibrt_cmd_rsp_timeout_handler_null   (0)\n#define app_ibrt_cmd_rsp_handler_null           (0)\n#define app_ibrt_cmd_rx_handler_null            (0)\n\n#define RSP_TIMEOUT_VOICE_REPORT        (1000)\n\ntypedef int (*TWS_CMD_HANDLER_T)(void **cmd_tbl, uint16_t *cmd_size);\n\nenum CMD_ID_T\n{\n    TWS_CMD_IBRT = 0,\n    TWS_CMD_CUSTOMER,\n    TWS_CMD_OTA,\n    TWS_CMD_IBRT_OTA,\n    TWS_CMD_NUM,\n};\n\ntypedef enum\n{\n    APP_TWS_ACCEPT,\n    APP_TWS_NOT_ACCEPT,\n} app_tws_switch_e;\n\ntypedef enum\n{\n    APP_TWS_CMD_PROFILE_DATA_EXCHANGE               = 0x8001,\n    APP_TWS_CMD_PROFILE_DATA_EXCHANGE_DONE          = 0x8002,\n    APP_TWS_CMD_SET_CODEC_TYPE                      = 0x8003,\n    APP_TWS_CMD_RSP                                 = 0x8004,\n    APP_TWS_CMD_SHARE_TWS_INFO                      = 0x8005,\n    APP_TWS_CMD_SWITCH_ROLE                         = 0x8006,\n    APP_TWS_CMD_SEND_PLAYBACK_INFO                  = 0x8007,\n    APP_TWS_CMD_SET_TRIGGER_TIME                    = 0x8008,\n    APP_TWS_CMD_NEED_RETRIGGER                      = 0x8009,\n    APP_TWS_CMD_SYNC_TUNE                           = 0x800A,\n    APP_TWS_CMD_SET_LATENCYFACTOR                   = 0x800B,\n    APP_TWS_CMD_START_IBRT                          = 0x800C,\n    APP_TWS_CMD_STOP_IBRT                           = 0x800D,\n    APP_TWS_CMD_SET_ENV                             = 0x800E,\n    APP_TWS_CMD_PROFILE_DATA_REQ                    = 0x800F,\n    APP_TWS_CMD_FAST_ACK_REQ                        = 0x8010,\n    APP_TWS_CMD_A2DP_STATUS_SYNC                    = 0x8011,\n    APP_TWS_CMD_HFP_STATUS_SYNC                     = 0x8012,\n    APP_TWS_CMD_VOICE_REPORT_REQUEST                = 0x8013,\n    APP_TWS_CMD_VOICE_REPORT_START                  = 0x8014,\n    APP_TWS_CMD_KEYBOARD_REQUEST                    = 0x8015,\n    APP_TWS_CMD_TRANSFER_SM                         = 0x8016,\n    APP_TWS_CMD_SYNC_ANC_STATUS                     = 0x8017,\n    APP_TWS_CMD_SET_INTERVAL                        = 0x8018,\n    APP_TWS_CMD_NEW_MOBILE_INCOMING                 = 0x8019,\n    APP_TWS_CMD_GET_PEER_MOBILE_RSSI                = 0x801A,\n    APP_TWS_CMD_NOTIFY_LINK_POLICY                  = 0x801B,\n    APP_TWS_CMD_SLAVE_CONNECT_BOX                   = 0x801C,\n    APP_TWS_CMD_SLAVE_CONNECT_BOX_RSP               = 0x801D,\n    APP_TWS_CMD_SLAVE_DISCONNECT_BOX_RSP            = 0x801E,\n    APP_TWS_CMD_SEND_CONTROLLER_PROFILE             = 0x801F,\n    APP_TWS_CMD_REV_SNOOP_INFO_COMPLETE             = 0x8020,\n    APP_TWS_CMD_GET_PEER_RAW_RSSI                   = 0x8021,\n    APP_TWS_CMD_SYNC_VOLUME_INFO                    = 0x8022,\n    APP_TWS_CMD_PERFORM_ACTION                      = 0x8023,\n    APP_TWS_CMD_EXIT_SNIFF_MODE                     = 0x8024,\n    APP_TWS_CMD_STOP_IBRT_FAILED                    = 0x8025,\n    APP_TWS_CMD_SHARE_COMMON_INFO                   = 0x8026,\n    APP_TWS_CMD_SYNC_MIX_PROMPT_REQ                 = 0x8027,\n    APP_TWS_CMD_STOP_PEER_PROMPT_REQ                = 0x8028,\n    APP_TWS_CMD_LET_PEER_PLAY_PROMPT                = 0x8029,\n    APP_TWS_CMD_PAIRING_MODE_REFRESH                = 0x802A,\n    APP_TWS_CMD_LET_MASTER_PREPARE_RS               = 0x802B, // for slave triggered role switch, BISTO need the master to control the gsound role switch\n    APP_TWS_CMD_LET_SLAVE_CONTINUE_RS               = 0x802C, // for slave triggered role switch, tell the slave gsound role switch has completed\n    APP_TWS_CMD_AI_SEND_CMD_TO_PEER                 = 0x802D, // ai send cmd to peer whitout rsp\n    APP_TWS_CMD_AI_SEND_CMD_TO_PEER_WITH_RSP        = 0x802E, // ai send cmd to peer whit rsp\n    APP_TWS_CMD_MOBILE_LINK_PLAYBACK_INFO           = 0x802F,\n    APP_TWS_CMD_DISC_MOBILE                         = 0x8030,\n    APP_TWS_CMD_SPECIAL_ALL_CANCEL         = 0xffff,\n} app_tws_cmd_code_e;\n\n#define IBRT_TWS_PERFORM_USER_ACITON                0xff\n#define IBRT_TWS_PERFORM_CONNECT_SECOND_MOBILE      0x01\n#define IBRT_TWS_PERFORM_DISCONNECT_MOBILE_TWS_LINK 0x02\n#define IBRT_TWS_PERFORM_PEER_TWS_SWITCH_DONE       0x03\n#define IBRT_TWS_PERFORM_CHOICE_MOBILE_CONNECT      0x04\n#define IBRT_TWS_PERFORM_AVRCP_NOTIFY_REGISTER      0x05\n\ntypedef void (*app_tws_cmd_send_handler_t)(uint8_t*, uint16_t);\ntypedef void (*app_tws_cmd_receivd_handler_t)(uint16_t, uint8_t*, uint16_t);\ntypedef void (*app_tws_rsp_timeout_handle_t)(uint16_t, uint8_t*, uint16_t);\ntypedef void (*app_tws_rsp_handle_t)(uint16_t, uint8_t*, uint16_t);\ntypedef void (*app_tws_cmd_tx_done_handler_t) (uint16_t, uint16_t, uint8_t*, uint16_t);\n\ntypedef struct\n{\n    uint32_t                        cmdcode;\n    const char                      *log_cmd_code_str;\n    app_tws_cmd_send_handler_t      tws_cmd_send;\n    app_tws_cmd_receivd_handler_t   cmdhandler;             /**< command handler function */\n    uint32_t                        timeout_ms;\n    app_tws_rsp_timeout_handle_t    app_tws_rsp_timeout_handle;\n    app_tws_rsp_handle_t            app_tws_rsp_handle;\n    app_tws_cmd_tx_done_handler_t   app_tws_cmd_tx_done_handler;\n} __attribute__((packed)) app_tws_cmd_instance_t;\n\ntypedef struct\n{\n    uint16_t                        opcode;\n    uint8_t                         conhdl_pos;\n    const char                      *log_cmd_code_str;\n} __attribute__((packed)) app_ibrt_cmd_filter_t;\n\ntypedef struct\n{\n    uint16_t  cmdcode;\n    uint16_t  cmdseq;\n    uint8_t   content[APP_TWS_IBRT_MAX_DATA_SIZE];\n} __attribute__((packed)) app_tws_ibrt_cmd_t;\n\nvoid app_ibrt_cmd_handler_init(void);\nint app_ibrt_cmd_table_get(void **cmd_tbl, uint16_t *cmd_size);\nint app_ibrt_set_cmdhandle(enum CMD_ID_T cmd_id, TWS_CMD_HANDLER_T handler);\nvoid app_ibrt_cmd_rx_handler(uint8_t* p_data_buff, uint16_t length);\nvoid app_ibrt_data_send_handler(void);\nvoid app_ibrt_data_receive_handler(void);\nvoid app_ibrt_cmd_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nbool app_ibrt_send_cmd_without_rsp(uint16_t cmdcode, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_send_cmd_with_rsp(uint16_t cmdcode, uint8_t *p_buff, uint16_t length);\nbool app_ibrt_waiting_cmd_rsp(void);\nvoid app_ibrt_profile_data_exchange_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_send_profiles(void);\nvoid app_ibrt_send_tws_switch_cmd(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_tws_switch_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_share_tws_info(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_share_tws_info_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_send_cmd_rsp(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_inform_start_ibrt_mode(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_start_ibrt_mode_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_inform_stop_ibrt_mode(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_stop_ibrt_mode_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_start_ibrt_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_stop_ibrt_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_stop_ibrt_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_start_ibrt_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_set_codec_type_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_set_codec_type_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_share_tws_info_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_share_tws_info_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_data_exchange_rsp_timeout_handler(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_data_exchange_done(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_data_exchange_done_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_set_env_cmd(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_set_env_cmd_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_set_env_cmd_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_set_env_cmd_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_profile_data_req_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_send_profile_data_req(uint8_t *p_buff, uint16_t length);\nuint8_t app_ibrt_send_profile_data(uint32_t profile_mask,bool tx_silence);\nvoid app_ibrt_wait_profile_ready_timer_cb(void const *n);\nvoid app_ibrt_delay_profile_send_timer_cb(void const *n);\nvoid app_ibrt_delay_profile_send_timer(uint32_t millisec);\nvoid app_ibrt_wait_profile_ready_timeout_handler(void);\nvoid app_ibrt_profile_ready_notify(uint32_t profile);\nuint8_t app_ibrt_profile_check_and_resync(void);\nvoid app_ibrt_sync_profile_init_status(void);\nvoid app_ibrt_fast_ack_req_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_send_fast_ack_req(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ibrt_fast_ack_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_fast_ack_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nuint16_t app_ibrt_find_cmd_table_index(uint16_t cmdcode, app_tws_cmd_instance_t **cmd_tbl);\nvoid app_ibrt_transfer_sm(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_transfer_sm_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_sync_anc_status(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_sync_anc_status_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_set_interval(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_set_interval_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_perform_action(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_perform_action_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_init_tws_trx_cmd_queue(void);\nvoid app_ibrt_reset_tws_trx_cmd_queue(void);\nvoid app_ibrt_new_mobile_incoming(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_new_mobile_incoming_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_notify_link_policy(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_notify_link_policy_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_slave_connect_box(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_slave_connect_box_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_slave_connect_box_rsp(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_slave_connect_box_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_slave_disconnect_box_rsp(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_slave_disconnect_box_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_new_mobile_incoming_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_new_mobile_incoming_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ui_debug_controller_timer_cb(void const *current_evt);\nvoid app_ibrt_recieve_bt_controller_profile_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_send_bt_controller_profile(uint8_t *p_buff, uint16_t input_length);\nvoid app_ibrt_send_snoop_info_send_complete(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_snoop_info_received_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_sync_volume_info_send(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_get_volume_info_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_exit_sniff(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_exit_sniff_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_stop_ibrt_failed(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_stop_ibrt_failed_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_share_common_info(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_share_common_info_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_share_common_info_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_share_common_info_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_sync_mix_prompt_req(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_sync_mix_prompt_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_prompt_play_req_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_prompt_req(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_stop_peer_prompt_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_stop_peer_prompt_req(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_pairing_mode_refresh(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_pairing_mode_refresh_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_let_master_prepare_rs(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_master_prepare_rs(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_let_slave_continue_rs(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_slave_continue_rs(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ai_send_cmd_to_peer(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ai_rev_peer_cmd_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ai_send_cmd_with_rsp_to_peer(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ai_rev_cmd_with_rsp_to_peer_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ai_rev_cmd_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ai_rev_cmd_rsp_from_peer_hanlder(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_send_mobile_link_playback_info(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_send_mobile_link_playback_info_handler(uint16_t rsp_seq, uint8_t *ptrParam, uint16_t paramLen);\nvoid app_ibrt_disconnect_mobile(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_disconnect_mobile_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n#endif\n\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_cmd_sync_a2dp_status.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_CMD_SYNC_A2DP_STATUS_H__\n#define __APP_TWS_IBRT_CMD_SYNC_A2DP_STATUS_H__\n#include \"app_tws_ibrt.h\"\n#include \n\ntypedef struct {\n  ibrt_codec_t codec;\n  uint8_t volume;\n  btif_avdtp_stream_state_t state;\n  float latency_factor;\n  uint32_t session;\n} __attribute__((packed)) ibrt_a2dp_status_t;\n\nbool app_ibrt_sync_a2dp_status_onporcess(void);\nvoid app_ibrt_sync_a2dp_status_set(bool status);\n\nvoid app_ibrt_sync_a2dp_status(void);\nvoid app_ibrt_sync_a2dp_send_status(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_sync_a2dp_send_status_handler(uint16_t rsp_seq, uint8_t *p_buff,\n                                            uint16_t length);\nvoid app_ibrt_sync_a2dp_send_status_rsp_timeout_handler(uint16_t rsp_seq,\n                                                        uint8_t *p_buff,\n                                                        uint16_t length);\nvoid app_ibrt_sync_a2dp_send_status_rsp_handler(uint16_t rsp_seq,\n                                                uint8_t *p_buff,\n                                                uint16_t length);\n\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_cmd_sync_hfp_status.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_CMD_SYNC_HFP_STATUS_H__\n#define __APP_TWS_IBRT_CMD_SYNC_HFP_STATUS_H__\n\ntypedef struct\n{\n    uint8_t audio_state;\n    uint8_t volume;\n    uint8_t lmp_sco_hdl;\n} __attribute__((packed)) ibrt_hfp_status_t;\n\nvoid app_ibrt_sync_hfp_status(void);\n\nvoid app_ibrt_sync_hfp_send_status(uint8_t *p_buff, uint16_t length);\n\nvoid app_ibrt_sync_hfp_send_status_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nvoid app_ibrt_sync_hfp_send_status_rsp_timeout_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nvoid app_ibrt_sync_hfp_send_status_rsp_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nvoid app_ibrt_sync_hfp_status_done(uint16_t cmdcode, uint16_t rsp_seq, uint8_t *ptrParam, uint16_t paramLen);\n\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_mock.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_MOCK_H__\n#define __APP_TWS_IBRT_MOCK_H__\n\ntypedef struct {\n    uint16_t curr_pkt_sequenceNumber;\n    uint32_t curr_pkt_timestamp;\n    uint32_t rcv_pkt_cnt;\n    uint16_t first_pkt_sequenceNumber;\n    uint32_t first_pkt_timestamp;\n    uint32_t bt_clk;\n    uint32_t bt_cnt;\n    uint32_t mobile_clk;\n    uint32_t mobile_cnt;\n} A2DP_STREAM_MEDIA_INFO_T;\n\nint a2dp_stream_media_info_get(A2DP_STREAM_MEDIA_INFO_T *media_info);\nint a2dp_stream_media_info_set(A2DP_STREAM_MEDIA_INFO_T *media_info);\n\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_queue.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_BT_QUEUE_H__\n#define __APP_BT_QUEUE_H__\n\ntypedef struct __ibrt_queue\n{\n    CQueue queue;\n    void *mutex;\n}ibrt_queue;\n\nvoid app_tws_ibrt_queue_init(ibrt_queue* ptrQueue, uint8_t* ptrBuf, uint32_t bufLen);\nint app_tws_ibrt_queue_push(ibrt_queue* ptrQueue, uint8_t* ptrData, uint32_t length);\nuint16_t app_tws_ibrt_queue_get_next_entry_length(ibrt_queue* ptrQueue);\nvoid app_tws_ibrt_queue_pop(ibrt_queue* ptrQueue, uint8_t *ptrBuf, uint32_t len);\nint app_tws_ibrt_dequeue(ibrt_queue *ptrQueue, void *e, unsigned int len);\nint app_tws_ibrt_length_queue(ibrt_queue *ptrQueue);\n\n#endif\t// __APP_BT_QUEUE_H__\n\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_ibrt_trace.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_TRACE_H__\n#define __APP_TWS_IBRT_TRACE_H__\n\n#include \"hal_trace.h\"\n\nextern const char *g_log_super_state_str[];\n\nextern const char *g_log_action_str[];\n\nextern const char *g_log_event_str[];\n\nextern const char *g_log_status_str[];\n\nextern const char *g_log_box_state_str[];\n\nextern const char *g_log_link_type_str[];\n\nextern const char *g_log_scan_trigger_str[];\n\nextern const char *g_log_policy_trigger_str[];\n\nextern const char *g_log_pairing_state_str[];\n\nextern const char *g_log_error_type_str[];\n\nextern const char *g_log_pair_mode_str[];\n\n#ifdef ENABLE_COMPRESS_LOG\n#define TRACE_VOICE_RPT_D(str, ...) LOG_DEBUG(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][VOICE_RPT][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_VOICE_RPT_I(str, ...) LOG_INFO(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][VOICE_RPT]\"str, ##__VA_ARGS__)\n#define TRACE_VOICE_RPT_W(str, ...) LOG_WARN(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),     \"[AUD][VOICE_RPT][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_VOICE_RPT_E(str, ...) LOG_ERROR(LOG_ATTR_ARG_NUM(COUNT_ARG_NUM(unused, ##__VA_ARGS__)),    \"[AUD][VOICE_RPT][ERR]\"str, ##__VA_ARGS__)\n#else\n#define TRACE_VOICE_RPT_D(str, ...) LOG_DEBUG(LOG_MOD(AUDFLG),    \"[AUD][VOICE_RPT][DBG]\"str, ##__VA_ARGS__)\n#define TRACE_VOICE_RPT_I(str, ...) LOG_INFO(LOG_MOD(AUDFLG),     \"[AUD][VOICE_RPT]\"str, ##__VA_ARGS__)\n#define TRACE_VOICE_RPT_W(str, ...) LOG_WARN(LOG_MOD(AUDFLG),     \"[AUD][VOICE_RPT][WARN]\"str, ##__VA_ARGS__)\n#define TRACE_VOICE_RPT_E(str, ...) LOG_ERROR(LOG_MOD(AUDFLG),    \"[AUD][VOICE_RPT][ERR]\"str, ##__VA_ARGS__)\n#endif\n\n#endif\n"
  },
  {
    "path": "services/ibrt_core/inc/app_tws_profile_sync.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_PROFILE_SYNC__\n#define __APP_TWS_PROFILE_SYNC__\n\n#include \"spp_api.h\"\n\n#define COMMON_DATA_ARRAY_LEN           (164)\n#define RFC_MUX_DATA_ARRAY_LEN          (196)\n#define HFP_DATA_ARRAY_LEN              (284)\n#define A2DP_DATA_ARRAY_LEN             (196)\n#define A2DP_CONTINUE_DATA_ARRAY_LEN    (564)\n#define AVRCP_DATA_ARRAY_LEN            (612)\n#define MAP_DATA_ARRAY_LEN              (256)\n#define HID_DATA_ARRAY_LEN              (256)\n#define SPP_DATA_ARRAY_LEN              (256)\n\n\ntypedef struct\n{\n    uint8_t common_data[COMMON_DATA_ARRAY_LEN];\n    uint8_t rfc_mux_data[RFC_MUX_DATA_ARRAY_LEN];\n    uint8_t hfp_data[HFP_DATA_ARRAY_LEN];\n    uint8_t a2dp_data[A2DP_DATA_ARRAY_LEN];\n    uint8_t a2dp_continue_data[A2DP_CONTINUE_DATA_ARRAY_LEN];\n    uint8_t avrcp_data[AVRCP_DATA_ARRAY_LEN];\n    uint8_t map_data[MAP_DATA_ARRAY_LEN];\n    uint8_t hid_data[HID_DATA_ARRAY_LEN];\n    uint8_t spp_data[SPP_DEVICE_NUM][SPP_DATA_ARRAY_LEN];\n\n    uint16_t common_data_len;\n    uint16_t rfc_mux_data_len;\n    uint16_t hfp_data_len;\n    uint16_t a2dp_data_len;\n    uint16_t a2dp_continue_data_len;\n    uint16_t avrcp_data_len;\n    uint16_t map_data_len;\n    uint16_t hid_data_len;\n    uint16_t spp_data_len[SPP_DEVICE_NUM];\n    uint32_t app_id[SPP_DEVICE_NUM];\n    uint8_t  spp_amount;\n    uint8_t  spp_num;\n} data_store_mem_t;\n\n\n/*\n * Sync tws master's mobile link profile to tws slave\n */\n#define APP_TWS_NUM_BT_DEVICES  2\n#define APP_TWS_NUM_KNOWN_DEVICES  10\n\n\nvoid app_tws_profile_data_sync(uint8_t *p_buff, uint16_t length);\nvoid app_tws_parse_profile_data(uint8_t *p_buff, uint32_t length);\nvoid app_bt_update_bt_profile_manager(void);\nvoid app_tws_profile_sync_complete_timer_trigger(void);\nuint32_t app_tws_profile_data_tx(uint8_t flag,uint8_t *buf);\nuint32_t app_tws_profile_data_rx(uint8_t flag,uint8_t *buf,uint32_t length);\nvoid app_tws_profile_data_save_temporarily(uint8_t *p_buff, uint32_t length);\nbool app_tws_profile_data_rx_needed(uint8_t profile_flag);\nbool app_tws_profile_data_rx_completed(uint8_t final_flag);\nvoid app_tws_profile_rx_parse(void);\nuint8_t app_tws_profile_data_tx_filter(uint32_t profile_mask,uint8_t data_array[][2]);\nbool app_tws_profile_data_tx_allowed(void);\nbool app_tws_profile_connecting(void);\nuint32_t app_tws_profile_mapping_data_fragment(uint8_t flag);\nvoid ibrt_app_wait_data_send_to_peer_timeout_handler(void const *param);\nvoid app_tws_profile_resume_a2dp_hfp(void);\n\n#endif\n\n"
  },
  {
    "path": "services/ibrt_core/inc/app_vendor_cmd_evt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_VENDOR_EVT__\n#define __APP_VENDOR_EVT__\n\n#define GET_HCI_HANDLE(ptr)    ((unsigned short)(((unsigned short) *((ptr)+1) << 8) | ((unsigned short) *(ptr))))\n\n\n\n//Sub code of Vendor event\n#define HCI_DBG_TRACE_WARNING_EVT_CODE                0x01\n#define HCI_SCO_SNIFFER_STATUS_EVT_CODE               0x02\n#define HCI_ACL_SNIFFER_STATUS_EVT_CODE               0x03\n#define HCI_TWS_EXCHANGE_CMP_EVT_CODE                 0x04\n#define HCI_NOTIFY_CURRENT_ADDR_EVT_CODE              0x05\n#define HCI_START_SWITCH_EVT_CODE                     0x09\n#define HCI_LL_MONITOR_EVT_CODE                       0x0A\n#define HCI_DBG_LMP_MESSAGE_RECORD_EVT_SUBCODE        0x0B\n#define HCI_GET_TWS_SLAVE_MOBILE_RSSI_CODE            0x0C\n#define HCI_DBG_IBRT_SWITCH_COMPLETE_EVT_SUBCODE      0x0D\n#define HCI_DBG_IBRT_CONNECTED_EVT_SUBCODE            0x0E\n#define HCI_DBG_IBRT_DISCONNECTED_EVT_SUBCODE         0x0f\n#define HCI_DBG_SNIFFER_INIT_CMP_EVT_SUBCODE          0x10\n#define HCI_DBG_RX_SEQ_ERROR_EVT_SUBCODE              0x11\n#define HCI_DBG_FA_TO_EVT_SUBCODE                     0x14\n#define HCI_DBG_ECC_DATA_TEST_EVT_SUBCODE             0x15\n#define HCI_DBG_FRMERRIND_EVT_SUBCODE                 0x16\n#define HCI_DBG_PKTERRIND_EVT_SUBCODE                 0x17\n\n\nvoid app_hci_vendor_event_callback_init(void);\nvoid app_hci_vendor_event_handler(uint8_t* pbuf, uint32_t length);\nvoid btapp_sniffer_sco_start(uint16_t conhdl,uint8_t sco_status,uint8_t airmode,uint32_t bandwidth);\nvoid btapp_sniffer_ibrt_op(uint16_t conhdl, uint8_t op, uint8_t status, uint8_t reason);\nvoid app_ibrt_ui_rx_seq_error_handling_timer_cb(void const *current_evt);\nvoid app_hci_vender_ibrt_disconnected_handle(uint8_t disc_reason);\nvoid app_hci_vender_ibrt_fastack_to_handle(uint16_t mobile_conhdl);\n#endif\n"
  },
  {
    "path": "services/ibrt_ota/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\n\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.cpp))\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nIBRT_OTA_LIB_NAME := lib_ibrt_ota\nifeq ($(BLE), 1)\nIBRT_OTA_LIB_NAME := $(IBRT_OTA_LIB_NAME)_ble\nendif\n\nifeq ($(KERNEL),RTX)\nIBRT_OTA_LIB_NAME := $(IBRT_OTA_LIB_NAME)_RTX\nendif\nifeq ($(KERNEL),RTX5)\nIBRT_OTA_LIB_NAME := $(IBRT_OTA_LIB_NAME)_RTX5\nendif\n\n$(IBRT_OTA_LIB_NAME)-y := $(src_obj)\n\nobj-y += $(IBRT_OTA_LIB_NAME).a\n\nsubdir-ccflags-y += -Iplatform/drivers/ana \\\n\t\t\t\t\t-Iplatform/hal \\\n\t\t\t\t\t-Iservices/bluedroid/adapter/src \\\n\t\t\t\t\t-Iapps/key \\\n\t\t\t\t\t-Iservices/audio_eq \\\n\t\t\t\t\t-Iservices/fs/fat \\\n\t\t\t\t\t-Iservices/fs/sd \\\n\t\t\t\t\t-Iservices/fs/fat/ChaN \\\n\t\t\t\t\t$(BT_IF_INCLUDES) \\\n\t\t\t\t\t$(BT_PROFILES_INCLUDES) \\\n\t\t\t\t\t-Iservices/overlay \\\n\t\t\t\t\t-Iservices/nvrecord \\\n\t\t\t\t\t-Iservices/nv_section/factory_section \\\n\t\t\t\t\t-Iservices/resources \\\n\t\t\t\t\t-Iplatform/drivers/uarthci \\\n\t\t\t\t\t-Iplatform/drivers/ana \\\n\t\t\t\t\t-Iplatform/drivers/bt \\\n\t\t\t\t\t-Iplatform/drivers/main \\\n\t\t\t\t\t-Iutils/cqueue \\\n\t\t\t\t\t-Iutils/heap \\\n\t\t\t\t\t-Iutils/retention_ram \\\n\t\t\t\t\t-Iservices/audioflinger \\\n                    -Iservices/app_ai/inc \\\n\t\t\t\t\t-Iutils/lockcqueue \\\n\t\t\t\t\t-Iutils/hwtimer_list/ \\\n\t\t\t\t\t-Iutils/intersyshci \\\n\t\t\t\t\t-Iutils/boot_struct \\\n\t\t\t\t\t-Iapps/main \\\n\t\t\t\t\t-Iapps/common \\\n\t\t\t\t\t-Iapps/audioplayers \\\n\t\t\t\t\t-Iapps/factory \\\n\t\t\t\t\t-Iapps/ota \\\n\t\t\t\t\t-Iservices/ble_app \\\n\t\t\t\t\t-Iservices/ble_app/app_ota \\\n\t\t\t\t\t-Iservices/ble_stack/ble_ip \\\n\t\t\t\t\t-Iservices/ble_stack/hl/api \\\n\t\t\t\t\t-Iservices/ble_stack/app/api/  \\\n\t\t\t\t\t-Iservices/ble_stack/common/api/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/inc/ \\\n\t\t\t\t\t-Iservices/ble_stack/ke/api \\\n\t\t\t\t\t-Iservices/bridge/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/gapc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/gapm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/smpc/ \\\n\t\t\t\t\t-Iservices/ble_stack/ke/src/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/attc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/attm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/atts/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/gattc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/gattm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hci/api/ \\\n\t\t\t\t\t-Iservices/ble_stack/hci/src/ \\\n\t\t\t\t\t-Iservices/ble_stack/app/src/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/htpt/api/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/htpt/src/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/\t\\\n\t\t\t\t\t-Iservices/ble_profiles/datapath/datapathps/api/  \\\n\t\t\t\t\t-Iservices/ble_app/app_main/ \\\n\t\t\t\t\t-Iservices/ble_app/app_htp/\t\\\n\t\t\t\t\t-Iservices/ble_app/app_datapath/\t\\\n\t\t\t\t\t-Iservices/bt_app \\\n\t\t\t\t\t-Iservices/bt_app/a2dp_codecs/include \\\n\t\t\t\t\t-Iservices/ble_app/app_vob \\\n\t\t\t\t\t-Iservices/multimedia/speech/codec/codecs/adpcm \\\n\t\t\t\t\t-Iservices/ble_app/app_smartvoice \\\n\t\t\t\t\t-Iservices/ble_profiles/smartvoice \\\n\t\t\t\t\t-Iservices/anc_spp_tool \\\n\t\t\t\t\t-Iutils/crc32 \\\n\t\t\t\t\t-Ithirdparty/userapi \\\n\t\t\t\t\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t\t\t\t\t-Iservices/multimedia/audio/codec/sbc/src/inc \\\n\t\t\t\t\t-Iservices/norflash_api\n\nifeq ($(OTA_ENABLE),1)\nsubdir-ccflags-y += \\\n\t-Iservices/ibrt_ota/inc\nendif\n\nifeq ($(IBRT),1)\nsubdir-ccflags-y += \\\n\t-Iservices/ibrt_ui/inc \\\n\t-Iservices/ibrt_core/inc \\\n\t-Iservices/app_ibrt/inc \\\n\t-Iservices/bt_app\nendif\n\t\t\nifneq ($(OTA_CODE_OFFSET),0)\nCFLAGS_ota_control.o += -DOTA_CODE_OFFSET=$(OTA_CODE_OFFSET)\nendif\t\t\t\n"
  },
  {
    "path": "services/ibrt_ota/inc/ota_bes.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_OTA_H__\n#define __APP_OTA_H__\n\t\n#define APP_OTA_CONNECTED             (1 << 0)    \n#define APP_OTA_DISCONNECTED          (~(1 << 0))\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_ota_connected(uint8_t connType);\nvoid app_ota_disconnected(uint8_t disconnType);\nbool app_is_in_ota_mode(void);\nvoid bes_ota_init(void);\n\n#define BES_OTA_UUID_128 {0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66 }\n\n#if (BLE_OTA)\n#define ota_val_char_val_uuid_128_content  \t\t{0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77 }\t\n#define ATT_DECL_PRIMARY_SERVICE_UUID\t\t{ 0x00, 0x28 }\n#define ATT_DECL_CHARACTERISTIC_UUID\t\t{ 0x03, 0x28 }\n#define ATT_DESC_CLIENT_CHAR_CFG_UUID\t\t{ 0x02, 0x29 }\n#endif\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/ibrt_ota/inc/ota_control.h",
    "content": "#ifndef _OTA_CONTROL_H_\n#define _OTA_CONTROL_H_\n\n#include \"co_bt_defines.h\"\n\n#define LOG_TAG \"[OTA_CONTROL] \"\n\n#define OTA_BES_CONTROL_DEBUG\n\n#ifdef OTA_BES_CONTROL_DEBUG\n#define LOG_DBG(num,str,...)   TRACE(num,LOG_TAG\"\"str, ##__VA_ARGS__)             // DEBUG OUTPUT\n#define LOG_MSG(num,str,...)   TRACE(num,LOG_TAG\"\"str, ##__VA_ARGS__)             // MESSAGE OUTPUT\n#define LOG_ERR(num,str,...)   TRACE(num,LOG_TAG\"err:\"\"\"str, ##__VA_ARGS__)       // ERROR OUTPUT\n\n#define LOG_FUNC_LINE()    TRACE(2,LOG_TAG\"%s:%d\\n\", __FUNCTION__, __LINE__)\n#define LOG_FUNC_IN()      TRACE(1,LOG_TAG\"%s ++++\\n\", __FUNCTION__)\n#define LOG_FUNC_OUT()     TRACE(1,LOG_TAG\"%s ----\\n\", __FUNCTION__)\n\n#define LOG_DUMP           DUMP8\n#else\n#define LOG_DBG(num,str,...)\n#define LOG_MSG(num,str,...)   TRACE(num,LOG_TAG\"\"str, ##__VA_ARGS__)\n#define LOG_ERR(num,str,...)   TRACE(num,LOG_TAG\"err:\"\"\"str, ##__VA_ARGS__)\n\n#define LOG_FUNC_LINE()\n#define LOG_FUNC_IN()\n#define LOG_FUNC_OUT()\n\n#define LOG_DUMP\n#endif\n\n#define ERASE_LEN_UNIT          4096\n\n#define OTA_SW_VERSION          1\n#define OTA_HW_VERSION          1\n\n#define DATA_PATH_BLE           1\n#define DATA_PATH_SPP           2\n\n#ifndef NORMAL_BOOT\n#define NORMAL_BOOT             0xBE57EC1C\n#endif\n#ifndef COPY_NEW_IMAGE\n#define COPY_NEW_IMAGE          0x5a5a5a5a\n#endif\n\n#define OTA_TWS_INFO_SIZE 128\n\n#define OTA_BUF_SIZE            1024\n\n#define OTA_WATCH_DOG_PING_TIMER_ID 0\n\n#ifndef NEW_IMAGE_FLASH_OFFSET\n#define NEW_IMAGE_FLASH_OFFSET    0x180000\n#endif\n\n#define OTA_FLASH_LOGIC_ADDR        (FLASH_NC_BASE)\n\n#define DATA_ACK_FOR_SPP_DATAPATH_ENABLED 1\n#define PUYA_FLASH_ERASE_LIMIT 0\n\n#define OTA_RS_INFO_MASTER_SEND_RS_REQ_CMD   1\n#define OTA_RS_INFO_MASTER_DISCONECT_CMD     2\n#define OTAUPLOG_HEADSIZE (sizeof(otaUpgradeLog.randomCode) + sizeof(otaUpgradeLog.totalImageSize) + sizeof(otaUpgradeLog.crc32OfImage))\n#define FLASH_SECTOR_SIZE_IN_BYTES          4096\n#define OTA_OFFSET                          0x1000\n#define OTA_INFO_IN_OTA_BOOT_SEC            (FLASHX_BASE+OTA_OFFSET)\n#define OTA_DATA_BUFFER_SIZE_FOR_BURNING    FLASH_SECTOR_SIZE_IN_BYTES\n\n#define BES_OTA_START_MAGIC_CODE            0x54534542  // BEST\n\n#define BES_OTA_NAME_LENGTH                 32\n#define BES_OTA_BLE_DATA_PACKET_MAX_SIZE    512\n#define BES_OTA_BT_DATA_PACKET_MAX_SIZE     L2CAP_MTU\n\n#define IMAGE_RECV_FLASH_CHECK              1  // It's best to turn it on durning development and not a big deal off in the release.\n\n#define MAX_IMAGE_SIZE                      ((uint32_t)(NEW_IMAGE_FLASH_OFFSET - __APP_IMAGE_FLASH_OFFSET__))\n\n#define MIN_SEG_ALIGN                       256\ntypedef void (*ota_transmit_data_t)(uint8_t* ptrData, uint32_t dataLen);\ntypedef void (*ota_transmission_done_t)(void);\n\nenum\n{\n    OTA_RESULT_ERR_RECV_SIZE = 2,\n    OTA_RESULT_ERR_FLASH_OFFSET,\n    OTA_RESULT_ERR_SEG_VERIFY,\n    OTA_RESULT_ERR_BREAKPOINT,\n    OTA_RESULT_ERR_IMAGE_SIZE,\n};\n\n/**\n * @brief The format of the start OTA control packet\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_COMMAND_START\n    uint32_t    magicCode;      // should be BES_OTA_START_MAGIC_CODE\n    uint32_t    imageSize;      // total image size\n    uint32_t    crc32OfImage;   // crc32 of the whole image\n} __attribute__ ((__packed__)) OTA_CONTROL_START_T;\n\n/**\n * @brief The format of the start OTA response packet\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_RSP_START\n    uint32_t    magicCode;      // should be BES_OTA_START_MAGIC_CODE\n    uint16_t    swVersion;\n    uint16_t    hwVersion;\n    uint16_t    MTU;            // MTU exchange result, central will send images in the unit of MTU\n} __attribute__ ((__packed__)) OTA_START_RSP_T;\n\ntypedef struct\n{\n    uint32_t    lengthOfFollowingData;\n    uint32_t    startLocationToWriteImage;    // the offset of the flash to start writing the image\n    uint32_t    isToClearUserData   : 1;\n    uint32_t    isToRenameBT        : 1;\n    uint32_t    isToRenameBLE       : 1;\n    uint32_t    isToUpdateBTAddr    : 1;\n    uint32_t    isToUpdateBLEAddr   : 1;\n    uint32_t    reserve             : 27;\n    uint8_t     newBTName[BES_OTA_NAME_LENGTH];\n    uint8_t     newBLEName[BES_OTA_NAME_LENGTH];\n    uint8_t     newBTAddr[BD_ADDR_LEN];\n    uint8_t     newBLEAddr[BD_ADDR_LEN];\n    uint32_t    crcOfConfiguration; // CRC of data from lengthOfFollowingData to newBLEAddr\n} __attribute__ ((__packed__)) OTA_FLOW_CONFIGURATION_T;\n\n/**\n * @brief The format of the start OTA control packet\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_COMMAND_CONFIG_OTA\n    OTA_FLOW_CONFIGURATION_T config;\n} __attribute__ ((__packed__)) OTA_COMMAND_CONFIG_T;\n\n/**\n * @brief The format of the OTA configuration response packet\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_RSP_CONFIG\n    uint8_t     isConfigurationDone;    // 1 if the configuration has been done successfully, otherwise, 0\n} __attribute__ ((__packed__)) OTA_RSP_CONFIG_T;\n\n\n/**\n * @brief The format of the segment verification request\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_COMMAND_SEGMENT_VERIFY\n    uint32_t    magicCode;      // should be BES_OTA_START_MAGIC_CODE\n    uint32_t    crc32OfSegment;          // crc32 of the 1% segment\n} __attribute__ ((__packed__)) OTA_CONTROL_SEGMENT_VERIFY_T;\n\n/**\n * @brief The format of the segment verification request\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_RSP_SEGMENT_VERIFY\n    uint8_t     isVerificationPassed;\n} __attribute__ ((__packed__)) OTA_RSP_SEGMENT_VERIFY_T;\n\n\n/**\n * @brief The format of the OTA result response\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_RSP_RESULT\n    uint8_t     isVerificationPassed;\n} __attribute__ ((__packed__)) OTA_RSP_OTA_RESULT_T;\n\n/**\n * @brief The format of the OTA reading flash content command\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_READ_FLASH_CONTENT\n    uint8_t     isToStart;      // true to start, false to stop\n    uint32_t    startAddr;\n    uint32_t    lengthToRead;\n} __attribute__ ((__packed__)) OTA_READ_FLASH_CONTENT_REQ_T;\n\n/**\n * @brief The format of the OTA reading flash content command\n *\n */\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_READ_FLASH_CONTENT\n    uint8_t     isReadingReqHandledSuccessfully;\n} __attribute__ ((__packed__)) OTA_READ_FLASH_CONTENT_RSP_T;\n\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_CONTROL_RESUME_VERIFY\n    uint32_t    magicCode;      // should be BES_OTA_START_MAGIC_CODE\n    uint8_t     randomCode[32];\n    uint32_t    segmentSize;\n    uint32_t    crc32;          // CRC32 of randomCode and segment size\n} __attribute__ ((__packed__)) OTA_CONTROL_RESUME_VERIFY_T;\n\ntypedef struct\n{\n    uint8_t     packetType;     // should be OTA_RSP_RESUME_VERIFY\n    uint32_t    breakPoint;\n    uint8_t     randomCode[32];\n    uint32_t    crc32;          // CRC32 of breakPoint and randomCode\n} __attribute__ ((__packed__)) OTA_RSP_RESUME_VERIFY_T;\n\ntypedef struct\n{\n    uint8_t     packetType;     // should be\n    uint32_t    magicCode;      // should be BES_OTA_START_MAGIC_CODE\n} __attribute__ ((__packed__)) OTA_GET_VERSION_REQ_T;\n\ntypedef struct\n{\n    uint8_t     packetType;     // should be\n    uint32_t     magicCode;\n    uint8_t    deviceType;\n    uint8_t    leftVersion[4];    //or stereo version\n    uint8_t    rightVersion[4];    //stereo not needed\n} __attribute__ ((__packed__)) OTA_RSP_OTA_VERSION_T;\n\ntypedef struct\n{\n    uint8_t     packetType;     // should be\n    uint8_t    success;\n} __attribute__ ((__packed__)) OTA_RSP_SELECTION_T;\n\n\ntypedef struct\n{\n    uint8_t     packetType;     // should be\n    uint32_t    magicCode;      // should be BES_OTA_START_MAGIC_CODE\n} __attribute__ ((__packed__)) OTA_FORCE_REBOOT_T;\n\ntypedef struct\n{\n    uint8_t     packetType;     // should be\n    uint32_t    magicCode;      // should be BES_OTA_START_MAGIC_CODE\n} __attribute__ ((__packed__)) OTA_IMAGE_APPLY_REQ_T;\n\ntypedef struct\n{\n    uint8_t     packetType;     // should be\n       uint8_t    success;\n} __attribute__ ((__packed__)) OTA_RSP_APPLY_T;\n\ntypedef struct\n{\n    uint8_t     packetType;\n} __attribute__ ((__packed__)) OTA_START_ROLE_SWITCH_T;\n\ntypedef struct\n{\n    uint8_t     packetType;\n} __attribute__ ((__packed__)) OTA_ROLE_SWITCH_COMPLETE_T;\n\n/**\n * @brief The OTA handling data structure\n *\n */\ntypedef struct\n{\n    uint8_t*    dataBufferForBurning;\n    uint32_t    dstFlashOffsetForNewImage;\n    uint32_t    offsetInDataBufferForBurning;\n    uint32_t    offsetInFlashToProgram;\n    uint32_t    totalImageSize;\n    uint32_t    alreadyReceivedDataSizeOfImage;\n    uint32_t    offsetInFlashOfCurrentSegment;\n    uint32_t    offsetOfImageOfCurrentSegment;\n    uint32_t    crc32OfImage;\n    uint32_t    crc32OfSegment;\n    uint8_t     isOTAInProgress;\n    uint8_t     isPendingForReboot;\n    uint32_t    flasehOffsetOfUserDataPool;\n    uint32_t    flasehOffsetOfFactoryDataPool;\n\n    // configuration of the OTA\n    OTA_FLOW_CONFIGURATION_T    configuration;\n    uint32_t    AlreadyReceivedConfigurationLength;\n\n    uint16_t     dataPacketSize;\n    ota_transmit_data_t  transmitHander;\n    uint32_t    offsetInFlashToRead;\n    uint32_t    leftSizeOfFlashContentToRead;\n\n    uint8_t     dataPathType;\n\n    bool        resume_at_breakpoint;\n    uint32_t    breakPoint;\n    uint32_t    i_log;\n} OTA_CONTROL_ENV_T;\n\ntypedef struct\n{\n    uint32_t magicNumber;    // NORMAL_BOOT or COPY_NEW_IMAGE\n    uint32_t imageSize;\n    uint32_t imageCrc;\n} FLASH_OTA_BOOT_INFO_T;\n\ntypedef struct\n{\n    uint8_t     randomCode[32];\n    uint32_t    totalImageSize;\n    uint32_t    crc32OfImage;\n    uint32_t    upgradeSize[(ERASE_LEN_UNIT - 32 - 2*sizeof(uint32_t)) / 4];\n}FLASH_OTA_UPGRADE_LOG_FLASH_T;\n\n/**\n * @brief The control packet type\n *\n */\ntypedef enum\n{\n    OTA_COMMAND_START = 0x80,   // from central to device, to let OTA start\n    OTA_RSP_START,              // from device to centrl, to let it know that it has been ready for OTA\n    OTA_COMMAND_SEGMENT_VERIFY, // from central to device, sent per 1% of image, inform device to do CRC check on those 1%\n    OTA_RSP_SEGMENT_VERIFY,\n    OTA_RSP_RESULT,\n    OTA_DATA_PACKET,\n    OTA_COMMAND_CONFIG_OTA,     // from central to device, to configure the following OTA flow\n    OTA_RSP_CONFIG,\n    OTA_COMMAND_GET_OTA_RESULT,\n    OTA_READ_FLASH_CONTENT,\n    OTA_FLASH_CONTENT_DATA = 0x8A,\n    OTA_DATA_ACK,\n    OTA_COMMAND_RESUME_VERIFY,\n    OTA_RSP_RESUME_VERIFY,\n    OTA_COMMAND_GET_VERSION,\n    OTA_RSP_VERSION,\n    OTA_COMMAND_SIDE_SELECTION = 0x90,\n    OTA_RSP_SIDE_SELECTION,\n    OTA_COMMAND_IMAGE_APPLY,\n    OTA_RSP_IMAGE_APPLY,\n    OTA_RSP_START_ROLE_SWITCH = 0x95,\n    OTA_RSP_ROLE_SWITCH_COMPLETE,\n} OTA_CONTROL_PACKET_TYPE_E;\n\ntypedef struct\n{\n    uint8_t     typeCode;\n    uint16_t    rsp_seq;\n    uint16_t    length;\n    uint8_t     p_buff[OTA_TWS_INFO_SIZE];\n}OTA_IBRT_TWS_CMD_EXECUTED_RESULT_FROM_SLAVE_T;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/**\n * @brief Format of the data xfer handler function, to send data to central\n *\n * @param ptrData    Pointer of the data to send\n * @param dataLen     Length of the data to send\n *\n */\n\nextern void app_ibrt_ota_segment_crc_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nextern void app_ibrt_ota_start_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nextern void app_ibrt_ota_config_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nextern void app_ibrt_ota_image_crc_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nextern void app_ibrt_ota_get_version_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nextern void app_ibrt_ota_select_side_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\nextern void app_ibrt_ota_image_overwrite_cmd_send_handler(uint16_t rsp_seq, uint8_t *p_buff, uint16_t length);\n\nvoid ota_control_register_transmitter(ota_transmit_data_t transmit_handle);\nvoid ota_control_update_MTU(uint16_t mtu);\nvoid ota_update_info(void);\nvoid ota_check_and_reboot_to_use_new_image(void);\nvoid ota_control_reset_env(void);\nvoid ota_execute_the_final_operation(void);\nbool ota_is_in_progress(void);\nvoid ota_control_set_datapath_type(uint8_t datapathType);\nvoid ibrt_ota_send_start_response(bool isViaBle);\nvoid ibrt_ota_send_configuration_response(bool isDone);\nvoid ota_control_image_apply_rsp(uint8_t success);\nvoid ibrt_ota_send_segment_verification_response(bool isPass);\nvoid ibrt_ota_send_result_response(uint8_t isSuccessful);\nvoid ota_randomCode_log(uint8_t randomCode[]);\nvoid ota_control_send_resume_response(uint32_t breakPoint, uint8_t randomCode[]);\nvoid ota_bes_handle_received_data(uint8_t *otaBuf, bool isViaBle,uint16_t dataLenth);\nvoid ota_ibrt_handle_received_data(uint8_t *otaBuf, bool isViaBle, uint16_t len);\nvoid ota_control_side_selection_rsp(uint8_t success);\nuint8_t ota_control_get_datapath_type(void);\nuint32_t app_get_magic_number(void);\nvoid ota_flash_init(void);\nvoid Bes_exit_ota_state(void);\nvoid ibrt_ota_send_version_rsp(void);\nvoid ota_upgradeLog_destroy(void);\nvoid ota_status_change(bool status);\nvoid ota_control_send_start_role_switch(void);\nvoid ota_control_send_role_switch_complete(void);\nuint8_t app_get_bes_ota_state(void);\nbool app_check_is_ota_role_switch_initiator(void);\nvoid app_set_ota_role_switch_initiator(bool is_initiate);\nvoid bes_ota_send_role_switch_req(void);\nvoid app_statistics_get_ota_pkt_in_role_switch(void);\nbool app_check_user_can_role_switch_in_ota(void);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/ibrt_ota/inc/ota_spp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_SPP_OTA_H__\n#define __APP_SPP_OTA_H__\n\n#include \"spp_api.h\"\n#include \"sdp_api.h\"\n#include \"ota_control.h\"\n\n#if defined(__3M_PACK__)\n#define L2CAP_MTU                           980\n#else\n#define L2CAP_MTU                           672\n#endif\n\n#define OTA_SPP_MAX_PACKET_SIZE     L2CAP_MTU\n#define OTA_SPP_MAX_PACKET_NUM      5\n\n#define OTA_SPP_RECV_BUFFER_SIZE   L2CAP_MTU\n\n#define OTA_SPP_TX_BUF_SIZE\t    (OTA_SPP_MAX_PACKET_SIZE*OTA_SPP_MAX_PACKET_NUM)\n\n#define APP_OTA_DATA_CMD_TIME_OUT_IN_MS\t5000\n\ntypedef struct {\n\tuint8_t otaSppTxBuf[OTA_SPP_TX_BUF_SIZE];\n\tuint8_t otaSppRxBuf[OTA_SPP_RECV_BUFFER_SIZE];\n\tbtif_sdp_record_t *ota_sdp_record;\n\tspp_service  *otaSppService;\n\tspp_device  *ota_spp_dev;\n\tbool permissionToApply;\n} OtaContext;\n\ntypedef void(*app_spp_ota_tx_done_t)(void);\nvoid app_spp_ota_register_tx_done(app_spp_ota_tx_done_t callback);\nvoid app_spp_ota_init(void);\nvoid app_ota_send_cmd_via_spp(uint8_t* ptrData, uint16_t length);\nvoid app_ota_send_data_via_spp(uint8_t* ptrData, uint32_t length);\n\nuint16_t app_spp_ota_tx_buf_size(void);\nvoid app_spp_ota_init_tx_buf(uint8_t* ptr);\nuint8_t* app_spp_ota_fill_data_into_tx_buf(uint8_t* ptrData, uint32_t dataLen);\nvoid ota_disconnect(void);\n\n\n#endif\n\n"
  },
  {
    "path": "services/ibrt_ui/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\n\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.cpp))\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nIBRT_LIB_NAME := libtws_ibrt\n\nifeq ($(ENHANCED_STACK),1)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_enhanced_stack\nendif\n\nifeq ($(BLE), 1)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_ble\nendif\n\nifeq ($(KERNEL),RTX)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_RTX\nendif\nifeq ($(KERNEL),RTX5)\nIBRT_LIB_NAME := $(IBRT_LIB_NAME)_RTX5\nendif\n\n$(IBRT_LIB_NAME)-y := $(src_obj)\n\nobj-y :=  $(IBRT_LIB_NAME).a\n\nsubdir-ccflags-y += \\\n    -Iservices/fs/fat \\\n    -Iservices/fs/sd \\\n    -Iservices/fs/fat/ChaN \\\n    -Iservices/overlay \\\n    -Iservices/nvrecord \\\n    -Iservices/resources \\\n    -Iservices/multimedia/audio/process/resample/include \\\n    $(BT_IF_INCLUDES) \\\n    -Iplatform/drivers/uarthci \\\n    -Iplatform/drivers/ana \\\n    -Iplatform/drivers/bt \\\n    -Iutils/cqueue \\\n    -Iutils/heap \\\n    -Iservices/audioflinger \\\n    -Iutils/lockcqueue \\\n    -Iutils/intersyshci \\\n    -Iapps/key \\\n    -Iapps/main \\\n    -Iapps/battery \\\n    -Iapps/common \\\n    -Iapps/audioplayers \\\n    -Iapps/audioplayers/a2dp_decoder \\\n    -Iapps/factory \\\n    -Iservices/ai_voice/manager \\\n    -Iservices/ble_stack/ble_ip \\\n    -Iservices/ble_stack/common/api \\\n    -Iservices/ble_stack/hl/api \\\n    -Iservices/ble_stack/hl/inc \\\n    -Iservices/ble_stack/ke/api \\\n    -Iservices/ble_app \\\n    -Iservices/ble_app/app_datapath \\\n    -Iservices/ble_app/app_tws \\\n    -Iservices/ble_app/app_main \\\n    $(BT_PROFILES_INCLUDES) \\\n    -Iservices/osif \\\n    -Iservices/nv_section/factory_section \\\n    -Iservices/nv_section/log_section \\\n    -Iservices/app_ibrt/inc \\\n    -Iservices/bt_app/a2dp_codecs/include \\\n    -Ithirdparty/audio_codec_lib/liblhdc-dec/inc \\\n    -Iservices/multimedia/audio/codec/sbc/inc \\\n    -Iservices/multimedia/audio/codec/sbc/src/inc \\\n    -Iutils/hwtimer_list \\\n    -Iservices/voicepath \\\n    -Iservices/app_tws/inc \\\n    -Iservices/app_ai/inc \\\n    -Iservices/ai_voice/protocol/gma/gma_crypto \\\n    -Iservices/ibrt_ota/inc\n\nifeq ($(IBRT),1)\nsubdir-ccflags-y += \\\n    -Iservices/ibrt_core/inc \\\n    -Iservices/ibrt_ui/inc \\\n    -Iservices/bt_app\nendif\n\n"
  },
  {
    "path": "services/ibrt_ui/inc/app_ibrt_ui.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TWS_IBRT_UI__\n#define __APP_TWS_IBRT_UI__\n#include \"app_tws_ibrt.h\"\n#include \"cmsis_os.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"app_tws_ibrt_cmd_handler.h\"\n\n#define SNOOP_INFO_DATA_HEADER                  0XE1D2C3B4\n#define SNOOP_INFO_DATA_HEADER_LENGTH           4\n#define SNOOP_INFO_DATA_LENGTH_MAX              512\n#define SNOOP_SCAN_WINDOW_IN_MS                 30\n#define SNOOP_SCAN_INTERVAL_IN_MS               60\n#define SNOOP_ADV_INTERVAL_IN_MS                20\n\n#define  IBRT_EVENT_Q_LENGTH                   (20)\n#define  MSS_RETRY_COUNTER_MAX                 (10)\n\n#define  IBRT_UI_STOP_IBRT                      1\n#define  IBRT_UI_CONNECT_EVT(evt)  ((evt == BTIF_BTEVENT_LINK_CONNECT_CNF)|| \\\n                                    (evt == BTIF_BTEVENT_LINK_CONNECT_IND)|| \\\n                                    (evt == BTIF_BTEVENT_ENCRYPTION_CHANGE))\n\n#define  IBRT_UI_DISCONNECT_EVT(evt)  (evt == BTIF_STACK_LINK_DISCONNECT_COMPLETE)\n#define  IBRT_UI_INVALID_RSSI                      (100)\n\n#define  IBRT_UI_MIN_RSSI                          (-100)\n#define  IBRT_UI_BLE_ADV_THRESHOLD                 (60000)//ms\n/*\n * IBRT UI event\n */\ntypedef  uint8_t   ibrt_controller_error_type;\n#define  IBRT_PEER_SM_RUNNING_TIMEOUT   (0)\n#define  IBRT_CONTROLLER_TWS_NO_03      (1)\n#define  IBRT_CONTROLLER_MOBILE_NO_03   (2)\n#define  IBRT_CONTROLLER_TWS_NO_05      (3)\n#define  IBRT_CONTROLLER_MOBILE_NO_05   (4)\n#define  IBRT_CONTROLLER_DEAD           (5)\n#define  IBRT_CONTROLLER_RX_SEQ_ERROR   (6)\n#define  IBRT_MOBILE_ENCRYP_ERROR       (7)\n#define  IBRT_TWS_BESAUD_CONNECT_ERROR  (8)\n\n/*\n * IBRT UI event\n */\n#define  IBRT_EVENT_TYPE_MASK           (0X7F)\n#define  IBRT_SKIP_FALSE_TRIGGER_MASK   (0x80)\ntypedef  uint8_t   ibrt_event_type;\n#define  IBRT_NONE_EVENT                (0)\n#define  IBRT_OPEN_BOX_EVENT            (1)\n#define  IBRT_FETCH_OUT_EVENT           (2)\n#define  IBRT_PUT_IN_EVENT              (3)\n#define  IBRT_CLOSE_BOX_EVENT           (4)\n\n#define  IBRT_WEAR_UP_EVENT             (5)\n#define  IBRT_WEAR_DOWN_EVENT           (6)\n\n#define  IBRT_RECONNECT_EVENT           (7)\n#define  IBRT_PHONE_CONNECT_EVENT       (8)\n#define  IBRT_TRANSFER_EVENT            (9)\n#define  IBRT_NEW_MOBILE_INCOMING_EVENT (10)\n\n//transfer event type\n#define  IBRT_PEER_OPEN_BOX_EVENT       (11)\n#define  IBRT_PEER_FETCH_OUT_EVENT      (12)\n#define  IBRT_PEER_WEAR_UP_EVENT        (13)\n#define  IBRT_PEER_RECONNECT_EVENT      (14)\n\n#define  IBRT_TWS_SWITCH_EVENT          (15)\n#define  IBRT_TWS_PAIRING_EVENT         (16)\n#define  IBRT_FREEMAN_PAIRING_EVENT     (17)\n#define  IBRT_CONNECT_SECOND_MOBILE_EVENT (18)\n#define  IBRT_DISCONNECT_MOBILE_TWS_EVENT (19)\n#define  IBRT_RX_SEQ_ERROR_RECOVER_EVENT  (20)\n#define  IBRT_PROFILE_DATA_UPDATE_EVENT   (21)\n#define  IBRT_TWS_CONNECT_SYNC_INFO_EVENT (22)\n#define  IBRT_CHOICE_MOIBLE_CONNECT_EVENT (23)\n\n#define  IBRT_IS_RECONNECT_EVENT(event)        ((event == IBRT_RECONNECT_EVENT) || (event == IBRT_PEER_RECONNECT_EVENT))\n#define  IBRT_RECONNECT_EVENT_TYPE(event)      ((event == IBRT_RECONNECT_EVENT) || (event == IBRT_PEER_RECONNECT_EVENT))\n#define  IBRT_CONNECT_MOBILE_EVENT(event)      ((event == IBRT_OPEN_BOX_EVENT)||(event == IBRT_FETCH_OUT_EVENT)|| \\\n                                                (event == IBRT_WEAR_UP_EVENT) ||(event == IBRT_PEER_OPEN_BOX_EVENT)|| \\\n                                                (event == IBRT_PEER_FETCH_OUT_EVENT) || (event == IBRT_PEER_WEAR_UP_EVENT) || \\\n                                                (event == IBRT_RECONNECT_EVENT))\n\n#define  IBRT_IS_TRANSFER_EVENT(event)         ((event == IBRT_PEER_OPEN_BOX_EVENT) || (event == IBRT_PEER_FETCH_OUT_EVENT) || \\\n                                                (event == IBRT_PEER_WEAR_UP_EVENT) || (event == IBRT_TRANSFER_EVENT))\n\n#define  IBRT_RECONNECT_EVENT_QUEUED()         (app_ibrt_ui_event_has_been_queued(IBRT_RECONNECT_EVENT) || app_ibrt_ui_event_has_been_queued(IBRT_PEER_RECONNECT_EVENT))\n#define  IBRT_TRANSFER_EVENT_FILTER(event)     (IBRT_IS_TRANSFER_EVENT(event) && app_ibrt_ui_event_has_been_queued(event))\n#define  IBRT_RECONNECT_EVENT_FILTER(event)    (IBRT_RECONNECT_EVENT_TYPE(event) && IBRT_RECONNECT_EVENT_QUEUED())\n\n#define  IBRT_UI_RADICAL_SAN_INTERVAL_BY_NV_ROLE   ((app_tws_ibrt_get_bt_ctrl_ctx()->nv_role) ? \\\n    app_ibrt_ui_get_ctx()->config.radical_scan_interval_nv_slave : \\\n    app_ibrt_ui_get_ctx()->config.radical_scan_interval_nv_master)\n\n#define  IBRT_BOTH_HEADSET_WEARED(p_ibrt_ui) ((p_ibrt_ui->box_state == IBRT_OUT_BOX_WEARED) && \\\n                                              (p_ibrt_ui->peer_tws_info.box_state == IBRT_OUT_BOX_WEARED) && \\\n                                              p_ibrt_ui->config.wear_updown_detect_supported)\n\ntypedef  uint8_t   ibrt_box_state;\n/*\n * BOX state\n */\n#define IBRT_BOX_UNKNOWN    (0)\n#define IBRT_IN_BOX_CLOSED  (1)\n#define IBRT_IN_BOX_OPEN    (2)\n#define IBRT_OUT_BOX        (3)\n#define IBRT_OUT_BOX_WEARED (4)\n/*\n * BOX connect state\n */\n#define IBRT_BOX_CONNECT_IDLE       (0)\n#define IBRT_BOX_CONNECT_MASTER     (1<<0)\n#define IBRT_BOX_CONNECT_SLAVE      (1<<1)\n\n//HCI opcode\n#define    IBRT_HCI_CREATE_CON_CMD_OPCODE       0x0405\n#define    IBRT_HCI_EXIT_SNIFF_MODE_CMD_OPCODE  0x0804\n#define    IBRT_HCI_SWITCH_ROLE_CMD_OPCODE      0x080B\n#define    IBRT_HCI_STOP_IBRT_OPCODE            0xFCA8\n#define    IBRT_HCI_START_IBRT_OPCODE           0xFCA3\n#define    IBRT_HCI_RESET_OPCODE                0x0C03\n#define    IBRT_HCI_DSIC_CON_CMD_OPCODE         0x0406\n#define    IBRT_HCI_SET_ENV_CMD_OPCODE          0xFC8E\n\ntypedef enum\n{\n    START_IBRT_TRIGGER_EXIT,\n    TWS_SWITCH_TRIGGER_EXIT,\n} ibrt_ui_exit_sniff_trigger_e;\n\ntypedef enum\n{\n    TWS_INIT_TRIGGER,\n    MOBILE_INIT_TRIGGER,\n    START_IBRT_TRIGGER,\n    EXCHANGE_PROFILE_TRIGGER,\n    SCO_CONNECTED_TRIGGER,\n    SCO_DISCONNECT_TRIGGER,\n    MOBILE_MSS_TRIGGER,\n    OTA_START_TRIGGER,\n    OTA_STOP_TRIGGER,\n    START_DUAL_MIC_RECORDING_TRIGGER,\n    STOP_DUAL_MIC_RECORDING_TRIGGER,\n} ibrt_ui_trigger_link_policy_e;\n\ntypedef enum\n{\n    IBRT_CONNECTE_TRIGGER,\n    IBRT_DISCONNECT_TRIGGER,\n    IBRT_RECONNECT_TWS_TRIGGER,\n    IBRT_RECONNECT_MOBILE_TRIGGER,\n    IBRT_CLOSE_SCAN_TIMER_TRIGGER,\n    IBRT_SEARCH_SLAVE_TRIGGER,\n    IBRT_MASTER_CON_SLAVE_TRIGGER,\n    IBRT_NV_SLAVE_CLOSE_PSCAN_TRIGGER,\n    IBRT_NV_SLAVE_REOPEN_PSCAN_TRIGGER,\n    IBRT_FREEMAN_PAIR_TRIGGER,\n    IBRT_CLOSE_BOX_TRIGGER,\n    IBRT_OPEN_BOX_TRIGGER,\n    IBRT_ENTER_PAIRING_MODE_TRIGGER,\n    IBRT_ROLE_CHANGE_TRIGGER,\n    IBRT_A2DP_PLAYING_TRIGGER,\n    IBRT_A2DP_SUSPEND_TRIGGER,\n    IBRT_SCO_PLAYING_TRIGGER,\n    IBRT_SCO_SUSPEND_TRIGGER,\n    IBRT_FASTPAIR_TRIGGER,\n    IBRT_CLOSE_ALL_SCAN,\n    IBRT_RESTORE_SCAN,\n    IBRT_TRIGGER_NUM,\n} ibrt_ui_trigger_scan_e;\n\ntypedef enum\n{\n    IBRT_PAIR_IDLE,\n    IBRT_PAIR_W4_TWS_DISCONNECTED,\n    IBRT_PAIR_W4_MOBILE_DISCONNECTED,\n    IBRT_PAIR_W4_TWS_CONNECTED,\n    IBRT_PAIR_W4_TWS_INFO_EXCHANGED,\n} ibrt_pairing_state_e;\n\ntypedef enum\n{\n    IBRT_PAIR_ACTION_IDLE,\n    IBRT_PAIR_ACTION_TWS_DISCONNECTED,\n    IBRT_PAIR_ACTION_MOBILE_DISCONNECTED,\n    IBRT_PAIR_ACTION_TWS_CONNECTED,\n    IBRT_PAIR_ACTION_TWS_INFO_EXCHANGED,\n} ibrt_pairing_action_e;\n\ntypedef enum\n{\n    IBRT_UI_IDLE,\n    IBRT_UI_IDLE_WAIT,\n    IBRT_UI_W4_TWS_CONNECTION,\n    IBRT_UI_W4_TWS_INFO_EXCHANGE_COMPLETE,\n    IBRT_UI_W4_MOBILE_CONNECTION,\n    IBRT_UI_W4_MOBILE_MSS_COMPLETE,\n    IBRT_UI_W4_SET_ENV_COMPLETE,\n    IBRT_UI_W4_MOBILE_ENTER_ACTIVE_MODE,\n    IBRT_UI_W4_START_IBRT_COMPLETE,\n    IBRT_UI_W4_IBRT_DATA_EXCHANGE_COMPLETE,\n    IBRT_UI_W4_TWS_SWITCH_COMPLETE,\n    IBRT_UI_W4_TWS_STOP_IBRT_COMPLETE,\n    IBRT_UI_W4_TWS_BT_MSS_COMPLETE,\n    IBRT_UI_W4_TWS_DISCONNECTED,\n    IBRT_UI_W4_MOBILE_DISCONNECTED,\n    IBRT_UI_W4_TWS_DISCONNECT_TO_IDLE,\n    IBRT_UI_W4_MOBILE_CONNECTION_TO_IDLE,\n    IBRT_UI_W4_NEW_MOBILE_INCOMING_RSP,\n    IBRT_UI_W4_BLE_CONNECTION,\n    IBRT_UI_W4_SNOOP_INFO_COMPLETE,\n    IBRT_UI_W4_PHONE_CONNECT_FAILED,\n    IBRT_UI_W4_TWS_SWITCH_PREPARE_COMPLETE,\n    IBRT_UI_W4_BOTH_ACTIVE,\n    //Add new state\n\n    IBRT_UI_W4_SM_STOP,\n    IBRT_UI_W4_END,\n    IBRT_UI_W4_UNKNOWN,\n} ibrt_ui_state_e;\n\n//Mapping to ibrt ui state\ntypedef enum\n{\n    IBRT_ACTION_IDLE,\n    IBRT_ACTION_IDLE_WAIT,\n    IBRT_ACTION_TWS_CONNECT,\n    IBRT_ACTION_INFO_EXCHANGE,\n    IBRT_ACTION_MOBILE_CONNECT,\n    IBRT_ACTION_MOBILE_MSS_COMPLETE,\n    IBRT_ACTION_SET_ENV_COMPLETE,\n    IBRT_ACTION_MOBILE_ENTER_ACTIVE_MODE,\n    IBRT_ACTION_START_IBRT,\n    IBRT_ACTION_DATA_EXCHANGE,\n    IBRT_ACTION_TWS_SWITCH,\n    IBRT_ACTION_STOP_IBRT,\n    IBRT_ACTION_TWS_BT_MSS_COMPLETE,\n    IBRT_ACTION_TWS_DISCONNECT,\n    IBRT_ACTION_MOBILE_DISCONNECT,  //14\n    IBRT_ACTION_TWS_DISCONNECT_TO_IDLE,\n    IBRT_ACTION_MOBILE_CONNECTION_TO_IDLE,\n    IBRT_ACTION_NEW_MOBILE_INCOMING_RSP,\n    IBRT_ACTION_BLE_CONNECTION,\n    IBRT_ACTION_SNOOP_INFO_COMPLETE,\n    IBRT_ACTION_PHONE_CONNECT_FAILED,\n    IBRT_ACTION_TWS_SWITCH_PREPARE_COMPLETE,\n    IBRT_ACTION_BOTH_ACTIVE,\n    //Add new action\n\n    IBRT_ACTION_SM_STOP,\n    IBRT_ACTION_END,\n} ibrt_action_e;\n\ntypedef struct\n{\n    uint8_t   num_hci_cmd_packets;\n    uint16_t  cmd_opcode;\n    uint8_t   param[1];\n} __attribute__ ((packed)) ibrt_cmd_comp_t;\n\ntypedef struct\n{\n    bool w4_set_env_complete;\n    bool w4_exit_sniff_complete;\n    bool w4_start_ibrt;\n} ibrt_start_ctrl_t;\n\ntypedef struct\n{\n    ibrt_action_e action;\n    ibrt_ui_state_e  state;\n} ibrt_act_state_t;\n\ntypedef enum\n{\n    IBRT_UI_NO_ERROR,\n    IBRT_UI_RSP_TIMEOUT,\n    IBRT_UI_NOT_ACCEPT,\n    IBRT_UI_CONNECT_FAILED,\n    IBRT_UI_STATUS_ERROR,\n    IBRT_UI_CONNECTION_TIMEOUT=0x08,\n    IBRT_UI_ACL_ALREADY_EXIST=0x0B,\n    IBRT_UI_CMD_DISALLOWED=0X0C,\n    IBRT_UI_LIMITED_RESOURCE =0x0D,\n    IBRT_UI_HOST_ACCEPT_TIMEOUT=0x10,\n    IBRT_UI_CONN_TERM_USER_REQ=0x13,\n    IBRT_UI_CONN_TERM_LOW_RESOURCES=0x14,\n    IBRT_UI_MOBILE_CONN_DISCONNECTED=0X2A,\n    IBRT_UI_TWS_CONN_DISCONNECTED=0X2B,\n    IBRT_UI_SNOOP_DISCONNECTED=0X2C,\n    IBRT_UI_CONNECTION_INCOMING=0x99,\n    IBRT_UI_EVT_STATUS_ERROR=0x9A,\n    IBRT_UI_TWS_CMD_SEND_FAILED=0X9B,\n    IBRT_UI_MOBILE_PAIR_CANCLED=0X9C,\n} ibrt_ui_error_e;\n\ntypedef enum\n{\n    IBRT_CONNECT_MOBILE_FAILED,\n    IBRT_MOBILE_DISCONNECTED,\n    IBRT_MOBILE_NV_EMPTY,\n    IBRT_TWS_PAIR_MODE_ENTER,\n    IBRT_FREEMAN_PAIR_MODE_ENTER,\n    IBRT_SCAN_TIMEOUT,\n    IBRT_MOBILE_CONNECTED,\n    IBRT_SNOOP_CONNECTED,\n    IBRT_CLOSE_BOX,\n    IBRT_USE_PEER_PAIRING_MODE,\n} trigger_pairing_mode_type_e;\n\ntypedef struct\n{\n    uint16_t battery_volt;\n    uint16_t  mobile_conhandle;\n    uint16_t  tws_conhandle;\n    rssi_t   raw_rssi;\n    int32_t mobile_diff_us;\n    int32_t tws_diff_us;\n    int8_t  cur_buf_size;\n} app_ui_rssi_battery_info_t;\n\ntypedef struct\n{\n    bt_bdaddr_t   mobile_addr;\n    bt_bdaddr_t   nv_mobile_addr;\n    ibrt_box_state box_state;\n    ibrt_role_e   ibrt_role;\n    uint8_t       running_event;\n    uint8_t       sco_acitve;\n    uint8_t       mobile_connected:1;//ibrt master should set this variable\n    uint8_t       ibrt_connected:1;//ibrt slave should set this variable\n    uint8_t       ibrt_sm_running:1;\n    uint8_t       connecting_mobile:1;\n    uint32_t      constate;\n    uint8_t       pairing_mode;\n    bool          need_peer_connect_mobile;\n} __attribute__((packed)) app_tws_info_t;\n\ntypedef struct\n{\n    ibrt_event_type ibrt_event_q[IBRT_EVENT_Q_LENGTH];\n    uint8_t         front;\n    uint8_t         rear;\n} ibrt_event_manager_t;\n\ntypedef struct\n{\n    bool freeman_enable;\n    bool freeman_dont_role_switch;\n    bool tws_use_same_addr;\n    bool wear_updown_tws_switch_enable;\n    bool slave_reconnect_enable;\n    bool enter_pairing_mode;\n    bool freeman_accept_mobile_new_pairing;\n    bool enter_pairing_on_empty_mobile_addr;\n    bool enter_pairing_on_reconnect_mobile_failed;\n    bool enter_pairing_on_reconnect_mobile_failed_once;\n    bool enter_pairing_on_mobile_disconnect;\n\n    bool check_plugin_excute_closedbox_event;\n    bool nv_slave_enter_pairing_on_mobile_disconnect;\n    bool nv_slave_enter_pairing_on_empty_mobile_addr;\n    bool disc_tws_before_reconnect_mobile;\n    bool snoop_via_ble_enable;\n    bool tws_switch_according_to_rssi_value;\n    bool disable_tws_switch;\n    bool disable_stop_ibrt;\n    bool lowlayer_monitor_enable;\n    bool delay_exit_sniff;\n    bool share_tws_info_done;\n    uint32_t delay_ms_exit_sniff;\n    bool mobile_incoming_filter_unpaired;\n    uint8_t rssi_threshold;\n    uint8_t role_switch_timer_threshold;\n    uint16_t close_box_event_wait_response_timeout;\n    uint16_t reconnect_wait_ready_timeout;\n    uint16_t reconnect_mobile_wait_ready_timeout;\n    uint16_t reconnect_tws_wait_ready_timeout;\n    uint16_t reconnect_mobile_wait_response_timeout;\n    uint16_t reconnect_ibrt_wait_response_timeout;\n    uint16_t nv_master_reconnect_tws_wait_response_timeout;\n    uint16_t nv_slave_reconnect_tws_wait_response_timeout;\n    uint32_t disable_bt_scan_timeout;\n    uint16_t open_reconnect_mobile_max_times;\n    uint16_t open_reconnect_tws_max_times;\n    uint16_t reconnect_mobile_max_times;\n    uint16_t reconnect_tws_max_times;\n    uint16_t reconnect_ibrt_max_times;\n    uint8_t  tws_reconnect_cycle;\n    uint8_t  mobile_reconnect_cycle;\n\n    uint16_t long_private_poll_interval ;\n    uint16_t default_private_poll_interval;\n    uint16_t short_private_poll_interval;\n\n    uint16_t default_private_poll_interval_in_sco;\n    uint16_t short_private_poll_interval_in_sco;\n    uint16_t default_bt_tpoll;\n\n    uint16_t tws_page_timeout_on_last_success;\n    uint16_t tws_page_timeout_on_last_failed;\n    uint16_t tws_page_timeout_on_reconnect_mobile_success;\n    uint16_t tws_page_timeout_on_reconnect_mobile_failed;\n\n    uint16_t mobile_page_timeout;\n    uint16_t tws_connection_timeout;\n    uint8_t  profile_concurrency_supported;\n    uint8_t  connect_new_mobile_enable;\n    uint16_t wait_time_before_disc_tws;\n    bt_bdaddr_t new_mobile_address;\n\n    uint32_t rx_seq_error_timeout;\n    uint32_t rx_seq_error_threshold;\n    uint32_t rx_seq_recover_wait_timeout;\n    uint32_t rssi_monitor_timeout;\n    bool     wear_updown_detect_supported;\n    uint32_t stop_ibrt_timeout;\n\n    uint16_t radical_scan_interval_nv_slave;\n    uint16_t radical_scan_interval_nv_master;\n    uint32_t event_hung_timeout;\n    uint16_t rssi_tws_switch_threshold;\n    uint32_t stop_ibrt_wait_time_after_tws_switch;\n    uint32_t tws_conn_failed_wait_time;\n    uint32_t sm_running_timeout;\n    uint32_t peer_sm_running_timeout;\n    uint32_t connect_no_03_timeout;\n    uint32_t disconnect_no_05_timeout;\n    uint32_t reconnect_peer_sm_running_timeout;\n\n    bool     tws_switch_tx_data_protect;\n    uint32_t tws_cmd_send_timeout;\n    uint32_t tws_cmd_send_counter_threshold;\n    uint32_t tws_switch_stable_timeout;\n    bool     invoke_event_when_box_closed;\n    bool     tws_stay_when_close_box;\n    uint32_t free_tws_timeout;\n    bool     filter_duplicate_event;\n\n    uint8_t audio_sync_mismatch_resume_version;\n} ibrt_ui_config_t;\n\ntypedef struct\n{\n    uint8_t         connection_index;\n    bool            connected;\n    bool            disconnect_enable;\n    bool            master_notify_enable;\n    bool            slave_scaning;\n    bt_bdaddr_t     box_ble_addr;\n    uint8_t         box_connect_state;\n    uint32_t        snoop_info_data_length;\n    uint8_t         data[SNOOP_INFO_DATA_LENGTH_MAX];\n} ibrt_ui_box_info_t;\n\ntypedef struct\n{\n    ibrt_pairing_state_e tws_pair_state;\n    ibrt_pairing_state_e freeman_pair_state;\n    bool tws_pairing;\n    bool freeman_pairing;\n} ibrt_pair_ctrl_t;\n\ntypedef struct\n{\n    ibrt_ui_state_e super_state;\n    ibrt_ui_state_e wait_state;\n    ibrt_ui_state_e sub_state;\n    ibrt_ui_state_e next_state;\n\n    ibrt_event_manager_t event_q_manager;\n    ibrt_event_type active_event;\n\n    ibrt_box_state  box_state;\n    ibrt_box_state  box_state_future;\n    uint8_t         ibrt_sm_running;\n    app_tws_info_t  peer_tws_info;\n\n    uint32_t        sm_start_timestamp_ms;\n\n    bool            profile_exchanged;\n    bool            tws_connect_success;\n    uint8_t         reconnect_mobile_counter;\n    uint8_t         reconnect_tws_counter;\n    uint8_t         reconnect_ibrt_counter;\n\n    ibrt_pair_ctrl_t pairing_ctrl;\n\n    /*custom page scan parameters*/\n    uint16_t        pscan_cust_interval;\n    uint16_t        pscan_cust_window;\n    uint8_t         pscan_cust_type;\n\n    /*search ui restore inqscan parameter when tws connected*/\n    bool            restore_iscan_para;\n    bool            audio_mute_enable;\n    bool            bonding_success;\n    bool            tws_pscan_enhanced_enable;\n    bool            encrypt_error_happened;\n    bool            silent_mode;\n    bool            need_peer_connect_mobile;\n    bool            refresh_pairing_enable;\n    bool            new_mobile_scan_enable;\n    /*for customer config*/\n    ibrt_ui_config_t config;\n\n    /*for box information*/\n    ibrt_ui_box_info_t ibrt_ui_box;\n} app_ibrt_ui_t;\n\ntypedef struct\n{\n    bt_bdaddr_t master_bdaddr;\n    bt_bdaddr_t slave_bdaddr;\n} ibrt_pairing_info_t;\n\ntypedef struct\n{\n    int32_t a2dp_volume;\n    int32_t hfp_volume;\n} ibrt_volume_info_t;\n\n\ntypedef struct\n{\n    bt_bdaddr_t   mobile_addr;\n    uint8_t       mobile_connected;\n    uint8_t       sco_status;\n} __attribute__((packed)) app_tws_start_ibrt_info_t;\n\ntypedef bool (*APP_IBRT_UI_TWS_SWITCH_HANDLER_IND)(void);\ntypedef void (*APP_IBRT_UI_RSSI_BATTERY_HANDLER_IND)(void);\ntypedef bool (*APP_IBRT_UI_CONNECT_MOBILE_HANDLER_IND)(void);\ntypedef void (*APP_IBRT_UI_CMD_COMPLETE_HANDLER_IND)(ibrt_cmd_comp_t *);\ntypedef void (*APP_IBRT_UI_PAIRING_MODE_HANDLER_IND)(trigger_pairing_mode_type_e trigger_type);\ntypedef void (*APP_IBRT_UI_VENDER_EVENT_HANDLER_IND)(uint8_t, uint8_t *, uint8_t);\ntypedef void (*APP_IBRT_UI_GLOBAL_HANDLER_IND)(ibrt_link_type_e, uint8_t, uint8_t);\ntypedef void (*APP_IBRT_UI_GLOBAL_EVENT_UPDATE_IND)(ibrt_event_type, \\\n        ibrt_ui_state_e, \\\n        ibrt_ui_state_e, \\\n        ibrt_action_e, \\\n        ibrt_ui_error_e);\ntypedef void (*APP_IBRT_UI_CONNECTED_HANDLER_IND)(bt_bdaddr_t *);\ntypedef void (*APP_IBRT_UI_PROFILE_STATE_CHANGE_IND)(uint32_t, uint8_t);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*\n * function declare\n */\nvoid app_ibrt_ui_init(void);\napp_ibrt_ui_t* app_ibrt_ui_get_ctx(void);\nvoid app_ibrt_ui_prepare_local_tws_info(app_tws_info_t *local_tws_info);\nint app_ibrt_ui_event_entry(ibrt_event_type event);\nbool app_ibrt_ui_execute_pending_event(void);\nvoid app_ibrt_ui_global_handler(ibrt_link_type_e link_type, uint8_t evt_type, uint8_t status);\nbool app_ibrt_ui_tws_switch_needed(bool ibrt_connected_now);\nbool app_ibrt_ui_ibrt_start_needed(void);\nbool app_ibrt_ui_ibrt_stop_needed(void);\nbool app_ibrt_ui_connect_mobile_needed(void);\nbool app_ibrt_ui_ibrt_connected(void);\nvoid app_ibrt_ui_reset_peer_tws_info(void);\nvoid app_ibrt_ui_vender_event_handler(uint8_t evt_type, uint8_t *buffer, uint8_t length);\nvoid app_ibrt_ui_cmd_status_callback(const void *para);\nvoid app_ibrt_ui_cmd_complete_callback(const void *para);\nvoid app_ibrt_ui_judge_ibrt_role(void);\nvoid app_ibrt_ui_reset_local_tws_info(void);\nvoid app_ibrt_ui_event_handler(ibrt_action_e action,ibrt_ui_error_e status);\nvoid app_ibrt_ui_subevent_handler(ibrt_ui_state_e action_state, ibrt_ui_error_e status);\nvoid app_ibrt_ui_fetch_out_event_handler(ibrt_action_e action,ibrt_ui_error_e status);\nvoid app_ibrt_ui_wear_up_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_wear_down_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_tws_switch_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_tws_connect_sync_info_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_new_mobile_incoming_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nuint16_t app_ibrt_ui_get_tws_page_timeout_value();\nvoid app_ibrt_ui_open_box_event_handler(ibrt_action_e action,ibrt_ui_error_e status);\nvoid app_ibrt_ui_put_in_box_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_close_box_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_free_link_handler(ibrt_action_e action, ibrt_ui_error_e status, bool force_free);\nbool app_ibrt_ui_peer_tws_sm_running(void);\nibrt_ui_state_e app_ibrt_ui_get_state_mapping_action(ibrt_action_e action);\nvoid app_ibrt_ui_event_response_timer_cb(void const *n);\nvoid app_ibrt_ui_dbg_state_timer_cb(void const *n);\nvoid app_ibrt_ui_event_error_handling_timer_cb(void const *current_evt);\nvoid app_ibrt_ui_disable_scan_timer_cb(void const *trigger_type);\nvoid app_ibrt_ui_peer_sm_running_error_handler_cb(void const *trigger_type);\nvoid app_ibrt_ui_disable_ble_timer_cb(void const *trigger_type);\nvoid app_ibrt_ui_check_rssi_battery_timer_cb(void const *current_evt);\nvoid app_ibrt_ui_common_sm(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_reconnect_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_connect_second_mobile_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_choice_mobile_connect_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_disconnect_mobile_tws_event_handler(ibrt_action_e action,ibrt_ui_error_e status);\nvoid app_ibrt_ui_profile_data_update_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_choice_connect_second_mobile(void);\nvoid app_ibrt_ui_choice_mobile_connect(uint8_t index);\nvoid app_ibrt_ui_perform_received_action(uint8_t *p_buff, uint16_t length);\nbool app_ibrt_ui_pagescan_enable_needed(ibrt_ui_trigger_scan_e trigger_type);\nbool app_ibrt_ui_inqscan_enable_needed(void);\nvoid app_ibrt_ui_judge_scan_type(ibrt_ui_trigger_scan_e trigger_type, ibrt_link_type_e link_type, uint8_t status);\nvoid app_ibrt_ui_judge_link_policy(ibrt_ui_trigger_link_policy_e trigger_type, btif_link_policy_t policy);\nvoid app_ibrt_ui_restart_event_handler(void);\nvoid app_ibrt_ui_tws_switch_callback(void);\nbool app_ibrt_ui_detect_sm_running_collision(void);\nbool app_ibrt_ui_set_env_needed(void);\nbool app_ibrt_ui_tws_bt_mss_needed(void);\nbool app_ibrt_ui_transfer_sm_needed(void);\nvoid app_ibrt_ui_profile_data_exchange(void);\nvoid app_ibrt_ui_tws_transfer_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_phone_connect_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nbool app_ibrt_ui_none_event_happen(void);\nbool app_ibrt_ui_none_event_happen(void);\nvoid app_ibrt_ui_none_event_handler(ibrt_action_e action, ibrt_ui_error_e status);\nvoid app_ibrt_ui_pairing_callback(const btif_event_t *event);\nbool app_ibrt_ui_delay_start_ibrt_needed(void);\nvoid app_ibrt_ui_action_state_mismatch_handler(ibrt_action_e action, ibrt_ui_error_e status);\nbool app_ibrt_ui_is_profile_exchanged(void);\nvoid app_ibrt_ui_set_profile_exchanged(void);\nvoid app_ibrt_ui_clear_profile_exchanged(void);\nbool app_ibrt_ui_get_freeman_enable(void);\nbool app_ibrt_ui_is_role_switch_allowed(void);\nbool app_ibrt_ui_get_nv_salve_enter_pairing_on_mobile_disconnect(void);\nbool app_ibrt_ui_get_nv_salve_enter_pairing_on_empty_mobile_addr(void);\nvoid app_ibrt_ui_set_tws_use_same_addr_enable(void);\nbool app_ibrt_ui_get_tws_use_same_addr_enable(void);\nvoid app_ibrt_ui_clear_tws_use_same_addr_enable(void);\nvoid app_ibrt_ui_set_freeman_enable(void);\nvoid app_ibrt_ui_clear_freeman_enable(void);\nbool app_ibrt_ui_can_tws_switch(void);\nbool app_ibrt_ui_tws_switch(void);\nbool app_ibrt_ui_get_share_tws_info_done(void);\nvoid app_ibrt_ui_set_share_tws_info_done(void);\nvoid app_ibrt_ui_clear_share_tws_info_done(void);\nbool app_ibrt_ui_get_slave_reconnect_enable(void);\nvoid app_ibrt_ui_set_slave_reconnect_enable(void);\nvoid app_ibrt_ui_clear_slave_reconnect_enable(void);\nvoid app_ibrt_ui_set_wear_updown_tws_switch_enable(void);\nvoid app_ibrt_ui_clear_wear_updown_tws_switch_enable(void);\nbool app_ibrt_ui_get_wear_updown_tws_switch_enable(void);\nvoid app_ibrt_ui_set_enter_pairing_mode(trigger_pairing_mode_type_e trigger_type);\nvoid app_ibrt_ui_recover_rx_seq_error_timer_cb(void const *n);\nbool app_ibrt_ui_get_enter_pairing_mode(void);\nvoid app_ibrt_ui_clear_enter_pairing_mode(trigger_pairing_mode_type_e trigger_type);\nvoid app_ibrt_ui_set_mobile_incoming_filter_unpaired(void);\nvoid app_ibrt_ui_clear_mobile_incoming_filter_unpaired(void);\nbool app_ibrt_ui_get_mobile_incoming_filter_unpaired(void);\nvoid app_ibrt_ui_customer_set_bdaddr(uint8_t *nv_master_addr, uint8_t *nv_slave_addr);\nbool app_ibrt_ui_is_tws_connecting(void);\nbool app_ibrt_ui_is_mobile_connecting(void);\nbool app_ibrt_ui_is_data_exchange_waiting(void);\nbool app_ibrt_ui_is_tws_switching(void);\nvoid app_ibrt_ui_register_connect_mobile_needed_ind(APP_IBRT_UI_CONNECT_MOBILE_HANDLER_IND handler);\nvoid app_ibrt_ui_register_global_handler_ind(APP_IBRT_UI_GLOBAL_HANDLER_IND handler);\nvoid app_ibrt_ui_register_global_event_update_ind(APP_IBRT_UI_GLOBAL_EVENT_UPDATE_IND handler);\nvoid app_ibrt_ui_register_pairing_mode_ind(APP_IBRT_UI_PAIRING_MODE_HANDLER_IND set_pairing_callback, APP_IBRT_UI_PAIRING_MODE_HANDLER_IND clear_pairing_callback);\nvoid app_ibrt_ui_register_cmd_complete_ind(APP_IBRT_UI_CMD_COMPLETE_HANDLER_IND cmd_complete_ind);\nvoid app_ibrt_ui_register_vender_event_update_ind(APP_IBRT_UI_VENDER_EVENT_HANDLER_IND handler);\nvoid app_ibrt_ui_register_profile_state_change_ind(APP_IBRT_UI_PROFILE_STATE_CHANGE_IND handler);\nvoid app_ibrt_ui_profile_state_change_ind(uint32_t profile,uint8_t connected);\nibrt_ui_error_e app_ibrt_ui_event_queue_insert(ibrt_event_type event);\nbool app_ibrt_ui_event_has_been_queued(ibrt_event_type event);\nibrt_ui_error_e app_ibrt_ui_event_queue_delete(ibrt_event_type *p_event);\nbool app_ibrt_ui_event_queue_empty(void);\nibrt_ui_error_e app_ibrt_ui_event_queue_get_front(ibrt_event_type *p_event);\nibrt_ui_error_e app_ibrt_ui_event_queue_get_rear(ibrt_event_type *p_event);\nvoid app_ibrt_ui_event_queue_init(void);\nbool app_ibrt_ui_enter_idle_wait_needed(ibrt_event_type event, ibrt_event_type peer_event);\nvoid app_ibrt_ui_event_update_entry(ibrt_event_type evt_type, \\\n                                    ibrt_ui_state_e old_state, \\\n                                    ibrt_ui_state_e new_state, \\\n                                    ibrt_action_e action, \\\n                                    ibrt_ui_error_e status);\nuint8_t app_ibrt_ui_get_reconnect_tws_max_times(void);\nuint8_t app_ibrt_ui_get_reconnect_mobile_max_times(void);\nbool app_ibrt_ui_tws_switch_according_rssi_needed(void);\nvoid app_ibrt_ui_update_feature_box_state(ibrt_event_type event);\nvoid app_ibrt_ui_start_ble_adv_broadcasting(uint8_t pairing_status);\nvoid app_ibrt_ui_stop_ble_adv_broadcasting(void);\nuint8_t is_sco_mode (void);\nvoid app_ibrt_ui_link_control_while_calling(void);\nbool btdrv_get_accept_new_mobile_enable(void);\nvoid app_ibrt_ui_reset_link_control_while_profile_exchanged(void);\nbool app_ibrt_ui_tws_reconnect_one_cycle_ended(uint8_t reconnect_counter);\nbool app_ibrt_ui_mobile_reconnect_one_cycle_ended(uint8_t reconnect_counter);\nbool app_ibrt_ui_wait_ibrt_connected(void);\nbool app_ibrt_ui_connect_mobile_event_pending(void);\nuint16_t app_ibrt_ui_get_reconnect_mobile_wait_time(void);\n\nvoid app_ibrt_ui_box_init(bt_bdaddr_t *box_ble_addr);\nbool app_ibrt_ui_get_snoop_via_ble_enable(void);\nvoid app_ibrt_ui_set_snoop_via_ble_enable(void);\nvoid app_ibrt_ui_clear_snoop_via_ble_enable(void);\nvoid app_ibrt_ui_set_ble_connect_index(uint8_t index);\nvoid app_ibrt_ui_set_box_ble_addr(bt_bdaddr_t *addr);\nbt_bdaddr_t *app_ibrt_ui_get_box_ble_addr(void);\nvoid app_ibrt_ui_set_master_notify_flag(bool notify_enable);\nvoid app_ibrt_ui_set_slave_scaning(bool scan_enable);\nbool app_ibrt_ui_is_slave_scaning(void);\nvoid app_ibrt_ui_set_box_connect_state(uint8_t box_connect_state, bool force_set);\nuint8_t app_ibrt_ui_clear_box_connect_state(uint8_t box_connect_state, bool force_clear);\nvoid app_ibrt_ui_set_disconnect_enable(bool disconnect_enable);\nuint8_t app_ibrt_ui_snoop_info_send_enable(void);\nvoid app_ibrt_ui_connect_box();\nvoid app_ibrt_ui_disconnect_box(void);\nuint32_t app_ibrt_ui_snoop_info_transport(uint8_t *buf, uint32_t len);\nvoid app_ibrt_ui_snoop_info_handler(uint8_t *buf, uint32_t len);\nvoid app_ibrt_ui_freeman_pairing_handler(ibrt_pairing_action_e action,  ibrt_ui_error_e status);\nvoid app_ibrt_ui_tws_pairing_handler(ibrt_pairing_action_e action,  ibrt_ui_error_e status);\nvoid app_ibrt_ui_clear_refresh_pairing_enable(void);\nbool app_ibrt_ui_get_refresh_pairing_enable(void);\nvoid app_ibrt_ui_set_refresh_pairing_enable(void);\nbool app_ibrt_ui_re_enter_pairing_mode_enable(void);\nvoid app_ibrt_ui_clear_peer_sm_running(void);\nvoid app_ibrt_ui_set_peer_sm_running(void);\nbool app_ibrt_ui_duplicate_event_can_filtered(ibrt_event_type t_event);\nbool app_ibrt_ui_is_box_closed(void);\nibrt_box_state app_ibrt_ui_get_box_state(void);\nvoid app_ibrt_ui_mobile_link_disconnect_error_handler(void);\nvoid app_ibrt_ui_tws_link_disconnect_error_handler(void);\nvoid app_ibrt_ui_start_reconnect_event(void);\nbool app_ibrt_ui_start_reconnect_event_needed(ibrt_action_e action, ibrt_ui_error_e status);\nbool app_ibrt_ui_get_audio_mute_enable(void);\nvoid app_ibrt_ui_set_audio_mute_enable(void);\nvoid app_ibrt_ui_clear_audio_mute_enable(void);\nvoid app_ibrt_ui_controller_error_handling(ibrt_controller_error_type error_type, bool reset_controler);\nvoid app_ibrt_ui_set_tws_connect_success_last(void);\nvoid app_ibrt_ui_host_error_handling(ibrt_controller_error_type error_type);\nvoid app_ibrt_ui_clear_tws_connect_success_last(void);\nbool app_ibrt_ui_get_tws_connect_success_last(void);\nvoid app_ibrt_ui_start_dbg_state_timer(void);\nvoid app_ibrt_ui_stop_dbg_state_timer(void);\nvoid app_ibrt_ui_controller_dbg_state_checker(void);\nvoid app_ibrt_ui_tws_cmd_send_fail_error_handler(app_tws_cmd_code_e cmd_code);\nvoid app_ibrt_ui_set_local_volume_info(uint8_t * p_buffer);\nvoid app_ibrt_ui_stop_ibrt_condition_checker(void);\nvoid app_ibrt_ui_stop_ibrt_timer_cb(void const *n);\nbool app_ibrt_ui_stop_ibrt_timer_condition_fullfilled(void);\nbool app_ibrt_if_is_audio_active(void);\nvoid app_ibrt_ui_mobile_link_connected_callback(bt_bdaddr_t * addr);\nvoid app_ibrt_ui_ibrt_link_connected_callback(bt_bdaddr_t * addr);\nvoid app_ibrt_ui_tws_link_connected_callback(bt_bdaddr_t * addr);\nvoid app_ibrt_ui_register_link_connected_ind(APP_IBRT_UI_CONNECTED_HANDLER_IND mobile_connected_ind,\n        APP_IBRT_UI_CONNECTED_HANDLER_IND ibrt_connected_ind,\n        APP_IBRT_UI_CONNECTED_HANDLER_IND tws_connected_ind);\nvoid app_ibrt_ui_send_user_action(uint8_t *p_buff, uint16_t length);\nvoid app_ibrt_ui_reboot_sdk(void);\nvoid app_ibrt_ui_tws_switch_stable_timer_cb(void const *n);\nvoid app_ibrt_ui_tws_switch_prepare_timer_cb(void const *n);\nvoid app_ibrt_ui_disconnect_ble(void);\nvoid app_ibrt_ui_register_tws_switch_needed_ind(APP_IBRT_UI_TWS_SWITCH_HANDLER_IND handler);\nvoid app_hci_vender_ibrt_disconnected_callback(bool stop_for_seq_error,uint8_t disc_reason);\nbool app_ibrt_ui_exit_mobile_sniff_mode_needed(ibrt_ui_exit_sniff_trigger_e exit_sniff_triiger);\nbool app_ibrt_ui_exit_tws_sniff_mode_needed(ibrt_ui_exit_sniff_trigger_e exit_sniff_triiger);\nvoid app_ibrt_ui_disconnect_tws_timer_cb(void const *n);\nvoid app_ibrt_ui_exit_sniff(ibrt_ui_exit_sniff_trigger_e exit_sniff_trigger);\n#ifdef __cplusplus\n}\n#endif\n#endif\n\n"
  },
  {
    "path": "services/interconnection/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)umm_malloc/*.c))\n\nifeq ($(INTERACTION),1)\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)green/*.cpp))\nendif\n\nifeq ($(INTERCONNECTION),1)\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)red/*.c))\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)red/*.cpp))\nendif\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nsubdir-ccflags-y += -Iplatform/drivers/ana \\\n\t\t\t\t\t-Iplatform/hal \\\n\t\t\t\t\t-Iservices/bluedroid/adapter/src \\\n\t\t\t\t\t-Iapps/key \\\n\t\t\t\t\t-Iservices/audio_process \\\n\t\t\t\t\t-Iservices/fs/fat \\\n\t\t\t\t\t-Iservices/fs/sd \\\n\t\t\t\t\t-Iservices/fs/fat/ChaN \\\n\t\t\t\t\t$(BT_PROFILES_INCLUDES) \\\n\t\t\t\t\t-Iservices/overlay \\\n\t\t\t\t\t-Iservices/nvrecord \\\n\t\t\t\t\t-Iservices/resources \\\n\t\t\t\t\t-Iplatform/drivers/uarthci \\\n\t\t\t\t\t-Iplatform/drivers/ana \\\n\t\t\t\t\t-Iplatform/drivers/bt \\\n\t\t\t\t\t-Iutils/cqueue \\\n\t\t\t\t\t-Iutils/retention_ram \\\n\t\t\t\t\t-Iservices/audioflinger \\\n\t\t\t\t\t-Iutils/lockcqueue \\\n\t\t\t\t\t-Iutils/intersyshci \\\n\t\t\t\t\t-Iapps/main \\\n\t\t\t\t\t-Iapps/common \\\n\t\t\t\t\t-Iapps/audioplayers \\\n\t\t\t\t\t-Iapps/factory \\\n\t\t\t\t\t-Iservices/voicepath/gsound/gsound_target/ \\\n\t\t\t\t\t-Iservices/ble_app \\\n\t\t\t\t\t-Iservices/ble_stack/ble_ip \\\n\t\t\t\t\t-Iservices/ble_stack/hl/api \\\n\t\t\t\t\t-Iservices/ble_stack/app/api/  \\\n\t\t\t\t\t-Iservices/ble_stack/common/api/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/inc/ \\\n\t\t\t\t\t-Iservices/ble_stack/ke/api \\\n\t\t\t\t\t-Iservices/bridge/ \\\n\t\t\t\t\t$(BT_IF_INCLUDES) \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/gapc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/gapm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/smpc/ \\\n\t\t\t\t\t-Iservices/ble_stack/ke/src/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/attc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/attm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/atts/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/gattc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/gattm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hci/api/ \\\n\t\t\t\t\t-Iservices/ble_stack/hci/src/ \\\n\t\t\t\t\t-Iservices/ble_stack/app/src/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/htpt/api/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/htpt/src/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/\t\\\n\t\t\t\t\t-Iservices/ble_app/app_main/ \\\n\t\t\t\t\t-Iservices/ble_app/app_htp/\t\\\n\t\t\t\t\t-Iservices/bt_app/ \\\n\t\t\t\t\t-Iservices/bt_app/a2dp_codecs/include \\\n\t\t\t\t\t-Iservices/ble_app/app_voice/app_smartvoice \\\n\t\t\t\t\t-Iservices/ble_profiles/voicepath/smartvoice \\\n\t\t\t\t\t-Iservices/interconnection/red \\\n\t\t\t\t\t-Iservices/interconnection/green \\\n\t\t\t\t\t-Iservices/interconnection/umm_malloc \\\n\t\t\t\t\t-Iservices/ota \\\n\t\t\t\t\t-Iservices/app_ibrt/inc \\\n\t\t\t\t\t-Iservices/ibrt_ui/inc \\\n\t\t\t\t\t-Iservices/ibrt_core/inc \\\n\t\t\t\t\t-Iservices/norflash_api \\\n\t\t\t\t\t-Iservices/multimedia/opus121/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/application/Pcm8kCvsd/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/codec/codecs/adpcm \\\n\t\t\t\t\t-Iservices/multimedia/speech/process/lc_mmse_ns/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/process/ns_and_ec/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/process/speech_2mic_ns2_denoise/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/process/dual_mic_denoise/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/process/audio_drc2/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/process/far_field_speech_enhancement/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/process/plc/include \\\n\t\t\t\t\t-Iservices/multimedia/speech/process/common/include \\\n\t\t\t\t\t-Iservices/voicepath \\\n\t\t\t\t\t-Iservices/nv_section/factory_section \\\n\t\t\t\t\t-Iservices/voicepath/smartvoice  \\\n\t\t\t\t\t-Iapps/battery   \\\n\t\t\t\t\t-Ithirdparty/userapi \\\n\t\t\t\t\t-Iutils/crc16 \\\n\t\t\t\t\t-Iutils/crc32 \\\n\t\t\t\t\t-Iutils/rsa2048\t\\\n\t\t\t\t\t-Iutils/sha256\t\\\n\t\t\t\t\t-Iutils/aes256 \\\n\t\t\t\t\t-Iutils/heap \\\n\t\t\t\t\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t\t\t\t\t-Iservices/norflash_api  \\\n\nifeq ($(VOICE_PROMPT),1)\nccflags-y += -DMEDIA_PLAYER_SUPPORT\nendif\t\t\t\t\n"
  },
  {
    "path": "services/interconnection/umm_malloc/dbglog.h",
    "content": "/* ----------------------------------------------------------------------------\n * dbglog.h - A set of macros that cleans up code that needs to produce debug\n *            or log information.\n *\n * Many embedded systems still put a premium on code space and therefore need\n * a way to conditionally compile in debug code. Yes, it can lead to code that\n * runs differently depending on whether the debug code is cmpiled in or not\n * but you need to be able to evaluate the tradeoff.\n *\n * See copyright notice in LICENSE.TXT\n * ----------------------------------------------------------------------------\n * NOTE WELL that this file may be included multiple times - this allows you\n * to set the trace level #define DBGLOG_LEVEL x\n *\n * To update which of the DBGLOG macros are compiled in, you must redefine the\n * DBGLOG_LEVEL macro and the inlcude the dbglog.h file again, like this:\n *\n * #undef  DBGLOG_LEVEL\n * #define DBGLOG_LEVEL 6\n * #include \"dbglog/dbglog.txt\"\n *\n * To handle multiple inclusion, we need to first undefine any macros we define\n * so that the compiler does not warn us that we are changing a macro.\n * ----------------------------------------------------------------------------\n * The DBGLOG_LEVEL and DBGLOG_FUNCTION should be defined BEFORE this\n * file is included or else the following defaults are used:\n *\n * #define DBGLOG_LEVEL    0\n * #define DBGLOG_FUNCTION printf\n * ----------------------------------------------------------------------------\n * There are macros to handle the following decreasing levels of detail:\n *\n * 6 = TRACE\n * 5 = DEBUG\n * 4 = CRITICAL\n * 3 = ERROR\n * 2 = WARNING\n * 1 = INFO\n * 0 = FORCE - The DBGLOG_FUNCTION is always compiled in and is called only when\n *              the first parameter to the macro is non-0\n * ----------------------------------------------------------------------------\n */\n#ifndef __DBGLOG_H__\n#define __DBGLOG_H__\n\n#include \"hal_trace.h\"\n\n#undef DBGLOG_TRACE\n#undef DBGLOG_DEBUG\n#undef DBGLOG_CRITICAL\n#undef DBGLOG_ERROR\n#undef DBGLOG_WARNING\n#undef DBGLOG_INFO\n#undef DBGLOG_FORCE\n\n#define DBGLOG_LEVEL 3\n\n#ifndef DBGLOG_LEVEL\n#  define DBGLOG_LEVEL 0\n#endif\n\n#ifndef DBGLOG_FUNCTION\n#  define DBGLOG_FUNCTION TRACE\n#endif\n\n/* ------------------------------------------------------------------------- */\n\n#if DBGLOG_LEVEL >= 6\n#  define DBGLOG_TRACE(num,format, ...) DBGLOG_FUNCTION(num,format, ## __VA_ARGS__)\n#else\n#  define DBGLOG_TRACE(format, ...)\n#endif\n\n#if DBGLOG_LEVEL >= 5\n#  define DBGLOG_DEBUG(num,format, ...) DBGLOG_FUNCTION(num,format, ## __VA_ARGS__)\n#else\n#  define DBGLOG_DEBUG(format, ...)\n#endif\n\n#if DBGLOG_LEVEL >= 4\n#  define DBGLOG_CRITICAL(num,format, ...) DBGLOG_FUNCTION(num,format, ## __VA_ARGS__)\n#else\n#  define DBGLOG_CRITICAL(format, ...)\n#endif\n\n#if DBGLOG_LEVEL >= 3\n#  define DBGLOG_ERROR(num,format, ...) DBGLOG_FUNCTION(num,format, ## __VA_ARGS__)\n#else\n#  define DBGLOG_ERROR(format, ...)\n#endif\n\n#if DBGLOG_LEVEL >= 2\n#  define DBGLOG_WARNING(num,format, ...) DBGLOG_FUNCTION(num,format, ## __VA_ARGS__)\n#else\n#  define DBGLOG_WARNING(format, ...)\n#endif\n\n#if DBGLOG_LEVEL >= 1\n#  define DBGLOG_INFO(num,format, ...) DBGLOG_FUNCTION(num,format, ## __VA_ARGS__)\n#else\n#  define DBGLOG_INFO(format, ...)\n#endif\n\n#endif"
  },
  {
    "path": "services/interconnection/umm_malloc/umm_malloc.c",
    "content": "#include \"umm_malloc.h\"\n#include \"cmsis_os.h\"\n#include \"dbglog.h\"\n#include \"stdint.h\"\n#include \n#include \n\n/* Use the default DBGLOG_LEVEL and DBGLOG_FUNCTION */\n\nunsigned char umm_heap_array[UMM_MALLOC_CFG_HEAP_SIZE];\n/* ------------------------------------------------------------------------- */\n\nUMM_H_ATTPACKPRE typedef struct umm_ptr_t {\n  unsigned short int next;\n  unsigned short int prev;\n} UMM_H_ATTPACKSUF umm_ptr;\n\nUMM_H_ATTPACKPRE typedef struct umm_block_t {\n  union {\n    umm_ptr used;\n  } header;\n  union {\n    umm_ptr free;\n    unsigned char data[4];\n  } body;\n} UMM_H_ATTPACKSUF umm_block;\n\n#define UMM_FREELIST_MASK (0x8000)\n#define UMM_BLOCKNO_MASK (0x7FFF)\n\n/* ------------------------------------------------------------------------- */\n\numm_block *umm_heap = NULL;\nunsigned short int umm_numblocks = 0;\n\n#define UMM_NUMBLOCKS (umm_numblocks)\n\n/* ------------------------------------------------------------------------ */\n\n#define UMM_BLOCK(b) (umm_heap[b])\n\n#define UMM_NBLOCK(b) (UMM_BLOCK(b).header.used.next)\n#define UMM_PBLOCK(b) (UMM_BLOCK(b).header.used.prev)\n#define UMM_NFREE(b) (UMM_BLOCK(b).body.free.next)\n#define UMM_PFREE(b) (UMM_BLOCK(b).body.free.prev)\n#define UMM_DATA(b) (UMM_BLOCK(b).body.data)\n\nstatic osMutexId umm_clock_mutex_id = NULL;\nosMutexDef(umm_clock_mutex);\n\n/* ------------------------------------------------------------------------ */\nvoid LOCK_UMM_CLOCK(void) {\n  if (osMutexWait(umm_clock_mutex_id, osWaitForever) != osOK)\n    DBGLOG_INFO(1, \"%s Error\", __func__);\n}\n\nvoid UNLOCK_UMM_CLOCK(void) {\n  if (osMutexRelease(umm_clock_mutex_id) != osOK)\n    DBGLOG_INFO(1, \"%s Error\", __func__);\n}\n\n/* ------------------------------------------------------------------------ */\n\nstatic void trace_umm_blocks_info(void) {\n  unsigned short int blockSize = 0;\n  unsigned short int cf = 0;\n\n  cf = UMM_NFREE(0);\n  blockSize = blockSize;\n  DBGLOG_INFO(1, \"fisrt free block %d\", cf);\n\n  while (cf) {\n    blockSize = (UMM_NBLOCK(cf) & UMM_BLOCKNO_MASK) - cf;\n\n    DBGLOG_INFO(2, \"Looking at block %6i size %6i\\n\", cf, blockSize);\n\n    cf = UMM_NFREE(cf);\n  }\n}\n\n/* ------------------------------------------------------------------------ */\n\nstatic unsigned short int umm_blocks(size_t size) {\n\n  /*\n   * The calculation of the block size is not too difficult, but there are\n   * a few little things that we need to be mindful of.\n   *\n   * When a block removed from the free list, the space used by the free\n   * pointers is available for data. That's what the first calculation\n   * of size is doing.\n   */\n\n  if (size <= (sizeof(((umm_block *)0)->body)))\n    return (1);\n\n  /*\n   * If it's for more than that, then we need to figure out the number of\n   * additional whole blocks the size of an umm_block are required.\n   */\n\n  size -= (1 + (sizeof(((umm_block *)0)->body)));\n\n  return (2 + size / (sizeof(umm_block)));\n}\n\n/* ------------------------------------------------------------------------ */\n/*\n * Split the block `c` into two blocks: `c` and `c + blocks`.\n *\n * - `new_freemask` should be `0` if `c + blocks` used, or `UMM_FREELIST_MASK`\n *   otherwise.\n *\n * Note that free pointers are NOT modified by this function.\n */\nstatic void umm_split_block(unsigned short int c, unsigned short int blocks,\n                            unsigned short int new_freemask) {\n\n  UMM_NBLOCK(c + blocks) = (UMM_NBLOCK(c) & UMM_BLOCKNO_MASK) | new_freemask;\n  UMM_PBLOCK(c + blocks) = c;\n\n  UMM_PBLOCK(UMM_NBLOCK(c) & UMM_BLOCKNO_MASK) = (c + blocks);\n  UMM_NBLOCK(c) = (c + blocks);\n}\n\n/* ------------------------------------------------------------------------ */\n\nstatic void umm_disconnect_from_free_list(unsigned short int c) {\n  /* Disconnect this block from the FREE list */\n\n  UMM_NFREE(UMM_PFREE(c)) = UMM_NFREE(c);\n  UMM_PFREE(UMM_NFREE(c)) = UMM_PFREE(c);\n\n  /* And clear the free block indicator */\n\n  UMM_NBLOCK(c) &= (~UMM_FREELIST_MASK);\n}\n\n/* ------------------------------------------------------------------------\n * The umm_assimilate_up() function assumes that UMM_NBLOCK(c) does NOT\n * have the UMM_FREELIST_MASK bit set!\n */\n\nstatic void umm_assimilate_up(unsigned short int c) {\n\n  if (UMM_NBLOCK(UMM_NBLOCK(c)) & UMM_FREELIST_MASK) {\n    /*\n     * The next block is a free block, so assimilate up and remove it from\n     * the free list\n     */\n\n    DBGLOG_DEBUG(2, \"%d Assimilate up to next block %d, which is FREE\\n\", c,\n                 UMM_NBLOCK(c));\n\n    /* Disconnect the next block from the FREE list */\n\n    umm_disconnect_from_free_list(UMM_NBLOCK(c));\n\n    /* Assimilate the next block with this one */\n\n    UMM_PBLOCK(UMM_NBLOCK(UMM_NBLOCK(c)) & UMM_BLOCKNO_MASK) = c;\n    UMM_NBLOCK(c) = UMM_NBLOCK(UMM_NBLOCK(c)) & UMM_BLOCKNO_MASK;\n  }\n}\n\n/* ------------------------------------------------------------------------\n * The umm_assimilate_down() function assumes that UMM_NBLOCK(c) does NOT\n * have the UMM_FREELIST_MASK bit set!\n */\n\nstatic unsigned short int umm_assimilate_down(unsigned short int c,\n                                              unsigned short int freemask) {\n\n  UMM_NBLOCK(UMM_PBLOCK(c)) = UMM_NBLOCK(c) | freemask;\n  UMM_PBLOCK(UMM_NBLOCK(c)) = UMM_PBLOCK(c);\n\n  return (UMM_PBLOCK(c));\n}\n\n/* ------------------------------------------------------------------------- */\n\nvoid umm_init(void) {\n  /* init heap pointer and size, and memset it to 0 */\n  umm_heap = (umm_block *)UMM_MALLOC_CFG_HEAP_ADDR;\n  umm_numblocks = (UMM_MALLOC_CFG_HEAP_SIZE / sizeof(umm_block));\n  DBGLOG_DEBUG(3, \"%s umm_heap %p blocks number %d\", __func__, umm_heap,\n               umm_numblocks);\n\n  if (umm_clock_mutex_id == NULL) {\n    umm_clock_mutex_id = osMutexCreate((osMutex(umm_clock_mutex)));\n  }\n\n  memset(umm_heap, 0x00, UMM_MALLOC_CFG_HEAP_SIZE);\n\n  /* setup initial blank heap structure */\n  {\n    /* index of the 0th `umm_block` */\n    const unsigned short int block_0th = 0;\n    /* index of the 1st `umm_block` */\n    const unsigned short int block_1th = 1;\n    /* index of the latest `umm_block` */\n    const unsigned short int block_last = UMM_NUMBLOCKS - 1;\n\n    /* setup the 0th `umm_block`, which just points to the 1st */\n    UMM_NBLOCK(block_0th) = block_1th;\n    UMM_NFREE(block_0th) = block_1th;\n    UMM_PFREE(block_0th) = block_1th;\n\n    /*\n     * Now, we need to set the whole heap space as a huge free block. We should\n     * not touch the 0th `umm_block`, since it's special: the 0th `umm_block`\n     * is the head of the free block list. It's a part of the heap invariant.\n     *\n     * See the detailed explanation at the beginning of the file.\n     */\n\n    /*\n     * 1th `umm_block` has pointers:\n     *\n     * - next `umm_block`: the latest one\n     * - prev `umm_block`: the 0th\n     *\n     * Plus, it's a free `umm_block`, so we need to apply `UMM_FREELIST_MASK`\n     *\n     * And it's the last free block, so the next free block is 0.\n     */\n    UMM_NBLOCK(block_1th) = block_last | UMM_FREELIST_MASK;\n    UMM_NFREE(block_1th) = 0;\n    UMM_PBLOCK(block_1th) = block_0th;\n    UMM_PFREE(block_1th) = block_0th;\n\n    /*\n     * latest `umm_block` has pointers:\n     *\n     * - next `umm_block`: 0 (meaning, there are no more `umm_blocks`)\n     * - prev `umm_block`: the 1st\n     *\n     * It's not a free block, so we don't touch NFREE / PFREE at all.\n     */\n    UMM_NBLOCK(block_last) = 0;\n    UMM_PBLOCK(block_last) = block_1th;\n  }\n}\n\n/* ------------------------------------------------------------------------ */\n\nvoid umm_free(void *ptr) {\n\n  unsigned short int c;\n\n  /* If we're being asked to free a NULL pointer, well that's just silly! */\n\n  if ((void *)0 == ptr) {\n    DBGLOG_DEBUG(0, \"free a null pointer -> do nothing\\n\");\n\n    return;\n  }\n\n  /*\n   * FIXME: At some point it might be a good idea to add a check to make sure\n   *        that the pointer we're being asked to free up is actually within\n   *        the umm_heap!\n   *\n   * NOTE:  See the new umm_info() function that you can use to see if a ptr is\n   *        on the free list!\n   */\n\n  /* Protect the critical section... */\n  UMM_CRITICAL_ENTRY();\n\n  /* Figure out which block we're in. Note the use of truncated division... */\n\n  c = (((char *)ptr) - (char *)(&(umm_heap[0]))) / sizeof(umm_block);\n\n  DBGLOG_DEBUG(2, \"Freeing block %6i %p\\n\", c, ptr);\n\n  /* Now let's assimilate this block with the next one if possible. */\n\n  umm_assimilate_up(c);\n\n  /* Then assimilate with the previous block if possible */\n\n  if (UMM_NBLOCK(UMM_PBLOCK(c)) & UMM_FREELIST_MASK) {\n\n    DBGLOG_DEBUG(1, \"Assimilate down to next block %d, which is FREE\\n\",\n                 UMM_PBLOCK(c));\n\n    c = umm_assimilate_down(c, UMM_FREELIST_MASK);\n  } else {\n    /*\n     * The previous block is not a free block, so add this one to the head\n     * of the free list\n     */\n\n    DBGLOG_DEBUG(0, \"Just add to head of free list\\n\");\n\n    UMM_PFREE(UMM_NFREE(0)) = c;\n    UMM_NFREE(c) = UMM_NFREE(0);\n    UMM_PFREE(c) = 0;\n    UMM_NFREE(0) = c;\n\n    UMM_NBLOCK(c) |= UMM_FREELIST_MASK;\n  }\n\n  /* Release the critical section... */\n  UMM_CRITICAL_EXIT();\n}\n\n/* ------------------------------------------------------------------------ */\n\nvoid *umm_malloc(size_t size) {\n  unsigned short int blocks;\n  unsigned short int blockSize = 0;\n\n  unsigned short int bestSize;\n  unsigned short int bestBlock;\n\n  unsigned short int cf;\n\n  if (umm_heap == NULL) {\n    umm_init();\n  }\n\n  /*\n   * the very first thing we do is figure out if we're being asked to allocate\n   * a size of 0 - and if we are we'll simply return a null pointer. if not\n   * then reduce the size by 1 byte so that the subsequent calculations on\n   * the number of blocks to allocate are easier...\n   */\n\n  if (0 == size) {\n    DBGLOG_DEBUG(0, \"malloc a block of 0 bytes -> do nothing\\n\");\n\n    return ((void *)NULL);\n  }\n\n  /* Protect the critical section... */\n  UMM_CRITICAL_ENTRY();\n\n  blocks = umm_blocks(size);\n\n  /*\n   * Now we can scan through the free list until we find a space that's big\n   * enough to hold the number of blocks we need.\n   *\n   * This part may be customized to be a best-fit, worst-fit, or first-fit\n   * algorithm\n   */\n\n  cf = UMM_NFREE(0);\n\n  bestBlock = UMM_NFREE(0);\n  bestSize = 0x7FFF;\n\n  while (cf) {\n    blockSize = (UMM_NBLOCK(cf) & UMM_BLOCKNO_MASK) - cf;\n\n    DBGLOG_DEBUG(2, \"Looking at block %6i size %6i\\n\", cf, blockSize);\n\n#if defined UMM_BEST_FIT\n    if ((blockSize >= blocks) && (blockSize < bestSize)) {\n      bestBlock = cf;\n      bestSize = blockSize;\n    }\n#elif defined UMM_FIRST_FIT\n    /* This is the first block that fits! */\n    if ((blockSize >= blocks))\n      break;\n#else\n#error \"No UMM_*_FIT is defined - check umm_malloc_cfg.h\"\n#endif\n\n    cf = UMM_NFREE(cf);\n  }\n\n  if (0x7FFF != bestSize) {\n    cf = bestBlock;\n    blockSize = bestSize;\n  }\n\n  if (UMM_NBLOCK(cf) & UMM_BLOCKNO_MASK && blockSize >= blocks) {\n    /*\n     * This is an existing block in the memory heap, we just need to split off\n     * what we need, unlink it from the free list and mark it as in use, and\n     * link the rest of the block back into the freelist as if it was a new\n     * block on the free list...\n     */\n\n    if (blockSize == blocks) {\n      /* It's an exact fit and we don't neet to split off a block. */\n      DBGLOG_DEBUG(2, \"Allocating %6i blocks starting at %6i - exact\\n\", blocks,\n                   cf);\n\n      /* Disconnect this block from the FREE list */\n\n      umm_disconnect_from_free_list(cf);\n\n    } else {\n      /* It's not an exact fit and we need to split off a block. */\n      DBGLOG_DEBUG(2, \"Allocating %6i blocks starting at %6i - existing\\n\",\n                   blocks, cf);\n\n      /*\n       * split current free block `cf` into two blocks. The first one will be\n       * returned to user, so it's not free, and the second one will be free.\n       */\n      umm_split_block(cf, blocks, UMM_FREELIST_MASK /*new block is free*/);\n\n      /*\n       * `umm_split_block()` does not update the free pointers (it affects\n       * only free flags), but effectively we've just moved beginning of the\n       * free block from `cf` to `cf + blocks`. So we have to adjust pointers\n       * to and from adjacent free blocks.\n       */\n\n      /* previous free block */\n      UMM_NFREE(UMM_PFREE(cf)) = cf + blocks;\n      UMM_PFREE(cf + blocks) = UMM_PFREE(cf);\n\n      /* next free block */\n      UMM_PFREE(UMM_NFREE(cf)) = cf + blocks;\n      UMM_NFREE(cf + blocks) = UMM_NFREE(cf);\n    }\n  } else {\n    /* Out of memory */\n\n    DBGLOG_DEBUG(1, \"Can't allocate %5i blocks\\n\", blocks);\n    trace_umm_blocks_info();\n\n    /* Release the critical section... */\n    UMM_CRITICAL_EXIT();\n\n    return ((void *)NULL);\n  }\n\n  /* Release the critical section... */\n  UMM_CRITICAL_EXIT();\n\n  return ((void *)&UMM_DATA(cf));\n}\n\n/* ------------------------------------------------------------------------ */\n\nvoid *umm_realloc(void *ptr, size_t size) {\n\n  unsigned short int blocks;\n  unsigned short int blockSize;\n  unsigned short int prevBlockSize = 0;\n  unsigned short int nextBlockSize = 0;\n\n  unsigned short int c;\n\n  size_t curSize;\n\n  if (umm_heap == NULL) {\n    umm_init();\n  }\n\n  /*\n   * This code looks after the case of a NULL value for ptr. The ANSI C\n   * standard says that if ptr is NULL and size is non-zero, then we've\n   * got to work the same a malloc(). If size is also 0, then our version\n   * of malloc() returns a NULL pointer, which is OK as far as the ANSI C\n   * standard is concerned.\n   */\n\n  if (((void *)NULL == ptr)) {\n    DBGLOG_DEBUG(0, \"realloc the NULL pointer - call malloc()\\n\");\n\n    return (umm_malloc(size));\n  }\n\n  /*\n   * Now we're sure that we have a non_NULL ptr, but we're not sure what\n   * we should do with it. If the size is 0, then the ANSI C standard says that\n   * we should operate the same as free.\n   */\n\n  if (0 == size) {\n    DBGLOG_DEBUG(0, \"realloc to 0 size, just free the block\\n\");\n\n    umm_free(ptr);\n\n    return ((void *)NULL);\n  }\n\n  /*\n   * Otherwise we need to actually do a reallocation. A naiive approach\n   * would be to malloc() a new block of the correct size, copy the old data\n   * to the new block, and then free the old block.\n   *\n   * While this will work, we end up doing a lot of possibly unnecessary\n   * copying. So first, let's figure out how many blocks we'll need.\n   */\n\n  blocks = umm_blocks(size);\n\n  /* Figure out which block we're in. Note the use of truncated division... */\n\n  c = (((char *)ptr) - (char *)(&(umm_heap[0]))) / sizeof(umm_block);\n\n  /* Figure out how big this block is ... the free bit is not set :-) */\n\n  blockSize = (UMM_NBLOCK(c) - c);\n\n  /* Figure out how many bytes are in this block */\n\n  curSize =\n      (blockSize * sizeof(umm_block)) - (sizeof(((umm_block *)0)->header));\n\n  /* Protect the critical section... */\n  UMM_CRITICAL_ENTRY();\n\n  /* Now figure out if the previous and/or next blocks are free as well as\n   * their sizes - this will help us to minimize special code later when we\n   * decide if it's possible to use the adjacent blocks.\n   *\n   * We set prevBlockSize and nextBlockSize to non-zero values ONLY if they\n   * are free!\n   */\n\n  if ((UMM_NBLOCK(UMM_NBLOCK(c)) & UMM_FREELIST_MASK)) {\n    nextBlockSize =\n        (UMM_NBLOCK(UMM_NBLOCK(c)) & UMM_BLOCKNO_MASK) - UMM_NBLOCK(c);\n  }\n\n  if ((UMM_NBLOCK(UMM_PBLOCK(c)) & UMM_FREELIST_MASK)) {\n    prevBlockSize = (c - UMM_PBLOCK(c));\n  }\n\n  DBGLOG_DEBUG(\n      4, \"realloc blocks %i blockSize %i nextBlockSize %i prevBlockSize %i\\n\",\n      blocks, blockSize, nextBlockSize, prevBlockSize);\n\n  /*\n   * Ok, now that we're here we know how many blocks we want and the current\n   * blockSize. The prevBlockSize and nextBlockSize are set and we can figure\n   * out the best strategy for the new allocation as follows:\n   *\n   * 1. If the new block is the same size or smaller than the current block do\n   *    nothing.\n   * 2. If the next block is free and adding it to the current block gives us\n   *    enough memory, assimilate the next block.\n   * 3. If the prev block is free and adding it to the current block gives us\n   *    enough memory, remove the previous block from the free list, assimilate\n   *    it, copy to the new block.\n   * 4. If the prev and next blocks are free and adding them to the current\n   *    block gives us enough memory, assimilate the next block, remove the\n   *    previous block from the free list, assimilate it, copy to the new block.\n   * 5. Otherwise try to allocate an entirely new block of memory. If the\n   *    allocation works free the old block and return the new pointer. If\n   *    the allocation fails, return NULL and leave the old block intact.\n   *\n   * All that's left to do is decide if the fit was exact or not. If the fit\n   * was not exact, then split the memory block so that we use only the\n   * requested number of blocks and add what's left to the free list.\n   */\n\n  if (blockSize >= blocks) {\n    DBGLOG_DEBUG(1, \"realloc the same or smaller size block - %i, do nothing\\n\",\n                 blocks);\n    /* This space intentionally left blank */\n  } else if ((blockSize + nextBlockSize) >= blocks) {\n    DBGLOG_DEBUG(1, \"realloc using next block - %i\\n\", blocks);\n    umm_assimilate_up(c);\n    blockSize += nextBlockSize;\n  } else if ((prevBlockSize + blockSize) >= blocks) {\n    DBGLOG_DEBUG(1, \"realloc using prev block - %i\\n\", blocks);\n    umm_disconnect_from_free_list(UMM_PBLOCK(c));\n    c = umm_assimilate_down(c, 0);\n    memmove((void *)&UMM_DATA(c), ptr, curSize);\n    ptr = (void *)&UMM_DATA(c);\n    blockSize += prevBlockSize;\n  } else if ((prevBlockSize + blockSize + nextBlockSize) >= blocks) {\n    DBGLOG_DEBUG(1, \"realloc using prev and next block - %i\\n\", blocks);\n    umm_assimilate_up(c);\n    umm_disconnect_from_free_list(UMM_PBLOCK(c));\n    c = umm_assimilate_down(c, 0);\n    memmove((void *)&UMM_DATA(c), ptr, curSize);\n    ptr = (void *)&UMM_DATA(c);\n    blockSize += (prevBlockSize + nextBlockSize);\n  } else {\n    DBGLOG_DEBUG(1, \"realloc a completely new block %i\\n\", blocks);\n    void *oldptr = ptr;\n    if ((ptr = umm_malloc(size))) {\n      DBGLOG_DEBUG(2,\n                   \"realloc %i to a bigger block %i, copy, and free the old\\n\",\n                   blockSize, blocks);\n      memcpy(ptr, oldptr, curSize);\n      umm_free(oldptr);\n    } else {\n      DBGLOG_DEBUG(2,\n                   \"realloc %i to a bigger block %i failed - return NULL and \"\n                   \"leave the old block!\\n\",\n                   blockSize, blocks);\n      /* This space intentionally left blnk */\n    }\n    blockSize = blocks;\n  }\n\n  /* Now all we need to do is figure out if the block fit exactly or if we\n   * need to split and free ...\n   */\n\n  if (blockSize > blocks) {\n    DBGLOG_DEBUG(2, \"split and free %i blocks from %i\\n\", blocks, blockSize);\n    umm_split_block(c, blocks, 0);\n    umm_free((void *)&UMM_DATA(c + blocks));\n  }\n\n  /* Release the critical section... */\n  UMM_CRITICAL_EXIT();\n\n  return (ptr);\n}\n\n/* ------------------------------------------------------------------------ */\n\nvoid *umm_calloc(size_t num, size_t item_size) {\n  void *ret;\n\n  ret = umm_malloc((size_t)(item_size * num));\n\n  if (ret)\n    memset(ret, 0x00, (size_t)(item_size * num));\n\n  return ret;\n}\n\n/* ------------------------------------------------------------------------ */\n"
  },
  {
    "path": "services/interconnection/umm_malloc/umm_malloc.h",
    "content": "#ifndef UMM_MALLOC_H\n#define UMM_MALLOC_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nextern unsigned char umm_heap_array[];\n\n#ifndef size_t\ntypedef unsigned int                size_t;\n#endif\n\n/* Start addresses and the size of the heap */\n#define UMM_MALLOC_CFG_HEAP_ADDR (umm_heap_array)\n#ifdef __DUAL_MIC_RECORDING__\n#define UMM_MALLOC_CFG_HEAP_SIZE (10 * 1024)\n#else\n#define UMM_MALLOC_CFG_HEAP_SIZE 0x1000 // 4K\n#endif\n/* A couple of macros to make packing structures less compiler dependent */\n\n#define UMM_H_ATTPACKPRE\n#define UMM_H_ATTPACKSUF __attribute__((__packed__))\n\n#define UMM_BEST_FIT\n#undef  UMM_FIRST_FIT\n\n/*\n * A couple of macros to make it easier to protect the memory allocator\n * in a multitasking system. You should set these macros up to use whatever\n * your system uses for this purpose. You can disable interrupts entirely, or\n * just disable task switching - it's up to you\n *\n * NOTE WELL that these macros MUST be allowed to nest, because umm_free() is\n * called from within umm_malloc()\n */\n\n#define UMM_CRITICAL_ENTRY()    LOCK_UMM_CLOCK()\n#define UMM_CRITICAL_EXIT()     UNLOCK_UMM_CLOCK()\n\n/* ------------------------------------------------------------------------ */\n\nvoid  umm_init( void );\nvoid *umm_malloc( size_t size );\nvoid *umm_calloc( size_t num, size_t size );\nvoid *umm_realloc( void *ptr, size_t size );\nvoid  umm_free( void *ptr );\n\n\n/* ------------------------------------------------------------------------ */\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* UMM_MALLOC_H */\n"
  },
  {
    "path": "services/lhdc_license/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.c))\n\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)src/*.cpp))\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nLHDC_LICENSE_LIB_NAME := lib_lhdc_license\n$(LHDC_LICENSE_LIB_NAME)-y := $(src_obj)\nobj-y += $(LHDC_LICENSE_LIB_NAME).a\n\nsubdir-ccflags-y += -Iplatform/drivers/ana \\\n\t\t\t\t\t-Iplatform/hal \\\n\t\t\t\t\t-Iservices/audioflinger \\\n\t\t\t\t\t-Iutils/lockcqueue \\\n\t\t\t\t\t-Iservices/bt_app/a2dp_codecs/include\\\n\t\t\t\t\t-Iservices/bt_if_enhanced/inc\n\t\t\t\t\t\n\n\n\n\t\t\t\t\t\n"
  },
  {
    "path": "services/multimedia/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nmmlib_obj :=\n\nmmlib_obj += algorithm/fft/src/\n\nmmlib_obj += audio/process/adp/src/\nmmlib_obj += audio/process/anc/src/\nmmlib_obj += audio/process/fir2iir/src/\nmmlib_obj += audio/process/common/src/\nmmlib_obj += audio/process/drc/src/\nmmlib_obj += audio/process/filters/src/\nmmlib_obj += audio/process/limiter/src/\nmmlib_obj += audio/process/resample/src/\nmmlib_obj += audio/process/integer_resampling/src/\nmmlib_obj += audio/process/floatlimiter/src/\nmmlib_obj += audio/process/adj_mc/src/\n\nifeq ($(FM_ENABLE),1)\nmmlib_obj += fm/\nendif\n\nifeq ($(A2DP_OPUS_ON),1)\n#mmlib_obj += opus121/src/\nendif\n\nifeq ($(BT_APP),1)\nmmlib_obj += audio/codec/sbc/src/\nendif\n\nifeq ($(A2DP_AAC_ON),1)\naac_obj :=\nifeq ($(FDKAAC_VERSION),2)\naac_obj += audio/codec/fdkaac_codec_2_0_1/libAACdec/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libAACenc/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libFDK/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libMpegTPDec/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libMpegTPEnc/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libPCMutils/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libSBRdec/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libSBRenc/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libSACdec/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libSACenc/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libDRCdec/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libArithCoding/src/\naac_obj += audio/codec/fdkaac_codec_2_0_1/libSYS/src/\nelse\naac_obj += audio/codec/fdkaac_codec/libAACdec/src/\naac_obj += audio/codec/fdkaac_codec/libAACenc/src/\naac_obj += audio/codec/fdkaac_codec/libFDK/src/\naac_obj += audio/codec/fdkaac_codec/libMpegTPDec/src/\naac_obj += audio/codec/fdkaac_codec/libMpegTPEnc/src/\naac_obj += audio/codec/fdkaac_codec/libPCMutils/src/\naac_obj += audio/codec/fdkaac_codec/libSBRdec/src/\naac_obj += audio/codec/fdkaac_codec/libSBRenc/src/\naac_obj += audio/codec/fdkaac_codec/libSYS/src/\nendif\nifeq ($(A2DP_CP_ACCEL),1)\nfdkaac_codec-y := $(aac_obj)\nmmlib_obj += fdkaac_codec.o\nelse\nmmlib_obj += $(aac_obj)\nendif\nifeq ($(ROM_UTILS_ON),1)\nsubdir-ccflags-y += -DFDK_FUNC_ATTR=WEAK\nelse\nsubdir-ccflags-y += -DFDK_FUNC_ATTR=\nendif\nendif\n\n#mmlib_obj += rbcodec/src/\n\nifeq ($(SPEECH_LIB),1)\nmmlib_obj += speech/src/\nendif\n\nMULTIMEDIA_LIB_NAME := $(CHIP)_libmultimedia\n\nifeq ($(ROM_UTILS_ON),1)\nMULTIMEDIA_LIB_NAME := $(MULTIMEDIA_LIB_NAME)_romaac\nendif\n\nifeq ($(A2DP_CP_ACCEL),1)\nMULTIMEDIA_LIB_NAME := $(MULTIMEDIA_LIB_NAME)_cp\nendif\n\nifeq ($(ANC_APP),1)\nMULTIMEDIA_LIB_NAME := $(MULTIMEDIA_LIB_NAME)_anc\nendif\n\n$(MULTIMEDIA_LIB_NAME)-y := $(mmlib_obj)\n\nrel_src_obj :=\nrel_src_obj += audio/process/anc/cfg/\nrel_src_obj += audio/process/filters/cfg/\nrel_src_obj += audio/process/resample/coef/\n\nobj-y := $(MULTIMEDIA_LIB_NAME).a $(rel_src_obj)\n\nsubdir-ccflags-y += \\\n\t-Iutils/heap \\\n\n\t"
  },
  {
    "path": "services/multimedia/algorithm/fft/include/fft128dot.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef FFTR4_FXP_H\n#define FFTR4_FXP_H\n\n#define FFTR4_TWIDDLE_WIDTH 16\n#define FFTR4_DATA_WIDTH    16\n#define FFTR4_SCALE          6\n\n/* Q1.15 */\n#define FFTR4_INPUT_FORMAT_X   1\n#define FFTR4_INPUT_FORMAT_Y   15\n#define FFTR4_INPUT_FORMAT     (FFTR4_INPUT_FORMAT_X+FFTR4_INPUT_FORMAT_Y)\n\n/* Q1.15 */\n#define FFTR4_OUTPUT_FORMAT_X   1\n#define FFTR4_OUTPUT_FORMAT_Y   15\n#define FFTR4_OUTPUT_FORMAT     (FFTR4_OUTPUT_FORMAT_X+FFTR4_OUTPUT_FORMAT_Y)\n\ntypedef struct {\n\tint re;\n\tint im;\n} FftData_t;\n\ntypedef struct {\n\tint re;\n\tint im;\n} FftTwiddle_t;\n\ntypedef enum \n{\n    FFT_MODE = 0,\n    IFFT_MODE\n}FftMode_t;\n\nvoid make_symmetric_twiddles(FftTwiddle_t w[], int N, int width);\nvoid fftr4(int N, FftData_t x[], FftTwiddle_t w[], int twiddleWidth, int dataWidth, FftMode_t ifft);\nvoid dibit_reverse_array(FftData_t *vector);\nvoid dibit_reverse_array(FftData_t *vector);\nunsigned int dibit_reverse_int(unsigned int x, unsigned int N);\nFftData_t sat(FftData_t x, int width);\n#endif\n"
  },
  {
    "path": "services/multimedia/algorithm/fft/include/fftr4_fxp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef FFTR4_FXP_H\n#define FFTR4_FXP_H\n\n#define FFTR4_TWIDDLE_WIDTH 16\n#define FFTR4_DATA_WIDTH    16\n#define FFTR4_SCALE          6\n\n/* Q1.15 */\n#define FFTR4_INPUT_FORMAT_X   1\n#define FFTR4_INPUT_FORMAT_Y   15\n#define FFTR4_INPUT_FORMAT     (FFTR4_INPUT_FORMAT_X+FFTR4_INPUT_FORMAT_Y)\n\n/* Q1.15 */\n#define FFTR4_OUTPUT_FORMAT_X   1\n#define FFTR4_OUTPUT_FORMAT_Y   15\n#define FFTR4_OUTPUT_FORMAT     (FFTR4_OUTPUT_FORMAT_X+FFTR4_OUTPUT_FORMAT_Y)\n\ntypedef struct {\n\tint re;\n\tint im;\n} FftData_t;\n\ntypedef struct {\n\tint re;\n\tint im;\n} FftTwiddle_t;\n\ntypedef enum \n{\n    FFT_MODE = 0,\n    IFFT_MODE\n}FftMode_t;\n\nvoid make_symmetric_twiddles(FftTwiddle_t w[], int N, int width);\nvoid fftr4(int N, FftData_t x[], FftTwiddle_t w[], int twiddleWidth, int dataWidth, FftMode_t ifft);\nvoid dibit_reverse_array(FftData_t *vector);\n//void dibit_reverse_array(FftData_t *vector);\nunsigned int dibit_reverse_int(unsigned int x, unsigned int N);\n\n#endif"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/ChangeLog",
    "content": "0.1.6\n - Lots of minor assorted crash/fuzz fixes, mostly for the decoder but\n   also some for the encoder\n\n0.1.5\n - Updated upstream sources\n - Fixed building with GCC 3.3 and 3.4\n - Fixed building with GCC 6\n - AArch64 optimizations\n - Makefiles for building with MSVC\n - Support building the code in C++11 mode\n\n0.1.4\n - Updated upstream sources, with minor changes to the decoder API\n   breaking the ABI. (Calling code using AUDIO_CHANNEL_TYPE may need to\n   be updated. A new option AAC_PCM_LIMITER_ENABLE has been added, enabled\n   by default, which incurs extra decoding delay.)\n - PowerPC optimizations, fixes for building on AIX\n - Support for reading streamed wav files in the encoder example\n - Fix VBR encoding of sample rates over 64 kHz\n\n0.1.3\n - Updated upstream sources, with a number of crash fixes and new features\n   (including support for encoding 7.1)\n\n0.1.2\n - Fix a few more crashes\n - Include dependency libs (such as -lm) in the pkg-config file\n\n0.1.1\n - Updated to a new upstream version from Android 4.2, fixing a lot of crashes\n - Cleanup of autotools usage\n - Make sure the shared library links to libm if necessary\n - Performance improvements on x86\n - Added support for WG4/DVD audio channel mappings\n - Minimized the differences to upstream\n - Added an example encoder tool\n\n0.1.0\n - Initial release of fdk-aac\n - autotools based build system\n - Enable setting VBR bitrate modes\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/NOTICE",
    "content": "Software License for Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n© Copyright  1995 - 2012 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.\n  All rights reserved.\n\n1.    INTRODUCTION\nThird-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/README",
    "content": "NOTICE: \nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android is modifyed by BES at 2018.08.22.\nThe base version about FDK AAC is e45ae429b9ca8f234eb861338a75b2d89cde206a\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libAACdec/include/aacdecoder_lib.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2015 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/*****************************  MPEG-4 AAC Decoder  **************************\n\n   Author(s):   Manuel Jander\n\n******************************************************************************/\n\n/**\n * \\file   aacdecoder_lib.h\n * \\brief  FDK AAC decoder library interface header file.\n *\n\n\\page INTRO Introduction\n\n\\section SCOPE Scope\n\nThis document describes the high-level interface and usage of the ISO/MPEG-2/4 AAC Decoder\nlibrary developed by the Fraunhofer Institute for Integrated Circuits (IIS).\nDepending on the library configuration, it implements decoding of AAC-LC (Low-Complexity),\nHE-AAC (High-Efficiency AAC, v1 and v2), AAC-LD (Low-Delay) and AAC-ELD (Enhanced Low-Delay).\n\nAll references to SBR (Spectral Band Replication) are only applicable to HE-AAC and AAC-ELD\nversions of the library. All references to PS (Parametric Stereo) are only applicable to\nHE-AAC v2 versions of the library.\n\n\\section DecoderBasics Decoder Basics\n\nThis document can only give a rough overview about the ISO/MPEG-2 and ISO/MPEG-4 AAC audio\ncoding standard. To understand all the terms in this document, you are encouraged to read\nthe following documents.\n\n- ISO/IEC 13818-7 (MPEG-2 AAC), which defines the syntax of MPEG-2 AAC audio bitstreams.\n- ISO/IEC 14496-3 (MPEG-4 AAC, subpart 1 and 4), which defines the syntax of MPEG-4 AAC audio bitstreams.\n- Lutzky, Schuller, Gayer, Krämer, Wabnik, \"A guideline to audio codec delay\", 116th AES Convention, May 8, 2004\n\nMPEG Advanced Audio Coding is based on a time-to-frequency mapping of the signal. The signal\nis partitioned into overlapping portions and transformed into frequency domain. The spectral\ncomponents are then quantized and coded.\\n\nAn MPEG2 or MPEG4 AAC audio bitstream is composed of frames. Contrary to MPEG-1/2 Layer-3 (mp3),\nthe length of individual frames is not restricted to a fixed number of bytes, but can take on\nany length between 1 and 768 bytes.\n\n\n\\page LIBUSE Library Usage\n\n\\section InterfaceDescritpion API Description\n\nAll API header files are located in the folder /include of the release package. They are described in\ndetail in this document. All header files are provided for usage in C/C++ programs. The AAC decoder library\nAPI functions are located at aacdecoder_lib.h.\n\nIn binary releases the decoder core resides in statically linkable libraries called for example libAACdec.a,\n(Linux) or FDK_aacDec_lib (Microsoft Visual C++).\n\n\\section Calling_Sequence Calling Sequence\n\nFor decoding of ISO/MPEG-2/4 AAC or HE-AAC v2 bitstreams the following sequence is mandatory. Input read\nand output write functions as well as the corresponding open and close functions are left out, since they\nmay be implemented differently according to the user's specific requirements. The example implementation in\nmain.cpp uses file-based input/output, and in such case call mpegFileRead_Open() to open an input file and\nto allocate memory for the required structures, and the corresponding mpegFileRead_Close() to close opened\nfiles and to de-allocate associated structures. mpegFileRead_Open() tries to detect the bitstream format and\nin case of MPEG-4 file format or Raw Packets file format (a Fraunhofer IIS proprietary format) reads the Audio\nSpecific Config data (ASC). An unsuccessful attempt to recognize the bitstream format requires the user to\nprovide this information manually. For any other bitstream formats that are usually applicable in streaming\napplications, the decoder itself will try to synchronize and parse the given bitstream fragment using the\nFDK transport library. Hence, for streaming applications (without file access) this step is not necessary.\n\n-# Call aacDecoder_Open() to open and retrieve a handle to a new AAC decoder instance.\n\\dontinclude main.cpp\n\\skipline aacDecoder_Open\n-# If out-of-band config data (Audio Specific Config (ASC) or Stream Mux Config (SMC)) is available, call\naacDecoder_ConfigRaw() to pass it to the decoder and before the decoding process starts. If this data is\nnot available in advance, the decoder will get it from the bitstream  and configure itself while decoding\nwith aacDecoder_DecodeFrame().\n-# Begin decoding loop.\n\\skipline do {\n-# Read data from bitstream file or stream into a client-supplied input buffer (\"inBuffer\" in main.cpp).\nIf it is very small like just 4, aacDecoder_DecodeFrame() will\nrepeatedly return ::AAC_DEC_NOT_ENOUGH_BITS until enough bits were fed by aacDecoder_Fill(). Only read data\nwhen this buffer has completely been processed and is then empty. For file-based input execute\nmpegFileRead_Read() or any other implementation with similar functionality.\n-# Call aacDecoder_Fill() to fill the decoder's internal bitstream input buffer with the client-supplied\nexternal bitstream input buffer.\n\\skipline aacDecoder_Fill\n-# Call aacDecoder_DecodeFrame() which writes decoded PCM audio data to a client-supplied buffer. It is the\nclient's responsibility to allocate a buffer which is large enough to hold this output data.\n\\skipline aacDecoder_DecodeFrame\nIf the bitstream's configuration (number of channels, sample rate, frame size) is not known in advance, you may\ncall aacDecoder_GetStreamInfo() to retrieve a structure containing this information and then initialize an audio\noutput device. In the example main.cpp, if the number of channels or the sample rate has changed since program\nstart or since the previously decoded frame, the audio output device will be re-initialized. If WAVE file output\nis chosen, a new WAVE file for each new configuration will be created.\n\\skipline aacDecoder_GetStreamInfo\n-# Repeat steps 5 to 7 until no data to decode is available anymore, or if an error occured.\n\\skipline } while\n-# Call aacDecoder_Close() to de-allocate all AAC decoder and transport layer structures.\n\\skipline aacDecoder_Close\n\n\\section BufferSystem Buffer System\n\nThere are three main buffers in an AAC decoder application. One external input buffer to hold bitstream\ndata from file I/O or elsewhere, one decoder-internal input buffer, and one to hold the decoded output\nPCM sample data, whereas this output buffer may overlap with the external input buffer.\n\nThe external input buffer is set in the example framework main.cpp and its size is defined by ::IN_BUF_SIZE.\nYou may freely choose different sizes here. To feed the data to the decoder-internal input buffer, use the\nfunction aacDecoder_Fill(). This function returns important information about how many bytes in the\nexternal input buffer have not yet been copied into the internal input buffer (variable bytesValid).\nOnce the external buffer has been fully copied, it can be re-filled again.\nIn case you want to re-fill it when there are still unprocessed bytes (bytesValid is unequal 0), you\nwould have to additionally perform a memcpy(), so that just means unnecessary computational overhead\nand therefore we recommend to re-fill the buffer only when bytesValid is 0.\n\n\\image latex dec_buffer.png \"Lifecycle of the external input buffer\" width=9cm\n\nThe size of the decoder-internal input buffer is set in tpdec_lib.h (see define ::TRANSPORTDEC_INBUF_SIZE).\nYou may choose a smaller size under the following considerations:\n\n- each input channel requires 768 bytes\n- the whole buffer must be of size 2^n\n\nSo for example a stereo decoder:\n\n\\f[\nTRANSPORTDEC\\_INBUF\\_SIZE = 2 * 768 = 1536 => 2048\n\\f]\n\ntpdec_lib.h and TRANSPORTDEC_INBUF_SIZE are not part of the decoder's library interface. Therefore\nonly source-code clients may change this setting. If you received a library release, please ask us and\nwe can change this in order to meet your memory requirements.\n\n\\page OutputFormat Decoder audio output\n\n\\section OutputFormatObtaining Obtaining channel mapping information\n\nThe decoded audio output format is indicated by a set of variables of the CStreamInfo structure.\nWhile the members sampleRate, frameSize and numChannels might be quite self explaining,\npChannelType and pChannelIndices might require some more detailed explanation.\n\nThese two arrays indicate what is each output channel supposed to be. Both array have\nCStreamInfo::numChannels cells. Each cell of pChannelType indicates the channel type, described in\nthe enum ::AUDIO_CHANNEL_TYPE defined in FDK_audio.h. The cells of pChannelIndices indicate the sub index\namong the channels starting with 0 among all channels of the same audio channel type.\n\nThe indexing scheme is the same as for MPEG-2/4. Thus indices are counted upwards starting from the front\ndirection (thus a center channel if any, will always be index 0). Then the indices count up, starting always\nwith the left side, pairwise from front toward back. For detailed explanation, please refer to\nISO/IEC 13818-7:2005(E), chapter 8.5.3.2.\n\nIn case a Program Config is included in the audio configuration, the channel mapping described within\nit will be adopted.\n\nIn case of MPEG-D Surround the channel mapping will follow the same criteria described in ISO/IEC 13818-7:2005(E),\nbut adding corresponding top channels to the channel types front, side and back, in order to avoid any\nloss of information.\n\n\\section OutputFormatChange Changing the audio output format\n\nThe channel interleaving scheme and the actual channel order can be changed at runtime through the\nparameters ::AAC_PCM_OUTPUT_INTERLEAVED and ::AAC_PCM_OUTPUT_CHANNEL_MAPPING. See the description of those\nparameters and the decoder library function aacDecoder_SetParam() for more detail.\n\n\\section OutputFormatExample Channel mapping examples\n\nThe following examples illustrate the location of individual audio samples in the audio buffer that\nis passed to aacDecoder_DecodeFrame() and the expected data in the CStreamInfo structure which can be obtained\nby calling aacDecoder_GetStreamInfo().\n\n\\subsection ExamplesStereo Stereo\n\nIn case of ::AAC_PCM_OUTPUT_INTERLEAVED set to 0 and ::AAC_PCM_OUTPUT_CHANNEL_MAPPING set to 1,\na AAC-LC bit stream which has channelConfiguration = 2 in its audio specific config would lead\nto the following values in CStreamInfo:\n\nCStreamInfo::numChannels = 2\n\nCStreamInfo::pChannelType = { ::ACT_FRONT, ::ACT_FRONT }\n\nCStreamInfo::pChannelIndices = { 0, 1 }\n\nSince ::AAC_PCM_OUTPUT_INTERLEAVED is set to 0, the audio channels will be located as contiguous blocks\nin the output buffer as follows:\n\n\\verbatim\n        ... \n     ... \n\\endverbatim\n\nWhere N equals to CStreamInfo::frameSize .\n\n\\subsection ExamplesSurround Surround 5.1\n\nIn case of ::AAC_PCM_OUTPUT_INTERLEAVED set to 1 and ::AAC_PCM_OUTPUT_CHANNEL_MAPPING set to 1,\na AAC-LC bit stream which has channelConfiguration = 6 in its audio specific config, would lead\nto the following values in CStreamInfo:\n\nCStreamInfo::numChannels = 6\n\nCStreamInfo::pChannelType = { ::ACT_FRONT, ::ACT_FRONT, ::ACT_FRONT, ::ACT_LFE, ::ACT_BACK, ::ACT_BACK }\n\nCStreamInfo::pChannelIndices = { 1, 2, 0, 0, 0, 1 }\n\nSince ::AAC_PCM_OUTPUT_CHANNEL_MAPPING is 1, WAV file channel ordering will be used. For a 5.1 channel\nscheme, thus the channels would be: front left, front right, center, LFE, surround left, surround right.\nThus the third channel is the center channel, receiving the index 0. The other front channels are\nfront left, front right being placed as first and second channels with indices 1 and 2 correspondingly.\nThere is only one LFE, placed as the fourth channel and index 0. Finally both surround\nchannels get the type definition ACT_BACK, and the indices 0 and 1.\n\nSince ::AAC_PCM_OUTPUT_INTERLEAVED is set to 1, the audio channels will be placed in the output buffer\nas follows:\n\n\\verbatim\n \n
 \n \n\n \n
 \n \n\n...\n\n \n
 \n \n\\endverbatim\n\nWhere N equals to CStreamInfo::frameSize .\n\n\\subsection ExamplesArib ARIB coding mode 2/1\n\nIn case of ::AAC_PCM_OUTPUT_INTERLEAVED set to 1 and ::AAC_PCM_OUTPUT_CHANNEL_MAPPING set to 1,\nin case of a ARIB bit stream using coding mode 2/1 as described in ARIB STD-B32 Part 2 Version 2.1-E1, page 61,\nwould lead to the following values in CStreamInfo:\n\nCStreamInfo::numChannels = 3\n\nCStreamInfo::pChannelType = { ::ACT_FRONT, ::ACT_FRONT,:: ACT_BACK }\n\nCStreamInfo::pChannelIndices = { 0, 1, 0 }\n\nThe audio channels will be placed as follows in the audio output buffer:\n\n\\verbatim\n   \n\n  \n\n...\n\n  \n\nWhere N equals to CStreamInfo::frameSize .\n\n\\endverbatim\n\n*/\n\n#ifndef AACDECODER_LIB_H\n#define AACDECODER_LIB_H\n\n#include \"machine_type.h\"\n#include \"FDK_audio.h\"\n\n#include \"genericStds.h\"\n\n#define AACDECODER_LIB_VL0 2\n#define AACDECODER_LIB_VL1 5\n#define AACDECODER_LIB_VL2 17\n\n/**\n * \\brief  AAC decoder error codes.\n */\ntypedef enum {\n  AAC_DEC_OK                             = 0x0000,  /*!< No error occured. Output buffer is valid and error free. */\n  AAC_DEC_OUT_OF_MEMORY                  = 0x0002,  /*!< Heap returned NULL pointer. Output buffer is invalid. */\n  AAC_DEC_UNKNOWN                        = 0x0005,  /*!< Error condition is of unknown reason, or from a another module. Output buffer is invalid. */\n\n  /* Synchronization errors. Output buffer is invalid. */\n  aac_dec_sync_error_start               = 0x1000,\n  AAC_DEC_TRANSPORT_SYNC_ERROR           = 0x1001,  /*!< The transport decoder had syncronisation problems. Do not exit decoding. Just feed new\n                                                         bitstream data. */\n  AAC_DEC_NOT_ENOUGH_BITS                = 0x1002,  /*!< The input buffer ran out of bits. */\n  aac_dec_sync_error_end                 = 0x1FFF,\n\n  /* Initialization errors. Output buffer is invalid. */\n  aac_dec_init_error_start               = 0x2000,\n  AAC_DEC_INVALID_HANDLE                 = 0x2001,  /*!< The handle passed to the function call was invalid (NULL). */\n  AAC_DEC_UNSUPPORTED_AOT                = 0x2002,  /*!< The AOT found in the configuration is not supported. */\n  AAC_DEC_UNSUPPORTED_FORMAT             = 0x2003,  /*!< The bitstream format is not supported.  */\n  AAC_DEC_UNSUPPORTED_ER_FORMAT          = 0x2004,  /*!< The error resilience tool format is not supported. */\n  AAC_DEC_UNSUPPORTED_EPCONFIG           = 0x2005,  /*!< The error protection format is not supported. */\n  AAC_DEC_UNSUPPORTED_MULTILAYER         = 0x2006,  /*!< More than one layer for AAC scalable is not supported. */\n  AAC_DEC_UNSUPPORTED_CHANNELCONFIG      = 0x2007,  /*!< The channel configuration (either number or arrangement) is not supported. */\n  AAC_DEC_UNSUPPORTED_SAMPLINGRATE       = 0x2008,  /*!< The sample rate specified in the configuration is not supported. */\n  AAC_DEC_INVALID_SBR_CONFIG             = 0x2009,  /*!< The SBR configuration is not supported. */\n  AAC_DEC_SET_PARAM_FAIL                 = 0x200A,  /*!< The parameter could not be set. Either the value was out of range or the parameter does\n                                                         not exist. */\n  AAC_DEC_NEED_TO_RESTART                = 0x200B,  /*!< The decoder needs to be restarted, since the requiered configuration change cannot be\n                                                         performed. */\n  AAC_DEC_OUTPUT_BUFFER_TOO_SMALL        = 0x200C,  /*!< The provided output buffer is too small. */\n  aac_dec_init_error_end                 = 0x2FFF,\n\n  /* Decode errors. Output buffer is valid but concealed. */\n  aac_dec_decode_error_start             = 0x4000,\n  AAC_DEC_TRANSPORT_ERROR                = 0x4001,  /*!< The transport decoder encountered an unexpected error. */\n  AAC_DEC_PARSE_ERROR                    = 0x4002,  /*!< Error while parsing the bitstream. Most probably it is corrupted, or the system crashed. */\n  AAC_DEC_UNSUPPORTED_EXTENSION_PAYLOAD  = 0x4003,  /*!< Error while parsing the extension payload of the bitstream. The extension payload type\n                                                         found is not supported. */\n  AAC_DEC_DECODE_FRAME_ERROR             = 0x4004,  /*!< The parsed bitstream value is out of range. Most probably the bitstream is corrupt, or\n                                                         the system crashed. */\n  AAC_DEC_CRC_ERROR                      = 0x4005,  /*!< The embedded CRC did not match. */\n  AAC_DEC_INVALID_CODE_BOOK              = 0x4006,  /*!< An invalid codebook was signalled. Most probably the bitstream is corrupt, or the system\n                                                         crashed. */\n  AAC_DEC_UNSUPPORTED_PREDICTION         = 0x4007,  /*!< Predictor found, but not supported in the AAC Low Complexity profile. Most probably the\n                                                         bitstream is corrupt, or has a wrong format. */\n  AAC_DEC_UNSUPPORTED_CCE                = 0x4008,  /*!< A CCE element was found which is not supported. Most probably the bitstream is corrupt, or\n                                                         has a wrong format. */\n  AAC_DEC_UNSUPPORTED_LFE                = 0x4009,  /*!< A LFE element was found which is not supported. Most probably the bitstream is corrupt, or\n                                                         has a wrong format. */\n  AAC_DEC_UNSUPPORTED_GAIN_CONTROL_DATA  = 0x400A,  /*!< Gain control data found but not supported. Most probably the bitstream is corrupt, or has\n                                                         a wrong format. */\n  AAC_DEC_UNSUPPORTED_SBA                = 0x400B,  /*!< SBA found, but currently not supported in the BSAC profile. */\n  AAC_DEC_TNS_READ_ERROR                 = 0x400C,  /*!< Error while reading TNS data. Most probably the bitstream is corrupt or the system\n                                                         crashed. */\n  AAC_DEC_RVLC_ERROR                     = 0x400D,  /*!< Error while decoding error resillient data. */\n  aac_dec_decode_error_end               = 0x4FFF,\n\n  /* Ancillary data errors. Output buffer is valid. */\n  aac_dec_anc_data_error_start           = 0x8000,\n  AAC_DEC_ANC_DATA_ERROR                 = 0x8001,  /*!< Non severe error concerning the ancillary data handling. */\n  AAC_DEC_TOO_SMALL_ANC_BUFFER           = 0x8002,  /*!< The registered ancillary data buffer is too small to receive the parsed data. */\n  AAC_DEC_TOO_MANY_ANC_ELEMENTS          = 0x8003,  /*!< More than the allowed number of ancillary data elements should be written to buffer. */\n  aac_dec_anc_data_error_end             = 0x8FFF\n\n\n} AAC_DECODER_ERROR;\n\ntypedef enum {\n    AAC_DECODER_CHANNEL_SELECT_SELECT_STEREO ,\n    AAC_DECODER_CHANNEL_SELECT_SELECT_LRMERGE,\n    AAC_DECODER_CHANNEL_SELECT_LCHNL,\n    AAC_DECODER_CHANNEL_SELECT_RCHNL,\n} AAC_DECODER_CHANNEL_SELECT_E;\n\n/** Macro to identify initialization errors. */\n#define IS_INIT_ERROR(err)   ( (((err)>=aac_dec_init_error_start)   && ((err)<=aac_dec_init_error_end))   ? 1 : 0)\n/** Macro to identify decode errors. */\n#define IS_DECODE_ERROR(err) ( (((err)>=aac_dec_decode_error_start) && ((err)<=aac_dec_decode_error_end)) ? 1 : 0)\n/** Macro to identify if the audio output buffer contains valid samples after calling aacDecoder_DecodeFrame(). */\n#define IS_OUTPUT_VALID(err) ( ((err) == AAC_DEC_OK) || IS_DECODE_ERROR(err) )\n\n/**\n * \\brief AAC decoder setting parameters\n */\ntypedef enum\n{\n  AAC_PCM_OUTPUT_INTERLEAVED              = 0x0000,  /*!< PCM output mode (1: interleaved (default); 0: not interleaved). */\n  AAC_PCM_DUAL_CHANNEL_OUTPUT_MODE        = 0x0002,  /*!< Defines how the decoder processes two channel signals: \\n\n                                                          0: Leave both signals as they are (default). \\n\n                                                          1: Create a dual mono output signal from channel 1. \\n\n                                                          2: Create a dual mono output signal from channel 2. \\n\n                                                          3: Create a dual mono output signal by mixing both channels (L' = R' = 0.5*Ch1 + 0.5*Ch2). */\n  AAC_PCM_OUTPUT_CHANNEL_MAPPING          = 0x0003,  /*!< Output buffer channel ordering. 0: MPEG PCE style order, 1: WAV file channel order (default). */\n  AAC_PCM_LIMITER_ENABLE                  = 0x0004,  /*!< Enable signal level limiting. \\n\n                                                          -1: Auto-config. Enable limiter for all non-lowdelay configurations by default. \\n\n                                                           0: Disable limiter in general. \\n\n                                                           1: Enable limiter always.\n                                                          It is recommended to call the decoder with a AACDEC_CLRHIST flag to reset all states when\n                                                          the limiter switch is changed explicitly. */\n  AAC_PCM_LIMITER_ATTACK_TIME             = 0x0005,  /*!< Signal level limiting attack time in ms.\n                                                          Default confguration is 15 ms. Adjustable range from 1 ms to 15 ms. */\n  AAC_PCM_LIMITER_RELEAS_TIME             = 0x0006,  /*!< Signal level limiting release time in ms.\n                                                          Default configuration is 50 ms. Adjustable time must be larger than 0 ms. */\n  AAC_PCM_MIN_OUTPUT_CHANNELS             = 0x0011,  /*!< Minimum number of PCM output channels. If higher than the number of encoded audio channels,\n                                                          a simple channel extension is applied. \\n\n                                                          -1, 0: Disable channel extenstion feature. The decoder output contains the same number of\n                                                                 channels as the encoded bitstream. \\n\n                                                           1:    This value is currently needed only together with the mix-down feature. See\n                                                                 ::AAC_PCM_MAX_OUTPUT_CHANNELS and note 2 below. \\n\n                                                           2:    Encoded mono signals will be duplicated to achieve a 2/0/0.0 channel output\n                                                                 configuration. \\n\n                                                           6:    The decoder trys to reorder encoded signals with less than six channels to achieve\n                                                                 a 3/0/2.1 channel output signal. Missing channels will be filled with a zero signal.\n                                                                 If reordering is not possible the empty channels will simply be appended. Only\n                                                                 available if instance is configured to support multichannel output. \\n\n                                                           8:    The decoder trys to reorder encoded signals with less than eight channels to\n                                                                 achieve a 3/0/4.1 channel output signal. Missing channels will be filled with a\n                                                                 zero signal. If reordering is not possible the empty channels will simply be\n                                                                 appended. Only available if instance is configured to support multichannel output.\\n\n                                                          NOTE: \\n\n                                                            1. The channel signalling (CStreamInfo::pChannelType and CStreamInfo::pChannelIndices)\n                                                               will not be modified. Added empty channels will be signalled with channel type\n                                                               AUDIO_CHANNEL_TYPE::ACT_NONE. \\n\n                                                            2. If the parameter value is greater than that of ::AAC_PCM_MAX_OUTPUT_CHANNELS both will\n                                                               be set to the same value. \\n\n                                                            3. This parameter does not affect MPEG Surround processing. */\n  AAC_PCM_MAX_OUTPUT_CHANNELS             = 0x0012,  /*!< Maximum number of PCM output channels. If lower than the number of encoded audio channels,\n                                                          downmixing is applied accordingly. If dedicated metadata is available in the stream it\n                                                          will be used to achieve better mixing results. \\n\n                                                          -1, 0: Disable downmixing feature. The decoder output contains the same number of channels\n                                                                 as the encoded bitstream. \\n\n                                                           1:    All encoded audio configurations with more than one channel will be mixed down to\n                                                                 one mono output signal. \\n\n                                                           2:    The decoder performs a stereo mix-down if the number encoded audio channels is\n                                                                 greater than two. \\n\n                                                           6:    If the number of encoded audio channels is greater than six the decoder performs a\n                                                                 mix-down to meet the target output configuration of 3/0/2.1 channels. Only\n                                                                 available if instance is configured to support multichannel output. \\n\n                                                           8:    This value is currently needed only together with the channel extension feature.\n                                                                 See ::AAC_PCM_MIN_OUTPUT_CHANNELS and note 2 below. Only available if instance is\n                                                                 configured to support multichannel output. \\n\n                                                          NOTE: \\n\n                                                            1. Down-mixing of any seven or eight channel configuration not defined in ISO/IEC 14496-3\n                                                               PDAM 4 is not supported by this software version. \\n\n                                                            2. If the parameter value is greater than zero but smaller than ::AAC_PCM_MIN_OUTPUT_CHANNELS\n                                                               both will be set to same value. \\n\n                                                            3. The operating mode of the MPEG Surround module will be set accordingly. \\n\n                                                            4. Setting this param with any value will disable the binaural processing of the MPEG\n                                                               Surround module (::AAC_MPEGS_BINAURAL_ENABLE=0). */\n\n  AAC_CONCEAL_METHOD                      = 0x0100,  /*!< Error concealment: Processing method. \\n\n                                                          0: Spectral muting. \\n\n                                                          1: Noise substitution (see ::CONCEAL_NOISE). \\n\n                                                          2: Energy interpolation (adds additional signal delay of one frame, see ::CONCEAL_INTER). \\n */\n\n  AAC_DRC_BOOST_FACTOR                    = 0x0200,  /*!< Dynamic Range Control: Scaling factor for boosting gain values.\n                                                          Defines how the boosting DRC factors (conveyed in the bitstream) will be applied to the\n                                                          decoded signal. The valid values range from 0 (don't apply boost factors) to 127 (fully\n                                                          apply all boosting factors). */\n  AAC_DRC_ATTENUATION_FACTOR              = 0x0201,  /*!< Dynamic Range Control: Scaling factor for attenuating gain values. Same as\n                                                          AAC_DRC_BOOST_FACTOR but for attenuating DRC factors. */\n  AAC_DRC_REFERENCE_LEVEL                 = 0x0202,  /*!< Dynamic Range Control: Target reference level. Defines the level below full-scale\n                                                          (quantized in steps of 0.25dB) to which the output audio signal will be normalized to by\n                                                          the DRC module. The valid values range from 0 (full-scale) to 127 (31.75 dB below\n                                                          full-scale). The value smaller than 0 switches off normalization. */\n  AAC_DRC_HEAVY_COMPRESSION               = 0x0203,  /*!< Dynamic Range Control: En-/Disable DVB specific heavy compression (aka RF mode).\n                                                          If set to 1, the decoder will apply the compression values from the DVB specific ancillary\n                                                          data field. At the same time the MPEG-4 Dynamic Range Control tool will be disabled. By\n                                                          default heavy compression is disabled. */\n\n  AAC_QMF_LOWPOWER                        = 0x0300,  /*!< Quadrature Mirror Filter (QMF) Bank processing mode. \\n\n                                                          -1: Use internal default. Implies MPEG Surround partially complex accordingly. \\n\n                                                           0: Use complex QMF data mode. \\n\n                                                           1: Use real (low power) QMF data mode. \\n */\n\n  AAC_MPEGS_ENABLE                        = 0x0500,  /*!< MPEG Surround: Allow/Disable decoding of MPS content. Available only for decoders with MPEG\n                                                          Surround support. */\n\n  AAC_TPDEC_CLEAR_BUFFER                  = 0x0603   /*!< Clear internal bit stream buffer of transport layers. The decoder will start decoding\n                                                          at new data passed after this event and any previous data is discarded. */\n\n} AACDEC_PARAM;\n\n/**\n * \\brief This structure gives information about the currently decoded audio data.\n *        All fields are read-only.\n */\ntypedef struct\n{\n  /* These five members are the only really relevant ones for the user.                                                            */\n  INT               sampleRate;          /*!< The samplerate in Hz of the fully decoded PCM audio signal (after SBR processing).   */\n  INT               frameSize;           /*!< The frame size of the decoded PCM audio signal. \\n\n                                              1024 or 960 for AAC-LC \\n\n                                              2048 or 1920 for HE-AAC (v2) \\n\n                                              512 or 480 for AAC-LD and AAC-ELD                                                    */\n  INT               numChannels;         /*!< The number of output audio channels in the decoded and interleaved PCM audio signal. */\n  AUDIO_CHANNEL_TYPE *pChannelType;      /*!< Audio channel type of each output audio channel.                                     */\n  UCHAR             *pChannelIndices;    /*!< Audio channel index for each output audio channel.\n                                               See ISO/IEC 13818-7:2005(E), 8.5.3.2 Explicit channel mapping using a program_config_element() */\n  /* Decoder internal members. */\n  INT               aacSampleRate;       /*!< Sampling rate in Hz without SBR (from configuration info).                           */\n  INT               profile;             /*!< MPEG-2 profile (from file header) (-1: not applicable (e. g. MPEG-4)).               */\n  AUDIO_OBJECT_TYPE aot;                 /*!< Audio Object Type (from ASC): is set to the appropriate value for MPEG-2 bitstreams (e. g. 2 for AAC-LC). */\n  INT               channelConfig;       /*!< Channel configuration (0: PCE defined, 1: mono, 2: stereo, ...                       */\n  INT               bitRate;             /*!< Instantaneous bit rate.                   */\n  INT               aacSamplesPerFrame;  /*!< Samples per frame for the AAC core (from ASC). \\n\n                                              1024 or 960 for AAC-LC \\n\n                                              512 or 480 for AAC-LD and AAC-ELD         */\n  INT               aacNumChannels;      /*!< The number of audio channels after AAC core processing (before PS or MPS processing).\n                                              CAUTION: This are not the final number of output channels! */\n  AUDIO_OBJECT_TYPE extAot;              /*!< Extension Audio Object Type (from ASC)   */\n  INT               extSamplingRate;     /*!< Extension sampling rate in Hz (from ASC) */\n\n  UINT              outputDelay;         /*!< The number of samples the output is additionally delayed by the decoder. */\n\n  UINT              flags;               /*!< Copy of internal flags. Only to be written by the decoder, and only to be read externally. */\n\n  SCHAR             epConfig;            /*!< epConfig level (from ASC): only level 0 supported, -1 means no ER (e. g. AOT=2, MPEG-2 AAC, etc.)  */\n\n  /* Statistics */\n  INT               numLostAccessUnits;  /*!< This integer will reflect the estimated amount of lost access units in case aacDecoder_DecodeFrame()\n                                              returns AAC_DEC_TRANSPORT_SYNC_ERROR. It will be < 0 if the estimation failed. */\n\n  UINT              numTotalBytes;       /*!< This is the number of total bytes that have passed through the decoder. */\n  UINT              numBadBytes;         /*!< This is the number of total bytes that were considered with errors from numTotalBytes. */\n  UINT              numTotalAccessUnits; /*!< This is the number of total access units that have passed through the decoder. */\n  UINT              numBadAccessUnits;   /*!< This is the number of total access units that were considered with errors from numTotalBytes. */\n\n  /* Metadata */\n  SCHAR             drcProgRefLev;       /*!< DRC program reference level. Defines the reference level below full-scale.\n                                              It is quantized in steps of 0.25dB. The valid values range from 0 (0 dBFS) to 127 (-31.75 dBFS).\n                                              It is used to reflect the average loudness of the audio in LKFS accoring to ITU-R BS 1770.\n                                              If no level has been found in the bitstream the value is -1. */\n  SCHAR             drcPresMode;         /*!< DRC presentation mode. According to ETSI TS 101 154, this field indicates whether\n                                              light (MPEG-4 Dynamic Range Control tool) or heavy compression (DVB heavy compression)\n                                              dynamic range control shall take priority on the outputs.\n                                              For details, see ETSI TS 101 154, table C.33. Possible values are: \\n\n                                              -1: No corresponding metadata found in the bitstream \\n\n                                               0: DRC presentation mode not indicated \\n\n                                               1: DRC presentation mode 1 \\n\n                                               2: DRC presentation mode 2 \\n\n                                               3: Reserved */\n\n} CStreamInfo;\n\n\ntypedef struct AAC_DECODER_INSTANCE *HANDLE_AACDECODER;  /*!< Pointer to a AAC decoder instance. */\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\n/**\n * \\brief Initialize ancillary data buffer.\n *\n * \\param self    AAC decoder handle.\n * \\param buffer  Pointer to (external) ancillary data buffer.\n * \\param size    Size of the buffer pointed to by buffer.\n * \\return        Error code.\n */\nLINKSPEC_H AAC_DECODER_ERROR\naacDecoder_AncDataInit ( HANDLE_AACDECODER self,\n                         UCHAR            *buffer,\n                         int               size );\n\n/**\n * \\brief Get one ancillary data element.\n *\n * \\param self   AAC decoder handle.\n * \\param index  Index of the ancillary data element to get.\n * \\param ptr    Pointer to a buffer receiving a pointer to the requested ancillary data element.\n * \\param size   Pointer to a buffer receiving the length of the requested ancillary data element.\n * \\return       Error code.\n */\nLINKSPEC_H AAC_DECODER_ERROR\naacDecoder_AncDataGet ( HANDLE_AACDECODER self,\n                        int               index,\n                        UCHAR           **ptr,\n                        int              *size );\n\n/**\n * \\brief Set one single decoder parameter.\n *\n * \\param self   AAC decoder handle.\n * \\param param  Parameter to be set.\n * \\param value  Parameter value.\n * \\return       Error code.\n */\nLINKSPEC_H AAC_DECODER_ERROR\naacDecoder_SetParam ( const HANDLE_AACDECODER  self,\n                      const AACDEC_PARAM       param,\n                      const INT                value );\n\n\n/**\n * \\brief              Get free bytes inside decoder internal buffer\n * \\param self    Handle of AAC decoder instance\n * \\param pFreeBytes Pointer to variable receving amount of free bytes inside decoder internal buffer\n * \\return             Error code\n */\nLINKSPEC_H AAC_DECODER_ERROR\naacDecoder_GetFreeBytes ( const HANDLE_AACDECODER  self,\n                                            UINT *pFreeBytes);\n\n/**\n * \\brief               Open an AAC decoder instance\n * \\param transportFmt  The transport type to be used\n * \\return              AAC decoder handle\n */\nLINKSPEC_H HANDLE_AACDECODER\naacDecoder_Open ( TRANSPORT_TYPE transportFmt, UINT nrOfLayers );\n\n/**\n * \\brief Explicitly configure the decoder by passing a raw AudioSpecificConfig (ASC) or a StreamMuxConfig (SMC),\n *  contained in a binary buffer. This is required for MPEG-4 and Raw Packets file format bitstreams\n *  as well as for LATM bitstreams with no in-band SMC. If the transport format is LATM with or without\n *  LOAS, configuration is assumed to be an SMC, for all other file formats an ASC.\n *\n * \\param self    AAC decoder handle.\n * \\param conf    Pointer to an unsigned char buffer containing the binary configuration buffer (either ASC or SMC).\n * \\param length  Length of the configuration buffer in bytes.\n * \\return        Error code.\n */\nLINKSPEC_H AAC_DECODER_ERROR\naacDecoder_ConfigRaw ( HANDLE_AACDECODER self,\n                       UCHAR            *conf[],\n                       const UINT        length[] );\n\n\n/**\n * \\brief Fill AAC decoder's internal input buffer with bitstream data from the external input buffer.\n *  The function only copies such data as long as the decoder-internal input buffer is not full.\n *  So it grabs whatever it can from pBuffer and returns information (bytesValid) so that at a\n *  subsequent call of %aacDecoder_Fill(), the right position in pBuffer can be determined to\n *  grab the next data.\n *\n * \\param self        AAC decoder handle.\n * \\param pBuffer     Pointer to external input buffer.\n * \\param bufferSize  Size of external input buffer. This argument is required because decoder-internally\n *                    we need the information to calculate the offset to pBuffer, where the next\n *                    available data is, which is then fed into the decoder-internal buffer (as much\n *                    as possible). Our example framework implementation fills the buffer at pBuffer\n *                    again, once it contains no available valid bytes anymore (meaning bytesValid equal 0).\n * \\param bytesValid  Number of bitstream bytes in the external bitstream buffer that have not yet been\n *                    copied into the decoder's internal bitstream buffer by calling this function.\n *                    The value is updated according to the amount of newly copied bytes.\n * \\return            Error code.\n */\nLINKSPEC_H AAC_DECODER_ERROR\naacDecoder_Fill ( HANDLE_AACDECODER  self,\n                  UCHAR             *pBuffer[],\n                  const UINT         bufferSize[],\n                  UINT              *bytesValid );\n\n#define AACDEC_CONCEAL  1 /*!< Flag for aacDecoder_DecodeFrame(): Trigger the built-in error concealment module \\\n                                 to generate a substitute signal for one lost frame. New input data will not be\n                                 considered. */\n#define AACDEC_FLUSH    2 /*!< Flag for aacDecoder_DecodeFrame(): Flush all filterbanks to get all delayed audio \\\n                                 without having new input data. Thus new input data will not be considered.*/\n#define AACDEC_INTR     4 /*!< Flag for aacDecoder_DecodeFrame(): Signal an input bit stream data discontinuity. \\\n                                 Resync any internals as necessary. */\n#define AACDEC_CLRHIST  8 /*!< Flag for aacDecoder_DecodeFrame(): Clear all signal delay lines and history buffers.\\\n                                 CAUTION: This can cause discontinuities in the output signal. */\n\n/**\n * \\brief            Decode one audio frame\n *\n * \\param self       AAC decoder handle.\n * \\param pTimeData  Pointer to external output buffer where the decoded PCM samples will be stored into.\n * \\param flags      Bit field with flags for the decoder: \\n\n *                   (flags & AACDEC_CONCEAL) == 1: Do concealment. \\n\n *                   (flags & AACDEC_FLUSH) == 2: Discard input data. Flush filter banks (output delayed audio). \\n\n *                   (flags & AACDEC_INTR) == 4: Input data is discontinuous. Resynchronize any internals as necessary.\n * \\return           Error code.\n */\nLINKSPEC_H AAC_DECODER_ERROR\naacDecoder_DecodeFrame ( HANDLE_AACDECODER  self,\n                         INT_PCM           *pTimeData,\n                         const INT          timeDataSize,\n                         const UINT         flags );\n\n/**\n * \\brief       De-allocate all resources of an AAC decoder instance.\n *\n * \\param self  AAC decoder handle.\n * \\return      void\n */\nLINKSPEC_H void aacDecoder_Close ( HANDLE_AACDECODER self );\n\nLINKSPEC_CPP bool is_aacDecoder_Close ( HANDLE_AACDECODER self );\n\n/**\n * \\brief       Get CStreamInfo handle from decoder.\n *\n * \\param self  AAC decoder handle.\n * \\return      Reference to requested CStreamInfo.\n */\nLINKSPEC_H CStreamInfo* aacDecoder_GetStreamInfo( HANDLE_AACDECODER self );\n\n/**\n * \\brief       Get decoder library info.\n *\n * \\param info  Pointer to an allocated LIB_INFO structure.\n * \\return      0 on success\n */\nLINKSPEC_H INT aacDecoder_GetLibInfo( LIB_INFO *info );\n\nLINKSPEC_CPP AAC_DECODER_ERROR aacDecoder_DecodeFrame_Config(UINT chnl_sel);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* AACDECODER_LIB_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libAACenc/include/aacenc_lib.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2015 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/**************************** MPEG-4 HE-AAC Encoder **************************\n\n  Initial author:       M. Lohwasser\n******************************************************************************/\n\n/**\n * \\file   aacenc_lib.h\n * \\brief  FDK AAC Encoder library interface header file.\n *\n\\mainpage  Introduction\n\n\\section Scope\n\nThis document describes the high-level interface and usage of the ISO/MPEG-2/4 AAC Encoder\nlibrary developed by the Fraunhofer Institute for Integrated Circuits (IIS).\n\nThe library implements encoding on the basis of the MPEG-2 and MPEG-4 AAC Low-Complexity\nstandard, and depending on the library's configuration, MPEG-4 High-Efficiency AAC v2 and/or AAC-ELD standard.\n\nAll references to SBR (Spectral Band Replication) are only applicable to HE-AAC or AAC-ELD versions\nof the library. All references to PS (Parametric Stereo) are only applicable to HE-AAC v2\nversions of the library.\n\n\\section encBasics Encoder Basics\n\nThis document can only give a rough overview about the ISO/MPEG-2 and ISO/MPEG-4 AAC audio coding\nstandard. To understand all the terms in this document, you are encouraged to read the following documents.\n\n- ISO/IEC 13818-7 (MPEG-2 AAC), which defines the syntax of MPEG-2 AAC audio bitstreams.\n- ISO/IEC 14496-3 (MPEG-4 AAC, subparts 1 and 4), which defines the syntax of MPEG-4 AAC audio bitstreams.\n- Lutzky, Schuller, Gayer, Krämer, Wabnik, \"A guideline to audio codec delay\", 116th AES Convention, May 8, 2004\n\nMPEG Advanced Audio Coding is based on a time-to-frequency mapping of the signal. The signal is\npartitioned into overlapping portions and transformed into frequency domain. The spectral components\nare then quantized and coded. \\n\nAn MPEG-2 or MPEG-4 AAC audio bitstream is composed of frames. Contrary to MPEG-1/2 Layer-3 (mp3), the\nlength of individual frames is not restricted to a fixed number of bytes, but can take on any length\nbetween 1 and 768 bytes.\n\n\n\\page LIBUSE Library Usage\n\n\\section InterfaceDescription API Files\n\nAll API header files are located in the folder /include of the release package. All header files\nare provided for usage in C/C++ programs. The AAC encoder library API functions are located at\naacenc_lib.h.\n\nIn binary releases the encoder core resides in statically linkable libraries called for example\nlibAACenc.a/libFDK.a (LINUX) or FDK_fastaaclib.lib (MS Visual C++) for the plain AAC-LC core encoder\nand libSBRenc.a (LINUX) or FDK_sbrEncLib.lib (MS Visual C++) for the SBR (Spectral Band\nReplication) and PS (Parametric Stereo) modules.\n\n\\section CallingSequence Calling Sequence\n\nFor encoding of ISO/MPEG-2/4 AAC bitstreams the following sequence is mandatory. Input read and output\nwrite functions as well as the corresponding open and close functions are left out, since they may be\nimplemented differently according to the user's specific requirements. The example implementation in\nmain.cpp uses file-based input/output.\n\n-# Call aacEncOpen() to allocate encoder instance with required \\ref encOpen \"configuration\".\\n\n\\dontinclude main.cpp\n\\skipline hAacEncoder =\n\\skipline aacEncOpen\n-# Call aacEncoder_SetParam() for each parameter to be set. AOT, samplingrate, channelMode, bitrate and transport type are \\ref encParams \"mandatory\".\n\\code\n    ErrorStatus = aacEncoder_SetParam(hAacEncoder, parameter, value);\n\\endcode\n-# Call aacEncEncode() with NULL parameters to \\ref encReconf \"initialize\" encoder instance with present parameter set.\n\\skipline aacEncEncode\n-# Call aacEncInfo() to retrieve a configuration data block to be transmitted out of band. This is required when using RFC3640 or RFC3016 like transport.\n\\dontinclude main.cpp\n\\skipline encInfo\n\\skipline aacEncInfo\n-# Encode input audio data in loop.\n\\skip Encode as long as\n\\skipline do\n\\until {\nFeed \\ref feedInBuf \"input buffer\" with new audio data and provide input/output \\ref bufDes \"arguments\" to aacEncEncode().\n\\skipline aacEncEncode\n\\until ;\nWrite \\ref writeOutData \"output data\" to file or audio device. \\skipline while\n-# Call aacEncClose() and destroy encoder instance.\n\\skipline aacEncClose\n\n\\section encOpen Encoder Instance Allocation\n\nThe assignment of the aacEncOpen() function is very flexible and can be used in the following way.\n- If the amount of memory consumption is not an issue, the encoder instance can be allocated\nfor the maximum number of possible audio channels (for example 6 or 8) with the full functional range supported by the library.\nThis is the default open procedure for the AAC encoder if memory consumption does not need to be minimized.\n\\code aacEncOpen(&hAacEncoder,0,0) \\endcode\n- If the required MPEG-4 AOTs do not call for the full functional range of the library, encoder modules can be allocated selectively.\n\\verbatim\n------------------------------------------------------\n AAC | SBR |  PS | MD |         FLAGS         | value\n-----+-----+-----+----+-----------------------+-------\n  X  |  -  |  -  |  - | (0x01)                |  0x01\n  X  |  X  |  -  |  - | (0x01|0x02)           |  0x03\n  X  |  X  |  X  |  - | (0x01|0x02|0x04)      |  0x07\n  X  |  -  |  -  |  X | (0x01          |0x10) |  0x11\n  X  |  X  |  -  |  X | (0x01|0x02     |0x10) |  0x13\n  X  |  X  |  X  |  X | (0x01|0x02|0x04|0x10) |  0x17\n------------------------------------------------------\n - AAC: Allocate AAC Core Encoder module.\n - SBR: Allocate Spectral Band Replication module.\n - PS: Allocate Parametric Stereo module.\n - MD: Allocate Meta Data module within AAC encoder.\n\\endverbatim\n\\code aacEncOpen(&hAacEncoder,value,0) \\endcode\n- Specifying the maximum number of channels to be supported in the encoder instance can be done as follows.\n - For example allocate an encoder instance which supports 2 channels for all supported AOTs.\n   The library itself may be capable of encoding up to 6 or 8 channels but in this example only 2 channel encoding is required and thus only buffers for 2 channels are allocated to save data memory.\n\\code aacEncOpen(&hAacEncoder,0,2) \\endcode\n - Additionally the maximum number of supported channels in the SBR module can be denoted separately.\\n\n   In this example the encoder instance provides a maximum of 6 channels out of which up to 2 channels support SBR.\n   This encoder instance can produce for example 5.1 channel AAC-LC streams or stereo HE-AAC (v2) streams.\n   HE-AAC 5.1 multi channel is not possible since only 2 out of 6 channels support SBR, which saves data memory.\n\\code aacEncOpen(&hAacEncoder,0,6|(2<<8)) \\endcode\n\\n\n\n\\section bufDes Input/Output Arguments\n\n\\subsection allocIOBufs Provide Buffer Descriptors\nIn the present encoder API, the input and output buffers are described with \\ref AACENC_BufDesc \"buffer descriptors\". This mechanism allows a flexible handling\nof input and output buffers without impact to the actual encoding call. Optional buffers are necessary e.g. for ancillary data, meta data input or additional output\nbuffers describing superframing data in DAB+ or DRM+.\\n\nAt least one input buffer for audio input data and one output buffer for bitstream data must be allocated. The input buffer size can be a user defined multiple\nof the number of input channels. PCM input data will be copied from the user defined PCM buffer to an internal input buffer and so input data can be less than one AAC audio frame.\nThe output buffer size should be 6144 bits per channel excluding the LFE channel.\nIf the output data does not fit into the provided buffer, an AACENC_ERROR will be returned by aacEncEncode().\n\\dontinclude main.cpp\n\\skipline inputBuffer\n\\until outputBuffer\nAll input and output buffer must be clustered in input and output buffer arrays.\n\\skipline inBuffer\n\\until outBufferElSize\nAllocate buffer descriptors\n\\skipline AACENC_BufDesc\n\\skipline AACENC_BufDesc\nInitialize input buffer descriptor\n\\skipline inBufDesc\n\\until bufElSizes\nInitialize output buffer descriptor\n\\skipline outBufDesc\n\\until bufElSizes\n\n\\subsection argLists Provide Input/Output Argument Lists\nThe input and output arguments of an aacEncEncode() call are described in argument structures.\n\\dontinclude main.cpp\n\\skipline AACENC_InArgs\n\\skipline AACENC_OutArgs\n\n\\section feedInBuf Feed Input Buffer\nThe input buffer should be handled as a modulo buffer. New audio data in the form of pulse-code-\nmodulated samples (PCM) must be read from external and be fed to the input buffer depending on its\nfill level. The required sample bitrate (represented by the data type INT_PCM which is 16, 24 or 32\nbits wide) is fixed and depends on library configuration (usually 16 bit).\n\n\\dontinclude main.cpp\n\\skipline WAV_InputRead\n\\until ;\nAfter the encoder's internal buffer is fed with incoming audio samples, and aacEncEncode()\nprocessed the new input data, update/move remaining samples in input buffer, simulating a modulo buffer:\n\\skipline outargs.numInSamples>0\n\\until }\n\n\\section writeOutData Output Bitstream Data\nIf any AAC bitstream data is available, write it to output file or device. This can be done once the\nfollowing condition is true:\n\\dontinclude main.cpp\n\\skip Valid bitstream available\n\\skipline outargs\n\n\\skipline outBytes>0\n\nIf you use file I/O then for example call mpegFileWrite_Write() from the library libMpegFileWrite\n\n\\dontinclude main.cpp\n\\skipline mpegFileWrite_Write\n\n\\section cfgMetaData Meta Data Configuration\n\nIf the present library is configured with Metadata support, it is possible to insert meta data side info into the generated\naudio bitstream while encoding.\n\nTo work with meta data the encoder instance has to be \\ref encOpen \"allocated\" with meta data support. The meta data mode must be be configured with\nthe ::AACENC_METADATA_MODE parameter and aacEncoder_SetParam() function.\n\\code aacEncoder_SetParam(hAacEncoder, AACENC_METADATA_MODE, 0-2); \\endcode\n\nThis configuration indicates how to embed meta data into bitstrem. Either no insertion, MPEG or ETSI style.\nThe meta data itself must be specified within the meta data setup structure AACENC_MetaData.\n\nChanging one of the AACENC_MetaData setup parameters can be achieved from outside the library within ::IN_METADATA_SETUP input\nbuffer. There is no need to supply meta data setup structure every frame. If there is no new meta setup data available, the\nencoder uses the previous setup or the default configuration in initial state.\n\nIn general the audio compressor and limiter within the encoder library can be configured with the ::AACENC_METADATA_DRC_PROFILE parameter\nAACENC_MetaData::drc_profile and and AACENC_MetaData::comp_profile.\n\\n\n\n\\section encReconf Encoder Reconfiguration\n\nThe encoder library allows reconfiguration of the encoder instance with new settings\ncontinuously between encoding frames. Each parameter to be changed must be set with\na single aacEncoder_SetParam() call. The internal status of each parameter can be\nretrieved with an aacEncoder_GetParam() call.\\n\nThere is no stand-alone reconfiguration function available. When parameters were\nmodified from outside the library, an internal control mechanism triggers the necessary\nreconfiguration process which will be applied at the beginning of the following\naacEncEncode() call. This state can be observed from external via the AACENC_INIT_STATUS\nand aacEncoder_GetParam() function. The reconfiguration process can also be applied\nimmediately when all parameters of an aacEncEncode() call are NULL with a valid encoder\nhandle.\\n\\n\nThe internal reconfiguration process can be controlled from extern with the following access.\n\\code aacEncoder_SetParam(hAacEncoder, AACENC_CONTROL_STATE, AACENC_CTRLFLAGS); \\endcode\n\n\n\\section encParams Encoder Parametrization\n\nAll parameteres listed in ::AACENC_PARAM can be modified within an encoder instance.\n\n\\subsection encMandatory Mandatory Encoder Parameters\nThe following parameters must be specified when the encoder instance is initialized.\n\\code\naacEncoder_SetParam(hAacEncoder, AACENC_AOT, value);\naacEncoder_SetParam(hAacEncoder, AACENC_BITRATE, value);\naacEncoder_SetParam(hAacEncoder, AACENC_SAMPLERATE, value);\naacEncoder_SetParam(hAacEncoder, AACENC_CHANNELMODE, value);\n\\endcode\nBeyond that is an internal auto mode which preinitizializes the ::AACENC_BITRATE parameter\nif the parameter was not set from extern. The bitrate depends on the number of effective\nchannels and sampling rate and is determined as follows.\n\\code\nAAC-LC (AOT_AAC_LC): 1.5 bits per sample\nHE-AAC (AOT_SBR): 0.625 bits per sample (dualrate sbr)\nHE-AAC (AOT_SBR): 1.125 bits per sample (downsampled sbr)\nHE-AAC v2 (AOT_PS): 0.5 bits per sample\n\\endcode\n\n\\subsection channelMode Channel Mode Configuration\nThe input audio data is described with the ::AACENC_CHANNELMODE parameter in the\naacEncoder_SetParam() call. It is not possible to use the encoder instance with a 'number of\ninput channels' argument. Instead, the channelMode must be set as follows.\n\\code aacEncoder_SetParam(hAacEncoder, AACENC_CHANNELMODE, value); \\endcode\nThe parameter is specified in ::CHANNEL_MODE and can be mapped from the number of input channels\nin the following way.\n\\dontinclude main.cpp\n\\skip CHANNEL_MODE chMode = MODE_INVALID;\n\\until return\n\n\\subsection encQual Audio Quality Considerations\nThe default encoder configuration is suggested to be used. Encoder tools such as TNS and PNS\nare activated by default and are internally controlled (see \\ref BEHAVIOUR_TOOLS).\n\nThere is an additional quality parameter called ::AACENC_AFTERBURNER. In the default\nconfiguration this quality switch is deactivated because it would cause a workload\nincrease which might be significant. If workload is not an issue in the application\nwe recommended to activate this feature.\n\\code aacEncoder_SetParam(hAacEncoder, AACENC_AFTERBURNER, 1); \\endcode\n\n\\subsection encELD ELD Auto Configuration Mode\nFor ELD configuration a so called auto configurator is available which configures SBR and the SBR ratio by itself.\nThe configurator is used when the encoder parameter ::AACENC_SBR_MODE and ::AACENC_SBR_RATIO are not set explicitely.\n\nBased on sampling rate and chosen bitrate per channel a reasonable SBR configuration will be used.\n\\verbatim\n------------------------------------------------------------\n  Sampling Rate  | Channel Bitrate |  SBR |       SBR Ratio\n-----------------+-----------------+------+-----------------\n ]min, 16] kHz   |     min - 27999 |   on | downsampled SBR\n                 |   28000 -   max |  off |             ---\n-----------------+-----------------+------+-----------------\n ]16 - 24] kHz   |     min - 39999 |   on | downsampled SBR\n                 |   40000 -   max |  off |             ---\n-----------------+-----------------+------+-----------------\n ]24 - 32] kHz   |     min - 27999 |   on |    dualrate SBR\n                 |   28000 - 55999 |   on | downsampled SBR\n                 |   56000 -   max |  off |             ---\n-----------------+-----------------+------+-----------------\n ]32 - 44.1] kHz |     min - 63999 |   on |    dualrate SBR\n                 |   64000 -   max |  off |             ---\n-----------------+-----------------+------+-----------------\n ]44.1 - 48] kHz |     min - 63999 |   on |    dualrate SBR\n                 |   64000 - max   |  off |             ---\n------------------------------------------------------------\n\\endverbatim\n\n\n\\section audiochCfg Audio Channel Configuration\nThe MPEG standard refers often to the so-called Channel Configuration. This Channel Configuration is used for a fixed Channel\nMapping. The configurations 1-7 are predefined in MPEG standard and used for implicit signalling within the encoded bitstream.\nFor user defined Configurations the Channel Configuration is set to 0 and the Channel Mapping must be explecitly described with an appropriate\nProgram Config Element. The present Encoder implementation does not allow the user to configure this Channel Configuration from\nextern. The Encoder implementation supports fixed Channel Modes which are mapped to Channel Configuration as follow.\n\\verbatim\n-------------------------------------------------------------------------------\n ChannelMode           | ChCfg  | front_El      | side_El  | back_El  | lfe_El\n-----------------------+--------+---------------+----------+----------+--------\nMODE_1                 |      1 | SCE           |          |          |\nMODE_2                 |      2 | CPE           |          |          |\nMODE_1_2               |      3 | SCE, CPE      |          |          |\nMODE_1_2_1             |      4 | SCE, CPE      |          | SCE      |\nMODE_1_2_2             |      5 | SCE, CPE      |          | CPE      |\nMODE_1_2_2_1           |      6 | SCE, CPE      |          | CPE      | LFE\nMODE_1_2_2_2_1         |      7 | SCE, CPE, CPE |          | CPE      | LFE\n-----------------------+--------+---------------+----------+----------+--------\nMODE_7_1_REAR_SURROUND |      0 | SCE, CPE      |          | CPE, CPE | LFE\nMODE_7_1_FRONT_CENTER  |      0 | SCE, CPE, CPE |          | CPE      | LFE\n-------------------------------------------------------------------------------\n - SCE: Single Channel Element.\n - CPE: Channel Pair.\n - SCE: Low Frequency Element.\n\\endverbatim\n\nMoreover, the Table describes all fixed Channel Elements for each Channel Mode which are assigned to a speaker arrangement. The\narrangement includes front, side, back and lfe Audio Channel Elements.\\n\nThis mapping of Audio Channel Elements is defined in MPEG standard for Channel Config 1-7. The Channel assignment for MODE_1_1,\nMODE_2_2 and MODE_2_1 is used from the ARIB standard. All other configurations are defined as suggested in MPEG.\\n\nIn case of Channel Config 0 or writing matrix mixdown coefficients, the encoder enables the writing of Program Config Element\nitself as described in \\ref encPCE. The configuration used in Program Config Element refers to the denoted Table.\\n\nBeside the Channel Element assignment the Channel Modes are resposible for audio input data channel mapping. The Channel Mapping\nof the audio data depends on the selected ::AACENC_CHANNELORDER which can be MPEG or WAV like order.\\n\nFollowing Table describes the complete channel mapping for both Channel Order configurations.\n\\verbatim\n---------------------------------------------------------------------------------------\nChannelMode            |  MPEG-Channelorder            |  WAV-Channelorder\n-----------------------+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---\nMODE_1                 | 0 |   |   |   |   |   |   |   | 0 |   |   |   |   |   |   |\nMODE_2                 | 0 | 1 |   |   |   |   |   |   | 0 | 1 |   |   |   |   |   |\nMODE_1_2               | 0 | 1 | 2 |   |   |   |   |   | 2 | 0 | 1 |   |   |   |   |\nMODE_1_2_1             | 0 | 1 | 2 | 3 |   |   |   |   | 2 | 0 | 1 | 3 |   |   |   |\nMODE_1_2_2             | 0 | 1 | 2 | 3 | 4 |   |   |   | 2 | 0 | 1 | 3 | 4 |   |   |\nMODE_1_2_2_1           | 0 | 1 | 2 | 3 | 4 | 5 |   |   | 2 | 0 | 1 | 4 | 5 | 3 |   |\nMODE_1_2_2_2_1         | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 2 | 6 | 7 | 0 | 1 | 4 | 5 | 3\n-----------------------+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---\nMODE_7_1_REAR_SURROUND | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 2 | 0 | 1 | 6 | 7 | 4 | 5 | 3\nMODE_7_1_FRONT_CENTER  | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 2 | 6 | 7 | 0 | 1 | 4 | 5 | 3\n---------------------------------------------------------------------------------------\n\\endverbatim\n\nThe denoted mapping is important for correct audio channel assignment when using MPEG or WAV ordering. The incoming audio\nchannels are distributed MPEG like starting at the front channels and ending at the back channels. The distribution is used as\ndescribed in Table concering Channel Config and fix channel elements. Please see the following example for clarification.\n\n\\verbatim\nExample: MODE_1_2_2_1 - WAV-Channelorder 5.1\n------------------------------------------\n Input Channel      | Coder Channel\n--------------------+---------------------\n 2 (front center)   | 0 (SCE channel)\n 0 (left center)    | 1 (1st of 1st CPE)\n 1 (right center)   | 2 (2nd of 1st CPE)\n 4 (left surround)  | 3 (1st of 2nd CPE)\n 5 (right surround) | 4 (2nd of 2nd CPE)\n 3 (LFE)            | 5 (LFE)\n------------------------------------------\n\\endverbatim\n\n\n\\section suppBitrates Supported Bitrates\n\nThe FDK AAC Encoder provides a wide range of supported bitrates.\nThe minimum and maximum allowed bitrate depends on the Audio Object Type. For AAC-LC the minimum\nbitrate is the bitrate that is required to write the most basic and minimal valid bitstream.\nIt consists of the bitstream format header information and other static/mandatory information\nwithin the AAC payload. The maximum AAC framesize allowed by the MPEG-4 standard\ndetermines the maximum allowed bitrate for AAC-LC. For HE-AAC and HE-AAC v2 a library internal\nlook-up table is used.\n\nA good working point in terms of audio quality, sampling rate and bitrate, is at 1 to 1.5\nbits/audio sample for AAC-LC, 0.625 bits/audio sample for dualrate HE-AAC, 1.125 bits/audio sample\nfor downsampled HE-AAC and 0.5 bits/audio sample for HE-AAC v2.\nFor example for one channel with a sampling frequency of 48 kHz, the range from\n48 kbit/s to 72 kbit/s achieves reasonable audio quality for AAC-LC.\n\nFor HE-AAC and HE-AAC v2 the lowest possible audio input sampling frequency is 16 kHz because then the\nAAC-LC core encoder operates in dual rate mode at its lowest possible sampling frequency, which is 8 kHz.\nHE-AAC v2 requires stereo input audio data.\n\nPlease note that in HE-AAC or HE-AAC v2 mode the encoder supports much higher bitrates than are\nappropriate for HE-AAC or HE-AAC v2. For example, at a bitrate of more than 64 kbit/s for a stereo\naudio signal at 44.1 kHz it usually makes sense to use AAC-LC, which will produce better audio\nquality at that bitrate than HE-AAC or HE-AAC v2.\n\n\\section reommendedConfig Recommended Sampling Rate and Bitrate Combinations\n\nThe following table provides an overview of recommended encoder configuration parameters\nwhich we determined by virtue of numerous listening tests.\n\n\\subsection reommendedConfigLC AAC-LC, HE-AAC, HE-AACv2 in Dualrate SBR mode.\n\\verbatim\n-----------------------------------------------------------------------------------\nAudio Object Type  |  Bit Rate Range  |            Supported  | Preferred  | No. of\n                   |         [bit/s]  |       Sampling Rates  |    Sampl.  |  Chan.\n                   |                  |                [kHz]  |      Rate  |\n                   |                  |                       |     [kHz]  |\n-------------------+------------------+-----------------------+------------+-------\nAAC LC + SBR + PS  |   8000 -  11999  |         22.05, 24.00  |     24.00  |      2\nAAC LC + SBR + PS  |  12000 -  17999  |                32.00  |     32.00  |      2\nAAC LC + SBR + PS  |  18000 -  39999  |  32.00, 44.10, 48.00  |     44.10  |      2\nAAC LC + SBR + PS  |  40000 -  56000  |  32.00, 44.10, 48.00  |     48.00  |      2\n-------------------+------------------+-----------------------+------------+-------\nAAC LC + SBR       |   8000 -  11999  |         22.05, 24.00  |     24.00  |      1\nAAC LC + SBR       |  12000 -  17999  |                32.00  |     32.00  |      1\nAAC LC + SBR       |  18000 -  39999  |  32.00, 44.10, 48.00  |     44.10  |      1\nAAC LC + SBR       |  40000 -  56000  |  32.00, 44.10, 48.00  |     48.00  |      1\nAAC LC + SBR       |  16000 -  27999  |  32.00, 44.10, 48.00  |     32.00  |      2\nAAC LC + SBR       |  28000 -  63999  |  32.00, 44.10, 48.00  |     44.10  |      2\nAAC LC + SBR       |  64000 - 128000  |  32.00, 44.10, 48.00  |     48.00  |      2\n-------------------+------------------+-----------------------+------------+-------\nAAC LC + SBR       |  64000 -  69999  |  32.00, 44.10, 48.00  |     32.00  | 5, 5.1\nAAC LC + SBR       |  70000 - 159999  |  32.00, 44.10, 48.00  |     44.10  | 5, 5.1\nAAC LC + SBR       | 160000 - 245999  |  32.00, 44.10, 48.00  |     48.00  |      5\nAAC LC + SBR       | 160000 - 265999  |  32.00, 44.10, 48.00  |     48.00  |    5.1\n-------------------+------------------+-----------------------+------------+-------\nAAC LC             |   8000 -  15999  | 11.025, 12.00, 16.00  |     12.00  |      1\nAAC LC             |  16000 -  23999  |                16.00  |     16.00  |      1\nAAC LC             |  24000 -  31999  |  16.00, 22.05, 24.00  |     24.00  |      1\nAAC LC             |  32000 -  55999  |                32.00  |     32.00  |      1\nAAC LC             |  56000 - 160000  |  32.00, 44.10, 48.00  |     44.10  |      1\nAAC LC             | 160001 - 288000  |                48.00  |     48.00  |      1\n-------------------+------------------+-----------------------+------------+-------\nAAC LC             |  16000 -  23999  | 11.025, 12.00, 16.00  |     12.00  |      2\nAAC LC             |  24000 -  31999  |                16.00  |     16.00  |      2\nAAC LC             |  32000 -  39999  |  16.00, 22.05, 24.00  |     22.05  |      2\nAAC LC             |  40000 -  95999  |                32.00  |     32.00  |      2\nAAC LC             |  96000 - 111999  |  32.00, 44.10, 48.00  |     32.00  |      2\nAAC LC             | 112000 - 320001  |  32.00, 44.10, 48.00  |     44.10  |      2\nAAC LC             | 320002 - 576000  |                48.00  |     48.00  |      2\n-------------------+------------------+-----------------------+------------+-------\nAAC LC             | 160000 - 239999  |                32.00  |     32.00  | 5, 5.1\nAAC LC             | 240000 - 279999  |  32.00, 44.10, 48.00  |     32.00  | 5, 5.1\nAAC LC             | 280000 - 800000  |  32.00, 44.10, 48.00  |     44.10  | 5, 5.1\n-----------------------------------------------------------------------------------\n\\endverbatim \\n\n\n\\subsection reommendedConfigLD AAC-LD, AAC-ELD, AAC-ELD with SBR in Dualrate SBR mode.\n\\verbatim\n-----------------------------------------------------------------------------------\nAudio Object Type  |  Bit Rate Range  |            Supported  | Preferred  | No. of\n                   |         [bit/s]  |       Sampling Rates  |    Sampl.  |  Chan.\n                   |                  |                [kHz]  |      Rate  |\n                   |                  |                       |     [kHz]  |\n-------------------+------------------+-----------------------+------------+-------\nELD + SBR          |  18000 -  24999  |        32.00 - 44.10  |     32.00  |      1\nELD + SBR          |  25000 -  31999  |        32.00 - 48.00  |     32.00  |      1\nELD + SBR          |  32000 -  64000  |        32.00 - 48.00  |     48.00  |      1\n-------------------+------------------+-----------------------+------------+-------\nELD + SBR          |  32000 -  51999  |        32.00 - 48.00  |     44.10  |      2\nELD + SBR          |  52000 - 128000  |        32.00 - 48.00  |     48.00  |      2\n-------------------+------------------+-----------------------+------------+-------\nELD + SBR          |  72000 - 160000  |        44.10 - 48.00  |     48.00  |      3\n-------------------+------------------+-----------------------+------------+-------\nELD + SBR          |  96000 - 212000  |        44.10 - 48.00  |     48.00  |      4\n-------------------+------------------+-----------------------+------------+-------\nELD + SBR          | 120000 - 246000  |        44.10 - 48.00  |     48.00  |      5\n-------------------+------------------+-----------------------+------------+-------\nELD + SBR          | 120000 - 266000  |        44.10 - 48.00  |     48.00  |    5.1\n-------------------+------------------+-----------------------+------------+-------\nLD, ELD            |  16000 -  19999  |        16.00 - 24.00  |     16.00  |      1\nLD, ELD            |  20000 -  39999  |        16.00 - 32.00  |     24.00  |      1\nLD, ELD            |  40000 -  49999  |        22.05 - 32.00  |     32.00  |      1\nLD, ELD            |  50000 -  61999  |        24.00 - 44.10  |     32.00  |      1\nLD, ELD            |  62000 -  84999  |        32.00 - 48.00  |     44.10  |      1\nLD, ELD            |  85000 - 192000  |        44.10 - 48.00  |     48.00  |      1\n-------------------+------------------+-----------------------+------------+-------\nLD, ELD            |  64000 -  75999  |        24.00 - 32.00  |     32.00  |      2\nLD, ELD            |  76000 -  97999  |        24.00 - 44.10  |     32.00  |      2\nLD, ELD            |  98000 - 135999  |        32.00 - 48.00  |     44.10  |      2\nLD, ELD            | 136000 - 384000  |        44.10 - 48.00  |     48.00  |      2\n-------------------+------------------+-----------------------+------------+-------\nLD, ELD            |  96000 - 113999  |        24.00 - 32.00  |     32.00  |      3\nLD, ELD            | 114000 - 146999  |        24.00 - 44.10  |     32.00  |      3\nLD, ELD            | 147000 - 203999  |        32.00 - 48.00  |     44.10  |      3\nLD, ELD            | 204000 - 576000  |        44.10 - 48.00  |     48.00  |      3\n-------------------+------------------+-----------------------+------------+-------\nLD, ELD            | 128000 - 151999  |        24.00 - 32.00  |     32.00  |      4\nLD, ELD            | 152000 - 195999  |        24.00 - 44.10  |     32.00  |      4\nLD, ELD            | 196000 - 271999  |        32.00 - 48.00  |     44.10  |      4\nLD, ELD            | 272000 - 768000  |        44.10 - 48.00  |     48.00  |      4\n-------------------+------------------+-----------------------+------------+-------\nLD, ELD            | 160000 - 189999  |        24.00 - 32.00  |     32.00  |      5\nLD, ELD            | 190000 - 244999  |        24.00 - 44.10  |     32.00  |      5\nLD, ELD            | 245000 - 339999  |        32.00 - 48.00  |     44.10  |      5\nLD, ELD            | 340000 - 960000  |        44.10 - 48.00  |     48.00  |      5\n-----------------------------------------------------------------------------------\n\\endverbatim \\n\n\n\\subsection reommendedConfigELD AAC-ELD with SBR in Downsampled SBR mode.\n\\verbatim\n-----------------------------------------------------------------------------------\nAudio Object Type  |  Bit Rate Range  |            Supported  | Preferred  | No. of\n                   |         [bit/s]  |       Sampling Rates  |    Sampl.  |  Chan.\n                   |                  |                [kHz]  |      Rate  |\n                   |                  |                       |     [kHz]  |\n-------------------+------------------+-----------------------+------------+-------\nELD + SBR          |  18000 -  24999  |        16.00 - 22.05  |     22.05  |      1\n(downsampled SBR)  |  25000 -  35999  |        22.05 - 32.00  |     24.00  |      1\n                   |  36000 -  64000  |        32.00 - 48.00  |     32.00  |      1\n-----------------------------------------------------------------------------------\n\\endverbatim \\n\n\n\n\\page ENCODERBEHAVIOUR Encoder Behaviour\n\n\\section BEHAVIOUR_BANDWIDTH Bandwidth\n\nThe FDK AAC encoder usually does not use the full frequency range of the input signal, but restricts the bandwidth\naccording to certain library-internal settings. They can be changed in the table \"bandWidthTable\" in the\nfile bandwidth.cpp (if available).\n\nThe encoder API provides the ::AACENC_BANDWIDTH parameter to adjust the bandwidth explicitly.\n\\code\naacEncoder_SetParam(hAacEncoder, AACENC_BANDWIDTH, value);\n\\endcode\n\nHowever it is not recommended to change these settings, because they are based on numerious listening\ntests and careful tweaks to ensure the best overall encoding quality.\n\nTheoretically a signal of for example 48 kHz can contain frequencies up to 24 kHz, but to use this full range\nin an audio encoder usually does not make sense. Usually the encoder has a very limited amount of\nbits to spend (typically 128 kbit/s for stereo 48 kHz content) and to allow full range bandwidth would\nwaste a lot of these bits for frequencies the human ear is hardly able to perceive anyway, if at all. Hence it\nis wise to use the available bits for the really important frequency range and just skip the rest.\nAt lower bitrates (e. g. <= 80 kbit/s for stereo 48 kHz content) the encoder will choose an even smaller\nbandwidth, because an encoded signal with smaller bandwidth and hence less artifacts sounds better than a signal\nwith higher bandwidth but then more coding artefacts across all frequencies. These artefacts would occur if\nsmall bitrates and high bandwidths are chosen because the available bits are just not enough to encode all\nfrequencies well.\n\nUnfortunately some people evaluate encoding quality based on possible bandwidth as well, but it is a two-sided\nsword considering the trade-off described above.\n\nAnother aspect is workload consumption. The higher the allowed bandwidth, the more frequency lines have to be\nprocessed, which in turn increases the workload.\n\n\\section FRAMESIZES_AND_BIT_RESERVOIR Frame Sizes & Bit Reservoir\n\nFor AAC there is a difference between constant bit rate and constant frame\nlength due to the so-called bit reservoir technique, which allows the encoder to use less\nbits in an AAC frame for those audio signal sections which are easy to encode,\nand then spend them at a later point in\ntime for more complex audio sections. The extent to which this \"bit exchange\"\nis done is limited to allow for reliable and relatively low delay real time\nstreaming.\nOver a longer period in time the bitrate will be constant in the AAC constant\nbitrate mode, e.g. for ISDN transmission. This means that in AAC each bitstream\nframe will in general have a different length in bytes but over time it\nwill reach the target bitrate. One could also make an MPEG compliant\nAAC encoder which always produces constant length packages for each AAC frame,\nbut the audio quality would be considerably worse since the bit reservoir\ntechnique would have to be switched off completely. A higher bit rate would have\nto be used to get the same audio quality as with an enabled bit reservoir.\n\nThe maximum AAC frame length, regardless of the available bit reservoir, is defined\nas 6144 bits per channel.\n\nFor mp3 by the way, the same bit reservoir technique exists, but there each bit\nstream frame has a constant length for a given bit rate (ignoring the\npadding byte). In mp3 there is a so-called \"back pointer\" which tells\nthe decoder which bits belong to the current mp3 frame - and in general some or\nmany bits have been transmitted in an earlier mp3 frame. Basically this leads to\nthe same \"bit exchange between mp3 frames\" as in AAC but with virtually constant\nlength frames.\n\nThis variable frame length at \"constant bit rate\" is not something special\nin this Fraunhofer IIS AAC encoder. AAC has been designed in that way.\n\n\\subsection BEHAVIOUR_ESTIM_AVG_FRAMESIZES Estimating Average Frame Sizes\n\nA HE-AAC v1 or v2 audio frame contains 2048 PCM samples per channel (there is\nalso one mode with 1920 samples per channel but this is only for special purposes\nsuch as DAB+ digital radio).\n\nThe number of HE-AAC frames \\f$N\\_FRAMES\\f$ per second at 44.1 kHz is:\n\n\\f[\nN\\_FRAMES = 44100 / 2048 = 21.5332\n\\f]\n\nAt a bit rate of 8 kbps the average number of bits per frame \\f$N\\_BITS\\_PER\\_FRAME\\f$ is:\n\n\\f[\nN\\_BITS\\_PER\\_FRAME = 8000 / 21.5332 = 371.52\n\\f]\n\nwhich is about 46.44 bytes per encoded frame.\n\nAt a bit rate of 32 kbps, which is quite high for single channel HE-AAC v1, it is:\n\n\\f[\nN\\_BITS\\_PER\\_FRAME = 32000 / 21.5332 = 1486\n\\f]\n\nwhich is about 185.76 bytes per encoded frame.\n\nThese bits/frame figures are average figures where each AAC frame generally has a different\nsize in bytes. To calculate the same for AAC-LC just use 1024 instead of 2048 PCM samples per\nframe and channel.\nFor AAC-LD/ELD it is either 480 or 512 PCM samples per frame and channel.\n\n\n\\section BEHAVIOUR_TOOLS Encoder Tools\n\nThe AAC encoder supports TNS, PNS, MS, Intensity and activates these tools depending on the audio signal and\nthe encoder configuration (i.e. bitrate or AOT). It is not required to configure these tools manually.\n\nPNS improves encoding quality only for certain bitrates. Therefore it makes sense to activate PNS only for\nthese bitrates and save the processing power required for PNS (about 10 % of the encoder) when using other\nbitrates. This is done automatically inside the encoder library. PNS is disabled inside the encoder library if\nan MPEG-2 AOT is choosen since PNS is an MPEG-4 AAC feature.\n\nIf SBR is activated, the encoder automatically deactivates PNS internally. If TNS is disabled but PNS is allowed,\nthe encoder deactivates PNS calculation internally.\n\n*/\n\n#ifndef _AAC_ENC_LIB_H_\n#define _AAC_ENC_LIB_H_\n\n#include \"machine_type.h\"\n#include \"FDK_audio.h\"\n\n#define AACENCODER_LIB_VL0 3\n#define AACENCODER_LIB_VL1 4\n#define AACENCODER_LIB_VL2 22\n\n/**\n *  AAC encoder error codes.\n */\ntypedef enum {\n    AACENC_OK                     = 0x0000,  /*!< No error happened. All fine. */\n\n    AACENC_INVALID_HANDLE         = 0x0020,  /*!< Handle passed to function call was invalid. */\n    AACENC_MEMORY_ERROR           = 0x0021,  /*!< Memory allocation failed. */\n    AACENC_UNSUPPORTED_PARAMETER  = 0x0022,  /*!< Parameter not available. */\n    AACENC_INVALID_CONFIG         = 0x0023,  /*!< Configuration not provided. */\n\n    AACENC_INIT_ERROR             = 0x0040,  /*!< General initialization error. */\n    AACENC_INIT_AAC_ERROR         = 0x0041,  /*!< AAC library initialization error. */\n    AACENC_INIT_SBR_ERROR         = 0x0042,  /*!< SBR library initialization error. */\n    AACENC_INIT_TP_ERROR          = 0x0043,  /*!< Transport library initialization error. */\n    AACENC_INIT_META_ERROR        = 0x0044,  /*!< Meta data library initialization error. */\n\n    AACENC_ENCODE_ERROR           = 0x0060,  /*!< The encoding process was interrupted by an unexpected error. */\n\n    AACENC_ENCODE_EOF             = 0x0080   /*!< End of file reached. */\n\n} AACENC_ERROR;\n\n\n/**\n *  AAC encoder buffer descriptors identifier.\n *  This identifier are used within buffer descriptors AACENC_BufDesc::bufferIdentifiers.\n */\ntypedef enum {\n    /* Input buffer identifier. */\n    IN_AUDIO_DATA      = 0,                  /*!< Audio input buffer, interleaved INT_PCM samples. */\n    IN_ANCILLRY_DATA   = 1,                  /*!< Ancillary data to be embedded into bitstream. */\n    IN_METADATA_SETUP  = 2,                  /*!< Setup structure for embedding meta data. */\n\n    /* Output buffer identifier. */\n    OUT_BITSTREAM_DATA = 3,                  /*!< Buffer holds bitstream output data. */\n    OUT_AU_SIZES       = 4                   /*!< Buffer contains sizes of each access unit. This information\n                                                  is necessary for superframing. */\n\n} AACENC_BufferIdentifier;\n\n\n/**\n *  AAC encoder handle.\n */\ntypedef struct AACENCODER *HANDLE_AACENCODER;\n\n\n/**\n *  Provides some info about the encoder configuration.\n */\ntypedef struct {\n\n    UINT                maxOutBufBytes;      /*!< Maximum number of encoder bitstream bytes within one frame.\n                                                  Size depends on maximum number of supported channels in encoder instance.\n                                                  For superframing (as used for example in DAB+), size has to be a multiple accordingly. */\n\n    UINT                maxAncBytes;         /*!< Maximum number of ancillary data bytes which can be inserted into\n                                                  bitstream within one frame. */\n\n    UINT                inBufFillLevel;      /*!< Internal input buffer fill level in samples per channel. This parameter\n                                                  will automatically be cleared if samplingrate or channel(Mode/Order) changes. */\n\n    UINT                inputChannels;       /*!< Number of input channels expected in encoding process. */\n\n    UINT                frameLength;         /*!< Amount of input audio samples consumed each frame per channel, depending\n                                                  on audio object type configuration. */\n\n    UINT                encoderDelay;        /*!< Codec delay in PCM samples/channel. Depends on framelength and AOT. Does not\n                                                  include framing delay for filling up encoder PCM input buffer. */\n\n    UCHAR               confBuf[64];         /*!< Configuration buffer in binary format as an AudioSpecificConfig\n                                                  or StreamMuxConfig according to the selected transport type. */\n\n    UINT                confSize;            /*!< Number of valid bytes in confBuf. */\n\n} AACENC_InfoStruct;\n\n\n/**\n *  Describes the input and output buffers for an aacEncEncode() call.\n */\ntypedef struct {\n    INT                 numBufs;             /*!< Number of buffers. */\n    void              **bufs;                /*!< Pointer to vector containing buffer addresses. */\n    INT                *bufferIdentifiers;   /*!< Identifier of each buffer element. See ::AACENC_BufferIdentifier. */\n    INT                *bufSizes;            /*!< Size of each buffer in 8-bit bytes. */\n    INT                *bufElSizes;          /*!< Size of each buffer element in bytes. */\n\n} AACENC_BufDesc;\n\n\n/**\n *  Defines the input arguments for an aacEncEncode() call.\n */\ntypedef struct {\n    INT                 numInSamples;        /*!< Number of valid input audio samples (multiple of input channels). */\n    INT                 numAncBytes;         /*!< Number of ancillary data bytes to be encoded. */\n\n} AACENC_InArgs;\n\n\n/**\n *  Defines the output arguments for an aacEncEncode() call.\n */\ntypedef struct {\n    INT                 numOutBytes;         /*!< Number of valid bitstream bytes generated during aacEncEncode(). */\n    INT                 numInSamples;        /*!< Number of input audio samples consumed by the encoder. */\n    INT                 numAncBytes;         /*!< Number of ancillary data bytes consumed by the encoder. */\n\n} AACENC_OutArgs;\n\n\n/**\n *  Meta Data Compression Profiles.\n */\ntypedef enum {\n    AACENC_METADATA_DRC_NONE          = 0,   /*!< None. */\n    AACENC_METADATA_DRC_FILMSTANDARD  = 1,   /*!< Film standard. */\n    AACENC_METADATA_DRC_FILMLIGHT     = 2,   /*!< Film light. */\n    AACENC_METADATA_DRC_MUSICSTANDARD = 3,   /*!< Music standard. */\n    AACENC_METADATA_DRC_MUSICLIGHT    = 4,   /*!< Music light. */\n    AACENC_METADATA_DRC_SPEECH        = 5    /*!< Speech. */\n\n} AACENC_METADATA_DRC_PROFILE;\n\n\n/**\n *  Meta Data setup structure.\n */\ntypedef struct {\n\n  AACENC_METADATA_DRC_PROFILE drc_profile;             /*!< MPEG DRC compression profile. See ::AACENC_METADATA_DRC_PROFILE. */\n  AACENC_METADATA_DRC_PROFILE comp_profile;            /*!< ETSI heavy compression profile. See ::AACENC_METADATA_DRC_PROFILE. */\n\n  INT                         drc_TargetRefLevel;      /*!< Used to define expected level to:\n                                                            Scaled with 16 bit. x*2^16. */\n  INT                         comp_TargetRefLevel;     /*!< Adjust limiter to avoid overload.\n                                                            Scaled with 16 bit. x*2^16. */\n\n  INT                         prog_ref_level_present;  /*!< Flag, if prog_ref_level is present */\n  INT                         prog_ref_level;          /*!< Programme Reference Level = Dialogue Level:\n                                                            -31.75dB .. 0 dB ; stepsize: 0.25dB\n                                                            Scaled with 16 bit. x*2^16.*/\n\n  UCHAR                       PCE_mixdown_idx_present; /*!< Flag, if dmx-idx should be written in programme config element */\n  UCHAR                       ETSI_DmxLvl_present;     /*!< Flag, if dmx-lvl should be written in ETSI-ancData */\n\n  SCHAR                       centerMixLevel;          /*!< Center downmix level (0...7, according to table) */\n  SCHAR                       surroundMixLevel;        /*!< Surround downmix level (0...7, according to table) */\n\n  UCHAR                       dolbySurroundMode;       /*!< Indication for Dolby Surround Encoding Mode.\n                                                            - 0: Dolby Surround mode not indicated\n                                                            - 1: 2-ch audio part is not Dolby surround encoded\n                                                            - 2: 2-ch audio part is Dolby surround encoded */\n} AACENC_MetaData;\n\n\n/**\n * AAC encoder control flags.\n *\n * In interaction with the ::AACENC_CONTROL_STATE parameter it is possible to get information about the internal\n * initialization process. It is also possible to overwrite the internal state from extern when necessary.\n */\ntypedef enum\n{\n    AACENC_INIT_NONE              = 0x0000,  /*!< Do not trigger initialization. */\n    AACENC_INIT_CONFIG            = 0x0001,  /*!< Initialize all encoder modules configuration. */\n    AACENC_INIT_STATES            = 0x0002,  /*!< Reset all encoder modules history buffer. */\n    AACENC_INIT_TRANSPORT         = 0x1000,  /*!< Initialize transport lib with new parameters. */\n    AACENC_RESET_INBUFFER         = 0x2000,  /*!< Reset fill level of internal input buffer. */\n    AACENC_INIT_ALL               = 0xFFFF   /*!< Initialize all. */\n}\nAACENC_CTRLFLAGS;\n\n\n/**\n * \\brief  AAC encoder setting parameters.\n *\n * Use aacEncoder_SetParam() function to configure, or use aacEncoder_GetParam() function to read\n * the internal status of the following parameters.\n */\ntypedef enum\n{\n  AACENC_AOT                      = 0x0100,  /*!< Audio object type. See ::AUDIO_OBJECT_TYPE in FDK_audio.h.\n                                                  - 2: MPEG-4 AAC Low Complexity.\n                                                  - 5: MPEG-4 AAC Low Complexity with Spectral Band Replication (HE-AAC).\n                                                  - 29: MPEG-4 AAC Low Complexity with Spectral Band Replication and Parametric Stereo (HE-AAC v2).\n                                                        This configuration can be used only with stereo input audio data.\n                                                  - 23: MPEG-4 AAC Low-Delay.\n                                                  - 39: MPEG-4 AAC Enhanced Low-Delay. Since there is no ::AUDIO_OBJECT_TYPE for ELD in\n                                                        combination with SBR defined, enable SBR explicitely by ::AACENC_SBR_MODE parameter. */\n\n  AACENC_BITRATE                  = 0x0101,  /*!< Total encoder bitrate. This parameter is mandatory and interacts with ::AACENC_BITRATEMODE.\n                                                  - CBR: Bitrate in bits/second.\n                                                    See \\ref suppBitrates for details. */\n\n  AACENC_BITRATEMODE              = 0x0102,  /*!< Bitrate mode. Configuration can be different kind of bitrate configurations:\n                                                  - 0: Constant bitrate, use bitrate according to ::AACENC_BITRATE. (default)\n                                                       Within none LD/ELD ::AUDIO_OBJECT_TYPE, the CBR mode makes use of full allowed bitreservoir.\n                                                       In contrast, at Low-Delay ::AUDIO_OBJECT_TYPE the bitreservoir is kept very small.\n                                                  - 8: LD/ELD full bitreservoir for packet based transmission. */\n\n  AACENC_SAMPLERATE               = 0x0103,  /*!< Audio input data sampling rate. Encoder supports following sampling rates:\n                                                  8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000, 64000, 88200, 96000 */\n\n  AACENC_SBR_MODE                 = 0x0104,  /*!< Configure SBR independently of the chosen Audio Object Type ::AUDIO_OBJECT_TYPE.\n                                                  This parameter is for ELD audio object type only.\n                                                  - -1: Use ELD SBR auto configurator (default).\n                                                  - 0: Disable Spectral Band Replication.\n                                                  - 1: Enable Spectral Band Replication. */\n\n  AACENC_GRANULE_LENGTH           = 0x0105,  /*!< Core encoder (AAC) audio frame length in samples:\n                                                  - 1024: Default configuration.\n                                                  - 512: Default LD/ELD configuration.\n                                                  - 480: Optional length in LD/ELD configuration. */\n\n  AACENC_CHANNELMODE              = 0x0106,  /*!< Set explicit channel mode. Channel mode must match with number of input channels.\n                                                  - 1-7 and 33,34: MPEG channel modes supported, see ::CHANNEL_MODE in FDK_audio.h. */\n\n  AACENC_CHANNELORDER             = 0x0107,  /*!< Input audio data channel ordering scheme:\n                                                  - 0: MPEG channel ordering (e. g. 5.1: C, L, R, SL, SR, LFE). (default)\n                                                  - 1: WAVE file format channel ordering (e. g. 5.1: L, R, C, LFE, SL, SR). */\n\n  AACENC_SBR_RATIO                = 0x0108,  /*!<  Controls activation of downsampled SBR. With downsampled SBR, the delay will be\n                                                   shorter. On the other hand, for achieving the same quality level, downsampled SBR\n                                                   needs more bits than dual-rate SBR.\n                                                   With downsampled SBR, the AAC encoder will work at the same sampling rate as the\n                                                   SBR encoder (single rate).\n                                                   Downsampled SBR is supported for AAC-ELD and HE-AACv1.\n                                                   - 1: Downsampled SBR (default for ELD).\n                                                   - 2: Dual-rate SBR   (default for HE-AAC). */\n\n  AACENC_AFTERBURNER              = 0x0200,  /*!< This parameter controls the use of the afterburner feature.\n                                                  The afterburner is a type of analysis by synthesis algorithm which increases the\n                                                  audio quality but also the required processing power. It is recommended to always\n                                                  activate this if additional memory consumption and processing power consumption\n                                                  is not a problem. If increased MHz and memory consumption are an issue then the MHz\n                                                  and memory cost of this optional module need to be evaluated against the improvement\n                                                  in audio quality on a case by case basis.\n                                                  - 0: Disable afterburner (default).\n                                                  - 1: Enable afterburner. */\n\n  AACENC_BANDWIDTH                = 0x0203,  /*!< Core encoder audio bandwidth:\n                                                  - 0: Determine bandwidth internally (default, see chapter \\ref BEHAVIOUR_BANDWIDTH).\n                                                  - 1 to fs/2: Frequency bandwidth in Hertz. (Experts only, better do not\n                                                               touch this value to avoid degraded audio quality) */\n\n  AACENC_PEAK_BITRATE             = 0x0207,  /*!< Peak bitrate configuration parameter to adjust maximum bits per audio frame. Bitrate is in bits/second. \n                                                  The peak bitrate will internally be limited to the chosen bitrate ::AACENC_BITRATE as lower limit\n                                                  and the number_of_effective_channels*6144 bit as upper limit.\n\n                                                  Setting the peak bitrate equal to ::AACENC_BITRATE does not necessarily mean that the audio frames\n                                                  will be of constant size. Since the peak bitate is in bits/second, the frame sizes can vary by\n                                                  one byte in one or the other direction over various frames. However, it is not recommended to reduce\n                                                  the peak pitrate to ::AACENC_BITRATE - it would disable the bitreservoir, which would affect the\n                                                  audio quality by a large amount. */\n\n  AACENC_TRANSMUX                 = 0x0300,  /*!< Transport type to be used. See ::TRANSPORT_TYPE in FDK_audio.h. Following\n                                                  types can be configured in encoder library:\n                                                  - 0: raw access units\n                                                  - 1: ADIF bitstream format\n                                                  - 2: ADTS bitstream format\n                                                  - 6: Audio Mux Elements (LATM) with muxConfigPresent = 1\n                                                  - 7: Audio Mux Elements (LATM) with muxConfigPresent = 0, out of band StreamMuxConfig\n                                                  - 10: Audio Sync Stream (LOAS) */\n\n  AACENC_HEADER_PERIOD            = 0x0301,  /*!< Frame count period for sending in-band configuration buffers within LATM/LOAS\n                                                  transport layer. Additionally this parameter configures the PCE repetition period\n                                                  in raw_data_block(). See \\ref encPCE.\n                                                  - 0xFF: auto-mode default 10 for TT_MP4_ADTS, TT_MP4_LOAS and TT_MP4_LATM_MCP1, otherwise 0.\n                                                  - n: Frame count period. */\n\n  AACENC_SIGNALING_MODE           = 0x0302,  /*!< Signaling mode of the extension AOT:\n                                                  - 0: Implicit backward compatible signaling (default for non-MPEG-4 based\n                                                       AOT's and for the transport formats ADIF and ADTS)\n                                                       - A stream that uses implicit signaling can be decoded by every AAC decoder, even AAC-LC-only decoders\n                                                       - An AAC-LC-only decoder will only decode the low-frequency part of the stream, resulting in a band-limited output\n                                                       - This method works with all transport formats\n                                                       - This method does not work with downsampled SBR\n                                                  - 1: Explicit backward compatible signaling\n                                                       - A stream that uses explicit backward compatible signaling can be decoded by every AAC decoder, even AAC-LC-only decoders\n                                                       - An AAC-LC-only decoder will only decode the low-frequency part of the stream, resulting in a band-limited output\n                                                       - A decoder not capable of decoding PS will only decode the AAC-LC+SBR part.\n                                                         If the stream contained PS, the result will be a a decoded mono downmix\n                                                       - This method does not work with ADIF or ADTS. For LOAS/LATM, it only works with AudioMuxVersion==1\n                                                       - This method does work with downsampled SBR\n                                                  - 2: Explicit hierarchical signaling (default for MPEG-4 based AOT's and for all transport formats excluding ADIF and ADTS)\n                                                       - A stream that uses explicit hierarchical signaling can be decoded only by HE-AAC decoders\n                                                       - An AAC-LC-only decoder will not decode a stream that uses explicit hierarchical signaling\n                                                       - A decoder not capable of decoding PS will not decode the stream at all if it contained PS\n                                                       - This method does not work with ADIF or ADTS. It works with LOAS/LATM and the MPEG-4 File format\n                                                       - This method does work with downsampled SBR\n\n                                                   For making sure that the listener always experiences the best audio quality,\n                                                   explicit hierarchical signaling should be used.\n                                                   This makes sure that only a full HE-AAC-capable decoder will decode those streams.\n                                                   The audio is played at full bandwidth.\n                                                   For best backwards compatibility, it is recommended to encode with implicit SBR signaling.\n                                                   A decoder capable of AAC-LC only will then only decode the AAC part, which means the decoded\n                                                   audio will sound band-limited.\n\n                                                   For MPEG-2 transport types (ADTS,ADIF), only implicit signaling is possible.\n\n                                                   For LOAS and LATM, explicit backwards compatible signaling only works together with AudioMuxVersion==1.\n                                                   The reason is that, for explicit backwards compatible signaling, additional information will be appended to the ASC.\n                                                   A decoder that is only capable of decoding AAC-LC will skip this part.\n                                                   Nevertheless, for jumping to the end of the ASC, it needs to know the ASC length.\n                                                   Transmitting the length of the ASC is a feature of AudioMuxVersion==1, it is not possible to transmit the\n                                                   length of the ASC with AudioMuxVersion==0, therefore an AAC-LC-only decoder will not be able to parse a\n                                                   LOAS/LATM stream that was being encoded with AudioMuxVersion==0.\n\n                                                   For downsampled SBR, explicit signaling is mandatory. The reason for this is that the\n                                                   extension sampling frequency (which is in case of SBR the sampling frequqncy of the SBR part)\n                                                   can only be signaled in explicit mode.\n\n                                                   For AAC-ELD, the SBR information is transmitted in the ELDSpecific Config, which is part of the\n                                                   AudioSpecificConfig. Therefore, the settings here will have no effect on AAC-ELD.*/\n\n  AACENC_TPSUBFRAMES              = 0x0303,  /*!< Number of sub frames in a transport frame for LOAS/LATM or ADTS (default 1).\n                                                  - ADTS: Maximum number of sub frames restricted to 4.\n                                                  - LOAS/LATM: Maximum number of sub frames restricted to 2.*/\n\n  AACENC_AUDIOMUXVER              = 0x0304,  /*!< AudioMuxVersion to be used for LATM. (AudioMuxVersionA, currently not implemented):\n                                                  - 0: Default, no transmission of tara Buffer fullness, no ASC length and including actual latm Buffer fullnes.\n                                                  - 1: Transmission of tara Buffer fullness, ASC length and actual latm Buffer fullness.\n                                                  - 2: Transmission of tara Buffer fullness, ASC length and maximum level of latm Buffer fullness. */\n\n  AACENC_PROTECTION               = 0x0306,  /*!< Configure protection in tranpsort layer:\n                                                  - 0: No protection. (default)\n                                                  - 1: CRC active for ADTS bitstream format. */\n\n  AACENC_ANCILLARY_BITRATE        = 0x0500,  /*!< Constant ancillary data bitrate in bits/second.\n                                                  - 0: Either no ancillary data or insert exact number of bytes, denoted via\n                                                       input parameter, numAncBytes in AACENC_InArgs.\n                                                  - else: Insert ancillary data with specified bitrate. */\n\n  AACENC_METADATA_MODE            = 0x0600,  /*!< Configure Meta Data. See ::AACENC_MetaData for further details:\n                                                  - 0: Do not embed any metadata.\n                                                  - 1: Embed MPEG defined metadata only.\n                                                  - 2: Embed all metadata. */\n\n  AACENC_CONTROL_STATE            = 0xFF00,  /*!< There is an automatic process which internally reconfigures the encoder instance\n                                                  when a configuration parameter changed or an error occured. This paramerter allows\n                                                  overwriting or getting the control status of this process. See ::AACENC_CTRLFLAGS. */\n\n  AACENC_NONE                     = 0xFFFF   /*!< ------ */\n\n} AACENC_PARAM;\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/**\n * \\brief  Open an instance of the encoder.\n *\n * Allocate memory for an encoder instance with a functional range denoted by the function parameters.\n * Preinitialize encoder instance with default configuration.\n *\n * \\param phAacEncoder  A pointer to an encoder handle. Initialized on return.\n * \\param encModules    Specify encoder modules to be supported in this encoder instance:\n *                      - 0x0: Allocate memory for all available encoder modules.\n *                      - else: Select memory allocation regarding encoder modules. Following flags are possible and can be combined.\n *                              - 0x01: AAC module.\n *                              - 0x02: SBR module.\n *                              - 0x04: PS module.\n *                              - 0x10: Metadata module.\n *                              - example: (0x01|0x02|0x04|0x10) allocates all modules and is equivalent to default configuration denotet by 0x0.\n * \\param maxChannels   Number of channels to be allocated. This parameter can be used in different ways:\n *                      - 0: Allocate maximum number of AAC and SBR channels as supported by the library.\n *                      - nChannels: Use same maximum number of channels for allocating memory in AAC and SBR module.\n *                      - nChannels | (nSbrCh<<8): Number of SBR channels can be different to AAC channels to save data memory.\n *\n * \\return\n *          - AACENC_OK, on succes.\n *          - AACENC_INVALID_HANDLE, AACENC_MEMORY_ERROR, AACENC_INVALID_CONFIG, on failure.\n */\nAACENC_ERROR aacEncOpen(\n        HANDLE_AACENCODER        *phAacEncoder,\n        const UINT                encModules,\n        const UINT                maxChannels\n        );\n\n\n/**\n * \\brief  Close the encoder instance.\n *\n * Deallocate encoder instance and free whole memory.\n *\n * \\param phAacEncoder  Pointer to the encoder handle to be deallocated.\n *\n * \\return\n *          - AACENC_OK, on success.\n *          - AACENC_INVALID_HANDLE, on failure.\n */\nAACENC_ERROR aacEncClose(\n        HANDLE_AACENCODER        *phAacEncoder\n        );\n\n\n/**\n * \\brief Encode audio data.\n *\n * This function is mainly for encoding audio data. In addition the function can be used for an encoder (re)configuration\n * process.\n * - PCM input data will be retrieved from external input buffer until the fill level allows encoding a single frame.\n *   This functionality allows an external buffer with reduced size in comparison to the AAC or HE-AAC audio frame length.\n * - If the value of the input samples argument is zero, just internal reinitialization will be applied if it is\n *   requested.\n * - At the end of a file the flushing process can be triggerd via setting the value of the input samples argument to -1.\n *   The encoder delay lines are fully flushed when the encoder returns no valid bitstream data AACENC_OutArgs::numOutBytes.\n *   Furthermore the end of file is signaled by the return value AACENC_ENCODE_EOF.\n * - If an error occured in the previous frame or any of the encoder parameters changed, an internal reinitialization\n *   process will be applied before encoding the incoming audio samples.\n * - The function can also be used for an independent reconfiguration process without encoding. The first parameter has to be a\n *   valid encoder handle and all other parameters can be set to NULL.\n * - If the size of the external bitbuffer in outBufDesc is not sufficient for writing the whole bitstream, an internal\n *   error will be the return value and a reconfiguration will be triggered.\n *\n * \\param hAacEncoder           A valid AAC encoder handle.\n * \\param inBufDesc             Input buffer descriptor, see AACENC_BufDesc:\n *                              - At least one input buffer with audio data is expected.\n *                              - Optionally a second input buffer with ancillary data can be fed.\n * \\param outBufDesc            Output buffer descriptor, see AACENC_BufDesc:\n *                              - Provide one output buffer for the encoded bitstream.\n * \\param inargs                Input arguments, see AACENC_InArgs.\n * \\param outargs               Output arguments, AACENC_OutArgs.\n *\n * \\return\n *          - AACENC_OK, on success.\n *          - AACENC_INVALID_HANDLE, AACENC_ENCODE_ERROR, on failure in encoding process.\n *          - AACENC_INVALID_CONFIG, AACENC_INIT_ERROR, AACENC_INIT_AAC_ERROR, AACENC_INIT_SBR_ERROR, AACENC_INIT_TP_ERROR,\n *            AACENC_INIT_META_ERROR, on failure in encoder initialization.\n *          - AACENC_ENCODE_EOF, when flushing fully concluded.\n */\nAACENC_ERROR aacEncEncode(\n        const HANDLE_AACENCODER   hAacEncoder,\n        const AACENC_BufDesc     *inBufDesc,\n        const AACENC_BufDesc     *outBufDesc,\n        const AACENC_InArgs      *inargs,\n        AACENC_OutArgs           *outargs\n        );\n\n\n/**\n * \\brief  Acquire info about present encoder instance.\n *\n * This function retrieves information of the encoder configuration. In addition to informative internal states,\n * a configuration data block of the current encoder settings will be returned. The format is either Audio Specific Config\n * in case of Raw Packets transport format or StreamMuxConfig in case of LOAS/LATM transport format. The configuration\n * data block is binary coded as specified in ISO/IEC 14496-3 (MPEG-4 audio), to be used directly for MPEG-4 File Format\n * or RFC3016 or RFC3640 applications.\n *\n * \\param hAacEncoder           A valid AAC encoder handle.\n * \\param pInfo                 Pointer to AACENC_InfoStruct. Filled on return.\n *\n * \\return\n *          - AACENC_OK, on succes.\n *          - AACENC_INIT_ERROR, on failure.\n */\nAACENC_ERROR aacEncInfo(\n        const HANDLE_AACENCODER   hAacEncoder,\n        AACENC_InfoStruct        *pInfo\n        );\n\n\n/**\n * \\brief  Set one single AAC encoder parameter.\n *\n * This function allows configuration of all encoder parameters specified in ::AACENC_PARAM. Each parameter must be\n * set with a separate function call. An internal validation of the configuration value range will be done and an\n * internal reconfiguration will be signaled. The actual configuration adoption is part of the subsequent aacEncEncode() call.\n *\n * \\param hAacEncoder           A valid AAC encoder handle.\n * \\param param                 Parameter to be set. See ::AACENC_PARAM.\n * \\param value                 Parameter value. See parameter description in ::AACENC_PARAM.\n *\n * \\return\n *          - AACENC_OK, on success.\n *          - AACENC_INVALID_HANDLE, AACENC_UNSUPPORTED_PARAMETER, AACENC_INVALID_CONFIG, on failure.\n */\nAACENC_ERROR aacEncoder_SetParam(\n        const HANDLE_AACENCODER   hAacEncoder,\n        const AACENC_PARAM        param,\n        const UINT                value\n        );\n\n\n/**\n * \\brief  Get one single AAC encoder parameter.\n *\n * This function is the complement to aacEncoder_SetParam(). After encoder reinitialization with user defined settings,\n * the internal status can be obtained of each parameter, specified with ::AACENC_PARAM.\n *\n * \\param hAacEncoder           A valid AAC encoder handle.\n * \\param param                 Parameter to be returned. See ::AACENC_PARAM.\n *\n * \\return  Internal configuration value of specifed parameter ::AACENC_PARAM.\n */\nUINT aacEncoder_GetParam(\n        const HANDLE_AACENCODER   hAacEncoder,\n        const AACENC_PARAM        param\n        );\n\n\n/**\n * \\brief  Get information about encoder library build.\n *\n * Fill a given LIB_INFO structure with library version information.\n *\n * \\param info  Pointer to an allocated LIB_INFO struct.\n *\n * \\return\n *          - AACENC_OK, on success.\n *          - AACENC_INVALID_HANDLE, AACENC_INIT_ERROR, on failure.\n */\nAACENC_ERROR aacEncGetLibInfo(\n        LIB_INFO                 *info\n        );\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif   /* _AAC_ENC_LIB_H_ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/FDK_archdef.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  ***********************\n\n   Author(s):\n   Description:\n\n******************************************************************************/\n\n#ifndef __ARCH_H__\n#define __ARCH_H__\n\n/* Performance / Quality profile selector */\n  #define FDK_HIGH_PERFORMANCE\n\n/* Unify some few toolchain specific defines to avoid having large \"or\" macro contraptions all over the source code. */\n\n/* Take action against VisualStudio 2005 crosscompile problems. */\n\n/* Use single macro (the GCC built in macro) for architecture identification independent of the particular toolchain */\n#if defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__) || (defined(_MSC_VER) && defined(_M_IX86)) || defined (__x86_64__) || (defined(_MSC_VER) && defined(_M_X64))\n#define __x86__\n#endif\n\n#if (defined(_M_ARM) || defined(__CC_ARM)) && !defined(__arm__) || defined(__TI_TMS470_V5__) && !defined(__arm__)\n#define __arm__\n#endif\n\n#if defined(_ARCH_PPC) && !defined(__powerpc__)\n#define __powerpc__ 1\n#endif\n\n\n\n/* Define __ARM_ARCH_5TE__ if armv5te features are supported  */\n#if (__TARGET_ARCH_ARM == 5) || defined(__TARGET_FEATURE_DSPMUL) || (_M_ARM == 5) || defined(__ARM_ARCH_5TEJ__) || defined(__TI_TMS470_V5__) || \\\n        defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)\n#define __ARM_ARCH_5TE__\n#endif\n\n/* Define __ARM_ARCH_6__ if the armv6 intructions are being supported. */\n#if (__TARGET_ARCH_ARM == 6) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6ZK__)\n#define __ARM_ARCH_5TE__\n#define __ARM_ARCH_6__\n#endif\n\n/* Define __ARM_ARCH_7_A__ if the armv7 intructions are being supported. */\n#if defined(__TARGET_ARCH_7_R) || defined(__ARM_ARCH_7R__)\n#define __ARM_ARCH_5TE__\n#define __ARM_ARCH_6__\n#define __ARM_ARCH_7_R__\n#endif\n\n/* Define __ARM_ARCH_7_A__ if the armv7 intructions are being supported. */\n#if defined(__TARGET_ARCH_7_A) || defined(__ARM_ARCH_7A__)\n#define __ARM_ARCH_5TE__\n#define __ARM_ARCH_6__\n#define __ARM_ARCH_7_A__\n#endif\n\n/* Define __ARM_ARCH_7M__ if the ARMv7-M instructions are being supported, e.g. Cortex-M3. */\n#if defined(__TARGET_ARCH_7_M) || defined(__ARM_ARCH_7_M__)\n#define __ARM_ARCH_7M__\n#endif\n\n/* Define __ARM_ARCH_7EM__ if the ARMv7-ME instructions are being supported, e.g. Cortex-M4. */\n#if defined(__TARGET_ARCH_7E_M) || defined(__ARM_ARCH_7E_M__) || defined(__ARM_ARCH_8M_MAIN__)\n#undef __ARM_ARCH_7EM__\n#define __ARM_ARCH_7EM__\n#endif\n\n/* Detect and unify macros for neon feature. */\n#if defined(__TARGET_FEATURE_NEON) && !defined(__ARM_NEON__)\n#define __ARM_NEON__\n#endif\n\n#ifdef _M_ARM\n#include \"armintr.h\"\n#endif\n\n\n/* Define preferred Multiplication type */\n#if defined(FDK_HIGH_PERFORMANCE) && !defined(FDK_HIGH_QUALITY) /* FDK_HIGH_PERFORMANCE */\n\n#if defined(__mips__) || defined(__sh__)\n#define ARCH_PREFER_MULT_16x16\n#undef SINETABLE_16BIT\n#undef POW2COEFF_16BIT\n#undef LDCOEFF_16BIT\n#undef WINDOWTABLE_16BIT\n\n#elif defined(__arm__) && defined(__ARM_ARCH_5TE__)\t/* cppp replaced: elif */\t/* cppp replaced: elif */\n#define ARCH_PREFER_MULT_32x16\n#define SINETABLE_16BIT\n#define POW2COEFF_16BIT\n#define LDCOEFF_16BIT\n#define WINDOWTABLE_16BIT\n\n#elif defined(__arm__) && defined(__ARM_ARCH_7M__)\n#define ARCH_PREFER_MULT_32x16\n#define SINETABLE_16BIT\n#define POW2COEFF_16BIT\n#define LDCOEFF_16BIT\n#define WINDOWTABLE_16BIT\n\n#elif defined(__arm__) && defined(__ARM_ARCH_7EM__)\n#define ARCH_PREFER_MULT_32x32\n#define ARCH_PREFER_MULT_32x16\n#define SINETABLE_16BIT\n#define POW2COEFF_16BIT\n#define LDCOEFF_16BIT\n#define WINDOWTABLE_16BIT\n\n#elif defined(__arm__) && !defined(__ARM_ARCH_5TE__)\n#define ARCH_PREFER_MULT_16x16\n#undef SINETABLE_16BIT\n#undef WINDOWTABLE_16BIT\n#undef POW2COEFF_16BIT\n#undef LDCOEFF_16BIT\n\n#elif defined(__aarch64__) || defined(__AARCH64EL__)\n#define ARCH_PREFER_MULT_32x32\n#define ARCH_PREFER_MULT_32x16\n#define SINETABLE_16BIT\n#define POW2COEFF_16BIT\n#define LDCOEFF_16BIT\n#define WINDOWTABLE_16BIT\n\n#elif defined(__x86__)\t/* cppp replaced: elif */\n#define ARCH_PREFER_MULT_32x16\n#define SINETABLE_16BIT\n#define WINDOWTABLE_16BIT\n#define POW2COEFF_16BIT\n#define LDCOEFF_16BIT\n\n#elif defined(__powerpc__)\n#define ARCH_PREFER_MULT_32x32\n#define ARCH_PREFER_MULT_32x16\n#define SINETABLE_16BIT\n#define POW2COEFF_16BIT\n#define LDCOEFF_16BIT\n#define WINDOWTABLE_16BIT\n\n#else\n\n  #warning  >>>> Please set architecture characterization defines for your platform (FDK_HIGH_PERFORMANCE)! <<<<\n\n#endif /* Architecture switches */\n\n#else /* neither FDK_HIGH_QUALITY or FDK_HIGH_PERFORMANCE */\n\n#error Either set FDK_HIGH_QUALITY or FDK_HIGH_PERFORMANCE, but not both nor none of them.\n\n#endif /* End of quality/complexity tradeoff */\n\n#define FDKTOOLS_PACKED_TABLES\n\n\n#ifdef SINETABLE_16BIT\n  #define FIXP_STB FIXP_SGL     /* STB sinus Tab used in transformation */\n  #define FIXP_STP FIXP_SPK\n  #define STC(a) (FX_DBL2FXCONST_SGL(a))\n#else\n  #define FIXP_STB FIXP_DBL\n  #define FIXP_STP FIXP_DPK\n  #define STC(a) ((FIXP_DBL)(LONG)(a))\n#endif /* defined(SINETABLE_16BIT) */\n\n#define STCP(cos,sin) { { STC(cos), STC(sin) } }\n\n\n#ifdef WINDOWTABLE_16BIT\n  #define FIXP_WTB FIXP_SGL /* single FIXP_SGL values */\n  #define FIXP_WTP FIXP_SPK /* packed FIXP_SGL values */\n  #define WTC(a) FX_DBL2FXCONST_SGL(a)\n#else /* SINETABLE_16BIT */\n  #define FIXP_WTB FIXP_DBL\n  #define FIXP_WTP FIXP_DPK\n  #define WTC(a) (FIXP_DBL)(a)\n#endif /* SINETABLE_16BIT */\n\n#define WTCP(a,b) { { WTC(a), WTC(b) } }\n\n\n#endif /* __ARCH_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/FDK_bitbuffer.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  ***********************\n\n   Author(s):   M. Lohwasser\n   Description: common bitbuffer read/write routines\n\n******************************************************************************/\n\n#ifndef __FDK_BITBUFFER_H__\n#define __FDK_BITBUFFER_H__\n\n\n\n#include \"machine_type.h\"\n\ntypedef struct\n{\n  UINT ValidBits;\n  UINT ReadOffset;\n  UINT WriteOffset;\n  UINT BitCnt;\n  UINT BitNdx;\n\n  UCHAR *Buffer;\n  UINT   bufSize;\n  UINT   bufBits;\n} FDK_BITBUF;\n\ntypedef FDK_BITBUF *HANDLE_FDK_BITBUF;\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\nextern const UINT BitMask [32+1];\n\n/**  The BitBuffer Functions are called straight from FDK_bitstream Interface.\n     For Functions functional survey look there.\n*/\n\nvoid FDK_CreateBitBuffer (HANDLE_FDK_BITBUF *hBitBuffer, UCHAR *pBuffer, UINT bufSize) ;\n\nvoid FDK_InitBitBuffer   (HANDLE_FDK_BITBUF hBitBuffer, UCHAR *pBuffer,\n                          UINT bufSize, UINT validBits) ;\n\nvoid FDK_ResetBitBuffer  (HANDLE_FDK_BITBUF hBitBuffer) ;\n\nvoid FDK_DeleteBitBuffer (HANDLE_FDK_BITBUF hBitBuffer) ;\n\nINT  FDK_get             (HANDLE_FDK_BITBUF hBitBuffer, const UINT numberOfBits) ;\n\nINT  FDK_get32           (HANDLE_FDK_BITBUF hBitBuffer) ;\n\nvoid FDK_put             (HANDLE_FDK_BITBUF hBitBuffer, UINT value, const UINT numberOfBits) ;\n\nINT  FDK_getBwd          (HANDLE_FDK_BITBUF hBitBuffer, const UINT numberOfBits);\nvoid FDK_putBwd          (HANDLE_FDK_BITBUF hBitBuffer, UINT value, const UINT numberOfBits) ;\n\nvoid FDK_pushBack        (HANDLE_FDK_BITBUF hBitBuffer, const UINT numberOfBits, UCHAR config) ;\nvoid FDK_pushForward     (HANDLE_FDK_BITBUF hBitBuffer, const UINT numberOfBits, UCHAR config) ;\n\nvoid FDK_byteAlign       (HANDLE_FDK_BITBUF hBitBuffer, UCHAR config) ;\n\nUINT FDK_getValidBits    (HANDLE_FDK_BITBUF hBitBuffer) ;\nINT  FDK_getFreeBits     (HANDLE_FDK_BITBUF hBitBuffer) ;\n\nvoid FDK_setBitCnt       (HANDLE_FDK_BITBUF hBitBuffer, const UINT value) ;\nINT  FDK_getBitCnt       (HANDLE_FDK_BITBUF hBitBuffer) ;\n\nvoid FDK_Feed            (HANDLE_FDK_BITBUF hBitBuffer, UCHAR inputBuffer [],\n                          const UINT bufferSize, UINT *bytesValid) ;\n\nvoid FDK_Copy            (HANDLE_FDK_BITBUF hBitBufDst, HANDLE_FDK_BITBUF hBitBufSrc, UINT *bytesValid) ;\n\nvoid FDK_Fetch           (HANDLE_FDK_BITBUF hBitBuffer, UCHAR outBuf[], UINT *writeBytes);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/FDK_bitstream.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  ***********************\n\n   Author(s):   M. Lohwasser\n   Description: bitstream interface to bitbuffer routines\n\n******************************************************************************/\n\n#ifndef __FDK_BITSTREAM_H__\n#define __FDK_BITSTREAM_H__\n\n\n\n#include \"FDK_bitbuffer.h\"\n#include \"machine_type.h\"\n\n#include \"genericStds.h\"\n\n#define CACHE_BITS 32\n\ntypedef enum {\n    BS_READER,\n    BS_WRITER\n} FDK_BS_CFG;\n\n\ntypedef struct\n{\n  UINT       CacheWord ;\n  UINT       BitsInCache ;\n  FDK_BITBUF hBitBuf;\n  UINT       ConfigCache ;\n} FDK_BITSTREAM;\n\ntypedef FDK_BITSTREAM* HANDLE_FDK_BITSTREAM;\n\n/**\n * \\brief CreateBitStream Function.\n *\n * Create and initialize bitstream with extern allocated buffer.\n *\n * \\param pBuffer  Pointer to BitBuffer array.\n * \\param bufSize  Length of BitBuffer array. (awaits size 2^n)\n * \\param config   Initialize BitStream as Reader or Writer.\n */\nFDK_INLINE\nHANDLE_FDK_BITSTREAM FDKcreateBitStream (UCHAR *pBuffer,\n                                      UINT bufSize,\n                                      FDK_BS_CFG config = BS_READER)\n{\n  HANDLE_FDK_BITSTREAM hBitStream = (HANDLE_FDK_BITSTREAM) FDKcalloc(1, sizeof(FDK_BITSTREAM));\n  FDK_InitBitBuffer(&hBitStream->hBitBuf, pBuffer, bufSize, 0) ;\n\n  /* init cache */\n  hBitStream->CacheWord = hBitStream->BitsInCache = 0 ;\n  hBitStream->ConfigCache = config ;\n\n  return hBitStream ;\n}\n\n\n/**\n * \\brief Initialize BistreamBuffer. BitBuffer can point to filled BitBuffer array .\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param pBuffer    Pointer to BitBuffer array.\n * \\param bufSize    Length of BitBuffer array. (awaits size 2^n)\n * \\param validBits  Number of valid BitBuffer filled Bits.\n * \\param config     Initialize BitStream as Reader or Writer.\n * \\return void\n */\nFDK_INLINE\nvoid FDKinitBitStream (HANDLE_FDK_BITSTREAM hBitStream,\n                       UCHAR *pBuffer,\n                       UINT bufSize,\n                       UINT validBits,\n                       FDK_BS_CFG config = BS_READER)\n{\n  FDK_InitBitBuffer(&hBitStream->hBitBuf, pBuffer, bufSize, validBits) ;\n\n  /* init cache */\n  hBitStream->CacheWord = hBitStream->BitsInCache = 0 ;\n  hBitStream->ConfigCache = config ;\n}\n\n\n/**\n * \\brief ResetBitbuffer Function. Reset states in BitBuffer and Cache.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param config     Initialize BitStream as Reader or Writer.\n * \\return void\n */\nFDK_INLINE void FDKresetBitbuffer( HANDLE_FDK_BITSTREAM hBitStream, FDK_BS_CFG config = BS_READER)\n{\n  FDK_ResetBitBuffer( &hBitStream->hBitBuf ) ;\n\n  /* init cache */\n  hBitStream->CacheWord = hBitStream->BitsInCache = 0 ;\n  hBitStream->ConfigCache = config ;\n}\n\n\n/** DeleteBitStream.\n\n    Deletes the in Create Bitstream allocated BitStream and BitBuffer.\n*/\nFDK_INLINE void FDKdeleteBitStream (HANDLE_FDK_BITSTREAM hBitStream)\n{\n  FDK_DeleteBitBuffer(&hBitStream->hBitBuf) ;\n  FDKfree(hBitStream) ;\n}\n\n\n/**\n * \\brief ReadBits Function (forward). This function returns a number of sequential\n *        bits from the input bitstream.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param numberOfBits  The number of bits to be retrieved.\n * \\return the requested bits, right aligned\n * \\return\n */\n#define OPTIMIZE_FDKREADBITS\n\nFDK_INLINE UINT FDKreadBits(HANDLE_FDK_BITSTREAM hBitStream,\n                        const UINT numberOfBits)\n{\n#ifdef noOPTIMIZE_FDKREADBITS\n  INT missingBits = numberOfBits - hBitStream->BitsInCache;\n  if (missingBits > 0)\n  {\n    const UINT bits\t = hBitStream->CacheWord << missingBits;\n    const UINT validBits = FDK_getValidBits (&hBitStream->hBitBuf);\n\n    if (validBits >= 32)\n    {\n      hBitStream->CacheWord = FDK_get32 (&hBitStream->hBitBuf) ;\n      hBitStream->BitsInCache = CACHE_BITS - missingBits;\n    }\n    else\n    {\n      hBitStream->CacheWord = FDK_get (&hBitStream->hBitBuf,validBits) ;\n      if (validBits >= missingBits)\n      {\n        hBitStream->BitsInCache = validBits - missingBits;\n      }\n      else\n      {\n        hBitStream->BitsInCache = 0;\n        hBitStream->CacheWord <<= missingBits - validBits;\n      }\n    }\n\n    return ( bits | (hBitStream->CacheWord >> hBitStream->BitsInCache)) & BitMask[numberOfBits];\n  }\n\n  hBitStream->BitsInCache -= numberOfBits;\n  return ( hBitStream->CacheWord >> hBitStream->BitsInCache) & BitMask[numberOfBits];\n\n#else\n  const UINT validMask = BitMask [numberOfBits] ;\n\n  if (hBitStream->BitsInCache <= numberOfBits)\n  {\n    const INT  validBits  = FDK_getValidBits (&hBitStream->hBitBuf) ;\n    const INT  freeBits   = (CACHE_BITS-1) - hBitStream->BitsInCache ;\n    const INT  bitsToRead = (freeBits <= validBits) ? freeBits : validBits ;\n\n    hBitStream->CacheWord = (hBitStream->CacheWord << bitsToRead) | FDK_get (&hBitStream->hBitBuf,bitsToRead) ;\n    hBitStream->BitsInCache += bitsToRead ;\n    if (hBitStream->BitsInCache < numberOfBits)\n    {\n      hBitStream->CacheWord <<= numberOfBits - hBitStream->BitsInCache;\n      hBitStream->BitsInCache = 0;\n      return (hBitStream->CacheWord >> hBitStream->BitsInCache) & validMask ;\n    }\n  }\n\n  hBitStream->BitsInCache -= numberOfBits ;\n\n  return (hBitStream->CacheWord >> hBitStream->BitsInCache) & validMask ;\n#endif\n}\n\nFDK_INLINE UINT FDKreadBit(HANDLE_FDK_BITSTREAM hBitStream)\n{\n#ifdef OPTIMIZE_FDKREADBITS\n  if (!hBitStream->BitsInCache)\n  {\n    const UINT validBits = FDK_getValidBits (&hBitStream->hBitBuf);\n\n    if (validBits >= 32)\n    {\n      hBitStream->CacheWord = FDK_get32 (&hBitStream->hBitBuf);\n      hBitStream->BitsInCache = CACHE_BITS;\n    }\n    else if (validBits > 0)\n    {\n      hBitStream->CacheWord = FDK_get (&hBitStream->hBitBuf,validBits);\n      hBitStream->BitsInCache = validBits;\n    }\n    else\n    {\n      return 0;\n    }\n  }\n  hBitStream->BitsInCache--;\n\n  return (hBitStream->CacheWord >> hBitStream->BitsInCache) & 1;\n#else\n return FDKreadBits(hBitStream,1);\n#endif\n}\n\n/**\n * \\brief Read2Bits Function (forward). This function 2 sequential\n *        bits from the input bitstream. It is the optimized version\n          of FDKreadBits() for readign 2 bits.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\return the requested bits, right aligned\n * \\return\n */\ninline UINT FDKread2Bits(HANDLE_FDK_BITSTREAM hBitStream)\n{\n  UINT BitsInCache = hBitStream->BitsInCache;\n  if (BitsInCache < 2)  /* Comparison changed from 'less-equal' to 'less' */\n  {\n    const INT  validBits  = FDK_getValidBits (&hBitStream->hBitBuf) ;\n    const INT  freeBits   = (CACHE_BITS-1) - BitsInCache ;\n    const INT  bitsToRead = (freeBits <= validBits) ? freeBits : validBits ;\n\n    hBitStream->CacheWord = (hBitStream->CacheWord << bitsToRead) | FDK_get (&hBitStream->hBitBuf,bitsToRead) ;\n    BitsInCache += bitsToRead;\n  }\n  hBitStream->BitsInCache = BitsInCache - 2;\n  return (hBitStream->CacheWord >> hBitStream->BitsInCache) & 0x3;\n}\n\n/**\n * \\brief ReadBits Function (backward). This function returns a number of sequential bits\n *        from the input bitstream.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param numberOfBits  The number of bits to be retrieved.\n * \\return the requested bits, right aligned\n */\nFDK_INLINE UINT FDKreadBitsBwd(HANDLE_FDK_BITSTREAM hBitStream,\n                           const UINT numberOfBits)\n{\n  const UINT validMask = BitMask [numberOfBits] ;\n\n  if (hBitStream->BitsInCache <= numberOfBits)\n  {\n    const INT freeBits = (CACHE_BITS-1) - hBitStream->BitsInCache ;\n\n    hBitStream->CacheWord = (hBitStream->CacheWord << freeBits) | FDK_getBwd (&hBitStream->hBitBuf,freeBits) ;\n    hBitStream->BitsInCache += freeBits ;\n  }\n\n  hBitStream->BitsInCache -= numberOfBits ;\n\n  return (hBitStream->CacheWord >> hBitStream->BitsInCache) & validMask ;\n}\n\n\n/**\n * \\brief return a number of bits from the bitBuffer.\n *        You have to know what you do! Cache has to be synchronized before using this\n *        function.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param numBits The number of bits to be retrieved.\n * \\return the requested bits, right aligned\n */\nFDK_INLINE UINT FDKgetBits (HANDLE_FDK_BITSTREAM hBitStream, UINT numBits)\n{\n    return FDK_get (&hBitStream->hBitBuf, numBits) ;\n}\n\n\n/**\n * \\brief WriteBits Function. This function writes numberOfBits of value into bitstream.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param value         Variable holds data to be written.\n * \\param numberOfBits  The number of bits to be written.\n * \\return number of bits written\n */\nFDK_INLINE UCHAR FDKwriteBits(HANDLE_FDK_BITSTREAM hBitStream, UINT value,\n                     const UINT numberOfBits)\n{\n  const UINT validMask = BitMask [numberOfBits] ;\n\n  if ((hBitStream->BitsInCache+numberOfBits) < CACHE_BITS)\n  {\n    hBitStream->BitsInCache += numberOfBits ;\n    hBitStream->CacheWord   =  (hBitStream->CacheWord << numberOfBits) | (value & validMask);\n  }\n  else\n  {\n    FDK_put(&hBitStream->hBitBuf, hBitStream->CacheWord, hBitStream->BitsInCache) ;\n    hBitStream->BitsInCache = numberOfBits ;\n    hBitStream->CacheWord   = (value & validMask) ;\n  }\n\n return numberOfBits;\n}\n\n\n/**\n * \\brief WriteBits Function (backward). This function writes numberOfBits of value into bitstream.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param value         Variable holds data to be written.\n * \\param numberOfBits  The number of bits to be written.\n * \\return number of bits written\n */\nFDK_INLINE UCHAR FDKwriteBitsBwd(HANDLE_FDK_BITSTREAM hBitStream, UINT value,\n                                 const UINT numberOfBits)\n{\n  const UINT validMask = BitMask [numberOfBits] ;\n\n  if ((hBitStream->BitsInCache+numberOfBits) <= CACHE_BITS)\n  {\n    hBitStream->BitsInCache += numberOfBits ;\n    hBitStream->CacheWord   =  (hBitStream->CacheWord << numberOfBits) | (value & validMask);\n  }\n  else\n  {\n    FDK_putBwd(&hBitStream->hBitBuf, hBitStream->CacheWord, hBitStream->BitsInCache) ;\n    hBitStream->BitsInCache = numberOfBits ;\n    hBitStream->CacheWord   = (value & validMask) ;\n  }\n\n return numberOfBits;\n}\n\n\n/**\n * \\brief SyncCache Function. Clear cache after read forward.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\return void\n */\nFDK_INLINE void FDKsyncCache (HANDLE_FDK_BITSTREAM hBitStream)\n{\n  if (hBitStream->ConfigCache == BS_READER)\n    FDK_pushBack (&hBitStream->hBitBuf,hBitStream->BitsInCache,hBitStream->ConfigCache) ;\n  else                        /* BS_WRITER */\n    FDK_put(&hBitStream->hBitBuf, hBitStream->CacheWord, hBitStream->BitsInCache) ;\n\n  hBitStream->BitsInCache = 0 ;\n  hBitStream->CacheWord   = 0 ;\n}\n\n\n/**\n * \\brief SyncCache Function. Clear cache after read backwards.\n *\n * \\param  hBitStream HANDLE_FDK_BITSTREAM handle\n * \\return void\n */\nFDK_INLINE void FDKsyncCacheBwd (HANDLE_FDK_BITSTREAM hBitStream)\n{\n  if (hBitStream->ConfigCache == BS_READER) {\n    FDK_pushForward (&hBitStream->hBitBuf,hBitStream->BitsInCache,hBitStream->ConfigCache) ;\n  } else {                      /* BS_WRITER */\n    FDK_putBwd (&hBitStream->hBitBuf, hBitStream->CacheWord, hBitStream->BitsInCache) ;\n  }\n\n  hBitStream->BitsInCache = 0 ;\n  hBitStream->CacheWord   = 0 ;\n}\n\n\n/**\n * \\brief Byte Alignment Function.\n *        This function performs the byte_alignment() syntactic function on the input stream,\n *        i.e. some bits will be discarded/padded so that the next bits to be read/written will\n *        be aligned on a byte boundary with respect to the bit position 0.\n *\n * \\param  hBitStream HANDLE_FDK_BITSTREAM handle\n * \\return void\n */\nFDK_INLINE void FDKbyteAlign (HANDLE_FDK_BITSTREAM hBitStream)\n{\n  FDKsyncCache (hBitStream) ;\n  FDK_byteAlign (&hBitStream->hBitBuf, (UCHAR)hBitStream->ConfigCache) ;\n}\n\n\n/**\n * \\brief Byte Alignment Function with anchor\n *        This function performs the byte_alignment() syntactic function on the input stream,\n *        i.e. some bits will be discarded so that the next bits to be read/written would be aligned\n *        on a byte boundary with respect to the given alignment anchor.\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param alignmentAnchor bit position to be considered as origin for byte alignment\n * \\return void\n */\nFDK_INLINE void FDKbyteAlign (HANDLE_FDK_BITSTREAM hBitStream, UINT alignmentAnchor)\n{\n  FDKsyncCache (hBitStream) ;\n  if (hBitStream->ConfigCache == BS_READER) {\n    FDK_pushForward (&hBitStream->hBitBuf,\n                     (8 - ((alignmentAnchor - FDK_getValidBits(&hBitStream->hBitBuf)) & 0x07)) & 0x07,\n                     hBitStream->ConfigCache) ;\n  }\n  else {\n    FDK_put (&hBitStream->hBitBuf,\n             0,\n             (8 - ((FDK_getValidBits(&hBitStream->hBitBuf)-alignmentAnchor) & 0x07)) & 0x07 );\n  }\n}\n\n\n/**\n * \\brief Push Back(Cache) / For / BiDirectional Function.\n *        PushBackCache function ungets a number of bits erroneously read/written by the last Get() call.\n *       NB: The number of bits to be stuffed back into the stream may never exceed the\n *       number of bits returned by the immediately preceding Get() call.\n *\n *       PushBack function ungets a number of bits (combines cache and bitbuffer indices)\n *       PushFor  function gets a number of bits (combines cache and bitbuffer indices)\n *       PushBiDirectional gets/ungets number of bits as defined in PusBack/For function\n *       NB: The sign of bits is not known, so the function checks direction and calls\n *        appropriate function. (positive sign pushFor, negative sign pushBack )\n *\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param numberOfBits  The number of bits to be pushed back/for.\n * \\return void\n */\nFDK_INLINE void FDKpushBackCache (HANDLE_FDK_BITSTREAM hBitStream, const UINT numberOfBits)\n{\n  FDK_ASSERT ((hBitStream->BitsInCache+numberOfBits)<=CACHE_BITS);\n  hBitStream->BitsInCache += numberOfBits ;\n}\n\nFDK_INLINE void FDKpushBack (HANDLE_FDK_BITSTREAM hBitStream, const UINT numberOfBits)\n{\n  if ((hBitStream->BitsInCache+numberOfBits)ConfigCache == BS_READER) ) {\n    hBitStream->BitsInCache += numberOfBits ;\n    FDKsyncCache(hBitStream) ; /* sync cache to avoid invalid cache */\n  }\n  else {\n    FDKsyncCache(hBitStream) ;\n    FDK_pushBack(&hBitStream->hBitBuf,numberOfBits,hBitStream->ConfigCache);\n  }\n}\n\nFDK_INLINE void FDKpushFor (HANDLE_FDK_BITSTREAM hBitStream, const UINT numberOfBits)\n{\n  if ( (hBitStream->BitsInCache>numberOfBits) && (hBitStream->ConfigCache == BS_READER) ) {\n    hBitStream->BitsInCache -= numberOfBits;\n  }\n  else {\n    FDKsyncCache(hBitStream) ;\n    FDK_pushForward(&hBitStream->hBitBuf,numberOfBits,hBitStream->ConfigCache);\n  }\n}\n\nFDK_INLINE void FDKpushBiDirectional (HANDLE_FDK_BITSTREAM hBitStream, const INT numberOfBits)\n{\n  if(numberOfBits>=0)  FDKpushFor(hBitStream, numberOfBits) ;\n  else                 FDKpushBack(hBitStream, -numberOfBits) ;\n}\n\n\n/**\n * \\brief GetValidBits Function.  Clear cache and return valid Bits from Bitbuffer.\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\return amount of valid bits that still can be read or were already written.\n *\n */\nFDK_INLINE UINT FDKgetValidBits (HANDLE_FDK_BITSTREAM hBitStream)\n{\n  FDKsyncCache(hBitStream) ;\n  return FDK_getValidBits(&hBitStream->hBitBuf) ;\n}\n\n\n/**\n * \\brief return amount of unused Bits from Bitbuffer.\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\return amount of free bits that still can be written into the bitstream\n */\nFDK_INLINE INT FDKgetFreeBits (HANDLE_FDK_BITSTREAM hBitStream)\n{\n   return FDK_getFreeBits (&hBitStream->hBitBuf) ;\n}\n\n/**\n * \\brief reset bitcounter in bitBuffer to zero.\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\return void\n */\nFDK_INLINE void FDKresetBitCnt (HANDLE_FDK_BITSTREAM hBitStream)\n{\n    FDKsyncCache (hBitStream) ;\n    FDK_setBitCnt (&hBitStream->hBitBuf, 0) ;\n}\n\n/**\n * \\brief set bitcoutner in bitBuffer to given value.\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\param value new value to be assigned to the bit counter\n * \\return void\n */\nFDK_INLINE void FDKsetBitCnt (HANDLE_FDK_BITSTREAM hBitStream, UINT value)\n{\n    FDKsyncCache (hBitStream) ;\n    FDK_setBitCnt (&hBitStream->hBitBuf, value) ;\n}\n\n/**\n * \\brief get bitcounter state from bitBuffer.\n * \\param hBitStream HANDLE_FDK_BITSTREAM handle\n * \\return current bit counter value\n */\nFDK_INLINE INT  FDKgetBitCnt (HANDLE_FDK_BITSTREAM hBitStream)\n{\n    FDKsyncCache(hBitStream) ;\n    return FDK_getBitCnt(&hBitStream->hBitBuf) ;\n}\n\n\n/**\n * \\brief Fill the BitBuffer with a number of input bytes from  external source.\n *        The bytesValid variable returns the number of ramaining valid bytes in extern inputBuffer.\n *\n * \\param hBitStream  HANDLE_FDK_BITSTREAM handle\n * \\param inputBuffer Pointer to input buffer with bitstream data.\n * \\param bufferSize  Total size of inputBuffer array.\n * \\param bytesValid  Input: number of valid bytes in inputBuffer. Output: bytes still left unread in inputBuffer.\n * \\return void\n */\nFDK_INLINE void FDKfeedBuffer (HANDLE_FDK_BITSTREAM hBitStream, const UCHAR inputBuffer [], const UINT bufferSize, UINT *bytesValid)\n{\n  FDKsyncCache (hBitStream) ;\n  FDK_Feed(&hBitStream->hBitBuf, (UCHAR*)inputBuffer, bufferSize, bytesValid  ) ;\n}\n\n\n/**\n * \\brief fill destination BitBuffer with a number of bytes from source BitBuffer. The\n *        bytesValid variable returns the number of ramaining valid bytes in source BitBuffer.\n *\n * \\param hBSDst            HANDLE_FDK_BITSTREAM handle to write data into\n * \\param hBSSrc            HANDLE_FDK_BITSTREAM handle to read data from\n * \\param bytesValid        Input: number of valid bytes in inputBuffer. Output: bytes still left unread in inputBuffer.\n * \\return void\n */\nFDK_INLINE void FDKcopyBuffer (HANDLE_FDK_BITSTREAM hBSDst, HANDLE_FDK_BITSTREAM hBSSrc, UINT *bytesValid)\n{\n  FDKsyncCache (hBSSrc) ;\n  FDK_Copy (&hBSDst->hBitBuf, &hBSSrc->hBitBuf, bytesValid) ;\n}\n\n\n/**\n * \\brief fill the outputBuffer with all valid bytes hold in BitBuffer. The WriteBytes\n *        variable returns the number of written Bytes.\n *\n * \\param hBitStream    HANDLE_FDK_BITSTREAM handle\n * \\param outputBuffer  Pointer to output buffer.\n * \\param writeBytes    Number of bytes write to output buffer.\n * \\return void\n */\nFDK_INLINE void FDKfetchBuffer(HANDLE_FDK_BITSTREAM hBitStream, UCHAR *outputBuffer, UINT *writeBytes)\n{\n  FDKsyncCache (hBitStream) ;\n  FDK_Fetch(&hBitStream->hBitBuf, outputBuffer, writeBytes);\n}\n\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/FDK_core.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  ***********************\n\n   Author(s):   Manuel Jander\n   Description: FDK tools versioning support\n\n******************************************************************************/\n\n#ifndef FDK_CORE_H\n#define FDK_CORE_H\n\n#include \"FDK_audio.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/** @brief Get FDK_tools library information.\n *  @return     Return 0 on success and a negative errorcode on failure (see errorcodes.h).\n */\nint FDK_toolsGetLibInfo(LIB_INFO *info);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/FDK_crc.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/******************************** MPEG Audio Encoder **************************\n\n   Initial author:\n   contents/description: CRC calculation\n\n******************************************************************************/\n\n#ifndef FDK_CRC_H\n#define FDK_CRC_H\n\n\n\n#include \"FDK_bitstream.h\"\n\n\n#define MAX_CRC_REGS 3    /*!< Maximal number of overlapping crc region in ADTS channel pair element is two.\n                               Select three independent regions preventively. */\n\n/**\n *  This structure describes single crc region used for crc calculation.\n */\ntypedef struct\n{\n  UCHAR isActive;\n  INT   maxBits;\n  UINT  bitBufCntBits;\n  UINT  validBits;\n\n} CCrcRegData;\n\n/**\n *  CRC info structure.\n */\ntypedef struct\n{\n    CCrcRegData  crcRegData[MAX_CRC_REGS];   /*!< Multiple crc region description. */\n    const USHORT       *pCrcLookup;          /*!< Pointer to lookup table filled in FDK_crcInit(). */\n\n    USHORT              crcPoly;             /*!< CRC generator polynom. */\n    USHORT              crcMask;             /*!< CRC mask. */\n    USHORT              startValue;          /*!< CRC start value. */\n    UCHAR               crcLen;              /*!< CRC length. */\n\n    UINT                regStart;            /*!< Start region marker for synchronization. */\n    UINT                regStop;             /*!< Stop region marker for synchronization. */\n\n    USHORT              crcValue;            /*!< Crc value to be calculated. */\n\n} FDK_CRCINFO;\n\n/**\n *  CRC info handle.\n */\ntypedef FDK_CRCINFO* HANDLE_FDK_CRCINFO;\n\n\n/**\n * \\brief  Initialize CRC structure.\n *\n * The function initializes existing crc info structure with denoted configuration.\n *\n * \\param hCrcInfo              Pointer to an outlying allocated crc info structure.\n * \\param crcPoly               Configure crc polynom.\n * \\param crcStartValue         Configure crc start value.\n * \\param crcLen                Configure crc length.\n *\n * \\return  none\n */\nvoid FDKcrcInit(\n        HANDLE_FDK_CRCINFO              hCrcInfo,\n        const UINT                      crcPoly,\n        const UINT                      crcStartValue,\n        const UINT                      crcLen\n        );\n\n/**\n * \\brief  Reset CRC info structure.\n *\n * This function clears all intern states of the crc structure.\n *\n * \\param hCrcInfo              Pointer to crc info stucture.\n *\n * \\return  none\n */\nvoid FDKcrcReset(\n        HANDLE_FDK_CRCINFO              hCrcInfo\n        );\n\n\n/**\n * \\brief  Start CRC region with maximum number of bits.\n *\n * This function marks position in bitstream to be used as start point for crc calculation.\n * Bitstream range for crc calculation can be limited or kept dynamic depending on mBits parameter.\n * The crc region has to be terminated with FDKcrcEndReg() in each case.\n *\n * \\param hCrcInfo              Pointer to crc info stucture.\n * \\param hBs                   Pointer to current bit buffer structure.\n * \\param mBits                 Number of bits in crc region to be calculated.\n *                              - mBits > 0: Zero padding will be used for CRC calculation, if there\n *                                           are less than mBits bits available.\n *                              - mBits < 0: No zero padding is done.\n *                              - mBits = 0: The number of bits used in crc calculation is dynamically,\n *                                           depending on bitstream position between FDKcrcStartReg() and\n *                                           FDKcrcEndReg() call.\n *\n * \\return  ID for the created region, -1 in case of an error\n */\nINT FDKcrcStartReg(\n        HANDLE_FDK_CRCINFO              hCrcInfo,\n        const HANDLE_FDK_BITSTREAM      hBs,\n        const INT                       mBits\n        );\n\n\n/**\n * \\brief  Ends CRC region.\n *\n * This function terminates crc region specified with FDKcrcStartReg(). The number of bits in crc region depends\n * on mBits parameter of FDKcrcStartReg().\n * This function calculates and updates crc in info structure.\n *\n * \\param hCrcInfo              Pointer to crc info stucture.\n * \\param hBs                   Pointer to current bit buffer structure.\n * \\param reg                   Crc region ID created in FDKcrcStartReg().\n *\n * \\return  0 on success\n */\nINT FDKcrcEndReg(\n        HANDLE_FDK_CRCINFO              hCrcInfo,\n        const HANDLE_FDK_BITSTREAM      hBs,\n        const INT                       reg\n        );\n\n\n/**\n * \\brief  This function returns crc value from info struct.\n *\n * \\param hCrcInfo              Pointer to crc info stucture.\n *\n * \\return  CRC value masked with crc length.\n */\nUSHORT FDKcrcGetCRC(\n        const HANDLE_FDK_CRCINFO        hCrcInfo\n        );\n\n\n#endif /* FDK_CRC_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/FDK_hybrid.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s): Markus Lohwasser\n   Description: FDK Tools Hybrid Filterbank\n\n******************************************************************************/\n\n#ifndef __FDK_HYBRID_H\n#define __FDK_HYBRID_H\n\n\n\n#include \"common_fix.h\"\n\n/*--------------- enums -------------------------------*/\n\n/**\n * Hybrid Filterband modes.\n */\ntypedef enum {\n    THREE_TO_TEN,\n    THREE_TO_TWELVE,\n    THREE_TO_SIXTEEN\n\n} FDK_HYBRID_MODE;\n\n\n/*--------------- structure definitions ---------------*/\ntypedef struct FDK_HYBRID_SETUP *HANDLE_FDK_HYBRID_SETUP;\n\ntypedef struct\n{\n  FIXP_DBL             *bufferLFReal[3];     /*!< LF real filter states. */\n  FIXP_DBL             *bufferLFImag[3];     /*!< LF imag filter states. */\n  FIXP_DBL             *bufferHFReal[13];    /*!< HF real delay lines. */\n  FIXP_DBL             *bufferHFImag[13];    /*!< HF imag delay lines. */\n\n  INT                   bufferLFpos;         /*!< Position to write incoming data into ringbuffer. */\n  INT                   bufferHFpos;         /*!< Delay line positioning. */\n  INT                   nrBands;             /*!< Number of QMF bands. */\n  INT                   cplxBands;           /*!< Number of complex QMF bands.*/\n  UCHAR                 hfMode;              /*!< Flag signalizes treatment of HF bands. */\n\n  FIXP_DBL             *pLFmemory;           /*!< Pointer to LF states buffer. */\n  FIXP_DBL             *pHFmemory;           /*!< Pointer to HF states buffer. */\n\n  UINT                  LFmemorySize;        /*!< Size of LF states buffer. */\n  UINT                  HFmemorySize;        /*!< Size of HF states buffer. */\n\n  HANDLE_FDK_HYBRID_SETUP pSetup;            /*!< Pointer to filter setup. */\n\n} FDK_ANA_HYB_FILTER;\n\n\ntypedef struct\n{\n  INT                   nrBands;             /*!< Number of QMF bands. */\n  INT                   cplxBands;           /*!< Number of complex QMF bands.*/\n\n  HANDLE_FDK_HYBRID_SETUP pSetup;            /*!< Pointer to filter setup. */\n\n} FDK_SYN_HYB_FILTER;\n\ntypedef FDK_ANA_HYB_FILTER *HANDLE_FDK_ANA_HYB_FILTER;\ntypedef FDK_SYN_HYB_FILTER *HANDLE_FDK_SYN_HYB_FILTER;\n\n\n/**\n * \\brief  Create one instance of Hybrid Analyis Filterbank.\n *\n * \\param hAnalysisHybFilter  Pointer to an outlying allocated Hybrid Analysis Filterbank structure.\n * \\param pLFmemory           Pointer to outlying buffer used LF filtering.\n * \\param LFmemorySize        Size of pLFmemory in bytes.\n * \\param pHFmemory           Pointer to outlying buffer used HF delay line.\n * \\param HFmemorySize        Size of pLFmemory in bytes.\n *\n * \\return  0 on success.\n */\nINT FDKhybridAnalysisOpen(\n        HANDLE_FDK_ANA_HYB_FILTER  hAnalysisHybFilter,\n        FIXP_DBL *const            pLFmemory,\n        const UINT                 LFmemorySize,\n        FIXP_DBL *const            pHFmemory,\n        const UINT                 HFmemorySize\n        );\n\n\n/**\n * \\brief  Initialize and configure Hybrdid Analysis Filterbank instance.\n *\n * \\param hAnalysisHybFilter  A Hybrid Analysis Filterbank handle.\n * \\param mode                Select hybrid filter configuration.\n * \\param qmfBands            Number of qmf bands to be processed.\n * \\param cplxBands           Number of complex qmf bands to be processed.\n * \\param initStatesFlag      Indicates whether the states buffer has to be cleared.\n *\n * \\return  0 on success.\n */\nINT FDKhybridAnalysisInit(\n        HANDLE_FDK_ANA_HYB_FILTER  hAnalysisHybFilter,\n        const FDK_HYBRID_MODE      mode,\n        const INT                  qmfBands,\n        const INT                  cplxBands,\n        const INT                  initStatesFlag\n        );\n\n\n/**\n * \\brief  Adjust Hybrdid Analysis Filterbank states.\n *\n * \\param hAnalysisHybFilter  A Hybrid Analysis Filterbank handle.\n * \\param scalingValue        Scaling value to be applied on filter states.\n *\n * \\return  0 on success.\n */\nINT FDKhybridAnalysisScaleStates(\n        HANDLE_FDK_ANA_HYB_FILTER  hAnalysisHybFilter,\n        const INT                  scalingValue\n        );\n\n\n/**\n * \\brief  Apply Hybrid Analysis Filterbank on Qmf input data.\n *\n * \\param hAnalysisHybFilter  A Hybrid Analysis Filterbank handle.\n * \\param pQmfReal            Qmf input data.\n * \\param pQmfImag            Qmf input data.\n * \\param pHybridReal         Hybrid output data.\n * \\param pHybridImag         Hybrid output data.\n *\n * \\return  0 on success.\n */\nINT FDKhybridAnalysisApply(\n        HANDLE_FDK_ANA_HYB_FILTER  hAnalysisHybFilter,\n        const FIXP_DBL *const      pQmfReal,\n        const FIXP_DBL *const      pQmfImag,\n        FIXP_DBL *const            pHybridReal,\n        FIXP_DBL *const            pHybridImag\n        );\n\n\n/**\n * \\brief  Close a Hybrid Analysis Filterbank instance.\n *\n * \\param hAnalysisHybFilter  Pointer to a Hybrid Analysis Filterbank instance.\n *\n * \\return  0 on success.\n */\nINT FDKhybridAnalysisClose(\n        HANDLE_FDK_ANA_HYB_FILTER  hAnalysisHybFilter\n        );\n\n/**\n * \\brief  Initialize and configure Hybrdid Synthesis Filterbank instance.\n *\n * \\param hSynthesisHybFilter A Hybrid Synthesis Filterbank handle.\n * \\param mode                Select hybrid filter configuration.\n * \\param qmfBands            Number of qmf bands to be processed.\n * \\param cplxBands           Number of complex qmf bands to be processed.\n *\n * \\return  0 on success.\n */\nINT FDKhybridSynthesisInit(\n        HANDLE_FDK_SYN_HYB_FILTER  hSynthesisHybFilter,\n        const FDK_HYBRID_MODE      mode,\n        const INT                  qmfBands,\n        const INT                  cplxBands\n        );\n\n/**\n * \\brief  Apply Hybrid Analysis Filterbank on Hybrid data.\n *\n * \\param hSynthesisHybFilter  A Hybrid Analysis Filterbandk handle.\n * \\param pHybridReal          Hybrid input data.\n * \\param pHybridImag          Hybrid input data.\n * \\param pQmfReal             Qmf output data.\n * \\param pQmfImag             Qmf output data.\n *\n * \\return  0 on success.\n */\nINT FDKhybridSynthesisApply(\n        HANDLE_FDK_SYN_HYB_FILTER  hSynthesisHybFilter,\n        const FIXP_DBL *const      pHybridReal,\n        const FIXP_DBL *const      pHybridImag,\n        FIXP_DBL *const            pQmfReal,\n        FIXP_DBL *const            pQmfImag\n        );\n\n\n#endif /* __FDK_HYBRID_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/FDK_tools_rom.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  ***********************\n\n   Author(s):   Oliver Moser\n   Description: ROM tables used by FDK tools\n\n******************************************************************************/\n\n#ifndef __FDK_TOOLS_ROM_H__\n#define __FDK_TOOLS_ROM_H__\n\n#include \"common_fix.h\"\n#include \"FDK_audio.h\"\n\n\n/* None radix2 rotation vectors */\nextern const FIXP_STB RotVectorReal60[60];\nextern const FIXP_STB RotVectorImag60[60];\nextern const FIXP_STB RotVectorReal240[240];\nextern const FIXP_STB RotVectorImag240[240];\nextern const FIXP_STB RotVectorReal480[480];\nextern const FIXP_STB RotVectorImag480[480];\n\n\n/* Regular sine tables */\nextern const FIXP_STP SineTable512[];\nextern const FIXP_STP SineTable480[];\n\n/* AAC-LC windows */\nextern const FIXP_WTP SineWindow1024[];\nextern const FIXP_WTP KBDWindow1024[];\nextern const FIXP_WTP SineWindow128[];\nextern const FIXP_WTP KBDWindow128[];\n\nextern const FIXP_WTP SineWindow960[];\nextern const FIXP_WTP KBDWindow960[];\nextern const FIXP_WTP SineWindow120[];\nextern const FIXP_WTP KBDWindow120[];\n\n/* AAC-LD windows */\nextern const FIXP_WTP SineWindow512[];\n#define LowOverlapWindow512 SineWindow128\nextern const FIXP_WTP SineWindow480[];\n#define LowOverlapWindow480 SineWindow120\n\n\n\nextern const FIXP_WTP SineWindow64[];\nextern const FIXP_WTP SineWindow32[];\n\n/**\n * \\brief Helper table for window slope mapping. You should prefer the usage of the\n * function FDKgetWindowSlope(), this table is only made public for some optimized\n * access inside dct.cpp.\n */\nextern const FIXP_WTP *const windowSlopes[2][3][9];\n\n/**\n * \\brief Window slope access helper. Obtain a window of given length and shape.\n * \\param length Length of the window slope.\n * \\param shape Shape index of the window slope. 0: sine window, 1: Kaiser-Bessel. Any other\n *              value is applied a mask of 1 to, mapping it to either 0 or 1.\n * \\param Pointer to window slope or NULL if the requested window slope is not available.\n */\nconst FIXP_WTP * FDKgetWindowSlope(int length, int shape);\n\nextern const FIXP_WTP sin_twiddle_L64[];\n\n/*\n * Filter coefficient type definition\n */\n\n#if defined(ARCH_PREFER_MULT_16x16) || defined(ARCH_PREFER_MULT_32x16)\n  #define QMF_COEFF_16BIT\n#endif\n\n#define QMF_FILTER_PROTOTYPE_SIZE    640\n#define QMF_NO_POLY                  5\n\n#ifdef QMF_COEFF_16BIT\n  #define FIXP_PFT FIXP_SGL\n  #define FIXP_QTW FIXP_SGL\n#else\n  #define FIXP_PFT FIXP_DBL\n  #define FIXP_QTW FIXP_DBL\n#endif\n\n#define QMF640_PFT_TABLE_SIZE       (640/2 + QMF_NO_POLY)\n\nextern const FIXP_QTW qmf_phaseshift_cos32[32];\nextern const FIXP_QTW qmf_phaseshift_sin32[32];\n/* Adapted analysis post-twiddles for down-sampled HQ SBR */\nextern const FIXP_QTW qmf_phaseshift_cos_downsamp32[32];\nextern const FIXP_QTW qmf_phaseshift_sin_downsamp32[32];\nextern const FIXP_QTW qmf_phaseshift_cos64[64];\nextern const FIXP_QTW qmf_phaseshift_sin64[64];\n\nextern const FIXP_PFT qmf_64[QMF640_PFT_TABLE_SIZE+QMF_NO_POLY];\n\n\n\n\n\n#define QMF640_CLDFB_PFT_TABLE_SIZE (640)\n#define QMF320_CLDFB_PFT_TABLE_SIZE (320)\n#define QMF_CLDFB_PFT_SCALE 1\n\nextern const FIXP_QTW qmf_phaseshift_cos32_cldfb[32];\nextern const FIXP_QTW qmf_phaseshift_sin32_cldfb[32];\nextern const FIXP_QTW qmf_phaseshift_cos64_cldfb[64];\nextern const FIXP_QTW qmf_phaseshift_sin64_cldfb[64];\n\nextern const FIXP_PFT qmf_cldfb_640[QMF640_CLDFB_PFT_TABLE_SIZE];\nextern const FIXP_PFT qmf_cldfb_320[QMF320_CLDFB_PFT_TABLE_SIZE];\n\n\n\n\n\n/*\n * Raw Data Block list stuff.\n */\ntypedef enum {\n  element_instance_tag,\n  common_window,\n  global_gain,\n  ics_info, /* ics_reserved_bit, window_sequence, window_shape, max_sfb, scale_factor_grouping, predictor_data_present, ltp_data_present, ltp_data */\n  max_sfb,\n  ms, /* ms_mask_present, ms_used */\n  /*predictor_data_present,*/ /* part of ics_info */\n  ltp_data_present,\n  ltp_data,\n  section_data,\n  scale_factor_data,\n  pulse, /* pulse_data_present, pulse_data  */\n  tns_data_present,\n  tns_data,\n  gain_control_data_present,\n  gain_control_data,\n  esc1_hcr,\n  esc2_rvlc,\n  spectral_data,\n\n  scale_factor_data_usac,\n  core_mode,\n  common_tw,\n  lpd_channel_stream,\n  tw_data,\n  noise,\n  ac_spectral_data,\n  fac_data,\n  tns_active, /* introduced in MPEG-D usac CD */\n  tns_data_present_usac,\n  common_max_sfb,\n\n\n  /* Non data list items */\n  adtscrc_start_reg1,\n  adtscrc_start_reg2,\n  adtscrc_end_reg1,\n  adtscrc_end_reg2,\n  drmcrc_start_reg,\n  drmcrc_end_reg,\n  next_channel,\n  next_channel_loop,\n  link_sequence,\n  end_of_sequence\n} rbd_id_t;\n\nstruct element_list {\n  const rbd_id_t *id;\n  const struct element_list *next[2];\n};\n\ntypedef struct element_list element_list_t;\n/**\n * \\brief get elementary stream pieces list for given parameters.\n * \\param aot audio object type\n * \\param epConfig the epConfig value from the current Audio Specific Config\n * \\param nChannels amount of channels contained in the current element.\n * \\param layer the layer of the current element.\n * \\return element_list_t parser guidance structure.\n */\nconst element_list_t * getBitstreamElementList(AUDIO_OBJECT_TYPE aot, SCHAR epConfig, UCHAR nChannels, UCHAR layer);\n\n\n#endif\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/FDK_trigFcts.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   Haricharan Lakshman, Manuel Jander\n   Description: Trigonometric functions fixed point fractional implementation.\n\n******************************************************************************/\n\n\n\n#include \"common_fix.h\"\n\n#include \"FDK_tools_rom.h\"\n\n/* Fixed point precision definitions */\n#define Q(format)        ((FIXP_DBL)(((LONG)1) << (format)))\n\n#ifndef M_PI\n#define M_PI      (3.14159265358979323846f)\n#endif\n\n/*!\n * Inverse tangent function.\n */\n\n// --- fixp_atan() ----\n#define Q_ATANINP   (25)    // Input in q25, Output in q30\n#define Q_ATANOUT   (30)\n#define ATI_SF              ((DFRACT_BITS-1)-Q_ATANINP)  // 6\n#define ATI_SCALE           ((float)(1<> shift;\n\n    residual &= ( (1< (1< (1<<(LD-1))) {\n        FIXP_STP tmp;\n        /* Cosine/Sine simetry for angles greater than PI/4 */\n        s = (1<>32;\n  return result ;\n}\n\n#endif /* defined(__GNUC__) */\n\n#endif /* __aarch64__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/abs.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  ***********************\n\n   Author(s):   M. Lohwasser\n   Description: fixed point abs definitions\n\n******************************************************************************/\n\n#if !defined(__ABS_H__)\n#define __ABS_H__\n\n\n#if defined(__mips__)\t/* cppp replaced: elif */\n#include \"mips/abs_mips.h\"\n\n#elif defined(__x86__)\t/* cppp replaced: elif */\n#include \"x86/abs_x86.h\"\n\n#endif /* all cores */\n\n/*************************************************************************\n *************************************************************************\n    Software fallbacks for missing functions\n**************************************************************************\n**************************************************************************/\n\n#if !defined(FUNCTION_fixabs_D)\ninline FIXP_DBL fixabs_D(FIXP_DBL x) { return ((x) > (FIXP_DBL)(0)) ? (x) : -(x) ; }\n#endif\n\n#if !defined(FUNCTION_fixabs_I)\ninline INT fixabs_I(INT x)           { return ((x) > (INT)(0))      ? (x) : -(x) ; }\n#endif\n\n#if !defined(FUNCTION_fixabs_S)\ninline FIXP_SGL fixabs_S(FIXP_SGL x) { return ((x) > (FIXP_SGL)(0)) ? (x) : -(x) ; }\n#endif\n\n#endif /* __ABS_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/arm/clz_arm.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__arm__)\n\n#if defined(__GNUC__) && defined(__ARM_ARCH_5TE__)\t/* cppp replaced: elif */\n  /* ARM gcc*/\n\n  #define FUNCTION_fixnormz_D\n  #define FUNCTION_fixnorm_D\n\n  inline INT fixnormz_D(LONG value)\n  {\n    INT result;\n    asm(\"clz %0, %1 \": \"=r\"(result) : \"r\"(value) );\n    return result;\n  }\n\n  inline INT fixnorm_D(LONG value)\n  {\n    INT result;\n    if (value == 0) {\n      return 0;\n    }\n    if (value < 0) {\n      value = ~value;\n    }\n    result =  fixnormz_D(value);\n    return result - 1;\n  }\n\n#endif /* arm toolchain */\n\n#endif /* __arm__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/arm/cplx_mul.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__arm__) && defined(__GNUC__)\t/* cppp replaced: elif */\n\n#if defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_6__)\n  #define FUNCTION_cplxMultDiv2_32x16\n  #define FUNCTION_cplxMultDiv2_32x16X2\n  //#define FUNCTION_cplxMult_32x16\n  //#define FUNCTION_cplxMult_32x16X2\n#endif\n\n#define FUNCTION_cplxMultDiv2_32x32X2\n//#define FUNCTION_cplxMult_32x32X2\n\n#ifdef FUNCTION_cplxMultDiv2_32x16\ninline void cplxMultDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          const FIXP_DBL a_Re,\n                          const FIXP_DBL a_Im,\n                          const FIXP_SPK wpk )\n{\n   LONG tmp1,tmp2;\n   const LONG w = wpk.w;\n\n   asm(\"smulwt %0, %3, %4;\\n\"\n       \"rsb %1,%0,#0;\\n\"\n       \"smlawb %0, %2, %4, %1;\\n\"\n       \"smulwt %1, %2, %4;\\n\"\n       \"smlawb %1, %3, %4, %1;\\n\"\n       : \"=&r\"(tmp1), \"=&r\"(tmp2)\n       : \"r\"(a_Re), \"r\"(a_Im), \"r\"(w)\n       );\n\n    *c_Re = tmp1;\n    *c_Im = tmp2;\n}\n#endif /* FUNCTION_cplxMultDiv2_32x16 */\n\n#ifdef FUNCTION_cplxMultDiv2_32x16X2\ninline void cplxMultDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          const FIXP_DBL a_Re,\n                          const FIXP_DBL a_Im,\n                          const FIXP_SGL b_Re,\n                          const FIXP_SGL b_Im)\n{\n    LONG tmp1, tmp2;\n\n    asm(\"smulwb %0, %3, %5;\\n\"     /* %7   = -a_Im * b_Im */\n        \"rsb %1,%0,#0;\\n\"\n        \"smlawb %0, %2, %4, %1;\\n\" /* tmp1 =  a_Re * b_Re - a_Im * b_Im */\n        \"smulwb %1, %2, %5;\\n\"     /* %7   =  a_Re * b_Im */\n        \"smlawb %1, %3, %4, %1;\\n\" /* tmp2 =  a_Im * b_Re + a_Re * b_Im */\n        : \"=&r\"(tmp1), \"=&r\"(tmp2)\n        : \"r\"(a_Re), \"r\"(a_Im), \"r\"(b_Re), \"r\"(b_Im)\n        );\n\n     *c_Re = tmp1;\n     *c_Im = tmp2;\n}\n#endif /* FUNCTION_cplxMultDiv2_32x16X2 */\n\n#ifdef FUNCTION_cplxMultAddDiv2_32x16X2\ninline void cplxMultAddDiv2( FIXP_DBL *c_Re,\n                             FIXP_DBL *c_Im,\n                             const FIXP_DBL  a_Re,\n                             const FIXP_DBL  a_Im,\n                             const FIXP_SGL b_Re,\n                             const FIXP_SGL b_Im)\n{\n    LONG tmp1, tmp2;\n\n    asm(\"smulwb %0, %3, %5;\\n\"\n        \"rsb %1,%0,#0;\\n\"\n        \"smlawb %0, %2, %4, %1;\\n\"\n        \"smulwb %1, %2, %5;\\n\"\n        \"smlawb %1, %3, %4, %1;\\n\"\n        : \"=&r\"(tmp1), \"=&r\"(tmp2)\n        : \"r\"(a_Re), \"r\"(a_Im), \"r\"(b_Re), \"r\"(b_Im)\n        );\n\n     *c_Re += tmp1;\n     *c_Im += tmp2;\n}\n#endif /* FUNCTION_cplxMultAddDiv2_32x16X2 */\n\n\n#ifdef FUNCTION_cplxMultDiv2_32x32X2\ninline void cplxMultDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          const FIXP_DBL a_Re,\n                          const FIXP_DBL a_Im,\n                          const FIXP_DBL b_Re,\n                          const FIXP_DBL b_Im)\n{\n    LONG tmp1, tmp2;\n\n#ifdef __ARM_ARCH_6__\n    asm(\n       \"smmul %0, %2, %4;\\n\"     /* tmp1  = a_Re * b_Re */\n       \"smmls %0, %3, %5, %0;\\n\" /* tmp1 -= a_Im * b_Im */\n       \"smmul %1, %2, %5;\\n\"     /* tmp2  = a_Re * b_Im */\n       \"smmla %1, %3, %4, %1;\\n\" /* tmp2 += a_Im * b_Re */\n       : \"=&r\"(tmp1), \"=&r\"(tmp2)\n       : \"r\"(a_Re), \"r\"(a_Im), \"r\"(b_Re), \"r\"(b_Im)\n       : \"r0\"\n       );\n#else\n    LONG discard;\n    asm(\n       \"smull %2, %0, %7, %6;\\n\" /* tmp1  = -a_Im * b_Im */\n       \"smlal %2, %0, %3, %5;\\n\" /* tmp1 +=  a_Re * b_Re */\n       \"smull %2, %1, %3, %6;\\n\" /* tmp2  =  a_Re * b_Im */\n       \"smlal %2, %1, %4, %5;\\n\" /* tmp2 +=  a_Im * b_Re */\n       : \"=&r\"(tmp1), \"=&r\"(tmp2), \"=&r\"(discard)\n       : \"r\"(a_Re), \"r\"(a_Im), \"r\"(b_Re), \"r\"(b_Im), \"r\"(-a_Im)\n       );\n #endif\n    *c_Re = tmp1;\n    *c_Im = tmp2;\n}\n#endif /* FUNCTION_cplxMultDiv2_32x32X2 */\n\n\n#endif\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/arm/fixmadd_arm.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__arm__)\n\n  /* ############################################################################# */\n  #if defined(__GNUC__) && defined(__arm__) && !defined(__SYMBIAN32__)\t/* cppp replaced: elif */\n  /* ############################################################################# */\n    /* ARM GNU GCC */\n\n    #define FUNCTION_fixmadddiv2_DD\n\n    #ifdef __ARM_ARCH_6__\n      inline FIXP_DBL fixmadddiv2_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {\n        INT result;\n        asm  (\"smmla %0, %1, %2, %3;\\n\"\n              : \"=r\" (result)\n              : \"r\" (a), \"r\" (b), \"r\"(x) );\n        return result ;\n      }\n      #define FUNCTION_fixmsubdiv2_DD\n      inline FIXP_DBL fixmsubdiv2_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {\n        INT result;\n        asm  (\"smmls %0, %1, %2, %3;\\n\"\n              : \"=r\" (result)\n              : \"r\" (a), \"r\" (b), \"r\"(x) );\n        return result ;\n      }\n    #else /* __ARM_ARCH_6__ */\n      inline FIXP_DBL fixmadddiv2_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {\n        INT discard, result = x;\n        asm  (\"smlal %0, %1, %2, %3;\\n\"\n              : \"=r\" (discard), \"+r\" (result)\n              : \"r\" (a), \"r\" (b) );\n        return result ;\n      }\n    #endif /* __ARM_ARCH_6__ */\n\n    #if defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_6__)\n\n      #define FUNCTION_fixmadddiv2_DS\n\n      inline FIXP_DBL fixmadddiv2_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {\n        INT result;\n        asm(\"smlawb %0, %1, %2, %3 \"\n              : \"=r\" (result)\n              : \"r\" (a), \"r\" (b), \"r\" (x) );\n        return result ;\n      }\n\n    #endif /* defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_6__) */\n\n    #define FUNCTION_fixmadddiv2BitExact_DD\n    #define fixmadddiv2BitExact_DD(a, b, c) fixmadddiv2_DD(a, b, c)\n\n    #define FUNCTION_fixmsubdiv2BitExact_DD\n    inline FIXP_DBL fixmsubdiv2BitExact_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {\n      return x - fixmuldiv2BitExact_DD(a, b);\n    }\n\n    #define FUNCTION_fixmadddiv2BitExact_DS\n    #define fixmadddiv2BitExact_DS(a, b, c) fixmadddiv2_DS(a, b, c)\n\n    #define FUNCTION_fixmsubdiv2BitExact_DS\n    inline FIXP_DBL fixmsubdiv2BitExact_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {\n      return x - fixmuldiv2BitExact_DS(a, b);\n    }\n  /* ############################################################################# */\n  #endif /* toolchain */\n  /* ############################################################################# */\n\n#endif /* __arm__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/arm/fixmul_arm.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__arm__)\n\n#if defined(__GNUC__) && defined(__arm__)\t/* cppp replaced: elif */\n/* ARM with GNU compiler */\n\n#define FUNCTION_fixmuldiv2_DD\n\n#define FUNCTION_fixmuldiv2BitExact_DD\n#define fixmuldiv2BitExact_DD(a,b) fixmuldiv2_DD(a,b)\n#define FUNCTION_fixmulBitExact_DD\n#define fixmulBitExact_DD(a,b) fixmul_DD(a,b)\n\n#define FUNCTION_fixmuldiv2BitExact_DS\n#define fixmuldiv2BitExact_DS(a,b) fixmuldiv2_DS(a,b)\n\n#define FUNCTION_fixmulBitExact_DS\n#define fixmulBitExact_DS(a,b) fixmul_DS(a,b)\n\n#if defined(__ARM_ARCH_6__) || defined(__TARGET_ARCH_7E_M)\ninline INT fixmuldiv2_DD (const INT a, const INT b)\n{\n  INT result ;\n  __asm__ (\"smmul %0, %1, %2\" : \"=r\" (result)\n                              : \"r\" (a), \"r\" (b)) ;\n  return result ;\n}\n#else\ninline INT fixmuldiv2_DD (const INT a, const INT b)\n{\n  INT discard, result ;\n  __asm__ (\"smull %0, %1, %2, %3\" : \"=&r\" (discard), \"=r\" (result)\n                                  : \"r\" (a), \"r\" (b)) ;\n  return result ;\n}\n#endif\n\n#if defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_6__)\n#define FUNCTION_fixmuldiv2_SD\ninline INT fixmuldiv2_SD (const SHORT a, const INT b)\n{\n  INT result ;\n  __asm__ (\"smulwb %0, %1, %2\"\n    : \"=r\" (result)\n    : \"r\" (b), \"r\" (a)) ;\n  return result ;\n}\n#endif\n\n#endif /* defined(__GNUC__) && defined(__arm__) */\n\n#endif /* __arm__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/arm/scale.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/********************************  Fraunhofer IIS  ***************************\n\n   Author(s):\n   Description: ARM scaling operations\n\n******************************************************************************/\n\n#if defined(__GNUC__) /* GCC Compiler */\t/* cppp replaced: elif */\n\n#if defined(__ARM_ARCH_6__)\n\ninline static INT shiftRightSat(INT src, int scale)\n{\n  INT result;\n  asm(\n      \"ssat %0,%2,%0;\\n\"\n\n      : \"=&r\"(result)\n      : \"r\"(src>>scale), \"M\"(SAMPLE_BITS)\n      );\n\n  return result;\n}\n\n  #define SATURATE_INT_PCM_RIGHT_SHIFT(src, scale) shiftRightSat(src, scale)\n\ninline static INT shiftLeftSat(INT src, int scale)\n{\n  INT result;\n  asm(\n      \"ssat %0,%2,%0;\\n\"\n\n      : \"=&r\"(result)\n      : \"r\"(src<= 0)\n    *value <<= newscale;\n  else\n    *value >>= -newscale;\n}\n\n\n  #define SATURATE_RIGHT_SHIFT(src, scale, dBits)                                                        \\\n      ( (((LONG)(src) ^ ((LONG)(src) >> (DFRACT_BITS-1)))>>(scale)) > (LONG)(((1U)<<((dBits)-1))-1))     \\\n          ? ((LONG)(src) >> (DFRACT_BITS-1)) ^ (LONG)(((1U)<<((dBits)-1))-1)                             \\\n          : ((LONG)(src) / ((LONG)1<<(scale)))\n\n  #define SATURATE_LEFT_SHIFT(src, scale, dBits)                                                         \\\n      ( ((LONG)(src) ^ ((LONG)(src) >> (DFRACT_BITS-1))) > ((LONG)(((1U)<<((dBits)-1))-1) >> (scale)) )  \\\n          ? ((LONG)(src) >> (DFRACT_BITS-1)) ^ (LONG)(((1U)<<((dBits)-1))-1)                             \\\n          : ((LONG)(src) << (scale))\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/arm/scramble.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: bitreversal of input data\n\n******************************************************************************/\n\n#if defined(FUNCTION_scramble)\n#if defined(__GNUC__)\t/* cppp replaced: elif */\n\n#define FUNCTION_scramble\n\n#if defined(__ARM_ARCH_5TE__)\n#define USE_LDRD_STRD   /* LDRD requires 8 byte data alignment. */\n#endif\n\ninline void scramble(FIXP_DBL x [], INT n) {\n  FDK_ASSERT(!(((INT)x)&(ALIGNMENT_DEFAULT-1)));\n  asm(\"mov     r2, #1;\\n\"               /* r2(m) = 1;           */\n      \"sub     r3, %1, #1;\\n\"           /* r3 = n-1;            */\n      \"mov     r4, #0;\\n\"               /* r4(j) = 0;           */\n\n\"scramble_m_loop%=:\\n\"                  /* {                    */\n      \"mov     r5, %1;\\n\"               /*  r5(k) = 1;          */\n\n\"scramble_k_loop%=:\\n\"                  /*  {                   */\n      \"mov     r5, r5, lsr #1;\\n\"       /*   k >>= 1;           */\n      \"eor     r4, r4, r5;\\n\"           /*   j ^=k;             */\n      \"ands    r10, r4, r5;\\n\"           /*   r10 = r4 & r5;      */\n      \"beq     scramble_k_loop%=;\\n\"      /*  } while (r10 == 0);  */\n\n      \"cmp     r4, r2;\\n\"               /*   if (r4 < r2) break;        */\n      \"bcc     scramble_m_loop_end%=;\\n\"\n\n#ifdef USE_LDRD_STRD\n      \"mov     r5, r2, lsl #3;\\n\"       /* m(r5) = r2*4*2               */\n      \"ldrd    r10, [%0, r5];\\n\"         /* r10 = x[r5], x7 = x[r5+1]     */\n      \"mov     r6, r4, lsl #3;\\n\"      /* j(r6) = r4*4*2              */\n      \"ldrd    r8, [%0, r6];\\n\"        /* r8 = x[r6], r9 = x[r6+1];  */\n      \"strd    r10, [%0, r6];\\n\"        /* x[r6,r6+1] = r10,r11;        */\n      \"strd    r8, [%0, r5];\\n\"         /* x[r5,r5+1] = r8,r9;          */\n#else\n      \"mov      r5, r2, lsl #3;\\n\"       /* m(r5) = r2*4*2               */\n      \"ldr\tr10, [%0, r5];\\n\"\n      \"mov      r6, r4, lsl #3;\\n\"      /* j(r6) = r4*4*2              */\n      \"ldr\tr11, [%0, r6];\\n\"\n\n      \"str\tr10, [%0, r6];\\n\"\n      \"str      r11, [%0, r5];\\n\"\n\n      \"add\tr5, r5, #4;\"\n      \"ldr\tr10, [%0, r5];\\n\"\n      \"add\tr6, r6, #4;\"\n      \"ldr      r11, [%0, r6];\\n\"\n      \"str      r10, [%0, r6];\\n\"\n      \"str      r11, [%0, r5];\\n\"\n#endif\n\"scramble_m_loop_end%=:\\n\"\n      \"add     r2, r2, #1;\\n\"           /* r2++;                        */\n      \"cmp     r2, r3;\\n\"\n      \"bcc     scramble_m_loop%=;\\n\"      /* } while (r2(m) < r3(n-1));   */\n       :\n       : \"r\"(x), \"r\"(n)\n#ifdef USE_LDRD_STRD\n       : \"r2\",\"r3\", \"r4\",\"r5\", \"r10\",\"r11\", \"r8\",\"r9\", \"r6\" );\n#else\n       : \"r2\",\"r3\", \"r4\",\"r5\", \"r10\",\"r11\", \"r6\" );\n#endif\n}\n#else\n/* Force C implementation if no assembler version available. */\n#undef FUNCTION_scramble\n#endif\t/* Toolchain selection. */\n\n#endif\t/* defined(FUNCTION_scramble) */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/autocorr2nd.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  ***********************\n\n   Author(s):   M. Lohwasser\n   Description: fixed point abs definitions\n\n******************************************************************************/\n\n#ifndef _AUTOCORR_2ND_H\n#define _AUTOCORR_2ND_H\n\n\n\n#include \"common_fix.h\"\n\ntypedef struct {\n  FIXP_DBL  r00r;\n  FIXP_DBL  r11r;\n  FIXP_DBL  r22r;\n  FIXP_DBL  r01r;\n  FIXP_DBL  r02r;\n  FIXP_DBL  r12r;\n  FIXP_DBL  r01i;\n  FIXP_DBL  r02i;\n  FIXP_DBL  r12i;\n  FIXP_DBL  det;\n  int det_scale;\n} ACORR_COEFS;\n\n#define LPC_ORDER 2\n\n\nINT\nautoCorr2nd_real (ACORR_COEFS *ac,          /*!< Pointer to autocorrelation coeffs */\n                  const FIXP_DBL *reBuffer, /*!< Pointer to to real part of spectrum */\n                  const int len             /*!< Number of qmf slots */\n                 );\nINT\nautoCorr2nd_cplx (ACORR_COEFS *ac,           /*!< Pointer to autocorrelation coeffs */\n                  const FIXP_DBL *reBuffer,  /*!< Pointer to to real part of spectrum */\n                  const FIXP_DBL *imBuffer,  /*!< Pointer to imag part of spectrum */\n                  const int len              /*!< Number of qmf slots */\n                 );\n\n\n#endif /* _AUTOCORR_2ND_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/clz.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   Marc Gayer\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if !defined(__CLZ_H__)\n#define __CLZ_H__\n\n#include \"FDK_archdef.h\"\n#include \"machine_type.h\"\n\n#if defined(__arm__)\n#include \"arm/clz_arm.h\"\n\n#elif defined(__aarch64__) || defined(__AARCH64EL__)\n#include \"aarch64/clz_aarch64.h\"\n\n#elif defined(__mips__)\t/* cppp replaced: elif */\n#include \"mips/clz_mips.h\"\n\n#elif defined(__x86__)\t/* cppp replaced: elif */\n#include \"x86/clz_x86.h\"\n\n#elif defined(__powerpc__)\n#include \"ppc/clz_ppc.h\"\n\n#endif /* all cores */\n\n\n/*************************************************************************\n *************************************************************************\n    Software fallbacks for missing functions.\n**************************************************************************\n**************************************************************************/\n\n#if !defined(FUNCTION_fixnormz_S)\n#ifdef FUNCTION_fixnormz_D\ninline INT fixnormz_S (SHORT a)\n{\n  return fixnormz_D((INT)(a));\n}\n#else\ninline INT fixnormz_S (SHORT a)\n{\n    int leadingBits = 0;\n    a = ~a;\n    while(a & 0x8000) {\n      leadingBits++;\n      a <<= 1;\n    }\n\n    return (leadingBits);\n}\n#endif\n#endif\n\n#if !defined(FUNCTION_fixnormz_D)\ninline INT fixnormz_D (LONG a)\n{\n    INT leadingBits = 0;\n    a = ~a;\n    while(a & 0x80000000) {\n      leadingBits++;\n      a <<= 1;\n    }\n\n    return (leadingBits);\n}\n#endif\n\n\n/*****************************************************************************\n\n    functionname: fixnorm_D\n    description:  Count leading ones or zeros of operand val for dfract/LONG INT values.\n                  Return this value minus 1. Return 0 if operand==0.\n*****************************************************************************/\n#if !defined(FUNCTION_fixnorm_S)\n#ifdef FUNCTION_fixnorm_D\ninline INT fixnorm_S(FIXP_SGL val)\n{\n  return fixnorm_D((INT)(val));\n}\n#else\ninline INT fixnorm_S(FIXP_SGL val)\n{\n    INT leadingBits = 0;\n    if ( val != (FIXP_SGL)0 ) {\n        if ( val < (FIXP_SGL)0 ) {\n            val = ~val;\n        }\n        leadingBits = fixnormz_S(val) - 1;\n    }\n    return (leadingBits);\n}\n#endif\n#endif\n\n#if !defined(FUNCTION_fixnorm_D)\ninline INT fixnorm_D(FIXP_DBL val)\n{\n    INT leadingBits = 0;\n    if ( val != (FIXP_DBL)0 ) {\n        if ( val < (FIXP_DBL)0 ) {\n            val = ~val;\n        }\n        leadingBits = fixnormz_D(val) - 1;\n    }\n    return (leadingBits);\n}\n#endif\n\n#endif /* __CLZ_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/common_fix.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   M. Lohwasser, M. Gayer\n   Description: Flexible fixpoint library configuration\n\n******************************************************************************/\n\n#ifndef _COMMON_FIX_H\n#define _COMMON_FIX_H\n\n#include \"FDK_archdef.h\"\n#include \"machine_type.h\"\n\n/* ***** Start of former fix.h ****** */\n\n/* Configure fractional or integer arithmetic */\n  #define FIX_FRACT 0 /* Define this to \"1\" to use fractional arithmetic simulation in class fract instead of integer arithmetic */\n                      /* 1 for debug with extra runtime overflow checking.                                                      */\n\n/* Define bit sizes of integer fixpoint fractional data types */\n#define FRACT_BITS      16 /* single precision */\n#define DFRACT_BITS     32 /* double precision */\n#define ACCU_BITS       40 /* double precision plus overflow */\n\n/* Fixpoint equivalent type fot PCM audio time domain data. */\n#if defined(SAMPLE_BITS)\n#if (SAMPLE_BITS == DFRACT_BITS)\n  #define FIXP_PCM      FIXP_DBL\n  #define FX_PCM2FX_DBL(x) ((FIXP_DBL)(x))\n  #define FX_DBL2FX_PCM(x) ((INT_PCM)(x))\n#elif (SAMPLE_BITS == FRACT_BITS)\n  #define FIXP_PCM      FIXP_SGL\n  #define FX_PCM2FX_DBL(x) FX_SGL2FX_DBL((FIXP_SGL)(x))\n  #define FX_DBL2FX_PCM(x) FX_DBL2FX_SGL(x)\n#else\n  #error SAMPLE_BITS different from FRACT_BITS or DFRACT_BITS not implemented!\n#endif\n#endif\n\n/* ****** End of former fix.h ****** */\n\n#define SGL_MASK            ((1UL<> (DFRACT_BITS-FRACT_BITS-1)) + 1) > (((LONG)1< 0) ) ? \\\n   (FIXP_SGL)(SHORT)(((LONG)1<<(FRACT_BITS-1))-1):(FIXP_SGL)(SHORT)((((val) >> (DFRACT_BITS-FRACT_BITS-1)) + 1) >> 1) )\n\n\n\n#define shouldBeUnion union     /* unions are possible */\n\n    typedef SHORT       FIXP_SGL;\n    typedef LONG        FIXP_DBL;\n\n/* macros for compile-time conversion of constant float values to fixedpoint */\n#define FL2FXCONST_SPC FL2FXCONST_DBL\n\n#define MINVAL_DBL_CONST MINVAL_DBL\n#define MINVAL_SGL_CONST MINVAL_SGL\n\n#define FL2FXCONST_SGL(val)                                                                                                     \\\n(FIXP_SGL)( ( (val) >= 0) ?                                                                                                               \\\n((( (double)(val) * (FRACT_FIX_SCALE) + (double)0.5 ) >= (double)(MAXVAL_SGL) ) ? (SHORT)(MAXVAL_SGL) : (SHORT)( (double)(val) * (double)(FRACT_FIX_SCALE) + (double)0.5)) :   \\\n((( (double)(val) * (FRACT_FIX_SCALE) - (double)0.5) <=  (double)(MINVAL_SGL_CONST) ) ? (SHORT)(MINVAL_SGL_CONST) : (SHORT)( (double)(val) * (double)(FRACT_FIX_SCALE) - (double)0.5)) )\n\n#define FL2FXCONST_DBL(val)                                                                                                     \\\n(FIXP_DBL)( ( (val) >= 0) ?                                                                                                               \\\n((( (double)(val) * (DFRACT_FIX_SCALE) + (double)0.5 ) >= (double)(MAXVAL_DBL) ) ? (LONG)(MAXVAL_DBL) : (LONG)( (double)(val) * (double)(DFRACT_FIX_SCALE) + (double)0.5)) : \\\n((( (double)(val) * (DFRACT_FIX_SCALE) - (double)0.5) <=  (double)(MINVAL_DBL_CONST) ) ? (LONG)(MINVAL_DBL_CONST) : (LONG)( (double)(val) * (double)(DFRACT_FIX_SCALE) - (double)0.5)) )\n\n/* macros for runtime conversion of float values to integer fixedpoint. NO OVERFLOW CHECK!!! */\n#define FL2FX_SPC FL2FX_DBL\n#define FL2FX_SGL(val) ( (val)>0.0f ? (SHORT)( (val)*(float)(FRACT_FIX_SCALE)+0.5f ) : (SHORT)( (val)*(float)(FRACT_FIX_SCALE)-0.5f ) )\n#define FL2FX_DBL(val) ( (val)>0.0f ? (LONG)( (val)*(float)(DFRACT_FIX_SCALE)+0.5f ) : (LONG)( (val)*(float)(DFRACT_FIX_SCALE)-0.5f ) )\n\n/* macros for runtime conversion of fixedpoint values to other fixedpoint. NO ROUNDING!!! */\n#define FX_ACC2FX_SGL(val) ((FIXP_SGL)((val)>>(ACCU_BITS-FRACT_BITS)))\n#define FX_ACC2FX_DBL(val) ((FIXP_DBL)((val)>>(ACCU_BITS-DFRACT_BITS)))\n#define FX_SGL2FX_ACC(val) ((FIXP_ACC)((LONG)(val)<<(ACCU_BITS-FRACT_BITS)))\n#define FX_SGL2FX_DBL(val) ((FIXP_DBL)((LONG)(val)<<(DFRACT_BITS-FRACT_BITS)))\n#define FX_DBL2FX_SGL(val) ((FIXP_SGL)((val)>>(DFRACT_BITS-FRACT_BITS)))\n\n/* ############################################################# */\n\n/* macros for runtime conversion of integer fixedpoint values to float. */\n/* This is just for temporary use and should not be required in a final version! */\n\n/* #define FX_DBL2FL(val)  ((float)(pow(2.,-31.)*(float)val)) */  /* version #1 */\n#define FX_DBL2FL(val)  ((float)((double)(val)/(double)DFRACT_FIX_SCALE))   /* version #2 - identical to class dfract cast from dfract to float */\n\n/* ############################################################# */\n#include \"fixmul.h\"\n\nFDK_INLINE LONG fMult(SHORT a, SHORT b)         { return fixmul_SS(a, b); }\nFDK_INLINE LONG fMult(SHORT a, LONG b)          { return fixmul_SD(a, b); }\nFDK_INLINE LONG fMult(LONG a, SHORT b)          { return fixmul_DS(a, b); }\nFDK_INLINE LONG fMult(LONG a, LONG b)           { return fixmul_DD(a, b); }\nFDK_INLINE LONG fPow2(LONG a)                   { return fixpow2_D(a);    }\nFDK_INLINE LONG fPow2(SHORT a)                  { return fixpow2_S(a);    }\n\nFDK_INLINE INT  fMultI(LONG a, SHORT b)         { return ( (INT)(((1<<(FRACT_BITS-2)) +\n                                                          fixmuldiv2_DD(a,((INT)b<>(FRACT_BITS-1)) ); }\n\nFDK_INLINE INT  fMultIfloor(LONG a, INT b)      { return ( (INT)((1 +\n                                                          fixmuldiv2_DD(a,(b<> (FRACT_BITS-1)) ); }\n\nFDK_INLINE INT  fMultIceil(LONG a, INT b)       { return ( (INT)(((INT)0x7fff +\n                                                          fixmuldiv2_DD(a,(b<> (FRACT_BITS-1)) ); }\n\nFDK_INLINE LONG fMultDiv2(SHORT a, SHORT b)     { return fixmuldiv2_SS(a, b); }\nFDK_INLINE LONG fMultDiv2(SHORT a, LONG b)      { return fixmuldiv2_SD(a, b); }\nFDK_INLINE LONG fMultDiv2(LONG a, SHORT b)      { return fixmuldiv2_DS(a, b); }\nFDK_INLINE LONG fMultDiv2(LONG a, LONG b)       { return fixmuldiv2_DD(a, b); }\nFDK_INLINE LONG fPow2Div2(LONG a)               { return fixpow2div2_D(a);    }\nFDK_INLINE LONG fPow2Div2(SHORT a)              { return fixpow2div2_S(a);    }\n\nFDK_INLINE LONG fMultDiv2BitExact(LONG a, LONG b)   { return fixmuldiv2BitExact_DD(a, b); }\nFDK_INLINE LONG fMultDiv2BitExact(SHORT a, LONG  b) { return fixmuldiv2BitExact_SD(a, b); }\nFDK_INLINE LONG fMultDiv2BitExact(LONG  a, SHORT b) { return fixmuldiv2BitExact_DS(a, b); }\nFDK_INLINE LONG fMultBitExact(LONG a, LONG b)       { return fixmulBitExact_DD(a, b); }\nFDK_INLINE LONG fMultBitExact(SHORT a, LONG  b)     { return fixmulBitExact_SD(a, b); }\nFDK_INLINE LONG fMultBitExact(LONG  a, SHORT b)     { return fixmulBitExact_DS(a, b); }\n\n/* ******************************************************************************** */\n#include \"abs.h\"\n\nFDK_INLINE FIXP_DBL fAbs(FIXP_DBL x)\n                { return fixabs_D(x); }\nFDK_INLINE FIXP_SGL fAbs(FIXP_SGL x)\n                { return fixabs_S(x); }\n\n/* workaround for TI C6x compiler but not for TI ARM9E compiler */\n#if (!defined(__TI_COMPILER_VERSION__) || defined(__TI_TMS470_V5__)) && !defined(__LP64__)\nFDK_INLINE INT  fAbs(INT x)\n                { return fixabs_I(x); }\n#endif\n\n/* ******************************************************************************** */\n\n#include \"clz.h\"\n\nFDK_INLINE INT fNormz(FIXP_DBL x)\n               { return fixnormz_D(x); }\nFDK_INLINE INT fNormz(FIXP_SGL x)\n               { return fixnormz_S(x); }\nFDK_INLINE INT fNorm(FIXP_DBL x)\n               { return fixnorm_D(x); }\nFDK_INLINE INT fNorm(FIXP_SGL x)\n               { return fixnorm_S(x); }\n\n\n/* ******************************************************************************** */\n/* ******************************************************************************** */\n/* ******************************************************************************** */\n\n#include \"clz.h\"\n#define fixp_abs(x) fAbs(x)\n#define fixMin(a,b) fMin(a,b)\n#define fixMax(a,b) fMax(a,b)\n#define CntLeadingZeros(x)  fixnormz_D(x)\n#define CountLeadingBits(x) fixnorm_D(x)\n\n#include \"fixmadd.h\"\n\n/* y = (x+0.5*a*b) */\nFDK_INLINE FIXP_DBL fMultAddDiv2(FIXP_DBL x, FIXP_DBL a, FIXP_DBL b)\n                { return fixmadddiv2_DD(x, a, b); }\nFDK_INLINE FIXP_DBL fMultAddDiv2(FIXP_DBL x, FIXP_SGL a, FIXP_DBL b)\n                { return fixmadddiv2_SD(x, a, b); }\nFDK_INLINE FIXP_DBL fMultAddDiv2(FIXP_DBL x, FIXP_DBL a, FIXP_SGL b)\n                { return fixmadddiv2_DS(x, a, b); }\nFDK_INLINE FIXP_DBL fMultAddDiv2(FIXP_DBL x, FIXP_SGL a, FIXP_SGL b)\n                { return fixmadddiv2_SS(x, a, b); }\n\nFDK_INLINE FIXP_DBL fPow2AddDiv2(FIXP_DBL x, FIXP_DBL a)\n                { return fixpadddiv2_D(x, a); }\nFDK_INLINE FIXP_DBL fPow2AddDiv2(FIXP_DBL x, FIXP_SGL a)\n                { return fixpadddiv2_S(x, a); }\n\n\n/* y = 2*(x+0.5*a*b) = (2x+a*b) */\nFDK_INLINE FIXP_DBL fMultAdd(FIXP_DBL x, FIXP_DBL a, FIXP_DBL b)\n                { return fixmadd_DD(x, a, b); }\ninline FIXP_DBL fMultAdd(FIXP_DBL x, FIXP_SGL a, FIXP_DBL b)\n                { return fixmadd_SD(x, a, b); }\ninline FIXP_DBL fMultAdd(FIXP_DBL x, FIXP_DBL a, FIXP_SGL b)\n                { return fixmadd_DS(x, a, b); }\ninline FIXP_DBL fMultAdd(FIXP_DBL x, FIXP_SGL a, FIXP_SGL b)\n                { return fixmadd_SS(x, a, b); }\n\ninline FIXP_DBL fPow2Add(FIXP_DBL x, FIXP_DBL a)\n                { return fixpadd_D(x, a); }\ninline FIXP_DBL fPow2Add(FIXP_DBL x, FIXP_SGL a)\n                { return fixpadd_S(x, a); }\n\n\n/* y = (x-0.5*a*b) */\ninline FIXP_DBL fMultSubDiv2(FIXP_DBL x, FIXP_DBL a, FIXP_DBL b)\n                { return fixmsubdiv2_DD(x, a, b); }\ninline FIXP_DBL fMultSubDiv2(FIXP_DBL x, FIXP_SGL a, FIXP_DBL b)\n                { return fixmsubdiv2_SD(x, a, b); }\ninline FIXP_DBL fMultSubDiv2(FIXP_DBL x, FIXP_DBL a, FIXP_SGL b)\n                { return fixmsubdiv2_DS(x, a, b); }\ninline FIXP_DBL fMultSubDiv2(FIXP_DBL x, FIXP_SGL a, FIXP_SGL b)\n                { return fixmsubdiv2_SS(x, a, b); }\n\n/* y = 2*(x-0.5*a*b) = (2*x-a*b) */\nFDK_INLINE FIXP_DBL fMultSub(FIXP_DBL x, FIXP_DBL a, FIXP_DBL b)\n                { return fixmsub_DD(x, a, b); }\ninline FIXP_DBL fMultSub(FIXP_DBL x, FIXP_SGL a, FIXP_DBL b)\n                { return fixmsub_SD(x, a, b); }\ninline FIXP_DBL fMultSub(FIXP_DBL x, FIXP_DBL a, FIXP_SGL b)\n                { return fixmsub_DS(x, a, b); }\ninline FIXP_DBL fMultSub(FIXP_DBL x, FIXP_SGL a, FIXP_SGL b)\n                { return fixmsub_SS(x, a, b); }\n\nFDK_INLINE FIXP_DBL fMultAddDiv2BitExact(FIXP_DBL x, FIXP_DBL a, FIXP_DBL b)\n                { return fixmadddiv2BitExact_DD(x, a, b); }\nFDK_INLINE FIXP_DBL fMultAddDiv2BitExact(FIXP_DBL x, FIXP_SGL a, FIXP_DBL b)\n                { return fixmadddiv2BitExact_SD(x, a, b); }\nFDK_INLINE FIXP_DBL fMultAddDiv2BitExact(FIXP_DBL x, FIXP_DBL a, FIXP_SGL b)\n                { return fixmadddiv2BitExact_DS(x, a, b); }\nFDK_INLINE FIXP_DBL fMultSubDiv2BitExact(FIXP_DBL x, FIXP_DBL a, FIXP_DBL b)\n                { return fixmsubdiv2BitExact_DD(x, a, b); }\nFDK_INLINE FIXP_DBL fMultSubDiv2BitExact(FIXP_DBL x, FIXP_SGL a, FIXP_DBL b)\n                { return fixmsubdiv2BitExact_SD(x, a, b); }\nFDK_INLINE FIXP_DBL fMultSubDiv2BitExact(FIXP_DBL x, FIXP_DBL a, FIXP_SGL b)\n                { return fixmsubdiv2BitExact_DS(x, a, b); }\n\n#include \"fixminmax.h\"\n\nFDK_INLINE FIXP_DBL fMin(FIXP_DBL a, FIXP_DBL b)\n                { return fixmin_D(a,b); }\nFDK_INLINE FIXP_DBL fMax(FIXP_DBL a, FIXP_DBL b)\n                { return fixmax_D(a,b); }\n\nFDK_INLINE FIXP_SGL fMin(FIXP_SGL a, FIXP_SGL b)\n                { return fixmin_S(a,b); }\nFDK_INLINE FIXP_SGL fMax(FIXP_SGL a, FIXP_SGL b)\n                { return fixmax_S(a,b); }\n\n/* workaround for TI C6x compiler but not for TI ARM9E */\n#if ((!defined(__TI_COMPILER_VERSION__) || defined(__TI_TMS470_V5__)) && !defined(__LP64__)) || (FIX_FRACT == 1)\nFDK_INLINE INT fMax(INT a, INT b)\n                { return fixmax_I(a,b); }\nFDK_INLINE INT fMin(INT a, INT b)\n                { return fixmin_I(a,b); }\n#endif\n\ninline UINT fMax(UINT a, UINT b)\n                { return fixmax_UI(a,b); }\ninline UINT fMin(UINT a, UINT b)\n                { return fixmin_UI(a,b); }\n\n/* Complex data types */\ntypedef shouldBeUnion {\n  /* vector representation for arithmetic */\n  struct {\n    FIXP_SGL re;\n    FIXP_SGL im;\n  } v;\n  /* word representation for memory move */\n  LONG w;\n} FIXP_SPK;\n\ntypedef shouldBeUnion {\n  /* vector representation for arithmetic */\n  struct {\n    FIXP_DBL re;\n    FIXP_DBL im;\n  } v;\n  /* word representation for memory move */\n  INT64 w;\n} FIXP_DPK;\n\n#include \"fixmul.h\"\n#include \"fixmadd.h\"\n#include \"cplx_mul.h\"\n#include \"scale.h\"\n#include \"fixpoint_math.h\"\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/cplx_mul.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#include \"common_fix.h\"\n\n#if !defined(__CPLX_Mult_H__)\n#define __CPLX_Mult_H__\n\n#if defined(__CC_ARM) || defined(__arm__) || defined(_M_ARM)\t/* cppp replaced: elif */\n#include \"arm/cplx_mul.h\"\n\n#elif defined(__GNUC__) && defined(__mips__) && __mips_isa_rev < 6\n#include \"mips/cplx_mul.h\"\n\n#endif /* #if defined all cores: bfin, arm, etc. */\n\n/* ############################################################################# */\n\n/* Fallback generic implementations */\n\n#if !defined(FUNCTION_cplxMultDiv2_32x16X2)\n#define FUNCTION_cplxMultDiv2_32x16X2\n\ninline void cplxMultDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          const FIXP_DBL  a_Re,\n                          const FIXP_DBL  a_Im,\n                          const FIXP_SGL  b_Re,\n                          const FIXP_SGL  b_Im)\n{\n  *c_Re = fMultDiv2(a_Re,b_Re) - fMultDiv2(a_Im,b_Im);\n  *c_Im = fMultDiv2(a_Re,b_Im) + fMultDiv2(a_Im,b_Re);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMultDiv2_32x16)\n#define FUNCTION_cplxMultDiv2_32x16\n\ninline void cplxMultDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          const FIXP_DBL a_Re,\n                          const FIXP_DBL a_Im,\n                          const FIXP_SPK w )\n{\n  cplxMultDiv2(c_Re, c_Im, a_Re, a_Im, w.v.re, w.v.im);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMultAddDiv2_32x16X2)\n#define FUNCTION_cplxMultAddDiv2_32x16X2\n\ninline void cplxMultAddDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          const FIXP_DBL  a_Re,\n                          const FIXP_DBL  a_Im,\n                          const FIXP_SGL  b_Re,\n                          const FIXP_SGL  b_Im)\n{\n  *c_Re += fMultDiv2(a_Re,b_Re) - fMultDiv2(a_Im,b_Im);\n  *c_Im += fMultDiv2(a_Re,b_Im) + fMultDiv2(a_Im,b_Re);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMultSubDiv2_32x16X2)\n#define FUNCTION_cplxMultSubDiv2_32x16X2\n\ninline void cplxMultSubDiv2( FIXP_DBL *c_Re,\n                             FIXP_DBL *c_Im,\n                             const FIXP_DBL  a_Re,\n                             const FIXP_DBL  a_Im,\n                             const FIXP_SGL  b_Re,\n                             const FIXP_SGL  b_Im)\n{\n  *c_Re -= fMultDiv2(a_Re,b_Re) - fMultDiv2(a_Im,b_Im);\n  *c_Im -= fMultDiv2(a_Re,b_Im) + fMultDiv2(a_Im,b_Re);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMultDiv2_32x32X2)\n#define FUNCTION_cplxMultDiv2_32x32X2\n\ninline void cplxMultDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          const FIXP_DBL  a_Re,\n                          const FIXP_DBL  a_Im,\n                          const FIXP_DBL  b_Re,\n                          const FIXP_DBL  b_Im)\n{\n  *c_Re = fMultDiv2(a_Re,b_Re) - fMultDiv2(a_Im,b_Im);\n  *c_Im = fMultDiv2(a_Re,b_Im) + fMultDiv2(a_Im,b_Re);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMultDiv2_32x32)\n#define FUNCTION_cplxMultDiv2_32x32\n\ninline void cplxMultDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          const FIXP_DBL  a_Re,\n                          const FIXP_DBL  a_Im,\n                          const FIXP_DPK  w)\n{\n  cplxMultDiv2(c_Re, c_Im, a_Re, a_Im, w.v.re, w.v.im);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMultSubDiv2_32x32X2)\n#define FUNCTION_cplxMultSubDiv2_32x32X2\n\ninline void cplxMultSubDiv2( FIXP_DBL *c_Re,\n                             FIXP_DBL *c_Im,\n                             const FIXP_DBL  a_Re,\n                             const FIXP_DBL  a_Im,\n                             const FIXP_DBL  b_Re,\n                             const FIXP_DBL  b_Im)\n{\n  *c_Re -= fMultDiv2(a_Re,b_Re) - fMultDiv2(a_Im,b_Im);\n  *c_Im -= fMultDiv2(a_Re,b_Im) + fMultDiv2(a_Im,b_Re);\n}\n#endif\n\n/* ############################################################################# */\n\n#if !defined(FUNCTION_cplxMult_32x16X2)\n#define FUNCTION_cplxMult_32x16X2\n\ninline void cplxMult( FIXP_DBL *c_Re,\n                      FIXP_DBL *c_Im,\n                      const FIXP_DBL  a_Re,\n                      const FIXP_DBL  a_Im,\n                      const FIXP_SGL  b_Re,\n                      const FIXP_SGL  b_Im)\n{\n  *c_Re = fMult(a_Re,b_Re) - fMult(a_Im,b_Im);\n  *c_Im = fMult(a_Re,b_Im) + fMult(a_Im,b_Re);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMult_32x16)\n#define FUNCTION_cplxMult_32x16\n\ninline void cplxMult( FIXP_DBL *c_Re,\n                      FIXP_DBL *c_Im,\n                      const FIXP_DBL a_Re,\n                      const FIXP_DBL a_Im,\n                      const FIXP_SPK w )\n{\n  cplxMult(c_Re, c_Im, a_Re, a_Im, w.v.re, w.v.im);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMult_32x32X2)\n#define FUNCTION_cplxMult_32x32X2\n\ninline void cplxMult( FIXP_DBL *c_Re,\n                      FIXP_DBL *c_Im,\n                      const FIXP_DBL  a_Re,\n                      const FIXP_DBL  a_Im,\n                      const FIXP_DBL  b_Re,\n                      const FIXP_DBL  b_Im)\n{\n  *c_Re = fMult(a_Re,b_Re) - fMult(a_Im,b_Im);\n  *c_Im = fMult(a_Re,b_Im) + fMult(a_Im,b_Re);\n}\n#endif\n\n#if !defined(FUNCTION_cplxMult_32x32)\n#define FUNCTION_cplxMult_32x32\ninline void cplxMult( FIXP_DBL *c_Re,\n                      FIXP_DBL *c_Im,\n                      const FIXP_DBL  a_Re,\n                      const FIXP_DBL  a_Im,\n                      const FIXP_DPK  w)\n{\n  cplxMult(c_Re, c_Im, a_Re, a_Im, w.v.re, w.v.im);\n}\n#endif\n\n/* ############################################################################# */\n\n#endif /* __CPLX_Mult_H__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/dct.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: Library functions to calculate standard DCTs. This will most\n                likely be replaced by hand-optimized functions for the specific\n                target processor.\n\n******************************************************************************/\n\n#ifndef __dct_H\n#define __dct_H\n\n\n\n#include \"common_fix.h\"\n\n/**\n * \\brief Calculate DCT type II of given length. The DCT IV is\n *        calculated by a complex FFT, with some pre and post twiddeling.\n *        A factor of sqrt(2/(N-1)) is NOT applied.\n * \\param pDat pointer to input/output data (in place processing).\n * \\param size size of pDat.\n * \\param pDat_e pointer to an integer containing the exponent of the data\n *               referenced by pDat. The exponent is updated accordingly.\n */\nvoid dct_II(FIXP_DBL *pDat, FIXP_DBL *tmp, int size, int *pDat_e);\n\n/**\n * \\brief Calculate DCT type III of given length. The DCT IV is\n *        calculated by a complex FFT, with some pre and post twiddeling.\n *        Note that the factor 0.5 for the sum term x[0] is 1.0 instead of 0.5.\n *        A factor of sqrt(2/N) is NOT applied.\n * \\param pDat pointer to input/output data (in place processing).\n * \\param size size of pDat.\n * \\param pDat_e pointer to an integer containing the exponent of the data\n *               referenced by pDat. The exponent is updated accordingly.\n */\nvoid dct_III(FIXP_DBL *pDat, FIXP_DBL *tmp, int size, int *pDat_e);\n\n/**\n * \\brief Calculate DCT type IV of given length. The DCT IV is\n *        calculated by a complex FFT, with some pre and post twiddeling.\n *        A factor of sqrt(2/N) is NOT applied.\n * \\param pDat pointer to input/output data (in place processing).\n * \\param size size of pDat.\n * \\param pDat_e pointer to an integer containing the exponent of the data\n *               referenced by pDat. The exponent is updated accordingly.\n */\nvoid dct_IV(FIXP_DBL *pDat,int size, int *pDat_e);\n\n/**\n * \\brief Calculate DST type IV of given length. The DST IV is\n *        calculated by a complex FFT, with some pre and post twiddeling.\n *        A factor of sqrt(2/N) is NOT applied.\n * \\param pDat pointer to input/output data (in place processing).\n * \\param size size of pDat.\n * \\param pDat_e pointer to an integer containing the exponent of the data\n *               referenced by pDat. The exponent is updated accordingly.\n */\nvoid dst_IV(FIXP_DBL *pDat,int size, int *pDat_e);\n\n\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/fft.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   Josef Hoepfl, DSP Solutions\n   Description: Fix point FFT\n\n******************************************************************************/\n\n#ifndef __FFT_H__\n#define __FFT_H__\n\n#include \"common_fix.h\"\n\n/**\n * \\brief Perform an inplace complex valued FFT of length 2^n\n *\n * \\param length Length of the FFT to be calculated.\n * \\param pInput Input/Output data buffer. The input data must have at least 1 bit scale headroom.\n *          The values are interleaved, real/imag pairs.\n * \\param scalefactor Pointer to an INT, which contains the current scale of the input data,\n *                    which is updated according to the FFT scale.\n */\nvoid fft(int length, FIXP_DBL *pInput, INT *scalefactor);\n\n/**\n * \\brief Perform an inplace complex valued IFFT of length 2^n\n *\n * \\param length Length of the FFT to be calculated.\n * \\param pInput Input/Output data buffer. The input data must have at least 1 bit scale headroom.\n *          The values are interleaved, real/imag pairs.\n * \\param scalefactor Pointer to an INT, which contains the current scale of the input data,\n *                    which is updated according to the IFFT scale.\n */\nvoid ifft(int length, FIXP_DBL *pInput, INT *scalefactor);\n\n\n/*\n * Frequently used and fixed short length FFTs.\n */\n\nLNK_SECTION_CODE_L1\nstatic FORCEINLINE void fft_4(FIXP_DBL *x)\n{\n    FIXP_DBL a00, a10, a20, a30, tmp0, tmp1;\n\n    a00 = (x[0] + x[4])>>1;  /* Re A + Re B */\n    a10 = (x[2] + x[6])>>1;  /* Re C + Re D */\n    a20 = (x[1] + x[5])>>1;  /* Im A + Im B */\n    a30 = (x[3] + x[7])>>1;  /* Im C + Im D */\n\n    x[0] = a00 + a10;       /* Re A' = Re A + Re B + Re C + Re D */\n    x[1] = a20 + a30;       /* Im A' = Im A + Im B + Im C + Im D */\n\n    tmp0 = a00 - x[4];       /* Re A - Re B */\n    tmp1 = a20 - x[5];       /* Im A - Im B */\n\n    x[4] = a00 - a10;       /* Re C' = Re A + Re B - Re C - Re D */\n    x[5] = a20 - a30;       /* Im C' = Im A + Im B - Im C - Im D */\n\n    a10 = a10 - x[6];       /* Re C - Re D */\n    a30 = a30 - x[7];       /* Im C - Im D */\n\n    x[2] = tmp0 + a30;       /* Re B' = Re A - Re B + Im C - Im D */\n    x[6] = tmp0 - a30;       /* Re D' = Re A - Re B - Im C + Im D */\n    x[3] = tmp1 - a10;       /* Im B' = Im A - Im B - Re C + Re D */\n    x[7] = tmp1 + a10;       /* Im D' = Im A - Im B + Re C - Re D */\n}\n\nLNK_SECTION_CODE_L1\nstatic FORCEINLINE void fft_8(FIXP_DBL *x)\n{\n      #define W_PiFOURTH STC(0x5a82799a)\n\n      FIXP_DBL a00, a10, a20, a30;\n      FIXP_DBL y[16];\n\n      a00 = (x[0] + x[8])>>1;\n      a10 =  x[4] + x[12];\n      a20 = (x[1] + x[9])>>1;\n      a30 =  x[5] + x[13];\n\n      y[0] = a00 + (a10>>1);\n      y[4] = a00 - (a10>>1);\n      y[1] = a20 + (a30>>1);\n      y[5] = a20 - (a30>>1);\n\n      a00 = a00      - x[8];\n      a10 = (a10>>1) - x[12];\n      a20 = a20      - x[9];\n      a30 = (a30>>1) - x[13];\n\n      y[2] = a00 + a30;\n      y[6] = a00 - a30;\n      y[3] = a20 - a10;\n      y[7] = a20 + a10;\n\n      a00 = (x[2] + x[10])>>1;\n      a10 =  x[6] + x[14];\n      a20 = (x[3] + x[11])>>1;\n      a30 =  x[7] + x[15];\n\n      y[8]  = a00 + (a10>>1);\n      y[12] = a00 - (a10>>1);\n      y[9]  = a20 + (a30>>1);\n      y[13] = a20 - (a30>>1);\n\n      a00 = a00      - x[10];\n      a10 = (a10>>1) - x[14];\n      a20 = a20      - x[11];\n      a30 = (a30>>1) - x[15];\n\n      y[10] = a00 + a30;\n      y[14] = a00 - a30;\n      y[11] = a20 - a10;\n      y[15] = a20 + a10;\n\n      FIXP_DBL vr, vi, ur, ui;\n\n      ur = y[0]>>1;\n      ui = y[1]>>1;\n      vr = y[8];\n      vi = y[9];\n      x[0] = ur + (vr>>1);\n      x[1] = ui + (vi>>1);\n      x[8] = ur - (vr>>1);\n      x[9] = ui - (vi>>1);\n\n      ur = y[4]>>1;\n      ui = y[5]>>1;\n      vi = y[12];\n      vr = y[13];\n      x[4]  = ur + (vr>>1);\n      x[5]  = ui - (vi>>1);\n      x[12] = ur - (vr>>1);\n      x[13] = ui + (vi>>1);\n\n      ur = y[10];\n      ui = y[11];\n      vr = fMultDiv2(ui+ur,W_PiFOURTH);\n      vi = fMultDiv2(ui-ur,W_PiFOURTH);\n      ur = y[2];\n      ui = y[3];\n      x[2]  = (ur>>1) + vr;\n      x[3]  = (ui>>1) + vi;\n      x[10] = (ur>>1) - vr;\n      x[11] = (ui>>1) - vi;\n\n      ur = y[14];\n      ui = y[15];\n      vr = fMultDiv2(ui-ur,W_PiFOURTH);\n      vi = fMultDiv2(ui+ur,W_PiFOURTH);\n      ur = y[6];\n      ui = y[7];\n      x[6]  = (ur>>1) + vr;\n      x[7]  = (ui>>1) - vi;\n      x[14] = (ur>>1) - vr;\n      x[15] = (ui>>1) + vi;\n}\n\n/**\n * \\brief FFT of fixed length 16\n */\ninline void fft_16(FIXP_DBL *x);\n\n/**\n * \\brief FFT of fixed length 32\n */\ninline void fft_32(FIXP_DBL *x);\n\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/fft_rad2.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   M. Lohwasser, M. Gayer\n   Description:\n\n******************************************************************************/\n\n#ifndef _FFT_RAD2_H\n#define _FFT_RAD2_H\n\n\n#include \"common_fix.h\"\n\n/**\n * \\brief Performe an inplace  complex valued FFT of 2^n length\n *\n * \\param x Input/Output data buffer. The input data must have at least 1 bit scale headroom.\n *          The values are interleaved, real/imag pairs.\n * \\param ldn log2 of FFT length\n * \\param trigdata Pointer to a sinetable of a length of at least (2^ldn)/2 sine values.\n * \\param trigDataSize length of the sinetable \"trigdata\".\n */\nvoid dit_fft(FIXP_DBL *x, const INT ldn, const FIXP_STP *trigdata, const INT trigDataSize) ;\n\n/**\n * \\brief Performe an inplace complex valued inverse FFT of 2^n length\n *\n * \\param x Input/Output data buffer. The input data must have at least 1 bit scale headroom.\n *          The values are interleaved, real/imag pairs.\n * \\param ldn log2 of FFT length\n * \\param trigdata Pointer to a sinetable of a length of at least (2^ldn)/2 sine values.\n * \\param trigDataSize length of the sinetable \"trigdata\".\n */\nvoid dit_ifft(FIXP_DBL *x, const INT ldn, const FIXP_STP *trigdata, const INT trigDataSize) ;\n\n/* Rest of the world. */\n\n#define SCALEFACTOR2048       10\n#define SCALEFACTOR1024        9\n#define SCALEFACTOR512         8\n#define SCALEFACTOR256         7\n#define SCALEFACTOR128         6\n#define SCALEFACTOR64          5\n#define SCALEFACTOR32          4\n#define SCALEFACTOR16          3\n#define SCALEFACTOR8           2\n#define SCALEFACTOR4           1\n#define SCALEFACTOR2           1\n\n#endif /* _FFT_RAD2_H */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/fixmadd.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   M. Lohwasser, M. Gayer\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if !defined(__FIXMADD_H__)\n#define __FIXMADD_H__\n\n#include \"FDK_archdef.h\"\n#include \"machine_type.h\"\n#include \"fixmul.h\"\n\n#if defined(__arm__)\n#include \"arm/fixmadd_arm.h\"\n\n#elif defined(__mips__)\t/* cppp replaced: elif */\n#include \"mips/fixmadd_mips.h\"\n\n#endif /* all cores */\n\n/*************************************************************************\n *************************************************************************\n    Software fallbacks for missing functions.\n**************************************************************************\n**************************************************************************/\n\n/* Divide by two versions. */\n\n#if !defined(FUNCTION_fixmadddiv2_DD)\ninline FIXP_DBL fixmadddiv2_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b)\n            { return (x + fMultDiv2 (a, b)); }\n#endif\n\n#if !defined(FUNCTION_fixmadddiv2_SD)\ninline FIXP_DBL fixmadddiv2_SD (FIXP_DBL x, const FIXP_SGL a, const FIXP_DBL b) {\n#ifdef FUNCTION_fixmadddiv2_DS\n  return fixmadddiv2_DS(x, b, a);\n#else\n  return fixmadddiv2_DD(x, FX_SGL2FX_DBL(a), b);\n#endif\n}\n#endif\n\n#if !defined(FUNCTION_fixmadddiv2_DS)\ninline FIXP_DBL fixmadddiv2_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {\n#ifdef FUNCTION_fixmadddiv2_SD\n  return fixmadddiv2_SD(x, b, a);\n#else\n  return fixmadddiv2_DD(x, a, FX_SGL2FX_DBL(b));\n#endif\n}\n#endif\n\n#if !defined(FUNCTION_fixmadddiv2_SS)\ninline FIXP_DBL fixmadddiv2_SS (FIXP_DBL x, const FIXP_SGL a, const FIXP_SGL b)\n            { return x + fMultDiv2(a,b); }\n#endif\n\n#if !defined(FUNCTION_fixmsubdiv2_DD)\ninline FIXP_DBL fixmsubdiv2_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b)\n            { return (x - fMultDiv2 (a, b)); }\n#endif\n\n#if !defined(FUNCTION_fixmsubdiv2_SD)\ninline FIXP_DBL fixmsubdiv2_SD (FIXP_DBL x, const FIXP_SGL a, const FIXP_DBL b) {\n#ifdef FUNCTION_fixmsubdiv2_DS\n  return fixmsubdiv2_DS(x, b, a);\n#else\n  return fixmsubdiv2_DD(x, FX_SGL2FX_DBL(a), b);\n#endif\n}\n#endif\n\n#if !defined(FUNCTION_fixmsubdiv2_DS)\ninline FIXP_DBL fixmsubdiv2_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {\n#ifdef FUNCTION_fixmsubdiv2_SD\n  return fixmsubdiv2_SD(x, b, a);\n#else\n  return fixmsubdiv2_DD(x, a, FX_SGL2FX_DBL(b));\n#endif\n}\n#endif\n\n#if !defined(FUNCTION_fixmsubdiv2_SS)\ninline FIXP_DBL fixmsubdiv2_SS (FIXP_DBL x, const FIXP_SGL a, const FIXP_SGL b)\n            { return x - fMultDiv2(a,b); }\n#endif\n\n\n#if !defined(FUNCTION_fixmadddiv2BitExact_DD)\n#define FUNCTION_fixmadddiv2BitExact_DD\ninline FIXP_DBL fixmadddiv2BitExact_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {\n  return x + fMultDiv2BitExact(a, b);\n}\n#endif\n#if !defined(FUNCTION_fixmadddiv2BitExact_SD)\n#define FUNCTION_fixmadddiv2BitExact_SD\ninline FIXP_DBL fixmadddiv2BitExact_SD (FIXP_DBL x, const FIXP_SGL a, const FIXP_DBL b) {\n#ifdef FUNCTION_fixmadddiv2BitExact_DS\n  return fixmadddiv2BitExact_DS(x, b, a);\n#else\n  return x + fMultDiv2BitExact(a, b);\n#endif\n}\n#endif\n#if !defined(FUNCTION_fixmadddiv2BitExact_DS)\n#define FUNCTION_fixmadddiv2BitExact_DS\ninline FIXP_DBL fixmadddiv2BitExact_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {\n#ifdef FUNCTION_fixmadddiv2BitExact_SD\n  return fixmadddiv2BitExact_SD(x, b, a);\n#else\n  return x + fMultDiv2BitExact(a, b);\n#endif\n}\n#endif\n\n#if !defined(FUNCTION_fixmsubdiv2BitExact_DD)\n#define FUNCTION_fixmsubdiv2BitExact_DD\ninline FIXP_DBL fixmsubdiv2BitExact_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b) {\n  return x - fMultDiv2BitExact(a, b);\n}\n#endif\n#if !defined(FUNCTION_fixmsubdiv2BitExact_SD)\n#define FUNCTION_fixmsubdiv2BitExact_SD\ninline FIXP_DBL fixmsubdiv2BitExact_SD (FIXP_DBL x, const FIXP_SGL a, const FIXP_DBL b) {\n#ifdef FUNCTION_fixmsubdiv2BitExact_DS\n  return fixmsubdiv2BitExact_DS(x, b, a);\n#else\n  return x - fMultDiv2BitExact(a, b);\n#endif\n}\n#endif\n#if !defined(FUNCTION_fixmsubdiv2BitExact_DS)\n#define FUNCTION_fixmsubdiv2BitExact_DS\ninline FIXP_DBL fixmsubdiv2BitExact_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {\n#ifdef FUNCTION_fixmsubdiv2BitExact_SD\n  return fixmsubdiv2BitExact_SD(x, b, a);\n#else\n  return x - fMultDiv2BitExact(a, b);\n#endif\n}\n#endif\n\n/* Normal versions */\n\n#if !defined(FUNCTION_fixmadd_DD)\ninline FIXP_DBL fixmadd_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b)\n            { return fixmadddiv2_DD(x,a,b)<<1; }\n#endif\n#if !defined(FUNCTION_fixmadd_SD)\ninline FIXP_DBL fixmadd_SD (FIXP_DBL x, const FIXP_SGL a, const FIXP_DBL b) {\n#ifdef FUNCTION_fixmadd_DS\n  return fixmadd_DS(x, b, a);\n#else\n  return fixmadd_DD(x, FX_SGL2FX_DBL(a), b);\n#endif\n}\n#endif\n#if !defined(FUNCTION_fixmadd_DS)\ninline FIXP_DBL fixmadd_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {\n#ifdef FUNCTION_fixmadd_SD\n  return fixmadd_SD(x, b, a);\n#else\n  return fixmadd_DD(x, a, FX_SGL2FX_DBL(b));\n#endif\n}\n#endif\n#if !defined(FUNCTION_fixmadd_SS)\ninline FIXP_DBL fixmadd_SS (FIXP_DBL x, const FIXP_SGL a, const FIXP_SGL b)\n            { return (x + fMultDiv2(a,b))<<1; }\n#endif\n\n#if !defined(FUNCTION_fixmsub_DD)\ninline FIXP_DBL fixmsub_DD (FIXP_DBL x, const FIXP_DBL a, const FIXP_DBL b)\n            { return fixmsubdiv2_DD(x,a,b)<<1; }\n#endif\n#if !defined(FUNCTION_fixmsub_SD)\ninline FIXP_DBL fixmsub_SD (FIXP_DBL x, const FIXP_SGL a, const FIXP_DBL b) {\n#ifdef FUNCTION_fixmsub_DS\n  return fixmsub_DS(x, b, a);\n#else\n  return fixmsub_DD(x, FX_SGL2FX_DBL(a), b);\n#endif\n}\n#endif\n#if !defined(FUNCTION_fixmsub_DS)\ninline FIXP_DBL fixmsub_DS (FIXP_DBL x, const FIXP_DBL a, const FIXP_SGL b) {\n#ifdef FUNCTION_fixmsub_SD\n  return fixmsub_SD(x, b, a);\n#else\n  return fixmsub_DD(x, a, FX_SGL2FX_DBL(b));\n#endif\n}\n#endif\n#if !defined(FUNCTION_fixmsub_SS)\ninline FIXP_DBL fixmsub_SS (FIXP_DBL x, const FIXP_SGL a, const FIXP_SGL b)\n            { return (x - fMultDiv2(a,b))<<1; }\n#endif\n\n#if !defined(FUNCTION_fixpow2adddiv2_D)\ninline INT fixpadddiv2_D (FIXP_DBL x, const FIXP_DBL a)\n            { return (x + fPow2Div2(a)); }\n#endif\n#if !defined(FUNCTION_fixpow2add_D)\ninline INT fixpadd_D (FIXP_DBL x, const FIXP_DBL a)\n            {  return (x + fPow2(a)); }\n#endif\n\n#if !defined(FUNCTION_fixpow2adddiv2_S)\ninline INT fixpadddiv2_S (FIXP_DBL x, const FIXP_SGL a)\n            { return (x + fPow2Div2(a)); }\n#endif\n#if !defined(FUNCTION_fixpow2add_S)\ninline INT fixpadd_S (FIXP_DBL x, const FIXP_SGL a)\n            {  return (x + fPow2(a)); }\n#endif\n\n\n\n#endif // __FIXMADD_H__\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/fixminmax.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   M. Lohwasser, M. Gayer\n   Description: min/max inline functions and defines\n\n******************************************************************************/\n\n#ifndef FIXMINMAX__H\n#define FIXMINMAX__H\n\n#include \"FDK_archdef.h\"\n#include \"machine_type.h\"\n\n/* Inline Function to determine the smaller/bigger value of two values with same type. */\n\n\ntemplate  inline T fixmin (T a, T b)\n{\n\treturn (a < b ? a : b);\n}\n\ntemplate  inline T fixmax (T a, T b)\n{\n\treturn (a > b ? a : b);\n}\n\n#define fixmax_D(a,b) fixmax(a,b)\n#define fixmin_D(a,b) fixmin(a,b)\n#define fixmax_S(a,b) fixmax(a,b)\n#define fixmin_S(a,b) fixmin(a,b)\n#define fixmax_I(a,b) fixmax(a,b)\n#define fixmin_I(a,b) fixmin(a,b)\n#define fixmax_UI(a,b) fixmax(a,b)\n#define fixmin_UI(a,b) fixmin(a,b)\n\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/fixmul.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   Stefan Gewinner\n   Description: fixed point multiplication\n\n******************************************************************************/\n\n#if !defined(__FIXMUL_H__)\n#define __FIXMUL_H__\n\n#include \"FDK_archdef.h\"\n#include \"machine_type.h\"\n\n\n#if defined(__arm__)\n#include \"arm/fixmul_arm.h\"\n\n#elif defined(__aarch64__) || defined(__AARCH64EL__)\n#include \"aarch64/fixmul_aarch64.h\"\n\n#elif defined(__mips__)\t/* cppp replaced: elif */\n#include \"mips/fixmul_mips.h\"\n\n#elif defined(__x86__)\t/* cppp replaced: elif */\n#include \"x86/fixmul_x86.h\"\n\n#elif defined(__powerpc__)\n#include \"ppc/fixmul_ppc.h\"\n\n#endif /* all cores */\n\n/*************************************************************************\n *************************************************************************\n    Software fallbacks for missing functions\n**************************************************************************\n**************************************************************************/\n\n#if !defined(FUNCTION_fixmuldiv2_DD)\n#define FUNCTION_fixmuldiv2_DD\n#if defined(_MSC_VER) || defined(__CC_ARM) || defined(__ANALOG_EXTENSIONS__) || defined(__TI_COMPILER_VERSION__)\n#pragma message (\"Extremely slow implementation of fixmuldiv2_DD !!\")\n#else\n#warning Extremely slow implementation of fixmuldiv2_DD !!\n#endif\ninline LONG fixmuldiv2_DD (const LONG a, const LONG b)\n{\n  return (LONG) ((((INT64)a) * b) >> 32) ;\n}\n#endif\n\n#if !defined(FUNCTION_fixmuldiv2BitExact_DD)\n#define FUNCTION_fixmuldiv2BitExact_DD\n#if defined(_MSC_VER) || defined(__CC_ARM) || defined(__ANALOG_EXTENSIONS__) || defined(__TI_COMPILER_VERSION__)\n#pragma message (\"Extremely slow implementation of fixmuldiv2BitExact_DD !!\")\n#else\n#warning Extremely slow implementation of fixmuldiv2BitExact_DD !!\n#endif\ninline LONG fixmuldiv2BitExact_DD (const LONG a, const LONG b)\n{\n  return (LONG) ((((INT64)a) * b) >> 32) ;\n}\n#endif\n\n#if !defined(FUNCTION_fixmul_DD)\n#define FUNCTION_fixmul_DD\ninline LONG fixmul_DD (const LONG a, const LONG b)\n  { return fixmuldiv2_DD (a, b) << 1 ; }\n#endif\n\n#if !defined(FUNCTION_fixmulBitExact_DD)\n#define FUNCTION_fixmulBitExact_DD\n#if defined(_MSC_VER) || defined(__CC_ARM) || defined(__ANALOG_EXTENSIONS__) || defined(__TI_COMPILER_VERSION__) || defined(__XTENSA__)\n#pragma message (\"Extremely slow implementation of fixmulBitExact_DD !!\")\n#else\n#warning Extremely slow implementation of fixmulBitExact_DD !!\n#endif\ninline LONG fixmulBitExact_DD (const LONG a, const LONG b)\n{\n  return ( (LONG) ((((INT64)a) * b) >> 32) ) << 1;\n}\n#endif\n\n#if !defined(FUNCTION_fixmuldiv2_SS)\n#define FUNCTION_fixmuldiv2_SS\ninline LONG fixmuldiv2_SS (const SHORT a, const SHORT b)\n  { return ((LONG)a*b); }\n#endif\n\n#if !defined(FUNCTION_fixmul_SS)\n#define FUNCTION_fixmul_SS\ninline LONG fixmul_SS (const SHORT a, const SHORT b)\n  { return (a*b) <<1; }\n#endif\n\n#if !defined(FUNCTION_fixmuldiv2_SD)\n#define FUNCTION_fixmuldiv2_SD\ninline LONG fixmuldiv2_SD (const SHORT a, const LONG b)\n#ifdef FUNCTION_fixmuldiv2_DS\n  { return fixmuldiv2_DS(b, a); }\n#else\n  { return fixmuldiv2_DD(FX_SGL2FX_DBL(a), b); }\n#endif\n#endif\n\n#if !defined(FUNCTION_fixmuldiv2_DS)\n#define FUNCTION_fixmuldiv2_DS\ninline LONG fixmuldiv2_DS (const LONG a, const SHORT b)\n#ifdef FUNCTION_fixmuldiv2_SD\n  { return fixmuldiv2_SD(b, a); }\n#else\n  { return fixmuldiv2_DD(a, FX_SGL2FX_DBL(b)); }\n#endif\n#endif\n\n#if !defined(FUNCTION_fixmuldiv2BitExact_SD)\n#define FUNCTION_fixmuldiv2BitExact_SD\ninline LONG fixmuldiv2BitExact_SD (const SHORT a, const LONG b)\n#ifdef FUNCTION_fixmuldiv2BitExact_DS\n  { return fixmuldiv2BitExact_DS(b, a); }\n#else\n  { return (LONG) ((((INT64)a) * b) >> 16) ; }\n#endif\n#endif\n\n#if !defined(FUNCTION_fixmuldiv2BitExact_DS)\n#define FUNCTION_fixmuldiv2BitExact_DS\ninline LONG fixmuldiv2BitExact_DS (const LONG a, const SHORT b)\n#ifdef FUNCTION_fixmuldiv2BitExact_SD\n  { return fixmuldiv2BitExact_SD(b, a); }\n#else\n  { return (LONG) ((((INT64)a) * b) >> 16) ; }\n#endif\n#endif\n\n#if !defined(FUNCTION_fixmul_SD)\n#define FUNCTION_fixmul_SD\ninline LONG fixmul_SD (const SHORT a, const LONG b) {\n#ifdef FUNCTION_fixmul_DS\n  return fixmul_SD(b, a);\n#else\n  return fixmuldiv2_SD (a, b) << 1 ;\n#endif\n}\n#endif\n\n#if !defined(FUNCTION_fixmul_DS)\n#define FUNCTION_fixmul_DS\ninline LONG fixmul_DS (const LONG a, const SHORT b) {\n#ifdef FUNCTION_fixmul_SD\n  return fixmul_SD(b, a);\n#else\n  return fixmuldiv2_DS(a, b) << 1 ;\n#endif\n}\n#endif\n\n#if !defined(FUNCTION_fixmulBitExact_SD)\n#define FUNCTION_fixmulBitExact_SD\ninline LONG fixmulBitExact_SD (const SHORT a, const LONG b)\n#ifdef FUNCTION_fixmulBitExact_DS\n  { return fixmulBitExact_DS(b, a); }\n#else\n  { return (LONG) (((((INT64)a) * b) >> 16) << 1); }\n#endif\n#endif\n\n#if !defined(FUNCTION_fixmulBitExact_DS)\n#define FUNCTION_fixmulBitExact_DS\ninline LONG fixmulBitExact_DS (const LONG a, const SHORT b)\n#ifdef FUNCTION_fixmulBitExact_SD\n  { return fixmulBitExact_SD(b, a); }\n#else\n  { return (LONG) (((((INT64)a) * b) >> 16) << 1); }\n#endif\n#endif\n\n\n#if !defined(FUNCTION_fixpow2div2_D)\n#ifdef ARCH_WA_16BITMULT\n#error Fallback for fixpow2div2_D is not 16 bit safe !\n#endif\n#define FUNCTION_fixpow2div2_D\ninline LONG fixpow2div2_D (const LONG a)\n  { return fixmuldiv2_DD(a, a); }\n#endif\n\n#if !defined(FUNCTION_fixpow2_D)\n#ifdef ARCH_WA_16BITMULT\n#error Fallback for fixpow2_D is not 16 bit safe !\n#endif\n#define FUNCTION_fixpow2_D\ninline LONG fixpow2_D (const LONG a)\n  { return fixpow2div2_D(a)<<1; }\n#endif\n\n#if !defined(FUNCTION_fixpow2div2_S)\n#define FUNCTION_fixpow2div2_S\ninline LONG fixpow2div2_S (const SHORT a)\n  { return fixmuldiv2_SS(a, a); }\n#endif\n\n#if !defined(FUNCTION_fixpow2_S)\n#define FUNCTION_fixpow2_S\ninline LONG fixpow2_S (const SHORT a)\n  { return fixpow2div2_S(a)<<1; }\n#endif\n\n\n#endif /* __FIXMUL_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/fixpoint_math.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2015 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   M. Gayer\n   Description: Fixed point specific mathematical functions\n\n******************************************************************************/\n\n#ifndef __fixpoint_math_H\n#define __fixpoint_math_H\n\n\n#include \"common_fix.h\"\n\n#if !defined(FUNCTION_fIsLessThan)\n/**\n * \\brief Compares two fixpoint values incl. scaling.\n * \\param a_m mantissa of the first input value.\n * \\param a_e exponent of the first input value.\n * \\param b_m mantissa of the second input value.\n * \\param b_e exponent of the second input value.\n * \\return non-zero if (a_m*2^a_e) < (b_m*2^b_e), 0 otherwise\n */\nFDK_INLINE INT fIsLessThan(FIXP_DBL a_m, INT a_e, FIXP_DBL b_m, INT b_e)\n{\n  if (a_e > b_e) {\n    return (b_m >> fMin(a_e-b_e, DFRACT_BITS-1) > a_m);\n  } else {\n    return (a_m >> fMin(b_e-a_e, DFRACT_BITS-1) < b_m);\n  }\n}\n\nFDK_INLINE INT fIsLessThan(FIXP_SGL a_m, INT a_e, FIXP_SGL b_m, INT b_e)\n{\n  if (a_e > b_e) {\n    return (b_m >> fMin(a_e-b_e, FRACT_BITS-1) > a_m);\n  } else {\n    return (a_m >> fMin(b_e-a_e, FRACT_BITS-1) < b_m);\n  }\n}\n#endif\n\n\n\n#define LD_DATA_SCALING (64.0f)\n#define LD_DATA_SHIFT   6   /* pow(2, LD_DATA_SHIFT) = LD_DATA_SCALING */\n\n/**\n * \\brief deprecated. Use fLog2() instead.\n */\nFIXP_DBL CalcLdData(FIXP_DBL op);\n\nvoid LdDataVector(FIXP_DBL *srcVector, FIXP_DBL *destVector, INT number);\n\nFIXP_DBL CalcInvLdData(FIXP_DBL op);\n\n\n    extern const FIXP_DBL ldIntCoeff[];\nextern const FIXP_DBL invSqrtTab[];\nvoid     InitLdInt();\nFIXP_DBL CalcLdInt(INT i);\n\nextern const USHORT sqrt_tab[49];\n\ninline FIXP_DBL sqrtFixp_lookup(FIXP_DBL x)\n{\n  UINT y = (INT)x;\n  UCHAR is_zero=(y==0);\n  INT zeros=fixnormz_D(y) & 0x1e;\n  y<<=zeros;\n  UINT idx=(y>>26)-16;\n  USHORT frac=(y>>10)&0xffff;\n  USHORT nfrac=0xffff^frac;\n  UINT t=nfrac*sqrt_tab[idx]+frac*sqrt_tab[idx+1];\n  t=t>>(zeros>>1);\n  return(is_zero ? 0 : t);\n}\n\ninline FIXP_DBL sqrtFixp_lookup(FIXP_DBL x, INT *x_e)\n{\n  UINT y = (INT)x;\n  INT e;\n\n  if (x == (FIXP_DBL)0) {\n    return x;\n  }\n\n  /* Normalize */\n  e=fixnormz_D(y);\n  y<<=e;\n  e  = *x_e - e + 2;\n\n  /* Correct odd exponent. */\n  if (e & 1) {\n    y >>= 1;\n    e ++;\n  }\n  /* Get square root */\n  UINT idx=(y>>26)-16;\n  USHORT frac=(y>>10)&0xffff;\n  USHORT nfrac=0xffff^frac;\n  UINT t=nfrac*sqrt_tab[idx]+frac*sqrt_tab[idx+1];\n\n  /* Write back exponent */\n  *x_e = e >> 1;\n  return (FIXP_DBL)(LONG)(t>>1);\n}\n\n\n\nFIXP_DBL sqrtFixp(FIXP_DBL op);\n\nvoid InitInvSqrtTab();\n\nFIXP_DBL invSqrtNorm2(FIXP_DBL op, INT *shift);\n\n/*****************************************************************************\n\n    functionname: invFixp\n    description:  delivers 1/(op)\n\n*****************************************************************************/\ninline FIXP_DBL invFixp(FIXP_DBL op)\n{\n    INT tmp_exp ;\n    FIXP_DBL tmp_inv = invSqrtNorm2(op, &tmp_exp) ;\n    FDK_ASSERT((31-(2*tmp_exp+1))>=0) ;\n    return ( fPow2Div2( (FIXP_DBL)tmp_inv ) >> (31-(2*tmp_exp+1)) ) ;\n}\n\n\n\n#if defined(__mips__) && (__GNUC__==2)\n\n#define FUNCTION_schur_div\ninline FIXP_DBL schur_div(FIXP_DBL num,FIXP_DBL denum, INT count)\n{\n  INT result, tmp ;\n   __asm__ (\"srl %1, %2, 15\\n\"\n            \"div %3, %1\\n\" : \"=lo\" (result)\n                           : \"%d\" (tmp), \"d\" (denum) ,  \"d\" (num)\n                           : \"hi\" ) ;\n  return result<<16 ;\n}\n\n/*###########################################################################################*/\n#elif defined(__mips__) && (__GNUC__==3)\n\n#define FUNCTION_schur_div\ninline FIXP_DBL schur_div(FIXP_DBL num,FIXP_DBL denum, INT count)\n{\n  INT result, tmp;\n\n   __asm__ (\"srl  %[tmp], %[denum], 15\\n\"\n            \"div %[result], %[num], %[tmp]\\n\"\n            : [tmp] \"+r\" (tmp), [result]\"=r\"(result)\n            : [denum]\"r\"(denum), [num]\"r\"(num)\n            : \"hi\", \"lo\");\n  return result << (DFRACT_BITS-16);\n}\n\n/*###########################################################################################*/\n#elif defined(SIMULATE_MIPS_DIV)\n\n#define FUNCTION_schur_div\ninline FIXP_DBL schur_div(FIXP_DBL num, FIXP_DBL denum, INT count)\n{\n    FDK_ASSERT (count<=DFRACT_BITS-1);\n    FDK_ASSERT (num>=(FIXP_DBL)0);\n    FDK_ASSERT (denum>(FIXP_DBL)0);\n    FDK_ASSERT (num <= denum);\n\n    INT tmp = denum >> (count-1);\n    INT result = 0;\n\n    while (num > tmp)\n    {\n        num -= tmp;\n        result++;\n    }\n\n    return result << (DFRACT_BITS-count);\n}\n\n/*###########################################################################################*/\n#endif /* target architecture selector */\n\n#if !defined(FUNCTION_schur_div)\n/**\n * \\brief Divide two FIXP_DBL values with given precision.\n * \\param num dividend\n * \\param denum divisor\n * \\param count amount of significant bits of the result (starting to the MSB)\n * \\return num/divisor\n */\nFIXP_DBL schur_div(FIXP_DBL num,FIXP_DBL denum, INT count);\n#endif\n\n\n\nFIXP_DBL mul_dbl_sgl_rnd (const FIXP_DBL op1,\n                          const FIXP_SGL op2);\n\n/**\n * \\brief multiply two values with normalization, thus max precision.\n * Author: Robert Weidner\n *\n * \\param f1 first factor\n * \\param f2 secod factor\n * \\param result_e pointer to an INT where the exponent of the result is stored into\n * \\return mantissa of the product f1*f2\n */\nFIXP_DBL fMultNorm(\n        FIXP_DBL f1,\n        FIXP_DBL f2,\n        INT *result_e\n        );\n\ninline FIXP_DBL fMultNorm(FIXP_DBL f1, FIXP_DBL f2)\n{\n  FIXP_DBL m;\n  INT e;\n\n  m = fMultNorm(f1, f2, &e);\n\n  m = scaleValueSaturate(m, e);\n\n  return m;\n}\n\n/**\n * \\brief Divide 2 FIXP_DBL values with normalization of input values.\n * \\param num numerator\n * \\param denum denomintator\n * \\return num/denum with exponent = 0\n */\nFIXP_DBL fDivNorm(FIXP_DBL num, FIXP_DBL denom, INT *result_e);\n\n/**\n * \\brief Divide 2 FIXP_DBL values with normalization of input values.\n * \\param num numerator\n * \\param denum denomintator\n * \\param result_e pointer to an INT where the exponent of the result is stored into\n * \\return num/denum with exponent = *result_e\n */\nFIXP_DBL fDivNorm(FIXP_DBL num, FIXP_DBL denom);\n\n/**\n * \\brief Divide 2 FIXP_DBL values with normalization of input values.\n * \\param num numerator\n * \\param denum denomintator\n * \\return num/denum with exponent = 0\n */\nFIXP_DBL fDivNormHighPrec(FIXP_DBL L_num, FIXP_DBL L_denum, INT *result_e);\n\n/**\n * \\brief Calculate log(argument)/log(2) (logarithm with base 2). deprecated. Use fLog2() instead.\n * \\param arg mantissa of the argument\n * \\param arg_e exponent of the argument\n * \\param result_e pointer to an INT to store the exponent of the result\n * \\return the mantissa of the result.\n * \\param\n */\nFIXP_DBL CalcLog2(FIXP_DBL arg, INT arg_e, INT *result_e);\n\n/**\n * \\brief return 2 ^ (exp * 2^exp_e)\n * \\param exp_m mantissa of the exponent to 2.0f\n * \\param exp_e exponent of the exponent to 2.0f\n * \\param result_e pointer to a INT where the exponent of the result will be stored into\n * \\return mantissa of the result\n */\nFIXP_DBL f2Pow(const FIXP_DBL exp_m, const INT exp_e, INT *result_e);\n\n/**\n * \\brief return 2 ^ (exp_m * 2^exp_e). This version returns only the mantissa with implicit exponent of zero.\n * \\param exp_m mantissa of the exponent to 2.0f\n * \\param exp_e exponent of the exponent to 2.0f\n * \\return mantissa of the result\n */\nFIXP_DBL f2Pow(const FIXP_DBL exp_m, const INT exp_e);\n\n/**\n * \\brief return x ^ (exp * 2^exp_e), where log2(x) = baseLd_m * 2^(baseLd_e). This saves\n *        the need to compute log2() of constant values (when x is a constant).\n * \\param ldx_m mantissa of log2() of x.\n * \\param ldx_e exponent of log2() of x.\n * \\param exp_m mantissa of the exponent to 2.0f\n * \\param exp_e exponent of the exponent to 2.0f\n * \\param result_e pointer to a INT where the exponent of the result will be stored into\n * \\return mantissa of the result\n */\nFIXP_DBL fLdPow(\n        FIXP_DBL baseLd_m,\n        INT baseLd_e,\n        FIXP_DBL exp_m, INT exp_e,\n        INT *result_e\n        );\n\n/**\n * \\brief return x ^ (exp * 2^exp_e), where log2(x) = baseLd_m * 2^(baseLd_e). This saves\n *        the need to compute log2() of constant values (when x is a constant). This version\n *        does not return an exponent, which is implicitly 0.\n * \\param ldx_m mantissa of log2() of x.\n * \\param ldx_e exponent of log2() of x.\n * \\param exp_m mantissa of the exponent to 2.0f\n * \\param exp_e exponent of the exponent to 2.0f\n * \\return mantissa of the result\n */\nFIXP_DBL fLdPow(\n        FIXP_DBL baseLd_m, INT baseLd_e,\n        FIXP_DBL exp_m, INT exp_e\n        );\n\n/**\n * \\brief return (base * 2^base_e) ^ (exp * 2^exp_e). Use fLdPow() instead whenever possible.\n * \\param base_m mantissa of the base.\n * \\param base_e exponent of the base.\n * \\param exp_m mantissa of power to be calculated of the base.\n * \\param exp_e exponent of power to be calculated of the base.\n * \\param result_e pointer to a INT where the exponent of the result will be stored into.\n * \\return mantissa of the result.\n */\nFIXP_DBL fPow(FIXP_DBL base_m, INT base_e, FIXP_DBL exp_m, INT exp_e, INT *result_e);\n\n/**\n * \\brief return (base * 2^base_e) ^ N\n * \\param base mantissa of the base\n * \\param base_e exponent of the base\n * \\param power to be calculated of the base\n * \\param result_e pointer to a INT where the exponent of the result will be stored into\n * \\return mantissa of the result\n */\nFIXP_DBL fPowInt(FIXP_DBL base_m, INT base_e, INT N, INT *result_e);\n\n/**\n * \\brief calculate logarithm of base 2 of x_m * 2^(x_e)\n * \\param x_m mantissa of the input value.\n * \\param x_e exponent of the input value.\n * \\param pointer to an INT where the exponent of the result is returned into.\n * \\return mantissa of the result.\n */\nFIXP_DBL fLog2(FIXP_DBL x_m, INT x_e, INT *result_e);\n\n/**\n * \\brief calculate logarithm of base 2 of x_m * 2^(x_e)\n * \\param x_m mantissa of the input value.\n * \\param x_e exponent of the input value.\n * \\return mantissa of the result with implicit exponent of LD_DATA_SHIFT.\n */\nFIXP_DBL fLog2(FIXP_DBL x_m, INT x_e);\n\n/**\n * \\brief Add with saturation of the result.\n * \\param a first summand\n * \\param b second summand\n * \\return saturated sum of a and b.\n */\ninline FIXP_SGL fAddSaturate(const FIXP_SGL a, const FIXP_SGL b)\n{\n  LONG sum;\n\n  sum = (LONG)(SHORT)a + (LONG)(SHORT)b;\n  sum = fMax(fMin((INT)sum, (INT)MAXVAL_SGL), (INT)MINVAL_SGL);\n  return (FIXP_SGL)(SHORT)sum;\n}\n\n/**\n * \\brief Add with saturation of the result.\n * \\param a first summand\n * \\param b second summand\n * \\return saturated sum of a and b.\n */\ninline FIXP_DBL fAddSaturate(const FIXP_DBL a, const FIXP_DBL b)\n{\n  LONG sum;\n\n  sum = (LONG)(a>>1) + (LONG)(b>>1);\n  sum = fMax(fMin((INT)sum, (INT)(MAXVAL_DBL>>1)), (INT)(MINVAL_DBL>>1));\n  return (FIXP_DBL)(LONG)(sum<<1);\n}\n\n//#define TEST_ROUNDING\n\n\n\n\n/*****************************************************************************\n\n array for 1/n, n=1..80\n\n****************************************************************************/\n\n  extern const FIXP_DBL invCount[80];\n\n  LNK_SECTION_INITCODE\n  inline void InitInvInt(void) {}\n\n\n/**\n * \\brief Calculate the value of 1/i where i is a integer value. It supports\n *        input values from 1 upto 80.\n * \\param intValue Integer input value.\n * \\param FIXP_DBL representation of 1/intValue\n */\ninline FIXP_DBL GetInvInt(int intValue)\n{\n  FDK_ASSERT((intValue > 0) && (intValue < 80));\n  FDK_ASSERT(intValue<80);\n\treturn invCount[intValue];\n}\n\n\n#endif\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/mdct.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):   Manuel Jander, Josef Hoepfl\n   Description: MDCT routines\n\n******************************************************************************/\n\n#ifndef __MDCT_H__\n#define __MDCT_H__\n\n\n\n#include \"common_fix.h\"\n\n#define MDCT_OUT_HEADROOM     2 /* Output additional headroom */\n#define MDCT_OUTPUT_SCALE    (DFRACT_BITS-SAMPLE_BITS-MDCT_OUT_HEADROOM)\n/* Refer to \"Output word length\" in ISO/IEC 14496-3:2008(E) 23.2.3.6 */\n#define MDCT_OUTPUT_GAIN      16\n\n#if (SAMPLE_BITS == DFRACT_BITS)\n#define IMDCT_SCALE(x) (INT_PCM)SATURATE_LEFT_SHIFT(x, -MDCT_OUTPUT_SCALE, SAMPLE_BITS)\n#else\n#define IMDCT_SCALE(x) (INT_PCM)SATURATE_RIGHT_SHIFT(x, MDCT_OUTPUT_SCALE, SAMPLE_BITS)\n#endif\n#define IMDCT_SCALE_DBL(x) (FIXP_DBL)(x)\n\n/**\n * \\brief MDCT persistent data\n */\ntypedef struct {\n  union {\n    FIXP_DBL *freq;\n    FIXP_DBL *time;\n  } overlap;                       /**< Pointer to overlap memory */\n\n  const FIXP_WTP *prev_wrs;        /**< pointer to previous right window slope  */\n  int prev_tl;                     /**< previous tranform length */\n  int prev_nr;                     /**< previous right window offset */\n  int prev_fr;                     /**< previous right window slope length */\n  int ov_offset;                   /**< overlap time data fill level */\n  int ov_size;                     /**< Overlap buffer size in words */\n\n} mdct_t;\n\ntypedef mdct_t* H_MDCT;\n\n/**\n * \\brief Initialize as valid MDCT handle\n *\n * \\param hMdct handle of an allocated MDCT handle.\n * \\param overlap pointer to FIXP_DBL overlap buffer.\n * \\param overlapBufferSize size in FIXP_DBLs of the given overlap buffer.\n * \\return void\n */\nvoid mdct_init( H_MDCT hMdct,\n                FIXP_DBL *overlap,\n                INT overlapBufferSize );\n\n/**\n * \\brief perform MDCT transform (time domain to frequency domain) with given parameters.\n *\n * \\param hMdct handle of an allocated MDCT handle.\n * \\param spectrum pointer to where the resulting MDCT spectrum will be stored into.\n * \\param scalefactor pointer to the input scale shift value. Updated accordingly on return.\n * \\param input pointer to input time domain signal\n * \\param tl transformation length.\n * \\param nr right window slope offset (amount of window coefficients assumed to be 1.0)\n * \\param fr right overlap window slope length\n * \\param wrs pointer to the right side overlap window coefficients.\n * \\return number of input samples processed.\n */\nINT  mdct_block(\n        H_MDCT hMdct,\n        FIXP_DBL *spectrum,\n        INT *scalefactor,\n        INT_PCM *input,\n        INT tl,\n        INT nr,\n        INT fr,\n        const FIXP_WTB *wrs );\n\n\n/**\n * \\brief add/multiply 2/N transform gain and MPEG4 part 3 defined output gain (see definition\n *        of MDCT_OUTPUT_GAIN) to given mantissa factor and exponent.\n * \\param pGain pointer to the mantissa of a gain factor to be applied to IMDCT data.\n * \\param pExponent pointer to the exponent of a gain factor to be applied to IMDCT data.\n * \\param tl length of the IMDCT where the gain *pGain * (2 ^ *pExponent) will be applied to.\n */\nvoid imdct_gain(\n        FIXP_DBL *pGain,\n        int *pExponent,\n        int tl\n        );\n\n/**\n * \\brief drain buffered output samples into given buffer. Changes the MDCT state.\n */\nINT imdct_drain(\n        H_MDCT hMdct,\n        FIXP_DBL * pTimeData,\n        INT nrSamplesRoom\n        );\n\n\n/**\n * \\brief Copy overlap time domain data to given buffer. Does not change the MDCT state.\n * \\return number of actually copied samples (ov + nr).\n */\nINT imdct_copy_ov_and_nr(\n        H_MDCT hMdct,\n        FIXP_DBL * pTimeData,\n        INT nrSamples\n        );\n\n/**\n * \\brief Adapt MDCT parameters for non-matching window slopes.\n * \\param hMdct handle of an allocated MDCT handle.\n * \\param pfl pointer to left overlap window side length.\n * \\param pnl pointer to length of the left n part of the window.\n * \\param tl transform length.\n * \\param wls pointer to the left side overlap window coefficients.\n * \\param noOutSamples desired number of output samples.\n */\nvoid imdct_adapt_parameters(H_MDCT hMdct, int *pfl, int *pnl, int tl, const FIXP_WTP *wls, int noOutSamples);\n\n/**\n * \\brief perform several inverse MDCT transforms (frequency domain to time domain) with given parameters.\n *\n * \\param hMdct handle of an allocated MDCT handle.\n * \\param output pointer to where the output time domain signal will be stored into.\n * \\param stride the stride factor for accessing time domain samples in output.\n * \\param spectrum pointer to the input MDCT spectra.\n * \\param scalefactors scale shift values of the input spectrum.\n * \\param nSpec number of MDCT spectrums.\n * \\param noOutSamples desired number of output samples.\n * \\param tl transform length.\n * \\param wls pointer to the left side overlap window coefficients.\n * \\param fl left overlap window side length.\n * \\param wrs pointer to the right side overlap window coefficients of all individual IMDCTs.\n * \\param fr right overlap window side length of all individual IMDCTs.\n * \\param gain factor to apply to output samples (if != 0).\n * \\return number of output samples returned.\n */\nINT  imdct_block(\n        H_MDCT hMdct,\n        FIXP_DBL *output,\n        FIXP_DBL *spectrum,\n        const SHORT scalefactor[],\n        const INT nSpec,\n        const INT noOutSamples,\n        const INT tl,\n        const FIXP_WTP *wls,\n        INT fl,\n        const FIXP_WTP *wrs,\n        const INT fr,\n        FIXP_DBL gain );\n\n\n#endif /* __MDCT_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/mips/abs_mips.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__mips__)\n\n#if defined(__GNUC__) && defined(__mips__)\n\n  #if defined(__mips_dsp)\n    #define FUNCTION_fixabs_D\n    #define FUNCTION_fixabs_I\n    #define FUNCTION_fixabs_S\n    inline FIXP_DBL fixabs_D(FIXP_DBL x) { return __builtin_mips_absq_s_w(x); }\n    inline FIXP_SGL fixabs_S(FIXP_SGL x) { return ((x) > (FIXP_SGL)(0)) ? (x) : -(x) ; }\n    inline INT fixabs_I(INT x)           { return __builtin_mips_absq_s_w(x); }\n  #endif /* __mips_dsp */\n\n#endif /* defined(__GNUC__) && defined(__mips__) */\n\n#endif /*__mips__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/mips/clz_mips.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__mips__)\n\n#if defined(__mips__) && (__GNUC__==2) && (mips>=32)\n\n  #define FUNCTION_fixnormz_D\n  inline INT fixnormz_D(LONG value)\n  {\n    INT result;\n    __asm__ (\"clz %0,%1\" : \"=d\" (result) : \"d\" (value));\n\n    return result;\n  }\n\n#elif defined(__mips__) && (__GNUC__==3) && (__mips>=32)\n\n  #define FUNCTION_fixnormz_D\n  INT inline fixnormz_D(LONG value)\n  {\n    INT result;\n    __asm__ (\"clz %[result], %[value]\" : [result] \"=r\" (result) : [value] \"r\" (value)) ;\n\n    return result;\n  }\n\n#endif\n\n#endif /* __mips__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/mips/cplx_mul.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n\n#if defined(__GNUC__) && defined(__mips__)\n\n\n//#define FUNCTION_cplxMultDiv2_32x16\n//#define FUNCTION_cplxMultDiv2_32x16X2\n#define FUNCTION_cplxMultDiv2_32x32X2\n//#define FUNCTION_cplxMult_32x16\n//#define FUNCTION_cplxMult_32x16X2\n#define FUNCTION_cplxMult_32x32X2\n\n#if defined(FUNCTION_cplxMultDiv2_32x32X2)\ninline void cplxMultDiv2( FIXP_DBL *c_Re,\n                          FIXP_DBL *c_Im,\n                          FIXP_DBL  a_Re,\n                          FIXP_DBL  a_Im,\n                          FIXP_DBL  b_Re,\n                          FIXP_DBL  b_Im)\n{\n  *c_Re = (((long long)a_Re * (long long)b_Re) - ((long long)a_Im * (long long)b_Im))>>32;\n  *c_Im = (((long long)a_Re * (long long)b_Im) + ((long long)a_Im * (long long)b_Re))>>32;\n}\n#endif\n\n#if defined(FUNCTION_cplxMult_32x32X2)\ninline void cplxMult( FIXP_DBL *c_Re,\n                      FIXP_DBL *c_Im,\n                      FIXP_DBL  a_Re,\n                      FIXP_DBL  a_Im,\n                      FIXP_DBL  b_Re,\n                      FIXP_DBL  b_Im)\n{\n  *c_Re = ((((long long)a_Re * (long long)b_Re) - ((long long)a_Im * (long long)b_Im))>>32)<<1;\n  *c_Im = ((((long long)a_Re * (long long)b_Im) + ((long long)a_Im * (long long)b_Re))>>32)<<1;\n}\n#endif\n\n#endif /* defined(__GNUC__) && defined(__mips__) */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/mips/fixmadd_mips.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__mips__)\n\n\n#endif /* __mips__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/mips/fixmul_mips.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__mips__)\n\n#if (__GNUC__) && defined(__mips__)\t/* cppp replaced: elif */\n/* MIPS GCC based compiler */\n\n#define FUNCTION_fixmuldiv2_DD\n\n#define FUNCTION_fixmuldiv2BitExact_DD\n#define fixmuldiv2BitExact_DD(a,b) fixmuldiv2_DD(a,b)\n\ninline INT fixmuldiv2_DD (const INT a, const INT b)\n{\n  INT result ;\n  result = ((long long)a * b)>>32;\n  return result ;\n}\n\n#endif /* (__GNUC__) && defined(__mips__) */\n\n#endif /* __mips__ */\n\n#define FUNCTION_fixmulBitExact_DD\n#define fixmulBitExact_DD fixmul_DD\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/mips/scale.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description:\n\n******************************************************************************/\n\n#ifndef MIPS_SCALE_H\n#define MIPS_SCALE_H\n\n#if defined(__mips_dsp)\n\n/*!\n*\n*  \\brief  Scale input value by 2^{scale} and saturate output to 2^{dBits-1}\n*  \\return scaled and saturated value\n*\n*  This macro scales src value right or left and applies saturation to (2^dBits)-1\n*  maxima output.\n*/\n#define SATURATE_RIGHT_SHIFT(src, scale, dBits)       \\\n          (__builtin_mips_shll_s_w((src)>>scale,(DFRACT_BITS-(dBits)))>>(DFRACT_BITS-(dBits)))\n\n\n#endif /*__mips_dsp */\n\n#endif /* MIPS_SCALE_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/mips/scramble.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description:\n\n******************************************************************************/\n\n#ifndef MIPS_SCRAMBLE_H\n#define MIPS_SCRAMBLE_H\n\n#define FUNCTION_scramble\n\n#if defined(FUNCTION_scramble)\ninline void scramble(FIXP_DBL *x, INT n) {\n  INT m,j;\n  int ldn=1;\n  do {ldn++;} while((1<> (16-ldn);\n\n    if (j>m)\n    {\n      FIXP_DBL tmp;\n      tmp=x[2*m];\n      x[2*m]=x[2*j];\n      x[2*j]=tmp;\n\n      tmp=x[2*m+1];\n      x[2*m+1]=x[2*j+1];\n      x[2*j+1]=tmp;\n    }\n  }\n}\n#endif\n\n#endif /* MIPS_SCRAMBLE_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/ppc/clz_ppc.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__powerpc__) && (defined(__GNUC__) || defined(__xlC__))\n\n#define FUNCTION_fixnormz_D\n\ninline INT fixnormz_D(LONG value)\n{\n  INT result;\n  __asm__ (\"cntlzw %0, %1\" : \"=r\" (result) : \"r\" (value));\n  return result;\n}\n\n#endif /* __powerpc__ && (__GNUC__ || __xlC__) */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/ppc/fixmul_ppc.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__powerpc__) && (defined(__GNUC__) || defined(__xlC__))\n\n#define FUNCTION_fixmuldiv2_DD\n\n#define FUNCTION_fixmuldiv2BitExact_DD\n#define fixmuldiv2BitExact_DD(a,b) fixmuldiv2_DD(a,b)\n\n#define FUNCTION_fixmulBitExact_DD\n#define fixmulBitExact_DD(a,b) fixmul_DD(a,b)\n\n#define FUNCTION_fixmuldiv2BitExact_DS\n#define fixmuldiv2BitExact_DS(a,b) fixmuldiv2_DS(a,b)\n\n#define FUNCTION_fixmulBitExact_DS\n#define fixmulBitExact_DS(a,b) fixmul_DS(a,b)\n\n\ninline INT fixmuldiv2_DD (const INT a, const INT b)\n{\n  INT result;\n  __asm__ (\"mulhw %0, %1, %2\" : \"=r\" (result) : \"r\" (a), \"r\" (b));\n  return result;\n}\n\n#endif /* __powerpc__ && (__GNUC__ || __xlC__) */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/qmf.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/*!\n  \\file   qmf.h\n  \\brief  Complex qmf analysis/synthesis   \n  \\author Markus Werner\n\n*/\n#ifndef __QMF_H\n#define __QMF_H\n\n\n\n#include \"common_fix.h\"\n#include \"FDK_tools_rom.h\"\n#include \"dct.h\"\n\n/*\n * Filter coefficient type definition\n */\n#ifdef QMF_DATA_16BIT\n#define FIXP_QMF FIXP_SGL\n#define FX_DBL2FX_QMF FX_DBL2FX_SGL\n#define FX_QMF2FX_DBL FX_SGL2FX_DBL\n#define QFRACT_BITS FRACT_BITS\n#else\n#define FIXP_QMF FIXP_DBL\n#define FX_DBL2FX_QMF\n#define FX_QMF2FX_DBL\n#define QFRACT_BITS DFRACT_BITS\n#endif\n\n/* ARM neon optimized QMF analysis filter requires 32 bit input.\n   Implemented for RVCT only, currently disabled. See src/arm/qmf_arm.cpp:45 */\n#define FIXP_QAS FIXP_PCM\n#define QAS_BITS SAMPLE_BITS\n\n#ifdef QMFSYN_STATES_16BIT\n#define FIXP_QSS FIXP_SGL\n#define QSS_BITS FRACT_BITS\n#else\n#define FIXP_QSS FIXP_DBL\n#define QSS_BITS DFRACT_BITS\n#endif\n\n/* Flags for QMF intialization */\n/* Low Power mode flag */\n#define QMF_FLAG_LP           1\n/* Filter is not symetric. This flag is set internally in the QMF initialization as required. */\n#define QMF_FLAG_NONSYMMETRIC 2\n/* Complex Low Delay Filter Bank (or std symmetric filter bank) */\n#define QMF_FLAG_CLDFB        4\n/* Flag indicating that the states should be kept. */\n#define QMF_FLAG_KEEP_STATES  8\n/* Complex Low Delay Filter Bank used in MPEG Surround Encoder */\n#define QMF_FLAG_MPSLDFB     16\n/* Complex Low Delay Filter Bank used in MPEG Surround Encoder allows a optimized calculation of the modulation in qmfForwardModulationHQ() */\n#define QMF_FLAG_MPSLDFB_OPTIMIZE_MODULATION  32\n/* Flag to indicate HE-AAC down-sampled SBR mode (decoder) -> adapt analysis post twiddling */\n#define QMF_FLAG_DOWNSAMPLED  64\n\n\ntypedef struct\n{\n  int lb_scale;        /*!< Scale of low band area                   */\n  int ov_lb_scale;     /*!< Scale of adjusted overlap low band area  */\n  int hb_scale;        /*!< Scale of high band area                  */\n  int ov_hb_scale;     /*!< Scale of adjusted overlap high band area */\n} QMF_SCALE_FACTOR;\n\nstruct QMF_FILTER_BANK\n{\n  const FIXP_PFT *p_filter;     /*!< Pointer to filter coefficients */\n\n  void *FilterStates;           /*!< Pointer to buffer of filter states\n                                     FIXP_PCM in analyse and\n                                     FIXP_DBL in synthesis filter */\n  int FilterSize;               /*!< Size of prototype filter. */\n  const FIXP_QTW *t_cos;        /*!< Modulation tables. */\n  const FIXP_QTW *t_sin;\n  int filterScale;              /*!< filter scale */\n\n  int no_channels;              /*!< Total number of channels (subbands) */\n  int no_col;                   /*!< Number of time slots       */\n  int lsb;                      /*!< Top of low subbands */\n  int usb;                      /*!< Top of high subbands */\n\n  int outScalefactor;           /*!< Scale factor of output data (syn only) */\n  FIXP_DBL outGain;             /*!< Gain output data (syn only) (init with 0x80000000 to ignore) */\n\n  UINT flags;                   /*!< flags */\n  UCHAR p_stride;               /*!< Stride Factor of polyphase filters */\n\n};\n\ntypedef struct QMF_FILTER_BANK *HANDLE_QMF_FILTER_BANK;\n\nvoid\nqmfAnalysisFiltering( HANDLE_QMF_FILTER_BANK anaQmf,  /*!< Handle of Qmf Analysis Bank   */\n                      FIXP_QMF **qmfReal,             /*!< Pointer to real subband slots */\n                      FIXP_QMF **qmfImag,             /*!< Pointer to imag subband slots */\n                      QMF_SCALE_FACTOR *scaleFactor,  /*!< Scale factors of QMF data     */\n                      const INT_PCM *timeIn,          /*!< Time signal */\n                      const int  stride,              /*!< Stride factor of audio data   */\n                      FIXP_QMF  *pWorkBuffer          /*!< pointer to temporal working buffer */\n                      );\n\nvoid\nqmfSynthesisFiltering( HANDLE_QMF_FILTER_BANK synQmf,       /*!< Handle of Qmf Synthesis Bank  */\n                       FIXP_QMF  **QmfBufferReal,           /*!< Pointer to real subband slots */\n                       FIXP_QMF  **QmfBufferImag,           /*!< Pointer to imag subband slots */\n                       const QMF_SCALE_FACTOR *scaleFactor, /*!< Scale factors of QMF data     */\n                       const int   ov_len,                  /*!< Length of band overlap        */\n                       INT_PCM    *timeOut,                 /*!< Time signal */\n                       const int   stride,                  /*!< Stride factor of audio data   */\n                       FIXP_QMF   *pWorkBuffer              /*!< pointer to temporal working buffer */\n                       );\n\nint\nqmfInitAnalysisFilterBank( HANDLE_QMF_FILTER_BANK h_Qmf, /*!< QMF Handle */\n                           FIXP_QAS *pFilterStates,      /*!< Pointer to filter state buffer */\n                           int noCols,                   /*!< Number of time slots  */\n                           int lsb,                      /*!< Number of lower bands */\n                           int usb,                      /*!< Number of upper bands */\n                           int no_channels,              /*!< Number of critically sampled bands */\n                           int flags);                   /*!< Flags */\n\nvoid\nqmfAnalysisFilteringSlot( HANDLE_QMF_FILTER_BANK anaQmf,  /*!< Handle of Qmf Synthesis Bank  */\n                          FIXP_QMF      *qmfReal,         /*!< Low and High band, real */\n                          FIXP_QMF      *qmfImag,         /*!< Low and High band, imag */\n                          const INT_PCM *timeIn,          /*!< Pointer to input */\n                          const int      stride,          /*!< stride factor of input */\n                          FIXP_QMF      *pWorkBuffer      /*!< pointer to temporal working buffer */\n                         );\n\nint\nqmfInitSynthesisFilterBank( HANDLE_QMF_FILTER_BANK h_Qmf, /*!< QMF Handle */\n                            FIXP_QSS *pFilterStates,      /*!< Pointer to filter state buffer */\n                            int noCols,                   /*!< Number of time slots  */\n                            int lsb,                      /*!< Number of lower bands */\n                            int usb,                      /*!< Number of upper bands */\n                            int no_channels,              /*!< Number of critically sampled bands */\n                            int flags);                   /*!< Flags */\n\nvoid qmfSynthesisFilteringSlot( HANDLE_QMF_FILTER_BANK  synQmf,\n                                const FIXP_QMF *realSlot,\n                                const FIXP_QMF *imagSlot,\n                                const int       scaleFactorLowBand,\n                                const int       scaleFactorHighBand,\n                                INT_PCM        *timeOut,\n                                const int       stride,\n                                FIXP_QMF       *pWorkBuffer);\n\nvoid\nqmfChangeOutScalefactor (HANDLE_QMF_FILTER_BANK synQmf,     /*!< Handle of Qmf Synthesis Bank */\n                         int outScalefactor                 /*!< New scaling factor for output data */\n                        );\n\nvoid\nqmfChangeOutGain (HANDLE_QMF_FILTER_BANK synQmf,     /*!< Handle of Qmf Synthesis Bank */\n                  FIXP_DBL outputGain                /*!< New gain for output data */\n                 );\n\n\n\n#endif /* __QMF_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/scale.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: Scaling operations\n\n******************************************************************************/\n\n#ifndef SCALE_H\n#define SCALE_H\n\n#include \"common_fix.h\"\n#include \"genericStds.h\"\n#include \"fixminmax.h\"\n\n  #define SCALE_INLINE inline\n\n\n#if defined(__arm__)\t/* cppp replaced: elif */\n#include \"arm/scale.h\"\n\n#elif defined(__mips__)\t/* cppp replaced: elif */\n#include \"mips/scale.h\"\n\n#endif\n\n\n#include \"../src/scale.cpp\"\n\n#ifndef FUNCTION_scaleValue\n/*!\n *\n *  \\brief Multiply input by \\f$ 2^{scalefactor} \\f$\n *\n *  \\return Scaled input\n *\n */\n#define FUNCTION_scaleValue\ninline\nFIXP_DBL scaleValue(const FIXP_DBL value, /*!< Value */\n                    INT scalefactor   /*!< Scalefactor */\n                   )\n{\n  if(scalefactor > 0)\n    return (value<>(-scalefactor));\n}\n#endif\n\n#ifndef FUNCTION_scaleValueSaturate\n/*!\n *\n *  \\brief Multiply input by \\f$ 2^{scalefactor} \\f$\n *  \\param value The value to be scaled.\n *  \\param the shift amount\n *  \\return \\f$ value * 2^scalefactor \\f$\n *\n */\n#define FUNCTION_scaleValueSaturate\ninline\nFIXP_DBL scaleValueSaturate(\n        const FIXP_DBL value,\n        INT scalefactor\n        )\n{\n  if(scalefactor > 0) {\n    if (fNorm(value) < scalefactor && value != (FIXP_DBL)0) {\n      if (value > (FIXP_DBL)0) {\n        return (FIXP_DBL)MAXVAL_DBL;\n      } else {\n        return (FIXP_DBL)MINVAL_DBL;\n      }\n    } else {\n      return (value< scalefactor) {\n      return (FIXP_DBL)0;\n    } else {\n    return (value>>(-scalefactor));\n    }\n  }\n}\n#endif\n\n#ifndef FUNCTION_scaleValueInPlace\n/*!\n *\n *  \\brief Multiply input by \\f$ 2^{scalefactor} \\f$ in place\n *\n *  \\return void\n *\n */\n#define FUNCTION_scaleValueInPlace\ninline\nvoid scaleValueInPlace(\n        FIXP_DBL *value, /*!< Value */\n        INT scalefactor   /*!< Scalefactor */\n        )\n{\n  INT newscale;\n  /* Note: The assignment inside the if conditional allows combining a load with the compare to zero (on ARM and maybe others) */\n  if ((newscale = (scalefactor)) >= 0) {\n    *(value) <<= newscale;\n  } else {\n    *(value) >>= -newscale;\n  }\n}\n#endif\n\n/*!\n *\n *  \\brief  Scale input value by 2^{scale} and saturate output to 2^{dBits-1}\n *  \\return scaled and saturated value\n *\n *  This macro scales src value right or left and applies saturation to (2^dBits)-1\n *  maxima output.\n */\n\n#ifndef SATURATE_RIGHT_SHIFT\n  #define SATURATE_RIGHT_SHIFT(src, scale, dBits)                                                      \\\n            ( (((LONG)(src)>>(scale)) > (LONG)(((1U)<<((dBits)-1))-1))      ? (LONG)(((1U)<<((dBits)-1))-1)    \\\n              : (((LONG)(src)>>(scale)) < ~((LONG)(((1U)<<((dBits)-1))-1))) ? ~((LONG)(((1U)<<((dBits)-1))-1)) \\\n              : ((LONG)(src) >> (scale)) )\n#endif\n\n#ifndef SATURATE_LEFT_SHIFT\n  #define SATURATE_LEFT_SHIFT(src, scale, dBits)                                                       \\\n            ( ((LONG)(src) > ((LONG)(((1U)<<((dBits)-1))-1)>>(scale)))    ? (LONG)(((1U)<<((dBits)-1))-1)      \\\n              : ((LONG)(src) < ~((LONG)(((1U)<<((dBits)-1))-1)>>(scale))) ? ~((LONG)(((1U)<<((dBits)-1))-1))   \\\n              : ((LONG)(src) << (scale)) )\n#endif\n\n#ifndef SATURATE_SHIFT\n#define SATURATE_SHIFT(src, scale, dBits)               \\\n     ( ((scale) < 0)                                      \\\n      ? SATURATE_LEFT_SHIFT((src), -(scale), (dBits))   \\\n      : SATURATE_RIGHT_SHIFT((src), (scale), (dBits)) )\n#endif\n\n/*\n * Alternative shift and saturate left, saturates to -0.99999 instead of -1.0000\n * to avoid problems when inverting the sign of the result.\n */\n#ifndef SATURATE_LEFT_SHIFT_ALT\n#define SATURATE_LEFT_SHIFT_ALT(src, scale, dBits)                                                     \\\n            ( ((LONG)(src) > ((LONG)(((1U)<<((dBits)-1))-1)>>(scale)))    ? (LONG)(((1U)<<((dBits)-1))-1)      \\\n              : ((LONG)(src) < ~((LONG)(((1U)<<((dBits)-1))-2)>>(scale))) ? ~((LONG)(((1U)<<((dBits)-1))-2))   \\\n              : ((LONG)(src) << (scale)) )\n#endif\n\n#ifndef SATURATE_RIGHT_SHIFT_ALT\n  #define SATURATE_RIGHT_SHIFT_ALT(src, scale, dBits)                                                  \\\n            ( (((LONG)(src)>>(scale)) > (LONG)(((1U)<<((dBits)-1))-1))      ? (LONG)(((1U)<<((dBits)-1))-1)    \\\n              : (((LONG)(src)>>(scale)) < ~((LONG)(((1U)<<((dBits)-1))-2))) ? ~((LONG)(((1U)<<((dBits)-1))-2)) \\\n              : ((LONG)(src) >> (scale)) )\n#endif\n\n#ifndef SATURATE_INT_PCM_RIGHT_SHIFT\n#define SATURATE_INT_PCM_RIGHT_SHIFT(src, scale) SATURATE_RIGHT_SHIFT(src, scale, SAMPLE_BITS)\n#endif\n\n#ifndef SATURATE_INT_PCM_LEFT_SHIFT\n#define SATURATE_INT_PCM_LEFT_SHIFT(src, scale) SATURATE_LEFT_SHIFT(src, scale, SAMPLE_BITS)\n#endif\n\n#endif /* #ifndef SCALE_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/scramble.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description:\n\n******************************************************************************/\n\n#ifndef SCRAMBLE_H\n#define SCRAMBLE_H\n\n#include \"common_fix.h\"\n\n#if defined(__arm__)\n#include \"arm/scramble.h\"\n\n#elif defined(__mips__) && defined(__mips_dsp)\t/* cppp replaced: elif */\n#include \"mips/scramble.h\"\n\n#endif\n\n/*****************************************************************************\n\n    functionname: scramble\n    description:  bitreversal of input data\n    returns:\n    input:\n    output:\n\n*****************************************************************************/\n#if !defined(FUNCTION_scramble_sgl)\n\ninline void scramble_sgl(FIXP_SGL *x, INT n)\n{\n  INT m,k,j;\n\n  for (m=1,j=0; m>1; (!((j^=k)&k)); k>>=1);}\n\n    if (j>m)\n    {\n      FIXP_SGL tmp;\n      tmp=x[2*m];\n      x[2*m]=x[2*j];\n      x[2*j]=tmp;\n\n      tmp=x[2*m+1];\n      x[2*m+1]=x[2*j+1];\n      x[2*j+1]=tmp;\n    }\n  }\n}\n#endif\n\n#if !defined(FUNCTION_scramble)\n\n/* default scramble functionality */\ninline void scramble(FIXP_DBL *x, INT n)\n{\n  INT m,k,j;\n  FDK_ASSERT(!(((UINT64)x)&(ALIGNMENT_DEFAULT-1)));\n\n  for (m=1,j=0; m>1; (!((j^=k)&k)); k>>=1);}\n\n    if (j>m)\n    {\n      FIXP_DBL tmp;\n      tmp=x[2*m];\n      x[2*m]=x[2*j];\n      x[2*j]=tmp;\n\n      tmp=x[2*m+1];\n      x[2*m+1]=x[2*j+1];\n      x[2*j+1]=tmp;\n    }\n  }\n}\n#endif /* !defined(FUNCTION_scramble) */\n\n#endif /* SCRAMBLE_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/x86/abs_x86.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n#if defined(__x86__)\n\n  #if defined(__x86_64__)\n\n    inline INT fixabs_D(INT x)      { return ((x) > (INT)(0))      ? (x) : -(x) ; }\n    inline INT fixabs_S(INT x)      { return ((x) > (INT)(0))      ? (x) : -(x) ; }\n\n    #define fixabs_I(x) fixabs_D(x)\n\n    #define FUNCTION_fixabs_S\n    #define FUNCTION_fixabs_D\n    #define FUNCTION_fixabs_I\n\n  #endif /* __x86_64__ */\n\n#endif /*__x86__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/x86/clz_x86.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__GNUC__) && (defined(__x86__) || defined(__x86_64__))\n\n  #define FUNCTION_fixnormz_D\n  #define FUNCTION_fixnorm_D\n\n  inline INT fixnormz_D(LONG value)\n  {\n    INT result;\n\n    if (value != 0) {\n      result = __builtin_clz(value);\n    } else {\n      result = 32;\n    }\n    return result;\n  }\n\n  inline INT fixnorm_D(LONG value)\n  {\n    INT result;\n    if (value == 0) {\n      return 0;\n    }\n    if (value < 0) {\n      value = ~value;\n    }\n    result =  fixnormz_D(value);\n    return result - 1;\n  }\n\n\n#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))\n\n#include \n\n  #define FUNCTION_fixnormz_D\n  #define FUNCTION_fixnorm_D\n\n  inline INT fixnormz_D(LONG value)\n  {\n    unsigned long result = 0;\n    unsigned char err;\n    err = _BitScanReverse(&result, value);\n    if (err) {\n      return 31 - result;\n    } else {\n      return 32;\n    }\n  }\n\n  inline INT fixnorm_D(LONG value)\n  {\n    INT result;\n    if (value == 0) {\n      return 0;\n    }\n    if (value < 0) {\n      value = ~value;\n    }\n    result =  fixnormz_D(value);\n    return result - 1;\n  }\n\n#endif /* toolchain */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libFDK/include/x86/fixmul_x86.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS FDK Tools  **********************\n\n   Author(s):\n   Description: fixed point intrinsics\n\n******************************************************************************/\n\n#if defined(__x86__)\n\n#if defined(_MSC_VER) && defined(_M_IX86)\n/* Intel x86 */\n\n#define FUNCTION_fixmul_DD\n#define FUNCTION_fixmuldiv2_DD\n#define FUNCTION_fixmuldiv2BitExact_DD\n#define fixmuldiv2BitExact_DD(a,b) fixmuldiv2_DD(a,b)\n#define FUNCTION_fixmulBitExact_DD\n#define fixmulBitExact_DD(a,b) fixmul_DD(a,b)\n\n#define FUNCTION_fixmuldiv2BitExact_DS\n#define fixmuldiv2BitExact_DS(a,b) fixmuldiv2_DS(a,b)\n\n#define FUNCTION_fixmulBitExact_DS\n#define fixmulBitExact_DS(a,b) fixmul_DS(a,b)\n\ninline INT fixmul_DD (INT a, const INT b)\n{\n  __asm\n  {\n    mov eax, a\n    imul b\n    shl edx, 1\n    mov a, edx\n  }\n  return a ;\n}\n\n\ninline INT fixmuldiv2_DD (INT a, const INT b)\n{\n  __asm\n  {\n    mov eax, a\n    imul b\n    mov a, edx\n  }\n  return a ;\n}\n\n/* ############################################################################# */\n#elif (defined(__GNUC__)||defined(__gnu_linux__)) && defined(__x86__)\n\n#define FUNCTION_fixmul_DD\n#define FUNCTION_fixmuldiv2_DD\n\n#define FUNCTION_fixmuldiv2BitExact_DD\n#define fixmuldiv2BitExact_DD(a,b) fixmuldiv2_DD(a,b)\n\n#define FUNCTION_fixmulBitExact_DD\n#define fixmulBitExact_DD(a,b) fixmul_DD(a,b)\n\n#define FUNCTION_fixmuldiv2BitExact_DS\n#define fixmuldiv2BitExact_DS(a,b) fixmuldiv2_DS(a,b)\n\n#define FUNCTION_fixmulBitExact_DS\n#define fixmulBitExact_DS(a,b) fixmul_DS(a,b)\n\ninline INT fixmul_DD (INT a, const INT b)\n{\n  INT result;\n\n  asm( \"imul %2;\\n\"\n       \"shl $1, %0;\\n\"\n            : \"=d\"(result), \"+a\"(a)\n            : \"r\"(b) );\n\n  return result;\n}\n\n\ninline INT fixmuldiv2_DD (INT a, const INT b)\n{\n  INT result;\n\n  asm ( \"imul %2;\"\n             : \"=d\"(result), \"+a\"(a)\n             : \"r\"(b) );\n\n  return result;\n}\n\n#endif /* (defined(__GNUC__)||defined(__gnu_linux__)) && defined(__x86__) */\n\n#endif /* __x86__ */\n\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libMpegTPDec/include/mpegFileRead.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/*****************************  MPEG-4 AAC Decoder  **************************\n\n   Author(s):   Manuel Jander\n   Description: Bitstream data provider for MP4 decoders\n\n******************************************************************************/\n\n#include \"machine_type.h\"\n#include \"FDK_audio.h\"\n\n#define MPFREAD_MP4FF_DISABLE\n\n#ifndef MPFREAD_MP4FF_DISABLE\n  /*!< If MPFREAD_MP4FF_ENABLE is set, include support for MPEG ISO fileformat.\n       If not set, no .mp4, .m4a and .3gp files can be used for input. */\n  #define MPFREAD_MP4FF_ENABLE\n#endif\n\n/* maximum number of layers which can be read        */\n/* shall equal max number of layers read by iisisoff */\n#define FILEREAD_MAX_LAYERS (2)\n\ntypedef struct STRUCT_FILEREAD *HANDLE_FILEREAD;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/**\n * \\brief           Open an MPEG audio file and try to detect its format.\n * \\param filename  String of the filename to be opened.\n * \\param fileFormat Skip file format detection and use given format if fileFormat != FF_UNKNOWN.\n                    Else store detected format into *fileFmt.\n * \\param transportType Skip transport type detection and use given format if transportType != TT_UNKNOWN.\n                    Else store detected format into *fileFmt.\n * \\param conf      Pointer to unsigned char to hold the AudioSpecificConfig of the input file, if\n                    any (MPEG 4 file format). In case of RAW LATM it holds the StreamMuxConfig.\n * \\param confSize  Pointer to an integer, where the length of the ASC or SMC (in case of RAW LATM)\n                    is stored to.\n * \\return          MPEG file read handle.\n */\nHANDLE_FILEREAD mpegFileRead_Open( const char     *filename,\n                                   FILE_FORMAT     fileFormat,\n                                   TRANSPORT_TYPE  transportType,\n                                   UCHAR          *conf[],\n                                   UINT            confSize[],\n                                   INT            *noOfLayers\n                                 );\n\n/**\n * \\brief           Get the file format of the input file.\n * \\param hDataSrc  MPEG file read handle.\n * \\return          File format of the input file.\n */\nFILE_FORMAT mpegFileRead_GetFileFormat(HANDLE_FILEREAD hDataSrc);\n\n/**\n * \\brief           Get the transport type of the input file.\n * \\param hDataSrc  MPEG file read handle.\n * \\return          Transport type of the input file.\n */\nTRANSPORT_TYPE mpegFileRead_GetTransportType(HANDLE_FILEREAD hDataSrc);\n\n/**\n * \\brief Read data from MPEG file. In case of packet file, read one packet, in case\n *        of streaming file with embedded synchronisation layer (LOAS/ADTS...), just\n *        fill the buffer.\n *\n * \\param hMpegFile   MPEG file read handle.\n * \\param inBuffer    Pointer to input buffer.\n * \\param bufferSize  Size of input buffer.\n * \\param bytesValid  Number of bytes that were read.\n * \\return            0 on success, -1 if unsupported file format or file read error.\n */\nint mpegFileRead_Read( HANDLE_FILEREAD   hMpegFile,\n                       UCHAR            *inBuffer[],\n                       UINT              bufferSize,\n                       UINT             *bytesValid\n                     );\n\n/**\n * \\brief            Seek in file from origin by given offset in frames.\n * \\param hMpegFile  MPEG file read handle.\n * \\param origin     If 0, the origin is the file beginning (absolute seek).\n *                   If 1, the origin is the current position (relative seek).\n * \\param offset     The amount of frames to seek from the given origin.\n * \\return           0 on sucess, -1 if offset < 0 or file read error.\n */\nint mpegFileRead_seek( HANDLE_FILEREAD   hMpegFile,\n                       INT               origin,\n                       INT               offset\n                      );\n\n/**\n * \\brief            Get file position in percent.\n * \\param hMpegFile  MPEG file read handle.\n * \\return           File position in percent.\n */\nint mpegFileRead_getPercent(HANDLE_FILEREAD hMpegFile);\n\n\n/**\n * \\brief           Close MPEG audio file.\n * \\param hMpegFile Mpeg file read handle.\n * \\return          0 on sucess.\n */\nint mpegFileRead_Close(HANDLE_FILEREAD *hMpegFile);\n\n#ifdef __cplusplus\n}\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libMpegTPDec/include/tp_data.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/*****************************  MPEG-4 AAC Decoder  **************************\n\n   Author(s): Manuel Jander\n   Description: MPEG Transport data tables\n\n******************************************************************************/\n\n#ifndef __TP_DATA_H__\n#define __TP_DATA_H__\n\n#include \"machine_type.h\"\n#include \"FDK_audio.h\"\n#include \"FDK_bitstream.h\"\n\n/*\n * Configuration\n */\n#define TP_GA_ENABLE\n/* #define TP_CELP_ENABLE */\n/* #define TP_HVXC_ENABLE */\n/* #define TP_SLS_ENABLE */\n//#define TP_ELD_ENABLE\n/* #define TP_USAC_ENABLE */\n/* #define TP_RSVD50_ENABLE */\n\n#if defined(TP_GA_ENABLE) || defined(TP_SLS_ENABLE)\n#define TP_PCE_ENABLE       /**< Enable full PCE support */\n#endif\n\n/**\n * ProgramConfig struct.\n */\n/* ISO/IEC 14496-3 4.4.1.1 Table 4.2 Program config element */\n#define PC_FSB_CHANNELS_MAX 16 /* Front/Side/Back channels */\n#define PC_LFE_CHANNELS_MAX 4\n#define PC_ASSOCDATA_MAX    8\n#define PC_CCEL_MAX         16 /* CC elements */\n#define PC_COMMENTLENGTH    256\n\ntypedef struct\n{\n#ifdef TP_PCE_ENABLE\n  /* PCE bitstream elements: */\n  UCHAR ElementInstanceTag;\n  UCHAR Profile;\n  UCHAR SamplingFrequencyIndex;\n  UCHAR NumFrontChannelElements;\n  UCHAR NumSideChannelElements;\n  UCHAR NumBackChannelElements;\n  UCHAR NumLfeChannelElements;\n  UCHAR NumAssocDataElements;\n  UCHAR NumValidCcElements;\n\n  UCHAR MonoMixdownPresent;\n  UCHAR MonoMixdownElementNumber;\n\n  UCHAR StereoMixdownPresent;\n  UCHAR StereoMixdownElementNumber;\n\n  UCHAR MatrixMixdownIndexPresent;\n  UCHAR MatrixMixdownIndex;\n  UCHAR PseudoSurroundEnable;\n\n  UCHAR FrontElementIsCpe[PC_FSB_CHANNELS_MAX];\n  UCHAR FrontElementTagSelect[PC_FSB_CHANNELS_MAX];\n  UCHAR FrontElementHeightInfo[PC_FSB_CHANNELS_MAX];\n\n  UCHAR SideElementIsCpe[PC_FSB_CHANNELS_MAX];\n  UCHAR SideElementTagSelect[PC_FSB_CHANNELS_MAX];\n  UCHAR SideElementHeightInfo[PC_FSB_CHANNELS_MAX];\n\n  UCHAR BackElementIsCpe[PC_FSB_CHANNELS_MAX];\n  UCHAR BackElementTagSelect[PC_FSB_CHANNELS_MAX];\n  UCHAR BackElementHeightInfo[PC_FSB_CHANNELS_MAX];\n\n  UCHAR LfeElementTagSelect[PC_LFE_CHANNELS_MAX];\n\n  UCHAR AssocDataElementTagSelect[PC_ASSOCDATA_MAX];\n\n  UCHAR CcElementIsIndSw[PC_CCEL_MAX];\n  UCHAR ValidCcElementTagSelect[PC_CCEL_MAX];\n\n  UCHAR CommentFieldBytes;\n  UCHAR Comment[PC_COMMENTLENGTH];\n#endif /* TP_PCE_ENABLE */\n\n  /* Helper variables for administration: */\n  UCHAR isValid;               /*!< Flag showing if PCE has been read successfully. */\n  UCHAR NumChannels;           /*!< Amount of audio channels summing all channel elements including LFEs */\n  UCHAR NumEffectiveChannels;  /*!< Amount of audio channels summing only SCEs and CPEs */\n  UCHAR elCounter;\n\n} CProgramConfig;\n\ntypedef enum {\n  ASCEXT_UNKOWN = -1,\n  ASCEXT_SBR    = 0x2b7,\n  ASCEXT_PS     = 0x548,\n  ASCEXT_MPS    = 0x76a,\n  ASCEXT_SAOC   = 0x7cb,\n  ASCEXT_LDMPS  = 0x7cc\n\n} TP_ASC_EXTENSION_ID;\n\n#ifdef TP_GA_ENABLE\n/**\n * GaSpecificConfig struct\n */\ntypedef struct {\n  UINT m_frameLengthFlag ;\n  UINT m_dependsOnCoreCoder ;\n  UINT m_coreCoderDelay ;\n\n  UINT m_extensionFlag ;\n  UINT m_extensionFlag3 ;\n\n  UINT m_layer;\n  UINT m_numOfSubFrame;\n  UINT m_layerLength;\n\n} CSGaSpecificConfig;\n#endif /* TP_GA_ENABLE */\n\n\n\n\n#ifdef TP_ELD_ENABLE\n\ntypedef enum {\n  ELDEXT_TERM  = 0x0,   /* Termination tag */\n  ELDEXT_SAOC  = 0x1,   /* SAOC config */\n  ELDEXT_LDSAC = 0x2    /* LD MPEG Surround config */\n  /* reserved */\n} ASC_ELD_EXT_TYPE;\n\ntypedef struct {\n  UCHAR m_frameLengthFlag;\n\n  UCHAR m_sbrPresentFlag;\n  UCHAR m_useLdQmfTimeAlign;  /* Use LD-MPS QMF in SBR to achive time alignment */\n  UCHAR m_sbrSamplingRate;\n  UCHAR m_sbrCrcFlag;\n\n} CSEldSpecificConfig;\n#endif /* TP_ELD_ENABLE */\n\n\n\n\n/**\n * Audio configuration struct, suitable for encoder and decoder configuration.\n */\ntypedef struct {\n\n  /* XYZ Specific Data */\n  union {\n#ifdef TP_GA_ENABLE\n    CSGaSpecificConfig    m_gaSpecificConfig;       /**< General audio specific configuration.         */\n#endif /* TP_GA_ENABLE */\n#ifdef TP_ELD_ENABLE\n    CSEldSpecificConfig   m_eldSpecificConfig;      /**< ELD specific configuration.                   */\n#endif /* TP_ELD_ENABLE */\n  } m_sc;\n  \n  /* Common ASC parameters */\n#ifdef TP_PCE_ENABLE\n  CProgramConfig        m_progrConfigElement;     /**< Program configuration.                          */\n#endif /* TP_PCE_ENABLE */\n\n  AUDIO_OBJECT_TYPE     m_aot;                    /**< Audio Object Type.                              */\n  UINT                  m_samplingFrequency;      /**< Samplerate.                                     */\n  UINT                  m_samplesPerFrame;        /**< Amount of samples per frame.                    */\n  UINT                  m_directMapping;          /**< Document this please !!                         */\n\n  AUDIO_OBJECT_TYPE     m_extensionAudioObjectType;        /**< Audio object type                      */\n  UINT                  m_extensionSamplingFrequency;      /**< Samplerate                             */  \n\n  SCHAR                 m_channelConfiguration;   /**< Channel configuration index                     */\n\n  SCHAR                 m_epConfig;               /**< Error protection index                           */\n  SCHAR                 m_vcb11Flag;              /**< aacSectionDataResilienceFlag                     */\n  SCHAR                 m_rvlcFlag;               /**< aacScalefactorDataResilienceFlag                 */\n  SCHAR                 m_hcrFlag;                /**< aacSpectralDataResilienceFlag                    */\n\n  SCHAR                 m_sbrPresentFlag;         /**< Flag indicating the presence of SBR data in the bitstream               */\n  SCHAR                 m_psPresentFlag;          /**< Flag indicating the presence of parametric stereo data in the bitstream */\n  UCHAR                 m_samplingFrequencyIndex; /**< Samplerate index                                 */\n  UCHAR                 m_extensionSamplingFrequencyIndex; /**< Samplerate index                        */\n  SCHAR                 m_extensionChannelConfiguration;   /**< Channel configuration index             */\n\n} CSAudioSpecificConfig;\n\ntypedef INT (*cbUpdateConfig_t)(void*, const CSAudioSpecificConfig*);\ntypedef INT (*cbSsc_t)(\n        void*, HANDLE_FDK_BITSTREAM,\n        const AUDIO_OBJECT_TYPE coreCodec,\n        const INT samplingFrequency,\n        const INT muxMode,\n        const INT configBytes\n        );\ntypedef INT (*cbSbr_t)(\n        void *                  self,\n        HANDLE_FDK_BITSTREAM    hBs,\n        const INT sampleRateIn,\n        const INT sampleRateOut,\n        const INT samplesPerFrame,\n        const AUDIO_OBJECT_TYPE coreCodec,\n        const MP4_ELEMENT_ID    elementID,\n        const INT               elementIndex\n        );\n\ntypedef struct  {\n  cbUpdateConfig_t cbUpdateConfig; /*!< Function pointer for Config change notify callback.  */\n  void *cbUpdateConfigData;        /*!< User data pointer for Config change notify callback. */\n  cbSsc_t cbSsc;                   /*!< Function pointer for SSC parser callback. */\n  void *cbSscData;                 /*!< User data pointer for SSC parser callback. */\n  cbSbr_t cbSbr;                   /*!< Function pointer for SBR header parser callback. */\n  void *cbSbrData;                 /*!< User data pointer for SBR header parser callback. */\n} CSTpCallBacks;\n\nstatic const UINT SamplingRateTable[] = \n{ 96000, 88200, 64000, 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000, 7350, 0, 0,\n  0\n};\n\nstatic inline\nint getSamplingRateIndex( UINT samplingRate )\n{\n  UINT sf_index, tableSize=sizeof(SamplingRateTable)/sizeof(UINT);\n\n  for (sf_index=0; sf_indextableSize-1) {\n    return tableSize-1;\n  }\n\n  return sf_index;\n}\n\n/*\n * Get Channel count from channel configuration\n */\nstatic inline int getNumberOfTotalChannels(int channelConfig)\n{\n  switch (channelConfig) {\n  case 1: case 2: case 3:\n  case 4: case 5: case 6:\n    return channelConfig;\n  case 7: case 12: case 14:\n    return 8;\n  case 11:\n    return 7;\n  default:\n    return 0;\n  }\n}\n\nstatic inline\nint getNumberOfEffectiveChannels(const int channelConfig)\n{        /* index: 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 */\n  const int n[] = {0,1,2,3,4,5,5,7,0,0, 0, 6, 7, 0, 7, 0};\n  return n[channelConfig];\n}\n\n#endif /* __TP_DATA_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libMpegTPDec/include/tpdec_lib.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/**************************  MPEG-4 Transport Decoder  ***********************\n\n   Author(s): Manuel Jander\n   Description: MPEG Transport decoder\n\n******************************************************************************/\n\n#ifndef __TPDEC_LIB_H__\n#define __TPDEC_LIB_H__\n\n#include \"tp_data.h\"\n\n#include \"FDK_bitstream.h\"\n\n#define TRANSPORTDEC_INBUF_SIZE  ( 8192 )   /*!< Size is in bytes.\n                                                 Set the transport input buffer size carefully and\n                                                 assure that it fulfills the requirements of the\n                                                 supported transport format(s).                    */\n\ntypedef enum {\n  TRANSPORTDEC_OK = 0,             /*!< All fine.                                                  */\n\n  /* Synchronization errors. Wait for new input data and try again. */\n  tpdec_sync_error_start   = 0x100,\n  TRANSPORTDEC_NOT_ENOUGH_BITS,    /*!< Out of bits. Provide more bits and try again.              */\n  TRANSPORTDEC_SYNC_ERROR,         /*!< No sync was found or sync got lost. Keep trying.           */\n  tpdec_sync_error_end,\n\n  /* Decode errors. Mostly caused due to bit errors. */\n  tpdec_decode_error_start = 0x400,\n  TRANSPORTDEC_PARSE_ERROR,        /*!< Bitstream data showed inconsistencies (wrong syntax).      */\n  TRANSPORTDEC_UNSUPPORTED_FORMAT, /*!< Unsupported format or feature found in the bitstream data. */\n  TRANSPORTDEC_CRC_ERROR,          /*!< CRC error encountered in bitstream data.                   */\n  tpdec_decode_error_end,\n\n  /* Fatal errors. Stop immediately on one of these errors! */\n  tpdec_fatal_error_start  = 0x200,\n  TRANSPORTDEC_UNKOWN_ERROR,       /*!< An unknown error occured.                                  */\n  TRANSPORTDEC_INVALID_PARAMETER,  /*!< An invalid parameter was passed to a function.             */\n  TRANSPORTDEC_NEED_TO_RESTART,    /*!< The decoder needs to be restarted, since the requiered\n                                        configuration change cannot be performed.                  */\n  tpdec_fatal_error_end\n\n} TRANSPORTDEC_ERROR;\n\n\n/** Macro to identify decode errors. */\n#define TPDEC_IS_DECODE_ERROR(err) ( ((err>=tpdec_decode_error_start) && (err<=tpdec_decode_error_end)) ? 1 : 0)\n/** Macro to identify fatal errors. */\n#define TPDEC_IS_FATAL_ERROR(err)  ( ((err>=tpdec_fatal_error_start)  && (err<=tpdec_fatal_error_end))  ? 1 : 0)\n\n\n/**\n * \\brief Parameter identifiers for transportDec_SetParam()\n */\ntypedef enum {\n  TPDEC_PARAM_MINIMIZE_DELAY = 1,        /** Delay minimization strategy. 0: none, 1: discard as many frames as possible. */\n  TPDEC_PARAM_EARLY_CONFIG,              /** Enable early config discovery. */\n  TPDEC_PARAM_IGNORE_BUFFERFULLNESS,     /** Ignore buffer fullness. */\n  TPDEC_PARAM_SET_BITRATE,               /** Set average bit rate for bit stream interruption frame misses estimation. */\n  TPDEC_PARAM_RESET,                     /** Reset transport decoder instance status. */\n  TPDEC_PARAM_BURST_PERIOD               /** Set data reception burst period in mili seconds. */\n} TPDEC_PARAM;\n\n/* ISO/IEC 14496-3 4.4.1.1 Table 4.2 Program config element */\n#define PC_FSB_CHANNELS_MAX 16 /* Front/Side/Back channels */\n#define PC_LFE_CHANNELS_MAX 4\n#define PC_ASSOCDATA_MAX    8\n#define PC_CCEL_MAX         16 /* CC elements */\n#define PC_COMMENTLENGTH    256\n#define PC_NUM_HEIGHT_LAYER 3\n\n\n/*!\n  \\brief               Reset Program Config Element.\n  \\param pPce          Program Config Element structure.\n  \\return              void\n*/\nvoid  CProgramConfig_Reset ( CProgramConfig *pPce );\n\n/*!\n  \\brief               Initialize Program Config Element.\n  \\param pPce          Program Config Element structure.\n  \\return              void\n*/\nvoid  CProgramConfig_Init ( CProgramConfig *pPce );\n\n/*!\n  \\brief               Inquire state of present Program Config Element structure.\n  \\param pPce          Program Config Element structure.\n  \\return              1 if the PCE structure is filled correct,\n                       0 if no valid PCE present.\n*/\nint  CProgramConfig_IsValid ( const CProgramConfig *pPce );\n\n#ifdef TP_PCE_ENABLE\n/*!\n  \\brief               Read Program Config Element.\n  \\param pPce          Program Config Element structure.\n  \\param bs            Bitstream buffer to read from.\n  \\param alignAnchor   Align bitstream to alignAnchor bits after all read operations.\n  \\return              void\n*/\nvoid  CProgramConfig_Read ( CProgramConfig       *pPce,\n                            HANDLE_FDK_BITSTREAM  bs,\n                            UINT                  alignAnchor );\n\n/*!\n  \\brief               Compare two Program Config Elements.\n  \\param pPce1         Pointer to first Program Config Element structure.\n  \\param pPce2         Pointer to second Program Config Element structure.\n  \\return              -1 if PCEs are completely different,\n                        0 if PCEs are completely equal,\n                        1 if PCEs are different but have the same channel config,\n                        2 if PCEs have different channel config but same number of channels.\n*/\nint CProgramConfig_Compare ( const CProgramConfig * const pPce1,\n                             const CProgramConfig * const pPce2 );\n\n/*!\n  \\brief               Get a Program Config Element that matches the predefined MPEG-4 channel configurations 1-14.\n  \\param pPce          Program Config Element structure.\n  \\param channelConfig MPEG-4 channel configuration.\n  \\return              void\n*/\nvoid CProgramConfig_GetDefault ( CProgramConfig *pPce,\n                                 const UINT channelConfig );\n#endif /* TP_PCE_ENABLE */\n\n/**\n * \\brief Lookup and verify a given element. The decoder calls this\n *        method with every new element ID found in the bitstream.\n *\n * \\param pPce        A valid Program config structure.\n * \\param tag         Tag of the current element to be looked up.\n * \\param channelIdx  The current channel count of the decoder parser.\n * \\param chMapping   Array to store the canonical channel mapping indexes.\n * \\param chType      Array to store the audio channel type.\n * \\param chIndex     Array to store the individual audio channel type index.\n * \\param elMapping   Pointer where the canonical element index is stored.\n * \\param elType      The element id of the current element to be looked up.\n *\n * \\return            Non-zero if the element belongs to the current program, zero\n *                    if it does not.\n */\nint CProgramConfig_LookupElement(\n        CProgramConfig *pPce,\n        UINT            channelConfig,\n        const UINT      tag,\n        const UINT      channelIdx,\n        UCHAR           chMapping[],\n        AUDIO_CHANNEL_TYPE chType[],\n        UCHAR           chIndex[],\n        UCHAR          *elMapping,\n        MP4_ELEMENT_ID  elList[],\n        MP4_ELEMENT_ID  elType\n        );\n\n/**\n * \\brief             Get table of elements in canonical order from a\n *                    give program config field.\n * \\param pPce        A valid program config structure.\n * \\param table       An array where the element IDs are stored.\n * \\param elListSize  The length of the table array.\n * \\param pChMapIdx   Pointer to a field receiving the corresponding\n *                    implicit channel configuration index of the given\n *                    PCE. If none can be found it receives the value 0.\n * \\return            Total element count including all SCE, CPE and LFE.\n */\nint CProgramConfig_GetElementTable( const CProgramConfig *pPce,\n                                    MP4_ELEMENT_ID  table[],\n                                    const INT elListSize,\n                                    UCHAR *pChMapIdx );\n\n/**\n * \\brief       Initialize a given AudioSpecificConfig structure.\n * \\param pAsc  A pointer to an allocated CSAudioSpecificConfig struct.\n * \\return      void\n */\nvoid AudioSpecificConfig_Init(CSAudioSpecificConfig *pAsc);\n\n/**\n * \\brief   Parse a AudioSpecificConfig from a given bitstream handle.\n *\n * \\param pAsc                         A pointer to an allocated CSAudioSpecificConfig struct.\n * \\param hBs                          Bitstream handle.\n * \\param fExplicitBackwardCompatible  Do explicit backward compatibility parsing if set (flag).\n * \\param cb pointer to structure holding callback information\n *\n * \\return  Total element count including all SCE, CPE and LFE.\n */\nTRANSPORTDEC_ERROR AudioSpecificConfig_Parse(\n        CSAudioSpecificConfig *pAsc,\n        HANDLE_FDK_BITSTREAM hBs,\n        int fExplicitBackwardCompatible,\n        CSTpCallBacks *cb\n        );\n\n/* CELP stuff */\nenum {\n  MPE     = 0,\n  RPE     = 1,\n  fs8KHz  = 0,\n  fs16KHz = 1\n};\n\n/* Defintion of flags that can be passed to transportDecOpen() */\n#define TP_FLAG_MPEG4 1\n\n/* Capability flags */\n#define CAPF_TPDEC_ADIF        0x00001000  /**< Flag indicating support for ADIF transport format.        */\n#define CAPF_TPDEC_ADTS        0x00002000  /**< Flag indicating support for ADTS transport format.        */\n#define CAPF_TPDEC_LOAS        0x00004000  /**< Flag indicating support for LOAS transport format.        */\n#define CAPF_TPDEC_LATM        0x00008000  /**< Flag indicating support for LATM transport format.        */\n#define CAPF_TPDEC_RAWPACKETS  0x00010000  /**< Flag indicating support for raw packets transport format. */\n\ntypedef struct TRANSPORTDEC *HANDLE_TRANSPORTDEC;\n\n\n/**\n * \\brief Configure Transport Decoder via a binary coded AudioSpecificConfig or StreamMuxConfig.\n *        The previously requested configuration callback will be called as well. The buffer conf\n *        must containt a SMC in case of LOAS/LATM transport format, and an ASC elseways.\n *\n * \\param hTp     Handle of a transport decoder.\n * \\param conf    UCHAR buffer of the binary coded config (ASC or SMC).\n * \\param length  The length in bytes of the conf buffer.\n *\n * \\return        Error code.\n */\nTRANSPORTDEC_ERROR transportDec_OutOfBandConfig( const HANDLE_TRANSPORTDEC hTp,\n                                                 UCHAR              *conf,\n                                                 const UINT          length,\n                                                 const UINT          layer );\n\n/**\n * \\brief Open Transport medium for reading.\n *\n * \\param transportDecFmt Format of the transport decoder medium to be accessed.\n * \\param flags           Transport decoder flags. Currently only TP_FLAG_MPEG4, which signals a\n *                        MPEG4 capable decoder (relevant for ADTS only).\n *\n * \\return   A pointer to a valid and allocated HANDLE_TRANSPORTDEC or a null pointer on failure.\n */\nHANDLE_TRANSPORTDEC transportDec_Open( TRANSPORT_TYPE transportDecFmt,\n                                       const UINT flags );\n\n/**\n * \\brief                Register configuration change callback.\n * \\param hTp            Handle of transport decoder.\n * \\param cbUpdateConfig Pointer to a callback function to handle audio config changes.\n * \\param user_data      void pointer for user data passed to the callback as first parameter.\n * \\return               0 on success.\n */\nint transportDec_RegisterAscCallback (\n        HANDLE_TRANSPORTDEC hTp,\n        const cbUpdateConfig_t cbUpdateConfig,\n        void* user_data );\n\n/**\n * \\brief                Register SSC parser callback.\n * \\param hTp            Handle of transport decoder.\n * \\param cbUpdateConfig Pointer to a callback function to handle SSC parsing.\n * \\param user_data      void pointer for user data passed to the callback as first parameter.\n * \\return               0 on success.\n */\nint transportDec_RegisterSscCallback (\n        HANDLE_TRANSPORTDEC hTp,\n        const cbSsc_t cbSscParse,\n        void* user_data );\n\n/**\n * \\brief                Register SBR header parser callback.\n * \\param hTp            Handle of transport decoder.\n * \\param cbUpdateConfig Pointer to a callback function to handle SBR header parsing.\n * \\param user_data      void pointer for user data passed to the callback as first parameter.\n * \\return               0 on success. \n */\nint transportDec_RegisterSbrCallback( HANDLE_TRANSPORTDEC hTpDec, const cbSbr_t cbSbr, void* user_data);\n\n/**\n * \\brief Fill internal input buffer with bitstream data from the external input buffer.\n *  The function only copies such data as long as the decoder-internal input buffer is not full.\n *  So it grabs whatever it can from pBuffer and returns information (bytesValid) so that at a\n *  subsequent call of %transportDec_FillData(), the right position in pBuffer can be determined to\n *  grab the next data.\n *\n * \\param hTp         Handle of transportDec.\n * \\param pBuffer     Pointer to external input buffer.\n * \\param bufferSize  Size of external input buffer. This argument is required because decoder-internally\n *                    we need the information to calculate the offset to pBuffer, where the next\n *                    available data is, which is then fed into the decoder-internal buffer (as much\n *                    as possible). Our example framework implementation fills the buffer at pBuffer\n *                    again, once it contains no available valid bytes anymore (meaning bytesValid equal 0).\n * \\param bytesValid  Number of bitstream bytes in the external bitstream buffer that have not yet been\n *                    copied into the decoder's internal bitstream buffer by calling this function.\n *                    The value is updated according to the amount of newly copied bytes.\n * \\param layer       The layer the bitstream belongs to.\n * \\return            Error code.\n */\nTRANSPORTDEC_ERROR transportDec_FillData(\n        const HANDLE_TRANSPORTDEC  hTp,\n        UCHAR                     *pBuffer,\n        const UINT                 bufferSize,\n        UINT                      *pBytesValid,\n        const INT                  layer );\n\n/**\n * \\brief      Get transportDec bitstream handle.\n * \\param hTp  Pointer to a transport decoder handle.\n * \\return     HANDLE_FDK_BITSTREAM bitstream handle.\n */\nHANDLE_FDK_BITSTREAM transportDec_GetBitstream ( const HANDLE_TRANSPORTDEC hTp, const UINT layer );\n\n/**\n * \\brief      Get transport format.\n * \\param hTp  Pointer to a transport decoder handle.\n * \\return     The transport format.\n */\nTRANSPORT_TYPE transportDec_GetFormat ( const HANDLE_TRANSPORTDEC hTp );\n\n/**\n * \\brief Get the current buffer fullness value.\n *\n * \\param hTp     Handle of a transport decoder.\n *\n * \\return        Buffer fullness\n */\nINT transportDec_GetBufferFullness( const HANDLE_TRANSPORTDEC hTp );\n\n/**\n * \\brief       Close and deallocate transportDec.\n * \\param phTp  Pointer to a previously allocated transport decoder handle.\n * \\return      void\n */\nvoid transportDec_Close ( HANDLE_TRANSPORTDEC *phTp );\n\n/**\n * \\brief         Read one access unit from the transportDec medium.\n * \\param hTp     Handle of transportDec.\n * \\param length  On return, this value is overwritten with the actual access unit length in bits.\n *                Set to -1 if length is unknown.\n * \\return        Error code.\n */\nTRANSPORTDEC_ERROR transportDec_ReadAccessUnit ( const HANDLE_TRANSPORTDEC hTp, const UINT layer );\n\n/**\n * \\brief Get the remaining amount of bits of the current access unit. The result\n *        can be below zero, meaning that too many bits have been read.\n * \\param hTp     Handle of transportDec.\n * \\return amount of remaining bits.\n */\nINT transportDec_GetAuBitsRemaining( const HANDLE_TRANSPORTDEC hTp, const UINT layer );\n\n/**\n * \\brief Get the total amount of bits of the current access unit.\n * \\param hTp     Handle of transportDec.\n * \\return amount of total bits.\n */\nINT transportDec_GetAuBitsTotal( const HANDLE_TRANSPORTDEC hTp, const UINT layer );\n\n/**\n * \\brief      This function is required to be called when the decoder has finished parsing\n *             one Access Unit for bitstream housekeeping.\n * \\param hTp  Transport Handle.\n * \\return     Error code.\n */\nTRANSPORTDEC_ERROR transportDec_EndAccessUnit ( const HANDLE_TRANSPORTDEC hTp );\n\n/**\n * \\brief      Obtain the amount of missing access units if applicable in case of \n *             a bit stream synchronization error. Each time transportDec_ReadAccessUnit()\n *             returns TRANSPORTDEC_SYNC_ERROR this function can be called to retrieve an estimate\n *             of the amount of missing access units. This works only in case of constant average\n *             bit rate (has to be known) and if the parameter TPDEC_PARAM_SET_BITRATE has been set\n *             accordingly.\n * \\param hTp  Transport Handle.\n * \\param pNAccessUnits pointer to a memory location where the estimated lost frame count will be stored into.      \n * \\return     Error code.\n */\nTRANSPORTDEC_ERROR transportDec_GetMissingAccessUnitCount ( INT *pNAccessUnits, HANDLE_TRANSPORTDEC hTp );\n\n\n/**\n * \\brief        Set a given setting.\n * \\param hTp    Transport Handle.\n * \\param param  Identifier of the parameter to be changed.\n * \\param value  Value for the parameter to be changed.\n * \\return       Error code.\n */\nTRANSPORTDEC_ERROR transportDec_SetParam ( const HANDLE_TRANSPORTDEC hTp,\n                                           const TPDEC_PARAM         param,\n                                           const INT                 value );\n\n/**\n * \\brief        Get number of subframes (for LATM or ADTS)\n * \\param hTp    Transport Handle.\n * \\return       Number of ADTS/LATM subframes (return 1 for all other transport types).\n */\nUINT transportDec_GetNrOfSubFrames(HANDLE_TRANSPORTDEC hTp);\n\n\n/**\n * \\brief       Get info structure of transport decoder library.\n * \\param info  A pointer to an allocated LIB_INFO struct.\n * \\return      Error code.\n */\nTRANSPORTDEC_ERROR transportDec_GetLibInfo( LIB_INFO *info );\n\n/* ADTS CRC support */\n\n/**\n * \\brief        Set current bitstream position as start of a new data region.\n * \\param hTp    Transport handle.\n * \\param mBits  Size in bits of the data region. Set to 0 if it should not be of a fixed size.\n * \\return       Data region ID, which should be used when calling transportDec_CrcEndReg().\n */\nint transportDec_CrcStartReg ( const HANDLE_TRANSPORTDEC hTp,\n                               const INT mBits );\n\n/**\n * \\brief        Set end of data region.\n * \\param hTp    Transport handle.\n * \\param reg    Data region ID, opbtained from transportDec_CrcStartReg().\n * \\return       void\n */\nvoid transportDec_CrcEndReg ( const HANDLE_TRANSPORTDEC hTp,\n                              const INT reg );\n\n/**\n * \\brief      Calculate ADTS crc and check if it is correct. The ADTS checksum is held internally.\n * \\param hTp  Transport handle.\n * \\return     Return TRANSPORTDEC_OK if the CRC is ok, or error if CRC is not correct.\n */\nTRANSPORTDEC_ERROR transportDec_CrcCheck ( const HANDLE_TRANSPORTDEC hTp );\n\n\n#endif /* #ifndef __TPDEC_LIB_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libMpegTPEnc/include/mpegFileWrite.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/*****************************  MPEG-4 AAC Decoder  **************************\n\n   Author(s):   Manuel Jander\n   Description: Bitstream data provider for MP4 decoders\n\n******************************************************************************/\n\n#include \"machine_type.h\"\n#include \"FDK_audio.h\"\n\n/*!< If MPFWRITE_MP4FF_ENABLE is set, include support for MPEG ISO fileformat.\n     If not set, no .mp4, .m4a and .3gp files can be used for input.  */\n/* #define MPFWRITE_MP4FF_ENABLE */\n\ntypedef struct STRUCT_FILEWRITE *HANDLE_FILEWRITE;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/**\n * \\brief                         Open an MPEG audio file.\n * \\param mpegFileWrite_Filename  String of the filename to be opened.\n * \\param fileFmt                 Transport format to use.\n * \\param conf\n * \\param confSize\n * \\return                        MPEG file write handle.\n */\nHANDLE_FILEWRITE mpegFileWrite_Open( char           *mpegFileWrite_Filename,\n                                     FILE_FORMAT     fileFmt,\n                                     TRANSPORT_TYPE  transportType,\n                                     UCHAR          *conf,\n                                     UINT            confSize\n                                   );\n\n/**\n * \\brief             Write to an MPEG audio file.\n * \\param inBuffer    Buffer to write.\n * \\param bufferSize  Size of buffer to write in bytes.\n * \\return            0 on sucess, -1 on unsupported file format or write error.\n */\nint mpegFileWrite_Write( HANDLE_FILEWRITE  hFileWrite,\n                         UCHAR            *inBuffer,\n                         int              bufferSize\n                       );\n\n/**\n * \\brief             Deallocate memory and close file.\n * \\param hFileWrite  MPEG file write handle.\n * \\return            0 on sucess.\n */\nint mpegFileWrite_Close( HANDLE_FILEWRITE *hFileWrite );\n\n\n#ifdef __cplusplus\n}\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libMpegTPEnc/include/tp_data.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/*****************************  MPEG-4 AAC Decoder  **************************\n\n   Author(s): Manuel Jander\n   Description: MPEG Transport data tables\n\n******************************************************************************/\n\n#ifndef __TP_DATA_H__\n#define __TP_DATA_H__\n\n#include \"machine_type.h\"\n#include \"FDK_audio.h\"\n#include \"FDK_bitstream.h\"\n\n/*\n * Configuration\n */\n#define TP_GA_ENABLE\n/* #define TP_CELP_ENABLE */\n/* #define TP_HVXC_ENABLE */\n/* #define TP_SLS_ENABLE */\n#define TP_ELD_ENABLE\n/* #define TP_USAC_ENABLE */\n/* #define TP_RSVD50_ENABLE */\n\n#if defined(TP_GA_ENABLE) || defined(TP_SLS_ENABLE)\n#define TP_PCE_ENABLE       /**< Enable full PCE support */\n#endif\n\n/**\n * ProgramConfig struct.\n */\n/* ISO/IEC 14496-3 4.4.1.1 Table 4.2 Program config element */\n#define PC_FSB_CHANNELS_MAX 16 /* Front/Side/Back channels */\n#define PC_LFE_CHANNELS_MAX 4\n#define PC_ASSOCDATA_MAX    8\n#define PC_CCEL_MAX         16 /* CC elements */\n#define PC_COMMENTLENGTH    256\n\ntypedef struct\n{\n#ifdef TP_PCE_ENABLE\n  /* PCE bitstream elements: */\n  UCHAR ElementInstanceTag;\n  UCHAR Profile;\n  UCHAR SamplingFrequencyIndex;\n  UCHAR NumFrontChannelElements;\n  UCHAR NumSideChannelElements;\n  UCHAR NumBackChannelElements;\n  UCHAR NumLfeChannelElements;\n  UCHAR NumAssocDataElements;\n  UCHAR NumValidCcElements;\n\n  UCHAR MonoMixdownPresent;\n  UCHAR MonoMixdownElementNumber;\n\n  UCHAR StereoMixdownPresent;\n  UCHAR StereoMixdownElementNumber;\n\n  UCHAR MatrixMixdownIndexPresent;\n  UCHAR MatrixMixdownIndex;\n  UCHAR PseudoSurroundEnable;\n\n  UCHAR FrontElementIsCpe[PC_FSB_CHANNELS_MAX];\n  UCHAR FrontElementTagSelect[PC_FSB_CHANNELS_MAX];\n  UCHAR FrontElementHeightInfo[PC_FSB_CHANNELS_MAX];\n\n  UCHAR SideElementIsCpe[PC_FSB_CHANNELS_MAX];\n  UCHAR SideElementTagSelect[PC_FSB_CHANNELS_MAX];\n  UCHAR SideElementHeightInfo[PC_FSB_CHANNELS_MAX];\n\n  UCHAR BackElementIsCpe[PC_FSB_CHANNELS_MAX];\n  UCHAR BackElementTagSelect[PC_FSB_CHANNELS_MAX];\n  UCHAR BackElementHeightInfo[PC_FSB_CHANNELS_MAX];\n\n  UCHAR LfeElementTagSelect[PC_LFE_CHANNELS_MAX];\n\n  UCHAR AssocDataElementTagSelect[PC_ASSOCDATA_MAX];\n\n  UCHAR CcElementIsIndSw[PC_CCEL_MAX];\n  UCHAR ValidCcElementTagSelect[PC_CCEL_MAX];\n\n  UCHAR CommentFieldBytes;\n  UCHAR Comment[PC_COMMENTLENGTH];\n#endif /* TP_PCE_ENABLE */\n\n  /* Helper variables for administration: */\n  UCHAR isValid;               /*!< Flag showing if PCE has been read successfully. */\n  UCHAR NumChannels;           /*!< Amount of audio channels summing all channel elements including LFEs */\n  UCHAR NumEffectiveChannels;  /*!< Amount of audio channels summing only SCEs and CPEs */\n  UCHAR elCounter;\n\n} CProgramConfig;\n\ntypedef enum {\n  ASCEXT_UNKOWN = -1,\n  ASCEXT_SBR    = 0x2b7,\n  ASCEXT_PS     = 0x548,\n  ASCEXT_MPS    = 0x76a,\n  ASCEXT_SAOC   = 0x7cb,\n  ASCEXT_LDMPS  = 0x7cc\n\n} TP_ASC_EXTENSION_ID;\n\n#ifdef TP_GA_ENABLE\n/**\n * GaSpecificConfig struct\n */\ntypedef struct {\n  UINT m_frameLengthFlag ;\n  UINT m_dependsOnCoreCoder ;\n  UINT m_coreCoderDelay ;\n\n  UINT m_extensionFlag ;\n  UINT m_extensionFlag3 ;\n\n  UINT m_layer;\n  UINT m_numOfSubFrame;\n  UINT m_layerLength;\n\n} CSGaSpecificConfig;\n#endif /* TP_GA_ENABLE */\n\n\n\n\n#ifdef TP_ELD_ENABLE\n\ntypedef enum {\n  ELDEXT_TERM  = 0x0,   /* Termination tag */\n  ELDEXT_SAOC  = 0x1,   /* SAOC config */\n  ELDEXT_LDSAC = 0x2    /* LD MPEG Surround config */\n  /* reserved */\n} ASC_ELD_EXT_TYPE;\n\ntypedef struct {\n  UCHAR m_frameLengthFlag;\n\n  UCHAR m_sbrPresentFlag;\n  UCHAR m_useLdQmfTimeAlign;  /* Use LD-MPS QMF in SBR to achive time alignment */\n  UCHAR m_sbrSamplingRate;\n  UCHAR m_sbrCrcFlag;\n\n} CSEldSpecificConfig;\n#endif /* TP_ELD_ENABLE */\n\n\n\n\n/**\n * Audio configuration struct, suitable for encoder and decoder configuration.\n */\ntypedef struct {\n\n  /* XYZ Specific Data */\n  union {\n#ifdef TP_GA_ENABLE\n    CSGaSpecificConfig    m_gaSpecificConfig;       /**< General audio specific configuration.         */\n#endif /* TP_GA_ENABLE */\n#ifdef TP_ELD_ENABLE\n    CSEldSpecificConfig   m_eldSpecificConfig;      /**< ELD specific configuration.                   */\n#endif /* TP_ELD_ENABLE */\n  } m_sc;\n  \n  /* Common ASC parameters */\n#ifdef TP_PCE_ENABLE\n  CProgramConfig        m_progrConfigElement;     /**< Program configuration.                          */\n#endif /* TP_PCE_ENABLE */\n\n  AUDIO_OBJECT_TYPE     m_aot;                    /**< Audio Object Type.                              */\n  UINT                  m_samplingFrequency;      /**< Samplerate.                                     */\n  UINT                  m_samplesPerFrame;        /**< Amount of samples per frame.                    */\n  UINT                  m_directMapping;          /**< Document this please !!                         */\n\n  AUDIO_OBJECT_TYPE     m_extensionAudioObjectType;        /**< Audio object type                      */\n  UINT                  m_extensionSamplingFrequency;      /**< Samplerate                             */  \n\n  SCHAR                 m_channelConfiguration;   /**< Channel configuration index                     */\n\n  SCHAR                 m_epConfig;               /**< Error protection index                           */\n  SCHAR                 m_vcb11Flag;              /**< aacSectionDataResilienceFlag                     */\n  SCHAR                 m_rvlcFlag;               /**< aacScalefactorDataResilienceFlag                 */\n  SCHAR                 m_hcrFlag;                /**< aacSpectralDataResilienceFlag                    */\n\n  SCHAR                 m_sbrPresentFlag;         /**< Flag indicating the presence of SBR data in the bitstream               */\n  SCHAR                 m_psPresentFlag;          /**< Flag indicating the presence of parametric stereo data in the bitstream */\n  UCHAR                 m_samplingFrequencyIndex; /**< Samplerate index                                 */\n  UCHAR                 m_extensionSamplingFrequencyIndex; /**< Samplerate index                        */\n  SCHAR                 m_extensionChannelConfiguration;   /**< Channel configuration index             */\n\n} CSAudioSpecificConfig;\n\ntypedef INT (*cbUpdateConfig_t)(void*, const CSAudioSpecificConfig*);\ntypedef INT (*cbSsc_t)(\n        void*, HANDLE_FDK_BITSTREAM,\n        const AUDIO_OBJECT_TYPE coreCodec,\n        const INT samplingFrequency,\n        const INT muxMode,\n        const INT configBytes\n        );\ntypedef INT (*cbSbr_t)(\n        void *                  self,\n        HANDLE_FDK_BITSTREAM    hBs,\n        const INT sampleRateIn,\n        const INT sampleRateOut,\n        const INT samplesPerFrame,\n        const AUDIO_OBJECT_TYPE coreCodec,\n        const MP4_ELEMENT_ID    elementID,\n        const INT               elementIndex\n        );\n\ntypedef struct  {\n  cbUpdateConfig_t cbUpdateConfig; /*!< Function pointer for Config change notify callback.  */\n  void *cbUpdateConfigData;        /*!< User data pointer for Config change notify callback. */\n  cbSsc_t cbSsc;                   /*!< Function pointer for SSC parser callback. */\n  void *cbSscData;                 /*!< User data pointer for SSC parser callback. */\n  cbSbr_t cbSbr;                   /*!< Function pointer for SBR header parser callback. */\n  void *cbSbrData;                 /*!< User data pointer for SBR header parser callback. */\n} CSTpCallBacks;\n\nstatic const UINT SamplingRateTable[] = \n{ 96000, 88200, 64000, 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000, 7350, 0, 0,\n  0\n};\n\nstatic inline\nint getSamplingRateIndex( UINT samplingRate )\n{\n  UINT sf_index, tableSize=sizeof(SamplingRateTable)/sizeof(UINT);\n\n  for (sf_index=0; sf_indextableSize-1) {\n    return tableSize-1;\n  }\n\n  return sf_index;\n}\n\n/*\n * Get Channel count from channel configuration\n */\nstatic inline int getNumberOfTotalChannels(int channelConfig)\n{\n  switch (channelConfig) {\n  case 1: case 2: case 3:\n  case 4: case 5: case 6:\n    return channelConfig;\n  case 7: case 12: case 14:\n    return 8;\n  case 11:\n    return 7;\n  default:\n    return 0;\n  }\n}\n\nstatic inline\nint getNumberOfEffectiveChannels(const int channelConfig)\n{        /* index: 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 */\n  const int n[] = {0,1,2,3,4,5,5,7,0,0, 0, 6, 7, 0, 7, 0};\n  return n[channelConfig];\n}\n\n#endif /* __TP_DATA_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libMpegTPEnc/include/tpenc_lib.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/**************************  MPEG-4 Transport Encoder  ************************\n\n   Author(s): Manuel Jander\n   Description: MPEG Transport encode\n\n******************************************************************************/\n\n#ifndef __TPENC_LIB_H__\n#define __TPENC_LIB_H__\n\n#include \"tp_data.h\"\n#include \"FDK_bitstream.h\"\n\n#define TRANSPORTENC_INBUF_SIZE 8192\n\ntypedef enum {\n  TRANSPORTENC_OK = 0,                            /*!< All fine.                                                */\n  TRANSPORTENC_NO_MEM,                            /*!< Out of memory.                                           */\n  TRANSPORTENC_UNKOWN_ERROR = 1,                  /*!< Unknown error (embarrasing).                             */\n  TRANSPORTENC_INVALID_PARAMETER,                 /*!< An invalid parameter was passed to a function .          */\n  TRANSPORTENC_PARSE_ERROR,                       /*!< Bitstream data contained inconsistencies (wrong syntax). */\n  TRANSPORTENC_UNSUPPORTED_FORMAT,                /*!< Unsupported transport format.                            */\n  TRANSPORTENC_NOT_ENOUGH_BITS,                   /*!< Out of bits. Provide more bits and try again.            */\n\n  TRANSPORTENC_INVALID_CONFIG,                    /*!< Error in configuration.                                  */\n  TRANSPORTENC_LATM_INVALID_NR_OF_SUBFRAMES,      /*!< LATM: number of subframes out of range.                  */\n  TRANSPORTENC_LOAS_NOT_AVAILABLE,                /*!< LOAS format not supported.                               */\n  TRANSPORTENC_INVALID_LATM_ALIGNMENT,            /*!< AudioMuxElement length not aligned to 1 byte.            */\n\n  TRANSPORTENC_INVALID_TRANSMISSION_FRAME_LENGTH, /*!< Invalid transmission frame length (< 0).                 */\n  TRANSPORTENC_INVALID_CELP_FRAME_LENGTH,         /*!< Invalid CELP frame length found (>= 62).                 */\n  TRANSPORTENC_INVALID_FRAME_BITS,                /*!< Frame bits is not 40 and not 80.                         */\n  TRANSPORTENC_INVALID_AOT,                       /*!< Unknown AOT found.                                       */\n  TRANSPORTENC_INVALID_AU_LENGTH                  /*!< Invalid Access Unit length (not byte-aligned).           */\n\n} TRANSPORTENC_ERROR;\n\ntypedef struct TRANSPORTENC *HANDLE_TRANSPORTENC;\n\n/**\n * \\brief             Determine a reasonable channel configuration on the basis of channel_mode.\n * \\param noChannels  Number of audio channels.\n * \\return            CHANNEL_MODE value that matches the given amount of audio channels.\n */\nCHANNEL_MODE transportEnc_GetChannelMode( int noChannels );\n\n/**\n * \\brief                Register SBR heaqder writer callback.\n * \\param hTp            Handle of transport decoder.\n * \\param cbUpdateConfig Pointer to a callback function to handle SBR header writing.\n * \\param user_data      void pointer for user data passed to the callback as first parameter.\n * \\return               0 on success.\n */\nint transportEnc_RegisterSbrCallback (\n        HANDLE_TRANSPORTENC hTpEnc,\n        const cbSbr_t cbSbr,\n        void* user_data\n        );\n\n/**\n * \\brief                Register SSC writer callback.\n * \\param hTp            Handle of transport decoder.\n * \\param cbUpdateConfig Pointer to a callback function to handle SSC writing.\n * \\param user_data      void pointer for user data passed to the callback as first parameter.\n * \\return               0 on success.\n */\nint transportEnc_RegisterSscCallback (\n        HANDLE_TRANSPORTENC hTpEnc,\n        const cbSsc_t cbSsc,\n        void* user_data\n        );\n\n/**\n * \\brief         Write ASC from given parameters.\n * \\param asc     A HANDLE_FDK_BITSTREAM where the ASC is written to.\n * \\param config  Structure containing the codec configuration settings.\n * \\param cb callback information structure.\n * \\return        0 on success.\n */\nint transportEnc_writeASC (\n        HANDLE_FDK_BITSTREAM asc,\n        CODER_CONFIG *config,\n        CSTpCallBacks *cb\n        );\n\n\n/* Defintion of flags that can be passed to transportEnc_Open() */\n#define TP_FLAG_MPEG4      1  /** MPEG4 (instead of MPEG2) */\n#define TP_FLAG_LATM_AMV   2  /** LATM AudioMuxVersion  */\n#define TP_FLAG_LATM_AMVA  4  /** LATM AudioMuxVersionA */\n\n/**\n * \\brief               Allocate transport encoder.\n * \\param phTpEnc       Pointer to transport encoder handle.\n * \\return              Error code.\n */\nTRANSPORTENC_ERROR transportEnc_Open( HANDLE_TRANSPORTENC *phTpEnc );\n\n/**\n * \\brief               Init transport encoder.\n * \\param bsBuffer      Pointer to transport encoder.\n * \\param bsBuffer      Pointer to bitstream buffer.\n * \\param bsBufferSize  Size in bytes of bsBuffer.\n * \\param transportFmt  Format of the transport to be written.\n * \\param config        Pointer to a valid CODER_CONFIG struct.\n * \\param flags         Transport encoder flags.\n * \\return              Error code.\n */\nTRANSPORTENC_ERROR transportEnc_Init(\n        HANDLE_TRANSPORTENC hTpEnc,\n        UCHAR              *bsBuffer,\n        INT                 bsBufferSize,\n        TRANSPORT_TYPE     transportFmt,\n        CODER_CONFIG      *config,\n        UINT               flags\n        );\n\n/**\n * \\brief      Get transport encoder bitstream.\n * \\param hTp  Pointer to a transport encoder handle.\n * \\return     The handle to the requested FDK bitstream.\n */\nHANDLE_FDK_BITSTREAM transportEnc_GetBitstream( HANDLE_TRANSPORTENC hTp );\n\n/**\n * \\brief         Get amount of bits required by the transport headers.\n * \\param hTp     Handle of transport encoder.\n * \\param auBits  Amount of payload bits required for the current subframe.\n * \\return        Error code.\n */\nINT transportEnc_GetStaticBits( HANDLE_TRANSPORTENC hTp, int auBits );\n\n/**\n * \\brief       Close transport encoder. This function assures that all allocated memory is freed.\n * \\param phTp  Pointer to a previously allocated transport encoder handle.\n */\nvoid transportEnc_Close( HANDLE_TRANSPORTENC *phTp );\n\n/**\n * \\brief                       Write one access unit.\n * \\param hTp                   Handle of transport encoder.\n * \\param total_bits            Amount of total access unit bits.\n * \\param bufferFullness        Value of current buffer fullness in bits.\n * \\param noConsideredChannels  Number of bitrate wise considered channels (all minus LFE channels).\n * \\return                      Error code.\n */\nTRANSPORTENC_ERROR transportEnc_WriteAccessUnit( HANDLE_TRANSPORTENC hTp,\n                                                 INT total_bits,\n                                                 int bufferFullness,\n                                                 int noConsideredChannels );\n\n/**\n * \\brief        Inform the transportEnc layer that writing of access unit has finished. This function\n *               is required to be called when the encoder has finished writing one Access\n *               one Access Unit for bitstream housekeeping.\n * \\param hTp    Transport handle.\n * \\param pBits  Pointer to an int, where the current amount of frame bits is passed\n *               and where the current amount of subframe bits is returned.\n *\n * OR:  This integer is modified by the amount of extra bit alignment that may occurr.\n *\n * \\return       Error code.\n */\nTRANSPORTENC_ERROR transportEnc_EndAccessUnit( HANDLE_TRANSPORTENC hTp, int *pBits);\n\n/*\n * \\brief         Get a payload frame.\n * \\param hTpEnc  Transport encoder handle.\n * \\param nBytes  Pointer to an int to hold the frame size in bytes. Returns zero\n *                if currently there is no complete frame for output (number of sub frames > 1).\n * \\return        Error code.\n */\nTRANSPORTENC_ERROR transportEnc_GetFrame(HANDLE_TRANSPORTENC hTpEnc, int *nbytes);\n\n/* ADTS CRC support */\n\n/**\n * \\brief         Set current bitstream position as start of a new data region.\n * \\param hTpEnc  Transport encoder handle.\n * \\param mBits   Size in bits of the data region. Set to 0 if it should not be of a fixed size.\n * \\return        Data region ID, which should be used when calling transportEnc_CrcEndReg().\n */\nint transportEnc_CrcStartReg(HANDLE_TRANSPORTENC hTpEnc, int mBits);\n\n/**\n * \\brief         Set end of data region.\n * \\param hTpEnc  Transport encoder handle.\n * \\param reg     Data region ID, opbtained from transportEnc_CrcStartReg().\n * \\return        void\n */\nvoid transportEnc_CrcEndReg(HANDLE_TRANSPORTENC hTpEnc, int reg);\n\n/**\n * \\brief             Get AudioSpecificConfig or StreamMuxConfig from transport encoder handle and write it to dataBuffer.\n * \\param hTpEnc      Transport encoder handle.\n * \\param cc          Pointer to the current and valid configuration contained in a CODER_CONFIG struct.\n * \\param dataBuffer  Bitbuffer holding binary configuration.\n * \\param confType    Pointer to an UINT where the configuration type is returned (0:ASC, 1:SMC).\n * \\return            Error code.\n */\nTRANSPORTENC_ERROR transportEnc_GetConf( HANDLE_TRANSPORTENC  hTpEnc,\n                                         CODER_CONFIG        *cc,\n                                         FDK_BITSTREAM       *dataBuffer,\n                                         UINT                *confType );\n\n/**\n * \\brief       Get information (version among other things) of the transport encoder library.\n * \\param info  Pointer to an allocated LIB_INFO struct.\n * \\return      Error code.\n */\nTRANSPORTENC_ERROR transportEnc_GetLibInfo( LIB_INFO *info );\n\n#endif /* #ifndef __TPENC_LIB_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libPCMutils/include/limiter.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/************************  FDK PCM postprocessor module  *********************\n\n   Author(s):   Matthias Neusinger\n   Description: Hard limiter for clipping prevention\n\n*******************************************************************************/\n\n#ifndef _LIMITER_H_\n#define _LIMITER_H_\n\n\n#include \"common_fix.h\"\n\n#define TDL_ATTACK_DEFAULT_MS      (15)              /* default attack  time in ms */\n#define TDL_RELEASE_DEFAULT_MS     (50)              /* default release time in ms */\n\n#define TDL_GAIN_SCALING           (15)              /* scaling of gain value. */\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\ntypedef enum {\n  TDLIMIT_OK = 0,\n\n  __error_codes_start = -100,\n\n  TDLIMIT_INVALID_HANDLE,\n  TDLIMIT_INVALID_PARAMETER,\n\n  __error_codes_end\n} TDLIMITER_ERROR;\n\nstruct TDLimiter;\ntypedef struct TDLimiter* TDLimiterPtr;\n\n/******************************************************************************\n* createLimiter                                                               *\n* maxAttackMs:   maximum and initial attack/lookahead time in milliseconds    *\n* releaseMs:     release time in milliseconds (90% time constant)             *\n* threshold:     limiting threshold                                           *\n* maxChannels:   maximum and initial number of channels                       *\n* maxSampleRate: maximum and initial sampling rate in Hz                      *\n* returns:       limiter handle                                               *\n******************************************************************************/\nTDLimiterPtr createLimiter(unsigned int  maxAttackMs,\n                           unsigned int  releaseMs,\n                           INT_PCM       threshold,\n                           unsigned int  maxChannels,\n                           unsigned int  maxSampleRate);\n\n\n/******************************************************************************\n* resetLimiter                                                                *\n* limiter: limiter handle                                                     *\n* returns: error code                                                         *\n******************************************************************************/\nTDLIMITER_ERROR resetLimiter(TDLimiterPtr limiter);\n\n\n/******************************************************************************\n* destroyLimiter                                                              *\n* limiter: limiter handle                                                     *\n* returns: error code                                                         *\n******************************************************************************/\nTDLIMITER_ERROR destroyLimiter(TDLimiterPtr limiter);\n\n/******************************************************************************\n* applyLimiter                                                                *\n* limiter:    limiter handle                                                  *\n* pGain :     pointer to gains to be applied to the signal before limiting,   *\n*             which are downscaled by TDL_GAIN_SCALING bit.                   *\n*             These gains are delayed by gain_delay, and smoothed.            *\n*             Smoothing is done by a butterworth lowpass filter with a cutoff *\n*             frequency which is fixed with respect to the sampling rate.     *\n*             It is a substitute for the smoothing due to windowing and       *\n*             overlap/add, if a gain is applied in frequency domain.          *\n* gain_scale: pointer to scaling exponents to be applied to the signal before *\n*             limiting, without delay and without smoothing                   *\n* gain_size:  number of elements in pGain, currently restricted to 1          *\n* gain_delay: delay [samples] with which the gains in pGain shall be applied  *\n*             gain_delay <= nSamples                                          *\n* samples:    input/output buffer containing interleaved samples              *\n*             precision of output will be DFRACT_BITS-TDL_GAIN_SCALING bits   *\n* nSamples:   number of samples per channel                                   *\n* returns:    error code                                                      *\n******************************************************************************/\nTDLIMITER_ERROR applyLimiter(TDLimiterPtr limiter,\n                 INT_PCM*    samples,\n                 FIXP_DBL*    pGain,\n                 const INT*   gain_scale,\n                 const UINT   gain_size,\n                 const UINT   gain_delay,\n                 const UINT   nSamples);\n\n/******************************************************************************\n* getLimiterDelay                                                             *\n* limiter: limiter handle                                                     *\n* returns: exact delay caused by the limiter in samples                       *\n******************************************************************************/\nunsigned int getLimiterDelay(TDLimiterPtr limiter);\n\n/******************************************************************************\n* setLimiterNChannels                                                         *\n* limiter:   limiter handle                                                   *\n* nChannels: number of channels ( <= maxChannels specified on create)         *\n* returns:   error code                                                       *\n******************************************************************************/\nTDLIMITER_ERROR setLimiterNChannels(TDLimiterPtr limiter, unsigned int nChannels);\n\n/******************************************************************************\n* setLimiterSampleRate                                                        *\n* limiter:    limiter handle                                                  *\n* sampleRate: sampling rate in Hz ( <= maxSampleRate specified on create)     *\n* returns:    error code                                                      *\n******************************************************************************/\nTDLIMITER_ERROR setLimiterSampleRate(TDLimiterPtr limiter, unsigned int sampleRate);\n\n/******************************************************************************\n* setLimiterAttack                                                            *\n* limiter:    limiter handle                                                  *\n* attackMs:   attack time in ms ( <= maxAttackMs specified on create)         *\n* returns:    error code                                                      *\n******************************************************************************/\nTDLIMITER_ERROR setLimiterAttack(TDLimiterPtr limiter, unsigned int attackMs);\n\n/******************************************************************************\n* setLimiterRelease                                                           *\n* limiter:    limiter handle                                                  *\n* releaseMs:  release time in ms                                              *\n* returns:    error code                                                      *\n******************************************************************************/\nTDLIMITER_ERROR setLimiterRelease(TDLimiterPtr limiter, unsigned int releaseMs);\n\n/******************************************************************************\n* setLimiterThreshold                                                         *\n* limiter:    limiter handle                                                  *\n* threshold:  limiter threshold                                               *\n* returns:    error code                                                      *\n******************************************************************************/\nTDLIMITER_ERROR setLimiterThreshold(TDLimiterPtr limiter, INT_PCM threshold);\n\n#ifdef __cplusplus\n}\n#endif\n\n\n#endif  //#ifndef _LIMITER_H_\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libPCMutils/include/pcmutils_lib.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/************************  FDK PCM up/downmixing module  *********************\n\n   Author(s):   Christian Griebel\n   Description: Declares functions to interface with the PCM downmix processing\n                module.\n\n*******************************************************************************/\n\n#ifndef _PCMUTILS_LIB_H_\n#define _PCMUTILS_LIB_H_\n\n#include \"machine_type.h\"\n#include \"common_fix.h\"\n#include \"FDK_audio.h\"\n#include \"FDK_bitstream.h\"\n\n\n/* ------------------------ *\n *     ERROR CODES:         *\n * ------------------------ */\ntypedef enum\n{\n  PCMDMX_OK              = 0x0,   /*!< No error happened.                                        */\n\n  pcm_dmx_fatal_error_start,\n  PCMDMX_OUT_OF_MEMORY   = 0x2,   /*!< Not enough memory to set up an instance of the module.    */\n  PCMDMX_UNKNOWN         = 0x5,   /*!< Error condition is of unknown reason, or from a third\n                                       party module.                                             */\n  pcm_dmx_fatal_error_end,\n\n  PCMDMX_INVALID_HANDLE,          /*!< The given instance handle is not valid.                   */\n  PCMDMX_INVALID_ARGUMENT,        /*!< One of the parameters handed over is invalid.             */\n  PCMDMX_INVALID_CH_CONFIG,       /*!< The given channel configuration is not supported and thus\n                                       no processing was performed.                              */\n  PCMDMX_INVALID_MODE,            /*!< The set configuration/mode is not applicable.             */\n  PCMDMX_UNKNOWN_PARAM,           /*!< The handed parameter is not known/supported.              */\n  PCMDMX_UNABLE_TO_SET_PARAM,     /*!< Unable to set the specific parameter. Most probably the\n                                       value ist out of range.                                   */\n  PCMDMX_CORRUPT_ANC_DATA         /*!< The read ancillary data was corrupt.                      */\n\n} PCMDMX_ERROR;\n\n/** Macro to identify fatal errors. */\n#define PCMDMX_IS_FATAL_ERROR(err)   ( (((err)>=pcm_dmx_fatal_error_start)   && ((err)<=pcm_dmx_fatal_error_end))   ? 1 : 0)\n\n/* ------------------------ *\n *     RUNTIME PARAMS:      *\n * ------------------------ */\ntypedef enum\n{\n  DMX_BS_DATA_EXPIRY_FRAME,       /*!< The number of frames without new metadata that have to go\n                                       by before the bitstream data expires. The value 0 disables\n                                       expiry.                                                   */\n  DMX_BS_DATA_DELAY,              /*!< The number of delay frames of the output samples compared\n                                       to the bitstream data.                                    */\n  MIN_NUMBER_OF_OUTPUT_CHANNELS,  /*!< The minimum number of output channels. For all input\n                                       configurations that have less than the given channels the\n                                       module will modify the output automatically to obtain the\n                                       given number of output channels. Mono signals will be\n                                       duplicated. If more than two output channels are desired\n                                       the module just adds empty channels. The parameter value\n                                       must be either -1, 0, 1, 2, 6 or 8. If the value is\n                                       greater than zero and exceeds the value of parameter\n                                       MAX_NUMBER_OF_OUTPUT_CHANNELS the latter will be set to\n                                       the same value. Both values -1 and 0 disable the feature. */\n  MAX_NUMBER_OF_OUTPUT_CHANNELS,  /*!< The maximum number of output channels. For all input\n                                       configurations that have more than the given channels the\n                                       module will apply a mixdown automatically to obtain the\n                                       given number of output channels. The value must be either\n                                       -1, 0, 1, 2, 6 or 8. If it is greater than zero and lower\n                                       or equal than the value of MIN_NUMBER_OF_OUTPUT_CHANNELS\n                                       parameter the latter will be set to the same value.\n                                       The values -1 and 0 disable the feature.                  */\n  DMX_DUAL_CHANNEL_MODE,          /*!< Downmix mode for two channel audio data.                  */\n  DMX_PSEUDO_SURROUND_MODE        /*!< Defines how module handles pseudo surround compatible\n                                       signals. See PSEUDO_SURROUND_MODE type for details.       */\n} PCMDMX_PARAM;\n\n/* Parameter value types */\ntypedef enum\n{\n  NEVER_DO_PS_DMX = -1,           /*!< Never create a pseudo surround compatible downmix.        */\n  AUTO_PS_DMX     =  0,           /*!< Create a pseudo surround compatible downmix only if\n                                       signalled in bitstreams meta data. (Default)              */\n  FORCE_PS_DMX    =  1            /*!< Always create a pseudo surround compatible downmix.\n                                       CAUTION: This can lead to excessive signal cancellations\n                                       and signal level differences for non-compatible signals.  */\n} PSEUDO_SURROUND_MODE;\n\ntypedef enum\n{\n  STEREO_MODE = 0x0,              /*!< Leave stereo signals as they are.                         */\n  CH1_MODE    = 0x1,              /*!< Create a dual mono output signal from channel 1.          */\n  CH2_MODE    = 0x2,              /*!< Create a dual mono output signal from channel 2.          */\n  MIXED_MODE  = 0x3               /*!< Create a dual mono output signal by mixing the two\n                                       channels.                                                 */\n} DUAL_CHANNEL_MODE;\n\n\n/* ------------------------ *\n *     MODULES INTERFACE:   *\n * ------------------------ */\ntypedef struct PCM_DMX_INSTANCE *HANDLE_PCM_DOWNMIX;\n\n/* Modules reset flags */\n#define PCMDMX_RESET_PARAMS   ( 1 )\n#define PCMDMX_RESET_BS_DATA  ( 2 )\n#define PCMDMX_RESET_FULL     ( PCMDMX_RESET_PARAMS | PCMDMX_RESET_BS_DATA )\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\n/** Open and initialize an instance of the PCM downmix module\n * @param [out] Pointer to a buffer receiving the handle of the new instance.\n * @returns     Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_Open (\n    HANDLE_PCM_DOWNMIX *pSelf\n  );\n\n/** Set one parameter for one instance of the PCM downmix module.\n * @param [in] Handle of PCM downmix instance.\n * @param [in] Parameter to be set.\n * @param [in] Parameter value.\n * @returns    Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_SetParam (\n    HANDLE_PCM_DOWNMIX  self,\n    const PCMDMX_PARAM  param,\n    const INT           value\n  );\n\n/** Get one parameter value of one PCM downmix module instance.\n * @param [in] Handle of PCM downmix module instance.\n * @param [in] Parameter to be set.\n * @param [out] Pointer to buffer receiving the parameter value.\n * @returns Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_GetParam (\n    HANDLE_PCM_DOWNMIX  self,\n    const PCMDMX_PARAM  param,\n    INT * const         pValue\n  );\n\n/** Read downmix meta-data directly from a given bitstream.\n * @param [in] Handle of PCM downmix instance.\n * @param [in] Handle of FDK bitstream buffer.\n * @param [in] Length of ancillary data in bits.\n * @param [in] Flag indicating wheter the ancillary data is from a MPEG-1/2 or an MPEG-4 stream.\n * @returns    Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_Parse (\n    HANDLE_PCM_DOWNMIX  self,\n    HANDLE_FDK_BITSTREAM  hBitStream,\n    UINT   ancDataBits,\n    int    isMpeg2\n  );\n\n/** Read downmix meta-data from a given data buffer.\n * @param [in] Handle of PCM downmix instance.\n * @param [in] Pointer to ancillary data buffer.\n * @param [in] Size of ancillary data in bytes.\n * @param [in] Flag indicating wheter the ancillary data is from a MPEG-1/2 or an MPEG-4 stream.\n * @returns    Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_ReadDvbAncData (\n    HANDLE_PCM_DOWNMIX  self,\n    UCHAR *pAncDataBuf,\n    UINT   ancDataBytes,\n    int    isMpeg2\n  );\n\n/** Set the matrix mixdown information extracted from the PCE of an AAC bitstream.\n * @param [in] Handle of PCM downmix instance.\n * @param [in] Matrix mixdown index present flag extracted from PCE.\n * @param [in] The 2 bit matrix mixdown index extracted from PCE.\n * @param [in] The pseudo surround enable flag extracted from PCE.\n * @returns    Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_SetMatrixMixdownFromPce (\n    HANDLE_PCM_DOWNMIX  self,\n    int                 matrixMixdownPresent,\n    int                 matrixMixdownIdx,\n    int                 pseudoSurroundEnable\n  );\n\n/** Reset the module.\n * @param [in] Handle of PCM downmix instance.\n * @param [in] Flags telling which parts of the module shall be reset.\n * @returns Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_Reset (\n    HANDLE_PCM_DOWNMIX  self,\n    UINT                flags\n  );\n\n/** Create a mixdown, bypass or extend the output signal depending on the modules settings and the\n *  respective given input configuration.\n *\n * \\param [in]    Handle of PCM downmix module instance.\n * \\param [inout] Pointer to time buffer with decoded PCM samples.\n * \\param [in]    The I/O block size which is the number of samples per channel.\n * \\param [inout] Pointer to buffer that holds the number of input channels and where the\n *                amount of output channels is written to.\n * \\param [in]    Flag which indicates if output time data is writtern interleaved or as\n *                subsequent blocks.\n * \\param [inout] Array were the corresponding channel type for each output audio channel is\n *                stored into.\n * \\param [inout] Array were the corresponding channel type index for each output audio channel\n *                is stored into.\n * \\param [in]    Array containing the output channel mapping to be used (from MPEG PCE ordering\n *                to whatever is required).\n * \\param [out]   Pointer on a field receiving the scale factor that has to be applied on all\n *                samples afterwards. If the handed pointer is NULL the final scaling is done\n *                internally.\n * @returns       Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_ApplyFrame (\n    HANDLE_PCM_DOWNMIX      self,\n    INT_PCM                *pPcmBuf,\n    UINT                    frameSize,\n    INT                    *nChannels,\n    int                     fInterleaved,\n    AUDIO_CHANNEL_TYPE      channelType[],\n    UCHAR                   channelIndices[],\n    const UCHAR             channelMapping[][8],\n    INT                    *pDmxOutScale\n  );\n\n/** Close an instance of the PCM downmix module.\n * @param [inout] Pointer to a buffer containing the handle of the instance.\n * @returns       Returns an error code.\n **/\nPCMDMX_ERROR pcmDmx_Close (\n    HANDLE_PCM_DOWNMIX *pSelf\n  );\n\n/** Get library info for this module.\n * @param [out] Pointer to an allocated LIB_INFO structure.\n * @returns     Returns an error code.\n */\nPCMDMX_ERROR pcmDmx_GetLibInfo( LIB_INFO *info );\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif  /* _PCMUTILS_LIB_H_ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libSBRdec/include/sbrdecoder.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2015 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/************************  Fraunhofer IIS SBR decoder library ******************\n\n   Author(s):\n   Description: SBR decoder front-end prototypes and definitions.\n\n******************************************************************************/\n\n#ifndef __SBRDECODER_H\n#define __SBRDECODER_H\n\n#include \"common_fix.h\"\n\n#include \"FDK_bitstream.h\"\n#include \"FDK_audio.h\"\n\n\n#define SBR_DEBUG_EXTHLP \"\\\n--- SBR ---\\n\\\n    0x00000010 Ancillary data and SBR-Header\\n\\\n    0x00000020 SBR-Side info\\n\\\n    0x00000040 Decoded SBR-bitstream data, e.g. envelope data\\n\\\n    0x00000080 SBR-Bitstream statistics\\n\\\n    0x00000100 Miscellaneous SBR-messages\\n\\\n    0x00000200 SBR-Energies and gains in the adjustor\\n\\\n    0x00000400 Fatal SBR errors\\n\\\n    0x00000800 Transposer coefficients for inverse filtering\\n\\\n\"\n\n/* Capability flags */\n#define CAPF_SBR_LP          0x00000001   /*!< Flag indicating library's capability of Low Power mode.            */\n#define CAPF_SBR_HQ          0x00000002   /*!< Flag indicating library's capability of High Quality mode.         */\n#define CAPF_SBR_DRM_BS      0x00000004   /*!< Flag indicating library's capability to decode DRM SBR data.       */\n#define CAPF_SBR_CONCEALMENT 0x00000008   /*!< Flag indicating library's capability to conceal erroneous frames.  */\n#define CAPF_SBR_DRC         0x00000010   /*!< Flag indicating library's capability for Dynamic Range Control.    */\n#define CAPF_SBR_PS_MPEG     0x00000020   /*!< Flag indicating library's capability to do MPEG Parametric Stereo. */\n#define CAPF_SBR_PS_DRM      0x00000040   /*!< Flag indicating library's capability to do DRM Parametric Stereo.  */\n\ntypedef enum\n{\n  SBRDEC_OK = 0,                       /*!< All fine.                                                       */\n  /* SBRDEC_CONCEAL,                                                                                        */\n  /* SBRDEC_NOSYNCH,                                                                                        */\n  /* SBRDEC_ILLEGAL_PROGRAM,                                                                                */\n  /* SBRDEC_ILLEGAL_TAG,                                                                                    */\n  /* SBRDEC_ILLEGAL_CHN_CONFIG,                                                                             */\n  /* SBRDEC_ILLEGAL_SECTION,                                                                                */\n  /* SBRDEC_ILLEGAL_SCFACTORS,                                                                              */\n  /* SBRDEC_ILLEGAL_PULSE_DATA,                                                                             */\n  /* SBRDEC_MAIN_PROFILE_NOT_IMPLEMENTED,                                                                   */\n  /* SBRDEC_GC_NOT_IMPLEMENTED,                                                                             */\n  /* SBRDEC_ILLEGAL_PLUS_ELE_ID,                                                                            */\n  SBRDEC_CREATE_ERROR,                 /*!<                                                                 */\n  SBRDEC_NOT_INITIALIZED,              /*!<                                                                 */\n  SBRDEC_MEM_ALLOC_FAILED,             /*!< Memory allocation failed. Probably not enough memory available. */\n  SBRDEC_PARSE_ERROR,                  /*!<                                                                 */\n  SBRDEC_UNSUPPORTED_CONFIG,           /*!<                                                                 */\n  SBRDEC_SET_PARAM_FAIL                /*!<                                                                 */\n} SBR_ERROR;\n\ntypedef enum\n{\n  SBR_SYSTEM_BITSTREAM_DELAY,          /*!< System: Switch to enable an additional SBR bitstream delay of one frame. */\n  SBR_QMF_MODE,                        /*!< Set QMF mode, either complex or low power. */\n  SBR_LD_QMF_TIME_ALIGN,               /*!< Set QMF type, either LD-MPS or CLDFB. Relevant for ELD streams only. */\n  SBR_FLUSH_DATA,                      /*!< Set internal state to flush the decoder with the next process call. */\n  SBR_CLEAR_HISTORY,                   /*!< Clear all internal states (delay lines, QMF states, ...). */\n  SBR_BS_INTERRUPTION                  /*!< Signal bit stream interruption. Value is ignored. */\n} SBRDEC_PARAM;\n\ntypedef struct SBR_DECODER_INSTANCE *HANDLE_SBRDECODER;\n\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\n\n/**\n * \\brief        Allocates and initializes one SBR decoder instance.\n * \\param pSelf  Pointer to where a SBR decoder handle is copied into.\n * \\return       Error code.\n */\nSBR_ERROR sbrDecoder_Open ( HANDLE_SBRDECODER *pSelf );\n\n/**\n * \\brief  Initialize a SBR decoder runtime instance. Must be called before decoding starts.\n *\n * \\param self             Handle to a SBR decoder instance.\n * \\param sampleRateIn     Input samplerate of the SBR decoder instance.\n * \\param sampleRateOut    Output samplerate of the SBR decoder instance.\n * \\param samplesPerFrame  Number of samples per frames.\n * \\param coreCodec        Audio Object Type (AOT) of the core codec.\n * \\param elementID        Table with MPEG-4 element Ids in canonical order.\n * \\param forceReset       Flag that enforces a complete decoder reset.\n *\n * \\return  Error code.\n */\nSBR_ERROR sbrDecoder_InitElement (\n        HANDLE_SBRDECODER       self,\n        const int               sampleRateIn,\n        const int               sampleRateOut,\n        const int               samplesPerFrame,\n        const AUDIO_OBJECT_TYPE coreCodec,\n        const MP4_ELEMENT_ID    elementID,\n        const int               elementIndex\n        );\n\n/**\n * \\brief pass out of band SBR header to SBR decoder\n *\n * \\param self         Handle to a SBR decoder instance.\n * \\param hBs          bit stream handle data source.\n * \\param elementID    SBR element ID.\n * \\param elementIndex SBR element index.\n *\n * \\return  Error code.\n */\nINT sbrDecoder_Header (\n        HANDLE_SBRDECODER       self,\n        HANDLE_FDK_BITSTREAM    hBs,\n        const INT sampleRateIn,\n        const INT sampleRateOut,\n        const INT samplesPerFrame,\n        const AUDIO_OBJECT_TYPE coreCodec,\n        const MP4_ELEMENT_ID    elementID,\n        const INT               elementIndex\n        );\n\n/**\n * \\brief        Set a parameter of the SBR decoder runtime instance.\n * \\param self   SBR decoder handle.\n * \\param param  Parameter which will be set if successfull.\n * \\param value  New parameter value.\n * \\return       Error code.\n */\nSBR_ERROR sbrDecoder_SetParam ( HANDLE_SBRDECODER   self,\n                                const SBRDEC_PARAM  param,\n                                const INT           value );\n\n/**\n * \\brief  Feed DRC channel data into a SBR decoder runtime instance.\n *\n * \\param self                    SBR decoder handle.\n * \\param ch                      Channel number to which the DRC data is associated to.\n * \\param numBands                Number of DRC bands.\n * \\param pNextFact_mag           Pointer to a table with the DRC factor magnitudes.\n * \\param nextFact_exp            Exponent for all DRC factors.\n * \\param drcInterpolationScheme  DRC interpolation scheme.\n * \\param winSequence             Window sequence from core coder (eight short or one long window).\n * \\param pBandTop                Pointer to a table with the top borders for all DRC bands.\n *\n * \\return  Error code.\n */\nSBR_ERROR sbrDecoder_drcFeedChannel ( HANDLE_SBRDECODER  self,\n                                      INT                ch,\n                                      UINT               numBands,\n                                      FIXP_DBL          *pNextFact_mag,\n                                      INT                nextFact_exp,\n                                      SHORT              drcInterpolationScheme,\n                                      UCHAR              winSequence,\n                                      USHORT            *pBandTop );\n\n/**\n * \\brief  Disable SBR DRC for a certain channel.\n *\n * \\param hSbrDecoder  SBR decoder handle.\n * \\param ch           Number of the channel that has to be disabled.\n *\n * \\return  None.\n */\nvoid sbrDecoder_drcDisable ( HANDLE_SBRDECODER  self,\n                             INT                ch );\n\n\n/**\n * \\brief  Parse one SBR element data extension data block. The bit stream position will\n *         be placed at the end of the SBR payload block. The remaining bits will be returned\n *         into *count if a payload length is given (byPayLen > 0). If no SBR payload length is\n *         given (bsPayLen < 0) then the bit stream position on return will be random after this\n *         function call in case of errors, and any further decoding will be completely pointless.\n *         This function accepts either normal ordered SBR data or reverse ordered DRM SBR data.\n *\n * \\param self           SBR decoder handle.\n * \\param hBs            Bit stream handle as data source.\n * \\param count          Pointer to an integer where the amount of parsed SBR payload bits is stored into.\n * \\param bsPayLen       If > 0 this value is the SBR payload length. If < 0, the SBR payload length is unknown.\n * \\param flags          CRC flag (0: EXT_SBR_DATA; 1: EXT_SBR_DATA_CRC)\n * \\param prev_element   Previous MPEG-4 element ID.\n * \\param element_index  Index of the current element.\n *\n * \\return  Error code.\n */\nSBR_ERROR sbrDecoder_Parse (\n        HANDLE_SBRDECODER  self,\n        HANDLE_FDK_BITSTREAM hBs,\n        int *count,\n        int  bsPayLen,\n        int  crcFlag,\n        MP4_ELEMENT_ID prev_element,\n        int element_index,\n        int fGlobalIndependencyFlag\n        );\n\n/**\n * \\brief  This function decodes the given SBR bitstreams and applies SBR to the given time data.\n * \n * SBR-processing works InPlace. I.e. the calling function has to provide\n * a time domain buffer timeData which can hold the completely decoded\n * result.\n *\n * Left and right channel are read and stored according to the\n * interleaving flag, frame length and number of channels.\n *\n * \\param self            Handle of an open SBR decoder instance.\n * \\param hSbrBs          SBR Bitstream handle.\n * \\param timeData        Pointer to input and finally upsampled output data.\n * \\param numChannels     Pointer to a buffer holding the number of channels in time data buffer.\n * \\param sampleRate      Output samplerate.\n * \\param channelMapping  Channel mapping indices.\n * \\param interleaved     Flag indicating if time data is stored interleaved (1: Interleaved time data, 0: non-interleaved timedata).\n * \\param coreDecodedOk   Flag indicating if the core decoder did not find any error (0: core decoder found errors, 1: no errors).\n * \\param psDecoded       Pointer to a buffer holding a flag. Input: PS is possible, Output: PS has been rendered.\n *\n * \\return  Error code.\n */\nSBR_ERROR sbrDecoder_Apply ( HANDLE_SBRDECODER    self,\n                             INT_PCM             *timeData,\n                             int                 *numChannels,\n                             int                 *sampleRate,\n                             const UCHAR          channelMapping[(8)],\n                             const int            interleaved,\n                             const int            coreDecodedOk,\n                             UCHAR               *psDecoded );\n\n\n/**\n * \\brief       Close SBR decoder instance and free memory.\n * \\param self  SBR decoder handle.\n * \\return      Error Code.\n */\nSBR_ERROR sbrDecoder_Close ( HANDLE_SBRDECODER *self );\n\n\n/**\n * \\brief       Get SBR decoder library information.\n * \\param info  Pointer to a LIB_INFO struct, where library information is written to.\n * \\return      0 on success, -1 if invalid handle or if no free element is available to write information to.\n */\nINT sbrDecoder_GetLibInfo( LIB_INFO *info );    \n\n/**\n * \\brief       Determine the modules output signal delay in samples.\n * \\param self  SBR decoder handle.\n * \\return      The number of samples signal delay added by the module.\n */\nUINT sbrDecoder_GetDelay( const HANDLE_SBRDECODER self );\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libSBRenc/include/sbr_encoder.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2015 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/***************************  Fraunhofer IIS ***********************\n\n   Author(s):\n   Description: SBR encoder top level processing prototype\n\n******************************************************************************/\n\n#ifndef __SBR_ENCODER_H\n#define __SBR_ENCODER_H\n\n#include \"common_fix.h\"\n#include \"FDK_audio.h\"\n\n#include \"FDK_bitstream.h\"\n\n/* core coder helpers */\n#define MAX_TRANS_FAC         8\n#define MAX_CODEC_FRAME_RATIO 2\n#define MAX_PAYLOAD_SIZE    256\n\ntypedef enum codecType\n{\n  CODEC_AAC=0,\n  CODEC_AACLD=1,\n  CODEC_UNSPECIFIED=99\n} CODEC_TYPE;\n\n\ntypedef struct\n{\n  INT bitRate;\n  INT nChannels;\n  INT sampleFreq;\n  INT transFac;\n  INT standardBitrate;\n} CODEC_PARAM;\n\ntypedef enum\n{\n  SBR_MONO,\n  SBR_LEFT_RIGHT,\n  SBR_COUPLING,\n  SBR_SWITCH_LRC\n} SBR_STEREO_MODE;\n\n/* bitstream syntax flags */\nenum\n{\n  SBR_SYNTAX_LOW_DELAY = 0x0001,\n  SBR_SYNTAX_SCALABLE  = 0x0002,\n  SBR_SYNTAX_CRC       = 0x0004,\n  SBR_SYNTAX_DRM_CRC   = 0x0008\n};\n\ntypedef enum\n{\n  FREQ_RES_LOW = 0,\n  FREQ_RES_HIGH\n} FREQ_RES;\n\ntypedef struct\n{\n  CODEC_TYPE       coreCoder;        /*!< LC or ELD */\n  UINT             bitrateFrom;      /*!< inclusive */\n  UINT             bitrateTo;        /*!< exclusive */\n\n  UINT             sampleRate;       /*!<   */\n  UCHAR            numChannels;      /*!<   */\n\n  UCHAR            startFreq;        /*!< bs_start_freq */\n  UCHAR            startFreqSpeech;  /*!< bs_start_freq for speech config flag */\n  UCHAR            stopFreq;         /*!< bs_stop_freq */\n  UCHAR            stopFreqSpeech;   /*!< bs_stop_freq for speech config flag */\n\n  UCHAR            numNoiseBands;    /*!<   */\n  UCHAR            noiseFloorOffset; /*!<   */\n  SCHAR            noiseMaxLevel;    /*!<   */\n  SBR_STEREO_MODE  stereoMode;       /*!<   */\n  UCHAR            freqScale;        /*!<   */\n} sbrTuningTable_t;\n\ntypedef struct sbrConfiguration\n{\n  /*\n     core coder dependent configurations\n  */\n  CODEC_PARAM codecSettings;  /*!< Core coder settings. To be set from core coder. */\n  INT SendHeaderDataTime;     /*!< SBR header send update frequency in ms. */\n  INT useWaveCoding;          /*!< Flag: usage of wavecoding tool. */\n  INT crcSbr;                 /*!< Flag: usage of SBR-CRC. */\n  INT dynBwSupported;         /*!< Flag: support for dynamic bandwidth in this combination. */\n  INT parametricCoding;       /*!< Flag: usage of parametric coding tool. */\n  INT downSampleFactor;       /*!< Sampling rate relation between the SBR and the core encoder. */\n  FREQ_RES freq_res_fixfix[2];/*!< Frequency resolution of envelopes in frame class FIXFIX, for non-split case and split case */\n  UCHAR fResTransIsLow;       /*!< Frequency resolution of envelopes in transient frames: low (0) or variable (1) */\n\n  /*\n     core coder dependent tuning parameters\n  */\n  INT tran_thr;             /*!< SBR transient detector threshold (* 100). */\n  INT noiseFloorOffset;     /*!< Noise floor offset.      */\n  UINT useSpeechConfig;     /*!< Flag: adapt tuning parameters according to speech. */\n\n\n\n  /*\n     core coder independent configurations\n  */\n  INT sbrFrameSize;           /*!< SBR frame size in samples. Will be calculated from core coder settings. */\n  INT sbr_data_extra;         /*!< Flag usage of data extra. */\n  INT amp_res;                /*!< Amplitude resolution. */\n  INT ana_max_level;          /*!< Noise insertion maximum level. */\n  INT tran_fc;                /*!< Transient detector start frequency. */\n  INT tran_det_mode;          /*!< Transient detector mode. */\n  INT spread;                 /*!< Flag: usage of SBR spread. */\n  INT stat;                   /*!< Flag: usage of static framing. */\n  INT e;                      /*!< Number of envelopes when static framing is chosen. */\n  SBR_STEREO_MODE stereoMode; /*!< SBR stereo mode. */\n  INT deltaTAcrossFrames;     /*!< Flag: allow time-delta coding. */\n  FIXP_DBL dF_edge_1stEnv;    /*!< Extra fraction delta-F coding is allowed to be more expensive. */\n  FIXP_DBL dF_edge_incr;      /*!< Increment dF_edge_1stEnv this much if dT-coding was used this frame. */\n  INT sbr_invf_mode;          /*!< Inverse filtering mode. */\n  INT sbr_xpos_mode;          /*!< Transposer mode. */\n  INT sbr_xpos_ctrl;          /*!< Transposer control. */\n  INT sbr_xpos_level;         /*!< Transposer 3rd order level. */\n  INT startFreq;              /*!< The start frequency table index. */\n  INT stopFreq;               /*!< The stop frequency table index. */\n  INT useSaPan;               /*!< Flag: usage of SAPAN stereo. */\n  INT dynBwEnabled;           /*!< Flag: usage of dynamic bandwidth. */\n  INT bParametricStereo;      /*!< Flag: usage of parametric stereo coding tool. */\n\n  /*\n     header_extra1 configuration\n  */\n  UCHAR freqScale;            /*!< Frequency grouping. */\n  INT alterScale;             /*!< Scale resolution. */\n  INT sbr_noise_bands;        /*!< Number of noise bands. */\n\n\n  /*\n     header_extra2 configuration\n  */\n  INT sbr_limiter_bands;      /*!< Number of limiter bands. */\n  INT sbr_limiter_gains;      /*!< Gain of limiter. */\n  INT sbr_interpol_freq;      /*!< Flag: use interpolation in freq. direction. */\n  INT sbr_smoothing_length;   /*!< Flag: choose length 4 or 0 (=on, off). */\n  UCHAR init_amp_res_FF;\n  FIXP_DBL threshold_AmpRes_FF_m;\n  SCHAR threshold_AmpRes_FF_e;\n} sbrConfiguration, *sbrConfigurationPtr ;\n\ntypedef struct SBR_CONFIG_DATA\n{\n  UINT sbrSyntaxFlags;                  /**< SBR syntax flags derived from AOT. */\n  INT nChannels;                        /**< Number of channels.  */\n\n  INT nSfb[2];                          /**< Number of SBR scalefactor bands for LO_RES and HI_RES (?) */\n  INT num_Master;                       /**< Number of elements in v_k_master. */\n  INT sampleFreq;                       /**< SBR sampling frequency. */\n  INT frameSize;\n  INT xOverFreq;                        /**< The SBR start frequency. */\n  INT dynXOverFreq;                     /**< Used crossover frequency when dynamic bandwidth is enabled. */\n  INT noQmfBands;                       /**< Number of QMF frequency bands. */\n  INT noQmfSlots;                       /**< Number of QMF slots. */\n\n  UCHAR *freqBandTable[2];              /**< Frequency table for low and hires, only MAX_FREQ_COEFFS/2 +1 coeffs actually needed for lowres. */\n  UCHAR *v_k_master;                    /**< Master BandTable where freqBandTable is derived from. */\n\n\n  SBR_STEREO_MODE stereoMode;\n  INT noEnvChannels;                    /**< Number of envelope channels. */\n\n  INT useWaveCoding;                    /**< Flag indicates whether to use wave coding at all.      */\n  INT useParametricCoding;              /**< Flag indicates whether to use para coding at all.      */\n  INT xposCtrlSwitch;                   /**< Flag indicates whether to switch xpos ctrl on the fly. */\n  INT switchTransposers;                /**< Flag indicates whether to switch xpos on the fly .     */\n  UCHAR initAmpResFF;\n  FIXP_DBL thresholdAmpResFF_m;\n  SCHAR thresholdAmpResFF_e;\n} SBR_CONFIG_DATA, *HANDLE_SBR_CONFIG_DATA;\n\ntypedef struct {\n  MP4_ELEMENT_ID elType;\n  INT bitRate;\n  int instanceTag;\n  UCHAR fParametricStereo;\n  UCHAR nChannelsInEl;\n  UCHAR ChannelIndex[2];\n} SBR_ELEMENT_INFO;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct SBR_ENCODER *HANDLE_SBR_ENCODER;\n\n/**\n * \\brief  Get the max required input buffer size including delay balancing space\n *         for N audio channels.\n * \\param noChannels  Number of audio channels.\n * \\return            Max required input buffer size in bytes.\n */\nINT sbrEncoder_GetInBufferSize(int noChannels);\n\nINT sbrEncoder_Open(\n        HANDLE_SBR_ENCODER  *phSbrEncoder,\n        INT                  nElements,\n        INT                  nChannels,\n        INT                  supportPS\n        );\n\n/**\n * \\brief                 Get closest working bitrate to specified desired\n *                        bitrate for a single SBR element.\n * \\param bitRate         The desired target bit rate\n * \\param numChannels     The amount of audio channels\n * \\param coreSampleRate  The sample rate of the core coder\n * \\param aot             The current Audio Object Type\n * \\return                Closest working bit rate to bitRate value\n */\nUINT sbrEncoder_LimitBitRate(UINT bitRate, UINT numChannels, UINT coreSampleRate, AUDIO_OBJECT_TYPE aot);\n\n\n/**\n * \\brief                Check whether downsampled SBR single rate is possible\n *                       with given audio object type.\n * \\param aot            The Audio object type.\n * \\return               0 when downsampled SBR is not possible,\n *                       1 when downsampled SBR is possible.\n */\nUINT sbrEncoder_IsSingleRatePossible(AUDIO_OBJECT_TYPE aot);\n\n/**\n * \\brief                  Initialize SBR Encoder instance.\n * \\param phSbrEncoder     Pointer to a SBR Encoder instance.\n * \\param elInfo           Structure that describes the element/channel arrangement.\n * \\param noElements       Amount of elements described in elInfo.\n * \\param inputBuffer      Pointer to the encoder audio buffer\n * \\param bandwidth        Returns the core audio encoder bandwidth (output)\n * \\param bufferOffset     Returns the offset for the audio input data in order to do delay balancing.\n * \\param numChannels      Input: Encoder input channels. output: core encoder channels.\n * \\param sampleRate       Input: Encoder samplerate. output core encoder samplerate.\n * \\param downSampleFactor Input: Relation between SBR and core coder sampling rate;\n * \\param frameLength      Input: Encoder frameLength. output core encoder frameLength.\n * \\param aot              Input: Desired AOT. output AOT to be used after parameter checking.\n * \\param delay            Input: core encoder delay. Output: total delay because of SBR.\n * \\param transformFactor  The core encoder transform factor (blockswitching).\n * \\param headerPeriod     Repetition rate of the SBR header:\n *                           - (-1) means intern configuration.\n *                           - (1-10) corresponds to header repetition rate in frames.\n * \\return                 0 on success, and non-zero if failed.\n */\nINT sbrEncoder_Init(\n        HANDLE_SBR_ENCODER   hSbrEncoder,\n        SBR_ELEMENT_INFO     elInfo[(8)],\n        int                  noElements,\n        INT_PCM             *inputBuffer,\n        INT                 *coreBandwidth,\n        INT                 *inputBufferOffset,\n        INT                 *numChannels,\n        INT                 *sampleRate,\n        UINT                *downSampleFactor,\n        INT                 *frameLength,\n        AUDIO_OBJECT_TYPE    aot,\n        int                 *delay,\n        int                  transformFactor,\n        const int            headerPeriod,\n        ULONG                statesInitFlag\n        );\n\n/**\n * \\brief             Do delay line buffers housekeeping. To be called after each encoded audio frame.\n * \\param hEnvEnc     SBR Encoder handle.\n * \\param timeBuffer  Pointer to the encoder audio buffer.\n * \\return            0 on success, and non-zero if failed.\n */\nINT sbrEncoder_UpdateBuffers(HANDLE_SBR_ENCODER hEnvEnc,\n                             INT_PCM *timeBuffer\n                            );\n\n/**\n * \\brief               Close SBR encoder instance.\n * \\param phEbrEncoder  Handle of SBR encoder instance to be closed.\n * \\return              void\n */\nvoid sbrEncoder_Close(HANDLE_SBR_ENCODER *phEbrEncoder);\n\n/**\n * \\brief               Encode SBR data of one complete audio frame.\n * \\param hEnvEncoder   Handle of SBR encoder instance.\n * \\param samples       Time samples, always interleaved.\n * \\param timeInStride  Channel stride factor of samples buffer.\n * \\param sbrDataBits   Size of SBR payload in bits.\n * \\param sbrData       SBR payload.\n * \\return              0 on success, and non-zero if failed.\n */\nINT sbrEncoder_EncodeFrame(HANDLE_SBR_ENCODER  hEnvEncoder,\n                           INT_PCM            *samples,\n                           UINT                timeInStride,\n                           UINT                sbrDataBits[(8)],\n                           UCHAR               sbrData[(8)][MAX_PAYLOAD_SIZE]\n                          );\n\n/**\n * \\brief               Write SBR headers of one SBR element.\n * \\param sbrEncoder    Handle of the SBR encoder instance.\n * \\param hBs           Handle of bit stream handle to write SBR header to.\n * \\param element_index Index of the SBR element which header should be written.\n * \\param fSendHeaders  Flag indicating that the SBR encoder should send more headers in the SBR payload or not.\n * \\return              void\n */\nvoid sbrEncoder_GetHeader(HANDLE_SBR_ENCODER   sbrEncoder,\n                          HANDLE_FDK_BITSTREAM hBs,\n                          INT            element_index,\n                          int            fSendHeaders);\n\n/**\n * \\brief              SBR encoder bitrate estimation.\n * \\param hSbrEncoder  SBR encoder handle.\n * \\return             Estimated bitrate.\n */\nINT sbrEncoder_GetEstimateBitrate(HANDLE_SBR_ENCODER hSbrEncoder);\n\n\n/**\n * \\brief              Delay between input data and downsampled output data.\n * \\param hSbrEncoder  SBR encoder handle.\n * \\return             Delay.\n */\nINT sbrEncoder_GetInputDataDelay(HANDLE_SBR_ENCODER hSbrEncoder);\n\n/**\n * \\brief       Get decoder library version info.\n * \\param info  Pointer to an allocated LIB_INFO struct, where library info is written to.\n * \\return      0 on sucess.\n */\nINT sbrEncoder_GetLibInfo(LIB_INFO *info);\n\nvoid sbrPrintRAM(void);\n\nvoid sbrPrintROM(void);\n\n#ifdef __cplusplus\n        }\n#endif\n\n#endif /* ifndef __SBR_MAIN_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libSYS/include/FDK_audio.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2015 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/**************************  Fraunhofer IIS FDK SysLib  **********************\n\n   Author(s):   Manuel Jander\n\n******************************************************************************/\n\n/** \\file   FDK_audio.h\n *  \\brief  Global audio struct and constant definitions.\n */\n\n#ifndef FDK_AUDIO_H\n#define FDK_AUDIO_H\n\n#include \"machine_type.h\"\n#include \"genericStds.h\"\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\n/**\n * File format identifiers.\n */\ntypedef enum\n{\n  FF_UNKNOWN           = -1, /**< Unknown format.        */\n  FF_RAW               = 0,  /**< No container, bit stream data conveyed \"as is\". */\n\n  FF_MP4_3GPP          = 3,  /**< 3GPP file format.      */\n  FF_MP4_MP4F          = 4,  /**< MPEG-4 File format.     */\n\n  FF_RAWPACKETS        = 5,  /**< Proprietary raw packet file. */\n\n  FF_DRMCT             = 12  /**< Digital Radio Mondial (DRM30/DRM+) CT proprietary file format. */\n\n} FILE_FORMAT;\n\n/**\n * Transport type identifiers.\n */\ntypedef enum\n{\n  TT_UNKNOWN           = -1, /**< Unknown format.            */\n  TT_MP4_RAW           = 0,  /**< \"as is\" access units (packet based since there is obviously no sync layer) */\n  TT_MP4_ADIF          = 1,  /**< ADIF bitstream format.     */\n  TT_MP4_ADTS          = 2,  /**< ADTS bitstream format.     */\n\n  TT_MP4_LATM_MCP1     = 6,  /**< Audio Mux Elements with muxConfigPresent = 1 */\n  TT_MP4_LATM_MCP0     = 7,  /**< Audio Mux Elements with muxConfigPresent = 0, out of band StreamMuxConfig */\n\n  TT_MP4_LOAS          = 10, /**< Audio Sync Stream.         */\n\n  TT_DRM               = 12  /**< Digital Radio Mondial (DRM30/DRM+) bitstream format. */\n\n} TRANSPORT_TYPE;\n\n#define TT_IS_PACKET(x) \\\n       ( ((x) == TT_MP4_RAW) \\\n      || ((x) == TT_DRM) \\\n      || ((x) == TT_MP4_LATM_MCP0) \\\n      || ((x) == TT_MP4_LATM_MCP1) )\n\n/**\n * Audio Object Type definitions.\n */\ntypedef enum\n{\n  AOT_NONE             = -1,\n  AOT_NULL_OBJECT      = 0,\n  AOT_AAC_MAIN         = 1, /**< Main profile                              */\n  AOT_AAC_LC           = 2, /**< Low Complexity object                     */\n  AOT_AAC_SSR          = 3,\n  AOT_AAC_LTP          = 4,\n  AOT_SBR              = 5,\n  AOT_AAC_SCAL         = 6,\n  AOT_TWIN_VQ          = 7,\n  AOT_CELP             = 8,\n  AOT_HVXC             = 9,\n  AOT_RSVD_10          = 10, /**< (reserved)                                */\n  AOT_RSVD_11          = 11, /**< (reserved)                                */\n  AOT_TTSI             = 12, /**< TTSI Object                               */\n  AOT_MAIN_SYNTH       = 13, /**< Main Synthetic object                     */\n  AOT_WAV_TAB_SYNTH    = 14, /**< Wavetable Synthesis object                */\n  AOT_GEN_MIDI         = 15, /**< General MIDI object                       */\n  AOT_ALG_SYNTH_AUD_FX = 16, /**< Algorithmic Synthesis and Audio FX object */\n  AOT_ER_AAC_LC        = 17, /**< Error Resilient(ER) AAC Low Complexity    */\n  AOT_RSVD_18          = 18, /**< (reserved)                                */\n  AOT_ER_AAC_LTP       = 19, /**< Error Resilient(ER) AAC LTP object        */\n  AOT_ER_AAC_SCAL      = 20, /**< Error Resilient(ER) AAC Scalable object   */\n  AOT_ER_TWIN_VQ       = 21, /**< Error Resilient(ER) TwinVQ object         */\n  AOT_ER_BSAC          = 22, /**< Error Resilient(ER) BSAC object           */\n  AOT_ER_AAC_LD        = 23, /**< Error Resilient(ER) AAC LowDelay object   */\n  AOT_ER_CELP          = 24, /**< Error Resilient(ER) CELP object           */\n  AOT_ER_HVXC          = 25, /**< Error Resilient(ER) HVXC object           */\n  AOT_ER_HILN          = 26, /**< Error Resilient(ER) HILN object           */\n  AOT_ER_PARA          = 27, /**< Error Resilient(ER) Parametric object     */\n  AOT_RSVD_28          = 28, /**< might become SSC                          */\n  AOT_PS               = 29, /**< PS, Parametric Stereo (includes SBR)      */\n  AOT_MPEGS            = 30, /**< MPEG Surround                             */\n\n  AOT_ESCAPE           = 31, /**< Signal AOT uses more than 5 bits          */\n\n  AOT_MP3ONMP4_L1      = 32, /**< MPEG-Layer1 in mp4                        */\n  AOT_MP3ONMP4_L2      = 33, /**< MPEG-Layer2 in mp4                        */\n  AOT_MP3ONMP4_L3      = 34, /**< MPEG-Layer3 in mp4                        */\n  AOT_RSVD_35          = 35, /**< might become DST                          */\n  AOT_RSVD_36          = 36, /**< might become ALS                          */\n  AOT_AAC_SLS          = 37, /**< AAC + SLS                                 */\n  AOT_SLS              = 38, /**< SLS                                       */\n  AOT_ER_AAC_ELD       = 39, /**< AAC Enhanced Low Delay                    */\n\n  AOT_USAC             = 42, /**< USAC                                      */\n  AOT_SAOC             = 43, /**< SAOC                                      */\n  AOT_LD_MPEGS         = 44, /**< Low Delay MPEG Surround                   */\n\n  /* Pseudo AOTs */\n  AOT_DRM_AAC          = 143, /**< Virtual AOT for DRM (ER-AAC-SCAL without SBR)          */\n  AOT_DRM_SBR          = 144, /**< Virtual AOT for DRM (ER-AAC-SCAL with SBR)             */\n  AOT_DRM_MPEG_PS      = 145  /**< Virtual AOT for DRM (ER-AAC-SCAL with SBR and MPEG-PS) */\n\n} AUDIO_OBJECT_TYPE;\n\n#define CAN_DO_PS(aot) \\\n  ((aot) == AOT_AAC_LC \\\n|| (aot) == AOT_SBR \\\n|| (aot) == AOT_PS \\\n|| (aot) == AOT_ER_BSAC \\\n|| (aot) == AOT_DRM_AAC)\n\n#define IS_USAC(aot) \\\n  ((aot) == AOT_USAC)\n\n#define IS_LOWDELAY(aot) \\\n  ((aot) == AOT_ER_AAC_LD \\\n|| (aot) == AOT_ER_AAC_ELD)\n\n/** Channel Mode ( 1-7 equals MPEG channel configurations, others are arbitrary). */\ntypedef enum {\n  MODE_INVALID                  = -1,\n  MODE_UNKNOWN                  =  0,\n  MODE_1                        =  1,       /**< C */\n  MODE_2                        =  2,       /**< L+R */\n  MODE_1_2                      =  3,       /**< C, L+R */\n  MODE_1_2_1                    =  4,       /**< C, L+R, Rear */\n  MODE_1_2_2                    =  5,       /**< C, L+R, LS+RS */\n  MODE_1_2_2_1                  =  6,       /**< C, L+R, LS+RS, LFE */\n  MODE_1_2_2_2_1                =  7,       /**< C, LC+RC, L+R, LS+RS, LFE */\n\n\n  MODE_1_1                      = 16,       /**< 2 SCEs (dual mono) */\n  MODE_1_1_1_1                  = 17,       /**< 4 SCEs */\n  MODE_1_1_1_1_1_1              = 18,       /**< 6 SCEs */\n  MODE_1_1_1_1_1_1_1_1          = 19,       /**< 8 SCEs */\n  MODE_1_1_1_1_1_1_1_1_1_1_1_1  = 20,       /**< 12 SCEs */\n\n  MODE_2_2                      = 21,       /**< 2 CPEs */\n  MODE_2_2_2                    = 22,       /**< 3 CPEs */\n  MODE_2_2_2_2                  = 23,       /**< 4 CPEs */\n  MODE_2_2_2_2_2_2              = 24,       /**< 6 CPEs */\n\n  MODE_2_1                      = 30,       /**< CPE,SCE (ARIB standard B32) */\n\n  MODE_7_1_REAR_SURROUND        = 33,       /**< C, L+R, LS+RS, Lrear+Rrear, LFE */\n  MODE_7_1_FRONT_CENTER         = 34        /**< C, LC+RC, L+R, LS+RS, LFE */\n\n} CHANNEL_MODE;\n\n/**\n * Speaker description tags.\n * Do not change the enumeration values unless it keeps the following segmentation:\n * - Bit 0-3: Horizontal postion (0: none, 1: front, 2: side, 3: back, 4: lfe)\n * - Bit 4-7: Vertical position (0: normal, 1: top, 2: bottom)\n */\ntypedef enum {\n  ACT_NONE         = 0x00,\n  ACT_FRONT        = 0x01,  /*!< Front speaker position (at normal height) */\n  ACT_SIDE         = 0x02,  /*!< Side speaker position (at normal height) */\n  ACT_BACK         = 0x03,  /*!< Back speaker position (at normal height) */\n  ACT_LFE          = 0x04,  /*!< Low frequency effect speaker postion (front) */\n\n  ACT_TOP          = 0x10,  /*!< Top speaker area (for combination with speaker positions) */\n  ACT_FRONT_TOP    = 0x11,  /*!< Top front speaker = (ACT_FRONT|ACT_TOP) */\n  ACT_SIDE_TOP     = 0x12,  /*!< Top side speaker  = (ACT_SIDE |ACT_TOP) */\n  ACT_BACK_TOP     = 0x13,  /*!< Top back speaker  = (ACT_BACK |ACT_TOP) */\n\n  ACT_BOTTOM       = 0x20,  /*!< Bottom speaker area (for combination with speaker positions) */\n  ACT_FRONT_BOTTOM = 0x21,  /*!< Bottom front speaker = (ACT_FRONT|ACT_BOTTOM) */\n  ACT_SIDE_BOTTOM  = 0x22,  /*!< Bottom side speaker  = (ACT_SIDE |ACT_BOTTOM) */\n  ACT_BACK_BOTTOM  = 0x23   /*!< Bottom back speaker  = (ACT_BACK |ACT_BOTTOM) */\n\n} AUDIO_CHANNEL_TYPE;\n\ntypedef enum\n{\n  SIG_UNKNOWN                 = -1,\n  SIG_IMPLICIT                =  0,\n  SIG_EXPLICIT_BW_COMPATIBLE  =  1,\n  SIG_EXPLICIT_HIERARCHICAL   =  2\n\n} SBR_PS_SIGNALING;\n\n/**\n * Audio Codec flags.\n */\n#define AC_ER_VCB11     0x000001  /*!< aacSectionDataResilienceFlag     flag (from ASC): 1 means use virtual codebooks  */\n#define AC_ER_RVLC      0x000002  /*!< aacSpectralDataResilienceFlag     flag (from ASC): 1 means use huffman codeword reordering */\n#define AC_ER_HCR       0x000004  /*!< aacSectionDataResilienceFlag     flag (from ASC): 1 means use virtual codebooks  */\n#define AC_SCALABLE     0x000008  /*!< AAC Scalable*/\n#define AC_ELD          0x000010  /*!< AAC-ELD */\n#define AC_LD           0x000020  /*!< AAC-LD */\n#define AC_ER           0x000040  /*!< ER syntax */\n#define AC_BSAC         0x000080  /*!< BSAC */\n#define AC_USAC         0x000100  /*!< USAC */\n#define AC_USAC_TW      0x000200  /*!< USAC time warped filter bank is active */\n#define AC_USAC_NOISE   0x000400  /*!< USAC noise filling is active */\n#define AC_USAC_HBE     0x000800  /*!< USAC harmonic bandwidth extension is active */\n#define AC_RSVD50       0x001000  /*!< Rsvd50 */\n#define AC_SBR_PRESENT  0x002000  /*!< SBR present flag (from ASC)             */\n#define AC_SBRCRC       0x004000  /*!< SBR CRC present flag. Only relevant for AAC-ELD for now. */\n#define AC_PS_PRESENT   0x008000  /*!< PS present flag (from ASC or implicit)  */\n#define AC_MPS_PRESENT  0x010000  /*!< MPS present flag (from ASC or implicit) */\n#define AC_DRM          0x020000  /*!< DRM bit stream syntax */\n#define AC_INDEP        0x040000  /*!< Independency flag */\n#define AC_MPS_RES      0x080000  /*!< MPS residual individual channel data. */\n#define AC_DAB          0x800000  /*!< DAB bit stream syntax */\n#define AC_LD_MPS     0x01000000  /*!< Low Delay MPS. */\n\n\n/* CODER_CONFIG::flags */\n#define CC_MPEG_ID         0x00100000\n#define CC_IS_BASELAYER    0x00200000\n#define CC_PROTECTION      0x00400000\n#define CC_SBR             0x00800000\n#define CC_SBRCRC          0x00010000\n#define CC_RVLC            0x01000000\n#define CC_VCB11           0x02000000\n#define CC_HCR             0x04000000\n#define CC_PSEUDO_SURROUND 0x08000000\n#define CC_USAC_NOISE      0x10000000\n#define CC_USAC_TW         0x20000000\n#define CC_USAC_HBE        0x40000000\n\n/** Generic audio coder configuration structure. */\ntypedef struct {\n  AUDIO_OBJECT_TYPE aot;         /**< Audio Object Type (AOT).           */\n  AUDIO_OBJECT_TYPE extAOT;      /**< Extension Audio Object Type (SBR). */\n  CHANNEL_MODE channelMode;      /**< Channel mode.                      */\n  INT        samplingRate;       /**< Sampling rate.                     */\n  INT        extSamplingRate;    /**< Extended samplerate (SBR).         */\n  INT        bitRate;            /**< Average bitrate.                   */\n  int        samplesPerFrame;    /**< Number of PCM samples per codec frame and audio channel. */\n  int        noChannels;         /**< Number of audio channels.          */\n  int        bitsFrame;\n  int        nSubFrames;         /**< Amount of encoder subframes. 1 means no subframing.                                     */\n  int        BSACnumOfSubFrame;  /**< The number of the sub-frames which are grouped and transmitted in a super-frame (BSAC). */\n  int        BSAClayerLength;    /**< The average length of the large-step layers in bytes (BSAC).                            */\n  UINT       flags;              /**< flags */\n  UCHAR      matrixMixdownA;     /**< Matrix mixdown index to put into PCE. Default value 0 means no mixdown coefficient,\n                                      valid values are 1-4 which correspond to matrix_mixdown_idx 0-3. */\n  UCHAR      headerPeriod;       /**< Frame period for sending in band configuration buffers in the transport layer. */\n\n  UCHAR      stereoConfigIndex; /**< USAC MPS stereo mode */\n  UCHAR      sbrMode;           /**< USAC SBR mode */\n  SBR_PS_SIGNALING sbrSignaling;/**< 0: implicit signaling, 1: backwards compatible explicit signaling, 2: hierarcical explicit signaling */\n\n  UCHAR      sbrPresent;\n  UCHAR      psPresent;\n} CODER_CONFIG;\n\n/** MP4 Element IDs. */\ntypedef enum\n{\n  ID_NONE = -1,   /**< Invalid Element helper ID.             */\n  ID_SCE = 0,     /**< Single Channel Element.                */\n  ID_CPE = 1,     /**< Channel Pair Element.                  */\n  ID_CCE = 2,     /**< Coupling Channel Element.              */\n  ID_LFE = 3,     /**< LFE Channel Element.                   */\n  ID_DSE = 4,     /**< Currently one Data Stream Element for ancillary data is supported. */\n  ID_PCE = 5,     /**< Program Config Element.                */\n  ID_FIL = 6,     /**< Fill Element.                          */\n  ID_END = 7,     /**< Arnie (End Element = Terminator).      */\n  ID_EXT = 8,     /**< Extension Payload (ER only).           */\n  ID_SCAL = 9,    /**< AAC scalable element (ER only).        */\n  ID_LAST\n} MP4_ELEMENT_ID;\n\n#define IS_CHANNEL_ELEMENT(elementId) \\\n  ((elementId) == ID_SCE \\\n|| (elementId) == ID_CPE \\\n|| (elementId) == ID_LFE)\n\n#define EXT_ID_BITS 4  /**< Size in bits of extension payload type tags. */\n\n/** Extension payload types. */\ntypedef enum {\n  EXT_FIL           = 0x00,\n  EXT_FILL_DATA     = 0x01,\n  EXT_DATA_ELEMENT  = 0x02,\n  EXT_DATA_LENGTH   = 0x03,\n  EXT_LDSAC_DATA    = 0x09,\n  EXT_SAOC_DATA     = 0x0a,\n  EXT_DYNAMIC_RANGE = 0x0b,\n  EXT_SAC_DATA      = 0x0c,\n  EXT_SBR_DATA      = 0x0d,\n  EXT_SBR_DATA_CRC  = 0x0e\n} EXT_PAYLOAD_TYPE;\n\n\n/**\n * Proprietary raw packet file configuration data type identifier.\n */\ntypedef enum\n{\n  TC_NOTHING = 0,     /* No configuration available -> in-band configuration.   */\n  TC_RAW_ASC,         /* Configuration data field is a raw AudioSpecificConfig. */\n  TC_RAW_SMC,         /* Configuration data field is a raw StreamMuxConfig.     */\n  TC_RAW_SDC          /* Configuration data field is a raw Drm SDC.             */\n\n} TP_CONFIG_TYPE;\n\n/*\n * ##############################################################################################\n * Library identification and error handling\n * ##############################################################################################\n */\n/* \\cond */\n#define MODULE_ID_MASK  (0x000000ff)\n#define MODULE_ID_SHIFT (24)\n\ntypedef enum {\n  FDK_NONE   = 0,\n  FDK_TOOLS  = 1,\n  FDK_SYSLIB = 2,\n  FDK_AACDEC = 3,\n  FDK_AACENC = 4,\n  FDK_SBRDEC = 5,\n  FDK_SBRENC = 6,\n  FDK_TPDEC  = 7,\n  FDK_TPENC  = 8,\n  FDK_MPSDEC = 9,\n  FDK_MPEGFILEREAD  = 10,\n  FDK_MPEGFILEWRITE = 11,\n  FDK_MP2DEC = 12,\n  FDK_DABDEC = 13,\n  FDK_DABPARSE = 14,\n  FDK_DRMDEC = 15,\n  FDK_DRMPARSE = 16,\n  FDK_AACLDENC = 17,\n  FDK_MP2ENC = 18,\n  FDK_MP3ENC = 19,\n  FDK_MP3DEC = 20,\n  FDK_MP3HEADPHONE = 21,\n  FDK_MP3SDEC = 22,\n  FDK_MP3SENC = 23,\n  FDK_EAEC    = 24,\n  FDK_DABENC  = 25,\n  FDK_DMBDEC  = 26,\n  FDK_FDREVERB = 27,\n  FDK_DRMENC  = 28,\n  FDK_METADATATRANSCODER = 29,\n  FDK_AC3DEC = 30,\n  FDK_PCMDMX = 31,\n\n  FDK_MODULE_LAST\n\n} FDK_MODULE_ID;\n\n/* AAC capability flags */\n#define CAPF_AAC_LC           0x00000001  /**< Support flag for AAC Low Complexity.                             */\n#define CAPF_ER_AAC_LD        0x00000002  /**< Support flag for AAC Low Delay with Error Resilience tools.      */\n#define CAPF_ER_AAC_SCAL      0x00000004  /**< Support flag for AAC Scalable.                                   */\n#define CAPF_ER_AAC_LC        0x00000008  /**< Support flag for AAC Low Complexity with Error Resilience tools. */\n#define CAPF_AAC_480          0x00000010  /**< Support flag for AAC with 480 framelength.  */\n#define CAPF_AAC_512          0x00000020  /**< Support flag for AAC with 512 framelength.  */\n#define CAPF_AAC_960          0x00000040  /**< Support flag for AAC with 960 framelength.  */\n#define CAPF_AAC_1024         0x00000080  /**< Support flag for AAC with 1024 framelength. */\n#define CAPF_AAC_HCR          0x00000100  /**< Support flag for AAC with Huffman Codeword Reordering.    */\n#define CAPF_AAC_VCB11        0x00000200  /**< Support flag for AAC Virtual Codebook 11.    */\n#define CAPF_AAC_RVLC         0x00000400  /**< Support flag for AAC Reversible Variable Length Coding.   */\n#define CAPF_AAC_MPEG4        0x00000800  /**< Support flag for MPEG file format.                           */\n#define CAPF_AAC_DRC          0x00001000  /**< Support flag for AAC Dynamic Range Control. */\n#define CAPF_AAC_CONCEALMENT  0x00002000  /**< Support flag for AAC concealment.           */\n#define CAPF_AAC_DRM_BSFORMAT 0x00004000  /**< Support flag for AAC DRM bistream format.                         */\n#define CAPF_ER_AAC_ELD       0x00008000  /**< Support flag for AAC Enhanced Low Delay with Error Resilience tools.  */\n#define CAPF_ER_AAC_BSAC      0x00010000  /**< Support flag for AAC BSAC.                           */\n#define CAPF_AAC_SUPERFRAMING 0x00020000  /**< Support flag for AAC Superframing.                           */\n\n/* Transport capability flags */\n#define CAPF_ADTS             0x00000001  /**< Support flag for ADTS transport format.        */\n#define CAPF_ADIF             0x00000002  /**< Support flag for ADIF transport format.        */\n#define CAPF_LATM             0x00000004  /**< Support flag for LATM transport format.        */\n#define CAPF_LOAS             0x00000008  /**< Support flag for LOAS transport format.        */\n#define CAPF_RAWPACKETS       0x00000010  /**< Support flag for RAW PACKETS transport format. */\n#define CAPF_DRM              0x00000020  /**< Support flag for DRM/DRM+ transport format.    */\n#define CAPF_RSVD50           0x00000040  /**< Support flag for RSVD50 transport format       */\n\n/* SBR capability flags */\n#define CAPF_SBR_LP           0x00000001  /**< Support flag for SBR Low Power mode.           */\n#define CAPF_SBR_HQ           0x00000002  /**< Support flag for SBR High Quality mode.        */\n#define CAPF_SBR_DRM_BS       0x00000004  /**< Support flag for                               */\n#define CAPF_SBR_CONCEALMENT  0x00000008  /**< Support flag for SBR concealment.              */\n#define CAPF_SBR_DRC          0x00000010  /**< Support flag for SBR Dynamic Range Control.    */\n#define CAPF_SBR_PS_MPEG      0x00000020  /**< Support flag for MPEG Parametric Stereo.       */\n#define CAPF_SBR_PS_DRM       0x00000040  /**< Support flag for DRM Parametric Stereo.        */\n\n/* MP2 encoder capability flags */\n#define CAPF_MP2ENC_SS        0x00000001  /**< Support flag for Seamless Switching.           */\n#define CAPF_MP2ENC_DAB       0x00000002  /**< Support flag for Layer2 DAB.                   */\n\n/* DAB capability flags */\n#define CAPF_DAB_MP2          0x00000001  /**< Support flag for Layer2 DAB.                   */\n#define CAPF_DAB_AAC          0x00000002  /**< Support flag for DAB+ (HE-AAC v2).             */\n#define CAPF_DAB_PAD          0x00000004  /**< Support flag for PAD extraction.               */\n#define CAPF_DAB_DRC          0x00000008  /**< Support flag for Dynamic Range Control.        */\n#define CAPF_DAB_SURROUND     0x00000010  /**< Support flag for DAB Surround (MPS).           */\n\n/* DMB capability flags */\n#define CAPF_DMB_BSAC         0x00000001  /**< Support flag for ER AAC BSAC.                  */\n#define CAPF_DMB_DRC          0x00000008  /**< Support flag for Dynamic Range Control.        */\n#define CAPF_DMB_SURROUND     0x00000010  /**< Support flag for DMB Surround (MPS).           */\n\n/* PCM up/downmmix capability flags */\n#define CAPF_DMX_BLIND        0x00000001  /**< Support flag for blind downmixing.             */\n#define CAPF_DMX_PCE          0x00000002  /**< Support flag for guided downmix with data from MPEG-2/4 Program Config Elements (PCE). */\n#define CAPF_DMX_ARIB         0x00000004  /**< Support flag for PCE guided downmix with slightly different equations and levels to fulfill ARIB standard. */\n#define CAPF_DMX_DVB          0x00000008  /**< Support flag for guided downmix with data from DVB ancillary data fields. */\n#define CAPF_DMX_CH_EXP       0x00000010  /**< Support flag for simple upmixing by dublicating channels or adding zero channels. */\n/* \\endcond */\n\n\n/*\n * ##############################################################################################\n * Library versioning\n * ##############################################################################################\n */\n\n/**\n * Convert each member of version numbers to one single numeric version representation.\n * \\param lev0  1st level of version number.\n * \\param lev1  2nd level of version number.\n * \\param lev2  3rd level of version number.\n  */\n#define LIB_VERSION(lev0, lev1, lev2) ((lev0<<24 & 0xff000000) | \\\n                                       (lev1<<16 & 0x00ff0000) | \\\n                                       (lev2<<8  & 0x0000ff00))\n\n/**\n *  Build text string of version.\n */\n#define LIB_VERSION_STRING(info) FDKsprintf((info)->versionStr, \"%d.%d.%d\", (((info)->version >> 24) & 0xff), (((info)->version >> 16) & 0xff), (((info)->version >> 8 ) & 0xff))\n\n/**\n *  Library information.\n */\ntypedef struct LIB_INFO\n{\n  const char* title;\n  const char* build_date;\n  const char* build_time;\n  FDK_MODULE_ID module_id;\n  INT version;\n  UINT  flags;\n  char versionStr[32];\n} LIB_INFO;\n\n/** Initialize library info. */\nstatic inline void FDKinitLibInfo( LIB_INFO* info )\n{\n  int i;\n\n  for (i = 0; i < FDK_MODULE_LAST; i++) {\n    info[i].module_id = FDK_NONE;\n  }\n}\n\n/** Aquire supported features of library. */\nstatic inline UINT FDKlibInfo_getCapabilities( const LIB_INFO* info, FDK_MODULE_ID module_id )\n{\n  int i;\n\n  for (i=0; i\n  #ifndef _tstof  /* For Visual Studio 6 */\n    #ifdef _UNICODE\n      #include \n      #define _tstof(x)   (float) wcstod(x, NULL)  /* For Visual Studio 6 */\n    #else\n      #define _tstof      atof\n    #endif\n  #endif\n\n  #ifndef _tstol  /* For Visual Studio 6 */\n    #ifdef _UNICODE\n      #define _tstol      _wtol\n    #else\n      #define _tstol      atol\n    #endif\n  #endif\n\n  #ifndef _tstoi  /* For Visual Studio 6 */\n    #ifdef _UNICODE\n      #define _tstoi      _wtoi\n    #else\n      #define _tstoi      atoi\n    #endif\n  #endif\n\n  #ifndef TEXTCHAR\n    #define TEXTCHAR char\n  #endif\n\n  #ifndef _TEXT\n    #define _TEXT\n  #endif\n\n#else /* WIN32 */\n\n    #define TEXTCHAR char\n    #define _tcslen(a)  FDKstrlen(a)\n    #define _tcscpy     strcpy\n    #define _tcscmp     FDKstrcmp\n    #define _tcsncmp    FDKstrncmp\n    #define _tscanf     scanf\n    #define _TEXT(x)    x\n    #define _tfopen     fopen\n    #define _ftprintf   fprintf\n    #define _tcsncpy    FDKstrncpy\n    #define _tstof      FDKatof\n    #define _tstol      FDKatol\n    #define _tstoi      FDKatoi\n    #define _tcstol     strtol\n    #define _istdigit   isdigit\n#endif /* WIN32 */\n\n/* \\endcond */\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\n/**\n *  Scans argc, argv and a scanf style format string for parameters and stores the\n *  values in the variable number of pointers passed to the function.\n\n For example:\n   \\code\n   #define ARG_PARAM  \"(-a %d) (-v %1)\"\n   #define ARG_VALUE &config->aot, &verbose\n   int nFoundArgs = IIS_ScanCmdl(argc, argv, ARG_PARAM, ARG_VALUE);\n   \\endcode\n   wheras the wild-cards (\\%d, \\%1, ..) define the data type of the argument:\n\t- \\%1 boolean (e. g. -x)\n\t- \\%d integer (e. g. -x 23)\n\t- \\%f float (e. g. -x 3.4)\n\t- \\%y double (e. g. -x 31415926535897932384626433832795028841971693993751)\n\t- \\%s string (e. g. -x \"file.dat\")\n\t- \\%u unsigned character (e. g. -x 3)\n\t- \\%c signed character (e. g. -x -3)\n    More examples on how to use it are located in every (encoder/decoder) example framework.\n\n * \\param argc      Number of arguments.\n * \\param argv      Complete character string of the command line arguments.\n * \\param pReqArgs  A list of parameters and a corresponding list of memory addresses to\n *                  assign each parameter to.\n *\n * \\return  Number of found arguments.\n */\nINT IIS_ScanCmdl(INT argc, TEXTCHAR* argv[], const TEXTCHAR* pReqArgs, ...);\n\n#ifdef __cplusplus\n}\n#endif\n\n/**\n *  Reads a text file, assembles argc and argv parameters for each text line\n *  and calls the given function for each set of argc, argv parameters.\n *\n * \\param param_filename  Name of text file that should be parsed.\n * \\param pFunction       Pointer to function that should be called for every text line found.\n *\n * \\return  0 on success, 1 on failure.\n */\nINT IIS_ProcessCmdlList(const TEXTCHAR* param_filename, int (*pFunction)(int, TEXTCHAR**));\n\n\n#endif /* __PARSER_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libSYS/include/conv_string.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/**************************  Fraunhofer IIS FDK SysLib  **********************\n\n   Author(s):\n\n******************************************************************************/\n\n/** \\file   conv_string.h\n *  \\brief  String conversion functions.\n */\n\n#ifndef _CONV_STRING_H\n#define _CONV_STRING_H\n\n\n\n#include \"genericStds.h\"\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\n/**\n * \\brief                Convert a bitbuffer to a hex string.\n * \\param string         Hex string.\n * \\param charBuf        Input buffer that has to be converted.\n * \\param charBufLength  Size of the input buffer.\n * \\return               Error code.\n */\nINT charBuf2HexString(char *string, UCHAR *charBuf, INT charBufLength);\n\n/**\n * \\brief                Convert a hex string to bits.\n * \\param string         Hex string that has to be converted.\n * \\param charBuf        Output buffer holding the bits, will be filled up with zeros.\n * \\param charBufLength  Size of the output buffer.\n * \\return               Error code.\n */\nINT hexString2CharBuf(const char *string, UCHAR *charBuf, UINT charBufLength);\n\n/**\n * \\brief    Convert a character representing a hex sign to the appropriate value.\n * \\param c  Character that has to be converted.\n * \\return   Converted value (value between 0 and 15), if 16, an error has occured.\n */\nUCHAR hexChar2Dec(const char c);\n\n#ifdef __cplusplus\n}\n#endif\n\n\n#endif /* _CONV_STRING_H */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libSYS/include/genericStds.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/**************************  Fraunhofer IIS FDK SysLib  **********************\n\n   Author(s):\n\n******************************************************************************/\n\n/** \\file   genericStds.h\n    \\brief  Generic Run-Time Support function wrappers and heap allocation monitoring.\n */\n\n#if !defined(__GENERICSTDS_H__)\n#define __GENERICSTDS_H__\n\n#include \"machine_type.h\"\n\n\n/* Always increase verbosity of memory allocation in case of a debug built. DEBUG is defined globally in that case. */\n#if defined(DEBUG) || defined(FDK_DEBUG)\n//#define MEMORY_MEASUREMENT\n#endif\n\n#ifndef M_PI\n  #define M_PI   3.14159265358979323846  /*! Pi. Only used in example projects. */\n#endif\n\n\n/* #define _CRT_SECURE_NO_DEPRECATE */\n\n\n/**\n * Identifiers for various memory locations. They are used along with memory allocation\n * functions like FDKcalloc_L() to specify the requested memory's location.\n */\ntypedef enum {\n  /* Internal */\n  SECT_DATA_L1 = 0x2000,\n  SECT_DATA_L2,\n  SECT_DATA_L1_A,\n  SECT_DATA_L1_B,\n  SECT_CONSTDATA_L1,\n\n  /* External */\n  SECT_DATA_EXTERN = 0x4000,\n  SECT_CONSTDATA_EXTERN\n\n} MEMORY_SECTION;\n\n\n/**\n * The H_ prefix indicates header file version, the C_* prefix indicates the corresponding\n * object version.\n *\n * Declaring memory areas requires to specify a unique name and a data type. Use the H_ macro\n * for this purpose inside a header file.\n *\n * For defining a memory area your require additionally one or two sizes, depending if the\n * memory should be organized into one or two dimensions.\n *\n * The macros containing the keyword AALLOC instead of ALLOC also do take care of returning\n * aligned memory addresses (beyond the natural alignment of its type). The preprocesor macro\n * ::ALIGNMENT_DEFAULT indicates the aligment to be used (this is hardware specific).\n *\n * The _L suffix indicates that the memory will be located in a specific section. This is\n * useful to allocate critical memory section into fast internal SRAM for example.\n *\n */\n\n#define H_ALLOC_MEM(name,type)          type * Get ## name(int n=0); void Free ## name(type** p); \\\n                                        UINT GetRequiredMem ## name(void);\n\n/** See #H_ALLOC_MEM for description. */\n#define H_ALLOC_MEM_OVERLAY(name,type)  type * Get ## name(int n=0); void Free ## name(type** p); \\\n                                        UINT GetRequiredMem ## name(void);\n\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_ALLOC_MEM(name,type,num) \\\n    type * Get ## name(int n) { FDK_ASSERT((n) == 0); return ((type*)FDKcalloc(num, sizeof(type))); } \\\n    void Free ## name(type** p) { if (p != NULL) { FDKfree(*p); *p=NULL; } } \\\n    UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((num) * sizeof(type)); }\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_ALLOC_MEM_STATIC(name,type,num) \\\n    static type * Get ## name(int n) { FDK_ASSERT((n) == 0); return ((type*)FDKcalloc(num, sizeof(type))); } \\\n    static void Free ## name(type** p) { if (p != NULL) { FDKfree(*p); *p=NULL; } } \\\n    static UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((num) * sizeof(type)); }\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_ALLOC_MEM2(name,type,n1,n2) \\\n    type * Get ## name (int n) { FDK_ASSERT((n) < (n2)); return ((type*)FDKcalloc(n1, sizeof(type))); } \\\n    void Free ## name(type** p) { if (p != NULL) { FDKfree(*p); *p=NULL; } } \\\n    UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((n1) * sizeof(type)) * (n2); }\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_AALLOC_MEM(name,type,num) \\\n    type * Get ## name(int n) { FDK_ASSERT((n) == 0); return ((type*)FDKaalloc((num)*sizeof(type), ALIGNMENT_DEFAULT)); } \\\n    void Free ## name(type** p) { if (p != NULL) { FDKafree(*p); *p=NULL; } } \\\n    UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((num) * sizeof(type) + ALIGNMENT_DEFAULT + sizeof(void *)); }\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_AALLOC_MEM2(name,type,n1,n2) \\\n    type * Get ## name (int n) { FDK_ASSERT((n) < (n2)); return ((type*)FDKaalloc((n1)*sizeof(type), ALIGNMENT_DEFAULT)); } \\\n    void Free ## name(type** p) { if (p != NULL) { FDKafree(*p); *p=NULL; } } \\\n    UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((n1) * sizeof(type) + ALIGNMENT_DEFAULT + sizeof(void *)) * (n2); }\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_ALLOC_MEM_L(name,type,num,s) \\\n    type * Get ## name(int n) { FDK_ASSERT((n) == 0); return ((type*)FDKcalloc_L(num, sizeof(type), s)); } \\\n    void Free ## name(type** p) { if (p != NULL) { FDKfree_L(*p); *p=NULL; } } \\\n    UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((num) * sizeof(type)); }\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_ALLOC_MEM2_L(name,type,n1,n2,s) \\\n    type * Get ## name (int n) { FDK_ASSERT((n) < (n2)); return (type*)FDKcalloc_L(n1, sizeof(type), s); } \\\n    void Free ## name(type** p) { if (p != NULL) { FDKfree_L(*p); *p=NULL; } } \\\n    UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((n1) * sizeof(type)) * (n2); }\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_AALLOC_MEM_L(name,type,num,s) \\\n    type * Get ## name(int n) { FDK_ASSERT((n) == 0); return ((type*)FDKaalloc_L((num)*sizeof(type), ALIGNMENT_DEFAULT, s)); } \\\n    void Free ## name(type** p) { if (p != NULL) { FDKafree_L(*p); *p=NULL; } } \\\n    UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((num) * sizeof(type) + ALIGNMENT_DEFAULT + sizeof(void *)); }\n\n  /** See #H_ALLOC_MEM for description. */\n  #define C_AALLOC_MEM2_L(name,type,n1,n2,s) \\\n    type * Get ## name (int n) { FDK_ASSERT((n) < (n2)); return ((type*)FDKaalloc_L((n1)*sizeof(type), ALIGNMENT_DEFAULT, s)); } \\\n    void Free ## name(type** p) { if (p != NULL) { FDKafree_L(*p); *p=NULL; } } \\\n    UINT GetRequiredMem ## name(void) { return ALGN_SIZE_EXTRES((n1) * sizeof(type) + ALIGNMENT_DEFAULT + sizeof(void *)) * (n2); }\n\n/** See #H_ALLOC_MEM_OVERLAY for description. */\n\n\n  #define C_ALLOC_MEM_OVERLAY(name,type,num,sect,tag) C_AALLOC_MEM_L(name,type,num,sect)\n\n\n   #define C_AALLOC_SCRATCH_START(name,type,n) \\\n     type _ ## name[(n)+(ALIGNMENT_DEFAULT+sizeof(type)-1)]; \\\n     type * name = (type*)ALIGN_PTR(_ ## name); \\\n\n   #define C_ALLOC_SCRATCH_START(name,type,n) \\\n     type name[n];\n\n   #define C_AALLOC_SCRATCH_END(name,type,n)\n   #define C_ALLOC_SCRATCH_END(name,type,n)\n\n\n/*--------------------------------------------\n * Runtime support declarations\n *---------------------------------------------*/\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define USE_BUILTIN_STRING_FUNCTIONS\n#include \"hal_trace.h\"\n\n#define FDKprintf(num,fmt, ...) hal_trace_printf(num,fmt,##__VA_ARGS__)\n#define FDKprintfErr(num,fmt,...) hal_trace_printf(num,fmt,##__VA_ARGS__)\n#define FDKfprintf(stream, fmt, ...) hal_trace_printf(0,fmt, ##__VA_ARGS__)\n#define FDKsprintf(str, fmt, ...) hal_trace_printf(0,fmt, ##__VA_ARGS__)\n#if 0\n/** printf() using stdout. If ::ARCH_WA_FLUSH_CONSOLE defined, a flush is  done additionally after printf(). */\nvoid FDKprintf    ( const char* szFmt, ...);\n\n/** printf() using stderr. If ::ARCH_WA_FLUSH_CONSOLE defined, a flush is done additionally after printf(). */\nvoid FDKprintfErr ( const char* szFmt, ...);\n\n/** Wrapper for 's getchar(). */\nint FDKgetchar(void);\n\nINT  FDKfprintf(void  *stream,  const  char *format, ...);\nINT  FDKsprintf(char *str, const char *format, ...);\n#endif\n\n\nconst char *FDKstrchr(const char *s, INT c);\nconst char *FDKstrstr(const char *haystack, const char *needle);\nchar *FDKstrcpy(char *dest, const char *src);\nchar *FDKstrncpy(char *dest, const char *src, const UINT n);\n\n#define FDK_MAX_OVERLAYS 8   /**< Maximum number of memory overlays. */\n\n\nvoid *FDKcalloc (const UINT n, const UINT size);\nvoid *FDKmalloc (const UINT size);\nvoid  FDKfree   (void *ptr);\n\n/**\n *  Allocate and clear an aligned memory area. Use FDKafree() instead of FDKfree() for these memory areas.\n *\n * \\param size       Size of requested memory in bytes.\n * \\param alignment  Alignment of requested memory in bytes.\n * \\return           Pointer to allocated memory.\n */\nvoid *FDKaalloc (const UINT size, const UINT alignment);\n\n/**\n *  Free an aligned memory area.\n *\n * \\param ptr  Pointer to be freed.\n * \\return     void\n */\nvoid FDKafree (void *ptr);\n\n\n/**\n *  Allocate memory in a specific memory section.\n *  Requests can be made for internal or external memory. If internal memory is\n *  requested, FDKcalloc_L() first tries to use L1 memory, which sizes are defined\n *  by ::DATA_L1_A_SIZE and ::DATA_L1_B_SIZE. If no L1 memory is available, then\n *  FDKcalloc_L() tries to use L2 memory. If that fails as well, the requested\n *  memory is allocated at an extern location using the fallback FDKcalloc().\n *\n * \\param n     See MSDN documentation on calloc().\n * \\param size  See MSDN documentation on calloc().\n * \\param s     Memory section.\n * \\return      See MSDN documentation on calloc().\n */\nvoid *FDKcalloc_L(const UINT n, const UINT size, MEMORY_SECTION s);\n\n/**\n *  Allocate aligned memory in a specific memory section.\n *  See FDKcalloc_L() description for details - same applies here.\n */\nvoid *FDKaalloc_L(const UINT size, const UINT alignment, MEMORY_SECTION s);\n\n/**\n *  Free memory that was allocated in a specific memory section.\n */\nvoid  FDKfree_L(void *ptr);\n\n/**\n *  Free aligned memory that was allocated in a specific memory section.\n */\nvoid  FDKafree_L(void *ptr);\n\n#include \n#include \n#include \n#include \n#include \n\n/*---------------------------------------------------------------------------------------\n * FUNCTION:    FDKmemcpy\n * DESCRIPTION: - copies memory from \"src\" to \"dst\" with length \"size\" bytes\n *              - compiled with FDK_DEBUG will give you warnings\n *---------------------------------------------------------------------------------------*/\ninline void FDKmemcpy(void *dst, const void *src, const UINT size)\n{\n\n  /* do the copy */\n  memcpy(dst, src, size);\n}\n\ninline void FDKmemmove(void *dst, const void *src, const UINT size)     { memmove(dst, src, size); }\ninline void FDKmemset(void *memPtr, const INT value, const UINT size)   { memset(memPtr, value, size); }\ninline void FDKmemclear(void *memPtr, const UINT size)                  { FDKmemset(memPtr,0,size); }\ninline UINT FDKstrlen(const char *s)                                    { return (UINT)strlen(s); }\n\n/* Compare function wrappers */\ninline INT FDKmemcmp(const void *s1, const void *s2, const UINT size)  { return memcmp(s1, s2, size); }\ninline INT FDKstrcmp(const char *s1, const char *s2)                   { return strcmp(s1, s2); }\ninline INT FDKstrncmp(const char *s1, const char *s2, const UINT size) { return strncmp(s1, s2, size); }\n\n\n/* Math function wrappers. Only intended for compatibility, not to be highly optimized. */\n\ninline INT FDKabs(INT j) { return abs(j); }\ninline double FDKfabs(double x) { return fabs(x); }\ninline double FDKpow(double x, double y) { return pow(x,y); }\ninline double FDKsqrt(double x) { return sqrt(x); }\ninline double FDKatan(double x) { return atan(x); }\ninline double FDKlog(double x) { return log(x); }\ninline double FDKsin(double x) { return sin(x); }\ninline double FDKcos(double x) { return cos(x); }\ninline double FDKexp(double x) { return exp(x); }\ninline double FDKatan2(double y, double x) { return atan2(y, x); }\ninline double FDKacos(double x) { return acos(x); }\ninline double FDKtan(double x) { return tan(x); }\ninline double FDKfloor(double x) { return floor(x); }\ninline double FDKceil(double x) { return ceil(x); }\n\ninline INT   FDKatoi(const char *nptr) { return atoi(nptr); }\ninline long  FDKatol(const char *nptr) { return atol(nptr); }\ninline float FDKatof(const char *nptr) { return (float)atof(nptr); }\n\n\n#define FDKmax(a,b) ( (a) > (b) ? (a):(b))\n#define FDKmin(a,b) ( (a) < (b) ? (a):(b))\n\n#define FDK_INT_MAX ((INT)0x7FFFFFFF)\n#define FDK_INT_MIN ((INT)0x80000000)\n\n/* Math function wrappers. Only intended for compatibility, not to be highly optimized. */\n/* Used for debugging, dev code .. */\n\n#define FDKlog2(a) (FDKlog(a)*1.442695041) /* log(2.0) = 1.442695041 */\n#define FDKlog10(a) (FDKlog(a)*0.434294482) /* 1.0/log(10.0) = 0.434294482 */\n/* LONG LONG FDKatoll(const char *nptr); */\n/* LONG LONG FDKatoq(const char *nptr); */\n\n\n\n\n/* FILE I/O */\n\n/*!\n *  Check platform for endianess.\n *\n * \\return  1 if platform is little endian, non-1 if platform is big endian.\n */\n#ifdef __cplusplus\ninline\n#else\nstatic\n#endif\nint IS_LITTLE_ENDIAN(void) {\n  int __dummy = 1;\n  return ( *( (UCHAR*)(&(__dummy) ) ) );\n}\n\n/*!\n *  Convert input value to little endian format.\n *\n * \\param val  Value to be converted. It may be in both big or little endian.\n * \\return     Value in little endian format.\n */\n#define TO_LITTLE_ENDIAN(val) \\\n  ( (IS_LITTLE_ENDIAN()) ? \\\n     (val) \\\n   : ( (((val) & 0xff) << 24) || (((val) & 0xff00)<< 8) || (((val) & 0xff0000)>>8) || (((val) & 0xff000000) >> 24) ) )\n\n\n/*!\n * \\fn     FDKFILE *FDKfopen(const char *filename, const char *mode);\n *         Standard fopen() wrapper.\n * \\fn     INT FDKfclose(FDKFILE *FP);\n *         Standard fclose() wrapper.\n * \\fn     INT FDKfseek(FDKFILE *FP, LONG OFFSET, int WHENCE);\n *         Standard fseek() wrapper.\n * \\fn     INT FDKftell(FDKFILE *FP);\n *         Standard ftell() wrapper.\n * \\fn     INT FDKfflush(FDKFILE *fp);\n *         Standard fflush() wrapper.\n * \\fn     UINT FDKfwrite(void *ptrf, INT size, UINT nmemb, FDKFILE *fp);\n *         Standard fwrite() wrapper.\n * \\fn     UINT FDKfread(void *dst, INT size, UINT nmemb, FDKFILE *fp);\n *         Standard fread() wrapper.\n */\ntypedef void FDKFILE;\nextern const INT FDKSEEK_SET, FDKSEEK_CUR, FDKSEEK_END;\n\nFDKFILE *FDKfopen(const char *filename, const char *mode);\nINT FDKfclose(FDKFILE *FP);\nINT FDKfseek(FDKFILE *FP, LONG OFFSET, int WHENCE);\nINT FDKftell(FDKFILE *FP);\nINT FDKfflush(FDKFILE *fp);\nUINT FDKfwrite(void *ptrf, INT size, UINT nmemb, FDKFILE *fp);\nUINT FDKfread(void *dst, INT size, UINT nmemb, FDKFILE *fp);\nchar* FDKfgets(void *dst, INT size, FDKFILE *fp);\nvoid FDKrewind(FDKFILE *fp);\nINT FDKfeof(FDKFILE *fp);\n\n/**\n * \\brief        Write each member in little endian order. Convert automatically to host endianess.\n * \\param ptrf   Pointer to memory where to read data from.\n * \\param size   Size of each item to be written.\n * \\param nmemb  Number of items to be written.\n * \\param fp     File pointer of type FDKFILE.\n * \\return       Number of items read on success and fread() error on failure.\n */\nUINT FDKfwrite_EL(void *ptrf, INT size, UINT nmemb, FDKFILE *fp);\n\n/**\n * \\brief        Read variable of size \"size\" as little endian. Convert automatically to host endianess.\n *                4-byte alignment is enforced for 24 bit data, at 32 bit full scale.\n * \\param dst    Pointer to memory where to store data into.\n * \\param size   Size of each item to be read.\n * \\param nmemb  Number of items to be read.\n * \\param fp     File pointer of type FDKFILE.\n * \\return       Number of items read on success and fread() error on failure.\n */\nUINT FDKfread_EL(void *dst, INT size, UINT nmemb, FDKFILE *fp);\n\n\n/**\n * \\brief  Print FDK software disclaimer.\n */\nvoid FDKprintDisclaimer(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* __GENERICSTDS_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libSYS/include/machine_type.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/**************************  Fraunhofer IIS FDK SysLib  **********************\n\n   Author(s):\n\n******************************************************************************/\n\n/** \\file   machine_type.h\n *  \\brief  Type defines for various processors and compiler tools.\n */\n\n#if !defined(__MACHINE_TYPE_H__)\n#define __MACHINE_TYPE_H__\n\n\n/* Library calling convention spec. __cdecl and friends might be added here as required. */\n  #define LINKSPEC_H\n  #define LINKSPEC_CPP\n\n\n/**\n *  collate all corresponding compiler specific macros to detect a debug build, and set the DEBUG macro if that is the case.\n */\n#if defined(_DEBUG)\n#define DEBUG\n#endif\n\n\n/* for doxygen the following docu parts must be separated */\n/** \\var  SCHAR\n *        Data type representing at least 1 byte signed integer on all supported platforms.\n */\n/** \\var  UCHAR\n *        Data type representing at least 1 byte unsigned integer on all supported platforms.\n */\n/** \\var  INT\n *        Data type representing at least 4 byte signed integer on all supported platforms.\n */\n/** \\var  UINT\n *        Data type representing at least 4 byte unsigned integer on all supported platforms.\n */\n/** \\var  LONG\n *        Data type representing 4 byte signed integer on all supported platforms.\n */\n/** \\var  ULONG\n *        Data type representing 4 byte unsigned integer on all supported platforms.\n */\n/** \\var  SHORT\n *        Data type representing 2 byte signed integer on all supported platforms.\n */\n/** \\var  USHORT\n *        Data type representing 2 byte unsigned integer on all supported platforms.\n */\n/** \\var  INT64\n *        Data type representing 8 byte signed integer on all supported platforms.\n */\n/** \\var  UINT64\n *        Data type representing 8 byte unsigned integer on all supported platforms.\n */\n/** \\def  SHORT_BITS\n *        Number of bits the data type short represents. sizeof() is not suited to get this info,\n *        because a byte is not always defined as 8 bits.\n */\n/** \\def  CHAR_BITS\n *        Number of bits the data type char represents. sizeof() is not suited to get this info,\n *        because a byte is not always defined as 8 bits.\n */\n/** \\var  INT_PCM\n *        Data type representing the width of input and output PCM samples.\n */\n\n\n  typedef signed int INT;\n  typedef unsigned int UINT;\n#ifdef __LP64__\n  /* force FDK long-datatypes to 4 byte  */\n  /* jdr: Use defines to avoid type alias problems on 64 bit machines. */\n  #define LONG INT\n  #define ULONG UINT\n#else /* __LP64__ */\n  typedef signed long LONG;\n  typedef unsigned long ULONG;\n#endif\t/* __LP64__ */\n  typedef signed short SHORT;\n  typedef unsigned short USHORT;\n  typedef signed char SCHAR;\n  typedef unsigned char UCHAR;\n\n  #define SHORT_BITS 16\n  #define CHAR_BITS 8\n\n\n/* Define 64 bit base integer type. */\n#ifdef _MSC_VER\n  typedef __int64 INT64;\n  typedef unsigned __int64 UINT64;\n#else\n  typedef long long INT64;\n  typedef unsigned long long UINT64;\n#endif\n\n#ifndef NULL\n  #ifdef __cplusplus\n    #define NULL    0\n  #else\n    #define NULL    ((void *)0)\n  #endif\n#endif\n\n/* Assert is functional on x86 PC's and also when debugging is turned on. */\n#if defined(DEBUG) || defined(__i686__) || defined(__i586__) || defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || defined(FDK_DEBUG) || defined(FDK_ASSERT_ENABLE)\n  #include \n  #define FDK_ASSERT(x) assert(x)\n#else\n  #define FDK_ASSERT(ignore)\n#endif\n\n  typedef SHORT        INT_PCM;\n  #define WAV_BITS     16\n  #define SAMPLE_BITS  16\n  #define SAMPLE_MAX (((LONG)1<<(SAMPLE_BITS-1))-1)\n  #define SAMPLE_MIN (~SAMPLE_MAX)\n\n/*!\n* \\def    RAM_ALIGN\n*  Used to align memory as prefix before memory declaration. For example:\n   \\code\n   RAM_ALIGN\n   int myArray[16];\n   \\endcode\n\n   Note, that not all platforms support this mechanism. For example with TI compilers\n   a preprocessor pragma is used, but to do something like\n\n   \\code\n   #define RAM_ALIGN #pragma DATA_ALIGN(x)\n   \\encode\n\n   would require the preprocessor to process this line twice to fully resolve it. Hence,\n   a fully platform-independant way to use alignment is not supported.\n\n* \\def    ALIGNMENT_DEFAULT\n*         Default alignment in bytes.\n*/\n#if defined(__GNUC__)\t/* cppp replaced: elif */\n  #define ALIGNMENT_DEFAULT 8\n  #define RAM_ALIGN __attribute__((aligned(ALIGNMENT_DEFAULT)))\n#else\n  #define ALIGNMENT_DEFAULT 8\n  #define RAM_ALIGN\n#endif\n\n\n/*!\n* \\def  RESTRICT\n*       The restrict keyword is supported by some platforms and RESTRICT maps to\n*       either the corresponding keyword on each platform or to void if the\n*       compiler does not provide such feature.\n*\n* \\def  WORD_ALIGNED(x)\n*       Tells the compiler that pointer x is WORD aligned.\n*       At the moment only supported by TI compilers.\n*\n* \\def  DWORD_ALIGNED(x)\n*       Tells the compiler that pointer x is DWORD aligned.\n*       At the moment only supported by TI compilers.\n*/\n  #define RESTRICT\n  #define WORD_ALIGNED(x)\n  #define DWORD_ALIGNED(x)\n\n\n/*-----------------------------------------------------------------------------------\n * ALIGN_SIZE\n *-----------------------------------------------------------------------------------*/\n/*!\n * \\brief  This macro aligns a given value depending on ::ALIGNMENT_DEFAULT.\n *\n * For example if #ALIGNMENT_DEFAULT equals 8, then:\n * - ALIGN_SIZE(3) returns 8\n * - ALIGN_SIZE(8) returns 8\n * - ALIGN_SIZE(9) returns 16\n */\n#define ALIGN_SIZE(a) ((a)+ (((INT)ALIGNMENT_DEFAULT - ((INT)(a) & (ALIGNMENT_DEFAULT-1)) ) & (ALIGNMENT_DEFAULT-1)))\n\n/*-----------------------------------------------------------------------------------\n * ALIGN_PTR\n * cast (a) to width of pointer\n *-----------------------------------------------------------------------------------*/\n/*!\n * \\brief  This macro aligns a given address depending on ::ALIGNMENT_DEFAULT.\n */\n#define ALIGN_PTR(a) ( (unsigned char*)(a) + (((INT)ALIGNMENT_DEFAULT - ((INT)(UINT64)(a) & (ALIGNMENT_DEFAULT-1)) ) & (ALIGNMENT_DEFAULT-1)) )\n\n /* Alignment macro for libSYS heap implementation */\n#define ALIGNMENT_EXTRES    ( ALIGNMENT_DEFAULT )\n#define ALGN_SIZE_EXTRES(a) ((a)+ (((INT)ALIGNMENT_EXTRES - ((INT)(a) & (ALIGNMENT_EXTRES-1)) ) & (ALIGNMENT_EXTRES-1)))\n\n\n/*!\n * \\def  FORCEINLINE\n *       Sometimes compiler do not do what they are told to do, and in case of inlining some\n *       additional command might be necessary depending on the platform.\n *\n * \\def  FDK_INLINE\n *       Defines how the compiler is told to inline stuff.\n */\n#ifdef DEBUG\n#undef FORCEINLINE\n#define FORCEINLINE\n#else\n#ifndef FORCEINLINE\n  #if defined(__GNUC__)\t/* cppp replaced: elif */\n    #define FORCEINLINE inline __attribute((always_inline))\n  #else\n    #define FORCEINLINE\n  #endif\n#endif\n#endif\n\n  /* for all other platforms */\n  #define FDK_INLINE inline\n\n\n/*!\n * \\def  LNK_SECTION_DATA_L1\n *       The LNK_SECTION_* defines allow memory to be drawn from specific memory\n *       sections. Used as prefix before variable declaration.\n *\n * \\def  LNK_SECTION_DATA_L2\n *       See ::LNK_SECTION_DATA_L1\n * \\def  LNK_SECTION_L1_DATA_A\n *       See ::LNK_SECTION_DATA_L1\n * \\def  LNK_SECTION_L1_DATA_B\n *       See ::LNK_SECTION_DATA_L1\n * \\def  LNK_SECTION_CONSTDATA_L1\n *       See ::LNK_SECTION_DATA_L1\n * \\def  LNK_SECTION_CONSTDATA\n *       See ::LNK_SECTION_DATA_L1\n * \\def  LNK_SECTION_CODE_L1\n *       See ::LNK_SECTION_DATA_L1\n * \\def  LNK_SECTION_CODE_L2\n *       See ::LNK_SECTION_DATA_L1\n * \\def  LNK_SECTION_INITCODE\n *       See ::LNK_SECTION_DATA_L1\n */\n/**************************************************\n * Code Section macros\n **************************************************/\n  #define LNK_SECTION_CODE_L1\n  #define LNK_SECTION_CODE_L2\n  #define LNK_SECTION_INITCODE\n\n/* Memory section macros. */\n\n  /* default fall back */\n  #define LNK_SECTION_DATA_L1\n  #define LNK_SECTION_DATA_L2\n  #define LNK_SECTION_CONSTDATA\n  #define LNK_SECTION_CONSTDATA_L1\n\n  #define LNK_SECTION_L1_DATA_A\n  #define LNK_SECTION_L1_DATA_B\n\n\n#ifdef _MSC_VER\n  /*\n   * Sometimes certain features are excluded from compilation and therefore the warning 4065 may occur:\n   * \"switch statement contains 'default' but no 'case' labels\"\n   * We consider this warning irrelevant and disable it.\n   */\n  #pragma warning( disable : 4065 )\n#endif\n\n#endif /* __MACHINE_TYPE_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/fdkaac_codec/libSYS/include/wav_file.h",
    "content": "\n/* -----------------------------------------------------------------------------------------------------------\nSoftware License for The Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android\n\n Copyright  1995 - 2013 Fraunhofer-Gesellschaft zur Frderung der angewandten Forschung e.V.\n  All rights reserved.\n\n 1.    INTRODUCTION\nThe Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android (\"FDK AAC Codec\") is software that implements\nthe MPEG Advanced Audio Coding (\"AAC\") encoding and decoding scheme for digital audio.\nThis FDK AAC Codec software is intended to be used on a wide variety of Android devices.\n\nAAC's HE-AAC and HE-AAC v2 versions are regarded as today's most efficient general perceptual\naudio codecs. AAC-ELD is considered the best-performing full-bandwidth communications codec by\nindependent studies and is widely deployed. AAC has been standardized by ISO and IEC as part\nof the MPEG specifications.\n\nPatent licenses for necessary patent claims for the FDK AAC Codec (including those of Fraunhofer)\nmay be obtained through Via Licensing (www.vialicensing.com) or through the respective patent owners\nindividually for the purpose of encoding or decoding bit streams in products that are compliant with\nthe ISO/IEC MPEG audio standards. Please note that most manufacturers of Android devices already license\nthese patent claims through Via Licensing or directly from the patent owners, and therefore FDK AAC Codec\nsoftware may already be covered under those patent licenses when it is used for those licensed purposes only.\n\nCommercially-licensed AAC software libraries, including floating-point versions with enhanced sound quality,\nare also available from Fraunhofer. Users are encouraged to check the Fraunhofer website for additional\napplications information and documentation.\n\n2.    COPYRIGHT LICENSE\n\nRedistribution and use in source and binary forms, with or without modification, are permitted without\npayment of copyright license fees provided that you satisfy the following conditions:\n\nYou must retain the complete text of this software license in redistributions of the FDK AAC Codec or\nyour modifications thereto in source code form.\n\nYou must retain the complete text of this software license in the documentation and/or other materials\nprovided with redistributions of the FDK AAC Codec or your modifications thereto in binary form.\nYou must make available free of charge copies of the complete source code of the FDK AAC Codec and your\nmodifications thereto to recipients of copies in binary form.\n\nThe name of Fraunhofer may not be used to endorse or promote products derived from this library without\nprior written permission.\n\nYou may not charge copyright license fees for anyone to use, copy or distribute the FDK AAC Codec\nsoftware or your modifications thereto.\n\nYour modified versions of the FDK AAC Codec must carry prominent notices stating that you changed the software\nand the date of any change. For modified versions of the FDK AAC Codec, the term\n\"Fraunhofer FDK AAC Codec Library for Android\" must be replaced by the term\n\"Third-Party Modified Version of the Fraunhofer FDK AAC Codec Library for Android.\"\n\n3.    NO PATENT LICENSE\n\nNO EXPRESS OR IMPLIED LICENSES TO ANY PATENT CLAIMS, including without limitation the patents of Fraunhofer,\nARE GRANTED BY THIS SOFTWARE LICENSE. Fraunhofer provides no warranty of patent non-infringement with\nrespect to this software.\n\nYou may use this FDK AAC Codec software or modifications thereto only for purposes that are authorized\nby appropriate patent licenses.\n\n4.    DISCLAIMER\n\nThis FDK AAC Codec software is provided by Fraunhofer on behalf of the copyright holders and contributors\n\"AS IS\" and WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, including but not limited to the implied warranties\nof merchantability and fitness for a particular purpose. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR\nCONTRIBUTORS BE LIABLE for any direct, indirect, incidental, special, exemplary, or consequential damages,\nincluding but not limited to procurement of substitute goods or services; loss of use, data, or profits,\nor business interruption, however caused and on any theory of liability, whether in contract, strict\nliability, or tort (including negligence), arising in any way out of the use of this software, even if\nadvised of the possibility of such damage.\n\n5.    CONTACT INFORMATION\n\nFraunhofer Institute for Integrated Circuits IIS\nAttention: Audio and Multimedia Departments - FDK AAC LL\nAm Wolfsmantel 33\n91058 Erlangen, Germany\n\nwww.iis.fraunhofer.de/amm\namm-info@iis.fraunhofer.de\n----------------------------------------------------------------------------------------------------------- */\n\n/**************************  Fraunhofer IIS FDK SysLib  **********************\n\n   Author(s):   Eric Allamanche\n\n******************************************************************************/\n\n/** \\file   wav_file.h\n *  \\brief  Rudimentary WAVE file read/write support.\n *\n *  The WAVE file reader/writer is intented to be used in the codec's example\n *  framework for easily getting started with encoding/decoding. Therefore\n *  it serves mainly for helping quickly understand how a codec's API actually\n *  works.\n *  Being a WAVE file reader/writer with very basic functionality, it may not be\n *  able to read WAVE files that come with unusual configurations.\n *  Details on how to use the interface functions can be found in every\n *  (encoder/decoder) example framework.\n */\n\n#ifndef __WAV_FILE_H__\n#define __WAV_FILE_H__\n\n\n\n#include \"genericStds.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SPEAKER_FRONT_LEFT             0x1\n#define SPEAKER_FRONT_RIGHT            0x2\n#define SPEAKER_FRONT_CENTER           0x4\n#define SPEAKER_LOW_FREQUENCY          0x8\n#define SPEAKER_BACK_LEFT              0x10\n#define SPEAKER_BACK_RIGHT             0x20\n#define SPEAKER_FRONT_LEFT_OF_CENTER   0x40\n#define SPEAKER_FRONT_RIGHT_OF_CENTER  0x80\n#define SPEAKER_BACK_CENTER            0x100\n#define SPEAKER_SIDE_LEFT              0x200\n#define SPEAKER_SIDE_RIGHT             0x400\n#define SPEAKER_TOP_CENTER             0x800\n#define SPEAKER_TOP_FRONT_LEFT         0x1000\n#define SPEAKER_TOP_FRONT_CENTER       0x2000\n#define SPEAKER_TOP_FRONT_RIGHT        0x4000\n#define SPEAKER_TOP_BACK_LEFT          0x8000\n#define SPEAKER_TOP_BACK_CENTER        0x10000\n#define SPEAKER_TOP_BACK_RIGHT         0x20000\n#define SPEAKER_RESERVED               0x80000000\n\n/*!\n * RIFF WAVE file struct.\n * For details see WAVE file format documentation (for example at http://www.wotsit.org).\n */\ntypedef struct WAV_HEADER\n{\n  char   riffType[4];\n  UINT   riffSize;\n  char   waveType[4];\n  char   formatType[4];\n  UINT   formatSize;\n  USHORT compressionCode;\n  USHORT numChannels;\n  UINT   sampleRate;\n  UINT   bytesPerSecond;\n  USHORT blockAlign;\n  USHORT bitsPerSample;\n  char   dataType[4];\n  UINT   dataSize;\n} WAV_HEADER;\n\nstruct WAV\n{\n  WAV_HEADER header;\n  FDKFILE *fp;\n  UINT channelMask;\n};\n\ntypedef struct WAV *HANDLE_WAV;\n\n/**\n * \\brief  Open a WAV file handle for reading.\n *\n * \\param pWav      Pointer to a memory location, where a WAV handle is returned.\n * \\param filename  File name to be opened.\n *\n * \\return  0 on success and non-zero on failure.\n */\nINT WAV_InputOpen (HANDLE_WAV *pWav, const char *filename);\n\n/**\n * \\brief  Read samples from a WAVE file. The samples are automatically re-ordered to the\n *         native host endianess and scaled to full scale of the INT_PCM type, from\n *         whatever BPS the WAVE file had specified in its header data.\n *\n *  \\param wav           Handle of WAV file.\n *  \\param sampleBuffer  Pointer to store audio data.\n *  \\param numSamples    Desired number of samples to read.\n *  \\param nBufBits      Size in bit of each audio sample of sampleBuffer.\n *\n *  \\return  Number of samples actually read.\n */\nINT WAV_InputRead (HANDLE_WAV wav, void *sampleBuffer, UINT numSamples, int nBufBits);\n\n/**\n * \\brief       Close a WAV file reading handle.\n * \\param pWav  Pointer to a WAV file reading handle.\n * \\return      void\n */\nvoid WAV_InputClose(HANDLE_WAV *pWav);\n\n/**\n * \\brief  Open WAV output/writer handle.\n *\n * \\param pWav            Pointer to WAV handle to be returned.\n * \\param outputFilename  File name of the file to be written to.\n * \\param sampleRate      Desired samplerate of the resulting WAV file.\n * \\param numChannels     Desired number of audio channels of the resulting WAV file.\n * \\param bitsPerSample   Desired number of bits per audio sample of the resulting WAV file.\n *\n * \\return  0: ok; -1: error\n */\nINT WAV_OutputOpen(HANDLE_WAV *pWav, const char *outputFilename, INT sampleRate, INT numChannels, INT bitsPerSample);\n\n/**\n * \\brief  Write data to WAV file asociated to WAV handle.\n *\n * \\param wav              Handle of WAV file\n * \\param sampleBuffer     Pointer to audio samples, right justified integer values.\n * \\param numberOfSamples  The number of individual audio sample valuesto be written.\n * \\param nBufBits         Size in bits of each audio sample in sampleBuffer.\n * \\param nSigBits         Amount of significant bits of each nBufBits in sampleBuffer.\n *\n * \\return 0: ok; -1: error\n */\nINT WAV_OutputWrite(HANDLE_WAV wav, void *sampleBuffer, UINT numberOfSamples, int nBufBits, int nSigBits);\n\n/**\n * \\brief       Close WAV output handle.\n * \\param pWav  Pointer to WAV handle. *pWav is set to NULL.\n * \\return      void\n */\nvoid WAV_OutputClose(HANDLE_WAV *pWav);\n\n#ifdef __cplusplus\n}\n#endif\n\n\n#endif /* __WAV_FILE_H__ */\n"
  },
  {
    "path": "services/multimedia/audio/codec/sbc/inc/codec_sbc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _CODEC_SBC_H\n#define _CODEC_SBC_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"bluetooth.h\"\n\n#define BTIF_SBC_USE_FIXED_POINT_ENABLED\n\n#ifdef BTIF_SBC_USE_FIXED_POINT_ENABLED\ntypedef S32 REAL;\n#else\ntypedef float REAL;\n#endif\n\ntypedef U8 btif_sbc_sample_freq_t;\n#define BTIF_SBC_CHNL_SAMPLE_FREQ_16    0\n#define BTIF_SBC_CHNL_SAMPLE_FREQ_32    1\n#define BTIF_SBC_CHNL_SAMPLE_FREQ_44_1  2\n#define BTIF_SBC_CHNL_SAMPLE_FREQ_48    3\n\ntypedef U8 btif_sbc_channel_mode_t;\n#define BTIF_SBC_CHNL_MODE_MONO          0\n#define BTIF_SBC_CHNL_MODE_DUAL_CHNL     1\n#define BTIF_SBC_CHNL_MODE_STEREO        2\n#define BTIF_SBC_CHNL_MODE_JOINT_STEREO  3\n\ntypedef U8 btif_sbc_alloc_method_t;\n#define BTIF_SBC_ALLOC_METHOD_LOUDNESS   0\n#define BTIF_SBC_ALLOC_METHOD_SNR        1\n\n#define BTIF_SBC_MAX_NUM_BLK             16\n#define BTIF_SBC_MAX_NUM_SB              8\n#define BTIF_SBC_MAX_NUM_CHNL            2\n#define BTIF_SBC_MAX_PCM_DATA            512\n\n#define BTIF_SBC_DEC_ALL                 0\n#define BTIF_SBC_DEC_LEFT                1\n#define BTIF_SBC_DEC_RIGHT               2\n\n#define BTIF_SBC_SPLIT_LEFT              1\n#define BTIF_SBC_SPLIT_RIGHT             2\n\n#define BTIF_MSBC_BLOCKS\t15\n\ntypedef U8 btif_sbc_alloc_method_t;\n#define BTIF_SBC_ALLOC_METHOD_LOUDNESS   0\n#define BTIF_SBC_ALLOC_METHOD_SNR        1\n\ntypedef struct {\n    U8 bitPool;\n    btif_sbc_sample_freq_t sampleFreq;\n    btif_sbc_channel_mode_t channelMode;\n    btif_sbc_alloc_method_t allocMethod;\n    U8 numBlocks;\n    U8 numSubBands;\n    U8 numChannels;\n    U8 mSbcFlag;\n    U16 bitOffset;\n    U8 crc;\n    U8 fcs;\n    U8 join[BTIF_SBC_MAX_NUM_SB];\n    U8 scale_factors[BTIF_SBC_MAX_NUM_CHNL][BTIF_SBC_MAX_NUM_SB];\n    S32 scaleFactors[BTIF_SBC_MAX_NUM_CHNL][BTIF_SBC_MAX_NUM_SB];\n    U16 levels[BTIF_SBC_MAX_NUM_CHNL][BTIF_SBC_MAX_NUM_SB];\n    S8 bitNeed0[BTIF_SBC_MAX_NUM_SB];\n    S8 bitNeed1[BTIF_SBC_MAX_NUM_SB];\n    U8 bits[BTIF_SBC_MAX_NUM_CHNL][BTIF_SBC_MAX_NUM_SB];\n    REAL sbSample[BTIF_SBC_MAX_NUM_BLK][BTIF_SBC_MAX_NUM_CHNL][BTIF_SBC_MAX_NUM_SB];\n    U8 fcs_bak;\n} btif_sbc_stream_info_t;\ntypedef struct {\n    U8 bitPool;\n    uint8_t sampleFreq;\n    uint8_t channelMode;\n    uint8_t allocMethod;\n    U8 numBlocks;\n    U8 numSubBands;\n    U8 numChannels;\n    U8 mSbcFlag;\n} btif_sbc_stream_info_short_t;\n\ntypedef struct {\n    btif_sbc_stream_info_t streamInfo;\n    U8 sFactorsJoint[BTIF_SBC_MAX_NUM_CHNL][BTIF_SBC_MAX_NUM_SB];\n    REAL sbJoint[BTIF_SBC_MAX_NUM_BLK][BTIF_SBC_MAX_NUM_CHNL];\n    S16 X0[80 * 2];\n    S16 X1[80 * 2];\n    U16 X0pos, X1pos;\n    REAL Y[16];\n} btif_sbc_encoder_t;\n\ntypedef struct {\n    btif_sbc_stream_info_t streamInfo;\n    U16 maxPcmLen;\n    REAL V0[160];\n    REAL V1[160];\n    struct {\n        U8 stageBuff[BTIF_SBC_MAX_PCM_DATA];\n        U16 stageLen;\n        U16 curStageOff;\n        U8 *rxBuff;\n        U16 rxSize;\n        U8 rxState;\n    } parser;\n} btif_sbc_decoder_t;\n\ntypedef struct {\n    list_entry_t node;\n    uint8_t *data;\n    uint16_t dataLen;\n    uint16_t frameSize;\n    btif_bt_packet_t packet;\n    uint16_t dataSent;\n    uint16_t frmDataSent;\n} btif_a2dp_sbc_packet_t;\n\ntypedef struct  {\n    btif_sbc_sample_freq_t  sampleFreq;\n    uint8_t             numChannels;\n    uint16_t            dataLen;\n    uint8_t            *data;\n} btif_sbc_pcm_data_t;\n\nuint16_t btif_sbc_frame_len(btif_sbc_stream_info_t *StreamInfo);\nvoid btif_sbc_init_decoder(btif_sbc_decoder_t *Decoder);\nbt_status_t btif_sbc_decode_frames(btif_sbc_decoder_t *Decoder,\n                          uint8_t         *Buff,\n                          uint16_t         Len,\n                          uint16_t        *BytesParsed,\n                          btif_sbc_pcm_data_t *PcmData,\n                          uint16_t         MaxPcmData,\n                          float*       gains);\n\nbt_status_t btif_sbc_decode_frames_parser(btif_sbc_decoder_t *Decoder,\n                                                         uint8_t         *Buff,\n                                                         uint16_t         Len,\n                                                         uint16_t        *BytesParsed);\n\nbt_status_t btif_sbc_decode_frames_out_sbsamples(btif_sbc_decoder_t *Decoder,\n        uint8_t\t\t *Buff,\n        uint16_t\t\t  Len,\n        uint16_t\t\t *BytesDecoded,\n        btif_sbc_pcm_data_t *PcmData,\n        uint16_t\t\t  MaxPcmData,\n        float* gains,\n        uint8_t     ChooseDecChannel,\n        REAL       *SBSamplesBuf,\n        uint32_t        SBSamplesBufLen,\n        uint32_t        *SBSamplesBufUsed,\n        uint8_t     ChooseSplitChannel);\n\nvoid btif_sbc_init_encoder(btif_sbc_encoder_t *Encoder);\nbt_status_t btif_sbc_encode_frames(btif_sbc_encoder_t *Encoder,\n                          btif_sbc_pcm_data_t *PcmData,\n                          uint16_t        *BytesEncoded,\n                          uint8_t         *Buff,\n                          uint16_t        *Len,\n                          uint16_t         MaxSbcData);\nbt_status_t  btif_sbc_encode_frames_with_sbsamples(btif_sbc_encoder_t *Encoder,\n\t\t\t\t\t\t  REAL       *SBSamplesBuf,\n\t\t\t\t\t\t  uint32_t\t\t SBSamplesBufLen_bytes,\n\t\t\t\t\t\t  uint32_t\t\t *SBSamplesBufUsed_bytes,\n\t\t\t\t\t\t  uint8_t\t\t *Buff,\n\t\t\t\t\t\t  uint16_t\t\t *Len,\n\t\t\t\t\t\t  uint16_t\t\t  MaxSbcData,\n\t\t\t\t\t\t  uint8_t      *number_freame_encoded);\n\nvoid btif_plc_update_sbc_decoder_state(btif_sbc_encoder_t *Encoder, btif_sbc_pcm_data_t *PcmData, btif_sbc_decoder_t *Decoder, float *gain);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* CODEC_SBC */\n"
  },
  {
    "path": "services/multimedia/audio/process/adp/include/adp_arch.h",
    "content": "/* Copyright (C) 2003 Jean-Marc Valin */\n/**\n   @file arch.h\n   @brief Various architecture definitions Speex\n*/\n/*\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions\n   are met:\n   \n   - Redistributions of source code must retain the above copyright\n   notice, this list of conditions and the following disclaimer.\n   \n   - Redistributions in binary form must reproduce the above copyright\n   notice, this list of conditions and the following disclaimer in the\n   documentation and/or other materials provided with the distribution.\n   \n   - Neither the name of the Xiph.org Foundation nor the names of its\n   contributors may be used to endorse or promote products derived from\n   this software without specific prior written permission.\n   \n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n   ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n   A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR\n   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\n   EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\n   PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR\n   PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\n   LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\n   NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n   SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n*/\n\n#ifndef ARCH_H\n#define ARCH_H\n\n/* A couple test to catch stupid option combinations */\n#ifdef FIXED_POINT\n\n#ifdef FLOATING_POINT\n#error You cannot compile as floating point and fixed point at the same time\n#endif\n#ifdef _USE_SSE\n#error SSE is only for floating-point\n#endif\n#if ((defined (ARM4_ASM)||defined (ARM4_ASM)) && defined(BFIN_ASM)) || (defined (ARM4_ASM)&&defined(ARM5E_ASM))\n#error Make up your mind. What CPU do you have?\n#endif\n#ifdef VORBIS_PSYCHO\n#error Vorbis-psy model currently not implemented in fixed-point\n#endif\n\n#else\n\n#ifndef FLOATING_POINT\n#error You now need to define either FIXED_POINT or FLOATING_POINT\n#endif\n#if defined (ARM4_ASM) || defined(ARM5E_ASM) || defined(BFIN_ASM)\n#error I suppose you can have a [ARM4/ARM5E/Blackfin] that has float instructions?\n#endif\n#ifdef FIXED_POINT_DEBUG\n#error \"Don't you think enabling fixed-point is a good thing to do if you want to debug that?\"\n#endif\n\n\n#endif\n\n#ifndef OUTSIDE_SPEEX\n//#include \"speex/speexdsp_types.h\"\n#endif\n\n#define ABS(x) ((x) < 0 ? (-(x)) : (x))      /**< Absolute integer value. */\n#define ABS16(x) ((x) < 0 ? (-(x)) : (x))    /**< Absolute 16-bit value.  */\n#define MIN16(a,b) ((a) < (b) ? (a) : (b))   /**< Maximum 16-bit value.   */\n#define MAX16(a,b) ((a) > (b) ? (a) : (b))   /**< Maximum 16-bit value.   */\n#define ABS32(x) ((x) < 0 ? (-(x)) : (x))    /**< Absolute 32-bit value.  */\n#define MIN32(a,b) ((a) < (b) ? (a) : (b))   /**< Maximum 32-bit value.   */\n#define MAX32(a,b) ((a) > (b) ? (a) : (b))   /**< Maximum 32-bit value.   */\n\n#ifdef FIXED_POINT\n\ntypedef spx_int16_t spx_word16_t;\ntypedef spx_int32_t spx_word32_t;\ntypedef spx_word32_t spx_mem_t;\ntypedef spx_word16_t spx_coef_t;\ntypedef spx_word16_t spx_lsp_t;\ntypedef spx_word32_t spx_sig_t;\n\n#define Q15ONE 32767\n\n#define LPC_SCALING  8192\n#define SIG_SCALING  16384\n#define LSP_SCALING  8192.\n#define GAMMA_SCALING 32768.\n#define GAIN_SCALING 64\n#define GAIN_SCALING_1 0.015625\n\n#define LPC_SHIFT    13\n#define LSP_SHIFT    13\n#define SIG_SHIFT    14\n#define GAIN_SHIFT   6\n\n#define VERY_SMALL 0\n#define VERY_LARGE32 ((spx_word32_t)2147483647)\n#define VERY_LARGE16 ((spx_word16_t)32767)\n#define Q15_ONE ((spx_word16_t)32767)\n\n\n#ifdef FIXED_DEBUG\n#include \"fixed_debug.h\"\n#else\n\n#include \"fixed_generic.h\"\n\n#ifdef ARM5E_ASM\n#include \"fixed_arm5e.h\"\n#elif defined (ARM4_ASM)\n#include \"fixed_arm4.h\"\n#elif defined (BFIN_ASM)\n#include \"fixed_bfin.h\"\n#endif\n\n#endif\n\n\n#else\n\ntypedef float spx_mem_t;\ntypedef float spx_coef_t;\ntypedef float spx_lsp_t;\ntypedef float spx_sig_t;\ntypedef float spx_word16_t;\ntypedef float spx_word32_t;\n\n#define Q15ONE 1.0f\n#define LPC_SCALING  1.f\n#define SIG_SCALING  1.f\n#define LSP_SCALING  1.f\n#define GAMMA_SCALING 1.f\n#define GAIN_SCALING 1.f\n#define GAIN_SCALING_1 1.f\n\n\n#define VERY_SMALL 1e-15f\n#define VERY_LARGE32 1e15f\n#define VERY_LARGE16 1e15f\n#define Q15_ONE ((spx_word16_t)1.f)\n\n#define QCONST16(x,bits) (x)\n#define QCONST32(x,bits) (x)\n\n#define NEG16(x) (-(x))\n#define NEG32(x) (-(x))\n#define EXTRACT16(x) (x)\n#define EXTEND32(x) (x)\n#define SHR16(a,shift) (a)\n#define SHL16(a,shift) (a)\n#define SHR32(a,shift) (a)\n#define SHL32(a,shift) (a)\n#define PSHR16(a,shift) (a)\n#define PSHR32(a,shift) (a)\n#define VSHR32(a,shift) (a)\n#define SATURATE16(x,a) (x)\n#define SATURATE32(x,a) (x)\n#define SATURATE32PSHR(x,shift,a) (x)\n\n#define PSHR(a,shift)       (a)\n#define SHR(a,shift)       (a)\n#define SHL(a,shift)       (a)\n#define SATURATE(x,a) (x)\n\n#define ADD16(a,b) ((a)+(b))\n#define SUB16(a,b) ((a)-(b))\n#define ADD32(a,b) ((a)+(b))\n#define SUB32(a,b) ((a)-(b))\n#define MULT16_16_16(a,b)     ((a)*(b))\n#define MULT16_16(a,b)     ((spx_word32_t)(a)*(spx_word32_t)(b))\n#define MAC16_16(c,a,b)     ((c)+(spx_word32_t)(a)*(spx_word32_t)(b))\n\n#define MULT16_32_Q11(a,b)     ((a)*(b))\n#define MULT16_32_Q13(a,b)     ((a)*(b))\n#define MULT16_32_Q14(a,b)     ((a)*(b))\n#define MULT16_32_Q15(a,b)     ((a)*(b))\n#define MULT16_32_P15(a,b)     ((a)*(b))\n\n#define MAC16_32_Q11(c,a,b)     ((c)+(a)*(b))\n#define MAC16_32_Q15(c,a,b)     ((c)+(a)*(b))\n\n#define MAC16_16_Q11(c,a,b)     ((c)+(a)*(b))\n#define MAC16_16_Q13(c,a,b)     ((c)+(a)*(b))\n#define MAC16_16_P13(c,a,b)     ((c)+(a)*(b))\n#define MULT16_16_Q11_32(a,b)     ((a)*(b))\n#define MULT16_16_Q13(a,b)     ((a)*(b))\n#define MULT16_16_Q14(a,b)     ((a)*(b))\n#define MULT16_16_Q15(a,b)     ((a)*(b))\n#define MULT16_16_P15(a,b)     ((a)*(b))\n#define MULT16_16_P13(a,b)     ((a)*(b))\n#define MULT16_16_P14(a,b)     ((a)*(b))\n\n#define DIV32_16(a,b)     (((spx_word32_t)(a))/(spx_word16_t)(b))\n#define PDIV32_16(a,b)     (((spx_word32_t)(a))/(spx_word16_t)(b))\n#define DIV32(a,b)     (((spx_word32_t)(a))/(spx_word32_t)(b))\n#define PDIV32(a,b)     (((spx_word32_t)(a))/(spx_word32_t)(b))\n\n\n#endif\n\n\n#if defined (CONFIG_TI_C54X) || defined (CONFIG_TI_C55X)\n\n/* 2 on TI C5x DSP */\n#define BYTES_PER_CHAR 2 \n#define BITS_PER_CHAR 16\n#define LOG2_BITS_PER_CHAR 4\n\n#else \n\n#define BYTES_PER_CHAR 1\n#define BITS_PER_CHAR 8\n#define LOG2_BITS_PER_CHAR 3\n\n#endif\n\n\n\n#ifdef FIXED_DEBUG\nextern long long spx_mips;\n#endif\n\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/adp/include/adp_config.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n// Microsoft version of 'inline'\n\n#ifdef WIN32\n#define inline __inline\n#endif\n\n\n//#define FIXED_POINT\n\n\n// In Visual Studio, _M_IX86_FP=1 means /arch:SSE was used, likewise\n// _M_IX86_FP=2 means /arch:SSE2 was used.\n// Also, enable both _USE_SSE and _USE_SSE2 if we're compiling for x86-64\n// #if _M_IX86_FP >= 1 || defined(_M_X64)\n// #define _USE_SSE\n// #endif\n// \n// #if _M_IX86_FP >= 2 || defined(_M_X64)\n// #define _USE_SSE2\n// #endif\n\n// Visual Studio support alloca(), but it always align variables to 16-bit\n// boundary, while SSE need 128-bit alignment. So we disable alloca() when\n// SSE is enabled.\n#define FLOATING_POINT\n#define USE_SMALLFT\n\n/* We don't support visibility on Win32 */\n#define EXPORT\n\n#define USE_STATIC_MEMORY\n\n#define ADPFILTER_NUM 400\n\n\n"
  },
  {
    "path": "services/multimedia/audio/process/adp/include/adp_fftwrap.h",
    "content": "/* Copyright (C) 2005 Jean-Marc Valin \n   File: fftwrap.h\n\n   Wrapper for various FFTs \n\n   Redistribution and use in source and binary forms, with or without\n   modification, are permitted provided that the following conditions\n   are met:\n   \n   - Redistributions of source code must retain the above copyright\n   notice, this list of conditions and the following disclaimer.\n   \n   - Redistributions in binary form must reproduce the above copyright\n   notice, this list of conditions and the following disclaimer in the\n   documentation and/or other materials provided with the distribution.\n   \n   - Neither the name of the Xiph.org Foundation nor the names of its\n   contributors may be used to endorse or promote products derived from\n   this software without specific prior written permission.\n   \n   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n   ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n   A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR\n   CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\n   EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\n   PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR\n   PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\n   LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\n   NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n   SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n\n*/\n\n#ifndef FFTWRAP_H\n#define FFTWRAP_H\n\n#include \"adp_arch.h\"\n\n/** Compute tables for an FFT */\nvoid *adp_spx_fft_init(int size);\n\n/** Destroy tables for an FFT */\nvoid adp_spx_fft_destroy(void *table);\n\n/** Forward (real to half-complex) transform */\nvoid adp_spx_fft(void *table, spx_word16_t *in, spx_word16_t *out);\n\n/** Backward (half-complex to real) transform */\nvoid adp_spx_ifft(void *table, spx_word16_t *in, spx_word16_t *out);\n\n/** Forward (real to half-complex) transform of float data */\nvoid adp_spx_fft_float(void *table, float *in, float *out);\n\n/** Backward (half-complex to real) transform of float data */\nvoid adp_spx_ifft_float(void *table, float *in, float *out);\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/adp/include/adp_filter.h",
    "content": "/********************************************************************\n *                                                                  *\n * THIS FILE IS PART OF THE OggVorbis SOFTWARE CODEC SOURCE CODE.   *\n * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS     *\n * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *\n * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING.       *\n *                                                                  *\n * THE OggVorbis SOURCE CODE IS (C) COPYRIGHT 1994-2001             *\n * by the XIPHOPHORUS Company http://www.xiph.org/                  *\n *                                                                  *\n ********************************************************************\n\n function: fft transform\n last mod: $Id: smallft.h,v 1.3 2003/09/16 18:35:45 jm Exp $\n\n ********************************************************************/\n/**\n   @file adp_filter.h\n   @brief Discrete Rotational Fourier Transform (DRFT)\n*/\n \n#ifndef _ADP_FILTER_H_\n#define _ADP_FILTER_H_\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"adp_config.h\"\n\n\n\nstruct adpparam\n{\n\tvoid *fft_lookup;\n\tint M;\n\tfloat w_fft[ADPFILTER_NUM*2];\n\tfloat w[ADPFILTER_NUM*2];\n\tfloat u;\n};\nextern void lms_block_fft(short *in, short *dest, short *out, struct adpparam *param,int upadat_flag);\nextern void *adp_filter_init(int size);\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/adp/include/adp_smallft.h",
    "content": "/********************************************************************\n *                                                                  *\n * THIS FILE IS PART OF THE OggVorbis SOFTWARE CODEC SOURCE CODE.   *\n * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS     *\n * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *\n * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING.       *\n *                                                                  *\n * THE OggVorbis SOURCE CODE IS (C) COPYRIGHT 1994-2001             *\n * by the XIPHOPHORUS Company http://www.xiph.org/                  *\n *                                                                  *\n ********************************************************************\n\n function: fft transform\n last mod: $Id: smallft.h,v 1.3 2003/09/16 18:35:45 jm Exp $\n\n ********************************************************************/\n/**\n   @file smallft.h\n   @brief Discrete Rotational Fourier Transform (DRFT)\n*/\n\n#ifndef _V_SMFT_H_\n#define _V_SMFT_H_\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/** Discrete Rotational Fourier Transform lookup */\nstruct drft_lookup{\n  int n;\n  float *trigcache;\n  int *splitcache;\n};\n\nextern void adp_spx_drft_forward(struct drft_lookup *l,float *data);\nextern void adp_spx_drft_backward(struct drft_lookup *l,float *data);\nextern void adp_spx_drft_init(struct drft_lookup *l,int n);\nextern void adp_spx_drft_clear(struct drft_lookup *l);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/anc/cfg/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y := \\\n\t-Iservices/multimedia/audio/process/anc/include \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n\t-Iservices/nv_section/aud_section \\\n\t-Iservices/nv_section/include \\\n\t-Iutils/crc32 \\\n\t-Iservices/multimedia/speech/src/process/ns_and_ec/inc \\\n\t-Iservices/multimedia/speech/inc \\\n\t-Iservices/multimedia/speech/src/process/common/inc \\\n\t-Iservices/multimedia/speech/src/process/inc\n\nccflags-y += -DUSE_CMSIS_F32_FFT\n\nifeq ($(HW_DAC_IIR_EQ_PROCESS),1)\nCFLAGS_anc_cfg.o += -D__HW_DAC_IIR_EQ_PROCESS__\nendif\nifeq ($(HW_IIR_EQ_PROCESS),1)\nCFLAGS_anc_cfg.o += -D__HW_IIR_EQ_PROCESS__\nendif\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_anc_cfg.o += -D__AUDIO_RESAMPLE__\nendif\n\nCFLAGS_fftfilt2.o += -DUSE_MED_MALLOC\n"
  },
  {
    "path": "services/multimedia/audio/process/anc/cfg/anc_cfg.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"anc_process.h\"\n#include \"aud_section.h\"\n#include \"aud_section_inc.h\"\n#include \"hal_location.h\"\n#include \"hal_sysfreq.h\"\n#include \"hal_trace.h\"\n#include \"plat_types.h\"\n#include \"tgt_hardware.h\"\n\n#ifdef USB_ANC_MC_EQ_TUNING\n#include \"analog.h\"\n#include \"audioflinger.h\"\n#include \"crc32.h\"\n#include \"hal_aud.h\"\n#include \"hal_cmu.h\"\n#include \"hal_codec.h\"\n#include \"hal_dma.h\"\n#include \"hal_iomux.h\"\n#include \"hal_norflash.h\"\n#include \"hal_timer.h\"\n#include \"hw_codec_iir_process.h\"\n#include \"hw_iir_process.h\"\n#include \"pmu.h\"\n#include \"stdint.h\"\n#include \"string.h\"\n#endif\n\n#ifdef AUDIO_ANC_FB_MC\n#include \"cmsis.h\"\n#endif\n\n#ifdef ANC_COEF_LIST_NUM\n#if (ANC_COEF_LIST_NUM < 1)\n#error \"Invalid ANC_COEF_LIST_NUM configuration\"\n#endif\n#else\n#define ANC_COEF_LIST_NUM (1)\n#endif\n\nextern const struct_anc_cfg *anc_coef_list_50p7k[ANC_COEF_LIST_NUM];\nextern const struct_anc_cfg *anc_coef_list_48k[ANC_COEF_LIST_NUM];\nextern const struct_anc_cfg *anc_coef_list_44p1k[ANC_COEF_LIST_NUM];\n\nconst struct_anc_cfg *WEAK anc_coef_list_50p7k[ANC_COEF_LIST_NUM] = {};\nconst struct_anc_cfg *WEAK anc_coef_list_48k[ANC_COEF_LIST_NUM] = {};\nconst struct_anc_cfg *WEAK anc_coef_list_44p1k[ANC_COEF_LIST_NUM] = {};\n\nstatic enum ANC_INDEX cur_coef_idx = ANC_INDEX_0;\nstatic enum AUD_SAMPRATE_T cur_coef_samprate;\n\n#ifdef AUDIO_ANC_FB_MC\n#define AUD_IIR_NUM (8)\n\ntypedef struct {\n  aud_item anc_cfg_mc_l;\n  aud_item anc_cfg_mc_r;\n  float mc_history_l[AUD_IIR_NUM][4];\n  float mc_history_r[AUD_IIR_NUM][4];\n} IIR_MC_CFG_T;\n\nstatic IIR_MC_CFG_T mc_iir_cfg;\n\n#endif\n\n#ifndef CODEC_OUTPUT_DEV\n#define CODEC_OUTPUT_DEV CFG_HW_AUD_OUTPUT_PATH_SPEAKER_DEV\n#endif\n\nint anc_load_cfg(void) {\n  int res = 0;\n  const struct_anc_cfg **list;\n\n  anc_set_ch_map(CODEC_OUTPUT_DEV);\n\n#ifdef __AUDIO_RESAMPLE__\n  res = anccfg_loadfrom_audsec(anc_coef_list_50p7k, anc_coef_list_48k,\n                               ANC_COEF_LIST_NUM);\n  list = anc_coef_list_50p7k;\n  TRACE(0, \"50.7k!!!!\");\n\n  if (res) {\n    TRACE(\n        2,\n        \"[%s] WARNING(%d): Can not load anc coefficient from audio section!!!\",\n        __func__, res);\n  } else {\n    TRACE(1, \"[%s] Load anc coefficient from audio section.\", __func__);\n#if (AUD_SECTION_STRUCT_VERSION == 1)\n    TRACE(5, \"[%s] L: gain = %d, len = %d, dac = %d, adc = %d\", __func__,\n          list[0]->anc_cfg_ff_l.total_gain, list[0]->anc_cfg_ff_l.fir_len,\n          list[0]->anc_cfg_ff_l.dac_gain_offset,\n          list[0]->anc_cfg_ff_l.adc_gain_offset);\n    TRACE(5, \"[%s] R: gain = %d, len = %d, dac = %d, adc = %d\", __func__,\n          list[0]->anc_cfg_ff_r.total_gain, list[0]->anc_cfg_ff_r.fir_len,\n          list[0]->anc_cfg_ff_r.dac_gain_offset,\n          list[0]->anc_cfg_ff_r.adc_gain_offset);\n#elif (AUD_SECTION_STRUCT_VERSION == 2)\n    for (int i = 0; i < ANC_COEF_LIST_NUM; i++) {\n      TRACE(3, \"appmode%d,FEEDFORWARD,L:gain %d,R:gain %d\", i,\n            list[i]->anc_cfg_ff_l.total_gain, list[i]->anc_cfg_ff_r.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef ff 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[2]);\n      }\n\n      TRACE(3, \"appmode%d,FEEDBACK,L:gain %d,R:gain %d\", i,\n            list[i]->anc_cfg_fb_l.total_gain, list[i]->anc_cfg_fb_r.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef fb 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[2]);\n      }\n    }\n#elif (AUD_SECTION_STRUCT_VERSION == 3)\n    for (int i = 0; i < ANC_COEF_LIST_NUM; i++) {\n      TRACE(2, \"appmode%d,FEEDFORWARD,L:gain %d\", i,\n            list[i]->anc_cfg_ff_l.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef ff 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[2]);\n      }\n\n      TRACE(2, \"appmode%d,FEEDBACK,L:gain %d\", i,\n            list[i]->anc_cfg_fb_l.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef fb 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[2]);\n      }\n    }\n#endif\n  }\n\n#else\n  res = anccfg_loadfrom_audsec(anc_coef_list_48k, anc_coef_list_44p1k,\n                               ANC_COEF_LIST_NUM);\n  list = anc_coef_list_44p1k;\n  TRACE(0, \"44.1k!!!!\");\n\n  if (res) {\n    TRACE(\n        2,\n        \"[%s] WARNING(%d): Can not load anc coefficient from audio section!!!\",\n        __func__, res);\n  } else {\n    TRACE(1, \"[%s] Load anc coefficient from audio section.\", __func__);\n#if (AUD_SECTION_STRUCT_VERSION == 1)\n    TRACE(5, \"[%s] L: gain = %d, len = %d, dac = %d, adc = %d\", __func__,\n          list[0]->anc_cfg_ff_l.total_gain, list[0]->anc_cfg_ff_l.fir_len,\n          list[0]->anc_cfg_ff_l.dac_gain_offset,\n          list[0]->anc_cfg_ff_l.adc_gain_offset);\n    TRACE(5, \"[%s] R: gain = %d, len = %d, dac = %d, adc = %d\", __func__,\n          list[0]->anc_cfg_ff_r.total_gain, list[0]->anc_cfg_ff_r.fir_len,\n          list[0]->anc_cfg_ff_r.dac_gain_offset,\n          list[0]->anc_cfg_ff_r.adc_gain_offset);\n#elif (AUD_SECTION_STRUCT_VERSION == 2)\n    for (int i = 0; i < ANC_COEF_LIST_NUM; i++) {\n      TRACE(3, \"appmode%d,FEEDFORWARD,L:gain %d,R:gain %d\", i,\n            list[i]->anc_cfg_ff_l.total_gain, list[i]->anc_cfg_ff_r.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef ff 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[2]);\n      }\n\n      TRACE(3, \"appmode%d,FEEDBACK,L:gain %d,R:gain %d\", i,\n            list[i]->anc_cfg_fb_l.total_gain, list[i]->anc_cfg_fb_r.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef fb 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[2]);\n      }\n    }\n#elif (AUD_SECTION_STRUCT_VERSION == 3)\n    for (int i = 0; i < ANC_COEF_LIST_NUM; i++) {\n      TRACE(2, \"appmode%d,FEEDFORWARD,L:gain %d\", i,\n            list[i]->anc_cfg_ff_l.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef ff 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[2]);\n      }\n\n      TRACE(2, \"appmode%d,FEEDBACK,L:gain %d\", i,\n            list[i]->anc_cfg_fb_l.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef fb 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[2]);\n      }\n    }\n\n#endif\n  }\n\n  res = anccfg_loadfrom_audsec(anc_coef_list_48k, anc_coef_list_44p1k,\n                               ANC_COEF_LIST_NUM);\n  list = anc_coef_list_48k;\n  TRACE(0, \"48k!!!!\");\n\n  if (res) {\n    TRACE(\n        2,\n        \"[%s] WARNING(%d): Can not load anc coefficient from audio section!!!\",\n        __func__, res);\n  } else {\n    TRACE(1, \"[%s] Load anc coefficient from audio section.\", __func__);\n#if (AUD_SECTION_STRUCT_VERSION == 1)\n    TRACE(5, \"[%s] L: gain = %d, len = %d, dac = %d, adc = %d\", __func__,\n          list[0]->anc_cfg_ff_l.total_gain, list[0]->anc_cfg_ff_l.fir_len,\n          list[0]->anc_cfg_ff_l.dac_gain_offset,\n          list[0]->anc_cfg_ff_l.adc_gain_offset);\n    TRACE(5, \"[%s] R: gain = %d, len = %d, dac = %d, adc = %d\", __func__,\n          list[0]->anc_cfg_ff_r.total_gain, list[0]->anc_cfg_ff_r.fir_len,\n          list[0]->anc_cfg_ff_r.dac_gain_offset,\n          list[0]->anc_cfg_ff_r.adc_gain_offset);\n#elif (AUD_SECTION_STRUCT_VERSION == 2)\n    for (int i = 0; i < ANC_COEF_LIST_NUM; i++) {\n      TRACE(3, \"appmode%d,FEEDFORWARD,L:gain %d,R:gain %d\", i,\n            list[i]->anc_cfg_ff_l.total_gain, list[i]->anc_cfg_ff_r.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef ff 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[2]);\n      }\n\n      TRACE(3, \"appmode%d,FEEDBACK,L:gain %d,R:gain %d\", i,\n            list[i]->anc_cfg_fb_l.total_gain, list[i]->anc_cfg_fb_r.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef fb 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[2]);\n      }\n    }\n#elif (AUD_SECTION_STRUCT_VERSION == 3)\n    for (int i = 0; i < ANC_COEF_LIST_NUM; i++) {\n      TRACE(2, \"appmode%d,FEEDFORWARD,L:gain %d\", i,\n            list[i]->anc_cfg_ff_l.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef ff 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_ff_l.iir_coef[j].coef_a[2]);\n      }\n\n      TRACE(2, \"appmode%d,FEEDBACK,L:gain %d\", i,\n            list[i]->anc_cfg_fb_l.total_gain);\n      for (int j = 0; j < AUD_IIR_NUM; j++) {\n        TRACE(7,\n              \"appmode%d,iir coef fb 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, \"\n              \"0x%08x\",\n              i, list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_b[2],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[0],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[1],\n              list[i]->anc_cfg_fb_l.iir_coef[j].coef_a[2]);\n      }\n    }\n#endif\n  }\n#endif\n  return res;\n}\n\nint anc_select_coef(enum AUD_SAMPRATE_T rate, enum ANC_INDEX index,\n                    enum ANC_TYPE_T anc_type, ANC_GAIN_TIME anc_gain_delay) {\n  const struct_anc_cfg **list = NULL;\n\n  if (index >= ANC_COEF_LIST_NUM) {\n    return 1;\n  }\n\n#ifdef CHIP_BEST1000\n  switch (rate) {\n  case AUD_SAMPRATE_96000:\n    list = anc_coef_list_48k;\n    break;\n\n  case AUD_SAMPRATE_88200:\n    list = anc_coef_list_44p1k;\n    break;\n\n  default:\n    break;\n  }\n\n#else\n  switch (rate) {\n  case AUD_SAMPRATE_48000:\n    list = anc_coef_list_48k;\n    break;\n\n  case AUD_SAMPRATE_44100:\n    list = anc_coef_list_44p1k;\n    break;\n\n#ifdef __AUDIO_RESAMPLE__\n  case AUD_SAMPRATE_50781:\n    list = anc_coef_list_50p7k;\n    break;\n#endif\n\n  default:\n    break;\n  }\n#endif\n\n  ASSERT(list != NULL && list[index] != NULL,\n         \"The coefs of Samprate %d is NULL\", rate);\n\n  if (anc_opened(anc_type)) {\n    hal_sysfreq_req(HAL_SYSFREQ_USER_ANC, HAL_CMU_FREQ_52M);\n    anc_set_cfg(list[index], anc_type, anc_gain_delay);\n    hal_sysfreq_req(HAL_SYSFREQ_USER_ANC, HAL_CMU_FREQ_32K);\n#ifdef AUDIO_ANC_FB_MC\n    mc_iir_cfg.anc_cfg_mc_l = (*list[index]).anc_cfg_mc_l;\n    mc_iir_cfg.anc_cfg_mc_r = (*list[index]).anc_cfg_mc_r;\n#endif\n  }\n\n  cur_coef_idx = index;\n  cur_coef_samprate = rate;\n\n  return 0;\n}\n\nenum ANC_INDEX anc_get_current_coef_index(void) { return cur_coef_idx; }\n\nenum AUD_SAMPRATE_T anc_get_current_coef_samplerate(void) {\n  return cur_coef_samprate;\n}\n\n#ifdef AUDIO_ANC_FB_MC\n\nvoid anc_mc_run_init(enum AUD_SAMPRATE_T rate) {\n  const struct_anc_cfg **list = NULL;\n\n  switch (rate) {\n  case AUD_SAMPRATE_48000:\n    list = anc_coef_list_48k;\n    break;\n\n  case AUD_SAMPRATE_44100:\n    list = anc_coef_list_44p1k;\n    break;\n\n#ifdef __AUDIO_RESAMPLE__\n  case AUD_SAMPRATE_50781:\n    list = anc_coef_list_50p7k;\n    break;\n#endif\n  default:\n    break;\n  }\n\n  ASSERT(list != NULL && list[cur_coef_idx] != NULL,\n         \"The coefs of Samprate %d is NULL\", rate);\n\n  mc_iir_cfg.anc_cfg_mc_l = (*list[cur_coef_idx]).anc_cfg_mc_l;\n  mc_iir_cfg.anc_cfg_mc_r = (*list[cur_coef_idx]).anc_cfg_mc_r;\n\n  for (int j = 0; j < AUD_IIR_NUM; j++) {\n    for (int i = 0; i < 4; i++) {\n      mc_iir_cfg.mc_history_l[j][i] = 0.0f;\n      mc_iir_cfg.mc_history_r[j][i] = 0.0f;\n    }\n  }\n  return;\n}\n\nvoid anc_mc_run_setup(enum AUD_SAMPRATE_T rate) {\n  const struct_anc_cfg **list = NULL;\n\n  switch (rate) {\n  case AUD_SAMPRATE_48000:\n    list = anc_coef_list_48k;\n    break;\n\n  case AUD_SAMPRATE_44100:\n    list = anc_coef_list_44p1k;\n    break;\n\n#ifdef __AUDIO_RESAMPLE__\n  case AUD_SAMPRATE_50781:\n    list = anc_coef_list_50p7k;\n    break;\n#endif\n  default:\n    break;\n  }\n\n  ASSERT(list != NULL && list[cur_coef_idx] != NULL,\n         \"The coefs of Samprate %d is NULL\", rate);\n\n  mc_iir_cfg.anc_cfg_mc_l = (*list[cur_coef_idx]).anc_cfg_mc_l;\n  mc_iir_cfg.anc_cfg_mc_r = (*list[cur_coef_idx]).anc_cfg_mc_r;\n\n  return;\n}\n\nstatic inline int32_t iir_ssat_24bits(float in) {\n  int res = 0;\n  int32_t out;\n\n  res = (int)in;\n  out = __SSAT(res, 24);\n\n  return out;\n}\n\nstatic inline int32_t iir_ssat_16bits(float in) {\n  int res = 0;\n  int32_t out;\n\n  res = (int)in;\n  out = __SSAT(res, 16);\n\n  return out;\n}\n\nSRAM_TEXT_LOC int anc_mc_run_stereo(uint8_t *buf, int len, float left_gain,\n                                    float right_gain,\n                                    enum AUD_BITS_T sample_bit) {\n  int len_mono;\n  float gain_l = 0, gain_r = 0;\n  int32_t *coefs = NULL;\n  float *history = NULL;\n\n  float x0, x1, x2;\n  float y0, y1, y2;\n\n  // Coefs\n  float a0, a1, a2;\n  float b0, b1, b2;\n\n  // ASSERT(mc_iir_cfg.anc_cfg_mc_l.iir_counter==mc_iir_cfg.anc_cfg_mc_r.iir_counter,\n  // \"mc need the same counter in left and right ch L:%d,R:%d\",\n  //         mc_iir_cfg.anc_cfg_mc_l.iir_counter,mc_iir_cfg.anc_cfg_mc_r.iir_counter);\n\n  if (sample_bit == AUD_BITS_16) {\n    int16_t *iir_buf;\n\n    len_mono = len >> 2;\n\n    gain_l = (mc_iir_cfg.anc_cfg_mc_l.total_gain / 512.0f) * left_gain;\n\n    if (mc_iir_cfg.anc_cfg_mc_l.iir_counter == 0 ||\n        mc_iir_cfg.anc_cfg_mc_l.iir_bypass_flag) {\n      iir_buf = (int16_t *)buf;\n\n      for (int j = 0; j < len_mono; j++) {\n        x0 = *iir_buf * gain_l;\n        *iir_buf++ = iir_ssat_16bits(x0);\n        iir_buf++;\n      }\n    } else {\n      for (int i = 0; i < mc_iir_cfg.anc_cfg_mc_l.iir_counter; i++) {\n        // Coef\n        coefs = mc_iir_cfg.anc_cfg_mc_l.iir_coef[i].coef_a;\n        a0 = *coefs++;\n        a1 = *coefs++;\n        a2 = *coefs;\n        coefs = mc_iir_cfg.anc_cfg_mc_l.iir_coef[i].coef_b;\n        b0 = *coefs++;\n        b1 = *coefs++;\n        b2 = *coefs;\n\n        a1 = a1 / a0;\n        a2 = a2 / a0;\n        b0 = b0 / a0;\n        b1 = b1 / a0;\n        b2 = b2 / a0;\n\n        // TRACE(7,\"[%d] %f, %f, %f, %f, %f, %f\", i, a0, a1, a2, b0, b1, b2);\n\n        // Left\n        history = mc_iir_cfg.mc_history_l[i];\n        x1 = *history++;\n        x2 = *history++;\n        y1 = *history++;\n        y2 = *history;\n\n        iir_buf = (int16_t *)buf;\n        if (i == 0) {\n          for (int j = 0; j < len_mono; j++) {\n            // Left channel\n            x0 = *iir_buf * gain_l;\n            y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n            y2 = y1;\n            y1 = y0;\n            x2 = x1;\n            x1 = x0;\n            *iir_buf++ = iir_ssat_16bits(y0);\n            iir_buf++;\n          }\n        } else {\n          iir_buf++;\n          for (int j = 0; j < len_mono; j++) {\n            // Left channel\n            x0 = *iir_buf;\n            y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n            y2 = y1;\n            y1 = y0;\n            x2 = x1;\n            x1 = x0;\n            *iir_buf++ = iir_ssat_16bits(y0);\n            iir_buf++;\n          }\n        }\n        // Left\n        history = mc_iir_cfg.mc_history_l[i];\n        *history++ = x1;\n        *history++ = x2;\n        *history++ = y1;\n        *history = y2;\n      }\n    }\n\n    gain_r = (mc_iir_cfg.anc_cfg_mc_r.total_gain / 512.0f) * right_gain;\n\n    if (mc_iir_cfg.anc_cfg_mc_r.iir_counter == 0 ||\n        mc_iir_cfg.anc_cfg_mc_r.iir_bypass_flag) {\n      iir_buf = (int16_t *)buf;\n      iir_buf++;\n      for (int j = 0; j < len_mono; j++) {\n        x0 = *iir_buf * gain_r;\n        *iir_buf++ = iir_ssat_16bits(x0);\n        iir_buf++;\n      }\n    } else {\n      for (int i = 0; i < mc_iir_cfg.anc_cfg_mc_r.iir_counter; i++) {\n        // Coef\n        coefs = mc_iir_cfg.anc_cfg_mc_r.iir_coef[i].coef_a;\n        a0 = *coefs++;\n        a1 = *coefs++;\n        a2 = *coefs;\n        coefs = mc_iir_cfg.anc_cfg_mc_r.iir_coef[i].coef_b;\n        b0 = *coefs++;\n        b1 = *coefs++;\n        b2 = *coefs;\n\n        a1 = a1 / a0;\n        a2 = a2 / a0;\n        b0 = b0 / a0;\n        b1 = b1 / a0;\n        b2 = b2 / a0;\n\n        // TRACE(7,\"[%d] %f, %f, %f, %f, %f, %f\", i, a0, a1, a2, b0, b1, b2);\n\n        // right\n        history = mc_iir_cfg.mc_history_r[i];\n        x1 = *history++;\n        x2 = *history++;\n        y1 = *history++;\n        y2 = *history;\n\n        iir_buf = (int16_t *)buf;\n        iir_buf++;\n        if (i == 0) {\n          for (int j = 0; j < len_mono; j++) {\n            // right channel\n            x0 = *iir_buf * gain_r;\n            y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n            y2 = y1;\n            y1 = y0;\n            x2 = x1;\n            x1 = x0;\n            *iir_buf++ = iir_ssat_16bits(y0);\n            iir_buf++;\n          }\n        } else {\n          for (int j = 0; j < len_mono; j++) {\n            // right channel\n            x0 = *iir_buf;\n            y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n            y2 = y1;\n            y1 = y0;\n            x2 = x1;\n            x1 = x0;\n            *iir_buf++ = iir_ssat_16bits(y0);\n            iir_buf++;\n          }\n        }\n        // right\n        history = mc_iir_cfg.mc_history_r[i];\n        *history++ = x1;\n        *history++ = x2;\n        *history++ = y1;\n        *history = y2;\n      }\n    }\n\n  } else if (sample_bit == AUD_BITS_24) {\n    int32_t *iir_buf;\n\n    len_mono = len >> 3;\n\n    gain_l = (mc_iir_cfg.anc_cfg_mc_l.total_gain / 512.0f) * left_gain;\n\n    if (mc_iir_cfg.anc_cfg_mc_l.iir_counter == 0 ||\n        mc_iir_cfg.anc_cfg_mc_l.iir_bypass_flag) {\n      iir_buf = (int32_t *)buf;\n      for (int j = 0; j < len_mono; j++) {\n        x0 = *iir_buf * gain_l;\n        *iir_buf++ = iir_ssat_24bits(x0);\n        iir_buf++;\n      }\n    } else {\n      for (int i = 0; i < mc_iir_cfg.anc_cfg_mc_l.iir_counter; i++) {\n        // Coef\n        coefs = mc_iir_cfg.anc_cfg_mc_l.iir_coef[i].coef_a;\n        a0 = *coefs++;\n        a1 = *coefs++;\n        a2 = *coefs;\n        coefs = mc_iir_cfg.anc_cfg_mc_l.iir_coef[i].coef_b;\n        b0 = *coefs++;\n        b1 = *coefs++;\n        b2 = *coefs;\n\n        a1 = a1 / a0;\n        a2 = a2 / a0;\n        b0 = b0 / a0;\n        b1 = b1 / a0;\n        b2 = b2 / a0;\n\n        // TRACE(7,\"[%d] %f, %f, %f, %f, %f, %f\", i, a0, a1, a2, b0, b1, b2);\n\n        // Left\n        history = mc_iir_cfg.mc_history_l[i];\n        x1 = *history++;\n        x2 = *history++;\n        y1 = *history++;\n        y2 = *history;\n\n        iir_buf = (int32_t *)buf;\n        if (i == 0) {\n          for (int j = 0; j < len_mono; j++) {\n            // Left channel\n            x0 = *iir_buf * gain_l;\n            y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n            y2 = y1;\n            y1 = y0;\n            x2 = x1;\n            x1 = x0;\n            *iir_buf++ = iir_ssat_24bits(y0);\n            iir_buf++;\n          }\n        } else {\n          for (int j = 0; j < len_mono; j++) {\n            // Left channel\n            x0 = *iir_buf;\n            y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n            y2 = y1;\n            y1 = y0;\n            x2 = x1;\n            x1 = x0;\n            *iir_buf++ = iir_ssat_24bits(y0);\n            iir_buf++;\n          }\n        }\n        // Left\n        history = mc_iir_cfg.mc_history_l[i];\n        *history++ = x1;\n        *history++ = x2;\n        *history++ = y1;\n        *history = y2;\n      }\n    }\n\n    gain_r = (mc_iir_cfg.anc_cfg_mc_r.total_gain / 512.0f) * right_gain;\n    if (mc_iir_cfg.anc_cfg_mc_r.iir_counter == 0 ||\n        mc_iir_cfg.anc_cfg_mc_r.iir_bypass_flag) {\n      iir_buf = (int32_t *)buf;\n      iir_buf++;\n      for (int j = 0; j < len_mono; j++) {\n        x0 = *iir_buf * gain_r;\n        *iir_buf++ = iir_ssat_24bits(x0);\n        iir_buf++;\n      }\n\n    } else {\n      for (int i = 0; i < mc_iir_cfg.anc_cfg_mc_r.iir_counter; i++) {\n        // Coef\n        coefs = mc_iir_cfg.anc_cfg_mc_r.iir_coef[i].coef_a;\n        a0 = *coefs++;\n        a1 = *coefs++;\n        a2 = *coefs;\n        coefs = mc_iir_cfg.anc_cfg_mc_r.iir_coef[i].coef_b;\n        b0 = *coefs++;\n        b1 = *coefs++;\n        b2 = *coefs;\n\n        a1 = a1 / a0;\n        a2 = a2 / a0;\n        b0 = b0 / a0;\n        b1 = b1 / a0;\n        b2 = b2 / a0;\n\n        // TRACE(7,\"[%d] %f, %f, %f, %f, %f, %f\", i, a0, a1, a2, b0, b1, b2);\n\n        // right\n        history = mc_iir_cfg.mc_history_r[i];\n        x1 = *history++;\n        x2 = *history++;\n        y1 = *history++;\n        y2 = *history;\n\n        iir_buf = (int32_t *)buf;\n        iir_buf++;\n        if (i == 0) {\n          for (int j = 0; j < len_mono; j++) {\n            // right channel\n            x0 = *iir_buf * gain_r;\n            y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n            y2 = y1;\n            y1 = y0;\n            x2 = x1;\n            x1 = x0;\n            *iir_buf++ = iir_ssat_24bits(y0);\n            iir_buf++;\n          }\n        } else {\n          for (int j = 0; j < len_mono; j++) {\n            // right channel\n            x0 = *iir_buf;\n            y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n            y2 = y1;\n            y1 = y0;\n            x2 = x1;\n            x1 = x0;\n            *iir_buf++ = iir_ssat_24bits(y0);\n            iir_buf++;\n          }\n        }\n        // right\n        history = mc_iir_cfg.mc_history_r[i];\n        *history++ = x1;\n        *history++ = x2;\n        *history++ = y1;\n        *history = y2;\n      }\n    }\n\n  } else {\n    ASSERT(false, \"Can't support sample bit mode:%d\", sample_bit);\n  }\n\n  return 0;\n}\n\nSRAM_TEXT_LOC int anc_mc_run_mono(uint8_t *buf, int len, float left_gain,\n                                  enum AUD_BITS_T sample_bit) {\n  int len_mono;\n  int num;\n  float gain_l = 0;\n  int32_t *coefs = NULL;\n  float *history = NULL;\n\n  // Left\n  float x0, x1, x2;\n  float y0, y1, y2;\n\n  // Coefs\n  float POSSIBLY_UNUSED a0, a1, a2;\n  float b0, b1, b2;\n\n  if (sample_bit == AUD_BITS_16) {\n    int16_t *iir_buf;\n\n    len_mono = len >> 1;\n\n    gain_l = (mc_iir_cfg.anc_cfg_mc_l.total_gain / 512.0f) * left_gain;\n    num = mc_iir_cfg.anc_cfg_mc_l.iir_counter;\n\n    if (num == 0 || mc_iir_cfg.anc_cfg_mc_l.iir_bypass_flag) {\n      iir_buf = (int16_t *)buf;\n\n      for (int j = 0; j < len_mono; j++) {\n        x0 = *iir_buf * gain_l;\n        *iir_buf++ = iir_ssat_16bits(x0);\n      }\n\n      return 0;\n    }\n\n    for (int i = 0; i < num; i++) {\n      // Coef\n      coefs = mc_iir_cfg.anc_cfg_mc_l.iir_coef[i].coef_a;\n      a0 = *coefs++;\n      a1 = *coefs++;\n      a2 = *coefs;\n      coefs = mc_iir_cfg.anc_cfg_mc_l.iir_coef[i].coef_b;\n      b0 = *coefs++;\n      b1 = *coefs++;\n      b2 = *coefs;\n\n      a1 = a1 / a0;\n      a2 = a2 / a0;\n      b0 = b0 / a0;\n      b1 = b1 / a0;\n      b2 = b2 / a0;\n\n      //      TRACE(7,\"[%d] %f, %f, %f, %f, %f, %f\", i, a0, a1, a2, b0, b1, b2);\n\n      // Left\n      history = mc_iir_cfg.mc_history_l[i];\n      x1 = *history++;\n      x2 = *history++;\n      y1 = *history++;\n      y2 = *history;\n\n      iir_buf = (int16_t *)buf;\n      if (i == 0) {\n        for (int j = 0; j < len_mono; j++) {\n          // Left channel\n          x0 = *iir_buf * gain_l;\n          y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n          y2 = y1;\n          y1 = y0;\n          x2 = x1;\n          x1 = x0;\n          *iir_buf++ = iir_ssat_16bits(y0);\n        }\n      } else {\n        for (int j = 0; j < len_mono; j++) {\n          // Left channel\n          x0 = *iir_buf;\n          y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n          y2 = y1;\n          y1 = y0;\n          x2 = x1;\n          x1 = x0;\n          *iir_buf++ = iir_ssat_16bits(y0);\n        }\n      }\n      // Left\n      history = mc_iir_cfg.mc_history_l[i];\n      *history++ = x1;\n      *history++ = x2;\n      *history++ = y1;\n      *history = y2;\n    }\n\n  } else if (sample_bit == AUD_BITS_24) {\n    int32_t *iir_buf;\n\n    len_mono = len >> 2;\n\n    gain_l = (mc_iir_cfg.anc_cfg_mc_l.total_gain / 512.0f) * left_gain;\n    num = mc_iir_cfg.anc_cfg_mc_l.iir_counter;\n\n    if (num == 0) {\n      iir_buf = (int32_t *)buf;\n\n      for (int j = 0; j < len_mono; j++) {\n        x0 = *iir_buf * gain_l;\n        *iir_buf++ = iir_ssat_24bits(x0);\n      }\n\n      return 0;\n    }\n\n    for (int i = 0; i < num; i++) {\n      // Coef\n      coefs = mc_iir_cfg.anc_cfg_mc_l.iir_coef[i].coef_a;\n      a0 = *coefs++;\n      a1 = *coefs++;\n      a2 = *coefs;\n      coefs = mc_iir_cfg.anc_cfg_mc_l.iir_coef[i].coef_b;\n      b0 = *coefs++;\n      b1 = *coefs++;\n      b2 = *coefs;\n\n      a1 = a1 / a0;\n      a2 = a2 / a0;\n      b0 = b0 / a0;\n      b1 = b1 / a0;\n      b2 = b2 / a0;\n\n      //        TRACE(7,\"[%d] %f, %f, %f, %f, %f, %f\", i, a0, a1, a2, b0, b1,\n      //        b2);\n\n      // Left\n      history = mc_iir_cfg.mc_history_l[i];\n      x1 = *history++;\n      x2 = *history++;\n      y1 = *history++;\n      y2 = *history;\n\n      iir_buf = (int32_t *)buf;\n      if (i == 0) {\n        for (int j = 0; j < len_mono; j++) {\n          // Left channel\n          x0 = *iir_buf * gain_l;\n          y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n          y2 = y1;\n          y1 = y0;\n          x2 = x1;\n          x1 = x0;\n          *iir_buf++ = iir_ssat_24bits(y0);\n        }\n      } else {\n        for (int j = 0; j < len_mono; j++) {\n          // Left channel\n          x0 = *iir_buf;\n          y0 = x0 * b0 + x1 * b1 + x2 * b2 - y1 * a1 - y2 * a2;\n          y2 = y1;\n          y1 = y0;\n          x2 = x1;\n          x1 = x0;\n          *iir_buf++ = iir_ssat_24bits(y0);\n        }\n      }\n      // Left\n      history = mc_iir_cfg.mc_history_l[i];\n      *history++ = x1;\n      *history++ = x2;\n      *history++ = y1;\n      *history = y2;\n    }\n\n  } else {\n    ASSERT(false, \"Can't support sample bit mode:%d\", sample_bit);\n  }\n\n  return 0;\n}\n#endif\n#ifdef USB_ANC_MC_EQ_TUNING\nstruct message_t {\n  struct msg_hdr_t {\n    unsigned char prefix;\n    unsigned char type;\n    unsigned char seq;\n    unsigned char len;\n  } hdr;\n  unsigned char data[255];\n};\n\n#define PREFIX_CHAR 0xBE\n\nenum MSG_TYPE {\n  TYPE_SYS = 0x00,\n  TYPE_READ = 0x01,\n  TYPE_WRITE = 0x02,\n  TYPE_BULK_READ = 0x03,\n  TYPE_SYNC = 0x50,\n  TYPE_SIG_INFO = 0x51,\n  TYPE_SIG = 0x52,\n  TYPE_CODE_INFO = 0x53,\n  TYPE_CODE = 0x54,\n  TYPE_RUN = 0x55,\n  TYPE_SECTOR_SIZE = 0x60,\n  TYPE_ERASE_BURN_START = 0x61,\n  TYPE_ERASE_BURN_DATA = 0x62,\n  TYPE_OBSOLETED_63 = 0x63,\n  TYPE_OBSOLETED_64 = 0x64,\n  TYPE_FLASH_CMD = 0x65,\n  TYPE_GET_SECTOR_INFO = 0x66,\n  TYPE_SEC_REG_ERASE_BURN_START = 0x67,\n  TYPE_SEC_REG_ERASE_BURN_DATA = 0x68,\n\n  // Extended types\n  TYPE_PROD_TEST = 0x81,\n  TYPE_RUNTIME_CMD = 0x82,\n  TYPE_BT_CALIB_CMD = 0x83,\n  TYPE_PROTO_EL = 0xA0,\n\n  TYPE_INVALID = 0xFF,\n};\n\nenum ERR_CODE {\n  ERR_NONE = 0x00,\n  ERR_LEN = 0x01,\n  ERR_CHECKSUM = 0x02,\n  ERR_NOT_SYNC = 0x03,\n  ERR_NOT_SEC = 0x04,\n  ERR_SYNC_WORD = 0x05,\n  ERR_SYS_CMD = 0x06,\n  ERR_DATA_ADDR = 0x07,\n  ERR_DATA_LEN = 0x08,\n  ERR_ACCESS_RIGHT = 0x09,\n\n  ERR_TYPE_INVALID = 0x0F,\n\n  // ERR_BOOT_OK = 0x10,\n  ERR_BOOT_MAGIC = 0x11,\n  ERR_BOOT_SEC = 0x12,\n  ERR_BOOT_HASH_TYPE = 0x13,\n  ERR_BOOT_KEY_TYPE = 0x14,\n  ERR_BOOT_KEY_LEN = 0x15,\n  ERR_BOOT_SIG_LEN = 0x16,\n  ERR_BOOT_SIG = 0x17,\n  ERR_BOOT_CRC = 0x18,\n  ERR_BOOT_LEN = 0x19,\n  ERR_SIG_CODE_SIZE = 0x1A,\n  ERR_SIG_SIG_LEN = 0x1B,\n  ERR_SIG_INFO_MISSING = 0x1C,\n  ERR_BOOT_KEY_ID = 0x1D,\n  ERR_BOOT_HASH = 0x1E,\n\n  ERR_CODE_OK = 0x20,\n  ERR_BOOT_MISSING = 0x21,\n  ERR_CODE_SIZE_SIG = 0x22,\n  ERR_CODE_ADDR_SIZE = 0x23,\n  ERR_CODE_INFO_MISSING = 0x24,\n  ERR_CODE_CRC = 0x25,\n  ERR_CODE_SIG = 0x26,\n\n  ERR_CODE_MISSING = 0x31,\n  ERR_VERSION = 0x32,\n\n  ERR_BURN_OK = 0x60,\n  ERR_SECTOR_SIZE = 0x61,\n  ERR_SECTOR_SEQ_OVERFLOW = 0x62,\n  ERR_BURN_INFO_MISSING = 0x63,\n  ERR_SECTOR_DATA_LEN = 0x64,\n  ERR_SECTOR_DATA_CRC = 0x65,\n  ERR_SECTOR_SEQ = 0x66,\n  ERR_ERASE_FLSH = 0x67,\n  ERR_BURN_FLSH = 0x68,\n  ERR_VERIFY_FLSH = 0x69,\n  ERR_FLASH_CMD = 0x6A,\n\n  ERR_TYPE_MISMATCHED = 0xE1,\n  ERR_SEQ_MISMATCHED = 0xE2,\n  ERR_BUF_TOO_SMALL = 0xE3,\n\n  ERR_INTERNAL = 0xFF,\n};\n\n//#define PROGRAMMER_ANC_DEBUG\nenum ANC_CMD_T {\n  ANC_CMD_CLOSE = 0,\n  ANC_CMD_OPEN = 1,\n  ANC_CMD_GET_CFG = 2,\n  ANC_CMD_APPLY_CFG = 3,\n  ANC_CMD_CFG_SETUP = 4,\n  ANC_CMD_CHANNEL_SETUP = 5,\n  ANC_CMD_SET_SAMP_RATE = 6,\n};\n\nenum FLASH_CMD_TYPE {\n  FLASH_CMD_ERASE_SECTOR = 0x21,\n  FLASH_CMD_BURN_DATA = 0x22,\n  FLASH_CMD_ERASE_CHIP = 0x31,\n  FLASH_CMD_SEC_REG_ERASE = 0x41,\n  FLASH_CMD_SEC_REG_BURN = 0x42,\n  FLASH_CMD_SEC_REG_LOCK = 0x43,\n  FLASH_CMD_SEC_REG_READ = 0x44,\n  FLASH_CMD_ENABLE_REMAP = 0x51,\n  FLASH_CMD_DISABLE_REMAP = 0x52,\n};\n\nenum PROD_TEST_CMD_T {\n  PROD_TEST_CMD_ANC = 0x00000001,\n};\n\nstatic struct_anc_cfg g_anc_config;\n\n#define MAX_READ_DATA_LEN 255\n#define MAX_WRITE_DATA_LEN 255\n\nstatic struct message_t recv_msg;\nstatic struct message_t send_msg = {\n    {\n        PREFIX_CHAR,\n    },\n};\n\n#define MAX_SNED_MSG_QUEUE (10)\nstatic unsigned int send_msg_push_seq = 0;\nstatic unsigned int send_msg_pop_seq = 0;\nstatic struct message_t send_msg_queue[MAX_SNED_MSG_QUEUE];\n\nstatic uint8_t pcsuppt_anc_type = ANC_NOTYPE;\nstatic enum AUD_SAMPRATE_T anc_sample_rate;\n\nstatic unsigned int burn_addr;\nstatic unsigned int burn_total_len;\nstatic unsigned int sector_size;\nstatic unsigned int sector_cnt;\nstatic unsigned int last_sector_len;\nstatic unsigned int cur_sector_seq;\nstatic unsigned int burn_len;\n\nvoid anc_set_gpio(enum HAL_GPIO_PIN_T io_pin, bool set_flag) {\n  // #define ANC_SET_GPIO_PIN   HAL_IOMUX_PIN_P2_4\n  struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_anc_set_gpio[1] = {\n      {io_pin, HAL_IOMUX_FUNC_AS_GPIO, HAL_IOMUX_PIN_VOLTAGE_VIO,\n       HAL_IOMUX_PIN_NOPULL},\n  };\n\n  hal_iomux_init(pinmux_anc_set_gpio, ARRAY_SIZE(pinmux_anc_set_gpio));\n  hal_gpio_pin_set_dir(io_pin, HAL_GPIO_DIR_OUT, 0);\n  if (set_flag)\n    hal_gpio_pin_set(io_pin);\n  else\n    hal_gpio_pin_clr(io_pin);\n}\n\n#define MSG_TOTAL_LEN(msg) (sizeof((msg)->hdr) + (msg)->hdr.len + 1)\n\n#define TRACE_TIME(num, str, ...)                                              \\\n  TRACE(1 + num, \"[%05u] \" str, TICKS_TO_MS(hal_sys_timer_get()), ##__VA_ARGS__)\n\nstatic unsigned char check_sum(const unsigned char *buf, unsigned char len) {\n  int i;\n  unsigned char sum = 0;\n\n  for (i = 0; i < len; i++) {\n    sum += buf[i];\n  }\n\n  return sum;\n}\nstatic void trace_stage_info(const char *name) {\n  TRACE_TIME(1, \"------ %s ------\", name);\n}\nstatic void trace_rw_len_err(const char *name, unsigned int len) {\n  TRACE(2, \"[%s] Length error: %u\", name, len);\n}\nstatic void trace_rw_info(const char *name, unsigned int addr,\n                          unsigned int len) {\n  // TRACE(3,\"[%s] addr=0x%08X len=%u\", name, addr, len);\n}\n\nstatic void trace_flash_cmd_info(const char *name) {\n  TRACE_TIME(1, \"- %s -\", name);\n}\n\nstatic void trace_flash_cmd_len_err(const char *name, unsigned int len) {\n  TRACE(2, \"Invalid %s cmd param len: %u\", name, len);\n}\n\nstatic void trace_flash_cmd_err(const char *name) {\n  TRACE_TIME(1, \"%s failed\", name);\n}\n\nstatic void trace_flash_cmd_done(const char *name) {\n  TRACE_TIME(1, \"%s done\", name);\n}\n\nint send_reply(const unsigned char *payload, unsigned int len) {\n  int ret = 0;\n\n  if (len + 1 > sizeof(send_msg.data)) {\n    TRACE(1, \"Packet length too long: %u\", len);\n    return -1;\n  }\n\n  send_msg.hdr.type = recv_msg.hdr.type;\n  send_msg.hdr.seq = recv_msg.hdr.seq;\n  send_msg.hdr.len = len;\n  memcpy(&send_msg.data[0], payload, len);\n  send_msg.data[len] =\n      ~check_sum((unsigned char *)&send_msg, MSG_TOTAL_LEN(&send_msg) - 1);\n\n  send_msg_push_seq = send_msg_push_seq % MAX_SNED_MSG_QUEUE;\n  send_msg_queue[send_msg_push_seq] = send_msg;\n  send_msg_push_seq++;\n\n  return ret;\n}\nstatic enum ERR_CODE handle_read_cmd(unsigned int type, unsigned int addr,\n                                     unsigned int len) {\n  union {\n    unsigned int data[1 + (MAX_READ_DATA_LEN + 3) / 4];\n    unsigned char buf[(1 + (MAX_READ_DATA_LEN + 3) / 4) * 4];\n  } d;\n  int i;\n\n  int cnt;\n  unsigned int *p32;\n  unsigned short *p16;\n\n  const char *name = NULL;\n\n  if (type == TYPE_READ) {\n    name = \"READ\";\n  } else {\n    return ERR_INTERNAL;\n  }\n\n  if (len > MAX_READ_DATA_LEN) {\n    trace_rw_len_err(name, len);\n    return ERR_DATA_LEN;\n  }\n\n  if (type == TYPE_READ) {\n    // Handle half-word and word register reading\n    if ((len & 0x03) == 0 && (addr & 0x03) == 0) {\n      cnt = len / 4;\n      p32 = (unsigned int *)&d.data[1];\n      for (i = 0; i < cnt; i++) {\n        p32[i] = *((unsigned int *)addr + i);\n      }\n    } else if ((len & 0x01) == 0 && (addr & 0x01) == 0) {\n      cnt = len / 2;\n      p16 = (unsigned short *)&d.data[1];\n      for (i = 0; i < cnt; i++) {\n        p16[i] = *((unsigned short *)addr + i);\n      }\n    } else {\n      memcpy(&d.data[1], (unsigned char *)addr, len);\n    }\n  }\n\n  d.buf[3] = ERR_NONE;\n  send_reply((unsigned char *)&d.buf[3], 1 + len);\n\n  return ERR_NONE;\n}\nstatic enum ERR_CODE handle_write_cmd(unsigned int addr, unsigned int len,\n                                      unsigned char *wdata) {\n  unsigned int data;\n  int i;\n  int cnt;\n  const char *name = \"WRITE\";\n\n  trace_rw_info(name, addr, len);\n\n  if (len > MAX_WRITE_DATA_LEN) {\n    trace_rw_len_err(name, len);\n    return ERR_DATA_LEN;\n  }\n  // Handle half-word and word register writing\n  if ((len & 0x03) == 0 && (addr & 0x03) == 0) {\n    cnt = len / 4;\n    for (i = 0; i < cnt; i++) {\n      data = wdata[4 * i] | (wdata[4 * i + 1] << 8) | (wdata[4 * i + 2] << 16) |\n             (wdata[4 * i + 3] << 24);\n      *((unsigned int *)addr + i) = data;\n    }\n  } else if ((len & 0x01) == 0 && (addr & 0x01) == 0) {\n    cnt = len / 2;\n    for (i = 0; i < cnt; i++) {\n      data = wdata[2 * i] | (wdata[2 * i + 1] << 8);\n      *((unsigned short *)addr + i) = (unsigned short)data;\n    }\n  } else {\n    memcpy((unsigned char *)addr, wdata, len);\n  }\n\n  data = ERR_NONE;\n  send_reply((unsigned char *)&data, 1);\n\n  return ERR_NONE;\n}\nstatic struct_anc_cfg *get_anc_config(void) { return &g_anc_config; }\n\nstatic void tool_anc_close(void) {\n  if (pcsuppt_anc_type & ANC_FEEDFORWARD) {\n    anc_close(ANC_FEEDFORWARD);\n    af_anc_close(ANC_FEEDFORWARD);\n  }\n\n  if (pcsuppt_anc_type & ANC_FEEDBACK) {\n    anc_close(ANC_FEEDBACK);\n    af_anc_close(ANC_FEEDBACK);\n  }\n}\nstatic void tool_anc_open(void) {\n  if (pcsuppt_anc_type & ANC_FEEDFORWARD) {\n    af_anc_open(ANC_FEEDFORWARD, anc_sample_rate, anc_sample_rate, NULL);\n    anc_open(ANC_FEEDFORWARD);\n    anc_set_gain(512, 512, ANC_FEEDFORWARD);\n\n#ifdef AUDIO_ANC_TT_HW\n    af_anc_open(ANC_TALKTHRU, anc_sample_rate, anc_sample_rate, NULL);\n    anc_open(ANC_TALKTHRU);\n    anc_set_gain(512, 512, ANC_TALKTHRU);\n#endif\n  }\n\n  if (pcsuppt_anc_type & ANC_FEEDBACK) {\n    af_anc_open(ANC_FEEDBACK, anc_sample_rate, anc_sample_rate, NULL);\n    anc_open(ANC_FEEDBACK);\n    anc_set_gain(512, 512, ANC_FEEDBACK);\n\n#ifdef AUDIO_ANC_FB_MC_HW\n    anc_open(ANC_MUSICCANCLE);\n    anc_set_gain(512, 512, ANC_MUSICCANCLE);\n#endif\n  }\n}\n#if !defined(AUDIO_ANC_TT_HW)\n#if defined(__HW_IIR_EQ_PROCESS__)\nstatic HW_IIR_CFG_T hw_iir_cfg;\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\nstatic HW_CODEC_IIR_CFG_T hw_codec_iir_cfg;\n#endif\n#endif\n\nstatic int handle_anc_cmd(enum ANC_CMD_T cmd, const uint8_t *data,\n                          uint32_t len) {\n\n  unsigned char cret = ERR_NONE;\n\n  switch (cmd) {\n  case ANC_CMD_CLOSE: {\n    TRACE(0, \"ANC_CMD_CLOSE ------\");\n    if (len != 0) {\n      return ERR_LEN;\n    }\n    anc_disable();\n    tool_anc_close();\n    send_reply(&cret, 1);\n    break;\n  }\n  case ANC_CMD_OPEN: {\n    TRACE(0, \"ANC_CMD_OPEN ------\");\n    if (len != 0) {\n      return ERR_LEN;\n    }\n    hal_sysfreq_req(HAL_SYSFREQ_USER_ANC, HAL_CMU_FREQ_52M);\n    tool_anc_open();\n    anc_enable();\n    send_reply(&cret, 1);\n    break;\n  }\n  case ANC_CMD_GET_CFG: {\n    TRACE(0, \"ANC_CMD_GET_CFG ------\");\n\n    struct_anc_cfg *anccfg_addr = get_anc_config();\n    uint32_t addr = (uint32_t)anccfg_addr;\n\n    if (len != 0) {\n      return ERR_LEN;\n    }\n\n    TRACE(1, \"send anccfg address 0x%x ------\", addr);\n    send_reply((unsigned char *)&addr, sizeof(addr));\n    break;\n  }\n  case ANC_CMD_APPLY_CFG: {\n    TRACE(0, \"ANC_CMD_APPLY_CFG ------\");\n\n    if (len != 0) {\n      return ERR_LEN;\n    }\n    TRACE(0, \"apply anccfg ------\");\n    // best2000_prod_test_anccfg_apply();\n    struct_anc_cfg *anccfg = get_anc_config();\n\n    // process ANC\n    if (pcsuppt_anc_type & ANC_FEEDFORWARD) {\n      anc_set_cfg(anccfg, ANC_FEEDFORWARD, ANC_GAIN_NO_DELAY);\n#ifdef AUDIO_ANC_TT_HW\n      // anc_set_cfg(anccfg,ANC_TALKTHRU,ANC_GAIN_NO_DELAY);\n#endif\n    }\n\n    if (pcsuppt_anc_type & ANC_FEEDBACK) {\n      anc_set_cfg(anccfg, ANC_FEEDBACK, ANC_GAIN_NO_DELAY);\n#ifdef AUDIO_ANC_FB_MC_HW\n      anc_set_cfg(anccfg, ANC_MUSICCANCLE, ANC_GAIN_NO_DELAY);\n#endif\n    }\n#ifdef AUDIO_ANC_FB_MC\n    // process MC\n    mc_iir_cfg.anc_cfg_mc_l = anccfg->anc_cfg_mc_l;\n    mc_iir_cfg.anc_cfg_mc_r = anccfg->anc_cfg_mc_r;\n#endif\n\n    if (anccfg->anc_cfg_mc_l.adc_gain_offset == 0) {\n      hal_codec_anc_adc_enable(ANC_FEEDFORWARD);\n      analog_aud_codec_anc_enable(ANC_FEEDFORWARD, true);\n      hal_codec_anc_adc_enable(ANC_FEEDBACK);\n      analog_aud_codec_anc_enable(ANC_FEEDBACK, true);\n      TRACE(0, \"ADC UNMUTE........\");\n    } else {\n      hal_codec_anc_adc_disable(ANC_FEEDFORWARD);\n      analog_aud_codec_anc_enable(ANC_FEEDFORWARD, false);\n      hal_codec_anc_adc_disable(ANC_FEEDBACK);\n      analog_aud_codec_anc_enable(ANC_FEEDBACK, false);\n      TRACE(0, \"ADC MUTE........\");\n    }\n\n    if (anccfg->anc_cfg_mc_l.dac_gain_offset == 0) {\n      analog_aud_codec_nomute();\n      TRACE(0, \"DAC UNMUTE........\");\n    } else {\n      analog_aud_codec_mute();\n      TRACE(0, \"DAC MUTE........\");\n    }\n\n#if !defined(AUDIO_ANC_TT_HW)\n\n#if defined(__HW_IIR_EQ_PROCESS__)\n    // process EQ\n    if (anccfg->anc_cfg_tt_l.total_gain == 0) {\n      hw_iir_cfg.iir_filtes_l.iir_counter = 0;\n    } else {\n      hw_iir_cfg.iir_filtes_l.iir_counter = anccfg->anc_cfg_tt_l.iir_counter;\n    }\n\n    if (anccfg->anc_cfg_tt_r.total_gain == 0) {\n      hw_iir_cfg.iir_filtes_r.iir_counter = 0;\n    } else {\n      hw_iir_cfg.iir_filtes_r.iir_counter = anccfg->anc_cfg_tt_r.iir_counter;\n    }\n\n    for (int i = 0; i < AUD_IIR_NUM_EQ; i++) {\n      hw_iir_cfg.iir_filtes_l.iir_coef[i].coef_b[0] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_b[0]);\n      hw_iir_cfg.iir_filtes_l.iir_coef[i].coef_b[1] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_b[1]);\n      hw_iir_cfg.iir_filtes_l.iir_coef[i].coef_b[2] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_b[2]);\n      hw_iir_cfg.iir_filtes_l.iir_coef[i].coef_a[0] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_a[0]);\n      hw_iir_cfg.iir_filtes_l.iir_coef[i].coef_a[1] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_a[1]);\n      hw_iir_cfg.iir_filtes_l.iir_coef[i].coef_a[2] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_a[2]);\n\n      hw_iir_cfg.iir_filtes_r.iir_coef[i].coef_b[0] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_b[0]);\n      hw_iir_cfg.iir_filtes_r.iir_coef[i].coef_b[1] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_b[1]);\n      hw_iir_cfg.iir_filtes_r.iir_coef[i].coef_b[2] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_b[2]);\n      hw_iir_cfg.iir_filtes_r.iir_coef[i].coef_a[0] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_a[0]);\n      hw_iir_cfg.iir_filtes_r.iir_coef[i].coef_a[1] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_a[1]);\n      hw_iir_cfg.iir_filtes_r.iir_coef[i].coef_a[2] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_a[2]);\n    }\n\n    hw_iir_set_cfg(&hw_iir_cfg);\n#endif\n\n#if defined(__HW_DAC_IIR_EQ_PROCESS__)\n\n#if 0\n                 TRACE(1,\"__HW_DAC_IIR_EQ_PROCESS__ ........\");\n\n                TRACE(1,\"eq gain: %d, counter: %d iir_bypass_flag: %d \",anccfg->anc_cfg_tt_l.total_gain, anccfg->anc_cfg_tt_l.iir_counter,anccfg->anc_cfg_tt_l.iir_bypass_flag);\n                TRACE(1,\"eq dac_gain_offset %d, adc_gain_offset %d\",anccfg->anc_cfg_tt_l.dac_gain_offset, anccfg->anc_cfg_tt_l.adc_gain_offset);\n\n                for(int j = 0; j anc_cfg_tt_l.iir_coef[j].coef_b[0], \\\n                            anccfg->anc_cfg_tt_l.iir_coef[j].coef_b[1], \\\n                            anccfg->anc_cfg_tt_l.iir_coef[j].coef_b[2], \\\n                            anccfg->anc_cfg_tt_l.iir_coef[j].coef_a[0], \\\n                            anccfg->anc_cfg_tt_l.iir_coef[j].coef_a[1], \\\n                            anccfg->anc_cfg_tt_l.iir_coef[j].coef_a[2]);\n                }\n#endif\n\n    // process EQ\n    if (anccfg->anc_cfg_tt_l.total_gain == 0) {\n      hw_codec_iir_cfg.iir_filtes_l.iir_counter = 0;\n    } else {\n      hw_codec_iir_cfg.iir_filtes_l.iir_counter =\n          anccfg->anc_cfg_tt_l.iir_counter;\n    }\n\n    if (anccfg->anc_cfg_tt_r.total_gain == 0) {\n      hw_codec_iir_cfg.iir_filtes_r.iir_counter = 0;\n    } else {\n      hw_codec_iir_cfg.iir_filtes_r.iir_counter =\n          anccfg->anc_cfg_tt_r.iir_counter;\n    }\n\n    for (int i = 0; i < AUD_IIR_NUM_EQ; i++) {\n      hw_codec_iir_cfg.iir_filtes_l.iir_coef[i].coef_b[0] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_b[0]);\n      hw_codec_iir_cfg.iir_filtes_l.iir_coef[i].coef_b[1] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_b[1]);\n      hw_codec_iir_cfg.iir_filtes_l.iir_coef[i].coef_b[2] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_b[2]);\n      hw_codec_iir_cfg.iir_filtes_l.iir_coef[i].coef_a[0] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_a[0]);\n      hw_codec_iir_cfg.iir_filtes_l.iir_coef[i].coef_a[1] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_a[1]);\n      hw_codec_iir_cfg.iir_filtes_l.iir_coef[i].coef_a[2] =\n          (anccfg->anc_cfg_tt_l.iir_coef[i].coef_a[2]);\n\n      hw_codec_iir_cfg.iir_filtes_r.iir_coef[i].coef_b[0] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_b[0]);\n      hw_codec_iir_cfg.iir_filtes_r.iir_coef[i].coef_b[1] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_b[1]);\n      hw_codec_iir_cfg.iir_filtes_r.iir_coef[i].coef_b[2] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_b[2]);\n      hw_codec_iir_cfg.iir_filtes_r.iir_coef[i].coef_a[0] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_a[0]);\n      hw_codec_iir_cfg.iir_filtes_r.iir_coef[i].coef_a[1] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_a[1]);\n      hw_codec_iir_cfg.iir_filtes_r.iir_coef[i].coef_a[2] =\n          (anccfg->anc_cfg_tt_r.iir_coef[i].coef_a[2]);\n    }\n\n    if (anc_sample_rate == AUD_SAMPRATE_50781) {\n      hw_codec_iir_set_cfg(&hw_codec_iir_cfg, AUD_SAMPRATE_50781,\n                           HW_CODEC_IIR_DAC);\n    } else {\n      hw_codec_iir_set_cfg(&hw_codec_iir_cfg, AUD_SAMPRATE_48000,\n                           HW_CODEC_IIR_DAC);\n    }\n#endif\n#endif\n    send_reply(&cret, 1);\n    break;\n  }\n  case ANC_CMD_CFG_SETUP: {\n    TRACE(0, \"ANC_CMD_CFG_SETUP ------\");\n\n    int ret = 0;\n    bool diff;\n    bool high_performance_adc;\n    bool vcrystal_on;\n    uint16_t vcodec;\n    pctool_iocfg *iocfg1, *iocfg2;\n\n    if (data[0] == 1) {\n      pcsuppt_anc_type = ANC_FEEDFORWARD;\n    } else if (data[0] == 2) {\n      pcsuppt_anc_type = ANC_FEEDBACK;\n    } else if (data[0] == 3) {\n      pcsuppt_anc_type = ANC_FEEDFORWARD | ANC_FEEDBACK;\n    }\n\n    vcodec = (data[1] | (data[2] << 8));\n    diff = (bool)data[3];\n    high_performance_adc = false; //(bool)data[4]; // default 0\n    anc_sample_rate =\n        (data[5] | (data[6] << 8) | (data[7] << 16) | (data[8] << 24));\n    vcrystal_on = data[9]; //(bool)data[?]; // default 0\n    TRACE(4, \"vcodec:%d,diff:%d,anc_sample_rate:%d,vcrystal_on:%d.\", vcodec,\n          diff, anc_sample_rate, vcrystal_on);\n    ret |= pmu_debug_config_vcrystal(vcrystal_on);\n    ret |= analog_debug_config_audio_output(diff);\n    ret |= analog_debug_config_codec(vcodec);\n    ret |= analog_debug_config_low_power_adc(!high_performance_adc);\n    if (anc_sample_rate == AUD_SAMPRATE_50781) {\n      hal_cmu_audio_resample_enable();\n    } else {\n      hal_cmu_audio_resample_disable();\n    }\n    iocfg1 = (pctool_iocfg *)(&data[10]);\n    iocfg2 = (pctool_iocfg *)(&data[12]);\n    TRACE(4, \"io cfg:%d    %d    %d    %d\", iocfg1->io_pin, iocfg1->set_flag,\n          iocfg2->io_pin, iocfg2->set_flag);\n    if (iocfg1->io_pin >= 0)\n      anc_set_gpio(iocfg1->io_pin, iocfg1->set_flag);\n    if (iocfg2->io_pin >= 0)\n      anc_set_gpio(iocfg2->io_pin, iocfg2->set_flag);\n    cret = ret ? ERR_INTERNAL : ERR_NONE;\n\n    send_reply((unsigned char *)&cret, 1);\n    break;\n  }\n  case ANC_CMD_CHANNEL_SETUP: {\n\n    const enum AUD_CHANNEL_MAP_T channel_map_arr[16] = {\n        AUD_CHANNEL_MAP_CH0,        AUD_CHANNEL_MAP_CH1,\n        AUD_CHANNEL_MAP_CH2,        AUD_CHANNEL_MAP_CH3,\n        AUD_CHANNEL_MAP_CH4,        AUD_CHANNEL_MAP_CH5,\n        AUD_CHANNEL_MAP_CH6,        AUD_CHANNEL_MAP_CH7,\n        AUD_CHANNEL_MAP_DIGMIC_CH0, AUD_CHANNEL_MAP_DIGMIC_CH1,\n        AUD_CHANNEL_MAP_DIGMIC_CH2, AUD_CHANNEL_MAP_DIGMIC_CH3,\n        AUD_CHANNEL_MAP_DIGMIC_CH4, AUD_CHANNEL_MAP_DIGMIC_CH5,\n        AUD_CHANNEL_MAP_DIGMIC_CH6, AUD_CHANNEL_MAP_DIGMIC_CH7,\n    };\n    anc_ff_mic_ch_l = channel_map_arr[data[0]];\n    anc_ff_mic_ch_r = channel_map_arr[data[1]];\n    anc_fb_mic_ch_l = channel_map_arr[data[2]];\n    anc_fb_mic_ch_r = channel_map_arr[data[3]];\n    TRACE(4,\n          \"anc_ff_mic_ch_l 0x%x,anc_ff_mic_ch_r 0x%x,anc_fb_mic_ch_l \"\n          \"0x%x,anc_fb_mic_ch_r 0x%x\",\n          anc_ff_mic_ch_l, anc_ff_mic_ch_r, anc_fb_mic_ch_l, anc_fb_mic_ch_r);\n\n    hal_iomux_set_dig_mic_clock_pin(data[4]);\n    hal_iomux_set_dig_mic_data0_pin(data[5]);\n    hal_iomux_set_dig_mic_data1_pin(data[6]);\n    hal_iomux_set_dig_mic_data2_pin(data[7]);\n    uint8_t phase = data[8];\n#if defined(CHIP_BEST2300) || defined(CHIP_BEST2300P) || defined(CHIP_BEST2300A)\n    analog_debug_config_vad_mic(!!(phase & (1 << 7)));\n    phase &= ~(1 << 7);\n#endif\n    hal_codec_config_digmic_phase(phase);\n\n    send_reply((unsigned char *)&cret, 1);\n    break;\n  }\n  case ANC_CMD_SET_SAMP_RATE: {\n    bool opened;\n\n    opened = (anc_opened(ANC_FEEDFORWARD) || anc_opened(ANC_FEEDBACK));\n    if (opened) {\n      anc_disable();\n      tool_anc_close();\n    }\n    anc_sample_rate =\n        data[0] | (data[1] << 8) | (data[2] << 16) | (data[3] << 24);\n    if (anc_sample_rate == AUD_SAMPRATE_50781) {\n      hal_cmu_audio_resample_enable();\n    } else {\n      hal_cmu_audio_resample_disable();\n    }\n    if (opened) {\n      tool_anc_open();\n      anc_enable();\n    }\n    send_reply((unsigned char *)&cret, 1);\n    break;\n  }\n  }\n\n  return ERR_NONE;\n}\nstatic int get_sector_info(unsigned int addr, unsigned int *sector_addr,\n                           unsigned int *sector_len) {\n  int ret;\n\n  ret = hal_norflash_get_boundary(HAL_NORFLASH_ID_0, addr, NULL,\n                                  (uint32_t *)sector_addr);\n  if (ret) {\n    return ret;\n  }\n\n  ret = hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, NULL,\n                              (uint32_t *)sector_len, NULL);\n\n  return ret;\n}\nstatic int erase_sector(unsigned int sector_addr, unsigned int sector_len) {\n  return hal_norflash_erase(HAL_NORFLASH_ID_0, sector_addr, sector_len);\n}\n\nstatic int erase_chip(void) {\n  return hal_norflash_erase_chip(HAL_NORFLASH_ID_0);\n}\n\nstatic int burn_data(unsigned int addr, const unsigned char *data,\n                     unsigned int len) {\n  int ret;\n\n  ret = hal_norflash_write(HAL_NORFLASH_ID_0, addr, data, len);\n  return ret;\n}\n\nstatic int verify_flash_data(unsigned int addr, const unsigned char *data,\n                             unsigned int len) {\n  const unsigned char *fdata;\n  const unsigned char *mdata;\n  int i;\n\n  fdata = (unsigned char *)addr;\n  mdata = data;\n  for (i = 0; i < len; i++) {\n    if (*fdata++ != *mdata++) {\n      --fdata;\n      --mdata;\n      TRACE(4, \"*** Verify flash data failed: 0x%02X @ %p != 0x%02X @ %p\",\n            *fdata, fdata, *mdata, mdata);\n      return *fdata - *mdata;\n    }\n  }\n  return 0;\n}\nstatic enum ERR_CODE handle_sector_info_cmd(unsigned int addr) {\n  unsigned int sector_addr;\n  unsigned int sector_len;\n  unsigned char buf[9];\n  int ret;\n\n  ret = get_sector_info(addr, §or_addr, §or_len);\n  if (ret) {\n    return ERR_DATA_ADDR;\n  }\n\n  TRACE(3, \"addr=0x%08X sector_addr=0x%08X sector_len=%u\", addr, sector_addr,\n        sector_len);\n\n  buf[0] = ERR_NONE;\n  memcpy(&buf[1], §or_addr, 4);\n  memcpy(&buf[5], §or_len, 4);\n\n  send_reply(buf, 9);\n\n  return ERR_NONE;\n}\nstatic enum ERR_CODE handle_flash_cmd(enum FLASH_CMD_TYPE cmd,\n                                      unsigned char *param, unsigned int len) {\n  int ret = 0;\n  unsigned char cret = ERR_NONE;\n  const char *name = NULL;\n\n  switch (cmd) {\n  case FLASH_CMD_ERASE_SECTOR: {\n    unsigned int addr;\n    unsigned int size;\n\n    if (cmd == FLASH_CMD_ERASE_SECTOR) {\n      name = \"ERASE_SECTOR\";\n    }\n\n    trace_flash_cmd_info(name);\n\n    if (len != 8) {\n      trace_flash_cmd_len_err(name, len);\n      return ERR_LEN;\n    }\n\n    addr = param[0] | (param[1] << 8) | (param[2] << 16) | (param[3] << 24);\n    size = param[4] | (param[5] << 8) | (param[6] << 16) | (param[7] << 24);\n    TRACE(2, \"addr=0x%08X size=%u\", addr, size);\n\n    if (cmd == FLASH_CMD_ERASE_SECTOR) {\n      ret = erase_sector(addr, size);\n    }\n\n    if (ret) {\n      trace_flash_cmd_err(name);\n      return ERR_ERASE_FLSH;\n    }\n\n    trace_flash_cmd_done(name);\n\n    send_reply(&cret, 1);\n    break;\n  }\n  case FLASH_CMD_BURN_DATA: {\n    unsigned int addr;\n\n    if (cmd == FLASH_CMD_BURN_DATA) {\n      name = \"BURN_DATA\";\n    }\n\n    trace_flash_cmd_info(name);\n\n    if (len <= 4 || len > 20) {\n      trace_flash_cmd_len_err(name, len);\n      return ERR_LEN;\n    }\n\n    addr = param[0] | (param[1] << 8) | (param[2] << 16) | (param[3] << 24);\n    TRACE(2, \"addr=0x%08X len=%u\", addr, len - 4);\n\n    if (cmd == FLASH_CMD_BURN_DATA) {\n      ret = burn_data(addr, ¶m[4], len - 4);\n    }\n\n    if (ret) {\n      trace_flash_cmd_err(name);\n      return ERR_BURN_FLSH;\n    }\n\n    TRACE_TIME(1, \"%s verifying\", name);\n\n    if (cmd == FLASH_CMD_BURN_DATA) {\n      ret = verify_flash_data(addr, ¶m[4], len - 4);\n    }\n    if (ret) {\n      TRACE(1, \"%s verify failed\", name);\n      return ERR_VERIFY_FLSH;\n    }\n\n    trace_flash_cmd_done(name);\n\n    send_reply(&cret, 1);\n    break;\n  }\n  case FLASH_CMD_ERASE_CHIP: {\n    name = \"CMD_ERASE_CHIP\";\n\n    trace_flash_cmd_info(name);\n\n    if (len != 0) {\n      trace_flash_cmd_len_err(name, len);\n      return ERR_LEN;\n    }\n\n    ret = erase_chip();\n    if (ret) {\n      trace_flash_cmd_err(name);\n      return ERR_ERASE_FLSH;\n    }\n\n    trace_flash_cmd_done(name);\n\n    send_reply(&cret, 1);\n    break;\n  }\n  default:\n    TRACE(1, \"Unsupported flash cmd: 0x%x\", cmd);\n    return ERR_FLASH_CMD;\n  }\n\n  return ERR_NONE;\n}\n/*\n#define SECTOR_SIZE_64K                     (1 << 16)\n#define SECTOR_SIZE_32K                     (1 << 15)\n#define SECTOR_SIZE_16K                     (1 << 14)\n#define SECTOR_SIZE_4K                      (1 << 12)\n*/\n#define BURN_DATA_MSG_OVERHEAD 16\n\n// static const unsigned int size_mask = SECTOR_SIZE_32K | SECTOR_SIZE_4K;\n\nenum PROGRAMMER_STATE {\n  PROGRAMMER_NONE,\n  PROGRAMMER_ERASE_BURN_START,\n  PROGRAMMER_SEC_REG_ERASE_BURN_START,\n};\n\n#define BURN_BUFFER_LOC __attribute__((section(\".burn_buffer\")))\n\nstatic unsigned char BURN_BUFFER_LOC data_buf[65536 + 2048];\nstatic enum PROGRAMMER_STATE programmer_state = PROGRAMMER_NONE;\n\n/*\nstatic unsigned int count_set_bits(unsigned int i)\n{\n    i = i - ((i >> 1) & 0x55555555);\n    i = (i & 0x33333333) + ((i >> 2) & 0x33333333);\n    return (((i + (i >> 4)) & 0x0F0F0F0F) * 0x01010101) >> 24;\n}\n*/\n\nstatic int send_burn_data_reply(enum ERR_CODE code, unsigned short sec_seq,\n                                unsigned char seq) {\n  int ret = 0;\n  enum MSG_TYPE type = TYPE_INVALID;\n\n  if (programmer_state == PROGRAMMER_ERASE_BURN_START) {\n    type = TYPE_ERASE_BURN_DATA;\n  }\n\n  send_msg.hdr.type = type;\n  send_msg.hdr.seq = recv_msg.hdr.seq;\n  send_msg.hdr.len = 3;\n  send_msg.data[0] = code;\n  send_msg.data[1] = sec_seq & 0xFF;\n  send_msg.data[2] = (sec_seq >> 8) & 0xFF;\n  send_msg.data[3] =\n      ~check_sum((unsigned char *)&send_msg, MSG_TOTAL_LEN(&send_msg) - 1);\n\n  send_msg_push_seq = send_msg_push_seq % MAX_SNED_MSG_QUEUE;\n  send_msg_queue[send_msg_push_seq] = send_msg;\n  send_msg_push_seq++;\n\n  // ret = send_data((unsigned char *)&send_msg, MSG_TOTAL_LEN(&send_msg));\n  return ret;\n}\n\nint anc_cmd_receve_process(uint8_t *buf, uint32_t len) {\n  enum MSG_TYPE type;\n  enum ERR_CODE errcode = ERR_NONE;\n  unsigned char cret = ERR_NONE;\n\n  if (len > sizeof(recv_msg)) {\n    memcpy(&recv_msg, buf, sizeof(recv_msg));\n  } else {\n    memcpy(&recv_msg, buf, len);\n  }\n  // Checksum\n  if (check_sum((unsigned char *)&recv_msg, MSG_TOTAL_LEN(&recv_msg)) != 0xFF) {\n    trace_stage_info(\"Checksum error\");\n    return ERR_CHECKSUM;\n  }\n  type = recv_msg.hdr.type;\n\n  // TRACE(1,\"COMMAND:0x%x\",type);\n\n  switch (type) {\n  case TYPE_SYS: {\n    TRACE(0, \"SYS CMD\");\n    break;\n  }\n  case TYPE_READ: {\n    unsigned int addr;\n    unsigned int len;\n\n    trace_stage_info(\"READ CMD\");\n\n    addr = recv_msg.data[0] | (recv_msg.data[1] << 8) |\n           (recv_msg.data[2] << 16) | (recv_msg.data[3] << 24);\n    len = recv_msg.data[4];\n\n    TRACE(2, \"addr:0x%x,len:%d\", addr, len);\n\n    errcode = handle_read_cmd(type, addr, len);\n    if (errcode != ERR_NONE) {\n      return errcode;\n    }\n    break;\n  }\n  case TYPE_WRITE: {\n    unsigned int addr;\n    unsigned int len;\n    unsigned char *wdata;\n\n    //  trace_stage_info(\"WRITE CMD\");\n\n    addr = recv_msg.data[0] | (recv_msg.data[1] << 8) |\n           (recv_msg.data[2] << 16) | (recv_msg.data[3] << 24);\n    len = recv_msg.hdr.len - 4;\n    wdata = &recv_msg.data[4];\n\n    errcode = handle_write_cmd(addr, len, wdata);\n    if (errcode != ERR_NONE) {\n      return errcode;\n    }\n    break;\n  }\n  case TYPE_ERASE_BURN_START: {\n    TRACE(0, \"TYPE_ERASE_BURN_START CMD\");\n\n    if (programmer_state == PROGRAMMER_NONE) {\n      trace_stage_info(\"ERASE_BURN_START\");\n\n      burn_addr = recv_msg.data[0] | (recv_msg.data[1] << 8) |\n                  (recv_msg.data[2] << 16) | (recv_msg.data[3] << 24);\n      burn_total_len = recv_msg.data[4] | (recv_msg.data[5] << 8) |\n                       (recv_msg.data[6] << 16) | (recv_msg.data[7] << 24);\n      sector_size = recv_msg.data[8] | (recv_msg.data[9] << 8) |\n                    (recv_msg.data[10] << 16) | (recv_msg.data[11] << 24);\n\n      TRACE(3, \"burn_addr=0x%08X burn_total_len=%u sector_size=%u\", burn_addr,\n            burn_total_len, sector_size);\n\n      /*if ((size_mask & sector_size) == 0 || count_set_bits(sector_size) != 1)\n      {\n          TRACE(2,\"Unsupported sector_size=0x%08X mask=0x%08X\", sector_size,\n      size_mask); return ERR_SECTOR_SIZE;\n      }*/\n\n      sector_cnt = burn_total_len / sector_size;\n      last_sector_len = burn_total_len % sector_size;\n\n      if (last_sector_len) {\n        sector_cnt++;\n      } else {\n        last_sector_len = sector_size;\n      }\n\n      if (sector_cnt > 0xFFFF) {\n        TRACE(1, \"Sector seq overflow: %u\", sector_cnt);\n        return ERR_SECTOR_SEQ_OVERFLOW;\n      }\n\n      send_reply(&cret, 1);\n\n      if (burn_total_len == 0) {\n        TRACE(0, \"Burn length = 0\");\n        break;\n      }\n\n      programmer_state = PROGRAMMER_ERASE_BURN_START;\n\n      burn_len = 0;\n\n      trace_stage_info(\"ERASE_BURN_START end\");\n    } else {\n      TRACE(1, \"ERROR programmer_state status:%d\", programmer_state);\n    }\n    break;\n  }\n  case TYPE_ERASE_BURN_DATA: {\n\n    if (programmer_state == PROGRAMMER_ERASE_BURN_START) {\n      unsigned int dlen;\n      unsigned int mcrc;\n      unsigned int crc;\n\n      dlen = recv_msg.data[0] | (recv_msg.data[1] << 8) |\n             (recv_msg.data[2] << 16) | (recv_msg.data[3] << 24);\n      mcrc = recv_msg.data[4] | (recv_msg.data[5] << 8) |\n             (recv_msg.data[6] << 16) | (recv_msg.data[7] << 24);\n\n      cur_sector_seq = recv_msg.data[8] | (recv_msg.data[9] << 8);\n\n      TRACE(2, \" sec_seq=%u dlen=%u\", cur_sector_seq, dlen);\n\n      if (cur_sector_seq >= sector_cnt) {\n        TRACE(2, \"Bad sector seq: sec_seq=%u sector_cnt=%u\", cur_sector_seq,\n              sector_cnt);\n        send_burn_data_reply(ERR_SECTOR_SEQ, cur_sector_seq, recv_msg.hdr.seq);\n        return ERR_NONE;\n      }\n\n      if (((cur_sector_seq + 1) == sector_cnt && dlen != last_sector_len) ||\n          ((cur_sector_seq + 1) != sector_cnt && dlen != sector_size)) {\n        TRACE(2, \" Bad data len: sec_seq=%u dlen=%u\", cur_sector_seq, dlen);\n        send_burn_data_reply(ERR_SECTOR_DATA_LEN, cur_sector_seq,\n                             recv_msg.hdr.seq);\n        return ERR_NONE;\n      }\n\n      crc = crc32(0, (unsigned char *)&buf[BURN_DATA_MSG_OVERHEAD], dlen);\n      if (crc != mcrc) {\n        TRACE(0, \"Bad CRC\");\n        send_burn_data_reply(ERR_SECTOR_DATA_CRC, cur_sector_seq,\n                             recv_msg.hdr.seq);\n        return ERR_NONE;\n      }\n\n      if (burn_len + dlen <= burn_total_len) {\n        memcpy(&data_buf[burn_len],\n               (unsigned char *)&buf[BURN_DATA_MSG_OVERHEAD], dlen);\n        burn_len = burn_len + dlen;\n      } else {\n        TRACE(2, \"Error burn_len=%d,burn_total_len=%d\", burn_len,\n              burn_total_len);\n      }\n\n      if (burn_len == burn_total_len) {\n        TRACE(2, \"BURN_DATA addr=0x%08X len=%u .........................\",\n              burn_addr, burn_total_len);\n        int ret = burn_data(burn_addr, data_buf, burn_total_len);\n        if (ret) {\n          TRACE(2, \"### FLASH_TASK: BURN_DATA failed: addr=0x%08X len=%u ###\",\n                burn_addr, burn_total_len);\n          return 0;\n        } else {\n          TRACE(0, \"burn sucessful\");\n        }\n        ret = verify_flash_data(burn_addr, data_buf, burn_total_len);\n        if (ret) {\n          TRACE(0, \"verify failed\");\n          return ERR_VERIFY_FLSH;\n        } else {\n          TRACE(0, \"verify sucessful\");\n        }\n      }\n\n      send_burn_data_reply(ERR_BURN_OK, cur_sector_seq, recv_msg.hdr.seq);\n\n    } else {\n      TRACE(1, \"ERROR programmer_state status:%d\", programmer_state);\n    }\n    break;\n  }\n  case TYPE_FLASH_CMD: {\n    trace_stage_info(\"FLASH CMD\");\n\n    errcode = handle_flash_cmd((enum FLASH_CMD_TYPE)recv_msg.data[0],\n                               &recv_msg.data[1], recv_msg.hdr.len - 1);\n\n    TRACE_TIME(1, \"FLASH CMD ret=%d\", errcode);\n\n    if (errcode != ERR_NONE) {\n      return errcode;\n    }\n    break;\n  }\n  case TYPE_GET_SECTOR_INFO: {\n    unsigned int addr;\n\n    trace_stage_info(\"GET SECTOR INFO\");\n\n    addr = recv_msg.data[0] | (recv_msg.data[1] << 8) |\n           (recv_msg.data[2] << 16) | (recv_msg.data[3] << 24);\n\n    errcode = handle_sector_info_cmd(addr);\n    if (errcode != ERR_NONE) {\n      return errcode;\n    }\n    break;\n  }\n  case TYPE_PROD_TEST: {\n    uint32_t cmd;\n\n    trace_stage_info(\"ANC CMD\");\n\n    cmd = recv_msg.data[0] | (recv_msg.data[1] << 8) |\n          (recv_msg.data[2] << 16) | (recv_msg.data[3] << 24);\n    if (cmd != PROD_TEST_CMD_ANC) {\n      return ERR_TYPE_INVALID;\n    }\n\n    if (recv_msg.hdr.len < 5) {\n      TRACE(1, \"PROD_TEST/ANC msg length error: %d\", recv_msg.hdr.len);\n      return ERR_LEN;\n    }\n\n    errcode = handle_anc_cmd(recv_msg.data[4], &recv_msg.data[5],\n                             recv_msg.hdr.len - 5);\n    if (errcode != ERR_NONE) {\n      return errcode;\n    }\n\n    break;\n  }\n  default:\n    TRACE(1, \"COMMAND:0x%x\", type);\n\n    cret = ERR_TYPE_INVALID;\n    send_reply((unsigned char *)&cret, 1);\n    break;\n  }\n\n  return 0;\n}\nint anc_cmd_send_process(uint8_t **pbuf, uint16_t *len) {\n\n  send_msg_pop_seq = send_msg_pop_seq % MAX_SNED_MSG_QUEUE;\n  *pbuf = (uint8_t *)&send_msg_queue[send_msg_pop_seq];\n  *len = MSG_TOTAL_LEN(&send_msg);\n  send_msg_pop_seq++;\n\n  return 0;\n}\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/anc/include/anc_process.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __ANC_PROCESS_H__\n#define __ANC_PROCESS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"aud_section.h\"\n#include \"hal_aud.h\"\n\ntypedef enum {\n    ANC_NO_ERR=0,\n    ANC_TYPE_ERR,\n    ANC_GAIN_ERR,\n    ANC_OTHER_ERR,\n    ANC_ERR_TOTAL,\n}ANC_ERROR;\n\ntypedef enum {\n    ANC_GAIN_NO_DELAY=0,\n    ANC_GAIN_DELAY,\n    ANC_GAIN_TOTAL,\n}ANC_GAIN_TIME;\n\n\ntypedef struct _aud_fir_item\n{\n    int32_t    fir_bypass_flag;\n    int32_t    fir_len;\n    int32_t    fir_coef[AUD_COEF_LEN];\n} aud_fir_item;\n\ntypedef struct _struct_anc_fir_cfg\n{\n    aud_fir_item anc_fir_cfg_ff_l;\n    aud_fir_item anc_fir_cfg_ff_r;\n    aud_fir_item anc_fir_cfg_fb_l;\n    aud_fir_item anc_fir_cfg_fb_r;\n    aud_fir_item anc_fir_cfg_tt_l;\n    aud_fir_item anc_fir_cfg_tt_r;\n    aud_fir_item anc_fir_cfg_mc_l;\n    aud_fir_item anc_fir_cfg_mc_r;\n} struct_anc_fir_cfg;\n\nint anc_set_fir_cfg( struct_anc_fir_cfg * cfg, enum ANC_TYPE_T anc_type);\n\nint anc_opened(enum ANC_TYPE_T anc_type);\nint anc_open(enum ANC_TYPE_T anc_type);\nvoid anc_close(enum ANC_TYPE_T anc_type);\n\nint anc_disable(void);\nint anc_enable(void);\n\nint anc_set_cfg(const struct_anc_cfg * cfg,enum ANC_TYPE_T anc_type,ANC_GAIN_TIME anc_gain_delay);\nint anc_set_gain(int32_t gain_ch_l, int32_t gain_ch_r,enum ANC_TYPE_T anc_type);\nint anc_get_gain(int32_t *gain_ch_l, int32_t *gain_ch_r,enum ANC_TYPE_T anc_type);\nint anc_get_cfg_gain(int32_t *gain_ch_l, int32_t *gain_ch_r,enum ANC_TYPE_T anc_type);\n\n\n\n\n//void AncPduHardwarCh0(const short Coef[], short CoefLen);\n//void AncPduHardwarCh1(const short Coef[], short CoefLen);\nvoid AncPduHardwarCh0(const short Coef[], short CoefLen,short gain);\nvoid AncPduHardwarCh1(const short Coef[], short CoefLen,short gain);\n\nint anc_select_coef(enum AUD_SAMPRATE_T rate,enum ANC_INDEX index,enum ANC_TYPE_T anc_type,ANC_GAIN_TIME anc_gain_delay);\nint anc_load_cfg(void);\nint anc_cmd_receve_process(uint8_t *buf,uint32_t len);\nint anc_cmd_send_process(uint8_t **pbuf,uint16_t *len);\n\nenum ANC_INDEX anc_get_current_coef_index(void);\nenum AUD_SAMPRATE_T anc_get_current_coef_samplerate(void);\nint anc_mc_run_stereo(uint8_t *buf, int len,float left_gain,float right_gain,enum AUD_BITS_T sample_bit);\nint anc_mc_run_mono(uint8_t *buf, int len,float left_gain,enum AUD_BITS_T sample_bit);\n\nvoid anc_mc_run_init(enum AUD_SAMPRATE_T rate);\nvoid anc_mc_run_setup(enum AUD_SAMPRATE_T rate);\n\nvoid anc_disable_gain_updated_when_pass0(uint8_t on);\nvoid  anc_set_ch_map( int32_t ch_map );\nvoid  anc_fb_check_set(int32_t flag );\nvoid anc_fb_check_irq_handler(uint32_t status);\nvoid anc_fb_check_param(void);\nvoid anc_fb_check_stop_timer(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/anc/include/fftfilt2.h",
    "content": "#ifndef FFTFILT2_H\n#define FFTFILT2_H\n\n#include \n\ntypedef struct\n{\n    float *filter;\n    int filter_length;\n    int nfft;\n} FftFilt2Config;\n\nstruct FftFilt2State_;\n\ntypedef struct FftFilt2State_ FftFilt2State;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nFftFilt2State *fftfilt2_init(int sample_rate, int frame_size, const FftFilt2Config *config);\n\nvoid fftfilt2_destroy(FftFilt2State *st);\n\nvoid fftfilt2_process_float(FftFilt2State *st, float *filter,float *buf, int frame_size);\n\nvoid fftfilt2_process(FftFilt2State *st, float *filter,int16_t *buf, int frame_size);\n\nvoid fftfilt2_process2_float(FftFilt2State *st, float *filter,float *buf, int frame_size, int stride);\n\nvoid fftfilt2_process2(FftFilt2State *st, float *filter,int16_t *buf, int frame_size, int stride);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/audio/process/common/include/audio_memory.h",
    "content": "#ifndef AUDIO_MEMORY_H\n#define AUDIO_MEMORY_H\n\n#include \"string.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef VQE_SIMULATE\n\n#include \"heap_api.h\"\n\nextern heap_handle_t g_audio_heap;\n\ninline void audio_heap_init(void *begin_addr, size_t size)\n{\n    memset(begin_addr,0,size);\n    g_audio_heap = heap_register(begin_addr,size);\n}\n\ninline void *audio_malloc(size_t size)\n{\n    return heap_malloc(g_audio_heap,size);\n}\n\ninline void audio_free(void *p)\n{\n    heap_free(g_audio_heap,p);\n}\n\ninline void *audio_calloc(size_t nmemb, size_t size)\n{\n    void *ptr = audio_malloc(nmemb*size);\n    if (ptr != NULL)\n        memset(ptr,0,nmemb*size);\n    return ptr;\n}\n\ninline void *audio_realloc(void *ptr, size_t size)\n{\n    return heap_realloc(g_audio_heap,ptr,size);\n}\n\ninline void audio_memory_info(size_t *total,\n                    size_t *used,\n                    size_t *max_used)\n{\n    heap_memory_info(g_audio_heap,total,used,max_used);\n}\n#else\n#include \n#include \n\nvoid audio_heap_init(void *begin_addr, size_t size);\nvoid *audio_malloc(size_t size);\nvoid audio_free(void *p);\nvoid *audio_calloc(size_t nmemb, size_t size);\nvoid *audio_realloc(void *ptr, size_t size);\nvoid audio_memory_info(size_t *total,\n                    size_t *used,\n                    size_t *max_used);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/audio/process/drc/include/drc.h",
    "content": "#ifndef DRC_H\n#define DRC_H\n\n#include \n\n#define MAX_DRC_FILTER_CNT_SUPPORT 2\n\n#define DRC_BAND_NUM (3)\n\nenum\n{\n    DRC_FREQ_NULL = -1,\n    DRC_FREQ_50HZ = 1,\n    DRC_FREQ_63HZ,\n    DRC_FREQ_79HZ,\n    DRC_FREQ_100HZ,\n    DRC_FREQ_125HZ,\n    DRC_FREQ_158HZ,\n    DRC_FREQ_199HZ,\n    DRC_FREQ_251HZ,\n    DRC_FREQ_316HZ,\n    DRC_FREQ_398HZ,\n    DRC_FREQ_501HZ,\n    DRC_FREQ_630HZ,\n    DRC_FREQ_794HZ,\n    DRC_FREQ_1000HZ,\n    DRC_FREQ_1258HZ,\n    DRC_FREQ_1584HZ,\n    DRC_FREQ_1995HZ,\n    DRC_FREQ_2511HZ,\n    DRC_FREQ_3162HZ,\n    DRC_FREQ_3981HZ,\n    DRC_FREQ_5011HZ,\n    DRC_FREQ_6309HZ,\n    DRC_FREQ_7943HZ,\n    DRC_FREQ_10000HZ,\n    DRC_FREQ_12589HZ,\n    DRC_FREQ_15848HZ,\n    DRC_FREQ_19952HZ,\n};\n\nstruct DrcBandConfig\n{\n    int     threshold;\n    float   makeup_gain;\n    int     ratio;              // set 1, bypass, reduce mips\n    int     attack_time;\n    int     release_time;\n    float   scale_fact;         // invalid\n};\n\ntypedef struct\n{\n    int knee;\n    int filter_type[MAX_DRC_FILTER_CNT_SUPPORT]; // filter type is choosen from DRC_FREQ_NULL~DRC_FREQ_19952HZ\n    int band_num;\n    int look_ahead_time;\n    struct DrcBandConfig band_settings[DRC_BAND_NUM];\n} DrcConfig;\n\nstruct DrcState_;\n\ntypedef struct DrcState_ DrcState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nDrcState *drc_create(int sample_rate, int frame_size, int sample_bit, int ch_num, const DrcConfig *config);\n\nint32_t drc_destroy(DrcState *st);\n\nint32_t drc_set_config(DrcState *st, const DrcConfig *config);\n\nint32_t drc_process(DrcState *st, uint8_t *buf, uint32_t len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/audio/process/filters/cfg/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nifeq ($(AUDIO_RESAMPLE),1)\nCFLAGS_eq_cfg.o += -D__AUDIO_RESAMPLE__\nendif\n\nccflags-y := \\\n\t-Iservices/multimedia/audio/process/filters/include \\\n"
  },
  {
    "path": "services/multimedia/audio/process/filters/cfg/eq_cfg.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"eq_cfg.h\"\n#include \"filter_debug_trace.h\"\n#include \"hw_codec_iir_process.h\"\n#include \"hw_iir_process.h\"\n#include \"iir_process.h\"\n#include \"math.h\"\n#include \"plat_types.h\"\n#include \"tgt_hardware.h\"\n\n#define IIR_FIXED_Q (1 << 27)\n\n#define PI (3.14159265358979)\n\nstatic HW_CODEC_IIR_CFG_T hw_codec_iir_eq;\nstatic HW_IIR_CFG_T hw_iir_eq;\n\nvoid iir_lowshelf_coefs_generate(float gain, float fn, float Q, float *coefs) {\n  float A = (float)sqrtf(powf(10, gain / 20));\n  float w0 = 2 * PI * fn;\n  float alpha = (float)sinf(w0) / (2 * Q);\n\n  float a0 = (A + 1) + (A - 1) * (float)cosf(w0) + 2 * (float)sqrtf(A) * alpha;\n  float a1 = (-2 * ((A - 1) + (A + 1) * (float)cosf(w0)));\n  float a2 =\n      ((A + 1) + (A - 1) * (float)cosf(w0) - 2 * (float)sqrtf(A) * alpha);\n  float b0 =\n      (A * ((A + 1) - (A - 1) * (float)cosf(w0) + 2 * (float)sqrtf(A) * alpha));\n  float b1 = (2 * A * ((A - 1) - (A + 1) * (float)cosf(w0)));\n  float b2 =\n      (A * ((A + 1) - (A - 1) * (float)cosf(w0) - 2 * (float)sqrtf(A) * alpha));\n\n  coefs[0] = 1;\n  coefs[1] = a1 / a0;\n  coefs[2] = a2 / a0;\n  coefs[3] = b0 / a0;\n  coefs[4] = b1 / a0;\n  coefs[5] = b2 / a0;\n\n  //    IIR_TRACE(6,\"fn = %f, gain = %f, Q = %f, A = %f, w0 = %f, alpha = %f\",\n  //    fn, gain, Q, A, w0, alpha); FILTER_DEBUG_TRACE(7,\"[%s] %f, %f, %f, %f,\n  //    %f, %f\", __func__, (double)coefs[0], (double)coefs[1], (double)coefs[2],\n  //    (double)coefs[3], (double)coefs[4], (double)coefs[5]);\n}\n\nvoid iir_highshelf_coefs_generate(float gain, float fn, float Q, float *coefs) {\n  float A = (float)sqrtf(powf(10, gain / 20));\n  float w0 = 2 * PI * fn;\n  float alpha = (float)sinf(w0) / (2 * Q);\n\n  float a0 =\n      (A + 1) - (A - 1) * (float)cosf(w0) + 2 * (float)sqrtf(A) * alpha; //  a0\n  float a1 = (2 * ((A - 1) - (A + 1) * (float)cosf(w0)));                // a1\n  float a2 =\n      ((A + 1) - (A - 1) * (float)cosf(w0) - 2 * (float)sqrtf(A) * alpha); // a2\n  float b0 = (A * ((A + 1) + (A - 1) * (float)cosf(w0) +\n                   2 * (float)sqrtf(A) * alpha));              // b0\n  float b1 = (-2 * A * ((A - 1) + (A + 1) * (float)cosf(w0))); // b1\n  float b2 = (A * ((A + 1) + (A - 1) * (float)cosf(w0) -\n                   2 * (float)sqrtf(A) * alpha)); // b2\n\n  coefs[0] = 1;\n  coefs[1] = a1 / a0;\n  coefs[2] = a2 / a0;\n  coefs[3] = b0 / a0;\n  coefs[4] = b1 / a0;\n  coefs[5] = b2 / a0;\n\n  //    IIR_TRACE(6,\"fn = %f, gain = %f, Q = %f, A = %f, w0 = %f, alpha = %f\",\n  //    fn, gain, Q, A, w0, alpha);\n  //   FILTER_DEBUG_TRACE(7,\"[%s] %f, %f, %f, %f, %f, %f\", __func__,\n  //   (double)coefs[0], (double)coefs[1], (double)coefs[2], (double)coefs[3],\n  //   (double)coefs[4], (double)coefs[5]);\n}\n\n// fn: Normalized frequency\nvoid iir_peak_notch_coefs_generate(float gain, float fn, float Q,\n                                   float *coefs) {\n  //    float Fs = 1000.0 / 48000.0;\n  //    float gain = -5.0;\n  //    float fo = 1000.0;\n  //    float Q = 0.7;\n  float A = (float)sqrtf(powf(10, gain / 20));\n  float w0 = 2 * PI * fn;\n  float alpha = (float)sinf(w0) / (2 * Q);\n\n  float a0 = 1 + alpha / A;\n  float a1 = -2 * (float)cosf(w0);\n  float a2 = 1 - alpha / A;\n  float b0 = 1 + alpha * A;\n  float b1 = -2 * (float)cosf(w0);\n  float b2 = 1 - alpha * A;\n\n  coefs[0] = 1;\n  coefs[1] = a1 / a0;\n  coefs[2] = a2 / a0;\n  coefs[3] = b0 / a0;\n  coefs[4] = b1 / a0;\n  coefs[5] = b2 / a0;\n\n  //    IIR_TRACE(6,\"fn = %f, gain = %f, Q = %f, A = %f, w0 = %f, alpha = %f\",\n  //    fn, gain, Q, A, w0, alpha);\n  //   FILTER_DEBUG_TRACE(7,\"[%s] %f, %f, %f, %f, %f, %f\", __func__,\n  //   (double)coefs[0], (double)coefs[1], (double)coefs[2], (double)coefs[3],\n  //   (double)coefs[4], (double)coefs[5]);\n}\n\nvoid iir_highpass_coefs_generate(float gain, float fn, float Q, float *coefs) {\n  float w0 = 2 * PI * fn;\n  float alpha = (float)sinf(w0) / (2 * Q);\n\n  float a0 = 1 + alpha;\n  float a1 = -2 * (float)cosf(w0);\n  float a2 = 1 - alpha;\n  float b0 = (1 + (float)cosf(w0)) / 2;\n  float b1 = -(1 + (float)cosf(w0));\n  float b2 = (1 + (float)cosf(w0)) / 2;\n\n  coefs[0] = 1;\n  coefs[1] = a1 / a0;\n  coefs[2] = a2 / a0;\n  coefs[3] = b0 / a0;\n  coefs[4] = b1 / a0;\n  coefs[5] = b2 / a0;\n}\n\nvoid iir_lowspass_coefs_generate(float gain, float fn, float Q, float *coefs) {\n  float w0 = 2 * PI * fn;\n  float alpha = (float)sinf(w0) / (2 * Q);\n\n  float a0 = 1 + alpha;\n  float a1 = -2 * (float)cosf(w0);\n  float a2 = 1 - alpha;\n  float b0 = (1 - (float)cosf(w0)) / 2;\n  float b1 = 1 - (float)cosf(w0);\n  float b2 = (1 - (float)cosf(w0)) / 2;\n\n  coefs[0] = 1;\n  coefs[1] = a1 / a0;\n  coefs[2] = a2 / a0;\n  coefs[3] = b0 / a0;\n  coefs[4] = b1 / a0;\n  coefs[5] = b2 / a0;\n}\n\nfloat iir_convert_db_to_multiple(float db) { return (float)powf(10, db / 20); }\n\nvoid iir_coefs_generate(IIR_TYPE_T type, float gain, float fn, float Q,\n                        float *coefs) {\n  // As it is meaningless to set an eq at or above fs/2, just skip it when we\n  // receive such request.\n  if (fn >= 0.5f) {\n    coefs[0] = 1;\n    coefs[1] = 0;\n    coefs[2] = 0;\n    coefs[3] = 1;\n    coefs[4] = 0;\n    coefs[5] = 0;\n\n    FILTER_DEBUG_TRACE(\n        1, \"[%s] center frequency is above nyquist frequency, skip this band\",\n        __FUNCTION__);\n    return;\n  }\n\n  if (type == IIR_TYPE_LOW_SHELF) {\n    iir_lowshelf_coefs_generate(gain, fn, Q, coefs);\n  } else if (type == IIR_TYPE_PEAK) {\n    iir_peak_notch_coefs_generate(gain, fn, Q, coefs);\n  } else if (type == IIR_TYPE_HIGH_SHELF) {\n    iir_highshelf_coefs_generate(gain, fn, Q, coefs);\n  } else if (type == IIR_TYPE_LOW_PASS) {\n    iir_lowspass_coefs_generate(gain, fn, Q, coefs);\n  } else if (type == IIR_TYPE_HIGH_PASS) {\n    iir_highpass_coefs_generate(gain, fn, Q, coefs);\n  } else {\n    ASSERT(false, \"[%s] %d is not supported\", __func__, type);\n  }\n}\n\nHW_CODEC_IIR_CFG_T *hw_codec_iir_get_cfg(enum AUD_SAMPRATE_T sample_rate,\n                                         const IIR_CFG_T *ext_cfg) {\n  const IIR_CFG_T *cfg;\n  float coefs_l[6], coefs_r[6];\n  float gain0, gain1;\n  int sample_rate_iir = sample_rate;\n\n#if defined(CHIP_BEST2001)\n#ifdef __AUDIO_RESAMPLE__\n  sample_rate_iir = 50781.25f * 8;\n#else\n  switch (sample_rate) {\n  case AUD_SAMPRATE_22050:\n  case AUD_SAMPRATE_44100:\n  case AUD_SAMPRATE_88200:\n  case AUD_SAMPRATE_176400:\n  case AUD_SAMPRATE_352800:\n  case AUD_SAMPRATE_705600:\n    sample_rate_iir = 44100 * 8;\n    break;\n\n  default:\n    sample_rate_iir = 48000 * 8;\n    break;\n  };\n#endif\n#endif\n  FILTER_DEBUG_TRACE(2, \"%s,sample_rate:%d\\n\", __func__, sample_rate_iir);\n\n  hw_codec_iir_eq.iir_filtes_l.iir_bypass_flag = 1;\n  hw_codec_iir_eq.iir_filtes_r.iir_bypass_flag = 1;\n\n  if (ext_cfg) {\n    cfg = ext_cfg;\n  } else {\n    FILTER_DEBUG_TRACE(0, \"Error HW IIR CODEC cfg!\");\n    return NULL;\n  }\n\n  // Check parameter\n  ASSERT(cfg->num <= AUD_DAC_IIR_NUM_EQ, \"[%s] num(%d) is too large\", __func__,\n         cfg->num);\n\n  gain0 = iir_convert_db_to_multiple(cfg->gain0);\n  gain1 = iir_convert_db_to_multiple(cfg->gain1);\n\n  // FILTER_DEBUG_TRACE(3,\"[%s] gain0 = %f, gain1 = %f\", __func__,\n  // (double)gain0, (double)gain1);\n  FILTER_DEBUG_TRACE(2, \"[%s] len = %d\", __func__, cfg->num);\n\n  for (int i = 0; i < cfg->num; i++) {\n    if (cfg->param[i].fc < sample_rate_iir / 2) {\n      iir_coefs_generate(cfg->param[i].type, cfg->param[i].gain,\n                         cfg->param[i].fc / sample_rate_iir, cfg->param[i].Q,\n                         coefs_l);\n    } else {\n      FILTER_DEBUG_TRACE(2, \"[%s]Error iir parameters i = %d\", __func__, i);\n      coefs_l[0] = 1.0f;\n      coefs_l[1] = 0.0f;\n      coefs_l[2] = 0.0f;\n      coefs_l[3] = 1.0f;\n      coefs_l[4] = 0.0f;\n      coefs_l[5] = 0.0f;\n    }\n\n    coefs_r[0] = coefs_l[0];\n    coefs_r[1] = coefs_l[1];\n    coefs_r[2] = coefs_l[2];\n    coefs_r[3] = coefs_l[3];\n    coefs_r[4] = coefs_l[4];\n    coefs_r[5] = coefs_l[5];\n\n    if (i == 0) {\n      coefs_l[3] = coefs_l[3] * gain0;\n      coefs_l[4] = coefs_l[4] * gain0;\n      coefs_l[5] = coefs_l[5] * gain0;\n\n      coefs_r[3] = coefs_r[3] * gain1;\n      coefs_r[4] = coefs_r[4] * gain1;\n      coefs_r[5] = coefs_r[5] * gain1;\n    }\n\n    hw_codec_iir_eq.iir_filtes_l.iir_coef[i].coef_a[0] =\n        (int32_t)((double)coefs_l[0] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_l.iir_coef[i].coef_a[1] =\n        (int32_t)((double)coefs_l[1] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_l.iir_coef[i].coef_a[2] =\n        (int32_t)((double)coefs_l[2] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_l.iir_coef[i].coef_b[0] =\n        (int32_t)((double)coefs_l[3] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_l.iir_coef[i].coef_b[1] =\n        (int32_t)((double)coefs_l[4] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_l.iir_coef[i].coef_b[2] =\n        (int32_t)((double)coefs_l[5] * (int32_t)IIR_FIXED_Q);\n\n    hw_codec_iir_eq.iir_filtes_r.iir_coef[i].coef_a[0] =\n        (int32_t)((double)coefs_r[0] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_r.iir_coef[i].coef_a[1] =\n        (int32_t)((double)coefs_r[1] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_r.iir_coef[i].coef_a[2] =\n        (int32_t)((double)coefs_r[2] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_r.iir_coef[i].coef_b[0] =\n        (int32_t)((double)coefs_r[3] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_r.iir_coef[i].coef_b[1] =\n        (int32_t)((double)coefs_r[4] * (int32_t)IIR_FIXED_Q);\n    hw_codec_iir_eq.iir_filtes_r.iir_coef[i].coef_b[2] =\n        (int32_t)((double)coefs_r[5] * (int32_t)IIR_FIXED_Q);\n  }\n\n  /*\n  FILTER_DEBUG_TRACE(2,\"\\n[%s] coef_a = %d\\n\", __func__,\n  hw_codec_iir_eq.iir_filtes_l.iir_coef[0].coef_a[0]);\n  FILTER_DEBUG_TRACE(2,\"[%s] coef_a = %d\\n\", __func__,\n  hw_codec_iir_eq.iir_filtes_l.iir_coef[0].coef_a[1]);\n  FILTER_DEBUG_TRACE(2,\"[%s] coef_a = %d\\n\", __func__,\n  hw_codec_iir_eq.iir_filtes_l.iir_coef[0].coef_a[2]);\n  FILTER_DEBUG_TRACE(2,\"[%s] coef_a = %d\\n\", __func__,\n  hw_codec_iir_eq.iir_filtes_l.iir_coef[0].coef_b[0]);\n  FILTER_DEBUG_TRACE(2,\"[%s] coef_a = %d\\n\", __func__,\n  hw_codec_iir_eq.iir_filtes_l.iir_coef[0].coef_b[1]);\n  FILTER_DEBUG_TRACE(2,\"[%s] coef_a = %d\\n\", __func__,\n  hw_codec_iir_eq.iir_filtes_l.iir_coef[0].coef_b[2]);\n  */\n  if (cfg->num >= 0) {\n    hw_codec_iir_eq.iir_filtes_l.iir_bypass_flag = 0;\n    hw_codec_iir_eq.iir_filtes_r.iir_bypass_flag = 0;\n\n    hw_codec_iir_eq.iir_filtes_l.iir_counter = cfg->num;\n    hw_codec_iir_eq.iir_filtes_r.iir_counter = cfg->num;\n  }\n\n  return &hw_codec_iir_eq;\n}\n\nHW_IIR_CFG_T *hw_iir_get_cfg(enum AUD_SAMPRATE_T sample_rate,\n                             const IIR_CFG_T *ext_cfg) {\n  const IIR_CFG_T *cfg;\n  float coefs_l[6], coefs_r[6];\n  float gain0, gain1;\n\n  if (ext_cfg) {\n    cfg = ext_cfg;\n  } else {\n    FILTER_DEBUG_TRACE(0, \"Error HW IIR cfg!\");\n    return NULL;\n  }\n\n  FILTER_DEBUG_TRACE(3, \"[%s]sample_rate:%d,iir num:%d.\", __func__, sample_rate,\n                     cfg->num);\n\n  // Check parameter\n  ASSERT(cfg->num <= AUD_IIR_NUM_EQ, \"[%s] num(%d) is too large\", __func__,\n         cfg->num);\n\n  gain0 = iir_convert_db_to_multiple(cfg->gain0);\n  gain1 = iir_convert_db_to_multiple(cfg->gain1);\n\n  // FILTER_DEBUG_TRACE(3,\"[%s] gain0 = %f, gain1 = %f\", __func__,\n  // (double)gain0, (double)gain1);\n\n  for (int i = 0; i < cfg->num; i++) {\n    if (cfg->param[i].fc < sample_rate / 2) {\n      iir_coefs_generate(cfg->param[i].type, cfg->param[i].gain,\n                         cfg->param[i].fc / sample_rate, cfg->param[i].Q,\n                         coefs_l);\n    } else {\n      FILTER_DEBUG_TRACE(2, \"[%s]Error iir parameters i = %d\", __func__, i);\n      coefs_l[0] = 1.0f;\n      coefs_l[1] = 0.0f;\n      coefs_l[2] = 0.0f;\n      coefs_l[3] = 1.0f;\n      coefs_l[4] = 0.0f;\n      coefs_l[5] = 0.0f;\n    }\n\n    coefs_r[0] = coefs_l[0];\n    coefs_r[1] = coefs_l[1];\n    coefs_r[2] = coefs_l[2];\n    coefs_r[3] = coefs_l[3];\n    coefs_r[4] = coefs_l[4];\n    coefs_r[5] = coefs_l[5];\n\n    if (i == 0) {\n      coefs_l[3] = coefs_l[3] * gain0;\n      coefs_l[4] = coefs_l[4] * gain0;\n      coefs_l[5] = coefs_l[5] * gain0;\n\n      coefs_r[3] = coefs_r[3] * gain1;\n      coefs_r[4] = coefs_r[4] * gain1;\n      coefs_r[5] = coefs_r[5] * gain1;\n    }\n\n    hw_iir_eq.iir_filtes_l.iir_coef[i].coef_a[0] =\n        (int32_t)((double)coefs_l[0] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_l.iir_coef[i].coef_a[1] =\n        (int32_t)((double)coefs_l[1] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_l.iir_coef[i].coef_a[2] =\n        (int32_t)((double)coefs_l[2] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_l.iir_coef[i].coef_b[0] =\n        (int32_t)((double)coefs_l[3] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_l.iir_coef[i].coef_b[1] =\n        (int32_t)((double)coefs_l[4] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_l.iir_coef[i].coef_b[2] =\n        (int32_t)((double)coefs_l[5] * (int32_t)IIR_FIXED_Q);\n\n    hw_iir_eq.iir_filtes_r.iir_coef[i].coef_a[0] =\n        (int32_t)((double)coefs_r[0] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_r.iir_coef[i].coef_a[1] =\n        (int32_t)((double)coefs_r[1] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_r.iir_coef[i].coef_a[2] =\n        (int32_t)((double)coefs_r[2] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_r.iir_coef[i].coef_b[0] =\n        (int32_t)((double)coefs_r[3] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_r.iir_coef[i].coef_b[1] =\n        (int32_t)((double)coefs_r[4] * (int32_t)IIR_FIXED_Q);\n    hw_iir_eq.iir_filtes_r.iir_coef[i].coef_b[2] =\n        (int32_t)((double)coefs_r[5] * (int32_t)IIR_FIXED_Q);\n  }\n\n  /*\n      FILTER_DEBUG_TRACE(2,\"\\n[%s] coef_a0 = %d\\n\", __func__,\n     hw_iir_eq.iir_filtes_l.iir_coef[0].coef_a[0]); FILTER_DEBUG_TRACE(2,\"[%s]\n     coef_a1 = %d\\n\", __func__, hw_iir_eq.iir_filtes_l.iir_coef[0].coef_a[1]);\n      FILTER_DEBUG_TRACE(2,\"[%s] coef_a2 = %d\\n\", __func__,\n     hw_iir_eq.iir_filtes_l.iir_coef[0].coef_a[2]); FILTER_DEBUG_TRACE(2,\"[%s]\n     coef_b0 = %d\\n\", __func__, hw_iir_eq.iir_filtes_l.iir_coef[0].coef_b[0]);\n      FILTER_DEBUG_TRACE(2,\"[%s] coef_b1 = %d\\n\", __func__,\n     hw_iir_eq.iir_filtes_l.iir_coef[0].coef_b[1]); FILTER_DEBUG_TRACE(2,\"[%s]\n     coef_b2 = %d\\n\", __func__, hw_iir_eq.iir_filtes_l.iir_coef[0].coef_b[2]);\n  */\n  if (cfg->num >= 0) {\n    hw_iir_eq.iir_filtes_l.iir_counter = cfg->num;\n    hw_iir_eq.iir_filtes_r.iir_counter = cfg->num;\n  }\n\n  return &hw_iir_eq;\n}\n"
  },
  {
    "path": "services/multimedia/audio/process/filters/cfg/eq_cfg.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __FIR_PROCESS_H__\n#define __FIR_PROCESS_H__\n#include \"iir_process.h\"\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid iir_lowshelf_coefs_generate(float gain, float fn, float Q, float *coefs);\n\nvoid iir_highshelf_coefs_generate(float gain, float fn, float Q, float *coefs);\n\nvoid iir_peak_notch_coefs_generate(float gain, float fn, float Q, float *coefs);\n\nvoid iir_highpass_coefs_generate(float gain, float fn, float Q, float *coefs);\n\nvoid iir_lowspass_coefs_generate(float gain, float fn, float Q, float *coefs);\n\nfloat iir_convert_db_to_multiple(float db);\n\nvoid iir_coefs_generate(IIR_TYPE_T type, float gain, float fn, float Q,\n                        float *coefs);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/filters/include/dsd_process.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __DSD_PROCESS_H__\n#define __DSD_PROCESS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"hal_aud.h\"\n\n#define FIR_COEF_NUM                        384\n\ntypedef struct {\n    int8_t  gain0;\n    int8_t  gain1;\n    int16_t len;\n    int32_t coef[FIR_COEF_NUM];\n} DSD_CFG_T;\n\nint dsd_open(enum AUD_SAMPRATE_T sample_rate, enum AUD_BITS_T sample_bits,enum AUD_CHANNEL_NUM_T ch_num, void *eq_buf, uint32_t len);\nint dsd_process(uint8_t *buf, uint32_t len);\nint dsd_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/filters/include/filter_debug_trace.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __FILTER_DEBUG_TRACE__\n#define __FILTER_DEBUG_TRACE__\n#include \"hal_trace.h\"\n\n#define FILTER_DEBUG_TRACE(n, s, ...)             TRACE(n, s, ##__VA_ARGS__)\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/filters/include/fir_process.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __FIR_PROCESS_H__\n#define __FIR_PROCESS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"hal_aud.h\"\n\n#define FIR_COEF_NUM                        384\n\ntypedef struct {\n    float  gain;\n    int32_t len;\n    int32_t coef[FIR_COEF_NUM];\n} FIR_CFG_T;\n\nint fir_needed_size(enum AUD_BITS_T sample_bits, int32_t frame_size);\nint fir_open(enum AUD_SAMPRATE_T sample_rate, enum AUD_BITS_T sample_bits,enum AUD_CHANNEL_NUM_T ch_num, void *eq_buf, uint32_t len);\nint fir_set_cfg(const FIR_CFG_T *cfg);\nint fir_set_cfg_ch(const FIR_CFG_T *cfg,enum AUD_CHANNEL_NUM_T ch);\nint fir_run(uint8_t *buf, uint32_t len);\nint fir_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/audio/process/filters/include/hw_codec_iir_process.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HW_CODEC_IIR_PROCESS_H__\n#define __HW_CODEC_IIR_PROCESS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"hal_aud.h\"\n\n#if defined(CHIP_BEST1402) ||defined(CHIP_BEST2001) ||defined(CHIP_BEST2300A)\n#define AUD_DAC_IIR_NUM_EQ                        (20)\n#else\n#define AUD_DAC_IIR_NUM_EQ                        (8)\n#endif\n\ntypedef enum {\n    HW_CODEC_IIR_NO_ERR=0,\n    HW_CODEC_IIR_TYPE_ERR,\n    HW_CODEC_IIR_SAMPLERATE_ERR,\n    HW_CODEC_IIR_COUNTER_ERR,\n    HW_CODEC_IIR_OTHER_ERR,\n    HW_CODEC_IIR_ERR_TOTAL,\n}HW_CODEC_IIR_ERROR;\n\ntypedef enum  {\n    HW_CODEC_IIR_NOTYPE = 0,\n    HW_CODEC_IIR_DAC,\n    HW_CODEC_IIR_ADC,\n}HW_CODEC_IIR_TYPE_T;\n\ntypedef struct _hw_codec_iir_coefs\n{\n    int32_t coef_b[3];\n    int32_t coef_a[3];\n}hw_codec_iir_coefs;\n\ntypedef struct _hw_codec_iir_coefs_f\n{\n    float coef_b[3];\n    float coef_a[3];\n}hw_codec_iir_coefs_f;\n\ntypedef struct _hw_codec_iir_filters\n{\n    uint16_t iir_bypass_flag;\n    uint16_t iir_counter;\n    hw_codec_iir_coefs iir_coef[AUD_DAC_IIR_NUM_EQ];\n} HW_CODEC_IIR_FILTERS_T;\n\ntypedef struct _hw_codec_iir_filters_f\n{\n    uint16_t iir_bypass_flag;\n    uint16_t iir_counter;\n    hw_codec_iir_coefs_f iir_coef[AUD_DAC_IIR_NUM_EQ];\n} HW_CODEC_IIR_FILTERS_F;\n\ntypedef struct _hw_codec_iir_cfg_t\n{\n    HW_CODEC_IIR_FILTERS_T iir_filtes_l;\n    HW_CODEC_IIR_FILTERS_T iir_filtes_r;\n} HW_CODEC_IIR_CFG_T;\n\ntypedef struct _hw_codec_iir_cfg_f\n{\n    HW_CODEC_IIR_FILTERS_F iir_filtes_l;\n    HW_CODEC_IIR_FILTERS_F iir_filtes_r;\n} HW_CODEC_IIR_CFG_F;\n\nint hw_codec_iir_open(enum AUD_SAMPRATE_T sample_rate,  HW_CODEC_IIR_TYPE_T hw_iir_type, int32_t ch_map);\nint hw_codec_iir_set_cfg( HW_CODEC_IIR_CFG_T *cfg, enum AUD_SAMPRATE_T sample_rate, HW_CODEC_IIR_TYPE_T hw_iir_type);\nint hw_codec_iir_close( HW_CODEC_IIR_TYPE_T hw_iir_type);\nHW_CODEC_IIR_CFG_T *hw_codec_iir_get_cfg(enum AUD_SAMPRATE_T sample_rate,const IIR_CFG_T* ext_cfg);\nint hw_codec_iir_set_coefs(HW_CODEC_IIR_CFG_F *cfg, HW_CODEC_IIR_TYPE_T hw_iir_type);\n\nint hal_codec_iir_dump(HW_CODEC_IIR_CFG_T *cfg);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/filters/include/hw_iir_process.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HW_IIR_PROCESS_H__\n#define __HW_IIR_PROCESS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"hal_aud.h\"\n#include \"iir_process.h\"\n\n#define AUD_IIR_NUM_EQ                        (8)\n\ntypedef enum {\n    HW_IIR_NO_ERR=0,\n    HW_IIR_TYPE_ERR,\n    HW_IIR_SAMPLERATE_ERR,\n    HW_IIR_COUNTER_ERR,\n    HW_IIR_OTHER_ERR,\n    HW_IIR_ERR_TOTAL,\n}HW_IIR_ERROR;\n\ntypedef struct _hw_iir_coefs_t\n{\n    int32_t coef_b[3];\n    int32_t coef_a[3];\n}HW_IIR_COEFS_T;\n\ntypedef struct _hw_iir_filters_t\n{\n    uint16_t iir_counter;\n    HW_IIR_COEFS_T iir_coef[AUD_IIR_NUM_EQ];\n} HW_IIR_FILTERS_T;\n\ntypedef struct _hw_iir_cfg_t\n{\n    HW_IIR_FILTERS_T iir_filtes_l;\n    HW_IIR_FILTERS_T iir_filtes_r;\n} HW_IIR_CFG_T;\n\nint hw_iir_needed_size(enum AUD_BITS_T sample_bits, int32_t frame_size);\nint hw_iir_open(enum AUD_SAMPRATE_T sample_rate, enum AUD_BITS_T sample_bits,enum AUD_CHANNEL_NUM_T ch_num, void *eq_buf, uint32_t len);\nint hw_iir_set_cfg(HW_IIR_CFG_T *cfg);\nint hw_iir_run(uint8_t *buf, uint32_t len);\nint hw_iir_close(void);\nHW_IIR_CFG_T *hw_iir_get_cfg(enum AUD_SAMPRATE_T sample_rate, const IIR_CFG_T* ext_cfg);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/filters/include/iir_process.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __IIR_PROCESS_H__\n#define __IIR_PROCESS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"hal_aud.h\"\n\n#ifdef USB_EQ_TUNING\n\n#ifdef __SW_IIR_EQ_PROCESS__\n#define SW_IIR_PARAM_NUM        (2)\n#else\n#define SW_IIR_PARAM_NUM        (0)\n#endif\n\n#ifdef __HW_DAC_IIR_EQ_PROCESS__\n#define HW_DAC_IIR_PARAM_NUM    (8)\n#else\n#define HW_DAC_IIR_PARAM_NUM    (0)\n#endif\n\n#define IIR_PARAM_NUM  (SW_IIR_PARAM_NUM + HW_DAC_IIR_PARAM_NUM)\n\n#else\n\n#define IIR_PARAM_NUM           (20)\n\n#endif\n\ntypedef enum {\n    IIR_TYPE_LOW_SHELF = 0,\n    IIR_TYPE_PEAK,\n    IIR_TYPE_HIGH_SHELF,\n    IIR_TYPE_LOW_PASS,\n    IIR_TYPE_HIGH_PASS,\n    IIR_TYPE_NUM\n} IIR_TYPE_T;\n\ntypedef struct {\n    IIR_TYPE_T  type;\n    float       gain;\n    float       fc;\n    float       Q;\n} IIR_PARAM_T;\n\ntypedef struct {\n    float   gain0;\n    float   gain1;\n    int     num;\n    IIR_PARAM_T param[IIR_PARAM_NUM];\n} IIR_CFG_T;\n\nint iir_open(enum AUD_SAMPRATE_T sample_rate, enum AUD_BITS_T sample_bits,enum AUD_CHANNEL_NUM_T ch_num);\nint iir_set_cfg(const IIR_CFG_T *cfg);\nint iir_set_cfg_ch(const IIR_CFG_T *cfg, enum AUD_CHANNEL_NUM_T ch);\nint iir_run(uint8_t *buf, uint32_t len);\nint iir_close(void);\n\nint iir_set_gain_and_num(float gain0, float gain1, int num);\nint iir_set_param(uint8_t index, const IIR_PARAM_T *param);\n\nvoid iir_update_cfg_tbl(uint8_t *buf, uint32_t  len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/fir2iir/include/fir2iir.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __FIR2IIR_H__\n#define __FIR2IIR_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// TODO: Add fir2iir_create and fir2iir_destroy functions.\n\n// weight: length is 512\nvoid fir2iir_process(double *RealCoeffs,double *ImagCoeffs,double iircoefaa[10][3], double iircoefbb[10][3], int numorder, int denorder, int maxiter, double *weight);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/audio/process/integer_resampling/include/integer_resampling.h",
    "content": "#ifndef __INTEGER_RESAMPLING_H__\n#define __INTEGER_RESAMPLING_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum  {\n    INTEGER_RESAMPLING_ITEM_48K_TO_16K = 0,\n\n    INTEGER_RESAMPLING_ITEM_NUM\n} INTEGER_RESAMPLING_ITEM_T;\n\nstruct IntegerResamplingState_;\n\ntypedef struct IntegerResamplingState_ IntegerResamplingState;\n\n// Creat a instance from integer_resampling module/class\nIntegerResamplingState *integer_resampling_create(int32_t frame_size, int32_t channel_num, INTEGER_RESAMPLING_ITEM_T item, void *ext_alloc(int));\n\n// Destory a integer_resampling instance\nint32_t integer_resampling_destroy(IntegerResamplingState *st);\n\n// Get/set some value or enable/disable some function\nint32_t integer_resampling_ctl(IntegerResamplingState *st, int32_t ctl, void *ptr);\n\n// Process speech stream\nint32_t integer_resampling_process(IntegerResamplingState *st, int16_t *pcm_in, int32_t pcm_len, int16_t *pcm_out);\n\n// Debug integer_resampling instance\nint32_t integer_resampling_dump(IntegerResamplingState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/limiter/include/limiter.h",
    "content": "#ifndef LIMITER_H\n#define LIMITER_H\n\n#include \n\ntypedef struct\n{\n    int32_t knee;\n    int32_t look_ahead_time;\n    int32_t threshold;\n    float makeup_gain;\n    int32_t ratio;              // reserved\n    int32_t attack_time;\n    int32_t release_time;\n} LimiterConfig;\n\nstruct LimiterState_;\n\ntypedef struct LimiterState_ LimiterState;\n\nLimiterState *limiter_create(int32_t sample_rate, int32_t frame_size, int32_t sample_bit, int32_t channel_number, const LimiterConfig *config);\n\nint32_t limiter_destroy(LimiterState *st);\n\nint32_t limiter_set_config(LimiterState *st, const LimiterConfig *config);\n\nint32_t limiter_process(LimiterState *st, uint8_t *buf, int32_t len);\n\n#endif"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y := \\\n\t-Iservices/multimedia/audio/process/resample/include \\\n\nifeq ($(RESAMPLE_ANY_SAMPLE_RATE),1)\nCFLAGS_resample_coef.o += -DRESAMPLE_ANY_SAMPLE_RATE\nendif\n\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_16k_to_48k_filter.txt",
    "content": "//single phase coef Number:=30,    upsample factor:=3,     downsample factor:=1\n     0, -131, -260,  231, -261,  305,\n -340,  350, -318,  223,  -24, -354,\n 1124,-3214,29795, 7194,-3688, 2546,\n-1911, 1468,-1126,  847, -618,  433,\n -290,  187, -113, -226,  -14,    1,\n    2,  -55, -289,   93,  -31,  -43,\n  160, -339,  599, -968, 1497,-2293,\n 3637,-6571,20509,20509,-6571, 3637,\n-2293, 1497, -968,  599, -339,  160,\n  -43,  -31,   93, -289,  -55,    2,\n    1,  -14, -226, -113,  187, -290,\n  433, -618,  847,-1126, 1468,-1911,\n 2546,-3688, 7194,29795,-3214, 1124,\n -354,  -24,  223, -318,  350, -340,\n  305, -261,  231, -260, -131,    0,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_32k_to_50p7k_filter.txt",
    "content": "//#define FIRFILTER_NUM \t(24)\n//#define UPSAMPLE_FACTOR_32TO50P7 73\n//#define DOWNSAMPLE_FACTOR_32TO50P7 46\n\n\t-17, 115, 196, -309, 531, -803,\n\t1107, -1412, 1684, -1879, 1916, 30581,\n\t2348, -2071, 1788, -1469, 1135, -814,\n\t533, -305, 190, 119, -17, -1,\n\t-17, 111, 202, -312, 530, -791,\n\t1078, -1354, 1579, -1688, 1493, 30565,\n\t2788, -2262, 1890, -1523, 1161, -824,\n\t533, -301, 183, 124, -17, 0,\n\t-17, 107, 208, -314, 527, -778,\n\t1047, -1295, 1473, -1496, 1080, 30531,\n\t3237, -2453, 1990, -1576, 1186, -832,\n\t532, -297, 176, 128, -18, 0,\n\t-16, 102, 214, -316, 524, -764,\n\t1015, -1234, 1366, -1306, 676, 30481,\n\t3694, -2642, 2088, -1627, 1210, -839,\n\t531, -292, 169, 133, -18, 0,\n\t-16, 98, 219, -318, 519, -749,\n\t981, -1172, 1257, -1116, 281, 30415,\n\t4158, -2831, 2184, -1676, 1231, -845,\n\t529, -286, 161, 137, -18, -1,\n\t-16, 94, 225, -319, 514, -733,\n\t947, -1108, 1148, -927, -103, 30332,\n\t4630, -3018, 2278, -1723, 1251, -850,\n\t525, -280, 154, 142, -18, -1,\n\t-16, 90, 230, -319, 509, -716,\n\t911, -1044, 1039, -740, -477, 30232,\n\t5109, -3203, 2369, -1767, 1269, -853,\n\t521, -274, 146, 146, -18, -1,\n\t-15, 86, 234, -319, 502, -698,\n\t875, -979, 929, -554, -840, 30116,\n\t5594, -3386, 2457, -1809, 1285, -855,\n\t517, -266, 138, 150, -18, -1,\n\t-15, 82, 239, -319, 495, -679,\n\t837, -912, 819, -370, -1193, 29984,\n\t6086, -3566, 2543, -1849, 1300, -856,\n\t511, -259, 130, 155, -18, -1,\n\t-15, 78, 243, -318, 488, -659,\n\t798, -845, 710, -189, -1534, 29836,\n\t6584, -3743, 2625, -1886, 1312, -855,\n\t504, -251, 121, 159, -18, -1,\n\t-14, 75, 247, -316, 479, -639,\n\t759, -778, 600, -10, -1865, 29672,\n\t7087, -3918, 2705, -1920, 1323, -853,\n\t497, -242, 112, 164, -18, -1,\n\t-14, 71, 250, -314, 470, -618,\n\t719, -710, 491, 167, -2184, 29493,\n\t7595, -4088, 2780, -1952, 1331, -850,\n\t489, -233, 103, 168, -17, -1,\n\t-14, 67, 254, -312, 461, -596,\n\t678, -642, 382, 340, -2492, 29297,\n\t8108, -4256, 2853, -1981, 1338, -845,\n\t479, -224, 94, 173, -17, -1,\n\t-13, 64, 257, -309, 451, -573,\n\t636, -573, 274, 511, -2789, 29086,\n\t8625, -4418, 2921, -2007, 1342, -839,\n\t469, -214, 85, 177, -17, -1,\n\t-13, 60, 259, -306, 440, -550,\n\t594, -504, 167, 678, -3074, 28860,\n\t9146, -4577, 2986, -2030, 1344, -831,\n\t459, -203, 76, 182, -17, -1,\n\t-13, 57, 262, -302, 428, -526,\n\t552, -435, 61, 841, -3347, 28620,\n\t9671, -4730, 3047, -2050, 1344, -822,\n\t447, -192, 66, 186, -16, -2,\n\t-12, 53, 264, -298, 417, -502,\n\t509, -367, -44, 1001, -3608, 28364,\n\t10198, -4879, 3103, -2067, 1342, -812,\n\t434, -181, 57, 191, -16, -2,\n\t-12, 50, 266, -293, 404, -477,\n\t466, -298, -148, 1156, -3857, 28094,\n\t10728, -5022, 3155, -2080, 1338, -800,\n\t421, -169, 47, 195, -16, -2,\n\t-12, 47, 268, -289, 392, -451,\n\t422, -230, -250, 1308, -4094, 27809,\n\t11260, -5160, 3203, -2091, 1331, -787,\n\t407, -157, 37, 199, -15, -2,\n\t-11, 44, 270, -283, 378, -426,\n\t379, -162, -350, 1455, -4320, 27511,\n\t11793, -5291, 3246, -2098, 1323, -772,\n\t392, -145, 27, 203, -15, -2,\n\t-11, 41, 271, -278, 365, -399,\n\t335, -95, -449, 1598, -4533, 27199,\n\t12328, -5416, 3284, -2102, 1312, -756,\n\t376, -132, 17, 207, -14, -2,\n\t-11, 38, 272, -272, 351, -373,\n\t291, -28, -546, 1736, -4734, 26874,\n\t12863, -5534, 3317, -2103, 1298, -739,\n\t359, -119, 7, 212, -13, -2,\n\t-10, 35, 273, -265, 336, -346,\n\t248, 38, -641, 1869, -4922, 26536,\n\t13398, -5646, 3346, -2100, 1283, -720,\n\t342, -105, -3, 216, -13, -3,\n\t-10, 32, 273, -258, 322, -319,\n\t204, 103, -733, 1997, -5099, 26185,\n\t13933, -5750, 3369, -2094, 1265, -700,\n\t324, -91, -14, 220, -12, -3,\n\t-10, 30, 274, -251, 307, -292,\n\t161, 167, -823, 2121, -5264, 25822,\n\t14467, -5846, 3387, -2084, 1245, -678,\n\t305, -77, -24, 223, -11, -3,\n\t-9, 27, 274, -244, 291, -265,\n\t117, 231, -911, 2239, -5416, 25447,\n\t15000, -5935, 3400, -2071, 1223, -656,\n\t285, -62, -35, 227, -10, -3,\n\t-9, 24, 273, -237, 276, -238,\n\t75, 293, -997, 2351, -5556, 25060,\n\t15532, -6015, 3408, -2054, 1199, -631,\n\t265, -47, -45, 231, -9, -3,\n\t-9, 22, 273, -229, 260, -210,\n\t32, 354, -1079, 2459, -5685, 24662,\n\t16061, -6088, 3409, -2033, 1172, -606,\n\t244, -32, -55, 234, -8, -4,\n\t-8, 20, 272, -220, 244, -183,\n\t-10, 414, -1160, 2561, -5801, 24253,\n\t16587, -6151, 3406, -2010, 1144, -579,\n\t223, -17, -66, 238, -7, -4,\n\t-8, 17, 272, -212, 228, -156,\n\t-52, 472, -1237, 2657, -5906, 23834,\n\t17110, -6206, 3397, -1982, 1113, -551,\n\t201, -1, -76, 241, -6, -4,\n\t-8, 15, 271, -203, 212, -128,\n\t-93, 529, -1311, 2748, -5999, 23405,\n\t17630, -6251, 3382, -1951, 1080, -522,\n\t178, 15, -87, 244, -5, -4,\n\t-7, 13, 269, -195, 195, -101,\n\t-133, 585, -1382, 2833, -6080, 22966,\n\t18145, -6287, 3361, -1917, 1044, -492,\n\t155, 31, -97, 247, -4, -4,\n\t-7, 11, 268, -185, 179, -74,\n\t-173, 639, -1451, 2912, -6150, 22518,\n\t18656, -6313, 3334, -1879, 1007, -460,\n\t131, 47, -107, 250, -2, -5,\n\t-7, 9, 266, -176, 162, -47,\n\t-212, 691, -1516, 2985, -6209, 22061,\n\t19161, -6330, 3302, -1837, 968, -428,\n\t107, 63, -117, 253, -1, -5,\n\t-6, 7, 265, -167, 146, -21,\n\t-250, 742, -1578, 3053, -6256, 21596,\n\t19661, -6336, 3264, -1792, 926, -394,\n\t82, 80, -127, 256, 0, -5,\n\t-6, 5, 263, -157, 129, 5,\n\t-287, 791, -1636, 3114, -6292, 21123,\n\t20155, -6332, 3220, -1743, 883, -360,\n\t57, 96, -138, 258, 2, -5,\n\t-6, 4, 260, -147, 113, 31,\n\t-324, 838, -1691, 3170, -6317, 20643,\n\t20643, -6317, 3170, -1691, 838, -324,\n\t31, 113, -147, 260, 4, -6,\n\t-5, 2, 258, -138, 96, 57,\n\t-360, 883, -1743, 3220, -6332, 20155,\n\t21123, -6292, 3114, -1636, 791, -287,\n\t5, 129, -157, 263, 5, -6,\n\t-5, 0, 256, -127, 80, 82,\n\t-394, 926, -1792, 3264, -6336, 19661,\n\t21596, -6256, 3053, -1578, 742, -250,\n\t-21, 146, -167, 265, 7, -6,\n\t-5, -1, 253, -117, 63, 107,\n\t-428, 968, -1837, 3302, -6330, 19161,\n\t22061, -6209, 2985, -1516, 691, -212,\n\t-47, 162, -176, 266, 9, -7,\n\t-5, -2, 250, -107, 47, 131,\n\t-460, 1007, -1879, 3334, -6313, 18656,\n\t22518, -6150, 2912, -1451, 639, -173,\n\t-74, 179, -185, 268, 11, -7,\n\t-4, -4, 247, -97, 31, 155,\n\t-492, 1044, -1917, 3361, -6287, 18145,\n\t22966, -6080, 2833, -1382, 585, -133,\n\t-101, 195, -195, 269, 13, -7,\n\t-4, -5, 244, -87, 15, 178,\n\t-522, 1080, -1951, 3382, -6251, 17630,\n\t23405, -5999, 2748, -1311, 529, -93,\n\t-128, 212, -203, 271, 15, -8,\n\t-4, -6, 241, -76, -1, 201,\n\t-551, 1113, -1982, 3397, -6206, 17110,\n\t23834, -5906, 2657, -1237, 472, -52,\n\t-156, 228, -212, 272, 17, -8,\n\t-4, -7, 238, -66, -17, 223,\n\t-579, 1144, -2010, 3406, -6151, 16587,\n\t24253, -5801, 2561, -1160, 414, -10,\n\t-183, 244, -220, 272, 20, -8,\n\t-4, -8, 234, -55, -32, 244,\n\t-606, 1172, -2033, 3409, -6088, 16061,\n\t24662, -5685, 2459, -1079, 354, 32,\n\t-210, 260, -229, 273, 22, -9,\n\t-3, -9, 231, -45, -47, 265,\n\t-631, 1199, -2054, 3408, -6015, 15532,\n\t25060, -5556, 2351, -997, 293, 75,\n\t-238, 276, -237, 273, 24, -9,\n\t-3, -10, 227, -35, -62, 285,\n\t-656, 1223, -2071, 3400, -5935, 15000,\n\t25447, -5416, 2239, -911, 231, 117,\n\t-265, 291, -244, 274, 27, -9,\n\t-3, -11, 223, -24, -77, 305,\n\t-678, 1245, -2084, 3387, -5846, 14467,\n\t25822, -5264, 2121, -823, 167, 161,\n\t-292, 307, -251, 274, 30, -10,\n\t-3, -12, 220, -14, -91, 324,\n\t-700, 1265, -2094, 3369, -5750, 13933,\n\t26185, -5099, 1997, -733, 103, 204,\n\t-319, 322, -258, 273, 32, -10,\n\t-3, -13, 216, -3, -105, 342,\n\t-720, 1283, -2100, 3346, -5646, 13398,\n\t26536, -4922, 1869, -641, 38, 248,\n\t-346, 336, -265, 273, 35, -10,\n\t-2, -13, 212, 7, -119, 359,\n\t-739, 1298, -2103, 3317, -5534, 12863,\n\t26874, -4734, 1736, -546, -28, 291,\n\t-373, 351, -272, 272, 38, -11,\n\t-2, -14, 207, 17, -132, 376,\n\t-756, 1312, -2102, 3284, -5416, 12328,\n\t27199, -4533, 1598, -449, -95, 335,\n\t-399, 365, -278, 271, 41, -11,\n\t-2, -15, 203, 27, -145, 392,\n\t-772, 1323, -2098, 3246, -5291, 11793,\n\t27511, -4320, 1455, -350, -162, 379,\n\t-426, 378, -283, 270, 44, -11,\n\t-2, -15, 199, 37, -157, 407,\n\t-787, 1331, -2091, 3203, -5160, 11260,\n\t27809, -4094, 1308, -250, -230, 422,\n\t-451, 392, -289, 268, 47, -12,\n\t-2, -16, 195, 47, -169, 421,\n\t-800, 1338, -2080, 3155, -5022, 10728,\n\t28094, -3857, 1156, -148, -298, 466,\n\t-477, 404, -293, 266, 50, -12,\n\t-2, -16, 191, 57, -181, 434,\n\t-812, 1342, -2067, 3103, -4879, 10198,\n\t28364, -3608, 1001, -44, -367, 509,\n\t-502, 417, -298, 264, 53, -12,\n\t-2, -16, 186, 66, -192, 447,\n\t-822, 1344, -2050, 3047, -4730, 9671,\n\t28620, -3347, 841, 61, -435, 552,\n\t-526, 428, -302, 262, 57, -13,\n\t-1, -17, 182, 76, -203, 459,\n\t-831, 1344, -2030, 2986, -4577, 9146,\n\t28860, -3074, 678, 167, -504, 594,\n\t-550, 440, -306, 259, 60, -13,\n\t-1, -17, 177, 85, -214, 469,\n\t-839, 1342, -2007, 2921, -4418, 8625,\n\t29086, -2789, 511, 274, -573, 636,\n\t-573, 451, -309, 257, 64, -13,\n\t-1, -17, 173, 94, -224, 479,\n\t-845, 1338, -1981, 2853, -4256, 8108,\n\t29297, -2492, 340, 382, -642, 678,\n\t-596, 461, -312, 254, 67, -14,\n\t-1, -17, 168, 103, -233, 489,\n\t-850, 1331, -1952, 2780, -4088, 7595,\n\t29493, -2184, 167, 491, -710, 719,\n\t-618, 470, -314, 250, 71, -14,\n\t-1, -18, 164, 112, -242, 497,\n\t-853, 1323, -1920, 2705, -3918, 7087,\n\t29672, -1865, -10, 600, -778, 759,\n\t-639, 479, -316, 247, 75, -14,\n\t-1, -18, 159, 121, -251, 504,\n\t-855, 1312, -1886, 2625, -3743, 6584,\n\t29836, -1534, -189, 710, -845, 798,\n\t-659, 488, -318, 243, 78, -15,\n\t-1, -18, 155, 130, -259, 511,\n\t-856, 1300, -1849, 2543, -3566, 6086,\n\t29984, -1193, -370, 819, -912, 837,\n\t-679, 495, -319, 239, 82, -15,\n\t-1, -18, 150, 138, -266, 517,\n\t-855, 1285, -1809, 2457, -3386, 5594,\n\t30116, -840, -554, 929, -979, 875,\n\t-698, 502, -319, 234, 86, -15,\n\t-1, -18, 146, 146, -274, 521,\n\t-853, 1269, -1767, 2369, -3203, 5109,\n\t30232, -477, -740, 1039, -1044, 911,\n\t-716, 509, -319, 230, 90, -16,\n\t-1, -18, 142, 154, -280, 525,\n\t-850, 1251, -1723, 2278, -3018, 4630,\n\t30332, -103, -927, 1148, -1108, 947,\n\t-733, 514, -319, 225, 94, -16,\n\t-1, -18, 137, 161, -286, 529,\n\t-845, 1231, -1676, 2184, -2831, 4158,\n\t30415, 281, -1116, 1257, -1172, 981,\n\t-749, 519, -318, 219, 98, -16,\n\t0, -18, 133, 169, -292, 531,\n\t-839, 1210, -1627, 2088, -2642, 3694,\n\t30481, 676, -1306, 1366, -1234, 1015,\n\t-764, 524, -316, 214, 102, -16,\n\t0, -18, 128, 176, -297, 532,\n\t-832, 1186, -1576, 1990, -2453, 3237,\n\t30531, 1080, -1496, 1473, -1295, 1047,\n\t-778, 527, -314, 208, 107, -17,\n\t0, -17, 124, 183, -301, 533,\n\t-824, 1161, -1523, 1890, -2262, 2788,\n\t30565, 1493, -1688, 1579, -1354, 1078,\n\t-791, 530, -312, 202, 111, -17,\n\t-1, -17, 119, 190, -305, 533,\n\t-814, 1135, -1469, 1788, -2071, 2348,\n\t30581, 1916, -1879, 1684, -1412, 1107,\n\t-803, 531, -309, 196, 115, -17,\n\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_44p1k_to_48k_filter.txt",
    "content": "//single phase coef Number:=8,    upsample factor:=160,     downsample factor:=147\n  -467,-2015, 7740,21207, 7855,-2009, -476,   -9,\n -458,-2020, 7625,21206, 7971,-2003, -485,   -2,\n -450,-2024, 7511,21203, 8086,-1996, -494,   -2,\n -441,-2028, 7397,21199, 8203,-1989, -503,   -2,\n -433,-2032, 7284,21193, 8319,-1982, -512,   -2,\n -425,-2035, 7170,21186, 8436,-1974, -521,   -2,\n -417,-2038, 7058,21177, 8553,-1965, -530,   -2,\n -409,-2040, 6945,21167, 8670,-1956, -540,   -2,\n -401,-2042, 6833,21155, 8787,-1946, -549,   -3,\n -393,-2044, 6722,21142, 8905,-1936, -559,   -3,\n -385,-2045, 6611,21128, 9023,-1925, -569,   -3,\n -378,-2045, 6500,21112, 9141,-1914, -579,   -3,\n -370,-2046, 6390,21095, 9259,-1902, -589,   -3,\n -363,-2045, 6280,21076, 9378,-1890, -599,   -4,\n -355,-2045, 6171,21056, 9497,-1877, -609,   -4,\n -348,-2044, 6063,21034, 9616,-1863, -619,   -4,\n -341,-2042, 5955,21011, 9735,-1849, -630,   -4,\n -334,-2041, 5847,20987, 9854,-1834, -640,   -5,\n -327,-2039, 5740,20961, 9973,-1819, -651,   -5,\n -320,-2036, 5634,20934,10093,-1803, -662,   -5,\n -314,-2033, 5528,20905,10212,-1786, -672,   -6,\n -307,-2030, 5422,20875,10332,-1769, -683,   -6,\n -301,-2026, 5318,20844,10451,-1751, -694,   -6,\n -294,-2023, 5213,20811,10571,-1733, -705,   -7,\n -288,-2018, 5110,20777,10691,-1714, -717,   -7,\n -282,-2014, 5007,20741,10811,-1694, -728,   -7,\n -275,-2009, 4904,20704,10930,-1674, -739,   -8,\n -269,-2004, 4803,20666,11050,-1653, -751,   -8,\n -264,-1998, 4701,20626,11170,-1631, -762,   -9,\n -258,-1993, 4601,20585,11290,-1609, -774,   -9,\n -252,-1986, 4501,20543,11409,-1586, -786,  -10,\n -246,-1980, 4402,20499,11529,-1562, -797,  -10,\n -241,-1973, 4303,20454,11648,-1538, -809,  -11,\n -235,-1966, 4205,20408,11768,-1513, -821,  -11,\n -230,-1959, 4108,20360,11887,-1487, -833,  -12,\n -225,-1952, 4012,20311,12006,-1461, -846,  -12,\n -219,-1944, 3916,20261,12125,-1434, -858,  -13,\n -214,-1936, 3821,20209,12244,-1406, -870,  -13,\n -209,-1928, 3726,20156,12363,-1378, -883,  -14,\n -204,-1919, 3632,20102,12481,-1348, -895,  -15,\n -199,-1911, 3539,20046,12600,-1318, -908,  -15,\n -195,-1902, 3447,19990,12718,-1288, -920,  -16,\n -190,-1893, 3355,19932,12836,-1256, -933,  -17,\n -185,-1883, 3264,19872,12953,-1224, -946,  -18,\n -181,-1874, 3174,19812,13071,-1191, -959,  -18,\n -176,-1864, 3085,19750,13188,-1158, -971,  -19,\n -172,-1854, 2996,19687,13305,-1124, -984,  -20,\n -168,-1844, 2908,19623,13421,-1088, -997,  -21,\n -164,-1834, 2821,19557,13537,-1053,-1011,  -22,\n -159,-1823, 2734,19491,13653,-1016,-1024,  -23,\n -155,-1812, 2649,19423,13769, -979,-1037,  -23,\n -151,-1801, 2564,19354,13884, -941,-1050,  -24,\n -148,-1790, 2480,19284,13999, -902,-1064,  -25,\n -144,-1779, 2396,19213,14113, -862,-1077,  -26,\n -140,-1768, 2314,19140,14227, -822,-1090,  -27,\n -136,-1756, 2232,19067,14340, -780,-1104,  -29,\n -133,-1745, 2151,18992,14453, -738,-1117,  -30,\n -129,-1733, 2071,18917,14566, -696,-1131,  -31,\n -126,-1721, 1991,18840,14678, -652,-1145,  -32,\n -122,-1709, 1913,18762,14790, -608,-1158,  -33,\n -119,-1697, 1835,18683,14901, -563,-1172,  -34,\n -116,-1684, 1758,18603,15011, -517,-1186,  -36,\n -113,-1672, 1682,18522,15122, -470,-1199,  -37,\n -109,-1659, 1606,18439,15231, -422,-1213,  -38,\n -106,-1647, 1532,18356,15340, -374,-1227,  -40,\n -103,-1634, 1458,18272,15448, -325,-1241,  -41,\n -101,-1621, 1385,18187,15556, -275,-1254,  -43,\n  -98,-1608, 1313,18101,15663, -224,-1268,  -44,\n  -95,-1595, 1241,18013,15770, -172,-1282,  -46,\n  -92,-1582, 1171,17925,15876, -120,-1296,  -47,\n  -89,-1569, 1101,17836,15981,  -67,-1310,  -49,\n  -87,-1556, 1032,17746,16085,  -13,-1324,  -51,\n  -84,-1542,  964,17655,16189,   42,-1337,  -52,\n  -82,-1529,  897,17563,16292,   98,-1351,  -54,\n  -79,-1516,  830,17471,16395,  154,-1365,  -56,\n  -77,-1502,  765,17377,16497,  212,-1379,  -58,\n  -75,-1489,  700,17282,16598,  270,-1393,  -60,\n  -72,-1475,  636,17187,16698,  329,-1407,  -62,\n  -70,-1461,  573,17091,16797,  389,-1420,  -64,\n  -68,-1448,  511,16994,16896,  449,-1434,  -66,\n  -66,-1434,  449,16896,16994,  511,-1448,  -68,\n  -64,-1420,  389,16797,17091,  573,-1461,  -70,\n  -62,-1407,  329,16698,17187,  636,-1475,  -72,\n  -60,-1393,  270,16598,17282,  700,-1489,  -75,\n  -58,-1379,  212,16497,17377,  765,-1502,  -77,\n  -56,-1365,  154,16395,17471,  830,-1516,  -79,\n  -54,-1351,   98,16292,17563,  897,-1529,  -82,\n  -52,-1337,   42,16189,17655,  964,-1542,  -84,\n  -51,-1324,  -13,16085,17746, 1032,-1556,  -87,\n  -49,-1310,  -67,15981,17836, 1101,-1569,  -89,\n  -47,-1296, -120,15876,17925, 1171,-1582,  -92,\n  -46,-1282, -172,15770,18013, 1241,-1595,  -95,\n  -44,-1268, -224,15663,18101, 1313,-1608,  -98,\n  -43,-1254, -275,15556,18187, 1385,-1621, -101,\n  -41,-1241, -325,15448,18272, 1458,-1634, -103,\n  -40,-1227, -374,15340,18356, 1532,-1647, -106,\n  -38,-1213, -422,15231,18439, 1606,-1659, -109,\n  -37,-1199, -470,15122,18522, 1682,-1672, -113,\n  -36,-1186, -517,15011,18603, 1758,-1684, -116,\n  -34,-1172, -563,14901,18683, 1835,-1697, -119,\n  -33,-1158, -608,14790,18762, 1913,-1709, -122,\n  -32,-1145, -652,14678,18840, 1991,-1721, -126,\n  -31,-1131, -696,14566,18917, 2071,-1733, -129,\n  -30,-1117, -738,14453,18992, 2151,-1745, -133,\n  -29,-1104, -780,14340,19067, 2232,-1756, -136,\n  -27,-1090, -822,14227,19140, 2314,-1768, -140,\n  -26,-1077, -862,14113,19213, 2396,-1779, -144,\n  -25,-1064, -902,13999,19284, 2480,-1790, -148,\n  -24,-1050, -941,13884,19354, 2564,-1801, -151,\n  -23,-1037, -979,13769,19423, 2649,-1812, -155,\n  -23,-1024,-1016,13653,19491, 2734,-1823, -159,\n  -22,-1011,-1053,13537,19557, 2821,-1834, -164,\n  -21, -997,-1088,13421,19623, 2908,-1844, -168,\n  -20, -984,-1124,13305,19687, 2996,-1854, -172,\n  -19, -971,-1158,13188,19750, 3085,-1864, -176,\n  -18, -959,-1191,13071,19812, 3174,-1874, -181,\n  -18, -946,-1224,12953,19872, 3264,-1883, -185,\n  -17, -933,-1256,12836,19932, 3355,-1893, -190,\n  -16, -920,-1288,12718,19990, 3447,-1902, -195,\n  -15, -908,-1318,12600,20046, 3539,-1911, -199,\n  -15, -895,-1348,12481,20102, 3632,-1919, -204,\n  -14, -883,-1378,12363,20156, 3726,-1928, -209,\n  -13, -870,-1406,12244,20209, 3821,-1936, -214,\n  -13, -858,-1434,12125,20261, 3916,-1944, -219,\n  -12, -846,-1461,12006,20311, 4012,-1952, -225,\n  -12, -833,-1487,11887,20360, 4108,-1959, -230,\n  -11, -821,-1513,11768,20408, 4205,-1966, -235,\n  -11, -809,-1538,11648,20454, 4303,-1973, -241,\n  -10, -797,-1562,11529,20499, 4402,-1980, -246,\n  -10, -786,-1586,11409,20543, 4501,-1986, -252,\n   -9, -774,-1609,11290,20585, 4601,-1993, -258,\n   -9, -762,-1631,11170,20626, 4701,-1998, -264,\n   -8, -751,-1653,11050,20666, 4803,-2004, -269,\n   -8, -739,-1674,10930,20704, 4904,-2009, -275,\n   -7, -728,-1694,10811,20741, 5007,-2014, -282,\n   -7, -717,-1714,10691,20777, 5110,-2018, -288,\n   -7, -705,-1733,10571,20811, 5213,-2023, -294,\n   -6, -694,-1751,10451,20844, 5318,-2026, -301,\n   -6, -683,-1769,10332,20875, 5422,-2030, -307,\n   -6, -672,-1786,10212,20905, 5528,-2033, -314,\n   -5, -662,-1803,10093,20934, 5634,-2036, -320,\n   -5, -651,-1819, 9973,20961, 5740,-2039, -327,\n   -5, -640,-1834, 9854,20987, 5847,-2041, -334,\n   -4, -630,-1849, 9735,21011, 5955,-2042, -341,\n   -4, -619,-1863, 9616,21034, 6063,-2044, -348,\n   -4, -609,-1877, 9497,21056, 6171,-2045, -355,\n   -4, -599,-1890, 9378,21076, 6280,-2045, -363,\n   -3, -589,-1902, 9259,21095, 6390,-2046, -370,\n   -3, -579,-1914, 9141,21112, 6500,-2045, -378,\n   -3, -569,-1925, 9023,21128, 6611,-2045, -385,\n   -3, -559,-1936, 8905,21142, 6722,-2044, -393,\n   -3, -549,-1946, 8787,21155, 6833,-2042, -401,\n   -2, -540,-1956, 8670,21167, 6945,-2040, -409,\n   -2, -530,-1965, 8553,21177, 7058,-2038, -417,\n   -2, -521,-1974, 8436,21186, 7170,-2035, -425,\n   -2, -512,-1982, 8319,21193, 7284,-2032, -433,\n   -2, -503,-1989, 8203,21199, 7397,-2028, -441,\n   -2, -494,-1996, 8086,21203, 7511,-2024, -450,\n   -2, -485,-2003, 7971,21206, 7625,-2020, -458,\n   -9, -476,-2009, 7855,21207, 7740,-2015, -467,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_44p1k_to_50p7k_filter.txt",
    "content": "//#define FIRFILTER_NUM \t(24)\n//#define UPSAMPLE_FACTOR_44P1TO50P7 38\n//#define DOWNSAMPLE_FACTOR_44P1TO50P7 33\n\n\t-16, 113, 198, -310, 530, -797,\n\t1092, -1384, 1634, -1789, 1718, 30578,\n\t2547, -2157, 1833, -1493, 1146, -818,\n\t532, -303, 186, 122, -17, -1,\n\t-16, 105, 210, -315, 525, -772,\n\t1033, -1270, 1430, -1421, 922, 30517,\n\t3408, -2523, 2026, -1594, 1194, -834,\n\t531, -295, 173, 130, -17, 0,\n\t-16, 97, 220, -318, 517, -743,\n\t970, -1151, 1222, -1056, 162, 30394,\n\t4298, -2885, 2211, -1689, 1236, -846,\n\t527, -284, 159, 139, -17, -1,\n\t-15, 90, 230, -319, 507, -711,\n\t902, -1028, 1013, -696, -561, 30210,\n\t5215, -3242, 2387, -1775, 1272, -853,\n\t520, -272, 144, 147, -17, -1,\n\t-15, 82, 239, -318, 493, -675,\n\t830, -901, 802, -342, -1245, 29966,\n\t6156, -3590, 2553, -1853, 1301, -855,\n\t510, -258, 128, 156, -17, -1,\n\t-14, 75, 246, -316, 478, -637,\n\t755, -772, 591, 4, -1889, 29663,\n\t7118, -3927, 2708, -1921, 1322, -853,\n\t496, -242, 111, 164, -17, -1,\n\t-13, 68, 253, -312, 460, -595,\n\t677, -641, 382, 340, -2491, 29302,\n\t8100, -4252, 2850, -1979, 1337, -845,\n\t479, -224, 94, 173, -17, -1,\n\t-13, 61, 259, -306, 440, -551,\n\t597, -509, 175, 664, -3050, 28884,\n\t9097, -4561, 2979, -2027, 1343, -832,\n\t459, -204, 76, 181, -16, -1,\n\t-12, 54, 263, -298, 418, -505,\n\t515, -377, -28, 975, -3566, 28410,\n\t10106, -4853, 3093, -2063, 1342, -814,\n\t436, -183, 58, 190, -15, -2,\n\t-11, 48, 267, -290, 394, -457,\n\t432, -245, -226, 1272, -4038, 27884,\n\t11125, -5125, 3190, -2088, 1333, -790,\n\t410, -161, 39, 198, -15, -2,\n\t-11, 42, 270, -279, 368, -407,\n\t348, -115, -418, 1553, -4466, 27305,\n\t12150, -5374, 3271, -2101, 1315, -762,\n\t381, -136, 20, 206, -14, -2,\n\t-10, 37, 272, -268, 341, -356,\n\t264, 13, -604, 1817, -4848, 26677,\n\t13179, -5600, 3334, -2101, 1289, -728,\n\t349, -111, 1, 214, -12, -2,\n\t-9, 31, 273, -255, 313, -304,\n\t181, 138, -781, 2063, -5186, 26002,\n\t14206, -5799, 3379, -2089, 1255, -689,\n\t314, -84, -19, 221, -11, -3,\n\t-9, 26, 273, -241, 284, -252,\n\t98, 259, -950, 2290, -5480, 25282,\n\t15230, -5970, 3404, -2064, 1213, -645,\n\t277, -56, -39, 228, -9, -3,\n\t-8, 22, 272, -226, 254, -200,\n\t16, 377, -1109, 2497, -5729, 24519,\n\t16247, -6111, 3409, -2025, 1163, -597,\n\t237, -27, -59, 235, -7, -3,\n\t-8, 17, 271, -209, 223, -147,\n\t-64, 489, -1259, 2684, -5934, 23717,\n\t17253, -6219, 3393, -1974, 1104, -544,\n\t195, 3, -79, 242, -5, -4,\n\t-7, 13, 269, -193, 191, -95,\n\t-142, 597, -1397, 2850, -6096, 22879,\n\t18246, -6293, 3356, -1910, 1038, -486,\n\t151, 33, -99, 247, -3, -4,\n\t-6, 9, 266, -175, 160, -44,\n\t-217, 698, -1524, 2994, -6215, 22007,\n\t19220, -6331, 3298, -1832, 964, -425,\n\t104, 65, -119, 253, 0, -5,\n\t-6, 6, 262, -157, 128, 7,\n\t-290, 793, -1639, 3117, -6294, 21104,\n\t20174, -6332, 3219, -1742, 882, -359,\n\t56, 96, -138, 258, 3, -5,\n\t-5, 3, 258, -138, 96, 56,\n\t-359, 882, -1742, 3219, -6332, 20174,\n\t21104, -6294, 3117, -1639, 793, -290,\n\t7, 128, -157, 262, 6, -6,\n\t-5, 0, 253, -119, 65, 104,\n\t-425, 964, -1832, 3298, -6331, 19220,\n\t22007, -6215, 2994, -1524, 698, -217,\n\t-44, 160, -175, 266, 9, -6,\n\t-4, -3, 247, -99, 33, 151,\n\t-486, 1038, -1910, 3356, -6293, 18246,\n\t22879, -6096, 2850, -1397, 597, -142,\n\t-95, 191, -193, 269, 13, -7,\n\t-4, -5, 242, -79, 3, 195,\n\t-544, 1104, -1974, 3393, -6219, 17253,\n\t23717, -5934, 2684, -1259, 489, -64,\n\t-147, 223, -209, 271, 17, -8,\n\t-3, -7, 235, -59, -27, 237,\n\t-597, 1163, -2025, 3409, -6111, 16247,\n\t24519, -5729, 2497, -1109, 377, 16,\n\t-200, 254, -226, 272, 22, -8,\n\t-3, -9, 228, -39, -56, 277,\n\t-645, 1213, -2064, 3404, -5970, 15230,\n\t25282, -5480, 2290, -950, 259, 98,\n\t-252, 284, -241, 273, 26, -9,\n\t-3, -11, 221, -19, -84, 314,\n\t-689, 1255, -2089, 3379, -5799, 14206,\n\t26002, -5186, 2063, -781, 138, 181,\n\t-304, 313, -255, 273, 31, -9,\n\t-2, -12, 214, 1, -111, 349,\n\t-728, 1289, -2101, 3334, -5600, 13179,\n\t26677, -4848, 1817, -604, 13, 264,\n\t-356, 341, -268, 272, 37, -10,\n\t-2, -14, 206, 20, -136, 381,\n\t-762, 1315, -2101, 3271, -5374, 12150,\n\t27305, -4466, 1553, -418, -115, 348,\n\t-407, 368, -279, 270, 42, -11,\n\t-2, -15, 198, 39, -161, 410,\n\t-790, 1333, -2088, 3190, -5125, 11125,\n\t27884, -4038, 1272, -226, -245, 432,\n\t-457, 394, -290, 267, 48, -11,\n\t-2, -15, 190, 58, -183, 436,\n\t-814, 1342, -2063, 3093, -4853, 10106,\n\t28410, -3566, 975, -28, -377, 515,\n\t-505, 418, -298, 263, 54, -12,\n\t-1, -16, 181, 76, -204, 459,\n\t-832, 1343, -2027, 2979, -4561, 9097,\n\t28884, -3050, 664, 175, -509, 597,\n\t-551, 440, -306, 259, 61, -13,\n\t-1, -17, 173, 94, -224, 479,\n\t-845, 1337, -1979, 2850, -4252, 8100,\n\t29302, -2491, 340, 382, -641, 677,\n\t-595, 460, -312, 253, 68, -13,\n\t-1, -17, 164, 111, -242, 496,\n\t-853, 1322, -1921, 2708, -3927, 7118,\n\t29663, -1889, 4, 591, -772, 755,\n\t-637, 478, -316, 246, 75, -14,\n\t-1, -17, 156, 128, -258, 510,\n\t-855, 1301, -1853, 2553, -3590, 6156,\n\t29966, -1245, -342, 802, -901, 830,\n\t-675, 493, -318, 239, 82, -15,\n\t-1, -17, 147, 144, -272, 520,\n\t-853, 1272, -1775, 2387, -3242, 5215,\n\t30210, -561, -696, 1013, -1028, 902,\n\t-711, 507, -319, 230, 90, -15,\n\t-1, -17, 139, 159, -284, 527,\n\t-846, 1236, -1689, 2211, -2885, 4298,\n\t30394, 162, -1056, 1222, -1151, 970,\n\t-743, 517, -318, 220, 97, -16,\n\t0, -17, 130, 173, -295, 531,\n\t-834, 1194, -1594, 2026, -2523, 3408,\n\t30517, 922, -1421, 1430, -1270, 1033,\n\t-772, 525, -315, 210, 105, -16,\n\t-1, -17, 122, 186, -303, 532,\n\t-818, 1146, -1493, 1833, -2157, 2547,\n\t30578, 1718, -1789, 1634, -1384, 1092,\n\t-797, 530, -310, 198, 113, -16,\n\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_48k_to_44p1k_filter.txt",
    "content": "//single phase coef Number:=8,    upsample factor:=147,     downsample factor:=160\n  -433,-1703, 7924,20785, 8044,-1695, -441,   -8,\n -424,-1711, 7803,20783, 8165,-1686, -450,   -2,\n -416,-1718, 7684,20780, 8286,-1676, -459,   -2,\n -407,-1724, 7564,20775, 8408,-1666, -468,   -2,\n -399,-1731, 7446,20769, 8530,-1656, -477,   -2,\n -391,-1736, 7327,20761, 8652,-1645, -487,   -2,\n -383,-1741, 7209,20751, 8774,-1633, -496,   -2,\n -375,-1746, 7091,20739, 8897,-1620, -505,   -3,\n -367,-1750, 6974,20727, 9020,-1607, -515,   -3,\n -359,-1753, 6858,20712, 9143,-1594, -525,   -3,\n -352,-1757, 6742,20696, 9266,-1579, -534,   -3,\n -344,-1759, 6626,20678, 9390,-1564, -544,   -3,\n -337,-1761, 6511,20658, 9514,-1549, -554,   -4,\n -330,-1763, 6397,20637, 9638,-1533, -564,   -4,\n -322,-1764, 6283,20615, 9762,-1516, -574,   -4,\n -315,-1765, 6169,20590, 9886,-1498, -585,   -4,\n -308,-1765, 6057,20565,10011,-1480, -595,   -5,\n -301,-1765, 5944,20537,10135,-1461, -606,   -5,\n -295,-1765, 5833,20508,10260,-1442, -616,   -5,\n -288,-1764, 5722,20478,10385,-1421, -627,   -6,\n -282,-1762, 5611,20446,10510,-1400, -638,   -6,\n -275,-1761, 5502,20412,10634,-1379, -649,   -6,\n -269,-1759, 5392,20377,10759,-1356, -660,   -7,\n -263,-1756, 5284,20340,10884,-1333, -671,   -7,\n -256,-1753, 5176,20301,11009,-1309, -682,   -8,\n -250,-1750, 5069,20261,11134,-1284, -693,   -8,\n -244,-1746, 4963,20220,11259,-1259, -704,   -9,\n -239,-1742, 4857,20177,11383,-1233, -716,   -9,\n -233,-1738, 4752,20133,11508,-1206, -727,  -10,\n -227,-1733, 4648,20087,11632,-1178, -739,  -10,\n -222,-1729, 4544,20039,11757,-1150, -751,  -11,\n -216,-1723, 4441,19990,11881,-1121, -763,  -11,\n -211,-1718, 4339,19940,12005,-1091, -774,  -12,\n -206,-1712, 4238,19888,12129,-1060, -786,  -12,\n -200,-1705, 4137,19834,12253,-1029, -798,  -13,\n -195,-1699, 4037,19779,12376, -996, -810,  -14,\n -190,-1692, 3938,19723,12500, -963, -823,  -14,\n -186,-1685, 3840,19665,12623, -929, -835,  -15,\n -181,-1678, 3743,19606,12745, -894, -847,  -16,\n -176,-1670, 3646,19545,12868, -859, -860,  -16,\n -171,-1662, 3550,19483,12990, -822, -872,  -17,\n -167,-1654, 3455,19420,13112, -785, -885,  -18,\n -163,-1646, 3361,19355,13234, -747, -897,  -19,\n -158,-1637, 3267,19289,13355, -708, -910,  -20,\n -154,-1628, 3175,19222,13476, -668, -922,  -21,\n -150,-1619, 3083,19153,13596, -627, -935,  -22,\n -146,-1610, 2992,19083,13716, -586, -948,  -23,\n -142,-1600, 2902,19011,13836, -543, -961,  -24,\n -138,-1591, 2813,18938,13955, -500, -974,  -25,\n -134,-1581, 2724,18864,14073, -456, -987,  -26,\n -130,-1571, 2637,18789,14191, -411,-1000,  -27,\n -126,-1561, 2550,18712,14309, -365,-1013,  -28,\n -123,-1550, 2464,18634,14426, -319,-1026,  -29,\n -119,-1540, 2380,18555,14543, -271,-1039,  -30,\n -116,-1529, 2296,18474,14659, -222,-1052,  -31,\n -113,-1518, 2213,18393,14774, -173,-1065,  -33,\n -109,-1507, 2130,18310,14889, -123,-1078,  -34,\n -106,-1496, 2049,18226,15003,  -72,-1091,  -35,\n -103,-1484, 1969,18141,15117,  -19,-1104,  -37,\n -100,-1473, 1889,18054,15230,   34,-1117,  -38,\n  -97,-1461, 1810,17967,15342,   87,-1131,  -40,\n  -94,-1449, 1733,17878,15454,  142,-1144,  -41,\n  -91,-1437, 1656,17788,15565,  198,-1157,  -43,\n  -88,-1425, 1580,17698,15675,  255,-1170,  -45,\n  -85,-1413, 1505,17606,15784,  312,-1183,  -46,\n  -83,-1401, 1431,17513,15893,  371,-1196,  -48,\n  -80,-1389, 1358,17419,16001,  430,-1210,  -50,\n  -78,-1376, 1285,17323,16108,  490,-1223,  -51,\n  -75,-1364, 1214,17227,16214,  551,-1236,  -53,\n  -73,-1351, 1144,17130,16319,  614,-1249,  -55,\n  -70,-1339, 1074,17032,16424,  677,-1262,  -57,\n  -68,-1326, 1006,16933,16527,  741,-1275,  -59,\n  -66,-1313,  938,16833,16630,  805,-1288,  -61,\n  -63,-1301,  871,16732,16732,  871,-1301,  -63,\n  -61,-1288,  805,16630,16833,  938,-1313,  -66,\n  -59,-1275,  741,16527,16933, 1006,-1326,  -68,\n  -57,-1262,  677,16424,17032, 1074,-1339,  -70,\n  -55,-1249,  614,16319,17130, 1144,-1351,  -73,\n  -53,-1236,  551,16214,17227, 1214,-1364,  -75,\n  -51,-1223,  490,16108,17323, 1285,-1376,  -78,\n  -50,-1210,  430,16001,17419, 1358,-1389,  -80,\n  -48,-1196,  371,15893,17513, 1431,-1401,  -83,\n  -46,-1183,  312,15784,17606, 1505,-1413,  -85,\n  -45,-1170,  255,15675,17698, 1580,-1425,  -88,\n  -43,-1157,  198,15565,17788, 1656,-1437,  -91,\n  -41,-1144,  142,15454,17878, 1733,-1449,  -94,\n  -40,-1131,   87,15342,17967, 1810,-1461,  -97,\n  -38,-1117,   34,15230,18054, 1889,-1473, -100,\n  -37,-1104,  -19,15117,18141, 1969,-1484, -103,\n  -35,-1091,  -72,15003,18226, 2049,-1496, -106,\n  -34,-1078, -123,14889,18310, 2130,-1507, -109,\n  -33,-1065, -173,14774,18393, 2213,-1518, -113,\n  -31,-1052, -222,14659,18474, 2296,-1529, -116,\n  -30,-1039, -271,14543,18555, 2380,-1540, -119,\n  -29,-1026, -319,14426,18634, 2464,-1550, -123,\n  -28,-1013, -365,14309,18712, 2550,-1561, -126,\n  -27,-1000, -411,14191,18789, 2637,-1571, -130,\n  -26, -987, -456,14073,18864, 2724,-1581, -134,\n  -25, -974, -500,13955,18938, 2813,-1591, -138,\n  -24, -961, -543,13836,19011, 2902,-1600, -142,\n  -23, -948, -586,13716,19083, 2992,-1610, -146,\n  -22, -935, -627,13596,19153, 3083,-1619, -150,\n  -21, -922, -668,13476,19222, 3175,-1628, -154,\n  -20, -910, -708,13355,19289, 3267,-1637, -158,\n  -19, -897, -747,13234,19355, 3361,-1646, -163,\n  -18, -885, -785,13112,19420, 3455,-1654, -167,\n  -17, -872, -822,12990,19483, 3550,-1662, -171,\n  -16, -860, -859,12868,19545, 3646,-1670, -176,\n  -16, -847, -894,12745,19606, 3743,-1678, -181,\n  -15, -835, -929,12623,19665, 3840,-1685, -186,\n  -14, -823, -963,12500,19723, 3938,-1692, -190,\n  -14, -810, -996,12376,19779, 4037,-1699, -195,\n  -13, -798,-1029,12253,19834, 4137,-1705, -200,\n  -12, -786,-1060,12129,19888, 4238,-1712, -206,\n  -12, -774,-1091,12005,19940, 4339,-1718, -211,\n  -11, -763,-1121,11881,19990, 4441,-1723, -216,\n  -11, -751,-1150,11757,20039, 4544,-1729, -222,\n  -10, -739,-1178,11632,20087, 4648,-1733, -227,\n  -10, -727,-1206,11508,20133, 4752,-1738, -233,\n   -9, -716,-1233,11383,20177, 4857,-1742, -239,\n   -9, -704,-1259,11259,20220, 4963,-1746, -244,\n   -8, -693,-1284,11134,20261, 5069,-1750, -250,\n   -8, -682,-1309,11009,20301, 5176,-1753, -256,\n   -7, -671,-1333,10884,20340, 5284,-1756, -263,\n   -7, -660,-1356,10759,20377, 5392,-1759, -269,\n   -6, -649,-1379,10634,20412, 5502,-1761, -275,\n   -6, -638,-1400,10510,20446, 5611,-1762, -282,\n   -6, -627,-1421,10385,20478, 5722,-1764, -288,\n   -5, -616,-1442,10260,20508, 5833,-1765, -295,\n   -5, -606,-1461,10135,20537, 5944,-1765, -301,\n   -5, -595,-1480,10011,20565, 6057,-1765, -308,\n   -4, -585,-1498, 9886,20590, 6169,-1765, -315,\n   -4, -574,-1516, 9762,20615, 6283,-1764, -322,\n   -4, -564,-1533, 9638,20637, 6397,-1763, -330,\n   -4, -554,-1549, 9514,20658, 6511,-1761, -337,\n   -3, -544,-1564, 9390,20678, 6626,-1759, -344,\n   -3, -534,-1579, 9266,20696, 6742,-1757, -352,\n   -3, -525,-1594, 9143,20712, 6858,-1753, -359,\n   -3, -515,-1607, 9020,20727, 6974,-1750, -367,\n   -3, -505,-1620, 8897,20739, 7091,-1746, -375,\n   -2, -496,-1633, 8774,20751, 7209,-1741, -383,\n   -2, -487,-1645, 8652,20761, 7327,-1736, -391,\n   -2, -477,-1656, 8530,20769, 7446,-1731, -399,\n   -2, -468,-1666, 8408,20775, 7564,-1724, -407,\n   -2, -459,-1676, 8286,20780, 7684,-1718, -416,\n   -2, -450,-1686, 8165,20783, 7803,-1711, -424,\n   -8, -441,-1695, 8044,20785, 7924,-1703, -433,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_48k_to_50p7k_filter.txt",
    "content": "//#define FIRFILTER_NUM \t(24)\n//#define UPSAMPLE_FACTOR_48TO50P7 73\n//#define DOWNSAMPLE_FACTOR_48TO50P7 69\n\n\t-17, 115, 196, -309, 531, -803,\n\t1107, -1412, 1684, -1879, 1916, 30581,\n\t2348, -2071, 1788, -1469, 1135, -814,\n\t533, -305, 190, 119, -17, -1,\n\t-17, 111, 202, -312, 530, -791,\n\t1078, -1354, 1579, -1688, 1493, 30565,\n\t2788, -2262, 1890, -1523, 1161, -824,\n\t533, -301, 183, 124, -17, 0,\n\t-17, 107, 208, -314, 527, -778,\n\t1047, -1295, 1473, -1496, 1080, 30531,\n\t3237, -2453, 1990, -1576, 1186, -832,\n\t532, -297, 176, 128, -18, 0,\n\t-16, 102, 214, -316, 524, -764,\n\t1015, -1234, 1366, -1306, 676, 30481,\n\t3694, -2642, 2088, -1627, 1210, -839,\n\t531, -292, 169, 133, -18, 0,\n\t-16, 98, 219, -318, 519, -749,\n\t981, -1172, 1257, -1116, 281, 30415,\n\t4158, -2831, 2184, -1676, 1231, -845,\n\t529, -286, 161, 137, -18, -1,\n\t-16, 94, 225, -319, 514, -733,\n\t947, -1108, 1148, -927, -103, 30332,\n\t4630, -3018, 2278, -1723, 1251, -850,\n\t525, -280, 154, 142, -18, -1,\n\t-16, 90, 230, -319, 509, -716,\n\t911, -1044, 1039, -740, -477, 30232,\n\t5109, -3203, 2369, -1767, 1269, -853,\n\t521, -274, 146, 146, -18, -1,\n\t-15, 86, 234, -319, 502, -698,\n\t875, -979, 929, -554, -840, 30116,\n\t5594, -3386, 2457, -1809, 1285, -855,\n\t517, -266, 138, 150, -18, -1,\n\t-15, 82, 239, -319, 495, -679,\n\t837, -912, 819, -370, -1193, 29984,\n\t6086, -3566, 2543, -1849, 1300, -856,\n\t511, -259, 130, 155, -18, -1,\n\t-15, 78, 243, -318, 488, -659,\n\t798, -845, 710, -189, -1534, 29836,\n\t6584, -3743, 2625, -1886, 1312, -855,\n\t504, -251, 121, 159, -18, -1,\n\t-14, 75, 247, -316, 479, -639,\n\t759, -778, 600, -10, -1865, 29672,\n\t7087, -3918, 2705, -1920, 1323, -853,\n\t497, -242, 112, 164, -18, -1,\n\t-14, 71, 250, -314, 470, -618,\n\t719, -710, 491, 167, -2184, 29493,\n\t7595, -4088, 2780, -1952, 1331, -850,\n\t489, -233, 103, 168, -17, -1,\n\t-14, 67, 254, -312, 461, -596,\n\t678, -642, 382, 340, -2492, 29297,\n\t8108, -4256, 2853, -1981, 1338, -845,\n\t479, -224, 94, 173, -17, -1,\n\t-13, 64, 257, -309, 451, -573,\n\t636, -573, 274, 511, -2789, 29086,\n\t8625, -4418, 2921, -2007, 1342, -839,\n\t469, -214, 85, 177, -17, -1,\n\t-13, 60, 259, -306, 440, -550,\n\t594, -504, 167, 678, -3074, 28860,\n\t9146, -4577, 2986, -2030, 1344, -831,\n\t459, -203, 76, 182, -17, -1,\n\t-13, 57, 262, -302, 428, -526,\n\t552, -435, 61, 841, -3347, 28620,\n\t9671, -4730, 3047, -2050, 1344, -822,\n\t447, -192, 66, 186, -16, -2,\n\t-12, 53, 264, -298, 417, -502,\n\t509, -367, -44, 1001, -3608, 28364,\n\t10198, -4879, 3103, -2067, 1342, -812,\n\t434, -181, 57, 191, -16, -2,\n\t-12, 50, 266, -293, 404, -477,\n\t466, -298, -148, 1156, -3857, 28094,\n\t10728, -5022, 3155, -2080, 1338, -800,\n\t421, -169, 47, 195, -16, -2,\n\t-12, 47, 268, -289, 392, -451,\n\t422, -230, -250, 1308, -4094, 27809,\n\t11260, -5160, 3203, -2091, 1331, -787,\n\t407, -157, 37, 199, -15, -2,\n\t-11, 44, 270, -283, 378, -426,\n\t379, -162, -350, 1455, -4320, 27511,\n\t11793, -5291, 3246, -2098, 1323, -772,\n\t392, -145, 27, 203, -15, -2,\n\t-11, 41, 271, -278, 365, -399,\n\t335, -95, -449, 1598, -4533, 27199,\n\t12328, -5416, 3284, -2102, 1312, -756,\n\t376, -132, 17, 207, -14, -2,\n\t-11, 38, 272, -272, 351, -373,\n\t291, -28, -546, 1736, -4734, 26874,\n\t12863, -5534, 3317, -2103, 1298, -739,\n\t359, -119, 7, 212, -13, -2,\n\t-10, 35, 273, -265, 336, -346,\n\t248, 38, -641, 1869, -4922, 26536,\n\t13398, -5646, 3346, -2100, 1283, -720,\n\t342, -105, -3, 216, -13, -3,\n\t-10, 32, 273, -258, 322, -319,\n\t204, 103, -733, 1997, -5099, 26185,\n\t13933, -5750, 3369, -2094, 1265, -700,\n\t324, -91, -14, 220, -12, -3,\n\t-10, 30, 274, -251, 307, -292,\n\t161, 167, -823, 2121, -5264, 25822,\n\t14467, -5846, 3387, -2084, 1245, -678,\n\t305, -77, -24, 223, -11, -3,\n\t-9, 27, 274, -244, 291, -265,\n\t117, 231, -911, 2239, -5416, 25447,\n\t15000, -5935, 3400, -2071, 1223, -656,\n\t285, -62, -35, 227, -10, -3,\n\t-9, 24, 273, -237, 276, -238,\n\t75, 293, -997, 2351, -5556, 25060,\n\t15532, -6015, 3408, -2054, 1199, -631,\n\t265, -47, -45, 231, -9, -3,\n\t-9, 22, 273, -229, 260, -210,\n\t32, 354, -1079, 2459, -5685, 24662,\n\t16061, -6088, 3409, -2033, 1172, -606,\n\t244, -32, -55, 234, -8, -4,\n\t-8, 20, 272, -220, 244, -183,\n\t-10, 414, -1160, 2561, -5801, 24253,\n\t16587, -6151, 3406, -2010, 1144, -579,\n\t223, -17, -66, 238, -7, -4,\n\t-8, 17, 272, -212, 228, -156,\n\t-52, 472, -1237, 2657, -5906, 23834,\n\t17110, -6206, 3397, -1982, 1113, -551,\n\t201, -1, -76, 241, -6, -4,\n\t-8, 15, 271, -203, 212, -128,\n\t-93, 529, -1311, 2748, -5999, 23405,\n\t17630, -6251, 3382, -1951, 1080, -522,\n\t178, 15, -87, 244, -5, -4,\n\t-7, 13, 269, -195, 195, -101,\n\t-133, 585, -1382, 2833, -6080, 22966,\n\t18145, -6287, 3361, -1917, 1044, -492,\n\t155, 31, -97, 247, -4, -4,\n\t-7, 11, 268, -185, 179, -74,\n\t-173, 639, -1451, 2912, -6150, 22518,\n\t18656, -6313, 3334, -1879, 1007, -460,\n\t131, 47, -107, 250, -2, -5,\n\t-7, 9, 266, -176, 162, -47,\n\t-212, 691, -1516, 2985, -6209, 22061,\n\t19161, -6330, 3302, -1837, 968, -428,\n\t107, 63, -117, 253, -1, -5,\n\t-6, 7, 265, -167, 146, -21,\n\t-250, 742, -1578, 3053, -6256, 21596,\n\t19661, -6336, 3264, -1792, 926, -394,\n\t82, 80, -127, 256, 0, -5,\n\t-6, 5, 263, -157, 129, 5,\n\t-287, 791, -1636, 3114, -6292, 21123,\n\t20155, -6332, 3220, -1743, 883, -360,\n\t57, 96, -138, 258, 2, -5,\n\t-6, 4, 260, -147, 113, 31,\n\t-324, 838, -1691, 3170, -6317, 20643,\n\t20643, -6317, 3170, -1691, 838, -324,\n\t31, 113, -147, 260, 4, -6,\n\t-5, 2, 258, -138, 96, 57,\n\t-360, 883, -1743, 3220, -6332, 20155,\n\t21123, -6292, 3114, -1636, 791, -287,\n\t5, 129, -157, 263, 5, -6,\n\t-5, 0, 256, -127, 80, 82,\n\t-394, 926, -1792, 3264, -6336, 19661,\n\t21596, -6256, 3053, -1578, 742, -250,\n\t-21, 146, -167, 265, 7, -6,\n\t-5, -1, 253, -117, 63, 107,\n\t-428, 968, -1837, 3302, -6330, 19161,\n\t22061, -6209, 2985, -1516, 691, -212,\n\t-47, 162, -176, 266, 9, -7,\n\t-5, -2, 250, -107, 47, 131,\n\t-460, 1007, -1879, 3334, -6313, 18656,\n\t22518, -6150, 2912, -1451, 639, -173,\n\t-74, 179, -185, 268, 11, -7,\n\t-4, -4, 247, -97, 31, 155,\n\t-492, 1044, -1917, 3361, -6287, 18145,\n\t22966, -6080, 2833, -1382, 585, -133,\n\t-101, 195, -195, 269, 13, -7,\n\t-4, -5, 244, -87, 15, 178,\n\t-522, 1080, -1951, 3382, -6251, 17630,\n\t23405, -5999, 2748, -1311, 529, -93,\n\t-128, 212, -203, 271, 15, -8,\n\t-4, -6, 241, -76, -1, 201,\n\t-551, 1113, -1982, 3397, -6206, 17110,\n\t23834, -5906, 2657, -1237, 472, -52,\n\t-156, 228, -212, 272, 17, -8,\n\t-4, -7, 238, -66, -17, 223,\n\t-579, 1144, -2010, 3406, -6151, 16587,\n\t24253, -5801, 2561, -1160, 414, -10,\n\t-183, 244, -220, 272, 20, -8,\n\t-4, -8, 234, -55, -32, 244,\n\t-606, 1172, -2033, 3409, -6088, 16061,\n\t24662, -5685, 2459, -1079, 354, 32,\n\t-210, 260, -229, 273, 22, -9,\n\t-3, -9, 231, -45, -47, 265,\n\t-631, 1199, -2054, 3408, -6015, 15532,\n\t25060, -5556, 2351, -997, 293, 75,\n\t-238, 276, -237, 273, 24, -9,\n\t-3, -10, 227, -35, -62, 285,\n\t-656, 1223, -2071, 3400, -5935, 15000,\n\t25447, -5416, 2239, -911, 231, 117,\n\t-265, 291, -244, 274, 27, -9,\n\t-3, -11, 223, -24, -77, 305,\n\t-678, 1245, -2084, 3387, -5846, 14467,\n\t25822, -5264, 2121, -823, 167, 161,\n\t-292, 307, -251, 274, 30, -10,\n\t-3, -12, 220, -14, -91, 324,\n\t-700, 1265, -2094, 3369, -5750, 13933,\n\t26185, -5099, 1997, -733, 103, 204,\n\t-319, 322, -258, 273, 32, -10,\n\t-3, -13, 216, -3, -105, 342,\n\t-720, 1283, -2100, 3346, -5646, 13398,\n\t26536, -4922, 1869, -641, 38, 248,\n\t-346, 336, -265, 273, 35, -10,\n\t-2, -13, 212, 7, -119, 359,\n\t-739, 1298, -2103, 3317, -5534, 12863,\n\t26874, -4734, 1736, -546, -28, 291,\n\t-373, 351, -272, 272, 38, -11,\n\t-2, -14, 207, 17, -132, 376,\n\t-756, 1312, -2102, 3284, -5416, 12328,\n\t27199, -4533, 1598, -449, -95, 335,\n\t-399, 365, -278, 271, 41, -11,\n\t-2, -15, 203, 27, -145, 392,\n\t-772, 1323, -2098, 3246, -5291, 11793,\n\t27511, -4320, 1455, -350, -162, 379,\n\t-426, 378, -283, 270, 44, -11,\n\t-2, -15, 199, 37, -157, 407,\n\t-787, 1331, -2091, 3203, -5160, 11260,\n\t27809, -4094, 1308, -250, -230, 422,\n\t-451, 392, -289, 268, 47, -12,\n\t-2, -16, 195, 47, -169, 421,\n\t-800, 1338, -2080, 3155, -5022, 10728,\n\t28094, -3857, 1156, -148, -298, 466,\n\t-477, 404, -293, 266, 50, -12,\n\t-2, -16, 191, 57, -181, 434,\n\t-812, 1342, -2067, 3103, -4879, 10198,\n\t28364, -3608, 1001, -44, -367, 509,\n\t-502, 417, -298, 264, 53, -12,\n\t-2, -16, 186, 66, -192, 447,\n\t-822, 1344, -2050, 3047, -4730, 9671,\n\t28620, -3347, 841, 61, -435, 552,\n\t-526, 428, -302, 262, 57, -13,\n\t-1, -17, 182, 76, -203, 459,\n\t-831, 1344, -2030, 2986, -4577, 9146,\n\t28860, -3074, 678, 167, -504, 594,\n\t-550, 440, -306, 259, 60, -13,\n\t-1, -17, 177, 85, -214, 469,\n\t-839, 1342, -2007, 2921, -4418, 8625,\n\t29086, -2789, 511, 274, -573, 636,\n\t-573, 451, -309, 257, 64, -13,\n\t-1, -17, 173, 94, -224, 479,\n\t-845, 1338, -1981, 2853, -4256, 8108,\n\t29297, -2492, 340, 382, -642, 678,\n\t-596, 461, -312, 254, 67, -14,\n\t-1, -17, 168, 103, -233, 489,\n\t-850, 1331, -1952, 2780, -4088, 7595,\n\t29493, -2184, 167, 491, -710, 719,\n\t-618, 470, -314, 250, 71, -14,\n\t-1, -18, 164, 112, -242, 497,\n\t-853, 1323, -1920, 2705, -3918, 7087,\n\t29672, -1865, -10, 600, -778, 759,\n\t-639, 479, -316, 247, 75, -14,\n\t-1, -18, 159, 121, -251, 504,\n\t-855, 1312, -1886, 2625, -3743, 6584,\n\t29836, -1534, -189, 710, -845, 798,\n\t-659, 488, -318, 243, 78, -15,\n\t-1, -18, 155, 130, -259, 511,\n\t-856, 1300, -1849, 2543, -3566, 6086,\n\t29984, -1193, -370, 819, -912, 837,\n\t-679, 495, -319, 239, 82, -15,\n\t-1, -18, 150, 138, -266, 517,\n\t-855, 1285, -1809, 2457, -3386, 5594,\n\t30116, -840, -554, 929, -979, 875,\n\t-698, 502, -319, 234, 86, -15,\n\t-1, -18, 146, 146, -274, 521,\n\t-853, 1269, -1767, 2369, -3203, 5109,\n\t30232, -477, -740, 1039, -1044, 911,\n\t-716, 509, -319, 230, 90, -16,\n\t-1, -18, 142, 154, -280, 525,\n\t-850, 1251, -1723, 2278, -3018, 4630,\n\t30332, -103, -927, 1148, -1108, 947,\n\t-733, 514, -319, 225, 94, -16,\n\t-1, -18, 137, 161, -286, 529,\n\t-845, 1231, -1676, 2184, -2831, 4158,\n\t30415, 281, -1116, 1257, -1172, 981,\n\t-749, 519, -318, 219, 98, -16,\n\t0, -18, 133, 169, -292, 531,\n\t-839, 1210, -1627, 2088, -2642, 3694,\n\t30481, 676, -1306, 1366, -1234, 1015,\n\t-764, 524, -316, 214, 102, -16,\n\t0, -18, 128, 176, -297, 532,\n\t-832, 1186, -1576, 1990, -2453, 3237,\n\t30531, 1080, -1496, 1473, -1295, 1047,\n\t-778, 527, -314, 208, 107, -17,\n\t0, -17, 124, 183, -301, 533,\n\t-824, 1161, -1523, 1890, -2262, 2788,\n\t30565, 1493, -1688, 1579, -1354, 1078,\n\t-791, 530, -312, 202, 111, -17,\n\t-1, -17, 119, 190, -305, 533,\n\t-814, 1135, -1469, 1788, -2071, 2348,\n\t30581, 1916, -1879, 1684, -1412, 1107,\n\t-803, 531, -309, 196, 115, -17,\n\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_50p7k_to_44p1k_filter.txt",
    "content": "//single phase coef Number:=6,    upsample factor:=33,     downsample factor:=38\n -1212, 4016,26371, 4690,-1301,   -5,\n-1125, 3378,26303, 5398,-1389,   -5,\n-1038, 2776,26167, 6138,-1476,   -7,\n -954, 2212,25964, 6908,-1560,  -11,\n -873, 1686,25695, 7706,-1641,  -15,\n -794, 1199,25362, 8530,-1718,  -20,\n -719,  749,24967, 9376,-1788,  -26,\n -649,  338,24512,10241,-1850,  -33,\n -582,  -35,24000,11121,-1903,  -43,\n -519, -371,23434,12014,-1945,  -54,\n -461, -671,22817,12915,-1975,  -67,\n -407, -936,22153,13821,-1990,  -82,\n -357,-1167,21445,14727,-1989,  -99,\n -312,-1366,20698,15628,-1969, -120,\n -270,-1534,19916,16521,-1930, -143,\n -233,-1672,19102,17400,-1868, -170,\n -199,-1783,18262,18262,-1783, -199,\n -170,-1868,17400,19102,-1672, -233,\n -143,-1930,16521,19916,-1534, -270,\n -120,-1969,15628,20698,-1366, -312,\n  -99,-1989,14727,21445,-1167, -357,\n  -82,-1990,13821,22153, -936, -407,\n  -67,-1975,12915,22817, -671, -461,\n  -54,-1945,12014,23434, -371, -519,\n  -43,-1903,11121,24000,  -35, -582,\n  -33,-1850,10241,24512,  338, -649,\n  -26,-1788, 9376,24967,  749, -719,\n  -20,-1718, 8530,25362, 1199, -794,\n  -15,-1641, 7706,25695, 1686, -873,\n  -11,-1560, 6908,25964, 2212, -954,\n   -7,-1476, 6138,26167, 2776,-1038,\n   -5,-1389, 5398,26303, 3378,-1125,\n   -5,-1301, 4690,26371, 4016,-1212,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_50p7k_to_48k_filter.txt",
    "content": "//single phase coef Number:=6,    upsample factor:=69,     downsample factor:=73\n -1179, 4401,25926, 4717,-1218,   -8,\n-1140, 4092,25911, 5041,-1257,   -4,\n-1101, 3791,25881, 5372,-1295,   -5,\n-1062, 3498,25836, 5711,-1334,   -6,\n-1024, 3213,25776, 6056,-1372,   -7,\n -985, 2936,25701, 6408,-1409,   -8,\n -948, 2667,25611, 6767,-1446,  -10,\n -910, 2407,25507, 7131,-1482,  -11,\n -873, 2155,25388, 7502,-1517,  -13,\n -837, 1911,25255, 7878,-1551,  -15,\n -802, 1676,25108, 8260,-1584,  -18,\n -767, 1449,24947, 8647,-1616,  -20,\n -732, 1231,24772, 9039,-1646,  -23,\n -699, 1021,24584, 9435,-1674,  -26,\n -666,  819,24383, 9835,-1700,  -30,\n -634,  626,24168,10240,-1725,  -33,\n -603,  441,23941,10647,-1747,  -38,\n -573,  265,23701,11058,-1768,  -42,\n -544,   97,23450,11471,-1785,  -47,\n -515,  -64,23187,11886,-1800,  -52,\n -488, -216,22912,12303,-1812,  -58,\n -461, -360,22626,12722,-1821,  -64,\n -435, -497,22330,13142,-1827,  -71,\n -411, -625,22023,13562,-1830,  -78,\n -387, -746,21707,13982,-1828,  -86,\n -364, -860,21381,14402,-1823,  -94,\n -342, -967,21046,14822,-1814, -103,\n -321,-1066,20702,15240,-1801, -112,\n -300,-1158,20350,15656,-1783, -122,\n -281,-1244,19991,16070,-1761, -133,\n -263,-1322,19624,16482,-1734, -144,\n -245,-1395,19250,16891,-1702, -157,\n -228,-1461,18870,17295,-1665, -169,\n -212,-1520,18484,17696,-1623, -183,\n -197,-1574,18093,18093,-1574, -197,\n -183,-1623,17696,18484,-1520, -212,\n -169,-1665,17295,18870,-1461, -228,\n -157,-1702,16891,19250,-1395, -245,\n -144,-1734,16482,19624,-1322, -263,\n -133,-1761,16070,19991,-1244, -281,\n -122,-1783,15656,20350,-1158, -300,\n -112,-1801,15240,20702,-1066, -321,\n -103,-1814,14822,21046, -967, -342,\n  -94,-1823,14402,21381, -860, -364,\n  -86,-1828,13982,21707, -746, -387,\n  -78,-1830,13562,22023, -625, -411,\n  -71,-1827,13142,22330, -497, -435,\n  -64,-1821,12722,22626, -360, -461,\n  -58,-1812,12303,22912, -216, -488,\n  -52,-1800,11886,23187,  -64, -515,\n  -47,-1785,11471,23450,   97, -544,\n  -42,-1768,11058,23701,  265, -573,\n  -38,-1747,10647,23941,  441, -603,\n  -33,-1725,10240,24168,  626, -634,\n  -30,-1700, 9835,24383,  819, -666,\n  -26,-1674, 9435,24584, 1021, -699,\n  -23,-1646, 9039,24772, 1231, -732,\n  -20,-1616, 8647,24947, 1449, -767,\n  -18,-1584, 8260,25108, 1676, -802,\n  -15,-1551, 7878,25255, 1911, -837,\n  -13,-1517, 7502,25388, 2155, -873,\n  -11,-1482, 7131,25507, 2407, -910,\n  -10,-1446, 6767,25611, 2667, -948,\n   -8,-1409, 6408,25701, 2936, -985,\n   -7,-1372, 6056,25776, 3213,-1024,\n   -6,-1334, 5711,25836, 3498,-1062,\n   -5,-1295, 5372,25881, 3791,-1101,\n   -4,-1257, 5041,25911, 4092,-1140,\n   -8,-1218, 4717,25926, 4401,-1179,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_8k_to_8p4k_filter.txt",
    "content": "//#define UPSAMPLE_FACTOR_8TO8P4 73\n//#define DOWNSAMPLE_FACTOR_8TO8P4 69\n//#define FIRFILTER_NUM_MONO_8TO8P4 18\n\n  -13,  936, -414,  500, -551,  588,\n -590,  502,31399,  932, -790,  706,\n -626,  547, -446,  946,   -8,  -41,\n  -18,  926, -381,  452, -477,  470,\n -392,   84,31380, 1373, -992,  824,\n -700,  594, -477,  954,   -3,   -8,\n  -22,  916, -348,  404, -402,  353,\n -197, -324,31342, 1824,-1195,  942,\n -773,  641, -508,  963,    3,   -9,\n  -26,  904, -314,  356, -328,  237,\n   -4, -719,31286, 2285,-1399, 1060,\n -847,  687, -538,  970,    9,  -10,\n  -30,  893, -280,  308, -254,  122,\n  186,-1102,31211, 2756,-1605, 1178,\n -919,  732, -568,  977,   15,  -10,\n  -33,  881, -246,  259, -180,    9,\n  372,-1474,31118, 3237,-1811, 1296,\n -991,  776, -596,  983,   21,  -11,\n  -37,  868, -211,  211, -107, -104,\n  555,-1833,31006, 3727,-2017, 1412,\n-1062,  820, -624,  988,   28,  -12,\n  -40,  855, -176,  163,  -35, -214,\n  734,-2179,30876, 4225,-2223, 1527,\n-1132,  863, -651,  993,   35,  -13,\n  -43,  841, -141,  115,   37, -323,\n  908,-2512,30727, 4732,-2428, 1642,\n-1201,  904, -677,  997,   43,  -14,\n  -45,  827, -106,   68,  107, -430,\n 1079,-2833,30561, 5247,-2633, 1754,\n-1268,  945, -702, 1000,   51,  -15,\n  -47,  813,  -71,   21,  177, -535,\n 1245,-3140,30376, 5769,-2836, 1865,\n-1334,  984, -726, 1002,   59,  -16,\n  -49,  798,  -35,  -26,  246, -638,\n 1406,-3434,30174, 6299,-3037, 1975,\n-1398, 1022, -748, 1003,   67,  -17,\n  -51,  783,    0,  -72,  313, -738,\n 1563,-3715,29955, 6834,-3237, 2082,\n-1461, 1059, -770, 1003,   76,  -18,\n  -53,  768,   36, -118,  379, -836,\n 1714,-3982,29718, 7376,-3434, 2187,\n-1522, 1094, -790, 1003,   85,  -20,\n  -54,  752,   71, -162,  444, -931,\n 1860,-4236,29464, 7924,-3629, 2289,\n-1580, 1128, -809, 1002,   95,  -21,\n  -56,  736,  106, -206,  507,-1023,\n 2000,-4476,29194, 8477,-3820, 2389,\n-1637, 1160, -827, 1000,  105,  -22,\n  -57,  720,  141, -250,  569,-1113,\n 2135,-4703,28907, 9034,-4008, 2485,\n-1692, 1190, -844,  996,  115,  -23,\n  -58,  704,  175, -292,  629,-1199,\n 2264,-4916,28605, 9596,-4192, 2579,\n-1744, 1219, -859,  992,  125,  -24,\n  -58,  687,  209, -333,  687,-1282,\n 2387,-5115,28286,10161,-4372, 2669,\n-1793, 1246, -873,  987,  136,  -26,\n  -59,  670,  243, -374,  743,-1362,\n 2504,-5300,27953,10729,-4547, 2755,\n-1840, 1271, -886,  982,  147,  -27,\n  -59,  654,  277, -413,  798,-1438,\n 2615,-5472,27604,11300,-4717, 2838,\n-1885, 1294, -897,  975,  159,  -28,\n  -60,  637,  310, -451,  850,-1511,\n 2719,-5631,27240,11873,-4881, 2917,\n-1926, 1315, -906,  967,  171,  -30,\n  -60,  620,  343, -488,  900,-1581,\n 2818,-5775,26863,12447,-5040, 2992,\n-1965, 1334, -914,  958,  183,  -31,\n  -60,  603,  375, -524,  948,-1647,\n 2910,-5907,26471,13022,-5193, 3062,\n-2001, 1351, -921,  948,  195,  -32,\n  -59,  586,  407, -558,  994,-1709,\n 2995,-6025,26066,13598,-5339, 3128,\n-2033, 1366, -926,  938,  208,  -34,\n  -59,  568,  438, -591, 1038,-1767,\n 3074,-6130,25648,14173,-5478, 3189,\n-2062, 1379, -929,  926,  221,  -35,\n  -59,  551,  469, -623, 1079,-1822,\n 3146,-6221,25217,14748,-5610, 3245,\n-2088, 1389, -931,  913,  235,  -37,\n  -58,  534,  498, -653, 1118,-1872,\n 3212,-6300,24775,15321,-5734, 3296,\n-2111, 1397, -931,  900,  249,  -38,\n  -58,  517,  528, -682, 1155,-1919,\n 3271,-6366,24321,15892,-5851, 3342,\n-2130, 1403, -929,  885,  263,  -39,\n  -57,  500,  556, -710, 1189,-1962,\n 3323,-6419,23855,16461,-5959, 3383,\n-2146, 1406, -926,  870,  277,  -41,\n  -56,  483,  584, -735, 1221,-2001,\n 3369,-6460,23379,17027,-6058, 3418,\n-2158, 1407, -921,  853,  291,  -42,\n  -55,  466,  611, -760, 1251,-2035,\n 3408,-6488,22893,17590,-6148, 3448,\n-2166, 1405, -915,  836,  306,  -44,\n  -54,  449,  637, -783, 1277,-2066,\n 3441,-6504,22397,18148,-6229, 3471,\n-2170, 1401, -907,  817,  321,  -45,\n  -53,  433,  663, -804, 1302,-2093,\n 3467,-6509,21892,18702,-6301, 3489,\n-2171, 1394, -897,  798,  337,  -46,\n  -52,  416,  688, -824, 1324,-2116,\n 3486,-6502,21379,19250,-6362, 3501,\n-2168, 1385, -886,  778,  352,  -48,\n  -51,  400,  711, -842, 1343,-2135,\n 3500,-6483,20857,19792,-6413, 3507,\n-2161, 1374, -873,  756,  368,  -49,\n  -50,  384,  734, -858, 1360,-2150,\n 3506,-6453,20328,20328,-6453, 3506,\n-2150, 1360, -858,  734,  384,  -50,\n  -49,  368,  756, -873, 1374,-2161,\n 3507,-6413,19792,20857,-6483, 3500,\n-2135, 1343, -842,  711,  400,  -51,\n  -48,  352,  778, -886, 1385,-2168,\n 3501,-6362,19250,21379,-6502, 3486,\n-2116, 1324, -824,  688,  416,  -52,\n  -46,  337,  798, -897, 1394,-2171,\n 3489,-6301,18702,21892,-6509, 3467,\n-2093, 1302, -804,  663,  433,  -53,\n  -45,  321,  817, -907, 1401,-2170,\n 3471,-6229,18148,22397,-6504, 3441,\n-2066, 1277, -783,  637,  449,  -54,\n  -44,  306,  836, -915, 1405,-2166,\n 3448,-6148,17590,22893,-6488, 3408,\n-2035, 1251, -760,  611,  466,  -55,\n  -42,  291,  853, -921, 1407,-2158,\n 3418,-6058,17027,23379,-6460, 3369,\n-2001, 1221, -735,  584,  483,  -56,\n  -41,  277,  870, -926, 1406,-2146,\n 3383,-5959,16461,23855,-6419, 3323,\n-1962, 1189, -710,  556,  500,  -57,\n  -39,  263,  885, -929, 1403,-2130,\n 3342,-5851,15892,24321,-6366, 3271,\n-1919, 1155, -682,  528,  517,  -58,\n  -38,  249,  900, -931, 1397,-2111,\n 3296,-5734,15321,24775,-6300, 3212,\n-1872, 1118, -653,  498,  534,  -58,\n  -37,  235,  913, -931, 1389,-2088,\n 3245,-5610,14748,25217,-6221, 3146,\n-1822, 1079, -623,  469,  551,  -59,\n  -35,  221,  926, -929, 1379,-2062,\n 3189,-5478,14173,25648,-6130, 3074,\n-1767, 1038, -591,  438,  568,  -59,\n  -34,  208,  938, -926, 1366,-2033,\n 3128,-5339,13598,26066,-6025, 2995,\n-1709,  994, -558,  407,  586,  -59,\n  -32,  195,  948, -921, 1351,-2001,\n 3062,-5193,13022,26471,-5907, 2910,\n-1647,  948, -524,  375,  603,  -60,\n  -31,  183,  958, -914, 1334,-1965,\n 2992,-5040,12447,26863,-5775, 2818,\n-1581,  900, -488,  343,  620,  -60,\n  -30,  171,  967, -906, 1315,-1926,\n 2917,-4881,11873,27240,-5631, 2719,\n-1511,  850, -451,  310,  637,  -60,\n  -28,  159,  975, -897, 1294,-1885,\n 2838,-4717,11300,27604,-5472, 2615,\n-1438,  798, -413,  277,  654,  -59,\n  -27,  147,  982, -886, 1271,-1840,\n 2755,-4547,10729,27953,-5300, 2504,\n-1362,  743, -374,  243,  670,  -59,\n  -26,  136,  987, -873, 1246,-1793,\n 2669,-4372,10161,28286,-5115, 2387,\n-1282,  687, -333,  209,  687,  -58,\n  -24,  125,  992, -859, 1219,-1744,\n 2579,-4192, 9596,28605,-4916, 2264,\n-1199,  629, -292,  175,  704,  -58,\n  -23,  115,  996, -844, 1190,-1692,\n 2485,-4008, 9034,28907,-4703, 2135,\n-1113,  569, -250,  141,  720,  -57,\n  -22,  105, 1000, -827, 1160,-1637,\n 2389,-3820, 8477,29194,-4476, 2000,\n-1023,  507, -206,  106,  736,  -56,\n  -21,   95, 1002, -809, 1128,-1580,\n 2289,-3629, 7924,29464,-4236, 1860,\n -931,  444, -162,   71,  752,  -54,\n  -20,   85, 1003, -790, 1094,-1522,\n 2187,-3434, 7376,29718,-3982, 1714,\n -836,  379, -118,   36,  768,  -53,\n  -18,   76, 1003, -770, 1059,-1461,\n 2082,-3237, 6834,29955,-3715, 1563,\n -738,  313,  -72,    0,  783,  -51,\n  -17,   67, 1003, -748, 1022,-1398,\n 1975,-3037, 6299,30174,-3434, 1406,\n -638,  246,  -26,  -35,  798,  -49,\n  -16,   59, 1002, -726,  984,-1334,\n 1865,-2836, 5769,30376,-3140, 1245,\n -535,  177,   21,  -71,  813,  -47,\n  -15,   51, 1000, -702,  945,-1268,\n 1754,-2633, 5247,30561,-2833, 1079,\n -430,  107,   68, -106,  827,  -45,\n  -14,   43,  997, -677,  904,-1201,\n 1642,-2428, 4732,30727,-2512,  908,\n -323,   37,  115, -141,  841,  -43,\n  -13,   35,  993, -651,  863,-1132,\n 1527,-2223, 4225,30876,-2179,  734,\n -214,  -35,  163, -176,  855,  -40,\n  -12,   28,  988, -624,  820,-1062,\n 1412,-2017, 3727,31006,-1833,  555,\n -104, -107,  211, -211,  868,  -37,\n  -11,   21,  983, -596,  776, -991,\n 1296,-1811, 3237,31118,-1474,  372,\n    9, -180,  259, -246,  881,  -33,\n  -10,   15,  977, -568,  732, -919,\n 1178,-1605, 2756,31211,-1102,  186,\n  122, -254,  308, -280,  893,  -30,\n  -10,    9,  970, -538,  687, -847,\n 1060,-1399, 2285,31286, -719,   -4,\n  237, -328,  356, -314,  904,  -26,\n   -9,    3,  963, -508,  641, -773,\n  942,-1195, 1824,31342, -324, -197,\n  353, -402,  404, -348,  916,  -22,\n   -8,   -3,  954, -477,  594, -700,\n  824, -992, 1373,31380,   84, -392,\n  470, -477,  452, -381,  926,  -18,\n  -41,   -8,  946, -446,  547, -626,\n  706, -790,  932,31399,  502, -590,\n  588, -551,  500, -414,  936,  -13,\n\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_8p4k_to_8k_filter.txt",
    "content": "//#define UPSAMPLE_FACTOR_8P4TO8 69\n//#define DOWNSAMPLE_FACTOR_8P4TO8 73\n//#define FIRFILTER_NUM_MONO_8P4TO8 16\n\n   83, -774,  602, -839,  991,-1098,\n 1072,30795, 1520,-1297, 1100, -900,\n  635, -784,   80,   39,   86, -764,\n  568, -778,  881, -899,  635,30775,\n 1980,-1498, 1208, -959,  668, -793,\n   77,    9,   89, -752,  533, -716,\n  772, -703,  210,30735, 2450,-1700,\n 1316,-1018,  700, -802,   73,   10,\n   91, -741,  497, -654,  663, -508,\n -203,30675, 2930,-1902, 1424,-1076,\n  731, -810,   69,   11,   93, -728,\n  461, -591,  554, -317, -604,30596,\n 3421,-2105, 1530,-1133,  760, -817,\n   64,   12,   95, -715,  425, -529,\n  446, -128, -992,30496, 3921,-2306,\n 1634,-1188,  789, -823,   59,   13,\n   96, -702,  388, -466,  338,   58,\n-1367,30377, 4431,-2508, 1738,-1242,\n  816, -828,   54,   14,   97, -688,\n  350, -403,  232,  241,-1729,30239,\n 4949,-2708, 1839,-1295,  843, -833,\n   48,   15,   98, -674,  313, -341,\n  126,  420,-2077,30081, 5475,-2907,\n 1939,-1346,  868, -836,   42,   16,\n   99, -659,  275, -279,   22,  595,\n-2412,29904, 6009,-3103, 2036,-1395,\n  891, -839,   36,   18,   99, -644,\n  237, -217,  -80,  765,-2733,29709,\n 6550,-3298, 2131,-1442,  913, -841,\n   29,   19,   99, -628,  199, -156,\n -181,  932,-3041,29494, 7098,-3490,\n 2223,-1487,  934, -841,   22,   21,\n  100, -613,  161,  -96, -280, 1094,\n-3334,29262, 7653,-3679, 2313,-1530,\n  953, -841,   15,   22,   99, -597,\n  123,  -36, -377, 1250,-3613,29011,\n 8213,-3864, 2399,-1571,  971, -840,\n    7,   24,   99, -580,   85,   23,\n -471, 1402,-3878,28742, 8778,-4045,\n 2482,-1609,  987, -838,   -1,   25,\n   98, -564,   48,   81, -564, 1549,\n-4129,28456, 9348,-4222, 2562,-1645,\n 1001, -835,  -10,   27,   98, -547,\n   10,  138, -654, 1690,-4365,28153,\n 9921,-4395, 2638,-1678, 1013, -830,\n  -19,   29,   97, -530,  -27,  194,\n -741, 1825,-4587,27832,10498,-4562,\n 2710,-1709, 1024, -825,  -28,   30,\n   96, -513,  -64,  248, -826, 1955,\n-4795,27496,11079,-4723, 2778,-1737,\n 1033, -819,  -38,   32,   95, -496,\n -100,  302, -908, 2078,-4988,27143,\n11661,-4879, 2841,-1761, 1040, -811,\n  -48,   34,   93, -479, -136,  353,\n -987, 2196,-5167,26775,12245,-5028,\n 2900,-1783, 1045, -803,  -59,   36,\n   92, -462, -171,  404,-1062, 2307,\n-5332,26391,12830,-5170, 2955,-1802,\n 1048, -793,  -70,   38,   90, -445,\n -206,  453,-1135, 2412,-5482,25993,\n13415,-5306, 3004,-1818, 1049, -782,\n  -81,   40,   89, -427, -240,  500,\n-1205, 2511,-5619,25581,14001,-5433,\n 3049,-1831, 1048, -770,  -93,   42,\n   87, -410, -274,  546,-1271, 2604,\n-5741,25155,14585,-5553, 3088,-1840,\n 1045, -757, -105,   44,   85, -393,\n -307,  590,-1334, 2689,-5850,24715,\n15169,-5664, 3122,-1846, 1040, -743,\n -118,   46,   83, -376, -339,  632,\n-1393, 2769,-5944,24263,15750,-5767,\n 3151,-1848, 1033, -728, -131,   49,\n   81, -359, -370,  672,-1449, 2841,\n-6025,23798,16328,-5860, 3173,-1847,\n 1024, -711, -144,   51,   79, -342,\n -401,  710,-1501, 2907,-6093,23322,\n16903,-5944, 3190,-1842, 1012, -694,\n -157,   53,   77, -326, -431,  747,\n-1550, 2967,-6148,22835,17475,-6018,\n 3202,-1834,  999, -675, -171,   55,\n   75, -309, -460,  781,-1595, 3020,\n-6189,22337,18041,-6082, 3207,-1822,\n  983, -655, -185,   57,   73, -293,\n -487,  814,-1636, 3066,-6218,21829,\n18603,-6136, 3206,-1807,  965, -634,\n -200,   60,   71, -277, -514,  844,\n-1674, 3105,-6234,21311,19159,-6178,\n 3198,-1788,  945, -612, -215,   62,\n   69, -261, -540,  873,-1708, 3138,\n-6238,20785,19708,-6210, 3185,-1765,\n  923, -589, -230,   64,   66, -245,\n -565,  899,-1738, 3165,-6230,20250,\n20250,-6230, 3165,-1738,  899, -565,\n -245,   66,   64, -230, -589,  923,\n-1765, 3185,-6210,19708,20785,-6238,\n 3138,-1708,  873, -540, -261,   69,\n   62, -215, -612,  945,-1788, 3198,\n-6178,19159,21311,-6234, 3105,-1674,\n  844, -514, -277,   71,   60, -200,\n -634,  965,-1807, 3206,-6136,18603,\n21829,-6218, 3066,-1636,  814, -487,\n -293,   73,   57, -185, -655,  983,\n-1822, 3207,-6082,18041,22337,-6189,\n 3020,-1595,  781, -460, -309,   75,\n   55, -171, -675,  999,-1834, 3202,\n-6018,17475,22835,-6148, 2967,-1550,\n  747, -431, -326,   77,   53, -157,\n -694, 1012,-1842, 3190,-5944,16903,\n23322,-6093, 2907,-1501,  710, -401,\n -342,   79,   51, -144, -711, 1024,\n-1847, 3173,-5860,16328,23798,-6025,\n 2841,-1449,  672, -370, -359,   81,\n   49, -131, -728, 1033,-1848, 3151,\n-5767,15750,24263,-5944, 2769,-1393,\n  632, -339, -376,   83,   46, -118,\n -743, 1040,-1846, 3122,-5664,15169,\n24715,-5850, 2689,-1334,  590, -307,\n -393,   85,   44, -105, -757, 1045,\n-1840, 3088,-5553,14585,25155,-5741,\n 2604,-1271,  546, -274, -410,   87,\n   42,  -93, -770, 1048,-1831, 3049,\n-5433,14001,25581,-5619, 2511,-1205,\n  500, -240, -427,   89,   40,  -81,\n -782, 1049,-1818, 3004,-5306,13415,\n25993,-5482, 2412,-1135,  453, -206,\n -445,   90,   38,  -70, -793, 1048,\n-1802, 2955,-5170,12830,26391,-5332,\n 2307,-1062,  404, -171, -462,   92,\n   36,  -59, -803, 1045,-1783, 2900,\n-5028,12245,26775,-5167, 2196, -987,\n  353, -136, -479,   93,   34,  -48,\n -811, 1040,-1761, 2841,-4879,11661,\n27143,-4988, 2078, -908,  302, -100,\n -496,   95,   32,  -38, -819, 1033,\n-1737, 2778,-4723,11079,27496,-4795,\n 1955, -826,  248,  -64, -513,   96,\n   30,  -28, -825, 1024,-1709, 2710,\n-4562,10498,27832,-4587, 1825, -741,\n  194,  -27, -530,   97,   29,  -19,\n -830, 1013,-1678, 2638,-4395, 9921,\n28153,-4365, 1690, -654,  138,   10,\n -547,   98,   27,  -10, -835, 1001,\n-1645, 2562,-4222, 9348,28456,-4129,\n 1549, -564,   81,   48, -564,   98,\n   25,   -1, -838,  987,-1609, 2482,\n-4045, 8778,28742,-3878, 1402, -471,\n   23,   85, -580,   99,   24,    7,\n -840,  971,-1571, 2399,-3864, 8213,\n29011,-3613, 1250, -377,  -36,  123,\n -597,   99,   22,   15, -841,  953,\n-1530, 2313,-3679, 7653,29262,-3334,\n 1094, -280,  -96,  161, -613,  100,\n   21,   22, -841,  934,-1487, 2223,\n-3490, 7098,29494,-3041,  932, -181,\n -156,  199, -628,   99,   19,   29,\n -841,  913,-1442, 2131,-3298, 6550,\n29709,-2733,  765,  -80, -217,  237,\n -644,   99,   18,   36, -839,  891,\n-1395, 2036,-3103, 6009,29904,-2412,\n  595,   22, -279,  275, -659,   99,\n   16,   42, -836,  868,-1346, 1939,\n-2907, 5475,30081,-2077,  420,  126,\n -341,  313, -674,   98,   15,   48,\n -833,  843,-1295, 1839,-2708, 4949,\n30239,-1729,  241,  232, -403,  350,\n -688,   97,   14,   54, -828,  816,\n-1242, 1738,-2508, 4431,30377,-1367,\n   58,  338, -466,  388, -702,   96,\n   13,   59, -823,  789,-1188, 1634,\n-2306, 3921,30496, -992, -128,  446,\n -529,  425, -715,   95,   12,   64,\n -817,  760,-1133, 1530,-2105, 3421,\n30596, -604, -317,  554, -591,  461,\n -728,   93,   11,   69, -810,  731,\n-1076, 1424,-1902, 2930,30675, -203,\n -508,  663, -654,  497, -741,   91,\n   10,   73, -802,  700,-1018, 1316,\n-1700, 2450,30735,  210, -703,  772,\n -716,  533, -752,   89,    9,   77,\n -793,  668, -959, 1208,-1498, 1980,\n30775,  635, -899,  881, -778,  568,\n -764,   86,   39,   80, -784,  635,\n -900, 1100,-1297, 1520,30795, 1072,\n-1098,  991, -839,  602, -774,   83,\n\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_any_up256_filter.txt",
    "content": "//single phase coef Number:=24,    upsample factor:=256,\n       -23,   45, -102,  210, -386,  645, -982, 1374,-1777, 2135,-2405,32741,-2294, 2089,-1755, 1365, -979,  645, -388,  211, -103,   45,  -23,   39,\n  -23,   44, -101,  208, -385,  644, -984, 1383,-1798, 2181,-2515,32739,-2181, 2043,-1733, 1355, -976,  645, -389,  212, -104,   46,  -23,    1,\n  -22,   44, -100,  207, -384,  644, -987, 1392,-1819, 2225,-2624,32735,-2067, 1996,-1711, 1345, -973,  645, -390,  213, -105,   46,  -23,    1,\n  -22,   43,  -99,  205, -382,  643, -989, 1400,-1840, 2270,-2731,32729,-1952, 1948,-1688, 1335, -969,  645, -391,  215, -106,   47,  -24,    1,\n  -22,   43,  -98,  204, -380,  643, -991, 1408,-1860, 2313,-2837,32721,-1835, 1900,-1664, 1324, -966,  645, -392,  216, -107,   47,  -24,    1,\n  -22,   42,  -97,  202, -379,  642, -993, 1416,-1880, 2356,-2941,32711,-1717, 1851,-1641, 1314, -962,  645, -393,  217, -108,   48,  -24,    1,\n  -22,   41,  -96,  201, -377,  641, -995, 1424,-1899, 2398,-3045,32700,-1598, 1802,-1617, 1303, -958,  644, -394,  218, -108,   48,  -24,    1,\n  -22,   41,  -95,  199, -375,  640, -996, 1432,-1918, 2440,-3147,32686,-1478, 1752,-1592, 1291, -954,  644, -395,  219, -109,   49,  -24,    1,\n  -21,   40,  -94,  198, -373,  638, -998, 1439,-1936, 2481,-3247,32671,-1356, 1701,-1567, 1280, -950,  643, -396,  220, -110,   49,  -24,    1,\n  -21,   40,  -93,  196, -372,  637, -999, 1446,-1954, 2522,-3346,32653,-1233, 1650,-1542, 1268, -945,  642, -397,  221, -111,   49,  -25,    1,\n  -21,   39,  -92,  195, -370,  636,-1000, 1452,-1972, 2562,-3444,32634,-1109, 1598,-1517, 1256, -941,  642, -397,  222, -112,   50,  -25,    1,\n  -21,   39,  -91,  193, -368,  634,-1001, 1458,-1989, 2601,-3540,32613, -983, 1546,-1491, 1244, -936,  641, -398,  223, -112,   50,  -25,    1,\n  -21,   38,  -90,  191, -366,  633,-1001, 1464,-2006, 2639,-3635,32589, -857, 1494,-1464, 1231, -931,  639, -399,  224, -113,   51,  -25,    1,\n  -20,   38,  -89,  190, -364,  631,-1002, 1470,-2023, 2677,-3729,32564, -729, 1441,-1438, 1218, -926,  638, -399,  225, -114,   51,  -25,    1,\n  -20,   37,  -88,  188, -361,  629,-1002, 1476,-2039, 2714,-3821,32537, -599, 1387,-1411, 1205, -920,  637, -400,  226, -115,   52,  -25,    1,\n  -20,   37,  -87,  186, -359,  627,-1002, 1481,-2054, 2751,-3912,32508, -469, 1333,-1383, 1192, -915,  635, -400,  227, -115,   52,  -25,    1,\n  -20,   36,  -86,  184, -357,  625,-1002, 1486,-2069, 2787,-4001,32477, -337, 1278,-1356, 1178, -909,  634, -400,  228, -116,   53,  -26,    1,\n  -20,   35,  -85,  183, -355,  623,-1002, 1490,-2084, 2822,-4089,32444, -204, 1223,-1328, 1164, -903,  632, -400,  229, -117,   53,  -26,    1,\n  -19,   35,  -84,  181, -352,  621,-1001, 1494,-2098, 2857,-4176,32409,  -70, 1167,-1299, 1150, -897,  630, -401,  229, -117,   53,  -26,    1,\n  -19,   34,  -82,  179, -350,  619,-1001, 1499,-2112, 2891,-4261,32373,   65, 1111,-1270, 1136, -891,  628, -401,  230, -118,   54,  -26,    1,\n  -19,   34,  -81,  177, -347,  616,-1000, 1502,-2126, 2924,-4345,32334,  202, 1055,-1241, 1121, -884,  626, -401,  231, -119,   54,  -26,    1,\n  -19,   33,  -80,  175, -345,  614, -999, 1506,-2139, 2957,-4427,32294,  340,  998,-1212, 1106, -878,  624, -400,  231, -119,   55,  -26,    1,\n  -19,   33,  -79,  173, -342,  611, -998, 1509,-2151, 2989,-4508,32251,  478,  940,-1182, 1091, -871,  622, -400,  232, -120,   55,  -26,    1,\n  -19,   32,  -78,  171, -340,  608, -996, 1512,-2163, 3020,-4588,32207,  618,  882,-1152, 1075, -864,  620, -400,  232, -121,   55,  -27,    1,\n  -18,   31,  -77,  169, -337,  606, -995, 1515,-2175, 3051,-4666,32161,  760,  824,-1122, 1060, -857,  617, -400,  233, -121,   56,  -27,    2,\n  -18,   31,  -76,  168, -334,  603, -993, 1517,-2187, 3080,-4743,32113,  902,  765,-1091, 1044, -849,  614, -399,  233, -122,   56,  -27,    2,\n  -18,   30,  -74,  166, -331,  600, -991, 1519,-2197, 3110,-4818,32063, 1045,  706,-1060, 1028, -842,  612, -399,  234, -122,   56,  -27,    2,\n  -18,   30,  -73,  164, -329,  597, -989, 1521,-2208, 3138,-4892,32011, 1190,  646,-1029, 1011, -834,  609, -399,  234, -123,   57,  -27,    2,\n  -18,   29,  -72,  162, -326,  593, -987, 1522,-2218, 3166,-4965,31958, 1335,  586, -997,  995, -826,  606, -398,  234, -123,   57,  -27,    2,\n  -17,   28,  -71,  159, -323,  590, -985, 1524,-2228, 3193,-5036,31902, 1482,  526, -965,  978, -818,  603, -397,  235, -124,   57,  -27,    2,\n  -17,   28,  -70,  157, -320,  587, -982, 1525,-2237, 3220,-5106,31845, 1630,  465, -933,  961, -810,  599, -397,  235, -124,   58,  -27,    2,\n  -17,   27,  -68,  155, -317,  583, -980, 1525,-2245, 3246,-5174,31786, 1779,  404, -901,  943, -801,  596, -396,  235, -125,   58,  -28,    2,\n  -17,   27,  -67,  153, -314,  580, -977, 1526,-2254, 3271,-5241,31725, 1929,  342, -868,  926, -793,  593, -395,  235, -125,   58,  -28,    2,\n  -17,   26,  -66,  151, -311,  576, -974, 1526,-2262, 3295,-5306,31662, 2080,  280, -835,  908, -784,  589, -394,  236, -125,   59,  -28,    2,\n  -16,   26,  -65,  149, -308,  572, -971, 1526,-2269, 3319,-5370,31597, 2232,  218, -801,  890, -775,  585, -393,  236, -126,   59,  -28,    2,\n  -16,   25,  -64,  147, -305,  568, -967, 1525,-2276, 3342,-5433,31531, 2385,  155, -768,  872, -766,  581, -392,  236, -126,   59,  -28,    2,\n  -16,   24,  -62,  145, -301,  565, -964, 1525,-2283, 3364,-5494,31463, 2539,   92, -734,  853, -757,  577, -391,  236, -126,   59,  -28,    2,\n  -16,   24,  -61,  143, -298,  561, -960, 1524,-2289, 3386,-5554,31393, 2694,   29, -700,  835, -747,  573, -389,  236, -127,   60,  -28,    2,\n  -16,   23,  -60,  140, -295,  556, -957, 1523,-2295, 3407,-5612,31321, 2850,  -35, -666,  816, -738,  569, -388,  236, -127,   60,  -28,    2,\n  -15,   23,  -59,  138, -291,  552, -953, 1521,-2300, 3427,-5669,31247, 3007,  -98, -631,  797, -728,  565, -387,  236, -127,   60,  -28,    2,\n  -15,   22,  -57,  136, -288,  548, -949, 1520,-2305, 3447,-5724,31172, 3165, -163, -596,  777, -718,  560, -385,  235, -127,   61,  -28,    2,\n  -15,   21,  -56,  134, -285,  544, -944, 1518,-2309, 3465,-5778,31094, 3324, -227, -561,  758, -708,  556, -384,  235, -128,   61,  -29,    2,\n  -15,   21,  -55,  131, -281,  539, -940, 1515,-2313, 3484,-5831,31015, 3484, -292, -526,  738, -698,  551, -382,  235, -128,   61,  -29,    2,\n  -15,   20,  -54,  129, -278,  535, -935, 1513,-2317, 3501,-5882,30935, 3645, -357, -490,  718, -687,  547, -380,  235, -128,   61,  -29,    2,\n  -14,   20,  -52,  127, -274,  530, -931, 1510,-2320, 3518,-5932,30852, 3807, -422, -454,  698, -677,  542, -379,  234, -128,   61,  -29,    2,\n  -14,   19,  -51,  125, -271,  526, -926, 1507,-2323, 3534,-5981,30768, 3970, -488, -418,  678, -666,  537, -377,  234, -128,   62,  -29,    2,\n  -14,   18,  -50,  122, -267,  521, -921, 1504,-2325, 3549,-6028,30682, 4133, -554, -382,  657, -655,  532, -375,  234, -129,   62,  -29,    2,\n  -14,   18,  -49,  120, -264,  516, -916, 1500,-2327, 3564,-6073,30594, 4298, -620, -345,  637, -644,  526, -373,  233, -129,   62,  -29,    2,\n  -14,   17,  -47,  118, -260,  511, -910, 1497,-2328, 3578,-6118,30505, 4463, -686, -309,  616, -633,  521, -371,  233, -129,   62,  -29,    2,\n  -14,   17,  -46,  115, -256,  506, -905, 1493,-2329, 3591,-6161,30414, 4630, -752, -272,  595, -621,  516, -369,  232, -129,   62,  -29,    2,\n  -13,   16,  -45,  113, -253,  501, -899, 1488,-2330, 3604,-6202,30321, 4797, -819, -235,  574, -610,  510, -367,  232, -129,   62,  -29,    2,\n  -13,   16,  -44,  111, -249,  496, -894, 1484,-2330, 3616,-6242,30227, 4964, -886, -198,  552, -598,  504, -364,  231, -129,   63,  -29,    2,\n  -13,   15,  -42,  108, -245,  491, -888, 1479,-2330, 3627,-6281,30130, 5133, -953, -160,  531, -586,  499, -362,  230, -129,   63,  -29,    2,\n  -13,   14,  -41,  106, -242,  486, -882, 1474,-2330, 3637,-6318,30033, 5303,-1020, -123,  509, -574,  493, -360,  230, -129,   63,  -29,    2,\n  -13,   14,  -40,  104, -238,  481, -876, 1469,-2328, 3647,-6354,29933, 5473,-1087,  -85,  487, -562,  487, -357,  229, -129,   63,  -29,    2,\n  -12,   13,  -38,  101, -234,  476, -870, 1463,-2327, 3656,-6389,29832, 5644,-1155,  -47,  465, -550,  481, -354,  228, -129,   63,  -29,    2,\n  -12,   13,  -37,   99, -230,  470, -863, 1457,-2325, 3665,-6422,29729, 5816,-1222,   -9,  443, -538,  474, -352,  227, -129,   63,  -29,    2,\n  -12,   12,  -36,   97, -226,  465, -857, 1451,-2323, 3672,-6454,29625, 5988,-1290,   29,  420, -525,  468, -349,  226, -128,   63,  -30,    2,\n  -12,   11,  -35,   94, -222,  459, -850, 1445,-2320, 3679,-6484,29519, 6162,-1358,   68,  398, -512,  462, -346,  225, -128,   63,  -30,    2,\n  -12,   11,  -33,   92, -218,  454, -843, 1439,-2317, 3686,-6513,29412, 6336,-1426,  106,  375, -500,  455, -343,  224, -128,   63,  -30,    2,\n  -11,   10,  -32,   90, -215,  448, -836, 1432,-2314, 3691,-6541,29302, 6510,-1494,  145,  352, -487,  448, -340,  223, -128,   63,  -30,    2,\n  -11,   10,  -31,   87, -211,  442, -829, 1425,-2310, 3696,-6567,29192, 6686,-1562,  183,  329, -474,  442, -337,  222, -128,   63,  -30,    1,\n  -11,    9,  -30,   85, -207,  437, -822, 1418,-2306, 3701,-6593,29080, 6862,-1631,  222,  306, -460,  435, -334,  221, -127,   63,  -30,    1,\n  -11,    9,  -28,   82, -203,  431, -815, 1411,-2301, 3704,-6616,28966, 7038,-1699,  261,  283, -447,  428, -331,  220, -127,   63,  -30,    1,\n  -11,    8,  -27,   80, -199,  425, -808, 1403,-2296, 3707,-6639,28850, 7216,-1767,  300,  259, -434,  421, -328,  219, -127,   63,  -30,    1,\n  -11,    7,  -26,   78, -195,  419, -800, 1395,-2291, 3710,-6660,28734, 7394,-1835,  340,  236, -420,  414, -325,  218, -127,   63,  -30,    1,\n  -10,    7,  -25,   75, -191,  413, -793, 1387,-2285, 3711,-6680,28615, 7572,-1904,  379,  212, -406,  406, -321,  216, -126,   63,  -30,    1,\n  -10,    6,  -23,   73, -186,  407, -785, 1379,-2279, 3712,-6698,28495, 7751,-1972,  418,  188, -393,  399, -318,  215, -126,   63,  -30,    1,\n  -10,    6,  -22,   70, -182,  401, -777, 1370,-2272, 3713,-6715,28374, 7931,-2041,  458,  164, -379,  392, -314,  214, -126,   63,  -30,    1,\n  -10,    5,  -21,   68, -178,  395, -769, 1362,-2265, 3712,-6731,28251, 8111,-2109,  497,  140, -365,  384, -311,  212, -125,   63,  -30,    1,\n  -10,    5,  -20,   66, -174,  389, -761, 1353,-2258, 3711,-6746,28127, 8292,-2177,  537,  116, -350,  376, -307,  211, -125,   63,  -30,    1,\n  -10,    4,  -19,   63, -170,  383, -753, 1344,-2250, 3710,-6759,28001, 8473,-2246,  576,   92, -336,  369, -303,  209, -124,   63,  -30,    1,\n   -9,    4,  -17,   61, -166,  376, -745, 1335,-2242, 3707,-6771,27874, 8655,-2314,  616,   67, -322,  361, -300,  208, -124,   63,  -30,    1,\n   -9,    3,  -16,   58, -162,  370, -736, 1325,-2234, 3704,-6781,27746, 8838,-2382,  656,   43, -307,  353, -296,  206, -123,   63,  -29,    1,\n   -9,    3,  -15,   56, -158,  364, -728, 1315,-2225, 3701,-6791,27616, 9020,-2450,  696,   19, -293,  345, -292,  205, -123,   63,  -29,    1,\n   -9,    2,  -14,   53, -154,  357, -719, 1305,-2216, 3697,-6799,27484, 9204,-2518,  735,   -6, -278,  337, -288,  203, -122,   63,  -29,    1,\n   -9,    1,  -12,   51, -149,  351, -711, 1295,-2206, 3692,-6806,27351, 9387,-2586,  775,  -31, -263,  329, -284,  201, -122,   63,  -29,    1,\n   -9,    1,  -11,   49, -145,  345, -702, 1285,-2197, 3686,-6811,27217, 9572,-2654,  815,  -56, -248,  320, -280,  200, -121,   62,  -29,    1,\n   -8,    0,  -10,   46, -141,  338, -693, 1274,-2186, 3680,-6816,27082, 9756,-2722,  855,  -81, -233,  312, -276,  198, -120,   62,  -29,    1,\n   -8,    0,   -9,   44, -137,  332, -684, 1264,-2176, 3673,-6819,26945, 9941,-2790,  895, -105, -218,  303, -271,  196, -120,   62,  -29,    1,\n   -8,   -1,   -8,   42, -133,  325, -675, 1253,-2165, 3666,-6821,26807,10126,-2857,  935, -130, -203,  295, -267,  194, -119,   62,  -29,    1,\n   -8,   -1,   -7,   39, -128,  319, -666, 1242,-2154, 3658,-6822,26668,10312,-2925,  974, -156, -188,  286, -263,  192, -118,   62,  -29,    1,\n   -8,   -2,   -5,   37, -124,  312, -657, 1231,-2142, 3649,-6821,26527,10498,-2992, 1014, -181, -172,  277, -258,  190, -118,   61,  -29,    1,\n   -8,   -2,   -4,   34, -120,  305, -648, 1219,-2130, 3640,-6819,26385,10685,-3059, 1054, -206, -157,  269, -254,  188, -117,   61,  -29,    1,\n   -7,   -3,   -3,   32, -116,  299, -638, 1208,-2118, 3630,-6816,26242,10871,-3126, 1094, -231, -141,  260, -249,  186, -116,   61,  -29,    1,\n   -7,   -3,   -2,   30, -112,  292, -629, 1196,-2105, 3620,-6812,26097,11058,-3192, 1134, -256, -126,  251, -244,  184, -115,   61,  -29,    1,\n   -7,   -4,   -1,   27, -107,  285, -619, 1184,-2092, 3609,-6807,25951,11245,-3259, 1173, -282, -110,  242, -240,  182, -114,   61,  -29,    1,\n   -7,   -4,    0,   25, -103,  279, -610, 1172,-2079, 3597,-6801,25804,11433,-3325, 1213, -307,  -94,  233, -235,  180, -114,   60,  -29,    1,\n   -7,   -5,    2,   23,  -99,  272, -600, 1160,-2065, 3585,-6793,25656,11621,-3391, 1253, -333,  -78,  223, -230,  177, -113,   60,  -28,    1,\n   -7,   -5,    3,   20,  -95,  265, -591, 1147,-2051, 3572,-6784,25507,11809,-3456, 1292, -358,  -62,  214, -225,  175, -112,   60,  -28,    1,\n   -6,   -6,    4,   18,  -91,  258, -581, 1135,-2037, 3558,-6774,25356,11997,-3522, 1332, -384,  -47,  205, -220,  173, -111,   59,  -28,    1,\n   -6,   -6,    5,   16,  -86,  252, -571, 1122,-2023, 3544,-6763,25205,12185,-3587, 1371, -409,  -30,  195, -215,  170, -110,   59,  -28,    1,\n   -6,   -7,    6,   13,  -82,  245, -561, 1109,-2008, 3530,-6751,25052,12374,-3652, 1410, -435,  -14,  186, -210,  168, -109,   59,  -28,    1,\n   -6,   -7,    7,   11,  -78,  238, -551, 1096,-1993, 3515,-6738,24898,12562,-3716, 1449, -460,    2,  176, -205,  166, -108,   58,  -28,    1,\n   -6,   -7,    8,    9,  -74,  231, -541, 1083,-1977, 3499,-6723,24743,12751,-3781, 1488, -486,   18,  167, -200,  163, -107,   58,  -28,    1,\n   -6,   -8,    9,    7,  -70,  224, -531, 1069,-1962, 3483,-6708,24587,12940,-3844, 1527, -511,   34,  157, -195,  161, -106,   58,  -28,    0,\n   -6,   -8,   10,    4,  -65,  217, -521, 1056,-1946, 3466,-6691,24430,13129,-3908, 1566, -537,   51,  147, -189,  158, -105,   57,  -27,    0,\n   -5,   -9,   11,    2,  -61,  210, -510, 1042,-1929, 3449,-6673,24272,13318,-3971, 1605, -562,   67,  138, -184,  155, -104,   57,  -27,    0,\n   -5,   -9,   12,    0,  -57,  203, -500, 1029,-1913, 3431,-6654,24112,13507,-4034, 1644, -588,   83,  128, -179,  153, -103,   57,  -27,    0,\n   -5,  -10,   14,   -2,  -53,  197, -490, 1015,-1896, 3413,-6635,23952,13696,-4097, 1682, -613,  100,  118, -173,  150, -102,   56,  -27,    0,\n   -5,  -10,   15,   -5,  -49,  190, -480, 1001,-1879, 3394,-6614,23791,13885,-4159, 1720, -639,  116,  108, -168,  147, -100,   56,  -27,    0,\n   -5,  -11,   16,   -7,  -45,  183, -469,  986,-1861, 3374,-6592,23628,14075,-4220, 1759, -664,  133,   98, -162,  145,  -99,   55,  -27,    0,\n   -5,  -11,   17,   -9,  -40,  176, -459,  972,-1844, 3354,-6569,23465,14264,-4282, 1797, -690,  150,   88, -156,  142,  -98,   55,  -27,    0,\n   -5,  -11,   18,  -11,  -36,  169, -448,  958,-1826, 3334,-6545,23301,14453,-4342, 1834, -715,  166,   77, -151,  139,  -97,   54,  -26,    0,\n   -5,  -12,   19,  -13,  -32,  162, -438,  943,-1807, 3313,-6520,23136,14642,-4403, 1872, -741,  183,   67, -145,  136,  -96,   54,  -26,    0,\n   -4,  -12,   20,  -15,  -28,  155, -427,  929,-1789, 3291,-6494,22970,14831,-4463, 1909, -766,  199,   57, -139,  133,  -94,   53,  -26,    0,\n   -4,  -13,   21,  -18,  -24,  148, -416,  914,-1770, 3269,-6467,22803,15020,-4522, 1947, -791,  216,   47, -134,  130,  -93,   53,  -26,    0,\n   -4,  -13,   22,  -20,  -20,  141, -406,  899,-1751, 3247,-6439,22635,15209,-4581, 1984, -817,  233,   36, -128,  127,  -92,   52,  -26,    0,\n   -4,  -14,   23,  -22,  -16,  134, -395,  884,-1732, 3224,-6410,22466,15398,-4640, 2021, -842,  250,   26, -122,  124,  -90,   52,  -25,    0,\n   -4,  -14,   24,  -24,  -12,  127, -384,  869,-1713, 3201,-6380,22297,15586,-4698, 2057, -867,  266,   16, -116,  121,  -89,   51,  -25,    0,\n   -4,  -14,   24,  -26,   -8,  120, -374,  854,-1693, 3177,-6349,22126,15775,-4755, 2094, -892,  283,    5, -110,  118,  -88,   51,  -25,    0,\n   -4,  -15,   25,  -28,   -4,  113, -363,  839,-1673, 3152,-6317,21955,15963,-4812, 2130, -917,  300,   -5, -104,  115,  -86,   50,  -25,   -1,\n   -4,  -15,   26,  -30,    0,  106, -352,  823,-1653, 3127,-6284,21783,16151,-4869, 2166, -942,  317,  -16,  -98,  112,  -85,   50,  -25,   -1,\n   -3,  -15,   27,  -32,    4,  100, -341,  808,-1633, 3102,-6250,21610,16339,-4925, 2202, -967,  333,  -27,  -92,  109,  -83,   49,  -24,   -1,\n   -3,  -16,   28,  -34,    8,   93, -330,  792,-1612, 3076,-6216,21436,16527,-4980, 2237, -992,  350,  -37,  -85,  106,  -82,   49,  -24,   -1,\n   -3,  -16,   29,  -36,   12,   86, -320,  777,-1591, 3050,-6180,21262,16714,-5035, 2273,-1016,  367,  -48,  -79,  102,  -80,   48,  -24,   -1,\n   -3,  -17,   30,  -38,   16,   79, -309,  761,-1570, 3024,-6144,21087,16901,-5089, 2308,-1041,  384,  -59,  -73,   99,  -79,   47,  -24,   -1,\n   -3,  -17,   31,  -40,   20,   72, -298,  745,-1549, 2997,-6107,20911,17088,-5143, 2342,-1065,  401,  -69,  -67,   96,  -77,   47,  -23,   -1,\n   -3,  -17,   32,  -42,   24,   65, -287,  729,-1528, 2969,-6069,20735,17274,-5195, 2377,-1090,  417,  -80,  -60,   93,  -76,   46,  -23,   -1,\n   -3,  -18,   33,  -44,   28,   58, -276,  713,-1506, 2941,-6030,20558,17461,-5248, 2411,-1114,  434,  -91,  -54,   89,  -74,   45,  -23,   -1,\n   -3,  -18,   33,  -46,   31,   52, -265,  697,-1484, 2913,-5990,20380,17646,-5299, 2445,-1138,  451, -102,  -48,   86,  -73,   45,  -23,   -1,\n   -3,  -18,   34,  -48,   35,   45, -254,  681,-1462, 2884,-5949,20201,17832,-5350, 2478,-1162,  467, -112,  -41,   82,  -71,   44,  -22,   -1,\n   -2,  -19,   35,  -50,   39,   38, -243,  665,-1440, 2855,-5908,20022,18017,-5401, 2512,-1186,  484, -123,  -35,   79,  -69,   43,  -22,   -1,\n   -2,  -19,   36,  -52,   43,   31, -232,  649,-1418, 2826,-5865,19843,18202,-5451, 2545,-1210,  501, -134,  -28,   75,  -68,   43,  -22,   -1,\n   -2,  -19,   37,  -54,   46,   25, -221,  633,-1396, 2796,-5822,19662,18386,-5500, 2577,-1234,  517, -145,  -22,   72,  -66,   42,  -21,   -2,\n   -2,  -20,   37,  -55,   50,   18, -210,  616,-1373, 2766,-5778,19482,18570,-5548, 2610,-1257,  534, -156,  -15,   68,  -64,   41,  -21,   -2,\n   -2,  -20,   38,  -57,   54,   11, -199,  600,-1350, 2735,-5734,19300,18753,-5595, 2641,-1281,  550, -167,   -9,   65,  -62,   41,  -21,   -2,\n   -2,  -20,   39,  -59,   58,    5, -189,  583,-1327, 2704,-5688,19118,18936,-5642, 2673,-1304,  567, -178,   -2,   61,  -61,   40,  -21,   -2,\n   -2,  -21,   40,  -61,   61,   -2, -178,  567,-1304, 2673,-5642,18936,19118,-5688, 2704,-1327,  583, -189,    5,   58,  -59,   39,  -20,   -2,\n   -2,  -21,   41,  -62,   65,   -9, -167,  550,-1281, 2641,-5595,18753,19300,-5734, 2735,-1350,  600, -199,   11,   54,  -57,   38,  -20,   -2,\n   -2,  -21,   41,  -64,   68,  -15, -156,  534,-1257, 2610,-5548,18570,19482,-5778, 2766,-1373,  616, -210,   18,   50,  -55,   37,  -20,   -2,\n   -2,  -21,   42,  -66,   72,  -22, -145,  517,-1234, 2577,-5500,18386,19662,-5822, 2796,-1396,  633, -221,   25,   46,  -54,   37,  -19,   -2,\n   -1,  -22,   43,  -68,   75,  -28, -134,  501,-1210, 2545,-5451,18202,19843,-5865, 2826,-1418,  649, -232,   31,   43,  -52,   36,  -19,   -2,\n   -1,  -22,   43,  -69,   79,  -35, -123,  484,-1186, 2512,-5401,18017,20022,-5908, 2855,-1440,  665, -243,   38,   39,  -50,   35,  -19,   -2,\n   -1,  -22,   44,  -71,   82,  -41, -112,  467,-1162, 2478,-5350,17832,20201,-5949, 2884,-1462,  681, -254,   45,   35,  -48,   34,  -18,   -3,\n   -1,  -23,   45,  -73,   86,  -48, -102,  451,-1138, 2445,-5299,17646,20380,-5990, 2913,-1484,  697, -265,   52,   31,  -46,   33,  -18,   -3,\n   -1,  -23,   45,  -74,   89,  -54,  -91,  434,-1114, 2411,-5248,17461,20558,-6030, 2941,-1506,  713, -276,   58,   28,  -44,   33,  -18,   -3,\n   -1,  -23,   46,  -76,   93,  -60,  -80,  417,-1090, 2377,-5195,17274,20735,-6069, 2969,-1528,  729, -287,   65,   24,  -42,   32,  -17,   -3,\n   -1,  -23,   47,  -77,   96,  -67,  -69,  401,-1065, 2342,-5143,17088,20911,-6107, 2997,-1549,  745, -298,   72,   20,  -40,   31,  -17,   -3,\n   -1,  -24,   47,  -79,   99,  -73,  -59,  384,-1041, 2308,-5089,16901,21087,-6144, 3024,-1570,  761, -309,   79,   16,  -38,   30,  -17,   -3,\n   -1,  -24,   48,  -80,  102,  -79,  -48,  367,-1016, 2273,-5035,16714,21262,-6180, 3050,-1591,  777, -320,   86,   12,  -36,   29,  -16,   -3,\n   -1,  -24,   49,  -82,  106,  -85,  -37,  350, -992, 2237,-4980,16527,21436,-6216, 3076,-1612,  792, -330,   93,    8,  -34,   28,  -16,   -3,\n   -1,  -24,   49,  -83,  109,  -92,  -27,  333, -967, 2202,-4925,16339,21610,-6250, 3102,-1633,  808, -341,  100,    4,  -32,   27,  -15,   -3,\n   -1,  -25,   50,  -85,  112,  -98,  -16,  317, -942, 2166,-4869,16151,21783,-6284, 3127,-1653,  823, -352,  106,    0,  -30,   26,  -15,   -4,\n   -1,  -25,   50,  -86,  115, -104,   -5,  300, -917, 2130,-4812,15963,21955,-6317, 3152,-1673,  839, -363,  113,   -4,  -28,   25,  -15,   -4,\n    0,  -25,   51,  -88,  118, -110,    5,  283, -892, 2094,-4755,15775,22126,-6349, 3177,-1693,  854, -374,  120,   -8,  -26,   24,  -14,   -4,\n    0,  -25,   51,  -89,  121, -116,   16,  266, -867, 2057,-4698,15586,22297,-6380, 3201,-1713,  869, -384,  127,  -12,  -24,   24,  -14,   -4,\n    0,  -25,   52,  -90,  124, -122,   26,  250, -842, 2021,-4640,15398,22466,-6410, 3224,-1732,  884, -395,  134,  -16,  -22,   23,  -14,   -4,\n    0,  -26,   52,  -92,  127, -128,   36,  233, -817, 1984,-4581,15209,22635,-6439, 3247,-1751,  899, -406,  141,  -20,  -20,   22,  -13,   -4,\n    0,  -26,   53,  -93,  130, -134,   47,  216, -791, 1947,-4522,15020,22803,-6467, 3269,-1770,  914, -416,  148,  -24,  -18,   21,  -13,   -4,\n    0,  -26,   53,  -94,  133, -139,   57,  199, -766, 1909,-4463,14831,22970,-6494, 3291,-1789,  929, -427,  155,  -28,  -15,   20,  -12,   -4,\n    0,  -26,   54,  -96,  136, -145,   67,  183, -741, 1872,-4403,14642,23136,-6520, 3313,-1807,  943, -438,  162,  -32,  -13,   19,  -12,   -5,\n    0,  -26,   54,  -97,  139, -151,   77,  166, -715, 1834,-4342,14453,23301,-6545, 3334,-1826,  958, -448,  169,  -36,  -11,   18,  -11,   -5,\n    0,  -27,   55,  -98,  142, -156,   88,  150, -690, 1797,-4282,14264,23465,-6569, 3354,-1844,  972, -459,  176,  -40,   -9,   17,  -11,   -5,\n    0,  -27,   55,  -99,  145, -162,   98,  133, -664, 1759,-4220,14075,23628,-6592, 3374,-1861,  986, -469,  183,  -45,   -7,   16,  -11,   -5,\n    0,  -27,   56, -100,  147, -168,  108,  116, -639, 1720,-4159,13885,23791,-6614, 3394,-1879, 1001, -480,  190,  -49,   -5,   15,  -10,   -5,\n    0,  -27,   56, -102,  150, -173,  118,  100, -613, 1682,-4097,13696,23952,-6635, 3413,-1896, 1015, -490,  197,  -53,   -2,   14,  -10,   -5,\n    0,  -27,   57, -103,  153, -179,  128,   83, -588, 1644,-4034,13507,24112,-6654, 3431,-1913, 1029, -500,  203,  -57,    0,   12,   -9,   -5,\n    0,  -27,   57, -104,  155, -184,  138,   67, -562, 1605,-3971,13318,24272,-6673, 3449,-1929, 1042, -510,  210,  -61,    2,   11,   -9,   -5,\n    0,  -27,   57, -105,  158, -189,  147,   51, -537, 1566,-3908,13129,24430,-6691, 3466,-1946, 1056, -521,  217,  -65,    4,   10,   -8,   -6,\n    0,  -28,   58, -106,  161, -195,  157,   34, -511, 1527,-3844,12940,24587,-6708, 3483,-1962, 1069, -531,  224,  -70,    7,    9,   -8,   -6,\n    1,  -28,   58, -107,  163, -200,  167,   18, -486, 1488,-3781,12751,24743,-6723, 3499,-1977, 1083, -541,  231,  -74,    9,    8,   -7,   -6,\n    1,  -28,   58, -108,  166, -205,  176,    2, -460, 1449,-3716,12562,24898,-6738, 3515,-1993, 1096, -551,  238,  -78,   11,    7,   -7,   -6,\n    1,  -28,   59, -109,  168, -210,  186,  -14, -435, 1410,-3652,12374,25052,-6751, 3530,-2008, 1109, -561,  245,  -82,   13,    6,   -7,   -6,\n    1,  -28,   59, -110,  170, -215,  195,  -30, -409, 1371,-3587,12185,25205,-6763, 3544,-2023, 1122, -571,  252,  -86,   16,    5,   -6,   -6,\n    1,  -28,   59, -111,  173, -220,  205,  -47, -384, 1332,-3522,11997,25356,-6774, 3558,-2037, 1135, -581,  258,  -91,   18,    4,   -6,   -6,\n    1,  -28,   60, -112,  175, -225,  214,  -62, -358, 1292,-3456,11809,25507,-6784, 3572,-2051, 1147, -591,  265,  -95,   20,    3,   -5,   -7,\n    1,  -28,   60, -113,  177, -230,  223,  -78, -333, 1253,-3391,11621,25656,-6793, 3585,-2065, 1160, -600,  272,  -99,   23,    2,   -5,   -7,\n    1,  -29,   60, -114,  180, -235,  233,  -94, -307, 1213,-3325,11433,25804,-6801, 3597,-2079, 1172, -610,  279, -103,   25,    0,   -4,   -7,\n    1,  -29,   61, -114,  182, -240,  242, -110, -282, 1173,-3259,11245,25951,-6807, 3609,-2092, 1184, -619,  285, -107,   27,   -1,   -4,   -7,\n    1,  -29,   61, -115,  184, -244,  251, -126, -256, 1134,-3192,11058,26097,-6812, 3620,-2105, 1196, -629,  292, -112,   30,   -2,   -3,   -7,\n    1,  -29,   61, -116,  186, -249,  260, -141, -231, 1094,-3126,10871,26242,-6816, 3630,-2118, 1208, -638,  299, -116,   32,   -3,   -3,   -7,\n    1,  -29,   61, -117,  188, -254,  269, -157, -206, 1054,-3059,10685,26385,-6819, 3640,-2130, 1219, -648,  305, -120,   34,   -4,   -2,   -8,\n    1,  -29,   61, -118,  190, -258,  277, -172, -181, 1014,-2992,10498,26527,-6821, 3649,-2142, 1231, -657,  312, -124,   37,   -5,   -2,   -8,\n    1,  -29,   62, -118,  192, -263,  286, -188, -156,  974,-2925,10312,26668,-6822, 3658,-2154, 1242, -666,  319, -128,   39,   -7,   -1,   -8,\n    1,  -29,   62, -119,  194, -267,  295, -203, -130,  935,-2857,10126,26807,-6821, 3666,-2165, 1253, -675,  325, -133,   42,   -8,   -1,   -8,\n    1,  -29,   62, -120,  196, -271,  303, -218, -105,  895,-2790, 9941,26945,-6819, 3673,-2176, 1264, -684,  332, -137,   44,   -9,    0,   -8,\n    1,  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   4,   -9,\n    1,  -30,   63, -124,  209, -303,  369, -336,   92,  576,-2246, 8473,28001,-6759, 3710,-2250, 1344, -753,  383, -170,   63,  -19,    4,  -10,\n    1,  -30,   63, -125,  211, -307,  376, -350,  116,  537,-2177, 8292,28127,-6746, 3711,-2258, 1353, -761,  389, -174,   66,  -20,    5,  -10,\n    1,  -30,   63, -125,  212, -311,  384, -365,  140,  497,-2109, 8111,28251,-6731, 3712,-2265, 1362, -769,  395, -178,   68,  -21,    5,  -10,\n    1,  -30,   63, -126,  214, -314,  392, -379,  164,  458,-2041, 7931,28374,-6715, 3713,-2272, 1370, -777,  401, -182,   70,  -22,    6,  -10,\n    1,  -30,   63, -126,  215, -318,  399, -393,  188,  418,-1972, 7751,28495,-6698, 3712,-2279, 1379, -785,  407, -186,   73,  -23,    6,  -10,\n    1,  -30,   63, -126,  216, -321,  406, -406,  212,  379,-1904, 7572,28615,-6680, 3711,-2285, 1387, -793,  413, -191,   75,  -25,    7,  -10,\n    1,  -30,   63, -127,  218, -325,  414, -420,  236,  340,-1835, 7394,28734,-6660, 3710,-2291, 1395, -800,  419, -195,   78,  -26,    7,  -11,\n    1,  -30,   63, -127,  219, -328,  421, -434,  259,  300,-1767, 7216,28850,-6639, 3707,-2296, 1403, -808,  425, -199,   80,  -27,    8,  -11,\n    1,  -30,   63, -127,  220, -331,  428, -447,  283,  261,-1699, 7038,28966,-6616, 3704,-2301, 1411, -815,  431, -203,   82,  -28,    9,  -11,\n    1,  -30,   63, -127,  221, -334,  435, -460,  306,  222,-1631, 6862,29080,-6593, 3701,-2306, 1418, -822,  437, -207,   85,  -30,    9,  -11,\n    1,  -30,   63, -128,  222, -337,  442, -474,  329,  183,-1562, 6686,29192,-6567, 3696,-2310, 1425, -829,  442, -211,   87,  -31,   10,  -11,\n    2,  -30,   63, -128,  223, -340,  448, -487,  352,  145,-1494, 6510,29302,-6541, 3691,-2314, 1432, -836,  448, -215,   90,  -32,   10,  -11,\n    2,  -30,   63, -128,  224, -343,  455, -500,  375,  106,-1426, 6336,29412,-6513, 3686,-2317, 1439, -843,  454, -218,   92,  -33,   11,  -12,\n    2,  -30,   63, -128,  225, -346,  462, -512,  398,   68,-1358, 6162,29519,-6484, 3679,-2320, 1445, -850,  459, -222,   94,  -35,   11,  -12,\n    2,  -30,   63, -128,  226, -349,  468, -525,  420,   29,-1290, 5988,29625,-6454, 3672,-2323, 1451, -857,  465, -226,   97,  -36,   12,  -12,\n    2,  -29,   63, -129,  227, -352,  474, -538,  443,   -9,-1222, 5816,29729,-6422, 3665,-2325, 1457, -863,  470, -230,   99,  -37,   13,  -12,\n    2,  -29,   63, -129,  228, -354,  481, -550,  465,  -47,-1155, 5644,29832,-6389, 3656,-2327, 1463, -870,  476, -234,  101,  -38,   13,  -12,\n    2,  -29,   63, -129,  229, -357,  487, -562,  487,  -85,-1087, 5473,29933,-6354, 3647,-2328, 1469, -876,  481, -238,  104,  -40,   14,  -13,\n    2,  -29,   63, -129,  230, -360,  493, -574,  509, -123,-1020, 5303,30033,-6318, 3637,-2330, 1474, -882,  486, -242,  106,  -41,   14,  -13,\n    2,  -29,   63, -129,  230, -362,  499, -586,  531, -160, -953, 5133,30130,-6281, 3627,-2330, 1479, -888,  491, -245,  108,  -42,   15,  -13,\n    2,  -29,   63, -129,  231, -364,  504, -598,  552, -198, -886, 4964,30227,-6242, 3616,-2330, 1484, -894,  496, -249,  111,  -44,   16,  -13,\n    2,  -29,   62, -129,  232, -367,  510, -610,  574, -235, -819, 4797,30321,-6202, 3604,-2330, 1488, -899,  501, -253,  113,  -45,   16,  -13,\n    2,  -29,   62, -129,  232, -369,  516, -621,  595, -272, -752, 4630,30414,-6161, 3591,-2329, 1493, -905,  506, -256,  115,  -46,   17,  -14,\n    2,  -29,   62, -129,  233, -371,  521, -633,  616, -309, -686, 4463,30505,-6118, 3578,-2328, 1497, -910,  511, -260,  118,  -47,   17,  -14,\n    2,  -29,   62, -129,  233, -373,  526, -644,  637, -345, -620, 4298,30594,-6073, 3564,-2327, 1500, -916,  516, -264,  120,  -49,   18,  -14,\n    2,  -29,   62, -129,  234, -375,  532, -655,  657, -382, -554, 4133,30682,-6028, 3549,-2325, 1504, -921,  521, -267,  122,  -50,   18,  -14,\n    2,  -29,   62, -128,  234, -377,  537, -666,  678, -418, -488, 3970,30768,-5981, 3534,-2323, 1507, -926,  526, -271,  125,  -51,   19,  -14,\n    2,  -29,   61, -128,  234, -379,  542, -677,  698, -454, -422, 3807,30852,-5932, 3518,-2320, 1510, -931,  530, -274,  127,  -52,   20,  -14,\n    2,  -29,   61, -128,  235, -380,  547, -687,  718, -490, -357, 3645,30935,-5882, 3501,-2317, 1513, -935,  535, -278,  129,  -54,   20,  -15,\n    2,  -29,   61, -128,  235, -382,  551, -698,  738, -526, -292, 3484,31015,-5831, 3484,-2313, 1515, -940,  539, -281,  131,  -55,   21,  -15,\n    2,  -29,   61, -128,  235, -384,  556, -708,  758, -561, -227, 3324,31094,-5778, 3465,-2309, 1518, -944,  544, -285,  134,  -56,   21,  -15,\n    2,  -28,   61, -127,  235, -385,  560, -718,  777, -596, -163, 3165,31172,-5724, 3447,-2305, 1520, -949,  548, -288,  136,  -57,   22,  -15,\n    2,  -28,   60, -127,  236, -387,  565, -728,  797, -631,  -98, 3007,31247,-5669, 3427,-2300, 1521, -953,  552, -291,  138,  -59,   23,  -15,\n    2,  -28,   60, -127,  236, -388,  569, -738,  816, -666,  -35, 2850,31321,-5612, 3407,-2295, 1523, -957,  556, -295,  140,  -60,   23,  -16,\n    2,  -28,   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-17,\n    2,  -27,   58, -124,  235, -397,  599, -810,  961, -933,  465, 1630,31845,-5106, 3220,-2237, 1525, -982,  587, -320,  157,  -70,   28,  -17,\n    2,  -27,   57, -124,  235, -397,  603, -818,  978, -965,  526, 1482,31902,-5036, 3193,-2228, 1524, -985,  590, -323,  159,  -71,   28,  -17,\n    2,  -27,   57, -123,  234, -398,  606, -826,  995, -997,  586, 1335,31958,-4965, 3166,-2218, 1522, -987,  593, -326,  162,  -72,   29,  -18,\n    2,  -27,   57, -123,  234, -399,  609, -834, 1011,-1029,  646, 1190,32011,-4892, 3138,-2208, 1521, -989,  597, -329,  164,  -73,   30,  -18,\n    2,  -27,   56, -122,  234, -399,  612, -842, 1028,-1060,  706, 1045,32063,-4818, 3110,-2197, 1519, -991,  600, -331,  166,  -74,   30,  -18,\n    2,  -27,   56, -122,  233, -399,  614, -849, 1044,-1091,  765,  902,32113,-4743, 3080,-2187, 1517, -993,  603, -334,  168,  -76,   31,  -18,\n    2,  -27,   56, -121,  233, -400,  617, -857, 1060,-1122,  824,  760,32161,-4666, 3051,-2175, 1515, -995,  606, -337,  169,  -77,   31,  -18,\n    1,  -27,   55, -121,  232, -400,  620, -864, 1075,-1152,  882,  618,32207,-4588, 3020,-2163, 1512, -996,  608, -340,  171,  -78,   32,  -19,\n    1,  -26,   55, -120,  232, -400,  622, -871, 1091,-1182,  940,  478,32251,-4508, 2989,-2151, 1509, -998,  611, -342,  173,  -79,   33,  -19,\n    1,  -26,   55, -119,  231, -400,  624, -878, 1106,-1212,  998,  340,32294,-4427, 2957,-2139, 1506, -999,  614, -345,  175,  -80,   33,  -19,\n    1,  -26,   54, -119,  231, -401,  626, -884, 1121,-1241, 1055,  202,32334,-4345, 2924,-2126, 1502,-1000,  616, -347,  177,  -81,   34,  -19,\n    1,  -26,   54, -118,  230, -401,  628, -891, 1136,-1270, 1111,   65,32373,-4261, 2891,-2112, 1499,-1001,  619, -350,  179,  -82,   34,  -19,\n    1,  -26,   53, -117,  229, -401,  630, -897, 1150,-1299, 1167,  -70,32409,-4176, 2857,-2098, 1494,-1001,  621, -352,  181,  -84,   35,  -19,\n    1,  -26,   53, -117,  229, -400,  632, -903, 1164,-1328, 1223, -204,32444,-4089, 2822,-2084, 1490,-1002,  623, -355,  183,  -85,   35,  -20,\n    1,  -26,   53, -116,  228, -400,  634, -909, 1178,-1356, 1278, -337,32477,-4001, 2787,-2069, 1486,-1002,  625, -357,  184,  -86,   36,  -20,\n    1,  -25,   52, -115,  227, -400,  635, -915, 1192,-1383, 1333, -469,32508,-3912, 2751,-2054, 1481,-1002,  627, -359,  186,  -87,   37,  -20,\n    1,  -25,   52, -115,  226, -400,  637, -920, 1205,-1411, 1387, -599,32537,-3821, 2714,-2039, 1476,-1002,  629, -361,  188,  -88,   37,  -20,\n    1,  -25,   51, -114,  225, -399,  638, -926, 1218,-1438, 1441, -729,32564,-3729, 2677,-2023, 1470,-1002,  631, -364,  190,  -89,   38,  -20,\n    1,  -25,   51, -113,  224, -399,  639, -931, 1231,-1464, 1494, -857,32589,-3635, 2639,-2006, 1464,-1001,  633, -366,  191,  -90,   38,  -21,\n    1,  -25,   50, -112,  223, -398,  641, -936, 1244,-1491, 1546, -983,32613,-3540, 2601,-1989, 1458,-1001,  634, -368,  193,  -91,   39,  -21,\n    1,  -25,   50, -112,  222, -397,  642, -941, 1256,-1517, 1598,-1109,32634,-3444, 2562,-1972, 1452,-1000,  636, -370,  195,  -92,   39,  -21,\n    1,  -25,   49, -111,  221, -397,  642, -945, 1268,-1542, 1650,-1233,32653,-3346, 2522,-1954, 1446, -999,  637, -372,  196,  -93,   40,  -21,\n    1,  -24,   49, -110,  220, -396,  643, -950, 1280,-1567, 1701,-1356,32671,-3247, 2481,-1936, 1439, -998,  638, -373,  198,  -94,   40,  -21,\n    1,  -24,   49, -109,  219, -395,  644, -954, 1291,-1592, 1752,-1478,32686,-3147, 2440,-1918, 1432, -996,  640, -375,  199,  -95,   41,  -22,\n    1,  -24,   48, -108,  218, -394,  644, -958, 1303,-1617, 1802,-1598,32700,-3045, 2398,-1899, 1424, -995,  641, -377,  201,  -96,   41,  -22,\n    1,  -24,   48, -108,  217, -393,  645, -962, 1314,-1641, 1851,-1717,32711,-2941, 2356,-1880, 1416, -993,  642, -379,  202,  -97,   42,  -22,\n    1,  -24,   47, -107,  216, -392,  645, -966, 1324,-1664, 1900,-1835,32721,-2837, 2313,-1860, 1408, -991,  643, -380,  204,  -98,   43,  -22,\n    1,  -24,   47, -106,  215, -391,  645, -969, 1335,-1688, 1948,-1952,32729,-2731, 2270,-1840, 1400, -989,  643, -382,  205,  -99,   43,  -22,\n    1,  -23,   46, -105,  213, -390,  645, -973, 1345,-1711, 1996,-2067,32735,-2624, 2225,-1819, 1392, -987,  644, -384,  207, -100,   44,  -22,\n    1,  -23,   46, -104,  212, -389,  645, -976, 1355,-1733, 2043,-2181,32739,-2515, 2181,-1798, 1383, -984,  644, -385,  208, -101,   44,  -23,\n   39,  -23,   45, -103,  211, -388,  645, -979, 1365,-1755, 2089,-2294,32741,-2405, 2135,-1777, 1374, -982,  645, -386,  210, -102,   45,  -23,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_any_up512_32_filter.txt",
    "content": "//single phase coef Number:=32,    upsample factor:=512,\n   38,   -4,   -3,   15,  -33,   58,  -88,  125, -165,  208, -251,  291, -328,  359, -391,30674, -332,  331, -310,  279, -242,  202, -161,  121,  -86,   56,  -32,   14,   -3,   -4,   38,  -43,\n   37,   -3,   -4,   16,  -34,   59,  -91,  128, -169,  214, -259,  303, -345,  387, -449,30673, -273,  303, -293,  267, -233,  195, -156,  118,  -84,   55,  -31,   14,   -2,   -4,   38,    1,\n   37,   -3,   -4,   16,  -35,   61,  -93,  131, -174,  220, -268,  315, -363,  415, -507,30673, -215,  274, -275,  255, -225,  189, -152,  115,  -82,   53,  -30,   13,   -2,   -5,   38,    1,\n   37,   -3,   -4,   17,  -36,   62,  -95,  134, -178,  226, -276,  327, -380,  443, -564,30671, -155,  246, -257,  243, -216,  183, -147,  112,  -79,   52,  -29,   12,   -1,   -5,   38,    1,\n   37,   -2,   -5,   18,  -37,   64,  -97,  137, -183,  232, -285,  339, -398,  471, -622,30670,  -96,  218, -240,  231, -208,  177, -143,  109,  -77,   50,  -28,   12,   -1,   -5,   38,    1,\n   37,   -2,   -5,   19,  -38,   66, -100,  140, -187,  238, -293,  351, -415,  498, -679,30668,  -36,  189, -222,  219, -199,  170, -138,  105,  -75,   48,  -27,   11,    0,   -5,   38,    1,\n   37,   -2,   -6,   19,  -40,   67, -102,  144, -191,  244, -302,  363, -432,  526, -736,30665,   24,  161, -204,  207, -190,  164, -133,  102,  -73,   47,  -26,   10,    0,   -6,   38,    1,\n   37,   -2,   -6,   20,  -41,   69, -104,  147, -196,  250, -310,  375, -450,  554, -793,30663,   84,  132, -186,  194, -182,  158, -129,   99,  -70,   45,  -25,    9,    1,   -6,   39,    1,\n   37,   -1,   -7,   21,  -42,   70, -106,  150, -200,  257, -318,  387, -467,  581, -849,30660,  144,  103, -168,  182, -173,  152, -124,   96,  -68,   44,  -24,    9,    1,   -6,   39,    1,\n   37,   -1,   -7,   21,  -43,   72, -108,  153, -205,  263, -327,  398, -484,  609, -905,30656,  205,   75, -150,  170, -164,  145, -120,   92,  -66,   42,  -23,    8,    1,   -7,   39,    1,\n   36,   -1,   -7,   22,  -44,   73, -111,  156, -209,  269, -335,  410, -501,  636, -961,30652,  266,   46, -132,  158, -155,  139, -115,   89,  -63,   40,  -21,    7,    2,   -7,   39,    1,\n   36,    0,   -8,   23,  -45,   75, -113,  159, -213,  275, -343,  422, -518,  663,-1017,30648,  327,   17, -114,  145, -147,  133, -111,   86,  -61,   39,  -20,    7,    2,   -7,   39,    1,\n   36,    0,   -8,   23,  -46,   76, -115,  162, -218,  281, -352,  433, -535,  690,-1072,30643,  388,  -12,  -96,  133, -138,  126, -106,   82,  -59,   37,  -19,    6,    3,   -8,   39,    1,\n   36,    0,   -9,   24,  -47,   78, -117,  165, -222,  286, -360,  445, -552,  717,-1127,30638,  450,  -41,  -78,  121, -129,  120, -102,   79,  -56,   36,  -18,    5,    3,   -8,   39,    1,\n   36,    1,   -9,   25,  -48,   79, -119,  168, -226,  292, -368,  457, -569,  744,-1182,30632,  512,  -70,  -60,  108, -120,  113,  -97,   76,  -54,   34,  -17,    4,    4,   -8,   39,    1,\n   36,    1,  -10,   25,  -49,   81, -121,  171, -230,  298, -376,  468, -586,  771,-1237,30626,  574,  -99,  -42,   96, -111,  107,  -92,   73,  -52,   32,  -16,    4,    4,   -8,   39,    1,\n   36,    1,  -10,   26,  -50,   82, -124,  174, -235,  304, -385,  480, -603,  798,-1291,30620,  636, -128,  -24,   83, -102,  101,  -88,   69,  -49,   31,  -15,    3,    5,   -9,   40,    1,\n   36,    1,  -11,   27,  -51,   84, -126,  177, -239,  310, -393,  491, -620,  825,-1345,30613,  698, -157,   -6,   71,  -94,   94,  -83,   66,  -47,   29,  -14,    2,    5,   -9,   40,    1,\n   35,    2,  -11,   27,  -52,   85, -128,  180, -243,  316, -401,  503, -637,  852,-1399,30606,  761, -187,   12,   58,  -85,   88,  -78,   63,  -45,   27,  -13,    2,    6,   -9,   40,    1,\n   35,    2,  -11,   28,  -53,   87, -130,  183, -247,  322, -409,  514, -653,  878,-1453,30598,  824, -216,   30,   46,  -76,   81,  -74,   59,  -42,   26,  -12,    1,    6,  -10,   40,    1,\n   35,    2,  -12,   29,  -54,   88, -132,  186, -251,  328, -417,  526, -670,  905,-1506,30590,  887, -245,   49,   33,  -67,   75,  -69,   56,  -40,   24,  -10,    0,    6,  -10,   40,    1,\n   35,    3,  -12,   29,  -55,   89, -134,  189, -256,  333, -425,  537, -686,  931,-1559,30582,  951, -275,   67,   21,  -58,   69,  -64,   52,  -37,   22,   -9,   -1,    7,  -10,   40,    1,\n   35,    3,  -13,   30,  -56,   91, -136,  192, -260,  339, -433,  548, -703,  957,-1612,30573, 1014, -304,   85,    8,  -49,   62,  -60,   49,  -35,   21,   -8,   -1,    7,  -11,   40,    1,\n   35,    3,  -13,   31,  -57,   92, -138,  195, -264,  345, -441,  560, -720,  983,-1665,30564, 1078, -334,  104,   -4,  -40,   56,  -55,   46,  -33,   19,   -7,   -2,    8,  -11,   40,    1,\n   35,    3,  -14,   31,  -58,   94, -140,  198, -268,  351, -449,  571, -736, 1010,-1717,30555, 1142, -364,  122,  -17,  -31,   49,  -50,   42,  -30,   17,   -6,   -3,    8,  -11,   40,    1,\n   35,    4,  -14,   32,  -59,   95, -143,  201, -272,  356, -457,  582, -752, 1036,-1769,30545, 1207, -393,  140,  -29,  -22,   43,  -46,   39,  -28,   16,   -5,   -4,    9,  -11,   40,    1,\n   35,    4,  -14,   32,  -60,   97, -145,  204, -276,  362, -465,  593, -769, 1061,-1821,30535, 1271, -423,  159,  -42,  -13,   36,  -41,   36,  -26,   14,   -4,   -4,    9,  -12,   41,    1,\n   34,    4,  -15,   33,  -61,   98, -147,  207, -280,  368, -473,  604, -785, 1087,-1872,30524, 1336, -453,  177,  -54,   -4,   30,  -36,   32,  -23,   13,   -3,   -5,   10,  -12,   41,    1,\n   34,    5,  -15,   34,  -62,  100, -149,  210, -284,  374, -481,  616, -801, 1113,-1923,30513, 1401, -482,  196,  -67,    5,   23,  -31,   29,  -21,   11,   -2,   -6,   10,  -12,   41,    1,\n   34,    5,  -16,   34,  -63,  101, -151,  213, -288,  379, -489,  627, -817, 1139,-1974,30501, 1466, -512,  214,  -80,   14,   17,  -27,   25,  -18,    9,    0,   -6,   11,  -13,   41,    1,\n   34,    5,  -16,   35,  -63,  102, -153,  216, -293,  385, -497,  638, -833, 1164,-2025,30490, 1532, -542,  233,  -92,   23,   10,  -22,   22,  -16,    8,    1,   -7,   11,  -13,   41,    1,\n   34,    5,  -16,   36,  -64,  104, -155,  219, -297,  390, -504,  649, -849, 1190,-2075,30477, 1598, -572,  251, -105,   32,    3,  -17,   19,  -14,    6,    2,   -8,   12,  -13,   41,    1,\n   34,    6,  -17,   36,  -65,  105, -157,  222, -301,  396, -512,  660, -865, 1215,-2125,30465, 1663, -602,  270, -118,   41,   -3,  -12,   15,  -11,    4,    3,   -9,   12,  -14,   41,    1,\n   34,    6,  -17,   37,  -66,  107, -159,  224, -305,  402, -520,  671, -881, 1240,-2175,30452, 1730, -632,  288, -130,   50,  -10,   -8,   12,   -9,    2,    4,   -9,   13,  -14,   41,    1,\n   34,    6,  -18,   38,  -67,  108, -161,  227, -309,  407, -528,  681, -897, 1265,-2225,30438, 1796, -662,  307, -143,   59,  -16,   -3,    8,   -6,    1,    5,  -10,   13,  -14,   41,    1,\n   33,    7,  -18,   38,  -68,  109, -163,  230, -312,  413, -535,  692, -913, 1290,-2274,30424, 1862, -692,  325, -156,   68,  -23,    2,    5,   -4,   -1,    6,  -11,   13,  -14,   42,    1,\n   33,    7,  -18,   39,  -69,  111, -165,  233, -316,  418, -543,  703, -929, 1315,-2323,30410, 1929, -723,  344, -169,   77,  -29,    7,    1,   -1,   -3,    8,  -12,   14,  -15,   42,    1,\n   33,    7,  -19,   39,  -70,  112, -167,  236, -320,  424, -551,  714, -944, 1340,-2372,30395, 1996, -753,  363, -181,   86,  -36,   11,   -2,    1,   -4,    9,  -12,   14,  -15,   42,    1,\n   33,    7,  -19,   40,  -71,  113, -169,  238, -324,  429, -558,  724, -960, 1365,-2420,30380, 2063, -783,  381, -194,   95,  -43,   16,   -5,    4,   -6,   10,  -13,   15,  -15,   42,    1,\n   33,    8,  -20,   41,  -72,  115, -171,  241, -328,  434, -566,  735, -976, 1389,-2469,30365, 2131, -813,  400, -207,  105,  -49,   21,   -9,    6,   -8,   11,  -14,   15,  -16,   42,    1,\n   33,    8,  -20,   41,  -73,  116, -173,  244, -332,  440, -573,  746, -991, 1414,-2516,30349, 2198, -844,  419, -220,  114,  -56,   26,  -12,    8,   -9,   12,  -15,   16,  -16,   42,    1,\n   33,    8,  -20,   42,  -74,  117, -175,  247, -336,  445, -581,  756,-1007, 1438,-2564,30333, 2266, -874,  437, -232,  123,  -62,   31,  -16,   11,  -11,   13,  -15,   16,  -16,   42,    1,\n   33,    9,  -21,   42,  -75,  119, -176,  249, -340,  450, -588,  767,-1022, 1463,-2612,30317, 2334, -904,  456, -245,  132,  -69,   35,  -19,   13,  -13,   14,  -16,   17,  -17,   42,    1,\n   33,    9,  -21,   43,  -76,  120, -178,  252, -343,  456, -596,  777,-1037, 1487,-2659,30300, 2402, -935,  475, -258,  141,  -76,   40,  -23,   16,  -14,   16,  -17,   17,  -17,   42,    1,\n   32,    9,  -22,   44,  -76,  121, -180,  255, -347,  461, -603,  788,-1053, 1511,-2705,30282, 2471, -965,  493, -271,  150,  -82,   45,  -26,   18,  -16,   17,  -18,   18,  -17,   42,    1,\n   32,    9,  -22,   44,  -77,  123, -182,  258, -351,  466, -610,  798,-1068, 1535,-2752,30264, 2539, -996,  512, -284,  159,  -89,   50,  -30,   21,  -18,   18,  -18,   18,  -17,   43,    1,\n   32,   10,  -22,   45,  -78,  124, -184,  260, -355,  472, -618,  809,-1083, 1559,-2798,30246, 2608,-1026,  531, -296,  169,  -96,   55,  -33,   23,  -20,   19,  -19,   19,  -18,   43,    1,\n   32,   10,  -23,   45,  -79,  125, -186,  263, -359,  477, -625,  819,-1098, 1583,-2844,30228, 2677,-1057,  550, -309,  178, -102,   60,  -37,   26,  -21,   20,  -20,   19,  -18,   43,    1,\n   32,   10,  -23,   46,  -80,  127, -188,  266, -362,  482, -632,  829,-1113, 1606,-2890,30209, 2746,-1087,  568, -322,  187, -109,   64,  -40,   28,  -23,   21,  -21,   20,  -18,   43,    1,\n   32,   11,  -24,   47,  -81,  128, -190,  268, -366,  487, -639,  839,-1128, 1630,-2935,30190, 2816,-1118,  587, -335,  196, -116,   69,  -44,   31,  -25,   22,  -21,   20,  -19,   43,    1,\n   32,   11,  -24,   47,  -82,  129, -191,  271, -370,  492, -647,  850,-1143, 1653,-2981,30170, 2885,-1148,  606, -348,  205, -122,   74,  -47,   33,  -26,   24,  -22,   21,  -19,   43,    1,\n   32,   11,  -24,   48,  -83,  130, -193,  273, -373,  497, -654,  860,-1158, 1676,-3025,30150, 2955,-1179,  625, -361,  214, -129,   79,  -51,   36,  -28,   25,  -23,   21,  -19,   43,    1,\n   31,   11,  -25,   48,  -83,  132, -195,  276, -377,  503, -661,  870,-1172, 1700,-3070,30130, 3025,-1209,  643, -374,  224, -136,   84,  -54,   38,  -30,   26,  -24,   21,  -20,   43,    1,\n   31,   12,  -25,   49,  -84,  133, -197,  279, -381,  508, -668,  880,-1187, 1723,-3114,30109, 3095,-1240,  662, -386,  233, -142,   89,  -58,   40,  -32,   27,  -24,   22,  -20,   43,    1,\n   31,   12,  -26,   49,  -85,  134, -199,  281, -384,  513, -675,  890,-1201, 1746,-3158,30088, 3166,-1271,  681, -399,  242, -149,   94,  -61,   43,  -33,   28,  -25,   22,  -20,   43,    1,\n   31,   12,  -26,   50,  -86,  135, -201,  284, -388,  518, -682,  900,-1216, 1769,-3202,30066, 3236,-1302,  700, -412,  251, -156,   98,  -65,   45,  -35,   29,  -26,   23,  -20,   44,    1,\n   31,   13,  -26,   51,  -87,  137, -202,  286, -391,  523, -689,  910,-1230, 1791,-3246,30044, 3307,-1332,  719, -425,  260, -162,  103,  -68,   48,  -37,   31,  -27,   23,  -21,   44,    1,\n   31,   13,  -27,   51,  -88,  138, -204,  289, -395,  528, -696,  919,-1245, 1814,-3289,30022, 3378,-1363,  737, -438,  270, -169,  108,  -72,   50,  -39,   32,  -27,   24,  -21,   44,    1,\n   31,   13,  -27,   52,  -89,  139, -206,  291, -398,  533, -703,  929,-1259, 1836,-3332,29999, 3449,-1394,  756, -451,  279, -176,  113,  -75,   53,  -40,   33,  -28,   24,  -21,   44,    1,\n   31,   13,  -27,   52,  -89,  140, -208,  294, -402,  538, -710,  939,-1273, 1859,-3374,29976, 3521,-1425,  775, -464,  288, -182,  118,  -79,   55,  -42,   34,  -29,   25,  -22,   44,    1,\n   30,   14,  -28,   53,  -90,  142, -209,  296, -405,  542, -717,  949,-1288, 1881,-3417,29952, 3592,-1455,  794, -476,  297, -189,  123,  -82,   58,  -44,   35,  -30,   25,  -22,   44,    1,\n   30,   14,  -28,   53,  -91,  143, -211,  299, -409,  547, -723,  958,-1302, 1903,-3459,29928, 3664,-1486,  813, -489,  306, -196,  128,  -86,   60,  -45,   36,  -30,   26,  -22,   44,    1,\n   30,   14,  -28,   54,  -92,  144, -213,  301, -412,  552, -730,  968,-1316, 1925,-3501,29904, 3736,-1517,  832, -502,  316, -202,  132,  -89,   63,  -47,   38,  -31,   26,  -22,   44,    1,\n   30,   14,  -29,   54,  -93,  145, -215,  304, -416,  557, -737,  977,-1330, 1947,-3542,29880, 3808,-1548,  850, -515,  325, -209,  137,  -93,   65,  -49,   39,  -32,   27,  -23,   44,    1,\n   30,   15,  -29,   55,  -93,  146, -216,  306, -419,  562, -744,  987,-1343, 1969,-3583,29855, 3880,-1579,  869, -528,  334, -216,  142,  -96,   68,  -51,   40,  -33,   27,  -23,   44,    1,\n   30,   15,  -30,   56,  -94,  148, -218,  308, -423,  566, -750,  996,-1357, 1991,-3624,29829, 3952,-1609,  888, -541,  343, -223,  147, -100,   70,  -52,   41,  -33,   28,  -23,   45,    1,\n   30,   15,  -30,   56,  -95,  149, -220,  311, -426,  571, -757, 1006,-1371, 2012,-3665,29803, 4025,-1640,  907, -553,  352, -229,  152, -103,   73,  -54,   42,  -34,   28,  -24,   45,    1,\n   30,   15,  -30,   57,  -96,  150, -221,  313, -429,  576, -764, 1015,-1385, 2034,-3705,29777, 4098,-1671,  926, -566,  362, -236,  157, -107,   75,  -56,   43,  -35,   29,  -24,   45,    1,\n   30,   16,  -31,   57,  -97,  151, -223,  316, -433,  581, -770, 1024,-1398, 2055,-3745,29751, 4171,-1702,  944, -579,  371, -243,  162, -110,   78,  -58,   45,  -36,   29,  -24,   45,    1,\n   29,   16,  -31,   58,  -97,  152, -225,  318, -436,  585, -777, 1034,-1412, 2076,-3785,29724, 4244,-1733,  963, -592,  380, -249,  167, -114,   80,  -59,   46,  -37,   30,  -25,   45,    1,\n   29,   16,  -31,   58,  -98,  153, -226,  320, -439,  590, -783, 1043,-1425, 2097,-3824,29697, 4317,-1764,  982, -605,  389, -256,  171, -117,   83,  -61,   47,  -37,   30,  -25,   45,    1,\n   29,   17,  -32,   59,  -99,  154, -228,  323, -443,  594, -790, 1052,-1439, 2118,-3864,29669, 4391,-1795, 1001, -618,  398, -263,  176, -121,   85,  -63,   48,  -38,   30,  -25,   45,    1,\n   29,   17,  -32,   59, -100,  156, -229,  325, -446,  599, -796, 1061,-1452, 2139,-3902,29641, 4464,-1825, 1019, -630,  407, -269,  181, -124,   88,  -64,   49,  -39,   31,  -25,   45,    1,\n   29,   17,  -32,   60, -100,  157, -231,  327, -449,  603, -802, 1070,-1465, 2160,-3941,29613, 4538,-1856, 1038, -643,  417, -276,  186, -128,   90,  -66,   50,  -40,   31,  -26,   45,    1,\n   29,   17,  -33,   60, -101,  158, -233,  329, -452,  608, -809, 1079,-1478, 2180,-3979,29584, 4612,-1887, 1057, -656,  426, -283,  191, -131,   93,  -68,   52,  -40,   32,  -26,   45,    1,\n   29,   18,  -33,   61, -102,  159, -234,  332, -455,  612, -815, 1088,-1491, 2201,-4017,29555, 4686,-1918, 1076, -669,  435, -289,  196, -135,   95,  -70,   53,  -41,   32,  -26,   45,    1,\n   29,   18,  -33,   61, -103,  160, -236,  334, -459,  617, -821, 1097,-1504, 2221,-4055,29525, 4760,-1949, 1094, -682,  444, -296,  201, -138,   98,  -71,   54,  -42,   33,  -27,   45,    2,\n   28,   18,  -34,   62, -103,  161, -237,  336, -462,  621, -827, 1106,-1517, 2241,-4093,29495, 4835,-1980, 1113, -694,  453, -303,  206, -142,  100,  -73,   55,  -43,   33,  -27,   46,    2,\n   28,   18,  -34,   62, -104,  162, -239,  338, -465,  626, -833, 1114,-1530, 2261,-4130,29465, 4910,-2011, 1132, -707,  462, -309,  210, -145,  103,  -75,   56,  -43,   34,  -27,   46,    2,\n   28,   19,  -34,   63, -105,  163, -240,  340, -468,  630, -840, 1123,-1543, 2281,-4167,29434, 4984,-2041, 1150, -720,  472, -316,  215, -149,  105,  -77,   57,  -44,   34,  -27,   46,    2,\n   28,   19,  -35,   63, -106,  164, -242,  343, -471,  634, -846, 1132,-1555, 2301,-4203,29403, 5059,-2072, 1169, -733,  481, -323,  220, -153,  108,  -78,   59,  -45,   35,  -28,   46,    2,\n   28,   19,  -35,   64, -106,  165, -244,  345, -474,  639, -852, 1140,-1568, 2321,-4240,29372, 5134,-2103, 1188, -745,  490, -329,  225, -156,  110,  -80,   60,  -46,   35,  -28,   46,    2,\n   28,   19,  -35,   64, -107,  166, -245,  347, -477,  643, -858, 1149,-1580, 2340,-4276,29340, 5210,-2134, 1206, -758,  499, -336,  230, -160,  113,  -82,   61,  -46,   36,  -28,   46,    2,\n   28,   20,  -36,   65, -108,  167, -247,  349, -480,  647, -864, 1157,-1593, 2360,-4311,29308, 5285,-2165, 1225, -771,  508, -343,  235, -163,  115,  -84,   62,  -47,   36,  -29,   46,    2,\n   28,   20,  -36,   65, -109,  168, -248,  351, -483,  651, -870, 1166,-1605, 2379,-4347,29276, 5361,-2195, 1244, -784,  517, -349,  240, -167,  118,  -85,   63,  -48,   37,  -29,   46,    2,\n   27,   20,  -36,   66, -109,  169, -249,  353, -486,  655, -875, 1174,-1617, 2398,-4382,29243, 5436,-2226, 1262, -796,  526, -356,  244, -170,  120,  -87,   64,  -49,   37,  -29,   46,    2,\n   27,   20,  -37,   66, -110,  170, -251,  355, -489,  660, -881, 1182,-1629, 2417,-4417,29210, 5512,-2257, 1281, -809,  535, -363,  249, -174,  123,  -89,   66,  -49,   38,  -29,   46,    2,\n   27,   21,  -37,   67, -111,  171, -252,  357, -492,  664, -887, 1191,-1642, 2436,-4451,29176, 5588,-2288, 1299, -822,  544, -369,  254, -177,  125,  -90,   67,  -50,   38,  -30,   46,    2,\n   27,   21,  -37,   67, -111,  172, -254,  359, -495,  668, -893, 1199,-1654, 2455,-4485,29142, 5664,-2318, 1318, -834,  553, -376,  259, -181,  128,  -92,   68,  -51,   38,  -30,   46,    2,\n   27,   21,  -38,   68, -112,  173, -255,  362, -498,  672, -899, 1207,-1665, 2473,-4519,29108, 5741,-2349, 1336, -847,  563, -382,  264, -184,  130,  -94,   69,  -52,   39,  -30,   47,    2,\n   27,   21,  -38,   68, -113,  174, -257,  364, -500,  676, -904, 1215,-1677, 2492,-4553,29074, 5817,-2380, 1355, -860,  572, -389,  269, -188,  133,  -96,   70,  -52,   39,  -31,   47,    2,\n   27,   22,  -38,   69, -113,  175, -258,  366, -503,  680, -910, 1223,-1689, 2510,-4587,29039, 5894,-2410, 1373, -872,  581, -396,  273, -191,  135,  -97,   71,  -53,   40,  -31,   47,    2,\n   27,   22,  -39,   69, -114,  176, -259,  368, -506,  684, -915, 1231,-1701, 2528,-4620,29003, 5970,-2441, 1392, -885,  590, -402,  278, -195,  138,  -99,   73,  -54,   40,  -31,   47,    2,\n   27,   22,  -39,   69, -115,  177, -261,  369, -509,  688, -921, 1239,-1712, 2547,-4652,28968, 6047,-2472, 1410, -897,  599, -409,  283, -198,  140, -101,   74,  -55,   41,  -31,   47,    2,\n   26,   22,  -39,   70, -115,  178, -262,  371, -512,  692, -926, 1247,-1724, 2564,-4685,28932, 6124,-2502, 1429, -910,  608, -415,  288, -202,  143, -103,   75,  -55,   41,  -32,   47,    2,\n   26,   23,  -40,   70, -116,  179, -264,  373, -514,  695, -932, 1255,-1735, 2582,-4717,28895, 6202,-2533, 1447, -922,  617, -422,  293, -205,  145, -104,   76,  -56,   42,  -32,   47,    2,\n   26,   23,  -40,   71, -117,  180, -265,  375, -517,  699, -937, 1262,-1747, 2600,-4749,28858, 6279,-2563, 1465, -935,  626, -429,  297, -208,  148, -106,   77,  -57,   42,  -32,   47,    2,\n   26,   23,  -40,   71, -117,  181, -266,  377, -520,  703, -943, 1270,-1758, 2618,-4781,28821, 6356,-2594, 1484, -947,  635, -435,  302, -212,  150, -108,   78,  -58,   43,  -32,   47,    2,\n   26,   23,  -40,   72, -118,  182, -268,  379, -522,  707, -948, 1278,-1769, 2635,-4812,28784, 6434,-2624, 1502, -960,  644, -442,  307, -215,  153, -109,   79,  -58,   43,  -33,   47,    2,\n   26,   24,  -41,   72, -118,  183, -269,  381, -525,  711, -953, 1285,-1780, 2652,-4843,28746, 6511,-2655, 1520, -972,  652, -448,  312, -219,  155, -111,   81,  -59,   44,  -33,   47,    2,\n   26,   24,  -41,   72, -119,  184, -270,  383, -528,  714, -959, 1293,-1791, 2669,-4874,28708, 6589,-2685, 1538, -985,  661, -455,  317, -222,  158, -113,   82,  -60,   44,  -33,   47,    2,\n   26,   24,  -41,   73, -120,  185, -271,  385, -530,  718, -964, 1300,-1802, 2686,-4904,28669, 6667,-2715, 1557, -997,  670, -461,  321, -226,  160, -115,   83,  -61,   44,  -34,   47,    2,\n   25,   24,  -42,   73, -120,  186, -273,  386, -533,  722, -969, 1307,-1813, 2703,-4934,28630, 6745,-2746, 1575,-1010,  679, -468,  326, -229,  163, -116,   84,  -61,   45,  -34,   48,    2,\n   25,   25,  -42,   74, -121,  186, -274,  388, -535,  725, -974, 1315,-1824, 2720,-4964,28591, 6823,-2776, 1593,-1022,  688, -474,  331, -233,  165, -118,   85,  -62,   45,  -34,   48,    2,\n   25,   25,  -42,   74, -122,  187, -275,  390, -538,  729, -979, 1322,-1834, 2737,-4994,28552, 6902,-2806, 1611,-1034,  697, -481,  336, -236,  167, -120,   86,  -63,   46,  -34,   48,    2,\n   25,   25,  -42,   75, -122,  188, -276,  392, -540,  732, -984, 1329,-1845, 2753,-5023,28512, 6980,-2837, 1629,-1047,  706, -487,  340, -240,  170, -121,   88,  -64,   46,  -35,   48,    2,\n   25,   25,  -43,   75, -123,  189, -278,  393, -543,  736, -989, 1336,-1855, 2769,-5052,28471, 7059,-2867, 1647,-1059,  715, -494,  345, -243,  172, -123,   89,  -64,   47,  -35,   48,    2,\n   25,   26,  -43,   75, -123,  190, -279,  395, -545,  739, -994, 1343,-1866, 2785,-5081,28431, 7137,-2897, 1665,-1071,  723, -500,  350, -246,  175, -125,   90,  -65,   47,  -35,   48,    2,\n   25,   26,  -43,   76, -124,  191, -280,  397, -548,  743, -999, 1350,-1876, 2802,-5109,28390, 7216,-2927, 1683,-1083,  732, -507,  355, -250,  177, -127,   91,  -66,   48,  -35,   48,    2,\n   25,   26,  -44,   76, -124,  191, -281,  399, -550,  746,-1004, 1357,-1886, 2817,-5137,28349, 7295,-2957, 1701,-1096,  741, -513,  359, -253,  180, -128,   92,  -66,   48,  -36,   48,    2,\n   25,   26,  -44,   77, -125,  192, -282,  400, -553,  750,-1009, 1364,-1896, 2833,-5165,28307, 7374,-2987, 1719,-1108,  750, -519,  364, -257,  182, -130,   93,  -67,   49,  -36,   48,    2,\n   24,   26,  -44,   77, -126,  193, -284,  402, -555,  753,-1013, 1371,-1906, 2849,-5193,28265, 7453,-3017, 1737,-1120,  759, -526,  369, -260,  185, -132,   94,  -68,   49,  -36,   48,    2,\n   24,   27,  -44,   77, -126,  194, -285,  404, -557,  756,-1018, 1378,-1916, 2864,-5220,28223, 7533,-3047, 1755,-1132,  767, -532,  373, -264,  187, -133,   96,  -69,   49,  -37,   48,    2,\n   24,   27,  -45,   78, -127,  195, -286,  405, -560,  759,-1023, 1384,-1926, 2880,-5247,28180, 7612,-3077, 1773,-1144,  776, -539,  378, -267,  189, -135,   97,  -69,   50,  -37,   48,    2,\n   24,   27,  -45,   78, -127,  195, -287,  407, -562,  763,-1027, 1391,-1936, 2895,-5274,28137, 7691,-3107, 1790,-1156,  785, -545,  383, -270,  192, -137,   98,  -70,   50,  -37,   48,    3,\n   24,   27,  -45,   78, -128,  196, -288,  408, -564,  766,-1032, 1398,-1946, 2910,-5300,28094, 7771,-3137, 1808,-1169,  793, -551,  387, -274,  194, -138,   99,  -71,   51,  -37,   48,    3,\n   24,   28,  -46,   79, -128,  197, -289,  410, -566,  769,-1036, 1404,-1955, 2925,-5326,28050, 7851,-3166, 1826,-1181,  802, -558,  392, -277,  197, -140,  100,  -72,   51,  -38,   48,    3,\n   24,   28,  -46,   79, -129,  198, -290,  411, -569,  772,-1041, 1411,-1965, 2939,-5352,28006, 7931,-3196, 1843,-1193,  811, -564,  397, -281,  199, -142,  101,  -72,   52,  -38,   49,    3,\n   24,   28,  -46,   80, -129,  199, -291,  413, -571,  775,-1045, 1417,-1974, 2954,-5377,27962, 8010,-3226, 1861,-1205,  819, -570,  401, -284,  201, -143,  102,  -73,   52,  -38,   49,    3,\n   23,   28,  -46,   80, -130,  199, -292,  414, -573,  778,-1050, 1423,-1983, 2969,-5403,27917, 8090,-3255, 1878,-1217,  828, -577,  406, -287,  204, -145,  103,  -74,   53,  -38,   49,    3,\n   23,   29,  -47,   80, -130,  200, -293,  416, -575,  781,-1054, 1430,-1993, 2983,-5428,27872, 8171,-3285, 1896,-1228,  836, -583,  411, -291,  206, -147,  105,  -74,   53,  -39,   49,    3,\n   23,   29,  -47,   81, -131,  201, -294,  417, -577,  784,-1058, 1436,-2002, 2997,-5452,27827, 8251,-3314, 1913,-1240,  845, -589,  415, -294,  209, -148,  106,  -75,   53,  -39,   49,    3,\n   23,   29,  -47,   81, -131,  201, -295,  419, -579,  787,-1063, 1442,-2011, 3011,-5476,27781, 8331,-3343, 1931,-1252,  854, -595,  420, -297,  211, -150,  107,  -76,   54,  -39,   49,    3,\n   23,   29,  -47,   81, -132,  202, -296,  420, -581,  790,-1067, 1448,-2020, 3025,-5500,27735, 8411,-3373, 1948,-1264,  862, -602,  424, -301,  213, -152,  108,  -77,   54,  -39,   49,    3,\n   23,   29,  -48,   82, -132,  203, -297,  422, -583,  793,-1071, 1454,-2029, 3039,-5524,27688, 8492,-3402, 1966,-1276,  871, -608,  429, -304,  216, -153,  109,  -77,   55,  -40,   49,    3,\n   23,   30,  -48,   82, -133,  204, -298,  423, -585,  796,-1075, 1460,-2037, 3052,-5548,27642, 8572,-3431, 1983,-1288,  879, -614,  433, -307,  218, -155,  110,  -78,   55,  -40,   49,    3,\n   23,   30,  -48,   82, -133,  204, -299,  425, -587,  799,-1079, 1466,-2046, 3066,-5571,27595, 8653,-3460, 2000,-1299,  887, -620,  438, -311,  221, -157,  111,  -79,   56,  -40,   49,    3,\n   23,   30,  -48,   83, -134,  205, -300,  426, -589,  802,-1083, 1472,-2055, 3079,-5594,27548, 8734,-3490, 2017,-1311,  896, -626,  443, -314,  223, -158,  112,  -79,   56,  -40,   49,    3,\n   22,   30,  -48,   83, -134,  206, -301,  427, -591,  805,-1087, 1477,-2063, 3092,-5616,27500, 8815,-3519, 2034,-1323,  904, -633,  447, -317,  225, -160,  113,  -80,   56,  -41,   49,    3,\n   22,   30,  -49,   83, -135,  206, -302,  429, -593,  807,-1091, 1483,-2071, 3105,-5639,27452, 8896,-3548, 2051,-1334,  913, -639,  452, -320,  228, -162,  114,  -81,   57,  -41,   49,    3,\n   22,   31,  -49,   84, -135,  207, -303,  430, -595,  810,-1095, 1489,-2080, 3118,-5661,27404, 8977,-3576, 2068,-1346,  921, -645,  456, -324,  230, -163,  116,  -82,   57,  -41,   49,    3,\n   22,   31,  -49,   84, -136,  207, -304,  431, -597,  813,-1099, 1494,-2088, 3131,-5682,27355, 9058,-3605, 2085,-1357,  929, -651,  461, -327,  232, -165,  117,  -82,   58,  -41,   49,    3,\n   22,   31,  -49,   84, -136,  208, -305,  433, -599,  815,-1103, 1500,-2096, 3144,-5704,27306, 9139,-3634, 2102,-1369,  938, -657,  465, -330,  235, -166,  118,  -83,   58,  -42,   49,    3,\n   22,   31,  -50,   85, -136,  209, -306,  434, -601,  818,-1106, 1505,-2104, 3156,-5725,27257, 9220,-3663, 2119,-1380,  946, -663,  470, -334,  237, -168,  119,  -84,   59,  -42,   49,    3,\n   22,   32,  -50,   85, -137,  209, -307,  435, -602,  820,-1110, 1510,-2112, 3168,-5746,27207, 9301,-3691, 2136,-1392,  954, -669,  474, -337,  239, -170,  120,  -84,   59,  -42,   49,    3,\n   22,   32,  -50,   85, -137,  210, -308,  436, -604,  823,-1114, 1516,-2120, 3180,-5766,27157, 9383,-3720, 2153,-1403,  962, -675,  478, -340,  242, -171,  121,  -85,   59,  -42,   50,    3,\n   22,   32,  -50,   85, -138,  210, -308,  437, -606,  825,-1117, 1521,-2128, 3192,-5786,27107, 9464,-3748, 2170,-1415,  970, -681,  483, -343,  244, -173,  122,  -86,   60,  -43,   50,    3,\n   21,   32,  -51,   86, -138,  211, -309,  439, -608,  828,-1121, 1526,-2135, 3204,-5806,27057, 9546,-3777, 2186,-1426,  979, -687,  487, -347,  246, -174,  123,  -86,   60,  -43,   50,    3,\n   21,   32,  -51,   86, -139,  212, -310,  440, -609,  830,-1124, 1531,-2143, 3216,-5826,27006, 9627,-3805, 2203,-1437,  987, -693,  492, -350,  248, -176,  124,  -87,   61,  -43,   50,    3,\n   21,   33,  -51,   86, -139,  212, -311,  441, -611,  833,-1128, 1536,-2150, 3228,-5845,26955, 9709,-3833, 2219,-1449,  995, -699,  496, -353,  251, -178,  125,  -88,   61,  -43,   50,    3,\n   21,   33,  -51,   87, -139,  213, -312,  442, -612,  835,-1131, 1541,-2158, 3239,-5865,26903, 9791,-3861, 2236,-1460, 1003, -705,  501, -356,  253, -179,  126,  -88,   61,  -43,   50,    3,\n   21,   33,  -51,   87, -140,  213, -312,  443, -614,  837,-1134, 1546,-2165, 3250,-5883,26852, 9873,-3889, 2252,-1471, 1011, -711,  505, -359,  255, -181,  127,  -89,   62,  -44,   50,    3,\n   21,   33,  -52,   87, -140,  214, -313,  444, -616,  840,-1138, 1551,-2172, 3261,-5902,26800, 9955,-3917, 2269,-1482, 1019, -717,  509, -362,  258, -182,  128,  -90,   62,  -44,   50,    4,\n   21,   33,  -52,   87, -141,  214, -314,  445, -617,  842,-1141, 1556,-2179, 3272,-5920,26747,10037,-3945, 2285,-1493, 1027, -723,  514, -366,  260, -184,  130,  -91,   63,  -44,   50,    4,\n   21,   34,  -52,   88, -141,  215, -315,  446, -619,  844,-1144, 1560,-2186, 3283,-5938,26695,10119,-3973, 2301,-1504, 1035, -729,  518, -369,  262, -186,  131,  -91,   63,  -44,   50,    4,\n   21,   34,  -52,   88, -141,  215, -315,  448, -620,  846,-1147, 1565,-2193, 3294,-5956,26642,10201,-4001, 2317,-1515, 1043, -735,  522, -372,  264, -187,  132,  -92,   63,  -45,   50,    4,\n   20,   34,  -52,   88, -142,  216, -316,  449, -622,  848,-1150, 1570,-2200, 3304,-5973,26588,10283,-4028, 2333,-1526, 1051, -740,  526, -375,  267, -189,  133,  -93,   64,  -45,   50,    4,\n   20,   34,  -53,   89, -142,  216, -317,  450, -623,  851,-1154, 1574,-2207, 3315,-5990,26535,10365,-4056, 2349,-1537, 1059, -746,  531, -378,  269, -190,  134,  -93,   64,  -45,   50,    4,\n   20,   34,  -53,   89, -142,  217, -317,  451, -625,  853,-1157, 1578,-2213, 3325,-6007,26481,10447,-4083, 2365,-1548, 1067, -752,  535, -381,  271, -192,  135,  -94,   65,  -45,   50,    4,\n   20,   35,  -53,   89, -143,  217, -318,  451, -626,  855,-1160, 1583,-2220, 3335,-6024,26427,10529,-4111, 2381,-1559, 1074, -758,  539, -384,  273, -193,  136,  -95,   65,  -46,   50,    4,\n   20,   35,  -53,   89, -143,  218, -319,  452, -627,  857,-1162, 1587,-2226, 3345,-6040,26372,10612,-4138, 2397,-1570, 1082, -763,  544, -388,  276, -195,  137,  -95,   65,  -46,   50,    4,\n   20,   35,  -53,   90, -143,  218, -319,  453, -629,  859,-1165, 1591,-2232, 3355,-6056,26317,10694,-4165, 2413,-1580, 1090, -769,  548, -391,  278, -196,  138,  -96,   66,  -46,   50,    4,\n   20,   35,  -54,   90, -144,  219, -320,  454, -630,  861,-1168, 1596,-2239, 3364,-6071,26262,10777,-4192, 2429,-1591, 1098, -775,  552, -394,  280, -198,  139,  -96,   66,  -46,   50,    4,\n   20,   35,  -54,   90, -144,  219, -321,  455, -631,  862,-1171, 1600,-2245, 3374,-6087,26207,10859,-4219, 2444,-1602, 1105, -781,  556, -397,  282, -199,  140,  -97,   67,  -46,   50,    4,\n   20,   35,  -54,   90, -144,  220, -321,  456, -633,  864,-1174, 1604,-2251, 3383,-6102,26151,10942,-4246, 2460,-1612, 1113, -786,  560, -400,  284, -201,  141,  -98,   67,  -47,   50,    4,\n   19,   36,  -54,   90, -145,  220, -322,  457, -634,  866,-1176, 1608,-2257, 3392,-6117,26095,11024,-4273, 2476,-1623, 1120, -792,  564, -403,  286, -203,  142,  -98,   67,  -47,   50,    4,\n   19,   36,  -54,   91, -145,  220, -323,  458, -635,  868,-1179, 1611,-2263, 3401,-6131,26039,11107,-4299, 2491,-1633, 1128, -797,  569, -406,  289, -204,  143,  -99,   68,  -47,   50,    4,\n   19,   36,  -54,   91, -145,  221, -323,  459, -636,  870,-1182, 1615,-2268, 3410,-6145,25983,11189,-4326, 2506,-1644, 1136, -803,  573, -409,  291, -206,  144, -100,   68,  -47,   50,    4,\n   19,   36,  -55,   91, -145,  221, -324,  459, -637,  871,-1184, 1619,-2274, 3419,-6159,25926,11272,-4352, 2522,-1654, 1143, -808,  577, -412,  293, -207,  145, -100,   69,  -48,   50,    4,\n   19,   36,  -55,   91, -146,  222, -324,  460, -639,  873,-1187, 1623,-2280, 3428,-6173,25869,11355,-4379, 2537,-1664, 1151, -814,  581, -415,  295, -209,  146, -101,   69,  -48,   50,    4,\n   19,   37,  -55,   92, -146,  222, -325,  461, -640,  875,-1189, 1626,-2285, 3436,-6186,25811,11437,-4405, 2552,-1675, 1158, -820,  585, -418,  297, -210,  147, -102,   69,  -48,   50,    4,\n   19,   37,  -55,   92, -146,  222, -325,  462, -641,  876,-1191, 1630,-2290, 3444,-6200,25754,11520,-4431, 2567,-1685, 1165, -825,  589, -421,  299, -211,  148, -102,   70,  -48,   50,    4,\n   19,   37,  -55,   92, -147,  223, -326,  462, -642,  878,-1194, 1633,-2296, 3453,-6212,25696,11603,-4457, 2582,-1695, 1173, -830,  593, -424,  302, -213,  149, -103,   70,  -48,   51,    4,\n   19,   37,  -55,   92, -147,  223, -326,  463, -643,  879,-1196, 1637,-2301, 3461,-6225,25637,11686,-4483, 2597,-1705, 1180, -836,  597, -427,  304, -214,  150, -104,   70,  -49,   51,    4,\n   19,   37,  -56,   92, -147,  223, -327,  464, -644,  881,-1198, 1640,-2306, 3468,-6237,25579,11769,-4509, 2612,-1715, 1187, -841,  601, -430,  306, -216,  151, -104,   71,  -49,   51,    4,\n   18,   37,  -56,   93, -147,  224, -327,  464, -645,  882,-1200, 1643,-2311, 3476,-6249,25520,11852,-4535, 2627,-1725, 1195, -847,  605, -433,  308, -217,  152, -105,   71,  -49,   51,    5,\n   18,   38,  -56,   93, -148,  224, -328,  465, -646,  884,-1203, 1647,-2316, 3484,-6261,25461,11934,-4560, 2641,-1735, 1202, -852,  609, -435,  310, -219,  153, -105,   72,  -49,   51,    5,\n   18,   38,  -56,   93, -148,  224, -328,  466, -647,  885,-1205, 1650,-2320, 3491,-6272,25402,12017,-4586, 2656,-1745, 1209, -857,  613, -438,  312, -220,  154, -106,   72,  -49,   51,    5,\n   18,   38,  -56,   93, -148,  225, -328,  466, -648,  887,-1207, 1653,-2325, 3498,-6284,25342,12100,-4611, 2671,-1755, 1216, -863,  617, -441,  314, -222,  155, -107,   72,  -50,   51,    5,\n   18,   38,  -56,   93, -148,  225, -329,  467, -649,  888,-1209, 1656,-2330, 3505,-6294,25282,12183,-4637, 2685,-1765, 1223, -868,  621, -444,  316, -223,  156, -107,   73,  -50,   51,    5,\n   18,   38,  -57,   93, -148,  225, -329,  467, -649,  889,-1211, 1659,-2334, 3512,-6305,25222,12266,-4662, 2700,-1775, 1230, -873,  625, -447,  318, -225,  157, -108,   73,  -50,   51,    5,\n   18,   38,  -57,   94, -149,  226, -330,  468, -650,  890,-1213, 1662,-2339, 3519,-6315,25162,12349,-4687, 2714,-1785, 1238, -878,  629, -450,  320, -226,  158, -108,   73,  -50,   51,    5,\n   18,   39,  -57,   94, -149,  226, -330,  469, -651,  892,-1214, 1665,-2343, 3526,-6325,25101,12432,-4712, 2728,-1794, 1245, -883,  632, -453,  322, -227,  159, -109,   74,  -50,   51,    5,\n   18,   39,  -57,   94, -149,  226, -330,  469, -652,  893,-1216, 1667,-2347, 3532,-6335,25040,12515,-4736, 2742,-1804, 1251, -889,  636, -455,  324, -229,  160, -110,   74,  -51,   51,    5,\n   17,   39,  -57,   94, -149,  226, -331,  470, -653,  894,-1218, 1670,-2351, 3539,-6345,24979,12598,-4761, 2756,-1813, 1258, -894,  640, -458,  326, -230,  160, -110,   74,  -51,   51,    5,\n   17,   39,  -57,   94, -149,  227, -331,  470, -653,  895,-1220, 1673,-2355, 3545,-6354,24917,12681,-4786, 2770,-1823, 1265, -899,  644, -461,  328, -232,  161, -111,   75,  -51,   51,    5,\n   17,   39,  -57,   94, -150,  227, -331,  471, -654,  896,-1221, 1675,-2359, 3551,-6363,24855,12764,-4810, 2784,-1832, 1272, -904,  648, -464,  330, -233,  162, -111,   75,  -51,   51,    5,\n   17,   39,  -57,   95, -150,  227, -332,  471, -655,  897,-1223, 1678,-2363, 3557,-6372,24793,12848,-4834, 2798,-1842, 1279, -909,  651, -466,  332, -234,  163, -112,   76,  -51,   51,    5,\n   17,   40,  -58,   95, -150,  227, -332,  471, -655,  898,-1224, 1680,-2367, 3563,-6380,24731,12931,-4859, 2812,-1851, 1286, -914,  655, -469,  334, -236,  164, -113,   76,  -51,   51,    5,\n   17,   40,  -58,   95, -150,  227, -332,  472, -656,  899,-1226, 1682,-2370, 3568,-6388,24669,13014,-4883, 2825,-1860, 1292, -919,  659, -472,  336, -237,  165, -113,   76,  -52,   51,    5,\n   17,   40,  -58,   95, -150,  228, -333,  472, -657,  900,-1227, 1685,-2374, 3574,-6396,24606,13097,-4907, 2839,-1869, 1299, -924,  662, -475,  338, -238,  166, -114,   77,  -52,   51,    5,\n   17,   40,  -58,   95, -151,  228, -333,  473, -657,  901,-1229, 1687,-2377, 3579,-6404,24543,13180,-4930, 2853,-1879, 1306, -929,  666, -477,  340, -240,  167, -114,   77,  -52,   51,    5,\n   17,   40,  -58,   95, -151,  228, -333,  473, -658,  902,-1230, 1689,-2380, 3584,-6411,24479,13263,-4954, 2866,-1888, 1312, -934,  670, -480,  342, -241,  168, -115,   77,  -52,   51,    5,\n   17,   40,  -58,   95, -151,  228, -333,  473, -658,  903,-1231, 1691,-2384, 3589,-6418,24416,13346,-4977, 2879,-1897, 1319, -939,  673, -483,  344, -242,  169, -115,   78,  -52,   51,    5,\n   16,   41,  -58,   95, -151,  228, -333,  474, -659,  903,-1233, 1693,-2387, 3594,-6425,24352,13429,-5001, 2892,-1906, 1325, -943,  677, -485,  346, -244,  170, -116,   78,  -53,   51,    5,\n   16,   41,  -58,   96, -151,  229, -334,  474, -659,  904,-1234, 1695,-2390, 3599,-6431,24288,13512,-5024, 2906,-1915, 1332, -948,  681, -488,  348, -245,  170, -117,   78,  -53,   51,    6,\n   16,   41,  -59,   96, -151,  229, -334,  474, -660,  905,-1235, 1697,-2393, 3603,-6438,24224,13595,-5047, 2919,-1923, 1338, -953,  684, -491,  350, -246,  171, -117,   79,  -53,   51,    6,\n   16,   41,  -59,   96, -151,  229, -334,  474, -660,  906,-1236, 1698,-2396, 3608,-6443,24159,13678,-5070, 2932,-1932, 1345, -958,  688, -493,  351, -248,  172, -118,   79,  -53,   51,    6,\n   16,   41,  -59,   96, -151,  229, -334,  475, -660,  906,-1237, 1700,-2398, 3612,-6449,24094,13761,-5093, 2944,-1941, 1351, -962,  691, -496,  353, -249,  173, -118,   79,  -53,   51,    6,\n   16,   41,  -59,   96, -152,  229, -334,  475, -661,  907,-1238, 1702,-2401, 3616,-6455,24029,13844,-5116, 2957,-1950, 1357, -967,  695, -498,  355, -250,  174, -119,   80,  -53,   51,    6,\n   16,   41,  -59,   96, -152,  229, -335,  475, -661,  907,-1239, 1703,-2403, 3620,-6460,23964,13927,-5138, 2970,-1958, 1363, -972,  698, -501,  357, -252,  175, -119,   80,  -54,   51,    6,\n   16,   42,  -59,   96, -152,  229, -335,  475, -661,  908,-1240, 1705,-2406, 3624,-6465,23898,14010,-5161, 2982,-1967, 1370, -976,  702, -503,  359, -253,  176, -120,   80,  -54,   51,    6,\n   16,   42,  -59,   96, -152,  229, -335,  475, -662,  908,-1241, 1706,-2408, 3628,-6469,23833,14093,-5183, 2995,-1975, 1376, -981,  705, -506,  361, -254,  177, -120,   80,  -54,   51,    6,\n   16,   42,  -59,   96, -152,  229, -335,  476, -662,  909,-1242, 1708,-2411, 3631,-6474,23767,14176,-5205, 3007,-1984, 1382, -986,  708, -509,  362, -255,  177, -121,   81,  -54,   51,    6,\n   15,   42,  -59,   97, -152,  230, -335,  476, -662,  909,-1243, 1709,-2413, 3635,-6478,23700,14258,-5227, 3020,-1992, 1388, -990,  712, -511,  364, -257,  178, -121,   81,  -54,   51,    6,\n   15,   42,  -59,   97, -152,  230, -335,  476, -662,  910,-1243, 1710,-2415, 3638,-6482,23634,14341,-5249, 3032,-2000, 1394, -995,  715, -513,  366, -258,  179, -122,   81,  -54,   51,    6,\n   15,   42,  -59,   97, -152,  230, -335,  476, -663,  910,-1244, 1711,-2417, 3641,-6485,23567,14424,-5271, 3044,-2008, 1400, -999,  718, -516,  368, -259,  180, -123,   82,  -55,   51,    6,\n   15,   42,  -60,   97, -152,  230, -335,  476, -663,  910,-1245, 1713,-2419, 3644,-6489,23500,14507,-5292, 3056,-2017, 1406,-1003,  722, -518,  370, -260,  181, -123,   82,  -55,   51,    6,\n   15,   43,  -60,   97, -152,  230, -335,  476, -663,  911,-1245, 1714,-2420, 3647,-6492,23433,14590,-5314, 3068,-2025, 1412,-1008,  725, -521,  371, -262,  182, -124,   82,  -55,   51,    6,\n   15,   43,  -60,   97, -152,  230, -335,  476, -663,  911,-1246, 1715,-2422, 3649,-6494,23365,14672,-5335, 3080,-2033, 1418,-1012,  728, -523,  373, -263,  182, -124,   83,  -55,   51,    6,\n   15,   43,  -60,   97, -152,  230, -335,  476, -663,  911,-1246, 1715,-2424, 3652,-6497,23298,14755,-5356, 3091,-2041, 1423,-1017,  732, -526,  375, -264,  183, -125,   83,  -55,   51,    6,\n   15,   43,  -60,   97, -152,  230, -335,  476, -663,  911,-1247, 1716,-2425, 3654,-6499,23230,14838,-5377, 3103,-2048, 1429,-1021,  735, -528,  377, -265,  184, -125,   83,  -55,   51,    6,\n   15,   43,  -60,   97, -152,  230, -335,  476, -663,  912,-1247, 1717,-2426, 3656,-6501,23162,14920,-5398, 3114,-2056, 1435,-1025,  738, -530,  378, -266,  185, -126,   83,  -55,   51,    6,\n   15,   43,  -60,   97, -152,  230, -335,  476, -663,  912,-1247, 1718,-2428, 3658,-6503,23094,15003,-5418, 3126,-2064, 1440,-1029,  741, -533,  380, -268,  186, -126,   84,  -56,   51,    7,\n   15,   43,  -60,   97, -152,  230, -335,  476, -663,  912,-1247, 1718,-2429, 3660,-6505,23025,15085,-5439, 3137,-2072, 1446,-1034,  744, -535,  382, -269,  186, -127,   84,  -56,   51,    7,\n   14,   44,  -60,   97, -152,  230, -335,  476, -663,  912,-1248, 1719,-2430, 3662,-6506,22956,15168,-5459, 3148,-2079, 1452,-1038,  747, -537,  383, -270,  187, -127,   84,  -56,   51,    7,\n   14,   44,  -60,   97, -152,  230, -335,  476, -663,  912,-1248, 1719,-2431, 3664,-6507,22887,15250,-5479, 3159,-2087, 1457,-1042,  750, -540,  385, -271,  188, -128,   85,  -56,   51,    7,\n   14,   44,  -60,   97, -152,  230, -335,  476, -663,  912,-1248, 1720,-2432, 3665,-6508,22818,15332,-5499, 3170,-2094, 1463,-1046,  754, -542,  387, -272,  189, -128,   85,  -56,   51,    7,\n   14,   44,  -60,   97, -152,  230, -335,  476, -663,  912,-1248, 1720,-2433, 3667,-6508,22749,15415,-5519, 3181,-2102, 1468,-1050,  757, -544,  388, -273,  189, -128,   85,  -56,   51,    7,\n   14,   44,  -60,   97, -152,  230, -335,  476, -663,  912,-1248, 1721,-2433, 3668,-6508,22679,15497,-5539, 3192,-2109, 1473,-1054,  760, -546,  390, -275,  190, -129,   85,  -56,   51,    7,\n   14,   44,  -60,   97, -152,  230, -335,  475, -662,  911,-1248, 1721,-2434, 3669,-6508,22609,15579,-5558, 3203,-2116, 1479,-1058,  763, -549,  391, -276,  191, -129,   86,  -57,   51,    7,\n   14,   44,  -60,   97, -152,  229, -334,  475, -662,  911,-1248, 1721,-2435, 3670,-6508,22539,15661,-5577, 3213,-2123, 1484,-1062,  766, -551,  393, -277,  192, -130,   86,  -57,   51,    7,\n   14,   44,  -61,   97, -152,  229, -334,  475, -662,  911,-1248, 1721,-2435, 3670,-6507,22469,15744,-5597, 3224,-2130, 1489,-1066,  768, -553,  395, -278,  192, -130,   86,  -57,   51,    7,\n   14,   45,  -61,   97, -152,  229, -334,  475, -662,  911,-1248, 1721,-2435, 3671,-6507,22398,15826,-5616, 3234,-2137, 1494,-1070,  771, -555,  396, -279,  193, -131,   86,  -57,   51,    7,\n   14,   45,  -61,   97, -152,  229, -334,  475, -661,  911,-1248, 1721,-2436, 3672,-6506,22328,15908,-5634, 3244,-2144, 1499,-1073,  774, -557,  398, -280,  194, -131,   87,  -57,   51,    7,\n   14,   45,  -61,   97, -152,  229, -334,  474, -661,  910,-1247, 1721,-2436, 3672,-6504,22257,15989,-5653, 3255,-2151, 1504,-1077,  777, -559,  399, -281,  195, -132,   87,  -57,   51,    7,\n   13,   45,  -61,   97, -152,  229, -334,  474, -661,  910,-1247, 1721,-2436, 3672,-6503,22186,16071,-5671, 3265,-2158, 1509,-1081,  780, -562,  401, -282,  195, -132,   87,  -57,   50,    7,\n   13,   45,  -61,   97, -152,  229, -333,  474, -661,  909,-1247, 1721,-2436, 3672,-6501,22114,16153,-5690, 3275,-2165, 1514,-1085,  783, -564,  402, -283,  196, -133,   87,  -57,   50,    7,\n   13,   45,  -61,   97, -152,  229, -333,  473, -660,  909,-1246, 1720,-2436, 3672,-6499,22043,16235,-5708, 3284,-2171, 1519,-1088,  786, -566,  404, -284,  197, -133,   88,  -58,   50,    7,\n   13,   45,  -61,   97, -152,  229, -333,  473, -660,  909,-1246, 1720,-2435, 3672,-6497,21971,16317,-5726, 3294,-2178, 1524,-1092,  788, -568,  405, -285,  197, -133,   88,  -58,   50,    8,\n   13,   45,  -61,   97, -152,  228, -333,  473, -659,  908,-1245, 1719,-2435, 3671,-6494,21899,16398,-5744, 3304,-2184, 1529,-1096,  791, -570,  407, -286,  198, -134,   88,  -58,   50,    8,\n   13,   45,  -61,   97, -152,  228, -333,  472, -659,  908,-1245, 1719,-2435, 3671,-6492,21827,16480,-5761, 3313,-2191, 1533,-1099,  794, -572,  408, -287,  199, -134,   88,  -58,   50,    8,\n   13,   46,  -61,   97, -152,  228, -332,  472, -658,  907,-1244, 1718,-2434, 3670,-6489,21755,16561,-5779, 3323,-2197, 1538,-1103,  796, -574,  410, -288,  199, -135,   89,  -58,   50,    8,\n   13,   46,  -61,   97, -152,  228, -332,  472, -658,  906,-1244, 1718,-2434, 3669,-6485,21683,16642,-5796, 3332,-2204, 1543,-1106,  799, -576,  411, -289,  200, -135,   89,  -58,   50,    8,\n   13,   46,  -61,   97, -152,  228, -332,  471, -657,  906,-1243, 1717,-2433, 3669,-6482,21610,16724,-5813, 3341,-2210, 1547,-1110,  802, -578,  413, -290,  201, -136,   89,  -58,   50,    8,\n   13,   46,  -61,   97, -152,  228, -331,  471, -657,  905,-1242, 1716,-2432, 3667,-6478,21537,16805,-5830, 3350,-2216, 1552,-1113,  804, -580,  414, -291,  201, -136,   89,  -58,   50,    8,\n   13,   46,  -61,   97, -151,  227, -331,  470, -656,  905,-1241, 1715,-2431, 3666,-6474,21464,16886,-5847, 3359,-2222, 1556,-1116,  807, -582,  415, -292,  202, -136,   90,  -58,   50,    8,\n   12,   46,  -61,   97, -151,  227, -331,  470, -656,  904,-1241, 1715,-2430, 3665,-6470,21391,16967,-5863, 3368,-2228, 1561,-1120,  809, -583,  417, -293,  203, -137,   90,  -59,   50,    8,\n   12,   46,  -61,   97, -151,  227, -330,  469, -655,  903,-1240, 1714,-2429, 3663,-6466,21317,17048,-5880, 3377,-2234, 1565,-1123,  812, -585,  418, -294,  203, -137,   90,  -59,   50,    8,\n   12,   46,  -61,   97, -151,  227, -330,  469, -654,  902,-1239, 1713,-2428, 3662,-6461,21244,17129,-5896, 3385,-2240, 1569,-1126,  814, -587,  419, -295,  204, -137,   90,  -59,   50,    8,\n   12,   46,  -61,   97, -151,  227, -330,  468, -654,  901,-1238, 1711,-2427, 3660,-6456,21170,17210,-5912, 3394,-2245, 1573,-1130,  817, -589,  421, -296,  205, -138,   90,  -59,   50,    8,\n   12,   46,  -61,   97, -151,  226, -329,  468, -653,  901,-1237, 1710,-2425, 3658,-6451,21096,17290,-5928, 3402,-2251, 1578,-1133,  819, -591,  422, -297,  205, -138,   91,  -59,   50,    8,\n   12,   47,  -61,   97, -151,  226, -329,  467, -652,  900,-1236, 1709,-2424, 3656,-6445,21022,17371,-5943, 3410,-2257, 1582,-1136,  822, -593,  423, -298,  206, -139,   91,  -59,   50,    8,\n   12,   47,  -61,   97, -151,  226, -329,  467, -652,  899,-1235, 1708,-2422, 3654,-6440,20948,17451,-5959, 3418,-2262, 1586,-1139,  824, -594,  425, -299,  206, -139,   91,  -59,   50,    8,\n   12,   47,  -61,   97, -150,  226, -328,  466, -651,  898,-1234, 1706,-2421, 3651,-6434,20873,17532,-5974, 3426,-2267, 1590,-1142,  826, -596,  426, -300,  207, -139,   91,  -59,   50,    9,\n   12,   47,  -61,   97, -150,  225, -328,  466, -650,  897,-1232, 1705,-2419, 3649,-6428,20799,17612,-5989, 3434,-2273, 1594,-1145,  829, -598,  427, -301,  208, -140,   91,  -59,   50,    9,\n   12,   47,  -61,   97, -150,  225, -327,  465, -649,  896,-1231, 1704,-2417, 3646,-6421,20724,17692,-6004, 3442,-2278, 1598,-1148,  831, -600,  428, -302,  208, -140,   92,  -59,   50,    9,\n   12,   47,  -61,   97, -150,  225, -327,  464, -648,  895,-1230, 1702,-2415, 3644,-6415,20649,17772,-6018, 3450,-2283, 1602,-1151,  833, -601,  430, -302,  209, -140,   92,  -59,   50,    9,\n   12,   47,  -61,   97, -150,  224, -326,  464, -647,  894,-1228, 1700,-2413, 3641,-6408,20574,17852,-6033, 3457,-2288, 1605,-1154,  835, -603,  431, -303,  209, -141,   92,  -60,   50,    9,\n   11,   47,  -61,   97, -150,  224, -326,  463, -647,  893,-1227, 1699,-2411, 3638,-6401,20499,17932,-6047, 3464,-2293, 1609,-1157,  838, -605,  432, -304,  210, -141,   92,  -60,   50,    9,\n   11,   47,  -61,   96, -149,  224, -325,  462, -646,  891,-1226, 1697,-2409, 3635,-6394,20423,18012,-6061, 3472,-2298, 1613,-1160,  840, -606,  433, -305,  210, -141,   92,  -60,   50,    9,\n   11,   47,  -61,   96, -149,  223, -325,  462, -645,  890,-1224, 1695,-2407, 3631,-6386,20347,18092,-6075, 3479,-2303, 1616,-1162,  842, -608,  434, -306,  211, -142,   93,  -60,   49,    9,\n   11,   47,  -61,   96, -149,  223, -324,  461, -644,  889,-1223, 1693,-2404, 3628,-6379,20272,18171,-6089, 3486,-2308, 1620,-1165,  844, -609,  436, -307,  211, -142,   93,  -60,   49,    9,\n   11,   48,  -61,   96, -149,  223, -324,  460, -643,  888,-1221, 1691,-2402, 3624,-6371,20196,18251,-6102, 3493,-2313, 1623,-1168,  846, -611,  437, -307,  212, -142,   93,  -60,   49,    9,\n   11,   48,  -61,   96, -149,  222, -323,  460, -642,  886,-1220, 1689,-2399, 3621,-6363,20120,18330,-6115, 3500,-2317, 1627,-1170,  848, -612,  438, -308,  212, -143,   93,  -60,   49,    9,\n   11,   48,  -61,   96, -149,  222, -323,  459, -641,  885,-1218, 1687,-2397, 3617,-6354,20043,18409,-6128, 3506,-2322, 1630,-1173,  850, -614,  439, -309,  213, -143,   93,  -60,   49,    9,\n   11,   48,  -61,   96, -148,  222, -322,  458, -640,  884,-1216, 1685,-2394, 3613,-6346,19967,18488,-6141, 3513,-2326, 1634,-1176,  852, -616,  440, -310,  214, -143,   93,  -60,   49,    9,\n   11,   48,  -61,   96, -148,  221, -322,  457, -639,  882,-1214, 1683,-2391, 3609,-6337,19890,18567,-6154, 3519,-2330, 1637,-1178,  854, -617,  441, -311,  214, -144,   94,  -60,   49,    9,\n   11,   48,  -61,   96, -148,  221, -321,  456, -638,  881,-1213, 1681,-2388, 3604,-6328,19814,18646,-6166, 3526,-2335, 1640,-1181,  856, -618,  442, -311,  214, -144,   94,  -60,   49,   10,\n   11,   48,  -61,   96, -148,  221, -321,  456, -636,  880,-1211, 1679,-2385, 3600,-6319,19737,18725,-6179, 3532,-2339, 1643,-1183,  858, -620,  443, -312,  215, -144,   94,  -60,   49,   10,\n   11,   48,  -61,   96, -147,  220, -320,  455, -635,  878,-1209, 1676,-2382, 3596,-6309,19660,18804,-6191, 3538,-2343, 1646,-1185,  860, -621,  444, -313,  215, -145,   94,  -60,   49,   10,\n   10,   48,  -61,   95, -147,  220, -319,  454, -634,  877,-1207, 1674,-2379, 3591,-6299,19583,18882,-6202, 3544,-2347, 1649,-1188,  861, -623,  445, -313,  216, -145,   94,  -60,   49,   10,\n   10,   48,  -61,   95, -147,  219, -319,  453, -633,  875,-1205, 1671,-2376, 3586,-6289,19505,18961,-6214, 3549,-2351, 1652,-1190,  863, -624,  446, -314,  216, -145,   94,  -60,   49,   10,\n   10,   48,  -61,   95, -147,  219, -318,  452, -632,  873,-1203, 1669,-2373, 3581,-6279,19428,19039,-6225, 3555,-2355, 1655,-1192,  865, -625,  447, -315,  217, -145,   94,  -61,   49,   10,\n   10,   48,  -61,   95, -146,  219, -318,  451, -631,  872,-1201, 1666,-2369, 3576,-6269,19350,19117,-6237, 3561,-2359, 1658,-1195,  867, -627,  448, -316,  217, -146,   95,  -61,   49,   10,\n   10,   49,  -61,   95, -146,  218, -317,  450, -629,  870,-1199, 1664,-2366, 3571,-6258,19273,19195,-6248, 3566,-2362, 1661,-1197,  868, -628,  449, -316,  218, -146,   95,  -61,   49,   10,\n   10,   49,  -61,   95, -146,  218, -316,  449, -628,  868,-1197, 1661,-2362, 3566,-6248,19195,19273,-6258, 3571,-2366, 1664,-1199,  870, -629,  450, -317,  218, -146,   95,  -61,   49,   10,\n   10,   49,  -61,   95, -146,  217, -316,  448, -627,  867,-1195, 1658,-2359, 3561,-6237,19117,19350,-6269, 3576,-2369, 1666,-1201,  872, -631,  451, -318,  219, -146,   95,  -61,   48,   10,\n   10,   49,  -61,   94, -145,  217, -315,  447, -625,  865,-1192, 1655,-2355, 3555,-6225,19039,19428,-6279, 3581,-2373, 1669,-1203,  873, -632,  452, -318,  219, -147,   95,  -61,   48,   10,\n   10,   49,  -60,   94, -145,  216, -314,  446, -624,  863,-1190, 1652,-2351, 3549,-6214,18961,19505,-6289, 3586,-2376, 1671,-1205,  875, -633,  453, -319,  219, -147,   95,  -61,   48,   10,\n   10,   49,  -60,   94, -145,  216, -313,  445, -623,  861,-1188, 1649,-2347, 3544,-6202,18882,19583,-6299, 3591,-2379, 1674,-1207,  877, -634,  454, -319,  220, -147,   95,  -61,   48,   10,\n   10,   49,  -60,   94, -145,  215, -313,  444, -621,  860,-1185, 1646,-2343, 3538,-6191,18804,19660,-6309, 3596,-2382, 1676,-1209,  878, -635,  455, -320,  220, -147,   96,  -61,   48,   11,\n   10,   49,  -60,   94, -144,  215, -312,  443, -620,  858,-1183, 1643,-2339, 3532,-6179,18725,19737,-6319, 3600,-2385, 1679,-1211,  880, -636,  456, -321,  221, -148,   96,  -61,   48,   11,\n   10,   49,  -60,   94, -144,  214, -311,  442, -618,  856,-1181, 1640,-2335, 3526,-6166,18646,19814,-6328, 3604,-2388, 1681,-1213,  881, -638,  456, -321,  221, -148,   96,  -61,   48,   11,\n    9,   49,  -60,   94, -144,  214, -311,  441, -617,  854,-1178, 1637,-2330, 3519,-6154,18567,19890,-6337, 3609,-2391, 1683,-1214,  882, -639,  457, -322,  221, -148,   96,  -61,   48,   11,\n    9,   49,  -60,   93, -143,  214, -310,  440, -616,  852,-1176, 1634,-2326, 3513,-6141,18488,19967,-6346, 3613,-2394, 1685,-1216,  884, -640,  458, -322,  222, -148,   96,  -61,   48,   11,\n    9,   49,  -60,   93, -143,  213, -309,  439, -614,  850,-1173, 1630,-2322, 3506,-6128,18409,20043,-6354, 3617,-2397, 1687,-1218,  885, -641,  459, -323,  222, -149,   96,  -61,   48,   11,\n    9,   49,  -60,   93, -143,  212, -308,  438, -612,  848,-1170, 1627,-2317, 3500,-6115,18330,20120,-6363, 3621,-2399, 1689,-1220,  886, -642,  460, -323,  222, -149,   96,  -61,   48,   11,\n    9,   49,  -60,   93, -142,  212, -307,  437, -611,  846,-1168, 1623,-2313, 3493,-6102,18251,20196,-6371, 3624,-2402, 1691,-1221,  888, -643,  460, -324,  223, -149,   96,  -61,   48,   11,\n    9,   49,  -60,   93, -142,  211, -307,  436, -609,  844,-1165, 1620,-2308, 3486,-6089,18171,20272,-6379, 3628,-2404, 1693,-1223,  889, -644,  461, -324,  223, -149,   96,  -61,   47,   11,\n    9,   49,  -60,   93, -142,  211, -306,  434, -608,  842,-1162, 1616,-2303, 3479,-6075,18092,20347,-6386, 3631,-2407, 1695,-1224,  890, -645,  462, -325,  223, -149,   96,  -61,   47,   11,\n    9,   50,  -60,   92, -141,  210, -305,  433, -606,  840,-1160, 1613,-2298, 3472,-6061,18012,20423,-6394, 3635,-2409, 1697,-1226,  891, -646,  462, -325,  224, -149,   96,  -61,   47,   11,\n    9,   50,  -60,   92, -141,  210, -304,  432, -605,  838,-1157, 1609,-2293, 3464,-6047,17932,20499,-6401, 3638,-2411, 1699,-1227,  893, -647,  463, -326,  224, -150,   97,  -61,   47,   11,\n    9,   50,  -60,   92, -141,  209, -303,  431, -603,  835,-1154, 1605,-2288, 3457,-6033,17852,20574,-6408, 3641,-2413, 1700,-1228,  894, -647,  464, -326,  224, -150,   97,  -61,   47,   12,\n    9,   50,  -59,   92, -140,  209, -302,  430, -601,  833,-1151, 1602,-2283, 3450,-6018,17772,20649,-6415, 3644,-2415, 1702,-1230,  895, -648,  464, -327,  225, -150,   97,  -61,   47,   12,\n    9,   50,  -59,   92, -140,  208, -302,  428, -600,  831,-1148, 1598,-2278, 3442,-6004,17692,20724,-6421, 3646,-2417, 1704,-1231,  896, -649,  465, -327,  225, -150,   97,  -61,   47,   12,\n    9,   50,  -59,   91, -140,  208, -301,  427, -598,  829,-1145, 1594,-2273, 3434,-5989,17612,20799,-6428, 3649,-2419, 1705,-1232,  897, -650,  466, -328,  225, -150,   97,  -61,   47,   12,\n    9,   50,  -59,   91, -139,  207, -300,  426, -596,  826,-1142, 1590,-2267, 3426,-5974,17532,20873,-6434, 3651,-2421, 1706,-1234,  898, -651,  466, -328,  226, -150,   97,  -61,   47,   12,\n    8,   50,  -59,   91, -139,  206, -299,  425, -594,  824,-1139, 1586,-2262, 3418,-5959,17451,20948,-6440, 3654,-2422, 1708,-1235,  899, -652,  467, -329,  226, -151,   97,  -61,   47,   12,\n    8,   50,  -59,   91, -139,  206, -298,  423, -593,  822,-1136, 1582,-2257, 3410,-5943,17371,21022,-6445, 3656,-2424, 1709,-1236,  900, -652,  467, -329,  226, -151,   97,  -61,   47,   12,\n    8,   50,  -59,   91, -138,  205, -297,  422, -591,  819,-1133, 1578,-2251, 3402,-5928,17290,21096,-6451, 3658,-2425, 1710,-1237,  901, -653,  468, -329,  226, -151,   97,  -61,   46,   12,\n    8,   50,  -59,   90, -138,  205, -296,  421, -589,  817,-1130, 1573,-2245, 3394,-5912,17210,21170,-6456, 3660,-2427, 1711,-1238,  901, -654,  468, -330,  227, -151,   97,  -61,   46,   12,\n    8,   50,  -59,   90, -137,  204, -295,  419, -587,  814,-1126, 1569,-2240, 3385,-5896,17129,21244,-6461, 3662,-2428, 1713,-1239,  902, -654,  469, -330,  227, -151,   97,  -61,   46,   12,\n    8,   50,  -59,   90, -137,  203, -294,  418, -585,  812,-1123, 1565,-2234, 3377,-5880,17048,21317,-6466, 3663,-2429, 1714,-1240,  903, -655,  469, -330,  227, -151,   97,  -61,   46,   12,\n    8,   50,  -59,   90, -137,  203, -293,  417, -583,  809,-1120, 1561,-2228, 3368,-5863,16967,21391,-6470, 3665,-2430, 1715,-1241,  904, -656,  470, -331,  227, -151,   97,  -61,   46,   12,\n    8,   50,  -58,   90, -136,  202, -292,  415, -582,  807,-1116, 1556,-2222, 3359,-5847,16886,21464,-6474, 3666,-2431, 1715,-1241,  905, -656,  470, -331,  227, -151,   97,  -61,   46,   13,\n    8,   50,  -58,   89, -136,  201, -291,  414, -580,  804,-1113, 1552,-2216, 3350,-5830,16805,21537,-6478, 3667,-2432, 1716,-1242,  905, -657,  471, -331,  228, -152,   97,  -61,   46,   13,\n    8,   50,  -58,   89, -136,  201, -290,  413, -578,  802,-1110, 1547,-2210, 3341,-5813,16724,21610,-6482, 3669,-2433, 1717,-1243,  906, -657,  471, -332,  228, -152,   97,  -61,   46,   13,\n    8,   50,  -58,   89, -135,  200, -289,  411, -576,  799,-1106, 1543,-2204, 3332,-5796,16642,21683,-6485, 3669,-2434, 1718,-1244,  906, -658,  472, -332,  228, -152,   97,  -61,   46,   13,\n    8,   50,  -58,   89, -135,  199, -288,  410, -574,  796,-1103, 1538,-2197, 3323,-5779,16561,21755,-6489, 3670,-2434, 1718,-1244,  907, -658,  472, -332,  228, -152,   97,  -61,   46,   13,\n    8,   50,  -58,   88, -134,  199, -287,  408, -572,  794,-1099, 1533,-2191, 3313,-5761,16480,21827,-6492, 3671,-2435, 1719,-1245,  908, -659,  472, -333,  228, -152,   97,  -61,   45,   13,\n    8,   50,  -58,   88, -134,  198, -286,  407, -570,  791,-1096, 1529,-2184, 3304,-5744,16398,21899,-6494, 3671,-2435, 1719,-1245,  908, -659,  473, -333,  228, -152,   97,  -61,   45,   13,\n    8,   50,  -58,   88, -133,  197, -285,  405, -568,  788,-1092, 1524,-2178, 3294,-5726,16317,21971,-6497, 3672,-2435, 1720,-1246,  909, -660,  473, -333,  229, -152,   97,  -61,   45,   13,\n    7,   50,  -58,   88, -133,  197, -284,  404, -566,  786,-1088, 1519,-2171, 3284,-5708,16235,22043,-6499, 3672,-2436, 1720,-1246,  909, -660,  473, -333,  229, -152,   97,  -61,   45,   13,\n    7,   50,  -57,   87, -133,  196, -283,  402, -564,  783,-1085, 1514,-2165, 3275,-5690,16153,22114,-6501, 3672,-2436, 1721,-1247,  909, -661,  474, -333,  229, -152,   97,  -61,   45,   13,\n    7,   50,  -57,   87, -132,  195, -282,  401, -562,  780,-1081, 1509,-2158, 3265,-5671,16071,22186,-6503, 3672,-2436, 1721,-1247,  910, -661,  474, -334,  229, -152,   97,  -61,   45,   13,\n    7,   51,  -57,   87, -132,  195, -281,  399, -559,  777,-1077, 1504,-2151, 3255,-5653,15989,22257,-6504, 3672,-2436, 1721,-1247,  910, -661,  474, -334,  229, -152,   97,  -61,   45,   14,\n    7,   51,  -57,   87, -131,  194, -280,  398, -557,  774,-1073, 1499,-2144, 3244,-5634,15908,22328,-6506, 3672,-2436, 1721,-1248,  911, -661,  475, -334,  229, -152,   97,  -61,   45,   14,\n    7,   51,  -57,   86, -131,  193, -279,  396, -555,  771,-1070, 1494,-2137, 3234,-5616,15826,22398,-6507, 3671,-2435, 1721,-1248,  911, -662,  475, -334,  229, -152,   97,  -61,   45,   14,\n    7,   51,  -57,   86, -130,  192, -278,  395, -553,  768,-1066, 1489,-2130, 3224,-5597,15744,22469,-6507, 3670,-2435, 1721,-1248,  911, -662,  475, -334,  229, -152,   97,  -61,   44,   14,\n    7,   51,  -57,   86, -130,  192, -277,  393, -551,  766,-1062, 1484,-2123, 3213,-5577,15661,22539,-6508, 3670,-2435, 1721,-1248,  911, -662,  475, -334,  229, -152,   97,  -60,   44,   14,\n    7,   51,  -57,   86, -129,  191, -276,  391, -549,  763,-1058, 1479,-2116, 3203,-5558,15579,22609,-6508, 3669,-2434, 1721,-1248,  911, -662,  475, -335,  230, -152,   97,  -60,   44,   14,\n    7,   51,  -56,   85, -129,  190, -275,  390, -546,  760,-1054, 1473,-2109, 3192,-5539,15497,22679,-6508, 3668,-2433, 1721,-1248,  912, -663,  476, -335,  230, -152,   97,  -60,   44,   14,\n    7,   51,  -56,   85, -128,  189, -273,  388, -544,  757,-1050, 1468,-2102, 3181,-5519,15415,22749,-6508, 3667,-2433, 1720,-1248,  912, -663,  476, -335,  230, -152,   97,  -60,   44,   14,\n    7,   51,  -56,   85, -128,  189, -272,  387, -542,  754,-1046, 1463,-2094, 3170,-5499,15332,22818,-6508, 3665,-2432, 1720,-1248,  912, -663,  476, -335,  230, -152,   97,  -60,   44,   14,\n    7,   51,  -56,   85, -128,  188, -271,  385, -540,  750,-1042, 1457,-2087, 3159,-5479,15250,22887,-6507, 3664,-2431, 1719,-1248,  912, -663,  476, -335,  230, -152,   97,  -60,   44,   14,\n    7,   51,  -56,   84, -127,  187, -270,  383, -537,  747,-1038, 1452,-2079, 3148,-5459,15168,22956,-6506, 3662,-2430, 1719,-1248,  912, -663,  476, -335,  230, -152,   97,  -60,   44,   14,\n    7,   51,  -56,   84, -127,  186, -269,  382, -535,  744,-1034, 1446,-2072, 3137,-5439,15085,23025,-6505, 3660,-2429, 1718,-1247,  912, -663,  476, -335,  230, -152,   97,  -60,   43,   15,\n    7,   51,  -56,   84, -126,  186, -268,  380, -533,  741,-1029, 1440,-2064, 3126,-5418,15003,23094,-6503, 3658,-2428, 1718,-1247,  912, -663,  476, -335,  230, -152,   97,  -60,   43,   15,\n    6,   51,  -55,   83, -126,  185, -266,  378, -530,  738,-1025, 1435,-2056, 3114,-5398,14920,23162,-6501, 3656,-2426, 1717,-1247,  912, -663,  476, -335,  230, -152,   97,  -60,   43,   15,\n    6,   51,  -55,   83, -125,  184, -265,  377, -528,  735,-1021, 1429,-2048, 3103,-5377,14838,23230,-6499, 3654,-2425, 1716,-1247,  911, -663,  476, -335,  230, -152,   97,  -60,   43,   15,\n    6,   51,  -55,   83, -125,  183, -264,  375, -526,  732,-1017, 1423,-2041, 3091,-5356,14755,23298,-6497, 3652,-2424, 1715,-1246,  911, -663,  476, -335,  230, -152,   97,  -60,   43,   15,\n    6,   51,  -55,   83, -124,  182, -263,  373, -523,  728,-1012, 1418,-2033, 3080,-5335,14672,23365,-6494, 3649,-2422, 1715,-1246,  911, -663,  476, -335,  230, -152,   97,  -60,   43,   15,\n    6,   51,  -55,   82, -124,  182, -262,  371, -521,  725,-1008, 1412,-2025, 3068,-5314,14590,23433,-6492, 3647,-2420, 1714,-1245,  911, -663,  476, -335,  230, -152,   97,  -60,   43,   15,\n    6,   51,  -55,   82, -123,  181, -260,  370, -518,  722,-1003, 1406,-2017, 3056,-5292,14507,23500,-6489, 3644,-2419, 1713,-1245,  910, -663,  476, -335,  230, -152,   97,  -60,   42,   15,\n    6,   51,  -55,   82, -123,  180, -259,  368, -516,  718, -999, 1400,-2008, 3044,-5271,14424,23567,-6485, 3641,-2417, 1711,-1244,  910, -663,  476, -335,  230, -152,   97,  -59,   42,   15,\n    6,   51,  -54,   81, -122,  179, -258,  366, -513,  715, -995, 1394,-2000, 3032,-5249,14341,23634,-6482, 3638,-2415, 1710,-1243,  910, -662,  476, -335,  230, -152,   97,  -59,   42,   15,\n    6,   51,  -54,   81, -121,  178, -257,  364, -511,  712, -990, 1388,-1992, 3020,-5227,14258,23700,-6478, 3635,-2413, 1709,-1243,  909, -662,  476, -335,  230, -152,   97,  -59,   42,   15,\n    6,   51,  -54,   81, -121,  177, -255,  362, -509,  708, -986, 1382,-1984, 3007,-5205,14176,23767,-6474, 3631,-2411, 1708,-1242,  909, -662,  476, -335,  229, -152,   96,  -59,   42,   16,\n    6,   51,  -54,   80, -120,  177, -254,  361, -506,  705, -981, 1376,-1975, 2995,-5183,14093,23833,-6469, 3628,-2408, 1706,-1241,  908, -662,  475, -335,  229, -152,   96,  -59,   42,   16,\n    6,   51,  -54,   80, -120,  176, -253,  359, -503,  702, -976, 1370,-1967, 2982,-5161,14010,23898,-6465, 3624,-2406, 1705,-1240,  908, -661,  475, -335,  229, -152,   96,  -59,   42,   16,\n    6,   51,  -54,   80, -119,  175, -252,  357, -501,  698, -972, 1363,-1958, 2970,-5138,13927,23964,-6460, 3620,-2403, 1703,-1239,  907, -661,  475, -335,  229, -152,   96,  -59,   41,   16,\n    6,   51,  -53,   80, -119,  174, -250,  355, -498,  695, -967, 1357,-1950, 2957,-5116,13844,24029,-6455, 3616,-2401, 1702,-1238,  907, -661,  475, -334,  229, -152,   96,  -59,   41,   16,\n    6,   51,  -53,   79, -118,  173, -249,  353, -496,  691, -962, 1351,-1941, 2944,-5093,13761,24094,-6449, 3612,-2398, 1700,-1237,  906, -660,  475, -334,  229, -151,   96,  -59,   41,   16,\n    6,   51,  -53,   79, -118,  172, -248,  351, -493,  688, -958, 1345,-1932, 2932,-5070,13678,24159,-6443, 3608,-2396, 1698,-1236,  906, -660,  474, -334,  229, -151,   96,  -59,   41,   16,\n    6,   51,  -53,   79, -117,  171, -246,  350, -491,  684, -953, 1338,-1923, 2919,-5047,13595,24224,-6438, 3603,-2393, 1697,-1235,  905, -660,  474, -334,  229, -151,   96,  -59,   41,   16,\n    6,   51,  -53,   78, -117,  170, -245,  348, -488,  681, -948, 1332,-1915, 2906,-5024,13512,24288,-6431, 3599,-2390, 1695,-1234,  904, -659,  474, -334,  229, -151,   96,  -58,   41,   16,\n    5,   51,  -53,   78, -116,  170, -244,  346, -485,  677, -943, 1325,-1906, 2892,-5001,13429,24352,-6425, 3594,-2387, 1693,-1233,  903, -659,  474, -333,  228, -151,   95,  -58,   41,   16,\n    5,   51,  -52,   78, -115,  169, -242,  344, -483,  673, -939, 1319,-1897, 2879,-4977,13346,24416,-6418, 3589,-2384, 1691,-1231,  903, -658,  473, -333,  228, -151,   95,  -58,   40,   17,\n    5,   51,  -52,   77, -115,  168, -241,  342, -480,  670, -934, 1312,-1888, 2866,-4954,13263,24479,-6411, 3584,-2380, 1689,-1230,  902, -658,  473, -333,  228, -151,   95,  -58,   40,   17,\n    5,   51,  -52,   77, -114,  167, -240,  340, -477,  666, -929, 1306,-1879, 2853,-4930,13180,24543,-6404, 3579,-2377, 1687,-1229,  901, -657,  473, -333,  228, -151,   95,  -58,   40,   17,\n    5,   51,  -52,   77, -114,  166, -238,  338, -475,  662, -924, 1299,-1869, 2839,-4907,13097,24606,-6396, 3574,-2374, 1685,-1227,  900, -657,  472, -333,  228, -150,   95,  -58,   40,   17,\n    5,   51,  -52,   76, -113,  165, -237,  336, -472,  659, -919, 1292,-1860, 2825,-4883,13014,24669,-6388, 3568,-2370, 1682,-1226,  899, -656,  472, -332,  227, -150,   95,  -58,   40,   17,\n    5,   51,  -51,   76, -113,  164, -236,  334, -469,  655, -914, 1286,-1851, 2812,-4859,12931,24731,-6380, 3563,-2367, 1680,-1224,  898, -655,  471, -332,  227, -150,   95,  -58,   40,   17,\n    5,   51,  -51,   76, -112,  163, -234,  332, -466,  651, -909, 1279,-1842, 2798,-4834,12848,24793,-6372, 3557,-2363, 1678,-1223,  897, -655,  471, -332,  227, -150,   95,  -57,   39,   17,\n    5,   51,  -51,   75, -111,  162, -233,  330, -464,  648, -904, 1272,-1832, 2784,-4810,12764,24855,-6363, 3551,-2359, 1675,-1221,  896, -654,  471, -331,  227, -150,   94,  -57,   39,   17,\n    5,   51,  -51,   75, -111,  161, -232,  328, -461,  644, -899, 1265,-1823, 2770,-4786,12681,24917,-6354, 3545,-2355, 1673,-1220,  895, -653,  470, -331,  227, -149,   94,  -57,   39,   17,\n    5,   51,  -51,   74, -110,  160, -230,  326, -458,  640, -894, 1258,-1813, 2756,-4761,12598,24979,-6345, 3539,-2351, 1670,-1218,  894, -653,  470, -331,  226, -149,   94,  -57,   39,   17,\n    5,   51,  -51,   74, -110,  160, -229,  324, -455,  636, -889, 1251,-1804, 2742,-4736,12515,25040,-6335, 3532,-2347, 1667,-1216,  893, -652,  469, -330,  226, -149,   94,  -57,   39,   18,\n    5,   51,  -50,   74, -109,  159, -227,  322, -453,  632, -883, 1245,-1794, 2728,-4712,12432,25101,-6325, 3526,-2343, 1665,-1214,  892, -651,  469, -330,  226, -149,   94,  -57,   39,   18,\n    5,   51,  -50,   73, -108,  158, -226,  320, -450,  629, -878, 1238,-1785, 2714,-4687,12349,25162,-6315, 3519,-2339, 1662,-1213,  890, -650,  468, -330,  226, -149,   94,  -57,   38,   18,\n    5,   51,  -50,   73, -108,  157, -225,  318, -447,  625, -873, 1230,-1775, 2700,-4662,12266,25222,-6305, 3512,-2334, 1659,-1211,  889, -649,  467, -329,  225, -148,   93,  -57,   38,   18,\n    5,   51,  -50,   73, -107,  156, -223,  316, -444,  621, -868, 1223,-1765, 2685,-4637,12183,25282,-6294, 3505,-2330, 1656,-1209,  888, -649,  467, -329,  225, -148,   93,  -56,   38,   18,\n    5,   51,  -50,   72, -107,  155, -222,  314, -441,  617, -863, 1216,-1755, 2671,-4611,12100,25342,-6284, 3498,-2325, 1653,-1207,  887, -648,  466, -328,  225, -148,   93,  -56,   38,   18,\n    5,   51,  -49,   72, -106,  154, -220,  312, -438,  613, -857, 1209,-1745, 2656,-4586,12017,25402,-6272, 3491,-2320, 1650,-1205,  885, -647,  466, -328,  224, -148,   93,  -56,   38,   18,\n    5,   51,  -49,   72, -105,  153, -219,  310, -435,  609, -852, 1202,-1735, 2641,-4560,11934,25461,-6261, 3484,-2316, 1647,-1203,  884, -646,  465, -328,  224, -148,   93,  -56,   38,   18,\n    5,   51,  -49,   71, -105,  152, -217,  308, -433,  605, -847, 1195,-1725, 2627,-4535,11852,25520,-6249, 3476,-2311, 1643,-1200,  882, -645,  464, -327,  224, -147,   93,  -56,   37,   18,\n    4,   51,  -49,   71, -104,  151, -216,  306, -430,  601, -841, 1187,-1715, 2612,-4509,11769,25579,-6237, 3468,-2306, 1640,-1198,  881, -644,  464, -327,  223, -147,   92,  -56,   37,   19,\n    4,   51,  -49,   70, -104,  150, -214,  304, -427,  597, -836, 1180,-1705, 2597,-4483,11686,25637,-6225, 3461,-2301, 1637,-1196,  879, -643,  463, -326,  223, -147,   92,  -55,   37,   19,\n    4,   51,  -48,   70, -103,  149, -213,  302, -424,  593, -830, 1173,-1695, 2582,-4457,11603,25696,-6212, 3453,-2296, 1633,-1194,  878, -642,  462, -326,  223, -147,   92,  -55,   37,   19,\n    4,   50,  -48,   70, -102,  148, -211,  299, -421,  589, -825, 1165,-1685, 2567,-4431,11520,25754,-6200, 3444,-2290, 1630,-1191,  876, -641,  462, -325,  222, -146,   92,  -55,   37,   19,\n    4,   50,  -48,   69, -102,  147, -210,  297, -418,  585, -820, 1158,-1675, 2552,-4405,11437,25811,-6186, 3436,-2285, 1626,-1189,  875, -640,  461, -325,  222, -146,   92,  -55,   37,   19,\n    4,   50,  -48,   69, -101,  146, -209,  295, -415,  581, -814, 1151,-1664, 2537,-4379,11355,25869,-6173, 3428,-2280, 1623,-1187,  873, -639,  460, -324,  222, -146,   91,  -55,   36,   19,\n    4,   50,  -48,   69, -100,  145, -207,  293, -412,  577, -808, 1143,-1654, 2522,-4352,11272,25926,-6159, 3419,-2274, 1619,-1184,  871, -637,  459, -324,  221, -145,   91,  -55,   36,   19,\n    4,   50,  -47,   68, -100,  144, -206,  291, -409,  573, -803, 1136,-1644, 2506,-4326,11189,25983,-6145, 3410,-2268, 1615,-1182,  870, -636,  459, -323,  221, -145,   91,  -54,   36,   19,\n    4,   50,  -47,   68,  -99,  143, -204,  289, -406,  569, -797, 1128,-1633, 2491,-4299,11107,26039,-6131, 3401,-2263, 1611,-1179,  868, -635,  458, -323,  220, -145,   91,  -54,   36,   19,\n    4,   50,  -47,   67,  -98,  142, -203,  286, -403,  564, -792, 1120,-1623, 2476,-4273,11024,26095,-6117, 3392,-2257, 1608,-1176,  866, -634,  457, -322,  220, -145,   90,  -54,   36,   19,\n    4,   50,  -47,   67,  -98,  141, -201,  284, -400,  560, -786, 1113,-1612, 2460,-4246,10942,26151,-6102, 3383,-2251, 1604,-1174,  864, -633,  456, -321,  220, -144,   90,  -54,   35,   20,\n    4,   50,  -46,   67,  -97,  140, -199,  282, -397,  556, -781, 1105,-1602, 2444,-4219,10859,26207,-6087, 3374,-2245, 1600,-1171,  862, -631,  455, -321,  219, -144,   90,  -54,   35,   20,\n    4,   50,  -46,   66,  -96,  139, -198,  280, -394,  552, -775, 1098,-1591, 2429,-4192,10777,26262,-6071, 3364,-2239, 1596,-1168,  861, -630,  454, -320,  219, -144,   90,  -54,   35,   20,\n    4,   50,  -46,   66,  -96,  138, -196,  278, -391,  548, -769, 1090,-1580, 2413,-4165,10694,26317,-6056, 3355,-2232, 1591,-1165,  859, -629,  453, -319,  218, -143,   90,  -53,   35,   20,\n    4,   50,  -46,   65,  -95,  137, -195,  276, -388,  544, -763, 1082,-1570, 2397,-4138,10612,26372,-6040, 3345,-2226, 1587,-1162,  857, -627,  452, -319,  218, -143,   89,  -53,   35,   20,\n    4,   50,  -46,   65,  -95,  136, -193,  273, -384,  539, -758, 1074,-1559, 2381,-4111,10529,26427,-6024, 3335,-2220, 1583,-1160,  855, -626,  451, -318,  217, -143,   89,  -53,   35,   20,\n    4,   50,  -45,   65,  -94,  135, -192,  271, -381,  535, -752, 1067,-1548, 2365,-4083,10447,26481,-6007, 3325,-2213, 1578,-1157,  853, -625,  451, -317,  217, -142,   89,  -53,   34,   20,\n    4,   50,  -45,   64,  -93,  134, -190,  269, -378,  531, -746, 1059,-1537, 2349,-4056,10365,26535,-5990, 3315,-2207, 1574,-1154,  851, -623,  450, -317,  216, -142,   89,  -53,   34,   20,\n    4,   50,  -45,   64,  -93,  133, -189,  267, -375,  526, -740, 1051,-1526, 2333,-4028,10283,26588,-5973, 3304,-2200, 1570,-1150,  848, -622,  449, -316,  216, -142,   88,  -52,   34,   20,\n    4,   50,  -45,   63,  -92,  132, -187,  264, -372,  522, -735, 1043,-1515, 2317,-4001,10201,26642,-5956, 3294,-2193, 1565,-1147,  846, -620,  448, -315,  215, -141,   88,  -52,   34,   21,\n    4,   50,  -44,   63,  -91,  131, -186,  262, -369,  518, -729, 1035,-1504, 2301,-3973,10119,26695,-5938, 3283,-2186, 1560,-1144,  844, -619,  446, -315,  215, -141,   88,  -52,   34,   21,\n    4,   50,  -44,   63,  -91,  130, -184,  260, -366,  514, -723, 1027,-1493, 2285,-3945,10037,26747,-5920, 3272,-2179, 1556,-1141,  842, -617,  445, -314,  214, -141,   87,  -52,   33,   21,\n    4,   50,  -44,   62,  -90,  128, -182,  258, -362,  509, -717, 1019,-1482, 2269,-3917, 9955,26800,-5902, 3261,-2172, 1551,-1138,  840, -616,  444, -313,  214, -140,   87,  -52,   33,   21,\n    3,   50,  -44,   62,  -89,  127, -181,  255, -359,  505, -711, 1011,-1471, 2252,-3889, 9873,26852,-5883, 3250,-2165, 1546,-1134,  837, -614,  443, -312,  213, -140,   87,  -51,   33,   21,\n    3,   50,  -43,   61,  -88,  126, -179,  253, -356,  501, -705, 1003,-1460, 2236,-3861, 9791,26903,-5865, 3239,-2158, 1541,-1131,  835, -612,  442, -312,  213, -139,   87,  -51,   33,   21,\n    3,   50,  -43,   61,  -88,  125, -178,  251, -353,  496, -699,  995,-1449, 2219,-3833, 9709,26955,-5845, 3228,-2150, 1536,-1128,  833, -611,  441, -311,  212, -139,   86,  -51,   33,   21,\n    3,   50,  -43,   61,  -87,  124, -176,  248, -350,  492, -693,  987,-1437, 2203,-3805, 9627,27006,-5826, 3216,-2143, 1531,-1124,  830, -609,  440, -310,  212, -139,   86,  -51,   32,   21,\n    3,   50,  -43,   60,  -86,  123, -174,  246, -347,  487, -687,  979,-1426, 2186,-3777, 9546,27057,-5806, 3204,-2135, 1526,-1121,  828, -608,  439, -309,  211, -138,   86,  -51,   32,   21,\n    3,   50,  -43,   60,  -86,  122, -173,  244, -343,  483, -681,  970,-1415, 2170,-3748, 9464,27107,-5786, 3192,-2128, 1521,-1117,  825, -606,  437, -308,  210, -138,   85,  -50,   32,   22,\n    3,   50,  -42,   59,  -85,  121, -171,  242, -340,  478, -675,  962,-1403, 2153,-3720, 9383,27157,-5766, 3180,-2120, 1516,-1114,  823, -604,  436, -308,  210, -137,   85,  -50,   32,   22,\n    3,   49,  -42,   59,  -84,  120, -170,  239, -337,  474, -669,  954,-1392, 2136,-3691, 9301,27207,-5746, 3168,-2112, 1510,-1110,  820, -602,  435, -307,  209, -137,   85,  -50,   32,   22,\n    3,   49,  -42,   59,  -84,  119, -168,  237, -334,  470, -663,  946,-1380, 2119,-3663, 9220,27257,-5725, 3156,-2104, 1505,-1106,  818, -601,  434, -306,  209, -136,   85,  -50,   31,   22,\n    3,   49,  -42,   58,  -83,  118, -166,  235, -330,  465, -657,  938,-1369, 2102,-3634, 9139,27306,-5704, 3144,-2096, 1500,-1103,  815, -599,  433, -305,  208, -136,   84,  -49,   31,   22,\n    3,   49,  -41,   58,  -82,  117, -165,  232, -327,  461, -651,  929,-1357, 2085,-3605, 9058,27355,-5682, 3131,-2088, 1494,-1099,  813, -597,  431, -304,  207, -136,   84,  -49,   31,   22,\n    3,   49,  -41,   57,  -82,  116, -163,  230, -324,  456, -645,  921,-1346, 2068,-3576, 8977,27404,-5661, 3118,-2080, 1489,-1095,  810, -595,  430, -303,  207, -135,   84,  -49,   31,   22,\n    3,   49,  -41,   57,  -81,  114, -162,  228, -320,  452, -639,  913,-1334, 2051,-3548, 8896,27452,-5639, 3105,-2071, 1483,-1091,  807, -593,  429, -302,  206, -135,   83,  -49,   30,   22,\n    3,   49,  -41,   56,  -80,  113, -160,  225, -317,  447, -633,  904,-1323, 2034,-3519, 8815,27500,-5616, 3092,-2063, 1477,-1087,  805, -591,  427, -301,  206, -134,   83,  -48,   30,   22,\n    3,   49,  -40,   56,  -79,  112, -158,  223, -314,  443, -626,  896,-1311, 2017,-3490, 8734,27548,-5594, 3079,-2055, 1472,-1083,  802, -589,  426, -300,  205, -134,   83,  -48,   30,   23,\n    3,   49,  -40,   56,  -79,  111, -157,  221, -311,  438, -620,  887,-1299, 2000,-3460, 8653,27595,-5571, 3066,-2046, 1466,-1079,  799, -587,  425, -299,  204, -133,   82,  -48,   30,   23,\n    3,   49,  -40,   55,  -78,  110, -155,  218, -307,  433, -614,  879,-1288, 1983,-3431, 8572,27642,-5548, 3052,-2037, 1460,-1075,  796, -585,  423, -298,  204, -133,   82,  -48,   30,   23,\n    3,   49,  -40,   55,  -77,  109, -153,  216, -304,  429, -608,  871,-1276, 1966,-3402, 8492,27688,-5524, 3039,-2029, 1454,-1071,  793, -583,  422, -297,  203, -132,   82,  -48,   29,   23,\n    3,   49,  -39,   54,  -77,  108, -152,  213, -301,  424, -602,  862,-1264, 1948,-3373, 8411,27735,-5500, 3025,-2020, 1448,-1067,  790, -581,  420, -296,  202, -132,   81,  -47,   29,   23,\n    3,   49,  -39,   54,  -76,  107, -150,  211, -297,  420, -595,  854,-1252, 1931,-3343, 8331,27781,-5476, 3011,-2011, 1442,-1063,  787, -579,  419, -295,  201, -131,   81,  -47,   29,   23,\n    3,   49,  -39,   53,  -75,  106, -148,  209, -294,  415, -589,  845,-1240, 1913,-3314, 8251,27827,-5452, 2997,-2002, 1436,-1058,  784, -577,  417, -294,  201, -131,   81,  -47,   29,   23,\n    3,   49,  -39,   53,  -74,  105, -147,  206, -291,  411, -583,  836,-1228, 1896,-3285, 8171,27872,-5428, 2983,-1993, 1430,-1054,  781, -575,  416, -293,  200, -130,   80,  -47,   29,   23,\n    3,   49,  -38,   53,  -74,  103, -145,  204, -287,  406, -577,  828,-1217, 1878,-3255, 8090,27917,-5403, 2969,-1983, 1423,-1050,  778, -573,  414, -292,  199, -130,   80,  -46,   28,   23,\n    3,   49,  -38,   52,  -73,  102, -143,  201, -284,  401, -570,  819,-1205, 1861,-3226, 8010,27962,-5377, 2954,-1974, 1417,-1045,  775, -571,  413, -291,  199, -129,   80,  -46,   28,   24,\n    3,   49,  -38,   52,  -72,  101, -142,  199, -281,  397, -564,  811,-1193, 1843,-3196, 7931,28006,-5352, 2939,-1965, 1411,-1041,  772, -569,  411, -290,  198, -129,   79,  -46,   28,   24,\n    3,   48,  -38,   51,  -72,  100, -140,  197, -277,  392, -558,  802,-1181, 1826,-3166, 7851,28050,-5326, 2925,-1955, 1404,-1036,  769, -566,  410, -289,  197, -128,   79,  -46,   28,   24,\n    3,   48,  -37,   51,  -71,   99, -138,  194, -274,  387, -551,  793,-1169, 1808,-3137, 7771,28094,-5300, 2910,-1946, 1398,-1032,  766, -564,  408, -288,  196, -128,   78,  -45,   27,   24,\n    3,   48,  -37,   50,  -70,   98, -137,  192, -270,  383, -545,  785,-1156, 1790,-3107, 7691,28137,-5274, 2895,-1936, 1391,-1027,  763, -562,  407, -287,  195, -127,   78,  -45,   27,   24,\n    2,   48,  -37,   50,  -69,   97, -135,  189, -267,  378, -539,  776,-1144, 1773,-3077, 7612,28180,-5247, 2880,-1926, 1384,-1023,  759, -560,  405, -286,  195, -127,   78,  -45,   27,   24,\n    2,   48,  -37,   49,  -69,   96, -133,  187, -264,  373, -532,  767,-1132, 1755,-3047, 7533,28223,-5220, 2864,-1916, 1378,-1018,  756, -557,  404, -285,  194, -126,   77,  -44,   27,   24,\n    2,   48,  -36,   49,  -68,   94, -132,  185, -260,  369, -526,  759,-1120, 1737,-3017, 7453,28265,-5193, 2849,-1906, 1371,-1013,  753, -555,  402, -284,  193, -126,   77,  -44,   26,   24,\n    2,   48,  -36,   49,  -67,   93, -130,  182, -257,  364, -519,  750,-1108, 1719,-2987, 7374,28307,-5165, 2833,-1896, 1364,-1009,  750, -553,  400, -282,  192, -125,   77,  -44,   26,   25,\n    2,   48,  -36,   48,  -66,   92, -128,  180, -253,  359, -513,  741,-1096, 1701,-2957, 7295,28349,-5137, 2817,-1886, 1357,-1004,  746, -550,  399, -281,  191, -124,   76,  -44,   26,   25,\n    2,   48,  -35,   48,  -66,   91, -127,  177, -250,  355, -507,  732,-1083, 1683,-2927, 7216,28390,-5109, 2802,-1876, 1350, -999,  743, -548,  397, -280,  191, -124,   76,  -43,   26,   25,\n    2,   48,  -35,   47,  -65,   90, -125,  175, -246,  350, -500,  723,-1071, 1665,-2897, 7137,28431,-5081, 2785,-1866, 1343, -994,  739, -545,  395, -279,  190, -123,   75,  -43,   26,   25,\n    2,   48,  -35,   47,  -64,   89, -123,  172, -243,  345, -494,  715,-1059, 1647,-2867, 7059,28471,-5052, 2769,-1855, 1336, -989,  736, -543,  393, -278,  189, -123,   75,  -43,   25,   25,\n    2,   48,  -35,   46,  -64,   88, -121,  170, -240,  340, -487,  706,-1047, 1629,-2837, 6980,28512,-5023, 2753,-1845, 1329, -984,  732, -540,  392, -276,  188, -122,   75,  -42,   25,   25,\n    2,   48,  -34,   46,  -63,   86, -120,  167, -236,  336, -481,  697,-1034, 1611,-2806, 6902,28552,-4994, 2737,-1834, 1322, -979,  729, -538,  390, -275,  187, -122,   74,  -42,   25,   25,\n    2,   48,  -34,   45,  -62,   85, -118,  165, -233,  331, -474,  688,-1022, 1593,-2776, 6823,28591,-4964, 2720,-1824, 1315, -974,  725, -535,  388, -274,  186, -121,   74,  -42,   25,   25,\n    2,   48,  -34,   45,  -61,   84, -116,  163, -229,  326, -468,  679,-1010, 1575,-2746, 6745,28630,-4934, 2703,-1813, 1307, -969,  722, -533,  386, -273,  186, -120,   73,  -42,   24,   25,\n    2,   47,  -34,   44,  -61,   83, -115,  160, -226,  321, -461,  670, -997, 1557,-2715, 6667,28669,-4904, 2686,-1802, 1300, -964,  718, -530,  385, -271,  185, -120,   73,  -41,   24,   26,\n    2,   47,  -33,   44,  -60,   82, -113,  158, -222,  317, -455,  661, -985, 1538,-2685, 6589,28708,-4874, 2669,-1791, 1293, -959,  714, -528,  383, -270,  184, -119,   72,  -41,   24,   26,\n    2,   47,  -33,   44,  -59,   81, -111,  155, -219,  312, -448,  652, -972, 1520,-2655, 6511,28746,-4843, 2652,-1780, 1285, -953,  711, -525,  381, -269,  183, -118,   72,  -41,   24,   26,\n    2,   47,  -33,   43,  -58,   79, -109,  153, -215,  307, -442,  644, -960, 1502,-2624, 6434,28784,-4812, 2635,-1769, 1278, -948,  707, -522,  379, -268,  182, -118,   72,  -40,   23,   26,\n    2,   47,  -32,   43,  -58,   78, -108,  150, -212,  302, -435,  635, -947, 1484,-2594, 6356,28821,-4781, 2618,-1758, 1270, -943,  703, -520,  377, -266,  181, -117,   71,  -40,   23,   26,\n    2,   47,  -32,   42,  -57,   77, -106,  148, -208,  297, -429,  626, -935, 1465,-2563, 6279,28858,-4749, 2600,-1747, 1262, -937,  699, -517,  375, -265,  180, -117,   71,  -40,   23,   26,\n    2,   47,  -32,   42,  -56,   76, -104,  145, -205,  293, -422,  617, -922, 1447,-2533, 6202,28895,-4717, 2582,-1735, 1255, -932,  695, -514,  373, -264,  179, -116,   70,  -40,   23,   26,\n    2,   47,  -32,   41,  -55,   75, -103,  143, -202,  288, -415,  608, -910, 1429,-2502, 6124,28932,-4685, 2564,-1724, 1247, -926,  692, -512,  371, -262,  178, -115,   70,  -39,   22,   26,\n    2,   47,  -31,   41,  -55,   74, -101,  140, -198,  283, -409,  599, -897, 1410,-2472, 6047,28968,-4652, 2547,-1712, 1239, -921,  688, -509,  369, -261,  177, -115,   69,  -39,   22,   27,\n    2,   47,  -31,   40,  -54,   73,  -99,  138, -195,  278, -402,  590, -885, 1392,-2441, 5970,29003,-4620, 2528,-1701, 1231, -915,  684, -506,  368, -259,  176, -114,   69,  -39,   22,   27,\n    2,   47,  -31,   40,  -53,   71,  -97,  135, -191,  273, -396,  581, -872, 1373,-2410, 5894,29039,-4587, 2510,-1689, 1223, -910,  680, -503,  366, -258,  175, -113,   69,  -38,   22,   27,\n    2,   47,  -31,   39,  -52,   70,  -96,  133, -188,  269, -389,  572, -860, 1355,-2380, 5817,29074,-4553, 2492,-1677, 1215, -904,  676, -500,  364, -257,  174, -113,   68,  -38,   21,   27,\n    2,   47,  -30,   39,  -52,   69,  -94,  130, -184,  264, -382,  563, -847, 1336,-2349, 5741,29108,-4519, 2473,-1665, 1207, -899,  672, -498,  362, -255,  173, -112,   68,  -38,   21,   27,\n    2,   46,  -30,   38,  -51,   68,  -92,  128, -181,  259, -376,  553, -834, 1318,-2318, 5664,29142,-4485, 2455,-1654, 1199, -893,  668, -495,  359, -254,  172, -111,   67,  -37,   21,   27,\n    2,   46,  -30,   38,  -50,   67,  -90,  125, -177,  254, -369,  544, -822, 1299,-2288, 5588,29176,-4451, 2436,-1642, 1191, -887,  664, -492,  357, -252,  171, -111,   67,  -37,   21,   27,\n    2,   46,  -29,   38,  -49,   66,  -89,  123, -174,  249, -363,  535, -809, 1281,-2257, 5512,29210,-4417, 2417,-1629, 1182, -881,  660, -489,  355, -251,  170, -110,   66,  -37,   20,   27,\n    2,   46,  -29,   37,  -49,   64,  -87,  120, -170,  244, -356,  526, -796, 1262,-2226, 5436,29243,-4382, 2398,-1617, 1174, -875,  655, -486,  353, -249,  169, -109,   66,  -36,   20,   27,\n    2,   46,  -29,   37,  -48,   63,  -85,  118, -167,  240, -349,  517, -784, 1244,-2195, 5361,29276,-4347, 2379,-1605, 1166, -870,  651, -483,  351, -248,  168, -109,   65,  -36,   20,   28,\n    2,   46,  -29,   36,  -47,   62,  -84,  115, -163,  235, -343,  508, -771, 1225,-2165, 5285,29308,-4311, 2360,-1593, 1157, -864,  647, -480,  349, -247,  167, -108,   65,  -36,   20,   28,\n    2,   46,  -28,   36,  -46,   61,  -82,  113, -160,  230, -336,  499, -758, 1206,-2134, 5210,29340,-4276, 2340,-1580, 1149, -858,  643, -477,  347, -245,  166, -107,   64,  -35,   19,   28,\n    2,   46,  -28,   35,  -46,   60,  -80,  110, -156,  225, -329,  490, -745, 1188,-2103, 5134,29372,-4240, 2321,-1568, 1140, -852,  639, -474,  345, -244,  165, -106,   64,  -35,   19,   28,\n    2,   46,  -28,   35,  -45,   59,  -78,  108, -153,  220, -323,  481, -733, 1169,-2072, 5059,29403,-4203, 2301,-1555, 1132, -846,  634, -471,  343, -242,  164, -106,   63,  -35,   19,   28,\n    2,   46,  -27,   34,  -44,   57,  -77,  105, -149,  215, -316,  472, -720, 1150,-2041, 4984,29434,-4167, 2281,-1543, 1123, -840,  630, -468,  340, -240,  163, -105,   63,  -34,   19,   28,\n    2,   46,  -27,   34,  -43,   56,  -75,  103, -145,  210, -309,  462, -707, 1132,-2011, 4910,29465,-4130, 2261,-1530, 1114, -833,  626, -465,  338, -239,  162, -104,   62,  -34,   18,   28,\n    2,   46,  -27,   33,  -43,   55,  -73,  100, -142,  206, -303,  453, -694, 1113,-1980, 4835,29495,-4093, 2241,-1517, 1106, -827,  621, -462,  336, -237,  161, -103,   62,  -34,   18,   28,\n    2,   45,  -27,   33,  -42,   54,  -71,   98, -138,  201, -296,  444, -682, 1094,-1949, 4760,29525,-4055, 2221,-1504, 1097, -821,  617, -459,  334, -236,  160, -103,   61,  -33,   18,   29,\n    1,   45,  -26,   32,  -41,   53,  -70,   95, -135,  196, -289,  435, -669, 1076,-1918, 4686,29555,-4017, 2201,-1491, 1088, -815,  612, -455,  332, -234,  159, -102,   61,  -33,   18,   29,\n    1,   45,  -26,   32,  -40,   52,  -68,   93, -131,  191, -283,  426, -656, 1057,-1887, 4612,29584,-3979, 2180,-1478, 1079, -809,  608, -452,  329, -233,  158, -101,   60,  -33,   17,   29,\n    1,   45,  -26,   31,  -40,   50,  -66,   90, -128,  186, -276,  417, -643, 1038,-1856, 4538,29613,-3941, 2160,-1465, 1070, -802,  603, -449,  327, -231,  157, -100,   60,  -32,   17,   29,\n    1,   45,  -25,   31,  -39,   49,  -64,   88, -124,  181, -269,  407, -630, 1019,-1825, 4464,29641,-3902, 2139,-1452, 1061, -796,  599, -446,  325, -229,  156, -100,   59,  -32,   17,   29,\n    1,   45,  -25,   30,  -38,   48,  -63,   85, -121,  176, -263,  398, -618, 1001,-1795, 4391,29669,-3864, 2118,-1439, 1052, -790,  594, -443,  323, -228,  154,  -99,   59,  -32,   17,   29,\n    1,   45,  -25,   30,  -37,   47,  -61,   83, -117,  171, -256,  389, -605,  982,-1764, 4317,29697,-3824, 2097,-1425, 1043, -783,  590, -439,  320, -226,  153,  -98,   58,  -31,   16,   29,\n    1,   45,  -25,   30,  -37,   46,  -59,   80, -114,  167, -249,  380, -592,  963,-1733, 4244,29724,-3785, 2076,-1412, 1034, -777,  585, -436,  318, -225,  152,  -97,   58,  -31,   16,   29,\n    1,   45,  -24,   29,  -36,   45,  -58,   78, -110,  162, -243,  371, -579,  944,-1702, 4171,29751,-3745, 2055,-1398, 1024, -770,  581, -433,  316, -223,  151,  -97,   57,  -31,   16,   30,\n    1,   45,  -24,   29,  -35,   43,  -56,   75, -107,  157, -236,  362, -566,  926,-1671, 4098,29777,-3705, 2034,-1385, 1015, -764,  576, -429,  313, -221,  150,  -96,   57,  -30,   15,   30,\n    1,   45,  -24,   28,  -34,   42,  -54,   73, -103,  152, -229,  352, -553,  907,-1640, 4025,29803,-3665, 2012,-1371, 1006, -757,  571, -426,  311, -220,  149,  -95,   56,  -30,   15,   30,\n    1,   45,  -23,   28,  -33,   41,  -52,   70, -100,  147, -223,  343, -541,  888,-1609, 3952,29829,-3624, 1991,-1357,  996, -750,  566, -423,  308, -218,  148,  -94,   56,  -30,   15,   30,\n    1,   44,  -23,   27,  -33,   40,  -51,   68,  -96,  142, -216,  334, -528,  869,-1579, 3880,29855,-3583, 1969,-1343,  987, -744,  562, -419,  306, -216,  146,  -93,   55,  -29,   15,   30,\n    1,   44,  -23,   27,  -32,   39,  -49,   65,  -93,  137, -209,  325, -515,  850,-1548, 3808,29880,-3542, 1947,-1330,  977, -737,  557, -416,  304, -215,  145,  -93,   54,  -29,   14,   30,\n    1,   44,  -22,   26,  -31,   38,  -47,   63,  -89,  132, -202,  316, -502,  832,-1517, 3736,29904,-3501, 1925,-1316,  968, -730,  552, -412,  301, -213,  144,  -92,   54,  -28,   14,   30,\n    1,   44,  -22,   26,  -30,   36,  -45,   60,  -86,  128, -196,  306, -489,  813,-1486, 3664,29928,-3459, 1903,-1302,  958, -723,  547, -409,  299, -211,  143,  -91,   53,  -28,   14,   30,\n    1,   44,  -22,   25,  -30,   35,  -44,   58,  -82,  123, -189,  297, -476,  794,-1455, 3592,29952,-3417, 1881,-1288,  949, -717,  542, -405,  296, -209,  142,  -90,   53,  -28,   14,   30,\n    1,   44,  -22,   25,  -29,   34,  -42,   55,  -79,  118, -182,  288, -464,  775,-1425, 3521,29976,-3374, 1859,-1273,  939, -710,  538, -402,  294, -208,  140,  -89,   52,  -27,   13,   31,\n    1,   44,  -21,   24,  -28,   33,  -40,   53,  -75,  113, -176,  279, -451,  756,-1394, 3449,29999,-3332, 1836,-1259,  929, -703,  533, -398,  291, -206,  139,  -89,   52,  -27,   13,   31,\n    1,   44,  -21,   24,  -27,   32,  -39,   50,  -72,  108, -169,  270, -438,  737,-1363, 3378,30022,-3289, 1814,-1245,  919, -696,  528, -395,  289, -204,  138,  -88,   51,  -27,   13,   31,\n    1,   44,  -21,   23,  -27,   31,  -37,   48,  -68,  103, -162,  260, -425,  719,-1332, 3307,30044,-3246, 1791,-1230,  910, -689,  523, -391,  286, -202,  137,  -87,   51,  -26,   13,   31,\n    1,   44,  -20,   23,  -26,   29,  -35,   45,  -65,   98, -156,  251, -412,  700,-1302, 3236,30066,-3202, 1769,-1216,  900, -682,  518, -388,  284, -201,  135,  -86,   50,  -26,   12,   31,\n    1,   43,  -20,   22,  -25,   28,  -33,   43,  -61,   94, -149,  242, -399,  681,-1271, 3166,30088,-3158, 1746,-1201,  890, -675,  513, -384,  281, -199,  134,  -85,   49,  -26,   12,   31,\n    1,   43,  -20,   22,  -24,   27,  -32,   40,  -58,   89, -142,  233, -386,  662,-1240, 3095,30109,-3114, 1723,-1187,  880, -668,  508, -381,  279, -197,  133,  -84,   49,  -25,   12,   31,\n    1,   43,  -20,   21,  -24,   26,  -30,   38,  -54,   84, -136,  224, -374,  643,-1209, 3025,30130,-3070, 1700,-1172,  870, -661,  503, -377,  276, -195,  132,  -83,   48,  -25,   11,   31,\n    1,   43,  -19,   21,  -23,   25,  -28,   36,  -51,   79, -129,  214, -361,  625,-1179, 2955,30150,-3025, 1676,-1158,  860, -654,  497, -373,  273, -193,  130,  -83,   48,  -24,   11,   32,\n    1,   43,  -19,   21,  -22,   24,  -26,   33,  -47,   74, -122,  205, -348,  606,-1148, 2885,30170,-2981, 1653,-1143,  850, -647,  492, -370,  271, -191,  129,  -82,   47,  -24,   11,   32,\n    1,   43,  -19,   20,  -21,   22,  -25,   31,  -44,   69, -116,  196, -335,  587,-1118, 2816,30190,-2935, 1630,-1128,  839, -639,  487, -366,  268, -190,  128,  -81,   47,  -24,   11,   32,\n    1,   43,  -18,   20,  -21,   21,  -23,   28,  -40,   64, -109,  187, -322,  568,-1087, 2746,30209,-2890, 1606,-1113,  829, -632,  482, -362,  266, -188,  127,  -80,   46,  -23,   10,   32,\n    1,   43,  -18,   19,  -20,   20,  -21,   26,  -37,   60, -102,  178, -309,  550,-1057, 2677,30228,-2844, 1583,-1098,  819, -625,  477, -359,  263, -186,  125,  -79,   45,  -23,   10,   32,\n    1,   43,  -18,   19,  -19,   19,  -20,   23,  -33,   55,  -96,  169, -296,  531,-1026, 2608,30246,-2798, 1559,-1083,  809, -618,  472, -355,  260, -184,  124,  -78,   45,  -22,   10,   32,\n    1,   43,  -17,   18,  -18,   18,  -18,   21,  -30,   50,  -89,  159, -284,  512, -996, 2539,30264,-2752, 1535,-1068,  798, -610,  466, -351,  258, -182,  123,  -77,   44,  -22,    9,   32,\n    1,   42,  -17,   18,  -18,   17,  -16,   18,  -26,   45,  -82,  150, -271,  493, -965, 2471,30282,-2705, 1511,-1053,  788, -603,  461, -347,  255, -180,  121,  -76,   44,  -22,    9,   32,\n    1,   42,  -17,   17,  -17,   16,  -14,   16,  -23,   40,  -76,  141, -258,  475, -935, 2402,30300,-2659, 1487,-1037,  777, -596,  456, -343,  252, -178,  120,  -76,   43,  -21,    9,   33,\n    1,   42,  -17,   17,  -16,   14,  -13,   13,  -19,   35,  -69,  132, -245,  456, -904, 2334,30317,-2612, 1463,-1022,  767, -588,  450, -340,  249, -176,  119,  -75,   42,  -21,    9,   33,\n    1,   42,  -16,   16,  -15,   13,  -11,   11,  -16,   31,  -62,  123, -232,  437, -874, 2266,30333,-2564, 1438,-1007,  756, -581,  445, -336,  247, -175,  117,  -74,   42,  -20,    8,   33,\n    1,   42,  -16,   16,  -15,   12,   -9,    8,  -12,   26,  -56,  114, -220,  419, -844, 2198,30349,-2516, 1414, -991,  746, -573,  440, -332,  244, -173,  116,  -73,   41,  -20,    8,   33,\n    1,   42,  -16,   15,  -14,   11,   -8,    6,   -9,   21,  -49,  105, -207,  400, -813, 2131,30365,-2469, 1389, -976,  735, -566,  434, -328,  241, -171,  115,  -72,   41,  -20,    8,   33,\n    1,   42,  -15,   15,  -13,   10,   -6,    4,   -5,   16,  -43,   95, -194,  381, -783, 2063,30380,-2420, 1365, -960,  724, -558,  429, -324,  238, -169,  113,  -71,   40,  -19,    7,   33,\n    1,   42,  -15,   14,  -12,    9,   -4,    1,   -2,   11,  -36,   86, -181,  363, -753, 1996,30395,-2372, 1340, -944,  714, -551,  424, -320,  236, -167,  112,  -70,   39,  -19,    7,   33,\n    1,   42,  -15,   14,  -12,    8,   -3,   -1,    1,    7,  -29,   77, -169,  344, -723, 1929,30410,-2323, 1315, -929,  703, -543,  418, -316,  233, -165,  111,  -69,   39,  -18,    7,   33,\n    1,   42,  -14,   13,  -11,    6,   -1,   -4,    5,    2,  -23,   68, -156,  325, -692, 1862,30424,-2274, 1290, -913,  692, -535,  413, -312,  230, -163,  109,  -68,   38,  -18,    7,   33,\n    1,   41,  -14,   13,  -10,    5,    1,   -6,    8,   -3,  -16,   59, -143,  307, -662, 1796,30438,-2225, 1265, -897,  681, -528,  407, -309,  227, -161,  108,  -67,   38,  -18,    6,   34,\n    1,   41,  -14,   13,   -9,    4,    2,   -9,   12,   -8,  -10,   50, -130,  288, -632, 1730,30452,-2175, 1240, -881,  671, -520,  402, -305,  224, -159,  107,  -66,   37,  -17,    6,   34,\n    1,   41,  -14,   12,   -9,    3,    4,  -11,   15,  -12,   -3,   41, -118,  270, -602, 1663,30465,-2125, 1215, -865,  660, -512,  396, -301,  222, -157,  105,  -65,   36,  -17,    6,   34,\n    1,   41,  -13,   12,   -8,    2,    6,  -14,   19,  -17,    3,   32, -105,  251, -572, 1598,30477,-2075, 1190, -849,  649, -504,  390, -297,  219, -155,  104,  -64,   36,  -16,    5,   34,\n    1,   41,  -13,   11,   -7,    1,    8,  -16,   22,  -22,   10,   23,  -92,  233, -542, 1532,30490,-2025, 1164, -833,  638, -497,  385, -293,  216, -153,  102,  -63,   35,  -16,    5,   34,\n    1,   41,  -13,   11,   -6,    0,    9,  -18,   25,  -27,   17,   14,  -80,  214, -512, 1466,30501,-1974, 1139, -817,  627, -489,  379, -288,  213, -151,  101,  -63,   34,  -16,    5,   34,\n    1,   41,  -12,   10,   -6,   -2,   11,  -21,   29,  -31,   23,    5,  -67,  196, -482, 1401,30513,-1923, 1113, -801,  616, -481,  374, -284,  210, -149,  100,  -62,   34,  -15,    5,   34,\n    1,   41,  -12,   10,   -5,   -3,   13,  -23,   32,  -36,   30,   -4,  -54,  177, -453, 1336,30524,-1872, 1087, -785,  604, -473,  368, -280,  207, -147,   98,  -61,   33,  -15,    4,   34,\n    1,   41,  -12,    9,   -4,   -4,   14,  -26,   36,  -41,   36,  -13,  -42,  159, -423, 1271,30535,-1821, 1061, -769,  593, -465,  362, -276,  204, -145,   97,  -60,   32,  -14,    4,   35,\n    1,   40,  -11,    9,   -4,   -5,   16,  -28,   39,  -46,   43,  -22,  -29,  140, -393, 1207,30545,-1769, 1036, -752,  582, -457,  356, -272,  201, -143,   95,  -59,   32,  -14,    4,   35,\n    1,   40,  -11,    8,   -3,   -6,   17,  -30,   42,  -50,   49,  -31,  -17,  122, -364, 1142,30555,-1717, 1010, -736,  571, -449,  351, -268,  198, -140,   94,  -58,   31,  -14,    3,   35,\n    1,   40,  -11,    8,   -2,   -7,   19,  -33,   46,  -55,   56,  -40,   -4,  104, -334, 1078,30564,-1665,  983, -720,  560, -441,  345, -264,  195, -138,   92,  -57,   31,  -13,    3,   35,\n    1,   40,  -11,    7,   -1,   -8,   21,  -35,   49,  -60,   62,  -49,    8,   85, -304, 1014,30573,-1612,  957, -703,  548, -433,  339, -260,  192, -136,   91,  -56,   30,  -13,    3,   35,\n    1,   40,  -10,    7,   -1,   -9,   22,  -37,   52,  -64,   69,  -58,   21,   67, -275,  951,30582,-1559,  931, -686,  537, -425,  333, -256,  189, -134,   89,  -55,   29,  -12,    3,   35,\n    1,   40,  -10,    6,    0,  -10,   24,  -40,   56,  -69,   75,  -67,   33,   49, -245,  887,30590,-1506,  905, -670,  526, -417,  328, -251,  186, -132,   88,  -54,   29,  -12,    2,   35,\n    1,   40,  -10,    6,    1,  -12,   26,  -42,   59,  -74,   81,  -76,   46,   30, -216,  824,30598,-1453,  878, -653,  514, -409,  322, -247,  183, -130,   87,  -53,   28,  -11,    2,   35,\n    1,   40,   -9,    6,    2,  -13,   27,  -45,   63,  -78,   88,  -85,   58,   12, -187,  761,30606,-1399,  852, -637,  503, -401,  316, -243,  180, -128,   85,  -52,   27,  -11,    2,   35,\n    1,   40,   -9,    5,    2,  -14,   29,  -47,   66,  -83,   94,  -94,   71,   -6, -157,  698,30613,-1345,  825, -620,  491, -393,  310, -239,  177, -126,   84,  -51,   27,  -11,    1,   36,\n    1,   40,   -9,    5,    3,  -15,   31,  -49,   69,  -88,  101, -102,   83,  -24, -128,  636,30620,-1291,  798, -603,  480, -385,  304, -235,  174, -124,   82,  -50,   26,  -10,    1,   36,\n    1,   39,   -8,    4,    4,  -16,   32,  -52,   73,  -92,  107, -111,   96,  -42,  -99,  574,30626,-1237,  771, -586,  468, -376,  298, -230,  171, -121,   81,  -49,   25,  -10,    1,   36,\n    1,   39,   -8,    4,    4,  -17,   34,  -54,   76,  -97,  113, -120,  108,  -60,  -70,  512,30632,-1182,  744, -569,  457, -368,  292, -226,  168, -119,   79,  -48,   25,   -9,    1,   36,\n    1,   39,   -8,    3,    5,  -18,   36,  -56,   79, -102,  120, -129,  121,  -78,  -41,  450,30638,-1127,  717, -552,  445, -360,  286, -222,  165, -117,   78,  -47,   24,   -9,    0,   36,\n    1,   39,   -8,    3,    6,  -19,   37,  -59,   82, -106,  126, -138,  133,  -96,  -12,  388,30643,-1072,  690, -535,  433, -352,  281, -218,  162, -115,   76,  -46,   23,   -8,    0,   36,\n    1,   39,   -7,    2,    7,  -20,   39,  -61,   86, -111,  133, -147,  145, -114,   17,  327,30648,-1017,  663, -518,  422, -343,  275, -213,  159, -113,   75,  -45,   23,   -8,    0,   36,\n    1,   39,   -7,    2,    7,  -21,   40,  -63,   89, -115,  139, -155,  158, -132,   46,  266,30652, -961,  636, -501,  410, -335,  269, -209,  156, -111,   73,  -44,   22,   -7,   -1,   36,\n    1,   39,   -7,    1,    8,  -23,   42,  -66,   92, -120,  145, -164,  170, -150,   75,  205,30656, -905,  609, -484,  398, -327,  263, -205,  153, -108,   72,  -43,   21,   -7,   -1,   37,\n    1,   39,   -6,    1,    9,  -24,   44,  -68,   96, -124,  152, -173,  182, -168,  103,  144,30660, -849,  581, -467,  387, -318,  257, -200,  150, -106,   70,  -42,   21,   -7,   -1,   37,\n    1,   39,   -6,    1,    9,  -25,   45,  -70,   99, -129,  158, -182,  194, -186,  132,   84,30663, -793,  554, -450,  375, -310,  250, -196,  147, -104,   69,  -41,   20,   -6,   -2,   37,\n    1,   38,   -6,    0,   10,  -26,   47,  -73,  102, -133,  164, -190,  207, -204,  161,   24,30665, -736,  526, -432,  363, -302,  244, -191,  144, -102,   67,  -40,   19,   -6,   -2,   37,\n    1,   38,   -5,    0,   11,  -27,   48,  -75,  105, -138,  170, -199,  219, -222,  189,  -36,30668, -679,  498, -415,  351, -293,  238, -187,  140, -100,   66,  -38,   19,   -5,   -2,   37,\n    1,   38,   -5,   -1,   12,  -28,   50,  -77,  109, -143,  177, -208,  231, -240,  218,  -96,30670, -622,  471, -398,  339, -285,  232, -183,  137,  -97,   64,  -37,   18,   -5,   -2,   37,\n    1,   38,   -5,   -1,   12,  -29,   52,  -79,  112, -147,  183, -216,  243, -257,  246, -155,30671, -564,  443, -380,  327, -276,  226, -178,  134,  -95,   62,  -36,   17,   -4,   -3,   37,\n    1,   38,   -5,   -2,   13,  -30,   53,  -82,  115, -152,  189, -225,  255, -275,  274, -215,30673, -507,  415, -363,  315, -268,  220, -174,  131,  -93,   61,  -35,   16,   -4,   -3,   37,\n    1,   38,   -4,   -2,   14,  -31,   55,  -84,  118, -156,  195, -233,  267, -293,  303, -273,30673, -449,  387, -345,  303, -259,  214, -169,  128,  -91,   59,  -34,   16,   -4,   -3,   37,\n  -43,   38,   -4,   -3,   14,  -32,   56,  -86,  121, -161,  202, -242,  279, -310,  331, -332,30674, -391,  359, -328,  291, -251,  208, -165,  125,  -88,   58,  -33,   15,   -3,   -4,   38,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_any_up512_36_filter.txt",
    "content": "//single phase coef Number:=36,    upsample factor:=512,    \n   25,  -45,   16,  -40,   33,  -42,   39,  -41,   37,  -34,   29,  -24,   17,  -10,    2,    6,  -24,30302,   35,  -22,   21,  -23,   26,  -31,   34,  -38,   40,  -43,   41,  -43,   33,  -40,   17,  -46,   25,   44,\n   24,  -45,   16,  -39,   32,  -40,   37,  -38,   34,  -30,   24,  -17,    7,    3,  -16,   35,  -82,30302,   94,  -51,   39,  -35,   36,  -38,   40,  -42,   43,  -45,   42,  -44,   34,  -41,   17,  -46,   25,    1,\n   24,  -45,   16,  -39,   31,  -39,   36,  -36,   31,  -26,   19,  -10,   -2,   16,  -34,   63, -140,30301,  153,  -79,   57,  -48,   45,  -45,   45,  -46,   46,  -47,   44,  -45,   35,  -41,   17,  -46,   25,    1,\n   24,  -45,   15,  -38,   30,  -38,   34,  -34,   28,  -22,   13,   -3,  -11,   28,  -52,   92, -198,30300,  212, -108,   75,  -61,   54,  -52,   50,  -50,   49,  -49,   45,  -46,   36,  -42,   18,  -46,   25,    1,\n   24,  -45,   15,  -38,   29,  -37,   33,  -32,   25,  -19,    8,    4,  -21,   41,  -70,  120, -256,30298,  272, -137,   93,  -74,   64,  -59,   56,  -54,   52,  -52,   47,  -47,   36,  -42,   18,  -46,   25,    1,\n   24,  -44,   15,  -37,   29,  -36,   31,  -30,   22,  -15,    3,   11,  -30,   54,  -88,  148, -314,30296,  332, -166,  112,  -87,   73,  -66,   61,  -58,   55,  -54,   49,  -48,   37,  -43,   18,  -46,   25,    1,\n   24,  -44,   14,  -37,   28,  -35,   29,  -27,   19,  -11,   -3,   18,  -39,   66, -106,  176, -371,30294,  392, -194,  130,  -99,   83,  -73,   66,  -62,   58,  -56,   50,  -49,   38,  -43,   19,  -47,   25,    1,\n   24,  -44,   14,  -36,   27,  -34,   28,  -25,   16,   -7,   -8,   25,  -48,   79, -124,  204, -428,30291,  452, -223,  148, -112,   92,  -80,   72,  -66,   61,  -58,   52,  -51,   39,  -44,   19,  -47,   25,    1,\n   24,  -44,   14,  -36,   26,  -33,   26,  -23,   13,   -3,  -13,   32,  -58,   91, -142,  232, -485,30288,  512, -252,  167, -125,  101,  -87,   77,  -71,   64,  -60,   53,  -52,   40,  -44,   19,  -47,   25,    1,\n   24,  -44,   13,  -35,   26,  -31,   25,  -21,   11,    1,  -18,   39,  -67,  104, -160,  260, -541,30285,  573, -281,  185, -138,  111,  -94,   82,  -75,   67,  -63,   55,  -53,   40,  -45,   20,  -47,   25,    1,\n   24,  -43,   13,  -35,   25,  -30,   23,  -19,    8,    5,  -24,   46,  -76,  117, -177,  288, -597,30281,  634, -310,  203, -151,  120, -101,   88,  -79,   70,  -65,   57,  -54,   41,  -45,   20,  -47,   25,    1,\n   24,  -43,   13,  -34,   24,  -29,   21,  -17,    5,    9,  -29,   53,  -85,  129, -195,  316, -653,30277,  695, -340,  222, -164,  130, -108,   93,  -83,   73,  -67,   58,  -55,   42,  -46,   20,  -48,   25,    1,\n   24,  -43,   12,  -34,   23,  -28,   20,  -14,    2,   13,  -34,   60,  -95,  142, -213,  344, -709,30272,  756, -369,  240, -177,  139, -115,   98,  -87,   76,  -69,   60,  -56,   43,  -46,   21,  -48,   25,    2,\n   24,  -43,   12,  -33,   22,  -27,   18,  -12,   -1,   17,  -39,   67, -104,  154, -231,  371, -765,30267,  818, -398,  259, -190,  149, -122,  104,  -91,   79,  -72,   61,  -57,   43,  -47,   21,  -48,   25,    2,\n   24,  -43,   12,  -32,   22,  -26,   17,  -10,   -4,   21,  -44,   74, -113,  167, -248,  399, -820,30262,  880, -427,  277, -202,  158, -129,  109,  -95,   82,  -74,   63,  -58,   44,  -47,   21,  -48,   25,    2,\n   24,  -42,   11,  -32,   21,  -25,   15,   -8,   -7,   25,  -50,   81, -122,  179, -266,  426, -875,30256,  942, -456,  296, -215,  168, -136,  114,  -99,   85,  -76,   65,  -59,   45,  -48,   22,  -48,   25,    2,\n   24,  -42,   11,  -31,   20,  -24,   14,   -6,  -10,   29,  -55,   88, -131,  191, -284,  454, -930,30250, 1004, -486,  314, -228,  177, -144,  120, -103,   88,  -78,   66,  -61,   46,  -48,   22,  -48,   25,    2,\n   24,  -42,   11,  -31,   19,  -22,   12,   -3,  -13,   33,  -60,   95, -140,  204, -301,  481, -984,30244, 1067, -515,  333, -241,  186, -151,  125, -107,   91,  -80,   68,  -62,   46,  -49,   22,  -49,   25,    2,\n   24,  -42,   10,  -30,   19,  -21,   10,   -1,  -16,   37,  -65,  101, -150,  216, -319,  509,-1039,30237, 1129, -545,  351, -254,  196, -158,  130, -111,   94,  -83,   69,  -63,   47,  -49,   23,  -49,   25,    2,\n   24,  -42,   10,  -30,   18,  -20,    9,    1,  -19,   41,  -70,  108, -159,  229, -336,  536,-1093,30230, 1192, -574,  370, -267,  205, -165,  136, -115,   97,  -85,   71,  -64,   48,  -50,   23,  -49,   25,    2,\n   24,  -41,    9,  -29,   17,  -19,    7,    3,  -22,   45,  -76,  115, -168,  241, -354,  563,-1147,30222, 1255, -604,  388, -280,  215, -172,  141, -119,  100,  -87,   73,  -65,   49,  -50,   23,  -49,   25,    2,\n   24,  -41,    9,  -29,   16,  -18,    6,    5,  -25,   48,  -81,  122, -177,  253, -371,  590,-1200,30214, 1319, -633,  407, -293,  224, -179,  146, -123,  103,  -89,   74,  -66,   50,  -51,   24,  -49,   25,    2,\n   24,  -41,    9,  -28,   15,  -17,    4,    7,  -28,   52,  -86,  129, -186,  266, -389,  617,-1254,30205, 1382, -663,  425, -306,  234, -186,  152, -127,  106,  -91,   76,  -67,   50,  -51,   24,  -50,   25,    2,\n   24,  -41,    8,  -28,   15,  -16,    2,   10,  -31,   56,  -91,  135, -195,  278, -406,  644,-1307,30197, 1446, -692,  444, -319,  243, -193,  157, -131,  109,  -94,   77,  -68,   51,  -52,   24,  -50,   25,    2,\n   24,  -41,    8,  -27,   14,  -15,    1,   12,  -34,   60,  -96,  142, -204,  290, -423,  671,-1359,30188, 1510, -722,  463, -332,  253, -200,  163, -135,  112,  -96,   79,  -70,   52,  -52,   25,  -50,   25,    2,\n   24,  -40,    8,  -27,   13,  -14,   -1,   14,  -36,   64, -101,  149, -213,  302, -441,  698,-1412,30178, 1574, -752,  481, -345,  262, -207,  168, -139,  115,  -98,   80,  -71,   53,  -53,   25,  -50,   25,    2,\n   24,  -40,    7,  -26,   12,  -12,   -2,   16,  -39,   68, -106,  156, -222,  314, -458,  724,-1464,30168, 1639, -782,  500, -358,  272, -215,  173, -143,  118, -100,   82,  -72,   53,  -53,   25,  -50,   25,    2,\n   24,  -40,    7,  -26,   12,  -11,   -4,   18,  -42,   72, -112,  163, -231,  327, -475,  751,-1516,30158, 1703, -811,  519, -371,  281, -222,  179, -147,  121, -102,   84,  -73,   54,  -53,   26,  -50,   25,    2,\n   24,  -40,    7,  -25,   11,  -10,   -5,   20,  -45,   76, -117,  169, -240,  339, -492,  777,-1568,30147, 1768, -841,  537, -384,  291, -229,  184, -151,  124, -105,   85,  -74,   55,  -54,   26,  -51,   25,    2,\n   24,  -40,    6,  -25,   10,   -9,   -7,   22,  -48,   79, -122,  176, -249,  351, -509,  804,-1620,30136, 1833, -871,  556, -397,  300, -236,  189, -155,  127, -107,   87,  -75,   56,  -54,   26,  -51,   25,    2,\n   24,  -39,    6,  -24,    9,   -8,   -8,   25,  -51,   83, -127,  183, -258,  363, -526,  830,-1671,30125, 1898, -901,  575, -410,  310, -243,  195, -159,  130, -109,   88,  -76,   56,  -55,   27,  -51,   25,    2,\n   24,  -39,    6,  -24,    9,   -7,  -10,   27,  -54,   87, -132,  189, -267,  375, -543,  856,-1722,30113, 1964, -931,  593, -423,  319, -250,  200, -163,  133, -111,   90,  -77,   57,  -55,   27,  -51,   25,    2,\n   24,  -39,    5,  -23,    8,   -6,  -12,   29,  -57,   91, -137,  196, -275,  387, -560,  882,-1773,30101, 2029, -961,  612, -436,  329, -257,  205, -167,  136, -113,   92,  -78,   58,  -56,   27,  -51,   25,    2,\n   24,  -39,    5,  -23,    7,   -5,  -13,   31,  -59,   95, -142,  203, -284,  399, -577,  909,-1823,30088, 2095, -991,  631, -449,  338, -264,  211, -171,  139, -116,   93,  -80,   59,  -56,   28,  -51,   25,    2,\n   24,  -39,    5,  -22,    6,   -4,  -15,   33,  -62,   99, -147,  209, -293,  411, -594,  935,-1874,30075, 2161,-1021,  649, -462,  348, -271,  216, -175,  142, -118,   95,  -81,   59,  -57,   28,  -52,   25,    2,\n   24,  -38,    4,  -22,    5,   -2,  -16,   35,  -65,  102, -152,  216, -302,  423, -611,  960,-1924,30062, 2228,-1051,  668, -475,  357, -278,  221, -179,  145, -120,   96,  -82,   60,  -57,   28,  -52,   25,    2,\n   24,  -38,    4,  -21,    5,   -1,  -18,   37,  -68,  106, -157,  223, -311,  435, -628,  986,-1973,30048, 2294,-1081,  687, -488,  367, -286,  227, -183,  148, -122,   98,  -83,   61,  -58,   28,  -52,   25,    2,\n   24,  -38,    4,  -21,    4,    0,  -19,   39,  -71,  110, -162,  229, -320,  447, -644, 1012,-2023,30034, 2361,-1111,  705, -501,  376, -293,  232, -187,  151, -124,   99,  -84,   62,  -58,   29,  -52,   25,    2,\n   24,  -38,    3,  -20,    3,    1,  -21,   41,  -74,  114, -167,  236, -328,  458, -661, 1038,-2072,30020, 2427,-1141,  724, -514,  386, -300,  237, -191,  154, -127,  101,  -85,   62,  -59,   29,  -52,   25,    2,\n   24,  -38,    3,  -20,    2,    2,  -22,   44,  -77,  117, -172,  242, -337,  470, -678, 1063,-2121,30005, 2494,-1171,  743, -527,  395, -307,  243, -195,  157, -129,  103,  -86,   63,  -59,   29,  -52,   25,    2,\n   24,  -37,    3,  -19,    2,    3,  -24,   46,  -79,  121, -177,  249, -346,  482, -694, 1089,-2170,29990, 2562,-1201,  761, -540,  405, -314,  248, -199,  160, -131,  104,  -87,   64,  -60,   30,  -52,   25,    2,\n   23,  -37,    2,  -19,    1,    4,  -25,   48,  -82,  125, -182,  255, -354,  494, -711, 1114,-2218,29974, 2629,-1231,  780, -553,  414, -321,  253, -203,  163, -133,  106,  -88,   65,  -60,   30,  -53,   25,    2,\n   23,  -37,    2,  -18,    0,    5,  -27,   50,  -85,  129, -187,  262, -363,  505, -727, 1139,-2267,29958, 2697,-1262,  799, -566,  424, -328,  259, -207,  166, -135,  107,  -89,   65,  -61,   30,  -53,   25,    2,\n   23,  -37,    1,  -18,   -1,    6,  -28,   52,  -88,  132, -192,  268, -372,  517, -744, 1164,-2314,29942, 2764,-1292,  818, -579,  433, -335,  264, -211,  169, -138,  109,  -91,   66,  -61,   31,  -53,   25,    2,\n   23,  -36,    1,  -17,   -1,    7,  -30,   54,  -91,  136, -197,  275, -380,  529, -760, 1190,-2362,29925, 2832,-1322,  836, -592,  443, -342,  269, -215,  172, -140,  110,  -92,   67,  -62,   31,  -53,   25,    2,\n   23,  -36,    1,  -17,   -2,    8,  -31,   56,  -93,  140, -202,  281, -389,  540, -776, 1215,-2409,29908, 2901,-1352,  855, -605,  452, -349,  275, -219,  175, -142,  112,  -93,   68,  -62,   31,  -53,   25,    2,\n   23,  -36,    0,  -16,   -3,    9,  -33,   58,  -96,  144, -206,  288, -397,  552, -793, 1239,-2457,29891, 2969,-1382,  874, -618,  462, -356,  280, -223,  178, -144,  114,  -94,   68,  -63,   32,  -53,   25,    2,\n   23,  -36,    0,  -16,   -4,   11,  -34,   60,  -99,  147, -211,  294, -406,  563, -809, 1264,-2504,29873, 3038,-1413,  892, -631,  471, -363,  285, -227,  181, -146,  115,  -95,   69,  -63,   32,  -54,   25,    2,\n   23,  -36,    0,  -15,   -4,   12,  -36,   62, -102,  151, -216,  301, -414,  575, -825, 1289,-2550,29855, 3106,-1443,  911, -644,  481, -370,  290, -231,  184, -148,  117,  -96,   70,  -63,   32,  -54,   25,    2,\n   23,  -35,   -1,  -15,   -5,   13,  -38,   64, -104,  155, -221,  307, -423,  586, -841, 1314,-2596,29836, 3175,-1473,  930, -657,  490, -377,  296, -235,  187, -151,  118,  -97,   71,  -64,   32,  -54,   25,    2,\n   23,  -35,   -1,  -14,   -6,   14,  -39,   66, -107,  158, -226,  313, -431,  598, -857, 1338,-2643,29817, 3244,-1504,  948, -670,  499, -384,  301, -239,  190, -153,  120,  -98,   71,  -64,   33,  -54,   25,    2,\n   23,  -35,   -1,  -14,   -7,   15,  -40,   68, -110,  162, -231,  320, -440,  609, -873, 1362,-2688,29798, 3314,-1534,  967, -682,  509, -391,  306, -243,  193, -155,  121,  -99,   72,  -65,   33,  -54,   25,    2,\n   23,  -35,   -2,  -13,   -7,   16,  -42,   70, -113,  166, -235,  326, -448,  621, -889, 1387,-2734,29778, 3383,-1564,  986, -695,  518, -398,  312, -247,  196, -157,  123, -100,   73,  -65,   33,  -54,   25,    2,\n   23,  -35,   -2,  -13,   -8,   17,  -43,   72, -115,  169, -240,  332, -457,  632, -905, 1411,-2779,29758, 3453,-1594, 1004, -708,  528, -405,  317, -251,  199, -159,  124, -101,   74,  -66,   34,  -54,   25,    2,\n   23,  -34,   -2,  -12,   -9,   18,  -45,   74, -118,  173, -245,  339, -465,  643, -921, 1435,-2824,29738, 3522,-1625, 1023, -721,  537, -412,  322, -255,  202, -161,  126, -102,   74,  -66,   34,  -55,   25,    3,\n   23,  -34,   -3,  -12,  -10,   19,  -46,   76, -121,  176, -250,  345, -473,  654, -936, 1459,-2869,29717, 3592,-1655, 1042, -734,  546, -419,  327, -259,  204, -163,  128, -103,   75,  -67,   34,  -55,   24,    3,\n   23,  -34,   -3,  -11,  -10,   20,  -48,   79, -124,  180, -255,  351, -481,  666, -952, 1483,-2913,29696, 3663,-1685, 1060, -747,  556, -426,  333, -263,  207, -166,  129, -105,   76,  -67,   34,  -55,   24,    3,\n   23,  -34,   -3,  -11,  -11,   21,  -49,   81, -126,  184, -259,  357, -490,  677, -968, 1507,-2958,29674, 3733,-1716, 1079, -760,  565, -433,  338, -266,  210, -168,  131, -106,   76,  -68,   35,  -55,   24,    3,\n   23,  -33,   -4,  -10,  -12,   22,  -51,   83, -129,  187, -264,  364, -498,  688, -983, 1530,-3001,29652, 3803,-1746, 1098, -773,  574, -440,  343, -270,  213, -170,  132, -107,   77,  -68,   35,  -55,   24,    3,\n   23,  -33,   -4,  -10,  -13,   23,  -52,   85, -132,  191, -269,  370, -506,  699, -999, 1554,-3045,29630, 3874,-1776, 1116, -785,  584, -447,  348, -274,  216, -172,  134, -108,   78,  -68,   35,  -55,   24,    3,\n   23,  -33,   -4,   -9,  -13,   24,  -54,   87, -134,  194, -273,  376, -514,  710,-1014, 1577,-3088,29607, 3945,-1807, 1135, -798,  593, -454,  353, -278,  219, -174,  135, -109,   79,  -69,   36,  -55,   24,    3,\n   23,  -33,   -5,   -9,  -14,   25,  -55,   89, -137,  198, -278,  382, -523,  721,-1030, 1601,-3132,29584, 4016,-1837, 1153, -811,  602, -461,  359, -282,  222, -176,  137, -110,   79,  -69,   36,  -56,   24,    3,\n   23,  -33,   -5,   -8,  -15,   26,  -57,   90, -140,  201, -283,  388, -531,  732,-1045, 1624,-3174,29561, 4087,-1867, 1172, -824,  612, -468,  364, -286,  225, -178,  138, -111,   80,  -70,   36,  -56,   24,    3,\n   23,  -32,   -5,   -8,  -16,   27,  -58,   92, -142,  205, -287,  394, -539,  743,-1060, 1647,-3217,29537, 4159,-1898, 1190, -837,  621, -475,  369, -290,  228, -180,  140, -112,   81,  -70,   37,  -56,   24,    3,\n   23,  -32,   -6,   -7,  -16,   29,  -60,   94, -145,  208, -292,  401, -547,  754,-1076, 1670,-3259,29513, 4230,-1928, 1209, -849,  630, -482,  374, -294,  231, -183,  141, -113,   81,  -71,   37,  -56,   24,    3,\n   23,  -32,   -6,   -7,  -17,   30,  -61,   96, -148,  212, -297,  407, -555,  764,-1091, 1693,-3301,29489, 4302,-1958, 1227, -862,  640, -489,  379, -298,  233, -185,  143, -114,   82,  -71,   37,  -56,   24,    3,\n   23,  -32,   -7,   -6,  -18,   31,  -63,   98, -150,  215, -301,  413, -563,  775,-1106, 1716,-3343,29464, 4374,-1989, 1246, -875,  649, -496,  385, -302,  236, -187,  144, -115,   83,  -72,   37,  -56,   24,    3,\n   23,  -32,   -7,   -6,  -19,   32,  -64,  100, -153,  219, -306,  419, -571,  786,-1121, 1739,-3385,29439, 4446,-2019, 1264, -888,  658, -503,  390, -305,  239, -189,  146, -116,   83,  -72,   38,  -56,   24,    3,\n   22,  -31,   -7,   -5,  -19,   33,  -65,  102, -156,  222, -310,  425, -579,  797,-1136, 1761,-3426,29413, 4518,-2049, 1283, -900,  667, -509,  395, -309,  242, -191,  147, -117,   84,  -72,   38,  -57,   24,    3,\n   22,  -31,   -8,   -5,  -20,   34,  -67,  104, -158,  226, -315,  431, -587,  807,-1151, 1784,-3467,29387, 4590,-2080, 1301, -913,  676, -516,  400, -313,  245, -193,  149, -118,   85,  -73,   38,  -57,   24,    3,\n   22,  -31,   -8,   -4,  -21,   35,  -68,  106, -161,  229, -319,  437, -595,  818,-1165, 1806,-3507,29361, 4663,-2110, 1320, -926,  686, -523,  405, -317,  248, -195,  150, -119,   86,  -73,   38,  -57,   24,    3,\n   22,  -31,   -8,   -4,  -21,   36,  -70,  108, -163,  233, -324,  443, -602,  828,-1180, 1828,-3548,29334, 4735,-2140, 1338, -938,  695, -530,  410, -321,  251, -197,  152, -120,   86,  -74,   39,  -57,   24,    3,\n   22,  -30,   -9,   -4,  -22,   37,  -71,  110, -166,  236, -328,  448, -610,  839,-1195, 1850,-3588,29307, 4808,-2170, 1356, -951,  704, -537,  415, -325,  253, -199,  153, -121,   87,  -74,   39,  -57,   24,    3,\n   22,  -30,   -9,   -3,  -23,   38,  -72,  112, -168,  239, -333,  454, -618,  849,-1210, 1873,-3628,29280, 4881,-2201, 1375, -963,  713, -544,  421, -328,  256, -201,  155, -122,   88,  -75,   39,  -57,   24,    3,\n   22,  -30,   -9,   -3,  -24,   39,  -74,  114, -171,  243, -337,  460, -626,  860,-1224, 1894,-3667,29252, 4954,-2231, 1393, -976,  722, -550,  426, -332,  259, -203,  156, -123,   88,  -75,   40,  -57,   24,    3,\n   22,  -30,  -10,   -2,  -24,   40,  -75,  116, -174,  246, -342,  466, -633,  870,-1239, 1916,-3706,29224, 5027,-2261, 1411, -989,  731, -557,  431, -336,  262, -205,  158, -124,   89,  -75,   40,  -57,   24,    3,\n   22,  -30,  -10,   -2,  -25,   41,  -77,  118, -176,  250, -346,  472, -641,  881,-1253, 1938,-3745,29196, 5101,-2291, 1430,-1001,  740, -564,  436, -340,  265, -207,  159, -125,   90,  -76,   40,  -58,   24,    3,\n   22,  -29,  -10,   -1,  -26,   42,  -78,  120, -179,  253, -351,  478, -649,  891,-1267, 1959,-3784,29167, 5174,-2321, 1448,-1014,  750, -571,  441, -344,  268, -210,  160, -126,   90,  -76,   40,  -58,   24,    3,\n   22,  -29,  -11,   -1,  -26,   43,  -79,  121, -181,  256, -355,  483, -656,  901,-1282, 1981,-3823,29138, 5248,-2352, 1466,-1026,  759, -577,  446, -347,  270, -212,  162, -127,   91,  -77,   41,  -58,   24,    3,\n   22,  -29,  -11,    0,  -27,   44,  -81,  123, -184,  260, -359,  489, -664,  911,-1296, 2002,-3861,29108, 5322,-2382, 1484,-1039,  768, -584,  451, -351,  273, -214,  163, -128,   92,  -77,   41,  -58,   24,    3,\n   22,  -29,  -11,    0,  -28,   45,  -82,  125, -186,  263, -364,  495, -672,  922,-1310, 2024,-3899,29079, 5396,-2412, 1502,-1051,  777, -591,  456, -355,  276, -216,  165, -129,   92,  -78,   41,  -58,   24,    3,\n   22,  -28,  -12,    1,  -29,   46,  -84,  127, -189,  266, -368,  501, -679,  932,-1324, 2045,-3936,29048, 5470,-2442, 1521,-1064,  786, -597,  461, -359,  279, -218,  166, -130,   93,  -78,   41,  -58,   24,    3,\n   22,  -28,  -12,    1,  -29,   47,  -85,  129, -191,  269, -372,  506, -687,  942,-1338, 2066,-3974,29018, 5545,-2472, 1539,-1076,  795, -604,  466, -362,  281, -220,  168, -131,   94,  -78,   42,  -58,   24,    3,\n   22,  -28,  -12,    2,  -30,   48,  -86,  131, -194,  273, -377,  512, -694,  952,-1352, 2086,-4011,28987, 5619,-2502, 1557,-1088,  804, -611,  471, -366,  284, -222,  169, -132,   94,  -79,   42,  -58,   24,    3,\n   22,  -28,  -13,    2,  -31,   49,  -88,  133, -196,  276, -381,  518, -701,  962,-1366, 2107,-4047,28956, 5694,-2532, 1575,-1101,  813, -617,  476, -370,  287, -224,  171, -133,   95,  -79,   42,  -58,   24,    3,\n   22,  -28,  -13,    3,  -31,   50,  -89,  134, -199,  279, -385,  523, -709,  972,-1380, 2128,-4084,28924, 5768,-2562, 1593,-1113,  821, -624,  481, -374,  290, -226,  172, -134,   96,  -80,   42,  -59,   24,    3,\n   22,  -27,  -13,    3,  -32,   51,  -90,  136, -201,  282, -390,  529, -716,  981,-1393, 2148,-4120,28892, 5843,-2592, 1611,-1125,  830, -631,  486, -377,  293, -228,  173, -135,   96,  -80,   43,  -59,   24,    3,\n   22,  -27,  -14,    4,  -33,   52,  -92,  138, -203,  286, -394,  534, -724,  991,-1407, 2169,-4156,28860, 5918,-2622, 1629,-1138,  839, -637,  491, -381,  295, -230,  175, -136,   97,  -80,   43,  -59,   24,    4,\n   22,  -27,  -14,    4,  -33,   53,  -93,  140, -206,  289, -398,  540, -731, 1001,-1421, 2189,-4192,28827, 5993,-2652, 1647,-1150,  848, -644,  496, -385,  298, -232,  176, -137,   98,  -81,   43,  -59,   24,    4,\n   21,  -27,  -14,    5,  -34,   54,  -94,  142, -208,  292, -402,  545, -738, 1011,-1434, 2209,-4227,28794, 6068,-2682, 1665,-1162,  857, -650,  501, -388,  301, -234,  178, -138,   98,  -81,   43,  -59,   24,    4,\n   21,  -26,  -15,    5,  -35,   54,  -96,  143, -211,  295, -406,  551, -745, 1020,-1447, 2229,-4262,28761, 6144,-2711, 1682,-1174,  866, -657,  505, -392,  303, -236,  179, -139,   99,  -82,   44,  -59,   24,    4,\n   21,  -26,  -15,    5,  -36,   55,  -97,  145, -213,  298, -410,  556, -752, 1030,-1461, 2249,-4297,28727, 6219,-2741, 1700,-1186,  875, -663,  510, -396,  306, -238,  180, -140,  100,  -82,   44,  -59,   23,    4,\n   21,  -26,  -15,    6,  -36,   56,  -98,  147, -215,  302, -415,  562, -760, 1040,-1474, 2269,-4332,28693, 6295,-2771, 1718,-1199,  883, -670,  515, -399,  309, -240,  182, -141,  100,  -82,   44,  -59,   23,    4,\n   21,  -26,  -16,    6,  -37,   57, -100,  149, -218,  305, -419,  567, -767, 1049,-1487, 2288,-4366,28659, 6371,-2801, 1736,-1211,  892, -676,  520, -403,  311, -241,  183, -142,  101,  -83,   44,  -59,   23,    4,\n   21,  -26,  -16,    7,  -38,   58, -101,  151, -220,  308, -423,  572, -774, 1059,-1500, 2308,-4400,28624, 6447,-2830, 1753,-1223,  901, -683,  525, -407,  314, -243,  185, -143,  101,  -83,   45,  -59,   23,    4,\n   21,  -25,  -16,    7,  -38,   59, -102,  152, -222,  311, -427,  578, -781, 1068,-1513, 2327,-4433,28589, 6523,-2860, 1771,-1235,  910, -689,  530, -410,  317, -245,  186, -144,  102,  -84,   45,  -60,   23,    4,\n   21,  -25,  -17,    8,  -39,   60, -104,  154, -225,  314, -431,  583, -788, 1077,-1526, 2347,-4467,28553, 6599,-2890, 1789,-1247,  918, -696,  535, -414,  319, -247,  187, -145,  103,  -84,   45,  -60,   23,    4,\n   21,  -25,  -17,    8,  -40,   61, -105,  156, -227,  317, -435,  588, -795, 1087,-1539, 2366,-4500,28518, 6675,-2919, 1806,-1259,  927, -702,  539, -417,  322, -249,  189, -146,  103,  -84,   45,  -60,   23,    4,\n   21,  -25,  -17,    9,  -40,   62, -106,  158, -229,  320, -439,  593, -802, 1096,-1552, 2385,-4533,28482, 6751,-2949, 1824,-1271,  936, -709,  544, -421,  325, -251,  190, -147,  104,  -85,   46,  -60,   23,    4,\n   21,  -25,  -18,    9,  -41,   63, -107,  159, -232,  323, -443,  599, -808, 1105,-1565, 2404,-4565,28445, 6828,-2978, 1841,-1283,  944, -715,  549, -424,  327, -253,  191, -148,  105,  -85,   46,  -60,   23,    4,\n   21,  -24,  -18,   10,  -42,   64, -109,  161, -234,  326, -447,  604, -815, 1114,-1578, 2422,-4598,28408, 6905,-3007, 1859,-1295,  953, -721,  554, -428,  330, -255,  193, -149,  105,  -85,   46,  -60,   23,    4,\n   21,  -24,  -18,   10,  -42,   65, -110,  163, -236,  329, -451,  609, -822, 1123,-1590, 2441,-4630,28371, 6981,-3037, 1876,-1306,  961, -728,  558, -432,  333, -257,  194, -149,  106,  -86,   46,  -60,   23,    4,\n   21,  -24,  -19,   10,  -43,   66, -111,  164, -239,  332, -455,  614, -829, 1132,-1603, 2460,-4661,28334, 7058,-3066, 1894,-1318,  970, -734,  563, -435,  335, -259,  196, -150,  106,  -86,   46,  -60,   23,    4,\n   21,  -24,  -19,   11,  -44,   67, -113,  166, -241,  335, -459,  619, -836, 1141,-1615, 2478,-4693,28296, 7135,-3095, 1911,-1330,  978, -740,  568, -439,  338, -261,  197, -151,  107,  -86,   47,  -60,   23,    4,\n   21,  -23,  -19,   11,  -44,   68, -114,  168, -243,  338, -462,  624, -842, 1150,-1627, 2496,-4724,28258, 7212,-3125, 1928,-1342,  987, -747,  573, -442,  340, -262,  198, -152,  108,  -87,   47,  -60,   23,    4,\n   21,  -23,  -20,   12,  -45,   68, -115,  169, -245,  341, -466,  629, -849, 1159,-1640, 2514,-4755,28219, 7289,-3154, 1946,-1354,  995, -753,  577, -446,  343, -264,  199, -153,  108,  -87,   47,  -60,   23,    4,\n   21,  -23,  -20,   12,  -46,   69, -116,  171, -248,  344, -470,  634, -855, 1168,-1652, 2532,-4785,28180, 7367,-3183, 1963,-1365, 1004, -759,  582, -449,  346, -266,  201, -154,  109,  -88,   47,  -61,   23,    4,\n   21,  -23,  -20,   13,  -46,   70, -117,  173, -250,  347, -474,  639, -862, 1177,-1664, 2550,-4816,28141, 7444,-3212, 1980,-1377, 1012, -765,  587, -452,  348, -268,  202, -155,  109,  -88,   48,  -61,   23,    4,\n   21,  -23,  -21,   13,  -47,   71, -119,  174, -252,  350, -478,  644, -869, 1185,-1676, 2568,-4846,28102, 7522,-3241, 1997,-1388, 1020, -772,  591, -456,  351, -270,  203, -156,  110,  -88,   48,  -61,   23,    4,\n   20,  -22,  -21,   14,  -47,   72, -120,  176, -254,  353, -481,  649, -875, 1194,-1688, 2586,-4876,28062, 7599,-3270, 2014,-1400, 1029, -778,  596, -459,  353, -272,  205, -157,  111,  -89,   48,  -61,   23,    4,\n   20,  -22,  -21,   14,  -48,   73, -121,  178, -256,  355, -485,  654, -881, 1203,-1700, 2603,-4905,28022, 7677,-3299, 2031,-1412, 1037, -784,  600, -463,  356, -274,  206, -158,  111,  -89,   48,  -61,   23,    4,\n   20,  -22,  -22,   14,  -49,   74, -122,  179, -258,  358, -489,  659, -888, 1211,-1712, 2620,-4934,27981, 7755,-3328, 2048,-1423, 1045, -790,  605, -466,  358, -275,  207, -158,  112,  -89,   48,  -61,   23,    4,\n   20,  -22,  -22,   15,  -49,   75, -124,  181, -261,  361, -493,  664, -894, 1220,-1723, 2638,-4963,27941, 7833,-3357, 2065,-1435, 1054, -796,  609, -470,  361, -277,  209, -159,  112,  -90,   49,  -61,   22,    4,\n   20,  -21,  -22,   15,  -50,   76, -125,  183, -263,  364, -496,  669, -901, 1228,-1735, 2655,-4992,27899, 7911,-3385, 2082,-1446, 1062, -802,  614, -473,  363, -279,  210, -160,  113,  -90,   49,  -61,   22,    4,\n   20,  -21,  -23,   16,  -51,   76, -126,  184, -265,  367, -500,  673, -907, 1237,-1747, 2672,-5020,27858, 7989,-3414, 2099,-1457, 1070, -808,  619, -476,  366, -281,  211, -161,  113,  -90,   49,  -61,   22,    4,\n   20,  -21,  -23,   16,  -51,   77, -127,  186, -267,  369, -504,  678, -913, 1245,-1758, 2688,-5048,27816, 8067,-3443, 2115,-1469, 1078, -814,  623, -480,  368, -283,  212, -162,  114,  -91,   49,  -61,   22,    5,\n   20,  -21,  -23,   17,  -52,   78, -128,  187, -269,  372, -507,  683, -919, 1253,-1769, 2705,-5076,27774, 8145,-3471, 2132,-1480, 1086, -820,  628, -483,  371, -284,  214, -163,  115,  -91,   49,  -61,   22,    5,\n   20,  -21,  -24,   17,  -53,   79, -129,  189, -271,  375, -511,  687, -925, 1261,-1781, 2722,-5103,27732, 8224,-3500, 2149,-1491, 1094, -826,  632, -486,  373, -286,  215, -164,  115,  -91,   50,  -61,   22,    5,\n   20,  -20,  -24,   17,  -53,   80, -131,  190, -273,  378, -514,  692, -931, 1270,-1792, 2738,-5130,27689, 8302,-3528, 2165,-1502, 1102, -832,  636, -490,  375, -288,  216, -164,  116,  -92,   50,  -61,   22,    5,\n   20,  -20,  -24,   18,  -54,   81, -132,  192, -275,  380, -518,  697, -938, 1278,-1803, 2754,-5157,27646, 8381,-3556, 2182,-1514, 1110, -838,  641, -493,  378, -290,  217, -165,  116,  -92,   50,  -62,   22,    5,\n   20,  -20,  -24,   18,  -54,   82, -133,  194, -277,  383, -521,  701, -944, 1286,-1814, 2770,-5184,27602, 8459,-3585, 2198,-1525, 1118, -844,  645, -496,  380, -291,  219, -166,  117,  -92,   50,  -62,   22,    5,\n   20,  -20,  -25,   19,  -55,   82, -134,  195, -279,  386, -525,  706, -950, 1294,-1825, 2786,-5210,27559, 8538,-3613, 2215,-1536, 1126, -850,  650, -499,  383, -293,  220, -167,  117,  -93,   50,  -62,   22,    5,\n   20,  -19,  -25,   19,  -56,   83, -135,  197, -281,  388, -528,  710, -955, 1302,-1836, 2802,-5236,27515, 8617,-3641, 2231,-1547, 1134, -856,  654, -503,  385, -295,  221, -168,  118,  -93,   51,  -62,   22,    5,\n   20,  -19,  -25,   20,  -56,   84, -136,  198, -283,  391, -532,  715, -961, 1309,-1847, 2818,-5262,27470, 8696,-3669, 2248,-1558, 1142, -862,  658, -506,  388, -297,  222, -169,  118,  -93,   51,  -62,   22,    5,\n   20,  -19,  -26,   20,  -57,   85, -138,  200, -285,  394, -535,  719, -967, 1317,-1857, 2834,-5288,27426, 8775,-3697, 2264,-1569, 1150, -867,  663, -509,  390, -298,  223, -169,  119,  -94,   51,  -62,   22,    5,\n   20,  -19,  -26,   20,  -57,   86, -139,  201, -287,  396, -539,  724, -973, 1325,-1868, 2849,-5313,27381, 8854,-3725, 2280,-1580, 1158, -873,  667, -512,  392, -300,  225, -170,  119,  -94,   51,  -62,   22,    5,\n   20,  -19,  -26,   21,  -58,   87, -140,  203, -289,  399, -542,  728, -979, 1333,-1878, 2864,-5338,27335, 8933,-3753, 2296,-1591, 1166, -879,  671, -516,  395, -302,  226, -171,  120,  -94,   51,  -62,   22,    5,\n   19,  -18,  -27,   21,  -59,   87, -141,  204, -291,  401, -545,  733, -985, 1340,-1889, 2879,-5363,27290, 9012,-3780, 2312,-1601, 1173, -885,  676, -519,  397, -303,  227, -172,  120,  -95,   52,  -62,   22,    5,\n   19,  -18,  -27,   22,  -59,   88, -142,  206, -293,  404, -549,  737, -990, 1348,-1899, 2894,-5387,27244, 9091,-3808, 2328,-1612, 1181, -890,  680, -522,  399, -305,  228, -173,  121,  -95,   52,  -62,   21,    5,\n   19,  -18,  -27,   22,  -60,   89, -143,  207, -295,  407, -552,  741, -996, 1355,-1910, 2909,-5411,27197, 9171,-3836, 2344,-1623, 1189, -896,  684, -525,  402, -307,  229, -173,  122,  -95,   52,  -62,   21,    5,\n   19,  -18,  -28,   22,  -60,   90, -144,  208, -297,  409, -555,  745,-1001, 1363,-1920, 2924,-5435,27151, 9250,-3863, 2360,-1634, 1197, -902,  688, -528,  404, -308,  231, -174,  122,  -95,   52,  -62,   21,    5,\n   19,  -17,  -28,   23,  -61,   91, -145,  210, -299,  412, -558,  750,-1007, 1370,-1930, 2939,-5458,27104, 9330,-3891, 2376,-1644, 1204, -907,  692, -531,  406, -310,  232, -175,  123,  -96,   52,  -62,   21,    5,\n   19,  -17,  -28,   23,  -62,   91, -146,  211, -301,  414, -562,  754,-1012, 1377,-1940, 2953,-5482,27057, 9409,-3918, 2392,-1655, 1212, -913,  697, -534,  408, -312,  233, -176,  123,  -96,   52,  -62,   21,    5,\n   19,  -17,  -29,   24,  -62,   92, -147,  213, -303,  416, -565,  758,-1018, 1385,-1950, 2968,-5505,27009, 9489,-3945, 2407,-1665, 1219, -918,  701, -537,  411, -313,  234, -176,  124,  -96,   53,  -62,   21,    5,\n   19,  -17,  -29,   24,  -63,   93, -148,  214, -305,  419, -568,  762,-1023, 1392,-1960, 2982,-5527,26961, 9569,-3973, 2423,-1676, 1227, -924,  705, -540,  413, -315,  235, -177,  124,  -97,   53,  -62,   21,    5,\n   19,  -17,  -29,   24,  -63,   94, -150,  216, -307,  421, -571,  766,-1029, 1399,-1969, 2996,-5550,26913, 9649,-4000, 2439,-1686, 1234, -929,  709, -543,  415, -316,  236, -178,  125,  -97,   53,  -62,   21,    5,\n   19,  -16,  -29,   25,  -64,   94, -151,  217, -308,  424, -574,  770,-1034, 1406,-1979, 3010,-5572,26865, 9728,-4027, 2454,-1697, 1242, -935,  713, -547,  417, -318,  237, -179,  125,  -97,   53,  -62,   21,    5,\n   19,  -16,  -30,   25,  -64,   95, -152,  218, -310,  426, -577,  774,-1039, 1413,-1989, 3024,-5594,26816, 9808,-4054, 2469,-1707, 1249, -940,  717, -550,  420, -320,  238, -180,  125,  -97,   53,  -63,   21,    5,\n   19,  -16,  -30,   26,  -65,   96, -153,  220, -312,  428, -581,  778,-1045, 1420,-1998, 3037,-5615,26767, 9888,-4080, 2485,-1717, 1256, -946,  721, -553,  422, -321,  240, -180,  126,  -98,   53,  -63,   21,    5,\n   19,  -16,  -30,   26,  -66,   97, -154,  221, -314,  431, -584,  782,-1050, 1427,-2007, 3051,-5637,26718, 9968,-4107, 2500,-1728, 1264, -951,  725, -555,  424, -323,  241, -181,  126,  -98,   54,  -63,   21,    5,\n   19,  -15,  -31,   26,  -66,   97, -155,  222, -316,  433, -587,  786,-1055, 1434,-2017, 3064,-5658,26668,10048,-4134, 2515,-1738, 1271, -956,  729, -558,  426, -324,  242, -182,  127,  -98,   54,  -63,   21,    6,\n   19,  -15,  -31,   27,  -67,   98, -156,  224, -317,  435, -590,  790,-1060, 1440,-2026, 3077,-5678,26618,10129,-4160, 2530,-1748, 1278, -962,  733, -561,  428, -326,  243, -182,  127,  -99,   54,  -63,   21,    6,\n   19,  -15,  -31,   27,  -67,   99, -157,  225, -319,  438, -593,  794,-1065, 1447,-2035, 3090,-5699,26568,10209,-4187, 2546,-1758, 1285, -967,  737, -564,  430, -327,  244, -183,  128,  -99,   54,  -63,   20,    6,\n   19,  -15,  -32,   27,  -68,  100, -158,  226, -321,  440, -596,  798,-1070, 1454,-2044, 3103,-5719,26518,10289,-4213, 2561,-1768, 1293, -972,  741, -567,  432, -329,  245, -184,  128,  -99,   54,  -63,   20,    6,\n   18,  -15,  -32,   28,  -68,  100, -159,  228, -323,  442, -598,  802,-1075, 1460,-2053, 3116,-5739,26467,10369,-4240, 2575,-1778, 1300, -978,  745, -570,  435, -330,  246, -185,  129,  -99,   54,  -63,   20,    6,\n   18,  -14,  -32,   28,  -69,  101, -160,  229, -324,  444, -601,  805,-1080, 1467,-2062, 3129,-5758,26416,10450,-4266, 2590,-1788, 1307, -983,  749, -573,  437, -332,  247, -185,  129, -100,   54,  -63,   20,    6,\n   18,  -14,  -32,   29,  -69,  102, -161,  230, -326,  447, -604,  809,-1085, 1473,-2071, 3141,-5778,26364,10530,-4292, 2605,-1798, 1314, -988,  752, -576,  439, -333,  248, -186,  130, -100,   55,  -63,   20,    6,\n   18,  -14,  -33,   29,  -70,  103, -162,  232, -328,  449, -607,  813,-1090, 1480,-2079, 3154,-5797,26312,10610,-4318, 2620,-1807, 1321, -993,  756, -579,  441, -335,  249, -187,  130, -100,   55,  -63,   20,    6,\n   18,  -14,  -33,   29,  -70,  103, -163,  233, -329,  451, -610,  817,-1094, 1486,-2088, 3166,-5816,26260,10691,-4344, 2635,-1817, 1328, -998,  760, -581,  443, -336,  250, -187,  131, -100,   55,  -63,   20,    6,\n   18,  -14,  -33,   30,  -71,  104, -164,  234, -331,  453, -613,  820,-1099, 1492,-2096, 3178,-5834,26208,10772,-4370, 2649,-1827, 1335,-1003,  764, -584,  445, -338,  251, -188,  131, -101,   55,  -63,   20,    6,\n   18,  -13,  -34,   30,  -71,  105, -165,  235, -333,  455, -615,  824,-1104, 1498,-2105, 3190,-5852,26156,10852,-4395, 2664,-1837, 1342,-1008,  768, -587,  447, -339,  252, -189,  131, -101,   55,  -63,   20,    6,\n   18,  -13,  -34,   30,  -72,  105, -165,  237, -334,  457, -618,  827,-1108, 1505,-2113, 3202,-5870,26103,10933,-4421, 2678,-1846, 1348,-1013,  771, -590,  449, -341,  253, -189,  132, -101,   55,  -63,   20,    6,\n   18,  -13,  -34,   31,  -72,  106, -166,  238, -336,  460, -621,  831,-1113, 1511,-2121, 3213,-5888,26050,11013,-4446, 2692,-1856, 1355,-1018,  775, -592,  451, -342,  254, -190,  132, -101,   55,  -63,   20,    6,\n   18,  -13,  -34,   31,  -73,  107, -167,  239, -337,  462, -624,  834,-1118, 1517,-2129, 3225,-5905,25996,11094,-4472, 2707,-1865, 1362,-1023,  779, -595,  453, -344,  255, -191,  133, -101,   56,  -63,   20,    6,\n   18,  -12,  -35,   32,  -74,  108, -168,  240, -339,  464, -626,  838,-1122, 1523,-2137, 3236,-5922,25942,11175,-4497, 2721,-1875, 1369,-1028,  782, -598,  455, -345,  256, -191,  133, -102,   56,  -63,   19,    6,\n   18,  -12,  -35,   32,  -74,  108, -169,  242, -341,  466, -629,  841,-1127, 1528,-2145, 3248,-5939,25888,11255,-4522, 2735,-1884, 1375,-1033,  786, -601,  457, -346,  257, -192,  133, -102,   56,  -63,   19,    6,\n   18,  -12,  -35,   32,  -75,  109, -170,  243, -342,  468, -632,  845,-1131, 1534,-2153, 3259,-5956,25834,11336,-4547, 2749,-1893, 1382,-1038,  789, -603,  459, -348,  258, -193,  134, -102,   56,  -63,   19,    6,\n   18,  -12,  -36,   33,  -75,  110, -171,  244, -344,  470, -634,  848,-1135, 1540,-2161, 3270,-5972,25780,11417,-4572, 2763,-1902, 1388,-1043,  793, -606,  461, -349,  259, -193,  134, -102,   56,  -63,   19,    6,\n   18,  -12,  -36,   33,  -76,  110, -172,  245, -345,  472, -637,  851,-1140, 1546,-2169, 3280,-5988,25725,11498,-4597, 2777,-1912, 1395,-1048,  797, -608,  463, -351,  260, -194,  135, -103,   56,  -63,   19,    6,\n   18,  -11,  -36,   33,  -76,  111, -173,  246, -347,  474, -639,  854,-1144, 1551,-2176, 3291,-6004,25670,11579,-4621, 2790,-1921, 1401,-1052,  800, -611,  465, -352,  261, -194,  135, -103,   56,  -63,   19,    6,\n   18,  -11,  -36,   34,  -77,  112, -174,  247, -348,  476, -642,  858,-1148, 1557,-2184, 3302,-6019,25614,11660,-4646, 2804,-1930, 1408,-1057,  804, -614,  466, -353,  262, -195,  135, -103,   56,  -63,   19,    6,\n   17,  -11,  -37,   34,  -77,  112, -175,  249, -350,  478, -644,  861,-1152, 1562,-2191, 3312,-6034,25559,11741,-4671, 2818,-1939, 1414,-1062,  807, -616,  468, -355,  263, -196,  136, -103,   56,  -63,   19,    6,\n   17,  -11,  -37,   34,  -78,  113, -175,  250, -351,  479, -647,  864,-1156, 1568,-2198, 3322,-6049,25503,11821,-4695, 2831,-1948, 1421,-1066,  810, -619,  470, -356,  264, -196,  136, -103,   57,  -63,   19,    7,\n   17,  -11,  -37,   35,  -78,  113, -176,  251, -353,  481, -649,  867,-1160, 1573,-2206, 3332,-6064,25446,11902,-4719, 2845,-1957, 1427,-1071,  814, -621,  472, -357,  265, -197,  137, -104,   57,  -63,   19,    7,\n   17,  -10,  -37,   35,  -78,  114, -177,  252, -354,  483, -651,  870,-1164, 1578,-2213, 3342,-6078,25390,11983,-4743, 2858,-1965, 1433,-1075,  817, -624,  474, -358,  266, -197,  137, -104,   57,  -63,   19,    7,\n   17,  -10,  -38,   35,  -79,  115, -178,  253, -356,  485, -654,  873,-1168, 1583,-2220, 3352,-6092,25333,12064,-4767, 2871,-1974, 1439,-1080,  821, -626,  476, -360,  266, -198,  137, -104,   57,  -63,   18,    7,\n   17,  -10,  -38,   36,  -79,  115, -179,  254, -357,  487, -656,  876,-1172, 1589,-2227, 3362,-6106,25276,12145,-4791, 2884,-1983, 1446,-1085,  824, -629,  477, -361,  267, -199,  138, -104,   57,  -63,   18,    7,\n   17,  -10,  -38,   36,  -80,  116, -180,  255, -358,  489, -658,  879,-1176, 1594,-2233, 3371,-6120,25219,12226,-4815, 2898,-1991, 1452,-1089,  827, -631,  479, -362,  268, -199,  138, -104,   57,  -63,   18,    7,\n   17,  -10,  -39,   36,  -80,  117, -180,  256, -360,  490, -661,  882,-1180, 1599,-2240, 3380,-6133,25161,12307,-4838, 2911,-2000, 1458,-1093,  831, -633,  481, -363,  269, -200,  138, -105,   57,  -63,   18,    7,\n   17,   -9,  -39,   37,  -81,  117, -181,  257, -361,  492, -663,  885,-1184, 1604,-2247, 3390,-6146,25103,12388,-4862, 2923,-2008, 1464,-1098,  834, -636,  483, -365,  270, -200,  139, -105,   57,  -63,   18,    7,\n   17,   -9,  -39,   37,  -81,  118, -182,  258, -362,  494, -665,  888,-1187, 1609,-2253, 3399,-6159,25045,12470,-4885, 2936,-2017, 1470,-1102,  837, -638,  484, -366,  271, -201,  139, -105,   57,  -63,   18,    7,\n   17,   -9,  -39,   37,  -82,  118, -183,  259, -364,  496, -667,  891,-1191, 1613,-2260, 3408,-6171,24987,12551,-4909, 2949,-2025, 1476,-1106,  840, -641,  486, -367,  272, -201,  139, -105,   57,  -63,   18,    7,\n   17,   -9,  -40,   38,  -82,  119, -184,  260, -365,  497, -670,  894,-1195, 1618,-2266, 3416,-6183,24928,12632,-4932, 2962,-2034, 1481,-1111,  843, -643,  488, -368,  272, -202,  140, -105,   58,  -63,   18,    7,\n   17,   -9,  -40,   38,  -83,  120, -184,  261, -366,  499, -672,  897,-1198, 1623,-2272, 3425,-6195,24869,12713,-4955, 2974,-2042, 1487,-1115,  846, -645,  489, -370,  273, -202,  140, -105,   58,  -63,   18,    7,\n   17,   -8,  -40,   38,  -83,  120, -185,  262, -368,  501, -674,  899,-1202, 1627,-2278, 3434,-6207,24810,12794,-4978, 2987,-2050, 1493,-1119,  850, -647,  491, -371,  274, -203,  140, -106,   58,  -63,   18,    7,\n   17,   -8,  -40,   39,  -84,  121, -186,  263, -369,  502, -676,  902,-1205, 1632,-2285, 3442,-6218,24751,12875,-5000, 2999,-2058, 1499,-1123,  853, -650,  493, -372,  275, -203,  141, -106,   58,  -63,   17,    7,\n   17,   -8,  -41,   39,  -84,  121, -187,  264, -370,  504, -678,  905,-1209, 1636,-2291, 3450,-6229,24691,12956,-5023, 3011,-2066, 1504,-1127,  856, -652,  494, -373,  276, -204,  141, -106,   58,  -63,   17,    7,\n   16,   -8,  -41,   39,  -84,  122, -187,  265, -371,  506, -680,  907,-1212, 1641,-2296, 3458,-6240,24631,13037,-5045, 3024,-2074, 1510,-1132,  859, -654,  496, -374,  276, -204,  141, -106,   58,  -63,   17,    7,\n   16,   -7,  -41,   40,  -85,  122, -188,  266, -373,  507, -682,  910,-1216, 1645,-2302, 3466,-6251,24571,13118,-5068, 3036,-2082, 1516,-1136,  862, -656,  498, -375,  277, -205,  142, -106,   58,  -63,   17,    7,\n   16,   -7,  -41,   40,  -85,  123, -189,  267, -374,  509, -684,  912,-1219, 1649,-2308, 3474,-6261,24511,13199,-5090, 3048,-2090, 1521,-1140,  865, -659,  499, -376,  278, -205,  142, -106,   58,  -63,   17,    7,\n   16,   -7,  -42,   40,  -86,  124, -190,  268, -375,  510, -686,  915,-1222, 1654,-2313, 3481,-6271,24450,13280,-5112, 3060,-2097, 1527,-1144,  868, -661,  501, -377,  279, -206,  142, -107,   58,  -63,   17,    7,\n   16,   -7,  -42,   40,  -86,  124, -190,  269, -376,  512, -688,  917,-1225, 1658,-2319, 3489,-6281,24389,13361,-5134, 3071,-2105, 1532,-1148,  870, -663,  502, -379,  279, -206,  142, -107,   58,  -63,   17,    7,\n   16,   -7,  -42,   41,  -87,  125, -191,  270, -377,  513, -690,  920,-1228, 1662,-2324, 3496,-6290,24328,13442,-5156, 3083,-2113, 1537,-1151,  873, -665,  504, -380,  280, -207,  143, -107,   58,  -63,   17,    8,\n   16,   -6,  -42,   41,  -87,  125, -192,  271, -379,  515, -692,  922,-1231, 1666,-2330, 3503,-6300,24266,13523,-5177, 3095,-2120, 1543,-1155,  876, -667,  505, -381,  281, -207,  143, -107,   58,  -63,   17,    8,\n   16,   -6,  -43,   41,  -87,  126, -192,  272, -380,  516, -694,  924,-1234, 1670,-2335, 3510,-6309,24205,13604,-5199, 3106,-2128, 1548,-1159,  879, -669,  507, -382,  281, -208,  143, -107,   58,  -63,   17,    8,\n   16,   -6,  -43,   42,  -88,  126, -193,  273, -381,  517, -695,  927,-1237, 1674,-2340, 3517,-6317,24143,13685,-5220, 3118,-2135, 1553,-1163,  882, -671,  508, -383,  282, -208,  144, -107,   58,  -63,   16,    8,\n   16,   -6,  -43,   42,  -88,  127, -194,  274, -382,  519, -697,  929,-1240, 1678,-2345, 3524,-6326,24081,13766,-5241, 3129,-2143, 1558,-1167,  885, -673,  510, -384,  283, -209,  144, -107,   59,  -63,   16,    8,\n   16,   -6,  -43,   42,  -89,  127, -194,  274, -383,  520, -699,  931,-1243, 1681,-2350, 3531,-6334,24018,13847,-5262, 3140,-2150, 1563,-1170,  887, -675,  511, -385,  284, -209,  144, -107,   59,  -63,   16,    8,\n   16,   -5,  -44,   43,  -89,  128, -195,  275, -384,  522, -701,  934,-1246, 1685,-2355, 3537,-6342,23956,13928,-5283, 3151,-2157, 1568,-1174,  890, -677,  512, -386,  284, -210,  144, -108,   59,  -63,   16,    8,\n   16,   -5,  -44,   43,  -89,  128, -196,  276, -385,  523, -702,  936,-1249, 1689,-2359, 3543,-6349,23893,14009,-5304, 3162,-2164, 1573,-1178,  893, -679,  514, -387,  285, -210,  145, -108,   59,  -63,   16,    8,\n   16,   -5,  -44,   43,  -90,  129, -196,  277, -386,  524, -704,  938,-1252, 1692,-2364, 3549,-6357,23830,14090,-5325, 3173,-2171, 1578,-1181,  895, -681,  515, -388,  286, -210,  145, -108,   59,  -63,   16,    8,\n   16,   -5,  -44,   43,  -90,  129, -197,  278, -387,  526, -706,  940,-1254, 1696,-2369, 3555,-6364,23766,14170,-5345, 3184,-2178, 1583,-1185,  898, -683,  517, -389,  286, -211,  145, -108,   59,  -63,   16,    8,\n   16,   -5,  -45,   44,  -90,  130, -198,  278, -388,  527, -707,  942,-1257, 1699,-2373, 3561,-6371,23703,14251,-5365, 3195,-2185, 1588,-1188,  900, -685,  518, -390,  287, -211,  145, -108,   59,  -63,   16,    8,\n   15,   -4,  -45,   44,  -91,  130, -198,  279, -389,  528, -709,  944,-1259, 1702,-2377, 3567,-6377,23639,14332,-5386, 3205,-2192, 1593,-1192,  903, -687,  519, -391,  287, -212,  145, -108,   59,  -62,   16,    8,\n   15,   -4,  -45,   44,  -91,  131, -199,  280, -390,  529, -711,  946,-1262, 1705,-2382, 3573,-6384,23575,14413,-5406, 3216,-2199, 1598,-1195,  905, -688,  521, -391,  288, -212,  146, -108,   59,  -62,   15,    8,\n   15,   -4,  -45,   44,  -92,  131, -199,  281, -391,  531, -712,  948,-1264, 1709,-2386, 3578,-6390,23510,14493,-5425, 3226,-2205, 1602,-1199,  908, -690,  522, -392,  289, -212,  146, -108,   59,  -62,   15,    8,\n   15,   -4,  -46,   45,  -92,  132, -200,  282, -392,  532, -714,  950,-1267, 1712,-2390, 3583,-6396,23446,14574,-5445, 3236,-2212, 1607,-1202,  910, -692,  523, -393,  289, -213,  146, -108,   59,  -62,   15,    8,\n   15,   -4,  -46,   45,  -92,  132, -201,  282, -393,  533, -715,  952,-1269, 1715,-2394, 3589,-6401,23381,14655,-5465, 3247,-2219, 1611,-1205,  913, -694,  524, -394,  290, -213,  146, -108,   59,  -62,   15,    8,\n   15,   -3,  -46,   45,  -93,  133, -201,  283, -394,  534, -717,  954,-1272, 1718,-2398, 3594,-6407,23316,14735,-5484, 3257,-2225, 1616,-1208,  915, -695,  526, -395,  290, -213,  147, -109,   59,  -62,   15,    8,\n   15,   -3,  -46,   46,  -93,  133, -202,  284, -395,  535, -718,  955,-1274, 1721,-2401, 3598,-6412,23251,14816,-5503, 3267,-2231, 1620,-1212,  917, -697,  527, -396,  291, -214,  147, -109,   59,  -62,   15,    8,\n   15,   -3,  -46,   46,  -93,  133, -202,  284, -396,  536, -719,  957,-1276, 1724,-2405, 3603,-6416,23186,14896,-5522, 3277,-2238, 1625,-1215,  920, -699,  528, -397,  292, -214,  147, -109,   59,  -62,   15,    8,\n   15,   -3,  -47,   46,  -94,  134, -203,  285, -397,  537, -721,  959,-1278, 1726,-2409, 3608,-6421,23120,14977,-5541, 3286,-2244, 1629,-1218,  922, -701,  529, -397,  292, -214,  147, -109,   59,  -62,   15,    8,\n   15,   -3,  -47,   46,  -94,  134, -203,  286, -398,  539, -722,  960,-1280, 1729,-2412, 3612,-6425,23054,15057,-5560, 3296,-2250, 1633,-1221,  924, -702,  530, -398,  293, -215,  147, -109,   59,  -62,   14,    9,\n   15,   -3,  -47,   47,  -94,  135, -204,  286, -398,  540, -723,  962,-1282, 1732,-2416, 3616,-6429,22988,15138,-5579, 3306,-2256, 1638,-1224,  927, -704,  532, -399,  293, -215,  147, -109,   59,  -62,   14,    9,\n   15,   -2,  -47,   47,  -95,  135, -205,  287, -399,  541, -725,  964,-1285, 1734,-2419, 3620,-6433,22922,15218,-5597, 3315,-2262, 1642,-1227,  929, -705,  533, -400,  294, -215,  148, -109,   59,  -62,   14,    9,\n   15,   -2,  -48,   47,  -95,  136, -205,  288, -400,  542, -726,  965,-1286, 1737,-2422, 3624,-6436,22855,15298,-5615, 3324,-2268, 1646,-1230,  931, -707,  534, -401,  294, -216,  148, -109,   59,  -62,   14,    9,\n   15,   -2,  -48,   47,  -95,  136, -206,  288, -401,  543, -727,  967,-1288, 1739,-2425, 3628,-6440,22788,15379,-5633, 3334,-2274, 1650,-1233,  933, -708,  535, -401,  295, -216,  148, -109,   59,  -62,   14,    9,\n   15,   -2,  -48,   48,  -96,  136, -206,  289, -402,  544, -728,  968,-1290, 1742,-2428, 3632,-6443,22721,15459,-5651, 3343,-2280, 1654,-1236,  935, -710,  536, -402,  295, -216,  148, -109,   59,  -62,   14,    9,\n   15,   -2,  -48,   48,  -96,  137, -207,  290, -402,  544, -729,  970,-1292, 1744,-2431, 3636,-6445,22654,15539,-5669, 3352,-2285, 1658,-1239,  937, -711,  537, -403,  296, -216,  148, -109,   59,  -62,   14,    9,\n   14,   -1,  -48,   48,  -96,  137, -207,  290, -403,  545, -731,  971,-1294, 1746,-2434, 3639,-6448,22587,15619,-5687, 3361,-2291, 1662,-1241,  939, -713,  538, -404,  296, -217,  148, -109,   59,  -62,   14,    9,\n   14,   -1,  -49,   48,  -97,  138, -208,  291, -404,  546, -732,  973,-1296, 1748,-2437, 3642,-6450,22519,15699,-5704, 3369,-2297, 1666,-1244,  941, -714,  539, -404,  296, -217,  149, -109,   59,  -62,   13,    9,\n   14,   -1,  -49,   48,  -97,  138, -208,  291, -405,  547, -733,  974,-1297, 1750,-2439, 3645,-6452,22452,15779,-5721, 3378,-2302, 1669,-1247,  943, -716,  540, -405,  297, -217,  149, -109,   59,  -61,   13,    9,\n   14,   -1,  -49,   49,  -97,  138, -208,  292, -405,  548, -734,  975,-1299, 1752,-2442, 3648,-6454,22384,15859,-5738, 3387,-2307, 1673,-1250,  945, -717,  541, -406,  297, -218,  149, -109,   59,  -61,   13,    9,\n   14,   -1,  -49,   49,  -98,  139, -209,  293, -406,  549, -735,  976,-1300, 1754,-2444, 3651,-6455,22315,15939,-5755, 3395,-2313, 1677,-1252,  947, -718,  542, -406,  298, -218,  149, -109,   59,  -61,   13,    9,\n   14,    0,  -49,   49,  -98,  139, -209,  293, -407,  550, -736,  978,-1302, 1756,-2447, 3654,-6457,22247,16018,-5772, 3403,-2318, 1680,-1255,  949, -720,  543, -407,  298, -218,  149, -109,   59,  -61,   13,    9,\n   14,    0,  -50,   49,  -98,  139, -210,  294, -407,  550, -737,  979,-1303, 1758,-2449, 3656,-6458,22178,16098,-5788, 3412,-2323, 1684,-1257,  951, -721,  544, -407,  299, -218,  149, -109,   59,  -61,   13,    9,\n   14,    0,  -50,   50,  -98,  140, -210,  294, -408,  551, -738,  980,-1305, 1760,-2451, 3659,-6459,22110,16178,-5805, 3420,-2328, 1687,-1260,  952, -722,  545, -408,  299, -218,  149, -109,   59,  -61,   13,    9,\n   14,    0,  -50,   50,  -99,  140, -211,  295, -408,  552, -739,  981,-1306, 1762,-2453, 3661,-6459,22041,16257,-5821, 3428,-2333, 1691,-1262,  954, -724,  546, -409,  299, -219,  149, -109,   59,  -61,   13,    9,\n   14,    0,  -50,   50,  -99,  140, -211,  295, -409,  553, -740,  982,-1308, 1763,-2455, 3663,-6459,21971,16337,-5837, 3435,-2338, 1694,-1265,  956, -725,  547, -409,  300, -219,  149, -109,   59,  -61,   12,    9,\n   14,    0,  -50,   50,  -99,  141, -212,  296, -410,  553, -740,  983,-1309, 1765,-2457, 3665,-6459,21902,16416,-5853, 3443,-2343, 1697,-1267,  958, -726,  547, -410,  300, -219,  149, -109,   59,  -61,   12,    9,\n   14,    1,  -51,   50, -100,  141, -212,  296, -410,  554, -741,  984,-1310, 1766,-2459, 3667,-6459,21832,16496,-5868, 3451,-2347, 1700,-1269,  959, -727,  548, -410,  300, -219,  150, -109,   59,  -61,   12,   10,\n   14,    1,  -51,   51, -100,  141, -212,  297, -411,  555, -742,  985,-1311, 1768,-2460, 3669,-6459,21763,16575,-5884, 3458,-2352, 1704,-1271,  961, -728,  549, -411,  301, -219,  150, -109,   59,  -61,   12,   10,\n   14,    1,  -51,   51, -100,  142, -213,  297, -411,  555, -743,  986,-1312, 1769,-2462, 3670,-6458,21693,16654,-5899, 3466,-2357, 1707,-1274,  962, -730,  550, -411,  301, -220,  150, -109,   59,  -61,   12,   10,\n   14,    1,  -51,   51, -100,  142, -213,  297, -412,  556, -743,  987,-1313, 1770,-2463, 3672,-6457,21623,16733,-5914, 3473,-2361, 1710,-1276,  964, -731,  551, -412,  301, -220,  150, -109,   59,  -60,   12,   10,\n   14,    1,  -51,   51, -101,  142, -213,  298, -412,  557, -744,  988,-1314, 1771,-2465, 3673,-6456,21552,16812,-5929, 3480,-2366, 1713,-1278,  965, -732,  551, -412,  302, -220,  150, -109,   59,  -60,   12,   10,\n   13,    2,  -52,   51, -101,  143, -214,  298, -413,  557, -745,  989,-1315, 1773,-2466, 3674,-6454,21482,16891,-5944, 3487,-2370, 1716,-1280,  967, -733,  552, -413,  302, -220,  150, -109,   59,  -60,   11,   10,\n   13,    2,  -52,   52, -101,  143, -214,  299, -413,  558, -746,  989,-1316, 1774,-2467, 3675,-6453,21411,16970,-5959, 3494,-2374, 1719,-1282,  968, -734,  553, -413,  302, -220,  150, -109,   59,  -60,   11,   10,\n   13,    2,  -52,   52, -101,  143, -214,  299, -414,  558, -746,  990,-1317, 1775,-2468, 3676,-6451,21340,17049,-5973, 3501,-2378, 1721,-1284,  970, -735,  553, -414,  302, -220,  150, -109,   59,  -60,   11,   10,\n   13,    2,  -52,   52, -102,  143, -215,  299, -414,  559, -747,  991,-1318, 1776,-2469, 3677,-6449,21269,17127,-5987, 3508,-2382, 1724,-1286,  971, -736,  554, -414,  303, -220,  150, -109,   59,  -60,   11,   10,\n   13,    2,  -52,   52, -102,  144, -215,  300, -415,  559, -747,  991,-1319, 1776,-2470, 3677,-6446,21198,17206,-6001, 3514,-2386, 1727,-1288,  973, -737,  555, -415,  303, -221,  150, -109,   59,  -60,   11,   10,\n   13,    2,  -53,   52, -102,  144, -215,  300, -415,  560, -748,  992,-1319, 1777,-2471, 3678,-6444,21126,17284,-6015, 3520,-2390, 1729,-1290,  974, -738,  555, -415,  303, -221,  150, -109,   59,  -60,   11,   10,\n   13,    3,  -53,   53, -102,  144, -216,  301, -415,  560, -748,  993,-1320, 1778,-2472, 3678,-6441,21055,17363,-6028, 3527,-2394, 1732,-1291,  975, -738,  556, -415,  303, -221,  150, -109,   58,  -60,   11,   10,\n   13,    3,  -53,   53, -103,  145, -216,  301, -416,  561, -749,  993,-1321, 1779,-2472, 3678,-6438,20983,17441,-6042, 3533,-2398, 1734,-1293,  976, -739,  556, -416,  304, -221,  150, -109,   58,  -60,   10,   10,\n   13,    3,  -53,   53, -103,  145, -216,  301, -416,  561, -749,  994,-1321, 1779,-2473, 3678,-6434,20911,17519,-6055, 3539,-2401, 1737,-1295,  978, -740,  557, -416,  304, -221,  150, -109,   58,  -59,   10,   10,\n   13,    3,  -53,   53, -103,  145, -217,  302, -416,  561, -750,  994,-1322, 1780,-2473, 3678,-6431,20839,17597,-6068, 3545,-2405, 1739,-1296,  979, -741,  558, -416,  304, -221,  150, -109,   58,  -59,   10,   10,\n   13,    3,  -53,   53, -103,  145, -217,  302, -417,  562, -750,  995,-1322, 1780,-2474, 3678,-6427,20767,17675,-6081, 3551,-2408, 1742,-1298,  980, -742,  558, -417,  304, -221,  150, -109,   58,  -59,   10,   10,\n   13,    4,  -54,   53, -104,  145, -217,  302, -417,  562, -750,  995,-1323, 1781,-2474, 3677,-6423,20694,17753,-6093, 3556,-2412, 1744,-1300,  981, -743,  559, -417,  304, -221,  150, -109,   58,  -59,   10,   10,\n   13,    4,  -54,   54, -104,  146, -217,  302, -417,  562, -751,  995,-1323, 1781,-2474, 3677,-6419,20621,17831,-6106, 3562,-2415, 1746,-1301,  982, -743,  559, -417,  305, -221,  150, -109,   58,  -59,   10,   11,\n   13,    4,  -54,   54, -104,  146, -218,  303, -418,  563, -751,  996,-1323, 1781,-2474, 3676,-6414,20549,17909,-6118, 3567,-2418, 1748,-1303,  983, -744,  560, -418,  305, -221,  150, -109,   58,  -59,   10,   11,\n   13,    4,  -54,   54, -104,  146, -218,  303, -418,  563, -751,  996,-1323, 1781,-2474, 3675,-6409,20476,17986,-6130, 3573,-2421, 1750,-1304,  984, -745,  560, -418,  305, -221,  150, -109,   58,  -59,    9,   11,\n   13,    4,  -54,   54, -104,  146, -218,  303, -418,  563, -752,  996,-1324, 1781,-2474, 3674,-6405,20403,18064,-6142, 3578,-2424, 1752,-1305,  985, -745,  560, -418,  305, -221,  150, -109,   58,  -59,    9,   11,\n   12,    4,  -54,   54, -105,  147, -218,  303, -418,  563, -752,  996,-1324, 1781,-2474, 3673,-6399,20329,18141,-6154, 3583,-2427, 1754,-1307,  986, -746,  561, -418,  305, -221,  150, -109,   58,  -59,    9,   11,\n   12,    5,  -55,   54, -105,  147, -219,  304, -419,  564, -752,  996,-1324, 1781,-2473, 3672,-6394,20256,18218,-6165, 3588,-2430, 1756,-1308,  987, -747,  561, -419,  305, -221,  150, -108,   58,  -58,    9,   11,\n   12,    5,  -55,   55, -105,  147, -219,  304, -419,  564, -752,  997,-1324, 1781,-2473, 3670,-6388,20182,18296,-6176, 3593,-2433, 1758,-1309,  988, -747,  562, -419,  305, -221,  150, -108,   58,  -58,    9,   11,\n   12,    5,  -55,   55, -105,  147, -219,  304, -419,  564, -752,  997,-1324, 1781,-2472, 3669,-6382,20108,18373,-6187, 3597,-2436, 1759,-1310,  988, -748,  562, -419,  305, -221,  150, -108,   57,  -58,    9,   11,\n   12,    5,  -55,   55, -105,  147, -219,  304, -419,  564, -752,  997,-1324, 1781,-2472, 3667,-6376,20035,18449,-6198, 3602,-2438, 1761,-1312,  989, -748,  562, -419,  305, -221,  150, -108,   57,  -58,    8,   11,\n   12,    5,  -55,   55, -105,  148, -219,  304, -419,  564, -752,  997,-1324, 1781,-2471, 3666,-6370,19960,18526,-6209, 3606,-2441, 1763,-1313,  990, -749,  563, -419,  305, -221,  150, -108,   57,  -58,    8,   11,\n   12,    5,  -55,   55, -106,  148, -220,  305, -420,  564, -753,  997,-1324, 1780,-2470, 3664,-6364,19886,18603,-6219, 3611,-2443, 1764,-1314,  991, -749,  563, -420,  306, -221,  150, -108,   57,  -58,    8,   11,\n   12,    6,  -56,   55, -106,  148, -220,  305, -420,  564, -753,  997,-1323, 1780,-2469, 3662,-6357,19812,18679,-6229, 3615,-2445, 1766,-1315,  991, -749,  563, -420,  306, -221,  150, -108,   57,  -58,    8,   11,\n   12,    6,  -56,   55, -106,  148, -220,  305, -420,  564, -753,  997,-1323, 1779,-2468, 3659,-6350,19737,18756,-6239, 3619,-2448, 1767,-1316,  992, -750,  563, -420,  306, -221,  150, -108,   57,  -58,    8,   11,\n   12,    6,  -56,   56, -106,  148, -220,  305, -420,  564, -752,  996,-1323, 1779,-2467, 3657,-6343,19663,18832,-6249, 3623,-2450, 1768,-1316,  992, -750,  564, -420,  306, -221,  149, -108,   57,  -57,    8,   11,\n   12,    6,  -56,   56, -106,  148, -220,  305, -420,  564, -752,  996,-1323, 1778,-2466, 3655,-6335,19588,18908,-6259, 3627,-2452, 1770,-1317,  993, -751,  564, -420,  306, -221,  149, -107,   57,  -57,    8,   11,\n   12,    6,  -56,   56, -106,  148, -220,  305, -420,  564, -752,  996,-1322, 1778,-2465, 3652,-6328,19513,18984,-6268, 3630,-2454, 1771,-1318,  993, -751,  564, -420,  306, -221,  149, -107,   57,  -57,    7,   11,\n   12,    6,  -56,   56, -107,  149, -220,  305, -420,  564, -752,  996,-1322, 1777,-2464, 3649,-6320,19438,19060,-6277, 3634,-2456, 1772,-1319,  994, -751,  564, -420,  306, -221,  149, -107,   57,  -57,    7,   11,\n   12,    7,  -56,   56, -107,  149, -221,  305, -420,  564, -752,  995,-1321, 1776,-2462, 3646,-6312,19363,19136,-6286, 3637,-2457, 1773,-1319,  994, -751,  564, -420,  305, -221,  149, -107,   56,  -57,    7,   12,\n   12,    7,  -57,   56, -107,  149, -221,  305, -420,  564, -752,  995,-1321, 1775,-2461, 3644,-6303,19287,19212,-6295, 3640,-2459, 1774,-1320,  995, -752,  564, -420,  305, -221,  149, -107,   56,  -57,    7,   12,\n   12,    7,  -57,   56, -107,  149, -221,  305, -420,  564, -752,  995,-1320, 1774,-2459, 3640,-6295,19212,19287,-6303, 3644,-2461, 1775,-1321,  995, -752,  564, -420,  305, -221,  149, -107,   56,  -57,    7,   12,\n   12,    7,  -57,   56, -107,  149, -221,  305, -420,  564, -751,  994,-1319, 1773,-2457, 3637,-6286,19136,19363,-6312, 3646,-2462, 1776,-1321,  995, -752,  564, -420,  305, -221,  149, -107,   56,  -56,    7,   12,\n   11,    7,  -57,   57, -107,  149, -221,  306, -420,  564, -751,  994,-1319, 1772,-2456, 3634,-6277,19060,19438,-6320, 3649,-2464, 1777,-1322,  996, -752,  564, -420,  305, -220,  149, -107,   56,  -56,    6,   12,\n   11,    7,  -57,   57, -107,  149, -221,  306, -420,  564, -751,  993,-1318, 1771,-2454, 3630,-6268,18984,19513,-6328, 3652,-2465, 1778,-1322,  996, -752,  564, -420,  305, -220,  148, -106,   56,  -56,    6,   12,\n   11,    8,  -57,   57, -107,  149, -221,  306, -420,  564, -751,  993,-1317, 1770,-2452, 3627,-6259,18908,19588,-6335, 3655,-2466, 1778,-1323,  996, -752,  564, -420,  305, -220,  148, -106,   56,  -56,    6,   12,\n   11,    8,  -57,   57, -108,  149, -221,  306, -420,  564, -750,  992,-1316, 1768,-2450, 3623,-6249,18832,19663,-6343, 3657,-2467, 1779,-1323,  996, -752,  564, -420,  305, -220,  148, -106,   56,  -56,    6,   12,\n   11,    8,  -58,   57, -108,  150, -221,  306, -420,  563, -750,  992,-1316, 1767,-2448, 3619,-6239,18756,19737,-6350, 3659,-2468, 1779,-1323,  997, -753,  564, -420,  305, -220,  148, -106,   55,  -56,    6,   12,\n   11,    8,  -58,   57, -108,  150, -221,  306, -420,  563, -749,  991,-1315, 1766,-2445, 3615,-6229,18679,19812,-6357, 3662,-2469, 1780,-1323,  997, -753,  564, -420,  305, -220,  148, -106,   55,  -56,    6,   12,\n   11,    8,  -58,   57, -108,  150, -221,  306, -420,  563, -749,  991,-1314, 1764,-2443, 3611,-6219,18603,19886,-6364, 3664,-2470, 1780,-1324,  997, -753,  564, -420,  305, -220,  148, -106,   55,  -55,    5,   12,\n   11,    8,  -58,   57, -108,  150, -221,  305, -419,  563, -749,  990,-1313, 1763,-2441, 3606,-6209,18526,19960,-6370, 3666,-2471, 1781,-1324,  997, -752,  564, -419,  304, -219,  148, -105,   55,  -55,    5,   12,\n   11,    8,  -58,   57, -108,  150, -221,  305, -419,  562, -748,  989,-1312, 1761,-2438, 3602,-6198,18449,20035,-6376, 3667,-2472, 1781,-1324,  997, -752,  564, -419,  304, -219,  147, -105,   55,  -55,    5,   12,\n   11,    9,  -58,   57, -108,  150, -221,  305, -419,  562, -748,  988,-1310, 1759,-2436, 3597,-6187,18373,20108,-6382, 3669,-2472, 1781,-1324,  997, -752,  564, -419,  304, -219,  147, -105,   55,  -55,    5,   12,\n   11,    9,  -58,   58, -108,  150, -221,  305, -419,  562, -747,  988,-1309, 1758,-2433, 3593,-6176,18296,20182,-6388, 3670,-2473, 1781,-1324,  997, -752,  564, -419,  304, -219,  147, -105,   55,  -55,    5,   12,\n   11,    9,  -58,   58, -108,  150, -221,  305, -419,  561, -747,  987,-1308, 1756,-2430, 3588,-6165,18218,20256,-6394, 3672,-2473, 1781,-1324,  996, -752,  564, -419,  304, -219,  147, -105,   54,  -55,    5,   12,\n   11,    9,  -59,   58, -109,  150, -221,  305, -418,  561, -746,  986,-1307, 1754,-2427, 3583,-6154,18141,20329,-6399, 3673,-2474, 1781,-1324,  996, -752,  563, -418,  303, -218,  147, -105,   54,  -54,    4,   12,\n   11,    9,  -59,   58, -109,  150, -221,  305, -418,  560, -745,  985,-1305, 1752,-2424, 3578,-6142,18064,20403,-6405, 3674,-2474, 1781,-1324,  996, -752,  563, -418,  303, -218,  146, -104,   54,  -54,    4,   13,\n   11,    9,  -59,   58, -109,  150, -221,  305, -418,  560, -745,  984,-1304, 1750,-2421, 3573,-6130,17986,20476,-6409, 3675,-2474, 1781,-1323,  996, -751,  563, -418,  303, -218,  146, -104,   54,  -54,    4,   13,\n   11,   10,  -59,   58, -109,  150, -221,  305, -418,  560, -744,  983,-1303, 1748,-2418, 3567,-6118,17909,20549,-6414, 3676,-2474, 1781,-1323,  996, -751,  563, -418,  303, -218,  146, -104,   54,  -54,    4,   13,\n   11,   10,  -59,   58, -109,  150, -221,  305, -417,  559, -743,  982,-1301, 1746,-2415, 3562,-6106,17831,20621,-6419, 3677,-2474, 1781,-1323,  995, -751,  562, -417,  302, -217,  146, -104,   54,  -54,    4,   13,\n   10,   10,  -59,   58, -109,  150, -221,  304, -417,  559, -743,  981,-1300, 1744,-2412, 3556,-6093,17753,20694,-6423, 3677,-2474, 1781,-1323,  995, -750,  562, -417,  302, -217,  145, -104,   53,  -54,    4,   13,\n   10,   10,  -59,   58, -109,  150, -221,  304, -417,  558, -742,  980,-1298, 1742,-2408, 3551,-6081,17675,20767,-6427, 3678,-2474, 1780,-1322,  995, -750,  562, -417,  302, -217,  145, -103,   53,  -53,    3,   13,\n   10,   10,  -59,   58, -109,  150, -221,  304, -416,  558, -741,  979,-1296, 1739,-2405, 3545,-6068,17597,20839,-6431, 3678,-2473, 1780,-1322,  994, -750,  561, -416,  302, -217,  145, -103,   53,  -53,    3,   13,\n   10,   10,  -59,   58, -109,  150, -221,  304, -416,  557, -740,  978,-1295, 1737,-2401, 3539,-6055,17519,20911,-6434, 3678,-2473, 1779,-1321,  994, -749,  561, -416,  301, -216,  145, -103,   53,  -53,    3,   13,\n   10,   10,  -60,   58, -109,  150, -221,  304, -416,  556, -739,  976,-1293, 1734,-2398, 3533,-6042,17441,20983,-6438, 3678,-2472, 1779,-1321,  993, -749,  561, -416,  301, -216,  145, -103,   53,  -53,    3,   13,\n   10,   11,  -60,   58, -109,  150, -221,  303, -415,  556, -738,  975,-1291, 1732,-2394, 3527,-6028,17363,21055,-6441, 3678,-2472, 1778,-1320,  993, -748,  560, -415,  301, -216,  144, -102,   53,  -53,    3,   13,\n   10,   11,  -60,   59, -109,  150, -221,  303, -415,  555, -738,  974,-1290, 1729,-2390, 3520,-6015,17284,21126,-6444, 3678,-2471, 1777,-1319,  992, -748,  560, -415,  300, -215,  144, -102,   52,  -53,    2,   13,\n   10,   11,  -60,   59, -109,  150, -221,  303, -415,  555, -737,  973,-1288, 1727,-2386, 3514,-6001,17206,21198,-6446, 3677,-2470, 1776,-1319,  991, -747,  559, -415,  300, -215,  144, -102,   52,  -52,    2,   13,\n   10,   11,  -60,   59, -109,  150, -220,  303, -414,  554, -736,  971,-1286, 1724,-2382, 3508,-5987,17127,21269,-6449, 3677,-2469, 1776,-1318,  991, -747,  559, -414,  299, -215,  143, -102,   52,  -52,    2,   13,\n   10,   11,  -60,   59, -109,  150, -220,  302, -414,  553, -735,  970,-1284, 1721,-2378, 3501,-5973,17049,21340,-6451, 3676,-2468, 1775,-1317,  990, -746,  558, -414,  299, -214,  143, -101,   52,  -52,    2,   13,\n   10,   11,  -60,   59, -109,  150, -220,  302, -413,  553, -734,  968,-1282, 1719,-2374, 3494,-5959,16970,21411,-6453, 3675,-2467, 1774,-1316,  989, -746,  558, -413,  299, -214,  143, -101,   52,  -52,    2,   13,\n   10,   11,  -60,   59, -109,  150, -220,  302, -413,  552, -733,  967,-1280, 1716,-2370, 3487,-5944,16891,21482,-6454, 3674,-2466, 1773,-1315,  989, -745,  557, -413,  298, -214,  143, -101,   51,  -52,    2,   13,\n   10,   12,  -60,   59, -109,  150, -220,  302, -412,  551, -732,  965,-1278, 1713,-2366, 3480,-5929,16812,21552,-6456, 3673,-2465, 1771,-1314,  988, -744,  557, -412,  298, -213,  142, -101,   51,  -51,    1,   14,\n   10,   12,  -60,   59, -109,  150, -220,  301, -412,  551, -731,  964,-1276, 1710,-2361, 3473,-5914,16733,21623,-6457, 3672,-2463, 1770,-1313,  987, -743,  556, -412,  297, -213,  142, -100,   51,  -51,    1,   14,\n   10,   12,  -61,   59, -109,  150, -220,  301, -411,  550, -730,  962,-1274, 1707,-2357, 3466,-5899,16654,21693,-6458, 3670,-2462, 1769,-1312,  986, -743,  555, -411,  297, -213,  142, -100,   51,  -51,    1,   14,\n   10,   12,  -61,   59, -109,  150, -219,  301, -411,  549, -728,  961,-1271, 1704,-2352, 3458,-5884,16575,21763,-6459, 3669,-2460, 1768,-1311,  985, -742,  555, -411,  297, -212,  141, -100,   51,  -51,    1,   14,\n   10,   12,  -61,   59, -109,  150, -219,  300, -410,  548, -727,  959,-1269, 1700,-2347, 3451,-5868,16496,21832,-6459, 3667,-2459, 1766,-1310,  984, -741,  554, -410,  296, -212,  141, -100,   50,  -51,    1,   14,\n    9,   12,  -61,   59, -109,  149, -219,  300, -410,  547, -726,  958,-1267, 1697,-2343, 3443,-5853,16416,21902,-6459, 3665,-2457, 1765,-1309,  983, -740,  553, -410,  296, -212,  141,  -99,   50,  -50,    0,   14,\n    9,   12,  -61,   59, -109,  149, -219,  300, -409,  547, -725,  956,-1265, 1694,-2338, 3435,-5837,16337,21971,-6459, 3663,-2455, 1763,-1308,  982, -740,  553, -409,  295, -211,  140,  -99,   50,  -50,    0,   14,\n    9,   13,  -61,   59, -109,  149, -219,  299, -409,  546, -724,  954,-1262, 1691,-2333, 3428,-5821,16257,22041,-6459, 3661,-2453, 1762,-1306,  981, -739,  552, -408,  295, -211,  140,  -99,   50,  -50,    0,   14,\n    9,   13,  -61,   59, -109,  149, -218,  299, -408,  545, -722,  952,-1260, 1687,-2328, 3420,-5805,16178,22110,-6459, 3659,-2451, 1760,-1305,  980, -738,  551, -408,  294, -210,  140,  -98,   50,  -50,    0,   14,\n    9,   13,  -61,   59, -109,  149, -218,  299, -407,  544, -721,  951,-1257, 1684,-2323, 3412,-5788,16098,22178,-6458, 3656,-2449, 1758,-1303,  979, -737,  550, -407,  294, -210,  139,  -98,   49,  -50,    0,   14,\n    9,   13,  -61,   59, -109,  149, -218,  298, -407,  543, -720,  949,-1255, 1680,-2318, 3403,-5772,16018,22247,-6457, 3654,-2447, 1756,-1302,  978, -736,  550, -407,  293, -209,  139,  -98,   49,  -49,    0,   14,\n    9,   13,  -61,   59, -109,  149, -218,  298, -406,  542, -718,  947,-1252, 1677,-2313, 3395,-5755,15939,22315,-6455, 3651,-2444, 1754,-1300,  976, -735,  549, -406,  293, -209,  139,  -98,   49,  -49,   -1,   14,\n    9,   13,  -61,   59, -109,  149, -218,  297, -406,  541, -717,  945,-1250, 1673,-2307, 3387,-5738,15859,22384,-6454, 3648,-2442, 1752,-1299,  975, -734,  548, -405,  292, -208,  138,  -97,   49,  -49,   -1,   14,\n    9,   13,  -61,   59, -109,  149, -217,  297, -405,  540, -716,  943,-1247, 1669,-2302, 3378,-5721,15779,22452,-6452, 3645,-2439, 1750,-1297,  974, -733,  547, -405,  291, -208,  138,  -97,   48,  -49,   -1,   14,\n    9,   13,  -62,   59, -109,  149, -217,  296, -404,  539, -714,  941,-1244, 1666,-2297, 3369,-5704,15699,22519,-6450, 3642,-2437, 1748,-1296,  973, -732,  546, -404,  291, -208,  138,  -97,   48,  -49,   -1,   14,\n    9,   14,  -62,   59, -109,  148, -217,  296, -404,  538, -713,  939,-1241, 1662,-2291, 3361,-5687,15619,22587,-6448, 3639,-2434, 1746,-1294,  971, -731,  545, -403,  290, -207,  137,  -96,   48,  -48,   -1,   14,\n    9,   14,  -62,   59, -109,  148, -216,  296, -403,  537, -711,  937,-1239, 1658,-2285, 3352,-5669,15539,22654,-6445, 3636,-2431, 1744,-1292,  970, -729,  544, -402,  290, -207,  137,  -96,   48,  -48,   -2,   15,\n    9,   14,  -62,   59, -109,  148, -216,  295, -402,  536, -710,  935,-1236, 1654,-2280, 3343,-5651,15459,22721,-6443, 3632,-2428, 1742,-1290,  968, -728,  544, -402,  289, -206,  136,  -96,   48,  -48,   -2,   15,\n    9,   14,  -62,   59, -109,  148, -216,  295, -401,  535, -708,  933,-1233, 1650,-2274, 3334,-5633,15379,22788,-6440, 3628,-2425, 1739,-1288,  967, -727,  543, -401,  288, -206,  136,  -95,   47,  -48,   -2,   15,\n    9,   14,  -62,   59, -109,  148, -216,  294, -401,  534, -707,  931,-1230, 1646,-2268, 3324,-5615,15298,22855,-6436, 3624,-2422, 1737,-1286,  965, -726,  542, -400,  288, -205,  136,  -95,   47,  -48,   -2,   15,\n    9,   14,  -62,   59, -109,  148, -215,  294, -400,  533, -705,  929,-1227, 1642,-2262, 3315,-5597,15218,22922,-6433, 3620,-2419, 1734,-1285,  964, -725,  541, -399,  287, -205,  135,  -95,   47,  -47,   -2,   15,\n    9,   14,  -62,   59, -109,  147, -215,  293, -399,  532, -704,  927,-1224, 1638,-2256, 3306,-5579,15138,22988,-6429, 3616,-2416, 1732,-1282,  962, -723,  540, -398,  286, -204,  135,  -94,   47,  -47,   -3,   15,\n    9,   14,  -62,   59, -109,  147, -215,  293, -398,  530, -702,  924,-1221, 1633,-2250, 3296,-5560,15057,23054,-6425, 3612,-2412, 1729,-1280,  960, -722,  539, -398,  286, -203,  134,  -94,   46,  -47,   -3,   15,\n    8,   15,  -62,   59, -109,  147, -214,  292, -397,  529, -701,  922,-1218, 1629,-2244, 3286,-5541,14977,23120,-6421, 3608,-2409, 1726,-1278,  959, -721,  537, -397,  285, -203,  134,  -94,   46,  -47,   -3,   15,\n    8,   15,  -62,   59, -109,  147, -214,  292, -397,  528, -699,  920,-1215, 1625,-2238, 3277,-5522,14896,23186,-6416, 3603,-2405, 1724,-1276,  957, -719,  536, -396,  284, -202,  133,  -93,   46,  -46,   -3,   15,\n    8,   15,  -62,   59, -109,  147, -214,  291, -396,  527, -697,  917,-1212, 1620,-2231, 3267,-5503,14816,23251,-6412, 3598,-2401, 1721,-1274,  955, -718,  535, -395,  284, -202,  133,  -93,   46,  -46,   -3,   15,\n    8,   15,  -62,   59, -109,  147, -213,  290, -395,  526, -695,  915,-1208, 1616,-2225, 3257,-5484,14735,23316,-6407, 3594,-2398, 1718,-1272,  954, -717,  534, -394,  283, -201,  133,  -93,   45,  -46,   -3,   15,\n    8,   15,  -62,   59, -108,  146, -213,  290, -394,  524, -694,  913,-1205, 1611,-2219, 3247,-5465,14655,23381,-6401, 3589,-2394, 1715,-1269,  952, -715,  533, -393,  282, -201,  132,  -92,   45,  -46,   -4,   15,\n    8,   15,  -62,   59, -108,  146, -213,  289, -393,  523, -692,  910,-1202, 1607,-2212, 3236,-5445,14574,23446,-6396, 3583,-2390, 1712,-1267,  950, -714,  532, -392,  282, -200,  132,  -92,   45,  -46,   -4,   15,\n    8,   15,  -62,   59, -108,  146, -212,  289, -392,  522, -690,  908,-1199, 1602,-2205, 3226,-5425,14493,23510,-6390, 3578,-2386, 1709,-1264,  948, -712,  531, -391,  281, -199,  131,  -92,   44,  -45,   -4,   15,\n    8,   15,  -62,   59, -108,  146, -212,  288, -391,  521, -688,  905,-1195, 1598,-2199, 3216,-5406,14413,23575,-6384, 3573,-2382, 1705,-1262,  946, -711,  529, -390,  280, -199,  131,  -91,   44,  -45,   -4,   15,\n    8,   16,  -62,   59, -108,  145, -212,  287, -391,  519, -687,  903,-1192, 1593,-2192, 3205,-5386,14332,23639,-6377, 3567,-2377, 1702,-1259,  944, -709,  528, -389,  279, -198,  130,  -91,   44,  -45,   -4,   15,\n    8,   16,  -63,   59, -108,  145, -211,  287, -390,  518, -685,  900,-1188, 1588,-2185, 3195,-5365,14251,23703,-6371, 3561,-2373, 1699,-1257,  942, -707,  527, -388,  278, -198,  130,  -90,   44,  -45,   -5,   16,\n    8,   16,  -63,   59, -108,  145, -211,  286, -389,  517, -683,  898,-1185, 1583,-2178, 3184,-5345,14170,23766,-6364, 3555,-2369, 1696,-1254,  940, -706,  526, -387,  278, -197,  129,  -90,   43,  -44,   -5,   16,\n    8,   16,  -63,   59, -108,  145, -210,  286, -388,  515, -681,  895,-1181, 1578,-2171, 3173,-5325,14090,23830,-6357, 3549,-2364, 1692,-1252,  938, -704,  524, -386,  277, -196,  129,  -90,   43,  -44,   -5,   16,\n    8,   16,  -63,   59, -108,  145, -210,  285, -387,  514, -679,  893,-1178, 1573,-2164, 3162,-5304,14009,23893,-6349, 3543,-2359, 1689,-1249,  936, -702,  523, -385,  276, -196,  128,  -89,   43,  -44,   -5,   16,\n    8,   16,  -63,   59, -108,  144, -210,  284, -386,  512, -677,  890,-1174, 1568,-2157, 3151,-5283,13928,23956,-6342, 3537,-2355, 1685,-1246,  934, -701,  522, -384,  275, -195,  128,  -89,   43,  -44,   -5,   16,\n    8,   16,  -63,   59, -107,  144, -209,  284, -385,  511, -675,  887,-1170, 1563,-2150, 3140,-5262,13847,24018,-6334, 3531,-2350, 1681,-1243,  931, -699,  520, -383,  274, -194,  127,  -89,   42,  -43,   -6,   16,\n    8,   16,  -63,   59, -107,  144, -209,  283, -384,  510, -673,  885,-1167, 1558,-2143, 3129,-5241,13766,24081,-6326, 3524,-2345, 1678,-1240,  929, -697,  519, -382,  274, -194,  127,  -88,   42,  -43,   -6,   16,\n    8,   16,  -63,   58, -107,  144, -208,  282, -383,  508, -671,  882,-1163, 1553,-2135, 3118,-5220,13685,24143,-6317, 3517,-2340, 1674,-1237,  927, -695,  517, -381,  273, -193,  126,  -88,   42,  -43,   -6,   16,\n    8,   17,  -63,   58, -107,  143, -208,  281, -382,  507, -669,  879,-1159, 1548,-2128, 3106,-5199,13604,24205,-6309, 3510,-2335, 1670,-1234,  924, -694,  516, -380,  272, -192,  126,  -87,   41,  -43,   -6,   16,\n    8,   17,  -63,   58, -107,  143, -207,  281, -381,  505, -667,  876,-1155, 1543,-2120, 3095,-5177,13523,24266,-6300, 3503,-2330, 1666,-1231,  922, -692,  515, -379,  271, -192,  125,  -87,   41,  -42,   -6,   16,\n    8,   17,  -63,   58, -107,  143, -207,  280, -380,  504, -665,  873,-1151, 1537,-2113, 3083,-5156,13442,24328,-6290, 3496,-2324, 1662,-1228,  920, -690,  513, -377,  270, -191,  125,  -87,   41,  -42,   -7,   16,\n    7,   17,  -63,   58, -107,  142, -206,  279, -379,  502, -663,  870,-1148, 1532,-2105, 3071,-5134,13361,24389,-6281, 3489,-2319, 1658,-1225,  917, -688,  512, -376,  269, -190,  124,  -86,   40,  -42,   -7,   16,\n    7,   17,  -63,   58, -107,  142, -206,  279, -377,  501, -661,  868,-1144, 1527,-2097, 3060,-5112,13280,24450,-6271, 3481,-2313, 1654,-1222,  915, -686,  510, -375,  268, -190,  124,  -86,   40,  -42,   -7,   16,\n    7,   17,  -63,   58, -106,  142, -205,  278, -376,  499, -659,  865,-1140, 1521,-2090, 3048,-5090,13199,24511,-6261, 3474,-2308, 1649,-1219,  912, -684,  509, -374,  267, -189,  123,  -85,   40,  -41,   -7,   16,\n    7,   17,  -63,   58, -106,  142, -205,  277, -375,  498, -656,  862,-1136, 1516,-2082, 3036,-5068,13118,24571,-6251, 3466,-2302, 1645,-1216,  910, -682,  507, -373,  266, -188,  122,  -85,   40,  -41,   -7,   16,\n    7,   17,  -63,   58, -106,  141, -204,  276, -374,  496, -654,  859,-1132, 1510,-2074, 3024,-5045,13037,24631,-6240, 3458,-2296, 1641,-1212,  907, -680,  506, -371,  265, -187,  122,  -84,   39,  -41,   -8,   16,\n    7,   17,  -63,   58, -106,  141, -204,  276, -373,  494, -652,  856,-1127, 1504,-2066, 3011,-5023,12956,24691,-6229, 3450,-2291, 1636,-1209,  905, -678,  504, -370,  264, -187,  121,  -84,   39,  -41,   -8,   17,\n    7,   17,  -63,   58, -106,  141, -203,  275, -372,  493, -650,  853,-1123, 1499,-2058, 2999,-5000,12875,24751,-6218, 3442,-2285, 1632,-1205,  902, -676,  502, -369,  263, -186,  121,  -84,   39,  -40,   -8,   17,\n    7,   18,  -63,   58, -106,  140, -203,  274, -371,  491, -647,  850,-1119, 1493,-2050, 2987,-4978,12794,24810,-6207, 3434,-2278, 1627,-1202,  899, -674,  501, -368,  262, -185,  120,  -83,   38,  -40,   -8,   17,\n    7,   18,  -63,   58, -105,  140, -202,  273, -370,  489, -645,  846,-1115, 1487,-2042, 2974,-4955,12713,24869,-6195, 3425,-2272, 1623,-1198,  897, -672,  499, -366,  261, -184,  120,  -83,   38,  -40,   -9,   17,\n    7,   18,  -63,   58, -105,  140, -202,  272, -368,  488, -643,  843,-1111, 1481,-2034, 2962,-4932,12632,24928,-6183, 3416,-2266, 1618,-1195,  894, -670,  497, -365,  260, -184,  119,  -82,   38,  -40,   -9,   17,\n    7,   18,  -63,   57, -105,  139, -201,  272, -367,  486, -641,  840,-1106, 1476,-2025, 2949,-4909,12551,24987,-6171, 3408,-2260, 1613,-1191,  891, -667,  496, -364,  259, -183,  118,  -82,   37,  -39,   -9,   17,\n    7,   18,  -63,   57, -105,  139, -201,  271, -366,  484, -638,  837,-1102, 1470,-2017, 2936,-4885,12470,25045,-6159, 3399,-2253, 1609,-1187,  888, -665,  494, -362,  258, -182,  118,  -81,   37,  -39,   -9,   17,\n    7,   18,  -63,   57, -105,  139, -200,  270, -365,  483, -636,  834,-1098, 1464,-2008, 2923,-4862,12388,25103,-6146, 3390,-2247, 1604,-1184,  885, -663,  492, -361,  257, -181,  117,  -81,   37,  -39,   -9,   17,\n    7,   18,  -63,   57, -105,  138, -200,  269, -363,  481, -633,  831,-1093, 1458,-2000, 2911,-4838,12307,25161,-6133, 3380,-2240, 1599,-1180,  882, -661,  490, -360,  256, -180,  117,  -80,   36,  -39,  -10,   17,\n    7,   18,  -63,   57, -104,  138, -199,  268, -362,  479, -631,  827,-1089, 1452,-1991, 2898,-4815,12226,25219,-6120, 3371,-2233, 1594,-1176,  879, -658,  489, -358,  255, -180,  116,  -80,   36,  -38,  -10,   17,\n    7,   18,  -63,   57, -104,  138, -199,  267, -361,  477, -629,  824,-1085, 1446,-1983, 2884,-4791,12145,25276,-6106, 3362,-2227, 1589,-1172,  876, -656,  487, -357,  254, -179,  115,  -79,   36,  -38,  -10,   17,\n    7,   18,  -63,   57, -104,  137, -198,  266, -360,  476, -626,  821,-1080, 1439,-1974, 2871,-4767,12064,25333,-6092, 3352,-2220, 1583,-1168,  873, -654,  485, -356,  253, -178,  115,  -79,   35,  -38,  -10,   17,\n    7,   19,  -63,   57, -104,  137, -197,  266, -358,  474, -624,  817,-1075, 1433,-1965, 2858,-4743,11983,25390,-6078, 3342,-2213, 1578,-1164,  870, -651,  483, -354,  252, -177,  114,  -78,   35,  -37,  -10,   17,\n    7,   19,  -63,   57, -104,  137, -197,  265, -357,  472, -621,  814,-1071, 1427,-1957, 2845,-4719,11902,25446,-6064, 3332,-2206, 1573,-1160,  867, -649,  481, -353,  251, -176,  113,  -78,   35,  -37,  -11,   17,\n    7,   19,  -63,   57, -103,  136, -196,  264, -356,  470, -619,  810,-1066, 1421,-1948, 2831,-4695,11821,25503,-6049, 3322,-2198, 1568,-1156,  864, -647,  479, -351,  250, -175,  113,  -78,   34,  -37,  -11,   17,\n    6,   19,  -63,   56, -103,  136, -196,  263, -355,  468, -616,  807,-1062, 1414,-1939, 2818,-4671,11741,25559,-6034, 3312,-2191, 1562,-1152,  861, -644,  478, -350,  249, -175,  112,  -77,   34,  -37,  -11,   17,\n    6,   19,  -63,   56, -103,  135, -195,  262, -353,  466, -614,  804,-1057, 1408,-1930, 2804,-4646,11660,25614,-6019, 3302,-2184, 1557,-1148,  858, -642,  476, -348,  247, -174,  112,  -77,   34,  -36,  -11,   18,\n    6,   19,  -63,   56, -103,  135, -194,  261, -352,  465, -611,  800,-1052, 1401,-1921, 2790,-4621,11579,25670,-6004, 3291,-2176, 1551,-1144,  854, -639,  474, -347,  246, -173,  111,  -76,   33,  -36,  -11,   18,\n    6,   19,  -63,   56, -103,  135, -194,  260, -351,  463, -608,  797,-1048, 1395,-1912, 2777,-4597,11498,25725,-5988, 3280,-2169, 1546,-1140,  851, -637,  472, -345,  245, -172,  110,  -76,   33,  -36,  -12,   18,\n    6,   19,  -63,   56, -102,  134, -193,  259, -349,  461, -606,  793,-1043, 1388,-1902, 2763,-4572,11417,25780,-5972, 3270,-2161, 1540,-1135,  848, -634,  470, -344,  244, -171,  110,  -75,   33,  -36,  -12,   18,\n    6,   19,  -63,   56, -102,  134, -193,  258, -348,  459, -603,  789,-1038, 1382,-1893, 2749,-4547,11336,25834,-5956, 3259,-2153, 1534,-1131,  845, -632,  468, -342,  243, -170,  109,  -75,   32,  -35,  -12,   18,\n    6,   19,  -63,   56, -102,  133, -192,  257, -346,  457, -601,  786,-1033, 1375,-1884, 2735,-4522,11255,25888,-5939, 3248,-2145, 1528,-1127,  841, -629,  466, -341,  242, -169,  108,  -74,   32,  -35,  -12,   18,\n    6,   19,  -63,   56, -102,  133, -191,  256, -345,  455, -598,  782,-1028, 1369,-1875, 2721,-4497,11175,25942,-5922, 3236,-2137, 1523,-1122,  838, -626,  464, -339,  240, -168,  108,  -74,   32,  -35,  -12,   18,\n    6,   20,  -63,   56, -101,  133, -191,  255, -344,  453, -595,  779,-1023, 1362,-1865, 2707,-4472,11094,25996,-5905, 3225,-2129, 1517,-1118,  834, -624,  462, -337,  239, -167,  107,  -73,   31,  -34,  -13,   18,\n    6,   20,  -63,   55, -101,  132, -190,  254, -342,  451, -592,  775,-1018, 1355,-1856, 2692,-4446,11013,26050,-5888, 3213,-2121, 1511,-1113,  831, -621,  460, -336,  238, -166,  106,  -72,   31,  -34,  -13,   18,\n    6,   20,  -63,   55, -101,  132, -189,  253, -341,  449, -590,  771,-1013, 1348,-1846, 2678,-4421,10933,26103,-5870, 3202,-2113, 1505,-1108,  827, -618,  457, -334,  237, -165,  105,  -72,   30,  -34,  -13,   18,\n    6,   20,  -63,   55, -101,  131, -189,  252, -339,  447, -587,  768,-1008, 1342,-1837, 2664,-4395,10852,26156,-5852, 3190,-2105, 1498,-1104,  824, -615,  455, -333,  235, -165,  105,  -71,   30,  -34,  -13,   18,\n    6,   20,  -63,   55, -101,  131, -188,  251, -338,  445, -584,  764,-1003, 1335,-1827, 2649,-4370,10772,26208,-5834, 3178,-2096, 1492,-1099,  820, -613,  453, -331,  234, -164,  104,  -71,   30,  -33,  -14,   18,\n    6,   20,  -63,   55, -100,  131, -187,  250, -336,  443, -581,  760, -998, 1328,-1817, 2635,-4344,10691,26260,-5816, 3166,-2088, 1486,-1094,  817, -610,  451, -329,  233, -163,  103,  -70,   29,  -33,  -14,   18,\n    6,   20,  -63,   55, -100,  130, -187,  249, -335,  441, -579,  756, -993, 1321,-1807, 2620,-4318,10610,26312,-5797, 3154,-2079, 1480,-1090,  813, -607,  449, -328,  232, -162,  103,  -70,   29,  -33,  -14,   18,\n    6,   20,  -63,   55, -100,  130, -186,  248, -333,  439, -576,  752, -988, 1314,-1798, 2605,-4292,10530,26364,-5778, 3141,-2071, 1473,-1085,  809, -604,  447, -326,  230, -161,  102,  -69,   29,  -32,  -14,   18,\n    6,   20,  -63,   54, -100,  129, -185,  247, -332,  437, -573,  749, -983, 1307,-1788, 2590,-4266,10450,26416,-5758, 3129,-2062, 1467,-1080,  805, -601,  444, -324,  229, -160,  101,  -69,   28,  -32,  -14,   18,\n    6,   20,  -63,   54,  -99,  129, -185,  246, -330,  435, -570,  745, -978, 1300,-1778, 2575,-4240,10369,26467,-5739, 3116,-2053, 1460,-1075,  802, -598,  442, -323,  228, -159,  100,  -68,   28,  -32,  -15,   18,\n    6,   20,  -63,   54,  -99,  128, -184,  245, -329,  432, -567,  741, -972, 1293,-1768, 2561,-4213,10289,26518,-5719, 3103,-2044, 1454,-1070,  798, -596,  440, -321,  226, -158,  100,  -68,   27,  -32,  -15,   19,\n    6,   20,  -63,   54,  -99,  128, -183,  244, -327,  430, -564,  737, -967, 1285,-1758, 2546,-4187,10209,26568,-5699, 3090,-2035, 1447,-1065,  794, -593,  438, -319,  225, -157,   99,  -67,   27,  -31,  -15,   19,\n    6,   21,  -63,   54,  -99,  127, -182,  243, -326,  428, -561,  733, -962, 1278,-1748, 2530,-4160,10129,26618,-5678, 3077,-2026, 1440,-1060,  790, -590,  435, -317,  224, -156,   98,  -67,   27,  -31,  -15,   19,\n    6,   21,  -63,   54,  -98,  127, -182,  242, -324,  426, -558,  729, -956, 1271,-1738, 2515,-4134,10048,26668,-5658, 3064,-2017, 1434,-1055,  786, -587,  433, -316,  222, -155,   97,  -66,   26,  -31,  -15,   19,\n    5,   21,  -63,   54,  -98,  126, -181,  241, -323,  424, -555,  725, -951, 1264,-1728, 2500,-4107, 9968,26718,-5637, 3051,-2007, 1427,-1050,  782, -584,  431, -314,  221, -154,   97,  -66,   26,  -30,  -16,   19,\n    5,   21,  -63,   53,  -98,  126, -180,  240, -321,  422, -553,  721, -946, 1256,-1717, 2485,-4080, 9888,26767,-5615, 3037,-1998, 1420,-1045,  778, -581,  428, -312,  220, -153,   96,  -65,   26,  -30,  -16,   19,\n    5,   21,  -63,   53,  -97,  125, -180,  238, -320,  420, -550,  717, -940, 1249,-1707, 2469,-4054, 9808,26816,-5594, 3024,-1989, 1413,-1039,  774, -577,  426, -310,  218, -152,   95,  -64,   25,  -30,  -16,   19,\n    5,   21,  -62,   53,  -97,  125, -179,  237, -318,  417, -547,  713, -935, 1242,-1697, 2454,-4027, 9728,26865,-5572, 3010,-1979, 1406,-1034,  770, -574,  424, -308,  217, -151,   94,  -64,   25,  -29,  -16,   19,\n    5,   21,  -62,   53,  -97,  125, -178,  236, -316,  415, -543,  709, -929, 1234,-1686, 2439,-4000, 9649,26913,-5550, 2996,-1969, 1399,-1029,  766, -571,  421, -307,  216, -150,   94,  -63,   24,  -29,  -17,   19,\n    5,   21,  -62,   53,  -97,  124, -177,  235, -315,  413, -540,  705, -924, 1227,-1676, 2423,-3973, 9569,26961,-5527, 2982,-1960, 1392,-1023,  762, -568,  419, -305,  214, -148,   93,  -63,   24,  -29,  -17,   19,\n    5,   21,  -62,   53,  -96,  124, -176,  234, -313,  411, -537,  701, -918, 1219,-1665, 2407,-3945, 9489,27009,-5505, 2968,-1950, 1385,-1018,  758, -565,  416, -303,  213, -147,   92,  -62,   24,  -29,  -17,   19,\n    5,   21,  -62,   52,  -96,  123, -176,  233, -312,  408, -534,  697, -913, 1212,-1655, 2392,-3918, 9409,27057,-5482, 2953,-1940, 1377,-1012,  754, -562,  414, -301,  211, -146,   91,  -62,   23,  -28,  -17,   19,\n    5,   21,  -62,   52,  -96,  123, -175,  232, -310,  406, -531,  692, -907, 1204,-1644, 2376,-3891, 9330,27104,-5458, 2939,-1930, 1370,-1007,  750, -558,  412, -299,  210, -145,   91,  -61,   23,  -28,  -17,   19,\n    5,   21,  -62,   52,  -95,  122, -174,  231, -308,  404, -528,  688, -902, 1197,-1634, 2360,-3863, 9250,27151,-5435, 2924,-1920, 1363,-1001,  745, -555,  409, -297,  208, -144,   90,  -60,   22,  -28,  -18,   19,\n    5,   21,  -62,   52,  -95,  122, -173,  229, -307,  402, -525,  684, -896, 1189,-1623, 2344,-3836, 9171,27197,-5411, 2909,-1910, 1355, -996,  741, -552,  407, -295,  207, -143,   89,  -60,   22,  -27,  -18,   19,\n    5,   21,  -62,   52,  -95,  121, -173,  228, -305,  399, -522,  680, -890, 1181,-1612, 2328,-3808, 9091,27244,-5387, 2894,-1899, 1348, -990,  737, -549,  404, -293,  206, -142,   88,  -59,   22,  -27,  -18,   19,\n    5,   22,  -62,   52,  -95,  120, -172,  227, -303,  397, -519,  676, -885, 1173,-1601, 2312,-3780, 9012,27290,-5363, 2879,-1889, 1340, -985,  733, -545,  401, -291,  204, -141,   87,  -59,   21,  -27,  -18,   19,\n    5,   22,  -62,   51,  -94,  120, -171,  226, -302,  395, -516,  671, -879, 1166,-1591, 2296,-3753, 8933,27335,-5338, 2864,-1878, 1333, -979,  728, -542,  399, -289,  203, -140,   87,  -58,   21,  -26,  -19,   20,\n    5,   22,  -62,   51,  -94,  119, -170,  225, -300,  392, -512,  667, -873, 1158,-1580, 2280,-3725, 8854,27381,-5313, 2849,-1868, 1325, -973,  724, -539,  396, -287,  201, -139,   86,  -57,   20,  -26,  -19,   20,\n    5,   22,  -62,   51,  -94,  119, -169,  223, -298,  390, -509,  663, -867, 1150,-1569, 2264,-3697, 8775,27426,-5288, 2834,-1857, 1317, -967,  719, -535,  394, -285,  200, -138,   85,  -57,   20,  -26,  -19,   20,\n    5,   22,  -62,   51,  -93,  118, -169,  222, -297,  388, -506,  658, -862, 1142,-1558, 2248,-3669, 8696,27470,-5262, 2818,-1847, 1309, -961,  715, -532,  391, -283,  198, -136,   84,  -56,   20,  -25,  -19,   20,\n    5,   22,  -62,   51,  -93,  118, -168,  221, -295,  385, -503,  654, -856, 1134,-1547, 2231,-3641, 8617,27515,-5236, 2802,-1836, 1302, -955,  710, -528,  388, -281,  197, -135,   83,  -56,   19,  -25,  -19,   20,\n    5,   22,  -62,   50,  -93,  117, -167,  220, -293,  383, -499,  650, -850, 1126,-1536, 2215,-3613, 8538,27559,-5210, 2786,-1825, 1294, -950,  706, -525,  386, -279,  195, -134,   82,  -55,   19,  -25,  -20,   20,\n    5,   22,  -62,   50,  -92,  117, -166,  219, -291,  380, -496,  645, -844, 1118,-1525, 2198,-3585, 8459,27602,-5184, 2770,-1814, 1286, -944,  701, -521,  383, -277,  194, -133,   82,  -54,   18,  -24,  -20,   20,\n    5,   22,  -62,   50,  -92,  116, -165,  217, -290,  378, -493,  641, -838, 1110,-1514, 2182,-3556, 8381,27646,-5157, 2754,-1803, 1278, -938,  697, -518,  380, -275,  192, -132,   81,  -54,   18,  -24,  -20,   20,\n    5,   22,  -61,   50,  -92,  116, -164,  216, -288,  375, -490,  636, -832, 1102,-1502, 2165,-3528, 8302,27689,-5130, 2738,-1792, 1270, -931,  692, -514,  378, -273,  190, -131,   80,  -53,   17,  -24,  -20,   20,\n    5,   22,  -61,   50,  -91,  115, -164,  215, -286,  373, -486,  632, -826, 1094,-1491, 2149,-3500, 8224,27732,-5103, 2722,-1781, 1261, -925,  687, -511,  375, -271,  189, -129,   79,  -53,   17,  -24,  -21,   20,\n    5,   22,  -61,   49,  -91,  115, -163,  214, -284,  371, -483,  628, -820, 1086,-1480, 2132,-3471, 8145,27774,-5076, 2705,-1769, 1253, -919,  683, -507,  372, -269,  187, -128,   78,  -52,   17,  -23,  -21,   20,\n    5,   22,  -61,   49,  -91,  114, -162,  212, -283,  368, -480,  623, -814, 1078,-1469, 2115,-3443, 8067,27816,-5048, 2688,-1758, 1245, -913,  678, -504,  369, -267,  186, -127,   77,  -51,   16,  -23,  -21,   20,\n    4,   22,  -61,   49,  -90,  113, -161,  211, -281,  366, -476,  619, -808, 1070,-1457, 2099,-3414, 7989,27858,-5020, 2672,-1747, 1237, -907,  673, -500,  367, -265,  184, -126,   76,  -51,   16,  -23,  -21,   20,\n    4,   22,  -61,   49,  -90,  113, -160,  210, -279,  363, -473,  614, -802, 1062,-1446, 2082,-3385, 7911,27899,-4992, 2655,-1735, 1228, -901,  669, -496,  364, -263,  183, -125,   76,  -50,   15,  -22,  -21,   20,\n    4,   22,  -61,   49,  -90,  112, -159,  209, -277,  361, -470,  609, -796, 1054,-1435, 2065,-3357, 7833,27941,-4963, 2638,-1723, 1220, -894,  664, -493,  361, -261,  181, -124,   75,  -49,   15,  -22,  -22,   20,\n    4,   23,  -61,   48,  -89,  112, -158,  207, -275,  358, -466,  605, -790, 1045,-1423, 2048,-3328, 7755,27981,-4934, 2620,-1712, 1211, -888,  659, -489,  358, -258,  179, -122,   74,  -49,   14,  -22,  -22,   20,\n    4,   23,  -61,   48,  -89,  111, -158,  206, -274,  356, -463,  600, -784, 1037,-1412, 2031,-3299, 7677,28022,-4905, 2603,-1700, 1203, -881,  654, -485,  355, -256,  178, -121,   73,  -48,   14,  -21,  -22,   20,\n    4,   23,  -61,   48,  -89,  111, -157,  205, -272,  353, -459,  596, -778, 1029,-1400, 2014,-3270, 7599,28062,-4876, 2586,-1688, 1194, -875,  649, -481,  353, -254,  176, -120,   72,  -47,   14,  -21,  -22,   20,\n    4,   23,  -61,   48,  -88,  110, -156,  203, -270,  351, -456,  591, -772, 1020,-1388, 1997,-3241, 7522,28102,-4846, 2568,-1676, 1185, -869,  644, -478,  350, -252,  174, -119,   71,  -47,   13,  -21,  -23,   21,\n    4,   23,  -61,   48,  -88,  109, -155,  202, -268,  348, -452,  587, -765, 1012,-1377, 1980,-3212, 7444,28141,-4816, 2550,-1664, 1177, -862,  639, -474,  347, -250,  173, -117,   70,  -46,   13,  -20,  -23,   21,\n    4,   23,  -61,   47,  -88,  109, -154,  201, -266,  346, -449,  582, -759, 1004,-1365, 1963,-3183, 7367,28180,-4785, 2532,-1652, 1168, -855,  634, -470,  344, -248,  171, -116,   69,  -46,   12,  -20,  -23,   21,\n    4,   23,  -60,   47,  -87,  108, -153,  199, -264,  343, -446,  577, -753,  995,-1354, 1946,-3154, 7289,28219,-4755, 2514,-1640, 1159, -849,  629, -466,  341, -245,  169, -115,   68,  -45,   12,  -20,  -23,   21,\n    4,   23,  -60,   47,  -87,  108, -152,  198, -262,  340, -442,  573, -747,  987,-1342, 1928,-3125, 7212,28258,-4724, 2496,-1627, 1150, -842,  624, -462,  338, -243,  168, -114,   68,  -44,   11,  -19,  -23,   21,\n    4,   23,  -60,   47,  -86,  107, -151,  197, -261,  338, -439,  568, -740,  978,-1330, 1911,-3095, 7135,28296,-4693, 2478,-1615, 1141, -836,  619, -459,  335, -241,  166, -113,   67,  -44,   11,  -19,  -24,   21,\n    4,   23,  -60,   46,  -86,  106, -150,  196, -259,  335, -435,  563, -734,  970,-1318, 1894,-3066, 7058,28334,-4661, 2460,-1603, 1132, -829,  614, -455,  332, -239,  164, -111,   66,  -43,   10,  -19,  -24,   21,\n    4,   23,  -60,   46,  -86,  106, -149,  194, -257,  333, -432,  558, -728,  961,-1306, 1876,-3037, 6981,28371,-4630, 2441,-1590, 1123, -822,  609, -451,  329, -236,  163, -110,   65,  -42,   10,  -18,  -24,   21,\n    4,   23,  -60,   46,  -85,  105, -149,  193, -255,  330, -428,  554, -721,  953,-1295, 1859,-3007, 6905,28408,-4598, 2422,-1578, 1114, -815,  604, -447,  326, -234,  161, -109,   64,  -42,   10,  -18,  -24,   21,\n    4,   23,  -60,   46,  -85,  105, -148,  191, -253,  327, -424,  549, -715,  944,-1283, 1841,-2978, 6828,28445,-4565, 2404,-1565, 1105, -808,  599, -443,  323, -232,  159, -107,   63,  -41,    9,  -18,  -25,   21,\n    4,   23,  -60,   46,  -85,  104, -147,  190, -251,  325, -421,  544, -709,  936,-1271, 1824,-2949, 6751,28482,-4533, 2385,-1552, 1096, -802,  593, -439,  320, -229,  158, -106,   62,  -40,    9,  -17,  -25,   21,\n    4,   23,  -60,   45,  -84,  103, -146,  189, -249,  322, -417,  539, -702,  927,-1259, 1806,-2919, 6675,28518,-4500, 2366,-1539, 1087, -795,  588, -435,  317, -227,  156, -105,   61,  -40,    8,  -17,  -25,   21,\n    4,   23,  -60,   45,  -84,  103, -145,  187, -247,  319, -414,  535, -696,  918,-1247, 1789,-2890, 6599,28553,-4467, 2347,-1526, 1077, -788,  583, -431,  314, -225,  154, -104,   60,  -39,    8,  -17,  -25,   21,\n    4,   23,  -60,   45,  -84,  102, -144,  186, -245,  317, -410,  530, -689,  910,-1235, 1771,-2860, 6523,28589,-4433, 2327,-1513, 1068, -781,  578, -427,  311, -222,  152, -102,   59,  -38,    7,  -16,  -25,   21,\n    4,   23,  -59,   45,  -83,  101, -143,  185, -243,  314, -407,  525, -683,  901,-1223, 1753,-2830, 6447,28624,-4400, 2308,-1500, 1059, -774,  572, -423,  308, -220,  151, -101,   58,  -38,    7,  -16,  -26,   21,\n    4,   23,  -59,   44,  -83,  101, -142,  183, -241,  311, -403,  520, -676,  892,-1211, 1736,-2801, 6371,28659,-4366, 2288,-1487, 1049, -767,  567, -419,  305, -218,  149, -100,   57,  -37,    6,  -16,  -26,   21,\n    4,   23,  -59,   44,  -82,  100, -141,  182, -240,  309, -399,  515, -670,  883,-1199, 1718,-2771, 6295,28693,-4332, 2269,-1474, 1040, -760,  562, -415,  302, -215,  147,  -98,   56,  -36,    6,  -15,  -26,   21,\n    4,   23,  -59,   44,  -82,  100, -140,  180, -238,  306, -396,  510, -663,  875,-1186, 1700,-2741, 6219,28727,-4297, 2249,-1461, 1030, -752,  556, -410,  298, -213,  145,  -97,   55,  -36,    5,  -15,  -26,   21,\n    4,   24,  -59,   44,  -82,   99, -139,  179, -236,  303, -392,  505, -657,  866,-1174, 1682,-2711, 6144,28761,-4262, 2229,-1447, 1020, -745,  551, -406,  295, -211,  143,  -96,   54,  -35,    5,  -15,  -26,   21,\n    4,   24,  -59,   43,  -81,   98, -138,  178, -234,  301, -388,  501, -650,  857,-1162, 1665,-2682, 6068,28794,-4227, 2209,-1434, 1011, -738,  545, -402,  292, -208,  142,  -94,   54,  -34,    5,  -14,  -27,   21,\n    4,   24,  -59,   43,  -81,   98, -137,  176, -232,  298, -385,  496, -644,  848,-1150, 1647,-2652, 5993,28827,-4192, 2189,-1421, 1001, -731,  540, -398,  289, -206,  140,  -93,   53,  -33,    4,  -14,  -27,   22,\n    4,   24,  -59,   43,  -80,   97, -136,  175, -230,  295, -381,  491, -637,  839,-1138, 1629,-2622, 5918,28860,-4156, 2169,-1407,  991, -724,  534, -394,  286, -203,  138,  -92,   52,  -33,    4,  -14,  -27,   22,\n    3,   24,  -59,   43,  -80,   96, -135,  173, -228,  293, -377,  486, -631,  830,-1125, 1611,-2592, 5843,28892,-4120, 2148,-1393,  981, -716,  529, -390,  282, -201,  136,  -90,   51,  -32,    3,  -13,  -27,   22,\n    3,   24,  -59,   42,  -80,   96, -134,  172, -226,  290, -374,  481, -624,  821,-1113, 1593,-2562, 5768,28924,-4084, 2128,-1380,  972, -709,  523, -385,  279, -199,  134,  -89,   50,  -31,    3,  -13,  -28,   22,\n    3,   24,  -58,   42,  -79,   95, -133,  171, -224,  287, -370,  476, -617,  813,-1101, 1575,-2532, 5694,28956,-4047, 2107,-1366,  962, -701,  518, -381,  276, -196,  133,  -88,   49,  -31,    2,  -13,  -28,   22,\n    3,   24,  -58,   42,  -79,   94, -132,  169, -222,  284, -366,  471, -611,  804,-1088, 1557,-2502, 5619,28987,-4011, 2086,-1352,  952, -694,  512, -377,  273, -194,  131,  -86,   48,  -30,    2,  -12,  -28,   22,\n    3,   24,  -58,   42,  -78,   94, -131,  168, -220,  281, -362,  466, -604,  795,-1076, 1539,-2472, 5545,29018,-3974, 2066,-1338,  942, -687,  506, -372,  269, -191,  129,  -85,   47,  -29,    1,  -12,  -28,   22,\n    3,   24,  -58,   41,  -78,   93, -130,  166, -218,  279, -359,  461, -597,  786,-1064, 1521,-2442, 5470,29048,-3936, 2045,-1324,  932, -679,  501, -368,  266, -189,  127,  -84,   46,  -29,    1,  -12,  -28,   22,\n    3,   24,  -58,   41,  -78,   92, -129,  165, -216,  276, -355,  456, -591,  777,-1051, 1502,-2412, 5396,29079,-3899, 2024,-1310,  922, -672,  495, -364,  263, -186,  125,  -82,   45,  -28,    0,  -11,  -29,   22,\n    3,   24,  -58,   41,  -77,   92, -128,  163, -214,  273, -351,  451, -584,  768,-1039, 1484,-2382, 5322,29108,-3861, 2002,-1296,  911, -664,  489, -359,  260, -184,  123,  -81,   44,  -27,    0,  -11,  -29,   22,\n    3,   24,  -58,   41,  -77,   91, -127,  162, -212,  270, -347,  446, -577,  759,-1026, 1466,-2352, 5248,29138,-3823, 1981,-1282,  901, -656,  483, -355,  256, -181,  121,  -79,   43,  -26,   -1,  -11,  -29,   22,\n    3,   24,  -58,   40,  -76,   90, -126,  160, -210,  268, -344,  441, -571,  750,-1014, 1448,-2321, 5174,29167,-3784, 1959,-1267,  891, -649,  478, -351,  253, -179,  120,  -78,   42,  -26,   -1,  -10,  -29,   22,\n    3,   24,  -58,   40,  -76,   90, -125,  159, -207,  265, -340,  436, -564,  740,-1001, 1430,-2291, 5101,29196,-3745, 1938,-1253,  881, -641,  472, -346,  250, -176,  118,  -77,   41,  -25,   -2,  -10,  -30,   22,\n    3,   24,  -57,   40,  -75,   89, -124,  158, -205,  262, -336,  431, -557,  731, -989, 1411,-2261, 5027,29224,-3706, 1916,-1239,  870, -633,  466, -342,  246, -174,  116,  -75,   40,  -24,   -2,  -10,  -30,   22,\n    3,   24,  -57,   40,  -75,   88, -123,  156, -203,  259, -332,  426, -550,  722, -976, 1393,-2231, 4954,29252,-3667, 1894,-1224,  860, -626,  460, -337,  243, -171,  114,  -74,   39,  -24,   -3,   -9,  -30,   22,\n    3,   24,  -57,   39,  -75,   88, -122,  155, -201,  256, -328,  421, -544,  713, -963, 1375,-2201, 4881,29280,-3628, 1873,-1210,  849, -618,  454, -333,  239, -168,  112,  -72,   38,  -23,   -3,   -9,  -30,   22,\n    3,   24,  -57,   39,  -74,   87, -121,  153, -199,  253, -325,  415, -537,  704, -951, 1356,-2170, 4808,29307,-3588, 1850,-1195,  839, -610,  448, -328,  236, -166,  110,  -71,   37,  -22,   -4,   -9,  -30,   22,\n    3,   24,  -57,   39,  -74,   86, -120,  152, -197,  251, -321,  410, -530,  695, -938, 1338,-2140, 4735,29334,-3548, 1828,-1180,  828, -602,  443, -324,  233, -163,  108,  -70,   36,  -21,   -4,   -8,  -31,   22,\n    3,   24,  -57,   38,  -73,   86, -119,  150, -195,  248, -317,  405, -523,  686, -926, 1320,-2110, 4663,29361,-3507, 1806,-1165,  818, -595,  437, -319,  229, -161,  106,  -68,   35,  -21,   -4,   -8,  -31,   22,\n    3,   24,  -57,   38,  -73,   85, -118,  149, -193,  245, -313,  400, -516,  676, -913, 1301,-2080, 4590,29387,-3467, 1784,-1151,  807, -587,  431, -315,  226, -158,  104,  -67,   34,  -20,   -5,   -8,  -31,   22,\n    3,   24,  -57,   38,  -72,   84, -117,  147, -191,  242, -309,  395, -509,  667, -900, 1283,-2049, 4518,29413,-3426, 1761,-1136,  797, -579,  425, -310,  222, -156,  102,  -65,   33,  -19,   -5,   -7,  -31,   22,\n    3,   24,  -56,   38,  -72,   83, -116,  146, -189,  239, -305,  390, -503,  658, -888, 1264,-2019, 4446,29439,-3385, 1739,-1121,  786, -571,  419, -306,  219, -153,  100,  -64,   32,  -19,   -6,   -7,  -32,   23,\n    3,   24,  -56,   37,  -72,   83, -115,  144, -187,  236, -302,  385, -496,  649, -875, 1246,-1989, 4374,29464,-3343, 1716,-1106,  775, -563,  413, -301,  215, -150,   98,  -63,   31,  -18,   -6,   -7,  -32,   23,\n    3,   24,  -56,   37,  -71,   82, -114,  143, -185,  233, -298,  379, -489,  640, -862, 1227,-1958, 4302,29489,-3301, 1693,-1091,  764, -555,  407, -297,  212, -148,   96,  -61,   30,  -17,   -7,   -6,  -32,   23,\n    3,   24,  -56,   37,  -71,   81, -113,  141, -183,  231, -294,  374, -482,  630, -849, 1209,-1928, 4230,29513,-3259, 1670,-1076,  754, -547,  401, -292,  208, -145,   94,  -60,   29,  -16,   -7,   -6,  -32,   23,\n    3,   24,  -56,   37,  -70,   81, -112,  140, -180,  228, -290,  369, -475,  621, -837, 1190,-1898, 4159,29537,-3217, 1647,-1060,  743, -539,  394, -287,  205, -142,   92,  -58,   27,  -16,   -8,   -5,  -32,   23,\n    3,   24,  -56,   36,  -70,   80, -111,  138, -178,  225, -286,  364, -468,  612, -824, 1172,-1867, 4087,29561,-3174, 1624,-1045,  732, -531,  388, -283,  201, -140,   90,  -57,   26,  -15,   -8,   -5,  -33,   23,\n    3,   24,  -56,   36,  -69,   79, -110,  137, -176,  222, -282,  359, -461,  602, -811, 1153,-1837, 4016,29584,-3132, 1601,-1030,  721, -523,  382, -278,  198, -137,   89,  -55,   25,  -14,   -9,   -5,  -33,   23,\n    3,   24,  -55,   36,  -69,   79, -109,  135, -174,  219, -278,  353, -454,  593, -798, 1135,-1807, 3945,29607,-3088, 1577,-1014,  710, -514,  376, -273,  194, -134,   87,  -54,   24,  -13,   -9,   -4,  -33,   23,\n    3,   24,  -55,   35,  -68,   78, -108,  134, -172,  216, -274,  348, -447,  584, -785, 1116,-1776, 3874,29630,-3045, 1554, -999,  699, -506,  370, -269,  191, -132,   85,  -52,   23,  -13,  -10,   -4,  -33,   23,\n    3,   24,  -55,   35,  -68,   77, -107,  132, -170,  213, -270,  343, -440,  574, -773, 1098,-1746, 3803,29652,-3001, 1530, -983,  688, -498,  364, -264,  187, -129,   83,  -51,   22,  -12,  -10,   -4,  -33,   23,\n    3,   24,  -55,   35,  -68,   76, -106,  131, -168,  210, -266,  338, -433,  565, -760, 1079,-1716, 3733,29674,-2958, 1507, -968,  677, -490,  357, -259,  184, -126,   81,  -49,   21,  -11,  -11,   -3,  -34,   23,\n    3,   24,  -55,   34,  -67,   76, -105,  129, -166,  207, -263,  333, -426,  556, -747, 1060,-1685, 3663,29696,-2913, 1483, -952,  666, -481,  351, -255,  180, -124,   79,  -48,   20,  -10,  -11,   -3,  -34,   23,\n    3,   24,  -55,   34,  -67,   75, -103,  128, -163,  204, -259,  327, -419,  546, -734, 1042,-1655, 3592,29717,-2869, 1459, -936,  654, -473,  345, -250,  176, -121,   76,  -46,   19,  -10,  -12,   -3,  -34,   23,\n    3,   25,  -55,   34,  -66,   74, -102,  126, -161,  202, -255,  322, -412,  537, -721, 1023,-1625, 3522,29738,-2824, 1435, -921,  643, -465,  339, -245,  173, -118,   74,  -45,   18,   -9,  -12,   -2,  -34,   23,\n    2,   25,  -54,   34,  -66,   74, -101,  124, -159,  199, -251,  317, -405,  528, -708, 1004,-1594, 3453,29758,-2779, 1411, -905,  632, -457,  332, -240,  169, -115,   72,  -43,   17,   -8,  -13,   -2,  -35,   23,\n    2,   25,  -54,   33,  -65,   73, -100,  123, -157,  196, -247,  312, -398,  518, -695,  986,-1564, 3383,29778,-2734, 1387, -889,  621, -448,  326, -235,  166, -113,   70,  -42,   16,   -7,  -13,   -2,  -35,   23,\n    2,   25,  -54,   33,  -65,   72,  -99,  121, -155,  193, -243,  306, -391,  509, -682,  967,-1534, 3314,29798,-2688, 1362, -873,  609, -440,  320, -231,  162, -110,   68,  -40,   15,   -7,  -14,   -1,  -35,   23,\n    2,   25,  -54,   33,  -64,   71,  -98,  120, -153,  190, -239,  301, -384,  499, -670,  948,-1504, 3244,29817,-2643, 1338, -857,  598, -431,  313, -226,  158, -107,   66,  -39,   14,   -6,  -14,   -1,  -35,   23,\n    2,   25,  -54,   32,  -64,   71,  -97,  118, -151,  187, -235,  296, -377,  490, -657,  930,-1473, 3175,29836,-2596, 1314, -841,  586, -423,  307, -221,  155, -104,   64,  -38,   13,   -5,  -15,   -1,  -35,   23,\n    2,   25,  -54,   32,  -63,   70,  -96,  117, -148,  184, -231,  290, -370,  481, -644,  911,-1443, 3106,29855,-2550, 1289, -825,  575, -414,  301, -216,  151, -102,   62,  -36,   12,   -4,  -15,    0,  -36,   23,\n    2,   25,  -54,   32,  -63,   69,  -95,  115, -146,  181, -227,  285, -363,  471, -631,  892,-1413, 3038,29873,-2504, 1264, -809,  563, -406,  294, -211,  147,  -99,   60,  -34,   11,   -4,  -16,    0,  -36,   23,\n    2,   25,  -53,   32,  -63,   68,  -94,  114, -144,  178, -223,  280, -356,  462, -618,  874,-1382, 2969,29891,-2457, 1239, -793,  552, -397,  288, -206,  144,  -96,   58,  -33,    9,   -3,  -16,    0,  -36,   23,\n    2,   25,  -53,   31,  -62,   68,  -93,  112, -142,  175, -219,  275, -349,  452, -605,  855,-1352, 2901,29908,-2409, 1215, -776,  540, -389,  281, -202,  140,  -93,   56,  -31,    8,   -2,  -17,    1,  -36,   23,\n    2,   25,  -53,   31,  -62,   67,  -92,  110, -140,  172, -215,  269, -342,  443, -592,  836,-1322, 2832,29925,-2362, 1190, -760,  529, -380,  275, -197,  136,  -91,   54,  -30,    7,   -1,  -17,    1,  -36,   23,\n    2,   25,  -53,   31,  -61,   66,  -91,  109, -138,  169, -211,  264, -335,  433, -579,  818,-1292, 2764,29942,-2314, 1164, -744,  517, -372,  268, -192,  132,  -88,   52,  -28,    6,   -1,  -18,    1,  -37,   23,\n    2,   25,  -53,   30,  -61,   65,  -89,  107, -135,  166, -207,  259, -328,  424, -566,  799,-1262, 2697,29958,-2267, 1139, -727,  505, -363,  262, -187,  129,  -85,   50,  -27,    5,    0,  -18,    2,  -37,   23,\n    2,   25,  -53,   30,  -60,   65,  -88,  106, -133,  163, -203,  253, -321,  414, -553,  780,-1231, 2629,29974,-2218, 1114, -711,  494, -354,  255, -182,  125,  -82,   48,  -25,    4,    1,  -19,    2,  -37,   23,\n    2,   25,  -52,   30,  -60,   64,  -87,  104, -131,  160, -199,  248, -314,  405, -540,  761,-1201, 2562,29990,-2170, 1089, -694,  482, -346,  249, -177,  121,  -79,   46,  -24,    3,    2,  -19,    3,  -37,   24,\n    2,   25,  -52,   29,  -59,   63,  -86,  103, -129,  157, -195,  243, -307,  395, -527,  743,-1171, 2494,30005,-2121, 1063, -678,  470, -337,  242, -172,  117,  -77,   44,  -22,    2,    2,  -20,    3,  -38,   24,\n    2,   25,  -52,   29,  -59,   62,  -85,  101, -127,  154, -191,  237, -300,  386, -514,  724,-1141, 2427,30020,-2072, 1038, -661,  458, -328,  236, -167,  114,  -74,   41,  -21,    1,    3,  -20,    3,  -38,   24,\n    2,   25,  -52,   29,  -58,   62,  -84,   99, -124,  151, -187,  232, -293,  376, -501,  705,-1111, 2361,30034,-2023, 1012, -644,  447, -320,  229, -162,  110,  -71,   39,  -19,    0,    4,  -21,    4,  -38,   24,\n    2,   25,  -52,   28,  -58,   61,  -83,   98, -122,  148, -183,  227, -286,  367, -488,  687,-1081, 2294,30048,-1973,  986, -628,  435, -311,  223, -157,  106,  -68,   37,  -18,   -1,    5,  -21,    4,  -38,   24,\n    2,   25,  -52,   28,  -57,   60,  -82,   96, -120,  145, -179,  221, -278,  357, -475,  668,-1051, 2228,30062,-1924,  960, -611,  423, -302,  216, -152,  102,  -65,   35,  -16,   -2,    5,  -22,    4,  -38,   24,\n    2,   25,  -52,   28,  -57,   59,  -81,   95, -118,  142, -175,  216, -271,  348, -462,  649,-1021, 2161,30075,-1874,  935, -594,  411, -293,  209, -147,   99,  -62,   33,  -15,   -4,    6,  -22,    5,  -39,   24,\n    2,   25,  -51,   28,  -56,   59,  -80,   93, -116,  139, -171,  211, -264,  338, -449,  631, -991, 2095,30088,-1823,  909, -577,  399, -284,  203, -142,   95,  -59,   31,  -13,   -5,    7,  -23,    5,  -39,   24,\n    2,   25,  -51,   27,  -56,   58,  -78,   92, -113,  136, -167,  205, -257,  329, -436,  612, -961, 2029,30101,-1773,  882, -560,  387, -275,  196, -137,   91,  -57,   29,  -12,   -6,    8,  -23,    5,  -39,   24,\n    2,   25,  -51,   27,  -55,   57,  -77,   90, -111,  133, -163,  200, -250,  319, -423,  593, -931, 1964,30113,-1722,  856, -543,  375, -267,  189, -132,   87,  -54,   27,  -10,   -7,    9,  -24,    6,  -39,   24,\n    2,   25,  -51,   27,  -55,   56,  -76,   88, -109,  130, -159,  195, -243,  310, -410,  575, -901, 1898,30125,-1671,  830, -526,  363, -258,  183, -127,   83,  -51,   25,   -8,   -8,    9,  -24,    6,  -39,   24,\n    2,   25,  -51,   26,  -54,   56,  -75,   87, -107,  127, -155,  189, -236,  300, -397,  556, -871, 1833,30136,-1620,  804, -509,  351, -249,  176, -122,   79,  -48,   22,   -7,   -9,   10,  -25,    6,  -40,   24,\n    2,   25,  -51,   26,  -54,   55,  -74,   85, -105,  124, -151,  184, -229,  291, -384,  537, -841, 1768,30147,-1568,  777, -492,  339, -240,  169, -117,   76,  -45,   20,   -5,  -10,   11,  -25,    7,  -40,   24,\n    2,   25,  -50,   26,  -53,   54,  -73,   84, -102,  121, -147,  179, -222,  281, -371,  519, -811, 1703,30158,-1516,  751, -475,  327, -231,  163, -112,   72,  -42,   18,   -4,  -11,   12,  -26,    7,  -40,   24,\n    2,   25,  -50,   25,  -53,   53,  -72,   82, -100,  118, -143,  173, -215,  272, -358,  500, -782, 1639,30168,-1464,  724, -458,  314, -222,  156, -106,   68,  -39,   16,   -2,  -12,   12,  -26,    7,  -40,   24,\n    2,   25,  -50,   25,  -53,   53,  -71,   80,  -98,  115, -139,  168, -207,  262, -345,  481, -752, 1574,30178,-1412,  698, -441,  302, -213,  149, -101,   64,  -36,   14,   -1,  -14,   13,  -27,    8,  -40,   24,\n    2,   25,  -50,   25,  -52,   52,  -70,   79,  -96,  112, -135,  163, -200,  253, -332,  463, -722, 1510,30188,-1359,  671, -423,  290, -204,  142,  -96,   60,  -34,   12,    1,  -15,   14,  -27,    8,  -41,   24,\n    2,   25,  -50,   24,  -52,   51,  -68,   77,  -94,  109, -131,  157, -193,  243, -319,  444, -692, 1446,30197,-1307,  644, -406,  278, -195,  135,  -91,   56,  -31,   10,    2,  -16,   15,  -28,    8,  -41,   24,\n    2,   25,  -50,   24,  -51,   50,  -67,   76,  -91,  106, -127,  152, -186,  234, -306,  425, -663, 1382,30205,-1254,  617, -389,  266, -186,  129,  -86,   52,  -28,    7,    4,  -17,   15,  -28,    9,  -41,   24,\n    2,   25,  -49,   24,  -51,   50,  -66,   74,  -89,  103, -123,  146, -179,  224, -293,  407, -633, 1319,30214,-1200,  590, -371,  253, -177,  122,  -81,   48,  -25,    5,    6,  -18,   16,  -29,    9,  -41,   24,\n    2,   25,  -49,   23,  -50,   49,  -65,   73,  -87,  100, -119,  141, -172,  215, -280,  388, -604, 1255,30222,-1147,  563, -354,  241, -168,  115,  -76,   45,  -22,    3,    7,  -19,   17,  -29,    9,  -41,   24,\n    2,   25,  -49,   23,  -50,   48,  -64,   71,  -85,   97, -115,  136, -165,  205, -267,  370, -574, 1192,30230,-1093,  536, -336,  229, -159,  108,  -70,   41,  -19,    1,    9,  -20,   18,  -30,   10,  -42,   24,\n    2,   25,  -49,   23,  -49,   47,  -63,   69,  -83,   94, -111,  130, -158,  196, -254,  351, -545, 1129,30237,-1039,  509, -319,  216, -150,  101,  -65,   37,  -16,   -1,   10,  -21,   19,  -30,   10,  -42,   24,\n    2,   25,  -49,   22,  -49,   46,  -62,   68,  -80,   91, -107,  125, -151,  186, -241,  333, -515, 1067,30244, -984,  481, -301,  204, -140,   95,  -60,   33,  -13,   -3,   12,  -22,   19,  -31,   11,  -42,   24,\n    2,   25,  -48,   22,  -48,   46,  -61,   66,  -78,   88, -103,  120, -144,  177, -228,  314, -486, 1004,30250, -930,  454, -284,  191, -131,   88,  -55,   29,  -10,   -6,   14,  -24,   20,  -31,   11,  -42,   24,\n    2,   25,  -48,   22,  -48,   45,  -59,   65,  -76,   85,  -99,  114, -136,  168, -215,  296, -456,  942,30256, -875,  426, -266,  179, -122,   81,  -50,   25,   -7,   -8,   15,  -25,   21,  -32,   11,  -42,   24,\n    2,   25,  -48,   21,  -47,   44,  -58,   63,  -74,   82,  -95,  109, -129,  158, -202,  277, -427,  880,30262, -820,  399, -248,  167, -113,   74,  -44,   21,   -4,  -10,   17,  -26,   22,  -32,   12,  -43,   24,\n    2,   25,  -48,   21,  -47,   43,  -57,   61,  -72,   79,  -91,  104, -122,  149, -190,  259, -398,  818,30267, -765,  371, -231,  154, -104,   67,  -39,   17,   -1,  -12,   18,  -27,   22,  -33,   12,  -43,   24,\n    2,   25,  -48,   21,  -46,   43,  -56,   60,  -69,   76,  -87,   98, -115,  139, -177,  240, -369,  756,30272, -709,  344, -213,  142,  -95,   60,  -34,   13,    2,  -14,   20,  -28,   23,  -34,   12,  -43,   24,\n    1,   25,  -48,   20,  -46,   42,  -55,   58,  -67,   73,  -83,   93, -108,  130, -164,  222, -340,  695,30277, -653,  316, -195,  129,  -85,   53,  -29,    9,    5,  -17,   21,  -29,   24,  -34,   13,  -43,   24,\n    1,   25,  -47,   20,  -45,   41,  -54,   57,  -65,   70,  -79,   88, -101,  120, -151,  203, -310,  634,30281, -597,  288, -177,  117,  -76,   46,  -24,    5,    8,  -19,   23,  -30,   25,  -35,   13,  -43,   24,\n    1,   25,  -47,   20,  -45,   40,  -53,   55,  -63,   67,  -75,   82,  -94,  111, -138,  185, -281,  573,30285, -541,  260, -160,  104,  -67,   39,  -18,    1,   11,  -21,   25,  -31,   26,  -35,   13,  -44,   24,\n    1,   25,  -47,   19,  -44,   40,  -52,   53,  -60,   64,  -71,   77,  -87,  101, -125,  167, -252,  512,30288, -485,  232, -142,   91,  -58,   32,  -13,   -3,   13,  -23,   26,  -33,   26,  -36,   14,  -44,   24,\n    1,   25,  -47,   19,  -44,   39,  -51,   52,  -58,   61,  -66,   72,  -80,   92, -112,  148, -223,  452,30291, -428,  204, -124,   79,  -48,   25,   -8,   -7,   16,  -25,   28,  -34,   27,  -36,   14,  -44,   24,\n    1,   25,  -47,   19,  -43,   38,  -49,   50,  -56,   58,  -62,   66,  -73,   83,  -99,  130, -194,  392,30294, -371,  176, -106,   66,  -39,   18,   -3,  -11,   19,  -27,   29,  -35,   28,  -37,   14,  -44,   24,\n    1,   25,  -46,   18,  -43,   37,  -48,   49,  -54,   55,  -58,   61,  -66,   73,  -87,  112, -166,  332,30296, -314,  148,  -88,   54,  -30,   11,    3,  -15,   22,  -30,   31,  -36,   29,  -37,   15,  -44,   24,\n    1,   25,  -46,   18,  -42,   36,  -47,   47,  -52,   52,  -54,   56,  -59,   64,  -74,   93, -137,  272,30298, -256,  120,  -70,   41,  -21,    4,    8,  -19,   25,  -32,   33,  -37,   29,  -38,   15,  -45,   24,\n    1,   25,  -46,   18,  -42,   36,  -46,   45,  -49,   49,  -50,   50,  -52,   54,  -61,   75, -108,  212,30300, -198,   92,  -52,   28,  -11,   -3,   13,  -22,   28,  -34,   34,  -38,   30,  -38,   15,  -45,   24,\n    1,   25,  -46,   17,  -41,   35,  -45,   44,  -47,   46,  -46,   45,  -45,   45,  -48,   57,  -79,  153,30301, -140,   63,  -34,   16,   -2,  -10,   19,  -26,   31,  -36,   36,  -39,   31,  -39,   16,  -45,   24,\n    1,   25,  -46,   17,  -41,   34,  -44,   42,  -45,   43,  -42,   40,  -38,   36,  -35,   39,  -51,   94,30302,  -82,   35,  -16,    3,    7,  -17,   24,  -30,   34,  -38,   37,  -40,   32,  -39,   16,  -45,   24,\n   44,   25,  -46,   17,  -40,   33,  -43,   41,  -43,   40,  -38,   34,  -31,   26,  -23,   21,  -22,   35,30302,  -24,    6,    2,  -10,   17,  -24,   29,  -34,   37,  -41,   39,  -42,   33,  -40,   16,  -45,   25,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_any_up64_filter.txt",
    "content": "//single phase coef Number:=32,    upsample factor:=64,\n   -3,   25,  -40,   74, -121,  189, -278,  389, -521,  668, -824,  981,-1132, 1277,-1468,32737, -987, 1053, -999,  897, -770,  634, -500,  377, -271,  185, -120,   73,  -39,   25,   -2,   -3,\n   -3,   25,  -40,   74, -123,  192, -284,  400, -540,  700, -875, 1062,-1259, 1494,-1929,32708, -488,  822, -862,  810, -714,  598, -477,  363, -263,  181, -118,   72,  -39,   24,   -2,   -1,\n   -3,   26,  -40,   75, -124,  195, -289,  410, -558,  730, -924, 1138,-1382, 1703,-2372,32651,   29,  585, -721,  719, -655,  559, -453,  349, -255,  177, -115,   70,  -38,   24,   -2,   -1,\n   -3,   26,  -41,   75, -125,  197, -294,  419, -574,  757, -969, 1211,-1500, 1904,-2795,32565,  564,  343, -576,  626, -593,  519, -428,  333, -246,  171, -112,   69,  -38,   23,   -1,   -1,\n   -4,   26,  -41,   75, -125,  198, -297,  427, -588,  783,-1011, 1280,-1613, 2097,-3197,32451, 1115,   95, -428,  530, -530,  478, -401,  317, -236,  166, -109,   67,  -37,   23,   -1,   -1,\n   -4,   26,  -40,   75, -125,  199, -300,  433, -601,  806,-1051, 1345,-1719, 2281,-3580,32309, 1683, -158, -277,  431, -464,  434, -373,  299, -225,  160, -106,   65,  -36,   22,   -1,   -1,\n   -4,   26,  -40,   75, -125,  199, -302,  438, -612,  826,-1087, 1406,-1820, 2456,-3942,32139, 2266, -415, -122,  330, -396,  389, -343,  280, -214,  153, -102,   63,  -35,   21,    0,   -1,\n   -4,   26,  -40,   74, -125,  199, -303,  442, -621,  845,-1120, 1462,-1915, 2622,-4284,31941, 2865, -675,   34,  227, -327,  342, -313,  261, -202,  146,  -98,   61,  -33,   21,    0,   -1,\n   -4,   26,  -40,   74, -124,  199, -304,  445, -629,  861,-1150, 1514,-2003, 2778,-4604,31715, 3478, -939,  193,  122, -256,  294, -281,  240, -189,  138,  -93,   59,  -32,   20,    1,   -1,\n   -4,   26,  -39,   73, -123,  198, -303,  447, -635,  874,-1176, 1561,-2086, 2924,-4904,31463, 4105,-1205,  353,   16, -183,  245, -248,  219, -175,  130,  -89,   56,  -31,   19,    1,   -1,\n   -5,   26,  -39,   72, -121,  196, -302,  447, -639,  885,-1199, 1604,-2161, 3061,-5183,31184, 4744,-1472,  515,  -92, -109,  195, -214,  196, -161,  121,  -84,   53,  -29,   18,    2,   -1,\n   -5,   26,  -38,   71, -120,  194, -300,  446, -641,  894,-1219, 1642,-2231, 3187,-5440,30879, 5396,-1741,  677, -200,  -34,  143, -179,  173, -147,  112,  -78,   50,  -27,   17,    2,   -1,\n   -5,   25,  -37,   70, -118,  191, -297,  445, -642,  900,-1235, 1675,-2293, 3303,-5677,30548, 6059,-2011,  840, -310,   41,   90, -143,  150, -131,  103,  -73,   47,  -26,   16,    3,   -2,\n   -5,   25,  -36,   68, -116,  188, -294,  442, -641,  904,-1248, 1704,-2349, 3408,-5892,30192, 6733,-2280, 1002, -420,  118,   37, -106,  125, -116,   93,  -67,   43,  -24,   15,    3,   -2,\n   -5,   25,  -35,   67, -113,  185, -290,  438, -639,  906,-1257, 1728,-2398, 3503,-6086,29811, 7416,-2548, 1165, -530,  195,  -17,  -69,  100,  -99,   83,  -61,   40,  -22,   14,    4,   -2,\n   -5,   25,  -34,   65, -110,  181, -285,  432, -634,  905,-1263, 1747,-2440, 3587,-6260,29406, 8108,-2815, 1326, -640,  272,  -72,  -31,   75,  -83,   72,  -54,   36,  -20,   13,    4,   -2,\n   -5,   24,  -33,   63, -107,  177, -280,  426, -629,  901,-1266, 1761,-2475, 3661,-6413,28978, 8808,-3079, 1487, -749,  350, -127,    7,   48,  -65,   61,  -48,   32,  -18,   11,    5,   -2,\n   -5,   24,  -32,   61, -104,  172, -274,  419, -621,  896,-1266, 1771,-2503, 3724,-6545,28527, 9515,-3341, 1645, -858,  427, -182,   46,   22,  -48,   50,  -41,   28,  -16,   10,    5,   -2,\n   -5,   23,  -31,   59, -101,  167, -267,  411, -612,  888,-1262, 1776,-2525, 3776,-6657,28055,10228,-3599, 1802, -966,  505, -237,   85,   -5,  -30,   39,  -34,   24,  -13,    9,    6,   -2,\n   -5,   23,  -30,   57,  -97,  162, -260,  402, -602,  878,-1255, 1776,-2539, 3818,-6749,27561,10946,-3852, 1956,-1073,  581, -292,  124,  -32,  -12,   27,  -27,   20,  -11,    8,    7,   -2,\n   -5,   22,  -29,   54,  -93,  156, -252,  392, -590,  866,-1244, 1771,-2547, 3849,-6821,27046,11669,-4101, 2107,-1178,  657, -348,  164,  -60,    7,   15,  -19,   16,   -8,    6,    7,   -3,\n   -5,   22,  -27,   52,  -89,  150, -243,  381, -577,  852,-1231, 1762,-2548, 3869,-6874,26512,12394,-4343, 2254,-1281,  733, -403,  203,  -87,   25,    3,  -12,   11,   -6,    5,    8,   -3,\n   -5,   21,  -26,   50,  -85,  144, -234,  369, -563,  835,-1214, 1749,-2542, 3879,-6908,25959,13121,-4579, 2398,-1382,  807, -457,  242, -115,   44,  -10,   -4,    6,   -3,    3,    9,   -3,\n   -5,   21,  -24,   47,  -81,  137, -225,  356, -547,  817,-1195, 1731,-2530, 3879,-6923,25388,13850,-4808, 2538,-1481,  880, -511,  282, -143,   63,  -22,    4,    2,   -1,    2,    9,   -3,\n   -5,   20,  -23,   44,  -77,  130, -215,  343, -530,  797,-1173, 1709,-2512, 3869,-6919,24799,14578,-5029, 2672,-1577,  951, -564,  320, -170,   82,  -35,   12,   -3,    2,    0,   10,   -3,\n   -5,   20,  -22,   42,  -72,  123, -205,  329, -512,  775,-1148, 1682,-2487, 3849,-6898,24195,15305,-5241, 2802,-1670, 1020, -616,  359, -198,  101,  -47,   20,   -8,    5,   -1,   11,   -3,\n   -4,   19,  -20,   39,  -67,  116, -194,  314, -492,  751,-1120, 1652,-2456, 3819,-6859,23575,16031,-5443, 2926,-1759, 1088, -667,  397, -225,  120,  -60,   28,  -13,    8,   -3,   11,   -3,\n   -4,   18,  -18,   36,  -63,  109, -183,  298, -472,  725,-1089, 1617,-2419, 3780,-6804,22941,16753,-5636, 3044,-1846, 1154, -717,  434, -252,  139,  -73,   36,  -18,   10,   -4,   12,   -3,\n   -4,   18,  -17,   33,  -58,  101, -171,  282, -451,  698,-1056, 1579,-2376, 3731,-6732,22294,17471,-5818, 3156,-1928, 1217, -766,  471, -279,  158,  -86,   44,  -23,   13,   -6,   13,   -4,\n   -4,   17,  -15,   31,  -53,   93, -160,  266, -428,  669,-1021, 1537,-2327, 3673,-6644,21634,18184,-5988, 3261,-2006, 1277, -813,  506, -305,  177,  -98,   53,  -28,   16,   -7,   13,   -4,\n   -4,   16,  -14,   28,  -48,   85, -148,  249, -405,  639, -983, 1492,-2273, 3607,-6541,20962,18890,-6146, 3359,-2080, 1335, -858,  541, -331,  195, -111,   61,  -33,   19,   -9,   14,   -4,\n   -4,   16,  -12,   25,  -43,   77, -136,  231, -381,  608, -944, 1443,-2213, 3532,-6423,20281,19590,-6291, 3450,-2149, 1391, -902,  575, -357,  214, -123,   69,  -38,   22,  -11,   15,   -4,\n   -4,   15,  -11,   22,  -38,   69, -123,  214, -357,  575, -902, 1391,-2149, 3450,-6291,19590,20281,-6423, 3532,-2213, 1443, -944,  608, -381,  231, -136,   77,  -43,   25,  -12,   16,   -4,\n   -4,   14,   -9,   19,  -33,   61, -111,  195, -331,  541, -858, 1335,-2080, 3359,-6146,18890,20962,-6541, 3607,-2273, 1492, -983,  639, -405,  249, -148,   85,  -48,   28,  -14,   16,   -4,\n   -4,   13,   -7,   16,  -28,   53,  -98,  177, -305,  506, -813, 1277,-2006, 3261,-5988,18184,21634,-6644, 3673,-2327, 1537,-1021,  669, -428,  266, -160,   93,  -53,   31,  -15,   17,   -4,\n   -4,   13,   -6,   13,  -23,   44,  -86,  158, -279,  471, -766, 1217,-1928, 3156,-5818,17471,22294,-6732, 3731,-2376, 1579,-1056,  698, -451,  282, -171,  101,  -58,   33,  -17,   18,   -4,\n   -3,   12,   -4,   10,  -18,   36,  -73,  139, -252,  434, -717, 1154,-1846, 3044,-5636,16753,22941,-6804, 3780,-2419, 1617,-1089,  725, -472,  298, -183,  109,  -63,   36,  -18,   18,   -4,\n   -3,   11,   -3,    8,  -13,   28,  -60,  120, -225,  397, -667, 1088,-1759, 2926,-5443,16031,23575,-6859, 3819,-2456, 1652,-1120,  751, -492,  314, -194,  116,  -67,   39,  -20,   19,   -4,\n   -3,   11,   -1,    5,   -8,   20,  -47,  101, -198,  359, -616, 1020,-1670, 2802,-5241,15305,24195,-6898, 3849,-2487, 1682,-1148,  775, -512,  329, -205,  123,  -72,   42,  -22,   20,   -5,\n   -3,   10,    0,    2,   -3,   12,  -35,   82, -170,  320, -564,  951,-1577, 2672,-5029,14578,24799,-6919, 3869,-2512, 1709,-1173,  797, -530,  343, -215,  130,  -77,   44,  -23,   20,   -5,\n   -3,    9,    2,   -1,    2,    4,  -22,   63, -143,  282, -511,  880,-1481, 2538,-4808,13850,25388,-6923, 3879,-2530, 1731,-1195,  817, -547,  356, -225,  137,  -81,   47,  -24,   21,   -5,\n   -3,    9,    3,   -3,    6,   -4,  -10,   44, -115,  242, -457,  807,-1382, 2398,-4579,13121,25959,-6908, 3879,-2542, 1749,-1214,  835, -563,  369, -234,  144,  -85,   50,  -26,   21,   -5,\n   -3,    8,    5,   -6,   11,  -12,    3,   25,  -87,  203, -403,  733,-1281, 2254,-4343,12394,26512,-6874, 3869,-2548, 1762,-1231,  852, -577,  381, -243,  150,  -89,   52,  -27,   22,   -5,\n   -3,    7,    6,   -8,   16,  -19,   15,    7,  -60,  164, -348,  657,-1178, 2107,-4101,11669,27046,-6821, 3849,-2547, 1771,-1244,  866, -590,  392, -252,  156,  -93,   54,  -29,   22,   -5,\n   -2,    7,    8,  -11,   20,  -27,   27,  -12,  -32,  124, -292,  581,-1073, 1956,-3852,10946,27561,-6749, 3818,-2539, 1776,-1255,  878, -602,  402, -260,  162,  -97,   57,  -30,   23,   -5,\n   -2,    6,    9,  -13,   24,  -34,   39,  -30,   -5,   85, -237,  505, -966, 1802,-3599,10228,28055,-6657, 3776,-2525, 1776,-1262,  888, -612,  411, -267,  167, -101,   59,  -31,   23,   -5,\n   -2,    5,   10,  -16,   28,  -41,   50,  -48,   22,   46, -182,  427, -858, 1645,-3341, 9515,28527,-6545, 3724,-2503, 1771,-1266,  896, -621,  419, -274,  172, -104,   61,  -32,   24,   -5,\n   -2,    5,   11,  -18,   32,  -48,   61,  -65,   48,    7, -127,  350, -749, 1487,-3079, 8808,28978,-6413, 3661,-2475, 1761,-1266,  901, -629,  426, -280,  177, -107,   63,  -33,   24,   -5,\n   -2,    4,   13,  -20,   36,  -54,   72,  -83,   75,  -31,  -72,  272, -640, 1326,-2815, 8108,29406,-6260, 3587,-2440, 1747,-1263,  905, -634,  432, -285,  181, -110,   65,  -34,   25,   -5,\n   -2,    4,   14,  -22,   40,  -61,   83,  -99,  100,  -69,  -17,  195, -530, 1165,-2548, 7416,29811,-6086, 3503,-2398, 1728,-1257,  906, -639,  438, -290,  185, -113,   67,  -35,   25,   -5,\n   -2,    3,   15,  -24,   43,  -67,   93, -116,  125, -106,   37,  118, -420, 1002,-2280, 6733,30192,-5892, 3408,-2349, 1704,-1248,  904, -641,  442, -294,  188, -116,   68,  -36,   25,   -5,\n   -2,    3,   16,  -26,   47,  -73,  103, -131,  150, -143,   90,   41, -310,  840,-2011, 6059,30548,-5677, 3303,-2293, 1675,-1235,  900, -642,  445, -297,  191, -118,   70,  -37,   25,   -5,\n   -1,    2,   17,  -27,   50,  -78,  112, -147,  173, -179,  143,  -34, -200,  677,-1741, 5396,30879,-5440, 3187,-2231, 1642,-1219,  894, -641,  446, -300,  194, -120,   71,  -38,   26,   -5,\n   -1,    2,   18,  -29,   53,  -84,  121, -161,  196, -214,  195, -109,  -92,  515,-1472, 4744,31184,-5183, 3061,-2161, 1604,-1199,  885, -639,  447, -302,  196, -121,   72,  -39,   26,   -5,\n   -1,    1,   19,  -31,   56,  -89,  130, -175,  219, -248,  245, -183,   16,  353,-1205, 4105,31463,-4904, 2924,-2086, 1561,-1176,  874, -635,  447, -303,  198, -123,   73,  -39,   26,   -4,\n   -1,    1,   20,  -32,   59,  -93,  138, -189,  240, -281,  294, -256,  122,  193, -939, 3478,31715,-4604, 2778,-2003, 1514,-1150,  861, -629,  445, -304,  199, -124,   74,  -40,   26,   -4,\n   -1,    0,   21,  -33,   61,  -98,  146, -202,  261, -313,  342, -327,  227,   34, -675, 2865,31941,-4284, 2622,-1915, 1462,-1120,  845, -621,  442, -303,  199, -125,   74,  -40,   26,   -4,\n   -1,    0,   21,  -35,   63, -102,  153, -214,  280, -343,  389, -396,  330, -122, -415, 2266,32139,-3942, 2456,-1820, 1406,-1087,  826, -612,  438, -302,  199, -125,   75,  -40,   26,   -4,\n   -1,   -1,   22,  -36,   65, -106,  160, -225,  299, -373,  434, -464,  431, -277, -158, 1683,32309,-3580, 2281,-1719, 1345,-1051,  806, -601,  433, -300,  199, -125,   75,  -40,   26,   -4,\n   -1,   -1,   23,  -37,   67, -109,  166, -236,  317, -401,  478, -530,  530, -428,   95, 1115,32451,-3197, 2097,-1613, 1280,-1011,  783, -588,  427, -297,  198, -125,   75,  -41,   26,   -4,\n   -1,   -1,   23,  -38,   69, -112,  171, -246,  333, -428,  519, -593,  626, -576,  343,  564,32565,-2795, 1904,-1500, 1211, -969,  757, -574,  419, -294,  197, -125,   75,  -41,   26,   -3,\n   -1,   -2,   24,  -38,   70, -115,  177, -255,  349, -453,  559, -655,  719, -721,  585,   29,32651,-2372, 1703,-1382, 1138, -924,  730, -558,  410, -289,  195, -124,   75,  -40,   26,   -3,\n   -1,   -2,   24,  -39,   72, -118,  181, -263,  363, -477,  598, -714,  810, -862,  822, -488,32708,-1929, 1494,-1259, 1062, -875,  700, -540,  400, -284,  192, -123,   74,  -40,   25,   -3,\n   -3,   -2,   25,  -39,   73, -120,  185, -271,  377, -500,  634, -770,  897, -999, 1053, -987,32737,-1468, 1277,-1132,  981, -824,  668, -521,  389, -278,  189, -121,   74,  -40,   25,   -3,\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/coef/resample_coef.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"resample_coef.h\"\n#include \"hal_location.h\"\n#include \"plat_types.h\"\n\n#define COEF_DEF(n) FLASH_RODATA_DEF(n)\n\nstatic const int16_t COEF_DEF(filter_50p7k_to_48k)[] = {\n#include \"resample_50p7k_to_48k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_50p7k_to_48k) = {\n    .upsample_factor = 69,\n    .downsample_factor = 73,\n    .phase_coef_num = 6,\n    .total_coef_num = ARRAY_SIZE(filter_50p7k_to_48k),\n    .coef_group = filter_50p7k_to_48k,\n};\n\nstatic const int16_t COEF_DEF(filter_50p7k_to_44p1k)[] = {\n#include \"resample_50p7k_to_44p1k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_50p7k_to_44p1k) = {\n    .upsample_factor = 33,\n    .downsample_factor = 38,\n    .phase_coef_num = 6,\n    .total_coef_num = ARRAY_SIZE(filter_50p7k_to_44p1k),\n    .coef_group = filter_50p7k_to_44p1k,\n};\n\nstatic const int16_t COEF_DEF(filter_44p1k_to_48k)[] = {\n#include \"resample_44p1k_to_48k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_44p1k_to_48k) = {\n    .upsample_factor = 160,\n    .downsample_factor = 147,\n    .phase_coef_num = 8,\n    .total_coef_num = ARRAY_SIZE(filter_44p1k_to_48k),\n    .coef_group = filter_44p1k_to_48k,\n};\n\nstatic const int16_t COEF_DEF(filter_48k_to_44p1k)[] = {\n#include \"resample_48k_to_44p1k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_48k_to_44p1k) = {\n    .upsample_factor = 147,\n    .downsample_factor = 160,\n    .phase_coef_num = 8,\n    .total_coef_num = ARRAY_SIZE(filter_48k_to_44p1k),\n    .coef_group = filter_48k_to_44p1k,\n};\n\nstatic const int16_t COEF_DEF(filter_32k_to_50p7k)[] = {\n#include \"resample_32k_to_50p7k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_32k_to_50p7k) = {\n    .upsample_factor = 73,\n    .downsample_factor = 46,\n    .phase_coef_num = 24,\n    .total_coef_num = ARRAY_SIZE(filter_32k_to_50p7k),\n    .coef_group = filter_32k_to_50p7k,\n};\n\nstatic const int16_t COEF_DEF(filter_44p1k_to_50p7k)[] = {\n#include \"resample_44p1k_to_50p7k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_44p1k_to_50p7k) = {\n    .upsample_factor = 38,\n    .downsample_factor = 33,\n    .phase_coef_num = 24,\n    .total_coef_num = ARRAY_SIZE(filter_44p1k_to_50p7k),\n    .coef_group = filter_44p1k_to_50p7k,\n};\n\nstatic const int16_t COEF_DEF(filter_48k_to_50p7k)[] = {\n#include \"resample_48k_to_50p7k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_48k_to_50p7k) = {\n    .upsample_factor = 73,\n    .downsample_factor = 69,\n    .phase_coef_num = 24,\n    .total_coef_num = ARRAY_SIZE(filter_48k_to_50p7k),\n    .coef_group = filter_48k_to_50p7k,\n};\n\nstatic const int16_t COEF_DEF(filter_8k_to_8p4k)[] = {\n#include \"resample_8k_to_8p4k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_8k_to_8p4k) = {\n    .upsample_factor = 73,\n    .downsample_factor = 69,\n    .phase_coef_num = 18,\n    .total_coef_num = ARRAY_SIZE(filter_8k_to_8p4k),\n    .coef_group = filter_8k_to_8p4k,\n};\n\nstatic const int16_t COEF_DEF(filter_8p4k_to_8k)[] = {\n#include \"resample_8p4k_to_8k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_8p4k_to_8k) = {\n    .upsample_factor = 69,\n    .downsample_factor = 73,\n    .phase_coef_num = 16,\n    .total_coef_num = ARRAY_SIZE(filter_8p4k_to_8k),\n    .coef_group = filter_8p4k_to_8k,\n};\n\nstatic const int16_t COEF_DEF(filter_16k_to_48k)[] = {\n#include \"resample_16k_to_48k_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_16k_to_48k) = {\n    .upsample_factor = 3,\n    .downsample_factor = 1,\n    .phase_coef_num = 30,\n    .total_coef_num = ARRAY_SIZE(filter_16k_to_48k),\n    .coef_group = filter_16k_to_48k,\n};\n\n#ifdef RESAMPLE_ANY_SAMPLE_RATE\nstatic const int16_t COEF_DEF(filter_any_up64)[] = {\n#include \"resample_any_up64_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_any_up64) = {\n    .upsample_factor = 64,\n    .downsample_factor = 0,\n    .phase_coef_num = 32,\n    .total_coef_num = ARRAY_SIZE(filter_any_up64),\n    .coef_group = filter_any_up64,\n};\n\nstatic const int16_t COEF_DEF(filter_any_up256)[] = {\n#include \"resample_any_up256_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_any_up256) = {\n    .upsample_factor = 256,\n    .downsample_factor = 0,\n    .phase_coef_num = 24,\n    .total_coef_num = ARRAY_SIZE(filter_any_up256),\n    .coef_group = filter_any_up256,\n};\n\nstatic const int16_t COEF_DEF(filter_any_up512_32)[] = {\n#include \"resample_any_up512_32_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_any_up512_32) = {\n    .upsample_factor = 512,\n    .downsample_factor = 0,\n    .phase_coef_num = 32,\n    .total_coef_num = ARRAY_SIZE(filter_any_up512_32),\n    .coef_group = filter_any_up512_32,\n};\n\nstatic const int16_t COEF_DEF(filter_any_up512_36)[] = {\n#include \"resample_any_up512_36_filter.txt\"\n};\nconst struct RESAMPLE_COEF_T COEF_DEF(resample_coef_any_up512_36) = {\n    .upsample_factor = 512,\n    .downsample_factor = 0,\n    .phase_coef_num = 36,\n    .total_coef_num = ARRAY_SIZE(filter_any_up512_36),\n    .coef_group = filter_any_up512_36,\n};\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/include/audio_resample.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AUDIO_RESAMPLER_H__\n#define __AUDIO_RESAMPLER_H__\n\n#error \"audio_resample.h/c have been obsolete. Please use audio_resample_ex.h/c instead\"\n\n#if 0\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nenum audio_resample_status_t{\n    AUDIO_RESAMPLE_STATUS_SUCESS = 0,\n    AUDIO_RESAMPLE_STATUS_CONTINUE,\n    AUDIO_RESAMPLE_STATUS_FAILED,\n};\n\nenum resample_id_t{\n\tRESAMPLE_ID_8TO8P4 = 0,\n\tRESAMPLE_ID_8P4TO8,\n\tRESAMPLE_ID_NUM\n};\n\n#define RESAMPLE_TYPE_DOWN_STEREO 0x1\n#define RESAMPLE_TYPE_UP_MONO   0x2\n#define RESAMPLE_TYPE_DOWN_MONO 0x4\n\nenum audio_resample_status_t audio_resample_open(int type, enum resample_id_t resample_id_up, \n        enum resample_id_t resample_id_down, uint8_t *up_buf, uint8_t *down_buf, void* (* alloc_ext)(int));\nenum audio_resample_status_t audio_resample_cfg(int type, short *OutBuf, int OutLen);\nenum audio_resample_status_t audio_resample_run(int type, short *InBuf, int InLen);\nvoid audio_resample_close(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/include/audio_resample_ex.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AUDIO_RESAMPLER_EX_H__\n#define __AUDIO_RESAMPLER_EX_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_aud.h\"\n\nenum RESAMPLE_STATUS_T {\n    RESAMPLE_STATUS_OK = 0,\n    RESAMPLE_STATUS_ERROR,\n    RESAMPLE_STATUS_NO_COEF,\n    RESAMPLE_STATUS_NO_COEF_GROUP,\n    RESAMPLE_STATUS_BAD_COEF_NUM,\n    RESAMPLE_STATUS_BAD_FACTOR,\n    RESAMPLE_STATUS_NO_BUF,\n    RESAMPLE_STATUS_BUF_MISALIGN,\n    RESAMPLE_STATUS_BUF_TOO_SMALL,\n    RESAMPLE_STATUS_BAD_ID,\n\n    RESAMPLE_STATUS_OUT_FULL,\n    RESAMPLE_STATUS_IN_EMPTY,\n    RESAMPLE_STATUS_DONE,\n};\n\nstruct RESAMPLE_COEF_T {\n    uint16_t upsample_factor;\n    uint16_t downsample_factor;\n    uint8_t phase_coef_num;\n    uint16_t total_coef_num;\n    const int16_t *coef_group;\n};\n\nstruct RESAMPLE_CFG_T {\n    enum AUD_CHANNEL_NUM_T chans;\n    enum AUD_BITS_T bits;\n    float ratio_step;\n    const struct RESAMPLE_COEF_T *coef;\n    void *buf;\n    uint32_t size;\n};\n\nstruct RESAMPLE_IO_BUF_T {\n    const void *in;\n    uint32_t in_size;\n    void *out;\n    uint32_t out_size;\n    // For cyclic output buffer\n    void *out_cyclic_start;\n    void *out_cyclic_end;\n};\n\ntypedef void *RESAMPLE_ID;\n\nuint32_t audio_resample_ex_get_buffer_size(enum AUD_CHANNEL_NUM_T chans, enum AUD_BITS_T bits, uint8_t phase_coef_num);\nenum RESAMPLE_STATUS_T audio_resample_ex_open(const struct RESAMPLE_CFG_T *cfg, RESAMPLE_ID *id_ptr);\nenum RESAMPLE_STATUS_T audio_resample_ex_run(RESAMPLE_ID id, const struct RESAMPLE_IO_BUF_T *io, uint32_t *in_size_ptr, uint32_t *out_size_ptr);\nvoid audio_resample_ex_close(RESAMPLE_ID id);\nvoid audio_resample_ex_flush(RESAMPLE_ID id);\n\nenum RESAMPLE_STATUS_T audio_resample_ex_set_ratio_step(RESAMPLE_ID id, float ratio_step);\nenum RESAMPLE_STATUS_T audio_resample_ex_get_ratio_step(RESAMPLE_ID id, float *ratio_step);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/include/audio_resample_ex_32bit.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AUDIO_RESAMPLER_EX_H__\n#define __AUDIO_RESAMPLER_EX_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_aud.h\"\n\nenum RESAMPLE_STATUS_T {\n    RESAMPLE_STATUS_OK = 0,\n    RESAMPLE_STATUS_ERROR,\n    RESAMPLE_STATUS_NO_COEF,\n    RESAMPLE_STATUS_NO_COEF_GROUP,\n    RESAMPLE_STATUS_BAD_COEF_NUM,\n    RESAMPLE_STATUS_BAD_FACTOR,\n    RESAMPLE_STATUS_NO_BUF,\n    RESAMPLE_STATUS_BUF_MISALIGN,\n    RESAMPLE_STATUS_BUF_TOO_SMALL,\n    RESAMPLE_STATUS_BAD_ID,\n\n    RESAMPLE_STATUS_OUT_FULL,\n    RESAMPLE_STATUS_IN_EMPTY,\n    RESAMPLE_STATUS_DONE,\n};\n\nstruct RESAMPLE_COEF_T {\n    uint16_t upsample_factor;\n    uint16_t downsample_factor;\n    uint8_t phase_coef_num;\n    uint16_t total_coef_num;\n    const int16_t *coef_group;\n};\n\nstruct RESAMPLE_CFG_T {\n    enum AUD_CHANNEL_NUM_T chans;\n    enum AUD_BITS_T bits;\n    float ratio_step;\n    const struct RESAMPLE_COEF_T *coef;\n    void *buf;\n    uint32_t size;\n};\n\nstruct RESAMPLE_IO_BUF_T {\n    const void *in;\n    uint32_t in_size;\n    void *out;\n    uint32_t out_size;\n    // For cyclic output buffer\n    void *out_cyclic_start;\n    void *out_cyclic_end;\n};\n\ntypedef void *RESAMPLE_ID;\n\nuint32_t audio_resample_ex_get_buffer_size_32bit(enum AUD_CHANNEL_NUM_T chans, enum AUD_BITS_T bits, uint8_t phase_coef_num);\nenum RESAMPLE_STATUS_T audio_resample_ex_open_32bit(const struct RESAMPLE_CFG_T *cfg, RESAMPLE_ID *id_ptr);\nenum RESAMPLE_STATUS_T audio_resample_ex_run_32bit(RESAMPLE_ID id, const struct RESAMPLE_IO_BUF_T *io, uint32_t *in_size_ptr, uint32_t *out_size_ptr);\nvoid audio_resample_ex_close_32bit(RESAMPLE_ID id);\nvoid audio_resample_ex_flush_32bit(RESAMPLE_ID id);\n\nenum RESAMPLE_STATUS_T audio_resample_ex_set_ratio_step_32bit(RESAMPLE_ID id, float ratio_step);\nenum RESAMPLE_STATUS_T audio_resample_ex_get_ratio_step_32bit(RESAMPLE_ID id, float *ratio_step);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/audio/process/resample/include/resample_coef.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __RESAMPLE_COEF_H__\n#define __RESAMPLE_COEF_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"audio_resample_ex.h\"\n\nextern const struct RESAMPLE_COEF_T resample_coef_50p7k_to_48k;\nextern const struct RESAMPLE_COEF_T resample_coef_50p7k_to_44p1k;\nextern const struct RESAMPLE_COEF_T resample_coef_44p1k_to_48k;\nextern const struct RESAMPLE_COEF_T resample_coef_48k_to_44p1k;\n\nextern const struct RESAMPLE_COEF_T resample_coef_32k_to_50p7k;\nextern const struct RESAMPLE_COEF_T resample_coef_44p1k_to_50p7k;\nextern const struct RESAMPLE_COEF_T resample_coef_48k_to_50p7k;\nextern const struct RESAMPLE_COEF_T resample_coef_8k_to_8p4k;\nextern const struct RESAMPLE_COEF_T resample_coef_8p4k_to_8k;\n\nextern const struct RESAMPLE_COEF_T resample_coef_16k_to_48k;\n\nextern const struct RESAMPLE_COEF_T resample_coef_any_up64;\nextern const struct RESAMPLE_COEF_T resample_coef_any_up256;\nextern const struct RESAMPLE_COEF_T resample_coef_any_up512_32;\nextern const struct RESAMPLE_COEF_T resample_coef_any_up512_36;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/Pcm8k_Cvsd.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/////////////////////////////////////////////////////////////////////////\n//PCM8K <=> CVSD                                      \n/////////////////////////////////////////////////////////////////////////\n#ifndef _PCM8K_CVSD_H_\n#define _PCM8K_CVSD_H_\n\n\n\n//max num of input samples\n#define MAXNUMOFSAMPLES 128\n\n\n//resample delay \n#define RESAMPLE_DELAY 32 \n\n\nvoid Pcm8k_CvsdInit(void);\nvoid Pcm8kToCvsd(short *PcmInBuf, unsigned char *CvsdOutBuf, int numsample);\nvoid CvsdToPcm8k(unsigned char *CvsdInBuf, short *PcmOutBuf, int numsample, int LossFlag);\n\n\n#endif\n\n\n\n\n\n\n\n\n\n\n\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/SubBandBasedAEC.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SubBandAec_H__\n#define __SubBandAec_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct\n{\n    int bypass;\n    int filter_size;\n} SubBandAecConfig;\n\nstruct SubBandAecState_;\n\ntypedef struct SubBandAecState_ SubBandAecState;\n\nSubBandAecState *SubBandAec_init(int sample_rate, int frame_size, const SubBandAecConfig *cfg);\n\nvoid SubBandAec_destroy(SubBandAecState *st);\n\nint32_t SubBandAec_process(SubBandAecState *st, short *datain, short *echoref, short *dataout, short Len);\n\nfloat SubBandAec_get_required_mips(SubBandAecState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/VoiceActivityDetection.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __VOICEACTIVITYDETECTION_H__\n#define __VOICEACTIVITYDETECTION_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    float     snrthd;\n\tfloat     energythd;\n} VADConfig;\n\nstruct VADState_;\n\ntypedef struct VADState_ VADState;\n\nVADState *VAD_process_state_init(int32_t sample_rate, int32_t frame_size, const VADConfig *cfg);\n\nint32_t VAD_set_config(VADState *st, const VADConfig *cfg);\n\nshort VAD_process_run(VADState *st, short *in);\n\nint32_t VAD_destroy(VADState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/ae_macros.h",
    "content": "#ifndef AE_MACROS_H\n#define AE_MACROS_H\n\n#define CONSTRUCT_FUNC_NAME_A(p, c, m)          p ## _ ## c ## _ ## m\n#define CONSTRUCT_FUNC_NAME(p, c, m)            CONSTRUCT_FUNC_NAME_A(p, c, m)\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/ae_math.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef AE_MATH_H\n#define AE_MATH_H\n\n#include \n#include \n\n#ifdef __arm__\n#include \"arm_math.h\"\n#endif\n\n#define AE_PI       3.14159265358979323846f\n\n#define EPS (1e-7f)\n\n#define AE_CLAMP(x,lo,hi) ((x) < (lo) ? (lo) : (x) > (hi) ? (hi) : (x))\n\n#ifdef __arm__\n#define AE_SSAT16(x) __SSAT((int32_t)(x), 16)\n#define AE_SSAT24(x) __SSAT((int32_t)(x), 24)\n#else\n#define AE_SSAT16(x) AE_CLAMP(x,-32768,32767)\n#define AE_SSAT24(x) AE_CLAMP(x,-16777216,16777215)\n#endif\n\n#define AE_ABS(x) ((x) > 0 ? (x) : (-(x)))\n\n#define AE_FLOOR(x) (floorf(x))\n\n#define AE_ROUND(x) (roundf(x))\n\n#define AE_INT(x) ((int)(x))\n\n// deal with x > -1 && x < 0\n#define AE_SIGN(x) ((AE_INT(x) == 0 && (x) < 0) ? \"-\" : \"\")\n\n#define AE_FRAC(x) ((int)(((x) > 0 ? ((x) - AE_INT(x)) : (AE_INT(x) - (x))) * 1000000))\n\n#define AE_MIN(a,b) ((a) < (b) ? (a) : (b))\n\n#define AE_MAX(a,b) ((a) > (b) ? (a) : (b))\n\n#define SQUARE(x) ((x) * (x))\n\n#define DB2LIN(x) (powf(10.f, (x) / 20.f))\n\n#ifdef VQE_SIMULATE\n#define AE_SIN(x) sinf(x)\n#define AE_COS(x) cosf(x)\n#else\n#define AE_SIN(x) arm_sin_f32(x)\n#define AE_COS(x) arm_cos_f32(x)\n#endif\n\nint ae_gcd(int u, int v);\n\nint ipow(int base, int exp);\n\nfloat ipowf(float base, int exp);\n\nfloat pow_int(float base, int exp);\n\nfloat expint(int n, float x);\n\nfloat sqrt_approx(float z);\n\n#define AE_RAND_MAX (32767)\n\nvoid ae_srand(unsigned int init);\n\nint ae_rand(void);\n\nvoid speech_conv(float *x, float *y, short len1,int len2, float *out);\n\nvoid scale_int16(int16_t *pDst, int16_t *pSrc, float scale, uint32_t blockSize);\n\nint32_t nextpow2(int32_t N);\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/agc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef AGC_H\n#define AGC_H\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    int32_t     bypass;\n    int32_t     target_level;\n    int32_t     compression_gain;\n    int32_t     limiter_enable;\n} AgcConfig;\n\nstruct AgcState_;\n\ntypedef struct AgcState_ AgcState;\n\nAgcState *agc_state_create(int32_t sample_rate, int32_t frame_size, const AgcConfig *cfg);\n\nint32_t agc_state_destroy(AgcState *st);\n\nint32_t agc_set_config(AgcState *st, const AgcConfig *cfg);\n\nint32_t agc_process(AgcState *st, int16_t *pcm_buf, int32_t pcm_len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/anc_assist_algo.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n\n#ifndef __AF_ANC_H__\n#define __AF_ANC_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n#include \"hal_aud.h\"\n\n//#define AF_ANC_DUMP_DATA\n\n\n#if defined(_24BITS_ENABLE)\n#define _SAMPLE_BITS        (24)\ntypedef int   ASSIST_PCM_T;\n#else\n#define _SAMPLE_BITS        (16)\ntypedef short   ASSIST_PCM_T;\n#endif\n\n\ntypedef enum{\n    AF_ANC_OFF = 0,\n    AF_ANC_ON,\n}AF_ANC_STATUS_T;\n\ntypedef enum{\n    AF_ANC_MUSIC = 0,\n    AF_ANC_STANDALONE,\n}AF_ANC_MODE_T;\n\n\ntypedef struct LeakageDetectionState_ LeakageDetectionState;\nLeakageDetectionState *LeakageDetection_create(int frame_size,int delay0);\nvoid LeakageDetection_destroy(LeakageDetectionState *st);\nint LeakageDetection_process(LeakageDetectionState *leak_st,AF_ANC_STATUS_T adapflag,ASSIST_PCM_T *fb_buf,ASSIST_PCM_T *ref_buf,int pcm_len);\nvoid LeakageDetection_adjust_delay(LeakageDetectionState *st, int delay0);\n\nvoid get_pilot_data(uint8_t *buf,int len);\n\n\n\n\n\ntypedef struct ANCAssistMulti_ ANCAssistMultiState;\n\nANCAssistMultiState * ANCAssistMulti_create(int sample_rate, int frame_size,int fftsize);\nvoid ANCAssistMulti_process(ANCAssistMultiState *st, ASSIST_PCM_T *inF, ASSIST_PCM_T *inB,ASSIST_PCM_T *inR,int frame_len);\nvoid ANCAssistMulti_destroy(ANCAssistMultiState * st);\n\n\n\n\n//need to implement\nvoid anc_assist_change_curve(int curve_id);\n// void audio_adpt_status_set_anc_mode(uint8_t mode, bool init);\n// void audio_engine_set_anc_gain(int32_t gain_ch_l, int32_t gain_ch_r, int type);\n// int af_anc_sync_wind_status(uint8_t status);\nbool audio_engine_tt_is_on();\n// bool anc_usb_app_get_status();\n// void audio_adpt_status_set_wind_status(int state);\nvoid anc_assist_set_anc_gain(float gain_ch_l, float gain_ch_r,enum ANC_TYPE_T anc_type);\n\n\nextern bool app_anc_work_status();\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/audio_drc2.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __AUDIO_DRC2_H__\n#define __AUDIO_DRC2_H__\n\n#include \n\n#define MAX_LOOK_AHEAD_TIME (10)\n\ntypedef struct {\n    int knee;\n    int look_ahead_time;\n    int threshold;\n    float makeup_gain;\n    int ratio;\n    int attack_time;\n    int release_time;\n} DRC2_CFG_T;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid audio_drc2_open(int sample_rate, int sample_bits, int ch_num);\nvoid audio_drc2_close(void);\nvoid audio_drc2_process(uint8_t *buf_p_l, uint8_t *buf_p_r, uint32_t pcm_len);\nvoid audio_drc2_set_cfg(const DRC2_CFG_T *cfg);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/buffer_manager.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef BUFFER_MANAGER_H\n#define BUFFER_MANAGER_H\n\n#include \n\nstruct BufferManager_;\n\ntypedef struct BufferManager_ BufferManager;\n\ntypedef enum\n{\n    BUFFER_MANAGER_CACHING = 0,\n    BUFFER_MANAGER_CACHE_OK = 1,\n    BUFFER_MANAGER_FLUSH = 2\n} BufferManagerStatus;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// Buffer management for decoupling codec frame size and vqe frame size,\n// vqe frame size must be larger than codec frame size.\n// When init buffer manager, input buffer should inited by\n// buffer_manager_create(codec_frame_size, vqe_frame_size)\n// output buffer should inited by\n// buffer_manager_create(vqe_frame_size, codec_frame_size)\nBufferManager *buffer_manager_create(int inlen, int outlen, int sample_size);\n\nvoid buffer_manager_destroy(BufferManager *st);\n\nBufferManagerStatus buffer_manager_process(BufferManager *st, void *inbuf, int inlen, void *outbuf, int outlen);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/compexp.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef COMPEXP_H\n#define COMPEXP_H\n\n#include \n\ntypedef struct\n{\n    int32_t     bypass;\n    float       comp_threshold;\n    float       comp_ratio;\n    float       expand_threshold;\n    float       expand_ratio;\n    float       attack_time;\n    float       release_time;\n    float       makeup_gain;\n    int32_t     delay;\n} CompexpConfig;\n\ntypedef struct CompexpState_ CompexpState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nCompexpState *compexp_create(int32_t sample_rate, int32_t frame_size, const CompexpConfig *config);\n\nint32_t compexp_destroy(CompexpState *st);\n\nint32_t compexp_set_config(CompexpState *st, const CompexpConfig *cfg);\n\nint32_t compexp_process(CompexpState *st, int16_t *pcm_buf, int32_t pcm_len);\n\nfloat compexp_get_required_mips(CompexpState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/crossfade.h",
    "content": "#ifndef CROSSFADE_H\n#define CROSSFADE_H\n\n#include \n\nenum CROSSFADE_STATUS_T {\n    CROSSFADE_STATUS_OK = 0,\n    CROSSFADE_STATUS_ERROR,\n    CROSSFADE_STATUS_NO_BUF,\n    CROSSFADE_STATUS_BUF_MISALIGN,\n    CROSSFADE_STATUS_BUF_TOO_SMALL,\n};\n\ntypedef struct\n{\n    float overlap_time;\n    float coef1;\n    float coef2;\n\n    void *buf;\n    uint32_t size;\n} CrossFadeConfig;\n\ntypedef void *CrossFadeId;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nuint32_t crossfade_get_buffer_size(void);\n\nenum CROSSFADE_STATUS_T crossfade_init(int32_t sample_rate, int32_t sample_bits, CrossFadeConfig *cfg, CrossFadeId *id);\n\nvoid crossfade_destroy(CrossFadeId id);\n\n/*\n * outbuf = (1 - weight) * inbuf1 + weight * (coef1 * inbuf1 + coef2 * inbuf2)\n *        = (1 - weight + weight * coef1) * inbuf1 + weight * coef2 * inbuf2\n *        = (1 - (1 - coef1) * weight) * inbuf1 + weight * coef2 * inbuf2;\n * out_ch_num = max(ch_num1, ch_num2);\n * final data is outbuf = inbuf1 * coef1 + inbuf2 * coef2;\n *\n * fadein:\n *  crossfade_process(st, NULL, 1, inbuf, ch_num, outbuf, frame_size);\n *\n * fadeout:\n *  crossfade_process(st, inbuf, ch_num, NULL, 1, frame_size);\n *\n * crossfade: (ch_num1 == ch_num2 || ch_num1 == 1 || ch_num2 == 1)\n *  crossfade_process(st, inbuf1, ch_num1, inbuf2, ch_num2, outbuf, frame_size);\n */\nbool crossfade_process(CrossFadeId id, void *inbuf1, int32_t ch_num1, void *inbuf2, int32_t ch_num2, void *outbuf, int32_t frame_size);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/cvsd_codec.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/*******************************************************************************\n** namerCVSD CODEC header\n** descriptionCVSD encoder and CVSD decoder header\n** versionV1.0\n** author: xuml\n** modify2015.8.21.\n*******************************************************************************/\n\n#ifndef _CVSD_CODEC_H_\n#define _CVSD_CODEC_H_\n\n\n//Q fixed\n#define CVSD_Q 10\n\nstruct CvsdEncSt\n{\n\tunsigned short CvsdEncJudgeAlpha;\n\tint   CvsdEncLastData;\n\tint   CvsdEncDelta;\n\tint CvsdEncFirstFrameFlag;\n\tint FilterState0[3];\n\tint FilterState1[3];\n\tint FilterState2[3];\n};\n//decoder\nstruct CvsdDecSt\n{\n\tunsigned short CvsdDecJudgeAlpha;\n\tint   CvsdDecLastData;\n\tint   CvsdDecDelta;\n\tint FilterState0[3];\n\tint FilterState1[3];\n\tint FilterState2[3];\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n//encoder\nvoid CvsdEncInit(struct CvsdEncSt *CvsdEnc);\nint CvsdEncode(struct CvsdEncSt *CvsdEnc, short *pInPutData, short *pOutPutdata, int iEncSize);\n\n//decoder\nvoid CvsdDecInit(struct CvsdDecSt *CvsdDec);\nint CvsdDecode(struct CvsdDecSt *CvsdDec, short *pInPutData, short *pOutPutdata, int iDecSize);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n\n\n\n\n\n\n\n\n\n\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/dual_mic_denoise.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __DUAL_MIC_DENOISE_H__\n#define __DUAL_MIC_DENOISE_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define DUAL_MIC_DENOISE_GET_CALIBRATION_COEF_LEN        (0)\n#define DUAL_MIC_DENOISE_GET_CALIBRATION_COEF            (1)\n#define DUAL_MIC_DENOISE_SET_CALIBRATION_COEF            (2)\n\ntypedef struct {\n    int   bypass;\n    float alpha_h;\n    float alpha_slow;\n    float alpha_fast;\n    float thegma;\n    float thre_corr;\n    float thre_filter_diff;\n    float cal_left_gain;\n    float cal_right_gain;\n    int   delay_mono_sample;\n    int   wnr_enable;\n} DUAL_MIC_DENOISE_CFG_T;\n\n/**\n * @brief      Initialization\n *\n * @param      alloc_ext  The allocate extent RAM\n * @param      cfg        The configuration set parameter\n */\nvoid dual_mic_denoise_init(int32_t sample_rate, int32_t frame_size, const DUAL_MIC_DENOISE_CFG_T *cfg, void* (* alloc_ext)(int));\n\n/**\n * @brief      Run\n *\n * @param      in    input sample buffer\n *                   sample rate: 16k;\n *                   sample bit: 16; \n *                   channel num: 2; \n *                   LRLRLR......: Left: main mic, Right: assist mic\n * @param      out   output sample buffer\n *                   sample rate: 16k;\n *                   sample bit: 16; \n *                   channel num: 1;\n * @param[in]  len   The length is sample number\n */\nvoid dual_mic_denoise_run(short *in, short len, short *out);\n\n/**\n * @brief     Calibrate left and right gain\n *\n * @param      in    Same as dual_mic_denoise_run definition\n * @param[in]  len   Same as dual_mic_denoise_run definition\n * @param[out] cfg   Return calibrate configure parameter\n */\nvoid dual_mic_denoise_Cal_Gain(short *in, short len, DUAL_MIC_DENOISE_CFG_T *cfg);\n\n/**\n * @brief      Oppose initialization \n */\nvoid dual_mic_denoise_deinit(void);\n\nint dual_mic_denoise_ctl(int ctl, void *ptr);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/echo_canceller.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef ECHO_CANCELLER_H\n#define ECHO_CANCELLER_H\n\n#include \n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct\n{\n    int32_t bypass;\n    int32_t hpf_enabled;\n    int32_t af_enabled;\n    int32_t nlp_enabled;\n    int32_t clip_enabled;\n    int32_t stsupp_enabled;\n    int32_t ns_enabled;\n    int32_t cng_enabled;\n    // af config\n    int32_t blocks;\n    int32_t delay;\n    // nlp config\n    float   min_ovrd;\n    float   target_supp;\n    // ns config\n    float   noise_supp;\n    // cng config\n    int32_t cng_type; // 0 - white noise, 1 - pink noise\n    float   cng_level;\n    // clip\n    float   clip_threshold;\n    int32_t banks;\n} Ec2FloatConfig;\n\nstruct Ec2FloatState_;\n\ntypedef struct Ec2FloatState_ Ec2FloatState;\n\nEc2FloatState *ec2float_create(int sample_rate, int frame_size, bool cp, const Ec2FloatConfig *cfg);\n\nint32_t ec2float_destroy(Ec2FloatState *st);\n\nint32_t ec2float_set_config(Ec2FloatState *st, const Ec2FloatConfig *cfg, bool cp);\n\nint32_t ec2float_stereo(Ec2FloatState *st, int16_t *pcm_in, int16_t *pcm_ref1, int16_t *pcm_ref2, int32_t pcm_len, int16_t *pcm_out);\n\nint32_t ec2float_process(Ec2FloatState *st, int16_t *pcm_in, int16_t *pcm_ref, int32_t pcm_len, int16_t *pcm_out);\n\nint32_t ec2float_set_external_vad(Ec2FloatState *st, bool vad);\n\nfloat ec2float_get_required_mips(Ec2FloatState *st);\n\nfloat *ec2float_get_fir_filter_coeffs(Ec2FloatState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/ext_fft_f32.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"arm_math.h\"\n\n#ifndef VQE_SIMULATE\n#include \"hal_trace.h\"\n#else\n#define ASSERT(cond, str, ...)      { if (!(cond)) { fprintf(stderr, str, ##__VA_ARGS__); while(1); } }\n#define TRACE(str, ...)             do { fprintf(stdout, str, ##__VA_ARGS__); fprintf(stdout, \"\\n\"); } while (0)\n#endif\n\n// Enable this MACRO, Get same data with speex fft\n// Some case can disable this MACRO to reduce MIPS\n// #define _FFT_PRECISION\n\nstruct ext_f32_config {\n   float *in;\n   float *out;\n   arm_rfft_fast_instance_f32 fft;\n   int32_t N;\n   int32_t mode;\n};\n\nstatic void *ext_f32_fft_init(int32_t size, int32_t mode, void *ext_malloc(int))\n{\n    arm_status status;\n    struct ext_f32_config *st = ext_malloc(1 * sizeof(struct ext_f32_config));\n    st->mode = mode;\n\n    st->in = ext_malloc(size * sizeof(float));\n\n    if (st->mode)\n    {\n        st->out = ext_malloc(size * sizeof(float));\n    }\n    else\n    {\n        st->out = NULL;\n    }\n\n    status = arm_rfft_fast_init_f32(&(st->fft), size);\n    ASSERT(status == ARM_MATH_SUCCESS, \"FFTWRAP: arm cmsis f32 fft init error %d\", status);\n    st->N = size;\n\n    return st;\n}\n\nstatic void ext_f32_fft_destroy(void *table, void ext_free(void *))\n{\n    struct ext_f32_config *st = (struct ext_f32_config *)table;\n\n    ext_free(st->in);\n\n    if (st->mode) {\n        ext_free(st->out);\n    }\n\n    ext_free(st);\n}\n\nstatic POSSIBLY_UNUSED void ext_f32_fft(void *table, float *in, float *out)\n{\n    struct ext_f32_config *st = (struct ext_f32_config *)table;\n    const int32_t N = st->N;\n    float *iptr = st->in;\n    float *optr = NULL;\n\n    if (st->mode)\n    { \n        optr = st->out;\n    }\n    else\n    {\n        optr = out;\n    }\n\n    /* We need to make a copy as fft modify input data */\n    for (int32_t i = 0; i < N; i++)\n      iptr[i] = in[i];\n\n    arm_rfft_fast_f32(&(st->fft), iptr, optr, 0);\n\n    if (st->mode)\n    {    \n        out[0] = optr[0];\n        for (int32_t i = 1; i < N - 1; i++) {\n            out[i] = optr[i + 1];\n        }\n        out[N - 1] = optr[1];\n    }\n\n#if defined(_FFT_PRECISION)\n    for (int32_t i = 0; i < N; i++)\n        out[i] = out[i] / N;\n#endif\n}\n\nstatic POSSIBLY_UNUSED void ext_f32_ifft(void *table, float *in, float *out)\n{\n    struct ext_f32_config *st = (struct ext_f32_config *)table;\n    const int32_t N = st->N;\n    float *iptr = st->in;\n\n#if defined(_FFT_PRECISION)\n    for (int32_t i = 0; i < N; i++) {\n        in[i] = in[i] * N;\n    }\n#endif\n\n    if (st->mode)\n    {   \n        iptr[0] = in[0];\n        iptr[1] = in[N - 1];\n        for (int32_t i = 1; i < N - 1; i++) {\n            iptr[i + 1] = in[i];\n        }\n    }\n    else\n    {\n        iptr = in;\n    }\n\n    arm_rfft_fast_f32(&(st->fft), iptr, out, 1);\n}\n"
  },
  {
    "path": "services/multimedia/speech/inc/ext_heap.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"string.h\"\n\n#ifndef VQE_SIMULATE\n#include \"hal_trace.h\"\n#else\n#define ASSERT(cond, str, ...)      { if (!(cond)) { fprintf(stderr, str, ##__VA_ARGS__); while(1); } }\n#define TRACE(num, str, ...)        do { fprintf(stdout, str, ##__VA_ARGS__); fprintf(stdout, \"\\n\"); } while (0)\n#endif\n\n#ifndef HEAP_BUFF_SIZE\n#define HEAP_BUFF_SIZE       (1024 * 12)\n#endif\n\nstatic uint8_t heap_buff[HEAP_BUFF_SIZE];\nstatic uint32_t heap_buff_size_used;\n\nstatic int32_t ext_heap_init(void)\n{\n    TRACE(2, \"[%s] Heap size = %d\", __func__, HEAP_BUFF_SIZE);\n\n    heap_buff_size_used = 0;\n    memset((uint8_t *)heap_buff, 0, HEAP_BUFF_SIZE);\n    return 0;\n}\n\nstatic POSSIBLY_UNUSED int32_t ext_heap_deinit(void)\n{\n    TRACE(4,\"[%s] heap = %d, used = %d, free = %d\", __func__, HEAP_BUFF_SIZE, heap_buff_size_used, HEAP_BUFF_SIZE - heap_buff_size_used);\n\n    return 0;\n}\n\nstatic POSSIBLY_UNUSED uint32_t ext_heap_get_used_buff_size()\n{\n    return heap_buff_size_used;\n}\n\nstatic uint32_t ext_heap_get_free_buff_size()\n{\n    return HEAP_BUFF_SIZE - heap_buff_size_used;\n}\n\nstatic void *ext_get_buff(uint32_t size)\n{\n    uint32_t buff_size_free;\n    uint8_t *buf_ptr = &heap_buff[heap_buff_size_used];\n\n    buff_size_free = ext_heap_get_free_buff_size();\n\n    if (size % 4){\n        size = size + (4 - size % 4);\n    }\n\n    TRACE(3,\"[%s] Free: %d; Alloc: %d\", __func__, buff_size_free, size);\n\n    ASSERT(size <= buff_size_free, \"[%s] size = %d > free size = %d\", __func__, size, buff_size_free);\n\n    heap_buff_size_used += size;\n    // TRACE(\"Allocate %d, now used %d left %d\", size, heap_buff_size_used, ext_heap_get_free_buff_size());\n\n    return (void *)buf_ptr;\n}\n\nstatic void *ext_alloc(int size)\n{\n    void *mem_ptr = ext_get_buff(size);\n\n    memset(mem_ptr, 0, size);\n\n    return mem_ptr;\n}\n\nstatic POSSIBLY_UNUSED void *ext_malloc(int size)\n{\n    return ext_alloc(size);\n}\n\nstatic POSSIBLY_UNUSED void *ext_calloc(int nitems, int size)\n{\n    return ext_alloc(nitems * size);\n}\n\nstatic POSSIBLY_UNUSED void ext_free(void *mem_ptr)\n{\n    ;\n}\n"
  },
  {
    "path": "services/multimedia/speech/inc/far_field_speech_enhancement.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __FAR_FIELD_SPEECH_ENHANCEMENT_H__\n#define __FAR_FIELD_SPEECH_ENHANCEMENT_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid far_field_speech_enhancement_init(void);\nvoid far_field_speech_enhancement_start(void);\nvoid far_field_speech_enhancement_process(short *in);\nvoid far_field_speech_enhancement_deinit(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/fftfilt.h",
    "content": "#ifndef FFTFILT_H\n#define FFTFILT_H\n\n#include \n\ntypedef struct\n{\n    float *filter;\n    int filter_length;\n    int nfft;\n} FftFiltConfig;\n\nstruct FftFiltState_;\n\ntypedef struct FftFiltState_ FftFiltState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nFftFiltState *fftfilt_init(int sample_rate, int frame_size, const FftFiltConfig *config);\n\nvoid fftfilt_destroy(FftFiltState *st);\n\nvoid fftfilt_process_float(FftFiltState *st, float *buf, int frame_size);\n\nvoid fftfilt_process(FftFiltState *st, int16_t *buf, int frame_size);\n\nvoid fftfilt_process2_float(FftFiltState *st, float *buf, int frame_size, int stride);\n\nvoid fftfilt_process2(FftFiltState *st, int16_t *buf, int frame_size, int stride);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/frame_resize.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef FRAME_RESIZE_H\n#define FRAME_RESIZE_H\n\n#include \"stdint.h\"\n\nstruct FrameResizeState_;\n\ntypedef struct FrameResizeState_ FrameResizeState;\n\ntypedef int32_t(*CAPTURE_HANDLER_T)(void *, void *, int32_t *);\n\ntypedef int32_t(*PLAYBACK_HANDLER_T)(void *, int32_t *);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nFrameResizeState *frame_resize_create(int codec_frame_size,\n                                    int codec_capture_channel, \n                                    int vqe_frame_size,\n                                    int capture_sample_size,\n                                    int playback_sample_size,\n                                    int aec_enable, \n                                    const CAPTURE_HANDLER_T capture_handler,\n                                    const PLAYBACK_HANDLER_T playback_handler);\n\nvoid frame_resize_destroy(FrameResizeState *st);\n\nvoid frame_resize_process_capture(FrameResizeState *st, void *pcm_buf, void *ref_buf, int32_t *pcm_len);\n\nvoid frame_resize_process_playback(FrameResizeState *st, void *pcm_buf, int32_t *pcm_len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/g726.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __G726_H\n#define __G726_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nunsigned long g726_Encode(unsigned char *speech,char *bitstream, uint32_t sampleCount, uint8_t isReset);\nunsigned long g726_Decode(char *bitstream,unsigned char *speech, uint32_t sampleCount, uint8_t isReset);\n\n#ifdef __cplusplus\t\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/g72x.h",
    "content": "/*\n * This source code is a product of Sun Microsystems, Inc. and is provided\n * for unrestricted use.  Users may copy or modify this source code without\n * charge.\n *\n * SUN SOURCE CODE IS PROVIDED AS IS WITH NO WARRANTIES OF ANY KIND INCLUDING\n * THE WARRANTIES OF DESIGN, MERCHANTIBILITY AND FITNESS FOR A PARTICULAR\n * PURPOSE, OR ARISING FROM A COURSE OF DEALING, USAGE OR TRADE PRACTICE.\n *\n * Sun source code is provided with no support and without any obligation on\n * the part of Sun Microsystems, Inc. to assist in its use, correction,\n * modification or enhancement.\n *\n * SUN MICROSYSTEMS, INC. SHALL HAVE NO LIABILITY WITH RESPECT TO THE\n * INFRINGEMENT OF COPYRIGHTS, TRADE SECRETS OR ANY PATENTS BY THIS SOFTWARE\n * OR ANY PART THEREOF.\n *\n * In no event will Sun Microsystems, Inc. be liable for any lost revenue\n * or profits or other special, indirect and consequential damages, even if\n * Sun has been advised of the possibility of such damages.\n *\n * Sun Microsystems, Inc.\n * 2550 Garcia Avenue\n * Mountain View, California  94043\n */\n\n/*\n * g72x.h\n *\n * Header file for CCITT conversion routines.\n *\n */\n\n#include \"math.h\"\n\n#ifndef _G72X_H\n#define\t_G72X_H\n\n#define\tAUDIO_ENCODING_ULAW\t(1)\t/* ISDN u-law */\n#define\tAUDIO_ENCODING_ALAW\t(2)\t/* ISDN A-law */\n#define\tAUDIO_ENCODING_LINEAR\t(3)\t/* PCM 2's-complement (0-center) */\n\n/*\n * The following is the definition of the state structure\n * used by the G.721/G.723 encoder and decoder to preserve their internal\n * state between successive calls.  The meanings of the majority\n * of the state structure fields are explained in detail in the\n * CCITT Recommendation G.721.  The field names are essentially indentical\n * to variable names in the bit level description of the coding algorithm\n * included in this Recommendation.\n */\ntypedef struct g726_state_s {\n\tlong yl;\t/* Locked or steady state step size multiplier. */\n\tint yu;\t\t/* Unlocked or non-steady state step size multiplier. */\n\tint dms;\t/* Short term energy estimate. */\n\tint dml;\t/* Long term energy estimate. */\n\tint ap;\t\t/* Linear weighting coefficient of 'yl' and 'yu'. */\n\n\tint a[2];\t/* Coefficients of pole portion of prediction filter. */\n\tint b[6];\t/* Coefficients of zero portion of prediction filter. */\n\tint pk[2];\t/* Signs of previous two samples of a partially\n\t\t\t\t * reconstructed signal. */\n\tshort dq[6];/* int here fails in newupdate on encode!\n\t\t\t\t * Previous 6 samples of the quantized difference\n\t\t\t\t * signal represented in an internal floating point\n\t\t\t\t * format.\n\t\t\t\t */\n\tint sr[2];\t/* Previous 2 samples of the quantized difference\n\t\t\t\t * signal represented in an internal floating point\n\t\t\t\t * format. */\n\tint td;\t\t/* delayed tone detect, new in 1988 version */\n} g726_state;\n\n/* External function definitions. */\n\nvoid g726_init_state( g726_state *);\n\nint g726_32_encoder(\n\t\tint sample,\n\t\tint in_coding,\n\t\t g726_state *state_ptr);\nint g726_32_decoder(\n\t\tint code,\n\t\tint out_coding,\n\t\t g726_state *state_ptr);\nint g726_16_encoder(\n        int sample,\n        int in_coding,\n         g726_state *state_ptr);\nint g726_16_decoder(\n        int code,\n        int out_coding,\n         g726_state *state_ptr);\nint g726_24_encoder(\n\t\tint sample,\n\t\tint in_coding,\n\t\t g726_state *state_ptr);\nint g726_24_decoder(\n\t\tint code,\n\t\tint out_coding,\n\t\t g726_state *state_ptr);\nint g726_40_encoder(\n\t\tint sample,\n\t\tint in_coding,\n\t\t g726_state *state_ptr);\nint g726_40_decoder(\n\t\tint code,\n\t\tint out_coding,\n\t\t g726_state *state_ptr);\n\n#endif /* !_G72X_H */\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/iir_resample.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef IIR_RESAMPLE_H\n#define IIR_RESAMPLE_H\n\n#include \n\nenum IIR_RESAMPLE_MODE\n{\n    IIR_RESAMPLE_MODE_1TO2 = 0,\n    IIR_RESAMPLE_MODE_1TO3,\n    IIR_RESAMPLE_MODE_1TO6,\n    IIR_RESAMPLE_MODE_2TO1,\n    IIR_RESAMPLE_MODE_3TO1,\n    IIR_RESAMPLE_MODE_6TO1,\n    IIR_RESAMPLE_MODE_NUM,\n};\n\nstruct IirResampleState_;\n\ntypedef struct IirResampleState_ IirResampleState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nIirResampleState *iir_resample_init(int frame_size, enum IIR_RESAMPLE_MODE mode);\n\nvoid iir_resample_destroy(IirResampleState *st);\n\nint iir_resample_needed_out_count(IirResampleState *st, int in_size);\n\n// frame_size is input buffer frame_size\nvoid iir_resample_process(IirResampleState *st, int16_t *in, int16_t *out, int in_size);\n\nenum IIR_RESAMPLE_MODE iir_resample_choose_mode(int sr_in, int sr_out);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/iirfilt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef IIRFILT_H\n#define IIRFILT_H\n\n#include \n\nenum IIR_BIQUARD_TYPE\n{\n    // pass through\n    IIR_BIQUARD_PASS = 0,\n    // raw filter\n    IIR_BIQUARD_RAW,\n    // low pass filter\n    IIR_BIQUARD_LPF,\n    // high pass filter\n    IIR_BIQUARD_HPF,\n    // band pass filter, constant skirt gain, peak gain = Q\n    IIR_BIQUARD_BPF0,\n    // band pass filter, const 0 dB peak gain\n    IIR_BIQUARD_BPF1,\n    // notch filter\n    IIR_BIQUARD_NOTCH,\n    // allpass filter\n    IIR_BIQUARD_APF,\n    // peakingEQ\n    IIR_BIQUARD_PEAKINGEQ,\n    // low shelf filter\n    IIR_BIQUARD_LOWSHELF,\n    // high shelf filter\n    IIR_BIQUARD_HIGHSHELF,\n    IIR_BIQUARD_QTY\n};\n\nstruct IirBiquardState\n{\n    float a1, a2, b0, b1, b2;\n    float s0, s1, s2;\n};\n\ntypedef struct IirBiquardState IirBiquardState;\n\nvoid iirfilt_design(IirBiquardState *st, int fs, int f0, float gain, float q, enum IIR_BIQUARD_TYPE type);\n\nvoid iirfilt_raw(IirBiquardState *st, float b0, float b1, float b2, float a1, float a2);\n\nvoid iirfilt_reset(IirBiquardState *st, int stages);\n\nvoid iirfilt_process(IirBiquardState *st, int stages, int16_t *buf, int frame_size);\n\nvoid iirfilt_process_int24(IirBiquardState *st, int stages, int32_t *buf, int frame_size);\n\nvoid iirfilt_process_float(IirBiquardState *st, int stages, float *buf, int frame_size);\n\n/* Deal with master gain in iir */\nvoid iirfilt_process2(IirBiquardState *st, int stages, float master_gain, int16_t *buf, int frame_size);\n\nvoid iirfilt_process2_int24(IirBiquardState *st, int stages, float master_gain, int32_t *buf, int frame_size);\n\nvoid iirfilt_process2_float(IirBiquardState *st, int stages, float master_gain, float *buf, int frame_size);\n\nvoid iirfilt_process3(IirBiquardState *st, int stages, float master_gain, int16_t *buf, int frame_size, int stride);\n\nvoid iirfilt_process3_int24(IirBiquardState *st, int stages, float master_gain, int32_t *buf, int frame_size, int stride);\n\nvoid iirfilt_process3_float(IirBiquardState *st, int stages, float master_gain, float *buf, int frame_size, int stride);\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/lc_mmse_ns.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __LC_MMSE_NS_H__\n#define __LC_MMSE_NS_H__\n\n#include \n\n#define LC_MMSE_NS_ENABLE_RES_ECHO\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    int32_t     bypass;\n    float       denoise_dB;\n} SpeechNs2Config;\n\nstruct SpeechNs2State_;\n\ntypedef struct SpeechNs2State_ SpeechNs2State;\n\nSpeechNs2State *speech_ns2_create(int32_t sample_rate, int32_t frame_size, const SpeechNs2Config *cfg);\n\nint32_t speech_ns2_destroy(SpeechNs2State *st);\n\nint32_t speech_ns2_set_config(SpeechNs2State *st, const SpeechNs2Config *cfg);\n\nint32_t speech_ns2_process(SpeechNs2State *st, int16_t *pcm_buf, int32_t pcm_len);\n\nint32_t speech_ns2_set_echo_state(SpeechNs2State *st, void *echo_state);\n\nint32_t speech_ns2_set_echo_suppress(SpeechNs2State *st, int32_t echo_suppress);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/lc_mmse_ns_float.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __LC_MMSE_NS_FLOAT_H__\n#define __LC_MMSE_NS_FLOAT_H__\n\n// #define LC_MMSE_NS_ENABLE_RES_ECHO\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    int32_t     bypass;\n    float       denoise_dB;\n    int32_t     banks;\n} SpeechNs2FloatConfig;\n\nstruct SpeechNs2FloatState_;\n\ntypedef struct SpeechNs2FloatState_ SpeechNs2FloatState;\n\nSpeechNs2FloatState *speech_ns2float_create(int32_t sample_rate, int32_t frame_size, bool cp, const SpeechNs2FloatConfig *cfg);\n\nint32_t speech_ns2float_destroy(SpeechNs2FloatState *st);\n\nint32_t speech_ns2float_set_config(SpeechNs2FloatState *st, const SpeechNs2FloatConfig *cfg, bool cp);\n\nint32_t speech_ns2float_process(SpeechNs2FloatState *st, int16_t *pcm_buf, int32_t pcm_len);\n\nint32_t speech_ns2float_set_echo_state(SpeechNs2FloatState *st, void *echo_state);\n\nint32_t speech_ns2float_set_echo_suppress(SpeechNs2FloatState *st, int32_t echo_suppress);\n\nvoid speech_ns2float_set_external_vad(SpeechNs2FloatState *st, bool vad);\n\nfloat speech_ns2float_get_required_mips(SpeechNs2FloatState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/leftright_denoise.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __LEFTRIGHT_DENOISE_H__\n#define __LEFTRIGHT_DENOISE_H__\n\n#include \n#include \"ae_macros.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    int32_t     bypass;\n    float       delay_taps;             // MIC L/R delay samples. 0: 适用于麦克距离为<2cm; 1: 适用于麦克距离为2cm左右; 2: 适用于麦克距离为4cm左右\n    int32_t     freq_smooth_enable;     // 1: 频域滤波打开; 0: 频域滤波关闭; 默认打开\n    int32_t     wnr_enable;             // wind noise reduction enable\n    int32_t     delay_enable;\n} LeftRightDenoiseConfig;\n\nstruct LeftRightDenoiseState_;\n\ntypedef struct LeftRightDenoiseState_ LeftRightDenoiseState;\n\n#ifndef LEFTRIGHT_DENOISE_IMPL\n#define LEFTRIGHT_DENOISE_IMPL float\n#endif\n\n#define leftright_denoise_create    CONSTRUCT_FUNC_NAME(leftright_denoise, LEFTRIGHT_DENOISE_IMPL, create)\n#define leftright_denoise_destroy    CONSTRUCT_FUNC_NAME(leftright_denoise, LEFTRIGHT_DENOISE_IMPL, destroy)\n#define leftright_denoise_set_config CONSTRUCT_FUNC_NAME(leftright_denoise, LEFTRIGHT_DENOISE_IMPL, set_config)\n#define leftright_denoise_process   CONSTRUCT_FUNC_NAME(leftright_denoise, LEFTRIGHT_DENOISE_IMPL, process)\n#define leftright_denoise_get_delay   CONSTRUCT_FUNC_NAME(leftright_denoise, LEFTRIGHT_DENOISE_IMPL, get_delay)\n\nLeftRightDenoiseState *leftright_denoise_create(int32_t sample_rate, int32_t frame_size, const LeftRightDenoiseConfig *cfg);\n\nint32_t leftright_denoise_destroy(LeftRightDenoiseState *st);\n\nint32_t leftright_denoise_set_config(LeftRightDenoiseState *st, const LeftRightDenoiseConfig *cfg);\n\nint32_t leftright_denoise_process(LeftRightDenoiseState *st, short *pcm_buf, int32_t pcm_len, short *out_buf);\n\nint32_t leftright_denoise_get_delay(LeftRightDenoiseState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/lpc_plc_api.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef LPC_PLC_API_H\n#define LPC_PLC_API_H\n\n#include \n\nstruct LpcPlcState_;\n\ntypedef struct LpcPlcState_ LpcPlcState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nLpcPlcState *lpc_plc_create(int32_t sample_rate);\n\nvoid lpc_plc_destroy(LpcPlcState *st);\n\nvoid lpc_plc_save(LpcPlcState *st, int16_t *buf);\n\nvoid lpc_plc_generate(LpcPlcState *st, int16_t *buf, int16_t *encbuf);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/main_classify.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_NOISE_CLASSIFY_H__\n#define __SPEECH_NOISE_CLASSIFY_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nstruct ClassifyState_;\ntypedef struct ClassifyState_ ClassifyState;\n\nClassifyState *classify_create(int sample_rate, int frame_size);\nint classify_destroy(ClassifyState *state);\nint classify_process(ClassifyState *state, short *inF, int last_classify_res);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/med_aec3_comm.h",
    "content": "\n#ifndef _MED_AEC3_COMM_H_\n#define _MED_AEC3_COMM_H_\n\n/*****************************************************************************\n  1 ͷļ\n*****************************************************************************/\n#include \"codec_typedefine.h\"\n#include \"med_fft.h\"\n#include \"codec_com_codec.h\"\n#include \"med_aec3_main.h\"\n\n#ifdef __cplusplus\n#if __cplusplus\nextern \"C\" {\n#endif\n#endif\n\n/*****************************************************************************\n  2 궨\n*****************************************************************************/\n/* FFT IFFTص */\ntypedef VOS_VOID (*MED_AEC_FFT_CALLBACK)(VOS_INT16 *, VOS_INT16 *);\n\n#ifdef AEC_ONLY_SUPPORT_8k\n#ifdef SPEECH_STREAM_UNIT_128\n#define MED_AEC_FFT_LEN_NB              (256)\n#else\n#define MED_AEC_FFT_LEN_NB              (240)\n#endif\n#define MED_AEC_MAX_FFT_LEN             (MED_AEC_FFT_LEN_NB)                    /* FFT */\n#else\n#ifdef SPEECH_STREAM_UNIT_128\n#define MED_AEC_FFT_LEN_NB              (256)\n#define MED_AEC_FFT_LEN_WB              (512)\n#else\n#define MED_AEC_FFT_LEN_NB              (240)\n#define MED_AEC_FFT_LEN_WB              (480)\n#endif\n#define MED_AEC_MAX_FFT_LEN             (MED_AEC_FFT_LEN_WB)                    /* FFT */\n#endif\n\n#define MED_AEC_HF_AF_M                 (6)\n\n/* ʱȫ飬AECģʹ */\n//extern VOS_INT16                        g_ashwMedAecTmp1Len640[MED_AEC_MAX_FFT_LEN];\n//extern VOS_INT16                        g_ashwMedAecTmp2Len640[MED_AEC_MAX_FFT_LEN];\n//extern VOS_INT32                        g_aswMedAecTmp1Len320[CODEC_FRAME_LENGTH_WB];\n//extern VOS_INT32                        g_aswMedAecTmp1Len640[MED_AEC_MAX_FFT_LEN];\n\n/* AEC 궨*/\n//#define MED_AEC_GetshwVecTmp640Ptr1()   (&g_ashwMedAecTmp1Len640[0])            /* ʱȫָ 640 INT16 */\n//#define MED_AEC_GetshwVecTmp640Ptr2()   (&g_ashwMedAecTmp2Len640[0])            /* ʱȫָ 640 INT16 */\n//#define MED_AEC_GetswVecTmp320Ptr1()    (&g_aswMedAecTmp1Len320[0])             /* ʱȫָ 320 INT32 */\n//#define MED_AEC_GetswVecTmp640Ptr1()    (&g_aswMedAecTmp1Len640[0])             /* ʱȫָ 640 INT32 */\n\n#define MED_AEC_OFFSET_THD              (60)                                    /* ӳٲֵ */\n#define MED_AEC_MAX_OFFSET              (960)                                   /* 󲹳ȣλ Q0*/\n#define MED_AEC_MAX_TAIL_LEN            (960)                                   /* β˳ȣλms֧60msβӳ Q0*/\n/*****************************************************************************\n  3 öٶ\n*****************************************************************************/\n/* AF FFT */\nenum MED_AEC_AF_FFT_LEN_ENUM\n{\n#ifdef SPEECH_STREAM_UNIT_128\n    MED_AEC_AF_FFT_LEN_NB = 256,                                                /* խFFT */\n    MED_AEC_AF_FFT_LEN_WB = 512,                                                /* FFT */\n#else\n    MED_AEC_AF_FFT_LEN_NB = 240,                                                /* խFFT */\n    MED_AEC_AF_FFT_LEN_WB = 480,                                                /* FFT */\n#endif\n    MED_AEC_AF_FFT_LEN_BUTT\n};\ntypedef VOS_INT16  MED_AEC_AF_FFT_LEN_ENUM_INT16;\n\n/* ö */\nenum CODEC_SWITCH_ENUM\n{\n\tCODEC_SWITCH_OFF = 0,\n\tCODEC_SWITCH_ON,\n\tCODEC_SWITCH_BUTT\n};\ntypedef VOS_UINT16 CODEC_SWITCH_ENUM_UINT16;\n\n/*****************************************************************************\n  4 ȫֱ\n*****************************************************************************/\n\n/*****************************************************************************\n  5 STRUCT\n*****************************************************************************/\n\n/*****************************************************************************\n  6 UNION\n*****************************************************************************/\n\n/*****************************************************************************\n  7 OTHERS\n*****************************************************************************/\n\n/*****************************************************************************\n  8 \n*****************************************************************************/\n#ifdef DEBUG_AEC\nstatic VOS_VOID fprint_vec_int32(FILE *fd, VOS_INT32 *buf, VOS_INT32 len)\n{\n    for (VOS_INT32 i = 0; i < len - 1; i++) {\n        fprintf(fd, \"%d \", buf[i]);\n    }\n    fprintf(fd, \"%d\\n\", buf[len - 1]);\n}\n#endif\n\n#ifdef __cplusplus\n#if __cplusplus\n}\n#endif\n#endif\n\n#endif /* end of med_aec_main.h*/\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/med_aec3_main.h",
    "content": "\n\n/*****************************************************************************\n  1 ͷļ\n*****************************************************************************/\n#include \"v_typdef.h\"\n\n#ifndef _MED_AEC3_MAIN_H_\n#define _MED_AEC3_MAIN_H_\n\n\n#ifdef __cplusplus\n#if __cplusplus\nextern \"C\" {\n#endif\n#endif\n\n/*****************************************************************************\n  2 궨\n*****************************************************************************/\n\n/*****************************************************************************\n  3 öٶ\n*****************************************************************************/\n\n/*****************************************************************************\n  4 ȫֱ\n*****************************************************************************/\n\n/*****************************************************************************\n  5 STRUCT\n*****************************************************************************/\ntypedef VOS_VOID (*NS_HANDLER_T)(VOS_VOID *stNs, VOS_INT16 *shwBuf, VOS_INT32 swFrameLength);\n\n/* AECʼӿ */\ntypedef struct\n{\n    VOS_BOOL                            enEAecEnable;                           /* AEC: ǿAECʹܿ */\n    VOS_BOOL                            enHpfEnable;                            /* HPF: ͨ˲ */\n    VOS_BOOL                            enAfEnable;                             /* AF : Ӧ˲ */\n    VOS_BOOL                            enNsEnable;                             /* NS : ƿ */\n\tVOS_INT16                           shwDelayLength;                         /* DELAY: ̶ʱ */\n} MED_AEC3_NV_STRU;\n\n/*****************************************************************************\n  6 UNION\n*****************************************************************************/\n\n/*****************************************************************************\n  7 OTHERS\n*****************************************************************************/\n\n/*****************************************************************************\n  8 \n*****************************************************************************/\nextern VOS_UINT32  MED_AEC3_Main(\n\t                   VOS_VOID               *pAecInstance,\n                       VOS_INT16              *pshwMicIn,\n\t\t\t\t\t   VOS_INT16              *pshwSpkIn,\n                       VOS_INT16              *pshwLineOut);\nextern VOS_VOID* MED_AEC3_Create(void);\nextern VOS_UINT32  MED_AEC3_Destroy(VOS_VOID  **ppAecObj);\nextern VOS_UINT32 MED_AEC3_SetPara (\n                       VOS_VOID                        *pAecInstance,\n\t\t\t\t\t   MED_AEC3_NV_STRU                 *pstNv,\n                       VOS_INT32                       enSampleRate);\nextern VOS_UINT32  MED_AEC3_SetExtenalNsHandle(\n                       VOS_VOID               *pAecInstance,\n                       VOS_VOID               *pstNs,\n                       NS_HANDLER_T           swNsHandler);\n#ifdef __cplusplus\n#if __cplusplus\n}\n#endif\n#endif\n\n#endif /* end of med_aec_main.h*/\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/med_aec3_main_internal.h",
    "content": "\n\n/*****************************************************************************\n  1 ͷļ\n*****************************************************************************/\n#include \"codec_typedefine.h\"\n#include \"med_aec_comm.h\"\n#include \"med_aec3_main.h\"\n#include \"med_aec_hf_af.h\"\n#include \"med_aec_hf_nlp.h\"\n#include \"med_aec_hpf.h\"\n#include \"med_emph_filter.h\"\n#include \"med_aec_delay.h\"\n\n#ifndef _MED_AEC3_MAIN_INTERNAL_H_\n#define _MED_AEC3_MAIN_INTERNAL_H_\n\n\n#ifdef __cplusplus\n#if __cplusplus\nextern \"C\" {\n#endif\n#endif\n\n/* NS ڲṹ */\ntypedef struct\n{\n    VOS_VOID                           *stNs;\n    NS_HANDLER_T                        swHandler;\n} MED_AEC3_HF_NS_STRU;\n\n/* AECڲ״̬ṹ */\ntypedef struct\n{\n    MED_OBJ_HEADER\n    VOS_BOOL                            shwIsEAecEnable;\n    VOS_BOOL                            shwIsHpfEnable;\n    VOS_BOOL                            shwIsPreEmpEnable;\n    VOS_BOOL                            shwIsAfEnable;\n    VOS_BOOL                            shwIsNsEnable;\n\tVOS_INT16                           shwFrameLength;\n    VOS_INT16                           shwDelayLength;\n    MED_AEC_DELAY_STRU                  stEAecDelay;\n    MED_AEC_HF_AF_STRU                  stEAecHfAf;\n    MED_AEC_HPF_STRU                    stEAecMicHpf;\n    MED_AEC_HPF_STRU                    stEAecSpkHpf;\n    MED_AEC3_HF_NS_STRU                  stEAecNs;\n#ifdef MED_AEC_PREEMPH_ENABLE\n    MED_PREEMPH_STRU                    stPreEmpMc;\n    MED_PREEMPH_STRU                    stPreEmpFar;\n    MED_DEEMPH_STRU                     stDeEmpMc;\n#endif\n} MED_AEC3_OBJ_STRU;\n\n\n\n/*****************************************************************************\n  2 궨\n*****************************************************************************/\n\n/*****************************************************************************\n  3 öٶ\n*****************************************************************************/\n\n/*****************************************************************************\n  4 ȫֱ\n*****************************************************************************/\n\n/*****************************************************************************\n  5 STRUCT\n*****************************************************************************/\n\n\n/*****************************************************************************\n  6 UNION\n*****************************************************************************/\n\n/*****************************************************************************\n  7 OTHERS\n*****************************************************************************/\n\n/*****************************************************************************\n  8 \n*****************************************************************************/\n\n#ifdef __cplusplus\n#if __cplusplus\n}\n#endif\n#endif\n\n#endif /* end of med_aec_main.h*/\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/ns3.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef NS3_H\n#define NS3_H\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef enum\n{\n    NS3_SUPPRESSION_LOW = 0,\n    NS3_SUPPRESSION_MID = 1,\n    NS3_SUPPRESSION_HIGH = 2,\n    NS3_SUPPRESSION_VERY_HIGH = 3\n} NS3_SUPPRESSION_MODE;\n\ntypedef struct\n{\n    int32_t     bypass;\n    NS3_SUPPRESSION_MODE mode;\n} Ns3Config;\n\nstruct Ns3State_;\n\ntypedef struct Ns3State_ Ns3State;\n\n#define CONSTRUCT_FUNC_NAME_A(p, c, m)          p ## _ ## c ## _ ## m\n#define CONSTRUCT_FUNC_NAME(p, c, m)            CONSTRUCT_FUNC_NAME_A(p, c, m)\n\n#ifndef NS3_IMPL\n#define NS3_IMPL fixed\n#endif\n\n#define ns3_create CONSTRUCT_FUNC_NAME(ns3, NS3_IMPL, init)\n#define ns3_destroy CONSTRUCT_FUNC_NAME(ns3, NS3_IMPL, destroy)\n#define ns3_set_config CONSTRUCT_FUNC_NAME(ns3, NS3_IMPL, set_config)\n#define ns3_process CONSTRUCT_FUNC_NAME(ns3, NS3_IMPL, process)\n#define ns3_get_required_mips CONSTRUCT_FUNC_NAME(ns3, NS3_IMPL, get_required_mips)\n\nNs3State *ns3_create(int32_t sample_rate, int32_t frame_size, const Ns3Config *cfg);\n\nint32_t ns3_destroy(Ns3State *st);\n\nint32_t ns3_set_config(Ns3State *st, const Ns3Config *cfg);\n\nint32_t ns3_process(Ns3State *st, int16_t *pcm_buf, int32_t pcm_len);\n\nfloat ns3_get_required_mips(Ns3State *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/plc_16000.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/********************************************************\nSBC Example PLC ANSI-C Source Code\nFile: sbcplc.h\n*****************************************************************************/\n#ifndef SBCPLC_H\n#define SBCPLC_H\n\n#define FS 120 /* Frame Size */\n#define N 256 /* 16ms - Window Length for pattern matching */\n#define M 64 /* 4ms - Template for matching */\n#define LHIST (N+FS-1) /* Length of history buffer required */\n#define SBCRT 60 /* SBC Reconvergence Time (samples) */\n#define OLAL 60 /* OverLap-Add Length (samples) */\n\n//SBCRT + OLAL must be <=FS\n\n/* PLC State Information */\nstruct PLC_State\n{\n\tshort hist[LHIST + OLAL + FS + SBCRT + OLAL];\n\tshort bestlag;\n\tint nbf;\n};\nextern unsigned char indices0[57];\n/* Prototypes */\nvoid InitPLC(struct PLC_State *plc_state);\nvoid PLC_bad_frame(struct PLC_State *plc_state, short *ZIRbuf, short *out);\nvoid PLC_good_frame(struct PLC_State *plc_state, short *in, short *out);\n#endif /* SBCPLC_H */\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/plc_8000.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/////////////////////////////////////////////////////////////////////////\n//Packets Loss Concealment                                              /\n/////////////////////////////////////////////////////////////////////////\n#ifndef _PLC_8000_H_\n#define _PLC_8000_H_\n\n\ntypedef struct PlcSt_8000_ PlcSt_8000;\n\nPlcSt_8000 *speech_plc_8000_init(void* (* speex_alloc_ext)(int));\nint speech_plc_8000(PlcSt_8000 *lc, short *InBuf, int len);\n\n#endif\n\n\n\n\n\n\n\n\n\n\n\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/recognition.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __RECOGNITION_H__\n#define __RECOGNITION_H__\n\n#include \"vad.h\"\n#include \"mfcc.h\"\n\n#define VOICE_RECOGNITION_NN (120)\n#define VOICE_RECOGNITION_OVLP (60)\n#define VOICE_RECOGNITION_FFTFRAME (240)\n#define VOICE_RECOGNITION_MODE_NUM_MAX (8)\n\ntypedef struct{\n    vad_t vad;    \n    mfcc_t mfcc;\n    mfcc_vct_t mfcc_vct;\n    int tag;   \n    short in_tmp[VOICE_RECOGNITION_NN * 2 + VOICE_RECOGNITION_OVLP];\n    int dis_thr;\n    mfcc_vct_t *mode[VOICE_RECOGNITION_MODE_NUM_MAX];\n    unsigned char mode_num;\n} mfcc_extract_t;\n\nint speech_recognition_process(mfcc_extract_t *mfcc_exec, short *buf, unsigned int len);\n\n#endif // __RECOGNITION_H__\n\n"
  },
  {
    "path": "services/multimedia/speech/inc/sensormic_denoise.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SENSORMIC_DENOISE_H__\n#define __SENSORMIC_DENOISE_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    int32_t     bypass;\n\tint32_t     blend_en;\n    // float       left_gain;              // MIC Left增益补偿\n    // float       right_gain;             // MIC Right增益补偿\n    int32_t     delay_tapsM;            // MIC L/R delay samples. 0: 适用于麦克距离为<2cm; 1: 适用于麦克距离为2cm左右; 2: 适用于麦克距离为4cm左右\n    int32_t     delay_tapsS;\n    // int32_t     delay_tapsC;\n    // float       coefH[2][5];            // {{a0,a1,a2,a3,a4},{b0,b1,b2,b3,b4}}\n    // float       coefL[2][5];            // {{a0,a1,a2,a3,a4},{b0,b1,b2,b3,b4}}\n    int32_t     crossover_freq;\n    float       *ff_fb_coeff;\n    int         ff_fb_coeff_len;\n} SensorMicDenoiseConfig;\n\nstruct SensorMicDenoiseState_;\n\ntypedef struct SensorMicDenoiseState_ SensorMicDenoiseState;\n\n//SensorMicDenoiseState *sensormic_denoise_create(int32_t sample_rate, int32_t frame_size, const SensorMicDenoiseConfig *cfg);\nSensorMicDenoiseState *sensormic_denoise_create(int32_t sample_rate, int32_t frame_size, int32_t fft_size,int32_t ps_size,const SensorMicDenoiseConfig *cfg);\n\nint32_t sensormic_denoise_trace(SensorMicDenoiseState *st);\n\nint32_t sensormic_denoise_destroy(SensorMicDenoiseState *st);\n\nint32_t sensormic_denoise_set_config(SensorMicDenoiseState *st, const SensorMicDenoiseConfig *cfg);\n\nint32_t sensormic_denoise_process(SensorMicDenoiseState *st, short *pcm_buf, int32_t pcm_len, short *out_buf);\n\nbool sensormic_denoise_get_vad(SensorMicDenoiseState *st);\n\nvoid sensormic_denoise_set_anc_status(SensorMicDenoiseState *st, bool anc_enable);\n\nfloat sensormic_denoise_get_required_mips(SensorMicDenoiseState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/single_mic_NNDenoise.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SINGLE_MIC_NN_DENOISE_H__\n#define __SINGLE_MIC_NN_DENOISE_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\nstruct NNDenoiseState_;\n\ntypedef struct NNDenoiseState_ NNDenoiseState;\n\n\n\nNNDenoiseState * single_mic_NN_denoise_create(int32_t sr, int32_t frame_size,int32_t post_coef);\nvoid single_mic_NN_denoise_destroy(NNDenoiseState * st);\nvoid single_mic_NN_denoise_run(NNDenoiseState * st,int16_t* input_buf);\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n// NNDenoiseState *speech_ns2_create(int32_t sample_rate, int32_t frame_size, const SpeechNs2Config *cfg);\n\n// int32_t speech_ns2_destroy(NNDenoiseState *st);\n\n// int32_t speech_ns2_set_config(SpeechNs2State *st, const SpeechNs2Config *cfg);\n\n// int32_t speech_ns2_process(SpeechNs2State *st, int16_t *pcm_buf, int32_t pcm_len);\n\n// int32_t speech_ns2_set_echo_state(SpeechNs2State *st, void *echo_state);\n\n// int32_t speech_ns2_set_echo_suppress(SpeechNs2State *st, int32_t echo_suppress);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/spectrum.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef SPECTRUM_H\n#define SPECTRUM_H\n\n#include \n\n#define MAX_FREQ_NUM (10)\n\ntypedef struct\n{\n    int freq_num;\n    int freq_list[MAX_FREQ_NUM];\n} SpectrumConfig;\n\nstruct SpectrumState_;\n\ntypedef struct SpectrumState_ SpectrumState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nSpectrumState *spectrum_init(int sample_rate, int frame_size, const SpectrumConfig *config);\n\nvoid spectrum_destroy(SpectrumState *st);\n\n/* Update input buffer, must be called every block */\nvoid spectrum_analysis(SpectrumState *st, const float *x);\n\n/* Calculate spectrum, should be called when needed */\nvoid spectrum_process(SpectrumState *st, float *spectrum, int spectrum_num);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/spectrum_fix.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef SPECTRUM_FIX_H\n#define SPECTRUM_FIX_H\n\n#include \n\n#define MAX_FREQ_NUM (10)\n\ntypedef struct\n{\n    int freq_num;\n    int freq_list[MAX_FREQ_NUM];\n} SpectrumFixConfig;\n\nstruct SpectrumFixState_;\n\ntypedef struct SpectrumFixState_ SpectrumFixState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nSpectrumFixState *spectrum_fix_init(int sample_rate, int frame_size, const SpectrumFixConfig *config);\n\nvoid spectrum_fix_destroy(SpectrumFixState *st);\n\n/* Update input buffer, must be called every block */\nvoid spectrum_fix_analysis(SpectrumFixState *st, const int16_t *x);\n\n/* Calculate spectrum, should be called when needed */\nvoid spectrum_fix_process(SpectrumFixState *st, int16_t *spectrum, int spectrum_num);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_2mic_ns2_denoise.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_2MIC_NS2_DENOISE_H__\n#define __SPEECH_2MIC_NS2_DENOISE_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    int32_t     bypass;\n    float       delay_taps;             // MIC L/R delay samples. 0: 适用于麦克距离为<2cm; 1: 适用于麦克距离为2cm左右; 2: 适用于麦克距离为4cm左右\n    int32_t     freq_smooth_enable;     // 1: 频域滤波打开; 0: 频域滤波关闭; 默认打开\n    int32_t     wnr_enable;             // wind noise reduction enable\n} Speech2MicNs2Config;\n\nstruct Speech2MicNs2State_;\n\ntypedef struct Speech2MicNs2State_ Speech2MicNs2State;\n\n#define CONSTRUCT_FUNC_NAME_A(p, c, m)          p ## _ ## c ## _ ## m\n#define CONSTRUCT_FUNC_NAME(p, c, m)            CONSTRUCT_FUNC_NAME_A(p, c, m)\n\n#ifndef SPEECH_2MIC_NS2_DENOISE_IMPL\n#define SPEECH_2MIC_NS2_DENOISE_IMPL float\n#endif\n\n#define speech_2mic_ns2_create    CONSTRUCT_FUNC_NAME(speech_2mic_ns2, SPEECH_2MIC_NS2_DENOISE_IMPL, create)\n#define speech_2mic_ns2_destroy    CONSTRUCT_FUNC_NAME(speech_2mic_ns2, SPEECH_2MIC_NS2_DENOISE_IMPL, destroy)\n#define speech_2mic_ns2_set_config CONSTRUCT_FUNC_NAME(speech_2mic_ns2, SPEECH_2MIC_NS2_DENOISE_IMPL, set_config)\n#define speech_2mic_ns2_process   CONSTRUCT_FUNC_NAME(speech_2mic_ns2, SPEECH_2MIC_NS2_DENOISE_IMPL, process)\n#define speech_2mic_ns2_get_delay   CONSTRUCT_FUNC_NAME(speech_2mic_ns2, SPEECH_2MIC_NS2_DENOISE_IMPL, get_delay)\n#define speech_2mic_ns2_get_required_mips   CONSTRUCT_FUNC_NAME(speech_2mic_ns2, SPEECH_2MIC_NS2_DENOISE_IMPL, get_required_mips)\n\nSpeech2MicNs2State *speech_2mic_ns2_create(int32_t sample_rate, int32_t frame_size, const Speech2MicNs2Config *cfg);\n\nint32_t speech_2mic_ns2_destroy(Speech2MicNs2State *st);\n\nint32_t speech_2mic_ns2_set_config(Speech2MicNs2State *st, const Speech2MicNs2Config *cfg);\n\nint32_t speech_2mic_ns2_process(Speech2MicNs2State *st, short *pcm_buf, int32_t pcm_len, short *out_buf);\n\nint32_t speech_2mic_ns2_get_delay(Speech2MicNs2State *st);\n\nfloat speech_2mic_ns2_get_required_mips(Speech2MicNs2State *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_3mic_ns.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_3MIC_NS_H__\n#define __SPEECH_3MIC_NS_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    int32_t     bypass;\n\tint32_t     blend_en;\n\tint32_t     authen_en;\n    float     \tdelay_tapsM;            // MIC L/R delay samples. 0: 适用于麦克距离为<2cm; 1: 适用于麦克距离为2cm左右; 2: 适用于麦克距离为4cm左右\n    int32_t     delay_tapsS;\n\tfloat       denoise_dB;\n    // float       coefH[2][5];            // {{a0,a1,a2,a3,a4},{b0,b1,b2,b3,b4}}\n    // float       coefL[2][5];            // {{a0,a1,a2,a3,a4},{b0,b1,b2,b3,b4}}\n\tint32_t     crossover_freq;\n    int32_t     freq_smooth_enable;     // 1: 频域滤波打开; 0: 频域滤波关闭; 默认打开\n    int32_t     wnr_enable;             // wind noise reduction enable\n} Speech3MicNsConfig;\n\nstruct Speech3MicNsState_;\n\ntypedef struct Speech3MicNsState_ Speech3MicNsState;\n\nSpeech3MicNsState *speech_3mic_ns_create(int32_t sample_rate, int32_t frame_size, const Speech3MicNsConfig *cfg);\n\nint32_t speech_3mic_ns_destroy(Speech3MicNsState *st);\n\nint32_t speech_3mic_ns_set_config(Speech3MicNsState *st, const Speech3MicNsConfig *cfg);\n\nint32_t speech_3mic_ns_process(Speech3MicNsState *st, short *pcm_buf, int32_t pcm_len, short *out_buf);\n\nfloat speech_3mic_get_required_mips(Speech3MicNsState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_aec.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_AEC_H__\n#define __SPEECH_AEC_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SPEECH_AEC_GET_LIB_ST          (0)\n\n/*\n60\n16383\n4\n*/\ntypedef struct {\n    int32_t     bypass;\n    int32_t     delay;\n    int32_t     leak_estimate;\n    int32_t     leak_estimate_shift;\n} SpeechAecConfig;\n\nstruct SpeechAecState_;\n\ntypedef struct SpeechAecState_ SpeechAecState;\n\n// Creat a instance from speech_aec module/class\n// Common value include: sample rate, frame size and so on. \nSpeechAecState *speech_aec_create(int32_t sample_rate, int32_t frame_size, const SpeechAecConfig *cfg);\n\n// Destory a speech aec instance\nint32_t speech_aec_destroy(SpeechAecState *st);\n\n// Just use modify instance configure\nint32_t speech_aec_set_config(SpeechAecState *st, const SpeechAecConfig *cfg);\n\n// Get/set some value or enable/disable some function\nint32_t speech_aec_ctl(SpeechAecState *st, int32_t ctl, void *ptr);\n\n// Process speech stream\nint32_t speech_aec_process(SpeechAecState *st, int16_t *pcm_in, int16_t *pcm_ref, int32_t pcm_len, int16_t *pcm_out);\n\n// Debug speech_aec instance\nint32_t speech_aec_dump(SpeechAecState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_aec2.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_AEC2_H__\n#define __SPEECH_AEC2_H__\n\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct\n{\n    int32_t     bypass;\n    int32_t     enEAecEnable;\n    int32_t     enHpfEnable;\n    int32_t     enAfEnable;\n    int32_t     enNsEnable;\n    int32_t     enNlpEnable;\n    int32_t     enCngEnable;\n    int32_t     shwDelayLength;\n    float       shwNlpBandSortIdx;\n    float       shwNlpBandSortIdxLow;\n    float       shwNlpTargetSupp;\n    float       shwNlpMinOvrd;\n} SpeechAec2Config;\n\nstruct SpeechAec2State_;\n\ntypedef struct SpeechAec2State_ SpeechAec2State;\n\nSpeechAec2State *speech_aec2_create(int32_t sample_rate, int32_t frame_size, const SpeechAec2Config *cfg);\n\nint32_t speech_aec2_destroy(SpeechAec2State *inst);\n\nint32_t speech_aec2_set_config(SpeechAec2State *st, const SpeechAec2Config *cfg);\n\nint32_t speech_aec2_process(SpeechAec2State *inst, int16_t *pcm_in, int16_t *pcm_ref, int32_t pcm_len);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif//__BT_SCO_CHAIN_WEBRTC_H__"
  },
  {
    "path": "services/multimedia/speech/inc/speech_cfg.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_CFG_H__\n#define __SPEECH_CFG_H__\n\n// Speech process module\n#include \"speech_dc_filter.h\"\n#include \"speech_iir_calibration.h\"\n#include \"speech_fir_calibration.h\"\n#include \"speech_aec.h\"\n#include \"speech_aec2.h\"\n#include \"echo_canceller.h\"\n#include \"dual_mic_denoise.h\"\n#include \"speech_2mic_ns2_denoise.h\"\n#include \"sensormic_denoise.h\"\n#include \"leftright_denoise.h\"\n#include \"speech_3mic_ns.h\"\n#include \"triple_mic_denoise3.h\"\n#include \"far_field_speech_enhancement.h\"\n#include \"speech_ns.h\"\n#include \"lc_mmse_ns.h\"\n#include \"lc_mmse_ns_float.h\"\n#include \"ns3.h\"\n#include \"wnr.h\"\n#include \"VoiceActivityDetection.h\"\n#include \"speech_noise_gate.h\"\n#include \"compexp.h\"\n#include \"agc.h\"\n#include \"speech_eq.h\"\n#include \"speech_gain.h\"\n#include \"speech_ff_2mic_ns2.h\"\n#include \"SubBandBasedAEC.h\"\n// Tool module\n#include \"speech_utils.h\"\n#include \"speech_ssat.h\"\n#include \"speech_memory.h\"\n#include \"iir_resample.h\"\n#include \"frame_resize.h\"\n#include \"ae_math.h\"\n// Other module\n#include \"wind_detection_2mic.h\"\n\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_config.h",
    "content": "#ifndef SPEECH_CONFIG_H\n#define SPEECH_CONFIG_H\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef int16_t speech_data_t;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_dc_filter.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_DC_FILTER_H__\n#define __SPEECH_DC_FILTER_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SPEECH_DC_FILTER_GAIN_Q   (10)\n\n#define SPEECH_DC_FILTER_SET_CHANNEL_NUM            (0)\n#define SPEECH_DC_FILTER_SET_DATA_SEPARATION        (1)\n\ntypedef struct {\n    int32_t     bypass;\n    float       gain;\n} SpeechDcFilterConfig;\n\nstruct SpeechDcFilterState_;\n\ntypedef struct SpeechDcFilterState_ SpeechDcFilterState;\n\n// Creat a instance from speech_dc_filter module/class\n// Common value include: sample rate, frame size and so on. \nSpeechDcFilterState *speech_dc_filter_create(int32_t sample_rate, const SpeechDcFilterConfig *cfg);\n\n// Destory a speech dc_filter instance\nint32_t speech_dc_filter_destroy(SpeechDcFilterState *st);\n\n// Just use modify instance configure\nint32_t speech_dc_filter_set_config(SpeechDcFilterState *st, const SpeechDcFilterConfig *cfg);\n\n// Get/set some value or enable/disable some function\nint32_t speech_dc_filter_ctl(SpeechDcFilterState *st, int32_t ctl, void *ptr);\n\n// Process speech stream\nint32_t speech_dc_filter_process(SpeechDcFilterState *st, int16_t *pcm_buf, int32_t pcm_len);\n\nint32_t speech_dc_filter_process_int24(SpeechDcFilterState *st, int32_t *pcm_buf, int32_t pcm_len);\n\n// Debug speech_dc_filter instance\nint32_t speech_dc_filter_dump(SpeechDcFilterState *st);\n\nfloat speech_dc_filter_get_required_mips(SpeechDcFilterState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_eq.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef SPEECH_EQ_H\n#define SPEECH_EQ_H\n\n#include \"iirfilt.h\"\n\n// use more frame_size * sizeof(float) ram\n#ifdef __arm__\n#define EQ_USE_CMSIS_IIR\n#endif\n\n#define MAX_VQE_EQ_BAND 6\n\ntypedef struct\n{\n    enum IIR_BIQUARD_TYPE type;\n    union\n    {\n        /* Raw config, used when type is IIR_BIQUARD_RAW */\n        struct\n        {\n            float a1; float a2; float b0; float b1; float b2;\n        } raw;\n        /* Generate coeffs using user defined params, used in other type */\n        struct\n        {\n            float f0; float gain; float q;\n        } design;\n    };\n} BiquardParam;\n\ntypedef struct\n{\n    int32_t     bypass;    \n    float       gain;\n    int32_t     num;\n\tBiquardParam params[MAX_VQE_EQ_BAND];\n} EqConfig;\n\ntypedef struct EqState_ EqState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nEqState *eq_init(int32_t sample_rate, int32_t frame_size, const EqConfig *cfg);\n\nint32_t eq_destroy(EqState *st);\n\nint32_t eq_set_config(EqState *st, const EqConfig *cfg);\n\nint32_t eq_process(EqState *st, int16_t *pcm_buf, int32_t pcm_len);\n\nint32_t eq_process_int24(EqState *st, int32_t *pcm_buf, int32_t pcm_len);\n\nint32_t eq_process_float(EqState *st, float *pcm_buf, int32_t pcm_len);\n\nint32_t eq_process2(EqState *st, int16_t *pcm_buf, int32_t pcm_len, int32_t stride);\n\nint32_t eq_process2_int24(EqState *st, int32_t *pcm_buf, int32_t pcm_len, int32_t stride);\n\nint32_t eq_process2_float(EqState *st, float *pcm_buf, int32_t pcm_len, int32_t stride);\n\nfloat eq_get_required_mips(EqState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_ff_2mic_ns2.h",
    "content": "#ifndef __SPEECH_FF_2MIC_NS2_H__\n#define __SPEECH_FF_2MIC_NS2_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nstruct SpeechFF2MicNs2State_;\ntypedef struct SpeechFF2MicNs2State_ SpeechFF2MicNs2State;\nSpeechFF2MicNs2State *speech_ff_2mic_ns2_create(int sample_rate, int frame_size);\nint32_t speech_ff_2mic_ns2_destroy(SpeechFF2MicNs2State *st);\nvoid speech_ff_2mic_ns2_process(SpeechFF2MicNs2State *st, short *inF, short *inR);\nint32_t speech_2mic_ns6_process(SpeechFF2MicNs2State *st, short *pcm_buf, int32_t pcm_len, short *out_buf);\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_ff_3mic_ns1.h",
    "content": "#ifndef __SPEECH_FF_3MIC_NS1_H__\n#define __SPEECH_FF_3MIC_NS1_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\nstruct SpeechFF3MicNs1State_;\ntypedef struct SpeechFF3MicNs1State_ SpeechFF3MicNs1State;\nSpeechFF3MicNs1State *speech_ff_3mic_ns1_create(int sample_rate, int frame_size);\nint32_t speech_ff_3mic_ns1_destroy(SpeechFF3MicNs1State *st);\nint32_t speech_3mic_ns1_process(SpeechFF3MicNs1State *st, short *pcm_buf, short *ref_buf, int32_t pcm_len, short *out_buf);\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_fir_calibration.h",
    "content": "#ifndef SPEECH_FIR_CALIBRATION_H\n#define SPEECH_FIR_CALIBRATION_H\n\n#include \"fftfilt.h\"\n\n// i.e. only support 4 channels\n#define SPEECH_FIR_CALIB_MAX_NUM (3)\n\ntypedef struct\n{\n    float *filter;\n    int filter_length;\n} CalibChannelConfig;\n\ntypedef struct\n{\n    int bypass;\n    int mic_num;\n    float delay;    // fraction delay for main mic\n    CalibChannelConfig calib[SPEECH_FIR_CALIB_MAX_NUM];\n} SpeechFirCalibConfig;\n\ntypedef struct SpeechFirCalibState_ SpeechFirCalibState;\n\n#define CONSTRUCT_FUNC_NAME_A(p, c, m)          p ## _ ## c ## _ ## m\n#define CONSTRUCT_FUNC_NAME(p, c, m)            CONSTRUCT_FUNC_NAME_A(p, c, m)\n\n#ifndef FIR_CALIB_IMPL\n#if defined(VQE_SIMULATE)\n#define FIR_CALIB_IMPL fir\n#else\n#define FIR_CALIB_IMPL hwfir\n#endif\n#endif\n\n#define speech_fir_calib_init CONSTRUCT_FUNC_NAME(speech, FIR_CALIB_IMPL, calib_init)\n#define speech_fir_calib_destroy CONSTRUCT_FUNC_NAME(speech, FIR_CALIB_IMPL, calib_destroy)\n#define speech_fir_calib_process CONSTRUCT_FUNC_NAME(speech, FIR_CALIB_IMPL, calib_process)\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nSpeechFirCalibState *speech_fir_calib_init(int32_t sample_rate, int32_t frame_size, const SpeechFirCalibConfig *config);\n\nvoid speech_fir_calib_destroy(SpeechFirCalibState *st);\n\nvoid speech_fir_calib_process(SpeechFirCalibState *st, int16_t *buf, int32_t frame_size);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_gain.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_GAIN_H__\n#define __SPEECH_GAIN_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SPEECH_GAIN_SET_AAA          (0)\n#define SPEECH_GAIN_GET_AAA          (1)\n\ntypedef struct {\n    int32_t     bypass;\n    float       gain_dB;\n} SpeechGainConfig;\n\nstruct SpeechGainState_;\n\ntypedef struct SpeechGainState_ SpeechGainState;\n\n// Creat a instance from speech_gain module/class\n// Common value include: sample rate, frame size and so on. \nSpeechGainState *speech_gain_create(int32_t sample_rate, int32_t frame_size, const SpeechGainConfig *cfg);\n\n// Destory a speech gain instance\nint32_t speech_gain_destroy(SpeechGainState *st);\n\n// Just use modify instance configure\nint32_t speech_gain_set_config(SpeechGainState *st, const SpeechGainConfig *cfg);\n\n// Get/set some value or enable/disable some function\n// int32_t speech_gain_ctl(SpeechGainState *st, int32_t ctl, void *ptr);\n\n// Process speech stream\nint32_t speech_gain_process(SpeechGainState *st, int16_t *pcm_buf, int32_t pcm_len);\n\n// Debug speech_gain instance\nint32_t speech_gain_dump(SpeechGainState *st);\n\nfloat speech_gain_get_required_mips(SpeechGainState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_iir.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_IIR_H__\n#define __SPEECH_IIR_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SPEECH_IIR_COEFF_LEN    (5)\n\ntypedef float SPEECH_RX_EQ_PCOEFFS_T[SPEECH_IIR_COEFF_LEN];\n\ntypedef struct {\n    int32_t numStages;\n\n    // {\n    //     {b10, b11, b12, a11, a12},\n    //     {b20, b21, b22, a21, a22},\n    //     ...\n    // }    \n    // const float   (*pCoeffs)[SPEECH_IIR_COEFF_LEN];\n    SPEECH_RX_EQ_PCOEFFS_T *pCoeffs;\n} SPEECH_IIR_CFG_T;\n\ntypedef void SPEECH_IIR_STATE_T;\n\n// Initial speech_iir module/class\nint speech_iir_init(void);\n\n// Deinitial speech_iir module/calss\nint speech_iir_deinit(void);\n\n// Creat a instance from speech_iir module/class\n// Common value include: sample rate, frame size and so on. \nSPEECH_IIR_STATE_T *speech_iir_create(const SPEECH_IIR_CFG_T *cfg);\n\n// Destory a speech iir instance\nint speech_iir_destroy(SPEECH_IIR_STATE_T *inst);\n\n// Just use modify instance configure\nint speech_iir_set_config(SPEECH_IIR_STATE_T *inst, const SPEECH_IIR_CFG_T *cfg);\n\n// Process speech stream\nint speech_iir_process(SPEECH_IIR_STATE_T *inst, int16_t *pcm_buf, int32_t pcm_len);\n\n// Debug speech_iir instance\nint speech_iir_dump(SPEECH_IIR_STATE_T *inst);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_iir_calibration.h",
    "content": "#ifndef SPEECH_IIR_CALIBRATION_H\n#define SPEECH_IIR_CALIBRATION_H\n\n#include \"speech_eq.h\"\n\n// i.e. only support 4 channels\n#define SPEECH_IIR_CALIB_MAX_NUM (3)\n\ntypedef struct\n{\n    int bypass;\n    int mic_num;\n    EqConfig calib[SPEECH_IIR_CALIB_MAX_NUM];\n} SpeechIirCalibConfig;\n\ntypedef struct SpeechIirCalibState_ SpeechIirCalibState;\n\nSpeechIirCalibState *speech_iir_calib_init(int32_t sample_rate, int32_t frame_size, const SpeechIirCalibConfig *config);\n\nvoid speech_iir_calib_destroy(SpeechIirCalibState *st);\n\nvoid speech_iir_calib_process(SpeechIirCalibState *st, int16_t *buf, int32_t frame_size);\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_memory.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_MEMORY_H__\n#define __SPEECH_MEMORY_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifndef VQE_SIMULATE\n#include \"med_memory.h\"\n\n#define speech_heap_init(a, b)          med_heap_init(a, b)\n#define speech_heap_add_block(a, b)     med_heap_add_block(a, b)\n#define speech_malloc(a)                med_malloc(a)\n#define speech_realloc(a, b)            med_realloc(a, b)\n#define speech_calloc(a, b)             med_calloc(a, b)\n#define speech_free(a)                  med_free(a)\n#define speech_memory_info(a, b, c)     med_memory_info(a, b, c)\n\n#define speech_heap_set_cp(a)           med_heap_set_cp(a)\n#else\n#include \n#include \n\nvoid speech_heap_init(void *begin_addr, size_t size);\nvoid *speech_malloc(size_t size);\nvoid speech_free(void *p);\nvoid *speech_calloc(size_t nmemb, size_t size);\nvoid *speech_realloc(void *ptr, size_t size);\nvoid speech_memory_info(size_t *total,\n                    size_t *used,\n                    size_t *max_used);\n\n#define speech_heap_set_cp(a)\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_mics_calibration.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_MICS_CALIBRATION_H__\n#define __SPEECH_MICS_CALIBRATION_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// #define SPEECH_MICS_CALIBRATION_SET_MODE            (0)\n// #define SPEECH_MICS_CALIBRATION_GET_MODE            (1)\n\n#define SPEECH_MICS_CALIBRATION_GET_COEF_LEN        (2)\n#define SPEECH_MICS_CALIBRATION_GET_COEF            (3)\n#define SPEECH_MICS_CALIBRATION_SET_COEF            (4)\n\n#define SPEECH_MICS_CALIBRATION_GET_PS_MSE          (5)\n\n#define SPEECH_MICS_CALIBRATION_GET_MICOUT_LEN      (10)\n#define SPEECH_MICS_CALIBRATION_GET_MIC1OUT         (11)\n#define SPEECH_MICS_CALIBRATION_GET_MIC2OUT         (12)\n#define SPEECH_MICS_CALIBRATION_GET_MIC3OUT         (13)\n#define SPEECH_MICS_CALIBRATION_GET_MIC4OUT         (14)\n#define SPEECH_MICS_CALIBRATION_GET_MIC5OUT         (15)\n#define SPEECH_MICS_CALIBRATION_GET_MIC6OUT         (16)\n\n// mode\n#define SPEECH_MICS_CALIBRATION_MODE_CALIBRATION    (0)\n#define SPEECH_MICS_CALIBRATION_MODE_VERIFY         (1)\n#define SPEECH_MICS_CALIBRATION_MODE_NULL           (2)\n\n// Return status\n#define SPEECH_MICS_CALIBRATION_RET_READY           (0)\n#define SPEECH_MICS_CALIBRATION_RET_BUSY            (1)\n#define SPEECH_MICS_CALIBRATION_RET_OK              (2)\n\n\ntypedef struct {\n    int32_t enable;\n    // int32_t mode;\n    int32_t setup_time;\n    int32_t calibration_time;\n    int32_t verify_time;\n} SPEECH_MICS_CALIBRATION_CFG_T;\n\ntypedef void *SPEECH_MICS_CALIBRATION_STATE_T;\n\n// Creat a instance from speech_mics_calibration module/class\n// Common value include: sample rate, frame size and so on. \nSPEECH_MICS_CALIBRATION_STATE_T *speech_mics_calibration_create(SPEECH_MICS_CALIBRATION_CFG_T *cfg, int frame_size, int sample_rate);\n\n// Destory a speech mics_calibration instance\nint speech_mics_calibration_destroy(SPEECH_MICS_CALIBRATION_STATE_T *inst);\n\n// Just use modify instance configure\nint speech_mics_calibration_set_config(SPEECH_MICS_CALIBRATION_STATE_T *inst, SPEECH_MICS_CALIBRATION_CFG_T *cfg);\n\n// Enable some function\nint speech_mics_calibration_ctl(SPEECH_MICS_CALIBRATION_STATE_T *inst, int ctl, void *ptr);\n\n// Process speech stream\nint speech_mics_calibration_process(SPEECH_MICS_CALIBRATION_STATE_T *inst, int16_t *pcm_mic1, int16_t *pcm_mic2, int32_t pcm_len);\n\n// Test: verify calibration effect\nint speech_mics_calibration_test_verify(SPEECH_MICS_CALIBRATION_STATE_T *inst, int16_t *pcm_mic1, int16_t *pcm_mic2, int32_t pcm_len);\n\n// Debug speech_mics_calibration instance\nint speech_mics_calibration_dump(SPEECH_MICS_CALIBRATION_STATE_T *inst);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_noise_gate.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _SPEECH_NOISE_GATE_H_\n#define _SPEECH_NOISE_GATE_H_\n\n#include \n\ntypedef struct {\n    int32_t     bypass;\n    int32_t     data_threshold;\n    int32_t     data_shift;\n    float       factor_up;\n    float       factor_down;\n} NoisegateConfig;\n\nstruct NoisegateState_;\n\ntypedef struct NoisegateState_ NoisegateState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nNoisegateState* speech_noise_gate_create(int32_t sample_rate, int32_t frame_size, const NoisegateConfig *cfg);\nint32_t speech_noise_gate_destroy(NoisegateState *st);\nint32_t speech_noise_gate_set_config(NoisegateState *st, const NoisegateConfig *cfg);\n\nint32_t speech_noise_gate_process(NoisegateState *st, int16_t *pcm_buf, int32_t pcm_len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_ns.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_NS_H__\n#define __SPEECH_NS_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SPEECH_NS_SET_AEC_STATE         (0)\n#define SPEECH_NS_SET_AEC_SUPPRESS      (1)\n\ntypedef struct {\n    int32_t     bypass;\n    float       denoise_dB;\n} SpeechNsConfig;\n\nstruct SpeechNsState_;\n\ntypedef struct SpeechNsState_ SpeechNsState;\n\n// Creat a instance from speech_ns module/class\n// Common value include: sample rate, frame size and so on. \nSpeechNsState *speech_ns_create(int32_t sample_rate, int32_t frame_size, const SpeechNsConfig *cfg);\n\n// Destory a speech ns instance\nint32_t speech_ns_destroy(SpeechNsState *st);\n\n// Just use modify instance configure\nint32_t speech_ns_set_config(SpeechNsState *st, const SpeechNsConfig *cfg);\n\n// Get/set some value or enable/disable some function\nint32_t speech_ns_ctl(SpeechNsState *st, int32_t ctl, void *ptr);\n\n// Process speech stream\nint32_t speech_ns_process(SpeechNsState *st, int16_t *pcm_buf, int32_t pcm_len);\n\n// Debug speech_ns instance\nint32_t speech_ns_dump(SpeechNsState *st);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_peak_detector.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_PEAK_DETECTOR_H__\n#define __SPEECH_PEAK_DETECTOR_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// return_type\n#define SPEECH_PEAK_DETECTOR_RETURN_MEAN            (0)\n#define SPEECH_PEAK_DETECTOR_RETURN_ARRAY           (1)\n\ntypedef struct {\n    int     return_type;\n    float   factor_up;\n    float   factor_down;\n} SPEECH_PEAK_DETECTOR_CFG_T;\n\ntypedef void *SPEECH_PEAK_DETECTOR_STATE_T;\n\n// Creat a instance from speech_peak_detector module/class\n// Common value include: sample rate, frame size and so on. \nSPEECH_PEAK_DETECTOR_STATE_T *speech_peak_detector_create(SPEECH_PEAK_DETECTOR_CFG_T *cfg, int frame_size, int sample_rate);\n\n// Destory a speech peak_detector instance\nint speech_peak_detector_destroy(SPEECH_PEAK_DETECTOR_STATE_T *inst);\n\n// Just use modify instance configure\nint speech_peak_detector_set_config(SPEECH_PEAK_DETECTOR_STATE_T *inst, SPEECH_PEAK_DETECTOR_CFG_T *cfg);\n\n// Enable some function\nint speech_peak_detector_ctl(SPEECH_PEAK_DETECTOR_STATE_T *inst, int ctl, void *ptr);\n\n// Process speech stream\nint speech_peak_detector_process(SPEECH_PEAK_DETECTOR_STATE_T *inst, int16_t *pcm_buf, int32_t pcm_len, float *out);\n\n// Debug speech_peak_detector instance\nint speech_peak_detector_dump(SPEECH_PEAK_DETECTOR_STATE_T *inst);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/speech_ssat.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_SSAT_H__\n#define __SPEECH_SSAT_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#if defined(__GNUC__) && defined(__arm__)\n#include \"cmsis.h\"\nstatic inline int16_t speech_ssat_int16(int32_t in)\n{\n    int16_t out;\n\n    out = __SSAT(in,16);\n\n    return out;\n}\n\nstatic inline int32_t speech_ssat_int24(int32_t in)\n{\n    int32_t out;\n\n    out = __SSAT(in, 24);\n\n    return out;\n}\n#else\nstatic inline int16_t speech_ssat_int16(int32_t in)\n{\n    int16_t out;\n\n    if (in>32767)\n    {\n        in = 32767;\n    }\n    else if (in<-32768)\n    {\n        in = -32768;\n    }\n    out = (int16_t)in;\n    return out;\n}\n\nstatic inline int32_t speech_ssat_int24(int32_t in)\n{\n    int32_t out;\n\n    if (in > 0x7fffff) {\n        in = 0x7fffff;\n    } else if (in < -0x800000) {\n        in = -0x800000;\n    }\n    out = (int32_t)in;\n    return out;\n}\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#ifdef __cplusplus\ntemplate\nstatic inline DataType speech_ssat(int in)\n{\n    if (sizeof(DataType) == sizeof(int16_t))\n        return speech_ssat_int16(in);\n    else\n        return speech_ssat_int24(in);\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/speech_utils.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __SPEECH_UTILS_H__\n#define __SPEECH_UTILS_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// len = fs / 1000 * ms\n#if defined(LOW_DELAY_SCO)\n// len = fs / 1000 * ms\n#define SPEECH_FRAME_MS_TO_LEN(fs, ms)      (( (fs) / 1000 * (ms) )/2)\n#else\n// len = fs / 1000 * ms\n#define SPEECH_FRAME_MS_TO_LEN(fs, ms)      ( (fs) / 1000 * (ms) )\n#endif\n#define SPEECH_FRAME_LEN_TO_MS(fs, len)     ( (len) / ( (fs) / 1000) )\n\n\ninline void speech_set_int16(short *dst, short v, int len)\n{\n    for (int i=0; i\n#include \"speech_config.h\"\n\ntypedef struct\n{\n    int32_t bypass;\n    int32_t endfire_enable;\n    int32_t broadside_enable;\n\n    // endfire beamforming config\n    float delay_taps;\n    int32_t freq_smooth_enable;\n    int32_t wnr_enable;\n\n    // broadsize beamforming config\n} TripleMicDenoise3Config;\n\nstruct TripleMicDenoise3State_;\n\ntypedef struct TripleMicDenoise3State_ TripleMicDenoise3State;\n\nTripleMicDenoise3State *triple_mic_denoise3_init(int32_t sample_rate, int32_t frame_size, const TripleMicDenoise3Config *cfg);\n\nvoid triple_mic_denoise3_destroy(TripleMicDenoise3State *st);\n\n// accept 3 channel interleaved pcm stream, ch0 is main mic, ch1 is endfire reference mic, ch2 is broadside reference mic\nint32_t triple_mic_denoise3_process(TripleMicDenoise3State *st, speech_data_t *pcm_buf, int32_t pcm_len, speech_data_t *out_buf);\n\nfloat triple_mic_denoise3_get_required_mips(TripleMicDenoise3State *st);\n\n#endif"
  },
  {
    "path": "services/multimedia/speech/inc/wind_detection_2mic.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __WIND_DETECTION_H__\n#define __WIND_DETECTION_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    int32_t     bypass;\n\tfloat\t\tpower_thd;\n} WindDetection2MicConfig;\n\nstruct WindDetection2MicState_;\n\ntypedef struct WindDetection2MicState_ WindDetection2MicState;\n\n\nWindDetection2MicState *WindDetection2Mic_create(int sample_rate, int sample_bits, int frame_size, const WindDetection2MicConfig *cfg);\n\nvoid WindDetection2Mic_destroy(WindDetection2MicState *st);\n\nint32_t WindDetection2Mic_set_config(WindDetection2MicState *st, const WindDetection2MicConfig *cfg);\n\nuint8_t wind_state_detect(uint8_t pre_wind_st, float wind_indictor, float *windindicator_cache, float *windthd, uint8_t *cur_wind_st);\n\nfloat WindDetection2Mic_process_16bit(WindDetection2MicState *st, short *inF, short *inR, uint32_t frame_len, float *wind_power);\n\nfloat WindDetection2Mic_process_24bit(WindDetection2MicState *st, int *inF, int *inR, uint32_t frame_len, float *wind_power);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/multimedia/speech/inc/wnr.h",
    "content": "#ifndef __WNR_H__\n#define __WNR_H__\n\n#include \"iirfilt.h\"\n\ntypedef struct\n{\n    int32_t bypass;\n    int lpf_cutoff;\n    int hpf_cutoff;\n    float power_ratio_thr; // ratio of the power spectrum of the lower frequencies over the total power spectrum for all frequencies\n    float power_thr;       // normalized power of the low frequencies\n} WnrConfig;\n\nstruct WnrState_;\n\ntypedef struct WnrState_ WnrState;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nWnrState* wnr_create(int32_t sample_rate, int32_t frame_size, const WnrConfig *config);\n\nvoid wnr_destroy(WnrState *st);\n\nvoid wnr_process(WnrState *st, int16_t *buf, int frameSize);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/norflash_api/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += -Iplatform/hal \\\n          -Iutils/heap \\\n          -Iplatform/drivers/ana\n\nifeq ($(FLASH_SUSPEND),1)\nCFLAGS_norflash_api.o += -DFLASH_SUSPEND\nendif\n\nifeq ($(FLASH_REMAP),1)\nCFLAGS_norflash_api.o += -DFLASH_REMAP\nendif\n\nifneq ($(OTA_CODE_OFFSET),)\nCFLAGS_norflash_api.o += -DOTA_CODE_OFFSET=$(OTA_CODE_OFFSET)\nendif\n\nifneq ($(OTA_REMAP_OFFSET),)\nCFLAGS_norflash_api.o += -DOTA_REMAP_OFFSET=$(OTA_REMAP_OFFSET)\nendif\n\nifeq ($(PUYA_FLASH_ERASE_PAGE_ENABLE),1)\nCFLAGS_norflash_api.o += -DPUYA_FLASH_ERASE_PAGE_ENABLE\nendif\n\nifeq ($(USB_AUDIO_APP),1)\nifneq (,$(filter $(BTUSB_AUDIO_MODE) $(BT_USB_AUDIO_DUAL_MODE), 1))\nexport FLASH_API_SIMPLE ?= 1\nendif\nendif\n\nifeq ($(FLASH_API_SIMPLE),1)\nCFLAGS_norflash_api.o += -DFLASH_API_SIMPLE\nelse\nifeq ($(FLASH_API_HIGHPERFORMANCE),1)\nCFLAGS_norflash_api.o += -DFLASH_API_HIGHPERFORMANCE\nelse\nCFLAGS_norflash_api.o += -DFLASH_API_NORMAL\nendif\nendif\n\n"
  },
  {
    "path": "services/norflash_api/norflash_api.cpp",
    "content": "#include \"cmsis.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n#ifdef RTOS\n#include \"cmsis_os.h\"\n#else\n#include \"hal_timer.h\"\n#endif\n#include \"hal_norflash.h\"\n#include \"hal_sleep.h\"\n#include \"hal_trace.h\"\n#include \"norflash_api.h\"\n#include \"pmu.h\"\n\n#if 0\n#define NORFLASH_API_TRACE(str, ...) TRACE(str, ##__VA_ARGS__)\n#else\n#define NORFLASH_API_TRACE(str, ...)\n#endif\n\n#define API_IS_ALIGN(v, size) (((v / size) * size) == v)\n\nstatic NORFLASH_API_INFO norflash_api_info = {\n    false,\n};\nstatic OPERA_INFO_LIST opera_info_list[NORFLASH_API_OPRA_LIST_LEN];\nstatic DATA_LIST data_list[NORFLASH_API_WRITE_BUFF_LEN];\nstatic int suspend_number = 0;\n\nstatic void *_norflash_api_malloc(uint32_t size) {\n  uint32_t i;\n\n  if (size == sizeof(OPRA_INFO)) {\n    for (i = 0; i < NORFLASH_API_OPRA_LIST_LEN; i++) {\n      if (opera_info_list[i].is_used == false) {\n        opera_info_list[i].is_used = true;\n        return (void *)&opera_info_list[i].opera_info;\n      }\n    }\n    return NULL;\n  } else if (size == NORFLASH_API_SECTOR_SIZE) {\n    for (i = 0; i < NORFLASH_API_WRITE_BUFF_LEN; i++) {\n      if (data_list[i].is_used == false) {\n        data_list[i].is_used = true;\n        return (void *)data_list[i].buffer;\n      }\n    }\n    return NULL;\n  } else {\n    ASSERT(0, \"%s: size(0x%x) error!\", __func__, size);\n  }\n}\n\nstatic void _norflash_api_free(void *p) {\n  uint32_t i;\n\n  for (i = 0; i < NORFLASH_API_OPRA_LIST_LEN; i++) {\n    if ((uint8_t *)&opera_info_list[i].opera_info == p) {\n      opera_info_list[i].is_used = false;\n      return;\n    }\n  }\n\n  for (i = 0; i < NORFLASH_API_WRITE_BUFF_LEN; i++) {\n    if (data_list[i].buffer == p) {\n      data_list[i].is_used = false;\n      return;\n    }\n  }\n\n  ASSERT(0, \"%s: p(%p) error!\", __func__, p);\n}\n\nstatic MODULE_INFO *_get_module_info(enum NORFLASH_API_MODULE_ID_T mod_id) {\n  return &norflash_api_info.mod_info[mod_id];\n}\n\nstatic OPRA_INFO *_get_tail(MODULE_INFO *mod_info, bool is_remove) {\n  OPRA_INFO *opera_node = NULL;\n  OPRA_INFO *pre_node = NULL;\n  OPRA_INFO *tmp;\n\n  pre_node = mod_info->opera_info;\n  tmp = mod_info->opera_info;\n  while (tmp) {\n    opera_node = tmp;\n    tmp = opera_node->next;\n    if (tmp) {\n      pre_node = opera_node;\n    }\n  }\n  if (is_remove) {\n    if (pre_node) {\n      pre_node->next = NULL;\n    }\n  }\n  if (opera_node) {\n    opera_node->lock = true;\n  }\n  return opera_node;\n}\n\nstatic void _opera_del(MODULE_INFO *mod_info, OPRA_INFO *node) {\n  OPRA_INFO *opera_node = NULL;\n  OPRA_INFO *pre_node = NULL;\n  OPRA_INFO *tmp;\n\n  pre_node = mod_info->opera_info;\n  tmp = mod_info->opera_info;\n  while (tmp) {\n    opera_node = tmp;\n    if (opera_node == node) {\n      if (mod_info->opera_info == opera_node) {\n        mod_info->opera_info = NULL;\n      } else {\n        pre_node->next = NULL;\n      }\n      if (node->buff) {\n        _norflash_api_free(node->buff);\n      }\n      _norflash_api_free(node);\n      break;\n    }\n    tmp = opera_node->next;\n    if (tmp) {\n      pre_node = opera_node;\n    }\n  }\n}\n\nstatic uint32_t _get_ew_count(MODULE_INFO *mod_info) {\n  OPRA_INFO *opera_node = NULL;\n  OPRA_INFO *tmp;\n  uint32_t count = 0;\n\n  tmp = mod_info->opera_info;\n  while (tmp) {\n    opera_node = tmp;\n    count++;\n    tmp = opera_node->next;\n  }\n  return count;\n}\n\nstatic uint32_t _get_w_count(MODULE_INFO *mod_info) {\n  OPRA_INFO *opera_node = NULL;\n  OPRA_INFO *tmp;\n  uint32_t count = 0;\n\n  tmp = mod_info->opera_info;\n  while (tmp) {\n    opera_node = tmp;\n    if (opera_node->type == NORFLASH_API_WRITTING) {\n      count++;\n    }\n    tmp = opera_node->next;\n  }\n  return count;\n}\n\nstatic uint32_t _get_e_count(MODULE_INFO *mod_info) {\n  OPRA_INFO *opera_node = NULL;\n  OPRA_INFO *tmp;\n  uint32_t count = 0;\n\n  tmp = mod_info->opera_info;\n  while (tmp) {\n    opera_node = tmp;\n    if (opera_node->type == NORFLASH_API_ERASING) {\n      count++;\n    }\n    tmp = opera_node->next;\n  }\n  return count;\n}\n\nstatic MODULE_INFO *_get_cur_mod(void) {\n  uint32_t i;\n  MODULE_INFO *mod_info = NULL;\n  uint32_t tmp_mod_id = NORFLASH_API_MODULE_ID_COUNT;\n\n  if (norflash_api_info.cur_mod) {\n    return norflash_api_info.cur_mod;\n  }\n\n  tmp_mod_id = norflash_api_info.cur_mod_id;\n  for (i = 0; i < NORFLASH_API_MODULE_ID_COUNT; i++) {\n    tmp_mod_id =\n        tmp_mod_id + 1 >= NORFLASH_API_MODULE_ID_COUNT ? 0 : tmp_mod_id + 1;\n    mod_info = _get_module_info((enum NORFLASH_API_MODULE_ID_T)tmp_mod_id);\n    if (mod_info->is_inited) {\n      if (_get_ew_count(mod_info) > 0) {\n        return mod_info;\n      }\n    }\n  }\n  return NULL;\n}\n\nstatic enum NORFLASH_API_MODULE_ID_T _get_mod_id(MODULE_INFO *mod_info) {\n  uint32_t i;\n  enum NORFLASH_API_MODULE_ID_T mod_id = NORFLASH_API_MODULE_ID_COUNT;\n  MODULE_INFO *tmp_mod_info = NULL;\n\n  for (i = 0; i < NORFLASH_API_MODULE_ID_COUNT; i++) {\n    tmp_mod_info = _get_module_info((enum NORFLASH_API_MODULE_ID_T)i);\n    if (tmp_mod_info == mod_info) {\n      mod_id = (enum NORFLASH_API_MODULE_ID_T)i;\n      break;\n    }\n  }\n  return mod_id;\n}\n\n#ifdef FLASH_REMAP\nstatic void _flash_remap_start(enum HAL_NORFLASH_ID_T id, uint32_t addr,\n                               uint32_t len) {\n  uint32_t remap_addr;\n  uint32_t remap_len;\n  uint32_t remap_offset;\n  enum HAL_NORFLASH_RET_T ret;\n\n  remap_addr = OTA_CODE_OFFSET;\n  remap_len = OTA_REMAP_OFFSET - OTA_CODE_OFFSET;\n  remap_offset = OTA_REMAP_OFFSET;\n\n  // NORFLASH_API_TRACE(3,\"%s: id = %d,addr = 0x%x,len = 0x%x.\",\n  // __func__,id,addr,len);\n  if ((addr & 0x3ffffff) + len <= (remap_addr & 0x3ffffff) ||\n      (addr & 0x3ffffff) >= (remap_addr & 0x3ffffff) + remap_len) {\n    // NORFLASH_API_TRACE(3,\"%s: Not in the remap area.\",__func__);\n    return;\n  }\n\n  if (((addr & 0x3ffffff) < (remap_addr & 0x3ffffff) &&\n       (addr & 0x3ffffff) + len > (remap_addr & 0x3ffffff)) ||\n      ((addr & 0x3ffffff) < (remap_addr & 0x3ffffff) + remap_len &&\n       (addr & 0x3ffffff) + len > (remap_addr & 0x3ffffff) + remap_len)) {\n    ASSERT(0,\n           \"%s: Address ranges bad!addr = 0x%x, \"\n           \"len=0x%x,remap_addr=0x%x,remap_len=0x%x\",\n           __func__, addr, len, remap_addr, remap_len);\n  }\n\n  if (!hal_norflash_get_remap_status(id)) {\n    // NORFLASH_API_TRACE(3,\"%s: Unremap to enable remap.\",__func__);\n    ret = hal_norflash_enable_remap(id, remap_addr, remap_len, remap_offset);\n    ASSERT(ret == HAL_NORFLASH_OK,\n           \"%s: Failed to enable remap(0x%x,0x%x,0x%x), ret = %d\", __func__,\n           remap_addr, remap_len, remap_offset, ret);\n  } else {\n    // NORFLASH_API_TRACE(3,\"%s: Remaped to disable remap.\",__func__);\n    ret = hal_norflash_disable_remap(id);\n    ASSERT(ret == HAL_NORFLASH_OK, \"%s: Failed to disable remap, ret = %d\",\n           __func__, ret);\n  }\n}\n\nstatic void _flash_remap_done(enum HAL_NORFLASH_ID_T id, uint32_t addr,\n                              uint32_t len) {\n  uint32_t remap_addr;\n  uint32_t remap_len;\n  uint32_t remap_offset;\n  enum HAL_NORFLASH_RET_T ret;\n\n  remap_addr = OTA_CODE_OFFSET;\n  remap_len = OTA_REMAP_OFFSET - OTA_CODE_OFFSET;\n  remap_offset = OTA_REMAP_OFFSET;\n\n  // NORFLASH_API_TRACE(3, \"%s: id = %d,addr = 0x%x,len = 0x%x.\",\n  // __func__,id,addr,len);\n  if ((addr & 0x3ffffff) + len <= (remap_addr & 0x3ffffff) ||\n      (addr & 0x3ffffff) >= (remap_addr & 0x3ffffff) + remap_len) {\n    // NORFLASH_API_TRACE(3,\"%s: Not in the remap area.\",__func__);\n    return;\n  }\n\n  if (((addr & 0x3ffffff) < (remap_addr & 0x3ffffff) &&\n       (addr & 0x3ffffff) + len > (remap_addr & 0x3ffffff)) ||\n      ((addr & 0x3ffffff) < (remap_addr & 0x3ffffff) + remap_len &&\n       (addr & 0x3ffffff) + len > (remap_addr & 0x3ffffff) + remap_len)) {\n    ASSERT(0,\n           \"%s: Address ranges bad!addr = 0x%x, \"\n           \"len=0x%x,remap_addr=0x%x,remap_len=0x%x\",\n           __func__, addr, len, remap_addr, remap_len);\n  }\n\n  if (!hal_norflash_get_remap_status(id)) {\n    // NORFLASH_API_TRACE(3, \"%s: Unremap to enable remap.\",__func__);\n    ret = hal_norflash_enable_remap(id, remap_addr, remap_len, remap_offset);\n    ASSERT(ret == HAL_NORFLASH_OK,\n           \"%s: Failed to enable remap(0x%x,0x%x,0x%x), ret = %d\", __func__,\n           remap_addr, remap_len, remap_offset, ret);\n  } else {\n    // NORFLASH_API_TRACE(3, \"%s: Remaped to disable remap.\",__func__);\n    ret = hal_norflash_disable_remap(id);\n    ASSERT(ret == HAL_NORFLASH_OK, \"%s: Failed to disable remap, ret = %d\",\n           __func__, ret);\n  }\n}\n\n#define FLASH_REMAP_START _flash_remap_start\n#define FLASH_REMAP_DONE _flash_remap_done\n#else\n#define FLASH_REMAP_START(...)\n#define FLASH_REMAP_DONE(...)\n#endif\n\nstatic int32_t _opera_read(MODULE_INFO *mod_info, uint32_t addr, uint8_t *buff,\n                           uint32_t len) {\n  OPRA_INFO *opera_node = NULL;\n  OPRA_INFO *e_node = NULL;\n  OPRA_INFO *w_node = NULL;\n  OPRA_INFO *tmp;\n  uint32_t r_offs;\n  uint32_t sec_start;\n  uint32_t sec_len;\n\n  sec_len = mod_info->mod_sector_len;\n  sec_start = (addr / sec_len) * sec_len;\n  tmp = mod_info->opera_info;\n  while (tmp) {\n    opera_node = tmp;\n    tmp = opera_node->next;\n    if (opera_node->addr == sec_start) {\n      if (opera_node->type == NORFLASH_API_WRITTING) {\n        w_node = opera_node;\n        break;\n      } else {\n        e_node = opera_node;\n        break;\n      }\n    }\n  }\n\n  if (w_node) {\n    r_offs = addr - sec_start;\n    memcpy(buff, w_node->buff + r_offs, len);\n  } else {\n    if (e_node) {\n      memset(buff, 0xff, len);\n    } else {\n      FLASH_REMAP_START(mod_info->dev_id, addr, len);\n      memcpy(buff, (uint8_t *)addr, len);\n      FLASH_REMAP_DONE(mod_info->dev_id, addr, len);\n      /*\n      HAL_NORFLASH_RET_T result;\n      result = hal_norflash_read(mod_info->dev_id,addr,buff,len);\n      if(result != HAL_NORFLASH_OK)\n      {\n          NORFLASH_API_TRACE(2,\"%s: hal_norflash_read failed,result = %d.\",\n                  __func__,result);\n          return result;\n      }\n      */\n    }\n  }\n  return 0;\n}\n\nstatic int32_t _e_opera_add(MODULE_INFO *mod_info, uint32_t addr,\n                            uint32_t len) {\n  OPRA_INFO *opera_node = NULL;\n  OPRA_INFO *pre_node = NULL;\n  OPRA_INFO *tmp;\n  int32_t ret = 0;\n\n  // delete opera nodes with the same address when add the erase opera node.\n  pre_node = mod_info->opera_info;\n  tmp = mod_info->opera_info;\n  while (tmp) {\n    opera_node = tmp;\n    tmp = opera_node->next;\n\n    if (opera_node->addr == addr) {\n      if (opera_node->lock == false) {\n        if (opera_node == mod_info->opera_info) {\n          mod_info->opera_info = tmp;\n        } else {\n          pre_node->next = tmp;\n        }\n        if (opera_node->type == NORFLASH_API_WRITTING) {\n          if (opera_node->buff) {\n            _norflash_api_free(opera_node->buff);\n          }\n        }\n        _norflash_api_free(opera_node);\n      } else {\n        if (opera_node->type == NORFLASH_API_ERASING) {\n          NORFLASH_API_TRACE(3, \"%s: erase is merged! addr = 0x%x,len = 0x%x.\",\n                             __func__, opera_node->addr, opera_node->len);\n          ret = 0;\n          goto _func_end;\n        }\n      }\n    }\n\n    if (tmp) {\n      pre_node = opera_node;\n    }\n  }\n\n  // add new node to header.\n  opera_node = (OPRA_INFO *)_norflash_api_malloc(sizeof(OPRA_INFO));\n  if (opera_node == NULL) {\n    NORFLASH_API_TRACE(3, \"%s:%d,_norflash_api_malloc failed! size = %d.\",\n                       __func__, __LINE__, sizeof(OPRA_INFO));\n    ret = 1;\n    goto _func_end;\n  }\n  opera_node->type = NORFLASH_API_ERASING;\n  opera_node->addr = addr;\n  opera_node->len = len;\n  opera_node->w_offs = 0;\n  opera_node->w_len = 0;\n  opera_node->buff = NULL;\n  opera_node->lock = false;\n  opera_node->next = mod_info->opera_info;\n  mod_info->opera_info = opera_node;\n  ret = 0;\n_func_end:\n\n  return ret;\n}\n\nstatic int32_t _w_opera_add(MODULE_INFO *mod_info, uint32_t addr, uint32_t len,\n                            uint8_t *buff) {\n  OPRA_INFO *opera_node = NULL;\n  OPRA_INFO *e_node = NULL;\n  OPRA_INFO *w_node = NULL;\n  OPRA_INFO *tmp;\n  uint32_t w_offs;\n  uint32_t w_len;\n  uint32_t sec_start;\n  uint32_t sec_len;\n  uint32_t w_end1;\n  uint32_t w_end2;\n  uint32_t w_start;\n  uint32_t w_end;\n  uint32_t w_len_new;\n  int32_t ret = 0;\n\n  sec_len = mod_info->mod_sector_len;\n  sec_start = (addr / sec_len) * sec_len;\n  w_offs = addr - sec_start;\n  w_len = len;\n  tmp = mod_info->opera_info;\n  while (tmp) {\n    opera_node = tmp;\n    tmp = opera_node->next;\n\n    if (opera_node->addr == sec_start) {\n      if (opera_node->type == NORFLASH_API_WRITTING) {\n        if (!opera_node->lock) {\n          // select the first w_node in the list.\n          w_node = opera_node;\n          break;\n        }\n      } else {\n        e_node = opera_node;\n        break;\n      }\n    }\n  }\n\n  if (w_node) {\n    memcpy(w_node->buff + w_offs, buff, w_len);\n    w_start = w_node->w_offs <= w_offs ? w_node->w_offs : w_offs;\n    w_end1 = w_node->w_offs + w_node->w_len;\n    w_end2 = w_offs + w_len;\n    w_end = w_end1 >= w_end2 ? w_end1 : w_end2;\n    w_len_new = w_end - w_start;\n    w_node->w_offs = w_start;\n    w_node->w_len = w_len_new;\n    opera_node = w_node;\n    ret = 0;\n  } else {\n    opera_node = (OPRA_INFO *)_norflash_api_malloc(sizeof(OPRA_INFO));\n    if (opera_node == NULL) {\n      NORFLASH_API_TRACE(3, \"%s:%d,_norflash_api_malloc failed! size = %d.\",\n                         __func__, __LINE__, sizeof(OPRA_INFO));\n      ret = 1;\n      goto _func_end;\n    }\n    opera_node->type = NORFLASH_API_WRITTING;\n    opera_node->addr = sec_start;\n    opera_node->len = sec_len;\n    opera_node->w_offs = w_offs;\n    opera_node->w_len = w_len;\n    opera_node->buff = (uint8_t *)_norflash_api_malloc(opera_node->len);\n    if (opera_node->buff == NULL) {\n      _norflash_api_free(opera_node);\n      NORFLASH_API_TRACE(3, \"%s:%d,_norflash_api_malloc failed! size = %d.\",\n                         __func__, __LINE__, opera_node->len);\n      ret = 1;\n      goto _func_end;\n    }\n    if (e_node) {\n      memset(opera_node->buff, 0xff, opera_node->len);\n    } else {\n      memcpy(opera_node->buff, (uint8_t *)opera_node->addr, opera_node->len);\n    }\n    memcpy(opera_node->buff + w_offs, buff, w_len);\n    opera_node->lock = false;\n    opera_node->next = mod_info->opera_info;\n    mod_info->opera_info = opera_node;\n    ret = 0;\n  }\n\n_func_end:\n  return ret;\n}\n\nbool _opera_flush(MODULE_INFO *mod_info, bool nosuspend) {\n  OPRA_INFO *cur_opera_info = NULL;\n  enum HAL_NORFLASH_RET_T result;\n  bool opera_is_completed = false;\n  NORFLASH_API_OPERA_RESULT opera_result;\n  bool ret = false;\n  bool suspend;\n\n#if defined(FLASH_SUSPEND)\n  suspend = true;\n#else\n  suspend = false;\n#endif\n  suspend = nosuspend == true ? false : suspend;\n\n  if (!mod_info->cur_opera_info) {\n    mod_info->cur_opera_info = _get_tail(mod_info, false);\n  }\n\n  if (!mod_info->cur_opera_info) {\n    return false;\n  }\n\n  ret = true;\n  cur_opera_info = mod_info->cur_opera_info;\n  if (cur_opera_info->type == NORFLASH_API_WRITTING) {\n    if (mod_info->state == NORFLASH_API_STATE_IDLE) {\n      suspend_number = 0;\n      if (cur_opera_info->w_len > 0) {\n        NORFLASH_API_TRACE(5,\n                           \"%s: %d,hal_norflash_write_suspend,addr = 0x%x,len \"\n                           \"= 0x%x,suspend = %d.\",\n                           __func__, __LINE__,\n                           cur_opera_info->addr + cur_opera_info->w_offs,\n                           cur_opera_info->w_len, suspend);\n\n        FLASH_REMAP_START(mod_info->dev_id,\n                          cur_opera_info->addr + cur_opera_info->w_offs,\n                          cur_opera_info->w_len);\n        pmu_flash_write_config();\n        result = hal_norflash_write_suspend(\n            mod_info->dev_id, cur_opera_info->addr + cur_opera_info->w_offs,\n            cur_opera_info->buff + cur_opera_info->w_offs,\n            cur_opera_info->w_len, suspend);\n        pmu_flash_read_config();\n        FLASH_REMAP_DONE(mod_info->dev_id,\n                         cur_opera_info->addr + cur_opera_info->w_offs,\n                         cur_opera_info->w_len);\n      } else {\n        result = HAL_NORFLASH_OK;\n      }\n\n      if (result == HAL_NORFLASH_OK) {\n        opera_is_completed = true;\n        goto __opera_is_completed;\n      } else if (result == HAL_NORFLASH_SUSPENDED) {\n        mod_info->state = NORFLASH_API_STATE_WRITTING_SUSPEND;\n      } else {\n        ASSERT(0, \"%s: %d, hal_norflash_write_suspend failed,result = %d\",\n               __func__, __LINE__, result);\n      }\n    } else if (mod_info->state == NORFLASH_API_STATE_WRITTING_SUSPEND) {\n      suspend_number++;\n      FLASH_REMAP_START(mod_info->dev_id,\n                        cur_opera_info->addr + cur_opera_info->w_offs,\n                        cur_opera_info->w_len);\n      pmu_flash_write_config();\n      result = hal_norflash_write_resume(mod_info->dev_id, suspend);\n      pmu_flash_read_config();\n      FLASH_REMAP_DONE(mod_info->dev_id,\n                       cur_opera_info->addr + cur_opera_info->w_offs,\n                       cur_opera_info->w_len);\n      if (result == HAL_NORFLASH_OK) {\n        opera_is_completed = true;\n        goto __opera_is_completed;\n      } else if (result == HAL_NORFLASH_SUSPENDED) {\n        mod_info->state = NORFLASH_API_STATE_WRITTING_SUSPEND;\n      } else {\n        ASSERT(0, \"%s: %d, hal_norflash_write_resume failed,result = %d\",\n               __func__, __LINE__, result);\n      }\n    } else {\n      ASSERT(0, \"%s: %d, mod_info->state error,state = %d\", __func__, __LINE__,\n             mod_info->state);\n    }\n  } else {\n    if (mod_info->state == NORFLASH_API_STATE_IDLE) {\n      suspend_number = 0;\n      NORFLASH_API_TRACE(5,\n                         \"%s: %d,hal_norflash_erase_suspend,addr = 0x%x,len = \"\n                         \"0x%x,suspend = %d.\",\n                         __func__, __LINE__, cur_opera_info->addr,\n                         cur_opera_info->len, suspend);\n      FLASH_REMAP_START(mod_info->dev_id, cur_opera_info->addr,\n                        cur_opera_info->len);\n      pmu_flash_write_config();\n      result = hal_norflash_erase_suspend(\n          mod_info->dev_id, cur_opera_info->addr, cur_opera_info->len, suspend);\n      pmu_flash_read_config();\n      FLASH_REMAP_DONE(mod_info->dev_id, cur_opera_info->addr,\n                       cur_opera_info->len);\n      if (result == HAL_NORFLASH_OK) {\n        opera_is_completed = true;\n        goto __opera_is_completed;\n      } else if (result == HAL_NORFLASH_SUSPENDED) {\n        mod_info->state = NORFLASH_API_STATE_ERASE_SUSPEND;\n      } else {\n        ASSERT(0, \"%s: %d, hal_norflash_erase_suspend failed,result = %d\",\n               __func__, __LINE__, result);\n      }\n    } else if (mod_info->state == NORFLASH_API_STATE_ERASE_SUSPEND) {\n      suspend_number++;\n      FLASH_REMAP_START(mod_info->dev_id, cur_opera_info->addr,\n                        cur_opera_info->len);\n      pmu_flash_write_config();\n      result = hal_norflash_erase_resume(mod_info->dev_id, suspend);\n      pmu_flash_read_config();\n      FLASH_REMAP_DONE(mod_info->dev_id, cur_opera_info->addr,\n                       cur_opera_info->len);\n      if (result == HAL_NORFLASH_OK) {\n        opera_is_completed = true;\n        goto __opera_is_completed;\n      } else if (result == HAL_NORFLASH_SUSPENDED) {\n        mod_info->state = NORFLASH_API_STATE_ERASE_SUSPEND;\n      } else {\n        ASSERT(0, \"%s: %d, hal_norflash_write_resume failed,result = %d\",\n               __func__, __LINE__, result);\n      }\n    } else {\n      ASSERT(0, \"%s: %d, mod_info->state error,state = %d\", __func__, __LINE__,\n             mod_info->state);\n    }\n  }\n\n__opera_is_completed:\n\n  if (opera_is_completed) {\n    mod_info->state = NORFLASH_API_STATE_IDLE;\n    if (!nosuspend && mod_info->cb_func &&\n        ((cur_opera_info->w_len > 0 &&\n          cur_opera_info->type == NORFLASH_API_WRITTING) ||\n         (cur_opera_info->len > 0 &&\n          cur_opera_info->type == NORFLASH_API_ERASING))) {\n      NORFLASH_API_TRACE(6,\n                         \"%s: w/e done.type = %d,addr = 0x%x,w_len = 0x%x,len \"\n                         \"= 0x%x,suspend_num = %d.\",\n                         __func__, cur_opera_info->type,\n                         cur_opera_info->addr + cur_opera_info->w_offs,\n                         cur_opera_info->w_len, cur_opera_info->len,\n                         suspend_number);\n      if (cur_opera_info->type == NORFLASH_API_WRITTING) {\n        opera_result.addr = cur_opera_info->addr + cur_opera_info->w_offs;\n        opera_result.len = cur_opera_info->w_len;\n      } else {\n        opera_result.addr = cur_opera_info->addr;\n        opera_result.len = cur_opera_info->len;\n      }\n      opera_result.type = cur_opera_info->type;\n      opera_result.result = NORFLASH_API_OK;\n      opera_result.remain_num = _get_ew_count(mod_info) - 1;\n      mod_info->cb_func(&opera_result);\n    }\n    _opera_del(mod_info, cur_opera_info);\n    mod_info->cur_opera_info = NULL;\n  }\n\n  return ret;\n}\n\nvoid _flush_disable(enum NORFLASH_API_USER user_id, uint32_t cb) {\n  norflash_api_info.allowed_cb[user_id] = (NOFLASH_API_FLUSH_ALLOWED_CB)cb;\n}\n\nvoid _flush_enable(enum NORFLASH_API_USER user_id) {\n  norflash_api_info.allowed_cb[user_id] = NULL;\n}\n\nbool _flush_is_allowed(void) {\n  bool ret = true;\n  uint32_t user_id;\n\n  for (user_id = NORFLASH_API_USER_CP; user_id < NORFLASH_API_USER_COUNTS;\n       user_id++) {\n    if (norflash_api_info.allowed_cb[user_id]) {\n      if (!norflash_api_info.allowed_cb[user_id]()) {\n        ret = false;\n      } else {\n        norflash_api_info.allowed_cb[user_id] = NULL;\n      }\n    }\n  }\n  return ret;\n}\n\n//-------------------------------------------------------------------\n// APIS Function.\n//-------------------------------------------------------------------\nenum NORFLASH_API_RET_T norflash_api_init(void) {\n  uint32_t i;\n\n  memset((void *)&norflash_api_info, 0, sizeof(NORFLASH_API_INFO));\n  norflash_api_info.cur_mod_id = NORFLASH_API_MODULE_ID_COUNT;\n  norflash_api_info.is_inited = true;\n  norflash_api_info.cur_mod = NULL;\n  for (i = 0; i < NORFLASH_API_MODULE_ID_COUNT; i++) {\n    norflash_api_info.mod_info[i].state = NORFLASH_API_STATE_UNINITED;\n  }\n\n#if !defined(FLASH_API_SIMPLE)\n#if defined(FLASH_SUSPEND)\n  hal_sleep_set_sleep_hook(HAL_SLEEP_HOOK_NORFLASH_API, norflash_api_flush);\n#else\n  hal_sleep_set_deep_sleep_hook(HAL_DEEP_SLEEP_HOOK_NORFLASH_API,\n                                norflash_api_flush);\n#endif\n#endif\n\n  return NORFLASH_API_OK;\n}\n\nenum NORFLASH_API_RET_T\nnorflash_api_register(enum NORFLASH_API_MODULE_ID_T mod_id,\n                      enum HAL_NORFLASH_ID_T dev_id, uint32_t mod_base_addr,\n                      uint32_t mod_len, uint32_t mod_block_len,\n                      uint32_t mod_sector_len, uint32_t mod_page_len,\n                      uint32_t buffer_len, NORFLASH_API_OPERA_CB cb_func) {\n  MODULE_INFO *mod_info = NULL;\n\n  NORFLASH_API_TRACE(\n      5, \"%s: mod_id = %d,dev_id = %d,mod_base_addr = 0x%x,mod_len = 0x%x,\",\n      __func__, mod_id, dev_id, mod_base_addr, mod_len);\n  NORFLASH_API_TRACE(4,\n                     \"mod_block_len = 0x%x,mod_sector_len = 0x%x,mod_page_len \"\n                     \"= 0x%x,buffer_len = 0x%x.\",\n                     mod_block_len, mod_sector_len, mod_page_len, buffer_len);\n  if (!norflash_api_info.is_inited) {\n    NORFLASH_API_TRACE(2, \"%s: %d, norflash_api uninit!\", __func__, __LINE__);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n\n  if (mod_id >= NORFLASH_API_MODULE_ID_COUNT) {\n    NORFLASH_API_TRACE(2, \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n    return NORFLASH_API_BAD_MOD_ID;\n  }\n\n  if (dev_id >= HAL_NORFLASH_ID_NUM) {\n    NORFLASH_API_TRACE(2, \"%s : dev_id error! mod_id = %d.\", __func__, dev_id);\n    return NORFLASH_API_BAD_DEV_ID;\n  }\n\n  if (buffer_len < mod_sector_len ||\n      !API_IS_ALIGN(buffer_len, mod_sector_len)) {\n    NORFLASH_API_TRACE(2, \"%s : buffer_len error buffer_len = %d.\", __func__,\n                       buffer_len);\n    return NORFLASH_API_BAD_BUFF_LEN;\n  }\n  mod_info = _get_module_info(mod_id);\n  if (mod_info->is_inited) {\n    // NORFLASH_API_TRACE(3,\"%s: %d, norflash_async[%d] has\n    // registered!\",__func__,__LINE__,mod_id);\n    return NORFLASH_API_OK; // NORFLASH_API_ERR_HASINIT;\n  }\n  mod_info->dev_id = dev_id;\n  mod_info->mod_id = mod_id;\n  mod_info->mod_base_addr = mod_base_addr;\n  mod_info->mod_len = mod_len;\n  mod_info->mod_block_len = mod_block_len;\n  mod_info->mod_sector_len = mod_sector_len;\n  mod_info->mod_page_len = mod_page_len;\n  mod_info->buff_len = buffer_len;\n  mod_info->cb_func = cb_func;\n  mod_info->opera_info = NULL;\n  mod_info->cur_opera_info = NULL;\n  mod_info->state = NORFLASH_API_STATE_IDLE;\n  mod_info->is_inited = true;\n  return NORFLASH_API_OK;\n}\n\nenum NORFLASH_API_RET_T norflash_api_read(enum NORFLASH_API_MODULE_ID_T mod_id,\n                                          uint32_t start_addr, uint8_t *buffer,\n                                          uint32_t len) {\n  MODULE_INFO *mod_info = NULL;\n  int32_t result;\n  enum NORFLASH_API_RET_T ret;\n  uint32_t lock;\n\n  NORFLASH_API_TRACE(4, \"%s:mod_id = %d,start_addr = 0x%x,len = 0x%x\", __func__,\n                     mod_id, start_addr, len);\n  ASSERT(buffer, \"%s:buffer is null! \", __func__);\n  if (!norflash_api_info.is_inited) {\n    NORFLASH_API_TRACE(1, \"%s: norflash_api uninit!\", __func__);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n  if (mod_id >= NORFLASH_API_MODULE_ID_COUNT) {\n    NORFLASH_API_TRACE(2, \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n    return NORFLASH_API_BAD_MOD_ID;\n  }\n\n  mod_info = _get_module_info(mod_id);\n  if (!mod_info->is_inited) {\n    NORFLASH_API_TRACE(2, \"%s : module unregistered! mod_id = %d.\", __func__,\n                       mod_id);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n\n  if (start_addr < mod_info->mod_base_addr ||\n      start_addr + len > mod_info->mod_base_addr + mod_info->mod_len) {\n    NORFLASH_API_TRACE(\n        3, \"%s : reading out of range! start_address = 0x%x,len = 0x%x.\",\n        __func__, start_addr, len);\n    return NORFLASH_API_BAD_ADDR;\n  }\n\n  if (len == 0) {\n    NORFLASH_API_TRACE(2, \"%s : len error! len = %d.\", __func__, len);\n    return NORFLASH_API_BAD_LEN;\n  }\n  lock = int_lock_global();\n  result = _opera_read(mod_info, start_addr, (uint8_t *)buffer, len);\n\n  if (result) {\n    ret = NORFLASH_API_ERR;\n  } else {\n    ret = NORFLASH_API_OK;\n  }\n  int_unlock_global(lock);\n  NORFLASH_API_TRACE(2, \"%s: done. ret = %d.\", __func__, ret);\n  return ret;\n}\n\nenum NORFLASH_API_RET_T norflash_sync_read(enum NORFLASH_API_MODULE_ID_T mod_id,\n                                           uint32_t start_addr, uint8_t *buffer,\n                                           uint32_t len) {\n  MODULE_INFO *mod_info = NULL;\n  uint32_t lock;\n\n  NORFLASH_API_TRACE(4, \"%s:mod_id = %d,start_addr = 0x%x,len = 0x%x\", __func__,\n                     mod_id, start_addr, len);\n  ASSERT(buffer, \"%s:%d,buffer is null! \", __func__, __LINE__);\n  if (!norflash_api_info.is_inited) {\n    NORFLASH_API_TRACE(1, \"%s: norflash_api uninit!\", __func__);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n  if (mod_id >= NORFLASH_API_MODULE_ID_COUNT) {\n    NORFLASH_API_TRACE(2, \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n    return NORFLASH_API_BAD_MOD_ID;\n  }\n\n  mod_info = _get_module_info(mod_id);\n  if (!mod_info->is_inited) {\n    NORFLASH_API_TRACE(2, \"%s : module unregistered! mod_id = %d.\", __func__,\n                       mod_id);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n\n  if (start_addr < mod_info->mod_base_addr ||\n      start_addr + len > mod_info->mod_base_addr + mod_info->mod_len) {\n    NORFLASH_API_TRACE(\n        3, \"%s : reading out of range! start_address = 0x%x,len = 0x%x.\",\n        __func__, start_addr, len);\n    return NORFLASH_API_BAD_ADDR;\n  }\n\n  if (len == 0) {\n    NORFLASH_API_TRACE(2, \"%s : len error! len = %d.\", __func__, len);\n    return NORFLASH_API_BAD_LEN;\n  }\n\n  lock = int_lock_global();\n  FLASH_REMAP_START(mod_info->dev_id, start_addr, len);\n  memcpy(buffer, (uint8_t *)start_addr, len);\n  FLASH_REMAP_DONE(mod_info->dev_id, start_addr, len);\n  NORFLASH_API_TRACE(1, \"%s: done.\", __func__);\n  int_unlock_global(lock);\n\n  return NORFLASH_API_OK;\n}\n\nenum NORFLASH_API_RET_T norflash_api_erase(enum NORFLASH_API_MODULE_ID_T mod_id,\n                                           uint32_t start_addr, uint32_t len,\n                                           bool async) {\n  MODULE_INFO *mod_info = NULL;\n  MODULE_INFO *cur_mod_info = NULL;\n  uint32_t lock;\n  int32_t result;\n  bool bresult = false;\n  enum NORFLASH_API_RET_T ret;\n\n  NORFLASH_API_TRACE(5,\n                     \"%s: mod_id = %d,start_addr = 0x%x,len = 0x%x,async = %d.\",\n                     __func__, mod_id, start_addr, len, async);\n  if (!norflash_api_info.is_inited) {\n    NORFLASH_API_TRACE(1, \"%s: norflash_api uninit!\", __func__);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n  if (mod_id >= NORFLASH_API_MODULE_ID_COUNT) {\n    NORFLASH_API_TRACE(2, \"%s : invalid mod_id! mod_id = %d.\", __func__,\n                       mod_id);\n    return NORFLASH_API_BAD_MOD_ID;\n  }\n\n  mod_info = _get_module_info(mod_id);\n  if (!mod_info->is_inited) {\n    NORFLASH_API_TRACE(2, \"%s : module unregistered! mod_id = %d.\", __func__,\n                       mod_id);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n\n  if (start_addr < mod_info->mod_base_addr ||\n      start_addr + len > mod_info->mod_base_addr + mod_info->mod_len) {\n    NORFLASH_API_TRACE(\n        3, \"%s : erase out of range! start_address = 0x%x,len = 0x%x.\",\n        __func__, start_addr, len);\n    return NORFLASH_API_BAD_ADDR;\n  }\n\n  if (!API_IS_ALIGN(start_addr, mod_info->mod_sector_len)) {\n    NORFLASH_API_TRACE(2,\n                       \"%s : start_address no alignment! start_address = %d.\",\n                       __func__, start_addr);\n    return NORFLASH_API_BAD_ADDR;\n  }\n\n  if (\n#ifdef PUYA_FLASH_ERASE_PAGE_ENABLE\n      len != mod_info->mod_page_len &&\n#endif\n      len != mod_info->mod_sector_len && len != mod_info->mod_block_len) {\n    NORFLASH_API_TRACE(2, \"%s : len error. len = %d!\", __func__, len);\n    return NORFLASH_API_BAD_LEN;\n  }\n\n#if defined(FLASH_API_SIMPLE)\n  async = false;\n#endif\n  if (async) {\n    lock = int_lock_global();\n\n    // add to opera_info chain header.\n    result = _e_opera_add(mod_info, start_addr, len);\n    if (result == 0) {\n      ret = NORFLASH_API_OK;\n    } else {\n      ret = NORFLASH_API_BUFFER_FULL;\n    }\n    int_unlock_global(lock);\n    NORFLASH_API_TRACE(\n        4, \"%s: _e_opera_add done. start_addr = 0x%x,len = 0x%x,ret = %d.\",\n        __func__, start_addr, len, ret);\n  } else {\n    lock = int_lock_global();\n    // Handle the suspend operation.\n    if (norflash_api_info.cur_mod != NULL &&\n        mod_info != norflash_api_info.cur_mod) {\n      cur_mod_info = norflash_api_info.cur_mod;\n      while (cur_mod_info->state != NORFLASH_API_STATE_IDLE) {\n        if (!_flush_is_allowed()) {\n          continue;\n        }\n        bresult = _opera_flush(cur_mod_info, true);\n        if (!bresult) {\n          norflash_api_info.cur_mod = NULL;\n        }\n      }\n    }\n\n    // flush all of cur module opera.\n    // norflash_api_info.cur_mod_id = mod_id;\n    do {\n      if (!_flush_is_allowed()) {\n        continue;\n      }\n      bresult = _opera_flush(mod_info, true);\n    } while (bresult);\n    FLASH_REMAP_START(mod_info->dev_id, start_addr, len);\n    pmu_flash_write_config();\n    result = hal_norflash_erase(mod_info->dev_id, start_addr, len);\n    pmu_flash_read_config();\n    FLASH_REMAP_DONE(mod_info->dev_id, start_addr, len);\n    if (result == HAL_NORFLASH_OK) {\n      ret = NORFLASH_API_OK;\n    } else if (result == HAL_NORFLASH_BAD_ADDR) {\n      ret = NORFLASH_API_BAD_ADDR;\n    } else if (result == HAL_NORFLASH_BAD_LEN) {\n      ret = NORFLASH_API_BAD_LEN;\n    } else {\n      ret = NORFLASH_API_ERR;\n    }\n    int_unlock_global(lock);\n    NORFLASH_API_TRACE(\n        4,\n        \"%s: hal_norflash_erase done. start_addr = 0x%x,len = 0x%x,ret = %d.\",\n        __func__, start_addr, len, ret);\n  }\n  // NORFLASH_API_TRACE(2,\"%s: done.ret = %d.\",__func__, ret);\n  return ret;\n}\n\nenum NORFLASH_API_RET_T norflash_api_write(enum NORFLASH_API_MODULE_ID_T mod_id,\n                                           uint32_t start_addr,\n                                           const uint8_t *buffer, uint32_t len,\n                                           bool async) {\n  MODULE_INFO *mod_info = NULL;\n  MODULE_INFO *cur_mod_info = NULL;\n  uint32_t lock;\n  int32_t result;\n  bool bresult = false;\n  enum NORFLASH_API_RET_T ret;\n\n  NORFLASH_API_TRACE(4, \"%s: mod_id = %d,start_addr = 0x%x,len = 0x%x.\",\n                     __func__, mod_id, start_addr, len);\n\n  if (!norflash_api_info.is_inited) {\n    NORFLASH_API_TRACE(1, \"%s: norflash_api uninit!\", __func__);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n\n  if (mod_id > NORFLASH_API_MODULE_ID_COUNT) {\n    NORFLASH_API_TRACE(2, \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n    return NORFLASH_API_BAD_MOD_ID;\n  }\n\n  mod_info = _get_module_info(mod_id);\n  if (!mod_info->is_inited) {\n    NORFLASH_API_TRACE(2, \"%s :module unregistered! mod_id = %d.\", __func__,\n                       mod_id);\n    return NORFLASH_API_ERR_UNINIT;\n  }\n\n  if (start_addr < mod_info->mod_base_addr ||\n      start_addr + len > mod_info->mod_base_addr + mod_info->mod_len) {\n    NORFLASH_API_TRACE(\n        3, \"%s : writting out of range! start_address = 0x%x,len = 0x%x.\",\n        __func__, mod_info->mod_base_addr, mod_info->mod_len);\n    return NORFLASH_API_BAD_ADDR;\n  }\n\n  if (len == 0) {\n    NORFLASH_API_TRACE(2, \"%s : len error! len = %d.\", __func__, len);\n    return NORFLASH_API_BAD_LEN;\n  }\n#if defined(FLASH_API_SIMPLE)\n  async = false;\n#endif\n  if (async) {\n    // add to opera_info chain header.\n    lock = int_lock_global();\n    result = _w_opera_add(mod_info, start_addr, len, (uint8_t *)buffer);\n    if (result == 0) {\n      ret = NORFLASH_API_OK;\n    } else {\n      ret = NORFLASH_API_BUFFER_FULL;\n    }\n    int_unlock_global(lock);\n    NORFLASH_API_TRACE(\n        4, \"%s: _w_opera_add done. start_addr = 0x%x,len = 0x%x,ret = %d.\",\n        __func__, start_addr, len, ret);\n  } else {\n    lock = int_lock_global();\n\n    // flush the opera of currently being processed.\n    if (norflash_api_info.cur_mod != NULL &&\n        mod_info != norflash_api_info.cur_mod) {\n      cur_mod_info = norflash_api_info.cur_mod;\n      while (cur_mod_info->state != NORFLASH_API_STATE_IDLE) {\n        if (!_flush_is_allowed()) {\n          continue;\n        }\n        bresult = _opera_flush(cur_mod_info, true);\n        if (!bresult) {\n          norflash_api_info.cur_mod = NULL;\n        }\n      }\n    }\n\n    // flush all of cur module opera.\n    do {\n      if (!_flush_is_allowed()) {\n        continue;\n      }\n      bresult = _opera_flush(mod_info, true);\n    } while (bresult);\n    FLASH_REMAP_START(mod_info->dev_id, start_addr, len);\n    pmu_flash_write_config();\n    result = hal_norflash_write(mod_info->dev_id, start_addr, buffer, len);\n    pmu_flash_read_config();\n    FLASH_REMAP_DONE(mod_info->dev_id, start_addr, len);\n    if (result == HAL_NORFLASH_OK) {\n      ret = NORFLASH_API_OK;\n    } else if (result == HAL_NORFLASH_BAD_ADDR) {\n      ret = NORFLASH_API_BAD_ADDR;\n    } else if (result == HAL_NORFLASH_BAD_LEN) {\n      ret = NORFLASH_API_BAD_LEN;\n    } else {\n      ret = NORFLASH_API_ERR;\n    }\n    int_unlock_global(lock);\n    NORFLASH_API_TRACE(\n        4,\n        \"%s: hal_norflash_write done. start_addr = 0x%x,len = 0x%x,ret = %d.\",\n        __func__, start_addr, len, ret);\n  }\n  return ret;\n}\n\n// -1: error, 0:all pending flash op flushed, 1:still pending flash op to be\n// flushed\nint norflash_api_flush(void) {\n  enum NORFLASH_API_MODULE_ID_T mod_id = NORFLASH_API_MODULE_ID_COUNT;\n  MODULE_INFO *mod_info = NULL;\n  uint32_t lock;\n  bool bret = false;\n\n  lock = int_lock_global();\n  if (!norflash_api_info.is_inited) {\n    NORFLASH_API_TRACE(1, \"%s: norflash_api uninit!\", __func__);\n    int_unlock_global(lock);\n    return -1;\n  }\n#if defined(FLASH_API_SIMPLE)\n  int_unlock_global(lock);\n  return 0;\n#endif\n\n  if (!_flush_is_allowed()) {\n    int_unlock_global(lock);\n    return 0;\n  }\n\n  mod_info = _get_cur_mod();\n  if (!mod_info) {\n    int_unlock_global(lock);\n    return 0;\n  }\n  mod_id = _get_mod_id(mod_info);\n\n  norflash_api_info.cur_mod_id = mod_id;\n  norflash_api_info.cur_mod = mod_info;\n  bret = _opera_flush(mod_info, false);\n  if (!bret) {\n    norflash_api_info.cur_mod = NULL;\n  }\n  int_unlock_global(lock);\n\n  return 1;\n}\n\nbool norflash_api_buffer_is_free(enum NORFLASH_API_MODULE_ID_T mod_id) {\n  MODULE_INFO *mod_info = NULL;\n  uint32_t count;\n\n  if (mod_id >= NORFLASH_API_MODULE_ID_COUNT) {\n    ASSERT(0, \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n  }\n\n  mod_info = _get_module_info(mod_id);\n  if (!mod_info->is_inited) {\n    ASSERT(0, \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n  }\n\n  count = _get_ew_count(mod_info);\n  if (count > 0) {\n    return false;\n  } else {\n    return true;\n  }\n}\n\nuint32_t\nnorflash_api_get_used_buffer_count(enum NORFLASH_API_MODULE_ID_T mod_id,\n                                   enum NORFLASH_API_OPRATION_TYPE type) {\n  MODULE_INFO *mod_info = NULL;\n  uint32_t count = 0;\n\n  if (mod_id >= NORFLASH_API_MODULE_ID_COUNT) {\n    ASSERT(0, \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n  }\n\n  mod_info = _get_module_info(mod_id);\n  if (!mod_info->is_inited) {\n    ASSERT(0, \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n  }\n  if (type & NORFLASH_API_WRITTING) {\n    count = _get_w_count(mod_info);\n  }\n\n  if (type & NORFLASH_API_ERASING) {\n    count += _get_e_count(mod_info);\n  }\n  return count;\n}\n\nuint32_t\nnorflash_api_get_free_buffer_count(enum NORFLASH_API_OPRATION_TYPE type) {\n  MODULE_INFO *mod_info = NULL;\n  uint32_t i;\n  uint32_t used_count = 0;\n  uint32_t free_count = 0;\n\n  if (type & NORFLASH_API_WRITTING) {\n    for (i = NORFLASH_API_MODULE_ID_LOG_DUMP; i < NORFLASH_API_MODULE_ID_COUNT;\n         i++) {\n      mod_info = _get_module_info((enum NORFLASH_API_MODULE_ID_T)i);\n      if (mod_info->is_inited) {\n        used_count += _get_w_count(mod_info);\n      }\n    }\n    ASSERT(used_count <= NORFLASH_API_OPRA_LIST_LEN,\n           \"writting opra count error!\");\n    free_count += (NORFLASH_API_OPRA_LIST_LEN - used_count);\n  }\n\n  if (type & NORFLASH_API_ERASING) {\n    for (i = NORFLASH_API_MODULE_ID_LOG_DUMP; i < NORFLASH_API_MODULE_ID_COUNT;\n         i++) {\n      mod_info = _get_module_info((enum NORFLASH_API_MODULE_ID_T)i);\n      if (mod_info->is_inited) {\n        used_count += _get_e_count(mod_info);\n      }\n    }\n    ASSERT(used_count <= NORFLASH_API_OPRA_LIST_LEN, \"erase opra count error!\");\n    free_count += (NORFLASH_API_OPRA_LIST_LEN - used_count);\n  }\n  return free_count;\n}\n\nvoid norflash_api_flush_all(void) {\n  int ret;\n  int cnt = 0;\n\n  norflash_api_flush_enable_all();\n  do {\n    ret = norflash_api_flush();\n    if (ret == 1) {\n      cnt++;\n    }\n  } while (1 == ret);\n\n  NORFLASH_API_TRACE(2, \"%s: done. cnt = %d.\", __func__, cnt);\n}\n\nvoid norflash_api_flush_disable(enum NORFLASH_API_USER user_id, uint32_t cb) {\n  if (!norflash_api_info.is_inited) {\n    return;\n  }\n  ASSERT(user_id < NORFLASH_API_USER_COUNTS, \"%s: user_id(%d) error!\", __func__,\n         user_id);\n  _flush_disable(user_id, cb);\n}\n\nvoid norflash_api_flush_enable(enum NORFLASH_API_USER user_id) {\n  if (!norflash_api_info.is_inited) {\n    return;\n  }\n  ASSERT(user_id < NORFLASH_API_USER_COUNTS, \"%s: user_id(%d) too large!\",\n         __func__, user_id);\n  _flush_enable(user_id);\n}\n\nvoid norflash_api_flush_enable_all(void) {\n  uint32_t user_id;\n\n  if (!norflash_api_info.is_inited) {\n    return;\n  }\n  for (user_id = NORFLASH_API_USER_CP; user_id < NORFLASH_API_USER_COUNTS;\n       user_id++) {\n    _flush_enable((enum NORFLASH_API_USER)user_id);\n  }\n}\n\nenum NORFLASH_API_STATE\nnorflash_api_get_state(enum NORFLASH_API_MODULE_ID_T mod_id) {\n  ASSERT(mod_id < NORFLASH_API_MODULE_ID_COUNT,\n         \"%s : mod_id error! mod_id = %d.\", __func__, mod_id);\n  return norflash_api_info.mod_info[mod_id].state;\n}\n\nvoid norflash_flush_all_pending_op(void) { norflash_api_flush_all(); }\n\nvoid app_flush_pending_flash_op(enum NORFLASH_API_MODULE_ID_T module,\n                                enum NORFLASH_API_OPRATION_TYPE type) {\n  hal_trace_pause();\n  do {\n    norflash_api_flush();\n    if (NORFLASH_API_ALL != type) {\n      if (0 == norflash_api_get_used_buffer_count(module, type)) {\n        break;\n      }\n    } else {\n      if (norflash_api_buffer_is_free(module)) {\n        break;\n      }\n    }\n    osDelay(10);\n  } while (1);\n\n  hal_trace_continue();\n}\n\nvoid app_flash_page_erase(enum NORFLASH_API_MODULE_ID_T module,\n                          uint32_t flashOffset) {\n  // check whether the flash has been erased\n  bool isEmptyPage = true;\n  uint32_t *ptrStartFlashAddr = (uint32_t *)(FLASH_NC_BASE + flashOffset);\n  for (uint32_t index = 0; index < FLASH_SECTOR_SIZE / sizeof(uint32_t);\n       index++) {\n    if (0xFFFFFFFF != ptrStartFlashAddr[index]) {\n      isEmptyPage = false;\n      break;\n    }\n  }\n\n  if (isEmptyPage) {\n    return;\n  }\n\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret;\n\n  flashOffset &= 0xFFFFFF;\n  do {\n    lock = int_lock_global();\n    hal_trace_pause();\n    ret = norflash_api_erase(module, (FLASH_NC_BASE + flashOffset),\n                             FLASH_SECTOR_SIZE, true);\n    hal_trace_continue();\n    int_unlock_global(lock);\n\n    if (NORFLASH_API_OK == ret) {\n      TRACE(1, \"%s: norflash_api_erase ok!\", __func__);\n      break;\n    } else if (NORFLASH_API_BUFFER_FULL == ret) {\n      TRACE(0, \"Flash async cache overflow! To flush it.\");\n      app_flush_pending_flash_op(module, NORFLASH_API_ERASING);\n    } else {\n      ASSERT(0, \"%s: norflash_api_erase failed. ret = %d\", __FUNCTION__, ret);\n    }\n  } while (1);\n}\n\nvoid app_flash_page_program(enum NORFLASH_API_MODULE_ID_T module,\n                            uint32_t flashOffset, uint8_t *ptr, uint32_t len,\n                            bool synWrite) {\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret;\n  bool is_async = false;\n\n  flashOffset &= 0xFFFFFF;\n\n  if (synWrite) {\n    is_async = false;\n  } else {\n    is_async = true;\n  }\n\n  do {\n    lock = int_lock_global();\n    hal_trace_pause();\n\n    ret = norflash_api_write(module, (FLASH_NC_BASE + flashOffset), ptr, len,\n                             is_async);\n\n    hal_trace_continue();\n\n    int_unlock_global(lock);\n\n    if (NORFLASH_API_OK == ret) {\n      TRACE(1, \"%s: norflash_api_write ok!\", __func__);\n      break;\n    } else if (NORFLASH_API_BUFFER_FULL == ret) {\n      TRACE(0, \"Flash async cache overflow! To flush it.\");\n      app_flush_pending_flash_op(module, NORFLASH_API_WRITTING);\n    } else {\n      ASSERT(0, \"%s: norflash_api_write failed. ret = %d\", __FUNCTION__, ret);\n    }\n  } while (1);\n}\n"
  },
  {
    "path": "services/norflash_api/norflash_api.h",
    "content": "#ifndef  _NORFLASH_ASYNC_API_H_\n#define _NORFLASH_ASYNC_API_H_\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_norflash.h\"\n\n#define FLASH_SECTOR_SIZE          4096\n\nenum NORFLASH_API_MODULE_ID_T\n{\n    NORFLASH_API_MODULE_ID_LOG_DUMP,\n    NORFLASH_API_MODULE_ID_USERDATA,\n    NORFLASH_API_MODULE_ID_OTA,\n    NORFLASH_API_MODULE_ID_OTA_UPGRADE_LOG,\n    NORFLASH_API_MODULE_ID_FREE,\n    NORFLASH_API_MODULE_ID_CRASH_DUMP,\n    NORFLASH_API_MODULE_ID_COREDUMP,\n    NORFLASH_API_MODULE_ID_FACTORY,\n    NORFLASH_API_MODULE_ID_HOTWORD_MODEL,\n    NORFLASH_API_MODULE_ID_USERDATA_EXT,\n    NORFLASH_API_MODULE_ID_INTERACTION_OTA,\n    NORFLASH_API_MODULE_ID_GMA_OTA,\n    NORFLASH_API_MODULE_ID_COUNT,\n};\n\nenum NORFLASH_API_RET_T\n{\n    NORFLASH_API_OK,\n    NORFLASH_API_BUFFER_FULL,\n    NORFLASH_API_BAD_DEV_ID,\n    NORFLASH_API_BAD_MOD_ID,\n    NORFLASH_API_BAD_BUFF_LEN,\n    NORFLASH_API_BAD_ADDR,\n    NORFLASH_API_BAD_LEN,\n    NORFLASH_API_ERR_UNINIT,\n    NORFLASH_API_ERR_HASINIT,\n    NORFLASH_API_ERR,\n};\n\nenum NORFLASH_API_OPRATION_TYPE\n{\n    NORFLASH_API_WRITTING = 0x01,\n    NORFLASH_API_ERASING = 0x02,\n    NORFLASH_API_ALL    = 0x03\n};\n\n\ntypedef struct\n{\n    enum NORFLASH_API_OPRATION_TYPE type;\n    uint32_t addr;\n    uint32_t len;\n    uint32_t remain_num;\n    enum NORFLASH_API_RET_T result;\n}NORFLASH_API_OPERA_RESULT;\n\nenum NORFLASH_API_STATE\n{\n    NORFLASH_API_STATE_UNINITED,\n    NORFLASH_API_STATE_IDLE,\n    NORFLASH_API_STATE_WRITTING,\n    NORFLASH_API_STATE_WRITTING_SUSPEND,\n    NORFLASH_API_STATE_WRITTING_RESUME,\n    NORFLASH_API_STATE_ERASE,\n    NORFLASH_API_STATE_ERASE_SUSPEND,\n    NORFLASH_API_STATE_ERASE_RESUME,\n};\n\nenum NORFLASH_API_USER\n{\n    NORFLASH_API_USER_CP,\n    NORFLASH_API_USER_COUNTS,\n};\n\ntypedef void (* NORFLASH_API_OPERA_CB)(void* opera_result);\ntypedef bool (*NOFLASH_API_FLUSH_ALLOWED_CB)(void);\n\ntypedef struct _opera_info\n{\n    enum NORFLASH_API_OPRATION_TYPE type;\n    uint32_t addr;\n    uint32_t len;\n    uint32_t w_offs;\n    uint32_t w_len;\n    uint8_t *buff;\n    bool lock;\n    struct _opera_info *next;\n}OPRA_INFO;\n\n\ntypedef struct\n{\n    bool is_inited;\n    enum HAL_NORFLASH_ID_T dev_id;\n    enum NORFLASH_API_MODULE_ID_T mod_id;\n    uint32_t mod_base_addr;\n    uint32_t mod_len;\n    uint32_t mod_block_len;\n    uint32_t mod_sector_len;\n    uint32_t mod_page_len;\n    uint32_t buff_len;\n    NORFLASH_API_OPERA_CB cb_func;\n    OPRA_INFO *opera_info;\n    OPRA_INFO *cur_opera_info;\n    enum NORFLASH_API_STATE state;\n}MODULE_INFO;\n\ntypedef struct\n{\n    bool is_inited;\n    MODULE_INFO mod_info[NORFLASH_API_MODULE_ID_COUNT];\n    enum NORFLASH_API_MODULE_ID_T cur_mod_id;\n    MODULE_INFO* cur_mod;\n    NOFLASH_API_FLUSH_ALLOWED_CB allowed_cb[NORFLASH_API_USER_COUNTS];\n}NORFLASH_API_INFO;\n\n#if defined(FLASH_API_SIMPLE)\n#define NORFLASH_API_WRITE_BUFF_LEN   (0)\n#endif\n#if defined(FLASH_API_HIGHPERFORMANCE)\n#define NORFLASH_API_WRITE_BUFF_LEN   (4)\n#endif\n#if defined(FLASH_API_NORMAL)\n#define NORFLASH_API_WRITE_BUFF_LEN   (1)\n#endif\n#define NORFLASH_API_OPRA_LIST_LEN   (NORFLASH_API_WRITE_BUFF_LEN + 1)*3\n#define NORFLASH_API_SECTOR_SIZE     4096\n\ntypedef struct\n{\n    bool is_used;\n    OPRA_INFO opera_info;\n}OPERA_INFO_LIST;\n\ntypedef struct\n{\n    bool is_used;\n    uint8_t buffer[NORFLASH_API_SECTOR_SIZE];\n}DATA_LIST;\n\nenum NORFLASH_API_RET_T norflash_api_init(void);\n\nenum NORFLASH_API_RET_T norflash_api_register(\n                enum NORFLASH_API_MODULE_ID_T mod_id,\n                enum HAL_NORFLASH_ID_T dev_id,\n                uint32_t mod_base_addr,\n                uint32_t mod_len,\n                uint32_t mod_block_len,\n                uint32_t mod_sector_len,\n                uint32_t mod_page_len,\n                uint32_t buffer_len,\n                NORFLASH_API_OPERA_CB cb_func\n                );\n\n// read flash buffer or flash,priority read flash buffer.\nenum NORFLASH_API_RET_T norflash_api_read(\n                enum NORFLASH_API_MODULE_ID_T mod_id,\n                uint32_t start_addr,\n                uint8_t *buffer,\n                uint32_t len\n                );\n\n// read flash.\nenum NORFLASH_API_RET_T norflash_sync_read(\n                enum NORFLASH_API_MODULE_ID_T mod_id,\n                uint32_t start_addr,\n                uint8_t *buffer,\n                uint32_t len\n                );\n\nenum NORFLASH_API_RET_T norflash_api_erase(\n                enum NORFLASH_API_MODULE_ID_T mod_id,\n                uint32_t start_addr,\n                uint32_t len,\n                bool async\n                );\n\nenum NORFLASH_API_RET_T norflash_api_write(\n                enum NORFLASH_API_MODULE_ID_T mod_id,\n                uint32_t start_addr,\n                const uint8_t *buffer,\n                uint32_t len,\n                bool async\n                );\n\nint norflash_api_flush(void);\n\nbool norflash_api_buffer_is_free(\n                enum NORFLASH_API_MODULE_ID_T mod_id);\n\nuint32_t norflash_api_get_used_buffer_count(\n                enum NORFLASH_API_MODULE_ID_T mod_id,\n                enum NORFLASH_API_OPRATION_TYPE type\n                );\n\nuint32_t norflash_api_get_free_buffer_count(\n                enum NORFLASH_API_OPRATION_TYPE type\n                );\nvoid norflash_api_flush_all(void);\nvoid norflash_api_flush_disable(enum NORFLASH_API_USER user_id,uint32_t cb);\nvoid norflash_api_flush_enable(enum NORFLASH_API_USER user_id);\nvoid norflash_api_flush_enable_all(void);\nenum NORFLASH_API_STATE norflash_api_get_state(enum NORFLASH_API_MODULE_ID_T mod_id);\n\nvoid norflash_flush_all_pending_op(void);\n\nvoid app_flush_pending_flash_op(enum NORFLASH_API_MODULE_ID_T module,\n                                enum NORFLASH_API_OPRATION_TYPE type);\n\nvoid app_flash_page_erase(enum NORFLASH_API_MODULE_ID_T module, uint32_t flashOffset);\n\nvoid app_flash_page_program(enum NORFLASH_API_MODULE_ID_T module, \n                             uint32_t flashOffset,\n                             uint8_t *ptr,\n                             uint32_t len,\n                             bool synWrite);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif //_NORFLASH_ASYNC_API_H_\n"
  },
  {
    "path": "services/nv_section/Makefile",
    "content": "obj-y := aud_section/\nobj-y += customparam_section/\nobj-y += log_section/\nobj-y += factory_section/\n\nobj-y += userdata_section/"
  },
  {
    "path": "services/nv_section/aud_section/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-I$(obj)/../../nv_section/aud_section \\\n\t-I$(obj)/../../nv_section/include \\\n\t-Iutils/crc32\n"
  },
  {
    "path": "services/nv_section/aud_section/aud_section.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"aud_section.h\"\n#include \"cmsis.h\"\n#include \"crc32.h\"\n#include \"hal_norflash.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n#include \n#ifdef __ARMCC_VERSION\n#include \"link_sym_armclang.h\"\n#endif\n\nextern uint32_t __aud_start[];\n\n#ifndef ANC_COEF_LIST_NUM\n#define ANC_COEF_LIST_NUM 0\n#endif\n\n#define MAGIC_NUMBER 0xBE57\n#define USERDATA_VERSION 0x0001\n\nstatic uint32_t section_device_length[AUDIO_SECTION_DEVICE_NUM] = {\n    AUDIO_SECTION_LENGTH_ANC,\n    AUDIO_SECTION_LENGTH_AUDIO,\n    AUDIO_SECTION_LENGTH_SPEECH,\n};\n\nstatic uint32_t audio_section_get_device_addr_offset(uint32_t device) {\n  ASSERT(device < AUDIO_SECTION_DEVICE_NUM,\n         \"[%s] device(%d) >= AUDIO_SECTION_DEVICE_NUM\", __func__, device);\n\n  uint32_t addr_offset = 0;\n\n  for (uint32_t i = 0; i < device; i++) {\n    addr_offset += section_device_length[i];\n  }\n\n  return addr_offset;\n}\n\nstatic audio_section_t *audio_section_get_device_ptr(uint32_t device) {\n  uint8_t *section_ptr = (uint8_t *)__aud_start;\n  section_ptr += audio_section_get_device_addr_offset(device);\n\n  return (audio_section_t *)section_ptr;\n}\n\nint audio_section_store_cfg(uint32_t device, uint8_t *cfg, uint32_t len) {\n  audio_section_t *section_ptr = (audio_section_t *)cfg;\n  uint32_t addr_start = 0;\n  uint32_t crc = 0;\n\n  section_ptr->head.magic = MAGIC_NUMBER;\n  section_ptr->head.version = USERDATA_VERSION;\n  section_ptr->device = device;\n  section_ptr->cfg_len = len;\n\n  // calculate crc\n  crc = crc32(0, (unsigned char *)section_ptr + AUDIO_SECTION_CFG_RESERVED_LEN,\n              len - AUDIO_SECTION_CFG_RESERVED_LEN);\n  section_ptr->head.crc = crc;\n\n  addr_start =\n      (uint32_t)__aud_start + audio_section_get_device_addr_offset(device);\n\n#ifdef AUDIO_SECTION_DEBUG\n  TRACE(2, \"[%s] len = %d\", __func__, len);\n  TRACE(2, \"[%s] addr_start = 0x%x\", __func__, addr_start);\n  TRACE(2, \"[%s] block length = 0x%x\", __func__, section_device_length[device]);\n#endif\n\n  // FIXME: CHECK return value\n  enum HAL_NORFLASH_RET_T flash_opt_res;\n  uint32_t flag = int_lock();\n  flash_opt_res = hal_norflash_erase(HAL_NORFLASH_ID_0, addr_start,\n                                     section_device_length[device]);\n  int_unlock(flag);\n\n  if (flash_opt_res) {\n    TRACE(2, \"[%s] ERROR: erase flash res = %d\", __func__, flash_opt_res);\n    return flash_opt_res;\n  }\n\n  flag = int_lock();\n  flash_opt_res = hal_norflash_write(HAL_NORFLASH_ID_0, addr_start,\n                                     (uint8_t *)section_ptr, len);\n  int_unlock(flag);\n\n  if (flash_opt_res) {\n    TRACE(2, \"[%s] ERROR: write flash res = %d\", __func__, flash_opt_res);\n    return flash_opt_res;\n  }\n\n#ifdef AUDIO_SECTION_DEBUG\n  TRACE(1, \"********************[%s]********************\", __func__);\n  TRACE(1, \"magic:       0x%x\", section_ptr->head.magic);\n  TRACE(1, \"version:     0x%x\", section_ptr->head.version);\n  TRACE(1, \"crc:         0x%x\", section_ptr->head.crc);\n  TRACE(1, \"device:      %d\", section_ptr->device);\n  TRACE(1, \"cfg_len:    %d\", section_ptr->cfg_len);\n  TRACE(0, \"********************END********************\");\n#endif\n\n  // audio_section_t *section_read_ptr = audio_section_get_device_ptr(device);\n  // check\n\n  return 0;\n}\n\nint audio_section_load_cfg(uint32_t device, uint8_t *cfg, uint32_t len) {\n  audio_section_t *section_ptr = audio_section_get_device_ptr(device);\n  uint32_t crc = 0;\n\n#ifdef AUDIO_SECTION_DEBUG\n  TRACE(1, \"********************[%s]********************\", __func__);\n  TRACE(1, \"magic:       0x%x\", section_ptr->head.magic);\n  TRACE(1, \"version:     0x%x\", section_ptr->head.version);\n  TRACE(1, \"crc:         0x%x\", section_ptr->head.crc);\n  TRACE(1, \"device:      %d\", section_ptr->device);\n  TRACE(1, \"cfg_len:    %d\", section_ptr->cfg_len);\n  TRACE(0, \"********************END********************\");\n#endif\n\n  if (section_ptr->head.magic != MAGIC_NUMBER) {\n    TRACE(3, \"[%s] WARNING: Different magic number (%x != %x)\", __func__,\n          section_ptr->head.magic, MAGIC_NUMBER);\n    return -1;\n  }\n\n  // Calculate crc and check crc value\n  crc = crc32(0, (unsigned char *)section_ptr + AUDIO_SECTION_CFG_RESERVED_LEN,\n              len - AUDIO_SECTION_CFG_RESERVED_LEN);\n\n  if (section_ptr->head.crc != crc) {\n    TRACE(3, \"[%s] WARNING: Different crc (%x != %x)\", __func__,\n          section_ptr->head.crc, crc);\n    return -2;\n  }\n\n  if (section_ptr->device != device) {\n    TRACE(3, \"[%s] WARNING: Different device (%d != %d)\", __func__,\n          section_ptr->device, device);\n    return -3;\n  }\n\n  if (section_ptr->cfg_len != len) {\n    TRACE(3, \"[%s] WARNING: Different length (%d != %d)\", __func__,\n          section_ptr->cfg_len, len);\n    return -4;\n  }\n\n  memcpy(cfg, section_ptr, len);\n\n  return 0;\n}\n\nint anccfg_loadfrom_audsec(const struct_anc_cfg *list[],\n                           const struct_anc_cfg *list_44p1k[], uint32_t count) {\n#ifdef PROGRAMMER\n\n  return 1;\n\n#else // !PROGRAMMER\n\n#ifdef CHIP_BEST1000\n  ASSERT(0, \"[%s] Can not support anc load in this branch!!!\", __func__);\n#else\n  unsigned int re_calc_crc, i;\n  const pctool_aud_section *audsec_ptr;\n\n  audsec_ptr = (pctool_aud_section *)__aud_start;\n  TRACE(3, \"0x%x,0x%x,0x%x\", audsec_ptr->sec_head.magic,\n        audsec_ptr->sec_head.version, audsec_ptr->sec_head.crc);\n  if (audsec_ptr->sec_head.magic != aud_section_magic) {\n    TRACE(0, \"Invalid aud section - magic\");\n    return 1;\n  }\n  re_calc_crc = crc32(0, (unsigned char *)&(audsec_ptr->sec_body),\n                      sizeof(audsec_body) - 4);\n  if (re_calc_crc != audsec_ptr->sec_head.crc) {\n    TRACE(0, \"crc verify failure, invalid aud section.\");\n    return 1;\n  }\n  TRACE(0, \"Valid aud section.\");\n  for (i = 0; i < ANC_COEF_LIST_NUM; i++)\n    list[i] =\n        (struct_anc_cfg *)&(audsec_ptr->sec_body.anc_config.anc_config_arr[i]\n                                .anc_cfg[PCTOOL_SAMPLERATE_48X8K]);\n#if (AUD_SECTION_STRUCT_VERSION == 3)\n  for (i = 0; i < ANC_COEF_LIST_NUM; i++)\n    list_44p1k[i] =\n        (struct_anc_cfg *)&(audsec_ptr->sec_body.anc_config.anc_config_arr[i]\n                                .anc_cfg[PCTOOL_SAMPLERATE_48X8K]);\n#else\n  for (i = 0; i < ANC_COEF_LIST_NUM; i++)\n    list_44p1k[i] =\n        (struct_anc_cfg *)&(audsec_ptr->sec_body.anc_config.anc_config_arr[i]\n                                .anc_cfg[PCTOOL_SAMPLERATE_44_1X8K]);\n#endif\n#endif\n\n  return 0;\n\n#endif // !PROGRAMMER\n}\n"
  },
  {
    "path": "services/nv_section/aud_section/aud_section.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __aud_section_h__\n#define __aud_section_h__\n\n#include \"section_def.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define aud_section_debug\n#ifdef aud_section_debug\n#define aud_trace     TRACE\n#else\n#define aud_trace(...)\n#endif\n#include \"hal_aud.h\"\n#define audsec_tag  \"audsec_tag\"\n\n#define aud_section_magic               0xdad1\n#define aud_section_struct_version      1\n\n#define AUD_COEF_LEN        (500)\n#if (AUD_SECTION_STRUCT_VERSION == 1)\n#define AUD_IIR_NUM         (6)\n#elif (AUD_SECTION_STRUCT_VERSION == 2)\n#define AUD_IIR_NUM         (8)\n#elif (AUD_SECTION_STRUCT_VERSION == 3)\n#define AUD_IIR_NUM         (8)\n#else\n#error \"Can not support this version!!!\"\n#endif\n\ntypedef struct _anc_rir_coefs {\n    int32_t coef_b[3];\n\tint32_t coef_a[3];\n} anc_iir_coefs;\n\ntypedef struct _aud_item {\n    int32_t     total_gain;\n\n    uint16_t   iir_bypass_flag;\n    uint16_t   iir_counter;\n    anc_iir_coefs   iir_coef[AUD_IIR_NUM];\n\n#if (AUD_SECTION_STRUCT_VERSION == 1)\n    uint16_t    fir_bypass_flag;\n    uint16_t    fir_len;\n    int16_t     fir_coef[AUD_COEF_LEN];\n    int8_t      pos_tab[16];\n#elif (AUD_SECTION_STRUCT_VERSION == 2)\n    int32_t     reserved_for_drc[32];\n#elif (AUD_SECTION_STRUCT_VERSION == 3)\n\n#endif\n    int16_t     reserved1;\n    int8_t      dac_gain_offset; // in qdb (quater of dB)\n    int8_t      adc_gain_offset; // in qdb (quater of dB)\n} aud_item;\n\ntypedef struct {\n#if (AUD_SECTION_STRUCT_VERSION == 1)\n\taud_item anc_cfg_ff_l;\n  \taud_item anc_cfg_ff_r;\n   \taud_item anc_cfg_fb_l;\n  \taud_item anc_cfg_fb_r;\n#elif (AUD_SECTION_STRUCT_VERSION == 2)\n\taud_item anc_cfg_ff_l;\n  \taud_item anc_cfg_ff_r;\n   \taud_item anc_cfg_fb_l;\n  \taud_item anc_cfg_fb_r;\n\n   \taud_item anc_cfg_tt_l;\n  \taud_item anc_cfg_tt_r;\n   \taud_item anc_cfg_mc_l;\n  \taud_item anc_cfg_mc_r;\n#elif (AUD_SECTION_STRUCT_VERSION == 3)\n\taud_item anc_cfg_ff_l;\n   \taud_item anc_cfg_fb_l;\n   \taud_item anc_cfg_tt_l;\n   \taud_item anc_cfg_mc_l;\n#endif\n\n} struct_anc_cfg;\n\nenum ANC_INDEX {\n    ANC_INDEX_0 = 0,\n    ANC_INDEX_1,\n    ANC_INDEX_2,\n    ANC_INDEX_3,\n    ANC_INDEX_TOTAL,\n};\n\ntypedef struct {\n    unsigned char anc_ver[16];\n    unsigned char batch_info[16];\n    unsigned char serial[16];\n} anc_ident;\n\nenum auditem_sample_enum_t {\n#if (AUD_SECTION_STRUCT_VERSION == 3)\n    PCTOOL_SAMPLERATE_48X8K,\n#else\n    PCTOOL_SAMPLERATE_44_1X8K,\n    PCTOOL_SAMPLERATE_48X8K,\n    PCTOOL_SAMPLERATE_50_7X8K = PCTOOL_SAMPLERATE_48X8K,\n#endif\n    PCTOOL_AUDITEM_SAMPLERATE_COUNT\n};\n\ntypedef struct {\n    struct_anc_cfg    anc_cfg[PCTOOL_AUDITEM_SAMPLERATE_COUNT];\n} pctool_struct_anc_cfg;\n\n#if (AUD_SECTION_STRUCT_VERSION == 3)\n#define PCTOOL_ANC_APPMODE_COUNT      15\n#define ANC_SECTIONE_SIZE      (16*1024)\n#else\n#define PCTOOL_ANC_APPMODE_COUNT      4\n#define ANC_SECTIONE_SIZE      (64*1024)\n#endif\n\ntypedef struct {\n    pctool_struct_anc_cfg anc_config_arr[PCTOOL_ANC_APPMODE_COUNT];\n} pctool_anc_config_t;\n\n#define PCTOOL_AUDSEC_RESERVED_LEN (ANC_SECTIONE_SIZE -sizeof(section_head_t) - sizeof(anc_ident) - sizeof(pctool_anc_config_t))\n\ntypedef struct {\n    anc_ident               ancIdent;\n    pctool_anc_config_t   anc_config;\n    unsigned char           reserved[PCTOOL_AUDSEC_RESERVED_LEN];\n} audsec_body;\n\ntypedef struct {\n    section_head_t  sec_head;\n    audsec_body     sec_body;\n} pctool_aud_section;\n\ntypedef struct {\n    uint8_t     io_pin;\n    uint8_t     set_flag;\n} pctool_iocfg;\n/*\ntypedef struct{\n    uint8_t digmic_ck_iomux_pin;\n    uint8_t digmic_d0_iomux_pin;\n    uint8_t digmic_d1_iomux_pin;\n    uint8_t digmic_d2_iomux_pin;\n    uint8_t digmic_phase;\n}digital_mic_cfg;\n*/\n\n// Add audio and speech support\n#define AUDIO_SECTION_DEBUG\n\n// Device\n#define AUDIO_SECTION_DEVICE_ANC            (0)\n#define AUDIO_SECTION_DEVICE_AUDIO          (1)\n#define AUDIO_SECTION_DEVICE_SPEECH         (2)\n#define AUDIO_SECTION_DEVICE_NUM            (3)\n\n// If add device, need add length to section_device_length\n#define AUDIO_SECTION_LENGTH_ANC            (1024*8)\n#define AUDIO_SECTION_LENGTH_AUDIO          (1024*8)\n#define AUDIO_SECTION_LENGTH_SPEECH         (1024*8)\n\n#define AUDIO_SECTION_CFG_RESERVED_LEN      (sizeof(audio_section_t))\n\ntypedef struct {\n    section_head_t      head;\n    uint32_t            device;\n    uint32_t            cfg_len;\n} audio_section_t;\n\n// README: Important!!!!!!\n// App cfg struecture must define reserved like follow:\n// typedef struct {\n//     uint8_t         reserved[AUDIO_SECTION_CFG_RESERVED_LEN];\n//     custom_cfg_t    custom_cfg;\n// } audio_section_custom_cfg_t;\n\nint audio_section_store_cfg(uint32_t device, uint8_t *cfg, uint32_t len);\nint audio_section_load_cfg(uint32_t device, uint8_t *cfg, uint32_t len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/nv_section/aud_section/aud_section_inc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __aud_section_inc_h__\n#define __aud_section_inc_h__\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"aud_section.h\"\n\nint anccfg_loadfrom_audsec(const struct_anc_cfg *list[], const struct_anc_cfg *list_44p1k[], uint32_t count);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n\n"
  },
  {
    "path": "services/nv_section/customparam_section/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-I$(obj)/../../nv_section/customparam_section \\\n\t-I$(obj)/../../nv_section/include \\\n\t-I$(obj)/../platform/cmsis/inc\t\\\n\t-Iutils/crc32 \n"
  },
  {
    "path": "services/nv_section/customparam_section/customparam_section.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"customparam_section.h\"\n#include \"hal_trace.h\"\n#include \n#include \n\nextern uint32_t __custom_parameter_start[];\n\nstatic uint8_t isCustomParamSectionValid = false;\n\nvoid nv_custom_parameter_section_init(void) {\n  isCustomParamSectionValid = false;\n\n  if (CUSTOMPARAM_MAGIC_CODE ==\n      ((CUSTOM_PARAM_SECTION_HEADER_T *)__custom_parameter_start)->magic_code) {\n    // check whether the length is correct\n    uint8_t *startLogicAddr = (uint8_t *)__custom_parameter_start;\n\n    CUSTOM_PARAM_SECTION_HEADER_T *pSectoinHeader =\n        (CUSTOM_PARAM_SECTION_HEADER_T *)startLogicAddr;\n\n    uint32_t totalDataLen =\n        OFFSETOF(CUSTOM_PARAM_SECTION_HEADER_T, entryCount) +\n        pSectoinHeader->length;\n\n    if (totalDataLen > CUSTOMPARAM_SECTION_SIZE) {\n      return;\n    }\n\n    uint32_t offset = sizeof(CUSTOM_PARAM_SECTION_HEADER_T);\n    for (uint32_t entry = 0; entry < pSectoinHeader->entryCount; entry++) {\n      CUSTOM_PARAM_ENTRY_HEADER_T *pEntryHeader =\n          (CUSTOM_PARAM_ENTRY_HEADER_T *)((uint8_t *)__custom_parameter_start +\n                                          offset);\n      offset += (sizeof(CUSTOM_PARAM_ENTRY_HEADER_T) + pEntryHeader->paramLen);\n      if (offset > CUSTOMPARAM_SECTION_SIZE) {\n        return;\n      }\n    }\n\n    isCustomParamSectionValid = true;\n\n    uint8_t serialNumber[CUSTOM_PARAM_SERIAL_NUM_LEN];\n    uint32_t serialNumParamLen = 0;\n    bool isSuccessfullyLoaded = nv_custom_parameter_section_get_entry(\n        CUSTOM_PARAM_SERIAL_NUM_INDEX, serialNumber, &serialNumParamLen);\n    if (isSuccessfullyLoaded) {\n      TRACE(0, \"Serial number is:\");\n      DUMP8(\"%02x \", serialNumber, sizeof(serialNumber));\n    }\n  }\n}\n\nbool nv_custom_parameter_section_get_entry(uint16_t paramIndex,\n                                           uint8_t *pParamVal,\n                                           uint32_t *pParamLen) {\n  if (isCustomParamSectionValid) {\n    uint8_t *startLogicAddr = (uint8_t *)__custom_parameter_start;\n\n    CUSTOM_PARAM_SECTION_HEADER_T *pSectoinHeader =\n        (CUSTOM_PARAM_SECTION_HEADER_T *)startLogicAddr;\n\n    uint32_t offset = sizeof(CUSTOM_PARAM_SECTION_HEADER_T);\n    for (uint32_t entry = 0; entry < pSectoinHeader->entryCount; entry++) {\n      CUSTOM_PARAM_ENTRY_HEADER_T *pEntryHeader =\n          (CUSTOM_PARAM_ENTRY_HEADER_T *)((uint8_t *)__custom_parameter_start +\n                                          offset);\n      if (paramIndex == pEntryHeader->paramIndex) {\n        memcpy(pParamVal,\n               ((uint8_t *)pEntryHeader) + sizeof(CUSTOM_PARAM_ENTRY_HEADER_T),\n               pEntryHeader->paramLen);\n        *pParamLen = pEntryHeader->paramLen;\n        return true;\n      }\n      offset += (sizeof(CUSTOM_PARAM_ENTRY_HEADER_T) + pEntryHeader->paramLen);\n    }\n  }\n\n  return false;\n}\n\n#if defined(BISTO_ENABLED) || defined(GFPS_ENABLED)\nuint32_t Get_ModelId(void) {\n  uint8_t Model_ID[CUSTOM_PARAM_Model_ID_LEN];\n  uint32_t ModelIdValue, Model_ID_ParamLen = 0;\n  if (nv_custom_parameter_section_get_entry(CUSTOM_PARAM_Mode_ID_INDEX,\n                                            Model_ID, &Model_ID_ParamLen)) {\n    ModelIdValue = (Model_ID[0] << 16) | (Model_ID[1] << 8) | Model_ID[2];\n    TRACE(1, \"Model id is :0x%08x\\n\", ModelIdValue);\n    return ModelIdValue;\n  }\n  return 0;\n}\n#endif\n"
  },
  {
    "path": "services/nv_section/customparam_section/customparam_section.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __CUSTOMPARAM_SECTION_H__\n#define __CUSTOMPARAM_SECTION_H__\n#include \n#include \n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n// Could be customized\n#define CUSTOMPARAM_MAGIC_CODE 0x54534542\n#define CUSTOMPARAM_VERSION 1\n\n#define CUSTOMPARAM_SECTION_SIZE 4096 // one flash page\n\ntypedef struct {\n  uint32_t magic_code; // fixed value as CUSTOMPARAM_MAGIC_CODE\n  uint16_t version;\n  uint16_t length; // length in bytes of the following data in the section\n  uint16_t entryCount;\n  // following are parameter entries\n\n} __attribute__((packed)) CUSTOM_PARAM_SECTION_HEADER_T;\n\ntypedef struct {\n  uint16_t paramIndex;\n  uint16_t paramLen;\n  // following are the parameter content with length paramLen\n} __attribute__((packed)) CUSTOM_PARAM_ENTRY_HEADER_T;\n\n#define CUSTOM_PARAM_Mode_ID_INDEX 0\n#define CUSTOM_PARAM_Model_ID_LEN 3\n\n#define CUSTOM_PARAM_SERIAL_NUM_INDEX 0\n#define CUSTOM_PARAM_SERIAL_NUM_LEN 16\ntypedef struct {\n  uint8_t sn[CUSTOM_PARAM_SERIAL_NUM_LEN];\n} CUSTOM_PARAM_SERIAL_NUM_T;\n\n// TODO:\n// Add your own custom parameters here\n\nvoid nv_custom_parameter_section_init(void);\nbool nv_custom_parameter_section_get_entry(uint16_t paramIndex,\n                                           uint8_t *pParamVal,\n                                           uint32_t *pParamLen);\nuint32_t Get_ModelId(void);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/nv_section/factory_section/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-Iplatform/cmsis/inc \\\n\t-Iplatform/hal \\\n\t-Iplatform/drivers/ana \\\n\t-Iutils/heap \\\n\t-Iutils/crc32 \\\n\t-Iservices/norflash_api\n\n"
  },
  {
    "path": "services/nv_section/factory_section/factory_section.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"factory_section.h\"\n#include \"cmsis.h\"\n#include \"crc32.h\"\n#include \"hal_norflash.h\"\n#include \"hal_trace.h\"\n#include \"heap_api.h\"\n#include \"norflash_api.h\"\n#include \"plat_types.h\"\n#include \"pmu.h\"\n#include \"string.h\"\n#include \"tgt_hardware.h\"\n\nextern uint32_t __factory_start[];\nextern uint32_t __factory_end[];\n\nstatic factory_section_t *factory_section_p = NULL;\nstatic uint8_t nv_record_dev_rev = nvrec_current_version;\n\n#ifndef BTIF_BD_ADDR_SIZE\n#define BTIF_BD_ADDR_SIZE 6\n#endif\nstatic void factory_callback(void *param) {\n  NORFLASH_API_OPERA_RESULT *opera_result;\n\n  opera_result = (NORFLASH_API_OPERA_RESULT *)param;\n\n  TRACE(5, \"%s:type = %d, addr = 0x%x,len = 0x%x,result = %d.\", __func__,\n        opera_result->type, opera_result->addr, opera_result->len,\n        opera_result->result);\n}\n\nvoid factory_section_init(void) {\n  enum NORFLASH_API_RET_T result;\n  uint32_t sector_size = 0;\n  uint32_t block_size = 0;\n  uint32_t page_size = 0;\n\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, &block_size, §or_size,\n                        &page_size);\n  result = norflash_api_register(\n      NORFLASH_API_MODULE_ID_FACTORY, HAL_NORFLASH_ID_0,\n      ((uint32_t)__factory_start) & 0x00FFFFFF,\n      (uint32_t)__factory_end - (uint32_t)__factory_start, block_size,\n      sector_size, page_size, FACTORY_SECTOR_SIZE, factory_callback);\n  ASSERT(result == NORFLASH_API_OK,\n         \"nv_record_init: module register failed! result = %d.\", result);\n}\n\nint factory_section_open(void) {\n  factory_section_p = (factory_section_t *)__factory_start;\n\n  if (factory_section_p->head.magic != nvrec_dev_magic) {\n    factory_section_p = NULL;\n    return -1;\n  }\n  if ((factory_section_p->head.version < nvrec_mini_version) ||\n      (factory_section_p->head.version > nvrec_current_version)) {\n    factory_section_p = NULL;\n    return -1;\n  }\n\n  nv_record_dev_rev = factory_section_p->head.version;\n\n  if (1 == nv_record_dev_rev) {\n    if (factory_section_p->head.crc !=\n        crc32(0, (unsigned char *)(&(factory_section_p->head.reserved0)),\n              sizeof(factory_section_t) - 2 - 2 - 4 -\n                  (5 + 63 + 2 + 2 + 2 + 1 + 8) * sizeof(int))) {\n      factory_section_p = NULL;\n      return -1;\n    }\n\n    memcpy(bt_addr, factory_section_p->data.bt_address, BTIF_BD_ADDR_SIZE);\n    memcpy(ble_addr, factory_section_p->data.ble_address, BTIF_BD_ADDR_SIZE);\n    TRACE(2, \"%s sucess btname:%s\", __func__,\n          factory_section_p->data.device_name);\n  } else {\n    // check the data length\n    if (((uint32_t)(&((factory_section_t *)0)->data.rev2_reserved0) +\n         factory_section_p->data.rev2_data_len) > 4096) {\n      TRACE(1, \"nv rec dev data len %d has exceeds the facory sector size!.\",\n            factory_section_p->data.rev2_data_len);\n      return -1;\n    }\n\n    if (factory_section_p->data.rev2_crc !=\n        crc32(0, (unsigned char *)(&(factory_section_p->data.rev2_reserved0)),\n              factory_section_p->data.rev2_data_len)) {\n      factory_section_p = NULL;\n      return -1;\n    }\n\n    memcpy(bt_addr, factory_section_p->data.rev2_bt_addr, BTIF_BD_ADDR_SIZE);\n    memcpy(ble_addr, factory_section_p->data.rev2_ble_addr, BTIF_BD_ADDR_SIZE);\n    TRACE(2, \"%s sucess btname:%s\", __func__,\n          (char *)factory_section_p->data.rev2_bt_name);\n  }\n\n  DUMP8(\"%02x \", bt_addr, 6);\n  DUMP8(\"%02x \", ble_addr, 6);\n  return 0;\n}\n\nuint8_t *factory_section_get_bt_address(void) {\n  if (factory_section_p) {\n    if (1 == nv_record_dev_rev) {\n      return (uint8_t *)&(factory_section_p->data.bt_address);\n    } else {\n      return (uint8_t *)&(factory_section_p->data.rev2_bt_addr);\n    }\n  } else {\n    return NULL;\n  }\n}\n\nuint8_t *factory_section_get_bt_name(void) {\n  if (factory_section_p) {\n    if (1 == nv_record_dev_rev) {\n      return (uint8_t *)&(factory_section_p->data.device_name);\n    } else {\n      return (uint8_t *)&(factory_section_p->data.rev2_bt_name);\n    }\n  } else {\n    return (uint8_t *)BT_LOCAL_NAME;\n  }\n}\n\nuint8_t *factory_section_get_ble_name(void) {\n  if (factory_section_p) {\n    if (1 == nv_record_dev_rev) {\n      return (uint8_t *)BLE_DEFAULT_NAME;\n    } else {\n      return (uint8_t *)&(factory_section_p->data.rev2_ble_name);\n    }\n  } else {\n    return (uint8_t *)BLE_DEFAULT_NAME;\n  }\n}\n\nuint32_t factory_section_get_version(void) {\n  if (factory_section_p) {\n    return nv_record_dev_rev;\n  }\n\n  return 0;\n}\n\nint factory_section_xtal_fcap_get(unsigned int *xtal_fcap) {\n  if (factory_section_p) {\n    if (1 == nv_record_dev_rev) {\n      *xtal_fcap = factory_section_p->data.xtal_fcap;\n    } else {\n      *xtal_fcap = factory_section_p->data.rev2_xtal_fcap;\n    }\n    return 0;\n  } else {\n    return -1;\n  }\n}\n\nint factory_section_xtal_fcap_set(unsigned int xtal_fcap) {\n  uint8_t *mempool = NULL;\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret;\n\n  if (factory_section_p) {\n    TRACE(1, \"factory_section_xtal_fcap_set:%d\", xtal_fcap);\n    syspool_init();\n    syspool_get_buff((uint8_t **)&mempool, 0x1000);\n    memcpy(mempool, factory_section_p, 0x1000);\n    if (1 == nv_record_dev_rev) {\n      ((factory_section_t *)mempool)->data.xtal_fcap = xtal_fcap;\n      ((factory_section_t *)mempool)->head.crc = crc32(\n          0,\n          (unsigned char *)(&(((factory_section_t *)mempool)->head.reserved0)),\n          sizeof(factory_section_t) - 2 - 2 - 4);\n    } else {\n      ((factory_section_t *)mempool)->data.rev2_xtal_fcap = xtal_fcap;\n      ((factory_section_t *)mempool)->data.rev2_crc =\n          crc32(0, (unsigned char *)(&(factory_section_p->data.rev2_reserved0)),\n                factory_section_p->data.rev2_data_len);\n    }\n    lock = int_lock_global();\n\n    ret = norflash_api_erase(NORFLASH_API_MODULE_ID_FACTORY,\n                             (uint32_t)(__factory_start)&0x00FFFFFF, 0x1000,\n                             false);\n    ASSERT(ret == NORFLASH_API_OK,\n           \"factory_section_xtal_fcap_set: erase failed! ret = %d.\", ret);\n    ret = norflash_api_write(NORFLASH_API_MODULE_ID_FACTORY,\n                             (uint32_t)(__factory_start)&0x00FFFFFF,\n                             (uint8_t *)mempool, 0x1000, false);\n    ASSERT(ret == NORFLASH_API_OK,\n           \"factory_section_xtal_fcap_set: write failed! ret = %d.\", ret);\n\n    int_unlock_global(lock);\n\n    return 0;\n  } else {\n    return -1;\n  }\n}\n\nvoid factory_section_original_btaddr_get(uint8_t *btAddr) {\n  if (factory_section_p) {\n    TRACE(0, \"get factory_section_p\");\n    if (1 == nv_record_dev_rev) {\n      memcpy(btAddr, factory_section_p->data.bt_address, BTIF_BD_ADDR_SIZE);\n    } else {\n      memcpy(btAddr, factory_section_p->data.rev2_bt_addr, BTIF_BD_ADDR_SIZE);\n    }\n  } else {\n    TRACE(0, \"get bt_addr\");\n    memcpy(btAddr, bt_addr, BTIF_BD_ADDR_SIZE);\n  }\n}\n"
  },
  {
    "path": "services/nv_section/factory_section/factory_section.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __FACTORY_SECTIONS_H__\n#define __FACTORY_SECTIONS_H__\n#include \n#include \n#include \"plat_types.h\"\n\n#define ALIGN4 __attribute__((aligned(4)))\n#define nvrec_mini_version 1\n#define nvrec_dev_magic 0xba80\n#define nvrec_current_version 2\n#define FACTORY_SECTOR_SIZE 4096\ntypedef struct {\n  unsigned short magic;\n  unsigned short version;\n  unsigned int crc;\n  unsigned int reserved0;\n  unsigned int reserved1;\n} section_head_t;\n\ntypedef struct {\n  unsigned char device_name[248 + 1] ALIGN4;\n  unsigned char bt_address[8] ALIGN4;\n  unsigned char ble_address[8] ALIGN4;\n  unsigned char tester_address[8] ALIGN4;\n  unsigned int xtal_fcap ALIGN4;\n  unsigned int rev1_data_len;\n\n  unsigned int rev2_data_len;\n  unsigned int rev2_crc;\n  unsigned int rev2_reserved0;\n  unsigned int rev2_reserved1;\n  unsigned int rev2_bt_name[63];\n  unsigned int rev2_bt_addr[2];\n  unsigned int rev2_ble_addr[2];\n  unsigned int rev2_dongle_addr[2];\n  unsigned int rev2_xtal_fcap;\n  unsigned int rev2_ble_name[8];\n} factory_section_data_t;\n\ntypedef struct {\n  section_head_t head;\n  factory_section_data_t data;\n} factory_section_t;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid factory_section_init(void);\nint factory_section_open(void);\nvoid factory_section_original_btaddr_get(uint8_t *btAddr);\nint factory_section_xtal_fcap_get(unsigned int *xtal_fcap);\nint factory_section_xtal_fcap_set(unsigned int xtal_fcap);\nuint8_t *factory_section_get_bt_address(void);\nuint8_t *factory_section_get_bt_name(void);\nuint8_t *factory_section_get_ble_name(void);\nuint32_t factory_section_get_version(void);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/nv_section/include/section_def.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __section_def_h__\n#define __section_def_h__\n\n#include \"stdint.h\"\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct {\n    uint16_t magic;\n    uint16_t version;\n    uint32_t crc;\n    uint32_t reserved0;\n    uint32_t reserved1;\n} section_head_t;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/nv_section/log_section/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-Iutils/crc32 \\\n\t-Iutils/heap \\\n\t-Iplatform/drivers/ana \\\n\t-Iservices/norflash_api \n\nifeq ($(TRACE_DUMP2FLASH),1)\nccflags-y += -DTRACE_DUMP2FLASH\nendif\n\nifeq ($(TRACE_CRLF),1)\nccflags-y += -DTRACE_CRLF\nendif\n\n"
  },
  {
    "path": "services/nv_section/log_section/coredump_section.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \n#include \n\n#include \"cmsis.h\"\n#include \"coredump_section.h\"\n#include \"hal_norflash.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"norflash_api.h\"\n\n/*\nUsage:\narm-none-eabi-gdb elf_file -ex \"target remote | ./tools/bins/lin64/CrashDebug\n--elf elf_file --dump coredump.dat\"\n*/\n\nextern uint32_t __coredump_section_start;\nextern uint32_t __coredump_section_end;\n\nstatic const uint32_t coredump_flash_start_addr =\n    (uint32_t)&__coredump_section_start;\nstatic const uint32_t coredump_flash_end_addr =\n    (uint32_t)&__coredump_section_end;\nstatic uint32_t coredump_flash_addr_offset =\n    (uint32_t)&__coredump_section_start;\n\nvoid coredump_to_flash_init() {\n  uint32_t block_size = 0;\n  uint32_t sector_size = 0;\n  uint32_t page_size = 0;\n  uint32_t buffer_len = 0;\n  enum NORFLASH_API_RET_T result;\n\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, &block_size, §or_size,\n                        &page_size);\n  buffer_len = COREDUMP_SECTOR_SIZE;\n  TRACE(4,\n        \"%s: coredump_flash_start_addr = 0x%x, coredump_flash_end_addr = 0x%x, \"\n        \"buff_len = 0x%x.\",\n        __func__, coredump_flash_start_addr, coredump_flash_end_addr,\n        buffer_len);\n\n  result = norflash_api_register(\n      NORFLASH_API_MODULE_ID_COREDUMP, HAL_NORFLASH_ID_0,\n      coredump_flash_start_addr,\n      coredump_flash_end_addr - coredump_flash_start_addr, block_size,\n      sector_size, page_size, buffer_len, NULL);\n\n  if (result == NORFLASH_API_OK) {\n    TRACE(0, \"coredump_to_flash_init ok.\");\n  } else {\n    TRACE(1, \"coredump_to_flash_init failed,result = %d.\", result);\n  }\n}\n\nvoid core_dump_erase_section() {\n  // erase whole core dump section\n  enum NORFLASH_API_RET_T ret = 0;\n  uint32_t lock;\n  do {\n    lock = int_lock_global();\n    ret = norflash_api_erase(NORFLASH_API_MODULE_ID_COREDUMP,\n                             coredump_flash_addr_offset, COREDUMP_SECTOR_SIZE,\n                             false);\n    int_unlock_global(lock);\n    if (ret != NORFLASH_API_OK) {\n      TRACE(3, \"%s:offset = 0x%x,ret = %d.\", __func__,\n            coredump_flash_addr_offset, ret);\n    }\n    coredump_flash_addr_offset += COREDUMP_SECTOR_SIZE;\n    if (coredump_flash_addr_offset == coredump_flash_end_addr) {\n      coredump_flash_addr_offset = coredump_flash_start_addr;\n      break;\n    }\n  } while (1);\n}\n\nint32_t core_dump_write_large(const uint8_t *ptr, uint32_t len) {\n  enum NORFLASH_API_RET_T ret;\n  uint32_t write_len;\n  uint32_t remain_len = len;\n  uint32_t lock;\n  // TRACE(4,\"%s offset = 0x%x ptr = 0x%x len=0x%x\",__func__,\n  // coredump_flash_addr_offset, ptr, len);\n  do {\n    if (coredump_flash_addr_offset % COREDUMP_SECTOR_SIZE != 0) {\n      write_len = COREDUMP_SECTOR_SIZE -\n                  (coredump_flash_addr_offset -\n                   (coredump_flash_addr_offset & ~COREDUMP_SECTOR_SIZE_MASK));\n      lock = int_lock_global();\n      ret =\n          norflash_api_write(NORFLASH_API_MODULE_ID_COREDUMP,\n                             coredump_flash_addr_offset, ptr, write_len, false);\n      int_unlock_global(lock);\n      if (ret != NORFLASH_API_OK) {\n        TRACE(4, \"%s: addr = 0x%x,write_len = 0x%x,ret = %d.\", __func__,\n              coredump_flash_addr_offset, write_len, ret);\n        return (int32_t)ret;\n      }\n      coredump_flash_addr_offset += write_len;\n      ptr += write_len;\n      remain_len -= write_len;\n    }\n\n    if (remain_len < COREDUMP_SECTOR_SIZE) {\n      lock = int_lock_global();\n      ret = norflash_api_write(NORFLASH_API_MODULE_ID_COREDUMP,\n                               coredump_flash_addr_offset, ptr, remain_len,\n                               false);\n      int_unlock_global(lock);\n      if (ret != NORFLASH_API_OK) {\n        TRACE(4, \"%s: addr = 0x%x,remain_len = 0x%x,ret = %d.\", __func__,\n              coredump_flash_addr_offset, remain_len, ret);\n        return (int32_t)ret;\n      }\n      coredump_flash_addr_offset += remain_len;\n      ptr += remain_len;\n      remain_len = 0;\n    } else {\n      lock = int_lock_global();\n      ret = norflash_api_write(NORFLASH_API_MODULE_ID_COREDUMP,\n                               coredump_flash_addr_offset, ptr,\n                               COREDUMP_SECTOR_SIZE, false);\n      int_unlock_global(lock);\n      if (ret != NORFLASH_API_OK) {\n        TRACE(3, \"%s: addr = 0x%x,ret = %d.\", __func__,\n              coredump_flash_addr_offset, ret);\n        return (int32_t)ret;\n      }\n      coredump_flash_addr_offset += COREDUMP_SECTOR_SIZE;\n      ptr += COREDUMP_SECTOR_SIZE;\n      remain_len -= COREDUMP_SECTOR_SIZE;\n    }\n  } while (remain_len > 0);\n  // TRACE(3,\"%s offset = 0x%x ptr = 0x%x\",__func__, coredump_flash_addr_offset,\n  // ptr);\n  return 0;\n}\n\nint32_t core_dump_write(const uint8_t *ptr, uint32_t len) {\n  enum NORFLASH_API_RET_T ret;\n  uint32_t i;\n  uint32_t lock;\n  // TRACE(2,\"%s: len = 0x%x\", __func__,len);\n  // write by byte to avoid cross flash sector boundary\n  for (i = 0; i < len; i++) {\n    lock = int_lock_global();\n    ret = norflash_api_write(NORFLASH_API_MODULE_ID_COREDUMP,\n                             coredump_flash_addr_offset++, ptr++, 1, false);\n    int_unlock_global(lock);\n    if (ret != NORFLASH_API_OK) {\n      TRACE(4, \"%s: offset = 0x%x ret = %d ch =%02x\", __func__,\n            coredump_flash_addr_offset, ret, *(ptr - 1));\n    }\n  }\n  return 0;\n}\n"
  },
  {
    "path": "services/nv_section/log_section/coredump_section.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef _COREDUMP_SECTION_H\n#define _COREDUMP_SECTION_H\n#define COREDUMP_SECTOR_SIZE             0x1000\n#define COREDUMP_SECTOR_SIZE_MASK        0xFFF\n#define COREDUMP_BUFFER_LEN              (COREDUMP_SECTOR_SIZE*2)\n#define COREDUMP_NORFALSH_BUFFER_LEN     (COREDUMP_BUFFER_LEN)\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nvoid coredump_to_flash_init();\nvoid core_dump_erase_section();\nint32_t core_dump_write_large(const uint8_t* ptr,uint32_t len);\nint32_t core_dump_write(const uint8_t* ptr,uint32_t len);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/nv_section/log_section/crash_dump_section.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if 0\n#include \"crash_dump_section.h\"\n#include \"cmsis.h\"\n\n#if defined(CRASH_DUMP_SECTION_SIZE) && (CRASH_DUMP_SECTION_SIZE > 0)\n\n#include \"hal_bootmode.h\"\n#include \"hal_norflash.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"heap_api.h\"\n#include \"pmu.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n\nextern uint32_t __crash_dump_start[];\nextern uint32_t __crash_dump_end[];\n\nextern const char sys_build_info[];\n\n#define DUMPED_MSP_BYTES 32\n#define DUMPED_PSP_BYTES 32\n\n// #undef CRASH_DUMP_SECTION_SIZE\n\n#define CRASH_DUMP_FRAME_NUM                                                   \\\n  (((uint32_t)__crash_dump_end - (uint32_t)__crash_dump_start) /               \\\n   CRASH_DUMP_FRAME_SIZE)\n\n#ifdef TRACE_CRLF\n#define NEW_LINE_STR \"\\r\\n\"\n#else\n#define NEW_LINE_STR \"\\n\"\n#endif\n\nstatic struct CRASH_OUTPUT_BUF_T *crash_dump_section_p = NULL;\nstatic struct CRASH_OUTPUT_BUF_T *crash_output_p = NULL;\nstatic bool crash_dump_init = false;\n\nstatic uint8_t isCrashHappened = false;\nstatic uint8_t isCrashDumpExisting = false;\n\nstatic void crashdump_dump_output(const unsigned char *buf, unsigned int buf_len)\n{\n    if (crash_dump_init){\n        if ((crash_output_p->hdr.bufpos+buf_len) <= OFFSETOF(struct CRASH_OUTPUT_BUF_T, buf)){\n            memcpy(crash_output_p->buf+crash_output_p->hdr.bufpos, buf, buf_len);\n            crash_output_p->hdr.bufpos += buf_len;\n        }else{\n            memcpy(crash_output_p->buf+crash_output_p->hdr.bufpos, buf, OFFSETOF(struct CRASH_OUTPUT_BUF_T, buf)-crash_output_p->hdr.bufpos);\n            crash_output_p->hdr.bufpos += OFFSETOF(struct CRASH_OUTPUT_BUF_T, buf)-crash_output_p->hdr.bufpos;\n        }\n    }\n}\n\nint crashdump_get_empty_section(uint32_t *seqnum, struct CRASH_OUTPUT_BUF_T **crash_dump_addr)\n{\n    struct CRASH_OUTPUT_BUF_T *p;\n    int32_t lastWrittenIndex = -1, index = 0;\n    int32_t max = -1;\n\n    for (p = (struct CRASH_OUTPUT_BUF_T *)__crash_dump_start; p < (struct CRASH_OUTPUT_BUF_T *)__crash_dump_end; p++){\n        // TRACE(2,\"magic code is 0x%x seqnum is 0x%x\", p->magicCode, (uint32_t)(p->seqnum));\n\n        if ((CRASH_DUMP_MAGIC_CODE == p->hdr.magicCode) && (0xffffffff != (uint32_t)(p->hdr.seqnum)))\n        {\n            if (max < p->hdr.seqnum){\n                max = p->hdr.seqnum;\n                lastWrittenIndex = index;\n            }\n        }\n\n        index++;\n    }\n\n    if (-1 != lastWrittenIndex)\n    {\n        crashdump_set_existing_flag(true);\n        TRACE(1,\"The last written dump log is at index %d\", lastWrittenIndex);\n        lastWrittenIndex++;\n        if (lastWrittenIndex == (((uint32_t)__crash_dump_end-(uint32_t)__crash_dump_start)/sizeof(struct CRASH_OUTPUT_BUF_T)))\n        {\n            lastWrittenIndex = 0;\n        }\n\n        *crash_dump_addr = (struct CRASH_OUTPUT_BUF_T *)((uint32_t)__crash_dump_start +\n            lastWrittenIndex*sizeof(struct CRASH_OUTPUT_BUF_T));\n        *seqnum = max+1;\n    }\n    else\n    {\n        crashdump_set_existing_flag(false);\n        TRACE(0,\"No dump log saved yet!\");\n        *seqnum = 0;\n        *crash_dump_addr = (struct CRASH_OUTPUT_BUF_T *)__crash_dump_start;\n    }\n\n\n    TRACE(1,\"Next crash dump addr 0x%x\", *crash_dump_addr);\n    return 0;\n}\n\nvoid crashdump_flush_buffer(void)\n{\n    uint32_t sent_cnt;\n    uint32_t send_frame_size;\n    const uint32_t max_frame_size = 256;\n\n    sent_cnt = 0;\n    while (sent_cnt < crash_output_p->hdr.bufpos) {\n        send_frame_size = crash_output_p->hdr.bufpos - sent_cnt;\n        if (send_frame_size > max_frame_size) {\n            send_frame_size = max_frame_size;\n        }\n\n        TRACE_FLUSH();\n        TRACE_OUTPUT(crash_output_p->buf + sent_cnt, send_frame_size);\n        TRACE_FLUSH();\n        sent_cnt += send_frame_size;\n    }\n}\n\nint crashdump_init(void)\n{\n    const char separate_line[] = NEW_LINE_STR \"----------------------------------------\" NEW_LINE_STR;\n    uint32_t dump_section_idx;\n    int len;\n    char crash_buf[100];\n\n    if (crash_dump_init)\n        return 0;\n\n    crash_dump_init = true;\n\n    hal_sw_bootmode_set(HAL_SW_BOOTMODE_REBOOT_FLASH_FLUSH);\n\n    crashdump_get_empty_section(&dump_section_idx, &crash_dump_section_p);\n\n    syspool_init();\n    syspool_get_buff((uint8_t **)&crash_output_p, sizeof(struct CRASH_OUTPUT_BUF_T));\n    crash_output_p->hdr.bufpos = 0;\n\n    crash_output_p->hdr.magicCode = CRASH_DUMP_MAGIC_CODE;\n    crash_output_p->hdr.seqnum = dump_section_idx;\n    crash_output_p->hdr.partnum = CRASH_DUMP_FRAME_NUM;\n    crashdump_dump_output((unsigned char *)separate_line, sizeof(separate_line) - 1);\n    len = snprintf(crash_buf, sizeof(crash_buf), \"%08lX/%08lX\" NEW_LINE_STR, crash_output_p->hdr.seqnum, crash_output_p->hdr.partnum);\n    crashdump_dump_output((unsigned char *)crash_buf, len);\n    crashdump_dump_output((unsigned char *)sys_build_info, strlen(sys_build_info));\n    crashdump_dump_output((unsigned char *)separate_line, sizeof(separate_line) - 1);\n\n#if defined(TRACE_DUMP2FLASH)\n    {\n        const unsigned char *e1 = NULL, *e2 = NULL;\n        unsigned int len1 = 0, len2 = 0;\n\n        hal_trace_get_history_buffer(&e1, &len1, &e2, &len2);\n        if (e1 && len1) {\n            crashdump_dump_output(e1, len1);\n        }\n        if (e2 && len2) {\n            crashdump_dump_output(e2, len2);\n        }\n    }\n#endif\n    crashdump_dump_output((unsigned char *)separate_line, sizeof(separate_line) - 1);\n\n    crashdump_dumptoflash();\n    return 0;\n}\n\n#if defined(CRASH_DUMP_SECTION_SIZE) && (CRASH_DUMP_SECTION_SIZE > 0)\nstatic void crashdump_state_handler(enum HAL_TRACE_STATE_T state)\n{\n    if (state == HAL_TRACE_STATE_CRASH_START) {\n        crashdump_init();\n    }\n}\n#endif\n\nbool crashdump_is_crash_happened(void)\n{\n    return isCrashHappened;\n}\n\nbool crashdump_is_crash_dump_existing(void)\n{\n    return isCrashDumpExisting;\n}\n\nvoid crashdump_set_existing_flag(uint8_t isExisting)\n{\n    isCrashDumpExisting = isExisting;\n}\n\nint32_t crashdump_get_latest_flash_offset(void)\n{\n    if (crashdump_is_crash_dump_existing())\n    {\n        if ((uint32_t)__crash_dump_start == (uint32_t)crash_dump_section_p)\n        {\n            return ((uint32_t)__crash_dump_end - sizeof(struct CRASH_OUTPUT_BUF_T))&0x3FFFFF;\n        }\n        else\n        {\n            return ((uint32_t)crash_dump_section_p - sizeof(struct CRASH_OUTPUT_BUF_T))&0x3FFFFF;\n        }\n    }\n    else\n    {\n        return -1;\n    }\n}\n\nvoid crashdump_test_flash_access(void)\n{\n    TRACE(1,\"Did crash just happen: %d\", crashdump_is_crash_happened());\n\n    TRACE(1,\"Did crash ever happen: %d\", crashdump_is_crash_dump_existing());\n\n    int32_t latestCrashDumpFlashOffset = crashdump_get_latest_flash_offset();\n    if (latestCrashDumpFlashOffset > 0)\n    {\n        TRACE(2,\"The latest crash dump flash offset 0x%x flash logic addr 0x%x\",\n        latestCrashDumpFlashOffset,\n        latestCrashDumpFlashOffset + FLASH_NC_BASE);\n\n        struct CRASH_OUTPUT_BUF_T* pBuf =\n            (struct CRASH_OUTPUT_BUF_T *)(latestCrashDumpFlashOffset + FLASH_NC_BASE);\n        TRACE(1,\"Valid content size of the dump log is %d\", pBuf->hdr.bufpos);\n        TRACE(1,\"Logic address of the trace buffer is 0x%x\", pBuf->buf);\n        TRACE(1,\"Up to %d logs can be saved in the flash\", pBuf->hdr.partnum);\n        TRACE(1,\"Log seq number is %d\", pBuf->hdr.seqnum);\n\n        for (int i = 0; i < pBuf->hdr.bufpos;i++)\n        {\n            TRACE_NOCRLF(1,\"%c\", pBuf->buf[i]);\n        }\n    }\n    else\n    {\n        TRACE(0,\"No crash dump log in flash.\");\n    }\n\n    TRACE(0,\"=========================================\");\n}\n\n#endif // (CRASH_DUMP_SECTION_SIZE > 0)\n\nvoid crashdump_set_crash_happened_flag(uint8_t isHappened)\n{\n#if defined(CRASH_DUMP_SECTION_SIZE) && (CRASH_DUMP_SECTION_SIZE > 0)\n    isCrashHappened = isHappened;\n#endif\n}\n\nvoid crashdump_dumptoflash(void)\n{\n#if defined(CRASH_DUMP_SECTION_SIZE) && (CRASH_DUMP_SECTION_SIZE > 0)\n    uint32_t lock;\n    uint32_t dump_section_idx;\n\n    crashdump_get_empty_section(&dump_section_idx, &crash_dump_section_p);\n    lock = int_lock_global();\n    pmu_flash_write_config();\n    hal_norflash_erase(HAL_NORFLASH_ID_0,(uint32_t)crash_dump_section_p,sizeof(struct CRASH_OUTPUT_BUF_T));\n    hal_norflash_write(HAL_NORFLASH_ID_0,(uint32_t)crash_dump_section_p,(uint8_t *)crash_output_p, sizeof(struct CRASH_OUTPUT_BUF_T));\n    pmu_flash_read_config();\n    int_unlock_global(lock);\n#endif\n}\n\nvoid crashdump_init_section_info(void)\n{\n#if defined(CRASH_DUMP_SECTION_SIZE) && (CRASH_DUMP_SECTION_SIZE > 0)\n    uint32_t dump_section_idx;\n    crashdump_get_empty_section(&dump_section_idx, &crash_dump_section_p);\n\n    hal_trace_app_register(crashdump_state_handler, crashdump_dump_output);\n#endif\n}\n#else\n#include \"cmsis.h\"\n#include \"crash_dump_section.h\"\n#include \"hal_cache.h\"\n#include \"hal_norflash.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"heap_api.h\"\n#include \"norflash_api.h\"\n#include \"pmu.h\"\n#include \n#include \n\nextern uint32_t __crash_dump_start;\nextern uint32_t __crash_dump_end;\nextern void syspool_init_specific_size(uint32_t size);\n\nstatic const uint32_t crash_dump_flash_start_addr =\n    (uint32_t)&__crash_dump_start;\nstatic const uint32_t crash_dump_flash_end_addr = (uint32_t)&__crash_dump_end;\nstatic uint32_t crash_dump_flash_len;\nstatic CRASH_DATA_BUFFER crash_data_buffer;\nstatic uint32_t crash_dump_w_seqnum = 0;\nstatic uint32_t crash_dump_flash_offs = 0;\nstatic uint32_t crash_dump_cur_dump_seqnum;\nstatic uint32_t crash_dump_total_len = 0;\nstatic bool crash_dump_is_init = false;\nstatic uint8_t crash_dump_is_happend = 0;\nstatic uint32_t crash_dump_type;\nHAL_TRACE_APP_NOTIFY_T crash_dump_notify_cb = NULL;\nHAL_TRACE_APP_OUTPUT_T crash_dump_output_cb = NULL;\nHAL_TRACE_APP_OUTPUT_T crash_dump_fault_cb = NULL;\nstatic enum NORFLASH_API_RET_T _flash_api_read(uint32_t addr, uint8_t *buffer,\n                                               uint32_t len) {\n\n  return norflash_sync_read(NORFLASH_API_MODULE_ID_CRASH_DUMP, addr, buffer,\n                            len);\n}\n\nstatic int32_t _crash_dump_get_seqnum(uint32_t *dump_seqnum,\n                                      uint32_t *sector_seqnum) {\n  uint32_t i;\n  uint32_t count;\n  static enum NORFLASH_API_RET_T result;\n  CRASH_DUMP_HEADER_T crash_dump_header;\n  uint32_t max_dump_seqnum = 0;\n  uint32_t max_sector_seqnum = 0;\n  bool is_existed = false;\n\n  count = (crash_dump_flash_end_addr - crash_dump_flash_start_addr) /\n          CRASH_DUMP_BUFFER_LEN;\n  for (i = 0; i < count; i++) {\n    result = _flash_api_read(\n        crash_dump_flash_start_addr + i * CRASH_DUMP_BUFFER_LEN,\n        (uint8_t *)&crash_dump_header, sizeof(CRASH_DUMP_HEADER_T));\n    if (result == NORFLASH_API_OK) {\n      if (crash_dump_header.magic == CRASH_DUMP_MAGIC_CODE &&\n          crash_dump_header.version == CRASH_DUMP_VERSION) {\n        is_existed = true;\n        if (crash_dump_header.seqnum > max_dump_seqnum) {\n          max_dump_seqnum = crash_dump_header.seqnum;\n          max_sector_seqnum = i;\n        }\n      }\n    } else {\n      ASSERT(0, \"_crash_dump_get_seqnum: _flash_api_read failed!result = %d.\",\n             result);\n    }\n  }\n  if (is_existed) {\n    *dump_seqnum = max_dump_seqnum + 1;\n    *sector_seqnum = max_sector_seqnum + 1 >= count ? 0 : max_sector_seqnum + 1;\n  } else {\n    *dump_seqnum = 0;\n    *sector_seqnum = 0;\n  }\n  return 0;\n}\nstatic void _crash_dump_notify(enum HAL_TRACE_STATE_T state) {\n  uint32_t lock;\n  CRASH_DATA_BUFFER *data_buff = NULL;\n\n  if (!crash_dump_is_init) {\n    return;\n  }\n  if (state == HAL_TRACE_STATE_CRASH_ASSERT_START) {\n    crash_dump_type = CRASH_DUMP_ASSERT_CODE;\n  } else if (state == HAL_TRACE_STATE_CRASH_FAULT_START) {\n    crash_dump_type = CRASH_DUMP_EXCEPTION_CODE;\n  }\n  CRASH_DUMP_TRACE(2, \"__CRASH_DUMP:%s: state = %d.\", __func__, state);\n  CRASH_DUMP_TRACE(3, \"__CRASH_DUMP:%s: start_addr = 0x%x,end_addr = 0x%x.\",\n                   __func__, crash_dump_flash_start_addr,\n                   crash_dump_flash_end_addr);\n  CRASH_DUMP_TRACE(3,\n                   \"__CRASH_DUMP:%s: dump_seqnum = 0x%x,flash_offset = 0x%x.\",\n                   __func__, crash_dump_cur_dump_seqnum, crash_dump_flash_offs);\n\n  if (HAL_TRACE_STATE_CRASH_END == state) {\n    lock = int_lock_global();\n    data_buff = &crash_data_buffer;\n    crash_dump_write(crash_dump_flash_start_addr + crash_dump_flash_offs,\n                     data_buff->buffer, data_buff->offset);\n    int_unlock_global(lock);\n  }\n}\n\nstatic void _crash_dump_output(const unsigned char *buf, unsigned int buf_len) {\n  // uint32_t len,len1;\n  uint32_t uint_len;\n  uint32_t written_len;\n  uint32_t remain_len;\n  CRASH_DUMP_HEADER_T log_header;\n  CRASH_DATA_BUFFER *data_buff = NULL;\n\n  if (!crash_dump_is_init) {\n    return;\n  }\n\n  if (strstr((char *)buf, CRASH_DUMP_PREFIX) != NULL) {\n    return;\n  }\n\n  data_buff = &crash_data_buffer;\n  remain_len = buf_len;\n  written_len = 0;\n  do {\n    if (data_buff->offset == 0) {\n      CRASH_DUMP_TRACE(\n          4, \"__CRASH_DUMP:%s:%d offset = 0.w_seqnum = %d,dump_seqnum = %d.\",\n          __func__, __LINE__, crash_dump_w_seqnum, crash_dump_cur_dump_seqnum);\n      memset((uint8_t *)&log_header, 0, sizeof(log_header));\n      log_header.magic = CRASH_DUMP_MAGIC_CODE;\n      log_header.version = CRASH_DUMP_VERSION;\n      log_header.seqnum = crash_dump_cur_dump_seqnum;\n      log_header.reseved[0] = '\\0';\n      log_header.reseved[1] = '\\0';\n      log_header.reseved[2] = '\\0';\n      log_header.reseved[3] = '\\n';\n      memcpy(data_buff->buffer + data_buff->offset, (uint8_t *)&log_header,\n             sizeof(log_header));\n\n      data_buff->offset += sizeof(log_header);\n      crash_dump_cur_dump_seqnum++;\n    }\n\n    if (data_buff->offset + remain_len > CRASH_DUMP_SECTOR_SIZE) {\n      uint_len = (CRASH_DUMP_SECTOR_SIZE - data_buff->offset);\n    } else {\n      uint_len = remain_len;\n    }\n    if (uint_len > 0) {\n      memcpy(data_buff->buffer + data_buff->offset, buf + written_len,\n             uint_len);\n      data_buff->offset += uint_len;\n      written_len += uint_len;\n      crash_dump_total_len += uint_len;\n    }\n\n    if (data_buff->offset == CRASH_DUMP_SECTOR_SIZE) {\n      crash_dump_write(crash_dump_flash_start_addr + crash_dump_flash_offs,\n                       data_buff->buffer, data_buff->offset);\n\n      crash_dump_flash_offs =\n          crash_dump_flash_offs + data_buff->offset >= crash_dump_flash_len\n              ? 0\n              : crash_dump_flash_offs + data_buff->offset;\n      data_buff->offset = 0;\n    }\n    remain_len -= uint_len;\n  } while (remain_len > 0);\n}\n\nstatic void _crash_dump_fault(const unsigned char *buf, unsigned int buf_len) {\n  _crash_dump_output(buf, buf_len);\n}\n\nvoid crash_dump_init(void) {\n  uint32_t block_size = 0;\n  uint32_t sector_size = 0;\n  uint32_t page_size = 0;\n  uint32_t buffer_len = 0;\n  uint32_t dump_seqnum = 0;\n  uint32_t sector_seqnum = 0;\n  enum NORFLASH_API_RET_T result;\n\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, &block_size, §or_size,\n                        &page_size);\n  buffer_len = CRASH_DUMP_NORFALSH_BUFFER_LEN;\n  CRASH_DUMP_TRACE(4,\n                   \"__CRASH_DUMP:%s: crash_dump_start = 0x%x, crash_dump_end = \"\n                   \"0x%x, buff_len = 0x%x.\",\n                   __func__, crash_dump_flash_start_addr,\n                   crash_dump_flash_end_addr, buffer_len);\n\n  result = norflash_api_register(\n      NORFLASH_API_MODULE_ID_CRASH_DUMP, HAL_NORFLASH_ID_0,\n      crash_dump_flash_start_addr,\n      crash_dump_flash_end_addr - crash_dump_flash_start_addr, block_size,\n      sector_size, page_size, buffer_len, NULL);\n\n  if (result == NORFLASH_API_OK) {\n    CRASH_DUMP_TRACE(1, \"__CRASH_DUMP:%s: norflash_api_register ok.\", __func__);\n  } else {\n    CRASH_DUMP_TRACE(\n        2, \"__CRASH_DUMP:%s: norflash_api_register failed,result = %d\",\n        __func__, result);\n    return;\n  }\n\n  crash_dump_notify_cb = _crash_dump_notify;\n  crash_dump_output_cb = _crash_dump_output;\n  crash_dump_fault_cb = _crash_dump_fault;\n\n  hal_trace_app_custom_register(crash_dump_notify_handler,\n                                crash_dump_output_handler,\n                                crash_dump_fault_handler);\n  _crash_dump_get_seqnum(&dump_seqnum, §or_seqnum);\n  crash_dump_cur_dump_seqnum = dump_seqnum;\n  crash_dump_flash_len =\n      crash_dump_flash_end_addr - crash_dump_flash_start_addr;\n  crash_dump_flash_offs = sector_seqnum * CRASH_DUMP_BUFFER_LEN;\n  crash_data_buffer.offset = 0;\n  crash_data_buffer.buffer = NULL;\n  crash_dump_w_seqnum = 0;\n  crash_dump_total_len = 0;\n  crash_dump_is_init = true;\n}\n\nvoid crash_dump_init_buffer(void) {\n  crash_data_buffer.offset = 0;\n  syspool_init_specific_size(CRASH_DUMP_BUFFER_LEN);\n  syspool_get_buff(&(crash_data_buffer.buffer), CRASH_DUMP_BUFFER_LEN);\n}\n\nint32_t crash_dump_read(uint32_t addr, uint8_t *ptr, uint32_t len) {\n  enum NORFLASH_API_RET_T ret;\n\n  ret = norflash_sync_read(NORFLASH_API_MODULE_ID_CRASH_DUMP, addr, ptr, len);\n  if (ret != NORFLASH_API_OK) {\n    CRASH_DUMP_TRACE(\n        4,\n        \"__CRASH_DUMP:%s: norflash_sync_read,addr = 0x%x,len = 0x%x,ret = %d.\",\n        __func__, addr, len, ret);\n    return ret;\n  }\n  return 0;\n}\n\nint32_t crash_dump_write(uint32_t addr, uint8_t *ptr, uint32_t len) {\n  enum NORFLASH_API_RET_T ret;\n\n  if (CRASH_LOG_ALIGN(addr, CRASH_DUMP_SECTOR_SIZE) != addr) {\n    CRASH_DUMP_TRACE(2, \"__CRASH_DUMP:%s: addr not aligned! addr = 0x%x.\",\n                     __func__, addr);\n    return (int32_t)NORFLASH_API_BAD_ADDR;\n  }\n  ret = norflash_api_erase(NORFLASH_API_MODULE_ID_CRASH_DUMP, addr,\n                           CRASH_DUMP_SECTOR_SIZE, false);\n  if (ret != NORFLASH_API_OK) {\n    CRASH_DUMP_TRACE(\n        3, \"__CRASH_DUMP:%s: norflash_api_erase failed! addr = 0x%x,ret = %d.\",\n        __func__, addr, ret);\n    return (int32_t)ret;\n  }\n  ret = norflash_api_write(NORFLASH_API_MODULE_ID_CRASH_DUMP, addr, ptr, len,\n                           false);\n  if (ret != NORFLASH_API_OK) {\n    CRASH_DUMP_TRACE(\n        4,\n        \"__CRASH_DUMP:%s: norflash_api_write,addr = 0x%x,len = 0x%x,ret = %d.\",\n        __func__, addr, len, ret);\n    return (int32_t)ret;\n  }\n  return 0;\n}\n\nvoid crash_dump_notify_handler(enum HAL_TRACE_STATE_T state) {\n  if ((state == HAL_TRACE_STATE_CRASH_ASSERT_START) ||\n      (state == HAL_TRACE_STATE_CRASH_FAULT_START)) {\n    norflash_api_flush_enable_all();\n    crash_dump_init_buffer();\n  }\n\n  if (crash_dump_notify_cb) {\n    crash_dump_notify_cb(state);\n  }\n}\n\nvoid crash_dump_output_handler(const unsigned char *buf, unsigned int buf_len) {\n  if (crash_dump_output_cb) {\n    crash_dump_output_cb(buf, buf_len);\n  }\n}\n\nvoid crash_dump_fault_handler(const unsigned char *buf, unsigned int buf_len) {\n  if (crash_dump_fault_cb) {\n    crash_dump_fault_cb(buf, buf_len);\n  }\n}\n\nvoid crash_dump_set_flag(uint8_t is_happend) {\n  crash_dump_is_happend = is_happend;\n}\n\nvoid crash_dump_register(HAL_TRACE_APP_NOTIFY_T notify_cb,\n                         HAL_TRACE_APP_OUTPUT_T crash_output_cb,\n                         HAL_TRACE_APP_OUTPUT_T crash_fault_cb) {\n  crash_dump_notify_cb = notify_cb;\n  crash_dump_output_cb = crash_output_cb;\n  crash_dump_fault_cb = crash_fault_cb;\n}\n\nCRASH_DATA_BUFFER *crash_dump_get_buffer(void) { return &crash_data_buffer; }\n\nuint32_t crash_dump_get_type(void) { return crash_dump_type; }\n\n#endif\n"
  },
  {
    "path": "services/nv_section/log_section/crash_dump_section.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __CRASH_DUMP_SECTION_H__\n#define __CRASH_DUMP_SECTION_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#if 0\n#include \"plat_types.h\"\n\n#define CRASH_DUMP_MAGIC_CODE\t  0x504D5544\n#define CRASH_DUMP_ASSERT_CODE    0xEB6D0924\n#define CRASH_DUMP_EXCEPTION_CODE 0xC78BA332\n/*\n * Total number of core registers stored\n */\n#define CRASH_DUMP_REGISTERS_NUM   17\n#define CRASH_DUMP_REGISTERS_NUM_BYTES   ((CRASH_DUMP_REGISTERS_NUM)*4)\n/*\n * Number bytes to store from stack\n *   - this is total, not per PSP/MSP\n */\n#define CRASH_DUMP_STACK_NUM_BYTES 384\n#define CRASH_DUMP_FRAME_SIZE (1024*16)\n\ntypedef struct {\n  uint32_t magicCode; // must be CRASH_DUMP_MAGIC_CODE\n  int32_t  seqnum;  // increased by 1 per crash\n  uint32_t partnum;   // maximum crash log count saved in the flash\n  uint32_t reserved;\n  uint32_t bufpos;  // valid content in the following buf array\n  uint32_t liteDumpOffset;\n  uint32_t crashCode;\n} CRASH_OUTPUT_BUF_HEADER_T;\n\n/**\n * This structure MUST be a total size\n * of 0x4000\n */\nstruct CRASH_OUTPUT_BUF_T {\n  CRASH_OUTPUT_BUF_HEADER_T hdr;\n  uint8_t buf[CRASH_DUMP_FRAME_SIZE - sizeof(CRASH_OUTPUT_BUF_HEADER_T)];\n};\n\n/** Tell whether the system reboots because of a fresh assert or hardfault. */\nbool crashdump_is_crash_happened(void);\nvoid crashdump_set_existing_flag(uint8_t isExisting);\n/**\n * Tell the flash offset of the latest crash dump\n *  -1 means there is no crash dump in the flash.\n *  Other values are the valid flash offset of the latest happend crash dump log.\n */\nint32_t crashdump_get_latest_flash_offset(void);\n/** Tell whether there is any crash dump logs in the flash. */\nbool crashdump_is_crash_dump_existing(void);\nvoid crashdump_set_crash_happened_flag(uint8_t isHappened);\nvoid crashdump_dumptoflash(void);\nvoid crashdump_init_section_info(void);\n#else\n\n#include \"hal_trace.h\"\n\n#define CRASH_DUMP_PREFIX     \"__CRASH_DUMP:\"\n#define CRASH_DUMP_TRACE(num,fmt, ...)   TRACE(num,fmt, ##__VA_ARGS__)\n#define CRASH_LOG_ALIGN(x,a)  (uint32_t)(((x + a - 1)/a) * a)\n\n\n#define CRASH_DUMP_SECTOR_SIZE             0x1000\n#define CRASH_DUMP_BUFFER_LEN              (CRASH_DUMP_SECTOR_SIZE*2)\n#define CRASH_DUMP_NORFALSH_BUFFER_LEN     (CRASH_DUMP_BUFFER_LEN)\n\n#define DATA_BUFFER_STATE_FREE           0\n#define DATA_BUFFER_STATE_WRITTING       0x1\n#define DATA_BUFFER_STATE_WRITTEN        0x2\n\n#define CRASH_DUMP_MAGIC_CODE              0x504D5544\n#define CRASH_DUMP_VERSION                 0x00010001\n\n#define CRASH_DUMP_ASSERT_CODE    0xEB6D0924\n#define CRASH_DUMP_EXCEPTION_CODE 0xC78BA332\n\ntypedef struct\n{\n    uint32_t magic;\n    uint32_t version;\n    uint32_t seqnum;\n    uint8_t reseved[4];\n}CRASH_DUMP_HEADER_T;\n\n\n#define CRASH_DUMP_FRAME_SIZE (CRASH_DUMP_BUFFER_LEN)\ntypedef struct{\n    uint32_t offset;\n    uint8_t *buffer;\n}CRASH_DATA_BUFFER;\n\nvoid crash_dump_init(void);\nvoid crash_dump_init_buffer(void);\nint32_t crash_dump_read(uint32_t addr,uint8_t* ptr,uint32_t len);\nint32_t crash_dump_write(uint32_t addr,uint8_t* ptr,uint32_t len);\nvoid crash_dump_notify_handler(enum HAL_TRACE_STATE_T state);\nvoid crash_dump_output_handler(const unsigned char *buf, unsigned int buf_len);\nvoid crash_dump_fault_handler(const unsigned char *buf, unsigned int buf_len);\nvoid crash_dump_set_flag(uint8_t is_happend);\nvoid crash_dump_register(HAL_TRACE_APP_NOTIFY_T notify_cb,HAL_TRACE_APP_OUTPUT_T crash_output_cb,HAL_TRACE_APP_OUTPUT_T crash_fault_cb);\nCRASH_DATA_BUFFER* crash_dump_get_buffer(void);\nuint32_t crash_dump_get_type(void);\n\n// --gsound crash dump -------------\ntypedef struct {\n    uint32_t magicCode;  // must be CRASH_DUMP_MAGIC_CODE\n    uint32_t seqnum;     // increased by 1 per crash\n    uint32_t partnum;    // maximum crash log count saved in the flash\n    uint32_t reserved;\n    uint32_t bufpos;  // valid content in the following buf array\n    uint32_t liteDumpOffset;\n    uint32_t crashCode;\n} CRASH_OUTPUT_BUF_HEADER_T;\n\n/**\n * This structure MUST be a total size\n * of 0x1000\n */\n\nstruct CRASH_OUTPUT_BUF_T {\n    CRASH_OUTPUT_BUF_HEADER_T hdr;\n    uint8_t buf[CRASH_DUMP_FRAME_SIZE - sizeof(CRASH_OUTPUT_BUF_HEADER_T)];\n};\n\n// --gsound crash dump end  -------------\n\n#endif\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/nv_section/log_section/log_section.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"log_section.h\"\n#include \"cmsis.h\"\n#include \"hal_cache.h\"\n#include \"hal_norflash.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"norflash_api.h\"\n#include \"pmu.h\"\n#include \n#include \n\n// #define DUMP_NO_ROLLBACK\n#define LOG_DUMP_PREFIX \"__LOG_DUMP:\"\n#if 0\n#define LOG_DUMP_TRACE(num, fmt, ...) TRACE(num, fmt, ##__VA_ARGS__)\n#else\n#define LOG_DUMP_TRACE(num, fmt, ...)\n#endif\n#define LOG_DUMP_TRACE_FORCE(num, fmt, ...) TRACE(num, fmt, ##__VA_ARGS__)\n#define DUMP_LOG_ALIGN(x, a) (uint32_t)(((x + a - 1) / a) * a)\n\nextern uint32_t __log_dump_start;\nextern uint32_t __log_dump_end;\n\nextern void watchdog_ping(void);\n\nstatic const uint32_t log_dump_flash_start_addr = (uint32_t)&__log_dump_start;\nstatic const uint32_t log_dump_flash_end_addr = (uint32_t)&__log_dump_end;\nstatic uint32_t log_dump_flash_len;\n\nstatic DATA_BUFFER data_buffer_list[LOG_DUMP_SECTOR_BUFFER_COUNT];\nstatic uint32_t log_dump_w_seqnum = 0;\nstatic uint32_t log_dump_f_seqnum = 0;\nstatic uint32_t log_dump_flash_offs = 0;\nstatic uint32_t log_dump_cur_dump_seqnum;\nstatic bool log_dump_is_init = false;\nstatic bool log_dump_is_immediately;\nstatic bool log_dump_is_bootup = true;\nstatic enum LOG_DUMP_FLUSH_STATE log_dump_flash_state =\n    LOG_DUMP_FLASH_STATE_IDLE;\n\nstatic enum NORFLASH_API_RET_T _flash_api_read(uint32_t addr, uint8_t *buffer,\n                                               uint32_t len) {\n\n  return norflash_sync_read(NORFLASH_API_MODULE_ID_LOG_DUMP, addr, buffer, len);\n}\n\nstatic void _flash_api_flush(void) {\n  hal_trace_pause();\n  do {\n    norflash_api_flush();\n  } while (!norflash_api_buffer_is_free(NORFLASH_API_MODULE_ID_LOG_DUMP));\n\n  hal_trace_continue();\n}\n\nstatic enum NORFLASH_API_RET_T _flash_api_erase(uint32_t addr, bool is_async) {\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret = NORFLASH_API_OK;\n\n  if (log_dump_is_immediately) {\n    is_async = false;\n  }\n  do {\n\n    lock = int_lock_global();\n    hal_trace_pause();\n    ret = norflash_api_erase(NORFLASH_API_MODULE_ID_LOG_DUMP, addr,\n                             LOG_DUMP_SECTOR_SIZE, is_async);\n    hal_trace_continue();\n    int_unlock_global(lock);\n\n    if (NORFLASH_API_OK == ret) {\n      // LOG_DUMP_TRACE(1,LOG_DUMP_PREFIX\"%s: norflash_api_erase ok!\",__func__);\n      break;\n    } else if (NORFLASH_API_BUFFER_FULL == ret) {\n      norflash_api_flush();\n      if (is_async) {\n        break;\n      }\n    } else {\n      ASSERT(\n          0,\n          \"_flash_api_erase: norflash_api_erase failed. ret = %d,addr = 0x%x.\",\n          ret, addr);\n    }\n  } while (1);\n\n  return ret;\n}\n\nstatic enum NORFLASH_API_RET_T _flash_api_write(uint32_t addr, uint8_t *ptr,\n                                                uint32_t len, bool is_async) {\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret = NORFLASH_API_OK;\n\n  if (log_dump_is_immediately) {\n    is_async = false;\n  }\n\n  do {\n    lock = int_lock_global();\n    hal_trace_pause();\n    ret = norflash_api_write(NORFLASH_API_MODULE_ID_LOG_DUMP, addr, ptr, len,\n                             is_async);\n\n    hal_trace_continue();\n\n    int_unlock_global(lock);\n\n    if (NORFLASH_API_OK == ret) {\n      // LOG_DUMP_TRACE(1,LOG_DUMP_PREFIX\"%s: norflash_api_write ok!\",__func__);\n      break;\n    } else if (NORFLASH_API_BUFFER_FULL == ret) {\n      norflash_api_flush();\n      if (is_async) {\n        LOG_DUMP_TRACE(1, LOG_DUMP_PREFIX \"%s: norflash api buffer full\",\n                       __func__);\n        break;\n      }\n    } else {\n      ASSERT(0, \"_flash_api_write: norflash_api_write failed. ret = %d\", ret);\n    }\n  } while (1);\n\n  return ret;\n}\n\nstatic int32_t _get_seqnum(uint32_t *dump_seqnum, uint32_t *sector_seqnum) {\n#ifndef DUMP_NO_ROLLBACK\n  uint32_t i;\n  uint32_t count;\n  static enum NORFLASH_API_RET_T result;\n  LOG_DUMP_HEADER log_dump_header;\n  uint32_t max_dump_seqnum = 0;\n  uint32_t max_sector_seqnum = 0;\n  bool is_existed = false;\n\n  count = (log_dump_flash_end_addr - log_dump_flash_start_addr) /\n          LOG_DUMP_SECTOR_SIZE;\n  for (i = 0; i < count; i++) {\n    result =\n        _flash_api_read(log_dump_flash_start_addr + i * LOG_DUMP_SECTOR_SIZE,\n                        (uint8_t *)&log_dump_header, sizeof(LOG_DUMP_HEADER));\n    if (result == NORFLASH_API_OK) {\n      if (log_dump_header.magic == DUMP_LOG_MAGIC &&\n          log_dump_header.version == DUMP_LOG_VERSION) {\n        is_existed = true;\n        if (log_dump_header.seqnum > max_dump_seqnum) {\n          max_dump_seqnum = log_dump_header.seqnum;\n          max_sector_seqnum = i;\n        }\n      }\n    } else {\n      ASSERT(0, \"_get_cur_sector_seqnum: _flash_api_read failed!result = %d.\",\n             result);\n    }\n  }\n  if (is_existed) {\n    *dump_seqnum = max_dump_seqnum + 1;\n    *sector_seqnum = max_sector_seqnum + 1 >= count ? 0 : max_sector_seqnum + 1;\n  } else {\n    *dump_seqnum = 0;\n    *sector_seqnum = 0;\n  }\n#else\n  {\n    LOG_DUMP_HEADER log_dump_header;\n    _flash_api_read(log_dump_flash_start_addr, (uint8_t *)&log_dump_header,\n                    sizeof(LOG_DUMP_HEADER));\n    *dump_seqnum = 0;\n    *sector_seqnum = 0;\n  }\n#endif\n  return 0;\n}\n\nstatic int _log_dump_flush(uint32_t buff_state, bool is_async) {\n  enum NORFLASH_API_RET_T result;\n  static uint32_t total_len = 0;\n  DATA_BUFFER *data_buff;\n\n  if (log_dump_flash_state == LOG_DUMP_FLASH_STATE_IDLE &&\n      (log_dump_flash_offs % LOG_DUMP_SECTOR_SIZE) == 0) {\n    LOG_DUMP_TRACE(3, LOG_DUMP_PREFIX \"%s:%d,state = idle,addr = 0x%x.\",\n                   __func__, __LINE__,\n                   log_dump_flash_start_addr + log_dump_flash_offs);\n    result = _flash_api_erase(log_dump_flash_start_addr + log_dump_flash_offs,\n                              is_async);\n    if (result == NORFLASH_API_OK) {\n      LOG_DUMP_TRACE(3, LOG_DUMP_PREFIX \"%s:%d,erase ok,addr = 0x%x,\", __func__,\n                     __LINE__, log_dump_flash_start_addr + log_dump_flash_offs);\n      log_dump_flash_state = LOG_DUMP_FLASH_STATE_ERASED;\n    } else {\n      LOG_DUMP_TRACE(\n          3,\n          LOG_DUMP_PREFIX \"%s: _flash_api_erase failed!addr = 0x%x,ret = %d.\",\n          __func__, log_dump_flash_start_addr + log_dump_flash_offs, result);\n    }\n  } else if (log_dump_flash_state == LOG_DUMP_FLASH_STATE_ERASED ||\n             log_dump_flash_state == LOG_DUMP_FLASH_STATE_WRITTING) {\n    data_buff = &data_buffer_list[log_dump_f_seqnum];\n    if ((data_buff->state & buff_state) != 0 && data_buff->offset > 0) {\n      LOG_DUMP_TRACE(3, LOG_DUMP_PREFIX \"%s:%d,state = ERASED,f_seqnum = %d.\",\n                     __func__, __LINE__, log_dump_f_seqnum);\n      log_dump_flash_state = LOG_DUMP_FLASH_STATE_WRITTING;\n      result = _flash_api_write(log_dump_flash_start_addr + log_dump_flash_offs,\n                                data_buff->buffer, data_buff->offset, is_async);\n      if (result == NORFLASH_API_OK) {\n        LOG_DUMP_TRACE(\n            5,\n            LOG_DUMP_PREFIX\n            \"%s:%d,write ok,addr = 0x%x,f_seqnum = 0x%x,total_len = 0x%x.\",\n            __func__, __LINE__, log_dump_flash_start_addr + log_dump_flash_offs,\n            log_dump_f_seqnum, total_len);\n\n        data_buff->state = DATA_BUFFER_STATE_FREE;\n        log_dump_f_seqnum =\n            log_dump_f_seqnum + 1 == LOG_DUMP_SECTOR_BUFFER_COUNT\n                ? 0\n                : log_dump_f_seqnum + 1;\n        total_len += data_buff->offset;\n\n        log_dump_flash_offs =\n            log_dump_flash_offs + data_buff->offset >= log_dump_flash_len\n                ? 0\n                : log_dump_flash_offs + data_buff->offset;\n        log_dump_flash_state = LOG_DUMP_FLASH_STATE_IDLE;\n      } else {\n        LOG_DUMP_TRACE(2,\n                       LOG_DUMP_PREFIX \"%s: _flash_api_write failed!ret = %d.\",\n                       __func__, result);\n        return 3;\n      }\n    }\n  } else {\n    LOG_DUMP_TRACE(3, LOG_DUMP_PREFIX \"%s:%d state = %d.\", __func__, __LINE__,\n                   log_dump_flash_state);\n  }\n  return 0;\n}\n\nvoid _log_dump_flush_remain(void) {\n  uint32_t i;\n  uint32_t unfree_count = 0;\n\n  do {\n    unfree_count = 0;\n    for (i = 0; i < LOG_DUMP_SECTOR_BUFFER_COUNT; i++) {\n      if (data_buffer_list[i].state != DATA_BUFFER_STATE_FREE) {\n        unfree_count++;\n      }\n    }\n    if (unfree_count == 0) {\n      break;\n    }\n    _log_dump_flush(DATA_BUFFER_STATE_WRITTING | DATA_BUFFER_STATE_WRITTEN,\n                    false);\n  } while (1);\n\n  _flash_api_flush();\n}\n\nint log_dump_flush_all(void) {\n  norflash_api_flush_enable_all();\n  log_dump_is_immediately = true;\n  _log_dump_flush_remain();\n  return 0;\n}\nint log_dump_flush(void) {\n  if (!log_dump_is_init) {\n    return 0;\n  }\n\n  return _log_dump_flush(DATA_BUFFER_STATE_WRITTEN, true);\n}\n\nvoid log_dump_notify_handler(enum HAL_TRACE_STATE_T state) {\n  // uint32_t lock;\n\n  if (!log_dump_is_init) {\n    return;\n  }\n  LOG_DUMP_TRACE(\n      3, LOG_DUMP_PREFIX \"%s: state = %d,start_addr = 0x%x,end_addr = 0x%x.\",\n      __func__, state, log_dump_flash_start_addr, log_dump_flash_end_addr);\n  LOG_DUMP_TRACE(3,\n                 LOG_DUMP_PREFIX \"%s: dump_seqnum = 0x%x,flash_offset = 0x%x.\",\n                 __func__, log_dump_cur_dump_seqnum, log_dump_flash_offs);\n\n  if (state == HAL_TRACE_STATE_CRASH_ASSERT_START ||\n      state == HAL_TRACE_STATE_CRASH_FAULT_START) {\n    norflash_api_flush_enable_all();\n    log_dump_is_immediately = true;\n  } else {\n    LOG_DUMP_TRACE(2, LOG_DUMP_PREFIX \" crash end.\");\n    // lock = int_lock_global();\n    _log_dump_flush_remain();\n    // int_unlock_global(lock);\n  }\n}\n\nvoid log_dump_output_handler(const unsigned char *buf, unsigned int buf_len) {\n  uint32_t write_len;\n  uint32_t written_len;\n  uint32_t remain_len;\n  LOG_DUMP_HEADER log_header;\n  DATA_BUFFER *data_buff;\n\n  if (!log_dump_is_init) {\n    return;\n  }\n\n  if (strstr((char *)buf, LOG_DUMP_PREFIX) != NULL) {\n    return;\n  }\n\n  data_buff = &data_buffer_list[log_dump_w_seqnum];\n  remain_len = buf_len;\n  written_len = 0;\n  do {\n    if (data_buff->state == DATA_BUFFER_STATE_FREE ||\n        data_buff->state == DATA_BUFFER_STATE_WRITTEN) {\n      // LOG_DUMP_TRACE(3,LOG_DUMP_PREFIX\"%s:%d data_buff->state is\n      // free.w_seqnum = %d.\",\n      //     __func__,__LINE__,log_dump_w_seqnum);\n      data_buff->state = DATA_BUFFER_STATE_WRITTING;\n      data_buff->offset = 0;\n      memset(data_buff->buffer, 0, LOG_DUMP_SECTOR_SIZE);\n    }\n    if (data_buff->offset == 0) {\n#ifndef DUMP_NO_ROLLBACK\n      // LOG_DUMP_TRACE(4,LOG_DUMP_PREFIX\"%s:%d offset = 0.w_seqnum =\n      // %d,dump_seqnum = %d.\",\n      //    __func__,__LINE__,log_dump_w_seqnum,log_dump_cur_dump_seqnum);\n      memset((uint8_t *)&log_header, 0, sizeof(log_header));\n      log_header.magic = DUMP_LOG_MAGIC;\n      log_header.version = DUMP_LOG_VERSION;\n      log_header.seqnum = log_dump_cur_dump_seqnum;\n      if (log_dump_is_bootup) {\n        log_header.is_bootup = 1;\n        log_dump_is_bootup = false;\n      } else {\n        log_header.is_bootup = 0;\n      }\n      log_header.reseved[0] = '\\0';\n      log_header.reseved[1] = '\\0';\n      log_header.reseved[2] = '\\n';\n\n      memcpy(data_buff->buffer + data_buff->offset, (uint8_t *)&log_header,\n             sizeof(log_header));\n\n      data_buff->offset += sizeof(log_header);\n#else\n      if (log_dump_cur_dump_seqnum * LOG_DUMP_SECTOR_SIZE >=\n          log_dump_flash_len) {\n        log_header = log_header;\n        log_dump_is_bootup = log_dump_is_bootup;\n        break;\n      }\n#endif\n      log_dump_cur_dump_seqnum++;\n    }\n\n    if (data_buff->offset + remain_len > LOG_DUMP_SECTOR_SIZE) {\n      write_len = (LOG_DUMP_SECTOR_SIZE - data_buff->offset);\n    } else {\n      write_len = remain_len;\n    }\n\n    if (write_len > 0) {\n      memcpy(data_buff->buffer + data_buff->offset, buf + written_len,\n             write_len);\n      data_buff->offset += write_len;\n      written_len += write_len;\n    }\n\n    if (data_buff->offset == LOG_DUMP_SECTOR_SIZE) {\n      data_buff->state = DATA_BUFFER_STATE_WRITTEN;\n    }\n\n    remain_len -= write_len;\n\n    if (data_buff->offset == LOG_DUMP_SECTOR_SIZE) {\n      log_dump_w_seqnum = log_dump_w_seqnum + 1 == LOG_DUMP_SECTOR_BUFFER_COUNT\n                              ? 0\n                              : log_dump_w_seqnum + 1;\n      if (log_dump_w_seqnum == log_dump_f_seqnum) {\n        log_dump_f_seqnum =\n            log_dump_f_seqnum + 1 == LOG_DUMP_SECTOR_BUFFER_COUNT\n                ? 0\n                : log_dump_f_seqnum + 1;\n      }\n      // LOG_DUMP_TRACE(4,LOG_DUMP_PREFIX\"%s:%d w_seqnum = %d,dump_seqnum =\n      // %d.\",\n      //   __func__,__LINE__,log_dump_w_seqnum,log_dump_cur_dump_seqnum);\n\n      data_buff = &data_buffer_list[log_dump_w_seqnum];\n\n      ASSERT(data_buff->state == DATA_BUFFER_STATE_FREE ||\n                 data_buff->state == DATA_BUFFER_STATE_WRITTEN,\n             \"log_dump_output_handler: data_buff state error! state = %d.\",\n             data_buff->state);\n    }\n  } while (remain_len > 0);\n}\n\nvoid log_dump_callback(void *param) {\n  NORFLASH_API_OPERA_RESULT *opera_result;\n\n  opera_result = (NORFLASH_API_OPERA_RESULT *)param;\n\n  LOG_DUMP_TRACE_FORCE(\n      6,\n      LOG_DUMP_PREFIX\n      \"%s:type = %d, addr = 0x%x,len = 0x%x,remain = %d,result = %d.\",\n      __func__, opera_result->type, opera_result->addr, opera_result->len,\n      opera_result->remain_num, opera_result->result);\n  {\n    static uint32_t is_fst = 1;\n    if (is_fst) {\n      LOG_DUMP_TRACE(\n          3, LOG_DUMP_PREFIX \"%s:log_dump_start = 0x%x, log_dump_end = 0x%x.\",\n          __func__, log_dump_flash_start_addr, log_dump_flash_end_addr);\n      is_fst = 0;\n    }\n  }\n}\n\nvoid log_dump_init(void) {\n  uint32_t block_size = 0;\n  uint32_t sector_size = 0;\n  uint32_t page_size = 0;\n  uint32_t buffer_len = 0;\n  uint32_t dump_seqnum = 0;\n  uint32_t sector_seqnum = 0;\n  enum NORFLASH_API_RET_T result;\n  uint32_t i;\n\n  log_dump_flash_len = log_dump_flash_end_addr - log_dump_flash_start_addr;\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, &block_size, §or_size,\n                        &page_size);\n  buffer_len = LOG_DUMP_NORFALSH_BUFFER_LEN;\n  /*\n  LOG_DUMP_TRACE(4,LOG_DUMP_PREFIX\"%s: log_dump_start = 0x%x, log_dump_len =\n  0x%x, buff_len = 0x%x.\",\n                  __func__,\n                  log_dump_flash_start_addr,\n                  log_dump_flash_len,\n                  buffer_len);\n  */\n  result = norflash_api_register(\n      NORFLASH_API_MODULE_ID_LOG_DUMP, HAL_NORFLASH_ID_0,\n      log_dump_flash_start_addr,\n      log_dump_flash_end_addr - log_dump_flash_start_addr, block_size,\n      sector_size, page_size, buffer_len, log_dump_callback);\n\n  if (result == NORFLASH_API_OK) {\n    /*\n    LOG_DUMP_TRACE(1,LOG_DUMP_PREFIX\"%s: norflash_api_register ok.\", __func__);\n    */\n  } else {\n    /*\n    LOG_DUMP_TRACE(2,LOG_DUMP_PREFIX\"%s: norflash_api_register failed,result =\n    %d.\", __func__, result);\n    */\n    return;\n  }\n  hal_trace_app_register(log_dump_notify_handler, log_dump_output_handler);\n  hal_sleep_set_sleep_hook(HAL_SLEEP_HOOK_DUMP_LOG, log_dump_flush);\n  _get_seqnum(&dump_seqnum, §or_seqnum);\n  log_dump_cur_dump_seqnum = dump_seqnum;\n  log_dump_flash_offs = sector_seqnum * LOG_DUMP_SECTOR_SIZE;\n  memset((uint8_t *)&data_buffer_list, 0, sizeof(data_buffer_list));\n  for (i = 0; i < LOG_DUMP_SECTOR_BUFFER_COUNT; i++) {\n    data_buffer_list[i].state = DATA_BUFFER_STATE_FREE;\n    data_buffer_list[i].offset = 0;\n  }\n  log_dump_w_seqnum = 0;\n  log_dump_f_seqnum = 0;\n  log_dump_flash_state = LOG_DUMP_FLASH_STATE_IDLE;\n  log_dump_is_immediately = false;\n  log_dump_is_init = true;\n}\n\nvoid log_dump_clear(void) {\n  uint32_t i;\n  uint32_t addr;\n  uint32_t lock = int_lock_global();\n\n  for (i = 0; i < log_dump_flash_len / LOG_DUMP_SECTOR_SIZE; i++) {\n    addr = log_dump_flash_start_addr + i * LOG_DUMP_SECTOR_SIZE;\n    _flash_api_erase(addr, false);\n  }\n\n  int_unlock_global(lock);\n}\n\n#if 0\nuint8_t test_buff_r[LOG_DUMP_SECTOR_SIZE];\n\nuint32_t test_log_dump_from_flash(uint32_t addr,uint32_t size)\n{\n\t//uint32_t start_addr;\n\tuint32_t i;\n\t//uint8_t value = 0;\n\tint32_t ret = 0;\n\tenum NORFLASH_API_RET_T result = HAL_NORFLASH_OK;\n\n\tLOG_DUMP_TRACE(1,LOG_DUMP_PREFIX\"%s enter!!!\", __func__);\n\n\tfor(i = 0; i < size/LOG_DUMP_SECTOR_SIZE; i++)\n\t{\n\t\tresult = _flash_api_read((uint32_t)(addr)+ (i*LOG_DUMP_SECTOR_SIZE),\n\t\t\ttest_buff_r,LOG_DUMP_SECTOR_SIZE);\n\t\tif(result != NORFLASH_API_OK)\n\t\t{\n\t\t\tret = -1;\n\t\t\t//LOG_DUMP_TRACE(2,LOG_DUMP_PREFIX\"%s ret=%d\", __func__, ret);\n\t\t\tgoto _func_end;\n\t\t}\n\t\tLOG_DUMP_TRACE(1,LOG_DUMP_PREFIX\"%s\", test_buff_r);\n\t}\n    LOG_DUMP_TRACE(1,LOG_DUMP_PREFIX\"%s end!!!\", __func__);\n\n_func_end:\n\tLOG_DUMP_TRACE(1,LOG_DUMP_PREFIX\"_debug: flash checking end. ret = %d.\",ret);\n\treturn ret;\n}\n#endif\n"
  },
  {
    "path": "services/nv_section/log_section/log_section.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __LOG_SECTION_H__\n#define __LOG_SECTION_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \"hal_trace.h\"\n#include \n#include \n#if 0\nvoid init_dump_log(void);\nvoid dump_whole_logs(void);\n//void log_update_time_stamp(void);\n//void set_dump_log_flush(bool isEnable);\n//bool is_dump_log_flush_pending(void);\n//void flush_dump_log_handler(void);\nvoid clear_dump_log(void);\nuint32_t test_dump_log_from_flash(uint32_t addr,uint32_t size);\n#else\n\n#define LOG_DUMP_SECTOR_SIZE 0x1000\n#define LOG_DUMP_SECTOR_BUFFER_COUNT 4\n#define LOG_DUMP_BUFFER_LEN                                                    \\\n  (LOG_DUMP_SECTOR_SIZE * LOG_DUMP_SECTOR_BUFFER_COUNT)\n#define LOG_DUMP_NORFALSH_BUFFER_LEN (LOG_DUMP_BUFFER_LEN * 2)\n\n#define DATA_BUFFER_STATE_FREE 0\n#define DATA_BUFFER_STATE_WRITTING 0x1\n#define DATA_BUFFER_STATE_WRITTEN 0x2\n\n#define DUMP_LOG_MAGIC 0xd5151001\n#define DUMP_LOG_VERSION 0x00010001\n// #define DUMP_LOG_NEWLINE  '\\n'\n\nenum LOG_DUMP_FLUSH_STATE {\n  LOG_DUMP_FLASH_STATE_IDLE,\n  LOG_DUMP_FLASH_STATE_ERASED,\n  LOG_DUMP_FLASH_STATE_WRITTING,\n  LOG_DUMP_FLASH_STATE_WRITTEN,\n};\n\ntypedef struct {\n  uint32_t magic;\n  uint32_t version;\n  uint32_t seqnum;\n  uint8_t is_bootup;\n  uint8_t reseved[3];\n} LOG_DUMP_HEADER;\n\ntypedef struct {\n  uint32_t state;\n  uint32_t offset;\n  uint8_t buffer[LOG_DUMP_SECTOR_SIZE];\n} DATA_BUFFER;\n\nvoid log_dump_init(void);\nint log_dump_flush(void);\nint log_dump_flush_all(void);\nvoid log_dump_notify_handler(enum HAL_TRACE_STATE_T state);\nvoid log_dump_output_handler(const unsigned char *buf, unsigned int buf_len);\nvoid log_dump_callback(void *param);\nvoid log_dump_clear(void);\n\n// uint32_t test_log_dump_from_flash(uint32_t addr,uint32_t size);\n#endif\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/nv_section/nv_section_dbg.h",
    "content": "/**\n * @file nv_section_dbg.h\n * @author BES NV_SEC team\n * @version 0.1\n * @date 2020-04-22\n * \n * @copyright Copyright (c) 2015-2020 BES Technic.\n * All rights reserved. All unpublished rights reserved.\n * \n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n * \n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n */\n\n\n#ifndef __NV_SECTION_DBG_H__\n#define __NV_SECTION_DBG_H__\n\n#ifdef __cplusplus\nextern \"C\"{\n#endif\n\n/*****************************header include********************************/\n#include \"hal_trace.h\"\n\n/******************************macro defination*****************************/\n#define LOG_V(str, ...) LOG_VERBOSE(LOG_MOD(NV_SEC), str, ##__VA_ARGS__)\n#define LOG_D(str, ...) LOG_DEBUG(LOG_MOD(NV_SEC), str, ##__VA_ARGS__)\n#define LOG_I(str, ...) LOG_INFO(LOG_MOD(NV_SEC), str, ##__VA_ARGS__)\n#define LOG_W(str, ...) LOG_WARN(LOG_MOD(NV_SEC), str, ##__VA_ARGS__)\n#define LOG_E(str, ...) LOG_ERROR(LOG_MOD(NV_SEC), str, ##__VA_ARGS__)\n\n/******************************type defination******************************/\n\n/****************************function declearation**************************/\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __NV_SECTION_DBG_H__ */"
  },
  {
    "path": "services/nv_section/userdata_section/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nall_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nall_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nfiltout_c :=\nfiltout_cpp :=\n\nifneq ($(BISTO_ENABLE),1)\nfiltout_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*gsound.c))\nfiltout_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*gsound.cpp))\nendif\n\nifneq ($(OTA_ENABLE), 1)\nfiltout_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*ota.c))\nfiltout_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*ota.cpp))\nendif\n\nobj_c := $(filter-out $(filtout_c),$(all_c))\nobj_cpp := $(filter-out $(filtout_cpp),$(all_cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n    -I$(obj)/../../nv_section/userdata_section \\\n    -I$(obj)/../../nv_section/include \\\n    -I$(obj)/../platform/cmsis/inc \\\n    -Iutils/crc32 \\\n    $(BT_IF_INCLUDES) \\\n    -Iutils/hexdump \\\n    -Iapps/key \\\n    -Iservices/bt_app \\\n    -Iplatform/drivers/ana \\\n    -Iservices/nv_section/customparam_section \\\n    -Iservices/nv_section/factory_section \\\n    -Iservices/ble_stack/common/api \\\n    -Iservices/ble_stack/ble_ip \\\n    -Iutils/heap \\\n    -Iservices/nvrecord \\\n    -Iservices/norflash_api \\\n    -Iservices/nv_setion/userdata_section \\\n    -Iservices/voicepath/gsound/gsound_target_api_read_only \\\n    -Iservices/voicepath/gsound/gsound_custom/inc \\\n    -Iplatform/drivers/norflash \\\n    -Iplatform/hal \\\n    -Iplatform/cmsis/inc \\\n    -Iservices/osif/ \\\n    -Iservices/ota \\\n    -Iutils/cqueue \\\n    -Iservices/nv_section \\\n    -Iutils/aes_cmac\n\nccflags-y += -DAUDIO_OUTPUT_VOLUME_DEFAULT=$(AUDIO_OUTPUT_VOLUME_DEFAULT)\n\nifeq ($(FLASH_SUSPEND),1)\nccflags-y += -DFLASH_SUSPEND\nendif\n\nifeq ($(TX_IQ_CAL),1)\nsubdir-ccflags-y += -DTX_IQ_CAL\nendif\n\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_ble.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_ble.h\"\n#include \"besbt.h\"\n#include \"co_math.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord_extension.h\"\n#include \"tgt_hardware.h\"\n#include \n#include \n#include \n\n#define ble_nv_debug\n#ifdef ble_nv_debug\n#define ble_trace TRACE\n#else\n#define ble_trace\n#endif\n\nstatic NV_RECORD_PAIRED_BLE_DEV_INFO_T *nvrecord_ble_p = NULL;\nstatic uint8_t INVALID_ADDR[BTIF_BD_ADDR_SIZE] = {0x00, 0x00, 0x00,\n                                                  0x00, 0x00, 0x00};\n\nvoid nvrecord_rebuild_paired_ble_dev_info(\n    NV_RECORD_PAIRED_BLE_DEV_INFO_T *pPairedBtInfo) {\n  memset((uint8_t *)pPairedBtInfo, 0, sizeof(NV_RECORD_PAIRED_BLE_DEV_INFO_T));\n  pPairedBtInfo->saved_list_num = 0; // init saved num\n\n  uint8_t index;\n  // avoid ble irk collision low probability\n  uint32_t generatedSeed = hal_sys_timer_get();\n  for (uint8_t index = 0; index < sizeof(bt_addr); index++) {\n    generatedSeed ^=\n        (((uint32_t)(bt_addr[index])) << (hal_sys_timer_get() & 0xF));\n  }\n  srand(generatedSeed);\n\n  // generate a new IRK\n  for (index = 0; index < BLE_IRK_SIZE; index++) {\n    pPairedBtInfo->self_info.ble_irk[index] = (uint8_t)co_rand_word();\n  }\n}\n\nstatic bool blerec_specific_value_prepare(const BleDeviceinfo *param_rec) {\n  // Preparations before adding new ble record:\n  // 1. If not existing. Check the record count. If it's BLE_RECORD_NUM,\n  //     move 0-(BLE_RECORD_NUM-2) right side by one slot, to discard the last\n  //     one and leave slot 0, decrease the record number. If it's smaller than\n  //     BLE_RECORD_NUM, move 0-(count-1) right side by one slot, leave slot 0,\n  //     don't change the record number.\n  // 2. If existing already and the location is entryToFree , move\n  // 0-(entryToFree-1)\n  //        right side by one slot, leave slot 0. Decrease the record number for\n  //        adding the new one.\n\n  bool isEntryExisting = false;\n  uint8_t entryToFree = 0;\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T *dest_ptr;\n\n  dest_ptr = nvrecord_ble_p;\n  TRACE(3, \"%s start search addr %p  list_num=%d\", __func__, dest_ptr,\n        dest_ptr->saved_list_num);\n\n  if (dest_ptr->saved_list_num > 0) {\n    for (uint8_t i = 0; i < dest_ptr->saved_list_num; i++) {\n      if (0 == memcmp(dest_ptr->ble_nv[i].peer_bleAddr, param_rec->peer_bleAddr,\n                      BLE_ADDR_SIZE)) {\n        ble_trace(2, \"%s Find the existing entry %d\", __func__, i);\n        DUMP8(\"%02x \", (uint8_t *)param_rec, sizeof(BleDeviceinfo));\n        DUMP8(\"%02x \", (uint8_t *)&dest_ptr->ble_nv[i], sizeof(BleDeviceinfo));\n        if (!memcmp((uint8_t *)param_rec, (uint8_t *)&dest_ptr->ble_nv[i],\n                    sizeof(BleDeviceinfo))) {\n          ble_trace(\n              0, \"The new coming BLE device info is the same as the recorded.\");\n          return false;\n        }\n        memset(&(dest_ptr->ble_nv[i]), 0, sizeof(BleDeviceinfo));\n        entryToFree = i;\n        dest_ptr->saved_list_num--;\n        isEntryExisting = true;\n        break;\n      }\n    }\n  } else {\n    return true;\n  }\n\n  if (!isEntryExisting) {\n    if (BLE_RECORD_NUM == dest_ptr->saved_list_num) {\n      TRACE(0, \"<=====>blerec list is full,delete the oldest and add param_rec \"\n               \"to list\");\n      for (uint8_t k = 0; k < BLE_RECORD_NUM - 1; k++) {\n        memcpy(&(dest_ptr->ble_nv[BLE_RECORD_NUM - 1 - k]),\n               &(dest_ptr->ble_nv[BLE_RECORD_NUM - 2 - k]),\n               sizeof(BleDeviceinfo));\n      }\n      dest_ptr->saved_list_num--;\n    } else {\n      for (uint8_t k = 0; k < dest_ptr->saved_list_num; k++) {\n        memcpy(&(dest_ptr->ble_nv[dest_ptr->saved_list_num - k]),\n               &(dest_ptr->ble_nv[dest_ptr->saved_list_num - 1 - k]),\n               sizeof(BleDeviceinfo));\n      }\n    }\n  } else {\n    for (uint8_t list_updata = 0; list_updata < entryToFree; list_updata++) {\n      memcpy(&(dest_ptr->ble_nv[entryToFree - list_updata]),\n             &(dest_ptr->ble_nv[entryToFree - list_updata - 1]),\n             sizeof(BleDeviceinfo));\n    }\n  }\n\n  return true;\n}\n\nvoid nv_record_blerec_init(void) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (NULL == nvrecord_ble_p) {\n    nvrecord_ble_p = &(nvrecord_extension_p->ble_pair_info);\n    if (!memcmp(nvrecord_ble_p->self_info.ble_addr, INVALID_ADDR,\n                BTIF_BD_ADDR_SIZE)) {\n      memcpy(nvrecord_ble_p->self_info.ble_addr, bt_get_ble_local_address(),\n             BTIF_BD_ADDR_SIZE);\n    }\n  }\n  nv_record_post_write_operation(lock);\n}\n\nNV_RECORD_PAIRED_BLE_DEV_INFO_T *nv_record_blerec_get_ptr(void) {\n  return nvrecord_ble_p;\n}\n\nvoid nv_record_blerec_get_local_irk(uint8_t *pIrk) {\n  memcpy(pIrk, nvrecord_ble_p->self_info.ble_irk, BLE_IRK_SIZE);\n}\n\nbool nv_record_blerec_get_bd_addr_from_irk(uint8_t *pBdAddr, uint8_t *pIrk) {\n  if (nvrecord_ble_p->saved_list_num > 0) {\n    for (uint8_t index = 0; index < nvrecord_ble_p->saved_list_num; index++) {\n      if (!memcmp(pIrk, nvrecord_ble_p->ble_nv[index].IRK, BLE_IRK_SIZE)) {\n        memcpy(pBdAddr, nvrecord_ble_p->ble_nv[index].peer_bleAddr,\n               BLE_ADDR_SIZE);\n        return true;\n      }\n    }\n    return false;\n  } else {\n    return false;\n  }\n}\n\nint nv_record_blerec_add(const BleDeviceinfo *param_rec) {\n  int nRet = 0;\n\n  uint8_t isNeedToUpdateNv = true;\n  isNeedToUpdateNv = blerec_specific_value_prepare(param_rec);\n\n  if (isNeedToUpdateNv) {\n    uint32_t lock = nv_record_pre_write_operation();\n\n    // add device info into nv struct\n    memcpy(nvrecord_ble_p->ble_nv[0].peer_bleAddr, param_rec->peer_bleAddr,\n           BLE_ADDR_SIZE);                            // addr\n    nvrecord_ble_p->ble_nv[0].EDIV = param_rec->EDIV; // EDIV\n    memcpy(nvrecord_ble_p->ble_nv[0].RANDOM, param_rec->RANDOM,\n           BLE_ENC_RANDOM_SIZE); // RANDOM\n    memcpy(nvrecord_ble_p->ble_nv[0].LTK, param_rec->LTK, BLE_LTK_SIZE); // LTK\n    memcpy(nvrecord_ble_p->ble_nv[0].IRK, param_rec->IRK, BLE_IRK_SIZE); // IRK\n    nvrecord_ble_p->ble_nv[0].bonded = param_rec->bonded; // bond status\n    nvrecord_ble_p->saved_list_num++;                     // updata saved num\n    nv_record_post_write_operation(lock);\n\n    nv_record_update_runtime_userdata();\n    nv_record_flash_flush();\n    TRACE(2, \"%s CURRENT BLE LIST NUM=%d\", __func__,\n          nvrecord_ble_p->saved_list_num);\n  }\n\n#ifdef ble_nv_debug\n  for (uint8_t k = 0; k < nvrecord_ble_p->saved_list_num; k++) {\n    TRACE(0, \"=========================================\");\n    TRACE(1, \"Num %d BLE record:\", k);\n    TRACE(0, \"BLE addr:\");\n    DUMP8(\"%02x \", (uint8_t *)nvrecord_ble_p->ble_nv[k].peer_bleAddr,\n          BLE_ADDR_SIZE);\n    TRACE(1, \"NV EDIV %d and random is:\", nvrecord_ble_p->ble_nv[k].EDIV);\n    DUMP8(\"%02x \", (uint8_t *)nvrecord_ble_p->ble_nv[k].RANDOM,\n          BLE_ENC_RANDOM_SIZE);\n    TRACE(0, \"NV LTK:\");\n    DUMP8(\"%02x \", (uint8_t *)nvrecord_ble_p->ble_nv[k].LTK, BLE_LTK_SIZE);\n    TRACE(0, \"NV irk:\");\n    DUMP8(\"%02x \", (uint8_t *)nvrecord_ble_p->ble_nv[k].IRK, BLE_IRK_SIZE);\n  }\n#endif\n  return nRet;\n}\n\nuint8_t nv_record_ble_fill_irk(uint8_t *irkToFill) {\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T *find_ptr = nvrecord_ble_p;\n\n  if ((NULL == find_ptr) || (0 == find_ptr->saved_list_num)) {\n    return 0;\n  }\n\n  if (find_ptr->saved_list_num > 0) {\n    for (uint8_t index = 0; index < find_ptr->saved_list_num; index++) {\n      memcpy(irkToFill + index * BLE_IRK_SIZE, find_ptr->ble_nv[index].IRK,\n             BLE_IRK_SIZE);\n    }\n    return find_ptr->saved_list_num;\n  } else {\n    return 0;\n  }\n}\n\n// when master send encription req,if bonded,use ltk to bonding again(skip the\n// pair step)\nbool nv_record_ble_record_find_ltk_through_static_bd_addr(uint8_t *pBdAddr,\n                                                          uint8_t *ltk) {\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T *find_ptr = nvrecord_ble_p;\n\n  if ((NULL == find_ptr) || (0 == find_ptr->saved_list_num)) {\n    TRACE(3, \"%s find data failed, ptr:%x, list_num:%d\", __func__,\n          (uint32_t)find_ptr, find_ptr->saved_list_num);\n    return false;\n  }\n\n  for (uint8_t find_index = 0; find_index < find_ptr->saved_list_num;\n       find_index++) {\n    if (!memcmp(find_ptr->ble_nv[find_index].peer_bleAddr, pBdAddr,\n                BLE_ADDR_SIZE)) {\n      ble_trace(2, \"%s FIND LTK IN NV SUCCESS %p\", __func__,\n                find_ptr->ble_nv[find_index].LTK);\n      memcpy(ltk, find_ptr->ble_nv[find_index].LTK, BLE_LTK_SIZE);\n      return true;\n    }\n  }\n  return false;\n}\n\nbool nv_record_ble_record_Once_a_device_has_been_bonded(void) {\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T *find_ptr = nvrecord_ble_p;\n\n  if ((NULL == find_ptr) || (0 == find_ptr->saved_list_num)) {\n    return false;\n  }\n\n  for (uint8_t find_index = 0; find_index < find_ptr->saved_list_num;\n       find_index++) {\n    if (find_ptr->ble_nv[find_index].bonded == true) {\n      return true;\n    }\n  }\n  return false;\n}\n\nvoid nv_record_ble_delete_entry(uint8_t *pBdAddr) {\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T *find_ptr = nvrecord_ble_p;\n\n  if ((NULL == find_ptr) || (0 == find_ptr->saved_list_num)) {\n    return;\n  }\n\n  int8_t indexToDelete = -1;\n\n  for (uint8_t find_index = 0; find_index < find_ptr->saved_list_num;\n       find_index++) {\n    if (!memcmp(find_ptr->ble_nv[find_index].peer_bleAddr, pBdAddr,\n                BLE_ADDR_SIZE)) {\n      indexToDelete = find_index;\n      break;\n    }\n  }\n\n  if (indexToDelete >= 0) {\n    uint32_t lock = nv_record_pre_write_operation();\n\n    uint8_t index;\n    for (index = indexToDelete; index < find_ptr->saved_list_num - 1; index++) {\n      memcpy(&(find_ptr->ble_nv[index]), &(find_ptr->ble_nv[index + 1]),\n             sizeof(BleDeviceinfo));\n    }\n\n    memset((uint8_t *)&(find_ptr->ble_nv[index]), 0, sizeof(BleDeviceinfo));\n    find_ptr->saved_list_num--;\n    nv_record_update_runtime_userdata();\n\n    nv_record_post_write_operation(lock);\n  }\n}\n\n#ifdef TWS_SYSTEM_ENABLED\nstatic bool tws_use_same_ble_addr(uint8_t *peer_ble_addr) {\n  TRACE(1, \"[%s] peer addr:\", __func__);\n  DUMP8(\"%x \", peer_ble_addr, BTIF_BD_ADDR_SIZE);\n\n  NV_EXTENSION_RECORD_T *pNvExtRec = nv_record_get_extension_entry_ptr();\n\n  if (!memcmp(pNvExtRec->ble_pair_info.self_info.ble_addr, peer_ble_addr,\n              BTIF_BD_ADDR_SIZE)) {\n    return true;\n  }\n\n  return false;\n}\n\nvoid nv_record_extension_update_tws_ble_info(\n    NV_RECORD_PAIRED_BLE_DEV_INFO_T *info) {\n  ASSERT(info, \"null pointer received in [%s]\", __func__);\n\n  bool isNvExtentionPendingForUpdate = false;\n  NV_EXTENSION_RECORD_T *pNvExtRec = nv_record_get_extension_entry_ptr();\n\n  /// disable the MPU protection for write operation\n  uint32_t lock = nv_record_pre_write_operation();\n\n  if (tws_use_same_ble_addr(info->self_info.ble_addr)) {\n    if (memcmp(&pNvExtRec->ble_pair_info.self_info, &info->self_info,\n               sizeof(BLE_BASIC_INFO_T))) {\n      TRACE(0, \"save the peer ble info to self_info\");\n\n      memcpy(&pNvExtRec->ble_pair_info.self_info, &info->self_info,\n             sizeof(BLE_BASIC_INFO_T));\n      nv_record_extension_update();\n      isNvExtentionPendingForUpdate = true;\n    }\n  }\n\n  if (memcmp(&pNvExtRec->tws_info.ble_info, &info->self_info,\n             sizeof(BLE_BASIC_INFO_T))) {\n    TRACE(0, \"save the peer ble info to tws_info\");\n\n    memcpy(&pNvExtRec->tws_info.ble_info, &info->self_info,\n           sizeof(BLE_BASIC_INFO_T));\n    nv_record_extension_update();\n    isNvExtentionPendingForUpdate = true;\n  }\n\n  if (isNvExtentionPendingForUpdate) {\n    nv_record_flash_flush();\n  }\n\n  /// enable the MPU protection after the write operation\n  nv_record_post_write_operation(lock);\n\n  TRACE(0, \"peer addr:\");\n  DUMP8(\"0x%02x \", pNvExtRec->tws_info.ble_info.ble_addr, BTIF_BD_ADDR_SIZE);\n  TRACE(0, \"peer irk\");\n  DUMP8(\"0x%02x \", pNvExtRec->tws_info.ble_info.ble_irk, BLE_IRK_SIZE);\n}\n\nvoid nv_record_tws_exchange_ble_info(void) {\n  TRACE(1, \"[%s]+++\", __func__);\n  NV_EXTENSION_RECORD_T *pNvExtRec = nv_record_get_extension_entry_ptr();\n  uint8_t ble_address[6] = {0, 0, 0, 0, 0, 0};\n\n  if (tws_use_same_ble_addr(pNvExtRec->tws_info.ble_info.ble_addr)) {\n    TRACE(0, \"tws use same ble addr\");\n    return;\n  }\n\n  if (!memcmp(pNvExtRec->tws_info.ble_info.ble_addr, ble_address,\n              BTIF_BD_ADDR_SIZE)) {\n    TRACE(0, \"don't have tws ble addr\");\n    return;\n  }\n\n  /// disable the MPU protection for write operation\n  uint32_t lock = nv_record_pre_write_operation();\n\n#ifdef BLE_USE_RPA\n  uint8_t temp_ble_irk[BLE_IRK_SIZE];\n  memcpy(temp_ble_irk, pNvExtRec->ble_pair_info.self_info.ble_irk,\n         BLE_IRK_SIZE);\n  memcpy(pNvExtRec->ble_pair_info.self_info.ble_irk,\n         pNvExtRec->tws_info.ble_info.ble_irk, BLE_IRK_SIZE);\n  memcpy(pNvExtRec->tws_info.ble_info.ble_irk, temp_ble_irk, BLE_IRK_SIZE);\n  TRACE(0, \"current local ble irk:\");\n  DUMP8(\"0x%02x \", pNvExtRec->ble_pair_info.self_info.ble_irk, BLE_IRK_SIZE);\n#else\n  uint8_t temp_ble_addr[BTIF_BD_ADDR_SIZE];\n  memcpy(temp_ble_addr, pNvExtRec->ble_pair_info.self_info.ble_addr,\n         BTIF_BD_ADDR_SIZE);\n  memcpy(pNvExtRec->ble_pair_info.self_info.ble_addr,\n         pNvExtRec->tws_info.ble_info.ble_addr, BTIF_BD_ADDR_SIZE);\n  memcpy(pNvExtRec->tws_info.ble_info.ble_addr, temp_ble_addr,\n         BTIF_BD_ADDR_SIZE);\n  memcpy(bt_get_ble_local_address(),\n         pNvExtRec->ble_pair_info.self_info.ble_addr, BTIF_BD_ADDR_SIZE);\n  TRACE(0, \"current local ble addr:\");\n  DUMP8(\"0x%02x \", pNvExtRec->ble_pair_info.self_info.ble_addr,\n        BTIF_BD_ADDR_SIZE);\n\n  bt_set_ble_local_address(pNvExtRec->ble_pair_info.self_info.ble_addr);\n#endif\n\n  nv_record_extension_update();\n\n  /// enable the MPU protection after the write operation\n  nv_record_post_write_operation(lock);\n\n  TRACE(1, \"[%s]---\", __func__);\n}\n\nuint8_t *nv_record_tws_get_self_ble_info(void) {\n  TRACE(1, \"[%s]+++\", __func__);\n  NV_EXTENSION_RECORD_T *pNvExtRec = nv_record_get_extension_entry_ptr();\n\n  TRACE(0, \"current local ble addr:\");\n  DUMP8(\"0x%02x \", pNvExtRec->ble_pair_info.self_info.ble_addr,\n        BTIF_BD_ADDR_SIZE);\n\n  TRACE(1, \"[%s]---\", __func__);\n  return pNvExtRec->ble_pair_info.self_info.ble_addr;\n}\n\nuint8_t *nv_record_tws_get_peer_ble_addr(void) {\n  TRACE(1, \"[%s]+++\", __func__);\n  NV_EXTENSION_RECORD_T *pNvExtRec = nv_record_get_extension_entry_ptr();\n\n  TRACE(0, \"current peer ble addr:\");\n  DUMP8(\"0x%02x \", pNvExtRec->ble_pair_info.ble_nv[0].peer_bleAddr,\n        BTIF_BD_ADDR_SIZE);\n\n  TRACE(1, \"[%s]---\", __func__);\n  return pNvExtRec->ble_pair_info.ble_nv[0].peer_bleAddr;\n}\n\n#endif\n\n#endif //#if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_ble.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(NEW_NV_RECORD_ENABLED)\n\n#ifndef NVRECORD_BLE_H\n#define NVRECORD_BLE_H\n\n#include \"nvrecord_extension.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nint nv_record_blerec_add(const BleDeviceinfo *param_rec);\nbool nv_record_ble_record_find_ltk_through_static_bd_addr(uint8_t* pBdAddr, uint8_t *ltk);\nbool nv_record_ble_record_Once_a_device_has_been_bonded(void);\nvoid nv_record_ble_delete_entry(uint8_t* pBdAddr);\nuint8_t nv_record_ble_fill_irk(uint8_t* ltkToFill);\nvoid nv_record_blerec_init(void);\nNV_RECORD_PAIRED_BLE_DEV_INFO_T* nv_record_blerec_get_ptr(void);\nvoid nv_record_blerec_get_local_irk(uint8_t* pIrk);\nbool nv_record_blerec_get_bd_addr_from_irk(uint8_t* pBdAddr, uint8_t* pIrk);\nvoid nvrecord_rebuild_paired_ble_dev_info(NV_RECORD_PAIRED_BLE_DEV_INFO_T* pPairedBtInfo);\n\n#ifdef TWS_SYSTEM_ENABLED\nvoid nv_record_extension_update_tws_ble_info(NV_RECORD_PAIRED_BLE_DEV_INFO_T *info);\nvoid nv_record_tws_exchange_ble_info(void);\nuint8_t *nv_record_tws_get_self_ble_info(void);\nuint8_t *nv_record_tws_get_peer_ble_addr(void);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif \n#endif // #if defined(NEW_NV_RECORD_ENABLED)\n\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_bt.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_bt.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord_extension.h\"\n#include \n#include \n#include \n\nvoid ram_record_ddbrec_init(void) {}\n\nvoid nvrecord_rebuild_paired_bt_dev_info(\n    NV_RECORD_PAIRED_BT_DEV_INFO_T *pPairedBtInfo) {\n  memset((uint8_t *)pPairedBtInfo, 0, sizeof(NV_RECORD_PAIRED_BT_DEV_INFO_T));\n\n  pPairedBtInfo->pairedDevNum = 0;\n}\n\nvoid nv_record_btdevicerecord_set_a2dp_profile_active_state(\n    btdevice_profile *device_plf, bool isActive) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (isActive != device_plf->a2dp_act) {\n    nv_record_update_runtime_userdata();\n  }\n  device_plf->a2dp_act = isActive;\n\n  nv_record_post_write_operation(lock);\n}\n\nvoid nv_record_btdevicerecord_set_hfp_profile_active_state(\n    btdevice_profile *device_plf, bool isActive) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (isActive != device_plf->hfp_act) {\n    nv_record_update_runtime_userdata();\n  }\n  device_plf->hfp_act = isActive;\n\n  nv_record_post_write_operation(lock);\n}\n\nvoid nv_record_btdevicerecord_set_hsp_profile_active_state(\n    btdevice_profile *device_plf, bool isActive) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (isActive != device_plf->hsp_act) {\n    nv_record_update_runtime_userdata();\n  }\n  device_plf->hsp_act = isActive;\n\n  nv_record_post_write_operation(lock);\n}\n\nvoid nv_record_btdevicerecord_set_a2dp_profile_codec(\n    btdevice_profile *device_plf, uint8_t a2dpCodec) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (a2dpCodec != device_plf->a2dp_codectype) {\n    nv_record_update_runtime_userdata();\n  }\n  device_plf->a2dp_codectype = a2dpCodec;\n\n  nv_record_post_write_operation(lock);\n}\n\nint nv_record_get_paired_dev_count(void) {\n  if (NULL == nvrecord_extension_p) {\n    return 0;\n  }\n\n  return nvrecord_extension_p->bt_pair_info.pairedDevNum;\n}\n\n/*\nreturn:\n    -1:     enum dev failure.\n    0:      without paired dev.\n    1:      only 1 paired dev,store@record1.\n    2:      get 2 paired dev.notice:record1 is the latest record.\n*/\nint nv_record_enum_latest_two_paired_dev(btif_device_record_t *record1,\n                                         btif_device_record_t *record2) {\n  if ((NULL == record1) || (NULL == record2) ||\n      (NULL == nvrecord_extension_p)) {\n    return -1;\n  }\n\n  if (nvrecord_extension_p->bt_pair_info.pairedDevNum > 0) {\n    if (1 == nvrecord_extension_p->bt_pair_info.pairedDevNum) {\n      memcpy(\n          (uint8_t *)record1,\n          (uint8_t *)&(nvrecord_extension_p->bt_pair_info.pairedBtDevInfo[0]),\n          sizeof(btif_device_record_t));\n      return 1;\n    } else {\n      memcpy(\n          (uint8_t *)record1,\n          (uint8_t *)&(nvrecord_extension_p->bt_pair_info.pairedBtDevInfo[0]),\n          sizeof(btif_device_record_t));\n      memcpy(\n          (uint8_t *)record2,\n          (uint8_t *)&(nvrecord_extension_p->bt_pair_info.pairedBtDevInfo[1]),\n          sizeof(btif_device_record_t));\n      return 2;\n    }\n  } else {\n    return 0;\n  }\n}\n\nstatic void nv_record_print_dev_record(const btif_device_record_t *record) {\n  TRACE(0, \"nv record bdAddr = \");\n  DUMP8(\"%02x \", record->bdAddr.address, sizeof(record->bdAddr.address));\n  TRACE(0, \"record_trusted = \");\n  DUMP8(\"%d \", &record->trusted, sizeof((uint8_t)record->trusted));\n  TRACE(0, \"record_linkKey = \");\n  DUMP8(\"%02x \", record->linkKey, sizeof(record->linkKey));\n  TRACE(0, \"record_keyType = \");\n  DUMP8(\"%x \", &record->keyType, sizeof(record->keyType));\n  TRACE(0, \"record_pinLen = \");\n  DUMP8(\"%x \", &record->pinLen, sizeof(record->pinLen));\n}\n\nvoid nv_record_all_ddbrec_print(void) {\n  if (NULL == nvrecord_extension_p) {\n    TRACE(0, \"No BT paired dev.\");\n    return;\n  }\n\n  if (nvrecord_extension_p->bt_pair_info.pairedDevNum > 0) {\n    for (uint8_t tmp_i = 0;\n         tmp_i < nvrecord_extension_p->bt_pair_info.pairedDevNum; tmp_i++) {\n      btif_device_record_t record;\n      bt_status_t ret_status;\n      ret_status = nv_record_enum_dev_records(tmp_i, &record);\n      if (BT_STS_SUCCESS == ret_status) {\n        nv_record_print_dev_record(&record);\n      }\n    }\n  } else {\n    TRACE(0, \"No BT paired dev.\");\n  }\n}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nbt_status_t nv_record_enum_dev_records(unsigned short index,\n                                       btif_device_record_t *record) {\n  btif_device_record_t *recaddr = NULL;\n\n  if ((index >= nvrecord_extension_p->bt_pair_info.pairedDevNum) ||\n      (NULL == nvrecord_extension_p)) {\n    return BT_STS_FAILED;\n  }\n\n  recaddr = (btif_device_record_t *)&(\n      nvrecord_extension_p->bt_pair_info.pairedBtDevInfo[index].record);\n  memcpy(record, recaddr, sizeof(btif_device_record_t));\n  nv_record_print_dev_record(record);\n  return BT_STS_SUCCESS;\n}\n\nstatic int8_t nv_record_get_bt_pairing_info_index(const uint8_t *btAddr) {\n  NV_RECORD_PAIRED_BT_DEV_INFO_T *pBtDevInfo =\n      (NV_RECORD_PAIRED_BT_DEV_INFO_T *)(&(nvrecord_extension_p->bt_pair_info));\n\n  for (uint8_t index = 0; index < pBtDevInfo->pairedDevNum; index++) {\n    if (!memcmp(pBtDevInfo->pairedBtDevInfo[index].record.bdAddr.address,\n                btAddr, BTIF_BD_ADDR_SIZE)) {\n      return (int8_t)index;\n    }\n  }\n\n  return -1;\n}\n\n/**********************************************\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n**********************************************/\nstatic bt_status_t POSSIBLY_UNUSED\nnv_record_ddbrec_add(const btif_device_record_t *param_rec) {\n  if ((NULL == param_rec) || (NULL == nvrecord_extension_p)) {\n    return BT_STS_FAILED;\n  }\n\n  uint32_t lock = nv_record_pre_write_operation();\n\n  bool isFlushNv = false;\n\n  // try to find the entry\n  int8_t indexOfEntry = -1;\n  NV_RECORD_PAIRED_BT_DEV_INFO_T *pBtDevInfo =\n      (NV_RECORD_PAIRED_BT_DEV_INFO_T *)(&(nvrecord_extension_p->bt_pair_info));\n  indexOfEntry = nv_record_get_bt_pairing_info_index(param_rec->bdAddr.address);\n\n  if (-1 == indexOfEntry) {\n    // don't exist,  need to add to the head of the entry list\n    if (MAX_BT_PAIRED_DEVICE_COUNT == pBtDevInfo->pairedDevNum) {\n      for (uint8_t k = 0; k < MAX_BT_PAIRED_DEVICE_COUNT - 1; k++) {\n        memcpy((uint8_t *)&(\n                   pBtDevInfo\n                       ->pairedBtDevInfo[MAX_BT_PAIRED_DEVICE_COUNT - 1 - k]),\n               (uint8_t *)&(\n                   pBtDevInfo\n                       ->pairedBtDevInfo[MAX_BT_PAIRED_DEVICE_COUNT - 2 - k]),\n               sizeof(nvrec_btdevicerecord));\n      }\n      pBtDevInfo->pairedDevNum--;\n    } else {\n      for (uint8_t k = 0; k < pBtDevInfo->pairedDevNum; k++) {\n        memcpy(\n            (uint8_t *)&(\n                pBtDevInfo->pairedBtDevInfo[pBtDevInfo->pairedDevNum - k]),\n            (uint8_t *)&(\n                pBtDevInfo->pairedBtDevInfo[pBtDevInfo->pairedDevNum - 1 - k]),\n            sizeof(nvrec_btdevicerecord));\n      }\n    }\n\n    // fill the default value\n    nvrec_btdevicerecord *nvrec_pool_record = &(pBtDevInfo->pairedBtDevInfo[0]);\n    memcpy((uint8_t *)&(nvrec_pool_record->record), (uint8_t *)param_rec,\n           sizeof(btif_device_record_t));\n    nvrec_pool_record->device_vol.a2dp_vol =\n        NVRAM_ENV_STREAM_VOLUME_A2DP_VOL_DEFAULT;\n    nvrec_pool_record->device_vol.hfp_vol =\n        NVRAM_ENV_STREAM_VOLUME_HFP_VOL_DEFAULT;\n    nvrec_pool_record->device_plf.hfp_act = false;\n    nvrec_pool_record->device_plf.hsp_act = false;\n    nvrec_pool_record->device_plf.a2dp_act = false;\n#ifdef BTIF_DIP_DEVICE\n    nvrec_pool_record->vend_id = 0;\n    nvrec_pool_record->vend_id_source = 0;\n#endif\n\n    pBtDevInfo->pairedDevNum++;\n\n    // need to flush the nv record\n    isFlushNv = true;\n  } else {\n    // exist\n    // check whether it's already at the head\n    // if not, move it to the head\n    if (indexOfEntry > 0) {\n      nvrec_btdevicerecord record;\n      memcpy((uint8_t *)&record,\n             (uint8_t *)&(pBtDevInfo->pairedBtDevInfo[indexOfEntry]),\n             sizeof(record));\n\n      // if not, move it to the head\n      for (uint8_t k = 0; k < indexOfEntry; k++) {\n        memcpy((uint8_t *)&(pBtDevInfo->pairedBtDevInfo[indexOfEntry - k]),\n               (uint8_t *)&(pBtDevInfo->pairedBtDevInfo[indexOfEntry - 1 - k]),\n               sizeof(nvrec_btdevicerecord));\n      }\n\n      memcpy((uint8_t *)&(pBtDevInfo->pairedBtDevInfo[0]), (uint8_t *)&record,\n             sizeof(record));\n\n      // update the link info\n      memcpy((uint8_t *)&(pBtDevInfo->pairedBtDevInfo[0].record),\n             (uint8_t *)param_rec, sizeof(btif_device_record_t));\n\n      // need to flush the nv record\n      isFlushNv = true;\n    }\n    // else, check whether the link info needs to be updated\n    else {\n      if (memcmp((uint8_t *)&(pBtDevInfo->pairedBtDevInfo[0].record),\n                 (uint8_t *)param_rec, sizeof(btif_device_record_t))) {\n        // update the link info\n        memcpy((uint8_t *)&(pBtDevInfo->pairedBtDevInfo[0].record),\n               (uint8_t *)param_rec, sizeof(btif_device_record_t));\n\n        // need to flush the nv record\n        isFlushNv = true;\n      }\n    }\n  }\n\n  TRACE(1, \"paired Bt dev:%d\", pBtDevInfo->pairedDevNum);\n  TRACE(1, \"Is to flush nv: %d\", isFlushNv);\n  nv_record_all_ddbrec_print();\n\n  if (isFlushNv) {\n    nv_record_update_runtime_userdata();\n  }\n\n  nv_record_post_write_operation(lock);\n\n  return BT_STS_SUCCESS;\n}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nbt_status_t nv_record_add(SECTIONS_ADP_ENUM type, void *record) {\n  bt_status_t retstatus = BT_STS_FAILED;\n\n  if ((NULL == record) || (section_none == type)) {\n    return BT_STS_FAILED;\n  }\n\n  switch (type) {\n  case section_usrdata_ddbrecord:\n    retstatus = nv_record_ddbrec_add(record);\n    break;\n  default:\n    break;\n  }\n\n  return retstatus;\n}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nbt_status_t nv_record_ddbrec_find(const bt_bdaddr_t *bd_ddr,\n                                  btif_device_record_t *record) {\n  if ((NULL == bd_ddr) || (NULL == record) || (NULL == nvrecord_extension_p)) {\n    return BT_STS_FAILED;\n  }\n\n  int8_t indexOfEntry = -1;\n  NV_RECORD_PAIRED_BT_DEV_INFO_T *pBtDevInfo =\n      (NV_RECORD_PAIRED_BT_DEV_INFO_T *)(&(nvrecord_extension_p->bt_pair_info));\n  indexOfEntry = nv_record_get_bt_pairing_info_index(bd_ddr->address);\n\n  if (-1 == indexOfEntry) {\n    return BT_STS_FAILED;\n  } else {\n    memcpy((uint8_t *)record,\n           (uint8_t *)&(pBtDevInfo->pairedBtDevInfo[indexOfEntry].record),\n           sizeof(btif_device_record_t));\n    return BT_STS_SUCCESS;\n  }\n}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nbt_status_t nv_record_ddbrec_delete(const bt_bdaddr_t *bdaddr) {\n  if (NULL == nvrecord_extension_p) {\n    return BT_STS_FAILED;\n  }\n\n  int8_t indexOfEntry = -1;\n  NV_RECORD_PAIRED_BT_DEV_INFO_T *pBtDevInfo =\n      (NV_RECORD_PAIRED_BT_DEV_INFO_T *)(&(nvrecord_extension_p->bt_pair_info));\n  indexOfEntry = nv_record_get_bt_pairing_info_index(bdaddr->address);\n  if (-1 == indexOfEntry) {\n    return BT_STS_FAILED;\n  }\n\n  uint32_t lock = nv_record_pre_write_operation();\n\n  for (uint8_t k = 0; k < pBtDevInfo->pairedDevNum - indexOfEntry - 1; k++) {\n    memcpy((uint8_t *)&(pBtDevInfo->pairedBtDevInfo[indexOfEntry + k]),\n           (uint8_t *)&(pBtDevInfo->pairedBtDevInfo[indexOfEntry + 1 + k]),\n           sizeof(nvrec_btdevicerecord));\n  }\n\n  memset(\n      (uint8_t *)&(pBtDevInfo->pairedBtDevInfo[pBtDevInfo->pairedDevNum - 1]),\n      0, sizeof(nvrec_btdevicerecord));\n  pBtDevInfo->pairedDevNum--;\n\n  nv_record_update_runtime_userdata();\n\n  nv_record_post_write_operation(lock);\n  return BT_STS_SUCCESS;\n}\n\nint nv_record_btdevicerecord_find(const bt_bdaddr_t *bd_ddr,\n                                  nvrec_btdevicerecord **record) {\n  if ((NULL == bd_ddr) || (NULL == record) || (NULL == nvrecord_extension_p)) {\n    return -1;\n  }\n\n  int8_t indexOfEntry = -1;\n  NV_RECORD_PAIRED_BT_DEV_INFO_T *pBtDevInfo =\n      (NV_RECORD_PAIRED_BT_DEV_INFO_T *)(&(nvrecord_extension_p->bt_pair_info));\n  indexOfEntry = nv_record_get_bt_pairing_info_index(bd_ddr->address);\n\n  if (-1 == indexOfEntry) {\n    return -1;\n  }\n\n  *record =\n      (nvrec_btdevicerecord *)&(pBtDevInfo->pairedBtDevInfo[indexOfEntry]);\n  return 0;\n}\n\nvoid nv_record_btdevicerecord_set_a2dp_vol(nvrec_btdevicerecord *pRecord,\n                                           int8_t vol) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (vol != pRecord->device_vol.a2dp_vol) {\n    nv_record_update_runtime_userdata();\n    pRecord->device_vol.a2dp_vol = vol;\n  }\n\n  nv_record_post_write_operation(lock);\n}\n\nvoid nv_record_btdevicerecord_set_hfp_vol(nvrec_btdevicerecord *pRecord,\n                                          int8_t vol) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (vol != pRecord->device_vol.hfp_vol) {\n    nv_record_update_runtime_userdata();\n    pRecord->device_vol.hfp_vol = vol;\n  }\n\n  nv_record_post_write_operation(lock);\n}\n\nvoid nv_record_btdevicevolume_set_a2dp_vol(btdevice_volume *device_vol,\n                                           int8_t vol) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (vol != device_vol->a2dp_vol) {\n    nv_record_update_runtime_userdata();\n    device_vol->a2dp_vol = vol;\n  }\n\n  nv_record_post_write_operation(lock);\n}\n\nvoid nv_record_btdevicevolume_set_hfp_vol(btdevice_volume *device_vol,\n                                          int8_t vol) {\n  uint32_t lock = nv_record_pre_write_operation();\n  if (vol != device_vol->hfp_vol) {\n    nv_record_update_runtime_userdata();\n    device_vol->hfp_vol = vol;\n  }\n\n  nv_record_post_write_operation(lock);\n}\n\nvoid nv_record_btdevicerecord_set_vend_id_and_source(\n    nvrec_btdevicerecord *pRecord, int16_t vend_id, int16_t vend_id_source) {\n#ifdef BTIF_DIP_DEVICE\n  TRACE(2, \"%s vend id 0x%x\", __func__, vend_id);\n  uint32_t lock = nv_record_pre_write_operation();\n  if (vend_id != pRecord->vend_id) {\n    nv_record_update_runtime_userdata();\n    pRecord->vend_id = vend_id;\n    pRecord->vend_id_source = vend_id_source;\n  }\n\n  nv_record_post_write_operation(lock);\n#endif\n}\n\n#endif //#if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_bt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(NEW_NV_RECORD_ENABLED)\n\n#ifndef NVRECORD_BT_H\n#define NVRECORD_BT_H\n\n#include \"nvrecord_extension.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define NVRAM_ENV_STREAM_VOLUME_A2DP_VOL_DEFAULT (AUDIO_OUTPUT_VOLUME_DEFAULT)\n#define NVRAM_ENV_STREAM_VOLUME_HFP_VOL_DEFAULT (AUDIO_OUTPUT_VOLUME_DEFAULT)\n\nvoid nv_record_btdevicerecord_set_a2dp_vol(nvrec_btdevicerecord* pRecord, int8_t vol);\nvoid nv_record_btdevicerecord_set_hfp_vol(nvrec_btdevicerecord* pRecord, int8_t vol);\nvoid nv_record_btdevicevolume_set_a2dp_vol(btdevice_volume* device_vol, int8_t vol);\nvoid nv_record_btdevicevolume_set_hfp_vol(btdevice_volume* device_vol, int8_t vol);\nvoid nv_record_btdevicerecord_set_vend_id_and_source(nvrec_btdevicerecord* pRecord, int16_t vend_id, int16_t vend_id_source);\nvoid nv_record_btdevicerecord_set_a2dp_profile_active_state(btdevice_profile* device_plf, bool isActive);\nvoid nv_record_btdevicerecord_set_hfp_profile_active_state(btdevice_profile* device_plf, bool isActive);\nvoid nv_record_btdevicerecord_set_hsp_profile_active_state(btdevice_profile* device_plf, bool isActive);\nint nv_record_enum_latest_two_paired_dev(btif_device_record_t* record1,btif_device_record_t* record2);\nvoid nv_record_all_ddbrec_print(void);\nvoid nv_record_update_runtime_userdata(void);\nvoid nvrecord_rebuild_paired_bt_dev_info(NV_RECORD_PAIRED_BT_DEV_INFO_T* pPairedBtInfo);\nint nv_record_btdevicerecord_find(const bt_bdaddr_t *bd_ddr, nvrec_btdevicerecord **record);\nvoid nv_record_btdevicerecord_set_a2dp_profile_codec(btdevice_profile* device_plf, uint8_t a2dpCodec);\nbt_status_t nv_record_ddbrec_delete(const bt_bdaddr_t *bdaddr);\nbt_status_t nv_record_enum_dev_records(unsigned short index,btif_device_record_t* record);\nbt_status_t nv_record_ddbrec_find(const bt_bdaddr_t *bd_ddr, btif_device_record_t*record);\nbt_status_t nv_record_add(SECTIONS_ADP_ENUM type,void *record);\nint nv_record_get_paired_dev_count(void);\nvoid ram_record_ddbrec_init(void);\n#ifdef __cplusplus\n}\n#endif\n#endif\n#endif // #if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_dma_config.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef NEW_NV_RECORD_ENABLED\n\n#include \"nvrecord_dma_config.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_extension.h\"\n#include \n#include \n\n#ifdef NVREC_BAIDU_DATA_SECTION\nextern uint32_t *__factory_start;\n\nvoid nvrecord_rebuild_dma_configuration(NV_DMA_CONFIGURATION_T *pDmaConfig) {\n  memset((uint8_t *)pDmaConfig, 0, sizeof(NV_DMA_CONFIGURATION_T));\n  pDmaConfig->fmfreq = BAIDU_DATA_DEF_FM_FREQ;\n}\n\nint nvrec_baidu_data_init(void) {\n  if (NULL == nvrecord_extension_p) {\n    return -1;\n  }\n\n  uint32_t lock = nv_record_pre_write_operation();\n  nvrecord_rebuild_dma_configuration(&(nvrecord_extension_p->dma_config));\n  nv_record_update_runtime_userdata();\n  nv_record_post_write_operation(lock);\n  return 0;\n}\n\nint nvrec_get_fm_freq(void) {\n  if (NULL == nvrecord_extension_p) {\n    return -1;\n  }\n\n  int _fmfreq = nvrecord_extension_p->dma_config.fmfreq;\n\n  TRACE(2, \"%s:get fm freq %d\", __func__, _fmfreq);\n  return _fmfreq;\n}\n\nint nvrec_set_fm_freq(int fmfreq) {\n  if (NULL == nvrecord_extension_p) {\n    return -1;\n  }\n\n  uint32_t lock = nv_record_pre_write_operation();\n  nvrecord_extension_p->dma_config.fmfreq = fmfreq;\n  nv_record_update_runtime_userdata();\n  nv_record_post_write_operation(lock);\n\n#if defined(NVREC_BAIDU_DATA_FLUSH_DIRECT)\n  nv_record_flash_flush_int(false);\n#endif\n\n  return 0;\n}\n\nint nvrec_get_rand(char *rand) {\n  char _rand[BAIDU_DATA_RAND_LEN];\n  int8_t copy_len = 0;\n\n  if (NULL == rand) {\n    return 1;\n  }\n\n  if (NULL == nvrecord_extension_p) {\n    //_rand = BAIDU_DATA_DEF_RAND;\n    copy_len = (sizeof(BAIDU_DATA_DEF_RAND) < BAIDU_DATA_RAND_LEN)\n                   ? sizeof(BAIDU_DATA_DEF_RAND)\n                   : BAIDU_DATA_RAND_LEN;\n    memcpy(_rand, BAIDU_DATA_DEF_RAND, copy_len);\n  } else {\n    memcpy(_rand, nvrecord_extension_p->dma_config.rand, BAIDU_DATA_RAND_LEN);\n  }\n\n  memcpy(rand, _rand, BAIDU_DATA_RAND_LEN);\n  TRACE(2, \"%s:rand %s\", __func__, rand);\n  return 0;\n}\n\nint nvrec_set_rand(char *rand) {\n  if (NULL == rand) {\n    return -1;\n  }\n\n  if (NULL == nvrecord_extension_p) {\n    return -1;\n  }\n\n  uint32_t lock = nv_record_pre_write_operation();\n  memcpy(nvrecord_extension_p->dma_config.rand, rand, BAIDU_DATA_RAND_LEN);\n  nv_record_update_runtime_userdata();\n  nv_record_post_write_operation(lock);\n\n#if defined(NVREC_BAIDU_DATA_FLUSH_DIRECT)\n  nv_record_flash_flush_int(false);\n#endif\n\n  return 0;\n}\n\n//#define GET_SN_FROM_FACTORY\nint nvrec_dev_get_sn(char *sn) {\n\n  if (NULL == sn) {\n    return -1;\n  }\n#ifdef GET_SN_FROM_FACTORY\n  unsigned int sn_addr;\n  sn_addr = (unsigned int)(__factory_start + rev2_dev_prod_sn);\n#else\n  char sn_addr[BAIDU_DATA_SN_LEN] = \"01234567890123sf\";\n#endif\n  memcpy((void *)sn, (void *)sn_addr, BAIDU_DATA_SN_LEN);\n\n  return 0;\n}\n\n#endif // #ifdef NVREC_BAIDU_DATA_SECTION\n\n#endif // #ifdef NEW_NV_RECORD_ENABLED\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_dma_config.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef NEW_NV_RECORD_ENABLED\n#ifdef NVREC_BAIDU_DATA_SECTION\n\n#ifndef __NVRECORD_DMA_CONFIG_H__\n#define __NVRECORD_DMA_CONFIG_H__\n\n#include \"nvrecord_extension.h\"\n\n#define BAIDU_DATA_DEF_RAND \"abcdefghi\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nint nvrec_baidu_data_init(void);\nint nvrec_get_fm_freq(void);\nint nvrec_set_fm_freq(int fmfreq);\nint nvrec_get_rand(char *rand);\nint nvrec_set_rand(char *rand);\nvoid nvrecord_rebuild_dma_configuration(NV_DMA_CONFIGURATION_T* pDmaConfig);\nint nvrec_dev_get_sn(char *sn);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n#endif  // #ifdef NVREC_BAIDU_DATA_SECTION\n#endif  // #ifdef NEW_NV_RECORD_ENABLED\n\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_env.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_env.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord_extension.h\"\n#include \n#include \n#include \n\nstatic struct nvrecord_env_t localSystemInfo;\n\nvoid nvrecord_rebuild_system_env(struct nvrecord_env_t *pSystemEnv) {\n  memset((uint8_t *)pSystemEnv, 0, sizeof(struct nvrecord_env_t));\n\n  pSystemEnv->media_language.language = NVRAM_ENV_MEDIA_LANGUAGE_DEFAULT;\n  pSystemEnv->ibrt_mode.mode = NVRAM_ENV_TWS_MODE_DEFAULT;\n  pSystemEnv->ibrt_mode.tws_connect_success = 0;\n  pSystemEnv->factory_tester_status.status =\n      NVRAM_ENV_FACTORY_TESTER_STATUS_DEFAULT;\n\n  pSystemEnv->aiManagerInfo.voice_key_enable = false;\n  pSystemEnv->aiManagerInfo.setedCurrentAi = 0;\n  pSystemEnv->aiManagerInfo.aiStatusDisableFlag = 0;\n  pSystemEnv->aiManagerInfo.amaAssistantEnableStatus = 1;\n\n  localSystemInfo = *pSystemEnv;\n}\n\nint nv_record_env_get(struct nvrecord_env_t **nvrecord_env) {\n  if (NULL == nvrecord_env) {\n    return -1;\n  }\n\n  if (NULL == nvrecord_extension_p) {\n    return -1;\n  }\n\n  localSystemInfo = nvrecord_extension_p->system_info;\n  *nvrecord_env = &localSystemInfo;\n\n  return 0;\n}\n\nint nv_record_env_set(struct nvrecord_env_t *nvrecord_env) {\n  if (NULL == nvrecord_extension_p) {\n    return -1;\n  }\n\n  uint32_t lock = nv_record_pre_write_operation();\n  nvrecord_extension_p->system_info = *nvrecord_env;\n\n  nv_record_update_runtime_userdata();\n  nv_record_post_write_operation(lock);\n  return 0;\n}\n\nvoid nv_record_update_ibrt_info(uint32_t newMode, bt_bdaddr_t *ibrtPeerAddr) {\n  if (NULL == nvrecord_extension_p) {\n    return;\n  }\n\n  uint32_t lock = nv_record_pre_write_operation();\n\n  TRACE(2, \"##%s,%d\", __func__, newMode);\n  nvrecord_extension_p->system_info.ibrt_mode.mode = newMode;\n  memcpy(nvrecord_extension_p->system_info.ibrt_mode.record.bdAddr.address,\n         ibrtPeerAddr->address, BTIF_BD_ADDR_SIZE);\n\n  nv_record_update_runtime_userdata();\n  nv_record_post_write_operation(lock);\n}\n\nvoid nv_record_update_factory_tester_status(uint32_t status) {\n  if (NULL == nvrecord_extension_p) {\n    return;\n  }\n\n  uint32_t lock = nv_record_pre_write_operation();\n\n  nvrecord_extension_p->system_info.factory_tester_status.status = status;\n\n  nv_record_update_runtime_userdata();\n  nv_record_post_write_operation(lock);\n}\n\nint nv_record_env_init(void) {\n  nv_record_open(section_usrdata_ddbrecord);\n  return 0;\n}\n#endif // #if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_env.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(NEW_NV_RECORD_ENABLED)\n\n#ifndef NVRECORD_ENV_H\n#define NVRECORD_ENV_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"me_api.h\"\n#include \"nvrecord_extension.h\"\n\n#define NVRAM_ENV_MEDIA_LANGUAGE_DEFAULT (0)\n#define NVRAM_ENV_TWS_MODE_DEFAULT (0xff)\n#define NVRAM_ENV_FACTORY_TESTER_STATUS_DEFAULT (0xaabbccdd)\n#define NVRAM_ENV_FACTORY_TESTER_STATUS_TEST_PASS (0xffffaa55)\n\nint nv_record_env_init(void);\nint nv_record_env_get(struct nvrecord_env_t **nvrecord_env);\nint nv_record_env_set(struct nvrecord_env_t *nvrecord_env);\nvoid nv_record_update_ibrt_info(uint32_t newMode,bt_bdaddr_t *ibrtPeerAddr);\nvoid nvrecord_rebuild_system_env(struct nvrecord_env_t* pSystemEnv);\nvoid nv_record_update_factory_tester_status(uint32_t status);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n#endif // #if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_extension.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef NEW_NV_RECORD_ENABLED\n#include \"nvrecord_extension.h\"\n#include \"besbt.h\"\n#include \"cmsis.h\"\n#include \"crc32.h\"\n#include \"customparam_section.h\"\n#include \"hal_norflash.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"mpu.h\"\n#include \"norflash_api.h\"\n#include \"norflash_drv.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_bt.h\"\n#include \"nvrecord_dma_config.h\"\n#include \"nvrecord_env.h\"\n#include \"nvrecord_fp_account_key.h\"\n#include \n#include \n#include \n\nextern uint32_t __userdata_start[];\nextern uint32_t __userdata_end[];\nextern void nvrecord_rebuild_system_env(struct nvrecord_env_t *pSystemEnv);\nextern void nvrecord_rebuild_paired_bt_dev_info(\n    NV_RECORD_PAIRED_BT_DEV_INFO_T *pPairedBtInfo);\n#ifdef GFPS_ENABLED\nextern void\nnvrecord_rebuild_fp_account_key(NV_FP_ACCOUNT_KEY_RECORD_T *pFpAccountKey);\n#endif\n#ifdef NVREC_BAIDU_DATA_SECTION\nextern void\nnvrecord_rebuild_dma_configuration(NV_DMA_CONFIGURATION_T *pDmaConfig);\n#endif\n\ntypedef enum {\n  NV_STATE_IDLE,\n  NV_STATE_MAIN_ERASING,\n  NV_STATE_MAIN_ERASED,\n  NV_STATE_MAIN_WRITTING,\n  NV_STATE_MAIN_WRITTEN,\n  NV_STATE_MAIN_DONE,\n  NV_STATE_BAK_ERASING,\n  NV_STATE_BAK_ERASED,\n  NV_STATE_BAK_WRITTING,\n  NV_STATE_BAK_WRITTEN,\n  NV_STATE_BAK_DONE,\n} NV_STATE;\n\ntypedef struct {\n  bool is_update;\n  NV_STATE state;\n  uint32_t written_size;\n} NV_FLUSH_STATE;\n\nstatic NV_FLUSH_STATE nv_flsh_state;\nstatic bool nvrec_init = false;\nstatic uint32_t _user_data_main_start;\nstatic uint32_t _user_data_bak_start;\nstatic uint8_t _nv_burn_buf[NV_EXTENSION_PAGE_SIZE];\n\nNV_EXTENSION_RECORD_T *nvrecord_extension_p = NULL;\n\n/*\n *Note: the NV_EXTENSION_MIRROR_RAM_SIZE must be power of 2\n */\n#if defined(__ARM_ARCH_8M_MAIN__)\n#define __NV_BUF_MPU_ALIGNED __ALIGNED(0x20)\n#else\n/*\n * armv7 mpu require the address must be aligned to the section size and\n * the section size must be algined to power of 2\n */\n#define __NV_BUF_MPU_ALIGNED __ALIGNED(NV_EXTENSION_MIRROR_RAM_SIZE)\n#endif\n\nstatic NV_MIRROR_BUF_T local_extension_data __NV_BUF_MPU_ALIGNED\n    __attribute__((section(\".sram_data\"))) = {\n        .nv_record =\n            {\n                {\n                    // header\n                    NV_EXTENSION_MAGIC_NUMBER,\n                    NV_EXTENSION_MAJOR_VERSION,\n                    NV_EXTENSION_MINOR_VERSION,\n                    NV_EXTENSION_VALID_LEN,\n                    0,\n                },\n\n                {\n                    // system info\n                },\n\n                {// bt_pair_info\n                 0},\n\n                {\n                    // ble_pair_info\n\n                },\n\n#ifdef TWS_SYSTEM_ENABLED\n                {\n                    // tws_info\n\n                },\n#endif\n\n#ifdef GFPS_ENABLED\n                {// fp_account_key_rec\n                 0},\n#endif\n\n#ifdef NVREC_BAIDU_DATA_SECTION\n                {\n                    // dma_config\n                    BAIDU_DATA_DEF_FM_FREQ,\n                },\n#endif\n\n#ifdef TILE_DATAPATH\n                {{0}},\n#endif\n\n#ifdef OTA_ENABLED\n                {\n                    {\n                        0,\n                    },\n                },\n#endif\n\n#if defined(BISTO_ENABLED)\n                {\n                    true,\n                },\n#endif\n\n#if 1 // def TX_IQ_CAL\n                {\n                    BT_IQ_INVALID_MAGIC_NUM,\n                    {0},\n                    {0},\n                },\n#endif\n                // TODO:\n                // If want to extend the nvrecord while keeping the history\n                // information,\n                // append the new items to the tail of NV_EXTENSION_RECORD_T and\n                // set their intial content here\n            },\n};\n\nSTATIC_ASSERT(sizeof(local_extension_data) <= NV_EXTENSION_MIRROR_RAM_SIZE,\n              \"NV local buffer too small\");\n\nstatic int nv_record_extension_flush(bool is_async);\n\n#ifdef TILE_DATAPATH\nstatic void nvrecord_rebuild_tileconfig(NV_TILE_INFO_CONFIG_T *tileConfig) {\n  memset((uint8_t *)tileConfig, 0, sizeof(NV_TILE_INFO_CONFIG_T));\n}\n#endif\n\n#ifdef OTA_ENABLED\nstatic void nvrecord_rebuild_ota_info(NV_OTA_INFO_T *ota_info) {\n  memset((uint8_t *)ota_info, 0, OTA_DEVICE_CNT * sizeof(NV_OTA_INFO_T));\n}\n#endif\n\n#if defined(BISTO_ENABLED)\nstatic void nvrecord_rebuild_gsound_info(NV_GSOUND_INFO_T *gsound_info) {\n  memset((uint8_t *)gsound_info, 0, sizeof(NV_GSOUND_INFO_T));\n}\n#endif\n\n#if 1 // def TX_IQ_CAL\nstatic void\nnvrecord_rebuild_btiqcalconfig(BT_IQ_CALIBRATION_CONFIG_T *btIqCalConfig) {\n  memset((uint8_t *)btIqCalConfig, 0, sizeof(BT_IQ_CALIBRATION_CONFIG_T));\n  btIqCalConfig->validityMagicNum = BT_IQ_INVALID_MAGIC_NUM;\n}\n#endif\n\nstatic bool nv_record_data_is_valid(NV_EXTENSION_RECORD_T *nv_record) {\n  bool is_valid = false;\n\n  NVRECORD_HEADER_T *pExtRecInFlash = &nv_record->header;\n  uint8_t *pData = (uint8_t *)nv_record + NV_EXTENSION_HEADER_SIZE;\n\n  TRACE(0, \"nv ext magic 0x%x valid len %d\", pExtRecInFlash->magicNumber,\n        pExtRecInFlash->validLen);\n\n  if ((NV_EXTENSION_MAJOR_VERSION == pExtRecInFlash->majorVersion) &&\n      (NV_EXTENSION_MAGIC_NUMBER == pExtRecInFlash->magicNumber)) {\n    // check whether the data length is valid\n    if (pExtRecInFlash->validLen <=\n        NV_EXTENSION_SIZE - NV_EXTENSION_HEADER_SIZE) {\n      // check crc32\n      uint32_t crc = crc32(0, pData, pExtRecInFlash->validLen);\n      TRACE(1, \"generated crc32: 0x%x, header crc: 0x%x\", crc,\n            pExtRecInFlash->crc32);\n      if (crc == pExtRecInFlash->crc32) {\n        // correct\n        TRACE(2, \"Nv extension is valid.\");\n\n        TRACE(2, \"Former nv ext valid len %d\", pExtRecInFlash->validLen);\n        TRACE(2, \"Current FW version nv ext valid len %d\",\n              NV_EXTENSION_VALID_LEN);\n\n        if (NV_EXTENSION_VALID_LEN < pExtRecInFlash->validLen) {\n          TRACE(0, \"Valid length of extension must be increased,\"\n                   \"use the default value.\");\n        } else {\n          if (NV_EXTENSION_VALID_LEN > pExtRecInFlash->validLen) {\n            TRACE(2, \"NV extension is extended! (0x%x) -> (0x%x)\",\n                  pExtRecInFlash->validLen, NV_EXTENSION_VALID_LEN);\n          }\n          is_valid = true;\n        }\n      }\n    }\n  }\n\n  return is_valid;\n}\n\nstatic bool nv_record_items_is_valid(NV_EXTENSION_RECORD_T *nv_record) {\n  nv_record = nv_record;\n#if 0\n    NV_RECORD_PAIRED_BT_DEV_INFO_T *pbt_pair_info;\n    pbt_pair_info = &nv_record->bt_pair_info;\n    TRACE(1,\"%s: pairedDevNum: %d \", __func__,pbt_pair_info->pairedDevNum);\n    for(uint8_t i = 0; i < pbt_pair_info->pairedDevNum; i++)\n    {\n        DUMP8(\"0x%x,\", (uint8_t*)pbt_pair_info->pairedBtDevInfo[i].record.bdAddr.address,6);\n    }\n#endif\n  // TODO:  add cheking for nv_record items.\n\n  return true;\n}\n\nstatic void nv_record_set_default(NV_EXTENSION_RECORD_T *nv_record) {\n  memset((uint8_t *)nv_record, 0, sizeof(NV_EXTENSION_RECORD_T));\n  nvrecord_rebuild_system_env(&(nv_record->system_info));\n  nvrecord_rebuild_paired_bt_dev_info(&(nv_record->bt_pair_info));\n  nvrecord_rebuild_paired_ble_dev_info(&(nv_record->ble_pair_info));\n#ifdef GFPS_ENABLED\n  nvrecord_rebuild_fp_account_key(&(nv_record->fp_account_key_rec));\n#endif\n\n#ifdef NVREC_BAIDU_DATA_SECTION\n  nvrecord_rebuild_dma_configuration(&(nv_record->dma_config));\n#endif\n\n#ifdef TILE_DATAPATH\n  nvrecord_rebuild_tileconfig(&nv_record->tileConfig);\n#endif\n\n#if defined(BISTO_ENABLED)\n  nvrecord_rebuild_gsound_info(&nv_record->gsound_info);\n#endif\n\n#ifdef OTA_ENABLED\n  nvrecord_rebuild_ota_info((NV_OTA_INFO_T *)&nv_record->ota_info);\n#endif\n\n#if 1 // def TX_IQ_CAL\n  nvrecord_rebuild_btiqcalconfig(&nv_record->btIqCalConfig);\n#endif\n\n  nv_record->header.magicNumber = NV_EXTENSION_MAGIC_NUMBER;\n  nv_record->header.majorVersion = NV_EXTENSION_MAJOR_VERSION;\n  nv_record->header.minorVersion = NV_EXTENSION_MINOR_VERSION;\n  nv_record->header.validLen = NV_EXTENSION_VALID_LEN;\n  nv_record->header.crc32 =\n      crc32(0, ((uint8_t *)nv_record + NV_EXTENSION_HEADER_SIZE),\n            NV_EXTENSION_VALID_LEN);\n}\n\nstatic void _nv_record_extension_init(void) {\n  enum NORFLASH_API_RET_T result;\n  uint32_t sector_size = 0;\n  uint32_t block_size = 0;\n  uint32_t page_size = 0;\n\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, &block_size, §or_size,\n                        &page_size);\n  result = norflash_api_register(\n      NORFLASH_API_MODULE_ID_USERDATA_EXT, HAL_NORFLASH_ID_0,\n      ((uint32_t)__userdata_start),\n      ((uint32_t)__userdata_end - (uint32_t)__userdata_start), block_size,\n      sector_size, page_size, NV_EXTENSION_SIZE * 2, nv_extension_callback);\n  ASSERT(result == NORFLASH_API_OK,\n         \"_nv_record_extension_init: module register failed! result = %d.\",\n         result);\n}\n\nuint32_t nv_record_pre_write_operation(void) {\n  uint32_t lock = int_lock_global();\n  mpu_clear(MPU_ID_USER_DATA_SECTION);\n  return lock;\n}\n\nvoid nv_record_post_write_operation(uint32_t lock) {\n  int ret = 0;\n  uint32_t nv_start = (uint32_t)&local_extension_data.nv_record;\n  uint32_t len = NV_EXTENSION_MIRROR_RAM_SIZE;\n\n  ret = mpu_set(MPU_ID_USER_DATA_SECTION, nv_start, len, 0, MPU_ATTR_READ);\n  int_unlock_global(lock);\n  TRACE(2, \"set mpu 0x%x len %d result %d\", nv_start, len, ret);\n}\n\nstatic void nv_record_extension_init(void) {\n  uint32_t lock;\n  bool main_is_valid = false;\n  bool bak_is_valid = false;\n  bool data_is_valid = false;\n\n  if (nvrec_init) {\n    return;\n  }\n  _user_data_main_start = (uint32_t)__userdata_start;\n  _user_data_bak_start = (uint32_t)__userdata_start + NV_EXTENSION_SIZE;\n\n  lock = nv_record_pre_write_operation();\n  _nv_record_extension_init();\n\n  nv_flsh_state.is_update = false;\n  nv_flsh_state.written_size = 0;\n  nv_flsh_state.state = NV_STATE_IDLE;\n\n  nvrecord_extension_p = &local_extension_data.nv_record;\n\n  if (nvrecord_extension_p->header.magicNumber != NV_EXTENSION_MAGIC_NUMBER ||\n      nvrecord_extension_p->header.majorVersion != NV_EXTENSION_MAJOR_VERSION ||\n      nvrecord_extension_p->header.minorVersion != NV_EXTENSION_MINOR_VERSION ||\n      nvrecord_extension_p->header.validLen >=\n          (NV_EXTENSION_SIZE - NV_EXTENSION_HEADER_SIZE)) {\n    ASSERT(0, \"%s: local_extension_data error!(0x%x,0x%x,0x%x,0x%x)\", __func__,\n           nvrecord_extension_p->header.magicNumber,\n           nvrecord_extension_p->header.majorVersion,\n           nvrecord_extension_p->header.minorVersion,\n           nvrecord_extension_p->header.validLen);\n  }\n\n  // Check main sector.\n  if (nv_record_data_is_valid((NV_EXTENSION_RECORD_T *)_user_data_main_start) &&\n      nv_record_items_is_valid(\n          (NV_EXTENSION_RECORD_T *)_user_data_main_start)) {\n    TRACE(2, \"%s,main sector is valid.\", __func__);\n    main_is_valid = true;\n  } else {\n    TRACE(1, \"%s,main sector is invalid!\", __func__);\n    main_is_valid = false;\n  }\n\n  // Check bak secotr.\n  if (nv_record_data_is_valid((NV_EXTENSION_RECORD_T *)_user_data_bak_start) &&\n      nv_record_items_is_valid(\n          (NV_EXTENSION_RECORD_T *)_user_data_main_start)) {\n    TRACE(2, \"%s,bak sector is valid.\", __func__);\n    bak_is_valid = true;\n  } else {\n    TRACE(1, \"%s,bak sector is invalid!\", __func__);\n    bak_is_valid = false;\n  }\n\n  if (main_is_valid) {\n    data_is_valid = true;\n    if (!bak_is_valid) {\n      nv_flsh_state.is_update = true;\n      nv_flsh_state.state = NV_STATE_MAIN_DONE;\n    }\n  } else {\n    if (bak_is_valid) {\n      data_is_valid = true;\n      nv_flsh_state.is_update = true;\n      nv_flsh_state.state = NV_STATE_IDLE;\n    } else {\n      data_is_valid = false;\n    }\n  }\n\n  if (data_is_valid) {\n    TRACE(2, \"%s,data is valid.\", __func__);\n    if (main_is_valid) {\n      memcpy((uint8_t *)nvrecord_extension_p + NV_EXTENSION_HEADER_SIZE,\n             (uint8_t *)_user_data_main_start + NV_EXTENSION_HEADER_SIZE,\n             NV_EXTENSION_VALID_LEN);\n    } else {\n      memcpy((uint8_t *)nvrecord_extension_p + NV_EXTENSION_HEADER_SIZE,\n             (uint8_t *)_user_data_bak_start + NV_EXTENSION_HEADER_SIZE,\n             NV_EXTENSION_VALID_LEN);\n    }\n    nvrecord_extension_p->header.crc32 =\n        crc32(0, ((uint8_t *)nvrecord_extension_p + NV_EXTENSION_HEADER_SIZE),\n              nvrecord_extension_p->header.validLen);\n  } else {\n    TRACE(1, \"%s,data invalid, rebuild... \", __func__);\n    nv_record_set_default(nvrecord_extension_p);\n    TRACE(2, \"%s,rebuild crc = 0x%x. \", __func__,\n          nvrecord_extension_p->header.crc32);\n    // need to update the content in the flash\n    nv_record_extension_update();\n  }\n\n  nvrec_init = true;\n\n  nv_record_post_write_operation(lock);\n\n  if (nv_flsh_state.is_update) {\n    nv_record_extension_flush(false);\n  }\n  TRACE(2, \"%s,done.\", __func__);\n}\n\nNV_EXTENSION_RECORD_T *nv_record_get_extension_entry_ptr(void) {\n  return nvrecord_extension_p;\n}\n\nvoid nv_record_extension_update(void) { nv_flsh_state.is_update = true; }\n\nstatic int nv_record_extension_flush_main(bool is_async) {\n  uint32_t crc;\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret = NORFLASH_API_OK;\n\n  if (NULL == nvrecord_extension_p) {\n    TRACE(1, \"%s,nvrecord_extension_p is null.\", __func__);\n    goto _func_end;\n  }\n\n  // TRACE(3, \"%s is_async %d state %d\", __func__, is_async,\n  // nv_flsh_state.state);\n\n  if (is_async) {\n    if (nv_flsh_state.state == NV_STATE_IDLE &&\n        nv_flsh_state.is_update == true) {\n      TRACE(3, \"%s: async flush begin!\", __func__);\n    }\n\n    hal_trace_pause();\n    lock = int_lock_global();\n\n    if (nv_flsh_state.state == NV_STATE_IDLE ||\n        nv_flsh_state.state == NV_STATE_MAIN_ERASING) {\n      if (nv_flsh_state.state == NV_STATE_IDLE) {\n        nv_flsh_state.state = NV_STATE_MAIN_ERASING;\n        TRACE(4, \"%s: NV_STATE_MAIN_ERASING\", __func__);\n      }\n\n      ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                               (uint32_t)(__userdata_start), NV_EXTENSION_SIZE,\n                               true);\n      if (ret == NORFLASH_API_OK) {\n        nv_flsh_state.state = NV_STATE_MAIN_ERASED;\n        TRACE(4, \"%s: NV_STATE_MAIN_ERASED\", __func__);\n        TRACE(4, \"%s: norflash_api_erase ok,addr = 0x%x.\", __func__,\n              _user_data_main_start);\n      } else if (ret == NORFLASH_API_BUFFER_FULL) {\n        norflash_api_flush();\n      } else {\n        ASSERT(0, \"%s: norflash_api_erase err,ret = %d,addr = 0x%x.\", __func__,\n               ret, _user_data_main_start);\n      }\n    } else if (nv_flsh_state.state == NV_STATE_MAIN_ERASED ||\n               nv_flsh_state.state == NV_STATE_MAIN_WRITTING) {\n      if (nv_flsh_state.state == NV_STATE_MAIN_ERASED) {\n        nv_flsh_state.state = NV_STATE_MAIN_WRITTING;\n        TRACE(4, \"%s: NV_STATE_MAIN_WRITTING\", __func__);\n      }\n      uint32_t tmpLock = nv_record_pre_write_operation();\n      crc = crc32(0, (uint8_t *)nvrecord_extension_p + NV_EXTENSION_HEADER_SIZE,\n                  NV_EXTENSION_VALID_LEN);\n      nvrecord_extension_p->header.crc32 = crc;\n      ASSERT(nv_record_data_is_valid(nvrecord_extension_p) &&\n                 nv_record_items_is_valid(nvrecord_extension_p),\n             \"%s nv_record is invalid!\", __func__);\n      ret = norflash_api_write(\n          NORFLASH_API_MODULE_ID_USERDATA_EXT, (uint32_t)(__userdata_start),\n          (uint8_t *)nvrecord_extension_p, NV_EXTENSION_SIZE, true);\n      nv_record_post_write_operation(tmpLock);\n      if (ret == NORFLASH_API_OK) {\n        nv_flsh_state.is_update = false;\n        nv_flsh_state.state = NV_STATE_MAIN_WRITTEN;\n        TRACE(4, \"%s: NV_STATE_MAIN_WRITTEN\", __func__);\n        TRACE(4, \"%s: norflash_api_write ok,addr = 0x%x.\", __func__,\n              _user_data_main_start);\n      } else if (ret == NORFLASH_API_BUFFER_FULL) {\n        norflash_api_flush();\n      } else {\n        ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\", __func__,\n               ret, _user_data_main_start);\n      }\n    } else {\n      if (norflash_api_get_used_buffer_count(\n              NORFLASH_API_MODULE_ID_USERDATA_EXT, NORFLASH_API_ALL) == 0) {\n        nv_flsh_state.state = NV_STATE_MAIN_DONE;\n        // TRACE(1,\"%s: NV_STATE_MAIN_DONE\", __func__);\n        TRACE(1, \"%s: async flush done.\", __func__);\n      } else {\n        norflash_api_flush();\n      }\n    }\n    int_unlock_global(lock);\n    hal_trace_continue();\n  } else {\n    TRACE(4, \"%s: sync flush begin!\", __func__);\n    if (nv_flsh_state.state == NV_STATE_IDLE ||\n        nv_flsh_state.state == NV_STATE_MAIN_ERASING) {\n      do {\n        hal_trace_pause();\n        lock = int_lock_global();\n        ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                                 (uint32_t)(__userdata_start),\n                                 NV_EXTENSION_SIZE, true);\n        int_unlock_global(lock);\n        hal_trace_continue();\n        if (ret == NORFLASH_API_OK) {\n          nv_flsh_state.state = NV_STATE_MAIN_ERASED;\n          TRACE(4, \"%s: norflash_api_erase ok,addr = 0x%x.\", __func__,\n                _user_data_main_start);\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          do {\n            norflash_api_flush();\n          } while (norflash_api_get_free_buffer_count(NORFLASH_API_ERASING) ==\n                   0);\n        } else {\n          ASSERT(0, \"%s: norflash_api_erase err,ret = %d,addr = 0x%x.\",\n                 __func__, ret, _user_data_main_start);\n        }\n\n      } while (ret == NORFLASH_API_BUFFER_FULL);\n    }\n\n    if (nv_flsh_state.state == NV_STATE_MAIN_ERASED ||\n        nv_flsh_state.state == NV_STATE_MAIN_WRITTING) {\n      do {\n        hal_trace_pause();\n        uint32_t tmpLock = nv_record_pre_write_operation();\n        crc =\n            crc32(0, (uint8_t *)nvrecord_extension_p + NV_EXTENSION_HEADER_SIZE,\n                  NV_EXTENSION_VALID_LEN);\n        nvrecord_extension_p->header.crc32 = crc;\n        ASSERT(nv_record_data_is_valid(nvrecord_extension_p) &&\n                   nv_record_items_is_valid(nvrecord_extension_p),\n               \"%s nv_record is invalid!\", __func__);\n        ret = norflash_api_write(\n            NORFLASH_API_MODULE_ID_USERDATA_EXT, (uint32_t)(__userdata_start),\n            (uint8_t *)nvrecord_extension_p, NV_EXTENSION_SIZE, true);\n        nv_record_post_write_operation(tmpLock);\n        hal_trace_continue();\n        if (ret == NORFLASH_API_OK) {\n          nv_flsh_state.is_update = false;\n          nv_flsh_state.state = NV_STATE_MAIN_WRITTEN;\n          TRACE(4, \"%s: norflash_api_write ok,addr = 0x%x.\", __func__,\n                _user_data_main_start);\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          do {\n            norflash_api_flush();\n          } while (norflash_api_get_free_buffer_count(NORFLASH_API_WRITTING) ==\n                   0);\n        } else {\n          ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\",\n                 __func__, ret, _user_data_main_start);\n        }\n      } while (ret == NORFLASH_API_BUFFER_FULL);\n    }\n\n    do {\n      norflash_api_flush();\n    } while (norflash_api_get_used_buffer_count(\n                 NORFLASH_API_MODULE_ID_USERDATA_EXT, NORFLASH_API_ALL) > 0);\n\n    nv_flsh_state.state = NV_STATE_MAIN_DONE;\n    TRACE(1, \"%s: sync flush done.\", __func__);\n  }\n_func_end:\n  return (ret == NORFLASH_API_OK) ? 0 : 1;\n}\n\nstatic int nv_record_extension_flush_bak(bool is_async) {\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret = NORFLASH_API_OK;\n  uint8_t *burn_buf = (uint8_t *)_nv_burn_buf;\n\n  if (is_async) {\n    hal_trace_pause();\n    lock = int_lock_global();\n    if (nv_flsh_state.state == NV_STATE_MAIN_DONE ||\n        nv_flsh_state.state == NV_STATE_BAK_ERASING) {\n      if (nv_flsh_state.state == NV_STATE_MAIN_DONE) {\n        nv_flsh_state.state = NV_STATE_BAK_ERASING;\n        TRACE(3, \"%s: async flush begin\", __func__);\n      }\n      ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                               _user_data_bak_start, NV_EXTENSION_SIZE, true);\n      if (ret == NORFLASH_API_OK) {\n        nv_flsh_state.state = NV_STATE_BAK_ERASED;\n        TRACE(4, \"%s: norflash_api_erase ok,addr = 0x%x.\", __func__,\n              _user_data_bak_start);\n        // TRACE(4,\"%s: NV_STATE_BAK_ERASED\", __func__);\n      } else if (ret == NORFLASH_API_BUFFER_FULL) {\n        norflash_api_flush();\n      } else {\n        ASSERT(0, \"%s: norflash_api_erase err,ret = %d,addr = 0x%x.\", __func__,\n               ret, _user_data_bak_start);\n      }\n    } else if (nv_flsh_state.state == NV_STATE_BAK_ERASED ||\n               nv_flsh_state.state == NV_STATE_BAK_WRITTING) {\n      if (nv_flsh_state.state == NV_STATE_BAK_ERASED) {\n        nv_flsh_state.state = NV_STATE_BAK_WRITTING;\n        nv_flsh_state.written_size = 0;\n        // TRACE(4,\"%s: NV_STATE_BAK_WRITTING\", __func__);\n      }\n      do {\n        ret = norflash_api_read(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                                _user_data_main_start +\n                                    nv_flsh_state.written_size,\n                                burn_buf, NV_EXTENSION_PAGE_SIZE);\n        ASSERT(ret == NORFLASH_API_OK,\n               \"norflash_api_read failed! ret = %d, addr = 0x%x.\", (int32_t)ret,\n               _user_data_main_start + nv_flsh_state.written_size);\n\n        ret = norflash_api_write(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                                 _user_data_bak_start +\n                                     nv_flsh_state.written_size,\n                                 burn_buf, NV_EXTENSION_PAGE_SIZE, true);\n        if (ret == NORFLASH_API_OK) {\n          nv_flsh_state.written_size += NV_EXTENSION_PAGE_SIZE;\n\n          if (nv_flsh_state.written_size == NV_EXTENSION_SIZE) {\n            nv_flsh_state.state = NV_STATE_BAK_WRITTEN;\n            // TRACE(4,\"%s: NV_STATE_BAK_WRITTEN\", __func__);\n            break;\n          }\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          norflash_api_flush();\n          break;\n        } else {\n          ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\",\n                 __func__, ret,\n                 _user_data_bak_start + nv_flsh_state.written_size);\n        }\n      } while (1);\n    } else {\n      if (norflash_api_get_used_buffer_count(\n              NORFLASH_API_MODULE_ID_USERDATA_EXT, NORFLASH_API_ALL) == 0) {\n        nv_flsh_state.state = NV_STATE_BAK_DONE;\n        TRACE(3, \"%s: async flush done.\", __func__);\n      } else {\n        norflash_api_flush();\n      }\n    }\n    int_unlock_global(lock);\n    hal_trace_continue();\n  } else {\n    TRACE(4, \"%s: sync flush begin.\", __func__);\n    if (nv_flsh_state.state == NV_STATE_MAIN_DONE ||\n        nv_flsh_state.state == NV_STATE_BAK_ERASING) {\n      do {\n        hal_trace_pause();\n        lock = int_lock_global();\n        ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                                 _user_data_bak_start, NV_EXTENSION_SIZE, true);\n        int_unlock_global(lock);\n        hal_trace_continue();\n        if (ret == NORFLASH_API_OK) {\n          nv_flsh_state.state = NV_STATE_BAK_ERASED;\n          TRACE(4, \"%s: norflash_api_erase ok,addr = 0x%x.\", __func__,\n                _user_data_bak_start);\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          do {\n            norflash_api_flush();\n          } while (norflash_api_get_free_buffer_count(NORFLASH_API_ERASING) ==\n                   0);\n        } else {\n          ASSERT(0, \"%s: norflash_api_erase err,ret = %d,addr = 0x%x.\",\n                 __func__, ret, _user_data_bak_start);\n        }\n      } while (ret == NORFLASH_API_BUFFER_FULL);\n    }\n\n    if (nv_flsh_state.state == NV_STATE_BAK_ERASED ||\n        nv_flsh_state.state == NV_STATE_BAK_WRITTING) {\n      nv_flsh_state.state = NV_STATE_BAK_WRITTING;\n      nv_flsh_state.written_size = 0;\n\n      hal_trace_pause();\n      do {\n        lock = int_lock_global();\n        ret = norflash_api_read(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                                _user_data_main_start +\n                                    nv_flsh_state.written_size,\n                                burn_buf, NV_EXTENSION_PAGE_SIZE);\n        ASSERT(ret == NORFLASH_API_OK,\n               \"norflash_api_read failed! ret = %d, addr = 0x%x.\", (int32_t)ret,\n               _user_data_main_start + nv_flsh_state.written_size);\n\n        ret = norflash_api_write(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                                 _user_data_bak_start +\n                                     nv_flsh_state.written_size,\n                                 burn_buf, NV_EXTENSION_PAGE_SIZE, true);\n        int_unlock_global(lock);\n        if (ret == NORFLASH_API_OK) {\n          nv_flsh_state.written_size += NV_EXTENSION_PAGE_SIZE;\n          if (nv_flsh_state.written_size == NV_EXTENSION_SIZE) {\n            nv_flsh_state.state = NV_STATE_BAK_WRITTEN;\n            TRACE(3, \"%s: NV_STATE_BAK_WRITTEN\", __func__);\n            break;\n          }\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          do {\n            norflash_api_flush();\n          } while (norflash_api_get_free_buffer_count(NORFLASH_API_WRITTING) ==\n                   0);\n        } else {\n          ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\",\n                 __func__, ret,\n                 _user_data_bak_start + nv_flsh_state.written_size);\n        }\n      } while (1);\n    }\n    hal_trace_continue();\n\n    // nv_flsh_state.state == NV_STATE_BAK_WRITTEN;\n    do {\n      norflash_api_flush();\n    } while (norflash_api_get_used_buffer_count(\n                 NORFLASH_API_MODULE_ID_USERDATA_EXT, NORFLASH_API_ALL) > 0);\n\n    nv_flsh_state.state = NV_STATE_BAK_DONE;\n    TRACE(1, \"%s: sync flush done.\", __func__);\n  }\n\n  if (nv_flsh_state.state == NV_STATE_BAK_DONE) {\n    nv_flsh_state.state = NV_STATE_IDLE;\n    TRACE(1, \"%s: NV_STATE_IDLE\", __func__);\n  }\n\n  return (ret == NORFLASH_API_OK) ? 0 : 1;\n}\n\nstatic int nv_record_extension_flush(bool is_async) {\n  int ret = 0;\n  // TRACE(3, \"%s state %d is_update %d\", __func__, nv_flsh_state.state,\n  // nv_flsh_state.is_update);\n  do {\n    if (nv_flsh_state.state == NV_STATE_IDLE &&\n        nv_flsh_state.is_update == FALSE) {\n      break;\n    }\n\n    if ((nv_flsh_state.state == NV_STATE_IDLE &&\n         nv_flsh_state.is_update == TRUE) ||\n        nv_flsh_state.state == NV_STATE_MAIN_ERASING ||\n        nv_flsh_state.state == NV_STATE_MAIN_ERASED ||\n        nv_flsh_state.state == NV_STATE_MAIN_WRITTING ||\n        nv_flsh_state.state == NV_STATE_MAIN_WRITTEN) {\n      ret = nv_record_extension_flush_main(is_async);\n      if (is_async) {\n        break;\n      }\n    }\n\n    if (nv_flsh_state.state == NV_STATE_MAIN_DONE ||\n        nv_flsh_state.state == NV_STATE_BAK_ERASING ||\n        nv_flsh_state.state == NV_STATE_BAK_ERASED ||\n        nv_flsh_state.state == NV_STATE_BAK_WRITTING ||\n        nv_flsh_state.state == NV_STATE_BAK_WRITTEN ||\n        nv_flsh_state.state == NV_STATE_BAK_DONE) {\n      ret = nv_record_extension_flush_bak(is_async);\n    }\n  } while (!is_async);\n  return ret;\n}\n\nvoid nv_extension_callback(void *param) {\n  NORFLASH_API_OPERA_RESULT *opera_result;\n  opera_result = (NORFLASH_API_OPERA_RESULT *)param;\n\n  TRACE(6, \"%s:type = %d, addr = 0x%x,len = 0x%x,remain = %d,result = %d.\",\n        __func__, opera_result->type, opera_result->addr, opera_result->len,\n        opera_result->remain_num, opera_result->result);\n}\n\nvoid nv_record_init(void) {\n  nv_record_open(section_usrdata_ddbrecord);\n\n  nv_custom_parameter_section_init();\n}\n\nbt_status_t nv_record_open(SECTIONS_ADP_ENUM section_id) {\n  nv_record_extension_init();\n#ifdef FLASH_SUSPEND\n  hal_sleep_set_sleep_hook(HAL_SLEEP_HOOK_USER_NVRECORD,\n                           nv_record_flash_flush_in_sleep);\n#else\n  hal_sleep_set_deep_sleep_hook(HAL_DEEP_SLEEP_HOOK_USER_NVRECORD,\n                                nv_record_flash_flush_in_sleep);\n#endif\n  return BT_STS_SUCCESS;\n}\n\nvoid nv_record_update_runtime_userdata(void) { nv_record_extension_update(); }\n\nint nv_record_touch_cause_flush(void) {\n  nv_record_update_runtime_userdata();\n  return 0;\n}\n\nvoid nv_record_sector_clear(void) {\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret;\n\n  lock = int_lock_global();\n  ret =\n      norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                         (uint32_t)__userdata_start, NV_EXTENSION_SIZE, false);\n  ASSERT(ret == NORFLASH_API_OK,\n         \"%s: norflash_api_erase(0x%x) failed! ret = %d.\", __func__,\n         (uint32_t)__userdata_start, (int32_t)ret);\n\n  ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA_EXT,\n                           (uint32_t)__userdata_start + NV_EXTENSION_SIZE,\n                           NV_EXTENSION_SIZE, false);\n  ASSERT(ret == NORFLASH_API_OK,\n         \"%s: norflash_api_erase(0x%x) failed! ret = %d.\", __func__,\n         (uint32_t)__userdata_start + NV_EXTENSION_SIZE, (int32_t)ret);\n  // pmu_reboot();\n  int_unlock_global(lock);\n}\n\nvoid nv_record_rebuild(void) {\n  if (nvrecord_extension_p) {\n    uint32_t nv_start;\n    TRACE(1, \"%s: begin.\", __func__);\n    uint32_t lock = int_lock_global();\n    mpu_clear(MPU_ID_USER_DATA_SECTION);\n    nv_record_set_default(nvrecord_extension_p);\n    nv_start = (uint32_t)&local_extension_data.nv_record;\n    mpu_set(MPU_ID_USER_DATA_SECTION, nv_start, NV_EXTENSION_MIRROR_RAM_SIZE, 0,\n            MPU_ATTR_READ);\n    nv_record_extension_update();\n    nv_record_flash_flush();\n    int_unlock_global(lock);\n    TRACE(1, \"%s: done.\", __func__);\n  } else {\n    TRACE(1, \"%s: begin. nvrecord_extension_p = null.\", __func__);\n    uint32_t lock = int_lock_global();\n    nv_record_sector_clear();\n    nvrec_init = false;\n    nv_record_extension_init();\n    int_unlock_global(lock);\n    TRACE(1, \"%s: done.\", __func__);\n  }\n}\n\n#define NV_RECORD_FLUSH_EXECUTION_INTERVAL_MS (20 * 60 * 1000)\nstatic uint32_t lastFlushCheckPointInMs = 0;\n\nstatic void nv_record_reset_flush_checkpoint(void) {\n  lastFlushCheckPointInMs = GET_CURRENT_MS();\n  ;\n}\n\nstatic bool nv_record_is_timer_expired_to_check(void) {\n  uint32_t passedTimerMs;\n  uint32_t currentTimerMs = GET_CURRENT_MS();\n\n  if (0 == lastFlushCheckPointInMs) {\n    passedTimerMs = currentTimerMs;\n  } else {\n    if (currentTimerMs > lastFlushCheckPointInMs) {\n      passedTimerMs = currentTimerMs - lastFlushCheckPointInMs;\n    } else {\n      passedTimerMs = 0xFFFFFFFF - lastFlushCheckPointInMs + currentTimerMs + 1;\n    }\n  }\n\n  if (passedTimerMs > NV_RECORD_FLUSH_EXECUTION_INTERVAL_MS) {\n    return true;\n  } else {\n    return false;\n  }\n}\n\nvoid nv_record_flash_flush(void) {\n  nv_record_extension_flush(false);\n  nv_record_reset_flush_checkpoint();\n}\n\nvoid nv_record_execute_async_flush(void) {\n  int ret = nv_record_extension_flush(true);\n  if (0 == ret) {\n    nv_record_reset_flush_checkpoint();\n  }\n}\n\nint nv_record_flash_flush_in_sleep(void) {\n  if ((NV_STATE_IDLE == nv_flsh_state.state) &&\n      !nv_record_is_timer_expired_to_check()) {\n    return 0;\n  }\n\n  nv_record_execute_async_flush();\n  return 0;\n}\n\n#endif // #if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_extension.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifdef NEW_NV_RECORD_ENABLED\n\n#ifndef __NVRECORD_EXTENSION_H__\n#define __NVRECORD_EXTENSION_H__\n#include \"bluetooth.h\"\n#include \"btif_sys_config.h\"\n#include \"me_api.h\"\n#include \n\n// increase by 1 if the nvrecord's whole data structure is changed and the\n// content needs to be rebuilt\n#define NV_EXTENSION_MAJOR_VERSION 3\n// increase by 1 if the new items are appended to the tail of the former\n// nvrecord's data structure\n#define NV_EXTENSION_MINOR_VERSION 1\n\n#define NV_EXTENSION_SIZE 4096 // one flash page\n#define NV_EXTENSION_PAGE_SIZE 256\n#define NV_EXTENSION_HEADER_SIZE                                               \\\n  sizeof(NVRECORD_HEADER_T) // magic number and valid length\n#define NV_EXTENSION_MAGIC_NUMBER 0x4E455854\n#define NV_EXTENSION_VALID_LEN                                                 \\\n  (sizeof(NV_EXTENSION_RECORD_T) - sizeof(NVRECORD_HEADER_T))\n\n/* unused, just for backwards compatible */\n#define section_name_ddbrec \"ddbrec\"\n\n/* BT paired device info */\n#define MAX_BT_PAIRED_DEVICE_COUNT 8\n\n/* BLE paired device information */\n#define BLE_RECORD_NUM 5\n\n#define BLE_ADDR_SIZE 6\n#define BLE_ENC_RANDOM_SIZE 8\n#define BLE_LTK_SIZE 16\n#define BLE_IRK_SIZE 16\n\n#define BLE_STATIC_ADDR 0\n#define BLE_RANDOM_ADDR 1\n\n#ifdef GFPS_ENABLED\n/* fast pair account key */\n#define FP_ACCOUNT_KEY_RECORD_NUM 5\n#define FP_ACCOUNT_KEY_SIZE 16\n#define FP_MAX_NAME_LEN 64\n#endif\n\n#ifdef OTA_ENABLED\n#define MAX_VERSION_STRING_LEN 16\n#define OTA_DEVICE_CNT                                                         \\\n  2 //!< should be equal to OTA_DEVICE_NUM in @see OTA_DEVICE_E\n#endif\n\n#ifdef BISTO_ENABLED\n#ifdef GSOUND_HOTWORD_ENABLED\n#define MODEL_FILE_EMBEDED                                                     \\\n  1 //!< define this macro when model file is emneded in our bin file\n\n#if MODEL_FILE_EMBEDED\n#define HOTWORD_MODLE_MAX_NUM                                                  \\\n  11 //!< need to adjust this value if support more model\n#else\n#define HOTWORD_MODLE_MAX_NUM                                                  \\\n  10 //!< need to adjust this value if support more model\n#endif\n\n#endif // #ifdef GSOUND_HOTWORD_ENABLED\n#endif // #ifdef BISTO_ENABLED\n\n// TODO: should be increased if NV_EXTENSION_MIRROR_RAM_SIZE exceeds this value\n\n#if defined(__AI_VOICE__) || (defined(BISTO_ENABLED) || defined(GFPS_ENABLED))\n#define NV_EXTENSION_MIRROR_RAM_SIZE 0x800\n#else\n#define NV_EXTENSION_MIRROR_RAM_SIZE 0x400\n#endif\n\n#define TILE_INFO_SIZE 400\n#define BT_FREQENCY_RANGE_NUM 3\n#define BT_IQ_INVALID_MAGIC_NUM 0xFFFFFFFF\n#define BT_IQ_VALID_MAGIC_NUM 0x5a5a5a5a\ntypedef struct {\n  uint32_t validityMagicNum;\n  uint16_t gain_cal_val[BT_FREQENCY_RANGE_NUM];\n  uint16_t phase_cal_val[BT_FREQENCY_RANGE_NUM];\n} BT_IQ_CALIBRATION_CONFIG_T;\n\n/* nv record header data structure */\ntypedef struct {\n  uint32_t magicNumber;\n  uint16_t majorVersion; // should be NV_EXTENSION_MAJOR_VERSION\n  uint16_t minorVersion; // should be NV_EXTENSION_MINOR_VERSION\n  uint32_t validLen; // should be the valid content in this nv record version\n  uint32_t crc32; // crc32 of following valid values in the nv extention section\n} NVRECORD_HEADER_T;\n\n/* system information */\ntypedef struct {\n  int8_t language;\n} media_language_t;\n\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\ntypedef struct {\n  int8_t src_snk_mode;\n} src_snk_t;\n#endif\n\ntypedef struct {\n  uint32_t mode;\n  btif_device_record_t record;\n  bool tws_connect_success;\n} ibrt_mode_t;\n\ntypedef struct {\n  uint32_t status;\n} factory_tester_status_t;\n\ntypedef struct {\n  bool voice_key_enable;\n  uint8_t setedCurrentAi;           // if false, set ai default mode\n  uint8_t currentAiSpec;            //\n  uint8_t aiStatusDisableFlag;      // all ai disable flag\n  uint8_t amaAssistantEnableStatus; // ama enable flag\n} AI_MANAGER_INFO_T;\n\nstruct nvrecord_env_t {\n  media_language_t media_language;\n#if defined(APP_LINEIN_A2DP_SOURCE) || defined(APP_I2S_A2DP_SOURCE)\n  src_snk_t src_snk_flag;\n#endif\n  ibrt_mode_t ibrt_mode;\n  factory_tester_status_t factory_tester_status;\n\n  uint8_t flag_value[8];\n  AI_MANAGER_INFO_T aiManagerInfo;\n};\n\ntypedef struct btdevice_volume {\n  int8_t a2dp_vol;\n  int8_t hfp_vol;\n} btdevice_volume;\n\ntypedef struct btdevice_profile {\n  bool hfp_act;\n  bool hsp_act;\n  bool a2dp_act;\n  uint8_t a2dp_codectype;\n} btdevice_profile;\n\ntypedef struct {\n  btif_device_record_t record;\n  btdevice_volume device_vol;\n  btdevice_profile device_plf;\n#ifdef BTIF_DIP_DEVICE\n  uint16_t vend_id;\n  uint16_t vend_id_source;\n  uint16_t reserve;\n#endif\n} nvrec_btdevicerecord;\n\ntypedef struct {\n  uint32_t pairedDevNum;\n  nvrec_btdevicerecord pairedBtDevInfo[MAX_BT_PAIRED_DEVICE_COUNT];\n} NV_RECORD_PAIRED_BT_DEV_INFO_T;\n\ntypedef enum { section_usrdata_ddbrecord, section_none } SECTIONS_ADP_ENUM;\n\ntypedef struct {\n  uint8_t ble_addr[BTIF_BD_ADDR_SIZE];\n  uint8_t ble_irk[BLE_IRK_SIZE];\n} BLE_BASIC_INFO_T;\n\ntypedef struct {\n  uint8_t peer_bleAddr[BLE_ADDR_SIZE];\n  uint16_t EDIV;\n  uint8_t RANDOM[BLE_ENC_RANDOM_SIZE];\n  uint8_t LTK[BLE_LTK_SIZE];\n  uint8_t IRK[BLE_IRK_SIZE];\n  uint8_t bonded;\n\n} BleDeviceinfo;\n\ntypedef struct {\n  uint32_t saved_list_num;\n  BLE_BASIC_INFO_T self_info;\n  BleDeviceinfo ble_nv[BLE_RECORD_NUM];\n} NV_RECORD_PAIRED_BLE_DEV_INFO_T;\n\n#ifdef TWS_SYSTEM_ENABLED\ntypedef struct {\n  BLE_BASIC_INFO_T ble_info;\n} TWS_INFO_T;\n#endif // #ifdef TWS_SYSTEM_ENABLED\n\n#ifdef GFPS_ENABLED\ntypedef struct {\n  uint8_t key[FP_ACCOUNT_KEY_SIZE];\n\n} NV_FP_ACCOUNT_KEY_ENTRY_T;\n\ntypedef struct {\n  uint32_t key_count;\n  NV_FP_ACCOUNT_KEY_ENTRY_T accountKey[FP_ACCOUNT_KEY_RECORD_NUM];\n  uint16_t nameLen;\n  uint8_t name[FP_MAX_NAME_LEN];\n} NV_FP_ACCOUNT_KEY_RECORD_T;\n#endif // #ifdef GFPS_ENABLED\n\n#ifdef NVREC_BAIDU_DATA_SECTION\n/*  DMA owned configuration information */\ntypedef struct {\n  int32_t fmfreq;\n  char rand[BAIDU_DATA_RAND_LEN + 1];\n\n} NV_DMA_CONFIGURATION_T;\n#endif // #ifdef NVREC_BAIDU_DATA_SECTION\n\n#ifdef TILE_DATAPATH\ntypedef struct {\n  uint8_t tileInfo[TILE_INFO_SIZE];\n} NV_TILE_INFO_CONFIG_T;\n#endif\n\n#if defined(OTA_ENABLED)\ntypedef struct {\n  // hotword model ID, arry size should equal to GSOUND_HOTWORD_MODEL_ID_BYTES\n  char modelId[5];\n\n  // start addr of the model\n  uint32_t startAddr;\n\n  // length of model file\n  uint32_t len;\n} HOTWORD_MODEL_INFO_T;\n\ntypedef struct {\n  uint32_t imageSize;                   //!< image size of ongoing upgrade\n  uint32_t breakPoint;                  //!< break point of ongoing upgrade\n  char version[MAX_VERSION_STRING_LEN]; //!< version string of ongoing upgrade\n  uint8_t versionLen; //!< version string length of ongoing upgrade\n  uint8_t otaStatus;  //!< status of ongoing upgrade\n  uint8_t user;       //!< user of ongoing upgrade\n} NV_OTA_INFO_T;\n#endif\n\n#ifdef BISTO_ENABLED\ntypedef struct {\n  uint8_t isGsoundEnabled;\n\n  // this is used for hotword model\n  // for non-hotword version, this should always be 0\n  uint8_t supportedModelCnt;\n\n#ifdef GSOUND_HOTWORD_ENABLED\n  // store the hotword model info\n  HOTWORD_MODEL_INFO_T modelInfo[HOTWORD_MODLE_MAX_NUM];\n#endif\n} NV_GSOUND_INFO_T;\n#endif\n\ntypedef struct {\n  NVRECORD_HEADER_T header;\n  struct nvrecord_env_t system_info;\n  NV_RECORD_PAIRED_BT_DEV_INFO_T bt_pair_info;\n  NV_RECORD_PAIRED_BLE_DEV_INFO_T ble_pair_info;\n\n#ifdef TWS_SYSTEM_ENABLED\n  TWS_INFO_T tws_info;\n#endif\n\n#ifdef GFPS_ENABLED\n  NV_FP_ACCOUNT_KEY_RECORD_T fp_account_key_rec;\n#endif\n\n#ifdef NVREC_BAIDU_DATA_SECTION\n  NV_DMA_CONFIGURATION_T dma_config;\n#endif\n\n#ifdef TILE_DATAPATH\n  NV_TILE_INFO_CONFIG_T tileConfig;\n#endif\n\n#ifdef OTA_ENABLED\n  NV_OTA_INFO_T ota_info[OTA_DEVICE_CNT];\n#endif\n\n#if defined(BISTO_ENABLED)\n  NV_GSOUND_INFO_T gsound_info;\n#endif\n\n#if 1 // def TX_IQ_CAL\n  BT_IQ_CALIBRATION_CONFIG_T btIqCalConfig;\n#endif\n  // TODO: If wanna OTA to update the nv record, two choices:\n  // 1. Change above data structures and increase NV_EXTENSION_MAJOR_VERSION.\n  //     Then the nv record will be rebuilt and the whole history information\n  //     will be cleared\n  // 2. Don't touch above data structures but just add new items here and\n  // increase NV_EXTENSION_MINOR_VERSION.\n  //     Then the nv record will keep all the whole hisotry.\n} NV_EXTENSION_RECORD_T;\n\ntypedef union {\n  NV_EXTENSION_RECORD_T nv_record;\n  /*\n   * dummy data, just make sure the mirror buffer's size is\n   * \"NV_EXTENSION_MIRROR_RAM_SIZE\"\n   */\n  uint8_t dummy_data[NV_EXTENSION_MIRROR_RAM_SIZE];\n} NV_MIRROR_BUF_T;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nextern NV_EXTENSION_RECORD_T *nvrecord_extension_p;\n\nint nv_record_env_init(void);\n\nNV_EXTENSION_RECORD_T *nv_record_get_extension_entry_ptr(void);\n\nvoid nv_record_extension_update(void);\n\nvoid nv_extension_callback(void *param);\n\nint nv_record_touch_cause_flush(void);\n\nvoid nv_record_sector_clear(void);\n\nvoid nv_record_flash_flush(void);\n\nint nv_record_flash_flush_in_sleep(void);\n\nvoid nv_record_execute_async_flush(void);\n\nvoid nv_record_update_runtime_userdata(void);\n\nvoid nv_record_rebuild(void);\n\nuint32_t nv_record_pre_write_operation(void);\n\nvoid nv_record_post_write_operation(uint32_t lock);\n\nbt_status_t nv_record_open(SECTIONS_ADP_ENUM section_id);\n\nvoid nv_record_init(void);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n#endif // #if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_fp_account_key.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(NEW_NV_RECORD_ENABLED)\n//#include \"cmsis_os.h\"\n#include \"nvrecord_fp_account_key.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord_extension.h\"\n#include \n#include \n#include \n\n#ifdef GFPS_ENABLED\n\nstatic NV_FP_ACCOUNT_KEY_RECORD_T *nvrecord_fp_account_key_p = NULL;\n\nvoid nvrecord_rebuild_fp_account_key(\n    NV_FP_ACCOUNT_KEY_RECORD_T *pFpAccountKey) {\n  memset((uint8_t *)pFpAccountKey, 0, sizeof(NV_FP_ACCOUNT_KEY_RECORD_T));\n  pFpAccountKey->key_count = 0;\n}\n\nNV_FP_ACCOUNT_KEY_RECORD_T *nv_record_get_fp_data_structure_info(void) {\n  return nvrecord_fp_account_key_p;\n}\n\nvoid nv_record_update_fp_data_structure(NV_FP_ACCOUNT_KEY_RECORD_T *pFpData) {\n  if (!memcmp((uint8_t *)pFpData, (uint8_t *)nvrecord_fp_account_key_p,\n              sizeof(NV_FP_ACCOUNT_KEY_RECORD_T))) {\n    // the updated fp data is the same as the local content, do nothing\n  } else {\n    uint32_t lock = nv_record_pre_write_operation();\n    TRACE(0, \"Fast pair non-volatile data needs to be updated to aligned with \"\n             \"peer device.\");\n    *nvrecord_fp_account_key_p = *pFpData;\n    nv_record_post_write_operation(lock);\n    nv_record_update_runtime_userdata();\n  }\n}\n\nvoid nv_record_fp_account_key_init(void) {\n  if (NULL == nvrecord_fp_account_key_p) {\n    nvrecord_fp_account_key_p = &(nvrecord_extension_p->fp_account_key_rec);\n  }\n}\n\nvoid nv_record_fp_account_key_add(NV_FP_ACCOUNT_KEY_ENTRY_T *param_rec) {\n  TRACE(0, \"Add account key:\");\n  DUMP8(\"0x%02x \", param_rec->key, sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n  uint32_t lock = nv_record_pre_write_operation();\n  if (FP_ACCOUNT_KEY_RECORD_NUM == nvrecord_fp_account_key_p->key_count) {\n    // discard the earliest key\n    memmove((uint8_t *)&(nvrecord_fp_account_key_p->accountKey[0]),\n            (uint8_t *)&(nvrecord_fp_account_key_p->accountKey[1]),\n            (FP_ACCOUNT_KEY_RECORD_NUM - 1) *\n                sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n    nvrecord_fp_account_key_p->key_count--;\n  }\n\n  memcpy((uint8_t *)&(nvrecord_fp_account_key_p\n                          ->accountKey[nvrecord_fp_account_key_p->key_count]),\n         param_rec, sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n  nvrecord_fp_account_key_p->key_count++;\n  nv_record_post_write_operation(lock);\n  nv_record_update_runtime_userdata();\n}\n\nvoid nv_record_fp_account_info_reset(void) {\n  uint32_t lock = nv_record_pre_write_operation();\n  uint8_t size = nv_record_fp_account_key_count();\n  for (uint8_t i = 0; i < size; i++) {\n    memset((uint8_t *)&(nvrecord_fp_account_key_p->accountKey[i]), 0,\n           sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n  }\n  nvrecord_fp_account_key_p->key_count = 0;\n  nv_record_post_write_operation(lock);\n  nv_record_fp_update_name(NULL, 0);\n}\n\nvoid nv_record_fp_account_key_delete(void) {\n  nv_record_fp_account_info_reset();\n}\n\nbool nv_record_fp_account_key_get_by_index(uint8_t index, uint8_t *outputKey) {\n  if (nvrecord_fp_account_key_p->key_count < (index + 1)) {\n    return false;\n  }\n\n  memcpy(outputKey, (uint8_t *)&(nvrecord_fp_account_key_p->accountKey[index]),\n         sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n  TRACE(1, \"Get account key %d as:\", index);\n  DUMP8(\"0x%02x \", outputKey, sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n  return true;\n}\n\nuint8_t nv_record_fp_account_key_count(void) {\n  ASSERT(nvrecord_fp_account_key_p->key_count <= FP_ACCOUNT_KEY_RECORD_NUM,\n         \"fp account exceed\");\n  return nvrecord_fp_account_key_p->key_count;\n}\n\nvoid nv_record_fp_update_name(uint8_t *ptrName, uint32_t nameLen) {\n  TRACE(1, \"update name len %d\", nameLen);\n  uint32_t lock = nv_record_pre_write_operation();\n\n  memset(nvrecord_fp_account_key_p->name, 0, FP_MAX_NAME_LEN);\n  if (nameLen > 0) {\n    DUMP8(\"0x%02x \", ptrName, nameLen);\n    memcpy(nvrecord_fp_account_key_p->name, ptrName, nameLen);\n  }\n  nvrecord_fp_account_key_p->nameLen = nameLen;\n\n  nv_record_post_write_operation(lock);\n  nv_record_update_runtime_userdata();\n}\n\nuint8_t *nv_record_fp_get_name_ptr(uint32_t *ptrNameLen) {\n  *ptrNameLen = nvrecord_fp_account_key_p->nameLen;\n  return nvrecord_fp_account_key_p->name;\n}\n\nvoid nv_record_fp_update_all(uint8_t *info) {\n  ASSERT(info, \"null pointer received in [%s]\", __func__);\n\n  if (memcmp(nvrecord_fp_account_key_p, info,\n             sizeof(NV_FP_ACCOUNT_KEY_RECORD_T))) {\n    uint32_t lock = nv_record_pre_write_operation();\n    memcpy(nvrecord_fp_account_key_p, info, sizeof(NV_FP_ACCOUNT_KEY_RECORD_T));\n    nv_record_extension_update();\n    TRACE(1, \"received fp count num:%d\", nvrecord_fp_account_key_p->key_count);\n    nv_record_post_write_operation(lock);\n  }\n}\n\n#endif\n\n#endif // #if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_fp_account_key.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if defined(NEW_NV_RECORD_ENABLED)\n\n#ifdef GFPS_ENABLED\n\n#ifndef __NVRECORD_FP_ACCOUNT_KEY_H__\n#define __NVRECORD_FP_ACCOUNT_KEY_H__\n\n#include \"nvrecord_extension.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid nv_record_fp_account_key_add(NV_FP_ACCOUNT_KEY_ENTRY_T* param_rec);\nvoid nv_record_fp_account_key_delete();\nvoid nv_record_fp_account_key_init(void);\nbool nv_record_fp_account_key_get_by_index(uint8_t index, uint8_t* outputKey);\nuint8_t nv_record_fp_account_key_count(void);\nvoid nvrecord_rebuild_fp_account_key(NV_FP_ACCOUNT_KEY_RECORD_T* pFpAccountKey);\nvoid nv_record_fp_update_name(uint8_t* ptrName, uint32_t nameLen);\nuint8_t* nv_record_fp_get_name_ptr(uint32_t* ptrNameLen);\nNV_FP_ACCOUNT_KEY_RECORD_T* nv_record_get_fp_data_structure_info(void);\nvoid nv_record_update_fp_data_structure(NV_FP_ACCOUNT_KEY_RECORD_T* pFpData);\n\nvoid nv_record_fp_update_all(uint8_t *info);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n\n#endif\n\n#endif // #if defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_gsound.c",
    "content": "/***************************************************************************\n *\n *Copyright 2015-2019 BES.\n *All rights reserved. All unpublished rights reserved.\n *\n *No part of this work may be used or reproduced in any form or by any\n *means, or stored in a database or retrieval system, without prior written\n *permission of BES.\n *\n *Use of this work is governed by a license granted by BES.\n *This work contains confidential and proprietary information of\n *BES. which is protected by copyright, trade secret,\n *trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n/*****************************header include********************************/\n#include \"nvrecord_gsound.h\"\n#include \"cmsis.h\"\n#include \"factory_section.h\"\n#include \"nv_section_dbg.h\"\n\n#ifdef BISTO_ENABLED\n#include \"gsound_target_ota.h\"\n\n#ifdef GSOUND_HOTWORD_ENABLED\n#include \"gsound_custom_hotword_common.h\"\n#endif\n#endif\n\n/************************private macro defination***************************/\n#define HOTWORD_MODEL_MAX_SIZE (80 * 1024) //!< should adjust this value if\n//!< hotword model size changed and should adjust the flash section size at\n//!< the sametime., @see HOTWORD_SECTION_SIZE in common.mk\n\n#ifndef OTA_FLASH_LOGIC_ADDR\n#define OTA_FLASH_LOGIC_ADDR (FLASH_NC_BASE)\n#endif\n\n/************************private type defination****************************/\n\n/************************extern function declearation***********************/\n#ifdef GSOUND_HOTWORD_ENABLED\nextern uint32_t __hotword_model_start[];\nextern uint32_t __hotword_model_end[];\n#endif\n\n/**********************private function declearation************************/\n\n/************************private variable defination************************/\n#ifdef GSOUND_HOTWORD_ENABLED\n#ifdef MODEL_FILE_EMBEDED\nconst uint8_t EMBEDED_MODEL_FILE[] = {\n#include \"res/gs_hw/en_all.txt\" //!< must correspond to specific model ID, @see DEFAULT_HOTWORD_MODEL_ID\n};\n\n/// NOTE: Add more embeded model file info here\n\n#define DEFAULT_MODEL_START_ADDR                                               \\\n  EMBEDED_MODEL_FILE //!< map to specific flash address within the bin file\n#else                /// #ifndef MODEL_FILE_EMBEDED\n#define DEFAULT_MODEL_START_ADDR                                               \\\n  __hotword_model_start //!< map to specific flash address out of the bin file\n#endif                  /// #ifdef MODEL_FILE_EMBEDED\n\nHOTWORD_MODEL_INFO_T defaultModel[DEFAULT_MODEL_NUM] = {\n    {DEFAULT_HOTWORD_MODEL_ID, (uint32_t)DEFAULT_MODEL_START_ADDR,\n     HOTWORD_MODEL_MAX_SIZE},\n    /// NOTE: Add other embeded model info here\n};\n\nchar supportedModels[GSOUND_MAX_SUPPORTED_HOTWORD_MODELS_BYTES] = {};\n#endif /// #ifdef GSOUND_HOTWORD_ENABLED\n\nstatic NV_GSOUND_INFO_T *nvrecord_gsound_p = NULL;\n\n/****************************function defination****************************/\nvoid nv_record_gsound_rec_init(void) {\n  if (NULL == nvrecord_gsound_p) {\n    nvrecord_gsound_p = &(nvrecord_extension_p->gsound_info);\n  }\n\n#ifdef GSOUND_HOTWORD_ENABLED\n  /// init default supported model file(s)\n  /// add to supported model file set(if it is not in this set)\n  LOG_I(\"supportedModelCnt:%d\", nvrecord_gsound_p->supportedModelCnt);\n  if (0 == nvrecord_gsound_p\n               ->supportedModelCnt) //!< load default info at first time bootup\n  {\n    for (uint8_t i = 0; i < DEFAULT_MODEL_NUM; i++) {\n      LOG_I(\"hotword_model_start:0x%x\", defaultModel[i].startAddr);\n\n      nv_record_gsound_rec_add_new_model((void *)&defaultModel[i]);\n    }\n  }\n#endif\n}\n\nvoid nv_record_gsound_rec_get_ptr(void **ptr) { *ptr = nvrecord_gsound_p; }\n\nvoid nv_record_gsound_rec_updata_enable_state(bool enable) {\n  LOG_I(\"gsound enable state update:%d->%d\", nvrecord_gsound_p->isGsoundEnabled,\n        enable);\n\n  if (nvrecord_gsound_p->isGsoundEnabled != enable) {\n    /// disable the MPU protection for write operation\n    uint32_t lock = nv_record_pre_write_operation();\n\n    /// update the enable state\n    nvrecord_gsound_p->isGsoundEnabled = enable;\n    nv_record_extension_update();\n\n    /// enable the MPU protection after the write operation\n    nv_record_post_write_operation(lock);\n  }\n}\n\n#ifdef GSOUND_HOTWORD_ENABLED\nbool nv_record_gsound_rec_is_model_insert_allowed(const char *model) {\n  bool ret = true;\n  uint8_t i;\n\n  if ((nvrecord_gsound_p->supportedModelCnt >= HOTWORD_MODLE_MAX_NUM) &&\n      (0xFF != nvrecord_gsound_p->supportedModelCnt)) {\n    for (i = 0; i < HOTWORD_MODLE_MAX_NUM; i++) {\n      /// hotword model exist already\n      if (!memcmp(&nvrecord_gsound_p->modelInfo[i].modelId, model,\n                  strlen(model))) {\n        break;\n      }\n    }\n\n    if (HOTWORD_MODLE_MAX_NUM == i) {\n      ret = false;\n    }\n  }\n\n  return ret;\n}\n\nbool nv_record_gsound_rec_add_new_model(void *pInfo) {\n  bool ret = true;\n  bool found = false;\n  uint32_t lock = 0;\n\n  HOTWORD_MODEL_INFO_T *info = (HOTWORD_MODEL_INFO_T *)pInfo;\n\n  if (INVALID_MODEL_NUM == nvrecord_gsound_p->supportedModelCnt) {\n    lock = nv_record_pre_write_operation();\n    nvrecord_gsound_p->supportedModelCnt = 0;\n    nv_record_post_write_operation(lock);\n  }\n\n  if (info) {\n    lock = nv_record_pre_write_operation();\n    info->startAddr |= OTA_FLASH_LOGIC_ADDR;\n\n    for (uint8_t i = 0; i < nvrecord_gsound_p->supportedModelCnt; i++) {\n      /// hotword model exist already\n      if (!memcmp(&nvrecord_gsound_p->modelInfo[i].modelId, info->modelId,\n                  GSOUND_HOTWORD_MODEL_ID_BYTES)) {\n        LOG_I(\"info->startAddr:%x\", info->startAddr);\n\n        ///.update the start address\n        if (info->startAddr) {\n          nvrecord_gsound_p->modelInfo[i].startAddr = info->startAddr;\n          nvrecord_gsound_p->modelInfo[i].len = info->len;\n        }\n\n        LOG_I(\"model already exist in user section, model_id:%s, model_addr:%x\",\n              nvrecord_gsound_p->modelInfo[i].modelId,\n              nvrecord_gsound_p->modelInfo[i].startAddr);\n        found = true;\n        break;\n      }\n    }\n\n    LOG_I(\"current supportedModelCnt:%d\", nvrecord_gsound_p->supportedModelCnt);\n\n    /// brand new model insert\n    if (!found) {\n      memcpy(\n          &nvrecord_gsound_p->modelInfo[nvrecord_gsound_p->supportedModelCnt],\n          info, sizeof(HOTWORD_MODEL_INFO_T));\n\n      LOG_I(\"new added modelId:%s, startAddr:%x, modelFileLen:%x\",\n            info->modelId, info->startAddr, info->len);\n      nvrecord_gsound_p->supportedModelCnt++;\n    }\n    nv_record_post_write_operation(lock);\n\n    /// new model file incoming, update flash info\n    if (!found) {\n      /// flush the hotword info to flash\n      nv_record_update_runtime_userdata();\n      nv_record_flash_flush();\n    }\n\n    LOG_I(\"current supportedModelCnt:%d\", nvrecord_gsound_p->supportedModelCnt);\n  } else {\n    LOG_W(\"NULL pointer received in %s\", __func__);\n    ret = false;\n  }\n\n  return ret;\n}\n\nuint32_t nv_record_gsound_rec_get_hotword_model_addr(const char *model_id,\n                                                     bool add_new,\n                                                     int32_t newModelLen) {\n  uint32_t addr = 0;\n  bool found = false;\n\n  LOG_I(\"%s revceived model ID: %s\", __func__, model_id);\n  if (nvrecord_gsound_p) {\n    for (uint8_t i = 0; i < ARRAY_SIZE(nvrecord_gsound_p->modelInfo); i++) {\n      if (!memcmp(nvrecord_gsound_p->modelInfo[i].modelId, model_id, 4)) {\n        addr = nvrecord_gsound_p->modelInfo[i].startAddr;\n        found = true;\n        LOG_I(\"found saved model info, index:%d\", i);\n        break;\n      }\n    }\n  }\n\n  do {\n    if (add_new && !found) {\n      addr = (uint32_t)__hotword_model_start;\n      uint32_t tempAddr;\n      uint8_t startIdx = 0;\n#ifdef MODEL_FILE_EMBEDED\n      startIdx =\n          DEFAULT_MODEL_NUM; //!< set offset to skip the embeded model file info\n#endif\n\n      if (INVALID_MODEL_NUM == nvrecord_gsound_p->supportedModelCnt) {\n        break;\n      }\n\n      /// get the largest flash address\n      for (uint8_t i = startIdx; i < nvrecord_gsound_p->supportedModelCnt;\n           i++) {\n        tempAddr = nvrecord_gsound_p->modelInfo[i].startAddr +\n                   nvrecord_gsound_p->modelInfo[i].len;\n        if ((tempAddr & 0xFFFFFF) > (addr & 0xFFFFFF)) {\n          addr = tempAddr;\n        }\n      }\n\n      /// force 4K align the address\n      addr = F_4K_ALIGN(addr);\n      LOG_I(\"supportedModelCnt:%d, Largest address:0x%x\",\n            nvrecord_gsound_p->supportedModelCnt, addr);\n\n      /// check is overwrite needed\n      if ((newModelLen + addr) > (uint32_t)__hotword_model_end ||\n          (nvrecord_gsound_p->supportedModelCnt >= HOTWORD_MODLE_MAX_NUM)) {\n        uint8_t cleanIdx = 0; //!< model file index to clean\n        addr = nvrecord_gsound_p->modelInfo[startIdx]\n                   .startAddr; //!< init anchor point\n        uint32_t cleanSize =\n            F_4K_ALIGN(addr + nvrecord_gsound_p->modelInfo[startIdx].len) -\n            addr; //!< flash size to clean\n\n        uint32_t lock = nv_record_pre_write_operation(); //!< disable the MPU\n                                                         //!< for info update\n        uint32_t intLock = int_lock(); //!< lock the global interrupt\n\n        /// remove the first record\n        for (uint8_t i = startIdx;\n             i < (nvrecord_gsound_p->supportedModelCnt - 1); i++) {\n          nvrecord_gsound_p->modelInfo[i] = nvrecord_gsound_p->modelInfo[i + 1];\n        }\n\n        /// decrease the number of supported model\n        nvrecord_gsound_p->supportedModelCnt--;\n\n        while (cleanSize < newModelLen) {\n          uint8_t headAdjacentIdx = 0xFF, tailAdjacentIdx = 0xFF;\n          uint32_t headAdjacentOffset = 0xFFFFFFFF,\n                   tailAdjacentOffset = 0xFFFFFFFF;\n\n          /// find the adjacent chunck\n          for (uint8_t i = startIdx; i < nvrecord_gsound_p->supportedModelCnt;\n               i++) {\n            if (nvrecord_gsound_p->modelInfo[i].startAddr > addr) {\n              if (nvrecord_gsound_p->modelInfo[i].startAddr - addr <\n                  tailAdjacentOffset) {\n                tailAdjacentOffset =\n                    nvrecord_gsound_p->modelInfo[i].startAddr - addr;\n                tailAdjacentIdx = i;\n              }\n            } else if (nvrecord_gsound_p->modelInfo[i].startAddr < addr) {\n              if (addr - nvrecord_gsound_p->modelInfo[i].startAddr <\n                  headAdjacentOffset) {\n                headAdjacentOffset =\n                    nvrecord_gsound_p->modelInfo[i].startAddr - addr;\n                headAdjacentIdx = i;\n              }\n            }\n          }\n\n          LOG_I(\"headAdjacentIdx:%d, tailAdjacentIdx:%d\", headAdjacentIdx,\n                tailAdjacentIdx);\n\n          /// find the smaller index, smaller index means older record\n          if (headAdjacentIdx > tailAdjacentIdx) {\n            cleanSize +=\n                F_4K_ALIGN(\n                    nvrecord_gsound_p->modelInfo[tailAdjacentIdx].startAddr +\n                    nvrecord_gsound_p->modelInfo[tailAdjacentIdx].len) -\n                nvrecord_gsound_p->modelInfo[tailAdjacentIdx].startAddr;\n            cleanIdx = tailAdjacentIdx;\n          } else {\n            addr = nvrecord_gsound_p->modelInfo[headAdjacentIdx].startAddr;\n            cleanSize +=\n                F_4K_ALIGN(addr +\n                           nvrecord_gsound_p->modelInfo[headAdjacentIdx].len) -\n                addr;\n            cleanIdx = headAdjacentIdx;\n          }\n\n          /// remove the first record\n          for (uint8_t i = cleanIdx;\n               i < (nvrecord_gsound_p->supportedModelCnt - 1); i++) {\n            nvrecord_gsound_p->modelInfo[i] =\n                nvrecord_gsound_p->modelInfo[i + 1];\n          }\n\n          /// decrease the number of supported model\n          nvrecord_gsound_p->supportedModelCnt--;\n        }\n\n        if ((addr < (uint32_t)__hotword_model_start) ||\n            (addr > (uint32_t)__hotword_model_end)) {\n          LOG_I(\"invalid addr found:0x%x, clean all model files\", addr);\n          nvrecord_gsound_p->supportedModelCnt = startIdx;\n          addr = (uint32_t)__hotword_model_start;\n        }\n\n        if (0 == nvrecord_gsound_p->supportedModelCnt) {\n          /// invalid number used to identify with fist time bootup\n          nvrecord_gsound_p->supportedModelCnt = INVALID_MODEL_NUM;\n        }\n\n        int_unlock(intLock);                  //!< unlock the global interrupt\n        nv_record_post_write_operation(lock); //!< enable the MPU\n\n        /// flush the hotword info to flash\n        nv_record_update_runtime_userdata();\n        nv_record_flash_flush();\n      }\n    }\n  } while (0);\n\n  return addr;\n}\n\nint nv_record_gsound_rec_get_supported_model_id(char *models_out,\n                                                uint8_t *length_out) {\n  int ret = 0;\n  const char *terminator = NULL;\n\n  if (INVALID_MODEL_NUM == nvrecord_gsound_p->supportedModelCnt) {\n    memcpy(models_out, STRING_TERMINATOR_NULL, STRING_TERMINATOR_SIZE);\n    *length_out = STRING_TERMINATOR_SIZE;\n  } else {\n    for (uint8_t i = 0; i < nvrecord_gsound_p->supportedModelCnt; i++) {\n      LOG_I(\"supported model_id:%s, model_addr:%x\",\n            nvrecord_gsound_p->modelInfo[i].modelId,\n            nvrecord_gsound_p->modelInfo[i].startAddr);\n\n      memcpy((supportedModels + i * GSOUND_HOTWORD_SUPPORTED_MODEL_ID_BYTES),\n             nvrecord_gsound_p->modelInfo[i].modelId,\n             GSOUND_HOTWORD_MODEL_ID_BYTES);\n\n      if ((i + 1) == nvrecord_gsound_p->supportedModelCnt) {\n        terminator = STRING_TERMINATOR_NULL;\n      } else {\n        terminator = SUPPORTED_HOTWORD_MODEL_DELIM;\n      }\n      memcpy(&supportedModels[(i * GSOUND_HOTWORD_SUPPORTED_MODEL_ID_BYTES) +\n                              GSOUND_HOTWORD_MODEL_ID_BYTES],\n             terminator, STRING_TERMINATOR_SIZE);\n    }\n\n    if (nvrecord_gsound_p->supportedModelCnt *\n            GSOUND_HOTWORD_SUPPORTED_MODEL_ID_BYTES <=\n        *length_out) {\n      strcpy(models_out, supportedModels);\n      *length_out = strlen(supportedModels) + STRING_TERMINATOR_SIZE;\n      LOG_I(\"total supported model_id(length is %d):\", *length_out);\n      DUMP8(\"0x%02x \", models_out, *length_out);\n    } else {\n      ret = -1;\n      LOG_W(\"supported model id length exceeded max length\");\n    }\n  }\n\n  return ret;\n}\n#endif\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_gsound.h",
    "content": "/***************************************************************************\n*\n*Copyright 2015-2019 BES.\n*All rights reserved. All unpublished rights reserved.\n*\n*No part of this work may be used or reproduced in any form or by any\n*means, or stored in a database or retrieval system, without prior written\n*permission of BES.\n*\n*Use of this work is governed by a license granted by BES.\n*This work contains confidential and proprietary information of\n*BES. which is protected by copyright, trade secret,\n*trademark and other intellectual property rights.\n*\n****************************************************************************/\n\n\n#ifndef __NVRECORD_GSOUND_H__\n#define __NVRECORD_GSOUND_H__\n\n#ifdef __cplusplus\nextern \"C\"{\n#endif\n\n/*****************************header include********************************/\n#include \"nvrecord_extension.h\"\n\n/******************************macro defination*****************************/\n#define F_4K_ALIGN(val) (((val)+0xFFF)&~0xFFF)\n#define IS_F_4K_ALIGNED(val) (val==(val&~0xFFF))\n\n#define INVALID_MODEL_NUM 0xFF          //!< used to distinguish from default 0 after first time bootup\n#define DEFAULT_MODEL_NUM 1             //!< number of default supported hotword model\n#define DEFAULT_HOTWORD_MODEL_ID \"200Q\" //!< default model ID, provided by Google\n\n/******************************type defination******************************/\n\n/****************************function declearation**************************/\n\n/**\n * @brief Init the gsound info pointer which is pointing to the gsound info\n * saved in nv_section\n * \n */\nvoid nv_record_gsound_rec_init(void);\n\n/**\n * @brief Get the pointer of gsound info saved in nv_section\n * \n * @param ptr           Pointer to get the result\n */\nvoid nv_record_gsound_rec_get_ptr(void **ptr);\n\n/**\n * @brief Update the enable state of gsound service in nv_section\n * \n * @param enable        true for enable, false for disable\n */\nvoid nv_record_gsound_rec_updata_enable_state(bool enable);\n\n\n#ifdef GSOUND_HOTWORD_ENABLED\n/*---------------------------------------------------------------------------\n *            nv_record_gsound_rec_is_model_insert_allowed\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    is input model is allowed to be a supported model\n *\n * Parameters:\n *    model : string of model ID\n *\n * Return:\n *    true : imput is allowed to be a supported model\n *    false : imput is not allowed to be a supported model\n */\nbool nv_record_gsound_rec_is_model_insert_allowed(const char *model);\n\n/*---------------------------------------------------------------------------\n *            nv_record_gsound_rec_add_new_model\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    add a new hotword model\n *\n * Parameters:\n *    info : should be a pointer of structure HOTWORD_MODEL_INFO_T\n *           NOTE: startAddr of HOTWORD_MODEL_INFO_T is invalid here\n *\n * Return:\n *    true : add successfully\n *    false : fail to add\n */\nbool nv_record_gsound_rec_add_new_model(void *info);\n\n/*---------------------------------------------------------------------------\n *            nv_record_gsound_rec_get_hotword_model_addr\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    get hotword model file address accroding to the model ID\n *\n * Parameters:\n *    model_id : model id\n *    addNew : the flag to mark if return an avaliable addr for new model\n *               when incoming model ID is not found in flash\n *    newModelLen: the length of new incoming model\n *                 NOTE: only useful when addNew is true\n *\n * Return:\n *    the address of model file respective to given model ID\n */\nuint32_t nv_record_gsound_rec_get_hotword_model_addr(const char *model_id, bool addNew, int32_t newModelLen);\n\n/**\n * @brief get supported hotword model ID\n * \n * @param models_out : pointer of supported model id string\n * @param length_out : length of supported model id string\n */\nint nv_record_gsound_rec_get_supported_model_id(char *models_out,\n                                                 uint8_t *length_out);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __NVRECORD_GSOUND_H__ */"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_ota.c",
    "content": "/**\n * @file nvrecord_ota.c\n * @author BES AI team\n * @version 0.1\n * @date 2020-04-21\n *\n * @copyright Copyright (c) 2015-2020 BES Technic.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n */\n\n/*****************************header include********************************/\n#include \"nvrecord_ota.h\"\n#include \"nv_section_dbg.h\"\n#include \"ota_common.h\"\n#include \"string.h\"\n\n#ifdef BISTO_ENABLED\n#include \"nvrecord_gsound.h\"\n#endif\n\n/*********************external function declearation************************/\n\n/************************private macro defination***************************/\n\n/************************private type defination****************************/\n\n/**********************private function declearation************************/\n\n/************************private variable defination************************/\nstatic NV_OTA_INFO_T *nvrecord_ota_p = NULL;\n\n/****************************function defination****************************/\nvoid nv_record_ota_init(void) {\n  if (NULL == nvrecord_ota_p) {\n    nvrecord_ota_p = nvrecord_extension_p->ota_info;\n  }\n}\n\nvoid nv_record_ota_get_ptr(void **ptr) { *ptr = nvrecord_ota_p; }\n\nvoid nv_record_ota_update_breakpoint(uint8_t user, uint8_t deviceIndex,\n                                     uint32_t otaOffset) {\n  NV_OTA_INFO_T *pOta = &nvrecord_ota_p[deviceIndex];\n  bool update = false;\n\n  ASSERT(OTA_STAGE_ONGOING == pOta->otaStatus,\n         \"try to update break point when OTA not in progress\");\n\n  uint32_t lock = nv_record_pre_write_operation();\n  if (user != pOta->user) {\n    LOG_I(\"OTA user update:%d->%d\", pOta->user, user);\n    pOta->user = user;\n    update = true;\n  }\n\n  if (otaOffset != pOta->breakPoint) {\n    LOG_I(\"OTA break point update:%x->%x\", pOta->breakPoint, otaOffset);\n    pOta->breakPoint = otaOffset;\n    update = true;\n  }\n  nv_record_post_write_operation(lock);\n\n  if (update) {\n    nv_record_extension_update();\n    nv_record_execute_async_flush();\n  }\n}\n\nbool nv_record_ota_update_info(uint8_t user, uint8_t deviceIndex,\n                               uint8_t status, uint32_t totalImageSize,\n                               const char *session) {\n  NV_OTA_INFO_T *pOta = &nvrecord_ota_p[deviceIndex];\n\n  LOG_I(\"%s\", __func__);\n  LOG_I(\"ota_status:%d->%d, user:%d, device_index:%d, imageSize:%d, version:%s\",\n        pOta->otaStatus, status, user, deviceIndex, totalImageSize, session);\n\n  bool ret = true;\n  bool update = false;\n\n#ifdef GSOUND_HOTWORD_ENABLED\n  if ((OTA_USER_COLORFUL == user) && (OTA_DEVICE_HOTWORD == deviceIndex)) {\n    ret = nv_record_gsound_rec_is_model_insert_allowed(session);\n  }\n#endif\n\n  if (ret) {\n    uint32_t lock = nv_record_pre_write_operation();\n    if (!memcmp(pOta->version, session, strlen(session) + 1)) {\n      memset(pOta->version, 0, ARRAY_SIZE(pOta->version));\n      update = true;\n    }\n\n    if (pOta->otaStatus != status) {\n      pOta->otaStatus = status;\n      update = true;\n      LOG_I(\"update device %d ota status to %d\", deviceIndex, pOta->otaStatus);\n    }\n\n    if (OTA_STAGE_IDLE == status) {\n      if (0 != pOta->breakPoint) {\n        pOta->breakPoint = 0;\n        update = true;\n      }\n    } else if (OTA_STAGE_ONGOING == status) {\n      ASSERT(totalImageSize, \"Received total image size is 0.\");\n      ASSERT(session, \"Received session pointer is NULL.\");\n\n      if (pOta->imageSize != totalImageSize) {\n        pOta->imageSize = totalImageSize;\n        update = true;\n      }\n    } else if (OTA_STAGE_DONE == status) {\n      ASSERT(totalImageSize == pOta->imageSize,\n             \"total image size changed:%d->%d.\", pOta->imageSize,\n             totalImageSize);\n\n      if (totalImageSize != pOta->breakPoint) {\n        pOta->breakPoint = totalImageSize;\n        update = true;\n      }\n    }\n    nv_record_post_write_operation(lock);\n\n    if (update) {\n      LOG_I(\"will update info into flash.\");\n      nv_record_extension_update();\n      nv_record_execute_async_flush();\n    }\n  }\n\n  return ret;\n}\n"
  },
  {
    "path": "services/nv_section/userdata_section/nvrecord_ota.h",
    "content": "/**\n * @file nvrecord_ota.h\n * @author BES AI team\n * @version 0.1\n * @date 2020-04-21\n * \n * @copyright Copyright (c) 2015-2020 BES Technic.\n * All rights reserved. All unpublished rights reserved.\n * \n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n * \n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n */\n\n\n#ifndef __NVRECORD_OTA_H__\n#define __NVRECORD_OTA_H__\n\n#ifdef __cplusplus\nextern \"C\"{\n#endif\n\n/*****************************header include********************************/\n#include \"nvrecord_extension.h\"\n\n/******************************macro defination*****************************/\n\n/******************************type defination******************************/\n\n/****************************function declearation**************************/\n/**\n * @brief Initialize the nvrecord pointer.\n * \n */\nvoid nv_record_ota_init(void);\n\n/**\n * @brief Get the pointer of OTA info saved in flash.\n * \n * NOTE: OTA support mutiple devices(currently APP and hotword model file), so\n * you need to use the device index and the pointer from this function you get\n * to get the device specific OTA info.\n * \n * @param ptr           pointer used to get the flash pointer\n */\nvoid nv_record_ota_get_ptr(void **ptr);\n\n/**\n * @brief Update the break point for OTA progress.\n * \n * @param user          current user\n * @param deviceIndex   current deivce index\n * @param otaOffset     break point to update\n */\nvoid nv_record_ota_update_breakpoint(uint8_t user,\n                                     uint8_t deviceIndex,\n                                     uint32_t otaOffset);\n\n/**\n * @brief Update the OTA info.\n * \n * @param user          current OTA user\n * @param deviceIndex   current device in OTA progress\n * @param status        OTA status(stage) to update,\n *                      @see OTA_STAGE_E to get more details\n * @param imageSize     image size\n * @param session       OTA version string pointer\n * @return true         OTA info update successfully\n * @return false        OTA info update failed\n */\nbool nv_record_ota_update_info(uint8_t user,\n                               uint8_t deviceIndex,\n                               uint8_t status,\n                               uint32_t imageSize,\n                               const char *session);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __NVRECORD_OTA_H__ */"
  },
  {
    "path": "services/nvrecord/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += \\\n    -Iutils/hexdump \\\n    -Iapps/key \\\n    -Iservices/bt_app \\\n    $(BT_IF_INCLUDES) \\\n    -Iutils/crc32 \\\n    -Iplatform/drivers/ana \\\n    -Iservices/nv_section/customparam_section \\\n    -Iservices/ble_stack/common/api \\\n    -Iservices/ble_stack/ble_ip \\\n    -Iutils/heap \\\n    -Iutils/encrypt \\\n    -Iservices/norflash_api \\\n    -Iservices/nv_setion/userdata_section\n\nCFLAGS_nvrecord.o += -DAUDIO_OUTPUT_VOLUME_DEFAULT=$(AUDIO_OUTPUT_VOLUME_DEFAULT)\n\nifeq ($(FLASH_SUSPEND),1)\nCFLAGS_nvrecord.o += -DFLASH_SUSPEND\nendif\n\n"
  },
  {
    "path": "services/nvrecord/list_ext.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"list_ext.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n\nstatic list_node_t *list_free_node_ext(list_t *list, list_node_t *node);\n\nvoid *zmalloc_ext(size_t size) {\n  void *ptr = NULL;\n  ptr = pool_malloc(size);\n  memset(ptr, 0, size);\n  return ptr;\n}\n// Returns a new, empty list. Returns NULL if not enough memory could be\n// allocated for the list structure. The returned list must be freed with\n// |list_free|. The |callback| specifies a function to be called whenever a list\n// element is removed from the list. It can be used to release resources held by\n// the list element, e.g. memory or file descriptor. |callback| may be NULL if\n// no cleanup is necessary on element removal.\nlist_t *list_new_ext(list_free_cb callback) {\n  list_t *list = (list_t *)zmalloc_ext(sizeof(list_t));\n  if (list)\n    list->free_cb = callback;\n  return list;\n}\n\n// Frees the list. This function accepts NULL as an argument, in which case it\n// behaves like a no-op.\nvoid list_free_ext(list_t *list) {\n  if (list != NULL)\n    list_clear_ext(list);\n  pool_free(list);\n}\n\n// Returns true if the list is empty (has no elements), false otherwise.\n// Note that a NULL list is not the same as an empty list. This function\n// does not accept a NULL list.\nbool list_is_empty_ext(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  return (list->length == 0);\n}\n\n// Returns the length of the list. This function does not accept a NULL list.\nsize_t list_length_ext(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  return list->length;\n}\n\n// Returns the first element in the list without removing it. |list| may not\n// be NULL or empty.\nvoid *list_front_ext(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  bool nRet = list_is_empty_ext(list);\n  ASSERT(!nRet, \"%s\", __func__);\n  return list->head->data;\n}\n\n// Returns the last element in the list without removing it. |list| may not\n// be NULL or empty.\nvoid *list_back_ext(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  bool nRet = list_is_empty_ext(list);\n  ASSERT(!nRet, \"%s\", __func__);\n\n  return list->tail->data;\n}\n\nbool list_insert_after_ext(list_t *list, list_node_t *prev_node, void *data) {\n  list_node_t *node = NULL;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(prev_node != NULL, \"%s\", __func__);\n  ASSERT(data != NULL, \"%s\", __func__);\n\n  node = (list_node_t *)pool_malloc(sizeof(list_node_t));\n  if (!node)\n    return false;\n\n  node->next = prev_node->next;\n  node->data = data;\n  prev_node->next = node;\n  if (list->tail == prev_node)\n    list->tail = node;\n  ++list->length;\n  return true;\n}\n\n#include \"stdio.h\"\n// Inserts |data| at the beginning of |list|. Neither |data| nor |list| may be\n// NULL. This function does not make a copy of |data| so the pointer must remain\n// valid at least until the element is removed from the list or the list is\n// freed. Returns true if |data| could be inserted, false otherwise (e.g. out of\n// memory).\nbool list_prepend_ext(list_t *list, void *data) {\n  list_node_t *node = NULL;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(data != NULL, \"%s\", __func__);\n  node = (list_node_t *)zmalloc_ext(sizeof(list_node_t));\n  if (!node)\n    return false;\n  node->next = list->head;\n  node->data = data;\n  list->head = node;\n  if (list->tail == NULL)\n    list->tail = list->head;\n  ++list->length;\n  return true;\n}\n\n// Inserts |data| at the end of |list|. Neither |data| nor |list| may be NULL.\n// This function does not make a copy of |data| so the pointer must remain valid\n// at least until the element is removed from the list or the list is freed.\n// Returns true if |data| could be inserted, false otherwise (e.g. out of\n// memory).\nbool list_append_ext(list_t *list, void *data) {\n  list_node_t *node = NULL;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(data != NULL, \"%s\", __func__);\n  node = (list_node_t *)pool_malloc(sizeof(list_node_t));\n  if (!node)\n    return false;\n  node->next = NULL;\n  node->data = data;\n  if (list->tail == NULL) {\n    list->head = node;\n    list->tail = node;\n  } else {\n    list->tail->next = node;\n    list->tail = node;\n  }\n  ++list->length;\n  return true;\n}\n\n// Removes |data| from the list. Neither |list| nor |data| may be NULL. If\n// |data| is inserted multiple times in the list, this function will only remove\n// the first instance. If a free function was specified in |list_new|, it will\n// be called back with |data|. This function returns true if |data| was found in\n// the list and removed, false otherwise.\nbool list_remove_ext(list_t *list, void *data) {\n  list_node_t *prev = NULL, *node = NULL;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(data != NULL, \"%s\", __func__);\n\n  if (list_is_empty_ext(list))\n    return false;\n\n  if (list->head->data == data) {\n    list_node_t *next = list_free_node_ext(list, list->head);\n    if (list->tail == list->head)\n      list->tail = next;\n    list->head = next;\n    return true;\n  }\n\n  for (prev = list->head, node = list->head->next; node;\n       prev = node, node = node->next)\n    if (node->data == data) {\n      prev->next = list_free_node_ext(list, node);\n      if (list->tail == node)\n        list->tail = prev;\n      return true;\n    }\n\n  return false;\n}\n\n// Removes all elements in the list. Calling this function will return the list\n// to the same state it was in after |list_new|. |list| may not be NULL.\nvoid list_clear_ext(list_t *list) {\n  list_node_t *node = NULL;\n  ASSERT(list != NULL, \"%s\", __func__);\n  for (node = list->head; node;)\n    node = list_free_node_ext(list, node);\n  list->head = NULL;\n  list->tail = NULL;\n  list->length = 0;\n}\n\n// Iterates through the entire |list| and calls |callback| for each data\n// element. If the list is empty, |callback| will never be called. It is safe to\n// mutate the list inside the callback. If an element is added before the node\n// being visited, there will be no callback for the newly-inserted node. Neither\n// |list| nor |callback| may be NULL.\nvoid list_foreach_ext(const list_t *list, list_iter_cb callback) {\n  list_node_t *node = NULL;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(callback != NULL, \"%s\", __func__);\n\n  for (node = list->head; node;) {\n    list_node_t *next = node->next;\n    callback(node->data);\n    node = next;\n  }\n}\n\n// Returns an iterator to the first element in |list|. |list| may not be NULL.\n// The returned iterator is valid as long as it does not equal the value\n// returned by |list_end|.\nlist_node_t *list_begin_ext(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  return list->head;\n}\n\n// Returns an iterator that points past the end of the list. In other words,\n// this function returns the value of an invalid iterator for the given list.\n// When an iterator has the same value as what's returned by this function, you\n// may no longer call |list_next| with the iterator. |list| may not be NULL.\nlist_node_t *list_end_ext(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  return NULL;\n}\n\n// Given a valid iterator |node|, this function returns the next value for the\n// iterator. If the returned value equals the value returned by |list_end|, the\n// iterator has reached the end of the list and may no longer be used for any\n// purpose.\nlist_node_t *list_next_ext(const list_node_t *node) {\n  ASSERT(node != NULL, \"%s\", __func__);\n  return node->next;\n}\n\n// Returns the value stored at the location pointed to by the iterator |node|.\n// |node| must not equal the value returned by |list_end|.\nvoid *list_node_ext(const list_node_t *node) {\n  ASSERT(node != NULL, \"%s\", __func__);\n  return node->data;\n}\n\nstatic list_node_t *list_free_node_ext(list_t *list, list_node_t *node) {\n  list_node_t *next = NULL;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(node != NULL, \"%s\", __func__);\n\n  next = node->next;\n\n  if (list->free_cb)\n    list->free_cb(node->data);\n  pool_free(node);\n  --list->length;\n\n  return next;\n}\n"
  },
  {
    "path": "services/nvrecord/list_ext.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#pragma once\n\n#ifndef __LIST_H__\n#define __LIST_H__\n\n#include \n#include \n#include \"heap_api.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nextern heap_handle_t g_nv_mempool;\n\n#define pool_malloc(size)   heap_malloc(g_nv_mempool,size)\n#define pool_free(ptr)      heap_free(g_nv_mempool,ptr)\n#define pool_free_space()   heap_free_size(g_nv_mempool)\n\ntypedef void (*list_free_cb)(void *data);\ntypedef bool (*list_iter_cb)(void *data);\n\ntypedef struct list_node_t {\n  struct list_node_t *next;\n  void *data;\n} list_node_t;\n\ntypedef struct list_t {\n  list_node_t *head;\n  list_node_t *tail;\n  size_t length;\n  list_free_cb free_cb;\n} list_t;\n\n//struct list_t;\ntypedef struct list_t list_t;\nvoid *zmalloc_ext (size_t size);\n// Lifecycle.\nlist_t *list_new_ext(list_free_cb callback);\nvoid list_free_ext(list_t *list);\n\n// Accessors.\nbool list_is_empty_ext(const list_t *list);\nsize_t list_length_ext(const list_t *list);\nvoid *list_front_ext(const list_t *list);\nvoid *list_back_ext(const list_t *list);\n\n// Mutators.\nbool list_insert_after_ext(list_t *list, list_node_t *prev_node, void *data);\nbool list_prepend_ext(list_t *list, void *data);\nbool list_append_ext(list_t *list, void *data);\nbool list_remove_ext(list_t *list, void *data);\nvoid list_clear_ext(list_t *list);\n\n// Iteration.\nvoid list_foreach_ext(const list_t *list, list_iter_cb callback);\n\nlist_node_t *list_begin_ext(const list_t *list);\nlist_node_t *list_end_ext(const list_t *list);\nlist_node_t *list_next_ext(const list_node_t *node);\nvoid *list_node_ext(const list_node_t *node);\n\n#ifdef __cplusplus\n    }\n#endif\n\n#endif//__FMDEC_H__\n\n"
  },
  {
    "path": "services/nvrecord/nvrec_config.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#define LOG_TAG \"bt_osi_config\"\n\n#include \"nvrec_config.h\"\n#include \"hal_trace.h\"\n#include \"list_ext.h\"\n#include \"nvrecord.h\"\n#include \"stdio.h\"\n#include \n#include \n#include \n#include \nstatic nvrec_section_t *nvrec_section_new(const char *name);\nstatic void nvrec_section_free(void *ptr);\n\nstatic nvrec_entry_t *nvrec_entry_new(const char *key, const char *value,\n                                      const char *descrip);\nstatic nvrec_entry_t *nvrec_entry_find(const nvrec_config_t *config,\n                                       const char *section, const char *key);\n\nvoid *cfg_malloc(unsigned int size) {\n  void *ptr = NULL;\n  if (size == 0)\n    return NULL;\n  ptr = pool_malloc(size);\n  if (ptr == NULL) {\n    printf(\"cfg_malloc......ERROR\\n\");\n  }\n  return ptr;\n}\n\nvoid *cfg_zmalloc(unsigned int size) {\n  void *ptr = NULL;\n  ptr = cfg_malloc(size);\n  memset(ptr, 0, size);\n  return ptr;\n}\n\nvoid cfg_free(void *p_mem) { pool_free(p_mem); }\n\nnvrec_config_t *nvrec_config_new(const char *filename) {\n  nvrec_config_t *config;\n  // add your code at here\n  //    printf(\"nvrec_config_new-->cfg_zmalloc..........................\\r\\n\");\n  config = (nvrec_config_t *)cfg_zmalloc(sizeof(nvrec_config_t));\n  if (config)\n    config->sections = list_new_ext(nvrec_section_free);\n\n  return config;\n}\n\nvoid nvrec_config_free(nvrec_config_t *config) {\n  if (!config)\n    return;\n\n  list_free_ext(config->sections);\n  //  printf(\"nvrec_config_free-->cfg_free..........................\\r\\n\");\n  cfg_free(config);\n}\n\nbool nvrec_config_has_section(const nvrec_config_t *config,\n                              const char *section) {\n  assert(config != NULL);\n  assert(section != NULL);\n\n  return (nvrec_section_find(config, section) != NULL);\n}\n\nbool nvrec_config_has_key(const nvrec_config_t *config, const char *section,\n                          const char *key) {\n  assert(config != NULL);\n  assert(section != NULL);\n  assert(key != NULL);\n\n  return (nvrec_entry_find(config, section, key) != NULL);\n}\n\nint nvrec_config_get_int(const nvrec_config_t *config, const char *section,\n                         const char *key, int def_value) {\n  nvrec_entry_t *entry = NULL;\n  char *endptr = NULL;\n  int ret = 0;\n  assert(config != NULL);\n  assert(section != NULL);\n  assert(key != NULL);\n\n  entry = nvrec_entry_find(config, section, key);\n  if (!entry)\n    return def_value;\n\n  ret = strtol(entry->value, &endptr, 0);\n  return (*endptr == '\\0') ? ret : def_value;\n}\n\nbool nvrec_config_get_bool(const nvrec_config_t *config, const char *section,\n                           const char *key, bool def_value) {\n  nvrec_entry_t *entry = NULL;\n  assert(config != NULL);\n  assert(section != NULL);\n  assert(key != NULL);\n\n  entry = nvrec_entry_find(config, section, key);\n  if (!entry)\n    return def_value;\n\n  if (!strcmp(entry->value, \"true\"))\n    return true;\n  if (!strcmp(entry->value, \"false\"))\n    return false;\n\n  return def_value;\n}\n\nconst char *nvrec_config_get_string(const nvrec_config_t *config,\n                                    const char *section, const char *key,\n                                    const char *def_value) {\n  nvrec_entry_t *entry = NULL;\n\n  assert(config != NULL);\n  assert(section != NULL);\n  assert(key != NULL);\n\n  entry = nvrec_entry_find(config, section, key);\n\n  if (!entry)\n    return def_value;\n\n  return entry->value;\n}\n\nvoid nvrec_config_set_int(nvrec_config_t *config, const char *section,\n                          const char *key, int value) {\n\n  char value_str[32] = {0};\n  assert(config != NULL);\n  assert(section != NULL);\n  assert(key != NULL);\n\n  sprintf(value_str, \"%d\", value);\n  nvrec_config_set_string(config, section, key, value_str);\n}\n\nvoid nvrec_config_set_bool(nvrec_config_t *config, const char *section,\n                           const char *key, bool value) {\n  assert(config != NULL);\n  assert(section != NULL);\n  assert(key != NULL);\n\n  nvrec_config_set_string(config, section, key, value ? \"true\" : \"false\");\n}\n\nvoid *strdup_ext(const char *value) {\n  void *ptr = NULL;\n\n  if (NULL != value) {\n    size_t malloclen = (strlen(value) + 1);\n    ptr = zmalloc_ext(malloclen);\n    memcpy(ptr, value, strlen(value));\n  }\n  return ptr;\n}\n\nstatic char *bdaddrdup(const char *string, unsigned int len) {\n  char *memory;\n\n  if (!string)\n    return (NULL);\n  memory = cfg_zmalloc(len + 1);\n  if (NULL != memory) {\n    memcpy(memory, string, len);\n    return memory;\n  }\n  return (NULL);\n}\n\nvoid nvrec_config_set_string(nvrec_config_t *config, const char *section,\n                             const char *key, const char *value) {\n  nvrec_entry_t *entry = NULL;\n  list_node_t *node = NULL;\n  nvrec_section_t *sec = nvrec_section_find(config, section);\n  if (!sec) {\n    sec = nvrec_section_new(section);\n    list_append_ext(config->sections, sec);\n  }\n  if (0 == strcmp(section, section_name_ddbrec)) {\n    for (node = list_begin_ext(sec->entries);\n         node != list_end_ext(sec->entries); node = list_next_ext(node)) {\n      entry = list_node_ext(node);\n      if (0 == memcmp(entry->key, key, BTIF_BD_ADDR_SIZE)) {\n        cfg_free(entry->value);\n        entry->value = (char *)strdup_ext(value);\n        return;\n      }\n    }\n  } else {\n    for (node = list_begin_ext(sec->entries);\n         node != list_end_ext(sec->entries); node = list_next_ext(node)) {\n      entry = list_node_ext(node);\n      if (!strcmp(entry->key, key)) {\n        cfg_free(entry->value);\n        entry->value = (char *)strdup_ext(value);\n        return;\n      }\n    }\n  }\n  entry = nvrec_entry_new(key, value, section);\n  list_append_ext(sec->entries, entry);\n}\n\nstatic nvrec_section_t *nvrec_section_new(const char *name) {\n  //   printf(\"nvrec_section_new-->cfg_zmalloc..........................\\r\\n\");\n  nvrec_section_t *section = cfg_zmalloc(sizeof(nvrec_section_t));\n  if (!section)\n    return NULL;\n\n  section->name = strdup_ext(name);\n  section->entries = list_new_ext(nvrec_entry_free);\n  return section;\n}\n\nstatic void nvrec_section_free(void *ptr) {\n  nvrec_section_t *section = ptr;\n  if (!ptr)\n    return;\n  //    printf(\"nvrec_section_free-->cfg_free..........................\\r\\n\");\n  cfg_free(section->name);\n  list_free_ext(section->entries);\n  cfg_free(section);\n}\n\nnvrec_section_t *nvrec_section_find(const nvrec_config_t *config,\n                                    const char *section) {\n  nvrec_section_t *sec = NULL;\n  list_node_t *node = NULL;\n  for (node = list_begin_ext(config->sections);\n       node != list_end_ext(config->sections); node = list_next_ext(node)) {\n    sec = list_node_ext(node);\n    if (!strcmp(sec->name, section))\n      return sec;\n  }\n\n  return NULL;\n}\n\nstatic nvrec_entry_t *nvrec_entry_new(const char *key, const char *value,\n                                      const char *descrip) {\n  nvrec_entry_t *entry = cfg_zmalloc(sizeof(nvrec_entry_t));\n  if (!entry)\n    return NULL;\n  if (0 == strcmp(descrip, section_name_ddbrec))\n    entry->key = bdaddrdup(key, BTIF_BD_ADDR_SIZE);\n  else\n    entry->key = strdup_ext(key);\n  entry->value = strdup_ext(value);\n  return entry;\n}\n\nvoid nvrec_entry_free(void *ptr) {\n  nvrec_entry_t *entry = ptr;\n  if (!ptr)\n    return;\n  //  printf(\"entry_free-->cfg_free..........................\\r\\n\");\n  cfg_free(entry->key);\n  cfg_free(entry->value);\n  cfg_free(entry);\n}\n\nstatic nvrec_entry_t *nvrec_entry_find(const nvrec_config_t *config,\n                                       const char *section, const char *key) {\n  list_node_t *node = NULL;\n  nvrec_section_t *sec = nvrec_section_find(config, section);\n  if (!sec)\n    return NULL;\n  if (0 == strcmp(section, section_name_ddbrec)) {\n    for (node = list_begin_ext(sec->entries);\n         node != list_end_ext(sec->entries); node = list_next_ext(node)) {\n      nvrec_entry_t *entry = list_node_ext(node);\n      if (0 == memcmp((const void *)entry->key, (const void *)key,\n                      BTIF_BD_ADDR_SIZE))\n        return entry;\n    }\n    return NULL;\n  } else {\n    for (node = list_begin_ext(sec->entries);\n         node != list_end_ext(sec->entries); node = list_next_ext(node)) {\n      nvrec_entry_t *entry = list_node_ext(node);\n      if (!strcmp(entry->key, key))\n        return entry;\n    }\n\n    return NULL;\n  }\n}\n#if 0\nint nevrec_entry_remove(const config_t *config, const char *section, const char *key) {\n  list_node_t *node;\n  section_t *sec = section_find(config, section);\n  if (!sec)\n    return NULL;\n  for (node = list_begin_ext(sec->entries); node != list_end_ext(sec->entries); node = list_next_ext(node)) {\n    entry_t *entry = list_node_ext(node);\n    if (!strcmp(entry->key, key))\n      list_remove_ext(sec->entries, entry);\n      return 0;\n  }\n  return 0;\n}\n#endif\n"
  },
  {
    "path": "services/nvrecord/nvrec_config.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __OSI_CONFIG_H__\n#define __OSI_CONFIG_H__\n\n// This module implements a configuration parser. Clients can query the\n// contents of a configuration file through the interface provided here.\n// The current implementation is read-only; mutations are only kept in\n// memory. This parser supports the INI file format.\n\n// Implementation notes:\n// - Key/value pairs that are not within a section are assumed to be under\n//   the |CONFIG_DEFAULT_SECTION| section.\n// - Multiple sections with the same name will be merged as if they were in\n//   a single section.\n// - Empty sections with no key/value pairs will be treated as if they do\n//   not exist. In other words, |nvrec_config_has_section| will return false for\n//   empty sections.\n// - Duplicate keys in a section will overwrite previous values.\n\n#include \n#include \"list_ext.h\"\n// The default section name to use if a key/value pair is not defined within\n// a section.\n#define CONFIG_DEFAULT_SECTION \"Global\"\ntypedef struct {\n  char *key;\n  char *value;\n} nvrec_entry_t;\n\ntypedef struct {\n  char *name;\n  list_t *entries;\n} nvrec_section_t;\n\ntypedef struct nvrec_config {\n  list_t *sections;\n}nvrec_config_t;\n\n// Loads the specified file and returns a handle to the config file. If there\n// was a problem loading the file or allocating memory, this function returns\n// NULL. Clients must call |nvrec_config_free| on the returned handle when it is no\n// longer required. |filename| must not be NULL and must point to a readable\n// file on the filesystem.\nnvrec_config_t *nvrec_config_new(const char *filename);\n\n// Frees resources associated with the config file. No further operations may\n// be performed on the |config| object after calling this function. |config|\n// may be NULL.\nvoid nvrec_config_free(nvrec_config_t *config);\n\n// Returns true if the config file contains a section named |section|. If\n// the section has no key/value pairs in it, this function will return false.\n// |config| and |section| must not be NULL.\nbool nvrec_config_has_section(const nvrec_config_t *config, const char *section);\n\n// Returns true if the config file has a key named |key| under |section|.\n// Returns false otherwise. |config|, |section|, and |key| must not be NULL.\nbool nvrec_config_has_key(const nvrec_config_t *config, const char *section, const char *key);\n\n// Returns the integral value for a given |key| in |section|. If |section|\n// or |key| do not exist, or the value cannot be fully converted to an integer,\n// this function returns |def_value|. |config|, |section|, and |key| must not\n// be NULL.\nint nvrec_config_get_int(const nvrec_config_t *config, const char *section, const char *key, int def_value);\n\n// Returns the boolean value for a given |key| in |section|. If |section|\n// or |key| do not exist, or the value cannot be converted to a boolean, this\n// function returns |def_value|. |config|, |section|, and |key| must not be NULL.\nbool nvrec_config_get_bool(const nvrec_config_t *config, const char *section, const char *key, bool def_value);\n\n// Returns the string value for a given |key| in |section|. If |section| or\n// |key| do not exist, this function returns |def_value|. The returned string\n// is owned by the config module and must not be freed. |config|, |section|,\n// and |key| must not be NULL. |def_value| may be NULL.\nconst char *nvrec_config_get_string(const nvrec_config_t *config, const char *section, const char *key, const char *def_value);\n\n// Sets an integral value for the |key| in |section|. If |key| or |section| do\n// not already exist, this function creates them. |config|, |section|, and |key|\n// must not be NULL.\nvoid nvrec_config_set_int(nvrec_config_t *config, const char *section, const char *key, int value);\n\n// Sets a boolean value for the |key| in |section|. If |key| or |section| do\n// not already exist, this function creates them. |config|, |section|, and |key|\n// must not be NULL.\nvoid nvrec_config_set_bool(nvrec_config_t *config, const char *section, const char *key, bool value);\n\n// Sets a string value for the |key| in |section|. If |key| or |section| do\n// not already exist, this function creates them. |config|, |section|, |key|, and\n// |value| must not be NULL.\nvoid nvrec_config_set_string(nvrec_config_t *config, const char *section, const char *key, const char *value);\nnvrec_section_t *nvrec_section_find(const nvrec_config_t *config, const char *section);\nvoid nvrec_entry_free(void *ptr);\n#endif\n\n"
  },
  {
    "path": "services/nvrecord/nvrecord.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"nvrecord.h\"\n#include \"besbt.h\"\n#include \"crc32.h\"\n#include \"hal_norflash.h\"\n#include \"hal_sleep.h\"\n#include \"hal_timer.h\"\n#include \"norflash_api.h\"\n#include \"nvrecord_dev.h\"\n#include \"nvrecord_env.h\"\n#include \"pmu.h\"\n#include \"tgt_hardware.h\"\n#include \n\n//#define NVREC_BURN_TEST\n#define OS_DUMP8(x...)\n\n// factory section region\n#define NVRECORD_CACHE_2_UNCACHE(addr)                                         \\\n  ((unsigned char *)((unsigned int)addr & ~(0x04000000)))\n\nstatic bool dev_sector_valid = false;\nuint8_t nv_record_dev_rev = NVREC_DEV_NEWEST_REV;\n#define CLASSIC_BTNAME_LEN (BLE_NAME_LEN_IN_NV - 5)\nchar classics_bt_name[CLASSIC_BTNAME_LEN] = \"BES\";\n\nextern uint32_t __factory_start[];\n\n/*\n    dev_version_and_magic,      //0\n    dev_crc,                    // 1\n    dev_reserv1,                // 2\n    dev_reserv2,                //3// 3\n    dev_name,                   //[4~66]\n    dev_bt_addr = 67,                //[67~68]\n    dev_ble_addr = 69,               //[69~70]\n    dev_dongle_addr = 71,\n    dev_xtal_fcap = 73,              //73\n    dev_data_len = 74,\n\n    dev_ble_name = 75,  //[75~82]\n*/\n\n#if !defined(NEW_NV_RECORD_ENABLED)\n#ifdef __ARMCC_VERSION\n#define USERDATA_POOL_LOC __attribute__((section(\".bss.userdata_pool\")))\n#else\n#define USERDATA_POOL_LOC __attribute__((section(\".userdata_pool\")))\n#endif\n\n//#define LINK_KEY_ENCRYPT\n#ifdef LINK_KEY_ENCRYPT\n#include \"aes.h\"\n#define LINK_KEY_ENCRYPT_KEY                                                   \\\n  \"\\x11\\x07\\x9e\\x34\\x9B\\x5F\\x80\\x00\\x00\\x80\\x00\\x10\\x00\\x00\\x00\\x01\"\n#endif\n\nextern uint32_t __userdata_start[];\nextern uint32_t __userdata_end[];\nextern int nv_record_flash_flush_in_sleep(void);\nstatic int nv_record_flash_flush_int(bool is_async);\n\nvoid nv_callback(void *param);\n\nnv_record_struct nv_record_config;\nstatic bool nvrec_init = false;\nstatic bool nvrec_mempool_init = false;\n\nstatic uint32_t _user_data_main_start;\nstatic uint32_t _user_data_bak_start;\n\nstatic uint32_t USERDATA_POOL_LOC usrdata_ddblist_pool[1024];\n\nstatic void nv_record_print_dev_record(const btif_device_record_t *record) {\n#ifdef nv_record_debug\n\n  nvrec_trace(0, \"nv record bdAddr = \");\n  DUMP8(\"%02x \", record->bdAddr.address, sizeof(record->bdAddr.address));\n  nvrec_trace(0, \"record_trusted = \");\n  DUMP8(\"%d \", &record->trusted, sizeof((uint8_t)record->trusted));\n  nvrec_trace(0, \"record_linkKey = \");\n  DUMP8(\"%02x \", record->linkKey, sizeof(record->linkKey));\n  nvrec_trace(0, \"record_keyType = \");\n  DUMP8(\"%x \", &record->keyType, sizeof(record->keyType));\n  nvrec_trace(0, \"record_pinLen = \");\n  DUMP8(\"%x \", &record->pinLen, sizeof(record->pinLen));\n\n#endif\n}\n\nheap_handle_t g_nv_mempool = NULL;\n\nstatic void nv_record_mempool_init(void) {\n  unsigned char *poolstart = 0;\n\n  poolstart = (unsigned char *)(usrdata_ddblist_pool + mempool_pre_offset);\n  if (!nvrec_mempool_init) {\n    g_nv_mempool =\n        heap_register((unsigned char *)poolstart,\n                      (size_t)(sizeof(usrdata_ddblist_pool) -\n                               (mempool_pre_offset * sizeof(uint32_t))));\n    nvrec_mempool_init = TRUE;\n  }\n  /*add other memory pool */\n}\n\nstatic bool nv_record_data_is_valid(void) {\n  uint32_t crc;\n  uint32_t flsh_crc;\n  uint32_t verandmagic;\n\n  verandmagic = usrdata_ddblist_pool[0];\n  if (((nvrecord_struct_version << 16) | nvrecord_magic) != verandmagic) {\n    nvrec_trace(2, \"%s: verandmagic error! verandmagic = 0x%x.\", __func__,\n                ((nvrecord_struct_version << 16) | nvrecord_magic));\n    return false;\n  }\n  crc = crc32(\n      0, (uint8_t *)(&usrdata_ddblist_pool[pos_heap_contents]),\n      (sizeof(usrdata_ddblist_pool) - (pos_heap_contents * sizeof(uint32_t))));\n  flsh_crc = usrdata_ddblist_pool[pos_crc];\n  if (flsh_crc == crc) {\n    return true;\n  } else {\n    nvrec_trace(3, \"%s: crc checking fail! flsh_crc = 0x%x,crc = 0x%x.\",\n                __func__, flsh_crc, crc);\n    return false;\n  }\n}\n\nstatic bool nv_record_list_is_valid(void) {\n  nvrec_config_t *config = NULL;\n  nvrec_section_t *sec = NULL;\n  list_node_t *node = NULL;\n  list_node_t *sub_node = NULL;\n  nvrec_entry_t *entry = NULL;\n  bool ret = true;\n  uint32_t mem_start;\n  uint32_t mem_end;\n\n  config = (nvrec_config_t *)usrdata_ddblist_pool[pos_config_addr];\n  if (usrdata_ddblist_pool[pos_start_ram_addr] !=\n      (uint32_t)usrdata_ddblist_pool) {\n    return false;\n  }\n  mem_start = (uint32_t)config;\n  mem_end = mem_start + (sizeof(usrdata_ddblist_pool) -\n                         (pos_heap_contents * sizeof(uint32_t)));\n  for (node = list_begin_ext(config->sections);\n       node != list_end_ext(config->sections); node = list_next_ext(node)) {\n    sec = list_node_ext(node);\n\n    for (sub_node = list_begin_ext(sec->entries);\n         sub_node != list_end_ext(sec->entries);\n         sub_node = list_next_ext(sub_node)) {\n      entry = list_node_ext(sub_node);\n      if (entry->key == NULL || entry->value == NULL) {\n        ret = false;\n        break;\n      }\n\n      if (((uint32_t)entry->key >= mem_start &&\n           (uint32_t)entry->key + strlen(entry->key) < mem_end) &&\n          ((uint32_t)entry->value >= mem_start &&\n           (uint32_t)entry->value + strlen(entry->value) < mem_end)) {\n        // nvrec_trace(4,\"%s: entry = 0x%x,key = 0x%x, value = 0x%x.\",\n        //     __func__,(uint32_t)entry,(uint32_t)entry->key,(uint32_t)entry->value);\n      } else {\n        nvrec_trace(4, \"%s: sec = 0x%x,name = %s, entries = 0x%x.\", __func__,\n                    (uint32_t)sec, sec->name, (uint32_t)sec->entries);\n        nvrec_trace(\n            4,\n            \"%s: entry pointer error! entry = 0x%x,key = 0x%x, value = 0x%x.\",\n            __func__, (uint32_t)entry, (uint32_t)entry->key,\n            (uint32_t)entry->value);\n        ret = false;\n        break;\n      }\n    }\n    if (!ret) {\n      break;\n    }\n  }\n  return ret;\n}\n\nvoid nv_record_init(void) {\n  enum NORFLASH_API_RET_T result;\n  uint32_t sector_size = 0;\n  uint32_t block_size = 0;\n  uint32_t page_size = 0;\n\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, &block_size, §or_size,\n                        &page_size);\n  result = norflash_api_register(\n      NORFLASH_API_MODULE_ID_USERDATA, HAL_NORFLASH_ID_0,\n      ((uint32_t)__userdata_start),\n      (uint32_t)__userdata_end - (uint32_t)__userdata_start, block_size,\n      sector_size, page_size, sizeof(usrdata_ddblist_pool) * 2, nv_callback);\n  ASSERT(result == NORFLASH_API_OK,\n         \"nv_record_init: module register failed! result = %d.\", result);\n}\n\nbt_status_t nv_record_open(SECTIONS_ADP_ENUM section_id) {\n  bt_status_t ret_status = BT_STS_FAILED;\n  uint32_t lock;\n  bool main_is_valid = false;\n  bool bak_is_valid = false;\n  bool data_is_valid = false;\n  if (nvrec_init) {\n    return BT_STS_SUCCESS;\n  }\n  _user_data_main_start = (uint32_t)__userdata_start;\n  _user_data_bak_start = (uint32_t)__userdata_start + nvrecord_mem_pool_size;\n\n  lock = int_lock_global();\n\n  nv_record_config.is_update = false;\n  nv_record_config.written_size = 0;\n  nv_record_config.state = NV_STATE_IDLE;\n  switch (section_id) {\n  case section_usrdata_ddbrecord:\n    // userdata main sector checking.\n    memcpy((void *)usrdata_ddblist_pool, (void *)_user_data_main_start,\n           sizeof(usrdata_ddblist_pool));\n    if (nv_record_data_is_valid() && usrdata_ddblist_pool[pos_start_ram_addr] ==\n                                         (uint32_t)usrdata_ddblist_pool) {\n      if (nv_record_list_is_valid()) {\n        // nvrec_trace(1,\"%s,main sector list valid.\",__func__);\n        main_is_valid = true;\n      } else {\n        nvrec_trace(1, \"%s,main sector list invalid.\", __func__);\n        main_is_valid = false;\n      }\n    } else {\n      nvrec_trace(1, \"%s,main sector data invalid.\", __func__);\n      main_is_valid = false;\n    }\n\n    // userdata bak sector checking.\n    memcpy((void *)usrdata_ddblist_pool, (void *)_user_data_bak_start,\n           sizeof(usrdata_ddblist_pool));\n    if (nv_record_data_is_valid() && usrdata_ddblist_pool[pos_start_ram_addr] ==\n                                         (uint32_t)usrdata_ddblist_pool) {\n      if (nv_record_list_is_valid()) {\n        // TRACE(1,\"%s,bak sector list valid.\",__func__);\n        bak_is_valid = true;\n      } else {\n        nvrec_trace(1, \"%s,bak sector list invalid.\", __func__);\n        bak_is_valid = false;\n      }\n    } else {\n      nvrec_trace(1, \"%s,bak sector data invalid.\", __func__);\n      bak_is_valid = false;\n    }\n\n    if (main_is_valid) {\n      memcpy((void *)usrdata_ddblist_pool, (void *)_user_data_main_start,\n             sizeof(usrdata_ddblist_pool));\n      data_is_valid = true;\n      if (!bak_is_valid) {\n        nv_record_config.is_update = true;\n        nv_record_config.state = NV_STATE_MAIN_DONE;\n        nv_record_config.config =\n            (nvrec_config_t *)usrdata_ddblist_pool[pos_config_addr];\n        nv_record_flash_flush_int(false);\n      }\n    } else {\n      if (bak_is_valid) {\n        memcpy((void *)usrdata_ddblist_pool, (void *)_user_data_bak_start,\n               sizeof(usrdata_ddblist_pool));\n        nv_record_config.config =\n            (nvrec_config_t *)usrdata_ddblist_pool[pos_config_addr];\n        data_is_valid = true;\n        nv_record_config.is_update = true;\n        nv_record_config.state = NV_STATE_IDLE;\n        nv_record_flash_flush_int(false);\n      } else {\n        data_is_valid = false;\n      }\n    }\n\n    if (data_is_valid) {\n      nv_record_config.config =\n          (nvrec_config_t *)usrdata_ddblist_pool[pos_config_addr];\n      // nvrec_trace(4,\"%s,config=0x%x,g_nv_mempool=0x%x,ln=%d\\n\",\n      //            nvrecord_tag,usrdata_ddblist_pool[pos_config_addr],g_nv_mempool,__LINE__);\n      g_nv_mempool = (heap_handle_t)(&usrdata_ddblist_pool[mempool_pre_offset]);\n      ret_status = BT_STS_SUCCESS;\n    } else {\n      nvrec_trace(1, \"%s,userdata invalid. \", __func__);\n      ret_status = nv_record_config_rebuild();\n      if (ret_status != BT_STS_SUCCESS) {\n        break;\n      }\n\n      ret_status = BT_STS_SUCCESS;\n    }\n    break;\n  default:\n    break;\n  }\n  nvrec_init = true;\n\n  if (ret_status == BT_STS_SUCCESS) {\n#ifdef FLASH_SUSPEND\n    hal_sleep_set_sleep_hook(HAL_SLEEP_HOOK_USER_NVRECORD,\n                             nv_record_flash_flush_in_sleep);\n#else\n    hal_sleep_set_deep_sleep_hook(HAL_DEEP_SLEEP_HOOK_USER_NVRECORD,\n                                  nv_record_flash_flush_in_sleep);\n#endif\n  }\n\n  int_unlock_global(lock);\n  nvrec_trace(2, \"%s,open,ret_status=%d\\n\", nvrecord_tag, ret_status);\n  return ret_status;\n}\n\nbt_status_t nv_record_config_rebuild(void) {\n  nvrec_mempool_init = false;\n  memset(usrdata_ddblist_pool, 0, sizeof(usrdata_ddblist_pool));\n  usrdata_ddblist_pool[pos_version_and_magic] =\n      ((nvrecord_struct_version << 16) | nvrecord_magic);\n  nv_record_mempool_init();\n  nv_record_config.config = nvrec_config_new(\"PRECIOUS 4K.\");\n  if (nv_record_config.config == NULL)\n    return BT_STS_FAILED;\n\n  nvrec_init = true;\n  nv_record_config.is_update = true;\n  return BT_STS_SUCCESS;\n}\n\nstatic size_t config_entries_get_ddbrec_length(const char *secname) {\n  size_t entries_len = 0;\n\n  if (NULL != nv_record_config.config) {\n    nvrec_section_t *sec = NULL;\n    sec = nvrec_section_find(nv_record_config.config, secname);\n    if (NULL != sec)\n      entries_len = sec->entries->length;\n  }\n  return entries_len;\n}\n\n#if 0\nstatic bool config_entries_has_ddbrec(const btif_device_record_t* param_rec)\n{\n    char key[BD_ADDR_SIZE+1] = {0,};\n    assert(param_rec != NULL);\n\n    memcpy(key,param_rec->bdAddr.address,BTIF_BD_ADDR_SIZE);\n    if(nvrec_config_has_key(nv_record_config.config,section_name_ddbrec,(const char *)key))\n        return true;\n    return false;\n}\n#endif\n\nstatic void config_entries_ddbdev_delete_head(void) // delete the oldest record.\n{\n  list_node_t *head_node = NULL;\n  list_t *entry = NULL;\n  nvrec_section_t *sec = NULL;\n\n  sec = nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  entry = sec->entries;\n  head_node = list_begin_ext(entry);\n  if (NULL != head_node) {\n    btif_device_record_t *rec = NULL;\n    unsigned int recaddr = 0;\n\n    nvrec_entry_t *entry_temp = list_node_ext(head_node);\n    recaddr = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                                   entry_temp->key, 0);\n    rec = (btif_device_record_t *)recaddr;\n    pool_free(rec);\n    nvrec_entry_free(entry_temp);\n    if (1 == config_entries_get_ddbrec_length(section_name_ddbrec))\n      entry->head = entry->tail = NULL;\n    else\n      entry->head = list_next_ext(head_node);\n    pool_free(head_node);\n    entry->length -= 1;\n  }\n}\n\nstatic void config_entries_ddbdev_delete_tail(void) {\n  list_node_t *node = NULL;\n  list_node_t *temp_ptr = NULL;\n  list_node_t *tailnode = NULL;\n  size_t entrieslen = 0;\n  nvrec_entry_t *entry_temp = NULL;\n  nvrec_section_t *sec =\n      nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  btif_device_record_t *recaddr = NULL;\n  unsigned int addr = 0;\n\n  if (!sec)\n    assert(0);\n  sec->entries->length -= 1;\n  entrieslen = sec->entries->length;\n  node = list_begin_ext(sec->entries);\n  while (entrieslen > 1) {\n    node = list_next_ext(node);\n    entrieslen--;\n  }\n  tailnode = list_next_ext(node);\n  entry_temp = list_node_ext(tailnode);\n  addr = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                              entry_temp->key, 0);\n  recaddr = (btif_device_record_t *)addr;\n  pool_free(recaddr);\n  nvrec_entry_free(entry_temp);\n  // pool_free(entry_temp);\n  temp_ptr = node->next;\n  node->next = NULL;\n  pool_free(temp_ptr);\n  sec->entries->tail = node;\n}\n\nstatic void\nconfig_entries_ddbdev_delete(const btif_device_record_t *param_rec) {\n  nvrec_section_t *sec = NULL;\n  list_node_t *entry_del = NULL;\n  list_node_t *entry_pre = NULL;\n  list_node_t *entry_next = NULL;\n  list_node_t *node = NULL;\n  btif_device_record_t *recaddr = NULL;\n  unsigned int addr = 0;\n  int pos = 0, pos_pre = 0;\n  nvrec_entry_t *entry_temp = NULL;\n\n  sec = nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  for (node = list_begin_ext(sec->entries); node != NULL;\n       node = list_next_ext(node)) {\n    nvrec_entry_t *entries = list_node_ext(node);\n    pos++;\n    if (0 ==\n        memcmp(entries->key, param_rec->bdAddr.address, BTIF_BD_ADDR_SIZE)) {\n      entry_del = node;\n      entry_next = entry_del->next;\n      break;\n    }\n  }\n\n  if (entry_del) {\n    /*get entry_del pre node*/\n    pos_pre = (pos - 1);\n    pos = 0;\n    node = list_begin_ext(sec->entries);\n    pos++;\n    while (pos < pos_pre) {\n      node = list_next_ext(node);\n      pos += 1;\n    }\n    entry_pre = node;\n\n    /*delete entry_del following...*/\n    entry_temp = list_node_ext(entry_del);\n    addr = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                                (char *)entry_temp->key, 0);\n    assert(0 != addr);\n    recaddr = (btif_device_record_t *)addr;\n    pool_free(recaddr);\n    nvrec_entry_free(entry_temp);\n    // pool_free(entry_temp);\n    pool_free(entry_pre->next);\n    entry_pre->next = entry_next;\n    sec->entries->length -= 1;\n  }\n}\n\nstatic bool\nconfig_entries_ddbdev_is_head(const btif_device_record_t *param_rec) {\n  list_node_t *head_node = NULL;\n  nvrec_section_t *sec = NULL;\n  list_t *entry = NULL;\n  nvrec_entry_t *entry_temp = NULL;\n\n  sec = nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  entry = sec->entries;\n  head_node = list_begin_ext(entry);\n  entry_temp = list_node_ext(head_node);\n  if (0 ==\n      memcmp(entry_temp->key, param_rec->bdAddr.address, BTIF_BD_ADDR_SIZE))\n    return true;\n  return false;\n}\n\nstatic bool\nconfig_entries_ddbdev_is_tail(const btif_device_record_t *param_rec) {\n  list_node_t *node = NULL;\n  nvrec_entry_t *entry_temp = NULL;\n\n  nvrec_section_t *sec =\n      nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  if (!sec)\n    assert(0);\n  for (node = list_begin_ext(sec->entries); node != list_end_ext(sec->entries);\n       node = list_next_ext(node)) {\n    entry_temp = list_node_ext(node);\n  }\n  if (0 ==\n      memcmp(entry_temp->key, param_rec->bdAddr.address, BTIF_BD_ADDR_SIZE))\n    return true;\n  return false;\n}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nstatic void\nconfig_specific_entry_value_delete(const btif_device_record_t *param_rec) {\n  if (config_entries_ddbdev_is_head(param_rec))\n    config_entries_ddbdev_delete_head();\n  else if (config_entries_ddbdev_is_tail(param_rec))\n    config_entries_ddbdev_delete_tail();\n  else\n    config_entries_ddbdev_delete(param_rec);\n  nv_record_update_runtime_userdata();\n}\n\n/**********************************************\ngyt add:list head is the odest,list tail is the latest.\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n**********************************************/\nstatic bt_status_t POSSIBLY_UNUSED\nnv_record_ddbrec_add(const btif_device_record_t *param_rec) {\n  btdevice_volume device_vol;\n  btdevice_profile device_plf;\n  char key[BTIF_BD_ADDR_SIZE + 1] = {\n      0,\n  };\n  nvrec_btdevicerecord *nvrec_pool_record = NULL;\n  bool ddbrec_exist = false;\n  bool is_flush = true;\n  int getint;\n#ifdef BTIF_DIP_DEVICE\n  uint16_t vend_id = 0;\n  uint16_t vend_id_source = 0;\n#endif\n\n  device_vol.a2dp_vol = NVRAM_ENV_STREAM_VOLUME_A2DP_VOL_DEFAULT;\n  device_vol.hfp_vol = NVRAM_ENV_STREAM_VOLUME_HFP_VOL_DEFAULT;\n  device_plf.hfp_act = false;\n  device_plf.hsp_act = false;\n  device_plf.a2dp_act = false;\n  device_plf.a2dp_codectype = 0;\n  if (NULL == param_rec)\n    return BT_STS_FAILED;\n  memcpy(key, param_rec->bdAddr.address, BTIF_BD_ADDR_SIZE);\n\n  getint = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                                (char *)key, 0);\n  if (getint) {\n    ddbrec_exist = true;\n    nvrec_pool_record = (nvrec_btdevicerecord *)getint;\n    device_vol.a2dp_vol = nvrec_pool_record->device_vol.a2dp_vol;\n    device_vol.hfp_vol = nvrec_pool_record->device_vol.hfp_vol;\n    device_plf.hfp_act = nvrec_pool_record->device_plf.hfp_act;\n    device_plf.hsp_act = nvrec_pool_record->device_plf.hsp_act;\n    device_plf.a2dp_act = nvrec_pool_record->device_plf.a2dp_act;\n    device_plf.a2dp_codectype = nvrec_pool_record->device_plf.a2dp_codectype;\n#ifdef BTIF_DIP_DEVICE\n    vend_id = nvrec_pool_record->vend_id;\n    vend_id_source = nvrec_pool_record->vend_id_source;\n#endif\n    if (memcmp(&nvrec_pool_record->record.bdAddr, ¶m_rec->bdAddr,\n               sizeof(nvrec_pool_record->record.bdAddr)) == 0 &&\n        memcmp(nvrec_pool_record->record.linkKey, param_rec->linkKey,\n               sizeof(nvrec_pool_record->record.linkKey)) == 0 &&\n        nvrec_pool_record->record.trusted == param_rec->trusted &&\n        nvrec_pool_record->record.pinLen == param_rec->pinLen &&\n        nvrec_pool_record->record.keyType == param_rec->keyType &&\n        config_entries_ddbdev_is_tail(param_rec)) {\n      is_flush = false;\n    }\n  }\n  if (is_flush) {\n    if (pool_free_space() < sizeof(nvrec_btdevicerecord)) {\n      nvrec_trace(1, \"%s,free space of nvrec is not enough!\", nvrecord_tag);\n      config_entries_ddbdev_delete_head();\n    }\n    nvrec_pool_record =\n        (nvrec_btdevicerecord *)pool_malloc(sizeof(nvrec_btdevicerecord));\n    if (NULL == nvrec_pool_record) {\n      nvrec_trace(1, \"%s,pool_malloc failure.\", nvrecord_tag);\n      return BT_STS_FAILED;\n    }\n    nvrec_trace(2, \"%s,pool_malloc addr = 0x%x\\n\", nvrecord_tag,\n                (unsigned int)nvrec_pool_record);\n    memcpy(nvrec_pool_record, param_rec, sizeof(btif_device_record_t));\n#ifdef LINK_KEY_ENCRYPT\n    U8 linkKey[16];\n    AES128_ECB_encrypt(param_rec->linkKey, LINK_KEY_ENCRYPT_KEY, linkKey);\n    memcpy(nvrec_pool_record->record.linkKey, linkKey, 16);\n#endif\n    memcpy(key, param_rec->bdAddr.address, BTIF_BD_ADDR_SIZE);\n\n    nvrec_pool_record->device_vol.a2dp_vol = device_vol.a2dp_vol;\n    nvrec_pool_record->device_vol.hfp_vol = device_vol.hfp_vol;\n    nvrec_pool_record->device_plf.hfp_act = device_plf.hfp_act;\n    nvrec_pool_record->device_plf.hsp_act = device_plf.hsp_act;\n    nvrec_pool_record->device_plf.a2dp_act = device_plf.a2dp_act;\n    nvrec_pool_record->device_plf.a2dp_codectype = device_plf.a2dp_codectype;\n#ifdef BTIF_DIP_DEVICE\n    nvrec_pool_record->vend_id = vend_id;\n    nvrec_pool_record->vend_id_source = vend_id_source;\n#endif\n\n    if (ddbrec_exist) {\n      config_specific_entry_value_delete(param_rec);\n    }\n    if (DDB_RECORD_NUM ==\n        config_entries_get_ddbrec_length(section_name_ddbrec)) {\n      nvrec_trace(\n          1,\n          \"%s,ddbrec list is full,delete the oldest and add param_rec to list.\",\n          nvrecord_tag);\n      config_entries_ddbdev_delete_head();\n    }\n    nvrec_config_set_int(nv_record_config.config, section_name_ddbrec,\n                         (char *)key, (int)nvrec_pool_record);\n#ifdef nv_record_debug\n    getint = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                                  (char *)key, 0);\n    nvrec_trace(2, \"%s,get pool_malloc addr = 0x%x\\n\", nvrecord_tag,\n                (unsigned int)getint);\n#endif\n    nv_record_update_runtime_userdata();\n  }\n  return BT_STS_SUCCESS;\n}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nbt_status_t nv_record_add(SECTIONS_ADP_ENUM type, void *record) {\n  bt_status_t retstatus = BT_STS_FAILED;\n\n  if ((NULL == record) || (section_none == type))\n    return BT_STS_FAILED;\n  switch (type) {\n  case section_usrdata_ddbrecord:\n    retstatus = nv_record_ddbrec_add(record);\n    break;\n  default:\n    break;\n  }\n\n  return retstatus;\n}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nbt_status_t nv_record_ddbrec_find(const bt_bdaddr_t *bd_ddr,\n                                  btif_device_record_t *record) {\n  unsigned int getint = 0;\n  char key[BTIF_BD_ADDR_SIZE + 1] = {\n      0,\n  };\n  btif_device_record_t *getrecaddr = NULL;\n\n  if ((NULL == nv_record_config.config) || (NULL == bd_ddr) || (NULL == record))\n    return BT_STS_FAILED;\n  memcpy(key, bd_ddr->address, BTIF_BD_ADDR_SIZE);\n  getint = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                                (char *)key, 0);\n  if (0 == getint)\n    return BT_STS_FAILED;\n  getrecaddr = (btif_device_record_t *)getint;\n  memcpy(record, (void *)getrecaddr, sizeof(btif_device_record_t));\n#ifdef LINK_KEY_ENCRYPT\n  U8 linkKey[16];\n  AES128_ECB_decrypt(getrecaddr->linkKey, LINK_KEY_ENCRYPT_KEY, linkKey);\n  memcpy(record->linkKey, linkKey, 16);\n#endif\n  return BT_STS_SUCCESS;\n}\n\nint nv_record_btdevicerecord_find(const bt_bdaddr_t *bd_ddr,\n                                  nvrec_btdevicerecord **record) {\n  unsigned int getint = 0;\n  char key[BTIF_BD_ADDR_SIZE + 1] = {\n      0,\n  };\n\n  if ((NULL == nv_record_config.config) || (NULL == bd_ddr) || (NULL == record))\n    return -1;\n  memcpy(key, bd_ddr->address, BTIF_BD_ADDR_SIZE);\n  getint = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                                (char *)key, 0);\n  if (0 == getint)\n    return -1;\n  *record = (nvrec_btdevicerecord *)getint;\n  return 0;\n}\n\nvoid nv_record_btdevicerecord_set_a2dp_vol(nvrec_btdevicerecord *pRecord,\n                                           int8_t vol) {\n  pRecord->device_vol.a2dp_vol = vol;\n}\n\nvoid nv_record_btdevicerecord_set_hfp_vol(nvrec_btdevicerecord *pRecord,\n                                          int8_t vol) {\n  pRecord->device_vol.hfp_vol = vol;\n}\n\nvoid nv_record_btdevicevolume_set_a2dp_vol(btdevice_volume *device_vol,\n                                           int8_t vol) {\n  device_vol->a2dp_vol = vol;\n}\n\nvoid nv_record_btdevicevolume_set_hfp_vol(btdevice_volume *device_vol,\n                                          int8_t vol) {\n  device_vol->hfp_vol = vol;\n}\n\nvoid nv_record_btdevicerecord_set_vend_id_and_source(\n    nvrec_btdevicerecord *pRecord, int16_t vend_id, int16_t vend_id_source) {\n#ifdef BTIF_DIP_DEVICE\n  if (vend_id != pRecord->vend_id) {\n    pRecord->vend_id = vend_id;\n    pRecord->vend_id_source = vend_id_source;\n  }\n#endif\n}\n\nvoid nv_record_btdevicerecord_set_a2dp_profile_active_state(\n    btdevice_profile *device_plf, bool isActive) {\n  device_plf->a2dp_act = isActive;\n}\n\nvoid nv_record_btdevicerecord_set_hfp_profile_active_state(\n    btdevice_profile *device_plf, bool isActive) {\n  device_plf->hfp_act = isActive;\n}\n\nvoid nv_record_btdevicerecord_set_hsp_profile_active_state(\n    btdevice_profile *device_plf, bool isActive) {\n  device_plf->hsp_act = isActive;\n}\n\nvoid nv_record_btdevicerecord_set_a2dp_profile_codec(\n    btdevice_profile *device_plf, uint8_t a2dpCodec) {\n  device_plf->a2dp_codectype = a2dpCodec;\n}\n\nuint32_t nv_record_pre_write_operation(void) { return 0; }\n\nvoid nv_record_post_write_operation(uint32_t lock) {}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nbt_status_t nv_record_ddbrec_delete(const bt_bdaddr_t *bdaddr) {\n  unsigned int getint = 0;\n  btif_device_record_t *getrecaddr = NULL;\n  char key[BTIF_BD_ADDR_SIZE + 1] = {\n      0,\n  };\n\n  memcpy(key, bdaddr->address, BTIF_BD_ADDR_SIZE);\n  getint = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                                (char *)key, 0);\n  if (0 == getint)\n    return BT_STS_FAILED;\n  // found ddb record,del it and return succeed.\n  getrecaddr = (btif_device_record_t *)getint;\n  config_specific_entry_value_delete((const btif_device_record_t *)getrecaddr);\n  return BT_STS_SUCCESS;\n}\n\n/*\nthis function should be surrounded by OS_LockStack and OS_UnlockStack when call.\n*/\nbt_status_t nv_record_enum_dev_records(unsigned short index,\n                                       btif_device_record_t *record) {\n  nvrec_section_t *sec = NULL;\n  list_node_t *node = NULL;\n  unsigned short pos = 0;\n  nvrec_entry_t *entry_temp = NULL;\n  btif_device_record_t *recaddr = NULL;\n  unsigned int addr = 0;\n\n  if ((index >= DDB_RECORD_NUM) || (NULL == record) ||\n      (NULL == nv_record_config.config))\n    return BT_STS_FAILED;\n  sec = nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  if (NULL == sec)\n    return BT_STS_INVALID_PARM;\n  if (NULL == sec->entries)\n    return BT_STS_INVALID_PARM;\n  if (0 == sec->entries->length)\n    return BT_STS_FAILED;\n  if (index >= sec->entries->length)\n    return BT_STS_FAILED;\n  node = list_begin_ext(sec->entries);\n\n  while (pos < index) {\n    node = list_next_ext(node);\n    pos++;\n  }\n  entry_temp = list_node_ext(node);\n  addr = nvrec_config_get_int(nv_record_config.config, section_name_ddbrec,\n                              (char *)entry_temp->key, 0);\n  if (0 == addr)\n    return BT_STS_FAILED;\n  recaddr = (btif_device_record_t *)addr;\n  memcpy(record, recaddr, sizeof(btif_device_record_t));\n#ifdef LINK_KEY_ENCRYPT\n  U8 linkKey[16];\n  AES128_ECB_decrypt(recaddr->linkKey, LINK_KEY_ENCRYPT_KEY, linkKey);\n  memcpy(record->linkKey, linkKey, 16);\n#endif\n  nv_record_print_dev_record(record);\n  return BT_STS_SUCCESS;\n}\n\n/*\nreturn:\n    -1:     enum dev failure.\n    0:      without paired dev.\n    1:      only 1 paired dev,store@record1.\n    2:      get 2 paired dev.notice:record1 is the latest record.\n*/\nint nv_record_enum_latest_two_paired_dev(btif_device_record_t *record1,\n                                         btif_device_record_t *record2) {\n  bt_status_t getret1 = BT_STS_FAILED;\n  bt_status_t getret2 = BT_STS_FAILED;\n  nvrec_section_t *sec = NULL;\n  size_t entries_len = 0;\n  list_t *entry = NULL;\n\n  if ((NULL == record1) || (NULL == record2))\n    return -1;\n  sec = nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  if (NULL == sec)\n    return 0;\n  entry = sec->entries;\n  if (NULL == entry)\n    return 0;\n  entries_len = entry->length;\n  if (0 == entries_len)\n    return 0;\n  else if (entries_len < 0)\n    return -1;\n  if (1 == entries_len) {\n    getret1 = nv_record_enum_dev_records(0, record1);\n    if (BT_STS_SUCCESS == getret1)\n      return 1;\n    return -1;\n  }\n\n  getret1 = nv_record_enum_dev_records(entries_len - 1, record1);\n  getret2 = nv_record_enum_dev_records(entries_len - 2, record2);\n  if ((BT_STS_SUCCESS != getret1) || (BT_STS_SUCCESS != getret2)) {\n    memset(record1, 0x0, sizeof(btif_device_record_t));\n    memset(record2, 0x0, sizeof(btif_device_record_t));\n    return -1;\n  }\n  return 2;\n}\n\nint nv_record_touch_cause_flush(void) {\n  nv_record_update_runtime_userdata();\n  return 0;\n}\n\nvoid nv_record_all_ddbrec_print(void) {\n  list_t *entry = NULL;\n  int tmp_i = 0;\n  nvrec_section_t *sec = NULL;\n  size_t entries_len = 0;\n\n  sec = nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  if (NULL == sec)\n    return;\n  entry = sec->entries;\n  if (NULL == entry)\n    return;\n  entries_len = entry->length;\n  if (0 == entries_len) {\n    nvrec_trace(1, \"%s: without btdevicerec.\", __func__);\n    return;\n  }\n  for (tmp_i = 0; tmp_i < entries_len; tmp_i++) {\n    btif_device_record_t record;\n    bt_status_t ret_status;\n    ret_status = nv_record_enum_dev_records(tmp_i, &record);\n    if (BT_STS_SUCCESS == ret_status)\n      nv_record_print_dev_record(&record);\n  }\n}\n\nint nv_record_get_paired_dev_count(void) {\n  nvrec_section_t *sec = NULL;\n  list_t *entry = NULL;\n\n  sec = nvrec_section_find(nv_record_config.config, section_name_ddbrec);\n  if (NULL == sec)\n    return 0;\n  entry = sec->entries;\n  if (NULL == entry)\n    return 0;\n\n  return entry->length;\n}\n\nvoid nv_record_sector_clear(void) {\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret, ret1;\n\n  lock = int_lock_global();\n  ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA,\n                           (uint32_t)__userdata_start,\n                           sizeof(usrdata_ddblist_pool), false);\n  ret1 = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA,\n                            (uint32_t)__userdata_start + nvrecord_mem_pool_size,\n                            sizeof(usrdata_ddblist_pool), false);\n  nvrec_init = false;\n  nvrec_mempool_init = false;\n  int_unlock_global(lock);\n  ASSERT(ret == NORFLASH_API_OK,\n         \"nv_record_sector_clear: erase main sector failed! ret = %d.\", ret);\n  ASSERT(ret1 == NORFLASH_API_OK,\n         \"nv_record_sector_clear: erase bak sector failed! ret1 = %d.\", ret1);\n}\n\n#define DISABLE_NV_RECORD_CRC_CHECK_BEFORE_FLUSH 1\nvoid nv_record_update_runtime_userdata(void) {\n  uint32_t lock;\n\n  if (NULL == nv_record_config.config) {\n    return;\n  }\n  lock = int_lock();\n  nv_record_config.is_update = true;\n\n#if !DISABLE_NV_RECORD_CRC_CHECK_BEFORE_FLUSH\n  buffer_alloc_ctx *heapctx = memory_buffer_heap_getaddr();\n  memcpy((void *)(&usrdata_ddblist_pool[pos_heap_contents]), heapctx,\n         sizeof(buffer_alloc_ctx));\n  uint32_t crc = crc32(\n      0, (uint8_t *)(&usrdata_ddblist_pool[pos_heap_contents]),\n      (sizeof(usrdata_ddblist_pool) - (pos_heap_contents * sizeof(uint32_t))));\n\n  usrdata_ddblist_pool[pos_crc] = crc;\n#endif\n\n  int_unlock(lock);\n}\n\nstatic int nv_record_flash_flush_main(bool is_async) {\n  uint32_t crc;\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret = NORFLASH_API_OK;\n  uint8_t *burn_buf = NULL;\n  uint32_t verandmagic;\n\n  if (NULL == nv_record_config.config) {\n    nvrec_trace(1, \"%s,nv_record_config.config is null.\\n\", __func__);\n    goto _func_end;\n  }\n\n  burn_buf = (uint8_t *)&usrdata_ddblist_pool[0];\n  verandmagic = usrdata_ddblist_pool[0];\n  ASSERT((((nvrecord_struct_version << 16) | nvrecord_magic) == verandmagic),\n         \"%s: verandmagic = 0x%08x.\", __func__, verandmagic);\n\n  if (is_async) {\n    hal_trace_pause();\n    lock = int_lock_global();\n    if (nv_record_config.state == NV_STATE_IDLE ||\n        nv_record_config.state == NV_STATE_MAIN_ERASING) {\n      if (nv_record_config.state == NV_STATE_IDLE) {\n        nv_record_config.state = NV_STATE_MAIN_ERASING;\n        // nvrec_trace(1,\"%s: NV_STATE_MAIN_ERASING\", __func__);\n      }\n\n      ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA,\n                               _user_data_main_start,\n                               sizeof(usrdata_ddblist_pool), true);\n      if (ret == NORFLASH_API_OK) {\n        nv_record_config.state = NV_STATE_MAIN_ERASED;\n        // nvrec_trace(1,\"%s: NV_STATE_MAIN_ERASED\", __func__);\n        nvrec_trace(2, \"%s: norflash_api_erase ok,addr = 0x%x.\", __func__,\n                    _user_data_main_start);\n      } else if (ret == NORFLASH_API_BUFFER_FULL) {\n        norflash_api_flush();\n      } else {\n        ASSERT(0, \"%s: norflash_api_erase err,ret = %d,addr = 0x%x.\", __func__,\n               ret, _user_data_main_start);\n      }\n    } else if (nv_record_config.state == NV_STATE_MAIN_ERASED ||\n               nv_record_config.state == NV_STATE_MAIN_WRITTING) {\n      if (nv_record_config.state == NV_STATE_MAIN_ERASED) {\n        nv_record_config.state = NV_STATE_MAIN_WRITTING;\n        // nvrec_trace(1,\"%s: NV_STATE_MAIN_WRITTING\", __func__);\n      }\n      crc = crc32(0, (uint8_t *)(&usrdata_ddblist_pool[pos_heap_contents]),\n                  (sizeof(usrdata_ddblist_pool) -\n                   (pos_heap_contents * sizeof(uint32_t))));\n      // nvrec_trace(2,\"%s,crc=%x.\\n\",nvrecord_tag,crc);\n      usrdata_ddblist_pool[pos_version_and_magic] =\n          ((nvrecord_struct_version << 16) | nvrecord_magic);\n      usrdata_ddblist_pool[pos_crc] = crc;\n      usrdata_ddblist_pool[pos_start_ram_addr] =\n          (uint32_t)&usrdata_ddblist_pool;\n      usrdata_ddblist_pool[pos_reserv2] = 0;\n      usrdata_ddblist_pool[pos_config_addr] = (uint32_t)nv_record_config.config;\n      ASSERT(nv_record_list_is_valid(), \"%s nv_record_list is invalid!\",\n             __func__);\n      ret = norflash_api_write(NORFLASH_API_MODULE_ID_USERDATA,\n                               _user_data_main_start, burn_buf,\n                               sizeof(usrdata_ddblist_pool), true);\n      if (ret == NORFLASH_API_OK) {\n        nv_record_config.is_update = false;\n        nv_record_config.state = NV_STATE_MAIN_WRITTEN;\n        // nvrec_trace(1,\"%s: NV_STATE_MAIN_WRITTEN\", __func__);\n        nvrec_trace(2, \"%s: norflash_api_write ok,addr = 0x%x.\", __func__,\n                    _user_data_main_start);\n      } else if (ret == NORFLASH_API_BUFFER_FULL) {\n        norflash_api_flush();\n      } else {\n        ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\", __func__,\n               ret, _user_data_main_start);\n      }\n    } else {\n      if (norflash_api_get_used_buffer_count(NORFLASH_API_MODULE_ID_USERDATA,\n                                             NORFLASH_API_ALL) == 0) {\n        nv_record_config.state = NV_STATE_MAIN_DONE;\n        // nvrec_trace(1,\"%s: NV_STATE_MAIN_DONE\", __func__);\n      } else {\n        norflash_api_flush();\n      }\n    }\n    int_unlock_global(lock);\n    hal_trace_continue();\n  } else {\n    // nvrec_trace(1,\"%s: sync flush begin!\", __func__);\n    if (nv_record_config.state == NV_STATE_IDLE ||\n        nv_record_config.state == NV_STATE_MAIN_ERASING) {\n      do {\n        hal_trace_pause();\n        lock = int_lock_global();\n        ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA,\n                                 _user_data_main_start,\n                                 sizeof(usrdata_ddblist_pool), true);\n        int_unlock_global(lock);\n        hal_trace_continue();\n        if (ret == NORFLASH_API_OK) {\n          nv_record_config.state = NV_STATE_MAIN_ERASED;\n          nvrec_trace(2, \"%s: norflash_api_erase ok,addr = 0x%x.\", __func__,\n                      _user_data_main_start);\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          do {\n            norflash_api_flush();\n          } while (norflash_api_get_free_buffer_count(NORFLASH_API_ERASING) ==\n                   0);\n        } else {\n          ASSERT(0, \"%s: norflash_api_erase err,ret = %d,addr = 0x%x.\",\n                 __func__, ret, _user_data_main_start);\n        }\n\n      } while (ret == NORFLASH_API_BUFFER_FULL);\n    }\n\n    if (nv_record_config.state == NV_STATE_MAIN_ERASED) {\n      do {\n        hal_trace_pause();\n        lock = int_lock_global();\n        crc = crc32(0, (uint8_t *)(&usrdata_ddblist_pool[pos_heap_contents]),\n                    (sizeof(usrdata_ddblist_pool) -\n                     (pos_heap_contents * sizeof(uint32_t))));\n        // nvrec_trace(2,\"%s,crc=%x.\\n\",nvrecord_tag,crc);\n        usrdata_ddblist_pool[pos_version_and_magic] =\n            ((nvrecord_struct_version << 16) | nvrecord_magic);\n        usrdata_ddblist_pool[pos_crc] = crc;\n        usrdata_ddblist_pool[pos_start_ram_addr] =\n            (uint32_t)&usrdata_ddblist_pool;\n        usrdata_ddblist_pool[pos_reserv2] = 0;\n        usrdata_ddblist_pool[pos_config_addr] =\n            (uint32_t)nv_record_config.config;\n        ASSERT(nv_record_list_is_valid(), \"%s nv_record_list is invalid!\",\n               __func__);\n        ret = norflash_api_write(NORFLASH_API_MODULE_ID_USERDATA,\n                                 _user_data_main_start, burn_buf,\n                                 sizeof(usrdata_ddblist_pool), true);\n        int_unlock_global(lock);\n        hal_trace_continue();\n        if (ret == NORFLASH_API_OK) {\n          nv_record_config.is_update = false;\n          nv_record_config.state = NV_STATE_MAIN_WRITTEN;\n          nvrec_trace(2, \"%s: norflash_api_write ok,addr = 0x%x.\", __func__,\n                      _user_data_main_start);\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          do {\n            norflash_api_flush();\n          } while (norflash_api_get_free_buffer_count(NORFLASH_API_WRITTING) ==\n                   0);\n        } else {\n          ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\",\n                 __func__, ret, _user_data_main_start);\n        }\n      } while (ret == NORFLASH_API_BUFFER_FULL);\n\n      do {\n        norflash_api_flush();\n      } while (norflash_api_get_used_buffer_count(\n                   NORFLASH_API_MODULE_ID_USERDATA, NORFLASH_API_ALL) > 0);\n\n      nv_record_config.state = NV_STATE_MAIN_DONE;\n      nvrec_trace(1, \"%s: sync flush done.\", __func__);\n    }\n#if 0 //#ifdef nv_record_debug\n        if (ret == NORFLASH_API_OK)\n        {\n            uint32_t recrc;\n            uint32_t crc;\n            uint8_t* burn_buf;\n\n            uint8_t* read_buffer = (uint8_t*)__userdata_start;\n\n            burn_buf = (uint8_t *)&usrdata_ddblist_pool[0];\n            crc = ((uint32_t *)burn_buf)[pos_crc];\n            recrc = crc32(0,((uint8_t *)read_buffer + sizeof(uint32_t)*pos_heap_contents),(sizeof(usrdata_ddblist_pool)-(pos_heap_contents*sizeof(uint32_t))));\n            ASSERT(crc == recrc,\"%s, 0x%x,recrc=%08x crc=%08x\\n\",\n                     __func__,_user_data_main_start,recrc,crc);\n            TRACE(1,\"%s crc ok.\",__func__);\n        }\n#endif\n  }\n_func_end:\n  return (ret == NORFLASH_API_OK) ? 0 : 1;\n}\n\nstatic int nv_record_flash_flush_bak(bool is_async) {\n  uint32_t lock;\n  enum NORFLASH_API_RET_T ret = NORFLASH_API_OK;\n  uint8_t burn_buf[128];\n\n  if (is_async) {\n    hal_trace_pause();\n    lock = int_lock_global();\n    if (nv_record_config.state == NV_STATE_MAIN_DONE ||\n        nv_record_config.state == NV_STATE_BAK_ERASING) {\n      if (nv_record_config.state == NV_STATE_MAIN_DONE) {\n        nv_record_config.state = NV_STATE_BAK_ERASING;\n        // nvrec_trace(1,\"%s: NV_STATE_BAK_ERASING\", __func__);\n      }\n      ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA,\n                               _user_data_bak_start,\n                               sizeof(usrdata_ddblist_pool), true);\n      if (ret == NORFLASH_API_OK) {\n        nv_record_config.state = NV_STATE_BAK_ERASED;\n        nvrec_trace(2, \"%s: norflash_api_erase ok,addr = 0x%x.\", __func__,\n                    _user_data_bak_start);\n        // nvrec_trace(1,\"%s: NV_STATE_BAK_ERASED\", __func__);\n      } else if (ret == NORFLASH_API_BUFFER_FULL) {\n        norflash_api_flush();\n      } else {\n        ASSERT(0, \"%s: norflash_api_erase err,ret = %d,addr = 0x%x.\", __func__,\n               ret, _user_data_bak_start);\n      }\n    } else if (nv_record_config.state == NV_STATE_BAK_ERASED ||\n               nv_record_config.state == NV_STATE_BAK_WRITTING) {\n      if (nv_record_config.state == NV_STATE_BAK_ERASED) {\n        nv_record_config.state = NV_STATE_BAK_WRITTING;\n        nv_record_config.written_size = 0;\n        // nvrec_trace(1,\"%s: NV_STATE_BAK_WRITTING\", __func__);\n      }\n      do {\n        ret = norflash_api_read(NORFLASH_API_MODULE_ID_USERDATA,\n                                _user_data_main_start +\n                                    nv_record_config.written_size,\n                                burn_buf, sizeof(burn_buf));\n        ASSERT(ret == NORFLASH_API_OK,\n               \"norflash_api_read failed! ret = %d, addr = 0x%x.\", (int32_t)ret,\n               _user_data_main_start + nv_record_config.written_size);\n\n        ret = norflash_api_write(NORFLASH_API_MODULE_ID_USERDATA,\n                                 _user_data_bak_start +\n                                     nv_record_config.written_size,\n                                 burn_buf, sizeof(burn_buf), true);\n        if (ret == NORFLASH_API_OK) {\n          nv_record_config.written_size += sizeof(burn_buf);\n\n          if (nv_record_config.written_size == nvrecord_mem_pool_size) {\n            nv_record_config.state = NV_STATE_BAK_WRITTEN;\n            // nvrec_trace(1,\"%s: NV_STATE_BAK_WRITTEN\", __func__);\n            break;\n          }\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          norflash_api_flush();\n          break;\n        } else {\n          ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\",\n                 __func__, ret,\n                 _user_data_bak_start + nv_record_config.written_size);\n        }\n      } while (1);\n    } else {\n      if (norflash_api_get_used_buffer_count(NORFLASH_API_MODULE_ID_USERDATA,\n                                             NORFLASH_API_ALL) == 0) {\n        // nvrec_trace(1,\"%s: NV_STATE_BAK_DONE\", __func__);\n        nv_record_config.state = NV_STATE_BAK_DONE;\n      } else {\n        norflash_api_flush();\n      }\n    }\n\n    int_unlock_global(lock);\n    hal_trace_continue();\n  } else {\n    // nvrec_trace(1,\"%s: sync flush begin.\", __func__);\n    if (nv_record_config.state == NV_STATE_MAIN_DONE ||\n        nv_record_config.state == NV_STATE_BAK_ERASING) {\n      do {\n        hal_trace_pause();\n        lock = int_lock_global();\n        ret = norflash_api_erase(NORFLASH_API_MODULE_ID_USERDATA,\n                                 _user_data_bak_start,\n                                 sizeof(usrdata_ddblist_pool), true);\n        int_unlock_global(lock);\n        hal_trace_continue();\n        if (ret == NORFLASH_API_OK) {\n          nv_record_config.state = NV_STATE_BAK_ERASED;\n          nvrec_trace(2, \"%s: norflash_api_erase ok,addr = 0x%x.\", __func__,\n                      _user_data_bak_start);\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          do {\n            norflash_api_flush();\n          } while (norflash_api_get_free_buffer_count(NORFLASH_API_ERASING) ==\n                   0);\n        } else {\n          ASSERT(0, \"%s: norflash_api_erase err,ret = %d,addr = 0x%x.\",\n                 __func__, ret, _user_data_bak_start);\n        }\n      } while (ret == NORFLASH_API_BUFFER_FULL);\n    }\n\n    if (nv_record_config.state == NV_STATE_BAK_ERASED) {\n      nv_record_config.state = NV_STATE_BAK_WRITTING;\n      nv_record_config.written_size = 0;\n      do {\n        hal_trace_pause();\n        do {\n          lock = int_lock_global();\n          ret = norflash_api_read(NORFLASH_API_MODULE_ID_USERDATA,\n                                  _user_data_main_start +\n                                      nv_record_config.written_size,\n                                  burn_buf, sizeof(burn_buf));\n          ASSERT(ret == NORFLASH_API_OK,\n                 \"norflash_api_read failed! ret = %d, addr = 0x%x.\",\n                 (int32_t)ret,\n                 _user_data_main_start + nv_record_config.written_size);\n\n          ret = norflash_api_write(NORFLASH_API_MODULE_ID_USERDATA,\n                                   _user_data_bak_start +\n                                       nv_record_config.written_size,\n                                   burn_buf, sizeof(burn_buf), true);\n          int_unlock_global(lock);\n          if (ret == NORFLASH_API_OK) {\n            nv_record_config.written_size += sizeof(burn_buf);\n            if (nv_record_config.written_size == nvrecord_mem_pool_size) {\n              nv_record_config.state = NV_STATE_BAK_WRITTEN;\n              break;\n            }\n          } else if (ret == NORFLASH_API_BUFFER_FULL) {\n            nv_record_config.state = NV_STATE_BAK_WRITTING;\n            do {\n              norflash_api_flush();\n            } while (\n                norflash_api_get_free_buffer_count(NORFLASH_API_WRITTING) == 0);\n          } else {\n            ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\",\n                   __func__, ret,\n                   _user_data_bak_start + nv_record_config.written_size);\n          }\n        } while (1);\n\n        hal_trace_continue();\n\n        if (ret == NORFLASH_API_OK) {\n          nv_record_config.state = NV_STATE_BAK_WRITTEN;\n          nvrec_trace(3, \"%s: norflash_api_write ok,addr = 0x%x,len = 0x%x.\",\n                      __func__, _user_data_bak_start,\n                      nv_record_config.written_size);\n        } else if (ret == NORFLASH_API_BUFFER_FULL) {\n          do {\n            norflash_api_flush();\n          } while (norflash_api_get_free_buffer_count(NORFLASH_API_WRITTING) ==\n                   0);\n        } else {\n          ASSERT(0, \"%s: norflash_api_write err,ret = %d,addr = 0x%x.\",\n                 __func__, ret, _user_data_bak_start);\n        }\n      } while (ret == NORFLASH_API_BUFFER_FULL);\n\n      do {\n        norflash_api_flush();\n      } while (norflash_api_get_used_buffer_count(\n                   NORFLASH_API_MODULE_ID_USERDATA, NORFLASH_API_ALL) > 0);\n      nv_record_config.state = NV_STATE_BAK_DONE;\n      nvrec_trace(1, \"%s: sync flush done.\", __func__);\n    }\n  }\n\n  if (nv_record_config.state == NV_STATE_BAK_DONE) {\n    nv_record_config.state = NV_STATE_IDLE;\n    // nvrec_trace(1,\"%s: NV_STATE_IDLE\", __func__);\n  }\n\n  return (ret == NORFLASH_API_OK) ? 0 : 1;\n}\n\nstatic int nv_record_flash_flush_int(bool is_async) {\n  int ret = 0;\n  do {\n    if ((nv_record_config.state == NV_STATE_IDLE &&\n         nv_record_config.is_update == TRUE) ||\n        nv_record_config.state == NV_STATE_MAIN_ERASING ||\n        nv_record_config.state == NV_STATE_MAIN_ERASED ||\n        nv_record_config.state == NV_STATE_MAIN_WRITTING ||\n        nv_record_config.state == NV_STATE_MAIN_WRITTEN) {\n      ret = nv_record_flash_flush_main(is_async);\n      if (is_async) {\n        break;\n      }\n    }\n\n    if (nv_record_config.state == NV_STATE_MAIN_DONE ||\n        nv_record_config.state == NV_STATE_BAK_ERASING ||\n        nv_record_config.state == NV_STATE_BAK_ERASED ||\n        nv_record_config.state == NV_STATE_BAK_WRITTING ||\n        nv_record_config.state == NV_STATE_BAK_WRITTEN ||\n        nv_record_config.state == NV_STATE_BAK_DONE) {\n      ret = nv_record_flash_flush_bak(is_async);\n    }\n  } while (0);\n  return ret;\n}\n\nvoid nv_record_flash_flush(void) { nv_record_flash_flush_int(false); }\n\nint nv_record_flash_flush_in_sleep(void) {\n  nv_record_flash_flush_int(true);\n  return 0;\n}\n\nvoid nv_callback(void *param) {\n  NORFLASH_API_OPERA_RESULT *opera_result;\n  // uint8_t *burn_buf;\n\n  opera_result = (NORFLASH_API_OPERA_RESULT *)param;\n\n  nvrec_trace(\n      6, \"%s:type = %d, addr = 0x%x,len = 0x%x,remain = %d,result = %d.\",\n      __func__, opera_result->type, opera_result->addr, opera_result->len,\n      opera_result->remain_num, opera_result->result);\n\n#ifdef nv_record_debug\n  if (opera_result->result == NORFLASH_API_OK) {\n    if (opera_result->remain_num == 0 &&\n        opera_result->type == NORFLASH_API_WRITTING) {\n      uint32_t recrc;\n      uint32_t crc;\n      uint8_t *read_buffer = (uint8_t *)opera_result->addr;\n\n      crc = ((uint32_t *)read_buffer)[pos_crc];\n      recrc = crc32(\n          0, ((uint8_t *)read_buffer + sizeof(uint32_t) * pos_heap_contents),\n          (sizeof(usrdata_ddblist_pool) -\n           (pos_heap_contents * sizeof(uint32_t))));\n      ASSERT(crc == recrc, \"%s:addr=0x%x,recrc=0x%x crc=0x%x.\", __func__,\n             opera_result->addr, recrc, crc);\n    }\n  } else {\n    ASSERT(0, \"%s:flash write fail!addr=0x%x,result = %d.\", __func__,\n           opera_result->addr, opera_result->result);\n  }\n#endif\n}\n\n#ifdef NVREC_BAIDU_DATA_SECTION\n#define BAIDU_DATA_FM_SPEC_VALUE (0xffee)\nint nvrec_baidu_data_init(void) {\n  int _fmfreq = 0;\n  if (!nvrec_config_has_section(nv_record_config.config, BAIDU_DATA_SECTIN)) {\n    nvrec_trace(0, \"no baidu section default, new one!\");\n    nvrec_config_set_int(nv_record_config.config, BAIDU_DATA_SECTIN,\n                         BAIDU_DATA_FM_KEY, BAIDU_DATA_DEF_FM_FREQ);\n  } else {\n    nvrec_trace(1, \"has baidu section, fmfreq is %d\",\n                nvrec_config_get_int(nv_record_config.config, BAIDU_DATA_SECTIN,\n                                     BAIDU_DATA_FM_KEY,\n                                     BAIDU_DATA_FM_SPEC_VALUE));\n    _fmfreq = nvrec_config_get_int(nv_record_config.config, BAIDU_DATA_SECTIN,\n                                   BAIDU_DATA_FM_KEY, BAIDU_DATA_FM_SPEC_VALUE);\n    if (_fmfreq == BAIDU_DATA_FM_SPEC_VALUE) {\n      nvrec_trace(1, \"fm bas bad value, set to %d\", BAIDU_DATA_DEF_FM_FREQ);\n      nvrec_config_set_int(nv_record_config.config, BAIDU_DATA_SECTIN,\n                           BAIDU_DATA_FM_KEY, BAIDU_DATA_DEF_FM_FREQ);\n      _fmfreq =\n          nvrec_config_get_int(nv_record_config.config, BAIDU_DATA_SECTIN,\n                               BAIDU_DATA_FM_KEY, BAIDU_DATA_FM_SPEC_VALUE);\n      if (_fmfreq == BAIDU_DATA_FM_SPEC_VALUE) {\n        nvrec_trace(0, \"get fm freq still fail!!!\");\n        ASSERT(0, \"nvrecord fail, system down!\");\n      }\n    }\n  }\n\n  return 0;\n}\n\nint nvrec_get_fm_freq(void) {\n  int _fmfreq = 0;\n  _fmfreq = nvrec_config_get_int(nv_record_config.config, BAIDU_DATA_SECTIN,\n                                 BAIDU_DATA_FM_KEY, BAIDU_DATA_FM_SPEC_VALUE);\n  if (_fmfreq == BAIDU_DATA_FM_SPEC_VALUE) {\n    nvrec_trace(1, \"%s : get fm freq fail, reinit fmfreq data\", __func__);\n    nvrec_baidu_data_init();\n  }\n  _fmfreq = nvrec_config_get_int(nv_record_config.config, BAIDU_DATA_SECTIN,\n                                 BAIDU_DATA_FM_KEY, BAIDU_DATA_FM_SPEC_VALUE);\n  if (_fmfreq == BAIDU_DATA_FM_SPEC_VALUE) {\n    nvrec_trace(1, \"%s : get fm freq still fail\", __func__);\n    ASSERT(0, \"%s : nvrecord fail, system down!\", __func__);\n  }\n\n  nvrec_trace(2, \"%s:get fm freq %d\", __func__, _fmfreq);\n  return _fmfreq;\n}\n\nint nvrec_set_fm_freq(int fmfreq) {\n  int t = hal_sys_timer_get();\n  nvrec_trace(2, \"%s:fmfreq %d\", __func__, fmfreq);\n  nvrec_config_set_int(nv_record_config.config, BAIDU_DATA_SECTIN,\n                       BAIDU_DATA_FM_KEY, fmfreq);\n  nvrec_trace(2, \"%s: use %d ms\", __func__,\n              TICKS_TO_MS(hal_sys_timer_get() - t));\n  nv_record_config.is_update = true;\n\n#if defined(NVREC_BAIDU_DATA_FLUSH_DIRECT)\n  nv_record_flash_flush_int(false);\n#endif\n  nvrec_trace(2, \"%s: use %d ms\", __func__,\n              TICKS_TO_MS(hal_sys_timer_get() - t));\n\n  return 0;\n}\n\nint nvrec_get_rand(char *rand) {\n  char *_rand = 0;\n\n  if (rand == NULL)\n    return 1;\n\n#if 0\n    _rand = nvrec_config_get_string(nv_record_config.config, BAIDU_DATA_SECTIN, BAIDU_DATA_RAND_KEY, BAIDU_DATA_DEF_RAND);\n    if (strcmp(_rand, BAIDU_DATA_DEF_RAND)==0 || _rand == NULL) {\n        TRACE(1,\"%s : get rand fail!\", __func__);\n        return 1;\n    }\n#else\n  _rand = BAIDU_DATA_DEF_RAND;\n#endif\n\n  memcpy(rand, _rand, BAIDU_DATA_RAND_LEN);\n\n  nvrec_trace(2, \"%s:rand %s\", __func__, rand);\n\n  return 0;\n}\n\nint nvrec_set_rand(char *rand) {\n  int t = hal_sys_timer_get();\n  if (rand != NULL)\n    nvrec_trace(2, \"%s:rand %s\", __func__, rand);\n  else\n    nvrec_trace(1, \"%s:rand nul\", __func__);\n  nvrec_config_set_string(nv_record_config.config, BAIDU_DATA_SECTIN,\n                          BAIDU_DATA_RAND_KEY, rand);\n  nvrec_trace(2, \"%s: use %d ms\", __func__,\n              TICKS_TO_MS(hal_sys_timer_get() - t));\n  nv_record_config.is_update = true;\n\n#if defined(NVREC_BAIDU_DATA_FLUSH_DIRECT)\n  nv_record_flash_flush_int(false);\n#endif\n  nvrec_trace(2, \"%s: use %d ms\", __func__,\n              TICKS_TO_MS(hal_sys_timer_get() - t));\n\n  return 0;\n}\n\nint nvrec_clear_rand(void) {\n  nvrec_set_rand(NULL);\n  return 0;\n}\n\nint nvrec_dev_get_sn(char *sn) {\n  unsigned int sn_addr;\n  if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n    return -1;\n  } else {\n    sn_addr = (unsigned int)(__factory_start + rev2_dev_prod_sn);\n  }\n\n  if (false == dev_sector_valid)\n    return -1;\n  if (NULL == sn)\n    return -1;\n\n  memcpy((void *)sn, (void *)sn_addr, BAIDU_DATA_SN_LEN);\n\n  return 0;\n}\n#endif\n\n#endif // !defined(NEW_NV_RECORD_ENABLED)\n\nbool nvrec_dev_data_open(void) {\n  uint32_t dev_zone_crc, dev_zone_flsh_crc;\n  uint32_t vermagic;\n\n  vermagic = __factory_start[dev_version_and_magic];\n  nvrec_trace(2, \"%s,vermagic=0x%x\", __func__, vermagic);\n  if ((nvrec_dev_magic != (vermagic & 0xFFFF)) ||\n      ((vermagic >> 16) > NVREC_DEV_NEWEST_REV)) {\n    dev_sector_valid = false;\n    nvrec_trace(1, \"%s,dev sector invalid.\", __func__);\n    return dev_sector_valid;\n  }\n\n  // following the nv rec version number programmed by the downloader tool,\n  // to be backward compatible\n  nv_record_dev_rev = vermagic >> 16;\n  nvrec_trace(1, \"Nv record dev version %d\", nv_record_dev_rev);\n\n  if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n    dev_zone_flsh_crc = __factory_start[dev_crc];\n    dev_zone_crc = crc32(0, (uint8_t *)(&__factory_start[dev_reserv1]),\n                         (dev_data_len - dev_reserv1) * sizeof(uint32_t));\n  } else {\n    // check the data length\n    if ((rev2_dev_section_start_reserved * sizeof(uint32_t)) +\n            __factory_start[rev2_dev_data_len] >\n        4096) {\n      nvrec_trace(1,\n                  \"nv rec dev data len %d has exceeds the facory sector size!.\",\n                  __factory_start[rev2_dev_data_len]);\n      dev_sector_valid = false;\n      return false;\n    }\n\n    // assure that in future, if the nv dev data structure is extended, the\n    // former tool and former bin can still be workable\n    dev_zone_flsh_crc = __factory_start[rev2_dev_crc];\n    dev_zone_crc =\n        crc32(0, (uint8_t *)(&__factory_start[rev2_dev_section_start_reserved]),\n              __factory_start[rev2_dev_data_len]);\n  }\n\n  nvrec_trace(4, \"%s: data len 0x%x,dev_zone_flsh_crc=0x%x,dev_zone_crc=0x%x\",\n              __func__, __factory_start[rev2_dev_data_len], dev_zone_flsh_crc,\n              dev_zone_crc);\n  if (dev_zone_flsh_crc == dev_zone_crc) {\n    dev_sector_valid = true;\n  }\n\n  if (dev_sector_valid) {\n    nvrec_trace(1, \"%s: nv rec dev is valid.\", __func__);\n  } else {\n    nvrec_trace(1, \"%s: nv rec dev is invalid.\", __func__);\n  }\n  return dev_sector_valid;\n}\n\nbool nvrec_dev_localname_addr_init(dev_addr_name *dev) {\n  uint32_t *p_devdata_cache = __factory_start;\n  size_t name_len = 0;\n  if (true == dev_sector_valid) {\n    nvrec_trace(1, \"%s: nv dev data valid\", __func__);\n    if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n      memcpy((void *)dev->btd_addr, (void *)&p_devdata_cache[dev_bt_addr],\n             BTIF_BD_ADDR_SIZE);\n      memcpy((void *)dev->ble_addr, (void *)&p_devdata_cache[dev_ble_addr],\n             BTIF_BD_ADDR_SIZE);\n      dev->localname = (char *)&p_devdata_cache[dev_name];\n    } else {\n      memcpy((void *)dev->btd_addr, (void *)&p_devdata_cache[rev2_dev_bt_addr],\n             BTIF_BD_ADDR_SIZE);\n      memcpy((void *)dev->ble_addr, (void *)&p_devdata_cache[rev2_dev_ble_addr],\n             BTIF_BD_ADDR_SIZE);\n      dev->localname = (char *)&p_devdata_cache[rev2_dev_name];\n      dev->ble_name = (char *)&p_devdata_cache[rev2_dev_ble_name];\n    }\n\n    if (strlen(dev->localname) < CLASSIC_BTNAME_LEN) {\n      name_len = strlen(dev->localname);\n    } else {\n      name_len = CLASSIC_BTNAME_LEN - 1;\n    }\n    memcpy(classics_bt_name, dev->localname, name_len);\n    classics_bt_name[name_len] = '\\0';\n    bt_set_local_name(classics_bt_name);\n    bt_set_local_address(dev->btd_addr);\n  } else {\n    nvrec_trace(1, \"%s: nv dev data invalid\", __func__);\n  }\n\n  nvrec_trace(0, \"BT addr is:\");\n  DUMP8(\"%02x \", dev->btd_addr, BTIF_BD_ADDR_SIZE);\n  nvrec_trace(0, \"BLE addr is:\");\n  DUMP8(\"%02x \", dev->ble_addr, BTIF_BD_ADDR_SIZE);\n  nvrec_trace(2, \"localname=%s, namelen=%d\", dev->localname,\n              strlen(dev->localname));\n  if (dev->ble_name)\n    nvrec_trace(2, \"blename=%s, namelen=%d\", dev->ble_name,\n                strlen(dev->ble_name));\n\n  return dev_sector_valid;\n}\n\nint nvrec_dev_force_get_btaddress(unsigned char *btd_addr) {\n  uint32_t *p_devdata_cache = __factory_start;\n  memcpy((void *)btd_addr, (void *)&p_devdata_cache[dev_bt_addr],\n         BTIF_BD_ADDR_SIZE);\n  return 0;\n}\nstatic void nvrec_dev_data_fill_xtal_fcap(uint32_t *mem_pool, uint32_t val) {\n  uint8_t *btaddr = NULL;\n  uint8_t *bleaddr = NULL;\n\n  assert(0 != mem_pool);\n  if (!dev_sector_valid) {\n    mem_pool[dev_version_and_magic] =\n        ((nv_record_dev_rev << 16) | nvrec_dev_magic);\n  }\n\n  if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n    if (dev_sector_valid) {\n      memcpy((void *)mem_pool, (void *)__factory_start, 0x1000);\n      mem_pool[dev_xtal_fcap] = val;\n      mem_pool[dev_crc] =\n          crc32(0, (uint8_t *)(&mem_pool[dev_reserv1]),\n                (dev_data_len - dev_reserv1) * sizeof(uint32_t));\n    } else {\n      const char *localname = bt_get_local_name();\n      unsigned int namelen = strlen(localname);\n\n      btaddr = bt_get_local_address();\n      bleaddr = bt_get_ble_local_address();\n\n      mem_pool[dev_reserv1] = 0;\n      mem_pool[dev_reserv2] = 0;\n      memcpy((void *)&mem_pool[dev_name], (void *)localname, (size_t)namelen);\n      nvrec_dev_rand_btaddr_gen(btaddr);\n      nvrec_dev_rand_btaddr_gen(bleaddr);\n      memcpy((void *)&mem_pool[dev_bt_addr], (void *)btaddr, BTIF_BD_ADDR_SIZE);\n      memcpy((void *)&mem_pool[dev_ble_addr], (void *)bleaddr,\n             BTIF_BD_ADDR_SIZE);\n      memset((void *)&mem_pool[dev_dongle_addr], 0x0, BTIF_BD_ADDR_SIZE);\n      mem_pool[dev_xtal_fcap] = val;\n      mem_pool[dev_crc] =\n          crc32(0, (uint8_t *)(&mem_pool[dev_reserv1]),\n                (dev_data_len - dev_reserv1) * sizeof(uint32_t));\n      nvrec_trace(2, \"%s: mem_pool[dev_crc]=%x.\\n\", __func__,\n                  mem_pool[dev_crc]);\n    }\n  } else {\n    if (dev_sector_valid) {\n      memcpy((void *)mem_pool, (void *)__factory_start, 0x1000);\n      mem_pool[rev2_dev_xtal_fcap] = val;\n      mem_pool[rev2_dev_crc] =\n          crc32(0, (uint8_t *)(&mem_pool[rev2_dev_section_start_reserved]),\n                mem_pool[rev2_dev_data_len]);\n    } else {\n      const char *localname = bt_get_local_name();\n      unsigned int namelen = strlen(localname);\n\n      btaddr = bt_get_local_address();\n      bleaddr = bt_get_ble_local_address();\n      mem_pool[rev2_dev_section_start_reserved] = 0;\n      mem_pool[rev2_dev_reserv2] = 0;\n      memcpy((void *)&mem_pool[rev2_dev_name], (void *)localname,\n             (size_t)namelen);\n      memcpy((void *)&mem_pool[rev2_dev_ble_name],\n             (void *)bt_get_ble_local_name(), BLE_NAME_LEN_IN_NV);\n      nvrec_dev_rand_btaddr_gen(btaddr);\n      nvrec_dev_rand_btaddr_gen(bleaddr);\n      memcpy((void *)&mem_pool[rev2_dev_bt_addr], (void *)btaddr,\n             BTIF_BD_ADDR_SIZE);\n      memcpy((void *)&mem_pool[rev2_dev_ble_addr], (void *)bleaddr,\n             BTIF_BD_ADDR_SIZE);\n      memset((void *)&mem_pool[rev2_dev_dongle_addr], 0x0, BTIF_BD_ADDR_SIZE);\n      mem_pool[rev2_dev_xtal_fcap] = val;\n      mem_pool[rev2_dev_data_len] =\n          (rev2_dev_section_end - rev2_dev_section_start_reserved) *\n          sizeof(uint32_t);\n      mem_pool[rev2_dev_crc] =\n          crc32(0, (uint8_t *)(&mem_pool[rev2_dev_section_start_reserved]),\n                mem_pool[rev2_dev_data_len]);\n      nvrec_trace(2, \"%s: mem_pool[rev2_dev_crc] = 0x%x.\\n\", __func__,\n                  mem_pool[rev2_dev_crc]);\n    }\n  }\n}\n\nvoid nvrec_dev_flash_flush(unsigned char *mempool) {\n  uint32_t lock;\n#ifdef nv_record_debug\n  uint32_t devdata[dev_data_len] = {\n      0,\n  };\n  uint32_t recrc;\n#endif\n\n  if (NULL == mempool)\n    return;\n  lock = int_lock_global();\n  pmu_flash_write_config();\n\n  hal_norflash_erase(HAL_NORFLASH_ID_0,\n                     (uint32_t)NVRECORD_CACHE_2_UNCACHE(__factory_start),\n                     0x1000);\n  hal_norflash_write(\n      HAL_NORFLASH_ID_0, (uint32_t)NVRECORD_CACHE_2_UNCACHE(__factory_start),\n      (uint8_t *)mempool, 0x1000); // dev_data_len*sizeof(uint32_t));\n\n  pmu_flash_read_config();\n  int_unlock_global(lock);\n\n#ifdef nv_record_debug\n  if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n    memset(devdata, 0x0, dev_data_len * sizeof(uint32_t));\n    memcpy(devdata, __factory_start, dev_data_len * sizeof(uint32_t));\n    recrc = crc32(0, (uint8_t *)(&devdata[dev_reserv1]),\n                  (dev_data_len - dev_reserv1) * sizeof(uint32_t));\n    nvrec_trace(3, \"%s: devdata[dev_crc]=%x.recrc=%x\\n\", __func__,\n                devdata[dev_crc], recrc);\n    if (devdata[dev_crc] != recrc)\n      assert(0);\n  }\n#endif\n}\n\nvoid nvrec_dev_rand_btaddr_gen(uint8_t *bdaddr) {\n  unsigned int seed;\n  int i;\n\n  OS_DUMP8(\"%x \", bdaddr, 6);\n  seed = hal_sys_timer_get();\n  for (i = 0; i < BTIF_BD_ADDR_SIZE; i++) {\n    unsigned int randval;\n    srand(seed);\n    randval = rand();\n    bdaddr[i] = (randval & 0xff);\n    seed += rand();\n  }\n  OS_DUMP8(\"%x \", bdaddr, 6);\n}\n\nvoid nvrec_dev_set_xtal_fcap(unsigned int xtal_fcap) {\n  uint8_t *mempool = NULL;\n  uint32_t lock;\n#ifdef nv_record_debug\n  uint32_t devdata[dev_data_len] = {\n      0,\n  };\n  uint32_t recrc;\n#endif\n\n  syspool_init();\n  syspool_get_buff(&mempool, 0x1000);\n  nvrec_dev_data_fill_xtal_fcap((uint32_t *)mempool, (uint32_t)xtal_fcap);\n  lock = int_lock_global();\n  norflash_api_flush_all(); // Ensure that the flash is in an operational state\n  pmu_flash_write_config();\n\n  hal_norflash_erase(HAL_NORFLASH_ID_0,\n                     (uint32_t)NVRECORD_CACHE_2_UNCACHE(__factory_start),\n                     0x1000);\n  hal_norflash_write(\n      HAL_NORFLASH_ID_0, (uint32_t)NVRECORD_CACHE_2_UNCACHE(__factory_start),\n      (uint8_t *)mempool, 0x1000); // dev_data_len*sizeof(uint32_t));\n\n  pmu_flash_read_config();\n  int_unlock_global(lock);\n#ifdef nv_record_debug\n  if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n    memset(devdata, 0x0, dev_data_len * sizeof(uint32_t));\n    memcpy(devdata, __factory_start, dev_data_len * sizeof(uint32_t));\n    nvrec_trace(2, \"%s: xtal fcap = %d\", __func__, devdata[dev_xtal_fcap]);\n    recrc = crc32(0, (uint8_t *)(&devdata[dev_reserv1]),\n                  (dev_data_len - dev_reserv1) * sizeof(uint32_t));\n    nvrec_trace(2, \"devdata[dev_crc]=%x.recrc=%x\\n\", devdata[dev_crc], recrc);\n    if (devdata[dev_crc] != recrc)\n      assert(0);\n  }\n#endif\n}\n\nint nvrec_dev_get_xtal_fcap(unsigned int *xtal_fcap) {\n  unsigned int xtal_fcap_addr;\n  if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n    xtal_fcap_addr = (unsigned int)(__factory_start + dev_xtal_fcap);\n  } else {\n    xtal_fcap_addr = (unsigned int)(__factory_start + rev2_dev_xtal_fcap);\n  }\n\n  unsigned int tmpval[1] = {\n      0,\n  };\n\n  if (false == dev_sector_valid)\n    return -1;\n  if (NULL == xtal_fcap)\n    return -1;\n  memcpy((void *)tmpval, (void *)xtal_fcap_addr, sizeof(unsigned int));\n  *xtal_fcap = tmpval[0];\n  return 0;\n}\n\nint nvrec_dev_get_dongleaddr(bt_bdaddr_t *dongleaddr) {\n  unsigned int dongle_addr_pos;\n  if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n    dongle_addr_pos = (unsigned int)(__factory_start + dev_dongle_addr);\n  } else {\n    dongle_addr_pos = (unsigned int)(__factory_start + rev2_dev_dongle_addr);\n  }\n\n  if (false == dev_sector_valid)\n    return -1;\n  if (NULL == dongleaddr)\n    return -1;\n  memcpy((void *)dongleaddr, (void *)dongle_addr_pos, BTIF_BD_ADDR_SIZE);\n  return 0;\n}\n\nint nvrec_dev_get_btaddr(char *btaddr) {\n  unsigned int bt_addr_pos;\n  if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n    bt_addr_pos = (unsigned int)(__factory_start + dev_bt_addr);\n  } else {\n    bt_addr_pos = (unsigned int)(__factory_start + rev2_dev_bt_addr);\n  }\n\n  if (false == dev_sector_valid)\n    return 0;\n  if (NULL == btaddr)\n    return 0;\n  memcpy((void *)btaddr, (void *)bt_addr_pos, BTIF_BD_ADDR_SIZE);\n  return 1;\n}\n\nchar *nvrec_dev_get_bt_name(void) { return classics_bt_name; }\n\nconst char *nvrec_dev_get_ble_name(void) {\n  if ((NVREC_DEV_VERSION_1 == nv_record_dev_rev) || (!dev_sector_valid)) {\n    return BLE_DEFAULT_NAME;\n  } else {\n\n    return (const char *)(&__factory_start[rev2_dev_ble_name]);\n  }\n}\n"
  },
  {
    "path": "services/nvrecord/nvrecord.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __NVRECORD_H__\n#define __NVRECORD_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \n#include \n#include \"cmsis.h\"\n#include \"nvrec_config.h\"\n#include \"bluetooth.h\"\n#include \"me_api.h\"\n#include \"hal_trace.h\"\n#if defined(NEW_NV_RECORD_ENABLED)\n#include \"nvrecord_extension.h\"\n#include \"nvrecord_bt.h\"\n#include \"nvrecord_env.h\"\n#include \"nvrecord_ble.h\"\n#include \"nvrecord_dma_config.h\"\n#include \"nvrecord_fp_account_key.h\"\n#include \"btif_sys_config.h\"\n\n#define nvdev_tag       \"nvdev_tag\"\n\n#else\n\n#define DDB_RECORD_NUM  9\n#define section_name_ddbrec     \"ddbrec\"\n#define nvrecord_mem_pool_size      4096\n#define nvrecord_tag    \"nvrecord\"\n#define nvdev_tag       \"nvdev_tag\"\n#define section_name_other     \"other\"\n\n\n/*\n    version|magic           16bit|16bit             0001 cb91\n    crc                            32bit\n    reserve[0]                 32bit\n    reserve[1]                 32bit\n    config_addr                32bit\n    heap_contents            32bit\n    mempool                   ...\n*/\n#define nvrecord_struct_version             8\n#define nvrecord_magic                      0xcb91\n\ntypedef enum\n{\n    pos_version_and_magic,// 0\n    pos_crc,                            // 1\n    pos_start_ram_addr,                    // 2\n    pos_reserv2,                    // 3\n    pos_config_addr,            // 4\n    pos_heap_contents,      // 5\n\n}nvrec_mempool_pre_enum;\n\n#define mempool_pre_offset       (1+pos_config_addr+((sizeof(heap_handle_t)/sizeof(uint32_t))+1))\n\ntypedef enum\n{\n    NV_STATE_IDLE,\n    NV_STATE_MAIN_ERASING,\n    NV_STATE_MAIN_ERASED,\n    NV_STATE_MAIN_WRITTING,\n    NV_STATE_MAIN_WRITTEN,\n    NV_STATE_MAIN_DONE,\n    NV_STATE_BAK_ERASING,\n    NV_STATE_BAK_ERASED,\n    NV_STATE_BAK_WRITTING,\n    NV_STATE_BAK_WRITTEN,\n    NV_STATE_BAK_DONE,\n}NV_STATE;\n\ntypedef struct\n{\n    bool is_update;\n    NV_STATE state;\n    uint32_t written_size;\n    nvrec_config_t *config;\n}nv_record_struct;\n\ntypedef enum\n{\n    section_usrdata_ddbrecord,\n    section_none\n}SECTIONS_ADP_ENUM;\n\ntypedef  struct btdevice_volume{\n    int8_t a2dp_vol;\n    int8_t hfp_vol;\n}btdevice_volume;\n\ntypedef  struct btdevice_profile{\n    bool hfp_act;\n    bool hsp_act;\n    bool a2dp_act;\n    uint8_t a2dp_codectype;\n}btdevice_profile;\n\ntypedef struct _nvrec_btdevicerecord\n{\n    btif_device_record_t record;\n    btdevice_volume device_vol;\n    btdevice_profile device_plf;\n#ifdef BTIF_DIP_DEVICE\n    uint16_t vend_id;\n    uint16_t vend_id_source;\n    uint16_t reserve;\n#endif\n} nvrec_btdevicerecord;\n\nextern uint8_t nv_record_dev_rev;\n\nvoid nv_record_init(void);\nbt_status_t nv_record_open(SECTIONS_ADP_ENUM section_id);\nbt_status_t nv_record_enum_dev_records(unsigned short index,btif_device_record_t* record);\nbt_status_t nv_record_add(SECTIONS_ADP_ENUM type,void *record);\nbt_status_t nv_record_ddbrec_find(const bt_bdaddr_t *bd_ddr, btif_device_record_t*record);\nbt_status_t nv_record_ddbrec_delete(const bt_bdaddr_t *bdaddr);\nint nv_record_btdevicerecord_find(const bt_bdaddr_t *bd_ddr, nvrec_btdevicerecord **record);\nint nv_record_touch_cause_flush(void);\n\nint nv_record_get_paired_dev_count(void);\nvoid nv_record_sector_clear(void);\nvoid nv_record_flash_flush(void);\nint nv_record_flash_flush_in_sleep(void);\nvoid nv_record_execute_async_flush(void);\n\nint nv_record_enum_latest_two_paired_dev(btif_device_record_t* record1,btif_device_record_t* record2);\nvoid nv_record_all_ddbrec_print(void);\n\nvoid nv_record_update_runtime_userdata(void);\nbt_status_t nv_record_config_rebuild(void);\nvoid nv_record_btdevicerecord_set_a2dp_vol(nvrec_btdevicerecord* pRecord, int8_t vol);\nvoid nv_record_btdevicerecord_set_hfp_vol(nvrec_btdevicerecord* pRecord, int8_t vol);\nvoid nv_record_btdevicevolume_set_a2dp_vol(btdevice_volume* device_vol, int8_t vol);\nvoid nv_record_btdevicevolume_set_hfp_vol(btdevice_volume* device_vol, int8_t vol);\nvoid nv_record_btdevicerecord_set_vend_id_and_source(nvrec_btdevicerecord* pRecord, int16_t vend_id, int16_t vend_id_source);\nvoid nv_record_btdevicerecord_set_a2dp_profile_active_state(btdevice_profile* device_plf, bool isActive);\nvoid nv_record_btdevicerecord_set_hfp_profile_active_state(btdevice_profile* device_plf, bool isActive);\nvoid nv_record_btdevicerecord_set_hsp_profile_active_state(btdevice_profile* device_plf, bool isActive);\nvoid nv_record_btdevicerecord_set_a2dp_profile_codec(btdevice_profile* device_plf, uint8_t a2dpCodec);\n\n#ifdef NVREC_BAIDU_DATA_SECTION\n#define BAIDU_DATA_SECTIN (\"baidu_data\")\n#define BAIDU_DATA_FM_KEY (\"fmfreq\")\n#define BAIDU_DATA_RAND_KEY (\"rand\")\n\n#define BAIDU_DATA_DEF_RAND \"abcdefghi\"\n\nint nvrec_baidu_data_init(void);\nint nvrec_get_fm_freq(void);\nint nvrec_set_fm_freq(int fmfreq);\nint nvrec_get_rand(char *rand);\nint nvrec_set_rand(char *rand);\nint nvrec_clear_rand(void);\nint nvrec_dev_get_sn(char *sn);\n#endif\n\nuint32_t nv_record_pre_write_operation(void);\nvoid nv_record_post_write_operation(uint32_t lock);\n\n#endif // #if !defined(NEW_NV_RECORD_ENABLED)\n\n#define nv_record_debug\n#ifdef nv_record_debug\n#define nvrec_trace     TRACE\n#else\n#define nvrec_trace(...)\n#endif\n\n#define NVREC_DEV_NEWEST_REV        2\n#define NVREC_DEV_VERSION_1         1\n\n#define BLE_NAME_LEN_IN_NV  32\n\n/*\n    this is the nvrec dev zone struct :\n    version|magic   16bit|16bit\n    crc         32bit\n    reserve[0]      32bit\n    reserv[1]       32bit\n    dev local name  max 249*8bit\n    dev bt addr         64bit\n    dev ble addr        64bit\n    calib data      32bit\n*/\n#define nvrec_dev_version   1\n#define nvrec_dev_magic      0xba80\ntypedef enum\n{\n    dev_version_and_magic,      //0\n    dev_crc,                    //1\n    dev_reserv1,                //2\n    dev_reserv2,                //3\n    dev_name,                   //[4~66]\n    dev_bt_addr = 67,           //[67~68]\n    dev_ble_addr = 69,          //[69~70]\n    dev_dongle_addr = 71,\n    dev_xtal_fcap = 73,         //73\n    dev_data_len,\n}nvrec_dev_enum;\n\n// following the former nv rec dev info\ntypedef enum\n{\n    rev2_dev_data_len = 75,             //75, length of the valid content, excluding crc\n    rev2_dev_crc,                       //76, crc value of the following data\n    rev2_dev_section_start_reserved,    //77\n    rev2_dev_reserv2,                   //78\n    rev2_dev_name,                      //[79~141]\n    rev2_dev_bt_addr = 142,             //[142~143]\n    rev2_dev_ble_addr = 144,            //[144~145]\n    rev2_dev_dongle_addr = 146,         //[146~147]\n    rev2_dev_xtal_fcap = 148,           //148\n    rev2_dev_ble_name = 149,            //[149~156]\n#ifdef NVREC_BAIDU_DATA_SECTION\n    rev2_dev_prod_sn = 157,             //[157~160]\n#endif\n    // TODO: add the new section in the future if needed\n\n    rev2_dev_section_end = 157,\n\n}nvrec_dev_rev_2_enum;\n\nint nvrec_dev_get_dongleaddr(bt_bdaddr_t *dongleaddr);\nint nvrec_dev_get_btaddr(char *btaddr);\nchar* nvrec_dev_get_bt_name(void);\nconst char* nvrec_dev_get_ble_name(void);\n\n#ifdef __cplusplus\n}\n#endif\n#endif /* __NVRECORD_H__*/\n"
  },
  {
    "path": "services/nvrecord/nvrecord_ble.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if !defined(NEW_NV_RECORD_ENABLED)\n\n#include \"nvrecord_ble.h\"\n#include \"co_math.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord.h\"\n#include \"tgt_hardware.h\"\n#include \n\n#define ble_nv_debug\n#ifdef ble_nv_debug\n#define ble_trace TRACE\n#else\n#define ble_trace\n#endif\n\nextern nv_record_struct nv_record_config;\nstatic struct Ble_nvrecord *nvrecord_ble_p = NULL;\n\nstatic bool blerec_specific_value_prepare(const BleDeviceinfo *param_rec) {\n  // Preparations before adding new ble record:\n  // 1. If not existing. Check the record count. If it's BLE_RECORD_NUM,\n  //     move 0-(BLE_RECORD_NUM-2) right side by one slot, to discard the last\n  //     one and leave slot 0, decrease the record number. If it's smaller than\n  //     BLE_RECORD_NUM, move 0-(count-1) right side by one slot, leave slot 0,\n  //     don't change the record number.\n  // 2. If existing already and the location is entryToFree , move\n  // 0-(entryToFree-1)\n  //      right side by one slot, leave slot 0. Decrease the record number for\n  //      adding the new one.\n\n  bool isEntryExisting = false;\n  uint8_t entryToFree = 0;\n  struct Ble_nvrecord *dest_ptr;\n\n  dest_ptr = nvrecord_ble_p;\n  TRACE(3, \"%s start search addr %08x  list_num=%d\", __func__,\n        (uint32_t)dest_ptr, dest_ptr->saved_list_num);\n  if (dest_ptr->saved_list_num > 0) {\n    for (uint8_t i = 0; i < dest_ptr->saved_list_num; i++) {\n      if (0 == memcmp(dest_ptr->ble_nv[i].LTK, param_rec->LTK, BLE_LTK_SIZE)) {\n        ble_trace(2, \"%s Find the existing entry %d\", __func__, i);\n        DUMP8(\"%02x \", (uint8_t *)param_rec, sizeof(BleDeviceinfo));\n        DUMP8(\"%02x \", (uint8_t *)&dest_ptr->ble_nv[i], sizeof(BleDeviceinfo));\n        if (!memcmp((uint8_t *)param_rec, (uint8_t *)&dest_ptr->ble_nv[i],\n                    sizeof(BleDeviceinfo))) {\n          ble_trace(\n              0, \"The new coming BLE device info is the same as the recorded.\");\n          return false;\n        }\n        memset(&(dest_ptr->ble_nv[i]), 0, sizeof(BleDeviceinfo));\n        entryToFree = i;\n        dest_ptr->saved_list_num--;\n        isEntryExisting = true;\n        break;\n      }\n    }\n  } else {\n    return true;\n  }\n\n  if (!isEntryExisting) {\n    if (BLE_RECORD_NUM == dest_ptr->saved_list_num) {\n      TRACE(0, \"<=====>blerec list is full,delete the oldest and add param_rec \"\n               \"to list\");\n      for (uint8_t k = 0; k < BLE_RECORD_NUM - 1; k++) {\n        memcpy(&(dest_ptr->ble_nv[BLE_RECORD_NUM - 1 - k]),\n               &(dest_ptr->ble_nv[BLE_RECORD_NUM - 2 - k]),\n               sizeof(BleDeviceinfo));\n      }\n      dest_ptr->saved_list_num--;\n    } else {\n      for (uint8_t k = 0; k < dest_ptr->saved_list_num; k++) {\n        memcpy(&(dest_ptr->ble_nv[dest_ptr->saved_list_num - k]),\n               &(dest_ptr->ble_nv[dest_ptr->saved_list_num - 1 - k]),\n               sizeof(BleDeviceinfo));\n      }\n    }\n    return true;\n  } else {\n    for (uint8_t list_updata = 0; list_updata < entryToFree; list_updata++) {\n      memcpy(&(dest_ptr->ble_nv[entryToFree - list_updata]),\n             &(dest_ptr->ble_nv[entryToFree - list_updata - 1]),\n             sizeof(BleDeviceinfo));\n    }\n  }\n\n  return true;\n}\n\nvoid nv_record_blerec_init(void) {\n  if (NULL == nvrecord_ble_p) {\n    nvrecord_ble_p = (struct Ble_nvrecord *)nvrec_config_get_int(\n        nv_record_config.config, (const char *)section_name_ble_nvds,\n        (const char *)NV_RECORD_BLE_KEY, NVRAM_BLE_INVALID);\n  }\n\n  if (nvrecord_ble_p == (struct Ble_nvrecord *)NVRAM_BLE_INVALID) {\n    nvrecord_ble_p =\n        (struct Ble_nvrecord *)pool_malloc(sizeof(struct Ble_nvrecord));\n    if (!nvrecord_ble_p) {\n      ASSERT(0, \"%s ble pool_malloc failed\", __func__);\n      return;\n    }\n    TRACE(1, \"ble nv malloc addr %08x\", (uint32_t)nvrecord_ble_p);\n\n    memset(nvrecord_ble_p, 0, sizeof(struct Ble_nvrecord));\n    nvrecord_ble_p->saved_list_num = 0; // init saved num\n\n    uint8_t index;\n    // avoid ble irk collision low probability\n    uint32_t generatedSeed = hal_sys_timer_get();\n    for (uint8_t index = 0; index < sizeof(bt_addr); index++) {\n      generatedSeed ^=\n          (((uint32_t)(bt_addr[index])) << (hal_sys_timer_get() & 0xF));\n    }\n    srand(generatedSeed);\n\n    // generate a new IRK\n    for (index = 0; index < BLE_IRK_SIZE; index++) {\n      nvrecord_ble_p->loc_irk[index] = (uint8_t)co_rand_word();\n    }\n    nvrec_config_set_int(nv_record_config.config, section_name_ble_nvds,\n                         (const char *)NV_RECORD_BLE_KEY, (int)nvrecord_ble_p);\n  }\n}\n\nvoid nv_record_blerec_get_local_irk(uint8_t *pIrk) {\n  memcpy(pIrk, nvrecord_ble_p->loc_irk, BLE_IRK_SIZE);\n}\n\nbool nv_record_blerec_get_bd_addr_from_irk(uint8_t *pBdAddr, uint8_t *pIrk) {\n  if (nvrecord_ble_p->saved_list_num > 0) {\n    for (uint8_t index = 0; index < nvrecord_ble_p->saved_list_num; index++) {\n      if (!memcmp(pIrk, nvrecord_ble_p->ble_nv[index].IRK, BLE_IRK_SIZE)) {\n        memcpy(pBdAddr, nvrecord_ble_p->ble_nv[index].peer_bleAddr,\n               BLE_ADDR_SIZE);\n        return true;\n      }\n    }\n    return false;\n  } else {\n    return false;\n  }\n}\n\nint nv_record_blerec_add(const BleDeviceinfo *param_rec) {\n  int nRet = 0;\n\n  uint8_t isNeedToUpdateNv = true;\n  isNeedToUpdateNv = blerec_specific_value_prepare(param_rec);\n\n  if (isNeedToUpdateNv) {\n    // add device info into nv struct\n    memcpy(nvrecord_ble_p->ble_nv[0].peer_bleAddr, param_rec->peer_bleAddr,\n           BLE_ADDR_SIZE);                            // addr\n    nvrecord_ble_p->ble_nv[0].EDIV = param_rec->EDIV; // EDIV\n    memcpy(nvrecord_ble_p->ble_nv[0].RANDOM, param_rec->RANDOM,\n           BLE_ENC_RANDOM_SIZE); // RANDOM\n    memcpy(nvrecord_ble_p->ble_nv[0].LTK, param_rec->LTK, BLE_LTK_SIZE); // LTK\n    memcpy(nvrecord_ble_p->ble_nv[0].IRK, param_rec->IRK, BLE_IRK_SIZE); // IRK\n    nvrecord_ble_p->ble_nv[0].bonded = param_rec->bonded; // bond status\n    nvrecord_ble_p->saved_list_num++;                     // updata saved num\n\n    nv_record_update_runtime_userdata();\n    TRACE(2, \"%s CURRENT BLE LIST NUM=%d\", __func__,\n          nvrecord_ble_p->saved_list_num);\n  }\n#ifdef ble_nv_debug\n  for (uint8_t k = 0; k < nvrecord_ble_p->saved_list_num; k++) {\n    TRACE(0, \"=========================================\");\n    TRACE(1, \"Num %d BLE record:\", k);\n    TRACE(0, \"BLE addr:\");\n    DUMP8(\"%02x \", (uint8_t *)nvrecord_ble_p->ble_nv[k].peer_bleAddr,\n          BLE_ADDR_SIZE);\n    TRACE(1, \"NV EDIV %d and random is:\", nvrecord_ble_p->ble_nv[k].EDIV);\n    DUMP8(\"%02x \", (uint8_t *)nvrecord_ble_p->ble_nv[k].RANDOM,\n          BLE_ENC_RANDOM_SIZE);\n    TRACE(0, \"NV LTK:\");\n    DUMP8(\"%02x \", (uint8_t *)nvrecord_ble_p->ble_nv[k].LTK, BLE_LTK_SIZE);\n    TRACE(0, \"NV irk:\");\n    DUMP8(\"%02x \", (uint8_t *)nvrecord_ble_p->ble_nv[k].IRK, BLE_IRK_SIZE);\n  }\n#endif\n  return nRet;\n}\n\nuint8_t nv_record_ble_fill_irk(uint8_t *irkToFill) {\n  struct Ble_nvrecord *find_ptr;\n\n  find_ptr = (struct Ble_nvrecord *)nvrec_config_get_int(\n      nv_record_config.config, (const char *)section_name_ble_nvds,\n      (const char *)NV_RECORD_BLE_KEY, NVRAM_BLE_INVALID);\n\n  TRACE(2, \"%s find_ptr 0x%x\", __FUNCTION__, (uint32_t)find_ptr);\n\n  if (((struct Ble_nvrecord *)NVRAM_BLE_INVALID == find_ptr) ||\n      (0 == find_ptr->saved_list_num)) {\n    return 0;\n  }\n\n  if (find_ptr->saved_list_num > 0) {\n    for (uint8_t index = 0; index < find_ptr->saved_list_num; index++) {\n      memcpy(irkToFill + index * BLE_IRK_SIZE, find_ptr->ble_nv[index].IRK,\n             BLE_IRK_SIZE);\n    }\n    return find_ptr->saved_list_num;\n  } else {\n    return 0;\n  }\n}\n\n// when master send encription req,if bonded,use ltk to bonding again(skip the\n// pair step)\nbool nv_record_ble_record_find_ltk_through_static_bd_addr(uint8_t *pBdAddr,\n                                                          uint8_t *ltk) {\n  struct Ble_nvrecord *find_ptr;\n  find_ptr = (struct Ble_nvrecord *)nvrec_config_get_int(\n      nv_record_config.config, (const char *)section_name_ble_nvds,\n      (const char *)NV_RECORD_BLE_KEY, NVRAM_BLE_INVALID);\n  if (find_ptr == (struct Ble_nvrecord *)NVRAM_BLE_INVALID) {\n    TRACE(1, \"%s find data failed\", __func__);\n    return false;\n  }\n\n  for (uint8_t find_index = 0; find_index < find_ptr->saved_list_num;\n       find_index++) {\n    if (!memcmp(find_ptr->ble_nv[find_index].peer_bleAddr, pBdAddr,\n                BLE_ADDR_SIZE)) {\n      ble_trace(2, \"%s FIND LTK IN NV SUCCESS %08x\", __func__,\n                (uint32_t)&find_ptr->ble_nv[find_index].LTK);\n      memcpy(ltk, find_ptr->ble_nv[find_index].LTK, BLE_LTK_SIZE);\n      return true;\n    }\n  }\n  return false;\n}\n\nbool nv_record_ble_record_Once_a_device_has_been_bonded(void) {\n  struct Ble_nvrecord *find_ptr;\n\n  find_ptr = (struct Ble_nvrecord *)nvrec_config_get_int(\n      nv_record_config.config, (const char *)section_name_ble_nvds,\n      (const char *)NV_RECORD_BLE_KEY, NVRAM_BLE_INVALID);\n  if (find_ptr == (struct Ble_nvrecord *)NVRAM_BLE_INVALID) {\n    return false;\n  }\n  for (uint8_t find_index = 0; find_index < find_ptr->saved_list_num;\n       find_index++) {\n    if (find_ptr->ble_nv[find_index].bonded == true) {\n      return true;\n    }\n  }\n  return false;\n}\n\nvoid nv_record_ble_delete_entry(uint8_t *pBdAddr) {\n  struct Ble_nvrecord *find_ptr;\n\n  find_ptr = (struct Ble_nvrecord *)nvrec_config_get_int(\n      nv_record_config.config, (const char *)section_name_ble_nvds,\n      (const char *)NV_RECORD_BLE_KEY, NVRAM_BLE_INVALID);\n\n  if (((struct Ble_nvrecord *)NVRAM_BLE_INVALID == find_ptr) ||\n      (0 == find_ptr->saved_list_num)) {\n    return;\n  }\n\n  int8_t indexToDelete = -1;\n\n  for (uint8_t find_index = 0; find_index < find_ptr->saved_list_num;\n       find_index++) {\n    if (!memcmp(find_ptr->ble_nv[find_index].peer_bleAddr, pBdAddr,\n                BLE_ADDR_SIZE)) {\n      indexToDelete = find_index;\n      break;\n    }\n  }\n\n  if (indexToDelete >= 0) {\n    uint8_t index;\n    for (index = indexToDelete; index < find_ptr->saved_list_num - 1; index++) {\n      memcpy(&(find_ptr->ble_nv[index]), &(find_ptr->ble_nv[index + 1]),\n             sizeof(BleDeviceinfo));\n    }\n\n    memset((uint8_t *)&(find_ptr->ble_nv[index]), 0, sizeof(BleDeviceinfo));\n    find_ptr->saved_list_num--;\n    nv_record_update_runtime_userdata();\n  }\n}\n#endif // !defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nvrecord/nvrecord_ble.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if !defined(NEW_NV_RECORD_ENABLED)\n\n#ifndef NVRECORD_BLE_H\n#define NVRECORD_BLE_H\n\n#define BLE_RECORD_NUM 5\n#define section_name_ble_nvds \"blenvds\"\n#define NV_RECORD_BLE_KEY \"ble_key\"\n#define NVRAM_BLE_INVALID (0xfae66666)\n\n#define BLE_ADDR_SIZE 6\n#define BLE_ENC_RANDOM_SIZE 8\n#define BLE_LTK_SIZE 16\n#define BLE_IRK_SIZE 16\n\n#define BLE_STATIC_ADDR 0\n#define BLE_RANDOM_ADDR 1\n\ntypedef struct _BleDeviceRecord {\n    uint8_t peer_bleAddr[BLE_ADDR_SIZE];\n    uint16_t EDIV;\n    uint8_t RANDOM[BLE_ENC_RANDOM_SIZE];\n    uint8_t LTK[BLE_LTK_SIZE];\n    uint8_t IRK[BLE_IRK_SIZE];\n    uint8_t bonded;\n\n} BleDeviceinfo;\n\nstruct Ble_nvrecord {\n    uint8_t loc_irk[BLE_IRK_SIZE];\n    uint8_t saved_list_num;\n    BleDeviceinfo ble_nv[BLE_RECORD_NUM];\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nint nv_record_blerec_add(const BleDeviceinfo *param_rec);\nbool nv_record_ble_record_find_ltk_through_static_bd_addr(uint8_t *pBdAddr, uint8_t *ltk);\nbool nv_record_ble_record_Once_a_device_has_been_bonded(void);\nvoid nv_record_ble_delete_entry(uint8_t *pBdAddr);\nuint8_t nv_record_ble_fill_irk(uint8_t *ltkToFill);\nvoid nv_record_blerec_init(void);\nvoid nv_record_blerec_get_local_irk(uint8_t *pIrk);\nbool nv_record_blerec_get_bd_addr_from_irk(uint8_t *pBdAddr, uint8_t *pIrk);\nvoid nv_record_tws_exchange_ble_info(void);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n\n#endif  // #if !defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nvrecord/nvrecord_dev.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef NVRECORD_DEV_H\n#define NVRECORD_DEV_H\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef struct\n{\n    unsigned char *btd_addr;\n    unsigned char *ble_addr;\n    const char *localname;\n\tconst char *ble_name;\n}dev_addr_name;\n\nbool nvrec_dev_data_open(void);\nbool nvrec_dev_localname_addr_init(dev_addr_name *dev);\nint nvrec_dev_force_get_btaddress(unsigned char *btd_addr);\nvoid nvrec_dev_flash_flush(unsigned char *mempool);\nvoid nvrec_dev_rand_btaddr_gen(uint8_t* bdaddr);\nvoid nvrec_dev_set_xtal_fcap(unsigned int xtal_fcap);\nint nvrec_dev_get_xtal_fcap(unsigned int *xtal_fcap);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "services/nvrecord/nvrecord_env.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if !defined(NEW_NV_RECORD_ENABLED)\n\n#include \"nvrecord_env.h\"\n#include \"customparam_section.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord.h\"\n#include \n\n#define NV_RECORD_ENV_KEY \"env_key\"\n\nextern nv_record_struct nv_record_config;\nstatic struct nvrecord_env_t *nvrecord_env_p = NULL;\n\nstatic int nv_record_env_new(void) {\n\n  nvrecord_env_p =\n      (struct nvrecord_env_t *)pool_malloc(sizeof(struct nvrecord_env_t));\n\n  if (!nvrecord_env_p) {\n    TRACE(1, \"%s pool_malloc failed \", __func__);\n    return -1;\n  }\n  nvrec_config_set_int(nv_record_config.config, section_name_other,\n                       (const char *)NV_RECORD_ENV_KEY, (int)nvrecord_env_p);\n\n  nvrecord_env_p->media_language.language = NVRAM_ENV_MEDIA_LANGUAGE_DEFAULT;\n  nvrecord_env_p->ibrt_mode.mode = NVRAM_ENV_TWS_MODE_DEFAULT;\n  nvrecord_env_p->ibrt_mode.tws_connect_success = 0;\n  nvrecord_env_p->factory_tester_status.status =\n      NVRAM_ENV_FACTORY_TESTER_STATUS_DEFAULT;\n\n  nvrecord_env_p->aiManagerInfo.voice_key_enable = false;\n  nvrecord_env_p->aiManagerInfo.setedCurrentAi = 0;\n  nvrecord_env_p->aiManagerInfo.aiStatusDisableFlag = 0;\n  nvrecord_env_p->aiManagerInfo.amaAssistantEnableStatus = 1;\n  // nv_record_update_runtime_userdata();\n\n  TRACE(2, \"%s nvrecord_env_p:0x%x\", __func__, (uint32_t)nvrecord_env_p);\n\n  return 0;\n}\n\nstatic int nv_record_env_rebuild(void) {\n  if (nv_record_config_rebuild() != BT_STS_SUCCESS)\n    return -1;\n\n  if (nv_record_env_new())\n    return -1;\n  nv_record_config.is_update = true;\n  nv_record_config.state = NV_STATE_IDLE;\n  nv_record_config.written_size = 0;\n  nv_record_flash_flush();\n\n  return 0;\n}\n\nint nv_record_env_init(void) {\n  int nRet = 0;\n  nv_record_open(section_usrdata_ddbrecord);\n\n  nv_custom_parameter_section_init();\n\n  nvrecord_env_p = (struct nvrecord_env_t *)nvrec_config_get_int(\n      nv_record_config.config, (const char *)section_name_other,\n      (const char *)NV_RECORD_ENV_KEY, NVRAM_ENV_INVALID);\n\n  if (nvrecord_env_p == (struct nvrecord_env_t *)NVRAM_ENV_INVALID) {\n    TRACE(0, \"NVRAM_ENV_INVALID !!\");\n    if (nv_record_env_rebuild() < 0)\n      nRet = -1;\n    else\n      TRACE(0, \"NVRAM REBUILD SUCCESS !!\");\n  }\n  TRACE(2, \"%s nvrecord_env_p: 0x%x\", __func__, (uint32_t)nvrecord_env_p);\n  return nRet;\n}\n\nint nv_record_env_get(struct nvrecord_env_t **nvrecord_env) {\n  if (!nvrecord_env)\n    return -1;\n\n  if (!nvrecord_env_p)\n    return -1;\n\n  *nvrecord_env = nvrecord_env_p;\n\n  return 0;\n}\n\nint nv_record_env_set(struct nvrecord_env_t *nvrecord_env) {\n  if (!nvrecord_env)\n    return -1;\n\n  if (!nvrecord_env_p)\n    return -1;\n\n  nv_record_update_runtime_userdata();\n\n  return 0;\n}\n\nvoid nv_record_update_factory_tester_status(uint32_t status) {\n  if (nvrecord_env_p) {\n    nvrecord_env_p->factory_tester_status.status = status;\n  }\n}\n\nvoid nv_record_update_ibrt_info(uint32_t newMode, bt_bdaddr_t *ibrtPeerAddr) {\n  if (nvrecord_env_p) {\n    TRACE(2, \"##%s,%d\", __func__, newMode);\n    nvrecord_env_p->ibrt_mode.mode = newMode;\n    nv_record_config.is_update = true;\n    memcpy(nvrecord_env_p->ibrt_mode.record.bdAddr.address,\n           ibrtPeerAddr->address, 6);\n  }\n}\n\n#endif // #if !defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nvrecord/nvrecord_env.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if !defined(NEW_NV_RECORD_ENABLED)\n\n#ifndef NVRECORD_ENV_H\n#define NVRECORD_ENV_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#include \"me_api.h\"\n\n#define NVRAM_ENV_INVALID (0xdead0000)\n#define NVRAM_ENV_MEDIA_LANGUAGE_DEFAULT (0)\n#define NVRAM_ENV_STREAM_VOLUME_A2DP_VOL_DEFAULT (AUDIO_OUTPUT_VOLUME_DEFAULT)\n#define NVRAM_ENV_STREAM_VOLUME_HFP_VOL_DEFAULT (AUDIO_OUTPUT_VOLUME_DEFAULT)\n#define NVRAM_ENV_TWS_MODE_DEFAULT (0xff)\n#define NVRAM_ENV_FACTORY_TESTER_STATUS_DEFAULT (0xaabbccdd)\n#define NVRAM_ENV_FACTORY_TESTER_STATUS_TEST_PASS (0xffffaa55)\n\nstruct media_language_t\n{\n    int8_t language;\n};\n\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\nstruct src_snk_t\n{\n    int8_t src_snk_mode;\n};\n#endif\n\nstruct ibrt_mode_t\n{\n    uint32_t mode;\n    btif_device_record_t record;\n    bool    tws_connect_success;\n};\nstruct factory_tester_status_t\n{\n    uint32_t status;\n};\n\ntypedef struct\n{\n    bool     voice_key_enable;\n    uint8_t  setedCurrentAi;\n    uint8_t  currentAiSpec;\n    uint8_t  aiStatusDisableFlag;\n    uint8_t  amaAssistantEnableStatus; //one bit for one AI assistant\n} AI_MANAGER_INFO_T;\n\nstruct nvrecord_env_t\n{\n    struct media_language_t media_language;\n#if defined(APP_LINEIN_A2DP_SOURCE)||defined(APP_I2S_A2DP_SOURCE)\n    struct src_snk_t src_snk_flag;\n#endif\n    struct ibrt_mode_t ibrt_mode;\n    struct factory_tester_status_t factory_tester_status;\n\n    uint8_t  flag_value[8];\n    AI_MANAGER_INFO_T   aiManagerInfo;\n};\n\nint nv_record_env_init(void);\n\nint nv_record_env_get(struct nvrecord_env_t **nvrecord_env);\n\nint nv_record_env_set(struct nvrecord_env_t *nvrecord_env);\n\nvoid nv_record_update_ibrt_info(uint32_t newMode,bt_bdaddr_t *ibrtPeerAddr);\n\nvoid nv_record_update_factory_tester_status(uint32_t status);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n\n#endif // #if !defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nvrecord/nvrecord_fp_account_key.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if !defined(NEW_NV_RECORD_ENABLED)\n\n#include \"nvrecord_fp_account_key.h\"\n#include \"co_math.h\"\n#include \"hal_trace.h\"\n#include \"nvrecord.h\"\n#include \n\nextern nv_record_struct nv_record_config;\nstatic NV_FP_ACCOUNT_KEY_RECORD_T *nvrecord_fp_account_key_p = NULL;\n\nNV_FP_ACCOUNT_KEY_RECORD_T *nv_record_get_fp_data_structure_info(void) {\n  return nvrecord_fp_account_key_p;\n}\n\nvoid nv_record_update_fp_data_structure(NV_FP_ACCOUNT_KEY_RECORD_T *pFpData) {\n  if (!memcmp((uint8_t *)pFpData, (uint8_t *)nvrecord_fp_account_key_p,\n              sizeof(NV_FP_ACCOUNT_KEY_RECORD_T))) {\n    // the updated fp data is the same as the local content, do nothing\n\n  } else {\n    TRACE(0, \"Fast pair non-volatile data needs to be updated to aligned with \"\n             \"peer device.\");\n    *nvrecord_fp_account_key_p = *pFpData;\n    nv_record_update_runtime_userdata();\n  }\n}\n\nvoid nv_record_fp_account_key_init(void) {\n  if (NULL == nvrecord_fp_account_key_p) {\n    nvrecord_fp_account_key_p =\n        (NV_FP_ACCOUNT_KEY_RECORD_T *)nvrec_config_get_int(\n            nv_record_config.config, (const char *)section_name_fp_account_key,\n            (const char *)NV_RECORD_ACCOUNT_KEY, NVRAM_ACCOUNT_KEY_INVALID);\n  }\n\n  if ((NV_FP_ACCOUNT_KEY_RECORD_T *)NVRAM_ACCOUNT_KEY_INVALID ==\n      nvrecord_fp_account_key_p) {\n    nvrecord_fp_account_key_p = (NV_FP_ACCOUNT_KEY_RECORD_T *)pool_malloc(\n        sizeof(NV_FP_ACCOUNT_KEY_RECORD_T));\n    if (!nvrecord_fp_account_key_p) {\n      ASSERT(0, \"%s pool_malloc failed\", __func__);\n      return;\n    }\n\n    memset(nvrecord_fp_account_key_p, 0, sizeof(NV_FP_ACCOUNT_KEY_RECORD_T));\n\n    nvrec_config_set_int(nv_record_config.config, section_name_fp_account_key,\n                         (const char *)NV_RECORD_ACCOUNT_KEY,\n                         (int)nvrecord_fp_account_key_p);\n  }\n}\n\nvoid nv_record_fp_account_key_add(NV_FP_ACCOUNT_KEY_ENTRY_T *param_rec) {\n  TRACE(0, \"Add account key:\");\n  DUMP8(\"%02x \", param_rec->key, sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n  if (FP_ACCOUNT_KEY_RECORD_NUM == nvrecord_fp_account_key_p->key_count) {\n    // discard the earliest key\n    memmove((uint8_t *)&(nvrecord_fp_account_key_p->accountKey[0]),\n            (uint8_t *)&(nvrecord_fp_account_key_p->accountKey[1]),\n            (FP_ACCOUNT_KEY_RECORD_NUM - 1) *\n                sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n    nvrecord_fp_account_key_p->key_count--;\n  }\n\n  memcpy((uint8_t *)&(nvrecord_fp_account_key_p\n                          ->accountKey[nvrecord_fp_account_key_p->key_count]),\n         param_rec, sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n  nvrecord_fp_account_key_p->key_count++;\n\n  nv_record_update_runtime_userdata();\n}\n\nvoid nv_record_fp_account_info_reset(void) {\n  uint8_t size = nv_record_fp_account_key_count();\n  for (uint8_t i = 0; i < size; i++) {\n    memset((uint8_t *)&(nvrecord_fp_account_key_p->accountKey[i]), 0,\n           sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n  }\n  nvrecord_fp_account_key_p->key_count = 0;\n\n  nv_record_fp_update_name(NULL, 0);\n}\n\nvoid nv_record_fp_account_key_delete(void) {\n  nv_record_fp_account_info_reset();\n}\n\nbool nv_record_fp_account_key_get_by_index(uint8_t index, uint8_t *outputKey) {\n  if (nvrecord_fp_account_key_p->key_count < (index + 1)) {\n    return false;\n  }\n\n  memcpy(outputKey, (uint8_t *)&(nvrecord_fp_account_key_p->accountKey[index]),\n         sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n  TRACE(1, \"Get account key %d as:\", index);\n  DUMP8(\"%02x \", outputKey, sizeof(NV_FP_ACCOUNT_KEY_ENTRY_T));\n\n  return true;\n}\n\nuint8_t nv_record_fp_account_key_count(void) {\n  return nvrecord_fp_account_key_p->key_count;\n}\n\nvoid nv_record_fp_update_name(uint8_t *ptrName, uint32_t nameLen) {\n  TRACE(1, \"update name len %d\", nameLen);\n\n  memset(nvrecord_fp_account_key_p->name, 0, FP_MAX_NAME_LEN);\n  if (nameLen > 0) {\n    DUMP8(\"0x%02x \", ptrName, nameLen);\n    memcpy(nvrecord_fp_account_key_p->name, ptrName, nameLen);\n  }\n  nvrecord_fp_account_key_p->nameLen = nameLen;\n  nv_record_update_runtime_userdata();\n}\n\nuint8_t *nv_record_fp_get_name_ptr(uint32_t *ptrNameLen) {\n  *ptrNameLen = nvrecord_fp_account_key_p->nameLen;\n  return nvrecord_fp_account_key_p->name;\n}\n#endif //#if !defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/nvrecord/nvrecord_fp_account_key.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#if !defined(NEW_NV_RECORD_ENABLED)\n\n#ifndef __NVRECORD_FP_ACCOUNT_KEY_H__\n#define __NVRECORD_FP_ACCOUNT_KEY_H__\n\n#define FP_ACCOUNT_KEY_RECORD_NUM             5\n#define section_name_fp_account_key           \"fpaccountkey\"\n#define NV_RECORD_ACCOUNT_KEY                  \"account_key\"\n#define NVRAM_ACCOUNT_KEY_INVALID             (0xFFFFFFFF)\n\n#define FP_ACCOUNT_KEY_SIZE                 16\n#define FP_MAX_NAME_LEN                     64\n\ntypedef struct\n{\n    uint8_t key[FP_ACCOUNT_KEY_SIZE];\n\n} NV_FP_ACCOUNT_KEY_ENTRY_T;\n\ntypedef struct\n{\n    uint8_t                     key_count;\n    NV_FP_ACCOUNT_KEY_ENTRY_T   accountKey[FP_ACCOUNT_KEY_RECORD_NUM];\n    uint16_t                    nameLen;\n    uint8_t                     name[FP_MAX_NAME_LEN];\n} NV_FP_ACCOUNT_KEY_RECORD_T;\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid nv_record_fp_account_key_add(NV_FP_ACCOUNT_KEY_ENTRY_T* param_rec);\nvoid nv_record_fp_account_key_delete();\nvoid nv_record_fp_account_key_init(void);\nbool nv_record_fp_account_key_get_by_index(uint8_t index, uint8_t* outputKey);\nuint8_t nv_record_fp_account_key_count(void);\nvoid nv_record_fp_update_name(uint8_t* ptrName, uint32_t nameLen);\nuint8_t* nv_record_fp_get_name_ptr(uint32_t* ptrNameLen);\nNV_FP_ACCOUNT_KEY_RECORD_T* nv_record_get_fp_data_structure_info(void);\nvoid nv_record_update_fp_data_structure(NV_FP_ACCOUNT_KEY_RECORD_T* pFpData);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n#endif // #if !defined(NEW_NV_RECORD_ENABLED)\n"
  },
  {
    "path": "services/osif/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y += \\\n\t-Iservices/nvrecord \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iutils/heap \\\n\n"
  },
  {
    "path": "services/osif/ddbif.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __DDBIF_H__\n#define __DDBIF_H__\n\n#include \"bluetooth.h\"\n#include \"me_api.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid ddbif_list_saved_flash(void);\n\nbt_status_t ddbif_close(void);\n\nbt_status_t ddbif_add_record(btif_device_record_t *record);\n\nbt_status_t ddbif_open(const bt_bdaddr_t *bdAddr);\n\nbt_status_t ddbif_find_record(const bt_bdaddr_t *bdAddr, btif_device_record_t *record);\n\nbt_status_t ddbif_delete_record(const bt_bdaddr_t *bdAddr);\n\nbt_status_t ddbif_enum_device_records(I16 index, btif_device_record_t *record);\n\n#ifdef __cplusplus\n}\n#endif\n#endif /*__DDBIF_H__*/\n\n"
  },
  {
    "path": "services/osif/ddbif_bes.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \n#include \n#include \n\n#include \"bluetooth.h\"\n#include \"hal_trace.h\"\n#include \"me_api.h\"\n\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"nvrecord.h\"\n\n// static int DDB_Print_Node(BtDeviceRecord* record)\n//{\n//    nvrec_trace(0,\"record_bdAddr = \");\n//    OS_DUMP8(\"%x \",record->bdAddr.addr,sizeof(record->bdAddr.addr));\n//    nvrec_trace(0,\"record_trusted = \");\n//    OS_DUMP8(\"%d \",&record->trusted,sizeof((uint8_t)record->trusted));\n//    nvrec_trace(0,\"record_linkKey = \");\n//    OS_DUMP8(\"%x \",record->linkKey,sizeof(record->linkKey));\n//    nvrec_trace(0,\"record_keyType = \");\n//    OS_DUMP8(\"%x \",&record->keyType,sizeof(record->keyType));\n//    nvrec_trace(0,\"record_pinLen = \");\n//    OS_DUMP8(\"%x \",&record->pinLen,sizeof(record->pinLen));\n//    return 1;\n//}\n\nvoid ddbif_list_saved_flash(void) { nv_record_flash_flush(); }\n\nbt_status_t ddbif_close(void) {\n  ddbif_list_saved_flash();\n  return BT_STS_SUCCESS;\n}\n\nbt_status_t ddbif_add_record(btif_device_record_t *record) {\n  return nv_record_add(section_usrdata_ddbrecord, (void *)record);\n}\n\nbt_status_t ddbif_open(const bt_bdaddr_t *bdAddr) {\n  bt_status_t status = BT_STS_FAILED;\n  status = nv_record_open(section_usrdata_ddbrecord);\n\n  return status;\n}\n\nbt_status_t ddbif_find_record(const bt_bdaddr_t *bdAddr,\n                              btif_device_record_t *record) {\n  return nv_record_ddbrec_find(bdAddr, record);\n}\n\nbt_status_t ddbif_delete_record(const bt_bdaddr_t *bdAddr) {\n  return nv_record_ddbrec_delete(bdAddr);\n}\n\nbt_status_t ddbif_enum_device_records(I16 index, btif_device_record_t *record) {\n  return nv_record_enum_dev_records((unsigned short)index, record);\n}\n"
  },
  {
    "path": "services/osif/osif.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __OSIF_H__\n#define __OSIF_H__\n#include \n\ntypedef uint32_t osif_timer_t;\n\ntypedef void (*osif_timer_callback)(void);\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nbool osif_init(void);\n\nuint32_t osif_get_sys_time(void);\n\nuint16_t osif_rand(void);\n\nvoid osif_stop_hardware(void);\n\nvoid osif_resume_hardware(void);\n\nvoid osif_memcopy(uint8_t *dest, const uint8_t *source, uint32_t numBytes);\n\nbool osif_memcmp(const uint8_t *buffer1, uint16_t len1, const uint8_t *buffer2, uint16_t len2);\n\nvoid osif_memset(uint8_t *dest, uint8_t byte, uint32_t len);\n\nuint8_t osif_strcmp(const char *Str1, const char *Str2);\n\nuint16_t osif_strlen(const char *Str);\n\nvoid osif_assert(const char *expression, const char *file, uint16_t line);\n\nvoid osif_lock_stack(void);\n\nvoid osif_unlock_stack(void);\n\nvoid osif_notify_evm(void);\n\nvoid osif_start_timer(osif_timer_t t, osif_timer_callback func);\n\nvoid osif_cancel_timer(void);\n\nuint8_t osif_lock_is_exist(void);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /*__OSIF_H__*/\n\n"
  },
  {
    "path": "services/osif/osif_rtx.c",
    "content": "\n/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"osif.h\"\n#include \n#include \n#include \n\nextern osMessageQId evm_queue_id;\nstatic void __timer_wrapper_callback(void const *n);\n\nstatic osif_timer_callback __timer_wrapper_notify_func = NULL;\nstatic osTimerId __timer_wrapper_id = NULL;\nosTimerDef(__timer_wrapper__, __timer_wrapper_callback);\n\nosMutexId __mutex_wrapper_id = NULL;\nosMutexDef(__mutex_wrapper);\n\nosMutexId __mutex_stophardware_id = NULL;\nosMutexDef(__mutex_stophardware);\n\nbool osif_init(void) {\n  if (__mutex_wrapper_id == NULL)\n    __mutex_wrapper_id = osMutexCreate((osMutex(__mutex_wrapper)));\n\n  if (__mutex_stophardware_id == NULL)\n    __mutex_stophardware_id = osMutexCreate((osMutex(__mutex_stophardware)));\n\n  if (__timer_wrapper_id == NULL)\n    __timer_wrapper_id =\n        osTimerCreate(osTimer(__timer_wrapper__), osTimerOnce, (void *)0);\n\n  return true;\n}\n\nuint32_t osif_get_sys_time(void) { return hal_sys_timer_get(); }\n\nuint16_t osif_rand(void) { return rand(); }\n\nvoid osif_stop_hardware(void) {\n  osMutexWait(__mutex_stophardware_id, osWaitForever);\n}\n\nvoid osif_resume_hardware(void) { osMutexRelease(__mutex_stophardware_id); }\n\nvoid osif_memcopy(uint8_t *dest, const uint8_t *source, uint32_t numBytes) {\n  memcpy(dest, source, numBytes);\n}\n\nbool osif_memcmp(const uint8_t *buffer1, uint16_t len1, const uint8_t *buffer2,\n                 uint16_t len2) {\n  int r = 0;\n  r = memcmp(buffer1, buffer2, len1 > len2 ? len2 : len1);\n  return (r == 0 ? 1 : 0);\n}\n\nvoid osif_memset(uint8_t *dest, uint8_t byte, uint32_t len) {\n  memset(dest, byte, len);\n}\n\nuint8_t osif_strcmp(const char *Str1, const char *Str2) {\n  int r = 0;\n  r = strcmp(Str1, Str2);\n  return (r == 0 ? 0 : 1);\n}\n\nuint16_t osif_strlen(const char *Str) { return strlen(Str); }\n\nvoid osif_assert(const char *expression, const char *file, uint16_t line) {\n  ASSERT(0, \"OS_Assert exp: %s, func: %s, line %d\\r\\n\", expression, file, line);\n  while (1)\n    ;\n}\nextern void OS_LockStack_Info_Print(void);\nvoid osif_lock_stack(void) {\n  osThreadId request = 0;\n#if (osCMSIS < 0x20000U)\n  osThreadId hold = 0;\n#endif\n  unsigned int t = 0;\n  osStatus status;\n  bool success;\n\n  if (NULL == __mutex_wrapper_id)\n    return;\n\n  request = osThreadGetId();\n#if (osCMSIS < 0x20000U)\n  hold = osMutexGetOwner(__mutex_wrapper_id);\n#endif\n  t = hal_sys_timer_get();\n  status = osMutexWait(__mutex_wrapper_id, 8000);\n  t = TICKS_TO_MS(hal_sys_timer_get() - t);\n\n  if ((t > 10) || (status != osOK)) {\n    TRACE(2, \"stack lock wait %d ms, status=0x%x\", t, status);\n    TRACE(1, \"request thread=%p\", request);\n#if (osCMSIS < 0x20000U)\n    TRACE(1, \"hold thread=%p\", hold);\n#endif\n  }\n\n  success = (status == osOK);\n  if (!success) {\n    TRACE(1, \"request thread=%p\", request);\n#if (osCMSIS < 0x20000U)\n    osThreadShow(request);\n    TRACE(1, \"hold thread=%p\", hold);\n    osThreadShow(hold);\n#endif\n    OS_LockStack_Info_Print();\n    ASSERT(0, \"cannot lock stack %d\\n\", status);\n    return;\n  }\n}\n\nvoid osif_unlock_stack(void) {\n  if (NULL == __mutex_wrapper_id)\n    return;\n\n  osMutexRelease(__mutex_wrapper_id);\n}\n\nextern uint32_t rt_mbx_check(void *mailbox);\n\nvoid osif_notify_evm(void) {\n  if (osMessageGetSpace(evm_queue_id) > 5) {\n    osMessagePut(evm_queue_id, 0xFF, 0);\n  }\n}\n\nstatic void __timer_wrapper_callback(void const *n) {\n  if (__timer_wrapper_notify_func)\n    __timer_wrapper_notify_func();\n}\n\nvoid osif_start_timer(osif_timer_t t, osif_timer_callback func) {\n  __timer_wrapper_notify_func = func;\n\n  osTimerStart(__timer_wrapper_id, (t >> 4) + 0x5);\n}\n\nvoid osif_cancel_timer(void) { osTimerStop(__timer_wrapper_id); }\n\nuint8_t osif_lock_is_exist(void) {\n  if (NULL == __mutex_wrapper_id)\n    return 0;\n  else\n    return 1;\n}\n"
  },
  {
    "path": "services/ota/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nsubdir-ccflags-y += \\\n    -Iplatform/drivers/ana \\\n    -Iplatform/hal \\\n    -Iservices/bluedroid/adapter/src \\\n    -Iapps/key \\\n    -Iservices/audio_eq \\\n    -Iservices/fs/fat \\\n    -Iservices/fs/sd \\\n    -Iservices/fs/fat/ChaN \\\n    $(BT_IF_INCLUDES) \\\n    -Iservices/overlay \\\n    -Iservices/nvrecord \\\n    -Iservices/nv_section/factory_section \\\n    -Iservices/resources \\\n    -Iplatform/drivers/uarthci \\\n    -Iplatform/drivers/ana \\\n    -Iplatform/drivers/bt \\\n    -Iplatform/drivers/main \\\n    -Iplatform/drivers/norflash \\\n    -Iutils/cqueue \\\n    -Iutils/heap \\\n    -Iutils/retention_ram \\\n    -Iservices/audioflinger \\\n    -Iutils/lockcqueue \\\n    -Iutils/hwtimer_list/ \\\n    -Iutils/intersyshci \\\n    -Iutils/boot_struct \\\n    -Iapps/main \\\n    -Iapps/common \\\n    -Iapps/audioplayers \\\n    -Iapps/factory \\\n    -Iapps/ota \\\n    -Iservices/ble_app \\\n    -Iservices/ble_stack/ble_ip \\\n    -Iservices/ble_stack/hl/api \\\n    -Iservices/ble_stack/app/api/ \\\n    -Iservices/ble_stack/common/api/ \\\n    -Iservices/ble_stack/hl/inc/ \\\n    -Iservices/ble_stack/ke/api \\\n    -Iservices/bridge/ \\\n    -Iservices/ble_stack/hl/src/gap/ \\\n    -Iservices/ble_stack/hl/src/gap/gapc/ \\\n    -Iservices/ble_stack/hl/src/gap/gapm/ \\\n    -Iservices/ble_stack/hl/src/gap/smpc/ \\\n    -Iservices/ble_stack/ke/src/ \\\n    -Iservices/ble_stack/hl/src/gatt/attc/ \\\n    -Iservices/ble_stack/hl/src/gatt/attm/ \\\n    -Iservices/ble_stack/hl/src/gatt/atts/ \\\n    -Iservices/ble_stack/hl/src/gatt/gattc/ \\\n    -Iservices/ble_stack/hl/src/gatt/gattm/ \\\n    -Iservices/ble_stack/hl/src/gatt/ \\\n    -Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n    -Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n    -Iservices/ble_stack/hci/api/ \\\n    -Iservices/ble_stack/hci/src/ \\\n    -Iservices/ble_stack/app/src/ \\\n    -Iservices/ble_profiles/htp/htpt/api/ \\\n    -Iservices/ble_profiles/htp/htpt/src/ \\\n    -Iservices/ble_profiles/htp/ \\\n    -Iservices/ble_profiles/datapath/datapathps/api/ \\\n    -Iservices/ble_app/app_main/ \\\n    -Iservices/ble_app/app_htp/ \\\n    -Iservices/ble_app/app_datapath/ \\\n    -Iservices/bt_app \\\n    -Iservices/bt_app/a2dp_codecs/include \\\n    -Iservices/ble_app/app_vob \\\n    -Iservices/multimedia/speech/codec/codecs/adpcm \\\n    -Iservices/ble_app/app_smartvoice \\\n    -Iservices/ble_profiles/smartvoice \\\n    -Iservices/anc_spp_tool \\\n    -Iutils/crc32 \\\n    -Ithirdparty/userapi \\\n    -Iservices/multimedia/audio/codec/sbc/inc \\\n    -Iservices/multimedia/audio/codec/sbc/src/inc \\\n    -Iservices/app_tws/inc \\\n    -Iservices/app_ibrt/inc \\\n    -Iservices/ibrt_core/inc \\\n    -Iservices/ibrt_ui/inc \\\n    -Iservices/norflash_api\n"
  },
  {
    "path": "services/ota/ota_common.cpp",
    "content": "/**\n * @file ota_common.cpp\n * @author BES AI team\n * @version 0.1\n * @date 2020-04-17\n *\n * @copyright Copyright (c) 2015-2020 BES Technic.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n */\n\n/*****************************header include********************************/\n#include \"ota_common.h\"\n#include \"app.h\"\n#include \"app_bt.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"cmsis.h\"\n#include \"crc32.h\"\n#include \"hal_timer.h\"\n#include \"norflash_api.h\"\n#include \"norflash_drv.h\"\n#include \"nvrecord_ota.h\"\n#include \"ota_dbg.h\"\n#include \"string.h\"\n\n#ifdef IBRT\n#include \"app_ibrt_if.h\"\n#include \"app_ibrt_ota_cmd.h\"\n#include \"app_ibrt_ui.h\"\n#include \"app_tws_ctrl_thread.h\"\n#include \"app_tws_ibrt.h\"\n#include \"app_tws_if.h\"\n#endif\n\n/*********************external function declearation************************/\n\n/************************private macro defination***************************/\n#define OTA_BOOT_INFO_FLASH_OFFSET 0x1000\n#define OTA_BREAKPOINT_STORE_GRANULARITY (256 * 1024) // must be 4KB aligned\n#define LEN_OF_IMAGE_TAIL_TO_FIND_SANITY_CRC 512\n#define INVALID_VERSION_STR \"BESTECHNIC\"\n\n#define NORFLASH_API_MODE_ASYNC true\n#define OTA_DEFAULT_NORFLASH_API_MODE NORFLASH_API_MODE_ASYNC\n\n#define CASES(prefix, item)                                                    \\\n  case prefix##item:                                                           \\\n    str = #item;                                                               \\\n    break;\n\n/************************private type defination****************************/\n\n/**********************private function declearation************************/\n\n/************************private variable defination************************/\n__attribute__((unused)) static const char *imageSanityKeyWord =\n    \"CRC32_OF_IMAGE=0x\";\n__attribute__((unused)) static const char *oldImageSanityKeyWord =\n    \"CRC32_OF_IMAGE=\";\n\n#ifdef IBRT\nstatic void _ota_tws_thread(const void *arg);\nosThreadDef(_ota_tws_thread, osPriorityNormal, 1, 1024, \"ota_tws\");\n\nstatic osEvent evt;\n\n/// tws relay OTA command/data TX thread ID\nosThreadId txThreadId = NULL;\n\n/// tws relay OTA command/data RX thread ID\nosThreadId rxThreadId;\n\nosMutexDef(twsTxQueueMutex);\nosMutexDef(twsRxQueueMutex);\n\n/// tws relay data TX queue mutex\nosMutexId txQueueMutexID = NULL;\n\n/// tws relay data RX queue mutex\nosMutexId rxQueueMutexID = NULL;\n\nuint8_t relayBuf[TWS_RELAY_DATA_MAX_SIZE];\n#endif\n\nOTA_COMMON_ENV_T otaEnv;\n\n/****************************function defination****************************/\n\n/**\n * @brief Convert OTA command to string\n *\n * @param cmd           @see OTA_COMMAND_E\n * @return char*        string of OTA_COMMAND\n */\nstatic char *_cmd2str(OTA_COMMAND_E cmd) {\n  const char *str = NULL;\n\n  switch (cmd) {\n    CASES(OTA_COMMAND_, BEGIN);\n    CASES(OTA_COMMAND_, APPLY);\n    CASES(OTA_COMMAND_, DATA);\n    CASES(OTA_COMMAND_, ABORT);\n#ifdef IBRT\n    CASES(OTA_COMMAND_, RSP);\n#endif\n    // CASES(OTA_COMMAND_, );\n\n  default:\n    str = \"INVALID\";\n    break;\n  }\n\n  return (char *)str;\n}\n\n/**\n * @brief Convert OTA user to string\n *\n * @param user          @see OTA_USER_E\n * @return char*        OTA_USER string\n */\nstatic char *_user2str(OTA_USER_E user) {\n  const char *str = NULL;\n\n  switch (user) {\n    CASES(OTA_USER_, BES);\n    CASES(OTA_USER_, COLORFUL);\n    CASES(OTA_USER_, RED);\n    CASES(OTA_USER_, ORANGE);\n    CASES(OTA_USER_, GREEN);\n    // CASES(OTA_USER_, );\n\n  default:\n    str = \"INVALID\";\n    break;\n  }\n\n  return (char *)str;\n}\n\n/**\n * @brief Convert OTA path into string\n *\n * @param path          @see OTA_PATH_E\n * @return char*        OTA_PATH string\n */\nstatic char *_path2str(OTA_PATH_E path) {\n  const char *str = NULL;\n\n  switch (path) {\n    CASES(OTA_PATH_, BT);\n    CASES(OTA_PATH_, BLE);\n    // CASES(OTA_PATH_, );\n\n  default:\n    str = \"INVALID\";\n    break;\n  }\n\n  return (char *)str;\n}\n\n/**\n * @brief Convert OTA stage into string\n *\n * @param stage         @see OTA_STAGE_E\n * @return char*        OTA_STAGE string\n */\nstatic char *_stage2str(OTA_STAGE_E stage) {\n  const char *str = NULL;\n\n  switch (stage) {\n    CASES(OTA_STAGE_, IDLE);\n    CASES(OTA_STAGE_, ONGOING);\n    CASES(OTA_STAGE_, DONE);\n    // CASES(OTA_STAGE_, );\n\n  default:\n    str = \"INVALID\";\n    break;\n  }\n\n  return (char *)str;\n}\n\nstatic char *_sts2str(OTA_STATUS_E sts) {\n  const char *str = NULL;\n\n  switch (sts) {\n    CASES(OTA_STATUS_, OK);\n    CASES(OTA_STATUS_, ERROR);\n    CASES(OTA_STATUS_, ERROR_RELAY_TIMEOUT);\n    CASES(OTA_STATUS_, ERROR_CHECKSUM);\n    CASES(OTA_STATUS_, ERROR_NOT_ALLOWED);\n    // CASES(OTA_STATUS_, );\n\n  default:\n    str = \"INVALID\";\n    break;\n  }\n\n  return (char *)str;\n}\n\n/**\n * @brief Find key word in upgrade data.\n *\n * This function is used to find out the key word at the end of upgrade data,\n * these key words are generated by python script by calculate the crc of whole\n * upgrade image and write the result at the end of the image in string format.\n * This is used to do sanity check.\n *\n * @param tgtArray      source array to search the key word\n * @param tgtArrayLen   source array length\n * @param keyArray      key word array\n * @param keyArrayLen   key word length\n * @return int32_t      index of the key word in dstArry\n */\n__attribute__((unused)) static int32_t _find_key_word(uint8_t *tgtArray,\n                                                      uint32_t tgtArrayLen,\n                                                      uint8_t *keyArray,\n                                                      uint32_t keyArrayLen) {\n  if ((keyArrayLen > 0) && (tgtArrayLen >= keyArrayLen)) {\n    uint32_t index = 0, targetIndex = 0;\n    for (targetIndex = 0; targetIndex < tgtArrayLen; targetIndex++) {\n      for (index = 0; index < keyArrayLen; index++) {\n        if (tgtArray[targetIndex + index] != keyArray[index]) {\n          break;\n        }\n      }\n\n      if (index == keyArrayLen) {\n        return targetIndex;\n      }\n    }\n\n    return -1;\n  } else {\n    return -1;\n  }\n}\n\n/**\n * @brief Convert ASCII code into hex format.\n *\n * @param asciiCode     ASCII code to convert\n * @return uint8_t      convert result\n */\n__attribute__((unused)) static uint8_t _ascii2hex(uint8_t asciiCode) {\n  if ((asciiCode >= '0') && (asciiCode <= '9')) {\n    return asciiCode - '0';\n  } else if ((asciiCode >= 'a') && (asciiCode <= 'f')) {\n    return asciiCode - 'a' + 10;\n  } else if ((asciiCode >= 'A') && (asciiCode <= 'F')) {\n    return asciiCode - 'A' + 10;\n  } else {\n    return 0xff;\n  }\n}\n\n/**\n * @brief Update the stage of OTA progress.\n *\n * @param stage         OTA stage to update,\n *                      @see OTA_STAGE_E to get more details.\n */\nstatic void _set_ota_stage(OTA_STAGE_E stage) {\n  LOG_D(\"stage update:%s->%s\", _stage2str(otaEnv.currentStage),\n        _stage2str(stage));\n\n  otaEnv.currentStage = stage;\n}\n\nstatic void _update_ota_user(OTA_USER_E user) {\n  ASSERT((OTA_USER_NUM == otaEnv.currentUser) || (OTA_USER_NUM == user),\n         \"try to set a ota user while the current user is not null\");\n\n  LOG_I(\"ota user update:%s->%s\", _user2str(otaEnv.currentUser),\n        _user2str(user));\n\n  otaEnv.currentUser = user;\n}\n\n/**\n * @brief Enter OTA state handler.\n *\n * This function is used to require the relative system resources to gurantee\n * the performance for both OTA progress and other functionalities\n *\n * @param path          Current OTA path,\n *                      @see OTA_PATH_E to get more details.\n */\nstatic void _enter_ota_state(OTA_PATH_E path) {\n  LOG_I(\"%s\", __func__);\n\n  if (otaEnv.isInOtaState) {\n    LOG_W(\"ALREADY in OTA state\");\n  } else {\n    /// 1. guarantee performance->switch to the highest freq\n    app_sysfreq_req(APP_SYSFREQ_USER_OTA, APP_SYSFREQ_104M);\n\n#ifdef IBRT\n    /// 2. guarantee performance->decrease the communication interval of TWS\n    /// connection\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    btdrv_reg_op_set_tws_link_duration(IBRT_TWS_LINK_LARGE_DURATION);\n    btdrv_reg_op_set_private_tws_poll_interval(\n        p_ibrt_ctrl->config.default_private_poll_interval,\n        p_ibrt_ctrl->config.default_private_poll_interval_in_sco);\n\n    /// 3. guarantee performance->exit bt sniff mode\n    app_ibrt_ui_judge_link_policy(OTA_START_TRIGGER, BTIF_BLP_DISABLE_ALL);\n\n    if (app_tws_ibrt_tws_link_connected() &&\n        (p_ibrt_ctrl->nv_role == IBRT_MASTER) &&\n        p_ibrt_ctrl->p_tws_remote_dev) {\n      btif_me_stop_sniff(p_ibrt_ctrl->p_tws_remote_dev);\n    }\n\n    app_ibrt_if_tws_sniff_block(15);\n#else\n    /// 3. guarantee performance->exit bt sniff mode\n    app_bt_active_mode_set(ACTIVE_MODE_KEEPER_OTA,\n                           UPDATE_ACTIVE_MODE_FOR_ALL_LINKS);\n#endif\n\n    /// update the OTA path\n    LOG_I(\"OTA path update:%s->%s\", _path2str(otaEnv.currentPath),\n          _path2str(path));\n    otaEnv.currentPath = path;\n\n    /// 4. guarantee performance->decrease the BLE connection interval\n#ifdef BLE_ENABLE\n    if (OTA_PATH_BLE == otaEnv.currentPath) {\n      app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_OTA, true);\n    }\n#endif\n  }\n}\n\n/**\n * @brief Exit the OTA state handler.\n *\n * This function is used to release the system resources which are required\n * when enter the OTA state\n *\n */\n__attribute__((unused)) static void _exit_ota_state(void) {\n  LOG_I(\"%s\", __func__);\n\n  if (otaEnv.isInOtaState) {\n#ifdef IBRT\n    app_ibrt_ui_judge_link_policy(OTA_STOP_TRIGGER, BTIF_BLP_SNIFF_MODE);\n#else\n    app_bt_active_mode_clear(ACTIVE_MODE_KEEPER_OTA,\n                             UPDATE_ACTIVE_MODE_FOR_ALL_LINKS);\n#endif\n\n    /// release the short TWS communication interval\n#ifdef IBRT\n    ibrt_ctrl_t *p_ibrt_ctrl = app_tws_ibrt_get_bt_ctrl_ctx();\n    btdrv_reg_op_set_tws_link_duration(IBRT_TWS_LINK_DEFAULT_DURATION);\n    btdrv_reg_op_set_private_tws_poll_interval(\n        p_ibrt_ctrl->config.long_private_poll_interval,\n        p_ibrt_ctrl->config.default_private_poll_interval_in_sco);\n#endif\n\n    /// release the short BLE connection interval\n#ifdef BLE_ENABLE\n    app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_OTA, false);\n    app_ble_update_conn_param_mode(BLE_CONN_PARAM_MODE_OTA_SLOWER, false);\n#endif\n\n    /// update the OTA path to invalid\n    otaEnv.currentPath = OTA_PATH_INVALID;\n\n    /// release the system frequency\n    app_sysfreq_req(APP_SYSFREQ_USER_OTA, APP_SYSFREQ_32K);\n\n    otaEnv.isInOtaState = false;\n  } else {\n    LOG_W(\"NOT in OTA STATE\");\n  }\n}\n\n#ifdef IBRT\n\n/**\n * @brief Do the sanity check for the upgrade file.\n *\n * Currently, this function uses the CRC that was inserted by the build process.\n * This CRC check does not verify the last x bytes of the image.  x varies\n * depending on order of the key/value pair order but is < 512 bytes.\n *\n * @return true         Sanity check success.\n * @return false        Sanity check failed.\n */\nstatic bool _image_sanity_check(void) {\n  // find the location of the CRC key word string\n  uint8_t *ptrOfTheLast4KImage =\n      (uint8_t *)(OTA_FLASH_LOGIC_ADDR + NEW_IMAGE_FLASH_OFFSET +\n                  otaEnv.totalImageSize - LEN_OF_IMAGE_TAIL_TO_FIND_SANITY_CRC);\n\n  uint32_t sanityCrc32;\n  uint32_t crc32ImageOffset;\n  int32_t sanity_crc_location =\n      _find_key_word(ptrOfTheLast4KImage, LEN_OF_IMAGE_TAIL_TO_FIND_SANITY_CRC,\n                     (uint8_t *)imageSanityKeyWord, strlen(imageSanityKeyWord));\n  if (-1 == sanity_crc_location) {\n    sanity_crc_location = _find_key_word(\n        ptrOfTheLast4KImage, LEN_OF_IMAGE_TAIL_TO_FIND_SANITY_CRC,\n        (uint8_t *)oldImageSanityKeyWord, strlen(oldImageSanityKeyWord));\n    if (-1 == sanity_crc_location) {\n      // if no sanity crc, fail the check\n      return false;\n    } else {\n      crc32ImageOffset = sanity_crc_location + otaEnv.totalImageSize -\n                         LEN_OF_IMAGE_TAIL_TO_FIND_SANITY_CRC +\n                         strlen(oldImageSanityKeyWord);\n      sanityCrc32 = *(uint32_t *)(OTA_FLASH_LOGIC_ADDR +\n                                  NEW_IMAGE_FLASH_OFFSET + crc32ImageOffset);\n    }\n  } else {\n    crc32ImageOffset = sanity_crc_location + otaEnv.totalImageSize -\n                       LEN_OF_IMAGE_TAIL_TO_FIND_SANITY_CRC +\n                       strlen(imageSanityKeyWord);\n\n    sanityCrc32 = 0;\n    uint8_t *crcString = (uint8_t *)(OTA_FLASH_LOGIC_ADDR +\n                                     NEW_IMAGE_FLASH_OFFSET + crc32ImageOffset);\n\n    for (uint8_t index = 0; index < 8; index++) {\n      sanityCrc32 |= (_ascii2hex(crcString[index]) << (28 - 4 * index));\n    }\n  }\n\n  LOG_D(\"Bytes to generate crc32 is %d\", crc32ImageOffset);\n  LOG_D(\"sanity_crc_location is %d\", sanity_crc_location);\n\n  LOG_D(\"sanityCrc32 is 0x%x\", sanityCrc32);\n\n  // generate the CRC from image data\n  uint32_t calculatedCrc32 = 0;\n  calculatedCrc32 =\n      crc32(calculatedCrc32,\n            (uint8_t *)(OTA_FLASH_LOGIC_ADDR + NEW_IMAGE_FLASH_OFFSET),\n            crc32ImageOffset);\n\n  LOG_D(\"calculatedCrc32 is 0x%x\", calculatedCrc32);\n\n  if (sanityCrc32 == calculatedCrc32) {\n    return true;\n  }\n\n  return false;\n}\n\nstatic enum NORFLASH_API_MODULE_ID_T\n_get_flash_module_from_ota_device(OTA_DEVICE_E device) {\n  enum NORFLASH_API_MODULE_ID_T mod = NORFLASH_API_MODULE_ID_COUNT;\n\n  switch (device) {\n  case OTA_DEVICE_APP:\n    mod = NORFLASH_API_MODULE_ID_OTA;\n    break;\n  case OTA_DEVICE_HOTWORD:\n    mod = NORFLASH_API_MODULE_ID_HOTWORD_MODEL;\n    break;\n\n  default:\n    ASSERT(0, \"invalid OTA device received in %s\", __func__);\n    break;\n  }\n\n  return mod;\n}\n\nstatic void _flush_data_to_flash(uint8_t *ptrSource, uint32_t lengthToBurn,\n                                 uint32_t offsetInFlashToProgram,\n                                 bool synWrite) {\n\n  LOG_D(\"flush %d bytes to flash offset 0x%x\", lengthToBurn,\n        offsetInFlashToProgram);\n  enum NORFLASH_API_MODULE_ID_T mod =\n      _get_flash_module_from_ota_device(otaEnv.deviceId);\n\n  uint32_t preBytes = (FLASH_SECTOR_SIZE_IN_BYTES -\n                       (offsetInFlashToProgram % FLASH_SECTOR_SIZE_IN_BYTES)) %\n                      FLASH_SECTOR_SIZE_IN_BYTES;\n\n  if (lengthToBurn < preBytes) {\n    preBytes = lengthToBurn;\n  }\n\n  uint32_t middleBytes = 0;\n  if (lengthToBurn > preBytes) {\n    middleBytes = ((lengthToBurn - preBytes) / FLASH_SECTOR_SIZE_IN_BYTES *\n                   FLASH_SECTOR_SIZE_IN_BYTES);\n  }\n\n  uint32_t postBytes = 0;\n  if (lengthToBurn > (preBytes + middleBytes)) {\n    postBytes =\n        (offsetInFlashToProgram + lengthToBurn) % FLASH_SECTOR_SIZE_IN_BYTES;\n  }\n\n  LOG_D(\"Prebytes is %d middlebytes is %d postbytes is %d\", preBytes,\n        middleBytes, postBytes);\n\n  if (preBytes > 0) {\n    app_flash_page_program(mod, offsetInFlashToProgram, ptrSource, preBytes,\n                           synWrite);\n\n    ptrSource += preBytes;\n    offsetInFlashToProgram += preBytes;\n  }\n\n  uint32_t sectorIndexInFlash =\n      offsetInFlashToProgram / FLASH_SECTOR_SIZE_IN_BYTES;\n\n  if (middleBytes > 0) {\n    uint32_t sectorCntToProgram = middleBytes / FLASH_SECTOR_SIZE_IN_BYTES;\n    for (uint32_t sector = 0; sector < sectorCntToProgram; sector++) {\n      app_flash_page_erase(mod,\n                           sectorIndexInFlash * FLASH_SECTOR_SIZE_IN_BYTES);\n      app_flash_page_program(mod,\n                             sectorIndexInFlash * FLASH_SECTOR_SIZE_IN_BYTES,\n                             ptrSource + sector * FLASH_SECTOR_SIZE_IN_BYTES,\n                             FLASH_SECTOR_SIZE_IN_BYTES, synWrite);\n\n      sectorIndexInFlash++;\n    }\n\n    ptrSource += middleBytes;\n  }\n\n  if (postBytes > 0) {\n    app_flash_page_erase(mod, sectorIndexInFlash * FLASH_SECTOR_SIZE_IN_BYTES);\n    app_flash_page_program(mod, sectorIndexInFlash * FLASH_SECTOR_SIZE_IN_BYTES,\n                           ptrSource, postBytes, synWrite);\n  }\n\n  app_flush_pending_flash_op(mod, NORFLASH_API_ALL);\n}\n\n/**\n * NOTE that this function is stil needed since the OTA bootloader uses the CRC\n * that is passed into it to re-verify the image and that CRC is for the entire\n * image.\n */\nstatic bool _compute_whole_image_crc(void) {\n  uint32_t processedDataSize = 0;\n  uint32_t crc32Value = 0;\n  uint32_t bytes_to_use = 0;\n  uint32_t lock;\n\n  while (processedDataSize < otaEnv.totalImageSize) {\n    if (otaEnv.totalImageSize - processedDataSize >\n        OTA_DATA_CACHE_BUFFER_SIZE) {\n      bytes_to_use = OTA_DATA_CACHE_BUFFER_SIZE;\n    } else {\n      bytes_to_use = otaEnv.totalImageSize - processedDataSize;\n    }\n\n    lock = int_lock_global();\n    norflash_sync_read(\n        NORFLASH_API_MODULE_ID_OTA,\n        (OTA_FLASH_LOGIC_ADDR + NEW_IMAGE_FLASH_OFFSET + processedDataSize),\n        otaEnv.dataCacheBuffer, OTA_DATA_CACHE_BUFFER_SIZE);\n    // memcpy(otaEnv.dataCacheBuffer, (uint8_t *)(OTA_FLASH_LOGIC_ADDR +\n    // NEW_IMAGE_FLASH_OFFSET + processedDataSize),\n    //    OTA_DATA_CACHE_BUFFER_SIZE);\n    int_unlock_global(lock);\n\n    if (0 == processedDataSize) {\n      if (*(uint32_t *)otaEnv.dataCacheBuffer != NORMAL_BOOT) {\n        LOG_D(\"first 32bit value is not NORMAL_BOOT\");\n        return false;\n      } else {\n        *(uint32_t *)otaEnv.dataCacheBuffer = 0xFFFFFFFF;\n      }\n    }\n\n    LOG_D(\"bytes to verify =%d.\", bytes_to_use);\n\n    crc32Value =\n        crc32(crc32Value, (uint8_t *)otaEnv.dataCacheBuffer, bytes_to_use);\n\n    processedDataSize += bytes_to_use;\n  }\n\n  LOG_D(\"Computed CRC32 is 0x%x.\", crc32Value);\n\n  /* This crc value will be passed to the ota app in GSoundOtaApply(). */\n  otaEnv.crc32OfImage = crc32Value;\n  return true;\n}\n\nstatic void _update_boot_info(OTA_BOOT_INFO_T *otaBootInfo) {\n  ASSERT(OTA_DEVICE_APP == otaEnv.deviceId,\n         \"illegal OTA device try to update boot info\");\n  hal_norflash_disable_protection(HAL_NORFLASH_ID_0);\n  enum NORFLASH_API_MODULE_ID_T mod =\n      _get_flash_module_from_ota_device(otaEnv.deviceId);\n  app_flash_page_erase(mod, OTA_BOOT_INFO_FLASH_OFFSET);\n  app_flash_page_program(mod, OTA_BOOT_INFO_FLASH_OFFSET,\n                         (uint8_t *)otaBootInfo, sizeof(OTA_BOOT_INFO_T), true);\n}\n\nstatic void _update_magic_number(uint32_t newMagicNumber) {\n  ASSERT(OTA_DEVICE_APP == otaEnv.deviceId,\n         \"illegal device %d to update magic number\", otaEnv.deviceId);\n  memcpy(otaEnv.dataCacheBuffer,\n         (uint8_t *)(OTA_FLASH_LOGIC_ADDR + otaEnv.newImageFlashOffset),\n         FLASH_SECTOR_SIZE_IN_BYTES);\n\n  *(uint32_t *)otaEnv.dataCacheBuffer = newMagicNumber;\n  enum NORFLASH_API_MODULE_ID_T mod =\n      _get_flash_module_from_ota_device(otaEnv.deviceId);\n  app_flash_page_erase(mod, otaEnv.newImageFlashOffset);\n\n  app_flash_page_program(mod, otaEnv.newImageFlashOffset,\n                         otaEnv.dataCacheBuffer, FLASH_SECTOR_SIZE_IN_BYTES,\n                         true);\n\n  app_flush_pending_flash_op(mod, NORFLASH_API_ALL);\n}\n\nstatic void _update_peer_result(OTA_STATUS_E ret) {\n  LOG_D(\"update peer result:%s->%s\", _sts2str(otaEnv.peerResult),\n        _sts2str(ret));\n\n  otaEnv.peerResult = ret;\n}\n\nOTA_STATUS_E ota_common_get_peer_result(void) { return otaEnv.peerResult; }\n\nstatic bool _relay_data_needed(void) {\n  bool ret = true;\n\n  if (!app_tws_ibrt_tws_link_connected()) {\n    ret = false;\n  }\n\n  if (OTA_STAGE_IDLE == otaEnv.currentStage) {\n    ret = false;\n  }\n\n  /// check the customized relay_data_needed permission\n  if (ret && otaEnv.customRelayNeededHandler) {\n    ret = otaEnv.customRelayNeededHandler();\n  }\n\n  return ret;\n}\n\nstatic void _ota_relay_data(OTA_COMMAND_E cmdType, const uint8_t *dataPtr,\n                            uint16_t length) {\n  uint8_t frameNum = 0;\n  uint16_t frameLen = 0;\n  OTA_TWS_DATA_T tCmd = {\n      cmdType,\n  };\n\n  ASSERT(length <= ARRAY_SIZE(tCmd.data), \"ILLEGAL relay packet length\");\n\n  /// split packet into servel frame to fulfill the max TWS data\n  /// transmission length requirement\n  if (length % OTA_TWS_PAYLOAD_MAX_LEN) {\n    frameNum = length / OTA_TWS_PAYLOAD_MAX_LEN + 1;\n  } else {\n    frameNum = length / OTA_TWS_PAYLOAD_MAX_LEN;\n  }\n\n  LOG_D(\"packet len:%d, splited frame num:%d\", length, frameNum);\n\n  /// push all data into queue\n  for (uint8_t i = 0; i < frameNum; i++) {\n    if ((i + 1) == frameNum) {\n      tCmd.magicCode = OTA_RELAY_PACKET_MAGIC_CODE_COMPLETE;\n      tCmd.length = length % OTA_TWS_PAYLOAD_MAX_LEN;\n    } else {\n      tCmd.magicCode = OTA_RELAY_PACKET_MAGIC_CODE_INCOMPLETE;\n      tCmd.length = OTA_TWS_PAYLOAD_MAX_LEN;\n    }\n\n    frameLen = OTA_TWS_HEAD_SIZE + tCmd.length;\n\n    memcpy(tCmd.data, dataPtr + i * OTA_TWS_PAYLOAD_MAX_LEN, tCmd.length);\n\n    osMutexWait(txQueueMutexID, osWaitForever);\n    ASSERT(CQ_OK == EnCQueue(&otaEnv.txQueue, (CQItemType *)&frameLen,\n                             sizeof(frameLen)),\n           \"%s failed to push data to queue\", __func__);\n    ASSERT(CQ_OK == EnCQueue(&otaEnv.txQueue, (CQItemType *)&tCmd, frameLen),\n           \"%s failed to push data to queue\", __func__);\n    osMutexRelease(txQueueMutexID);\n  }\n\n  /// inform tx thread to handle the data to be transmitted\n  osSignalSet(txThreadId, OTA_TWS_TX_SIGNAL);\n}\n\n/**\n * @brief Check the validity of received data frame.\n *\n * @param dataPtr       Pointer of received data\n * @param length        length of received data\n * @return true         Received data frame is valid\n * @return false        Received data frame is invalid\n */\nstatic bool _tws_frame_validity_check(uint8_t *dataPtr, uint32_t length) {\n  bool isValid = true;\n\n  OTA_TWS_DATA_T *otaTwsData = (OTA_TWS_DATA_T *)dataPtr;\n\n  ASSERT(TWS_RELAY_DATA_MAX_SIZE >= length,\n         \"received overloaded data packet!!!\");\n  if (OTA_RELAY_PACKET_MAGIC_CODE_INCOMPLETE == otaEnv.currentMagicCode &&\n      otaTwsData->cmdType != otaEnv.currentCmdType) {\n    ASSERT(0, \"bad frame is received!!!\");\n  }\n\n  if (length != otaTwsData->length + OTA_TWS_HEAD_SIZE) {\n    LOG_W(\"INVALID packet, dataLen:%d, expected dataLen:%d\", length,\n          otaTwsData->length + OTA_TWS_HEAD_SIZE);\n    isValid = false;\n  }\n\n  if (OTA_RELAY_PACKET_MAGIC_CODE_COMPLETE != otaTwsData->magicCode &&\n      OTA_RELAY_PACKET_MAGIC_CODE_INCOMPLETE != otaTwsData->magicCode) {\n    LOG_W(\"INVALID magic code:0x%08x\", otaTwsData->magicCode);\n    isValid = false;\n  }\n\n  return isValid;\n}\n\n/**\n * @brief Response the master for the OTA_COMMAND received.\n *\n * This function will response the master after a whole packet receiving is\n * done.\n *\n * @param status        Status of receiving TWS relay data\n */\nstatic void _tws_rsp(OTA_STATUS_E status) {\n  LOG_D(\"[%s] status:%s\", __func__, _sts2str(status));\n\n  OTA_STATUS_E rsp = status;\n  _ota_relay_data(OTA_COMMAND_RSP, (const uint8_t *)&rsp, sizeof(rsp));\n}\n#endif\n\nOTA_COMMON_ENV_T *ota_common_get_env(void) { return &otaEnv; }\n\n/**\n * @brief Reset the OTA environment.\n *\n */\nstatic void _reset_env(void) {\n  LOG_D(\"[%s]\", __func__);\n  memset(&otaEnv, 0, sizeof(otaEnv));\n\n#ifdef __APP_USER_DATA_NV_FLASH_OFFSET__\n  otaEnv.userDataNvFlashOffset = __APP_USER_DATA_NV_FLASH_OFFSET__;\n#else\n  otaEnv.userDataNvFlashOffset =\n      hal_norflash_get_flash_total_size(HAL_NORFLASH_ID_0) - 2 * 4096;\n#endif\n\n  otaEnv.flashOffsetOfUserDataPool = otaEnv.userDataNvFlashOffset;\n  _update_ota_user(OTA_USER_NUM);\n\n#ifdef OTA_NVRAM\n  // gOtaCtx.cfg.clearUserData = false;\n  // gOtaCtx.flashOffsetOfFactoryDataPool =\n  //     otaEnv.otaCommon->userDataNvFlashOffset + FLASH_SECTOR_SIZE_IN_BYTES;\n#endif\n\n#ifdef IBRT\n  /// init tws TX queue\n  osMutexWait(txQueueMutexID, osWaitForever);\n  InitCQueue(&(otaEnv.txQueue), ARRAY_SIZE(otaEnv.txBuf),\n             (CQItemType *)otaEnv.txBuf);\n  osMutexRelease(txQueueMutexID);\n\n  /// init tws RX queue\n  osMutexWait(rxQueueMutexID, osWaitForever);\n  InitCQueue(&(otaEnv.rxQueue), ARRAY_SIZE(otaEnv.rxBuf),\n             (CQItemType *)otaEnv.rxBuf);\n  osMutexRelease(rxQueueMutexID);\n#endif\n}\n\nvoid ota_common_init_handler(void) {\n  LOG_D(\"[%s]\", __func__);\n\n  /// init OTA related nvrecord pointer\n  nv_record_ota_init();\n\n  /// init common used flash module\n  ota_common_init_flash(\n      (uint8_t)NORFLASH_API_MODULE_ID_OTA, 0,\n      (OTA_FLASH_LOGIC_ADDR + (\n#ifdef __APP_USER_DATA_NV_FLASH_OFFSET__\n                                  __APP_USER_DATA_NV_FLASH_OFFSET__\n#else\n                                  (hal_norflash_get_flash_total_size(\n                                       HAL_NORFLASH_ID_0) -\n                                   2 * 4096)\n#endif\n                                  & 0xffffff)),\n      0);\n\n#ifdef IBRT\n  if (txThreadId == NULL) {\n    txThreadId = osThreadCreate(osThread(_ota_tws_thread), NULL);\n  }\n\n  /// init tws TX queue mutex\n  if (txQueueMutexID == NULL) {\n    txQueueMutexID = osMutexCreate((osMutex(twsTxQueueMutex)));\n  }\n\n  /// init tws RX queue mutex\n  if (rxQueueMutexID == NULL) {\n    rxQueueMutexID = osMutexCreate((osMutex(twsRxQueueMutex)));\n  }\n#endif\n\n  _reset_env();\n}\n\nvoid ota_common_enable_sanity_check(bool enable) {\n  LOG_I(\"sanity check enable state update:%d->%d\", otaEnv.sanityCheckEnable,\n        enable);\n  otaEnv.sanityCheckEnable = enable;\n}\n\nvoid ota_common_init_flash(uint8_t module, uint32_t baseAddr, uint32_t len,\n                           uint32_t imageHandler) {\n  enum NORFLASH_API_RET_T ret;\n  uint32_t block_size = 0;\n  uint32_t sector_size = 0;\n  uint32_t page_size = 0;\n\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, NULL, &block_size, §or_size,\n                        &page_size);\n\n  LOG_I(\"%s module:%d, startAddr:0x%x, len:0x%x\", __func__, module, baseAddr,\n        len);\n  ret = norflash_api_register((NORFLASH_API_MODULE_ID_T)module,\n                              HAL_NORFLASH_ID_0, baseAddr, len, block_size,\n                              sector_size, page_size, OTA_NORFLASH_BUFFER_LEN,\n                              (NORFLASH_API_OPERA_CB)imageHandler);\n\n  ASSERT(ret == NORFLASH_API_OK,\n         \"ota_init_flash: norflash_api register failed,ret = %d.\", ret);\n\n#ifdef FLASH_SUSPEND\n  norflash_suspend_check_irq(AUDMA_IRQn);\n  norflash_suspend_check_irq(ISDATA_IRQn);\n  norflash_suspend_check_irq(ISDATA1_IRQn);\n#endif\n}\n\nbool ota_common_is_in_progress(void) {\n  bool ret = false;\n\n  if (OTA_STAGE_IDLE != otaEnv.currentStage) {\n    ret = true;\n  }\n\n  return ret;\n}\n\nvoid ota_common_registor_command_handler(OTA_COMMAND_E cmdType,\n                                         void *cmdHandler) {\n  if (otaEnv.cmdHandler[cmdType]) {\n    LOG_W(\"handler for OTA command %d is not NULL\", cmdType);\n  }\n\n  otaEnv.cmdHandler[cmdType] = (OTA_CMD_HANDLER_T)cmdHandler;\n}\n\nOTA_STATUS_E ota_common_command_received_handler(OTA_COMMAND_E cmdType,\n                                                 void *cmdInfo,\n                                                 uint16_t cmdLen) {\n  LOG_D(\"cmd received:%s\", _cmd2str(cmdType));\n  otaEnv.status = OTA_STATUS_OK;\n  OTA_STATUS_E temp = OTA_STATUS_OK;\n\n  /// init OTA progress when received begin command\n  if (OTA_COMMAND_BEGIN == cmdType) {\n    ASSERT(OTA_STAGE_IDLE == otaEnv.currentStage,\n           \"Received begin command while not in IDLE stage\");\n    OTA_BEGIN_PARAM_T *c = (OTA_BEGIN_PARAM_T *)cmdInfo;\n\n    /// update the ota user to ota common layer\n    _update_ota_user(c->user);\n\n    /// update the new image size according to the image size param\n    LOG_I(\"total image size update:%d->%d\", otaEnv.totalImageSize,\n          c->imageSize);\n    otaEnv.totalImageSize = c->imageSize;\n\n    /// update the new image offset according to the start offset param\n    ASSERT(0 == (c->startOffset % FLASH_SECTOR_SIZE_IN_BYTES),\n           \"Resumed start offset is not 4KB aligned!\");\n    LOG_I(\"programOffset&receivedDataSize is update:%d->%d\",\n          otaEnv.newImageProgramOffset, c->startOffset);\n    otaEnv.newImageProgramOffset = c->startOffset;\n    otaEnv.receivedDataSize = c->startOffset;\n\n    /// update the device index\n    LOG_I(\"deviceId update:%d->%d\", otaEnv.deviceId, c->device);\n    otaEnv.deviceId = c->device;\n\n    /// update the version info and version length\n    memcpy(otaEnv.version, c->version, c->versionLen);\n    otaEnv.versionLen = c->versionLen;\n\n    /// update the flash offset of new image\n    LOG_I(\"newImageFlashOffset update:0x%02x->0x%02x\",\n          otaEnv.newImageFlashOffset, c->flashOffset);\n    otaEnv.newImageFlashOffset = c->flashOffset;\n\n    /// set the OTA stage to ongoing\n    _set_ota_stage(OTA_STAGE_ONGOING);\n\n    /// system layer configurations to guarentee the performance\n    /// of all functionalities\n    _enter_ota_state(c->path);\n  }\n\n  /// execute the custom configuration\n  if (OTA_COMMAND_NUM != cmdType) {\n    if (otaEnv.cmdHandler[cmdType]) {\n      temp = otaEnv.cmdHandler[cmdType](cmdInfo, cmdLen);\n      LOG_I(\"ota command %s handle done, status:%s\", _cmd2str(cmdType),\n            _sts2str(temp));\n\n      if (OTA_STATUS_OK != temp) {\n        otaEnv.status = temp;\n      }\n    } else {\n      LOG_W(\"ota cmd %s is not handled by customor\", _cmd2str(cmdType));\n    }\n  } else {\n    LOG_E(\"INVALID cmd:%d\", cmdType);\n  }\n\n  /// update the OTA progress\n  if (OTA_STATUS_OK == otaEnv.status) {\n    if (!nv_record_ota_update_info(otaEnv.currentUser, otaEnv.deviceId,\n                                   otaEnv.currentStage, otaEnv.totalImageSize,\n                                   otaEnv.version)) {\n      LOG_W(\"update info failed\");\n      otaEnv.status = OTA_STATUS_ERROR;\n    }\n  }\n\n  /// special process for OTA_ABORT&&OTA_APPLY command\n  if ((OTA_COMMAND_ABORT == cmdType) || (OTA_COMMAND_APPLY == cmdType)) {\n    _reset_env();\n  }\n\n  LOG_I(\"%s cmd process result:%s\", __func__, _sts2str(otaEnv.status));\n  return otaEnv.status;\n}\n\n#ifdef OTA_NVRAM\nstatic void ota_update_nv_data(void) {\n  if (otaEnv.configuration.isToClearUserData) {\n    enum NORFLASH_API_MODULE_ID_T mod =\n        _get_flash_module_from_ota_device(otaEnv.deviceId);\n    app_flash_page_erase(mod, sectorIndexInFlash * FLASH_SECTOR_SIZE_IN_BYTES);\n  }\n\n  if (otaEnv.configuration.isToRenameBT || otaEnv.configuration.isToRenameBLE ||\n      otaEnv.configuration.isToUpdateBTAddr ||\n      otaEnv.configuration.isToUpdateBLEAddr) {\n    uint32_t *pOrgFactoryData, *pUpdatedFactoryData;\n    pOrgFactoryData = (uint32_t *)(OTA_FLASH_LOGIC_ADDR +\n                                   otaEnv.flashOffsetOfFactoryDataPool);\n    memcpy(otaEnv.dataCacheBuffer, (uint8_t *)pOrgFactoryData,\n           FLASH_SECTOR_SIZE_IN_BYTES);\n    pUpdatedFactoryData = (uint32_t *)&(otaEnv.dataCacheBuffer);\n\n    if (NVREC_DEV_VERSION_1 == nv_record_dev_rev) {\n      if (otaEnv.configuration.isToRenameBT) {\n        memset((uint8_t *)(pUpdatedFactoryData + dev_name), 0,\n               sizeof(uint32_t) * (dev_bt_addr - dev_name));\n\n        memcpy((uint8_t *)(pUpdatedFactoryData + dev_name),\n               (uint8_t *)(otaEnv.configuration.newBTName), NAME_LENGTH);\n      }\n\n      if (otaEnv.configuration.isToUpdateBTAddr) {\n        memcpy((uint8_t *)(pUpdatedFactoryData + dev_bt_addr),\n               (uint8_t *)(otaEnv.configuration.newBTAddr), BD_ADDR_LENGTH);\n      }\n\n      if (otaEnv.configuration.isToUpdateBLEAddr) {\n        memcpy((uint8_t *)(pUpdatedFactoryData + dev_ble_addr),\n               (uint8_t *)(otaEnv.configuration.newBLEAddr), BD_ADDR_LENGTH);\n      }\n\n      pUpdatedFactoryData[dev_crc] =\n          crc32(0, (uint8_t *)(&pUpdatedFactoryData[dev_reserv1]),\n                (dev_data_len - dev_reserv1) * sizeof(uint32_t));\n    } else {\n      if (otaEnv.configuration.isToRenameBT) {\n        memset((uint8_t *)(pUpdatedFactoryData + rev2_dev_name), 0,\n               sizeof(uint32_t) * (rev2_dev_bt_addr - rev2_dev_name));\n\n        memcpy((uint8_t *)(pUpdatedFactoryData + rev2_dev_name),\n               (uint8_t *)(otaEnv.configuration.newBTName), NAME_LENGTH);\n      }\n\n      if (otaEnv.configuration.isToRenameBLE) {\n        memset((uint8_t *)(pUpdatedFactoryData + rev2_dev_ble_name), 0,\n               sizeof(uint32_t) * (rev2_dev_section_end - rev2_dev_ble_name));\n\n        memcpy((uint8_t *)(pUpdatedFactoryData + rev2_dev_ble_name),\n               (uint8_t *)(otaEnv.configuration.newBleName),\n               BLE_NAME_LEN_IN_NV);\n      }\n\n      if (otaEnv.configuration.isToUpdateBTAddr) {\n        memcpy((uint8_t *)(pUpdatedFactoryData + rev2_dev_bt_addr),\n               (uint8_t *)(otaEnv.configuration.newBTAddr), BD_ADDR_LENGTH);\n      }\n\n      if (otaEnv.configuration.isToUpdateBLEAddr) {\n        memcpy((uint8_t *)(pUpdatedFactoryData + rev2_dev_ble_addr),\n               (uint8_t *)(otaEnv.configuration.newBLEAddr), BD_ADDR_LENGTH);\n      }\n\n      pUpdatedFactoryData[dev_crc] = crc32(\n          0, (uint8_t *)(&pUpdatedFactoryData[rev2_dev_section_start_reserved]),\n          pUpdatedFactoryData[rev2_dev_data_len]);\n    }\n\n    enum NORFLASH_API_MODULE_ID_T mod =\n        _get_flash_module_from_ota_device(otaEnv.deviceId);\n    app_flash_page_erase(mod, sectorIndexInFlash * FLASH_SECTOR_SIZE_IN_BYTES);\n\n    app_flash_page_program(mod, otaEnv.flashOffsetOfFactoryDataPool,\n                           (uint8_t *)pUpdatedFactoryData,\n                           FLASH_SECTOR_SIZE_IN_BYTES);\n  }\n}\n#endif\n\n#ifdef IBRT\nvoid ota_common_registor_relay_needed_handler(void *handler) {\n  if (otaEnv.customRelayNeededHandler) {\n    LOG_W(\"handler for custom relay needed judge is not NULL\");\n  }\n\n  otaEnv.customRelayNeededHandler = (CUSTOM_RELAY_NEEDED_FUNC_T)handler;\n}\n\nvoid ota_common_registor_peer_cmd_received_handler(void *handler) {\n  if (otaEnv.peerCmdReceivedHandler) {\n    LOG_W(\"handler for peer cmd received is not NULL\");\n  }\n\n  otaEnv.peerCmdReceivedHandler = (PEER_CMD_RECEIVED_HANDLER_T)handler;\n}\n\nOTA_STATUS_E ota_common_relay_data_to_peer(OTA_COMMAND_E cmdType,\n                                           const uint8_t *data, uint16_t len) {\n  OTA_STATUS_E status = OTA_STATUS_OK;\n  if (_relay_data_needed()) {\n    _ota_relay_data(cmdType, (const uint8_t *)data, len);\n  } else {\n    status = OTA_STATUS_ERROR;\n  }\n\n  return status;\n}\n\nOTA_STATUS_E ota_common_receive_peer_rsp(void) {\n  OTA_STATUS_E status = OTA_STATUS_OK;\n\n  if (_relay_data_needed()) {\n    /// get current thread ID as tws rx thread\n    rxThreadId = osThreadGetId();\n\n    /// pending current thread to waitting for slave response\n    evt = osSignalWait(OTA_TWS_RX_SIGNAL, OTA_TWS_RELAY_WAITTIME);\n\n    if (evt.status == osEventTimeout) {\n      status = OTA_STATUS_ERROR_RELAY_TIMEOUT;\n      LOG_W(\"[%s]SignalWait TIMEOUT!\", __func__);\n    } else if (osEventSignal == evt.status) {\n      status = ota_common_get_peer_result();\n    }\n\n    ///.clear the excute result of this time\n    _update_peer_result(OTA_STATUS_OK);\n  } else {\n    status = OTA_STATUS_ERROR;\n  }\n\n  return status;\n}\n\nOTA_STATUS_E ota_common_fw_data_write(const uint8_t *data, uint16_t len) {\n  OTA_STATUS_E status = OTA_STATUS_OK;\n  uint16_t leftDataSize = len;\n  uint32_t offsetInReceivedRawData = 0;\n\n  do {\n    uint32_t bytesToCopy;\n    // copy to data buffer\n    if ((otaEnv.dataCacheBufferOffset + leftDataSize) >\n        OTA_DATA_CACHE_BUFFER_SIZE) {\n      bytesToCopy = OTA_DATA_CACHE_BUFFER_SIZE - otaEnv.dataCacheBufferOffset;\n    } else {\n      bytesToCopy = leftDataSize;\n    }\n\n    leftDataSize -= bytesToCopy;\n\n    memcpy(&otaEnv.dataCacheBuffer[otaEnv.dataCacheBufferOffset],\n           &data[offsetInReceivedRawData], bytesToCopy);\n    offsetInReceivedRawData += bytesToCopy;\n    otaEnv.dataCacheBufferOffset += bytesToCopy;\n\n    ASSERT(otaEnv.dataCacheBufferOffset <= OTA_DATA_CACHE_BUFFER_SIZE,\n           \"bad math in %s\", __func__);\n    if (OTA_DATA_CACHE_BUFFER_SIZE == otaEnv.dataCacheBufferOffset) {\n      _flush_data_to_flash(\n          otaEnv.dataCacheBuffer, OTA_DATA_CACHE_BUFFER_SIZE,\n          (otaEnv.newImageProgramOffset + otaEnv.newImageFlashOffset), false);\n      otaEnv.newImageProgramOffset += OTA_DATA_CACHE_BUFFER_SIZE;\n      otaEnv.dataCacheBufferOffset = 0;\n    }\n  } while (offsetInReceivedRawData < len);\n\n  otaEnv.receivedDataSize += len;\n\n  // check whether all image data has been received\n  if (otaEnv.receivedDataSize == otaEnv.totalImageSize) {\n    LOG_D(\"The final image programming and crc32 check.\");\n\n    // flush any partial buffer to flash\n    if (otaEnv.dataCacheBufferOffset != 0) {\n      _flush_data_to_flash(\n          otaEnv.dataCacheBuffer, otaEnv.dataCacheBufferOffset,\n          (otaEnv.newImageProgramOffset + otaEnv.newImageFlashOffset), true);\n    }\n\n    if (OTA_DEVICE_APP == otaEnv.deviceId) {\n      bool check = true;\n\n      /// check the sanity if required\n      if (otaEnv.sanityCheckEnable) {\n        check = _image_sanity_check();\n      }\n\n      if (check) {\n        /// update the magic code of the application image\n        _update_magic_number(NORMAL_BOOT);\n\n        /// check the crc32 of the received image data\n        if (_compute_whole_image_crc()) {\n          LOG_I(\"Whole image verification pass.\");\n\n          /// update the OTA stage to OTA done\n          _set_ota_stage(OTA_STAGE_DONE);\n        } else {\n          LOG_W(\"image verification failed @%d\", __LINE__);\n\n          /// update the OTA stage to OTA idle\n          _set_ota_stage(OTA_STAGE_IDLE);\n        }\n      } else {\n        /// sanity check failed\n        LOG_W(\"image verification failed @%d\", __LINE__);\n\n        /// update the OTA stage to OTA idle\n        _set_ota_stage(OTA_STAGE_IDLE);\n      }\n    } else {\n      LOG_I(\"download finished, device:%d\", otaEnv.deviceId);\n\n      /// update the OTA stage to OTA idle\n      _set_ota_stage(OTA_STAGE_DONE);\n    }\n\n    /// whole image verification failed somehow\n    if (OTA_STAGE_IDLE == otaEnv.currentStage) {\n      nv_record_ota_update_info(otaEnv.currentUser, otaEnv.deviceId,\n                                otaEnv.currentStage, 0, INVALID_VERSION_STR);\n\n      status = OTA_STATUS_ERROR_CHECKSUM;\n    } else //!< whole image verification passed\n    {\n      nv_record_ota_update_info(otaEnv.currentUser, otaEnv.deviceId,\n                                otaEnv.currentStage, otaEnv.totalImageSize,\n                                otaEnv.version);\n    }\n\n    /// exit the OTA state\n    _exit_ota_state();\n  } else //!< whole image revceive not finished\n  {\n    LOG_D(\"Received image size:%d\", otaEnv.receivedDataSize);\n\n    /// update the break point if it is changed\n    if ((otaEnv.receivedDataSize - otaEnv.breakPoint) >=\n        OTA_BREAKPOINT_STORE_GRANULARITY) {\n      otaEnv.breakPoint =\n          (otaEnv.receivedDataSize / OTA_BREAKPOINT_STORE_GRANULARITY) *\n          OTA_BREAKPOINT_STORE_GRANULARITY;\n\n      LOG_I(\"update record offset to %d\", otaEnv.breakPoint);\n      nv_record_ota_update_breakpoint(otaEnv.currentUser, otaEnv.deviceId,\n                                      otaEnv.breakPoint);\n    }\n  }\n\n  return status;\n}\n\nvoid ota_common_apply_current_fw(void) {\n  OTA_BOOT_INFO_T otaBootInfo = {COPY_NEW_IMAGE, otaEnv.totalImageSize,\n                                 otaEnv.crc32OfImage};\n  _update_boot_info(&otaBootInfo);\n\n#ifdef OTA_NVRAM\n  ota_update_nv_data();\n#endif\n\n  app_start_postponed_reset();\n}\n\nvoid ota_common_on_relay_data_received(uint8_t *ptrParam, uint32_t paramLen) {\n  ASSERT(ptrParam, \"invalid data pointer received in %s\", __func__);\n  ASSERT(paramLen <= TWS_RELAY_DATA_MAX_SIZE,\n         \"illegal parameter length received in %s\", __func__);\n\n  OTA_TWS_DATA_T *otaTwsData = (OTA_TWS_DATA_T *)ptrParam;\n  LOG_D(\"[%s] paramLen:%d, cmdType:%d|%s\", __func__, paramLen,\n        otaTwsData->cmdType, _cmd2str(otaTwsData->cmdType));\n\n  OTA_STATUS_E status = OTA_STATUS_OK;\n  OTA_BEGIN_PARAM_T *beginInfo = NULL;\n  uint16_t packetLen = 0;\n\n  if (_tws_frame_validity_check(ptrParam, paramLen)) {\n    /// update the magic code and command type\n    otaEnv.currentMagicCode = otaTwsData->magicCode;\n    otaEnv.currentCmdType = otaTwsData->cmdType;\n\n    /// push received data into tws OTA data receive queue\n    osMutexWait(rxQueueMutexID, osWaitForever);\n    ASSERT(CQ_OK == EnCQueue(&otaEnv.rxQueue, (CQItemType *)otaTwsData->data,\n                             (paramLen - OTA_TWS_HEAD_SIZE)),\n           \"%s failed to push data to queue, avaiable:%d, push:%d\", __func__,\n           AvailableOfCQueue(&otaEnv.rxQueue), (paramLen - OTA_TWS_HEAD_SIZE));\n    osMutexRelease(rxQueueMutexID);\n\n    /// whole packet from APP received done\n    if (OTA_RELAY_PACKET_MAGIC_CODE_COMPLETE == otaEnv.currentMagicCode) {\n      osMutexWait(rxQueueMutexID, osWaitForever);\n      packetLen = LengthOfCQueue(&otaEnv.rxQueue);\n      LOG_D(\"length of rx queue:%d\", packetLen);\n      DeCQueue(&otaEnv.rxQueue, otaEnv.tempRxBuf, packetLen);\n      osMutexRelease(rxQueueMutexID);\n\n      switch (otaEnv.currentCmdType) {\n      case OTA_COMMAND_RSP:\n        /// retrieve and update the status of peer\n        status = ((OTA_RESPONSE_PARAM_T *)otaEnv.tempRxBuf)->status;\n        _update_peer_result(status);\n\n        /// inform the receiving thread to proceed\n        osSignalSet(rxThreadId, OTA_TWS_RX_SIGNAL);\n        break;\n\n      /// add other supported command here\n      case OTA_COMMAND_BEGIN:\n        beginInfo = (OTA_BEGIN_PARAM_T *)otaTwsData->data;\n        if (beginInfo->initializer) {\n          beginInfo->initializer();\n        } else {\n          LOG_E(\"initializer not registored\");\n        }\n      case OTA_COMMAND_DATA:\n      case OTA_COMMAND_APPLY:\n      case OTA_COMMAND_ABORT:\n        if (otaEnv.peerCmdReceivedHandler) {\n          status = otaEnv.peerCmdReceivedHandler(\n              otaEnv.currentCmdType, (const uint8_t *)otaEnv.tempRxBuf,\n              packetLen);\n        } else {\n          LOG_W(\"peerCmdReceivedHandler is not registored\");\n        }\n\n        break;\n\n      default:\n        ASSERT(0, \"INVALID cmd received\");\n        status = OTA_STATUS_ERROR;\n        break;\n      }\n\n      /// response to master if needed\n      if (OTA_COMMAND_RSP != otaTwsData->cmdType) {\n        _tws_rsp(status);\n      }\n\n      otaEnv.currentMagicCode = OTA_RELAY_PACKET_MAGIC_CODE_INVALID;\n      otaEnv.currentCmdType = OTA_COMMAND_NUM;\n    }\n  } else {\n    LOG_W(\"Received data frame is invalid\");\n    status = OTA_STATUS_ERROR;\n\n    switch (otaTwsData->cmdType) {\n    case OTA_COMMAND_RSP:\n      _update_peer_result(status);\n      osSignalSet(rxThreadId, OTA_TWS_RX_SIGNAL);\n      break;\n\n    case OTA_COMMAND_BEGIN:\n    case OTA_COMMAND_DATA:\n    case OTA_COMMAND_APPLY:\n    case OTA_COMMAND_ABORT:\n      _tws_rsp(status);\n      break;\n\n    default:\n      ASSERT(0, \"INVALID command received\");\n      break;\n    }\n  }\n}\n\nPOSSIBLY_UNUSED static void _ota_tws_deinit(void) {\n  ResetCQueue(&otaEnv.txQueue);\n  ResetCQueue(&otaEnv.rxQueue);\n  memset(otaEnv.txBuf, 0, ARRAY_SIZE(otaEnv.txBuf));\n  memset(otaEnv.rxBuf, 0, ARRAY_SIZE(otaEnv.rxBuf));\n  memset(otaEnv.tempRxBuf, 0, ARRAY_SIZE(otaEnv.tempRxBuf));\n\n  if (txThreadId) {\n    osThreadTerminate(txThreadId);\n    txThreadId = NULL;\n  }\n\n  if (txQueueMutexID != NULL) {\n    osMutexDelete(txQueueMutexID);\n    txQueueMutexID = NULL;\n  }\n\n  if (rxQueueMutexID != NULL) {\n    osMutexDelete(rxQueueMutexID);\n    rxQueueMutexID = NULL;\n  }\n}\n\nstatic void _ota_tws_thread(const void *arg) {\n  volatile uint16_t qLen = 0;\n  volatile uint16_t packetLen = 0;\n\n  while (1) {\n    osMutexWait(txQueueMutexID, osWaitForever);\n    qLen = LengthOfCQueue(&otaEnv.txQueue);\n    osMutexRelease(txQueueMutexID);\n    LOG_D(\"queued data len:%d\", qLen);\n\n    while (qLen) {\n      /// check the validity of queue length\n      /// ASSERT(qLen <= OTA_MAX_MTU, \"invalid OTA relay data len\");\n\n      osMutexWait(txQueueMutexID, osWaitForever);\n      /// retrive and check the validity of packet length\n      DeCQueue(&otaEnv.txQueue, (CQItemType *)&packetLen, 2);\n      ASSERT(packetLen <= TWS_RELAY_DATA_MAX_SIZE,\n             \"invalid OTA relay data len:%d\", packetLen);\n\n      /// retrieve the data to transmit\n      DeCQueue(&otaEnv.txQueue, (CQItemType *)relayBuf, packetLen);\n      osMutexRelease(txQueueMutexID);\n\n      LOG_D(\"send data len:%d\", packetLen);\n\n      /// send data to peer\n      tws_ctrl_send_cmd(IBRT_COMMON_OTA, relayBuf, packetLen);\n      memset(relayBuf, 0, TWS_RELAY_DATA_MAX_SIZE);\n\n      osMutexWait(txQueueMutexID, osWaitForever);\n      qLen = LengthOfCQueue(&otaEnv.txQueue);\n      osMutexRelease(txQueueMutexID);\n    }\n\n    osSignalWait(OTA_TWS_TX_SIGNAL, osWaitForever);\n  }\n}\n\nstatic void _sync_info_prepare_handler(uint8_t *buf, uint16_t *length) {\n  *length = OTA_DEVICE_CNT * sizeof(NV_OTA_INFO_T);\n\n  void *otaInfo = NULL;\n  nv_record_ota_get_ptr(&otaInfo);\n\n  memcpy(buf, otaInfo, *length);\n}\n\nstatic void _sync_info_received_handler(uint8_t *buf, uint16_t length) {\n  // uodate gsound info\n  // TODO:\n}\n\nvoid ota_common_tws_sync_init(void) {\n  TWS_SYNC_USER_T userOta = {\n      _sync_info_prepare_handler,\n      _sync_info_received_handler,\n      _sync_info_prepare_handler,\n      NULL,\n      NULL,\n  };\n\n  app_tws_if_register_sync_user(TWS_SYNC_USER_OTA, &userOta);\n}\n#endif\n"
  },
  {
    "path": "services/ota/ota_common.h",
    "content": "/**\n * @file ota_common.h\n * @author BES AI team\n * @version 0.1\n * @date 2020-04-17\n * \n * @copyright Copyright (c) 2015-2020 BES Technic.\n * All rights reserved. All unpublished rights reserved.\n * \n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n * \n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n */\n\n#ifndef __OTA_COMMON_H__\n#define __OTA_COMMON_H__\n\n#ifdef __cplusplus\nextern \"C\"{\n#endif\n\n/*****************************header include********************************/\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n\n/******************************macro defination*****************************/\n/**\n * @brief Flash base address.\n * \n */\n#define OTA_FLASH_LOGIC_ADDR (FLASH_NC_BASE)\n\n/**\n * @brief max version string length supported by ota common layer.\n * \n */\n#define MAX_VERSION_LEN 20\n\n\n/**\n * @brief boot up flag\n * \n */\n#ifndef NORMAL_BOOT\n#define NORMAL_BOOT 0xBE57EC1C\n#endif\n\n/**\n * @brief This flag is used to inform OTA bin to copy the new image to APP\n * image section.\n * \n */\n#ifndef COPY_NEW_IMAGE\n#define COPY_NEW_IMAGE 0x5A5A5A5A\n#endif\n\n\n/**\n * @brief offset in flash to write the new image.\n * \n */\n#ifndef NEW_IMAGE_FLASH_OFFSET\n#define NEW_IMAGE_FLASH_OFFSET    0x180000\n#endif\n\n\n/**\n * @brief flash sector size\n * \n * 4K is the page size of flash\n * \n */\n#ifndef FLASH_SECTOR_SIZE_IN_BYTES\n#define FLASH_SECTOR_SIZE_IN_BYTES 4096\n#endif\n\n\n/**\n * @brief cache buffer size for OTA data.\n * \n */\n#ifndef OTA_DATA_CACHE_BUFFER_SIZE\n#define OTA_DATA_CACHE_BUFFER_SIZE FLASH_SECTOR_SIZE_IN_BYTES\n#endif\n\n\n/**\n * @brief this value is used for configure the norflash write buffer.\n * \n */\n#define OTA_NORFLASH_BUFFER_LEN (OTA_DATA_CACHE_BUFFER_SIZE * 2)\n\n\n/**\n * @brief this flag is used to mark if platform support automatic OTA.\n * \n * If Target indicates the device supports Automatic OTA, then the new firmware\n * image does not have to be applied immediately after firmware transfer has\n * completed. Instead the device can choose an opportune moment to perform the\n * Apply.\n * \n */\n#define SUPPORT_AUTOMATIC_OTA false\n\n\n#ifdef IBRT\n/// max data size per packet of tws relay\n/// this value should equal to @see APP_TWS_CTRL_BUFFER_MAX_LEN\n#define TWS_RELAY_DATA_MAX_SIZE 512\n\n/// max data size per packet of OTA APP\n/// NOTE: this value depends on specific OTA spec\n#define OTA_MAX_MTU 700\n\n#define OTA_RELAY_PACKET_MAGIC_CODE_INVALID 0x44454144\n\n/// mark the whole packet data from APP is completely transmitted\n#define OTA_RELAY_PACKET_MAGIC_CODE_COMPLETE 0x28269395\n\n/// mark the whole packet data from APP is not completely transmitted\n#define OTA_RELAY_PACKET_MAGIC_CODE_INCOMPLETE 0x17188284\n\n/// prefix of the gsuond_tws_data see @OTA_TWS_DATA_T\n#define OTA_TWS_HEAD_SIZE (sizeof(uint8_t) + sizeof(uint16_t) + sizeof(uint32_t))\n\n/// payload max length is tws_buffer_size minimize the prefix, see @GSOUND_OTA_TWS_T\n#define OTA_TWS_PAYLOAD_MAX_LEN (TWS_RELAY_DATA_MAX_SIZE - OTA_TWS_HEAD_SIZE)\n\n#define OTA_TWS_RX_SIGNAL (1 << 10)\n#define OTA_TWS_TX_SIGNAL (1 << 11)\n\n#define OTA_TWS_RELAY_WAITTIME 2000\n#endif // #ifdef IBRT\n\n\n#ifdef OTA_NVRAM\n#define BD_ADDR_LENGTH              6\n#define NAME_LENGTH                 32\n#endif\n\n/******************************type defination******************************/\n/**\n * @brief Boot up info structure.\n * \n */\ntypedef struct\n{\n    uint32_t magicNumber;\n    uint32_t imageSize;\n    uint32_t imageCrc;\n}__attribute__ ((__packed__)) OTA_BOOT_INFO_T;\n\n/**\n * @brief enum for OTA command.\n * \n */\ntypedef enum\n{\n    OTA_COMMAND_BEGIN = 0, //!< OTA_BEGIN command identifier\n    OTA_COMMAND_DATA  = 1, //!< OTA_DATA command identifier\n    OTA_COMMAND_APPLY = 2, //!< OTA_APPLY command identifier\n    OTA_COMMAND_ABORT = 3, //!< OTA_ABORT command identifier\n#ifdef IBRT\n    OTA_COMMAND_RSP   = 4, //!< used to response the tws OTA data relay\n#endif\n\n    OTA_COMMAND_NUM, //!< number of valid OTA command\n}OTA_COMMAND_E;\n\n/**\n * @brief enum for OTA user.\n * \n */\ntypedef enum\n{\n    OTA_USER_BES            = 0, //!< OTA user: BES\n    OTA_USER_COLORFUL       = 1, //!< OTA user: GOOGLE\n    OTA_USER_ORANGE         = 2, //!< OTA user: ALI\n    OTA_USER_RED            = 3, //!< OTA user: HUAWEI\n    OTA_USER_GREEN          = 4, //!< OTA user: OPPO\n    // and other possible OTA user here\n\n    OTA_USER_NUM, //!< OTA user number\n} OTA_USER_E;\n\n/**\n * @brief enum for OTA path.\n * \n */\ntypedef enum\n{\n    OTA_PATH_INVALID    = 0, //!< invalid OTA path\n    OTA_PATH_BT         = 1, //!< OTA path: BT\n    OTA_PATH_BLE        = 2, //!< OTA path: BLE\n} OTA_PATH_E;\n\n/**\n * @brief enum for OTA device.\n * \n */\ntypedef enum\n{\n    OTA_DEVICE_APP      = 0,\n    OTA_DEVICE_HOTWORD  = 1,\n    // OTA_DEVICE_BOX      = 2,\n\n    OTA_DEVICE_NUM,\n}OTA_DEVICE_E;\n\n/**\n * @brief enum for OTA status\n * \n */\ntypedef enum\n{\n    OTA_STATUS_OK                   = 0, //!< status OK\n    OTA_STATUS_ERROR                = 1, //!< status error\n    OTA_STATUS_ERROR_RELAY_TIMEOUT  = 2, //!< tws data relay timeout\n    OTA_STATUS_ERROR_CHECKSUM       = 3, //!< checksum error\n    OTA_STATUS_ERROR_NOT_ALLOWED    = 4, //!< ota not allowed error\n\n    OTA_STATUS_NUM,\n}OTA_STATUS_E;\n\n/**\n * @brief enum for OTA stage\n * \n */\ntypedef enum\n{\n    OTA_STAGE_IDLE      = 0, //!< OTA is in idle state\n    OTA_STAGE_ONGOING   = 1, //!< OTA is ongoing\n    OTA_STAGE_DONE      = 2, //!< OTA is done\n    OTA_STAGE_APPLY     = 3, //!< OTA is ready to apply,\n                             //!< will apply at convenience\n\n    OTA_STAGE_NUM, //!< OTA stage number\n}OTA_STAGE_E;\n\ntypedef void(*CUSTOM_INITIALIZER_T)(void);\n\n/**\n * @brief the data structure of OTA_BEGIN command.\n * \n * common used information for OTA_BEGIN command in OTA common layer\n * the param 'customize' is used to pass the user-specific info which\n * will be handled in the function registored with\n * @see ota_common_registor_command_handler.\n * \n */\ntypedef struct\n{\n    OTA_PATH_E path; //!< used to mark the OTA path\n    OTA_USER_E user; //!< used to mark the OTA user\n    OTA_DEVICE_E device; //!< used to mark the OTA device\n    CUSTOM_INITIALIZER_T initializer; //!< used to init the custom OTA context\n    uint32_t imageSize; //!< total size of the upgrade image\n    uint32_t flashOffset; //!< flash offset to write the new image\n    uint32_t startOffset; //!< offset in upgrade image to start update\n    char version[MAX_VERSION_LEN]; //!< string of version to update\n    uint8_t versionLen; //!< length of the version string\n    void *customize; //!< customized information pointer\n    uint32_t customizeLen; //!< customized information length\n} OTA_BEGIN_PARAM_T;\n\n/**\n * @brief the data structure of OTA_DATA command.\n * \n * common used information for OTA_DATA command in OTA common layer\n * the param 'customize' is used to pass the user-specific info which\n * will be handled in the function registored with\n * @see ota_common_registor_command_handler.\n * \n */\ntypedef struct\n{\n    uint32_t offset; //!< offset in the whole upgrade image of this packet of data\n    uint16_t len; //!< length of upgrade data\n    const uint8_t *data; //!< pointer of upgrade data\n    uint32_t customizeLen; //!< customized information length\n    void *customize; //!< customized information pointer\n} OTA_DATA_PARAM_T;\n\n/**\n * @brief the data structure of OTA_APPLY command.\n * \n * common used information for OTA_APPLY command in OTA common layer\n * the param 'customize' is used to pass the user-specific info which\n * will be handled in the function registored with\n * @see ota_common_registor_command_handler.\n * \n */\ntypedef struct\n{\n    bool applyNow; //!< mark if force apply the upgrade image\n    uint32_t customizeLen; //!< customized information length\n    void *customize; //!< customized information pointer\n} OTA_APPLY_PARAM_T;\n\n/**\n * @brief the data structure of OTA_ABORT command.\n * \n * common used information for OTA_ABORT command in OTA common layer\n * the param 'customize' is used to pass the user-specific info which\n * will be handled in the function registored with\n * @see ota_common_registor_command_handler.\n * \n */\ntypedef struct\n{\n    uint32_t customizeLen; //!< customized information length\n    void *customize; //!< customized information pointer\n} OTA_ABORT_PARAM_T;\n\n/**\n * @brief the data structure of OTA_RESPONSE command.\n * \n * common used information for OTA_RESPONSE command in OTA common layer\n * \n */\ntypedef struct\n{\n    OTA_STATUS_E status; //!< status of received data\n}OTA_RESPONSE_PARAM_T;\n\n\n#ifdef OTA_NVRAM\ntypedef struct\n{\n    uint32_t lengthOfFollowingData; //!< \n    uint32_t newImageOffsetInFlash; //!< the offset of the flash to start writing the image\n\n    uint32_t clearUserData  : 1; //!< flag to mark if need to clear the user data section\n    uint32_t updateBTName   : 1; //!< flag to mark if need to update the BT name\n    uint32_t updateLEName   : 1; //!< flag to mark if need to update the BLE name\n    uint32_t updateBTAddr   : 1; //!< flag to mark if need to update the BT address\n    uint32_t updateBLEAddr  : 1; //!< flag to mark if need to update the BLE address\n    uint32_t reserve        : 27; //!< reserved for future use\n\n    uint8_t  newBTName[NAME_LENGTH]; //!< BT name to update\n    uint8_t  newLEName[NAME_LENGTH]; //!< BLE name to update\n    uint8_t  newBTAddr[BD_ADDR_LENGTH]; //!< BT address to update\n    uint8_t  newLEAddr[BD_ADDR_LENGTH]; //!< BLE address to update\n\n    uint32_t crc; //!< CRC of data in this structure(except for crc itself)\n}__attribute__ ((__packed__))OTA_FLOW_CONFIGURATION_T;\n#endif\n\n#ifdef IBRT\n/**\n * @brief OTA relay packet type\n * \n */\ntypedef enum\n{\n    OTA_RELAY_PACKET_TYPE_BEGIN = 0,\n    OTA_RELAY_PACKET_TYPE_DATA  = 1,\n    OTA_RELAY_PACKET_TYPE_APPLY = 2,\n    OTA_RELAY_PACKET_TYPE_ABORT = 3,\n    OTA_RELAY_PACKET_TYPE_RSP   = 4,\n\n    OTA_RELAY_PACKET_TYPE_NUM,\n} OTA_RELAY_PACKET_TYPE_E;\n\n/**\n * @brief OTA relay packet data structure.\n * \n */\ntypedef struct\n{\n    OTA_COMMAND_E cmdType;\n    uint32_t magicCode;\n    uint16_t length;\n    uint8_t data[OTA_TWS_PAYLOAD_MAX_LEN];\n} __attribute__((__packed__)) OTA_TWS_DATA_T;\n\n/**\n * @brief Used for customer to determain if relay command/data needed.\n * \n */\ntypedef bool(*CUSTOM_RELAY_NEEDED_FUNC_T)(void);\n\n/**\n * @brief Used for peer command handling\n * \n */\ntypedef OTA_STATUS_E (*PEER_CMD_RECEIVED_HANDLER_T)(OTA_COMMAND_E cmdType,\n                                                    const uint8_t *data,\n                                                    uint16_t len);\n#endif\n\ntypedef OTA_STATUS_E(*OTA_CMD_HANDLER_T)(const void *cmd, uint16_t cmdLen);\n\ntypedef struct\n{\n    /// used to record the OTA command execution result\n    /// NOTE: this could be used by customers\n    OTA_STATUS_E status;\n\n    /// used to mark if device currently in OTA state\n    bool isInOtaState;\n    \n    /// used to cache OTA data\n    uint8_t dataCacheBuffer[OTA_DATA_CACHE_BUFFER_SIZE];\n\n    /// used to mark OTA stage, @see OTA_STAGE_E to get more details\n    OTA_STAGE_E currentStage;\n\n    /// current OTA user, @see OTA_USER_E to get more details\n    OTA_USER_E currentUser;\n\n    /// current device ID, @see OTA_DEVICE_E to get more details\n    OTA_DEVICE_E deviceId;\n\n    /// current OTA path, @see OTA_PATH_E to get more details\n    OTA_PATH_E currentPath;\n\n    /// sanity check enable flag\n    /// 1 - sanity check enabled\n    /// 2 - sanity check disabled\n    bool sanityCheckEnable;\n\n    /// total size of current OTA file\n    uint32_t totalImageSize;\n\n    /// crc32 value of whole OTA image\n    uint32_t crc32OfImage;\n\n    /// string of version info\n    char version[MAX_VERSION_LEN];\n\n    /// length of the version string\n    uint8_t versionLen;\n\n    /// received data length\n    uint32_t receivedDataSize;\n\n    /// break point of OTA progress\n    uint32_t breakPoint;\n\n    /// offset of data cached in cache-buffer\n    uint32_t dataCacheBufferOffset;\n\n    /// Flash Offset For New Image\n    uint32_t newImageFlashOffset;\n\n    /// offset of data programmed in new image flash section\n    uint32_t newImageProgramOffset;\n\n    /// offset in flash of user data section\n    uint32_t userDataNvFlashOffset;\n\n    /// flash offset of user data pool\n    uint32_t flashOffsetOfUserDataPool;\n\n    /// OTA user-specific command handlers, should registor this handler array\n    /// with @see ota_common_registor_command_handler\n    OTA_CMD_HANDLER_T cmdHandler[OTA_COMMAND_NUM + 1];\n\n#ifdef OTA_NVRAM\n    uint32_t flashOffsetOfFactoryDataPool;\n    OTA_FLOW_CONFIGURATION_T configuration;\n#endif\n\n#ifdef IBRT\n    /// tws relay data TX queue\n    CQueue txQueue;\n\n    /// tws relay data TX buffer\n    uint8_t txBuf[OTA_MAX_MTU];\n\n    /// tws relay data RX queue\n    CQueue rxQueue;\n\n    /// tws relay data RX buffer\n    uint8_t rxBuf[OTA_MAX_MTU];\n\n    /// used to retrieve data from RX queue\n    uint8_t tempRxBuf[OTA_MAX_MTU];\n\n    /// peer result of handling received relay data\n    OTA_STATUS_E peerResult;\n\n    /// current receiving magic code of relay frame\n    /// used to mark if whole packet from APP is received\n    uint32_t currentMagicCode;\n\n    /// current receiving command type\n    OTA_COMMAND_E currentCmdType;\n\n    /// customized relay needed check handler\n    CUSTOM_RELAY_NEEDED_FUNC_T customRelayNeededHandler;\n\n    /// peer data received handler\n    PEER_CMD_RECEIVED_HANDLER_T peerCmdReceivedHandler;\n#endif\n} OTA_COMMON_ENV_T;\n\n/****************************function declearation**************************/\n/**\n * @brief Initialize the common used OTA context.\n * \n */\nvoid ota_common_init_handler(void);\n\n/**\n * @brief Enable/disable the sanity check.\n * \n * @param enable        switch on/off\n */\nvoid ota_common_enable_sanity_check(bool enable);\n\n/**\n * @brief Init OTA used flash module.\n * \n * @param module        flash module,\n *                      @see NORFLASH_API_MODULE_ID_T to get more details\n * @param baseAddr      base address of flash module\n * @param len           length of the flash module\n * @param imageHandler  handler\n */\nvoid ota_common_init_flash(uint8_t module,\n                           uint32_t baseAddr,\n                           uint32_t len,\n                           uint32_t imageHandler);\n\n/**\n * @brief Get the pointer of otaEnv.\n * \n * This function is used to pass the pointer of otaEnv to up-layer OTA applications\n * to use the common OTA info.\n * \n * @return OTA_COMMON_ENV_T* pointer of the otaEnv.\n */\nOTA_COMMON_ENV_T* ota_common_get_env(void);\n\n/**\n * @brief Judge if currently OTA is in progress.\n * \n * This function is used to judge if OTA progress is ongoing or not.\n * NOTE: this function will return true if current OTA stage is not OTA_STAGE_IDLE\n * \n * @return true         OTA in progress\n * @return false        OTA not in progress\n */\nbool ota_common_is_in_progress(void);\n\n/**\n * @brief Registor customized OTA command handler.\n * \n * Registor OTA uer-specific OTA command handlers, these functions are used to\n * mainten the status of specific OTA user layer and handle the user-specific\n * configurations.\n * \n * @param cmdType       command type received,\n *                      @see OTA_COMMAND_E to get more details\n * @param cmdHandler    handler to registor,\n *                      must in type @see OTA_CMD_HANDLER_T\n */\nvoid ota_common_registor_command_handler(OTA_COMMAND_E cmdType,\n                                         void *cmdHandler);\n\n/**\n * @brief Handler of received OTA command.\n * \n * Handle the received OTA command and informations.\n * \n * @param cmdType       receive command type\n * @param cmdInfo       pointer of received command information\n * @param cmdLen        length of received command information\n * @return OTA_STATUS_E result of handling received OTA command\n */\nOTA_STATUS_E ota_common_command_received_handler(OTA_COMMAND_E cmdType,\n                                                 void *cmdInfo,\n                                                 uint16_t cmdLen);\n\n#ifdef IBRT\n/**\n * @brief Registor customized relay needed handler.\n * \n * Relay needed is set to true by default, so the customized relay needed check\n * handler only need to return false when relay is not needed. And the customized\n * check function should in type of @see CUSTOM_RELAY_NEEDED_FUNC_T\n * \n * @param handler       customized function handler\n * \n */\nvoid ota_common_registor_relay_needed_handler(void *handler);\n\n/**\n * @brief Registor customized peer command recevied handler.\n * \n * @param handler       customized function handler for received peer command\n */\nvoid ota_common_registor_peer_cmd_received_handler(void *handler);\n\n/**\n * @brief Relay data to peer handler.\n * \n * @param cmdType       OTA command to relay, @see OTA_COMMAND_E to get more info\n * @param data          pointer of OTA data to relay\n * @param len           length of OTA data to realy\n * @return OTA_STATUS_E result of the OTA data relay operation\n */\nOTA_STATUS_E ota_common_relay_data_to_peer(OTA_COMMAND_E cmdType,\n                                           const uint8_t *data,\n                                           uint16_t len);\n\n/**\n * @brief Receive the OTA relay response.\n * \n * NOTE: This function will block the current thread until response from peer\n * received or timeout.\n * \n * @return OTA_STATUS_E OTA relay receive result.\n */\nOTA_STATUS_E ota_common_receive_peer_rsp(void);\n\n/**\n * @brief Write the received firmware data into flash.\n * \n * @param data          pointer of received firmware data\n * @param len           lenght of received firmware data\n * @return OTA_STATUS_E Operation excution result\n */\nOTA_STATUS_E ota_common_fw_data_write(const uint8_t *data, uint16_t len);\n\n/**\n * @brief Apply current firmware handler.\n * \n */\nvoid ota_common_apply_current_fw(void);\n\n/**\n * @brief Get the result of peer response to tws relay data.\n * \n * @return OTA_STATUS_E response of peer to the relay data,\n *                      @see OTA_STATUS_E to get more details\n */\nOTA_STATUS_E ota_common_get_peer_result(void);\n\n/**\n * @brief OTA realy data received handler.\n * \n * This function is used to handle received tws relay OTA data, transmit could be:\n * 1. master->slave: relay OTA commands\n * 2. slave->master: response to master\n * \n * @param ptrParam      pointer of received data\n * @param paramLen      length of received data\n */\nvoid ota_common_on_relay_data_received(uint8_t *ptrParam, uint32_t paramLen);\n\n/**\n * @brief OTA sync tws info initializer.\n * \n */\nvoid ota_common_tws_sync_init(void);\n#endif\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __OTA_COMMON_H__ */"
  },
  {
    "path": "services/ota/ota_dbg.h",
    "content": "/**\n * @file ota_dbg.h\n * @author BES AI team\n * @version 0.1\n * @date 2020-04-22\n * \n * @copyright Copyright (c) 2015-2020 BES Technic.\n * All rights reserved. All unpublished rights reserved.\n * \n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n * \n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n */\n\n#ifndef __OTA_DBG_H__\n#define __OTA_DBG_H__\n\n#ifdef __cplusplus\nextern \"C\"{\n#endif\n\n/*****************************header include********************************/\n#include \"hal_trace.h\"\n\n/******************************macro defination*****************************/\n#define LOG_V(str, ...) LOG_VERBOSE(LOG_MOD(OTA), str, ##__VA_ARGS__)\n#define LOG_D(str, ...) LOG_DEBUG(LOG_MOD(OTA), str, ##__VA_ARGS__)\n#define LOG_I(str, ...) LOG_INFO(LOG_MOD(OTA), str, ##__VA_ARGS__)\n#define LOG_W(str, ...) LOG_WARN(LOG_MOD(OTA), str, ##__VA_ARGS__)\n#define LOG_E(str, ...) LOG_ERROR(LOG_MOD(OTA), str, ##__VA_ARGS__)\n\n/******************************type defination******************************/\n\n/****************************function declearation**************************/\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* #ifndef __OTA_DBG_H__ */"
  },
  {
    "path": "services/overlay/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\n"
  },
  {
    "path": "services/overlay/app_overlay.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_overlay.h\"\n#include \"cmsis_os.h\"\n#include \"hal_location.h\"\n#include \"hal_trace.h\"\n\nosMutexDef(app_overlay_mutex);\n\nstatic osMutexId app_overlay_mutex_id = NULL;\nstatic APP_OVERLAY_ID_T app_overlay_id = APP_OVERLAY_ID_QTY;\n\nAPP_OVERLAY_ID_T app_get_current_overlay(void) { return app_overlay_id; }\n\nvoid app_overlay_select(enum APP_OVERLAY_ID_T id) {\n  TRACE(3, \"%s id:%d:%d\", __func__, id, app_overlay_id);\n\n  osMutexWait(app_overlay_mutex_id, osWaitForever);\n  if (app_overlay_id == APP_OVERLAY_ID_QTY) {\n    app_overlay_load(id);\n  } else if (app_overlay_id != APP_OVERLAY_ID_QTY) {\n    if (app_overlay_id != id) {\n      app_overlay_unload(app_overlay_id);\n      app_overlay_load(id);\n    }\n  }\n  app_overlay_id = id;\n  osMutexRelease(app_overlay_mutex_id);\n}\n\nvoid app_overlay_unloadall(void) {\n  osMutexWait(app_overlay_mutex_id, osWaitForever);\n  if (app_overlay_id != APP_OVERLAY_ID_QTY) {\n    app_overlay_unload(app_overlay_id);\n  }\n  app_overlay_id = APP_OVERLAY_ID_QTY;\n  osMutexRelease(app_overlay_mutex_id);\n}\n\nvoid app_overlay_open(void) {\n  if (app_overlay_mutex_id == NULL) {\n    app_overlay_mutex_id = osMutexCreate(osMutex(app_overlay_mutex));\n  }\n}\n\nvoid app_overlay_close(void) {\n  app_overlay_unloadall();\n  if (app_overlay_mutex_id != NULL) {\n    osMutexDelete(app_overlay_mutex_id);\n    app_overlay_mutex_id = NULL;\n  }\n}\n"
  },
  {
    "path": "services/overlay/app_overlay.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_OVERLAY_H__\n#define __APP_OVERLAY_H__\n\n#include \"plat_types.h\"\n#include \"hal_overlay.h\"\n\n#define app_overlay_load(id)                hal_overlay_load((enum HAL_OVERLAY_ID_T)id)\n#define app_overlay_unload(id)              hal_overlay_unload((enum HAL_OVERLAY_ID_T)id)\n#define app_overlay_get_text_size(id)       hal_overlay_get_text_size((enum HAL_OVERLAY_ID_T)id)\n#define app_overlay_get_text_all_size       hal_overlay_get_text_all_size\n#define app_overlay_get_text_address        hal_overlay_get_text_address\n#define app_overlay_get_text_free_size(id)  hal_overlay_get_text_free_size((enum HAL_OVERLAY_ID_T)id)\n#define app_overlay_get_text_free_addr(id)  hal_overlay_get_text_free_addr((enum HAL_OVERLAY_ID_T)id)\n//#define app_overlay_is_used                 hal_overlay_is_used\n\nenum APP_OVERLAY_ID_T {\n    APP_OVERLAY_HFP = HAL_OVERLAY_ID_0,\n    APP_OVERLAY_A2DP = HAL_OVERLAY_ID_1,\n    APP_OVERLAY_FM = HAL_OVERLAY_ID_2,\n    APP_OVERLAY_AAC = HAL_OVERLAY_ID_3,\n    APP_OVERLAY_A2DP_AAC = HAL_OVERLAY_ID_4,\n    APP_OVERLAY_MPA = HAL_OVERLAY_ID_5,\n#if\tdefined(A2DP_SCALABLE_ON)\n    APP_OVERLAY_A2DP_SCALABLE= HAL_OVERLAY_ID_6,\n#elif defined(A2DP_LHDC_ON)\n    APP_OVERLAY_A2DP_LHDC = HAL_OVERLAY_ID_6,\n#else\n    APP_OVERLAY_WAV = HAL_OVERLAY_ID_6,\n#endif\n#ifdef OPUS_IN_OVERLAY\n    APP_OVERLAY_OPUS = HAL_OVERLAY_ID_7,\n#elif defined(A2DP_LDAC_ON)\n\tAPP_OVERLAY_A2DP_LDAC = HAL_OVERLAY_ID_7,\n#endif\n\n    APP_OVERLAY_ID_QTY = HAL_OVERLAY_ID_QTY,\n    APP_OVERLAY_ID_IN_CFG = HAL_OVERLAY_ID_IN_CFG,\n};\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_overlay_select(enum APP_OVERLAY_ID_T id);\n\nvoid app_overlay_unloadall(void);\n\nvoid app_overlay_open(void);\n\nvoid app_overlay_close(void);\n\nenum APP_OVERLAY_ID_T app_get_current_overlay(void);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "services/resources/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y +=  \\\n    -Iutils/crc32\n\nifeq ($(VOICE_PROMPT),1)\nCFLAGS_resources.o += -DMEDIA_PLAYER_SUPPORT\nendif\n\n"
  },
  {
    "path": "services/resources/resources.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"cmsis_os.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n\n#include \"crc32.h\"\n#include \"resources.h\"\n\n#ifdef MEDIA_PLAYER_SUPPORT\n\ntypedef struct {\n  UINT32 MARK;\n  UINT16 ID;         // resource id\n  UINT16 count;      // count of resource\n  UINT32 total_size; // size include resource header, header list and data\n} ResourceHeader_t;\n\ntypedef struct {\n  UINT16 audio_id; // audio id\n  UINT16 type;\n  UINT32 size;\n  UINT32 offset;\n} AudioHeader_t;\n\ntypedef struct _AUDIO_List {\n  struct _AUDIO_List *next;\n  AudioHeader_t record;\n} AUDIO_List;\n\n#define AUDIO_TOOL_VERSION 0x6001\n#define MAGIC_NUMBER 0xC0BA\n#define AUDIO_TOOL_RES_MARK 0xDDCCBBAA\n\nUINT16 gVersionNO = 0;\nUINT32 gReserver1 = 0;\nUINT32 gReserver2 = 0;\n\nResourceHeader_t *gpResourceBase =\n    NULL; // base address of resource data, will be set by boot monitor\n\nAUDIO_List *gpAudioList = NULL;\nAUDIO_List *gpAudioList_CN = NULL;\n\nuint8_t *gpAudioDataBase = NULL;\nuint8_t *gpAudioDataBase_CN = NULL;\n\n// uint8_t os_pool_audio_List[sizeof(AUDIO_List)*MAX_RECORD_NUM ]\n// __attribute__((section(\".audioList\")));\nAUDIO_List os_pool_audio_List\n    [MAX_RECORD_NUM]; //__attribute__((section(\".audioList\")));\n// osPoolDef_t os_pool_def_audio_List = { MAX_RECORD_NUM, sizeof(AUDIO_List),\n// os_pool_audio_List };//osPoolDef(name, no, type) osPoolId AUDIO_ListPool_Id;\n\nAUDIO_List os_pool_audio_List_CN[MAX_RECORD_NUM];\n\nUINT8 *aud_get_reouce(AUD_ID_ENUM id, UINT32 *leng, UINT16 *type) {\n  AUDIO_List *list = gpAudioList;\n\n  *leng = 0, *type = 0;\n\n  while (list) {\n    if (list->record.audio_id == id) {\n      *leng = list->record.size;\n      *type = list->record.type;\n      return (UINT8 *)(gpAudioDataBase + list->record.offset);\n    }\n    list = list->next;\n  }\n\n  return 0;\n}\n\nUINT8 *aud_get_reouce_chinese(AUD_ID_ENUM id, UINT32 *leng, UINT16 *type) {\n  AUDIO_List *list = gpAudioList_CN;\n\n  *leng = 0, *type = 0;\n\n  while (list) {\n    if (list->record.audio_id == id) {\n      *leng = list->record.size;\n      *type = list->record.type;\n      return (UINT8 *)(gpAudioDataBase_CN + list->record.offset);\n    }\n    list = list->next;\n  }\n\n  return 0;\n}\n\n/*\n--1.Version No&Magic No.<4>\n--2.CRC\t\t\t\t<4>\n--3.Reserver1\t\t\t<4> total length  = 5+6+7+...\n--4.Reserver2\t\t\t<4>\n--5.ResourceHeader_t\t<8>\n--6.AUDIO_HEAD_LIST X count   <16 x count>\n--7.file.. gpAudioDataBase.. offset\n--.... another resource\n*/\nvoid init_audio_resource(void *gResource) {\n  uint32_t crc;\n  uint32_t *pcrc;\n  uint32_t data;\n\n  UINT32 res_addr;\n  ResourceHeader_t *pRes;\n\n  data = *((UINT32 *)gResource);\n  gVersionNO = 0xFFFF & (data >> 16);\n  gReserver1 = *((UINT32 *)((uint32_t)gResource + 2 * sizeof(UINT32)));\n\n  pcrc = (uint32_t *)((uint32_t)gResource + sizeof(UINT32)); /*crc*/\n\n  gpResourceBase =\n      (ResourceHeader_t *)((uint32_t)gResource + 4 * sizeof(uint32_t));\n  /********************************************************/\n  crc = crc32(0, (uint8_t *)((uint32_t)gpResourceBase), gReserver1);\n  TRACE(3, \"%s, *pcrc: %x ,  crc: %x\", __func__, *pcrc, crc);\n  if (*pcrc != crc)\n    return;\n\n  res_addr = (uint32_t)gpResourceBase;\n  pRes = (ResourceHeader_t *)gpResourceBase;\n\n  while ((UINT32)pRes < (UINT32)gpResourceBase + gReserver1 &&\n         pRes->MARK == AUDIO_TOOL_RES_MARK) {\n    if (pRes->ID == RES_ENGLISH_ID) {\n      AUDIO_List *list;\n      memset(os_pool_audio_List, 0, sizeof(AUDIO_List) * MAX_RECORD_NUM);\n      memcpy((uint8_t *)os_pool_audio_List,\n             (uint8_t *)((uint32_t)pRes + sizeof(ResourceHeader_t)),\n             sizeof(AUDIO_List) * pRes->count);\n\n      gpAudioList = (AUDIO_List *)os_pool_audio_List;\n      list = gpAudioList;\n\n      gpAudioDataBase = (uint8_t *)pRes + sizeof(ResourceHeader_t) +\n                        sizeof(AUDIO_List) * pRes->count;\n      TRACE(3, \"%s,  english count: %d, leng: %d\", __func__, pRes->count,\n            pRes->total_size);\n\n      for (int i = 1; i < pRes->count; i++) {\n        list->next = &os_pool_audio_List[i];\n\n        list = list->next;\n      }\n\n      TRACE(2, \"%s,  english list: %p\", __func__, list);\n\n    } else if (pRes->ID == RES_CHINESE_ID) {\n\n      AUDIO_List *list;\n      TRACE(2, \"%s, AUDIO_TOOL_RES_MARK: %d\", __func__, pRes->count);\n\n      memset(os_pool_audio_List_CN, 0, sizeof(AUDIO_List) * MAX_RECORD_NUM);\n      memcpy((uint8_t *)os_pool_audio_List_CN,\n             (uint8_t *)((uint32_t)pRes + sizeof(ResourceHeader_t)),\n             sizeof(AUDIO_List) * pRes->count);\n\n      gpAudioList_CN = (AUDIO_List *)os_pool_audio_List_CN;\n      list = gpAudioList_CN;\n\n      gpAudioDataBase_CN = (uint8_t *)pRes + sizeof(ResourceHeader_t) +\n                           sizeof(AUDIO_List) * pRes->count;\n      TRACE(3, \"%s, chinese count: %d, leng: %d\", __func__, pRes->count,\n            pRes->total_size);\n\n      for (int i = 1; i < pRes->count; i++) {\n        list->next = &os_pool_audio_List_CN[i];\n\n        list = list->next;\n      }\n    }\n\n    TRACE(3, \"%s, %x,  pRes->total_size: %x\", __func__, res_addr,\n          pRes->total_size);\n\n    res_addr += pRes->total_size;\n    pRes = (ResourceHeader_t *)(res_addr);\n  }\n\n  TRACE(2, \"%s, pRes add: %p\", __func__, pRes);\n}\n\n#if 0\nUINT8 BIN_FILE[] =\n{\n0xba,0xc0,0x01,0x60,0x18,0x17,0x81,0x7a,0x90,0x05,0x00,0x00,0x00,0x00,0x00,0x00,\n0xaa,0xbb,0xcc,0xdd,0x00,0xff,0x1c,0x00,0xc8,0x02,0x00,0x00,0x00,0x00,0x00,0x00,\n0x00,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x01,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x02,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x03,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x1b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x04,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x05,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x2d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x06,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x36,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x07,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x3f,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x08,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x48,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x09,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x51,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x0a,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x5a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x0b,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x63,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x0c,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x6c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x0d,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x75,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x0e,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x7e,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x0f,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x10,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x90,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x11,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0x99,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x12,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x13,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xab,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x14,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xb4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x15,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xbd,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x16,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xc6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x17,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xcf,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x18,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xd8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x19,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xe1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x1a,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xea,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\n0x1b,0x00,0x04,0x00,0x09,0x00,0x00,0x00,0xf3,0x00,0x00,0x00,0x34,0x34,0x34,0x35,\n0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,\n0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,\n0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,\n0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,\n0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,\n0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,\n0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,\n0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,\n0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,\n0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,\n0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,\n0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,\n0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,\n0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,\n0x35,0x35,0x35,0x36,0x36,0x36,0x34,0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0x34,\n0x34,0x34,0x35,0x35,0x35,0x36,0x36,0x36,0xaa,0xbb,0xcc,0xdd,0x01,0xff,0x1c,0x00,\n0xc8,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x1b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x2d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x36,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x3f,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x48,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x51,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0a,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x5a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0b,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x63,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0c,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x6c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x75,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0e,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x7e,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0f,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x90,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x11,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0x99,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x12,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xa2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x13,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xab,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xb4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x15,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xbd,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x16,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xc6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x17,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xcf,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xd8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x19,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xe1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1a,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xea,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1b,0x00,0x04,0x00,0x09,0x00,0x00,0x00,\n0xf3,0x00,0x00,0x00,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,\n0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,\n0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,\n0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,\n0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,\n0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,\n0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,\n0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,\n0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,\n0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,\n0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,\n0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,\n0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,\n0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,\n0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,\n0x31,0x32,0x32,0x32,0x33,0x33,0x33,0x31,0x31,0x31,0x32,0x32,0x32,0x33,0x33,0x33,\n\n};\nvoid test_resource_load()\n{\n\tUINT32 leng;\n\tUINT16 type;\n\tUINT8* data;\n\n\tinit_audio_resource(BIN_FILE);\n\n\tdata = aud_get_reouce(AUD_ID_BT_CALL_REFUSE, &leng, &type);\n\n\tTRACE(6,\"====english_audio, leng = %d, type = %d, data[0] = %x, data[1]= %x, data[2]= %x, data[3]= %x\", leng, type, data[0], data[1], data[2], data[3]);\n\n\tdata = aud_get_reouce_chinese(AUD_ID_BT_CLEAR_SUCCESS, &leng, &type);\n\n\tTRACE(6,\"====chinese_audio, leng = %d, type = %d, data[0] = %x, data[1]= %x, data[2]= %x, data[3]= %x\", leng,type, data[0], data[1], data[2], data[3]);\n\n\n};\n#endif\n#endif\n\nconst char *aud_id_str[] = {\n    \"[POWER_ON]\",\n    \"[POWER_OFF]\",\n    \"[LANGUAGE_SWITCH]\",\n\n    \"[NUM_0]\",\n    \"[NUM_1]\",\n    \"[NUM_2]\",\n    \"[NUM_3]\",\n    \"[NUM_4]\",\n    \"[NUM_5]\",\n    \"[NUM_6]\",\n    \"[NUM_7]\",\n    \"[NUM_8]\",\n    \"[NUM_9]\",\n\n    \"[BT_PAIR_ENABLE]\",\n    \"[BT_PAIRING]\",\n    \"[BT_PAIRING_SUC]\",\n    \"[BT_PAIRING_FAIL]\",\n    \"[BT_CALL_REFUSE]\",\n    \"[BT_CALL_OVER]\",\n    \"[BT_CALL_ANSWER]\",\n    \"[BT_CALL_HUNG_UP]\",\n    \"[BT_CALL_INCOMING_CALL]\",\n    \"[BT_CALL_INCOMING_NUMBER]\",\n    \"[BT_CHARGE_PLEASE]\",\n    \"[BT_CHARGE_FINISH]\",\n    \"[BT_CLEAR_SUCCESS]\",\n    \"[BT_CLEAR_FAIL]\",\n    \"[BT_CONNECTED]\",\n    \"[BT_DIS_CONNECT]\",\n    \"[BT_WARNING]\",\n    \"[BT_ALEXA_START]\",\n    \"[FIND_MY_BUDS]\",\n    \"[TILE FIND]\",\n    \"[BT_ALEXA_STOP]\",\n    \"[BT_GSOUND_MIC_OPEN]\",\n    \"[BT_GSOUND_MIC_CLOSE]\",\n    \"[BT_GSOUND_NC]\",\n    \"[BT_MUTE]\",\n    \"[RING_WARNING]\",\n#ifdef __INTERACTION__\n    \"[BT_FINDME]\",\n#endif\n};\n\nconst char *aud_id2str(UINT16 aud_id) {\n  const char *str = NULL;\n\n  if (aud_id >= 0 && aud_id < MAX_RECORD_NUM) {\n    str = aud_id_str[aud_id];\n  } else {\n    str = \"[UNKNOWN]\";\n  }\n\n  return str;\n}\n"
  },
  {
    "path": "services/resources/resources.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n////////////////////////////////////////////////////////////////\n//\n\n#ifndef __RESOURCES_H__\n#define __RESOURCES_H__\n\ntypedef enum {\n    AUD_ID_INVALID  = -1,\n    AUD_ID_POWER_ON = 0x0,\n    AUD_ID_POWER_OFF,\n    AUD_ID_LANGUAGE_SWITCH,\n\n    AUD_ID_NUM_0,\n    AUD_ID_NUM_1,\n    AUD_ID_NUM_2,\n    AUD_ID_NUM_3,\n    AUD_ID_NUM_4,\n    AUD_ID_NUM_5,\n    AUD_ID_NUM_6,\n    AUD_ID_NUM_7,\n    AUD_ID_NUM_8,\n    AUD_ID_NUM_9,\n\n    AUD_ID_BT_PAIR_ENABLE,\n    AUD_ID_BT_PAIRING,\n    AUD_ID_BT_PAIRING_SUC,\n    AUD_ID_BT_PAIRING_FAIL,\n    AUD_ID_BT_CALL_REFUSE,\n    AUD_ID_BT_CALL_OVER,\n    AUD_ID_BT_CALL_ANSWER,\n    AUD_ID_BT_CALL_HUNG_UP,\n    AUD_ID_BT_CALL_INCOMING_CALL,\n    AUD_ID_BT_CALL_INCOMING_NUMBER,\n    AUD_ID_BT_CHARGE_PLEASE,\n    AUD_ID_BT_CHARGE_FINISH,\n    AUD_ID_BT_CLEAR_SUCCESS,\n    AUD_ID_BT_CLEAR_FAIL,\n    AUD_ID_BT_CONNECTED,\n    AUD_ID_BT_DIS_CONNECT,\n    AUD_ID_BT_WARNING,\n    AUDIO_ID_BT_ALEXA_START,\n    AUDIO_ID_FIND_MY_BUDS,\n    AUDIO_ID_FIND_TILE,\n    AUDIO_ID_BT_ALEXA_STOP,\n    AUDIO_ID_BT_GSOUND_MIC_OPEN,\n    AUDIO_ID_BT_GSOUND_MIC_CLOSE,\n    AUDIO_ID_BT_GSOUND_NC,\n    AUDIO_ID_BT_MUTE,\n    AUDIO_ID_BT_DU,\n    AUDIO_ID_BT_DUDU,\n    AUD_ID_RING_WARNING,\n#ifdef __INTERACTION__\n    AUD_ID_BT_FINDME,\n#endif\n    MAX_RECORD_NUM,\n    AUD_ID_ENUM_BOTTOM = 0x1001,\n} AUD_ID_ENUM;\n\nenum ENUM_RESOURCE_ID\n{\n    RES_ENGLISH_ID = 0xFF00,\n    RES_CHINESE_ID = 0xFF01,\n\n    MAX_RES_LANGUAGE_ID\n};\n\ntypedef uint8_t UINT8;\ntypedef uint16_t UINT16;\ntypedef uint32_t UINT32;\n\nvoid init_audio_resource(void* gResource);\n\nUINT8* aud_get_reouce(AUD_ID_ENUM id, UINT32* leng, UINT16* type);\n\nconst char *aud_id2str(UINT16 aud_id);\n\nextern UINT8 BIN_FILE[];\n\n#endif//__RESOURCES_H__\n\n"
  },
  {
    "path": "services/through_put/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nsubdir-ccflags-y += -Iapps/common \\\n                    -Iapps/key \\\n                    -Iapps/main \\\n                    -Iplatform/drivers/bt \\\n                    -Iplatform/hal \\\n                    -Iservices/ai_voice/audio \\\n                    -Iservices/ai_voice/transport \\\n                    -Iservices/ai_voice/manager \\\n                    -Iservices/ai_voice/protocol/ama/ama_stream \\\n                    -Iservices/app_ai/inc \\\n                    -Iservices/app_ibrt/inc \\\n                    -Iservices/app_tws/inc \\\n                    -Iservices/ble_app/app_main \\\n                    -Iservices/ble_stack/hl/api \\\n                    -Iservices/ble_stack/ble_ip \\\n                    $(BT_IF_INCLUDES) \\\n                    -Iservices/bt_app \\\n                    -Iservices/bt_app/a2dp_codecs/include \\\n                    -Iservices/multimedia/audio/codec/sbc/inc \\\n                    -Iservices/multimedia/speech/inc \\\n                    -Iservices/nvrecord \\\n                    -Iservices/ibrt_core/inc \\\n                    -Iservices/ibrt_ui/inc \\\n                    -Iservices/ble_stack/common/api \\\n                    -Iservices/ble_stack/hl/inc \\\n                    -Iservices/ble_stack/ke/api \\\n                    -Iservices/cp_accel \\\n                    -Iservices/voicepath \\\n                    -Iservices/voicepath/gsound/gsound_custom/inc \\\n                    -Iservices/voicepath/gsound/gsound_target \\\n                    -Iservices/voicepath/gsound/gsound_target_api_read_only \\\n                    -Ithirdparty/userapi \\\n                    -Iutils/cqueue \\\n                    -Iutils/heap \\\n"
  },
  {
    "path": "services/through_put/app_through_put.cpp",
    "content": "#include \"app_through_put.h\"\n#include \"app_ai_if.h\"\n#include \"app_ai_if_config.h\"\n#include \"app_ai_if_custom_ui.h\"\n#include \"app_ai_if_thirdparty.h\"\n#include \"app_ai_manager_api.h\"\n#include \"app_ai_tws.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \n\n#ifdef __AI_VOICE__\n#include \"ai_control.h\"\n#include \"ai_manager.h\"\n#include \"ai_thread.h\"\n#include \"app_ai_voice.h\"\n#endif\n\nstatic THROUGHPUT_TEST_ENV_T throughputTestEnv;\nstatic THROUGHPUT_TEST_CONFIG_T throughputTestConfig;\n\nstatic uint32_t app_throughput_test_transmission_handler(void *param1,\n                                                         uint32_t param2);\n\nstatic APP_THROUGHPUT_CMD_INSTANCE_T *\nfind_throughput_instance_by_code(uint16_t cmdCode) {\n  for (uint32_t index = 0; index < APP_THROUGHPUT_CMD_INSTANCE_NUMBER;\n       index++) {\n    if (through_put_table[index].cmdCode == cmdCode) {\n      return &through_put_table[index];\n    }\n  }\n\n  return NULL;\n}\n\nbool app_throughput_send_command(APP_THROUGHPUT_CMD_CODE_E cmdCode,\n                                 uint8_t *ptrParam, uint32_t paramLen) {\n  APP_THROUGHPUT_CMD_PAYLOAD_T payload;\n  uint16_t cmd_len = 0;\n\n  if (THROUGHPUT_DATA_MAX_SIZE < paramLen) {\n    TRACE(1, \"%s error \", __func__);\n    return false;\n  }\n\n  payload.cmdCode = cmdCode;\n  payload.paramLen = paramLen;\n  memcpy(payload.param, ptrParam, paramLen);\n\n  cmd_len = (uint32_t)THROUGHPUT_CMD_PAYLOAD_HEADER_LEN + payload.paramLen;\n  app_ai_if_custom_ui_send_cmd((uint8_t *)&payload, cmd_len);\n\n  return true;\n}\n\nuint32_t app_throughput_cmd_send_done(void *param1, uint32_t param2) {\n  if (throughputTestEnv.isThroughputTestOn &&\n      ((app_ai_get_transport_type() == AI_TRANSPORT_BLE) ||\n       (WITHOUT_RSP == throughputTestConfig.responseModel))) {\n    app_throughput_test_transmission_handler(NULL, 0);\n  }\n\n  return 0;\n}\n\nuint32_t app_throughput_receive_cmd(void *param1, uint32_t param2) {\n  uint8_t *ptrbuf = NULL;\n  uint32_t data_length = 0;\n  APP_THROUGHPUT_CMD_PAYLOAD_T *pPayload = NULL;\n\n  TRACE(2, \"%s data len %d\", __func__, param2);\n  // DUMP8(\"0x%02x \", param1, param2);\n\n  data_length = param2;\n  while (data_length) {\n    ptrbuf = (uint8_t *)((uint32_t)param1 + param2 - data_length);\n\n    pPayload = (APP_THROUGHPUT_CMD_PAYLOAD_T *)ptrbuf;\n    data_length -= THROUGHPUT_CMD_PAYLOAD_HEADER_LEN;\n    if (data_length < pPayload->paramLen) {\n      TRACE(3, \"%s error data_length %d paramLen %d\", __func__, data_length,\n            pPayload->paramLen);\n      return 2;\n    }\n    TRACE(3, \"%s data_length %d  paramLen %d\", __func__, data_length,\n          pPayload->paramLen);\n    data_length -= pPayload->paramLen;\n\n    // check parameter length\n    if (pPayload->paramLen > sizeof(pPayload->param)) {\n      TRACE(0, \"SV COMMAND PARAM ERROR LENGTH\");\n      return 4;\n    }\n\n    APP_THROUGHPUT_CMD_INSTANCE_T *pInstance =\n        find_throughput_instance_by_code(pPayload->cmdCode);\n\n    // execute the command handler\n    if (pInstance) {\n      pInstance->cmdHandler((APP_THROUGHPUT_CMD_CODE_E)(pPayload->cmdCode),\n                            pPayload->param, pPayload->paramLen);\n    }\n  }\n\n  return 0;\n}\n\n#define APP_THROUGHPUT_PRE_CONFIG_PENDING_TIME_IN_MS 2000\nstatic void app_throughput_pre_config_pending_timer_cb(void const *n);\nosTimerDef(APP_THROUGHPUT_PRE_CONFIG_PENDING_TIMER,\n           app_throughput_pre_config_pending_timer_cb);\nosTimerId app_throughput_pre_config_pending_timer_id = NULL;\n\nstatic void app_throughput_test_data_xfer_lasting_timer_cb(void const *n);\nosTimerDef(APP_THROUGHPUT_TEST_DATA_XFER_LASTING_TIMER,\n           app_throughput_test_data_xfer_lasting_timer_cb);\nosTimerId app_throughput_test_data_xfer_lasting_timer_id = NULL;\n\nstatic uint8_t app_throughput_datapattern[THROUGHPUT_DATA_MAX_SIZE];\n\nstatic void app_throughput_test_data_xfer_lasting_timer_cb(void const *n) {\n  app_throughput_send_command(THROUGHPUT_OP_THROUGHPUT_TEST_DONE, NULL, 0);\n\n  app_stop_throughput_test();\n}\n\nstatic void app_throughput_pre_config_pending_timer_cb(void const *n) {\n  // inform the configuration\n  app_throughput_send_command(THROUGHPUT_OP_INFORM_THROUGHPUT_TEST_CONFIG,\n                              (uint8_t *)&throughputTestConfig,\n                              sizeof(throughputTestConfig));\n\n  if (UP_STREAM == throughputTestConfig.direction) {\n    app_throughput_test_transmission_handler(NULL, 0);\n#ifndef SLAVE_ADV_BLE\n    osTimerStart(app_throughput_test_data_xfer_lasting_timer_id,\n                 throughputTestConfig.lastTimeInSecond * 1000);\n#endif\n  }\n}\n\nvoid app_throughput_test_init(void) {\n  memset(&throughputTestEnv, 0x00, sizeof(throughputTestEnv));\n  memset(&throughputTestConfig, 0x00, sizeof(throughputTestConfig));\n\n  app_throughput_pre_config_pending_timer_id = osTimerCreate(\n      osTimer(APP_THROUGHPUT_PRE_CONFIG_PENDING_TIMER), osTimerOnce, NULL);\n\n  app_throughput_test_data_xfer_lasting_timer_id = osTimerCreate(\n      osTimer(APP_THROUGHPUT_TEST_DATA_XFER_LASTING_TIMER), osTimerOnce, NULL);\n}\n\nstatic uint32_t app_throughput_test_transmission_handler(void *param1,\n                                                         uint32_t param2) {\n  if (UP_STREAM == throughputTestConfig.direction) {\n    app_throughput_send_command(THROUGHPUT_OP_THROUGHPUT_TEST_DATA,\n                                app_throughput_datapattern,\n                                throughputTestConfig.dataPacketSize - 4);\n  }\n\n  return 0;\n}\n\nstatic void app_throughput_test_data_handler(APP_THROUGHPUT_CMD_CODE_E funcCode,\n                                             uint8_t *ptrParam,\n                                             uint32_t paramLen) {\n  if ((WITH_RSP == throughputTestConfig.responseModel) &&\n      (AI_TRANSPORT_SPP == app_ai_get_transport_type())) {\n    app_throughput_send_command(THROUGHPUT_OP_THROUGHPUT_TEST_DATA_ACK, NULL,\n                                0);\n  }\n}\n\nstatic void\napp_throughput_test_data_ack_handler(APP_THROUGHPUT_CMD_CODE_E funcCode,\n                                     uint8_t *ptrParam, uint32_t paramLen) {\n  if (throughputTestEnv.isThroughputTestOn &&\n      (WITH_RSP == throughputTestConfig.responseModel)) {\n    app_throughput_test_transmission_handler(NULL, 0);\n  }\n}\n\nstatic void\napp_throughput_test_done_signal_handler(APP_THROUGHPUT_CMD_CODE_E funcCode,\n                                        uint8_t *ptrParam, uint32_t paramLen) {\n  app_stop_throughput_test();\n}\n\nvoid app_stop_throughput_test(void) {\n  throughputTestEnv.isThroughputTestOn = false;\n  osTimerStop(app_throughput_pre_config_pending_timer_id);\n  osTimerStop(app_throughput_test_data_xfer_lasting_timer_id);\n}\n\nstatic void\napp_throughput_test_config_handler(APP_THROUGHPUT_CMD_CODE_E funcCode,\n                                   uint8_t *ptrParam, uint32_t paramLen) {\n  throughputTestConfig = *(THROUGHPUT_TEST_CONFIG_T *)ptrParam;\n\n  TRACE(4, \"%s patter %d time %d response %d\", __func__,\n        throughputTestConfig.dataPattern, throughputTestConfig.lastTimeInSecond,\n        throughputTestConfig.responseModel);\n\n  // generate the data pattern\n  switch (throughputTestConfig.dataPattern) {\n  case PATTERN_RANDOM: {\n    for (uint32_t index = 0; index < THROUGHPUT_DATA_MAX_SIZE; index++) {\n      app_throughput_datapattern[index] = (uint8_t)rand();\n    }\n    break;\n  }\n  case PATTERN_11110000: {\n    memset(app_throughput_datapattern, 0xF0, THROUGHPUT_DATA_MAX_SIZE);\n    break;\n  }\n  case PATTERN_10101010: {\n    memset(app_throughput_datapattern, 0xAA, THROUGHPUT_DATA_MAX_SIZE);\n    break;\n  }\n  case PATTERN_ALL_1: {\n    memset(app_throughput_datapattern, 0xFF, THROUGHPUT_DATA_MAX_SIZE);\n    break;\n  }\n  case PATTERN_ALL_0: {\n    memset(app_throughput_datapattern, 0, THROUGHPUT_DATA_MAX_SIZE);\n    break;\n  }\n  case PATTERN_00001111: {\n    memset(app_throughput_datapattern, 0x0F, THROUGHPUT_DATA_MAX_SIZE);\n    break;\n  }\n  case PATTERN_0101: {\n    memset(app_throughput_datapattern, 0x55, THROUGHPUT_DATA_MAX_SIZE);\n    break;\n  }\n  default:\n    throughputTestConfig.dataPattern = 0;\n    break;\n  }\n\n  throughputTestEnv.isThroughputTestOn = true;\n  throughputTestEnv.conidx = app_ai_if_get_ble_connection_index();\n  TRACE(2, \"conidx 0x%x useSpecificConnParameter %d\", throughputTestEnv.conidx,\n        throughputTestConfig.isToUseSpecificConnParameter);\n\n  // check whether need to use the new conn parameter\n  if (AI_TRANSPORT_BLE == app_ai_get_transport_type() &&\n      throughputTestConfig.isToUseSpecificConnParameter) {\n    if (throughputTestEnv.conidx != 0xFF) {\n      l2cap_update_param(throughputTestEnv.conidx,\n                         throughputTestConfig.minConnIntervalInMs,\n                         throughputTestConfig.maxConnIntervalInMs,\n                         THROUGHPUT_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS,\n                         THROUGHPUT_BLE_CONNECTION_SLAVELATENCY);\n    }\n\n    osTimerStart(app_throughput_pre_config_pending_timer_id,\n                 APP_THROUGHPUT_PRE_CONFIG_PENDING_TIME_IN_MS);\n  } else {\n    app_throughput_send_command(THROUGHPUT_OP_INFORM_THROUGHPUT_TEST_CONFIG,\n                                (uint8_t *)&throughputTestConfig,\n                                sizeof(throughputTestConfig));\n\n    if (UP_STREAM == throughputTestConfig.direction) {\n      app_throughput_test_transmission_handler(NULL, 0);\n      osTimerStart(app_throughput_test_data_xfer_lasting_timer_id,\n                   throughputTestConfig.lastTimeInSecond * 1000);\n    }\n  }\n}\n\nAPP_THROUGHPUT_CMD_INSTANCE_T\nthrough_put_table[APP_THROUGHPUT_CMD_INSTANCE_NUMBER] = {\n    {THROUGHPUT_OP_INFORM_THROUGHPUT_TEST_CONFIG,\n     app_throughput_test_config_handler},\n    {THROUGHPUT_OP_THROUGHPUT_TEST_DATA, app_throughput_test_data_handler},\n    {THROUGHPUT_OP_THROUGHPUT_TEST_DATA_ACK,\n     app_throughput_test_data_ack_handler},\n    {THROUGHPUT_OP_THROUGHPUT_TEST_DONE,\n     app_throughput_test_done_signal_handler}};\n"
  },
  {
    "path": "services/through_put/app_through_put.h",
    "content": "#ifndef APP_THROUGH_PUT_H_\n#define APP_THROUGH_PUT_H_\n\n/*\n * INCLUDE FILES\n ****************************************************************************************\n */\n#include \"app_spp.h\"\n\n#define APP_THROUGHPUT_CMD_INSTANCE_NUMBER            4\n\n#define THROUGHPUT_BLE_CONNECTION_INTERVAL_MIN_IN_MS            50\n#define THROUGHPUT_BLE_CONNECTION_INTERVAL_MAX_IN_MS            60\n#define THROUGHPUT_BLE_CONNECTION_SUPERVISOR_TIMEOUT_IN_MS      20000\n#define THROUGHPUT_BLE_CONNECTION_SLAVELATENCY                  0\n\ntypedef enum\n{\n    PATTERN_RANDOM = 0,\n    PATTERN_11110000,\n    PATTERN_10101010,\n    PATTERN_ALL_1,\n    PATTERN_ALL_0,\n    PATTERN_00001111,\n    PATTERN_0101,\n} THROUGHPUT_TEST_DATA_PATTER_E;\n\ntypedef enum\n{\n    UP_STREAM = 0,\n    DOWN_STREAM\n} THROUGHPUT_TEST_DATA_DIRECTION_E;\n\ntypedef enum\n{\n    WITHOUT_RSP = 0,\n    WITH_RSP\n} THROUGHPUT_TEST_RESPONSE_MODEL_E;\n\n\ntypedef struct\n{\n    bool        isThroughputTestOn;\n    uint8_t     conidx;\n} THROUGHPUT_TEST_ENV_T;\n\ntypedef struct\n{\n    uint8_t     dataPattern;\n    uint16_t    lastTimeInSecond;\n    uint16_t    dataPacketSize;\n    uint8_t     direction;\n    uint8_t     responseModel;\n    uint8_t     isToUseSpecificConnParameter;\n    uint16_t    minConnIntervalInMs;\n    uint16_t    maxConnIntervalInMs;\n    uint8_t     reserve[4];\n} __attribute__((__packed__)) THROUGHPUT_TEST_CONFIG_T;\n\n/**\n * @brief The command code\n *\n */\ntypedef enum\n{\n#ifdef __GMA_VOICE__\n    /* 9 */  THROUGHPUT_OP_INFORM_THROUGHPUT_TEST_CONFIG = 0x89,\n    /* 10 */ THROUGHPUT_OP_THROUGHPUT_TEST_DATA = 0x8A,\n    /* 11 */ THROUGHPUT_OP_THROUGHPUT_TEST_DATA_ACK = 0x8B,\n    /* 12 */ THROUGHPUT_OP_THROUGHPUT_TEST_DONE = 0x8C,\n#else\n    /* 9 */  THROUGHPUT_OP_INFORM_THROUGHPUT_TEST_CONFIG = 0x8009,\n    /* 10 */ THROUGHPUT_OP_THROUGHPUT_TEST_DATA = 0x800A,\n    /* 11 */ THROUGHPUT_OP_THROUGHPUT_TEST_DATA_ACK = 0x800B,\n    /* 12 */ THROUGHPUT_OP_THROUGHPUT_TEST_DONE = 0x800C,\n#endif\n} APP_THROUGHPUT_CMD_CODE_E;\n\n/**\n * @brief custom command playload\n *\n */\n#define THROUGHPUT_CMD_PAYLOAD_HEADER_LEN (2*sizeof(uint16_t))\n #define THROUGHPUT_DATA_MAX_SIZE (L2CAP_MTU - THROUGHPUT_CMD_PAYLOAD_HEADER_LEN)\ntypedef struct\n{\n    uint16_t    cmdCode;        /**< command code, from APP_SV_CMD_CODE_E */\n    uint16_t    paramLen;       /**< length of the following parameter */\n    uint8_t     param[THROUGHPUT_DATA_MAX_SIZE];\n} APP_THROUGHPUT_CMD_PAYLOAD_T;\n\n/**\n * @brief through put command definition data structure\n *\n */\ntypedef void (*app_through_cmd_handler_t)(APP_THROUGHPUT_CMD_CODE_E cmdCode, uint8_t* ptrParam, uint32_t paramLen);\ntypedef struct\n{\n    uint32_t                cmdCode;\n    app_through_cmd_handler_t    cmdHandler;             /**< command handler function */\n} APP_THROUGHPUT_CMD_INSTANCE_T;\nextern APP_THROUGHPUT_CMD_INSTANCE_T through_put_table[];\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\n/*---------------------------------------------------------------------------\n *            app_throughput_cmd_send_done\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    thourghput cmd send done callback\n *\n * Parameters:\n *    param1 -- callback data \n *    param2 -- callback data length\n *\n * Return:\n *    void\n */\nuint32_t app_throughput_cmd_send_done(void *param1, uint32_t param2);\n\n/*---------------------------------------------------------------------------\n *            app_throughput_receive_cmd\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    thourghput receive and handle cmd\n *\n * Parameters:\n *    param1 -- receive data \n *    param2 -- receive data length\n *\n * Return:\n *    void\n */\nuint32_t app_throughput_receive_cmd(void *param1, uint32_t param2);\n\n/*---------------------------------------------------------------------------\n *            app_stop_throughput_test\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    stop throughput test\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_stop_throughput_test(void);\n\n/*---------------------------------------------------------------------------\n *            app_throughput_test_init\n *---------------------------------------------------------------------------\n *\n *Synopsis:\n *    init throughput test\n *\n * Parameters:\n *    void\n *\n * Return:\n *    void\n */\nvoid app_throughput_test_init(void);\n\n#ifdef __cplusplus\n    }\n#endif\n\n\n#endif //APP_THROUGH_PUT_H_\n\n"
  },
  {
    "path": "services/tota/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nTOTA_LIB_NAME := libtota\n\n$(TOTA_LIB_NAME)-y := $(src_obj)\n\nobj-y += $(TOTA_LIB_NAME).a\n\nsubdir-ccflags-y += -Iplatform/drivers/ana \\\n\t\t\t\t\t-Iplatform/hal \\\n\t\t\t\t\t-Iservices/bluedroid/adapter/src \\\n\t\t\t\t\t-Iapps/key \\\n\t\t\t\t\t-Iservices/app_tws/inc \\\n\t\t\t\t\t-Iservices/audio_eq \\\n\t\t\t\t\t-Iservices/fs/fat \\\n\t\t\t\t\t-Iservices/fs/sd \\\n\t\t\t\t\t-Iservices/fs/fat/ChaN \\\n\t\t\t\t\t$(BT_IF_INCLUDES) \\\n\t\t\t\t\t-Iservices/overlay \\\n\t\t\t\t\t-Iservices/nvrecord \\\n\t\t\t\t\t-Iservices/resources \\\n\t\t\t\t\t-Iservices/multimedia/audio/codec/sbc/inc \\\n\t\t\t\t\t-Iservices/bt_app/a2dp_codecs/include \\\n\t\t\t\t\t-Iplatform/drivers/uarthci \\\n\t\t\t\t\t-Iplatform/drivers/ana \\\n\t\t\t\t\t-Iplatform/drivers/bt \\\n\t\t\t\t\t-Iutils/cqueue \\\n\t\t\t\t\t-Iutils/heap \\\n\t\t\t\t\t-Iutils/retention_ram \\\n\t\t\t\t\t-Iservices/audioflinger \\\n\t\t\t\t\t-Iutils/lockcqueue \\\n\t\t\t\t\t-Iutils/intersyshci \\\n                    -Iutils/boot_struct \\\n\t\t\t\t\t-Iutils/encrypt \\\n\t\t\t\t\t-Iutils/sha256 \\\n\t\t\t\t\t-Iapps/main \\\n\t\t\t\t\t-Iapps/common \\\n\t\t\t\t\t-Iapps/audioplayers \\\n\t\t\t\t\t-Iservices/app_ai/inc \\\n\t\t\t\t\t-Iapps/factory \\\n\t\t\t\t\t-Iservices/ble_app \\\n\t\t\t\t\t-Iservices/ble_app/app_tota \\\n\t\t\t\t\t-Iservices/ble_stack/ble_ip \\\n\t\t\t\t\t-Iservices/ble_stack/hl/api \\\n\t\t\t\t\t-Iservices/ble_stack/app/api/  \\\n\t\t\t\t\t-Iservices/ble_stack/common/api/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/inc/ \\\n\t\t\t\t\t-Iservices/ble_stack/ke/api \\\n\t\t\t\t\t-Iservices/bridge/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/gapc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/gapm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gap/smpc/ \\\n\t\t\t\t\t-Iservices/ble_stack/ke/src/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/attc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/attm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/atts/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/gattc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/gattm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/gatt/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/l2c/l2cc/ \\\n\t\t\t\t\t-Iservices/ble_stack/hl/src/l2c/l2cm/ \\\n\t\t\t\t\t-Iservices/ble_stack/hci/api/ \\\n\t\t\t\t\t-Iservices/ble_stack/hci/src/ \\\n\t\t\t\t\t-Iservices/ble_stack/app/src/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/htpt/api/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/htpt/src/  \\\n\t\t\t\t\t-Iservices/ble_profiles/htp/\t\\\n\t\t\t\t\t-Iservices/ble_profiles/datapath/datapathps/api/  \\\n\t\t\t\t\t-Iservices/ble_app/app_main/ \\\n\t\t\t\t\t-Iservices/ble_app/app_htp/\t\\\n\t\t\t\t\t-Iservices/ble_app/app_datapath/\t\\\n\t\t\t\t\t-Iservices/bt_app \\\n\t\t\t\t\t-Iservices/ble_app/app_vob \\\n\t\t\t\t\t-Iservices/multimedia/speech/codec/codecs/adpcm \\\n\t\t\t\t\t-Iservices/ble_app/app_smartvoice \\\n\t\t\t\t\t-Iservices/ble_profiles/smartvoice \\\n\t\t\t\t\t-Iservices/anc_spp_tool \\\n                    -Iservices/tws/inc \\\n\t\t\t\t\t-Iservices/ibrt_core/inc \\\n\t\t\t\t\t-Iutils/crc32 \\\n\t\t\t\t\t-Iservices/app_ibrt/inc \\\n\t\t\t\t\t-Ithirdparty/userapi \\\n\t\t\t\t\t-Iapps/battery \\\n\t\t\t\t\t-Iservices/nv_section/factory_section \\\n\t\t\t\t\t-Iservices/ \\\n\t\t\t\t\t-Iservices/app_tws/inc/\n\t\t\t\t\t\n"
  },
  {
    "path": "services/tota/app_spp_tota.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_status_ind.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_env.h\"\n#include \n//#include \"nvrecord_dev.h\"\n\n#include \"app_spp.h\"\n#include \"app_spp_tota.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"app_tota_data_handler.h\"\n#include \"bluetooth.h\"\n#include \"cqueue.h\"\n#include \"plat_types.h\"\n#include \"resources.h\"\n#include \"sdp_api.h\"\n#include \"spp_api.h\"\n//#include \"app_bt_conn_mgr.h\"\n\n#include \"tota_stream_data_transfer.h\"\n\nstatic bool isTotaSppConnected = false;\nstatic struct spp_device *tota_spp_dev = NULL;\nstatic struct spp_service *totaSppService = NULL;\n\nosMutexDef(tota_spp_mutex);\nosMutexDef(tota_credit_mutex);\n\nstatic btif_sdp_record_t *tota_sdp_record = NULL;\n\nstatic uint8_t totaSppTxBuf[TOTA_SPP_TX_BUF_SIZE];\nstatic uint8_t spp_rx_buf[SPP_RECV_BUFFER_SIZE];\n\nstatic uint32_t occupiedTotaSppTxBufSize;\nstatic uint32_t offsetToFillTotaSppTxData;\nstatic uint8_t *ptrTotaSppTxBuf;\n\n#if (TOTA_SHARE_TX_RX_BUF == 1)\nstatic const bool spp_share_application_rx_tx_buf = true;\n#else\nstatic const bool spp_share_application_rx_tx_buf = false;\n#endif\n\n/**/\nstatic map s_module_map;\nstatic tota_callback_func_t s_module_func;\nstatic APP_TOTA_MODULE_E s_module;\n\n/* register callback module */\nvoid tota_callback_module_register(APP_TOTA_MODULE_E module,\n                                   tota_callback_func_t tota_callback_func) {\n  map::iterator it =\n      s_module_map.find(module);\n  if (it == s_module_map.end()) {\n    TOTA_LOG_DBG(0, \"add to map\");\n    s_module_map.insert(make_pair(module, tota_callback_func));\n  } else {\n    TOTA_LOG_DBG(0, \"already exist, not add\");\n  }\n}\n/* set current module */\nvoid tota_callback_module_set(APP_TOTA_MODULE_E module) {\n  map::iterator it =\n      s_module_map.find(module);\n  if (it != s_module_map.end()) {\n    s_module = module;\n    s_module_func = it->second;\n\n    TOTA_LOG_DBG(1, \"set %d module success\", module);\n  } else {\n    TOTA_LOG_DBG(0, \"not find callback func by module\");\n  }\n}\n\n/* get current module */\nAPP_TOTA_MODULE_E tota_callback_module_get() { return s_module; }\n\n/* is tota busy, use to handle sniff */\nbool spp_tota_in_progress(void) {\n  TOTA_LOG_DBG(2, \"[%s] isTotaSppConnected:%d\", __func__, isTotaSppConnected);\n  if (isTotaSppConnected == true)\n    return true;\n  else\n    return false;\n}\n\nvoid app_spp_tota_share_buf_create(uint8_t **tota_tx_buf,\n                                   uint8_t **tota_rx_buf) {\n  *tota_tx_buf = NULL;\n  *tota_rx_buf = NULL;\n\n  if (spp_share_application_rx_tx_buf == true) {\n    *tota_tx_buf = totaSppTxBuf;\n    *tota_rx_buf = spp_rx_buf;\n  }\n}\n\nbool app_spp_tota_is_to_share_buf(void) {\n  return spp_share_application_rx_tx_buf;\n}\n\nuint8_t *app_spp_tota_share_tx_buf_get(void) {\n  return (spp_share_application_rx_tx_buf == true) ? (totaSppTxBuf) : (NULL);\n}\nuint8_t *app_spp_tota_share_rx_buf_get(void) {\n  return (spp_share_application_rx_tx_buf == true) ? (spp_rx_buf) : (NULL);\n}\n\nuint16_t app_spp_tota_tx_buf_size(void) { return TOTA_SPP_TX_BUF_SIZE; }\n\nvoid app_spp_tota_init_tx_buf(uint8_t *ptr) {\n  ptrTotaSppTxBuf = ptr;\n  occupiedTotaSppTxBufSize = 0;\n  offsetToFillTotaSppTxData = 0;\n}\n\nextern \"C\" APP_TOTA_CMD_RET_STATUS_E\napp_tota_data_received(uint8_t *ptrData, uint32_t dataLength);\nextern \"C\" APP_TOTA_CMD_RET_STATUS_E app_tota_cmd_received(uint8_t *ptrData,\n                                                           uint32_t dataLength);\n\n/****************************************************************************\n * TOTA SPP SDP Entries\n ****************************************************************************/\n\n/*---------------------------------------------------------------------------\n *\n * ServiceClassIDList\n */\nstatic const U8 TotaSppClassId[] = {\n    SDP_ATTRIB_HEADER_8BIT(3),      /* Data Element Sequence, 6 bytes */\n    SDP_UUID_16BIT(SC_SERIAL_PORT), /* Hands-Free UUID in Big Endian */\n};\n\nstatic const U8 TotaSppProtoDescList[] = {\n    SDP_ATTRIB_HEADER_8BIT(12), /* Data element sequence, 12 bytes */\n\n    /* Each element of the list is a Protocol descriptor which is a\n     * data element sequence. The first element is L2CAP which only\n     * has a UUID element.\n     */\n    SDP_ATTRIB_HEADER_8BIT(3), /* Data element sequence for L2CAP, 3\n                                * bytes\n                                */\n\n    SDP_UUID_16BIT(PROT_L2CAP), /* Uuid16 L2CAP */\n\n    /* Next protocol descriptor in the list is RFCOMM. It contains two\n     * elements which are the UUID and the channel. Ultimately this\n     * channel will need to filled in with value returned by RFCOMM.\n     */\n\n    /* Data element sequence for RFCOMM, 5 bytes */\n    SDP_ATTRIB_HEADER_8BIT(5),\n\n    SDP_UUID_16BIT(PROT_RFCOMM), /* Uuid16 RFCOMM */\n\n    /* Uint8 RFCOMM channel number - value can vary */\n    SDP_UINT_8BIT(RFCOMM_CHANNEL_TOTA)};\n\n/*\n * BluetoothProfileDescriptorList\n */\nstatic const U8 TotaSppProfileDescList[] = {\n    SDP_ATTRIB_HEADER_8BIT(8), /* Data element sequence, 8 bytes */\n\n    /* Data element sequence for ProfileDescriptor, 6 bytes */\n    SDP_ATTRIB_HEADER_8BIT(6),\n\n    SDP_UUID_16BIT(SC_SERIAL_PORT), /* Uuid16 SPP */\n    SDP_UINT_16BIT(0x0102)          /* As per errata 2239 */\n};\n\n/*\n * * OPTIONAL *  ServiceName\n */\nstatic const U8 TotaSppServiceName1[] = {\n    SDP_TEXT_8BIT(5), /* Null terminated text string */\n    'S',\n    'p',\n    'p',\n    '1',\n    '\\0'};\n\nstatic const U8 TotaSppServiceName2[] = {\n    SDP_TEXT_8BIT(5), /* Null terminated text string */\n    'S',\n    'p',\n    'p',\n    '2',\n    '\\0'};\n\n/* SPP attributes.\n *\n * This is a ROM template for the RAM structure used to register the\n * SPP SDP record.\n */\n// static const SdpAttribute TotaSppSdpAttributes1[] = {\nstatic sdp_attribute_t TotaSppSdpAttributes1[] = {\n\n    SDP_ATTRIBUTE(AID_SERVICE_CLASS_ID_LIST, TotaSppClassId),\n\n    SDP_ATTRIBUTE(AID_PROTOCOL_DESC_LIST, TotaSppProtoDescList),\n\n    SDP_ATTRIBUTE(AID_BT_PROFILE_DESC_LIST, TotaSppProfileDescList),\n\n    /* SPP service name*/\n    SDP_ATTRIBUTE((AID_SERVICE_NAME + 0x0100), TotaSppServiceName1),\n};\n\n/*\nstatic sdp_attribute_t TotaSppSdpAttributes2[] = {\n\n    SDP_ATTRIBUTE(AID_SERVICE_CLASS_ID_LIST, TotaSppClassId),\n\n    SDP_ATTRIBUTE(AID_PROTOCOL_DESC_LIST, TotaSppProtoDescList),\n\n    SDP_ATTRIBUTE(AID_BT_PROFILE_DESC_LIST, TotaSppProfileDescList),\n\n\n    SDP_ATTRIBUTE((AID_SERVICE_NAME + 0x0100), TotaSppServiceName2),\n};\n*/\n\nint tota_spp_handle_data_event_func(void *pDev, uint8_t process, uint8_t *pData,\n                                    uint16_t dataLen) {\n  TOTA_LOG_DBG(2, \"[%s]data receive length = %d\", __func__, dataLen);\n  TOTA_LOG_DUMP(\"[0x%x]\", pData, dataLen);\n\n  if (s_module_func.tota_spp_data_receive_hanle != NULL)\n    s_module_func.tota_spp_data_receive_hanle(pData, (uint32_t)dataLen);\n\n  // the first two bytes of the data packet is the fixed value 0xFFFF\n  app_tota_handle_received_data(pData, dataLen);\n\n  return 0;\n}\n\nstatic void spp_tota_callback(struct spp_device *locDev,\n                              struct spp_callback_parms *Info) {\n  if (BTIF_SPP_EVENT_REMDEV_CONNECTED == Info->event) {\n    TOTA_LOG_DBG(1, \"::BTIF_SPP_EVENT_REMDEV_CONNECTED %d\\n\", Info->event);\n    isTotaSppConnected = true;\n    app_tota_connected(APP_TOTA_CONNECTED);\n    app_tota_update_datapath(APP_TOTA_VIA_SPP);\n    // conn_stop_connecting_mobile_supervising();\n    if (s_module_func.tota_spp_connected != NULL)\n      s_module_func.tota_spp_connected();\n  } else if (BTIF_SPP_EVENT_REMDEV_DISCONNECTED == Info->event) {\n    TOTA_LOG_DBG(1, \"::BTIF_SPP_EVENT_REMDEV_DISCONNECTED %d\\n\", Info->event);\n    isTotaSppConnected = false;\n    app_tota_disconnected(APP_TOTA_DISCONNECTED);\n    app_tota_update_datapath(APP_TOTA_PATH_IDLE);\n    if (s_module_func.tota_spp_disconnected != NULL)\n      s_module_func.tota_spp_disconnected();\n  } else if (BTIF_SPP_EVENT_DATA_SENT == Info->event) {\n    app_tota_tx_done_callback();\n    if (s_module_func.tota_spp_tx_done != NULL)\n      s_module_func.tota_spp_tx_done();\n  } else {\n    TOTA_LOG_DBG(1, \"::unknown event %d\\n\", Info->event);\n  }\n}\n\nbool app_spp_tota_send_data(uint8_t *ptrData, uint16_t length) {\n  if (!isTotaSppConnected) {\n    return false;\n  }\n  btif_spp_write(tota_spp_dev, (char *)ptrData, &length);\n  return true;\n}\n\nvoid app_spp_tota_init(void) {\n  uint8_t *rx_buf;\n  uint8_t *tx_buf;\n  osMutexId mid;\n  btif_sdp_record_param_t param;\n\n  if (tota_spp_dev == NULL)\n    tota_spp_dev = btif_create_spp_device();\n\n  if (app_spp_tota_is_to_share_buf() == true) {\n    app_spp_tota_share_buf_create(&tx_buf, &rx_buf);\n  } else {\n    rx_buf = &spp_rx_buf[0];\n    tx_buf = &totaSppTxBuf[0];\n  }\n\n  tota_spp_dev->rx_buffer = rx_buf;\n\n  app_spp_tota_init_tx_buf(tx_buf);\n  btif_spp_init_rx_buf(tota_spp_dev, rx_buf, SPP_RECV_BUFFER_SIZE);\n\n  mid = osMutexCreate(osMutex(tota_spp_mutex));\n  if (!mid) {\n    ASSERT(0, \"cannot create mutex\");\n  }\n\n  osMutexId creditMutex = osMutexCreate(osMutex(tota_credit_mutex));\n\n  tota_spp_dev->creditMutex = creditMutex;\n\n  if (tota_sdp_record == NULL)\n    tota_sdp_record = btif_sdp_create_record();\n\n  param.attrs = &TotaSppSdpAttributes1[0],\n  param.attr_count = ARRAY_SIZE(TotaSppSdpAttributes1);\n  param.COD = BTIF_COD_MAJOR_PERIPHERAL;\n  btif_sdp_record_setup(tota_sdp_record, ¶m);\n\n  if (totaSppService == NULL)\n    totaSppService = btif_create_spp_service();\n\n  totaSppService->rf_service.serviceId = RFCOMM_CHANNEL_TOTA;\n  totaSppService->numPorts = 0;\n  btif_spp_service_setup(tota_spp_dev, totaSppService, tota_sdp_record);\n\n  tota_spp_dev->portType = BTIF_SPP_SERVER_PORT;\n  tota_spp_dev->app_id = BTIF_APP_SPP_SERVER_TOTA_ID;\n  tota_spp_dev->spp_handle_data_event_func = tota_spp_handle_data_event_func;\n  btif_spp_init_device(tota_spp_dev, 5, mid);\n\n  btif_spp_open(tota_spp_dev, NULL, spp_tota_callback);\n}\n"
  },
  {
    "path": "services/tota/app_spp_tota.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_SPP_TOTA_H__\n#define __APP_SPP_TOTA_H__\n#include \n#include \nusing namespace std;\n\n#define TOTA_SPP_ID                  0\n#define TOTA_SPP_MAX_PACKET_SIZE     600\n#define TOTA_SPP_MAX_PACKET_NUM      5\n\n\n#define TOTA_SPP_TX_BUF_SIZE        (TOTA_SPP_MAX_PACKET_SIZE*TOTA_SPP_MAX_PACKET_NUM)\n\n#define APP_TOTA_DATA_CMD_TIME_OUT_IN_MS    5000\n\n/**\n * @brief Type of the tota module\n *\n */\ntypedef enum\n{\n    APP_TOTA_AUDIO_DUMP = 0,\n    APP_TOTA_MIC,\n    APP_TOTA_FLASH,\n    APP_TOTA_ANC,\n    APP_TOTA_GENERAL,\n    APP_TOTA_CUSTOM,\n\n    APP_TOTA_MODULE_NONE = 0xFF\n} APP_TOTA_MODULE_E;\n\n\ntypedef struct{\n    void (*tota_spp_connected)(void);\n    void (*tota_spp_disconnected)(void);\n    void (*tota_spp_tx_done)(void);\n    void (*tota_spp_data_receive_hanle)(uint8_t * buf, uint32_t len);\n}tota_callback_func_t;\n\n\nvoid tota_callback_module_register(APP_TOTA_MODULE_E module, tota_callback_func_t tota_callback_func);\nvoid tota_callback_module_set(APP_TOTA_MODULE_E module);\nAPP_TOTA_MODULE_E tota_callback_module_get();\n\n\n\ntypedef void(*app_spp_tota_tx_done_t)(void);\nvoid app_spp_tota_register_tx_done(app_spp_tota_tx_done_t callback);\nvoid app_spp_tota_init(void);\n\n\nuint16_t app_spp_tota_tx_buf_size(void);\nvoid app_spp_tota_init_tx_buf(uint8_t* ptr);\nuint8_t* app_spp_tota_fill_data_into_tx_buf(uint8_t* ptrData, uint32_t dataLen);\n\nbool app_spp_tota_send_data(uint8_t* ptrData, uint16_t length);\n\n/* for sniff */\nbool spp_tota_in_progress(void);\n\n#endif\n\n"
  },
  {
    "path": "services/tota/app_spp_tota_general_service.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"analog.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_status_ind.h\"\n#include \"audioflinger.h\"\n#include \"cmsis_os.h\"\n#include \"hal_chipid.h\"\n#include \"hal_cmu.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"lockcqueue.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_env.h\"\n#include \n//#include \"nvrecord_dev.h\"\n\n#include \"bluetooth.h\"\n#include \"cqueue.h\"\n#ifdef MBED\n#include \"rtos.h\"\n#endif\n#include \"app_spp.h\"\n#include \"app_spp_tota.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"app_tota_data_handler.h\"\n#include \"resources.h\"\n\n#include \"plat_types.h\"\n#include \"sdp_api.h\"\n\nosMutexDef(tota_spp_gen_mutex);\n\nstatic bool isTotaSppGeneralConnected = false;\nstatic struct spp_device *tota_spp_gen_dev = NULL;\nstatic struct spp_service *totaSppGenService = NULL;\nstatic btif_sdp_record_t *tota_sdp_gen_record = NULL;\n\nosThreadId tota_spp_gen_read_thread_id = NULL;\n\nstatic app_spp_tota_tx_done_t app_spp_tota_gen_tx_done_func = NULL;\n\n#if (TOTA_SHARE_TX_RX_BUF == 1)\nextern void app_spp_tota_share_buf_create(uint8_t **tota_tx_buf,\n                                          uint8_t **tota_rx_buf);\nextern bool app_spp_tota_is_to_share_buf(void);\nextern uint8_t *app_spp_tota_share_tx_buf_get(void);\nextern uint8_t *app_spp_tota_share_rx_buf_get(void);\nextern uint16_t app_spp_tota_tx_buf_size(void);\n#else\nstatic uint8_t spp_rx_buf[SPP_RECV_BUFFER_SIZE];\nstatic uint8_t totaSppGenTxBuf[TOTA_SPP_TX_BUF_SIZE];\n#endif\n\nstatic uint32_t occupiedTotaSppGenTxBufSize;\nstatic uint32_t offsetToFillTotaSppGenTxData;\nstatic uint8_t *ptrTotaSppGenTxBuf;\n\nuint16_t app_spp_tota_gen_tx_buf_size(void) { return TOTA_SPP_TX_BUF_SIZE; }\n\nvoid app_spp_tota_gen_init_tx_buf(uint8_t *ptr) {\n  ptrTotaSppGenTxBuf = ptr;\n  occupiedTotaSppGenTxBufSize = 0;\n  offsetToFillTotaSppGenTxData = 0;\n}\n\nstatic void app_spp_tota_gen_free_tx_buf(uint8_t *ptrData, uint32_t dataLen) {\n  if (occupiedTotaSppGenTxBufSize > 0) {\n    occupiedTotaSppGenTxBufSize -= dataLen;\n  }\n  TOTA_LOG_DBG(1, \"occupiedTotaSppGenTxBufSize %d\",\n               occupiedTotaSppGenTxBufSize);\n}\n\nuint8_t *app_spp_tota_gen_fill_data_into_tx_buf(uint8_t *ptrData,\n                                                uint32_t dataLen) {\n  ASSERT((occupiedTotaSppGenTxBufSize + dataLen) < TOTA_SPP_TX_BUF_SIZE,\n         \"Pending SPP General tx data has exceeded the tx buffer size !\");\n\n  if ((offsetToFillTotaSppGenTxData + dataLen) > TOTA_SPP_TX_BUF_SIZE) {\n    offsetToFillTotaSppGenTxData = 0;\n  }\n\n  uint8_t *filledPtr = ptrTotaSppGenTxBuf + offsetToFillTotaSppGenTxData;\n  memcpy(filledPtr, ptrData, dataLen);\n\n  offsetToFillTotaSppGenTxData += dataLen;\n\n  occupiedTotaSppGenTxBufSize += dataLen;\n\n  TOTA_LOG_DBG(3,\n               \"dataLen %d offsetToFillTotaSppGenTxData %d \"\n               \"occupiedTotaSppGenTxBufSize %d\",\n               dataLen, offsetToFillTotaSppGenTxData,\n               occupiedTotaSppGenTxBufSize);\n\n  return filledPtr;\n}\n\nextern \"C\" APP_TOTA_CMD_RET_STATUS_E\napp_tota_data_received(uint8_t *ptrData, uint32_t dataLength);\nextern \"C\" APP_TOTA_CMD_RET_STATUS_E app_tota_cmd_received(uint8_t *ptrData,\n                                                           uint32_t dataLength);\n\n/****************************************************************************\n * TOTA SPP SDP Entries\n ****************************************************************************/\n#if 0\n static const U8 TotaGenClassId[] = {\n    SDP_ATTRIB_HEADER_8BIT(3),        /* Data Element Sequence, 6 bytes */ \n    SDP_UUID_16BIT(SC_SERIAL_PORT),     /* Hands-Free UUID in Big Endian */ \n};\n//#else\n/* 128 bit UUID in Big Endian a8b1fbc4-7855-4235-8633-ff36c8235e16 */\nstatic const uint8_t TOTA_GENERAL_UUID_128[16] = {\n    0x16, 0x5e, 0x23, 0xc8, 0x36, 0xff, 0x33, 0x86, 0x35, 0x42, 0x55, 0x78, 0xc4, 0xfb, 0xb1, 0xa8};\n\n/*---------------------------------------------------------------------------\n *\n * ServiceClassIDList\n */\nstatic const U8 TotaGenClassId[] = {\n    SDP_ATTRIB_HEADER_8BIT(17),            /* Data Element Sequence, 17 bytes */\n    SDP_UUID_128BIT(TOTA_GENERAL_UUID_128), /* 128 bit UUID in Big Endian */\n};\n#else\nstatic const U8 TotaGenClassId[] = {\n    SDP_ATTRIB_HEADER_8BIT(17),\n    DETD_UUID + DESD_16BYTES,\n    0x8a,\n    0x48,\n    0x2a,\n    0x08,\n    0x55,\n    0x07,\n    0x42,\n    0xac,\n    0xb6,\n    0x73,\n    0xa8,\n    0x8d,\n    0xf4,\n    0x8b,\n    0x3f,\n    0xc7,\n};\n\n#endif\n\nstatic const U8 TotaSppGenProtoDescList[] = {\n    SDP_ATTRIB_HEADER_8BIT(12), /* Data element sequence, 12 bytes */\n\n    /* Each element of the list is a Protocol descriptor which is a\n     * data element sequence. The first element is L2CAP which only\n     * has a UUID element.\n     */\n    SDP_ATTRIB_HEADER_8BIT(3), /* Data element sequence for L2CAP, 3\n                                * bytes\n                                */\n\n    SDP_UUID_16BIT(PROT_L2CAP), /* Uuid16 L2CAP */\n\n    /* Next protocol descriptor in the list is RFCOMM. It contains two\n     * elements which are the UUID and the channel. Ultimately this\n     * channel will need to filled in with value returned by RFCOMM.\n     */\n\n    /* Data element sequence for RFCOMM, 5 bytes */\n    SDP_ATTRIB_HEADER_8BIT(5),\n\n    SDP_UUID_16BIT(PROT_RFCOMM), /* Uuid16 RFCOMM */\n\n    /* Uint8 RFCOMM channel number - value can vary */\n    SDP_UINT_8BIT(RFCOMM_CHANNEL_TOTA_GENERAL)};\n\n/*\n * BluetoothProfileDescriptorList\n */\nstatic const U8 TotaSppGenProfileDescList[] = {\n    SDP_ATTRIB_HEADER_8BIT(8), /* Data element sequence, 8 bytes */\n\n    /* Data element sequence for ProfileDescriptor, 6 bytes */\n    SDP_ATTRIB_HEADER_8BIT(6),\n\n    SDP_UUID_16BIT(SC_SERIAL_PORT), /* Uuid16 SPP */\n    SDP_UINT_16BIT(0x0102)          /* As per errata 2239 */\n};\n\n/*\n * * OPTIONAL *  ServiceName\n */\nstatic const U8 TotaSppGenServiceName1[] = {\n    SDP_TEXT_8BIT(8), /* Null terminated text string */\n    'S',\n    'p',\n    'p',\n    'G',\n    'e',\n    'n',\n    '1',\n    '\\0'};\n\nstatic const U8 TotaSppGenServiceName2[] = {\n    SDP_TEXT_8BIT(8), /* Null terminated text string */\n    'S',\n    'p',\n    'p',\n    'G',\n    'e',\n    'n',\n    '2',\n    '\\0'};\n\n/* SPP attributes.\n *\n * This is a ROM template for the RAM structure used to register the\n * SPP SDP record.\n */\nstatic sdp_attribute_t TotaSppGenSdpAttributes1[] = {\n\n    SDP_ATTRIBUTE(AID_SERVICE_CLASS_ID_LIST, TotaGenClassId),\n\n    SDP_ATTRIBUTE(AID_PROTOCOL_DESC_LIST, TotaSppGenProtoDescList),\n\n    SDP_ATTRIBUTE(AID_BT_PROFILE_DESC_LIST, TotaSppGenProfileDescList),\n\n    // SPP service name\n    SDP_ATTRIBUTE((AID_SERVICE_NAME + 0x0100), TotaSppGenServiceName1),\n};\n\n/*\nstatic sdp_attribute_t TotaSppGenSdpAttributes2[] = {\n\n    SDP_ATTRIBUTE(AID_SERVICE_CLASS_ID_LIST, TotaGenClassId),\n\n    SDP_ATTRIBUTE(AID_PROTOCOL_DESC_LIST, TotaSppGenProtoDescList),\n\n    SDP_ATTRIBUTE(AID_BT_PROFILE_DESC_LIST, TotaSppGenProfileDescList),\n\n    // SPP service name\n    SDP_ATTRIBUTE((AID_SERVICE_NAME + 0x0100), TotaSppGenServiceName2),\n};\n*/\n\nextern \"C\" void reset_programmer_state(unsigned char **buf, size_t *len);\nextern unsigned char *g_buf;\nextern size_t g_len;\n\nstatic int tota_general_spp_handle_data_event_func(void *pDev, uint8_t process,\n                                                   uint8_t *pData,\n                                                   uint16_t dataLen) {\n  TOTA_LOG_DBG(2, \"[%s]data receive length = %d\", __func__, dataLen);\n  TOTA_LOG_DUMP(\"[0x%x]\", pData, dataLen);\n  // the first two bytes of the data packet is the fixed value 0xFFFF\n  app_tota_handle_received_data(pData, dataLen);\n\n  return 0;\n}\n\n#if 0\nstatic void tota_spp_general_read_thread(const void *arg)\n{\n\tuint8_t buffer[TOTA_SPP_MAX_PACKET_SIZE];\n\tU16 maxBytes;\n    \n    while (1)\n\t{\n\t\tmaxBytes = TOTA_SPP_MAX_PACKET_SIZE;\n\t\t\n\t\tbtif_spp_read(tota_spp_gen_dev, (char *)buffer, &maxBytes);\n        TOTA_LOG_DBG(2,\"[%s]general data receive length = %d\",__func__,maxBytes);\n        TOTA_LOG_DUMP(\"[0x%x]\",buffer,maxBytes);\n\n        // the first two bytes of the data packet is the fixed value 0xFFFF\n        app_tota_handle_received_data(buffer, maxBytes);\n    }\n}\n\nstatic void app_spp_tota_gen_create_read_thread(void)\n{\n    TOTA_LOG_DBG(2,\"%s %d\\n\", __func__, __LINE__);\n    tota_spp_gen_read_thread_id = osThreadCreate(osThread(tota_spp_general_read_thread), NULL);\n}\n\nstatic void app_spp_tota_gen_close_read_thread(void)\n{\n    TOTA_LOG_DBG(2,\"%s %d\\n\", __func__, __LINE__);\n    if(tota_spp_gen_read_thread_id)\n    {\n        osThreadTerminate(tota_spp_gen_read_thread_id);\n        tota_spp_gen_read_thread_id = NULL;\n    }\n}\n#endif\nstatic void spp_tota_gen_callback(struct spp_device *locDev,\n                                  struct spp_callback_parms *Info) {\n  TOTA_LOG_DBG(1, \"%s\", __func__);\n  if (BTIF_SPP_EVENT_REMDEV_CONNECTED == Info->event) {\n    TOTA_LOG_DBG(1, \"::SPP_GENERAL_EVENT_REMDEV_CONNECTED %d\\n\", Info->event);\n    isTotaSppGeneralConnected = true;\n    //        app_spp_tota_gen_create_read_thread();\n    app_tota_general_connected(APP_TOTA_CONNECTED);\n    app_tota_update_datapath(APP_TOTA_GEN_VIA_SPP);\n    // conn_stop_connecting_mobile_supervising();\n  } else if (BTIF_SPP_EVENT_REMDEV_DISCONNECTED == Info->event) {\n    TOTA_LOG_DBG(1, \"::SPP_GENERAL_EVENT_REMDEV_DISCONNECTED %d\\n\",\n                 Info->event);\n    isTotaSppGeneralConnected = false;\n    //        app_spp_tota_gen_close_read_thread();\n    app_tota_disconnected(APP_TOTA_DISCONNECTED);\n    app_tota_update_datapath(APP_TOTA_PATH_IDLE);\n\n    app_spp_tota_gen_tx_done_func = NULL;\n  } else if (BTIF_SPP_EVENT_DATA_SENT == Info->event) {\n    // app_spp_tota_gen_free_tx_buf(Info->tx_buf, Info->tx_data_len);\n    struct spp_tx_done *pTxDone = (struct spp_tx_done *)(Info->p.other);\n    app_spp_tota_gen_free_tx_buf(pTxDone->tx_buf, pTxDone->tx_data_length);\n    if (app_spp_tota_gen_tx_done_func) {\n      app_spp_tota_gen_tx_done_func();\n    }\n  } else {\n    TOTA_LOG_DBG(1, \"::spp general unknown event %d\\n\", Info->event);\n  }\n}\n\nstatic void app_spp_tota_gen_send_data(uint8_t *ptrData, uint16_t length) {\n  if (!isTotaSppGeneralConnected) {\n    return;\n  }\n\n  btif_spp_write(tota_spp_gen_dev, (char *)ptrData, &length);\n}\n\nvoid app_tota_gen_send_cmd_via_spp(uint8_t *ptrData, uint32_t length) {\n  uint8_t *ptrBuf = app_spp_tota_gen_fill_data_into_tx_buf(ptrData, length);\n  app_spp_tota_gen_send_data(ptrBuf, (uint16_t)length);\n}\n\nvoid app_tota_gen_send_data_via_spp(uint8_t *ptrData, uint32_t length) {\n  TOTA_LOG_DBG(2, \"[%s]tota gen send data length = %d\", __func__, length);\n  uint8_t *ptrBuf = app_spp_tota_gen_fill_data_into_tx_buf(ptrData, length);\n  app_spp_tota_gen_send_data(ptrBuf, (uint16_t)length);\n}\n\nvoid app_spp_tota_gen_init(void) {\n  uint8_t *rx_buf;\n  uint8_t *tx_buf;\n  osMutexId mid;\n  btif_sdp_record_param_t param;\n\n  if (tota_spp_gen_dev == NULL) {\n    tota_spp_gen_dev = btif_create_spp_device();\n  }\n\n  if (app_spp_tota_is_to_share_buf() == true) {\n    app_spp_tota_share_buf_create(&tx_buf, &rx_buf);\n  }\n#if (TOTA_SHARE_TX_RX_BUF == 0)\n  else {\n    rx_buf = &spp_rx_buf[0];\n    tx_buf = &totaSppGenTxBuf[0];\n  }\n#endif\n  tota_spp_gen_dev->rx_buffer = rx_buf;\n\n  app_spp_tota_gen_init_tx_buf(tx_buf);\n  btif_spp_init_rx_buf(tota_spp_gen_dev, rx_buf, SPP_RECV_BUFFER_SIZE);\n\n  mid = osMutexCreate(osMutex(tota_spp_gen_mutex));\n  if (!mid) {\n    ASSERT(0, \"cannot create mutex\");\n  }\n\n  if (tota_sdp_gen_record == NULL)\n    tota_sdp_gen_record = btif_sdp_create_record();\n\n  param.attrs = &TotaSppGenSdpAttributes1[0],\n  param.attr_count = ARRAY_SIZE(TotaSppGenSdpAttributes1);\n  param.COD = BTIF_COD_MAJOR_PERIPHERAL;\n  btif_sdp_record_setup(tota_sdp_gen_record, ¶m);\n\n  if (totaSppGenService == NULL)\n    totaSppGenService = btif_create_spp_service();\n\n  totaSppGenService->rf_service.serviceId = RFCOMM_CHANNEL_TOTA_GENERAL;\n  totaSppGenService->numPorts = 0;\n  btif_spp_service_setup(tota_spp_gen_dev, totaSppGenService,\n                         tota_sdp_gen_record);\n\n  tota_spp_gen_dev->portType = BTIF_SPP_SERVER_PORT;\n  tota_spp_gen_dev->app_id = BTIF_APP_SPP_SERVER_TOTA_GENERAL_ID;\n  tota_spp_gen_dev->spp_handle_data_event_func =\n      tota_general_spp_handle_data_event_func;\n\n  btif_spp_init_device(tota_spp_gen_dev, 5, mid);\n\n  btif_spp_open(tota_spp_gen_dev, NULL, spp_tota_gen_callback);\n}\n"
  },
  {
    "path": "services/tota/app_spp_tota_general_service.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_SPP_TOTA_GEN_H__\n#define __APP_SPP_TOTA_GEN_H__\n\nvoid app_spp_tota_gen_init(void);\n\nuint16_t app_spp_tota_gen_tx_buf_size(void);\nvoid app_spp_tota_gen_init_tx_buf(uint8_t* ptr);\nvoid app_tota_gen_send_cmd_via_spp(uint8_t* ptrData, uint32_t length);\nvoid app_tota_gen_send_data_via_spp(uint8_t* ptrData, uint32_t length);\n\n#endif\n\n"
  },
  {
    "path": "services/tota/app_tota.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_tota.h\"\n#include \"app_audio.h\"\n#include \"app_ble_rx_handler.h\"\n#include \"app_bt.h\"\n#include \"app_hfp.h\"\n#include \"app_spp_tota.h\"\n#include \"app_thread.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"app_tota_data_handler.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"bt_drv_reg_op.h\"\n#include \"btapp.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"hal_aud.h\"\n#include \"hal_location.h\"\n#include \"hal_norflash.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"pmu.h\"\n#include \"rwapp_config.h\"\n#include \"stdarg.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n#if defined(IBRT)\n#include \"app_tws_ibrt.h\"\n#endif\n#include \"aes.h\"\n#include \"app_battery.h\"\n#include \"app_ibrt_rssi.h\"\n#include \"app_spp_tota_general_service.h\"\n#include \"app_tota_anc.h\"\n#include \"app_tota_audio_dump.h\"\n#include \"app_tota_conn.h\"\n#include \"app_tota_custom.h\"\n#include \"app_tota_flash_program.h\"\n#include \"app_tota_general.h\"\n#include \"app_tota_mic.h\"\n#include \"cmsis.h\"\n#include \"crc32.h\"\n#include \"factory_section.h\"\n#include \"tota_stream_data_transfer.h\"\n\ntypedef struct {\n  uint8_t connectedType;\n  APP_TOTA_TRANSMISSION_PATH_E dataPath;\n} APP_TOTA_ENV_T;\n\nstatic APP_TOTA_ENV_T app_tota_env = {\n    0,\n};\n\nbool app_is_in_tota_mode(void) { return app_tota_env.connectedType; }\n\nvoid app_tota_init(void) {\n  TOTA_LOG_DBG(0, \"Init application test over the air.\");\n  app_spp_tota_init();\n  app_spp_tota_gen_init();\n  app_tota_cmd_handler_init();\n\n  app_tota_stream_data_transfer_init();\n  /* register callback modules */\n  app_tota_mic_init();\n  app_tota_anc_init();\n  app_tota_audio_dump_init();\n  app_tota_general_init();\n  app_tota_custom_init();\n  app_tota_flash_init();\n\n  /* set module to access spp callback */\n  // tota_callback_module_set(APP_TOTA_AUDIO_DUMP);\n  tota_callback_module_set(APP_TOTA_ANC);\n\n#if (BLE_APP_TOTA)\n  app_ble_rx_handler_init();\n#endif\n}\n\nvoid app_tota_connected(uint8_t connType) {\n  TOTA_LOG_DBG(0, \"Tota is connected.\");\n  app_tota_env.connectedType |= connType;\n}\n\nvoid app_tota_disconnected(uint8_t disconnType) {\n  TOTA_LOG_DBG(0, \"Tota is disconnected.\");\n  app_tota_env.connectedType &= disconnType;\n}\n\nvoid app_tota_general_connected(uint8_t connType) {\n  TOTA_LOG_DBG(0, \"Tota gen is connected.\");\n  app_tota_env.connectedType |= connType;\n}\n\nvoid app_tota_update_datapath(APP_TOTA_TRANSMISSION_PATH_E dataPath) {\n  app_tota_env.dataPath = dataPath;\n}\n\nAPP_TOTA_TRANSMISSION_PATH_E app_tota_get_datapath(void) {\n  return app_tota_env.dataPath;\n}\n\n/*---------------------------------------------------------------------------------------------------------------------------*/\n\nstatic bool _is_tota_connect = false;\n\n/**/\nvoid tota_connected_handle() { _is_tota_connect = true; }\n\n/**/\nvoid tota_disconnected_handle() { _is_tota_connect = false; }\n\nbool is_tota_connected() { return _is_tota_connect; }\n\n/*\n**  @func:  encrypt && decrypt\n*/\nstatic uint8_t encrypt_data[MAX_SPP_PACKET_SIZE];\nstatic uint8_t decrypt_data[MAX_SPP_PACKET_SIZE];\n\nstatic __unused uint8_t key[ENCRYPT_KEY_SIZE] = {\n    0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,\n    0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c};\nstatic __unused uint8_t iv[ENCRYPT_KEY_SIZE] = {\n    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,\n    0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f};\n\nvoid tota_set_encrypt_key_from_hash_key(uint8_t *hash_key) {\n  for (uint8_t i = 0; i < ENCRYPT_KEY_SIZE; i++) {\n    key[i] = hash_key[2 * i];\n  }\n  TOTA_LOG_DBG(0, \"aes key:\");\n  DUMP8(\"%02x \", key, ENCRYPT_KEY_SIZE);\n}\n\nvoid test_aes_encode_decode() {\n  uint8_t w[16] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};\n  uint8_t z[16] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};\n  uint8_t x[16] = {1, 1, 1, 1, 1, 1, 1, 1};\n\n  uint8_t dw[16] = {0x69, 0x0a, 0x6c, 0x5e, 0xd6, 0x66, 0x51, 0x25,\n                    0x97, 0xfa, 0x1e, 0x6e, 0xcc, 0xfc, 0x1b, 0xdb};\n  uint8_t dz[16] = {0x50, 0xfe, 0x67, 0xcc, 0x99, 0x6d, 0x32, 0xb6,\n                    0xda, 0x09, 0x37, 0xe9, 0x9b, 0xaf, 0xec, 0x60};\n  uint32_t length = 0;\n  tota_encrypt_packet(w, 16, &length);\n  osDelay(50);\n  tota_encrypt_packet(z, 16, &length);\n  osDelay(50);\n  tota_decrypt_packet(dw, 16, &length);\n  osDelay(50);\n  tota_decrypt_packet(dz, 16, &length);\n\n  tota_encrypt_packet(x, 8, &length);\n  osDelay(50);\n}\n\nuint8_t *tota_encrypt_packet(uint8_t *in, uint32_t inLen, uint32_t *poutLen) {\n  uint32_t morebytes = inLen % ENCRYPT_KEY_SIZE ? ENCRYPT_KEY_SIZE : 0;\n  uint32_t outLen = (inLen / ENCRYPT_KEY_SIZE) * ENCRYPT_KEY_SIZE + morebytes;\n  TOTA_LOG_DBG(0, \"raw data:\");\n  DUMP8(\"0x%02x, \", in, inLen);\n#if defined(TOTA)\n  AES128_CBC_encrypt_buffer(encrypt_data, in, inLen, key, iv);\n#endif\n  *poutLen = outLen;\n  TOTA_LOG_DBG(2, \"encrypt data: %u -> %u\", inLen, outLen);\n  DUMP8(\"0x%02x, \", encrypt_data, *poutLen);\n  return encrypt_data;\n}\n\n/*\n**  inLen must 16 times\n*/\nuint8_t *tota_decrypt_packet(uint8_t *in, uint32_t inLen, uint32_t *poutLen) {\n  uint32_t morebytes = inLen % ENCRYPT_KEY_SIZE ? ENCRYPT_KEY_SIZE : 0;\n  uint32_t outLen = (inLen / ENCRYPT_KEY_SIZE) * ENCRYPT_KEY_SIZE + morebytes;\n  TOTA_LOG_DBG(0, \"raw data:\");\n  DUMP8(\"0x%02x, \", in, inLen);\n#if defined(TOTA)\n  AES128_CBC_decrypt_buffer(decrypt_data, in, inLen, key, iv);\n#endif\n  *poutLen = outLen;\n  TOTA_LOG_DBG(2, \"decrypt data: %u -> %u\", inLen, outLen);\n  DUMP8(\"0x%02x, \", decrypt_data, *poutLen);\n  return decrypt_data;\n}\n\n// TODO:\nstatic char strBuf[MAX_SPP_PACKET_SIZE - 4];\nvoid tota_printf(const char *format, ...) {\n  va_list vlist;\n  va_start(vlist, format);\n  vsprintf(strBuf, format, vlist);\n  va_end(vlist);\n  app_tota_send_command(OP_TOTA_STRING, (uint8_t *)strBuf, strlen(strBuf),\n                        app_tota_get_datapath());\n}\n\n/*---------------------------------------------------------------------------------------------------------------------------*/\nstatic void app_tota_demo_cmd_handler(APP_TOTA_CMD_CODE_E funcCode,\n                                      uint8_t *ptrParam, uint32_t paramLen) {\n  TOTA_LOG_DBG(2, \"Func code 0x%x, param len %d\", funcCode, paramLen);\n  TOTA_LOG_DBG(0, \"Param content:\");\n  DUMP8(\"%02x \", ptrParam, paramLen);\n}\nTOTA_COMMAND_TO_ADD(OP_TOTA_DEMO_CMD, app_tota_demo_cmd_handler, false, 0,\n                    NULL);"
  },
  {
    "path": "services/tota/app_tota.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TOTA_H__\n#define __APP_TOTA_H__\n\n#include \"app_tota_cmd_code.h\"\n\n#define APP_TOTA_PATH_TYPE_SPP\t(1 << 0)\n\n#define APP_TOTA_PATH_TYPE\t\t(APP_TOTA_PATH_TYPE_SPP)\n\t\n#define APP_TOTA_CONNECTED             (1 << 0)    \n#define APP_TOTA_DISCONNECTED          (~(1 << 0))\n\n#define TOTA_SHARE_TX_RX_BUF    1  \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#define TOTA_SERVICE_CMD_PARAM_LENGTH   128\n#if 0//if support write flash block cmd,the buffer size must be 4k\n#define TOTA_SERVICE_DATA_WRITE_LENGTH  4*1024\n#define TOTA_SERVICE_DATA_READ_LENGTH   4*1024\n#else\n#define TOTA_SERVICE_DATA_WRITE_LENGTH  4*32\n#define TOTA_SERVICE_DATA_READ_LENGTH   4*32\n#endif\n#define FLASH_SECTOR_SIZE_IN_BYTES 4*1024\n#define TOTA_DATA_BUFFER_SIZE_FOR_BURNING FLASH_SECTOR_SIZE_IN_BYTES\n#define TOTA_SERVICE_SYNC_WORD  0x54534542\n#define TOTA_SERVICE_SYNC_DATA_1    0xbe\n#define TOTA_SERVICE_SYNC_DATA_2    0xca\n#define TOTA_SERVICE_XFER_OUT_DATA_SIZE    500\n#define BT_LOCAL_NAME_LEN 64\n#define DANGLE_TRANS_MAX_SIZE 248\n#define DUMP_BYTES 32\n\nenum{\n    TOTA_SERVICE_DATA_XFER_ADDR_WRITE,\n    TOTA_SERVICE_DATA_XFER_ADDR_READ,\n    TOTA_SERVICE_DATA_XFER_ADDR_NONE,\n};\n\n\ntypedef enum{\n    TOTA_SERVICE_GENERAL_CMD_PARSER_NONE,\n    TOTA_SERVICE_GENERAL_CMD_STATE_PARSER_SYNC,\n    TOTA_SERVICE_GENERAL_CMD_STATE_PARSER_DATA,\n    TOTA_SERVICE_GENERAL_CMD_STATE_PARSER_EXTRAL,\n}TOTA_SERVICE_GENERAL_CMD_PARSER_STATE;\n\n\ntypedef enum{\n    TOTA_SERVICE_INIT_SYNC = 0,             /*valid payload: |2 bytes sync word |                                               */\n    TOTA_SERVICE_CMD_WRITE_FLASH,           /*valid payload: |4 bytes address|4 bytes write data length|                        */\n    TOTA_SERVICE_CMD_READ_FLASH,            /*valid payload: |1 byte start_or_stop|4 bytes address|4 bytes read data length|  */\n    TOTA_SERVICE_CMD_WRITE_AI_ENV_DATA,     /*valid payload: |4 bytes write data length|                                        */\n    TOTA_SERVICE_CMD_VERIFY_AI_ENV_DATA,    /*valid payload: |4 bytes magic code |4 bytes CRC|                                  */\n    TOTA_SERVICE_CMD_READ_AI_ENV_DATA,      /*valid payload: |1 byte start_or_stop|4 bytes read data length |                  */\n    TOTA_SERVICE_CMD_READ_ACK,              /*valid rsp payload: |1 bytes|                                                      */\n    TOTA_SERVICE_CMD_GET_BAT,               /*valid rsp payload: |4 bytes|                                                      */\n    TOTA_SERVICE_CMD_GET_FW_VERSION,        /*valid rsp payload: |4 bytes|                                                      */\n    TOTA_SERVICE_CMD_GET_BT_LOCAL_NAME,     /*valid rsp payload: |x bytes|                                                      */\n    TOTA_SERVICE_CMD_GET_BT_ADDR,           /*valid rsp payload: |6 bytes|                                                      */\n    TOTA_SERVICE_CMD_CLEAR_PAIRING_INFO,\n    TOTA_SERVICE_CMD_GENERAL_TEST,\n    TOTA_SERVICE_CMD_SHUTDOWM,\n    TOTA_SERVICE_CMD_MIC_TEST_ON,\n    TOTA_SERVICE_CMD_MIC_TEST_OFF,\n    TOTA_SERVICE_CMD_MIC_SWITCH,\n    TOTA_SERVICE_CMD_COUNT = 0xff,          /*valid payload                                                                     */\n}TOTA_GENERAL_CMD_E;\n\ntypedef enum{\n    TOTA_SERVICE_SEND_STATUS_NO_ERROR = 0,\n    TOTA_SERVICE_SEND_STATUS_INVALID_CMD = 1,\n    TOTA_SERVICE_SEND_STATUS_PARAM_ERR = 2,\n    TOTA_SERVICE_SEND_STATUS_END = 3,\n}TOTA_SERVICE_SEND_STATUS_E;\n\n\ntypedef struct{\n    uint16_t cmd;\n    uint16_t len;\n}TOTA_SERVICE_CMD_RSP_HEADER_T;\n\ntypedef struct{\n    uint8_t is_to_start;\n    uint32_t start_addr;\n    uint32_t len;\n}__attribute__ ((__packed__)) TOTA_SERVICE_CMD_READ_FLASH_BODY_STRUCT_T;\n\ntypedef struct{\n    uint32_t start_addr;\n    uint32_t len;\n}TOTA_SERVICE_CMD_WRITE_FLASH_BODY_STRUCT_T;\n\ntypedef struct{\n    uint8_t is_to_start;\n    uint32_t start_addr;\n    uint32_t len;\n    uint8_t read_ai_env_ack;\n}__attribute__ ((__packed__)) TOTA_SERVICE_CMD_READ_AI_ENV_DATA_BODY_STRUCT_T;\n\ntypedef struct{\n    uint32_t len;\n}TOTA_SERVICE_CMD_WRITE_AI_ENV_DATA_BODY_STRUCT_T;\n\ntypedef struct{\n    TOTA_SERVICE_CMD_RSP_HEADER_T cmd_rsp_header;\n    uint8_t ack_val;\n}__attribute__ ((__packed__)) TOTA_SERVICE_CMD_SYNC_ACK;\n\ntypedef struct{\n    TOTA_SERVICE_CMD_RSP_HEADER_T cmd_rsp_header;\n    uint8_t write_ai_env_ack;\n} __attribute__ ((__packed__)) TOTA_SERVICE_CMD_WRITE_AI_ENV_DATA_ACK_STRUCT_T;\n\ntypedef struct{\n    TOTA_SERVICE_CMD_RSP_HEADER_T cmd_rsp_header;\n    uint8_t verify_ai_env_ack;\n} __attribute__ ((__packed__)) TOTA_SERVICE_CMD_VERIFY_AI_ENV_DATA_ACK_STRUCT_T;\n\ntypedef uint32_t BAT_VAL_BYTES;\ntypedef struct{\n    TOTA_SERVICE_CMD_RSP_HEADER_T cmd_rsp_header;\n    BAT_VAL_BYTES bat_val;\n}TOTA_SERVICE_CMD_GET_BAT_VAL_BODY_STRUCT_T;\n\ntypedef struct{\n    TOTA_SERVICE_CMD_RSP_HEADER_T cmd_rsp_header;\n    uint8_t fw_version[4];\n}TOTA_SERVICE_CMD_GET_FW_VERSION_BODY_STRUCT_T;\n\ntypedef struct{\n    TOTA_SERVICE_CMD_RSP_HEADER_T cmd_rsp_header;\n    char bt_local_name[BT_LOCAL_NAME_LEN];\n}__attribute__ ((__packed__))TOTA_SERVICE_CMD_GET_BT_LOCAL_NAME_BODY_STRUCT_T;\n\ntypedef struct{\n    TOTA_SERVICE_CMD_RSP_HEADER_T cmd_rsp_header;\n    uint8_t bt_addr[6];\n}__attribute__ ((__packed__))TOTA_SERVICE_CMD_GET_BT_ADDR_BODY_STRUCT_T;\n\ntypedef struct{\n    TOTA_SERVICE_CMD_RSP_HEADER_T cmd_rsp_header;\n    uint8_t test_val[7];\n}__attribute__ ((__packed__))TOTA_SERVICE_CMD_GET_TEST_VAL_BODY_STRUCT_T;\n\ntypedef struct{\n    uint32_t prefix;\n    uint16_t cmd;\n    uint8_t seq;\n    uint8_t len;\n}msg_header_t;\n\ntypedef struct{\n    msg_header_t hdr;\n    unsigned char cmd_param[TOTA_SERVICE_CMD_PARAM_LENGTH];\n}TOTA_GENERAL_CMD_STRUCT_T;\n\ntypedef struct{\n    uint8_t* tota_write_buff_ptr;\n    uint16_t tota_data_write_buf_block_lenth;\n    uint16_t tota_data_written_lenth_in_block;\n\n    uint32_t tota_data_need_write_flash_begin_addr;\n    uint32_t tota_data_tota_need_write_lenth;\n    uint32_t tota_data_tota_already_receive_length;\n    uint32_t tota_data_written_in_flash_pos ;\n    uint32_t tota_offset_in_flash_of_current_block;\n    uint32_t tota_offset_of_data_of_current_block;\n}TOTA_SERVICE_DATA_WRITE_STRUCT_T;\n\ntypedef struct{\n    uint8_t* tota_read_buff_ptr;\n    uint16_t tota_data_read_buf_block_lenth;\n    uint16_t tota_data_have_read_lenth_in_block;\n\n    uint32_t tota_data_need_read_flash_begin_addr;\n    uint32_t tota_data_tota_need_read_lenth;\n    uint32_t tota_data_tota_already_sent_length;\n    uint32_t tota_data_have_read_in_flash_pos ;\n    uint32_t tota_offset_in_flash_of_current_block;\n    uint32_t tota_offset_of_data_of_current_block;\n}TOTA_SERVICE_DATA_READ_STRUCT_T;\n\n\n/**\n * @brief The format of the segment verification request\n *\n */\ntypedef struct\n{\n    uint32_t    magicCode;      // should be OTA_START_MAGIC_CODE\n    uint32_t    crc32OfSegment;          // crc32 of the 1 segment\n} __attribute__ ((__packed__)) TOTA_SEGMENT_VERIFY_T;\n\nvoid app_tota_init(void);\nvoid app_tota_connected(uint8_t connType);\nvoid app_tota_disconnected(uint8_t disconnType);\nvoid app_tota_general_connected(uint8_t connType);\nbool app_is_in_tota_mode(void);\nvoid app_tota_update_datapath(APP_TOTA_TRANSMISSION_PATH_E dataPath);\nAPP_TOTA_TRANSMISSION_PATH_E app_tota_get_datapath(void);\n\n\n/* interface */\nvoid tota_connected_handle();\nvoid tota_disconnected_handle();\nbool is_tota_connected();\nvoid tota_set_encrypt_key_from_hash_key(uint8_t * set_key);\n\n\nuint8_t * tota_encrypt_packet(uint8_t * in, uint32_t inLen, uint32_t * poutLen);\nuint8_t * tota_decrypt_packet(uint8_t * in, uint32_t inLen, uint32_t * poutLen);\n\nvoid tota_printf(const char * format, ...);\n\n\n/*todo: for test*/\nvoid test_aes_encode_decode();\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "services/tota/app_tota_anc.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"app_tota_anc.h\"\n#include \"anc_parse_data.h\"\n#include \"app_spp_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"cmsis_os.h\"\n#include \n\nosTimerId app_check_send_synccmd_timer = NULL;\nstatic void app_synccmd_timehandler(void const *param);\nosTimerDef(APP_SYNCCMD, app_synccmd_timehandler);\n\nstatic void app_synccmd_timehandler(void const *param) {\n  send_sync_cmd_to_tool();\n}\n\nAPP_TOTA_CMD_RET_STATUS_E app_anc_tota_cmd_received(uint8_t *ptrData,\n                                                    uint32_t dataLength) {\n  TOTA_LOG_DBG(2, \"[%s] length:%d\", __func__, dataLength);\n  TOTA_LOG_DBG(1, \"[%s] data:\", __func__);\n  TOTA_LOG_DUMP(\"0x%02x \", ptrData, dataLength);\n\n  anc_handle_received_data(ptrData, dataLength);\n\n  if (get_send_sync_flag() == 1) {\n    osTimerStop(app_check_send_synccmd_timer);\n  }\n  return TOTA_NO_ERROR;\n}\n\nstatic bool is_connected = false;\n\n/*-----------------------------------------------------------------------------*/\n\nstatic void _tota_spp_connected(void);\nstatic void _tota_spp_disconnected(void);\nstatic void _tota_spp_tx_done(void);\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len);\n\nstatic tota_callback_func_t s_func = {_tota_spp_connected,\n                                      _tota_spp_disconnected, _tota_spp_tx_done,\n                                      _tota_spp_data_receive_handle};\n\nstatic APP_TOTA_MODULE_E s_module = APP_TOTA_ANC;\n\nvoid app_tota_anc_init() {\n  tota_callback_module_register(s_module, s_func);\n  reset_programmer_state(&g_buf, &g_len);\n\n  if (app_check_send_synccmd_timer == NULL)\n    app_check_send_synccmd_timer =\n        osTimerCreate(osTimer(APP_SYNCCMD), osTimerPeriodic, NULL);\n}\n\nstatic void _tota_spp_connected(void) {\n  anc_data_buff_init();\n  // add a send sync timer\n  osTimerStop(app_check_send_synccmd_timer);\n  osTimerStart(app_check_send_synccmd_timer, 2000);\n  is_connected = true;\n}\n\nstatic void _tota_spp_disconnected(void) {\n  anc_data_buff_deinit();\n  osTimerStop(app_check_send_synccmd_timer);\n  is_connected = false;\n}\n\nstatic void _tota_spp_tx_done(void) {\n  if (is_connected)\n    // TODO:\n    ; // bulk_read_done();\n}\n\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len) {\n  app_anc_tota_cmd_received(buf, len);\n}\n\n/*-----------------------------------------------------------------------------*/\n"
  },
  {
    "path": "services/tota/app_tota_anc.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __APP_TOTA_ANC_H__\n#define __APP_TOTA_ANC_H__\n\n\n/* from other files */\nextern unsigned char *g_buf;\nextern size_t g_len;\n\n\nextern \"C\" void bulk_read_done(void);\nextern \"C\" void reset_programmer_state(unsigned char **buf, size_t *len);\nextern \"C\" void send_sync_cmd_to_tool();\nextern \"C\" int anc_handle_received_data(uint8_t* ptrParam, uint32_t paramLen);\nextern \"C\" int get_send_sync_flag(void);\n\n\n\n/* interface */\nvoid app_tota_anc_init();\n\n#endif\n\n"
  },
  {
    "path": "services/tota/app_tota_audio_dump.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_tota_audio_dump.h\"\n#include \"app_spp_tota.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"cmsis_os.h\"\n#include \"tota_stream_data_transfer.h\"\n\n// #define _TOTA_AUDIO_DUMP_DEBUG\n\nstatic void _tota_audio_dump_connected(void);\nstatic void _tota_audio_dump_disconnected(void);\nstatic void _tota_audio_dump_tx_done(void);\nstatic void _tota_audio_dump_receive_handle(uint8_t *buf, uint32_t len);\n\n/**/\nstatic void _audio_dump_control(APP_TOTA_CMD_CODE_E funcCode, uint8_t *ptrParam,\n                                uint32_t paramLen);\n\n#ifdef _TOTA_AUDIO_DUMP_DEBUG\n/* only for test */\nstatic void test_init();\n#endif\n\n/**/\nstatic tota_callback_func_t s_func = {\n    _tota_audio_dump_connected, _tota_audio_dump_disconnected,\n    _tota_audio_dump_tx_done, _tota_audio_dump_receive_handle};\n\nstatic APP_TOTA_MODULE_E s_module = APP_TOTA_AUDIO_DUMP;\n\nvoid app_tota_audio_dump_init() {\n  TOTA_LOG_DBG(1, \"[%s] ...\", __func__);\n\n  tota_callback_module_register(s_module, s_func);\n}\n\nstatic void _tota_audio_dump_connected(void) {\n  TOTA_LOG_DBG(1, \"[%s] ...\", __func__);\n\n#ifdef _TOTA_AUDIO_DUMP_DEBUG\n  test_init();\n#endif\n}\n\nstatic void _tota_audio_dump_disconnected(void) {\n  TOTA_LOG_DBG(1, \"[%s] ...\", __func__);\n}\n\nstatic void _tota_audio_dump_tx_done(void) { ; }\n\nstatic void _tota_audio_dump_receive_handle(uint8_t *buf, uint32_t len) { ; }\n\n/*-----------------------------------------------------------------------------*/\nvoid app_tota_audio_dump_start() {\n  TOTA_LOG_DBG(1, \"[%s] ...\", __func__);\n\n  app_tota_stream_data_start(s_module);\n  app_tota_audio_dump_flush();\n}\n\nvoid app_tota_audio_dump_stop() {\n  TOTA_LOG_DBG(1, \"[%s] ...\", __func__);\n\n  app_tota_stream_data_end();\n}\n\nvoid app_tota_audio_dump_flush() {\n  TOTA_LOG_DBG(1, \"[%s] ...\", __func__);\n\n  app_tota_stream_data_flush();\n}\n\nbool app_tota_audio_dump_send(uint8_t *pdata, uint32_t dataLen) {\n  return app_tota_send_stream_data(pdata, dataLen);\n}\n\n/*-----------------------------------------------------------------------------*/\nstatic void _audio_dump_control(APP_TOTA_CMD_CODE_E funcCode, uint8_t *ptrParam,\n                                uint32_t paramLen) {\n  switch (funcCode) {\n  case OP_TOTA_AUDIO_DUMP_START:\n    TOTA_LOG_DBG(0, \"tota_audio_dump start\");\n    app_tota_audio_dump_start();\n    break;\n\n  case OP_TOTA_AUDIO_DUMP_STOP:\n    TOTA_LOG_DBG(0, \"tota_audio_dump stop\");\n    app_tota_audio_dump_stop();\n    break;\n\n  case OP_TOTA_AUDIO_DUMP_CONTROL:\n    TOTA_LOG_DBG(0, \"tota_audio_dump contorl\");\n    // TODO: Can get or set info\n    app_tota_send_response_to_command(funcCode, TOTA_NO_ERROR,\n                                      (uint8_t *)\".pcm\", sizeof(\".pcm\"),\n                                      app_tota_get_datapath());\n    break;\n\n  default:\n    break;\n  }\n}\n\n#ifdef _TOTA_AUDIO_DUMP_DEBUG\n/*-----------------------------------------------------------------------------*/\n/*----------------------------------TEST---------------------------------------*/\n/*-----------------------------------------------------------------------------*/\n#define TOTA_TEST_STACK_SIZE (1024 * 2)\nstatic void tota_audio_dump_test_thread(void const *argument);\nosThreadId tota_audio_dump_test_thread_tid;\nosThreadDef(tota_audio_dump_test_thread, osPriorityNormal, 1,\n            TOTA_TEST_STACK_SIZE, \"TOTA_TEST_THREAD\"); // osPriorityHigh\n\nstatic uint16_t audio_cnt = 0;\n\nuint16_t audioBuf[512];\n\nstatic void tota_audio_dump_test_thread(void const *argument) {\n  app_tota_audio_dump_flush();\n  while (true) {\n    osDelay(1000);\n    for (uint16_t i = 0; i < sizeof(audioBuf) / sizeof(uint16_t); i++) {\n      audioBuf[i] = audio_cnt++;\n      // audioBuf[i] = 0x5555;\n    }\n\n    app_tota_audio_dump_send((uint8_t *)audioBuf, sizeof(audioBuf));\n  }\n}\n\nstatic void test_init() {\n  tota_audio_dump_test_thread_tid =\n      osThreadCreate(osThread(tota_audio_dump_test_thread), NULL);\n}\n#endif\n\n/*-----------------------------------------------------------------------------*/\n/*------------------------------ADD USR\n * FUNCTION-------------------------------*/\n/*-----------------------------------------------------------------------------*/\n\n/*-----------------------------------------------------------------------------*/\n/*------------------------------ADD USR\n * COMMAND--------------------------------*/\n/*-----------------------------------------------------------------------------*/\nTOTA_COMMAND_TO_ADD(OP_TOTA_AUDIO_DUMP_START, _audio_dump_control, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_AUDIO_DUMP_STOP, _audio_dump_control, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_AUDIO_DUMP_CONTROL, _audio_dump_control, false, 0,\n                    NULL);\n"
  },
  {
    "path": "services/tota/app_tota_audio_dump.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __APP_TOTA_AUDIO_DUMP_H__\n#define __APP_TOTA_AUDIO_DUMP_H__\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_tota_audio_dump_init();\n\nvoid app_tota_audio_dump_start();\nvoid app_tota_audio_dump_stop();\nvoid app_tota_audio_dump_flush();\nbool app_tota_audio_dump_send(uint8_t * pdata, uint32_t dataLen);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "services/tota/app_tota_cmd_code.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TOTA_CMD_CODE_H__\n#define __APP_TOTA_CMD_CODE_H__\n\n#include \"hal_trace.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define LOG_TAG \"[TOTA_CONTROL] \"\n\n#define TOTA_CONTROL_DEBUG\n\n#ifdef TOTA_CONTROL_DEBUG\n#define TOTA_LOG_DBG(num,str,...)   TRACE(num,LOG_TAG\"\"str, ##__VA_ARGS__)             // DEBUG OUTPUT\n#define TOTA_LOG_MSG(num,str,...)   TRACE(num,LOG_TAG\"\"str, ##__VA_ARGS__)             // MESSAGE OUTPUT\n#define TOTA_LOG_ERR(num,str,...)   TRACE(num,LOG_TAG\"err:\"\"\"str, ##__VA_ARGS__)       // ERROR OUTPUT\n\n#define TOTA_LOG_FUNC_LINE()        TRACE(2,LOG_TAG\"%s:%d\\n\", __FUNCTION__, __LINE__)\n#define TOTA_LOG_FUNC_IN()          TRACE(1,LOG_TAG\"%s ++++\\n\", __FUNCTION__)\n#define TOTA_LOG_FUNC_OUT()         TRACE(1,LOG_TAG\"%s ----\\n\", __FUNCTION__)\n\n#define TOTA_LOG_DUMP               DUMP8\n#else\n#define TOTA_LOG_DBG(str,...)\n#define TOTA_LOG_MSG(num,str,...)   TRACE(num,LOG_TAG\"\"str, ##__VA_ARGS__)\n#define TOTA_LOG_ERR(num,str,...)   TRACE(num,LOG_TAG\"err:\"\"\"str, ##__VA_ARGS__)\n\n#define TOTA_LOG_FUNC_LINE()\n#define TOTA_LOG_FUNC_IN()\n#define TOTA_LOG_FUNC_OUT()\n\n#define TOTA_LOG_DUMP\n#endif\n\nextern uint32_t __tota_handler_table_start[];\nextern uint32_t __tota_handler_table_end[];\n\n#define INVALID_TOTA_ENTRY_INDEX        0xFFFF\n#define TOTA_CMD_CODE_SIZE              sizeof(uint16_t)\n\n/**\n * @brief Type of the tota transmission path.\n *\n */\ntypedef enum\n{\n    APP_TOTA_VIA_SPP = 0,\n    APP_TOTA_VIA_NOTIFICATION,\n    APP_TOTA_VIA_INDICATION,\n    APP_TOTA_GEN_VIA_SPP,\n    APP_TOTA_TRANSMISSION_PATH_COUNT,\n\n    APP_TOTA_PATH_IDLE = 0xff\n} APP_TOTA_TRANSMISSION_PATH_E;\n\n/**\n * @brief The command code\n *\n */\ntypedef enum\n{\n    /* basic cmd */\n    OP_TOTA_STRING              = 0x1000,\n    OP_TOTA_CONN_INITIATE       = 0x1001,\n    OP_TOTA_CONN_RESPONSE       = 0x1002,\n    OP_TOTA_CONN_CONFIRM        = 0x1003,\n\n    /* response cmd */\n    OP_TOTA_RESPONSE_TO_CMD     = 0x6000, /**< the payload is: OP_TOTA_RESPONSE_TO_CMD + paramLen + BLE_TOTA_CMD_RSP_T */\n    OP_TOTA_SPP_DATA_ACK        = 0x6001,\n\n    /* test cmd: test ok */\n    OP_TOTA_TEST_CMD            = 0x6100,\n    OP_TOTA_ECHO_TEST_CMD       = 0x6101,\n    OP_TOTA_DEMO_CMD            = 0x6102,\n\n    /* flash cmd: test ok */\n    OP_TOTA_WRITE_FLASH_CMD     = 0x6200,\n    OP_TOTA_ERASE_FLASH_CMD     = 0x6201,\n\n    /* general info cmd: test ok */\n    OP_TOTA_GENERAL_INFO_CMD    = 0x6300,\n    OP_TOTA_MERIDIAN_EFFECT_CMD = 0x6301,\n    OP_TOTA_EQ_SELECT_CMD       = 0x6302,\n    OP_TOTA_VOLUME_PLUS_CMD     = 0x6303,\n    OP_TOTA_VOLUME_DEC_CMD      = 0x6304,\n    OP_TOTA_VOLUME_SET_CMD      = 0x6305,\n    OP_TOTA_VOLUME_GET_CMD      = 0x6306,\n    OP_TOTA_EQ_SET_CMD          = 0x6307,\n    OP_TOTA_EQ_GET_CMD          = 0x6308,\n\n    /* audio dump and mic cmd */\n    OP_TOTA_AUDIO_DUMP_START    = 0x6400,\n    OP_TOTA_AUDIO_DUMP_STOP     = 0x6401,\n    OP_TOTA_AUDIO_DUMP_CONTROL  = 0x6402,\n    OP_TOTA_MIC_TEST_ON         = 0x6403,\n    OP_TOTA_MIC_TEST_OFF        = 0x6404,\n    OP_TOTA_MIC_SWITCH          = 0x6405,\n\n    /* custom cmd */\n    // TODO:\n    OP_TOTA_FACTORY_RESET           = 0x8000,\n    OP_TOTA_CLEAR_PAIRING_INFO      = 0x8001,\n    OP_TOTA_SHUTDOWM                = 0x8002,\n    OP_TOTA_REBOOT                  = 0x8003,\n\n    // TODO:?\n    OP_TOTA_RAW_DATA_SET_CMD = 0x9100,\n\n    /* commond count */\n    OP_TOTA_COMMAND_COUNT,\n    /* to mark that it's a data packet */\n    OP_TOTA_STREAM_DATA = 0xFFFF,\n} APP_TOTA_CMD_CODE_E;\n\n/**\n * @brief The tota command handling return status\n *\n */\ntypedef enum\n{\n    TOTA_NO_ERROR = 0,\n    TOTA_INVALID_CMD = 1,\n    TOTA_INVALID_DATA_PACKET = 2,\n    TOTA_PARAM_LEN_OUT_OF_RANGE = 3,\n    TOTA_PARAMETER_LENGTH_TOO_SHORT = 4,\n    TOTA_PARAM_LEN_TOO_SHORT = 5,\n    TOTA_CMD_HANDLING_FAILED = 6,\n    TOTA_WAITING_RSP_TIMEOUT = 7,\n    TOTA_DATA_XFER_ALREADY_STARTED = 8,\n    TOTA_DATA_XFER_NOT_STARTED_YET = 9,\n    TOTA_DATA_SEGMENT_CRC_CHECK_FAILED = 10,\n    TOTA_WHOLE_DATA_CRC_CHECK_FAILED = 11,\n    TOTA_DATA_XFER_LEN_NOT_MATCHED = 12,\n    TOTA_WRITE_FLASH_CRC_CHECK_FAILED = 13,\n    TOTA_MIC_SWITCH_FAILED,\n    // TO ADD: new return status\n} APP_TOTA_CMD_RET_STATUS_E;\n\n/**\n * @brief Format of the tota command handler function, called when the command is received\n *\n * @param cmdCode\tCustom command code\n * @param ptrParam \tPointer of the received parameter\n * @param paramLen \tLength of the recevied parameter\n * \n */\ntypedef void (*app_tota_cmd_handler_t)(APP_TOTA_CMD_CODE_E cmdCode, uint8_t* ptrParam, uint32_t paramLen);\n\n/**\n * @brief Format of the tota command response handler function, \n *\tcalled when the response to formerly sent command is received\n *\n * @param retStatus\tHandling return status of the command\n * @param ptrParam \tPointer of the received parameter\n * @param paramLen \tLength of the recevied parameter\n * \n */\ntypedef void (*app_tota_cmd_response_handler_t)(APP_TOTA_CMD_RET_STATUS_E retStatus, uint8_t* ptrParam, uint32_t paramLen);\n\n/**\n * @brief Smart voice command definition data structure\n *\n */\ntypedef struct\n{\n    uint32_t                cmdCode;\n    app_tota_cmd_handler_t  cmdHandler;             /**< command handler function */\n    uint16_t                isNeedResponse;         /**< true if needs the response from the peer device */\n    uint16_t                timeoutWaitingRspInMs;  /**< time-out of waiting for response in milli-seconds */\n    app_tota_cmd_response_handler_t\tcmdRspHandler;  /**< command response handler function */\n} APP_TOTA_CMD_INSTANCE_T;\n\n\n#define TOTA_COMMAND_TO_ADD(cmdCode, cmdHandler, isNeedResponse, timeoutWaitingRspInMs, cmdRspHandler)\t\\\n\tstatic const APP_TOTA_CMD_INSTANCE_T cmdCode##_entry __attribute__((used, section(\".tota_handler_table\"))) = \t\\\n\t\t{(cmdCode), (cmdHandler), (isNeedResponse), (timeoutWaitingRspInMs), (cmdRspHandler)};\n\n#define TOTA_COMMAND_PTR_FROM_ENTRY_INDEX(index)\t\\\n\t((APP_TOTA_CMD_INSTANCE_T *)((uint32_t)__tota_handler_table_start + (index)*sizeof(APP_TOTA_CMD_INSTANCE_T)))\n\n#ifdef __cplusplus\n\t}\n#endif\n\n\n#endif // #ifndef __APP_TOTA_CMD_CODE_H__\n\n"
  },
  {
    "path": "services/tota/app_tota_cmd_handler.cpp",
    "content": "/**\n ****************************************************************************************\n *\n * @file app_totac_cmd_handler.c\n *\n * @date 24th April 2018\n *\n * @brief The framework of the tota command handler\n *\n * Copyright (C) 2017\n *\n *\n ****************************************************************************************\n */\n#include \"app_tota_cmd_handler.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"apps.h\"\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n//#include \"rwapp_config.h\"\n#include \"app_spp_tota.h\"\n#include \"app_spp_tota_general_service.h\"\n#include \"app_tota_ble.h\"\n\n#include \"tota_stream_data_transfer.h\"\n\n#define APP_TOTA_CMD_HANDLER_WAITING_RSP_TIMEOUT_SUPERVISOR_COUNT 8\n\n/**\n * @brief waiting response timeout supervision data structure\n *\n */\ntypedef struct {\n  uint16_t entryIndex;    /**< The command waiting for the response */\n  uint16_t msTillTimeout; /**< run-time timeout left milliseconds */\n} APP_TOTA_CMD_WAITING_RSP_SUPERVISOR_T;\n\n/**\n * @brief tota command handling environment\n *\n */\ntypedef struct {\n  APP_TOTA_CMD_WAITING_RSP_SUPERVISOR_T waitingRspTimeoutInstance\n      [APP_TOTA_CMD_HANDLER_WAITING_RSP_TIMEOUT_SUPERVISOR_COUNT];\n  uint32_t lastSysTicks;\n  uint8_t timeoutSupervisorCount;\n  osTimerId supervisor_timer_id;\n  osMutexId mutex;\n} APP_TOTA_CMD_HANDLER_ENV_T;\n\nstatic APP_TOTA_CMD_HANDLER_ENV_T tota_cmd_handler_env;\n\nosMutexDef(app_tota_cmd_handler_mutex);\n\nstatic void app_tota_cmd_handler_rsp_supervision_timer_cb(void const *n);\nosTimerDef(APP_TOTA_CMD_HANDLER_RSP_SUPERVISION_TIMER,\n           app_tota_cmd_handler_rsp_supervision_timer_cb);\n\nstatic void app_tota_cmd_handler_remove_waiting_rsp_timeout_supervision(\n    uint16_t entryIndex);\nstatic void\napp_tota_cmd_handler_add_waiting_rsp_timeout_supervision(uint16_t entryIndex);\n\n/**\n * @brief Callback function of the waiting response supervisor timer.\n *\n */\nstatic void app_tota_cmd_handler_rsp_supervision_timer_cb(void const *n) {\n  uint32_t entryIndex =\n      tota_cmd_handler_env.waitingRspTimeoutInstance[0].entryIndex;\n\n  app_tota_cmd_handler_remove_waiting_rsp_timeout_supervision(entryIndex);\n\n  // it means time-out happens before the response is received from the peer\n  // device, trigger the response handler\n  TOTA_COMMAND_PTR_FROM_ENTRY_INDEX(entryIndex)\n      ->cmdRspHandler(TOTA_WAITING_RSP_TIMEOUT, NULL, 0);\n}\n\nAPP_TOTA_CMD_INSTANCE_T *app_tota_cmd_handler_get_entry_pointer_from_cmd_code(\n    APP_TOTA_CMD_CODE_E cmdCode) {\n  for (uint32_t index = 0; index < ((uint32_t)__tota_handler_table_end -\n                                    (uint32_t)__tota_handler_table_start) /\n                                       sizeof(APP_TOTA_CMD_INSTANCE_T);\n       index++) {\n    if (TOTA_COMMAND_PTR_FROM_ENTRY_INDEX(index)->cmdCode == cmdCode) {\n      return TOTA_COMMAND_PTR_FROM_ENTRY_INDEX(index);\n    }\n  }\n\n  return NULL;\n}\n\nuint16_t app_tota_cmd_handler_get_entry_index_from_cmd_code(\n    APP_TOTA_CMD_CODE_E cmdCode) {\n\n  for (uint32_t index = 0; index < ((uint32_t)__tota_handler_table_end -\n                                    (uint32_t)__tota_handler_table_start) /\n                                       sizeof(APP_TOTA_CMD_INSTANCE_T);\n       index++) {\n    if (TOTA_COMMAND_PTR_FROM_ENTRY_INDEX(index)->cmdCode == cmdCode) {\n      return index;\n    }\n  }\n\n  return INVALID_TOTA_ENTRY_INDEX;\n}\n\nvoid app_tota_get_cmd_response_handler(APP_TOTA_CMD_CODE_E funcCode,\n                                       uint8_t *ptrParam, uint32_t paramLen) {\n  // parameter length check\n  if (paramLen > sizeof(APP_TOTA_CMD_RSP_T)) {\n    return;\n  }\n\n  if (0 == tota_cmd_handler_env.timeoutSupervisorCount) {\n    return;\n  }\n\n  APP_TOTA_CMD_RSP_T *rsp = (APP_TOTA_CMD_RSP_T *)ptrParam;\n\n  uint16_t entryIndex = app_tota_cmd_handler_get_entry_index_from_cmd_code(\n      (APP_TOTA_CMD_CODE_E)(rsp->cmdCodeToRsp));\n  if (INVALID_TOTA_ENTRY_INDEX == entryIndex) {\n    return;\n  }\n\n  // remove the function code from the time-out supervision chain\n  app_tota_cmd_handler_remove_waiting_rsp_timeout_supervision(entryIndex);\n\n  APP_TOTA_CMD_INSTANCE_T *ptCmdInstance =\n      TOTA_COMMAND_PTR_FROM_ENTRY_INDEX(entryIndex);\n\n  // call the response handler\n  if (ptCmdInstance->cmdRspHandler) {\n    ptCmdInstance->cmdRspHandler((APP_TOTA_CMD_RET_STATUS_E)(rsp->cmdRetStatus),\n                                 rsp->rspData, rsp->rspDataLen);\n  }\n}\n\n/**\n * @brief Refresh the waiting response supervisor list\n *\n */\nstatic void app_tota_cmd_refresh_supervisor_env(void) {\n  // do nothing if no supervisor was added\n  if (tota_cmd_handler_env.timeoutSupervisorCount > 0) {\n    uint32_t currentTicks = GET_CURRENT_TICKS();\n    uint32_t passedTicks;\n    if (currentTicks >= tota_cmd_handler_env.lastSysTicks) {\n      passedTicks = (currentTicks - tota_cmd_handler_env.lastSysTicks);\n    } else {\n      passedTicks =\n          (hal_sys_timer_get_max() - tota_cmd_handler_env.lastSysTicks + 1) +\n          currentTicks;\n    }\n\n    uint32_t deltaMs = TICKS_TO_MS(passedTicks);\n\n    APP_TOTA_CMD_WAITING_RSP_SUPERVISOR_T *pRspSupervisor =\n        &(tota_cmd_handler_env.waitingRspTimeoutInstance[0]);\n    for (uint32_t index = 0;\n         index < tota_cmd_handler_env.timeoutSupervisorCount; index++) {\n      if (pRspSupervisor[index].msTillTimeout > deltaMs) {\n        pRspSupervisor[index].msTillTimeout -= deltaMs;\n      } else {\n        pRspSupervisor[index].msTillTimeout = 0;\n      }\n    }\n  }\n\n  tota_cmd_handler_env.lastSysTicks = GET_CURRENT_TICKS();\n}\n\n/**\n * @brief Remove the time-out supervision of waiting response\n *\n * @param entryIndex \tEntry index of the command table\n *\n */\nstatic void app_tota_cmd_handler_remove_waiting_rsp_timeout_supervision(\n    uint16_t entryIndex) {\n  ASSERT(tota_cmd_handler_env.timeoutSupervisorCount > 0,\n         \"%s The BLE tota command time-out supervisor is already empty!!!\",\n         __FUNCTION__);\n\n  osMutexWait(tota_cmd_handler_env.mutex, osWaitForever);\n\n  uint32_t index;\n  for (index = 0; index < tota_cmd_handler_env.timeoutSupervisorCount;\n       index++) {\n    if (tota_cmd_handler_env.waitingRspTimeoutInstance[index].entryIndex ==\n        entryIndex) {\n      memcpy(&(tota_cmd_handler_env.waitingRspTimeoutInstance[index]),\n             &(tota_cmd_handler_env.waitingRspTimeoutInstance[index + 1]),\n             (tota_cmd_handler_env.timeoutSupervisorCount - index - 1) *\n                 sizeof(APP_TOTA_CMD_WAITING_RSP_SUPERVISOR_T));\n      break;\n    }\n  }\n\n  // cannot find it, directly return\n  if (index == tota_cmd_handler_env.timeoutSupervisorCount) {\n    goto exit;\n  }\n\n  tota_cmd_handler_env.timeoutSupervisorCount--;\n\n  // TOTA_LOG_DBG(1,\"decrease the supervisor timer to %d\",\n  // tota_cmd_handler_env.timeoutSupervisorCount);\n\n  if (tota_cmd_handler_env.timeoutSupervisorCount > 0) {\n    // refresh supervisor environment firstly\n    app_tota_cmd_refresh_supervisor_env();\n\n    // start timer, the first entry is the most close one\n    osTimerStart(\n        tota_cmd_handler_env.supervisor_timer_id,\n        tota_cmd_handler_env.waitingRspTimeoutInstance[0].msTillTimeout);\n  } else {\n    // no supervisor, directly stop the timer\n    osTimerStop(tota_cmd_handler_env.supervisor_timer_id);\n  }\n\nexit:\n  osMutexRelease(tota_cmd_handler_env.mutex);\n}\n\n/**\n * @brief Add the time-out supervision of waiting response\n *\n * @param entryIndex \tIndex of the command entry\n *\n */\nstatic void\napp_tota_cmd_handler_add_waiting_rsp_timeout_supervision(uint16_t entryIndex) {\n  ASSERT(tota_cmd_handler_env.timeoutSupervisorCount <\n             APP_TOTA_CMD_HANDLER_WAITING_RSP_TIMEOUT_SUPERVISOR_COUNT,\n         \"%s The tota command response time-out supervisor is full!!!\",\n         __FUNCTION__);\n\n  osMutexWait(tota_cmd_handler_env.mutex, osWaitForever);\n\n  // refresh supervisor environment firstly\n  app_tota_cmd_refresh_supervisor_env();\n\n  APP_TOTA_CMD_INSTANCE_T *pInstance =\n      TOTA_COMMAND_PTR_FROM_ENTRY_INDEX(entryIndex);\n\n  APP_TOTA_CMD_WAITING_RSP_SUPERVISOR_T waitingRspTimeoutInstance\n      [APP_TOTA_CMD_HANDLER_WAITING_RSP_TIMEOUT_SUPERVISOR_COUNT];\n\n  uint32_t index = 0, insertedIndex = 0;\n  for (index = 0; index < tota_cmd_handler_env.timeoutSupervisorCount;\n       index++) {\n    uint32_t msTillTimeout =\n        tota_cmd_handler_env.waitingRspTimeoutInstance[index].msTillTimeout;\n\n    // in the order of low to high\n    if ((tota_cmd_handler_env.waitingRspTimeoutInstance[index].entryIndex !=\n         entryIndex) &&\n        (pInstance->timeoutWaitingRspInMs >= msTillTimeout)) {\n      waitingRspTimeoutInstance[insertedIndex++] =\n          tota_cmd_handler_env.waitingRspTimeoutInstance[index];\n    } else if (pInstance->timeoutWaitingRspInMs < msTillTimeout) {\n      waitingRspTimeoutInstance[insertedIndex].entryIndex = entryIndex;\n      waitingRspTimeoutInstance[insertedIndex].msTillTimeout =\n          pInstance->timeoutWaitingRspInMs;\n\n      insertedIndex++;\n    }\n  }\n\n  // biggest one? then put it at the end of the list\n  if (tota_cmd_handler_env.timeoutSupervisorCount == index) {\n    waitingRspTimeoutInstance[insertedIndex].entryIndex = entryIndex;\n    waitingRspTimeoutInstance[insertedIndex].msTillTimeout =\n        pInstance->timeoutWaitingRspInMs;\n\n    insertedIndex++;\n  }\n\n  // copy to the global variable\n  memcpy((uint8_t *)&(tota_cmd_handler_env.waitingRspTimeoutInstance),\n         (uint8_t *)&waitingRspTimeoutInstance,\n         insertedIndex * sizeof(APP_TOTA_CMD_WAITING_RSP_SUPERVISOR_T));\n\n  tota_cmd_handler_env.timeoutSupervisorCount = insertedIndex;\n\n  // TOTA_LOG_DBG(1,\"increase the supervisor timer to %d\",\n  // tota_cmd_handler_env.timeoutSupervisorCount);\n\n  osMutexRelease(tota_cmd_handler_env.mutex);\n\n  // start timer, the first entry is the most close one\n  osTimerStart(tota_cmd_handler_env.supervisor_timer_id,\n               tota_cmd_handler_env.waitingRspTimeoutInstance[0].msTillTimeout);\n}\n\n/**\n * @brief Receive the data from the peer device and parse them\n *\n * @param ptrData \t\tPointer of the received data\n * @param dataLength\tLength of the received data\n *\n * @return APP_TOTA_CMD_RET_STATUS_E\n */\nAPP_TOTA_CMD_RET_STATUS_E app_tota_cmd_received(uint8_t *ptrData,\n                                                uint32_t dataLength) {\n  TOTA_LOG_DBG(0, \"TOTA Receive data:\");\n  TOTA_LOG_DUMP(\"0x%02x \", ptrData, dataLength);\n  APP_TOTA_CMD_PAYLOAD_T *pPayload = (APP_TOTA_CMD_PAYLOAD_T *)ptrData;\n\n  // check command code\n  if (pPayload->cmdCode >= OP_TOTA_COMMAND_COUNT ||\n      pPayload->cmdCode < OP_TOTA_STRING) {\n    TOTA_LOG_DBG(1, \"[%s]error TOTA_INVALID_CMD\", __func__);\n    return TOTA_INVALID_CMD;\n  }\n\n  // check parameter length\n  if (pPayload->paramLen > sizeof(pPayload->param)) {\n    TOTA_LOG_DBG(1, \"[%s]error TOTA_PARAM_LEN_OUT_OF_RANGE\", __func__);\n    return TOTA_PARAM_LEN_OUT_OF_RANGE;\n  }\n\n  APP_TOTA_CMD_INSTANCE_T *pInstance =\n      app_tota_cmd_handler_get_entry_pointer_from_cmd_code(\n          (APP_TOTA_CMD_CODE_E)(pPayload->cmdCode));\n\n  // execute the command handler\n  pInstance->cmdHandler((APP_TOTA_CMD_CODE_E)(pPayload->cmdCode),\n                        pPayload->param, pPayload->paramLen);\n\n  return TOTA_NO_ERROR;\n}\n\n#if defined(APP_ANC_TEST)\n\n#endif\nstatic void app_tota_cmd_send(APP_TOTA_TRANSMISSION_PATH_E path,\n                              APP_TOTA_CMD_PAYLOAD_T *ptPayLoad) {\n  TOTA_LOG_DBG(1, \"Send tota cmd: size=%u\",\n               (uint32_t)(&(((APP_TOTA_CMD_PAYLOAD_T *)0)->param)) +\n                   ptPayLoad->paramLen);\n  TOTA_LOG_DUMP(\"%02x \", (uint8_t *)ptPayLoad,\n                (uint32_t)(&(((APP_TOTA_CMD_PAYLOAD_T *)0)->param)) +\n                    ptPayLoad->paramLen);\n\n  app_tota_send_data_via_spp(\n      (uint8_t *)ptPayLoad,\n      (uint32_t)(&(((APP_TOTA_CMD_PAYLOAD_T *)0)->param)) +\n          ptPayLoad->paramLen);\n\n#if 0\n\tswitch (path)\n\t{\n        case APP_TOTA_VIA_SPP:\n            app_tota_send_cmd_via_spp((uint8_t *)ptPayLoad, \n\t\t\t\t(uint32_t)(&(((APP_TOTA_CMD_PAYLOAD_T *)0)->param)) + ptPayLoad->paramLen);\n            break;\n#ifdef BLE_TOTA_ENABLED  \n\t\tcase APP_TOTA_VIA_NOTIFICATION:\n\t\t\tapp_tota_send_notification((uint8_t *)ptPayLoad, \n\t\t\t\t(uint32_t)(&(((APP_TOTA_CMD_PAYLOAD_T *)0)->param)) + ptPayLoad->paramLen);\n\t\t\tbreak;\n\t\tcase APP_TOTA_VIA_INDICATION:\n\t\t\tapp_tota_send_indication((uint8_t *)ptPayLoad, \n\t\t\t\t(uint32_t)(&(((APP_TOTA_CMD_PAYLOAD_T *)0)->param)) + ptPayLoad->paramLen);\n            break;\n#endif\n        case APP_TOTA_GEN_VIA_SPP:\n\t\t    app_tota_gen_send_cmd_via_spp((uint8_t *)ptPayLoad, \n\t\t\t\t(uint32_t)(&(((APP_TOTA_CMD_PAYLOAD_T *)0)->param)) + ptPayLoad->paramLen);\n\t\tbreak;\n        default:\n\t\t\tbreak;\n\t}\n#endif\n}\n\n/**\n * @brief Send response to the command request\n *\n * @param responsedCmdCode \tCommand code of the responsed command request\n * @param returnStatus\t\tHandling result\n * @param rspData \t\t\tPointer of the response data\n * @param rspDataLen\t\tLength of the response data\n * @param path\t\t\t\tPath of the data transmission\n *\n * @return APP_TOTA_CMD_RET_STATUS_E\n */\nAPP_TOTA_CMD_RET_STATUS_E\napp_tota_send_response_to_command(APP_TOTA_CMD_CODE_E responsedCmdCode,\n                                  APP_TOTA_CMD_RET_STATUS_E returnStatus,\n                                  uint8_t *rspData, uint32_t rspDataLen,\n                                  APP_TOTA_TRANSMISSION_PATH_E path) {\n  TOTA_LOG_DBG(1, \"[%s]\", __func__);\n  // check responsedCmdCode's validity\n  if (responsedCmdCode >= OP_TOTA_COMMAND_COUNT ||\n      responsedCmdCode < OP_TOTA_RESPONSE_TO_CMD) {\n    return TOTA_INVALID_CMD;\n  }\n\n  APP_TOTA_CMD_PAYLOAD_T payload;\n\n  APP_TOTA_CMD_RSP_T *pResponse = (APP_TOTA_CMD_RSP_T *)&(payload.param);\n\n  // check parameter length\n  if (rspDataLen > sizeof(pResponse->rspData)) {\n    return TOTA_PARAM_LEN_OUT_OF_RANGE;\n  }\n\n  pResponse->cmdCodeToRsp = responsedCmdCode;\n  pResponse->cmdRetStatus = returnStatus;\n  pResponse->rspDataLen = rspDataLen;\n  memcpy(pResponse->rspData, rspData, rspDataLen);\n\n  payload.paramLen = 3 * sizeof(uint16_t) + rspDataLen;\n\n  payload.cmdCode = OP_TOTA_RESPONSE_TO_CMD;\n\n  app_tota_cmd_send(path, &payload);\n\n  return TOTA_NO_ERROR;\n}\n\n/**\n * @brief Send the tota command to the peer device\n *\n * @param cmdCode \tCommand code\n * @param ptrParam \tPointer of the output parameter\n * @param paramLen\tLength of the output parameter\n * @param path\t\tPath of the data transmission\n *\n * @return APP_TOTA_CMD_RET_STATUS_E\n */\nAPP_TOTA_CMD_RET_STATUS_E\napp_tota_send_command(APP_TOTA_CMD_CODE_E cmdCode, uint8_t *ptrParam,\n                      uint32_t paramLen, APP_TOTA_TRANSMISSION_PATH_E path) {\n  // check cmdCode's validity\n  if (cmdCode >= OP_TOTA_COMMAND_COUNT) {\n    TOTA_LOG_DBG(0, \"OP_TOTA_COMMAND_COUNT\");\n    return TOTA_INVALID_CMD;\n  }\n\n  APP_TOTA_CMD_PAYLOAD_T payload;\n\n  // check parameter length\n  if (paramLen > sizeof(payload.param)) {\n    TOTA_LOG_DBG(0, \"TOTA_PARAM_LEN_OUT_OF_RANGE\");\n    return TOTA_PARAM_LEN_OUT_OF_RANGE;\n  }\n\n  uint16_t entryIndex =\n      app_tota_cmd_handler_get_entry_index_from_cmd_code(cmdCode);\n  if (INVALID_TOTA_ENTRY_INDEX == entryIndex) {\n    TOTA_LOG_DBG(0, \"TOTA_INVALID_CMD\");\n    return TOTA_INVALID_CMD;\n  }\n\n  /* cmd filter */\n#if TOTA_ENCODE\n  if (!is_tota_connected()) {\n    if (cmdCode > OP_TOTA_CONN_CONFIRM) {\n      TOTA_LOG_DBG(0, \"COMMAMD NOT PERMIT. PERMISSION DENIED\");\n      return TOTA_INVALID_CMD;\n    }\n\n  } else {\n    // may encrypt here\n  }\n#endif\n\n  APP_TOTA_CMD_INSTANCE_T *pInstance =\n      TOTA_COMMAND_PTR_FROM_ENTRY_INDEX(entryIndex);\n\n  // wrap the command payload\n  payload.cmdCode = cmdCode;\n  payload.paramLen = paramLen;\n  memcpy(payload.param, ptrParam, paramLen);\n\n  // send out the data\n  app_tota_cmd_send(path, &payload);\n\n  // insert into time-out supervison\n  if (pInstance->isNeedResponse) {\n    app_tota_cmd_handler_add_waiting_rsp_timeout_supervision(entryIndex);\n  }\n\n  return TOTA_NO_ERROR;\n}\n\n/**\n * @brief Initialize the tota command handler framework\n *\n */\nvoid app_tota_cmd_handler_init(void) {\n  memset((uint8_t *)&tota_cmd_handler_env, 0, sizeof(tota_cmd_handler_env));\n\n  tota_cmd_handler_env.supervisor_timer_id = osTimerCreate(\n      osTimer(APP_TOTA_CMD_HANDLER_RSP_SUPERVISION_TIMER), osTimerOnce, NULL);\n\n  tota_cmd_handler_env.mutex =\n      osMutexCreate((osMutex(app_tota_cmd_handler_mutex)));\n}\n\nTOTA_COMMAND_TO_ADD(OP_TOTA_RESPONSE_TO_CMD, app_tota_get_cmd_response_handler,\n                    false, 0, NULL);\n"
  },
  {
    "path": "services/tota/app_tota_cmd_handler.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TOTA_CMD_HANDLER_H__\n#define __APP_TOTA_CMD_HANDLER_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"hal_timer.h\"\n#include \"app_tota_cmd_code.h\"\n\n#define GET_CURRENT_TICKS()         hal_sys_timer_get()\n#define GET_CURRENT_MS()            TICKS_TO_MS(GET_CURRENT_TICKS())\n\n\n/**< maximum payload size of one smart voice command */\n#define TOTA_MAXIMUM_DATA_PACKET_LEN        660 //672\n#define APP_TOTA_CMD_MAXIMUM_PAYLOAD_SIZE   TOTA_MAXIMUM_DATA_PACKET_LEN\n\n/**\n * @brief BLE custom command playload\n *\n */\ntypedef struct\n{\n    uint16_t    cmdCode;    /**< command code, from APP_TOTA_CMD_CODE_E */\n    uint16_t    paramLen;   /**< length of the following parameter */\n    uint8_t     param[APP_TOTA_CMD_MAXIMUM_PAYLOAD_SIZE - 2*sizeof(uint16_t)];\n} APP_TOTA_CMD_PAYLOAD_T;\n\n/**\n * @brief Command response parameter structure\n *\n */\ntypedef struct\n{\n    uint16_t    cmdCodeToRsp;   /**< tell which command code to response */\n    uint16_t    cmdRetStatus;   /**< handling result of the command, from APP_TOTA_CMD_RET_STATUS_E */\n    uint16_t    rspDataLen;     /**< length of the response data */\n    uint8_t     rspData[APP_TOTA_CMD_MAXIMUM_PAYLOAD_SIZE - 5*sizeof(uint16_t)];\n} APP_TOTA_CMD_RSP_T;\n\nvoid                        app_tota_get_cmd_response_handler(APP_TOTA_CMD_CODE_E funcCode, uint8_t* ptrParam, uint32_t paramLen);\nvoid                        app_tota_data_xfer_control_handler(APP_TOTA_CMD_CODE_E funcCode, uint8_t* ptrParam, uint32_t paramLen);\nvoid                        app_tota_control_data_xfer(bool isStartXfer);\nvoid                        app_tota_start_data_xfer_control_rsp_handler(APP_TOTA_CMD_RET_STATUS_E retStatus, uint8_t* ptrParam, uint32_t paramLen);\nvoid                        app_tota_stop_data_xfer_control_rsp_handler(APP_TOTA_CMD_RET_STATUS_E retStatus, uint8_t* ptrParam, uint32_t paramLen);\nAPP_TOTA_CMD_RET_STATUS_E   app_tota_send_response_to_command(APP_TOTA_CMD_CODE_E responsedCmdCode, APP_TOTA_CMD_RET_STATUS_E returnStatus, \n                                uint8_t* rspData, uint32_t rspDataLen, APP_TOTA_TRANSMISSION_PATH_E path);\nAPP_TOTA_CMD_RET_STATUS_E   app_tota_send_command(APP_TOTA_CMD_CODE_E cmdCode, uint8_t* ptrParam, uint32_t paramLen, APP_TOTA_TRANSMISSION_PATH_E path);\nvoid                        app_tota_cmd_handler_init(void);\nAPP_TOTA_CMD_INSTANCE_T*    app_tota_cmd_handler_get_entry_pointer_from_cmd_code(APP_TOTA_CMD_CODE_E cmdCode);\nuint16_t                    app_tota_cmd_handler_get_entry_index_from_cmd_code(APP_TOTA_CMD_CODE_E cmdCode);\nAPP_TOTA_CMD_RET_STATUS_E   app_tota_cmd_received(uint8_t* ptrData, uint32_t dataLength);\n#if defined(APP_ANC_TEST)\nAPP_TOTA_CMD_RET_STATUS_E app_anc_tota_cmd_received(uint8_t* ptrData, uint32_t dataLength);\n#endif\n\n\n\n\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif // #ifndef __APP_TOTA_CMD_HANDLER_H__\n\n"
  },
  {
    "path": "services/tota/app_tota_conn.cpp",
    "content": "/********************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n *******************************************************************************/\n\n#include \"app_tota_conn.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"sha256.h\"\n#include \"stdlib.h\"\n#include \"string.h\"\n\nstatic bool _is_tota_initiate = false;\n\ntypedef struct {\n  uint8_t length;\n  uint8_t random_key[MAX_RANDOM_KEY_SIZE];\n} TOTA_CONN_STRUCT_T;\n\ntypedef TOTA_CONN_STRUCT_T random_key_t;\n\ntypedef struct {\n  /* local & peer random list */\n  random_key_t random_a;\n  random_key_t random_b;\n  /* hash key generate from (random_a, random_b) */\n  uint8_t hash_key[HASH_KEY_SIZE];\n  /* encrypt key generate from hash key */\n  uint8_t encrypt_key[ENCRYPT_KEY_SIZE];\n} TOTA_CONN_PARAMETER_T;\n\nstatic TOTA_CONN_PARAMETER_T keyManager;\n\n/*\n**  @\n*/\nstatic void _tota_conn_and_update_key_handle(APP_TOTA_CMD_CODE_E funcCode,\n                                             uint8_t *ptrParam,\n                                             uint32_t paramLen);\n\nstatic uint8_t _generate_random_algorithm(uint8_t id, uint8_t a, uint8_t b);\n\n/* generate key */\nstatic void _generate_random_key();\n\n/* calculate key */\nstatic void _calculate_encrypt_key();\n\nstatic uint8_t _generate_random_algorithm(uint8_t id, uint8_t a, uint8_t b) {\n  uint8_t op = id % 6;\n  switch (op) {\n  case 0:\n    return a + b;\n  case 1:\n    return a * b;\n  case 2:\n    return a & b;\n  case 3:\n    return a | b;\n  case 4:\n    return a ^ b;\n  case 5:\n    return a * a + b * b;\n  default:\n    return 0;\n  }\n}\n\nstatic void _generate_random_key() {\n  uint8_t random_length = rand() % (MAX_RANDOM_KEY_SIZE + 1);\n  if (random_length < 16) {\n    random_length += 16;\n  }\n  keyManager.random_a.length = random_length;\n  uint32_t *prandom = (uint32_t *)keyManager.random_a.random_key;\n  for (uint8_t i = 0; i < (random_length + 3) / 4; i++) {\n    prandom[i] = rand();\n  }\n  TOTA_LOG_DBG(1, \"generate random : 0x%x\", random_length);\n  TOTA_LOG_DUMP(\"%02x \", keyManager.random_a.random_key, random_length);\n}\n\nstatic void _calculate_encrypt_key() {\n  uint8_t random_key[MAX_RANDOM_KEY_SIZE];\n  random_key_t *prandom_a = &keyManager.random_a;\n  random_key_t *prandom_b = &keyManager.random_b;\n\n  /* align random list */\n  if (prandom_a->length > prandom_b->length) {\n    memset(prandom_b->random_key + prandom_b->length, 0,\n           prandom_a->length - prandom_b->length);\n    prandom_b->length = prandom_a->length;\n  } else if (prandom_a->length < prandom_b->length) {\n    memset(prandom_a->random_key + prandom_a->length, 0,\n           prandom_b->length - prandom_a->length);\n    prandom_a->length = prandom_b->length;\n  } else {\n    TOTA_LOG_DBG(0, \"random list is the same size\");\n  }\n  TOTA_LOG_DBG(1, \"random list a : 0x%x\", prandom_a->length);\n  TOTA_LOG_DUMP(\"%02x \", keyManager.random_a.random_key, prandom_a->length);\n  TOTA_LOG_DBG(1, \"random list b : 0x%x\", prandom_b->length);\n  TOTA_LOG_DUMP(\"%02x \", keyManager.random_b.random_key, prandom_b->length);\n\n  /* calculate random_key */\n  for (uint8_t i = 0; i < prandom_a->length; i++) {\n    random_key[i] = _generate_random_algorithm(i, prandom_a->random_key[i],\n                                               prandom_b->random_key[i]);\n  }\n\n  TOTA_LOG_DBG(0, \"generate random key:\");\n  TOTA_LOG_DUMP(\"%02x \", random_key, prandom_a->length);\n#if defined(TOTA)\n  SHA256_hash(random_key, prandom_a->length, keyManager.hash_key);\n#endif\n  TOTA_LOG_DBG(0, \"generate hash key:\");\n  TOTA_LOG_DUMP(\"\\\\x%02x\", keyManager.hash_key, HASH_KEY_SIZE);\n}\n\nstatic void _tota_conn_and_update_key_handle(APP_TOTA_CMD_CODE_E funcCode,\n                                             uint8_t *ptrParam,\n                                             uint32_t paramLen) {\n  TOTA_CONN_STRUCT_T *pConn = (TOTA_CONN_STRUCT_T *)ptrParam;\n\n  switch (funcCode) {\n  case OP_TOTA_STRING:\n    TOTA_LOG_DBG(0, \"not willing to receive this CMD\");\n    break;\n  case OP_TOTA_CONN_RESPONSE:\n    TOTA_LOG_DBG(0, \"not willing to receive this CMD\");\n    break;\n  case OP_TOTA_CONN_INITIATE:\n    _is_tota_initiate = true;\n    keyManager.random_b = *pConn;\n    _generate_random_key();\n    app_tota_send_command(\n        OP_TOTA_CONN_RESPONSE, (uint8_t *)&keyManager.random_a,\n        keyManager.random_a.length + 1, app_tota_get_datapath());\n    _calculate_encrypt_key();\n    break;\n  case OP_TOTA_CONN_CONFIRM:\n    if (_is_tota_initiate) {\n      _is_tota_initiate = false;\n      if (memcmp(keyManager.hash_key, pConn->random_key, HASH_KEY_SIZE) == 0) {\n        tota_set_encrypt_key_from_hash_key(keyManager.hash_key);\n        tota_connected_handle();\n        TOTA_LOG_DBG(0, \"tota connect success\");\n        tota_printf(\"connect success.\");\n      } else {\n        TOTA_LOG_DBG(0, \"tota connect failed\");\n        tota_printf(\"connect failed.\");\n      }\n    }\n  default:;\n  }\n}\n\nTOTA_COMMAND_TO_ADD(OP_TOTA_CONN_INITIATE, _tota_conn_and_update_key_handle,\n                    false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_CONN_RESPONSE, _tota_conn_and_update_key_handle,\n                    false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_CONN_CONFIRM, _tota_conn_and_update_key_handle,\n                    false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_STRING, _tota_conn_and_update_key_handle, false, 0,\n                    NULL);"
  },
  {
    "path": "services/tota/app_tota_conn.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __APP_TOTA_CONN_H__\n#define __APP_TOTA_CONN_H__\n\n\n/* enable or disable TOTA_ENCODE */\n#define TOTA_ENCODE             1\n\n\n/* unit: byte */\n#define HASH_KEY_SIZE           32\n#define ENCRYPT_KEY_SIZE        16\n#define RANDOM_KEY_SIZE         16\n#define MAX_RANDOM_KEY_SIZE     128\n\n#endif"
  },
  {
    "path": "services/tota/app_tota_custom.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_ibrt_nvrecord.h\"\n#include \"app_spp_tota.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"apps.h\"\n#include \"cmsis_os.h\"\n#include \"nvrecord.h\"\n#include \"nvrecord_env.h\"\n#include \"tota_stream_data_transfer.h\"\n\n/**/\nstatic void _custom_cmd_handle(APP_TOTA_CMD_CODE_E funcCode, uint8_t *ptrParam,\n                               uint32_t paramLen);\n\n/*-----------------------------------------------------------------------------*/\nstatic void _tota_spp_connected(void);\nstatic void _tota_spp_disconnected(void);\nstatic void _tota_spp_tx_done(void);\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len);\n\nstatic tota_callback_func_t s_func = {_tota_spp_connected,\n                                      _tota_spp_disconnected, _tota_spp_tx_done,\n                                      _tota_spp_data_receive_handle};\n\nstatic APP_TOTA_MODULE_E s_module = APP_TOTA_CUSTOM;\n\nvoid app_tota_custom_init() { tota_callback_module_register(s_module, s_func); }\n\nstatic void _tota_spp_connected(void) { ; }\n\nstatic void _tota_spp_disconnected(void) { ; }\n\nstatic void _tota_spp_tx_done(void) { ; }\n\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len) { ; }\n/*-----------------------------------------------------------------------------*/\n\nstatic void _custom_cmd_handle(APP_TOTA_CMD_CODE_E funcCode, uint8_t *ptrParam,\n                               uint32_t paramLen) {\n  TOTA_LOG_DBG(2, \"Func code 0x%x, param len %d\", funcCode, paramLen);\n  TOTA_LOG_DBG(0, \"Param content:\");\n  DUMP8(\"%02x \", ptrParam, paramLen);\n  APP_TOTA_CMD_RET_STATUS_E rsp_status = TOTA_NO_ERROR;\n  app_tota_send_response_to_command(funcCode, rsp_status, NULL, 0,\n                                    app_tota_get_datapath());\n  switch (funcCode) {\n  case OP_TOTA_FACTORY_RESET:\n    TRACE(0, \"##### custom: factory reset\");\n    app_reset();\n    break;\n  case OP_TOTA_CLEAR_PAIRING_INFO:\n    TRACE(0, \"##### custom: clear pairing info\");\n    app_ibrt_nvrecord_delete_all_mobile_record();\n    break;\n  case OP_TOTA_SHUTDOWM:\n    TRACE(0, \"##### custom: shutdown\");\n    app_shutdown();\n    break;\n  case OP_TOTA_REBOOT:\n    TRACE(0, \"##### custom: reboot\");\n    // TODO:\n    break;\n  default:;\n  }\n}\n\nTOTA_COMMAND_TO_ADD(OP_TOTA_FACTORY_RESET, _custom_cmd_handle, false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_CLEAR_PAIRING_INFO, _custom_cmd_handle, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_SHUTDOWM, _custom_cmd_handle, false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_REBOOT, _custom_cmd_handle, false, 0, NULL);\n"
  },
  {
    "path": "services/tota/app_tota_custom.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __APP_TOTA_CUSTOM_H__\n#define __APP_TOTA_CUSTOM_H__\n\nvoid app_tota_custom_init();\n\n#endif\n"
  },
  {
    "path": "services/tota/app_tota_data_handler.cpp",
    "content": "/**\n ****************************************************************************************\n *\n * @file app_tota_data_handler.c\n *\n * @date 24th April 2018\n *\n * @brief The framework of the tota data handler\n *\n * Copyright (C) 2017\n *\n *\n ****************************************************************************************\n */\n#include \"app_tota_data_handler.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"apps.h\"\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n//#include \"rwapp_config.h\"\n#include \"app_spp_tota.h\"\n#include \"app_spp_tota_general_service.h\"\n#include \"app_tota_conn.h\"\n#include \"crc32.h\"\n#include \"tota_buffer_manager.h\"\n#include \"tota_stream_data_transfer.h\"\n/**\n * @brief tota data handling environment\n *\n */\n\ntypedef struct {\n  uint8_t isDataXferInProgress;\n  uint8_t isCrcCheckEnabled;\n  uint32_t wholeDataXferLen;\n  uint32_t dataXferLenUntilLastSegVerification;\n  uint32_t currentWholeCrc32;\n  uint32_t wholeCrc32UntilLastSeg;\n  uint32_t crc32OfCurrentSeg;\n} APP_TOTA_DATA_HANDLER_ENV_T;\n\n#define APP_TOTA_TX_BUF_SIZE 2046\nstatic uint8_t app_tota_tmpDataXferBuf[APP_TOTA_TX_BUF_SIZE];\n\n/*static receive_data_callback recervice_data_cb = NULL;\nvoid app_tota_data_received_callback_handler_register(receive_data_callback cb )\n{\n    recervice_data_cb = cb;\n}\n__attribute__((weak)) void app_tota_data_received_callback(uint8_t* ptrData,\nuint32_t dataLength)\n{\n    if(recervice_data_cb != NULL){\n        recervice_data_cb(ptrData,dataLength);\n    }\n}\n*/\n\n/**\n * @brief Receive the data from the peer device and parse them\n *\n * @param ptrData \t\tPointer of the received data\n * @param dataLength\tLength of the received data\n *\n * @return APP_TOTA_CMD_RET_STATUS_E\n */\nAPP_TOTA_CMD_RET_STATUS_E app_tota_data_received(uint8_t *ptrData,\n                                                 uint32_t dataLength) {\n  TOTA_LOG_DBG(0, \">>> app_tota_data_received\");\n  if ((OP_TOTA_STREAM_DATA !=\n       (APP_TOTA_CMD_CODE_E)(((uint16_t *)ptrData)[0])) ||\n      (dataLength < TOTA_CMD_CODE_SIZE)) {\n    return TOTA_INVALID_DATA_PACKET;\n  }\n  APP_TOTA_TRANSMISSION_PATH_E dataPath = app_tota_get_datapath();\n\n  APP_TOTA_DATA_ACK_T tAck = {0};\n  app_tota_send_command(OP_TOTA_SPP_DATA_ACK, (uint8_t *)&tAck, sizeof(tAck),\n                        dataPath);\n  return TOTA_NO_ERROR;\n}\n\nvoid app_tota_send_data(APP_TOTA_TRANSMISSION_PATH_E path, uint8_t *ptrData,\n                        uint32_t dataLength) {\n  if (path < APP_TOTA_TRANSMISSION_PATH_COUNT) {\n    ((uint16_t *)app_tota_tmpDataXferBuf)[0] = OP_TOTA_STREAM_DATA;\n    memcpy(app_tota_tmpDataXferBuf + TOTA_CMD_CODE_SIZE, ptrData, dataLength);\n\n    switch (path) {\n    case APP_TOTA_VIA_SPP:\n      app_tota_send_data_via_spp(app_tota_tmpDataXferBuf,\n                                 dataLength + TOTA_CMD_CODE_SIZE);\n      break;\n    case APP_TOTA_GEN_VIA_SPP:\n      app_tota_gen_send_data_via_spp(app_tota_tmpDataXferBuf,\n                                     dataLength + TOTA_CMD_CODE_SIZE);\n      break;\n    default:\n      break;\n    }\n  }\n}\n\n#if defined(APP_ANC_TEST)\nvoid app_anc_tota_send_data(APP_TOTA_TRANSMISSION_PATH_E path, uint8_t *ptrData,\n                            uint32_t dataLength) {\n  if (path < APP_TOTA_TRANSMISSION_PATH_COUNT) {\n    switch (path) {\n    case APP_TOTA_VIA_SPP:\n      app_tota_send_data_via_spp(ptrData, dataLength);\n      break;\n    default:\n      break;\n    }\n  }\n}\n#endif\n\nvoid app_tota_handle_received_data(uint8_t *buffer, uint16_t maxBytes) {\n  TOTA_LOG_DBG(2, \"[%s]data receive data length = %d\", __func__, maxBytes);\n  uint8_t *_buf = buffer;\n  uint32_t _bufLen = maxBytes;\n\n  if (OP_TOTA_STREAM_DATA == *(uint16_t *)buffer) {\n    TOTA_LOG_DBG(0, \"APP TOTA DATA RECEIVED\");\n    app_tota_data_received(_buf, _bufLen);\n  } else {\n    if (OP_TOTA_STRING == *(uint16_t *)buffer) {\n      TOTA_LOG_DBG(0, \"APP TOTA STRING RECEIVED\");\n    } else {\n#if defined(TOTA_ENCODE) && TOTA_ENCODE\n      if (is_tota_connected()) {\n        TOTA_LOG_DBG(0, \"APP TOTA ENCRYPT DATA RECEIVED\");\n        _buf = tota_decrypt_packet(buffer, maxBytes, &_bufLen);\n      } else {\n        if (*(uint16_t *)buffer <= OP_TOTA_CONN_CONFIRM) {\n          TOTA_LOG_DBG(0, \"APP TOTA UNCRYPT CONN COMMAND\");\n        } else {\n          // TODO\n          TOTA_LOG_DBG(0, \"TOTA UNCONNECT: COMMAND NOT SUPPORT\");\n          return;\n        }\n      }\n      app_tota_cmd_received(_buf, _bufLen);\n#else\n      TOTA_LOG_DBG(0, \"APP TOTA CMD RECEIVED\");\n      app_tota_cmd_received(_buf, _bufLen);\n#endif\n    }\n  }\n}\n"
  },
  {
    "path": "services/tota/app_tota_data_handler.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __APP_TOTA_DATA_HANDLER_H__\n#define __APP_TOTA_DATA_HANDLER_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"app_tota_cmd_code.h\"\n\ntypedef struct\n{\n    uint8_t        isHasCrcCheck     :  1;\n    uint8_t        reserved          :  7;\n    uint8_t        reservedBytes[7];\t\n} APP_TOTA_START_DATA_XFER_T;\n\ntypedef struct\n{\n    uint8_t     isHasWholeCrcCheck  :   1;\n    uint8_t     reserved            :   7;\n    uint8_t     reservedBytes1[3];\t\n    uint32_t    wholeDataLenToCheck;\n    uint32_t    crc32OfWholeData;\n} APP_TOTA_STOP_DATA_XFER_T;\n\ntypedef struct\n{\n    uint32_t    segmentDataLen;\n    uint32_t    crc32OfSegment;\n    uint8_t     reserved[4];\n} APP_TOTA_VERIFY_DATA_SEGMENT_T;\n\ntypedef struct\n{\n    uint32_t    reserved;\n} APP_TOTA_START_DATA_XFER_RSP_T;\n\ntypedef struct\n{\n    uint32_t    reserved;\n} APP_TOTA_STOP_DATA_XFER_RSP_T;\n\ntypedef struct\n{\n    uint32_t    reserved;\n} APP_TOTA_VERIFY_DATA_SEGMENT_RSP_T;\n\ntypedef struct\n{\n    uint32_t    dataLenReceivedByPeerDev;\n} APP_TOTA_DATA_ACK_T;\n\ntypedef void(* receive_data_callback)(uint8_t* ptrData, uint32_t dataLength);\n\n//void app_tota_data_reset_env(void);\n\nvoid app_tota_data_xfer_started(APP_TOTA_CMD_RET_STATUS_E retStatus);\nvoid app_tota_data_xfer_stopped(APP_TOTA_CMD_RET_STATUS_E retStatus);\nvoid app_tota_data_segment_verified(APP_TOTA_CMD_RET_STATUS_E retStatus);\n//void app_tota_data_received_callback(uint8_t* ptrData, uint32_t dataLength);\nvoid app_tota_send_data(APP_TOTA_TRANSMISSION_PATH_E path, uint8_t* ptrData, uint32_t dataLength);\nvoid app_tota_send_data_stream(APP_TOTA_TRANSMISSION_PATH_E path, uint8_t* ptrData, uint32_t dataLength);\nvoid app_tota_start_data_xfer(APP_TOTA_TRANSMISSION_PATH_E path, APP_TOTA_START_DATA_XFER_T* req);\nvoid app_tota_stop_data_xfer(APP_TOTA_TRANSMISSION_PATH_E path, APP_TOTA_STOP_DATA_XFER_T* req);\nAPP_TOTA_CMD_RET_STATUS_E app_tota_data_received(uint8_t* ptrData, uint32_t dataLength);\nbool app_tota_data_is_data_transmission_started(void);\nvoid app_tota_handle_received_data(uint8_t* buffer, uint16_t maxBytes);\nvoid app_tota_kickoff_dataxfer(void);\nvoid app_tota_stop_dataxfer(void);\nvoid app_tota_data_ack_received(uint32_t dataLength);\nvoid app_tota_data_received_callback_handler_register(receive_data_callback cb );\n\n#if defined(APP_ANC_TEST)\nvoid app_anc_tota_send_data(APP_TOTA_TRANSMISSION_PATH_E path, uint8_t* ptrData, uint32_t dataLength);\n#endif\n\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif // #ifndef __APP_TOTA_DATA_HANDLER_H__"
  },
  {
    "path": "services/tota/app_tota_flash_program.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"app_tota_flash_program.h\"\n#include \"app_spp_tota.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"crc32.h\"\n#include \"hal_norflash.h\"\n#include \"pmu.h\"\n#include \"string.h\"\n\n#define TOTA_CACHE_2_UNCACHE(addr)                                             \\\n  ((unsigned int *)((unsigned int)(addr) & ~(0x04000000)))\n\nstatic uint8_t sector_buffer[FLASH_SECTOR_SIZE_IN_BYTES];\nstatic uint32_t sector_size = FLASH_SECTOR_SIZE_IN_BYTES;\n\n/*\n**  handle flash cmd\n**  -> OP_TOTA_WRITE_FLASH_CMD\n**  -> OP_TOTA_ERASE_FLASH_CMD\n*/\nstatic void _tota_flash_cmd_handle(APP_TOTA_CMD_CODE_E funcCode,\n                                   uint8_t *ptrParam, uint32_t paramLen);\n\n/*\n**  just use this function to write data to flash with proper address\n**  already handle sector alignment\n**  write flash success -> return true\n**  write flash failed  -> return false\n*/\nstatic bool _write_flash_with_crc_check(uint32_t startAddr, uint8_t *dataBuf,\n                                        uint32_t dataLen, uint32_t crc);\n\n/*\n**  just use this function to erase flash with proper address and length\n**  already handle sector alignment\n*/\nstatic void _erase_flash(uint32_t startAddr, uint32_t dataLen);\n\n/*------------------------------------------------------------------------------------------------------*/\nstatic void _tota_spp_connected(void);\nstatic void _tota_spp_disconnected(void);\nstatic void _tota_spp_tx_done(void);\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len);\n\nstatic tota_callback_func_t s_func = {_tota_spp_connected,\n                                      _tota_spp_disconnected, _tota_spp_tx_done,\n                                      _tota_spp_data_receive_handle};\n\nstatic APP_TOTA_MODULE_E s_module = APP_TOTA_FLASH;\n\nvoid app_tota_flash_init() { tota_callback_module_register(s_module, s_func); }\n\nstatic void _tota_spp_connected(void) { ; }\n\nstatic void _tota_spp_disconnected(void) { ; }\n\nstatic void _tota_spp_tx_done(void) { ; }\n\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len) { ; }\n\n/*------------------------------------------------------------------------------------------------------*/\n\n/* for debug and test */\nvoid tota_show_flash_test(uint32_t startAddr, uint32_t len) {\n  uint8_t *pbuf = (uint8_t *)startAddr;\n  for (uint32_t i = 0; i < len; i++) {\n    TOTA_LOG_DBG(3, \"%d: [0x%2x] || [%c]\", i, pbuf[i], (char)pbuf[i]);\n  }\n}\n\n/* for debug and test */\nvoid tota_write_flash_test(uint32_t startAddr, uint8_t *dataBuf,\n                           uint32_t dataLen) {\n  uint32_t lock;\n  uint32_t s1, s2, s3, s4;\n  hal_norflash_get_size(HAL_NORFLASH_ID_0, &s1, &s2, &s3, &s4);\n  TOTA_LOG_DBG(4, \"-- %u %u %u %u --\", s1, s2, s3, s4);\n  TOTA_LOG_DBG(2, \"flush %d bytes to flash addr 0x%x\", dataLen, startAddr);\n  TOTA_LOG_DBG(1, \"data: %s\", (char *)dataBuf);\n\n  lock = int_lock_global();\n  pmu_flash_write_config();\n  hal_norflash_erase(HAL_NORFLASH_ID_0, (uint32_t)(startAddr),\n                     FLASH_SECTOR_SIZE_IN_BYTES);\n  hal_norflash_write(HAL_NORFLASH_ID_0, (uint32_t)(startAddr), dataBuf,\n                     dataLen);\n  pmu_flash_read_config();\n  int_unlock_global(lock);\n\n  uint8_t *pbuf = (uint8_t *)startAddr;\n  for (uint32_t i = 0; i < dataLen; i++) {\n    TOTA_LOG_DBG(3, \"%d: [0x%2x] || [0x%2x]\", i, pbuf[i], dataBuf[i]);\n  }\n}\n\nstatic void _tota_flash_cmd_handle(APP_TOTA_CMD_CODE_E funcCode,\n                                   uint8_t *ptrParam, uint32_t paramLen) {\n  TOTA_LOG_DBG(2, \"Func code 0x%x, param len %d\", funcCode, paramLen);\n  TOTA_LOG_DBG(1, \"function: %s\", __func__);\n  APP_TOTA_TRANSMISSION_PATH_E dataPath = app_tota_get_datapath();\n  APP_TOTA_CMD_RET_STATUS_E rsp_status = TOTA_NO_ERROR;\n  TOTA_WRITE_FLASH_STRUCT_T *pflash_write_struct =\n      (TOTA_WRITE_FLASH_STRUCT_T *)ptrParam;\n  TOTA_ERASE_FLASH_STRUCT_T *pflash_erase_struct =\n      (TOTA_ERASE_FLASH_STRUCT_T *)ptrParam;\n  uint32_t crc;\n  switch (funcCode) {\n  case OP_TOTA_WRITE_FLASH_CMD:\n    TOTA_LOG_DBG(2, \"write flash: %d bytes, crc: 0x%x\",\n                 pflash_write_struct->dataLen, pflash_write_struct->dataCrc);\n    pflash_write_struct->dataBuf[pflash_write_struct->dataLen] = '\\0';\n    TOTA_LOG_DBG(1, \"write flash: %s\", (char *)pflash_write_struct->dataBuf);\n    rsp_status = TOTA_WRITE_FLASH_CRC_CHECK_FAILED;\n    crc = crc32(0, pflash_write_struct->dataBuf, pflash_write_struct->dataLen);\n    TOTA_LOG_DBG(1, \"crc 0x%x || 0x%x\", crc, pflash_write_struct->dataCrc);\n    if (crc == pflash_write_struct->dataCrc) {\n      if (_write_flash_with_crc_check(\n              pflash_write_struct->address, pflash_write_struct->dataBuf,\n              pflash_write_struct->dataLen, pflash_write_struct->dataCrc)) {\n        rsp_status = TOTA_NO_ERROR;\n      }\n    }\n\n    else {\n      TOTA_LOG_DBG(0, \"crc error...\");\n    }\n    // tota_show_flash_test(TOTA_FLASH_TEST_ADDR-10, 30);\n    break;\n  case OP_TOTA_ERASE_FLASH_CMD:\n    TOTA_LOG_DBG(0, \"erase flash\");\n    TOTA_LOG_DBG(2, \"erase flash: 0x%x bytes, length: %u\",\n                 pflash_erase_struct->address, pflash_erase_struct->length);\n    _erase_flash(pflash_erase_struct->address, pflash_erase_struct->length);\n    // tota_show_flash_test(TOTA_FLASH_TEST_ADDR-10, 30);\n    break;\n  default:\n    TOTA_LOG_DBG(0, \"error function code\");\n  }\n  app_tota_send_response_to_command(funcCode, rsp_status, NULL, 0, dataPath);\n}\n\nstatic bool _write_flash_with_crc_check(uint32_t startAddr, uint8_t *dataBuf,\n                                        uint32_t dataLen, uint32_t crc) {\n  uint32_t lock;\n  TOTA_LOG_DBG(2, \"flush %d bytes to flash addr 0x%x\", dataLen, startAddr);\n  // TOTA_LOG_DBG(1,\"data: %s\", (char *)dataBuf);\n\n  uint32_t pre_bytes = 0, middle_bytes = 0, post_bytes = 0;\n  uint32_t base1 = startAddr - startAddr % sector_size;\n  uint32_t base2 = startAddr + dataLen - (startAddr + dataLen) % sector_size;\n  uint32_t exist_bytes;\n  uint32_t middle_start_addr;\n  uint32_t buffer_offset;\n  if (startAddr % sector_size == 0) {\n    pre_bytes = 0;\n    middle_bytes = dataLen - dataLen % sector_size;\n    post_bytes = dataLen - middle_bytes;\n  } else {\n    if (base1 == base2) {\n      pre_bytes = dataLen;\n    } else {\n      pre_bytes = sector_size - startAddr % sector_size;\n      middle_bytes = base2 - base1 - sector_size;\n      post_bytes = startAddr + dataLen - base2;\n    }\n  }\n  TOTA_LOG_DBG(3, \"pre:%u, middle:%u, post:%u\", pre_bytes, middle_bytes,\n               post_bytes);\n\n  if (pre_bytes != 0) {\n    memcpy(sector_buffer, (uint8_t *)base1, sector_size);\n    if (base1 == base2)\n      memcpy(sector_buffer + (startAddr - base1), dataBuf, dataLen);\n    else\n      memcpy(sector_buffer + (startAddr - base1), dataBuf,\n             sector_size - (startAddr - base1));\n    lock = int_lock_global();\n    pmu_flash_write_config();\n    hal_norflash_erase(HAL_NORFLASH_ID_0, base1, sector_size);\n    hal_norflash_write(HAL_NORFLASH_ID_0, base1, sector_buffer, sector_size);\n    pmu_flash_read_config();\n    int_unlock_global(lock);\n  }\n  if (middle_bytes != 0) {\n    if (base1 != startAddr)\n      middle_start_addr = base1 + sector_size;\n    else\n      middle_start_addr = base1;\n    buffer_offset = middle_start_addr - startAddr;\n    lock = int_lock_global();\n    pmu_flash_write_config();\n    for (uint32_t i = 0; i < middle_bytes / sector_size; i++) {\n      hal_norflash_erase(HAL_NORFLASH_ID_0,\n                         middle_start_addr + (i * sector_size), sector_size);\n      hal_norflash_write(\n          HAL_NORFLASH_ID_0, middle_start_addr + (i * sector_size),\n          dataBuf + buffer_offset + (i * sector_size), sector_size);\n    }\n    pmu_flash_read_config();\n    int_unlock_global(lock);\n  }\n  if (post_bytes != 0) {\n    exist_bytes = sector_size - post_bytes;\n    memcpy(sector_buffer, (uint8_t *)(base2 + post_bytes), exist_bytes);\n\n    lock = int_lock_global();\n    pmu_flash_write_config();\n\n    hal_norflash_erase(HAL_NORFLASH_ID_0, base2, FLASH_SECTOR_SIZE_IN_BYTES);\n    hal_norflash_write(HAL_NORFLASH_ID_0, base2, dataBuf + (base2 - startAddr),\n                       post_bytes);\n    hal_norflash_write(HAL_NORFLASH_ID_0, base2 + post_bytes, sector_buffer,\n                       exist_bytes);\n\n    pmu_flash_read_config();\n    int_unlock_global(lock);\n  }\n\n  // read and check crc\n  const uint32_t read_size = 1024;\n  uint8_t read_buffer[read_size];\n  uint32_t left_bytes = dataLen;\n  uint32_t read_offset = 0;\n  uint32_t calculate_crc = 0;\n  while (left_bytes > read_size) {\n    memcpy(read_buffer, (uint8_t *)(startAddr + read_offset), read_size);\n    calculate_crc = crc32(calculate_crc, read_buffer, read_size);\n    read_offset += read_size;\n    left_bytes -= read_size;\n  }\n  if (left_bytes != 0) {\n    memcpy(read_buffer, (uint8_t *)(startAddr + read_offset), left_bytes);\n    calculate_crc = crc32(calculate_crc, read_buffer, left_bytes);\n  }\n\n  return crc == calculate_crc;\n}\n\nstatic void _erase_flash(uint32_t startAddr, uint32_t dataLen) {\n  uint32_t lock;\n  TOTA_LOG_DBG(2, \"erase %d bytes from flash addr 0x%x\", dataLen, startAddr);\n\n  uint32_t pre_bytes = 0, middle_bytes = 0, post_bytes = 0;\n  uint32_t base1 = startAddr - startAddr % sector_size;\n  uint32_t base2 = startAddr + dataLen - (startAddr + dataLen) % sector_size;\n  uint32_t exist_bytes;\n  uint32_t middle_start_addr;\n  if (startAddr % sector_size == 0) {\n    pre_bytes = 0;\n    middle_bytes = dataLen - dataLen % sector_size;\n    post_bytes = dataLen - middle_bytes;\n  } else {\n    if (base1 == base2) {\n      pre_bytes = dataLen;\n    } else {\n      pre_bytes = sector_size - startAddr % sector_size;\n      middle_bytes = base2 - base1 - sector_size;\n      post_bytes = startAddr + dataLen - base2;\n    }\n  }\n  TOTA_LOG_DBG(3, \"pre:%u, middle:%u, post:%u\", pre_bytes, middle_bytes,\n               post_bytes);\n\n  if (pre_bytes != 0) {\n    memcpy(sector_buffer, (uint8_t *)base1, sector_size);\n    if (base1 == base2)\n      memset(sector_buffer + (startAddr - base1), 0xff, dataLen);\n    else\n      memset(sector_buffer + (startAddr - base1), 0xff,\n             sector_size - (startAddr - base1));\n    lock = int_lock_global();\n    pmu_flash_write_config();\n    hal_norflash_erase(HAL_NORFLASH_ID_0, base1, sector_size);\n    hal_norflash_write(HAL_NORFLASH_ID_0, base1, sector_buffer, sector_size);\n    pmu_flash_read_config();\n    int_unlock_global(lock);\n  }\n  if (middle_bytes != 0) {\n    if (base1 != startAddr)\n      middle_start_addr = base1 + sector_size;\n    else\n      middle_start_addr = base1;\n    lock = int_lock_global();\n    pmu_flash_write_config();\n    for (uint32_t i = 0; i < middle_bytes / sector_size; i++) {\n      hal_norflash_erase(HAL_NORFLASH_ID_0,\n                         middle_start_addr + (i * sector_size), sector_size);\n    }\n    pmu_flash_read_config();\n    int_unlock_global(lock);\n  }\n  if (post_bytes != 0) {\n    exist_bytes = sector_size - post_bytes;\n    memcpy(sector_buffer, (uint8_t *)(base2 + post_bytes), exist_bytes);\n\n    lock = int_lock_global();\n    pmu_flash_write_config();\n\n    hal_norflash_erase(HAL_NORFLASH_ID_0, base2, FLASH_SECTOR_SIZE_IN_BYTES);\n    hal_norflash_write(HAL_NORFLASH_ID_0, base2 + post_bytes, sector_buffer,\n                       exist_bytes);\n\n    pmu_flash_read_config();\n    int_unlock_global(lock);\n  }\n}\n\nTOTA_COMMAND_TO_ADD(OP_TOTA_WRITE_FLASH_CMD, _tota_flash_cmd_handle, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_ERASE_FLASH_CMD, _tota_flash_cmd_handle, false, 0,\n                    NULL);"
  },
  {
    "path": "services/tota/app_tota_flash_program.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __APP_TOTA_FLASH_PROGRAM_H__\n#define __APP_TOTA_FLASH_PROGRAM_H__\n\n\n//TODO:\n#define MAX_FLASH_HANDLE_SIZE 650\n#define TOTA_FLASH_TEST_ADDR                          (0x200000+FLASH_NC_BASE+4096)\n\n\nvoid app_tota_flash_init();\n\nvoid tota_write_flash_test(uint32_t startAddr, uint8_t * dataBuf, uint32_t dataLen);\n\n/*\n**  4 + 650 + 2 + 4 = 660\n*/\ntypedef struct{\n    uint32_t    address;\n    uint16_t    dataLen;\n    uint32_t    dataCrc;\n    uint8_t     dataBuf[MAX_FLASH_HANDLE_SIZE];\n}TOTA_WRITE_FLASH_STRUCT_T;\n\n\ntypedef struct{\n    uint32_t    address;\n    uint16_t    length;\n}TOTA_ERASE_FLASH_STRUCT_T;\n\n\n#endif\n"
  },
  {
    "path": "services/tota/app_tota_general.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_tota_general.h\"\n#include \"app_hfp.h\"\n#include \"app_key.h\"\n#include \"app_spp_tota.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"bluetooth.h\"\n#include \"cmsis.h\"\n#include \"crc32.h\"\n#include \"hal_cmu.h\"\n#include \"nvrecord_ble.h\"\n/*\n** general info struct\n**  ->  bt  name\n**  ->  ble name\n**  ->  bt  local/peer addr\n**  ->  ble local/peer addr\n**  ->  ibrt role\n**  ->  crystal freq\n**  ->  xtal fcap\n**  ->  bat volt/level/status\n**  ->  fw version\n**  ->  ear location\n**  ->  rssi info\n*/\n\n/*------------------------------------------------------------------------------------------------------------------------*/\n\n/*\n**  general info\n*/\nstatic general_info_t general_info;\n\n/*\n**  get general info\n*/\nstatic void __get_general_info();\n\n/*\n**  handle general cmd\n*/\nstatic void __tota_general_cmd_handle(APP_TOTA_CMD_CODE_E funcCode,\n                                      uint8_t *ptrParam, uint32_t paramLen);\n\n/*------------------------------------------------------------------------------------------------------------------------*/\nstatic void _tota_spp_connected(void);\nstatic void _tota_spp_disconnected(void);\nstatic void _tota_spp_tx_done(void);\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len);\n\nstatic tota_callback_func_t s_func = {_tota_spp_connected,\n                                      _tota_spp_disconnected, _tota_spp_tx_done,\n                                      _tota_spp_data_receive_handle};\n\nstatic APP_TOTA_MODULE_E s_module = APP_TOTA_GENERAL;\n\nvoid app_tota_general_init() {\n  tota_callback_module_register(s_module, s_func);\n}\n\nstatic void _tota_spp_connected(void) { ; }\n\nstatic void _tota_spp_disconnected(void) { ; }\n\nstatic void _tota_spp_tx_done(void) { ; }\n\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len) { ; }\n\n/*------------------------------------------------------------------------------------------------------------------------*/\n\nstatic void __tota_general_cmd_handle(APP_TOTA_CMD_CODE_E funcCode,\n                                      uint8_t *ptrParam, uint32_t paramLen) {\n  TOTA_LOG_DBG(2, \"Func code 0x%x, param len %d\", funcCode, paramLen);\n  TOTA_LOG_DBG(0, \"Param content:\");\n  DUMP8(\"%02x \", ptrParam, paramLen);\n  uint8_t resData[48] = {0};\n  uint32_t resLen = 1;\n  uint8_t volume_level;\n  switch (funcCode) {\n  case OP_TOTA_GENERAL_INFO_CMD:\n    __get_general_info();\n    app_tota_send_response_to_command(\n        funcCode, TOTA_NO_ERROR, (uint8_t *)&general_info,\n        sizeof(general_info_t), app_tota_get_datapath());\n    // for test\n    // app_tota_send_response_to_command(funcCode,TOTA_NO_ERROR,(uint8_t\n    // *)&resLen, sizeof(uint32_t),app_tota_get_datapath());\n    return;\n  case OP_TOTA_MERIDIAN_EFFECT_CMD:\n    resData[0] = app_meridian_eq(ptrParam[0]);\n    break;\n  case OP_TOTA_EQ_SELECT_CMD:\n    break;\n  case OP_TOTA_VOLUME_PLUS_CMD:\n    app_bt_volumeup();\n    volume_level = app_bt_stream_local_volume_get();\n    resData[0] = volume_level;\n    TRACE(1, \"volume = %d\", volume_level);\n    break;\n  case OP_TOTA_VOLUME_DEC_CMD:\n    app_bt_volumedown();\n    volume_level = app_bt_stream_local_volume_get();\n    resData[0] = volume_level;\n    resLen = 1;\n    TRACE(1, \"volume = %d\", volume_level);\n    break;\n  case OP_TOTA_VOLUME_SET_CMD:\n    // uint8_t scolevel = ptrParam[0];\n    // uint8_t a2dplevel = ptrParam[1];\n    app_bt_set_volume(APP_BT_STREAM_HFP_PCM, ptrParam[0]);\n    app_bt_set_volume(APP_BT_STREAM_A2DP_SBC, ptrParam[1]);\n    btapp_hfp_report_speak_gain();\n    btapp_a2dp_report_speak_gain();\n    break;\n  case OP_TOTA_VOLUME_GET_CMD:\n    resData[0] = app_bt_stream_hfpvolume_get();\n    resData[1] = app_bt_stream_a2dpvolume_get();\n    resLen = 2;\n    break;\n  case OP_TOTA_EQ_SET_CMD:\n    // int eq_index = ptrParam[0];\n    if (ptrParam[0] == 3)\n      resData[0] = app_meridian_eq(true);\n    else\n      resData[0] = app_audio_set_eq(ptrParam[0]);\n    resLen = 1;\n    break;\n  case OP_TOTA_EQ_GET_CMD:\n    resData[0] = app_audio_get_eq();\n    resLen = 1;\n    break;\n  case OP_TOTA_RAW_DATA_SET_CMD:\n    app_ibrt_debug_parse(ptrParam, paramLen);\n    break;\n  default:\n    TRACE(1, \"wrong cmd 0x%x\", funcCode);\n    resData[0] = -1;\n    return;\n  }\n  app_tota_send_response_to_command(funcCode, TOTA_NO_ERROR, resData, resLen,\n                                    app_tota_get_datapath());\n}\n\n/* get general info */\nstatic void __get_general_info() {\n  /* get bt-ble name */\n  uint8_t *factory_name_ptr = factory_section_get_bt_name();\n  if (factory_name_ptr != NULL) {\n    uint16_t valid_len =\n        strlen((char *)factory_name_ptr) > BT_BLE_LOCAL_NAME_LEN\n            ? BT_BLE_LOCAL_NAME_LEN\n            : strlen((char *)factory_name_ptr);\n    memcpy(general_info.btName, factory_name_ptr, valid_len);\n  }\n\n  factory_name_ptr = factory_section_get_ble_name();\n  if (factory_name_ptr != NULL) {\n    uint16_t valid_len =\n        strlen((char *)factory_name_ptr) > BT_BLE_LOCAL_NAME_LEN\n            ? BT_BLE_LOCAL_NAME_LEN\n            : strlen((char *)factory_name_ptr);\n    memcpy(general_info.bleName, factory_name_ptr, valid_len);\n  }\n\n  /* get bt-ble peer addr */\n  ibrt_config_t addrInfo;\n  app_ibrt_ui_test_config_load(&addrInfo);\n  general_info.ibrtRole = addrInfo.nv_role;\n  memcpy(general_info.btLocalAddr.address, addrInfo.local_addr.address, 6);\n  memcpy(general_info.btPeerAddr.address, addrInfo.peer_addr.address, 6);\n\n#ifdef BLE\n  memcpy(general_info.bleLocalAddr.address, bt_get_ble_local_address(), 6);\n  memcpy(general_info.blePeerAddr.address, nv_record_tws_get_peer_ble_addr(),\n         6);\n#endif\n\n  /* get crystal info */\n  general_info.crystal_freq = hal_cmu_get_crystal_freq();\n\n  /* factory_section_xtal_fcap_get */\n  factory_section_xtal_fcap_get(&general_info.xtal_fcap);\n\n  /* get battery info (volt level)*/\n  app_battery_get_info(&general_info.battery_volt, &general_info.battery_level,\n                       &general_info.battery_status);\n\n  /* get firmware version */\n#ifdef FIRMWARE_REV\n  system_get_info(&general_info.fw_version[0], &general_info.fw_version[1],\n                  &general_info.fw_version[2], &general_info.fw_version[3]);\n  TRACE(4, \"firmware version = %d.%d.%d.%d\", general_info.fw_version[0],\n        general_info.fw_version[1], general_info.fw_version[2],\n        general_info.fw_version[3]);\n#endif\n\n  /* get ear location info */\n  if (app_tws_is_right_side())\n    general_info.ear_location = EAR_SIDE_RIGHT;\n  else if (app_tws_is_left_side())\n    general_info.ear_location = EAR_SIDE_LEFT;\n  else\n    general_info.ear_location = EAR_SIDE_UNKNOWN;\n\n  app_ibrt_rssi_get_stutter(general_info.rssi, &general_info.rssi_len);\n}\n\n/* general command */\nTOTA_COMMAND_TO_ADD(OP_TOTA_GENERAL_INFO_CMD, __tota_general_cmd_handle, false,\n                    0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_MERIDIAN_EFFECT_CMD, __tota_general_cmd_handle,\n                    false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_EQ_SELECT_CMD, __tota_general_cmd_handle, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_VOLUME_PLUS_CMD, __tota_general_cmd_handle, false,\n                    0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_VOLUME_DEC_CMD, __tota_general_cmd_handle, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_VOLUME_SET_CMD, __tota_general_cmd_handle, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_VOLUME_GET_CMD, __tota_general_cmd_handle, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_EQ_SET_CMD, __tota_general_cmd_handle, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_EQ_GET_CMD, __tota_general_cmd_handle, false, 0,\n                    NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_RAW_DATA_SET_CMD, __tota_general_cmd_handle, false,\n                    0, NULL);\n"
  },
  {
    "path": "services/tota/app_tota_general.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __APP_TOTA_GENERAL_H__\n#define __APP_TOTA_GENERAL_H__\n\n#include \"app_battery.h\"\n#include \"factory_section.h\"\n#include \"app_ibrt_rssi.h\"\n#include \"app_ibrt_ui_test.h\"\n#include \"app_tws_ibrt.h\"\n#include \"app_bt_stream.h\"\n#include \"app_tws_if.h\"\n\n#define BT_BLE_LOCAL_NAME_LEN       32\n\ntypedef struct{\n    /* bt-ble info */\n    char btName[BT_BLE_LOCAL_NAME_LEN];         // 32 bytes\n    char bleName[BT_BLE_LOCAL_NAME_LEN];        // 32 bytes\n    bt_bdaddr_t btLocalAddr;                    // 6 bytes\n    bt_bdaddr_t btPeerAddr;                     // 6 bytes\n    bt_bdaddr_t bleLocalAddr;                   // 6 bytes\n    bt_bdaddr_t blePeerAddr;                    // 6 bytes\n\n    /* ibrt info */\n    ibrt_role_e ibrtRole;                       // 1 byte\n\n    /* crystal info */\n    uint32_t crystal_freq;                      // 4 bytes\n    uint32_t xtal_fcap;                         // 4 bytes\n    \n    /* battery info */\n    APP_BATTERY_MV_T        battery_volt;       // 2 bytes\n    uint8_t                 battery_level;      // 1 byte\n    APP_BATTERY_STATUS_T    battery_status;     // 4 bytes\n\n    /* firmware info */\n    uint8_t fw_version[4];                      // 4 bytes\n    \n    /* ear location info */\n    APP_TWS_SIDE_T          ear_location;       // 4 byte\n\n    /* rssi info */\n    uint8_t                 rssi[48];           // 48 bytes\n    uint32_t                rssi_len;           // 4 bytes\n} general_info_t;\n\n/*--functions from other file--*/\n#ifdef FIRMWARE_REV\nextern \"C\" void system_get_info(uint8_t *fw_rev_0, uint8_t *fw_rev_1, uint8_t *fw_rev_2, uint8_t *fw_rev_3);\n#endif\n\nextern void app_bt_volumeup();\nextern void app_bt_volumedown();\nextern int app_bt_stream_local_volume_get(void);\nextern uint8_t app_audio_get_eq();\nextern int app_audio_set_eq(uint8_t index);\nextern bool app_meridian_eq(bool onoff);\nextern bool app_is_meridian_on();\n\n#ifdef BLE\nextern unsigned char *bt_get_ble_local_address(void);\n#endif\n/*--functions from other file--*/\n\n\n/*--interface--*/\nvoid app_tota_general_init();\n\n\n#endif\n\n"
  },
  {
    "path": "services/tota/app_tota_mic.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"app_tota_mic.h\"\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_spp_tota.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"cmsis_os.h\"\n#include \"tota_stream_data_transfer.h\"\n\nstatic void _tota_spp_connected(void);\nstatic void _tota_spp_disconnected(void);\nstatic void _tota_spp_tx_done(void);\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len);\n/**/\nstatic void _mic_cmd_handle(APP_TOTA_CMD_CODE_E funcCode, uint8_t *ptrParam,\n                            uint32_t paramLen);\n\n/**/\nstatic tota_callback_func_t s_func = {_tota_spp_connected,\n                                      _tota_spp_disconnected, _tota_spp_tx_done,\n                                      _tota_spp_data_receive_handle};\n\nstatic APP_TOTA_MODULE_E s_module = APP_TOTA_MIC;\n\nvoid app_tota_mic_init() { tota_callback_module_register(s_module, s_func); }\n\nstatic void _tota_spp_connected(void) { ; }\n\nstatic void _tota_spp_disconnected(void) { ; }\n\nstatic void _tota_spp_tx_done(void) { ; }\n\nstatic void _tota_spp_data_receive_handle(uint8_t *buf, uint32_t len) { ; }\n\n/*-----------------------------------------------------------------------------*/\nstatic void _mic_cmd_handle(APP_TOTA_CMD_CODE_E funcCode, uint8_t *ptrParam,\n                            uint32_t paramLen) {\n  TOTA_LOG_DBG(2, \"Func code 0x%x, param len %d\", funcCode, paramLen);\n  TOTA_LOG_DBG(0, \"Param content:\");\n  DUMP8(\"%02x \", ptrParam, paramLen);\n  APP_TOTA_CMD_RET_STATUS_E rsp_status = TOTA_NO_ERROR;\n  uint8_t resData[48] = {0};\n  uint32_t resLen = 1;\n  switch (funcCode) {\n  case OP_TOTA_MIC_TEST_ON:\n    TRACE(0, \"#####mic test on:\");\n#ifdef __FACTORY_MODE_SUPPORT__\n    app_audio_sendrequest(APP_BT_STREAM_INVALID,\n                          (uint8_t)APP_BT_SETTING_CLOSEALL, 0);\n    app_audio_sendrequest(APP_FACTORYMODE_AUDIO_LOOP,\n                          (uint8_t)APP_BT_SETTING_OPEN, 0);\n#endif\n    break;\n  case OP_TOTA_MIC_TEST_OFF:\n    TRACE(0, \"#####mic test off:\");\n#ifdef __FACTORY_MODE_SUPPORT__\n    app_audio_sendrequest(APP_FACTORYMODE_AUDIO_LOOP,\n                          (uint8_t)APP_BT_SETTING_CLOSE, 0);\n#endif\n    break;\n  case OP_TOTA_MIC_SWITCH:\n    TRACE(0, \"####mic switch test, do role switch\");\n    if (!app_ibrt_ui_tws_switch())\n      rsp_status = TOTA_MIC_SWITCH_FAILED;\n    break;\n  default:;\n  }\n  app_tota_send_response_to_command(funcCode, rsp_status, resData, resLen,\n                                    app_tota_get_datapath());\n}\n\nTOTA_COMMAND_TO_ADD(OP_TOTA_MIC_TEST_ON, _mic_cmd_handle, false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_MIC_TEST_OFF, _mic_cmd_handle, false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_MIC_SWITCH, _mic_cmd_handle, false, 0, NULL);\n"
  },
  {
    "path": "services/tota/app_tota_mic.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __APP_TOTA_MIC_H__\n#define __APP_TOTA_MIC_H__\n\n\nextern \"C\" bool app_ibrt_ui_tws_switch(void);\n\nvoid app_tota_mic_init();\n\n\n#endif"
  },
  {
    "path": "services/tota/tota_buffer_manager.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"tota_buffer_manager.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"cmsis_os.h\"\n#include \"string.h\"\n\nosMutexDef(stream_buf_mutex);\nosMutexId stream_buf_mutex_id;\n\nstatic stream_buf_t stream_buf;\nstatic osThreadId father_thread_tid;\n\nvoid tota_stream_buffer_init(osThreadId tid) {\n  stream_buf.dataSize = 0;\n  stream_buf.availableSpace = TOTA_STREAM_BUF_SIZE;\n  stream_buf.readPos = 0;\n  stream_buf.writePos = 0;\n  stream_buf.flushBytes = 0;\n\n  stream_buf_mutex_id = osMutexCreate(osMutex(stream_buf_mutex));\n  father_thread_tid = tid;\n}\n\nbool tota_stream_buffer_write(uint8_t *buf, uint32_t bufLen) {\n  osMutexWait(stream_buf_mutex_id, osWaitForever);\n  if (stream_buf.availableSpace > bufLen) {\n    // write to stream buf\n    if (stream_buf.writePos + bufLen <= TOTA_STREAM_BUF_SIZE) {\n      memcpy(stream_buf.buf + stream_buf.writePos, buf, bufLen);\n\n      stream_buf.writePos += bufLen;\n      if (stream_buf.writePos == TOTA_STREAM_BUF_SIZE)\n        stream_buf.writePos = 0;\n    } else {\n      uint32_t part1 = TOTA_STREAM_BUF_SIZE - stream_buf.writePos;\n      memcpy(stream_buf.buf + stream_buf.writePos, buf, part1);\n      memcpy(stream_buf.buf, buf + part1, bufLen - part1);\n      stream_buf.writePos = bufLen - part1;\n    }\n\n    stream_buf.dataSize += bufLen;\n    stream_buf.availableSpace -= bufLen;\n\n    TOTA_LOG_DBG(1, \"buffer> after write: %5u bytes\", bufLen);\n    TOTA_LOG_DBG(4, \"buffer> size:%5u available:%5u writepos:%5u readpos:%5u:\",\n                 stream_buf.dataSize, stream_buf.availableSpace,\n                 stream_buf.writePos, stream_buf.readPos);\n\n    osMutexRelease(stream_buf_mutex_id);\n    /* set signal to father thread, has data */\n    osSignalSet(father_thread_tid, 0x0001);\n\n    return true;\n  } else {\n    osMutexRelease(stream_buf_mutex_id);\n    return false;\n  }\n}\n\nbool tota_stream_buffer_read(uint8_t *rbuf, uint32_t readSize,\n                             uint32_t *flushbytes) {\n  osMutexWait(stream_buf_mutex_id, osWaitForever);\n  if (readSize < stream_buf.dataSize) {\n    if (stream_buf.readPos + readSize <= TOTA_STREAM_BUF_SIZE) {\n      memcpy(rbuf, stream_buf.buf + stream_buf.readPos, readSize);\n      stream_buf.readPos += readSize;\n      if (stream_buf.readPos == TOTA_STREAM_BUF_SIZE)\n        stream_buf.readPos = 0;\n    } else {\n      uint32_t part1 = TOTA_STREAM_BUF_SIZE - stream_buf.readPos;\n      memcpy(rbuf, stream_buf.buf + stream_buf.readPos, part1);\n      memcpy(rbuf + part1, stream_buf.buf, readSize - part1);\n      stream_buf.readPos = readSize - part1;\n    }\n    stream_buf.dataSize -= readSize;\n    stream_buf.availableSpace += readSize;\n    /* debug */\n    TOTA_LOG_DBG(1, \"buffer> after read: %5u bytes\", readSize);\n    TOTA_LOG_DBG(4, \"buffer> size:%5u available:%5u writepos:%5u readpos:%5u:\",\n                 stream_buf.dataSize, stream_buf.availableSpace,\n                 stream_buf.writePos, stream_buf.readPos);\n    if (flushbytes != NULL) {\n      *flushbytes = stream_buf.flushBytes;\n      stream_buf.flushBytes = 0;\n    }\n    osMutexRelease(stream_buf_mutex_id);\n    return true;\n  } else {\n    osMutexRelease(stream_buf_mutex_id);\n    return false;\n  }\n}\n\nvoid tota_stream_buffer_flush(void) {\n  osMutexWait(stream_buf_mutex_id, osWaitForever);\n  stream_buf.flushBytes = stream_buf.dataSize;\n  stream_buf.availableSpace = TOTA_STREAM_BUF_SIZE;\n  stream_buf.dataSize = 0;\n  stream_buf.readPos = 0;\n  stream_buf.writePos = 0;\n  osMutexRelease(stream_buf_mutex_id);\n}\n\nvoid tota_stream_buffer_clean(void) {\n  osMutexWait(stream_buf_mutex_id, osWaitForever);\n  stream_buf.flushBytes = 0;\n  stream_buf.availableSpace = TOTA_STREAM_BUF_SIZE;\n  stream_buf.dataSize = 0;\n  stream_buf.readPos = 0;\n  stream_buf.writePos = 0;\n  osMutexRelease(stream_buf_mutex_id);\n}"
  },
  {
    "path": "services/tota/tota_buffer_manager.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __TOTA_BUFFER_MANAGER_H__\n#define __TOTA_BUFFER_MANAGER_H__\n\n#include \n#include \n#include \"cmsis_os.h\"\n\n#define TOTA_STREAM_BUF_SIZE         (24 * 1024 * 2 * 1 * 1)\n\ntypedef struct{\n    uint8_t     buf[TOTA_STREAM_BUF_SIZE];\n    uint32_t    dataSize;\n    uint32_t    availableSpace;\n    uint32_t    writePos;\n    uint32_t    readPos;\n    uint32_t    flushBytes;\n} stream_buf_t;\n\nvoid tota_stream_buffer_init(osThreadId tid);\nbool tota_stream_buffer_write(uint8_t * buf, uint32_t bufLen);\nbool tota_stream_buffer_read(uint8_t * rbuf, uint32_t readSize, uint32_t * flushbytes = NULL);\nvoid tota_stream_buffer_flush(void);\nvoid tota_stream_buffer_clean(void);\n\n\n\n#endif\n\n"
  },
  {
    "path": "services/tota/tota_stream_data_transfer.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"tota_stream_data_transfer.h\"\n#include \"app_spp_tota.h\"\n#include \"app_spp_tota_general_service.h\"\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_cmd_handler.h\"\n#include \"app_tota_conn.h\"\n#include \"app_tota_data_handler.h\"\n#include \"app_utils.h\"\n#include \"apps.h\"\n#include \"cmsis_os.h\"\n#include \"crc32.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"stdbool.h\"\n#include \"string.h\"\n#include \"tota_buffer_manager.h\"\n\n/*\n**  stream control strcut\n**  stream packet format:\n**  # header + body #\n**  > header: 2   bytes\n**  > body  : 664 bytes\n**\n**  note: stream will never be encrypted!\n*/\ntypedef struct {\n  uint32_t flush_bytes;\n  bool is_streaming;\n  uint8_t module;\n\n  osMutexId mutex;\n  osSemaphoreId sem;\n} stream_control_t;\n\nstream_control_t stream_control;\n\nosMutexDef(tota_tx_buf_mutex);\nosMutexId tota_tx_buf_mutex_id;\n\n#define SPP_BUFFER_NUM 5\n\nstatic uint8_t spp_tx_buffer[MAX_SPP_PACKET_SIZE * SPP_BUFFER_NUM];\nstatic uint8_t tx_buf_index = 0;\n\n/* static function */\nstatic bool _tota_send_stream_packet(uint8_t *pdata, uint32_t dataLen);\nstatic void _tota_stream_data_init();\nstatic void _update_tx_buf();\nstatic uint8_t *_get_tx_buf_ptr();\n\n// Semaphore\nosSemaphoreDef(app_tota_send_data_sem);\n\n// define stream data transfer thread\n#define TOTA_STREAM_DATA_STACK_SIZE 2048\nstatic void tota_stream_data_transfer_thread(void const *argument);\nosThreadId tota_stream_thread_tid;\nosThreadDef(tota_stream_data_transfer_thread, osPriorityHigh, 1,\n            TOTA_STREAM_DATA_STACK_SIZE, \"TOTA_STREAM_DATA_THREAD\");\n\nstatic void tota_stream_data_transfer_thread(void const *argument) {\n  // TODO: max speed\n  uint8_t buf[MAX_SPP_PACKET_SIZE];\n  while (true) {\n    app_sysfreq_req(APP_SYSFREQ_USER_OTA, APP_SYSFREQ_32K);\n    osSignalWait(0x0001, osWaitForever);\n    app_sysfreq_req(APP_SYSFREQ_USER_OTA, APP_SYSFREQ_208M);\n    while (tota_stream_buffer_read(buf + STREAM_HEADER_SIZE,\n                                   MAX_SPP_PACKET_SIZE - STREAM_HEADER_SIZE)) {\n      _tota_send_stream_packet(buf, MAX_SPP_PACKET_SIZE);\n    }\n  }\n}\n\nvoid app_tota_stream_data_transfer_init() {\n  stream_control.sem =\n      osSemaphoreCreate(osSemaphore(app_tota_send_data_sem), SPP_BUFFER_NUM);\n  tota_stream_thread_tid =\n      osThreadCreate(osThread(tota_stream_data_transfer_thread), NULL);\n  _tota_stream_data_init();\n}\n\n// stream start\nvoid app_tota_stream_data_start(uint16_t set_module) {\n  stream_control.module = set_module;\n  stream_control.is_streaming = true;\n}\n\n// stream end\nvoid app_tota_stream_data_end() { stream_control.is_streaming = false; }\n\n// stream send data while stream is start\nbool app_tota_send_stream_data(uint8_t *pdata, uint32_t dataLen) {\n  if (!stream_control.is_streaming) {\n    TOTA_LOG_DBG(0, \"error: data stream not start.\");\n    return false;\n  }\n  if (tota_stream_buffer_write(pdata, dataLen)) {\n    TOTA_LOG_DBG(0, \"send to stream buffer ok.\");\n    return true;\n  } else {\n    TOTA_LOG_DBG(0, \"send to stream buffer error.\");\n    return false;\n  }\n}\n\n// stream flush\nvoid app_tota_stream_data_flush() { tota_stream_buffer_flush(); }\n\n// stream clean\nvoid app_tota_stream_data_clean() { tota_stream_buffer_clean(); }\n\nbool app_tota_send_data_via_spp(uint8_t *pdata, uint32_t dataLen) {\n  osSemaphoreWait(stream_control.sem, osWaitForever);\n  osMutexRelease(tota_tx_buf_mutex_id);\n  uint8_t *pbuf = pdata;\n  uint32_t bufLen = dataLen;\n#if TOTA_ENCODE\n  if (((uint16_t *)pdata)[0] == OP_TOTA_STRING) {\n    TOTA_LOG_DBG(0, \"yeah! This is a string. Do not encrypt\");\n  } else if (is_tota_connected()) {\n    pbuf = tota_encrypt_packet(pdata, dataLen, &bufLen);\n  }\n#endif\n  memcpy(_get_tx_buf_ptr(), pbuf, bufLen);\n\n  if (app_spp_tota_send_data(_get_tx_buf_ptr(), bufLen)) {\n    _update_tx_buf();\n    osMutexRelease(tota_tx_buf_mutex_id);\n    return true;\n  } else {\n    osMutexRelease(tota_tx_buf_mutex_id);\n    osSemaphoreRelease(stream_control.sem);\n    return false;\n  }\n}\n\nvoid app_tota_tx_done_callback() { osSemaphoreRelease(stream_control.sem); }\n\nbool is_stream_data_running() { return stream_control.is_streaming; }\n\n// send stream packet with header. packet size:666\nstatic bool _tota_send_stream_packet(uint8_t *pdata, uint32_t dataLen) {\n  osSemaphoreWait(stream_control.sem, osWaitForever);\n  osMutexRelease(tota_tx_buf_mutex_id);\n  ((uint16_t *)pdata)[0] = (OP_TOTA_STREAM_DATA - stream_control.module);\n  memcpy(_get_tx_buf_ptr(), pdata, dataLen);\n  if (app_spp_tota_send_data(_get_tx_buf_ptr(), dataLen)) {\n    _update_tx_buf();\n    osMutexRelease(tota_tx_buf_mutex_id);\n    return true;\n  } else {\n    osMutexRelease(tota_tx_buf_mutex_id);\n    osSemaphoreRelease(stream_control.sem);\n    return false;\n  }\n}\n\nstatic void _tota_stream_data_init() {\n  tota_stream_buffer_init(tota_stream_thread_tid);\n  stream_control.module = 0;\n  stream_control.is_streaming = false;\n}\n\nstatic void _update_tx_buf() { tx_buf_index = (tx_buf_index + 1) % 5; }\n\nstatic uint8_t *_get_tx_buf_ptr() {\n  return (spp_tx_buffer + tx_buf_index * MAX_SPP_PACKET_SIZE);\n}\n"
  },
  {
    "path": "services/tota/tota_stream_data_transfer.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __TOTA_STREAM_DATA_TRANSFER_H__\n#define __TOTA_STREAM_DATA_TRANSFER_H__\n\n#include \n\n\n#define MAX_SPP_PACKET_SIZE     666\n#define STREAM_HEADER_SIZE      2\n\n\nvoid app_tota_stream_data_transfer_init();\n\n/* interface for streaming */\nvoid app_tota_stream_data_start(uint16_t set_module = 0);\nvoid app_tota_stream_data_end();\nbool app_tota_send_stream_data(uint8_t * pdata, uint32_t dataLen);\nvoid app_tota_stream_data_flush();\nvoid app_tota_stream_data_clean();\n\n/* interface for send data */\nbool app_tota_send_data_via_spp(uint8_t* ptrData, uint32_t length);\n\n/* interface for app_tota */\nbool is_stream_data_running();\nvoid app_tota_tx_done_callback();\n\n#endif\n"
  },
  {
    "path": "services/tota/tota_test.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"app_tota.h\"\n#include \"app_tota_cmd_code.h\"\n#include \"app_tota_data_handler.h\"\n#include \"app_tota_flash_program.h\"\n#include \"app_utils.h\"\n#include \"cmsis_os.h\"\n#include \"crc32.h\"\n#include \"stdarg.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n#include \"tota_buffer_manager.h\"\n#include \"tota_stream_data_transfer.h\"\n#include \n\nuint8_t flash_wbuf[] = \"hello\";\n\nstatic void tota_test_cmd(APP_TOTA_CMD_CODE_E funcCode, uint8_t *ptrParam,\n                          uint32_t paramLen) {\n  tota_printf(\"this is cmd test\\r\\n\");\n  tota_printf(\"hello1\\r\\n\");\n  tota_printf(\"hello2\\r\\n\");\n  tota_printf(\"hello3\\r\\n\");\n  tota_printf(\"hello4\\r\\n\");\n  tota_printf(\"will write data to flash\");\n  test_aes_encode_decode();\n  tota_write_flash_test(TOTA_FLASH_TEST_ADDR, flash_wbuf,\n                        strlen((char *)flash_wbuf));\n}\n\nstatic void tota_echo_test_cmd(APP_TOTA_CMD_CODE_E funcCode, uint8_t *ptrParam,\n                               uint32_t paramLen) {\n  tota_printf(\"echo: \\r\\n\");\n  app_tota_send_data_via_spp(ptrParam, paramLen);\n}\n\nTOTA_COMMAND_TO_ADD(OP_TOTA_ECHO_TEST_CMD, tota_echo_test_cmd, false, 0, NULL);\nTOTA_COMMAND_TO_ADD(OP_TOTA_TEST_CMD, tota_test_cmd, false, 0, NULL);\n"
  },
  {
    "path": "start_dev.sh",
    "content": "#!/usr/bin/env sh\ndocker compose run --rm builder || docker-compose run --rm builder || echo \"Failed: Please start the docker service\"\n"
  },
  {
    "path": "thirdparty/Makefile",
    "content": "obj-y := userapi/\n\nifeq ($(TILE_DATAPATH_ENABLED), 1)\nobj-y += tile\nendif\n\nifeq ($(THIRDPARTY_LIB),)\nTHIRDPARTY_LIB := demo\n$(info demo)\nelse ifeq ($(THIRDPARTY_LIB),voicespot)\nKBUILD_CPPFLAGS += -D_VOICESPOT_\nendif\n\nobj-y += $(foreach lib,$(THIRDPARTY_LIB),$(lib)_lib/)\n\n"
  },
  {
    "path": "thirdparty/audio_codec_lib/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\n"
  },
  {
    "path": "thirdparty/audio_codec_lib/ldac/Makefile",
    "content": "#obj-y := src/ \n\nAPP_LDAC_LIB_NAME := ldac_lib\nobj-y += $(APP_LDAC_LIB_NAME).a\nsubdir-ccflags-y += \\\n\t\t-Ithirdparty/audio_codec_lib/ldac/inc  \\\n\t\t-Iservices/multimedia/speech/process/common/include \\\n\t\t-Iservices/bt_app\n\nsubdir-ccflags-y += -Wall -Wno-long-long\n\n\n\t\t\n\t"
  },
  {
    "path": "thirdparty/audio_codec_lib/ldac/inc/ldacBT.h",
    "content": "/*******************************************************************************\n *\n * Copyright (C) 2013 - 2017 Sony Corporation\n *\n ******************************************************************************/\n\n#ifndef _LDACBT_H_\n#define _LDACBT_H_\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n#ifndef LDACBT_API\n#define LDACBT_API\n#endif /* LDACBT_API  */\n\n/* This file contains the definitions, declarations and macros for an implimentation of \n#ifdef _ENCODE_ONLY\n * LDAC encode processing.\n#endif\n#ifdef _DECODE_ONLY\n * LDAC decode processing.\n#endif\n#ifndef _ENCODE_ONLY\n#ifndef _DECODE_ONLY\n * LDAC encode and decode processing.\n#endif\n#endif\n *\n#ifndef _DECODE_ONLY\n * The basic flow of the encode processing is as follows:\n * - The program creates an handle of an LDAC api using ldacBT_get_handle().\n * - The program initialize the handle for encode using ldacBT_init_handle_encode().\n * - The program calls ldacBT_encode() to encode data.\n * - If the program demands to control the Encode Quality Mode Index, then one of the following\n *   should be called:\n *     - ldacBT_set_eqmid()\n *     - ldacBT_alter_eqmid()\n * - The program finishes the encoding with passing NULL to input pcm buffer for ldacBT_encode(),\n *   which enables the encoder to encode remaining data in its input buffers.\n * - The handle may be closed using ldacBT_close_handle() then used again, or released with\n *   ldacBT_free_handle().\n * - The rest of the set functions should be called only if it is needed by the client.\n#endif // _DECODE_ONLY\n#ifndef _ENCODE_ONLY\n * The basic flow of the decode processing is as follows:\n * - The program creates an handle of an LDAC api using ldacBT_get_handle().\n * - The program initialize the handle for decode using ldacBT_init_handle_decode().\n * - The program calls ldacBT_decode() to decode data.\n * - The handle may be closed using ldacBT_close_handle() then used again, or released with\n *   ldacBT_free_handle().\n * - The rest of the set functions should be called only if it is needed by the client.\n#endif // _ENCODE_ONLY\n *\n *\n * Note for an implimentation\n * - Error processing\n *     When continuous processing for next frame is performed after error detection, following\n *     processing must be carried out using C function provided in the library.\n#ifdef _ENCODE_ONLY\n *      - Release of internal variables in encode processing using ldacBT_close_handle().\n *      - Allocation and initialization of internal variables in encode processing using\n *        ldacBT_init_handle_encode().\n *     Note that the encoded output for a few frames will not be present just after error recovery.\n#endif // _ENCODE_ONLY\n#ifdef _DECODE_ONLY\n *      - Release of internal variables in decode processing using ldacBT_close_handle().\n *      - Allocation and initialization of internal variables in decode processing using\n *        ldacBT_init_handle_decode().\n *     Note that the first decoded out PCM signal will not be present just after error recovery.\n#endif // _DECODE_ONLY\n#ifndef _ENCODE_ONLY\n#ifndef _DECODE_ONLY\n *      - Release of internal variables in encode/decode processing using ldacBT_close_handle().\n *      - Allocation and initialization of internal variables in encode/decode processing using\n *        ldacBT_init_handle_encode() for encode, ldacBT_init_handle_decode() for decode.\n *     Note that the encoded output for a few frames will not be present just after error recovery.\n *     Note that the first decoded out PCM signal will not be present just after error recovery.\n#endif\n#endif\n *\n#ifndef _DECODE_ONLY\n * - Resuming of the encode processing from an interruption\n *     In case of resuming of the encode processing from interruption (such as changing\n *     configuration, seeking and playback), initialization of internal variables in encode\n *     processing must be carried out as error processing described above.\n *     Note that the encoded output for a few frames will not be present just after initialization\n *     as above.\n#endif \n#ifndef _ENCODE_ONLY\n * Resuming of the decode processing from an interruption\n *     In case of resuming of the decode processing from interruption (such as changing\n *     configuration, seeking and playback), initialization of internal variables in decode\n *     processing must be carried out as error processing described above.\n *     Note that the first decoded out PCM signal will not be present just after initialization\n *     as above.\n#endif \n *\n *\n * Glossary\n *  channel_config_index (cci)\n *    The channel setting information for ldaclib.\n *    See ldacBT_cm_to_cci() to get value from channel_mode.\n *\n *  channel_mode (cm)\n *    The channel setting information for LDAC specification of Bluetooth A2DP.\n *    See ldacBT_cci_to_cm() to get value from channel_config_index.\n *\n *  ldac_transport_frame\n *    See LDAC specification of bluetooth A2DP.\n *\n *  Maximum Transmission Unit (MTU)\n *    The minimum MTU that a L2CAP implementation for LDAC shall support is 679 bytes, because LDAC\n *    is optimized with 2-DH5 packet as its target.\n *\n *  frame\n *    An audio signal sequence representing a certain number of PCM audio signals.\n *    Encoding and decoding are processed frame by frame in LDAC. Number of samples in a frame is\n *    determined by sampling frequency as described below.\n *\n *  Sampling frequency and frame sample.\n *    Supported sampling frequencies are 44.1, 48, 88.2 and 96 kHz.\n *    The relationship between sampling frequency and frame sample in LDAC are shown below.\n *       --------------------------------------------------------\n *      | sampling frequency       [kHz] | 44.1 | 48 | 88.2 | 96 |\n *      | frame sample [samples/channel] |     128   |     256   |\n *       --------------------------------------------------------\n *    Though the frame size varies in LDAC core as described in the table, the number of samples in\n *    input PCM signal for encoding is fixed to 128 sample/channel, and it is not affected by\n *    sampling frequency.\n */\n#define LDACBT_ENC_LSU 128\n#define LDACBT_MAX_LSU 512\n\n/* channel_config_index.\n * Supported value are below.\n */\n#define LDAC_CCI_MONO         0 /* MONO */\n#define LDAC_CCI_DUAL_CHANNEL 1 /* DUAL CHANNEL */\n#define LDAC_CCI_STEREO       2 /* STEREO */\n\n/* PCM format.\n * Supported PCM format are shown below.\n *   - LDACBT_SMPL_FMT_S16 : signed 16bits little endian.\n *   - LDACBT_SMPL_FMT_S24 : signed 24bits little endian.\n *   - LDACBT_SMPL_FMT_S32 : signed 32bits little endian.\n *   - LDACBT_SMPL_FMT_F32 : single-precision floating point.\n * The data sequency must be interleaved format by 1 sample.\n * Ex) 2 channel audio, the data sequences are aligned as below.\n *       seq : |L[0]|R[0]|L[1]|R[1]|...\n */\ntypedef enum {\n    LDACBT_SMPL_FMT_S16 = 0x2,\n    LDACBT_SMPL_FMT_S24 = 0x3,\n    LDACBT_SMPL_FMT_S32 = 0x4,\n    LDACBT_SMPL_FMT_F32 = 0x5,\n} LDACBT_SMPL_FMT_T;\n\n#ifndef _DECODE_ONLY\n/* Encode Quality Mode Index. (EQMID)\n *  The configuration of encoding in LDAC will be coordinated by \"Encode Quality Mode Index\"\n *  parameter. Configurable values are shown below.\n *   - LDACBT_EQMID_HQ : Encode setting for High Quality.\n *   - LDACBT_EQMID_SQ : Encode setting for Standard Quality.\n *   - LDACBT_EQMID_MQ : Encode setting for Mobile use Quality.\n */\nenum {\n    LDACBT_EQMID_HQ = 0,\n    LDACBT_EQMID_SQ,\n    LDACBT_EQMID_MQ,\n    LDACBT_EQMID_NUM,     /* terminater */\n};\n\n/* Bit rates\n *  Bit rates in each EQMID are depend on sampling frequency.\n *  In this API specification, these relations are shown below.\n *     ___________________________________________\n *    |                 | Sampling Frequency[kHz] |\n *    |      EQMID      | 44.1, 88.2 |   48, 96   |\n *    +-----------------+------------+------------+\n *    | LDACBT_EQMID_HQ |   909kbps  |   990kbps  |\n *    | LDACBT_EQMID_SQ |   606kbps  |   660kbps  |\n *    | LDACBT_EQMID_MQ |   303kbps  |   330kbps  |\n *     -------------------------------------------\n */\n#endif \n\n/* Maximum size of the \"ldac_transport_frame\" sequence at transportation. */\n#define LDACBT_MAX_NBYTES 1024 /* byte */\n\n/* Maximum number of channel for LDAC */\n#define LDAC_PRCNCH 2\n\n/* LDAC handle type */\ntypedef struct _st_ldacbt_handle * HANDLE_LDAC_BT;\n\n/* Allocation of LDAC handle.\n *  Format\n *      HANDLE_LDAC_BT ldacBT_get_handle( void );\n *  Arguments\n *      None.\n *  Return value\n *      HANDLE_LDAC_BT for success, NULL for failure.\n */\nLDACBT_API HANDLE_LDAC_BT ldacBT_get_handle( void );\n\n/* Release of LDAC handle.\n *  Format\n *      void ldacBT_free_handle( HANDLE_LDAC_BT hLdacBt );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *  Return value\n *      None.\n */\nLDACBT_API void ldacBT_free_handle( HANDLE_LDAC_BT hLdacBt );\n\n/* Closing of initialized LDAC handle.\n * Closed handle can be initialized and used again.\n *  Format\n *      void ldacBT_close_handle( HANDLE_LDAC_BT hLdacBt );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *  Return value\n *      None.\n */\nLDACBT_API void ldacBT_close_handle( HANDLE_LDAC_BT hLdacBt );\n\n/* Acquisition of the library version.\n *  Format\n *      int  ldacBT_get_version( void );\n *  Arguments\n *      None.\n *  Return value\n *      int : version number.\n *              23-16 bit : major version\n *              15- 8 bit : minor version\n *               7- 0 bit : branch version\n *              Ex) 0x00010203 -> version 1.02.03\n */\nLDACBT_API int  ldacBT_get_version( void );\n\n/* Acquisition of the sampling frequency in current configuration.\n#ifdef _ENCODE_ONLY\n * The LDAC handle must be initialized by API function ldacBT_init_handle_encode() prior to\n * calling this function.\n#endif\n#ifdef _DECODE_ONLY\n * The LDAC handle must be initialized by API function ldacBT_init_handle_decode() prior to\n * calling this function.\n#endif\n#ifndef _ENCODE_ONLY\n#ifndef _DECODE_ONLY\n * The LDAC handle must be initialized by API function ldacBT_init_handle_encode() or\n * ldacBT_init_handle_decode() prior to calling this function.\n#endif\n#endif\n *  Format\n *      int  ldacBT_get_sampling_freq( HANDLE_LDAC_BT hLdacBt );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *  Return value\n *      int : sampling frequency in current configuration. -1 for failure.\n */\nLDACBT_API int  ldacBT_get_sampling_freq( HANDLE_LDAC_BT hLdacBt );\n\n/* Acquisition of the Bit-rate.\n#ifdef _ENCODE_ONLY\n * The LDAC handle must be initialized by API function ldacBT_init_handle_encode() prior to\n * calling this function.\n#endif\n#ifdef _DECODE_ONLY\n * The LDAC handle must be initialized by API function ldacBT_init_handle_decode() prior to\n * calling this function.\n#endif\n#ifndef _ENCODE_ONLY\n#ifndef _DECODE_ONLY\n * The LDAC handle must be initialized by API function ldacBT_init_handle_encode() or\n * ldacBT_init_handle_decode() prior to calling this function.\n#endif\n#endif\n *  Format\n *      int  ldacBT_get_bitrate( HANDLE_LDAC_BT hLdacBt );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *  Return value\n *      int : Bit-rate for previously processed ldac_transport_frame for success. -1 for failure.\n */\nLDACBT_API int  ldacBT_get_bitrate( HANDLE_LDAC_BT hLdacBt );\n\n#ifndef _DECODE_ONLY\n/* Initialization of a LDAC handle for encode processing.\n * The LDAC handle must be allocated by API function ldacBT_get_handle() prior to calling this API.\n * \"mtu\" value should be configured to MTU size of AVDTP Transport Channel, which is determined by\n * SRC and SNK devices in Bluetooth transmission.\n * \"eqmid\" is configured to desired value of \"Encode Quality Mode Index\".\n * \"cm\" is configured to channel_mode in LDAC, which is determined by SRC and SNK devices in\n * Bluetooth transmission.\n * \"fmt\" is configured to input pcm audio format.\n * When the configuration of \"mtu\", \"cm\", or \"sf\" changed, the re-initialization is required. \n *\n *  Format\n *      int  ldacBT_init_handle_encode( HANDLE_LDAC_BT hLdacBt, int mtu, int eqmid, int cm,\n *                                      LDACBT_SMPL_FMT_T fmt, int sf );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *      mtu        int               MTU value. Unit:Byte.\n *      eqmid      int               Encode Quality Mode Index.\n *      cm         int               Information of the channel_mode.\n *      fmt        LDACBT_SMPL_FMT_T Audio format type of input pcm.\n *      sf         int               Sampling frequency of input pcm.\n *  Return value\n *      int : 0 for success, -1 for failure.\n */\nLDACBT_API int  ldacBT_init_handle_encode( HANDLE_LDAC_BT hLdacBt, int mtu, int eqmid, int cm,\n                                           LDACBT_SMPL_FMT_T fmt, int sf );\n\n/* Configuration of Encode Quality Mode Index.\n * The LDAC handle must be initialized by API function ldacBT_init_handle_encode() prior to\n * calling this function.\n * The API function can be called at any time, after the completion of initializing.\n *  Format\n *      int  ldacBT_set_eqmid( HANDLE_LDAC_BT hLdacBt, int eqmid );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *      eqmid      int               Encode Quality Mode Index.\n *  Return value\n *      int : 0 for success, -1 for failure.\n */\nLDACBT_API int  ldacBT_set_eqmid( HANDLE_LDAC_BT hLdacBt, int eqmid );\n\n/* Acquisition of prescribed Encode Quality Mode Index in current configuration.\n * The LDAC handle must be initialized by API function ldacBT_init_handle_encode() prior to\n * calling this function.\n *  Format\n *      int  ldacBT_get_eqmid( HANDLE_LDAC_BT hLdacBt );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *  Return value\n *      int : Encode Quality Mode Index for success, -1 for failure.\n */\nLDACBT_API int  ldacBT_get_eqmid( HANDLE_LDAC_BT hLdacBt );\n\n/* Changing of configuration for Encode Quality Mode Index by one step.\n * The LDAC handle must be initialized by API function ldacBT_init_handle_encode() prior to\n * calling this function.\n * Configuralbe values for \"priority\" are shown below.\n *   - LDACBT_EQMID_INC_QUALITY    : Adjustment for EQMID by one step for the direction of\n *                                   getting close to LDACBT_EQMID_HQ.\n *   - LDACBT_EQMID_INC_CONNECTION : Adjustment for EQMID by one step for the direction of\n *                                   getting away from LDACBT_EQMID_HQ.\n * For restoring prescribed value for \"Encode Quality Mode Index\", it must be configured again by\n * API function ldacBT_init_handle_encode() or ldacBT_set_qmode().\n * A transition to the state other than \"Encode Quality Mode Index\" mention before may be occurred\n * caused by an adjustment using this API function.\n * The API function can be called at any time, after the completion of initializing.\n *  Format\n *      int  ldacBT_alter_eqmid_priority( HANDLE_LDAC_BT hLdacBt, int priority );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *      priority   int               The direction of changing EQMID.\n *  Return value\n *      int : 0 for success, -1 for failure.\n */\n#define LDACBT_EQMID_INC_QUALITY     1\n#define LDACBT_EQMID_INC_CONNECTION -1\nLDACBT_API int  ldacBT_alter_eqmid_priority( HANDLE_LDAC_BT hLdacBt, int priority );\n\n\n/* LDAC encode processing.\n * The LDAC handle must be initialized by API function ldacBT_init_handle_encode() prior to calling\n * this API function.\n * \n *  Number of samples in input PCM signal for encoding is fixed to 128 samples per channel, and it\n *  is not affected by sampling frequency.\n *\n *  The region in input signal buffer without any PCM signal must be filled with zero, if the\n *  number of samples is less than 128 samples.\n *\n *  The format of PCM signal is determined by \"fmt\" configured by API function\n *  ldacBT_init_handle_encode().\n *\n *  Total size of referenced PCM signal (in byte) will be set in \"pcm_used\" on return. The value of\n *  \"Number of input samples * Number of channels * sizeof(PCM word length)\" will be set in normal.\n *\n *  Finalize processing of encode will be carried out with setting \"p_pcm\" as zero.\n *\n * \n *  An output data in \"ldac_transport_frame\" sequence will be set to \"p_stream\" after several frame\n *  processing. So the output is not necessarily present at each calling of this API function.\n *\n *  The presence of the output can be verified by checking whether the value of \"stream_wrote\",\n *  representing the number of written bytes for \"p_stream\", is positive or not.\n *\n *  In addition, encoded data size for output will be determined by the value of \"mtu\" configured\n *  by API function ldacBT_init_handle_encode().\n *\n *  The number of \"ldac_transport_frame\" corresponding to \"ldac_transport_frame\" sequence as output\n *  will be set to \"frame_num\".\n *\n *  Format\n *      int  ldacBT_encode( HANDLE_LDAC_BT hLdacBt, void *p_pcm, int *pcm_used,\n *                          unsigned char *p_stream, int *stream_sz, int *frame_num );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *      p_pcm      void *            Input PCM signal sequence\n *      pcm_used   int *             Data size of referenced PCM singnal. Unit:Byte.\n *      p_stream   unsigned char *   Output \"ldac_transport_frame\" sequence.\n *      stream_sz  int *             Size of output data. Unit:Byte.\n *      frame_num  int *             Number of output \"ldac_transport_frame\"\n *  Return value\n *      int : 0 for success, -1 for failure.\n */\nLDACBT_API int  ldacBT_encode( HANDLE_LDAC_BT hLdacBt, void *p_pcm, int *pcm_used,\n                               unsigned char *p_stream, int *stream_sz, int *frame_num );\n#endif /* _DECODE_ONLY */\n#ifndef _ENCODE_ONLY\n/* for decode */\n/* Initialization of a LDAC handle for decode processing.\n * The LDAC handle must be allocated by API function ldac_get_handle() prior to calling this\n * function.\n * \"cm\" is configured to channel_mode in LDAC, which is determined by SRC and SNK devices in\n * Bluetooth transmission.\n * \"sf\" is configured to sampling frequency, which is determined by SRC and SNK devices in\n * Bluetooth transmission.\n * Reserved arguments must be set to \"0\".\n *  Format\n *      int  ldacBT_init_handle_decode( HANDLE_LDAC_BT hLdacBt, int cm, int sf, int nshift,\n *                                      int var0, int var1 );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *      cm         int               Information of the channel_mode.\n *      sf         int               Sampling frequency of input LDAC bit stream.\n *      nshift     int               Reserved, must be \"0\".\n *      var0       int               Reserved, must be \"0\".\n *      var1       int               Reserved, must be \"0\".\n *  Return value\n *      int : 0 for success, -1 for failure.\n */\nLDACBT_API int ldacBT_init_handle_decode( HANDLE_LDAC_BT hLdacBt, int cm, int sf,\n                                          int var0, int var1, int var2 );\n\n/* LDAC decode processing.\n * The LDAC handle must be initialized by API function ldacBT_init_handle_decode() prior to\n * calling this function.\n * < Regarding on input \"ldac_transport_frame\" >\n *   The valid data size of \"ldac_transport_frame\" must be set in \"stream_bytes\".\n *   Referenced data size of \"ldac_transport_frame\" for decode processing will be set in\n *   \"used_bytes\" on return.\n *   As a reading once of \"ldac_transport_frame\" is performed by internal processing with\n *   looking ahead of two bytes, \"LDAC_MAX_NBYTES+2\" bytes must be allocated for\n *   \"ldac_transport_frame\" (p_bs) in API function caller side.\n * < Regarding on output PCM signal >\n *   \"fmt\" is configured to output pcm audio format.\n *   The size of output PCM signal will be set to \"wrote_bytes\". The value of\n *   \"frame sample\" * \"Number of channels\" * \"bit length of pcm sample\"/8 will be set in normal.\n *   The first decoded out PCM signal just after initialization will not be present.\n *\n *  Format\n *      int  ldac_decode ( HANDLE_LDAC_BT hLdacBt, unsigned char * p_bs, unsigned char * p_pcm\n *                         LDACBT_SMPL_FMT_T fmt, int bs_bytes,\n *                         int *used_bytes, int *wrote_bytes );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *      p_bs       unsigned char *   Pointer to \"ldac_transport_frame\".\n *      p_pcm      unsigned char *   Decoded out PCM signal sequence.\n *      fmt        LDACBT_SMPL_FMT_T Audio format type of output pcm.\n *      bs_bytes    int *            Data size of input \"ldac_transport_frame\". Unit: Byte.\n *      used_bytes  int *            Data size of referenced \"ldac_transport_frame\". Unit: Byte.\n *      wrote_bytes int *            Size of decoded out PCM signal. Unit: Byte.\n *  Return value\n *      int : 0 for success, -1 for failure.\n */\nLDACBT_API int ldacBT_decode( HANDLE_LDAC_BT hLdacBt, unsigned char *p_bs, unsigned char *p_pcm,\n                              LDACBT_SMPL_FMT_T fmt, int bs_bytes,\n                              int *used_bytes, int *wrote_bytes );\n\n#endif /* _ENCODE_ONLY */\n\n/* Acquisition of previously established error code.\n * The LDAC handle must be allocated by API function ldacBT_get_handle() prior to calling this function.\n * The details of error code are described below at the end of this header file.\n * Tips for error code handling.\n * The macro function LDACBT_FATAL() is useful to determine whether the error code is Fatal or not.\n *      Ex.) if( LDACBT_FATAL(err) ) // Fatal Error occurred.\n *\n * The macro function LDACBT_ERROR() is useful to determine whether the error occurred or not.\n *      Ex.) if( LDACBT_ERROR(err) ) // Error occurred.\n *\n * The macro function LDACBT_HANDLE_ERR() is useful to get the handle level error code.\n *      Ex.) err_handle_lv = LDACBT_HANDLE_ERR(err);\n *\n * The macro function LDACBT_BLOCK_ERR() is useful to get the block level error code.\n *      Ex.) err_block_lv = LDACBT_BLOCK_ERR(err);\n *\n *  Format\n *      int  ldacBT_get_error_code( HANDLE_LDAC_BT hLdacBt );\n *  Arguments\n *      hLdacBt    HANDLE_LDAC_BT    LDAC handle.\n *  Return value\n *      int : Error code.\n */\nLDACBT_API int  ldacBT_get_error_code( HANDLE_LDAC_BT hLdacBt );\n\n/*******************************************************************************\n    Error Code\n*******************************************************************************/\n#define LDACBT_ERR_NONE                     0\n\n/*    Non Fatal Error ***********************************************************/\n#define LDACBT_ERR_NON_FATAL                1\n\n/*    Non Fatal Error (Block Level) *********************************************/\n#define LDACBT_ERR_BIT_ALLOCATION           5\n\n/*    Non Fatal Error (Handle Level) ********************************************/\n#define LDACBT_ERR_NOT_IMPLEMENTED          128\n#define LDACBT_ERR_NON_FATAL_ENCODE         132\n#define LDACBT_ERR_RESTRICTED_BY_NUM_FRAMES 255\n\n/*    Fatal Error ***************************************************************/\n#define LDACBT_ERR_FATAL                    256\n\n/*    Fatal Error (Block Level) *************************************************/\n#define LDACBT_ERR_SYNTAX_BAND              260\n#define LDACBT_ERR_SYNTAX_GRAD_A            261\n#define LDACBT_ERR_SYNTAX_GRAD_B            262\n#define LDACBT_ERR_SYNTAX_GRAD_C            263\n#define LDACBT_ERR_SYNTAX_GRAD_D            264\n#define LDACBT_ERR_SYNTAX_GRAD_E            265\n#define LDACBT_ERR_SYNTAX_IDSF              266\n#define LDACBT_ERR_SYNTAX_SPEC              267\n\n#define LDACBT_ERR_BIT_PACKING              280\n\n#define LDACBT_ERR_ALLOC_MEMORY             300\n\n/*    Fatal Error (Handle Level) ************************************************/\n#define LDACBT_ERR_FATAL_HANDLE             512\n\n#define LDACBT_ERR_ILL_SYNCWORD             516\n#define LDACBT_ERR_ILL_SMPL_FORMAT          517\n#define LDACBT_ERR_ILL_PARAM                518\n\n#define LDACBT_ERR_ASSERT_SAMPLING_FREQ     530\n#define LDACBT_ERR_ASSERT_SUP_SAMPLING_FREQ 531\n#define LDACBT_ERR_CHECK_SAMPLING_FREQ      532\n#define LDACBT_ERR_ASSERT_CHANNEL_CONFIG    533\n#define LDACBT_ERR_CHECK_CHANNEL_CONFIG     534\n#define LDACBT_ERR_ASSERT_FRAME_LENGTH      535\n#define LDACBT_ERR_ASSERT_SUP_FRAME_LENGTH  536\n#define LDACBT_ERR_ASSERT_FRAME_STATUS      537\n#define LDACBT_ERR_ASSERT_NSHIFT            538\n#define LDACBT_ERR_ASSERT_CHANNEL_MODE      539\n\n#define LDACBT_ERR_ENC_INIT_ALLOC           550\n#define LDACBT_ERR_ENC_ILL_GRADMODE         551\n#define LDACBT_ERR_ENC_ILL_GRADPAR_A        552\n#define LDACBT_ERR_ENC_ILL_GRADPAR_B        553\n#define LDACBT_ERR_ENC_ILL_GRADPAR_C        554\n#define LDACBT_ERR_ENC_ILL_GRADPAR_D        555\n#define LDACBT_ERR_ENC_ILL_NBANDS           556\n#define LDACBT_ERR_PACK_BLOCK_FAILED        557\n\n#define LDACBT_ERR_DEC_INIT_ALLOC           570\n#define LDACBT_ERR_INPUT_BUFFER_SIZE        571\n#define LDACBT_ERR_UNPACK_BLOCK_FAILED      572\n#define LDACBT_ERR_UNPACK_BLOCK_ALIGN       573\n#define LDACBT_ERR_UNPACK_FRAME_ALIGN       574\n#define LDACBT_ERR_FRAME_LENGTH_OVER        575\n#define LDACBT_ERR_FRAME_ALIGN_OVER         576\n\n\n/* LDAC API for Encode */\n#define LDACBT_ERR_ALTER_EQMID_LIMITED      21\n#define LDACBT_ERR_HANDLE_NOT_INIT          1000\n#define LDACBT_ERR_ILL_EQMID                1024\n#define LDACBT_ERR_ILL_SAMPLING_FREQ        1025\n#define LDACBT_ERR_ILL_NUM_CHANNEL          1026\n#define LDACBT_ERR_ILL_MTU_SIZE             1027\n/* LDAC API for Decode */\n#define LDACBT_ERR_DEC_CONFIG_UPDATED       40\n\n\n/* Macro Functions for Error Code ********************************************/\n#define LDACBT_API_ERR(err)    ((err >> 20) & 0x0FFF)\n#define LDACBT_HANDLE_ERR(err) ((err >> 10) & 0x03FF)\n#define LDACBT_BLOCK_ERR(err)  ( err & 0x03FF)\n#define LDACBT_ERROR(err)      ((LDACBT_ERR_NON_FATAL) <= LDACBT_API_ERR(err) ? 1 : 0)\n#define LDACBT_FATAL(err)      ((LDACBT_ERR_FATAL) <= LDACBT_API_ERR(err) ? 1 : 0)\n\n\n\n/* Codec Specific Information Elements for LDAC\n * (based on \"LDAC Specification of Bluetooth A2DP Rev.2.0.1\")\n *                  |  7  |  6  |  5  |  4  |  3  |  2  |  1  |  0  |\n *  service_caps[4] |   SONY ID                                     | Octet0\n *  service_caps[5] |   SONY ID                                     | Octet1\n *  service_caps[6] |   SONY ID                                     | Octet2\n *  service_caps[7] |   SONY ID                                     | Octet3\n *  service_caps[8] |   SONY Specific Codec ID                      | Octet4\n *  service_caps[9] |   SONY Specific Codec ID                      | Octet5\n *  service_caps[A] |   RFA     |   Sampling Frequency              | Octet6\n *  service_caps[B] |   RFA                       | Channel Mode ID | Octet7\n */\n#define LDACBT_MEDIA_CODEC_SC_SZ         (10+2)\n\n/* [Octet 0-3] Vendor ID for SONY */\n#define LDACBT_VENDOR_ID0 0x2D\n#define LDACBT_VENDOR_ID1 0x01\n#define LDACBT_VENDOR_ID2 0x0\n#define LDACBT_VENDOR_ID3 0x0\n\n/* [Octet 4-5] Vendor Specific A2DP Codec ID for LDAC */\n#define LDACBT_CODEC_ID0 0xAA\n#define LDACBT_CODEC_ID1 0x00\n\n/* [Octet 6]\n * [b7,b6] : RFA\n *       Reserved for future additions.\n *       Bits with this designation shall be set to zero.\n *       Receivers shall ignore these bits.\n * -----------------------------------------------------\n * [b5-b0] : Sampling frequency and its associated bit field in LDAC are shown below.\n *    |  5  |  4  |  3  |  2  |  1  |  0  |\n *    |  o  |     |     |     |     |     |  44100\n *    |     |  o  |     |     |     |     |  48000\n *    |     |     |  o  |     |     |     |  88200\n *    |     |     |     |  o  |     |     |  96000\n *    |     |     |     |     |  o  |     | 176400\n *    |     |     |     |     |     |  o  | 192000\n *\n */\n/* Support for 44.1kHz sampling frequency */\n#define LDACBT_SAMPLING_FREQ_044100        0x20\n/* Support for 48kHz sampling frequency */\n#define LDACBT_SAMPLING_FREQ_048000        0x10\n/* Support for 88.2kHz sampling frequency */\n#define LDACBT_SAMPLING_FREQ_088200        0x08\n/* Support for 96kHz sampling frequency */\n#define LDACBT_SAMPLING_FREQ_096000        0x04\n/* Support for 176.4kHz sampling frequency */\n#define LDACBT_SAMPLING_FREQ_176400        0x02\n/* Support for 192kHz sampling frequency */\n#define LDACBT_SAMPLING_FREQ_192000        0x01\n\n/* [Octet 7]\n * [b7-b3] : RFA\n *       Reserved for future additions.\n *       Bits with this designation shall be set to zero.\n *       Receivers shall ignore these bits.\n * ------------------------------------------------------\n * [b2-b0] : Channel mode and its associated bit field in LDAC are shown below.\n *    |  2  |  1  |  0  |\n *    |  o  |     |     | MONO\n *    |     |  o  |     | DUAL CHANNEL\n *    |     |     |  o  | STEREO\n */\n/* Support for MONO */\n#define LDACBT_CHANNEL_MODE_MONO           0x04\n/* Support for DUAL CHANNEL */\n#define LDACBT_CHANNEL_MODE_DUAL_CHANNEL   0x02\n/* Support for STEREO */\n#define LDACBT_CHANNEL_MODE_STEREO         0x01\n\n#ifdef __cplusplus\n}\n#endif\n#endif /* _LDACBT_H_ */\n"
  },
  {
    "path": "thirdparty/audio_codec_lib/liblhdc-dec/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\nauth_type := -DLICE_KEY_TYPE_KEYPRO\n# -DHAVE_TEST_KEY\n\nifeq ($(A2DP_LHDC_LARC), 1)\nauth_type += -DHAVE_LARC\nendif\n\nifneq ($(GEN_LIB), 1)\nauth_type += -DHAVE_TEST_KEY\nendif\n\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.S))\nobj_s += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.s))\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)dec_src/*.c))\nobj_c += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nifeq ($(A2DP_DECODER_VER),2)\nifeq ($(A2DP_LHDC_V3),1)\nLHDC_LIB_NAME := BEST2300P_LibLHDC_V2_V3_3_1_0_SAVI_KEYPRO_UUID\nelse\nLHDC_LIB_NAME := BEST2300P_LibLHDC_V2_V3_3_1_0_SAVI_KEYPRO_UUID\nendif\nelse\nLHDC_LIB_NAME := liblhdc-dec\nendif\n\n$(LHDC_LIB_NAME)-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nobj-y += $(LHDC_LIB_NAME).a\n\n#CFLAGS_dec.o += -lc -O3 -Wchar-subscripts -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant\n#CFLAGS_cirbuf.o += -lc -O3 -Wchar-subscripts -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant\n#CFLAGS_lhdcUtil.o += -lc -O3 -Wchar-subscripts -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant\n#CFLAGS_encdec.o += -lc -O3 -Wchar-subscripts -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant\n#CFLAGS_lic_check.o += -lc -O3 -Wchar-subscripts -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant\n#CFLAGS_licdecrypt.o += -lc -O3 -Wchar-subscripts -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant\nccflags-y +=  -lc -O3 -Wchar-subscripts -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant $(DEF)\n\nsubdir-ccflags-y += \\\n    -Iservices/tws/inc \\\n    -Iutils/heap \\\n    -Iutils/cqueue \\\n    -Iapps/audioplayers \\\n    -Iservices/bt_app \\\n    -Iplatform \\\n    -Ithirdparty/audio_codec_lib/liblhdc-dec/dec_src \\\n    -Ithirdparty/audio_codec_lib/liblhdc-dec \\\n    -Iservices/ble_stack/ke/api \\\n    -Iservices/ble_stack/ble_ip \\\n    $(BT_PROFILES_INCLUDES) \\\n    -Iservices/nvrecord \\\n    -Iservices/bt_if/inc \\\n    -Iconfig \\\n    -Iservices/ble_stack/hl/api\n"
  },
  {
    "path": "thirdparty/audio_codec_lib/liblhdc-dec/inc/lhdcUtil.h",
    "content": "/*\n * lhdcUtil.h\n *\n *  Created on: 2001/1/3\n *      Author: eric.lee\n */\n\n#ifndef LHDC_UTIL_H\n#define LHDC_UTIL_H\n\n#include \"bluetooth.h\"\n\n\n// Define for LHDC stream type.\ntypedef enum {\n    LHDC_STRM_TYPE_COMBINE,\n    LHDC_STRM_TYPE_SPLIT\n}LHDC_STRM_TYPE;\n\ntypedef enum {\n  VERSION_2 = 200,\n  VERSION_3 = 300\n}lhdc_ver_t;\n\ntypedef enum {\n  LHDCV2_BLOCK_SIZE = 512,\n  LHDCV3_BLOCK_SIZE = 256,\n}lhdc_block_size_t;\n\ntypedef struct bes_bt_local_info_t{\n    uint8_t bt_addr[BTIF_BD_ADDR_SIZE];\n    const char *bt_name;\n    uint8_t bt_len;\n    uint8_t ble_addr[BTIF_BD_ADDR_SIZE];\n    const char *ble_name;\n    uint8_t ble_len;\n}bes_bt_local_info;\n\n\n#define A2DP_LHDC_HDR_LATENCY_LOW   0x00\n#define A2DP_LHDC_HDR_LATENCY_MID   0x01\n#define A2DP_LHDC_HDR_LATENCY_HIGH  0x02\n#define A2DP_LHDC_HDR_LATENCY_MASK  (A2DP_LHDC_HDR_LATENCY_MID | A2DP_LHDC_HDR_LATENCY_HIGH)\n\n#define A2DP_LHDC_HDR_FRAME_NO_MASK 0xfc\n\ntypedef int (*LHDC_GET_BT_INFO)(bes_bt_local_info * bt_info);\n\nvoid lhdcInit(uint32_t bitPerSample, uint32_t sampleRate, uint32_t scaleTo16Bits, lhdc_ver_t version);\nbool lhdcReadyForInput(void);\nuint32_t lhdcPutData(uint8_t * pInpBuf, uint32_t NumBytes);\nuint32_t lhdcDecodeProcess(uint8_t * pOutBuf);\nvoid lhdcDestroy();\nbool lhdcSetLicenseKeyTable(uint8_t * licTable, LHDC_GET_BT_INFO pFunc);\nchar * getVersionCode();\n#endif /* End of LHDC_UTIL_H */\n"
  },
  {
    "path": "thirdparty/demo_lib/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\n\n\n\n\n"
  },
  {
    "path": "thirdparty/demo_lib/demo_lib.c",
    "content": "#include \"demo_lib.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \n"
  },
  {
    "path": "thirdparty/demo_lib/demo_lib.h",
    "content": "#ifndef __DEMO_LIB_H\n#define __DEMO_LIB_H\n\n\n\n#ifdef __cplusplus\nextern \"C\"{\n#endif\n\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif \n"
  },
  {
    "path": "thirdparty/noise_tracker_lib/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nsubdir-ccflags-y +=  \\\n\t-Iservices/audio_dump/include \\\n"
  },
  {
    "path": "thirdparty/noise_tracker_lib/noise_tracker.c",
    "content": "#include \"noise_tracker.h\"\n#include \"audio_dump.h\"\n#include \"hal_trace.h\"\n#include \n\n//#define NT_DUMP_AUDIO_DATA\n\n#define SQUARE(x) ((x) * (x))\n#define LIN2DB(x) (10.f * log10f(x))\n\n#define NORMAL_SCALE (1.f / 32768 / 32768)\n\nstatic NoiseTrackerCallback _callback;\nstatic int _threshold;\nstatic int _ch_num;\n\nstatic float vec_power(int16_t *buf, uint32_t len, int stride) {\n  float sum = 0.f;\n  for (uint32_t i = 0; i < len; i += stride)\n    sum += SQUARE(buf[i]);\n\n  return sum;\n}\n\nvoid noise_tracker_init(NoiseTrackerCallback cb, int ch_num, int threshold) {\n  _callback = cb;\n  _threshold = threshold;\n  _ch_num = ch_num;\n\n#ifdef NT_DUMP_AUDIO_DATA\n  audio_dump_init(240 * ANC_NOISE_TRACKER_CHANNEL_NUM, sizeof(int16_t), 1);\n#endif\n}\n\nvoid noise_tracker_process(int16_t *buf, uint32_t len) {\n  float scale = 1.f / len * NORMAL_SCALE;\n  float maxPowerdB = -90;\n\n#ifdef NT_DUMP_AUDIO_DATA\n  audio_dump_clear_up();\n  audio_dump_add_channel_data(0, buf, len);\n  audio_dump_run();\n#endif\n\n  for (int i = 0; i < _ch_num; i++) {\n    float power = vec_power(&buf[i], len, _ch_num) * scale;\n    float powerdB = LIN2DB(power);\n    maxPowerdB = MAX(maxPowerdB, powerdB);\n\n    // TRACE(3,\"[%s] powerdB ch[%d] = %d\", __FUNCTION__, i, (int)powerdB);\n  }\n\n  if (maxPowerdB > _threshold) {\n    _callback(maxPowerdB);\n  }\n}\n"
  },
  {
    "path": "thirdparty/noise_tracker_lib/noise_tracker.h",
    "content": "#ifndef NOISE_TRACKER_H\n#define NOISE_TRACKER_H\n\n#include \n\ntypedef void (*NoiseTrackerCallback)(float);\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid noise_tracker_init(NoiseTrackerCallback cb, int ch_num, int threshold);\n\nvoid noise_tracker_process(int16_t *buf, uint32_t len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "thirdparty/userapi/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\nobj-y += $(foreach lib,$(THIRDPARTY_LIB),$(lib)_app/)\n\nsubdir-ccflags-y +=  \\\n\t-Iutils/list\n\n\n"
  },
  {
    "path": "thirdparty/userapi/app_thirdparty.cpp",
    "content": "#include \"app_thirdparty.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"list.h\"\n#include \n\nAPP_THIRDPARTY_HANDLE_TAB_T app_thirdparty_handle_table;\n\nvoid app_thirdparty_callback_init(THIRDPARTY_CALLBACK_TYPE type,\n                                  APP_THIRDPARTY_CUSTOM_CB_T cb) {\n  TRACE(2, \"%s type %d\", __func__, type);\n  switch (type) {\n  case THIRDPARTY_DATA_COME_CALLBACK:\n    app_thirdparty_handle_table._app_thirdparty_data_come_callback = cb;\n    break;\n  case THIRDPARTY_WAKE_UP_CALLBACK:\n    app_thirdparty_handle_table._app_thirdparty_wake_up_callback = cb;\n    break;\n  case THIRDPARTY_START_SPEECH_CALLBACK:\n    app_thirdparty_handle_table._app_thirdparty_start_callback = cb;\n    break;\n  case THIRDPARTY_STOP_SPEECH_CALLBACK:\n    app_thirdparty_handle_table._app_thirdparty_stop_callback = cb;\n    break;\n  default:\n    break;\n  }\n}\n\nuint32_t app_thirdparty_callback_handble(THIRDPARTY_CALLBACK_TYPE type,\n                                         void *param1, uint32_t param2) {\n  uint32_t ret = 0xFFFFFFFF;\n  // TRACE(2, \"%s type %d\", __func__, type);\n\n  switch (type) {\n  case THIRDPARTY_DATA_COME_CALLBACK:\n    if (app_thirdparty_handle_table._app_thirdparty_data_come_callback) {\n      ret = app_thirdparty_handle_table._app_thirdparty_data_come_callback(\n          param1, param2);\n    }\n    break;\n  case THIRDPARTY_WAKE_UP_CALLBACK:\n    if (app_thirdparty_handle_table._app_thirdparty_wake_up_callback) {\n      ret = app_thirdparty_handle_table._app_thirdparty_wake_up_callback(\n          param1, param2);\n    }\n    break;\n  case THIRDPARTY_START_SPEECH_CALLBACK:\n    if (app_thirdparty_handle_table._app_thirdparty_start_callback) {\n      ret = app_thirdparty_handle_table._app_thirdparty_start_callback(param1,\n                                                                       param2);\n    }\n    break;\n  case THIRDPARTY_STOP_SPEECH_CALLBACK:\n    if (app_thirdparty_handle_table._app_thirdparty_stop_callback) {\n      ret = app_thirdparty_handle_table._app_thirdparty_stop_callback(param1,\n                                                                      param2);\n    }\n    break;\n  default:\n    break;\n  }\n\n  return ret;\n}\n\nint app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_ID funcId,\n                                             THIRDPARTY_EVENT_TYPE event_type) {\n  TRACE(3, \"%s funcId=%d event_type=0x%x\", __func__, funcId, event_type);\n  const APP_THIRDPARTY_HANDLE *dest_handle;\n\n  if (app_thirdparty_handle_table.thirdparty_func_id == funcId) {\n    for (uint32_t index = 0;\n         index < app_thirdparty_handle_table.thirdparty_handler_cnt; index++) {\n      dest_handle = &app_thirdparty_handle_table.thirdparty_handler_tab[index];\n      if (dest_handle->thirdparty_sign.event == event_type) {\n        TRACE(1, \"find index=%d\", index);\n        if (dest_handle->function) {\n          return dest_handle->function(dest_handle->status, dest_handle->param);\n        }\n      }\n    }\n  }\n\n  return 0;\n}\n\nvoid app_thirdparty_init(void) {\n#ifdef __ALEXA_WWE\n  app_thirdparty_handle_table.thirdparty_handler_tab =\n      THIRDPARTY_GET_HANDLER_TAB(ALEXA_WWE_LIB_NAME);\n  app_thirdparty_handle_table.thirdparty_handler_cnt =\n      THIRDPARTY_GET_HANDLER_TAB_SIZE(ALEXA_WWE_LIB_NAME);\n#elif defined(__KWS_ALEXA__)\n  app_thirdparty_handle_table.thirdparty_handler_tab =\n      THIRDPARTY_GET_HANDLER_TAB(KWS_ALEXA_LIB_NAME);\n  app_thirdparty_handle_table.thirdparty_handler_cnt =\n      THIRDPARTY_GET_HANDLER_TAB_SIZE(KWS_ALEXA_LIB_NAME);\n#elif defined(__CYBERON)\n  app_thirdparty_handle_table.thirdparty_handler_tab =\n      THIRDPARTY_GET_HANDLER_TAB(CYBERON_LIB_NAME);\n  app_thirdparty_handle_table.thirdparty_handler_cnt =\n      THIRDPARTY_GET_HANDLER_TAB_SIZE(CYBERON_LIB_NAME);\n#elif defined(__KNOWLES)\n  app_thirdparty_handle_table.thirdparty_handler_tab =\n      THIRDPARTY_GET_HANDLER_TAB(KNOWLES_LIB_NAME);\n  app_thirdparty_handle_table.thirdparty_handler_cnt =\n      THIRDPARTY_GET_HANDLER_TAB_SIZE(KNOWLES_LIB_NAME);\n#elif defined(ANC_NOISE_TRACKER)\n  app_thirdparty_handle_table.thirdparty_handler_tab =\n      THIRDPARTY_GET_HANDLER_TAB(NOISE_TRACKER_LIB_NAME);\n  app_thirdparty_handle_table.thirdparty_handler_cnt =\n      THIRDPARTY_GET_HANDLER_TAB_SIZE(NOISE_TRACKER_LIB_NAME);\n#elif defined(_VOICESPOT_)\n  app_thirdparty_handle_table.thirdparty_handler_tab =\n      THIRDPARTY_GET_HANDLER_TAB(VOICESPOT_LIB_NAME);\n  app_thirdparty_handle_table.thirdparty_handler_cnt =\n      THIRDPARTY_GET_HANDLER_TAB_SIZE(VOICESPOT_LIB_NAME);\n#elif defined(__BIXBY)\n  app_thirdparty_handle_table.thirdparty_handler_tab =\n      THIRDPARTY_GET_HANDLER_TAB(BIXBY_NAME);\n  app_thirdparty_handle_table.thirdparty_handler_cnt =\n      THIRDPARTY_GET_HANDLER_TAB_SIZE(BIXBY_NAME);\n#else\n  app_thirdparty_handle_table.thirdparty_handler_tab =\n      THIRDPARTY_GET_HANDLER_TAB(DEMO_LIB_NAME);\n  app_thirdparty_handle_table.thirdparty_handler_cnt =\n      THIRDPARTY_GET_HANDLER_TAB_SIZE(DEMO_LIB_NAME);\n#endif\n\n  app_thirdparty_handle_table.thirdparty_func_id =\n      app_thirdparty_handle_table.thirdparty_handler_tab[0]\n          .thirdparty_sign.func_id;\n  app_thirdparty_handle_table.thirdparty_lib_id =\n      app_thirdparty_handle_table.thirdparty_handler_tab[0]\n          .thirdparty_sign.lib_id;\n\n  TRACE(3, \"%s cnt=%d id=%d\", __func__,\n        app_thirdparty_handle_table.thirdparty_handler_cnt,\n        app_thirdparty_handle_table.thirdparty_lib_id);\n}\n"
  },
  {
    "path": "thirdparty/userapi/app_thirdparty.h",
    "content": "#ifndef __APP_THIRDPARTY_H__\n#define __APP_THIRDPARTY_H__\n\n#define INVALID_THIRDPARTY_ENTRY_INDEX      0xFFFF\n#define APP_THIRDPARTY_DISABLE              0x5A5A\n\n#define ALEXA_WWE_LIB_NAME  alexa_wwe\n#define KWS_ALEXA_LIB_NAME  kws_demo\n#define CYBERON_LIB_NAME    cyberon\n#define KNOWLES_LIB_NAME    knowles\n#define NOISE_TRACKER_LIB_NAME nt_demo\n#define VOICESPOT_LIB_NAME  kws_engine\n#define DEMO_LIB_NAME       demo\n#define BIXBY_NAME          bixby\n\n\n#ifndef ARRAY_SIZE\n#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))\n#endif\n\ntypedef enum\n{\n    THIRDPARTY_FUNC_DEMO,         // Each library has a unique id\n    THIRDPARTY_FUNC_NO1,          // KWS\n    THIRDPARTY_FUNC_NO2,          // knowles\n    THIRDPARTY_FUNC_NO3,          // Noise tracker for anc\n    THIRDPARTY_FUNC_KWS,          // key words\n    THIRDPARTY_FUNC_NUMBER,\n} THIRDPARTY_FUNC_ID;\n\ntypedef enum\n{\n    THIRDPARTY_ID_DEMO,             // Each library has a unique id\n    THIRDPARTY_ID_BES_ALEXA,        // key words\n    THIRDPARTY_ID_ALEXA_WWE,        // AMA wakeup word engine\n    THIRDPARTY_ID_BIXBY,            // Bixby wakeup word engine\n    THIRDPARTY_ID_NUMBER,\n} THIRDPARTY_LIB_ID;\n\ntypedef enum\n{\n    THIRDPARTY_INIT = 0x00,\n    THIRDPARTY_START = 0x01,\n    THIRDPARTY_STOP = 0x02,\n    THIRDPARTY_START2MIC = 0x03,\n    THIRDPARTY_STOP2MIC = 0x04,\n    THIRDPARTY_DEINIT = 0x05,\n    THIRDPARTY_BT_CONNECTABLE = 0x06,\n    THIRDPARTY_BT_DISCOVERABLE = 0x07,\n    THIRDPARTY_BT_CONNECTED = 0x08,\n    THIRDPARTY_A2DP_STREAMING = 0x09,\n    THIRDPARTY_HFP_SETUP = 0x0A,\n    THIRDPARTY_MIC_OPEN = 0x0B,\n    THIRDPARTY_MIC_CLOSE = 0x0C,\n    THIRDPARTY_BURSTING = 0x0D,\n    THIRDPARTY_AI_PROVIDE_SPEECH = 0x0E,\n    THIRDPARTY_AI_STOP_SPEECH = 0x0F,\n    THIRDPARTY_AI_CONNECT = 0x10,\n    THIRDPARTY_AI_DISCONNECT = 0x11,\n    THIRDPARTY_CALL_START = 0x12,\n    THIRDPARTY_CALL_STOP = 0x13,\n    THIRDPARTY_OTHER_EVENT = 0x14,\n    THIRDPARTY_EVENT_NUMBER,\n}THIRDPARTY_EVENT_TYPE;\n\ntypedef enum\n{\n    THIRDPARTY_DATA_COME_CALLBACK = 0x0,\n    THIRDPARTY_WAKE_UP_CALLBACK,\n    THIRDPARTY_START_SPEECH_CALLBACK,\n    THIRDPARTY_STOP_SPEECH_CALLBACK,\n}THIRDPARTY_CALLBACK_TYPE;\n\n//the ai wake up type\ntypedef enum {\n    THIRDPARTY_TYPE__NONE,\n    THIRDPARTY_TYPE__PRESS_AND_HOLD,\n    THIRDPARTY_TYPE__TAP,\n    THIRDPARTY_TYPE__KEYWORD_WAKEUP\n} THIRDPARTY_WAKE_UP_TYPE_E;\n\ntypedef int (*APP_THIRDPARTY_HANDLE_CB_T)(unsigned char, void *param);\ntypedef uint32_t (*APP_THIRDPARTY_CUSTOM_CB_T)(void*, uint32_t);\n\ntypedef struct {\n    int      score;\n    uint32_t start_index;\n    uint32_t end_index;\n    THIRDPARTY_WAKE_UP_TYPE_E wake_up_type;\n}APP_THIRDPARTY_WAKE_WORD_T;\n\ntypedef struct {\n    THIRDPARTY_FUNC_ID func_id;\n    THIRDPARTY_LIB_ID lib_id;\n    THIRDPARTY_EVENT_TYPE event;\n}APP_THIRDPARTY_SIGN;\n\ntypedef struct {\n    APP_THIRDPARTY_SIGN thirdparty_sign;\n    APP_THIRDPARTY_HANDLE_CB_T function;\n    unsigned char status;\n    void *param;\n} APP_THIRDPARTY_HANDLE;\n\ntypedef struct\n{\n    // Pointer to the thirdparty handler table\n    const APP_THIRDPARTY_HANDLE *thirdparty_handler_tab;\n    // Number of thirdparty handler\n    uint16_t thirdparty_handler_cnt;\n    THIRDPARTY_FUNC_ID thirdparty_func_id;\n    THIRDPARTY_LIB_ID thirdparty_lib_id;\n\n    APP_THIRDPARTY_CUSTOM_CB_T _app_thirdparty_data_come_callback;\n    APP_THIRDPARTY_CUSTOM_CB_T _app_thirdparty_wake_up_callback;\n    APP_THIRDPARTY_CUSTOM_CB_T _app_thirdparty_start_callback;\n    APP_THIRDPARTY_CUSTOM_CB_T _app_thirdparty_stop_callback;\n}APP_THIRDPARTY_HANDLE_TAB_T;\n\n\n#define _THIRDPARTY_HANDLER_TAB(id_name)   const APP_THIRDPARTY_HANDLE id_name##_handler_tab[] =\n#define _THIRDPARTY_GET_HANDLER_TAB(id_name)   id_name##_handler_tab\n#define _THIRDPARTY_HANDLER_TAB_SIZE(id_name)   const uint32_t id_name##_handler_tab_size = ARRAY_SIZE(id_name##_handler_tab);\n#define _THIRDPARTY_GET_HANDLER_TAB_SIZE(id_name)  id_name##_handler_tab_size\n#define _EXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(id_name)     extern const APP_THIRDPARTY_HANDLE id_name##_handler_tab[]; \\\n                                                            extern const uint32_t id_name##_handler_tab_size;\n\n#define THIRDPARTY_HANDLER_TAB(id_name) _THIRDPARTY_HANDLER_TAB(id_name)\n#define THIRDPARTY_GET_HANDLER_TAB(id_name) _THIRDPARTY_GET_HANDLER_TAB(id_name)\n#define THIRDPARTY_HANDLER_TAB_SIZE(id_name) _THIRDPARTY_HANDLER_TAB_SIZE(id_name)\n#define THIRDPARTY_GET_HANDLER_TAB_SIZE(id_name) _THIRDPARTY_GET_HANDLER_TAB_SIZE(id_name)\n#define EXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(id_name) _EXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(id_name)\n\nEXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(ALEXA_WWE_LIB_NAME)\nEXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(KWS_ALEXA_LIB_NAME)\nEXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(CYBERON_LIB_NAME)\nEXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(KNOWLES_LIB_NAME)\nEXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(NOISE_TRACKER_LIB_NAME)\nEXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(VOICESPOT_LIB_NAME)\nEXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(DEMO_LIB_NAME)\nEXTERN_THIRDPARTY_HANDLER_TAB_AND_SIZE(BIXBY_NAME)\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid app_thirdparty_callback_init(THIRDPARTY_CALLBACK_TYPE type, APP_THIRDPARTY_CUSTOM_CB_T cb);\nuint32_t app_thirdparty_callback_handble(THIRDPARTY_CALLBACK_TYPE type, void* param1, uint32_t param2);\nint app_thirdparty_specific_lib_event_handle(THIRDPARTY_FUNC_ID funcId,THIRDPARTY_EVENT_TYPE event_type);\nvoid app_thirdparty_init(void);\n\n\n#ifdef __cplusplus\n    }\n#endif\n\n#endif\n"
  },
  {
    "path": "thirdparty/userapi/demo_app/LibDemo.cpp",
    "content": "#include \"LibDemo.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"cqueue.h\"\n#include \"demo_lib.h\"\n#include \"hal_trace.h\"\n#include \n\nint demo_example_init(bool on, void *param) {\n  TRACE(0, \"demo_example_init\");\n  return 0;\n}\n\nint demo_example_start(bool on, void *param) {\n  TRACE(0, \"demo_example_start\");\n  return 0;\n}\n\nint demo_example_stop(bool on, void *param) {\n  TRACE(0, \"demo_example_stop\");\n  return 0;\n}\n\n#include \"app_thirdparty.h\"\n\nTHIRDPARTY_HANDLER_TAB(DEMO_LIB_NAME){\n    {{THIRDPARTY_FUNC_DEMO, THIRDPARTY_ID_DEMO, THIRDPARTY_START},\n     (APP_THIRDPARTY_HANDLE_CB_T)demo_example_start,\n     true,\n     NULL},\n    {{THIRDPARTY_FUNC_DEMO, THIRDPARTY_ID_DEMO, THIRDPARTY_STOP},\n     (APP_THIRDPARTY_HANDLE_CB_T)demo_example_stop,\n     true,\n     NULL},\n    {{THIRDPARTY_FUNC_DEMO, THIRDPARTY_ID_DEMO, THIRDPARTY_INIT},\n     (APP_THIRDPARTY_HANDLE_CB_T)demo_example_init,\n     true,\n     NULL},\n};\n\nTHIRDPARTY_HANDLER_TAB_SIZE(DEMO_LIB_NAME)\n"
  },
  {
    "path": "thirdparty/userapi/demo_app/LibDemo.h",
    "content": "#ifndef __LIBDEMO_H__\n#define __LIBDEMO_H__\n\n\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n\n\n#ifdef __cplusplus\n\t}\n#endif\n\n\n\n\n\n\n\n\n#endif\n"
  },
  {
    "path": "thirdparty/userapi/demo_app/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\n\nsubdir-ccflags-y +=  \\\n    -Ithirdparty/demo_lib \\\n\t-Iapps/audioplayers \\\n\t-Iapps/common \\\n\t-Iservices/bt_app \\\n\t-Iservices/resources \\\n\t-Iutils/cqueue \\\n\t-Ithirdparty/userapi\n"
  },
  {
    "path": "thirdparty/userapi/noise_tracker_app/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\n\nsubdir-ccflags-y +=  \\\n\t-Ithirdparty/noise_tracker_lib \\\n\t-Iapps/audioplayers \\\n\t-Iapps/common \\\n\t-Iapps/key \\\n\t-Iutils/heap \\\n\t-Irtos/rtx/TARGET_CORTEX_M \\\n\t-Iservices/bt_app \\\n\t-Iservices/audio_dump/include \\\n\t-Iplatform/drivers/ana \\\n\t-Iservices/resources \\\n\t-Iutils/cqueue \\\n\t-Ithirdparty/userapi \\\n\t$(BT_IF_INCLUDES) \\\n\t-Iservices/multimedia/speech/inc \\\n\t$(BT_PROFILES_INCLUDES) \\\n\nifeq ($(VOICE_DETECTOR_EN),1)\nsubdir-ccflags-y += -Iapps/voice_detector\nendif\n"
  },
  {
    "path": "thirdparty/userapi/noise_tracker_app/NoiseTrackerDemo.cpp",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"app_utils.h\"\n#include \"cmsis.h\"\n#include \"cmsis_os.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \n#include \n\n// for audio\n#include \"app_audio.h\"\n#include \"app_bt_stream.h\"\n#include \"app_media_player.h\"\n#include \"audio_dump.h\"\n#include \"audioflinger.h\"\n#include \"speech_memory.h\"\n#include \"speech_ssat.h\"\n\n#include \"noise_tracker.h\"\n#include \"noise_tracker_callback.h\"\n\n/**< NT Engine hooks                    */\n#define NT_ENGINE_INIT(callback, ch, threshold)                                \\\n  noise_tracker_init(callback, ch, threshold)\n#define NT_ENGINE_FEED(frame, n_samples) noise_tracker_process(frame, n_samples)\n\n/**< NT configuration settings          */\n#define NT_MIC_BITS_PER_SAMPLE (AUD_BITS_16)\n#define NT_MIC_SAMPLE_RATE (16000) // (AUD_SAMPRATE_8000)\n#define NT_MIC_VOLUME (16)\n\n/**< NT Engine configuration settings   */\n#define NT_ENGINE_SAMPLES_PER_FRAME (240)\n#define NT_ENGINE_SAMPLE_RATE (16000)\n#define NT_ENGINE_SYSFREQ (APP_SYSFREQ_26M) // (APP_SYSFREQ_26M)\n\n/* Utility functions                     */\n#define NT_TRACE(s, ...) TRACE(1, \"%s: \" s, __FUNCTION__, ##__VA_ARGS__);\n#define ALIGN4 __attribute__((aligned(4)))\n\n/* Calcluate the audio-capture frame length, FRAME_LEN, based of decimation rate\n * (1 or 2): */\n#define FRAME_LEN                                                              \\\n  (NT_ENGINE_SAMPLES_PER_FRAME * (NT_MIC_SAMPLE_RATE / NT_ENGINE_SAMPLE_RATE))\n#define CAPTURE_CHANNEL_NUM (ANC_NOISE_TRACKER_CHANNEL_NUM)\n#define CAPTURE_BUF_SIZE (FRAME_LEN * CAPTURE_CHANNEL_NUM * 2 * 2)\nstatic uint8_t codec_capture_buf[CAPTURE_BUF_SIZE] ALIGN4;\n\nSTATIC_ASSERT(FRAME_LEN == NT_ENGINE_SAMPLES_PER_FRAME,\n              \"NT_ENGINE Config error\");\n\n/* Local state */\nstatic bool nt_demo_is_streaming = false;\nextern uint8_t bt_sco_mode;\n\n/**\n * @breif Handle one-time initialization, like setting up the memory pool\n */\nstatic int nt_demo_init(bool, const void *) {\n  static bool done;\n\n  NT_TRACE(0, \"Initialize kws_demo\");\n  if (done)\n    return 0;\n\n  done = true;\n\n  return 0;\n}\n\n/**\n * @brief DC block IIR filter\n *\n * @param inout     Pointer of the PCM data (modify inplace).\n * @param in_len    Length of the PCM data in the buffer in samples.\n *\n */\nstatic void filter_iir_dc_block(short *inout, int in_len, int stride) {\n  static int z = 0;\n  int tmp;\n\n  for (int i = 0; i < in_len; i += stride) {\n    z = (15 * z + inout[i]) >> 4;\n    tmp = inout[i] - z;\n    inout[i] = speech_ssat_int16(tmp);\n  }\n}\n\n/**\n * @brief Process the collected PCM data from MIC.\n *        Resample audio stream to 8KHz and pass audio to kws lib.\n *\n * @param buf       Pointer of the PCM data buffer to access.\n * @param length    Length of the PCM data in the buffer in bytes.\n *\n * @return uint32_t 0 means no error happened\n */\nstatic uint32_t nt_demo_stream_handler(uint8_t *buf, uint32_t length) {\n  ASSERT(length == FRAME_LEN * CAPTURE_CHANNEL_NUM * sizeof(int16_t),\n         \"stream length not matched\");\n\n  short *pcm_buf = (short *)buf;\n  uint32_t pcm_len = length / 2;\n\n  filter_iir_dc_block(pcm_buf, pcm_len, ANC_NOISE_TRACKER_CHANNEL_NUM);\n  NT_ENGINE_FEED(pcm_buf, pcm_len);\n\n  return 0;\n}\n\n/**\n * @brief Setup audio streaming from MIC\n *\n * @param do_stream   start / stop streaming\n *\n * @return int 0 means no error happened\n */\nstatic int nt_demo_stream_start(bool do_stream, const void *) {\n  struct AF_STREAM_CONFIG_T stream_cfg;\n\n  NT_TRACE(3, \"Is running:%d enable:%d, bt_sco_mode:%d\", nt_demo_is_streaming,\n           do_stream, bt_sco_mode);\n\n  if (bt_sco_mode)\n    return 0;\n\n  if (nt_demo_is_streaming == do_stream)\n    return 0;\n  nt_demo_is_streaming = do_stream;\n\n  if (do_stream) {\n    // Request sufficient system clock\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_NT, NT_ENGINE_SYSFREQ);\n    NT_TRACE(1, \"sys freq calc: %d Hz\", hal_sys_timer_calc_cpu_freq(5, 0));\n\n    nt_demo_init(true, NULL);\n\n    // Initialize the NT ENGINE and install word-callback\n    NT_ENGINE_INIT(nt_demo_words_cb, ANC_NOISE_TRACKER_CHANNEL_NUM, -20);\n\n    memset(&stream_cfg, 0, sizeof(stream_cfg));\n    stream_cfg.sample_rate = (AUD_SAMPRATE_T)NT_MIC_SAMPLE_RATE;\n    stream_cfg.bits = NT_MIC_BITS_PER_SAMPLE;\n    stream_cfg.vol = NT_MIC_VOLUME;\n    stream_cfg.device = AUD_STREAM_USE_INT_CODEC;\n    stream_cfg.io_path = AUD_INPUT_PATH_NTMIC;\n    stream_cfg.channel_num =\n        (enum AUD_CHANNEL_NUM_T)ANC_NOISE_TRACKER_CHANNEL_NUM;\n    stream_cfg.handler = nt_demo_stream_handler;\n    stream_cfg.data_ptr = codec_capture_buf;\n    stream_cfg.data_size = CAPTURE_BUF_SIZE;\n\n    af_stream_open(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE, &stream_cfg);\n    af_stream_start(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n\n    NT_TRACE(0, \"audio capture ON\");\n\n  } else {\n    af_stream_stop(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n    af_stream_close(AUD_STREAM_ID_0, AUD_STREAM_CAPTURE);\n\n    app_sysfreq_req(APP_SYSFREQ_USER_APP_NT, APP_SYSFREQ_32K);\n    TRACE(1, \"sys freq calc:(32K) %d Hz\", hal_sys_timer_calc_cpu_freq(5, 0));\n\n    NT_TRACE(0, \"audio capture OFF\");\n  }\n\n  return 0;\n}\n\n#include \"app_thirdparty.h\"\n\n#define TP_EVENT(event, handler)                                               \\\n  {THIRDPARTY_FUNC_NO3, THIRDPARTY_ID_DEMO, THIRDPARTY_##event},               \\\n      (APP_THIRDPARTY_HANDLE_CB_T)handler\n\nTHIRDPARTY_HANDLER_TAB(NOISE_TRACKER_LIB_NAME){\n    //\t{TP_EVENT(INIT,        nt_demo_init),           true,   NULL},\n    {TP_EVENT(START, nt_demo_stream_start), true, NULL},\n    {TP_EVENT(STOP, nt_demo_stream_start), false, NULL},\n};\n\nTHIRDPARTY_HANDLER_TAB_SIZE(NOISE_TRACKER_LIB_NAME)\n"
  },
  {
    "path": "thirdparty/userapi/noise_tracker_app/noise_tracker_callback.c",
    "content": "#include \"noise_tracker_callback.h\"\n#include \"hal_trace.h\"\n\n/**\n * @brief Trigger word callback from kws lib\n *\n * @param word      Detected word\n * @param score     Score of word\n *\n */\nvoid nt_demo_words_cb(float power) {\n  TRACE(1, \"active power %d\", (int)(power));\n}"
  },
  {
    "path": "thirdparty/userapi/noise_tracker_app/noise_tracker_callback.h",
    "content": "#ifndef NOISE_TRACKER_CALLBACK_H\n#define NOISE_TRACKER_CALLBACK_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid nt_demo_words_cb(float power);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif"
  },
  {
    "path": "uart_log.sh",
    "content": "#!/usr/bin/env bash\n\nrightbud=/dev/serial/by-id/usb-wch.cn_USB_Dual_Serial_0123456789-if00\nleftbud=/dev/serial/by-id/usb-wch.cn_USB_Dual_Serial_0123456789-if02\n\nread -p \"Which bud do you want to connect to UART for? L/R (default L): \" -n 1 -r\nttydev=$leftbud\nif [[ $REPLY =~ ^[Rr]$ ]]; then\n    ttydev=$rightbud\nfi\nsudo minicom -D $ttydev -b 2000000\n"
  },
  {
    "path": "utils/boot_struct/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y := -Iplatform/hal\n\nifeq ($(SECURE_BOOT),1)\nccflags-y += -DSECURE_BOOT\nendif\n"
  },
  {
    "path": "utils/boot_struct/boot_struct.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hal_cmu.h\"\n#include \"norflash_cfg.h\"\n#include \"reboot_param.h\"\n#include \"tool_msg.h\"\n\nextern const char sys_build_info[];\n\n#ifdef USER_SECURE_BOOT\nextern const unsigned int system_info;\n#endif\n\n// -----------------------------------------------------------\n// Boot struct and code sig struct\n// -----------------------------------------------------------\n#if defined(PROGRAMMER_INFLASH)\n#undef PROGRAMMER\n#endif\n\n#define BOOT_STRUCT_LOC __attribute((section(\".boot_struct\")))\n\n#ifdef USER_SECURE_BOOT\n#define DEFAULT_BUILD_INFO ((uint32_t)&system_info)\n#else\n#define DEFAULT_BUILD_INFO ((uint32_t)sys_build_info)\n#endif\n\n#define DEFAULT_CODE_SIG                                                       \\\n  { .code_size = 0, .sig_len = SIG_LEN, }\n\n#ifdef SIMU\n#define DEFAULT_NORFLASH_SAMDLY 0x1\n#define DEFAULT_NORFLASH_MOD_CLK HAL_CMU_FREQ_26M\n#define DEFAULT_NORFLASH_RDCMD 0x03\n#else\n#define DEFAULT_NORFLASH_SAMDLY 0x2\n// Select 26M for 40M crystal case\n#define DEFAULT_NORFLASH_MOD_CLK HAL_CMU_FREQ_104M\n// Below 50M: 0x03, Above 50M: 0x0B\n#define DEFAULT_NORFLASH_RDCMD 0x0B\n#endif\n\n#define DEFAULT_NORFLASH_CFG                                                   \\\n  {                                                                            \\\n    .neg_phase = 0, .pos_neg = 0, .cmdquad = 0, .div = 0x2,                    \\\n    .samdly = DEFAULT_NORFLASH_SAMDLY, .dualmode = 1, .holdpin = 0,            \\\n    .wprpin = 0, .quadmode = 0, .mod_clk = DEFAULT_NORFLASH_MOD_CLK,           \\\n    .spiruen = 0, .spirden = 0, .dualiocmd = 0xBB,                             \\\n    .rdcmd = DEFAULT_NORFLASH_RDCMD, .frdcmd = 0x0B, .qrdcmd = 0xEB,           \\\n  }\n\n#ifdef SECURE_BOOT_V1\n\n#ifdef PROGRAMMER\n\nstruct programmer_boot_struct_t {\n  struct boot_struct_v1_t boot_struct;\n  struct code_sig_struct_t code_sig_struct;\n};\n\nconst struct programmer_boot_struct_t BOOT_STRUCT_LOC programmer_boot_struct = {\n    .boot_struct =\n        {\n            .hdr =\n                {\n                    .magic = BOOT_MAGIC_NUMBER,\n                    .security = 1,\n                    .hash_type = BOOT_HASH_TYPE_SHA256,\n                    .key_type = BOOT_KEY_TYPE_RSA2048,\n                    .key_len = KEY_LEN,\n                    .sig_len = SIG_LEN,\n                    .build_info_start = ((uint32_t)sys_build_info),\n                },\n        },\n    .code_sig_struct = DEFAULT_CODE_SIG,\n};\n\n#elif defined(SECURE_BOOT)\n\nstruct secure_boot_struct_t {\n  struct boot_struct_v1_t boot_struct;\n  struct code_sig_struct_t code_sig_struct;\n  struct norflash_cfg_struct_t norflash_cfg;\n};\n\nconst struct secure_boot_struct_t BOOT_STRUCT_LOC secure_boot_struct = {\n    .boot_struct =\n        {\n            .hdr =\n                {\n                    .magic = ~0UL,\n                    .security = 1,\n                    .hash_type = BOOT_HASH_TYPE_SHA256,\n                    .key_type = BOOT_KEY_TYPE_RSA2048,\n                    .key_len = KEY_LEN,\n                    .sig_len = SIG_LEN,\n                    .build_info_start = DEFAULT_BUILD_INFO,\n                },\n        },\n    .code_sig_struct = DEFAULT_CODE_SIG,\n    .norflash_cfg = DEFAULT_NORFLASH_CFG,\n};\n\n#else\n\nconst struct boot_hdr_v1_t BOOT_STRUCT_LOC boot_struct = {\n    .magic = ~0UL,\n    .security = 0,\n    .build_info_start = DEFAULT_BUILD_INFO,\n};\n\n#endif\n\n#else // !SECURE_BOOT_V1\n\n#ifdef PROGRAMMER\n\nunion programmer_boot_struct_t {\n  // To keep compatible with the old download tools when downloadig non-secure\n  // images\n  struct {\n    struct boot_struct_v1_t dummy;\n    struct code_sig_struct_t code_sig_struct;\n  } s_v1;\n  struct {\n    struct boot_struct_t boot_struct;\n    struct code_sig_struct_t code_sig_struct;\n  } s;\n};\n\nconst union programmer_boot_struct_t BOOT_STRUCT_LOC programmer_boot_struct = {\n    .s =\n        {\n            .boot_struct =\n                {\n                    .hdr =\n                        {\n                            .magic = BOOT_MAGIC_NUMBER,\n                            .security = 1,\n                            .version = BOOT_STRUCT_VERSION,\n                            .build_info_start = ((uint32_t)sys_build_info),\n                        },\n                },\n            .code_sig_struct = DEFAULT_CODE_SIG,\n        },\n};\n\n#elif defined(SECURE_BOOT)\n\nstruct secure_boot_struct_t {\n  struct boot_struct_t boot_struct;\n  struct code_sig_struct_t code_sig_struct;\n  struct norflash_cfg_struct_t norflash_cfg;\n};\n\nconst struct secure_boot_struct_t BOOT_STRUCT_LOC secure_boot_struct = {\n    .boot_struct =\n        {\n            .hdr =\n                {\n                    .magic = ~0UL,\n                    .security = 1,\n                    .version = BOOT_STRUCT_VERSION,\n                    .build_info_start = DEFAULT_BUILD_INFO,\n                },\n        },\n    .code_sig_struct = DEFAULT_CODE_SIG,\n    .norflash_cfg = DEFAULT_NORFLASH_CFG,\n};\n\n#else\n\nconst struct boot_hdr_t BOOT_STRUCT_LOC boot_struct = {\n    .magic = ~0UL,\n    .security = 0,\n    .version = BOOT_STRUCT_VERSION,\n    .build_info_start = DEFAULT_BUILD_INFO,\n};\n\n#endif\n\n#endif // !SECURE_BOOT_V1\n\n// -----------------------------------------------------------\n// Reboot param\n// -----------------------------------------------------------\n\n#ifdef __ARMCC_VERSION\n#define REBOOT_PARAM_LOC __attribute((section(\".bss.reboot_param\")))\n#else\n#define REBOOT_PARAM_LOC __attribute((section(\".reboot_param\")))\n#endif\n\nstruct REBOOT_PARAM_T REBOOT_PARAM_LOC reboot_param;\n"
  },
  {
    "path": "utils/boot_struct/norflash_cfg.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __NORFLASH_CFG_H__\n#define __NORFLASH_CFG_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"plat_types.h\"\n\n#define STATUS_S10_LB_BIT_SHIFT             2\n#define STATUS_S10_LB_BIT_MASK              (1 << STATUS_S10_LB_BIT_SHIFT)\n\n#define STATUS_S11_LB1_BIT_SHIFT            3\n#define STATUS_S11_LB1_BIT_MASK             (1 << STATUS_S11_LB1_BIT_SHIFT)\n\nenum SEC_REG_BASE_T {\n    SEC_REG_BASE_0X1000,\n    SEC_REG_BASE_0X0000,\n};\n\nenum SEC_REG_SIZE_T {\n    SEC_REG_SIZE_1024,\n    SEC_REG_SIZE_512,\n    SEC_REG_SIZE_256,\n};\n\nenum SEC_REG_OFFSET_T {\n    SEC_REG_OFFSET_0X1000,\n    SEC_REG_OFFSET_0X0100,\n};\n\nenum SEC_REG_CNT_T {\n    SEC_REG_CNT_3,\n    SEC_REG_CNT_4,\n};\n\nenum SEC_REG_PP_T {\n    SEC_REG_PP_256,\n    SEC_REG_PP_1024,\n};\n\nenum SEC_REG_LB_T {\n    SEC_REG_LB_S11_S13,\n    SEC_REG_LB_S10,\n};\n\nstruct norflash_cfg_struct_t {\n    uint8_t neg_phase:1;\n    uint8_t pos_neg:1;\n    uint8_t cmdquad:1;\n    uint8_t samdly:3;\n\n    uint8_t div; /* least 2 */\n\n    uint8_t dualmode:1;\n    uint8_t holdpin:1;\n    uint8_t wprpin:1;\n    uint8_t quadmode:1;\n    uint8_t mod_clk:4;\n\n    uint8_t spiruen:3;\n    uint8_t spirden:3;\n\n    uint8_t dualiocmd;\n    uint8_t rdcmd;\n    uint8_t frdcmd;\n    uint8_t qrdcmd; /* quad io cmd */\n};\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/boot_struct/reboot_param.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __REBOOT_PARAM_H__\n#define __REBOOT_PARAM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"plat_types.h\"\n\nstruct REBOOT_PARAM_T {\n    uint32_t reserved[4];\n};\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/boot_struct/tool_msg.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __TOOL_MSG_H__\n#define __TOOL_MSG_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define BOOT_MAGIC_NUMBER                   0xBE57EC1C\n#define BOOT_HASH_TYPE_MD5                  1\n#define BOOT_HASH_TYPE_SHA256               2\n#define BOOT_KEY_TYPE_RSA2048               1\n#define BOOT_KEY_TYPE_ECDSA192              2\n#define BOOT_KEY_TYPE_ECDSA256              3\n\n#define SEC_KEY_VERSION                     0\n#define BOOT_STRUCT_VERSION                 0\n\n#define PREFIX_CHAR                         0xBE\n\n#define KEY_LEN                             (4 + 256 + 256)\n#define SIG_LEN                             256\n#define HASH_LEN                            32\n\n#ifndef MAX_TOOL_MSG_DATA_LEN\n// Max msg: flash cmd msg with 4-byte address and 16-byte data (1 + 4 + 16)\n#define MAX_TOOL_MSG_DATA_LEN               21\n#endif\n\n#define MAX_READ_DATA_LEN                   16\n#define MAX_WRITE_DATA_LEN                  16\n#define MAX_FLASH_CMD_DATA_LEN              16\n\n#define MIN_SIGNED_CODE_SIZE                32\n\n#ifdef SECURE_BOOT_V1\n#define BOOT_STRUCT_V1_OFFSET_TO_SIGN(b)    \\\n    ((unsigned char *)&((struct boot_struct_v1_t *)(b))->hdr.security)\n#define BOOT_STRUCT_V1_LEN_TO_SIGN          \\\n    ((unsigned long)&((struct boot_struct_v1_t *)0)->sig[0] - \\\n    (unsigned long)&((struct boot_struct_v1_t *)0)->hdr.security)\n#endif\n\n#define SEC_KEY_OFFSET_TO_HASH(b)           \\\n    ((unsigned char *)&((struct sec_key_struct_t *)(b))->version)\n#define SEC_KEY_LEN_TO_HASH                 \\\n    ((unsigned long)&((struct sec_key_struct_t *)0)->hash[0] - \\\n    (unsigned long)&((struct sec_key_struct_t *)0)->version)\n\n#define SIG_MSG_OVERHEAD                    8\n#define SIG_MSG_V1_EXTRA_DATA_LEN           (sizeof(struct boot_struct_v1_t) + sizeof(struct code_sig_struct_t))\n#define SIG_MSG_V1_TOTAL_LEN                (SIG_MSG_OVERHEAD + SIG_MSG_V1_EXTRA_DATA_LEN)\n#define SIG_MSG_EXTRA_DATA_LEN              (sizeof(struct boot_struct_t) + sizeof(struct code_sig_struct_t))\n#define SIG_MSG_TOTAL_LEN                   (SIG_MSG_OVERHEAD + SIG_MSG_EXTRA_DATA_LEN)\n\n#define CODE_MSG_OVERHEAD                   8\n#define BURN_DATA_MSG_OVERHEAD              16\n\n#define SECTOR_SIZE_64K                     (1 << 16)\n#define SECTOR_SIZE_32K                     (1 << 15)\n#define SECTOR_SIZE_16K                     (1 << 14)\n#define SECTOR_SIZE_4K                      (1 << 12)\n\n#define MSG_TOTAL_LEN(msg)                  (sizeof(struct msg_hdr_t) + ((struct msg_hdr_t *)(msg))->len + 1)\n\nenum MSG_TYPE {\n    TYPE_SYS = 0x00,\n    TYPE_READ = 0x01,\n    TYPE_WRITE = 0x02,\n    TYPE_BULK_READ = 0x03,\n#if defined(TEST_OVER_THE_AIR_ENANBLED)\n    TYPE_EXT_WRITE = 0x04,\n    TYPE_BULK_WRITE_START = 0x05,\n    TYPE_BULK_WRITE_DATA = 0x06,\n#endif\n    TYPE_NOTIF = 0x10,\n    TYPE_SYNC = 0x50,\n    TYPE_SIG_INFO = 0x51,\n    TYPE_SIG = 0x52,\n    TYPE_CODE_INFO = 0x53,\n    TYPE_CODE = 0x54,\n    TYPE_RUN = 0x55,\n    TYPE_SECTOR_SIZE = 0x60,\n    TYPE_ERASE_BURN_START = 0x61,\n    TYPE_ERASE_BURN_DATA = 0x62,\n    TYPE_OBSOLETED_63 = 0x63,\n    TYPE_OBSOLETED_64 = 0x64,\n    TYPE_FLASH_CMD = 0x65,\n    TYPE_GET_SECTOR_INFO = 0x66,\n    TYPE_SEC_REG_ERASE_BURN_START = 0x67,\n    TYPE_SEC_REG_ERASE_BURN_DATA = 0x68,\n\n    // Extended types\n    TYPE_PROD_TEST = 0x81,\n    TYPE_RUNTIME_CMD = 0x82,\n    TYPE_BT_CALIB_CMD = 0x83,\n    TYPE_PROTO_EL = 0xA0,\n\n    TYPE_INVALID = 0xFF,\n};\n\nenum SYS_CMD_TYPE {\n    SYS_CMD_REBOOT = 0xF1,\n    SYS_CMD_SHUTDOWN = 0xF2,\n    SYS_CMD_FLASH_BOOT = 0xF3,\n    SYS_CMD_SET_BOOTMODE = 0xE1,\n    SYS_CMD_CLR_BOOTMODE = 0xE2,\n    SYS_CMD_GET_BOOTMODE = 0xE3,\n    SYS_CMD_SET_DLD_RATE = 0xD1,\n};\n\nenum ERR_CODE {\n    ERR_NONE = 0x00,\n    ERR_LEN = 0x01,\n    ERR_CHECKSUM = 0x02,\n    ERR_NOT_SYNC = 0x03,\n    ERR_NOT_SEC = 0x04,\n    ERR_SYNC_WORD = 0x05,\n    ERR_SYS_CMD = 0x06,\n    ERR_DATA_ADDR = 0x07,\n    ERR_DATA_LEN = 0x08,\n    ERR_ACCESS_RIGHT = 0x09,\n\n    ERR_TYPE_INVALID = 0x0F,\n\n    //ERR_BOOT_OK = 0x10,\n    ERR_BOOT_MAGIC = 0x11,\n    ERR_BOOT_SEC = 0x12,\n    ERR_BOOT_HASH_TYPE = 0x13,\n    ERR_BOOT_KEY_TYPE = 0x14,\n    ERR_BOOT_KEY_LEN = 0x15,\n    ERR_BOOT_SIG_LEN = 0x16,\n    ERR_BOOT_SIG = 0x17,\n    ERR_BOOT_CRC = 0x18,\n    ERR_BOOT_LEN = 0x19,\n    ERR_SIG_CODE_SIZE = 0x1A,\n    ERR_SIG_SIG_LEN = 0x1B,\n    ERR_SIG_INFO_MISSING = 0x1C,\n    ERR_BOOT_KEY_ID = 0x1D,\n    ERR_BOOT_HASH = 0x1E,\n\n    ERR_CODE_OK = 0x20,\n    ERR_BOOT_MISSING = 0x21,\n    ERR_CODE_SIZE_SIG = 0x22,\n    ERR_CODE_ADDR_SIZE = 0x23,\n    ERR_CODE_INFO_MISSING = 0x24,\n    ERR_CODE_CRC = 0x25,\n    ERR_CODE_SIG = 0x26,\n\n    ERR_CODE_MISSING = 0x31,\n    ERR_VERSION = 0x32,\n\n    ERR_BURN_OK = 0x60,\n    ERR_SECTOR_SIZE = 0x61,\n    ERR_SECTOR_SEQ_OVERFLOW = 0x62,\n    ERR_BURN_INFO_MISSING = 0x63,\n    ERR_SECTOR_DATA_LEN = 0x64,\n    ERR_SECTOR_DATA_CRC = 0x65,\n    ERR_SECTOR_SEQ = 0x66,\n    ERR_ERASE_FLSH = 0x67,\n    ERR_BURN_FLSH = 0x68,\n    ERR_VERIFY_FLSH = 0x69,\n    ERR_FLASH_CMD = 0x6A,\n\n    ERR_TYPE_MISMATCHED = 0xE1,\n    ERR_SEQ_MISMATCHED = 0xE2,\n    ERR_BUF_TOO_SMALL = 0xE3,\n\n    ERR_INTERNAL = 0xFF,\n};\n\nenum PARSE_STATE {\n    PARSE_HEADER,\n    PARSE_DATA,\n    PARSE_EXTRA,\n};\n\nstruct msg_hdr_t {\n    unsigned char prefix;\n    unsigned char type;\n    unsigned char seq;\n    unsigned char len;\n};\n\nstruct message_t {\n    struct msg_hdr_t hdr;\n    // data and 1-byte check_sum\n    unsigned char data[MAX_TOOL_MSG_DATA_LEN + 1];\n};\n\nstruct sec_key_struct_t {\n    unsigned int magic;\n    unsigned short version;\n    unsigned char hash_type;\n    unsigned char key_type;\n    unsigned short key_len;\n    unsigned short sig_len;\n    unsigned int reserved[5];\n    unsigned char key[KEY_LEN];\n    unsigned char hash[HASH_LEN];\n};\n\nstruct boot_hdr_v1_t {\n    unsigned int magic;\n    unsigned short security;\n    unsigned char hash_type;\n    unsigned char key_type;\n    unsigned short key_len;\n    unsigned short sig_len;\n    unsigned int build_info_start;\n};\n\nstruct boot_struct_v1_t {\n    struct boot_hdr_v1_t hdr;\n    unsigned char key[KEY_LEN];\n    unsigned char sig[SIG_LEN];\n};\n\nstruct boot_hdr_t {\n    unsigned int magic;\n    unsigned short security;\n    unsigned short version;\n    unsigned int reserved;\n    unsigned int build_info_start;\n};\n\nstruct boot_struct_t {\n    struct boot_hdr_t hdr;\n    unsigned int reserved[4];\n};\n\nstruct code_sig_struct_t {\n    unsigned int code_size;\n    unsigned short sig_len;\n    unsigned short reserved;\n    unsigned char sig[SIG_LEN];\n};\n\nstruct exec_struct_t {\n    unsigned int entry;\n    unsigned int param;\n    unsigned int sp;\n    unsigned int exec_addr;\n};\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/build_info/build_info.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"plat_addr_map.h\"\n\n#define BUILD_INFO_LOCATION __attribute__((section(\".build_info\")))\n\n#define TO_STR_A(s) #s\n#define TO_STR(s) TO_STR_A(s)\n\n#ifdef TRACE_CRLF\n#define NEW_LINE_STR \"\\r\\n\"\n#else\n#define NEW_LINE_STR \"\\n\"\n#endif\n\nconst char BUILD_INFO_LOCATION sys_build_info[] =\n#if defined(ROM_BUILD) || defined(PROGRAMMER)\n    __DATE__ \" \" __TIME__ \" \" TO_STR(REVISION_INFO);\n#else\n    NEW_LINE_STR \"CHIP=\" TO_STR(CHIP)\n#ifdef CHIP_SUBTYPE\n        NEW_LINE_STR \"CHIP_SUBTYPE=\" TO_STR(CHIP_SUBTYPE)\n#endif\n            NEW_LINE_STR \"KERNEL=\" TO_STR(KERNEL)\n#ifdef SOFTWARE_VERSION\n                NEW_LINE_STR \"SW_VER=\" TO_STR(SOFTWARE_VERSION)\n#endif\n#ifdef OTA_BOOT_SIZE\n                    NEW_LINE_STR\n    \"SW_TYPE=OTA\" NEW_LINE_STR \"OTA_BOOT_SIZE=\" TO_STR(OTA_BOOT_SIZE)\n#else\n            NEW_LINE_STR \"CRASH_DUMP_SIZE=\" TO_STR(CRASH_DUMP_SECTION_SIZE)\n                NEW_LINE_STR \"AUD_SEC_SIZE=\" TO_STR(AUD_SECTION_SIZE)\n                    NEW_LINE_STR \"USER_SEC_SIZE=\" TO_STR(USERDATA_SECTION_SIZE)\n                        NEW_LINE_STR\n    \"FACT_SEC_SIZE=\" TO_STR(FACTORY_SECTION_SIZE) NEW_LINE_STR\n    \"NV_REC_DEV_VER=\" TO_STR(NV_REC_DEV_VER)\n#endif\n        NEW_LINE_STR \"FLASH_BASE=\" TO_STR(FLASH_NC_BASE) NEW_LINE_STR\n    \"FLASH_SIZE=\" TO_STR(FLASH_SIZE)\n#ifdef OTA_CODE_OFFSET\n        NEW_LINE_STR \"OTA_CODE_OFFSET=\" TO_STR(OTA_CODE_OFFSET)\n#endif\n#ifdef OTA_REMAP_OFFSET\n            NEW_LINE_STR \"OTA_REMAP_OFFSET=\" TO_STR(OTA_REMAP_OFFSET)\n#endif\n                NEW_LINE_STR \"CRC32_OF_IMAGE=0x00000000\"\n    //--------------------\n    // Add new items above\n    //--------------------\n    NEW_LINE_STR \"BUILD_DATE=\" __DATE__ \" \" __TIME__ NEW_LINE_STR\n                             \"REV_INFO=\" TO_STR(REVISION_INFO) NEW_LINE_STR;\n#endif\n"
  },
  {
    "path": "utils/cqueue/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-Iplatform/cmsis/inc/ \\\n\nifeq ($(ROM_UTILS_ON),1)\nccflags-y += -DCQ_FUNC_ATTR=WEAK\nelse\nccflags-y += -DCQ_FUNC_ATTR=\nendif\n\n"
  },
  {
    "path": "utils/cqueue/cqueue.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/***\n * cqueue.c - c circle queue c file\n */\n\n#include \"cqueue.h\"\n#include \"cmsis.h\"\n#include \"hal_uart.h\"\n#include \n#include \n\n//#define DEBUG_CQUEUE 1\n\nCQ_FUNC_ATTR\nint InitCQueue(CQueue *Q, unsigned int size, CQItemType *buf) {\n  Q->size = size;\n  Q->base = buf;\n  Q->len = 0;\n  if (!Q->base)\n    return CQ_ERR;\n\n  Q->read = Q->write = 0;\n  return CQ_OK;\n}\n\nCQ_FUNC_ATTR\nint IsEmptyCQueue(CQueue *Q) {\n  if (Q->len == 0)\n    return CQ_OK;\n  else\n    return CQ_ERR;\n}\n\nCQ_FUNC_ATTR\nint LengthOfCQueue(CQueue *Q) { return Q->len; }\n\nCQ_FUNC_ATTR\nint AvailableOfCQueue(CQueue *Q) { return (Q->size - Q->len); }\n\n#if 1\nCQ_FUNC_ATTR\nint EnCQueue(CQueue *Q, CQItemType *e, unsigned int len) {\n  if (AvailableOfCQueue(Q) < len) {\n    return CQ_ERR;\n  }\n\n  Q->len += len;\n\n  uint32_t bytesToTheEnd = Q->size - Q->write;\n  if (bytesToTheEnd > len) {\n    memcpy((uint8_t *)&Q->base[Q->write], (uint8_t *)e, len);\n    Q->write += len;\n  } else {\n    memcpy((uint8_t *)&Q->base[Q->write], (uint8_t *)e, bytesToTheEnd);\n    memcpy((uint8_t *)&Q->base[0], (((uint8_t *)e) + bytesToTheEnd),\n           len - bytesToTheEnd);\n    Q->write = len - bytesToTheEnd;\n  }\n\n  return CQ_OK;\n}\n\nint EnCQueue_AI(CQueue *Q, CQItemType *e, unsigned int len) {\n  uint32_t bytesToTheEnd = Q->size - Q->write;\n  uint32_t readBytesToTheEnd = Q->size - Q->read;\n\n  if (AvailableOfCQueue(Q) < len) {\n    if (readBytesToTheEnd > len) {\n      Q->read += len;\n    } else {\n      Q->read = len - readBytesToTheEnd;\n    }\n  } else {\n    Q->len += len;\n  }\n\n  if (bytesToTheEnd > len) {\n    memcpy((uint8_t *)&Q->base[Q->write], (uint8_t *)e, len);\n    Q->write += len;\n  } else {\n    memcpy((uint8_t *)&Q->base[Q->write], (uint8_t *)e, bytesToTheEnd);\n    memcpy((uint8_t *)&Q->base[0], (((uint8_t *)e) + bytesToTheEnd),\n           len - bytesToTheEnd);\n    Q->write = len - bytesToTheEnd;\n  }\n\n  return CQ_OK;\n}\n\n#else\nstatic inline void memcpy_u8(void *dst, void *src, unsigned int len) {\n  unsigned int i = 0;\n  unsigned int *d8, *s8;\n  d8 = dst;\n  s8 = src;\n  for (i = 0; i < len; i++)\n    d8[i] = s8[i];\n}\n\nstatic inline void memcpy_u32(void *dst, void *src, unsigned int len) {\n  unsigned int i = 0;\n  unsigned int *d32, *s32;\n  d32 = dst;\n  s32 = src;\n  for (i = 0; i < len; i++)\n    d32[i] = s32[i];\n}\n\nCQ_FUNC_ATTR\nint EnCQueue(CQueue *Q, CQItemType *e, unsigned int len) {\n  unsigned char *src = e;\n  unsigned char *dst = &(Q->base[Q->write]);\n\n  unsigned int cnt_u8;\n  unsigned int cnt_u32;\n  unsigned int cnt_u32_res;\n\n  unsigned int front_u8;\n  unsigned int front_u32;\n  unsigned int front_u32_res;\n\n  unsigned int end_u8;\n  unsigned int end_u32;\n  unsigned int end_u32_res;\n\n  bool unaligned_en;\n\n  if (AvailableOfCQueue(Q) < len) {\n    return CQ_ERR;\n  }\n\n  Q->len += len;\n\n  end_u8 = Q->size - Q->write;\n  end_u32 = end_u8 / 4;\n  end_u32_res = end_u8 % 4;\n\n  cnt_u8 = len;\n  cnt_u32 = cnt_u8 / 4;\n  cnt_u32_res = cnt_u8 % 4;\n\n  unaligned_en = config_unaligned_access(true);\n\n  if (cnt_u8 <= end_u8) {\n    memcpy_u32(dst, src, cnt_u32);\n\n    if (cnt_u32_res) {\n      src += cnt_u32 * 4;\n      dst += cnt_u32 * 4;\n      memcpy_u8(dst, src, cnt_u32_res);\n    }\n\n    // Deal with Q->write\n    Q->write += cnt_u8;\n\n  } else {\n    front_u8 = len - end_u8;\n    front_u32 = front_u8 / 4;\n    front_u32_res = front_u8 % 4;\n\n    // Deal with end data\n    memcpy_u32(dst, src, end_u32);\n    src += end_u32 * 4;\n    dst += end_u32 * 4;\n\n    memcpy_u8(dst, src, end_u32_res);\n    src += end_u32_res;\n    dst = &(Q->base[0]);\n\n    // Deal with front data\n    memcpy_u32(dst, src, front_u32);\n\n    if (front_u32_res) {\n      src += front_u32 * 4;\n      dst += front_u32 * 4;\n\n      memcpy_u8(dst, src, front_u32_res);\n    }\n\n    // Deal with Q->write\n    Q->write = front_u8;\n  }\n\n  config_unaligned_access(unaligned_en);\n\n  return CQ_OK;\n}\n\nvoid memcpy_fast(char *dst, char *src, unsigned int len) {\n  int size = len / 4;\n  int mod = len % 4;\n\n  int *Dst = (int *)dst;\n  int *Src = (int *)src;\n\n  int dst_offset = (int)Dst - (int)dst;\n  int src_offset = (int)Src - (int)src;\n\n  if (!dst_offset && !src_offset) {\n    memcpy_u32(Dst, Src, size);\n    if (mod) {\n      memcpy_u8(Dst + size, Src + size, mod);\n    }\n  } else {\n    memcpy_u8(dst, src, len);\n  }\n}\n\n#endif\n\nCQ_FUNC_ATTR\nint EnCQueueFront(CQueue *Q, CQItemType *e, unsigned int len) {\n  if (AvailableOfCQueue(Q) < len) {\n    return CQ_ERR;\n  }\n\n  Q->len += len;\n\n  /* walk to last item , revert write */\n  e = e + len - 1;\n\n  if (Q->read == 0)\n    Q->read = Q->size - 1;\n  else\n    Q->read--;\n\n  while (len > 0) {\n    Q->base[Q->read] = *e;\n\n    --Q->read;\n    --e;\n    --len;\n\n    if (Q->read < 0)\n      Q->read = Q->size - 1;\n  }\n\n  /* we walk one more, walk back */\n  if (Q->read == Q->size - 1)\n    Q->read = 0;\n  else\n    ++Q->read;\n\n  return CQ_OK;\n}\n\nCQ_FUNC_ATTR\nint DeCQueue(CQueue *Q, CQItemType *e, unsigned int len) {\n  if (LengthOfCQueue(Q) < len)\n    return CQ_ERR;\n\n  Q->len -= len;\n\n  if (e != NULL) {\n    uint32_t bytesToTheEnd = Q->size - Q->read;\n    if (bytesToTheEnd > len) {\n      memcpy((uint8_t *)e, (uint8_t *)&Q->base[Q->read], len);\n      Q->read += len;\n    } else {\n      memcpy((uint8_t *)e, (uint8_t *)&Q->base[Q->read], bytesToTheEnd);\n      memcpy((((uint8_t *)e) + bytesToTheEnd), (uint8_t *)&Q->base[0],\n             len - bytesToTheEnd);\n      Q->read = len - bytesToTheEnd;\n    }\n  } else {\n    if (0 < Q->size) {\n      Q->read = (Q->read + len) % Q->size;\n    } else {\n      Q->read = 0;\n    }\n  }\n\n  return CQ_OK;\n}\n\nCQ_FUNC_ATTR\nint PeekCQueue(CQueue *Q, unsigned int len_want, CQItemType **e1,\n               unsigned int *len1, CQItemType **e2, unsigned int *len2) {\n  if (LengthOfCQueue(Q) < len_want) {\n    return CQ_ERR;\n  }\n\n  *e1 = &(Q->base[Q->read]);\n  if ((Q->write > Q->read) || (Q->size - Q->read >= len_want)) {\n    *len1 = len_want;\n    *e2 = NULL;\n    *len2 = 0;\n    return CQ_OK;\n  } else {\n    *len1 = Q->size - Q->read;\n    *e2 = &(Q->base[0]);\n    *len2 = len_want - *len1;\n    return CQ_OK;\n  }\n\n  return CQ_ERR;\n}\n\nint PeekCQueueToBuf(CQueue *Q, CQItemType *e, unsigned int len) {\n  int status = CQ_OK;\n  unsigned char *e1 = NULL, *e2 = NULL;\n  unsigned int len1 = 0, len2 = 0;\n\n  status = PeekCQueue(Q, len, &e1, &len1, &e2, &len2);\n\n  if (status == CQ_OK) {\n    if (len == (len1 + len2)) {\n      memcpy(e, e1, len1);\n      memcpy(e + len1, e2, len2);\n    } else {\n      status = CQ_ERR;\n    }\n  }\n\n  return status;\n}\n\nint PullCQueue(CQueue *Q, CQItemType *e, unsigned int len) {\n  int status = CQ_OK;\n  unsigned char *e1 = NULL, *e2 = NULL;\n  unsigned int len1 = 0, len2 = 0;\n\n  status = PeekCQueue(Q, len, &e1, &len1, &e2, &len2);\n\n  if (status == CQ_OK) {\n    if (len == (len1 + len2)) {\n      memcpy(e, e1, len1);\n      memcpy(e + len1, e2, len2);\n      DeCQueue(Q, 0, len);\n    } else {\n      status = CQ_ERR;\n    }\n  }\n\n  return status;\n}\n\n#ifdef DEBUG_CQUEUE\nint DumpCQueue(CQueue *Q) {\n  CQItemType e;\n  int len = 0, i = 0;\n\n  len = LengthOfCQueue(Q);\n\n  if (len <= 0)\n    return CQ_ERR;\n\n  i = Q->read;\n  while (len > 0) {\n    e = Q->base[i];\n\n    TRACE(stderr, \"-0x%x\", e);\n    TRACE(stderr, \"-%c\", e);\n\n    ++i;\n    --len;\n    if (i == Q->size)\n      i = 0;\n  }\n\n  return CQ_ERR;\n}\n#endif\n\nvoid ResetCQueue(CQueue *Q) {\n  Q->len = 0;\n  Q->read = Q->write = 0;\n}\n"
  },
  {
    "path": "utils/cqueue/cqueue.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/***\n* cqueue.h - c circle queue c header\n*/\n\n#ifndef C_QUEUE_H\n#define C_QUEUE_H 1\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nenum {\n    CQ_OK = 0,\n    CQ_ERR,\n};\n\ntypedef unsigned char CQItemType;\n\ntypedef struct __CQueue\n{\n    int read;\n    int write;\n    int size;\n    int len;\n    CQItemType *base;\n}CQueue;\n\n/* Init Queue */\nint InitCQueue(CQueue *Q, unsigned int size, CQItemType *buf);\n/* Is Queue Empty */\nint IsEmptyCQueue(CQueue *Q);\n/* Filled Length Of Queue */\nint LengthOfCQueue(CQueue *Q);\n/* Empty Length Of Queue */\nint AvailableOfCQueue(CQueue *Q);\n/* Push Data Into Queue (Tail) */\nint EnCQueue(CQueue *Q, CQItemType *e, unsigned int len);\n/* Push Data Into Queue (Tail) */\nint EnCQueue_AI(CQueue *Q, CQItemType *e, unsigned int len);\n/* Push Data Into Front Of Queue */\nint EnCQueueFront(CQueue *Q, CQItemType *e, unsigned int len);\n/* Pop Data Data From Queue (Front) */\nint DeCQueue(CQueue *Q, CQItemType *e, unsigned int len);\n/* Peek But Not Pop Data From Queue (Front) */\nint PeekCQueue(CQueue *Q, unsigned int len_want, CQItemType **e1, unsigned int *len1, CQItemType **e2, unsigned int *len2);\n/* Peek data to buf e, But Not Pop Data From Queue (Front) */\nint PeekCQueueToBuf(CQueue *Q, CQItemType *e, unsigned int len);\nint PullCQueue(CQueue *Q, CQItemType *e, unsigned int len);\n/* Dump Queue */\nint DumpCQueue(CQueue *Q);\n\nvoid ResetCQueue(CQueue *Q);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* C_QUEUE_H */\n"
  },
  {
    "path": "utils/crash_catcher/CrashCatcher.c",
    "content": "/* Copyright (C) 2018  Adam Green (https://github.com/adamgreen)\n\n   Licensed under the Apache License, Version 2.0 (the \"License\");\n   you may not use this file except in compliance with the License.\n   You may obtain a copy of the License at\n\n       http://www.apache.org/licenses/LICENSE-2.0\n\n   Unless required by applicable law or agreed to in writing, software\n   distributed under the License is distributed on an \"AS IS\" BASIS,\n   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n   See the License for the specific language governing permissions and\n   limitations under the License.\n*/\n#include \"CrashCatcherPriv.h\"\n#include \n#include \n//#include \"cmsis_os.h\"\n#include \"cmsis_nvic.h\"\n\n/* Test harness will define this value on 64-bit machine to provide upper\n * 32-bits of pointer addresses. */\nCRASH_CATCHER_TEST_WRITEABLE uint64_t g_crashCatcherTestBaseAddress;\n\n/* The unit tests can point the core to a fake location for the SCB->CPUID\n * register. */\nCRASH_CATCHER_TEST_WRITEABLE uint32_t *g_pCrashCatcherCpuId =\n    (uint32_t *)0xE000ED00;\n\n/* The unit tests can point the core to a fake location for the fault status\n * registers. */\nCRASH_CATCHER_TEST_WRITEABLE uint32_t *g_pCrashCatcherFaultStatusRegisters =\n    (uint32_t *)0xE000ED28;\n\n/* The unit tests can point the core to a fake location for the Coprocessor\n * Access Control Register. */\nCRASH_CATCHER_TEST_WRITEABLE uint32_t\n    *g_pCrashCatcherCoprocessorAccessControlRegister = (uint32_t *)0xE000ED88;\n\n/* Fault handler will switch MSP to use this area as the stack while\n   CrashCatcher code is running. NOTE: If you change the size of this buffer, it\n   also needs to be changed in the HardFault_Handler (in FaultHandler_arm*.S)\n   when initializing the stack pointer. */\nuint32_t g_crashCatcherStack[CRASH_CATCHER_STACK_WORD_COUNT];\n\ntypedef struct {\n  const CrashCatcherExceptionRegisters *pExceptionRegisters;\n  CrashCatcherStackedRegisters *pSP;\n  uint32_t flags;\n  CrashCatcherInfo info;\n} Object;\n\nstatic Object\ninitStackPointers(const CrashCatcherExceptionRegisters *pExceptionRegisters);\nstatic uint32_t getAddressOfExceptionStack(\n    const CrashCatcherExceptionRegisters *pExceptionRegisters);\nstatic void *uint32AddressToPointer(uint32_t address);\nstatic void advanceStackPointerToValueBeforeException(Object *pObject);\nstatic int areFloatingPointRegistersAutoStacked(const Object *pObject);\nstatic void initFloatingPointFlag(Object *pObject);\nstatic int areFloatingPointCoprocessorsEnabled(void);\nstatic void initIsBKPT(Object *pObject);\nstatic int isBKPT(uint16_t instruction);\nstatic void setStackSentinel(void);\nstatic void dumpSignature(void);\nstatic void dumpFlags(const Object *pObject);\nstatic void dumpR0toR3(const Object *pObject);\nstatic void dumpR4toR11(const Object *pObject);\nstatic void dumpR12(const Object *pObject);\nstatic void dumpSP(const Object *pObject);\nstatic void dumpLR_PC_PSR(const Object *pObject);\nstatic void dumpMSPandPSPandExceptionPSR(const Object *pObject);\nstatic void dumpFloatingPointRegisters(const Object *pObject);\nstatic void dumpMemoryRegions(const CrashCatcherMemoryRegion *pRegion);\nstatic void checkStackSentinelForStackOverflow(void);\nstatic int isARMv6MDevice(void);\nstatic void dumpFaultStatusRegisters(void);\nstatic void advanceProgramCounterPastHardcodedBreakpoint(const Object *pObject);\nstatic void dumpMSPandPSPandExceptionPSRinAssert(const Object *pObject);\n\nstruct TaskRegs {\n  uint32_t r0;\n  uint32_t r1;\n  uint32_t r2;\n  uint32_t r3;\n  uint32_t r4;\n  uint32_t r5;\n  uint32_t r6;\n  uint32_t r7;\n  uint32_t r8;\n  uint32_t r9;\n  uint32_t r10;\n  uint32_t r11;\n  uint32_t r12;\n  uint32_t sp;\n  uint32_t lr;\n  uint32_t pc;\n  uint32_t psr;\n};\nstatic void dumpTaskRegs(const struct TaskRegs *regs);\n\nvoid AssertCatcher_Entry(void) {\n  register uint32_t r0 asm(\"r0\");\n  register uint32_t r1 asm(\"r1\");\n  register uint32_t r2 asm(\"r2\");\n  register uint32_t r3 asm(\"r3\");\n  register uint32_t r4 asm(\"r4\");\n  register uint32_t r5 asm(\"r5\");\n  register uint32_t r6 asm(\"r6\");\n  register uint32_t r7 asm(\"r7\");\n  register uint32_t r8 asm(\"r8\");\n  register uint32_t r9 asm(\"r9\");\n  register uint32_t r10 asm(\"r10\");\n  register uint32_t r11 asm(\"r11\");\n  register uint32_t r12 asm(\"r12\");\n  register uint32_t sp asm(\"sp\");\n  register uint32_t lr asm(\"lr\");\n  uint32_t pc;\n  struct TaskRegs regs;\n\n#ifdef __ARMCC_VERSION\n  asm volatile(\"\"\n               : \"=r\"(r0), \"=r\"(r1), \"=r\"(r2), \"=r\"(r3), \"=r\"(r4), \"=r\"(r5),\n                 \"=r\"(r6), \"=r\"(r7), \"=r\"(r8), \"=r\"(r9), \"=r\"(r10), \"=r\"(r11),\n                 \"=r\"(r12), \"=r\"(sp), \"=r\"(lr));\n#endif\n\n  regs.r0 = r0;\n  regs.r1 = r1;\n  regs.r2 = r2;\n  regs.r3 = r3;\n  regs.r4 = r4;\n  regs.r5 = r5;\n  regs.r6 = r6;\n  regs.r7 = r7;\n  regs.r8 = r8;\n  regs.r9 = r9;\n  regs.r10 = r10;\n  regs.r11 = r11;\n  regs.r12 = r12;\n  regs.sp = sp;\n  regs.lr = lr;\n  __asm volatile(\"mov %0, r15\" : \"=r\"(pc));\n  regs.psr = __get_xPSR();\n  regs.pc = pc;\n\n  int ret;\n  Object object;\n  object.flags = 0;\n\n  do {\n    ret = CrashCatcher_DumpStart(NULL);\n    if (ret)\n      break;\n\n    dumpSignature();\n    dumpFlags(&object);\n\n    dumpTaskRegs(®s);\n\n    dumpMSPandPSPandExceptionPSRinAssert(NULL);\n    /*\n    if (object.flags & CRASH_CATCHER_FLAGS_FLOATING_POINT)\n        dumpFloatingPointRegisters(&object);\n    */\n    dumpMemoryRegions(CrashCatcher_GetMemoryRegions());\n    if (!isARMv6MDevice())\n      dumpFaultStatusRegisters();\n\n  } while (CrashCatcher_DumpEnd() == CRASH_CATCHER_TRY_AGAIN);\n}\n\nvoid CrashCatcher_Entry(\n    const CrashCatcherExceptionRegisters *pExceptionRegisters) {\n  int ret;\n  Object object = initStackPointers(pExceptionRegisters);\n  advanceStackPointerToValueBeforeException(&object);\n  initFloatingPointFlag(&object);\n  initIsBKPT(&object);\n\n  do {\n    setStackSentinel();\n    ret = CrashCatcher_DumpStart(&object.info);\n    if (ret)\n      break;\n\n    dumpSignature();\n    dumpFlags(&object);\n    dumpR0toR3(&object);\n    dumpR4toR11(&object);\n    dumpR12(&object);\n    dumpSP(&object);\n    dumpLR_PC_PSR(&object);\n    dumpMSPandPSPandExceptionPSR(&object);\n    if (object.flags & CRASH_CATCHER_FLAGS_FLOATING_POINT)\n      dumpFloatingPointRegisters(&object);\n    dumpMemoryRegions(CrashCatcher_GetMemoryRegions());\n    if (!isARMv6MDevice())\n      dumpFaultStatusRegisters();\n    checkStackSentinelForStackOverflow();\n  } while (CrashCatcher_DumpEnd() == CRASH_CATCHER_TRY_AGAIN);\n\n  advanceProgramCounterPastHardcodedBreakpoint(&object);\n}\n\nstatic Object\ninitStackPointers(const CrashCatcherExceptionRegisters *pExceptionRegisters) {\n  Object object;\n  object.pExceptionRegisters = pExceptionRegisters;\n  object.info.sp = getAddressOfExceptionStack(pExceptionRegisters);\n  object.pSP = uint32AddressToPointer(object.info.sp);\n  object.flags = 0;\n  return object;\n}\n\nstatic uint32_t getAddressOfExceptionStack(\n    const CrashCatcherExceptionRegisters *pExceptionRegisters) {\n  /*always return psp */\n  return pExceptionRegisters->psp;\n  /*\n  if (pExceptionRegisters->exceptionLR & LR_PSP)\n      return pExceptionRegisters->psp;\n  else\n      return pExceptionRegisters->msp;\n  */\n}\n\nstatic void *uint32AddressToPointer(uint32_t address) {\n  if (sizeof(uint32_t *) == 8)\n    return (void *)(unsigned long)((uint64_t)address |\n                                   g_crashCatcherTestBaseAddress);\n  else\n    return (void *)(unsigned long)address;\n}\n\nstatic void advanceStackPointerToValueBeforeException(Object *pObject) {\n  /* Cortex-M processor always push 8 integer registers on the stack. */\n  pObject->info.sp += 8 * sizeof(uint32_t);\n  /* ARMv7-M processors can also push 16 single-precision floating point\n   * registers, FPSCR and a padding word. */\n  if (areFloatingPointRegistersAutoStacked(pObject))\n    pObject->info.sp += (16 + 1 + 1) * sizeof(uint32_t);\n  /* Cortex-M processor may also have had to force 8-byte alignment before auto\n   * stacking registers. */\n  pObject->info.sp |= (pObject->pSP->psr & PSR_STACK_ALIGN) ? 4 : 0;\n}\n\nstatic int areFloatingPointRegistersAutoStacked(const Object *pObject) {\n  // return 0 == (pObject->pExceptionRegisters->exceptionLR & LR_FLOAT);\n  return 0;\n}\n\nstatic void initFloatingPointFlag(Object *pObject) {\n  if (areFloatingPointCoprocessorsEnabled())\n    pObject->flags |= CRASH_CATCHER_FLAGS_FLOATING_POINT;\n}\n\nstatic int areFloatingPointCoprocessorsEnabled(void) {\n  static const uint32_t coProcessor10and11EnabledBits = 5 << 20;\n  uint32_t coprocessorAccessControl =\n      *g_pCrashCatcherCoprocessorAccessControlRegister;\n\n  return (coprocessorAccessControl & (coProcessor10and11EnabledBits)) ==\n         coProcessor10and11EnabledBits;\n}\n\nstatic void initIsBKPT(Object *pObject) {\n  const uint16_t *pInstruction = uint32AddressToPointer(pObject->pSP->pc);\n\n  pObject->info.isBKPT = isBKPT(*pInstruction);\n}\n\nstatic int isBKPT(uint16_t instruction) {\n  return (instruction & 0xFF00) == 0xBE00;\n}\n\nstatic void setStackSentinel(void) {\n  g_crashCatcherStack[0] = CRASH_CATCHER_STACK_SENTINEL;\n}\n\nstatic void dumpSignature(void) {\n  static const uint8_t signature[4] = {\n      CRASH_CATCHER_SIGNATURE_BYTE0, CRASH_CATCHER_SIGNATURE_BYTE1,\n      CRASH_CATCHER_VERSION_MAJOR, CRASH_CATCHER_VERSION_MINOR};\n\n  CrashCatcher_DumpMemory(signature, CRASH_CATCHER_BYTE, sizeof(signature));\n}\n\nstatic void dumpFlags(const Object *pObject) {\n  CrashCatcher_DumpMemory(&pObject->flags, CRASH_CATCHER_BYTE,\n                          sizeof(pObject->flags));\n}\n\nstatic void dumpR0toR3(const Object *pObject) {\n  CrashCatcher_DumpMemory(&pObject->pSP->r0, CRASH_CATCHER_BYTE,\n                          4 * sizeof(uint32_t));\n}\n\nstatic void dumpTaskRegs(const struct TaskRegs *regs) {\n  CrashCatcher_DumpMemory(regs, CRASH_CATCHER_BYTE, sizeof(struct TaskRegs));\n}\n\nstatic void dumpR4toR11(const Object *pObject) {\n  CrashCatcher_DumpMemory(&pObject->pExceptionRegisters->r4, CRASH_CATCHER_BYTE,\n                          (11 - 4 + 1) * sizeof(uint32_t));\n}\n\nstatic void dumpR12(const Object *pObject) {\n  CrashCatcher_DumpMemory(&pObject->pSP->r12, CRASH_CATCHER_BYTE,\n                          sizeof(uint32_t));\n}\n\nstatic void dumpSP(const Object *pObject) {\n  CrashCatcher_DumpMemory(&pObject->info.sp, CRASH_CATCHER_BYTE,\n                          sizeof(uint32_t));\n}\n\nstatic void dumpLR_PC_PSR(const Object *pObject) {\n  CrashCatcher_DumpMemory(&pObject->pSP->lr, CRASH_CATCHER_BYTE,\n                          3 * sizeof(uint32_t));\n}\n\nstatic void dumpMSPandPSPandExceptionPSR(const Object *pObject) {\n  CrashCatcher_DumpMemory(&pObject->pExceptionRegisters->msp,\n                          CRASH_CATCHER_BYTE, 3 * sizeof(uint32_t));\n}\n\nstatic void dumpMSPandPSPandExceptionPSRinAssert(const Object *pObject) {\n  uint32_t msp = __get_MSP();\n  uint32_t psp = __get_PSP();\n  uint32_t exceptionPSR = __get_xPSR();\n\n  CrashCatcher_DumpMemory(&msp, CRASH_CATCHER_BYTE, sizeof(uint32_t));\n  CrashCatcher_DumpMemory(&psp, CRASH_CATCHER_BYTE, sizeof(uint32_t));\n  CrashCatcher_DumpMemory(&exceptionPSR, CRASH_CATCHER_BYTE, sizeof(uint32_t));\n}\n\nstatic void dumpFloatingPointRegisters(const Object *pObject) {\n  uint32_t allFloatingPointRegisters[32 + 1];\n  if (areFloatingPointRegistersAutoStacked(pObject)) {\n    /* Copy the upper floats first as that will cause a lazy copy of the\n     * auto-stacked registers. */\n    CrashCatcher_CopyUpperFloatingPointRegisters(\n        &allFloatingPointRegisters[16]);\n    memcpy(&allFloatingPointRegisters[0], &pObject->pSP->floats,\n           sizeof(pObject->pSP->floats));\n    allFloatingPointRegisters[32] = pObject->pSP->fpscr;\n  } else {\n    CrashCatcher_CopyAllFloatingPointRegisters(allFloatingPointRegisters);\n  }\n  CrashCatcher_DumpMemory(allFloatingPointRegisters, CRASH_CATCHER_BYTE,\n                          sizeof(allFloatingPointRegisters));\n}\n\nstatic void dumpMemoryRegions(const CrashCatcherMemoryRegion *pRegion) {\n  while (pRegion && pRegion->startAddress != 0xFFFFFFFF) {\n    /* Just dump the two addresses in pRegion.  The element size isn't required.\n     */\n    CrashCatcher_DumpMemory(pRegion, CRASH_CATCHER_BYTE, 2 * sizeof(uint32_t));\n    CrashCatcher_DumpMemory(\n        uint32AddressToPointer(pRegion->startAddress), pRegion->elementSize,\n        (pRegion->endAddress - pRegion->startAddress) / pRegion->elementSize);\n    pRegion++;\n  }\n}\n\nstatic void checkStackSentinelForStackOverflow(void) {\n  if (g_crashCatcherStack[0] != CRASH_CATCHER_STACK_SENTINEL) {\n    uint8_t value[4] = {0xAC, 0xCE, 0x55, 0xED};\n    CrashCatcher_DumpMemory(value, CRASH_CATCHER_BYTE, sizeof(value));\n  }\n}\n\nstatic int isARMv6MDevice(void) {\n  static const uint32_t armv6mArchitecture = 0xC << 16;\n  uint32_t cpuId = *g_pCrashCatcherCpuId;\n  uint32_t architecture = cpuId & (0xF << 16);\n\n  return (architecture == armv6mArchitecture);\n}\n\nstatic void dumpFaultStatusRegisters(void) {\n  uint32_t faultStatusRegistersAddress =\n      (uint32_t)(unsigned long)g_pCrashCatcherFaultStatusRegisters;\n  CrashCatcherMemoryRegion faultStatusRegion[] = {\n      {faultStatusRegistersAddress,\n       faultStatusRegistersAddress + 5 * sizeof(uint32_t), CRASH_CATCHER_WORD},\n      {0xFFFFFFFF, 0xFFFFFFFF, CRASH_CATCHER_BYTE}};\n  dumpMemoryRegions(faultStatusRegion);\n}\n\nstatic void\nadvanceProgramCounterPastHardcodedBreakpoint(const Object *pObject) {\n  if (pObject->info.isBKPT)\n    pObject->pSP->pc += 2;\n}\n"
  },
  {
    "path": "utils/crash_catcher/CrashCatcherPriv.h",
    "content": "/* Copyright (C) 2017  Adam Green (https://github.com/adamgreen)\n\n   Licensed under the Apache License, Version 2.0 (the \"License\");\n   you may not use this file except in compliance with the License.\n   You may obtain a copy of the License at\n\n       http://www.apache.org/licenses/LICENSE-2.0\n\n   Unless required by applicable law or agreed to in writing, software\n   distributed under the License is distributed on an \"AS IS\" BASIS,\n   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n   See the License for the specific language governing permissions and\n   limitations under the License.\n*/\n/* Private header file shared with unit tests. */\n#ifndef _CRASH_CATCHER_PRIV_H_\n#define _CRASH_CATCHER_PRIV_H_\n\n\n/* Definitions used by assembly language and C code. */\n#define CRASH_CATCHER_STACK_WORD_COUNT 125\n\n\n/* Definitions only required from C code. */\n#if !__ASSEMBLER__\n\n#include \n#include \"CrashCatcherApi.h\"\n\n\n/* Bit in LR to indicate whether PSP was used for automatic stacking of registers during exception entry. */\n#define LR_PSP (1 << 2)\n\n/* Bit in LR set to 0 when automatic stacking of floating point registers occurs during exception handling. */\n#define LR_FLOAT (1 << 4)\n\n\n/* Bit in auto stacked xPSR which indicates whether stack was force 8-byte aligned. */\n#define PSR_STACK_ALIGN (1 << 9)\n\n\n/* This structure contains the integer registers that are automatically stacked by Cortex-M processor when it enters\n   an exception handler. */\ntypedef struct\n{\n    uint32_t r0;\n    uint32_t r1;\n    uint32_t r2;\n    uint32_t r3;\n    uint32_t r12;\n    uint32_t lr;\n    uint32_t pc;\n    uint32_t psr;\n    /* The following floating point registers are only stacked when the LR_FLOAT bit is set in exceptionLR. */\n    uint32_t floats[16];\n    uint32_t fpscr;\n    uint32_t reserved; /* keeps 8-byte alignment */\n} CrashCatcherStackedRegisters;\n\n\n/* This is the area of memory that would normally be used for the stack when running on an actual Cortex-M\n   processor.  Unit tests can write to this buffer to simulate stack overflow. */\nextern uint32_t g_crashCatcherStack[CRASH_CATCHER_STACK_WORD_COUNT];\n\n\n/* Called from CrashCatcher core to copy all floating point registers to supplied buffer. The supplied buffer must be\n   large enough to contain 33 32-bit values (S0-S31 & FPCSR). */\nvoid CrashCatcher_CopyAllFloatingPointRegisters(uint32_t* pBuffer);\n\n/* Called from CrashCatcher core to copy upper 16 floating point registers to supplied buffer. The supplied buffer must be\n   large enough to contain 16 32-bit values (S16-S31). */\nvoid CrashCatcher_CopyUpperFloatingPointRegisters(uint32_t* pBuffer);\n\n#endif // #if !__ASSEMBLER__\n\n\n#endif /* _CRASH_CATCHER_PRIV_H_ */\n"
  },
  {
    "path": "utils/crash_catcher/CrashCatcher_armv7m.S",
    "content": "/* Copyright (C) 2018  Adam Green (https://github.com/adamgreen)\n\n   Licensed under the Apache License, Version 2.0 (the \"License\");\n   you may not use this file except in compliance with the License.\n   You may obtain a copy of the License at\n\n       http://www.apache.org/licenses/LICENSE-2.0\n\n   Unless required by applicable law or agreed to in writing, software\n   distributed under the License is distributed on an \"AS IS\" BASIS,\n   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n   See the License for the specific language governing permissions and\n   limitations under the License.\n*/\n#include \"CrashCatcherPriv.h\"\n\n/* Implementation of ARMv7-M assembly language code to trap exceptions and call CrashCatcher_Entry(). */\n    .text\n    .syntax unified\n\n    /* Called on Hard Fault exception.  Stacks important registers and calls CrashCatcher_Entry().\n\n        extern \"C\" void HardFault_Handler(void);\n    */\n    .global gdb_fault_handler\n    .type gdb_fault_handler, %function\n    .thumb_func\ngdb_fault_handler:\n    /* Push the following onto the stack (see CrashCatcherExceptionRegisters structure). The g_crashCatcherStack buffer\n       is reserved for use as the stack while CrashCatcher is running.\n        exceptionPSR\n        psp\n        msp\n        r4\n        r5\n        r6\n        r7\n        r8\n        r9\n        r10\n        r11\n        exceptionLR */\n    mrs     r3, xpsr\n    mrs     r2, psp\n    mrs     r1, msp\n    ldr     sp, =(g_crashCatcherStack + 4 * CRASH_CATCHER_STACK_WORD_COUNT)\n    push.w  {r1-r11,lr}\n\n    // Call CrashCatcher_Entry with first argument pointing to registers that were just stacked.\n    mov     r0, sp\n    bl      CrashCatcher_Entry\n\n    // Only make it back here when CrashCatcher_DumpEnd() returns CRASH_CATCHER_EXIT to indicate that it would like\n    // execution to be restored back to the faulting code (typically a hard coded breakpoint).\n    // Restore non-volatile registers and SP to values they had upon entry to fault handler before resuming execution\n    // at point of fault.\n    pop.w   {r1-r11,lr}\n    mov     sp, r1\n    bx      lr\n\n    // Let assembler know that we have hit the end of the HardFault_Handler function.\n    .pool\n    .size   gdb_fault_handler, .-gdb_fault_handler\n\n\n\n    /* Called from CrashCatcher core to copy all floating point registers to supplied buffer. The supplied buffer must\n       be large enough to contain 33 32-bit values (S0-S31 & FPSCR).\n\n        void CrashCatcher_CopyAllFloatingPointRegisters(uint32_t* pBuffer);\n    */\n    .global CrashCatcher_CopyAllFloatingPointRegisters\n    .type CrashCatcher_CopyAllFloatingPointRegisters, %function\n    .thumb_func\nCrashCatcher_CopyAllFloatingPointRegisters:\n    // Grab a copy of FPSCR before issuing any other FP instructions.\n    vmrs        r1, fpscr\n\n    // Move s0 - s31 to pBuffer.\n    vstmia.32   r0!, {s0 - s31}\n\n    // Move fpscr to pBuffer.\n    str         r1, [r0]\n\n    // Return to caller.\n    bx          lr\n\n    .pool\n    .size   CrashCatcher_CopyAllFloatingPointRegisters, .-CrashCatcher_CopyAllFloatingPointRegisters\n\n\n\n    /* Called from CrashCatcher core to copy upper 16 floating point registers to supplied buffer. The supplied buffer\n       must be large enough to contain 16 32-bit values (S16-S31).\n\n        void CrashCatcher_CopyUpperFloatingPointRegisters(uint32_t* pBuffer);\n    */\n    .global CrashCatcher_CopyUpperFloatingPointRegisters\n    .type CrashCatcher_CopyUpperFloatingPointRegisters, %function\n    .thumb_func\nCrashCatcher_CopyUpperFloatingPointRegisters:\n    // Move s16 - s31 to pBuffer.\n    vstmia.32   r0!, {s16 - s31}\n\n    // Return to caller.\n    bx      lr\n\n    .pool\n    .size   CrashCatcher_CopyUpperFloatingPointRegisters, .-CrashCatcher_CopyUpperFloatingPointRegisters\n\n\n    .end\n"
  },
  {
    "path": "utils/crash_catcher/HexDump.c",
    "content": "/* Copyright (C) 2018  Adam Green (https://github.com/adamgreen)\n\n   Licensed under the Apache License, Version 2.0 (the \"License\");\n   you may not use this file except in compliance with the License.\n   You may obtain a copy of the License at\n\n       http://www.apache.org/licenses/LICENSE-2.0\n\n   Unless required by applicable law or agreed to in writing, software\n   distributed under the License is distributed on an \"AS IS\" BASIS,\n   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n   See the License for the specific language governing permissions and\n   limitations under the License.\n*/\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n#include \n#include \n//#include \"cmsis_os.h\"\n#include \"coredump_section.h\"\n#include \"xyzmodem.h\"\n\n// CRASH_CATCHER_TEST_WRITEABLE CrashCatcherReturnCodes\n// g_crashCatcherDumpEndReturn = CRASH_CATCHER_TRY_AGAIN;\nstatic void printString(const char *pString);\n// static void waitForUserInput(void);\nstatic void dumpBytes(const uint8_t *pMemory, size_t elementCount);\nstatic void dumpByteAsHex(uint8_t byte);\nstatic void dumpHexDigit(uint8_t nibble);\nstatic void dumpHalfwords(const uint16_t *pMemory, size_t elementCount);\nstatic void dumpWords(const uint32_t *pMemory, size_t elementCount);\n\nvoid CrashCatcher_putc(char c) {\n  hal_trace_output((const unsigned char *)&c, 1);\n}\n\nextern uint32_t __data_start__, __data_end__;\nextern uint32_t __bss_start__, __bss_end__;\nextern uint32_t __StackLimit, __StackTop;\nextern uint32_t __overlay_text_exec_start__;\nextern uint32_t __fast_sram_end__;\n\nconst CrashCatcherMemoryRegion *CrashCatcher_GetMemoryRegions(void) {\n  static CrashCatcherMemoryRegion regions[4];\n  int j = 0;\n\n  regions[j].startAddress = (uint32_t)&__data_start__;\n  regions[j].endAddress = (uint32_t)&__data_end__;\n  regions[j].elementSize = CRASH_CATCHER_BYTE;\n  j++;\n\n  regions[j].startAddress = (uint32_t)&__bss_start__;\n  regions[j].endAddress = (uint32_t)&__bss_end__;\n  regions[j].elementSize = CRASH_CATCHER_BYTE;\n  j++;\n\n  regions[j].startAddress = (uint32_t)&__StackLimit;\n  regions[j].endAddress = (uint32_t)&__StackTop;\n  regions[j].elementSize = CRASH_CATCHER_BYTE;\n  j++;\n  /*\n  regions[j].startAddress = (uint32_t)&__overlay_text_exec_start__;\n  regions[j].endAddress =   (uint32_t)&__fast_sram_end__;\n  regions[j].elementSize = CRASH_CATCHER_BYTE;\n  j++;\n\n  regions[j].startAddress = 0x0c000000;\n  regions[j].endAddress =   0x0c0c8000;\n  regions[j].elementSize = CRASH_CATCHER_BYTE;\n  j++;\n  */\n\n  regions[j].startAddress = 0xFFFFFFFF;\n  regions[j].endAddress = 0xFFFFFFFF;\n  regions[j].elementSize = CRASH_CATCHER_BYTE;\n  return regions;\n}\n\nstatic enum { DUMP_TERM, DUMP_XMODEM, DUMP_FLASH } dump_direction = DUMP_TERM;\n\nint CrashCatcher_DumpStart(const CrashCatcherInfo *pInfo) {\n  int ret;\n\n  printString(\"\\r\\n\\r\\n\");\n  /*\n  if (pInfo->isBKPT)\n      printString(\"BREAKPOINT\");\n  else\n  */\n  printString(\"CRASH\");\n  printString(\" ENCOUNTERED\\r\\n\"\n              \"Enable XMODEM and then press any key to start dump.\\r\\n\");\n  // waitForUserInput();\n  hal_trace_flush_buffer();\n\n#ifdef CORE_DUMP_TO_FLASH\n  core_dump_erase_section();\n  dump_direction = DUMP_FLASH;\n  return 0;\n#endif\n\n  ret = xmodem_start_xfer(120);\n  if (!ret) {\n    dump_direction = DUMP_XMODEM;\n    return 0;\n  }\n\n  return 0;\n}\n\nstatic void printString(const char *pString) {\n  while (*pString)\n    CrashCatcher_putc(*pString++);\n}\n\n#if 0\nstatic void waitForUserInput(void)\n{\n    CrashCatcher_getc();\n}\n#endif\n\nvoid CrashCatcher_DumpMemory(const void *pvMemory,\n                             CrashCatcherElementSizes elementSize,\n                             size_t elementCount) {\n  switch (elementSize) {\n  case CRASH_CATCHER_BYTE:\n    dumpBytes(pvMemory, elementCount);\n    break;\n  case CRASH_CATCHER_HALFWORD:\n    dumpHalfwords(pvMemory, elementCount);\n    break;\n  case CRASH_CATCHER_WORD:\n    dumpWords(pvMemory, elementCount);\n    break;\n  }\n  printString(\"\\r\\n\");\n\n#ifdef CORE_DUMP_TO_FLASH\n  if (elementSize * elementCount >= COREDUMP_SECTOR_SIZE) {\n    core_dump_write_large(pvMemory, elementSize * elementCount);\n  } else {\n    core_dump_write(pvMemory, elementSize * elementCount);\n  }\n#endif\n}\n\nstatic void dumpBytes(const uint8_t *pMemory, size_t elementCount) {\n  size_t i;\n\n  if (dump_direction == DUMP_TERM) {\n    for (i = 0; i < elementCount; i++) {\n      /* Only dump 16 bytes to a single line before introducing a line break. */\n      if (i != 0 && (i & 0xF) == 0) {\n        printString(\"\\r\\n\");\n        hal_trace_flush_buffer();\n      }\n      dumpByteAsHex(*pMemory++);\n    }\n  } else if (dump_direction == DUMP_XMODEM) {\n    const uint8_t *buf = pMemory;\n    int len;\n\n    len = xmodem_send_stream(buf, elementCount, 1);\n    if (len < 0) {\n      // printString(\"#####error\");\n    }\n  }\n}\n\nstatic void dumpByteAsHex(uint8_t byte) {\n  dumpHexDigit(byte >> 4);\n  dumpHexDigit(byte & 0xF);\n}\n\nstatic void dumpHexDigit(uint8_t nibble) {\n  static const char hexToASCII[] = \"0123456789ABCDEF\";\n\n  assert(nibble < 16);\n  CrashCatcher_putc(hexToASCII[nibble]);\n}\n\nstatic void dumpHalfwords(const uint16_t *pMemory, size_t elementCount) {\n  size_t i;\n  for (i = 0; i < elementCount; i++) {\n    uint16_t val = *pMemory++;\n    /* Only dump 8 halfwords to a single line before introducing a line break.\n     */\n    if (i != 0 && (i & 0x7) == 0)\n      printString(\"\\r\\n\");\n    dumpBytes((uint8_t *)&val, sizeof(val));\n  }\n}\n\nstatic void dumpWords(const uint32_t *pMemory, size_t elementCount) {\n  size_t i;\n  for (i = 0; i < elementCount; i++) {\n    uint32_t val = *pMemory++;\n    /* Only dump 4 words to a single line before introducing a line break. */\n    if (i != 0 && (i & 0x3) == 0) {\n      printString(\"\\r\\n\");\n    }\n    dumpBytes((uint8_t *)&val, sizeof(val));\n  }\n}\n\nCrashCatcherReturnCodes CrashCatcher_DumpEnd(void) {\n  char end_info[] = \"\\r\\nEnd of dump\\r\\n\";\n\n  if (dump_direction == DUMP_XMODEM) {\n    int len = (strlen(end_info) + 1) / 2 * 2;\n    xmodem_send_stream((const uint8_t *)end_info, len, 0);\n    xmodem_stop_xfer();\n  } else {\n    printString(end_info);\n  }\n\n  return CRASH_CATCHER_EXIT;\n#if 0\n    if (g_crashCatcherDumpEndReturn == CRASH_CATCHER_TRY_AGAIN && g_info.isBKPT)\n        return CRASH_CATCHER_EXIT;\n    else\n        return g_crashCatcherDumpEndReturn;\n#endif\n}\n"
  },
  {
    "path": "utils/crash_catcher/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_s := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.S))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-Iutils/crash_catcher/include \\\n\t-Iutils/libc/inc \\\n\t-Iplatform/cmsis/inc/ \\\n\t-Iservices/nv_section/log_section \\\n\t-Irtos/rtx/TARGET_CORTEX_M/ \\\n\t-Iutils/xyzmodem/\n\n"
  },
  {
    "path": "utils/crash_catcher/include/CrashCatcher.h",
    "content": "/* Copyright (C) 2018  Adam Green (https://github.com/adamgreen)\n\n   Licensed under the Apache License, Version 2.0 (the \"License\");\n   you may not use this file except in compliance with the License.\n   You may obtain a copy of the License at\n\n       http://www.apache.org/licenses/LICENSE-2.0\n\n   Unless required by applicable law or agreed to in writing, software\n   distributed under the License is distributed on an \"AS IS\" BASIS,\n   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n   See the License for the specific language governing permissions and\n   limitations under the License.\n*/\n#ifndef _CRASH_CATCHER_H_\n#define _CRASH_CATCHER_H_\n\n\n#include \n#include \n\n\n#define TRUE  1\n#define FALSE 0\n\n\n/* The crash dump start with a four byte header.  The first two bytes are \"cC\", the third byte is the major version\n   number, and the fourth bytes is the minor version number. */\n#define CRASH_CATCHER_SIGNATURE_BYTE0 'c'\n#define CRASH_CATCHER_SIGNATURE_BYTE1 'C'\n#define CRASH_CATCHER_VERSION_MAJOR   3\n#define CRASH_CATCHER_VERSION_MINOR   0\n\n/* The second word of the dump contains flags.  These are the allowed flags. */\n/* Flag to indicate that 32 single-precision floating point registers and FPSCR will follow integer registers. */\n#define CRASH_CATCHER_FLAGS_FLOATING_POINT (1 << 0)\n\n\n/* This magic value will be found as the last word in a crash dump if the fault handler overflowed the stack while\n   generating the crash dump. */\n#define CRASH_CATCHER_STACK_SENTINEL 0xACCE55ED\n\n\n/* Particulars of crash provided to CrashCatcher_DumpStart(). */\ntypedef struct\n{\n    /* The SP, Stack Pointer, contained this value at the time of the fault. */\n    uint32_t    sp;\n    /* Was this fault actually just a hardcoded breakpoint from which it is safe to continue. */\n    int         isBKPT;\n} CrashCatcherInfo;\n\n\n/* The crash dump will have one of these entries for each memory region included in the dump file. */\ntypedef struct\n{\n    uint32_t                 startAddress;\n    uint32_t                 endAddress;\n} CrashCatcherMemoryRegionInfo;\n\n/* Supported element sizes to be used with CrashCatcher_DumpMemory calls. */\ntypedef enum\n{\n    CRASH_CATCHER_BYTE = 1,\n    CRASH_CATCHER_HALFWORD = 2,\n    CRASH_CATCHER_WORD = 4\n} CrashCatcherElementSizes;\n\n\n/* Codes to be returned from an implementation's CrashCathcer_DumpEnd() handler. */\ntypedef enum\n{\n    /* Crash Catcher should loop around and try dumping again incase user missed it previous time. */\n    CRASH_CATCHER_TRY_AGAIN = 0,\n    /* Crash Catcher should exit and return to caller.  This is used during unit testing or if the crash cause was \n       actually a hardcoded breakpoint that should be logged and then execution continued. */\n    CRASH_CATCHER_EXIT\n} CrashCatcherReturnCodes;\n\n\n/* An array of these structures is returned from CrashCatcher_GetMemoryRegions() to indicate what regions of memory\n   should be dumped as part of the crash dump.  The last entry should contain a starting address of 0xFFFFFFFF to\n   indicate that the end of the list has been encountered. */\ntypedef struct\n{\n    /* The first address of the element to be dumped for this region of memory. */\n    /* The last region in the array return from CrashCatcher_GetMemoryRegions() must set this to 0xFFFFFFFF */\n    uint32_t                 startAddress;\n    /* Stop dumping the region once this address is encountered.  The dump isn't inclusive of this address. */\n    /* It must be greater than startAddress. */\n    uint32_t                 endAddress;\n    /* This should be set to CRASH_CATCHER_BYTE except for peripheral registers which don't support 8-bit reads. */\n    CrashCatcherElementSizes elementSize;\n} CrashCatcherMemoryRegion;\n\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n/* The following functions must be provided by a specific dumping implementation.  The Core CrashCatcher calls these\n   routines to have an implementation dump the bytes associated with the current crash. */\n\n/* Called at the beginning of crash dump. You should provide an implementation which prepares for the dump by opening\n   a dump file, prompting the user to begin a crash dump, or whatever makes sense for your scenario. */\nint CrashCatcher_DumpStart(const CrashCatcherInfo* pInfo);\n\n/* Called to obtain an array of regions in memory that should be dumped as part of the crash.  This will typically\n   be all RAM regions that contain volatile data.  For some crash scenarios, a user may decide to also add peripheral\n   registers of interest (ie. dump some ethernet registers when you are encountering crashes in the network stack.)\n   If NULL is returned from this function, the core will only dump the registers. */\nconst CrashCatcherMemoryRegion* CrashCatcher_GetMemoryRegions(void);\n\n/* Called to dump the next chunk of memory to the dump (this memory may point to register contents which has been copied\n   to memory by CrashCatcher already.  The element size will be 8-bits, 16-bits, or 32-bits.  The implementation should\n   use reads of the specified size since some memory locations may only support the indicated size. */\nvoid CrashCatcher_DumpMemory(const void* pvMemory, CrashCatcherElementSizes elementSize, size_t elementCount);\n\n/* Called at the end of crash dump. You should provide an implementation which cleans up at the end of dump. This could\n   include closing a dump file, blinking LEDs, infinite looping, and/or returning CRASH_CATCHER_TRY_AGAIN if\n   CrashCatcher should prepare to dump again incase user missed the first attempt. */\nCrashCatcherReturnCodes CrashCatcher_DumpEnd(void);\n\n\n/* The following functions must be provided by a hex dumping implementation. Such implementations will also have to\n   implement the core CrashCatcher_GetMemoryRegions() API as well.  The HexDump version of CrashCatcher calls these\n   routines to have an implementation query the user when they are ready for the dump to start and actually dump the\n   hex data to the user a character at a time. */\n\n/* Called to receive a character of data from the user.  Typically this is in response to a \"Press any key\" type of\n   prompt to the user.  This function should be blocking. */\nint CrashCatcher_getc(void);\n\n/* Called to send a character of hex dump data to the user. */\nvoid CrashCatcher_putc(char c);\n\n#ifdef __cplusplus\n}\n#endif\n\n\n/* Macros which can generate a few forms of crashes. */\n#define CRASH_CATCHER_READ_FAULT()          (*(volatile unsigned int*)0xFFFFFFF0)\n#define CRASH_CATCHER_WRITE_FAULT()         (*(volatile unsigned int*)0xFFFFFFF0 = 0x0)\n#define CRASH_CATCHER_INVALID_INSTRUCTION() { __asm volatile (\".word 0xDE00\"); }\n\n/* Macro used to insert hardcoded breakpoint into user's code. */\n#define CRASH_CATCHER_BREAKPOINT()          { __asm volatile (\"bkpt #0\"); }\n\n/* Macro used to make some globals writeable from unit tests but constant when running on ARM processors. */\n#ifdef RUNNING_HOST_TESTS\n    #define CRASH_CATCHER_TEST_WRITEABLE\n#else\n    #define CRASH_CATCHER_TEST_WRITEABLE static const\n#endif\n\n\n#endif /* _CRASH_CATCHER_H_ */\n"
  },
  {
    "path": "utils/crash_catcher/include/CrashCatcherApi.h",
    "content": "#ifndef __CRASH_CATCHER_API_H__\n#define  __CRASH_CATCHER_API_H__\n\n/* This structure is filled in by the Hard Fault exception handler (or unit test) and then passed in as a parameter to\n   CrashCatcher_Entry(). */\ntypedef struct\n{\n    uint32_t msp;\n    uint32_t psp;\n    uint32_t exceptionPSR;\n    uint32_t r4;\n    uint32_t r5;\n    uint32_t r6;\n    uint32_t r7;\n    uint32_t r8;\n    uint32_t r9;\n    uint32_t r10;\n    uint32_t r11;\n    uint32_t exceptionLR;\n} CrashCatcherExceptionRegisters;\n\n/* The main entry point into CrashCatcher.  Is called from the HardFault exception handler and unit tests. */\nvoid CrashCatcher_Entry(const CrashCatcherExceptionRegisters* pExceptionRegisters);\n\n/* The main entry point When software Assert.*/\nvoid AssertCatcher_Entry(void);\n\n#endif /* __CRASH_CATCHER_API_H__*/\n"
  },
  {
    "path": "utils/crash_catcher/include/FloatMocks.h",
    "content": "/* Copyright (C) 2015  Adam Green (https://github.com/adamgreen)\n\n   Licensed under the Apache License, Version 2.0 (the \"License\");\n   you may not use this file except in compliance with the License.\n   You may obtain a copy of the License at\n\n       http://www.apache.org/licenses/LICENSE-2.0\n\n   Unless required by applicable law or agreed to in writing, software\n   distributed under the License is distributed on an \"AS IS\" BASIS,\n   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n   See the License for the specific language governing permissions and\n   limitations under the License.\n*/\n#ifndef _FLOAT_MOCKS_H_\n#define _FLOAT_MOCKS_H_\n\n#include \n#include \n\n\nvoid FloatMocks_Init(void);\nvoid FloatMocks_Uninit(void);\n\nvoid FloatMocks_SetAllFloatingPointRegisters(const uint32_t* pFloatRegisters);\nvoid FloatMocks_SetUpperFloatingPointRegisters(const uint32_t* pFloatRegisters);\n\n\n#endif /* _FLOAT_MOCKS_H_ */\n"
  },
  {
    "path": "utils/crc16/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj-y := $(obj-y:.c=.o)\n"
  },
  {
    "path": "utils/crc16/crc16.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/*\n *      crc16.c\n *\n * This source code is licensed under the GNU General Public License,\n * Version 2. See the file COPYING for more details.\n */\n\n#include \"crc16.h\"\n\n/** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */\nunsigned short const crc16_table[256] = {\n    0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, 0xC601,\n    0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, 0xCC01, 0x0CC0,\n    0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, 0x0A00, 0xCAC1, 0xCB81,\n    0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, 0xD801, 0x18C0, 0x1980, 0xD941,\n    0x1B00, 0xDBC1, 0xDA81, 0x1A40, 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01,\n    0x1DC0, 0x1C80, 0xDC41, 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0,\n    0x1680, 0xD641, 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081,\n    0x1040, 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,\n    0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441, 0x3C00,\n    0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41, 0xFA01, 0x3AC0,\n    0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840, 0x2800, 0xE8C1, 0xE981,\n    0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41, 0xEE01, 0x2EC0, 0x2F80, 0xEF41,\n    0x2D00, 0xEDC1, 0xEC81, 0x2C40, 0xE401, 0x24C0, 0x2580, 0xE541, 0x2700,\n    0xE7C1, 0xE681, 0x2640, 0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0,\n    0x2080, 0xE041, 0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281,\n    0x6240, 0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441,\n    0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41, 0xAA01,\n    0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840, 0x7800, 0xB8C1,\n    0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41, 0xBE01, 0x7EC0, 0x7F80,\n    0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40, 0xB401, 0x74C0, 0x7580, 0xB541,\n    0x7700, 0xB7C1, 0xB681, 0x7640, 0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101,\n    0x71C0, 0x7080, 0xB041, 0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0,\n    0x5280, 0x9241, 0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481,\n    0x5440, 0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40,\n    0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841, 0x8801,\n    0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40, 0x4E00, 0x8EC1,\n    0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41, 0x4400, 0x84C1, 0x8581,\n    0x4540, 0x8701, 0x47C0, 0x4680, 0x8641, 0x8201, 0x42C0, 0x4380, 0x8341,\n    0x4100, 0x81C1, 0x8081, 0x4040};\n\n/**\n * crc16 - compute the CRC-16 for the data buffer\n * @crc:\tprevious CRC value\n * @buffer:\tdata pointer\n * @len:\tnumber of bytes in the buffer\n *\n * Returns the updated CRC value.\n */\nunsigned short _crc16(unsigned short crc, unsigned char const *buffer,\n                      unsigned int len) {\n  while (len--)\n    crc = crc16_byte(crc, *buffer++);\n  return crc;\n}\n"
  },
  {
    "path": "utils/crc16/crc16.h",
    "content": "/*\n *\tcrc16.h - CRC-16 routine\n *\n * Implements the standard CRC-16:\n *   Width 16\n *   Poly  0x8005 (x^16 + x^15 + x^2 + 1)\n *   Init  0\n *\n * Copyright (c) 2005 Ben Gardner \n *\n * This source code is licensed under the GNU General Public License,\n * Version 2. See the file COPYING for more details.\n */\n\n#ifndef __CRC16_H\n#define __CRC16_H\n\nextern unsigned short const crc16_table[256];\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nunsigned short _crc16(unsigned short crc, const unsigned char *buffer, unsigned int len);\n\n#ifdef __cplusplus\n}\n#endif\n\nstatic inline unsigned short crc16_byte(unsigned short crc, const unsigned char data)\n{\n\treturn (crc >> 8) ^ crc16_table[(crc ^ data) & 0xff];\n}\n\n#endif /* __CRC16_H */\n"
  },
  {
    "path": "utils/crc32/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj-y := $(obj-y:.c=.o)\n\nifeq ($(CRC32_ROM),1)\nccflags-y += -Iutils/rom_utils\nEXCLUDE_OBJS := crc32.o\nelse\nEXCLUDE_OBJS := crc32_rom.o\nendif\n\nobj-y := $(filter-out $(EXCLUDE_OBJS),$(obj-y))\n\nifeq ($(MAKE_CRC32_TABLE),1)\nccflags-y += -DMAKE_CRC32_TABLE\nendif\n\n"
  },
  {
    "path": "utils/crc32/crc32.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n// Referenced from http://www.w3.org/TR/PNG/#D-CRCAppendix\n\n#include \"crc32.h\"\n\n#ifdef MAKE_CRC32_TABLE\n\nstatic unsigned long crc_table[256];\nstatic int crc_table_computed = 0;\n\nstatic void make_crc_table(void) {\n  unsigned long c;\n  unsigned long n, k;\n\n  for (n = 0; n < 256; n++) {\n    c = n;\n    for (k = 0; k < 8; k++) {\n      if (c & 1)\n        c = 0xedb88320L ^ (c >> 1);\n      else\n        c = c >> 1;\n    }\n    crc_table[n] = c;\n  }\n}\n\n#else\n\nstatic const unsigned long crc_table[256] = {\n    0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA, 0x076DC419, 0x706AF48F,\n    0xE963A535, 0x9E6495A3, 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988,\n    0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91, 0x1DB71064, 0x6AB020F2,\n    0xF3B97148, 0x84BE41DE, 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,\n    0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC, 0x14015C4F, 0x63066CD9,\n    0xFA0F3D63, 0x8D080DF5, 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172,\n    0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B, 0x35B5A8FA, 0x42B2986C,\n    0xDBBBC9D6, 0xACBCF940, 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,\n    0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116, 0x21B4F4B5, 0x56B3C423,\n    0xCFBA9599, 0xB8BDA50F, 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924,\n    0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D, 0x76DC4190, 0x01DB7106,\n    0x98D220BC, 0xEFD5102A, 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,\n    0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818, 0x7F6A0DBB, 0x086D3D2D,\n    0x91646C97, 0xE6635C01, 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E,\n    0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457, 0x65B0D9C6, 0x12B7E950,\n    0x8BBEB8EA, 0xFCB9887C, 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,\n    0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2, 0x4ADFA541, 0x3DD895D7,\n    0xA4D1C46D, 0xD3D6F4FB, 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0,\n    0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9, 0x5005713C, 0x270241AA,\n    0xBE0B1010, 0xC90C2086, 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,\n    0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4, 0x59B33D17, 0x2EB40D81,\n    0xB7BD5C3B, 0xC0BA6CAD, 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A,\n    0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683, 0xE3630B12, 0x94643B84,\n    0x0D6D6A3E, 0x7A6A5AA8, 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,\n    0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE, 0xF762575D, 0x806567CB,\n    0x196C3671, 0x6E6B06E7, 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC,\n    0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5, 0xD6D6A3E8, 0xA1D1937E,\n    0x38D8C2C4, 0x4FDFF252, 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,\n    0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60, 0xDF60EFC3, 0xA867DF55,\n    0x316E8EEF, 0x4669BE79, 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236,\n    0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F, 0xC5BA3BBE, 0xB2BD0B28,\n    0x2BB45A92, 0x5CB36A04, 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,\n    0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A, 0x9C0906A9, 0xEB0E363F,\n    0x72076785, 0x05005713, 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38,\n    0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21, 0x86D3D2D4, 0xF1D4E242,\n    0x68DDB3F8, 0x1FDA836E, 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,\n    0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C, 0x8F659EFF, 0xF862AE69,\n    0x616BFFD3, 0x166CCF45, 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2,\n    0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB, 0xAED16A4A, 0xD9D65ADC,\n    0x40DF0B66, 0x37D83BF0, 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,\n    0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6, 0xBAD03605, 0xCDD70693,\n    0x54DE5729, 0x23D967BF, 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94,\n    0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D,\n};\n\n#endif\n\nunsigned long crc32(unsigned long crc, const unsigned char *buf,\n                    unsigned int len) {\n  unsigned long c;\n\n#ifdef MAKE_CRC32_TABLE\n  if (crc_table_computed == 0) {\n    make_crc_table();\n    crc_table_computed = 1;\n  }\n#endif\n\n  c = crc ^ 0xffffffffL;\n\n  while (len) {\n    c = crc_table[(c ^ (*buf++)) & 0xff] ^ (c >> 8);\n    len--;\n  }\n\n  return c ^ 0xffffffffL;\n}\n"
  },
  {
    "path": "utils/crc32/crc32.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __CRC32_H__\n#define __CRC32_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nunsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned int len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/crc32/crc32_rom.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"crc32.h\"\n#include \"export_fn_rom.h\"\n\nunsigned long crc32(unsigned long crc, const unsigned char *buf,\n                    unsigned int len) {\n  return __export_fn_rom.crc32(crc, buf, len);\n}\n"
  },
  {
    "path": "utils/encrypt/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nENCRYPT_LIB_NAME := libcryption\n$(ENCRYPT_LIB_NAME)-y := $(src_obj)\nobj-y += $(ENCRYPT_LIB_NAME).a\n\nccflags-y := \\\n    -Iservices/bt_profiles/inc/ \\\n    -Iservices/bt_if/inc/ \\\n    -Iservices/bt_app/ \\\n    -Iapps/common/ \\\n    -Iutils/cqueue\n"
  },
  {
    "path": "utils/encrypt/_sha256.h",
    "content": "\n/** @file\n *\n * @defgroup sha256 SHA-256 hash library\n * @{\n * @ingroup app_common\n *\n * @brief  This module calculates SHA-256 (SHA-2, FIPS-180) hashes.\n *\n * @details To use this module, first call @ref sha256_init on a @ref sha256_context_t instance. Then call @ref\n *          sha256_update with the data to be hashed. This step can optionally be done with multiple\n *          calls to @ref sha256_update, each with a section of the data (in the correct order).\n *          After all data has been passed to @ref sha256_update, call @ref sha256_final to finalize\n *          and extract the hash value.\n *\n *          This code is adapted from code by Brad Conte, retrieved from\n *          https://github.com/B-Con/crypto-algorithms.\n *\n */\n\n#ifndef SHA256_H\n#define SHA256_H\n\n\n#include \n\n#define SHA256_DIGEST_SIZE 32\n\n/**@brief Current state of a hash operation.\n */\ntypedef struct {\n  uint64_t count;\n  union {\n      uint8_t buf[64];\n      uint32_t buf32[64 / 4];\n  };\n  uint32_t state[8];  // upto SHA2\n}SHA256_CTX;\n\n/**@brief Function for initializing a @ref sha256_context_t instance.\n *\n * @param[out] ctx  Context instance to be initialized.\n *\n * @retval BES_SUCCESS     If the instance was successfully initialized.\n * @retval BES_ERROR_NULL  If the parameter was NULL.\n */\nuint32_t _sha256_init(SHA256_CTX *ctx);\n\n/**@brief Function for calculating the hash of an array of uint8_t data.\n *\n * @details This function can be called multiple times in sequence. This is equivalent to calling\n *          the function once on a concatenation of the data from the different calls.\n *\n * @param[in,out] ctx   Hash instance.\n * @param[in]     data  Data to be hashed.\n * @param[in]     len   Length of the data to be hashed.\n *\n * @retval BES_SUCCESS     If the data was successfully hashed.\n * @retval BES_ERROR_NULL  If the ctx parameter was NULL or the data parameter was NULL,  while the len parameter was not zero.\n */\nuint32_t _sha256_update(SHA256_CTX *ctx, const uint8_t * data, uint32_t len);\n\n/**@brief Function for extracting the hash value from a hash instance.\n *\n * @details This function should be called after all data to be hashed has been passed to the hash\n *          instance (by one or more calls to @ref sha256_update).\n *\n * Do not call @ref sha256_update again after @ref sha256_final has been called.\n *\n * @param[in,out] ctx   Hash instance.\n * @param[out]    hash  Array to hold the extracted hash value (assumed to be 32 bytes long).\n * @param[in]     le   Store the hash in little-endian.\n *\n * @retval BES_SUCCESS     If the has value was successfully extracted.\n * @retval BES_ERROR_NULL  If a parameter was NULL.\n */\nuint32_t _sha256_final(SHA256_CTX *ctx, uint8_t * hash, uint8_t le);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif   // SHA256_H\n\n/** @} */\n"
  },
  {
    "path": "utils/encrypt/aes.h",
    "content": "#ifndef _AES_H_\n#define _AES_H_\n\n#include \n\n\n// #define the macros below to 1/0 to enable/disable the mode of operation.\n//\n// CBC enables AES128 encryption in CBC-mode of operation and handles 0-padding.\n// ECB enables the basic ECB 16-byte block algorithm. Both can be enabled simultaneously.\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n// The #ifndef-guard allows it to be configured before #include'ing or at compile time.\n#ifndef CBC\n#define CBC 1\n#endif\n\n#ifndef ECB\n#define ECB 1\n#endif\n\n\n\n#if defined(ECB) && ECB\n\nvoid AES128_ECB_encrypt(uint8_t* input, const uint8_t* key, uint8_t *output);\nvoid AES128_ECB_decrypt(uint8_t* input, const uint8_t* key, uint8_t *output);\n\n#endif // #if defined(ECB) && ECB\n\n\n#if defined(CBC) && CBC\n\nvoid AES128_CBC_encrypt_buffer(uint8_t* output, uint8_t* input, uint32_t length, const uint8_t* key, const uint8_t* iv);\nvoid AES128_CBC_decrypt_buffer(uint8_t* output, uint8_t* input, uint32_t length, const uint8_t* key, const uint8_t* iv);\n\n#endif // #if defined(CBC) && CBC\n\nvoid AES128_CTR_encrypt_buffer(uint8_t* input, uint32_t length, const uint8_t* key, uint8_t* iv, uint8_t* output);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif //_AES_H_\n"
  },
  {
    "path": "utils/encrypt/types.h",
    "content": "/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */\n\n#ifndef _UECC_TYPES_H_\n#define _UECC_TYPES_H_\n\n#ifndef uECC_PLATFORM\n    #if __AVR__\n        #define uECC_PLATFORM uECC_avr\n    #elif defined(__thumb2__) || defined(_M_ARMT) /* I think MSVC only supports Thumb-2 targets */\n        #define uECC_PLATFORM uECC_arm_thumb2\n    #elif defined(__thumb__)\n        #define uECC_PLATFORM uECC_arm_thumb\n    #elif defined(__arm__) || defined(_M_ARM)\n        #define uECC_PLATFORM uECC_arm\n    #elif defined(__aarch64__)\n        #define uECC_PLATFORM uECC_arm64\n    #elif defined(__i386__) || defined(_M_IX86) || defined(_X86_) || defined(__I86__)\n        #define uECC_PLATFORM uECC_x86\n    #elif defined(__amd64__) || defined(_M_X64)\n        #define uECC_PLATFORM uECC_x86_64\n    #else\n        #define uECC_PLATFORM uECC_arch_other\n    #endif\n#endif\n\n#ifndef uECC_ARM_USE_UMAAL\n    #if (uECC_PLATFORM == uECC_arm) && (__ARM_ARCH >= 6)\n        #define uECC_ARM_USE_UMAAL 1\n    #elif (uECC_PLATFORM == uECC_arm_thumb2) && (__ARM_ARCH >= 6) && !__ARM_ARCH_7M__\n        #define uECC_ARM_USE_UMAAL 1\n    #else\n        #define uECC_ARM_USE_UMAAL 0\n    #endif\n#endif\n\n#ifndef uECC_WORD_SIZE\n    #if uECC_PLATFORM == uECC_avr\n        #define uECC_WORD_SIZE 1\n    #elif (uECC_PLATFORM == uECC_x86_64 || uECC_PLATFORM == uECC_arm64)\n        #define uECC_WORD_SIZE 8\n    #else\n        #define uECC_WORD_SIZE 4\n    #endif\n#endif\n\n#if (uECC_WORD_SIZE != 1) && (uECC_WORD_SIZE != 4) && (uECC_WORD_SIZE != 8)\n    #error \"Unsupported value for uECC_WORD_SIZE\"\n#endif\n\n#if ((uECC_PLATFORM == uECC_avr) && (uECC_WORD_SIZE != 1))\n    #pragma message (\"uECC_WORD_SIZE must be 1 for AVR\")\n    #undef uECC_WORD_SIZE\n    #define uECC_WORD_SIZE 1\n#endif\n\n#if ((uECC_PLATFORM == uECC_arm || uECC_PLATFORM == uECC_arm_thumb || \\\n        uECC_PLATFORM ==  uECC_arm_thumb2) && \\\n     (uECC_WORD_SIZE != 4))\n    #pragma message (\"uECC_WORD_SIZE must be 4 for ARM\")\n    #undef uECC_WORD_SIZE\n    #define uECC_WORD_SIZE 4\n#endif\n\n#if defined(__SIZEOF_INT128__) || ((__clang_major__ * 100 + __clang_minor__) >= 302)\n    #define SUPPORTS_INT128 1\n#else\n    #define SUPPORTS_INT128 0\n#endif\n\ntypedef int8_t wordcount_t;\ntypedef int16_t bitcount_t;\ntypedef int8_t cmpresult_t;\n\n#if (uECC_WORD_SIZE == 1)\n\ntypedef uint8_t uECC_word_t;\ntypedef uint16_t uECC_dword_t;\n\n#define HIGH_BIT_SET 0x80\n#define uECC_WORD_BITS 8\n#define uECC_WORD_BITS_SHIFT 3\n#define uECC_WORD_BITS_MASK 0x07\n\n#elif (uECC_WORD_SIZE == 4)\n\ntypedef uint32_t uECC_word_t;\ntypedef uint64_t uECC_dword_t;\n\n#define HIGH_BIT_SET 0x80000000\n#define uECC_WORD_BITS 32\n#define uECC_WORD_BITS_SHIFT 5\n#define uECC_WORD_BITS_MASK 0x01F\n\n#elif (uECC_WORD_SIZE == 8)\n\ntypedef uint64_t uECC_word_t;\n#if SUPPORTS_INT128\ntypedef unsigned __int128 uECC_dword_t;\n#endif\n\n#define HIGH_BIT_SET 0x8000000000000000ull\n#define uECC_WORD_BITS 64\n#define uECC_WORD_BITS_SHIFT 6\n#define uECC_WORD_BITS_MASK 0x03F\n\n#endif /* uECC_WORD_SIZE */\n\n#endif /* _UECC_TYPES_H_ */\n"
  },
  {
    "path": "utils/encrypt/uECC.h",
    "content": "/* Copyright 2014, Kenneth MacKay. Licensed under the BSD 2-clause license. */\n\n#ifndef _UECC_H_\n#define _UECC_H_\n\n#include \n\n/* Platform selection options.\nIf uECC_PLATFORM is not defined, the code will try to guess it based on compiler macros.\nPossible values for uECC_PLATFORM are defined below: */\n#define uECC_arch_other 0\n#define uECC_x86        1\n#define uECC_x86_64     2\n#define uECC_arm        3\n#define uECC_arm_thumb  4\n#define uECC_arm_thumb2 5\n#define uECC_arm64      6\n#define uECC_avr        7\n\n/* If desired, you can define uECC_WORD_SIZE as appropriate for your platform (1, 4, or 8 bytes).\nIf uECC_WORD_SIZE is not explicitly defined then it will be automatically set based on your\nplatform. */\n\n/* Optimization level; trade speed for code size.\n   Larger values produce code that is faster but larger.\n   Currently supported values are 0 - 4; 0 is unusably slow for most applications.\n   Optimization level 4 currently only has an effect ARM platforms where more than one\n   curve is enabled. */\n#ifndef uECC_OPTIMIZATION_LEVEL\n    #define uECC_OPTIMIZATION_LEVEL 2\n#endif\n\n/* uECC_SQUARE_FUNC - If enabled (defined as nonzero), this will cause a specific function to be\nused for (scalar) squaring instead of the generic multiplication function. This can make things\nfaster somewhat faster, but increases the code size. */\n#ifndef uECC_SQUARE_FUNC\n    #define uECC_SQUARE_FUNC 0\n#endif\n\n/* uECC_VLI_NATIVE_LITTLE_ENDIAN - If enabled (defined as nonzero), this will switch to native\nlittle-endian format for *all* arrays passed in and out of the public API. This includes public \nand private keys, shared secrets, signatures and message hashes. \nUsing this switch reduces the amount of call stack memory used by uECC, since less intermediate\ntranslations are required. \nNote that this will *only* work on native little-endian processors and it will treat the uint8_t\narrays passed into the public API as word arrays, therefore requiring the provided byte arrays \nto be word aligned on architectures that do not support unaligned accesses.\nIMPORTANT: Keys and signatures generated with uECC_VLI_NATIVE_LITTLE_ENDIAN=1 are incompatible\nwith keys and signatures generated with uECC_VLI_NATIVE_LITTLE_ENDIAN=0; all parties must use\nthe same endianness. */\n#ifndef uECC_VLI_NATIVE_LITTLE_ENDIAN\n    #define uECC_VLI_NATIVE_LITTLE_ENDIAN 0\n#endif\n\n/* Curve support selection. Set to 0 to remove that curve. */\n#ifndef uECC_SUPPORTS_secp160r1\n    #define uECC_SUPPORTS_secp160r1 1\n#endif\n#ifndef uECC_SUPPORTS_secp192r1\n    #define uECC_SUPPORTS_secp192r1 1\n#endif\n#ifndef uECC_SUPPORTS_secp224r1\n    #define uECC_SUPPORTS_secp224r1 1\n#endif\n#ifndef uECC_SUPPORTS_secp256r1\n    #define uECC_SUPPORTS_secp256r1 1\n#endif\n#ifndef uECC_SUPPORTS_secp256k1\n    #define uECC_SUPPORTS_secp256k1 1\n#endif\n\n/* Specifies whether compressed point format is supported.\n   Set to 0 to disable point compression/decompression functions. */\n#ifndef uECC_SUPPORT_COMPRESSED_POINT\n    #define uECC_SUPPORT_COMPRESSED_POINT 1\n#endif\n\nstruct uECC_Curve_t;\ntypedef const struct uECC_Curve_t * uECC_Curve;\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\n#if uECC_SUPPORTS_secp160r1\nuECC_Curve uECC_secp160r1(void);\n#endif\n#if uECC_SUPPORTS_secp192r1\nuECC_Curve uECC_secp192r1(void);\n#endif\n#if uECC_SUPPORTS_secp224r1\nuECC_Curve uECC_secp224r1(void);\n#endif\n#if uECC_SUPPORTS_secp256r1\nuECC_Curve uECC_secp256r1(void);\n#endif\n#if uECC_SUPPORTS_secp256k1\nuECC_Curve uECC_secp256k1(void);\n#endif\n\n/* uECC_RNG_Function type\nThe RNG function should fill 'size' random bytes into 'dest'. It should return 1 if\n'dest' was filled with random data, or 0 if the random data could not be generated.\nThe filled-in values should be either truly random, or from a cryptographically-secure PRNG.\n\nA correctly functioning RNG function must be set (using uECC_set_rng()) before calling\nuECC_make_key() or uECC_sign().\n\nSetting a correctly functioning RNG function improves the resistance to side-channel attacks\nfor uECC_shared_secret() and uECC_sign_deterministic().\n\nA correct RNG function is set by default when building for Windows, Linux, or OS X.\nIf you are building on another POSIX-compliant system that supports /dev/random or /dev/urandom,\nyou can define uECC_POSIX to use the predefined RNG. For embedded platforms there is no predefined\nRNG function; you must provide your own.\n*/\ntypedef int (*uECC_RNG_Function)(uint8_t *dest, unsigned size);\n\n/* uECC_set_rng() function.\nSet the function that will be used to generate random bytes. The RNG function should\nreturn 1 if the random data was generated, or 0 if the random data could not be generated.\n\nOn platforms where there is no predefined RNG function (eg embedded platforms), this must\nbe called before uECC_make_key() or uECC_sign() are used.\n\nInputs:\n    rng_function - The function that will be used to generate random bytes.\n*/\nvoid uECC_set_rng(uECC_RNG_Function rng_function);\n\n/* uECC_get_rng() function.\n\nReturns the function that will be used to generate random bytes.\n*/\nuECC_RNG_Function uECC_get_rng(void);\n\n/* uECC_curve_private_key_size() function.\n\nReturns the size of a private key for the curve in bytes.\n*/\nint uECC_curve_private_key_size(uECC_Curve curve);\n\n/* uECC_curve_public_key_size() function.\n\nReturns the size of a public key for the curve in bytes.\n*/\nint uECC_curve_public_key_size(uECC_Curve curve);\n\n/* uECC_make_key() function.\nCreate a public/private key pair.\n\nOutputs:\n    public_key  - Will be filled in with the public key. Must be at least 2 * the curve size\n                  (in bytes) long. For example, if the curve is secp256r1, public_key must be 64\n                  bytes long.\n    private_key - Will be filled in with the private key. Must be as long as the curve order; this\n                  is typically the same as the curve size, except for secp160r1. For example, if the\n                  curve is secp256r1, private_key must be 32 bytes long.\n\n                  For secp160r1, private_key must be 21 bytes long! Note that the first byte will\n                  almost always be 0 (there is about a 1 in 2^80 chance of it being non-zero).\n\nReturns 1 if the key pair was generated successfully, 0 if an error occurred.\n*/\nint uECC_make_key(uint8_t *public_key, uint8_t *private_key, uECC_Curve curve);\n\n/* uECC_shared_secret() function.\nCompute a shared secret given your secret key and someone else's public key.\nNote: It is recommended that you hash the result of uECC_shared_secret() before using it for\nsymmetric encryption or HMAC.\n\nInputs:\n    public_key  - The public key of the remote party.\n    private_key - Your private key.\n\nOutputs:\n    secret - Will be filled in with the shared secret value. Must be the same size as the\n             curve size; for example, if the curve is secp256r1, secret must be 32 bytes long.\n\nReturns 1 if the shared secret was generated successfully, 0 if an error occurred.\n*/\nint uECC_shared_secret(const uint8_t *public_key,\n                       const uint8_t *private_key,\n                       uint8_t *secret,\n                       uECC_Curve curve);\n\n#if uECC_SUPPORT_COMPRESSED_POINT\n/* uECC_compress() function.\nCompress a public key.\n\nInputs:\n    public_key - The public key to compress.\n\nOutputs:\n    compressed - Will be filled in with the compressed public key. Must be at least\n                 (curve size + 1) bytes long; for example, if the curve is secp256r1,\n                 compressed must be 33 bytes long.\n*/\nvoid uECC_compress(const uint8_t *public_key, uint8_t *compressed, uECC_Curve curve);\n\n/* uECC_decompress() function.\nDecompress a compressed public key.\n\nInputs:\n    compressed - The compressed public key.\n\nOutputs:\n    public_key - Will be filled in with the decompressed public key.\n*/\nvoid uECC_decompress(const uint8_t *compressed, uint8_t *public_key, uECC_Curve curve);\n#endif /* uECC_SUPPORT_COMPRESSED_POINT */\n\n/* uECC_valid_public_key() function.\nCheck to see if a public key is valid.\n\nNote that you are not required to check for a valid public key before using any other uECC\nfunctions. However, you may wish to avoid spending CPU time computing a shared secret or\nverifying a signature using an invalid public key.\n\nInputs:\n    public_key - The public key to check.\n\nReturns 1 if the public key is valid, 0 if it is invalid.\n*/\nint uECC_valid_public_key(const uint8_t *public_key, uECC_Curve curve);\n\n/* uECC_compute_public_key() function.\nCompute the corresponding public key for a private key.\n\nInputs:\n    private_key - The private key to compute the public key for\n\nOutputs:\n    public_key - Will be filled in with the corresponding public key\n\nReturns 1 if the key was computed successfully, 0 if an error occurred.\n*/\nint uECC_compute_public_key(const uint8_t *private_key, uint8_t *public_key, uECC_Curve curve);\n\n/* uECC_sign() function.\nGenerate an ECDSA signature for a given hash value.\n\nUsage: Compute a hash of the data you wish to sign (SHA-2 is recommended) and pass it in to\nthis function along with your private key.\n\nInputs:\n    private_key  - Your private key.\n    message_hash - The hash of the message to sign.\n    hash_size    - The size of message_hash in bytes.\n\nOutputs:\n    signature - Will be filled in with the signature value. Must be at least 2 * curve size long.\n                For example, if the curve is secp256r1, signature must be 64 bytes long.\n\nReturns 1 if the signature generated successfully, 0 if an error occurred.\n*/\nint uECC_sign(const uint8_t *private_key,\n              const uint8_t *message_hash,\n              unsigned hash_size,\n              uint8_t *signature,\n              uECC_Curve curve);\n\n/* uECC_HashContext structure.\nThis is used to pass in an arbitrary hash function to uECC_sign_deterministic().\nThe structure will be used for multiple hash computations; each time a new hash\nis computed, init_hash() will be called, followed by one or more calls to\nupdate_hash(), and finally a call to finish_hash() to produce the resulting hash.\n\nThe intention is that you will create a structure that includes uECC_HashContext\nfollowed by any hash-specific data. For example:\n\ntypedef struct SHA256_HashContext {\n    uECC_HashContext uECC;\n    SHA256_CTX ctx;\n} SHA256_HashContext;\n\nvoid init_SHA256(uECC_HashContext *base) {\n    SHA256_HashContext *context = (SHA256_HashContext *)base;\n    SHA256_Init(&context->ctx);\n}\n\nvoid update_SHA256(uECC_HashContext *base,\n                   const uint8_t *message,\n                   unsigned message_size) {\n    SHA256_HashContext *context = (SHA256_HashContext *)base;\n    SHA256_Update(&context->ctx, message, message_size);\n}\n\nvoid finish_SHA256(uECC_HashContext *base, uint8_t *hash_result) {\n    SHA256_HashContext *context = (SHA256_HashContext *)base;\n    SHA256_Final(hash_result, &context->ctx);\n}\n\n... when signing ...\n{\n    uint8_t tmp[32 + 32 + 64];\n    SHA256_HashContext ctx = {{&init_SHA256, &update_SHA256, &finish_SHA256, 64, 32, tmp}};\n    uECC_sign_deterministic(key, message_hash, &ctx.uECC, signature);\n}\n*/\ntypedef struct uECC_HashContext {\n    void (*init_hash)(const struct uECC_HashContext *context);\n    void (*update_hash)(const struct uECC_HashContext *context,\n                        const uint8_t *message,\n                        unsigned message_size);\n    void (*finish_hash)(const struct uECC_HashContext *context, uint8_t *hash_result);\n    unsigned block_size; /* Hash function block size in bytes, eg 64 for SHA-256. */\n    unsigned result_size; /* Hash function result size in bytes, eg 32 for SHA-256. */\n    uint8_t *tmp; /* Must point to a buffer of at least (2 * result_size + block_size) bytes. */\n} uECC_HashContext;\n\n/* uECC_sign_deterministic() function.\nGenerate an ECDSA signature for a given hash value, using a deterministic algorithm\n(see RFC 6979). You do not need to set the RNG using uECC_set_rng() before calling\nthis function; however, if the RNG is defined it will improve resistance to side-channel\nattacks.\n\nUsage: Compute a hash of the data you wish to sign (SHA-2 is recommended) and pass it to\nthis function along with your private key and a hash context. Note that the message_hash\ndoes not need to be computed with the same hash function used by hash_context.\n\nInputs:\n    private_key  - Your private key.\n    message_hash - The hash of the message to sign.\n    hash_size    - The size of message_hash in bytes.\n    hash_context - A hash context to use.\n\nOutputs:\n    signature - Will be filled in with the signature value.\n\nReturns 1 if the signature generated successfully, 0 if an error occurred.\n*/\nint uECC_sign_deterministic(const uint8_t *private_key,\n                            const uint8_t *message_hash,\n                            unsigned hash_size,\n                            const uECC_HashContext *hash_context,\n                            uint8_t *signature,\n                            uECC_Curve curve);\n\n/* uECC_verify() function.\nVerify an ECDSA signature.\n\nUsage: Compute the hash of the signed data using the same hash as the signer and\npass it to this function along with the signer's public key and the signature values (r and s).\n\nInputs:\n    public_key   - The signer's public key.\n    message_hash - The hash of the signed data.\n    hash_size    - The size of message_hash in bytes.\n    signature    - The signature value.\n\nReturns 1 if the signature is valid, 0 if it is invalid.\n*/\nint uECC_verify(const uint8_t *public_key,\n                const uint8_t *message_hash,\n                unsigned hash_size,\n                const uint8_t *signature,\n                uECC_Curve curve);\n\n#ifdef __cplusplus\n} /* end of extern \"C\" */\n#endif\n\n#endif /* _UECC_H_ */\n"
  },
  {
    "path": "utils/encrypt/uECC_vli.h",
    "content": "/* Copyright 2015, Kenneth MacKay. Licensed under the BSD 2-clause license. */\n\n#ifndef _UECC_VLI_H_\n#define _UECC_VLI_H_\n\n#include \"uECC.h\"\n#include \"types.h\"\n\n/* Functions for raw large-integer manipulation. These are only available\n   if uECC.c is compiled with uECC_ENABLE_VLI_API defined to 1. */\n#ifndef uECC_ENABLE_VLI_API\n    #define uECC_ENABLE_VLI_API 0\n#endif\n\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif\n\n#if uECC_ENABLE_VLI_API\n\nvoid uECC_vli_clear(uECC_word_t *vli, wordcount_t num_words);\n\n/* Constant-time comparison to zero - secure way to compare long integers */\n/* Returns 1 if vli == 0, 0 otherwise. */\nuECC_word_t uECC_vli_isZero(const uECC_word_t *vli, wordcount_t num_words);\n\n/* Returns nonzero if bit 'bit' of vli is set. */\nuECC_word_t uECC_vli_testBit(const uECC_word_t *vli, bitcount_t bit);\n\n/* Counts the number of bits required to represent vli. */\nbitcount_t uECC_vli_numBits(const uECC_word_t *vli, const wordcount_t max_words);\n\n/* Sets dest = src. */\nvoid uECC_vli_set(uECC_word_t *dest, const uECC_word_t *src, wordcount_t num_words);\n\n/* Constant-time comparison function - secure way to compare long integers */\n/* Returns one if left == right, zero otherwise */\nuECC_word_t uECC_vli_equal(const uECC_word_t *left,\n                           const uECC_word_t *right,\n                           wordcount_t num_words);\n\n/* Constant-time comparison function - secure way to compare long integers */\n/* Returns sign of left - right, in constant time. */\ncmpresult_t uECC_vli_cmp(const uECC_word_t *left, const uECC_word_t *right, wordcount_t num_words);\n\n/* Computes vli = vli >> 1. */\nvoid uECC_vli_rshift1(uECC_word_t *vli, wordcount_t num_words);\n\n/* Computes result = left + right, returning carry. Can modify in place. */\nuECC_word_t uECC_vli_add(uECC_word_t *result,\n                         const uECC_word_t *left,\n                         const uECC_word_t *right,\n                         wordcount_t num_words);\n\n/* Computes result = left - right, returning borrow. Can modify in place. */\nuECC_word_t uECC_vli_sub(uECC_word_t *result,\n                         const uECC_word_t *left,\n                         const uECC_word_t *right,\n                         wordcount_t num_words);\n\n/* Computes result = left * right. Result must be 2 * num_words long. */\nvoid uECC_vli_mult(uECC_word_t *result,\n                   const uECC_word_t *left,\n                   const uECC_word_t *right,\n                   wordcount_t num_words);\n\n/* Computes result = left^2. Result must be 2 * num_words long. */\nvoid uECC_vli_square(uECC_word_t *result, const uECC_word_t *left, wordcount_t num_words);\n\n/* Computes result = (left + right) % mod.\n   Assumes that left < mod and right < mod, and that result does not overlap mod. */\nvoid uECC_vli_modAdd(uECC_word_t *result,\n                     const uECC_word_t *left,\n                     const uECC_word_t *right,\n                     const uECC_word_t *mod,\n                     wordcount_t num_words);\n\n/* Computes result = (left - right) % mod.\n   Assumes that left < mod and right < mod, and that result does not overlap mod. */\nvoid uECC_vli_modSub(uECC_word_t *result,\n                     const uECC_word_t *left,\n                     const uECC_word_t *right,\n                     const uECC_word_t *mod,\n                     wordcount_t num_words);\n\n/* Computes result = product % mod, where product is 2N words long.\n   Currently only designed to work for mod == curve->p or curve_n. */\nvoid uECC_vli_mmod(uECC_word_t *result,\n                   uECC_word_t *product,\n                   const uECC_word_t *mod,\n                   wordcount_t num_words);\n\n/* Calculates result = product (mod curve->p), where product is up to\n   2 * curve->num_words long. */\nvoid uECC_vli_mmod_fast(uECC_word_t *result, uECC_word_t *product, uECC_Curve curve);\n\n/* Computes result = (left * right) % mod.\n   Currently only designed to work for mod == curve->p or curve_n. */\nvoid uECC_vli_modMult(uECC_word_t *result,\n                      const uECC_word_t *left,\n                      const uECC_word_t *right,\n                      const uECC_word_t *mod,\n                      wordcount_t num_words);\n\n/* Computes result = (left * right) % curve->p. */\nvoid uECC_vli_modMult_fast(uECC_word_t *result,\n                           const uECC_word_t *left,\n                           const uECC_word_t *right,\n                           uECC_Curve curve);\n\n/* Computes result = left^2 % mod.\n   Currently only designed to work for mod == curve->p or curve_n. */\nvoid uECC_vli_modSquare(uECC_word_t *result,\n                        const uECC_word_t *left,\n                        const uECC_word_t *mod,\n                        wordcount_t num_words);\n\n/* Computes result = left^2 % curve->p. */\nvoid uECC_vli_modSquare_fast(uECC_word_t *result, const uECC_word_t *left, uECC_Curve curve);\n\n/* Computes result = (1 / input) % mod.*/\nvoid uECC_vli_modInv(uECC_word_t *result,\n                     const uECC_word_t *input,\n                     const uECC_word_t *mod,\n                     wordcount_t num_words);\n\n#if uECC_SUPPORT_COMPRESSED_POINT\n/* Calculates a = sqrt(a) (mod curve->p) */\nvoid uECC_vli_mod_sqrt(uECC_word_t *a, uECC_Curve curve);\n#endif\n\n/* Converts an integer in uECC native format to big-endian bytes. */\nvoid uECC_vli_nativeToBytes(uint8_t *bytes, int num_bytes, const uECC_word_t *native);\n/* Converts big-endian bytes to an integer in uECC native format. */\nvoid uECC_vli_bytesToNative(uECC_word_t *native, const uint8_t *bytes, int num_bytes);\n\nunsigned uECC_curve_num_words(uECC_Curve curve);\nunsigned uECC_curve_num_bytes(uECC_Curve curve);\nunsigned uECC_curve_num_bits(uECC_Curve curve);\nunsigned uECC_curve_num_n_words(uECC_Curve curve);\nunsigned uECC_curve_num_n_bytes(uECC_Curve curve);\nunsigned uECC_curve_num_n_bits(uECC_Curve curve);\n\nconst uECC_word_t *uECC_curve_p(uECC_Curve curve);\nconst uECC_word_t *uECC_curve_n(uECC_Curve curve);\nconst uECC_word_t *uECC_curve_G(uECC_Curve curve);\nconst uECC_word_t *uECC_curve_b(uECC_Curve curve);\n\nint uECC_valid_point(const uECC_word_t *point, uECC_Curve curve);\n\n/* Multiplies a point by a scalar. Points are represented by the X coordinate followed by\n   the Y coordinate in the same array, both coordinates are curve->num_words long. Note\n   that scalar must be curve->num_n_words long (NOT curve->num_words). */\nvoid uECC_point_mult(uECC_word_t *result,\n                     const uECC_word_t *point,\n                     const uECC_word_t *scalar,\n                     uECC_Curve curve);\n\n/* Generates a random integer in the range 0 < random < top.\n   Both random and top have num_words words. */\nint uECC_generate_random_int(uECC_word_t *random,\n                             const uECC_word_t *top,\n                             wordcount_t num_words);\n\n#endif /* uECC_ENABLE_VLI_API */\n\n#ifdef __cplusplus\n} /* end of extern \"C\" */\n#endif\n\n#endif /* _UECC_VLI_H_ */\n"
  },
  {
    "path": "utils/heap/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-Iplatform/cmsis/inc/ \\\n\n"
  },
  {
    "path": "utils/heap/heap_api.c",
    "content": "#include \"heap_api.h\"\n#include \"hal_trace.h\"\n#include \"multi_heap.h\"\n#include \"string.h\"\n\n// #define HEAP_API_DEBUG\n\n#if 0\nextern uint32_t __HeapBase;\nextern uint32_t  __HeapLimit;\nstatic heap_handle_t global_heap = NULL;\n\nvoid *malloc(size_t size)\n{\n    if (global_heap == NULL)\n        global_heap = heap_register((void *)&__HeapBase,(&__HeapLimit - &__HeapBase));\n    return heap_malloc(global_heap,size);\n}\n\nvoid free(void *ptr)\n{\n    heap_free(global_heap,ptr);\n}\n\nvoid *calloc(size_t nmemb, size_t size)\n{\n    void *ptr = malloc(nmemb*size);\n    if (ptr != NULL)\n        memset(ptr,0,nmemb*size);\n    return ptr;\n}\nvoid *realloc(void *ptr, size_t size)\n{\n    return heap_realloc(global_heap,ptr,size);\n}\n#endif\n\n// TODO: multi heap and block\n#define MED_HEAP_BLOCK_MAX_NUM (3)\nstatic int g_block_index = 0;\nstatic int g_switch_cp = 0;\n// NOTE: Can use g_med_heap_begin_addr and g_med_heap_size to optimize free\n// speed static void *g_med_heap_begin_addr[MED_HEAP_BLOCK_MAX_NUM]; static\n// size_t g_med_heap_size[MED_HEAP_BLOCK_MAX_NUM];\n\nstatic heap_handle_t g_med_heap[MED_HEAP_BLOCK_MAX_NUM];\nstatic heap_handle_t g_cp_heap;\n\nvoid heap_memory_info(heap_handle_t heap, size_t *total, size_t *used,\n                      size_t *max_used) {\n  multi_heap_info_t info;\n  heap_get_info(heap, &info);\n\n  if (total != NULL)\n    *total = info.total_bytes;\n\n  if (used != NULL)\n    *used = info.total_allocated_bytes;\n\n  if (max_used != NULL)\n    *max_used = info.total_bytes - info.minimum_free_bytes;\n}\n\nstatic int med_help_get_index(void *ptr) {\n  int index = 0;\n  int diff_addr = 0;\n  multi_heap_info_t info;\n\n  for (index = 0; index < g_block_index; index++) {\n    heap_get_info(g_med_heap[index], &info);\n    diff_addr = (char *)ptr - (char *)g_med_heap[index];\n\n#ifdef HEAP_API_DEBUG\n    TRACE(3, \"[%s] index = %d, diff_addr = %d\", __func__, index, diff_addr);\n#endif\n\n    if ((diff_addr > 0) && (diff_addr < info.total_bytes)) {\n      break;\n    }\n  }\n\n  ASSERT(index < g_block_index, \"[%s] Can not find ptr = %p\", __func__, ptr);\n\n  return index;\n}\n\nstatic void med_heap_reset(void) {\n  g_block_index = 0;\n  g_switch_cp = 0;\n\n  for (int i = 0; i < MED_HEAP_BLOCK_MAX_NUM; i++) {\n    // g_med_heap_begin_addr[i] = NULL;\n    // g_med_heap_size[i] = NULL;\n    g_med_heap[i] = NULL;\n  }\n  g_cp_heap = NULL;\n}\n\nvoid med_heap_set_cp(int switch_cp) {\n  TRACE(2, \"[%s] switch_cp: %d\", __func__, switch_cp);\n  g_switch_cp = switch_cp;\n}\n\nvoid med_heap_add_block(void *begin_addr, size_t size) {\n  TRACE(4, \"[%s] g_block_index = %d, begin_addr = %p, size = %d\", __func__,\n        g_block_index, begin_addr, size);\n  ASSERT(g_block_index < MED_HEAP_BLOCK_MAX_NUM,\n         \"[%s] g_block_index(%d) >= MED_HEAP_BLOCK_MAX_NUM\", __func__,\n         g_block_index);\n\n  memset(begin_addr, 0, size);\n  if (g_switch_cp) {\n    g_cp_heap = heap_register(begin_addr, size);\n  } else {\n    g_med_heap[g_block_index] = heap_register(begin_addr, size);\n    // g_med_heap_begin_addr[g_block_index] = begin_addr;\n    // g_med_heap_size[g_block_index] = size;\n\n    g_block_index++;\n  }\n}\n\nvoid med_heap_init(void *begin_addr, size_t size) {\n  med_heap_reset();\n  med_heap_add_block(begin_addr, size);\n}\n\nvoid *med_malloc(size_t size) {\n  int index = 0;\n  void *ptr = NULL;\n\n  if (size == 0)\n    return NULL;\n\n  if (g_switch_cp) {\n    ptr = heap_malloc(g_cp_heap, size);\n    goto exit;\n  }\n\n  for (index = 0; index < g_block_index; index++) {\n    if (multi_heap_free_size(g_med_heap[index]) >= size) {\n      break;\n    }\n  }\n\n#ifdef HEAP_API_DEBUG\n  TRACE(3, \"[%s] index = %d, size = %d\", __func__, index, size);\n#endif\n\n  ASSERT(index < g_block_index,\n         \"[%s] index = %d, g_block_index = %d. Can not malloc any RAM\",\n         __func__, index, g_block_index);\n\n  ptr = heap_malloc(g_med_heap[index], size);\n\nexit:\n  ASSERT(ptr != NULL, \"[%s]: no memory, needed size %d\", __FUNCTION__, size);\n\n  return ptr;\n}\n\nvoid med_free(void *p) {\n  if (p) {\n    if (g_switch_cp) {\n      heap_free(g_cp_heap, p);\n    } else {\n      int index = med_help_get_index(p);\n      heap_free(g_med_heap[index], p);\n    }\n\n    p = NULL;\n  }\n}\n\nvoid *med_calloc(size_t nmemb, size_t size) {\n  if (size == 0)\n    return NULL;\n\n  void *ptr = med_malloc(nmemb * size);\n\n  if (ptr) {\n    memset(ptr, 0, nmemb * size);\n  }\n\n  return ptr;\n}\n\nvoid *med_realloc(void *ptr, size_t size) {\n  // TODO: Do not support multi blocks\n  // TODO: Do not support cp\n  void *newptr = heap_realloc(g_med_heap[0], ptr, size);\n\n  ASSERT(newptr != NULL, \"[%s]: no memory, needed size %d\", __FUNCTION__, size);\n\n  return newptr;\n}\n\nvoid med_memory_info(size_t *total, size_t *used, size_t *max_used) {\n  size_t _total = 0;\n  size_t _used = 0;\n  size_t _max_used = 0;\n\n  for (int i = 0; i < g_block_index; i++) {\n    heap_memory_info(g_med_heap[i], &_total, &_used, &_max_used);\n    *total += _total;\n    *used += _used;\n    *max_used += _max_used;\n\n#ifdef HEAP_API_DEBUG\n    TRACE(4, \"[%s] %d: g_med_heap = %p, size = %d\", __func__, i, g_med_heap[i],\n          _total);\n#endif\n  }\n}\n"
  },
  {
    "path": "utils/heap/heap_api.h",
    "content": "#ifndef __HEAP_API__\n#define __HEAP_API__\n#include \"stdint.h\"\n#include \"string.h\"\n#include \"multi_heap.h\"\n#include \"plat_types.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#define SYSPOOL_PURE __attribute__((__const__))\n\nvoid syspool_init(void);\nvoid syspool_init_specific_size(uint32_t size);\nint syspool_free_size(void);\nint syspool_get_buff(uint8_t **buff, uint32_t size);\nint syspool_get_available(uint8_t **buff);\nuint8_t* syspool_start_addr(void) SYSPOOL_PURE;\nuint32_t syspool_total_size(void);\nuint32_t syspool_original_size(void) SYSPOOL_PURE;\n\n#if defined(A2DP_LDAC_ON)\nint syspool_force_used_size(uint32_t size);\n#endif\n\n#define heap_malloc multi_heap_malloc\n\n#define heap_free multi_heap_free\n\n#define heap_realloc multi_heap_realloc\n\n#define heap_get_allocated_size multi_heap_get_allocated_size\n\n#define heap_register multi_heap_register\n\n#define heap_free_size multi_heap_free_size\n\n#define heap_minimum_free_size multi_heap_minimum_free_size\n\n#define heap_get_info multi_heap_get_info\n\n#define heap_dump multi_heap_dump\n\n#define heap_check multi_heap_check\n\ntypedef struct multi_heap_info *heap_handle_t;\nheap_handle_t heap_register(void *start, size_t size);\nvoid *heap_malloc(heap_handle_t heap, size_t size);\nvoid heap_free(heap_handle_t heap, void *p);\nvoid *heap_realloc(heap_handle_t heap, void *p, size_t size);\nsize_t heap_get_allocated_size(heap_handle_t heap, void *p);\nvoid heap_set_lock(heap_handle_t heap, void* lock);\nvoid heap_dump(heap_handle_t heap);\nbool heap_check(heap_handle_t heap, bool print_errors);\nsize_t heap_free_size(heap_handle_t heap);\nsize_t heap_minimum_free_size(heap_handle_t heap);\nvoid heap_get_info(heap_handle_t heap, multi_heap_info_t *info);\nvoid heap_memory_info(heap_handle_t heap,\n                    size_t *total,\n                    size_t *used,\n                    size_t *max_used);\n\n#if 0\nvoid *malloc(size_t size);\nvoid free(void *p);\nvoid *calloc(size_t nmemb, size_t size);\nvoid *realloc(void *ptr, size_t size);\n#endif\nvoid med_heap_init(void *begin_addr, size_t size);\nvoid med_heap_set_cp(int switch_cp);\nvoid med_heap_add_block(void *begin_addr, size_t size);\nvoid *med_malloc(size_t size);\nvoid med_free(void *p);\nvoid *med_calloc(size_t nmemb, size_t size);\nvoid *med_realloc(void *ptr, size_t size);\nvoid med_memory_info(size_t *total,\n                    size_t *used,\n                    size_t *max_used);\n\n#ifdef __cplusplus\n}\n#endif\n#endif\n"
  },
  {
    "path": "utils/heap/med_memory.h",
    "content": "#include \"heap_api.h\"\n"
  },
  {
    "path": "utils/heap/multi_heap.c",
    "content": "// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD\n//\n// Licensed under the Apache License, Version 2.0 (the \"License\");\n// you may not use this file except in compliance with the License.\n// You may obtain a copy of the License at\n//\n//     http://www.apache.org/licenses/LICENSE-2.0\n//\n// Unless required by applicable law or agreed to in writing, software\n// distributed under the License is distributed on an \"AS IS\" BASIS,\n// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n// See the License for the specific language governing permissions and\n// limitations under the License.\n#include \"hal_trace.h\"\n#include \"multi_heap_internal.h\"\n#include \n#include \n#include \n#include \n#include \n#include \n#include \n#include \n\n/* Note: Keep platform-specific parts in this header, this source\n   file should depend on libc only */\n#include \"multi_heap_platform.h\"\n\n#ifndef MULTI_HEAP_POISONING\n/* if no heap poisoning, public API aliases directly to these implementations */\nvoid *multi_heap_malloc(multi_heap_handle_t heap, size_t size)\n    __attribute__((alias(\"multi_heap_malloc_impl\")));\n\nvoid multi_heap_free(multi_heap_handle_t heap, void *p)\n    __attribute__((alias(\"multi_heap_free_impl\")));\n\nvoid *multi_heap_realloc(multi_heap_handle_t heap, void *p, size_t size)\n    __attribute__((alias(\"multi_heap_realloc_impl\")));\n\nsize_t multi_heap_get_allocated_size(multi_heap_handle_t heap, void *p)\n    __attribute__((alias(\"multi_heap_get_allocated_size_impl\")));\n\nmulti_heap_handle_t multi_heap_register(void *start, size_t size)\n    __attribute__((alias(\"multi_heap_register_impl\")));\n\nvoid multi_heap_get_info(multi_heap_handle_t heap, multi_heap_info_t *info)\n    __attribute__((alias(\"multi_heap_get_info_impl\")));\n\nsize_t multi_heap_free_size(multi_heap_handle_t heap)\n    __attribute__((alias(\"multi_heap_free_size_impl\")));\n\nsize_t multi_heap_minimum_free_size(multi_heap_handle_t heap)\n    __attribute__((alias(\"multi_heap_minimum_free_size_impl\")));\n\nvoid *multi_heap_get_block_address(multi_heap_block_handle_t block)\n    __attribute__((alias(\"multi_heap_get_block_address_impl\")));\n\nvoid *multi_heap_get_block_owner(multi_heap_block_handle_t block) {\n  return NULL;\n}\n\n#endif\n\n#define HEAP_ALIGN(X) ((X) & ~(sizeof(void *) - 1))\n#define HEAP_ALIGN_UP(X) HEAP_ALIGN((X) + sizeof(void *) - 1)\n\nstruct heap_block;\n\n/* Block in the heap\n\n   Heap implementation uses two single linked lists, a block list (all blocks)\n   and a free list (free blocks).\n\n   'header' holds a pointer to the next block (used or free) ORed with a free\n   flag (the LSB of the pointer.) is_free() and get_next_block() utility\n   functions allow typed access to these values.\n\n   'next_free' is valid if the block is free and is a pointer to the next block\n   in the free list.\n*/\ntypedef struct heap_block {\n  intptr_t header; /* Encodes next block in heap (used or unused) and also\n                      free/used flag */\n  union {\n    uint8_t data[1]; /* First byte of data, valid if block is used. Actual size\n                        of data is 'block_data_size(block)' */\n    struct heap_block\n        *next_free; /* Pointer to next free block, valid if block is free */\n  };\n} heap_block_t;\n\n/* These masks apply to the 'header' field of heap_block_t */\n#define BLOCK_FREE_FLAG                                                        \\\n  0x1 /* If set, this block is free & next_free pointer is valid */\n#define NEXT_BLOCK_MASK                                                        \\\n  (~3) /* AND header with this mask to get pointer to next block (free or      \\\n          used) */\n\n/* Metadata header for the heap, stored at the beginning of heap space.\n\n   'first_block' is a \"fake\" first block, minimum length, used to provide a\n   pointer to the first used & free block in the heap. This block is never\n   allocated or merged into an adjacent block.\n\n   'last_block' is a pointer to a final free block of length 0, which is added\n   at the end of the heap when it is registered. This block is also never\n   allocated or merged into an adjacent block.\n */\ntypedef struct multi_heap_info {\n  void *lock;\n  size_t total_bytes;\n  size_t free_bytes;\n  size_t minimum_free_bytes;\n  heap_block_t *last_block;\n  heap_block_t first_block; /* initial 'free block', never allocated */\n#if defined(MULTI_HEAP_DEFAULT_INT_LOCK)\n  size_t int_lock;\n#endif\n} heap_t;\n\n/* Given a pointer to the 'data' field of a block (ie the previous\n   malloc/realloc result), return a pointer to the containing block.\n*/\nstatic inline heap_block_t *get_block(const void *data_ptr) {\n  return (heap_block_t *)((char *)data_ptr - offsetof(heap_block_t, data));\n}\n\n/* Return the next sequential block in the heap.\n */\nstatic inline heap_block_t *get_next_block(const heap_block_t *block) {\n  intptr_t next = block->header & NEXT_BLOCK_MASK;\n  if (next == 0) {\n    return NULL; /* last_block */\n  }\n  assert(next > (intptr_t)block);\n  return (heap_block_t *)next;\n}\n\n/* Return true if this block is free. */\nstatic inline bool is_free(const heap_block_t *block) {\n  return block->header & BLOCK_FREE_FLAG;\n}\n\n/* Return true if this block is the first in the heap */\nstatic inline bool is_first_block(const heap_t *heap,\n                                  const heap_block_t *block) {\n  return (block == &heap->first_block);\n}\n\n/* Return true if this block is the last_block in the heap\n   (the only block with no next pointer) */\nstatic inline bool is_last_block(const heap_block_t *block) {\n  return (block->header & NEXT_BLOCK_MASK) == 0;\n}\n\n/* Data size of the block (excludes this block's header) */\nstatic inline size_t block_data_size(const heap_block_t *block) {\n  intptr_t next = (intptr_t)block->header & NEXT_BLOCK_MASK;\n  intptr_t this = (intptr_t)block;\n  if (next == 0) {\n    return 0; /* this is the last block in the heap */\n  }\n  return next - this - sizeof(block->header);\n}\n\n/* Check a block is valid for this heap. Used to verify parameters. */\nstatic void assert_valid_block(const heap_t *heap, const heap_block_t *block) {\n  MULTI_HEAP_ASSERT(block >= &heap->first_block && block <= heap->last_block,\n                    block); // block not in heap\n  if (heap < (const heap_t *)heap->last_block) {\n    const heap_block_t *next = get_next_block(block);\n    MULTI_HEAP_ASSERT(next >= &heap->first_block && next <= heap->last_block,\n                      block); // Next block not in heap\n    if (is_free(block)) {\n      // Check block->next_free is valid\n      MULTI_HEAP_ASSERT(block->next_free >= &heap->first_block &&\n                            block->next_free <= heap->last_block,\n                        &block->next_free);\n    }\n  }\n}\n\n/* Get the first free block before 'block' in the heap. 'block' can be a free\n   block or in use.\n\n   Result is always the closest free block to 'block' in the heap, that is\n   located before 'block'. There may be multiple allocated blocks between the\n   result and 'block'.\n\n   If 'block' is free, the result's 'next_free' pointer will already point to\n   'block'.\n\n   Result will never be NULL, but it may be the header block heap->first_block.\n*/\nstatic heap_block_t *get_prev_free_block(heap_t *heap,\n                                         const heap_block_t *block) {\n  assert(!is_first_block(\n      heap, block)); /* can't look for a block before first_block */\n\n  for (heap_block_t *b = &heap->first_block; b != NULL && b < block;\n       b = b->next_free) {\n    MULTI_HEAP_ASSERT(is_free(b), b); // Block should be free\n    if (b->next_free == NULL || b->next_free >= block) {\n      if (is_free(block)) {\n        /* if block is on freelist, 'b' should be the item before it. */\n        MULTI_HEAP_ASSERT(b->next_free == block, &b->next_free);\n      }\n      return b; /* b is the last free block before 'block' */\n    }\n  }\n  abort(); /* There should always be a previous free block, even if it's\n              heap->first_block */\n}\n\n/* Merge some block 'a' into the following block 'b'.\n\n   If both blocks are free, resulting block is marked free.\n   If only one block is free, resulting block is marked in use. No data is\n   moved.\n\n   This operation may fail if block 'a' is the first block or 'b' is the last\n   block, the caller should check block_data_size() to know if anything happened\n   here or not.\n*/\nstatic heap_block_t *merge_adjacent(heap_t *heap, heap_block_t *a,\n                                    heap_block_t *b) {\n  assert(a < b);\n\n  /* Can't merge header blocks, just return the non-header block as-is */\n  if (is_last_block(b)) {\n    return a;\n  }\n  if (is_first_block(heap, a)) {\n    return b;\n  }\n\n  MULTI_HEAP_ASSERT(get_next_block(a) == b, a); // Blocks should be in order\n\n  bool free = is_free(a) &&\n              is_free(b); /* merging two free blocks creates a free block */\n  if (!free && (is_free(a) || is_free(b))) {\n    /* only one of these blocks is free, so resulting block will be a used\n       block. means we need to take the free block out of the free list\n     */\n    heap_block_t *free_block = is_free(a) ? a : b;\n    heap_block_t *prev_free = get_prev_free_block(heap, free_block);\n    MULTI_HEAP_ASSERT(\n        free_block->next_free > prev_free,\n        &free_block->next_free); // Next free block should be after prev one\n    prev_free->next_free = free_block->next_free;\n\n    heap->free_bytes -= block_data_size(free_block);\n  }\n\n  a->header = b->header & NEXT_BLOCK_MASK;\n  MULTI_HEAP_ASSERT(a->header != 0, a);\n  if (free) {\n    a->header |= BLOCK_FREE_FLAG;\n    if (b->next_free != NULL) {\n      MULTI_HEAP_ASSERT(b->next_free > a, &b->next_free);\n      MULTI_HEAP_ASSERT(b->next_free > b, &b->next_free);\n    }\n    a->next_free = b->next_free;\n\n    /* b's header can be put into the pool of free bytes */\n    heap->free_bytes += sizeof(a->header);\n  }\n\n#ifdef MULTI_HEAP_POISONING_SLOW\n  /* b's former block header needs to be replaced with a fill pattern */\n  multi_heap_internal_poison_fill_region(b, sizeof(heap_block_t), free);\n#endif\n\n  return a;\n}\n\n/* Split a block so it can hold at least 'size' bytes of data, making any spare\n   space into a new free block.\n\n   'block' should be marked in-use when this function is called (implementation\n   detail, this function doesn't set the next_free pointer).\n\n   'prev_free_block' is the free block before 'block', if already known. Can be\n   NULL if not yet known. (This is a performance optimisation to avoid walking\n   the freelist twice when possible.)\n*/\nstatic void split_if_necessary(heap_t *heap, heap_block_t *block, size_t size,\n                               heap_block_t *prev_free_block) {\n  const size_t block_size = block_data_size(block);\n  MULTI_HEAP_ASSERT(!is_free(block), block);    // split block shouldn't be free\n  MULTI_HEAP_ASSERT(size <= block_size, block); // size should be valid\n  size = HEAP_ALIGN_UP(size);\n\n  /* can't split the head or tail block */\n  assert(!is_first_block(heap, block));\n  assert(!is_last_block(block));\n\n  heap_block_t *new_block = (heap_block_t *)(block->data + size);\n  heap_block_t *next_block = get_next_block(block);\n\n  if (is_free(next_block) && !is_last_block(next_block)) {\n    /* The next block is free, just extend it upwards. */\n    new_block->header = next_block->header;\n    new_block->next_free = next_block->next_free;\n    if (prev_free_block == NULL) {\n      prev_free_block = get_prev_free_block(heap, block);\n    }\n    /* prev_free_block should point to the next block (which we found to be\n     * free). */\n    MULTI_HEAP_ASSERT(\n        prev_free_block->next_free == next_block,\n        &prev_free_block->next_free); // free blocks should be in order\n    /* Note: We have not introduced a new block header, hence the simple math.\n     */\n    heap->free_bytes += block_size - size;\n#ifdef MULTI_HEAP_POISONING_SLOW\n    /* next_block header needs to be replaced with a fill pattern */\n    multi_heap_internal_poison_fill_region(next_block, sizeof(heap_block_t),\n                                           true /* free */);\n#endif\n  } else {\n    /* Insert a free block between the current and the next one. */\n    if (block_data_size(block) < size + sizeof(heap_block_t)) {\n      /* Can't split 'block' if we're not going to get a usable free block\n       * afterwards */\n      return;\n    }\n    if (prev_free_block == NULL) {\n      prev_free_block = get_prev_free_block(heap, block);\n    }\n    new_block->header = block->header | BLOCK_FREE_FLAG;\n    new_block->next_free = prev_free_block->next_free;\n    /* prev_free_block should point to a free block after new_block */\n    MULTI_HEAP_ASSERT(\n        prev_free_block->next_free > new_block,\n        &prev_free_block->next_free); // free blocks should be in order\n    heap->free_bytes += block_data_size(new_block);\n  }\n  block->header = (intptr_t)new_block;\n  prev_free_block->next_free = new_block;\n}\n\nvoid *multi_heap_get_block_address_impl(multi_heap_block_handle_t block) {\n  return ((char *)block + offsetof(heap_block_t, data));\n}\n\nsize_t multi_heap_get_allocated_size_impl(multi_heap_handle_t heap, void *p) {\n  heap_block_t *pb = get_block(p);\n\n  assert_valid_block(heap, pb);\n  MULTI_HEAP_ASSERT(!is_free(pb), pb); // block shouldn't be free\n  return block_data_size(pb);\n}\n\nmulti_heap_handle_t multi_heap_register_impl(void *start, size_t size) {\n  TRACE(2, \"multi_heap_register_impl start=%p,size=%d\", start, size);\n  heap_t *heap = (heap_t *)HEAP_ALIGN_UP((intptr_t)start);\n  uintptr_t end = HEAP_ALIGN((uintptr_t)start + size);\n  if (end - (uintptr_t)start < sizeof(heap_t) + 2 * sizeof(heap_block_t)) {\n    return NULL; /* 'size' is too small to fit a heap here */\n  }\n#if defined(MULTI_HEAP_DEFAULT_INT_LOCK)\n  heap->lock = (void *)(&heap->int_lock);\n#else\n  heap->lock = NULL;\n#endif\n  heap->last_block = (heap_block_t *)(end - sizeof(heap_block_t));\n\n  /* first 'real' (allocatable) free block goes after the heap structure */\n  heap_block_t *first_free_block =\n      (heap_block_t *)((intptr_t)start + sizeof(heap_t));\n  first_free_block->header = (intptr_t)heap->last_block | BLOCK_FREE_FLAG;\n  first_free_block->next_free = heap->last_block;\n\n  /* last block is 'free' but has a NULL next pointer */\n  heap->last_block->header = BLOCK_FREE_FLAG;\n  heap->last_block->next_free = NULL;\n\n  /* first block also 'free' but has legitimate length,\n     malloc will never allocate into this block. */\n  heap->first_block.header = (intptr_t)first_free_block | BLOCK_FREE_FLAG;\n  heap->first_block.next_free = first_free_block;\n\n  /* free bytes is:\n     - total bytes in heap\n     - minus heap_t header at top (includes heap->first_block)\n     - minus header of first_free_block\n     - minus whole block at heap->last_block\n  */\n  heap->free_bytes = HEAP_ALIGN(size) - sizeof(heap_t) -\n                     sizeof(first_free_block->header) - sizeof(heap_block_t);\n  heap->minimum_free_bytes = heap->free_bytes;\n  heap->total_bytes = HEAP_ALIGN(size);\n  return heap;\n}\n\nvoid multi_heap_set_lock(multi_heap_handle_t heap, void *lock) {\n  heap->lock = lock;\n}\n\nvoid inline multi_heap_internal_lock(multi_heap_handle_t heap) {\n  MULTI_HEAP_LOCK(heap->lock);\n}\n\nvoid inline multi_heap_internal_unlock(multi_heap_handle_t heap) {\n  MULTI_HEAP_UNLOCK(heap->lock);\n}\n\nmulti_heap_block_handle_t multi_heap_get_first_block(multi_heap_handle_t heap) {\n  return &heap->first_block;\n}\n\nmulti_heap_block_handle_t\nmulti_heap_get_next_block(multi_heap_handle_t heap,\n                          multi_heap_block_handle_t block) {\n  heap_block_t *next = get_next_block(block);\n  /* check for valid free last block to avoid assert in assert_valid_block */\n  if (next == heap->last_block && is_last_block(next) && is_free(next)) {\n    return NULL;\n  }\n  assert_valid_block(heap, next);\n  return next;\n}\n\nbool multi_heap_is_free(multi_heap_block_handle_t block) {\n  return is_free(block);\n}\n\nvoid *multi_heap_malloc_impl(multi_heap_handle_t heap, size_t size) {\n  heap_block_t *best_block = NULL;\n  heap_block_t *prev_free = NULL;\n  heap_block_t *prev = NULL;\n  size_t best_size = SIZE_MAX;\n  size = HEAP_ALIGN_UP(size);\n\n  if (size == 0 || heap == NULL) {\n    return NULL;\n  }\n\n  multi_heap_internal_lock(heap);\n\n  /* Note: this check must be done while holding the lock as both\n     malloc & realloc may temporarily shrink the free_bytes value\n     before they split a large block. This can result in false negatives,\n     especially if the heap is unfragmented.\n  */\n  if (heap->free_bytes < size) {\n    MULTI_HEAP_UNLOCK(heap->lock);\n    ASSERT(0, \"[%s] need size = %d, heap->free_bytes = %d\", __func__, size,\n           heap->free_bytes);\n    return NULL;\n  }\n\n  /* Find best free block to perform the allocation in */\n  prev = &heap->first_block;\n  for (heap_block_t *b = heap->first_block.next_free; b != NULL;\n       b = b->next_free) {\n    MULTI_HEAP_ASSERT(\n        b > prev,\n        &prev->next_free); // free blocks should be ascending in address\n    MULTI_HEAP_ASSERT(is_free(b), b); // block should be free\n    size_t bs = block_data_size(b);\n    if (bs >= size && bs < best_size) {\n      best_block = b;\n      best_size = bs;\n      prev_free = prev;\n      if (bs == size) {\n        break; /* we've found a perfect sized block */\n      }\n    }\n    prev = b;\n  }\n\n  if (best_block == NULL) {\n    multi_heap_internal_unlock(heap);\n    return NULL; /* No room in heap */\n  }\n\n  prev_free->next_free = best_block->next_free;\n  best_block->header &= ~BLOCK_FREE_FLAG;\n\n  heap->free_bytes -= block_data_size(best_block);\n\n  split_if_necessary(heap, best_block, size, prev_free);\n\n  if (heap->free_bytes < heap->minimum_free_bytes) {\n    heap->minimum_free_bytes = heap->free_bytes;\n  }\n\n  multi_heap_internal_unlock(heap);\n\n  return best_block->data;\n}\n\nvoid multi_heap_free_impl(multi_heap_handle_t heap, void *p) {\n  heap_block_t *pb = get_block(p);\n\n  if (heap == NULL || p == NULL) {\n    return;\n  }\n\n  multi_heap_internal_lock(heap);\n\n  assert_valid_block(heap, pb);\n  MULTI_HEAP_ASSERT(!is_free(pb), pb);       // block should not be free\n  MULTI_HEAP_ASSERT(!is_last_block(pb), pb); // block should not be last block\n  MULTI_HEAP_ASSERT(!is_first_block(heap, pb),\n                    pb); // block should not be first block\n\n  heap_block_t *next = get_next_block(pb);\n\n  /* Update freelist pointers */\n  heap_block_t *prev_free = get_prev_free_block(heap, pb);\n  // freelist validity check\n  MULTI_HEAP_ASSERT(prev_free->next_free == NULL || prev_free->next_free > pb,\n                    &prev_free->next_free);\n  pb->next_free = prev_free->next_free;\n  prev_free->next_free = pb;\n\n  /* Mark this block as free */\n  pb->header |= BLOCK_FREE_FLAG;\n\n  heap->free_bytes += block_data_size(pb);\n\n  /* Try and merge previous free block into this one */\n  if (get_next_block(prev_free) == pb) {\n    pb = merge_adjacent(heap, prev_free, pb);\n  }\n\n  /* If next block is free, try to merge the two */\n  if (is_free(next)) {\n    pb = merge_adjacent(heap, pb, next);\n  }\n\n  multi_heap_internal_unlock(heap);\n}\n\nvoid *multi_heap_realloc_impl(multi_heap_handle_t heap, void *p, size_t size) {\n  heap_block_t *pb = get_block(p);\n  void *result;\n  size = HEAP_ALIGN_UP(size);\n\n  assert(heap != NULL);\n\n  if (p == NULL) {\n    return multi_heap_malloc_impl(heap, size);\n  }\n\n  assert_valid_block(heap, pb);\n  // non-null realloc arg should be allocated\n  MULTI_HEAP_ASSERT(!is_free(pb), pb);\n\n  if (size == 0) {\n    /* note: calling multi_free_impl() here as we've already been\n       through any poison-unwrapping */\n    multi_heap_free_impl(heap, p);\n    return NULL;\n  }\n\n  if (heap == NULL) {\n    return NULL;\n  }\n\n  multi_heap_internal_lock(heap);\n  result = NULL;\n\n  if (size <= block_data_size(pb)) {\n    // Shrinking....\n    split_if_necessary(heap, pb, size, NULL);\n    result = pb->data;\n  } else if (heap->free_bytes < size - block_data_size(pb)) {\n    // Growing, but there's not enough total free space in the heap\n    multi_heap_internal_unlock(heap);\n    return NULL;\n  }\n\n  // New size is larger than existing block\n  if (result == NULL) {\n    // See if we can grow into one or both adjacent blocks\n    heap_block_t *orig_pb = pb;\n    size_t orig_size = block_data_size(orig_pb);\n    heap_block_t *next = get_next_block(pb);\n    heap_block_t *prev = get_prev_free_block(heap, pb);\n\n    // Can only grow into the previous free block if it's adjacent\n    size_t prev_grow_size =\n        (get_next_block(prev) == pb) ? block_data_size(prev) : 0;\n\n    // Can grow into next block? (we may also need to grow into 'prev' to get to\n    // our desired size)\n    if (is_free(next) &&\n        (block_data_size(pb) + block_data_size(next) + prev_grow_size >=\n         size)) {\n      pb = merge_adjacent(heap, pb, next);\n    }\n\n    // Can grow into previous block?\n    // (try this even if we're already big enough from growing into 'next', as\n    // it reduces fragmentation)\n    if (prev_grow_size > 0 && (block_data_size(pb) + prev_grow_size >= size)) {\n      pb = merge_adjacent(heap, prev, pb);\n      // this doesn't guarantee we'll be left with a big enough block, as it's\n      // possible for the merge to fail if prev == heap->first_block\n    }\n\n    if (block_data_size(pb) >= size) {\n      memmove(pb->data, orig_pb->data, orig_size);\n      split_if_necessary(heap, pb, size, NULL);\n      result = pb->data;\n    }\n  }\n\n  if (result == NULL) {\n    // Need to allocate elsewhere and copy data over\n    //\n    // (Calling _impl versions here as we've already been through any\n    // unwrapping for heap poisoning features.)\n    result = multi_heap_malloc_impl(heap, size);\n    if (result != NULL) {\n      memcpy(result, pb->data, block_data_size(pb));\n      multi_heap_free_impl(heap, pb->data);\n    }\n  }\n\n  if (heap->free_bytes < heap->minimum_free_bytes) {\n    heap->minimum_free_bytes = heap->free_bytes;\n  }\n\n  multi_heap_internal_unlock(heap);\n  return result;\n}\n\n#define FAIL_PRINT(num, MSG, ...)                                              \\\n  do {                                                                         \\\n    if (print_errors) {                                                        \\\n      MULTI_HEAP_STDERR_PRINTF(num, MSG, __VA_ARGS__);                         \\\n    }                                                                          \\\n    valid = false;                                                             \\\n  } while (0)\n\nbool multi_heap_check(multi_heap_handle_t heap, bool print_errors) {\n  bool valid = true;\n  size_t total_free_bytes = 0;\n  assert(heap != NULL);\n\n  multi_heap_internal_lock(heap);\n\n  heap_block_t *prev = NULL;\n  heap_block_t *prev_free = NULL;\n  heap_block_t *expected_free = NULL;\n\n  /* note: not using get_next_block() in loop, so that assertions aren't checked\n   * here */\n  for (heap_block_t *b = &heap->first_block; b != NULL;\n       b = (heap_block_t *)(b->header & NEXT_BLOCK_MASK)) {\n    if (b == prev) {\n      FAIL_PRINT(1, \"CORRUPT HEAP: Block %p points to itself\\n\", b);\n      goto done;\n    }\n    if (b < prev) {\n      FAIL_PRINT(2, \"CORRUPT HEAP: Block %p is before prev block %p\\n\", b,\n                 prev);\n      goto done;\n    }\n    if (b > heap->last_block || b < &heap->first_block) {\n      FAIL_PRINT(\n          2, \"CORRUPT HEAP: Block %p is outside heap (last valid block %p)\\n\",\n          b, prev);\n      goto done;\n    }\n    if (is_free(b)) {\n      if (prev != NULL && is_free(prev) && !is_first_block(heap, prev) &&\n          !is_last_block(b)) {\n        FAIL_PRINT(2,\n                   \"CORRUPT HEAP: Two adjacent free blocks found, %p and %p\\n\",\n                   prev, b);\n      }\n      if (expected_free != NULL && expected_free != b) {\n        FAIL_PRINT(3,\n                   \"CORRUPT HEAP: Prev free block %p pointed to next free %p \"\n                   \"but this free block is %p\\n\",\n                   prev_free, expected_free, b);\n      }\n      prev_free = b;\n      expected_free = b->next_free;\n      if (!is_first_block(heap, b)) {\n        total_free_bytes += block_data_size(b);\n      }\n    }\n    prev = b;\n\n#ifdef MULTI_HEAP_POISONING\n    if (!is_last_block(b)) {\n      /* For slow heap poisoning, any block should contain correct poisoning\n       * patterns and/or fills */\n      bool poison_ok;\n      if (is_free(b) && b != heap->last_block) {\n        uint32_t block_len =\n            (intptr_t)get_next_block(b) - (intptr_t)b - sizeof(heap_block_t);\n        poison_ok = multi_heap_internal_check_block_poisoning(\n            &b[1], block_len, true, print_errors);\n      } else {\n        poison_ok = multi_heap_internal_check_block_poisoning(\n            b->data, block_data_size(b), false, print_errors);\n      }\n      valid = poison_ok && valid;\n    }\n#endif\n\n  } /* for(heap_block_t b = ... */\n\n  if (prev != heap->last_block) {\n    FAIL_PRINT(2, \"CORRUPT HEAP: Last block %p not %p\\n\", prev,\n               heap->last_block);\n  }\n  if (!is_free(heap->last_block)) {\n    FAIL_PRINT(1, \"CORRUPT HEAP: Expected prev block %p to be free\\n\",\n               heap->last_block);\n  }\n\n  if (heap->free_bytes != total_free_bytes) {\n    FAIL_PRINT(2, \"CORRUPT HEAP: Expected %u free bytes counted %u\\n\",\n               (unsigned)heap->free_bytes, (unsigned)total_free_bytes);\n  }\n\ndone:\n  multi_heap_internal_unlock(heap);\n\n  return valid;\n}\n\nvoid multi_heap_dump(multi_heap_handle_t heap) {\n  assert(heap != NULL);\n\n  multi_heap_internal_lock(heap);\n  MULTI_HEAP_STDERR_PRINTF(3, \"Heap start %p end %p\\nFirst free block %p\\n\",\n                           &heap->first_block, heap->last_block,\n                           heap->first_block.next_free);\n  for (heap_block_t *b = &heap->first_block; b != NULL; b = get_next_block(b)) {\n    MULTI_HEAP_STDERR_PRINTF(3, \"Block %p data size 0x%08x bytes next block %p\",\n                             b, block_data_size(b), get_next_block(b));\n    if (is_free(b)) {\n      MULTI_HEAP_STDERR_PRINTF(1, \" FREE. Next free %p\\n\", b->next_free);\n    } else {\n      MULTI_HEAP_STDERR_PRINTF(1, \"%s\",\n                               \"\\n\"); /* C macros & optional __VA_ARGS__ */\n    }\n  }\n  multi_heap_internal_unlock(heap);\n}\n\nsize_t multi_heap_free_size_impl(multi_heap_handle_t heap) {\n  if (heap == NULL) {\n    return 0;\n  }\n  return heap->free_bytes;\n}\n\nsize_t multi_heap_minimum_free_size_impl(multi_heap_handle_t heap) {\n  if (heap == NULL) {\n    return 0;\n  }\n  return heap->minimum_free_bytes;\n}\n\nvoid multi_heap_get_info_impl(multi_heap_handle_t heap,\n                              multi_heap_info_t *info) {\n  memset(info, 0, sizeof(multi_heap_info_t));\n\n  if (heap == NULL) {\n    return;\n  }\n\n  multi_heap_internal_lock(heap);\n  for (heap_block_t *b = get_next_block(&heap->first_block); !is_last_block(b);\n       b = get_next_block(b)) {\n    info->total_blocks++;\n    if (is_free(b)) {\n      size_t s = block_data_size(b);\n      info->total_free_bytes += s;\n      if (s > info->largest_free_block) {\n        info->largest_free_block = s;\n      }\n      info->free_blocks++;\n    } else {\n      info->total_allocated_bytes += block_data_size(b);\n      info->allocated_blocks++;\n    }\n  }\n\n  info->minimum_free_bytes = heap->minimum_free_bytes;\n  info->total_bytes = heap->total_bytes;\n  // heap has wrong total size (address printed here is not indicative of the\n  // real error)\n  MULTI_HEAP_ASSERT(info->total_free_bytes == heap->free_bytes, heap);\n\n  multi_heap_internal_unlock(heap);\n}"
  },
  {
    "path": "utils/heap/multi_heap.h",
    "content": "// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD\n//\n// Licensed under the Apache License, Version 2.0 (the \"License\");\n// you may not use this file except in compliance with the License.\n// You may obtain a copy of the License at\n//\n//     http://www.apache.org/licenses/LICENSE-2.0\n//\n// Unless required by applicable law or agreed to in writing, software\n// distributed under the License is distributed on an \"AS IS\" BASIS,\n// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n// See the License for the specific language governing permissions and\n// limitations under the License.\n#pragma once\n#include \n#include \n#include \n\n/* multi_heap is a heap implementation for handling multiple\n   heterogenous heaps in a single program.\n\n   Any contiguous block of memory can be registered as a heap.\n*/\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/** @brief Opaque handle to a registered heap */\ntypedef struct multi_heap_info *multi_heap_handle_t;\n\n/** @brief malloc() a buffer in a given heap\n *\n * Semantics are the same as standard malloc(), only the returned buffer will be allocated in the specified heap.\n *\n * @param heap Handle to a registered heap.\n * @param size Size of desired buffer.\n *\n * @return Pointer to new memory, or NULL if allocation fails.\n */\nvoid *multi_heap_malloc(multi_heap_handle_t heap, size_t size);\n\n/** @brief free() a buffer in a given heap.\n *\n * Semantics are the same as standard free(), only the argument 'p' must be NULL or have been allocated in the specified heap.\n *\n * @param heap Handle to a registered heap.\n * @param p NULL, or a pointer previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap.\n */\nvoid multi_heap_free(multi_heap_handle_t heap, void *p);\n\n/** @brief realloc() a buffer in a given heap.\n *\n * Semantics are the same as standard realloc(), only the argument 'p' must be NULL or have been allocated in the specified heap.\n *\n * @param heap Handle to a registered heap.\n * @param p NULL, or a pointer previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap.\n * @param size Desired new size for buffer.\n *\n * @return New buffer of 'size' containing contents of 'p', or NULL if reallocation failed.\n */\nvoid *multi_heap_realloc(multi_heap_handle_t heap, void *p, size_t size);\n\n\n/** @brief Return the size that a particular pointer was allocated with.\n *\n * @param heap Handle to a registered heap.\n * @param p Pointer, must have been previously returned from multi_heap_malloc() or multi_heap_realloc() for the same heap.\n *\n * @return Size of the memory allocated at this block. May be more than the original size argument, due\n * to padding and minimum block sizes.\n */\nsize_t multi_heap_get_allocated_size(multi_heap_handle_t heap, void *p);\n\n\n/** @brief Register a new heap for use\n *\n * This function initialises a heap at the specified address, and returns a handle for future heap operations.\n *\n * There is no equivalent function for deregistering a heap - if all blocks in the heap are free, you can immediately start using the memory for other purposes.\n *\n * @param start Start address of the memory to use for a new heap.\n * @param size Size (in bytes) of the new heap.\n *\n * @return Handle of a new heap ready for use, or NULL if the heap region was too small to be initialised.\n */\nmulti_heap_handle_t multi_heap_register(void *start, size_t size);\n\n\n/** @brief Associate a private lock pointer with a heap\n *\n * The lock argument is supplied to the MULTI_HEAP_LOCK() and MULTI_HEAP_UNLOCK() macros, defined in multi_heap_platform.h.\n *\n * The lock in question must be recursive.\n *\n * When the heap is first registered, the associated lock is NULL.\n *\n * @param heap Handle to a registered heap.\n * @param lock Optional pointer to a locking structure to associate with this heap.\n */\nvoid multi_heap_set_lock(multi_heap_handle_t heap, void* lock);\n\n/** @brief Dump heap information to stdout\n *\n * For debugging purposes, this function dumps information about every block in the heap to stdout.\n *\n * @param heap Handle to a registered heap.\n */\nvoid multi_heap_dump(multi_heap_handle_t heap);\n\n/** @brief Check heap integrity\n *\n * Walks the heap and checks all heap data structures are valid. If any errors are detected, an error-specific message\n * can be optionally printed to stderr. Print behaviour can be overriden at compile time by defining\n * MULTI_CHECK_FAIL_PRINTF in multi_heap_platform.h.\n *\n * @param heap Handle to a registered heap.\n * @param print_errors If true, errors will be printed to stderr.\n * @return true if heap is valid, false otherwise.\n */\nbool multi_heap_check(multi_heap_handle_t heap, bool print_errors);\n\n/** @brief Return free heap size\n *\n * Returns the number of bytes available in the heap.\n *\n * Equivalent to the total_free_bytes member returned by multi_heap_get_heap_info().\n *\n * Note that the heap may be fragmented, so the actual maximum size for a single malloc() may be lower. To know this\n * size, see the largest_free_block member returned by multi_heap_get_heap_info().\n *\n * @param heap Handle to a registered heap.\n * @return Number of free bytes.\n */\nsize_t multi_heap_free_size(multi_heap_handle_t heap);\n\n/** @brief Return the lifetime minimum free heap size\n *\n * Equivalent to the minimum_free_bytes member returned by multi_heap_get_info().\n *\n * Returns the lifetime \"low water mark\" of possible values returned from multi_free_heap_size(), for the specified\n * heap.\n *\n * @param heap Handle to a registered heap.\n * @return Number of free bytes.\n */\nsize_t multi_heap_minimum_free_size(multi_heap_handle_t heap);\n\n/** @brief Structure to access heap metadata via multi_heap_get_info */\ntypedef struct {\n    size_t total_free_bytes;      ///<  Total free bytes in the heap. Equivalent to multi_free_heap_size().\n    size_t total_allocated_bytes; ///<  Total bytes allocated to data in the heap.\n    size_t largest_free_block;    ///<  Size of largest free block in the heap. This is the largest malloc-able size.\n    size_t minimum_free_bytes;    ///<  Lifetime minimum free heap size. Equivalent to multi_minimum_free_heap_size().\n    size_t allocated_blocks;      ///<  Number of (variable size) blocks allocated in the heap.\n    size_t free_blocks;           ///<  Number of (variable size) free blocks in the heap.\n    size_t total_blocks;          ///<  Total number of (variable size) blocks in the heap.\n    size_t total_bytes;\n} multi_heap_info_t;\n\n/** @brief Return metadata about a given heap\n *\n * Fills a multi_heap_info_t structure with information about the specified heap.\n *\n * @param heap Handle to a registered heap.\n * @param info Pointer to a structure to fill with heap metadata.\n */\nvoid multi_heap_get_info(multi_heap_handle_t heap, multi_heap_info_t *info);\n\n#ifdef __cplusplus\n}\n#endif\n"
  },
  {
    "path": "utils/heap/multi_heap_internal.h",
    "content": "// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD\n//\n// Licensed under the Apache License, Version 2.0 (the \"License\");\n// you may not use this file except in compliance with the License.\n// You may obtain a copy of the License at\n//\n//     http://www.apache.org/licenses/LICENSE-2.0\n//\n// Unless required by applicable law or agreed to in writing, software\n// distributed under the License is distributed on an \"AS IS\" BASIS,\n// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n// See the License for the specific language governing permissions and\n// limitations under the License.\n#pragma once\n\n#include \"multi_heap.h\"\n#define MULTI_HEAP_DEFAULT_INT_LOCK (1)\n\n/* Opaque handle to a heap block */\ntypedef const struct heap_block *multi_heap_block_handle_t;\n\n/* Internal definitions for the \"implementation\" of the multi_heap API,\n   as defined in multi_heap.c.\n\n   If heap poisioning is disabled, these are aliased directly to the public API.\n\n   If heap poisoning is enabled, wrapper functions call each of these.\n*/\nvoid *multi_heap_malloc_impl(multi_heap_handle_t heap, size_t size);\nvoid multi_heap_free_impl(multi_heap_handle_t heap, void *p);\nvoid *multi_heap_realloc_impl(multi_heap_handle_t heap, void *p, size_t size);\nmulti_heap_handle_t multi_heap_register_impl(void *start, size_t size);\nvoid multi_heap_get_info_impl(multi_heap_handle_t heap,\n                              multi_heap_info_t *info);\nsize_t multi_heap_free_size_impl(multi_heap_handle_t heap);\nsize_t multi_heap_minimum_free_size_impl(multi_heap_handle_t heap);\nsize_t multi_heap_get_allocated_size_impl(multi_heap_handle_t heap, void *p);\nvoid *multi_heap_get_block_address_impl(multi_heap_block_handle_t block);\n\n/* Some internal functions for heap poisoning use */\n\n/* Check an allocated block's poison bytes are correct. Called by\n * multi_heap_check(). */\nbool multi_heap_internal_check_block_poisoning(void *start, size_t size,\n                                               bool is_free, bool print_errors);\n\n/* Fill a region of memory with the free or malloced pattern.\n   Called when merging blocks, to overwrite the old block header.\n*/\nvoid multi_heap_internal_poison_fill_region(void *start, size_t size,\n                                            bool is_free);\n\n/* Allow heap poisoning to lock/unlock the heap to avoid race conditions\n   if multi_heap_check() is running concurrently.\n*/\nvoid multi_heap_internal_lock(multi_heap_handle_t heap);\n\nvoid multi_heap_internal_unlock(multi_heap_handle_t heap);\n\n/* Some internal functions for heap debugging code to use */\n\n/* Get the handle to the first (fixed free) block in a heap */\nmulti_heap_block_handle_t multi_heap_get_first_block(multi_heap_handle_t heap);\n\n/* Get the handle to the next block in a heap, with validation */\nmulti_heap_block_handle_t\nmulti_heap_get_next_block(multi_heap_handle_t heap,\n                          multi_heap_block_handle_t block);\n\n/* Test if a heap block is free */\nbool multi_heap_is_free(const multi_heap_block_handle_t block);\n\n/* Get the data address of a heap block */\nvoid *multi_heap_get_block_address(multi_heap_block_handle_t block);\n\n/* Get the owner identification for a heap block */\nvoid *multi_heap_get_block_owner(multi_heap_block_handle_t block);\n"
  },
  {
    "path": "utils/heap/multi_heap_platform.h",
    "content": "// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD\n//\n// Licensed under the Apache License, Version 2.0 (the \"License\");\n// you may not use this file except in compliance with the License.\n// You may obtain a copy of the License at\n//\n//     http://www.apache.org/licenses/LICENSE-2.0\n//\n// Unless required by applicable law or agreed to in writing, software\n// distributed under the License is distributed on an \"AS IS\" BASIS,\n// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\n// See the License for the specific language governing permissions and\n// limitations under the License.\n#pragma once\n\n#ifdef ESP_PLATFORM\n\n#include \n#include \n#include \n\n/* Because malloc/free can happen inside an ISR context,\n   we need to use portmux spinlocks here not RTOS mutexes */\n#define MULTI_HEAP_LOCK(PLOCK) do {               \\\n        if((PLOCK) != NULL) {                               \\\n            portENTER_CRITICAL((portMUX_TYPE *)(PLOCK));    \\\n        }                                                   \\\n    } while(0)\n\n\n#define MULTI_HEAP_UNLOCK(PLOCK) do {                \\\n        if ((PLOCK) != NULL) {                              \\\n            portEXIT_CRITICAL((portMUX_TYPE *)(PLOCK));     \\\n        }                                                   \\\n    } while(0)\n\n/* Not safe to use std i/o while in a portmux critical section,\n   can deadlock, so we use the ROM equivalent functions. */\n\n#define MULTI_HEAP_PRINTF ets_printf\n#define MULTI_HEAP_STDERR_PRINTF(MSG, ...) ets_printf(MSG, __VA_ARGS__)\n\ninline static void multi_heap_assert(bool condition, const char *format, int line, intptr_t address)\n{\n    /* Can't use libc assert() here as it calls printf() which can cause another malloc() for a newlib lock.\n\n       Also, it's useful to be able to print the memory address where corruption was detected.\n    */\n#ifndef NDEBUG\n    if(!condition) {\n#ifndef CONFIG_OPTIMIZATION_ASSERTIONS_SILENT\n        ets_printf(format, line, address);\n#endif  // CONFIG_OPTIMIZATION_ASSERTIONS_SILENT\n        abort();\n    }\n#else // NDEBUG\n    (void) condition;\n#endif // NDEBUG\n}\n\n#define MULTI_HEAP_ASSERT(CONDITION, ADDRESS) \\\n    multi_heap_assert((CONDITION), \"CORRUPT HEAP: multi_heap.c:%d detected at 0x%08x\\n\", \\\n                      __LINE__, (intptr_t)(ADDRESS))\n\n#ifdef CONFIG_HEAP_TASK_TRACKING\n#include \n#define MULTI_HEAP_BLOCK_OWNER TaskHandle_t task;\n#define MULTI_HEAP_SET_BLOCK_OWNER(HEAD) (HEAD)->task = xTaskGetCurrentTaskHandle()\n#define MULTI_HEAP_GET_BLOCK_OWNER(HEAD) ((HEAD)->task)\n#else\n#define MULTI_HEAP_BLOCK_OWNER\n#define MULTI_HEAP_SET_BLOCK_OWNER(HEAD)\n#define MULTI_HEAP_GET_BLOCK_OWNER(HEAD) (NULL)\n#endif\n\n#else // ESP_PLATFORM\n#include \"stdint.h\"\n#include \"cmsis.h\"\n#include \"assert.h\"\n#include \"hal_trace.h\"\n\n#define MULTI_HEAP_PRINTF hal_trace_printf\n#define MULTI_HEAP_STDERR_PRINTF(num,MSG, ...) hal_trace_printf(num,MSG, __VA_ARGS__)\n#define MULTI_HEAP_LOCK(PLOCK)  do {if((PLOCK) != NULL) { uint32_t lockd = int_lock(); *((uint32_t *)(PLOCK)) = lockd; }} while (0)\n#define MULTI_HEAP_UNLOCK(PLOCK) do {if((PLOCK) != NULL) { int_unlock(*(((uint32_t *)(PLOCK))));}} while(0)\n\n#define MULTI_HEAP_ASSERT(CONDITION, ADDRESS) do {if (!(CONDITION)) {assert(0 && \"Heap corrupt\");} } while (0)\n\n#define MULTI_HEAP_BLOCK_OWNER\n#define MULTI_HEAP_SET_BLOCK_OWNER(HEAD)\n#define MULTI_HEAP_GET_BLOCK_OWNER(HEAD) (NULL)\n\n#endif\n"
  },
  {
    "path": "utils/heap/pool_api.c",
    "content": "#include \"hal_trace.h\"\n#include \"heap_api.h\"\n\nextern uint8_t __StackLimit[];\nextern uint8_t __HeapLimit[];\n\nuint8_t *syspool_addr = NULL;\nuint32_t syspool_size = 0;\n\nstatic uint32_t syspoll_used = 0;\n\nstatic void syspool_init_addr(void) {\n  syspool_addr = __HeapLimit;\n  syspool_size = syspool_original_size();\n}\n\nuint32_t syspool_original_size(void) {\n  return __StackLimit - __HeapLimit - 512;\n}\n\nvoid syspool_init() {\n  syspool_init_addr();\n  syspoll_used = 0;\n  memset(syspool_addr, 0, syspool_size);\n  TRACE(2, \"syspool_init: %p,0x%x\", syspool_addr, syspool_size);\n}\n\nvoid syspool_init_specific_size(uint32_t size) {\n  syspool_init_addr();\n  syspoll_used = 0;\n  TRACE(2, \"syspool_init_specific_size: %d/%d\", size, syspool_size);\n  if (size < syspool_size) {\n    syspool_size = size;\n  }\n  memset(syspool_addr, 0, syspool_size);\n  TRACE(2, \"syspool_init_specific_size: %p,0x%x\", syspool_addr, size);\n}\n\nuint8_t *syspool_start_addr(void) { return (uint8_t *)(&__HeapLimit); }\n\nuint32_t syspool_total_size(void) { return syspool_size; }\n\nint syspool_free_size() { return syspool_size - syspoll_used; }\n\nint syspool_get_buff(uint8_t **buff, uint32_t size) {\n  uint32_t buff_size_free;\n\n  buff_size_free = syspool_free_size();\n\n  if (size % 4) {\n    size = size + (4 - size % 4);\n  }\n  TRACE(3, \"[%s] size = %d , free size = %d\", __func__, size, buff_size_free);\n  ASSERT(size <= buff_size_free,\n         \"System pool in shortage! To allocate size %d but free size %d.\", size,\n         buff_size_free);\n  *buff = syspool_addr + syspoll_used;\n  syspoll_used += size;\n  return buff_size_free;\n}\n\nint syspool_get_available(uint8_t **buff) {\n  uint32_t buff_size_free;\n  buff_size_free = syspool_free_size();\n\n  TRACE(2, \"[%s] free size = %d\", __func__, buff_size_free);\n  if (buff_size_free < 8)\n    return -1;\n  if (buff != NULL) {\n    *buff = syspool_addr + syspoll_used;\n    syspoll_used += buff_size_free;\n  }\n  return buff_size_free;\n}\n\n#if defined(A2DP_LDAC_ON)\nint syspool_force_used_size(uint32_t size) { return syspoll_used = size; }\n#endif\n"
  },
  {
    "path": "utils/hexdump/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj-y := $(obj-y:.c=.o)\n\n#ccflags-y := -I$(obj)/../../hal\nccflags-y := -Ihal\n"
  },
  {
    "path": "utils/hexdump/hexdump.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __ARM_EABI__\n#include \"stdio.h\"\n#else\n#include \"hal_trace.h\"\n#endif\n\n#define LINE_BUF_SIZE 80 // MIN: 5 + 16 * 3 + 3\n\nstatic void dump_buffer_internal(const unsigned char *buf, size_t len,\n                                 int now) {\n  static const char hex_asc_upper[] = \"0123456789ABCDEF\";\n  char line_buf[LINE_BUF_SIZE];\n  size_t line_len, pos;\n  size_t i, j;\n\n  for (i = 0; i < len; i += 16) {\n    if (i + 16 <= len) {\n      line_len = 16;\n    } else {\n      line_len = len - i;\n    }\n    pos = 0;\n    if (len > 0x1000) {\n      line_buf[pos++] = hex_asc_upper[(i >> 12) & 0xF];\n    }\n    if (len > 0x100) {\n      line_buf[pos++] = hex_asc_upper[(i >> 8) & 0xF];\n    }\n    if (len > 0x10) {\n      line_buf[pos++] = hex_asc_upper[(i >> 4) & 0xF];\n    }\n    line_buf[pos++] = hex_asc_upper[(i & 0xF)];\n    line_buf[pos++] = ':';\n    for (j = 0; j < line_len && pos + 3 < sizeof(line_buf); j++) {\n      line_buf[pos++] = ' ';\n      line_buf[pos++] = hex_asc_upper[(buf[i + j] & 0xF0) >> 4];\n      line_buf[pos++] = hex_asc_upper[(buf[i + j] & 0x0F)];\n    }\n#ifndef __ARM_EABI__\n    if (pos < sizeof(line_buf)) {\n      line_buf[pos++] = '\\0';\n    } else {\n      line_buf[sizeof(line_buf) - 1] = '\\0';\n    }\n    printf(\"%s\\r\\n\", line_buf);\n#else\n    if (pos < sizeof(line_buf)) {\n      line_buf[pos++] = '\\0';\n    } else {\n      line_buf[sizeof(line_buf) - 1] = '\\0';\n    }\n    LOG_INFO(LOG_ATTR_NO_ID | (now ? LOG_ATTR_IMM : 0), line_buf);\n#endif\n  }\n}\n\nvoid dump_buffer(const void *buf, size_t len) {\n  dump_buffer_internal((const unsigned char *)buf, len, 0);\n}\n\nvoid dump_buffer_imm(const void *buf, size_t len) {\n  dump_buffer_internal((const unsigned char *)buf, len, 1);\n}\n"
  },
  {
    "path": "utils/hexdump/hexdump.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HEXDUMP_H__\n#define __HEXDUMP_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\nvoid dump_buffer(const void *buf, size_t len);\n\nvoid dump_buffer_imm(const void *buf, size_t len);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/hwtimer_list/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj-y := $(obj-y:.c=.o)\n\nccflags-y := -Iplatform/hal -Iplatform/cmsis\n\nifneq ($(HWTIMER_NUM),)\nccflags-y += -DHWTIMER_NUM=$(HWTIMER_NUM)\nendif\n\n"
  },
  {
    "path": "utils/hwtimer_list/hwtimer_list.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"hwtimer_list.h\"\n#include \"plat_types.h\"\n#define IGNORE_HAL_TIMER_RAW_API_CHECK\n#include \"cmsis.h\"\n#include \"hal_timer_raw.h\"\n#include \"hal_trace.h\"\n#include \"stdio.h\"\n\n#if defined(ROM_BUILD) && !defined(SIMU)\n#error                                                                         \\\n    \"The user of raw timer API must be unique. Now rom is using raw timer API.\"\n#endif\n\n#define CHECK_ACTIVE_NULL_IN_IRQ 1\n\n#ifndef HWTIMER_NUM\n#define HWTIMER_NUM 10\n#endif\n\n// #define HWTIMER_TEST\n\nenum HWTIMER_STATE_T {\n  HWTIMER_STATE_FREE = 0,\n  HWTIMER_STATE_ALLOC,\n  HWTIMER_STATE_ACTIVE,\n  HWTIMER_STATE_FIRED,\n  HWTIMER_STATE_CALLBACK,\n\n  HWTIMER_STATE_QTY\n};\n\nstruct HWTIMER_T {\n  enum HWTIMER_STATE_T state;\n  struct HWTIMER_T *next;\n  uint32_t time;\n  HWTIMER_CALLBACK_T callback;\n  void *param;\n};\n\nstruct HWTIMER_LIST_T {\n  struct HWTIMER_T timer[HWTIMER_NUM];\n  struct HWTIMER_T *free;\n  struct HWTIMER_T *active;\n  struct HWTIMER_T *fired;\n};\n\nstatic struct HWTIMER_LIST_T hwtimer_list;\nstatic uint32_t err_irq_active_null = 0;\nstatic uint32_t err_irq_early = 0;\n\nstatic void hwtimer_handler(uint32_t elapsed) {\n  struct HWTIMER_T *pre;\n  struct HWTIMER_T *last;\n  uint32_t lock = 0;\n\n  lock = int_lock();\n\n  if (hwtimer_list.active == NULL) {\n    err_irq_active_null++;\n    TRACE(1, \"HWTIMER irq when active is null: might be deleted? %u\",\n          err_irq_active_null);\n#if (CHECK_ACTIVE_NULL_IN_IRQ)\n    ASSERT(hal_timer_is_enabled() == 0,\n           \"HWTIMER collapsed: irq when active is null\");\n#endif\n    goto _exit;\n  }\n  // Update elapsed time\n  elapsed = hal_timer_get_elapsed_time();\n  if (hwtimer_list.active->time > elapsed + HAL_TIMER_LOAD_DELTA) {\n    err_irq_early++;\n    TRACE(1,\n          \"HWTIMER irq occurred early: old active timer might be deleted? %u\",\n          err_irq_early);\n    ASSERT(hal_timer_is_enabled(), \"HWTIMER collapsed: irq occurred too early\");\n    goto _exit;\n  }\n\n  if (elapsed > hwtimer_list.active->time) {\n    elapsed -= hwtimer_list.active->time;\n  } else {\n    elapsed = 0;\n  }\n  pre = hwtimer_list.active;\n  // TODO: Check state here ?\n  pre->state = HWTIMER_STATE_FIRED;\n  last = hwtimer_list.active->next;\n  while (last && last->time <= elapsed) {\n    elapsed -= last->time;\n    pre = last;\n    // TODO: Check state here ?\n    pre->state = HWTIMER_STATE_FIRED;\n    last = last->next;\n  }\n  pre->next = NULL;\n  hwtimer_list.fired = hwtimer_list.active;\n  hwtimer_list.active = last;\n  if (last) {\n    last->time -= elapsed;\n    hal_timer_start(last->time);\n#if (CHECK_ACTIVE_NULL_IN_IRQ)\n  } else {\n    hal_timer_stop();\n#endif\n  }\n\n  while (hwtimer_list.fired) {\n    last = hwtimer_list.fired;\n    hwtimer_list.fired = last->next;\n    // TODO: Check state here ?\n    last->state = HWTIMER_STATE_CALLBACK;\n    last->next = NULL;\n    // Now this timer can be restarted, but not stopped or freed\n    if (last->callback) {\n      int_unlock(lock);\n      last->callback(last->param);\n      lock = int_lock();\n    }\n    if (last->state == HWTIMER_STATE_CALLBACK) {\n      last->state = HWTIMER_STATE_ALLOC;\n    }\n  }\n\n_exit:\n  int_unlock(lock);\n}\n\nvoid hwtimer_init(void) {\n  int i;\n\n  for (i = 0; i < HWTIMER_NUM - 1; i++) {\n    hwtimer_list.timer[i].state = HWTIMER_STATE_FREE;\n    hwtimer_list.timer[i].next = &hwtimer_list.timer[i + 1];\n  }\n  hwtimer_list.timer[HWTIMER_NUM - 1].next = NULL;\n  hwtimer_list.free = &hwtimer_list.timer[0];\n  hwtimer_list.active = NULL;\n  hwtimer_list.fired = NULL;\n  hal_timer_setup(HAL_TIMER_TYPE_ONESHOT, hwtimer_handler);\n}\n\nHWTIMER_ID hwtimer_alloc(HWTIMER_CALLBACK_T callback, void *param) {\n  struct HWTIMER_T *timer;\n  uint32_t lock;\n\n  timer = NULL;\n\n  lock = int_lock();\n  if (hwtimer_list.free != NULL) {\n    timer = hwtimer_list.free;\n    hwtimer_list.free = hwtimer_list.free->next;\n  }\n  int_unlock(lock);\n\n  if (timer == NULL) {\n    return NULL;\n  }\n\n  ASSERT(timer->state == HWTIMER_STATE_FREE, \"HWTIMER-ALLOC: Invalid state: %d\",\n         timer->state);\n  timer->state = HWTIMER_STATE_ALLOC;\n  timer->callback = callback;\n  timer->param = param;\n  timer->next = NULL;\n\n  return timer;\n}\n\nenum E_HWTIMER_T hwtimer_free(HWTIMER_ID id) {\n  enum E_HWTIMER_T ret;\n  struct HWTIMER_T *timer;\n  uint32_t lock;\n\n  timer = (struct HWTIMER_T *)id;\n\n  if (timer < &hwtimer_list.timer[0] ||\n      timer > &hwtimer_list.timer[HWTIMER_NUM - 1]) {\n    return E_HWTIMER_INVAL_ID;\n  }\n\n  ret = E_HWTIMER_OK;\n\n  lock = int_lock();\n\n  if (timer->state != HWTIMER_STATE_ALLOC) {\n    ret = E_HWTIMER_INVAL_ST;\n    goto _exit;\n  }\n  timer->state = HWTIMER_STATE_FREE;\n\n  timer->next = hwtimer_list.free;\n  hwtimer_list.free = timer;\n\n_exit:\n  int_unlock(lock);\n\n  return ret;\n}\n\nstatic enum E_HWTIMER_T __hwtimer_start_int(HWTIMER_ID id, int update,\n                                            HWTIMER_CALLBACK_T callback,\n                                            void *param, unsigned int ticks) {\n  enum E_HWTIMER_T ret;\n  struct HWTIMER_T *timer;\n  struct HWTIMER_T *pre;\n  struct HWTIMER_T *next;\n  uint32_t lock;\n  uint32_t cur_time;\n\n  timer = (struct HWTIMER_T *)id;\n\n  if (timer < &hwtimer_list.timer[0] ||\n      timer > &hwtimer_list.timer[HWTIMER_NUM - 1]) {\n    return E_HWTIMER_INVAL_ID;\n  }\n\n  if (ticks < HAL_TIMER_LOAD_DELTA) {\n    ticks = HAL_TIMER_LOAD_DELTA;\n  }\n\n  ret = E_HWTIMER_OK;\n\n  lock = int_lock();\n\n  if (timer->state != HWTIMER_STATE_ALLOC &&\n      timer->state != HWTIMER_STATE_CALLBACK) {\n    ret = E_HWTIMER_INVAL_ST;\n    goto _exit;\n  }\n  timer->state = HWTIMER_STATE_ACTIVE;\n\n  if (update) {\n    timer->callback = callback;\n    timer->param = param;\n  }\n\n  if (hwtimer_list.active == NULL) {\n    timer->next = NULL;\n    hwtimer_list.active = timer;\n    hal_timer_start(ticks);\n  } else {\n    cur_time = hal_timer_get();\n    ASSERT(cur_time <= hwtimer_list.active->time ||\n               cur_time <= HAL_TIMER_LOAD_DELTA,\n           \"HWTIMER-START collapsed: cur=%u active=%u\", cur_time,\n           hwtimer_list.active->time);\n    if (cur_time > ticks) {\n      hwtimer_list.active->time = cur_time - ticks;\n      timer->next = hwtimer_list.active;\n      hwtimer_list.active = timer;\n      hal_timer_stop();\n      hal_timer_start(ticks);\n    } else {\n      pre = hwtimer_list.active;\n      next = hwtimer_list.active->next;\n      ticks -= cur_time;\n      while (next && next->time < ticks) {\n        ticks -= next->time;\n        pre = next;\n        next = next->next;\n      }\n      if (next) {\n        next->time -= ticks;\n      }\n      pre->next = timer;\n      timer->next = next;\n    }\n  }\n  timer->time = ticks;\n\n_exit:\n  int_unlock(lock);\n\n  return ret;\n}\n\nenum E_HWTIMER_T hwtimer_start(HWTIMER_ID id, unsigned int ticks) {\n  return __hwtimer_start_int(id, 0, NULL, NULL, ticks);\n}\n\nenum E_HWTIMER_T hwtimer_update_then_start(HWTIMER_ID id,\n                                           HWTIMER_CALLBACK_T callback,\n                                           void *param, unsigned int ticks) {\n  return __hwtimer_start_int(id, 1, callback, param, ticks);\n}\n\nenum E_HWTIMER_T hwtimer_update(HWTIMER_ID id, HWTIMER_CALLBACK_T callback,\n                                void *param) {\n  enum E_HWTIMER_T ret;\n  struct HWTIMER_T *timer;\n  uint32_t lock;\n\n  timer = (struct HWTIMER_T *)id;\n\n  if (timer < &hwtimer_list.timer[0] ||\n      timer > &hwtimer_list.timer[HWTIMER_NUM - 1]) {\n    return E_HWTIMER_INVAL_ID;\n  }\n\n  ret = E_HWTIMER_OK;\n\n  lock = int_lock();\n\n  if (timer->state == HWTIMER_STATE_ALLOC ||\n      timer->state == HWTIMER_STATE_CALLBACK) {\n    timer->callback = callback;\n    timer->param = param;\n  } else {\n    ret = E_HWTIMER_INVAL_ST;\n  }\n\n  int_unlock(lock);\n\n  return ret;\n}\n\nenum E_HWTIMER_T hwtimer_stop(HWTIMER_ID id) {\n  enum E_HWTIMER_T ret;\n  struct HWTIMER_T *timer;\n  struct HWTIMER_T *pre;\n  struct HWTIMER_T *next;\n  uint32_t cur_time;\n  uint32_t elapsed_time;\n  uint32_t lock;\n\n  timer = (struct HWTIMER_T *)id;\n\n  if (timer < &hwtimer_list.timer[0] ||\n      timer > &hwtimer_list.timer[HWTIMER_NUM - 1]) {\n    return E_HWTIMER_INVAL_ID;\n  }\n\n  ret = E_HWTIMER_OK;\n\n  lock = int_lock();\n\n  if (timer->state == HWTIMER_STATE_ALLOC) {\n    // Already stopped\n    goto _exit;\n  } else if (timer->state == HWTIMER_STATE_ACTIVE) {\n    // Active timer\n    if (hwtimer_list.active == timer) {\n      cur_time = hal_timer_get();\n      ASSERT(cur_time <= hwtimer_list.active->time ||\n                 cur_time <= HAL_TIMER_LOAD_DELTA,\n             \"HWTIMER-STOP collapsed: cur=%u active=%u\", cur_time,\n             hwtimer_list.active->time);\n      hal_timer_stop();\n      next = hwtimer_list.active->next;\n      if (next) {\n        if (cur_time == 0) {\n          elapsed_time = hal_timer_get_elapsed_time();\n          ASSERT(elapsed_time + HAL_TIMER_LOAD_DELTA >=\n                     hwtimer_list.active->time,\n                 \"HWTIMER-STOP collapsed: elapsed=%u active=%u\", elapsed_time,\n                 hwtimer_list.active->time);\n          if (elapsed_time > hwtimer_list.active->time) {\n            elapsed_time -= hwtimer_list.active->time;\n          } else {\n            elapsed_time = 0;\n          }\n          pre = next;\n          while (pre && pre->time <= elapsed_time) {\n            elapsed_time -= pre->time;\n            pre->time = 0;\n            pre = pre->next;\n          }\n          if (pre) {\n            pre->time -= elapsed_time;\n          }\n        } else {\n          next->time += cur_time;\n        }\n        hal_timer_start(next->time);\n      }\n      hwtimer_list.active = next;\n    } else if (hwtimer_list.active) {\n      pre = hwtimer_list.active;\n      next = hwtimer_list.active->next;\n      while (next && next != timer) {\n        pre = next;\n        next = next->next;\n      }\n      if (next == timer) {\n        pre->next = next->next;\n        if (next->next) {\n          next->next->time += timer->time;\n        }\n      } else {\n        ret = E_HWTIMER_NOT_FOUND;\n      }\n    } else {\n      ret = E_HWTIMER_NOT_FOUND;\n    }\n    ASSERT(ret == E_HWTIMER_OK,\n           \"HWTIMER-STOP collapsed: active timer 0x%08x not in list 0x%08x\",\n           (uint32_t)timer, (uint32_t)hwtimer_list.active);\n  } else if (timer->state == HWTIMER_STATE_FIRED) {\n    // Fired timer\n    if (hwtimer_list.fired == timer) {\n      // The timer handler is preempted\n      hwtimer_list.fired = hwtimer_list.fired->next;\n    } else if (hwtimer_list.fired) {\n      pre = hwtimer_list.fired;\n      next = hwtimer_list.fired->next;\n      while (next && next != timer) {\n        pre = next;\n        next = next->next;\n      }\n      if (next == timer) {\n        pre->next = next->next;\n      } else {\n        ret = E_HWTIMER_NOT_FOUND;\n      }\n    } else {\n      ret = E_HWTIMER_NOT_FOUND;\n    }\n    ASSERT(ret == E_HWTIMER_OK,\n           \"HWTIMER-STOP collapsed: fired timer 0x%08x not in list 0x%08x\",\n           (uint32_t)timer, (uint32_t)hwtimer_list.fired);\n  } else if (timer->state == HWTIMER_STATE_CALLBACK) {\n    // The timer handler is preempted and timer is being handled\n    ret = E_HWTIMER_IN_CALLBACK;\n  } else {\n    // Invalid state\n    ret = E_HWTIMER_INVAL_ST;\n  }\n\n  if (ret == E_HWTIMER_OK) {\n    timer->state = HWTIMER_STATE_ALLOC;\n    timer->next = NULL;\n  }\n\n_exit:\n  int_unlock(lock);\n\n  return ret;\n}\n\n#ifdef HWTIMER_TEST\n\nint hwtimer_get_index(HWTIMER_ID id) {\n  struct HWTIMER_T *timer;\n  int i;\n\n  timer = (struct HWTIMER_T *)id;\n\n  if (timer < &hwtimer_list.timer[0] ||\n      timer > &hwtimer_list.timer[HWTIMER_NUM - 1]) {\n    return -1;\n  }\n\n  for (i = 0; i < HWTIMER_NUM; i++) {\n    if (timer == &hwtimer_list.timer[i]) {\n      return i;\n    }\n  }\n\n  return -1;\n}\n\nvoid hwtimer_dump(void) {\n  int i;\n  int idx;\n  bool checked[HWTIMER_NUM];\n  char buf[100], *pos;\n  const char *end = buf + sizeof(buf);\n  struct HWTIMER_T *timer;\n  uint32_t lock;\n  enum HWTIMER_STATE_T state;\n\n  for (i = 0; i < HWTIMER_NUM; i++) {\n    checked[i] = false;\n  }\n\n  TRACE(0, \"------\\nHWTIMER LIST DUMP\");\n  lock = int_lock();\n  for (i = 0; i < 3; i++) {\n    pos = buf;\n    if (i == 0) {\n      pos += snprintf(pos, end - pos, \"ACTIVE: \");\n      timer = hwtimer_list.active;\n      state = HWTIMER_STATE_ACTIVE;\n    } else if (i == 1) {\n      pos += snprintf(pos, end - pos, \"FIRED : \");\n      timer = hwtimer_list.fired;\n      state = HWTIMER_STATE_FIRED;\n    } else {\n      pos += snprintf(pos, end - pos, \"FREE  : \");\n      timer = hwtimer_list.free;\n      state = HWTIMER_STATE_FREE;\n    }\n    while (timer) {\n      idx = hwtimer_get_index(timer);\n      if (idx == -1) {\n        pos += snprintf(pos, end - pos, \"\", timer);\n        break;\n      } else if (checked[idx]) {\n        pos += snprintf(pos, end - pos, \"\", idx);\n        break;\n      } else if (timer->state != state) {\n        pos += snprintf(pos, end - pos, \" \", timer->state, idx);\n      } else if (state == HWTIMER_STATE_ACTIVE) {\n        pos += snprintf(pos, end - pos, \"%d-%u \", idx, timer->time);\n      } else {\n        pos += snprintf(pos, end - pos, \"%d \", idx);\n      }\n      checked[idx] = true;\n      timer = timer->next;\n    }\n    TRACE(buf);\n  }\n  int_unlock(lock);\n  pos = buf;\n  pos += snprintf(pos, end - pos, \"ALLOC : \");\n  for (i = 0; i < HWTIMER_NUM; i++) {\n    if (!checked[i]) {\n      if (hwtimer_list.timer[i].state == HWTIMER_STATE_ALLOC) {\n        pos += snprintf(pos, end - pos, \"%d \", i);\n      } else {\n        pos += snprintf(pos, end - pos, \" \",\n                        hwtimer_list.timer[i].state, i);\n      }\n    }\n  }\n  pos += snprintf(pos, end - pos, \"\\n------\");\n  TRACE(buf);\n}\n\n#define HWTIMER_TEST_NUM (HWTIMER_NUM + 2)\n\nstatic HWTIMER_ID test_id[HWTIMER_TEST_NUM];\n\nstatic void timer_stop_test(int id) {\n  int ret;\n\n  ret = hwtimer_stop(test_id[id]);\n  TRACE(3, \"[%u] Stop %d / %d\", hal_sys_timer_get(), id, ret);\n  hwtimer_dump();\n}\n\nstatic void timer_callback(void *param) {\n  int id;\n\n  id = (int)param;\n\n  TRACE(2, \"[%u] TIMER-CALLBACK: %d\", hal_sys_timer_get(), id);\n\n  if (id == 3) {\n    timer_stop_test(3);\n    timer_stop_test(5);\n    timer_stop_test(7);\n  }\n}\n\nvoid hwtimer_test(void) {\n  int i;\n  int ret;\n  uint32_t lock;\n\n  hwtimer_init();\n\n  for (i = 0; i < HWTIMER_TEST_NUM; i++) {\n    test_id[i] = hwtimer_alloc(timer_callback, (void *)i);\n    ret = hwtimer_start(test_id[i], (i + 1) * 10);\n    TRACE(4, \"[%u] START-TIMER: %u / %p / %d\", hal_sys_timer_get(), i,\n          test_id[i], ret);\n  }\n\n  hwtimer_dump();\n\n  lock = int_lock();\n  hal_sys_timer_delay(55);\n  timer_stop_test(0);\n  timer_stop_test(2);\n  int_unlock(lock);\n\n  hal_sys_timer_delay(300);\n  hwtimer_dump();\n}\n\n#endif\n"
  },
  {
    "path": "utils/hwtimer_list/hwtimer_list.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __HWTIMER_LIST_H__\n#define __HWTIMER_LIST_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef void *HWTIMER_ID;\n\ntypedef void (*HWTIMER_CALLBACK_T)(void *param);\n\nenum E_HWTIMER_T {\n    E_HWTIMER_OK = 0,\n    E_HWTIMER_FAILED,\n    E_HWTIMER_INVAL_ID,\n    E_HWTIMER_INVAL_ST,\n    E_HWTIMER_IN_CALLBACK,\n    E_HWTIMER_NOT_FOUND,\n};\n\nvoid hwtimer_init(void);\n\nHWTIMER_ID hwtimer_alloc(HWTIMER_CALLBACK_T callback, void *param);\n\nenum E_HWTIMER_T hwtimer_free(HWTIMER_ID id);\n\nenum E_HWTIMER_T hwtimer_start(HWTIMER_ID id, unsigned int ticks);\n\nenum E_HWTIMER_T hwtimer_update_then_start(HWTIMER_ID id, HWTIMER_CALLBACK_T callback, void *param, unsigned int ticks);\n\nenum E_HWTIMER_T hwtimer_update(HWTIMER_ID id, HWTIMER_CALLBACK_T callback, void *param);\n\nenum E_HWTIMER_T hwtimer_stop(HWTIMER_ID id);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/intersyshci/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)intersyshci.cpp))\n\nifeq ($(ENHANCED_STACK),1)\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)trans_adapt_v2.cpp))\nelse\nobj_cpp += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)trans_adapt_v1.cpp))\nendif\n\nsrc_obj := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nINTERSYSHCI_LIB_NAME := libintersyshci\n\nifeq ($(INTERSYS_NO_THREAD),1)\nINTERSYSHCI_LIB_NAME := $(INTERSYSHCI_LIB_NAME)_nothread\nendif\n\nifeq ($(BYPASS_STACK_AUDIO_STREAM),1)\nINTERSYSHCI_LIB_NAME := $(INTERSYSHCI_LIB_NAME)_bypasssas\nendif\n\nifeq ($(ENHANCED_STACK),1)\nINTERSYSHCI_LIB_NAME := $(INTERSYSHCI_LIB_NAME)_enhanced_stack\nendif\n\nifeq ($(KERNEL),RTX)\nINTERSYSHCI_LIB_NAME := $(INTERSYSHCI_LIB_NAME)_RTX\nendif\n\nifeq ($(KERNEL),RTX5)\nINTERSYSHCI_LIB_NAME := $(INTERSYSHCI_LIB_NAME)_RTX5\nendif\n\n$(INTERSYSHCI_LIB_NAME)-y := $(src_obj)\nobj-y += $(INTERSYSHCI_LIB_NAME).a\nccflags-y := \\\n    $(BT_IF_INCLUDES) \\\n\t$(BT_PROFILES_INCLUDES) \\\n\t-Iservices/bt_app/ \\\n\t-Iapps/common/ \\\n\t-Iutils/cqueue \\\n\t-Iplatform/drivers/bt\n\nifeq ($(INTERSYS_NO_THREAD),1)\nCFLAGS_intersyshci.o += -D_INTERSYS_NO_THREAD_\nendif\n\n"
  },
  {
    "path": "utils/intersyshci/intersyshci.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __INTERSYSHCI_H__\n#define __INTERSYSHCI_H__\n\n#include \"trans_adapt.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nvoid BESHCI_BufferAvai(void *packet);\nvoid BESHCI_Open(void);\nvoid BESHCI_Close(void);\nvoid BESHCI_Poll(void);\nvoid BESHCI_LockBuffer(void);\nvoid BESHCI_UNLockBuffer(void);\nvoid BESHCI_SCO_Data_Start(void);\nvoid BESHCI_SCO_Data_Stop(void);\nvoid uartrxtx(void const *argument);\n\nbool BESHCI_Controller_Log_Handler(const unsigned char *p_buff, uint32_t length);\nvoid BESHCI_Dump_A2DP_Seq(const unsigned char *p_buff, uint32_t length);\ntypedef bool (*intersys_hci_cmd_filter_handler_func)(uint8_t* pbuf, uint32_t length);\nvoid intersys_register_hci_cmd_filter_handler_callback(intersys_hci_cmd_filter_handler_func func);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __INTERSYSHCI_H__ */\n"
  },
  {
    "path": "utils/intersyshci/trans_adapt.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __TRANS_ADAPT_H__\n#define __TRANS_ADAPT_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#if defined(ENHANCED_STACK)\n#include \"trans_adapt_v2.h\"\n#else\n#include \"trans_adapt_v1.h\"\n#endif\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __TRANS_ADAPT_H__ */\n"
  },
  {
    "path": "utils/intersyshci/trans_adapt_v1.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __TRANS_ADAPT_V1_H__\n#define __TRANS_ADAPT_V1_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nvoid BESHCI_SendData(void *packet);\nint BESHCI_SendBuffer(unsigned char packet_type, unsigned char *packet, int size);\nunsigned short hci_h4_receive_msg( const uint8_t *buf, uint32_t size);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __TRANS_ADAPT_V1_H__ */\n"
  },
  {
    "path": "utils/intersyshci/trans_adapt_v2.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#ifndef __TRANS_ADAPT_V2_H__\n#define __TRANS_ADAPT_V2_H__\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nvoid BESHCI_SendData(unsigned char type, unsigned short cmd_conn, unsigned short len, unsigned char *buffer);\nint BESHCI_SendBuffer(unsigned char packet_type, unsigned char *packet, int size);\nunsigned short hci_h4_receive_msg( const uint8_t *buf, uint32_t size);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* __TRANS_ADAPT_V2_H__ */\n"
  },
  {
    "path": "utils/kfifo/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-I$(obj)/../../mbed/api/ \\\n\t-I$(obj)/../../mbed/common \\\n\t-I$(obj)/../../mbed/targets/hal/TARGET_BEST/TARGET_BEST100X/TARGET_MBED_BEST1000/ \\\n\t-I$(obj)/../../cmsis/inc/ \\\n\t-I$(obj)/../../mbed/targets/hal/TARGET_BEST/TARGET_BEST100X/ \\\n\t-I$(obj)/../../mbed/hal/ \\\n\t-I$(obj)/../../fs/fat/ \\\n\t-I$(obj)/../../fs/sd/ \\\n\t-I$(obj)/../../fs/fat/ChaN \\\n\t-I$(obj)/../../rtos/rtos/ \\\n\t-I$(obj)/../../iabt/inc/\n\nccflags-y += -DTARGET_LPC1768 -DWORDS_STACK_SIZE=1024 -DOS_TIMERSTKSZ=1024 -D__CORTEX_M4\n"
  },
  {
    "path": "utils/kfifo/kfifo.c",
    "content": "#include \"kfifo.h\"\n#include \"hal_trace.h\"\n#include \n#include \n\nstatic int is_power_of_2(unsigned int n) {\n  int r = 0;\n  if (n != 0 && ((n & (n - 1)) == 0))\n    r = 1;\n\n  return r;\n}\n\nvoid kfifo_init(struct kfifo *fifo, unsigned char *buffer, unsigned int len) {\n  ASSERT(is_power_of_2(len), \"kfifo_init : len %d not power of 2!!!!!\", len);\n\n  fifo->size = len;\n  fifo->buffer = buffer;\n  fifo->in = fifo->out = 0;\n}\nunsigned int kfifo_put(struct kfifo *fifo, unsigned char *buffer,\n                       unsigned int len) {\n  unsigned int l;\n  len = MIN(len, fifo->size - fifo->in + fifo->out);\n  __sync_synchronize();\n\n  l = MIN(len, fifo->size - (fifo->in & (fifo->size - 1)));\n  memcpy(fifo->buffer + (fifo->in & (fifo->size - 1)), buffer, l);\n  memcpy(fifo->buffer, buffer + l, len - l);\n\n  __sync_synchronize();\n  fifo->in += len;\n\n  return len;\n}\nunsigned int kfifo_get(struct kfifo *fifo, unsigned char *buffer,\n                       unsigned int len) {\n  unsigned int l;\n  len = MIN(len, fifo->in - fifo->out);\n  __sync_synchronize();\n\n  l = MIN(len, fifo->size - (fifo->out & (fifo->size - 1)));\n  memcpy(buffer, fifo->buffer + (fifo->out & (fifo->size - 1)), l);\n  memcpy(buffer + l, fifo->buffer, len - l);\n\n  __sync_synchronize();\n  fifo->out += len;\n\n  return len;\n}\nunsigned int kfifo_peek(struct kfifo *fifo, unsigned int len_want,\n                        unsigned char **buff1, unsigned char **buff2,\n                        unsigned int *len1, unsigned int *len2) {\n  unsigned int l, len;\n\n  *buff1 = *buff2 = NULL;\n  *len1 = *len2 = 0;\n  len = MIN(len_want, fifo->in - fifo->out);\n  if (len < len_want) {\n    return 0;\n  }\n\n  __sync_synchronize();\n  l = MIN(len, fifo->size - (fifo->out & (fifo->size - 1)));\n  *buff1 = fifo->buffer + (fifo->out & (fifo->size - 1));\n  *len1 = l;\n  if (l < len) {\n    *buff2 = fifo->buffer;\n    *len2 = len - l;\n  }\n\n  return len_want;\n}\n\nunsigned int kfifo_peek_to_buf(struct kfifo *fifo, unsigned char *buff,\n                               unsigned int len) {\n  unsigned char *buf1 = NULL, *buf2 = NULL;\n  unsigned int len1 = 0, len2 = 0;\n\n  kfifo_peek(fifo, len, &buf1, &buf2, &len1, &len2);\n\n  if (len == (len1 + len2)) {\n    memcpy(buff, buf1, len1);\n    memcpy(buff + len1, buf2, len2);\n  } else {\n    return 0;\n  }\n\n  return len;\n}\n\nunsigned int kfifo_len(struct kfifo *fifo) { return (fifo->in - fifo->out); }\n\n#if 0\nstruct kfifo test_kfifo;\nunsigned char kfifo_buffer[32];\nvoid kfifo_test(void)\n{\n    unsigned char b[10];\n    kfifo_init(&test_kfifo, kfifo_buffer, 32);\n    TRACE(1,\"init 32 : fifo size %d\", test_kfifo.size);\n\n    kfifo_put(&test_kfifo, \"1234567890\", 10);\n    TRACE(1,\"put 10 : fifo  len %d\", kfifo_len(&test_kfifo));\n\n    kfifo_put(&test_kfifo, \"abcdefghij\", 10);\n    TRACE(1,\"put 10 : fifo  len %d\", kfifo_len(&test_kfifo));\n\n    kfifo_put(&test_kfifo, \"!@#$%^&*()\", 10);\n    TRACE(1,\"put 10 : fifo  len %d\", kfifo_len(&test_kfifo));\n\n    kfifo_put(&test_kfifo, \"VVVV\", 4);\n    TRACE(1,\"put 4 : fifo  len %d\", kfifo_len(&test_kfifo));\n\n    kfifo_get(&test_kfifo, b, 2);\n    TRACE(1,\"get 2 : fifo  len %d\", kfifo_len(&test_kfifo));\n    TRACE(0,\"data:\");\n    for(int i = 0; i < 2; ++i) {\n        TRACE(1,\"%c-\", b[i]);\n    }\n    TRACE(0,\" \");\n    kfifo_get(&test_kfifo, b, 10);\n    TRACE(1,\"get 10 : fifo  len %d\", kfifo_len(&test_kfifo));\n    TRACE(0,\"data:\");\n    for(int i = 0; i < 10; ++i) {\n        TRACE(1,\"%c-\", b[i]);\n    }\n    TRACE(0,\" \");\n    kfifo_get(&test_kfifo, b, 10);\n    TRACE(1,\"get 10 : fifo  len %d\", kfifo_len(&test_kfifo));\n    TRACE(0,\"data:\");\n    for(int i = 0; i < 10; ++i) {\n        TRACE(1,\"%c-\", b[i]);\n    }\n    TRACE(0,\" \");\n    kfifo_get(&test_kfifo, b, 10);\n    TRACE(1,\"get 10 : fifo  len %d\", kfifo_len(&test_kfifo));\n    TRACE(0,\"data:\");\n    for(int i = 0; i < 10; ++i) {\n        TRACE(1,\"%c-\", b[i]);\n    }\n    TRACE(0,\" \");\n}\n#endif\n"
  },
  {
    "path": "utils/kfifo/kfifo.h",
    "content": "#ifndef KFIFO_H\n#define KFIFO_H 1\n\n#include \"plat_types.h\"\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\nstruct kfifo {\n    unsigned char *buffer;     /* the buffer holding the data */\n    unsigned int size;         /* the size of the allocated buffer */\n    unsigned int in;           /* data is added at offset (in % size) */\n    unsigned int out;          /* data is extracted from off. (out % size) */\n};\n\nvoid kfifo_init(struct kfifo *k, unsigned char *buff, unsigned int len);\nunsigned int kfifo_put(struct kfifo *k, unsigned char *buff, unsigned int len);\nunsigned int kfifo_get(struct kfifo *k, unsigned char *buff, unsigned int len);\nunsigned int kfifo_peek(struct kfifo *k, unsigned int len_want, unsigned char **buff1, unsigned char **buff2, unsigned int *len1, unsigned int *len2);\nunsigned int kfifo_peek_to_buf(struct kfifo *fifo, unsigned char *buff, unsigned int len);\nunsigned int kfifo_len(struct kfifo *fifo);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* KFIFO_H */\n"
  },
  {
    "path": "utils/libc/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nifeq ($(NOSTD),1)\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\n# Use relative path to specify the include path (so that no change is needed after rename)\nccflags-y := -I$(obj)/inc\n\nifeq ($(LIBC_ROM),1)\nCFLAGS_libc_rom.o += -Iutils/rom_utils\n\nEXCLUDE_OBJS := strsep.o strtok.o strncat.o strnicmp.o strstr.o memset.o memcpy.o memmove.o \\\n\t\t\t\tatoi.o strtol.o strtoul.o qsort.o bsearch.o \\\n\t\t\t\tvsprintf.o vsscanf.o\nelse\nEXCLUDE_OBJS := libc_rom.o\nendif\n\nobj-y := $(filter-out $(EXCLUDE_OBJS),$(obj-y))\n\nelse # !NOSTD\n\nobj-y := libc_rom.o\n\nCFLAGS_libc_rom.o += -Iutils/rom_utils\n# Avoid conflicting with libc in toolchain\nCFLAGS_libc_rom.o += -DNO_STRTOL\nCFLAGS_libc_rom.o += -DNO_STRTOUL\nCFLAGS_libc_rom.o += -DNO_VSSCANF\nCFLAGS_libc_rom.o += -DNO_ASSERT\n\nendif # !NOSTD\n\n"
  },
  {
    "path": "utils/libc/inc/assert.h",
    "content": "#ifndef _ASSERT_H_\n#define _ASSERT_H_\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#ifdef assert\n#undef assert\n#endif\n\n#define STRINGIFY_VALUE(s) STRINGIFY(s)\n#define STRINGIFY(s) #s\n\nvoid __assert(const char* fmt);\n\n#define assert(boolcondition) { if(!(boolcondition)) __assert( \\\n    \"ASSERTION FAILED in file : \" \\\n    __FILE__ \\\n    \" at line\" \\\n    STRINGIFY_VALUE(__LINE__)); }\n\n#ifdef __cplusplus\n} // extern C\n#endif\n\n#endif /* _ASSERT_H_ */\n"
  },
  {
    "path": "utils/libc/inc/ctype.h",
    "content": "#ifndef CTYPE_H\n#define CTYPE_H\n\n/*\n * NOTE! This ctype does not handle EOF like the standard C\n * library is required to.\n */\n\n#define _U    0x01    /* upper */\n#define _L    0x02    /* lower */\n#define _D    0x04    /* digit */\n#define _C    0x08    /* cntrl */\n#define _P    0x10    /* punct */\n#define _S    0x20    /* white space (space/lf/tab) */\n#define _X    0x40    /* hex digit */\n#define _SP    0x80    /* hard space (0x20) */\n\nextern const unsigned char _ctype[];\n\n#define __ismask(x) (_ctype[(int)(unsigned char)(x)])\n\n#define isalnum(c)    ((__ismask(c)&(_U|_L|_D)) != 0)\n#define isalpha(c)    ((__ismask(c)&(_U|_L)) != 0)\n#define iscntrl(c)    ((__ismask(c)&(_C)) != 0)\n#define isdigit(c)    ((__ismask(c)&(_D)) != 0)\n#define isgraph(c)    ((__ismask(c)&(_P|_U|_L|_D)) != 0)\n#define islower(c)    ((__ismask(c)&(_L)) != 0)\n#define isprint(c)    ((__ismask(c)&(_P|_U|_L|_D|_SP)) != 0)\n#define ispunct(c)    ((__ismask(c)&(_P)) != 0)\n#define isspace(c)    ((__ismask(c)&(_S)) != 0)\n#define isupper(c)    ((__ismask(c)&(_U)) != 0)\n#define isxdigit(c)    ((__ismask(c)&(_D|_X)) != 0)\n\n#define isascii(c) (((unsigned char)(c))<=0x7f)\n#define toascii(c) (((unsigned char)(c))&0x7f)\n\nstatic inline unsigned char __tolower(unsigned char c)\n{\n    if (isupper(c))\n        c -= 'A'-'a';\n    return c;\n}\n\nstatic inline unsigned char __toupper(unsigned char c)\n{\n    if (islower(c))\n        c -= 'a'-'A';\n    return c;\n}\n\n#define tolower(c) __tolower(c)\n#define toupper(c) __toupper(c)\n\n\n#endif /* CTYPE_H */\n"
  },
  {
    "path": "utils/libc/inc/errno.h",
    "content": "#ifndef _GENERIC_ERRNO_H\n#define _GENERIC_ERRNO_H\n\n#define EPERM       1   /* Operation not permitted */\n#define ENOENT      2   /* No such file or directory */\n#define ESRCH       3   /* No such process */\n#define EINTR       4   /* Interrupted system call */\n#define EIO     5   /* I/O error */\n#define ENXIO       6   /* No such device or address */\n#define E2BIG       7   /* Argument list too long */\n#define ENOEXEC     8   /* Exec format error */\n#define EBADF       9   /* Bad file number */\n#define ECHILD      10  /* No child processes */\n#define EAGAIN      11  /* Try again */\n#define ENOMEM      12  /* Out of memory */\n#define EACCES      13  /* Permission denied */\n#define EFAULT      14  /* Bad address */\n#define ENOTBLK     15  /* Block device required */\n#define EBUSY       16  /* Device or resource busy */\n#define EEXIST      17  /* File exists */\n#define EXDEV       18  /* Cross-device link */\n#define ENODEV      19  /* No such device */\n#define ENOTDIR     20  /* Not a directory */\n#define EISDIR      21  /* Is a directory */\n#define EINVAL      22  /* Invalid argument */\n#define ENFILE      23  /* File table overflow */\n#define EMFILE      24  /* Too many open files */\n#define ENOTTY      25  /* Not a typewriter */\n#define ETXTBSY     26  /* Text file busy */\n#define EFBIG       27  /* File too large */\n#define ENOSPC      28  /* No space left on device */\n#define ESPIPE      29  /* Illegal seek */\n#define EROFS       30  /* Read-only file system */\n#define EMLINK      31  /* Too many links */\n#define EPIPE       32  /* Broken pipe */\n#define EDOM        33  /* Math argument out of domain of func */\n#define ERANGE      34  /* Math result not representable */\n#define EDEADLK     35  /* Resource deadlock would occur */\n#define ENAMETOOLONG    36  /* File name too long */\n#define ENOLCK      37  /* No record locks available */\n#define ENOSYS      38  /* Function not implemented */\n#define ENOTEMPTY   39  /* Directory not empty */\n#define ELOOP       40  /* Too many symbolic links encountered */\n#define EWOULDBLOCK EAGAIN  /* Operation would block */\n#define ENOMSG      42  /* No message of desired type */\n#define EIDRM       43  /* Identifier removed */\n#define ECHRNG      44  /* Channel number out of range */\n#define EL2NSYNC    45  /* Level 2 not synchronized */\n#define EL3HLT      46  /* Level 3 halted */\n#define EL3RST      47  /* Level 3 reset */\n#define ELNRNG      48  /* Link number out of range */\n#define EUNATCH     49  /* Protocol driver not attached */\n#define ENOCSI      50  /* No CSI structure available */\n#define EL2HLT      51  /* Level 2 halted */\n#define EBADE       52  /* Invalid exchange */\n#define EBADR       53  /* Invalid request descriptor */\n#define EXFULL      54  /* Exchange full */\n#define ENOANO      55  /* No anode */\n#define EBADRQC     56  /* Invalid request code */\n#define EBADSLT     57  /* Invalid slot */\n\n#define EDEADLOCK   EDEADLK\n\n#define EBFONT      59  /* Bad font file format */\n#define ENOSTR      60  /* Device not a stream */\n#define ENODATA     61  /* No data available */\n#define ETIME       62  /* Timer expired */\n#define ENOSR       63  /* Out of streams resources */\n#define ENONET      64  /* Machine is not on the network */\n#define ENOPKG      65  /* Package not installed */\n#define EREMOTE     66  /* Object is remote */\n#define ENOLINK     67  /* Link has been severed */\n#define EADV        68  /* Advertise error */\n#define ESRMNT      69  /* Srmount error */\n#define ECOMM       70  /* Communication error on send */\n#define EPROTO      71  /* Protocol error */\n#define EMULTIHOP   72  /* Multihop attempted */\n#define EDOTDOT     73  /* RFS specific error */\n#define EBADMSG     74  /* Not a data message */\n#define EOVERFLOW   75  /* Value too large for defined data type */\n#define ENOTUNIQ    76  /* Name not unique on network */\n#define EBADFD      77  /* File descriptor in bad state */\n#define EREMCHG     78  /* Remote address changed */\n#define ELIBACC     79  /* Can not access a needed shared library */\n#define ELIBBAD     80  /* Accessing a corrupted shared library */\n#define ELIBSCN     81  /* .lib section in a.out corrupted */\n#define ELIBMAX     82  /* Attempting to link in too many shared libraries */\n#define ELIBEXEC    83  /* Cannot exec a shared library directly */\n#define EILSEQ      84  /* Illegal byte sequence */\n#define ERESTART    85  /* Interrupted system call should be restarted */\n#define ESTRPIPE    86  /* Streams pipe error */\n#define EUSERS      87  /* Too many users */\n#define ENOTSOCK    88  /* Socket operation on non-socket */\n#define EDESTADDRREQ    89  /* Destination address required */\n#define EMSGSIZE    90  /* Message too long */\n#define EPROTOTYPE  91  /* Protocol wrong type for socket */\n#define ENOPROTOOPT 92  /* Protocol not available */\n#define EPROTONOSUPPORT 93  /* Protocol not supported */\n#define ESOCKTNOSUPPORT 94  /* Socket type not supported */\n#define EOPNOTSUPP  95  /* Operation not supported on transport endpoint */\n#define EPFNOSUPPORT    96  /* Protocol family not supported */\n#define EAFNOSUPPORT    97  /* Address family not supported by protocol */\n#define EADDRINUSE  98  /* Address already in use */\n#define EADDRNOTAVAIL   99  /* Cannot assign requested address */\n#define ENETDOWN    100 /* Network is down */\n#define ENETUNREACH 101 /* Network is unreachable */\n#define ENETRESET   102 /* Network dropped connection because of reset */\n#define ECONNABORTED    103 /* Software caused connection abort */\n#define ECONNRESET  104 /* Connection reset by peer */\n#define ENOBUFS     105 /* No buffer space available */\n#define EISCONN     106 /* Transport endpoint is already connected */\n#define ENOTCONN    107 /* Transport endpoint is not connected */\n#define ESHUTDOWN   108 /* Cannot send after transport endpoint shutdown */\n#define ETOOMANYREFS    109 /* Too many references: cannot splice */\n#define ETIMEDOUT   110 /* Connection timed out */\n#define ECONNREFUSED    111 /* Connection refused */\n#define EHOSTDOWN   112 /* Host is down */\n#define EHOSTUNREACH    113 /* No route to host */\n#define EALREADY    114 /* Operation already in progress */\n#define EINPROGRESS 115 /* Operation now in progress */\n#define ESTALE      116 /* Stale NFS file handle */\n#define EUCLEAN     117 /* Structure needs cleaning */\n#define ENOTNAM     118 /* Not a XENIX named type file */\n#define ENAVAIL     119 /* No XENIX semaphores available */\n#define EISNAM      120 /* Is a named type file */\n#define EREMOTEIO   121 /* Remote I/O error */\n#define EDQUOT      122 /* Quota exceeded */\n#define ENOMEDIUM   123 /* No medium found */\n#define EMEDIUMTYPE 124 /* Wrong medium type */\n\n#endif\n"
  },
  {
    "path": "utils/libc/inc/stdarg.h",
    "content": "/* Copyright (C) 1989, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.\n\nThis file is part of GCC.\n\nGCC is free software; you can redistribute it and/or modify\nit under the terms of the GNU General Public License as published by\nthe Free Software Foundation; either version 2, or (at your option)\nany later version.\n\nGCC is distributed in the hope that it will be useful,\nbut WITHOUT ANY WARRANTY; without even the implied warranty of\nMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\nGNU General Public License for more details.\n\nYou should have received a copy of the GNU General Public License\nalong with GCC; see the file COPYING.  If not, write to\nthe Free Software Foundation, 59 Temple Place - Suite 330,\nBoston, MA 02111-1307, USA.  */\n\n/* As a special exception, if you include this header file into source\n   files compiled by GCC, this header file does not by itself cause\n   the resulting executable to be covered by the GNU General Public\n   License.  This exception does not however invalidate any other\n   reasons why the executable file might be covered by the GNU General\n   Public License.  */\n\n/*\n * ISO C Standard:  7.15  Variable arguments  \n */\n\n#ifndef _STDARG_H\n#ifndef _ANSI_STDARG_H_\n#ifndef __need___va_list\n#define _STDARG_H\n#define _ANSI_STDARG_H_\n#endif /* not __need___va_list */\n#undef __need___va_list\n\n/* Define __gnuc_va_list.  */\n\n#ifndef __GNUC_VA_LIST\n#define __GNUC_VA_LIST\ntypedef __builtin_va_list __gnuc_va_list;\n#endif\n\n/* Define the standard macros for the user,\n   if this invocation was from the user program.  */\n#ifdef _STDARG_H\n\n#define va_start(v,l)    __builtin_va_start(v,l)\n#define va_end(v)    __builtin_va_end(v)\n#define va_arg(v,l)    __builtin_va_arg(v,l)\n#if !defined(__STRICT_ANSI__) || __STDC_VERSION__ + 0 >= 199900L\n#define va_copy(d,s)    __builtin_va_copy(d,s)\n#endif\n#define __va_copy(d,s)    __builtin_va_copy(d,s)\n\n/* Define va_list, if desired, from __gnuc_va_list. */\n/* We deliberately do not define va_list when called from\n   stdio.h, because ANSI C says that stdio.h is not supposed to define\n   va_list.  stdio.h needs to have access to that data type,\n   but must not use that name.  It should use the name __gnuc_va_list,\n   which is safe because it is reserved for the implementation.  */\n\n#ifdef _HIDDEN_VA_LIST  /* On OSF1, this means varargs.h is \"half-loaded\".  */\n#undef _VA_LIST\n#endif\n\n#ifdef _BSD_VA_LIST\n#undef _BSD_VA_LIST\n#endif\n\n#if defined(__svr4__) || (defined(_SCO_DS) && !defined(__VA_LIST))\n/* SVR4.2 uses _VA_LIST for an internal alias for va_list,\n   so we must avoid testing it and setting it here.\n   SVR4 uses _VA_LIST as a flag in stdarg.h, but we should\n   have no conflict with that.  */\n#ifndef _VA_LIST_\n#define _VA_LIST_\n#ifdef __i860__\n#ifndef _VA_LIST\n#define _VA_LIST va_list\n#endif\n#endif /* __i860__ */\ntypedef __gnuc_va_list va_list;\n#ifdef _SCO_DS\n#define __VA_LIST\n#endif\n#endif /* _VA_LIST_ */\n#else /* not __svr4__ || _SCO_DS */\n\n/* The macro _VA_LIST_ is the same thing used by this file in Ultrix.\n   But on BSD NET2 we must not test or define or undef it.\n   (Note that the comments in NET 2's ansi.h\n   are incorrect for _VA_LIST_--see stdio.h!)  */\n#if !defined (_VA_LIST_) || defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__) || defined(WINNT)\n/* The macro _VA_LIST_DEFINED is used in Windows NT 3.5  */\n#ifndef _VA_LIST_DEFINED\n/* The macro _VA_LIST is used in SCO Unix 3.2.  */\n#ifndef _VA_LIST\n/* The macro _VA_LIST_T_H is used in the Bull dpx2  */\n#ifndef _VA_LIST_T_H\n/* The macro __va_list__ is used by BeOS.  */\n#ifndef __va_list__\ntypedef __gnuc_va_list va_list;\n#endif /* not __va_list__ */\n#endif /* not _VA_LIST_T_H */\n#endif /* not _VA_LIST */\n#endif /* not _VA_LIST_DEFINED */\n#if !(defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__))\n#define _VA_LIST_\n#endif\n#ifndef _VA_LIST\n#define _VA_LIST\n#endif\n#ifndef _VA_LIST_DEFINED\n#define _VA_LIST_DEFINED\n#endif\n#ifndef _VA_LIST_T_H\n#define _VA_LIST_T_H\n#endif\n#ifndef __va_list__\n#define __va_list__\n#endif\n\n#endif /* not _VA_LIST_, except on certain systems */\n\n#endif /* not __svr4__ */\n\n#endif /* _STDARG_H */\n\n#endif /* not _ANSI_STDARG_H_ */\n#endif /* not _STDARG_H */\n"
  },
  {
    "path": "utils/libc/inc/stdbool.h",
    "content": "#ifndef STD_BOOL_H\n#define STD_BOOL_H\n\n#ifdef __cplusplus\n#else\ntypedef unsigned char               bool;\n#define true                        1\n#define false                       0\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/libc/inc/stddef.h",
    "content": "#ifndef STDDEF_H\n#define STDDEF_H\n\n#undef                              NULL\n#ifndef __cplusplus\n#define NULL                        ((void *)0)\n#else   /* C++ */\n#define NULL                        0\n#endif  /* C++ */\n\n#endif\n\n"
  },
  {
    "path": "utils/libc/inc/stdint.h",
    "content": "#ifndef STDINT_H\n#define STDINT_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n/*\n * 7.18.2 Limits of specified-width integer types\n */\n\n/* 7.18.2.1 Limits of exact-width integer types */\n\n/* minimum values of exact-width signed integer types */\n#define\tINT8_MIN\t(-INT8_MAX-1)\t\t\t/* int8_t\t  */\n#define\tINT16_MIN\t(-INT16_MAX-1)\t\t\t/* int16_t\t  */\n#define\tINT32_MIN\t(-INT32_MAX-1)\t\t\t/* int32_t\t  */\n#define\tINT64_MIN\t(-INT64_MAX-1)\t\t\t/* int64_t\t  */\n\n#define SCHAR_MIN\t(-SCHAR_MAX-1)\t\t\t/* signed char */\n#define SHRT_MIN\t(-SHRT_MAX-1)\t\t\t/* short      */\n#define\tINT_MIN\t\t(-INT_MAX-1)\t\t\t/* int\t      */\n#define\tLONG_MIN\t(-LONG_MAX-1)\t\t\t/* long\t      */\n#define\tLLONG_MIN\t(-LLONG_MAX-1)\t\t\t/* long long  */\n\n#ifdef __INT8_MAX__\n/* maximum values of exact-width signed integer types */\n#define\tINT8_MAX\t__INT8_MAX__\t\t\t/* int8_t\t  */\n#define\tINT16_MAX\t__INT16_MAX__\t\t\t/* int16_t\t  */\n#define\tINT32_MAX\t__INT32_MAX__\t\t\t/* int32_t\t  */\n#define\tINT64_MAX\t__INT64_MAX__\t\t\t/* int64_t\t  */\n\n#define\tSCHAR_MAX\t__SCHAR_MAX__\t\t\t/* signed char */\n#define\tSHRT_MAX\t__SHRT_MAX__\t\t\t/* short      */\n#define\tINT_MAX\t\t__INT_MAX__\t\t\t\t/* int        */\n#define\tLONG_MAX\t__LONG_MAX__\t\t\t/* long       */\n#define\tLLONG_MAX\t__LONG_LONG_MAX__\t\t/* long long  */\n\n/* maximum values of exact-width unsigned integer types */\n#define\tUINT8_MAX\t__UINT8_MAX__\t\t\t/* uint8_t\t  */\n#define\tUINT16_MAX\t__UINT16_MAX__\t\t\t/* uint16_t\t  */\n#define\tUINT32_MAX\t__UINT32_MAX__\t\t\t/* uint32_t\t  */\n#define\tUINT64_MAX\t__UINT64_MAX__\t\t\t/* uint64_t\t  */\n\n#else\n/* maximum values of exact-width signed integer types */\n#define\tINT8_MAX\t0x7f\t\t\t\t\t/* int8_t\t  */\n#define\tINT16_MAX\t0x7fff\t\t\t\t\t/* int16_t\t  */\n#define\tINT32_MAX\t0x7fffffff\t\t\t\t/* int32_t\t  */\n#define\tINT64_MAX\t0x7fffffffffffffffLL\t/* int64_t\t  */\n\n#define\tSCHAR_MAX\t0x7f\t\t\t\t\t/* signed char */\n#define\tSHRT_MAX\t0x7fff\t\t\t\t\t/* short      */\n#define\tINT_MAX\t\t0x7fffffff\t\t\t\t/* int        */\n#define\tLONG_MAX\t0x7fffffff\t\t\t\t/* long       */\n#define\tLLONG_MAX\t0x7fffffffffffffffLL\t/* long long  */\n\n/* maximum values of exact-width unsigned integer types */\n#define\tUINT8_MAX\t0xff\t\t\t\t\t/* uint8_t\t  */\n#define\tUINT16_MAX\t0xffff\t\t\t\t\t/* uint16_t\t  */\n#define\tUINT32_MAX\t0xffffffffU\t\t\t\t/* uint32_t\t  */\n#define\tUINT64_MAX\t0xffffffffffffffffULL\t/* uint64_t\t  */\n#endif\n\n#define\tUSCHAR_MAX\t(2U*SCHAR_MAX+1)\t\t\t/* unsigned char */\n#define\tUSHRT_MAX\t(2U*SHRT_MAX+1)\t\t\t/* unsigned short */\n#define\tUINT_MAX\t(2U*INT_MAX+1)\t\t\t/* unsigned int */\n#define\tULONG_MAX\t(2UL*LONG_MAX+1)\t\t\t/* unsigned long */\n#define\tULLONG_MAX\t(2ULL*LLONG_MAX+1)\t\t\t/* unsigned long long */\n\n/* 7.18.2.2 Limits of minimum-width integer types */\n\n/* minimum values of minimum-width signed integer types */\n#define\tINT_LEAST8_MIN\t(-INT_LEAST8_MAX-1)\t\t/* int_least8_t\t  */\n#define\tINT_LEAST16_MIN\t(-INT_LEAST16_MAX-1)\t/* int_least16_t  */\n#define\tINT_LEAST32_MIN\t(-INT_LEAST32_MAX-1)\t/* int_least32_t  */\n#define\tINT_LEAST64_MIN\t(-INT_LEAST64_MAX-1)\t/* int_least64_t  */\n\n#ifdef __INT_LEAST8_MAX__\n/* maximum values of minimum-width signed integer types */\n#define\tINT_LEAST8_MAX\t__INT_LEAST8_MAX__\t\t/* int_least8_t\t  */\n#define\tINT_LEAST16_MAX\t__INT_LEAST16_MAX__\t\t/* int_least16_t  */\n#define\tINT_LEAST32_MAX\t__INT_LEAST32_MAX__\t\t/* int_least32_t  */\n#define\tINT_LEAST64_MAX\t__INT_LEAST64_MAX__\t\t/* int_least64_t  */\n\n/* maximum values of minimum-width unsigned integer types */\n#define\tUINT_LEAST8_MAX\t __UINT_LEAST8_MAX__\t/* uint_least8_t  */\n#define\tUINT_LEAST16_MAX __UINT_LEAST16_MAX__\t/* uint_least16_t */\n#define\tUINT_LEAST32_MAX __UINT_LEAST32_MAX__\t/* uint_least32_t */\n#define\tUINT_LEAST64_MAX __UINT_LEAST64_MAX__\t/* uint_least64_t */\n#else\n/* maximum values of minimum-width signed integer types */\n#define\tINT_LEAST8_MAX\t0x7f\t\t\t\t/* int_least8_t\t  */\n#define\tINT_LEAST16_MAX\t0x7fff\t\t\t\t/* int_least16_t  */\n#define\tINT_LEAST32_MAX\t0x7fffffff\t\t\t/* int_least32_t  */\n#define\tINT_LEAST64_MAX\t0x7fffffffffffffffLL\t/* int_least64_t  */\n\n/* maximum values of minimum-width unsigned integer types */\n#define\tUINT_LEAST8_MAX\t 0xff\t\t\t\t/* uint_least8_t  */\n#define\tUINT_LEAST16_MAX 0xffff\t\t\t\t/* uint_least16_t */\n#define\tUINT_LEAST32_MAX 0xffffffffU\t\t/* uint_least32_t */\n#define\tUINT_LEAST64_MAX 0xffffffffffffffffULL\t/* uint_least64_t */\n#endif\n\n/* 7.18.2.3 Limits of fastest minimum-width integer types */\n\n/* minimum values of fastest minimum-width signed integer types */\n#define\tINT_FAST8_MIN\t(-INT_FAST8_MAX-1)\t/* int_fast8_t\t  */\n#define\tINT_FAST16_MIN\t(-INT_FAST16_MAX-1)\t/* int_fast16_t\t  */\n#define\tINT_FAST32_MIN\t(-INT_FAST32_MAX-1)\t/* int_fast32_t\t  */\n#define\tINT_FAST64_MIN\t(-INT_FAST64_MAX-1)\t/* int_fast64_t\t  */\n\n#ifdef INT_FAST8_MAX\n/* maximum values of fastest minimum-width signed integer types */\n#define\tINT_FAST8_MAX\t__INT_FAST8_MAX__\t/* int_fast8_t\t  */\n#define\tINT_FAST16_MAX\t__INT_FAST16_MAX__\t/* int_fast16_t\t  */\n#define\tINT_FAST32_MAX\t__INT_FAST32_MAX__\t/* int_fast32_t\t  */\n#define\tINT_FAST64_MAX\t__INT_FAST64_MAX__\t/* int_fast64_t\t  */\n\n/* maximum values of fastest minimum-width unsigned integer types */\n#define\tUINT_FAST8_MAX\t__UINT_FAST8_MAX__\t/* uint_fast8_t\t  */\n#define\tUINT_FAST16_MAX\t__UINT_FAST16_MAX__\t/* uint_fast16_t  */\n#define\tUINT_FAST32_MAX\t__UINT_FAST32_MAX__\t/* uint_fast32_t  */\n#define\tUINT_FAST64_MAX\t__UINT_FAST64_MAX__\t/* uint_fast64_t  */\n#else\n/* maximum values of fastest minimum-width signed integer types */\n#define\tINT_FAST8_MAX\t0x7fffffff\t\t\t/* int_fast8_t\t  */\n#define\tINT_FAST16_MAX\t0x7fffffff\t\t\t/* int_fast16_t\t  */\n#define\tINT_FAST32_MAX\t0x7fffffff\t\t\t/* int_fast32_t\t  */\n#define\tINT_FAST64_MAX\t0x7fffffffffffffffLL\t/* int_fast64_t\t  */\n\n/* maximum values of fastest minimum-width unsigned integer types */\n#define\tUINT_FAST8_MAX\t0xffffffffU\t\t\t/* uint_fast8_t\t  */\n#define\tUINT_FAST16_MAX\t0xffffffffU\t\t\t/* uint_fast16_t  */\n#define\tUINT_FAST32_MAX\t0xffffffffU\t\t\t/* uint_fast32_t  */\n#define\tUINT_FAST64_MAX\t0xffffffffffffffffULL\t/* uint_fast64_t  */\n#endif\n\n/* 7.18.2.4 Limits of integer types capable of holding object pointers */\n\n#define\tINTPTR_MIN\t(-INTPTR_MAX-1)\t\t\t/* intptr_t\t  */\n#ifdef __INTPTR_MAX__\n#define\tINTPTR_MAX\t__INTPTR_MAX__\t\t\t/* intptr_t\t  */\n#define\tUINTPTR_MAX\t__UINTPTR_MAX__\t\t\t/* uintptr_t  */\n#else\n#define\tINTPTR_MAX\t0x7fffffffL\t\t\t\t/* intptr_t\t  */\n#define\tUINTPTR_MAX\t0xffffffffUL\t\t\t/* uintptr_t  */\n#endif\n\n/* 7.18.2.5 Limits of greatest-width integer types */\n\n#define\tINTMAX_MIN\t(-INTMAX_MAX-1)\t\t\t/* intmax_t\t  */\n#ifdef __INTMAX_MAX__\n#define\tINTMAX_MAX\t__INTMAX_MAX__\t\t\t/* intmax_t\t  */\n#define\tUINTMAX_MAX\t__UINTMAX_MAX__\t\t\t/* uintmax_t  */\n#else\n#define\tINTMAX_MAX\t0x7fffffffffffffffLL\t/* intmax_t\t  */\n#define\tUINTMAX_MAX\t0xffffffffffffffffULL\t/* uintmax_t  */\n#endif\n\n/*\n * 7.18.3 Limits of other integer types\n */\n\n/* limits of ptrdiff_t */\n#define\tPTRDIFF_MIN\t(-PTRDIFF_MAX-1)\t\t/* ptrdiff_t\t  */\n#ifdef __PTRDIFF_MAX__\n#define\tPTRDIFF_MAX\t__PTRDIFF_MAX__\t\t\t/* ptrdiff_t\t  */\n#else\n#define\tPTRDIFF_MAX\t0x7fffffffL\t\t\t\t/* ptrdiff_t\t  */\n#endif\n\n/* limits of sig_atomic_t */\n#define\tSIG_ATOMIC_MIN\t(-SIG_ATOMIC_MAX-1)\t/* sig_atomic_t\t  */\n#ifdef __SIG_ATOMIC_MAX__\n#define\tSIG_ATOMIC_MAX\t__SIG_ATOMIC_MAX__\t/* sig_atomic_t\t  */\n#else\n#define\tSIG_ATOMIC_MAX\t0x7fffffff\t\t\t/* sig_atomic_t\t  */\n#endif\n\n/* limit of size_t */\n#ifdef __SIZE_MAX__\n#define\tSIZE_MAX\t__SIZE_MAX__\t\t\t/* size_t\t  */\n#else\n#define\tSIZE_MAX\t0xffffffffUL\t\t\t/* size_t\t  */\n#endif\n\n\ntypedef unsigned char               uint8_t;\ntypedef signed char                 int8_t;\ntypedef unsigned short int          uint16_t;\ntypedef signed short int            int16_t;\ntypedef unsigned int                uint32_t;\ntypedef signed int                  int32_t;\ntypedef char                        boolean;\n\ntypedef unsigned long long          uint64_t;\ntypedef signed long long            int64_t;\n\n#ifndef size_t\ntypedef unsigned int                size_t;\n#endif\n\n#ifndef ssize_t\ntypedef int                         ssize_t;\n#endif\n\ntypedef unsigned long long          uintmax_t;\ntypedef long long                   intmax_t;\n\ntypedef int                         intptr_t;\n\ntypedef unsigned int                uintptr_t;\n\ntypedef int                         ptrdiff_t;\n\ntypedef int                         sig_atomic_t;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/libc/inc/stdio.h",
    "content": "#ifndef STDIO_H\n#define STDIO_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stddef.h\"\n#include \"stdint.h\"\n#include \"stdarg.h\"\n\n/* Standard sprintf() function. Work as the libc one. */\nint sprintf(char * buf, const char *fmt, ...);\n/* Standard snprintf() function from BSD, more secure... */\nint snprintf(char * buf, size_t size, const char *fmt, ...);\n/* Standard sscanf() function. Work as the libc one. */\nint sscanf(const char * buf, const char * fmt, ...);\n/* If you need to code your own printf... */\nint vsprintf(char *buf, const char *fmt, va_list ap);\nint vsnprintf(char *buf, size_t size, const char *fmt, va_list ap);\nint vsscanf(const char *fp, const char *fmt0, va_list ap);\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif /* STDIO_H */\n\n\n\n"
  },
  {
    "path": "utils/libc/inc/stdlib.h",
    "content": "#ifndef STDLIB_H\n#define STDLIB_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stddef.h\"\n#include \"stdint.h\"\n\n/* Standard atoi() function. Work as the libc one. */\nint atoi(const char *s);\n#define atol(str) ((long) atoi((str)))\n\nlong strtol(const char *nptr, char **endptr, int base);\nunsigned long strtoul(const char *nptr, char **endptr, int base);\n\n/* Standard random functions, work as the libc ones. */\n#define RAND_MAX        32767\n\nint rand(void);\nvoid srand(unsigned int seed);\n\nvoid qsort(void *baseP, size_t nElem, size_t width, int (*compar)(const void *, const void *));\n\nvoid *bsearch(const void *key, const void *base, size_t nmemb, size_t size,\n     int (*compar)(const void *, const void *));\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n"
  },
  {
    "path": "utils/libc/inc/string.h",
    "content": "#ifndef STRING_H\n#define STRING_H\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stddef.h\"\n#include \"stdint.h\"\n#include \"plat_types.h\"\n\n/*\n * Get next token from string *stringp, where tokens are possibly-empty\n * strings separated by characters from delim.\n *\n * Writes NULs into the string at *stringp to end tokens.\n * delim need not remain constant from call to call.\n * On return, *stringp points past the last NUL written (if there might\n * be further tokens), or is NULL (if there are definitely no more tokens).\n *\n * If *stringp is NULL, strsep returns NULL.\n */\nextern char * strsep(char **stringp, const char *delim);\n\n/*\n * Awkward, bug-prone, non-reentrant, Bad Thing altogether\n * Use strsep instead if possible\n */\nextern char * strtok(char *,const char *);\n/*\n * Same as strtok, but reentrant, and needs its own buffer\n * Still awkward and bug-prone...\n */\nextern char * strtok_r(char *,const char *, char **);\n\nextern char * strcpy(char *,const char *);\nextern char * strncpy(char *,const char *, size_t);\n\nextern char * strcat(char *, const char *);\nextern char * strncat(char *, const char *,size_t);\n\nextern int strcmp(const char *,const char *);\nextern int strncmp(const char *,const char *,size_t);\nextern int strnicmp(const char *, const char *, size_t);\n\nextern char * strchr(const char *,int);\nextern char * strrchr(const char *,int);\nextern char * strstr(const char *,const char *);\n\nextern size_t strlen(const char *);\nextern size_t strnlen(const char *,size_t);\n\nextern void * memset(void *,int,size_t);\nextern void * memcpy(void *,const void *,size_t);\nextern void * memmove(void *,const void *,size_t);\n\nextern void * memscan(void *,int,size_t);\nextern int memcmp(const void *,const void *,size_t);\nextern void * memchr(const void *,int,size_t);\n\nsize_t  strcspn(const char *s, const char *reject);\nsize_t  strspn(const char *s1, const char *s2);\n\n#ifdef __cplusplus\n}\n#endif\n\n\n#endif /* STRING_H */\n\n"
  },
  {
    "path": "utils/libc/libc_rom.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"stdio.h\"\n#include \"stdlib.h\"\n#include \"string.h\"\n\n#include \"export_fn_rom.h\"\n\nchar *strsep(char **stringp, const char *delim) {\n  return __export_fn_rom.strsep(stringp, delim);\n}\n\nchar *strtok(char *s, const char *delim) {\n  static char *lasts;\n\n  return strtok_r(s, delim, &lasts);\n}\n\nchar *strtok_r(char *s, const char *delim, char **lasts) {\n  return __export_fn_rom.strtok_r(s, delim, lasts);\n}\n\nchar *strncat(s1, s2, n) char *s1;\nconst char *s2;\nsize_t n;\n{ return __export_fn_rom.strncat(s1, s2, n); }\n\nint strnicmp(s1, s2, n) const char *s1;\nconst char *s2;\nsize_t n;\n{ return __export_fn_rom.strnicmp(s1, s2, n); }\n\nchar *strstr(s, find) const char *s, *find;\n{ return __export_fn_rom.strstr(s, find); }\n\nvoid *memset(dst0, c0, length) void *dst0;\nint c0;\nsize_t length;\n{ return __export_fn_rom.memset(dst0, c0, length); }\n\nvoid *memcpy(void *dst, const void *src, size_t length) {\n  return __export_fn_rom.memcpy(dst, src, length);\n}\n\nvoid *memmove(void *dst, const void *src, size_t length) {\n  return __export_fn_rom.memmove(dst, src, length);\n}\n\nint atoi(const char *s) { return __export_fn_rom.atoi(s); }\n\n#ifndef NO_STRTOL\nlong strtol(const char *nptr, char **endptr, int base) {\n  return __export_fn_rom.strtol(nptr, endptr, base);\n}\n#endif\n\n#ifndef NO_STRTOUL\nunsigned long strtoul(const char *nptr, char **endptr, int base) {\n  return __export_fn_rom.strtoul(nptr, endptr, base);\n}\n#endif\n\nvoid qsort(void *baseP, size_t nElem, size_t width,\n           int (*compar)(const void *, const void *)) {\n  return __export_fn_rom.qsort(baseP, nElem, width, compar);\n}\n\nvoid *bsearch(const void *key, const void *base, size_t nmemb, size_t size,\n              int (*compar)(const void *, const void *)) {\n  return __export_fn_rom.bsearch(key, base, nmemb, size, compar);\n}\n\nint sprintf(char *buf, const char *fmt, ...) {\n  va_list ap;\n  int len;\n\n  va_start(ap, fmt);\n  len = __export_fn_rom.vsnprintf(buf, -(size_t)buf, fmt, ap);\n  va_end(ap);\n  return (len);\n}\n\nint snprintf(char *buf, size_t size, const char *fmt, ...) {\n  va_list ap;\n  int len;\n\n  va_start(ap, fmt);\n  len = __export_fn_rom.vsnprintf(buf, size, fmt, ap);\n  va_end(ap);\n  return (len);\n}\n\nint vsprintf(char *buf, const char *fmt, va_list ap) {\n  return __export_fn_rom.vsprintf(buf, fmt, ap);\n}\n\nint vsnprintf(char *buf, size_t size, const char *fmt, va_list ap) {\n  return __export_fn_rom.vsnprintf(buf, size, fmt, ap);\n}\n\n#ifndef NO_VSSCANF\nint sscanf(const char *buf, const char *fmt, ...) {\n  va_list args;\n  int i;\n\n  va_start(args, fmt);\n  i = __export_fn_rom.vsscanf(buf, fmt, args);\n  va_end(args);\n  return i;\n}\n\nint vsscanf(const char *fp, const char *fmt0, va_list ap) {\n  return __export_fn_rom.vsscanf(fp, fmt0, ap);\n}\n#endif\n"
  },
  {
    "path": "utils/list/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.cpp $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.cpp=.o)\nobj-y := $(obj-y:.S=.o)\n\n"
  },
  {
    "path": "utils/list/list.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"list.h\"\n#include \"cmsis_os.h\"\n#include \"hal_trace.h\"\n#include \"stdio.h\"\n#include \"string.h\"\n\nosPoolId list_t_mempool = NULL;\nosPoolDef(list_t_mempool, 3, list_t);\nosPoolId list_node_t_mempool = NULL;\nosPoolDef(list_node_t_mempool, 50, list_node_t);\n\nstatic list_node_t *list_free_node_(list_t *list, list_node_t *node);\n\nint list_init(void) {\n  if (list_t_mempool == NULL)\n    list_t_mempool = osPoolCreate(osPool(list_t_mempool));\n\n  if (list_node_t_mempool == NULL)\n    list_node_t_mempool = osPoolCreate(osPool(list_node_t_mempool));\n\n  return 0;\n}\n\ninline static list_node_t *malloc_list_node(void) {\n  list_node_t *node = (list_node_t *)osPoolCAlloc(list_node_t_mempool);\n  ASSERT(node, \"[%s] failed\", __func__);\n  return node;\n}\n\ninline static void free_list_node(list_node_t *node) {\n  osPoolFree(list_node_t_mempool, node);\n}\n\ninline static list_t *malloc_list(void) {\n  list_t *list = (list_t *)osPoolCAlloc(list_t_mempool);\n  ASSERT(list, \"[%s] failed\", __func__);\n  return list;\n}\n\ninline static void free_list(list_t *list) { osPoolFree(list_t_mempool, list); }\n\n// Returns a new, empty list. Returns NULL if not enough memory could be\n// allocated for the list structure. The returned list must be freed with\n// |list_free|. The |callback| specifies a function to be called whenever a list\n// element is removed from the list. It can be used to release resources held by\n// the list element, e.g. memory or file descriptor. |callback| may be NULL if\n// no cleanup is necessary on element removal.\nlist_t *list_new(list_free_cb callback, list_mempool_zmalloc zmalloc,\n                 list_mempool_free free) {\n  list_t *list = NULL;\n  if (zmalloc) {\n    list = (list_t *)zmalloc(sizeof(list_t));\n    if (list) {\n      list->mempool_functions.zmalloc = zmalloc;\n      list->mempool_functions.free = free;\n      list->free_cb = callback;\n    }\n  } else {\n    list = (list_t *)malloc_list();\n    if (list) {\n      list->free_cb = callback;\n    }\n  }\n  return list;\n}\n\n// Frees the list. This function accepts NULL as an argument, in which case it\n// behaves like a no-op.\nvoid list_free(list_t *list) {\n  if (list != NULL)\n    list_clear(list);\n  if (list->mempool_functions.free)\n    list->mempool_functions.free(list);\n  else\n    free_list(list);\n}\n\n// Returns true if the list is empty (has no elements), false otherwise.\n// Note that a NULL list is not the same as an empty list. This function\n// does not accept a NULL list.\nbool list_is_empty(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  return (list->length == 0);\n}\n\n// Returns the length of the list. This function does not accept a NULL list.\nsize_t list_length(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  return list->length;\n}\n\n// Returns the first element in the list without removing it. |list| may not\n// be NULL or empty.\nvoid *list_front(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(!list_is_empty(list), \"%s\", __func__);\n  return list->head->data;\n}\n\n// Returns the last element in the list without removing it. |list| may not\n// be NULL or empty.\nvoid *list_back(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(!list_is_empty(list), \"%s\", __func__);\n\n  return list->tail->data;\n}\n\nbool list_insert_after(list_t *list, list_node_t *prev_node, void *data) {\n  list_node_t *node;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(prev_node != NULL, \"%s\", __func__);\n  ASSERT(data != NULL, \"%s\", __func__);\n\n  if (list->mempool_functions.zmalloc)\n    node = (list_node_t *)list->mempool_functions.zmalloc(sizeof(list_node_t));\n  else\n    node = (list_node_t *)malloc_list_node();\n\n  if (!node)\n    return false;\n\n  node->next = prev_node->next;\n  node->data = data;\n  prev_node->next = node;\n  if (list->tail == prev_node)\n    list->tail = node;\n  ++list->length;\n  return true;\n}\n\n#include \"stdio.h\"\n// Inserts |data| at the beginning of |list|. Neither |data| nor |list| may be\n// NULL. This function does not make a copy of |data| so the pointer must remain\n// valid at least until the element is removed from the list or the list is\n// freed. Returns true if |data| could be inserted, false otherwise (e.g. out of\n// memory).\nbool list_prepend(list_t *list, void *data) {\n  list_node_t *node;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(data != NULL, \"%s\", __func__);\n\n  if (list->mempool_functions.zmalloc)\n    node = (list_node_t *)list->mempool_functions.zmalloc(sizeof(list_node_t));\n  else\n    node = (list_node_t *)malloc_list_node();\n\n  if (!node)\n    return false;\n  node->next = list->head;\n  node->data = data;\n  list->head = node;\n  if (list->tail == NULL)\n    list->tail = list->head;\n  ++list->length;\n  return true;\n}\n\n// Inserts |data| at the end of |list|. Neither |data| nor |list| may be NULL.\n// This function does not make a copy of |data| so the pointer must remain valid\n// at least until the element is removed from the list or the list is freed.\n// Returns true if |data| could be inserted, false otherwise (e.g. out of\n// memory).\nbool list_append(list_t *list, void *data) {\n  list_node_t *node;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(data != NULL, \"%s\", __func__);\n\n  if (list->mempool_functions.zmalloc)\n    node = (list_node_t *)list->mempool_functions.zmalloc(sizeof(list_node_t));\n  else\n    node = (list_node_t *)malloc_list_node();\n\n  if (!node)\n    return false;\n  node->next = NULL;\n  node->data = data;\n  if (list->tail == NULL) {\n    list->head = node;\n    list->tail = node;\n  } else {\n    list->tail->next = node;\n    list->tail = node;\n  }\n  ++list->length;\n  return true;\n}\n\n// Removes |data| from the list. Neither |list| nor |data| may be NULL. If\n// |data| is inserted multiple times in the list, this function will only remove\n// the first instance. If a free function was specified in |list_new|, it will\n// be called back with |data|. This function returns true if |data| was found in\n// the list and removed, false otherwise.\nbool list_remove(list_t *list, void *data) {\n  list_node_t *prev, *node;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(data != NULL, \"%s\", __func__);\n\n  if (list_is_empty(list))\n    return false;\n\n  if (list->head->data == data) {\n    list_node_t *next = list_free_node_(list, list->head);\n    if (list->tail == list->head)\n      list->tail = next;\n    list->head = next;\n    return true;\n  }\n\n  for (prev = list->head, node = list->head->next; node;\n       prev = node, node = node->next)\n    if (node->data == data) {\n      prev->next = list_free_node_(list, node);\n      if (list->tail == node)\n        list->tail = prev;\n      return true;\n    }\n\n  return false;\n}\n\n// Removes all elements in the list. Calling this function will return the list\n// to the same state it was in after |list_new|. |list| may not be NULL.\nvoid list_clear(list_t *list) {\n  list_node_t *node;\n  ASSERT(list != NULL, \"%s\", __func__);\n  for (node = list->head; node;)\n    node = list_free_node_(list, node);\n  list->head = NULL;\n  list->tail = NULL;\n  list->length = 0;\n}\n\n// Iterates through the entire |list| and calls |callback| for each data\n// element. If the list is empty, |callback| will never be called. It is safe to\n// mutate the list inside the callback. If an element is added before the node\n// being visited, there will be no callback for the newly-inserted node. Neither\n// |list| nor |callback| may be NULL.\nvoid list_foreach(const list_t *list, list_iter_cb callback) {\n  list_node_t *node;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(callback != NULL, \"%s\", __func__);\n\n  for (node = list->head; node;) {\n    list_node_t *next = node->next;\n    callback(node->data);\n    node = next;\n  }\n}\n\n// Returns an iterator to the first element in |list|. |list| may not be NULL.\n// The returned iterator is valid as long as it does not equal the value\n// returned by |list_end|.\nlist_node_t *list_begin(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  return list->head;\n}\n\n// Returns an iterator that points past the end of the list. In other words,\n// this function returns the value of an invalid iterator for the given list.\n// When an iterator has the same value as what's returned by this function, you\n// may no longer call |list_next| with the iterator. |list| may not be NULL.\nlist_node_t *list_end(const list_t *list) {\n  ASSERT(list != NULL, \"%s\", __func__);\n  return NULL;\n}\n\n// Given a valid iterator |node|, this function returns the next value for the\n// iterator. If the returned value equals the value returned by |list_end|, the\n// iterator has reached the end of the list and may no longer be used for any\n// purpose.\nlist_node_t *list_next(const list_node_t *node) {\n  ASSERT(node != NULL, \"%s\", __func__);\n  return node->next;\n}\n\n// Returns the value stored at the location pointed to by the iterator |node|.\n// |node| must not equal the value returned by |list_end|.\nvoid *list_node(const list_node_t *node) {\n  ASSERT(node != NULL, \"%s\", __func__);\n  return node->data;\n}\n\nstatic list_node_t *list_free_node_(list_t *list, list_node_t *node) {\n  list_node_t *next;\n  ASSERT(list != NULL, \"%s\", __func__);\n  ASSERT(node != NULL, \"%s\", __func__);\n\n  next = node->next;\n\n  if (list->free_cb)\n    list->free_cb(node->data);\n\n  if (list->mempool_functions.free)\n    list->mempool_functions.free(node);\n  else\n    free_list_node(node);\n\n  --list->length;\n\n  return next;\n}\n"
  },
  {
    "path": "utils/list/list.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#pragma once\n\n#ifndef __LIST_H__\n#define __LIST_H__\n\n#include \n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\ntypedef void *(*list_mempool_zmalloc)(size_t);\ntypedef void (*list_mempool_free)(void *);\n\ntypedef struct {    \n    list_mempool_zmalloc zmalloc;\n    list_mempool_free free;\n} list_mempool_functions_t;\n\ntypedef void (*list_free_cb)(void *data);\ntypedef bool (*list_iter_cb)(void *data);\n\ntypedef struct list_node_t {\n  struct list_node_t *next;\n  void *data;\n} list_node_t;\n\ntypedef struct list_t {\n  list_node_t *head;\n  list_node_t *tail;\n  size_t length;\n  list_free_cb free_cb;\n  list_mempool_functions_t mempool_functions;\n} list_t;\n\nstruct list_node_t;\ntypedef struct list_node_t list_node_t;\n//struct list_t;\ntypedef struct list_t list_t;\n\nint list_init(void);\n\n// Lifecycle.\nlist_t *list_new(list_free_cb callback, list_mempool_zmalloc zmalloc, list_mempool_free free);\nvoid list_free(list_t *list);\n\n// Accessors.\nbool list_is_empty(const list_t *list);\nsize_t list_length(const list_t *list);\nvoid *list_front(const list_t *list);\nvoid *list_back(const list_t *list);\n\n// Mutators.\nbool list_insert_after(list_t *list, list_node_t *prev_node, void *data);\nbool list_prepend(list_t *list, void *data);\nbool list_append(list_t *list, void *data);\nbool list_remove(list_t *list, void *data);\nvoid list_clear(list_t *list);\n\n// Iteration.\nvoid list_foreach(const list_t *list, list_iter_cb callback);\n\nlist_node_t *list_begin(const list_t *list);\nlist_node_t *list_end(const list_t *list);\nlist_node_t *list_next(const list_node_t *node);\nvoid *list_node(const list_node_t *node);\n\n#ifdef __cplusplus\n\t}\n#endif\n\n#endif//__FMDEC_H__\n\n"
  },
  {
    "path": "utils/lockcqueue/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\n"
  },
  {
    "path": "utils/lockcqueue/lockcqueue.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/***\n * lock cqueue\n * YuLongWang @2015\n */\n\n#include \"lockcqueue.h\"\n#include \"cmsis_os.h\"\n#include \"stdio.h\"\n\nint lockcqueue_init(struct lockcqueue *q, uint32_t size, uint8_t *buf) {\n  InitCQueue(&q->cqueue, size, buf);\n  q->os_mutex_def_name.mutex = q->os_mutex_cb_name;\n  q->queue_mutex_id = osMutexCreate(&q->os_mutex_def_name);\n}\n\nint lockcqueue_enqueue(struct lockcqueue *q, uint8_t *buf, uint32_t size) {\n  int ret = 0;\n  osMutexWait(q->queue_mutex_id, osWaitForever);\n  ret = EnCQueue(&q->cqueue, buf, size);\n  osMutexRelease(q->queue_mutex_id);\n\n  return ret;\n}\n\nint lockcqueue_dequeue(struct lockcqueue *q, uint8_t *buf, uint32_t size) {\n  int ret = 0;\n  osMutexWait(q->queue_mutex_id, osWaitForever);\n  ret = DeCQueue(&q->cqueue, buf, size);\n  osMutexRelease(q->queue_mutex_id);\n\n  return ret;\n}\n"
  },
  {
    "path": "utils/lockcqueue/lockcqueue.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n/***\n * lock cqueue\n * YuLongWang @2015\n*/\n\n#ifndef LOCKCQUEUE_H\n#define LOCKCQUEUE_H\n\n#if defined(__cplusplus)\nextern \"C\" {\n#endif\n\n#include \"cqueue.h\"\n\nstruct lockcqueue {\n    CQueue cqueue;\n    osMutexId queue_mutex_id;\n    uint32_t os_mutex_cb_name[3];\n    osMutexDef_t os_mutex_def_name;\n};\n\nint lockcqueue_init(struct lockcqueue *q, uint32_t size, uint8_t *buf);\nint lockcqueue_enqueue(struct lockcqueue *q, uint8_t *buf, uint32_t size);\nint lockcqueue_dequeue(struct lockcqueue *q, uint8_t *buf, uint32_t size);\n\n#if defined(__cplusplus)\n}\n#endif\n\n#endif /* LOCKCQUEUE_H */\n"
  },
  {
    "path": "utils/retention_ram/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c $(cur_dir)*.S))\nobj-y := $(obj-y:.c=.o)\nobj-y := $(obj-y:.S=.o)\n\nccflags-y := -Iplatform/hal \\\n\n\n\n"
  },
  {
    "path": "utils/retention_ram/retention_ram.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"retention_ram.h\"\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"string.h\"\n\n#define OTA_RANDOM_BLE_BD_ADDR_MAGIC_CODE 0x51544F55\n#define BLE_BD_ADDR_LEN 6\ntypedef struct {\n  uint32_t magicCode; // 0x51544F55: \"UOTA\" means the OTA firmware should use\n                      // the BD address in this structure, otherwise it will\n                      // generate a random BD address\n  uint8_t bleBdAddr[BLE_BD_ADDR_LEN];\n} BLE_BD_ADDR_FOR_OTA_T;\n\n// retained across the HW reset\nBLE_BD_ADDR_FOR_OTA_T __attribute((section(\".reboot_param\"))) bleBdAddrForOta;\nvoid fillBleBdAddrForOta(uint8_t *bdAddr) {\n  bleBdAddrForOta.magicCode = OTA_RANDOM_BLE_BD_ADDR_MAGIC_CODE;\n  memcpy(&(bleBdAddrForOta.bleBdAddr), bdAddr, BLE_BD_ADDR_LEN);\n}\n\nextern uint8_t ble_addr[BLE_BD_ADDR_LEN];\nstatic unsigned int seed = 1;\n\nstatic void set_rand_seed(unsigned int init) { seed = init; }\n\nstatic int get_rand(void) {\n  // Based on Knuth \"The Art of Computer Programming\"\n  seed = seed * 1103515245 + 12345;\n  return ((unsigned int)(seed / 65536) % (32767 + 1));\n}\n\nvoid otaConfigureBleBdAddr(void) {\n  if (OTA_RANDOM_BLE_BD_ADDR_MAGIC_CODE == bleBdAddrForOta.magicCode) {\n    // use the BD address saved in bleBdAddrForOta\n    memcpy(&ble_addr, &(bleBdAddrForOta.bleBdAddr), BLE_BD_ADDR_LEN);\n\n    // clear the magic code\n    bleBdAddrForOta.magicCode = 0;\n  } else {\n    // generate the random BD static address\n    int randomData;\n\n    for (uint32_t index = 0; index < BLE_BD_ADDR_LEN / 2; index++) {\n      set_rand_seed(hal_sys_timer_get());\n      randomData = get_rand();\n      TRACE(2, \"randomData %d is 0x%x\", index, randomData);\n      memcpy(&(ble_addr[index * 2]), (uint8_t *)&randomData, 2);\n    }\n\n    // top two bits of the random static BD address are 1\n    ble_addr[5] |= 0xC0;\n  }\n}\n"
  },
  {
    "path": "utils/retention_ram/retention_ram.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __RETENTION_RAM_H__\n#define __RETENTION_RAM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n\n\nvoid fillBleBdAddrForOta(uint8_t* bdAddr);\nvoid otaConfigureBleBdAddr(void);\n\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\t// #define __RETENTION_RAM_H__\n\n"
  },
  {
    "path": "utils/rom_utils/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nrulib-y :=\n\nrulib-y += $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)$(CHIP)/*.c $(cur_dir)$(CHIP)/*.cpp $(cur_dir)$(CHIP)/*.S))\n\nrulib-y := $(rulib-y:.c=.o)\nrulib-y := $(rulib-y:.cpp=.o)\nrulib-y := $(rulib-y:.S=.o)\n\n-include $(cur_dir)$(CHIP)/Makefile\n$(cur_dir)$(CHIP)/Makefile: ;\n\nifeq ($(rulib-y),)\nrulib-y := rom_utils_dummy.o\nendif\n\nROM_UTILS_LIB := $(CHIP)_librom_utils\n\n$(ROM_UTILS_LIB)-y := $(rulib-y)\n\nobj-y := $(ROM_UTILS_LIB).a\n\nccflags-y += \\\n\n"
  },
  {
    "path": "utils/rom_utils/export_fn_rom.h",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#ifndef __EXPORT_FN_ROM_H__\n#define __EXPORT_FN_ROM_H__\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n\n#include \"stdint.h\"\n#include \"stdarg.h\"\n\ntypedef void (*__BOOT_FROM_FLASH_REENT)(void);\ntypedef unsigned long (*__CRC32)(unsigned long crc, const unsigned char *buf, unsigned int len);\ntypedef int (*__VERIFY_SIGNATURE)(const unsigned char *key, const unsigned char *sig, const unsigned char *data, unsigned int len);\ntypedef const uint8_t* (*__SHA256_HASH)(const void* data, uint32_t len, uint8_t* digest);\ntypedef void (*__SHA256_INIT)(void* ctx);\ntypedef void (*__SHA256_UPDATE)(void* ctx, const void* data, uint32_t len);\ntypedef const uint8_t* (*__SHA256_FINAL)(void* ctx);\n\ntypedef char * (*__STRSEP)(char **stringp, const char *delim);\ntypedef char * (*__STRTOK_R)(char *,const char *, char **);\ntypedef char * (*__STRCPY)(char *,const char *);\ntypedef char * (*__STRNCPY)(char *,const char *, size_t);\ntypedef char * (*__STRCAT)(char *, const char *);\ntypedef char * (*__STRNCAT)(char *, const char *,size_t);\ntypedef int (*__STRCMP)(const char *,const char *);\ntypedef int (*__STRNCMP)(const char *,const char *,size_t);\ntypedef int (*__STRNICMP)(const char *, const char *, size_t);\ntypedef char * (*__STRCHR)(const char *,int);\ntypedef char * (*__STRRCHR)(const char *,int);\ntypedef char * (*__STRSTR)(const char *,const char *);\ntypedef size_t (*__STRLEN)(const char *);\ntypedef size_t (*__STRNLEN)(const char *,size_t);\ntypedef void * (*__MEMSET)(void *,int,size_t);\ntypedef void * (*__MEMCPY)(void *,const void *,size_t);\ntypedef void * (*__MEMMOVE)(void *,const void *,size_t);\ntypedef void * (*__MEMSCAN)(void *,int,size_t);\ntypedef int (*__MEMCMP)(const void *,const void *,size_t);\ntypedef void * (*__MEMCHR)(const void *,int,size_t);\ntypedef size_t  (*__STRCSPN)(const char *s, const char *reject);\ntypedef size_t  (*__STRSPN)(const char *s1, const char *s2);\ntypedef int (*__SPRINTF)(char * buf, const char *fmt, ...);\ntypedef int (*__SNPRINTF)(char * buf, size_t len, const char *fmt, ...);\ntypedef int (*__SSCANF)(const char * buf, const char * fmt, ...);\ntypedef int (*__VSPRINTF)(char *buf, const char *fmt, va_list ap);\ntypedef int (*__VSNPRINTF)(char *buf, size_t size, const char *fmt, va_list ap);\ntypedef int (*__VSSCANF)(const char *fp, const char *fmt0, va_list ap);\ntypedef int (*__ATOI)(const char *s);\ntypedef long (*__STRTOL)(const char *nptr, char **endptr, int base);\ntypedef unsigned long (*__STRTOUL)(const char *nptr, char **endptr, int base);\ntypedef void (*__QSORT)(void *baseP, size_t nElem, size_t width, int (*compar)(const void *, const void *));\ntypedef void * (*__BSEARCH)(const void *key, const void *base, size_t nmemb, size_t size, int (*compar)(const void *, const void *));\n\nstruct EXPORT_FN_ROM_T {\n    __BOOT_FROM_FLASH_REENT boot_from_flash_reent;\n    __CRC32 crc32;\n    __VERIFY_SIGNATURE verify_signature;\n    __SHA256_HASH SHA256_hash;\n    __SHA256_INIT SHA256_init;\n    __SHA256_UPDATE SHA256_update;\n    __SHA256_FINAL SHA256_final;\n\n    __STRSEP strsep;\n    __STRTOK_R strtok_r;\n    __STRNCAT strncat;\n    __STRNICMP strnicmp;\n    __STRSTR strstr;\n    __MEMSET memset;\n    __MEMCPY memcpy;\n    __MEMMOVE memmove;\n    __ATOI atoi;\n    __STRTOL strtol;\n    __STRTOUL strtoul;\n    __QSORT qsort;\n    __BSEARCH bsearch;\n    __SPRINTF sprintf;\n    __SNPRINTF snprintf;\n    __SSCANF sscanf;\n    __VSPRINTF vsprintf;\n    __VSNPRINTF vsnprintf;\n    __VSSCANF vsscanf;\n\n#ifdef CHIP_HAS_AUDIO_CONST_ROM\n    const unsigned int *audio_const;\n#endif\n};\n\nextern struct EXPORT_FN_ROM_T __export_fn_rom;\n\n#ifdef __cplusplus\n}\n#endif\n\n#endif\n\n"
  },
  {
    "path": "utils/sha256/Makefile",
    "content": "cur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj-y := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj-y := $(obj-y:.c=.o)\n\nifeq ($(SHA256_ROM),1)\nccflags-y += -Iutils/rom_utils\nEXCLUDE_OBJS := sha256.o\nelse\nEXCLUDE_OBJS := sha256_rom.o\nendif\n\nobj-y := $(filter-out $(EXCLUDE_OBJS),$(obj-y))\n\n"
  },
  {
    "path": "utils/sha256/hash-internal.h",
    "content": "/*\n * Copyright 2007 The Android Open Source Project\n *\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *     * Redistributions of source code must retain the above copyright\n *       notice, this list of conditions and the following disclaimer.\n *     * Redistributions in binary form must reproduce the above copyright\n *       notice, this list of conditions and the following disclaimer in the\n *       documentation and/or other materials provided with the distribution.\n *     * Neither the name of Google Inc. nor the names of its contributors may\n *       be used to endorse or promote products derived from this software\n *       without specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY Google Inc. ``AS IS'' AND ANY EXPRESS OR\n * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\n * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO\n * EVENT SHALL Google Inc. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\n * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\n * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\n * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\n * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF\n * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n */\n\n#ifndef SYSTEM_CORE_INCLUDE_MINCRYPT_HASH_INTERNAL_H_\n#define SYSTEM_CORE_INCLUDE_MINCRYPT_HASH_INTERNAL_H_\n\n#include \n\n#ifdef __cplusplus\nextern \"C\" {\n#endif  // __cplusplus\n\nstruct HASH_CTX;  // forward decl\n\ntypedef struct HASH_VTAB {\n  void (* const init)(struct HASH_CTX*);\n  void (* const update)(struct HASH_CTX*, const void*, uint32_t);\n  const uint8_t* (* const final)(struct HASH_CTX*);\n  const uint8_t* (* const hash)(const void*, uint32_t, uint8_t*);\n  int size;\n} HASH_VTAB;\n\ntypedef struct HASH_CTX {\n  const HASH_VTAB * f;\n  uint64_t count;\n  union {\n      uint8_t buf[64];\n      uint32_t buf32[64 / 4];\n  };\n  uint32_t state[8];  // upto SHA2\n} HASH_CTX;\n\n#define HASH_init(ctx) (ctx)->f->init(ctx)\n#define HASH_update(ctx, data, len) (ctx)->f->update(ctx, data, len)\n#define HASH_final(ctx) (ctx)->f->final(ctx)\n#define HASH_hash(data, len, digest) (ctx)->f->hash(data, len, digest)\n#define HASH_size(ctx) (ctx)->f->size\n\n#ifdef __cplusplus\n}\n#endif  // __cplusplus\n\n#endif  // SYSTEM_CORE_INCLUDE_MINCRYPT_HASH_INTERNAL_H_\n"
  },
  {
    "path": "utils/sha256/sha256.c",
    "content": "/* sha256.c\n**\n** Copyright 2013, The Android Open Source Project\n**\n** Redistribution and use in source and binary forms, with or without\n** modification, are permitted provided that the following conditions are met:\n**     * Redistributions of source code must retain the above copyright\n**       notice, this list of conditions and the following disclaimer.\n**     * Redistributions in binary form must reproduce the above copyright\n**       notice, this list of conditions and the following disclaimer in the\n**       documentation and/or other materials provided with the distribution.\n**     * Neither the name of Google Inc. nor the names of its contributors may\n**       be used to endorse or promote products derived from this software\n**       without specific prior written permission.\n**\n** THIS SOFTWARE IS PROVIDED BY Google Inc. ``AS IS'' AND ANY EXPRESS OR\n** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\n** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO\n** EVENT SHALL Google Inc. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n** SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\n** PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\n** OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\n** WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\n** OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF\n** ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n*/\n\n// Optimized for minimal code size.\n\n#include \"sha256.h\"\n\n#include \n#include \n#include \n\n#include \"cmsis.h\"\n#include \"hal_sec_eng.h\"\n#include \"hal_timer.h\"\n#include \"plat_addr_map.h\"\n\n#define ror(value, bits) (((value) >> (bits)) | ((value) << (32 - (bits))))\n#define shr(value, bits) ((value) >> (bits))\n\nstatic const uint32_t K[64] = {\n    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,\n    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,\n    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,\n    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,\n    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,\n    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,\n    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,\n    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,\n    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,\n    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,\n    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};\n\nstatic void SHA256_Transform(SHA256_CTX *ctx) {\n  uint32_t W[64];\n  uint32_t A, B, C, D, E, F, G, H;\n#if (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) ||                             \\\n    (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)\n  uint32_t *p32 = ctx->buf32;\n#else\n  uint8_t *p = ctx->buf;\n#endif\n  int t;\n\n  for (t = 0; t < 16; ++t) {\n#if (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)\n    W[t] = __REV(*p32++);\n#elif (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)\n    W[t] = *p32++;\n#else\n    uint32_t tmp = *p++ << 24;\n    tmp |= *p++ << 16;\n    tmp |= *p++ << 8;\n    tmp |= *p++;\n    W[t] = tmp;\n#endif\n  }\n\n  for (; t < 64; t++) {\n    uint32_t s0 = ror(W[t - 15], 7) ^ ror(W[t - 15], 18) ^ shr(W[t - 15], 3);\n    uint32_t s1 = ror(W[t - 2], 17) ^ ror(W[t - 2], 19) ^ shr(W[t - 2], 10);\n    W[t] = W[t - 16] + s0 + W[t - 7] + s1;\n  }\n\n  A = ctx->state[0];\n  B = ctx->state[1];\n  C = ctx->state[2];\n  D = ctx->state[3];\n  E = ctx->state[4];\n  F = ctx->state[5];\n  G = ctx->state[6];\n  H = ctx->state[7];\n\n  for (t = 0; t < 64; t++) {\n    uint32_t s0 = ror(A, 2) ^ ror(A, 13) ^ ror(A, 22);\n    uint32_t maj = (A & B) ^ (A & C) ^ (B & C);\n    uint32_t t2 = s0 + maj;\n    uint32_t s1 = ror(E, 6) ^ ror(E, 11) ^ ror(E, 25);\n    uint32_t ch = (E & F) ^ ((~E) & G);\n    uint32_t t1 = H + s1 + ch + K[t] + W[t];\n\n    H = G;\n    G = F;\n    F = E;\n    E = D + t1;\n    D = C;\n    C = B;\n    B = A;\n    A = t1 + t2;\n  }\n\n  ctx->state[0] += A;\n  ctx->state[1] += B;\n  ctx->state[2] += C;\n  ctx->state[3] += D;\n  ctx->state[4] += E;\n  ctx->state[5] += F;\n  ctx->state[6] += G;\n  ctx->state[7] += H;\n}\n\nstatic const HASH_VTAB SHA256_VTAB = {SHA256_init, SHA256_update, SHA256_final,\n                                      SHA256_hash, SHA256_DIGEST_SIZE};\n\nvoid SHA256_init(SHA256_CTX *ctx) {\n  ctx->f = &SHA256_VTAB;\n  ctx->state[0] = 0x6a09e667;\n  ctx->state[1] = 0xbb67ae85;\n  ctx->state[2] = 0x3c6ef372;\n  ctx->state[3] = 0xa54ff53a;\n  ctx->state[4] = 0x510e527f;\n  ctx->state[5] = 0x9b05688c;\n  ctx->state[6] = 0x1f83d9ab;\n  ctx->state[7] = 0x5be0cd19;\n  ctx->count = 0;\n}\n\nvoid SHA256_update(SHA256_CTX *ctx, const void *data, uint32_t len) {\n  uint32_t i = (uint32_t)(ctx->count & 63);\n  const uint8_t *p = (const uint8_t *)data;\n\n  ctx->count += len;\n\n#if (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) ||                             \\\n    (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)\n  if (len >= 4 && (i & 0x3) == 0 && ((uint32_t)p & 0x3) == 0) {\n    const uint32_t *p32 = (const uint32_t *)p;\n    int k = i / 4;\n    while (len >= 4) {\n      len -= 4;\n#if (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)\n      ctx->buf32[k++] = *p32++;\n#else\n      ctx->buf32[k++] = __REV(*p32++);\n#endif\n      if (k == 64 / 4) {\n        SHA256_Transform(ctx);\n        k = 0;\n      }\n    }\n    i = k * 4;\n    p = (const uint8_t *)p32;\n  }\n#endif\n\n  while (len--) {\n    ctx->buf[i++] = *p++;\n    if (i == 64) {\n      SHA256_Transform(ctx);\n      i = 0;\n    }\n  }\n}\n\nconst uint8_t *SHA256_final(SHA256_CTX *ctx) {\n  uint8_t *p = ctx->buf;\n  uint64_t cnt = ctx->count * 8;\n  uint32_t i;\n\n  SHA256_update(ctx, (uint8_t *)\"\\x80\", 1);\n  while ((ctx->count & 63) != 56) {\n    SHA256_update(ctx, (uint8_t *)\"\\0\", 1);\n  }\n  for (i = 0; i < 8; ++i) {\n    uint8_t tmp = (uint8_t)(cnt >> ((7 - i) * 8));\n    SHA256_update(ctx, &tmp, 1);\n  }\n\n  for (i = 0; i < 8; i++) {\n    uint32_t tmp = ctx->state[i];\n    *p++ = tmp >> 24;\n    *p++ = tmp >> 16;\n    *p++ = tmp >> 8;\n    *p++ = tmp >> 0;\n  }\n\n  return ctx->buf;\n}\n\n/* Convenience function */\nconst uint8_t *SHA256_hash2(const void *data1, uint32_t len1, const void *data2,\n                            uint32_t len2, uint8_t *digest) {\n  SHA256_CTX ctx;\n  SHA256_init(&ctx);\n  if (data1 && len1) {\n    SHA256_update(&ctx, data1, len1);\n  }\n  if (data2 && len2) {\n    SHA256_update(&ctx, data2, len2);\n  }\n  memcpy(digest, SHA256_final(&ctx), SHA256_DIGEST_SIZE);\n  return digest;\n}\n\nconst uint8_t *SHA256_hash(const void *data, uint32_t len, uint8_t *digest) {\n  return SHA256_hash2(data, len, NULL, 0, digest);\n}\n\n#if defined(SEC_ENG_BASE) && defined(SEC_ENG_HAS_HASH)\nstatic int hw_eng_en;\n#endif\n\nvoid hash_hardware_engine_enable(int enable) {\n#if defined(SEC_ENG_BASE) && defined(SEC_ENG_HAS_HASH)\n  hw_eng_en = enable;\n#endif\n}\n\nconst uint8_t *hash_sha256(const void *data, uint32_t len, uint8_t *digest) {\n#if defined(SEC_ENG_BASE) && defined(SEC_ENG_HAS_HASH)\n  if (hw_eng_en) {\n    enum HAL_SE_RET_T ret;\n    struct HAL_SE_HASH_CFG_T cfg;\n    uint32_t time;\n\n    ret = hal_se_open();\n    if (ret != HAL_SE_OK) {\n      goto _exit;\n    }\n\n    memset(&cfg, 0, sizeof(cfg));\n    cfg.done_hdlr = NULL;\n    cfg.in = data;\n    cfg.in_len = len;\n\n    ret = hal_se_hash(HAL_SE_HASH_SHA256, &cfg);\n    if (ret != HAL_SE_OK) {\n      goto _exit;\n    }\n\n    time = hal_sys_timer_get();\n    while (hal_se_hash_busy() &&\n           (hal_sys_timer_get() - time < MS_TO_TICKS(10000))) {\n    }\n\n    ret = hal_se_hash_get_digest(&digest[0], SHA256_DIGEST_SIZE, &len);\n\n  _exit:\n    hal_se_close();\n    if (ret == HAL_SE_OK) {\n      return digest;\n    }\n  }\n#endif\n\n  return SHA256_hash(data, len, digest);\n}\n"
  },
  {
    "path": "utils/sha256/sha256.h",
    "content": "/*\n * Copyright 2011 The Android Open Source Project\n *\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n *     * Redistributions of source code must retain the above copyright\n *       notice, this list of conditions and the following disclaimer.\n *     * Redistributions in binary form must reproduce the above copyright\n *       notice, this list of conditions and the following disclaimer in the\n *       documentation and/or other materials provided with the distribution.\n *     * Neither the name of Google Inc. nor the names of its contributors may\n *       be used to endorse or promote products derived from this software\n *       without specific prior written permission.\n *\n * THIS SOFTWARE IS PROVIDED BY Google Inc. ``AS IS'' AND ANY EXPRESS OR\n * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\n * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO\n * EVENT SHALL Google Inc. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\n * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\n * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\n * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\n * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF\n * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n */\n\n#ifndef SYSTEM_CORE_INCLUDE_MINCRYPT_SHA256_H_\n#define SYSTEM_CORE_INCLUDE_MINCRYPT_SHA256_H_\n\n#include \n#include \"hash-internal.h\"\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif // __cplusplus\n\ntypedef HASH_CTX SHA256_CTX;\n\nvoid SHA256_init(SHA256_CTX* ctx);\nvoid SHA256_update(SHA256_CTX* ctx, const void* data, uint32_t len);\nconst uint8_t* SHA256_final(SHA256_CTX* ctx);\n\n// Convenience method. Returns digest address.\nconst uint8_t* SHA256_hash2(const void* data1, uint32_t len1, const void* data2, uint32_t len2, uint8_t* digest);\nconst uint8_t* SHA256_hash(const void* data, uint32_t len, uint8_t* digest);\n\nvoid hash_hardware_engine_enable(int enable);\nconst uint8_t* hash_sha256(const void* data, uint32_t len, uint8_t* digest);\n\n#define SHA256_DIGEST_SIZE 32\n\n#ifdef __cplusplus\n}\n#endif // __cplusplus\n\n#endif  // SYSTEM_CORE_INCLUDE_MINCRYPT_SHA256_H_\n"
  },
  {
    "path": "utils/sha256/sha256_rom.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2020 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n#include \"export_fn_rom.h\"\n#include \"sha256.h\"\n#include \"stddef.h\"\n\nvoid SHA256_init(SHA256_CTX *ctx) { __export_fn_rom.SHA256_init(ctx); }\n\nvoid SHA256_update(SHA256_CTX *ctx, const void *data, uint32_t len) {\n  __export_fn_rom.SHA256_update(ctx, data, len);\n}\n\nconst uint8_t *SHA256_final(SHA256_CTX *ctx) {\n  return __export_fn_rom.SHA256_final(ctx);\n}\n\nconst uint8_t *SHA256_hash(const void *data, uint32_t len, uint8_t *digest) {\n  return __export_fn_rom.SHA256_hash(data, len, digest);\n}\n"
  },
  {
    "path": "utils/xyzmodem/Makefile",
    "content": "\ncur_dir := $(dir $(lastword $(MAKEFILE_LIST)))\n\nobj_c := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.c))\nobj_cpp := $(patsubst $(cur_dir)%,%,$(wildcard $(cur_dir)*.cpp))\n\nobj-y := $(obj_c:.c=.o) $(obj_s:.S=.o) $(obj_cpp:.cpp=.o)\n\nccflags-y := \\\n\t-I$(obj)/../../platform/hal/\n"
  },
  {
    "path": "utils/xyzmodem/xyzmodem.c",
    "content": "/***************************************************************************\n *\n * Copyright 2015-2019 BES.\n * All rights reserved. All unpublished rights reserved.\n *\n * No part of this work may be used or reproduced in any form or by any\n * means, or stored in a database or retrieval system, without prior written\n * permission of BES.\n *\n * Use of this work is governed by a license granted by BES.\n * This work contains confidential and proprietary information of\n * BES. which is protected by copyright, trade secret,\n * trademark and other intellectual property rights.\n *\n ****************************************************************************/\n\n#include \"hal_timer.h\"\n#include \"hal_trace.h\"\n#include \"hal_uart.h\"\n#include \"string.h\"\n\n#define SOH 0x01\n#define STX 0x02\n#define EOT 0x04\n#define ACK 0x06\n#define NAK 0x15\n#define CAN 0x18\n#define CTRLZ 0x1A\n\n#define DLY_1S 1000\n#define MAXRETRANS 25\n#define TRANSMIT_XMODEM_1K\n\n/* CRC16 implementation acording to CCITT standards */\n\nstatic const unsigned short crc16tab[256] = {\n    0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, 0x8108,\n    0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, 0x1231, 0x0210,\n    0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, 0x9339, 0x8318, 0xb37b,\n    0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, 0x2462, 0x3443, 0x0420, 0x1401,\n    0x64e6, 0x74c7, 0x44a4, 0x5485, 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee,\n    0xf5cf, 0xc5ac, 0xd58d, 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6,\n    0x5695, 0x46b4, 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d,\n    0xc7bc, 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,\n    0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, 0x5af5,\n    0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, 0xdbfd, 0xcbdc,\n    0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, 0x6ca6, 0x7c87, 0x4ce4,\n    0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, 0xedae, 0xfd8f, 0xcdec, 0xddcd,\n    0xad2a, 0xbd0b, 0x8d68, 0x9d49, 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13,\n    0x2e32, 0x1e51, 0x0e70, 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a,\n    0x9f59, 0x8f78, 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e,\n    0xe16f, 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,\n    0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, 0x02b1,\n    0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, 0xb5ea, 0xa5cb,\n    0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, 0x34e2, 0x24c3, 0x14a0,\n    0x0481, 0x7466, 0x6447, 0x5424, 0x4405, 0xa7db, 0xb7fa, 0x8799, 0x97b8,\n    0xe75f, 0xf77e, 0xc71d, 0xd73c, 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657,\n    0x7676, 0x4615, 0x5634, 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9,\n    0xb98a, 0xa9ab, 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882,\n    0x28a3, 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,\n    0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, 0xfd2e,\n    0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, 0x7c26, 0x6c07,\n    0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, 0xef1f, 0xff3e, 0xcf5d,\n    0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74,\n    0x2e93, 0x3eb2, 0x0ed1, 0x1ef0};\n\nstatic unsigned short crc16_ccitt(const void *buf, int len) {\n  register int counter;\n  register unsigned short crc = 0;\n  for (counter = 0; counter < len; counter++)\n    crc = (crc << 8) ^ crc16tab[((crc >> 8) ^ *(char *)buf++) & 0x00FF];\n  return crc;\n}\n\nstatic int check(int crc, const uint8_t *buf, int sz) __attribute__((unused));\nstatic int check(int crc, const uint8_t *buf, int sz) {\n  if (crc) {\n    unsigned short crc = crc16_ccitt(buf, sz);\n    unsigned short tcrc = (buf[sz] << 8) + buf[sz + 1];\n    if (crc == tcrc)\n      return 1;\n  } else {\n    int i;\n    unsigned char cks = 0;\n    for (i = 0; i < sz; ++i) {\n      cks += buf[i];\n    }\n    if (cks == buf[sz])\n      return 1;\n  }\n\n  return 0;\n}\n\nstatic enum HAL_UART_ID_T trace_uart = HAL_UART_ID_0;\n\nstatic struct HAL_UART_CFG_T uart_cfg_nodma = {\n    .parity = HAL_UART_PARITY_NONE,\n    .stop = HAL_UART_STOP_BITS_1,\n    .data = HAL_UART_DATA_BITS_8,\n    .flow = HAL_UART_FLOW_CONTROL_NONE, // HAL_UART_FLOW_CONTROL_RTSCTS,\n    .tx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .rx_level = HAL_UART_FIFO_LEVEL_1_2,\n    .baud = 921600,\n    .dma_rx = false,\n    .dma_tx = false,\n    .dma_rx_stop_on_err = false,\n};\n\nstatic uint8_t _inbyte(unsigned int delay) {\n  return hal_uart_blocked_getc(trace_uart);\n}\n\nstatic int _outbyte(uint8_t c) { return hal_uart_blocked_putc(trace_uart, c); }\n\nstatic void flushinput(void) {\n  while (_inbyte(((DLY_1S)*3) >> 1) >= 0)\n    ;\n}\n\nstatic unsigned char packet_no = 1;\nstatic unsigned char\n    xbuff[1030]; /* 1024 for XModem 1k + 3 head chars + 2 crc + nul */\nstatic uint32_t packet_size = 1024;\nstatic int crc_enabled;\nstatic int packet_idx;\n\nstatic int xmodem_fill_packet(uint8_t *buff, uint8_t packetno, int len,\n                              int crc) {\n  int c = len;\n  int bufsz;\n  int i;\n\n#ifdef TRANSMIT_XMODEM_1K\n  buff[0] = STX;\n  bufsz = 1024;\n#else\n  buff[0] = SOH;\n  bufsz = 128;\n#endif\n  buff[1] = packetno;\n  buff[2] = ~packetno;\n\n  // TRACE_IMM(4,\"buff %p, packetno %d, len %d, crc %d\", buff, packetno, len,\n  // crc);\n  if (c < bufsz)\n    buff[3 + c] = CTRLZ;\n  if (crc) {\n    unsigned short ccrc = crc16_ccitt(&buff[3], bufsz);\n    buff[bufsz + 3] = (ccrc >> 8) & 0xFF;\n    buff[bufsz + 4] = ccrc & 0xFF;\n  } else {\n    unsigned char ccks = 0;\n    for (i = 3; i < bufsz + 3; ++i) {\n      ccks += buff[i];\n    }\n    buff[bufsz + 3] = ccks;\n  }\n  return 0;\n}\n\nstatic int xmodem_send_one_packet(void) {\n  int retry = 0;\n  int bufsz;\n  int crc = 1;\n  int i;\n  uint8_t c;\n\n#ifdef TRANSMIT_XMODEM_1K\n  bufsz = 1024;\n#else\n  bufsz = 128;\n#endif\n  packet_size = bufsz;\n  for (retry = 0; retry < MAXRETRANS; ++retry) {\n    for (i = 0; i < bufsz + 4 + (crc ? 1 : 0); ++i) {\n      _outbyte(xbuff[i]);\n    }\n    if ((c = _inbyte(DLY_1S)) >= 0) {\n      switch (c) {\n      case ACK:\n        return 0;\n      case CAN:\n        if ((c = _inbyte(DLY_1S)) == CAN) {\n          _outbyte(ACK);\n          flushinput();\n          return -1; /* canceled by remote */\n        }\n        break;\n      case NAK:\n      default:\n        break;\n      }\n    }\n  }\n  _outbyte(CAN);\n  _outbyte(CAN);\n  _outbyte(CAN);\n  flushinput();\n  return -4; /* xmit error */\n}\n\nstatic int xmodem_connect_host(void) {\n  uint8_t c;\n  int retry;\n\n  for (retry = 0; retry < 16; ++retry) {\n    if ((c = _inbyte((DLY_1S) << 1)) >= 0) {\n      switch (c) {\n      case 'C':\n        crc_enabled = 1;\n        return 0;\n      case NAK:\n        crc_enabled = 0;\n        return 0;\n      case CAN:\n        if ((c = _inbyte(DLY_1S)) == CAN) {\n          _outbyte(ACK);\n          flushinput();\n          return -1; /* canceled by remote */\n        }\n        break;\n      default:\n        break;\n      }\n    }\n  }\n  return -2; /* no sync */\n}\n\nstatic uint32_t filled_one_payload(uint8_t *dst, const uint8_t *data,\n                                   size_t len, int ascii) {\n  static const char hexToASCII[] = \"0123456789ABCDEF\";\n  int i;\n  uint8_t byte;\n  int c;\n\n  if (ascii) {\n    for (i = 0; i < len; i++) {\n      c = *(data + i);\n      byte = c >> 4;\n      dst[i * 2] = hexToASCII[byte];\n      byte = c & 0x0F;\n      dst[i * 2 + 1] = hexToASCII[byte];\n    }\n  } else {\n    for (i = 0; i < len; i++) {\n      byte = *(data + i);\n      dst[i] = byte;\n    }\n  }\n\n  return len << ascii;\n}\n\nint xmodem_send_stream(const uint8_t *data, size_t size, int ascii) {\n  uint32_t left;\n  uint8_t *payload;\n  uint32_t filled;\n  int packet_room;\n  int xfer;\n  int ret;\n  uint8_t *dst;\n  const uint8_t *src;\n\n  left = size;\n\n  payload = &xbuff[3];\n\n  TRACE(1, \"send size %d\", size);\n  if ((ascii == 0) && (size % 2 != 0)) {\n    /*\n     * if don't need convert to ascii, the size should be multi of 2,\n     * because the packet should include ascii and binary at same time;\n     */\n    return -1;\n  }\n  src = data;\n  while (left > 0) {\n    packet_room = packet_size - packet_idx;\n    if (left > (packet_room >> ascii))\n      xfer = packet_room >> ascii;\n    else\n      xfer = left;\n\n    /*\n    TRACE_IMM(2,\"left %d packet room %d\", left, packet_room);\n    TRACE_IMM(1,\"xfer %d\", xfer);\n    */\n    dst = payload + packet_idx;\n    filled = filled_one_payload(dst, src, xfer, ascii);\n    src += xfer;\n    if ((filled + packet_idx) == packet_size) {\n      xmodem_fill_packet(xbuff, packet_no, 1024, crc_enabled);\n      ret = xmodem_send_one_packet();\n      // ret = 0;\n      if (ret == 0)\n        packet_no++;\n      memset(xbuff, 0, sizeof(xbuff));\n      packet_idx = 0;\n    } else {\n      packet_idx += filled;\n    }\n\n    left -= xfer;\n  }\n\n  return size;\n}\n\nstatic int xmodem_open_uart(int uart_id) {\n  uint32_t baud;\n\n  TRACE_IMM(0, \"\\r\\n XMODEM start ....\");\n  baud = hal_trace_get_baudrate();\n  hal_trace_flush_buffer();\n  hal_sys_timer_delay_us(3000);\n  hal_trace_close();\n  uart_cfg_nodma.baud = baud;\n  hal_uart_open(trace_uart, &uart_cfg_nodma);\n\n  return 0;\n}\n\nint xmodem_start_xfer(uint32_t wait) {\n  int ret;\n  int delay = wait;\n\n  while (!hal_uart_readable(trace_uart) && (delay > 0)) {\n    hal_sys_timer_delay(MS_TO_HWTICKS(1000));\n    delay--;\n    TRACE_NOCRLF(1, \"\\b\\b\\b%3d\", delay);\n    hal_trace_flush_buffer();\n  }\n  if (delay == 0) {\n    TRACE_IMM(0, \"\\r\\ntime out, cannot start XMODEM....\");\n    return -1;\n  }\n\n  xmodem_open_uart(0);\n  ret = xmodem_connect_host();\n  if (ret != 0) {\n    _outbyte(CAN);\n    _outbyte(CAN);\n    _outbyte(CAN);\n    flushinput();\n    return -2;\n  }\n  return 0;\n}\n\nint xmodem_stop_xfer(void) {\n  int ret = -1;\n  int retry;\n  int c;\n\n  xmodem_fill_packet(xbuff, packet_no, packet_idx, crc_enabled);\n  ret = xmodem_send_one_packet();\n  if (!ret) {\n    for (retry = 0; retry < 10; ++retry) {\n      _outbyte(EOT);\n      if ((c = _inbyte((DLY_1S) << 1)) == ACK)\n        return 0;\n    }\n    flushinput();\n  }\n  return ret;\n}\n"
  },
  {
    "path": "utils/xyzmodem/xyzmodem.h",
    "content": "#ifndef __XYZ_MODEM__\n#define __XYZ_MODEM__\n\n/*\n * start xmodem transfer\n * param: wait, connect timeout in seconds\n * return, 0 is ok\n *         other value is error;\n */\nint xmodem_start_xfer(uint32_t wait);\nint xmodem_stop_xfer(void);\nint xmodem_send_stream(const uint8_t *data, size_t size, int ascii);\n\n#endif /*__XYZ_MODEM__*/\n\n"
  }
]